diff --git a/module-apps/Application.cpp b/module-apps/Application.cpp
index a29aa2666..3b4925a30 100644
--- a/module-apps/Application.cpp
+++ b/module-apps/Application.cpp
@@ -8,9 +8,9 @@
  */
 #include <sstream>
 #include <iomanip>
-//module-utils
+// module-utils
 #include "log/log.hpp"
-//module-services
+// module-services
 #include "service-gui/messages/DrawMessage.hpp"
 #include "service-appmgr/messages/APMMessage.hpp"
 #include "service-evtmgr/messages/EVMessages.hpp"
@@ -18,10 +18,10 @@
 #include "service-db/api/DBServiceAPI.hpp"
 #include "service-cellular/ServiceCellular.hpp"
 #include "service-cellular/api/CellularServiceAPI.hpp"
-//module-gui
+// module-gui
 #include "gui/core/DrawCommand.hpp"
 #include "gui/input/InputEvent.hpp"
-//module-sys
+// module-sys
 #include "SystemManager/SystemManager.hpp"
 
 #include "Application.hpp"
@@ -33,12 +33,12 @@
 
 #include "common_data/EventStore.hpp"
 
-namespace app {
+namespace app
+{
 
     const char *Application::stateStr(Application::State st)
     {
-        switch (st)
-        {
+        switch (st) {
         case State::NONE:
             return "NONE";
         case State::DEACTIVATED:
@@ -58,571 +58,570 @@ namespace app {
         }
     }
 
-    Application::Application(std::string name, std::string parent, bool startBackground, uint32_t stackDepth, sys::ServicePriority priority)
-        : Service(name, parent, stackDepth, priority), longPressTimer(CreateAppTimer(
-                                                           key_timer_ms, true, [&]() { longPressTimerCallback(); }, "longPressTimer")),
+    Application::Application(
+        std::string name, std::string parent, bool startBackground, uint32_t stackDepth, sys::ServicePriority priority)
+        : Service(name, parent, stackDepth, priority),
+          longPressTimer(CreateAppTimer(
+              key_timer_ms, true, [&]() { longPressTimerCallback(); }, "longPressTimer")),
           startBackground{startBackground}
     {
         keyTranslator = std::make_unique<gui::KeyInputSimpleTranslation>();
         busChannels.push_back(sys::BusChannels::ServiceCellularNotifications);
-        if (startBackground)
-        {
+        if (startBackground) {
             setState(State::ACTIVE_BACKGROUND);
         }
         longPressTimer.restart();
-}
-
-Application::~Application()
-{
-    for (auto it = windows.begin(); it != windows.end(); it++)
-    {
-        delete it->second;
     }
-    windows.clear();
-}
 
-Application::State Application::getState()
-{
-    return state;
-}
+    Application::~Application()
+    {
+        for (auto it = windows.begin(); it != windows.end(); it++) {
+            delete it->second;
+        }
+        windows.clear();
+    }
 
-void Application::setState(State st)
-{
+    Application::State Application::getState()
+    {
+        return state;
+    }
+
+    void Application::setState(State st)
+    {
 #if DEBUG_APPLICATION_MANAGEMENT == 1
-    LOG_DEBUG("[%s] (%s) -> (%s)", GetName().c_str(), stateStr(state), stateStr(st));
+        LOG_DEBUG("[%s] (%s) -> (%s)", GetName().c_str(), stateStr(state), stateStr(st));
 #endif
-    state = st;
-}
+        state = st;
+    }
 
-void Application::TickHandler(uint32_t id)
-{
-    auto appTimer = std::find(appTimers.begin(), appTimers.end(), id);
-    if (appTimer != appTimers.end())
+    void Application::TickHandler(uint32_t id)
     {
-        appTimer->runCallback();
-    }
-    else{
-        LOG_ERROR("Requested timer doesn't exist here (ID: %s)\n", std::to_string(id).c_str()); // either timer was deleted or this id should not arrive.
-    }
-}
-
-void Application::DeleteTimer(AppTimer &timer)
-{
-    Service::DeleteTimer(timer.getID()); // remove the real FreeRTOS timer
-    auto timerOnTheList = std::find(appTimers.begin(), appTimers.end(), timer);
-    if (timerOnTheList != appTimers.end())
-    {
-        appTimers.erase(timerOnTheList);
-    }
-}
-
-[[deprecated("only for compatibility")]]
-void Application::DeleteTimer(uint32_t id)
-{
-    auto found = std::find(appTimers.begin(), appTimers.end(), id);
-    if (found != appTimers.end()){
-        DeleteTimer(*found);
-    }
-}
-
-void Application::longPressTimerCallback()
-{
-    // TODO if(check widget type long press trigger)
-    uint32_t time = xTaskGetTickCount();
-    if (keyTranslator->timeout(time))
-    {
-        // previous key press was over standard keypress timeout - send long press
-        gui::InputEvent iev = keyTranslator->translate(time);
-        messageInputEventApplication(this, this->GetName(), iev);
-        // clean previous key
-        keyTranslator->prev_key_press = {};
-    }
-}
-
-void Application::render( gui::RefreshModes mode ) {
-    if (getCurrentWindow() == nullptr)
-    {
-        LOG_ERROR("Current window is not defined");
-		return;
-    }
-
-    //send drawing commands only when if application is in active and visible.
-	if( state == State::ACTIVE_FORGROUND ) {
-        auto currwin = getCurrentWindow();
-        if (Store::Battery::get().state == Store::Battery::State::Charging)
-        {
-            currwin->batteryCharging(true);
+        auto appTimer = std::find(appTimers.begin(), appTimers.end(), id);
+        if (appTimer != appTimers.end()) {
+            appTimer->runCallback();
         }
-        else
-        {
-            currwin->updateBatteryLevel(Store::Battery::get().level);
-        }
-        currwin->setSIM();
-        currwin->updateSignalStrength();
-
-        std::list<gui::DrawCommand *> commandsList = currwin->buildDrawList();
-
-        if( shutdownInProgress ) {
-			auto msg = std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::SHUTDOWN );
-			sys::Bus::SendUnicast(msg, "ServiceGUI", this);
-		}
-		else if( suspendInProgress ) {
-			auto msg = std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::SUSPEND );
-			sys::Bus::SendUnicast(msg, "ServiceGUI", this);
-		}
-		else {
-			auto msg = std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::NORMAL );
-			sys::Bus::SendUnicast(msg, "ServiceGUI", this);
-		}
-	}
-
-	if( suspendInProgress )
-		suspendInProgress = false;
-}
-void Application::blockEvents(bool isBlocked ) {
-	acceptInput = isBlocked;
-}
-int Application::switchWindow( const std::string& windowName, gui::ShowMode cmd, std::unique_ptr<gui::SwitchData> data ) {
-
-	std::string window;
-#if DEBUG_APPLICATION_MANAGEMENT == 1
-    LOG_INFO("switching [%s] to window: %s data description: %s", GetName().c_str(),
-             windowName.length() ? windowName.c_str() : gui::name::window::main_window.c_str(), data ? data->getDescription().c_str() : "");
-#endif
-
-    //case to handle returning to previous application
-	if( windowName == "LastWindow" ) {
-        window = getCurrentWindow()->getName();
-        auto msg = std::make_shared<AppSwitchWindowMessage>(window, getCurrentWindow()->getName(), std::move(data), cmd);
-        sys::Bus::SendUnicast(msg, this->GetName(), this );
-	}
-	else {
-        window = windowName.empty() ? gui::name::window::main_window : windowName;
-        auto msg = std::make_shared<AppSwitchWindowMessage>(window, getCurrentWindow() ? getCurrentWindow()->getName() : "", std::move(data), cmd);
-        sys::Bus::SendUnicast(msg, this->GetName(), this );
-	}
-
-	return 0;
-}
-
-// TODO: this one seems to be unused
-int Application::switchBackWindow( const std::string& windowName, uint32_t cmd, std::unique_ptr<gui::SwitchData> data ) {
-	auto msg = std::make_shared<AppMessage>( MessageType::AppSwitchWindowBack );
-	sys::Bus::SendUnicast(msg, this->GetName(), this );
-
-	return 0;
-}
-int Application::refreshWindow(gui::RefreshModes mode) {
-	auto msg = std::make_shared<AppRefreshMessage>( mode );
-	sys::Bus::SendUnicast(msg, this->GetName(), this );
-
-	return 0;
-}
-
-bool Application::signalStrengthUpdateHandler()
-{
-    if ((state == State::ACTIVE_FORGROUND) && getCurrentWindow()->updateSignalStrength())
-    {
-        refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-    }
-
-    return true;
-}
-
-sys::Message_t Application::DataReceivedHandler(sys::DataMessage* msgl) {
-
-	bool handled = false;
-
-    auto msg = dynamic_cast<CellularNotificationMessage *>(msgl);
-    if (msg != nullptr && msg->type == CellularNotificationMessage::Type::SignalStrengthUpdate)
-    {
-        handled = signalStrengthUpdateHandler();
-    }
-    else if (msgl->messageType == MessageType::AppInputEvent)
-    {
-        AppInputEventMessage* msg = reinterpret_cast<AppInputEventMessage*>( msgl );
-        if (getCurrentWindow() != nullptr)
-            getCurrentWindow()->onInput(msg->getEvent());
-
-        //		LOG_INFO( "Key event :%s", msg->getEvent().to_string().c_str());
-		handled = true;
-    }
-    else if (msgl->messageType == MessageType::KBDKeyEvent)
-    {
-        if (this->getState() != app::Application::State::ACTIVE_FORGROUND)
-        {
-            LOG_FATAL("!!! Terrible terrible damage! application with no focus grabbed key!");
-        }
-        sevm::KbdMessage *msg = static_cast<sevm::KbdMessage *>(msgl);
-        gui::InputEvent iev = keyTranslator->translate(msg->key);
-        if(iev.keyCode != gui::KeyCode::KEY_UNDEFINED ) {
-            messageInputEventApplication( this, this->GetName(), iev );
-        }
-        handled = true;
-	}
-    else if (msgl->messageType == MessageType::EVMBatteryLevel)
-    {
-		sevm::BatteryLevelMessage* msg = static_cast<sevm::BatteryLevelMessage*>(msgl);
-		LOG_INFO("Application battery level: %d", msg->levelPercents );
-
-        if (getCurrentWindow()->updateBatteryLevel(msg->levelPercents))
-        {
-            refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-        }
-
-        handled = true;
-	}
-    else if (msgl->messageType == MessageType::EVMChargerPlugged)
-    {
-		sevm::BatteryPlugMessage* msg = static_cast<sevm::BatteryPlugMessage*>(msgl);
-		if(msg->plugged == true) {
-			LOG_INFO("Application charger connected" );
-            getCurrentWindow()->batteryCharging(true);
-            refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-        }
-		else {
-			//hide plug icon
-			LOG_INFO("Application charger disconnected" );
-            getCurrentWindow()->batteryCharging(false);
-            refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-        }
-
-		refreshWindow( gui::RefreshModes::GUI_REFRESH_FAST );
-		handled = true;
-	}
-    else if (msgl->messageType == MessageType::EVMMinuteUpdated)
-    {
-		sevm::RtcMinuteAlarmMessage* msg = static_cast<sevm::RtcMinuteAlarmMessage*>(msgl);
-		LOG_INFO("Application time updated");
-
-        getCurrentWindow()->updateTime(msg->timestamp, !settings.timeFormat12);
-
-        if( state == State::ACTIVE_FORGROUND )
-			refreshWindow( gui::RefreshModes::GUI_REFRESH_FAST );
-
-		handled = true;
-	}
-
-    else if (msgl->messageType == MessageType::AppSwitch)
-    {
-        LOG_DEBUG("AppSwitch");
-        AppSwitchMessage *msg = reinterpret_cast<AppSwitchMessage *>(msgl);
-        // Application is starting or it is in the background. Upon switch command if name if correct it goes foreground
-        if ((state == State::ACTIVATING) || (state == State::INITIALIZING) || (state == State::ACTIVE_BACKGROUND))
-        {
-
-            if( msg->getTargetApplicationName() == this->GetName()) {
-                setState(State::ACTIVE_FORGROUND);
-				if( sapm::ApplicationManager::messageConfirmSwitch(this) ) {
-                    LOG_INFO("%s : %s", msg->getTargetWindowName().c_str(), msg->getData() ? msg->getData()->getDescription().c_str() : "");
-                    switchWindow( msg->getTargetWindowName(), std::move( msg->getData()));
-					handled = true;
-				}
-				else {
-					//TODO send to itself message to close
-					LOG_ERROR("Failed to communicate ");
-				}
-			}
-			else {
-				LOG_ERROR("Received switch message outside of activation flow");
-			}
-        }
-        else if( state == State::ACTIVE_FORGROUND ) {
-			if( msg->getTargetApplicationName() == this->GetName()) {
-				//if window name and data are null pointers this is a message informing
-				//that application should go to background mode
-				if( (msg->getTargetWindowName() == "") && (msg->getData() == nullptr ) ) {
-                    setState(State::ACTIVE_BACKGROUND);
-					if( sapm::ApplicationManager::messageConfirmSwitch(this) ) {
-                        handled = true;
-					}
-					else {
-						//TODO send to itself message to close
-						LOG_ERROR("Failed to communicate ");
-					}
-				}
-				//if application is in front and receives message with defined window it should
-				//change to that window.
-				else {
-					switchWindow( msg->getTargetWindowName(), std::move( msg->getData()));
-					handled = true;
-				}
-			}
-			else {
-				LOG_ERROR("Received switch message outside of activation flow");
-			}
-		}
-		else {
-            LOG_ERROR("Wrong internal application %s switch to ACTIVE state form %s", msg->getTargetApplicationName().c_str(), stateStr(state));
+        else {
+            LOG_ERROR("Requested timer doesn't exist here (ID: %s)\n",
+                      std::to_string(id).c_str()); // either timer was deleted or this id should not arrive.
         }
     }
-    else if (msgl->messageType == MessageType::AppSwitchWindow)
+
+    void Application::DeleteTimer(AppTimer &timer)
     {
-        AppSwitchWindowMessage* msg = reinterpret_cast<AppSwitchWindowMessage*>( msgl );
-		//check if specified window is in the application
-		auto it = windows.find( msg->getWindowName() );
-		if( it != windows.end() ) {
+        Service::DeleteTimer(timer.getID()); // remove the real FreeRTOS timer
+        auto timerOnTheList = std::find(appTimers.begin(), appTimers.end(), timer);
+        if (timerOnTheList != appTimers.end()) {
+            appTimers.erase(timerOnTheList);
+        }
+    }
 
-			setActiveWindow( msg->getWindowName() );
+    [[deprecated("only for compatibility")]] void Application::DeleteTimer(uint32_t id)
+    {
+        auto found = std::find(appTimers.begin(), appTimers.end(), id);
+        if (found != appTimers.end()) {
+            DeleteTimer(*found);
+        }
+    }
 
-            getCurrentWindow()->handleSwitchData(msg->getData().get());
+    void Application::longPressTimerCallback()
+    {
+        // TODO if(check widget type long press trigger)
+        uint32_t time = xTaskGetTickCount();
+        if (keyTranslator->timeout(time)) {
+            // previous key press was over standard keypress timeout - send long press
+            gui::InputEvent iev = keyTranslator->translate(time);
+            messageInputEventApplication(this, this->GetName(), iev);
+            // clean previous key
+            keyTranslator->prev_key_press = {};
+        }
+    }
 
-            //check if this is case where application is returning to the last visible window.
-            if ((msg->getData() != nullptr) && (msg->LastSeenWindow)) {}
+    void Application::render(gui::RefreshModes mode)
+    {
+        if (getCurrentWindow() == nullptr) {
+            LOG_ERROR("Current window is not defined");
+            return;
+        }
+
+        // send drawing commands only when if application is in active and visible.
+        if (state == State::ACTIVE_FORGROUND) {
+            auto currwin = getCurrentWindow();
+            if (Store::Battery::get().state == Store::Battery::State::Charging) {
+                currwin->batteryCharging(true);
+            }
             else {
-                getCurrentWindow()->onBeforeShow(msg->getCommand(), msg->getData().get());
-                auto ret = dynamic_cast<gui::SwitchSpecialChar *>(msg->getData().get());
-                if (ret != nullptr && msg->getData() != nullptr)
-                {
-                    auto text = dynamic_cast<gui::Text *>(getCurrentWindow()->getFocusItem());
-                    if (text)
-                    {
-                        if (text->handleChar(ret->getDescription()[0]))
-                        {
-                            text->updateCursor();
+                currwin->updateBatteryLevel(Store::Battery::get().level);
+            }
+            currwin->setSIM();
+            currwin->updateSignalStrength();
+
+            std::list<gui::DrawCommand *> commandsList = currwin->buildDrawList();
+
+            if (shutdownInProgress) {
+                auto msg =
+                    std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::SHUTDOWN);
+                sys::Bus::SendUnicast(msg, "ServiceGUI", this);
+            }
+            else if (suspendInProgress) {
+                auto msg =
+                    std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::SUSPEND);
+                sys::Bus::SendUnicast(msg, "ServiceGUI", this);
+            }
+            else {
+                auto msg =
+                    std::make_shared<sgui::DrawMessage>(commandsList, mode, sgui::DrawMessage::DrawCommand::NORMAL);
+                sys::Bus::SendUnicast(msg, "ServiceGUI", this);
+            }
+        }
+
+        if (suspendInProgress)
+            suspendInProgress = false;
+    }
+    void Application::blockEvents(bool isBlocked)
+    {
+        acceptInput = isBlocked;
+    }
+    int Application::switchWindow(const std::string &windowName,
+                                  gui::ShowMode cmd,
+                                  std::unique_ptr<gui::SwitchData> data)
+    {
+
+        std::string window;
+#if DEBUG_APPLICATION_MANAGEMENT == 1
+        LOG_INFO("switching [%s] to window: %s data description: %s",
+                 GetName().c_str(),
+                 windowName.length() ? windowName.c_str() : gui::name::window::main_window.c_str(),
+                 data ? data->getDescription().c_str() : "");
+#endif
+
+        // case to handle returning to previous application
+        if (windowName == "LastWindow") {
+            window = getCurrentWindow()->getName();
+            auto msg =
+                std::make_shared<AppSwitchWindowMessage>(window, getCurrentWindow()->getName(), std::move(data), cmd);
+            sys::Bus::SendUnicast(msg, this->GetName(), this);
+        }
+        else {
+            window   = windowName.empty() ? gui::name::window::main_window : windowName;
+            auto msg = std::make_shared<AppSwitchWindowMessage>(
+                window, getCurrentWindow() ? getCurrentWindow()->getName() : "", std::move(data), cmd);
+            sys::Bus::SendUnicast(msg, this->GetName(), this);
+        }
+
+        return 0;
+    }
+
+    // TODO: this one seems to be unused
+    int Application::switchBackWindow(const std::string &windowName,
+                                      uint32_t cmd,
+                                      std::unique_ptr<gui::SwitchData> data)
+    {
+        auto msg = std::make_shared<AppMessage>(MessageType::AppSwitchWindowBack);
+        sys::Bus::SendUnicast(msg, this->GetName(), this);
+
+        return 0;
+    }
+    int Application::refreshWindow(gui::RefreshModes mode)
+    {
+        auto msg = std::make_shared<AppRefreshMessage>(mode);
+        sys::Bus::SendUnicast(msg, this->GetName(), this);
+
+        return 0;
+    }
+
+    bool Application::signalStrengthUpdateHandler()
+    {
+        if ((state == State::ACTIVE_FORGROUND) && getCurrentWindow()->updateSignalStrength()) {
+            refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+        }
+
+        return true;
+    }
+
+    sys::Message_t Application::DataReceivedHandler(sys::DataMessage *msgl)
+    {
+
+        bool handled = false;
+
+        auto msg = dynamic_cast<CellularNotificationMessage *>(msgl);
+        if (msg != nullptr && msg->type == CellularNotificationMessage::Type::SignalStrengthUpdate) {
+            handled = signalStrengthUpdateHandler();
+        }
+        else if (msgl->messageType == MessageType::AppInputEvent) {
+            AppInputEventMessage *msg = reinterpret_cast<AppInputEventMessage *>(msgl);
+            if (getCurrentWindow() != nullptr)
+                getCurrentWindow()->onInput(msg->getEvent());
+
+            //		LOG_INFO( "Key event :%s", msg->getEvent().to_string().c_str());
+            handled = true;
+        }
+        else if (msgl->messageType == MessageType::KBDKeyEvent) {
+            if (this->getState() != app::Application::State::ACTIVE_FORGROUND) {
+                LOG_FATAL("!!! Terrible terrible damage! application with no focus grabbed key!");
+            }
+            sevm::KbdMessage *msg = static_cast<sevm::KbdMessage *>(msgl);
+            gui::InputEvent iev   = keyTranslator->translate(msg->key);
+            if (iev.keyCode != gui::KeyCode::KEY_UNDEFINED) {
+                messageInputEventApplication(this, this->GetName(), iev);
+            }
+            handled = true;
+        }
+        else if (msgl->messageType == MessageType::EVMBatteryLevel) {
+            sevm::BatteryLevelMessage *msg = static_cast<sevm::BatteryLevelMessage *>(msgl);
+            LOG_INFO("Application battery level: %d", msg->levelPercents);
+
+            if (getCurrentWindow()->updateBatteryLevel(msg->levelPercents)) {
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            }
+
+            handled = true;
+        }
+        else if (msgl->messageType == MessageType::EVMChargerPlugged) {
+            sevm::BatteryPlugMessage *msg = static_cast<sevm::BatteryPlugMessage *>(msgl);
+            if (msg->plugged == true) {
+                LOG_INFO("Application charger connected");
+                getCurrentWindow()->batteryCharging(true);
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            }
+            else {
+                // hide plug icon
+                LOG_INFO("Application charger disconnected");
+                getCurrentWindow()->batteryCharging(false);
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            }
+
+            refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            handled = true;
+        }
+        else if (msgl->messageType == MessageType::EVMMinuteUpdated) {
+            sevm::RtcMinuteAlarmMessage *msg = static_cast<sevm::RtcMinuteAlarmMessage *>(msgl);
+            LOG_INFO("Application time updated");
+
+            getCurrentWindow()->updateTime(msg->timestamp, !settings.timeFormat12);
+
+            if (state == State::ACTIVE_FORGROUND)
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+
+            handled = true;
+        }
+
+        else if (msgl->messageType == MessageType::AppSwitch) {
+            LOG_DEBUG("AppSwitch");
+            AppSwitchMessage *msg = reinterpret_cast<AppSwitchMessage *>(msgl);
+            // Application is starting or it is in the background. Upon switch command if name if correct it goes
+            // foreground
+            if ((state == State::ACTIVATING) || (state == State::INITIALIZING) || (state == State::ACTIVE_BACKGROUND)) {
+
+                if (msg->getTargetApplicationName() == this->GetName()) {
+                    setState(State::ACTIVE_FORGROUND);
+                    if (sapm::ApplicationManager::messageConfirmSwitch(this)) {
+                        LOG_INFO("%s : %s",
+                                 msg->getTargetWindowName().c_str(),
+                                 msg->getData() ? msg->getData()->getDescription().c_str() : "");
+                        switchWindow(msg->getTargetWindowName(), std::move(msg->getData()));
+                        handled = true;
+                    }
+                    else {
+                        // TODO send to itself message to close
+                        LOG_ERROR("Failed to communicate ");
+                    }
+                }
+                else {
+                    LOG_ERROR("Received switch message outside of activation flow");
+                }
+            }
+            else if (state == State::ACTIVE_FORGROUND) {
+                if (msg->getTargetApplicationName() == this->GetName()) {
+                    // if window name and data are null pointers this is a message informing
+                    // that application should go to background mode
+                    if ((msg->getTargetWindowName() == "") && (msg->getData() == nullptr)) {
+                        setState(State::ACTIVE_BACKGROUND);
+                        if (sapm::ApplicationManager::messageConfirmSwitch(this)) {
+                            handled = true;
+                        }
+                        else {
+                            // TODO send to itself message to close
+                            LOG_ERROR("Failed to communicate ");
+                        }
+                    }
+                    // if application is in front and receives message with defined window it should
+                    // change to that window.
+                    else {
+                        switchWindow(msg->getTargetWindowName(), std::move(msg->getData()));
+                        handled = true;
+                    }
+                }
+                else {
+                    LOG_ERROR("Received switch message outside of activation flow");
+                }
+            }
+            else {
+                LOG_ERROR("Wrong internal application %s switch to ACTIVE state form %s",
+                          msg->getTargetApplicationName().c_str(),
+                          stateStr(state));
+            }
+        }
+        else if (msgl->messageType == MessageType::AppSwitchWindow) {
+            AppSwitchWindowMessage *msg = reinterpret_cast<AppSwitchWindowMessage *>(msgl);
+            // check if specified window is in the application
+            auto it = windows.find(msg->getWindowName());
+            if (it != windows.end()) {
+
+                setActiveWindow(msg->getWindowName());
+
+                getCurrentWindow()->handleSwitchData(msg->getData().get());
+
+                // check if this is case where application is returning to the last visible window.
+                if ((msg->getData() != nullptr) && (msg->LastSeenWindow)) {}
+                else {
+                    getCurrentWindow()->onBeforeShow(msg->getCommand(), msg->getData().get());
+                    auto ret = dynamic_cast<gui::SwitchSpecialChar *>(msg->getData().get());
+                    if (ret != nullptr && msg->getData() != nullptr) {
+                        auto text = dynamic_cast<gui::Text *>(getCurrentWindow()->getFocusItem());
+                        if (text) {
+                            if (text->handleChar(ret->getDescription()[0])) {
+                                text->updateCursor();
+                            }
                         }
                     }
                 }
-            }
 
-			refreshWindow( gui::RefreshModes::GUI_REFRESH_DEEP );
-        }
-        else
-        {
-            LOG_ERROR("No such window: %s", msg->getWindowName().c_str());
-        }
-        handled = true;
-    }
-
-    else if (msgl->messageType == MessageType::AppClose)
-    {
-        setState(State::DEACTIVATING);
-        sapm::ApplicationManager::messageConfirmClose(this);
-		//here should go all the cleaning
-		handled = true;
-    }
-    else if (msgl->messageType == MessageType::AppRebuild)
-    {
-
-        LOG_INFO("Application %s rebuilding gui", GetName().c_str() );
-		//for all windows call rebuild method
-        for (auto it = windows.begin(); it != windows.end(); it++)
-        {
-            LOG_DEBUG("Rebuild: %s", it->first.c_str());
-            if (!it->second)
-            {
-                LOG_ERROR("NO SUCH WINDOW");
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
             }
-            else
-            {
-                it->second->rebuild();
+            else {
+                LOG_ERROR("No such window: %s", msg->getWindowName().c_str());
             }
+            handled = true;
         }
-        //if application has focus call deep refresh
-        LOG_INFO("Refresh app with focus!");
-        if (state == State::ACTIVE_FORGROUND)
-        {
+
+        else if (msgl->messageType == MessageType::AppClose) {
+            setState(State::DEACTIVATING);
+            sapm::ApplicationManager::messageConfirmClose(this);
+            // here should go all the cleaning
+            handled = true;
+        }
+        else if (msgl->messageType == MessageType::AppRebuild) {
+
+            LOG_INFO("Application %s rebuilding gui", GetName().c_str());
+            // for all windows call rebuild method
+            for (auto it = windows.begin(); it != windows.end(); it++) {
+                LOG_DEBUG("Rebuild: %s", it->first.c_str());
+                if (!it->second) {
+                    LOG_ERROR("NO SUCH WINDOW");
+                }
+                else {
+                    it->second->rebuild();
+                }
+            }
+            // if application has focus call deep refresh
+            LOG_INFO("Refresh app with focus!");
+            if (state == State::ACTIVE_FORGROUND) {
+                refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
+            }
+            handled = true;
+            LOG_INFO("App rebuild done");
+        }
+        else if (msgl->messageType == MessageType::AppRefresh) {
+            AppRefreshMessage *msg = reinterpret_cast<AppRefreshMessage *>(msgl);
+            // getCurrentWindow()->onBeforeShow( gui::ShowMode::GUI_SHOW_RETURN, 0, nullptr );
+            render(msg->getMode());
+            handled = true;
+        }
+        else if (dynamic_cast<sevm::SIMMessage *>(msgl) != nullptr) {
+            getCurrentWindow()->setSIM();
             refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
         }
-        handled = true;
-        LOG_INFO("App rebuild done");
-    }
-    else if (msgl->messageType == MessageType::AppRefresh)
-    {
-        AppRefreshMessage* msg = reinterpret_cast<AppRefreshMessage*>( msgl );
-        // getCurrentWindow()->onBeforeShow( gui::ShowMode::GUI_SHOW_RETURN, 0, nullptr );
-        render( msg->getMode() );
-		handled = true;
-	}
-    else if (dynamic_cast<sevm::SIMMessage *>(msgl) != nullptr)
-    {
-        getCurrentWindow()->setSIM();
-        refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
+
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
     }
 
-    if (handled)
-        return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
-
-sys::ReturnCodes Application::InitHandler() {
-	bool initState= true;
-	setState(State::INITIALIZING);
-//	uint32_t start = xTaskGetTickCount();
-	settings = DBServiceAPI::SettingsGet(this);
-//	uint32_t stop = xTaskGetTickCount();
-//	LOG_INFO("DBServiceAPI::SettingsGet %d", stop-start);
-	initState = (settings.dbID == 1);
-
-	//send response to application manager true if successful, false otherwise.
-	sapm::ApplicationManager::messageRegisterApplication( this, initState, startBackground );
-	sys::ReturnCodes retCode = (initState?sys::ReturnCodes::Success:sys::ReturnCodes::Failure);
-	return retCode;
-}
-
-void Application::setActiveWindow(const std::string &windowName)
-{
-    pushWindow(windowName);
-    acceptInput = true;
-}
-
-bool Application::messageSwitchApplication( sys::Service* sender, std::string application, std::string window, std::unique_ptr<gui::SwitchData> data ) {
-	auto msg = std::make_shared<AppSwitchMessage>( application, window, std::move(data) );
-	sys::Bus::SendUnicast(msg, application, sender );
-    return true;
-}
-
-bool Application::messageRefreshApplication( sys::Service* sender, std::string application, std::string window, gui::SwitchData* data ) {
-	auto msg = std::make_shared<AppMessage>( MessageType::AppRefresh );
-	sys::Bus::SendUnicast(msg, application, sender  );
-	return true;
-}
-
-bool Application::messageCloseApplication( sys::Service* sender, std::string application ) {
-
-	auto msg = std::make_shared<AppMessage>( MessageType::AppClose );
-	sys::Bus::SendUnicast(msg, application, sender  );
-	return true;
-}
-
-bool Application::messageRebuildApplication( sys::Service* sender, std::string application ) {
-	auto msg = std::make_shared<AppRebuildMessage>();
-	sys::Bus::SendUnicast(msg, application, sender  );
-	return true;
-}
-
-bool Application::messageInputEventApplication( sys::Service* sender, std::string application , const gui::InputEvent& event ) {
-	auto msg = std::make_shared<AppInputEventMessage>( event );
-	sys::Bus::SendUnicast(msg, application, sender );
-	return true;
-}
-
-bool Application::popToWindow(const std::string &window)
-{
-    auto ret = std::find(windowStack.begin(), windowStack.end(), window);
-    if (ret != windowStack.end())
+    sys::ReturnCodes Application::InitHandler()
     {
-        LOG_INFO("Pop last window(s) : %d! %s", std::distance(ret, windowStack.end()), ret->c_str());
-        windowStack.erase(std::next(ret), windowStack.end());
+        bool initState = true;
+        setState(State::INITIALIZING);
+        //	uint32_t start = xTaskGetTickCount();
+        settings = DBServiceAPI::SettingsGet(this);
+        //	uint32_t stop = xTaskGetTickCount();
+        //	LOG_INFO("DBServiceAPI::SettingsGet %d", stop-start);
+        initState = (settings.dbID == 1);
+
+        // send response to application manager true if successful, false otherwise.
+        sapm::ApplicationManager::messageRegisterApplication(this, initState, startBackground);
+        sys::ReturnCodes retCode = (initState ? sys::ReturnCodes::Success : sys::ReturnCodes::Failure);
+        return retCode;
+    }
+
+    void Application::setActiveWindow(const std::string &windowName)
+    {
+        pushWindow(windowName);
+        acceptInput = true;
+    }
+
+    bool Application::messageSwitchApplication(sys::Service *sender,
+                                               std::string application,
+                                               std::string window,
+                                               std::unique_ptr<gui::SwitchData> data)
+    {
+        auto msg = std::make_shared<AppSwitchMessage>(application, window, std::move(data));
+        sys::Bus::SendUnicast(msg, application, sender);
         return true;
     }
-    return false;
-}
 
-void Application::pushWindow(const std::string &newWindow)
-{
-    // handle if window was already on
-    if (popToWindow(newWindow))
+    bool Application::messageRefreshApplication(sys::Service *sender,
+                                                std::string application,
+                                                std::string window,
+                                                gui::SwitchData *data)
     {
-        return;
+        auto msg = std::make_shared<AppMessage>(MessageType::AppRefresh);
+        sys::Bus::SendUnicast(msg, application, sender);
+        return true;
     }
-    else
+
+    bool Application::messageCloseApplication(sys::Service *sender, std::string application)
     {
-        windowStack.push_back(newWindow);
+
+        auto msg = std::make_shared<AppMessage>(MessageType::AppClose);
+        sys::Bus::SendUnicast(msg, application, sender);
+        return true;
     }
+
+    bool Application::messageRebuildApplication(sys::Service *sender, std::string application)
+    {
+        auto msg = std::make_shared<AppRebuildMessage>();
+        sys::Bus::SendUnicast(msg, application, sender);
+        return true;
+    }
+
+    bool Application::messageInputEventApplication(sys::Service *sender,
+                                                   std::string application,
+                                                   const gui::InputEvent &event)
+    {
+        auto msg = std::make_shared<AppInputEventMessage>(event);
+        sys::Bus::SendUnicast(msg, application, sender);
+        return true;
+    }
+
+    bool Application::popToWindow(const std::string &window)
+    {
+        auto ret = std::find(windowStack.begin(), windowStack.end(), window);
+        if (ret != windowStack.end()) {
+            LOG_INFO("Pop last window(s) : %d! %s", std::distance(ret, windowStack.end()), ret->c_str());
+            windowStack.erase(std::next(ret), windowStack.end());
+            return true;
+        }
+        return false;
+    }
+
+    void Application::pushWindow(const std::string &newWindow)
+    {
+        // handle if window was already on
+        if (popToWindow(newWindow)) {
+            return;
+        }
+        else {
+            windowStack.push_back(newWindow);
+        }
 #if DEBUG_APPLICATION_MANAGEMENT == 1
-    LOG_DEBUG("[%d] newWindow: %s", windowStack.size(), newWindow.c_str());
-    for (auto &el : windowStack)
-    {
-        LOG_DEBUG("-> %s", el.c_str());
-    }
-    LOG_INFO("\n\n");
+        LOG_DEBUG("[%d] newWindow: %s", windowStack.size(), newWindow.c_str());
+        for (auto &el : windowStack) {
+            LOG_DEBUG("-> %s", el.c_str());
+        }
+        LOG_INFO("\n\n");
 #endif
-};
+    };
 
-const std::string Application::getPrevWindow() const
-{
-    if (this->windowStack.size() <= 1)
+    const std::string Application::getPrevWindow() const
     {
-        return gui::name::window::no_window;
-    }
-    return *std::prev(windowStack.end(), 2);
-}
-
-void Application::Application::cleanPrevWindw()
-{
-    this->windowStack.clear();
-}
-
-gui::AppWindow *Application::getWindow(const std::string &window)
-{
-    auto it = windows.find(window);
-    if (it != windows.end())
-    {
-        return it->second;
-    }
-    return nullptr;
-}
-
-gui::AppWindow *Application::getCurrentWindow()
-{
-    std::string window = "";
-    if (windowStack.size() == 0)
-    {
-        window = gui::name::window::main_window;
-    }
-    else
-    {
-        window = windowStack.back();
+        if (this->windowStack.size() <= 1) {
+            return gui::name::window::no_window;
+        }
+        return *std::prev(windowStack.end(), 2);
     }
 
-    return getWindow(window);
-}
-
-
-AppTimer Application::CreateAppTimer(TickType_t interval, bool isPeriodic, std::function<void()> callback, const std::string &name)
-{
-    auto id = CreateTimer(interval, isPeriodic, name);
-    auto timer = AppTimer(this, id, callback, name);
-    appTimers.push_back(timer);
-    return timer; // return ptr to the timer on the list
-}
-
-AppTimer::AppTimer(Application * parent, uint32_t id, std::function<void()> callback, const std::string &name) : parent(parent)
-{
-    this->id = id;
-    registerCallback(callback);
-}
-AppTimer::AppTimer() = default;
-
-AppTimer::~AppTimer()
-{
-    callback = nullptr;
-}
-
-void AppTimer::registerCallback(std::function<void()> callback)
-{
-    this->callback = callback;
-}
-void AppTimer::runCallback()
-{
-    callback();
-}
-uint32_t AppTimer::getID()
-{
-    return id;
-}
-void AppTimer::stop()
-{
-    if (parent)
+    void Application::Application::cleanPrevWindw()
     {
-        parent->stopTimer(getID());
+        this->windowStack.clear();
     }
-}
-void AppTimer::restart()
-{
-    if (parent)
+
+    gui::AppWindow *Application::getWindow(const std::string &window)
     {
-        parent->ReloadTimer(getID());
+        auto it = windows.find(window);
+        if (it != windows.end()) {
+            return it->second;
+        }
+        return nullptr;
+    }
+
+    gui::AppWindow *Application::getCurrentWindow()
+    {
+        std::string window = "";
+        if (windowStack.size() == 0) {
+            window = gui::name::window::main_window;
+        }
+        else {
+            window = windowStack.back();
+        }
+
+        return getWindow(window);
+    }
+
+    AppTimer Application::CreateAppTimer(TickType_t interval,
+                                         bool isPeriodic,
+                                         std::function<void()> callback,
+                                         const std::string &name)
+    {
+        auto id    = CreateTimer(interval, isPeriodic, name);
+        auto timer = AppTimer(this, id, callback, name);
+        appTimers.push_back(timer);
+        return timer; // return ptr to the timer on the list
+    }
+
+    AppTimer::AppTimer(Application *parent, uint32_t id, std::function<void()> callback, const std::string &name)
+        : parent(parent)
+    {
+        this->id = id;
+        registerCallback(callback);
+    }
+    AppTimer::AppTimer() = default;
+
+    AppTimer::~AppTimer()
+    {
+        callback = nullptr;
+    }
+
+    void AppTimer::registerCallback(std::function<void()> callback)
+    {
+        this->callback = callback;
+    }
+    void AppTimer::runCallback()
+    {
+        callback();
+    }
+    uint32_t AppTimer::getID()
+    {
+        return id;
+    }
+    void AppTimer::stop()
+    {
+        if (parent) {
+            parent->stopTimer(getID());
+        }
+    }
+    void AppTimer::restart()
+    {
+        if (parent) {
+            parent->ReloadTimer(getID());
+        }
+    }
+    bool AppTimer::operator==(const AppTimer &rhs) const
+    {
+        return this->id == rhs.id;
+    }
+    bool AppTimer::operator==(const uint32_t &rhs) const
+    {
+        return this->id == rhs;
     }
-}
-bool AppTimer::operator==(const AppTimer &rhs) const
-{
-    return this->id == rhs.id;
-}
-bool AppTimer::operator==(const uint32_t &rhs) const
-{
-    return this->id == rhs;
-}
 } /* namespace app */
diff --git a/module-apps/Application.hpp b/module-apps/Application.hpp
index 3fb180098..a575110d8 100644
--- a/module-apps/Application.hpp
+++ b/module-apps/Application.hpp
@@ -10,309 +10,348 @@
 #define MODULE_APPS_APPLICATION_HPP_
 
 #include <map>
-//module-gui
+// module-gui
 #include "gui/Common.hpp"
 //#include "gui/widgets/Window.hpp"
 #include "gui/input/Translator.hpp"
-//module-sys
+// module-sys
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
 #include "Service/Common.hpp"
 #include "SystemManager/SystemManager.hpp"
-//module-db
+// module-db
 #include "Interface/SettingsRecord.hpp"
 
 #include "SwitchData.hpp"
 #include "service-cellular/api/CellularServiceAPI.hpp"
 #include "windows/AppWindow.hpp"
 
-namespace gui {
-	class AppWindow;
-};
-
-namespace app {
-
-class Application;
-
-class AppTimer // this should inherit from ServiceTimer, but *bodge*
+namespace gui
 {
-  private:
-    uint32_t id = 0; // let's say 0 indicates not initalized timer
-    std::function <void ()> callback = nullptr;
-    Application *parent = nullptr;
-
-    void registerCallback( std::function<void ()> );
-    AppTimer();
-
-  public:
-    AppTimer(Application * parent, uint32_t id, std::function<void()> callback, const std::string &name);
-    ~AppTimer();
-    void runCallback();
-    uint32_t getID();
-    static uint32_t getNextUniqueID();
-    // timer controls:
-    void restart();
-    void stop();
-    bool operator==(const AppTimer &rhs) const;
-    bool operator==(const uint32_t &rhs) const;
+    class AppWindow;
 };
 
-/// This is template for creating new applications. Main difference between Application and service is that:
-/// 1. Application has access to GUI and Input
-/// 2. Application lifetime is managed with sapm::ApplicationManager
-class Application: public sys::Service {
-  public:
-    /// state in which application is right now
-    /// @note do not mistake with application manager state
-    enum class State
+namespace app
+{
+
+    class Application;
+
+    class AppTimer // this should inherit from ServiceTimer, but *bodge*
     {
-        /// Application doesn't exist
-        NONE,
-        /// Application: Object has been created and underlying service is waiting to execute init handler method.
-        /// Application Manager: Launcher for the application has been provided. Application can be started using provided launcher. The other possibility
-        /// is that Appication Manager received CLOSING_FINISHED message.
-        DEACTIVATED,
-        /// Application: Set after entering the init handler of the application. In this state application will request
-        /// in a blocking way the db configuration of the phone. Before exiting the init handler application must send APP_REGISTER message to
-        /// Application Manager.
-        /// Application Manager: Initialization is triggered by the switch message sent by other application to the application manager.
-        /// Launcher for the application has been executed upon receiving switch command. Optional switch data has been
-        /// saved and it will be provided when application manager receives registration message.
-        INITIALIZING,
-        /// Application manager sent variant of switch command to the selected application and it's now waiting for confirmation
-        /// from the application
-        ACTIVATING,
-        /// Application is working and has focus and can render
-        ACTIVE_FORGROUND,
-        /// Applicatino lost focus but it is still working
-        ACTIVE_BACKGROUND,
-        /// Application: Close request message has been received. As a response application must send close request acknowledge message.
-        /// Application must start closing all workers and releasing resources. After all workers are closed and resources released application
-        /// sends to application manager CLOSING_FINISHED message
-        /// Application Manager sent signal to application that it should be closed. Application must perform all necessary cleanup
-        /// and request System Manager to close it.
-        DEACTIVATING
-    };
-    /// c_str() function for Application::State
-    static const char *stateStr(State st);
+      private:
+        uint32_t id                    = 0; // let's say 0 indicates not initalized timer
+        std::function<void()> callback = nullptr;
+        Application *parent            = nullptr;
 
-  private:
-    State state = State::DEACTIVATED;
+        void registerCallback(std::function<void()>);
+        AppTimer();
 
-    bool signalStrengthUpdateHandler();
-
-  public:
-	std::list<uint32_t> timerIDs;
-	std::list <AppTimer> appTimers; // @TODO decide on type
-    AppTimer longPressTimer;
-    Application(std::string name, std::string parent="", bool startBackground = false, uint32_t stackDepth=4096,
-	        sys::ServicePriority priority=sys::ServicePriority::Idle);
-	virtual ~Application();
-
-    Application::State getState();
-    void setState(State st);
-
-    /// @defgroup AppTimers Application timers
-    /// @note Please mind that timers are from Service and implementation in service should be revritten to send notify instead of calling callback
-    ///       Right now timers can create races.
-    /// @{
-    /// Method to register callback function to be run on timer.
-    AppTimer CreateAppTimer(TickType_t interval, bool isPeriodic, std::function<void()> callback, const std::string &name = "");
-    /// Remove previousy registered AppTimer by object
-    void DeleteTimer(AppTimer &timer);
-    /// Remove previousy registered AppTimer by id
-    void DeleteTimer(uint32_t id);
-    /// @}
-
-    /// Method responsible for rendering currently active window.
-    /// 1. queries for static data for all windows form Store (i.e. battery level, sim card level)
-    /// 2. loads rendering commands and send them to GUI renderer (sgui::ServiceGUI)
-    void render(gui::RefreshModes mode);
-
-    /// Method responsible for setting application to the state where incoming user input is blocked
-    void blockEvents(bool isBlocked);
-
-    /// Method sending switch command for another window. It will switch window within active application.
-    /// to switch windows between applications use sapm::ApplicationManager::messageSwitchApplication
-    /// it will effectivelly trigger setActiveWindow and change on windows stack
-    int switchWindow(const std::string &windowName, gui::ShowMode cmd = gui::ShowMode::GUI_SHOW_INIT, std::unique_ptr<gui::SwitchData> data = nullptr);
-
-    /// Same as switchWindow above
-    inline auto switchWindow(const std::string &windowName, std::unique_ptr<gui::SwitchData> data)
-    {
-        return switchWindow( windowName, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+      public:
+        AppTimer(Application *parent, uint32_t id, std::function<void()> callback, const std::string &name);
+        ~AppTimer();
+        void runCallback();
+        uint32_t getID();
+        static uint32_t getNextUniqueID();
+        // timer controls:
+        void restart();
+        void stop();
+        bool operator==(const AppTimer &rhs) const;
+        bool operator==(const uint32_t &rhs) const;
     };
 
-    /// Metod sendind switch command for previous window on windows stack.
-    int switchBackWindow(const std::string &windowName, uint32_t cmd, std::unique_ptr<gui::SwitchData> data);
-
-    /// Method refreshing active window
-    int refreshWindow(gui::RefreshModes mode);
-
-    /// Mehtod to handle bus messages, all message types are defined in Message.hpp
-    /// Message types are in MessageType
-    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl);
-
-    /// initialization function
-    /// 1. it has to be called for each and every application instance, it registeres application in ApplicationManager
-    ///    and notify ApplicationManager that it's in Initialization state
-    /// 2. It gets settings from database
-    sys::ReturnCodes InitHandler() override;
-
-    /// function to set active window for application
-    /// if none window is selected main window is used
-    /// if window name is "LastWindow" then previous window is selected
-    /// it modifies windows stack
-    void setActiveWindow(const std::string &windowName);
-
-    /// getter for settings record
-    SettingsRecord &getSettings()
+    /// This is template for creating new applications. Main difference between Application and service is that:
+    /// 1. Application has access to GUI and Input
+    /// 2. Application lifetime is managed with sapm::ApplicationManager
+    class Application : public sys::Service
     {
-        return settings;
+      public:
+        /// state in which application is right now
+        /// @note do not mistake with application manager state
+        enum class State
+        {
+            /// Application doesn't exist
+            NONE,
+            /// Application: Object has been created and underlying service is waiting to execute init handler method.
+            /// Application Manager: Launcher for the application has been provided. Application can be started using
+            /// provided launcher. The other possibility is that Appication Manager received CLOSING_FINISHED message.
+            DEACTIVATED,
+            /// Application: Set after entering the init handler of the application. In this state application will
+            /// request in a blocking way the db configuration of the phone. Before exiting the init handler application
+            /// must send APP_REGISTER message to Application Manager. Application Manager: Initialization is triggered
+            /// by the switch message sent by other application to the application manager. Launcher for the application
+            /// has been executed upon receiving switch command. Optional switch data has been saved and it will be
+            /// provided when application manager receives registration message.
+            INITIALIZING,
+            /// Application manager sent variant of switch command to the selected application and it's now waiting for
+            /// confirmation from the application
+            ACTIVATING,
+            /// Application is working and has focus and can render
+            ACTIVE_FORGROUND,
+            /// Applicatino lost focus but it is still working
+            ACTIVE_BACKGROUND,
+            /// Application: Close request message has been received. As a response application must send close request
+            /// acknowledge message. Application must start closing all workers and releasing resources. After all
+            /// workers are closed and resources released application sends to application manager CLOSING_FINISHED
+            /// message Application Manager sent signal to application that it should be closed. Application must
+            /// perform all necessary cleanup and request System Manager to close it.
+            DEACTIVATING
+        };
+        /// c_str() function for Application::State
+        static const char *stateStr(State st);
+
+      private:
+        State state = State::DEACTIVATED;
+
+        bool signalStrengthUpdateHandler();
+
+      public:
+        std::list<uint32_t> timerIDs;
+        std::list<AppTimer> appTimers; // @TODO decide on type
+        AppTimer longPressTimer;
+        Application(std::string name,
+                    std::string parent            = "",
+                    bool startBackground          = false,
+                    uint32_t stackDepth           = 4096,
+                    sys::ServicePriority priority = sys::ServicePriority::Idle);
+        virtual ~Application();
+
+        Application::State getState();
+        void setState(State st);
+
+        /// @defgroup AppTimers Application timers
+        /// @note Please mind that timers are from Service and implementation in service should be revritten to send
+        /// notify instead of calling callback
+        ///       Right now timers can create races.
+        /// @{
+        /// Method to register callback function to be run on timer.
+        AppTimer CreateAppTimer(TickType_t interval,
+                                bool isPeriodic,
+                                std::function<void()> callback,
+                                const std::string &name = "");
+        /// Remove previousy registered AppTimer by object
+        void DeleteTimer(AppTimer &timer);
+        /// Remove previousy registered AppTimer by id
+        void DeleteTimer(uint32_t id);
+        /// @}
+
+        /// Method responsible for rendering currently active window.
+        /// 1. queries for static data for all windows form Store (i.e. battery level, sim card level)
+        /// 2. loads rendering commands and send them to GUI renderer (sgui::ServiceGUI)
+        void render(gui::RefreshModes mode);
+
+        /// Method responsible for setting application to the state where incoming user input is blocked
+        void blockEvents(bool isBlocked);
+
+        /// Method sending switch command for another window. It will switch window within active application.
+        /// to switch windows between applications use sapm::ApplicationManager::messageSwitchApplication
+        /// it will effectivelly trigger setActiveWindow and change on windows stack
+        int switchWindow(const std::string &windowName,
+                         gui::ShowMode cmd                     = gui::ShowMode::GUI_SHOW_INIT,
+                         std::unique_ptr<gui::SwitchData> data = nullptr);
+
+        /// Same as switchWindow above
+        inline auto switchWindow(const std::string &windowName, std::unique_ptr<gui::SwitchData> data)
+        {
+            return switchWindow(windowName, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+        };
+
+        /// Metod sendind switch command for previous window on windows stack.
+        int switchBackWindow(const std::string &windowName, uint32_t cmd, std::unique_ptr<gui::SwitchData> data);
+
+        /// Method refreshing active window
+        int refreshWindow(gui::RefreshModes mode);
+
+        /// Mehtod to handle bus messages, all message types are defined in Message.hpp
+        /// Message types are in MessageType
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl);
+
+        /// initialization function
+        /// 1. it has to be called for each and every application instance, it registeres application in
+        /// ApplicationManager
+        ///    and notify ApplicationManager that it's in Initialization state
+        /// 2. It gets settings from database
+        sys::ReturnCodes InitHandler() override;
+
+        /// function to set active window for application
+        /// if none window is selected main window is used
+        /// if window name is "LastWindow" then previous window is selected
+        /// it modifies windows stack
+        void setActiveWindow(const std::string &windowName);
+
+        /// getter for settings record
+        SettingsRecord &getSettings()
+        {
+            return settings;
+        }
+
+        /// see suspendInProgress documentation
+        virtual void setSuspendFlag(bool val)
+        {
+            suspendInProgress = val;
+        };
+        /// see shutdownInProgress documentation
+        virtual void setShutdownFlag()
+        {
+            shutdownInProgress = true;
+        };
+
+        /// @defgroup Application Application static functions
+        /// All this functions are meant to be used in ApplicationManager only
+        /// @note consider moving these as private elements of ApplicationManager i.e. under names
+        /// message::switchApplication etc.
+        /// @{
+        static bool messageSwitchApplication(sys::Service *sender,
+                                             std::string application,
+                                             std::string window,
+                                             std::unique_ptr<gui::SwitchData> data);
+        static bool messageRefreshApplication(sys::Service *sender,
+                                              std::string application,
+                                              std::string window,
+                                              gui::SwitchData *data = nullptr);
+        static bool messageCloseApplication(sys::Service *sender, std::string application);
+        static bool messageRebuildApplication(sys::Service *sender, std::string application);
+        /// @}
+
+      protected:
+        /// application's settings taken from database
+        SettingsRecord settings;
+
+        void longPressTimerCallback();
+        /// function executing functions registered by CreateAppTimer
+        /// @param id - timer identification number
+        virtual void TickHandler(uint32_t id) override final;
+        /// Method used to register all windows and widgets in application
+        virtual void createUserInterface() = 0;
+        /// Method closing application's windows.
+        virtual void destroyUserInterface() = 0;
+        /// Map containing application's windows
+        /// Right now all application windows are being created on application start in createUserInterface
+        /// then all windows are removed at the end of application
+        /// @note right now there is no mechanism to postphone window creation
+        std::map<std::string, gui::AppWindow *> windows;
+
+        /// stack of visited windows in application
+        /// @ingrup AppWindowStack
+        std::vector<std::string> windowStack;
+
+      public:
+        /// @ingrup AppWindowStack
+        /// get to the first time we entered this &window
+        bool popToWindow(const std::string &window);
+        /// push window to the top of windows stack
+        /// @ingrup AppWindowStack
+        void pushWindow(const std::string &newWindow);
+        /// getter for previous window name
+        /// @ingrup AppWindowStack
+        const std::string getPrevWindow() const;
+        /// clears windows stack
+        /// @ingrup AppWindowStack
+        void cleanPrevWindw();
+        /// getter to get window by name
+        /// @note could be possibly used to implement building window on request
+        /// @ingrup AppWindowStack
+        gui::AppWindow *getWindow(const std::string &window);
+        /// getter for current wisible window in application
+        /// @ingrup AppWindowStack
+        gui::AppWindow *getCurrentWindow();
+
+      protected:
+        /// Flag defines whether keyboard input should be processed
+        bool acceptInput = false;
+
+        /// key translator to handle
+        /// 1. long press transformation (right now we support long press only via top application keyTralator handling)
+        /// 2. simple translation of keys 1 to 1 with keyboard
+        std::unique_ptr<gui::KeyInputSimpleTranslation> keyTranslator;
+        /// Flag defines how application will behave after registration. It can go forground or background
+        bool startBackground = false;
+        /// Flag which defines whether application initialized suspend mode, this will influence how render message will
+        /// sent to gui service. If suspend is true, application manager will receive information from both eink and gui
+        /// services if last rendering mesage will be processed.
+        bool suspendInProgress = false;
+        /// Flag defines case when display needs to be refreshed before closing the system. If flag is set to true next
+        /// set of rendering commands will carry information to GUI service that system needs to be closed. After
+        /// displaying the screen GUI will notify application manager to request system shutdown.
+        bool shutdownInProgress = false;
+
+        /// informs self that there was key press
+        /// used to provide a way for long press/multipress handling in application
+        static bool messageInputEventApplication(sys::Service *sender,
+                                                 std::string application,
+                                                 const gui::InputEvent &event);
+    };
+
+    /// used in ApplicationManager to start applications
+    class ApplicationLauncher
+    {
+      protected:
+        /// name of the application to run
+        std::string name = "";
+        /// name of the application's owner
+        std::string parent = "";
+        /// defines whether application can be closed when it looses focus
+        bool closeable = true;
+        /// defines whether application should be run without gaining focus, it will remian in the BACKGROUND state
+        bool startBackground = false;
+        /// flag defines whether this application can prevent power manager from changing
+        bool preventBlocking = false;
+
+      public:
+        ApplicationLauncher(std::string name, bool isCloseable, bool preventBlocking = false)
+            : name{name}, closeable{isCloseable}, preventBlocking{preventBlocking} {};
+        virtual ~ApplicationLauncher(){};
+        std::string getName()
+        {
+            return name;
+        };
+        bool isCloseable()
+        {
+            return closeable;
+        };
+        bool isBlocking()
+        {
+            return preventBlocking;
+        };
+
+        // virtual method to run the application
+        virtual bool run(sys::Service *caller = nullptr)
+        {
+            return true;
+        };
+        virtual bool runBackground(sys::Service *caller = nullptr)
+        {
+            return true;
+        };
+        std::shared_ptr<Application> handle = nullptr;
+    };
+
+    /// application launcher boilerplate
+    template <class T> class ApplicationLauncherT : public ApplicationLauncher
+    {
+      public:
+        ApplicationLauncherT(std::string name, bool isCloseable = true) : ApplicationLauncher(name, isCloseable)
+        {}
+        virtual bool run(sys::Service *caller) override
+        {
+            parent = (caller == nullptr ? "" : caller->GetName());
+            handle = std::make_shared<T>(name, parent);
+            return sys::SystemManager::CreateService(handle, caller);
+        };
+        bool runBackground(sys::Service *caller) override
+        {
+            parent = (caller == nullptr ? "" : caller->GetName());
+            handle = std::make_shared<T>(name, parent, true);
+            return sys::SystemManager::CreateService(handle, caller);
+        };
+    };
+
+    /// creates application launcher per class provided
+    template <class T>
+    std::unique_ptr<ApplicationLauncherT<T>> CreateLauncher(std::string name, bool isCloseable = true)
+    {
+        return std::move(std::unique_ptr<ApplicationLauncherT<T>>(new ApplicationLauncherT<T>(name, isCloseable)));
     }
 
-    /// see suspendInProgress documentation
-    virtual void setSuspendFlag(bool val)
-    {
-        suspendInProgress = val;
-    };
-    /// see shutdownInProgress documentation
-    virtual void setShutdownFlag()
-    {
-        shutdownInProgress = true;
-    };
-
-    /// @defgroup Application Application static functions
-    /// All this functions are meant to be used in ApplicationManager only
-    /// @note consider moving these as private elements of ApplicationManager i.e. under names message::switchApplication etc.
-    /// @{
-    static bool messageSwitchApplication(sys::Service *sender, std::string application, std::string window, std::unique_ptr<gui::SwitchData> data);
-    static bool messageRefreshApplication( sys::Service* sender, std::string application, std::string window, gui::SwitchData* data=nullptr );
-	static bool messageCloseApplication( sys::Service* sender, std::string application );
-	static bool messageRebuildApplication( sys::Service* sender, std::string application );
-    /// @}
-
-  protected:
-    /// application's settings taken from database
-    SettingsRecord settings;
-
-    void longPressTimerCallback();
-    /// function executing functions registered by CreateAppTimer
-    /// @param id - timer identification number
-    virtual void TickHandler(uint32_t id) override final;
-    /// Method used to register all windows and widgets in application
-    virtual void createUserInterface() = 0;
-    /// Method closing application's windows.
-    virtual void destroyUserInterface() = 0;
-    /// Map containing application's windows
-    /// Right now all application windows are being created on application start in createUserInterface
-    /// then all windows are removed at the end of application
-    /// @note right now there is no mechanism to postphone window creation
-    std::map<std::string, gui::AppWindow *> windows;
-
-    /// stack of visited windows in application
-    /// @ingrup AppWindowStack
-    std::vector<std::string> windowStack;
-
-  public:
-    /// @ingrup AppWindowStack
-    /// get to the first time we entered this &window
-    bool popToWindow(const std::string &window);
-    /// push window to the top of windows stack
-    /// @ingrup AppWindowStack
-    void pushWindow(const std::string &newWindow);
-    /// getter for previous window name
-    /// @ingrup AppWindowStack
-    const std::string getPrevWindow() const;
-    /// clears windows stack
-    /// @ingrup AppWindowStack
-    void cleanPrevWindw();
-    /// getter to get window by name
-    /// @note could be possibly used to implement building window on request
-    /// @ingrup AppWindowStack
-    gui::AppWindow *getWindow(const std::string &window);
-    /// getter for current wisible window in application
-    /// @ingrup AppWindowStack
-    gui::AppWindow *getCurrentWindow();
-
-  protected:
-    /// Flag defines whether keyboard input should be processed
-    bool acceptInput = false;
-
-    /// key translator to handle
-    /// 1. long press transformation (right now we support long press only via top application keyTralator handling)
-    /// 2. simple translation of keys 1 to 1 with keyboard
-    std::unique_ptr<gui::KeyInputSimpleTranslation> keyTranslator;
-    /// Flag defines how application will behave after registration. It can go forground or background
-    bool startBackground = false;
-    /// Flag which defines whether application initialized suspend mode, this will influence how render message will sent to gui service.
-    /// If suspend is true, application manager will receive information from both eink and gui services if last rendering mesage will
-    /// be processed.
-    bool suspendInProgress = false;
-    /// Flag defines case when display needs to be refreshed before closing the system. If flag is set to true next set of rendering commands will
-    /// carry information to GUI service that system needs to be closed. After displaying the screen GUI will notify application manager to request system
-    /// shutdown.
-    bool shutdownInProgress = false;
-
-    /// informs self that there was key press
-    /// used to provide a way for long press/multipress handling in application
-    static bool messageInputEventApplication(sys::Service *sender, std::string application, const gui::InputEvent &event);
-};
-
-/// used in ApplicationManager to start applications
-class ApplicationLauncher {
-protected:
-  /// name of the application to run
-  std::string name = "";
-  /// name of the application's owner
-  std::string parent = "";
-  /// defines whether application can be closed when it looses focus
-  bool closeable = true;
-  /// defines whether application should be run without gaining focus, it will remian in the BACKGROUND state
-  bool startBackground = false;
-  /// flag defines whether this application can prevent power manager from changing
-  bool preventBlocking = false;
-
-public:
-	ApplicationLauncher( std::string name, bool isCloseable, bool preventBlocking = false ) :
-		name{name},
-		closeable{isCloseable},
-		preventBlocking{preventBlocking} {};
-	virtual ~ApplicationLauncher() {};
-	std::string getName() { return name;};
-	bool isCloseable() { return closeable; };
-	bool isBlocking() { return preventBlocking; };
-
-	//virtual method to run the application
-	virtual bool run(sys::Service* caller = nullptr ) {return true;};
-	virtual bool runBackground(sys::Service* caller = nullptr ) {return true;};
-    std::shared_ptr<Application> handle = nullptr;
-};
-
-/// application launcher boilerplate
-template <class T>
-class ApplicationLauncherT : public ApplicationLauncher
-{
-    public:
-    ApplicationLauncherT(std::string name, bool isCloseable=true) : ApplicationLauncher(name, isCloseable) {}
-    virtual bool run(sys::Service* caller) override {
-        parent = (caller == nullptr ? "" : caller->GetName());
-        handle = std::make_shared<T>(name, parent);
-        return sys::SystemManager::CreateService(handle, caller);
-    };
-    bool runBackground(sys::Service *caller) override {
-        parent = (caller == nullptr ? "" : caller->GetName());
-        handle = std::make_shared<T>(name, parent, true);
-        return sys::SystemManager::CreateService(handle, caller);
-    };
-};
-
-/// creates application launcher per class provided
-template <class T>
-std::unique_ptr<ApplicationLauncherT<T>> CreateLauncher(std::string name, bool isCloseable=true) {
-    return std::move(std::unique_ptr<ApplicationLauncherT<T>>(new ApplicationLauncherT<T>(name, isCloseable)));
-}
-
 } /* namespace app */
 
 #endif /* MODULE_APPS_APPLICATION_HPP_ */
diff --git a/module-apps/DatabaseModel.hpp b/module-apps/DatabaseModel.hpp
index cbed7b9b7..66d38afa1 100644
--- a/module-apps/DatabaseModel.hpp
+++ b/module-apps/DatabaseModel.hpp
@@ -17,242 +17,259 @@
 
 #include "Application.hpp"
 
-namespace app {
+namespace app
+{
 
-/*
- *
- */
-template <class T> class DatabaseModel {
-protected:
-	/**
-	 * Number of elements requested from database in single message
-	 */
-	int pageSize = 1;
-	/**
-	 * Pointer to application that owns the model
-	 */
-	Application* application;
-	/**
-	 * Total number of records in database
-	 */
-	int recordsCount;
-	/**
-	 * Index of first element in current page
-	 */
-	int firstIndex;
-	//vector that holds records received from database - first last records, than previous records and finally next records
-	std::vector<std::shared_ptr<T>> records;
-public:
+    /*
+     *
+     */
+    template <class T> class DatabaseModel
+    {
+      protected:
+        /**
+         * Number of elements requested from database in single message
+         */
+        int pageSize = 1;
+        /**
+         * Pointer to application that owns the model
+         */
+        Application *application;
+        /**
+         * Total number of records in database
+         */
+        int recordsCount;
+        /**
+         * Index of first element in current page
+         */
+        int firstIndex;
+        // vector that holds records received from database - first last records, than previous records and finally next
+        // records
+        std::vector<std::shared_ptr<T>> records;
 
-	virtual void requestRecordsCount() {
-	}
+      public:
+        virtual void requestRecordsCount()
+        {}
 
-	virtual bool updateRecords( std::unique_ptr<std::vector<T>> records, const uint32_t offset, const uint32_t limit, uint32_t count ) {
-		//calculate for which page is received data using offset value
+        virtual bool updateRecords(std::unique_ptr<std::vector<T>> records,
+                                   const uint32_t offset,
+                                   const uint32_t limit,
+                                   uint32_t count)
+        {
+            // calculate for which page is received data using offset value
 
-		int page = getPage(offset);
-		int currentPage = firstIndex / pageSize;
+            int page        = getPage(offset);
+            int currentPage = firstIndex / pageSize;
 
-		if( (page >= currentPage - 1) && ( page <= currentPage + 1)){
+            if ((page >= currentPage - 1) && (page <= currentPage + 1)) {
 
-			//store new records
-			for( unsigned int i=0; i<count; i++ ) {
-				auto ii = i+(pageSize*(page-currentPage) + pageSize)+offset% pageSize;
-				this->records[ii] = nullptr;
-				this->records[i+(pageSize*(page-currentPage) + pageSize)+offset% pageSize] = std::make_shared<T>( records.get()->operator [](i) );
-				//this->records[i+(pageSize*(page-currentPage) + pageSize)+offset% limit] = std::shared_ptr<T>( new T(records.get()->operator [](i)) );
-			}
+                // store new records
+                for (unsigned int i = 0; i < count; i++) {
+                    auto ii           = i + (pageSize * (page - currentPage) + pageSize) + offset % pageSize;
+                    this->records[ii] = nullptr;
+                    this->records[i + (pageSize * (page - currentPage) + pageSize) + offset % pageSize] =
+                        std::make_shared<T>(records.get()->operator[](i));
+                    // this->records[i+(pageSize*(page-currentPage) + pageSize)+offset% limit] = std::shared_ptr<T>( new
+                    // T(records.get()->operator [](i)) );
+                }
 
-			//return true (for refreshing window) only if current page was modified.
-			if( page == currentPage )
-				return true;
-			return false;
-		}
-		else {
-			//alarms are out of current scope
-			LOG_ERROR("Received records out of scope");
-			return false;
-		}
-		return false;
-	}
+                // return true (for refreshing window) only if current page was modified.
+                if (page == currentPage)
+                    return true;
+                return false;
+            }
+            else {
+                // alarms are out of current scope
+                LOG_ERROR("Received records out of scope");
+                return false;
+            }
+            return false;
+        }
 
-	virtual void movePrevWindow() {
+        virtual void movePrevWindow()
+        {
 
-		uint32_t currentPage = firstIndex / pageSize;
-		//check if it is possible to move to previous window
-		if( currentPage <= 0 )
-			return;
+            uint32_t currentPage = firstIndex / pageSize;
+            // check if it is possible to move to previous window
+            if (currentPage <= 0)
+                return;
 
-		//erase records from next window
-		for( int i=0; i<pageSize; i++ )
-			if( records[i+2*pageSize]) {
-				records[i+2*pageSize] = nullptr;
-			}
+            // erase records from next window
+            for (int i = 0; i < pageSize; i++)
+                if (records[i + 2 * pageSize]) {
+                    records[i + 2 * pageSize] = nullptr;
+                }
 
-		//moves current records to next records and prev records to current records
-		for( int i=3*pageSize-1; i>=pageSize; --i )
-			records[i] = records[i-pageSize];
+            // moves current records to next records and prev records to current records
+            for (int i = 3 * pageSize - 1; i >= pageSize; --i)
+                records[i] = records[i - pageSize];
 
-		//clear first window to nullptr
-		for( int i = 0; i<pageSize; ++i )
-			records[i] = nullptr;
+            // clear first window to nullptr
+            for (int i = 0; i < pageSize; ++i)
+                records[i] = nullptr;
 
-		//lock the application for keyboard input
-		application->blockEvents(true);
+            // lock the application for keyboard input
+            application->blockEvents(true);
 
-		//request records for next window
-		int prevPage = currentPage - 2;
-		if( prevPage >= 0) {
-			requestRecords(pageSize*prevPage, pageSize );
-		}
-		firstIndex -= pageSize;
-		if( firstIndex < 0 )
-			firstIndex = 0;
-	}
+            // request records for next window
+            int prevPage = currentPage - 2;
+            if (prevPage >= 0) {
+                requestRecords(pageSize * prevPage, pageSize);
+            }
+            firstIndex -= pageSize;
+            if (firstIndex < 0)
+                firstIndex = 0;
+        }
 
-	virtual void moveNextWindow() {
+        virtual void moveNextWindow()
+        {
 
-		uint32_t currentPage = firstIndex / pageSize;
-		uint32_t pageCount = (recordsCount % pageSize == 0) ? recordsCount/pageSize : (recordsCount/pageSize)  + 1;
-		//check if it is possible to move to next window
-		if( currentPage >= pageCount )
-			return;
+            uint32_t currentPage = firstIndex / pageSize;
+            uint32_t pageCount =
+                (recordsCount % pageSize == 0) ? recordsCount / pageSize : (recordsCount / pageSize) + 1;
+            // check if it is possible to move to next window
+            if (currentPage >= pageCount)
+                return;
 
-		//erase firswt window with indicies from 0 up to pageSize -1
-		for( int i=0; i<pageSize; i++ )
-			if( records[i] )
-				records[i] = nullptr;
+            // erase firswt window with indicies from 0 up to pageSize -1
+            for (int i = 0; i < pageSize; i++)
+                if (records[i])
+                    records[i] = nullptr;
 
-		//move current and next window so current window becomes prev window and next becomes current.
-		for( int i=0; i<2*pageSize; ++i )
-			records[i] = records[i+pageSize];
+            // move current and next window so current window becomes prev window and next becomes current.
+            for (int i = 0; i < 2 * pageSize; ++i)
+                records[i] = records[i + pageSize];
 
-		//clear last window to nullptr
-		for( int i= 2*pageSize; i<3*pageSize; ++i )
-			records[i] = nullptr;
+            // clear last window to nullptr
+            for (int i = 2 * pageSize; i < 3 * pageSize; ++i)
+                records[i] = nullptr;
 
-		//lock the application for keyboard input
-		application->blockEvents(true);
+            // lock the application for keyboard input
+            application->blockEvents(true);
 
-		//request records for next window
-		uint32_t nextPage = currentPage + 2;
-		if( nextPage < pageCount )
-			requestRecords(pageSize*nextPage, pageSize );
-		firstIndex += pageSize;
-		if( firstIndex > recordsCount )
-			firstIndex = recordsCount/pageCount;
-	}
+            // request records for next window
+            uint32_t nextPage = currentPage + 2;
+            if (nextPage < pageCount)
+                requestRecords(pageSize * nextPage, pageSize);
+            firstIndex += pageSize;
+            if (firstIndex > recordsCount)
+                firstIndex = recordsCount / pageCount;
+        }
 
-	virtual void requestRecords( const uint32_t offset, const uint32_t limit ) = 0;
+        virtual void requestRecords(const uint32_t offset, const uint32_t limit) = 0;
 
-	bool setRecordsCount( int count ) {
+        bool setRecordsCount(int count)
+        {
 
-		clear();
-		recordsCount = count;
+            clear();
+            recordsCount = count;
 
-		//if there are any records request blocks of data from database using recordsLocalCount and requestSize.
-		if( recordsCount ) {
+            // if there are any records request blocks of data from database using recordsLocalCount and requestSize.
+            if (recordsCount) {
 
-			//TODO handle validation for firstIndex when number of records has decreased.
-			requestRecords(firstIndex, pageSize );
-			if( firstIndex + pageSize < recordsCount )
-				requestRecords(firstIndex+pageSize, pageSize );
-			return true;
-		}
-		return false;
-	}
+                // TODO handle validation for firstIndex when number of records has decreased.
+                requestRecords(firstIndex, pageSize);
+                if (firstIndex + pageSize < recordsCount)
+                    requestRecords(firstIndex + pageSize, pageSize);
+                return true;
+            }
+            return false;
+        }
 
-	void setPageSize( int size ) {
-		clear();
-		pageSize = size;
-		firstIndex = 0;
+        void setPageSize(int size)
+        {
+            clear();
+            pageSize   = size;
+            firstIndex = 0;
 
-		records.resize(3*pageSize);
-		std::fill( records.begin(), records.end(), nullptr );
-	}
+            records.resize(3 * pageSize);
+            std::fill(records.begin(), records.end(), nullptr);
+        }
 
-	DatabaseModel( Application* app, int pageSize ) :
-		pageSize{pageSize},
-		application{app},
-		recordsCount{ -1 },
-		firstIndex{ 0 } {
+        DatabaseModel(Application *app, int pageSize)
+            : pageSize{pageSize}, application{app}, recordsCount{-1}, firstIndex{0}
+        {
 
-		records.resize( pageSize*3 );
-		std::fill( records.begin(), records.end(), nullptr );
-	}
+            records.resize(pageSize * 3);
+            std::fill(records.begin(), records.end(), nullptr);
+        }
 
-	virtual ~DatabaseModel() {
-		clear();
-	}
+        virtual ~DatabaseModel()
+        {
+            clear();
+        }
 
-	virtual void clear() {
+        virtual void clear()
+        {
 
-		for( int i=0; i< pageSize*3; i++ )
-			records[i] = nullptr;
-		records.clear();
-		firstIndex = 0;
-		recordsCount = -1;
-	}
+            for (int i = 0; i < pageSize * 3; i++)
+                records[i] = nullptr;
+            records.clear();
+            firstIndex   = 0;
+            recordsCount = -1;
+        }
 
-	int getRecordsCount() {
-		return recordsCount;
-	}
+        int getRecordsCount()
+        {
+            return recordsCount;
+        }
 
-	int getPage( uint32_t index ) {
-		return  (index % pageSize == 0) ? index/pageSize : (index/pageSize);
-	}
+        int getPage(uint32_t index)
+        {
+            return (index % pageSize == 0) ? index / pageSize : (index / pageSize);
+        }
 
-	/**
-	 * @brief Returns database object under specified index. Performs forward and backward buffering.
-	 * @index Index of the database element. Starts from 0 ( database objects have lowest ID equal to 1. )
-	 * @download Flag that controls whether model should download objects from database when requested object is
-	 * outside visible window.
-	 */
-	std::shared_ptr<T> getRecord( int index, bool download = true ) {
+        /**
+         * @brief Returns database object under specified index. Performs forward and backward buffering.
+         * @index Index of the database element. Starts from 0 ( database objects have lowest ID equal to 1. )
+         * @download Flag that controls whether model should download objects from database when requested object is
+         * outside visible window.
+         */
+        std::shared_ptr<T> getRecord(int index, bool download = true)
+        {
 
-		//if index is greater than number of records or smaller than 0
-		if( (index<0) || (index>recordsCount-1)){
-			return nullptr;
-		}
-		//if index is in current window
-		if( (index >= firstIndex) && ( index < firstIndex + pageSize)) {
-			return records[pageSize + index-firstIndex];
-		}
-		//if download is false check if requested element is in any of the windows
-		if( (download == false ) && (index >= firstIndex - pageSize ) && ( index < firstIndex + 2*pageSize)) {
-			return records[pageSize + index-firstIndex];
-		}
-		//if index is in next window
-		if( download && (index >= firstIndex + pageSize) && ( index < firstIndex+2*pageSize) ) {
-			std::shared_ptr<T> record = records[pageSize + index - firstIndex];
-			moveNextWindow();
-			return record;
-		}
-		//if index is in previous window
-		if( download && (index >= firstIndex - pageSize) && ( index < firstIndex) ) {
-			std::shared_ptr<T> record = records[index+ pageSize-firstIndex];
-			movePrevWindow();
-			return record;
-		}
-		//if index is not in prev, current or next window
-		else if( (index < firstIndex - pageSize) || (index>firstIndex + 2*pageSize) ){
-			int newCurrentPage = index/pageSize;
-			clear();
-			firstIndex = pageSize * newCurrentPage;
-			//request current page
-			requestRecords(firstIndex, pageSize );
-			//if possible request previous page;
-			if( firstIndex - 1 > 0 )
-				requestRecords(firstIndex - pageSize, pageSize);
-			//if possible request next window
-			if( firstIndex*(pageSize + 1) <= recordsCount - 1 )
-				requestRecords(firstIndex+pageSize, pageSize);
+            // if index is greater than number of records or smaller than 0
+            if ((index < 0) || (index > recordsCount - 1)) {
+                return nullptr;
+            }
+            // if index is in current window
+            if ((index >= firstIndex) && (index < firstIndex + pageSize)) {
+                return records[pageSize + index - firstIndex];
+            }
+            // if download is false check if requested element is in any of the windows
+            if ((download == false) && (index >= firstIndex - pageSize) && (index < firstIndex + 2 * pageSize)) {
+                return records[pageSize + index - firstIndex];
+            }
+            // if index is in next window
+            if (download && (index >= firstIndex + pageSize) && (index < firstIndex + 2 * pageSize)) {
+                std::shared_ptr<T> record = records[pageSize + index - firstIndex];
+                moveNextWindow();
+                return record;
+            }
+            // if index is in previous window
+            if (download && (index >= firstIndex - pageSize) && (index < firstIndex)) {
+                std::shared_ptr<T> record = records[index + pageSize - firstIndex];
+                movePrevWindow();
+                return record;
+            }
+            // if index is not in prev, current or next window
+            else if ((index < firstIndex - pageSize) || (index > firstIndex + 2 * pageSize)) {
+                int newCurrentPage = index / pageSize;
+                clear();
+                firstIndex = pageSize * newCurrentPage;
+                // request current page
+                requestRecords(firstIndex, pageSize);
+                // if possible request previous page;
+                if (firstIndex - 1 > 0)
+                    requestRecords(firstIndex - pageSize, pageSize);
+                // if possible request next window
+                if (firstIndex * (pageSize + 1) <= recordsCount - 1)
+                    requestRecords(firstIndex + pageSize, pageSize);
 
-			return nullptr;
-		}
-		return nullptr;
-	}
-};
+                return nullptr;
+            }
+            return nullptr;
+        }
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/UiCommonActions.cpp b/module-apps/UiCommonActions.cpp
index aeb77d5ca..aaa46ccf7 100644
--- a/module-apps/UiCommonActions.cpp
+++ b/module-apps/UiCommonActions.cpp
@@ -20,12 +20,10 @@ namespace app
     {
         assert(app != nullptr);
 
-        if (contact.numbers.size() != 0)
-        {
+        if (contact.numbers.size() != 0) {
             return call(app, callOperation, contact.numbers[0].numberE164);
         }
-        else
-        {
+        else {
             LOG_ERROR("No contact numbers!");
             return false;
         }
@@ -38,16 +36,13 @@ namespace app
 
         std::unique_ptr<CallSwitchData> data;
 
-        switch (callOperation)
-        {
+        switch (callOperation) {
         case CallOperation::ExecuteCall: {
             data = std::make_unique<ExecuteCallData>(e164number.c_str());
-        }
-        break;
+        } break;
         case CallOperation::PrepareCall: {
             data = std::make_unique<EnterNumberData>(e164number.c_str());
-        }
-        break;
+        } break;
         default: {
             LOG_ERROR("callOperation not supported %d", static_cast<uint32_t>(callOperation));
             return false;
@@ -68,11 +63,10 @@ namespace app
         assert(app != nullptr);
         // TODO return to current application doesn't change application window >_>
         auto param = std::shared_ptr<ContactRecord>(new ContactRecord(contact));
-        switch (smsOperation)
-        {
+        switch (smsOperation) {
         case SmsOperation::Add: {
-            return sapm::ApplicationManager::messageSwitchApplication(app, name_messages, gui::name::window::thread_view,
-                                                                      std::make_unique<SMSSendRequest>(param));
+            return sapm::ApplicationManager::messageSwitchApplication(
+                app, name_messages, gui::name::window::thread_view, std::make_unique<SMSSendRequest>(param));
         }
         default: {
             LOG_ERROR("SmsOperation not supported %d", static_cast<uint32_t>(smsOperation));
@@ -92,26 +86,28 @@ namespace app
     bool contact(Application *app, ContactOperation contactOperation, const ContactRecord &contact)
     {
         assert(app != nullptr);
-        switch (contactOperation)
-        {
+        switch (contactOperation) {
         case ContactOperation::Add: {
             return sapm::ApplicationManager::messageSwitchApplication(
-                app, name_phonebook, gui::window::name::newContact,
+                app,
+                name_phonebook,
+                gui::window::name::newContact,
                 std::make_unique<PhonebookItemData>(std::shared_ptr<ContactRecord>(new ContactRecord(contact))));
-        }
-        break;
+        } break;
         case ContactOperation::Details: {
             return sapm::ApplicationManager::messageSwitchApplication(
-                app, name_phonebook, gui::window::name::contact,
+                app,
+                name_phonebook,
+                gui::window::name::contact,
                 std::make_unique<PhonebookItemData>(std::shared_ptr<ContactRecord>(new ContactRecord(contact))));
-        }
-        break;
+        } break;
         case ContactOperation::Edit: {
             return sapm::ApplicationManager::messageSwitchApplication(
-                app, name_phonebook, gui::window::name::newContact, // TODO: need to be fixed when contact edition is working
+                app,
+                name_phonebook,
+                gui::window::name::newContact, // TODO: need to be fixed when contact edition is working
                 std::make_unique<PhonebookItemData>(std::shared_ptr<ContactRecord>(new ContactRecord(contact))));
-        }
-        break;
+        } break;
         default: {
             LOG_ERROR("ContactOperation not supported %d", static_cast<uint32_t>(contactOperation));
             return false;
@@ -125,31 +121,32 @@ namespace app
 
         auto searchResults = DBServiceAPI::ContactSearch(app, "", "", number);
         ContactRecord contactRec;
-        if (searchResults.get()->size() == 1)
-        {
+        if (searchResults.get()->size() == 1) {
             contactRec = searchResults->front();
-            LOG_INFO("Found contact matching search num %s : contact ID %u - %s %s", number.c_str(), contactRec.dbID, contactRec.primaryName.c_str(),
+            LOG_INFO("Found contact matching search num %s : contact ID %u - %s %s",
+                     number.c_str(),
+                     contactRec.dbID,
+                     contactRec.primaryName.c_str(),
                      contactRec.alternativeName.c_str());
 
-            if (contactOperation == ContactOperation::Add)
-            {
+            if (contactOperation == ContactOperation::Add) {
                 // trying to add new contact for number already assigned to existing contact, display warning
                 return sapm::ApplicationManager::messageSwitchApplication(
-                    app, name_phonebook, gui::window::name::duplicatedContact,
-                    std::make_unique<PhonebookItemData>(std::shared_ptr<ContactRecord>(new ContactRecord(contactRec)), number));
+                    app,
+                    name_phonebook,
+                    gui::window::name::duplicatedContact,
+                    std::make_unique<PhonebookItemData>(std::shared_ptr<ContactRecord>(new ContactRecord(contactRec)),
+                                                        number));
             }
         }
-        else if (searchResults.get()->size() > 1)
-        {
+        else if (searchResults.get()->size() > 1) {
             LOG_FATAL("Found more than one contact for numer %s", number.c_str());
-            for (auto i : *searchResults)
-            {
+            for (auto i : *searchResults) {
                 LOG_FATAL("ContactID = %u", i.dbID);
             }
             return false;
         }
-        else if (contactOperation != ContactOperation::Add)
-        {
+        else if (contactOperation != ContactOperation::Add) {
             LOG_ERROR("Invalid operation for not existing contact for numer %s", number.c_str());
             return false;
         }
@@ -163,8 +160,7 @@ namespace app
         assert(contactOperation != ContactOperation::Add);
 
         auto searchResults = DBServiceAPI::ContactGetByID(app, contactId);
-        if (searchResults.get()->size() == 1)
-        {
+        if (searchResults.get()->size() == 1) {
             ContactRecord contactRec = searchResults->front();
             return contact(app, contactOperation, contactRec);
         }
diff --git a/module-apps/application-antenna/ApplicationAntenna.cpp b/module-apps/application-antenna/ApplicationAntenna.cpp
index c0e285402..47fcfee75 100644
--- a/module-apps/application-antenna/ApplicationAntenna.cpp
+++ b/module-apps/application-antenna/ApplicationAntenna.cpp
@@ -15,48 +15,42 @@ namespace app
     void ApplicationAntenna::timerHandler(void)
     {
 
-        if (!scanInProgress)
-        {
+        if (!scanInProgress) {
             LOG_INFO("Get Network info");
             CellularServiceAPI::GetNetworkInfo(this);
         }
     }
 
     ApplicationAntenna::ApplicationAntenna(std::string name, std::string parent, bool startBackgound)
-        : Application(name, parent, startBackgound, 4096 * 2), appTimer(CreateAppTimer(2000, true, [=]() { timerHandler(); }))
+        : Application(name, parent, startBackgound, 4096 * 2),
+          appTimer(CreateAppTimer(2000, true, [=]() { timerHandler(); }))
 
     {
         appTimer.restart();
     }
 
     ApplicationAntenna::~ApplicationAntenna()
-    {
-    }
+    {}
 
     // Invoked upon receiving data message
     sys::Message_t ApplicationAntenna::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
     {
         auto retMsg = Application::DataReceivedHandler(msgl);
         // if message was handled by application's template there is no need to process further.
-        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success))
-        {
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
             return retMsg;
         }
 
         // this variable defines whether message was processed.
         bool handled = false;
-        if (msgl->messageType == MessageType::CellularOperatorsScanResult)
-        {
+        if (msgl->messageType == MessageType::CellularOperatorsScanResult) {
             auto msg = dynamic_cast<cellular::RawCommandRespAsync *>(msgl);
-            if (msg != nullptr)
-            {
+            if (msg != nullptr) {
                 auto win = getCurrentWindow();
 
-                if (win->getName() == "MainWindow")
-                {
+                if (win->getName() == "MainWindow") {
                     auto window = dynamic_cast<gui::AntennaMainWindow *>(win);
-                    if (window != nullptr)
-                    {
+                    if (window != nullptr) {
 
                         window->updateOperatorsScan(msg->data);
                     }
@@ -65,18 +59,14 @@ namespace app
             }
             handled = true;
         }
-        if (msgl->messageType == MessageType::CellularNetworkInfoResult)
-        {
+        if (msgl->messageType == MessageType::CellularNetworkInfoResult) {
             auto msg = dynamic_cast<cellular::RawCommandRespAsync *>(msgl);
-            if (msg != nullptr)
-            {
+            if (msg != nullptr) {
                 auto win = getCurrentWindow();
 
-                if (win->getName() == "MainWindow")
-                {
+                if (win->getName() == "MainWindow") {
                     auto window = dynamic_cast<gui::AntennaMainWindow *>(win);
-                    if (window != nullptr)
-                    {
+                    if (window != nullptr) {
 
                         window->updateDebugInfo(msg->data);
                     }
@@ -121,7 +111,6 @@ namespace app
     }
 
     void ApplicationAntenna::destroyUserInterface()
-    {
-    }
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-antenna/windows/AntennaMainWindow.cpp b/module-apps/application-antenna/windows/AntennaMainWindow.cpp
index 1140f4d8e..656a1a6a4 100644
--- a/module-apps/application-antenna/windows/AntennaMainWindow.cpp
+++ b/module-apps/application-antenna/windows/AntennaMainWindow.cpp
@@ -16,7 +16,6 @@
 #include "../ApplicationAntenna.hpp"
 #include "service-cellular/api/CellularServiceAPI.hpp"
 
-
 namespace gui
 {
 
@@ -47,15 +46,13 @@ namespace gui
 
         setTitle(utils::localize.get("app_desktop_tools_antenna"));
 
-        for (auto title : titlesText)
-        {
+        for (auto title : titlesText) {
             titles.push_back(addLabel(title, [=](gui::Item &item) { return true; }));
         }
         titles[3]->setPenWidth(0);
 
         uint32_t posY = 110;
-        for (uint32_t i = 0; i < titles.size(); i++)
-        {
+        for (uint32_t i = 0; i < titles.size(); i++) {
             titles[i]->setPosition(40, posY);
             posY += 33 + 5;
         }
@@ -78,18 +75,17 @@ namespace gui
             CellularServiceAPI::StartOperatorsScan(this->application);
             this->application->refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
             auto app = dynamic_cast<app::ApplicationAntenna *>(this->application);
-            if (app != nullptr)
-            {
+            if (app != nullptr) {
                 app->setScanInProgress(true);
             }
             return true;
         }));
         uint32_t posX = 40;
-        for (uint32_t i = 0; i < buttons.size(); i++)
-        {
+        for (uint32_t i = 0; i < buttons.size(); i++) {
             buttons[i]->setFont(style::window::font::medium);
             buttons[i]->setPosition(posX, 500);
-            buttons[i]->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+            buttons[i]->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
             posX += 240;
         }
 
@@ -135,36 +131,35 @@ namespace gui
     }
 
     void AntennaMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
     bool AntennaMainWindow::onInput(const InputEvent &inputEvent)
     {
         bool ret = AppWindow::onInput(inputEvent);
-        if (ret)
-        {
+        if (ret) {
             application->render(RefreshModes::GUI_REFRESH_FAST);
             return true;
         }
         return false;
     }
 
-    gui::Label *AntennaMainWindow::addLabel(const UTF8 &text, std::function<bool(Item &)> activatedCallback, bool visibleBorder)
+    gui::Label *AntennaMainWindow::addLabel(const UTF8 &text,
+                                            std::function<bool(Item &)> activatedCallback,
+                                            bool visibleBorder)
     {
         gui::Label *label = new gui::Label(this, 40, 500, 400, 33, text);
         label->setMargins(gui::Margins(16, 0, 0, 0));
         label->setFilled(false);
         label->setPenFocusWidth(3);
-        if (visibleBorder)
-        {
+        if (visibleBorder) {
             label->setPenWidth(1);
         }
-        else
-        {
+        else {
             label->setPenWidth(0);
         }
         label->setFont(style::window::font::verysmall);
-        label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        label->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
         label->setRadius(11);
         label->activatedCallback = activatedCallback;
 
@@ -174,11 +169,13 @@ namespace gui
     void AntennaMainWindow::updateDebugInfo(std::vector<std::string> &data)
     {
         LOG_INFO("AntennaMainWindow::updateDebugInfo vector size %d", data.size());
-        if (data.size() == 3)
-        {
-            titles[static_cast<uint32_t>(labelDescripion::csq)]->setText(titlesText[static_cast<uint32_t>(labelDescripion::csq)] + data[0]);
-            titles[static_cast<uint32_t>(labelDescripion::status)]->setText(titlesText[static_cast<uint32_t>(labelDescripion::status)] + data[1]);
-            titles[static_cast<uint32_t>(labelDescripion::band)]->setText(titlesText[static_cast<uint32_t>(labelDescripion::band)] + data[2]);
+        if (data.size() == 3) {
+            titles[static_cast<uint32_t>(labelDescripion::csq)]->setText(
+                titlesText[static_cast<uint32_t>(labelDescripion::csq)] + data[0]);
+            titles[static_cast<uint32_t>(labelDescripion::status)]->setText(
+                titlesText[static_cast<uint32_t>(labelDescripion::status)] + data[1]);
+            titles[static_cast<uint32_t>(labelDescripion::band)]->setText(
+                titlesText[static_cast<uint32_t>(labelDescripion::band)] + data[2]);
             application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
         }
     }
@@ -186,8 +183,7 @@ namespace gui
     {
         buttons[2]->setText("Start operators scan");
         std::string formattedString;
-        for (auto element : data)
-        {
+        for (auto element : data) {
             formattedString += element + "\n";
         }
         std::replace(formattedString.begin(), formattedString.end(), '\"', ' ');
diff --git a/module-apps/application-antenna/windows/AntennaMainWindow.hpp b/module-apps/application-antenna/windows/AntennaMainWindow.hpp
index cb1a79b29..60274b843 100644
--- a/module-apps/application-antenna/windows/AntennaMainWindow.hpp
+++ b/module-apps/application-antenna/windows/AntennaMainWindow.hpp
@@ -23,13 +23,15 @@ namespace gui
         std::vector<gui::Label *> buttons;
         gui::Text *operators;
 
-        gui::Label *addLabel(const UTF8 &title, std::function<bool(Item &)> activatedCallback, bool visibleBorder = true);
+        gui::Label *addLabel(const UTF8 &title,
+                             std::function<bool(Item &)> activatedCallback,
+                             bool visibleBorder = true);
         const std::string titlesText[4] = {"CSQ: ", "Status: ", "Band: ", "Operators: "};
         enum class labelDescripion
         {
-            csq = 0,
-            status = 1,
-            band = 2,
+            csq       = 0,
+            status    = 1,
+            band      = 2,
             operators = 3
         };
 
diff --git a/module-apps/application-calendar/ApplicationCalendar.cpp b/module-apps/application-calendar/ApplicationCalendar.cpp
index f62ec746e..b68b370ab 100644
--- a/module-apps/application-calendar/ApplicationCalendar.cpp
+++ b/module-apps/application-calendar/ApplicationCalendar.cpp
@@ -11,42 +11,49 @@
 #include "windows/CalendarMainWindow.hpp"
 #include "ApplicationCalendar.hpp"
 
-namespace app {
+namespace app
+{
 
-ApplicationCalendar::ApplicationCalendar(std::string name,std::string parent,uint32_t stackDepth,sys::ServicePriority priority) :
-	Application( name, parent, false, stackDepth, priority ) {
-}
+    ApplicationCalendar::ApplicationCalendar(std::string name,
+                                             std::string parent,
+                                             uint32_t stackDepth,
+                                             sys::ServicePriority priority)
+        : Application(name, parent, false, stackDepth, priority)
+    {}
 
-ApplicationCalendar::~ApplicationCalendar() {
-}
+    ApplicationCalendar::~ApplicationCalendar()
+    {}
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationCalendar::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-	return std::make_shared<sys::ResponseMessage>( );
-}
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationCalendar::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
+        return std::make_shared<sys::ResponseMessage>();
+    }
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationCalendar::InitHandler() {
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationCalendar::InitHandler()
+    {
 
-	createUserInterface();
+        createUserInterface();
 
-	setActiveWindow("Main");
+        setActiveWindow("Main");
 
-	return sys::ReturnCodes::Success;
-}
+        return sys::ReturnCodes::Success;
+    }
 
-sys::ReturnCodes ApplicationCalendar::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
+    sys::ReturnCodes ApplicationCalendar::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
+    void ApplicationCalendar::createUserInterface()
+    {
 
-void ApplicationCalendar::createUserInterface() {
+        gui::AppWindow *win = new CalendarMainWindow(this, "Main");
+        windows.insert(std::pair<std::string, gui::AppWindow *>(win->getName(), win));
+    }
 
-	gui::AppWindow* win = new CalendarMainWindow(this, "Main");
-	windows.insert( std::pair<std::string,gui::AppWindow*>(win->getName(), win));
-}
-
-void ApplicationCalendar::destroyUserInterface() {
-}
+    void ApplicationCalendar::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-calendar/ApplicationCalendar.hpp b/module-apps/application-calendar/ApplicationCalendar.hpp
index 018959efd..b98cb808f 100644
--- a/module-apps/application-calendar/ApplicationCalendar.hpp
+++ b/module-apps/application-calendar/ApplicationCalendar.hpp
@@ -14,26 +14,33 @@
 #include "SystemManager/SystemManager.hpp"
 #include "gui/widgets/Label.hpp"
 
-namespace app {
+namespace app
+{
 
-/*
- * @brief Class representing calendar application
- */
-class ApplicationCalendar: public Application {
-public:
+    /*
+     * @brief Class representing calendar application
+     */
+    class ApplicationCalendar : public Application
+    {
+      public:
+        ApplicationCalendar(std::string name,
+                            std::string parent,
+                            uint32_t stackDepth           = 4096,
+                            sys::ServicePriority priority = sys::ServicePriority::Idle);
+        virtual ~ApplicationCalendar();
 
-	ApplicationCalendar(std::string name, std::string parent, uint32_t stackDepth=4096,sys::ServicePriority priority=sys::ServicePriority::Idle);
-	virtual ~ApplicationCalendar();
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
-
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-calendar/windows/CalendarMainWindow.cpp b/module-apps/application-calendar/windows/CalendarMainWindow.cpp
index 1964e878c..7bb2faafc 100644
--- a/module-apps/application-calendar/windows/CalendarMainWindow.cpp
+++ b/module-apps/application-calendar/windows/CalendarMainWindow.cpp
@@ -12,24 +12,28 @@
 #include "gui/widgets/BoxLayout.hpp"
 #include "CalendarMainWindow.hpp"
 
-namespace app {
+namespace app
+{
 
-CalendarMainWindow::CalendarMainWindow( app::Application* app, std::string name ) : AppWindow( app, name ) {
-	buildInterface();
-}
+    CalendarMainWindow::CalendarMainWindow(app::Application *app, std::string name) : AppWindow(app, name)
+    {
+        buildInterface();
+    }
 
-void CalendarMainWindow::rebuild() {
+    void CalendarMainWindow::rebuild()
+    {}
+    void CalendarMainWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+    }
+    void CalendarMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+    }
 
-}
-void CalendarMainWindow::buildInterface() {
-	AppWindow::buildInterface();
-}
-void CalendarMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-}
-
-CalendarMainWindow::~CalendarMainWindow() {
-	destroyInterface();
-}
+    CalendarMainWindow::~CalendarMainWindow()
+    {
+        destroyInterface();
+    }
 
 } /* namespace app */
diff --git a/module-apps/application-calendar/windows/CalendarMainWindow.hpp b/module-apps/application-calendar/windows/CalendarMainWindow.hpp
index 3a3984e77..1d606a836 100644
--- a/module-apps/application-calendar/windows/CalendarMainWindow.hpp
+++ b/module-apps/application-calendar/windows/CalendarMainWindow.hpp
@@ -12,22 +12,24 @@
 #include "windows/AppWindow.hpp"
 #include "Application.hpp"
 
-namespace app {
+namespace app
+{
 
-/*
- *
- */
-class CalendarMainWindow: public gui::AppWindow {
-protected:
-	//labels with names of the days
-//	gui::Label days;
-public:
-	CalendarMainWindow( Application* app, std::string name );
-	virtual ~CalendarMainWindow();
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+    /*
+     *
+     */
+    class CalendarMainWindow : public gui::AppWindow
+    {
+      protected:
+        // labels with names of the days
+        //	gui::Label days;
+      public:
+        CalendarMainWindow(Application *app, std::string name);
+        virtual ~CalendarMainWindow();
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-call/ApplicationCall.cpp b/module-apps/application-call/ApplicationCall.cpp
index a26954d0f..810f9eefe 100644
--- a/module-apps/application-call/ApplicationCall.cpp
+++ b/module-apps/application-call/ApplicationCall.cpp
@@ -26,12 +26,13 @@
 #include "service-appmgr/ApplicationManager.hpp"
 #include <cassert>
 
-namespace app {
+namespace app
+{
 
     ApplicationCall::ApplicationCall(std::string name, std::string parent, bool startBackgound)
-        : Application(name, parent, startBackgound, 4096 + 2048), timerCall(CreateAppTimer(1000, true, [=]() { timerCallCallback(); }))
-    {
-    }
+        : Application(name, parent, startBackgound, 4096 + 2048),
+          timerCall(CreateAppTimer(1000, true, [=]() { timerCallCallback(); }))
+    {}
 
     //  number of seconds after end call to siwtch back to previous application
     constexpr auto delayToSwitchToPreviousApp = 3;
@@ -41,218 +42,206 @@ namespace app {
         callDuration = utils::time::Timestamp().getTime() - callStartTime;
 
         auto it = windows.find(window::name_call);
-        if (getCurrentWindow() == it->second)
-        {
+        if (getCurrentWindow() == it->second) {
             auto callWindow = dynamic_cast<gui::CallWindow *>(getCurrentWindow());
 
-            if (callWindow && callWindow->getState() == gui::CallWindow::State::CALL_IN_PROGRESS)
-            {
+            if (callWindow && callWindow->getState() == gui::CallWindow::State::CALL_IN_PROGRESS) {
                 callWindow->updateDuration(callDuration);
                 refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
             }
         }
 
         // delayed switch to previous application
-        if (callDuration >= callDelayedDuration)
-        {
+        if (callDuration >= callDelayedDuration) {
             stopCallTimer();
             sapm::ApplicationManager::messageSwitchPreviousApplication(this);
         }
-}
-
-void ApplicationCall::CallAbortHandler()
-{
-    gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
-    assert(callWindow != nullptr);
-
-    LOG_INFO("---------------------------------CallAborted");
-    AudioServiceAPI::Stop(this);
-    callDelayedDuration = callDuration + delayToSwitchToPreviousApp;
-    callWindow->setState(gui::CallWindow::State::CALL_ENDED);
-    refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
-}
-
-void ApplicationCall::CallActiveHandler()
-{
-    gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
-    assert(callWindow != nullptr);
-
-    runCallTimer();
-
-    LOG_INFO("---------------------------------CallActive");
-    callWindow->setState(gui::CallWindow::State::CALL_IN_PROGRESS);
-    refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
-}
-
-void ApplicationCall::IncomingCallHandler(const CellularNotificationMessage *const msg)
-{
-    gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
-    assert(callWindow != nullptr);
-
-    LOG_INFO("---------------------------------IncomingCall");
-    if (callWindow->getState() == gui::CallWindow::State::INCOMING_CALL)
-    {
-        LOG_INFO("ignoring call incoming");
     }
-    else
+
+    void ApplicationCall::CallAbortHandler()
     {
+        gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
+        assert(callWindow != nullptr);
+
+        LOG_INFO("---------------------------------CallAborted");
+        AudioServiceAPI::Stop(this);
+        callDelayedDuration = callDuration + delayToSwitchToPreviousApp;
+        callWindow->setState(gui::CallWindow::State::CALL_ENDED);
+        refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
+    }
+
+    void ApplicationCall::CallActiveHandler()
+    {
+        gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
+        assert(callWindow != nullptr);
+
+        runCallTimer();
+
+        LOG_INFO("---------------------------------CallActive");
+        callWindow->setState(gui::CallWindow::State::CALL_IN_PROGRESS);
+        refreshWindow(gui::RefreshModes::GUI_REFRESH_DEEP);
+    }
+
+    void ApplicationCall::IncomingCallHandler(const CellularNotificationMessage *const msg)
+    {
+        gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
+        assert(callWindow != nullptr);
+
+        LOG_INFO("---------------------------------IncomingCall");
+        if (callWindow->getState() == gui::CallWindow::State::INCOMING_CALL) {
+            LOG_INFO("ignoring call incoming");
+        }
+        else {
+            AudioServiceAPI::RoutingStart(this);
+            runCallTimer();
+            std::unique_ptr<gui::SwitchData> data = std::make_unique<app::IncommingCallData>(msg->data);
+            // send to itself message to switch (run) call application
+            callWindow->setState(gui::CallWindow::State::INCOMING_CALL);
+            if (getState() == State::ACTIVE_FORGROUND) {
+                LOG_INFO("++++++++++++WINDOW SWITCH");
+                switchWindow(window::name_call, std::move(data));
+            }
+            else {
+                LOG_INFO("++++++++++++APP SWITCH");
+
+                sapm::ApplicationManager::messageSwitchApplication(this, name_call, window::name_call, std::move(data));
+            }
+        }
+    }
+
+    void ApplicationCall::RingingHandler(const CellularNotificationMessage *const msg)
+    {
+        gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
+        assert(callWindow != nullptr);
+
+        LOG_INFO("---------------------------------Ringing");
         AudioServiceAPI::RoutingStart(this);
         runCallTimer();
-        std::unique_ptr<gui::SwitchData> data = std::make_unique<app::IncommingCallData>(msg->data);
-        // send to itself message to switch (run) call application
-        callWindow->setState(gui::CallWindow::State::INCOMING_CALL);
-        if (getState() == State::ACTIVE_FORGROUND)
-        {
-            LOG_INFO("++++++++++++WINDOW SWITCH");
+
+        std::unique_ptr<gui::SwitchData> data = std::make_unique<app::ExecuteCallData>(msg->data);
+        callWindow->setState(gui::CallWindow::State::OUTGOING_CALL);
+        if (getState() == State::ACTIVE_FORGROUND) {
             switchWindow(window::name_call, std::move(data));
         }
-        else
-        {
-            LOG_INFO("++++++++++++APP SWITCH");
-
-            sapm::ApplicationManager::messageSwitchApplication(this, name_call, window::name_call, std::move(data));
-        }
-    }
-}
-
-void ApplicationCall::RingingHandler(const CellularNotificationMessage *const msg)
-{
-    gui::CallWindow *callWindow = dynamic_cast<gui::CallWindow *>(windows.find(window::name_call)->second);
-    assert(callWindow != nullptr);
-
-    LOG_INFO("---------------------------------Ringing");
-    AudioServiceAPI::RoutingStart(this);
-    runCallTimer();
-
-    std::unique_ptr<gui::SwitchData> data = std::make_unique<app::ExecuteCallData>(msg->data);
-    callWindow->setState(gui::CallWindow::State::OUTGOING_CALL);
-    if (getState() == State::ACTIVE_FORGROUND)
-    {
-        switchWindow(window::name_call, std::move(data));
-    }
-}
-
-// Invoked upon receiving data message
-sys::Message_t ApplicationCall::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode ==
-		sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
-
-    if (msgl->messageType == MessageType::CellularNotification)
-    {
-        CellularNotificationMessage *msg = dynamic_cast<CellularNotificationMessage *>(msgl);
-        assert(msg != nullptr);
-
-        switch (msg->type)
-        {
-        case CellularNotificationMessage::Type::CallAborted: {
-            CallAbortHandler();
-        }
-        break;
-        case CellularNotificationMessage::Type::CallActive: {
-            CallActiveHandler();
-        }
-        break;
-        case CellularNotificationMessage::Type::IncomingCall: {
-            IncomingCallHandler(msg);
-        }
-        break;
-        case CellularNotificationMessage::Type::Ringing: {
-            RingingHandler(msg);
-        }
-        break;
-        default:
-            break;
-        }
-
-        return std::make_shared<sys::ResponseMessage>();
     }
 
-    if (resp != nullptr)
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationCall::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
     {
-        switch (resp->responseTo)
-        {
-        case MessageType::CellularHangupCall: {
-            if (resp->retCode == sys::ReturnCodes::Success)
-            {
+
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
+
+        if (msgl->messageType == MessageType::CellularNotification) {
+            CellularNotificationMessage *msg = dynamic_cast<CellularNotificationMessage *>(msgl);
+            assert(msg != nullptr);
+
+            switch (msg->type) {
+            case CellularNotificationMessage::Type::CallAborted: {
                 CallAbortHandler();
+            } break;
+            case CellularNotificationMessage::Type::CallActive: {
+                CallActiveHandler();
+            } break;
+            case CellularNotificationMessage::Type::IncomingCall: {
+                IncomingCallHandler(msg);
+            } break;
+            case CellularNotificationMessage::Type::Ringing: {
+                RingingHandler(msg);
+            } break;
+            default:
+                break;
             }
-            break;
-        }
-        default:
-            break;
+
+            return std::make_shared<sys::ResponseMessage>();
         }
 
-        return std::make_shared<sys::ResponseMessage>();
+        if (resp != nullptr) {
+            switch (resp->responseTo) {
+            case MessageType::CellularHangupCall: {
+                if (resp->retCode == sys::ReturnCodes::Success) {
+                    CallAbortHandler();
+                }
+                break;
+            }
+            default:
+                break;
+            }
+
+            return std::make_shared<sys::ResponseMessage>();
+        }
+
+        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
     }
 
-    return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationCall::InitHandler()
+    {
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationCall::InitHandler() {
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+        createUserInterface();
 
-	createUserInterface();
+        setActiveWindow("MainWindow");
 
-	setActiveWindow("MainWindow");
+        return ret;
+    }
 
-	return ret;
-}
+    sys::ReturnCodes ApplicationCall::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-sys::ReturnCodes ApplicationCall::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
+    void ApplicationCall::createUserInterface()
+    {
 
+        gui::AppWindow *window = nullptr;
 
-void ApplicationCall::createUserInterface() {
+        window = new gui::CallMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	gui::AppWindow* window = nullptr;
+        window = new gui::EnterNumberWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::CallMainWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::CallWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::EnterNumberWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::EmergencyCallWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
 
-	window = new gui::CallWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+    void ApplicationCall::setDisplayedNumber(std::string num)
+    {
+        phoneNumber = num;
+    }
 
-	window = new gui::EmergencyCallWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-}
+    const std::string &ApplicationCall::getDisplayedNumber()
+    {
+        return phoneNumber;
+    }
 
-void ApplicationCall::setDisplayedNumber( std::string num ) {
-	phoneNumber = num;
-}
+    void ApplicationCall::runCallTimer()
+    {
+        callStartTime       = utils::time::Timestamp().getTime();
+        callDuration        = std::numeric_limits<time_t>::min();
+        callDelayedDuration = std::numeric_limits<time_t>::max();
+        timerCall.restart();
+    }
 
-const std::string& ApplicationCall::getDisplayedNumber() {
-	return phoneNumber;
-}
+    void ApplicationCall::stopCallTimer()
+    {
+        callStartTime       = std::numeric_limits<time_t>::max();
+        callDuration        = std::numeric_limits<time_t>::min();
+        callDelayedDuration = std::numeric_limits<time_t>::max();
+        timerCall.stop();
+    }
 
-void ApplicationCall::runCallTimer() {
-    callStartTime = utils::time::Timestamp().getTime();
-    callDuration = std::numeric_limits<time_t>::min();
-    callDelayedDuration = std::numeric_limits<time_t>::max();
-    timerCall.restart();
-}
+    void ApplicationCall::destroyUserInterface()
+    {}
 
-void ApplicationCall::stopCallTimer()
-{
-    callStartTime = std::numeric_limits<time_t>::max();
-    callDuration = std::numeric_limits<time_t>::min();
-    callDelayedDuration = std::numeric_limits<time_t>::max();
-    timerCall.stop();
-}
-
-void ApplicationCall::destroyUserInterface() {
-}
-
-} /* namespace gui */
+} // namespace app
diff --git a/module-apps/application-call/ApplicationCall.hpp b/module-apps/application-call/ApplicationCall.hpp
index 075312569..7ef9feeba 100644
--- a/module-apps/application-call/ApplicationCall.hpp
+++ b/module-apps/application-call/ApplicationCall.hpp
@@ -5,50 +5,57 @@
 #include "SystemManager/SystemManager.hpp"
 #include <service-cellular/api/CellularServiceAPI.hpp>
 
-namespace app {
-
-inline const std::string name_call = "ApplicationCall";
-namespace window
+namespace app
 {
-    inline const std::string name_call = "CallWindow";
-    inline const std::string name_enterNumber = "EnterNumberWindow";
-    inline const std::string name_emergencyCall = "EmergencyCallWindow";
-    inline const std::string name_duplicatedContact = "DuplicatedContactWindow";
-} // namespace window
-/*
- *
- */
-class ApplicationCall: public Application {
-  private:
-    void CallAbortHandler();
-    void CallActiveHandler();
-    void IncomingCallHandler(const CellularNotificationMessage *const msg);
-    void RingingHandler(const CellularNotificationMessage *const msg);
 
-  protected:
-	std::string phoneNumber;
-	AppTimer timerCall;
-    time_t callStartTime = std::numeric_limits<time_t>::max();
-    ;
-    time_t callDuration = 0;
-    time_t callDelayedDuration = std::numeric_limits<time_t>::max();
-    void timerCallCallback();
-public:
-	ApplicationCall( std::string name=name_call, std::string parent = "", bool startBackgound = false );
-    ~ApplicationCall() override = default;
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+    inline const std::string name_call = "ApplicationCall";
+    namespace window
+    {
+        inline const std::string name_call              = "CallWindow";
+        inline const std::string name_enterNumber       = "EnterNumberWindow";
+        inline const std::string name_emergencyCall     = "EmergencyCallWindow";
+        inline const std::string name_duplicatedContact = "DuplicatedContactWindow";
+    } // namespace window
+    /*
+     *
+     */
+    class ApplicationCall : public Application
+    {
+      private:
+        void CallAbortHandler();
+        void CallActiveHandler();
+        void IncomingCallHandler(const CellularNotificationMessage *const msg);
+        void RingingHandler(const CellularNotificationMessage *const msg);
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+      protected:
+        std::string phoneNumber;
+        AppTimer timerCall;
+        time_t callStartTime = std::numeric_limits<time_t>::max();
+        ;
+        time_t callDuration        = 0;
+        time_t callDelayedDuration = std::numeric_limits<time_t>::max();
+        void timerCallCallback();
 
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-    void setDisplayedNumber( std::string num );
-	const std::string& getDisplayedNumber();
-	//starts timer that upon triggering, if no user action was performed, will hide application to background and move to previous application
-	void runCallTimer();
-	void stopCallTimer();
-};
+      public:
+        ApplicationCall(std::string name = name_call, std::string parent = "", bool startBackgound = false);
+        ~ApplicationCall() override = default;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
+
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
+
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+        void setDisplayedNumber(std::string num);
+        const std::string &getDisplayedNumber();
+        // starts timer that upon triggering, if no user action was performed, will hide application to background and
+        // move to previous application
+        void runCallTimer();
+        void stopCallTimer();
+    };
 
 } /* namespace app */
diff --git a/module-apps/application-call/data/CallAppStyle.hpp b/module-apps/application-call/data/CallAppStyle.hpp
index ddef6e203..1eda124d8 100644
--- a/module-apps/application-call/data/CallAppStyle.hpp
+++ b/module-apps/application-call/data/CallAppStyle.hpp
@@ -4,42 +4,42 @@
 
 namespace callAppStyle
 {
-// ICON
-namespace icon
-{
-constexpr uint32_t w = 100;
-constexpr uint32_t h = 100;
-namespace label
-{
-constexpr uint32_t x = 9;
-constexpr uint32_t y = 58;
-constexpr uint32_t w = 82;
-constexpr uint32_t h = 20;
-} // namespace label
-namespace img
-{
-constexpr uint32_t x = 34;
-constexpr uint32_t y = 15;
-constexpr uint32_t w = 32;
-constexpr uint32_t h = 32;
-} // namespace img
-} // namespace icon
+    // ICON
+    namespace icon
+    {
+        constexpr uint32_t w = 100;
+        constexpr uint32_t h = 100;
+        namespace label
+        {
+            constexpr uint32_t x = 9;
+            constexpr uint32_t y = 58;
+            constexpr uint32_t w = 82;
+            constexpr uint32_t h = 20;
+        } // namespace label
+        namespace img
+        {
+            constexpr uint32_t x = 34;
+            constexpr uint32_t y = 15;
+            constexpr uint32_t w = 32;
+            constexpr uint32_t h = 32;
+        } // namespace img
+    }     // namespace icon
 
-// ENTER NUMBER WINDOW
-namespace enterNumberWindow
-{
-namespace numberLabel
-{
-constexpr uint32_t x = 60;
-constexpr uint32_t y = 157;
-constexpr uint32_t w = style::window_width - 2 * x;
-constexpr uint32_t h = 66;
-constexpr uint32_t borderW = 1;
-} // namespace numberLabel
-namespace newContactIcon
-{
-constexpr uint32_t x = 190;
-constexpr uint32_t y = 411;
-} // namespace newContactIcon
-} // namespace enterNumberWindow
+    // ENTER NUMBER WINDOW
+    namespace enterNumberWindow
+    {
+        namespace numberLabel
+        {
+            constexpr uint32_t x       = 60;
+            constexpr uint32_t y       = 157;
+            constexpr uint32_t w       = style::window_width - 2 * x;
+            constexpr uint32_t h       = 66;
+            constexpr uint32_t borderW = 1;
+        } // namespace numberLabel
+        namespace newContactIcon
+        {
+            constexpr uint32_t x = 190;
+            constexpr uint32_t y = 411;
+        } // namespace newContactIcon
+    }     // namespace enterNumberWindow
 } // namespace callAppStyle
\ No newline at end of file
diff --git a/module-apps/application-call/data/CallSwitchData.cpp b/module-apps/application-call/data/CallSwitchData.cpp
index ec99a76af..5cf768a5d 100644
--- a/module-apps/application-call/data/CallSwitchData.cpp
+++ b/module-apps/application-call/data/CallSwitchData.cpp
@@ -8,15 +8,17 @@
  */
 #include "CallSwitchData.hpp"
 
-namespace app {
+namespace app
+{
 
-CallSwitchData::CallSwitchData() {
-	// TODO Auto-generated constructor stub
+    CallSwitchData::CallSwitchData()
+    {
+        // TODO Auto-generated constructor stub
+    }
 
-}
-
-CallSwitchData::~CallSwitchData() {
-	// TODO Auto-generated destructor stub
-}
+    CallSwitchData::~CallSwitchData()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
 } /* namespace app */
diff --git a/module-apps/application-call/data/CallSwitchData.hpp b/module-apps/application-call/data/CallSwitchData.hpp
index 77a8d6908..a182efb5d 100644
--- a/module-apps/application-call/data/CallSwitchData.hpp
+++ b/module-apps/application-call/data/CallSwitchData.hpp
@@ -12,48 +12,66 @@
 #include <string>
 #include "SwitchData.hpp"
 
-namespace app {
+namespace app
+{
 
-class CallSwitchData: public gui::SwitchData {
-public:
-	enum class Type {
-		UNDEFINED,
-		ENTER_NUMBER,
-		INCOMMING_CALL,
-		EXECUTE_CALL 
-	};
-	static const inline std::string descriptionStr = "CallSwitchData";
-	static const inline std::string defaultPhoneNumber = "undefined";
-protected:
-	Type type = Type::UNDEFINED;
-	std::string phoneNumber;
-public:
-	CallSwitchData( const std::string& number = defaultPhoneNumber, Type type = Type::UNDEFINED ) : SwitchData(descriptionStr), type{ type }, phoneNumber{ number } {};
-	virtual ~CallSwitchData(){};
+    class CallSwitchData : public gui::SwitchData
+    {
+      public:
+        enum class Type
+        {
+            UNDEFINED,
+            ENTER_NUMBER,
+            INCOMMING_CALL,
+            EXECUTE_CALL
+        };
+        static const inline std::string descriptionStr     = "CallSwitchData";
+        static const inline std::string defaultPhoneNumber = "undefined";
 
-	const Type& getType() const { return type; };
-	const std::string& getPhoneNumber() const { return phoneNumber; };
-};
+      protected:
+        Type type = Type::UNDEFINED;
+        std::string phoneNumber;
 
-class EnterNumberData: public CallSwitchData {
-public:
-	EnterNumberData( const std::string& number = "") : CallSwitchData( number, CallSwitchData::Type::ENTER_NUMBER ) {};
-	virtual ~EnterNumberData(){};
-};
+      public:
+        CallSwitchData(const std::string &number = defaultPhoneNumber, Type type = Type::UNDEFINED)
+            : SwitchData(descriptionStr), type{type}, phoneNumber{number} {};
+        virtual ~CallSwitchData(){};
 
-class IncommingCallData: public CallSwitchData {
-public:
-	IncommingCallData( const std::string& number = "") : CallSwitchData( number, CallSwitchData::Type::INCOMMING_CALL ) {};
-	virtual ~IncommingCallData(){};
-};
+        const Type &getType() const
+        {
+            return type;
+        };
+        const std::string &getPhoneNumber() const
+        {
+            return phoneNumber;
+        };
+    };
 
-class ExecuteCallData: public CallSwitchData {
-protected:
-	std::string phoneNumber;
-public:
-	ExecuteCallData( const std::string& number = "") : CallSwitchData( number, app::CallSwitchData::Type::EXECUTE_CALL ) {};
-	virtual ~ExecuteCallData(){};
-};
+    class EnterNumberData : public CallSwitchData
+    {
+      public:
+        EnterNumberData(const std::string &number = "") : CallSwitchData(number, CallSwitchData::Type::ENTER_NUMBER){};
+        virtual ~EnterNumberData(){};
+    };
+
+    class IncommingCallData : public CallSwitchData
+    {
+      public:
+        IncommingCallData(const std::string &number = "")
+            : CallSwitchData(number, CallSwitchData::Type::INCOMMING_CALL){};
+        virtual ~IncommingCallData(){};
+    };
+
+    class ExecuteCallData : public CallSwitchData
+    {
+      protected:
+        std::string phoneNumber;
+
+      public:
+        ExecuteCallData(const std::string &number = "")
+            : CallSwitchData(number, app::CallSwitchData::Type::EXECUTE_CALL){};
+        virtual ~ExecuteCallData(){};
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-call/widgets/Icon.cpp b/module-apps/application-call/widgets/Icon.cpp
index ef21a3c55..22a0b91a1 100644
--- a/module-apps/application-call/widgets/Icon.cpp
+++ b/module-apps/application-call/widgets/Icon.cpp
@@ -6,18 +6,20 @@ using namespace callAppStyle;
 namespace gui
 {
 
-Icon::Icon(Item *parent, const uint32_t &x, const uint32_t &y, const std::string &imageName, const std::string &labelStr)
-    : Rect(parent, x, y, icon::w, icon::h)
-{
-    setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP );
-	setPenFocusWidth(style::window::default_border_focucs_w);
-	setPenWidth(style::window::default_border_no_focus_w);
+    Icon::Icon(
+        Item *parent, const uint32_t &x, const uint32_t &y, const std::string &imageName, const std::string &labelStr)
+        : Rect(parent, x, y, icon::w, icon::h)
+    {
+        setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
+        setPenFocusWidth(style::window::default_border_focucs_w);
+        setPenWidth(style::window::default_border_no_focus_w);
 
-    img = new gui::Image(this, icon::img::x, icon::img::y, icon::img::w, icon::img::h, imageName);
-    label = new gui::Label(this, icon::label::x, icon::label::y, icon::label::w, icon::label::h, labelStr);
-    label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-    label->setFont(style::window::font::verysmall);
-}
+        img   = new gui::Image(this, icon::img::x, icon::img::y, icon::img::w, icon::img::h, imageName);
+        label = new gui::Label(this, icon::label::x, icon::label::y, icon::label::w, icon::label::h, labelStr);
+        label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        label->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        label->setFont(style::window::font::verysmall);
+    }
 
 } // namespace gui
\ No newline at end of file
diff --git a/module-apps/application-call/widgets/Icon.hpp b/module-apps/application-call/widgets/Icon.hpp
index dc26a02ba..b8ad35c62 100644
--- a/module-apps/application-call/widgets/Icon.hpp
+++ b/module-apps/application-call/widgets/Icon.hpp
@@ -6,16 +6,20 @@
 namespace gui
 {
 
-// Icon widget with custom image and label
-class Icon : public Rect
-{
-  protected:
-    Image *img = nullptr;
-    Label *label = nullptr;
+    // Icon widget with custom image and label
+    class Icon : public Rect
+    {
+      protected:
+        Image *img   = nullptr;
+        Label *label = nullptr;
 
-  public:
-    Icon() = delete;
-    Icon(Item *parent, const uint32_t &x, const uint32_t &y, const std::string &imageName, const std::string &labelStr);
-    virtual ~Icon() = default;
-};
+      public:
+        Icon() = delete;
+        Icon(Item *parent,
+             const uint32_t &x,
+             const uint32_t &y,
+             const std::string &imageName,
+             const std::string &labelStr);
+        virtual ~Icon() = default;
+    };
 } // namespace gui
\ No newline at end of file
diff --git a/module-apps/application-call/windows/CallMainWindow.cpp b/module-apps/application-call/windows/CallMainWindow.cpp
index 549e924dc..b98848fb9 100644
--- a/module-apps/application-call/windows/CallMainWindow.cpp
+++ b/module-apps/application-call/windows/CallMainWindow.cpp
@@ -11,25 +11,27 @@
 #include "CallMainWindow.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
     CallMainWindow::CallMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window)
     {
         buildInterface();
     }
 
-void CallMainWindow::rebuild() {
-}
-void CallMainWindow::buildInterface() {
-	AppWindow::buildInterface();
-    setTitle(getName());
-}
-void CallMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-}
+    void CallMainWindow::rebuild()
+    {}
+    void CallMainWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        setTitle(getName());
+    }
+    void CallMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+    }
 
-
-CallMainWindow::~CallMainWindow() {
-}
+    CallMainWindow::~CallMainWindow()
+    {}
 
 } /* namespace gui */
diff --git a/module-apps/application-call/windows/CallMainWindow.hpp b/module-apps/application-call/windows/CallMainWindow.hpp
index daaa0cf33..0ae0c114e 100644
--- a/module-apps/application-call/windows/CallMainWindow.hpp
+++ b/module-apps/application-call/windows/CallMainWindow.hpp
@@ -12,22 +12,24 @@
 #include "AppWindow.hpp"
 #include "Label.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- * This window is defined only to keep common approach to creating application.
- * This window should not be displayed.
- */
-class CallMainWindow: public AppWindow {
-protected:
-public:
-	CallMainWindow( app::Application* app );
-	virtual ~CallMainWindow();
+    /*
+     * This window is defined only to keep common approach to creating application.
+     * This window should not be displayed.
+     */
+    class CallMainWindow : public AppWindow
+    {
+      protected:
+      public:
+        CallMainWindow(app::Application *app);
+        virtual ~CallMainWindow();
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-call/windows/CallWindow.cpp b/module-apps/application-call/windows/CallWindow.cpp
index 09c6e6f6f..cd3f6ab08 100644
--- a/module-apps/application-call/windows/CallWindow.cpp
+++ b/module-apps/application-call/windows/CallWindow.cpp
@@ -27,382 +27,428 @@
 #include "CallWindow.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-CallWindow::CallWindow( app::Application* app, std::string windowName ) : AppWindow(app, windowName){
-	buildInterface();
-}
+    CallWindow::CallWindow(app::Application *app, std::string windowName) : AppWindow(app, windowName)
+    {
+        buildInterface();
+    }
 
-void CallWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-void CallWindow::buildInterface() {
-	AppWindow::buildInterface();
+    void CallWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
+    void CallWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-	topBar->setActive(gui::TopBar::Elements::BATTERY, true );
-	topBar->setActive(gui::TopBar::Elements::SIGNAL, true );
-	topBar->setActive(gui::TopBar::Elements::TIME, true );
+        topBar->setActive(gui::TopBar::Elements::BATTERY, true);
+        topBar->setActive(gui::TopBar::Elements::SIGNAL, true);
+        topBar->setActive(gui::TopBar::Elements::TIME, true);
 
-	bottomBar->setActive( BottomBar::Side::CENTER, true );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
 
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_select"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
-	bottomBar->setText( gui::BottomBar::Side::CENTER, "Message" );
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+        bottomBar->setText(gui::BottomBar::Side::CENTER, "Message");
 
-	//create circles to hold images inside
-	for( uint32_t i=0; i<2; ++i ) {
-		rects[i] = new gui::Rect( this, 0,0, 80, 80 );
-		rects[i]->setFilled( false );
-		rects[i]->setRadius(40);
-		rects[i]->setPenFocusWidth(3);
-		rects[i]->setPenWidth(1);
-	}
+        // create circles to hold images inside
+        for (uint32_t i = 0; i < 2; ++i) {
+            rects[i] = new gui::Rect(this, 0, 0, 80, 80);
+            rects[i]->setFilled(false);
+            rects[i]->setRadius(40);
+            rects[i]->setPenFocusWidth(3);
+            rects[i]->setPenWidth(1);
+        }
 
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->setPosition( 150, 400 );
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setPosition( 250, 400 );
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->setPosition(150, 400);
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setPosition(250, 400);
 
-	imageSpeaker[static_cast<uint32_t>(AudioState::ON)] = new gui::Image( rects[static_cast<uint32_t>(FocusRects::Speaker)], 20, 20, 0,0, "speaker_on" );
-	imageSpeaker[static_cast<uint32_t>(AudioState::OFF)] = new gui::Image( rects[static_cast<uint32_t>(FocusRects::Speaker)], 20, 20, 0,0, "speaker_off" );
-	imageSpeaker[static_cast<uint32_t>(AudioState::ON)]->setVisible(false);
-	imageSpeaker[static_cast<uint32_t>(AudioState::OFF)]->setVisible(false);
+        imageSpeaker[static_cast<uint32_t>(AudioState::ON)] =
+            new gui::Image(rects[static_cast<uint32_t>(FocusRects::Speaker)], 20, 20, 0, 0, "speaker_on");
+        imageSpeaker[static_cast<uint32_t>(AudioState::OFF)] =
+            new gui::Image(rects[static_cast<uint32_t>(FocusRects::Speaker)], 20, 20, 0, 0, "speaker_off");
+        imageSpeaker[static_cast<uint32_t>(AudioState::ON)]->setVisible(false);
+        imageSpeaker[static_cast<uint32_t>(AudioState::OFF)]->setVisible(false);
 
-//	imageMessage = new gui::Image( this, 200, 60-177, 0,0, "call_message" );
+        //	imageMessage = new gui::Image( this, 200, 60-177, 0,0, "call_message" );
 
-	imageMicrophone[static_cast<uint32_t>(AudioState::ON)] = new gui::Image( rects[static_cast<uint32_t>(FocusRects::Micrphone)], 20, 20, 0,0, "microphone_on" );
-	imageMicrophone[static_cast<uint32_t>(AudioState::OFF)] = new gui::Image( rects[static_cast<uint32_t>(FocusRects::Micrphone)], 20, 20, 0,0, "microphone_off" );
-	imageMicrophone[static_cast<uint32_t>(AudioState::ON)]->setVisible(false);
-	imageMicrophone[static_cast<uint32_t>(AudioState::OFF)]->setVisible(false);
+        imageMicrophone[static_cast<uint32_t>(AudioState::ON)] =
+            new gui::Image(rects[static_cast<uint32_t>(FocusRects::Micrphone)], 20, 20, 0, 0, "microphone_on");
+        imageMicrophone[static_cast<uint32_t>(AudioState::OFF)] =
+            new gui::Image(rects[static_cast<uint32_t>(FocusRects::Micrphone)], 20, 20, 0, 0, "microphone_off");
+        imageMicrophone[static_cast<uint32_t>(AudioState::ON)]->setVisible(false);
+        imageMicrophone[static_cast<uint32_t>(AudioState::OFF)]->setVisible(false);
 
-	//top circle image
-	imageCircleTop = new gui::Image( this, 116, 82, 0,0, "circle_top" );
-	imageCircleBottom = new gui::Image( this, 106, 266, 0,0, "circle_bottom" );
+        // top circle image
+        imageCircleTop    = new gui::Image(this, 116, 82, 0, 0, "circle_top");
+        imageCircleBottom = new gui::Image(this, 106, 266, 0, 0, "circle_bottom");
 
-	durationLabel = new gui::Label(this, 0, 220, 480, 80 );
-	durationLabel->setFilled( false );
-	durationLabel->setBorderColor( gui::ColorNoColor );
-	durationLabel->setFont(style::window::font::verybig);
-	durationLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        durationLabel = new gui::Label(this, 0, 220, 480, 80);
+        durationLabel->setFilled(false);
+        durationLabel->setBorderColor(gui::ColorNoColor);
+        durationLabel->setFont(style::window::font::verybig);
+        durationLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
 
-	numberLabel = new gui::Label(this, 11, 150, 480-22, 80 );
-	numberLabel->setFilled( false );
-	numberLabel->setBorderColor( gui::ColorNoColor );
-	numberLabel->setFont(style::window::font::bigbold);
-	numberLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        numberLabel = new gui::Label(this, 11, 150, 480 - 22, 80);
+        numberLabel->setFilled(false);
+        numberLabel->setBorderColor(gui::ColorNoColor);
+        numberLabel->setFont(style::window::font::bigbold);
+        numberLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
 
-	//define navigation between labels
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->setNavigationItem( NavigationDirection::LEFT,
-		rects[static_cast<uint32_t>(FocusRects::Micrphone)]);
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->setNavigationItem( NavigationDirection::RIGHT,
-		rects[static_cast<uint32_t>(FocusRects::Micrphone)]);
+        // define navigation between labels
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->setNavigationItem(
+            NavigationDirection::LEFT, rects[static_cast<uint32_t>(FocusRects::Micrphone)]);
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->setNavigationItem(
+            NavigationDirection::RIGHT, rects[static_cast<uint32_t>(FocusRects::Micrphone)]);
 
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setNavigationItem( NavigationDirection::LEFT,
-		rects[static_cast<uint32_t>(FocusRects::Speaker)]);
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setNavigationItem( NavigationDirection::RIGHT,
-		rects[static_cast<uint32_t>(FocusRects::Speaker)]);
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setNavigationItem(
+            NavigationDirection::LEFT, rects[static_cast<uint32_t>(FocusRects::Speaker)]);
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setNavigationItem(
+            NavigationDirection::RIGHT, rects[static_cast<uint32_t>(FocusRects::Speaker)]);
 
-	//focus callbacks
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->focusChangedCallback = [=] (gui::Item& item){
-		LOG_INFO("Speaker gets focus" );
-		bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_speaker"));
-		return true; };
+        // focus callbacks
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->focusChangedCallback = [=](gui::Item &item) {
+            LOG_INFO("Speaker gets focus");
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_speaker"));
+            return true;
+        };
 
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->focusChangedCallback = [=] (gui::Item& item){
-		LOG_INFO("Mute gets focus" );
-		bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_mute"));
-		return true; };
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->focusChangedCallback = [=](gui::Item &item) {
+            LOG_INFO("Mute gets focus");
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_mute"));
+            return true;
+        };
 
-	//activation callbacks
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->activatedCallback = [=] (gui::Item& item){
-		LOG_INFO("Speaker activated" );
-		//update icon
-		imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(false);
-		speakerState = (speakerState == AudioState::ON)?AudioState::OFF:AudioState::ON;
-		imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(true);
+        // activation callbacks
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("Speaker activated");
+            // update icon
+            imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(false);
+            speakerState = (speakerState == AudioState::ON) ? AudioState::OFF : AudioState::ON;
+            imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(true);
 
-		application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
+            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
 
-		(speakerState == AudioState::ON)?
-			AudioServiceAPI::RoutingSpeakerPhone(this->application,true):
-			AudioServiceAPI::RoutingSpeakerPhone(this->application,false);
+            (speakerState == AudioState::ON) ? AudioServiceAPI::RoutingSpeakerPhone(this->application, true)
+                                             : AudioServiceAPI::RoutingSpeakerPhone(this->application, false);
 
-		return true; };
+            return true;
+        };
 
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->activatedCallback = [=] (gui::Item& item){
-		LOG_INFO("Mute activated" );
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("Mute activated");
 
-		//update icon
-		imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(false);
-		microphoneState = (microphoneState == AudioState::ON)?AudioState::OFF:AudioState::ON;
-		imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(true);
+            // update icon
+            imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(false);
+            microphoneState = (microphoneState == AudioState::ON) ? AudioState::OFF : AudioState::ON;
+            imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(true);
 
-		application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
+            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
 
-		(microphoneState == AudioState::ON)?
-			AudioServiceAPI::RoutingMute(this->application,false):
-			AudioServiceAPI::RoutingMute(this->application,true);
+            (microphoneState == AudioState::ON) ? AudioServiceAPI::RoutingMute(this->application, false)
+                                                : AudioServiceAPI::RoutingMute(this->application, true);
 
-		return true; };
+            return true;
+        };
+    }
 
-}
+    void CallWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
 
-void CallWindow::destroyInterface() {
-	AppWindow::destroyInterface();
+        if (numberLabel) {
+            removeWidget(numberLabel);
+            delete numberLabel;
+            numberLabel = nullptr;
+        }
+        if (durationLabel) {
+            removeWidget(durationLabel);
+            delete durationLabel;
+            durationLabel = nullptr;
+        }
+        if (rects[0]) {
+            removeWidget(rects[0]);
+            delete rects[0];
+            rects[0] = nullptr;
+        }
+        if (rects[1]) {
+            removeWidget(rects[1]);
+            delete rects[1];
+            rects[1] = nullptr;
+        }
 
-	if( numberLabel ){ removeWidget(numberLabel); delete numberLabel; numberLabel = nullptr; }
-	if( durationLabel ){ removeWidget(durationLabel); delete durationLabel; durationLabel = nullptr; }
-	if( rects[0] ){ removeWidget(rects[0]); delete rects[0]; rects[0]= nullptr; }
-	if( rects[1] ){ removeWidget(rects[1]); delete rects[1]; rects[1]= nullptr; }
+        if (imageMessage) {
+            removeWidget(imageMessage);
+            delete imageMessage;
+            imageMessage = nullptr;
+        }
+        if (imageCircleTop) {
+            removeWidget(imageCircleTop);
+            delete imageCircleTop;
+            imageCircleTop = nullptr;
+        }
+        if (imageCircleBottom) {
+            removeWidget(imageCircleBottom);
+            delete imageCircleBottom;
+            imageCircleBottom = nullptr;
+        }
 
-	if( imageMessage ){ removeWidget(imageMessage); delete imageMessage; imageMessage = nullptr; }
-	if( imageCircleTop ){ removeWidget(imageCircleTop); delete imageCircleTop; imageCircleTop = nullptr; }
-	if( imageCircleBottom ){ removeWidget(imageCircleBottom); delete imageCircleBottom; imageCircleBottom = nullptr; }
+        children.clear();
+    }
 
-	children.clear();
-}
+    CallWindow::~CallWindow()
+    {}
 
-CallWindow::~CallWindow() {
-}
+    void CallWindow::setState(State state)
+    {
+        this->state = state;
+        setVisibleState();
+    }
 
-void CallWindow::setState( State state ) {
-	this->state = state;
-	setVisibleState();
-}
+    const CallWindow::State &CallWindow::getState()
+    {
+        return state;
+    }
 
-const CallWindow::State& CallWindow::getState() {
-	return state;
-}
+    void CallWindow::setVisibleState()
+    {
 
-void CallWindow::setVisibleState() {
+        //	imageMessage->setVisible(false);
+        rects[static_cast<uint32_t>(FocusRects::Speaker)]->setVisible(false);
+        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setVisible(false);
+        durationLabel->setVisible(false);
+        setFocusItem(nullptr);
 
-//	imageMessage->setVisible(false);
-	rects[static_cast<uint32_t>(FocusRects::Speaker)]->setVisible(false);
-	rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setVisible(false);
-	durationLabel->setVisible(false);
-    setFocusItem(nullptr);
+        auto showIconsLambda = [=]() {
+            rects[static_cast<uint32_t>(FocusRects::Speaker)]->setVisible(true);
+            rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setVisible(true);
 
-    auto showIconsLambda = [=]() {
-        rects[static_cast<uint32_t>(FocusRects::Speaker)]->setVisible(true);
-        rects[static_cast<uint32_t>(FocusRects::Micrphone)]->setVisible(true);
+            imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(true);
+            imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(true);
 
-        imageSpeaker[static_cast<uint32_t>(speakerState)]->setVisible(true);
-        imageMicrophone[static_cast<uint32_t>(microphoneState)]->setVisible(true);
+            setFocusItem(rects[static_cast<uint32_t>(FocusRects::Speaker)]);
+        };
 
-        setFocusItem(rects[static_cast<uint32_t>(FocusRects::Speaker)]);
-    };
-
-    //show state of the window
-	switch( state ) {
-		case State::INCOMING_CALL: {
-			bottomBar->setActive(gui::BottomBar::Side::LEFT, true );
-			bottomBar->setActive(gui::BottomBar::Side::CENTER, true );
-			bottomBar->setActive(gui::BottomBar::Side::RIGHT, true );
-			bottomBar->setText( gui::BottomBar::Side::LEFT, utils::localize.get("app_call_answer") );
-			bottomBar->setText( gui::BottomBar::Side::CENTER, utils::localize.get("app_call_message") );
-			bottomBar->setText( gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_reject") );
-			durationLabel->setText(utils::localize.get("app_call_is_calling"));
-			durationLabel->setVisible(true);
-//			imageMessage->setVisible(true);
-		}break;
-		case State::CALL_ENDED: {
-			bottomBar->setActive(gui::BottomBar::Side::LEFT, false );
-			bottomBar->setActive(gui::BottomBar::Side::CENTER, false );
-			bottomBar->setActive(gui::BottomBar::Side::RIGHT, false );
+        // show state of the window
+        switch (state) {
+        case State::INCOMING_CALL: {
+            bottomBar->setActive(gui::BottomBar::Side::LEFT, true);
+            bottomBar->setActive(gui::BottomBar::Side::CENTER, true);
+            bottomBar->setActive(gui::BottomBar::Side::RIGHT, true);
+            bottomBar->setText(gui::BottomBar::Side::LEFT, utils::localize.get("app_call_answer"));
+            bottomBar->setText(gui::BottomBar::Side::CENTER, utils::localize.get("app_call_message"));
+            bottomBar->setText(gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_reject"));
+            durationLabel->setText(utils::localize.get("app_call_is_calling"));
+            durationLabel->setVisible(true);
+            //			imageMessage->setVisible(true);
+        } break;
+        case State::CALL_ENDED: {
+            bottomBar->setActive(gui::BottomBar::Side::LEFT, false);
+            bottomBar->setActive(gui::BottomBar::Side::CENTER, false);
+            bottomBar->setActive(gui::BottomBar::Side::RIGHT, false);
 
             durationLabel->setVisible(true);
             durationLabel->setText(utils::localize.get("app_call_call_ended"));
-        }break;
-		case State::CALL_IN_PROGRESS: {
-//			titleLabel->setText("CALL_IN_PROGRESS");
-			durationLabel->setVisible(true);
+        } break;
+        case State::CALL_IN_PROGRESS: {
+            //			titleLabel->setText("CALL_IN_PROGRESS");
+            durationLabel->setVisible(true);
 
-			bottomBar->setActive(gui::BottomBar::Side::LEFT, false );
-			bottomBar->setActive(gui::BottomBar::Side::CENTER, false );
-			bottomBar->setActive(gui::BottomBar::Side::RIGHT, true );
-			bottomBar->setText( gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_end_call") );
+            bottomBar->setActive(gui::BottomBar::Side::LEFT, false);
+            bottomBar->setActive(gui::BottomBar::Side::CENTER, false);
+            bottomBar->setActive(gui::BottomBar::Side::RIGHT, true);
+            bottomBar->setText(gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_end_call"));
 
             showIconsLambda();
-        }break;
-		case State::IDLE: {
-//			titleLabel->setText("IDLE");
-		}break;
-		case State::OUTGOING_CALL: {
-//			titleLabel->setText("OUTGOING_CALL");
+        } break;
+        case State::IDLE: {
+            //			titleLabel->setText("IDLE");
+        } break;
+        case State::OUTGOING_CALL: {
+            //			titleLabel->setText("OUTGOING_CALL");
 
-			bottomBar->setActive(gui::BottomBar::Side::LEFT, false );
-			bottomBar->setActive(gui::BottomBar::Side::CENTER, false );
-			bottomBar->setActive(gui::BottomBar::Side::RIGHT, true );
-			bottomBar->setText( gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_end_call") );
+            bottomBar->setActive(gui::BottomBar::Side::LEFT, false);
+            bottomBar->setActive(gui::BottomBar::Side::CENTER, false);
+            bottomBar->setActive(gui::BottomBar::Side::RIGHT, true);
+            bottomBar->setText(gui::BottomBar::Side::RIGHT, utils::localize.get("app_call_end_call"));
 
-			showIconsLambda();
+            showIconsLambda();
             durationLabel->setText(utils::localize.get("app_call_calling"));
             durationLabel->setVisible(true);
-        }break;
-	};
-}
-
-void CallWindow::setCallNumber( std::string ) {
-
-}
-
-void CallWindow::updateDuration(time_t duration)
-{
-    uint32_t seconds = 0;
-	uint32_t minutes = 0;
-	uint32_t hours = 0;
-	uint32_t days = 0;
-
-	days = duration / 86400; duration -= days*86400;
-	hours = duration / 3600; duration -= hours*3600;
-	minutes = duration / 60; duration -= minutes*60;
-	seconds = duration;
-
-	std::stringstream ss;
-	if( days ) ss<<days<<":";
-	if( hours ) ss<<hours<<":";
-	if( hours && minutes<10) ss << "0";
-	ss<<minutes << ":";
-	ss<<std::setfill('0') << std::setw(2) << seconds;
-
-	durationLabel->setText( ss.str());
-}
-
-bool CallWindow::handleSwitchData( SwitchData* data ) {
-
-	if( data == nullptr ) {
-		LOG_ERROR("Received null pointer");
-		return false;
-	}
-
-	std::string phoneNumber;
-	if(data->getDescription() == app::CallSwitchData::descriptionStr) {
-		app::CallSwitchData* callData = reinterpret_cast<app::CallSwitchData*>(data);
-		phoneNumber = callData->getPhoneNumber();
-		switch(callData->getType()) {
-			case app::CallSwitchData::Type::INCOMMING_CALL : {
-				state = State::INCOMING_CALL;
-			} break;
-
-			case app::CallSwitchData::Type::EXECUTE_CALL : {
-				state = State::OUTGOING_CALL;
-			} break;
-
-			default:
-				LOG_ERROR("Unhandled type");
-				phoneNumber = "";
-		}
-	}
-	else {
-		LOG_ERROR("Unrecognized SwitchData");
-		return false;
-	}
-
-    auto records = DBServiceAPI::ContactGetByPhoneNumber(this->application, phoneNumber);
-    if (records->size() == 1)
-    {
-        auto rec = records->operator[](0);
-        LOG_INFO("number = %s recognized as contact id = %u, name = %s", phoneNumber.c_str(), rec.dbID, rec.getFormattedName().c_str());
-        phoneNumber = rec.getFormattedName();
+        } break;
+        };
     }
-    else if (records->size() > 1)
+
+    void CallWindow::setCallNumber(std::string)
+    {}
+
+    void CallWindow::updateDuration(time_t duration)
     {
-        LOG_ERROR("number = %s recognized as more than one contact", phoneNumber.c_str());
-        for (auto i : *records)
-        {
-            LOG_ERROR("contact id = %u, name = %s", i.dbID, i.getFormattedName().c_str());
+        uint32_t seconds = 0;
+        uint32_t minutes = 0;
+        uint32_t hours   = 0;
+        uint32_t days    = 0;
+
+        days = duration / 86400;
+        duration -= days * 86400;
+        hours = duration / 3600;
+        duration -= hours * 3600;
+        minutes = duration / 60;
+        duration -= minutes * 60;
+        seconds = duration;
+
+        std::stringstream ss;
+        if (days)
+            ss << days << ":";
+        if (hours)
+            ss << hours << ":";
+        if (hours && minutes < 10)
+            ss << "0";
+        ss << minutes << ":";
+        ss << std::setfill('0') << std::setw(2) << seconds;
+
+        durationLabel->setText(ss.str());
+    }
+
+    bool CallWindow::handleSwitchData(SwitchData *data)
+    {
+
+        if (data == nullptr) {
+            LOG_ERROR("Received null pointer");
+            return false;
+        }
+
+        std::string phoneNumber;
+        if (data->getDescription() == app::CallSwitchData::descriptionStr) {
+            app::CallSwitchData *callData = reinterpret_cast<app::CallSwitchData *>(data);
+            phoneNumber                   = callData->getPhoneNumber();
+            switch (callData->getType()) {
+            case app::CallSwitchData::Type::INCOMMING_CALL: {
+                state = State::INCOMING_CALL;
+            } break;
+
+            case app::CallSwitchData::Type::EXECUTE_CALL: {
+                state = State::OUTGOING_CALL;
+            } break;
+
+            default:
+                LOG_ERROR("Unhandled type");
+                phoneNumber = "";
+            }
+        }
+        else {
+            LOG_ERROR("Unrecognized SwitchData");
+            return false;
+        }
+
+        auto records = DBServiceAPI::ContactGetByPhoneNumber(this->application, phoneNumber);
+        if (records->size() == 1) {
+            auto rec = records->operator[](0);
+            LOG_INFO("number = %s recognized as contact id = %u, name = %s",
+                     phoneNumber.c_str(),
+                     rec.dbID,
+                     rec.getFormattedName().c_str());
+            phoneNumber = rec.getFormattedName();
+        }
+        else if (records->size() > 1) {
+            LOG_ERROR("number = %s recognized as more than one contact", phoneNumber.c_str());
+            for (auto i : *records) {
+                LOG_ERROR("contact id = %u, name = %s", i.dbID, i.getFormattedName().c_str());
+            }
+        }
+        else {
+            LOG_INFO("number = %s was not recognized as any valid contact", phoneNumber.c_str());
+        }
+
+        numberLabel->setText(phoneNumber);
+
+        setVisibleState();
+        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+
+        return true;
+    }
+
+    void CallWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {}
+
+    bool CallWindow::handleLeftButton()
+    {
+        if (state == State::INCOMING_CALL) {
+            auto ret = CellularServiceAPI::AnswerIncomingCall(application);
+
+            LOG_INFO("AnswerIncomingCall: %s", (ret ? "OK" : "FAIL"));
+            return true;
+        }
+
+        return false;
+    }
+
+    bool CallWindow::handleCenterButton()
+    {
+        if (state == State::INCOMING_CALL) {
+            LOG_ERROR("TODO: Reject call and send message template");
+            return true;
+        }
+        return false;
+    }
+
+    bool CallWindow::handleRightButton()
+    {
+        switch (state) {
+        case State::INCOMING_CALL:
+        case State::OUTGOING_CALL:
+        case State::CALL_IN_PROGRESS:
+            CellularServiceAPI::HangupCall(application);
+            return true;
+            break;
+        default:
+            break;
+        }
+
+        return false;
+    }
+
+    bool CallWindow::onInput(const InputEvent &inputEvent)
+    {
+
+        LOG_INFO("key code: %d, state: %d",
+                 static_cast<uint32_t>(inputEvent.keyCode),
+                 static_cast<uint32_t>(inputEvent.state));
+
+        bool handled = false;
+
+        // process only if key is released
+        // InputEvent::State::keyReleasedLong is necessary for KeyCode::KEY_RF to properly abort the active call
+        if (inputEvent.state == InputEvent::State::keyReleasedShort ||
+            inputEvent.state == InputEvent::State::keyReleasedLong) {
+            switch (inputEvent.keyCode) {
+            case KeyCode::KEY_ENTER:
+                handled = handleCenterButton();
+                break;
+            case KeyCode::KEY_LF:
+                handled = handleLeftButton();
+                break;
+            case KeyCode::KEY_RF:
+                handled = handleRightButton();
+                break;
+            default:
+                break;
+            }
+        }
+
+        if (handled) {
+            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+            return true;
+        }
+        else {
+            return AppWindow::onInput(inputEvent);
         }
     }
-    else
-    {
-        LOG_INFO("number = %s was not recognized as any valid contact", phoneNumber.c_str());
-    }
-
-    numberLabel->setText(phoneNumber);
-
-    setVisibleState();
-	application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-
-	return true;
-}
-
-void CallWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-}
-
-bool CallWindow::handleLeftButton()
-{
-    if (state == State::INCOMING_CALL)
-    {
-        auto ret = CellularServiceAPI::AnswerIncomingCall(application);
-
-        LOG_INFO("AnswerIncomingCall: %s", (ret ? "OK" : "FAIL"));
-        return true;
-    }
-
-    return false;
-}
-
-bool CallWindow::handleCenterButton()
-{
-    if (state == State::INCOMING_CALL)
-    {
-        LOG_ERROR("TODO: Reject call and send message template");
-        return true;
-    }
-    return false;
-}
-
-bool CallWindow::handleRightButton()
-{
-    switch (state)
-    {
-    case State::INCOMING_CALL:
-    case State::OUTGOING_CALL:
-    case State::CALL_IN_PROGRESS:
-        CellularServiceAPI::HangupCall(application);
-        return true;
-        break;
-    default:
-        break;
-    }
-
-    return false;
-}
-
-bool CallWindow::onInput( const InputEvent& inputEvent ) {
-
-	LOG_INFO("key code: %d, state: %d", static_cast<uint32_t>(inputEvent.keyCode), static_cast<uint32_t>(inputEvent.state));
-	 
-	bool handled = false;
-
-    // process only if key is released
-    // InputEvent::State::keyReleasedLong is necessary for KeyCode::KEY_RF to properly abort the active call
-    if (inputEvent.state == InputEvent::State::keyReleasedShort || inputEvent.state == InputEvent::State::keyReleasedLong)
-    {
-        switch( inputEvent.keyCode ) {
-			case KeyCode::KEY_ENTER:
-				handled = handleCenterButton();
-				break;
-			case KeyCode::KEY_LF:
-				handled = handleLeftButton();
-				break;
-			case KeyCode::KEY_RF :
-				handled = handleRightButton();
-				break;
-			default:
-				break;	
-		}
-    }
-
-    if( handled ) {
-		application->refreshWindow( RefreshModes::GUI_REFRESH_FAST);
-		return true;
-	}
-    else
-    {
-        return AppWindow::onInput(inputEvent);
-    }
-}
 
 } /* namespace gui */
-
diff --git a/module-apps/application-call/windows/CallWindow.hpp b/module-apps/application-call/windows/CallWindow.hpp
index bf92fcd63..7cafd4932 100644
--- a/module-apps/application-call/windows/CallWindow.hpp
+++ b/module-apps/application-call/windows/CallWindow.hpp
@@ -13,75 +13,81 @@
 #include "Rect.hpp"
 #include "Image.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class CallWindow: public AppWindow {
-public:
-	enum class State {
-		IDLE,
-		INCOMING_CALL,
-		OUTGOING_CALL,
-		CALL_IN_PROGRESS,
-		CALL_ENDED
-	};
-protected:
+    /*
+     *
+     */
+    class CallWindow : public AppWindow
+    {
+      public:
+        enum class State
+        {
+            IDLE,
+            INCOMING_CALL,
+            OUTGOING_CALL,
+            CALL_IN_PROGRESS,
+            CALL_ENDED
+        };
 
-	enum class FocusRects {
-		Speaker,
-		Micrphone,
-	};
+      protected:
+        enum class FocusRects
+        {
+            Speaker,
+            Micrphone,
+        };
 
-	enum class AudioState {
-		ON,
-		OFF
-	};
-//	gui::Label* titleLabel = nullptr;
-	//used to display both nnumber and name of contact
-	gui::Label* numberLabel = nullptr;
-	//used to inform user about call state of call and display duration of call
-	gui::Label* durationLabel = nullptr;
+        enum class AudioState
+        {
+            ON,
+            OFF
+        };
+        //	gui::Label* titleLabel = nullptr;
+        // used to display both nnumber and name of contact
+        gui::Label *numberLabel = nullptr;
+        // used to inform user about call state of call and display duration of call
+        gui::Label *durationLabel = nullptr;
 
-	gui::Image* imageSpeaker[2] = {nullptr,nullptr};
-	gui::Image* imageMicrophone[2] = {nullptr,nullptr};
-	gui::Rect* rects[2] = {nullptr};
-	gui::Image* imageMessage = nullptr;
-	gui::Image* imageCircleTop = nullptr;
-	gui::Image* imageCircleBottom = nullptr;
+        gui::Image *imageSpeaker[2]    = {nullptr, nullptr};
+        gui::Image *imageMicrophone[2] = {nullptr, nullptr};
+        gui::Rect *rects[2]            = {nullptr};
+        gui::Image *imageMessage       = nullptr;
+        gui::Image *imageCircleTop     = nullptr;
+        gui::Image *imageCircleBottom  = nullptr;
 
-	AudioState microphoneState = AudioState::ON;
-	AudioState speakerState = AudioState::OFF;
+        AudioState microphoneState = AudioState::ON;
+        AudioState speakerState    = AudioState::OFF;
 
-	State state = State::IDLE;
-	/**
-	 * Manipulates widgets to handle currently set state of the window.
-	 */
-	void setVisibleState();
-	bool handleLeftButton();
-	bool handleCenterButton();
-	bool handleRightButton();
-public:
-  CallWindow(app::Application *app, std::string windowName = app::window::name_call);
-  virtual ~CallWindow();
+        State state = State::IDLE;
+        /**
+         * Manipulates widgets to handle currently set state of the window.
+         */
+        void setVisibleState();
+        bool handleLeftButton();
+        bool handleCenterButton();
+        bool handleRightButton();
 
-  /**
-   * Used by application to update window's state
-   */
-  void setState(State state);
-  const State &getState();
-  void updateDuration(time_t duration);
-  void setCallNumber(std::string);
+      public:
+        CallWindow(app::Application *app, std::string windowName = app::window::name_call);
+        virtual ~CallWindow();
 
-  bool onInput(const InputEvent &inputEvent) override;
-  void onBeforeShow(ShowMode mode, SwitchData *data) override;
-  bool handleSwitchData(SwitchData *data) override;
+        /**
+         * Used by application to update window's state
+         */
+        void setState(State state);
+        const State &getState();
+        void updateDuration(time_t duration);
+        void setCallNumber(std::string);
 
-  void rebuild() override;
-  void buildInterface() override;
-  void destroyInterface() override;
-};
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool handleSwitchData(SwitchData *data) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-call/windows/EmergencyCallWindow.cpp b/module-apps/application-call/windows/EmergencyCallWindow.cpp
index 9ace351a5..f423c9737 100644
--- a/module-apps/application-call/windows/EmergencyCallWindow.cpp
+++ b/module-apps/application-call/windows/EmergencyCallWindow.cpp
@@ -13,41 +13,47 @@
 #include "i18/i18.hpp"
 #include "EmergencyCallWindow.hpp"
 
-namespace gui {
+namespace gui
+{
 
-    EmergencyCallWindow::EmergencyCallWindow(app::Application *app) : EnterNumberWindow(app, app::window::name_emergencyCall)
+    EmergencyCallWindow::EmergencyCallWindow(app::Application *app)
+        : EnterNumberWindow(app, app::window::name_emergencyCall)
     {
 
         numberLabel->setText(utils::localize.get("app_call_emergency"));
     }
 
-void EmergencyCallWindow::rebuild() {
+    void EmergencyCallWindow::rebuild()
+    {}
+    void EmergencyCallWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+    }
+    void EmergencyCallWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+    }
 
-}
-void EmergencyCallWindow::buildInterface() {
-	AppWindow::buildInterface();
-}
-void EmergencyCallWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-}
+    EmergencyCallWindow::~EmergencyCallWindow()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
-EmergencyCallWindow::~EmergencyCallWindow() {
-	// TODO Auto-generated destructor stub
-}
+    bool EmergencyCallWindow::onInput(const InputEvent &inputEvent)
+    {
+        bool ret = EnterNumberWindow::onInput(inputEvent);
 
-bool EmergencyCallWindow::onInput( const InputEvent& inputEvent ) {
-	bool ret = EnterNumberWindow::onInput( inputEvent );
+        //	if( number.empty() ) {
+        //		numberLabel->setText( utils::localize.get("app_call_emergency") );
+        //	}
 
-//	if( number.empty() ) {
-//		numberLabel->setText( utils::localize.get("app_call_emergency") );
-//	}
+        return ret;
+    }
+    bool EmergencyCallWindow::handleSwitchData(SwitchData *data)
+    {
+        bool ret = EnterNumberWindow::handleSwitchData(data);
 
-	return ret;
-}
-bool EmergencyCallWindow::handleSwitchData( SwitchData* data ) {
-	bool ret = EnterNumberWindow::handleSwitchData( data );
-
-	return ret;
-}
+        return ret;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-call/windows/EmergencyCallWindow.hpp b/module-apps/application-call/windows/EmergencyCallWindow.hpp
index 26ba0ee2c..0e63a671b 100644
--- a/module-apps/application-call/windows/EmergencyCallWindow.hpp
+++ b/module-apps/application-call/windows/EmergencyCallWindow.hpp
@@ -11,23 +11,25 @@
 
 #include "EnterNumberWindow.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class EmergencyCallWindow: public EnterNumberWindow {
-public:
-	EmergencyCallWindow( app::Application* app );
-	virtual ~EmergencyCallWindow();
+    /*
+     *
+     */
+    class EmergencyCallWindow : public EnterNumberWindow
+    {
+      public:
+        EmergencyCallWindow(app::Application *app);
+        virtual ~EmergencyCallWindow();
 
-	bool onInput( const InputEvent& inputEvent ) override;
-	bool handleSwitchData( SwitchData* data ) override;
+        bool onInput(const InputEvent &inputEvent) override;
+        bool handleSwitchData(SwitchData *data) override;
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-call/windows/EnterNumberWindow.cpp b/module-apps/application-call/windows/EnterNumberWindow.cpp
index ed1e4cab6..26910947e 100644
--- a/module-apps/application-call/windows/EnterNumberWindow.cpp
+++ b/module-apps/application-call/windows/EnterNumberWindow.cpp
@@ -19,200 +19,205 @@
 #include <ContactRecord.hpp>
 #include <application-phonebook/windows/PhonebookContact.hpp>
 
-namespace gui {
-
-using namespace callAppStyle::enterNumberWindow;
-
-EnterNumberWindow::EnterNumberWindow( app::Application* app, std::string windowName ) : AppWindow(app, windowName ) {
-	buildInterface();
-}
-
-void EnterNumberWindow::rebuild() {
-
-}
-
-void EnterNumberWindow::setNumberLabel(const std::string num)
+namespace gui
 {
-    auto app = dynamic_cast<app::ApplicationCall *>(application);
-    if (app == nullptr)
-	{
-		LOG_ERROR("app != ApplicationCall");
-        return;
-    }
-    app->setDisplayedNumber(num);
 
-	numberLabel->setText(num);
+    using namespace callAppStyle::enterNumberWindow;
 
-	if(numberLabel->getText().length() == 0)
-	{
-		bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
-        return;
-    }
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("app_call_clear"));
-}
-
-void EnterNumberWindow::buildInterface() {
-
-	AppWindow::buildInterface();
-
-	bottomBar->setText( BottomBar::Side::LEFT, utils::localize.get("app_call_call"));
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("app_call_add"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("app_call_clear"));
-
-	topBar->setActive(TopBar::Elements::SIGNAL, true );
-	topBar->setActive(TopBar::Elements::BATTERY, true );
-	topBar->setActive(TopBar::Elements::TIME, true );
-
-	numberLabel = new gui::Label(this, numberLabel::x, numberLabel::y, numberLabel::w, numberLabel::h);
-	numberLabel->setPenWidth(numberLabel::borderW);
-	numberLabel->setFont(style::window::font::verybig);
-	numberLabel->setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM );
-	numberLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_TOP));
-    numberLabel->setDotsMode( true, false);
-
-    newContactIcon = new gui::Icon(this, newContactIcon::x, newContactIcon::y, "cross", utils::localize.get("app_call_contact"));
-    newContactIcon->activatedCallback = [=](gui::Item &item) { return addNewContact(); };
-    setFocusItem(newContactIcon);
-}
-
-bool EnterNumberWindow::addNewContact()
-{
-    auto app = dynamic_cast<app::ApplicationCall *>(application);
-    if (app != nullptr)
+    EnterNumberWindow::EnterNumberWindow(app::Application *app, std::string windowName) : AppWindow(app, windowName)
     {
-        auto phoneNumber = app->getDisplayedNumber();
-        return app::contact(getApplication(), app::ContactOperation::Add, phoneNumber);
+        buildInterface();
     }
-    return false;
-}
 
-void EnterNumberWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	if( numberLabel ) { removeWidget(numberLabel); delete numberLabel; numberLabel= nullptr; }
-	if( newContactIcon ) { removeWidget(newContactIcon); delete newContactIcon; newContactIcon= nullptr; }
-	children.clear();
-}
+    void EnterNumberWindow::rebuild()
+    {}
 
-EnterNumberWindow::~EnterNumberWindow() {
-	destroyInterface();
-}
-
-bool EnterNumberWindow::onInput( const InputEvent& inputEvent ) {
-    auto app = dynamic_cast<app::ApplicationCall *>(application);
-    if (app == nullptr)
+    void EnterNumberWindow::setNumberLabel(const std::string num)
     {
-        LOG_ERROR("app != ApplicationCall");
-        return AppWindow::onInput(inputEvent);
-    }
-    auto code = translator.handle(inputEvent.key, InputMode({InputMode::phone}).get());
-    if( inputEvent.state == InputEvent::State::keyReleasedShort ) {
-        if(inputEvent.keyCode == KeyCode::KEY_LF) {
-			std::string num = app->getDisplayedNumber();
-			LOG_INFO("number: [%s]", num.c_str());
-			auto ret = CellularServiceAPI::DialNumber(application,num.c_str());
-			LOG_INFO("CALL RESULT: %s", (ret?"OK":"FAIL"));
-            return true;
+        auto app = dynamic_cast<app::ApplicationCall *>(application);
+        if (app == nullptr) {
+            LOG_ERROR("app != ApplicationCall");
+            return;
         }
-        else if(inputEvent.keyCode == KeyCode::KEY_RF) {
-			std::string num = app->getDisplayedNumber();
-			//if there isn't any char in phone number field return to previous application
-			if( num.empty() ) {
-				sapm::ApplicationManager::messageSwitchPreviousApplication( application );
-				return true;
-			}
+        app->setDisplayedNumber(num);
 
-			num = num.substr(0, num.size()-1);
-            setNumberLabel(num);
+        numberLabel->setText(num);
 
-            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-
-			return true;
-		}
-        else if (code != 0)
-        {
-			std::string num = app->getDisplayedNumber();
-            num += code;
-            setNumberLabel(num);
-
-            app->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-
-            return true;
-        }
-    }
-	else if( inputEvent.state == InputEvent::State::keyReleasedLong) {
-		//erase all characters from phone number
-		if(inputEvent.keyCode == KeyCode::KEY_RF) {
-			std::string num = app->getDisplayedNumber();
-			//if there isn't any char in phone number field return to previous application
-			if( num.empty() ) {
-				sapm::ApplicationManager::messageSwitchPreviousApplication( application );
-				return true;
-			}
-
-            setNumberLabel("");
-
-            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-
-            return true;
-        }
-        // long press of '0' key is translated to '+'
-        else if (inputEvent.keyCode == KeyCode::KEY_0)
-        {
-            std::string num = app->getDisplayedNumber();
-            num += '+';
-            setNumberLabel(num);
-
-            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-
-			return true;
+        if (numberLabel->getText().length() == 0) {
+            bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+            return;
         }
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_call_clear"));
     }
 
-    //check if any of the lower inheritance onInput methods catch the event
-	return AppWindow::onInput( inputEvent );
-}
-
-bool EnterNumberWindow::handleSwitchData( SwitchData* data ) {
-
-	if( data == nullptr )
-	{
-		LOG_ERROR("Received null pointer");
-		return false;
-	}
-
-    app::CallSwitchData *callData = dynamic_cast<app::CallSwitchData *>(data);
-    if (callData != nullptr)
+    void EnterNumberWindow::buildInterface()
     {
-        std::string num = callData->getPhoneNumber();
-        setNumberLabel(num);
-        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-        switch (callData->getType())
-        {
-        case app::CallSwitchData::Type::EXECUTE_CALL: {
-            LOG_INFO("number: [%s]", num.c_str());
-            auto ret = CellularServiceAPI::DialNumber(application, num.c_str());
-            LOG_INFO("CALL RESULT: %s", (ret ? "OK" : "FAIL"));
-            return true;
-        }
 
-        case app::CallSwitchData::Type::ENTER_NUMBER: {
-            return true;
-        }
-        break;
+        AppWindow::buildInterface();
 
-        default: {
-            LOG_ERROR("Unhandled callData type");
-            return false;
-        }
-        }
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_call_call"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_call_add"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_call_clear"));
+
+        topBar->setActive(TopBar::Elements::SIGNAL, true);
+        topBar->setActive(TopBar::Elements::BATTERY, true);
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        numberLabel = new gui::Label(this, numberLabel::x, numberLabel::y, numberLabel::w, numberLabel::h);
+        numberLabel->setPenWidth(numberLabel::borderW);
+        numberLabel->setFont(style::window::font::verybig);
+        numberLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        numberLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_TOP));
+        numberLabel->setDotsMode(true, false);
+
+        newContactIcon =
+            new gui::Icon(this, newContactIcon::x, newContactIcon::y, "cross", utils::localize.get("app_call_contact"));
+        newContactIcon->activatedCallback = [=](gui::Item &item) { return addNewContact(); };
+        setFocusItem(newContactIcon);
     }
-    else
+
+    bool EnterNumberWindow::addNewContact()
     {
-        LOG_ERROR("Unrecognized SwitchData");
+        auto app = dynamic_cast<app::ApplicationCall *>(application);
+        if (app != nullptr) {
+            auto phoneNumber = app->getDisplayedNumber();
+            return app::contact(getApplication(), app::ContactOperation::Add, phoneNumber);
+        }
         return false;
     }
 
-    return false;
-}
+    void EnterNumberWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        if (numberLabel) {
+            removeWidget(numberLabel);
+            delete numberLabel;
+            numberLabel = nullptr;
+        }
+        if (newContactIcon) {
+            removeWidget(newContactIcon);
+            delete newContactIcon;
+            newContactIcon = nullptr;
+        }
+        children.clear();
+    }
+
+    EnterNumberWindow::~EnterNumberWindow()
+    {
+        destroyInterface();
+    }
+
+    bool EnterNumberWindow::onInput(const InputEvent &inputEvent)
+    {
+        auto app = dynamic_cast<app::ApplicationCall *>(application);
+        if (app == nullptr) {
+            LOG_ERROR("app != ApplicationCall");
+            return AppWindow::onInput(inputEvent);
+        }
+        auto code = translator.handle(inputEvent.key, InputMode({InputMode::phone}).get());
+        if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+            if (inputEvent.keyCode == KeyCode::KEY_LF) {
+                std::string num = app->getDisplayedNumber();
+                LOG_INFO("number: [%s]", num.c_str());
+                auto ret = CellularServiceAPI::DialNumber(application, num.c_str());
+                LOG_INFO("CALL RESULT: %s", (ret ? "OK" : "FAIL"));
+                return true;
+            }
+            else if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                std::string num = app->getDisplayedNumber();
+                // if there isn't any char in phone number field return to previous application
+                if (num.empty()) {
+                    sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+                    return true;
+                }
+
+                num = num.substr(0, num.size() - 1);
+                setNumberLabel(num);
+
+                application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+
+                return true;
+            }
+            else if (code != 0) {
+                std::string num = app->getDisplayedNumber();
+                num += code;
+                setNumberLabel(num);
+
+                app->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+
+                return true;
+            }
+        }
+        else if (inputEvent.state == InputEvent::State::keyReleasedLong) {
+            // erase all characters from phone number
+            if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                std::string num = app->getDisplayedNumber();
+                // if there isn't any char in phone number field return to previous application
+                if (num.empty()) {
+                    sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+                    return true;
+                }
+
+                setNumberLabel("");
+
+                application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+
+                return true;
+            }
+            // long press of '0' key is translated to '+'
+            else if (inputEvent.keyCode == KeyCode::KEY_0) {
+                std::string num = app->getDisplayedNumber();
+                num += '+';
+                setNumberLabel(num);
+
+                application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+
+                return true;
+            }
+        }
+
+        // check if any of the lower inheritance onInput methods catch the event
+        return AppWindow::onInput(inputEvent);
+    }
+
+    bool EnterNumberWindow::handleSwitchData(SwitchData *data)
+    {
+
+        if (data == nullptr) {
+            LOG_ERROR("Received null pointer");
+            return false;
+        }
+
+        app::CallSwitchData *callData = dynamic_cast<app::CallSwitchData *>(data);
+        if (callData != nullptr) {
+            std::string num = callData->getPhoneNumber();
+            setNumberLabel(num);
+            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+            switch (callData->getType()) {
+            case app::CallSwitchData::Type::EXECUTE_CALL: {
+                LOG_INFO("number: [%s]", num.c_str());
+                auto ret = CellularServiceAPI::DialNumber(application, num.c_str());
+                LOG_INFO("CALL RESULT: %s", (ret ? "OK" : "FAIL"));
+                return true;
+            }
+
+            case app::CallSwitchData::Type::ENTER_NUMBER: {
+                return true;
+            } break;
+
+            default: {
+                LOG_ERROR("Unhandled callData type");
+                return false;
+            }
+            }
+        }
+        else {
+            LOG_ERROR("Unrecognized SwitchData");
+            return false;
+        }
+
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-call/windows/EnterNumberWindow.hpp b/module-apps/application-call/windows/EnterNumberWindow.hpp
index 6c0b24600..7626d326b 100644
--- a/module-apps/application-call/windows/EnterNumberWindow.hpp
+++ b/module-apps/application-call/windows/EnterNumberWindow.hpp
@@ -18,35 +18,36 @@
 #include "gui/widgets/Window.hpp"
 #include <ContactRecord.hpp>
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class EnterNumberWindow: public AppWindow {
-protected:
-  gui::Label *numberLabel = nullptr;
-  gui::Icon *newContactIcon = nullptr;
+    /*
+     *
+     */
+    class EnterNumberWindow : public AppWindow
+    {
+      protected:
+        gui::Label *numberLabel   = nullptr;
+        gui::Icon *newContactIcon = nullptr;
 
-  void setNumberLabel(const std::string num);
+        void setNumberLabel(const std::string num);
 
-public:
-  EnterNumberWindow() = delete;
-  EnterNumberWindow(app::Application *app, std::string windowName = app::window::name_enterNumber);
-  virtual ~EnterNumberWindow();
+      public:
+        EnterNumberWindow() = delete;
+        EnterNumberWindow(app::Application *app, std::string windowName = app::window::name_enterNumber);
+        virtual ~EnterNumberWindow();
 
-  bool onInput(const InputEvent &inputEvent) override;
-  bool handleSwitchData(SwitchData *data) override;
+        bool onInput(const InputEvent &inputEvent) override;
+        bool handleSwitchData(SwitchData *data) override;
 
-  void rebuild() override;
-  void buildInterface() override;
-  void destroyInterface() override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
 
-private:
-  gui::KeyInputMappedTranslation translator;
+      private:
+        gui::KeyInputMappedTranslation translator;
 
-  bool addNewContact();
-};
+        bool addNewContact();
+    };
 
 } /* namespace gui */
-
diff --git a/module-apps/application-calllog/ApplicationCallLog.cpp b/module-apps/application-calllog/ApplicationCallLog.cpp
index f7771503f..6e3d8eeed 100644
--- a/module-apps/application-calllog/ApplicationCallLog.cpp
+++ b/module-apps/application-calllog/ApplicationCallLog.cpp
@@ -21,122 +21,125 @@
 
 using namespace calllog;
 
-namespace app {
-
-ApplicationCallLog::ApplicationCallLog(std::string name, std::string parent, bool startBackgound) :
-	Application( name, parent, startBackgound, 4096 ) {
-}
-
-ApplicationCallLog::~ApplicationCallLog() {
-	LOG_INFO("ApplicationCallLog::destroy");
-}
-
-// Invoked upon receiving data message
-sys::Message_t ApplicationCallLog::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode == sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
-
-	auto handled = false;
-
-	//handle database response
-	if( resp != nullptr ) {
-		handled = true;
-        switch (resp->responseTo)
-        {
-        case MessageType::DBCalllogGetLimitOffset: {
-            if (getCurrentWindow()->onDatabaseMessage(resp))
-            {
-                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-            }
-            break;
-        }
-        default:
-            break;
-        }
-    }
-
-	if( handled ) {
-		return std::make_shared<sys::ResponseMessage>();
-	}
-	else {
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-	}
-}
-
-// Invoked during initialization
-sys::ReturnCodes ApplicationCallLog::InitHandler() {
-	auto ret = Application::InitHandler();
-	if(ret != sys::ReturnCodes::Success) return ret;
-
-	createUserInterface();
-
-	setActiveWindow(calllog::settings::MainWindowStr);
-
-	return ret;
-}
-
-sys::ReturnCodes ApplicationCallLog::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
-
-void ApplicationCallLog::createUserInterface() {
-
-	gui::AppWindow* window = nullptr;
-
-	window = new gui::CallLogMainWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-
-	window = new gui::CallLogDetailsWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-
-    windowOptions = gui::newOptionWindow(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(windowOptions->getName(), windowOptions));
-
-    window = new gui::Dialog(this, calllog::settings::CallDeleteWindowStr,
-                             {
-                                 .title = "",
-                                 .icon = "phonebook_contact_delete_trashcan",
-                                 .text = utils::localize.get("app_calllog_delete_call_confirmation"),
-                                 .action = []() -> bool {
-                                     LOG_INFO("!");
-                                     return true;
-                                 },
-                             });
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
-}
-
-void ApplicationCallLog::destroyUserInterface() {
-}
-
-bool ApplicationCallLog::removeCalllogEntry(const CalllogRecord &record)
+namespace app
 {
-    LOG_DEBUG("Removing CalllogRecord: %d", record.ID);
-    auto dialog = dynamic_cast<gui::Dialog *>(windows[calllog::settings::CallDeleteWindowStr]);
-    if (dialog != nullptr)
+
+    ApplicationCallLog::ApplicationCallLog(std::string name, std::string parent, bool startBackgound)
+        : Application(name, parent, startBackgound, 4096)
+    {}
+
+    ApplicationCallLog::~ApplicationCallLog()
     {
-        auto meta = dialog->meta;
-        meta.action = [=]() -> bool {
-            if (DBServiceAPI::CalllogRemove(this, record.ID) == false)
-            {
-                LOG_ERROR("CalllogRemove id=%u failed", record.ID);
-                return false;
+        LOG_INFO("ApplicationCallLog::destroy");
+    }
+
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationCallLog::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
+
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
+
+        auto handled = false;
+
+        // handle database response
+        if (resp != nullptr) {
+            handled = true;
+            switch (resp->responseTo) {
+            case MessageType::DBCalllogGetLimitOffset: {
+                if (getCurrentWindow()->onDatabaseMessage(resp)) {
+                    refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+                }
+                break;
             }
-            this->switchWindow(calllog::settings::MainWindowStr);
-            return true;
-        };
-        meta.title = record.name;
-        dialog->update(meta);
-        return switchWindow(calllog::settings::CallDeleteWindowStr, nullptr);
+            default:
+                break;
+            }
+        }
+
+        if (handled) {
+            return std::make_shared<sys::ResponseMessage>();
+        }
+        else {
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+        }
     }
-    else
+
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationCallLog::InitHandler()
     {
-        LOG_ERROR("Dialog bad type!");
-        return false;
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
+
+        createUserInterface();
+
+        setActiveWindow(calllog::settings::MainWindowStr);
+
+        return ret;
+    }
+
+    sys::ReturnCodes ApplicationCallLog::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
+
+    void ApplicationCallLog::createUserInterface()
+    {
+
+        gui::AppWindow *window = nullptr;
+
+        window = new gui::CallLogMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+
+        window = new gui::CallLogDetailsWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+
+        windowOptions = gui::newOptionWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(windowOptions->getName(), windowOptions));
+
+        window = new gui::Dialog(this,
+                                 calllog::settings::CallDeleteWindowStr,
+                                 {
+                                     .title  = "",
+                                     .icon   = "phonebook_contact_delete_trashcan",
+                                     .text   = utils::localize.get("app_calllog_delete_call_confirmation"),
+                                     .action = []() -> bool {
+                                         LOG_INFO("!");
+                                         return true;
+                                     },
+                                 });
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
+
+    void ApplicationCallLog::destroyUserInterface()
+    {}
+
+    bool ApplicationCallLog::removeCalllogEntry(const CalllogRecord &record)
+    {
+        LOG_DEBUG("Removing CalllogRecord: %d", record.ID);
+        auto dialog = dynamic_cast<gui::Dialog *>(windows[calllog::settings::CallDeleteWindowStr]);
+        if (dialog != nullptr) {
+            auto meta   = dialog->meta;
+            meta.action = [=]() -> bool {
+                if (DBServiceAPI::CalllogRemove(this, record.ID) == false) {
+                    LOG_ERROR("CalllogRemove id=%u failed", record.ID);
+                    return false;
+                }
+                this->switchWindow(calllog::settings::MainWindowStr);
+                return true;
+            };
+            meta.title = record.name;
+            dialog->update(meta);
+            return switchWindow(calllog::settings::CallDeleteWindowStr, nullptr);
+        }
+        else {
+            LOG_ERROR("Dialog bad type!");
+            return false;
+        }
     }
-}
 
 } /* namespace app */
diff --git a/module-apps/application-calllog/ApplicationCallLog.hpp b/module-apps/application-calllog/ApplicationCallLog.hpp
index e7ed8de36..82c7fa448 100644
--- a/module-apps/application-calllog/ApplicationCallLog.hpp
+++ b/module-apps/application-calllog/ApplicationCallLog.hpp
@@ -12,29 +12,33 @@
 #include <CalllogRecord.hpp>
 #include <OptionWindow.hpp>
 
-namespace app {
+namespace app
+{
 
-const inline std::string CallLogAppStr = "ApplicationCallLog";
+    const inline std::string CallLogAppStr = "ApplicationCallLog";
 
-class ApplicationCallLog: public Application {
-protected:
-public:
-	ApplicationCallLog( std::string name=CallLogAppStr, std::string parent = "", bool startBackgound = false);
-	virtual ~ApplicationCallLog();
+    class ApplicationCallLog : public Application
+    {
+      protected:
+      public:
+        ApplicationCallLog(std::string name = CallLogAppStr, std::string parent = "", bool startBackgound = false);
+        virtual ~ApplicationCallLog();
 
-    gui::OptionWindow *windowOptions = nullptr;
+        gui::OptionWindow *windowOptions = nullptr;
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final {return sys::ReturnCodes::Success;}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-	void createUserInterface() final;
-	void destroyUserInterface() final;
+        void createUserInterface() final;
+        void destroyUserInterface() final;
 
-    bool removeCalllogEntry(const CalllogRecord &record);
-};
+        bool removeCalllogEntry(const CalllogRecord &record);
+    };
 
 } /* namespace app */
-
diff --git a/module-apps/application-calllog/CalllogModel.cpp b/module-apps/application-calllog/CalllogModel.cpp
index 7bd931f5a..c782d6b2a 100644
--- a/module-apps/application-calllog/CalllogModel.cpp
+++ b/module-apps/application-calllog/CalllogModel.cpp
@@ -16,64 +16,71 @@ using namespace calllog;
 
 #define DEBUG_CALLLOG_DB_ACCESS 0
 
-CalllogModel::CalllogModel( app::Application* app) : DatabaseModel( app, calllog::settings::pageSize ){
+CalllogModel::CalllogModel(app::Application *app) : DatabaseModel(app, calllog::settings::pageSize)
+{}
 
+void CalllogModel::requestRecordsCount()
+{
+#if (DEBUG_CALLLOG_DB_ACCESS)
+    auto tstamp = xTaskGetTickCount();
+#endif
+    recordsCount = DBServiceAPI::CalllogGetCount(application);
+#if (DEBUG_CALLLOG_DB_ACCESS)
+    LOG_INFO("DBServiceAPI::CalllogGetCount %d records %d ms", recordsCount, xTaskGetTickCount() - tstamp);
+#endif
+
+    // request first and second page if possible
+    if (recordsCount > 0) {
+        LOG_INFO("DBServiceAPI::CalllogGetCount CalllogGetLimitOffset");
+        DBServiceAPI::CalllogGetLimitOffset(application, 0, pageSize);
+        if (recordsCount >= pageSize) {
+            DBServiceAPI::CalllogGetLimitOffset(application, pageSize, pageSize);
+        }
+    }
 }
 
-void CalllogModel::requestRecordsCount() {
-  #if(DEBUG_CALLLOG_DB_ACCESS)
-	auto tstamp = xTaskGetTickCount();
-  #endif
-	recordsCount = DBServiceAPI::CalllogGetCount(application);
-  #if(DEBUG_CALLLOG_DB_ACCESS)
-	LOG_INFO("DBServiceAPI::CalllogGetCount %d records %d ms", recordsCount, xTaskGetTickCount() - tstamp);
-  #endif
-
-	//request first and second page if possible
-	if( recordsCount > 0 ){
-		LOG_INFO("DBServiceAPI::CalllogGetCount CalllogGetLimitOffset");
-		DBServiceAPI::CalllogGetLimitOffset(application, 0, pageSize );
-		if( recordsCount >= pageSize ) {
-			DBServiceAPI::CalllogGetLimitOffset(application, pageSize, pageSize );
-		}
-	}
+void CalllogModel::requestRecords(const uint32_t offset, const uint32_t limit)
+{
+    DBServiceAPI::CalllogGetLimitOffset(application, offset, limit);
 }
 
-void CalllogModel::requestRecords( const uint32_t offset, const uint32_t limit ) {
-	DBServiceAPI::CalllogGetLimitOffset(application, offset, limit );
+bool CalllogModel::updateRecords(std::unique_ptr<std::vector<CalllogRecord>> records,
+                                 const uint32_t offset,
+                                 const uint32_t limit,
+                                 uint32_t count)
+{
+
+    LOG_INFO("Offset: %d, Limit: %d Count:%d", offset, limit, count);
+    //	for( uint32_t i=0; i<records.get()->size(); ++i ) {
+    //		LOG_INFO("id: %d, ", records.get()->operator [](i).ID, records.get()->operator [](i).path.c_str());
+    //	}
+
+    DatabaseModel::updateRecords(std::move(records), offset, limit, count);
+
+    return true;
 }
 
-bool CalllogModel::updateRecords( std::unique_ptr<std::vector<CalllogRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count ) {
+gui::ListItem *CalllogModel::getItem(
+    int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown)
+{
+    std::shared_ptr<CalllogRecord> call = getRecord(index);
+    SettingsRecord &settings            = application->getSettings();
+    if (call.get() == nullptr) {
+        // LOG_ERROR("getItem nullptr");
+        return nullptr;
+    }
+    auto item = new gui::CalllogItem(this, !settings.timeFormat12);
+    if (item != nullptr) {
+        item->setCall(call);
+        item->setID(index);
+        item->activatedCallback = [=](gui::Item &item) { // TODO: alek: this is not the best place for this
+            LOG_INFO("activatedCallback");
+            std::unique_ptr<gui::SwitchData> data = std::make_unique<calllog::CallLogSwitchData>(*call);
+            application->switchWindow(calllog::settings::DetailsWindowStr, std::move(data));
+            return true;
+        };
+        return item;
+    }
 
-	LOG_INFO("Offset: %d, Limit: %d Count:%d", offset, limit, count);
-//	for( uint32_t i=0; i<records.get()->size(); ++i ) {
-//		LOG_INFO("id: %d, ", records.get()->operator [](i).ID, records.get()->operator [](i).path.c_str());
-//	}
-
-	DatabaseModel::updateRecords( std::move(records), offset, limit, count );
-
-	return true;
-}
-
-gui::ListItem* CalllogModel::getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown ) {
-	std::shared_ptr<CalllogRecord> call = getRecord( index );
-	SettingsRecord& settings = application->getSettings();
-	if ( call.get() ==  nullptr ){
-		//LOG_ERROR("getItem nullptr");
-		return nullptr;
-	}
-	auto item = new gui::CalllogItem(this, !settings.timeFormat12 );
-	if( item != nullptr ) {
-		item->setCall(call);
-		item->setID( index );
-		item->activatedCallback = [=] (gui::Item& item){ // TODO: alek: this is not the best place for this
-			LOG_INFO("activatedCallback");
-			std::unique_ptr<gui::SwitchData> data = std::make_unique<calllog::CallLogSwitchData>(*call);
-			application->switchWindow(calllog::settings::DetailsWindowStr, std::move(data));
-			return true;
-		};
-		return item;
-	}
-
-	return nullptr;
+    return nullptr;
 }
diff --git a/module-apps/application-calllog/CalllogModel.hpp b/module-apps/application-calllog/CalllogModel.hpp
index 5432bd552..2d602157d 100644
--- a/module-apps/application-calllog/CalllogModel.hpp
+++ b/module-apps/application-calllog/CalllogModel.hpp
@@ -19,18 +19,26 @@
 /*
  *
  */
-class CalllogModel: public app::DatabaseModel<CalllogRecord>, public gui::ListItemProvider {
-public:
-	CalllogModel() = delete;
-	CalllogModel( app::Application* app );
-	virtual ~CalllogModel() = default;
+class CalllogModel : public app::DatabaseModel<CalllogRecord>, public gui::ListItemProvider
+{
+  public:
+    CalllogModel() = delete;
+    CalllogModel(app::Application *app);
+    virtual ~CalllogModel() = default;
 
-	//virtual methods
-	void requestRecordsCount() override;
-	bool updateRecords( std::unique_ptr<std::vector<CalllogRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count ) override;
-	void requestRecords( const uint32_t offset, const uint32_t limit ) override;
+    // virtual methods
+    void requestRecordsCount() override;
+    bool updateRecords(std::unique_ptr<std::vector<CalllogRecord>> records,
+                       const uint32_t offset,
+                       const uint32_t limit,
+                       uint32_t count) override;
+    void requestRecords(const uint32_t offset, const uint32_t limit) override;
 
-	//virtual methods for ListViewProvider
-	gui::ListItem* getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown ) override;
-	int getItemCount() const override { return recordsCount; };
+    // virtual methods for ListViewProvider
+    gui::ListItem *getItem(
+        int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown) override;
+    int getItemCount() const override
+    {
+        return recordsCount;
+    };
 };
diff --git a/module-apps/application-calllog/data/CallLogInternals.hpp b/module-apps/application-calllog/data/CallLogInternals.hpp
index 50ff4f09b..bef638434 100644
--- a/module-apps/application-calllog/data/CallLogInternals.hpp
+++ b/module-apps/application-calllog/data/CallLogInternals.hpp
@@ -13,29 +13,36 @@
 #include "CalllogRecord.hpp"
 #include <string>
 
-namespace calllog {
+namespace calllog
+{
 
-    enum CallLogCallType {
-		IN = 0,
-		OUT = 1,
-		MISSED = 2,
-		NUM_OF_CALL_TYPES
-	};
+    enum CallLogCallType
+    {
+        IN     = 0,
+        OUT    = 1,
+        MISSED = 2,
+        NUM_OF_CALL_TYPES
+    };
 
-    inline CallLogCallType toCallLogCallType(const CallType type) {
-        switch(type) {
-		case CallType::CT_INCOMING: return CallLogCallType::IN;
-		case CallType::CT_OUTGOING: return CallLogCallType::OUT;
-		default: /* rest */         return CallLogCallType::MISSED;
-        } 
+    inline CallLogCallType toCallLogCallType(const CallType type)
+    {
+        switch (type) {
+        case CallType::CT_INCOMING:
+            return CallLogCallType::IN;
+        case CallType::CT_OUTGOING:
+            return CallLogCallType::OUT;
+        default: /* rest */
+            return CallLogCallType::MISSED;
+        }
     }
 
-	namespace settings {
-		// Windows
-        const inline std::string MainWindowStr = gui::name::window::main_window;
-        const inline std::string DetailsWindowStr = "DetailsWindow";
-		const inline std::string CallDeleteWindowStr = "CallDeleteOptionsWindow";
+    namespace settings
+    {
+        // Windows
+        const inline std::string MainWindowStr       = gui::name::window::main_window;
+        const inline std::string DetailsWindowStr    = "DetailsWindow";
+        const inline std::string CallDeleteWindowStr = "CallDeleteOptionsWindow";
 
-		constexpr auto pageSize = 7;
-	}
+        constexpr auto pageSize = 7;
+    } // namespace settings
 } // namespace calllog
diff --git a/module-apps/application-calllog/data/CallLogStyle.hpp b/module-apps/application-calllog/data/CallLogStyle.hpp
index 6cc04b5fb..cd78d8591 100644
--- a/module-apps/application-calllog/data/CallLogStyle.hpp
+++ b/module-apps/application-calllog/data/CallLogStyle.hpp
@@ -4,117 +4,118 @@
 // CALL LOG STYLE
 namespace callLogStyle
 {
-// DETAILS WINDOW
-namespace detailsWindow
-{
-constexpr uint32_t default_x = style::window::default_left_margin;
-constexpr uint32_t default_w = style::window_width - style::window::default_left_margin - style::window::default_right_margin;
-namespace information
-{
-namespace label
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = 111;
-constexpr uint32_t w = default_w;
-} // namespace label
-namespace number
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = 174;
-constexpr uint32_t w = default_w;
-} // namespace number
-namespace imgs
-{
-    constexpr uint32_t y = 162;
-    constexpr uint32_t w = 55;
-    constexpr uint32_t h = 55;
-    namespace call
+    // DETAILS WINDOW
+    namespace detailsWindow
     {
-        constexpr uint32_t x = 317;
-        namespace icon
+        constexpr uint32_t default_x = style::window::default_left_margin;
+        constexpr uint32_t default_w =
+            style::window_width - style::window::default_left_margin - style::window::default_right_margin;
+        namespace information
         {
-            constexpr uint32_t x = 11;
-            constexpr uint32_t y = 12;
-        } // namespace icon
-    }     // namespace call
-    namespace sms
-    {
-        constexpr uint32_t x = 389;
-        namespace icon
+            namespace label
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = 111;
+                constexpr uint32_t w = default_w;
+            } // namespace label
+            namespace number
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = 174;
+                constexpr uint32_t w = default_w;
+            } // namespace number
+            namespace imgs
+            {
+                constexpr uint32_t y = 162;
+                constexpr uint32_t w = 55;
+                constexpr uint32_t h = 55;
+                namespace call
+                {
+                    constexpr uint32_t x = 317;
+                    namespace icon
+                    {
+                        constexpr uint32_t x = 11;
+                        constexpr uint32_t y = 12;
+                    } // namespace icon
+                }     // namespace call
+                namespace sms
+                {
+                    constexpr uint32_t x = 389;
+                    namespace icon
+                    {
+                        constexpr uint32_t x = 11;
+                        constexpr uint32_t y = 12;
+                    } // namespace icon
+                }     // namespace sms
+            }         // namespace imgs
+        }             // namespace information
+        namespace type
         {
-            constexpr uint32_t x = 11;
-            constexpr uint32_t y = 12;
-        } // namespace icon
-    }     // namespace sms
-} // namespace imgs
-} // namespace information
-namespace type
-{
-namespace label
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = 222;
-constexpr uint32_t w = style::window_width / 2 - x;
-} // namespace label
-namespace img
-{
-const uint32_t x = default_x;
-const uint32_t y = 285;
-} // namespace img
-namespace data
-{
-constexpr uint32_t x = 70;
-constexpr uint32_t y = 285;
-constexpr uint32_t w = style::window_width / 2 - x;
-} // namespace data
-} // namespace type
-namespace duration
-{
-namespace label
-{
-constexpr uint32_t x = 281;
-constexpr uint32_t y = 222;
-constexpr uint32_t w = style::window_width - x - style::window::default_right_margin;
-} // namespace label
-namespace data
-{
-constexpr uint32_t x = 281;
-constexpr uint32_t y = 285;
-constexpr uint32_t w = style::window_width / 2 - style::window::default_right_margin;
-} // namespace data
-} // namespace duration
-namespace date
-{
-namespace label
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = 333;
-constexpr uint32_t w = default_w;
-} // namespace label
-namespace dataDay
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = 396;
-constexpr uint32_t w = default_w;
-} // namespace dataDay
-namespace dataDate
-{
-constexpr uint32_t x = default_x;
-constexpr uint32_t y = dataDay::y + style::window::label::small_h;
-constexpr uint32_t w = default_w;
-} // namespace dataDate
-} // namespace date
-} // namespace detailsWindow
+            namespace label
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = 222;
+                constexpr uint32_t w = style::window_width / 2 - x;
+            } // namespace label
+            namespace img
+            {
+                const uint32_t x = default_x;
+                const uint32_t y = 285;
+            } // namespace img
+            namespace data
+            {
+                constexpr uint32_t x = 70;
+                constexpr uint32_t y = 285;
+                constexpr uint32_t w = style::window_width / 2 - x;
+            } // namespace data
+        }     // namespace type
+        namespace duration
+        {
+            namespace label
+            {
+                constexpr uint32_t x = 281;
+                constexpr uint32_t y = 222;
+                constexpr uint32_t w = style::window_width - x - style::window::default_right_margin;
+            } // namespace label
+            namespace data
+            {
+                constexpr uint32_t x = 281;
+                constexpr uint32_t y = 285;
+                constexpr uint32_t w = style::window_width / 2 - style::window::default_right_margin;
+            } // namespace data
+        }     // namespace duration
+        namespace date
+        {
+            namespace label
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = 333;
+                constexpr uint32_t w = default_w;
+            } // namespace label
+            namespace dataDay
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = 396;
+                constexpr uint32_t w = default_w;
+            } // namespace dataDay
+            namespace dataDate
+            {
+                constexpr uint32_t x = default_x;
+                constexpr uint32_t y = dataDay::y + style::window::label::small_h;
+                constexpr uint32_t w = default_w;
+            } // namespace dataDate
+        }     // namespace date
+    }         // namespace detailsWindow
 
-// MAIN WINDOW
-namespace mainWindow
-{
-constexpr uint32_t leftMargin = 19;
-constexpr uint32_t rightMargin = 17;
-constexpr uint32_t x = leftMargin;
-constexpr uint32_t y = 111;
-constexpr uint32_t w = style::window_width - leftMargin - rightMargin;
-constexpr uint32_t h = style::window_height - y;
-} // namespace mainWindow
+    // MAIN WINDOW
+    namespace mainWindow
+    {
+        constexpr uint32_t leftMargin  = 19;
+        constexpr uint32_t rightMargin = 17;
+        constexpr uint32_t x           = leftMargin;
+        constexpr uint32_t y           = 111;
+        constexpr uint32_t w           = style::window_width - leftMargin - rightMargin;
+        constexpr uint32_t h           = style::window_height - y;
+    } // namespace mainWindow
 
 } // namespace callLogStyle
\ No newline at end of file
diff --git a/module-apps/application-calllog/data/CallLogSwitchData.hpp b/module-apps/application-calllog/data/CallLogSwitchData.hpp
index 91f595e88..9ce24e136 100644
--- a/module-apps/application-calllog/data/CallLogSwitchData.hpp
+++ b/module-apps/application-calllog/data/CallLogSwitchData.hpp
@@ -11,19 +11,25 @@
 #include "CalllogRecord.hpp"
 #include "SwitchData.hpp"
 
-namespace calllog {
+namespace calllog
+{
 
-const inline std::string CALLLOG_SWITCH_DATA_STR = "CallLogSwitchData";
+    const inline std::string CALLLOG_SWITCH_DATA_STR = "CallLogSwitchData";
 
-class CallLogSwitchData: public gui::SwitchData {
-protected:
-	CalllogRecord record;
-public:
-	CallLogSwitchData() = delete; 
-	CallLogSwitchData( CalllogRecord record ) : SwitchData(CALLLOG_SWITCH_DATA_STR), record{ record } {};
-	virtual ~CallLogSwitchData() = default;
+    class CallLogSwitchData : public gui::SwitchData
+    {
+      protected:
+        CalllogRecord record;
 
-	const CalllogRecord& getRecord() const { return record; };
-};
+      public:
+        CallLogSwitchData() = delete;
+        CallLogSwitchData(CalllogRecord record) : SwitchData(CALLLOG_SWITCH_DATA_STR), record{record} {};
+        virtual ~CallLogSwitchData() = default;
 
-} // namespace calllog 
+        const CalllogRecord &getRecord() const
+        {
+            return record;
+        };
+    };
+
+} // namespace calllog
diff --git a/module-apps/application-calllog/widgets/CalllogItem.cpp b/module-apps/application-calllog/widgets/CalllogItem.cpp
index 0472539d0..627d1366f 100644
--- a/module-apps/application-calllog/widgets/CalllogItem.cpp
+++ b/module-apps/application-calllog/widgets/CalllogItem.cpp
@@ -15,89 +15,107 @@
 
 using namespace calllog;
 
-namespace gui {
-
-namespace clItemStyle
+namespace gui
 {
-constexpr uint32_t w = 431;
-constexpr uint32_t h = style::window::label::big_h;
-namespace img
-{
-constexpr uint32_t x = 11; // TODO: alek:: change to good values
-constexpr uint32_t y = 22;
-} // namespace img
-namespace text
-{
-constexpr uint32_t x = 37;
-constexpr uint32_t w = 280;
-} // namespace text
-namespace timestamp
-{
-constexpr uint32_t w = 115;
-}
-} // namespace clItemStyle
 
-CalllogItem::CalllogItem(CalllogModel *model, bool mode24H) : model{model}, mode24H{mode24H}
-{
-    minWidth = clItemStyle::w;
-	minHeight = clItemStyle::h;
-	maxWidth = clItemStyle::w;
-	maxHeight = clItemStyle::h;
+    namespace clItemStyle
+    {
+        constexpr uint32_t w = 431;
+        constexpr uint32_t h = style::window::label::big_h;
+        namespace img
+        {
+            constexpr uint32_t x = 11; // TODO: alek:: change to good values
+            constexpr uint32_t y = 22;
+        } // namespace img
+        namespace text
+        {
+            constexpr uint32_t x = 37;
+            constexpr uint32_t w = 280;
+        } // namespace text
+        namespace timestamp
+        {
+            constexpr uint32_t w = 115;
+        }
+    } // namespace clItemStyle
 
-	setRadius( 0 );
-	setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP );
+    CalllogItem::CalllogItem(CalllogModel *model, bool mode24H) : model{model}, mode24H{mode24H}
+    {
+        minWidth  = clItemStyle::w;
+        minHeight = clItemStyle::h;
+        maxWidth  = clItemStyle::w;
+        maxHeight = clItemStyle::h;
 
-	setPenFocusWidth(style::window::default_border_focucs_w);
-	setPenWidth(style::window::default_border_no_focus_w);
+        setRadius(0);
+        setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
 
-	timestamp = new gui::Label(this, 0,0,0,0);
-    style::window::decorate(timestamp);
-	timestamp->setFont(style::window::font::big);
-	timestamp->setAlignement(gui::Alignment { gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_CENTER } );
+        setPenFocusWidth(style::window::default_border_focucs_w);
+        setPenWidth(style::window::default_border_no_focus_w);
 
-	auto newImg = [=](const UTF8 imageName)->gui::Image* { 
-		auto img = new gui::Image(this, clItemStyle::img::x, clItemStyle::img::y, 0, 0, imageName); 
-		img->setVisible(false); 
-		return img;  
-	};
-	imageCallType[calllog::CallLogCallType::IN] = newImg("calllog_arrow_in");
-	imageCallType[calllog::CallLogCallType::OUT] = newImg("calllog_arrow_out");
-	imageCallType[calllog::CallLogCallType::MISSED] = newImg("calllog_arrow_den");
+        timestamp = new gui::Label(this, 0, 0, 0, 0);
+        style::window::decorate(timestamp);
+        timestamp->setFont(style::window::font::big);
+        timestamp->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_CENTER});
 
-	text = new gui::Label( this, 0,0,0,0);
-    style::window::decorate(text);
-    text->setFont(style::window::font::big);
-    text->setDotsMode( true );
-}
+        auto newImg = [=](const UTF8 imageName) -> gui::Image * {
+            auto img = new gui::Image(this, clItemStyle::img::x, clItemStyle::img::y, 0, 0, imageName);
+            img->setVisible(false);
+            return img;
+        };
+        imageCallType[calllog::CallLogCallType::IN]     = newImg("calllog_arrow_in");
+        imageCallType[calllog::CallLogCallType::OUT]    = newImg("calllog_arrow_out");
+        imageCallType[calllog::CallLogCallType::MISSED] = newImg("calllog_arrow_den");
 
-CalllogItem::~CalllogItem() {
-	call = nullptr;
-	if( timestamp ) { removeWidget(timestamp); delete timestamp; timestamp = nullptr;}
-	for( auto& img : imageCallType ) {
-		if( img ) { removeWidget(img); delete img; img = nullptr; }
-	}	
-	if( text ) { removeWidget(text); delete text; text = nullptr;}
-}
+        text = new gui::Label(this, 0, 0, 0, 0);
+        style::window::decorate(text);
+        text->setFont(style::window::font::big);
+        text->setDotsMode(true);
+    }
 
-bool CalllogItem::onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) {
-	text->setPosition(clItemStyle::text::x, 0 );
-	text->setSize(clItemStyle::text::w, newDim.h);
+    CalllogItem::~CalllogItem()
+    {
+        call = nullptr;
+        if (timestamp) {
+            removeWidget(timestamp);
+            delete timestamp;
+            timestamp = nullptr;
+        }
+        for (auto &img : imageCallType) {
+            if (img) {
+                removeWidget(img);
+                delete img;
+                img = nullptr;
+            }
+        }
+        if (text) {
+            removeWidget(text);
+            delete text;
+            text = nullptr;
+        }
+    }
 
-	timestamp->setPosition(newDim.w-clItemStyle::timestamp::w,0);
-	timestamp->setSize(clItemStyle::timestamp::w, newDim.h);
-	return true;
-}
+    bool CalllogItem::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        text->setPosition(clItemStyle::text::x, 0);
+        text->setSize(clItemStyle::text::w, newDim.h);
 
-void CalllogItem::setCall( std::shared_ptr<CalllogRecord>& call ) {
-	this->call = call;
-	text->setText( call->name );
+        timestamp->setPosition(newDim.w - clItemStyle::timestamp::w, 0);
+        timestamp->setSize(clItemStyle::timestamp::w, newDim.h);
+        return true;
+    }
 
-	auto callType = calllog::toCallLogCallType(call->type);
-	if (callType == calllog::CallLogCallType::MISSED) text->setFont(style::window::font::bigbold);
+    void CalllogItem::setCall(std::shared_ptr<CalllogRecord> &call)
+    {
+        this->call = call;
+        text->setText(call->name);
 
-	imageCallType[static_cast<uint32_t>(callType)]->setVisible(true);
+        auto callType = calllog::toCallLogCallType(call->type);
+        if (callType == calllog::CallLogCallType::MISSED)
+            text->setFont(style::window::font::bigbold);
 
-    timestamp->setText(utils::time::DateTime(call->date, false)); // TODO: alek: check for AM/PM and 24h
-}
+        imageCallType[static_cast<uint32_t>(callType)]->setVisible(true);
+
+        timestamp->setText(utils::time::DateTime(call->date, false)); // TODO: alek: check for AM/PM and 24h
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-calllog/widgets/CalllogItem.hpp b/module-apps/application-calllog/widgets/CalllogItem.hpp
index ade415bd4..7c256a6f7 100644
--- a/module-apps/application-calllog/widgets/CalllogItem.hpp
+++ b/module-apps/application-calllog/widgets/CalllogItem.hpp
@@ -14,35 +14,36 @@
 #include "../data/CallLogInternals.hpp"
 #include "../CalllogModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- * @brief Widget used to display information about calllog entry in the calllog list view.
- */
-class CalllogItem: public ListItem {
-	CalllogModel* model = nullptr;
-	//pointer to the calls record
-	std::shared_ptr<CalllogRecord> call = nullptr;
-	//this is timestamp in the mode defined in settings
-	gui::Label* timestamp = nullptr;
-	gui::Image* imageCallType[calllog::CallLogCallType::NUM_OF_CALL_TYPES] = {nullptr,nullptr,nullptr};
-	gui::Label* text = nullptr;
-	//flag that defines if time should be displayed in 24h mode
-	bool mode24H = false;
+    /*
+     * @brief Widget used to display information about calllog entry in the calllog list view.
+     */
+    class CalllogItem : public ListItem
+    {
+        CalllogModel *model = nullptr;
+        // pointer to the calls record
+        std::shared_ptr<CalllogRecord> call = nullptr;
+        // this is timestamp in the mode defined in settings
+        gui::Label *timestamp                                                  = nullptr;
+        gui::Image *imageCallType[calllog::CallLogCallType::NUM_OF_CALL_TYPES] = {nullptr, nullptr, nullptr};
+        gui::Label *text                                                       = nullptr;
+        // flag that defines if time should be displayed in 24h mode
+        bool mode24H = false;
 
-	public:
-		CalllogItem( CalllogModel* model, bool mode24H );
-		virtual ~CalllogItem();
-		//sets copy of alarm's
-		void setCall( std::shared_ptr<CalllogRecord>&  );
+      public:
+        CalllogItem(CalllogModel *model, bool mode24H);
+        virtual ~CalllogItem();
+        // sets copy of alarm's
+        void setCall(std::shared_ptr<CalllogRecord> &);
         CalllogRecord getCall() const
         {
             return *call;
         };
 
         // virtual methods from Item
-        bool onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) override;
-};
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+    };
 
 } /* namespace gui */
-
diff --git a/module-apps/application-calllog/windows/CallLogDetailsWindow.cpp b/module-apps/application-calllog/windows/CallLogDetailsWindow.cpp
index 38c3a3245..36f7490b8 100644
--- a/module-apps/application-calllog/windows/CallLogDetailsWindow.cpp
+++ b/module-apps/application-calllog/windows/CallLogDetailsWindow.cpp
@@ -34,266 +34,290 @@
 using namespace calllog;
 using namespace callLogStyle::detailsWindow;
 
-namespace gui {
-
-CallLogDetailsWindow::CallLogDetailsWindow( app::Application* app ) :
-	AppWindow(app, calllog::settings::DetailsWindowStr) {
-
-	buildInterface();
-}
-
-void CallLogDetailsWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-
-Label *CallLogDetailsWindow::decorateLabel(Label *label)
+namespace gui
 {
-    if (label == nullptr)
+
+    CallLogDetailsWindow::CallLogDetailsWindow(app::Application *app)
+        : AppWindow(app, calllog::settings::DetailsWindowStr)
     {
-        LOG_ERROR("label is nullptr");
+
+        buildInterface();
+    }
+
+    void CallLogDetailsWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
+
+    Label *CallLogDetailsWindow::decorateLabel(Label *label)
+    {
+        if (label == nullptr) {
+            LOG_ERROR("label is nullptr");
+            return label;
+        }
+        style::window::decorate(label);
+        label->setFont(style::window::font::small);
+        label->setSize(label->widgetArea.w, style::window::label::big_h);
+        label->setLineMode(true);
+
         return label;
     }
-    style::window::decorate(label);
-    label->setFont(style::window::font::small);
-	label->setSize(label->widgetArea.w, style::window::label::big_h);
-	label->setLineMode(true);
 
-    return label;
-}
-
-Label * CallLogDetailsWindow::decorateData(Label* label){
-	if(label == nullptr){
-		LOG_ERROR("label is nullptr");
-		return label;
-	}
-	style::window::decorate(label);
-	label->setFont(style::window::font::medium);
-    label->setSize(label->widgetArea.w, style::window::label::small_h);
-
-	return label;
-}
-
-void CallLogDetailsWindow::buildInterface() {
-	AppWindow::buildInterface();
-
-	bottomBar->setText( BottomBar::Side::LEFT, utils::localize.get("common_options"));
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_call"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
-
-	topBar->setActive(TopBar::Elements::TIME, true );
-
-    // NOTE: height of all labels is set using decorators
-
-    // Information
-    informationLabel =
-        decorateLabel(new gui::Label(this, information::label::x, information::label::y, information::label::w, 0, utils::localize.get("common_information")));
-    number = decorateData(new gui::Label(this, information::number::x, information::number::y, information::number::w, 0));
-    number->setFont(style::window::font::mediumbold);
-
-    for( uint32_t i=0; i<2; ++i ) {
-		rects[i] = new gui::Rect( this, 0,0, information::imgs::w, information::imgs::h );
-		rects[i]->setFilled( false );
-		rects[i]->setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP );
-		rects[i]->setPenFocusWidth(style::window::default_border_focucs_w);
-		rects[i]->setPenWidth(style::window::default_border_no_focus_w);
-	}
-
-    rects[static_cast<uint32_t>(FocusRects::Call)]->setPosition(information::imgs::call::x, information::imgs::y);
-    rects[static_cast<uint32_t>(FocusRects::Sms)]->setPosition(information::imgs::sms::x, information::imgs::y);
-
-    // TODO: alek: phone ringing seems to be to small
-    callImg = new gui::Image(rects[FocusRects::Call], information::imgs::call::icon::x, information::imgs::call::icon::y, 0, 0, "phonebook_phone_ringing");
-    smsImg = new gui::Image(rects[FocusRects::Sms], information::imgs::sms::icon::x, information::imgs::call::icon::y, 0, 0, "mail");
-
-    // define navigation between labels
-    rects[static_cast<uint32_t>(FocusRects::Call)]->setNavigationItem(NavigationDirection::LEFT, rects[static_cast<uint32_t>(FocusRects::Sms)]);
-    rects[static_cast<uint32_t>(FocusRects::Call)]->setNavigationItem( NavigationDirection::RIGHT,
-		rects[static_cast<uint32_t>(FocusRects::Sms)]);
-
-	rects[static_cast<uint32_t>(FocusRects::Sms)]->setNavigationItem( NavigationDirection::LEFT,
-		rects[static_cast<uint32_t>(FocusRects::Call)]);
-	rects[static_cast<uint32_t>(FocusRects::Sms)]->setNavigationItem( NavigationDirection::RIGHT,
-		rects[static_cast<uint32_t>(FocusRects::Call)]);
-
-	//focus callbacks
-	rects[static_cast<uint32_t>(FocusRects::Call)]->focusChangedCallback = [=] (gui::Item& item){
-		bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_call"));
-		return true; };
-
-	rects[static_cast<uint32_t>(FocusRects::Sms)]->focusChangedCallback = [=] (gui::Item& item){
-		bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_send"));
-		return true; };
-
-    // activated callbacks
-    rects[FocusRects::Call]->activatedCallback = [=](gui::Item &item) {
-        LOG_INFO("call %s", record.number.c_str());
-        return app::call(application, app::CallOperation::ExecuteCall, record.number);
-    };
-
-    rects[FocusRects::Sms]->activatedCallback = [=](gui::Item &item) {
-        LOG_INFO("sms %s", record.number.c_str());
-        return app::sms(application, app::SmsOperation::Add, record.number);
-    };
-
-    // Type
-    typeLabel = decorateLabel(new gui::Label(this, type::label::x, type::label::y, type::label::w, 0, utils::localize.get("app_calllog_type")));
-	typeData = decorateData(new gui::Label(this, type::data::x, type::data::y, type::data::w, 0));
-
-	// TODO: alek: it is used in the code at least twice, possibly create one common function for this
-	auto newImg = [=](const UTF8 imageName)->gui::Image* { 
-		auto img = new gui::Image(this, type::img::x, type::img::y, 0, 0, imageName); 
-		img->setVisible(false); 
-		return img;  
-	};
-	callTypeImg[calllog::CallLogCallType::IN] = newImg("calllog_arrow_in");
-	callTypeImg[calllog::CallLogCallType::OUT] = newImg("calllog_arrow_out");
-	callTypeImg[calllog::CallLogCallType::MISSED] = newImg("calllog_arrow_den");
-
-    // Duration
-    durationLabel =
-        decorateLabel(new gui::Label(this, duration::label::x, duration::label::y, duration::label::w, 0, utils::localize.get("app_calllog_duration")));
-    durationData = decorateData(new gui::Label(this, duration::data::x, duration::data::y, duration::data::w, 0));
-
-    // Date
-    dateLabel = decorateLabel(new gui::Label(this, date::label::x, date::label::y, date::label::w, 0, utils::localize.get("app_calllog_date")));
-    dateDay = decorateData(new gui::Label(this, date::dataDay::x, date::dataDay::y, date::dataDay::w, 0));
-    dateDate = decorateData(new gui::Label(this, date::dataDate::x, date::dataDate::y, date::dataDate::w, 0));
-}
-
-void CallLogDetailsWindow::destroyInterface()
-{
-    AppWindow::destroyInterface();
-
-    removeWidget(informationLabel);
-    delete informationLabel;
-    informationLabel = nullptr;
-    removeWidget(number);
-    delete number;
-    number = nullptr;
-    rects[FocusRects::Call]->removeWidget(callImg);
-    delete callImg;
-    callImg = nullptr;
-    rects[FocusRects::Sms]->removeWidget(smsImg);
-    delete smsImg;
-    smsImg = nullptr;
-    for (auto &rect : rects)
+    Label *CallLogDetailsWindow::decorateData(Label *label)
     {
-        removeWidget(rect);
-        delete rect;
-        rect = nullptr;
-    }
-    removeWidget(typeLabel);
-    delete typeLabel;
-    typeLabel = nullptr;
-    removeWidget(durationLabel);
-    delete durationLabel;
-    durationLabel = nullptr;
-    for (auto &img : callTypeImg)
-    {
-        removeWidget(img);
-        delete img;
-        img = nullptr;
-    }
-    removeWidget(typeData);
-    delete typeData;
-    typeData = nullptr;
-    removeWidget(durationData);
-    delete durationData;
-    durationData = nullptr;
-    removeWidget(dateLabel);
-    delete dateLabel;
-    dateLabel = nullptr;
-    removeWidget(dateDay);
-    delete dateDay;
-    dateDay = nullptr;
-    removeWidget(dateDate);
-    delete dateDate;
-    dateDate = nullptr;
-
-    children.clear();
-}
-
-CallLogDetailsWindow::~CallLogDetailsWindow() {
-	destroyInterface();
-}
-
-void CallLogDetailsWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	if(data != nullptr && data->getDescription() == calllog::CALLLOG_SWITCH_DATA_STR) {
-		auto switchData = reinterpret_cast<calllog::CallLogSwitchData*>(data);	
-		record = switchData->getRecord();
-
-		setTitle(record.name);
-		
-		number->setText(record.number.c_str());
-
-		auto callType = toCallLogCallType( record.type );
-		for (auto& img : callTypeImg) {
-			img->setVisible(false);
-		}
-		callTypeImg[callType]->setVisible(true);
-
-        UTF8 callTypeStr;
-        switch (record.type)
-        {
-        case CallType::CT_INCOMING:
-            callTypeStr = utils::localize.get("app_calllog_incoming_call");
-            break;
-        case CallType::CT_OUTGOING:
-            callTypeStr = utils::localize.get("app_calllog_outgoing_call");
-            break;
-        case CallType::CT_MISSED:
-            callTypeStr = utils::localize.get("app_calllog_missed_call");
-            break;
-        case CallType::CT_REJECTED:
-            callTypeStr = utils::localize.get("app_calllog_rejected_call");
-            break;
-        default:
-            break;
+        if (label == nullptr) {
+            LOG_ERROR("label is nullptr");
+            return label;
         }
-        typeData->setText(callTypeStr);
+        style::window::decorate(label);
+        label->setFont(style::window::font::medium);
+        label->setSize(label->widgetArea.w, style::window::label::small_h);
 
-        durationData->setText(utils::time::Timestamp(record.duration).str("%Mm %Ss")); // TODO: alek: add duration class
+        return label;
+    }
 
-        utils::time::Timestamp t(record.date);
-        dateDay->setText(t.day() + ",");
-        dateDate->setText(t.str(utils::localize.get("locale_date_full") + ", " + utils::localize.get("locale_12hour_min"))); // TODO: alek 12/24 h
-	}
-
-	if( mode == ShowMode::GUI_SHOW_INIT) setFocusItem( rects[static_cast<uint32_t>(FocusRects::Call)] );
-}
-
-bool CallLogDetailsWindow::onInput( const InputEvent& inputEvent ) {
-	//check if any of the lower inheritance onInput methods catch the event
-	if( AppWindow::onInput( inputEvent ) ) {
-		//refresh window only when key is other than enter
-		if( inputEvent.keyCode != KeyCode::KEY_ENTER ) {
-			application->render( RefreshModes::GUI_REFRESH_FAST );
-		}
-
-		return true;
-	}
-
-    // process only if key is released
-    if (((inputEvent.state == InputEvent::State::keyReleasedShort) || ((inputEvent.state == InputEvent::State::keyReleasedLong))) &&
-        (inputEvent.keyCode == KeyCode::KEY_LF))
+    void CallLogDetailsWindow::buildInterface()
     {
-        auto app = dynamic_cast<app::ApplicationCallLog *>(application);
-        assert(app != nullptr);
+        AppWindow::buildInterface();
 
-        if (app->windowOptions != nullptr)
-        {
-            app->windowOptions->clearOptions();
-            app->windowOptions->addOptions(calllogWindowOptions(app, record));
-            app->switchWindow(app->windowOptions->getName(), nullptr);
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("common_options"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_call"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        // NOTE: height of all labels is set using decorators
+
+        // Information
+        informationLabel = decorateLabel(new gui::Label(this,
+                                                        information::label::x,
+                                                        information::label::y,
+                                                        information::label::w,
+                                                        0,
+                                                        utils::localize.get("common_information")));
+        number           = decorateData(
+            new gui::Label(this, information::number::x, information::number::y, information::number::w, 0));
+        number->setFont(style::window::font::mediumbold);
+
+        for (uint32_t i = 0; i < 2; ++i) {
+            rects[i] = new gui::Rect(this, 0, 0, information::imgs::w, information::imgs::h);
+            rects[i]->setFilled(false);
+            rects[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
+            rects[i]->setPenFocusWidth(style::window::default_border_focucs_w);
+            rects[i]->setPenWidth(style::window::default_border_no_focus_w);
         }
 
-        return true;
+        rects[static_cast<uint32_t>(FocusRects::Call)]->setPosition(information::imgs::call::x, information::imgs::y);
+        rects[static_cast<uint32_t>(FocusRects::Sms)]->setPosition(information::imgs::sms::x, information::imgs::y);
+
+        // TODO: alek: phone ringing seems to be to small
+        callImg = new gui::Image(rects[FocusRects::Call],
+                                 information::imgs::call::icon::x,
+                                 information::imgs::call::icon::y,
+                                 0,
+                                 0,
+                                 "phonebook_phone_ringing");
+        smsImg  = new gui::Image(
+            rects[FocusRects::Sms], information::imgs::sms::icon::x, information::imgs::call::icon::y, 0, 0, "mail");
+
+        // define navigation between labels
+        rects[static_cast<uint32_t>(FocusRects::Call)]->setNavigationItem(
+            NavigationDirection::LEFT, rects[static_cast<uint32_t>(FocusRects::Sms)]);
+        rects[static_cast<uint32_t>(FocusRects::Call)]->setNavigationItem(
+            NavigationDirection::RIGHT, rects[static_cast<uint32_t>(FocusRects::Sms)]);
+
+        rects[static_cast<uint32_t>(FocusRects::Sms)]->setNavigationItem(
+            NavigationDirection::LEFT, rects[static_cast<uint32_t>(FocusRects::Call)]);
+        rects[static_cast<uint32_t>(FocusRects::Sms)]->setNavigationItem(
+            NavigationDirection::RIGHT, rects[static_cast<uint32_t>(FocusRects::Call)]);
+
+        // focus callbacks
+        rects[static_cast<uint32_t>(FocusRects::Call)]->focusChangedCallback = [=](gui::Item &item) {
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_call"));
+            return true;
+        };
+
+        rects[static_cast<uint32_t>(FocusRects::Sms)]->focusChangedCallback = [=](gui::Item &item) {
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_send"));
+            return true;
+        };
+
+        // activated callbacks
+        rects[FocusRects::Call]->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("call %s", record.number.c_str());
+            return app::call(application, app::CallOperation::ExecuteCall, record.number);
+        };
+
+        rects[FocusRects::Sms]->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("sms %s", record.number.c_str());
+            return app::sms(application, app::SmsOperation::Add, record.number);
+        };
+
+        // Type
+        typeLabel = decorateLabel(new gui::Label(
+            this, type::label::x, type::label::y, type::label::w, 0, utils::localize.get("app_calllog_type")));
+        typeData  = decorateData(new gui::Label(this, type::data::x, type::data::y, type::data::w, 0));
+
+        // TODO: alek: it is used in the code at least twice, possibly create one common function for this
+        auto newImg = [=](const UTF8 imageName) -> gui::Image * {
+            auto img = new gui::Image(this, type::img::x, type::img::y, 0, 0, imageName);
+            img->setVisible(false);
+            return img;
+        };
+        callTypeImg[calllog::CallLogCallType::IN]     = newImg("calllog_arrow_in");
+        callTypeImg[calllog::CallLogCallType::OUT]    = newImg("calllog_arrow_out");
+        callTypeImg[calllog::CallLogCallType::MISSED] = newImg("calllog_arrow_den");
+
+        // Duration
+        durationLabel = decorateLabel(new gui::Label(this,
+                                                     duration::label::x,
+                                                     duration::label::y,
+                                                     duration::label::w,
+                                                     0,
+                                                     utils::localize.get("app_calllog_duration")));
+        durationData  = decorateData(new gui::Label(this, duration::data::x, duration::data::y, duration::data::w, 0));
+
+        // Date
+        dateLabel = decorateLabel(new gui::Label(
+            this, date::label::x, date::label::y, date::label::w, 0, utils::localize.get("app_calllog_date")));
+        dateDay   = decorateData(new gui::Label(this, date::dataDay::x, date::dataDay::y, date::dataDay::w, 0));
+        dateDate  = decorateData(new gui::Label(this, date::dataDate::x, date::dataDate::y, date::dataDate::w, 0));
     }
 
-    return false;
-}
+    void CallLogDetailsWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+
+        removeWidget(informationLabel);
+        delete informationLabel;
+        informationLabel = nullptr;
+        removeWidget(number);
+        delete number;
+        number = nullptr;
+        rects[FocusRects::Call]->removeWidget(callImg);
+        delete callImg;
+        callImg = nullptr;
+        rects[FocusRects::Sms]->removeWidget(smsImg);
+        delete smsImg;
+        smsImg = nullptr;
+        for (auto &rect : rects) {
+            removeWidget(rect);
+            delete rect;
+            rect = nullptr;
+        }
+        removeWidget(typeLabel);
+        delete typeLabel;
+        typeLabel = nullptr;
+        removeWidget(durationLabel);
+        delete durationLabel;
+        durationLabel = nullptr;
+        for (auto &img : callTypeImg) {
+            removeWidget(img);
+            delete img;
+            img = nullptr;
+        }
+        removeWidget(typeData);
+        delete typeData;
+        typeData = nullptr;
+        removeWidget(durationData);
+        delete durationData;
+        durationData = nullptr;
+        removeWidget(dateLabel);
+        delete dateLabel;
+        dateLabel = nullptr;
+        removeWidget(dateDay);
+        delete dateDay;
+        dateDay = nullptr;
+        removeWidget(dateDate);
+        delete dateDate;
+        dateDate = nullptr;
+
+        children.clear();
+    }
+
+    CallLogDetailsWindow::~CallLogDetailsWindow()
+    {
+        destroyInterface();
+    }
+
+    void CallLogDetailsWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        if (data != nullptr && data->getDescription() == calllog::CALLLOG_SWITCH_DATA_STR) {
+            auto switchData = reinterpret_cast<calllog::CallLogSwitchData *>(data);
+            record          = switchData->getRecord();
+
+            setTitle(record.name);
+
+            number->setText(record.number.c_str());
+
+            auto callType = toCallLogCallType(record.type);
+            for (auto &img : callTypeImg) {
+                img->setVisible(false);
+            }
+            callTypeImg[callType]->setVisible(true);
+
+            UTF8 callTypeStr;
+            switch (record.type) {
+            case CallType::CT_INCOMING:
+                callTypeStr = utils::localize.get("app_calllog_incoming_call");
+                break;
+            case CallType::CT_OUTGOING:
+                callTypeStr = utils::localize.get("app_calllog_outgoing_call");
+                break;
+            case CallType::CT_MISSED:
+                callTypeStr = utils::localize.get("app_calllog_missed_call");
+                break;
+            case CallType::CT_REJECTED:
+                callTypeStr = utils::localize.get("app_calllog_rejected_call");
+                break;
+            default:
+                break;
+            }
+            typeData->setText(callTypeStr);
+
+            durationData->setText(
+                utils::time::Timestamp(record.duration).str("%Mm %Ss")); // TODO: alek: add duration class
+
+            utils::time::Timestamp t(record.date);
+            dateDay->setText(t.day() + ",");
+            dateDate->setText(t.str(utils::localize.get("locale_date_full") + ", " +
+                                    utils::localize.get("locale_12hour_min"))); // TODO: alek 12/24 h
+        }
+
+        if (mode == ShowMode::GUI_SHOW_INIT)
+            setFocusItem(rects[static_cast<uint32_t>(FocusRects::Call)]);
+    }
+
+    bool CallLogDetailsWindow::onInput(const InputEvent &inputEvent)
+    {
+        // check if any of the lower inheritance onInput methods catch the event
+        if (AppWindow::onInput(inputEvent)) {
+            // refresh window only when key is other than enter
+            if (inputEvent.keyCode != KeyCode::KEY_ENTER) {
+                application->render(RefreshModes::GUI_REFRESH_FAST);
+            }
+
+            return true;
+        }
+
+        // process only if key is released
+        if (((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+             ((inputEvent.state == InputEvent::State::keyReleasedLong))) &&
+            (inputEvent.keyCode == KeyCode::KEY_LF)) {
+            auto app = dynamic_cast<app::ApplicationCallLog *>(application);
+            assert(app != nullptr);
+
+            if (app->windowOptions != nullptr) {
+                app->windowOptions->clearOptions();
+                app->windowOptions->addOptions(calllogWindowOptions(app, record));
+                app->switchWindow(app->windowOptions->getName(), nullptr);
+            }
+
+            return true;
+        }
+
+        return false;
+    }
 
 } /* namespace gui */
-
-
diff --git a/module-apps/application-calllog/windows/CallLogDetailsWindow.hpp b/module-apps/application-calllog/windows/CallLogDetailsWindow.hpp
index 2f6c965a8..f92ee3411 100644
--- a/module-apps/application-calllog/windows/CallLogDetailsWindow.hpp
+++ b/module-apps/application-calllog/windows/CallLogDetailsWindow.hpp
@@ -22,48 +22,50 @@
 
 #include "../data/CallLogInternals.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class CallLogDetailsWindow: public AppWindow {
-
-    enum FocusRects
+    class CallLogDetailsWindow : public AppWindow
     {
-        Call,
-        Sms,
-        NumOfRects
+
+        enum FocusRects
+        {
+            Call,
+            Sms,
+            NumOfRects
+        };
+
+        Label *informationLabel                                                                     = nullptr;
+        Label *number                                                                               = nullptr;
+        gui::Rect *rects[static_cast<uint32_t>(FocusRects::NumOfRects)]                             = {nullptr};
+        Image *callImg                                                                              = nullptr;
+        Image *smsImg                                                                               = nullptr;
+        gui::Image *callTypeImg[static_cast<uint32_t>(calllog::CallLogCallType::NUM_OF_CALL_TYPES)] = {
+            nullptr, nullptr, nullptr};
+        Label *typeLabel     = nullptr;
+        Label *durationLabel = nullptr;
+        Label *typeData      = nullptr;
+        Label *durationData  = nullptr;
+        Label *dateLabel     = nullptr;
+        Label *dateDay       = nullptr;
+        Label *dateDate      = nullptr;
+
+        CalllogRecord record;
+
+        Label *decorateLabel(Label *);
+        Label *decorateData(Label *);
+
+      public:
+        CallLogDetailsWindow(app::Application *app);
+        virtual ~CallLogDetailsWindow();
+
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
     };
 
-    Label* informationLabel = nullptr;
-	Label* number = nullptr;
-	gui::Rect* rects[static_cast<uint32_t>(FocusRects::NumOfRects)] = {nullptr};
-	Image* callImg = nullptr;
-	Image* smsImg = nullptr;
-	gui::Image* callTypeImg[static_cast<uint32_t>(calllog::CallLogCallType::NUM_OF_CALL_TYPES)] = {nullptr,nullptr,nullptr};
-	Label* typeLabel = nullptr;
-	Label* durationLabel = nullptr;
-	Label* typeData = nullptr;
-	Label* durationData = nullptr;
-	Label* dateLabel = nullptr;
-	Label* dateDay = nullptr;
-	Label* dateDate = nullptr;
-
-    CalllogRecord record;
-
-    Label *decorateLabel(Label *);
-    Label *decorateData(Label *);
-
-  public:
-	CallLogDetailsWindow( app::Application* app );
-	virtual ~CallLogDetailsWindow();
-
-	//virtual methods
-	bool onInput( const InputEvent& inputEvent ) override;
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
-
 } /* namespace gui */
-
diff --git a/module-apps/application-calllog/windows/CallLogMainWindow.cpp b/module-apps/application-calllog/windows/CallLogMainWindow.cpp
index ec3d3ef72..b6b407cca 100644
--- a/module-apps/application-calllog/windows/CallLogMainWindow.cpp
+++ b/module-apps/application-calllog/windows/CallLogMainWindow.cpp
@@ -29,84 +29,97 @@
 using namespace style;
 using namespace callLogStyle;
 
-namespace gui {
+namespace gui
+{
 
-CallLogMainWindow::CallLogMainWindow( app::Application* app ) :
-	AppWindow( app, calllog::settings::MainWindowStr ), calllogModel{ new CalllogModel( app ) } {
+    CallLogMainWindow::CallLogMainWindow(app::Application *app)
+        : AppWindow(app, calllog::settings::MainWindowStr), calllogModel{new CalllogModel(app)}
+    {
 
-	buildInterface();
-}
+        buildInterface();
+    }
 
-void CallLogMainWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-void CallLogMainWindow::buildInterface() {
-	AppWindow::buildInterface();
+    void CallLogMainWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
+    void CallLogMainWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-	setTitle(utils::localize.get("app_calllog_title_main"));
+        setTitle(utils::localize.get("app_calllog_title_main"));
 
-	bottomBar->setText( BottomBar::Side::LEFT, utils::localize.get("common_call") );
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_open") );
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back") );
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("common_call"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_open"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	topBar->setActive( TopBar::Elements::TIME, true );
+        topBar->setActive(TopBar::Elements::TIME, true);
 
-    list = new gui::ListView(this, mainWindow::x, mainWindow::y, mainWindow::w, mainWindow::h);
-    list->setMaxElements(calllog::settings::pageSize);
-    list->setPageSize(calllog::settings::pageSize);
-	list->setProvider(calllogModel);
+        list = new gui::ListView(this, mainWindow::x, mainWindow::y, mainWindow::w, mainWindow::h);
+        list->setMaxElements(calllog::settings::pageSize);
+        list->setPageSize(calllog::settings::pageSize);
+        list->setProvider(calllogModel);
 
-	setFocusItem( list );
-}
-void CallLogMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
+        setFocusItem(list);
+    }
+    void CallLogMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
 
-	if( list ) { removeWidget(list); delete list; list= nullptr; };
+        if (list) {
+            removeWidget(list);
+            delete list;
+            list = nullptr;
+        };
 
-	children.clear();
-	delete calllogModel;
-}
+        children.clear();
+        delete calllogModel;
+    }
 
-CallLogMainWindow::~CallLogMainWindow() {
-	destroyInterface();
-}
+    CallLogMainWindow::~CallLogMainWindow()
+    {
+        destroyInterface();
+    }
 
-void CallLogMainWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	if( mode == ShowMode::GUI_SHOW_INIT ){ 
-		calllogModel->clear();
-		calllogModel->requestRecordsCount();
-		list->clear();
-		list->setElementsCount( calllogModel->getItemCount() );
-	}
-}
-
-bool CallLogMainWindow::onInput( const InputEvent& inputEvent ) {
-	//process only if key is released
-	if(( inputEvent.state != InputEvent::State::keyReleasedShort ) || ( inputEvent.state != InputEvent::State::keyReleasedLong )) {
-		if( inputEvent.keyCode == KeyCode::KEY_LF ) {
-            LOG_DEBUG("calling");
-            auto it = dynamic_cast<CalllogItem *>(list->getSelectedItem());
-            if (it == nullptr)
-            {
-                LOG_ERROR("wrong item type");
-                assert(0);
-                return false;
-            }
-            return app::call(application, app::CallOperation::ExecuteCall, it->getCall().number);
+    void CallLogMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        if (mode == ShowMode::GUI_SHOW_INIT) {
+            calllogModel->clear();
+            calllogModel->requestRecordsCount();
+            list->clear();
+            list->setElementsCount(calllogModel->getItemCount());
         }
-	}
+    }
 
-	return AppWindow::onInput( inputEvent );
-}
+    bool CallLogMainWindow::onInput(const InputEvent &inputEvent)
+    {
+        // process only if key is released
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort) ||
+            (inputEvent.state != InputEvent::State::keyReleasedLong)) {
+            if (inputEvent.keyCode == KeyCode::KEY_LF) {
+                LOG_DEBUG("calling");
+                auto it = dynamic_cast<CalllogItem *>(list->getSelectedItem());
+                if (it == nullptr) {
+                    LOG_ERROR("wrong item type");
+                    assert(0);
+                    return false;
+                }
+                return app::call(application, app::CallOperation::ExecuteCall, it->getCall().number);
+            }
+        }
 
-bool CallLogMainWindow::onDatabaseMessage( sys::Message* msgl ) {
-	DBCalllogResponseMessage* msg = reinterpret_cast<DBCalllogResponseMessage*>( msgl );
-	if( calllogModel->updateRecords( std::move(msg->records), msg->offset, msg->limit, msg->count ) ) {
-		return true;
-	}
+        return AppWindow::onInput(inputEvent);
+    }
 
-	return false;
-}
+    bool CallLogMainWindow::onDatabaseMessage(sys::Message *msgl)
+    {
+        DBCalllogResponseMessage *msg = reinterpret_cast<DBCalllogResponseMessage *>(msgl);
+        if (calllogModel->updateRecords(std::move(msg->records), msg->offset, msg->limit, msg->count)) {
+            return true;
+        }
+
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-calllog/windows/CallLogMainWindow.hpp b/module-apps/application-calllog/windows/CallLogMainWindow.hpp
index 4a74ef0a0..3a9dd5f6d 100644
--- a/module-apps/application-calllog/windows/CallLogMainWindow.hpp
+++ b/module-apps/application-calllog/windows/CallLogMainWindow.hpp
@@ -21,23 +21,26 @@
 
 #include "../CalllogModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class CallLogMainWindow: public AppWindow {
-	CalllogModel* calllogModel = nullptr;
-	gui::ListView* list = nullptr;
-public:
-	CallLogMainWindow( app::Application* app );
-	virtual ~CallLogMainWindow();
+    class CallLogMainWindow : public AppWindow
+    {
+        CalllogModel *calllogModel = nullptr;
+        gui::ListView *list        = nullptr;
 
-	//virtual methods
-	bool onInput( const InputEvent& inputEvent ) override;
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
+      public:
+        CallLogMainWindow(app::Application *app);
+        virtual ~CallLogMainWindow();
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-	bool onDatabaseMessage( sys::Message* msg ) override;
-};
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        bool onDatabaseMessage(sys::Message *msg) override;
+    };
 
 } /* namespace gui */
diff --git a/module-apps/application-calllog/windows/CallLogOptionsWindow.cpp b/module-apps/application-calllog/windows/CallLogOptionsWindow.cpp
index ce1373aa3..03cd59e20 100644
--- a/module-apps/application-calllog/windows/CallLogOptionsWindow.cpp
+++ b/module-apps/application-calllog/windows/CallLogOptionsWindow.cpp
@@ -11,13 +11,11 @@ std::list<gui::Option> calllogWindowOptions(app::ApplicationCallLog *app, const
 
     std::list<gui::Option> options;
 
-    if (searchResults.get()->empty() || searchResults->front().contactType == ContactType::TEMPORARY)
-    {
+    if (searchResults.get()->empty() || searchResults->front().contactType == ContactType::TEMPORARY) {
         // add option - add contact
         options.push_back(gui::options::contact(app, app::ContactOperation::Add, searchResults->front()));
     }
-    else
-    {
+    else {
         // add option - contact details
         options.push_back(gui::options::contact(app, app::ContactOperation::Details, searchResults->front()));
     }
diff --git a/module-apps/application-clock/ApplicationClock.cpp b/module-apps/application-clock/ApplicationClock.cpp
index 6fc950f67..4fb1a3957 100644
--- a/module-apps/application-clock/ApplicationClock.cpp
+++ b/module-apps/application-clock/ApplicationClock.cpp
@@ -7,89 +7,97 @@
  * @details
  */
 
-//module-gui
+// module-gui
 #include "gui/widgets/Window.hpp"
 
-//module-utils
+// module-utils
 #include "log/log.hpp"
-//module-services
+// module-services
 #include "service-evtmgr/EventManager.hpp"
 #include "service-evtmgr/messages/EVMessages.hpp"
 #include "service-appmgr/ApplicationManager.hpp"
-//MessageType
+// MessageType
 #include "MessageType.hpp"
-//this module
+// this module
 #include "windows/ClockMainWindow.hpp"
 #include "ApplicationClock.hpp"
 
-namespace app {
-
-ApplicationClock::ApplicationClock(std::string name,std::string parent,uint32_t stackDepth,sys::ServicePriority priority) :
-	Application( name, parent,false, stackDepth, priority ),
-    timerClock(CreateAppTimer(1000, true, [=]() {timerClockCallback(); }))
+namespace app
 {
-    timerClock.restart();
-}
 
-ApplicationClock::~ApplicationClock() {
-	// TODO Auto-generated destructor stub
-}
+    ApplicationClock::ApplicationClock(std::string name,
+                                       std::string parent,
+                                       uint32_t stackDepth,
+                                       sys::ServicePriority priority)
+        : Application(name, parent, false, stackDepth, priority),
+          timerClock(CreateAppTimer(1000, true, [=]() { timerClockCallback(); }))
+    {
+        timerClock.restart();
+    }
 
-void ApplicationClock::timerClockCallback () {
-    auto it = windows.find("MainWindow");
-    gui::ClockMainWindow *win = reinterpret_cast<gui::ClockMainWindow *>(it->second);
-    win->incrementSecond();
-    win->updateLabels();
-    render(gui::RefreshModes::GUI_REFRESH_FAST);
-}
+    ApplicationClock::~ApplicationClock()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationClock::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
+    void ApplicationClock::timerClockCallback()
+    {
+        auto it                   = windows.find("MainWindow");
+        gui::ClockMainWindow *win = reinterpret_cast<gui::ClockMainWindow *>(it->second);
+        win->incrementSecond();
+        win->updateLabels();
+        render(gui::RefreshModes::GUI_REFRESH_FAST);
+    }
 
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode ==
-		sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationClock::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
 
-	//this variable defines whether message was processed.
-	bool handled = false;
-	//if keyboard message received
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
 
-	if( handled )
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+        // this variable defines whether message was processed.
+        bool handled = false;
+        // if keyboard message received
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationClock::InitHandler() {
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    }
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationClock::InitHandler()
+    {
 
-	createUserInterface();
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-	setActiveWindow("MainWindow");
+        createUserInterface();
 
-	return ret;
-}
+        setActiveWindow("MainWindow");
 
-sys::ReturnCodes ApplicationClock::DeinitHandler() {
-	DeleteTimer(timerClock);
-	return sys::ReturnCodes::Success;
-}
+        return ret;
+    }
 
-void ApplicationClock::createUserInterface() {
+    sys::ReturnCodes ApplicationClock::DeinitHandler()
+    {
+        DeleteTimer(timerClock);
+        return sys::ReturnCodes::Success;
+    }
 
-	gui::ClockMainWindow* mainWindow = new gui::ClockMainWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(mainWindow->getName(), mainWindow));
-}
+    void ApplicationClock::createUserInterface()
+    {
 
+        gui::ClockMainWindow *mainWindow = new gui::ClockMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(mainWindow->getName(), mainWindow));
+    }
 
-void ApplicationClock::destroyUserInterface() {
-}
+    void ApplicationClock::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-clock/ApplicationClock.hpp b/module-apps/application-clock/ApplicationClock.hpp
index ae7a5e2fe..d9513e629 100644
--- a/module-apps/application-clock/ApplicationClock.hpp
+++ b/module-apps/application-clock/ApplicationClock.hpp
@@ -15,28 +15,36 @@
 #include "gui/widgets/Image.hpp"
 #include "gui/widgets/Progress.hpp"
 
+namespace app
+{
 
-namespace app {
+    /*
+     *
+     */
+    class ApplicationClock : public Application
+    {
+        AppTimer timerClock;
+        void timerClockCallback();
 
-/*
- *
- */
-class ApplicationClock: public Application {
-    AppTimer timerClock;
-    void timerClockCallback();
-public:
-	ApplicationClock(std::string name, std::string parent = "", uint32_t stackDepth=4096,sys::ServicePriority priority=sys::ServicePriority::Idle);
-	virtual ~ApplicationClock();
+      public:
+        ApplicationClock(std::string name,
+                         std::string parent            = "",
+                         uint32_t stackDepth           = 4096,
+                         sys::ServicePriority priority = sys::ServicePriority::Idle);
+        virtual ~ApplicationClock();
 
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-clock/ClockData.hpp b/module-apps/application-clock/ClockData.hpp
index db23f30de..df6b39cf3 100644
--- a/module-apps/application-clock/ClockData.hpp
+++ b/module-apps/application-clock/ClockData.hpp
@@ -12,14 +12,13 @@
 #include <cstdint>
 #include "SwitchData.hpp"
 
-class ClockData : public gui::SwitchData {
-public:
-	uint32_t hour;
-	uint32_t minute;
-	ClockData ( uint32_t hour = 0, uint32_t minute = 0) : hour{hour}, minute{minute} {};
-	virtual ~ClockData () {};
+class ClockData : public gui::SwitchData
+{
+  public:
+    uint32_t hour;
+    uint32_t minute;
+    ClockData(uint32_t hour = 0, uint32_t minute = 0) : hour{hour}, minute{minute} {};
+    virtual ~ClockData(){};
 };
 
-
-
 #endif /* MODULE_APPS_APPLICATION_CLOCK_CLOCKDATA_HPP_ */
diff --git a/module-apps/application-clock/windows/ClockMainWindow.cpp b/module-apps/application-clock/windows/ClockMainWindow.cpp
index 4c38a6a73..0fb5b4ce2 100644
--- a/module-apps/application-clock/windows/ClockMainWindow.cpp
+++ b/module-apps/application-clock/windows/ClockMainWindow.cpp
@@ -7,7 +7,7 @@
  * @details
  */
 
-//module-gui
+// module-gui
 #include "application-clock/windows/ClockMainWindow.hpp"
 #include "gui/widgets/Window.hpp"
 #include "gui/widgets/Item.hpp"
@@ -19,97 +19,105 @@
 #include "../ClockData.hpp"
 #include <Style.hpp>
 
+namespace gui
+{
 
-namespace gui {
-
-ClockMainWindow::ClockMainWindow( app::Application* app ) : gui::AppWindow( app, "MainWindow") {
-	uint32_t xOffset = 0;
-	uint32_t yOffset = 0;
-
-	hourLabel = new gui::Label(this, 100+xOffset,300-160+yOffset,280,150);
-	hourLabel->setFilled( false );
-	hourLabel->setBorderColor( gui::ColorNoColor );
-	hourLabel->setFont(style::window::font::verybig);
-	hourLabel->setText("00");
-	hourLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-
-	minuteLabel = new gui::Label(this, 100+xOffset,310+yOffset,280,150);
-	minuteLabel->setFilled( false );
-	minuteLabel->setBorderColor( gui::ColorFullBlack );
-	minuteLabel->setFont(style::window::font::verybig);
-	minuteLabel->setText("00");
-	minuteLabel->setRadius( 20 );
-	minuteLabel->setPenWidth(1);
-	minuteLabel->setFillColor( gui::Color(10,0));
-	minuteLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-
-	uint32_t x= 480/2-90+xOffset, y= 300-6+yOffset, w = 180, h =12;
-	progressBar = new Progress(this, x, y, w, h  );
-	progressBar->setTotalProgress(59);
-	progressBar->setCurrentProgress(0);
-}
-
-ClockMainWindow::~ClockMainWindow() {
-	// TODO Auto-generated destructor stub
-}
-
-bool ClockMainWindow::handleSwitchData( SwitchData* data ) {
-	ClockData* clockData = reinterpret_cast<ClockData*>( data );
-
-	if (clockData)
+    ClockMainWindow::ClockMainWindow(app::Application *app) : gui::AppWindow(app, "MainWindow")
     {
-        hour = clockData->hour % 24;
-        minute = clockData->minute % 60;
+        uint32_t xOffset = 0;
+        uint32_t yOffset = 0;
+
+        hourLabel = new gui::Label(this, 100 + xOffset, 300 - 160 + yOffset, 280, 150);
+        hourLabel->setFilled(false);
+        hourLabel->setBorderColor(gui::ColorNoColor);
+        hourLabel->setFont(style::window::font::verybig);
+        hourLabel->setText("00");
+        hourLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+
+        minuteLabel = new gui::Label(this, 100 + xOffset, 310 + yOffset, 280, 150);
+        minuteLabel->setFilled(false);
+        minuteLabel->setBorderColor(gui::ColorFullBlack);
+        minuteLabel->setFont(style::window::font::verybig);
+        minuteLabel->setText("00");
+        minuteLabel->setRadius(20);
+        minuteLabel->setPenWidth(1);
+        minuteLabel->setFillColor(gui::Color(10, 0));
+        minuteLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+
+        uint32_t x = 480 / 2 - 90 + xOffset, y = 300 - 6 + yOffset, w = 180, h = 12;
+        progressBar = new Progress(this, x, y, w, h);
+        progressBar->setTotalProgress(59);
+        progressBar->setCurrentProgress(0);
     }
 
-	return true;
-}
+    ClockMainWindow::~ClockMainWindow()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
-void ClockMainWindow::updateLabels() {
-	std::string h;
-	if( hour<10 ) {
-		h += "0";
-	}
-	h += std::to_string(hour);
-	hourLabel->setText( h );
+    bool ClockMainWindow::handleSwitchData(SwitchData *data)
+    {
+        ClockData *clockData = reinterpret_cast<ClockData *>(data);
 
-	std::string m;
-	if( minute < 10 ) {
-		m+= "0";
-	}
-	m += std::to_string(minute);
-	minuteLabel->setText( m );
-}
+        if (clockData) {
+            hour   = clockData->hour % 24;
+            minute = clockData->minute % 60;
+        }
 
-bool ClockMainWindow::incrementHour() {
-	hour++;
-	if( hour > 23 ) {
-		hour = 0;
-		return true;
-	}
-	return false;
-}
-bool ClockMainWindow::incrementMinute() {
-	minute++;
-	if( minute > 59 ) {
-		incrementHour();
-		minute = 0;
-		return true;
-	}
-	return false;
-}
+        return true;
+    }
 
-bool ClockMainWindow::incrementSecond(){
-	bool ret = false;
-	seconds++;
-	if( seconds > 59 ) {
-		incrementMinute();
-		seconds = 0;
-		ret = true;
-	}
-	progressBar->setCurrentProgress(seconds);
+    void ClockMainWindow::updateLabels()
+    {
+        std::string h;
+        if (hour < 10) {
+            h += "0";
+        }
+        h += std::to_string(hour);
+        hourLabel->setText(h);
 
-	return ret;
-}
+        std::string m;
+        if (minute < 10) {
+            m += "0";
+        }
+        m += std::to_string(minute);
+        minuteLabel->setText(m);
+    }
+
+    bool ClockMainWindow::incrementHour()
+    {
+        hour++;
+        if (hour > 23) {
+            hour = 0;
+            return true;
+        }
+        return false;
+    }
+    bool ClockMainWindow::incrementMinute()
+    {
+        minute++;
+        if (minute > 59) {
+            incrementHour();
+            minute = 0;
+            return true;
+        }
+        return false;
+    }
+
+    bool ClockMainWindow::incrementSecond()
+    {
+        bool ret = false;
+        seconds++;
+        if (seconds > 59) {
+            incrementMinute();
+            seconds = 0;
+            ret     = true;
+        }
+        progressBar->setCurrentProgress(seconds);
+
+        return ret;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-clock/windows/ClockMainWindow.hpp b/module-apps/application-clock/windows/ClockMainWindow.hpp
index 3a803bd9b..6089ffb3d 100644
--- a/module-apps/application-clock/windows/ClockMainWindow.hpp
+++ b/module-apps/application-clock/windows/ClockMainWindow.hpp
@@ -9,7 +9,7 @@
 #ifndef MODULE_APPS_APPLICATION_CLOCK_WINDOWS_CLOCKMAINWINDOW_HPP_
 #define MODULE_APPS_APPLICATION_CLOCK_WINDOWS_CLOCKMAINWINDOW_HPP_
 
-//module-gui
+// module-gui
 #include "AppWindow.hpp"
 #include "gui/widgets/Item.hpp"
 #include "gui/widgets/Image.hpp"
@@ -18,49 +18,63 @@
 #include "gui/widgets/BoxLayout.hpp"
 #include "gui/widgets/Progress.hpp"
 
+namespace gui
+{
 
-namespace gui {
+    /*
+     *
+     */
+    class ClockMainWindow : public AppWindow
+    {
+        uint32_t seconds      = 0;
+        uint32_t hour         = 0;
+        uint32_t minute       = 0;
+        Label *hourLabel      = nullptr;
+        Label *minuteLabel    = nullptr;
+        Progress *progressBar = nullptr;
 
-/*
- *
- */
-class ClockMainWindow: public AppWindow {
-	uint32_t seconds = 0;
-	uint32_t hour = 0;
-	uint32_t minute = 0;
-	Label* hourLabel = nullptr;
-	Label* minuteLabel = nullptr;
-	Progress* progressBar = nullptr;
-public:
-	ClockMainWindow( app::Application* app );
-	virtual ~ClockMainWindow();
+      public:
+        ClockMainWindow(app::Application *app);
+        virtual ~ClockMainWindow();
 
-	bool handleSwitchData( SwitchData* data ) override;
+        bool handleSwitchData(SwitchData *data) override;
 
-	void setHour( uint32_t h ) {hour = h % 24; };
-	void setMinute( uint32_t m ) {minute = m % 60; };
+        void setHour(uint32_t h)
+        {
+            hour = h % 24;
+        };
+        void setMinute(uint32_t m)
+        {
+            minute = m % 60;
+        };
 
-	/**
-	 * @brief Increments hours counter
-	 */
-	bool incrementHour();
-	/**
-	 * @brief Increments minutes counter
-	 */
-	bool incrementMinute();
-	/**
-	 * @brief Increments seconds counter
-	 */
-	bool incrementSecond();
-	/**
-	 * @brief Updates strings for hour and minutes
-	 */
-	void updateLabels();
+        /**
+         * @brief Increments hours counter
+         */
+        bool incrementHour();
+        /**
+         * @brief Increments minutes counter
+         */
+        bool incrementMinute();
+        /**
+         * @brief Increments seconds counter
+         */
+        bool incrementSecond();
+        /**
+         * @brief Updates strings for hour and minutes
+         */
+        void updateLabels();
 
-	void rebuild() {};
-	void buildInterface() { AppWindow::buildInterface(); };
-	void destroyInterface() { AppWindow::destroyInterface();};
-};
+        void rebuild(){};
+        void buildInterface()
+        {
+            AppWindow::buildInterface();
+        };
+        void destroyInterface()
+        {
+            AppWindow::destroyInterface();
+        };
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-desktop/ApplicationDesktop.cpp b/module-apps/application-desktop/ApplicationDesktop.cpp
index 5bb5296ff..047c930df 100644
--- a/module-apps/application-desktop/ApplicationDesktop.cpp
+++ b/module-apps/application-desktop/ApplicationDesktop.cpp
@@ -7,8 +7,6 @@
  * @details
  */
 
-
-
 #include "Application.hpp"
 
 #include "MessageType.hpp"
@@ -23,141 +21,143 @@
 #include <cassert>
 #include <service-appmgr/ApplicationManager.hpp>
 
-namespace app {
+namespace app
+{
 
-    ApplicationDesktop::ApplicationDesktop(std::string name, std::string parent, bool startBackground) : Application(name, parent)
+    ApplicationDesktop::ApplicationDesktop(std::string name, std::string parent, bool startBackground)
+        : Application(name, parent)
     {
         busChannels.push_back(sys::BusChannels::ServiceDBNotifications);
     }
 
-ApplicationDesktop::~ApplicationDesktop() {
-	LOG_INFO("Desktop destruktor");
-}
-
-// Invoked upon receiving data message
-sys::Message_t ApplicationDesktop::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode ==
-		sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
-
-    bool handled = false;
-    if (auto msg = dynamic_cast<DBNotificationMessage *>(msgl))
+    ApplicationDesktop::~ApplicationDesktop()
     {
-        handled = handle(msg);
-    }
-    else if (auto msg = dynamic_cast<CellularNotificationMessage *>(msgl))
-    {
-        handled = handle(msg);
+        LOG_INFO("Desktop destruktor");
     }
 
-    if (handled)
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationDesktop::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
     {
-        return std::make_shared<sys::ResponseMessage>();
-    }
-    else
-    {
-        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-    }
-}
 
-auto ApplicationDesktop::handle(DBNotificationMessage *msg) -> bool
-{
-    LOG_DEBUG("Received multicast");
-    assert(msg);
-    if ((msg->notificationType == DB::NotificationType::Updated) || (msg->notificationType == DB::NotificationType::Added))
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
+
+        bool handled = false;
+        if (auto msg = dynamic_cast<DBNotificationMessage *>(msgl)) {
+            handled = handle(msg);
+        }
+        else if (auto msg = dynamic_cast<CellularNotificationMessage *>(msgl)) {
+            handled = handle(msg);
+        }
+
+        if (handled) {
+            return std::make_shared<sys::ResponseMessage>();
+        }
+        else {
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+        }
+    }
+
+    auto ApplicationDesktop::handle(DBNotificationMessage *msg) -> bool
     {
+        LOG_DEBUG("Received multicast");
+        assert(msg);
+        if ((msg->notificationType == DB::NotificationType::Updated) ||
+            (msg->notificationType == DB::NotificationType::Added)) {
+            notifications.notSeenCalls = DBServiceAPI::CalllogGetCount(this, EntryState::UNREAD);
+            notifications.notSeenSMS   = DBServiceAPI::SMSGetCount(this, EntryState::UNREAD);
+            this->windows[app::name::window::desktop_menu]->rebuild();
+            this->windows[app::name::window::desktop_lockscreen]->rebuild();
+            return true;
+        }
+        return false;
+    }
+
+    auto ApplicationDesktop::handle(CellularNotificationMessage *msg) -> bool
+    {
+        assert(msg);
+        if (msg->type == CellularNotificationMessage::Type::ModemOn &&
+            Store::GSM::get()->sim != Store::GSM::SIM::SIM1 && Store::GSM::get()->sim != Store::GSM::SIM::SIM1) {
+            if (screenLocked) {
+                need_sim_select = true;
+            }
+            else {
+                need_sim_select = false;
+                sapm::ApplicationManager::messageSwitchApplication(this, app::name_settings, app::sim_select, nullptr);
+            }
+            return true;
+        }
+        return false;
+    }
+
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationDesktop::InitHandler()
+    {
+
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
+
+        // if value of the pin hash is different than 0 it means that home screen is pin protected
+        if (settings.lockPassHash) {
+            pinLocked = true;
+        }
+
+        screenLocked = true;
+
         notifications.notSeenCalls = DBServiceAPI::CalllogGetCount(this, EntryState::UNREAD);
-        notifications.notSeenSMS = DBServiceAPI::SMSGetCount(this, EntryState::UNREAD);
-        this->windows[app::name::window::desktop_menu]->rebuild();
-        this->windows[app::name::window::desktop_lockscreen]->rebuild();
-        return true;
-    }
-    return false;
-}
+        notifications.notSeenSMS   = DBServiceAPI::SMSGetCount(this, EntryState::UNREAD);
 
-auto ApplicationDesktop::handle(CellularNotificationMessage *msg) -> bool
-{
-    assert(msg);
-    if (msg->type == CellularNotificationMessage::Type::ModemOn && Store::GSM::get()->sim != Store::GSM::SIM::SIM1 &&
-        Store::GSM::get()->sim != Store::GSM::SIM::SIM1)
+        createUserInterface();
+
+        setActiveWindow(gui::name::window::main_window);
+
+        return ret;
+    }
+
+    sys::ReturnCodes ApplicationDesktop::DeinitHandler()
     {
-        if (screenLocked)
-        {
-            need_sim_select = true;
-        }
-        else
-        {
-            need_sim_select = false;
-            sapm::ApplicationManager::messageSwitchApplication(this, app::name_settings, app::sim_select, nullptr);
-        }
-        return true;
+        LOG_INFO("DeinitHandler");
+        return sys::ReturnCodes::Success;
     }
-    return false;
-}
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationDesktop::InitHandler() {
+    void ApplicationDesktop::createUserInterface()
+    {
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+        gui::AppWindow *window = nullptr;
 
-	//if value of the pin hash is different than 0 it means that home screen is pin protected
-	if( settings.lockPassHash ) {
-		pinLocked = true;
-	}
+        window = new gui::DesktopMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	screenLocked = true;
+        window = new gui::PinLockWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    notifications.notSeenCalls = DBServiceAPI::CalllogGetCount(this, EntryState::UNREAD);
-    notifications.notSeenSMS = DBServiceAPI::SMSGetCount(this, EntryState::UNREAD);
+        window = new gui::MenuWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    createUserInterface();
+        window = new gui::PowerOffWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
 
-    setActiveWindow(gui::name::window::main_window);
+    bool ApplicationDesktop::getScreenLocked()
+    {
+        return screenLocked;
+    }
 
-    return ret;
-}
+    bool ApplicationDesktop::getPinLocked()
+    {
+        return pinLocked;
+    }
 
-sys::ReturnCodes ApplicationDesktop::DeinitHandler() {
-	LOG_INFO("DeinitHandler");
-	return sys::ReturnCodes::Success;
-}
+    void ApplicationDesktop::setScreenLocked(bool val)
+    {
+        screenLocked = val;
+    };
 
-void ApplicationDesktop::createUserInterface() {
+    void ApplicationDesktop::destroyUserInterface()
+    {}
 
-	gui::AppWindow* window = nullptr;
-
-	window = new gui::DesktopMainWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-
-	window = new gui::PinLockWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>( window->getName(), window));
-
-	window = new gui::MenuWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>( window->getName(), window));
-
-	window = new gui::PowerOffWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>( window->getName(), window));
-}
-
-bool ApplicationDesktop::getScreenLocked() {
-	return screenLocked;
-}
-
-bool ApplicationDesktop::getPinLocked() {
-	return pinLocked;
-}
-
-void ApplicationDesktop::setScreenLocked( bool val ) {
-	screenLocked = val;
-};
-
-void ApplicationDesktop::destroyUserInterface() {
-}
-
-} /* namespace gui */
+} // namespace app
diff --git a/module-apps/application-desktop/ApplicationDesktop.hpp b/module-apps/application-desktop/ApplicationDesktop.hpp
index 416b4450c..f11b18b8c 100644
--- a/module-apps/application-desktop/ApplicationDesktop.hpp
+++ b/module-apps/application-desktop/ApplicationDesktop.hpp
@@ -14,49 +14,57 @@
 #include "service-cellular/messages/CellularMessage.hpp"
 #include "service-db/messages/DBNotificationMessage.hpp"
 
-namespace app {
+namespace app
+{
 
     namespace name::window
     {
-        inline const std::string desktop_menu = "MenuWindow";
+        inline const std::string desktop_menu       = "MenuWindow";
         inline const std::string desktop_lockscreen = gui::name::window::main_window;
     }; // namespace name::window
 
-inline const std::string name_desktop = "ApplicationDesktop";
+    inline const std::string name_desktop = "ApplicationDesktop";
 
-class ApplicationDesktop : public Application {
-protected:
-	//determines whether screen should be protected by pin verification
-	bool screenLocked = true;
-	bool pinLocked = false;
-public:
-  bool need_sim_select = false;
-  struct Notifications
-  {
-      unsigned int notSeenSMS = 0;
-      unsigned int notSeenCalls = 0;
-  } notifications;
-    ApplicationDesktop( std::string name=name_desktop, std::string parent = "", bool startBackground =false );
-	virtual ~ApplicationDesktop();
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+    class ApplicationDesktop : public Application
+    {
+      protected:
+        // determines whether screen should be protected by pin verification
+        bool screenLocked = true;
+        bool pinLocked    = false;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+      public:
+        bool need_sim_select = false;
+        struct Notifications
+        {
+            unsigned int notSeenSMS   = 0;
+            unsigned int notSeenCalls = 0;
+        } notifications;
+        ApplicationDesktop(std::string name = name_desktop, std::string parent = "", bool startBackground = false);
+        virtual ~ApplicationDesktop();
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-    bool getScreenLocked();
-	void setScreenLocked( bool val );
-	bool getPinLocked();
-    // if there is modem notification and there is no default SIM selected, then we need to select if when unlock is done
-    bool handle(DBNotificationMessage *msg);
-    bool handle(CellularNotificationMessage *);
-    /**
-	 * This static method will be used to lock the phone
-	 */
-//	static bool messageLockPhone( sys::Service* sender, std::string application , const gui::InputEvent& event );
-};
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
+
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+        bool getScreenLocked();
+        void setScreenLocked(bool val);
+        bool getPinLocked();
+        // if there is modem notification and there is no default SIM selected, then we need to select if when unlock is
+        // done
+        bool handle(DBNotificationMessage *msg);
+        bool handle(CellularNotificationMessage *);
+        /**
+         * This static method will be used to lock the phone
+         */
+        //	static bool messageLockPhone( sys::Service* sender, std::string application , const gui::InputEvent& event
+        //);
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-desktop/data/LockPhoneData.hpp b/module-apps/application-desktop/data/LockPhoneData.hpp
index bc0a36d6f..c6a665550 100644
--- a/module-apps/application-desktop/data/LockPhoneData.hpp
+++ b/module-apps/application-desktop/data/LockPhoneData.hpp
@@ -11,22 +11,31 @@
 
 #include "gui/SwitchData.hpp"
 
+namespace gui
+{
 
-namespace gui {
+    // class template that stores information that was sent along with switch message
+    class LockPhoneData : public gui::SwitchData
+    {
+        std::string previousApplication;
 
-//class template that stores information that was sent along with switch message
-class LockPhoneData : public gui::SwitchData{
-	std::string previousApplication;
-public:
-	LockPhoneData() : SwitchData() { description = "LockPhoneData"; };
-	virtual ~LockPhoneData() {};
+      public:
+        LockPhoneData() : SwitchData()
+        {
+            description = "LockPhoneData";
+        };
+        virtual ~LockPhoneData(){};
 
-	void setPrevApplication( const std::string& prevApp ) { previousApplication = prevApp; };
-	const std::string& getPreviousApplication() { return previousApplication; };
-};
-
-
-} //namespace gui
+        void setPrevApplication(const std::string &prevApp)
+        {
+            previousApplication = prevApp;
+        };
+        const std::string &getPreviousApplication()
+        {
+            return previousApplication;
+        };
+    };
 
+} // namespace gui
 
 #endif /* MODULE_APPS_APPLICATION_DESKTOP_DATA_LOCKPHONEDATA_HPP_ */
diff --git a/module-apps/application-desktop/windows/Common.hpp b/module-apps/application-desktop/windows/Common.hpp
index 9925995f5..e0c0017b1 100644
--- a/module-apps/application-desktop/windows/Common.hpp
+++ b/module-apps/application-desktop/windows/Common.hpp
@@ -6,8 +6,7 @@ inline void center(gui::Item *parent, gui::Item *child, gui::Axis axis)
     if (!parent || !child)
         return;
     auto center = (parent->area().size(axis) - child->area().size(axis)) / 2;
-    if (center > 0)
-    {
+    if (center > 0) {
         child->area().pos(axis) += center;
     }
 }
@@ -17,8 +16,7 @@ inline void bottom(gui::Item *parent, gui::Item *child, gui::Axis axis)
     if (!parent || !child)
         return;
     auto bottom = (parent->area().size(axis) - child->area().size(axis));
-    if (bottom > 0)
-    {
+    if (bottom > 0) {
         child->area().pos(axis) += bottom;
     }
 }
diff --git a/module-apps/application-desktop/windows/DesktopMainWindow.cpp b/module-apps/application-desktop/windows/DesktopMainWindow.cpp
index 4fe9d1195..e530748f5 100644
--- a/module-apps/application-desktop/windows/DesktopMainWindow.cpp
+++ b/module-apps/application-desktop/windows/DesktopMainWindow.cpp
@@ -34,16 +34,17 @@
 
 namespace style
 {
-    const auto design_time_offset = 106;
-    const auto design_time_h = 96;
-    const auto design_day_offset = 204;
-    const auto design_day_h = 51;
-    const auto design_border_offset = 20;
-    const auto design_option_span = 8;
+    const auto design_time_offset          = 106;
+    const auto design_time_h               = 96;
+    const auto design_day_offset           = 204;
+    const auto design_day_h                = 51;
+    const auto design_border_offset        = 20;
+    const auto design_option_span          = 8;
     const auto design_notifications_offset = 284;
 }; // namespace style
 
-namespace gui {
+namespace gui
+{
 
     void DesktopMainWindow::buildInterface()
     {
@@ -52,7 +53,8 @@ namespace gui {
         AppWindow::buildInterface();
 
         bottomBar->setActive(BottomBar::Side::CENTER, true);
-        topBar->setActive({{TopBar::Elements::SIGNAL, true}, {TopBar::Elements::LOCK, true}, {TopBar::Elements::BATTERY, true}});
+        topBar->setActive(
+            {{TopBar::Elements::SIGNAL, true}, {TopBar::Elements::LOCK, true}, {TopBar::Elements::BATTERY, true}});
 
         time = new gui::Label(this, 0, style::design_time_offset, style::window_width, style::design_time_h);
         time->setFilled(false);
@@ -69,291 +71,303 @@ namespace gui {
         dayText->setAlignement(Alignment::ALIGN_HORIZONTAL_CENTER);
 
         setVisibleState();
-}
-
-void DesktopMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	delete time;
-	delete dayText;
-	focusItem = nullptr;
-	children.clear();
-}
-
-DesktopMainWindow::DesktopMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window)
-{
-	buildInterface();
-}
-
-DesktopMainWindow::~DesktopMainWindow() {
-	destroyInterface();
-}
-
-void DesktopMainWindow::setVisibleState() {
-
-    auto app = dynamic_cast<app::ApplicationDesktop *>(application);
-    if (!app)
-    {
-        return;
     }
 
-    if( app->getScreenLocked() ) {
-		bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("app_desktop_unlock"));
-		topBar->setActive( TopBar::Elements::LOCK, true );
-	}
-    else
+    void DesktopMainWindow::destroyInterface()
     {
-        auto app = dynamic_cast<app::ApplicationDesktop *>(application);
-        assert(app);
-        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_desktop_menu"));
-        topBar->setActive(TopBar::Elements::LOCK, false);
-        if (!fillNotifications(app))
-        {
-            LOG_ERROR("Couldn't fit in all notifications");
-        }
-        if (app->need_sim_select && Store::GSM::get()->sim == Store::GSM::SIM::SIM_UNKNOWN)
-        {
-            sapm::ApplicationManager::messageSwitchApplication(this->application, app::name_settings, app::sim_select, nullptr);
-        }
+        AppWindow::destroyInterface();
+        delete time;
+        delete dayText;
+        focusItem = nullptr;
+        children.clear();
     }
-}
 
-void DesktopMainWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
+    DesktopMainWindow::DesktopMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window)
+    {
+        buildInterface();
+    }
 
-	//update time
-	time->setText( topBar->getTimeString() );
+    DesktopMainWindow::~DesktopMainWindow()
+    {
+        destroyInterface();
+    }
+
+    void DesktopMainWindow::setVisibleState()
+    {
 
-	//check if there was a signal to lock the pone due to inactivity.
-	if( (data != nullptr) && (data->getDescription() == "LockPhoneData")) {
         auto app = dynamic_cast<app::ApplicationDesktop *>(application);
-        if (!app)
-        {
+        if (!app) {
             return;
         }
-        app->setScreenLocked(true);
 
-		LockPhoneData* lockData = reinterpret_cast<LockPhoneData*>( data );
-		lockTimeoutApplilcation = lockData->getPreviousApplication();
+        if (app->getScreenLocked()) {
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_desktop_unlock"));
+            topBar->setActive(TopBar::Elements::LOCK, true);
+        }
+        else {
+            auto app = dynamic_cast<app::ApplicationDesktop *>(application);
+            assert(app);
+            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_desktop_menu"));
+            topBar->setActive(TopBar::Elements::LOCK, false);
+            if (!fillNotifications(app)) {
+                LOG_ERROR("Couldn't fit in all notifications");
+            }
+            if (app->need_sim_select && Store::GSM::get()->sim == Store::GSM::SIM::SIM_UNKNOWN) {
+                sapm::ApplicationManager::messageSwitchApplication(
+                    this->application, app::name_settings, app::sim_select, nullptr);
+            }
+        }
+    }
 
-		reinterpret_cast<app::ApplicationDesktop*>(application)->setSuspendFlag(true);
-	}
-
-	setVisibleState();
-}
-
-bool DesktopMainWindow::onInput( const InputEvent& inputEvent ) {
-	
-	// do nothing
-	if( inputEvent.state == InputEvent::State::keyReleasedShort && inputEvent.keyCode == KeyCode::KEY_RF ) return false;
-
-    app::ApplicationDesktop *app = dynamic_cast<app::ApplicationDesktop *>(application);
-    if (app == nullptr)
+    void DesktopMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
     {
-        LOG_ERROR("not ApplicationDesktop");
+
+        // update time
+        time->setText(topBar->getTimeString());
+
+        // check if there was a signal to lock the pone due to inactivity.
+        if ((data != nullptr) && (data->getDescription() == "LockPhoneData")) {
+            auto app = dynamic_cast<app::ApplicationDesktop *>(application);
+            if (!app) {
+                return;
+            }
+            app->setScreenLocked(true);
+
+            LockPhoneData *lockData = reinterpret_cast<LockPhoneData *>(data);
+            lockTimeoutApplilcation = lockData->getPreviousApplication();
+
+            reinterpret_cast<app::ApplicationDesktop *>(application)->setSuspendFlag(true);
+        }
+
+        setVisibleState();
+    }
+
+    bool DesktopMainWindow::onInput(const InputEvent &inputEvent)
+    {
+
+        // do nothing
+        if (inputEvent.state == InputEvent::State::keyReleasedShort && inputEvent.keyCode == KeyCode::KEY_RF)
+            return false;
+
+        app::ApplicationDesktop *app = dynamic_cast<app::ApplicationDesktop *>(application);
+        if (app == nullptr) {
+            LOG_ERROR("not ApplicationDesktop");
+            return AppWindow::onInput(inputEvent);
+        }
+
+        auto code = translator.handle(inputEvent.key, InputMode({InputMode::phone}).get());
+
+        // process shortpress
+        if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+
+            if (app->getScreenLocked()) {
+                // if enter was pressed
+                if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+                    unlockStartTime = xTaskGetTickCount();
+                    enterPressed    = true;
+                }
+                else if ((inputEvent.keyCode == KeyCode::KEY_PND) && enterPressed) {
+                    // if interval between enter and pnd keys is less than time defined for unlocking
+                    if (xTaskGetTickCount() - unlockStartTime < unclockTime) {
+                        // display pin lock screen or simply refresh current window to update labels
+                        if (app->getPinLocked())
+                            // if there was no application on to before closing proceed normally to pin protection
+                            // window.
+                            if (lockTimeoutApplilcation.empty()) {
+                                application->switchWindow("PinLockWindow");
+                            }
+                            else {
+                                std::unique_ptr<LockPhoneData> data = std::make_unique<LockPhoneData>();
+                                data->setPrevApplication(lockTimeoutApplilcation);
+                                lockTimeoutApplilcation = "";
+                                application->switchWindow("PinLockWindow", std::move(data));
+                            }
+
+                        else {
+
+                            // if phone was locked by user show unlocked main window
+                            if (lockTimeoutApplilcation.empty()) {
+                                app->setScreenLocked(false);
+                                setVisibleState();
+                                application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                            }
+                            // if there was application on top when timeout occurred
+                            else {
+                                lockTimeoutApplilcation = "";
+                                sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+                            }
+                        }
+                    }
+                    enterPressed = false;
+                }
+                else {
+                    enterPressed = false;
+                }
+            }
+            // screen is unlocked
+            else {
+                // pressing enter moves user to menu screen
+                if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+                    application->switchWindow("MenuWindow");
+                }
+                // if numeric key was pressed record that key and send it to call application
+                else if (code != 0) {
+                    return app::call(application, app::CallOperation::PrepareCall, code);
+                }
+            }
+        }
+        else if (inputEvent.state == InputEvent::State::keyReleasedLong) {
+            // long press of # locks screen if it was unlocked
+            if ((inputEvent.keyCode == KeyCode::KEY_PND) && (app->getScreenLocked() == false)) {
+                app->setScreenLocked(true);
+                setVisibleState();
+                app->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                app->setSuspendFlag(true);
+                return true;
+            }
+            // long press of right function button move user to power off window
+            else if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                application->switchWindow("PowerOffWindow");
+                return true;
+            }
+            // long press of '0' key is translated to '+'
+            else if (inputEvent.keyCode == KeyCode::KEY_0) {
+                return app::call(application, app::CallOperation::PrepareCall, '+');
+            }
+        }
+
+        // check if any of the lower inheritance onInput methods catch the event
         return AppWindow::onInput(inputEvent);
     }
 
-    auto code = translator.handle(inputEvent.key, InputMode({InputMode::phone}).get());
+    void DesktopMainWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
 
-    //process shortpress
-	if( inputEvent.state == InputEvent::State::keyReleasedShort ) {
+    bool DesktopMainWindow::updateTime(const UTF8 &timeStr)
+    {
+        auto ret = AppWindow::updateTime(timeStr);
+        time->setText(topBar->getTimeString());
+        return ret;
+    }
+    bool DesktopMainWindow::updateTime(const uint32_t &timestamp, bool mode24H)
+    {
+        auto ret = AppWindow::updateTime(timestamp, mode24H);
+        time->setText(topBar->getTimeString());
+        return ret;
+    }
 
-		if( app->getScreenLocked() ) {
-			//if enter was pressed
-			if( inputEvent.keyCode == KeyCode::KEY_ENTER ) {
-				unlockStartTime = xTaskGetTickCount();
-				enterPressed = true;
-			}
-			else if(( inputEvent.keyCode == KeyCode::KEY_PND ) && enterPressed ) {
-				//if interval between enter and pnd keys is less than time defined for unlocking
-				if( xTaskGetTickCount() - unlockStartTime  < unclockTime) {
-					//display pin lock screen or simply refresh current window to update labels
-					if( app->getPinLocked())
-						//if there was no application on to before closing proceed normally to pin protection window.
-						if( lockTimeoutApplilcation.empty()) {
-							application->switchWindow( "PinLockWindow" );
-						}
-						else {
-							std::unique_ptr<LockPhoneData> data = std::make_unique<LockPhoneData>();
-							data->setPrevApplication( lockTimeoutApplilcation );
-							lockTimeoutApplilcation = "";
-							application->switchWindow( "PinLockWindow", std::move(data) );
-						}
+    std::list<DrawCommand *> DesktopMainWindow::buildDrawList()
+    {
+        time->setText(topBar->getTimeString());
+        return gui::AppWindow::buildDrawList();
+    }
 
-					else {
+    auto add_box_icon(gui::BoxLayout *layout, UTF8 icon)
+    {
+        auto thumbnail = new gui::Image(icon);
+        center(layout, thumbnail, Axis::Y);
+        thumbnail->activeItem = false;
+        layout->addWidget(thumbnail);
+    }
 
-						//if phone was locked by user show unlocked main window
-						if( lockTimeoutApplilcation.empty() ) {
-							app->setScreenLocked(false);
-							setVisibleState();
-							application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-						}
-						//if there was application on top when timeout occurred
-						else {
-							lockTimeoutApplilcation = "";
-							sapm::ApplicationManager::messageSwitchPreviousApplication( application );
-						}
-					}
-				}
-				enterPressed = false;
-			}
-			else {
-				enterPressed = false;
-			}
-		}
-		//screen is unlocked
-		else {
-            //pressing enter moves user to menu screen
-			if( inputEvent.keyCode == KeyCode::KEY_ENTER ) {
-				application->switchWindow( "MenuWindow" );
-			}
-            // if numeric key was pressed record that key and send it to call application
-            else if (code != 0)
-            {
-                return app::call(application, app::CallOperation::PrepareCall, code);
+    /// for now notifications are like that: `^<span>[icon]<span>[dumb text]       [dot image] [number of
+    /// notifications]<span>$`
+    auto add_notification(BoxLayout *layout, UTF8 icon, UTF8 name, UTF8 indicator, std::function<bool()> callback)
+        -> bool
+    {
+        const auto text_normal_size        = 200;
+        const auto size_needed_for_2digits = 30;
+        // 1. create hbox for all elements
+        auto el   = new gui::HBox(nullptr, 0, 0, layout->getWidth(), style::window::label::default_h);
+        auto text = new gui::Label(nullptr, 0, 0, text_normal_size, style::window::label::default_h, "");
+        text->area(Item::Area::Max)               = text->area(Item::Area::Normal); // set area from 0 to normal
+        text->area(Item::Area::Max).size(Axis::X) = el->area().w; // set max area for text in axis to max
+        text->setText(name);
+        text->setFont(style::window::font::medium);
+        text->setAlignement(Alignment::ALIGN_VERTICAL_CENTER);
+        text->setPenWidth(style::window::default_border_no_focus_w);
+        text->activeItem = false;
+
+        auto number = new gui::Label();
+        number->setText(indicator);
+        number->setFont(style::window::font::mediumbold);
+        number->setPenWidth(style::window::default_border_no_focus_w);
+        number->setSize(size_needed_for_2digits, el->area().h);
+        number->setAlignement(Alignment::ALIGN_VERTICAL_CENTER | Alignment::ALIGN_HORIZONTAL_RIGHT);
+        number->activeItem = false;
+        // 2. Add all elements to hbox layout
+        new gui::Span(el, Axis::X, style::design_border_offset);
+        add_box_icon(el, icon);
+        new gui::Span(el, Axis::X, style::design_border_offset);
+        el->addWidget(text);
+        add_box_icon(el, "dot_12px_soft");
+        el->addWidget(number);
+        // box right inner margin
+        new gui::Span(el, Axis::X, style::design_border_offset);
+        // 3. Set hbox layout properties
+        el->setPenWidth(style::window::default_border_no_focus_w);
+        el->setPenFocusWidth(style::window::default_border_focucs_w);
+        el->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
+        el->inputCallback = [callback](Item &, const InputEvent &event) {
+            if (event.state == InputEvent::State::keyReleasedShort && event.keyCode == KeyCode::KEY_LF) {
+                return callback();
             }
-		}
-	}
-	else if( inputEvent.state == InputEvent::State::keyReleasedLong ) {
-		//long press of # locks screen if it was unlocked
-		if( (inputEvent.keyCode == KeyCode::KEY_PND) && ( app->getScreenLocked() == false ) ) {
-            app->setScreenLocked(true);
-            setVisibleState();
-            app->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-            app->setSuspendFlag(true);
-            return true;
+            return false;
+        };
+        layout->addWidget(el);
+        if (el->visible) {
+            // space between next notifications to show
+            layout->addWidget(new gui::Span(Axis::Y, style::design_option_span));
         }
-        //long press of right function button move user to power off window
-		else if (inputEvent.keyCode == KeyCode::KEY_RF) {
-			application->switchWindow( "PowerOffWindow" );
-            return true;
+        return el->visible;
+    }
+
+    auto DesktopMainWindow::fillNotifications(app::ApplicationDesktop *app) -> bool
+    {
+        if (notifications) {
+            this->removeWidget(notifications);
+            delete notifications;
         }
-        // long press of '0' key is translated to '+'
-        else if (inputEvent.keyCode == KeyCode::KEY_0)
-        {
-            return app::call(application, app::CallOperation::PrepareCall, '+');
+        // 1. create notifications box
+        notifications = new gui::VBox(nullptr,
+                                      style::window::default_left_margin,
+                                      style::design_notifications_offset,
+                                      style::window_width - 2 * style::window::default_left_margin,
+                                      bottomBar->widgetArea.pos(Axis::Y) - style::design_notifications_offset);
+        notifications->setPenWidth(style::window::default_border_no_focus_w);
+        notifications->setPenFocusWidth(style::window::default_border_no_focus_w);
+        this->addWidget(notifications);
+        if (!notifications->visible) {
+            LOG_ERROR("Can't fit notifications box!");
+            return false;
         }
-    }
 
-    //check if any of the lower inheritance onInput methods catch the event
-	return AppWindow::onInput( inputEvent );
-}
-
-void DesktopMainWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-
-bool DesktopMainWindow::updateTime( const UTF8& timeStr ) {
-	auto ret = AppWindow::updateTime( timeStr );
-	time->setText( topBar->getTimeString());
-	return ret;
-}
-bool DesktopMainWindow::updateTime( const uint32_t& timestamp, bool mode24H ) {
-	auto ret = AppWindow::updateTime( timestamp, mode24H );
-	time->setText( topBar->getTimeString());
-	return ret;
-}
-
-std::list<DrawCommand*> DesktopMainWindow::buildDrawList() {
-	time->setText( topBar->getTimeString());
-    return gui::AppWindow::buildDrawList();
-}
-
-auto add_box_icon(gui::BoxLayout *layout, UTF8 icon)
-{
-    auto thumbnail = new gui::Image(icon);
-    center(layout, thumbnail, Axis::Y);
-    thumbnail->activeItem = false;
-    layout->addWidget(thumbnail);
-}
-
-/// for now notifications are like that: `^<span>[icon]<span>[dumb text]       [dot image] [number of notifications]<span>$`
-auto add_notification(BoxLayout *layout, UTF8 icon, UTF8 name, UTF8 indicator, std::function<bool()> callback) -> bool
-{
-    const auto text_normal_size = 200;
-    const auto size_needed_for_2digits = 30;
-    // 1. create hbox for all elements
-    auto el = new gui::HBox(nullptr, 0, 0, layout->getWidth(), style::window::label::default_h);
-    auto text = new gui::Label(nullptr, 0, 0, text_normal_size, style::window::label::default_h, "");
-    text->area(Item::Area::Max) = text->area(Item::Area::Normal); // set area from 0 to normal
-    text->area(Item::Area::Max).size(Axis::X) = el->area().w;     // set max area for text in axis to max
-    text->setText(name);
-    text->setFont(style::window::font::medium);
-    text->setAlignement(Alignment::ALIGN_VERTICAL_CENTER);
-    text->setPenWidth(style::window::default_border_no_focus_w);
-    text->activeItem = false;
-
-    auto number = new gui::Label();
-    number->setText(indicator);
-    number->setFont(style::window::font::mediumbold);
-    number->setPenWidth(style::window::default_border_no_focus_w);
-    number->setSize(size_needed_for_2digits, el->area().h);
-    number->setAlignement(Alignment::ALIGN_VERTICAL_CENTER | Alignment::ALIGN_HORIZONTAL_RIGHT);
-    number->activeItem = false;
-    // 2. Add all elements to hbox layout
-    new gui::Span(el, Axis::X, style::design_border_offset);
-    add_box_icon(el, icon);
-    new gui::Span(el, Axis::X, style::design_border_offset);
-    el->addWidget(text);
-    add_box_icon(el, "dot_12px_soft");
-    el->addWidget(number);
-    // box right inner margin
-    new gui::Span(el, Axis::X, style::design_border_offset);
-    // 3. Set hbox layout properties
-    el->setPenWidth(style::window::default_border_no_focus_w);
-    el->setPenFocusWidth(style::window::default_border_focucs_w);
-    el->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
-    el->inputCallback = [callback](Item &, const InputEvent &event) {
-        if (event.state == InputEvent::State::keyReleasedShort && event.keyCode == KeyCode::KEY_LF)
-        {
-            return callback();
+        // 2. actually fill it in
+        if (app->notifications.notSeenCalls) {
+            add_notification(notifications,
+                             "phone",
+                             utils::localize.get("app_desktop_missed_calls"),
+                             std::to_string(app->notifications.notSeenCalls),
+                             [this]() {
+                                 return sapm::ApplicationManager::messageSwitchApplication(
+                                     application, app::CallLogAppStr, gui::name::window::main_window, nullptr);
+                             });
         }
-        return false;
-    };
-    layout->addWidget(el);
-    if (el->visible)
-    {
-        // space between next notifications to show
-        layout->addWidget(new gui::Span(Axis::Y, style::design_option_span));
+        if (app->notifications.notSeenSMS) {
+            add_notification(notifications,
+                             "mail",
+                             utils::localize.get("app_desktop_unread_messages"),
+                             std::to_string(app->notifications.notSeenSMS),
+                             [this]() {
+                                 return sapm::ApplicationManager::messageSwitchApplication(
+                                     application, app::name_messages, gui::name::window::main_window, nullptr);
+                             });
+        }
+        setFocusItem(notifications);
+        return true;
     }
-    return el->visible;
-}
-
-auto DesktopMainWindow::fillNotifications(app::ApplicationDesktop *app) -> bool
-{
-    if (notifications)
-    {
-        this->removeWidget(notifications);
-        delete notifications;
-    }
-    // 1. create notifications box
-    notifications =
-        new gui::VBox(nullptr, style::window::default_left_margin, style::design_notifications_offset,
-                      style::window_width - 2 * style::window::default_left_margin, bottomBar->widgetArea.pos(Axis::Y) - style::design_notifications_offset);
-    notifications->setPenWidth(style::window::default_border_no_focus_w);
-    notifications->setPenFocusWidth(style::window::default_border_no_focus_w);
-    this->addWidget(notifications);
-    if (!notifications->visible)
-    {
-        LOG_ERROR("Can't fit notifications box!");
-        return false;
-    }
-
-    // 2. actually fill it in
-    if (app->notifications.notSeenCalls)
-    {
-        add_notification(notifications, "phone", utils::localize.get("app_desktop_missed_calls"), std::to_string(app->notifications.notSeenCalls), [this]() {
-            return sapm::ApplicationManager::messageSwitchApplication(application, app::CallLogAppStr, gui::name::window::main_window, nullptr);
-        });
-    }
-    if (app->notifications.notSeenSMS)
-    {
-        add_notification(notifications, "mail", utils::localize.get("app_desktop_unread_messages"), std::to_string(app->notifications.notSeenSMS), [this]() {
-            return sapm::ApplicationManager::messageSwitchApplication(application, app::name_messages, gui::name::window::main_window, nullptr);
-        });
-    }
-    setFocusItem(notifications);
-    return true;
-}
 
 } /* namespace gui */
diff --git a/module-apps/application-desktop/windows/DesktopMainWindow.hpp b/module-apps/application-desktop/windows/DesktopMainWindow.hpp
index 793e0d867..ec892c7c6 100644
--- a/module-apps/application-desktop/windows/DesktopMainWindow.hpp
+++ b/module-apps/application-desktop/windows/DesktopMainWindow.hpp
@@ -18,57 +18,59 @@
 #include "gui/widgets/TopBar.hpp"
 #include "gui/widgets/Window.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class DesktopMainWindow: public AppWindow {
-protected:
-	gui::Label* description = nullptr;
-	gui::Label* time = nullptr;
-	gui::Label* dayText = nullptr;
-	gui::Image* messagesImage = nullptr;
-    gui::VBox *notifications = nullptr;
-    /**
-	 * Time for pressing sequence of two buttons for unlocking the device in miliseconds.
-	 */
-	uint32_t unclockTime = 3000;
-	/**
-	 * value of the system time when enter key was pressed.
-	 */
-	uint32_t unlockStartTime = 0;
-	/**
-	 * Flag used in detecting unlock seqience
-	 */
-	bool enterPressed = false;
-	/**
-	 * Name of the appliction that was on top when lock timeout occured
-	 */
-	std::string lockTimeoutApplilcation = "";
+    /*
+     *
+     */
+    class DesktopMainWindow : public AppWindow
+    {
+      protected:
+        gui::Label *description   = nullptr;
+        gui::Label *time          = nullptr;
+        gui::Label *dayText       = nullptr;
+        gui::Image *messagesImage = nullptr;
+        gui::VBox *notifications  = nullptr;
+        /**
+         * Time for pressing sequence of two buttons for unlocking the device in miliseconds.
+         */
+        uint32_t unclockTime = 3000;
+        /**
+         * value of the system time when enter key was pressed.
+         */
+        uint32_t unlockStartTime = 0;
+        /**
+         * Flag used in detecting unlock seqience
+         */
+        bool enterPressed = false;
+        /**
+         * Name of the appliction that was on top when lock timeout occured
+         */
+        std::string lockTimeoutApplilcation = "";
 
-	//method hides or show widgets and sets bars according to provided state
-	void setVisibleState();
-    auto fillNotifications(app::ApplicationDesktop *app) -> bool;
+        // method hides or show widgets and sets bars according to provided state
+        void setVisibleState();
+        auto fillNotifications(app::ApplicationDesktop *app) -> bool;
 
-  public:
-	DesktopMainWindow( app::Application* app );
-	virtual ~DesktopMainWindow();
+      public:
+        DesktopMainWindow(app::Application *app);
+        virtual ~DesktopMainWindow();
 
-	//virtual methods gui::Window
-	bool onInput( const InputEvent& inputEvent ) override;
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-	//virtual methods gui::AppWindow
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-	bool updateTime( const UTF8& timeStr ) override;
-	bool updateTime( const uint32_t& timestamp, bool mode24H ) override;
-	std::list<DrawCommand*> buildDrawList() override;
+        // virtual methods gui::Window
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        // virtual methods gui::AppWindow
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        bool updateTime(const UTF8 &timeStr) override;
+        bool updateTime(const uint32_t &timestamp, bool mode24H) override;
+        std::list<DrawCommand *> buildDrawList() override;
 
-  private:
-    gui::KeyInputMappedTranslation translator;
-};
+      private:
+        gui::KeyInputMappedTranslation translator;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-desktop/windows/MenuWindow.cpp b/module-apps/application-desktop/windows/MenuWindow.cpp
index debc2fc87..cbaea8809 100644
--- a/module-apps/application-desktop/windows/MenuWindow.cpp
+++ b/module-apps/application-desktop/windows/MenuWindow.cpp
@@ -13,12 +13,12 @@ namespace style::design
 {
     // all these might not be final - as designs for these didn't look like that
 
-    inline const auto tile_w = 130;
-    inline const auto tile_h = 130;
-    inline const auto tile_margin = 24;
-    inline const auto tile_text_y = 50;
+    inline const auto tile_w       = 130;
+    inline const auto tile_h       = 130;
+    inline const auto tile_margin  = 24;
+    inline const auto tile_text_y  = 50;
     inline const auto notify_dot_x = 80;
-    inline const auto grid_offset = 20;
+    inline const auto grid_offset  = 20;
 }; // namespace style::design
 
 namespace gui
@@ -36,14 +36,15 @@ namespace gui
         center(it, img, Axis::X);
         it->addWidget(img);
 
-        auto *desc = new gui::Label(it, 0, it->area().h - style::design::tile_text_y, it->area().w, style::design::tile_text_y);
+        auto *desc =
+            new gui::Label(it, 0, it->area().h - style::design::tile_text_y, it->area().w, style::design::tile_text_y);
         desc->setPenWidth(style::window::default_border_no_focus_w);
         desc->setFont(style::window::font::verysmall);
-        desc->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        desc->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
         desc->setText(utils::localize.get(title));
 
-        if (notifications > 0)
-        {
+        if (notifications > 0) {
             auto thumbnail = new gui::Image("dot_12px_soft");
             thumbnail->setPosition(it->area().x + style::design::notify_dot_x, this->area().y);
             it->addWidget(thumbnail);
@@ -58,24 +59,20 @@ namespace gui
 
     MenuPage::MenuPage(gui::Item *parent, UTF8 title, std::vector<Tile *> tiles) : title(title)
     {
-        if (parent)
-        {
+        if (parent) {
             parent->addWidget(this);
         }
         grid.x = style::design::tile_w;
         grid.y = style::design::tile_h;
-        for (auto &tile : tiles)
-        {
+        for (auto &tile : tiles) {
             addWidget(tile);
         }
     }
 
     void MenuPage::setFirstTimeSelection()
     {
-        if (visible && first_time_selection)
-        {
-            if (children.size() > first_time_selected)
-            {
+        if (visible && first_time_selection) {
+            if (children.size() > first_time_selected) {
                 setFocusItem(*std::next(children.begin(), first_time_selected));
                 first_time_selection = false;
             }
@@ -108,72 +105,83 @@ namespace gui
         auto app = dynamic_cast<app::ApplicationDesktop *>(application);
         assert(app);
 
-        mainMenu = new MenuPage(this, utils::localize.get("app_desktop_menu_title"),
-                                {
+        mainMenu = new MenuPage(
+            this,
+            utils::localize.get("app_desktop_menu_title"),
+            {
 
-                                    new gui::Tile{
-                                        "menu_tools",
-                                        "app_desktop_menu_tools",
-                                        [=](gui::Item &item) {
-                                            {
-                                                switchMenu(toolsMenu);
-                                                return true;
-                                            }
-                                        },
-                                    },
-                                    new gui::Tile("menu_alarm", "app_desktop_menu_alarm", [=](gui::Item &item) { return true; }),
-                                    new gui::Tile("menu_calendar", "app_desktop_menu_calendar", [=](gui::Item &item) { return true; }),
-                                    new gui::Tile{"menu_phone", "app_desktop_menu_phone",
-                                                  [=](gui::Item &item) {
-                                                      LOG_INFO("Call Log");
-                                                      sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationCallLog",
-                                                                                                         gui::name::window::main_window, nullptr);
-                                                      return true;
-                                                  },
-                                                  app->notifications.notSeenCalls},
-                                    new gui::Tile("menu_contacts", "app_desktop_menu_contacts",
-                                                  [=](gui::Item &item) {
-                                                      LOG_INFO("Phonebook");
-                                                      sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationPhonebook",
-                                                                                                         gui::name::window::main_window, nullptr);
-                                                      return true;
-                                                  }),
+                new gui::Tile{
+                    "menu_tools",
+                    "app_desktop_menu_tools",
+                    [=](gui::Item &item) {
+                        {
+                            switchMenu(toolsMenu);
+                            return true;
+                        }
+                    },
+                },
+                new gui::Tile("menu_alarm", "app_desktop_menu_alarm", [=](gui::Item &item) { return true; }),
+                new gui::Tile("menu_calendar", "app_desktop_menu_calendar", [=](gui::Item &item) { return true; }),
+                new gui::Tile{"menu_phone",
+                              "app_desktop_menu_phone",
+                              [=](gui::Item &item) {
+                                  LOG_INFO("Call Log");
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationCallLog", gui::name::window::main_window, nullptr);
+                                  return true;
+                              },
+                              app->notifications.notSeenCalls},
+                new gui::Tile("menu_contacts",
+                              "app_desktop_menu_contacts",
+                              [=](gui::Item &item) {
+                                  LOG_INFO("Phonebook");
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationPhonebook", gui::name::window::main_window, nullptr);
+                                  return true;
+                              }),
 
-                                    new gui::Tile{"menu_messages", "app_desktop_menu_messages",
-                                                  [=](gui::Item &item) {
-                                                      LOG_INFO("Messages");
-                                                      sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationMessages",
-                                                                                                         gui::name::window::main_window, nullptr);
-                                                      return true;
-                                                  },
-                                                  app->notifications.notSeenSMS},
-                                    new gui::Tile{"menu_music_player", "app_desktop_menu_music", [=](gui::Item &item) { return true; }},
-                                    new gui::Tile{"menu_meditation", "app_desktop_menu_meditation", [=](gui::Item &item) { return true; }},
-                                    new gui::Tile{"menu_settings", "app_desktop_menu_settings",
-                                                  [=](gui::Item &item) {
-                                                      LOG_INFO("page 1 settings");
-                                                      sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationSettings",
-                                                                                                         gui::name::window::main_window, nullptr);
-                                                      return true;
-                                                  }},
-                                });
+                new gui::Tile{"menu_messages",
+                              "app_desktop_menu_messages",
+                              [=](gui::Item &item) {
+                                  LOG_INFO("Messages");
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationMessages", gui::name::window::main_window, nullptr);
+                                  return true;
+                              },
+                              app->notifications.notSeenSMS},
+                new gui::Tile{"menu_music_player", "app_desktop_menu_music", [=](gui::Item &item) { return true; }},
+                new gui::Tile{"menu_meditation", "app_desktop_menu_meditation", [=](gui::Item &item) { return true; }},
+                new gui::Tile{"menu_settings",
+                              "app_desktop_menu_settings",
+                              [=](gui::Item &item) {
+                                  LOG_INFO("page 1 settings");
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationSettings", gui::name::window::main_window, nullptr);
+                                  return true;
+                              }},
+            });
 
-        toolsMenu = new MenuPage(this, utils::localize.get("app_desktop_tools_title"),
-                                 {
-                                     new gui::Tile{"menu_tools_notes", "app_desktop_tools_notes",
-                                                   [=](gui::Item &item) {
-                                                       sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationNotes",
-                                                                                                          gui::name::window::main_window, nullptr);
-                                                       return true;
-                                                   }},
-                                     new gui::Tile{"menu_tools_calculator", "app_desktop_tools_calculator", [=](gui::Item &item) { return true; }},
-                                     new gui::Tile{"menu_tools_recorder", "app_desktop_tools_antenna",
-                                                   [=](gui::Item &item) {
-                                                       sapm::ApplicationManager::messageSwitchApplication(application, "ApplicationAntenna",
-                                                                                                          gui::name::window::main_window, nullptr);
-                                                       return true;
-                                                   }},
-                                 });
+        toolsMenu = new MenuPage(
+            this,
+            utils::localize.get("app_desktop_tools_title"),
+            {
+                new gui::Tile{"menu_tools_notes",
+                              "app_desktop_tools_notes",
+                              [=](gui::Item &item) {
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationNotes", gui::name::window::main_window, nullptr);
+                                  return true;
+                              }},
+                new gui::Tile{
+                    "menu_tools_calculator", "app_desktop_tools_calculator", [=](gui::Item &item) { return true; }},
+                new gui::Tile{"menu_tools_recorder",
+                              "app_desktop_tools_antenna",
+                              [=](gui::Item &item) {
+                                  sapm::ApplicationManager::messageSwitchApplication(
+                                      application, "ApplicationAntenna", gui::name::window::main_window, nullptr);
+                                  return true;
+                              }},
+            });
 
         using namespace style::window;
         mainMenu->setSize(this->area().w - default_left_margin - default_right_margin,
@@ -202,13 +210,12 @@ namespace gui
     }
 
     void MenuWindow::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
     bool MenuWindow::onInput(const InputEvent &inputEvent)
     {
-        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_RF) && (toolsMenu->visible))
-        {
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_RF) &&
+            (toolsMenu->visible)) {
             switchMenu(mainMenu);
             return true;
         }
@@ -217,12 +224,10 @@ namespace gui
 
     void MenuWindow::switchMenu(MenuPage *page)
     {
-        if (toolsMenu != page)
-        {
+        if (toolsMenu != page) {
             toolsMenu->setVisible(false);
         }
-        if (mainMenu != page)
-        {
+        if (mainMenu != page) {
             mainMenu->setVisible(false);
         }
 
diff --git a/module-apps/application-desktop/windows/MenuWindow.hpp b/module-apps/application-desktop/windows/MenuWindow.hpp
index d3e6c0d67..9d00a7c8c 100644
--- a/module-apps/application-desktop/windows/MenuWindow.hpp
+++ b/module-apps/application-desktop/windows/MenuWindow.hpp
@@ -16,7 +16,10 @@ namespace gui
     /// icon, description, name of application to run
     struct Tile : public Rect
     {
-        Tile(UTF8 icon, std::string title, std::function<bool(Item &)> activatedCallback, unsigned int notifications = 0);
+        Tile(UTF8 icon,
+             std::string title,
+             std::function<bool(Item &)> activatedCallback,
+             unsigned int notifications = 0);
     };
 
     class MenuPage : public gui::GridLayout
@@ -35,7 +38,7 @@ namespace gui
     {
       protected:
         // page that is currently selected by the user.
-        MenuPage *mainMenu = nullptr;
+        MenuPage *mainMenu  = nullptr;
         MenuPage *toolsMenu = nullptr;
 
       public:
diff --git a/module-apps/application-desktop/windows/PinLockWindow.cpp b/module-apps/application-desktop/windows/PinLockWindow.cpp
index e2772e871..3309648fb 100644
--- a/module-apps/application-desktop/windows/PinLockWindow.cpp
+++ b/module-apps/application-desktop/windows/PinLockWindow.cpp
@@ -6,14 +6,14 @@
  * @copyright Copyright (C) 2019 mudita.com
  * @details
  */
-//application manager
+// application manager
 #include "service-appmgr/ApplicationManager.hpp"
 
-//module-gui
+// module-gui
 #include "gui/widgets/BottomBar.hpp"
 #include "gui/widgets/TopBar.hpp"
 
-//module-utils
+// module-utils
 #include "i18/i18.hpp"
 
 #include "PinLockWindow.hpp"
@@ -22,257 +22,269 @@
 #include "../data/LockPhoneData.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-PinLockWindow::PinLockWindow( app::Application* app ) : AppWindow(app, "PinLockWindow"){
-	buildInterface();
-}
+    PinLockWindow::PinLockWindow(app::Application *app) : AppWindow(app, "PinLockWindow")
+    {
+        buildInterface();
+    }
 
-void PinLockWindow::rebuild() {
-	//find which widget has focus
-	destroyInterface();
-	buildInterface();
-	//set state
-	focusItem = nullptr;
-	setVisibleState( state );
-}
-void PinLockWindow::buildInterface() {
-	AppWindow::buildInterface();
-	bottomBar->setActive( BottomBar::Side::LEFT, true );
-	bottomBar->setActive( BottomBar::Side::CENTER, false );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
-	bottomBar->setText( BottomBar::Side::LEFT, utils::localize.get("app_desktop_emergency"));
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_confirm"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+    void PinLockWindow::rebuild()
+    {
+        // find which widget has focus
+        destroyInterface();
+        buildInterface();
+        // set state
+        focusItem = nullptr;
+        setVisibleState(state);
+    }
+    void PinLockWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        bottomBar->setActive(BottomBar::Side::LEFT, true);
+        bottomBar->setActive(BottomBar::Side::CENTER, false);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_desktop_emergency"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_confirm"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	topBar->setActive(TopBar::Elements::SIGNAL, true  );
-	topBar->setActive(TopBar::Elements::BATTERY, true  );
-	topBar->setActive(TopBar::Elements::LOCK, true  );
+        topBar->setActive(TopBar::Elements::SIGNAL, true);
+        topBar->setActive(TopBar::Elements::BATTERY, true);
+        topBar->setActive(TopBar::Elements::LOCK, true);
 
-	lockImage = new gui::Image( this, 177,132,0,0, "pin_lock" );
-	infoImage = new gui::Image( this, 177,132,0,0, "pin_lock_info" );
-	infoImage->setVisible(false);
+        lockImage = new gui::Image(this, 177, 132, 0, 0, "pin_lock");
+        infoImage = new gui::Image(this, 177, 132, 0, 0, "pin_lock_info");
+        infoImage->setVisible(false);
 
-	//title label
-	titleLabel = new gui::Label(this, 0, 60, 480, 40);
-	titleLabel->setFilled( false );
-	titleLabel->setVisible(false);
-	titleLabel->setBorderColor( gui::ColorFullBlack );
-	titleLabel->setFont(style::header::font::title);
-	titleLabel->setText(utils::localize.get("app_desktop_pin_info1"));
-	titleLabel->setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES );
-	titleLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        // title label
+        titleLabel = new gui::Label(this, 0, 60, 480, 40);
+        titleLabel->setFilled(false);
+        titleLabel->setVisible(false);
+        titleLabel->setBorderColor(gui::ColorFullBlack);
+        titleLabel->setFont(style::header::font::title);
+        titleLabel->setText(utils::localize.get("app_desktop_pin_info1"));
+        titleLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        titleLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
 
-	//labels with stars for displaying entered digits
-	uint32_t pinLabelX = 82;
-	for( uint32_t i=0; i<4; i++ ){
-		gui::Label* label = new gui::Label(this, pinLabelX, 442-100, 63, 100);
-		label->setFilled( false );
-		label->setBorderColor( gui::ColorFullBlack );
-		label->setPenWidth(2);
-		label->setFont(style::window::font::verybig);
-		label->setText("*");
-		label->setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM );
-		label->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-		pinLabels.push_back( label );
-		pinLabelX += 84;
-	}
+        // labels with stars for displaying entered digits
+        uint32_t pinLabelX = 82;
+        for (uint32_t i = 0; i < 4; i++) {
+            gui::Label *label = new gui::Label(this, pinLabelX, 442 - 100, 63, 100);
+            label->setFilled(false);
+            label->setBorderColor(gui::ColorFullBlack);
+            label->setPenWidth(2);
+            label->setFont(style::window::font::verybig);
+            label->setText("*");
+            label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+            pinLabels.push_back(label);
+            pinLabelX += 84;
+        }
 
-	//labels with stars for displaying entered digits
-	uint32_t infoLabelY = 316-22;
-	for( uint32_t i=0; i<2; i++ ){
-		gui::Label* label = new gui::Label(this, 0, infoLabelY, 480, 30);
-		label->setFilled( false );
-		label->setBorderColor( gui::ColorNoColor );
-		label->setFont(style::window::font::medium);
-		label->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-		infoLabels.push_back( label );
-		infoLabelY += 40;
-	}
+        // labels with stars for displaying entered digits
+        uint32_t infoLabelY = 316 - 22;
+        for (uint32_t i = 0; i < 2; i++) {
+            gui::Label *label = new gui::Label(this, 0, infoLabelY, 480, 30);
+            label->setFilled(false);
+            label->setBorderColor(gui::ColorNoColor);
+            label->setFont(style::window::font::medium);
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+            infoLabels.push_back(label);
+            infoLabelY += 40;
+        }
 
-	infoLabels[0]->setText( utils::localize.get("app_desktop_pin_lock") );
-	infoLabels[1]->setText( utils::localize.get("app_desktop_pin_info2") );
-}
-void PinLockWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	delete titleLabel;
-	for( uint32_t i=0; i<infoLabels.size(); i++ )
-		delete infoLabels[i];
-	infoLabels.clear();
-	for( uint32_t i=0; i<pinLabels.size(); i++ )
-		delete pinLabels[i];
-	pinLabels.clear();
-	delete lockImage;
-	delete infoImage;
-	focusItem = nullptr;
-	children.clear();
-}
+        infoLabels[0]->setText(utils::localize.get("app_desktop_pin_lock"));
+        infoLabels[1]->setText(utils::localize.get("app_desktop_pin_info2"));
+    }
+    void PinLockWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        delete titleLabel;
+        for (uint32_t i = 0; i < infoLabels.size(); i++)
+            delete infoLabels[i];
+        infoLabels.clear();
+        for (uint32_t i = 0; i < pinLabels.size(); i++)
+            delete pinLabels[i];
+        pinLabels.clear();
+        delete lockImage;
+        delete infoImage;
+        focusItem = nullptr;
+        children.clear();
+    }
 
-PinLockWindow::~PinLockWindow() {
-	destroyInterface();
-}
+    PinLockWindow::~PinLockWindow()
+    {
+        destroyInterface();
+    }
 
-void PinLockWindow::setVisibleState( const State& state ) {
+    void PinLockWindow::setVisibleState(const State &state)
+    {
 
-	this->state = state;
-	//show pin labels for entering pin and erase their's content
-	if( state == State::EnteringPin ) {
-		charCount = 0;
-		for( uint32_t i=0; i<4; i++ ) {
-			pinLabels[i]->setVisible(true);
-			pinLabels[i]->setText("");
-		}
-		//hide second info label
-		infoLabels[0]->setVisible(true);
-		infoLabels[1]->setVisible(false);
-		infoLabels[0]->setText(utils::localize.get("app_desktop_pin_lock"));
-		infoLabels[1]->setText("");
-
-		//show pin icon
-		lockImage->setVisible(true);
-		infoImage->setVisible(false);
-
-	}
-	else if( state == State::WrongPinInfo ) {
-		for( uint32_t i=0; i<4; i++ ) {
-			pinLabels[i]->setVisible(false);
-			pinLabels[i]->setText("");
-		}
-		//hide second info label
-		titleLabel->setVisible(true);
-		infoLabels[0]->setVisible(true);
-		infoLabels[1]->setVisible(true);
-		titleLabel->setText(utils::localize.get("app_desktop_pin_info1"));
-		infoLabels[0]->setText(utils::localize.get("app_desktop_pin_info2"));
-		infoLabels[1]->setText(std::to_string(remainingAttempts));
-
-		//show pin icon
-		lockImage->setVisible(false);
-		infoImage->setVisible(true);
-	}
-	else if( state == State::PhoneBlocked ) {
-		for( uint32_t i=0; i<4; i++ ) {
-			pinLabels[i]->setVisible(false);
-			pinLabels[i]->setText("");
-		}
-		//hide second info label
-		titleLabel->setVisible(false);
-		infoLabels[0]->setVisible(true);
-		infoLabels[1]->setVisible(false);
-		infoLabels[0]->setText(utils::localize.get("app_desktop_pin_blocked1"));
-		infoLabels[1]->setText("");
-
-		//show pin icon
-		lockImage->setVisible(false);
-		infoImage->setVisible(true);
-	}
-}
-
-void PinLockWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-
-	//check if there was a signal to lock the phone due to inactivity.
-	if( (data != nullptr) && (data->getDescription() == "LockPhoneData")) {
-		LockPhoneData* lockData = reinterpret_cast<LockPhoneData*>( data );
-		lockTimeoutApplilcation = lockData->getPreviousApplication();
-	}
-	//set state
-	setVisibleState( state );
-}
-
-bool PinLockWindow::onInput( const InputEvent& inputEvent ) {
-	if( inputEvent.state == gui::InputEvent::State::keyReleasedShort ) {
-		//accept only LF, enter, RF, #, and numeric values
-		if( state == State::EnteringPin ) {
-			if( inputEvent.keyCode == KeyCode::KEY_LF ) {
-				return true;
-			}
-			else if( inputEvent.keyCode == KeyCode::KEY_RF ) {
-                application->switchWindow(gui::name::window::main_window);
-                return true;
+        this->state = state;
+        // show pin labels for entering pin and erase their's content
+        if (state == State::EnteringPin) {
+            charCount = 0;
+            for (uint32_t i = 0; i < 4; i++) {
+                pinLabels[i]->setVisible(true);
+                pinLabels[i]->setText("");
             }
-			else if( inputEvent.keyCode == KeyCode::KEY_PND ) {
-				if( charCount > 0 ) {
-					pinLabels[charCount-1]->setText("");
-					charCount--;
-					bottomBar->setActive( BottomBar::Side::CENTER, false );
-					application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-				}
-				return true;
-			}
-			else if( inputEvent.keyCode == KeyCode::KEY_ENTER ) {
-				if( (state == State::EnteringPin) && (charCount == 4)) {
+            // hide second info label
+            infoLabels[0]->setVisible(true);
+            infoLabels[1]->setVisible(false);
+            infoLabels[0]->setText(utils::localize.get("app_desktop_pin_lock"));
+            infoLabels[1]->setText("");
 
-					//TODO make pin checking here, currently it always fails
-					if( application->getSettings().lockPassHash == (1000*charValue[0]+100*charValue[1]+10*charValue[2]+charValue[3] ) ) {
-						remainingAttempts = maxPasswordAttempts;
-						app::ApplicationDesktop* app = reinterpret_cast<app::ApplicationDesktop*>( application );
-						app->setScreenLocked(false);
+            // show pin icon
+            lockImage->setVisible(true);
+            infoImage->setVisible(false);
+        }
+        else if (state == State::WrongPinInfo) {
+            for (uint32_t i = 0; i < 4; i++) {
+                pinLabels[i]->setVisible(false);
+                pinLabels[i]->setText("");
+            }
+            // hide second info label
+            titleLabel->setVisible(true);
+            infoLabels[0]->setVisible(true);
+            infoLabels[1]->setVisible(true);
+            titleLabel->setText(utils::localize.get("app_desktop_pin_info1"));
+            infoLabels[0]->setText(utils::localize.get("app_desktop_pin_info2"));
+            infoLabels[1]->setText(std::to_string(remainingAttempts));
 
-						//if there is no application to return to simply return to main window
-						if( lockTimeoutApplilcation.empty()) {
-                            application->switchWindow(gui::name::window::main_window);
+            // show pin icon
+            lockImage->setVisible(false);
+            infoImage->setVisible(true);
+        }
+        else if (state == State::PhoneBlocked) {
+            for (uint32_t i = 0; i < 4; i++) {
+                pinLabels[i]->setVisible(false);
+                pinLabels[i]->setText("");
+            }
+            // hide second info label
+            titleLabel->setVisible(false);
+            infoLabels[0]->setVisible(true);
+            infoLabels[1]->setVisible(false);
+            infoLabels[0]->setText(utils::localize.get("app_desktop_pin_blocked1"));
+            infoLabels[1]->setText("");
+
+            // show pin icon
+            lockImage->setVisible(false);
+            infoImage->setVisible(true);
+        }
+    }
+
+    void PinLockWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+
+        // check if there was a signal to lock the phone due to inactivity.
+        if ((data != nullptr) && (data->getDescription() == "LockPhoneData")) {
+            LockPhoneData *lockData = reinterpret_cast<LockPhoneData *>(data);
+            lockTimeoutApplilcation = lockData->getPreviousApplication();
+        }
+        // set state
+        setVisibleState(state);
+    }
+
+    bool PinLockWindow::onInput(const InputEvent &inputEvent)
+    {
+        if (inputEvent.state == gui::InputEvent::State::keyReleasedShort) {
+            // accept only LF, enter, RF, #, and numeric values
+            if (state == State::EnteringPin) {
+                if (inputEvent.keyCode == KeyCode::KEY_LF) {
+                    return true;
+                }
+                else if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                    application->switchWindow(gui::name::window::main_window);
+                    return true;
+                }
+                else if (inputEvent.keyCode == KeyCode::KEY_PND) {
+                    if (charCount > 0) {
+                        pinLabels[charCount - 1]->setText("");
+                        charCount--;
+                        bottomBar->setActive(BottomBar::Side::CENTER, false);
+                        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                    }
+                    return true;
+                }
+                else if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+                    if ((state == State::EnteringPin) && (charCount == 4)) {
+
+                        // TODO make pin checking here, currently it always fails
+                        if (application->getSettings().lockPassHash ==
+                            (1000 * charValue[0] + 100 * charValue[1] + 10 * charValue[2] + charValue[3])) {
+                            remainingAttempts            = maxPasswordAttempts;
+                            app::ApplicationDesktop *app = reinterpret_cast<app::ApplicationDesktop *>(application);
+                            app->setScreenLocked(false);
+
+                            // if there is no application to return to simply return to main window
+                            if (lockTimeoutApplilcation.empty()) {
+                                application->switchWindow(gui::name::window::main_window);
+                            }
+                            else {
+                                lockTimeoutApplilcation = "";
+                                sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+                            }
+                            return true;
+                        }
+
+                        if (remainingAttempts == 1) {
+                            state = State::PhoneBlocked;
+                            bottomBar->setActive(BottomBar::Side::CENTER, false);
+                            setVisibleState(State::PhoneBlocked);
                         }
                         else {
-							lockTimeoutApplilcation = "";
-							sapm::ApplicationManager::messageSwitchPreviousApplication( application );
-						}
-						return true;
-					}
+                            remainingAttempts--;
+                            setVisibleState(State::WrongPinInfo);
+                        }
+                        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                    }
+                    else if (state == State::WrongPinInfo) {
+                        setVisibleState(State::EnteringPin);
+                        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                    }
+                    return true;
+                }
+                else if (0 <= gui::toNumeric(inputEvent.keyCode) && gui::toNumeric(inputEvent.keyCode) <= 9) {
+                    // fill next field with star and store value in array
+                    if (charCount < 4) {
+                        pinLabels[charCount]->setText("*");
+                        charValue[charCount] = gui::toNumeric(inputEvent.keyCode);
+                        charCount++;
 
-					if( remainingAttempts == 1 ) {
-						state = State::PhoneBlocked;
-						bottomBar->setActive( BottomBar::Side::CENTER, false );
-						setVisibleState( State::PhoneBlocked );
-					}
-					else {
-						remainingAttempts--;
-						setVisibleState( State::WrongPinInfo );
-					}
-					application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-				}
-				else if( state == State::WrongPinInfo ) {
-					setVisibleState( State::EnteringPin );
-					application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-				}
-				return true;
-			}
-			else if( 0 <= gui::toNumeric(inputEvent.keyCode) && gui::toNumeric(inputEvent.keyCode) <= 9) {
-				//fill next field with star and store value in array
-				if( charCount < 4 ) {
-					pinLabels[charCount]->setText("*");
-					charValue[charCount] = gui::toNumeric(inputEvent.keyCode);
-					charCount++;
-
-					//if 4 char has been entered show bottom bar confirm
-					if( charCount == 4 ) {
-						bottomBar->setActive( BottomBar::Side::CENTER, true );
-					}
-					application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-				}
-				return true;
-			}
-		}
-		else if( state == State::WrongPinInfo ) {
-			if( inputEvent.keyCode == KeyCode::KEY_ENTER ) {
-				state = State::EnteringPin;
-				setVisibleState( State::EnteringPin );
-				application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-			}
-			else if( inputEvent.keyCode == KeyCode::KEY_RF ) {
-				state = State::EnteringPin;
-                application->switchWindow(gui::name::window::main_window);
+                        // if 4 char has been entered show bottom bar confirm
+                        if (charCount == 4) {
+                            bottomBar->setActive(BottomBar::Side::CENTER, true);
+                        }
+                        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                    }
+                    return true;
+                }
+            }
+            else if (state == State::WrongPinInfo) {
+                if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+                    state = State::EnteringPin;
+                    setVisibleState(State::EnteringPin);
+                    application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                }
+                else if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                    state = State::EnteringPin;
+                    application->switchWindow(gui::name::window::main_window);
+                }
+            }
+            else if (state == State::PhoneBlocked) {
+                if (inputEvent.keyCode == KeyCode::KEY_RF) {
+                    application->switchWindow(gui::name::window::main_window);
+                    return true;
+                }
             }
         }
-		else if( state == State::PhoneBlocked) {
-			if( inputEvent.keyCode == KeyCode::KEY_RF ) {
-                application->switchWindow(gui::name::window::main_window);
-                return true;
-            }
-		}
-	}
 
-	//check if any of the lower inheritance onInput methods catch the event
-	return AppWindow::onInput( inputEvent );
-}
+        // check if any of the lower inheritance onInput methods catch the event
+        return AppWindow::onInput(inputEvent);
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-desktop/windows/PinLockWindow.hpp b/module-apps/application-desktop/windows/PinLockWindow.hpp
index 85c3effcf..74aa5bb69 100644
--- a/module-apps/application-desktop/windows/PinLockWindow.hpp
+++ b/module-apps/application-desktop/windows/PinLockWindow.hpp
@@ -15,43 +15,47 @@
 #include "gui/widgets/BottomBar.hpp"
 #include "gui/widgets/TopBar.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class PinLockWindow: public AppWindow {
-	const uint32_t maxPasswordAttempts = 4;
-	enum class State {
-		EnteringPin,
-		WrongPinInfo,
-		PhoneBlocked
-	};
+    class PinLockWindow : public AppWindow
+    {
+        const uint32_t maxPasswordAttempts = 4;
+        enum class State
+        {
+            EnteringPin,
+            WrongPinInfo,
+            PhoneBlocked
+        };
 
-	gui::Label* titleLabel = nullptr;
-	std::vector<gui::Label*> infoLabels;
-	std::vector<gui::Label*> pinLabels;
-	gui::Image* lockImage = nullptr;
-	gui::Image* infoImage = nullptr;
-	uint32_t remainingAttempts = maxPasswordAttempts;
-	//code of the entered character on specified position
-	uint32_t charValue[4] = {0};
-	//flag defines number of entered characters
-	uint32_t charCount = 0;
-	//state of the window
-	State state = State::EnteringPin;
+        gui::Label *titleLabel = nullptr;
+        std::vector<gui::Label *> infoLabels;
+        std::vector<gui::Label *> pinLabels;
+        gui::Image *lockImage      = nullptr;
+        gui::Image *infoImage      = nullptr;
+        uint32_t remainingAttempts = maxPasswordAttempts;
+        // code of the entered character on specified position
+        uint32_t charValue[4] = {0};
+        // flag defines number of entered characters
+        uint32_t charCount = 0;
+        // state of the window
+        State state = State::EnteringPin;
 
-	std::string lockTimeoutApplilcation = "";
+        std::string lockTimeoutApplilcation = "";
 
-	//method hides or show widgets and sets bars according to provided state
-	void setVisibleState( const State& state );
-public:
-	PinLockWindow( app::Application* app );
-	virtual ~PinLockWindow();
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-	bool onInput( const InputEvent& inputEvent ) override;
+        // method hides or show widgets and sets bars according to provided state
+        void setVisibleState(const State &state);
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+      public:
+        PinLockWindow(app::Application *app);
+        virtual ~PinLockWindow();
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool onInput(const InputEvent &inputEvent) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-desktop/windows/PowerOffWindow.cpp b/module-apps/application-desktop/windows/PowerOffWindow.cpp
index 4d87c815a..b61d66f65 100644
--- a/module-apps/application-desktop/windows/PowerOffWindow.cpp
+++ b/module-apps/application-desktop/windows/PowerOffWindow.cpp
@@ -10,206 +10,239 @@
 #include "gui/widgets/BottomBar.hpp"
 #include "gui/widgets/TopBar.hpp"
 
-//module-utils
+// module-utils
 #include "i18/i18.hpp"
 
 #include "PowerOffWindow.hpp"
 #include "../ApplicationDesktop.hpp"
 
-//services
+// services
 #include "service-appmgr/ApplicationManager.hpp"
 
 #include "service-cellular/ServiceCellular.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-PowerOffWindow::PowerOffWindow( app::Application* app ) : AppWindow(app, "PowerOffWindow"){
-	buildInterface();
-}
+    PowerOffWindow::PowerOffWindow(app::Application *app) : AppWindow(app, "PowerOffWindow")
+    {
+        buildInterface();
+    }
 
-void PowerOffWindow::rebuild() {
-	//find which widget has focus
-	uint32_t index = 0;
-	for( uint32_t i=0; i<selectionLabels.size(); i++ )
-		if( selectionLabels[i] == getFocusItem()) {
-			index = i;
-			break;
-		}
+    void PowerOffWindow::rebuild()
+    {
+        // find which widget has focus
+        uint32_t index = 0;
+        for (uint32_t i = 0; i < selectionLabels.size(); i++)
+            if (selectionLabels[i] == getFocusItem()) {
+                index = i;
+                break;
+            }
 
-	destroyInterface();
-	buildInterface();
-	setFocusItem( selectionLabels[index] );
-}
-void PowerOffWindow::buildInterface() {
-	AppWindow::buildInterface();
-	bottomBar->setActive( BottomBar::Side::CENTER, true );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_confirm"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+        destroyInterface();
+        buildInterface();
+        setFocusItem(selectionLabels[index]);
+    }
+    void PowerOffWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_confirm"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	powerImage = new gui::Image( this, 177,132,0,0, "pin_lock_info" );
-	powerDownImage = new gui::Image( this, 0,0 ,0,0, "logo" );
-	powerDownImage->setVisible(false);
+        powerImage     = new gui::Image(this, 177, 132, 0, 0, "pin_lock_info");
+        powerDownImage = new gui::Image(this, 0, 0, 0, 0, "logo");
+        powerDownImage->setVisible(false);
 
-	//title label
-	titleLabel = new gui::Label(this, 0, 60, 480, 40);
-	titleLabel->setFilled( false );
-	titleLabel->setBorderColor( gui::ColorFullBlack );
-	titleLabel->setFont(style::header::font::title);
-	titleLabel->setText(utils::localize.get("app_desktop_poweroff_title"));
-	titleLabel->setEdges( RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES );
-	titleLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        // title label
+        titleLabel = new gui::Label(this, 0, 60, 480, 40);
+        titleLabel->setFilled(false);
+        titleLabel->setBorderColor(gui::ColorFullBlack);
+        titleLabel->setFont(style::header::font::title);
+        titleLabel->setText(utils::localize.get("app_desktop_poweroff_title"));
+        titleLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        titleLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
 
-	//label with question for powering down
-	infoLabel = new gui::Label(this, 0, 294, 480, 30);
-	infoLabel->setFilled( false );
-	infoLabel->setBorderColor( gui::ColorNoColor );
-	infoLabel->setFont(style::window::font::medium);
-	infoLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-	infoLabel->setText( utils::localize.get("app_desktop_poweroff_question") );
+        // label with question for powering down
+        infoLabel = new gui::Label(this, 0, 294, 480, 30);
+        infoLabel->setFilled(false);
+        infoLabel->setBorderColor(gui::ColorNoColor);
+        infoLabel->setFont(style::window::font::medium);
+        infoLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        infoLabel->setText(utils::localize.get("app_desktop_poweroff_question"));
 
-	uint32_t pinLabelX = 46;
-	//TODO change this to 397 after power manager is finished
-	uint32_t pinLabelY = 350;
-	for( uint32_t i=0; i<4; i++ ){
-		gui::Label* label = new gui::Label(this, pinLabelX, pinLabelY, 193, 75);
-		label->setFilled( false );
-		label->setBorderColor( gui::ColorFullBlack );
-		label->setPenWidth(0);
-		label->setPenFocusWidth(2);
-		label->setRadius(5);
-		label->setFont(style::window::font::medium);
-		label->setEdges( RectangleEdgeFlags::GUI_RECT_ALL_EDGES );
-		label->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-		selectionLabels.push_back( label );
-		pinLabelX += 193;
-	}
-
-	selectionLabels[0]->setText( utils::localize.get("common_no") );
-	selectionLabels[1]->setText( utils::localize.get("common_yes") );
-
-	pinLabelX = 46;
-	pinLabelY += 75;
-	eventMgrLabel = new gui::Label(this, pinLabelX, pinLabelY, 193*2, 75);
-	eventMgrLabel->setFilled( false );
-	eventMgrLabel->setBorderColor( gui::ColorFullBlack );
-	eventMgrLabel->setPenWidth(0);
-	eventMgrLabel->setPenFocusWidth(2);
-	eventMgrLabel->setRadius(5);
-	eventMgrLabel->setFont(style::window::font::bigbold);
-	eventMgrLabel->setText( "TURN PWR MGR OFF" );
-	eventMgrLabel->setEdges( RectangleEdgeFlags::GUI_RECT_ALL_EDGES );
-	eventMgrLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-
-	//define navigation between labels
-	selectionLabels[0]->setNavigationItem( NavigationDirection::LEFT, selectionLabels[1] );
-	selectionLabels[0]->setNavigationItem( NavigationDirection::RIGHT, selectionLabels[1] );
-	selectionLabels[0]->setNavigationItem( NavigationDirection::DOWN, eventMgrLabel );
-
-	selectionLabels[1]->setNavigationItem( NavigationDirection::LEFT, selectionLabels[0] );
-	selectionLabels[1]->setNavigationItem( NavigationDirection::RIGHT, selectionLabels[0] );
-	selectionLabels[1]->setNavigationItem( NavigationDirection::DOWN, eventMgrLabel );
-
-	eventMgrLabel->setNavigationItem( NavigationDirection::UP, selectionLabels[0]);
-
-	//callbacks for getting focus
-	selectionLabels[0]->focusChangedCallback = [=] (gui::Item& item) {
-		if( item.focus )
-			this->state = State::Return;
-		return true; };
-
-	selectionLabels[1]->focusChangedCallback = [=] (gui::Item& item) {
-		if( item.focus )
-			this->state = State::PowerDown;
-		return true; };
-
-	selectionLabels[1]->activatedCallback = [=] (gui::Item& item) {
-		LOG_INFO("Closing system");
-		application->setShutdownFlag();
-
-		bottomBar->setVisible(false);
-		topBar->setVisible(false);
-		selectionLabels[0]->setVisible(false);
-		selectionLabels[1]->setVisible(false);
-		eventMgrLabel->setVisible(false);
-		powerImage->setVisible(false);
-		powerDownImage->setVisible(true);
-		titleLabel->setVisible(false);
-		infoLabel->setVisible(false);
-
-		application->refreshWindow( RefreshModes::GUI_REFRESH_DEEP );
-
-		return true; };
-
-	//TODO Mati pisze tutaj.
-	eventMgrLabel->activatedCallback = [=] (gui::Item& item) {
-        static bool state = false;
-        if(state == false){
-            //sys::SystemManager::DestroyService(ServiceCellular::serviceName,application);
-            sys::SystemManager::SuspendSystem(application);
-            LOG_INFO("SUSPEND SYSTEM");
-            state = true;
+        uint32_t pinLabelX = 46;
+        // TODO change this to 397 after power manager is finished
+        uint32_t pinLabelY = 350;
+        for (uint32_t i = 0; i < 4; i++) {
+            gui::Label *label = new gui::Label(this, pinLabelX, pinLabelY, 193, 75);
+            label->setFilled(false);
+            label->setBorderColor(gui::ColorFullBlack);
+            label->setPenWidth(0);
+            label->setPenFocusWidth(2);
+            label->setRadius(5);
+            label->setFont(style::window::font::medium);
+            label->setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+            selectionLabels.push_back(label);
+            pinLabelX += 193;
         }
-        else{
-            sys::SystemManager::ResumeSystem(application);
-            LOG_INFO("RESUME SYSTEM");
-            state = false;
+
+        selectionLabels[0]->setText(utils::localize.get("common_no"));
+        selectionLabels[1]->setText(utils::localize.get("common_yes"));
+
+        pinLabelX = 46;
+        pinLabelY += 75;
+        eventMgrLabel = new gui::Label(this, pinLabelX, pinLabelY, 193 * 2, 75);
+        eventMgrLabel->setFilled(false);
+        eventMgrLabel->setBorderColor(gui::ColorFullBlack);
+        eventMgrLabel->setPenWidth(0);
+        eventMgrLabel->setPenFocusWidth(2);
+        eventMgrLabel->setRadius(5);
+        eventMgrLabel->setFont(style::window::font::bigbold);
+        eventMgrLabel->setText("TURN PWR MGR OFF");
+        eventMgrLabel->setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
+        eventMgrLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+
+        // define navigation between labels
+        selectionLabels[0]->setNavigationItem(NavigationDirection::LEFT, selectionLabels[1]);
+        selectionLabels[0]->setNavigationItem(NavigationDirection::RIGHT, selectionLabels[1]);
+        selectionLabels[0]->setNavigationItem(NavigationDirection::DOWN, eventMgrLabel);
+
+        selectionLabels[1]->setNavigationItem(NavigationDirection::LEFT, selectionLabels[0]);
+        selectionLabels[1]->setNavigationItem(NavigationDirection::RIGHT, selectionLabels[0]);
+        selectionLabels[1]->setNavigationItem(NavigationDirection::DOWN, eventMgrLabel);
+
+        eventMgrLabel->setNavigationItem(NavigationDirection::UP, selectionLabels[0]);
+
+        // callbacks for getting focus
+        selectionLabels[0]->focusChangedCallback = [=](gui::Item &item) {
+            if (item.focus)
+                this->state = State::Return;
+            return true;
+        };
+
+        selectionLabels[1]->focusChangedCallback = [=](gui::Item &item) {
+            if (item.focus)
+                this->state = State::PowerDown;
+            return true;
+        };
+
+        selectionLabels[1]->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("Closing system");
+            application->setShutdownFlag();
+
+            bottomBar->setVisible(false);
+            topBar->setVisible(false);
+            selectionLabels[0]->setVisible(false);
+            selectionLabels[1]->setVisible(false);
+            eventMgrLabel->setVisible(false);
+            powerImage->setVisible(false);
+            powerDownImage->setVisible(true);
+            titleLabel->setVisible(false);
+            infoLabel->setVisible(false);
+
+            application->refreshWindow(RefreshModes::GUI_REFRESH_DEEP);
+
+            return true;
+        };
+
+        // TODO Mati pisze tutaj.
+        eventMgrLabel->activatedCallback = [=](gui::Item &item) {
+            static bool state = false;
+            if (state == false) {
+                // sys::SystemManager::DestroyService(ServiceCellular::serviceName,application);
+                sys::SystemManager::SuspendSystem(application);
+                LOG_INFO("SUSPEND SYSTEM");
+                state = true;
+            }
+            else {
+                sys::SystemManager::ResumeSystem(application);
+                LOG_INFO("RESUME SYSTEM");
+                state = false;
+            }
+            return true;
+        };
+    }
+    void PowerOffWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        if (titleLabel) {
+            removeWidget(titleLabel);
+            delete titleLabel;
+            titleLabel = nullptr;
+        };
+        if (infoLabel) {
+            removeWidget(infoLabel);
+            delete infoLabel;
+            infoLabel = nullptr;
+        };
+
+        for (uint32_t i = 0; i < selectionLabels.size(); i++) {
+            if (selectionLabels[i]) {
+                removeWidget(selectionLabels[i]);
+                delete selectionLabels[i];
+                selectionLabels[i] = nullptr;
+            };
         }
-		return true;
-	};
-}
-void PowerOffWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	if( titleLabel ) { removeWidget(titleLabel); delete titleLabel; titleLabel = nullptr; };
-	if( infoLabel ) { removeWidget(infoLabel); delete infoLabel; infoLabel = nullptr; };
+        selectionLabels.clear();
 
-	for( uint32_t i=0; i<selectionLabels.size(); i++ ) {
-		if( selectionLabels[i] ) { removeWidget(selectionLabels[i]); delete selectionLabels[i]; selectionLabels[i] = nullptr; };
-	}
-	selectionLabels.clear();
+        if (powerImage) {
+            removeWidget(powerImage);
+            delete powerImage;
+            powerImage = nullptr;
+        };
+        if (powerDownImage) {
+            removeWidget(powerDownImage);
+            delete powerDownImage;
+            powerDownImage = nullptr;
+        };
 
-	if( powerImage ) { removeWidget(powerImage); delete powerImage; powerImage = nullptr; };
-	if( powerDownImage ) { removeWidget(powerDownImage); delete powerDownImage; powerDownImage = nullptr; };
+        focusItem = nullptr;
+        delete eventMgrLabel;
+        children.clear();
+    }
 
-	focusItem = nullptr;
-	delete eventMgrLabel;
-	children.clear();
-}
+    PowerOffWindow::~PowerOffWindow()
+    {
+        destroyInterface();
+    }
 
-PowerOffWindow::~PowerOffWindow() {
-	destroyInterface();
-}
+    void PowerOffWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        // on entering screen always set default result as returning to home screen and set focus to "No" label
+        state = State::Return;
+        setFocusItem(selectionLabels[0]);
+    }
 
-void PowerOffWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	//on entering screen always set default result as returning to home screen and set focus to "No" label
-	state = State::Return;
-	setFocusItem( selectionLabels[0] );
+    bool PowerOffWindow::onInput(const InputEvent &inputEvent)
+    {
+        // check if any of the lower inheritance onInput methods catch the event
+        if (AppWindow::onInput(inputEvent)) {
+            return true;
+        }
 
-}
+        // process only short press, consume rest
+        if (inputEvent.state != gui::InputEvent::State::keyReleasedShort)
+            return true;
 
-bool PowerOffWindow::onInput( const InputEvent& inputEvent ) {
-	//check if any of the lower inheritance onInput methods catch the event
-	if( AppWindow::onInput( inputEvent ) ) {
-		return true;
-	}
+        // if enter was pressed check state and power down or return to main desktop's window
+        if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+            if (state == State::PowerDown) {
+                // TODO start powering down procedure
+            }
+            else {
+                application->switchWindow("MainWindow");
+            }
+        }
 
-	//process only short press, consume rest
-	if( inputEvent.state != gui::InputEvent::State::keyReleasedShort )
-		return true;
-
-
-	//if enter was pressed check state and power down or return to main desktop's window
-	if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
-		if( state == State::PowerDown ){
-			//TODO start powering down procedure
-		}
-		else {
-			application->switchWindow( "MainWindow" );
-		}
-	}
-
-	return false;
-}
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-desktop/windows/PowerOffWindow.hpp b/module-apps/application-desktop/windows/PowerOffWindow.hpp
index a13da8373..6f15025f5 100644
--- a/module-apps/application-desktop/windows/PowerOffWindow.hpp
+++ b/module-apps/application-desktop/windows/PowerOffWindow.hpp
@@ -15,39 +15,41 @@
 #include "gui/widgets/Image.hpp"
 #include "gui/widgets/BottomBar.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- * Class that defines look and functions for power down window.
- */
-class PowerOffWindow: public AppWindow {
+    /*
+     * Class that defines look and functions for power down window.
+     */
+    class PowerOffWindow : public AppWindow
+    {
 
-enum class State {
-		PowerDown,
-		Return,
-	};
+        enum class State
+        {
+            PowerDown,
+            Return,
+        };
 
-	gui::Label* titleLabel = nullptr;
-	gui::Label* infoLabel = nullptr;
+        gui::Label *titleLabel = nullptr;
+        gui::Label *infoLabel  = nullptr;
 
-	std::vector<gui::Label*> selectionLabels;
-	//TODO remove this label after power manager is finished.
-	gui::Label* eventMgrLabel = nullptr;
-	gui::Image* powerImage = nullptr;
-	gui::Image* powerDownImage = nullptr;
-	State state = State::Return;
+        std::vector<gui::Label *> selectionLabels;
+        // TODO remove this label after power manager is finished.
+        gui::Label *eventMgrLabel  = nullptr;
+        gui::Image *powerImage     = nullptr;
+        gui::Image *powerDownImage = nullptr;
+        State state                = State::Return;
 
-public:
-	PowerOffWindow( app::Application* app );
-	virtual ~PowerOffWindow();
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-	bool onInput( const InputEvent& inputEvent ) override;
+      public:
+        PowerOffWindow(app::Application *app);
+        virtual ~PowerOffWindow();
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool onInput(const InputEvent &inputEvent) override;
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-messages/ApplicationMessages.cpp b/module-apps/application-messages/ApplicationMessages.cpp
index a5ce47076..9bb226bd0 100644
--- a/module-apps/application-messages/ApplicationMessages.cpp
+++ b/module-apps/application-messages/ApplicationMessages.cpp
@@ -21,132 +21,128 @@
 #include <../module-services/service-db/messages/DBNotificationMessage.hpp>
 #include <service-db/api/DBServiceAPI.hpp>
 
-namespace app {
+namespace app
+{
 
-    ApplicationMessages::ApplicationMessages(std::string name, std::string parent, bool startBackgound) : Application(name, parent, startBackgound, 4096 * 2)
+    ApplicationMessages::ApplicationMessages(std::string name, std::string parent, bool startBackgound)
+        : Application(name, parent, startBackgound, 4096 * 2)
     {
         busChannels.push_back(sys::BusChannels::ServiceDBNotifications);
     }
 
-ApplicationMessages::~ApplicationMessages() {
-}
+    ApplicationMessages::~ApplicationMessages()
+    {}
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationMessages::DataReceivedHandler(sys::DataMessage *msgl,
-		sys::ResponseMessage *resp) {
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	// if message was handled by application's template there is no need to process further.
-	if (reinterpret_cast<sys::ResponseMessage*>(retMsg.get())->retCode
-			== sys::ReturnCodes::Success) {
-		return retMsg;
-	}
-
-    if (msgl->messageType == MessageType::DBServiceNotification)
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationMessages::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
     {
-        DBNotificationMessage *msg = dynamic_cast<DBNotificationMessage *>(msgl);
-        LOG_DEBUG("Received multicast");
-        if ((msg != nullptr) && (msg->baseType == DB::BaseType::SmsDB) &&
-            ((msg->notificationType == DB::NotificationType::Updated) || (msg->notificationType == DB::NotificationType::Added)))
-        {
-            if (this->getCurrentWindow() == this->windows[gui::name::window::thread_view])
-            {
-                LOG_DEBUG("TODO");
-                this->getCurrentWindow()->rebuild();
-            }
-            return std::make_shared<sys::ResponseMessage>();
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if (reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success) {
+            return retMsg;
         }
-    }
-    // this variable defines whether message was processed.
-    bool handled = false;
 
-    //handle database response
-	if (resp != nullptr) {
-		handled = true;
-        switch (resp->responseTo)
-        {
-        case MessageType::DBThreadGetLimitOffset: {
-            if (getCurrentWindow()->onDatabaseMessage(resp))
-                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+        if (msgl->messageType == MessageType::DBServiceNotification) {
+            DBNotificationMessage *msg = dynamic_cast<DBNotificationMessage *>(msgl);
+            LOG_DEBUG("Received multicast");
+            if ((msg != nullptr) && (msg->baseType == DB::BaseType::SmsDB) &&
+                ((msg->notificationType == DB::NotificationType::Updated) ||
+                 (msg->notificationType == DB::NotificationType::Added))) {
+                if (this->getCurrentWindow() == this->windows[gui::name::window::thread_view]) {
+                    LOG_DEBUG("TODO");
+                    this->getCurrentWindow()->rebuild();
+                }
+                return std::make_shared<sys::ResponseMessage>();
+            }
         }
-            break;
+        // this variable defines whether message was processed.
+        bool handled = false;
+
+        // handle database response
+        if (resp != nullptr) {
+            handled = true;
+            switch (resp->responseTo) {
+            case MessageType::DBThreadGetLimitOffset: {
+                if (getCurrentWindow()->onDatabaseMessage(resp))
+                    refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            } break;
             default:
                 break;
             }
-    }
-
-	if (handled)
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(
-				sys::ReturnCodes::Unresolved);
-}
-
-// Invoked during initialization
-sys::ReturnCodes ApplicationMessages::InitHandler() {
-
-	auto ret = Application::InitHandler();
-	if (ret != sys::ReturnCodes::Success)
-		return ret;
-
-	createUserInterface();
-
-    setActiveWindow(gui::name::window::main_window);
-
-    return ret;
-}
-
-sys::ReturnCodes ApplicationMessages::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
-
-void ApplicationMessages::createUserInterface()
-{
-    windowOptions = gui::newOptionWindow(this);
-
-    windows.insert({gui::name::window::main_window, new gui::MessagesMainWindow(this)});
-    windows.insert({gui::name::window::thread_view, new gui::ThreadViewWindow(this)});
-    windows.insert({gui::name::window::new_sms, new gui::NewSMS_Window(this)});
-    windows.insert({windowOptions->getName(), windowOptions});
-    windows.insert({gui::name::window::thread_rm_confirm, new gui::Dialog(this, gui::name::window::thread_rm_confirm,
-                                                                          {
-                                                                              .title = "",
-                                                                              .icon = "phonebook_contact_delete_trashcan",
-                                                                              .text = "",
-                                                                              .action = []() -> bool {
-                                                                                  LOG_INFO("!");
-                                                                                  return true;
-                                                                              },
-                                                                          })});
-}
-
-void ApplicationMessages::destroyUserInterface() {
-}
-
-bool ApplicationMessages::removeSMS_thread(const ThreadRecord *record)
-{
-    if (record == nullptr)
-    {
-        LOG_ERROR("removing null SMS thread!");
-        return false;
-    }
-    else
-    {
-        LOG_DEBUG("Removing thread: %d", record->dbID);
-        auto dialog = dynamic_cast<gui::Dialog *>(windows[gui::name::window::thread_rm_confirm]);
-        if (dialog != nullptr)
-        {
-            auto meta = dialog->meta;
-            meta.action = [=]() -> bool { return DBServiceAPI::ThreadRemove(this, record->dbID); };
-            meta.text = "Remove thread: " + std::to_string(record->dbID) + " ?";
-            dialog->update(meta);
-            return switchWindow(gui::name::window::thread_rm_confirm, nullptr);
         }
+
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
         else
-        {
-            LOG_ERROR("Dialog bad type!");
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    }
+
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationMessages::InitHandler()
+    {
+
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
+
+        createUserInterface();
+
+        setActiveWindow(gui::name::window::main_window);
+
+        return ret;
+    }
+
+    sys::ReturnCodes ApplicationMessages::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
+
+    void ApplicationMessages::createUserInterface()
+    {
+        windowOptions = gui::newOptionWindow(this);
+
+        windows.insert({gui::name::window::main_window, new gui::MessagesMainWindow(this)});
+        windows.insert({gui::name::window::thread_view, new gui::ThreadViewWindow(this)});
+        windows.insert({gui::name::window::new_sms, new gui::NewSMS_Window(this)});
+        windows.insert({windowOptions->getName(), windowOptions});
+        windows.insert({gui::name::window::thread_rm_confirm,
+                        new gui::Dialog(this,
+                                        gui::name::window::thread_rm_confirm,
+                                        {
+                                            .title  = "",
+                                            .icon   = "phonebook_contact_delete_trashcan",
+                                            .text   = "",
+                                            .action = []() -> bool {
+                                                LOG_INFO("!");
+                                                return true;
+                                            },
+                                        })});
+    }
+
+    void ApplicationMessages::destroyUserInterface()
+    {}
+
+    bool ApplicationMessages::removeSMS_thread(const ThreadRecord *record)
+    {
+        if (record == nullptr) {
+            LOG_ERROR("removing null SMS thread!");
             return false;
         }
+        else {
+            LOG_DEBUG("Removing thread: %d", record->dbID);
+            auto dialog = dynamic_cast<gui::Dialog *>(windows[gui::name::window::thread_rm_confirm]);
+            if (dialog != nullptr) {
+                auto meta   = dialog->meta;
+                meta.action = [=]() -> bool { return DBServiceAPI::ThreadRemove(this, record->dbID); };
+                meta.text   = "Remove thread: " + std::to_string(record->dbID) + " ?";
+                dialog->update(meta);
+                return switchWindow(gui::name::window::thread_rm_confirm, nullptr);
+            }
+            else {
+                LOG_ERROR("Dialog bad type!");
+                return false;
+            }
+        }
     }
-}
 
 } /* namespace app */
diff --git a/module-apps/application-messages/ApplicationMessages.hpp b/module-apps/application-messages/ApplicationMessages.hpp
index c8a3e12d1..1906501a8 100644
--- a/module-apps/application-messages/ApplicationMessages.hpp
+++ b/module-apps/application-messages/ApplicationMessages.hpp
@@ -24,33 +24,33 @@ namespace gui
     }; // namespace name
 };     // namespace gui
 
-namespace app {
+namespace app
+{
 
-inline const std::string name_messages =  "ApplicationMessages";
+    inline const std::string name_messages = "ApplicationMessages";
 
-class ApplicationMessages: public app::Application {
-public:
-	ApplicationMessages(std::string name = name_messages,
-			std::string parent = "", bool startBackgound = false);
-	virtual ~ApplicationMessages();
+    class ApplicationMessages : public app::Application
+    {
+      public:
+        ApplicationMessages(std::string name = name_messages, std::string parent = "", bool startBackgound = false);
+        virtual ~ApplicationMessages();
 
-    gui::OptionWindow *windowOptions = nullptr;
+        gui::OptionWindow *windowOptions = nullptr;
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl,
-			sys::ResponseMessage *resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-	sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode)
-			override final {
-		return sys::ReturnCodes::Success;
-	}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-	void createUserInterface() override;
-	void destroyUserInterface() override;
+        void createUserInterface() override;
+        void destroyUserInterface() override;
 
-    bool removeSMS_thread(const ThreadRecord *record);
-};
+        bool removeSMS_thread(const ThreadRecord *record);
+    };
 } /* namespace app */
 
 #endif /* MODULE_APPS_APPLICATION_MESSAGES_APPLICATIONMESSAGES_HPP_ */
diff --git a/module-apps/application-messages/MessagesStyle.hpp b/module-apps/application-messages/MessagesStyle.hpp
index 18eddfb31..45627faeb 100644
--- a/module-apps/application-messages/MessagesStyle.hpp
+++ b/module-apps/application-messages/MessagesStyle.hpp
@@ -7,26 +7,28 @@
 
 #pragma once
 
-namespace messages {
-namespace threads {
-constexpr auto pageSize = 4;
+namespace messages
+{
+    namespace threads
+    {
+        constexpr auto pageSize = 4;
 
-constexpr auto listHeight = 445;
-constexpr auto listWidth = 458;
-constexpr auto listPositionX = 11;
-constexpr auto ListPositionY = 105; // @TODO M.G. tweak it to design. Spacers between entries, top margin
-} //namespace threads
+        constexpr auto listHeight    = 445;
+        constexpr auto listWidth     = 458;
+        constexpr auto listPositionX = 11;
+        constexpr auto ListPositionY = 105; // @TODO M.G. tweak it to design. Spacers between entries, top margin
+    }                                       // namespace threads
 
-namespace threadItem {
+    namespace threadItem
+    {
 
-constexpr auto contactPositionX = 14;
-constexpr auto contactPositionY = 10;
-constexpr auto cotactWidthOffset = 133;
+        constexpr auto contactPositionX  = 14;
+        constexpr auto contactPositionY  = 10;
+        constexpr auto cotactWidthOffset = 133;
 
-constexpr auto timestampWidth = 100;
-
-constexpr auto prewievPositionX = 14;
-constexpr auto previewWidthOffset = 20;
-}
-} //namespace messages
+        constexpr auto timestampWidth = 100;
 
+        constexpr auto prewievPositionX   = 14;
+        constexpr auto previewWidthOffset = 20;
+    } // namespace threadItem
+} // namespace messages
diff --git a/module-apps/application-messages/data/SMSdata.hpp b/module-apps/application-messages/data/SMSdata.hpp
index 160c46da6..d2fb40c2b 100644
--- a/module-apps/application-messages/data/SMSdata.hpp
+++ b/module-apps/application-messages/data/SMSdata.hpp
@@ -12,8 +12,7 @@ class SMSThreadData : public gui::SwitchData
   public:
     std::shared_ptr<ThreadRecord> thread = nullptr;
     SMSThreadData(std::shared_ptr<ThreadRecord> thread) : thread(thread)
-    {
-    }
+    {}
     virtual ~SMSThreadData() = default;
 };
 
@@ -22,7 +21,6 @@ class SMSSendRequest : public gui::SwitchData
   public:
     std::shared_ptr<ContactRecord> contact = nullptr;
     SMSSendRequest(std::shared_ptr<ContactRecord> contact) : contact(contact)
-    {
-    }
+    {}
     virtual ~SMSSendRequest() = default;
 };
diff --git a/module-apps/application-messages/widgets/ThreadItem.cpp b/module-apps/application-messages/widgets/ThreadItem.cpp
index a33490043..20328f7ba 100644
--- a/module-apps/application-messages/widgets/ThreadItem.cpp
+++ b/module-apps/application-messages/widgets/ThreadItem.cpp
@@ -12,84 +12,79 @@
 #include <Style.hpp>
 #include "../MessagesStyle.hpp"
 
-namespace gui {
+namespace gui
+{
 
-ThreadItem::ThreadItem(ThreadModel *threadmodel) {
-	using namespace style;
+    ThreadItem::ThreadItem(ThreadModel *threadmodel)
+    {
+        using namespace style;
 
-	model = threadmodel;
-	minWidth = 431;
-	minHeight = 100;
-	maxWidth = 431;
-	maxHeight = 100;
+        model     = threadmodel;
+        minWidth  = 431;
+        minHeight = 100;
+        maxWidth  = 431;
+        maxHeight = 100;
 
-	setRadius(0);
-	setEdges(
-			RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM
-					| RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
+        setRadius(0);
+        setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
 
-	setPenFocusWidth(window::default_border_focucs_w);
-	setPenWidth(window::default_border_no_focus_w);
+        setPenFocusWidth(window::default_border_focucs_w);
+        setPenWidth(window::default_border_no_focus_w);
 
-	contact = new gui::Label(this, 0, 0, 0, 0);
-	contact->setPenFocusWidth(window::default_border_no_focus_w);
-	contact->setPenWidth(window::default_border_no_focus_w);
-	contact->setFont(style::window::font::big);
-	contact->setDotsMode(true);
-	contact->setAlignement(gui::Alignment {
-			gui::Alignment::ALIGN_HORIZONTAL_LEFT,
-			gui::Alignment::ALIGN_VERTICAL_CENTER });
+        contact = new gui::Label(this, 0, 0, 0, 0);
+        contact->setPenFocusWidth(window::default_border_no_focus_w);
+        contact->setPenWidth(window::default_border_no_focus_w);
+        contact->setFont(style::window::font::big);
+        contact->setDotsMode(true);
+        contact->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER});
 
-	timestamp = new gui::Label(this, 0, 0, 0, 0);
-	timestamp->setPenFocusWidth(window::default_border_no_focus_w);
-	timestamp->setPenWidth(window::default_border_no_focus_w);
-	timestamp->setFont(style::window::font::small);
-	timestamp->setDotsMode(true);
-	timestamp->setAlignement(gui::Alignment {
-			gui::Alignment::ALIGN_HORIZONTAL_RIGHT,
-			gui::Alignment::ALIGN_VERTICAL_CENTER });
+        timestamp = new gui::Label(this, 0, 0, 0, 0);
+        timestamp->setPenFocusWidth(window::default_border_no_focus_w);
+        timestamp->setPenWidth(window::default_border_no_focus_w);
+        timestamp->setFont(style::window::font::small);
+        timestamp->setDotsMode(true);
+        timestamp->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_CENTER});
 
-	preview = new gui::Label(this, 0, 0, 0, 0);
-	preview->setPenFocusWidth(window::default_border_no_focus_w);
-	preview->setPenWidth(window::default_border_no_focus_w);
-	preview->setFont(style::window::font::small);
-	preview->setDotsMode(true);
-	preview->setAlignement(gui::Alignment {
-			gui::Alignment::ALIGN_HORIZONTAL_LEFT,
-			gui::Alignment::ALIGN_VERTICAL_CENTER });
-
-}
-
-bool ThreadItem::onDimensionChanged(const BoundingBox &oldDim,
-		const BoundingBox &newDim) {
-	using namespace messages::threadItem;
-
-	contact->setPosition(contactPositionX, contactPositionY);
-	contact->setSize(newDim.w - cotactWidthOffset, newDim.h / 2);
-
-	timestamp->setPosition(newDim.w - timestampWidth, 0);
-	timestamp->setSize(timestampWidth, newDim.h / 2);
-
-	preview->setPosition(14, newDim.h / 2);
-	preview->setSize(newDim.w - previewWidthOffset, newDim.h / 2);
-
-	return true;
-}
-
-void ThreadItem::setThreadItem(std::shared_ptr<ThreadRecord> &thread) {
-	this->thread = thread;
-
-	if (model != nullptr) {
-		auto contactRec = DBServiceAPI::ContactGetByID(model->getApplication(),
-				thread->contactID);
-		auto cont = contactRec->front();
-        contact->setText(cont.getFormattedName());
+        preview = new gui::Label(this, 0, 0, 0, 0);
+        preview->setPenFocusWidth(window::default_border_no_focus_w);
+        preview->setPenWidth(window::default_border_no_focus_w);
+        preview->setFont(style::window::font::small);
+        preview->setDotsMode(true);
+        preview->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER});
     }
 
-    timestamp->setText(utils::time::DateTime(thread->date));
+    bool ThreadItem::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        using namespace messages::threadItem;
 
-    preview->setText(thread->snippet);
-}
+        contact->setPosition(contactPositionX, contactPositionY);
+        contact->setSize(newDim.w - cotactWidthOffset, newDim.h / 2);
+
+        timestamp->setPosition(newDim.w - timestampWidth, 0);
+        timestamp->setSize(timestampWidth, newDim.h / 2);
+
+        preview->setPosition(14, newDim.h / 2);
+        preview->setSize(newDim.w - previewWidthOffset, newDim.h / 2);
+
+        return true;
+    }
+
+    void ThreadItem::setThreadItem(std::shared_ptr<ThreadRecord> &thread)
+    {
+        this->thread = thread;
+
+        if (model != nullptr) {
+            auto contactRec = DBServiceAPI::ContactGetByID(model->getApplication(), thread->contactID);
+            auto cont       = contactRec->front();
+            contact->setText(cont.getFormattedName());
+        }
+
+        timestamp->setText(utils::time::DateTime(thread->date));
+
+        preview->setText(thread->snippet);
+    }
 
 } /*namespace gui*/
-
diff --git a/module-apps/application-messages/widgets/ThreadItem.hpp b/module-apps/application-messages/widgets/ThreadItem.hpp
index 643840136..9d676d545 100644
--- a/module-apps/application-messages/widgets/ThreadItem.hpp
+++ b/module-apps/application-messages/widgets/ThreadItem.hpp
@@ -12,28 +12,30 @@
 #include "ListItem.hpp"
 #include "ThreadModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ThreadItem: public ListItem {
-
-private:
-	ThreadModel *model = nullptr;
-
-	std::shared_ptr<ThreadRecord> thread = nullptr;
-	gui::Label *contact = nullptr;
-	gui::Label *timestamp = nullptr;
-	gui::Label *preview = nullptr;
-
-	gui::Image *dot = nullptr;
-public:
-	ThreadItem(ThreadModel *model);
-
-	bool onDimensionChanged(const BoundingBox &oldDim,
-			const BoundingBox &newDim) override;
-	void setThreadItem(std::shared_ptr<ThreadRecord> &thread);
-    std::shared_ptr<ThreadRecord> getThreadItem()
+    class ThreadItem : public ListItem
     {
-        return thread;
-    }
-};
+
+      private:
+        ThreadModel *model = nullptr;
+
+        std::shared_ptr<ThreadRecord> thread = nullptr;
+        gui::Label *contact                  = nullptr;
+        gui::Label *timestamp                = nullptr;
+        gui::Label *preview                  = nullptr;
+
+        gui::Image *dot = nullptr;
+
+      public:
+        ThreadItem(ThreadModel *model);
+
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+        void setThreadItem(std::shared_ptr<ThreadRecord> &thread);
+        std::shared_ptr<ThreadRecord> getThreadItem()
+        {
+            return thread;
+        }
+    };
 } /*namespace gui*/
diff --git a/module-apps/application-messages/widgets/ThreadModel.cpp b/module-apps/application-messages/widgets/ThreadModel.cpp
index 7de46fc56..12eedf5aa 100644
--- a/module-apps/application-messages/widgets/ThreadModel.cpp
+++ b/module-apps/application-messages/widgets/ThreadModel.cpp
@@ -15,61 +15,60 @@
 #include "../windows/ThreadViewWindow.hpp" // for name of window
 
 #include "service-db/api/DBServiceAPI.hpp"
-ThreadModel::ThreadModel(app::Application *app) :
-		DatabaseModel(app, messages::threads::pageSize) {
+ThreadModel::ThreadModel(app::Application *app) : DatabaseModel(app, messages::threads::pageSize)
+{}
 
+void ThreadModel::requestRecordsCount(void)
+{
+    recordsCount = DBServiceAPI::ThreadGetCount(application);
+
+    if (recordsCount > 0) {
+
+        DBServiceAPI::ThreadGetLimitOffset(application, 0, messages::threads::pageSize);
+        if (recordsCount >= messages::threads::pageSize) {
+            DBServiceAPI::ThreadGetLimitOffset(application, messages::threads::pageSize, messages::threads::pageSize);
+        }
+    }
+}
+bool ThreadModel::updateRecords(std::unique_ptr<std::vector<ThreadRecord>> records,
+                                const uint32_t offset,
+                                const uint32_t limit,
+                                uint32_t count)
+{
+    DatabaseModel::updateRecords(std::move(records), offset, limit, count);
+
+    return true;
 }
 
-void ThreadModel::requestRecordsCount(void) {
-	recordsCount = DBServiceAPI::ThreadGetCount(application);
-
-	if (recordsCount > 0) {
-
-		DBServiceAPI::ThreadGetLimitOffset(application, 0,
-				messages::threads::pageSize);
-		if (recordsCount >= messages::threads::pageSize) {
-			DBServiceAPI::ThreadGetLimitOffset(application,
-					messages::threads::pageSize, messages::threads::pageSize);
-		}
-	}
-}
-bool ThreadModel::updateRecords(
-		std::unique_ptr<std::vector<ThreadRecord>> records,
-		const uint32_t offset, const uint32_t limit, uint32_t count) {
-	DatabaseModel::updateRecords(std::move(records), offset, limit, count);
-
-	return true;
+void ThreadModel::requestRecords(uint32_t offset, uint32_t limit)
+{
+    DBServiceAPI::ThreadGetLimitOffset(application, offset, limit);
 }
 
-void ThreadModel::requestRecords(uint32_t offset, uint32_t limit) {
-	DBServiceAPI::ThreadGetLimitOffset(application, offset, limit);
-}
+gui::ListItem *ThreadModel::getItem(
+    int index, int fistElement, int prevElement, uint32_t limit, int remaining, bool topDown)
+{
+    std::shared_ptr<ThreadRecord> thread = getRecord(index);
 
-gui::ListItem* ThreadModel::getItem(int index, int fistElement, int prevElement,
-		uint32_t limit, int remaining, bool topDown) {
-	std::shared_ptr<ThreadRecord> thread = getRecord(index);
+    if (thread.get() == nullptr) {
+        return nullptr;
+    }
 
-	if (thread.get() == nullptr) {
-		return nullptr;
-	}
-
-	auto item = new gui::ThreadItem(this);
-	if (item != nullptr) {
-		item->setThreadItem(thread);
-		item->setID(index);
+    auto item = new gui::ThreadItem(this);
+    if (item != nullptr) {
+        item->setThreadItem(thread);
+        item->setID(index);
         item->activatedCallback = [=](gui::Item &item) {
             LOG_INFO("ThreadItem ActivatedCallback");
-            if (application)
-            {
+            if (application) {
                 application->switchWindow(gui::name::window::thread_view, std::make_unique<SMSThreadData>(thread));
             }
-            else
-            {
+            else {
                 LOG_ERROR("No application!");
             }
             return true;
         };
         return item;
     }
-	return nullptr;
+    return nullptr;
 }
diff --git a/module-apps/application-messages/widgets/ThreadModel.hpp b/module-apps/application-messages/widgets/ThreadModel.hpp
index 4cb36f13a..fb728fc40 100644
--- a/module-apps/application-messages/widgets/ThreadModel.hpp
+++ b/module-apps/application-messages/widgets/ThreadModel.hpp
@@ -15,28 +15,28 @@
 #include "ListItemProvider.hpp"
 #include "Interface/ThreadRecord.hpp"
 
-class ThreadModel: public app::DatabaseModel<ThreadRecord>,
-		public gui::ListItemProvider {
-public:
-	ThreadModel() = delete;
-	ThreadModel(app::Application *app);
-	virtual ~ThreadModel() = default;
+class ThreadModel : public app::DatabaseModel<ThreadRecord>, public gui::ListItemProvider
+{
+  public:
+    ThreadModel() = delete;
+    ThreadModel(app::Application *app);
+    virtual ~ThreadModel() = default;
 
-	void requestRecordsCount() override;
-	bool updateRecords(std::unique_ptr<std::vector<ThreadRecord>> records,
-			const uint32_t offset, const uint32_t limit, uint32_t count)
-					override;
-	void requestRecords(const uint32_t offset, const uint32_t limit) override;
+    void requestRecordsCount() override;
+    bool updateRecords(std::unique_ptr<std::vector<ThreadRecord>> records,
+                       const uint32_t offset,
+                       const uint32_t limit,
+                       uint32_t count) override;
+    void requestRecords(const uint32_t offset, const uint32_t limit) override;
 
-	gui::ListItem* getItem(int index, int firstElement, int prevElement,
-			uint32_t limit, int remaining, bool topDown) override;
-	int getItemCount() const override {
-		return recordsCount;
-	}
-	;
-	app::Application* getApplication(void) {
-		return application;
-	}
-	;
+    gui::ListItem *getItem(
+        int index, int firstElement, int prevElement, uint32_t limit, int remaining, bool topDown) override;
+    int getItemCount() const override
+    {
+        return recordsCount;
+    };
+    app::Application *getApplication(void)
+    {
+        return application;
+    };
 };
-
diff --git a/module-apps/application-messages/windows/MessagesMainWindow.cpp b/module-apps/application-messages/windows/MessagesMainWindow.cpp
index aee151daa..1c9b6b99d 100644
--- a/module-apps/application-messages/windows/MessagesMainWindow.cpp
+++ b/module-apps/application-messages/windows/MessagesMainWindow.cpp
@@ -35,173 +35,164 @@
 
 #include "time/time_conversion.hpp"
 
-namespace gui {
+namespace gui
+{
 
-    MessagesMainWindow::MessagesMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window), threadModel{new ThreadModel(app)}
+    MessagesMainWindow::MessagesMainWindow(app::Application *app)
+        : AppWindow(app, gui::name::window::main_window), threadModel{new ThreadModel(app)}
     {
         buildInterface();
     }
 
-void MessagesMainWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-void MessagesMainWindow::buildInterface() {
-
-	using namespace messages;
-
-	AppWindow::buildInterface();
-
-	list = new gui::ListView(this, threads::listPositionX,
-			threads::ListPositionY, threads::listWidth, threads::listWidth);
-	list->setMaxElements(threads::pageSize);
-	list->setPageSize(threads::pageSize);
-	list->setPenFocusWidth(0);
-	list->setPenWidth(0);
-	list->setProvider(threadModel);
-
-	bottomBar->setActive(BottomBar::Side::LEFT, true);
-
-	bottomBar->setActive(BottomBar::Side::CENTER, true);
-	bottomBar->setActive(BottomBar::Side::RIGHT, true);
-	bottomBar->setText(BottomBar::Side::LEFT,
-			utils::localize.get("common_options"));
-	bottomBar->setText(BottomBar::Side::CENTER,
-			utils::localize.get("common_open"));
-	bottomBar->setText(BottomBar::Side::RIGHT,
-			utils::localize.get("common_back"));
-
-	topBar->setActive(TopBar::Elements::TIME, true);
-
-	setTitle(utils::localize.get("app_messages_title_main"));
-
-	leftArrowImage = new gui::Image(this, 30, 62, 0, 0, "arrow_left");
-	rightArrowImage = new gui::Image(this, 480 - 30 - 13, 62, 0, 0,
-			"arrow_right");
-	newMessageImage = new gui::Image(this, 48, 55, 0, 0, "cross");
-	searchImage = new gui::Image(this, 480 - 48 - 26, 55, 0, 0, "search");
-
-//	setFocusItem( list );
-}
-void MessagesMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	if (list) {
-		removeWidget(list);
-		delete list;
-		list = nullptr;
-	}
-	if (leftArrowImage) {
-		removeWidget(leftArrowImage);
-		delete leftArrowImage;
-		leftArrowImage = nullptr;
-	}
-	if (rightArrowImage) {
-		removeWidget(rightArrowImage);
-		delete rightArrowImage;
-		rightArrowImage = nullptr;
-	}
-	if (newMessageImage) {
-		removeWidget(newMessageImage);
-		delete newMessageImage;
-		newMessageImage = nullptr;
-	}
-	if (searchImage) {
-		removeWidget(searchImage);
-		delete searchImage;
-		searchImage = nullptr;
-	}
-
-	children.clear();
-	delete threadModel;
-}
-
-MessagesMainWindow::~MessagesMainWindow() {
-	destroyInterface();
-}
-
-void MessagesMainWindow::onBeforeShow(ShowMode mode, SwitchData *data) {
-
-    LOG_INFO("Data: %s", data ? data->getDescription().c_str() : "");
+    void MessagesMainWindow::rebuild()
     {
-        if (auto pdata = dynamic_cast<PhonebookSearchReuqest *>(data))
+        destroyInterface();
+        buildInterface();
+    }
+    void MessagesMainWindow::buildInterface()
+    {
+
+        using namespace messages;
+
+        AppWindow::buildInterface();
+
+        list = new gui::ListView(
+            this, threads::listPositionX, threads::ListPositionY, threads::listWidth, threads::listWidth);
+        list->setMaxElements(threads::pageSize);
+        list->setPageSize(threads::pageSize);
+        list->setPenFocusWidth(0);
+        list->setPenWidth(0);
+        list->setProvider(threadModel);
+
+        bottomBar->setActive(BottomBar::Side::LEFT, true);
+
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("common_options"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_open"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        setTitle(utils::localize.get("app_messages_title_main"));
+
+        leftArrowImage  = new gui::Image(this, 30, 62, 0, 0, "arrow_left");
+        rightArrowImage = new gui::Image(this, 480 - 30 - 13, 62, 0, 0, "arrow_right");
+        newMessageImage = new gui::Image(this, 48, 55, 0, 0, "cross");
+        searchImage     = new gui::Image(this, 480 - 48 - 26, 55, 0, 0, "search");
+
+        //	setFocusItem( list );
+    }
+    void MessagesMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        if (list) {
+            removeWidget(list);
+            delete list;
+            list = nullptr;
+        }
+        if (leftArrowImage) {
+            removeWidget(leftArrowImage);
+            delete leftArrowImage;
+            leftArrowImage = nullptr;
+        }
+        if (rightArrowImage) {
+            removeWidget(rightArrowImage);
+            delete rightArrowImage;
+            rightArrowImage = nullptr;
+        }
+        if (newMessageImage) {
+            removeWidget(newMessageImage);
+            delete newMessageImage;
+            newMessageImage = nullptr;
+        }
+        if (searchImage) {
+            removeWidget(searchImage);
+            delete searchImage;
+            searchImage = nullptr;
+        }
+
+        children.clear();
+        delete threadModel;
+    }
+
+    MessagesMainWindow::~MessagesMainWindow()
+    {
+        destroyInterface();
+    }
+
+    void MessagesMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+
+        LOG_INFO("Data: %s", data ? data->getDescription().c_str() : "");
         {
-            auto thread = DBServiceAPI::ThreadGetByContact(application, pdata->result->dbID);
-            if (thread)
-            {
-                application->switchWindow(gui::name::window::thread_view, std::make_unique<SMSThreadData>(std::move(thread)));
-            }
-            else
-            {
-                LOG_FATAL("No thread and thread not created!");
+            if (auto pdata = dynamic_cast<PhonebookSearchReuqest *>(data)) {
+                auto thread = DBServiceAPI::ThreadGetByContact(application, pdata->result->dbID);
+                if (thread) {
+                    application->switchWindow(gui::name::window::thread_view,
+                                              std::make_unique<SMSThreadData>(std::move(thread)));
+                }
+                else {
+                    LOG_FATAL("No thread and thread not created!");
+                }
             }
         }
-    }
-    if (mode == ShowMode::GUI_SHOW_INIT || data == nullptr)
-    {
-        threadModel->clear();
-        threadModel->requestRecordsCount();
-		list->clear();
-		list->setElementsCount(threadModel->getItemCount());
+        if (mode == ShowMode::GUI_SHOW_INIT || data == nullptr) {
+            threadModel->clear();
+            threadModel->requestRecordsCount();
+            list->clear();
+            list->setElementsCount(threadModel->getItemCount());
 
-		setFocusItem(list);
-    }
-}
-
-bool MessagesMainWindow::onInput(const InputEvent &inputEvent)
-{
-    // check if any of the lower inheritance onInput methods catch the event
-    if (AppWindow::onInput(inputEvent))
-    {
-        return true;
-    }
-    else
-    {
-        if (inputEvent.state == InputEvent::State::keyReleasedShort)
-        {
-            switch (inputEvent.keyCode)
-            {
-            case gui::KeyCode::KEY_LEFT:
-                application->switchWindow(gui::name::window::new_sms, nullptr);
-                return true;
-            case gui::KeyCode::KEY_LF: {
-                auto app = dynamic_cast<app::ApplicationMessages *>(application);
-                if (app == nullptr)
-                {
-                    LOG_ERROR("Something went horribly wrong");
-                    return false;
-                }
-                if (app->windowOptions != nullptr)
-                {
-                    app->windowOptions->clearOptions();
-                    auto it = dynamic_cast<gui::ThreadItem *>(list->getSelectedItem());
-                    if (it)
-                    {
-                        app->windowOptions->addOptions(threadWindowOptions(app, it->getThreadItem().get()));
-                        app->switchWindow(app->windowOptions->getName(), nullptr);
-                    }
-                    else
-                    {
-                        LOG_ERROR("Can't switch to options -wrong input type");
-                    }
-                }
-                return true;
-            }
-            default:
-                LOG_DEBUG("SMS main window not handled key: %d", inputEvent.keyCode);
-            }
+            setFocusItem(list);
         }
     }
-    return false;
-}
 
-bool MessagesMainWindow::onDatabaseMessage(sys::Message *msgl) {
-	DBThreadResponseMessage *msg =
-			reinterpret_cast<DBThreadResponseMessage*>(msgl);
-	if (threadModel->updateRecords(std::move(msg->records), msg->offset,
-			msg->limit, msg->count))
-		return true;
+    bool MessagesMainWindow::onInput(const InputEvent &inputEvent)
+    {
+        // check if any of the lower inheritance onInput methods catch the event
+        if (AppWindow::onInput(inputEvent)) {
+            return true;
+        }
+        else {
+            if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+                switch (inputEvent.keyCode) {
+                case gui::KeyCode::KEY_LEFT:
+                    application->switchWindow(gui::name::window::new_sms, nullptr);
+                    return true;
+                case gui::KeyCode::KEY_LF: {
+                    auto app = dynamic_cast<app::ApplicationMessages *>(application);
+                    if (app == nullptr) {
+                        LOG_ERROR("Something went horribly wrong");
+                        return false;
+                    }
+                    if (app->windowOptions != nullptr) {
+                        app->windowOptions->clearOptions();
+                        auto it = dynamic_cast<gui::ThreadItem *>(list->getSelectedItem());
+                        if (it) {
+                            app->windowOptions->addOptions(threadWindowOptions(app, it->getThreadItem().get()));
+                            app->switchWindow(app->windowOptions->getName(), nullptr);
+                        }
+                        else {
+                            LOG_ERROR("Can't switch to options -wrong input type");
+                        }
+                    }
+                    return true;
+                }
+                default:
+                    LOG_DEBUG("SMS main window not handled key: %d", inputEvent.keyCode);
+                }
+            }
+        }
+        return false;
+    }
 
-	return false;
-}
+    bool MessagesMainWindow::onDatabaseMessage(sys::Message *msgl)
+    {
+        DBThreadResponseMessage *msg = reinterpret_cast<DBThreadResponseMessage *>(msgl);
+        if (threadModel->updateRecords(std::move(msg->records), msg->offset, msg->limit, msg->count))
+            return true;
+
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-messages/windows/MessagesMainWindow.hpp b/module-apps/application-messages/windows/MessagesMainWindow.hpp
index e030caf83..1441d39ba 100644
--- a/module-apps/application-messages/windows/MessagesMainWindow.hpp
+++ b/module-apps/application-messages/windows/MessagesMainWindow.hpp
@@ -19,35 +19,37 @@
 #include "ListView.hpp"
 #include "../widgets/ThreadModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class MessagesMainWindow: public AppWindow {
-protected:
-//    PhonebookListView* list;
-//    PhonebookModel* phonebookModel = nullptr;
+    class MessagesMainWindow : public AppWindow
+    {
+      protected:
+        //    PhonebookListView* list;
+        //    PhonebookModel* phonebookModel = nullptr;
 
-	Image *leftArrowImage = nullptr;
-	Image *rightArrowImage = nullptr;
-	Image *newMessageImage = nullptr;
-	Image *searchImage = nullptr;
+        Image *leftArrowImage  = nullptr;
+        Image *rightArrowImage = nullptr;
+        Image *newMessageImage = nullptr;
+        Image *searchImage     = nullptr;
 
-	ThreadModel *threadModel = nullptr;
-	gui::ListView *list = nullptr;
+        ThreadModel *threadModel = nullptr;
+        gui::ListView *list      = nullptr;
 
-public:
-	MessagesMainWindow(app::Application *app);
-	virtual ~MessagesMainWindow();
+      public:
+        MessagesMainWindow(app::Application *app);
+        virtual ~MessagesMainWindow();
 
-	// virtual methods
-	bool onInput(const InputEvent &inputEvent) override;
-	void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
 
-	bool onDatabaseMessage(sys::Message *msgl);
+        bool onDatabaseMessage(sys::Message *msgl);
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-messages/windows/NewMessage.cpp b/module-apps/application-messages/windows/NewMessage.cpp
index 325681cb5..60966a897 100644
--- a/module-apps/application-messages/windows/NewMessage.cpp
+++ b/module-apps/application-messages/windows/NewMessage.cpp
@@ -23,7 +23,7 @@ namespace gui
 
         uint32_t w = this->getWidth() - style::window::default_left_margin * 2;
         uint32_t h = this->getHeight() - title->offset_h() - bottomBar->getHeight();
-        auto body = new gui::VBox(this, style::window::default_left_margin, (uint32_t)title->offset_h(), w, h);
+        auto body  = new gui::VBox(this, style::window::default_left_margin, (uint32_t)title->offset_h(), w, h);
 
         auto label = new Label(body, 0, 0, body->getWidth(), 40);
         label->setText(utils::localize.get("sms_add_rec_num"));
@@ -38,10 +38,11 @@ namespace gui
             std::shared_ptr<std::vector<ContactRecord>> searchResults =
                 DBServiceAPI::ContactSearch(application, text->getText(), text->getText(), text->getText());
             LOG_INFO("Get contact from another app, contacts matching num: %d", searchResults.get()->size());
-            if (searchResults.get()->size() > 0)
-            {
-                std::unique_ptr<PhonebookSearchReuqest> data = std::make_unique<PhonebookSearchReuqest>(text->getText(), searchResults);
-                return sapm::ApplicationManager::messageSwitchApplication(application, app::name_phonebook, name::window::search_results, std::move(data));
+            if (searchResults.get()->size() > 0) {
+                std::unique_ptr<PhonebookSearchReuqest> data =
+                    std::make_unique<PhonebookSearchReuqest>(text->getText(), searchResults);
+                return sapm::ApplicationManager::messageSwitchApplication(
+                    application, app::name_phonebook, name::window::search_results, std::move(data));
             }
             return true;
         };
@@ -60,22 +61,18 @@ namespace gui
 
     void NewSMS_Window::onBeforeShow(ShowMode mode, SwitchData *data)
     {
-        if (dynamic_cast<PhonebookSearchReuqest *>(data))
-        {
+        if (dynamic_cast<PhonebookSearchReuqest *>(data)) {
             LOG_INFO("SUCCESS!");
             application->switchWindow(gui::name::window::thread_view, std::make_unique<SwitchData>(*data));
         }
     }
 
     void NewSMS_Window::rebuild()
-    {
-    }
+    {}
 
     void NewSMS_Window::buildInterface()
-    {
-    }
+    {}
 
     void NewSMS_Window::destroyInterface()
-    {
-    }
+    {}
 }; // namespace gui
diff --git a/module-apps/application-messages/windows/OptionsMessages.cpp b/module-apps/application-messages/windows/OptionsMessages.cpp
index d7fd4975e..0bef3df86 100644
--- a/module-apps/application-messages/windows/OptionsMessages.cpp
+++ b/module-apps/application-messages/windows/OptionsMessages.cpp
@@ -16,7 +16,7 @@ gui::HBox *newCombo(app::ApplicationMessages *app, const ContactRecord &contact)
     box->setPenWidth(0);
     box->setPenFocusWidth(0);
     auto text_len = 200; // Dumb text size - this won't be needed when Text(...) widget will be refactored
-    auto l = new gui::Label(box, 0, 0, text_len, label::big_h);
+    auto l        = new gui::Label(box, 0, 0, text_len, label::big_h);
     l->area(gui::Item::Area::Max).w = box->area().w; // let box layout resize
     decorate(l);
     l->setText(contact.primaryName);
@@ -51,8 +51,12 @@ gui::HBox *newCombo(app::ApplicationMessages *app, const ContactRecord &contact)
 
 gui::Item *placeholder(const UTF8 &text)
 {
-    auto ret = new gui::Rect(nullptr, default_left_margin, 0, style::window_width - default_left_margin - default_right_margin, label::small_h);
-    auto t = new gui::Label(ret, 0, 0, 0, 0, text);
+    auto ret = new gui::Rect(nullptr,
+                             default_left_margin,
+                             0,
+                             style::window_width - default_left_margin - default_right_margin,
+                             label::small_h);
+    auto t   = new gui::Label(ret, 0, 0, 0, 0, text);
 
     auto width = t->getTextNeedSpace() + 20;
     t->setSize(width, label::small_h);
@@ -73,10 +77,16 @@ std::list<gui::Item *> smsWindowOptions(app::ApplicationMessages *app, const SMS
         gui::newOptionLabel(gui::options::contact(app, app::ContactOperation::Details, contact)),
 
         // TODO
-        gui::newOptionLabel(
-            {UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_forvard_message")), [=](gui::Item &item) { return false; }, gui::Arrow::Disabled}),
-        gui::newOptionLabel({UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_copy")), [=](gui::Item &item) { return false; }, gui::Arrow::Disabled}),
-        gui::newOptionLabel({UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_delete_message")), [=](gui::Item &item) { return false; }, gui::Arrow::Disabled}),
-        placeholder(utils::localize.get("sms_from_this_sms")), newCombo(app, contact) // contact.numbers[0].numberE164)
+        gui::newOptionLabel({UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_forvard_message")),
+                             [=](gui::Item &item) { return false; },
+                             gui::Arrow::Disabled}),
+        gui::newOptionLabel({UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_copy")),
+                             [=](gui::Item &item) { return false; },
+                             gui::Arrow::Disabled}),
+        gui::newOptionLabel({UTF8(" <STUB> ") + UTF8(utils::localize.get("sms_delete_message")),
+                             [=](gui::Item &item) { return false; },
+                             gui::Arrow::Disabled}),
+        placeholder(utils::localize.get("sms_from_this_sms")),
+        newCombo(app, contact) // contact.numbers[0].numberE164)
     };
 }
diff --git a/module-apps/application-messages/windows/ThreadViewWindow.cpp b/module-apps/application-messages/windows/ThreadViewWindow.cpp
index 4c77eae9f..9ee54b881 100644
--- a/module-apps/application-messages/windows/ThreadViewWindow.cpp
+++ b/module-apps/application-messages/windows/ThreadViewWindow.cpp
@@ -32,9 +32,7 @@
 #include "service-db/api/DBServiceAPI.hpp"
 
 namespace style
-{
-
-}; // namespace style
+{}; // namespace style
 
 namespace gui
 {
@@ -50,24 +48,24 @@ namespace gui
         bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("common_options"));
         bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_send"));
         bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
-        body = new gui::VBox(this, style::window::default_left_margin, title->offset_h(), elements_width, bottomBar->getY() - title->offset_h());
+        body = new gui::VBox(this,
+                             style::window::default_left_margin,
+                             title->offset_h(),
+                             elements_width,
+                             bottomBar->getY() - title->offset_h());
         body->setPenWidth(style::window::default_border_no_focus_w);
         body->setPenFocusWidth(style::window::default_border_no_focus_w);
         body->borderCallback = [this](const InputEvent &inputEvent) -> bool {
-            if (inputEvent.state != InputEvent::State::keyReleasedShort)
-            {
+            if (inputEvent.state != InputEvent::State::keyReleasedShort) {
                 return false;
             }
-            if (inputEvent.keyCode == KeyCode::KEY_UP)
-            {
+            if (inputEvent.keyCode == KeyCode::KEY_UP) {
                 return this->showMessages(Action::Next);
             }
-            else if (inputEvent.keyCode == KeyCode::KEY_DOWN)
-            {
+            else if (inputEvent.keyCode == KeyCode::KEY_DOWN) {
                 return this->showMessages(Action::Previous);
             }
-            else
-            {
+            else {
                 return false;
             }
         };
@@ -81,28 +79,29 @@ namespace gui
 
     void ThreadViewWindow::rebuildText()
     {
-        if (text)
-        {
+        if (text) {
             body->removeWidget(text);
         }
-        text = new gui::Text(nullptr, 0, 0, body->getWidth(), style::window::messages::sms_height, "", gui::Text::ExpandMode::EXPAND_UP);
+        text = new gui::Text(
+            nullptr, 0, 0, body->getWidth(), style::window::messages::sms_height, "", gui::Text::ExpandMode::EXPAND_UP);
         text->setInputMode(new InputMode(
-            {InputMode::ABC, InputMode::abc}, [=](const UTF8 &text) { textModeShowCB(text); }, [=]() { textSelectSpecialCB(); }));
+            {InputMode::ABC, InputMode::abc},
+            [=](const UTF8 &text) { textModeShowCB(text); },
+            [=]() { textSelectSpecialCB(); }));
         text->setPenFocusWidth(style::window::default_border_focucs_w);
         text->setPenWidth(style::window::default_border_focucs_w);
         text->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
         text->activatedCallback = [&](gui::Item &item) {
-            if (text->getText().length() == 0)
-            {
+            if (text->getText().length() == 0) {
                 LOG_DEBUG("No text to send in SMS");
                 return true;
             }
             SMSRecord record;
             record.number = title->getText();
-            record.body = text->getText();
-            record.type = SMSType::QUEUED;
-            auto time = utils::time::Timestamp();
-            record.date = time.getTime();
+            record.body   = text->getText();
+            record.type   = SMSType::QUEUED;
+            auto time     = utils::time::Timestamp();
+            record.date   = time.getTime();
             DBServiceAPI::SMSAdd(this->application, record);
 
             return true;
@@ -119,8 +118,7 @@ namespace gui
 
     bool ThreadViewWindow::showMessages(ThreadViewWindow::Action what)
     {
-        if (SMS.thread <= 0)
-        {
+        if (SMS.thread <= 0) {
             LOG_ERROR("threadID not set!");
             return false;
         }
@@ -136,39 +134,31 @@ namespace gui
         // 1. load elements to tmp vector
         SMS.dbsize = DBServiceAPI::SMSGetCount(this->application);
         LOG_DEBUG("start: %d end: %d db: %d", SMS.start, SMS.end, SMS.dbsize);
-        if (what == Action::Start)
-        {
+        if (what == Action::Start) {
             SMS.start = 0;
-            SMS.end = maxsmsinwindow;
+            SMS.end   = maxsmsinwindow;
             rebuildText();
         }
 
         // TODO 2. check how many of these will fit in box
         //         update begin / end in `SMS`
-        if (what == Action::Next)
-        {
-            if (SMS.end != SMS.dbsize)
-            {
+        if (what == Action::Next) {
+            if (SMS.end != SMS.dbsize) {
                 SMS.start = SMS.end;
             }
-            else
-            {
+            else {
                 LOG_INFO("All sms shown");
                 return;
             }
         }
-        else if (what == Action::Previous)
-        {
-            if (SMS.start == 0)
-            {
+        else if (what == Action::Previous) {
+            if (SMS.start == 0) {
                 return;
             }
-            else if (SMS.start - maxsmsinwindow < 0)
-            {
+            else if (SMS.start - maxsmsinwindow < 0) {
                 SMS.start = 0;
             }
-            else
-            {
+            else {
                 SMS.start -= maxsmsinwindow;
             }
             LOG_DEBUG("in progress %d", SMS.start);
@@ -178,25 +168,21 @@ namespace gui
         // 3. add them to box
         this->cleanView();
         // if we are going from 0 then we want to show text prompt
-        if (SMS.start == 0)
-        {
+        if (SMS.start == 0) {
             body->addWidget(text);
         }
 
         SMS.end = SMS.start;
-        for (auto &el : *SMS.sms)
-        {
+        for (auto &el : *SMS.sms) {
             LOG_DEBUG("...");
-            if (!smsBuild(el, false))
-            {
+            if (!smsBuild(el, false)) {
                 break;
             }
             ++SMS.end;
         }
         body->setNavigation();
         setFocusItem(body);
-        if (Action::Previous == what)
-        {
+        if (Action::Previous == what) {
             body->setVisible(true, true);
         }
         LOG_DEBUG("sms built");
@@ -211,17 +197,19 @@ namespace gui
         labelSpan->setSize(elements_width, smsBubble->getHeight());
         labelSpan->addWidget(smsBubble);
 
-        auto timeLabel = new gui::Label(nullptr, 0, 0, 0, smsBubble->getHeight());
+        auto timeLabel        = new gui::Label(nullptr, 0, 0, 0, smsBubble->getHeight());
         timeLabel->activeItem = false;
         timeLabel->setFont(style::window::font::verysmall);
         timeLabel->setText(utils::time::Time(timestamp));
         timeLabel->setSize(timeLabel->getTextNeedSpace(), timeLabel->getHeight());
         timeLabel->setPenWidth(style::window::default_border_no_focus_w);
         timeLabel->setVisible(false);
-        timeLabel->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        timeLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
 
-        uint16_t dateLabelSpacerWidth = (elements_width - smsBubble->getWidth() - timeLabel->getWidth() - smsBubble->yapSize);
-        auto timeLabelSpacer = new gui::Label(nullptr, 0, 0, dateLabelSpacerWidth, smsBubble->getHeight());
+        uint16_t dateLabelSpacerWidth =
+            (elements_width - smsBubble->getWidth() - timeLabel->getWidth() - smsBubble->yapSize);
+        auto timeLabelSpacer        = new gui::Label(nullptr, 0, 0, dateLabelSpacerWidth, smsBubble->getHeight());
         timeLabelSpacer->activeItem = false;
         timeLabelSpacer->setPenWidth(0);
 
@@ -235,8 +223,7 @@ namespace gui
             return true;
         };
 
-        if (!smsBubble->visible)
-        {
+        if (!smsBubble->visible) {
             delete labelSpan; // total fail
             labelSpan = nullptr;
         }
@@ -257,19 +244,19 @@ namespace gui
         label->expandMode = Text::ExpandMode::EXPAND_DOWN;
         label->buildDrawList();
         label->setText(el.body.length() ? el.body : " "); // text doesn't really like being empty//
-        label->setMargins(gui::Margins(style::window::messages::sms_h_padding, style::window::messages::sms_v_padding, style::window::messages::sms_h_padding,
+        label->setMargins(gui::Margins(style::window::messages::sms_h_padding,
+                                       style::window::messages::sms_v_padding,
+                                       style::window::messages::sms_h_padding,
                                        style::window::messages::sms_v_padding));
 
         label->activatedCallback = [=](Item &) {
             LOG_INFO("Message activated!");
             auto app = dynamic_cast<app::ApplicationMessages *>(application);
-            if (app == nullptr)
-            {
+            if (app == nullptr) {
                 LOG_ERROR("Something went horribly wrong");
                 return false;
             }
-            if (app->windowOptions != nullptr)
-            {
+            if (app->windowOptions != nullptr) {
                 app->windowOptions->clearOptions();
                 app->windowOptions->addOptions(smsWindowOptions(app, el));
                 app->switchWindow(app->windowOptions->getName(), nullptr);
@@ -282,8 +269,7 @@ namespace gui
 
         // TODO dashed (dotted) outline
         LOG_DEBUG("ADD SMS TYPE: %d", el.type);
-        switch (el.type)
-        {
+        switch (el.type) {
         case SMSType::OUTBOX:
             label->setYaps(RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT);
             label->setX(body->getWidth() - label->getWidth());
@@ -297,12 +283,12 @@ namespace gui
             break;
         }
 
-        if (labelSpan == nullptr)
-        {
+        if (labelSpan == nullptr) {
             return false;
         }
 
-        auto verticalSpacer = new gui::Rect(nullptr, 0, 0, elements_width, style::window::messages::sms_vertical_spacer);
+        auto verticalSpacer =
+            new gui::Rect(nullptr, 0, 0, elements_width, style::window::messages::sms_vertical_spacer);
         verticalSpacer->activeItem = false;
         verticalSpacer->setPenWidth(style::window::default_border_no_focus_w);
         body->addWidget(verticalSpacer);
@@ -318,8 +304,7 @@ namespace gui
     }
 
     void ThreadViewWindow::buildInterface()
-    {
-    }
+    {}
 
     void ThreadViewWindow::destroyInterface()
     {
@@ -336,8 +321,7 @@ namespace gui
     {
         {
             auto pdata = dynamic_cast<SMSThreadData *>(data);
-            if (pdata)
-            {
+            if (pdata) {
                 LOG_INFO("We have it! %d", pdata->thread->dbID);
                 cleanView();
                 SMS.thread = pdata->thread->dbID;
@@ -350,19 +334,20 @@ namespace gui
         }
         {
             auto pdata = dynamic_cast<SMSSendRequest *>(data);
-            if (pdata)
-            {
+            if (pdata) {
                 LOG_INFO("Phonebook sms send request!");
                 // TODO agree what should be used and how. Now Request have only contact,
                 // maybe it should have additional info - which nr to use and how to show it
-                if (pdata->contact->numbers.size() != 0)
-                {
-                    LOG_DEBUG("SEND SMS TO: %s %s %s %s %s", pdata->contact->number.c_str(), pdata->contact->numbers[0].numberE164.c_str(),
-                              pdata->contact->numbers[0].numberUser.c_str(), pdata->contact->primaryName.c_str(), pdata->contact->alternativeName.c_str());
+                if (pdata->contact->numbers.size() != 0) {
+                    LOG_DEBUG("SEND SMS TO: %s %s %s %s %s",
+                              pdata->contact->number.c_str(),
+                              pdata->contact->numbers[0].numberE164.c_str(),
+                              pdata->contact->numbers[0].numberUser.c_str(),
+                              pdata->contact->primaryName.c_str(),
+                              pdata->contact->alternativeName.c_str());
                     setTitle(pdata->contact->numbers[0].numberUser);
                 }
-                else
-                {
+                else {
                     // TODO handle error better
                     setTitle("NO CONTACT");
                 }
@@ -378,8 +363,8 @@ namespace gui
     bool ThreadViewWindow::onDatabaseMessage(sys::Message *msgl)
     {
         //	DBContactResponseMessage* msg = reinterpret_cast<DBContactResponseMessage*>( msgl );
-        //	if( phonebookModel->updateRecords( std::move(msg->records), msg->offset, msg->limit, msg->count, msg->favourite ) )
-        //		return true;
+        //	if( phonebookModel->updateRecords( std::move(msg->records), msg->offset, msg->limit, msg->count,
+        //msg->favourite ) ) 		return true;
 
         return false;
     }
diff --git a/module-apps/application-messages/windows/ThreadViewWindow.hpp b/module-apps/application-messages/windows/ThreadViewWindow.hpp
index 0b5bc076e..7b99b6b82 100644
--- a/module-apps/application-messages/windows/ThreadViewWindow.hpp
+++ b/module-apps/application-messages/windows/ThreadViewWindow.hpp
@@ -26,7 +26,7 @@ namespace gui
     class ThreadViewWindow : public AppWindow
     {
       private:
-        gui::VBox *body = nullptr;
+        gui::VBox *body         = nullptr;
         uint16_t elements_width = this->getWidth() - style::window::default_left_margin * 2;
         void cleanView();
         enum class Action
@@ -44,10 +44,10 @@ namespace gui
 
         struct
         {
-            int start = 0;                                         // actual shown position start
-            int end = 7;                                           // actual shown position end
-            int thread = 0;                                        // thread we are showing
-            int dbsize = 0;                                        // size of elements in db
+            int start                                   = 0;       // actual shown position start
+            int end                                     = 7;       // actual shown position end
+            int thread                                  = 0;       // thread we are showing
+            int dbsize                                  = 0;       // size of elements in db
             std::unique_ptr<std::vector<SMSRecord>> sms = nullptr; // loaded sms from db
         } SMS;
 
diff --git a/module-apps/application-notes/ApplicationNotes.cpp b/module-apps/application-notes/ApplicationNotes.cpp
index 5dd391141..178e56298 100644
--- a/module-apps/application-notes/ApplicationNotes.cpp
+++ b/module-apps/application-notes/ApplicationNotes.cpp
@@ -13,79 +13,82 @@
 
 #include "ApplicationNotes.hpp"
 
-namespace app {
+namespace app
+{
 
-ApplicationNotes::ApplicationNotes(std::string name, std::string parent, bool startBackgound) :
-	Application( name, parent, startBackgound, 4096 ) {
-}
+    ApplicationNotes::ApplicationNotes(std::string name, std::string parent, bool startBackgound)
+        : Application(name, parent, startBackgound, 4096)
+    {}
 
-ApplicationNotes::~ApplicationNotes() {
-	LOG_INFO("deleting");
-}
-
-// Invoked upon receiving data message
-sys::Message_t ApplicationNotes::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode == sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
-
-
-	bool handled = false;
-
-	//handle database response
-	if( resp != nullptr ) {
-		handled = true;
-        switch (resp->responseTo)
-        {
-        case MessageType::DBNotesGetLimitOffset: {
-            if (getCurrentWindow()->onDatabaseMessage(resp))
-                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-        }
-        break;
-        default:
-            break;
-        }
+    ApplicationNotes::~ApplicationNotes()
+    {
+        LOG_INFO("deleting");
     }
 
-	if( handled )
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationNotes::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationNotes::InitHandler() {
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+        bool handled = false;
 
-	createUserInterface();
+        // handle database response
+        if (resp != nullptr) {
+            handled = true;
+            switch (resp->responseTo) {
+            case MessageType::DBNotesGetLimitOffset: {
+                if (getCurrentWindow()->onDatabaseMessage(resp))
+                    refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            } break;
+            default:
+                break;
+            }
+        }
 
-    setActiveWindow(gui::name::window::main_window);
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    }
 
-    return ret;
-}
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationNotes::InitHandler()
+    {
 
-sys::ReturnCodes ApplicationNotes::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-void ApplicationNotes::createUserInterface() {
+        createUserInterface();
 
-	gui::AppWindow* window = nullptr;
+        setActiveWindow(gui::name::window::main_window);
 
-	window = new gui::NotesMainWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        return ret;
+    }
 
-	window = new gui::NotesEditWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-}
+    sys::ReturnCodes ApplicationNotes::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-void ApplicationNotes::destroyUserInterface() {
-}
+    void ApplicationNotes::createUserInterface()
+    {
+
+        gui::AppWindow *window = nullptr;
+
+        window = new gui::NotesMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+
+        window = new gui::NotesEditWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
+
+    void ApplicationNotes::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-notes/ApplicationNotes.hpp b/module-apps/application-notes/ApplicationNotes.hpp
index efb8e86dc..971d947cc 100644
--- a/module-apps/application-notes/ApplicationNotes.hpp
+++ b/module-apps/application-notes/ApplicationNotes.hpp
@@ -12,29 +12,30 @@
 #include "NotesModel.hpp"
 #include "Application.hpp"
 
-namespace app {
+namespace app
+{
 
-inline const std::string name_notes = "ApplicationNotes";
+    inline const std::string name_notes = "ApplicationNotes";
 
-class ApplicationNotes: public Application {
-protected:
+    class ApplicationNotes : public Application
+    {
+      protected:
+      public:
+        ApplicationNotes(std::string name = name_notes, std::string parent = "", bool startBackgound = false);
+        virtual ~ApplicationNotes();
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-public:
-	ApplicationNotes( std::string name=name_notes, std::string parent = "", bool startBackgound = false);
-	virtual ~ApplicationNotes();
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
-
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
 } /* namespace app */
 
-
-
-
 #endif /* MODULE_APPS_APPLICATION_NOTES_APPLICATIONNOTES_HPP_ */
diff --git a/module-apps/application-notes/NotesModel.cpp b/module-apps/application-notes/NotesModel.cpp
index 25ba6c42c..c7315816d 100644
--- a/module-apps/application-notes/NotesModel.cpp
+++ b/module-apps/application-notes/NotesModel.cpp
@@ -11,59 +11,67 @@
 
 #include "NotesModel.hpp"
 
-NotesModel::NotesModel(  app::Application* app) : DatabaseModel(app, 3){
+NotesModel::NotesModel(app::Application *app) : DatabaseModel(app, 3)
+{}
 
+NotesModel::~NotesModel()
+{}
+
+void NotesModel::requestRecordsCount()
+{
+    uint32_t start = xTaskGetTickCount();
+    recordsCount   = DBServiceAPI::NotesGetCount(application);
+    uint32_t stop  = xTaskGetTickCount();
+    LOG_INFO("DBServiceAPI::NotesGetCount %d records %d ms", recordsCount, stop - start);
+
+    // request first and second page if possible
+    if (recordsCount > 0) {
+        DBServiceAPI::NotesGetLimitOffset(application, 0, pageSize);
+        if (recordsCount > pageSize) {
+            DBServiceAPI::NotesGetLimitOffset(application, pageSize, pageSize);
+        }
+    }
 }
 
-NotesModel::~NotesModel() {
+void NotesModel::requestRecords(const uint32_t offset, const uint32_t limit)
+{
+    DBServiceAPI::NotesGetLimitOffset(application, offset, limit);
 }
 
-void NotesModel::requestRecordsCount() {
-	uint32_t start = xTaskGetTickCount();
-	recordsCount = DBServiceAPI::NotesGetCount(application);
-	uint32_t stop = xTaskGetTickCount();
-	LOG_INFO("DBServiceAPI::NotesGetCount %d records %d ms", recordsCount, stop-start);
+bool NotesModel::updateRecords(std::unique_ptr<std::vector<NotesRecord>> records,
+                               const uint32_t offset,
+                               const uint32_t limit,
+                               uint32_t count)
+{
 
-	//request first and second page if possible
-	if( recordsCount > 0 ){
-		DBServiceAPI::NotesGetLimitOffset(application, 0, pageSize );
-		if( recordsCount > pageSize ) {
-			DBServiceAPI::NotesGetLimitOffset(application, pageSize, pageSize );
-		}
-	}
+    //	LOG_INFO("Offset: %d, Limit: %d Count:%d", offset, limit, count);
+    //	for( uint32_t i=0; i<records.get()->size(); ++i ) {
+    //		LOG_INFO("id: %d, filename: %s", records.get()->operator [](i).ID, records.get()->operator
+    //[](i).path.c_str());
+    //	}
+
+    DatabaseModel::updateRecords(std::move(records), offset, limit, count);
+
+    return true;
 }
 
-void NotesModel::requestRecords( const uint32_t offset, const uint32_t limit ) {
-	DBServiceAPI::NotesGetLimitOffset(application, offset, limit );
-}
-
-bool NotesModel::updateRecords( std::unique_ptr<std::vector<NotesRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count ) {
-
-//	LOG_INFO("Offset: %d, Limit: %d Count:%d", offset, limit, count);
-//	for( uint32_t i=0; i<records.get()->size(); ++i ) {
-//		LOG_INFO("id: %d, filename: %s", records.get()->operator [](i).ID, records.get()->operator [](i).path.c_str());
-//	}
-
-	DatabaseModel::updateRecords( std::move(records), offset, limit, count );
-
-	return true;
-}
-
-gui::ListItem* NotesModel::getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown ) {
-
-	std::shared_ptr<NotesRecord> note = getRecord( index );
-
-	SettingsRecord& settings = application->getSettings();
-
-	if( note == nullptr )
-		return nullptr;
-
-	gui::NotesItem* item = new gui::NotesItem(this, !settings.timeFormat12 );
-	if( item != nullptr ) {
-		item->setNote(note);
-		item->setID( index );
-		return item;
-	}
-
-	return nullptr;
+gui::ListItem *NotesModel::getItem(
+    int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown)
+{
+
+    std::shared_ptr<NotesRecord> note = getRecord(index);
+
+    SettingsRecord &settings = application->getSettings();
+
+    if (note == nullptr)
+        return nullptr;
+
+    gui::NotesItem *item = new gui::NotesItem(this, !settings.timeFormat12);
+    if (item != nullptr) {
+        item->setNote(note);
+        item->setID(index);
+        return item;
+    }
+
+    return nullptr;
 }
diff --git a/module-apps/application-notes/NotesModel.hpp b/module-apps/application-notes/NotesModel.hpp
index e22fae6b8..bf0b0d5dc 100644
--- a/module-apps/application-notes/NotesModel.hpp
+++ b/module-apps/application-notes/NotesModel.hpp
@@ -20,19 +20,27 @@
 /*
  *
  */
-class NotesModel: public app::DatabaseModel<NotesRecord>, public gui::ListItemProvider {
-public:
-	NotesModel( app::Application* app );
-	virtual ~NotesModel();
+class NotesModel : public app::DatabaseModel<NotesRecord>, public gui::ListItemProvider
+{
+  public:
+    NotesModel(app::Application *app);
+    virtual ~NotesModel();
 
-	//virtual methods
-	void requestRecordsCount() override;
-	bool updateRecords( std::unique_ptr<std::vector<NotesRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count ) override;
-	void requestRecords( const uint32_t offset, const uint32_t limit ) override;
+    // virtual methods
+    void requestRecordsCount() override;
+    bool updateRecords(std::unique_ptr<std::vector<NotesRecord>> records,
+                       const uint32_t offset,
+                       const uint32_t limit,
+                       uint32_t count) override;
+    void requestRecords(const uint32_t offset, const uint32_t limit) override;
 
-	//virtual methods for ListViewProvider
-	gui::ListItem* getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown ) override;
-	int getItemCount() const override { return recordsCount; };
+    // virtual methods for ListViewProvider
+    gui::ListItem *getItem(
+        int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown) override;
+    int getItemCount() const override
+    {
+        return recordsCount;
+    };
 };
 
 #endif /* MODULE_APPS_APPLICATION_NOTES_NOTESMODEL_HPP_ */
diff --git a/module-apps/application-notes/widgets/NotesItem.cpp b/module-apps/application-notes/widgets/NotesItem.cpp
index 961815070..fa9d16084 100644
--- a/module-apps/application-notes/widgets/NotesItem.cpp
+++ b/module-apps/application-notes/widgets/NotesItem.cpp
@@ -9,67 +9,72 @@
 #include "NotesItem.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-NotesItem::NotesItem(NotesModel* model, bool mode24H) : model{model}, mode24H{mode24H} {
-	minWidth = 436;
-	minHeight = 146;
-	maxWidth = 436;
-	maxHeight = 146;
+    NotesItem::NotesItem(NotesModel *model, bool mode24H) : model{model}, mode24H{mode24H}
+    {
+        minWidth  = 436;
+        minHeight = 146;
+        maxWidth  = 436;
+        maxHeight = 146;
 
-	setRadius( 8 );
+        setRadius(8);
 
-	setPenFocusWidth(3);
-	setPenWidth(1);
+        setPenFocusWidth(3);
+        setPenWidth(1);
 
-	hour = new gui::Label( this, 0,0,0,0);
-	hour->setPenFocusWidth(0);
-	hour->setPenWidth(0);
-	hour->setFont(style::window::font::medium);
-	hour->setAlignement(gui::Alignment { gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_TOP } );
+        hour = new gui::Label(this, 0, 0, 0, 0);
+        hour->setPenFocusWidth(0);
+        hour->setPenWidth(0);
+        hour->setFont(style::window::font::medium);
+        hour->setAlignement(gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_TOP});
 
-	title = new gui::Label( this, 0,0,0,0);
-	title->setPenFocusWidth(0);
-	title->setPenWidth(0);
-	title->setFont(style::window::font::bigbold);
-	title->setAlignement(gui::Alignment { gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_TOP } );
+        title = new gui::Label(this, 0, 0, 0, 0);
+        title->setPenFocusWidth(0);
+        title->setPenWidth(0);
+        title->setFont(style::window::font::bigbold);
+        title->setAlignement(gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_TOP});
 
-	snippet = new gui::Label( this, 0,0,0,0);
-	snippet->setPenFocusWidth(0);
-	snippet->setPenWidth(0);
-	snippet->setFont(style::window::font::small);
-	snippet->setAlignement(gui::Alignment { gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER} );
+        snippet = new gui::Label(this, 0, 0, 0, 0);
+        snippet->setPenFocusWidth(0);
+        snippet->setPenWidth(0);
+        snippet->setFont(style::window::font::small);
+        snippet->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER});
+    }
 
-}
+    NotesItem::~NotesItem()
+    {
+        note = nullptr;
+    }
 
-NotesItem::~NotesItem() {
-	note = nullptr;
-}
+    bool NotesItem::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        hour->setPosition(11, 0);
+        hour->setSize(newDim.w - 22, 40);
 
-bool NotesItem::onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) {
-	hour->setPosition(11, 0 );
-	hour->setSize(newDim.w-22, 40 );
+        title->setPosition(11, 0);
+        title->setSize(68, 40);
 
-	title->setPosition(11, 0 );
-	title->setSize(68, 40 );
+        snippet->setPosition(11, 40);
+        snippet->setSize(newDim.w - 22, newDim.h - 40);
+        return true;
+    }
 
-	snippet->setPosition(11, 40 );
-	snippet->setSize(newDim.w-22, newDim.h-40 );
-	return true;
-}
-
-//sets copy of alarm's
-void NotesItem::setNote( std::shared_ptr<NotesRecord>& note ) {
-	this->note = note;
-	//set values of the labels
-	title->setText( std::to_string( note->ID));
-	snippet->setText( note->path );
-}
-
-bool NotesItem::onActivated( void* data ) {
-	LOG_INFO("ITEM WAS PRESSED");
-	return true;
-}
+    // sets copy of alarm's
+    void NotesItem::setNote(std::shared_ptr<NotesRecord> &note)
+    {
+        this->note = note;
+        // set values of the labels
+        title->setText(std::to_string(note->ID));
+        snippet->setText(note->path);
+    }
 
+    bool NotesItem::onActivated(void *data)
+    {
+        LOG_INFO("ITEM WAS PRESSED");
+        return true;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-notes/widgets/NotesItem.hpp b/module-apps/application-notes/widgets/NotesItem.hpp
index 1e46c45a9..657364e20 100644
--- a/module-apps/application-notes/widgets/NotesItem.hpp
+++ b/module-apps/application-notes/widgets/NotesItem.hpp
@@ -9,40 +9,41 @@
 #ifndef MODULE_APPS_APPLICATION_NOTES_WIDGETS_NOTESITEM_HPP_
 #define MODULE_APPS_APPLICATION_NOTES_WIDGETS_NOTESITEM_HPP_
 
-
 #include "Label.hpp"
 #include "ListItem.hpp"
 #include "../NotesModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- * @brief Widget used to display information about note in the notes list view.
- */
-class NotesItem: public ListItem {
+    /*
+     * @brief Widget used to display information about note in the notes list view.
+     */
+    class NotesItem : public ListItem
+    {
 
-	NotesModel* model = nullptr;
-	//pointer to the notes record
-	std::shared_ptr<NotesRecord> note = nullptr;
-	//this is hour in the mode defined in settings
-	gui::Label* hour = nullptr;
-	gui::Label* title = nullptr;
-	gui::Label* snippet = nullptr;
-	//flag that defines if time should be displayed in 24h mode
-	bool mode24H = false;
+        NotesModel *model = nullptr;
+        // pointer to the notes record
+        std::shared_ptr<NotesRecord> note = nullptr;
+        // this is hour in the mode defined in settings
+        gui::Label *hour    = nullptr;
+        gui::Label *title   = nullptr;
+        gui::Label *snippet = nullptr;
+        // flag that defines if time should be displayed in 24h mode
+        bool mode24H = false;
 
-	public:
-		NotesItem( NotesModel* model, bool mode24H );
-		virtual ~NotesItem();
-		//sets copy of alarm's
-		void setNote( std::shared_ptr<NotesRecord>& note );
+      public:
+        NotesItem(NotesModel *model, bool mode24H);
+        virtual ~NotesItem();
+        // sets copy of alarm's
+        void setNote(std::shared_ptr<NotesRecord> &note);
 
-		//returns alarm structure
-		std::shared_ptr<NotesRecord> getAlarm();
-		//virtual methods from Item
-		bool onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) override;
-		bool onActivated( void* data ) override;
-};
+        // returns alarm structure
+        std::shared_ptr<NotesRecord> getAlarm();
+        // virtual methods from Item
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+        bool onActivated(void *data) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-notes/windows/NotesEditWindow.cpp b/module-apps/application-notes/windows/NotesEditWindow.cpp
index 705224ee4..234068e66 100644
--- a/module-apps/application-notes/windows/NotesEditWindow.cpp
+++ b/module-apps/application-notes/windows/NotesEditWindow.cpp
@@ -26,68 +26,77 @@
 #include <Style.hpp>
 
 UTF8 textString = "Very long test line ABCDEFGHIJKLMNOPQRST123456789\n"
-		"abcdefghijklmnopqrs 123456789 ABCDEFGHIJKLMONPQRSTUW 12345\n    test\nnew line\n\n\n12345";
+                  "abcdefghijklmnopqrs 123456789 ABCDEFGHIJKLMONPQRSTUW 12345\n    test\nnew line\n\n\n12345";
 
-namespace gui {
+namespace gui
+{
 
-NotesEditWindow::NotesEditWindow( app::Application* app ) :
-	AppWindow(app,"EditWindow") {
-	buildInterface();
-}
+    NotesEditWindow::NotesEditWindow(app::Application *app) : AppWindow(app, "EditWindow")
+    {
+        buildInterface();
+    }
 
-void NotesEditWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-void NotesEditWindow::buildInterface() {
-	AppWindow::buildInterface();
+    void NotesEditWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
+    void NotesEditWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-	bottomBar->setActive( BottomBar::Side::CENTER, true );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("app_notes_save"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("app_notes_back"));
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_notes_save"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_notes_back"));
 
-    setTitle(utils::localize.get("app_notes_new_note"));
+        setTitle(utils::localize.get("app_notes_new_note"));
 
-	text = new gui::Text( this, 11, 105, 480-22, 600-105-50 );
-	text->setFont(style::window::font::medium);
-	text->setRadius(5);
-	text->setMargins( gui::Margins(10, 5, 10, 5));
-	text->activatedCallback = [=] (gui::Item& item){
-		UTF8 getstr = text->getText();
-		time_t timestamp;
-		bsp::rtc_GetCurrentTimestamp(&timestamp);
+        text = new gui::Text(this, 11, 105, 480 - 22, 600 - 105 - 50);
+        text->setFont(style::window::font::medium);
+        text->setRadius(5);
+        text->setMargins(gui::Margins(10, 5, 10, 5));
+        text->activatedCallback = [=](gui::Item &item) {
+            UTF8 getstr = text->getText();
+            time_t timestamp;
+            bsp::rtc_GetCurrentTimestamp(&timestamp);
 
-		UTF8 filename = "sys/data/applications/notes/" + std::to_string(timestamp) + ".txt";
+            UTF8 filename = "sys/data/applications/notes/" + std::to_string(timestamp) + ".txt";
 
-		auto file = vfs.fopen( filename.c_str(), "wb" );
-		vfs.fwrite( getstr.c_str(), getstr.used()-1, 1, file );
-		vfs.fclose( file );
-		return true; };
-	text->setTextType( gui::Text::TextType::MULTI_LINE );
-	text->setEditMode(gui::Text::EditMode::BROWSE );
-    text->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
+            auto file = vfs.fopen(filename.c_str(), "wb");
+            vfs.fwrite(getstr.c_str(), getstr.used() - 1, 1, file);
+            vfs.fclose(file);
+            return true;
+        };
+        text->setTextType(gui::Text::TextType::MULTI_LINE);
+        text->setEditMode(gui::Text::EditMode::BROWSE);
+        text->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
 
-	topBar->setActive(TopBar::Elements::TIME, true );
-}
+        topBar->setActive(TopBar::Elements::TIME, true);
+    }
 
-void NotesEditWindow::destroyInterface() {
-	AppWindow::destroyInterface();
+    void NotesEditWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
 
-	if( text ) { removeWidget(text); delete text; text = nullptr; }
+        if (text) {
+            removeWidget(text);
+            delete text;
+            text = nullptr;
+        }
 
-	children.clear();
-}
+        children.clear();
+    }
 
-NotesEditWindow::~NotesEditWindow() {
-	destroyInterface();
-}
+    NotesEditWindow::~NotesEditWindow()
+    {
+        destroyInterface();
+    }
 
-void NotesEditWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	text->setText( textString );
-	setFocusItem( text );
-}
+    void NotesEditWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        text->setText(textString);
+        setFocusItem(text);
+    }
 
 } /* namespace gui */
-
-
diff --git a/module-apps/application-notes/windows/NotesEditWindow.hpp b/module-apps/application-notes/windows/NotesEditWindow.hpp
index c7a062879..bcbcae010 100644
--- a/module-apps/application-notes/windows/NotesEditWindow.hpp
+++ b/module-apps/application-notes/windows/NotesEditWindow.hpp
@@ -21,22 +21,25 @@
 #include "gui/widgets/TopBar.hpp"
 #include "gui/widgets/ListView.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class NotesEditWindow: public AppWindow {
-	Text* text = nullptr;
-	Label* title = nullptr;
-public:
-	NotesEditWindow( app::Application* app );
-	virtual ~NotesEditWindow();
+    class NotesEditWindow : public AppWindow
+    {
+        Text *text   = nullptr;
+        Label *title = nullptr;
 
-	//virtual methods
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
+      public:
+        NotesEditWindow(app::Application *app);
+        virtual ~NotesEditWindow();
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        // virtual methods
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-notes/windows/NotesMainWindow.cpp b/module-apps/application-notes/windows/NotesMainWindow.cpp
index 3f76b2c8d..c98e37fe6 100644
--- a/module-apps/application-notes/windows/NotesMainWindow.cpp
+++ b/module-apps/application-notes/windows/NotesMainWindow.cpp
@@ -21,78 +21,91 @@
 #include "NotesMainWindow.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-    NotesMainWindow::NotesMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window), notesModel{new NotesModel(app)}
+    NotesMainWindow::NotesMainWindow(app::Application *app)
+        : AppWindow(app, gui::name::window::main_window), notesModel{new NotesModel(app)}
     {
         buildInterface();
     }
 
-void NotesMainWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
-void NotesMainWindow::buildInterface() {
-	AppWindow::buildInterface();
+    void NotesMainWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
+    void NotesMainWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-	list = new gui::ListView(this, 16, 105, 480-32, 440 );
-	list->setMaxElements(3);
-	list->setPageSize(3);
-	list->setPenFocusWidth(0);
-	list->setPenWidth(0);
-	list->setProvider( notesModel );
+        list = new gui::ListView(this, 16, 105, 480 - 32, 440);
+        list->setMaxElements(3);
+        list->setPageSize(3);
+        list->setPenFocusWidth(0);
+        list->setPenWidth(0);
+        list->setProvider(notesModel);
 
-	setFocusItem(list);
+        setFocusItem(list);
 
-    setTitle(utils::localize.get("app_notes_title_main"));
+        setTitle(utils::localize.get("app_notes_title_main"));
 
-	bottomBar->setActive( BottomBar::Side::CENTER, true );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_open"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_open"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	topBar->setActive(TopBar::Elements::TIME, true );
+        topBar->setActive(TopBar::Elements::TIME, true);
+    }
+    void NotesMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
 
-}
-void NotesMainWindow::destroyInterface() {
-	AppWindow::destroyInterface();
+        if (list) {
+            removeWidget(list);
+            delete list;
+            list = nullptr;
+        };
 
-	if( list ) { removeWidget(list); delete list; list= nullptr; };
+        children.clear();
+        delete notesModel;
+    }
 
-	children.clear();
-	delete notesModel;
-}
+    NotesMainWindow::~NotesMainWindow()
+    {
+        destroyInterface();
+    }
 
-NotesMainWindow::~NotesMainWindow() {
-	destroyInterface();
-}
+    void NotesMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        notesModel->clear();
+        notesModel->requestRecordsCount();
+        list->clear();
+        list->setElementsCount(notesModel->getItemCount());
+    }
 
-void NotesMainWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	notesModel->clear();
-	notesModel->requestRecordsCount();
-	list->clear();
-	list->setElementsCount( notesModel->getItemCount() );
-}
+    bool NotesMainWindow::onInput(const InputEvent &inputEvent)
+    {
 
-bool NotesMainWindow::onInput( const InputEvent& inputEvent ) {
+        // process only if key is released
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort) ||
+            (inputEvent.state != InputEvent::State::keyReleasedLong)) {
+            if (inputEvent.keyCode == KeyCode::KEY_LEFT) {
+                application->switchWindow("EditWindow");
+                return true;
+            }
+        }
 
-	//process only if key is released
-	if(( inputEvent.state != InputEvent::State::keyReleasedShort ) || ( inputEvent.state != InputEvent::State::keyReleasedLong )) {
-		if( inputEvent.keyCode == KeyCode::KEY_LEFT ) {
-			application->switchWindow( "EditWindow" );
-			return true;
-		}
-	}
+        return AppWindow::onInput(inputEvent);
+    }
 
-	return AppWindow::onInput( inputEvent );
-}
+    bool NotesMainWindow::onDatabaseMessage(sys::Message *msgl)
+    {
+        DBNotesResponseMessage *msg = reinterpret_cast<DBNotesResponseMessage *>(msgl);
+        if (notesModel->updateRecords(std::move(msg->records), msg->offset, msg->limit, msg->count))
+            return true;
 
-bool NotesMainWindow::onDatabaseMessage( sys::Message* msgl ) {
-	DBNotesResponseMessage* msg = reinterpret_cast<DBNotesResponseMessage*>( msgl );
-	if( notesModel->updateRecords( std::move(msg->records), msg->offset, msg->limit, msg->count ) )
-		return true;
-
-	return false;
-}
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-notes/windows/NotesMainWindow.hpp b/module-apps/application-notes/windows/NotesMainWindow.hpp
index 3e6a16941..fa6cfb51b 100644
--- a/module-apps/application-notes/windows/NotesMainWindow.hpp
+++ b/module-apps/application-notes/windows/NotesMainWindow.hpp
@@ -22,26 +22,28 @@
 
 #include "../NotesModel.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class NotesMainWindow: public AppWindow {
-	NotesModel* notesModel = nullptr;
-	gui::ListView* list = nullptr;
-	Label* title = nullptr;
-public:
-	NotesMainWindow( app::Application* app );
-	virtual ~NotesMainWindow();
+    class NotesMainWindow : public AppWindow
+    {
+        NotesModel *notesModel = nullptr;
+        gui::ListView *list    = nullptr;
+        Label *title           = nullptr;
 
-	//virtual methods
-	bool onInput( const InputEvent& inputEvent ) override;
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
+      public:
+        NotesMainWindow(app::Application *app);
+        virtual ~NotesMainWindow();
 
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-	bool onDatabaseMessage( sys::Message* msg ) override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        bool onDatabaseMessage(sys::Message *msg) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-phonebook/ApplicationPhonebook.cpp b/module-apps/application-phonebook/ApplicationPhonebook.cpp
index 32ec7bba9..5abe9ee7d 100644
--- a/module-apps/application-phonebook/ApplicationPhonebook.cpp
+++ b/module-apps/application-phonebook/ApplicationPhonebook.cpp
@@ -14,119 +14,112 @@
 namespace app
 {
 
-    ApplicationPhonebook::ApplicationPhonebook(std::string name, std::string parent, bool startBackgound) : Application(name, parent, startBackgound, 8192)
+    ApplicationPhonebook::ApplicationPhonebook(std::string name, std::string parent, bool startBackgound)
+        : Application(name, parent, startBackgound, 8192)
+    {}
+
+    ApplicationPhonebook::~ApplicationPhonebook()
+    {}
+
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationPhonebook::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
     {
-}
 
-ApplicationPhonebook::~ApplicationPhonebook()
-{
-}
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if (reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success) {
+            return retMsg;
+        }
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationPhonebook::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
-{
+        // this variable defines whether message was processed.
+        bool handled = false;
 
-    auto retMsg = Application::DataReceivedHandler(msgl);
-    // if message was handled by application's template there is no need to process further.
-    if (reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)
-    {
-        return retMsg;
+        // handle database response
+        if (resp != nullptr) {
+            handled = true;
+            switch (resp->responseTo) {
+            case MessageType::DBContactGetLimitOffset: {
+                if (getCurrentWindow()->onDatabaseMessage(resp))
+                    refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
+            } break;
+            default:
+                break;
+            }
+        }
+
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
     }
 
-    // this variable defines whether message was processed.
-    bool handled = false;
-
-    // handle database response
-    if (resp != nullptr)
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationPhonebook::InitHandler()
     {
-        handled = true;
-        switch (resp->responseTo)
-        {
-        case MessageType::DBContactGetLimitOffset: {
-            if (getCurrentWindow()->onDatabaseMessage(resp))
-                refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
-        }
-        break;
-        default:
-            break;
-        }
-    }
 
-    if (handled)
-        return std::make_shared<sys::ResponseMessage>();
-    else
-        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationPhonebook::InitHandler()
-{
+        createUserInterface();
 
-    auto ret = Application::InitHandler();
-    if (ret != sys::ReturnCodes::Success)
         return ret;
+    }
 
-    createUserInterface();
+    sys::ReturnCodes ApplicationPhonebook::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
+    void ApplicationPhonebook::createUserInterface()
+    {
 
-    return ret;
-}
+        gui::AppWindow *window = nullptr;
 
-sys::ReturnCodes ApplicationPhonebook::DeinitHandler()
-{
-    return sys::ReturnCodes::Success;
-}
+        window = new PhonebookMainWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-void ApplicationPhonebook::createUserInterface()
-{
+        window = new PhonebookNewContact(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    gui::AppWindow *window = nullptr;
+        window = new PhonebookContact(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookMainWindow(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookDeleteContact(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookNewContact(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookBlockContact(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookContact(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookDuplicateSpeedDial(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookDeleteContact(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new DuplicatedContactDialogWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookBlockContact(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookSearch(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookDuplicateSpeedDial(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new ErrorWindows::NoResults(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new DuplicatedContactDialogWindow(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new ErrorWindows::ContactBlocked(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new PhonebookSearch(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new ErrorWindows::ContactBlocked(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new ErrorWindows::NoResults(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new gui::PhonebookSearchResults(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new ErrorWindows::ContactBlocked(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookOptions(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new ErrorWindows::ContactBlocked(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new PhonebookOptionsNamecard(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
 
-    window = new gui::PhonebookSearchResults(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
-
-    window = new PhonebookOptions(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
-
-    window = new PhonebookOptionsNamecard(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
-}
-
-void ApplicationPhonebook::destroyUserInterface()
-{
-}
+    void ApplicationPhonebook::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-phonebook/ApplicationPhonebook.hpp b/module-apps/application-phonebook/ApplicationPhonebook.hpp
index a01edf8fa..e0ed004b8 100644
--- a/module-apps/application-phonebook/ApplicationPhonebook.hpp
+++ b/module-apps/application-phonebook/ApplicationPhonebook.hpp
@@ -1,25 +1,30 @@
 #include "Application.hpp"
 
-namespace app {
+namespace app
+{
 
-/* this is is a bad idea but no other exists as of 06.02.2020 */
-static std::string defaultCountryCode = "+48";
+    /* this is is a bad idea but no other exists as of 06.02.2020 */
+    static std::string defaultCountryCode = "+48";
 
-const inline std::string name_phonebook = "ApplicationPhonebook";
+    const inline std::string name_phonebook = "ApplicationPhonebook";
 
-class ApplicationPhonebook: public app::Application {
-public:
-	ApplicationPhonebook( std::string name=name_phonebook, std::string parent="", bool startBackgound = false);
-	virtual ~ApplicationPhonebook();
+    class ApplicationPhonebook : public app::Application
+    {
+      public:
+        ApplicationPhonebook(std::string name = name_phonebook, std::string parent = "", bool startBackgound = false);
+        virtual ~ApplicationPhonebook();
 
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-	void createUserInterface() override;
-	void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
-}
+} // namespace app
diff --git a/module-apps/application-phonebook/data/PhonebookItemData.hpp b/module-apps/application-phonebook/data/PhonebookItemData.hpp
index 6389a5dea..9a7a0c43f 100644
--- a/module-apps/application-phonebook/data/PhonebookItemData.hpp
+++ b/module-apps/application-phonebook/data/PhonebookItemData.hpp
@@ -9,7 +9,8 @@
 class PhonebookItemData : public gui::SwitchData
 {
   public:
-    PhonebookItemData(std::shared_ptr<ContactRecord> contact, const std::string &text = "") : text(text), contact(contact){};
+    PhonebookItemData(std::shared_ptr<ContactRecord> contact, const std::string &text = "")
+        : text(text), contact(contact){};
     virtual ~PhonebookItemData(){};
     std::shared_ptr<ContactRecord> getContact()
     {
@@ -18,8 +19,7 @@ class PhonebookItemData : public gui::SwitchData
 
   public:
     PhonebookItemData() : contact(nullptr)
-    {
-    }
+    {}
     std::string text;
     std::shared_ptr<ContactRecord> contact = nullptr;
 };
@@ -66,11 +66,11 @@ class PhonebookSearchResultsData : public gui::SwitchData
 class PhonebookSearchReuqest : public gui::SwitchData
 {
   public:
-    std::string request = "";
+    std::string request                                 = "";
     std::shared_ptr<std::vector<ContactRecord>> results = nullptr;
-    PhonebookSearchReuqest(std::string request, std::shared_ptr<std::vector<ContactRecord>> results) : request(request), results(results)
-    {
-    }
-    PhonebookSearchReuqest() = default;
+    PhonebookSearchReuqest(std::string request, std::shared_ptr<std::vector<ContactRecord>> results)
+        : request(request), results(results)
+    {}
+    PhonebookSearchReuqest()              = default;
     std::shared_ptr<ContactRecord> result = nullptr;
 };
diff --git a/module-apps/application-phonebook/data/PhonebookStyle.hpp b/module-apps/application-phonebook/data/PhonebookStyle.hpp
index 9598e462c..2888de599 100644
--- a/module-apps/application-phonebook/data/PhonebookStyle.hpp
+++ b/module-apps/application-phonebook/data/PhonebookStyle.hpp
@@ -3,49 +3,57 @@
 
 namespace phonebookStyle
 {
-namespace search {
-    constexpr uint32_t default_x = style::window::default_left_margin;
-    constexpr uint32_t default_w =
+    namespace search
+    {
+        constexpr uint32_t default_x = style::window::default_left_margin;
+        constexpr uint32_t default_w =
             style::window_width - style::window::default_left_margin - style::window::default_right_margin;
-    namespace searchHeader {
-        constexpr uint32_t x = style::window::default_left_margin;
-        constexpr uint32_t y = 127;
-        constexpr uint32_t w = 86;
-        constexpr uint32_t h = 20;
-    } // namespace searchHeader
-    namespace horizontalBox {
-        constexpr uint32_t x = style::window::default_left_margin;
-        constexpr uint32_t y = 153;
-        constexpr uint32_t w = default_w;
-        constexpr uint32_t h = 33;
-        constexpr uint32_t penWidth = 2;
-        namespace searchTop {
-            constexpr uint32_t x = default_w;
-            constexpr uint32_t y = 1;
-            constexpr uint32_t w = 32;
-            constexpr uint32_t h = 32;
-        } // namespace searchTop
-        namespace inputField {
-            constexpr uint32_t x = 1;
-            constexpr uint32_t y = 1;
-            constexpr uint32_t w = default_w - searchTop::w;
-            constexpr uint32_t h = 33;
-        } // namespace inputField
-    } // namespace horizontalBox
-} //namespace search
-namespace searchResults {
-    constexpr uint32_t default_x = style::window::default_left_margin;
-    constexpr uint32_t default_w =
+        namespace searchHeader
+        {
+            constexpr uint32_t x = style::window::default_left_margin;
+            constexpr uint32_t y = 127;
+            constexpr uint32_t w = 86;
+            constexpr uint32_t h = 20;
+        } // namespace searchHeader
+        namespace horizontalBox
+        {
+            constexpr uint32_t x        = style::window::default_left_margin;
+            constexpr uint32_t y        = 153;
+            constexpr uint32_t w        = default_w;
+            constexpr uint32_t h        = 33;
+            constexpr uint32_t penWidth = 2;
+            namespace searchTop
+            {
+                constexpr uint32_t x = default_w;
+                constexpr uint32_t y = 1;
+                constexpr uint32_t w = 32;
+                constexpr uint32_t h = 32;
+            } // namespace searchTop
+            namespace inputField
+            {
+                constexpr uint32_t x = 1;
+                constexpr uint32_t y = 1;
+                constexpr uint32_t w = default_w - searchTop::w;
+                constexpr uint32_t h = 33;
+            } // namespace inputField
+        }     // namespace horizontalBox
+    }         // namespace search
+    namespace searchResults
+    {
+        constexpr uint32_t default_x = style::window::default_left_margin;
+        constexpr uint32_t default_w =
             style::window_width - style::window::default_left_margin - style::window::default_right_margin;
-    namespace searchResultList {
-        constexpr uint32_t x = style::window::default_left_margin;
-        constexpr uint32_t y = 105 + 6;
-        constexpr uint32_t w = style::window_width - style::window::default_left_margin - style::window::default_right_margin;
-        constexpr uint32_t h = style::window_height - y - 50;
-        constexpr uint32_t maxElements = 7;
-        constexpr uint32_t pageSize = 7;
-        constexpr uint32_t penFocusWidth = style::window::default_border_no_focus_w;
-        constexpr uint32_t penWidth = 0;
-    } // namespace searchResultList
-} //namespace search
-} //namespace phonebookStyle
\ No newline at end of file
+        namespace searchResultList
+        {
+            constexpr uint32_t x = style::window::default_left_margin;
+            constexpr uint32_t y = 105 + 6;
+            constexpr uint32_t w =
+                style::window_width - style::window::default_left_margin - style::window::default_right_margin;
+            constexpr uint32_t h             = style::window_height - y - 50;
+            constexpr uint32_t maxElements   = 7;
+            constexpr uint32_t pageSize      = 7;
+            constexpr uint32_t penFocusWidth = style::window::default_border_no_focus_w;
+            constexpr uint32_t penWidth      = 0;
+        } // namespace searchResultList
+    }     // namespace searchResults
+} // namespace phonebookStyle
\ No newline at end of file
diff --git a/module-apps/application-phonebook/models/PhonebookModel.cpp b/module-apps/application-phonebook/models/PhonebookModel.cpp
index 58591c7e8..80a98fde6 100644
--- a/module-apps/application-phonebook/models/PhonebookModel.cpp
+++ b/module-apps/application-phonebook/models/PhonebookModel.cpp
@@ -13,8 +13,7 @@
 #include "service-db/api/DBServiceAPI.hpp"
 
 PhonebookModel::PhonebookModel(app::Application *app) : DatabaseModel(app, 14)
-{
-}
+{}
 
 void PhonebookModel::requestRecordsCount()
 {
@@ -34,28 +33,27 @@ void PhonebookModel::requestRecordsCount()
 void PhonebookModel::requestRecords(const uint32_t offset, const uint32_t limit)
 {
 
-    if (offset < favouriteCount)
-    {
+    if (offset < favouriteCount) {
         // if it's needed to request only favorite
-        if (offset + limit < favouriteCount)
-        {
+        if (offset + limit < favouriteCount) {
             DBServiceAPI::ContactGetLimitOffset(application, offset, limit, true);
         }
-        else
-        {
+        else {
             uint32_t count = favouriteCount - offset;
             DBServiceAPI::ContactGetLimitOffset(application, offset, count, true);
             DBServiceAPI::ContactGetLimitOffset(application, 0, limit - count, false);
         }
     }
     // request normal contacts
-    else
-    {
+    else {
         DBServiceAPI::ContactGetLimitOffset(application, offset - favouriteCount, limit, false);
     }
 }
 
-bool PhonebookModel::updateRecords(std::unique_ptr<std::vector<ContactRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count,
+bool PhonebookModel::updateRecords(std::unique_ptr<std::vector<ContactRecord>> records,
+                                   const uint32_t offset,
+                                   const uint32_t limit,
+                                   uint32_t count,
                                    bool favourite)
 {
 
@@ -67,9 +65,11 @@ bool PhonebookModel::updateRecords(std::unique_ptr<std::vector<ContactRecord>> r
     return true;
 }
 
-gui::ListItem *PhonebookModel::getItem(int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown)
+gui::ListItem *PhonebookModel::getItem(
+    int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown)
 {
-    // LOG_INFO("index: %d, first:%d prev: %d, count: %d, rem: %d, topDown: %d", index, firstElement, prevIndex, count, remaining, topDown);
+    // LOG_INFO("index: %d, first:%d prev: %d, count: %d, rem: %d, topDown: %d", index, firstElement, prevIndex, count,
+    // remaining, topDown);
     bool download = false;
     if (index > firstIndex + pageSize / 2)
         download = true;
@@ -80,106 +80,85 @@ gui::ListItem *PhonebookModel::getItem(int index, int firstElement, int prevInde
     if (contact == nullptr)
         return nullptr;
 
-    if (topDown)
-    {
+    if (topDown) {
         // return item from favorite part of contacts
-        if (static_cast<uint32_t>(index) < favouriteCount)
-        {
+        if (static_cast<uint32_t>(index) < favouriteCount) {
             gui::PhonebookItem *item = new gui::PhonebookItem();
 
-            if ((index == firstElement) && (index != prevIndex))
-            {
+            if ((index == firstElement) && (index != prevIndex)) {
                 item->setValue(utils::localize.get("app_phonebook_list_favourites"));
             }
-            else
-            {
+            else {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             return item;
         }
-        else
-        {
+        else {
             gui::PhonebookItem *item = new gui::PhonebookItem();
             // on top the page or if element next after last favourite contact is requested
-            if (((index == firstElement) || (static_cast<uint32_t>(index) == favouriteCount)) && (index != prevIndex))
-            {
+            if (((index == firstElement) || (static_cast<uint32_t>(index) == favouriteCount)) && (index != prevIndex)) {
 
                 item->setValue(contact->primaryName.substr(0, 1));
             }
-            else
-            {
+            else {
                 std::shared_ptr<ContactRecord> prevContact = getRecord(prevIndex, false);
-                if (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1))
-                {
+                if (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1)) {
                     item->setContact(contact);
                     item->setID(index);
                 }
-                else
-                {
+                else {
                     item->setValue(contact->primaryName.substr(0, 1));
                 }
             }
             return item;
         }
     }
-    else
-    {
-        if (static_cast<uint32_t>(index) < favouriteCount - 1)
-        {
+    else {
+        if (static_cast<uint32_t>(index) < favouriteCount - 1) {
             gui::PhonebookItem *item = new gui::PhonebookItem();
-            if (remaining == 0)
-            {
+            if (remaining == 0) {
                 item->setValue(utils::localize.get("app_phonebook_list_favourites"));
             }
-            else
-            {
+            else {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             return item;
         }
-        else
-        {
+        else {
             gui::PhonebookItem *item = new gui::PhonebookItem();
 
             // leaving normal contacts list and entering favourite area but character is already placed
-            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index == prevIndex))
-            {
+            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index == prevIndex)) {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             // leaving normal contacts list and entering favourite area - return character
-            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index != prevIndex))
-            {
+            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index != prevIndex)) {
                 item->setValue(contact->primaryName.substr(0, 1));
             }
-            else
-            {
+            else {
                 std::shared_ptr<ContactRecord> prevContact = getRecord(prevIndex, false);
-                if (remaining == 0)
-                {
+                if (remaining == 0) {
                     // previous element has the same first character of alternative name so display first character
-                    if (index == prevIndex)
-                    {
+                    if (index == prevIndex) {
                         item->setContact(contact);
                         item->setID(index);
                     }
-                    else
-                    {
+                    else {
                         item->setValue(prevContact->primaryName.substr(0, 1));
                     }
                 }
-                else if (((index == firstElement) || (index == prevIndex) || (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1))))
-                {
+                else if (((index == firstElement) || (index == prevIndex) ||
+                          (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1)))) {
                     item->setContact(contact);
                     item->setID(index);
                 }
-                else
-                {
+                else {
                     item->setValue(prevContact->primaryName.substr(0, 1));
                 }
             }
diff --git a/module-apps/application-phonebook/models/PhonebookModel.hpp b/module-apps/application-phonebook/models/PhonebookModel.hpp
index a3c5600e7..e23bfa5c0 100644
--- a/module-apps/application-phonebook/models/PhonebookModel.hpp
+++ b/module-apps/application-phonebook/models/PhonebookModel.hpp
@@ -32,11 +32,16 @@ class PhonebookModel : public gui::ListItemProvider, public app::DatabaseModel<C
 
     // virtual methods from DatabaseModel
     void requestRecordsCount() override;
-    bool updateRecords(std::unique_ptr<std::vector<ContactRecord>> records, const uint32_t offset, const uint32_t limit, uint32_t count, bool favourite);
+    bool updateRecords(std::unique_ptr<std::vector<ContactRecord>> records,
+                       const uint32_t offset,
+                       const uint32_t limit,
+                       uint32_t count,
+                       bool favourite);
     void requestRecords(const uint32_t offset, const uint32_t limit) override;
 
     // virtual methods for ListViewProvider
-    gui::ListItem *getItem(int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown) override;
+    gui::ListItem *getItem(
+        int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown) override;
     int getItemCount() const override
     {
         return recordsCount;
diff --git a/module-apps/application-phonebook/models/SearchResultsModel.cpp b/module-apps/application-phonebook/models/SearchResultsModel.cpp
index 94860155e..a1195b25b 100644
--- a/module-apps/application-phonebook/models/SearchResultsModel.cpp
+++ b/module-apps/application-phonebook/models/SearchResultsModel.cpp
@@ -5,8 +5,7 @@
 #include "service-db/api/DBServiceAPI.hpp"
 
 SearchResultsModel::SearchResultsModel(app::Application *app) : DatabaseModel(app, 14)
-{
-}
+{}
 
 SearchResultsModel::~SearchResultsModel()
 {
@@ -18,14 +17,16 @@ void SearchResultsModel::requestFavouritesCount()
     favouriteCount = DBServiceAPI::ContactGetCount(application, true);
 }
 
-void SearchResultsModel::requestRecordsCount(){}
-void SearchResultsModel::requestRecords(const uint32_t offset, const uint32_t limit){}
+void SearchResultsModel::requestRecordsCount()
+{}
+void SearchResultsModel::requestRecords(const uint32_t offset, const uint32_t limit)
+{}
 
-gui::ListItem *SearchResultsModel::getItem(int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown)
+gui::ListItem *SearchResultsModel::getItem(
+    int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown)
 {
     auto o = *results.get();
-    if (index >= (int)o.size())
-    {
+    if (index >= (int)o.size()) {
         LOG_ERROR("getItem error: index %d >= results size %d", index, o.size());
         return nullptr;
     }
@@ -34,109 +35,88 @@ gui::ListItem *SearchResultsModel::getItem(int index, int firstElement, int prev
     if (contact == nullptr)
         return nullptr;
 
-    if (topDown)
-    {
+    if (topDown) {
         // return item from favorite part of contacts
-        if (static_cast<uint32_t>(index) < favouriteCount)
-        {
+        if (static_cast<uint32_t>(index) < favouriteCount) {
             gui::PhonebookItem *item = new gui::PhonebookItem();
 
-            if ((index == firstElement) && (index != prevIndex))
-            {
+            if ((index == firstElement) && (index != prevIndex)) {
                 item->setValue(utils::localize.get("app_phonebook_list_favourites"));
             }
-            else
-            {
+            else {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             return item;
         }
-        else
-        {
+        else {
             gui::PhonebookItem *item = new gui::PhonebookItem();
             // on top the page or if element next after last favourite contact is requested
-            if (((index == firstElement) || (static_cast<uint32_t>(index) == favouriteCount)) && (index != prevIndex))
-            {
+            if (((index == firstElement) || (static_cast<uint32_t>(index) == favouriteCount)) && (index != prevIndex)) {
 
                 item->setValue(contact->primaryName.substr(0, 1));
             }
-            else
-            {
+            else {
                 auto prevContact = std::make_shared<ContactRecord>(o[prevIndex]);
-                if (contact->alternativeName.substr(0, 1) == prevContact->alternativeName.substr(0, 1))
-                {
+                if (contact->alternativeName.substr(0, 1) == prevContact->alternativeName.substr(0, 1)) {
                     item->markFavourite(false);
                     item->setContact(contact);
                     item->setID(index);
                 }
-                else
-                {
+                else {
                     item->setValue(contact->primaryName.substr(0, 1));
                 }
             }
             return item;
         }
     }
-    else
-    {
-        if (static_cast<uint32_t>(index) < favouriteCount - 1)
-        {
+    else {
+        if (static_cast<uint32_t>(index) < favouriteCount - 1) {
             gui::PhonebookItem *item = new gui::PhonebookItem();
-            if (remaining == 0)
-            {
+            if (remaining == 0) {
                 item->setValue(utils::localize.get("app_phonebook_list_favourites"));
             }
-            else
-            {
+            else {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             return item;
         }
-        else
-        {
+        else {
             gui::PhonebookItem *item = new gui::PhonebookItem();
 
             // leaving normal contacts list and entering favourite area but character is already placed
-            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index == prevIndex))
-            {
+            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index == prevIndex)) {
                 item->markFavourite(true);
                 item->setContact(contact);
                 item->setID(index);
             }
             // leaving normal contacts list and entering favourite area - return character
-            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index != prevIndex))
-            {
+            if ((static_cast<uint32_t>(index) == favouriteCount - 1) && (index != prevIndex)) {
                 item->setValue(contact->primaryName.substr(0, 1));
             }
-            else
-            {
+            else {
                 auto prevContact = std::make_shared<ContactRecord>(o[prevIndex]);
-                if (remaining == 0)
-                {
+                if (remaining == 0) {
                     // previous element has the same first character of alternative name so display first character
-                    if (index == prevIndex)
-                    {
+                    if (index == prevIndex) {
                         item->markFavourite(false);
                         item->setContact(contact);
                         item->setID(index);
                     }
-                    else
-                    {
+                    else {
                         item->setValue(prevContact->primaryName.substr(0, 1));
                     }
                 }
-                else if (((index == firstElement) || (index == prevIndex) || (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1))))
-                {
+                else if (((index == firstElement) || (index == prevIndex) ||
+                          (contact->primaryName.substr(0, 1) == prevContact->primaryName.substr(0, 1)))) {
                     item->markFavourite(false);
                     item->setContact(contact);
                     item->setID(index);
                 }
-                else
-                {
+                else {
                     item->setValue(prevContact->primaryName.substr(0, 1));
                 }
             }
@@ -148,12 +128,10 @@ gui::ListItem *SearchResultsModel::getItem(int index, int firstElement, int prev
 
 int SearchResultsModel::getItemCount() const
 {
-    if (results)
-    {
+    if (results) {
         return (results.get()->size());
     }
-    else
-    {
+    else {
         return (0);
     }
 }
diff --git a/module-apps/application-phonebook/models/SearchResultsModel.hpp b/module-apps/application-phonebook/models/SearchResultsModel.hpp
index a9be6273c..3e9de27fc 100644
--- a/module-apps/application-phonebook/models/SearchResultsModel.hpp
+++ b/module-apps/application-phonebook/models/SearchResultsModel.hpp
@@ -14,7 +14,8 @@ class SearchResultsModel : public gui::ListItemProvider, public app::DatabaseMod
     SearchResultsModel(app::Application *app);
     virtual ~SearchResultsModel();
 
-    gui::ListItem *getItem(int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown) override;
+    gui::ListItem *getItem(
+        int index, int firstElement, int prevIndex, uint32_t count, int remaining, bool topDown) override;
     int getItemCount() const override;
     void setResults(std::shared_ptr<std::vector<ContactRecord>> _results);
     void requestFavouritesCount();
diff --git a/module-apps/application-phonebook/widgets/PhonebookItem.cpp b/module-apps/application-phonebook/widgets/PhonebookItem.cpp
index 2267cb5cb..e5586127a 100644
--- a/module-apps/application-phonebook/widgets/PhonebookItem.cpp
+++ b/module-apps/application-phonebook/widgets/PhonebookItem.cpp
@@ -12,82 +12,82 @@
 namespace gui
 {
 
-PhonebookItem::PhonebookItem()
-{
-    minWidth = 436;
-    minHeight = style::window::label::big_h;
-    maxWidth = 436;
-    maxHeight = 200;
-
-    setRadius(0);
-    setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
-
-    setPenFocusWidth(2);
-    setPenWidth(0);
-
-    value = new gui::Label(this, 0, 0, 0, 0);
-    value->setPenFocusWidth(0);
-    value->setPenWidth(0);
-    value->setFont(style::window::font::small);
-    value->setAlignement(gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER});
-}
-
-PhonebookItem::~PhonebookItem()
-{
-    if (value)
+    PhonebookItem::PhonebookItem()
     {
-        removeWidget(value);
-        delete value;
-        value = nullptr;
+        minWidth  = 436;
+        minHeight = style::window::label::big_h;
+        maxWidth  = 436;
+        maxHeight = 200;
+
+        setRadius(0);
+        setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
+
+        setPenFocusWidth(2);
+        setPenWidth(0);
+
+        value = new gui::Label(this, 0, 0, 0, 0);
+        value->setPenFocusWidth(0);
+        value->setPenWidth(0);
+        value->setFont(style::window::font::small);
+        value->setAlignement(
+            gui::Alignment{gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER});
     }
-}
 
-bool PhonebookItem::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
-{
-    value->setPosition(10, 0);
-    value->setSize(newDim.w - 10, newDim.h);
+    PhonebookItem::~PhonebookItem()
+    {
+        if (value) {
+            removeWidget(value);
+            delete value;
+            value = nullptr;
+        }
+    }
 
-    return true;
-}
+    bool PhonebookItem::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        value->setPosition(10, 0);
+        value->setSize(newDim.w - 10, newDim.h);
 
-// sets copy of alarm's
-void PhonebookItem::setContact(std::shared_ptr<ContactRecord> contact)
-{
-    this->contact = contact;
-    /* alternativeName is used as Surname or Second name */
-    value->setText(contact->getFormattedName());
-}
+        return true;
+    }
 
-void PhonebookItem::setValue(UTF8 text)
-{
-    value->setText(text);
-    value->setLineMode(true);
-    setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-}
+    // sets copy of alarm's
+    void PhonebookItem::setContact(std::shared_ptr<ContactRecord> contact)
+    {
+        this->contact = contact;
+        /* alternativeName is used as Surname or Second name */
+        value->setText(contact->getFormattedName());
+    }
 
-UTF8 PhonebookItem::getValue()
-{
-    return value->getText();
-}
+    void PhonebookItem::setValue(UTF8 text)
+    {
+        value->setText(text);
+        value->setLineMode(true);
+        setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+    }
 
-bool PhonebookItem::onActivated(void *data)
-{
-    LOG_INFO("ITEM WAS PRESSED");
-    return true;
-}
+    UTF8 PhonebookItem::getValue()
+    {
+        return value->getText();
+    }
 
-void PhonebookItem::markFavourite(bool val)
-{
-    favourite = val;
-    if (val)
-        value->setFont(style::window::font::bigbold);
-    else
-        value->setFont(style::window::font::big);
-}
+    bool PhonebookItem::onActivated(void *data)
+    {
+        LOG_INFO("ITEM WAS PRESSED");
+        return true;
+    }
 
-std::shared_ptr<ContactRecord> PhonebookItem::getContact()
-{
-    return (contact);
-}
+    void PhonebookItem::markFavourite(bool val)
+    {
+        favourite = val;
+        if (val)
+            value->setFont(style::window::font::bigbold);
+        else
+            value->setFont(style::window::font::big);
+    }
+
+    std::shared_ptr<ContactRecord> PhonebookItem::getContact()
+    {
+        return (contact);
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/widgets/PhonebookItem.hpp b/module-apps/application-phonebook/widgets/PhonebookItem.hpp
index d5628670f..32924e1ac 100644
--- a/module-apps/application-phonebook/widgets/PhonebookItem.hpp
+++ b/module-apps/application-phonebook/widgets/PhonebookItem.hpp
@@ -16,36 +16,36 @@
 namespace gui
 {
 
-/*
- *
- */
-class PhonebookItem : public ListItem
-{
-    // pointer to the contact record
-    std::shared_ptr<ContactRecord> contact = nullptr;
-    // this is contact's name and surname or "favourites" or "first letter of surname
-    gui::Label *value = nullptr;
-    bool favourite = false;
-
-  public:
-    PhonebookItem();
-    virtual ~PhonebookItem();
-    // sets copy of contact
-    void setContact(std::shared_ptr<ContactRecord> note);
-    void setValue(UTF8 text);
-    UTF8 getValue();
-    /**
-     * Marks item as a favourite. This will cause to use bold font instead of normal font.
+    /*
+     *
      */
-    void markFavourite(bool val);
+    class PhonebookItem : public ListItem
+    {
+        // pointer to the contact record
+        std::shared_ptr<ContactRecord> contact = nullptr;
+        // this is contact's name and surname or "favourites" or "first letter of surname
+        gui::Label *value = nullptr;
+        bool favourite    = false;
 
-    // returns contact's structure
-    std::shared_ptr<ContactRecord> getContact();
+      public:
+        PhonebookItem();
+        virtual ~PhonebookItem();
+        // sets copy of contact
+        void setContact(std::shared_ptr<ContactRecord> note);
+        void setValue(UTF8 text);
+        UTF8 getValue();
+        /**
+         * Marks item as a favourite. This will cause to use bold font instead of normal font.
+         */
+        void markFavourite(bool val);
 
-    // virtual methods from Item
-    bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
-    bool onActivated(void *data) override;
-};
+        // returns contact's structure
+        std::shared_ptr<ContactRecord> getContact();
+
+        // virtual methods from Item
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+        bool onActivated(void *data) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-phonebook/widgets/PhonebookListView.cpp b/module-apps/application-phonebook/widgets/PhonebookListView.cpp
index 182a41788..d817d7265 100644
--- a/module-apps/application-phonebook/widgets/PhonebookListView.cpp
+++ b/module-apps/application-phonebook/widgets/PhonebookListView.cpp
@@ -18,383 +18,332 @@
 namespace gui
 {
 
-PhonebookListView::PhonebookListView() : ListView()
-{
-    orientation = ORIENTATION_TOP_DOWN;
-}
-
-PhonebookListView::PhonebookListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h) : ListView(parent, x, y, w, h)
-{
-    orientation = ORIENTATION_TOP_DOWN;
-}
-
-PhonebookListView::~PhonebookListView()
-{
-}
-
-void PhonebookListView::setApplication(app::Application *app)
-{
-    application = app;
-}
-
-gui::PhonebookItem *PhonebookListView::getSelectedPhonebookItem()
-{
-    int index = selectedIndex - firstIndex;
-    auto it = items.begin();
-    if (items.size() == 0)
-        return nullptr;
-
-    int count = -1;
-    for (int i = 0; i < pageSize; i++)
+    PhonebookListView::PhonebookListView() : ListView()
     {
-        if ((*it)->getID() >= 0)
-            count++;
-        if (count == index)
-            break;
-        std::advance(it, 1);
+        orientation = ORIENTATION_TOP_DOWN;
     }
 
-    return (dynamic_cast<PhonebookItem *>(*it));
-}
-
-bool PhonebookListView::onInput(const InputEvent &inputEvent)
-{
-    // LOG_INFO("code:%d state:%d", inputEvent.keyCode, inputEvent.state);
-    if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_ENTER))
+    PhonebookListView::PhonebookListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h)
+        : ListView(parent, x, y, w, h)
     {
-        gui::PhonebookItem *item = getSelectedPhonebookItem();
-        if (item)
-        {
-            if (cb_ENTER && cb_ENTER(item))
-            {
+        orientation = ORIENTATION_TOP_DOWN;
+    }
+
+    PhonebookListView::~PhonebookListView()
+    {}
+
+    void PhonebookListView::setApplication(app::Application *app)
+    {
+        application = app;
+    }
+
+    gui::PhonebookItem *PhonebookListView::getSelectedPhonebookItem()
+    {
+        int index = selectedIndex - firstIndex;
+        auto it   = items.begin();
+        if (items.size() == 0)
+            return nullptr;
+
+        int count = -1;
+        for (int i = 0; i < pageSize; i++) {
+            if ((*it)->getID() >= 0)
+                count++;
+            if (count == index)
+                break;
+            std::advance(it, 1);
+        }
+
+        return (dynamic_cast<PhonebookItem *>(*it));
+    }
+
+    bool PhonebookListView::onInput(const InputEvent &inputEvent)
+    {
+        // LOG_INFO("code:%d state:%d", inputEvent.keyCode, inputEvent.state);
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_ENTER)) {
+            gui::PhonebookItem *item = getSelectedPhonebookItem();
+            if (item) {
+                if (cb_ENTER && cb_ENTER(item)) {
+                    return true;
+                }
+                // LOG_INFO("show info on index: %d %s", item->getID(), item->getValue().c_str());
+
+                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(item->getContact());
+                application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+
                 return true;
             }
-            // LOG_INFO("show info on index: %d %s", item->getID(), item->getValue().c_str());
-
-            std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(item->getContact());
-            application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-
-            return true;
+            else {
+                LOG_ERROR("failed to get selected item!");
+                return false;
+            }
         }
-        else
-        {
-            LOG_ERROR("failed to get selected item!");
-            return false;
-        }
-    }
 
-    if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_LF))
-    {
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_LF)) {
 
-        gui::PhonebookItem *item = getSelectedPhonebookItem();
-        if (item)
-        {
-            // LOG_INFO("calling index: %d %s", item->getID(), item->getValue().c_str());
-            return app::call(application, app::CallOperation::ExecuteCall, item->getContact()->numbers[0].numberE164);
+            gui::PhonebookItem *item = getSelectedPhonebookItem();
+            if (item) {
+                // LOG_INFO("calling index: %d %s", item->getID(), item->getValue().c_str());
+                return app::call(
+                    application, app::CallOperation::ExecuteCall, item->getContact()->numbers[0].numberE164);
+            }
+            else {
+                LOG_ERROR("failed to get selected item!");
+                return false;
+            }
         }
-        else
-        {
-            LOG_ERROR("failed to get selected item!");
-            return false;
-        }
-    }
 
-    if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_UP))
-    {
-        if (orientation == ORIENTATION_TOP_DOWN)
-        {
-            if (listMode == MODE_PAGE)
-            {
-                if (selectedIndex > firstIndex)
-                {
-                    selectedIndex--;
-                    return true;
-                }
-                if (selectedIndex == firstIndex)
-                {
-                    // ignore when someone wants to go above first element
-                    if (selectedIndex == 0)
-                        return false;
-                    orientation = ORIENTATION_BOTTOM_UP;
-                    if (firstIndex > 0)
-                    {
-                        selectedIndex = firstIndex - 1;
-                        lastIndex = selectedIndex;
-                        updateScrollDimenstions();
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_UP)) {
+            if (orientation == ORIENTATION_TOP_DOWN) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex > firstIndex) {
+                        selectedIndex--;
                         return true;
                     }
+                    if (selectedIndex == firstIndex) {
+                        // ignore when someone wants to go above first element
+                        if (selectedIndex == 0)
+                            return false;
+                        orientation = ORIENTATION_BOTTOM_UP;
+                        if (firstIndex > 0) {
+                            selectedIndex = firstIndex - 1;
+                            lastIndex     = selectedIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
+                    }
+                }
+                else {
+                    // TODO implement continuous mode
                 }
             }
-            else
-            {
-                // TODO implement continuous mode
-            }
-        }
-        else if (orientation == ORIENTATION_BOTTOM_UP)
-        {
-            if (listMode == MODE_PAGE)
-            {
-                if (selectedIndex > firstIndex)
-                {
-                    selectedIndex--;
-                    return true;
-                }
-                if (selectedIndex == firstIndex)
-                {
-                    if (firstIndex > 0)
-                    {
-                        selectedIndex = firstIndex - 1;
-                        lastIndex = selectedIndex;
-                        updateScrollDimenstions();
+            else if (orientation == ORIENTATION_BOTTOM_UP) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex > firstIndex) {
+                        selectedIndex--;
                         return true;
                     }
+                    if (selectedIndex == firstIndex) {
+                        if (firstIndex > 0) {
+                            selectedIndex = firstIndex - 1;
+                            lastIndex     = selectedIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
+                    }
+                }
+                else {
+                    // TODO implement continuous mode
                 }
-            }
-            else
-            {
-                // TODO implement continuous mode
             }
         }
-    }
-    else if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_DOWN))
-    {
-        if (orientation == ORIENTATION_TOP_DOWN)
-        {
-            if (listMode == MODE_PAGE)
-            {
-                if (selectedIndex < lastIndex)
-                {
-                    selectedIndex++;
-                    return true;
-                }
-                if (selectedIndex == lastIndex)
-                {
-                    if (lastIndex < elementsCount - 1)
-                    {
-                        firstIndex = lastIndex + 1;
-                        selectedIndex = firstIndex;
-                        updateScrollDimenstions();
+        else if ((inputEvent.state == InputEvent::State::keyReleasedShort) &&
+                 (inputEvent.keyCode == KeyCode::KEY_DOWN)) {
+            if (orientation == ORIENTATION_TOP_DOWN) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex < lastIndex) {
+                        selectedIndex++;
                         return true;
                     }
+                    if (selectedIndex == lastIndex) {
+                        if (lastIndex < elementsCount - 1) {
+                            firstIndex    = lastIndex + 1;
+                            selectedIndex = firstIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
+                    }
+                }
+                else { // continuous mode
                 }
             }
-            else
-            { // continuous mode
-            }
-        }
-        else if (orientation == ORIENTATION_BOTTOM_UP)
-        {
-            if (listMode == MODE_PAGE)
-            {
-                if (selectedIndex < lastIndex)
-                {
-                    selectedIndex++;
-                    return true;
-                }
-                if (selectedIndex == lastIndex)
-                {
-                    orientation = ORIENTATION_TOP_DOWN;
-                    if (lastIndex < elementsCount - 1)
-                    {
-                        firstIndex = lastIndex + 1;
-                        selectedIndex = firstIndex;
-                        updateScrollDimenstions();
+            else if (orientation == ORIENTATION_BOTTOM_UP) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex < lastIndex) {
+                        selectedIndex++;
                         return true;
                     }
-                }
-            }
-            else
-            { // continuous mode
-            }
-        }
-    }
-    return false;
-}
-
-void PhonebookListView::updatePageItems()
-{
-
-    // defines how many slots in the list has been occupied
-    int visibleElements = 0;
-
-    // for top down orientation
-    if (orientation == ORIENTATION_TOP_DOWN)
-    {
-        // index of requested item is incremented only if payload of returned item is not null
-        // if it's null it means that this is favourite label of label connected with showing Capital letters for surnames
-        int index = firstIndex, prevIndex = -1;
-        lastIndex = firstIndex;
-        for (int i = 0; i < pageSize; i++)
-        {
-            ListItem *item = provider->getItem(index, firstIndex, prevIndex, pageSize);
-
-            if (item != nullptr)
-            {
-                addWidget(item);
-                items.push_back(item);
-
-                prevIndex = index;
-                if (item->getID() >= 0)
-                {
-                    index++;
-                    this->lastIndex++;
-                }
-                visibleElements++;
-            }
-        }
-        // after the loop lastIndex is the number of elements not the index of last element that's why -- is used.
-        lastIndex--;
-
-        // if last element has been displayed but there is still space for elements
-        if ((lastIndex == elementsCount - 1) && (visibleElements != pageSize) && (firstIndex != 0))
-        {
-
-            orientation = ORIENTATION_BOTTOM_UP;
-
-            // clear all elements in the list.
-            auto it = items.begin();
-            for (uint32_t i = 0; i < items.size(); i++)
-            {
-                ListItem *item = *it;
-                removeWidget(item);
-                delete item;
-                std::advance(it, 1);
-            }
-            items.clear();
-
-            lastIndex = elementsCount - 1;
-            firstIndex = lastIndex;
-            index = lastIndex;
-            prevIndex = -1;
-            for (int i = 0; i < pageSize; i++)
-            {
-                ListItem *item = provider->getItem(index, lastIndex, prevIndex, pageSize, pageSize - 1 - i, false);
-
-                if (item != nullptr)
-                {
-                    addWidget(item);
-                    items.push_back(item);
-
-                    prevIndex = index;
-                    if (item->getID() >= 0)
-                    {
-                        index--;
-                        firstIndex--;
+                    if (selectedIndex == lastIndex) {
+                        orientation = ORIENTATION_TOP_DOWN;
+                        if (lastIndex < elementsCount - 1) {
+                            firstIndex    = lastIndex + 1;
+                            selectedIndex = firstIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
                     }
                 }
-            }
-        }
-    }
-    else if (orientation == ORIENTATION_BOTTOM_UP)
-    {
-        // index of requested item is incremented only if payload of returned item is not null
-        // if it's null it means that this is favourite label of label connected with showing Capital letters for surnames
-        int index = lastIndex, prevIndex = -1;
-        firstIndex = lastIndex;
-        for (int i = 0; i < pageSize; i++)
-        {
-            ListItem *item = provider->getItem(index, lastIndex, prevIndex, pageSize, pageSize - 1 - i, false);
-
-            if (item != nullptr)
-            {
-                addWidget(item);
-                items.push_back(item);
-
-                prevIndex = index;
-                if (item->getID() >= 0)
-                {
-                    index--;
-                    firstIndex--;
+                else { // continuous mode
                 }
-                visibleElements++;
             }
         }
+        return false;
+    }
 
-        firstIndex++;
+    void PhonebookListView::updatePageItems()
+    {
 
-        // if last element has been displayed but there is still space for elements
-        if ((lastIndex != elementsCount - 1) && (visibleElements != pageSize) && (firstIndex == 0))
-        {
-
-            orientation = ORIENTATION_TOP_DOWN;
-
-            // clear all elements in the list.
-            auto it = items.begin();
-            for (uint32_t i = 0; i < items.size(); i++)
-            {
-                ListItem *item = *it;
-                removeWidget(item);
-                delete item;
-                std::advance(it, 1);
-            }
-            items.clear();
+        // defines how many slots in the list has been occupied
+        int visibleElements = 0;
 
+        // for top down orientation
+        if (orientation == ORIENTATION_TOP_DOWN) {
+            // index of requested item is incremented only if payload of returned item is not null
+            // if it's null it means that this is favourite label of label connected with showing Capital letters for
+            // surnames
             int index = firstIndex, prevIndex = -1;
-            this->lastIndex = firstIndex;
-            for (int i = 0; i < pageSize; i++)
-            {
+            lastIndex = firstIndex;
+            for (int i = 0; i < pageSize; i++) {
                 ListItem *item = provider->getItem(index, firstIndex, prevIndex, pageSize);
 
-                if (item != nullptr)
-                {
+                if (item != nullptr) {
                     addWidget(item);
                     items.push_back(item);
 
                     prevIndex = index;
-                    if (item->getID() >= 0)
-                    {
+                    if (item->getID() >= 0) {
                         index++;
                         this->lastIndex++;
                     }
+                    visibleElements++;
+                }
+            }
+            // after the loop lastIndex is the number of elements not the index of last element that's why -- is used.
+            lastIndex--;
+
+            // if last element has been displayed but there is still space for elements
+            if ((lastIndex == elementsCount - 1) && (visibleElements != pageSize) && (firstIndex != 0)) {
+
+                orientation = ORIENTATION_BOTTOM_UP;
+
+                // clear all elements in the list.
+                auto it = items.begin();
+                for (uint32_t i = 0; i < items.size(); i++) {
+                    ListItem *item = *it;
+                    removeWidget(item);
+                    delete item;
+                    std::advance(it, 1);
+                }
+                items.clear();
+
+                lastIndex  = elementsCount - 1;
+                firstIndex = lastIndex;
+                index      = lastIndex;
+                prevIndex  = -1;
+                for (int i = 0; i < pageSize; i++) {
+                    ListItem *item = provider->getItem(index, lastIndex, prevIndex, pageSize, pageSize - 1 - i, false);
+
+                    if (item != nullptr) {
+                        addWidget(item);
+                        items.push_back(item);
+
+                        prevIndex = index;
+                        if (item->getID() >= 0) {
+                            index--;
+                            firstIndex--;
+                        }
+                    }
                 }
             }
         }
-    }
+        else if (orientation == ORIENTATION_BOTTOM_UP) {
+            // index of requested item is incremented only if payload of returned item is not null
+            // if it's null it means that this is favourite label of label connected with showing Capital letters for
+            // surnames
+            int index = lastIndex, prevIndex = -1;
+            firstIndex = lastIndex;
+            for (int i = 0; i < pageSize; i++) {
+                ListItem *item = provider->getItem(index, lastIndex, prevIndex, pageSize, pageSize - 1 - i, false);
 
-    if (firstIndex < 0)
-        firstIndex = 0;
+                if (item != nullptr) {
+                    addWidget(item);
+                    items.push_back(item);
 
-    // calculate height of the item using list's height and pageSize
-    uint32_t itemWidth = widgetArea.w;
-    if (drawVerticalScroll)
-        itemWidth -= 10;
-
-    // substract pageSize for 1 pixel separators
-    int availableHeight = widgetArea.h - pageSize;
-    if (availableHeight < 0)
-        availableHeight = 0;
-    int itemHeight = availableHeight / pageSize;
-
-    int verticalPosition = 0;
-
-    if (orientation == ORIENTATION_BOTTOM_UP)
-        items.reverse();
-
-    auto it = items.begin();
-
-    for (unsigned int i = 0; i < items.size(); i++)
-    {
-        if (availableHeight > 0)
-        {
-
-            itemHeight = (*it)->minHeight;
-
-            (*it)->setPosition(0, verticalPosition);
-            verticalPosition += itemHeight + 1; // 1 for separator
-
-            (*it)->setSize(itemWidth, itemHeight);
-
-            // if list has focus and it is visible mark selected element
-            if (visible)
-            {
-                if ((*it)->getID() == selectedIndex)
-                    (*it)->setFocus(true);
+                    prevIndex = index;
+                    if (item->getID() >= 0) {
+                        index--;
+                        firstIndex--;
+                    }
+                    visibleElements++;
+                }
             }
 
-            availableHeight -= itemHeight;
+            firstIndex++;
+
+            // if last element has been displayed but there is still space for elements
+            if ((lastIndex != elementsCount - 1) && (visibleElements != pageSize) && (firstIndex == 0)) {
+
+                orientation = ORIENTATION_TOP_DOWN;
+
+                // clear all elements in the list.
+                auto it = items.begin();
+                for (uint32_t i = 0; i < items.size(); i++) {
+                    ListItem *item = *it;
+                    removeWidget(item);
+                    delete item;
+                    std::advance(it, 1);
+                }
+                items.clear();
+
+                int index = firstIndex, prevIndex = -1;
+                this->lastIndex = firstIndex;
+                for (int i = 0; i < pageSize; i++) {
+                    ListItem *item = provider->getItem(index, firstIndex, prevIndex, pageSize);
+
+                    if (item != nullptr) {
+                        addWidget(item);
+                        items.push_back(item);
+
+                        prevIndex = index;
+                        if (item->getID() >= 0) {
+                            index++;
+                            this->lastIndex++;
+                        }
+                    }
+                }
+            }
+        }
+
+        if (firstIndex < 0)
+            firstIndex = 0;
+
+        // calculate height of the item using list's height and pageSize
+        uint32_t itemWidth = widgetArea.w;
+        if (drawVerticalScroll)
+            itemWidth -= 10;
+
+        // substract pageSize for 1 pixel separators
+        int availableHeight = widgetArea.h - pageSize;
+        if (availableHeight < 0)
+            availableHeight = 0;
+        int itemHeight = availableHeight / pageSize;
+
+        int verticalPosition = 0;
+
+        if (orientation == ORIENTATION_BOTTOM_UP)
+            items.reverse();
+
+        auto it = items.begin();
+
+        for (unsigned int i = 0; i < items.size(); i++) {
+            if (availableHeight > 0) {
+
+                itemHeight = (*it)->minHeight;
+
+                (*it)->setPosition(0, verticalPosition);
+                verticalPosition += itemHeight + 1; // 1 for separator
+
+                (*it)->setSize(itemWidth, itemHeight);
+
+                // if list has focus and it is visible mark selected element
+                if (visible) {
+                    if ((*it)->getID() == selectedIndex)
+                        (*it)->setFocus(true);
+                }
+
+                availableHeight -= itemHeight;
+            }
+            std::advance(it, 1);
         }
-        std::advance(it, 1);
     }
-}
 
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/widgets/PhonebookListView.hpp b/module-apps/application-phonebook/widgets/PhonebookListView.hpp
index 1c0c6a95b..f6de73bca 100644
--- a/module-apps/application-phonebook/widgets/PhonebookListView.hpp
+++ b/module-apps/application-phonebook/widgets/PhonebookListView.hpp
@@ -15,27 +15,27 @@
 
 namespace gui
 {
-class PhonebookItem;
-class PhonebookListView : public ListView
-{
-    /**
-     * Pointer to application that owns the model
-     */
-    app::Application *application = nullptr;
+    class PhonebookItem;
+    class PhonebookListView : public ListView
+    {
+        /**
+         * Pointer to application that owns the model
+         */
+        app::Application *application = nullptr;
 
-  public:
-    PhonebookListView();
-    PhonebookListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h);
-    virtual ~PhonebookListView();
-    void setApplication(app::Application *app);
-    gui::PhonebookItem *getSelectedPhonebookItem();
+      public:
+        PhonebookListView();
+        PhonebookListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h);
+        virtual ~PhonebookListView();
+        void setApplication(app::Application *app);
+        gui::PhonebookItem *getSelectedPhonebookItem();
 
-    bool onInput(const InputEvent &inputEvent) override;
-    void updatePageItems() override;
+        bool onInput(const InputEvent &inputEvent) override;
+        void updatePageItems() override;
 
-    // onClick callback to register
-    std::function<bool(gui::PhonebookItem *item)> cb_ENTER = nullptr;
-};
+        // onClick callback to register
+        std::function<bool(gui::PhonebookItem *item)> cb_ENTER = nullptr;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/application-phonebook/windows/PhonebookContact.cpp b/module-apps/application-phonebook/windows/PhonebookContact.cpp
index fdb5ab417..2c4fc46a7 100644
--- a/module-apps/application-phonebook/windows/PhonebookContact.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookContact.cpp
@@ -30,11 +30,17 @@ namespace gui
         buildInterface();
     }
 
-    Label *PhonebookContact::addLabel(std::list<Item *> *parentPage, int x, int y, int w, int h, const std::string text = "",
-                                      const std::string fontName = style::window::font::small,
+    Label *PhonebookContact::addLabel(std::list<Item *> *parentPage,
+                                      int x,
+                                      int y,
+                                      int w,
+                                      int h,
+                                      const std::string text         = "",
+                                      const std::string fontName     = style::window::font::small,
                                       const RectangleEdgeFlags edges = RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
-                                      const Alignment alignment = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM),
-                                      const bool lineMode = false)
+                                      const Alignment alignment      = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT,
+                                                                            Alignment::ALIGN_VERTICAL_BOTTOM),
+                                      const bool lineMode            = false)
     {
         Label *l = new Label(this, x, y, w, h);
         l->setFilled(false);
@@ -63,35 +69,82 @@ namespace gui
         bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_call"));
         bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
 
-        favouritesIcon = new Image(this, 97, 107, 32, 32, "small_heart");
-        favouritesLabel = addLabel(nullptr, 65, 144, 89, 20, utils::localize.get("app_phonebook_contact_favourites_upper"), style::window::font::tinybold,
-                                   RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
+        favouritesIcon  = new Image(this, 97, 107, 32, 32, "small_heart");
+        favouritesLabel = addLabel(nullptr,
+                                   65,
+                                   144,
+                                   89,
+                                   20,
+                                   utils::localize.get("app_phonebook_contact_favourites_upper"),
+                                   style::window::font::tinybold,
+                                   RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                   Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
-        speedDial = addLabel(nullptr, 225, 107, 32, 32, "", style::footer::font::bold, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        speedDial = addLabel(nullptr,
+                             225,
+                             107,
+                             32,
+                             32,
+                             "",
+                             style::footer::font::bold,
+                             RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                              Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
-        speedDialLabel = addLabel(nullptr, 196, 144, 89, 20, utils::localize.get("app_phonebook_contact_speed_dial_upper"), style::window::font::tinybold,
-                                  RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
+        speedDialLabel = addLabel(nullptr,
+                                  196,
+                                  144,
+                                  89,
+                                  20,
+                                  utils::localize.get("app_phonebook_contact_speed_dial_upper"),
+                                  style::window::font::tinybold,
+                                  RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                  Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
-        blockedIcon = new Image(this, 351, 107, 32, 32, "small_circle");
-        blockedLabel = addLabel(nullptr, 329, 144, 75, 20, utils::localize.get("app_phonebook_contact_speed_blocked_uppper"), style::window::font::tinybold,
-                                RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
+        blockedIcon  = new Image(this, 351, 107, 32, 32, "small_circle");
+        blockedLabel = addLabel(nullptr,
+                                329,
+                                144,
+                                75,
+                                20,
+                                utils::localize.get("app_phonebook_contact_speed_blocked_uppper"),
+                                style::window::font::tinybold,
+                                RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
         // page1 contents
-        informationLabel =
-            addLabel(&page1, 30, 203, 413, 20, utils::localize.get("app_phonebook_contact_information"), style::window::font::small,
-                     RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM), true);
+        informationLabel = addLabel(&page1,
+                                    30,
+                                    203,
+                                    413,
+                                    20,
+                                    utils::localize.get("app_phonebook_contact_information"),
+                                    style::window::font::small,
+                                    RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                    Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM),
+                                    true);
 
         // first number line
-        numberPrimary = addLabel(&page1, 30, 249, 178, 33, "", style::window::font::bigbold, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        numberPrimary = addLabel(&page1,
+                                 30,
+                                 249,
+                                 178,
+                                 33,
+                                 "",
+                                 style::window::font::bigbold,
+                                 RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                                  Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
-        numberPrimaryLabel =
-            addLabel(&page1, 328, 237, 32, 53, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
-                     Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
+        numberPrimaryLabel                = addLabel(&page1,
+                                      328,
+                                      237,
+                                      32,
+                                      53,
+                                      "",
+                                      style::window::font::small,
+                                      RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
+                                      Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
         numberPrimaryLabel->inputCallback = [=](Item &item, const InputEvent &input) {
-            if (input.keyCode == KeyCode::KEY_ENTER && input.state == InputEvent::State::keyReleasedShort)
-            {
+            if (input.keyCode == KeyCode::KEY_ENTER && input.state == InputEvent::State::keyReleasedShort) {
                 return app::call(application, app::CallOperation::ExecuteCall, contact->numbers[0].numberE164);
             }
             LOG_DEBUG("numberPrimayLabel->inputCallback just return false");
@@ -105,16 +158,24 @@ namespace gui
         page1.push_back(numberPrimaryIcon);
 
         numberPrimaryMessageLabel =
-            addLabel(&page1, 401, 237, 32, 53, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
+            addLabel(&page1,
+                     401,
+                     237,
+                     32,
+                     53,
+                     "",
+                     style::window::font::small,
+                     RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
                      Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
         numberPrimaryMessageLabel->setPenFocusWidth(3);
         numberPrimaryMessageLabel->setPenWidth(0);
         numberPrimaryMessageLabel->inputCallback = [=](Item &item, const InputEvent &input) {
-            if (input.keyCode == KeyCode::KEY_ENTER)
-            {
+            if (input.keyCode == KeyCode::KEY_ENTER) {
                 LOG_DEBUG("numberPrimayLabel->inputCallback switch to sms window");
-                return sapm::ApplicationManager::messageSwitchApplication(application, app::name_messages, gui::name::window::thread_view,
+                return sapm::ApplicationManager::messageSwitchApplication(application,
+                                                                          app::name_messages,
+                                                                          gui::name::window::thread_view,
                                                                           std::make_unique<SMSSendRequest>(contact));
             }
             LOG_DEBUG("numberPrimaryMessageLabel->inputCallback just return false");
@@ -125,17 +186,30 @@ namespace gui
         page1.push_back(numberPrimaryMessage);
 
         // second number line
-        numberSecondary = addLabel(&page1, 30, 306, 178, 33, "", style::window::font::big, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        numberSecondary = addLabel(&page1,
+                                   30,
+                                   306,
+                                   178,
+                                   33,
+                                   "",
+                                   style::window::font::big,
+                                   RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                                    Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
         numberSecondaryLabel =
-            addLabel(&page1, 328, 297, 32, 53, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
+            addLabel(&page1,
+                     328,
+                     297,
+                     32,
+                     53,
+                     "",
+                     style::window::font::small,
+                     RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
                      Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
         numberSecondaryLabel->setPenFocusWidth(3);
         numberSecondaryLabel->setPenWidth(0);
         numberSecondaryLabel->inputCallback = [=](Item &item, const InputEvent &input) {
-            if (input.keyCode == KeyCode::KEY_ENTER)
-            {
+            if (input.keyCode == KeyCode::KEY_ENTER) {
                 return app::call(application, app::CallOperation::ExecuteCall, contact->numbers[1].numberE164);
             }
             return (false);
@@ -145,14 +219,22 @@ namespace gui
         page1.push_back(numberSecondaryIcon);
 
         numberSecondaryMessageLabel =
-            addLabel(&page1, 401, 297, 32, 53, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
+            addLabel(&page1,
+                     401,
+                     297,
+                     32,
+                     53,
+                     "",
+                     style::window::font::small,
+                     RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP,
                      Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
         numberSecondaryMessageLabel->setPenFocusWidth(3);
         numberSecondaryMessageLabel->setPenWidth(0);
         numberSecondaryMessageLabel->inputCallback = [=](Item &item, const InputEvent &input) {
-            if (input.keyCode == KeyCode::KEY_ENTER)
-            {
-                return sapm::ApplicationManager::messageSwitchApplication(application, app::name_messages, gui::name::window::thread_view,
+            if (input.keyCode == KeyCode::KEY_ENTER) {
+                return sapm::ApplicationManager::messageSwitchApplication(application,
+                                                                          app::name_messages,
+                                                                          gui::name::window::thread_view,
                                                                           std::make_unique<SMSSendRequest>(contact));
             }
             return (false);
@@ -160,21 +242,57 @@ namespace gui
 
         numberSecondaryMessage = new Image(this, 401, 306, 32, 32, "mail");
         page1.push_back(numberSecondaryMessage);
-        email = addLabel(&page1, 30, 363, 413, 33, "", style::window::font::big, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        email = addLabel(&page1,
+                         30,
+                         363,
+                         413,
+                         33,
+                         "",
+                         style::window::font::big,
+                         RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                          Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_CENTER));
 
-        addressLabel =
-            addLabel(&page1, 30, 429, 413, 20, utils::localize.get("app_phonebook_contact_address"), style::window::font::small,
-                     RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM), true);
+        addressLabel = addLabel(&page1,
+                                30,
+                                429,
+                                413,
+                                20,
+                                utils::localize.get("app_phonebook_contact_address"),
+                                style::window::font::small,
+                                RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM),
+                                true);
 
-        addressLine1 = addLabel(&page1, 30, 475, 422, 33, "", style::window::font::big, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        addressLine1 = addLabel(&page1,
+                                30,
+                                475,
+                                422,
+                                33,
+                                "",
+                                style::window::font::big,
+                                RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                                 Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_CENTER));
 
-        addressLine2 = addLabel(&page1, 30, 508, 422, 33, "", style::window::font::big, RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+        addressLine2 = addLabel(&page1,
+                                30,
+                                508,
+                                422,
+                                33,
+                                "",
+                                style::window::font::big,
+                                RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
                                 Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_CENTER));
 
-        noteLabel = addLabel(&page2, 30, 203, 413, 20, utils::localize.get("app_phonebook_contact_note"), style::window::font::small,
-                             RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES, Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM), true);
+        noteLabel = addLabel(&page2,
+                             30,
+                             203,
+                             413,
+                             20,
+                             utils::localize.get("app_phonebook_contact_note"),
+                             style::window::font::small,
+                             RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                             Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM),
+                             true);
 
         noteText = new Text(this, 30, 249, 422, 600 - 249 - bottomBar->getHeight());
         noteText->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
@@ -203,8 +321,7 @@ namespace gui
 
     void PhonebookContact::setVisible(std::list<Item *> *page, bool shouldBeVisible)
     {
-        for (auto i : *page)
-        {
+        for (auto i : *page) {
             i->setVisible(shouldBeVisible);
         }
     }
@@ -221,8 +338,7 @@ namespace gui
     }
 
     void PhonebookContact::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
     ContactRecord PhonebookContact::readContact()
     {
@@ -241,34 +357,28 @@ namespace gui
         if (contact && contact->primaryName.length() > 0 && contact->alternativeName.length() > 0)
             setTitle(contact->primaryName + " " + contact->alternativeName);
 
-        if (contact->speeddial >= 0 && contact->speeddial < 10)
-        {
+        if (contact->speeddial >= 0 && contact->speeddial < 10) {
             speedDial->setText(std::to_string(contact->speeddial));
         }
-        else
-        {
+        else {
             speedDial->setText(UTF8("-"));
         }
 
-        if (contact->isOnFavourites == false)
-        {
+        if (contact->isOnFavourites == false) {
             LOG_INFO("setContactData contact %s is not on fav list", contact->primaryName.c_str());
             favouritesIcon->setVisible(false);
             favouritesLabel->setVisible(false);
         }
-        else
-        {
+        else {
             LOG_INFO("setContactData contact %s is on fav list", contact->primaryName.c_str());
         }
 
-        if (contact->isOnBlacklist == false)
-        {
+        if (contact->isOnBlacklist == false) {
             blockedLabel->setVisible(false);
             blockedIcon->setVisible(false);
         }
 
-        if (contact->numbers.size() == 0)
-        {
+        if (contact->numbers.size() == 0) {
             numberPrimary->setVisible(false);
             numberPrimaryLabel->setVisible(false);
             numberPrimaryIcon->setVisible(false);
@@ -287,8 +397,7 @@ namespace gui
             addressLine2->setY(508 - 33);
         }
 
-        if (contact->numbers.size() == 1)
-        {
+        if (contact->numbers.size() == 1) {
             numberPrimary->setText(contact->numbers[0].numberE164);
 
             numberSecondary->setVisible(false);
@@ -308,8 +417,7 @@ namespace gui
             addressLine2->setY(508 - 33);
         }
 
-        if (contact->numbers.size() == 2)
-        {
+        if (contact->numbers.size() == 2) {
 
             numberPrimary->setText(contact->numbers[0].numberE164);
             numberSecondary->setText(contact->numbers[1].numberE164);
@@ -319,41 +427,35 @@ namespace gui
             addressLine2->setY(508);
         }
 
-        if (contact->mail.length() > 0)
-        {
+        if (contact->mail.length() > 0) {
             email->setText(contact->mail);
         }
-        else
-        {
+        else {
             email->setVisible(false);
         }
 
-        if (contact->street.length() > 0)
-        {
+        if (contact->street.length() > 0) {
             addressLine1->setText(contact->street);
         }
 
-        if (contact->city.length() > 0)
-        {
+        if (contact->city.length() > 0) {
             addressLine2->setText(contact->city);
         }
 
-        if (contact->note.length() > 0)
-        {
+        if (contact->note.length() > 0) {
             noteText->setText(contact->note);
         }
     }
 
     bool PhonebookContact::handleSwitchData(SwitchData *data)
     {
-        if (data == nullptr)
-        {
+        if (data == nullptr) {
             LOG_ERROR("Received null pointer");
             return false;
         }
 
         PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-        contact = item->getContact();
+        contact                 = item->getContact();
 
         setContactData();
 
@@ -362,9 +464,8 @@ namespace gui
 
     bool PhonebookContact::onInput(const InputEvent &inputEvent)
     {
-        if ((inputEvent.state != InputEvent::State::keyReleasedShort) && ((inputEvent.state != InputEvent::State::keyReleasedLong)) &&
-            inputEvent.keyCode == KeyCode::KEY_LF)
-        {
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort) &&
+            ((inputEvent.state != InputEvent::State::keyReleasedLong)) && inputEvent.keyCode == KeyCode::KEY_LF) {
             std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
             application->switchWindow("Options", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
             return (true);
diff --git a/module-apps/application-phonebook/windows/PhonebookContact.hpp b/module-apps/application-phonebook/windows/PhonebookContact.hpp
index 1cafa95c8..f9b046554 100644
--- a/module-apps/application-phonebook/windows/PhonebookContact.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookContact.hpp
@@ -33,8 +33,7 @@ static inline const std::string formatContactName(std::shared_ptr<ContactRecord>
 static inline void findAndReplaceAll(std::string &data, std::string toSearch, std::string replaceStr)
 {
     size_t pos = data.find(toSearch);
-    while (pos != std::string::npos)
-    {
+    while (pos != std::string::npos) {
         data.replace(pos, toSearch.size(), replaceStr);
         pos = data.find(toSearch, pos + replaceStr.size());
     }
@@ -65,36 +64,36 @@ namespace gui
       protected:
         /** labels */
         Label *informationLabel = nullptr;
-        Label *ifnormation = nullptr;
-        Label *addressLabel = nullptr;
-        Label *addressLine1 = nullptr;
-        Label *addressLine2 = nullptr;
-        Label *email = nullptr;
-        Label *numberPrimary = nullptr;
-        Label *numberSecondary = nullptr;
-        Label *favouritesLabel = nullptr;
-        Label *speeddialLabel = nullptr;
-        Label *blockedLabel = nullptr;
-        Label *speedDialLabel = nullptr;
-        Label *speedDial = nullptr;
-        Label *noteLabel = nullptr;
-        Text *noteText = nullptr;
+        Label *ifnormation      = nullptr;
+        Label *addressLabel     = nullptr;
+        Label *addressLine1     = nullptr;
+        Label *addressLine2     = nullptr;
+        Label *email            = nullptr;
+        Label *numberPrimary    = nullptr;
+        Label *numberSecondary  = nullptr;
+        Label *favouritesLabel  = nullptr;
+        Label *speeddialLabel   = nullptr;
+        Label *blockedLabel     = nullptr;
+        Label *speedDialLabel   = nullptr;
+        Label *speedDial        = nullptr;
+        Label *noteLabel        = nullptr;
+        Text *noteText          = nullptr;
 
         /** icons */
         Image *favouritesIcon = nullptr;
-        Image *blockedIcon = nullptr;
+        Image *blockedIcon    = nullptr;
 
         Label *numberPrimaryLabel = nullptr;
-        Image *numberPrimaryIcon = nullptr;
+        Image *numberPrimaryIcon  = nullptr;
 
         Label *numberPrimaryMessageLabel = nullptr;
-        Image *numberPrimaryMessage = nullptr;
+        Image *numberPrimaryMessage      = nullptr;
 
         Label *numberSecondaryLabel = nullptr;
-        Image *numberSecondaryIcon = nullptr;
+        Image *numberSecondaryIcon  = nullptr;
 
         Label *numberSecondaryMessageLabel = nullptr;
-        Image *numberSecondaryMessage = nullptr;
+        Image *numberSecondaryMessage      = nullptr;
 
         ContactRecord readContact();
 
@@ -118,7 +117,15 @@ namespace gui
         void buildInterface() override;
         void destroyInterface() override;
         void setContactData();
-        Label *addLabel(std::list<Item *> *parentPage, int x, int y, int w, int h, const std::string text, const std::string fontName,
-                        const RectangleEdgeFlags edges, const Alignment alignment, const bool lineMode);
+        Label *addLabel(std::list<Item *> *parentPage,
+                        int x,
+                        int y,
+                        int w,
+                        int h,
+                        const std::string text,
+                        const std::string fontName,
+                        const RectangleEdgeFlags edges,
+                        const Alignment alignment,
+                        const bool lineMode);
     };
 } // namespace gui
\ No newline at end of file
diff --git a/module-apps/application-phonebook/windows/PhonebookDialogs.cpp b/module-apps/application-phonebook/windows/PhonebookDialogs.cpp
index 1ee45cdbd..07dac6c18 100644
--- a/module-apps/application-phonebook/windows/PhonebookDialogs.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookDialogs.cpp
@@ -77,7 +77,7 @@ bool PhonebookDialog::handleSwitchData(SwitchData *data)
         return false;
 
     PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-    contact = item->getContact();
+    contact                 = item->getContact();
 
     setContactData();
 
@@ -86,8 +86,7 @@ bool PhonebookDialog::handleSwitchData(SwitchData *data)
 
 bool PhonebookDialog::onInput(const InputEvent &inputEvent)
 {
-    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort))
-    {
+    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort)) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
         application->switchWindow("Options", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         contact = nullptr;
@@ -103,9 +102,8 @@ void PhonebookDeleteContact::onBeforeShow(ShowMode mode, SwitchData *data)
     icon = new Image(this, 176, 135, 128, 128, "phonebook_contact_delete_trashcan");
 
     noLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
             std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
             application->switchWindow("Options", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
             return (true);
@@ -114,16 +112,13 @@ void PhonebookDeleteContact::onBeforeShow(ShowMode mode, SwitchData *data)
     };
 
     yesLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
 
-            if (DBServiceAPI::ContactRemove(application, contact->dbID))
-            {
+            if (DBServiceAPI::ContactRemove(application, contact->dbID)) {
                 LOG_INFO("contact %d removed, switch to MainWindow", contact->dbID);
             }
-            else
-            {
+            else {
                 LOG_ERROR("failed to delete contact with id %d", contact->dbID);
             }
 
@@ -147,15 +142,12 @@ void PhonebookBlockContact::onBeforeShow(ShowMode mode, SwitchData *data)
     confirmationLabel->setText(utils::localize.get("app_phonebook_options_block_confirm"));
 
     noLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
-            if (DBServiceAPI::ContactBlock(application, contact->dbID, false))
-            {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
+            if (DBServiceAPI::ContactBlock(application, contact->dbID, false)) {
                 LOG_INFO("contact %d unblocked, switch to MainWindow", contact->dbID);
             }
-            else
-            {
+            else {
                 LOG_ERROR("failed to unblock contact with id %d", contact->dbID);
             }
 
@@ -167,15 +159,12 @@ void PhonebookBlockContact::onBeforeShow(ShowMode mode, SwitchData *data)
     };
 
     yesLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
-            if (DBServiceAPI::ContactBlock(application, contact->dbID, true))
-            {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
+            if (DBServiceAPI::ContactBlock(application, contact->dbID, true)) {
                 LOG_INFO("contact %d blocked, switch to MainWindow", contact->dbID);
             }
-            else
-            {
+            else {
                 LOG_ERROR("failed to block contact with id %d", contact->dbID);
             }
 
@@ -193,38 +182,36 @@ void PhonebookBlockContact::setContactData()
 }
 
 DuplicatedContactDialogWindow::DuplicatedContactDialogWindow(app::Application *app)
-    : Dialog(app, gui::window::name::duplicatedContact,
+    : Dialog(app,
+             gui::window::name::duplicatedContact,
              {
-                 .title = "",
-                 .icon = "phonebook_info",
-                 .text = utils::localize.get("app_phonebook_duplicate_speed_dial"),
+                 .title  = "",
+                 .icon   = "phonebook_info",
+                 .text   = utils::localize.get("app_phonebook_duplicate_speed_dial"),
                  .action = []() -> bool {
                      LOG_INFO("!");
                      return true;
                  },
              })
-{
-}
+{}
 
 bool DuplicatedContactDialogWindow::handleSwitchData(SwitchData *data)
 {
-    if (data == nullptr)
-    {
+    if (data == nullptr) {
         return false;
     }
 
     PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-    if (item != nullptr)
-    {
+    if (item != nullptr) {
         auto record = item->getContact();
 
-        auto meta = this->meta;
+        auto meta   = this->meta;
         meta.action = [=]() -> bool {
             application->switchWindow(gui::window::name::newContact, std::make_unique<PhonebookItemData>(record));
             return true;
         };
         meta.title = item->text;
-        meta.text = updateText(meta.text, *record);
+        meta.text  = updateText(meta.text, *record);
         this->update(meta);
         application->switchWindow(gui::window::name::duplicatedContact, nullptr);
         return true;
@@ -256,9 +243,8 @@ void PhonebookDuplicateSpeedDial::onBeforeShow(ShowMode mode, SwitchData *data)
     dialValue->setAlignement(Alignment(Alignment::ALIGN_HORIZONTAL_CENTER, Alignment::ALIGN_VERTICAL_CENTER));
 
     noLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
             std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
             application->switchWindow(gui::window::name::newContact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         }
@@ -266,17 +252,13 @@ void PhonebookDuplicateSpeedDial::onBeforeShow(ShowMode mode, SwitchData *data)
     };
 
     yesLabel->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
-            if (contact != nullptr)
-            {
-                if (DBServiceAPI::ContactUpdate(application, *contact) == false)
-                {
+        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) && ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                                                           (inputEvent.state == InputEvent::State::keyReleasedLong))) {
+            if (contact != nullptr) {
+                if (DBServiceAPI::ContactUpdate(application, *contact) == false) {
                     LOG_ERROR("can't update contact %s", contact->primaryName.c_str());
                 }
-                else
-                {
+                else {
                     LOG_INFO("Contact %s updated", contact->primaryName.c_str());
                 }
             }
diff --git a/module-apps/application-phonebook/windows/PhonebookDialogs.hpp b/module-apps/application-phonebook/windows/PhonebookDialogs.hpp
index 3fe1b81e2..87c44809f 100644
--- a/module-apps/application-phonebook/windows/PhonebookDialogs.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookDialogs.hpp
@@ -41,10 +41,10 @@ class PhonebookDialog : public AppWindow
     virtual void setContactData() = 0;
 
   protected:
-    Text *confirmationLabel = nullptr;
-    Label *noLabel = nullptr;
-    Label *yesLabel = nullptr;
-    Image *icon = nullptr;
+    Text *confirmationLabel                = nullptr;
+    Label *noLabel                         = nullptr;
+    Label *yesLabel                        = nullptr;
+    Image *icon                            = nullptr;
     std::shared_ptr<ContactRecord> contact = nullptr;
 };
 
@@ -75,8 +75,7 @@ class PhonebookBlockContact : public PhonebookDialog
 {
   public:
     PhonebookBlockContact(app::Application *app) : PhonebookDialog(app, "Block")
-    {
-    }
+    {}
     virtual ~PhonebookBlockContact() = default;
     void onBeforeShow(ShowMode mode, SwitchData *data);
     void setContactData();
@@ -100,8 +99,7 @@ class PhonebookDuplicateSpeedDial : public PhonebookDialog
 
   public:
     PhonebookDuplicateSpeedDial(app::Application *app) : PhonebookDialog(app, "SpeedDialAlreadyAssigned")
-    {
-    }
+    {}
     virtual ~PhonebookDuplicateSpeedDial() = default;
     void onBeforeShow(ShowMode mode, SwitchData *data);
     void setContactData();
diff --git a/module-apps/application-phonebook/windows/PhonebookErrors.cpp b/module-apps/application-phonebook/windows/PhonebookErrors.cpp
index bd5f66fcd..4ed418fb1 100644
--- a/module-apps/application-phonebook/windows/PhonebookErrors.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookErrors.cpp
@@ -11,9 +11,17 @@
 
 using namespace ErrorWindows;
 
-static Label *addLabel(gui::Item *parentPage, int x, int y, int w, int h, const std::string text = "", const std::string fontName = style::window::font::small,
+static Label *addLabel(gui::Item *parentPage,
+                       int x,
+                       int y,
+                       int w,
+                       int h,
+                       const std::string text         = "",
+                       const std::string fontName     = style::window::font::small,
                        const RectangleEdgeFlags edges = RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
-                       const Alignment alignment = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM), const bool lineMode = false)
+                       const Alignment alignment      = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT,
+                                                             Alignment::ALIGN_VERTICAL_BOTTOM),
+                       const bool lineMode            = false)
 {
     Label *l = new Label(parentPage, x, y, w, h);
     l->setFilled(false);
@@ -32,8 +40,7 @@ NoResults::NoResults(app::Application *app) : AppWindow(app, "NoResults")
 }
 
 NoResults::~NoResults()
-{
-}
+{}
 
 void NoResults::buildInterface()
 {
@@ -46,7 +53,8 @@ void NoResults::buildInterface()
 
     bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
 
-    topSeparatorLabel = addLabel(this, 0, 104, style::window_width, 1, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+    topSeparatorLabel = addLabel(
+        this, 0, 104, style::window_width, 1, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
 
     informationLabel = new Text(this, 45, 315, 390, 90);
     informationLabel->setText(utils::localize.get("app_phonebook_search_no_results"));
@@ -60,8 +68,7 @@ void NoResults::buildInterface()
 }
 
 void NoResults::rebuild()
-{
-}
+{}
 
 void NoResults::destroyInterface()
 {
@@ -70,14 +77,13 @@ void NoResults::destroyInterface()
 
 bool NoResults::handleSwitchData(SwitchData *data)
 {
-    if (data == nullptr)
-    {
+    if (data == nullptr) {
         LOG_ERROR("Received null pointer");
         return false;
     }
 
     PhonebookSearchQuery *item = dynamic_cast<PhonebookSearchQuery *>(data);
-    searchQuery = item->getQuery();
+    searchQuery                = item->getQuery();
 
     setContactData();
 
@@ -86,13 +92,13 @@ bool NoResults::handleSwitchData(SwitchData *data)
 
 void NoResults::setContactData()
 {
-    setTitle(utils::localize.get("app_phonebook_search_results").c_str() + std::string(":\"") + searchQuery.c_str() + std::string("\""));
+    setTitle(utils::localize.get("app_phonebook_search_results").c_str() + std::string(":\"") + searchQuery.c_str() +
+             std::string("\""));
 }
 
 bool NoResults::onInput(const InputEvent &inputEvent)
 {
-    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort))
-    {
+    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort)) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookSearchQuery>(searchQuery);
         application->switchWindow("Search", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         return (true);
@@ -110,8 +116,7 @@ ContactBlocked::ContactBlocked(app::Application *app) : AppWindow(app, "NoResult
 }
 
 ContactBlocked::~ContactBlocked()
-{
-}
+{}
 
 void ContactBlocked::buildInterface()
 {
@@ -123,7 +128,8 @@ void ContactBlocked::buildInterface()
     bottomBar->setActive(BottomBar::Side::RIGHT, true);
 
     bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
-    topSeparatorLabel = addLabel(this, 0, 104, style::window_width, 1, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+    topSeparatorLabel = addLabel(
+        this, 0, 104, style::window_width, 1, "", style::window::font::small, RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
 
     informationLabel = new Text(this, 45, 315, 390, 90);
     informationLabel->setText(utils::localize.get("app_phonebook_search_no_results"));
@@ -149,14 +155,13 @@ void ContactBlocked::destroyInterface()
 
 bool ContactBlocked::handleSwitchData(SwitchData *data)
 {
-    if (data == nullptr)
-    {
+    if (data == nullptr) {
         LOG_ERROR("Received null pointer");
         return false;
     }
 
     PhonebookSearchQuery *item = dynamic_cast<PhonebookSearchQuery *>(data);
-    searchQuery = item->getQuery();
+    searchQuery                = item->getQuery();
 
     setContactData();
 
@@ -165,13 +170,13 @@ bool ContactBlocked::handleSwitchData(SwitchData *data)
 
 void ContactBlocked::setContactData()
 {
-    setTitle(utils::localize.get("app_phonebook_search_results").c_str() + std::string(":\"") + searchQuery.c_str() + std::string("\""));
+    setTitle(utils::localize.get("app_phonebook_search_results").c_str() + std::string(":\"") + searchQuery.c_str() +
+             std::string("\""));
 }
 
 bool ContactBlocked::onInput(const InputEvent &inputEvent)
 {
-    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort))
-    {
+    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort)) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookSearchQuery>(searchQuery);
         application->switchWindow("Search", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         return (true);
diff --git a/module-apps/application-phonebook/windows/PhonebookErrors.hpp b/module-apps/application-phonebook/windows/PhonebookErrors.hpp
index 647eac313..549d0266a 100644
--- a/module-apps/application-phonebook/windows/PhonebookErrors.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookErrors.hpp
@@ -16,47 +16,47 @@ using namespace gui;
 namespace ErrorWindows
 {
 
-class NoResults : public AppWindow
-{
-  protected:
-    /** labels */
-    Label *topSeparatorLabel = nullptr;
-    Text *informationLabel = nullptr;
-    Image *searchCenter;
-    std::string searchQuery;
+    class NoResults : public AppWindow
+    {
+      protected:
+        /** labels */
+        Label *topSeparatorLabel = nullptr;
+        Text *informationLabel   = nullptr;
+        Image *searchCenter;
+        std::string searchQuery;
 
-  public:
-    NoResults(app::Application *app);
-    virtual ~NoResults();
-    bool onInput(const InputEvent &inputEvent) override;
-    bool handleSwitchData(SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
+      public:
+        NoResults(app::Application *app);
+        virtual ~NoResults();
+        bool onInput(const InputEvent &inputEvent) override;
+        bool handleSwitchData(SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
 
-  private:
-    void setContactData();
-};
+      private:
+        void setContactData();
+    };
 
-class ContactBlocked : public AppWindow
-{
-  protected:
-    /** labels */
-    Label *topSeparatorLabel = nullptr;
-    Text *informationLabel = nullptr;
-    Image *searchCenter;
-    std::string searchQuery;
+    class ContactBlocked : public AppWindow
+    {
+      protected:
+        /** labels */
+        Label *topSeparatorLabel = nullptr;
+        Text *informationLabel   = nullptr;
+        Image *searchCenter;
+        std::string searchQuery;
 
-  public:
-    ContactBlocked(app::Application *app);
-    virtual ~ContactBlocked();
-    bool onInput(const InputEvent &inputEvent) override;
-    bool handleSwitchData(SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
+      public:
+        ContactBlocked(app::Application *app);
+        virtual ~ContactBlocked();
+        bool onInput(const InputEvent &inputEvent) override;
+        bool handleSwitchData(SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
 
-  private:
-    void setContactData();
-};
+      private:
+        void setContactData();
+    };
 }; // namespace ErrorWindows
diff --git a/module-apps/application-phonebook/windows/PhonebookMainWindow.cpp b/module-apps/application-phonebook/windows/PhonebookMainWindow.cpp
index 147df7bc2..568585dea 100644
--- a/module-apps/application-phonebook/windows/PhonebookMainWindow.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookMainWindow.cpp
@@ -17,122 +17,121 @@
 namespace gui
 {
 
-    PhonebookMainWindow::PhonebookMainWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window), phonebookModel{new PhonebookModel(app)}
+    PhonebookMainWindow::PhonebookMainWindow(app::Application *app)
+        : AppWindow(app, gui::name::window::main_window), phonebookModel{new PhonebookModel(app)}
     {
         buildInterface();
-}
-
-void PhonebookMainWindow::rebuild()
-{
-    destroyInterface();
-    buildInterface();
-}
-
-void PhonebookMainWindow::buildInterface()
-{
-    AppWindow::buildInterface();
-
-    list = new gui::PhonebookListView(this, 11, 105, 480 - 22, 600 - 105 - 50);
-    list->setMaxElements(7);
-    list->setPageSize(7);
-    list->setPenFocusWidth(0);
-    list->setPenWidth(0);
-    list->setProvider(phonebookModel);
-    list->setApplication(application);
-
-    bottomBar->setActive(BottomBar::Side::LEFT, true);
-    bottomBar->setActive(BottomBar::Side::CENTER, true);
-    bottomBar->setActive(BottomBar::Side::RIGHT, true);
-    bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_phonebook_call"));
-    bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_open"));
-    bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
-
-    topBar->setActive(TopBar::Elements::TIME, true);
-
-    setTitle(utils::localize.get("app_phonebook_title_main"));
-
-    leftArrowImage = new gui::Image(this, 30, 62, 0, 0, "arrow_left");
-    rightArrowImage = new gui::Image(this, 480 - 30 - 13, 62, 0, 0, "arrow_right");
-    newContactImage = new gui::Image(this, 48, 55, 0, 0, "cross");
-    searchImage = new gui::Image(this, 480 - 48 - 26, 55, 0, 0, "search");
-}
-
-void PhonebookMainWindow::destroyInterface()
-{
-    AppWindow::destroyInterface();
-
-    removeWidget(list);
-    delete list;
-    list = nullptr;
-
-    removeWidget(leftArrowImage);
-    delete leftArrowImage;
-    leftArrowImage = nullptr;
-
-    removeWidget(rightArrowImage);
-    delete rightArrowImage;
-    rightArrowImage = nullptr;
-
-    removeWidget(newContactImage);
-    delete newContactImage;
-    newContactImage = nullptr;
-
-    removeWidget(searchImage);
-    delete searchImage;
-    searchImage = nullptr;
-
-    children.clear();
-    delete phonebookModel;
-}
-
-PhonebookMainWindow::~PhonebookMainWindow()
-{
-    destroyInterface();
-}
-
-void PhonebookMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
-{
-    LOG_INFO("onBeforeShow");
-    setFocusItem(list);
-
-    phonebookModel->clear();
-    phonebookModel->requestRecordsCount();
-
-    list->clear();
-    list->setElementsCount(phonebookModel->getItemCount());
-}
-
-bool PhonebookMainWindow::onInput(const InputEvent &inputEvent)
-{
-    // process only if key is released
-    if (inputEvent.state == InputEvent::State::keyReleasedShort)
-    {
-        switch (inputEvent.keyCode)
-        {
-        case KeyCode::KEY_LEFT: {
-            std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>();
-            application->switchWindow(gui::window::name::newContact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-        }
-            return true;
-        case KeyCode::KEY_RIGHT:
-            application->switchWindow("Search");
-            return true;
-        default:
-            break;
-        }
     }
 
-    // check if any of the lower inheritance onInput methods catch the event
-    return AppWindow::onInput(inputEvent);
-}
+    void PhonebookMainWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
 
-bool PhonebookMainWindow::onDatabaseMessage(sys::Message *msgl)
-{
-    DBContactResponseMessage *msg = reinterpret_cast<DBContactResponseMessage *>(msgl);
-    if (phonebookModel->updateRecords(std::move(msg->records), msg->offset, msg->limit, msg->count, msg->favourite))
-        return true;
+    void PhonebookMainWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-    return false;
-}
+        list = new gui::PhonebookListView(this, 11, 105, 480 - 22, 600 - 105 - 50);
+        list->setMaxElements(7);
+        list->setPageSize(7);
+        list->setPenFocusWidth(0);
+        list->setPenWidth(0);
+        list->setProvider(phonebookModel);
+        list->setApplication(application);
+
+        bottomBar->setActive(BottomBar::Side::LEFT, true);
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_phonebook_call"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_open"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
+
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        setTitle(utils::localize.get("app_phonebook_title_main"));
+
+        leftArrowImage  = new gui::Image(this, 30, 62, 0, 0, "arrow_left");
+        rightArrowImage = new gui::Image(this, 480 - 30 - 13, 62, 0, 0, "arrow_right");
+        newContactImage = new gui::Image(this, 48, 55, 0, 0, "cross");
+        searchImage     = new gui::Image(this, 480 - 48 - 26, 55, 0, 0, "search");
+    }
+
+    void PhonebookMainWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+
+        removeWidget(list);
+        delete list;
+        list = nullptr;
+
+        removeWidget(leftArrowImage);
+        delete leftArrowImage;
+        leftArrowImage = nullptr;
+
+        removeWidget(rightArrowImage);
+        delete rightArrowImage;
+        rightArrowImage = nullptr;
+
+        removeWidget(newContactImage);
+        delete newContactImage;
+        newContactImage = nullptr;
+
+        removeWidget(searchImage);
+        delete searchImage;
+        searchImage = nullptr;
+
+        children.clear();
+        delete phonebookModel;
+    }
+
+    PhonebookMainWindow::~PhonebookMainWindow()
+    {
+        destroyInterface();
+    }
+
+    void PhonebookMainWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        LOG_INFO("onBeforeShow");
+        setFocusItem(list);
+
+        phonebookModel->clear();
+        phonebookModel->requestRecordsCount();
+
+        list->clear();
+        list->setElementsCount(phonebookModel->getItemCount());
+    }
+
+    bool PhonebookMainWindow::onInput(const InputEvent &inputEvent)
+    {
+        // process only if key is released
+        if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+            switch (inputEvent.keyCode) {
+            case KeyCode::KEY_LEFT: {
+                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>();
+                application->switchWindow(gui::window::name::newContact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+            }
+                return true;
+            case KeyCode::KEY_RIGHT:
+                application->switchWindow("Search");
+                return true;
+            default:
+                break;
+            }
+        }
+
+        // check if any of the lower inheritance onInput methods catch the event
+        return AppWindow::onInput(inputEvent);
+    }
+
+    bool PhonebookMainWindow::onDatabaseMessage(sys::Message *msgl)
+    {
+        DBContactResponseMessage *msg = reinterpret_cast<DBContactResponseMessage *>(msgl);
+        if (phonebookModel->updateRecords(std::move(msg->records), msg->offset, msg->limit, msg->count, msg->favourite))
+            return true;
+
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookMainWindow.hpp b/module-apps/application-phonebook/windows/PhonebookMainWindow.hpp
index 08f03ff83..1a4148e4f 100644
--- a/module-apps/application-phonebook/windows/PhonebookMainWindow.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookMainWindow.hpp
@@ -14,29 +14,29 @@
 namespace gui
 {
 
-class PhonebookMainWindow : public AppWindow
-{
-  protected:
-    PhonebookListView *list;
-    PhonebookModel *phonebookModel = nullptr;
+    class PhonebookMainWindow : public AppWindow
+    {
+      protected:
+        PhonebookListView *list;
+        PhonebookModel *phonebookModel = nullptr;
 
-    Image *leftArrowImage = nullptr;
-    Image *rightArrowImage = nullptr;
-    Image *newContactImage = nullptr;
-    Image *searchImage = nullptr;
+        Image *leftArrowImage  = nullptr;
+        Image *rightArrowImage = nullptr;
+        Image *newContactImage = nullptr;
+        Image *searchImage     = nullptr;
 
-  public:
-    PhonebookMainWindow(app::Application *app);
-    virtual ~PhonebookMainWindow();
+      public:
+        PhonebookMainWindow(app::Application *app);
+        virtual ~PhonebookMainWindow();
 
-    // virtual methods
-    bool onInput(const InputEvent &inputEvent) override;
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    bool onDatabaseMessage(sys::Message *msgl) override;
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool onDatabaseMessage(sys::Message *msgl) override;
 
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookNewContact.cpp b/module-apps/application-phonebook/windows/PhonebookNewContact.cpp
index 64bc49e4d..8cf983efa 100644
--- a/module-apps/application-phonebook/windows/PhonebookNewContact.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookNewContact.cpp
@@ -20,622 +20,567 @@ namespace gui
     PhonebookNewContact::PhonebookNewContact(app::Application *app) : AppWindow(app, window::name::newContact)
     {
         buildInterface();
-}
-
-void PhonebookNewContact::rebuild()
-{
-    destroyInterface();
-    buildInterface();
-}
-
-void PhonebookNewContact::buildInterface()
-{
-    AppWindow::buildInterface();
-
-    bottomBar->setActive(BottomBar::Side::LEFT, false);
-    bottomBar->setActive(BottomBar::Side::CENTER, false);
-    bottomBar->setActive(BottomBar::Side::RIGHT, true);
-    bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_save"));
-    bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
-
-    topBar->setActive(TopBar::Elements::TIME, true);
-
-    title = new gui::Label(this, 0, 50, 480, 54);
-    title->setFilled(false);
-    title->setBorderColor(gui::ColorFullBlack);
-    title->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-    title->setMargins(Margins(0, 0, 0, 18));
-    title->setFont(style::window::font::small);
-    if (contact)
-    {
-        title->setText(utils::localize.get("app_phonebook_contact_edit"));
-    }
-    else
-    {
-        title->setText(utils::localize.get("app_phonebook_contact_title"));
-    }
-    title->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-
-    // page 1 labels and text
-    for (uint32_t i = 0; i < 5; i++)
-    {
-
-        page1.labels[i] = new gui::Label(this, 30, 114 + 87 * i, 450, 35);
-        page1.labels[i]->setFilled(false);
-        page1.labels[i]->setBorderColor(gui::ColorFullBlack);
-        page1.labels[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-        page1.labels[i]->setFont(style::window::font::small);
-        if (i == 0)
-            page1.labels[i]->setFont(style::footer::font::bold);
-
-        page1.labels[i]->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-
-        page1.text[i] = new gui::Text(this, 30, 157 + 87 * i, 420, 42);
-        page1.text[i]->setFilled(false);
-        page1.text[i]->setPenFocusWidth(2);
-        page1.text[i]->setPenWidth(1);
-        page1.text[i]->setBorderColor(gui::ColorFullBlack);
-        page1.text[i]->setUnderline(true);
-        page1.text[i]->setTextType(Text::TextType::SINGLE_LINE);
-        page1.text[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-        page1.text[i]->setFont(style::window::font::small);
-        page1.text[i]->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
-
-        if ((i == 2) || (i == 3))
-        {
-            page1.text[i]->focusChangedCallback = [=](gui::Item &item) {
-                if (item.focus)
-                {
-                    page1.text[i]->setFont(style::window::font::bigbold);
-                }
-                else
-                {
-                    page1.text[i]->setFont(style::window::font::small);
-                }
-                return true;
-            };
-        }
-        else
-        {
-            page1.text[i]->focusChangedCallback = [=](gui::Item &item) {
-                if (item.focus)
-                {
-                    page1.text[i]->setFont(style::window::font::bigbold);
-                }
-                else
-                {
-                    page1.text[i]->setFont(style::window::font::small);
-                }
-                return true;
-            };
-
-            page1.text[i]->contentCallback = [=](gui::Item &item) { return true; };
-        }
-
-        page1.text[i]->setTextType(gui::Text::TextType::SINGLE_LINE);
-        page1.text[i]->setEditMode(gui::Text::EditMode::EDIT);
     }
 
-    page1.text[2]->setInputMode(new InputMode({InputMode::digit}));
-    page1.text[3]->setInputMode(new InputMode({InputMode::digit}));
-
-    // set navigation for page 1
-    for (uint32_t i = 0; i < 4; i++)
+    void PhonebookNewContact::rebuild()
     {
-        page1.text[i]->setNavigationItem(NavigationDirection::DOWN, page1.text[i + 1]);
-        page1.text[i + 1]->setNavigationItem(NavigationDirection::UP, page1.text[i]);
+        destroyInterface();
+        buildInterface();
     }
-    page1.text[4]->setNavigationItem(NavigationDirection::UP, page1.text[3]);
 
-    page1.labels[0]->setText(utils::localize.get("app_phonebook_new_contact_first_name"));
-    page1.labels[1]->setText(utils::localize.get("app_phonebook_new_contact_second_name"));
-    page1.labels[2]->setText(utils::localize.get("app_phonebook_new_contact_number_1"));
-    page1.labels[3]->setText(utils::localize.get("app_phonebook_new_contact_number_2"));
-    page1.labels[4]->setText(utils::localize.get("app_phonebook_new_contact_email"));
+    void PhonebookNewContact::buildInterface()
+    {
+        AppWindow::buildInterface();
 
-    // page2
-    page2.speedValue = new gui::Label(this, 30, 105, 56, 47);
-    page2.speedValue->setFilled(false);
-    page2.speedValue->setBorderColor(gui::ColorFullBlack);
-    page2.speedValue->setPenFocusWidth(3);
-    page2.speedValue->setPenWidth(1);
-    page2.speedValue->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-    page2.speedValue->setFont(style::window::font::small);
-    page2.speedValue->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        bottomBar->setActive(BottomBar::Side::LEFT, false);
+        bottomBar->setActive(BottomBar::Side::CENTER, false);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_save"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
 
-    page2.speedValue->focusChangedCallback = [=](gui::Item &item) { return true; };
+        topBar->setActive(TopBar::Elements::TIME, true);
 
-    page2.speedValue->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        int val = gui::toNumeric(inputEvent.keyCode);
-        if ((val >= 0) && (val < 9))
-        {
-            page2.speedValue->setText(std::to_string(val));
-            return true;
+        title = new gui::Label(this, 0, 50, 480, 54);
+        title->setFilled(false);
+        title->setBorderColor(gui::ColorFullBlack);
+        title->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        title->setMargins(Margins(0, 0, 0, 18));
+        title->setFont(style::window::font::small);
+        if (contact) {
+            title->setText(utils::localize.get("app_phonebook_contact_edit"));
         }
-        return false;
-    };
-
-    page2.speedDescription = new gui::Label(this, 100, 105, 330, 47);
-    page2.speedDescription->setFilled(false);
-    page2.speedDescription->setBorderColor(gui::ColorFullBlack);
-    page2.speedDescription->setPenFocusWidth(0);
-    page2.speedDescription->setPenWidth(0);
-    page2.speedDescription->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    page2.speedDescription->setFont(style::window::font::small);
-    page2.speedDescription->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-
-    page2.imageSpeed = new gui::Image(this, 416, 122, 0, 0, "small_circle");
-
-    page2.favValue = new gui::Label(this, 30, 161, 56, 47);
-    page2.favValue->setFilled(false);
-    page2.favValue->setBorderColor(gui::ColorFullBlack);
-    page2.favValue->setPenFocusWidth(3);
-    page2.favValue->setPenWidth(1);
-    page2.favValue->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-    page2.favValue->setFont(style::window::font::small);
-    page2.favValue->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-
-    page2.favValue->focusChangedCallback = [=](gui::Item &item) {
-        if (item.focus)
-        {
-            bottomBar->setText(BottomBar::Side::CENTER, "SELECT");
+        else {
+            title->setText(utils::localize.get("app_phonebook_contact_title"));
         }
-        else
-        {
-            bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_save"));
-        }
-        return true;
-    };
+        title->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
 
-    page2.favValue->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
-        if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
-            ((inputEvent.state == InputEvent::State::keyReleasedShort) || (inputEvent.state == InputEvent::State::keyReleasedLong)))
-        {
-            if (page2.favSelected)
-            {
-                page2.imageTick->setVisible(false);
-                page2.favSelected = false;
-                LOG_INFO("Removed from favourites");
+        // page 1 labels and text
+        for (uint32_t i = 0; i < 5; i++) {
+
+            page1.labels[i] = new gui::Label(this, 30, 114 + 87 * i, 450, 35);
+            page1.labels[i]->setFilled(false);
+            page1.labels[i]->setBorderColor(gui::ColorFullBlack);
+            page1.labels[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+            page1.labels[i]->setFont(style::window::font::small);
+            if (i == 0)
+                page1.labels[i]->setFont(style::footer::font::bold);
+
+            page1.labels[i]->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+
+            page1.text[i] = new gui::Text(this, 30, 157 + 87 * i, 420, 42);
+            page1.text[i]->setFilled(false);
+            page1.text[i]->setPenFocusWidth(2);
+            page1.text[i]->setPenWidth(1);
+            page1.text[i]->setBorderColor(gui::ColorFullBlack);
+            page1.text[i]->setUnderline(true);
+            page1.text[i]->setTextType(Text::TextType::SINGLE_LINE);
+            page1.text[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+            page1.text[i]->setFont(style::window::font::small);
+            page1.text[i]->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
+
+            if ((i == 2) || (i == 3)) {
+                page1.text[i]->focusChangedCallback = [=](gui::Item &item) {
+                    if (item.focus) {
+                        page1.text[i]->setFont(style::window::font::bigbold);
+                    }
+                    else {
+                        page1.text[i]->setFont(style::window::font::small);
+                    }
+                    return true;
+                };
             }
-            else
-            {
+            else {
+                page1.text[i]->focusChangedCallback = [=](gui::Item &item) {
+                    if (item.focus) {
+                        page1.text[i]->setFont(style::window::font::bigbold);
+                    }
+                    else {
+                        page1.text[i]->setFont(style::window::font::small);
+                    }
+                    return true;
+                };
+
+                page1.text[i]->contentCallback = [=](gui::Item &item) { return true; };
+            }
+
+            page1.text[i]->setTextType(gui::Text::TextType::SINGLE_LINE);
+            page1.text[i]->setEditMode(gui::Text::EditMode::EDIT);
+        }
+
+        page1.text[2]->setInputMode(new InputMode({InputMode::digit}));
+        page1.text[3]->setInputMode(new InputMode({InputMode::digit}));
+
+        // set navigation for page 1
+        for (uint32_t i = 0; i < 4; i++) {
+            page1.text[i]->setNavigationItem(NavigationDirection::DOWN, page1.text[i + 1]);
+            page1.text[i + 1]->setNavigationItem(NavigationDirection::UP, page1.text[i]);
+        }
+        page1.text[4]->setNavigationItem(NavigationDirection::UP, page1.text[3]);
+
+        page1.labels[0]->setText(utils::localize.get("app_phonebook_new_contact_first_name"));
+        page1.labels[1]->setText(utils::localize.get("app_phonebook_new_contact_second_name"));
+        page1.labels[2]->setText(utils::localize.get("app_phonebook_new_contact_number_1"));
+        page1.labels[3]->setText(utils::localize.get("app_phonebook_new_contact_number_2"));
+        page1.labels[4]->setText(utils::localize.get("app_phonebook_new_contact_email"));
+
+        // page2
+        page2.speedValue = new gui::Label(this, 30, 105, 56, 47);
+        page2.speedValue->setFilled(false);
+        page2.speedValue->setBorderColor(gui::ColorFullBlack);
+        page2.speedValue->setPenFocusWidth(3);
+        page2.speedValue->setPenWidth(1);
+        page2.speedValue->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        page2.speedValue->setFont(style::window::font::small);
+        page2.speedValue->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+
+        page2.speedValue->focusChangedCallback = [=](gui::Item &item) { return true; };
+
+        page2.speedValue->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
+            int val = gui::toNumeric(inputEvent.keyCode);
+            if ((val >= 0) && (val < 9)) {
+                page2.speedValue->setText(std::to_string(val));
+                return true;
+            }
+            return false;
+        };
+
+        page2.speedDescription = new gui::Label(this, 100, 105, 330, 47);
+        page2.speedDescription->setFilled(false);
+        page2.speedDescription->setBorderColor(gui::ColorFullBlack);
+        page2.speedDescription->setPenFocusWidth(0);
+        page2.speedDescription->setPenWidth(0);
+        page2.speedDescription->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        page2.speedDescription->setFont(style::window::font::small);
+        page2.speedDescription->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+
+        page2.imageSpeed = new gui::Image(this, 416, 122, 0, 0, "small_circle");
+
+        page2.favValue = new gui::Label(this, 30, 161, 56, 47);
+        page2.favValue->setFilled(false);
+        page2.favValue->setBorderColor(gui::ColorFullBlack);
+        page2.favValue->setPenFocusWidth(3);
+        page2.favValue->setPenWidth(1);
+        page2.favValue->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        page2.favValue->setFont(style::window::font::small);
+        page2.favValue->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+
+        page2.favValue->focusChangedCallback = [=](gui::Item &item) {
+            if (item.focus) {
+                bottomBar->setText(BottomBar::Side::CENTER, "SELECT");
+            }
+            else {
+                bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_save"));
+            }
+            return true;
+        };
+
+        page2.favValue->inputCallback = [=](gui::Item &item, const InputEvent &inputEvent) {
+            if ((inputEvent.keyCode == KeyCode::KEY_ENTER) &&
+                ((inputEvent.state == InputEvent::State::keyReleasedShort) ||
+                 (inputEvent.state == InputEvent::State::keyReleasedLong))) {
+                if (page2.favSelected) {
+                    page2.imageTick->setVisible(false);
+                    page2.favSelected = false;
+                    LOG_INFO("Removed from favourites");
+                }
+                else {
+                    page2.imageTick->setVisible(true);
+                    page2.favSelected = true;
+                    LOG_INFO("Added to favourites");
+                }
+                application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+                return true;
+            }
+            return false;
+        };
+
+        page2.favDescription = new gui::Label(this, 100, 161, 330, 47);
+        page2.favDescription->setFilled(false);
+        page2.favDescription->setBorderColor(gui::ColorFullBlack);
+        page2.favDescription->setPenFocusWidth(0);
+        page2.favDescription->setPenWidth(0);
+        page2.favDescription->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        page2.favDescription->setFont(style::window::font::small);
+        page2.favDescription->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+
+        page2.imageTick = new gui::Image(this, 43, 174, 0, 0, "small_tick");
+        page2.imageTick->setVisible(false);
+
+        page2.imageFav = new gui::Image(this, 416, 177, 0, 0, "small_heart");
+
+        page2.speedDescription->setText(utils::localize.get("app_phonebook_new_speed_dial_key"));
+        page2.favDescription->setText(utils::localize.get("app_phonebook_new_addto_fav"));
+
+        page2.addressLabel = new gui::Label(this, 30, 241, 450, 35);
+        page2.addressLabel->setFilled(false);
+        page2.addressLabel->setBorderColor(gui::ColorFullBlack);
+        page2.addressLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        page2.addressLabel->setFont(style::window::font::small);
+        page2.addressLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        page2.addressLabel->setText(utils::localize.get("app_phonebook_new_contact_address"));
+
+        page2.noteLabel = new gui::Label(this, 30, 357, 450, 35);
+        page2.noteLabel->setFilled(false);
+        page2.noteLabel->setBorderColor(gui::ColorFullBlack);
+        page2.noteLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        page2.noteLabel->setFont(style::window::font::small);
+        page2.noteLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+        page2.noteLabel->setText(utils::localize.get("app_phonebook_new_contact_note"));
+
+        for (uint32_t i = 0; i < 2; i++) {
+            page2.text[i] = new gui::Text(this, 30, 272 + 126 * i, 420, 90);
+            page2.text[i]->setFilled(false);
+            page2.text[i]->setPenFocusWidth(2);
+            page2.text[i]->setPenWidth(1);
+            page2.text[i]->setUnderline(true);
+            page2.text[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+            page2.text[i]->setBorderColor(gui::ColorFullBlack);
+            page2.text[i]->setMargins(Margins(0, 0, 0, 0));
+            page2.text[i]->setFont(style::window::font::small);
+            page2.text[i]->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
+            page2.text[i]->contentCallback = [=](gui::Item &item) { return true; };
+        }
+
+        page2.speedValue->setNavigationItem(NavigationDirection::DOWN, page2.favValue);
+
+        page2.favValue->setNavigationItem(NavigationDirection::DOWN, page2.text[0]);
+        page2.favValue->setNavigationItem(NavigationDirection::UP, page2.speedValue);
+
+        page2.text[0]->setNavigationItem(NavigationDirection::DOWN, page2.text[1]);
+        page2.text[0]->setNavigationItem(NavigationDirection::UP, page2.favValue);
+
+        page2.text[1]->setNavigationItem(NavigationDirection::UP, page2.text[0]);
+    }
+
+    void PhonebookNewContact::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+
+        if (title) {
+            removeWidget(title);
+            delete title;
+            title = nullptr;
+        }
+
+        // page 1
+        for (uint32_t i = 0; i < 5; i++) {
+            if (page1.labels[i]) {
+                removeWidget(page1.labels[i]);
+                delete page1.labels[i];
+                page1.labels[i] = nullptr;
+            }
+            if (page1.text[i]) {
+                removeWidget(page1.text[i]);
+                delete page1.text[i];
+                page1.text[i] = nullptr;
+            }
+        }
+
+        if (page2.speedValue) {
+            removeWidget(page2.speedValue);
+            delete page2.speedValue;
+            page2.speedValue = nullptr;
+        }
+        if (page2.speedDescription) {
+            removeWidget(page2.speedDescription);
+            delete page2.speedDescription;
+            page2.speedDescription = nullptr;
+        }
+        if (page2.imageSpeed) {
+            removeWidget(page2.imageSpeed);
+            delete page2.imageSpeed;
+            page2.imageSpeed = nullptr;
+        }
+        if (page2.favValue) {
+            removeWidget(page2.favValue);
+            delete page2.favValue;
+            page2.favValue = nullptr;
+        }
+        if (page2.favDescription) {
+            removeWidget(page2.favDescription);
+            delete page2.favDescription;
+            page2.favDescription = nullptr;
+        }
+        if (page2.imageFav) {
+            removeWidget(page2.imageFav);
+            delete page2.imageFav;
+            page2.imageFav = nullptr;
+        }
+        if (page2.imageTick) {
+            removeWidget(page2.imageTick);
+            delete page2.imageTick;
+            page2.imageTick = nullptr;
+        }
+        if (page2.addressLabel) {
+            removeWidget(page2.addressLabel);
+            delete page2.addressLabel;
+            page2.addressLabel = nullptr;
+        }
+        if (page2.noteLabel) {
+            removeWidget(page2.noteLabel);
+            delete page2.noteLabel;
+            page2.noteLabel = nullptr;
+        }
+        for (uint32_t i = 0; i < 2; i++) {
+            if (page2.text[i]) {
+                removeWidget(page2.text[i]);
+                delete page2.text[i];
+                page2.text[i] = nullptr;
+            }
+        }
+
+        children.clear();
+    }
+
+    PhonebookNewContact::~PhonebookNewContact()
+    {
+        destroyInterface();
+    }
+
+    void PhonebookNewContact::saveStateChanged()
+    {
+        if (isValidName(page1.text[0]->getText()) > 0 && isValidNumber(page1.text[2]->getText())) {
+            bottomBar->setActive(BottomBar::Side::CENTER, true);
+        }
+        else {
+            bottomBar->setActive(BottomBar::Side::CENTER, false);
+        }
+    }
+
+    void PhonebookNewContact::coppyDataToContact()
+    {
+        if (contact) {
+            contact->primaryName     = page1.text[0]->getText();
+            contact->alternativeName = page1.text[1]->getText();
+
+            contact->numbers.clear();
+
+            contact->numbers.push_back(ContactRecord::Number(page1.text[2]->getText()));
+            contact->numbers.push_back(ContactRecord::Number(page1.text[3]->getText()));
+
+            contact->mail           = page1.text[4]->getText();
+            contact->note           = page2.text[1]->getText();
+            contact->isOnFavourites = page2.favSelected;
+            contact->speeddial      = atoi(page2.speedValue->getText().c_str());
+        }
+    }
+
+    void PhonebookNewContact::setContactData()
+    {
+        if (contact) {
+            page1.text[0]->setText(contact->primaryName);
+            page1.text[1]->setText(contact->alternativeName);
+            if (contact->numbers.size() > 0) {
+                if (contact->numbers[0].numberE164.length() == 0) {
+                    page1.text[2]->setText(getCountryPrefix());
+                }
+                else {
+                    page1.text[2]->setText(contact->numbers[0].numberE164);
+                }
+            }
+            if (contact->numbers.size() > 1) {
+                if (contact->numbers[1].numberE164.length() == 0) {
+                    page1.text[3]->setText(getCountryPrefix());
+                }
+                else {
+                    page1.text[3]->setText(contact->numbers[1].numberE164);
+                }
+            }
+            page1.text[4]->setText(contact->mail);
+
+            page2.text[1]->setText(contact->note);
+            if (contact->isOnFavourites) {
                 page2.imageTick->setVisible(true);
                 page2.favSelected = true;
-                LOG_INFO("Added to favourites");
             }
-            application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
-            return true;
-        }
-        return false;
-    };
-
-    page2.favDescription = new gui::Label(this, 100, 161, 330, 47);
-    page2.favDescription->setFilled(false);
-    page2.favDescription->setBorderColor(gui::ColorFullBlack);
-    page2.favDescription->setPenFocusWidth(0);
-    page2.favDescription->setPenWidth(0);
-    page2.favDescription->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    page2.favDescription->setFont(style::window::font::small);
-    page2.favDescription->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-
-    page2.imageTick = new gui::Image(this, 43, 174, 0, 0, "small_tick");
-    page2.imageTick->setVisible(false);
-
-    page2.imageFav = new gui::Image(this, 416, 177, 0, 0, "small_heart");
-
-    page2.speedDescription->setText(utils::localize.get("app_phonebook_new_speed_dial_key"));
-    page2.favDescription->setText(utils::localize.get("app_phonebook_new_addto_fav"));
-
-    page2.addressLabel = new gui::Label(this, 30, 241, 450, 35);
-    page2.addressLabel->setFilled(false);
-    page2.addressLabel->setBorderColor(gui::ColorFullBlack);
-    page2.addressLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    page2.addressLabel->setFont(style::window::font::small);
-    page2.addressLabel->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-    page2.addressLabel->setText(utils::localize.get("app_phonebook_new_contact_address"));
-
-    page2.noteLabel = new gui::Label(this, 30, 357, 450, 35);
-    page2.noteLabel->setFilled(false);
-    page2.noteLabel->setBorderColor(gui::ColorFullBlack);
-    page2.noteLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    page2.noteLabel->setFont(style::window::font::small);
-    page2.noteLabel->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-    page2.noteLabel->setText(utils::localize.get("app_phonebook_new_contact_note"));
-
-    for (uint32_t i = 0; i < 2; i++)
-    {
-        page2.text[i] = new gui::Text(this, 30, 272 + 126 * i, 420, 90);
-        page2.text[i]->setFilled(false);
-        page2.text[i]->setPenFocusWidth(2);
-        page2.text[i]->setPenWidth(1);
-        page2.text[i]->setUnderline(true);
-        page2.text[i]->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-        page2.text[i]->setBorderColor(gui::ColorFullBlack);
-        page2.text[i]->setMargins(Margins(0, 0, 0, 0));
-        page2.text[i]->setFont(style::window::font::small);
-        page2.text[i]->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
-        page2.text[i]->contentCallback = [=](gui::Item &item) { return true; };
-    }
-
-    page2.speedValue->setNavigationItem(NavigationDirection::DOWN, page2.favValue);
-
-    page2.favValue->setNavigationItem(NavigationDirection::DOWN, page2.text[0]);
-    page2.favValue->setNavigationItem(NavigationDirection::UP, page2.speedValue);
-
-    page2.text[0]->setNavigationItem(NavigationDirection::DOWN, page2.text[1]);
-    page2.text[0]->setNavigationItem(NavigationDirection::UP, page2.favValue);
-
-    page2.text[1]->setNavigationItem(NavigationDirection::UP, page2.text[0]);
-}
-
-void PhonebookNewContact::destroyInterface()
-{
-    AppWindow::destroyInterface();
-
-    if (title)
-    {
-        removeWidget(title);
-        delete title;
-        title = nullptr;
-    }
-
-    // page 1
-    for (uint32_t i = 0; i < 5; i++)
-    {
-        if (page1.labels[i])
-        {
-            removeWidget(page1.labels[i]);
-            delete page1.labels[i];
-            page1.labels[i] = nullptr;
-        }
-        if (page1.text[i])
-        {
-            removeWidget(page1.text[i]);
-            delete page1.text[i];
-            page1.text[i] = nullptr;
-        }
-    }
-
-    if (page2.speedValue)
-    {
-        removeWidget(page2.speedValue);
-        delete page2.speedValue;
-        page2.speedValue = nullptr;
-    }
-    if (page2.speedDescription)
-    {
-        removeWidget(page2.speedDescription);
-        delete page2.speedDescription;
-        page2.speedDescription = nullptr;
-    }
-    if (page2.imageSpeed)
-    {
-        removeWidget(page2.imageSpeed);
-        delete page2.imageSpeed;
-        page2.imageSpeed = nullptr;
-    }
-    if (page2.favValue)
-    {
-        removeWidget(page2.favValue);
-        delete page2.favValue;
-        page2.favValue = nullptr;
-    }
-    if (page2.favDescription)
-    {
-        removeWidget(page2.favDescription);
-        delete page2.favDescription;
-        page2.favDescription = nullptr;
-    }
-    if (page2.imageFav)
-    {
-        removeWidget(page2.imageFav);
-        delete page2.imageFav;
-        page2.imageFav = nullptr;
-    }
-    if (page2.imageTick)
-    {
-        removeWidget(page2.imageTick);
-        delete page2.imageTick;
-        page2.imageTick = nullptr;
-    }
-    if (page2.addressLabel)
-    {
-        removeWidget(page2.addressLabel);
-        delete page2.addressLabel;
-        page2.addressLabel = nullptr;
-    }
-    if (page2.noteLabel)
-    {
-        removeWidget(page2.noteLabel);
-        delete page2.noteLabel;
-        page2.noteLabel = nullptr;
-    }
-    for (uint32_t i = 0; i < 2; i++)
-    {
-        if (page2.text[i])
-        {
-            removeWidget(page2.text[i]);
-            delete page2.text[i];
-            page2.text[i] = nullptr;
-        }
-    }
-
-    children.clear();
-}
-
-PhonebookNewContact::~PhonebookNewContact()
-{
-    destroyInterface();
-}
-
-void PhonebookNewContact::saveStateChanged()
-{
-    if (isValidName(page1.text[0]->getText()) > 0 && isValidNumber(page1.text[2]->getText()))
-    {
-        bottomBar->setActive(BottomBar::Side::CENTER, true);
-    }
-    else
-    {
-        bottomBar->setActive(BottomBar::Side::CENTER, false);
-    }
-}
-
-void PhonebookNewContact::coppyDataToContact()
-{
-    if (contact)
-    {
-        contact->primaryName = page1.text[0]->getText();
-        contact->alternativeName = page1.text[1]->getText();
-
-        contact->numbers.clear();
-
-        contact->numbers.push_back(ContactRecord::Number(page1.text[2]->getText()));
-        contact->numbers.push_back(ContactRecord::Number(page1.text[3]->getText()));
-
-        contact->mail = page1.text[4]->getText();
-        contact->note = page2.text[1]->getText();
-        contact->isOnFavourites = page2.favSelected;
-        contact->speeddial = atoi(page2.speedValue->getText().c_str());
-    }
-}
-
-void PhonebookNewContact::setContactData()
-{
-    if (contact)
-    {
-        page1.text[0]->setText(contact->primaryName);
-        page1.text[1]->setText(contact->alternativeName);
-        if (contact->numbers.size() > 0)
-        {
-            if (contact->numbers[0].numberE164.length() == 0)
-            {
-                page1.text[2]->setText(getCountryPrefix());
+            else {
+                page2.imageTick->setVisible(false);
+                page2.favSelected = false;
             }
+            if (contact->speeddial >= 0 && contact->speeddial < 10)
+                page2.speedValue->setText(std::to_string(contact->speeddial));
             else
-            {
-                page1.text[2]->setText(contact->numbers[0].numberE164);
-            }
+                page2.speedValue->setText("-");
+
+            saveStateChanged();
         }
-        if (contact->numbers.size() > 1)
-        {
-            if (contact->numbers[1].numberE164.length() == 0)
-            {
-                page1.text[3]->setText(getCountryPrefix());
-            }
-            else
-            {
-                page1.text[3]->setText(contact->numbers[1].numberE164);
-            }
+        else {
+            LOG_DEBUG("new contact create");
+            page1.text[2]->setText(getCountryPrefix());
         }
-        page1.text[4]->setText(contact->mail);
+    }
 
-        page2.text[1]->setText(contact->note);
-        if (contact->isOnFavourites)
-        {
-            page2.imageTick->setVisible(true);
-            page2.favSelected = true;
+    void PhonebookNewContact::switchPage(uint32_t page)
+    {
+        if (page == 0) {
+            page1.setVisibile(true);
+            page2.setVisibile(false);
         }
-        else
-        {
-            page2.imageTick->setVisible(false);
-            page2.favSelected = false;
+        else if (page == 1) {
+            page1.setVisibile(false);
+            page2.setVisibile(true);
         }
-        if (contact->speeddial >= 0 && contact->speeddial < 10)
-            page2.speedValue->setText(std::to_string(contact->speeddial));
-        else
-            page2.speedValue->setText("-");
-
-        saveStateChanged();
-    }
-    else
-    {
-        LOG_DEBUG("new contact create");
-        page1.text[2]->setText(getCountryPrefix());
-    }
-}
-
-void PhonebookNewContact::switchPage(uint32_t page)
-{
-    if (page == 0)
-    {
-        page1.setVisibile(true);
-        page2.setVisibile(false);
-    }
-    else if (page == 1)
-    {
-        page1.setVisibile(false);
-        page2.setVisibile(true);
-    }
-}
-
-void PhonebookNewContact::onBeforeShow(ShowMode mode, SwitchData *data)
-{
-    switchPage(0);
-    setFocusItem(page1.text[0]);
-    page2.favSelected = false;
-    page2.imageFav->setVisible(false);
-}
-
-bool PhonebookNewContact::handleSwitchData(SwitchData *data)
-{
-    if (data == nullptr)
-        return false;
-
-    PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-    if (item)
-    {
-        contact = item->getContact();
-        setContactData();
     }
 
-    return (true);
-}
-
-bool PhonebookNewContact::onInput(const InputEvent &inputEvent)
-{
-    if (AppWindow::onInput(inputEvent))
+    void PhonebookNewContact::onBeforeShow(ShowMode mode, SwitchData *data)
     {
+        switchPage(0);
+        setFocusItem(page1.text[0]);
+        page2.favSelected = false;
+        page2.imageFav->setVisible(false);
+    }
+
+    bool PhonebookNewContact::handleSwitchData(SwitchData *data)
+    {
+        if (data == nullptr)
+            return false;
+
+        PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
+        if (item) {
+            contact = item->getContact();
+            setContactData();
+        }
+
         return (true);
     }
 
-    if (inputEvent.state != InputEvent::State::keyReleasedShort)
-        return (false);
-
-    saveStateChanged();
-
-    if (inputEvent.keyCode == KeyCode::KEY_ENTER)
+    bool PhonebookNewContact::onInput(const InputEvent &inputEvent)
     {
-        // if focus is on the favourite selection field do nothing
-        if (focusItem == page2.favValue)
-        {
-            return true;
-        }
-
-        return (verifyAndSave());
-    }
-    else if (inputEvent.keyCode == KeyCode::KEY_DOWN)
-    {
-        LOG_INFO("switching to second page");
-        if (getFocusItem() == page1.text[4])
-        {
-            switchPage(1);
-            setFocusItem(page2.speedValue);
-        }
-    }
-    else if (inputEvent.keyCode == KeyCode::KEY_UP)
-    {
-        LOG_INFO("switching to first page");
-        if (getFocusItem() == page2.speedValue)
-        {
-            switchPage(0);
-            setFocusItem(page1.text[4]);
-        }
-    }
-
-    return (false);
-}
-
-bool PhonebookNewContact::verifyAndSave()
-{
-    ContactRecord record, errName, errPhone, errSpeed, errFav;
-    record.primaryName = page1.text[0]->getText();
-    record.alternativeName = page1.text[1]->getText();
-    record.numbers.push_back(page1.text[2]->getText());
-    record.numbers.push_back(page1.text[3]->getText());
-    record.mail = page1.text[4]->getText();
-    record.note = page2.text[1]->getText();
-    record.isOnFavourites = page2.favSelected;
-    record.speeddial = atoi(page2.speedValue->getText().c_str());
-
-    /** basic sanity checks */
-    if (!isValidName(record.primaryName))
-    {
-        LOG_ERROR("verifyAndSave name not valid");
-        return (false);
-    }
-
-    if (record.numbers.size() > 0 && isValidNumber(record.numbers[0].numberUser) == false)
-    {
-        LOG_ERROR("verifyAndSave primaryNumber not valid");
-        return (false);
-    }
-
-    if (contact == nullptr) // new contact
-    {
-        /** secondary verification against database data */
-        DBServiceAPI::ContactVerificationError err = DBServiceAPI::verifyContact(application, record, errName, errPhone, errSpeed, errFav);
-        if (err != DBServiceAPI::noError)
-        {
-            if (err == DBServiceAPI::primaryNumberError)
-            {
-                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
-                application->switchWindow("NumberAlreadyExists", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-            }
-
-            if (err == DBServiceAPI::speedDialError)
-            {
-                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
-                application->switchWindow("SpeedDialAlreadyAssigned", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-            }
-            LOG_ERROR("failed to verify contact data reason: \"%s\"", DBServiceAPI::getVerificationErrorString(err).c_str());
-            return (false);
-        }
-
-        if (DBServiceAPI::ContactAdd(application, record) == false)
-        {
-            LOG_ERROR("verifyAndSave failed to ADD contact");
-            return (false);
-        }
-        else
-        {
-            coppyDataToContact();
-            std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
-            application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-            LOG_INFO("verifyAndSave contact ADDED");
+        if (AppWindow::onInput(inputEvent)) {
             return (true);
         }
+
+        if (inputEvent.state != InputEvent::State::keyReleasedShort)
+            return (false);
+
+        saveStateChanged();
+
+        if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+            // if focus is on the favourite selection field do nothing
+            if (focusItem == page2.favValue) {
+                return true;
+            }
+
+            return (verifyAndSave());
+        }
+        else if (inputEvent.keyCode == KeyCode::KEY_DOWN) {
+            LOG_INFO("switching to second page");
+            if (getFocusItem() == page1.text[4]) {
+                switchPage(1);
+                setFocusItem(page2.speedValue);
+            }
+        }
+        else if (inputEvent.keyCode == KeyCode::KEY_UP) {
+            LOG_INFO("switching to first page");
+            if (getFocusItem() == page2.speedValue) {
+                switchPage(0);
+                setFocusItem(page1.text[4]);
+            }
+        }
+
+        return (false);
     }
-    else if (contact->dbID > 0)
+
+    bool PhonebookNewContact::verifyAndSave()
     {
-        if (DBServiceAPI::ContactUpdate(application, record) == false)
-        {
-            LOG_ERROR("verifyAndSave failed to UPDATE contact");
+        ContactRecord record, errName, errPhone, errSpeed, errFav;
+        record.primaryName     = page1.text[0]->getText();
+        record.alternativeName = page1.text[1]->getText();
+        record.numbers.push_back(page1.text[2]->getText());
+        record.numbers.push_back(page1.text[3]->getText());
+        record.mail           = page1.text[4]->getText();
+        record.note           = page2.text[1]->getText();
+        record.isOnFavourites = page2.favSelected;
+        record.speeddial      = atoi(page2.speedValue->getText().c_str());
+
+        /** basic sanity checks */
+        if (!isValidName(record.primaryName)) {
+            LOG_ERROR("verifyAndSave name not valid");
             return (false);
         }
-        else
-        {
-            coppyDataToContact();
-            std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
-            application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
 
-            LOG_INFO("verifyAndSave new contact UPDATED");
-            return (true);
+        if (record.numbers.size() > 0 && isValidNumber(record.numbers[0].numberUser) == false) {
+            LOG_ERROR("verifyAndSave primaryNumber not valid");
+            return (false);
         }
-    }
 
-    return (false);
-}
-const std::string PhonebookNewContact::getCountryPrefix()
-{
-    std::string imsi = CellularServiceAPI::GetIMSI(application, false);
-    if (imsi == "")
-    {
-        LOG_ERROR("Can't get IMSI code from cellular, fall back to Poland country code");
-        return (app::defaultCountryCode);
-    }
-    LOG_DEBUG("getCountryPrefix imsi:%s", imsi.c_str());
-    const uint32_t country_code = DBServiceAPI::GetCountryCodeByMCC(application, std::stoul(imsi));
-    if (country_code <= 0)
-    {
-        LOG_ERROR("Can't get country code from database, fall back to Poland country code");
-        return (app::defaultCountryCode);
-    }
-    LOG_DEBUG("getCountryPrefix country_code:%d", country_code);
-    std::string buf = "+";
-    buf += std::to_string(country_code);
+        if (contact == nullptr) // new contact
+        {
+            /** secondary verification against database data */
+            DBServiceAPI::ContactVerificationError err =
+                DBServiceAPI::verifyContact(application, record, errName, errPhone, errSpeed, errFav);
+            if (err != DBServiceAPI::noError) {
+                if (err == DBServiceAPI::primaryNumberError) {
+                    std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
+                    application->switchWindow("NumberAlreadyExists", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+                }
 
-    LOG_DEBUG("getCountryPrefix return: \"%s\"", buf.c_str());
-    return (buf);
-}
+                if (err == DBServiceAPI::speedDialError) {
+                    std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
+                    application->switchWindow(
+                        "SpeedDialAlreadyAssigned", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+                }
+                LOG_ERROR("failed to verify contact data reason: \"%s\"",
+                          DBServiceAPI::getVerificationErrorString(err).c_str());
+                return (false);
+            }
+
+            if (DBServiceAPI::ContactAdd(application, record) == false) {
+                LOG_ERROR("verifyAndSave failed to ADD contact");
+                return (false);
+            }
+            else {
+                coppyDataToContact();
+                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
+                application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+                LOG_INFO("verifyAndSave contact ADDED");
+                return (true);
+            }
+        }
+        else if (contact->dbID > 0) {
+            if (DBServiceAPI::ContactUpdate(application, record) == false) {
+                LOG_ERROR("verifyAndSave failed to UPDATE contact");
+                return (false);
+            }
+            else {
+                coppyDataToContact();
+                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
+                application->switchWindow(gui::window::name::contact, gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+
+                LOG_INFO("verifyAndSave new contact UPDATED");
+                return (true);
+            }
+        }
+
+        return (false);
+    }
+    const std::string PhonebookNewContact::getCountryPrefix()
+    {
+        std::string imsi = CellularServiceAPI::GetIMSI(application, false);
+        if (imsi == "") {
+            LOG_ERROR("Can't get IMSI code from cellular, fall back to Poland country code");
+            return (app::defaultCountryCode);
+        }
+        LOG_DEBUG("getCountryPrefix imsi:%s", imsi.c_str());
+        const uint32_t country_code = DBServiceAPI::GetCountryCodeByMCC(application, std::stoul(imsi));
+        if (country_code <= 0) {
+            LOG_ERROR("Can't get country code from database, fall back to Poland country code");
+            return (app::defaultCountryCode);
+        }
+        LOG_DEBUG("getCountryPrefix country_code:%d", country_code);
+        std::string buf = "+";
+        buf += std::to_string(country_code);
+
+        LOG_DEBUG("getCountryPrefix return: \"%s\"", buf.c_str());
+        return (buf);
+    }
 
 } // namespace gui
diff --git a/module-apps/application-phonebook/windows/PhonebookNewContact.hpp b/module-apps/application-phonebook/windows/PhonebookNewContact.hpp
index 61500d742..7c3dfc6e8 100644
--- a/module-apps/application-phonebook/windows/PhonebookNewContact.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookNewContact.hpp
@@ -21,97 +21,96 @@ namespace gui
             inline std::string newContact = "New";
         }
     } // namespace window
-class PhonebookNewContact : public AppWindow
-{
-  public:
-    enum class PageLabels
+    class PhonebookNewContact : public AppWindow
     {
-        Name,
-        Surname,
-        Number_1,
-        Number_2,
-        Email
-    };
-
-  protected:
-    gui::Label *title = nullptr;
-
-    struct Page
-    {
-        virtual void setVisibile(bool visible) = 0;
-    };
-
-    struct Page1 : public Page
-    {
-        gui::Label *labels[5] = {nullptr};
-        gui::Text *text[5] = {nullptr};
-        void setVisibile(bool visible)
+      public:
+        enum class PageLabels
         {
-            for (uint32_t i = 0; i < 5; i++)
+            Name,
+            Surname,
+            Number_1,
+            Number_2,
+            Email
+        };
+
+      protected:
+        gui::Label *title = nullptr;
+
+        struct Page
+        {
+            virtual void setVisibile(bool visible) = 0;
+        };
+
+        struct Page1 : public Page
+        {
+            gui::Label *labels[5] = {nullptr};
+            gui::Text *text[5]    = {nullptr};
+            void setVisibile(bool visible)
             {
-                labels[i]->setVisible(visible);
-                text[i]->setVisible(visible);
+                for (uint32_t i = 0; i < 5; i++) {
+                    labels[i]->setVisible(visible);
+                    text[i]->setVisible(visible);
+                }
             }
-        }
-    };
+        };
 
-    struct Page2 : public Page
-    {
-        gui::Label *speedValue = nullptr;
-        gui::Label *speedDescription = nullptr;
-        gui::Image *imageSpeed = nullptr;
-        gui::Label *favValue = nullptr;
-        gui::Label *favDescription = nullptr;
-        gui::Image *imageFav = nullptr;
-        gui::Image *imageTick = nullptr;
-
-        gui::Label *addressLabel = nullptr;
-        gui::Label *noteLabel = nullptr;
-
-        gui::Text *text[2] = {nullptr};
-
-        bool favSelected = false;
-
-        void setVisibile(bool visible)
+        struct Page2 : public Page
         {
-            speedValue->setVisible(visible);
-            speedDescription->setVisible(visible);
-            imageSpeed->setVisible(visible);
-            favValue->setVisible(visible);
-            favDescription->setVisible(visible);
-            imageFav->setVisible(visible);
-            imageTick->setVisible(visible);
+            gui::Label *speedValue       = nullptr;
+            gui::Label *speedDescription = nullptr;
+            gui::Image *imageSpeed       = nullptr;
+            gui::Label *favValue         = nullptr;
+            gui::Label *favDescription   = nullptr;
+            gui::Image *imageFav         = nullptr;
+            gui::Image *imageTick        = nullptr;
 
-            addressLabel->setVisible(visible);
-            noteLabel->setVisible(visible);
-            text[0]->setVisible(visible);
-            text[1]->setVisible(visible);
-        }
+            gui::Label *addressLabel = nullptr;
+            gui::Label *noteLabel    = nullptr;
+
+            gui::Text *text[2] = {nullptr};
+
+            bool favSelected = false;
+
+            void setVisibile(bool visible)
+            {
+                speedValue->setVisible(visible);
+                speedDescription->setVisible(visible);
+                imageSpeed->setVisible(visible);
+                favValue->setVisible(visible);
+                favDescription->setVisible(visible);
+                imageFav->setVisible(visible);
+                imageTick->setVisible(visible);
+
+                addressLabel->setVisible(visible);
+                noteLabel->setVisible(visible);
+                text[0]->setVisible(visible);
+                text[1]->setVisible(visible);
+            }
+        };
+
+        Page1 page1;
+        Page2 page2;
+        uint32_t page = 0;
+
+        std::shared_ptr<ContactRecord> contact = nullptr;
+
+      public:
+        PhonebookNewContact(app::Application *app);
+        virtual ~PhonebookNewContact();
+        void switchPage(uint32_t page);
+
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool handleSwitchData(SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        bool verifyAndSave();
+        void setContactData();
+        void saveStateChanged();
+        void coppyDataToContact();
+        const std::string getCountryPrefix();
     };
 
-    Page1 page1;
-    Page2 page2;
-    uint32_t page = 0;
-
-    std::shared_ptr<ContactRecord> contact = nullptr;
-
-  public:
-    PhonebookNewContact(app::Application *app);
-    virtual ~PhonebookNewContact();
-    void switchPage(uint32_t page);
-
-    // virtual methods
-    bool onInput(const InputEvent &inputEvent) override;
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    bool handleSwitchData(SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
-    bool verifyAndSave();
-    void setContactData();
-    void saveStateChanged();
-    void coppyDataToContact();
-    const std::string getCountryPrefix();
-};
-
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookOptions.cpp b/module-apps/application-phonebook/windows/PhonebookOptions.cpp
index 15587690e..e181017d6 100644
--- a/module-apps/application-phonebook/windows/PhonebookOptions.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookOptions.cpp
@@ -25,10 +25,11 @@ PhonebookOptions::PhonebookOptions(app::Application *app) : AppWindow(app, "Opti
 }
 
 PhonebookOptions::~PhonebookOptions()
-{
-}
+{}
 
-gui::Item *PhonebookOptions::addOptionLabel(const std::string &text, bool hasSubOptions, std::function<bool(gui::Item &)> activatedCallback)
+gui::Item *PhonebookOptions::addOptionLabel(const std::string &text,
+                                            bool hasSubOptions,
+                                            std::function<bool(gui::Item &)> activatedCallback)
 {
     gui::Label *label = new gui::Label(this, 19, 0, 480 - 21, 55, text);
     label->setMargins(gui::Margins(0, 0, 0, 0));
@@ -39,8 +40,7 @@ gui::Item *PhonebookOptions::addOptionLabel(const std::string &text, bool hasSub
     label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
     label->activatedCallback = activatedCallback;
     label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
-    if (hasSubOptions)
-    {
+    if (hasSubOptions) {
         new gui::Image(label, 427, 20, 32, 32, "right_label_arrow");
     }
     return label;
@@ -69,11 +69,12 @@ void PhonebookOptions::buildInterface()
         return (true);
     }));
 
-    options.push_back(addOptionLabel(utils::localize.get("app_phonebook_options_forward_namecard"), true, [=](gui::Item &) {
-        std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
-        application->switchWindow("OptionsNamecard", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-        return (true);
-    }));
+    options.push_back(
+        addOptionLabel(utils::localize.get("app_phonebook_options_forward_namecard"), true, [=](gui::Item &) {
+            std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
+            application->switchWindow("OptionsNamecard", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+            return (true);
+        }));
 
     options.push_back(addOptionLabel(utils::localize.get("app_phonebook_options_block"), false, [=](gui::Item &) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
@@ -90,8 +91,7 @@ void PhonebookOptions::buildInterface()
     // set position and navigation for labels
     uint32_t posY = 113;
     uint32_t size = options.size();
-    for (uint32_t i = 0; i < options.size(); i++)
-    {
+    for (uint32_t i = 0; i < options.size(); i++) {
         options[i]->setPosition(17, posY);
         posY += 60;
         options[i]->setNavigationItem(NavigationDirection::DOWN, options[(i + 1) % size]);
@@ -106,22 +106,20 @@ void PhonebookOptions::onBeforeShow(ShowMode mode, SwitchData *data)
 
 bool PhonebookOptions::handleSwitchData(SwitchData *data)
 {
-    if (data == nullptr)
-    {
+    if (data == nullptr) {
         LOG_ERROR("Received null pointer");
         return false;
     }
 
     PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-    contact = item->getContact();
+    contact                 = item->getContact();
     return (true);
 }
 
 bool PhonebookOptions::onInput(const InputEvent &inputEvent)
 {
     LOG_INFO("PhonebookOptions::onInput state: %d keyCode: %d", inputEvent.state, inputEvent.keyCode);
-    if (inputEvent.keyCode == KeyCode::KEY_RF && inputEvent.state == InputEvent::State::keyReleasedShort)
-    {
+    if (inputEvent.keyCode == KeyCode::KEY_RF && inputEvent.state == InputEvent::State::keyReleasedShort) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
         application->switchWindow("Contact", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         return (true);
diff --git a/module-apps/application-phonebook/windows/PhonebookOptionsNamecard.cpp b/module-apps/application-phonebook/windows/PhonebookOptionsNamecard.cpp
index 2fd703a6f..571f1520c 100644
--- a/module-apps/application-phonebook/windows/PhonebookOptionsNamecard.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookOptionsNamecard.cpp
@@ -24,10 +24,11 @@ PhonebookOptionsNamecard::PhonebookOptionsNamecard(app::Application *app) : AppW
 }
 
 PhonebookOptionsNamecard::~PhonebookOptionsNamecard()
-{
-}
+{}
 
-gui::Item *PhonebookOptionsNamecard::addOptionLabel(const std::string &text, bool hasSubOptions, std::function<bool(gui::Item &)> activatedCallback)
+gui::Item *PhonebookOptionsNamecard::addOptionLabel(const std::string &text,
+                                                    bool hasSubOptions,
+                                                    std::function<bool(gui::Item &)> activatedCallback)
 {
     gui::Label *label = new gui::Label(this, 19, 0, 480 - 21, 55, text);
     label->setMargins(gui::Margins(0, 0, 0, 0));
@@ -38,8 +39,7 @@ gui::Item *PhonebookOptionsNamecard::addOptionLabel(const std::string &text, boo
     label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
     label->activatedCallback = activatedCallback;
     label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM | RectangleEdgeFlags::GUI_RECT_EDGE_TOP);
-    if (hasSubOptions)
-    {
+    if (hasSubOptions) {
         new gui::Image(label, 427, 20, 32, 32, "right_label_arrow");
     }
     return label;
@@ -72,8 +72,7 @@ void PhonebookOptionsNamecard::buildInterface()
     // set position and navigation for labels
     uint32_t posY = 113;
     uint32_t size = options.size();
-    for (uint32_t i = 0; i < options.size(); i++)
-    {
+    for (uint32_t i = 0; i < options.size(); i++) {
         options[i]->setPosition(17, posY);
         posY += 60;
         options[i]->setNavigationItem(NavigationDirection::DOWN, options[(i + 1) % size]);
@@ -97,21 +96,19 @@ void PhonebookOptionsNamecard::onBeforeShow(ShowMode mode, SwitchData *data)
 
 bool PhonebookOptionsNamecard::handleSwitchData(SwitchData *data)
 {
-    if (data == nullptr)
-    {
+    if (data == nullptr) {
         LOG_ERROR("Received null pointer");
         return false;
     }
 
     PhonebookItemData *item = dynamic_cast<PhonebookItemData *>(data);
-    contact = item->getContact();
+    contact                 = item->getContact();
     return (true);
 }
 
 bool PhonebookOptionsNamecard::onInput(const InputEvent &inputEvent)
 {
-    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort))
-    {
+    if (inputEvent.keyCode == KeyCode::KEY_RF && (inputEvent.state == InputEvent::State::keyReleasedShort)) {
         std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookItemData>(contact);
         application->switchWindow("Options", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
         return true;
@@ -143,8 +140,7 @@ const std::string PhonebookOptionsNamecard::formatVCARD()
           << "FN:" << contact->primaryName.c_str() << " " << contact->alternativeName.c_str() << "\n"
           << "TEL;TYPE=HOME,VOICE:" << priNumber << "\n";
 
-    if (secNumber.length() > 0)
-    {
+    if (secNumber.length() > 0) {
         vcard << "TEL;TYPE=HOME,VOICE:" << secNumber << "\n";
     }
 
diff --git a/module-apps/application-phonebook/windows/PhonebookSearch.cpp b/module-apps/application-phonebook/windows/PhonebookSearch.cpp
index 9782c96f7..764bdf945 100644
--- a/module-apps/application-phonebook/windows/PhonebookSearch.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookSearch.cpp
@@ -9,158 +9,174 @@
 #include "application-call/data/CallSwitchData.hpp"
 #include "service-db/api/DBServiceAPI.hpp"
 
-
 namespace gui
 {
-PhonebookSearch::PhonebookSearch(app::Application *app) : AppWindow(app, "Search"), phonebookModel{new PhonebookModel(app)}
-{
-    buildInterface();
-}
-
-PhonebookSearch::~PhonebookSearch()
-{
-}
-
-Label *PhonebookSearch::addLabel(std::list<Item *> *parentPage, int x, int y, int w, int h, const std::string text = "",
-                                 const std::string fontName = style::window::font::small,
-                                 const RectangleEdgeFlags edges = RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
-                                 const Alignment alignment = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT, Alignment::ALIGN_VERTICAL_BOTTOM),
-                                 const bool lineMode = false)
-{
-    Label *l = new Label(this, x, y, w, h);
-    l->setFilled(false);
-    l->setBorderColor(ColorFullBlack);
-    l->setEdges(edges);
-    l->setFont(fontName);
-    l->setText(text);
-    l->setAlignement(alignment);
-    l->setLineMode(lineMode);
-
-    if (parentPage)
-        parentPage->push_back(l);
-
-    return (l);
-}
-
-void PhonebookSearch::buildInterface()
-{
-    AppWindow::buildInterface();
-    topBar->setActive(TopBar::Elements::TIME, true);
-
-    setTitle(utils::localize.get("app_phonebook_title_main"));
-
-    searchHeader = addLabel(nullptr, phonebookStyle::search::searchHeader::x, phonebookStyle::search::searchHeader::y, phonebookStyle::search::searchHeader::w, phonebookStyle::search::searchHeader::h, utils::localize.get("app_phonebook_search_win_search"));
-    searchHeader->setFont(style::window::font::small);
-
-    inputField = new Text(nullptr, phonebookStyle::search::horizontalBox::inputField::x, phonebookStyle::search::horizontalBox::inputField::y, phonebookStyle::search::horizontalBox::inputField::w, phonebookStyle::search::horizontalBox::inputField::h);
-    inputField->setTextType(Text::TextType::SINGLE_LINE);
-    inputField->setEditMode(Text::EditMode::EDIT);
-    inputField->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    inputField->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
-    inputField->setFont(style::window::font::mediumbold);
-
-    searchTop = new Image(nullptr, phonebookStyle::search::horizontalBox::searchTop::x, phonebookStyle::search::horizontalBox::searchTop::y, phonebookStyle::search::horizontalBox::searchTop::w, phonebookStyle::search::horizontalBox::searchTop::h, "search");
-
-    horizontalBox = new HBox(this, phonebookStyle::search::horizontalBox::x, phonebookStyle::search::horizontalBox::y, phonebookStyle::search::horizontalBox::w, phonebookStyle::search::horizontalBox::h);
-    horizontalBox->addWidget(inputField);
-    horizontalBox->addWidget(searchTop);
-    horizontalBox->setPenWidth(phonebookStyle::search::horizontalBox::penWidth);
-    horizontalBox->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-
-    bottomBar->setActive(BottomBar::Side::LEFT, false);
-    bottomBar->setActive(BottomBar::Side::CENTER, true);
-    bottomBar->setActive(BottomBar::Side::RIGHT, true);
-
-    bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_search"));
-    bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
-
-    setFocusItem(inputField);
-}
-
-void PhonebookSearch::rebuild()
-{
-}
-
-void PhonebookSearch::destroyInterface()
-{
-    AppWindow::destroyInterface();
-}
-
-void PhonebookSearch::onBeforeShow(ShowMode mode, SwitchData *data)
-{
-    setFocusItem(inputField);
-}
-
-bool PhonebookSearch::handleSwitchData(SwitchData *data)
-{
-    if (data == nullptr)
+    PhonebookSearch::PhonebookSearch(app::Application *app)
+        : AppWindow(app, "Search"), phonebookModel{new PhonebookModel(app)}
     {
-        LOG_ERROR("Received null pointer");
-        return false;
+        buildInterface();
     }
 
-    PhonebookSearchQuery *item = dynamic_cast<PhonebookSearchQuery *>(data);
-    inputField->setText(item->getQuery());
+    PhonebookSearch::~PhonebookSearch()
+    {}
 
-    return (true);
-}
-
-bool PhonebookSearch::onInput(const InputEvent &inputEvent)
-{
-    bool ret = AppWindow::onInput(inputEvent);
-    if(ret)
+    Label *PhonebookSearch::addLabel(std::list<Item *> *parentPage,
+                                     int x,
+                                     int y,
+                                     int w,
+                                     int h,
+                                     const std::string text         = "",
+                                     const std::string fontName     = style::window::font::small,
+                                     const RectangleEdgeFlags edges = RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES,
+                                     const Alignment alignment      = Alignment(Alignment::ALIGN_HORIZONTAL_LEFT,
+                                                                           Alignment::ALIGN_VERTICAL_BOTTOM),
+                                     const bool lineMode            = false)
     {
-        return ret;
+        Label *l = new Label(this, x, y, w, h);
+        l->setFilled(false);
+        l->setBorderColor(ColorFullBlack);
+        l->setEdges(edges);
+        l->setFont(fontName);
+        l->setText(text);
+        l->setAlignement(alignment);
+        l->setLineMode(lineMode);
+
+        if (parentPage)
+            parentPage->push_back(l);
+
+        return (l);
     }
 
-    if ((inputEvent.state != InputEvent::State::keyReleasedShort) && ((inputEvent.state != InputEvent::State::keyReleasedLong)))
+    void PhonebookSearch::buildInterface()
     {
-        return (false);
+        AppWindow::buildInterface();
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        setTitle(utils::localize.get("app_phonebook_title_main"));
+
+        searchHeader = addLabel(nullptr,
+                                phonebookStyle::search::searchHeader::x,
+                                phonebookStyle::search::searchHeader::y,
+                                phonebookStyle::search::searchHeader::w,
+                                phonebookStyle::search::searchHeader::h,
+                                utils::localize.get("app_phonebook_search_win_search"));
+        searchHeader->setFont(style::window::font::small);
+
+        inputField = new Text(nullptr,
+                              phonebookStyle::search::horizontalBox::inputField::x,
+                              phonebookStyle::search::horizontalBox::inputField::y,
+                              phonebookStyle::search::horizontalBox::inputField::w,
+                              phonebookStyle::search::horizontalBox::inputField::h);
+        inputField->setTextType(Text::TextType::SINGLE_LINE);
+        inputField->setEditMode(Text::EditMode::EDIT);
+        inputField->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        inputField->setInputMode(new InputMode({InputMode::ABC, InputMode::abc}));
+        inputField->setFont(style::window::font::mediumbold);
+
+        searchTop = new Image(nullptr,
+                              phonebookStyle::search::horizontalBox::searchTop::x,
+                              phonebookStyle::search::horizontalBox::searchTop::y,
+                              phonebookStyle::search::horizontalBox::searchTop::w,
+                              phonebookStyle::search::horizontalBox::searchTop::h,
+                              "search");
+
+        horizontalBox = new HBox(this,
+                                 phonebookStyle::search::horizontalBox::x,
+                                 phonebookStyle::search::horizontalBox::y,
+                                 phonebookStyle::search::horizontalBox::w,
+                                 phonebookStyle::search::horizontalBox::h);
+        horizontalBox->addWidget(inputField);
+        horizontalBox->addWidget(searchTop);
+        horizontalBox->setPenWidth(phonebookStyle::search::horizontalBox::penWidth);
+        horizontalBox->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+
+        bottomBar->setActive(BottomBar::Side::LEFT, false);
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_search"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
+
+        setFocusItem(inputField);
     }
 
-    if (inputEvent.keyCode == KeyCode::KEY_ENTER)
+    void PhonebookSearch::rebuild()
+    {}
+
+    void PhonebookSearch::destroyInterface()
     {
-        LOG_INFO("Enter pressed");
-        std::string contents = utils::trim(inputField->getText());
-        std::shared_ptr<std::vector<ContactRecord>> searchResults;
-        std::string primaryName = "";
-        std::string alternativeName = "";
-        std::string number = "";
+        AppWindow::destroyInterface();
+    }
 
-        if (contents.size() > 0)
-        {
-            if (utils::is_number(contents) || contents.find('+') != std::string::npos)
-            {
-                number = contents;
-            }
-            else if (contents.find(' ') != std::string::npos)
-            {
-                std::vector<std::string> result = utils::split(contents, ' ');
-                primaryName = result[0];
-                alternativeName = result[1];
-            }
-            else
-            {
-                primaryName = contents;
-            }
+    void PhonebookSearch::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        setFocusItem(inputField);
+    }
 
-            LOG_INFO("searching for pri:%s alt:%s num:%s", primaryName.c_str(), alternativeName.c_str(), number.c_str());
-            searchResults = DBServiceAPI::ContactSearch(application, primaryName, alternativeName, number);
-            if (searchResults.get()->size() > 0)
-            {
-                std::unique_ptr<PhonebookSearchResultsData> data = std::make_unique<PhonebookSearchResultsData>(inputField->getText());
-                data->setResults(searchResults);
-                application->switchWindow("SearchResults", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-            }
-            else
-            {
-                std::unique_ptr<gui::SwitchData> data = std::make_unique<PhonebookSearchQuery>(inputField->getText());
-                application->switchWindow("NoResults", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
-            }
-            return (true);
+    bool PhonebookSearch::handleSwitchData(SwitchData *data)
+    {
+        if (data == nullptr) {
+            LOG_ERROR("Received null pointer");
+            return false;
         }
+
+        PhonebookSearchQuery *item = dynamic_cast<PhonebookSearchQuery *>(data);
+        inputField->setText(item->getQuery());
+
+        return (true);
     }
 
-    return (ret);
-}
+    bool PhonebookSearch::onInput(const InputEvent &inputEvent)
+    {
+        bool ret = AppWindow::onInput(inputEvent);
+        if (ret) {
+            return ret;
+        }
+
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort) &&
+            ((inputEvent.state != InputEvent::State::keyReleasedLong))) {
+            return (false);
+        }
+
+        if (inputEvent.keyCode == KeyCode::KEY_ENTER) {
+            LOG_INFO("Enter pressed");
+            std::string contents = utils::trim(inputField->getText());
+            std::shared_ptr<std::vector<ContactRecord>> searchResults;
+            std::string primaryName     = "";
+            std::string alternativeName = "";
+            std::string number          = "";
+
+            if (contents.size() > 0) {
+                if (utils::is_number(contents) || contents.find('+') != std::string::npos) {
+                    number = contents;
+                }
+                else if (contents.find(' ') != std::string::npos) {
+                    std::vector<std::string> result = utils::split(contents, ' ');
+                    primaryName                     = result[0];
+                    alternativeName                 = result[1];
+                }
+                else {
+                    primaryName = contents;
+                }
+
+                LOG_INFO(
+                    "searching for pri:%s alt:%s num:%s", primaryName.c_str(), alternativeName.c_str(), number.c_str());
+                searchResults = DBServiceAPI::ContactSearch(application, primaryName, alternativeName, number);
+                if (searchResults.get()->size() > 0) {
+                    std::unique_ptr<PhonebookSearchResultsData> data =
+                        std::make_unique<PhonebookSearchResultsData>(inputField->getText());
+                    data->setResults(searchResults);
+                    application->switchWindow("SearchResults", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+                }
+                else {
+                    std::unique_ptr<gui::SwitchData> data =
+                        std::make_unique<PhonebookSearchQuery>(inputField->getText());
+                    application->switchWindow("NoResults", gui::ShowMode::GUI_SHOW_INIT, std::move(data));
+                }
+                return (true);
+            }
+        }
+
+        return (ret);
+    }
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookSearch.hpp b/module-apps/application-phonebook/windows/PhonebookSearch.hpp
index 1790946ce..6f44c34cd 100644
--- a/module-apps/application-phonebook/windows/PhonebookSearch.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookSearch.hpp
@@ -12,37 +12,46 @@
 #include <string>
 #include <widgets/BoxLayout.hpp>
 
-namespace gui {
-
-class PhonebookSearch : public AppWindow
+namespace gui
 {
-  protected:
-    /** labels */
-    Label *searchHeader = nullptr;
-    Text *inputField = nullptr;
-    HBox *horizontalBox = nullptr;
-    Image *searchTop = nullptr;
 
-    PhonebookModel *phonebookModel = nullptr;
+    class PhonebookSearch : public AppWindow
+    {
+      protected:
+        /** labels */
+        Label *searchHeader = nullptr;
+        Text *inputField    = nullptr;
+        HBox *horizontalBox = nullptr;
+        Image *searchTop    = nullptr;
 
-    /** currently displayed contact */
-    std::shared_ptr<ContactRecord> contact = nullptr;
+        PhonebookModel *phonebookModel = nullptr;
 
-  public:
-    PhonebookSearch(app::Application *app);
-    virtual ~PhonebookSearch();
+        /** currently displayed contact */
+        std::shared_ptr<ContactRecord> contact = nullptr;
 
-    // virtual methods
-    bool onInput(const InputEvent &inputEvent) override;
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    bool handleSwitchData(SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
+      public:
+        PhonebookSearch(app::Application *app);
+        virtual ~PhonebookSearch();
 
-  private:
-    Label *addLabel(std::list<Item *> *parentPage, int x, int y, int w, int h, const std::string text, const std::string fontName,
-                    const RectangleEdgeFlags edges, const Alignment alignment, const bool lineMode);
-};
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool handleSwitchData(SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+
+      private:
+        Label *addLabel(std::list<Item *> *parentPage,
+                        int x,
+                        int y,
+                        int w,
+                        int h,
+                        const std::string text,
+                        const std::string fontName,
+                        const RectangleEdgeFlags edges,
+                        const Alignment alignment,
+                        const bool lineMode);
+    };
 
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookSearchResults.cpp b/module-apps/application-phonebook/windows/PhonebookSearchResults.cpp
index 1bee8cbac..24bddd19b 100644
--- a/module-apps/application-phonebook/windows/PhonebookSearchResults.cpp
+++ b/module-apps/application-phonebook/windows/PhonebookSearchResults.cpp
@@ -19,139 +19,136 @@ namespace gui
         : AppWindow(app, name::window::search_results), searchResultsModel{new SearchResultsModel(app)}
     {
         buildInterface();
-}
-
-void PhonebookSearchResults::rebuild()
-{
-    destroyInterface();
-    buildInterface();
-}
-
-void PhonebookSearchResults::buildInterface()
-{
-
-    AppWindow::buildInterface();
-
-    searchResultList = new gui::PhonebookListView(this, phonebookStyle::searchResults::searchResultList::x, phonebookStyle::searchResults::searchResultList::y, phonebookStyle::searchResults::searchResultList::w, phonebookStyle::searchResults::searchResultList::h);
-    searchResultList->setMaxElements(phonebookStyle::searchResults::searchResultList::maxElements);
-    searchResultList->setPageSize(phonebookStyle::searchResults::searchResultList::pageSize);
-    searchResultList->setPenFocusWidth(phonebookStyle::searchResults::searchResultList::penFocusWidth);
-    searchResultList->setPenWidth(phonebookStyle::searchResults::searchResultList::penWidth);
-    searchResultList->setProvider(searchResultsModel);
-    searchResultList->setApplication(application);
-
-    bottomBar->setActive(BottomBar::Side::LEFT, true);
-    bottomBar->setActive(BottomBar::Side::CENTER, true);
-    bottomBar->setActive(BottomBar::Side::RIGHT, true);
-    bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_phonebook_call"));
-    bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_open"));
-    bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
-
-    topBar->setActive(TopBar::Elements::TIME, true);
-
-    setTitle(utils::localize.get("app_phonebook_search_results_prefix"));
-}
-
-void PhonebookSearchResults::destroyInterface()
-{
-    AppWindow::destroyInterface();
-    if (searchResultList)
-    {
-        removeWidget(searchResultList);
-        delete searchResultList;
-        searchResultList = nullptr;
-    }
-    if (newContactImage)
-    {
-        removeWidget(newContactImage);
-        delete newContactImage;
-        newContactImage = nullptr;
     }
 
-    children.clear();
-    delete searchResultsModel;
-}
-
-PhonebookSearchResults::~PhonebookSearchResults()
-{
-    destroyInterface();
-}
-
-void PhonebookSearchResults::onBeforeShow(ShowMode mode, SwitchData *data)
-{
-    setFocusItem(searchResultList);
-    searchResultsModel->requestFavouritesCount();
-}
-
-bool PhonebookSearchResults::onInput(const InputEvent &inputEvent)
-{
-    bool ret = false;
-    if(AppWindow::onInput(inputEvent))
+    void PhonebookSearchResults::rebuild()
     {
-        return true;
+        destroyInterface();
+        buildInterface();
     }
 
-    // process only if key is released
-    if ((inputEvent.state != InputEvent::State::keyReleasedShort) && ((inputEvent.state != InputEvent::State::keyReleasedLong)))
-        return false;
-
-    if (inputEvent.state == InputEvent::State::keyReleasedShort)
+    void PhonebookSearchResults::buildInterface()
     {
-        switch (inputEvent.keyCode)
-        {
-        case KeyCode::KEY_LEFT:
-            LOG_INFO("Adding new contact");
-            application->switchWindow(gui::window::name::newContact);
-            return true;
-        case KeyCode::KEY_RIGHT:
-            LOG_INFO("Searching contact");
-            application->switchWindow("Search");
-            return true;
-        default:
-            break;
+
+        AppWindow::buildInterface();
+
+        searchResultList = new gui::PhonebookListView(this,
+                                                      phonebookStyle::searchResults::searchResultList::x,
+                                                      phonebookStyle::searchResults::searchResultList::y,
+                                                      phonebookStyle::searchResults::searchResultList::w,
+                                                      phonebookStyle::searchResults::searchResultList::h);
+        searchResultList->setMaxElements(phonebookStyle::searchResults::searchResultList::maxElements);
+        searchResultList->setPageSize(phonebookStyle::searchResults::searchResultList::pageSize);
+        searchResultList->setPenFocusWidth(phonebookStyle::searchResults::searchResultList::penFocusWidth);
+        searchResultList->setPenWidth(phonebookStyle::searchResults::searchResultList::penWidth);
+        searchResultList->setProvider(searchResultsModel);
+        searchResultList->setApplication(application);
+
+        bottomBar->setActive(BottomBar::Side::LEFT, true);
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::LEFT, utils::localize.get("app_phonebook_call"));
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("app_phonebook_open"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("app_phonebook_back"));
+
+        topBar->setActive(TopBar::Elements::TIME, true);
+
+        setTitle(utils::localize.get("app_phonebook_search_results_prefix"));
+    }
+
+    void PhonebookSearchResults::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        if (searchResultList) {
+            removeWidget(searchResultList);
+            delete searchResultList;
+            searchResultList = nullptr;
         }
-    }
-
-    // check if any of the lower inheritance onInput methods catch the event
-    return ret;
-}
-
-bool PhonebookSearchResults::handleSwitchData(SwitchData *data)
-{
-    if (data == nullptr)
-        return false;
-
-    auto fill_results = [=](std::shared_ptr<std::vector<ContactRecord>> res, const std::string &title) {
-        if (res == nullptr || res->size() == 0)
-        {
-            return;
+        if (newContactImage) {
+            removeWidget(newContactImage);
+            delete newContactImage;
+            newContactImage = nullptr;
         }
-        searchResultsModel->setResults(res);
-        searchResultList->clear();
-        searchResultList->setElementsCount(res.get()->size());
-        setTitle(utils::localize.get("app_phonebook_search_results_prefix") + "\"" + title + "\"");
-    };
 
-    auto searchResults = dynamic_cast<PhonebookSearchResultsData *>(data);
-    if (searchResults)
-    {
-        fill_results(searchResults->getResults(), searchResults->getQuery());
-        return (true);
+        children.clear();
+        delete searchResultsModel;
     }
 
-    auto contactRequest = dynamic_cast<PhonebookSearchReuqest *>(data);
-    if (contactRequest)
+    PhonebookSearchResults::~PhonebookSearchResults()
     {
-        searchResultList->cb_ENTER = [=](gui::PhonebookItem *item) {
-            std::unique_ptr<PhonebookSearchReuqest> data = std::make_unique<PhonebookSearchReuqest>();
-            data->result = item->getContact();
-            data->setDescription("PhonebookSearchRequest");
-            return sapm::ApplicationManager::messageSwitchPreviousApplication(
-                application, std::make_unique<sapm::APMSwitchPrevApp>(application->GetName(), std::move(data)));
+        destroyInterface();
+    }
+
+    void PhonebookSearchResults::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        setFocusItem(searchResultList);
+        searchResultsModel->requestFavouritesCount();
+    }
+
+    bool PhonebookSearchResults::onInput(const InputEvent &inputEvent)
+    {
+        bool ret = false;
+        if (AppWindow::onInput(inputEvent)) {
+            return true;
+        }
+
+        // process only if key is released
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort) &&
+            ((inputEvent.state != InputEvent::State::keyReleasedLong)))
+            return false;
+
+        if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+            switch (inputEvent.keyCode) {
+            case KeyCode::KEY_LEFT:
+                LOG_INFO("Adding new contact");
+                application->switchWindow(gui::window::name::newContact);
+                return true;
+            case KeyCode::KEY_RIGHT:
+                LOG_INFO("Searching contact");
+                application->switchWindow("Search");
+                return true;
+            default:
+                break;
+            }
+        }
+
+        // check if any of the lower inheritance onInput methods catch the event
+        return ret;
+    }
+
+    bool PhonebookSearchResults::handleSwitchData(SwitchData *data)
+    {
+        if (data == nullptr)
+            return false;
+
+        auto fill_results = [=](std::shared_ptr<std::vector<ContactRecord>> res, const std::string &title) {
+            if (res == nullptr || res->size() == 0) {
+                return;
+            }
+            searchResultsModel->setResults(res);
+            searchResultList->clear();
+            searchResultList->setElementsCount(res.get()->size());
+            setTitle(utils::localize.get("app_phonebook_search_results_prefix") + "\"" + title + "\"");
         };
-        fill_results(contactRequest->results, contactRequest->request);
-    }
 
-    return (false);
-}
+        auto searchResults = dynamic_cast<PhonebookSearchResultsData *>(data);
+        if (searchResults) {
+            fill_results(searchResults->getResults(), searchResults->getQuery());
+            return (true);
+        }
+
+        auto contactRequest = dynamic_cast<PhonebookSearchReuqest *>(data);
+        if (contactRequest) {
+            searchResultList->cb_ENTER = [=](gui::PhonebookItem *item) {
+                std::unique_ptr<PhonebookSearchReuqest> data = std::make_unique<PhonebookSearchReuqest>();
+                data->result                                 = item->getContact();
+                data->setDescription("PhonebookSearchRequest");
+                return sapm::ApplicationManager::messageSwitchPreviousApplication(
+                    application, std::make_unique<sapm::APMSwitchPrevApp>(application->GetName(), std::move(data)));
+            };
+            fill_results(contactRequest->results, contactRequest->request);
+        }
+
+        return (false);
+    }
 } /* namespace gui */
diff --git a/module-apps/application-phonebook/windows/PhonebookSearchResults.hpp b/module-apps/application-phonebook/windows/PhonebookSearchResults.hpp
index 42355285d..178f292cb 100644
--- a/module-apps/application-phonebook/windows/PhonebookSearchResults.hpp
+++ b/module-apps/application-phonebook/windows/PhonebookSearchResults.hpp
@@ -22,25 +22,25 @@ namespace gui
         };
     }; // namespace name
 
-class PhonebookSearchResults : public AppWindow
-{
-  protected:
-    PhonebookListView *searchResultList = nullptr;
-    SearchResultsModel *searchResultsModel = nullptr;
+    class PhonebookSearchResults : public AppWindow
+    {
+      protected:
+        PhonebookListView *searchResultList    = nullptr;
+        SearchResultsModel *searchResultsModel = nullptr;
 
-    Image *newContactImage = nullptr;
+        Image *newContactImage = nullptr;
 
-  public:
-    PhonebookSearchResults(app::Application *app);
-    virtual ~PhonebookSearchResults();
+      public:
+        PhonebookSearchResults(app::Application *app);
+        virtual ~PhonebookSearchResults();
 
-    // virtual methods
-    bool onInput(const InputEvent &inputEvent) override;
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    bool handleSwitchData(SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
-};
+        // virtual methods
+        bool onInput(const InputEvent &inputEvent) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool handleSwitchData(SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
diff --git a/module-apps/application-settings/ApplicationSettings.cpp b/module-apps/application-settings/ApplicationSettings.cpp
index ded65b0ea..4729d3411 100644
--- a/module-apps/application-settings/ApplicationSettings.cpp
+++ b/module-apps/application-settings/ApplicationSettings.cpp
@@ -21,7 +21,6 @@
 
 #include "windows/TestMessageWindow.hpp"
 
-
 #include "ApplicationSettings.hpp"
 
 #include "service-cellular/ServiceCellular.hpp"
@@ -29,80 +28,83 @@
 #include "windows/SimSelectWindow.hpp"
 #include <i18/i18.hpp>
 
-namespace app {
+namespace app
+{
 
-ApplicationSettings::ApplicationSettings(std::string name, std::string parent, bool startBackgound) :
-	Application( name, parent, startBackgound ) {
-}
+    ApplicationSettings::ApplicationSettings(std::string name, std::string parent, bool startBackgound)
+        : Application(name, parent, startBackgound)
+    {}
 
-ApplicationSettings::~ApplicationSettings() {
-}
+    ApplicationSettings::~ApplicationSettings()
+    {}
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationSettings::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationSettings::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
 
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode ==
-		sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
 
-	//this variable defines whether message was processed.
-	bool handled = true;
+        // this variable defines whether message was processed.
+        bool handled = true;
 
-	if( handled )
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    }
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationSettings::InitHandler() {
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationSettings::InitHandler()
+    {
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-	createUserInterface();
+        createUserInterface();
 
-    setActiveWindow(gui::name::window::main_window);
+        setActiveWindow(gui::name::window::main_window);
 
-    return ret;
-}
+        return ret;
+    }
 
-sys::ReturnCodes ApplicationSettings::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
+    sys::ReturnCodes ApplicationSettings::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-void ApplicationSettings::createUserInterface() {
+    void ApplicationSettings::createUserInterface()
+    {
 
-	gui::AppWindow* window = nullptr;
+        gui::AppWindow *window = nullptr;
 
-	window = newOptionWindow(this, gui::name::window::main_window, mainWindowOptions(this));
-    window->setTitle(utils::localize.get("app_settings_title_main"));
-    windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = newOptionWindow(this, gui::name::window::main_window, mainWindowOptions(this));
+        window->setTitle(utils::localize.get("app_settings_title_main"));
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::LanguageWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::LanguageWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::BtWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::BtWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::UiTestWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::UiTestWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-	window = new gui::Info(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
+        window = new gui::Info(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
 
-    window = new gui::DateTimeWindow(this);
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
-	window = newOptionWindow(this, app::sim_select, simSelectWindow(this));
-    windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = new gui::DateTimeWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+        window = newOptionWindow(this, app::sim_select, simSelectWindow(this));
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
 
-}
-
-void ApplicationSettings::destroyUserInterface() {
-}
+    void ApplicationSettings::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-settings/ApplicationSettings.hpp b/module-apps/application-settings/ApplicationSettings.hpp
index 5cf475f4a..1ff9085b5 100644
--- a/module-apps/application-settings/ApplicationSettings.hpp
+++ b/module-apps/application-settings/ApplicationSettings.hpp
@@ -11,24 +11,29 @@
 
 #include "Application.hpp"
 
-namespace app {
+namespace app
+{
 
-inline const std::string name_settings = "ApplicationSettings";
-inline const std::string sim_select = "SimSelect";
+    inline const std::string name_settings = "ApplicationSettings";
+    inline const std::string sim_select    = "SimSelect";
 
-class ApplicationSettings: public app::Application {
-public:
-	ApplicationSettings( std::string name=name_settings, std::string parent = "", bool startBackgound = false);
-	virtual ~ApplicationSettings();
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+    class ApplicationSettings : public app::Application
+    {
+      public:
+        ApplicationSettings(std::string name = name_settings, std::string parent = "", bool startBackgound = false);
+        virtual ~ApplicationSettings();
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-settings/windows/BtWindow.cpp b/module-apps/application-settings/windows/BtWindow.cpp
index 5c4292c4d..800fda15e 100644
--- a/module-apps/application-settings/windows/BtWindow.cpp
+++ b/module-apps/application-settings/windows/BtWindow.cpp
@@ -18,100 +18,105 @@
 namespace gui
 {
 
-BtWindow::BtWindow(app::Application *app) : AppWindow(app, "Bluetooth") { buildInterface(); }
-
-void BtWindow::rebuild()
-{
-    destroyInterface();
-    buildInterface();
-}
-
-void add_box_label(VBox *layout, UTF8 name, std::function<bool(Item &)> foo)
-{
-    auto el = new gui::Label(nullptr, 0, 0, layout->getWidth(), style::window::label::default_h);
-    style::window::decorateOption(el);
-    el->setText(name);
-    el->activatedCallback = foo;
-    layout->addWidget(el);
-}
-
-sys::ReturnCodes message_bt(app::Application* app, BluetoothMessage::Request req) {
-    std::shared_ptr<BluetoothMessage> msg = std::make_shared<BluetoothMessage>(req);
-    auto ret = sys::Bus::SendUnicast(msg,"ServiceBluetooth",app,5000);
-    if(ret.first != sys::ReturnCodes::Success) {
-        LOG_ERROR("err: %d",ret.first);
+    BtWindow::BtWindow(app::Application *app) : AppWindow(app, "Bluetooth")
+    {
+        buildInterface();
     }
-    return ret.first;
-}
 
-void BtWindow::buildInterface()
-{
-    AppWindow::buildInterface();
-    bottomBar->setActive(BottomBar::Side::CENTER, true);
-    bottomBar->setActive(BottomBar::Side::RIGHT, true);
-    bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
-    bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
-    topBar->setActive(TopBar::Elements::SIGNAL, true);
-    topBar->setActive(TopBar::Elements::BATTERY, true);
+    void BtWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
 
-    setTitle(utils::localize.get("app_settings_bt"));
+    void add_box_label(VBox *layout, UTF8 name, std::function<bool(Item &)> foo)
+    {
+        auto el = new gui::Label(nullptr, 0, 0, layout->getWidth(), style::window::label::default_h);
+        style::window::decorateOption(el);
+        el->setText(name);
+        el->activatedCallback = foo;
+        layout->addWidget(el);
+    }
 
-    LOG_INFO("Create box layout");
-    box = new gui::VBox(this, 0, title->offset_h(), style::window_width, 5*style::window::label::default_h);
-    box->setPenWidth(style::window::default_border_no_focus_w);
-
-    // TODO WIP: it's just for usability now
-    // TODO scan should return async - handle that... (if in scan -> add to list and refresh if new on window)
-    add_box_label(box, "Bluetooth on off", [=](Item &) {
-        LOG_DEBUG("Callback Bluetooth on");
-        message_bt(application, BluetoothMessage::Request::Start);
-        for (auto &el : box->children)
-        {
-            el->visible = true;
+    sys::ReturnCodes message_bt(app::Application *app, BluetoothMessage::Request req)
+    {
+        std::shared_ptr<BluetoothMessage> msg = std::make_shared<BluetoothMessage>(req);
+        auto ret                              = sys::Bus::SendUnicast(msg, "ServiceBluetooth", app, 5000);
+        if (ret.first != sys::ReturnCodes::Success) {
+            LOG_ERROR("err: %d", ret.first);
         }
-        box->setVisible(true);
-        application->render(gui::RefreshModes::GUI_REFRESH_FAST);
-        return true;
-    });
+        return ret.first;
+    }
 
-    add_box_label(box, "  -> All devices", [=](Item &) {
-        LOG_DEBUG("Callback all devices");
-        message_bt(application, BluetoothMessage::Request::Scan);
-        return true;
-    });
+    void BtWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+        topBar->setActive(TopBar::Elements::SIGNAL, true);
+        topBar->setActive(TopBar::Elements::BATTERY, true);
 
-    add_box_label(box, "  -> PAN", [=](Item &) {
-        LOG_DEBUG("Callback start PAN");
-        message_bt(application, BluetoothMessage::Request::PAN);
-        return true;
-    });
+        setTitle(utils::localize.get("app_settings_bt"));
 
-    add_box_label(box, "  -> Visibility", [=](Item &) {
-        LOG_DEBUG("Callback visibility");
-        message_bt(application, BluetoothMessage::Request::Visible);
-        return true;
-    });
+        LOG_INFO("Create box layout");
+        box = new gui::VBox(this, 0, title->offset_h(), style::window_width, 5 * style::window::label::default_h);
+        box->setPenWidth(style::window::default_border_no_focus_w);
 
-    // hide all elements except button for `bluetooth on off` - this would cause infinite loop
-    std::for_each(std::next(box->children.begin()), box->children.end(), [](auto &el) { el->visible = false; });
-    setFocusItem(box);
-}
+        // TODO WIP: it's just for usability now
+        // TODO scan should return async - handle that... (if in scan -> add to list and refresh if new on window)
+        add_box_label(box, "Bluetooth on off", [=](Item &) {
+            LOG_DEBUG("Callback Bluetooth on");
+            message_bt(application, BluetoothMessage::Request::Start);
+            for (auto &el : box->children) {
+                el->visible = true;
+            }
+            box->setVisible(true);
+            application->render(gui::RefreshModes::GUI_REFRESH_FAST);
+            return true;
+        });
 
-bool BtWindow::onInput(const InputEvent &inputEvent)
-{
-    return AppWindow::onInput(inputEvent);
-}
+        add_box_label(box, "  -> All devices", [=](Item &) {
+            LOG_DEBUG("Callback all devices");
+            message_bt(application, BluetoothMessage::Request::Scan);
+            return true;
+        });
 
-void BtWindow::destroyInterface()
-{
-    this->focusItem = nullptr;
-    AppWindow::destroyInterface();
-}
+        add_box_label(box, "  -> PAN", [=](Item &) {
+            LOG_DEBUG("Callback start PAN");
+            message_bt(application, BluetoothMessage::Request::PAN);
+            return true;
+        });
 
-BtWindow::~BtWindow() {
-    destroyInterface();
-}
+        add_box_label(box, "  -> Visibility", [=](Item &) {
+            LOG_DEBUG("Callback visibility");
+            message_bt(application, BluetoothMessage::Request::Visible);
+            return true;
+        });
 
-void BtWindow::onBeforeShow(ShowMode mode, SwitchData *data) {}
+        // hide all elements except button for `bluetooth on off` - this would cause infinite loop
+        std::for_each(std::next(box->children.begin()), box->children.end(), [](auto &el) { el->visible = false; });
+        setFocusItem(box);
+    }
+
+    bool BtWindow::onInput(const InputEvent &inputEvent)
+    {
+        return AppWindow::onInput(inputEvent);
+    }
+
+    void BtWindow::destroyInterface()
+    {
+        this->focusItem = nullptr;
+        AppWindow::destroyInterface();
+    }
+
+    BtWindow::~BtWindow()
+    {
+        destroyInterface();
+    }
+
+    void BtWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {}
 
 } // namespace gui
diff --git a/module-apps/application-settings/windows/BtWindow.hpp b/module-apps/application-settings/windows/BtWindow.hpp
index ed7765073..07d2541fa 100644
--- a/module-apps/application-settings/windows/BtWindow.hpp
+++ b/module-apps/application-settings/windows/BtWindow.hpp
@@ -13,24 +13,24 @@
 namespace gui
 {
 
-class BtWindow : public AppWindow
-{
-  protected:
-    std::vector<gui::Item *> options;
-    VBox* box;
+    class BtWindow : public AppWindow
+    {
+      protected:
+        std::vector<gui::Item *> options;
+        VBox *box;
 
-    gui::Item *addOptionLabel(const std::string &text, std::function<bool(Item &)> activatedCallback);
+        gui::Item *addOptionLabel(const std::string &text, std::function<bool(Item &)> activatedCallback);
 
-  public:
-    BtWindow(app::Application *app);
-    virtual ~BtWindow();
+      public:
+        BtWindow(app::Application *app);
+        virtual ~BtWindow();
 
-    // virtual methods
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    bool onInput(const InputEvent &inputEvent) override;
-    void destroyInterface() override;
-    void set_navigation();
-};
+        // virtual methods
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        bool onInput(const InputEvent &inputEvent) override;
+        void destroyInterface() override;
+        void set_navigation();
+    };
 } // namespace gui
diff --git a/module-apps/application-settings/windows/DateTimeWindow.cpp b/module-apps/application-settings/windows/DateTimeWindow.cpp
index 8736c6a83..3b6fc0bf6 100644
--- a/module-apps/application-settings/windows/DateTimeWindow.cpp
+++ b/module-apps/application-settings/windows/DateTimeWindow.cpp
@@ -55,54 +55,53 @@ namespace gui
         utils::time::Timestamp time;
 
         SettingsRecord appSettings = application->getSettings();
-        timeFormat12h = appSettings.timeFormat12;
-        timeDateFormat = appSettings.timeDateFormat;
+        timeFormat12h              = appSettings.timeFormat12;
+        timeDateFormat             = appSettings.timeDateFormat;
 
         // create date widgets
         dateBody = new gui::HBox(this, style::window::default_left_margin, (uint32_t)title->offset_h(), w, h);
 
-        auto item = addDateTimeItem(nullptr, utils::localize.get("app_settings_title_day"), time.get_date_time_substr(utils::time::GetParameters::Day));
+        auto item = addDateTimeItem(nullptr,
+                                    utils::localize.get("app_settings_title_day"),
+                                    time.get_date_time_substr(utils::time::GetParameters::Day));
         dateItems.insert(std::pair<DateTimeItems, Item *>(DateTimeItems::Day, item));
 
-        item = addDateTimeItem(nullptr, utils::localize.get("app_settings_title_month"), time.get_date_time_substr(utils::time::GetParameters::Month));
+        item = addDateTimeItem(nullptr,
+                               utils::localize.get("app_settings_title_month"),
+                               time.get_date_time_substr(utils::time::GetParameters::Month));
         dateItems.insert(std::pair<DateTimeItems, Item *>(DateTimeItems::Month, item));
 
-        item = addDateTimeItem(nullptr, utils::localize.get("app_settings_title_year"), time.get_date_time_substr(utils::time::GetParameters::Year));
+        item = addDateTimeItem(nullptr,
+                               utils::localize.get("app_settings_title_year"),
+                               time.get_date_time_substr(utils::time::GetParameters::Year));
         dateItems.insert(std::pair<DateTimeItems, Item *>(DateTimeItems::Year, item));
 
-        if (timeDateFormat)
-        {
+        if (timeDateFormat) {
             auto toAdd = dateItems.find(DateTimeItems::Day);
-            if (toAdd != dateItems.end())
-            {
+            if (toAdd != dateItems.end()) {
                 dateBody->addWidget(toAdd->second);
                 dateBody->addWidget(addSpacer(""));
             }
             toAdd = dateItems.find(DateTimeItems::Month);
-            if (toAdd != dateItems.end())
-            {
+            if (toAdd != dateItems.end()) {
                 dateBody->addWidget(toAdd->second);
             }
         }
-        else
-        {
+        else {
             auto toAdd = dateItems.find(DateTimeItems::Month);
-            if (toAdd != dateItems.end())
-            {
+            if (toAdd != dateItems.end()) {
                 dateBody->addWidget(toAdd->second);
                 dateBody->addWidget(addSpacer(""));
             }
             toAdd = dateItems.find(DateTimeItems::Day);
-            if (toAdd != dateItems.end())
-            {
+            if (toAdd != dateItems.end()) {
                 dateBody->addWidget(toAdd->second);
             }
         }
         dateBody->addWidget(addSpacer(""));
 
         auto toAdd = dateItems.find(DateTimeItems::Year);
-        if (toAdd != dateItems.end())
-        {
+        if (toAdd != dateItems.end()) {
             dateBody->addWidget(toAdd->second);
         }
 
@@ -112,17 +111,15 @@ namespace gui
 
         auto hourValue = time.get_date_time_sub_value(utils::time::GetParameters::Hour);
 
-        if (timeFormat12h)
-        {
-            if (hourValue > 12)
-            {
+        if (timeFormat12h) {
+            if (hourValue > 12) {
                 hourValue -= 12;
                 dayPeriod = true;
             }
         }
 
         timeBody = new gui::HBox(this, style::window::default_left_margin, (uint32_t)title->offset_h() * 2, w, h);
-        item = addDateTimeItem(nullptr, utils::localize.get("app_settings_title_time"), std::to_string(hourValue));
+        item     = addDateTimeItem(nullptr, utils::localize.get("app_settings_title_time"), std::to_string(hourValue));
         timeItems.insert(std::pair<DateTimeItems, Item *>(DateTimeItems::Hour, item));
         timeBody->addWidget(item);
         timeBody->addWidget(addSpacer(":"));
@@ -133,19 +130,15 @@ namespace gui
         timeBody->addWidget(addSpacer(""));
 
         item = addDateTimeItem(nullptr, (""), (""));
-        if (timeFormat12h)
-        {
-            if (dayPeriod)
-            {
+        if (timeFormat12h) {
+            if (dayPeriod) {
                 item->setText("PM");
             }
-            else
-            {
+            else {
                 item->setText("AM");
             }
         }
-        else
-        {
+        else {
             item->setVisible(false);
         }
         timeItems.insert(std::pair<DateTimeItems, Item *>(DateTimeItems::Hour, item));
@@ -168,8 +161,7 @@ namespace gui
     }
 
     DateTimeWindow::~DateTimeWindow()
-    {
-    }
+    {}
 
     void DateTimeWindow::onBeforeShow(ShowMode mode, SwitchData *data)
     {
@@ -178,11 +170,13 @@ namespace gui
 
     gui::Label *DateTimeWindow::addSpacer(const UTF8 &text)
     {
-        auto label = new gui::Label(nullptr, 0, 0, style::settings::date::date_time_spacer_width, style::settings::date::date_time_item_height);
+        auto label = new gui::Label(
+            nullptr, 0, 0, style::settings::date::date_time_spacer_width, style::settings::date::date_time_item_height);
         label->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
         label->setText(text);
         label->setFont(style::window::font::verybig);
-        label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        label->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
         label->activeItem = false;
         label->setVisible(true);
         return label;
@@ -191,14 +185,18 @@ namespace gui
     gui::Label *DateTimeWindow::addDateTimeItem(Item *parent, const UTF8 &itemTitle, const UTF8 &value)
     {
 
-        gui::Label *label = new gui::Label(this, style::settings::date::date_time_x_offset, 0, style::settings::date::date_time_item_width,
+        gui::Label *label = new gui::Label(this,
+                                           style::settings::date::date_time_x_offset,
+                                           0,
+                                           style::settings::date::date_time_item_width,
                                            style::settings::date::date_time_item_height);
         label->setMargins(gui::Margins(16, 0, 0, 0));
         label->setFilled(false);
         label->setPenFocusWidth(3);
         label->setPenWidth(1);
         label->setFont(style::window::font::verybig);
-        label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        label->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
         label->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
         label->activatedCallback = [=](gui::Item &) {
             this->setRTC();
@@ -207,7 +205,11 @@ namespace gui
         };
         label->setText(value);
 
-        Label *title = new gui::Label(label, 0, 0, style::settings::date::date_time_item_width, style::settings::date::date_time_item_title_height);
+        Label *title = new gui::Label(label,
+                                      0,
+                                      0,
+                                      style::settings::date::date_time_item_width,
+                                      style::settings::date::date_time_item_title_height);
         title->setText(itemTitle);
         title->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
         title->setFont(style::window::font::verysmall);
@@ -217,41 +219,31 @@ namespace gui
     bool DateTimeWindow::onInput(const InputEvent &inputEvent)
     {
         bool ret = false;
-        if (AppWindow::onInput(inputEvent))
-        {
+        if (AppWindow::onInput(inputEvent)) {
 
             return true;
         }
-        else
-        {
-            if (inputEvent.state == gui::InputEvent::State::keyReleasedShort)
-            {
-                auto key = std::to_string(gui::toNumeric(inputEvent.keyCode));
+        else {
+            if (inputEvent.state == gui::InputEvent::State::keyReleasedShort) {
+                auto key   = std::to_string(gui::toNumeric(inputEvent.keyCode));
                 auto value = gui::toNumeric(inputEvent.keyCode);
                 // handle numeric keys
-                if (value >= 0)
-                {
-                    if (focusItem == dateBody)
-                    {
+                if (value >= 0) {
+                    if (focusItem == dateBody) {
                         setDate(value);
                     }
-                    else if (focusItem == timeBody)
-                    {
+                    else if (focusItem == timeBody) {
                         setTime(value);
                     }
                     ret = true;
                 }
-                else if (inputEvent.keyCode == gui::KeyCode::KEY_PND)
-                {
-                    if (focusItem == dateBody || focusItem == timeBody)
-                    {
+                else if (inputEvent.keyCode == gui::KeyCode::KEY_PND) {
+                    if (focusItem == dateBody || focusItem == timeBody) {
                         auto item = dynamic_cast<gui::Label *>(focusItem->focusItem);
-                        if (item != nullptr)
-                        {
+                        if (item != nullptr) {
                             auto itemValue = item->getText();
-                            auto len = itemValue.length();
-                            if (len > 0)
-                            {
+                            auto len       = itemValue.length();
+                            if (len > 0) {
                                 itemValue.removeChar(len - 1);
                                 item->setText(itemValue);
                                 application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
@@ -269,26 +261,20 @@ namespace gui
 
         std::string ret;
 
-        if (itemType == DateTimeItems::Day || itemType == DateTimeItems::Month || itemType == DateTimeItems::Year)
-        {
+        if (itemType == DateTimeItems::Day || itemType == DateTimeItems::Month || itemType == DateTimeItems::Year) {
             auto selected = dateItems.find(itemType);
-            if (selected != dateItems.end())
-            {
+            if (selected != dateItems.end()) {
                 auto item = dynamic_cast<gui::Label *>(selected->second);
-                if (item != nullptr)
-                {
+                if (item != nullptr) {
                     ret = item->getText();
                 }
             }
         }
-        if (itemType == DateTimeItems::Hour || itemType == DateTimeItems::Minute)
-        {
+        if (itemType == DateTimeItems::Hour || itemType == DateTimeItems::Minute) {
             auto selected = timeItems.find(itemType);
-            if (selected != timeItems.end())
-            {
+            if (selected != timeItems.end()) {
                 auto item = dynamic_cast<gui::Label *>(selected->second);
-                if (item != nullptr)
-                {
+                if (item != nullptr) {
                     ret = item->getText();
                 }
             }
@@ -300,20 +286,18 @@ namespace gui
     {
         auto item = dynamic_cast<gui::Label *>(focusItem->focusItem);
 
-        if (item != nullptr)
-        {
+        if (item != nullptr) {
             auto itemValue = item->getText();
-            auto key = std::to_string(keyValue);
+            auto key       = std::to_string(keyValue);
             itemValue += key;
             item->setText(itemValue);
 
-            if (utils::time::validateDate(getDateTimeItemValue(DateTimeItems::Day), getDateTimeItemValue(DateTimeItems::Month),
-                                          getDateTimeItemValue(DateTimeItems::Year)))
-            {
+            if (utils::time::validateDate(getDateTimeItemValue(DateTimeItems::Day),
+                                          getDateTimeItemValue(DateTimeItems::Month),
+                                          getDateTimeItemValue(DateTimeItems::Year))) {
                 application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
             }
-            else
-            {
+            else {
                 item->setText(key);
                 application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
             }
@@ -325,26 +309,23 @@ namespace gui
     {
         auto item = dynamic_cast<gui::Label *>(focusItem->focusItem);
 
-        if (item != nullptr)
-        {
+        if (item != nullptr) {
             auto itemValue = item->getText();
-            auto key = std::to_string(keyValue);
-            if (itemValue == "0")
-            {
+            auto key       = std::to_string(keyValue);
+            if (itemValue == "0") {
                 itemValue = key;
             }
-            else
-            {
+            else {
                 itemValue += key;
             }
             item->setText(itemValue);
 
-            if (utils::time::validateTime(getDateTimeItemValue(DateTimeItems::Hour), getDateTimeItemValue(DateTimeItems::Minute), timeFormat12h))
-            {
+            if (utils::time::validateTime(getDateTimeItemValue(DateTimeItems::Hour),
+                                          getDateTimeItemValue(DateTimeItems::Minute),
+                                          timeFormat12h)) {
                 application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
             }
-            else
-            {
+            else {
                 item->setText(key);
                 application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
             }
@@ -357,25 +338,21 @@ namespace gui
     {
         struct tm timeinfo = {0, 0, 0, 0, 0, 0, 0, 0, 0};
 
-        try
-        {
+        try {
             timeinfo.tm_year = std::stoi(getDateTimeItemValue(DateTimeItems::Year)) - 1900;
-            timeinfo.tm_mon = std::stoi(getDateTimeItemValue(DateTimeItems::Month)) - 1;
+            timeinfo.tm_mon  = std::stoi(getDateTimeItemValue(DateTimeItems::Month)) - 1;
             timeinfo.tm_mday = std::stoi(getDateTimeItemValue(DateTimeItems::Day));
 
             auto hourValue = std::stoi(getDateTimeItemValue(DateTimeItems::Hour));
-            if (timeFormat12h)
-            {
-                if (dayPeriod)
-                {
+            if (timeFormat12h) {
+                if (dayPeriod) {
                     hourValue += 12;
                 }
             }
             timeinfo.tm_hour = hourValue;
-            timeinfo.tm_min = std::stoi(getDateTimeItemValue(DateTimeItems::Minute));
+            timeinfo.tm_min  = std::stoi(getDateTimeItemValue(DateTimeItems::Minute));
         }
-        catch (std::exception &e)
-        {
+        catch (std::exception &e) {
             LOG_ERROR("ServiceCellular::getIMSI exception: %s", e.what());
         }
 
diff --git a/module-apps/application-settings/windows/DateTimeWindow.hpp b/module-apps/application-settings/windows/DateTimeWindow.hpp
index b0344fbdc..1ff09a49c 100644
--- a/module-apps/application-settings/windows/DateTimeWindow.hpp
+++ b/module-apps/application-settings/windows/DateTimeWindow.hpp
@@ -38,9 +38,9 @@ namespace gui
         gui::HBox *dateBody = nullptr;
         gui::HBox *timeBody = nullptr;
 
-        bool timeFormat12h = false;
+        bool timeFormat12h  = false;
         bool timeDateFormat = false; // true europe format, flase american format
-        bool dayPeriod = false;      // day period indicator false am, true pm
+        bool dayPeriod      = false; // day period indicator false am, true pm
 
         gui::Label *addDateTimeItem(Item *parent, const UTF8 &itemTitle, const UTF8 &value);
         gui::Label *addSpacer(const UTF8 &text);
diff --git a/module-apps/application-settings/windows/Info.cpp b/module-apps/application-settings/windows/Info.cpp
index aa499a4f3..28ece121d 100644
--- a/module-apps/application-settings/windows/Info.cpp
+++ b/module-apps/application-settings/windows/Info.cpp
@@ -9,7 +9,6 @@
 
 #include <../source/version.hpp>
 
-
 namespace gui
 {
 
@@ -65,7 +64,6 @@ namespace gui
     }
 
     void Info::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
 } // namespace gui
diff --git a/module-apps/application-settings/windows/LanguageWindow.cpp b/module-apps/application-settings/windows/LanguageWindow.cpp
index a6911b4d9..9cb1e8cac 100644
--- a/module-apps/application-settings/windows/LanguageWindow.cpp
+++ b/module-apps/application-settings/windows/LanguageWindow.cpp
@@ -13,7 +13,6 @@
 
 #include "../ApplicationSettings.hpp"
 
-
 #include "i18/i18.hpp"
 
 #include "Label.hpp"
@@ -21,99 +20,110 @@
 #include "LanguageWindow.hpp"
 #include <Style.hpp>
 
-namespace gui {
+namespace gui
+{
 
-LanguageWindow::LanguageWindow( app::Application* app ) : AppWindow(app,"Languages"){
-	buildInterface();
-}
+    LanguageWindow::LanguageWindow(app::Application *app) : AppWindow(app, "Languages")
+    {
+        buildInterface();
+    }
 
-void LanguageWindow::rebuild() {
-	//find which widget has focus
-	uint32_t index = 0;
-	for( uint32_t i=0; i<options.size(); i++ )
-		if( options[i] == getFocusItem()) {
-			index = i;
-			break;
-		}
+    void LanguageWindow::rebuild()
+    {
+        // find which widget has focus
+        uint32_t index = 0;
+        for (uint32_t i = 0; i < options.size(); i++)
+            if (options[i] == getFocusItem()) {
+                index = i;
+                break;
+            }
 
-	destroyInterface();
-	buildInterface();
-	setFocusItem( options[index] );
-}
-void LanguageWindow::buildInterface() {
-	AppWindow::buildInterface();
-	bottomBar->setActive( BottomBar::Side::CENTER, true );
-	bottomBar->setActive( BottomBar::Side::RIGHT, true );
-	bottomBar->setText( BottomBar::Side::CENTER, utils::localize.get("common_select"));
-	bottomBar->setText( BottomBar::Side::RIGHT, utils::localize.get("common_back"));
+        destroyInterface();
+        buildInterface();
+        setFocusItem(options[index]);
+    }
+    void LanguageWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	topBar->setActive(TopBar::Elements::SIGNAL, true  );
-	topBar->setActive(TopBar::Elements::BATTERY, true  );
+        topBar->setActive(TopBar::Elements::SIGNAL, true);
+        topBar->setActive(TopBar::Elements::BATTERY, true);
 
-    setTitle(utils::localize.get("app_settings_title_languages"));
+        setTitle(utils::localize.get("app_settings_title_languages"));
 
-	//add option connectivity option
-	options.push_back( addOptionLabel( utils::localize.get("app_settings_language_english"), [=] (gui::Item& item){
-		LOG_INFO("selected language: english" );
-		sapm::ApplicationManager::messageChangeLanguage( application, utils::Lang::En );
-		return true;} ));
+        // add option connectivity option
+        options.push_back(addOptionLabel(utils::localize.get("app_settings_language_english"), [=](gui::Item &item) {
+            LOG_INFO("selected language: english");
+            sapm::ApplicationManager::messageChangeLanguage(application, utils::Lang::En);
+            return true;
+        }));
 
-	//add option date and time option
-	options.push_back( addOptionLabel( utils::localize.get("app_settings_language_polish"), [=](gui::Item&){
-		LOG_INFO("selected language: polish" );
-		sapm::ApplicationManager::messageChangeLanguage( application, utils::Lang::Pl );
-		return true;} ));
+        // add option date and time option
+        options.push_back(addOptionLabel(utils::localize.get("app_settings_language_polish"), [=](gui::Item &) {
+            LOG_INFO("selected language: polish");
+            sapm::ApplicationManager::messageChangeLanguage(application, utils::Lang::Pl);
+            return true;
+        }));
 
-	//add option display option
-	options.push_back( addOptionLabel( utils::localize.get("app_settings_language_german"), [=](gui::Item&){
-		LOG_INFO("selected language: german" );
-		sapm::ApplicationManager::messageChangeLanguage( application, utils::Lang::De );
-		return true;} ));
+        // add option display option
+        options.push_back(addOptionLabel(utils::localize.get("app_settings_language_german"), [=](gui::Item &) {
+            LOG_INFO("selected language: german");
+            sapm::ApplicationManager::messageChangeLanguage(application, utils::Lang::De);
+            return true;
+        }));
 
-	options.push_back( addOptionLabel( utils::localize.get("app_settings_language_spanish"), [=](gui::Item&){
-		LOG_INFO("selected language: spanish" );
-		sapm::ApplicationManager::messageChangeLanguage( application, utils::Lang::Sp );
-		return true;} ));
+        options.push_back(addOptionLabel(utils::localize.get("app_settings_language_spanish"), [=](gui::Item &) {
+            LOG_INFO("selected language: spanish");
+            sapm::ApplicationManager::messageChangeLanguage(application, utils::Lang::Sp);
+            return true;
+        }));
 
-	//set possition and navigation for labels
-	uint32_t posY = 100;
-	uint32_t size = options.size();
-	for( uint32_t i=0; i<options.size(); i++ ){
-		options[i]->setPosition(17,posY);
-		posY += 60;
-		options[i]->setNavigationItem( NavigationDirection::DOWN, options[(i+1)%size]);
-		options[i]->setNavigationItem( NavigationDirection::UP, options[(size+i-1)%size]);
-	}
-}
-void LanguageWindow::destroyInterface() {
-	AppWindow::destroyInterface();
-	for( uint32_t i=0; i<options.size(); i++ )
-		delete options[i];
-	this->focusItem = nullptr;
-	options.clear();
-	children.clear();
-}
+        // set possition and navigation for labels
+        uint32_t posY = 100;
+        uint32_t size = options.size();
+        for (uint32_t i = 0; i < options.size(); i++) {
+            options[i]->setPosition(17, posY);
+            posY += 60;
+            options[i]->setNavigationItem(NavigationDirection::DOWN, options[(i + 1) % size]);
+            options[i]->setNavigationItem(NavigationDirection::UP, options[(size + i - 1) % size]);
+        }
+    }
+    void LanguageWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
+        for (uint32_t i = 0; i < options.size(); i++)
+            delete options[i];
+        this->focusItem = nullptr;
+        options.clear();
+        children.clear();
+    }
 
-LanguageWindow::~LanguageWindow() {
-}
+    LanguageWindow::~LanguageWindow()
+    {}
 
-gui::Item* LanguageWindow::addOptionLabel( const std::string& text, std::function<bool(Item&)> activatedCallback ) {
-	gui::Label* label = new gui::Label( this, 17,0, 480-34, 60, text );
-	label->setMargins( gui::Margins(16,0,0,0) );
-	label->setFilled( false );
-	label->setPenFocusWidth( 3 );
-	label->setPenWidth( 0 );
-	label->setFont(style::window::font::medium);
-	label->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
-	label->setRadius(11);
-	label->activatedCallback = activatedCallback;
+    gui::Item *LanguageWindow::addOptionLabel(const std::string &text, std::function<bool(Item &)> activatedCallback)
+    {
+        gui::Label *label = new gui::Label(this, 17, 0, 480 - 34, 60, text);
+        label->setMargins(gui::Margins(16, 0, 0, 0));
+        label->setFilled(false);
+        label->setPenFocusWidth(3);
+        label->setPenWidth(0);
+        label->setFont(style::window::font::medium);
+        label->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        label->setRadius(11);
+        label->activatedCallback = activatedCallback;
 
-	return label;
-}
+        return label;
+    }
 
-
-void LanguageWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
-	setFocusItem( options[0] );
-}
+    void LanguageWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        setFocusItem(options[0]);
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-settings/windows/LanguageWindow.hpp b/module-apps/application-settings/windows/LanguageWindow.hpp
index e74463594..25effd3cc 100644
--- a/module-apps/application-settings/windows/LanguageWindow.hpp
+++ b/module-apps/application-settings/windows/LanguageWindow.hpp
@@ -19,27 +19,30 @@
 #include "gui/widgets/BottomBar.hpp"
 #include "gui/widgets/TopBar.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class LanguageWindow: public AppWindow {
-protected:
-	std::vector<gui::Item*> options;
+    /*
+     *
+     */
+    class LanguageWindow : public AppWindow
+    {
+      protected:
+        std::vector<gui::Item *> options;
 
-	gui::Item* addOptionLabel( const std::string& text, std::function<bool(Item&)> activatedCallback );
-public:
-	LanguageWindow( app::Application* app );
-	virtual ~LanguageWindow();
+        gui::Item *addOptionLabel(const std::string &text, std::function<bool(Item &)> activatedCallback);
 
-	//virtual methods
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
+      public:
+        LanguageWindow(app::Application *app);
+        virtual ~LanguageWindow();
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        // virtual methods
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 } /* namespace gui */
 
 #endif /* MODULE_APPS_APPLICATION_SETTINGS_WINDOWS_LANGUAGEWINDOW_HPP_ */
diff --git a/module-apps/application-settings/windows/SettingsMainWindow.cpp b/module-apps/application-settings/windows/SettingsMainWindow.cpp
index ccec7d1c0..b1e98d06d 100644
--- a/module-apps/application-settings/windows/SettingsMainWindow.cpp
+++ b/module-apps/application-settings/windows/SettingsMainWindow.cpp
@@ -6,57 +6,64 @@
 
 std::list<gui::Option> mainWindowOptions(app::Application *app)
 {
-    return {gui::Option{"Info",
-                        [=](gui::Item &item) {
-                            LOG_INFO("switching to TEST UI page");
-                            app->switchWindow(gui::window::hw_info, nullptr);
-                            return true;
-                        },
-                        gui::Arrow::Enabled},
-            {"UI TEST",
-             [=](gui::Item &item) {
-                 LOG_INFO("switching to TEST UI page");
-                 app->switchWindow("TEST_UI", nullptr);
-                 return true;
-             },
-             gui::Arrow::Enabled},
+    return {
+        gui::Option{"Info",
+                    [=](gui::Item &item) {
+                        LOG_INFO("switching to TEST UI page");
+                        app->switchWindow(gui::window::hw_info, nullptr);
+                        return true;
+                    },
+                    gui::Arrow::Enabled},
+        {"UI TEST",
+         [=](gui::Item &item) {
+             LOG_INFO("switching to TEST UI page");
+             app->switchWindow("TEST_UI", nullptr);
+             return true;
+         },
+         gui::Arrow::Enabled},
 
-            {utils::localize.get("app_settings_bt"),
-             [=](gui::Item &item) {
-                 LOG_INFO("switching to bluetooth page");
-                 app->switchWindow("Bluetooth", nullptr);
-                 return true;
-             },
-             gui::Arrow::Enabled},
+        {utils::localize.get("app_settings_bt"),
+         [=](gui::Item &item) {
+             LOG_INFO("switching to bluetooth page");
+             app->switchWindow("Bluetooth", nullptr);
+             return true;
+         },
+         gui::Arrow::Enabled},
 
-            {utils::localize.get("app_settings_language"),
-             [=](gui::Item &) {
-                 LOG_INFO("switching to language page");
-                 app->switchWindow("Languages");
-                 return true;
-             },
-             gui::Arrow::Enabled},
+        {utils::localize.get("app_settings_language"),
+         [=](gui::Item &) {
+             LOG_INFO("switching to language page");
+             app->switchWindow("Languages");
+             return true;
+         },
+         gui::Arrow::Enabled},
 
-            {"SIM SELECT",
-             [=](gui::Item &) {
-                 app->switchWindow(app::sim_select, nullptr);
-                 return true;
-             },
-             gui::Arrow::Enabled},
-            {utils::localize.get("app_settings_date_and_time"),
-             [=](gui::Item &) {
-                 LOG_INFO("switching to date and time page");
-                 app->switchWindow("DateTime");
-                 return true;
-             },
-             gui::Arrow::Enabled},
-            {"[None] " + utils::localize.get("app_settings_display"), [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[None] " + utils::localize.get("app_settings_phone_modes"), [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[None] " + utils::localize.get("app_settings_security"), [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[None] " + utils::localize.get("app_settings_about"), [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
-            {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled}};
+        {"SIM SELECT",
+         [=](gui::Item &) {
+             app->switchWindow(app::sim_select, nullptr);
+             return true;
+         },
+         gui::Arrow::Enabled},
+        {utils::localize.get("app_settings_date_and_time"),
+         [=](gui::Item &) {
+             LOG_INFO("switching to date and time page");
+             app->switchWindow("DateTime");
+             return true;
+         },
+         gui::Arrow::Enabled},
+        {"[None] " + utils::localize.get("app_settings_display"),
+         [=](gui::Item &) { return true; },
+         gui::Arrow::Enabled},
+        {"[None] " + utils::localize.get("app_settings_phone_modes"),
+         [=](gui::Item &) { return true; },
+         gui::Arrow::Enabled},
+        {"[None] " + utils::localize.get("app_settings_security"),
+         [=](gui::Item &) { return true; },
+         gui::Arrow::Enabled},
+        {"[None] " + utils::localize.get("app_settings_about"), [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
+        {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
+        {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
+        {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
+        {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled},
+        {"[Dummy]", [=](gui::Item &) { return true; }, gui::Arrow::Enabled}};
 }
diff --git a/module-apps/application-settings/windows/TestMessageWindow.cpp b/module-apps/application-settings/windows/TestMessageWindow.cpp
index c724a0fee..c05715f47 100644
--- a/module-apps/application-settings/windows/TestMessageWindow.cpp
+++ b/module-apps/application-settings/windows/TestMessageWindow.cpp
@@ -21,128 +21,134 @@
 
 #include "service-cellular/api/CellularServiceAPI.hpp"
 
-namespace gui {
-
-TestMessageWindow::TestMessageWindow(app::Application *app) :
-		AppWindow(app, "Message") {
-	buildInterface();
-}
-
-void TestMessageWindow::rebuild() {
-
-
-	destroyInterface();
-	buildInterface();
-
-}
-
-void textSetInput(Text * text, bool numeric = true)
+namespace gui
 {
-    /// tu ustawiasz że coś jest edytowalne
-    text->setEditMode(gui::Text::EditMode::EDIT);
-    text->setFont(style::window::font::bigbold);
-    /// tu ustawiasz tak naprawdę przez tą listę InputMode::digit etc jakie kolejne tryby wprowadzania są wybierane
-    if(numeric) {
-        text->setInputMode(new InputMode({InputMode::digit}));
-    } else {
-        text->setInputMode(new InputMode({InputMode::ABC, InputMode::abc, InputMode::digit}));
+
+    TestMessageWindow::TestMessageWindow(app::Application *app) : AppWindow(app, "Message")
+    {
+        buildInterface();
     }
-}
 
-void TestMessageWindow::buildInterface() {
-	AppWindow::buildInterface();
-	bottomBar->setActive(BottomBar::Side::CENTER, true);
-	bottomBar->setActive(BottomBar::Side::RIGHT, true);
-	bottomBar->setText(BottomBar::Side::CENTER,
-			utils::localize.get("common_select"));
-	bottomBar->setText(BottomBar::Side::RIGHT,
-			utils::localize.get("common_back"));
+    void TestMessageWindow::rebuild()
+    {
 
-	topBar->setActive(TopBar::Elements::SIGNAL, true);
-	topBar->setActive(TopBar::Elements::BATTERY, true);
+        destroyInterface();
+        buildInterface();
+    }
 
-	receivedLabel = new gui::Label(this,10, 50, 480-20, 50, "Received SMS");
-	receivedLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	receivedLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+    void textSetInput(Text *text, bool numeric = true)
+    {
+        /// tu ustawiasz że coś jest edytowalne
+        text->setEditMode(gui::Text::EditMode::EDIT);
+        text->setFont(style::window::font::bigbold);
+        /// tu ustawiasz tak naprawdę przez tą listę InputMode::digit etc jakie kolejne tryby wprowadzania są wybierane
+        if (numeric) {
+            text->setInputMode(new InputMode({InputMode::digit}));
+        }
+        else {
+            text->setInputMode(new InputMode({InputMode::ABC, InputMode::abc, InputMode::digit}));
+        }
+    }
 
-	receiveNumber = new gui::Label(this,110, 190, 480-120, 50);
-	receiveNumber->setFont(style::window::font::small);
+    void TestMessageWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        bottomBar->setActive(BottomBar::Side::CENTER, true);
+        bottomBar->setActive(BottomBar::Side::RIGHT, true);
+        bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
+        bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
 
-	RecNumberLabel = new gui::Label(this,10, 190, 90, 50, "Number");
-	RecNumberLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	RecNumberLabel->setFont(style::window::font::small);
-	RecNumberLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        topBar->setActive(TopBar::Elements::SIGNAL, true);
+        topBar->setActive(TopBar::Elements::BATTERY, true);
 
-	receiveMessage = new gui::Text(this, 110, 120, 480-120, 50);
-    textSetInput(receiveMessage);
-    receiveMessage->setFont(style::window::font::small);
+        receivedLabel = new gui::Label(this, 10, 50, 480 - 20, 50, "Received SMS");
+        receivedLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        receivedLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-	RecMessageLabel = new gui::Label(this, 10, 120, 90, 50, "Message");
-	RecMessageLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	RecMessageLabel->setFont(style::window::font::small);
-	RecMessageLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        receiveNumber = new gui::Label(this, 110, 190, 480 - 120, 50);
+        receiveNumber->setFont(style::window::font::small);
 
+        RecNumberLabel = new gui::Label(this, 10, 190, 90, 50, "Number");
+        RecNumberLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        RecNumberLabel->setFont(style::window::font::small);
+        RecNumberLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-	sendLabel = new gui::Label(this,10, 290, 480-20, 50, "New SMS");
-	sendLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	sendLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        receiveMessage = new gui::Text(this, 110, 120, 480 - 120, 50);
+        textSetInput(receiveMessage);
+        receiveMessage->setFont(style::window::font::small);
 
-	sendMessage = new gui::Text(this,110, 360, 480-120, 50);
-    textSetInput(sendMessage,false);
-	sendMessage->setText("Siema tu PurePhone :)");
-	sendMessage->setFont(style::window::font::small);
+        RecMessageLabel = new gui::Label(this, 10, 120, 90, 50, "Message");
+        RecMessageLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        RecMessageLabel->setFont(style::window::font::small);
+        RecMessageLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-	sendNumber = new gui::Text(this,110, 430, 480-120, 50);
-    textSetInput(sendNumber);
-    sendNumber->setFont(style::window::font::small);
+        sendLabel = new gui::Label(this, 10, 290, 480 - 20, 50, "New SMS");
+        sendLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        sendLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-    SendNumberLabel = new gui::Label(this, 10, 430, 90, 50, "Number");
-	SendNumberLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	SendNumberLabel->setFont(style::window::font::small);
-	SendNumberLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        sendMessage = new gui::Text(this, 110, 360, 480 - 120, 50);
+        textSetInput(sendMessage, false);
+        sendMessage->setText("Siema tu PurePhone :)");
+        sendMessage->setFont(style::window::font::small);
 
-	SendMessageLabel = new gui::Label(this, 10, 360, 90, 50, "Message");
-	SendMessageLabel->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	SendMessageLabel->setFont(style::window::font::small);
-	SendMessageLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        sendNumber = new gui::Text(this, 110, 430, 480 - 120, 50);
+        textSetInput(sendNumber);
+        sendNumber->setFont(style::window::font::small);
 
-	sendButton = new gui::Label(this,10, 500, 480-20, 50, "Send SMS");
-	sendButton->setAlignement(gui::Alignment( gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
-	sendButton->setPenWidth(1);
-	sendButton->setPenFocusWidth(3);
-	sendButton->activatedCallback = [=] (gui::Item& item) {
-		LOG_INFO("Send SMS callback" );
-		CellularServiceAPI::SendSMS(application, sendNumber->getText(), sendMessage->getText());
-		return true; };
+        SendNumberLabel = new gui::Label(this, 10, 430, 90, 50, "Number");
+        SendNumberLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        SendNumberLabel->setFont(style::window::font::small);
+        SendNumberLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-	sendButton->setNavigationItem(gui::NavigationDirection::UP, sendNumber);
-	sendNumber->setNavigationItem(gui::NavigationDirection::UP, sendMessage);
+        SendMessageLabel = new gui::Label(this, 10, 360, 90, 50, "Message");
+        SendMessageLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        SendMessageLabel->setFont(style::window::font::small);
+        SendMessageLabel->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
 
-	sendMessage->setNavigationItem(gui::NavigationDirection::DOWN, sendNumber);
-	sendNumber->setNavigationItem(gui::NavigationDirection::DOWN, sendButton);
+        sendButton = new gui::Label(this, 10, 500, 480 - 20, 50, "Send SMS");
+        sendButton->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_VERTICAL_CENTER, gui::Alignment::ALIGN_HORIZONTAL_CENTER));
+        sendButton->setPenWidth(1);
+        sendButton->setPenFocusWidth(3);
+        sendButton->activatedCallback = [=](gui::Item &item) {
+            LOG_INFO("Send SMS callback");
+            CellularServiceAPI::SendSMS(application, sendNumber->getText(), sendMessage->getText());
+            return true;
+        };
 
+        sendButton->setNavigationItem(gui::NavigationDirection::UP, sendNumber);
+        sendNumber->setNavigationItem(gui::NavigationDirection::UP, sendMessage);
 
+        sendMessage->setNavigationItem(gui::NavigationDirection::DOWN, sendNumber);
+        sendNumber->setNavigationItem(gui::NavigationDirection::DOWN, sendButton);
+    }
+    void TestMessageWindow::destroyInterface()
+    {
+        AppWindow::destroyInterface();
 
-}
-void TestMessageWindow::destroyInterface() {
-	AppWindow::destroyInterface();
+        this->focusItem = nullptr;
 
-	this->focusItem = nullptr;
+        children.clear();
+    }
 
-	children.clear();
-}
+    TestMessageWindow::~TestMessageWindow()
+    {}
 
-TestMessageWindow::~TestMessageWindow() {
-}
+    void TestMessageWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
+        setFocusItem(sendButton);
+    }
 
-void TestMessageWindow::onBeforeShow(ShowMode mode, SwitchData *data) {
-	setFocusItem( sendButton );
-}
-
-void TestMessageWindow::cellularMessageCallback(UTF8& number, UTF8& message)
-{
-	receiveNumber->setText(number);
-	receiveMessage->setText(message);
-	application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-}
+    void TestMessageWindow::cellularMessageCallback(UTF8 &number, UTF8 &message)
+    {
+        receiveNumber->setText(number);
+        receiveMessage->setText(message);
+        application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+    }
 } /* namespace gui */
diff --git a/module-apps/application-settings/windows/TestMessageWindow.hpp b/module-apps/application-settings/windows/TestMessageWindow.hpp
index 103c8c12b..d0510f476 100644
--- a/module-apps/application-settings/windows/TestMessageWindow.hpp
+++ b/module-apps/application-settings/windows/TestMessageWindow.hpp
@@ -8,7 +8,6 @@
 #ifndef MODULE_APPS_APPLICATION_SETTINGS_WINDOWS_TESTMESSAGEWINDOW_HPP_
 #define MODULE_APPS_APPLICATION_SETTINGS_WINDOWS_TESTMESSAGEWINDOW_HPP_
 
-
 #include <string>
 #include <functional>
 
@@ -20,42 +19,42 @@
 #include "gui/widgets/BottomBar.hpp"
 #include "gui/widgets/TopBar.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class TestMessageWindow: public AppWindow {
-protected:
-	gui::Label* sendLabel;
-	gui::Label* sendButton;
+    /*
+     *
+     */
+    class TestMessageWindow : public AppWindow
+    {
+      protected:
+        gui::Label *sendLabel;
+        gui::Label *sendButton;
 
-	gui::Label* receivedLabel;
+        gui::Label *receivedLabel;
 
-	gui::Label* SendNumberLabel;
-	gui::Label* SendMessageLabel;
-	gui::Text* sendNumber;
-	gui::Text* sendMessage;
+        gui::Label *SendNumberLabel;
+        gui::Label *SendMessageLabel;
+        gui::Text *sendNumber;
+        gui::Text *sendMessage;
 
-	gui::Label* RecNumberLabel;
-	gui::Label* RecMessageLabel;
-	gui::Label* receiveNumber;
-	gui::Text* receiveMessage;
+        gui::Label *RecNumberLabel;
+        gui::Label *RecMessageLabel;
+        gui::Label *receiveNumber;
+        gui::Text *receiveMessage;
 
+      public:
+        TestMessageWindow(app::Application *app);
+        virtual ~TestMessageWindow();
 
-public:
-	TestMessageWindow( app::Application* app );
-	virtual ~TestMessageWindow();
+        // virtual methods
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
 
-	//virtual methods
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-	void cellularMessageCallback(UTF8& number, UTF8& message);
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        void cellularMessageCallback(UTF8 &number, UTF8 &message);
+    };
 } /* namespace gui */
 
-
 #endif /* MODULE_APPS_APPLICATION_SETTINGS_WINDOWS_TESTMESSAGEWINDOW_HPP_ */
diff --git a/module-apps/application-settings/windows/UITestWindow.cpp b/module-apps/application-settings/windows/UITestWindow.cpp
index f05931560..781bcb14b 100644
--- a/module-apps/application-settings/windows/UITestWindow.cpp
+++ b/module-apps/application-settings/windows/UITestWindow.cpp
@@ -23,13 +23,20 @@ namespace gui
         bottomBar->setText(BottomBar::Side::CENTER, utils::localize.get("common_select"));
         bottomBar->setText(BottomBar::Side::RIGHT, utils::localize.get("common_back"));
         setTitle("UI TEST");
-        text = new gui::Text(this, style::window::default_left_margin, title->offset_h(), style::window_width - 2 * style::window::default_left_margin, 300,
-                             "Add text, long press * adds special char, long press # changes input (and shows it in bottom bar) arrows walk, 1 in text mode "
+        text = new gui::Text(this,
+                             style::window::default_left_margin,
+                             title->offset_h(),
+                             style::window_width - 2 * style::window::default_left_margin,
+                             300,
+                             "Add text, long press * adds special char, long press # changes input (and shows it in "
+                             "bottom bar) arrows walk, 1 in text mode "
                              "adds special chars too");
         text->setEditMode(gui::Text::EditMode::EDIT);
         text->setFont(style::window::font::medium);
         text->setInputMode(new InputMode(
-            {InputMode::ABC, InputMode::abc, InputMode::digit}, [=](const UTF8 &text) { textModeShowCB(text); }, [=]() { textSelectSpecialCB(); }));
+            {InputMode::ABC, InputMode::abc, InputMode::digit},
+            [=](const UTF8 &text) { textModeShowCB(text); },
+            [=]() { textSelectSpecialCB(); }));
         text->setPenFocusWidth(0);
         setFocusItem(text);
     }
@@ -40,8 +47,7 @@ namespace gui
     }
 
     void UiTestWindow::buildInterface()
-    {
-    }
+    {}
 
     void UiTestWindow::destroyInterface()
     {
@@ -55,7 +61,6 @@ namespace gui
     }
 
     void UiTestWindow::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
 } // namespace gui
diff --git a/module-apps/application-settings/windows/UITestWindow.hpp b/module-apps/application-settings/windows/UITestWindow.hpp
index 2b0f2c9c9..0f7531534 100644
--- a/module-apps/application-settings/windows/UITestWindow.hpp
+++ b/module-apps/application-settings/windows/UITestWindow.hpp
@@ -13,19 +13,20 @@
 namespace gui
 {
 
-class UiTestWindow : public AppWindow
-{
-  protected:
-      gui::Text* text = nullptr;
-  public:
-    UiTestWindow(app::Application *app);
-    virtual ~UiTestWindow();
+    class UiTestWindow : public AppWindow
+    {
+      protected:
+        gui::Text *text = nullptr;
 
-    // virtual methods
-    void onBeforeShow(ShowMode mode, SwitchData *data) override;
-    void rebuild() override;
-    void buildInterface() override;
-    void destroyInterface() override;
-    void set_navigation();
-};
+      public:
+        UiTestWindow(app::Application *app);
+        virtual ~UiTestWindow();
+
+        // virtual methods
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        void set_navigation();
+    };
 } // namespace gui
diff --git a/module-apps/application-special-input/AppSpecialInput.cpp b/module-apps/application-special-input/AppSpecialInput.cpp
index 15fb54a9a..b0b96c3ae 100644
--- a/module-apps/application-special-input/AppSpecialInput.cpp
+++ b/module-apps/application-special-input/AppSpecialInput.cpp
@@ -4,7 +4,8 @@
 
 using namespace app;
 
-AppSpecialInput::AppSpecialInput(std::string name, std::string parent, bool startBackgound) : Application(name, parent, startBackgound)
+AppSpecialInput::AppSpecialInput(std::string name, std::string parent, bool startBackgound)
+    : Application(name, parent, startBackgound)
 {
     auto window = new gui::UiCharSelector(this);
     windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
@@ -14,20 +15,19 @@ AppSpecialInput::AppSpecialInput(std::string name, std::string parent, bool star
 sys::Message_t AppSpecialInput::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
 {
     auto retMsg = Application::DataReceivedHandler(msgl);
-    if (reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)
-    {
+    if (reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success) {
         return retMsg;
     }
 
     return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
 }
 
-// THIS IS IMPORTANT THIS SETS APPLICATION STATE... (not for example Application(...) constructor - this wouild be too easy
+// THIS IS IMPORTANT THIS SETS APPLICATION STATE... (not for example Application(...) constructor - this wouild be too
+// easy
 sys::ReturnCodes AppSpecialInput::InitHandler()
 {
     auto ret = Application::InitHandler();
-    if (ret != sys::ReturnCodes::Success)
-    {
+    if (ret != sys::ReturnCodes::Success) {
         LOG_ERROR("");
     }
     setActiveWindow(gui::name::window::main_window);
diff --git a/module-apps/application-special-input/AppSpecialInput.hpp b/module-apps/application-special-input/AppSpecialInput.hpp
index 8f39777cd..3b866b9bd 100644
--- a/module-apps/application-special-input/AppSpecialInput.hpp
+++ b/module-apps/application-special-input/AppSpecialInput.hpp
@@ -7,7 +7,7 @@ namespace app
 {
 
     inline const std::string special_input = "AppSpecialInput";
-    inline const std::string char_select = gui::name::window::main_window;
+    inline const std::string char_select   = gui::name::window::main_window;
 
     // app just to provide input selection on UI
     class AppSpecialInput : public app::Application
diff --git a/module-apps/application-special-input/windows/InputSelector.cpp b/module-apps/application-special-input/windows/InputSelector.cpp
index f6e402f3b..70ce884db 100644
--- a/module-apps/application-special-input/windows/InputSelector.cpp
+++ b/module-apps/application-special-input/windows/InputSelector.cpp
@@ -9,8 +9,8 @@ using namespace gui;
 
 namespace style::design
 {
-    const inline auto char_grid_w = 80;
-    const inline auto char_grid_h = 80;
+    const inline auto char_grid_w  = 80;
+    const inline auto char_grid_h  = 80;
     const inline auto char_label_w = 60;
     const inline auto char_label_h = 60;
 }; // namespace style::design
@@ -18,14 +18,16 @@ namespace style::design
 UiCharSelector::UiCharSelector(app::Application *app) : AppWindow(app, app::char_select)
 {
     AppWindow::buildInterface();
-    box = new GridLayout(style::window::default_left_margin, title->offset_h(),
+    box = new GridLayout(style::window::default_left_margin,
+                         title->offset_h(),
                          style::window_width - style::window::default_left_margin - style::window::default_right_margin,
-                         bottomBar->offset_h() - title->offset_h(), {style::design::char_grid_w, style::design::char_grid_h});
-    for (auto schar : gui::special_chars)
-    {
+                         bottomBar->offset_h() - title->offset_h(),
+                         {style::design::char_grid_w, style::design::char_grid_h});
+    for (auto schar : gui::special_chars) {
         auto el = new gui::Label(box, 0, 0, style::design::char_label_w, style::design::char_label_h);
         style::window::decorate(el);
-        el->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+        el->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
         el->setText(std::string(1, schar));
         el->setFont(style::window::font::medium);
         el->activatedCallback = [=](Item &it) {
@@ -33,7 +35,8 @@ UiCharSelector::UiCharSelector(app::Application *app) : AppWindow(app, app::char
             LOG_INFO("handled %s for %s", el->getText().c_str(), name.c_str());
             setFocusItem(nullptr);
             sapm::ApplicationManager::messageSwitchSpecialInput(
-                application, std::make_unique<gui::SwitchSpecialChar>(gui::SwitchSpecialChar::Type::Response, name, el->getText()));
+                application,
+                std::make_unique<gui::SwitchSpecialChar>(gui::SwitchSpecialChar::Type::Response, name, el->getText()));
             return true;
         };
     }
@@ -44,8 +47,7 @@ UiCharSelector::UiCharSelector(app::Application *app) : AppWindow(app, app::char
 void UiCharSelector::onBeforeShow(ShowMode mode, SwitchData *data)
 {
     auto ret = dynamic_cast<SwitchSpecialChar *>(data);
-    if (ret)
-    {
+    if (ret) {
         LOG_INFO("handle for: %s", ret->requester.c_str());
         setFocusItem(box);
         application->refreshWindow(gui::RefreshModes::GUI_REFRESH_FAST);
@@ -53,11 +55,9 @@ void UiCharSelector::onBeforeShow(ShowMode mode, SwitchData *data)
     }
 }
 void UiCharSelector::rebuild()
-{
-}
+{}
 void UiCharSelector::buildInterface()
-{
-}
+{}
 void UiCharSelector::destroyInterface()
 {
     setFocusItem(nullptr);
diff --git a/module-apps/application-viewer/ApplicationViewer.cpp b/module-apps/application-viewer/ApplicationViewer.cpp
index f5e7e3a8d..bc9b4f036 100644
--- a/module-apps/application-viewer/ApplicationViewer.cpp
+++ b/module-apps/application-viewer/ApplicationViewer.cpp
@@ -11,7 +11,7 @@
 #include <string>
 #include <sstream>
 
-//module-gui
+// module-gui
 #include "ApplicationViewer.hpp"
 
 #include "service-appmgr/ApplicationManager.hpp"
@@ -21,72 +21,80 @@
 #include "gui/widgets/Image.hpp"
 #include "gui/widgets/Label.hpp"
 #include "gui/widgets/BoxLayout.hpp"
-//module-utils
+// module-utils
 #include "log/log.hpp"
-//module-services
+// module-services
 #include "service-evtmgr/EventManager.hpp"
 #include "service-evtmgr/messages/EVMessages.hpp"
-//MessageType
+// MessageType
 #include "MessageType.hpp"
-//this module
+// this module
 #include "windows/ViewWindow.hpp"
 
-namespace app {
+namespace app
+{
 
-ApplicationViewer::ApplicationViewer(std::string name, std::string parent,uint32_t stackDepth,sys::ServicePriority priority) :
-	Application( name, parent, false, stackDepth, priority ) {
-}
+    ApplicationViewer::ApplicationViewer(std::string name,
+                                         std::string parent,
+                                         uint32_t stackDepth,
+                                         sys::ServicePriority priority)
+        : Application(name, parent, false, stackDepth, priority)
+    {}
 
-ApplicationViewer::~ApplicationViewer() {
-	// TODO Auto-generated destructor stub
-}
+    ApplicationViewer::~ApplicationViewer()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
-// Invoked upon receiving data message
-sys::Message_t ApplicationViewer::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
+    // Invoked upon receiving data message
+    sys::Message_t ApplicationViewer::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
 
-	auto retMsg = Application::DataReceivedHandler(msgl);
-	//if message was handled by application's template there is no need to process further.
-	if( (reinterpret_cast<sys::ResponseMessage*>( retMsg.get() )->retCode ==
-		sys::ReturnCodes::Success ) ){
-		return retMsg;
-	}
+        auto retMsg = Application::DataReceivedHandler(msgl);
+        // if message was handled by application's template there is no need to process further.
+        if ((reinterpret_cast<sys::ResponseMessage *>(retMsg.get())->retCode == sys::ReturnCodes::Success)) {
+            return retMsg;
+        }
 
-	//this variable defines whether message was processed.
-	bool handled = true;
+        // this variable defines whether message was processed.
+        bool handled = true;
 
-	if( handled )
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
-}
+        if (handled)
+            return std::make_shared<sys::ResponseMessage>();
+        else
+            return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    }
 
-// Invoked during initialization
-sys::ReturnCodes ApplicationViewer::InitHandler() {
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationViewer::InitHandler()
+    {
 
-	auto ret = Application::InitHandler();
-	if( ret != sys::ReturnCodes::Success )
-		return ret;
+        auto ret = Application::InitHandler();
+        if (ret != sys::ReturnCodes::Success)
+            return ret;
 
-	createUserInterface();
+        createUserInterface();
 
-	setActiveWindow("Main");
+        setActiveWindow("Main");
 
-	return ret;
-}
+        return ret;
+    }
 
-sys::ReturnCodes ApplicationViewer::DeinitHandler() {
-	return sys::ReturnCodes::Success;
-}
+    sys::ReturnCodes ApplicationViewer::DeinitHandler()
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-void ApplicationViewer::createUserInterface() {
+    void ApplicationViewer::createUserInterface()
+    {
 
-	gui::AppWindow* window = nullptr;
+        gui::AppWindow *window = nullptr;
 
-	window = new gui::ViewWindow(this);
-	windows.insert(std::pair<std::string,gui::AppWindow*>(window->getName(), window));
-}
+        window = new gui::ViewWindow(this);
+        windows.insert(std::pair<std::string, gui::AppWindow *>(window->getName(), window));
+    }
 
-void ApplicationViewer::destroyUserInterface() {
-}
+    void ApplicationViewer::destroyUserInterface()
+    {}
 
 } /* namespace app */
diff --git a/module-apps/application-viewer/ApplicationViewer.hpp b/module-apps/application-viewer/ApplicationViewer.hpp
index cb6a22dd9..24455a93f 100644
--- a/module-apps/application-viewer/ApplicationViewer.hpp
+++ b/module-apps/application-viewer/ApplicationViewer.hpp
@@ -14,25 +14,33 @@
 #include "gui/widgets/Label.hpp"
 #include "gui/widgets/Progress.hpp"
 
-namespace app {
+namespace app
+{
 
-inline const std::string name_viewer = "ApplicationViewer";
+    inline const std::string name_viewer = "ApplicationViewer";
 
-class ApplicationViewer: public Application {
+    class ApplicationViewer : public Application
+    {
 
-public:
-	ApplicationViewer(std::string name, std::string parent = "", uint32_t stackDepth=4096,sys::ServicePriority priority=sys::ServicePriority::Idle);
-	virtual ~ApplicationViewer();
+      public:
+        ApplicationViewer(std::string name,
+                          std::string parent            = "",
+                          uint32_t stackDepth           = 4096,
+                          sys::ServicePriority priority = sys::ServicePriority::Idle);
+        virtual ~ApplicationViewer();
 
-	sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-	sys::ReturnCodes InitHandler() override;
-	sys::ReturnCodes DeinitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        sys::ReturnCodes InitHandler() override;
+        sys::ReturnCodes DeinitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+        {
+            return sys::ReturnCodes::Success;
+        }
 
-    void createUserInterface() override;
-    void destroyUserInterface() override;
-};
+        void createUserInterface() override;
+        void destroyUserInterface() override;
+    };
 
 } /* namespace app */
 
diff --git a/module-apps/application-viewer/windows/ViewWindow.cpp b/module-apps/application-viewer/windows/ViewWindow.cpp
index 147e72c52..7ac3fa3e8 100644
--- a/module-apps/application-viewer/windows/ViewWindow.cpp
+++ b/module-apps/application-viewer/windows/ViewWindow.cpp
@@ -13,146 +13,151 @@
 #include "AppWindow.hpp"
 #include "Application.hpp"
 
-namespace gui {
+namespace gui
+{
 
     ViewWindow::ViewWindow(app::Application *app) : AppWindow(app, gui::name::window::main_window)
     {
         buildInterface();
     }
 
-void ViewWindow::rebuild() {
-	destroyInterface();
-	buildInterface();
-}
+    void ViewWindow::rebuild()
+    {
+        destroyInterface();
+        buildInterface();
+    }
 
-void ViewWindow::buildInterface() {
-	AppWindow::buildInterface();
-	//load all states from file
-	auto file =  vfs.fopen("sys/viewerStates.txt","r");
-	//read line with number of states
-	std::string str = vfs.getline(file);
-	uint32_t statesCount;
-	std::stringstream(str) >> statesCount;
+    void ViewWindow::buildInterface()
+    {
+        AppWindow::buildInterface();
+        // load all states from file
+        auto file = vfs.fopen("sys/viewerStates.txt", "r");
+        // read line with number of states
+        std::string str = vfs.getline(file);
+        uint32_t statesCount;
+        std::stringstream(str) >> statesCount;
 
-	LOG_INFO("States count: %d", statesCount );
-	bool err = false;
-	for( uint32_t i=0; i<statesCount; ++i ) {
-		std::string stateName = vfs.getline(file);
-		//check if there are brackets
-		if( (stateName[0] == '[' ) && (stateName[stateName.size()-1] == ']')) {
-			stateName = stateName.substr(1, stateName.size()-2 );
+        LOG_INFO("States count: %d", statesCount);
+        bool err = false;
+        for (uint32_t i = 0; i < statesCount; ++i) {
+            std::string stateName = vfs.getline(file);
+            // check if there are brackets
+            if ((stateName[0] == '[') && (stateName[stateName.size() - 1] == ']')) {
+                stateName = stateName.substr(1, stateName.size() - 2);
 
-			std::string screenName = vfs.getline(file);
-			std::string refreshModeStr = vfs.getline(file);
-			std::string buttonStr = vfs.getline(file);
+                std::string screenName     = vfs.getline(file);
+                std::string refreshModeStr = vfs.getline(file);
+                std::string buttonStr      = vfs.getline(file);
 
-		    // Vector of string to save pairs of button code and image
-		    std::vector <std::string> tokens;
-		    std::stringstream check1(buttonStr);
-		    std::string intermediate;
+                // Vector of string to save pairs of button code and image
+                std::vector<std::string> tokens;
+                std::stringstream check1(buttonStr);
+                std::string intermediate;
 
-		    // Tokenizing w.r.t. space ' '
-		    while(getline(check1, intermediate, ','))
-		    {
-		        tokens.push_back(intermediate);
-		    }
+                // Tokenizing w.r.t. space ' '
+                while (getline(check1, intermediate, ',')) {
+                    tokens.push_back(intermediate);
+                }
 
-			bool deepRefresh = false;
-			if( refreshModeStr[0] == 'F' || refreshModeStr[0] == 'f' )
-				deepRefresh = true;
+                bool deepRefresh = false;
+                if (refreshModeStr[0] == 'F' || refreshModeStr[0] == 'f')
+                    deepRefresh = true;
 
-			std::map<int, int> buttons;
-			for(unsigned int j = 0; j < tokens.size(); j++) {
-				LOG_INFO("TOKEN: %s", tokens[j].c_str());
-				std::vector <std::string> tokens2;
-				std::stringstream check2(tokens[j]);
-				while(getline(check2, intermediate, ' ')) {
-					tokens2.push_back(intermediate);
-				}
+                std::map<int, int> buttons;
+                for (unsigned int j = 0; j < tokens.size(); j++) {
+                    LOG_INFO("TOKEN: %s", tokens[j].c_str());
+                    std::vector<std::string> tokens2;
+                    std::stringstream check2(tokens[j]);
+                    while (getline(check2, intermediate, ' ')) {
+                        tokens2.push_back(intermediate);
+                    }
 
-				if( tokens2.size() != 2 )
-					continue;
+                    if (tokens2.size() != 2)
+                        continue;
 
-				//convert first token to key id
-				auto it = buttonKeyCodes.find( tokens2[0]);
-				if( it != buttonKeyCodes.end()) {
+                    // convert first token to key id
+                    auto it = buttonKeyCodes.find(tokens2[0]);
+                    if (it != buttonKeyCodes.end()) {
 
-					int screenCode;
-					std::stringstream(tokens2[1]) >> screenCode;
-					LOG_INFO("[%d] [%d]", it->second, screenCode );
+                        int screenCode;
+                        std::stringstream(tokens2[1]) >> screenCode;
+                        LOG_INFO("[%d] [%d]", it->second, screenCode);
 
-					buttons.insert( std::pair<int,int>( it->second, screenCode ));
+                        buttons.insert(std::pair<int, int>(it->second, screenCode));
+                    }
+                }
 
-				}
-			}
+                states.push_back(ViewerState(stateName, screenName, deepRefresh, states.size(), buttons));
 
-			states.push_back( ViewerState(stateName, screenName, deepRefresh, states.size(), buttons ) );
+                LOG_INFO("State: %s Screen: %s deep: %d", stateName.c_str(), screenName.c_str(), deepRefresh);
+            }
+            else {
+                err = true;
+                LOG_FATAL("ERROR reading viwer section");
+                break;
+            }
+        }
+        if (err)
+            states.clear();
 
-			LOG_INFO( "State: %s Screen: %s deep: %d", stateName.c_str(), screenName.c_str(), deepRefresh );
-		}
-		else {
-			err = true;
-			LOG_FATAL("ERROR reading viwer section");
-			break;
-		}
-	}
-	if( err )
-		states.clear();
+        vfs.fclose(file);
 
-	vfs.fclose(file);
+        for (ViewerState s : states) {
+            gui::Image *img = new gui::Image(this, 0, 0, 0, 0);
+            img->set(s.screenName);
+            img->setVisible(false);
 
-	for( ViewerState s : states ) {
-		gui::Image* img = new gui::Image(this,0,0,0,0);
-        img->set(s.screenName);
-        img->setVisible(false);
+            images.push_back(img);
+        }
+    }
+    void ViewWindow::destroyInterface()
+    {
+        destroyInterface();
+        for (uint32_t i = 0; i < images.size(); i++)
+            delete images[i];
+    }
 
-		images.push_back( img );
-	}
-}
-void ViewWindow::destroyInterface() {
-	destroyInterface();
-	for( uint32_t i=0; i<images.size(); i++ )
-		delete images[i];
-}
+    ViewWindow::~ViewWindow()
+    {
+        destroyInterface();
+    }
 
-ViewWindow::~ViewWindow() {
-	destroyInterface();
-}
+    void ViewWindow::onBeforeShow(ShowMode mode, SwitchData *data)
+    {
 
-void ViewWindow::onBeforeShow( ShowMode mode, SwitchData* data ) {
+        currentState = 0;
+        if (states.size())
+            images[currentState]->setVisible(true);
+    }
 
-	currentState = 0;
-	if( states.size() )
-		images[currentState]->setVisible(true);
-}
+    bool ViewWindow::onInput(const InputEvent &inputEvent)
+    {
+        // process only if key is released
+        if (inputEvent.state == InputEvent::State::keyReleasedShort) {
 
-bool ViewWindow::onInput( const InputEvent& inputEvent ) {
-	//process only if key is released
-	if( inputEvent.state == InputEvent::State::keyReleasedShort ) {
+            uint32_t oldState = currentState;
 
-		uint32_t oldState = currentState;
+            for (auto it = states[currentState].buttons.begin(); it != states[currentState].buttons.end(); it++)
+                LOG_INFO("[%d %d]", it->first, it->second);
 
-		for( auto it = states[currentState].buttons.begin(); it!=states[currentState].buttons.end(); it++)
-			LOG_INFO("[%d %d]", it->first, it->second);
+            auto it = states[currentState].buttons.find(static_cast<int>(inputEvent.keyCode));
+            if (it == states[currentState].buttons.end())
+                return false;
 
-		auto it = states[currentState].buttons.find(static_cast<int>(inputEvent.keyCode));
-		if( it == states[currentState].buttons.end() )
-			return false;
+            images[oldState]->setVisible(false);
+            currentState = it->second;
+            images[currentState]->setVisible(true);
+            if (oldState != currentState) {
+                if (states[currentState].deepRefresh)
+                    application->refreshWindow(RefreshModes::GUI_REFRESH_DEEP);
+                else
+                    application->refreshWindow(RefreshModes::GUI_REFRESH_FAST);
+            }
+            return true;
+        }
 
-		images[oldState]->setVisible(false);
-		currentState = it->second;
-				images[currentState]->setVisible(true);
-		if( oldState != currentState ) {
-			if( states[currentState].deepRefresh )
-				application->refreshWindow( RefreshModes::GUI_REFRESH_DEEP );
-			else
-				application->refreshWindow( RefreshModes::GUI_REFRESH_FAST );
-		}
-		return true;
-	}
-
-	//check if any of the lower inheritance onInput methods catch the event
-	return AppWindow::onInput( inputEvent );
-}
+        // check if any of the lower inheritance onInput methods catch the event
+        return AppWindow::onInput(inputEvent);
+    }
 
 } /* namespace gui */
diff --git a/module-apps/application-viewer/windows/ViewWindow.hpp b/module-apps/application-viewer/windows/ViewWindow.hpp
index fcad14af2..2f18a4d8c 100644
--- a/module-apps/application-viewer/windows/ViewWindow.hpp
+++ b/module-apps/application-viewer/windows/ViewWindow.hpp
@@ -14,70 +14,73 @@
 #include "widgets/Image.hpp"
 #include "InputEvent.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ViewerState {
-public:
-	std::string stateName;
-	std::string screenName;
-	bool deepRefresh = false;
-	uint32_t id = 0;
-	std::map<int, int> buttons;
+    class ViewerState
+    {
+      public:
+        std::string stateName;
+        std::string screenName;
+        bool deepRefresh = false;
+        uint32_t id      = 0;
+        std::map<int, int> buttons;
 
-	ViewerState( std::string stateName, std::string screenName, bool deep, uint32_t id, std::map<int, int> buttons ) :
-		stateName{stateName}, screenName{screenName}, deepRefresh{deep}, id{id}, buttons{buttons} {};
-};
+        ViewerState(std::string stateName, std::string screenName, bool deep, uint32_t id, std::map<int, int> buttons)
+            : stateName{stateName}, screenName{screenName}, deepRefresh{deep}, id{id}, buttons{buttons} {};
+    };
 
-/*
- *
- */
-class ViewWindow: public AppWindow {
-	uint32_t currentState = 0;
-	std::vector<gui::Image*> images;
-	std::vector<ViewerState> states;
+    /*
+     *
+     */
+    class ViewWindow : public AppWindow
+    {
+        uint32_t currentState = 0;
+        std::vector<gui::Image *> images;
+        std::vector<ViewerState> states;
 
-	int convertKeyCode( std::string );
+        int convertKeyCode(std::string);
 
-	std::map<std::string, int> buttonKeyCodes = {
-		{"KEY_UNDEFINED", static_cast<int>(KeyCode::KEY_UNDEFINED)},
-		{"KEY_LEFT", static_cast<int>(KeyCode::KEY_LEFT)},
-		{"KEY_UP", static_cast<int>(KeyCode::KEY_UP)},
-		{"KEY_RIGHT", static_cast<int>(KeyCode::KEY_RIGHT)},
-		{"KEY_DOWN", static_cast<int>(KeyCode::KEY_DOWN)},
-		{"KEY_LF", static_cast<int>(KeyCode::KEY_LF)},
-		{"KEY_RF", static_cast<int>(KeyCode::KEY_RF)},
-		{"KEY_ENTER", static_cast<int>(KeyCode::KEY_ENTER)},
-		{"KEY_0", static_cast<int>(KeyCode::KEY_0)},
-		{"KEY_1", static_cast<int>(KeyCode::KEY_1)},
-		{"KEY_2", static_cast<int>(KeyCode::KEY_2)},
-		{"KEY_3", static_cast<int>(KeyCode::KEY_3)},
-		{"KEY_4", static_cast<int>(KeyCode::KEY_4)},
-		{"KEY_5", static_cast<int>(KeyCode::KEY_5)},
-		{"KEY_6", static_cast<int>(KeyCode::KEY_6)},
-		{"KEY_7", static_cast<int>(KeyCode::KEY_7)},
-		{"KEY_8", static_cast<int>(KeyCode::KEY_8)},
-		{"KEY_9", static_cast<int>(KeyCode::KEY_9)},
-		{"KEY_AST", static_cast<int>(KeyCode::KEY_AST)},
-		{"KEY_PND", static_cast<int>(KeyCode::KEY_PND)},
-		{"KEY_VOLUP", static_cast<int>(KeyCode::KEY_VOLUP)},
-		{"KEY_VOLDN", static_cast<int>(KeyCode::KEY_VOLDN)},
-		{"KEY_TORCH", static_cast<int>(KeyCode::KEY_TORCH)},
-		{"SWITCH_UP", static_cast<int>(KeyCode::SWITCH_UP)},
-		{"SWITCH_MID", static_cast<int>(KeyCode::SWITCH_MID)},
-		{"SWITCH_DN", static_cast<int>(KeyCode::SWITCH_DN)},
-	};
+        std::map<std::string, int> buttonKeyCodes = {
+            {"KEY_UNDEFINED", static_cast<int>(KeyCode::KEY_UNDEFINED)},
+            {"KEY_LEFT", static_cast<int>(KeyCode::KEY_LEFT)},
+            {"KEY_UP", static_cast<int>(KeyCode::KEY_UP)},
+            {"KEY_RIGHT", static_cast<int>(KeyCode::KEY_RIGHT)},
+            {"KEY_DOWN", static_cast<int>(KeyCode::KEY_DOWN)},
+            {"KEY_LF", static_cast<int>(KeyCode::KEY_LF)},
+            {"KEY_RF", static_cast<int>(KeyCode::KEY_RF)},
+            {"KEY_ENTER", static_cast<int>(KeyCode::KEY_ENTER)},
+            {"KEY_0", static_cast<int>(KeyCode::KEY_0)},
+            {"KEY_1", static_cast<int>(KeyCode::KEY_1)},
+            {"KEY_2", static_cast<int>(KeyCode::KEY_2)},
+            {"KEY_3", static_cast<int>(KeyCode::KEY_3)},
+            {"KEY_4", static_cast<int>(KeyCode::KEY_4)},
+            {"KEY_5", static_cast<int>(KeyCode::KEY_5)},
+            {"KEY_6", static_cast<int>(KeyCode::KEY_6)},
+            {"KEY_7", static_cast<int>(KeyCode::KEY_7)},
+            {"KEY_8", static_cast<int>(KeyCode::KEY_8)},
+            {"KEY_9", static_cast<int>(KeyCode::KEY_9)},
+            {"KEY_AST", static_cast<int>(KeyCode::KEY_AST)},
+            {"KEY_PND", static_cast<int>(KeyCode::KEY_PND)},
+            {"KEY_VOLUP", static_cast<int>(KeyCode::KEY_VOLUP)},
+            {"KEY_VOLDN", static_cast<int>(KeyCode::KEY_VOLDN)},
+            {"KEY_TORCH", static_cast<int>(KeyCode::KEY_TORCH)},
+            {"SWITCH_UP", static_cast<int>(KeyCode::SWITCH_UP)},
+            {"SWITCH_MID", static_cast<int>(KeyCode::SWITCH_MID)},
+            {"SWITCH_DN", static_cast<int>(KeyCode::SWITCH_DN)},
+        };
 
-public:
-	ViewWindow( app::Application* app );
-	virtual ~ViewWindow();
+      public:
+        ViewWindow(app::Application *app);
+        virtual ~ViewWindow();
 
-	void onBeforeShow( ShowMode mode, SwitchData* data ) override;
-	bool onInput( const InputEvent& inputEvent ) override;
+        void onBeforeShow(ShowMode mode, SwitchData *data) override;
+        bool onInput(const InputEvent &inputEvent) override;
 
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/messages/AppMessage.hpp b/module-apps/messages/AppMessage.hpp
index af33199b7..768f54580 100644
--- a/module-apps/messages/AppMessage.hpp
+++ b/module-apps/messages/AppMessage.hpp
@@ -16,104 +16,146 @@
 #include <memory>
 #include <string>
 
-namespace app {
+namespace app
+{
 
-/*
- * @brief Template for all messages that go to application manager
- */
-class AppMessage: public sys::DataMessage {
-public:
-  AppMessage(MessageType messageType) : sys::DataMessage(messageType){};
-  virtual ~AppMessage(){};
+    /*
+     * @brief Template for all messages that go to application manager
+     */
+    class AppMessage : public sys::DataMessage
+    {
+      public:
+        AppMessage(MessageType messageType) : sys::DataMessage(messageType){};
+        virtual ~AppMessage(){};
+    };
 
-};
+    // this message is used to notify application about switching event. Application will gain or lose focus upon
+    // receiving this message. Application gains focus when it was in init or active background state. Application loose
+    // focus when it was in active foreground state. if no window is specified it is assumed that MainWindow is the
+    // target
+    class AppSwitchMessage : public AppMessage
+    {
+      protected:
+        // name of the application to which switch is performed.
+        std::string targetApplication;
+        // name of the window to which switch should be performed.
+        std::string targetWindow;
+        // optional data for the target window.
+        std::unique_ptr<gui::SwitchData> data;
+        // name of the application to which switch should be performed after finishing tasks in target application and
+        // window.
+        std::string returnApplication;
+        // name of the window to which switch should be performed after finishing tasks in target application and
+        // window.
+        std::string returnWindow;
 
-//this message is used to notify application about switching event. Application will gain or lose focus upon receiving this message.
-//Application gains focus when it was in init or active background state. Application loose focus when it was in active foreground state.
-//if no window is specified it is assumed that MainWindow is the target
-class AppSwitchMessage : public AppMessage {
-protected:
-	//name of the application to which switch is performed.
-	std::string targetApplication;
-	//name of the window to which switch should be performed.
-	std::string targetWindow;
-	//optional data for the target window.
-	std::unique_ptr<gui::SwitchData> data;
-	//name of the application to which switch should be performed after finishing tasks in target application and window.
-	std::string returnApplication;
-	//name of the window to which switch should be performed after finishing tasks in target application and window.
-	std::string returnWindow;
-public:
-	AppSwitchMessage( const std::string& targetApplication, const std::string& targetWindow, std::unique_ptr<gui::SwitchData> data,
-			const std::string& returnApplication = "", const std::string& returnWindow = "") :
-		AppMessage( MessageType::AppSwitch ),
-		targetApplication{ targetApplication },
-		targetWindow{ targetWindow },
-		data {std::move(data)},
-		returnApplication{ returnApplication },
-		returnWindow{ returnWindow } {};
-	virtual ~AppSwitchMessage() {};
+      public:
+        AppSwitchMessage(const std::string &targetApplication,
+                         const std::string &targetWindow,
+                         std::unique_ptr<gui::SwitchData> data,
+                         const std::string &returnApplication = "",
+                         const std::string &returnWindow      = "")
+            : AppMessage(MessageType::AppSwitch), targetApplication{targetApplication}, targetWindow{targetWindow},
+              data{std::move(data)}, returnApplication{returnApplication}, returnWindow{returnWindow} {};
+        virtual ~AppSwitchMessage(){};
 
-	std::string getTargetWindowName() { return targetWindow; };
-	std::string getReturnWindowName() { return returnWindow; };
-	std::unique_ptr<gui::SwitchData>& getData() { return data; };
-	std::string getTargetApplicationName() { return targetApplication;};
-	std::string getReturnApplicationName() { return returnApplication;};
-};
+        std::string getTargetWindowName()
+        {
+            return targetWindow;
+        };
+        std::string getReturnWindowName()
+        {
+            return returnWindow;
+        };
+        std::unique_ptr<gui::SwitchData> &getData()
+        {
+            return data;
+        };
+        std::string getTargetApplicationName()
+        {
+            return targetApplication;
+        };
+        std::string getReturnApplicationName()
+        {
+            return returnApplication;
+        };
+    };
 
-class AppRefreshMessage : public AppMessage {
-protected:
-	gui::RefreshModes mode;
-public:
-//	AppRefreshMessage( const std::string& application, gui::RefreshModes mode ) :
-		AppRefreshMessage( gui::RefreshModes mode ) :
-		AppMessage( MessageType::AppRefresh ),
-		mode{ mode }{};
-	virtual ~AppRefreshMessage() {};
+    class AppRefreshMessage : public AppMessage
+    {
+      protected:
+        gui::RefreshModes mode;
 
-	const gui::RefreshModes& getMode() { return mode; };
-};
+      public:
+        //	AppRefreshMessage( const std::string& application, gui::RefreshModes mode ) :
+        AppRefreshMessage(gui::RefreshModes mode) : AppMessage(MessageType::AppRefresh), mode{mode} {};
+        virtual ~AppRefreshMessage(){};
 
-class AppSwitchWindowMessage : public AppMessage {
-protected:
-	std::string window;
-	std::string senderWindow;
-	gui::ShowMode command;
-	std::unique_ptr<gui::SwitchData> data;
-public:
-  bool LastSeenWindow = false;
-  AppSwitchWindowMessage() = delete;
+        const gui::RefreshModes &getMode()
+        {
+            return mode;
+        };
+    };
 
-  AppSwitchWindowMessage(const std::string &window, const std::string senderWindow, std::unique_ptr<gui::SwitchData> data,
-                         const gui::ShowMode command = gui::ShowMode::GUI_SHOW_INIT)
-      : AppMessage(MessageType::AppSwitchWindow), window{window}, senderWindow{senderWindow}, command{command}, data{std::move(data)} {};
-  virtual ~AppSwitchWindowMessage() = default;
+    class AppSwitchWindowMessage : public AppMessage
+    {
+      protected:
+        std::string window;
+        std::string senderWindow;
+        gui::ShowMode command;
+        std::unique_ptr<gui::SwitchData> data;
 
-  const std::string &getWindowName() const
-  {
-      return window; };
-	const std::string& getSenderWindowName() const { return senderWindow; };
-	const gui::ShowMode& getCommand() const { return command; };
-	std::unique_ptr<gui::SwitchData>& getData() { return data; };
-};
+      public:
+        bool LastSeenWindow      = false;
+        AppSwitchWindowMessage() = delete;
 
-class AppInputEventMessage : public AppMessage {
-protected:
-	gui::InputEvent event;
-public:
-	AppInputEventMessage( gui::InputEvent evt ) :
-		AppMessage( MessageType::AppInputEvent ),
-		event{evt} {};
-	virtual ~AppInputEventMessage() {};
+        AppSwitchWindowMessage(const std::string &window,
+                               const std::string senderWindow,
+                               std::unique_ptr<gui::SwitchData> data,
+                               const gui::ShowMode command = gui::ShowMode::GUI_SHOW_INIT)
+            : AppMessage(MessageType::AppSwitchWindow), window{window},
+              senderWindow{senderWindow}, command{command}, data{std::move(data)} {};
+        virtual ~AppSwitchWindowMessage() = default;
 
-	const gui::InputEvent& getEvent() { return event; };
-};
+        const std::string &getWindowName() const
+        {
+            return window;
+        };
+        const std::string &getSenderWindowName() const
+        {
+            return senderWindow;
+        };
+        const gui::ShowMode &getCommand() const
+        {
+            return command;
+        };
+        std::unique_ptr<gui::SwitchData> &getData()
+        {
+            return data;
+        };
+    };
 
-class AppRebuildMessage : public AppMessage {
-public:
-	AppRebuildMessage(): AppMessage( MessageType::AppRebuild ) {};
-	virtual ~AppRebuildMessage() {};
-};
+    class AppInputEventMessage : public AppMessage
+    {
+      protected:
+        gui::InputEvent event;
 
-};
+      public:
+        AppInputEventMessage(gui::InputEvent evt) : AppMessage(MessageType::AppInputEvent), event{evt} {};
+        virtual ~AppInputEventMessage(){};
+
+        const gui::InputEvent &getEvent()
+        {
+            return event;
+        };
+    };
+
+    class AppRebuildMessage : public AppMessage
+    {
+      public:
+        AppRebuildMessage() : AppMessage(MessageType::AppRebuild){};
+        virtual ~AppRebuildMessage(){};
+    };
+
+};     // namespace app
 #endif /* MODULE_APPS_MESSAGES_APPMESSAGE_HPP_ */
diff --git a/module-apps/windows/AppWindow.cpp b/module-apps/windows/AppWindow.cpp
index 08ee73b78..4aee04183 100644
--- a/module-apps/windows/AppWindow.cpp
+++ b/module-apps/windows/AppWindow.cpp
@@ -15,148 +15,161 @@
 
 using namespace style::header;
 
-namespace gui {
-
-AppWindow::AppWindow( app::Application* app, std::string name, uint32_t id ) :
-	Window ( name, id), application{ app } {
-    setSize(style::window_width, style::window_height);
-}
-
-AppWindow::~AppWindow() {
-	LOG_INFO("deleting window: %s", name.c_str());
-    destroyInterface();
-}
-
-
-void AppWindow::destroyInterface() {
-	children.remove(bottomBar);
-	children.remove(topBar);
-	children.remove(title);
-    delete title;
-	delete bottomBar;
-	delete topBar;
-    title = nullptr;
-    bottomBar = nullptr;
-    topBar = nullptr;
-}
-
-void AppWindow::rebuild() {
-}
-
-void AppWindow::buildInterface() {
-	bottomBar = new gui::BottomBar( this, 0, 599-50, 480, 50 );
-	bottomBar->setActive( BottomBar::Side::LEFT, false );
-	bottomBar->setActive( BottomBar::Side::CENTER, false );
-	bottomBar->setActive( BottomBar::Side::RIGHT, false );
-
-	title = new gui::Label(this, 0, 52, 480, 52 );
-	title->setFilled( false );
-	title->setFont(font::title);
-	title->setText("");
-	title->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_TOP));
-    title->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM );
-    title->setDotsMode(true);
-    title->visible = false;
-
-    topBar = new gui::TopBar(this, 0, 0, 480, 50);
-    topBar->setActive(TopBar::Elements::LOCK, false );
-	topBar->setActive(TopBar::Elements::BATTERY, false );
-	topBar->setActive(TopBar::Elements::SIGNAL, false );
-}
-
-bool AppWindow::batteryCharging(bool charging)
+namespace gui
 {
-    topBar->setBatteryCharging(charging);
-    return true;
-}
 
-bool AppWindow::setSIM()
-{
-    topBar->simSet();
-    return true;
-}
-
-//updates battery level in the window
-bool AppWindow::updateBatteryLevel( uint32_t percentage ) {
-	//get old value of battery level, calcualte new level and comapre both
-	//if they are different make a change and return true, otherwise return false;
-    return topBar->setBatteryLevel(percentage);
-}
-// updates battery level in the window
-bool AppWindow::updateSignalStrength()
-{
-    return topBar->updateSignalStrength();
-}
-
-bool AppWindow::updateTime( const UTF8& timeStr ) {
-	topBar->setTime(timeStr);
-	return true;
-}
-
-bool AppWindow::updateTime( const uint32_t& timestamp, bool mode24H ) {
-	topBar->setTime( timestamp, mode24H );
-	return true;
-}
-
-void AppWindow::setTitle(const UTF8 &text) {
-    if(title != nullptr) {
-        title->setVisible(true);
-        title->setText(text);
-    } else {
-        LOG_ERROR("cant set title - it doesn't exist!");
-    }
-}
-
-std::list<DrawCommand*> AppWindow::buildDrawList() {
-	return Window::buildDrawList();
-}
-
-bool AppWindow::onDatabaseMessage( sys::Message* msg ){ return false; }
-
-bool AppWindow::onInput( const InputEvent& inputEvent) {
-
-	//check if any of the lower inheritance onInput methods catch the event
-	if( Window::onInput( inputEvent ) ) {
-		if( inputEvent.keyCode != KeyCode::KEY_ENTER ) application->render( RefreshModes::GUI_REFRESH_FAST );
-		return true;
-	}
-
-    if (inputEvent.state == InputEvent::State::keyReleasedLong && inputEvent.keyCode == gui::KeyCode::KEY_RF)
+    AppWindow::AppWindow(app::Application *app, std::string name, uint32_t id) : Window(name, id), application{app}
     {
-        LOG_INFO("exit to main menu");
-        sapm::ApplicationManager::messageSwitchApplication(application, app::name_desktop, gui::name::window::main_window, nullptr);
-    }
-	//process only if key is released
-	if(( inputEvent.state != InputEvent::State::keyReleasedShort )) return false;
-
-	if( inputEvent.keyCode == KeyCode::KEY_RF ) {
-        return returnToPreviousView();
+        setSize(style::window_width, style::window_height);
     }
 
-	return false;
-}
-
-bool AppWindow::returnToPreviousView()
-{
-    auto prevWindow = application->getPrevWindow();
-    if (prevWindow == gui::name::window::no_window)
+    AppWindow::~AppWindow()
     {
-        LOG_INFO("Back to previous application");
-        application->cleanPrevWindw();
-        sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+        LOG_INFO("deleting window: %s", name.c_str());
+        destroyInterface();
     }
-    else
+
+    void AppWindow::destroyInterface()
     {
-        LOG_INFO("Back to previous window %s", prevWindow.c_str());
-        application->switchWindow(prevWindow, gui::ShowMode::GUI_SHOW_RETURN);
+        children.remove(bottomBar);
+        children.remove(topBar);
+        children.remove(title);
+        delete title;
+        delete bottomBar;
+        delete topBar;
+        title     = nullptr;
+        bottomBar = nullptr;
+        topBar    = nullptr;
+    }
+
+    void AppWindow::rebuild()
+    {}
+
+    void AppWindow::buildInterface()
+    {
+        bottomBar = new gui::BottomBar(this, 0, 599 - 50, 480, 50);
+        bottomBar->setActive(BottomBar::Side::LEFT, false);
+        bottomBar->setActive(BottomBar::Side::CENTER, false);
+        bottomBar->setActive(BottomBar::Side::RIGHT, false);
+
+        title = new gui::Label(this, 0, 52, 480, 52);
+        title->setFilled(false);
+        title->setFont(font::title);
+        title->setText("");
+        title->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_TOP));
+        title->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        title->setDotsMode(true);
+        title->visible = false;
+
+        topBar = new gui::TopBar(this, 0, 0, 480, 50);
+        topBar->setActive(TopBar::Elements::LOCK, false);
+        topBar->setActive(TopBar::Elements::BATTERY, false);
+        topBar->setActive(TopBar::Elements::SIGNAL, false);
+    }
+
+    bool AppWindow::batteryCharging(bool charging)
+    {
+        topBar->setBatteryCharging(charging);
+        return true;
+    }
+
+    bool AppWindow::setSIM()
+    {
+        topBar->simSet();
+        return true;
+    }
+
+    // updates battery level in the window
+    bool AppWindow::updateBatteryLevel(uint32_t percentage)
+    {
+        // get old value of battery level, calcualte new level and comapre both
+        // if they are different make a change and return true, otherwise return false;
+        return topBar->setBatteryLevel(percentage);
+    }
+    // updates battery level in the window
+    bool AppWindow::updateSignalStrength()
+    {
+        return topBar->updateSignalStrength();
+    }
+
+    bool AppWindow::updateTime(const UTF8 &timeStr)
+    {
+        topBar->setTime(timeStr);
+        return true;
+    }
+
+    bool AppWindow::updateTime(const uint32_t &timestamp, bool mode24H)
+    {
+        topBar->setTime(timestamp, mode24H);
+        return true;
+    }
+
+    void AppWindow::setTitle(const UTF8 &text)
+    {
+        if (title != nullptr) {
+            title->setVisible(true);
+            title->setText(text);
+        }
+        else {
+            LOG_ERROR("cant set title - it doesn't exist!");
+        }
+    }
+
+    std::list<DrawCommand *> AppWindow::buildDrawList()
+    {
+        return Window::buildDrawList();
+    }
+
+    bool AppWindow::onDatabaseMessage(sys::Message *msg)
+    {
+        return false;
+    }
+
+    bool AppWindow::onInput(const InputEvent &inputEvent)
+    {
+
+        // check if any of the lower inheritance onInput methods catch the event
+        if (Window::onInput(inputEvent)) {
+            if (inputEvent.keyCode != KeyCode::KEY_ENTER)
+                application->render(RefreshModes::GUI_REFRESH_FAST);
+            return true;
+        }
+
+        if (inputEvent.state == InputEvent::State::keyReleasedLong && inputEvent.keyCode == gui::KeyCode::KEY_RF) {
+            LOG_INFO("exit to main menu");
+            sapm::ApplicationManager::messageSwitchApplication(
+                application, app::name_desktop, gui::name::window::main_window, nullptr);
+        }
+        // process only if key is released
+        if ((inputEvent.state != InputEvent::State::keyReleasedShort))
+            return false;
+
+        if (inputEvent.keyCode == KeyCode::KEY_RF) {
+            return returnToPreviousView();
+        }
+
+        return false;
+    }
+
+    bool AppWindow::returnToPreviousView()
+    {
+        auto prevWindow = application->getPrevWindow();
+        if (prevWindow == gui::name::window::no_window) {
+            LOG_INFO("Back to previous application");
+            application->cleanPrevWindw();
+            sapm::ApplicationManager::messageSwitchPreviousApplication(application);
+        }
+        else {
+            LOG_INFO("Back to previous window %s", prevWindow.c_str());
+            application->switchWindow(prevWindow, gui::ShowMode::GUI_SHOW_RETURN);
+        }
+        return true;
     }
-    return true;
-}
 
     void AppWindow::textModeShowCB(const UTF8 &text)
     {
-        if (bottomBar == nullptr)
-        {
+        if (bottomBar == nullptr) {
             return;
         }
         bottomBar->setText(BottomBar::Side::CENTER, text);
@@ -167,7 +180,8 @@ bool AppWindow::returnToPreviousView()
     bool AppWindow::textSelectSpecialCB()
     {
         return sapm::ApplicationManager::messageSwitchSpecialInput(
-            application, std::make_unique<gui::SwitchSpecialChar>(gui::SwitchSpecialChar::Type::Request, application->GetName()));
+            application,
+            std::make_unique<gui::SwitchSpecialChar>(gui::SwitchSpecialChar::Type::Request, application->GetName()));
     }
 
 } /* namespace gui */
diff --git a/module-apps/windows/AppWindow.hpp b/module-apps/windows/AppWindow.hpp
index 3ce71ebd3..ffe4932f6 100644
--- a/module-apps/windows/AppWindow.hpp
+++ b/module-apps/windows/AppWindow.hpp
@@ -15,71 +15,77 @@
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
 
-namespace app {
-	class Application;
+namespace app
+{
+    class Application;
 };
 
-
-namespace gui {
+namespace gui
+{
     namespace name
     {
         namespace window
         {
             const inline std::string main_window = "MainWindow";
-            const inline std::string no_window = "";
+            const inline std::string no_window   = "";
         } // namespace window
     }     // namespace name
 
-/*
- * @brief This is wrapper for gui window used within applications.
- */
-class AppWindow: public Window {
-protected:
+    /*
+     * @brief This is wrapper for gui window used within applications.
+     */
+    class AppWindow : public Window
+    {
+      protected:
+        /// actual built window title
+        gui::Label *title = nullptr;
+        /**
+         * Information bar for the buttons on the bottom of the page.
+         */
+        gui::BottomBar *bottomBar = nullptr;
+        /**
+         * Information bar for signal, battery and lock icon on the top of the screen.
+         */
+        gui::TopBar *topBar = nullptr;
+        /**
+         * Pointer to the application object that owns the window.
+         */
+        app::Application *application = nullptr;
 
-    /// actual built window title
-	gui::Label* title = nullptr;
-	/**
-	 * Information bar for the buttons on the bottom of the page.
-	 */
-	gui::BottomBar* bottomBar = nullptr;
-	/**
-	 * Information bar for signal, battery and lock icon on the top of the screen.
-	 */
-	gui::TopBar* topBar = nullptr;
-	/**
-	 * Pointer to the application object that owns the window.
-	 */
-	app::Application* application = nullptr;
+      public:
+        AppWindow(app::Application *app, std::string name, uint32_t id = GUIWindowID++);
+        AppWindow(AppWindow *win);
+        virtual ~AppWindow();
 
-public:
+        app::Application *getApplication()
+        {
+            return application;
+        };
+        void setApplication(app::Application *app)
+        {
+            application = app;
+        };
+        virtual bool onDatabaseMessage(sys::Message *msg);
 
-	AppWindow( app::Application* app, std::string name, uint32_t id=GUIWindowID++ );
-	AppWindow( AppWindow* win );
-	virtual ~AppWindow();
+        bool batteryCharging(bool charging);
+        bool setSIM();
+        // updates battery level in the window
+        bool updateBatteryLevel(uint32_t percentage);
+        // updates battery level in the window
+        bool updateSignalStrength();
+        virtual bool updateTime(const UTF8 &timeStr);
+        virtual bool updateTime(const uint32_t &timestamp, bool mode24H);
+        void setTitle(const UTF8 &text);
 
-	app::Application* getApplication() { return application; };
-	void setApplication( app::Application* app ) { application = app; };
-	virtual bool onDatabaseMessage( sys::Message* msg );
-
-    bool batteryCharging(bool charging);
-    bool setSIM();
-    //updates battery level in the window
-	bool updateBatteryLevel( uint32_t percentage );
-	//updates battery level in the window
-    bool updateSignalStrength();
-    virtual bool updateTime( const UTF8& timeStr );
-	virtual bool updateTime( const uint32_t& timestamp, bool mode24H );
-    void setTitle(const UTF8 &text);
-
-	void rebuild() override;
-	void buildInterface() override;
-	void destroyInterface() override;
-	bool onInput( const InputEvent& inputEvent ) override;
-	std::list<DrawCommand*> buildDrawList() override;
-    void textModeShowCB(const UTF8 &text);
-    bool textSelectSpecialCB();
-    bool returnToPreviousView();
-};
+        void rebuild() override;
+        void buildInterface() override;
+        void destroyInterface() override;
+        bool onInput(const InputEvent &inputEvent) override;
+        std::list<DrawCommand *> buildDrawList() override;
+        void textModeShowCB(const UTF8 &text);
+        bool textSelectSpecialCB();
+        bool returnToPreviousView();
+    };
 
 } /* namespace gui */
 
diff --git a/module-apps/windows/Dialog.cpp b/module-apps/windows/Dialog.cpp
index fc2feb5a5..367cdec0d 100644
--- a/module-apps/windows/Dialog.cpp
+++ b/module-apps/windows/Dialog.cpp
@@ -4,7 +4,8 @@
 
 using namespace gui;
 
-Dialog::Dialog(app::Application *app, const std::string &name, const Dialog::Meta &meta) : gui::AppWindow(app, name), meta(meta)
+Dialog::Dialog(app::Application *app, const std::string &name, const Dialog::Meta &meta)
+    : gui::AppWindow(app, name), meta(meta)
 {
     AppWindow::buildInterface();
     // TODO fix elements positioning with styles ready, right now copied from Phonebook as it is
@@ -59,8 +60,7 @@ bool Dialog::onInput(const InputEvent &inputEvent)
 }
 
 void Dialog::buildInterface()
-{
-}
+{}
 
 void Dialog::update(const Meta &meta)
 {
diff --git a/module-apps/windows/Dialog.hpp b/module-apps/windows/Dialog.hpp
index 94f4120d9..b0af46431 100644
--- a/module-apps/windows/Dialog.hpp
+++ b/module-apps/windows/Dialog.hpp
@@ -10,7 +10,7 @@ namespace gui
     {
 
         Label *yes = nullptr, *no = nullptr;
-        Text *text = nullptr;
+        Text *text  = nullptr;
         Image *icon = nullptr;
 
       public:
diff --git a/module-apps/windows/OptionWindow.cpp b/module-apps/windows/OptionWindow.cpp
index 001b36121..4f4db287b 100644
--- a/module-apps/windows/OptionWindow.cpp
+++ b/module-apps/windows/OptionWindow.cpp
@@ -16,17 +16,16 @@ namespace gui
     }
 
     void OptionWindow::rebuild()
-    {
-    }
+    {}
 
     Item *newOptionLabel(const UTF8 &text, std::function<bool(Item &)> activatedCallback, Arrow arrow)
     {
         // TODO fix elements positioning with styles ready, right now moved from Settings main window as it is
-        gui::Label *label = new gui::Label(nullptr, 20, 0, style::window_width - 2 * 20, style::window::label::big_h, text);
+        gui::Label *label =
+            new gui::Label(nullptr, 20, 0, style::window_width - 2 * 20, style::window::label::big_h, text);
         style::window::decorateOption(label);
         label->activatedCallback = activatedCallback;
-        if (arrow == Arrow::Enabled)
-        {
+        if (arrow == Arrow::Enabled) {
             new gui::Image(label, 425 - 17, 24, 0, 0, "right_label_arrow");
         }
         return label;
@@ -44,8 +43,7 @@ namespace gui
 
     void OptionWindow::addOptions(std::list<Option> options)
     {
-        for (auto &el : options)
-        {
+        for (auto &el : options) {
             LOG_INFO("adding option: %s", el.text.c_str());
             addOptionLabel(el.text, el.activatedCallback, el.arrow);
         }
@@ -54,8 +52,7 @@ namespace gui
 
     void OptionWindow::addOptions(std::list<Item *> items)
     {
-        for (auto &el : items)
-        {
+        for (auto &el : items) {
             body->addWidget(el);
         }
         body->switchPage(0);
@@ -64,8 +61,7 @@ namespace gui
     void OptionWindow::clearOptions()
     {
 
-        for (auto el : body->children)
-        {
+        for (auto el : body->children) {
             delete el;
         }
         body->children.clear();
@@ -86,8 +82,11 @@ namespace gui
         // magical offset on designs
         int32_t offset_h = 8;
 
-        body = new gui::PageLayout(
-            this, {0, title->offset_h() + offset_h, this->getWidth(), this->getHeight() - offset_h - this->title->offset_h() - bottomBar->getHeight()});
+        body = new gui::PageLayout(this,
+                                   {0,
+                                    title->offset_h() + offset_h,
+                                    this->getWidth(),
+                                    this->getHeight() - offset_h - this->title->offset_h() - bottomBar->getHeight()});
 
         setFocusItem(body);
     }
@@ -104,13 +103,11 @@ namespace gui
     }
 
     void OptionWindow::onBeforeShow(ShowMode mode, SwitchData *data)
-    {
-    }
+    {}
 
     OptionWindow *newOptionWindow(app::Application *app, std::string name, std::list<Option> options)
     {
-        if (name == "")
-        {
+        if (name == "") {
             LOG_DEBUG("no name for window - take default");
             name = utils::localize.get("app_phonebook_options_title");
         }
diff --git a/module-apps/windows/OptionWindow.hpp b/module-apps/windows/OptionWindow.hpp
index 0f297a91e..76a5c56a0 100644
--- a/module-apps/windows/OptionWindow.hpp
+++ b/module-apps/windows/OptionWindow.hpp
@@ -17,17 +17,20 @@ namespace gui
 
     struct Option
     {
-        const UTF8 text = "";
+        const UTF8 text                               = "";
         std::function<bool(Item &)> activatedCallback = nullptr;
-        Arrow arrow = Arrow::Enabled;
-        Option(const UTF8 &text, std::function<bool(Item &)> cb, Arrow arrow) : text(text), activatedCallback(cb), arrow(arrow)
+        Arrow arrow                                   = Arrow::Enabled;
+        Option(const UTF8 &text, std::function<bool(Item &)> cb, Arrow arrow)
+            : text(text), activatedCallback(cb), arrow(arrow)
         {
             LOG_INFO("text: %s", text.c_str());
         }
     };
 
     /// creates new `option` label on heap with text description and on activated callback connected
-    Item *newOptionLabel(const UTF8 &text, std::function<bool(Item &)> activatedCallback, Arrow arrow = Arrow::Disabled);
+    Item *newOptionLabel(const UTF8 &text,
+                         std::function<bool(Item &)> activatedCallback,
+                         Arrow arrow = Arrow::Disabled);
     Item *newOptionLabel(const Option &option);
 
     class OptionWindow : public AppWindow
diff --git a/module-apps/windows/Options.cpp b/module-apps/windows/Options.cpp
index bdacdab99..be824ac46 100644
--- a/module-apps/windows/Options.cpp
+++ b/module-apps/windows/Options.cpp
@@ -11,16 +11,19 @@ namespace gui::options
     {
         assert(app != nullptr);
         return {UTF8(utils::localize.get("sms_call_text")) + contact.primaryName,
-                [app, contact, callOperation](gui::Item &item) { return app::call(app, callOperation, contact); }, gui::Arrow::Enabled};
+                [app, contact, callOperation](gui::Item &item) { return app::call(app, callOperation, contact); },
+                gui::Arrow::Enabled};
     }
 
-    Option contact(Application *app, ContactOperation contactOperation, const ContactRecord &contactRec, gui::Arrow arrow)
+    Option contact(Application *app,
+                   ContactOperation contactOperation,
+                   const ContactRecord &contactRec,
+                   gui::Arrow arrow)
     {
         assert(app != nullptr);
 
         std::string str;
-        switch (contactOperation)
-        {
+        switch (contactOperation) {
         case ContactOperation::Details:
             str = utils::localize.get("app_options_contact_details");
             break;
diff --git a/module-apps/windows/Options.hpp b/module-apps/windows/Options.hpp
index 21677e04d..fd82e6686 100644
--- a/module-apps/windows/Options.hpp
+++ b/module-apps/windows/Options.hpp
@@ -7,5 +7,8 @@
 namespace gui::options
 {
     Option call(app::Application *app, app::CallOperation callOperation, const ContactRecord &contact);
-    Option contact(app::Application *app, app::ContactOperation contactOperation, const ContactRecord &contactRec, gui::Arrow arrow = gui::Arrow::Disabled);
+    Option contact(app::Application *app,
+                   app::ContactOperation contactOperation,
+                   const ContactRecord &contactRec,
+                   gui::Arrow arrow = gui::Arrow::Disabled);
 } // namespace gui::options
diff --git a/module-audio/Audio/Audio.cpp b/module-audio/Audio/Audio.cpp
index 4e395e953..ea4e303df 100644
--- a/module-audio/Audio/Audio.cpp
+++ b/module-audio/Audio/Audio.cpp
@@ -2,23 +2,23 @@
  *  @file Audio.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 22.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "Audio.hpp"
 
 #include "Operation/Operation.hpp"
 
 #include "log/log.hpp"
 
-namespace audio {
+namespace audio
+{
 
     Audio::Audio(std::function<int32_t(AudioEvents event)> asyncCallback)
-            : currentOperation(), asyncCallback(asyncCallback) {
+        : currentOperation(), asyncCallback(asyncCallback)
+    {
 
         auto ret = Operation::Create(Operation::Type::Idle, "");
         if (ret) {
@@ -26,24 +26,29 @@ namespace audio {
         }
     }
 
-    Position Audio::GetPosition() {
+    Position Audio::GetPosition()
+    {
         return currentOperation->GetPosition();
     }
 
-    std::optional<Tags> Audio::GetFileTags(const char *filename) {
+    std::optional<Tags> Audio::GetFileTags(const char *filename)
+    {
         auto ret = decoder::Create(filename);
         if (ret == nullptr) {
             return {};
-        } else {
+        }
+        else {
             return *ret->fetchTags();
         };
     }
 
-    int32_t Audio::SendEvent(const Operation::Event evt, const EventData *data) {
+    int32_t Audio::SendEvent(const Operation::Event evt, const EventData *data)
+    {
         return currentOperation->SendEvent(evt, data);
     }
 
-    int32_t Audio::SetOutputVolume(Volume vol) {
+    int32_t Audio::SetOutputVolume(Volume vol)
+    {
         float volSet = vol;
         if (vol > 1) {
             volSet = 1;
@@ -54,7 +59,8 @@ namespace audio {
         return currentOperation->SetOutputVolume(volSet);
     }
 
-    int32_t Audio::SetInputGain(Gain gain) {
+    int32_t Audio::SetInputGain(Gain gain)
+    {
         float gainToSet = gain;
         if (gain > 10) {
             gainToSet = 10.0;
@@ -65,64 +71,69 @@ namespace audio {
         return currentOperation->SetInputGain(gainToSet);
     }
 
-    int32_t Audio::Start(Operation::Type op, const char *fileName) {
+    int32_t Audio::Start(Operation::Type op, const char *fileName)
+    {
 
         auto ret = Operation::Create(op, fileName);
         if (ret) {
 
             switch (op) {
-                case Operation::Type::Playback:
-                    currentState = State::Playback;
-                    break;
-                case Operation::Type::Recorder:
-                    currentState = State::Recording;
-                    break;
-                case Operation::Type::Router:
-                    currentState = State::Routing;
-                    break;
+            case Operation::Type::Playback:
+                currentState = State::Playback;
+                break;
+            case Operation::Type::Recorder:
+                currentState = State::Recording;
+                break;
+            case Operation::Type::Router:
+                currentState = State::Routing;
+                break;
             }
             currentOperation = std::move(ret.value());
-        } else {
+        }
+        else {
             // If creating operation failed fallback to IdleOperation which is guaranteed to work
             currentOperation = Operation::Create(Operation::Type::Idle, "").value_or(nullptr);
-            currentState = State ::Idle;
-            return static_cast<int32_t >(RetCode::OperationCreateFailed);
+            currentState     = State ::Idle;
+            return static_cast<int32_t>(RetCode::OperationCreateFailed);
         }
 
         return currentOperation->Start(asyncCallback);
     }
 
-    int32_t Audio::Stop() {
+    int32_t Audio::Stop()
+    {
         if (currentState == State::Idle) {
-            return static_cast<int32_t >(RetCode::Success);
+            return static_cast<int32_t>(RetCode::Success);
         }
 
         auto retStop = currentOperation->Stop();
 
         auto ret = Operation::Create(Operation::Type::Idle, "");
         if (ret) {
-            currentState = State::Idle;
+            currentState     = State::Idle;
             currentOperation = std::move(ret.value());
-            return static_cast<int32_t >(RetCode::Success);
-        } else {
-            return static_cast<int32_t >(RetCode::OperationCreateFailed);
+            return static_cast<int32_t>(RetCode::Success);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::OperationCreateFailed);
         }
     }
 
-    int32_t Audio::Pause() {
+    int32_t Audio::Pause()
+    {
         if (currentState == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         return currentOperation->Pause();
     }
 
-    int32_t Audio::Resume() {
+    int32_t Audio::Resume()
+    {
         if (currentState == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
         return currentOperation->Resume();
     }
 
-}
-
+} // namespace audio
diff --git a/module-audio/Audio/Audio.hpp b/module-audio/Audio/Audio.hpp
index b72bd1e22..0d63d3b50 100644
--- a/module-audio/Audio/Audio.hpp
+++ b/module-audio/Audio/Audio.hpp
@@ -2,13 +2,11 @@
  *  @file Audio.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 22.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_AUDIO_HPP
 #define PUREPHONE_AUDIO_HPP
 
@@ -20,12 +18,14 @@
 #include "Operation/Operation.hpp"
 #include "decoder/decoder.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class Audio {
-    public:
-
-        enum class State {
+    class Audio
+    {
+      public:
+        enum class State
+        {
             Idle,
             Playback,
             Recording,
@@ -34,30 +34,39 @@ namespace audio {
 
         Audio(std::function<int32_t(AudioEvents event)> asyncCallback);
 
-        //Events
-        int32_t SendEvent(const Operation::Event evt, const EventData *data=nullptr);
+        // Events
+        int32_t SendEvent(const Operation::Event evt, const EventData *data = nullptr);
 
-        //utilities
+        // utilities
         Position GetPosition();
 
-        State GetCurrentState() const { return currentState; }
+        State GetCurrentState() const
+        {
+            return currentState;
+        }
 
         std::optional<Tags> GetFileTags(const char *filename);
 
-        //Range 0-1
+        // Range 0-1
         int32_t SetOutputVolume(Volume vol);
 
-        //Range 0-10
+        // Range 0-10
         int32_t SetInputGain(Gain gain);
 
-        Volume GetOutputVolume() { return currentOperation->GetOutputVolume(); }
+        Volume GetOutputVolume()
+        {
+            return currentOperation->GetOutputVolume();
+        }
 
-        Gain GetInputGain() { return currentOperation->GetInputGain(); }
+        Gain GetInputGain()
+        {
+            return currentOperation->GetInputGain();
+        }
 
-        //TODO:M.P Set/Get inputGain/outputVolume for each profile
+        // TODO:M.P Set/Get inputGain/outputVolume for each profile
 
-        //Operations
-        int32_t Start(Operation::Type op, const char *fileName="");
+        // Operations
+        int32_t Start(Operation::Type op, const char *fileName = "");
 
         int32_t Stop();
 
@@ -65,18 +74,13 @@ namespace audio {
 
         int32_t Resume();
 
-
-    private:
-
+      private:
         State currentState = State::Idle;
         std::unique_ptr<Operation> currentOperation;
 
         std::function<int32_t(AudioEvents event)> asyncCallback = nullptr;
-
-
     };
 
-}
+} // namespace audio
 
-
-#endif //PUREPHONE_AUDIO_HPP
+#endif // PUREPHONE_AUDIO_HPP
diff --git a/module-audio/Audio/AudioCommon.hpp b/module-audio/Audio/AudioCommon.hpp
index 8165ee2ea..d49234e7f 100644
--- a/module-audio/Audio/AudioCommon.hpp
+++ b/module-audio/Audio/AudioCommon.hpp
@@ -2,23 +2,23 @@
  *  @file Common.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_AUDIOCOMMON_HPP
 #define PUREPHONE_AUDIOCOMMON_HPP
 
-namespace audio {
+namespace audio
+{
 
     using Position = float;
-    using Volume = float;
-    using Gain = float;
+    using Volume   = float;
+    using Gain     = float;
 
-    enum class RetCode {
+    enum class RetCode
+    {
         Success = 0,
         InvokedInIncorrectState,
         UnsupportedProfile,
@@ -30,11 +30,12 @@ namespace audio {
 
     };
 
-    enum class AudioEvents {
+    enum class AudioEvents
+    {
         EndOfFile,
         FileSystemNoSpace
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_AUDIOCOMMON_HPP
+#endif // PUREPHONE_AUDIOCOMMON_HPP
diff --git a/module-audio/Audio/Operation/IdleOperation.cpp b/module-audio/Audio/Operation/IdleOperation.cpp
index 2af23c03b..1189b2ab9 100644
--- a/module-audio/Audio/Operation/IdleOperation.cpp
+++ b/module-audio/Audio/Operation/IdleOperation.cpp
@@ -2,29 +2,31 @@
  *  @file IdleOperation.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 25.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "IdleOperation.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    IdleOperation::IdleOperation([[maybe_unused]] const char *file) {
+    IdleOperation::IdleOperation([[maybe_unused]] const char *file)
+    {
         isInitialized = true;
     }
 
-    IdleOperation::~IdleOperation() {
+    IdleOperation::~IdleOperation()
+    {}
+
+    int32_t IdleOperation::SetOutputVolume(float vol)
+    {
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t IdleOperation::SetOutputVolume(float vol) {
-        return static_cast<int32_t >(RetCode::Success);
+    int32_t IdleOperation::SetInputGain(float gain)
+    {
+        return static_cast<int32_t>(RetCode::Success);
     }
-
-    int32_t IdleOperation::SetInputGain(float gain) {
-        return static_cast<int32_t >(RetCode::Success);
-    }
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/Operation/IdleOperation.hpp b/module-audio/Audio/Operation/IdleOperation.hpp
index 69c9ea51d..a13d9aaee 100644
--- a/module-audio/Audio/Operation/IdleOperation.hpp
+++ b/module-audio/Audio/Operation/IdleOperation.hpp
@@ -2,13 +2,11 @@
  *  @file IdleOperation.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 25.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_IDLEOPERATION_HPP
 #define PUREPHONE_IDLEOPERATION_HPP
 
@@ -18,35 +16,56 @@
 
 #include "Operation.hpp"
 
-namespace audio {
-
-    class IdleOperation : public Operation {
-    public:
+namespace audio
+{
 
+    class IdleOperation : public Operation
+    {
+      public:
         IdleOperation(const char *file);
 
         ~IdleOperation();
 
-        int32_t Start([[maybe_unused]] std::function<int32_t(AudioEvents event)> callback) override final { return 0; }
+        int32_t Start([[maybe_unused]] std::function<int32_t(AudioEvents event)> callback) override final
+        {
+            return 0;
+        }
 
-        int32_t Stop() override final { return 0; }
+        int32_t Stop() override final
+        {
+            return 0;
+        }
 
-        int32_t Pause() override final { return 0; }
+        int32_t Pause() override final
+        {
+            return 0;
+        }
 
-        int32_t Resume() override final { return 0; }
+        int32_t Resume() override final
+        {
+            return 0;
+        }
 
-        int32_t SendEvent(const Event evt, const EventData *data = nullptr) override final { return 0; }
+        int32_t SendEvent(const Event evt, const EventData *data = nullptr) override final
+        {
+            return 0;
+        }
 
-        int32_t SwitchProfile(const Profile::Type type) override final { return 0; }
+        int32_t SwitchProfile(const Profile::Type type) override final
+        {
+            return 0;
+        }
 
         int32_t SetOutputVolume(float vol) override final;
 
         int32_t SetInputGain(float gain) override final;
 
-        Position GetPosition() override final { return 0.0; }
+        Position GetPosition() override final
+        {
+            return 0.0;
+        }
     };
 
+} // namespace audio
 
-}
-
-#endif //PUREPHONE_IDLEOPERATION_HPP
+#endif // PUREPHONE_IDLEOPERATION_HPP
diff --git a/module-audio/Audio/Operation/Operation.cpp b/module-audio/Audio/Operation/Operation.cpp
index 1184d32b2..565a9840e 100644
--- a/module-audio/Audio/Operation/Operation.cpp
+++ b/module-audio/Audio/Operation/Operation.cpp
@@ -2,13 +2,11 @@
  *  @file Operation.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "Operation.hpp"
 
 #include <algorithm>
@@ -18,47 +16,49 @@
 #include "RecorderOperation.hpp"
 #include "RouterOperation.hpp"
 
-
 #include "bsp/audio/bsp_audio.hpp"
 #include "Audio/decoder/decoder.hpp"
 
-namespace audio {
+namespace audio
+{
 
-
-    std::optional<std::unique_ptr<Operation>>
-    Operation::Create(Operation::Type t, const char *fileName) {
+    std::optional<std::unique_ptr<Operation>> Operation::Create(Operation::Type t, const char *fileName)
+    {
         std::unique_ptr<Operation> inst;
 
         switch (t) {
-            case Type::Idle:
-                inst = std::make_unique<IdleOperation>(fileName);
-                break;
-            case Type::Playback:
-                inst = std::make_unique<PlaybackOperation>(fileName);
-                break;
-            case Type::Router:
-                inst = std::make_unique<RouterOperation>(fileName);
-                break;
-            case Type::Recorder:
-                inst = std::make_unique<RecorderOperation>(fileName);
-                break;
+        case Type::Idle:
+            inst = std::make_unique<IdleOperation>(fileName);
+            break;
+        case Type::Playback:
+            inst = std::make_unique<PlaybackOperation>(fileName);
+            break;
+        case Type::Router:
+            inst = std::make_unique<RouterOperation>(fileName);
+            break;
+        case Type::Recorder:
+            inst = std::make_unique<RecorderOperation>(fileName);
+            break;
         }
 
         if (inst->isInitialized) {
             return inst;
-        } else {
+        }
+        else {
             return {};
         }
     }
 
-    std::optional<Profile *> Operation::GetProfile(const Profile::Type type) {
-        auto ret = std::find_if(availableProfiles.begin(), availableProfiles.end(),
-                                [type](const auto &w) { return w->GetType() == type; });
+    std::optional<Profile *> Operation::GetProfile(const Profile::Type type)
+    {
+        auto ret = std::find_if(
+            availableProfiles.begin(), availableProfiles.end(), [type](const auto &w) { return w->GetType() == type; });
         if (ret == availableProfiles.end()) {
             return {};
-        } else {
+        }
+        else {
             return (*ret).get();
         }
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/Operation/Operation.hpp b/module-audio/Audio/Operation/Operation.hpp
index 1b74f9947..24e70bacb 100644
--- a/module-audio/Audio/Operation/Operation.hpp
+++ b/module-audio/Audio/Operation/Operation.hpp
@@ -2,13 +2,11 @@
  *  @file Operation.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_OPERATION_HPP
 #define PUREPHONE_OPERATION_HPP
 
@@ -21,31 +19,36 @@
 #include "Audio/encoder/Encoder.hpp"
 #include "Audio/Profiles/Profile.hpp"
 
-namespace audio {
-
-    class EventData {
-    public:
-        ~EventData() {}
+namespace audio
+{
 
+    class EventData
+    {
+      public:
+        ~EventData()
+        {}
     };
 
-    class Operation {
-    public:
-
-        enum class State {
+    class Operation
+    {
+      public:
+        enum class State
+        {
             Idle,
             Active,
             Paused
         };
 
-        enum class Type {
+        enum class Type
+        {
             Idle,
             Playback,
             Recorder,
             Router
         };
 
-        enum class Event {
+        enum class Event
+        {
             HeadphonesPlugin,
             HeadphonesUnplug,
             BTHeadsetOn,
@@ -60,10 +63,10 @@ namespace audio {
             CallSpeakerphoneOff,
         };
 
-        virtual ~Operation() {}
+        virtual ~Operation()
+        {}
 
-        static std::optional<std::unique_ptr<Operation>>
-        Create(Type t, const char *fileName);
+        static std::optional<std::unique_ptr<Operation>> Create(Type t, const char *fileName);
 
         virtual int32_t Start(std::function<int32_t(AudioEvents event)> callback) = 0;
 
@@ -73,7 +76,7 @@ namespace audio {
 
         virtual int32_t Resume() = 0;
 
-        virtual int32_t SendEvent(const Event evt, const EventData *data=nullptr) = 0;
+        virtual int32_t SendEvent(const Event evt, const EventData *data = nullptr) = 0;
 
         virtual int32_t SetOutputVolume(float vol) = 0;
 
@@ -81,19 +84,30 @@ namespace audio {
 
         virtual Position GetPosition() = 0;
 
-        Volume GetOutputVolume() { return currentProfile->GetOutputVolume(); }
+        Volume GetOutputVolume()
+        {
+            return currentProfile->GetOutputVolume();
+        }
 
-        Gain GetInputGain() { return currentProfile->GetInputGain(); }
+        Gain GetInputGain()
+        {
+            return currentProfile->GetInputGain();
+        }
 
-        State GetState() { return state; }
+        State GetState()
+        {
+            return state;
+        }
 
-        const Profile *GetProfile() { return currentProfile; }
-
-    protected:
+        const Profile *GetProfile()
+        {
+            return currentProfile;
+        }
 
+      protected:
         Profile *currentProfile;
         std::vector<std::unique_ptr<Profile>> availableProfiles;
-        State state = State::Idle;
+        State state                                             = State::Idle;
         std::function<int32_t(AudioEvents event)> eventCallback = nullptr;
 
         bool isInitialized = false;
@@ -102,12 +116,10 @@ namespace audio {
 
         std::optional<Profile *> GetProfile(const Profile::Type type);
 
-        std::function<int32_t(const void *inputBuffer,
-                              void *outputBuffer,
-                              unsigned long framesPerBuffer)> audioCallback = nullptr;
-
+        std::function<int32_t(const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer)>
+            audioCallback = nullptr;
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_OPERATION_HPP
+#endif // PUREPHONE_OPERATION_HPP
diff --git a/module-audio/Audio/Operation/PlaybackOperation.cpp b/module-audio/Audio/Operation/PlaybackOperation.cpp
index 44772264c..8b6913c00 100644
--- a/module-audio/Audio/Operation/PlaybackOperation.cpp
+++ b/module-audio/Audio/Operation/PlaybackOperation.cpp
@@ -2,13 +2,11 @@
  *  @file PlaybackOperation.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "PlaybackOperation.hpp"
 #include "bsp/audio/bsp_audio.hpp"
 #include "Audio/decoder/decoder.hpp"
@@ -21,24 +19,24 @@
 #include "FreeRTOS.h"
 #include "task.h"
 
-namespace audio {
+namespace audio
+{
 
+#define PERF_STATS_ON 0
 
-#define PERF_STATS_ON        0
+    PlaybackOperation::PlaybackOperation(const char *file) : dec(nullptr)
+    {
 
-    PlaybackOperation::PlaybackOperation(const char *file) : dec(nullptr) {
-
-        audioCallback = [this](const void *inputBuffer,
-                               void *outputBuffer,
-                               unsigned long framesPerBuffer) -> int32_t {
+        audioCallback = [this](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
 
 #if PERF_STATS_ON == 1
             auto tstamp = xTaskGetTickCount();
 #endif
             auto ret = dec->decode(framesPerBuffer, reinterpret_cast<int16_t *>(outputBuffer));
 #if PERF_STATS_ON == 1
-             LOG_DEBUG("Dec:%dms", xTaskGetTickCount() - tstamp);
-            // LOG_DEBUG("Watermark:%lu",uxTaskGetStackHighWaterMark2(NULL));  M.P: left here on purpose, it's handy during sf tests on hardware
+            LOG_DEBUG("Dec:%dms", xTaskGetTickCount() - tstamp);
+            // LOG_DEBUG("Watermark:%lu",uxTaskGetStackHighWaterMark2(NULL));  M.P: left here on purpose, it's handy
+            // during sf tests on hardware
 #endif
             if (ret == 0) {
                 state = State::Idle;
@@ -47,7 +45,7 @@ namespace audio {
             return ret;
         };
 
-        //TODO:M.P should be fetched from DB
+        // TODO:M.P should be fetched from DB
         availableProfiles.push_back(std::make_unique<ProfilePlaybackLoudspeaker>(nullptr, 1.0));
         availableProfiles.push_back(std::make_unique<ProfilePlaybackHeadphones>(nullptr, 0.2));
         currentProfile = availableProfiles[0].get();
@@ -58,105 +56,111 @@ namespace audio {
             return;
         }
         audioDevice = bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioCallback).value_or(nullptr);
-        if(audioDevice == nullptr){
+        if (audioDevice == nullptr) {
             LOG_ERROR("Error creating AudioDevice");
             return;
         }
 
-
         isInitialized = true;
     }
 
-    int32_t PlaybackOperation::Start(std::function<int32_t(AudioEvents event)> callback) {
+    int32_t PlaybackOperation::Start(std::function<int32_t(AudioEvents event)> callback)
+    {
 
         if (state == State::Active || state == State::Paused) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         auto tags = dec->fetchTags();
 
         eventCallback = callback;
-        state = State::Active;
+        state         = State::Active;
 
-        currentProfile->SetInOutFlags(
-                tags->num_channel == 2 ? static_cast<uint32_t >(bsp::AudioDevice::Flags::OutPutStereo)
-                                       : static_cast<uint32_t >(bsp::AudioDevice::Flags::OutputMono));
+        currentProfile->SetInOutFlags(tags->num_channel == 2
+                                          ? static_cast<uint32_t>(bsp::AudioDevice::Flags::OutPutStereo)
+                                          : static_cast<uint32_t>(bsp::AudioDevice::Flags::OutputMono));
 
         currentProfile->SetSampleRate(tags->sample_rate);
 
         return audioDevice->Start(currentProfile->GetAudioFormat());
     }
 
-    int32_t PlaybackOperation::Stop() {
+    int32_t PlaybackOperation::Stop()
+    {
         if (state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
         state = State::Idle;
         return audioDevice->Stop();
     }
 
-    int32_t PlaybackOperation::Pause() {
+    int32_t PlaybackOperation::Pause()
+    {
 
         if (state == State::Paused || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Paused;
         return audioDevice->Stop();
     }
 
-    int32_t PlaybackOperation::Resume() {
+    int32_t PlaybackOperation::Resume()
+    {
 
         if (state == State::Active || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
         state = State::Active;
         return audioDevice->Start(currentProfile->GetAudioFormat());
     }
 
-    int32_t PlaybackOperation::SetOutputVolume(float vol) {
+    int32_t PlaybackOperation::SetOutputVolume(float vol)
+    {
         currentProfile->SetOutputVolume(vol);
         audioDevice->OutputVolumeCtrl(vol);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t PlaybackOperation::SetInputGain(float gain) {
+    int32_t PlaybackOperation::SetInputGain(float gain)
+    {
         currentProfile->SetInputGain(gain);
         audioDevice->InputGainCtrl(gain);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    Position PlaybackOperation::GetPosition() {
+    Position PlaybackOperation::GetPosition()
+    {
         return dec->getCurrentPosition();
-
     }
 
-    int32_t PlaybackOperation::SendEvent(const Operation::Event evt, const EventData *data) {
+    int32_t PlaybackOperation::SendEvent(const Operation::Event evt, const EventData *data)
+    {
 
         switch (evt) {
-            case Event::HeadphonesPlugin:
-                SwitchProfile(Profile::Type::PlaybackHeadphones);
-                break;
-            case Event::HeadphonesUnplug:
-                //TODO: Switch to playback headphones/bt profile if present
-                SwitchProfile(Profile::Type::PlaybackLoudspeaker);
-                break;
-            case Event::BTA2DPOn:
-                break;
-            case Event::BTA2DPOff:
-                break;
-            case Event::BTHeadsetOn:
-                break;
-            case Event::BTHeadsetOff:
-                break;
-            default:
-                return static_cast<int32_t >(RetCode::UnsupportedEvent);
-
+        case Event::HeadphonesPlugin:
+            SwitchProfile(Profile::Type::PlaybackHeadphones);
+            break;
+        case Event::HeadphonesUnplug:
+            // TODO: Switch to playback headphones/bt profile if present
+            SwitchProfile(Profile::Type::PlaybackLoudspeaker);
+            break;
+        case Event::BTA2DPOn:
+            break;
+        case Event::BTA2DPOff:
+            break;
+        case Event::BTHeadsetOn:
+            break;
+        case Event::BTHeadsetOff:
+            break;
+        default:
+            return static_cast<int32_t>(RetCode::UnsupportedEvent);
         }
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t PlaybackOperation::SwitchProfile(const Profile::Type type) {
+    int32_t PlaybackOperation::SwitchProfile(const Profile::Type type)
+    {
 
         uint32_t currentSampleRate = currentProfile->GetSampleRate();
         uint32_t currentInOutFlags = currentProfile->GetInOutFlags();
@@ -164,8 +168,9 @@ namespace audio {
         auto ret = GetProfile(type);
         if (ret) {
             currentProfile = ret.value();
-        } else {
-            return static_cast<int32_t >(RetCode::UnsupportedProfile);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::UnsupportedProfile);
         }
 
         audioDevice = bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioCallback).value_or(nullptr);
@@ -173,22 +178,19 @@ namespace audio {
         currentProfile->SetSampleRate(currentSampleRate);
         currentProfile->SetInOutFlags(currentInOutFlags);
 
-
         switch (state) {
-            case State::Idle:
-            case State::Paused:
-                break;
-
-            case State::Active:
-                state = State::Idle;
-                Start(eventCallback);
-                break;
+        case State::Idle:
+        case State::Paused:
+            break;
 
+        case State::Active:
+            state = State::Idle;
+            Start(eventCallback);
+            break;
         }
 
-
-        //TODO:M.P add error handling
+        // TODO:M.P add error handling
         return 0;
     }
 
-}
+} // namespace audio
diff --git a/module-audio/Audio/Operation/PlaybackOperation.hpp b/module-audio/Audio/Operation/PlaybackOperation.hpp
index b1891678f..1a23eb5a4 100644
--- a/module-audio/Audio/Operation/PlaybackOperation.hpp
+++ b/module-audio/Audio/Operation/PlaybackOperation.hpp
@@ -2,13 +2,11 @@
  *  @file PlaybackOperation.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PLAYBACKOPERATION_HPP
 #define PUREPHONE_PLAYBACKOPERATION_HPP
 
@@ -19,14 +17,14 @@
 
 #include "Operation.hpp"
 
-namespace audio {
+namespace audio
+{
 
     class decoder;
 
-
-    class PlaybackOperation : public Operation {
-    public:
-
+    class PlaybackOperation : public Operation
+    {
+      public:
         PlaybackOperation(const char *file);
 
         int32_t Start(std::function<int32_t(AudioEvents event)> callback) override final;
@@ -47,12 +45,11 @@ namespace audio {
 
         Position GetPosition() override final;
 
-    private:
+      private:
         std::unique_ptr<decoder> dec;
         std::unique_ptr<bsp::AudioDevice> audioDevice;
     };
 
-}
+} // namespace audio
 
-
-#endif //PUREPHONE_PLAYBACKOPERATION_HPP
+#endif // PUREPHONE_PLAYBACKOPERATION_HPP
diff --git a/module-audio/Audio/Operation/RecorderOperation.cpp b/module-audio/Audio/Operation/RecorderOperation.cpp
index 4a7c5b567..2654ce4c4 100644
--- a/module-audio/Audio/Operation/RecorderOperation.cpp
+++ b/module-audio/Audio/Operation/RecorderOperation.cpp
@@ -2,13 +2,11 @@
  *  @file RecorderOperation.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RecorderOperation.hpp"
 #include "Audio/encoder/Encoder.hpp"
 #include "bsp/audio/bsp_audio.hpp"
@@ -21,17 +19,17 @@
 #include "FreeRTOS.h"
 #include "task.h"
 
-namespace audio {
+namespace audio
+{
 
-#define PERF_STATS_ON        0
+#define PERF_STATS_ON 0
 
     using namespace bsp;
 
-    RecorderOperation::RecorderOperation(const char *file) {
+    RecorderOperation::RecorderOperation(const char *file)
+    {
 
-        audioCallback = [this](const void *inputBuffer,
-                               void *outputBuffer,
-                               unsigned long framesPerBuffer) -> int32_t {
+        audioCallback = [this](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
 
 #if PERF_STATS_ON == 1
             auto tstamp = xTaskGetTickCount();
@@ -39,42 +37,38 @@ namespace audio {
             auto ret = enc->Encode(framesPerBuffer, reinterpret_cast<int16_t *>(const_cast<void *>(inputBuffer)));
 #if PERF_STATS_ON == 1
             LOG_DEBUG("Enc:%dms", xTaskGetTickCount() - tstamp);
-            // LOG_DEBUG("Watermark:%lu",uxTaskGetStackHighWaterMark2(NULL));  M.P: left here on purpose, it's handy during sf tests on hardware
+            // LOG_DEBUG("Watermark:%lu",uxTaskGetStackHighWaterMark2(NULL));  M.P: left here on purpose, it's handy
+            // during sf tests on hardware
 #endif
             if (ret == 0) {
                 state = State::Idle;
                 eventCallback(AudioEvents::FileSystemNoSpace);
             }
             return ret;
-
         };
 
-        //TODO:M.P should be fetched from DB
+        // TODO:M.P should be fetched from DB
         availableProfiles.push_back(std::make_unique<ProfileRecordingOnBoardMic>(nullptr, 20.0));
         availableProfiles.push_back(std::make_unique<ProfileRecordingHeadset>(nullptr, 10.0));
 
         currentProfile = availableProfiles[0].get();
 
         uint32_t channels = 0;
-        if ((currentProfile->GetInOutFlags() & static_cast<uint32_t >(AudioDevice::Flags::InputLeft)) ||
-            (currentProfile->GetInOutFlags() & static_cast<uint32_t >(AudioDevice::Flags::InputRight))) {
+        if ((currentProfile->GetInOutFlags() & static_cast<uint32_t>(AudioDevice::Flags::InputLeft)) ||
+            (currentProfile->GetInOutFlags() & static_cast<uint32_t>(AudioDevice::Flags::InputRight))) {
             channels = 1;
-        } else if (currentProfile->GetInOutFlags() & static_cast<uint32_t >(AudioDevice::Flags::InputStereo)) {
+        }
+        else if (currentProfile->GetInOutFlags() & static_cast<uint32_t>(AudioDevice::Flags::InputStereo)) {
             channels = 2;
         }
 
-
-        enc = Encoder::Create(file, Encoder::Format{
-                .chanNr=channels,
-                .sampleRate=currentProfile->GetSampleRate()
-        });
+        enc = Encoder::Create(file, Encoder::Format{.chanNr = channels, .sampleRate = currentProfile->GetSampleRate()});
 
         if (enc == nullptr) {
             LOG_ERROR("Error during initializing encoder");
             return;
         }
 
-
         audioDevice = AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioCallback).value_or(nullptr);
         if (audioDevice == nullptr) {
             LOG_ERROR("Error creating AudioDevice");
@@ -84,120 +78,126 @@ namespace audio {
         isInitialized = true;
     }
 
-
-    int32_t RecorderOperation::Start(std::function<int32_t(AudioEvents event)> callback) {
+    int32_t RecorderOperation::Start(std::function<int32_t(AudioEvents event)> callback)
+    {
 
         if (state == State::Paused || state == State::Active) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         eventCallback = callback;
-        state = State::Active;
+        state         = State::Active;
 
         if (audioDevice->IsFormatSupported(currentProfile->GetAudioFormat())) {
             return audioDevice->Start(currentProfile->GetAudioFormat());
-        } else {
-            return static_cast<int32_t >(RetCode::InvalidFormat);
         }
-
-
+        else {
+            return static_cast<int32_t>(RetCode::InvalidFormat);
+        }
     }
 
-    int32_t RecorderOperation::Stop() {
+    int32_t RecorderOperation::Stop()
+    {
 
         if (state == State::Paused || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Idle;
         return audioDevice->Stop();
     }
 
-    int32_t RecorderOperation::Pause() {
+    int32_t RecorderOperation::Pause()
+    {
 
         if (state == State::Paused || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Paused;
         return audioDevice->Stop();
     }
 
-    int32_t RecorderOperation::Resume() {
+    int32_t RecorderOperation::Resume()
+    {
 
         if (state == State::Active || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Active;
         return audioDevice->Start(currentProfile->GetAudioFormat());
     }
 
-    int32_t RecorderOperation::SendEvent(const Operation::Event evt, const EventData *data) {
+    int32_t RecorderOperation::SendEvent(const Operation::Event evt, const EventData *data)
+    {
         switch (evt) {
-            case Event::HeadphonesPlugin:
-                SwitchProfile(Profile::Type::RecordingHeadset);
-                break;
-            case Event::HeadphonesUnplug:
-                //TODO: Switch to recording bt profile if present
-                SwitchProfile(Profile::Type::RecordingBuiltInMic);
-                break;
-            case Event::BTHeadsetOn:
-                SwitchProfile(Profile::Type::RecordingBTHeadset);
-                break;
-            case Event::BTHeadsetOff:
-                //TODO: Switch to recording headphones profile if present
-                SwitchProfile(Profile::Type::RecordingBuiltInMic);
-                break;
-            default:
-                return static_cast<int32_t >(RetCode::UnsupportedEvent);
-
+        case Event::HeadphonesPlugin:
+            SwitchProfile(Profile::Type::RecordingHeadset);
+            break;
+        case Event::HeadphonesUnplug:
+            // TODO: Switch to recording bt profile if present
+            SwitchProfile(Profile::Type::RecordingBuiltInMic);
+            break;
+        case Event::BTHeadsetOn:
+            SwitchProfile(Profile::Type::RecordingBTHeadset);
+            break;
+        case Event::BTHeadsetOff:
+            // TODO: Switch to recording headphones profile if present
+            SwitchProfile(Profile::Type::RecordingBuiltInMic);
+            break;
+        default:
+            return static_cast<int32_t>(RetCode::UnsupportedEvent);
         }
 
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RecorderOperation::SwitchProfile(const Profile::Type type) {
+    int32_t RecorderOperation::SwitchProfile(const Profile::Type type)
+    {
 
         auto ret = GetProfile(type);
         if (ret) {
             currentProfile = ret.value();
-        } else {
-            return static_cast<int32_t >(RetCode::UnsupportedProfile);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::UnsupportedProfile);
         }
 
         audioDevice = AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioCallback).value_or(nullptr);
 
         switch (state) {
-            case State::Idle:
-            case State::Paused:
-                break;
+        case State::Idle:
+        case State::Paused:
+            break;
 
-            case State::Active:
-                state = State::Idle;
-                Start(eventCallback);
-                break;
+        case State::Active:
+            state = State::Idle;
+            Start(eventCallback);
+            break;
         }
 
-
-        //TODO:M.P add error handling
+        // TODO:M.P add error handling
         return 0;
     }
 
-    int32_t RecorderOperation::SetOutputVolume(float vol) {
+    int32_t RecorderOperation::SetOutputVolume(float vol)
+    {
         currentProfile->SetOutputVolume(vol);
         audioDevice->OutputVolumeCtrl(vol);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RecorderOperation::SetInputGain(float gain) {
+    int32_t RecorderOperation::SetInputGain(float gain)
+    {
         currentProfile->SetInputGain(gain);
         audioDevice->InputGainCtrl(gain);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    Position RecorderOperation::GetPosition() {
+    Position RecorderOperation::GetPosition()
+    {
         return enc->getCurrentPosition();
     }
 
-}
+} // namespace audio
diff --git a/module-audio/Audio/Operation/RecorderOperation.hpp b/module-audio/Audio/Operation/RecorderOperation.hpp
index 66a034bb1..ae1c2a438 100644
--- a/module-audio/Audio/Operation/RecorderOperation.hpp
+++ b/module-audio/Audio/Operation/RecorderOperation.hpp
@@ -2,28 +2,24 @@
  *  @file RecorderOperation.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RECORDEROPERATION_HPP
 #define PUREPHONE_RECORDEROPERATION_HPP
 
-
 #include "Operation.hpp"
 #include <Audio/encoder/Encoder.hpp>
 #include "bsp/audio/bsp_audio.hpp"
 
-namespace audio {
-
-
-    class RecorderOperation : public Operation {
-    public:
-
+namespace audio
+{
 
+    class RecorderOperation : public Operation
+    {
+      public:
         RecorderOperation(const char *file);
 
         int32_t Start(std::function<int32_t(AudioEvents event)> callback) override final;
@@ -44,14 +40,16 @@ namespace audio {
 
         Position GetPosition() override final;
 
-        uint32_t GetSize() { return enc->GetFileSize(); }
+        uint32_t GetSize()
+        {
+            return enc->GetFileSize();
+        }
 
-    private:
+      private:
         std::unique_ptr<Encoder> enc;
         std::unique_ptr<bsp::AudioDevice> audioDevice;
     };
 
-}
+} // namespace audio
 
-
-#endif //PUREPHONE_RECORDEROPERATION_HPP
+#endif // PUREPHONE_RECORDEROPERATION_HPP
diff --git a/module-audio/Audio/Operation/RouterOperation.cpp b/module-audio/Audio/Operation/RouterOperation.cpp
index 453fd49f6..fddff5506 100644
--- a/module-audio/Audio/Operation/RouterOperation.cpp
+++ b/module-audio/Audio/Operation/RouterOperation.cpp
@@ -2,13 +2,11 @@
  *  @file RouterOperation.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 25.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RouterOperation.hpp"
 
 #include "../Profiles/ProfileRoutingEarspeaker.hpp"
@@ -17,46 +15,42 @@
 
 #include "log/log.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    RouterOperation::RouterOperation([[maybe_unused]]const char *file) {
-
-        audioDeviceCallback = [this](const void *inputBuffer,
-                                     void *outputBuffer,
-                                     unsigned long framesPerBuffer) -> int32_t {
+    RouterOperation::RouterOperation([[maybe_unused]] const char *file)
+    {
 
+        audioDeviceCallback =
+            [this](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
             if (framesPerBuffer > audioDeviceBuffer.capacity()) {
                 audioDeviceBuffer.reserve(framesPerBuffer);
                 std::fill(std::begin(audioDeviceBuffer), std::end(audioDeviceBuffer), 0);
             }
 
             if (inputBuffer) {
-                if(muteEnable){
+                if (muteEnable) {
                     memset(&audioDeviceBuffer[0], 0, framesPerBuffer * sizeof(int16_t));
                 }
-                else{
+                else {
                     memcpy(&audioDeviceBuffer[0], inputBuffer, framesPerBuffer * sizeof(int16_t));
                     audioDeviceBuffer.resize(framesPerBuffer);
                 }
 
                 if (recorderWorkerHandle) {
                     channel1Buffer = audioDeviceBuffer;
-                    xTaskNotify(recorderWorkerHandle,static_cast<uint32_t>(RecorderEvent ::Channel1Ready),eSetBits);
+                    xTaskNotify(recorderWorkerHandle, static_cast<uint32_t>(RecorderEvent ::Channel1Ready), eSetBits);
                 }
-
             }
 
             if (outputBuffer) {
                 memcpy(outputBuffer, &audioDeviceCellularBuffer[0], framesPerBuffer * sizeof(int16_t));
             }
             return framesPerBuffer;
-
         };
 
-        audioDeviceCellularCallback = [this](const void *inputBuffer,
-                                             void *outputBuffer,
-                                             unsigned long framesPerBuffer) -> int32_t {
-
+        audioDeviceCellularCallback =
+            [this](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
             if (framesPerBuffer > audioDeviceCellularBuffer.capacity()) {
                 audioDeviceCellularBuffer.reserve(framesPerBuffer);
                 std::fill(std::begin(audioDeviceCellularBuffer), std::end(audioDeviceCellularBuffer), 0);
@@ -76,7 +70,6 @@ namespace audio {
                 memcpy(outputBuffer, &audioDeviceBuffer[0], framesPerBuffer * sizeof(int16_t));
             }
             return framesPerBuffer;
-
         };
 
         audioDeviceBuffer.reserve(1024);
@@ -84,23 +77,22 @@ namespace audio {
         audioDeviceCellularBuffer.reserve(1024);
         std::fill(std::begin(audioDeviceCellularBuffer), std::end(audioDeviceCellularBuffer), 0);
 
-        //TODO:M.P should be fetched from DB
+        // TODO:M.P should be fetched from DB
         availableProfiles.push_back(std::make_unique<ProfileRoutingEarspeaker>(nullptr, 1, 2));
         availableProfiles.push_back(std::make_unique<ProfileRoutingSpeakerphone>(nullptr, 1, 2));
         availableProfiles.push_back(std::make_unique<ProfileRoutingHeadset>(nullptr, 1, 5));
 
         currentProfile = availableProfiles[0].get();
 
-        audioDevice = bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioDeviceCallback).value_or(
-                nullptr);
+        audioDevice =
+            bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioDeviceCallback).value_or(nullptr);
         if (audioDevice == nullptr) {
             LOG_ERROR("Error creating AudioDevice");
             return;
         }
 
-        audioDeviceCellular = bsp::AudioDevice::Create(bsp::AudioDevice::Type::Cellular,
-                                                       audioDeviceCellularCallback).value_or(
-                nullptr);
+        audioDeviceCellular =
+            bsp::AudioDevice::Create(bsp::AudioDevice::Type::Cellular, audioDeviceCellularCallback).value_or(nullptr);
         if (audioDeviceCellular == nullptr) {
             LOG_ERROR("Error creating AudioDeviceCellular");
             return;
@@ -109,47 +101,54 @@ namespace audio {
         isInitialized = true;
     }
 
-    RouterOperation::~RouterOperation() {
+    RouterOperation::~RouterOperation()
+    {
         StopRecording();
     }
 
-    int32_t RouterOperation::SetOutputVolume(float vol) {
+    int32_t RouterOperation::SetOutputVolume(float vol)
+    {
         currentProfile->SetOutputVolume(vol);
         audioDevice->OutputVolumeCtrl(vol);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::SetInputGain(float gain) {
+    int32_t RouterOperation::SetInputGain(float gain)
+    {
         currentProfile->SetInputGain(gain);
         audioDevice->InputGainCtrl(gain);
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::Start(std::function<int32_t(audio::AudioEvents)> callback) {
+    int32_t RouterOperation::Start(std::function<int32_t(audio::AudioEvents)> callback)
+    {
         if (state == State::Paused || state == State::Active) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         eventCallback = callback;
-        state = State::Active;
+        state         = State::Active;
 
         int32_t ret = 0;
         if (audioDevice->IsFormatSupported(currentProfile->GetAudioFormat())) {
             ret = audioDevice->Start(currentProfile->GetAudioFormat());
-        } else {
-            return static_cast<int32_t >(RetCode::InvalidFormat);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::InvalidFormat);
         }
 
         if (audioDeviceCellular->IsFormatSupported(currentProfile->GetAudioFormat())) {
             return audioDeviceCellular->Start(currentProfile->GetAudioFormat());
-        } else {
-            return static_cast<int32_t >(RetCode::InvalidFormat);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::InvalidFormat);
         }
     }
 
-    int32_t RouterOperation::Stop() {
+    int32_t RouterOperation::Stop()
+    {
         if (state == State::Paused || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Idle;
@@ -157,167 +156,175 @@ namespace audio {
         audioDeviceCellular->Stop();
 
         StopRecording();
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::Pause() {
+    int32_t RouterOperation::Pause()
+    {
         if (state == State::Paused || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Paused;
         audioDevice->Stop();
         audioDeviceCellular->Stop();
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::Resume() {
+    int32_t RouterOperation::Resume()
+    {
         if (state == State::Active || state == State::Idle) {
-            return static_cast<int32_t >(RetCode::InvokedInIncorrectState);
+            return static_cast<int32_t>(RetCode::InvokedInIncorrectState);
         }
 
         state = State::Active;
         audioDevice->Start(currentProfile->GetAudioFormat());
         audioDeviceCellular->Start(currentProfile->GetAudioFormat());
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::SendEvent(const audio::Operation::Event evt, const audio::EventData *data) {
+    int32_t RouterOperation::SendEvent(const audio::Operation::Event evt, const audio::EventData *data)
+    {
         switch (evt) {
-            case Event::HeadphonesPlugin:
-                SwitchProfile(Profile::Type::RoutingHeadset);
-                break;
-            case Event::HeadphonesUnplug:
-                //TODO: Switch to routing bt profile if present
-                SwitchProfile(Profile::Type::RoutingEarspeaker);
-                break;
-            case Event::BTHeadsetOn:
-                //TODO:M.P SwitchProfile(Profile::Type::RecordingBTHeadset);
-                break;
-            case Event::BTHeadsetOff:
-                //TODO:M.P SwitchProfile(Profile::Type::RecordingBuiltInMic);
-                break;
-            case Event::StartCallRecording:
-                //StartRecording(); TODO: M.P For now it's still in development
-                break;
-            case Event::StopCallRecording:
-                //StopRecording(); TODO: M.P For now it's still in development
-                break;
-            case Event ::CallMute:
-                Mute(true);
-                break;
-            case Event ::CallUnmute:
-                Mute(false);
-                break;
-            case Event ::CallSpeakerphoneOn:
-                SwitchProfile(Profile::Type::RoutingSpeakerphone);
-                break;
-            case Event ::CallSpeakerphoneOff:
-                //TODO: Switch to routing headphones/bt profile if present
-                SwitchProfile(Profile::Type::RoutingEarspeaker);
-                break;
-            default:
-                return static_cast<int32_t >(RetCode::UnsupportedEvent);
-
+        case Event::HeadphonesPlugin:
+            SwitchProfile(Profile::Type::RoutingHeadset);
+            break;
+        case Event::HeadphonesUnplug:
+            // TODO: Switch to routing bt profile if present
+            SwitchProfile(Profile::Type::RoutingEarspeaker);
+            break;
+        case Event::BTHeadsetOn:
+            // TODO:M.P SwitchProfile(Profile::Type::RecordingBTHeadset);
+            break;
+        case Event::BTHeadsetOff:
+            // TODO:M.P SwitchProfile(Profile::Type::RecordingBuiltInMic);
+            break;
+        case Event::StartCallRecording:
+            // StartRecording(); TODO: M.P For now it's still in development
+            break;
+        case Event::StopCallRecording:
+            // StopRecording(); TODO: M.P For now it's still in development
+            break;
+        case Event ::CallMute:
+            Mute(true);
+            break;
+        case Event ::CallUnmute:
+            Mute(false);
+            break;
+        case Event ::CallSpeakerphoneOn:
+            SwitchProfile(Profile::Type::RoutingSpeakerphone);
+            break;
+        case Event ::CallSpeakerphoneOff:
+            // TODO: Switch to routing headphones/bt profile if present
+            SwitchProfile(Profile::Type::RoutingEarspeaker);
+            break;
+        default:
+            return static_cast<int32_t>(RetCode::UnsupportedEvent);
         }
 
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::SwitchProfile(const audio::Profile::Type type) {
+    int32_t RouterOperation::SwitchProfile(const audio::Profile::Type type)
+    {
         auto ret = GetProfile(type);
         if (ret) {
             currentProfile = ret.value();
-        } else {
-            return static_cast<int32_t >(RetCode::UnsupportedProfile);
+        }
+        else {
+            return static_cast<int32_t>(RetCode::UnsupportedProfile);
         }
 
-        audioDevice = bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioDeviceCallback).value_or(nullptr);
-        audioDeviceCellular = bsp::AudioDevice::Create(bsp::AudioDevice::Type::Cellular, audioDeviceCellularCallback).value_or(
-                nullptr);
+        audioDevice =
+            bsp::AudioDevice::Create(currentProfile->GetAudioDeviceType(), audioDeviceCallback).value_or(nullptr);
+        audioDeviceCellular =
+            bsp::AudioDevice::Create(bsp::AudioDevice::Type::Cellular, audioDeviceCellularCallback).value_or(nullptr);
 
         switch (state) {
-            case State::Idle:
-            case State::Paused:
-                break;
+        case State::Idle:
+        case State::Paused:
+            break;
 
-            case State::Active:
-                state = State::Idle;
-                Start(eventCallback);
-                break;
+        case State::Active:
+            state = State::Idle;
+            Start(eventCallback);
+            break;
         }
 
-
-        //TODO:M.P add error handling
-        return static_cast<int32_t >(RetCode::Success);
+        // TODO:M.P add error handling
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    bool RouterOperation::Mute(bool enable) {
+    bool RouterOperation::Mute(bool enable)
+    {
         muteEnable = enable;
         return true;
     }
 
-    int32_t RouterOperation::StartRecording() {
+    int32_t RouterOperation::StartRecording()
+    {
         channel1Buffer.reserve(1024);
         channel2Buffer.reserve(1024);
         mixBuffer.reserve(1024);
 
         uint32_t channels = 0;
-        if ((currentProfile->GetInOutFlags() & static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft)) ||
-            (currentProfile->GetInOutFlags() & static_cast<uint32_t >(bsp::AudioDevice::Flags::InputRight))) {
+        if ((currentProfile->GetInOutFlags() & static_cast<uint32_t>(bsp::AudioDevice::Flags::InputLeft)) ||
+            (currentProfile->GetInOutFlags() & static_cast<uint32_t>(bsp::AudioDevice::Flags::InputRight))) {
             channels = 1;
-        } else if (currentProfile->GetInOutFlags() & static_cast<uint32_t >(bsp::AudioDevice::Flags::InputStereo)) {
+        }
+        else if (currentProfile->GetInOutFlags() & static_cast<uint32_t>(bsp::AudioDevice::Flags::InputStereo)) {
             channels = 2;
         }
 
-        //TODO:M.P create record file's name dynamically based on current date/time
+        // TODO:M.P create record file's name dynamically based on current date/time
         enc = Encoder::Create("sys/callrec.wav",
-                              Encoder::Format{.chanNr=channels, .sampleRate=currentProfile->GetSampleRate()});
+                              Encoder::Format{.chanNr = channels, .sampleRate = currentProfile->GetSampleRate()});
 
-        if(enc == nullptr){
-            return static_cast<int32_t >(RetCode::FileDoesntExist);
+        if (enc == nullptr) {
+            return static_cast<int32_t>(RetCode::FileDoesntExist);
         }
 
         if (xTaskCreate(recorderWorker, "recworker", 512, this, 0, &recorderWorkerHandle) != pdPASS) {
             LOG_ERROR("Creating recworker failed");
-            return static_cast<int32_t >(RetCode::FailedToAllocateMemory);
+            return static_cast<int32_t>(RetCode::FailedToAllocateMemory);
         }
 
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    int32_t RouterOperation::StopRecording() {
+    int32_t RouterOperation::StopRecording()
+    {
         if (recorderWorkerHandle) {
             vTaskDelete(recorderWorkerHandle);
             enc.reset();
         }
-        return static_cast<int32_t >(RetCode::Success);
+        return static_cast<int32_t>(RetCode::Success);
     }
 
-    void recorderWorker(void *pvp) {
+    void recorderWorker(void *pvp)
+    {
         uint32_t ulNotificationValue = 0;
-        RouterOperation *inst = reinterpret_cast<RouterOperation *>(pvp);
-        static bool chan1_ready = 0;
-        static bool chan2_ready = 0;
+        RouterOperation *inst        = reinterpret_cast<RouterOperation *>(pvp);
+        static bool chan1_ready      = 0;
+        static bool chan2_ready      = 0;
 
         while (1) {
-            xTaskNotifyWait(0x00,               /* Don't clear any bits on entry. */
-                            UINT32_MAX,          /* Clear all bits on exit. */
+            xTaskNotifyWait(0x00,                 /* Don't clear any bits on entry. */
+                            UINT32_MAX,           /* Clear all bits on exit. */
                             &ulNotificationValue, /* Receives the notification value. */
-                            portMAX_DELAY);    /* Block indefinitely. */
+                            portMAX_DELAY);       /* Block indefinitely. */
 
-
-            if (ulNotificationValue & static_cast<uint32_t >(RouterOperation::RecorderEvent::Channel1Ready)) {
+            if (ulNotificationValue & static_cast<uint32_t>(RouterOperation::RecorderEvent::Channel1Ready)) {
                 chan1_ready = true;
             }
 
-            if (ulNotificationValue & static_cast<uint32_t >(RouterOperation::RecorderEvent::Channel2Ready)) {
+            if (ulNotificationValue & static_cast<uint32_t>(RouterOperation::RecorderEvent::Channel2Ready)) {
                 chan2_ready = true;
             }
 
-            int16_t *chan1_ptr = &inst->channel1Buffer[0];
-            int16_t *chan2_ptr = &inst->channel2Buffer[0];
-            int16_t *mixed_ptr = &inst->mixBuffer[0];
+            int16_t *chan1_ptr   = &inst->channel1Buffer[0];
+            int16_t *chan2_ptr   = &inst->channel2Buffer[0];
+            int16_t *mixed_ptr   = &inst->mixBuffer[0];
             int32_t mixed_sample = 0;
 
             inst->mixBuffer.resize(inst->channel1Buffer.size());
@@ -329,10 +336,12 @@ namespace audio {
                     mixed_sample = *chan1_ptr + *chan2_ptr;
                     if (mixed_sample > INT16_MAX) {
                         *mixed_ptr = INT16_MAX;
-                    } else if (mixed_sample < INT16_MIN) {
+                    }
+                    else if (mixed_sample < INT16_MIN) {
                         *mixed_ptr = INT16_MIN;
-                    } else {
-                        *mixed_ptr = (int16_t) mixed_sample;
+                    }
+                    else {
+                        *mixed_ptr = (int16_t)mixed_sample;
                     }
 
                     mixed_ptr++;
@@ -349,8 +358,6 @@ namespace audio {
                 chan2_ready = false;
             }
         }
-
-
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/Operation/RouterOperation.hpp b/module-audio/Audio/Operation/RouterOperation.hpp
index 6acb4c8b9..eeecbafab 100644
--- a/module-audio/Audio/Operation/RouterOperation.hpp
+++ b/module-audio/Audio/Operation/RouterOperation.hpp
@@ -2,17 +2,14 @@
  *  @file RouterOperation.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 25.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_ROUTEROPERATION_HPP
 #define PUREPHONE_ROUTEROPERATION_HPP
 
-
 #include <memory>
 #include <optional>
 #include <functional>
@@ -25,16 +22,17 @@
 #include "FreeRTOS.h"
 #include "task.h"
 
-namespace audio {
+namespace audio
+{
 
     void recorderWorker(void *pvp);
 
-    class RouterOperation : public Operation {
+    class RouterOperation : public Operation
+    {
 
         friend void recorderWorker(void *pvp);
 
-    public:
-
+      public:
         RouterOperation(const char *file);
 
         ~RouterOperation();
@@ -55,11 +53,14 @@ namespace audio {
 
         int32_t SetInputGain(float gain) override final;
 
-        Position GetPosition() override final { return 0.0; }
+        Position GetPosition() override final
+        {
+            return 0.0;
+        }
 
-    private:
-
-        enum class RecorderEvent {
+      private:
+        enum class RecorderEvent
+        {
             Channel1Ready = (1 << 0),
             Channel2Ready = (1 << 2)
         };
@@ -68,13 +69,11 @@ namespace audio {
         std::unique_ptr<bsp::AudioDevice> audioDevice;
         std::unique_ptr<bsp::AudioDevice> audioDeviceCellular;
 
-        std::function<int32_t(const void *inputBuffer,
-                              void *outputBuffer,
-                              unsigned long framesPerBuffer)> audioDeviceCallback = nullptr;
+        std::function<int32_t(const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer)>
+            audioDeviceCallback = nullptr;
 
-        std::function<int32_t(const void *inputBuffer,
-                              void *outputBuffer,
-                              unsigned long framesPerBuffer)> audioDeviceCellularCallback = nullptr;
+        std::function<int32_t(const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer)>
+            audioDeviceCellularCallback = nullptr;
 
         std::vector<int16_t> audioDeviceBuffer;
         std::vector<int16_t> audioDeviceCellularBuffer;
@@ -93,7 +92,6 @@ namespace audio {
         int32_t StopRecording();
     };
 
+} // namespace audio
 
-}
-
-#endif //PUREPHONE_ROUTEROPERATION_HPP
+#endif // PUREPHONE_ROUTEROPERATION_HPP
diff --git a/module-audio/Audio/Profiles/Profile.cpp b/module-audio/Audio/Profiles/Profile.cpp
index b3f3bb348..08db37f96 100644
--- a/module-audio/Audio/Profiles/Profile.cpp
+++ b/module-audio/Audio/Profiles/Profile.cpp
@@ -2,13 +2,11 @@
  *  @file Profile.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "Profile.hpp"
 
 #include "ProfileRecordingOnBoardMic.hpp"
@@ -21,82 +19,90 @@
 #include "ProfileRoutingHeadset.hpp"
 #include "ProfileRoutingSpeakerphone.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    std::unique_ptr<Profile> Profile::Create(const Type t, std::function<int32_t()> callback, float vol, float gain) {
+    std::unique_ptr<Profile> Profile::Create(const Type t, std::function<int32_t()> callback, float vol, float gain)
+    {
         std::unique_ptr<Profile> inst;
 
         switch (t) {
-            case Type::PlaybackHeadphones:
-                inst = std::make_unique<ProfilePlaybackHeadphones>(callback, vol);
-                break;
-            case Type::PlaybackLoudspeaker:
-                inst = std::make_unique<ProfilePlaybackLoudspeaker>(callback, vol);
-                break;
-            case Type::RecordingBuiltInMic:
-                inst = std::make_unique<ProfileRecordingOnBoardMic>(callback, gain);
-                break;
-            case Type::RecordingHeadset:
-                inst = std::make_unique<ProfileRecordingHeadset>(callback, gain);
-                break;
-            case Type::RoutingHeadset:
-                inst = std::make_unique<ProfileRoutingHeadset>(callback, vol, gain);
-                break;
-            case Type::RoutingSpeakerphone:
-                inst = std::make_unique<ProfileRoutingSpeakerphone>(callback, vol, gain);
-                break;
-            case Type::RoutingEarspeaker:
-                inst = std::make_unique<ProfileRoutingEarspeaker>(callback, vol, gain);
-                break;
-            default:
-                break;
+        case Type::PlaybackHeadphones:
+            inst = std::make_unique<ProfilePlaybackHeadphones>(callback, vol);
+            break;
+        case Type::PlaybackLoudspeaker:
+            inst = std::make_unique<ProfilePlaybackLoudspeaker>(callback, vol);
+            break;
+        case Type::RecordingBuiltInMic:
+            inst = std::make_unique<ProfileRecordingOnBoardMic>(callback, gain);
+            break;
+        case Type::RecordingHeadset:
+            inst = std::make_unique<ProfileRecordingHeadset>(callback, gain);
+            break;
+        case Type::RoutingHeadset:
+            inst = std::make_unique<ProfileRoutingHeadset>(callback, vol, gain);
+            break;
+        case Type::RoutingSpeakerphone:
+            inst = std::make_unique<ProfileRoutingSpeakerphone>(callback, vol, gain);
+            break;
+        case Type::RoutingEarspeaker:
+            inst = std::make_unique<ProfileRoutingEarspeaker>(callback, vol, gain);
+            break;
+        default:
+            break;
         }
 
         return inst;
     }
 
-    Profile::Profile(const std::string &name, const Type type, const bsp::AudioDevice::Format &fmt,
+    Profile::Profile(const std::string &name,
+                     const Type type,
+                     const bsp::AudioDevice::Format &fmt,
                      bsp::AudioDevice::Type devType,
                      std::function<int32_t()> callback)
-            : name(name), type(type), audioFormat(fmt),
-              audioDeviceType(devType), dbAccessCallback(callback) {
-    }
+        : name(name), type(type), audioFormat(fmt), audioDeviceType(devType), dbAccessCallback(callback)
+    {}
 
-
-    void Profile::SetInputGain(float gain) {
+    void Profile::SetInputGain(float gain)
+    {
         audioFormat.inputGain = gain;
         if (dbAccessCallback) {
             dbAccessCallback();
         }
     }
 
-    void Profile::SetOutputVolume(float vol) {
+    void Profile::SetOutputVolume(float vol)
+    {
         audioFormat.outputVolume = vol;
         if (dbAccessCallback) {
             dbAccessCallback();
         }
     }
 
-    void Profile::SetInputPath(bsp::AudioDevice::InputPath path) {
+    void Profile::SetInputPath(bsp::AudioDevice::InputPath path)
+    {
         audioFormat.inputPath = path;
         if (dbAccessCallback) {
             dbAccessCallback();
         }
     }
 
-    void Profile::SetOutputPath(bsp::AudioDevice::OutputPath path) {
+    void Profile::SetOutputPath(bsp::AudioDevice::OutputPath path)
+    {
         audioFormat.outputPath = path;
         if (dbAccessCallback) {
             dbAccessCallback();
         }
     }
 
-    void Profile::SetInOutFlags(uint32_t flags) {
+    void Profile::SetInOutFlags(uint32_t flags)
+    {
         audioFormat.flags = flags;
     }
 
-    void Profile::SetSampleRate(uint32_t samplerate) {
+    void Profile::SetSampleRate(uint32_t samplerate)
+    {
         audioFormat.sampleRate_Hz = samplerate;
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/Profiles/Profile.hpp b/module-audio/Audio/Profiles/Profile.hpp
index f41030d88..2e55eb5b3 100644
--- a/module-audio/Audio/Profiles/Profile.hpp
+++ b/module-audio/Audio/Profiles/Profile.hpp
@@ -2,13 +2,11 @@
  *  @file Profile.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILE_HPP
 #define PUREPHONE_PROFILE_HPP
 
@@ -17,12 +15,14 @@
 
 #include "bsp/audio/bsp_audio.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class Profile {
-    public:
-
-        enum class Type {
+    class Profile
+    {
+      public:
+        enum class Type
+        {
             // Profiles used only during call
             RoutingSpeakerphone,
             RoutingHeadset,
@@ -31,17 +31,17 @@ namespace audio {
             RoutingEarspeaker,
 
             // Recording profiles
-                    RecordingBuiltInMic,
+            RecordingBuiltInMic,
             RecordingHeadset,
             RecordingBTHeadset,
 
             // Profiles used by music player
-                    PlaybackLoudspeaker,
+            PlaybackLoudspeaker,
             PlaybackHeadphones,
             PlaybackBTA2DP,
 
             // Profiles used by system sounds
-                    SystemSoundLoudspeaker,
+            SystemSoundLoudspeaker,
             SystemSoundHeadphones,
             SystemSoundBTA2DP,
 
@@ -49,12 +49,17 @@ namespace audio {
 
         };
 
-        static std::unique_ptr<Profile>
-        Create(const Type t, std::function<int32_t()> callback = nullptr, float vol = 0, float gain = 0.0);
+        static std::unique_ptr<Profile> Create(const Type t,
+                                               std::function<int32_t()> callback = nullptr,
+                                               float vol                         = 0,
+                                               float gain                        = 0.0);
 
-        Profile() {}
+        Profile()
+        {}
 
-        Profile(const std::string &name, const Type type, const bsp::AudioDevice::Format &fmt,
+        Profile(const std::string &name,
+                const Type type,
+                const bsp::AudioDevice::Format &fmt,
                 bsp::AudioDevice::Type devType,
                 std::function<int32_t()> callback);
 
@@ -70,28 +75,57 @@ namespace audio {
 
         void SetInputPath(bsp::AudioDevice::InputPath path);
 
-        float GetOutputVolume() const { return audioFormat.outputVolume; }
+        float GetOutputVolume() const
+        {
+            return audioFormat.outputVolume;
+        }
 
-        float GetInputGain() const { return audioFormat.inputGain; }
+        float GetInputGain() const
+        {
+            return audioFormat.inputGain;
+        }
 
-        uint32_t GetSampleRate(){return audioFormat.sampleRate_Hz;}
+        uint32_t GetSampleRate()
+        {
+            return audioFormat.sampleRate_Hz;
+        }
 
-        uint32_t GetInOutFlags(){return audioFormat.flags;}
+        uint32_t GetInOutFlags()
+        {
+            return audioFormat.flags;
+        }
 
-        bsp::AudioDevice::OutputPath GetOutputPath() const { return audioFormat.outputPath; }
+        bsp::AudioDevice::OutputPath GetOutputPath() const
+        {
+            return audioFormat.outputPath;
+        }
 
-        bsp::AudioDevice::InputPath GetInputPath() const { return audioFormat.inputPath; }
+        bsp::AudioDevice::InputPath GetInputPath() const
+        {
+            return audioFormat.inputPath;
+        }
 
-        bsp::AudioDevice::Type GetAudioDeviceType() const { return audioDeviceType; }
+        bsp::AudioDevice::Type GetAudioDeviceType() const
+        {
+            return audioDeviceType;
+        }
 
-        bsp::AudioDevice::Format GetAudioFormat(){return audioFormat;}
+        bsp::AudioDevice::Format GetAudioFormat()
+        {
+            return audioFormat;
+        }
 
-        const std::string &GetName() const { return name; }
+        const std::string &GetName() const
+        {
+            return name;
+        }
 
-        Type GetType() { return type; }
+        Type GetType()
+        {
+            return type;
+        }
 
-
-    protected:
+      protected:
         bsp::AudioDevice::Format audioFormat;
         bsp::AudioDevice::Type audioDeviceType = bsp::AudioDevice::Type::Audiocodec;
 
@@ -99,10 +133,8 @@ namespace audio {
         Type type = Type::Idle;
 
         std::function<int32_t()> dbAccessCallback = nullptr;
-
-
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILE_HPP
+#endif // PUREPHONE_PROFILE_HPP
diff --git a/module-audio/Audio/Profiles/ProfilePlaybackHeadphones.hpp b/module-audio/Audio/Profiles/ProfilePlaybackHeadphones.hpp
index 91b7bf39f..7e9d8104a 100644
--- a/module-audio/Audio/Profiles/ProfilePlaybackHeadphones.hpp
+++ b/module-audio/Audio/Profiles/ProfilePlaybackHeadphones.hpp
@@ -2,37 +2,37 @@
  *  @file ProfilePlaybackHeadphones.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILEPLAYBACKHEADPHONES_HPP
 #define PUREPHONE_PROFILEPLAYBACKHEADPHONES_HPP
 
-
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfilePlaybackHeadphones : public Profile {
-    public:
-        ProfilePlaybackHeadphones(std::function<int32_t()> callback, float volume) : Profile(
-                "Playback Headphones", Type::PlaybackHeadphones,
-                bsp::AudioDevice::Format{.sampleRate_Hz=0,
-                        .bitWidth=16,
-                        .flags=0,
-                        .outputVolume=volume,
-                        .inputGain=0,
-                        .inputPath=bsp::AudioDevice::InputPath::None,
-                        .outputPath=bsp::AudioDevice::OutputPath::Headphones
-                },
-                bsp::AudioDevice::Type::Audiocodec,
-                callback) {}
+    class ProfilePlaybackHeadphones : public Profile
+    {
+      public:
+        ProfilePlaybackHeadphones(std::function<int32_t()> callback, float volume)
+            : Profile("Playback Headphones",
+                      Type::PlaybackHeadphones,
+                      bsp::AudioDevice::Format{.sampleRate_Hz = 0,
+                                               .bitWidth      = 16,
+                                               .flags         = 0,
+                                               .outputVolume  = volume,
+                                               .inputGain     = 0,
+                                               .inputPath     = bsp::AudioDevice::InputPath::None,
+                                               .outputPath    = bsp::AudioDevice::OutputPath::Headphones},
+                      bsp::AudioDevice::Type::Audiocodec,
+                      callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILEPLAYBACKHEADPHONES_HPP
+#endif // PUREPHONE_PROFILEPLAYBACKHEADPHONES_HPP
diff --git a/module-audio/Audio/Profiles/ProfilePlaybackLoudspeaker.hpp b/module-audio/Audio/Profiles/ProfilePlaybackLoudspeaker.hpp
index a84ba24cf..2890f41b6 100644
--- a/module-audio/Audio/Profiles/ProfilePlaybackLoudspeaker.hpp
+++ b/module-audio/Audio/Profiles/ProfilePlaybackLoudspeaker.hpp
@@ -2,37 +2,37 @@
  *  @file ProfilePlaybackLoudspeaker.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILEPLAYBACKLOUDSPEAKER_HPP
 #define PUREPHONE_PROFILEPLAYBACKLOUDSPEAKER_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfilePlaybackLoudspeaker : public Profile {
-    public:
-        ProfilePlaybackLoudspeaker(std::function<int32_t()> callback, float volume) : Profile(
-                "Playback Loudspeaker",
-                Type::PlaybackLoudspeaker,
-                bsp::AudioDevice::Format{.sampleRate_Hz=0,
-                        .bitWidth=16,
-                        .flags=0,
-                        .outputVolume=volume,
-                        .inputGain=0,
-                        .inputPath=bsp::AudioDevice::InputPath::None,
-                        .outputPath=bsp::AudioDevice::OutputPath::Loudspeaker
-                },
-                bsp::AudioDevice::Type::Audiocodec,
-                callback) {}
+    class ProfilePlaybackLoudspeaker : public Profile
+    {
+      public:
+        ProfilePlaybackLoudspeaker(std::function<int32_t()> callback, float volume)
+            : Profile("Playback Loudspeaker",
+                      Type::PlaybackLoudspeaker,
+                      bsp::AudioDevice::Format{.sampleRate_Hz = 0,
+                                               .bitWidth      = 16,
+                                               .flags         = 0,
+                                               .outputVolume  = volume,
+                                               .inputGain     = 0,
+                                               .inputPath     = bsp::AudioDevice::InputPath::None,
+                                               .outputPath    = bsp::AudioDevice::OutputPath::Loudspeaker},
+                      bsp::AudioDevice::Type::Audiocodec,
+                      callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILEPLAYBACKLOUDSPEAKER_HPP
+#endif // PUREPHONE_PROFILEPLAYBACKLOUDSPEAKER_HPP
diff --git a/module-audio/Audio/Profiles/ProfileRecordingHeadset.hpp b/module-audio/Audio/Profiles/ProfileRecordingHeadset.hpp
index d3d3087ca..a577b5c86 100644
--- a/module-audio/Audio/Profiles/ProfileRecordingHeadset.hpp
+++ b/module-audio/Audio/Profiles/ProfileRecordingHeadset.hpp
@@ -2,36 +2,39 @@
  *  @file ProfileRecordingHeadset.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILERECORDINGHEADSET_HPP
 #define PUREPHONE_PROFILERECORDINGHEADSET_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfileRecordingHeadset : public Profile {
-    public:
-        ProfileRecordingHeadset(std::function<int32_t()> callback, float gain) : Profile(
-                "Recording Headset", Type::RecordingHeadset,
-                bsp::AudioDevice::Format{.sampleRate_Hz=44100,
-                        .bitWidth=16,
-                        .flags=static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft), // microphone use left audio channel
-                        .outputVolume=0,
-                        .inputGain=gain,
-                        .inputPath=bsp::AudioDevice::InputPath::Headphones,
-                        .outputPath=bsp::AudioDevice::OutputPath::None
-                },
-                bsp::AudioDevice::Type::Audiocodec,
-                callback) {}
+    class ProfileRecordingHeadset : public Profile
+    {
+      public:
+        ProfileRecordingHeadset(std::function<int32_t()> callback, float gain)
+            : Profile(
+                  "Recording Headset",
+                  Type::RecordingHeadset,
+                  bsp::AudioDevice::Format{.sampleRate_Hz = 44100,
+                                           .bitWidth      = 16,
+                                           .flags         = static_cast<uint32_t>(
+                                               bsp::AudioDevice::Flags::InputLeft), // microphone use left audio channel
+                                           .outputVolume = 0,
+                                           .inputGain    = gain,
+                                           .inputPath    = bsp::AudioDevice::InputPath::Headphones,
+                                           .outputPath   = bsp::AudioDevice::OutputPath::None},
+                  bsp::AudioDevice::Type::Audiocodec,
+                  callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILERECORDINGHEADSET_HPP
+#endif // PUREPHONE_PROFILERECORDINGHEADSET_HPP
diff --git a/module-audio/Audio/Profiles/ProfileRecordingOnBoardMic.hpp b/module-audio/Audio/Profiles/ProfileRecordingOnBoardMic.hpp
index b924e55e9..caa335d88 100644
--- a/module-audio/Audio/Profiles/ProfileRecordingOnBoardMic.hpp
+++ b/module-audio/Audio/Profiles/ProfileRecordingOnBoardMic.hpp
@@ -2,34 +2,38 @@
  *  @file ProfileRecordingOnBoardMic.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILERECORDINGONBOARDMIC_HPP
 #define PUREPHONE_PROFILERECORDINGONBOARDMIC_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfileRecordingOnBoardMic : public Profile {
-    public:
-        ProfileRecordingOnBoardMic(std::function<int32_t()> callback, float gain) : Profile(
-                "Recording On Board Microphone", Type::RecordingBuiltInMic,
-                bsp::AudioDevice::Format{.sampleRate_Hz=44100,
-                        .bitWidth=16,
-                        .flags=static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft), // microphone use left audio channel
-                        .outputVolume=0,
-                        .inputGain=gain,
-                        .inputPath=bsp::AudioDevice::InputPath::Microphone,
-                        .outputPath=bsp::AudioDevice::OutputPath::None
-                },
-                bsp::AudioDevice::Type::Audiocodec, callback) {}
+    class ProfileRecordingOnBoardMic : public Profile
+    {
+      public:
+        ProfileRecordingOnBoardMic(std::function<int32_t()> callback, float gain)
+            : Profile(
+                  "Recording On Board Microphone",
+                  Type::RecordingBuiltInMic,
+                  bsp::AudioDevice::Format{.sampleRate_Hz = 44100,
+                                           .bitWidth      = 16,
+                                           .flags         = static_cast<uint32_t>(
+                                               bsp::AudioDevice::Flags::InputLeft), // microphone use left audio channel
+                                           .outputVolume = 0,
+                                           .inputGain    = gain,
+                                           .inputPath    = bsp::AudioDevice::InputPath::Microphone,
+                                           .outputPath   = bsp::AudioDevice::OutputPath::None},
+                  bsp::AudioDevice::Type::Audiocodec,
+                  callback)
+        {}
     };
 
-}
-#endif //PUREPHONE_PROFILERECORDINGONBOARDMIC_HPP
+} // namespace audio
+#endif // PUREPHONE_PROFILERECORDINGONBOARDMIC_HPP
diff --git a/module-audio/Audio/Profiles/ProfileRoutingEarspeaker.hpp b/module-audio/Audio/Profiles/ProfileRoutingEarspeaker.hpp
index 73f95bbb3..79b69b02a 100644
--- a/module-audio/Audio/Profiles/ProfileRoutingEarspeaker.hpp
+++ b/module-audio/Audio/Profiles/ProfileRoutingEarspeaker.hpp
@@ -2,36 +2,40 @@
  *  @file ProfileRoutingEarspeaker.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 02.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILEROUTINGEARSPEAKER_HPP
 #define PUREPHONE_PROFILEROUTINGEARSPEAKER_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfileRoutingEarspeaker : public Profile {
-    public:
-        ProfileRoutingEarspeaker(std::function<int32_t()> callback, float volume, float gain) : Profile(
-                "Routing Earspeaker", Type::RoutingEarspeaker,
-                bsp::AudioDevice::Format{.sampleRate_Hz=16000,
-                        .bitWidth=16,
-                        .flags=static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
-                               static_cast<uint32_t >(bsp::AudioDevice::Flags::OutputMono),
-                        .outputVolume=volume,
-                        .inputGain=gain,
-                        .inputPath=bsp::AudioDevice::InputPath::Microphone,
-                        .outputPath=bsp::AudioDevice::OutputPath::Earspeaker
-                },
-                bsp::AudioDevice::Type::Audiocodec, callback) {}
+    class ProfileRoutingEarspeaker : public Profile
+    {
+      public:
+        ProfileRoutingEarspeaker(std::function<int32_t()> callback, float volume, float gain)
+            : Profile("Routing Earspeaker",
+                      Type::RoutingEarspeaker,
+                      bsp::AudioDevice::Format{
+                          .sampleRate_Hz = 16000,
+                          .bitWidth      = 16,
+                          .flags         = static_cast<uint32_t>(
+                                       bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
+                                   static_cast<uint32_t>(bsp::AudioDevice::Flags::OutputMono),
+                          .outputVolume = volume,
+                          .inputGain    = gain,
+                          .inputPath    = bsp::AudioDevice::InputPath::Microphone,
+                          .outputPath   = bsp::AudioDevice::OutputPath::Earspeaker},
+                      bsp::AudioDevice::Type::Audiocodec,
+                      callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILEROUTINGEARSPEAKER_HPP
+#endif // PUREPHONE_PROFILEROUTINGEARSPEAKER_HPP
diff --git a/module-audio/Audio/Profiles/ProfileRoutingHeadset.hpp b/module-audio/Audio/Profiles/ProfileRoutingHeadset.hpp
index 17b9e3b5e..b1f9dabf7 100644
--- a/module-audio/Audio/Profiles/ProfileRoutingHeadset.hpp
+++ b/module-audio/Audio/Profiles/ProfileRoutingHeadset.hpp
@@ -2,36 +2,40 @@
  *  @file ProfileRoutingHeadset.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 02.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILEROUTINGHEADSET_HPP
 #define PUREPHONE_PROFILEROUTINGHEADSET_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfileRoutingHeadset : public Profile {
-    public:
-        ProfileRoutingHeadset(std::function<int32_t()> callback,float volume, float gain) : Profile(
-                "Routing Headset", Type::RoutingHeadset,
-                bsp::AudioDevice::Format{.sampleRate_Hz=16000,
-                        .bitWidth=16,
-                        .flags=static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
-                               static_cast<uint32_t >(bsp::AudioDevice::Flags::OutputMono),
-                        .outputVolume=volume,
-                        .inputGain=gain,
-                        .inputPath=bsp::AudioDevice::InputPath::Headphones,
-                        .outputPath=bsp::AudioDevice::OutputPath::Headphones
-                },
-                bsp::AudioDevice::Type::Audiocodec, callback) {}
+    class ProfileRoutingHeadset : public Profile
+    {
+      public:
+        ProfileRoutingHeadset(std::function<int32_t()> callback, float volume, float gain)
+            : Profile("Routing Headset",
+                      Type::RoutingHeadset,
+                      bsp::AudioDevice::Format{
+                          .sampleRate_Hz = 16000,
+                          .bitWidth      = 16,
+                          .flags         = static_cast<uint32_t>(
+                                       bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
+                                   static_cast<uint32_t>(bsp::AudioDevice::Flags::OutputMono),
+                          .outputVolume = volume,
+                          .inputGain    = gain,
+                          .inputPath    = bsp::AudioDevice::InputPath::Headphones,
+                          .outputPath   = bsp::AudioDevice::OutputPath::Headphones},
+                      bsp::AudioDevice::Type::Audiocodec,
+                      callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILEROUTINGHEADSET_HPP
+#endif // PUREPHONE_PROFILEROUTINGHEADSET_HPP
diff --git a/module-audio/Audio/Profiles/ProfileRoutingSpeakerphone.hpp b/module-audio/Audio/Profiles/ProfileRoutingSpeakerphone.hpp
index 5bc0598c8..d1dc900d8 100644
--- a/module-audio/Audio/Profiles/ProfileRoutingSpeakerphone.hpp
+++ b/module-audio/Audio/Profiles/ProfileRoutingSpeakerphone.hpp
@@ -2,36 +2,40 @@
  *  @file ProfileRoutingSpeakerphone.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 02.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_PROFILEROUTINGSPEAKERPHONE_HPP
 #define PUREPHONE_PROFILEROUTINGSPEAKERPHONE_HPP
 
 #include "Profile.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class ProfileRoutingSpeakerphone : public Profile {
-    public:
-        ProfileRoutingSpeakerphone(std::function<int32_t()> callback,float volume, float gain) : Profile(
-                "Routing Speakerphone", Type::RoutingSpeakerphone,
-                bsp::AudioDevice::Format{.sampleRate_Hz=16000,
-                        .bitWidth=16,
-                        .flags=static_cast<uint32_t >(bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
-                               static_cast<uint32_t >(bsp::AudioDevice::Flags::OutputMono),
-                        .outputVolume=volume,
-                        .inputGain=gain,
-                        .inputPath=bsp::AudioDevice::InputPath::Microphone,
-                        .outputPath=bsp::AudioDevice::OutputPath::Loudspeaker
-                },
-                bsp::AudioDevice::Type::Audiocodec, callback) {}
+    class ProfileRoutingSpeakerphone : public Profile
+    {
+      public:
+        ProfileRoutingSpeakerphone(std::function<int32_t()> callback, float volume, float gain)
+            : Profile("Routing Speakerphone",
+                      Type::RoutingSpeakerphone,
+                      bsp::AudioDevice::Format{
+                          .sampleRate_Hz = 16000,
+                          .bitWidth      = 16,
+                          .flags         = static_cast<uint32_t>(
+                                       bsp::AudioDevice::Flags::InputLeft) | // microphone use left audio channel
+                                   static_cast<uint32_t>(bsp::AudioDevice::Flags::OutputMono),
+                          .outputVolume = volume,
+                          .inputGain    = gain,
+                          .inputPath    = bsp::AudioDevice::InputPath::Microphone,
+                          .outputPath   = bsp::AudioDevice::OutputPath::Loudspeaker},
+                      bsp::AudioDevice::Type::Audiocodec,
+                      callback)
+        {}
     };
 
-}
+} // namespace audio
 
-#endif //PUREPHONE_PROFILEROUTINGSPEAKERPHONE_HPP
+#endif // PUREPHONE_PROFILEROUTINGSPEAKERPHONE_HPP
diff --git a/module-audio/Audio/decoder/atag.hpp b/module-audio/Audio/decoder/atag.hpp
index 071352b57..5cb539cce 100644
--- a/module-audio/Audio/decoder/atag.hpp
+++ b/module-audio/Audio/decoder/atag.hpp
@@ -11,76 +11,73 @@
 #include "atag/flac.hpp"
 #include "atag/ape.hpp"
 
-namespace atag {
-
-/**
- * Parses an APE, ID3v1, or ID3v2 tagged audio file and produces a generic tag with
- * only the most important details about the file.
- */
-template<typename Source> simple_tag parse(const Source& s);
-
-/**
- * A set of comparators which can be used to sort collections of tags by track number,
- * song title, album title, artist name etc.
- *
- * Example:
- * ```
- * std::vector<atag::simple_tag> tags;
- * // or
- * std::vector<atag::flac::tag> tags;
- * // ...
- * std::sort(tags.begin(), tags.end(), atag::order::track_number());
- * std::sort(tags.begin(), tags.end(), atag::order::title());
- * ```
- */
-namespace order {
-
-struct track_number
+namespace atag
 {
-    template<typename Tag>
-    bool operator()(const Tag& a, const Tag& b) const noexcept
-    {
-        return a.track_number < b.track_number;
-    }
-};
 
-struct title
-{
-    template<typename Tag>
-    bool operator()(const Tag& a, const Tag& b) const noexcept
-    {
-        return a.title < b.title;
-    }
-};
+    /**
+     * Parses an APE, ID3v1, or ID3v2 tagged audio file and produces a generic tag with
+     * only the most important details about the file.
+     */
+    template <typename Source> simple_tag parse(const Source &s);
 
-struct album
-{
-    template<typename Tag>
-    bool operator()(const Tag& a, const Tag& b) const noexcept
+    /**
+     * A set of comparators which can be used to sort collections of tags by track number,
+     * song title, album title, artist name etc.
+     *
+     * Example:
+     * ```
+     * std::vector<atag::simple_tag> tags;
+     * // or
+     * std::vector<atag::flac::tag> tags;
+     * // ...
+     * std::sort(tags.begin(), tags.end(), atag::order::track_number());
+     * std::sort(tags.begin(), tags.end(), atag::order::title());
+     * ```
+     */
+    namespace order
     {
-        return a.album < b.album;
-    }
-};
 
-struct year
-{
-    template<typename Tag>
-    bool operator()(const Tag& a, const Tag& b) const noexcept
-    {
-        return a.year < b.year;
-    }
-};
+        struct track_number
+        {
+            template <typename Tag> bool operator()(const Tag &a, const Tag &b) const noexcept
+            {
+                return a.track_number < b.track_number;
+            }
+        };
 
-struct artist
-{
-    template<typename Tag>
-    bool operator()(const Tag& a, const Tag& b) const noexcept
-    {
-        return a.artist < b.artist;
-    }
-};
+        struct title
+        {
+            template <typename Tag> bool operator()(const Tag &a, const Tag &b) const noexcept
+            {
+                return a.title < b.title;
+            }
+        };
 
-} // namespace order
+        struct album
+        {
+            template <typename Tag> bool operator()(const Tag &a, const Tag &b) const noexcept
+            {
+                return a.album < b.album;
+            }
+        };
+
+        struct year
+        {
+            template <typename Tag> bool operator()(const Tag &a, const Tag &b) const noexcept
+            {
+                return a.year < b.year;
+            }
+        };
+
+        struct artist
+        {
+            template <typename Tag> bool operator()(const Tag &a, const Tag &b) const noexcept
+            {
+                return a.artist < b.artist;
+            }
+        };
+
+    } // namespace order
 } // namespace atag
 
 #include "atag/impl/atag.ipp"
diff --git a/module-audio/Audio/decoder/atag/ape.hpp b/module-audio/Audio/decoder/atag/ape.hpp
index fd5bbc34f..c068db215 100644
--- a/module-audio/Audio/decoder/atag/ape.hpp
+++ b/module-audio/Audio/decoder/atag/ape.hpp
@@ -6,70 +6,72 @@
 #include <vector>
 #include <string>
 
-namespace atag {
-namespace ape {
-
-struct tag
+namespace atag
 {
-    struct item
+    namespace ape
     {
-        enum key
+
+        struct tag
         {
-            abstract,
-            album,
-            artist,
-            bibliography,
-            catalog_number,
-            comment,
-            composer,
-            conductor,
-            copyright,
-            debut_album,
-            dummy,
-            ean_upc,
-            file_location,
-            genre,
-            index,
-            introplay,
-            isbn,
-            isrc,
-            label_code,
-            language,
-            media,
-            publication_right_holder,
-            publisher,
-            record_date,
-            record_location,
-            related,
-            subtitle,
-            title,
-            track,
-            year,
+            struct item
+            {
+                enum key
+                {
+                    abstract,
+                    album,
+                    artist,
+                    bibliography,
+                    catalog_number,
+                    comment,
+                    composer,
+                    conductor,
+                    copyright,
+                    debut_album,
+                    dummy,
+                    ean_upc,
+                    file_location,
+                    genre,
+                    index,
+                    introplay,
+                    isbn,
+                    isrc,
+                    label_code,
+                    language,
+                    media,
+                    publication_right_holder,
+                    publisher,
+                    record_date,
+                    record_location,
+                    related,
+                    subtitle,
+                    title,
+                    track,
+                    year,
+                };
+
+                int key;
+                // A UTF-8 encoded string or binary data, depending on the item type.
+                std::string data;
+            };
+
+            int version;
+            std::vector<item> items;
         };
 
-        int key;
-        // A UTF-8 encoded string or binary data, depending on the item type.
-        std::string data;
-    };
+        /** Returns -1 if `s` does not contain a valid item key. */
+        int item_key_from_string(const std::string &s) noexcept;
+        int item_key_from_string(const char *s, const int s_length) noexcept;
 
-    int version;
-    std::vector<item> items;
-};
+        /** Both return a nullptr if key is not a valid item key. */
+        constexpr const char *item_key_to_string(const int key) noexcept;
+        constexpr const char *item_key_to_hrstring(const int key) noexcept;
 
-/** Returns -1 if `s` does not contain a valid item key. */
-int item_key_from_string(const std::string& s) noexcept;
-int item_key_from_string(const char* s, const int s_length) noexcept;
+        template <typename Source> bool is_tagged(const Source &s);
 
-/** Both return a nullptr if key is not a valid item key. */
-constexpr const char* item_key_to_string(const int key) noexcept;
-constexpr const char* item_key_to_hrstring(const int key) noexcept;
+        template <typename Source> simple_tag simple_parse(const Source &s);
+        template <typename Source> tag parse(const Source &s);
 
-template<typename Source> bool is_tagged(const Source& s);
-
-template<typename Source> simple_tag simple_parse(const Source& s);
-template<typename Source> tag parse(const Source& s);
-
-} // namespace ape
+    } // namespace ape
 } // namespace atag
 
 #endif // ATAG_APE_HEADER
diff --git a/module-audio/Audio/decoder/atag/detail/io_util.hpp b/module-audio/Audio/decoder/atag/detail/io_util.hpp
index 60705b207..400ec224c 100644
--- a/module-audio/Audio/decoder/atag/detail/io_util.hpp
+++ b/module-audio/Audio/decoder/atag/detail/io_util.hpp
@@ -3,76 +3,69 @@
 
 #include <cstdint>
 
-namespace atag {
-namespace detail {
-
-template<typename InputIt>
-uint32_t parse_syncsafe_int(InputIt it) noexcept
+namespace atag
 {
-    uint32_t t = 0;
-    t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) << 3 * 7;
-    t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) << 2 * 7;
-    t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) <<     7;
-    t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++));
-    return t;
-}
-
-template<typename T, typename InputIt>
-T parse_syncsafe(InputIt it) noexcept
-{
-    T t = 0;
-    for(auto i = 0; i < int(sizeof t); ++i)
+    namespace detail
     {
-        t <<= 7;
-        t |= static_cast<uint8_t>(*it++);
-    }
-    return t;
-}
 
-template<typename T, typename OutputIt>
-void write_syncsafe(T t, OutputIt it) noexcept
-{
-    // TODO is this correct?
-    for(int shift = 7 * (int(sizeof t) - 1); shift >= 0; shift -= 7)
-    {
-        *it++ = static_cast<uint8_t>((t >> shift) & 0xff);
-    }
-}
+        template <typename InputIt> uint32_t parse_syncsafe_int(InputIt it) noexcept
+        {
+            uint32_t t = 0;
+            t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) << 3 * 7;
+            t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) << 2 * 7;
+            t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++)) << 7;
+            t |= static_cast<uint32_t>(static_cast<uint8_t>(*it++));
+            return t;
+        }
 
-/**
- * Parses a byte sequence and reconstructs into an integer of type T, converting from
- * Network Byte Order/Big Endian to Host Byte Order. The byte sequence must have at
- * least sizeof(T) bytes.
- */
-template<typename T, typename InputIt>
-constexpr T parse_be(InputIt it) noexcept
-{
-    T h = 0;
-    for(auto i = 0; i < int(sizeof h); ++i)
-    {
-        h <<= 8;
-        h |= static_cast<uint8_t>(*it++);
-    }
-    return h;
-}
+        template <typename T, typename InputIt> T parse_syncsafe(InputIt it) noexcept
+        {
+            T t = 0;
+            for (auto i = 0; i < int(sizeof t); ++i) {
+                t <<= 7;
+                t |= static_cast<uint8_t>(*it++);
+            }
+            return t;
+        }
 
-/**
- * Parses a byte sequence and reconstructs into an integer of type T, converting from
- * Little Endian to Host Byte Order. The byte sequence must have at least sizeof(T)
- * bytes.
- */
-template<typename T, typename InputIt>
-constexpr T parse_le(InputIt it) noexcept
-{
-    T h = 0;
-    for(auto i = 0; i < int(sizeof h); ++i)
-    {
-        h |= static_cast<uint8_t>(*it++) << i * 8;
-    }
-    return h;
-}
+        template <typename T, typename OutputIt> void write_syncsafe(T t, OutputIt it) noexcept
+        {
+            // TODO is this correct?
+            for (int shift = 7 * (int(sizeof t) - 1); shift >= 0; shift -= 7) {
+                *it++ = static_cast<uint8_t>((t >> shift) & 0xff);
+            }
+        }
 
-} // namespace detail
+        /**
+         * Parses a byte sequence and reconstructs into an integer of type T, converting from
+         * Network Byte Order/Big Endian to Host Byte Order. The byte sequence must have at
+         * least sizeof(T) bytes.
+         */
+        template <typename T, typename InputIt> constexpr T parse_be(InputIt it) noexcept
+        {
+            T h = 0;
+            for (auto i = 0; i < int(sizeof h); ++i) {
+                h <<= 8;
+                h |= static_cast<uint8_t>(*it++);
+            }
+            return h;
+        }
+
+        /**
+         * Parses a byte sequence and reconstructs into an integer of type T, converting from
+         * Little Endian to Host Byte Order. The byte sequence must have at least sizeof(T)
+         * bytes.
+         */
+        template <typename T, typename InputIt> constexpr T parse_le(InputIt it) noexcept
+        {
+            T h = 0;
+            for (auto i = 0; i < int(sizeof h); ++i) {
+                h |= static_cast<uint8_t>(*it++) << i * 8;
+            }
+            return h;
+        }
+
+    } // namespace detail
 } // namespace atag
 
 #endif // ATAG_IO_UTIL_HEADER
diff --git a/module-audio/Audio/decoder/atag/detail/type_traits.hpp b/module-audio/Audio/decoder/atag/detail/type_traits.hpp
index 74573aa18..7c47166c6 100644
--- a/module-audio/Audio/decoder/atag/detail/type_traits.hpp
+++ b/module-audio/Audio/decoder/atag/detail/type_traits.hpp
@@ -3,28 +3,27 @@
 
 #include <type_traits>
 
-namespace atag {
-namespace detail {
-
-template<typename... Ts>
-struct make_void
+namespace atag
 {
-    using type = void;
-};
+    namespace detail
+    {
 
-template<typename... Ts>
-using void_t = typename make_void<Ts...>::type;
+        template <typename... Ts> struct make_void
+        {
+            using type = void;
+        };
 
-template<typename T, typename = void>
-struct is_source : std::false_type {};
+        template <typename... Ts> using void_t = typename make_void<Ts...>::type;
 
-template<typename T>
-struct is_source<T, void_t<
-        decltype(std::declval<T&>().operator[]()),
-        decltype(std::declval<T&>().size())>>
-    : std::true_type {};
+        template <typename T, typename = void> struct is_source : std::false_type
+        {};
 
-} // namespace detail
+        template <typename T>
+        struct is_source<T, void_t<decltype(std::declval<T &>().operator[]()), decltype(std::declval<T &>().size())>>
+            : std::true_type
+        {};
+
+    } // namespace detail
 } // namespace atag
 
 #endif // ATAG_TYPE_TRAITS_HEADER
diff --git a/module-audio/Audio/decoder/atag/encoding.hpp b/module-audio/Audio/decoder/atag/encoding.hpp
index 8fcfc58bc..f0d971cbe 100644
--- a/module-audio/Audio/decoder/atag/encoding.hpp
+++ b/module-audio/Audio/decoder/atag/encoding.hpp
@@ -5,96 +5,95 @@
 #include <codecvt>
 #include <locale>
 
-namespace atag {
-namespace encoding {
-
-std::string utf16le_to_utf8(const char16_t* src, const int size)
+namespace atag
 {
-    static std::wstring_convert<std::codecvt_utf8_utf16<char16_t,
-        0x10ffff, std::little_endian>, char16_t> convert;
-    return convert.to_bytes(src, src + size);
-}
-
-std::string utf16le_to_utf8(const std::u16string& src)
-{
-    return utf16le_to_utf8(src.data(), src.length());
-}
-
-std::string utf16be_to_utf8(const char16_t* src, const int size)
-{
-    static std::wstring_convert<std::codecvt_utf8_utf16<char16_t>, char16_t> convert;
-    return convert.to_bytes(src, src + size);
-}
-
-std::string utf16be_to_utf8(const std::u16string& src)
-{
-    return utf16be_to_utf8(src.data(), src.length());
-}
-
-std::u16string utf8_to_utf16le(const char* src, const int length)
-{
-    static std::wstring_convert<std::codecvt_utf8_utf16<char16_t,
-        0x10ffff, std::little_endian>, char16_t> convert;
-    return convert.from_bytes(src, src + length);
-}
-
-std::u16string utf8_to_utf16le(const std::string& src)
-{
-    return utf8_to_utf16le(src.data(), src.length());
-}
-
-std::u16string utf8_to_utf16be(const char* src, const int length)
-{
-    static std::wstring_convert<std::codecvt_utf8_utf16<char16_t>, char16_t> convert;
-    return convert.from_bytes(src, src + length);
-}
-
-std::u16string utf8_to_utf16be(const std::string& src)
-{
-    return utf8_to_utf16be(src.data(), src.length());
-}
-
-std::string iso_8859_1_to_utf8(const char* src, const int length)
-{
-    if(!src || (length <= 0)) { return {}; }
-    std::string utf8;
-    // Reserve the resulting UTF-8 string in advance to allocate only once.
-    const int utf8_length = [src, length]
+    namespace encoding
     {
-        int size = 0;
-        for(auto i = 0; (i < length) && src[i]; ++i)
-        {
-            if(src[i] < 128)
-                ++size;
-            else
-                size += 2;
-        }
-        return size;
-    }();
-    utf8.reserve(utf8_length);
-    // TODO should we terminate early if we encounter a null character (currently we do)
-    for(auto i = 0; (i < length) && (*src != 0); ++i)
-    {
-        // ISO-8859-1 and UTF-8 are the same for the first 127 characters.
-        if(*src < 128)
-        {
-            utf8.push_back(*src++);
-        }
-        else
-        {
-            utf8.push_back(192 | *src++ >> 6);
-            utf8.push_back(128 | (*src++ & 63));
-        }
-    }
-    return utf8;
-}
 
-std::string iso_8859_1_to_utf8(const std::string& src)
-{
-    return iso_8859_1_to_utf8(src.data(), src.length());
-}
+        std::string utf16le_to_utf8(const char16_t *src, const int size)
+        {
+            static std::wstring_convert<std::codecvt_utf8_utf16<char16_t, 0x10ffff, std::little_endian>, char16_t>
+                convert;
+            return convert.to_bytes(src, src + size);
+        }
 
-} // namespace encoding
+        std::string utf16le_to_utf8(const std::u16string &src)
+        {
+            return utf16le_to_utf8(src.data(), src.length());
+        }
+
+        std::string utf16be_to_utf8(const char16_t *src, const int size)
+        {
+            static std::wstring_convert<std::codecvt_utf8_utf16<char16_t>, char16_t> convert;
+            return convert.to_bytes(src, src + size);
+        }
+
+        std::string utf16be_to_utf8(const std::u16string &src)
+        {
+            return utf16be_to_utf8(src.data(), src.length());
+        }
+
+        std::u16string utf8_to_utf16le(const char *src, const int length)
+        {
+            static std::wstring_convert<std::codecvt_utf8_utf16<char16_t, 0x10ffff, std::little_endian>, char16_t>
+                convert;
+            return convert.from_bytes(src, src + length);
+        }
+
+        std::u16string utf8_to_utf16le(const std::string &src)
+        {
+            return utf8_to_utf16le(src.data(), src.length());
+        }
+
+        std::u16string utf8_to_utf16be(const char *src, const int length)
+        {
+            static std::wstring_convert<std::codecvt_utf8_utf16<char16_t>, char16_t> convert;
+            return convert.from_bytes(src, src + length);
+        }
+
+        std::u16string utf8_to_utf16be(const std::string &src)
+        {
+            return utf8_to_utf16be(src.data(), src.length());
+        }
+
+        std::string iso_8859_1_to_utf8(const char *src, const int length)
+        {
+            if (!src || (length <= 0)) {
+                return {};
+            }
+            std::string utf8;
+            // Reserve the resulting UTF-8 string in advance to allocate only once.
+            const int utf8_length = [src, length] {
+                int size = 0;
+                for (auto i = 0; (i < length) && src[i]; ++i) {
+                    if (src[i] < 128)
+                        ++size;
+                    else
+                        size += 2;
+                }
+                return size;
+            }();
+            utf8.reserve(utf8_length);
+            // TODO should we terminate early if we encounter a null character (currently we do)
+            for (auto i = 0; (i < length) && (*src != 0); ++i) {
+                // ISO-8859-1 and UTF-8 are the same for the first 127 characters.
+                if (*src < 128) {
+                    utf8.push_back(*src++);
+                }
+                else {
+                    utf8.push_back(192 | *src++ >> 6);
+                    utf8.push_back(128 | (*src++ & 63));
+                }
+            }
+            return utf8;
+        }
+
+        std::string iso_8859_1_to_utf8(const std::string &src)
+        {
+            return iso_8859_1_to_utf8(src.data(), src.length());
+        }
+
+    } // namespace encoding
 } // namespace atag
 
 #endif // ATAG_ENCODING_HEADER
diff --git a/module-audio/Audio/decoder/atag/flac.hpp b/module-audio/Audio/decoder/atag/flac.hpp
index 75f507e97..a9fdd2145 100644
--- a/module-audio/Audio/decoder/atag/flac.hpp
+++ b/module-audio/Audio/decoder/atag/flac.hpp
@@ -3,31 +3,31 @@
 
 #include <string>
 
-namespace atag {
-namespace flac {
-
-struct tag
+namespace atag
 {
-    std::string title;
-    std::string album;
-    std::string artist;
-    std::string genre;
-    int year;
-    int track_number;
-    int sample_rate; // in Hz
-    int num_channels;
-    int num_samples;
-};
+    namespace flac
+    {
 
-/** Tests whether `s` contains a FLAC tag. */
-template<typename Source>
-bool is_tagged(const Source& s) noexcept;
+        struct tag
+        {
+            std::string title;
+            std::string album;
+            std::string artist;
+            std::string genre;
+            int year;
+            int track_number;
+            int sample_rate; // in Hz
+            int num_channels;
+            int num_samples;
+        };
 
-/** Parses and extracts all frames found in `s`. */
-template<typename Source>
-tag parse(const Source& s);
+        /** Tests whether `s` contains a FLAC tag. */
+        template <typename Source> bool is_tagged(const Source &s) noexcept;
 
-} // namespace flac
+        /** Parses and extracts all frames found in `s`. */
+        template <typename Source> tag parse(const Source &s);
+
+    } // namespace flac
 } // namespace atag
 
 #include "impl/flac.ipp"
diff --git a/module-audio/Audio/decoder/atag/genres.hpp b/module-audio/Audio/decoder/atag/genres.hpp
index 01df56c5d..55c9df4bb 100644
--- a/module-audio/Audio/decoder/atag/genres.hpp
+++ b/module-audio/Audio/decoder/atag/genres.hpp
@@ -3,14 +3,15 @@
 
 #include <string>
 
-namespace atag {
-
-enum class genre
+namespace atag
 {
-    // TODO
-};
 
-constexpr const char* genre_to_string(const genre g);
+    enum class genre
+    {
+        // TODO
+    };
+
+    constexpr const char *genre_to_string(const genre g);
 
 } // namespace atag
 
diff --git a/module-audio/Audio/decoder/atag/id3v1.hpp b/module-audio/Audio/decoder/atag/id3v1.hpp
index 1a67b8537..679084a02 100644
--- a/module-audio/Audio/decoder/atag/id3v1.hpp
+++ b/module-audio/Audio/decoder/atag/id3v1.hpp
@@ -3,25 +3,27 @@
 
 #include <string>
 
-namespace atag {
-namespace id3v1 {
-
-struct tag
+namespace atag
 {
-    std::string title;
-    std::string artist;
-    std::string album;
-    std::string comment;
-    int track_number;
-    int year;
-    int genre;
-};
+    namespace id3v1
+    {
 
-template<typename Source> bool is_tagged(const Source& s);
+        struct tag
+        {
+            std::string title;
+            std::string artist;
+            std::string album;
+            std::string comment;
+            int track_number;
+            int year;
+            int genre;
+        };
 
-template<typename Source> tag parse(const Source& s);
+        template <typename Source> bool is_tagged(const Source &s);
 
-} // namespace id3v1
+        template <typename Source> tag parse(const Source &s);
+
+    } // namespace id3v1
 } // namespace atag
 
 #include "impl/id3v1.ipp"
diff --git a/module-audio/Audio/decoder/atag/id3v2.hpp b/module-audio/Audio/decoder/atag/id3v2.hpp
index 2771bab2a..92003d540 100644
--- a/module-audio/Audio/decoder/atag/id3v2.hpp
+++ b/module-audio/Audio/decoder/atag/id3v2.hpp
@@ -9,248 +9,314 @@
 #include <string>
 #include <initializer_list>
 
-namespace atag {
-namespace id3v2 {
-
-/** Each text frame includes a single byte to denote the encoding of its data. */
-enum encoding
+namespace atag
 {
-    iso_8859_1 = 0,
-    utf16 = 1,
-    utf16be = 2,
-    utf8 = 3,
-};
-
-/**
- * This is a lower level representation of the tag, however, it does not directly
- * correspond to how the tag is represented in memory (i.e. the raw data). For instance,
- * the extended header is not included, nor the footer, if one is present (as it's
- * mostly just a copy of the header, i.e. holds no relevant information).
- */
-struct tag
-{
-    struct frame
+    namespace id3v2
     {
+
+        /** Each text frame includes a single byte to denote the encoding of its data. */
+        enum encoding
+        {
+            iso_8859_1 = 0,
+            utf16      = 1,
+            utf16be    = 2,
+            utf8       = 3,
+        };
+
         /**
-         * So as to remain unambiguous with the official ID3 documentation, the original 
-         * cryptic frame names have been preserved. To see what an individual frame
-         * means, see: http://id3.org/id3v2.4.0-frames or use id3v2::hrid, which maps
-         * a more readable alternative to each entry here.
+         * This is a lower level representation of the tag, however, it does not directly
+         * correspond to how the tag is represented in memory (i.e. the raw data). For instance,
+         * the extended header is not included, nor the footer, if one is present (as it's
+         * mostly just a copy of the header, i.e. holds no relevant information).
          */
-        enum id
+        struct tag
         {
-            aenc, apic, aspi, comm, comr, encr, equa, etco, geob, grid, ipls, link, mcdi,
-            mllt, owne, pcnt, popm, poss, priv, rbuf, rvad, rvrb, seek, sign, sylt, sytc,
+            struct frame
+            {
+                /**
+                 * So as to remain unambiguous with the official ID3 documentation, the original
+                 * cryptic frame names have been preserved. To see what an individual frame
+                 * means, see: http://id3.org/id3v2.4.0-frames or use id3v2::hrid, which maps
+                 * a more readable alternative to each entry here.
+                 */
+                enum id
+                {
+                    aenc,
+                    apic,
+                    aspi,
+                    comm,
+                    comr,
+                    encr,
+                    equa,
+                    etco,
+                    geob,
+                    grid,
+                    ipls,
+                    link,
+                    mcdi,
+                    mllt,
+                    owne,
+                    pcnt,
+                    popm,
+                    poss,
+                    priv,
+                    rbuf,
+                    rvad,
+                    rvrb,
+                    seek,
+                    sign,
+                    sylt,
+                    sytc,
 
-            // -- text information frames --
-            talb, tbpm, tcom, tcon, tcop, tdat, tden, tdly, tenc, text, tflt, time, tit1,
-            tit2, tit3, tkey, tlan, tlen, tmed, toal, tofn, toly, tope, tory, town, tpe1,
-            tpe2, tpe3, tpe4, tpos, tpub, trck, trda, trsn, trso, tsiz, tsrc, tsse, txxx,
-            tyer,
+                    // -- text information frames --
+                    talb,
+                    tbpm,
+                    tcom,
+                    tcon,
+                    tcop,
+                    tdat,
+                    tden,
+                    tdly,
+                    tenc,
+                    text,
+                    tflt,
+                    time,
+                    tit1,
+                    tit2,
+                    tit3,
+                    tkey,
+                    tlan,
+                    tlen,
+                    tmed,
+                    toal,
+                    tofn,
+                    toly,
+                    tope,
+                    tory,
+                    town,
+                    tpe1,
+                    tpe2,
+                    tpe3,
+                    tpe4,
+                    tpos,
+                    tpub,
+                    trck,
+                    trda,
+                    trsn,
+                    trso,
+                    tsiz,
+                    tsrc,
+                    tsse,
+                    txxx,
+                    tyer,
 
-            ufid, user, uslt,
+                    ufid,
+                    user,
+                    uslt,
 
-            // -- URL link frames --
-            wcom, wcop, woaf, woar, woas, wors, wpay, wpub, wxxx,
+                    // -- URL link frames --
+                    wcom,
+                    wcop,
+                    woaf,
+                    woar,
+                    woas,
+                    wors,
+                    wpay,
+                    wpub,
+                    wxxx,
+                };
+
+                enum flags : uint16_t
+                {
+                    // -- frame status flags --
+                    tag_preservation  = 1 << 14,
+                    file_preservation = 1 << 13,
+                    read_only         = 1 << 12,
+                    // -- frame format flags --
+                    grouping_identity = 1 << 6,
+                    compression       = 1 << 3,
+                    encryption        = 1 << 2,
+                    unsynchronisation = 1 << 1,
+                    length_indicator  = 1 << 0,
+                };
+
+                std::string data;
+                uint16_t flags;
+                // Identifies what type of frame this is.
+                uint8_t id;
+                // The encoding of data if it's a text, irrelevant otherwise.
+                uint8_t encoding;
+            };
+
+            std::vector<frame> frames;
+
+            enum flags : uint8_t
+            {
+                has_footer        = 1 << 4,
+                experimental      = 1 << 5,
+                extended          = 1 << 6,
+                unsynchronisation = 1 << 7,
+            };
+
+            uint8_t version;
+            uint8_t revision;
+            uint8_t flags;
         };
 
-        enum flags : uint16_t
+        inline bool is_text_frame(const int id) noexcept
         {
-            // -- frame status flags --
-            tag_preservation  = 1 << 14,
-            file_preservation = 1 << 13,
-            read_only         = 1 << 12,
-            // -- frame format flags --
-            grouping_identity = 1 << 6,
-            compression       = 1 << 3,
-            encryption        = 1 << 2,
-            unsynchronisation = 1 << 1,
-            length_indicator  = 1 << 0,
+            return (id >= tag::frame::talb) && (id <= tag::frame::tyer);
+        }
+
+        inline bool is_url_frame(const int id) noexcept
+        {
+            return (id >= tag::frame::wcom) && (id <= tag::frame::wxxx);
+        }
+
+        /**
+         * Returns -1 if s does not contain a valid frame id.
+         *
+         * `s` has to be at least 4 bytes long.
+         */
+        template <typename String> int frame_id_from_string(const String &s) noexcept;
+
+        /** Both return a nullptr if `id` is not a valid frame id. */
+        constexpr const char *frame_id_to_string(const int id) noexcept;
+        constexpr const char *frame_id_to_hrstring(const int id) noexcept;
+
+        /** Tests whether `s` contains an ID3v2 tag, which may be prepended or appended. */
+        template <typename Source> bool is_tagged(const Source &s) noexcept;
+
+        /**
+         * Since an ID3v2 tag can contain information beyond what is usually needed, this method
+         * only specifically parses the most important fields to identify music (title, album,
+         * artist etc). It is thus slightly faster than the regular parse method.
+         *
+         * Note that if textual frames are not UTF-8 encoded, they are converted to UTF-8 for
+         * disambiguation, while "raw frames" produces by all parse overloads, keep their
+         * original encoding, so these have to be converted by the user.
+         */
+        template <typename Source> simple_tag simple_parse(const Source &s);
+
+        /** Parses and extracts all frames found in s. */
+        template <typename Source> tag parse(const Source &s);
+
+        /**
+         * This overload provides a way to parse only the frames specified in wanted_frames.
+         *
+         * Example:
+         * ```
+         * using namespace atag;
+         * id3v2::tag tag = id3v2::parse(source, {id3v2::composer, id3v2::album,
+         *     id3v2::title, id3v2::year, id3v2::track_number});
+         * for(const auto& frame : tag.frames) {
+         *     // Do something with frame.
+         * }
+         * ```
+         */
+        template <typename Source> tag parse(const Source &s, const std::initializer_list<int> &wanted_frames);
+
+        /**
+         * This overload expects a user defined predicate which takes a single int or a
+         * `tag::frame::id` argument and returns true if the frame satisfies the user's criteria.
+         *
+         * Example:
+         * ```
+         * using namespace atag;
+         * // Parse all text information frames.
+         * auto tag1 = id3v2::parse(source1, id3v2::is_text_frame);
+         * // Or provide a custom predicate.
+         * auto tag2 = id3v2::parse(source2, [](const auto frame_id) { // ...  });
+         * ```
+         */
+        template <typename Source, typename Predicate> tag parse(const Source &s, Predicate pred);
+
+        enum hrid
+        {
+            audio_encryption                  = tag::frame::aenc,
+            attached_picture                  = tag::frame::apic,
+            audio_seek_point_index            = tag::frame::aspi,
+            comments                          = tag::frame::comm,
+            commercial_frame                  = tag::frame::comr,
+            encryption_method_registration    = tag::frame::encr,
+            equalisation                      = tag::frame::equa,
+            event_timing_codes                = tag::frame::etco,
+            general_encapsulated_object       = tag::frame::geob,
+            group_identification_registration = tag::frame::grid,
+            involved_people_list              = tag::frame::ipls,
+            linked_information                = tag::frame::link,
+            music_cd_id                       = tag::frame::mcdi,
+            mpeg_location_lookup_table        = tag::frame::mllt,
+            ownership_frame                   = tag::frame::owne,
+            play_counter                      = tag::frame::pcnt,
+            popularimeter                     = tag::frame::popm,
+            position_sync_frame               = tag::frame::poss,
+            private_frame                     = tag::frame::priv,
+            recommended_buffer_size           = tag::frame::rbuf,
+            relative_vol_adjustment           = tag::frame::rvad,
+            reverb                            = tag::frame::rvrb,
+            seek_frame                        = tag::frame::seek,
+            signature_frame                   = tag::frame::sign,
+            synced_lyryc                      = tag::frame::sylt,
+            synced_tempo_codes                = tag::frame::sytc,
+
+            album                    = tag::frame::talb,
+            beats_per_min            = tag::frame::tbpm,
+            composer                 = tag::frame::tcom,
+            content_type             = tag::frame::tcon,
+            copyright                = tag::frame::tcop,
+            date                     = tag::frame::tdat,
+            encoding_time            = tag::frame::tden,
+            playlist_delay           = tag::frame::tdly,
+            encoded_by               = tag::frame::tenc,
+            lyricist                 = tag::frame::text,
+            file_type                = tag::frame::tflt,
+            time                     = tag::frame::time,
+            content_group            = tag::frame::tit1,
+            title                    = tag::frame::tit2,
+            subtitle                 = tag::frame::tit3,
+            initial_key              = tag::frame::tkey,
+            language                 = tag::frame::tlan,
+            length                   = tag::frame::tlen,
+            media_type               = tag::frame::tmed,
+            original_title           = tag::frame::toal,
+            original_filename        = tag::frame::tofn,
+            original_lyricist        = tag::frame::toly,
+            original_performer       = tag::frame::tope,
+            original_release_year    = tag::frame::tory,
+            licensee                 = tag::frame::town,
+            lead_artist              = tag::frame::tpe1,
+            accompaniment            = tag::frame::tpe2,
+            conductor                = tag::frame::tpe3,
+            remixed_by               = tag::frame::tpe4,
+            part_of_a_set            = tag::frame::tpos,
+            publisher                = tag::frame::tpub,
+            track_number             = tag::frame::trck,
+            recording_dates          = tag::frame::trda,
+            inet_radio_station_name  = tag::frame::trsn,
+            inet_radio_station_owner = tag::frame::trso,
+            size                     = tag::frame::tsiz,
+            isrc                     = tag::frame::tsrc,
+            encoding_settings        = tag::frame::tsse,
+            user_defined_text        = tag::frame::txxx,
+            year                     = tag::frame::tyer,
+
+            unique_file_id  = tag::frame::ufid,
+            terms_of_use    = tag::frame::user,
+            unsynced_lyrics = tag::frame::uslt,
+
+            commercial_info                = tag::frame::wcom,
+            copyright_info                 = tag::frame::wcop,
+            audio_file_webpage             = tag::frame::woaf,
+            artist_webpage                 = tag::frame::woar,
+            audio_source_webpage           = tag::frame::woas,
+            internet_radio_station_webpage = tag::frame::wors,
+            payment                        = tag::frame::wpay,
+            publisher_webpage              = tag::frame::wpub,
+            user_defined_link              = tag::frame::wxxx,
         };
 
-        std::string data;
-        uint16_t flags;
-        // Identifies what type of frame this is.
-        uint8_t id;
-        // The encoding of data if it's a text, irrelevant otherwise.
-        uint8_t encoding;
-    };
-
-    std::vector<frame> frames;
-
-    enum flags : uint8_t
-    {
-        has_footer        = 1 << 4,
-        experimental      = 1 << 5,
-        extended          = 1 << 6,
-        unsynchronisation = 1 << 7,
-    };
-
-    uint8_t version;
-    uint8_t revision;
-    uint8_t flags;
-};
-
-inline bool is_text_frame(const int id) noexcept
-{
-    return (id >= tag::frame::talb) && (id <= tag::frame::tyer);
-}
-
-inline bool is_url_frame(const int id) noexcept
-{
-    return (id >= tag::frame::wcom) && (id <= tag::frame::wxxx);
-}
-
-/**
- * Returns -1 if s does not contain a valid frame id.
- *
- * `s` has to be at least 4 bytes long.
- */
-template<typename String>
-int frame_id_from_string(const String& s) noexcept;
-
-/** Both return a nullptr if `id` is not a valid frame id. */
-constexpr const char* frame_id_to_string(const int id) noexcept;
-constexpr const char* frame_id_to_hrstring(const int id) noexcept;
-
-/** Tests whether `s` contains an ID3v2 tag, which may be prepended or appended. */
-template<typename Source>
-bool is_tagged(const Source& s) noexcept;
-
-/**
- * Since an ID3v2 tag can contain information beyond what is usually needed, this method 
- * only specifically parses the most important fields to identify music (title, album, 
- * artist etc). It is thus slightly faster than the regular parse method.
- *
- * Note that if textual frames are not UTF-8 encoded, they are converted to UTF-8 for
- * disambiguation, while "raw frames" produces by all parse overloads, keep their
- * original encoding, so these have to be converted by the user.
- */
-template<typename Source>
-simple_tag simple_parse(const Source& s);
-
-/** Parses and extracts all frames found in s. */
-template<typename Source>
-tag parse(const Source& s);
-
-/**
- * This overload provides a way to parse only the frames specified in wanted_frames.
- *
- * Example:
- * ```
- * using namespace atag;
- * id3v2::tag tag = id3v2::parse(source, {id3v2::composer, id3v2::album,
- *     id3v2::title, id3v2::year, id3v2::track_number});
- * for(const auto& frame : tag.frames) {
- *     // Do something with frame.
- * }
- * ```
- */
-template<typename Source>
-tag parse(const Source& s, const std::initializer_list<int>& wanted_frames);
-
-/**
- * This overload expects a user defined predicate which takes a single int or a
- * `tag::frame::id` argument and returns true if the frame satisfies the user's criteria.
- *
- * Example:
- * ```
- * using namespace atag;
- * // Parse all text information frames.
- * auto tag1 = id3v2::parse(source1, id3v2::is_text_frame);
- * // Or provide a custom predicate.
- * auto tag2 = id3v2::parse(source2, [](const auto frame_id) { // ...  });
- * ```
- */
-template<typename Source, typename Predicate>
-tag parse(const Source& s, Predicate pred);
-
-enum hrid
-{
-    audio_encryption = tag::frame::aenc,
-    attached_picture = tag::frame::apic,
-    audio_seek_point_index = tag::frame::aspi,
-    comments = tag::frame::comm,
-    commercial_frame = tag::frame::comr,
-    encryption_method_registration = tag::frame::encr,
-    equalisation = tag::frame::equa,
-    event_timing_codes = tag::frame::etco,
-    general_encapsulated_object = tag::frame::geob,
-    group_identification_registration = tag::frame::grid,
-    involved_people_list = tag::frame::ipls,
-    linked_information = tag::frame::link,
-    music_cd_id = tag::frame::mcdi,
-    mpeg_location_lookup_table = tag::frame::mllt,
-    ownership_frame = tag::frame::owne,
-    play_counter = tag::frame::pcnt,
-    popularimeter = tag::frame::popm,
-    position_sync_frame = tag::frame::poss,
-    private_frame = tag::frame::priv,
-    recommended_buffer_size = tag::frame::rbuf,
-    relative_vol_adjustment = tag::frame::rvad,
-    reverb = tag::frame::rvrb,
-    seek_frame = tag::frame::seek,
-    signature_frame = tag::frame::sign,
-    synced_lyryc = tag::frame::sylt,
-    synced_tempo_codes = tag::frame::sytc,
-
-    album = tag::frame::talb,
-    beats_per_min = tag::frame::tbpm,
-    composer = tag::frame::tcom,
-    content_type = tag::frame::tcon,
-    copyright = tag::frame::tcop,
-    date = tag::frame::tdat,
-    encoding_time = tag::frame::tden,
-    playlist_delay = tag::frame::tdly,
-    encoded_by = tag::frame::tenc,
-    lyricist = tag::frame::text,
-    file_type = tag::frame::tflt,
-    time = tag::frame::time,
-    content_group = tag::frame::tit1,
-    title = tag::frame::tit2,
-    subtitle = tag::frame::tit3,
-    initial_key = tag::frame::tkey,
-    language = tag::frame::tlan,
-    length = tag::frame::tlen,
-    media_type = tag::frame::tmed,
-    original_title = tag::frame::toal,
-    original_filename = tag::frame::tofn,
-    original_lyricist = tag::frame::toly,
-    original_performer = tag::frame::tope,
-    original_release_year = tag::frame::tory,
-    licensee = tag::frame::town,
-    lead_artist = tag::frame::tpe1,
-    accompaniment = tag::frame::tpe2,
-    conductor = tag::frame::tpe3,
-    remixed_by = tag::frame::tpe4,
-    part_of_a_set = tag::frame::tpos,
-    publisher = tag::frame::tpub,
-    track_number = tag::frame::trck,
-    recording_dates = tag::frame::trda,
-    inet_radio_station_name = tag::frame::trsn,
-    inet_radio_station_owner = tag::frame::trso,
-    size = tag::frame::tsiz,
-    isrc = tag::frame::tsrc,
-    encoding_settings = tag::frame::tsse,
-    user_defined_text = tag::frame::txxx,
-    year = tag::frame::tyer,
-
-    unique_file_id = tag::frame::ufid,
-    terms_of_use = tag::frame::user,
-    unsynced_lyrics = tag::frame::uslt,
-
-    commercial_info = tag::frame::wcom,
-    copyright_info = tag::frame::wcop,
-    audio_file_webpage = tag::frame::woaf,
-    artist_webpage = tag::frame::woar,
-    audio_source_webpage = tag::frame::woas,
-    internet_radio_station_webpage = tag::frame::wors,
-    payment = tag::frame::wpay,
-    publisher_webpage = tag::frame::wpub,
-    user_defined_link = tag::frame::wxxx,
-};
-
-} // namespace id3v2
+    } // namespace id3v2
 } // namespace atag
 
 #include "impl/id3v2.ipp"
diff --git a/module-audio/Audio/decoder/atag/simple_tag.hpp b/module-audio/Audio/decoder/atag/simple_tag.hpp
index 1aca07ea9..736a09633 100644
--- a/module-audio/Audio/decoder/atag/simple_tag.hpp
+++ b/module-audio/Audio/decoder/atag/simple_tag.hpp
@@ -5,29 +5,30 @@
 
 #include <string>
 
-namespace atag {
-
-/**
- * Contains generic information about a song. Every tag should be able to provide these
- * information, but this does not mean they will. Thus, if any of the values listed
- * here are empty (empty string or -1 for the integer types), it means no such value was
- * found in the tag.
- */
-struct simple_tag
+namespace atag
 {
-    std::string title;
-    std::string album;
-    std::string artist;
-    enum genre genre;
-    int track_number;
-    int length; // in ms
-    int year;
-};
 
-inline bool is_valid_tag(const simple_tag& t)
-{
-    return !t.title.empty() || !t.album.empty() || !t.artist.empty();
-}
+    /**
+     * Contains generic information about a song. Every tag should be able to provide these
+     * information, but this does not mean they will. Thus, if any of the values listed
+     * here are empty (empty string or -1 for the integer types), it means no such value was
+     * found in the tag.
+     */
+    struct simple_tag
+    {
+        std::string title;
+        std::string album;
+        std::string artist;
+        enum genre genre;
+        int track_number;
+        int length; // in ms
+        int year;
+    };
+
+    inline bool is_valid_tag(const simple_tag &t)
+    {
+        return !t.title.empty() || !t.album.empty() || !t.artist.empty();
+    }
 
 } // namespace atag
 
diff --git a/module-audio/Audio/decoder/decoder.cpp b/module-audio/Audio/decoder/decoder.cpp
index b2d58e003..8c1583592 100644
--- a/module-audio/Audio/decoder/decoder.cpp
+++ b/module-audio/Audio/decoder/decoder.cpp
@@ -2,7 +2,7 @@
  *  @file decoder.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 04.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -13,11 +13,12 @@
 #include "decoderFLAC.hpp"
 #include "decoderWAV.hpp"
 
-namespace audio {
+namespace audio
+{
 
     decoder::decoder(const char *fileName)
-            : filePath(fileName),
-              workerBuffer(std::make_unique<int16_t[]>(workerBufferSize)) {
+        : filePath(fileName), workerBuffer(std::make_unique<int16_t[]>(workerBufferSize))
+    {
 
         fd = vfs.fopen(fileName, "r");
         if (fd == NULL) {
@@ -27,36 +28,41 @@ namespace audio {
         vfs.fseek(fd, 0, SEEK_END);
         fileSize = vfs.ftell(fd);
         vfs.rewind(fd);
-
     }
 
-    decoder::~decoder() {
+    decoder::~decoder()
+    {
         if (fd) {
             vfs.fclose(fd);
         }
     }
 
-    std::unique_ptr<decoder> decoder::Create(const char *file) {
+    std::unique_ptr<decoder> decoder::Create(const char *file)
+    {
         std::unique_ptr<decoder> dec;
         if ((strstr(file, ".wav") != NULL) || (strstr(file, ".WAV") != NULL)) {
             dec = std::make_unique<decoderWAV>(file);
-        } else if ((strstr(file, ".mp3") != NULL) || (strstr(file, ".MP3") != NULL)) {
+        }
+        else if ((strstr(file, ".mp3") != NULL) || (strstr(file, ".MP3") != NULL)) {
             dec = std::make_unique<decoderMP3>(file);
-        } else if ((strstr(file, ".flac") != NULL) || (strstr(file, ".FLAC") != NULL)) {
+        }
+        else if ((strstr(file, ".flac") != NULL) || (strstr(file, ".FLAC") != NULL)) {
             dec = std::make_unique<decoderFLAC>(file);
-        } else {
+        }
+        else {
             return nullptr;
         }
 
         if (!dec->isInitialized) {
             return nullptr;
-        } else {
+        }
+        else {
             return dec;
         }
     }
 
-
-    void decoder::convertmono2stereo(int16_t *pcm, uint32_t samplecount) {
+    void decoder::convertmono2stereo(int16_t *pcm, uint32_t samplecount)
+    {
         uint32_t i = 0, j = 0;
 
         memset(workerBuffer.get(), 0, workerBufferSize * sizeof(int16_t));
@@ -69,5 +75,4 @@ namespace audio {
         memcpy(pcm, &workerBuffer[0], samplecount * 2 * sizeof(int16_t));
     }
 
-}
-
+} // namespace audio
diff --git a/module-audio/Audio/decoder/decoder.hpp b/module-audio/Audio/decoder/decoder.hpp
index db84555db..d980f4d23 100644
--- a/module-audio/Audio/decoder/decoder.hpp
+++ b/module-audio/Audio/decoder/decoder.hpp
@@ -2,7 +2,7 @@
  *  @file decoder.h
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 04.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -18,9 +18,11 @@
 
 #include "vfs.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    struct Tags {
+    struct Tags
+    {
 
         /* Total audio duration in seconds */
         uint32_t total_duration_s = 0;
@@ -36,39 +38,39 @@ namespace audio {
         /* Number of channels */
         uint32_t num_channel = 0;
 
-        std::string artist = "";
-        std::string genre = "";
-        std::string title = "";
-        std::string album = "";
-        std::string year = "";
+        std::string artist   = "";
+        std::string genre    = "";
+        std::string title    = "";
+        std::string album    = "";
+        std::string year     = "";
         std::string filePath = "";
 
-        Tags() {}
+        Tags()
+        {}
 
         // Copy constructor
-        Tags(const Tags &p2) {
+        Tags(const Tags &p2)
+        {
 
             total_duration_s = p2.total_duration_s;
-            duration_hour = p2.duration_hour;
-            duration_min = p2.duration_min;
-            duration_sec = p2.duration_sec;
-            sample_rate = p2.sample_rate;
-            num_channel = p2.num_channel;
-            artist = p2.artist;
-            genre = p2.genre;
-            title = p2.title;
-            album = p2.album;
-            year = p2.year;
-            filePath = p2.filePath;
-
+            duration_hour    = p2.duration_hour;
+            duration_min     = p2.duration_min;
+            duration_sec     = p2.duration_sec;
+            sample_rate      = p2.sample_rate;
+            num_channel      = p2.num_channel;
+            artist           = p2.artist;
+            genre            = p2.genre;
+            title            = p2.title;
+            album            = p2.album;
+            year             = p2.year;
+            filePath         = p2.filePath;
         }
     };
 
+    class decoder
+    {
 
-    class decoder {
-
-    public:
-
+      public:
         decoder(const char *fileName);
 
         virtual ~decoder();
@@ -80,44 +82,42 @@ namespace audio {
         // Range 0 - 1
         virtual void setPosition(float pos) = 0;
 
-        uint32_t getSampleRate() {
+        uint32_t getSampleRate()
+        {
             return sampleRate;
         }
 
-        uint32_t getChannelNumber() {
+        uint32_t getChannelNumber()
+        {
             return chanNumber;
         }
 
-        float getCurrentPosition() {
+        float getCurrentPosition()
+        {
             return position;
         }
 
-
         // Factory method
         static std::unique_ptr<decoder> Create(const char *file);
 
-
-    protected:
-
+      protected:
         void convertmono2stereo(int16_t *pcm, uint32_t samplecount);
 
         const uint32_t workerBufferSize = 1024 * 8;
 
         uint32_t sampleRate = 0;
         uint32_t chanNumber = 0;
-        float position = 0;
-        vfs::FILE *fd = nullptr;
-        uint32_t fileSize = 0;
+        float position      = 0;
+        vfs::FILE *fd       = nullptr;
+        uint32_t fileSize   = 0;
         std::string filePath;
 
         // Worker buffer used for converting mono stream to stereo
         std::unique_ptr<int16_t[]> workerBuffer;
 
         bool isInitialized = false;
-
     };
 
-}
+} // namespace audio
 
-
-#endif //UNTITLED1_DECODER_H
+#endif // UNTITLED1_DECODER_H
diff --git a/module-audio/Audio/decoder/decoderFLAC.cpp b/module-audio/Audio/decoder/decoderFLAC.cpp
index a7b9956b6..bf573ead1 100644
--- a/module-audio/Audio/decoder/decoderFLAC.cpp
+++ b/module-audio/Audio/decoder/decoderFLAC.cpp
@@ -2,7 +2,7 @@
  *  @file decoderFLAC.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 06.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -17,13 +17,13 @@
 
 #include "dr_flac.h"
 
-namespace audio {
+namespace audio
+{
 
-    decoderFLAC::decoderFLAC(const char *fileName)
-            : decoder(fileName),
-              tags(std::make_unique<Tags>()) {
+    decoderFLAC::decoderFLAC(const char *fileName) : decoder(fileName), tags(std::make_unique<Tags>())
+    {
 
-        if(fileSize == 0){
+        if (fileSize == 0) {
             return;
         }
 
@@ -35,93 +35,95 @@ namespace audio {
         isInitialized = true;
     }
 
-
-    decoderFLAC::~decoderFLAC() {
+    decoderFLAC::~decoderFLAC()
+    {
         drflac_close(flac);
     }
 
-
-    std::unique_ptr<Tags> decoderFLAC::fetchTags() {
+    std::unique_ptr<Tags> decoderFLAC::fetchTags()
+    {
         tags->filePath.append(filePath);
         if (tags->title.size() == 0) {
             auto pos = filePath.rfind("/");
             if (pos == std::string::npos) {
                 tags->title.append(filePath);
-            } else {
+            }
+            else {
                 tags->title.append(&filePath[pos + 1]);
             }
         }
         return std::make_unique<Tags>(*tags);
     }
 
-
-    uint32_t decoderFLAC::decode(uint32_t samplesToRead, int16_t *pcmData) {
+    uint32_t decoderFLAC::decode(uint32_t samplesToRead, int16_t *pcmData)
+    {
 
         uint32_t samples_read = 0;
 
-        samples_read = drflac_read_s16(flac, samplesToRead, (drflac_int16 *) pcmData);
+        samples_read = drflac_read_s16(flac, samplesToRead, (drflac_int16 *)pcmData);
 
         if (samples_read) {
             /* Calculate frame duration in seconds */
-            position += (float) ((float) (chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) /
-                                 (float) sampleRate);
+            position +=
+                (float)((float)(chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) / (float)sampleRate);
         }
 
         return samples_read;
     }
 
-    void decoderFLAC::setPosition(float pos) {
+    void decoderFLAC::setPosition(float pos)
+    {
 
         drflac_seek_to_sample(flac, totalSamplesCount * pos);
 
         // Calculate new position
-        position = (float) ((float) (totalSamplesCount * pos) / chanNumber / (float) (sampleRate));
+        position = (float)((float)(totalSamplesCount * pos) / chanNumber / (float)(sampleRate));
     }
 
-
-/* Data encoded in UTF-8 */
-    void decoderFLAC::flac_parse_text(uint8_t *in, uint32_t taglen, uint32_t datalen, uint8_t *out, uint32_t outlen) {
+    /* Data encoded in UTF-8 */
+    void decoderFLAC::flac_parse_text(uint8_t *in, uint32_t taglen, uint32_t datalen, uint8_t *out, uint32_t outlen)
+    {
         /* Little Endian here. */
         uint32_t size = datalen - taglen > outlen - 1 ? outlen - 1 : datalen - taglen;
         memcpy(out, in + taglen, size);
         out[size] = '\0';
     }
 
-
-    size_t decoderFLAC::drflac_read(void *pUserData, void *pBufferOut, size_t bytesToRead) {
-        decoderFLAC *userdata = (decoderFLAC *) pUserData;
+    size_t decoderFLAC::drflac_read(void *pUserData, void *pBufferOut, size_t bytesToRead)
+    {
+        decoderFLAC *userdata = (decoderFLAC *)pUserData;
         return vfs.fread(pBufferOut, 1, bytesToRead, userdata->fd);
     }
 
-
-    drflac_bool32 decoderFLAC::drflac_seek(void *pUserData, int offset, drflac_seek_origin origin) {
-        decoderFLAC *userdata = (decoderFLAC *) pUserData;
+    drflac_bool32 decoderFLAC::drflac_seek(void *pUserData, int offset, drflac_seek_origin origin)
+    {
+        decoderFLAC *userdata = (decoderFLAC *)pUserData;
         return !vfs.fseek(userdata->fd, offset, origin == drflac_seek_origin_start ? SEEK_SET : SEEK_CUR);
     }
 
-
-    void decoderFLAC::drflac_meta(void *pUserData, drflac_metadata *pMetadata) {
-        decoderFLAC *userdata = (decoderFLAC *) pUserData;
+    void decoderFLAC::drflac_meta(void *pUserData, drflac_metadata *pMetadata)
+    {
+        decoderFLAC *userdata = (decoderFLAC *)pUserData;
 
         /* We're only interested in VORBIS comments which contain album/track/artist info */
         if (pMetadata->type == DRFLAC_METADATA_BLOCK_TYPE_VORBIS_COMMENT) {
             uint8_t buff[128] = {0};
 
             /*ommit vendor string*/
-            uint8_t *p = (uint8_t *) pMetadata->data.vorbis_comment.comments;
+            uint8_t *p = (uint8_t *)pMetadata->data.vorbis_comment.comments;
 
             uint8_t i = 0;
             for (i = 0; i < pMetadata->data.vorbis_comment.commentCount; i++) {
                 /* Little Endian */
-                uint32_t *taglen = (uint32_t *) p;
+                uint32_t *taglen = (uint32_t *)p;
                 p += sizeof(*taglen);
 
-
-                uint8_t *pp = (uint8_t *) strchr((char *) p, '=');
-                uint8_t j = 0;
+                uint8_t *pp           = (uint8_t *)strchr((char *)p, '=');
+                uint8_t j             = 0;
                 uint32_t tolower_size = pp - p;
                 /*convert to lower case*/
-                for (j = 0; j < tolower_size; ++j) p[j] = tolower(p[j]);
+                for (j = 0; j < tolower_size; ++j)
+                    p[j] = tolower(p[j]);
 
                 if (!memcmp(p, "artist=", 7)) {
                     userdata->flac_parse_text(p, 7, *taglen, buff, sizeof buff);
@@ -150,27 +152,27 @@ namespace audio {
 
                 p += *taglen;
             }
-        } else if (pMetadata->type == DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO) {
+        }
+        else if (pMetadata->type == DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO) {
             userdata->tags->total_duration_s =
-                    (pMetadata->data.streaminfo.totalSampleCount / (pMetadata->data.streaminfo.bitsPerSample / 8)) /
-                    pMetadata->data.streaminfo.sampleRate;
+                (pMetadata->data.streaminfo.totalSampleCount / (pMetadata->data.streaminfo.bitsPerSample / 8)) /
+                pMetadata->data.streaminfo.sampleRate;
 
             if (pMetadata->data.streaminfo.channels == 1) {
                 userdata->tags->total_duration_s *= 2;
             }
 
-            userdata->tags->duration_min = userdata->tags->total_duration_s / 60;
+            userdata->tags->duration_min  = userdata->tags->total_duration_s / 60;
             userdata->tags->duration_hour = userdata->tags->duration_min / 60;
-            userdata->tags->duration_sec = userdata->tags->total_duration_s % 60;
-            userdata->tags->sample_rate = pMetadata->data.streaminfo.sampleRate;
-            userdata->tags->num_channel = pMetadata->data.streaminfo.channels;
+            userdata->tags->duration_sec  = userdata->tags->total_duration_s % 60;
+            userdata->tags->sample_rate   = pMetadata->data.streaminfo.sampleRate;
+            userdata->tags->num_channel   = pMetadata->data.streaminfo.channels;
 
             userdata->sampleRate = pMetadata->data.streaminfo.sampleRate;
             userdata->chanNumber = pMetadata->data.streaminfo.channels;
 
             userdata->totalSamplesCount = pMetadata->data.streaminfo.totalSampleCount;
         }
-
     }
 
-}
+} // namespace audio
diff --git a/module-audio/Audio/decoder/decoderFLAC.hpp b/module-audio/Audio/decoder/decoderFLAC.hpp
index face0aedb..0d2b46c34 100644
--- a/module-audio/Audio/decoder/decoderFLAC.hpp
+++ b/module-audio/Audio/decoder/decoderFLAC.hpp
@@ -2,7 +2,7 @@
  *  @file decoderFLAC.h
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 06.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -14,11 +14,13 @@
 
 #include "dr_flac.h"
 
-namespace audio {
+namespace audio
+{
 
-    class decoderFLAC : public decoder {
+    class decoderFLAC : public decoder
+    {
 
-    public:
+      public:
         decoderFLAC(const char *fileName);
 
         ~decoderFLAC();
@@ -29,15 +31,13 @@ namespace audio {
 
         void setPosition(float pos) override;
 
-
-    private:
+      private:
         std::unique_ptr<Tags> tags;
 
         drflac *flac = nullptr;
 
         uint32_t totalSamplesCount = 0;
 
-
         /* Data encoded in UTF-8 */
         void flac_parse_text(uint8_t *in, uint32_t taglen, uint32_t datalen, uint8_t *out, uint32_t outlen);
 
@@ -49,8 +49,8 @@ namespace audio {
         //
         // Returns the number of bytes actually read.
         //
-        // A return value of less than bytesToRead indicates the end of the stream. Do _not_ return from this callback until
-        // either the entire bytesToRead is filled or you have reached the end of the stream.
+        // A return value of less than bytesToRead indicates the end of the stream. Do _not_ return from this callback
+        // until either the entire bytesToRead is filled or you have reached the end of the stream.
         static size_t drflac_read(void *pUserData, void *pBufferOut, size_t bytesToRead);
 
         // Callback for when data needs to be seeked.
@@ -61,16 +61,15 @@ namespace audio {
         //
         // Returns whether or not the seek was successful.
         //
-        // The offset will never be negative. Whether or not it is relative to the beginning or current position is determined
-        // by the "origin" parameter which will be either drflac_seek_origin_start or drflac_seek_origin_current.
+        // The offset will never be negative. Whether or not it is relative to the beginning or current position is
+        // determined by the "origin" parameter which will be either drflac_seek_origin_start or
+        // drflac_seek_origin_current.
         static drflac_bool32 drflac_seek(void *pUserData, int offset, drflac_seek_origin origin);
 
         // Use pMetadata->type to determine which metadata block is being handled and how to read the data.
         static void drflac_meta(void *pUserData, drflac_metadata *pMetadata);
-
     };
 
-}
+} // namespace audio
 
-
-#endif //UNTITLED1_DECODERFLAC_HPP
+#endif // UNTITLED1_DECODERFLAC_HPP
diff --git a/module-audio/Audio/decoder/decoderMP3.cpp b/module-audio/Audio/decoder/decoderMP3.cpp
index 7f3418b58..2ef99644c 100644
--- a/module-audio/Audio/decoder/decoderMP3.cpp
+++ b/module-audio/Audio/decoder/decoderMP3.cpp
@@ -2,7 +2,7 @@
  *  @file decoderMP3.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -17,13 +17,13 @@
 
 #include <array>
 
-namespace audio {
+namespace audio
+{
 
-    decoderMP3::decoderMP3(const char *fileName) :
-            decoder(fileName),
-            tag(std::make_unique<Tags>()) {
+    decoderMP3::decoderMP3(const char *fileName) : decoder(fileName), tag(std::make_unique<Tags>())
+    {
 
-        if(fileSize == 0){
+        if (fileSize == 0) {
             return;
         }
 
@@ -38,22 +38,24 @@ namespace audio {
         isInitialized = true;
     }
 
-    decoderMP3::~decoderMP3() {
+    decoderMP3::~decoderMP3()
+    {
         mp3dec_deinit(mp3d);
         free(mp3d);
     }
 
-
-    void decoderMP3::setPosition(float pos) {
+    void decoderMP3::setPosition(float pos)
+    {
         decoderNotFirstRun = false;
 
         vfs.fseek(fd, (pos * fileSize) + firstValidFrameFileOffset, SEEK_SET);
 
-        //TODO: M.P Currently calculating MP3 position is unsupported, in general seeking is supported though.
-        //position += (float) ((float) (samplesToReadChann / chanNumber) / (float) sampleRate);
+        // TODO: M.P Currently calculating MP3 position is unsupported, in general seeking is supported though.
+        // position += (float) ((float) (samplesToReadChann / chanNumber) / (float) sampleRate);
     }
 
-    std::unique_ptr<Tags> decoderMP3::fetchTags() {
+    std::unique_ptr<Tags> decoderMP3::fetchTags()
+    {
 
         vfs.fseek(fd, firstValidFrameFileOffset + 4, SEEK_SET);
         auto buff = std::make_unique<uint8_t[]>(firstValidFrameByteSize);
@@ -64,7 +66,8 @@ namespace audio {
         if (parseXingHeader(buff.get(), firstValidFrameByteSize, &xinfo)) {
             // valid xing header found
             tag->total_duration_s = xinfo.TotalFrames * (samplesPerFrame) / sampleRate;
-        } else {
+        }
+        else {
             // Scan through whole file and count frames
             uint32_t frames_count = get_frames_count();
             tag->total_duration_s = frames_count * (samplesPerFrame) / sampleRate;
@@ -74,32 +77,32 @@ namespace audio {
         tag->sample_rate = sampleRate;
         tag->filePath.append(filePath);
 
-        tag->duration_min = tag->total_duration_s / 60;
+        tag->duration_min  = tag->total_duration_s / 60;
         tag->duration_hour = tag->duration_min / 60;
-        tag->duration_sec = tag->total_duration_s % 60;
+        tag->duration_sec  = tag->total_duration_s % 60;
 
         vfs.rewind(fd);
 
         // Parse ID3 tags
-        // Allocate buffer for fetching two parts of MP3: init and last, 512Kbytes should be sufficient to fetch all necessary tags
-        auto source = std::make_unique<std::array<char, 512*1024>>();
+        // Allocate buffer for fetching two parts of MP3: init and last, 512Kbytes should be sufficient to fetch all
+        // necessary tags
+        auto source = std::make_unique<std::array<char, 512 * 1024>>();
 
         // Read beginning of MP3(256kbytes)
-        vfs.fread(&(*source)[0], 1, source->size()/2, fd);
+        vfs.fread(&(*source)[0], 1, source->size() / 2, fd);
 
         // Read last section of MP3(256kbytes)
-        vfs.fseek(fd,-(source->size()/2),SEEK_END);
-        vfs.fread(&(*source)[source->size()/2], 1, source->size()/2, fd);
+        vfs.fseek(fd, -(source->size() / 2), SEEK_END);
+        vfs.fread(&(*source)[source->size() / 2], 1, source->size() / 2, fd);
 
         if (atag::id3v2::is_tagged(*source)) {
 
             atag::simple_tag idtag = atag::id3v2::simple_parse(*source);
 
-            tag->title = idtag.title;
+            tag->title  = idtag.title;
             tag->artist = idtag.artist;
-            tag->album = idtag.album;
-            tag->year = std::to_string(idtag.year);
-
+            tag->album  = idtag.album;
+            tag->year   = std::to_string(idtag.year);
         }
 
         // If title tag empty fill it with raw file name
@@ -107,7 +110,8 @@ namespace audio {
             auto pos = filePath.rfind("/");
             if (pos == std::string::npos) {
                 tag->title.append(filePath);
-            } else {
+            }
+            else {
                 tag->title.append(&filePath[pos + 1]);
             }
         }
@@ -117,13 +121,13 @@ namespace audio {
         return std::make_unique<Tags>(*tag);
     }
 
-
-    bool decoderMP3::find_first_valid_frame() {
+    bool decoderMP3::find_first_valid_frame()
+    {
 
         mp3dec_frame_info_t info = {};
 
         int32_t bytesAvailable = DECODER_BUFFER_SIZE;
-        uint32_t bufferIndex = 0;
+        uint32_t bufferIndex   = 0;
 
         auto decBuffer = std::make_unique<uint8_t[]>(DECODER_BUFFER_SIZE);
 
@@ -133,9 +137,9 @@ namespace audio {
             return false;
         }
 
-        refill:
+    refill:
 
-        //refill buffer if necessary(only if over 87,5% of bytes are consumed)
+        // refill buffer if necessary(only if over 87,5% of bytes are consumed)
         if (bufferIndex > (DECODER_BUFFER_SIZE - (DECODER_BUFFER_SIZE / 8))) {
             memcpy(&decBuffer[0], &decBuffer[bufferIndex], bytesAvailable);
             uint32_t bytesRead = vfs.fread(&decBuffer[bytesAvailable], 1, DECODER_BUFFER_SIZE - bytesAvailable, fd);
@@ -158,38 +162,36 @@ namespace audio {
             if (smpl && info.frame_bytes) {
 
                 // Fill necessary parameters
-                samplesPerFrame = smpl;
-                sampleRate = info.hz;
-                chanNumber = info.channels;
-                firstValidFrameByteSize = (144 * info.bitrate_kbps * 1000 / info.hz);
+                samplesPerFrame           = smpl;
+                sampleRate                = info.hz;
+                chanNumber                = info.channels;
+                firstValidFrameByteSize   = (144 * info.bitrate_kbps * 1000 / info.hz);
                 firstValidFrameFileOffset = vfs.ftell(fd) - bytesAvailable - firstValidFrameByteSize;
 
                 vfs.rewind(fd);
 
                 return true;
             }
-                // Decoder skipped ID3 or invalid data
+            // Decoder skipped ID3 or invalid data
             else if ((smpl == 0) && info.frame_bytes) {
-
             }
-                // insufficient data
+            // insufficient data
             else if ((info.frame_bytes == 0) && (smpl == 0)) {
                 goto refill;
             }
-
-
         }
     }
 
-    uint32_t decoderMP3::get_frames_count() {
+    uint32_t decoderMP3::get_frames_count()
+    {
 
-        int32_t bytesAvailable = DECODER_BUFFER_SIZE;
-        uint32_t frames_count = 0;
+        int32_t bytesAvailable   = DECODER_BUFFER_SIZE;
+        uint32_t frames_count    = 0;
         mp3dec_frame_info_t info = {};
-        bool last_refill = false;
+        bool last_refill         = false;
 
         uint32_t bufferIndex = 0;
-        auto decBuffer = std::make_unique<uint8_t[]>(DECODER_BUFFER_SIZE);
+        auto decBuffer       = std::make_unique<uint8_t[]>(DECODER_BUFFER_SIZE);
 
         // Jump to the file beginning
         vfs.rewind(fd);
@@ -199,13 +201,13 @@ namespace audio {
             return 0;
         }
 
-        refill:
+    refill:
 
-        //refill buffer if necessary(only if over 87,5% of bytes are consumed)
+        // refill buffer if necessary(only if over 87,5% of bytes are consumed)
         if (bufferIndex > (DECODER_BUFFER_SIZE - (DECODER_BUFFER_SIZE / 8))) {
             memcpy(&decBuffer[0], &decBuffer[bufferIndex], bytesAvailable);
-            uint32_t bytesRead = vfs.fread(decBuffer.get() + bytesAvailable, 1, DECODER_BUFFER_SIZE - bytesAvailable,
-                                           fd);
+            uint32_t bytesRead =
+                vfs.fread(decBuffer.get() + bytesAvailable, 1, DECODER_BUFFER_SIZE - bytesAvailable, fd);
 
             if (bytesRead != (DECODER_BUFFER_SIZE - bytesAvailable)) {
                 last_refill = true;
@@ -240,15 +242,15 @@ namespace audio {
             if ((info.frame_bytes == 0) && (smpl == 0)) {
                 goto refill;
             }
-
         }
     }
 
-    uint32_t decoderMP3::decode(uint32_t samplesToRead, int16_t *pcmData) {
+    uint32_t decoderMP3::decode(uint32_t samplesToRead, int16_t *pcmData)
+    {
         mp3dec_frame_info_t info = {0};
 
         if (!decoderNotFirstRun) {
-            decoderBuffer = std::make_unique<uint8_t[]>(DECODER_BUFFER_SIZE);
+            decoderBuffer    = std::make_unique<uint8_t[]>(DECODER_BUFFER_SIZE);
             pcmsamplesbuffer = std::make_unique<uint16_t[]>(pcmsamplesbuffer_size);
 
             // Fill decoderBuffer
@@ -258,20 +260,20 @@ namespace audio {
                 return 0;
             }
 
-            bytesAvailable = DECODER_BUFFER_SIZE;
+            bytesAvailable   = DECODER_BUFFER_SIZE;
             decoderBufferIdx = 0;
 
             decoderNotFirstRun = true;
-        } else if (!lastRefill) {
+        }
+        else if (!lastRefill) {
             bytesAvailable = DECODER_BUFFER_SIZE - decoderBufferIdx;
         }
 
-
         uint32_t samplesFetched = pcmsamplesbuffer_idx;
 
-        refill:
+    refill:
 
-        //refill buffer if necessary(only if over 87,5% of bytes consumed)
+        // refill buffer if necessary(only if over 87,5% of bytes consumed)
         if (!lastRefill && (decoderBufferIdx > (DECODER_BUFFER_SIZE - (DECODER_BUFFER_SIZE / 8)))) {
             memcpy(&decoderBuffer[0], &decoderBuffer[decoderBufferIdx], bytesAvailable);
             uint32_t bytesRead = vfs.fread(&decoderBuffer[bytesAvailable], 1, DECODER_BUFFER_SIZE - bytesAvailable, fd);
@@ -286,12 +288,14 @@ namespace audio {
 
         uint32_t samplesToReadChann = samplesToRead;
 
-
         while (1) {
             uint32_t smpl = 0;
             if (samplesFetched < samplesToReadChann) {
-                smpl = mp3dec_decode_frame(mp3d, &decoderBuffer[decoderBufferIdx], bytesAvailable,
-                                           (short *) &pcmsamplesbuffer[samplesFetched], &info);
+                smpl = mp3dec_decode_frame(mp3d,
+                                           &decoderBuffer[decoderBufferIdx],
+                                           bytesAvailable,
+                                           (short *)&pcmsamplesbuffer[samplesFetched],
+                                           &info);
             }
 
             bytesAvailable -= info.frame_bytes;
@@ -314,8 +318,6 @@ namespace audio {
             if (lastRefill && (info.frame_bytes == 0) && (smpl == 0)) {
                 return 0;
             }
-
-
         }
 
         // Copy decoded samples to dest buffer
@@ -325,12 +327,10 @@ namespace audio {
         pcmsamplesbuffer_idx = samplesFetched - samplesToReadChann;
         memmove(&pcmsamplesbuffer[0], &pcmsamplesbuffer[samplesToReadChann], pcmsamplesbuffer_idx * sizeof(int16_t));
 
-
         /* Calculate frame duration in seconds */
-        position += (float) ((float) (chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) /
-                             (float) sampleRate);
+        position += (float)((float)(chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) / (float)sampleRate);
 
         return samplesToRead;
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/decoder/decoderMP3.hpp b/module-audio/Audio/decoder/decoderMP3.hpp
index c74a38326..26834f797 100644
--- a/module-audio/Audio/decoder/decoderMP3.hpp
+++ b/module-audio/Audio/decoder/decoderMP3.hpp
@@ -2,7 +2,7 @@
  *  @file decoderMP3.h
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 04.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -10,23 +10,23 @@
 #ifndef UNTITLED1_DECODERMP3_HPP
 #define UNTITLED1_DECODERMP3_HPP
 
-
 #include "minimp3.h"
 
 #include <cstring>
 #include "decoder.hpp"
 
-
-extern "C" {
+extern "C"
+{
 #include "xing_header.h"
 };
 
-namespace audio {
+namespace audio
+{
 
-    class decoderMP3 : public decoder {
-
-    public:
+    class decoderMP3 : public decoder
+    {
 
+      public:
         decoderMP3(const char *fileName);
 
         ~decoderMP3();
@@ -37,39 +37,35 @@ namespace audio {
 
         void setPosition(float pos) override;
 
-
-    private:
-
+      private:
         bool find_first_valid_frame();
 
         uint32_t get_frames_count();
 
-
         std::unique_ptr<Tags> tag;
 
         const uint32_t DECODER_BUFFER_SIZE = 1024 * 24;
 
-
         mp3dec_t *mp3d = nullptr;
 
         std::unique_ptr<uint8_t[]> decoderBuffer = nullptr;
-        uint32_t decoderBufferIdx = 0;
+        uint32_t decoderBufferIdx                = 0;
 
         std::unique_ptr<uint16_t[]> pcmsamplesbuffer = nullptr;
-        uint32_t pcmsamplesbuffer_idx = 0;
+        uint32_t pcmsamplesbuffer_idx                = 0;
 
         const size_t pcmsamplesbuffer_size = (8192 + MINIMP3_MAX_SAMPLES_PER_FRAME) * sizeof(int16_t);
 
         uint32_t samplesPerFrame = 0;
 
         // Variables below are used during decoding procedure
-        uint32_t firstValidFrameByteSize = 0;
+        uint32_t firstValidFrameByteSize   = 0;
         uint32_t firstValidFrameFileOffset = 0;
-        bool lastRefill = false;
-        bool decoderNotFirstRun = false;
-        uint32_t bytesAvailable = 0;
+        bool lastRefill                    = false;
+        bool decoderNotFirstRun            = false;
+        uint32_t bytesAvailable            = 0;
     };
 
-}
+} // namespace audio
 
-#endif //UNTITLED1_DECODERMP3_HPP
+#endif // UNTITLED1_DECODERMP3_HPP
diff --git a/module-audio/Audio/decoder/decoderWAV.cpp b/module-audio/Audio/decoder/decoderWAV.cpp
index 1b4f49c7a..c7a0693e2 100644
--- a/module-audio/Audio/decoder/decoderWAV.cpp
+++ b/module-audio/Audio/decoder/decoderWAV.cpp
@@ -2,20 +2,20 @@
  *  @file decoderWAV.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 06.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
 #include "decoderWAV.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    decoderWAV::decoderWAV(const char *fileName) :
-            decoder(fileName),
-            tag(std::make_unique<Tags>()) {
+    decoderWAV::decoderWAV(const char *fileName) : decoder(fileName), tag(std::make_unique<Tags>())
+    {
 
-        if(fileSize == 0){
+        if (fileSize == 0) {
             return;
         }
 
@@ -27,78 +27,80 @@ namespace audio {
             return;
         }
 
-        //TODO:M.P; implement support for sample size different than 16bit
-        //pcmsamplesbuffer.reserve(1024);
+        // TODO:M.P; implement support for sample size different than 16bit
+        // pcmsamplesbuffer.reserve(1024);
 
         tag->total_duration_s = (fileSize - sizeof(WAVE_FormatTypeDef)) / waveHeader.ByteRate;
-        tag->duration_min = tag->total_duration_s / 60;
-        tag->duration_hour = tag->duration_min / 60;
-        tag->duration_sec = tag->total_duration_s % 60;
-        tag->sample_rate = waveHeader.SampleRate;
-        tag->num_channel = waveHeader.NbrChannels;
+        tag->duration_min     = tag->total_duration_s / 60;
+        tag->duration_hour    = tag->duration_min / 60;
+        tag->duration_sec     = tag->total_duration_s % 60;
+        tag->sample_rate      = waveHeader.SampleRate;
+        tag->num_channel      = waveHeader.NbrChannels;
 
-        sampleRate = waveHeader.SampleRate;
+        sampleRate    = waveHeader.SampleRate;
         bitsPerSample = waveHeader.BitPerSample;
-        chanNumber = waveHeader.NbrChannels;
+        chanNumber    = waveHeader.NbrChannels;
 
         isInitialized = true;
     }
 
-    std::unique_ptr<Tags> decoderWAV::fetchTags() {
+    std::unique_ptr<Tags> decoderWAV::fetchTags()
+    {
 
         tag->filePath.append(filePath);
         auto pos = filePath.rfind("/");
         if (pos == std::string::npos) {
             tag->title.append(filePath);
-        } else {
+        }
+        else {
             tag->title.append(&filePath[pos + 1]);
         }
 
         return std::make_unique<Tags>(*tag);
     }
 
-    uint32_t decoderWAV::decode(uint32_t samplesToRead, int16_t *pcmData) {
+    uint32_t decoderWAV::decode(uint32_t samplesToRead, int16_t *pcmData)
+    {
         uint32_t samples_read = 0;
 
-/* TODO:M.P; implement support for sample size different than 16bit
-    if(samplesToRead > pcmsamplesbuffer.max_size()){
-        pcmsamplesbuffer.resize(samplesToRead);
-    }*/
+        /* TODO:M.P; implement support for sample size different than 16bit
+            if(samplesToRead > pcmsamplesbuffer.max_size()){
+                pcmsamplesbuffer.resize(samplesToRead);
+            }*/
 
         switch (bitsPerSample) {
-            case 8:
-                //TODO:M.P not supported
-                break;
+        case 8:
+            // TODO:M.P not supported
+            break;
 
-            case 16:
-                samples_read = vfs.fread(pcmData, sizeof(int16_t), samplesToRead, fd);
-                break;
+        case 16:
+            samples_read = vfs.fread(pcmData, sizeof(int16_t), samplesToRead, fd);
+            break;
 
-            case 24:
-                //TODO:M.P not supported
-                break;
-
-            case 32:
-                //TODO:M.P not supported
-                break;
+        case 24:
+            // TODO:M.P not supported
+            break;
 
+        case 32:
+            // TODO:M.P not supported
+            break;
         }
 
         if (samples_read) {
             /* Calculate frame duration in seconds */
-            position += (float) ((float) (chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) /
-                                 (float) (sampleRate));
+            position +=
+                (float)((float)(chanNumber == 2 ? samplesToRead / chanNumber : samplesToRead) / (float)(sampleRate));
         }
 
         return samples_read;
     }
 
-    void decoderWAV::setPosition(float pos) {
+    void decoderWAV::setPosition(float pos)
+    {
 
         vfs.fseek(fd, (fileSize * pos) + sizeof(WAVE_FormatTypeDef), SEEK_SET);
         // Calculate new position
-        position = (float) ((float) (vfs.ftell(fd) / sizeof(int16_t) / chanNumber) / (float) (sampleRate));
-
+        position = (float)((float)(vfs.ftell(fd) / sizeof(int16_t) / chanNumber) / (float)(sampleRate));
     }
 
-}
+} // namespace audio
diff --git a/module-audio/Audio/decoder/decoderWAV.hpp b/module-audio/Audio/decoder/decoderWAV.hpp
index bb196dba9..e91f15c3e 100644
--- a/module-audio/Audio/decoder/decoderWAV.hpp
+++ b/module-audio/Audio/decoder/decoderWAV.hpp
@@ -2,7 +2,7 @@
  *  @file decoderWAV.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 06.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -12,15 +12,17 @@
 
 #include "decoder.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class decoderWAV : public decoder {
-
-    public:
+    class decoderWAV : public decoder
+    {
 
+      public:
         decoderWAV(const char *fileName);
 
-        ~decoderWAV() {}
+        ~decoderWAV()
+        {}
 
         std::unique_ptr<Tags> fetchTags() override;
 
@@ -28,9 +30,9 @@ namespace audio {
 
         void setPosition(float pos) override;
 
-    private:
-
-        using WAVE_FormatTypeDef = struct {
+      private:
+        using WAVE_FormatTypeDef = struct
+        {
             uint32_t ChunkID;       /* 0 */
             uint32_t FileSize;      /* 4 */
             uint32_t FileFormat;    /* 8 */
@@ -53,6 +55,6 @@ namespace audio {
         std::unique_ptr<Tags> tag = nullptr;
     };
 
-}
+} // namespace audio
 
-#endif //UNTITLED1_DECODERWAV_HPP
+#endif // UNTITLED1_DECODERWAV_HPP
diff --git a/module-audio/Audio/decoder/dr_flac.h b/module-audio/Audio/decoder/dr_flac.h
index eeee36d30..4d7cd9f34 100644
--- a/module-audio/Audio/decoder/dr_flac.h
+++ b/module-audio/Audio/decoder/dr_flac.h
@@ -9,8 +9,8 @@
 //     #define DR_FLAC_IMPLEMENTATION
 //     #include "dr_flac.h"
 //
-// You can then #include this file in other parts of the program as you would with any other header file. To decode audio data,
-// do something like the following:
+// You can then #include this file in other parts of the program as you would with any other header file. To decode
+// audio data, do something like the following:
 //
 //     drflac* pFlac = drflac_open_file("MySong.flac");
 //     if (pFlac == NULL) {
@@ -20,23 +20,23 @@
 //     drflac_int32* pSamples = malloc(pFlac->totalSampleCount * sizeof(drflac_int32));
 //     drflac_uint64 numberOfInterleavedSamplesActuallyRead = drflac_read_s32(pFlac, pFlac->totalSampleCount, pSamples);
 //
-// The drflac object represents the decoder. It is a transparent type so all the information you need, such as the number of
-// channels and the bits per sample, should be directly accessible - just make sure you don't change their values. Samples are
-// always output as interleaved signed 32-bit PCM. In the example above a native FLAC stream was opened, however dr_flac has
-// seamless support for Ogg encapsulated FLAC streams as well.
+// The drflac object represents the decoder. It is a transparent type so all the information you need, such as the
+// number of channels and the bits per sample, should be directly accessible - just make sure you don't change their
+// values. Samples are always output as interleaved signed 32-bit PCM. In the example above a native FLAC stream was
+// opened, however dr_flac has seamless support for Ogg encapsulated FLAC streams as well.
 //
-// You do not need to decode the entire stream in one go - you just specify how many samples you'd like at any given time and
-// the decoder will give you as many samples as it can, up to the amount requested. Later on when you need the next batch of
-// samples, just call it again. Example:
+// You do not need to decode the entire stream in one go - you just specify how many samples you'd like at any given
+// time and the decoder will give you as many samples as it can, up to the amount requested. Later on when you need the
+// next batch of samples, just call it again. Example:
 //
 //     while (drflac_read_s32(pFlac, chunkSize, pChunkSamples) > 0) {
 //         do_something();
 //     }
 //
-// You can seek to a specific sample with drflac_seek_to_sample(). The given sample is based on interleaving. So for example,
-// if you were to seek to the sample at index 0 in a stereo stream, you'll be seeking to the first sample of the left channel.
-// The sample at index 1 will be the first sample of the right channel. The sample at index 2 will be the second sample of the
-// left channel, etc.
+// You can seek to a specific sample with drflac_seek_to_sample(). The given sample is based on interleaving. So for
+// example, if you were to seek to the sample at index 0 in a stereo stream, you'll be seeking to the first sample of
+// the left channel. The sample at index 1 will be the first sample of the right channel. The sample at index 2 will be
+// the second sample of the left channel, etc.
 //
 //
 // If you just want to quickly decode an entire FLAC file in one go you can do something like this:
@@ -44,8 +44,8 @@
 //     unsigned int channels;
 //     unsigned int sampleRate;
 //     drflac_uint64 totalSampleCount;
-//     drflac_int32* pSampleData = drflac_open_and_decode_file_s32("MySong.flac", &channels, &sampleRate, &totalSampleCount);
-//     if (pSampleData == NULL) {
+//     drflac_int32* pSampleData = drflac_open_and_decode_file_s32("MySong.flac", &channels, &sampleRate,
+//     &totalSampleCount); if (pSampleData == NULL) {
 //         // Failed to open and decode FLAC file.
 //     }
 //
@@ -54,21 +54,22 @@
 //     drflac_free(pSampleData);
 //
 //
-// You can read samples as signed 16-bit integer and 32-bit floating-point PCM with the *_s16() and *_f32() family of APIs
-// respectively, but note that these should be considered lossy.
+// You can read samples as signed 16-bit integer and 32-bit floating-point PCM with the *_s16() and *_f32() family of
+// APIs respectively, but note that these should be considered lossy.
 //
 //
 // If you need access to metadata (album art, etc.), use drflac_open_with_metadata(), drflac_open_file_with_metdata() or
-// drflac_open_memory_with_metadata(). The rationale for keeping these APIs separate is that they're slightly slower than the
-// normal versions and also just a little bit harder to use.
+// drflac_open_memory_with_metadata(). The rationale for keeping these APIs separate is that they're slightly slower
+// than the normal versions and also just a little bit harder to use.
 //
-// dr_flac reports metadata to the application through the use of a callback, and every metadata block is reported before
-// drflac_open_with_metdata() returns.
+// dr_flac reports metadata to the application through the use of a callback, and every metadata block is reported
+// before drflac_open_with_metdata() returns.
 //
 //
 // The main opening APIs (drflac_open(), etc.) will fail if the header is not present. The presents a problem in certain
-// scenarios such as broadcast style streams like internet radio where the header may not be present because the user has
-// started playback mid-stream. To handle this, use the relaxed APIs: drflac_open_relaxed() and drflac_open_with_metadata_relaxed().
+// scenarios such as broadcast style streams like internet radio where the header may not be present because the user
+// has started playback mid-stream. To handle this, use the relaxed APIs: drflac_open_relaxed() and
+// drflac_open_with_metadata_relaxed().
 //
 // It is not recommended to use these APIs for file based streams because a missing header would usually indicate a
 // corrupted or perverse file. In addition, these APIs can take a long time to initialize because they may need to spend
@@ -86,22 +87,23 @@
 //   Disables support for Ogg/FLAC streams.
 //
 // #define DR_FLAC_NO_WIN32_IO
-//   In the Win32 build, dr_flac uses the Win32 IO APIs for drflac_open_file() by default. This setting will make it use the
-//   standard FILE APIs instead. Ignored when DR_FLAC_NO_STDIO is #defined. (The rationale for this configuration is that
-//   there's a bug in one compiler's Win32 implementation of the FILE APIs which is not present in the Win32 IO APIs.)
+//   In the Win32 build, dr_flac uses the Win32 IO APIs for drflac_open_file() by default. This setting will make it use
+//   the standard FILE APIs instead. Ignored when DR_FLAC_NO_STDIO is #defined. (The rationale for this configuration is
+//   that there's a bug in one compiler's Win32 implementation of the FILE APIs which is not present in the Win32 IO
+//   APIs.)
 //
 // #define DR_FLAC_BUFFER_SIZE <number>
-//   Defines the size of the internal buffer to store data from onRead(). This buffer is used to reduce the number of calls
-//   back to the client for more data. Larger values means more memory, but better performance. My tests show diminishing
-//   returns after about 4KB (which is the default). Consider reducing this if you have a very efficient implementation of
-//   onRead(), or increase it if it's very inefficient. Must be a multiple of 8.
+//   Defines the size of the internal buffer to store data from onRead(). This buffer is used to reduce the number of
+//   calls back to the client for more data. Larger values means more memory, but better performance. My tests show
+//   diminishing returns after about 4KB (which is the default). Consider reducing this if you have a very efficient
+//   implementation of onRead(), or increase it if it's very inefficient. Must be a multiple of 8.
 //
 // #define DR_FLAC_NO_CRC
 //   Disables CRC checks. This will offer a performance boost when CRC is unnecessary.
 //
 // #define DR_FLAC_NO_SIMD
-//   Disables SIMD optimizations (SSE on x86/x64 architectures). Use this if you are having compatibility issues with your
-//   compiler.
+//   Disables SIMD optimizations (SSE on x86/x64 architectures). Use this if you are having compatibility issues with
+//   your compiler.
 //
 //
 //
@@ -109,10 +111,12 @@
 // - dr_flac does not currently support changing the sample rate nor channel count mid stream.
 // - Audio data is output as signed 32-bit PCM, regardless of the bits per sample the FLAC stream is encoded as.
 // - This has not been tested on big-endian architectures.
-// - Rice codes in unencoded binary form (see https://xiph.org/flac/format.html#rice_partition) has not been tested. If anybody
+// - Rice codes in unencoded binary form (see https://xiph.org/flac/format.html#rice_partition) has not been tested. If
+// anybody
 //   knows where I can find some test files for this, let me know.
 // - dr_flac is not thread-safe, but it's APIs can be called from any thread so long as you do your own synchronization.
-// - When using Ogg encapsulation, a corrupted metadata block will result in drflac_open_with_metadata() and drflac_open()
+// - When using Ogg encapsulation, a corrupted metadata block will result in drflac_open_with_metadata() and
+// drflac_open()
 //   returning inconsistent samples.
 
 #ifndef dr_flac_h
@@ -121,39 +125,40 @@
 #include <stddef.h>
 
 #if defined(_MSC_VER) && _MSC_VER < 1600
-typedef   signed char    drflac_int8;
-typedef unsigned char    drflac_uint8;
-typedef   signed short   drflac_int16;
-typedef unsigned short   drflac_uint16;
-typedef   signed int     drflac_int32;
-typedef unsigned int     drflac_uint32;
-typedef   signed __int64 drflac_int64;
+typedef signed char drflac_int8;
+typedef unsigned char drflac_uint8;
+typedef signed short drflac_int16;
+typedef unsigned short drflac_uint16;
+typedef signed int drflac_int32;
+typedef unsigned int drflac_uint32;
+typedef signed __int64 drflac_int64;
 typedef unsigned __int64 drflac_uint64;
 #else
 #include <stdint.h>
-typedef int8_t           drflac_int8;
-typedef uint8_t          drflac_uint8;
-typedef int16_t          drflac_int16;
-typedef uint16_t         drflac_uint16;
-typedef int32_t          drflac_int32;
-typedef uint32_t         drflac_uint32;
-typedef int64_t          drflac_int64;
-typedef uint64_t         drflac_uint64;
+typedef int8_t drflac_int8;
+typedef uint8_t drflac_uint8;
+typedef int16_t drflac_int16;
+typedef uint16_t drflac_uint16;
+typedef int32_t drflac_int32;
+typedef uint32_t drflac_uint32;
+typedef int64_t drflac_int64;
+typedef uint64_t drflac_uint64;
 #endif
-typedef drflac_uint8     drflac_bool8;
-typedef drflac_uint32    drflac_bool32;
-#define DRFLAC_TRUE      1
-#define DRFLAC_FALSE     0
+typedef drflac_uint8 drflac_bool8;
+typedef drflac_uint32 drflac_bool32;
+#define DRFLAC_TRUE  1
+#define DRFLAC_FALSE 0
 
 // As data is read from the client it is placed into an internal buffer for fast access. This controls the
 // size of that buffer. Larger values means more speed, but also more memory. In my testing there is diminishing
 // returns after about 4KB, but you can fiddle with this to suit your own needs. Must be a multiple of 8.
 #ifndef DR_FLAC_BUFFER_SIZE
-#define DR_FLAC_BUFFER_SIZE   4096
+#define DR_FLAC_BUFFER_SIZE 4096
 #endif
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 // Check if we can enable 64-bit optimizations.
@@ -168,586 +173,634 @@ extern "C" {
 #endif
 
 #ifdef DRFLAC_64BIT
-typedef drflac_uint64 drflac_cache_t;
+    typedef drflac_uint64 drflac_cache_t;
 #else
 typedef drflac_uint32 drflac_cache_t;
 #endif
 
 // The various metadata block types.
-#define DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO       0
-#define DRFLAC_METADATA_BLOCK_TYPE_PADDING          1
-#define DRFLAC_METADATA_BLOCK_TYPE_APPLICATION      2
-#define DRFLAC_METADATA_BLOCK_TYPE_SEEKTABLE        3
-#define DRFLAC_METADATA_BLOCK_TYPE_VORBIS_COMMENT   4
-#define DRFLAC_METADATA_BLOCK_TYPE_CUESHEET         5
-#define DRFLAC_METADATA_BLOCK_TYPE_PICTURE          6
-#define DRFLAC_METADATA_BLOCK_TYPE_INVALID          127
+#define DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO     0
+#define DRFLAC_METADATA_BLOCK_TYPE_PADDING        1
+#define DRFLAC_METADATA_BLOCK_TYPE_APPLICATION    2
+#define DRFLAC_METADATA_BLOCK_TYPE_SEEKTABLE      3
+#define DRFLAC_METADATA_BLOCK_TYPE_VORBIS_COMMENT 4
+#define DRFLAC_METADATA_BLOCK_TYPE_CUESHEET       5
+#define DRFLAC_METADATA_BLOCK_TYPE_PICTURE        6
+#define DRFLAC_METADATA_BLOCK_TYPE_INVALID        127
 
 // The various picture types specified in the PICTURE block.
-#define DRFLAC_PICTURE_TYPE_OTHER                   0
-#define DRFLAC_PICTURE_TYPE_FILE_ICON               1
-#define DRFLAC_PICTURE_TYPE_OTHER_FILE_ICON         2
-#define DRFLAC_PICTURE_TYPE_COVER_FRONT             3
-#define DRFLAC_PICTURE_TYPE_COVER_BACK              4
-#define DRFLAC_PICTURE_TYPE_LEAFLET_PAGE            5
-#define DRFLAC_PICTURE_TYPE_MEDIA                   6
-#define DRFLAC_PICTURE_TYPE_LEAD_ARTIST             7
-#define DRFLAC_PICTURE_TYPE_ARTIST                  8
-#define DRFLAC_PICTURE_TYPE_CONDUCTOR               9
-#define DRFLAC_PICTURE_TYPE_BAND                    10
-#define DRFLAC_PICTURE_TYPE_COMPOSER                11
-#define DRFLAC_PICTURE_TYPE_LYRICIST                12
-#define DRFLAC_PICTURE_TYPE_RECORDING_LOCATION      13
-#define DRFLAC_PICTURE_TYPE_DURING_RECORDING        14
-#define DRFLAC_PICTURE_TYPE_DURING_PERFORMANCE      15
-#define DRFLAC_PICTURE_TYPE_SCREEN_CAPTURE          16
-#define DRFLAC_PICTURE_TYPE_BRIGHT_COLORED_FISH     17
-#define DRFLAC_PICTURE_TYPE_ILLUSTRATION            18
-#define DRFLAC_PICTURE_TYPE_BAND_LOGOTYPE           19
-#define DRFLAC_PICTURE_TYPE_PUBLISHER_LOGOTYPE      20
+#define DRFLAC_PICTURE_TYPE_OTHER               0
+#define DRFLAC_PICTURE_TYPE_FILE_ICON           1
+#define DRFLAC_PICTURE_TYPE_OTHER_FILE_ICON     2
+#define DRFLAC_PICTURE_TYPE_COVER_FRONT         3
+#define DRFLAC_PICTURE_TYPE_COVER_BACK          4
+#define DRFLAC_PICTURE_TYPE_LEAFLET_PAGE        5
+#define DRFLAC_PICTURE_TYPE_MEDIA               6
+#define DRFLAC_PICTURE_TYPE_LEAD_ARTIST         7
+#define DRFLAC_PICTURE_TYPE_ARTIST              8
+#define DRFLAC_PICTURE_TYPE_CONDUCTOR           9
+#define DRFLAC_PICTURE_TYPE_BAND                10
+#define DRFLAC_PICTURE_TYPE_COMPOSER            11
+#define DRFLAC_PICTURE_TYPE_LYRICIST            12
+#define DRFLAC_PICTURE_TYPE_RECORDING_LOCATION  13
+#define DRFLAC_PICTURE_TYPE_DURING_RECORDING    14
+#define DRFLAC_PICTURE_TYPE_DURING_PERFORMANCE  15
+#define DRFLAC_PICTURE_TYPE_SCREEN_CAPTURE      16
+#define DRFLAC_PICTURE_TYPE_BRIGHT_COLORED_FISH 17
+#define DRFLAC_PICTURE_TYPE_ILLUSTRATION        18
+#define DRFLAC_PICTURE_TYPE_BAND_LOGOTYPE       19
+#define DRFLAC_PICTURE_TYPE_PUBLISHER_LOGOTYPE  20
 
-typedef enum
-{
-    drflac_container_native,
-    drflac_container_ogg,
-    drflac_container_unknown
-} drflac_container;
+    typedef enum
+    {
+        drflac_container_native,
+        drflac_container_ogg,
+        drflac_container_unknown
+    } drflac_container;
 
-typedef enum
-{
-    drflac_seek_origin_start,
-    drflac_seek_origin_current
-} drflac_seek_origin;
+    typedef enum
+    {
+        drflac_seek_origin_start,
+        drflac_seek_origin_current
+    } drflac_seek_origin;
 
-// Packing is important on this structure because we map this directly to the raw data within the SEEKTABLE metadata block.
+// Packing is important on this structure because we map this directly to the raw data within the SEEKTABLE metadata
+// block.
 #pragma pack(2)
-typedef struct
-{
-    drflac_uint64 firstSample;
-    drflac_uint64 frameOffset;   // The offset from the first byte of the header of the first frame.
-    drflac_uint16 sampleCount;
-} drflac_seekpoint;
+    typedef struct
+    {
+        drflac_uint64 firstSample;
+        drflac_uint64 frameOffset; // The offset from the first byte of the header of the first frame.
+        drflac_uint16 sampleCount;
+    } drflac_seekpoint;
 #pragma pack()
 
-typedef struct
-{
-    drflac_uint16 minBlockSize;
-    drflac_uint16 maxBlockSize;
-    drflac_uint32 minFrameSize;
-    drflac_uint32 maxFrameSize;
-    drflac_uint32 sampleRate;
-    drflac_uint8  channels;
-    drflac_uint8  bitsPerSample;
-    drflac_uint64 totalSampleCount;
-    drflac_uint8  md5[16];
-} drflac_streaminfo;
-
-typedef struct
-{
-    // The metadata type. Use this to know how to interpret the data below.
-    drflac_uint32 type;
-
-    // A pointer to the raw data. This points to a temporary buffer so don't hold on to it. It's best to
-    // not modify the contents of this buffer. Use the structures below for more meaningful and structured
-    // information about the metadata. It's possible for this to be null.
-    const void* pRawData;
-
-    // The size in bytes of the block and the buffer pointed to by pRawData if it's non-NULL.
-    drflac_uint32 rawDataSize;
-
-    union
+    typedef struct
     {
-        drflac_streaminfo streaminfo;
+        drflac_uint16 minBlockSize;
+        drflac_uint16 maxBlockSize;
+        drflac_uint32 minFrameSize;
+        drflac_uint32 maxFrameSize;
+        drflac_uint32 sampleRate;
+        drflac_uint8 channels;
+        drflac_uint8 bitsPerSample;
+        drflac_uint64 totalSampleCount;
+        drflac_uint8 md5[16];
+    } drflac_streaminfo;
 
-        struct
+    typedef struct
+    {
+        // The metadata type. Use this to know how to interpret the data below.
+        drflac_uint32 type;
+
+        // A pointer to the raw data. This points to a temporary buffer so don't hold on to it. It's best to
+        // not modify the contents of this buffer. Use the structures below for more meaningful and structured
+        // information about the metadata. It's possible for this to be null.
+        const void *pRawData;
+
+        // The size in bytes of the block and the buffer pointed to by pRawData if it's non-NULL.
+        drflac_uint32 rawDataSize;
+
+        union
         {
-            int unused;
-        } padding;
-
-        struct
-        {
-            drflac_uint32 id;
-            const void* pData;
-            drflac_uint32 dataSize;
-        } application;
-
-        struct
-        {
-            drflac_uint32 seekpointCount;
-            const drflac_seekpoint* pSeekpoints;
-        } seektable;
-
-        struct
-        {
-            drflac_uint32 vendorLength;
-            const char* vendor;
-            drflac_uint32 commentCount;
-            const char* comments;
-        } vorbis_comment;
-
-        struct
-        {
-            char catalog[128];
-            drflac_uint64 leadInSampleCount;
-            drflac_bool32 isCD;
-            drflac_uint8 trackCount;
-            const drflac_uint8* pTrackData;
-        } cuesheet;
-
-        struct
-        {
-            drflac_uint32 type;
-            drflac_uint32 mimeLength;
-            const char* mime;
-            drflac_uint32 descriptionLength;
-            const char* description;
-            drflac_uint32 width;
-            drflac_uint32 height;
-            drflac_uint32 colorDepth;
-            drflac_uint32 indexColorCount;
-            drflac_uint32 pictureDataSize;
-            const drflac_uint8* pPictureData;
-        } picture;
-    } data;
-} drflac_metadata;
-
-
-// Callback for when data needs to be read from the client.
-//
-// pUserData   [in]  The user data that was passed to drflac_open() and family.
-// pBufferOut  [out] The output buffer.
-// bytesToRead [in]  The number of bytes to read.
-//
-// Returns the number of bytes actually read.
-//
-// A return value of less than bytesToRead indicates the end of the stream. Do _not_ return from this callback until
-// either the entire bytesToRead is filled or you have reached the end of the stream.
-typedef size_t (* drflac_read_proc)(void* pUserData, void* pBufferOut, size_t bytesToRead);
-
-// Callback for when data needs to be seeked.
-//
-// pUserData [in] The user data that was passed to drflac_open() and family.
-// offset    [in] The number of bytes to move, relative to the origin. Will never be negative.
-// origin    [in] The origin of the seek - the current position or the start of the stream.
-//
-// Returns whether or not the seek was successful.
-//
-// The offset will never be negative. Whether or not it is relative to the beginning or current position is determined
-// by the "origin" parameter which will be either drflac_seek_origin_start or drflac_seek_origin_current.
-typedef drflac_bool32 (* drflac_seek_proc)(void* pUserData, int offset, drflac_seek_origin origin);
-
-// Callback for when a metadata block is read.
-//
-// pUserData [in] The user data that was passed to drflac_open() and family.
-// pMetadata [in] A pointer to a structure containing the data of the metadata block.
-//
-// Use pMetadata->type to determine which metadata block is being handled and how to read the data.
-typedef void (* drflac_meta_proc)(void* pUserData, drflac_metadata* pMetadata);
-
-
-// Structure for internal use. Only used for decoders opened with drflac_open_memory.
-typedef struct
-{
-    const drflac_uint8* data;
-    size_t dataSize;
-    size_t currentReadPos;
-} drflac__memory_stream;
-
-// Structure for internal use. Used for bit streaming.
-typedef struct
-{
-    // The function to call when more data needs to be read.
-    drflac_read_proc onRead;
-
-    // The function to call when the current read position needs to be moved.
-    drflac_seek_proc onSeek;
-
-    // The user data to pass around to onRead and onSeek.
-    void* pUserData;
-
-
-    // The number of unaligned bytes in the L2 cache. This will always be 0 until the end of the stream is hit. At the end of the
-    // stream there will be a number of bytes that don't cleanly fit in an L1 cache line, so we use this variable to know whether
-    // or not the bistreamer needs to run on a slower path to read those last bytes. This will never be more than sizeof(drflac_cache_t).
-    size_t unalignedByteCount;
-
-    // The content of the unaligned bytes.
-    drflac_cache_t unalignedCache;
-
-    // The index of the next valid cache line in the "L2" cache.
-    drflac_uint32 nextL2Line;
-
-    // The number of bits that have been consumed by the cache. This is used to determine how many valid bits are remaining.
-    drflac_uint32 consumedBits;
-
-    // The cached data which was most recently read from the client. There are two levels of cache. Data flows as such:
-    // Client -> L2 -> L1. The L2 -> L1 movement is aligned and runs on a fast path in just a few instructions.
-    drflac_cache_t cacheL2[DR_FLAC_BUFFER_SIZE/sizeof(drflac_cache_t)];
-    drflac_cache_t cache;
-
-    // CRC-16. This is updated whenever bits are read from the bit stream. Manually set this to 0 to reset the CRC. For FLAC, this
-    // is reset to 0 at the beginning of each frame.
-    drflac_uint16 crc16;
-    drflac_cache_t crc16Cache;          // A cache for optimizing CRC calculations. This is filled when when the L1 cache is reloaded.
-    drflac_uint32 crc16CacheIgnoredBytes;   // The number of bytes to ignore when updating the CRC-16 from the CRC-16 cache.
-} drflac_bs;
-
-typedef struct
-{
-    // The type of the subframe: SUBFRAME_CONSTANT, SUBFRAME_VERBATIM, SUBFRAME_FIXED or SUBFRAME_LPC.
-    drflac_uint8 subframeType;
-
-    // The number of wasted bits per sample as specified by the sub-frame header.
-    drflac_uint8 wastedBitsPerSample;
-
-    // The order to use for the prediction stage for SUBFRAME_FIXED and SUBFRAME_LPC.
-    drflac_uint8 lpcOrder;
-
-    // The number of bits per sample for this subframe. This is not always equal to the current frame's bit per sample because
-    // an extra bit is required for side channels when interchannel decorrelation is being used.
-    drflac_uint32 bitsPerSample;
-
-    // A pointer to the buffer containing the decoded samples in the subframe. This pointer is an offset from drflac::pExtraData. Note that
-    // it's a signed 32-bit integer for each value.
-    drflac_int32* pDecodedSamples;
-} drflac_subframe;
-
-typedef struct
-{
-    // If the stream uses variable block sizes, this will be set to the index of the first sample. If fixed block sizes are used, this will
-    // always be set to 0.
-    drflac_uint64 sampleNumber;
-
-    // If the stream uses fixed block sizes, this will be set to the frame number. If variable block sizes are used, this will always be 0.
-    drflac_uint32 frameNumber;
-
-    // The sample rate of this frame.
-    drflac_uint32 sampleRate;
-
-    // The number of samples in each sub-frame within this frame.
-    drflac_uint16 blockSize;
-
-    // The channel assignment of this frame. This is not always set to the channel count. If interchannel decorrelation is being used this
-    // will be set to DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE, DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE or DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE.
-    drflac_uint8 channelAssignment;
-
-    // The number of bits per sample within this frame.
-    drflac_uint8 bitsPerSample;
-
-    // The frame's CRC.
-    drflac_uint8 crc8;
-} drflac_frame_header;
-
-typedef struct
-{
-    // The header.
-    drflac_frame_header header;
-
-    // The number of samples left to be read in this frame. This is initially set to the block size multiplied by the channel count. As samples
-    // are read, this will be decremented. When it reaches 0, the decoder will see this frame as fully consumed and load the next frame.
-    drflac_uint32 samplesRemaining;
-
-    // The list of sub-frames within the frame. There is one sub-frame for each channel, and there's a maximum of 8 channels.
-    drflac_subframe subframes[8];
-} drflac_frame;
-
-typedef struct
-{
-    // The function to call when a metadata block is read.
-    drflac_meta_proc onMeta;
-
-    // The user data posted to the metadata callback function.
-    void* pUserDataMD;
-
-
-    // The sample rate. Will be set to something like 44100.
-    drflac_uint32 sampleRate;
-
-    // The number of channels. This will be set to 1 for monaural streams, 2 for stereo, etc. Maximum 8. This is set based on the
-    // value specified in the STREAMINFO block.
-    drflac_uint8 channels;
-
-    // The bits per sample. Will be set to somthing like 16, 24, etc.
-    drflac_uint8 bitsPerSample;
-
-    // The maximum block size, in samples. This number represents the number of samples in each channel (not combined).
-    drflac_uint16 maxBlockSize;
-
-    // The total number of samples making up the stream. This includes every channel. For example, if the stream has 2 channels,
-    // with each channel having a total of 4096, this value will be set to 2*4096 = 8192. Can be 0 in which case it's still a
-    // valid stream, but just means the total sample count is unknown. Likely the case with streams like internet radio.
-    drflac_uint64 totalSampleCount;
-
-
-    // The container type. This is set based on whether or not the decoder was opened from a native or Ogg stream.
-    drflac_container container;
-
-
-    // The position of the seektable in the file.
-    drflac_uint64 seektablePos;
-
-    // The size of the seektable.
-    drflac_uint32 seektableSize;
-
-
-    // Information about the frame the decoder is currently sitting on.
-    drflac_frame currentFrame;
-
-    // The position of the first frame in the stream. This is only ever used for seeking.
-    drflac_uint64 firstFramePos;
-
-
-    // A hack to avoid a malloc() when opening a decoder with drflac_open_memory().
-    drflac__memory_stream memoryStream;
-
-
-    // A pointer to the decoded sample data. This is an offset of pExtraData.
-    drflac_int32* pDecodedSamples;
-
-    // Internal use only. Only used with Ogg containers. Points to a drflac_oggbs object. This is an offset of pExtraData.
-    void* _oggbs;
-
-    // The bit streamer. The raw FLAC data is fed through this object.
-    drflac_bs bs;
-
-    // Variable length extra data. We attach this to the end of the object so we can avoid unnecessary mallocs.
-    drflac_uint8 pExtraData[1];
-
-    //M.P: Preallocated scratch buffer used during decoding in order to save on stack usage
-    drflac_int32* scratchBuffer;
-} drflac;
-
-
-// Opens a FLAC decoder.
-//
-// onRead    [in]           The function to call when data needs to be read from the client.
-// onSeek    [in]           The function to call when the read position of the client data needs to move.
-// pUserData [in, optional] A pointer to application defined data that will be passed to onRead and onSeek.
-//
-// Returns a pointer to an object representing the decoder.
-//
-// Close the decoder with drflac_close().
-//
-// This function will automatically detect whether or not you are attempting to open a native or Ogg encapsulated
-// FLAC, both of which should work seamlessly without any manual intervention. Ogg encapsulation also works with
-// multiplexed streams which basically means it can play FLAC encoded audio tracks in videos.
-//
-// This is the lowest level function for opening a FLAC stream. You can also use drflac_open_file() and drflac_open_memory()
-// to open the stream from a file or from a block of memory respectively.
-//
-// The STREAMINFO block must be present for this to succeed. Use drflac_open_relaxed() to open a FLAC stream where
-// the header may not be present.
-//
-// See also: drflac_open_file(), drflac_open_memory(), drflac_open_with_metadata(), drflac_close()
-drflac* drflac_open(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData);
-
-// The same as drflac_open(), except attempts to open the stream even when a header block is not present.
-//
-// Because the header is not necessarily available, the caller must explicitly define the container (Native or Ogg). Do
-// not set this to drflac_container_unknown - that is for internal use only.
-//
-// Opening in relaxed mode will continue reading data from onRead until it finds a valid frame. If a frame is never
-// found it will continue forever. To abort, force your onRead callback to return 0, which dr_flac will use as an
-// indicator that the end of the stream was found.
-drflac* drflac_open_relaxed(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_container container, void* pUserData);
-
-// Opens a FLAC decoder and notifies the caller of the metadata chunks (album art, etc.).
-//
-// onRead    [in]           The function to call when data needs to be read from the client.
-// onSeek    [in]           The function to call when the read position of the client data needs to move.
-// onMeta    [in]           The function to call for every metadata block.
-// pUserData [in, optional] A pointer to application defined data that will be passed to onRead, onSeek and onMeta.
-//
-// Returns a pointer to an object representing the decoder.
-//
-// Close the decoder with drflac_close().
-//
-// This is slower than drflac_open(), so avoid this one if you don't need metadata. Internally, this will do a DRFLAC_MALLOC()
-// and DRFLAC_FREE() for every metadata block except for STREAMINFO and PADDING blocks.
-//
-// The caller is notified of the metadata via the onMeta callback. All metadata blocks will be handled before the function
-// returns.
-//
-// The STREAMINFO block must be present for this to succeed. Use drflac_open_with_metadata_relaxed() to open a FLAC
-// stream where the header may not be present.
-//
-// Note that this will behave inconsistently with drflac_open() if the stream is an Ogg encapsulated stream and a metadata
-// block is corrupted. This is due to the way the Ogg stream recovers from corrupted pages. When drflac_open_with_metadata()
-// is being used, the open routine will try to read the contents of the metadata block, whereas drflac_open() will simply
-// seek past it (for the sake of efficiency). This inconsistency can result in different samples being returned depending on
-// whether or not the stream is being opened with metadata.
-//
-// See also: drflac_open_file_with_metadata(), drflac_open_memory_with_metadata(), drflac_open(), drflac_close()
-drflac* drflac_open_with_metadata(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, void* pUserData);
-
-// The same as drflac_open_with_metadata(), except attemps to open the stream even when a header block is not present.
-//
-// See also: drflac_open_with_metadata(), drflac_open_relaxed()
-drflac* drflac_open_with_metadata_relaxed(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, drflac_container container, void* pUserData);
-
-// Closes the given FLAC decoder.
-//
-// pFlac [in] The decoder to close.
-//
-// This will destroy the decoder object.
-void drflac_close(drflac* pFlac);
-
-
-// Reads sample data from the given FLAC decoder, output as interleaved signed 32-bit PCM.
-//
-// pFlac         [in]            The decoder.
-// samplesToRead [in]            The number of samples to read.
-// pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
-//
-// Returns the number of samples actually read.
-//
-// pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of samples
-// seeked.
-drflac_uint64 drflac_read_s32(drflac* pFlac, drflac_uint64 samplesToRead, drflac_int32* pBufferOut);
-
-// Same as drflac_read_s32(), except outputs samples as 16-bit integer PCM rather than 32-bit.
-//
-// pFlac         [in]            The decoder.
-// samplesToRead [in]            The number of samples to read.
-// pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
-//
-// Returns the number of samples actually read.
-//
-// pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of samples
-// seeked.
-//
-// Note that this is lossy for streams where the bits per sample is larger than 16.
-drflac_uint64 drflac_read_s16(drflac* pFlac, drflac_uint64 samplesToRead, drflac_int16* pBufferOut);
-
-// Same as drflac_read_s32(), except outputs samples as 32-bit floating-point PCM.
-//
-// pFlac         [in]            The decoder.
-// samplesToRead [in]            The number of samples to read.
-// pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
-//
-// Returns the number of samples actually read.
-//
-// pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of samples
-// seeked.
-//
-// Note that this should be considered lossy due to the nature of floating point numbers not being able to exactly
-// represent every possible number.
-drflac_uint64 drflac_read_f32(drflac* pFlac, drflac_uint64 samplesToRead, float* pBufferOut);
-
-// Seeks to the sample at the given index.
-//
-// pFlac       [in] The decoder.
-// sampleIndex [in] The index of the sample to seek to. See notes below.
-//
-// Returns DRFLAC_TRUE if successful; DRFLAC_FALSE otherwise.
-//
-// The sample index is based on interleaving. In a stereo stream, for example, the sample at index 0 is the first sample
-// in the left channel; the sample at index 1 is the first sample on the right channel, and so on.
-//
-// When seeking, you will likely want to ensure it's rounded to a multiple of the channel count. You can do this with
-// something like drflac_seek_to_sample(pFlac, (mySampleIndex + (mySampleIndex % pFlac->channels)))
-drflac_bool32 drflac_seek_to_sample(drflac* pFlac, drflac_uint64 sampleIndex);
-
-
+            drflac_streaminfo streaminfo;
+
+            struct
+            {
+                int unused;
+            } padding;
+
+            struct
+            {
+                drflac_uint32 id;
+                const void *pData;
+                drflac_uint32 dataSize;
+            } application;
+
+            struct
+            {
+                drflac_uint32 seekpointCount;
+                const drflac_seekpoint *pSeekpoints;
+            } seektable;
+
+            struct
+            {
+                drflac_uint32 vendorLength;
+                const char *vendor;
+                drflac_uint32 commentCount;
+                const char *comments;
+            } vorbis_comment;
+
+            struct
+            {
+                char catalog[128];
+                drflac_uint64 leadInSampleCount;
+                drflac_bool32 isCD;
+                drflac_uint8 trackCount;
+                const drflac_uint8 *pTrackData;
+            } cuesheet;
+
+            struct
+            {
+                drflac_uint32 type;
+                drflac_uint32 mimeLength;
+                const char *mime;
+                drflac_uint32 descriptionLength;
+                const char *description;
+                drflac_uint32 width;
+                drflac_uint32 height;
+                drflac_uint32 colorDepth;
+                drflac_uint32 indexColorCount;
+                drflac_uint32 pictureDataSize;
+                const drflac_uint8 *pPictureData;
+            } picture;
+        } data;
+    } drflac_metadata;
+
+    // Callback for when data needs to be read from the client.
+    //
+    // pUserData   [in]  The user data that was passed to drflac_open() and family.
+    // pBufferOut  [out] The output buffer.
+    // bytesToRead [in]  The number of bytes to read.
+    //
+    // Returns the number of bytes actually read.
+    //
+    // A return value of less than bytesToRead indicates the end of the stream. Do _not_ return from this callback until
+    // either the entire bytesToRead is filled or you have reached the end of the stream.
+    typedef size_t (*drflac_read_proc)(void *pUserData, void *pBufferOut, size_t bytesToRead);
+
+    // Callback for when data needs to be seeked.
+    //
+    // pUserData [in] The user data that was passed to drflac_open() and family.
+    // offset    [in] The number of bytes to move, relative to the origin. Will never be negative.
+    // origin    [in] The origin of the seek - the current position or the start of the stream.
+    //
+    // Returns whether or not the seek was successful.
+    //
+    // The offset will never be negative. Whether or not it is relative to the beginning or current position is
+    // determined by the "origin" parameter which will be either drflac_seek_origin_start or drflac_seek_origin_current.
+    typedef drflac_bool32 (*drflac_seek_proc)(void *pUserData, int offset, drflac_seek_origin origin);
+
+    // Callback for when a metadata block is read.
+    //
+    // pUserData [in] The user data that was passed to drflac_open() and family.
+    // pMetadata [in] A pointer to a structure containing the data of the metadata block.
+    //
+    // Use pMetadata->type to determine which metadata block is being handled and how to read the data.
+    typedef void (*drflac_meta_proc)(void *pUserData, drflac_metadata *pMetadata);
+
+    // Structure for internal use. Only used for decoders opened with drflac_open_memory.
+    typedef struct
+    {
+        const drflac_uint8 *data;
+        size_t dataSize;
+        size_t currentReadPos;
+    } drflac__memory_stream;
+
+    // Structure for internal use. Used for bit streaming.
+    typedef struct
+    {
+        // The function to call when more data needs to be read.
+        drflac_read_proc onRead;
+
+        // The function to call when the current read position needs to be moved.
+        drflac_seek_proc onSeek;
+
+        // The user data to pass around to onRead and onSeek.
+        void *pUserData;
+
+        // The number of unaligned bytes in the L2 cache. This will always be 0 until the end of the stream is hit. At
+        // the end of the stream there will be a number of bytes that don't cleanly fit in an L1 cache line, so we use
+        // this variable to know whether or not the bistreamer needs to run on a slower path to read those last bytes.
+        // This will never be more than sizeof(drflac_cache_t).
+        size_t unalignedByteCount;
+
+        // The content of the unaligned bytes.
+        drflac_cache_t unalignedCache;
+
+        // The index of the next valid cache line in the "L2" cache.
+        drflac_uint32 nextL2Line;
+
+        // The number of bits that have been consumed by the cache. This is used to determine how many valid bits are
+        // remaining.
+        drflac_uint32 consumedBits;
+
+        // The cached data which was most recently read from the client. There are two levels of cache. Data flows as
+        // such: Client -> L2 -> L1. The L2 -> L1 movement is aligned and runs on a fast path in just a few
+        // instructions.
+        drflac_cache_t cacheL2[DR_FLAC_BUFFER_SIZE / sizeof(drflac_cache_t)];
+        drflac_cache_t cache;
+
+        // CRC-16. This is updated whenever bits are read from the bit stream. Manually set this to 0 to reset the CRC.
+        // For FLAC, this is reset to 0 at the beginning of each frame.
+        drflac_uint16 crc16;
+        drflac_cache_t
+            crc16Cache; // A cache for optimizing CRC calculations. This is filled when when the L1 cache is reloaded.
+        drflac_uint32
+            crc16CacheIgnoredBytes; // The number of bytes to ignore when updating the CRC-16 from the CRC-16 cache.
+    } drflac_bs;
+
+    typedef struct
+    {
+        // The type of the subframe: SUBFRAME_CONSTANT, SUBFRAME_VERBATIM, SUBFRAME_FIXED or SUBFRAME_LPC.
+        drflac_uint8 subframeType;
+
+        // The number of wasted bits per sample as specified by the sub-frame header.
+        drflac_uint8 wastedBitsPerSample;
+
+        // The order to use for the prediction stage for SUBFRAME_FIXED and SUBFRAME_LPC.
+        drflac_uint8 lpcOrder;
+
+        // The number of bits per sample for this subframe. This is not always equal to the current frame's bit per
+        // sample because an extra bit is required for side channels when interchannel decorrelation is being used.
+        drflac_uint32 bitsPerSample;
+
+        // A pointer to the buffer containing the decoded samples in the subframe. This pointer is an offset from
+        // drflac::pExtraData. Note that it's a signed 32-bit integer for each value.
+        drflac_int32 *pDecodedSamples;
+    } drflac_subframe;
+
+    typedef struct
+    {
+        // If the stream uses variable block sizes, this will be set to the index of the first sample. If fixed block
+        // sizes are used, this will always be set to 0.
+        drflac_uint64 sampleNumber;
+
+        // If the stream uses fixed block sizes, this will be set to the frame number. If variable block sizes are used,
+        // this will always be 0.
+        drflac_uint32 frameNumber;
+
+        // The sample rate of this frame.
+        drflac_uint32 sampleRate;
+
+        // The number of samples in each sub-frame within this frame.
+        drflac_uint16 blockSize;
+
+        // The channel assignment of this frame. This is not always set to the channel count. If interchannel
+        // decorrelation is being used this will be set to DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE,
+        // DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE or DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE.
+        drflac_uint8 channelAssignment;
+
+        // The number of bits per sample within this frame.
+        drflac_uint8 bitsPerSample;
+
+        // The frame's CRC.
+        drflac_uint8 crc8;
+    } drflac_frame_header;
+
+    typedef struct
+    {
+        // The header.
+        drflac_frame_header header;
+
+        // The number of samples left to be read in this frame. This is initially set to the block size multiplied by
+        // the channel count. As samples are read, this will be decremented. When it reaches 0, the decoder will see
+        // this frame as fully consumed and load the next frame.
+        drflac_uint32 samplesRemaining;
+
+        // The list of sub-frames within the frame. There is one sub-frame for each channel, and there's a maximum of 8
+        // channels.
+        drflac_subframe subframes[8];
+    } drflac_frame;
+
+    typedef struct
+    {
+        // The function to call when a metadata block is read.
+        drflac_meta_proc onMeta;
+
+        // The user data posted to the metadata callback function.
+        void *pUserDataMD;
+
+        // The sample rate. Will be set to something like 44100.
+        drflac_uint32 sampleRate;
+
+        // The number of channels. This will be set to 1 for monaural streams, 2 for stereo, etc. Maximum 8. This is set
+        // based on the value specified in the STREAMINFO block.
+        drflac_uint8 channels;
+
+        // The bits per sample. Will be set to somthing like 16, 24, etc.
+        drflac_uint8 bitsPerSample;
+
+        // The maximum block size, in samples. This number represents the number of samples in each channel (not
+        // combined).
+        drflac_uint16 maxBlockSize;
+
+        // The total number of samples making up the stream. This includes every channel. For example, if the stream has
+        // 2 channels, with each channel having a total of 4096, this value will be set to 2*4096 = 8192. Can be 0 in
+        // which case it's still a valid stream, but just means the total sample count is unknown. Likely the case with
+        // streams like internet radio.
+        drflac_uint64 totalSampleCount;
+
+        // The container type. This is set based on whether or not the decoder was opened from a native or Ogg stream.
+        drflac_container container;
+
+        // The position of the seektable in the file.
+        drflac_uint64 seektablePos;
+
+        // The size of the seektable.
+        drflac_uint32 seektableSize;
+
+        // Information about the frame the decoder is currently sitting on.
+        drflac_frame currentFrame;
+
+        // The position of the first frame in the stream. This is only ever used for seeking.
+        drflac_uint64 firstFramePos;
+
+        // A hack to avoid a malloc() when opening a decoder with drflac_open_memory().
+        drflac__memory_stream memoryStream;
+
+        // A pointer to the decoded sample data. This is an offset of pExtraData.
+        drflac_int32 *pDecodedSamples;
+
+        // Internal use only. Only used with Ogg containers. Points to a drflac_oggbs object. This is an offset of
+        // pExtraData.
+        void *_oggbs;
+
+        // The bit streamer. The raw FLAC data is fed through this object.
+        drflac_bs bs;
+
+        // Variable length extra data. We attach this to the end of the object so we can avoid unnecessary mallocs.
+        drflac_uint8 pExtraData[1];
+
+        // M.P: Preallocated scratch buffer used during decoding in order to save on stack usage
+        drflac_int32 *scratchBuffer;
+    } drflac;
+
+    // Opens a FLAC decoder.
+    //
+    // onRead    [in]           The function to call when data needs to be read from the client.
+    // onSeek    [in]           The function to call when the read position of the client data needs to move.
+    // pUserData [in, optional] A pointer to application defined data that will be passed to onRead and onSeek.
+    //
+    // Returns a pointer to an object representing the decoder.
+    //
+    // Close the decoder with drflac_close().
+    //
+    // This function will automatically detect whether or not you are attempting to open a native or Ogg encapsulated
+    // FLAC, both of which should work seamlessly without any manual intervention. Ogg encapsulation also works with
+    // multiplexed streams which basically means it can play FLAC encoded audio tracks in videos.
+    //
+    // This is the lowest level function for opening a FLAC stream. You can also use drflac_open_file() and
+    // drflac_open_memory() to open the stream from a file or from a block of memory respectively.
+    //
+    // The STREAMINFO block must be present for this to succeed. Use drflac_open_relaxed() to open a FLAC stream where
+    // the header may not be present.
+    //
+    // See also: drflac_open_file(), drflac_open_memory(), drflac_open_with_metadata(), drflac_close()
+    drflac *drflac_open(drflac_read_proc onRead, drflac_seek_proc onSeek, void *pUserData);
+
+    // The same as drflac_open(), except attempts to open the stream even when a header block is not present.
+    //
+    // Because the header is not necessarily available, the caller must explicitly define the container (Native or Ogg).
+    // Do not set this to drflac_container_unknown - that is for internal use only.
+    //
+    // Opening in relaxed mode will continue reading data from onRead until it finds a valid frame. If a frame is never
+    // found it will continue forever. To abort, force your onRead callback to return 0, which dr_flac will use as an
+    // indicator that the end of the stream was found.
+    drflac *drflac_open_relaxed(drflac_read_proc onRead,
+                                drflac_seek_proc onSeek,
+                                drflac_container container,
+                                void *pUserData);
+
+    // Opens a FLAC decoder and notifies the caller of the metadata chunks (album art, etc.).
+    //
+    // onRead    [in]           The function to call when data needs to be read from the client.
+    // onSeek    [in]           The function to call when the read position of the client data needs to move.
+    // onMeta    [in]           The function to call for every metadata block.
+    // pUserData [in, optional] A pointer to application defined data that will be passed to onRead, onSeek and onMeta.
+    //
+    // Returns a pointer to an object representing the decoder.
+    //
+    // Close the decoder with drflac_close().
+    //
+    // This is slower than drflac_open(), so avoid this one if you don't need metadata. Internally, this will do a
+    // DRFLAC_MALLOC() and DRFLAC_FREE() for every metadata block except for STREAMINFO and PADDING blocks.
+    //
+    // The caller is notified of the metadata via the onMeta callback. All metadata blocks will be handled before the
+    // function returns.
+    //
+    // The STREAMINFO block must be present for this to succeed. Use drflac_open_with_metadata_relaxed() to open a FLAC
+    // stream where the header may not be present.
+    //
+    // Note that this will behave inconsistently with drflac_open() if the stream is an Ogg encapsulated stream and a
+    // metadata block is corrupted. This is due to the way the Ogg stream recovers from corrupted pages. When
+    // drflac_open_with_metadata() is being used, the open routine will try to read the contents of the metadata block,
+    // whereas drflac_open() will simply seek past it (for the sake of efficiency). This inconsistency can result in
+    // different samples being returned depending on whether or not the stream is being opened with metadata.
+    //
+    // See also: drflac_open_file_with_metadata(), drflac_open_memory_with_metadata(), drflac_open(), drflac_close()
+    drflac *drflac_open_with_metadata(drflac_read_proc onRead,
+                                      drflac_seek_proc onSeek,
+                                      drflac_meta_proc onMeta,
+                                      void *pUserData);
+
+    // The same as drflac_open_with_metadata(), except attemps to open the stream even when a header block is not
+    // present.
+    //
+    // See also: drflac_open_with_metadata(), drflac_open_relaxed()
+    drflac *drflac_open_with_metadata_relaxed(drflac_read_proc onRead,
+                                              drflac_seek_proc onSeek,
+                                              drflac_meta_proc onMeta,
+                                              drflac_container container,
+                                              void *pUserData);
+
+    // Closes the given FLAC decoder.
+    //
+    // pFlac [in] The decoder to close.
+    //
+    // This will destroy the decoder object.
+    void drflac_close(drflac *pFlac);
+
+    // Reads sample data from the given FLAC decoder, output as interleaved signed 32-bit PCM.
+    //
+    // pFlac         [in]            The decoder.
+    // samplesToRead [in]            The number of samples to read.
+    // pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
+    //
+    // Returns the number of samples actually read.
+    //
+    // pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of
+    // samples seeked.
+    drflac_uint64 drflac_read_s32(drflac *pFlac, drflac_uint64 samplesToRead, drflac_int32 *pBufferOut);
+
+    // Same as drflac_read_s32(), except outputs samples as 16-bit integer PCM rather than 32-bit.
+    //
+    // pFlac         [in]            The decoder.
+    // samplesToRead [in]            The number of samples to read.
+    // pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
+    //
+    // Returns the number of samples actually read.
+    //
+    // pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of
+    // samples seeked.
+    //
+    // Note that this is lossy for streams where the bits per sample is larger than 16.
+    drflac_uint64 drflac_read_s16(drflac *pFlac, drflac_uint64 samplesToRead, drflac_int16 *pBufferOut);
+
+    // Same as drflac_read_s32(), except outputs samples as 32-bit floating-point PCM.
+    //
+    // pFlac         [in]            The decoder.
+    // samplesToRead [in]            The number of samples to read.
+    // pBufferOut    [out, optional] A pointer to the buffer that will receive the decoded samples.
+    //
+    // Returns the number of samples actually read.
+    //
+    // pBufferOut can be null, in which case the call will act as a seek, and the return value will be the number of
+    // samples seeked.
+    //
+    // Note that this should be considered lossy due to the nature of floating point numbers not being able to exactly
+    // represent every possible number.
+    drflac_uint64 drflac_read_f32(drflac *pFlac, drflac_uint64 samplesToRead, float *pBufferOut);
+
+    // Seeks to the sample at the given index.
+    //
+    // pFlac       [in] The decoder.
+    // sampleIndex [in] The index of the sample to seek to. See notes below.
+    //
+    // Returns DRFLAC_TRUE if successful; DRFLAC_FALSE otherwise.
+    //
+    // The sample index is based on interleaving. In a stereo stream, for example, the sample at index 0 is the first
+    // sample in the left channel; the sample at index 1 is the first sample on the right channel, and so on.
+    //
+    // When seeking, you will likely want to ensure it's rounded to a multiple of the channel count. You can do this
+    // with something like drflac_seek_to_sample(pFlac, (mySampleIndex + (mySampleIndex % pFlac->channels)))
+    drflac_bool32 drflac_seek_to_sample(drflac *pFlac, drflac_uint64 sampleIndex);
 
 #ifndef DR_FLAC_NO_STDIO
-// Opens a FLAC decoder from the file at the given path.
-//
-// filename [in] The path of the file to open, either absolute or relative to the current directory.
-//
-// Returns a pointer to an object representing the decoder.
-//
-// Close the decoder with drflac_close().
-//
-// This will hold a handle to the file until the decoder is closed with drflac_close(). Some platforms will restrict the
-// number of files a process can have open at any given time, so keep this mind if you have many decoders open at the
-// same time.
-//
-// See also: drflac_open(), drflac_open_file_with_metadata(), drflac_close()
-drflac* drflac_open_file(const char* filename);
+    // Opens a FLAC decoder from the file at the given path.
+    //
+    // filename [in] The path of the file to open, either absolute or relative to the current directory.
+    //
+    // Returns a pointer to an object representing the decoder.
+    //
+    // Close the decoder with drflac_close().
+    //
+    // This will hold a handle to the file until the decoder is closed with drflac_close(). Some platforms will restrict
+    // the number of files a process can have open at any given time, so keep this mind if you have many decoders open
+    // at the same time.
+    //
+    // See also: drflac_open(), drflac_open_file_with_metadata(), drflac_close()
+    drflac *drflac_open_file(const char *filename);
 
-// Opens a FLAC decoder from the file at the given path and notifies the caller of the metadata chunks (album art, etc.)
-//
-// Look at the documentation for drflac_open_with_metadata() for more information on how metadata is handled.
-drflac* drflac_open_file_with_metadata(const char* filename, drflac_meta_proc onMeta, void* pUserData);
+    // Opens a FLAC decoder from the file at the given path and notifies the caller of the metadata chunks (album art,
+    // etc.)
+    //
+    // Look at the documentation for drflac_open_with_metadata() for more information on how metadata is handled.
+    drflac *drflac_open_file_with_metadata(const char *filename, drflac_meta_proc onMeta, void *pUserData);
 #endif
 
-// Opens a FLAC decoder from a pre-allocated block of memory
-//
-// This does not create a copy of the data. It is up to the application to ensure the buffer remains valid for
-// the lifetime of the decoder.
-drflac* drflac_open_memory(const void* data, size_t dataSize);
+    // Opens a FLAC decoder from a pre-allocated block of memory
+    //
+    // This does not create a copy of the data. It is up to the application to ensure the buffer remains valid for
+    // the lifetime of the decoder.
+    drflac *drflac_open_memory(const void *data, size_t dataSize);
 
-// Opens a FLAC decoder from a pre-allocated block of memory and notifies the caller of the metadata chunks (album art, etc.)
-//
-// Look at the documentation for drflac_open_with_metadata() for more information on how metadata is handled.
-drflac* drflac_open_memory_with_metadata(const void* data, size_t dataSize, drflac_meta_proc onMeta, void* pUserData);
+    // Opens a FLAC decoder from a pre-allocated block of memory and notifies the caller of the metadata chunks (album
+    // art, etc.)
+    //
+    // Look at the documentation for drflac_open_with_metadata() for more information on how metadata is handled.
+    drflac *drflac_open_memory_with_metadata(const void *data,
+                                             size_t dataSize,
+                                             drflac_meta_proc onMeta,
+                                             void *pUserData);
 
+    //// High Level APIs ////
 
+    // Opens a FLAC stream from the given callbacks and fully decodes it in a single operation. The return value is a
+    // pointer to the sample data as interleaved signed 32-bit PCM. The returned data must be freed with DRFLAC_FREE().
+    //
+    // Sometimes a FLAC file won't keep track of the total sample count. In this situation the function will
+    // continuously read samples into a dynamically sized buffer on the heap until no samples are left.
+    //
+    // Do not call this function on a broadcast type of stream (like internet radio streams and whatnot).
+    drflac_int32 *drflac_open_and_decode_s32(drflac_read_proc onRead,
+                                             drflac_seek_proc onSeek,
+                                             void *pUserData,
+                                             unsigned int *channels,
+                                             unsigned int *sampleRate,
+                                             drflac_uint64 *totalSampleCount);
 
-//// High Level APIs ////
+    // Same as drflac_open_and_decode_s32(), except returns signed 16-bit integer samples.
+    drflac_int16 *drflac_open_and_decode_s16(drflac_read_proc onRead,
+                                             drflac_seek_proc onSeek,
+                                             void *pUserData,
+                                             unsigned int *channels,
+                                             unsigned int *sampleRate,
+                                             drflac_uint64 *totalSampleCount);
 
-// Opens a FLAC stream from the given callbacks and fully decodes it in a single operation. The return value is a
-// pointer to the sample data as interleaved signed 32-bit PCM. The returned data must be freed with DRFLAC_FREE().
-//
-// Sometimes a FLAC file won't keep track of the total sample count. In this situation the function will continuously
-// read samples into a dynamically sized buffer on the heap until no samples are left.
-//
-// Do not call this function on a broadcast type of stream (like internet radio streams and whatnot).
-drflac_int32* drflac_open_and_decode_s32(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
-
-// Same as drflac_open_and_decode_s32(), except returns signed 16-bit integer samples.
-drflac_int16* drflac_open_and_decode_s16(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
-
-// Same as drflac_open_and_decode_s32(), except returns 32-bit floating-point samples.
-float* drflac_open_and_decode_f32(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_s32(), except returns 32-bit floating-point samples.
+    float *drflac_open_and_decode_f32(drflac_read_proc onRead,
+                                      drflac_seek_proc onSeek,
+                                      void *pUserData,
+                                      unsigned int *channels,
+                                      unsigned int *sampleRate,
+                                      drflac_uint64 *totalSampleCount);
 
 #ifndef DR_FLAC_NO_STDIO
-// Same as drflac_open_and_decode_s32() except opens the decoder from a file.
-drflac_int32* drflac_open_and_decode_file_s32(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_s32() except opens the decoder from a file.
+    drflac_int32 *drflac_open_and_decode_file_s32(const char *filename,
+                                                  unsigned int *channels,
+                                                  unsigned int *sampleRate,
+                                                  drflac_uint64 *totalSampleCount);
 
-// Same as drflac_open_and_decode_file_s32(), except returns signed 16-bit integer samples.
-drflac_int16* drflac_open_and_decode_file_s16(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_file_s32(), except returns signed 16-bit integer samples.
+    drflac_int16 *drflac_open_and_decode_file_s16(const char *filename,
+                                                  unsigned int *channels,
+                                                  unsigned int *sampleRate,
+                                                  drflac_uint64 *totalSampleCount);
 
-// Same as drflac_open_and_decode_file_f32(), except returns 32-bit floating-point samples.
-float* drflac_open_and_decode_file_f32(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_file_f32(), except returns 32-bit floating-point samples.
+    float *drflac_open_and_decode_file_f32(const char *filename,
+                                           unsigned int *channels,
+                                           unsigned int *sampleRate,
+                                           drflac_uint64 *totalSampleCount);
 #endif
 
-// Same as drflac_open_and_decode_s32() except opens the decoder from a block of memory.
-drflac_int32* drflac_open_and_decode_memory_s32(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_s32() except opens the decoder from a block of memory.
+    drflac_int32 *drflac_open_and_decode_memory_s32(const void *data,
+                                                    size_t dataSize,
+                                                    unsigned int *channels,
+                                                    unsigned int *sampleRate,
+                                                    drflac_uint64 *totalSampleCount);
 
-// Same as drflac_open_and_decode_memory_s32(), except returns signed 16-bit integer samples.
-drflac_int16* drflac_open_and_decode_memory_s16(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_memory_s32(), except returns signed 16-bit integer samples.
+    drflac_int16 *drflac_open_and_decode_memory_s16(const void *data,
+                                                    size_t dataSize,
+                                                    unsigned int *channels,
+                                                    unsigned int *sampleRate,
+                                                    drflac_uint64 *totalSampleCount);
 
-// Same as drflac_open_and_decode_memory_s32(), except returns 32-bit floating-point samples.
-float* drflac_open_and_decode_memory_f32(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount);
+    // Same as drflac_open_and_decode_memory_s32(), except returns 32-bit floating-point samples.
+    float *drflac_open_and_decode_memory_f32(const void *data,
+                                             size_t dataSize,
+                                             unsigned int *channels,
+                                             unsigned int *sampleRate,
+                                             drflac_uint64 *totalSampleCount);
 
-// Frees memory that was allocated internally by dr_flac.
-void drflac_free(void* p);
+    // Frees memory that was allocated internally by dr_flac.
+    void drflac_free(void *p);
 
+    // Structure representing an iterator for vorbis comments in a VORBIS_COMMENT metadata block.
+    typedef struct
+    {
+        drflac_uint32 countRemaining;
+        const char *pRunningData;
+    } drflac_vorbis_comment_iterator;
 
-// Structure representing an iterator for vorbis comments in a VORBIS_COMMENT metadata block.
-typedef struct
-{
-    drflac_uint32 countRemaining;
-    const char* pRunningData;
-} drflac_vorbis_comment_iterator;
-
-// Initializes a vorbis comment iterator. This can be used for iterating over the vorbis comments in a VORBIS_COMMENT
-// metadata block.
-void drflac_init_vorbis_comment_iterator(drflac_vorbis_comment_iterator* pIter, drflac_uint32 commentCount, const char* pComments);
-
-// Goes to the next vorbis comment in the given iterator. If null is returned it means there are no more comments. The
-// returned string is NOT null terminated.
-const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, drflac_uint32* pCommentLengthOut);
-
+    // Initializes a vorbis comment iterator. This can be used for iterating over the vorbis comments in a
+    // VORBIS_COMMENT metadata block.
+    void drflac_init_vorbis_comment_iterator(drflac_vorbis_comment_iterator *pIter,
+                                             drflac_uint32 commentCount,
+                                             const char *pComments);
 
+    // Goes to the next vorbis comment in the given iterator. If null is returned it means there are no more comments.
+    // The returned string is NOT null terminated.
+    const char *drflac_next_vorbis_comment(drflac_vorbis_comment_iterator *pIter, drflac_uint32 *pCommentLengthOut);
 
 #ifdef __cplusplus
 }
 #endif
-#endif  //dr_flac_h
-
+#endif // dr_flac_h
 
 ///////////////////////////////////////////////////////////////////////////////
 //
@@ -767,43 +820,37 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 
 // Compile-time CPU feature support.
 #if !defined(DR_FLAC_NO_SIMD) && (defined(DRFLAC_X86) || defined(DRFLAC_X64))
-    #ifdef _MSC_VER
-        #if _MSC_VER >= 1400
-            #include <intrin.h>
-            static void drflac__cpuid(int info[4], int fid)
-            {
-                __cpuid(info, fid);
-            }
-        #else
-        #define DRFLAC_NO_CPUID
-        #endif
-    #else
-        #if defined(__GNUC__) || defined(__clang__)
-            static void drflac__cpuid(int info[4], int fid)
-            {
-                asm (
-                    "movl %[fid], %%eax\n\t"
-                    "cpuid\n\t"
-                    "movl %%eax, %[info0]\n\t"
-                    "movl %%ebx, %[info1]\n\t"
-                    "movl %%ecx, %[info2]\n\t"
-                    "movl %%edx, %[info3]\n\t"
-                    : [info0] "=rm"(info[0]),
-                      [info1] "=rm"(info[1]),
-                      [info2] "=rm"(info[2]),
-                      [info3] "=rm"(info[3])
-                    : [fid] "rm"(fid)
-                    : "eax", "ebx", "ecx", "edx"
-                );
-            }
-        #else
-        #define DRFLAC_NO_CPUID
-        #endif
-    #endif
+#ifdef _MSC_VER
+#if _MSC_VER >= 1400
+#include <intrin.h>
+static void drflac__cpuid(int info[4], int fid)
+{
+    __cpuid(info, fid);
+}
+#else
+#define DRFLAC_NO_CPUID
+#endif
+#else
+#if defined(__GNUC__) || defined(__clang__)
+static void drflac__cpuid(int info[4], int fid)
+{
+    asm("movl %[fid], %%eax\n\t"
+        "cpuid\n\t"
+        "movl %%eax, %[info0]\n\t"
+        "movl %%ebx, %[info1]\n\t"
+        "movl %%ecx, %[info2]\n\t"
+        "movl %%edx, %[info3]\n\t"
+        : [ info0 ] "=rm"(info[0]), [ info1 ] "=rm"(info[1]), [ info2 ] "=rm"(info[2]), [ info3 ] "=rm"(info[3])
+        : [ fid ] "rm"(fid)
+        : "eax", "ebx", "ecx", "edx");
+}
+#else
+#define DRFLAC_NO_CPUID
+#endif
+#endif
 #else
 #define DRFLAC_NO_CPUID
 #endif
-
 
 #ifdef __linux__
 #define _BSD_SOURCE
@@ -815,9 +862,9 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 #elif (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 7)))
 #define DRFLAC_HAS_LZCNT_INTRINSIC
 #elif defined(__clang__)
-    #if __has_builtin(__builtin_clzll) || __has_builtin(__builtin_clzl)
-    #define DRFLAC_HAS_LZCNT_INTRINSIC
-    #endif
+#if __has_builtin(__builtin_clzll) || __has_builtin(__builtin_clzl)
+#define DRFLAC_HAS_LZCNT_INTRINSIC
+#endif
 #endif
 
 #if defined(_MSC_VER) && _MSC_VER >= 1300
@@ -825,34 +872,33 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 #elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))
 #define DRFLAC_HAS_BYTESWAP_INTRINSIC
 #elif defined(__clang__)
-    #if __has_builtin(__builtin_bswap16) && __has_builtin(__builtin_bswap32) && __has_builtin(__builtin_bswap64)
-    #define DRFLAC_HAS_BYTESWAP_INTRINSIC
-    #endif
+#if __has_builtin(__builtin_bswap16) && __has_builtin(__builtin_bswap32) && __has_builtin(__builtin_bswap64)
+#define DRFLAC_HAS_BYTESWAP_INTRINSIC
+#endif
 #endif
-
 
 // Standard library stuff.
 #ifndef DRFLAC_ASSERT
 #include <assert.h>
-#define DRFLAC_ASSERT(expression)           assert(expression)
+#define DRFLAC_ASSERT(expression) assert(expression)
 #endif
 #ifndef DRFLAC_MALLOC
-#define DRFLAC_MALLOC(sz)                   malloc((sz))
+#define DRFLAC_MALLOC(sz) malloc((sz))
 #endif
 #ifndef DRFLAC_REALLOC
-#define DRFLAC_REALLOC(p, sz)               realloc((p), (sz))
+#define DRFLAC_REALLOC(p, sz) realloc((p), (sz))
 #endif
 #ifndef DRFLAC_FREE
-#define DRFLAC_FREE(p)                      free((p))
+#define DRFLAC_FREE(p) free((p))
 #endif
 #ifndef DRFLAC_COPY_MEMORY
-#define DRFLAC_COPY_MEMORY(dst, src, sz)    memcpy((dst), (src), (sz))
+#define DRFLAC_COPY_MEMORY(dst, src, sz) memcpy((dst), (src), (sz))
 #endif
 #ifndef DRFLAC_ZERO_MEMORY
-#define DRFLAC_ZERO_MEMORY(p, sz)           memset((p), 0, (sz))
+#define DRFLAC_ZERO_MEMORY(p, sz) memset((p), 0, (sz))
 #endif
 
-#define DRFLAC_MAX_SIMD_VECTOR_SIZE                     64  // 64 for AVX-512 in the future.
+#define DRFLAC_MAX_SIMD_VECTOR_SIZE 64 // 64 for AVX-512 in the future.
 
 #ifdef _MSC_VER
 #define DRFLAC_INLINE __forceinline
@@ -865,32 +911,30 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 #endif
 
 typedef drflac_int32 drflac_result;
-#define DRFLAC_SUCCESS                                  0
-#define DRFLAC_ERROR                                    -1  // A generic error.
-#define DRFLAC_INVALID_ARGS                             -2
-#define DRFLAC_END_OF_STREAM                            -128
-#define DRFLAC_CRC_MISMATCH                             -129
+#define DRFLAC_SUCCESS       0
+#define DRFLAC_ERROR         -1 // A generic error.
+#define DRFLAC_INVALID_ARGS  -2
+#define DRFLAC_END_OF_STREAM -128
+#define DRFLAC_CRC_MISMATCH  -129
 
-#define DRFLAC_SUBFRAME_CONSTANT                        0
-#define DRFLAC_SUBFRAME_VERBATIM                        1
-#define DRFLAC_SUBFRAME_FIXED                           8
-#define DRFLAC_SUBFRAME_LPC                             32
-#define DRFLAC_SUBFRAME_RESERVED                        255
+#define DRFLAC_SUBFRAME_CONSTANT 0
+#define DRFLAC_SUBFRAME_VERBATIM 1
+#define DRFLAC_SUBFRAME_FIXED    8
+#define DRFLAC_SUBFRAME_LPC      32
+#define DRFLAC_SUBFRAME_RESERVED 255
 
 #define DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE  0
 #define DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2 1
 
-#define DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT           0
-#define DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE             8
-#define DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE            9
-#define DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE              10
-
-
-#define drflac_align(x, a)                              ((((x) + (a) - 1) / (a)) * (a))
-#define drflac_assert                                   DRFLAC_ASSERT
-#define drflac_copy_memory                              DRFLAC_COPY_MEMORY
-#define drflac_zero_memory                              DRFLAC_ZERO_MEMORY
+#define DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT 0
+#define DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE   8
+#define DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE  9
+#define DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE    10
 
+#define drflac_align(x, a) ((((x) + (a)-1) / (a)) * (a))
+#define drflac_assert      DRFLAC_ASSERT
+#define drflac_copy_memory DRFLAC_COPY_MEMORY
+#define drflac_zero_memory DRFLAC_ZERO_MEMORY
 
 // CPU caps.
 static drflac_bool32 drflac__gIsLZCNTSupported = DRFLAC_FALSE;
@@ -902,7 +946,7 @@ static void drflac__init_cpu_caps()
 
     // LZCNT
     drflac__cpuid(info, 0x80000001);
-    drflac__gIsLZCNTSupported = (info[2] & (1 <<  5)) != 0;
+    drflac__gIsLZCNTSupported = (info[2] & (1 << 5)) != 0;
 
     // SSE4.2
     drflac__cpuid(info, 1);
@@ -910,7 +954,6 @@ static void drflac__init_cpu_caps()
 }
 #endif
 
-
 //// Endian Management ////
 static DRFLAC_INLINE drflac_bool32 drflac__is_little_endian()
 {
@@ -918,67 +961,58 @@ static DRFLAC_INLINE drflac_bool32 drflac__is_little_endian()
     return DRFLAC_TRUE;
 #else
     int n = 1;
-    return (*(char*)&n) == 1;
+    return (*(char *)&n) == 1;
 #endif
 }
 
 static DRFLAC_INLINE drflac_uint16 drflac__swap_endian_uint16(drflac_uint16 n)
 {
 #ifdef DRFLAC_HAS_BYTESWAP_INTRINSIC
-    #if defined(_MSC_VER)
-        return _byteswap_ushort(n);
-    #elif defined(__GNUC__) || defined(__clang__)
-        return __builtin_bswap16(n);
-    #else
-        #error "This compiler does not support the byte swap intrinsic."
-    #endif
+#if defined(_MSC_VER)
+    return _byteswap_ushort(n);
+#elif defined(__GNUC__) || defined(__clang__)
+    return __builtin_bswap16(n);
 #else
-    return ((n & 0xFF00) >> 8) |
-           ((n & 0x00FF) << 8);
+#error "This compiler does not support the byte swap intrinsic."
+#endif
+#else
+    return ((n & 0xFF00) >> 8) | ((n & 0x00FF) << 8);
 #endif
 }
 
 static DRFLAC_INLINE drflac_uint32 drflac__swap_endian_uint32(drflac_uint32 n)
 {
 #ifdef DRFLAC_HAS_BYTESWAP_INTRINSIC
-    #if defined(_MSC_VER)
-        return _byteswap_ulong(n);
-    #elif defined(__GNUC__) || defined(__clang__)
-        return __builtin_bswap32(n);
-    #else
-        #error "This compiler does not support the byte swap intrinsic."
-    #endif
+#if defined(_MSC_VER)
+    return _byteswap_ulong(n);
+#elif defined(__GNUC__) || defined(__clang__)
+    return __builtin_bswap32(n);
 #else
-    return ((n & 0xFF000000) >> 24) |
-           ((n & 0x00FF0000) >>  8) |
-           ((n & 0x0000FF00) <<  8) |
-           ((n & 0x000000FF) << 24);
+#error "This compiler does not support the byte swap intrinsic."
+#endif
+#else
+    return ((n & 0xFF000000) >> 24) | ((n & 0x00FF0000) >> 8) | ((n & 0x0000FF00) << 8) | ((n & 0x000000FF) << 24);
 #endif
 }
 
 static DRFLAC_INLINE drflac_uint64 drflac__swap_endian_uint64(drflac_uint64 n)
 {
 #ifdef DRFLAC_HAS_BYTESWAP_INTRINSIC
-    #if defined(_MSC_VER)
-        return _byteswap_uint64(n);
-    #elif defined(__GNUC__) || defined(__clang__)
-        return __builtin_bswap64(n);
-    #else
-        #error "This compiler does not support the byte swap intrinsic."
-    #endif
+#if defined(_MSC_VER)
+    return _byteswap_uint64(n);
+#elif defined(__GNUC__) || defined(__clang__)
+    return __builtin_bswap64(n);
 #else
-    return ((n & (drflac_uint64)0xFF00000000000000) >> 56) |
-           ((n & (drflac_uint64)0x00FF000000000000) >> 40) |
-           ((n & (drflac_uint64)0x0000FF0000000000) >> 24) |
-           ((n & (drflac_uint64)0x000000FF00000000) >>  8) |
-           ((n & (drflac_uint64)0x00000000FF000000) <<  8) |
-           ((n & (drflac_uint64)0x0000000000FF0000) << 24) |
-           ((n & (drflac_uint64)0x000000000000FF00) << 40) |
-           ((n & (drflac_uint64)0x00000000000000FF) << 56);
+#error "This compiler does not support the byte swap intrinsic."
+#endif
+#else
+    return ((n & (drflac_uint64)0xFF00000000000000) >> 56) | ((n & (drflac_uint64)0x00FF000000000000) >> 40) |
+           ((n & (drflac_uint64)0x0000FF0000000000) >> 24) | ((n & (drflac_uint64)0x000000FF00000000) >> 8) |
+           ((n & (drflac_uint64)0x00000000FF000000) << 8) | ((n & (drflac_uint64)0x0000000000FF0000) << 24) |
+           ((n & (drflac_uint64)0x000000000000FF00) << 40) | ((n & (drflac_uint64)0x00000000000000FF) << 56);
 #endif
 }
 
-
 static DRFLAC_INLINE drflac_uint16 drflac__be2host_16(drflac_uint16 n)
 {
 #ifdef __linux__
@@ -1018,7 +1052,6 @@ static DRFLAC_INLINE drflac_uint64 drflac__be2host_64(drflac_uint64 n)
 #endif
 }
 
-
 static DRFLAC_INLINE drflac_uint32 drflac__le2host_32(drflac_uint32 n)
 {
 #ifdef __linux__
@@ -1032,7 +1065,6 @@ static DRFLAC_INLINE drflac_uint32 drflac__le2host_32(drflac_uint32 n)
 #endif
 }
 
-
 static DRFLAC_INLINE drflac_uint32 drflac__unsynchsafe_32(drflac_uint32 n)
 {
     drflac_uint32 result = 0;
@@ -1044,62 +1076,43 @@ static DRFLAC_INLINE drflac_uint32 drflac__unsynchsafe_32(drflac_uint32 n)
     return result;
 }
 
-
-
 // The CRC code below is based on this document: http://zlib.net/crc_v3.txt
 static drflac_uint8 drflac__crc8_table[] = {
-    0x00, 0x07, 0x0E, 0x09, 0x1C, 0x1B, 0x12, 0x15, 0x38, 0x3F, 0x36, 0x31, 0x24, 0x23, 0x2A, 0x2D,
-    0x70, 0x77, 0x7E, 0x79, 0x6C, 0x6B, 0x62, 0x65, 0x48, 0x4F, 0x46, 0x41, 0x54, 0x53, 0x5A, 0x5D,
-    0xE0, 0xE7, 0xEE, 0xE9, 0xFC, 0xFB, 0xF2, 0xF5, 0xD8, 0xDF, 0xD6, 0xD1, 0xC4, 0xC3, 0xCA, 0xCD,
-    0x90, 0x97, 0x9E, 0x99, 0x8C, 0x8B, 0x82, 0x85, 0xA8, 0xAF, 0xA6, 0xA1, 0xB4, 0xB3, 0xBA, 0xBD,
-    0xC7, 0xC0, 0xC9, 0xCE, 0xDB, 0xDC, 0xD5, 0xD2, 0xFF, 0xF8, 0xF1, 0xF6, 0xE3, 0xE4, 0xED, 0xEA,
-    0xB7, 0xB0, 0xB9, 0xBE, 0xAB, 0xAC, 0xA5, 0xA2, 0x8F, 0x88, 0x81, 0x86, 0x93, 0x94, 0x9D, 0x9A,
-    0x27, 0x20, 0x29, 0x2E, 0x3B, 0x3C, 0x35, 0x32, 0x1F, 0x18, 0x11, 0x16, 0x03, 0x04, 0x0D, 0x0A,
-    0x57, 0x50, 0x59, 0x5E, 0x4B, 0x4C, 0x45, 0x42, 0x6F, 0x68, 0x61, 0x66, 0x73, 0x74, 0x7D, 0x7A,
-    0x89, 0x8E, 0x87, 0x80, 0x95, 0x92, 0x9B, 0x9C, 0xB1, 0xB6, 0xBF, 0xB8, 0xAD, 0xAA, 0xA3, 0xA4,
-    0xF9, 0xFE, 0xF7, 0xF0, 0xE5, 0xE2, 0xEB, 0xEC, 0xC1, 0xC6, 0xCF, 0xC8, 0xDD, 0xDA, 0xD3, 0xD4,
-    0x69, 0x6E, 0x67, 0x60, 0x75, 0x72, 0x7B, 0x7C, 0x51, 0x56, 0x5F, 0x58, 0x4D, 0x4A, 0x43, 0x44,
-    0x19, 0x1E, 0x17, 0x10, 0x05, 0x02, 0x0B, 0x0C, 0x21, 0x26, 0x2F, 0x28, 0x3D, 0x3A, 0x33, 0x34,
-    0x4E, 0x49, 0x40, 0x47, 0x52, 0x55, 0x5C, 0x5B, 0x76, 0x71, 0x78, 0x7F, 0x6A, 0x6D, 0x64, 0x63,
-    0x3E, 0x39, 0x30, 0x37, 0x22, 0x25, 0x2C, 0x2B, 0x06, 0x01, 0x08, 0x0F, 0x1A, 0x1D, 0x14, 0x13,
-    0xAE, 0xA9, 0xA0, 0xA7, 0xB2, 0xB5, 0xBC, 0xBB, 0x96, 0x91, 0x98, 0x9F, 0x8A, 0x8D, 0x84, 0x83,
-    0xDE, 0xD9, 0xD0, 0xD7, 0xC2, 0xC5, 0xCC, 0xCB, 0xE6, 0xE1, 0xE8, 0xEF, 0xFA, 0xFD, 0xF4, 0xF3
-};
+    0x00, 0x07, 0x0E, 0x09, 0x1C, 0x1B, 0x12, 0x15, 0x38, 0x3F, 0x36, 0x31, 0x24, 0x23, 0x2A, 0x2D, 0x70, 0x77, 0x7E,
+    0x79, 0x6C, 0x6B, 0x62, 0x65, 0x48, 0x4F, 0x46, 0x41, 0x54, 0x53, 0x5A, 0x5D, 0xE0, 0xE7, 0xEE, 0xE9, 0xFC, 0xFB,
+    0xF2, 0xF5, 0xD8, 0xDF, 0xD6, 0xD1, 0xC4, 0xC3, 0xCA, 0xCD, 0x90, 0x97, 0x9E, 0x99, 0x8C, 0x8B, 0x82, 0x85, 0xA8,
+    0xAF, 0xA6, 0xA1, 0xB4, 0xB3, 0xBA, 0xBD, 0xC7, 0xC0, 0xC9, 0xCE, 0xDB, 0xDC, 0xD5, 0xD2, 0xFF, 0xF8, 0xF1, 0xF6,
+    0xE3, 0xE4, 0xED, 0xEA, 0xB7, 0xB0, 0xB9, 0xBE, 0xAB, 0xAC, 0xA5, 0xA2, 0x8F, 0x88, 0x81, 0x86, 0x93, 0x94, 0x9D,
+    0x9A, 0x27, 0x20, 0x29, 0x2E, 0x3B, 0x3C, 0x35, 0x32, 0x1F, 0x18, 0x11, 0x16, 0x03, 0x04, 0x0D, 0x0A, 0x57, 0x50,
+    0x59, 0x5E, 0x4B, 0x4C, 0x45, 0x42, 0x6F, 0x68, 0x61, 0x66, 0x73, 0x74, 0x7D, 0x7A, 0x89, 0x8E, 0x87, 0x80, 0x95,
+    0x92, 0x9B, 0x9C, 0xB1, 0xB6, 0xBF, 0xB8, 0xAD, 0xAA, 0xA3, 0xA4, 0xF9, 0xFE, 0xF7, 0xF0, 0xE5, 0xE2, 0xEB, 0xEC,
+    0xC1, 0xC6, 0xCF, 0xC8, 0xDD, 0xDA, 0xD3, 0xD4, 0x69, 0x6E, 0x67, 0x60, 0x75, 0x72, 0x7B, 0x7C, 0x51, 0x56, 0x5F,
+    0x58, 0x4D, 0x4A, 0x43, 0x44, 0x19, 0x1E, 0x17, 0x10, 0x05, 0x02, 0x0B, 0x0C, 0x21, 0x26, 0x2F, 0x28, 0x3D, 0x3A,
+    0x33, 0x34, 0x4E, 0x49, 0x40, 0x47, 0x52, 0x55, 0x5C, 0x5B, 0x76, 0x71, 0x78, 0x7F, 0x6A, 0x6D, 0x64, 0x63, 0x3E,
+    0x39, 0x30, 0x37, 0x22, 0x25, 0x2C, 0x2B, 0x06, 0x01, 0x08, 0x0F, 0x1A, 0x1D, 0x14, 0x13, 0xAE, 0xA9, 0xA0, 0xA7,
+    0xB2, 0xB5, 0xBC, 0xBB, 0x96, 0x91, 0x98, 0x9F, 0x8A, 0x8D, 0x84, 0x83, 0xDE, 0xD9, 0xD0, 0xD7, 0xC2, 0xC5, 0xCC,
+    0xCB, 0xE6, 0xE1, 0xE8, 0xEF, 0xFA, 0xFD, 0xF4, 0xF3};
 
 static drflac_uint16 drflac__crc16_table[] = {
-    0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011,
-    0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D, 0x8027, 0x0022,
-    0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072,
-    0x0050, 0x8055, 0x805F, 0x005A, 0x804B, 0x004E, 0x0044, 0x8041,
-    0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2,
-    0x00F0, 0x80F5, 0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1,
-    0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
-    0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082,
-    0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D, 0x8197, 0x0192,
-    0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1,
-    0x01E0, 0x81E5, 0x81EF, 0x01EA, 0x81FB, 0x01FE, 0x01F4, 0x81F1,
-    0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2,
-    0x0140, 0x8145, 0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151,
-    0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
-    0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132,
-    0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E, 0x0104, 0x8101,
-    0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312,
-    0x0330, 0x8335, 0x833F, 0x033A, 0x832B, 0x032E, 0x0324, 0x8321,
-    0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371,
-    0x8353, 0x0356, 0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342,
-    0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
-    0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2,
-    0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD, 0x83B7, 0x03B2,
-    0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381,
-    0x0280, 0x8285, 0x828F, 0x028A, 0x829B, 0x029E, 0x0294, 0x8291,
-    0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2,
-    0x82E3, 0x02E6, 0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2,
-    0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
-    0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252,
-    0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E, 0x0264, 0x8261,
-    0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231,
-    0x8213, 0x0216, 0x021C, 0x8219, 0x0208, 0x820D, 0x8207, 0x0202
-};
+    0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011, 0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D,
+    0x8027, 0x0022, 0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072, 0x0050, 0x8055, 0x805F, 0x005A,
+    0x804B, 0x004E, 0x0044, 0x8041, 0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2, 0x00F0, 0x80F5,
+    0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1, 0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
+    0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082, 0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D,
+    0x8197, 0x0192, 0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1, 0x01E0, 0x81E5, 0x81EF, 0x01EA,
+    0x81FB, 0x01FE, 0x01F4, 0x81F1, 0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2, 0x0140, 0x8145,
+    0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151, 0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
+    0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132, 0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E,
+    0x0104, 0x8101, 0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312, 0x0330, 0x8335, 0x833F, 0x033A,
+    0x832B, 0x032E, 0x0324, 0x8321, 0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371, 0x8353, 0x0356,
+    0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342, 0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
+    0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2, 0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD,
+    0x83B7, 0x03B2, 0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381, 0x0280, 0x8285, 0x828F, 0x028A,
+    0x829B, 0x029E, 0x0294, 0x8291, 0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2, 0x82E3, 0x02E6,
+    0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2, 0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
+    0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252, 0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E,
+    0x0264, 0x8261, 0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231, 0x8213, 0x0216, 0x021C, 0x8219,
+    0x0208, 0x820D, 0x8207, 0x0202};
 
 static DRFLAC_INLINE drflac_uint8 drflac_crc8_byte(drflac_uint8 crc, drflac_uint8 data)
 {
@@ -1129,20 +1142,24 @@ static DRFLAC_INLINE drflac_uint8 drflac_crc8(drflac_uint8 crc, drflac_uint32 da
     }
     return crc;
 #else
-    drflac_uint32 wholeBytes = count >> 3;
-    drflac_uint32 leftoverBits = count - (wholeBytes*8);
+    drflac_uint32 wholeBytes   = count >> 3;
+    drflac_uint32 leftoverBits = count - (wholeBytes * 8);
 
-    static drflac_uint64 leftoverDataMaskTable[8] = {
-        0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F
-    };
-    drflac_uint64 leftoverDataMask = leftoverDataMaskTable[leftoverBits];
+    static drflac_uint64 leftoverDataMaskTable[8] = {0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F};
+    drflac_uint64 leftoverDataMask                = leftoverDataMaskTable[leftoverBits];
 
     switch (wholeBytes) {
-        case 4: crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0xFF000000UL << leftoverBits)) >> (24 + leftoverBits)));
-        case 3: crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x00FF0000UL << leftoverBits)) >> (16 + leftoverBits)));
-        case 2: crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x0000FF00UL << leftoverBits)) >> ( 8 + leftoverBits)));
-        case 1: crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x000000FFUL << leftoverBits)) >> ( 0 + leftoverBits)));
-        case 0: if (leftoverBits > 0) crc = (crc << leftoverBits) ^ drflac__crc8_table[(crc >> (8 - leftoverBits)) ^ (data & leftoverDataMask)];
+    case 4:
+        crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0xFF000000UL << leftoverBits)) >> (24 + leftoverBits)));
+    case 3:
+        crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x00FF0000UL << leftoverBits)) >> (16 + leftoverBits)));
+    case 2:
+        crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x0000FF00UL << leftoverBits)) >> (8 + leftoverBits)));
+    case 1:
+        crc = drflac_crc8_byte(crc, (drflac_uint8)((data & (0x000000FFUL << leftoverBits)) >> (0 + leftoverBits)));
+    case 0:
+        if (leftoverBits > 0)
+            crc = (crc << leftoverBits) ^ drflac__crc8_table[(crc >> (8 - leftoverBits)) ^ (data & leftoverDataMask)];
     }
     return crc;
 #endif
@@ -1156,18 +1173,25 @@ static DRFLAC_INLINE drflac_uint16 drflac_crc16_byte(drflac_uint16 crc, drflac_u
 
 static DRFLAC_INLINE drflac_uint16 drflac_crc16_bytes(drflac_uint16 crc, drflac_cache_t data, drflac_uint32 byteCount)
 {
-    switch (byteCount)
-    {
+    switch (byteCount) {
 #ifdef DRFLAC_64BIT
-    case 8: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 56) & 0xFF));
-    case 7: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 48) & 0xFF));
-    case 6: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 40) & 0xFF));
-    case 5: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 32) & 0xFF));
+    case 8:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 56) & 0xFF));
+    case 7:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 48) & 0xFF));
+    case 6:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 40) & 0xFF));
+    case 5:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 32) & 0xFF));
 #endif
-    case 4: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 24) & 0xFF));
-    case 3: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 16) & 0xFF));
-    case 2: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >>  8) & 0xFF));
-    case 1: crc = drflac_crc16_byte(crc, (drflac_uint8)((data >>  0) & 0xFF));
+    case 4:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 24) & 0xFF));
+    case 3:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 16) & 0xFF));
+    case 2:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 8) & 0xFF));
+    case 1:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data >> 0) & 0xFF));
     }
 
     return crc;
@@ -1197,21 +1221,25 @@ static DRFLAC_INLINE drflac_uint16 drflac_crc16__32bit(drflac_uint16 crc, drflac
 
     return crc;
 #else
-    drflac_uint32 wholeBytes = count >> 3;
-    drflac_uint32 leftoverBits = count - (wholeBytes*8);
+    drflac_uint32 wholeBytes   = count >> 3;
+    drflac_uint32 leftoverBits = count - (wholeBytes * 8);
 
-    static drflac_uint64 leftoverDataMaskTable[8] = {
-        0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F
-    };
-    drflac_uint64 leftoverDataMask = leftoverDataMaskTable[leftoverBits];
+    static drflac_uint64 leftoverDataMaskTable[8] = {0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F};
+    drflac_uint64 leftoverDataMask                = leftoverDataMaskTable[leftoverBits];
 
     switch (wholeBytes) {
-        default:
-        case 4: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0xFF000000UL << leftoverBits)) >> (24 + leftoverBits)));
-        case 3: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x00FF0000UL << leftoverBits)) >> (16 + leftoverBits)));
-        case 2: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x0000FF00UL << leftoverBits)) >> ( 8 + leftoverBits)));
-        case 1: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x000000FFUL << leftoverBits)) >> ( 0 + leftoverBits)));
-        case 0: if (leftoverBits > 0) crc = (crc << leftoverBits) ^ drflac__crc16_table[(crc >> (16 - leftoverBits)) ^ (data & leftoverDataMask)];
+    default:
+    case 4:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0xFF000000UL << leftoverBits)) >> (24 + leftoverBits)));
+    case 3:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x00FF0000UL << leftoverBits)) >> (16 + leftoverBits)));
+    case 2:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x0000FF00UL << leftoverBits)) >> (8 + leftoverBits)));
+    case 1:
+        crc = drflac_crc16_byte(crc, (drflac_uint8)((data & (0x000000FFUL << leftoverBits)) >> (0 + leftoverBits)));
+    case 0:
+        if (leftoverBits > 0)
+            crc = (crc << leftoverBits) ^ drflac__crc16_table[(crc >> (16 - leftoverBits)) ^ (data & leftoverDataMask)];
     }
     return crc;
 #endif
@@ -1228,31 +1256,46 @@ static DRFLAC_INLINE drflac_uint16 drflac_crc16__64bit(drflac_uint16 crc, drflac
     (void)count;
     return 0;
 #else
-    drflac_uint32 wholeBytes = count >> 3;
-    drflac_uint32 leftoverBits = count - (wholeBytes*8);
+    drflac_uint32 wholeBytes   = count >> 3;
+    drflac_uint32 leftoverBits = count - (wholeBytes * 8);
 
-    static drflac_uint64 leftoverDataMaskTable[8] = {
-        0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F
-    };
-    drflac_uint64 leftoverDataMask = leftoverDataMaskTable[leftoverBits];
+    static drflac_uint64 leftoverDataMaskTable[8] = {0x00, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F};
+    drflac_uint64 leftoverDataMask                = leftoverDataMaskTable[leftoverBits];
 
     switch (wholeBytes) {
-        default:
-        case 8: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0xFF00000000000000 << leftoverBits)) >> (56 + leftoverBits)));
-        case 7: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x00FF000000000000 << leftoverBits)) >> (48 + leftoverBits)));
-        case 6: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x0000FF0000000000 << leftoverBits)) >> (40 + leftoverBits)));
-        case 5: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x000000FF00000000 << leftoverBits)) >> (32 + leftoverBits)));
-        case 4: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x00000000FF000000 << leftoverBits)) >> (24 + leftoverBits)));
-        case 3: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x0000000000FF0000 << leftoverBits)) >> (16 + leftoverBits)));
-        case 2: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x000000000000FF00 << leftoverBits)) >> ( 8 + leftoverBits)));
-        case 1: crc = drflac_crc16_byte(crc, (drflac_uint8)((data & ((drflac_uint64)0x00000000000000FF << leftoverBits)) >> ( 0 + leftoverBits)));
-        case 0: if (leftoverBits > 0) crc = (crc << leftoverBits) ^ drflac__crc16_table[(crc >> (16 - leftoverBits)) ^ (data & leftoverDataMask)];
+    default:
+    case 8:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0xFF00000000000000 << leftoverBits)) >> (56 + leftoverBits)));
+    case 7:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x00FF000000000000 << leftoverBits)) >> (48 + leftoverBits)));
+    case 6:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x0000FF0000000000 << leftoverBits)) >> (40 + leftoverBits)));
+    case 5:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x000000FF00000000 << leftoverBits)) >> (32 + leftoverBits)));
+    case 4:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x00000000FF000000 << leftoverBits)) >> (24 + leftoverBits)));
+    case 3:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x0000000000FF0000 << leftoverBits)) >> (16 + leftoverBits)));
+    case 2:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x000000000000FF00 << leftoverBits)) >> (8 + leftoverBits)));
+    case 1:
+        crc = drflac_crc16_byte(
+            crc, (drflac_uint8)((data & ((drflac_uint64)0x00000000000000FF << leftoverBits)) >> (0 + leftoverBits)));
+    case 0:
+        if (leftoverBits > 0)
+            crc = (crc << leftoverBits) ^ drflac__crc16_table[(crc >> (16 - leftoverBits)) ^ (data & leftoverDataMask)];
     }
     return crc;
 #endif
 }
 
-
 static DRFLAC_INLINE drflac_uint16 drflac_crc16(drflac_uint16 crc, drflac_cache_t data, drflac_uint32 count)
 {
 #ifdef DRFLAC_64BIT
@@ -1262,7 +1305,6 @@ static DRFLAC_INLINE drflac_uint16 drflac_crc16(drflac_uint16 crc, drflac_cache_
 #endif
 }
 
-
 #ifdef DRFLAC_64BIT
 #define drflac__be2host__cache_line drflac__be2host_64
 #else
@@ -1271,55 +1313,59 @@ static DRFLAC_INLINE drflac_uint16 drflac_crc16(drflac_uint16 crc, drflac_cache_
 
 // BIT READING ATTEMPT #2
 //
-// This uses a 32- or 64-bit bit-shifted cache - as bits are read, the cache is shifted such that the first valid bit is sitting
-// on the most significant bit. It uses the notion of an L1 and L2 cache (borrowed from CPU architecture), where the L1 cache
-// is a 32- or 64-bit unsigned integer (depending on whether or not a 32- or 64-bit build is being compiled) and the L2 is an
-// array of "cache lines", with each cache line being the same size as the L1. The L2 is a buffer of about 4KB and is where data
-// from onRead() is read into.
-#define DRFLAC_CACHE_L1_SIZE_BYTES(bs)                  (sizeof((bs)->cache))
-#define DRFLAC_CACHE_L1_SIZE_BITS(bs)                   (sizeof((bs)->cache)*8)
-#define DRFLAC_CACHE_L1_BITS_REMAINING(bs)              (DRFLAC_CACHE_L1_SIZE_BITS(bs) - ((bs)->consumedBits))
+// This uses a 32- or 64-bit bit-shifted cache - as bits are read, the cache is shifted such that the first valid bit is
+// sitting on the most significant bit. It uses the notion of an L1 and L2 cache (borrowed from CPU architecture), where
+// the L1 cache is a 32- or 64-bit unsigned integer (depending on whether or not a 32- or 64-bit build is being
+// compiled) and the L2 is an array of "cache lines", with each cache line being the same size as the L1. The L2 is a
+// buffer of about 4KB and is where data from onRead() is read into.
+#define DRFLAC_CACHE_L1_SIZE_BYTES(bs)     (sizeof((bs)->cache))
+#define DRFLAC_CACHE_L1_SIZE_BITS(bs)      (sizeof((bs)->cache) * 8)
+#define DRFLAC_CACHE_L1_BITS_REMAINING(bs) (DRFLAC_CACHE_L1_SIZE_BITS(bs) - ((bs)->consumedBits))
 #ifdef DRFLAC_64BIT
-#define DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount)       (~(((drflac_uint64)-1LL) >> (_bitCount)))
+#define DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount) (~(((drflac_uint64)-1LL) >> (_bitCount)))
 #else
-#define DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount)       (~(((drflac_uint32)-1) >> (_bitCount)))
+#define DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount) (~(((drflac_uint32)-1) >> (_bitCount)))
 #endif
-#define DRFLAC_CACHE_L1_SELECTION_SHIFT(bs, _bitCount)  (DRFLAC_CACHE_L1_SIZE_BITS(bs) - (_bitCount))
-#define DRFLAC_CACHE_L1_SELECT(bs, _bitCount)           (((bs)->cache) & DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount))
-#define DRFLAC_CACHE_L1_SELECT_AND_SHIFT(bs, _bitCount) (DRFLAC_CACHE_L1_SELECT((bs), _bitCount) >> DRFLAC_CACHE_L1_SELECTION_SHIFT((bs), _bitCount))
-#define DRFLAC_CACHE_L2_SIZE_BYTES(bs)                  (sizeof((bs)->cacheL2))
-#define DRFLAC_CACHE_L2_LINE_COUNT(bs)                  (DRFLAC_CACHE_L2_SIZE_BYTES(bs) / sizeof((bs)->cacheL2[0]))
-#define DRFLAC_CACHE_L2_LINES_REMAINING(bs)             (DRFLAC_CACHE_L2_LINE_COUNT(bs) - (bs)->nextL2Line)
-
+#define DRFLAC_CACHE_L1_SELECTION_SHIFT(bs, _bitCount) (DRFLAC_CACHE_L1_SIZE_BITS(bs) - (_bitCount))
+#define DRFLAC_CACHE_L1_SELECT(bs, _bitCount)          (((bs)->cache) & DRFLAC_CACHE_L1_SELECTION_MASK(_bitCount))
+#define DRFLAC_CACHE_L1_SELECT_AND_SHIFT(bs, _bitCount)                                                                \
+    (DRFLAC_CACHE_L1_SELECT((bs), _bitCount) >> DRFLAC_CACHE_L1_SELECTION_SHIFT((bs), _bitCount))
+#define DRFLAC_CACHE_L2_SIZE_BYTES(bs)      (sizeof((bs)->cacheL2))
+#define DRFLAC_CACHE_L2_LINE_COUNT(bs)      (DRFLAC_CACHE_L2_SIZE_BYTES(bs) / sizeof((bs)->cacheL2[0]))
+#define DRFLAC_CACHE_L2_LINES_REMAINING(bs) (DRFLAC_CACHE_L2_LINE_COUNT(bs) - (bs)->nextL2Line)
 
 #ifndef DR_FLAC_NO_CRC
-static DRFLAC_INLINE void drflac__reset_crc16(drflac_bs* bs)
+static DRFLAC_INLINE void drflac__reset_crc16(drflac_bs *bs)
 {
-    bs->crc16 = 0;
+    bs->crc16                  = 0;
     bs->crc16CacheIgnoredBytes = bs->consumedBits >> 3;
 }
 
-static DRFLAC_INLINE void drflac__update_crc16(drflac_bs* bs)
+static DRFLAC_INLINE void drflac__update_crc16(drflac_bs *bs)
 {
-    bs->crc16 = drflac_crc16_bytes(bs->crc16, bs->crc16Cache, DRFLAC_CACHE_L1_SIZE_BYTES(bs) - bs->crc16CacheIgnoredBytes);
+    bs->crc16 =
+        drflac_crc16_bytes(bs->crc16, bs->crc16Cache, DRFLAC_CACHE_L1_SIZE_BYTES(bs) - bs->crc16CacheIgnoredBytes);
     bs->crc16CacheIgnoredBytes = 0;
 }
 
-static DRFLAC_INLINE drflac_uint16 drflac__flush_crc16(drflac_bs* bs)
+static DRFLAC_INLINE drflac_uint16 drflac__flush_crc16(drflac_bs *bs)
 {
     // We should never be flushing in a situation where we are not aligned on a byte boundary.
     drflac_assert((DRFLAC_CACHE_L1_BITS_REMAINING(bs) & 7) == 0);
 
-    // The bits that were read from the L1 cache need to be accumulated. The number of bytes needing to be accumulated is determined
-    // by the number of bits that have been consumed.
+    // The bits that were read from the L1 cache need to be accumulated. The number of bytes needing to be accumulated
+    // is determined by the number of bits that have been consumed.
     if (DRFLAC_CACHE_L1_BITS_REMAINING(bs) == 0) {
         drflac__update_crc16(bs);
-    } else {
+    }
+    else {
         // We only accumulate the consumed bits.
-        bs->crc16 = drflac_crc16_bytes(bs->crc16, bs->crc16Cache >> DRFLAC_CACHE_L1_BITS_REMAINING(bs), (bs->consumedBits >> 3) - bs->crc16CacheIgnoredBytes);
+        bs->crc16 = drflac_crc16_bytes(bs->crc16,
+                                       bs->crc16Cache >> DRFLAC_CACHE_L1_BITS_REMAINING(bs),
+                                       (bs->consumedBits >> 3) - bs->crc16CacheIgnoredBytes);
 
-        // The bits that we just accumulated should never be accumulated again. We need to keep track of how many bytes were accumulated
-        // so we can handle that later.
+        // The bits that we just accumulated should never be accumulated again. We need to keep track of how many bytes
+        // were accumulated so we can handle that later.
         bs->crc16CacheIgnoredBytes = bs->consumedBits >> 3;
     }
 
@@ -1327,7 +1373,7 @@ static DRFLAC_INLINE drflac_uint16 drflac__flush_crc16(drflac_bs* bs)
 }
 #endif
 
-static DRFLAC_INLINE drflac_bool32 drflac__reload_l1_cache_from_l2(drflac_bs* bs)
+static DRFLAC_INLINE drflac_bool32 drflac__reload_l1_cache_from_l2(drflac_bs *bs)
 {
     // Fast path. Try loading straight from L2.
     if (bs->nextL2Line < DRFLAC_CACHE_L2_LINE_COUNT(bs)) {
@@ -1335,10 +1381,11 @@ static DRFLAC_INLINE drflac_bool32 drflac__reload_l1_cache_from_l2(drflac_bs* bs
         return DRFLAC_TRUE;
     }
 
-    // If we get here it means we've run out of data in the L2 cache. We'll need to fetch more from the client, if there's
-    // any left.
+    // If we get here it means we've run out of data in the L2 cache. We'll need to fetch more from the client, if
+    // there's any left.
     if (bs->unalignedByteCount > 0) {
-        return DRFLAC_FALSE;   // If we have any unaligned bytes it means there's no more aligned bytes left in the client.
+        return DRFLAC_FALSE; // If we have any unaligned bytes it means there's no more aligned bytes left in the
+                             // client.
     }
 
     size_t bytesRead = bs->onRead(bs->pUserData, bs->cacheL2, DRFLAC_CACHE_L2_SIZE_BYTES(bs));
@@ -1349,7 +1396,6 @@ static DRFLAC_INLINE drflac_bool32 drflac__reload_l1_cache_from_l2(drflac_bs* bs
         return DRFLAC_TRUE;
     }
 
-
     // If we get here it means we were unable to retrieve enough data to fill the entire L2 cache. It probably
     // means we've just reached the end of the file. We need to move the valid data down to the end of the buffer
     // and adjust the index of the next line accordingly. Also keep in mind that the L2 cache must be aligned to
@@ -1365,20 +1411,21 @@ static DRFLAC_INLINE drflac_bool32 drflac__reload_l1_cache_from_l2(drflac_bs* bs
     if (alignedL1LineCount > 0) {
         size_t offset = DRFLAC_CACHE_L2_LINE_COUNT(bs) - alignedL1LineCount;
         for (size_t i = alignedL1LineCount; i > 0; --i) {
-            bs->cacheL2[i-1 + offset] = bs->cacheL2[i-1];
+            bs->cacheL2[i - 1 + offset] = bs->cacheL2[i - 1];
         }
 
         bs->nextL2Line = (drflac_uint32)offset;
-        bs->cache = bs->cacheL2[bs->nextL2Line++];
+        bs->cache      = bs->cacheL2[bs->nextL2Line++];
         return DRFLAC_TRUE;
-    } else {
+    }
+    else {
         // If we get into this branch it means we weren't able to load any L1-aligned data.
         bs->nextL2Line = DRFLAC_CACHE_L2_LINE_COUNT(bs);
         return DRFLAC_FALSE;
     }
 }
 
-static drflac_bool32 drflac__reload_cache(drflac_bs* bs)
+static drflac_bool32 drflac__reload_cache(drflac_bs *bs)
 {
 #ifndef DR_FLAC_NO_CRC
     drflac__update_crc16(bs);
@@ -1386,7 +1433,7 @@ static drflac_bool32 drflac__reload_cache(drflac_bs* bs)
 
     // Fast path. Try just moving the next value in the L2 cache to the L1 cache.
     if (drflac__reload_l1_cache_from_l2(bs)) {
-        bs->cache = drflac__be2host__cache_line(bs->cache);
+        bs->cache        = drflac__be2host__cache_line(bs->cache);
         bs->consumedBits = 0;
 #ifndef DR_FLAC_NO_CRC
         bs->crc16Cache = bs->cache;
@@ -1396,9 +1443,9 @@ static drflac_bool32 drflac__reload_cache(drflac_bs* bs)
 
     // Slow path.
 
-    // If we get here it means we have failed to load the L1 cache from the L2. Likely we've just reached the end of the stream and the last
-    // few bytes did not meet the alignment requirements for the L2 cache. In this case we need to fall back to a slower path and read the
-    // data from the unaligned cache.
+    // If we get here it means we have failed to load the L1 cache from the L2. Likely we've just reached the end of the
+    // stream and the last few bytes did not meet the alignment requirements for the L2 cache. In this case we need to
+    // fall back to a slower path and read the data from the unaligned cache.
     size_t bytesRead = bs->unalignedByteCount;
     if (bytesRead == 0) {
         return DRFLAC_FALSE;
@@ -1408,32 +1455,34 @@ static drflac_bool32 drflac__reload_cache(drflac_bs* bs)
     bs->consumedBits = (drflac_uint32)(DRFLAC_CACHE_L1_SIZE_BYTES(bs) - bytesRead) * 8;
 
     bs->cache = drflac__be2host__cache_line(bs->unalignedCache);
-    bs->cache &= DRFLAC_CACHE_L1_SELECTION_MASK(DRFLAC_CACHE_L1_SIZE_BITS(bs) - bs->consumedBits);    // <-- Make sure the consumed bits are always set to zero. Other parts of the library depend on this property.
-    bs->unalignedByteCount = 0;     // <-- At this point the unaligned bytes have been moved into the cache and we thus have no more unaligned bytes.
+    bs->cache &= DRFLAC_CACHE_L1_SELECTION_MASK(
+        DRFLAC_CACHE_L1_SIZE_BITS(bs) - bs->consumedBits); // <-- Make sure the consumed bits are always set to zero.
+                                                           // Other parts of the library depend on this property.
+    bs->unalignedByteCount = 0; // <-- At this point the unaligned bytes have been moved into the cache and we thus have
+                                // no more unaligned bytes.
 
 #ifndef DR_FLAC_NO_CRC
-    bs->crc16Cache = bs->cache >> bs->consumedBits;
+    bs->crc16Cache             = bs->cache >> bs->consumedBits;
     bs->crc16CacheIgnoredBytes = bs->consumedBits >> 3;
 #endif
     return DRFLAC_TRUE;
 }
 
-static void drflac__reset_cache(drflac_bs* bs)
+static void drflac__reset_cache(drflac_bs *bs)
 {
-    bs->nextL2Line   = DRFLAC_CACHE_L2_LINE_COUNT(bs);  // <-- This clears the L2 cache.
-    bs->consumedBits = DRFLAC_CACHE_L1_SIZE_BITS(bs);   // <-- This clears the L1 cache.
-    bs->cache = 0;
-    bs->unalignedByteCount = 0;                         // <-- This clears the trailing unaligned bytes.
-    bs->unalignedCache = 0;
+    bs->nextL2Line         = DRFLAC_CACHE_L2_LINE_COUNT(bs); // <-- This clears the L2 cache.
+    bs->consumedBits       = DRFLAC_CACHE_L1_SIZE_BITS(bs);  // <-- This clears the L1 cache.
+    bs->cache              = 0;
+    bs->unalignedByteCount = 0; // <-- This clears the trailing unaligned bytes.
+    bs->unalignedCache     = 0;
 
 #ifndef DR_FLAC_NO_CRC
-    bs->crc16Cache = 0;
+    bs->crc16Cache             = 0;
     bs->crc16CacheIgnoredBytes = 0;
 #endif
 }
 
-
-static DRFLAC_INLINE drflac_bool32 drflac__read_uint32(drflac_bs* bs, unsigned int bitCount, drflac_uint32* pResultOut)
+static DRFLAC_INLINE drflac_bool32 drflac__read_uint32(drflac_bs *bs, unsigned int bitCount, drflac_uint32 *pResultOut)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pResultOut != NULL);
@@ -1451,17 +1500,20 @@ static DRFLAC_INLINE drflac_bool32 drflac__read_uint32(drflac_bs* bs, unsigned i
             *pResultOut = DRFLAC_CACHE_L1_SELECT_AND_SHIFT(bs, bitCount);
             bs->consumedBits += bitCount;
             bs->cache <<= bitCount;
-        } else {
-            *pResultOut = (drflac_uint32)bs->cache;
+        }
+        else {
+            *pResultOut      = (drflac_uint32)bs->cache;
             bs->consumedBits = DRFLAC_CACHE_L1_SIZE_BITS(bs);
-            bs->cache = 0;
+            bs->cache        = 0;
         }
         return DRFLAC_TRUE;
-    } else {
-        // It straddles the cached data. It will never cover more than the next chunk. We just read the number in two parts and combine them.
+    }
+    else {
+        // It straddles the cached data. It will never cover more than the next chunk. We just read the number in two
+        // parts and combine them.
         drflac_uint32 bitCountHi = DRFLAC_CACHE_L1_BITS_REMAINING(bs);
         drflac_uint32 bitCountLo = bitCount - bitCountHi;
-        drflac_uint32 resultHi = DRFLAC_CACHE_L1_SELECT_AND_SHIFT(bs, bitCountHi);
+        drflac_uint32 resultHi   = DRFLAC_CACHE_L1_SELECT_AND_SHIFT(bs, bitCountHi);
 
         if (!drflac__reload_cache(bs)) {
             return DRFLAC_FALSE;
@@ -1474,7 +1526,7 @@ static DRFLAC_INLINE drflac_bool32 drflac__read_uint32(drflac_bs* bs, unsigned i
     }
 }
 
-static drflac_bool32 drflac__read_int32(drflac_bs* bs, unsigned int bitCount, drflac_int32* pResult)
+static drflac_bool32 drflac__read_int32(drflac_bs *bs, unsigned int bitCount, drflac_int32 *pResult)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pResult != NULL);
@@ -1486,17 +1538,17 @@ static drflac_bool32 drflac__read_int32(drflac_bs* bs, unsigned int bitCount, dr
         return DRFLAC_FALSE;
     }
 
-    drflac_uint32 signbit = ((result >> (bitCount-1)) & 0x01);
+    drflac_uint32 signbit = ((result >> (bitCount - 1)) & 0x01);
     result |= (~signbit + 1) << bitCount;
 
     *pResult = (drflac_int32)result;
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__read_uint64(drflac_bs* bs, unsigned int bitCount, drflac_uint64* pResultOut)
+static drflac_bool32 drflac__read_uint64(drflac_bs *bs, unsigned int bitCount, drflac_uint64 *pResultOut)
 {
     drflac_assert(bitCount <= 64);
-    drflac_assert(bitCount >  32);
+    drflac_assert(bitCount > 32);
 
     drflac_uint32 resultHi;
     if (!drflac__read_uint32(bs, bitCount - 32, &resultHi)) {
@@ -1531,7 +1583,7 @@ static drflac_bool32 drflac__read_int64(drflac_bs* bs, unsigned int bitCount, dr
 }
 #endif
 
-static drflac_bool32 drflac__read_uint16(drflac_bs* bs, unsigned int bitCount, drflac_uint16* pResult)
+static drflac_bool32 drflac__read_uint16(drflac_bs *bs, unsigned int bitCount, drflac_uint16 *pResult)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pResult != NULL);
@@ -1565,7 +1617,7 @@ static drflac_bool32 drflac__read_int16(drflac_bs* bs, unsigned int bitCount, dr
 }
 #endif
 
-static drflac_bool32 drflac__read_uint8(drflac_bs* bs, unsigned int bitCount, drflac_uint8* pResult)
+static drflac_bool32 drflac__read_uint8(drflac_bs *bs, unsigned int bitCount, drflac_uint8 *pResult)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pResult != NULL);
@@ -1581,7 +1633,7 @@ static drflac_bool32 drflac__read_uint8(drflac_bs* bs, unsigned int bitCount, dr
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__read_int8(drflac_bs* bs, unsigned int bitCount, drflac_int8* pResult)
+static drflac_bool32 drflac__read_int8(drflac_bs *bs, unsigned int bitCount, drflac_int8 *pResult)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pResult != NULL);
@@ -1597,18 +1649,18 @@ static drflac_bool32 drflac__read_int8(drflac_bs* bs, unsigned int bitCount, drf
     return DRFLAC_TRUE;
 }
 
-
-static drflac_bool32 drflac__seek_bits(drflac_bs* bs, size_t bitsToSeek)
+static drflac_bool32 drflac__seek_bits(drflac_bs *bs, size_t bitsToSeek)
 {
     if (bitsToSeek <= DRFLAC_CACHE_L1_BITS_REMAINING(bs)) {
         bs->consumedBits += (drflac_uint32)bitsToSeek;
         bs->cache <<= bitsToSeek;
         return DRFLAC_TRUE;
-    } else {
+    }
+    else {
         // It straddles the cached data. This function isn't called too frequently so I'm favouring simplicity here.
-        bitsToSeek       -= DRFLAC_CACHE_L1_BITS_REMAINING(bs);
+        bitsToSeek -= DRFLAC_CACHE_L1_BITS_REMAINING(bs);
         bs->consumedBits += DRFLAC_CACHE_L1_BITS_REMAINING(bs);
-        bs->cache         = 0;
+        bs->cache = 0;
 
         // Simple case. Seek in groups of the same number as bits that fit within a cache line.
 #ifdef DRFLAC_64BIT
@@ -1652,14 +1704,14 @@ static drflac_bool32 drflac__seek_bits(drflac_bs* bs, size_t bitsToSeek)
     }
 }
 
-
-// This function moves the bit streamer to the first bit after the sync code (bit 15 of the of the frame header). It will also update the CRC-16.
-static drflac_bool32 drflac__find_and_seek_to_next_sync_code(drflac_bs* bs)
+// This function moves the bit streamer to the first bit after the sync code (bit 15 of the of the frame header). It
+// will also update the CRC-16.
+static drflac_bool32 drflac__find_and_seek_to_next_sync_code(drflac_bs *bs)
 {
     drflac_assert(bs != NULL);
 
-    // The sync code is always aligned to 8 bits. This is convenient for us because it means we can do byte-aligned movements. The first
-    // thing to do is align to the next byte.
+    // The sync code is always aligned to 8 bits. This is convenient for us because it means we can do byte-aligned
+    // movements. The first thing to do is align to the next byte.
     if (!drflac__seek_bits(bs, DRFLAC_CACHE_L1_BITS_REMAINING(bs) & 7)) {
         return DRFLAC_FALSE;
     }
@@ -1682,7 +1734,8 @@ static drflac_bool32 drflac__find_and_seek_to_next_sync_code(drflac_bs* bs)
 
             if (lo == 0x3E) {
                 return DRFLAC_TRUE;
-            } else {
+            }
+            else {
                 if (!drflac__seek_bits(bs, DRFLAC_CACHE_L1_BITS_REMAINING(bs) & 7)) {
                     return DRFLAC_FALSE;
                 }
@@ -1691,40 +1744,54 @@ static drflac_bool32 drflac__find_and_seek_to_next_sync_code(drflac_bs* bs)
     }
 
     // Should never get here.
-    //return DRFLAC_FALSE;
+    // return DRFLAC_FALSE;
 }
 
-
 #if !defined(DR_FLAC_NO_SIMD) && defined(DRFLAC_HAS_LZCNT_INTRINSIC)
 #define DRFLAC_IMPLEMENT_CLZ_LZCNT
 #endif
-#if  defined(_MSC_VER) && _MSC_VER >= 1400
+#if defined(_MSC_VER) && _MSC_VER >= 1400
 #define DRFLAC_IMPLEMENT_CLZ_MSVC
 #endif
 
 static DRFLAC_INLINE drflac_uint32 drflac__clz_software(drflac_cache_t x)
 {
-    static drflac_uint32 clz_table_4[] = {
-        0,
-        4,
-        3, 3,
-        2, 2, 2, 2,
-        1, 1, 1, 1, 1, 1, 1, 1
-    };
+    static drflac_uint32 clz_table_4[] = {0, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1};
 
-    drflac_uint32 n = clz_table_4[x >> (sizeof(x)*8 - 4)];
+    drflac_uint32 n = clz_table_4[x >> (sizeof(x) * 8 - 4)];
     if (n == 0) {
 #ifdef DRFLAC_64BIT
-        if ((x & 0xFFFFFFFF00000000ULL) == 0) { n  = 32; x <<= 32; }
-        if ((x & 0xFFFF000000000000ULL) == 0) { n += 16; x <<= 16; }
-        if ((x & 0xFF00000000000000ULL) == 0) { n += 8;  x <<= 8;  }
-        if ((x & 0xF000000000000000ULL) == 0) { n += 4;  x <<= 4;  }
+        if ((x & 0xFFFFFFFF00000000ULL) == 0) {
+            n = 32;
+            x <<= 32;
+        }
+        if ((x & 0xFFFF000000000000ULL) == 0) {
+            n += 16;
+            x <<= 16;
+        }
+        if ((x & 0xFF00000000000000ULL) == 0) {
+            n += 8;
+            x <<= 8;
+        }
+        if ((x & 0xF000000000000000ULL) == 0) {
+            n += 4;
+            x <<= 4;
+        }
 #else
-        if ((x & 0xFFFF0000) == 0) { n  = 16; x <<= 16; }
-        if ((x & 0xFF000000) == 0) { n += 8;  x <<= 8;  }
-        if ((x & 0xF0000000) == 0) { n += 4;  x <<= 4;  }
+        if ((x & 0xFFFF0000) == 0) {
+            n = 16;
+            x <<= 16;
+        }
+        if ((x & 0xFF000000) == 0) {
+            n += 8;
+            x <<= 8;
+        }
+        if ((x & 0xF0000000) == 0) {
+            n += 4;
+            x <<= 4;
+        }
 #endif
-        n += clz_table_4[x >> (sizeof(x)*8 - 4)];
+        n += clz_table_4[x >> (sizeof(x) * 8 - 4)];
     }
 
     return n - 1;
@@ -1744,22 +1811,22 @@ static DRFLAC_INLINE drflac_bool32 drflac__is_lzcnt_supported()
 static DRFLAC_INLINE drflac_uint32 drflac__clz_lzcnt(drflac_cache_t x)
 {
 #ifdef _MSC_VER
-    #ifdef DRFLAC_64BIT
-        return (drflac_uint32)__lzcnt64(x);
-    #else
-        return (drflac_uint32)__lzcnt(x);
-    #endif
+#ifdef DRFLAC_64BIT
+    return (drflac_uint32)__lzcnt64(x);
 #else
-    #if defined(__GNUC__) || defined(__clang__)
-        #ifdef DRFLAC_64BIT
-            return (drflac_uint32)__builtin_clzll((unsigned long long)x);
-        #else
-            return (drflac_uint32)__builtin_clzl((unsigned long)x);
-        #endif
-    #else
-        // Unsupported compiler.
-        #error "This compiler does not support the lzcnt intrinsic."
-    #endif
+    return (drflac_uint32)__lzcnt(x);
+#endif
+#else
+#if defined(__GNUC__) || defined(__clang__)
+#ifdef DRFLAC_64BIT
+    return (drflac_uint32)__builtin_clzll((unsigned long long)x);
+#else
+    return (drflac_uint32)__builtin_clzl((unsigned long)x);
+#endif
+#else
+// Unsupported compiler.
+#error "This compiler does not support the lzcnt intrinsic."
+#endif
 #endif
 }
 #endif
@@ -1769,33 +1836,34 @@ static DRFLAC_INLINE drflac_uint32 drflac__clz_msvc(drflac_cache_t x)
 {
     drflac_uint32 n;
 #ifdef DRFLAC_64BIT
-    _BitScanReverse64((unsigned long*)&n, x);
+    _BitScanReverse64((unsigned long *)&n, x);
 #else
-    _BitScanReverse((unsigned long*)&n, x);
+    _BitScanReverse((unsigned long *)&n, x);
 #endif
-    return sizeof(x)*8 - n - 1;
+    return sizeof(x) * 8 - n - 1;
 }
 #endif
 
 static DRFLAC_INLINE drflac_uint32 drflac__clz(drflac_cache_t x)
 {
-    // This function assumes at least one bit is set. Checking for 0 needs to be done at a higher level, outside this function.
+    // This function assumes at least one bit is set. Checking for 0 needs to be done at a higher level, outside this
+    // function.
 #ifdef DRFLAC_IMPLEMENT_CLZ_LZCNT
     if (drflac__is_lzcnt_supported()) {
         return drflac__clz_lzcnt(x);
-    } else
+    }
+    else
 #endif
     {
-    #ifdef DRFLAC_IMPLEMENT_CLZ_MSVC
+#ifdef DRFLAC_IMPLEMENT_CLZ_MSVC
         return drflac__clz_msvc(x);
-    #else
+#else
         return drflac__clz_software(x);
-    #endif
+#endif
     }
 }
 
-
-static inline drflac_bool32 drflac__seek_past_next_set_bit(drflac_bs* bs, unsigned int* pOffsetOut)
+static inline drflac_bool32 drflac__seek_past_next_set_bit(drflac_bs *bs, unsigned int *pOffsetOut)
 {
     drflac_uint32 zeroCounter = 0;
     while (bs->cache == 0) {
@@ -1816,16 +1884,15 @@ static inline drflac_bool32 drflac__seek_past_next_set_bit(drflac_bs* bs, unsign
     return DRFLAC_TRUE;
 }
 
-
-
-static drflac_bool32 drflac__seek_to_byte(drflac_bs* bs, drflac_uint64 offsetFromStart)
+static drflac_bool32 drflac__seek_to_byte(drflac_bs *bs, drflac_uint64 offsetFromStart)
 {
     drflac_assert(bs != NULL);
     drflac_assert(offsetFromStart > 0);
 
-    // Seeking from the start is not quite as trivial as it sounds because the onSeek callback takes a signed 32-bit integer (which
-    // is intentional because it simplifies the implementation of the onSeek callbacks), however offsetFromStart is unsigned 64-bit.
-    // To resolve we just need to do an initial seek from the start, and then a series of offset seeks to make up the remainder.
+    // Seeking from the start is not quite as trivial as it sounds because the onSeek callback takes a signed 32-bit
+    // integer (which is intentional because it simplifies the implementation of the onSeek callbacks), however
+    // offsetFromStart is unsigned 64-bit. To resolve we just need to do an initial seek from the start, and then a
+    // series of offset seeks to make up the remainder.
     if (offsetFromStart > 0x7FFFFFFF) {
         drflac_uint64 bytesRemaining = offsetFromStart;
         if (!bs->onSeek(bs->pUserData, 0x7FFFFFFF, drflac_seek_origin_start)) {
@@ -1845,7 +1912,8 @@ static drflac_bool32 drflac__seek_to_byte(drflac_bs* bs, drflac_uint64 offsetFro
                 return DRFLAC_FALSE;
             }
         }
-    } else {
+    }
+    else {
         if (!bs->onSeek(bs->pUserData, (int)offsetFromStart, drflac_seek_origin_start)) {
             return DRFLAC_FALSE;
         }
@@ -1856,8 +1924,7 @@ static drflac_bool32 drflac__seek_to_byte(drflac_bs* bs, drflac_uint64 offsetFro
     return DRFLAC_TRUE;
 }
 
-
-static drflac_result drflac__read_utf8_coded_number(drflac_bs* bs, drflac_uint64* pNumberOut, drflac_uint8* pCRCOut)
+static drflac_result drflac__read_utf8_coded_number(drflac_bs *bs, drflac_uint64 *pNumberOut, drflac_uint8 *pCRCOut)
 {
     drflac_assert(bs != NULL);
     drflac_assert(pNumberOut != NULL);
@@ -1873,26 +1940,32 @@ static drflac_result drflac__read_utf8_coded_number(drflac_bs* bs, drflac_uint64
 
     if ((utf8[0] & 0x80) == 0) {
         *pNumberOut = utf8[0];
-        *pCRCOut = crc;
+        *pCRCOut    = crc;
         return DRFLAC_SUCCESS;
     }
 
     int byteCount = 1;
     if ((utf8[0] & 0xE0) == 0xC0) {
         byteCount = 2;
-    } else if ((utf8[0] & 0xF0) == 0xE0) {
+    }
+    else if ((utf8[0] & 0xF0) == 0xE0) {
         byteCount = 3;
-    } else if ((utf8[0] & 0xF8) == 0xF0) {
+    }
+    else if ((utf8[0] & 0xF8) == 0xF0) {
         byteCount = 4;
-    } else if ((utf8[0] & 0xFC) == 0xF8) {
+    }
+    else if ((utf8[0] & 0xFC) == 0xF8) {
         byteCount = 5;
-    } else if ((utf8[0] & 0xFE) == 0xFC) {
+    }
+    else if ((utf8[0] & 0xFE) == 0xFC) {
         byteCount = 6;
-    } else if ((utf8[0] & 0xFF) == 0xFE) {
+    }
+    else if ((utf8[0] & 0xFF) == 0xFE) {
         byteCount = 7;
-    } else {
+    }
+    else {
         *pNumberOut = 0;
-        return DRFLAC_CRC_MISMATCH;     // Bad UTF-8 encoding.
+        return DRFLAC_CRC_MISMATCH; // Bad UTF-8 encoding.
     }
 
     // Read extra bytes.
@@ -1910,18 +1983,19 @@ static drflac_result drflac__read_utf8_coded_number(drflac_bs* bs, drflac_uint64
     }
 
     *pNumberOut = result;
-    *pCRCOut = crc;
+    *pCRCOut    = crc;
     return DRFLAC_SUCCESS;
 }
 
-
-
-
 // The next two functions are responsible for calculating the prediction.
 //
-// When the bits per sample is >16 we need to use 64-bit integer arithmetic because otherwise we'll run out of precision. It's
-// safe to assume this will be slower on 32-bit platforms so we use a more optimal solution when the bits per sample is <=16.
-static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_32(drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pDecodedSamples)
+// When the bits per sample is >16 we need to use 64-bit integer arithmetic because otherwise we'll run out of
+// precision. It's safe to assume this will be slower on 32-bit platforms so we use a more optimal solution when the
+// bits per sample is <=16.
+static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_32(drflac_uint32 order,
+                                                                  drflac_int32 shift,
+                                                                  const drflac_int32 *coefficients,
+                                                                  drflac_int32 *pDecodedSamples)
 {
     drflac_assert(order <= 32);
 
@@ -1930,46 +2004,80 @@ static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_32(drflac_uint32
     // VC++ optimizes this to a single jmp. I've not yet verified this for other compilers.
     drflac_int32 prediction = 0;
 
-    switch (order)
-    {
-    case 32: prediction += coefficients[31] * pDecodedSamples[-32];
-    case 31: prediction += coefficients[30] * pDecodedSamples[-31];
-    case 30: prediction += coefficients[29] * pDecodedSamples[-30];
-    case 29: prediction += coefficients[28] * pDecodedSamples[-29];
-    case 28: prediction += coefficients[27] * pDecodedSamples[-28];
-    case 27: prediction += coefficients[26] * pDecodedSamples[-27];
-    case 26: prediction += coefficients[25] * pDecodedSamples[-26];
-    case 25: prediction += coefficients[24] * pDecodedSamples[-25];
-    case 24: prediction += coefficients[23] * pDecodedSamples[-24];
-    case 23: prediction += coefficients[22] * pDecodedSamples[-23];
-    case 22: prediction += coefficients[21] * pDecodedSamples[-22];
-    case 21: prediction += coefficients[20] * pDecodedSamples[-21];
-    case 20: prediction += coefficients[19] * pDecodedSamples[-20];
-    case 19: prediction += coefficients[18] * pDecodedSamples[-19];
-    case 18: prediction += coefficients[17] * pDecodedSamples[-18];
-    case 17: prediction += coefficients[16] * pDecodedSamples[-17];
-    case 16: prediction += coefficients[15] * pDecodedSamples[-16];
-    case 15: prediction += coefficients[14] * pDecodedSamples[-15];
-    case 14: prediction += coefficients[13] * pDecodedSamples[-14];
-    case 13: prediction += coefficients[12] * pDecodedSamples[-13];
-    case 12: prediction += coefficients[11] * pDecodedSamples[-12];
-    case 11: prediction += coefficients[10] * pDecodedSamples[-11];
-    case 10: prediction += coefficients[ 9] * pDecodedSamples[-10];
-    case  9: prediction += coefficients[ 8] * pDecodedSamples[- 9];
-    case  8: prediction += coefficients[ 7] * pDecodedSamples[- 8];
-    case  7: prediction += coefficients[ 6] * pDecodedSamples[- 7];
-    case  6: prediction += coefficients[ 5] * pDecodedSamples[- 6];
-    case  5: prediction += coefficients[ 4] * pDecodedSamples[- 5];
-    case  4: prediction += coefficients[ 3] * pDecodedSamples[- 4];
-    case  3: prediction += coefficients[ 2] * pDecodedSamples[- 3];
-    case  2: prediction += coefficients[ 1] * pDecodedSamples[- 2];
-    case  1: prediction += coefficients[ 0] * pDecodedSamples[- 1];
+    switch (order) {
+    case 32:
+        prediction += coefficients[31] * pDecodedSamples[-32];
+    case 31:
+        prediction += coefficients[30] * pDecodedSamples[-31];
+    case 30:
+        prediction += coefficients[29] * pDecodedSamples[-30];
+    case 29:
+        prediction += coefficients[28] * pDecodedSamples[-29];
+    case 28:
+        prediction += coefficients[27] * pDecodedSamples[-28];
+    case 27:
+        prediction += coefficients[26] * pDecodedSamples[-27];
+    case 26:
+        prediction += coefficients[25] * pDecodedSamples[-26];
+    case 25:
+        prediction += coefficients[24] * pDecodedSamples[-25];
+    case 24:
+        prediction += coefficients[23] * pDecodedSamples[-24];
+    case 23:
+        prediction += coefficients[22] * pDecodedSamples[-23];
+    case 22:
+        prediction += coefficients[21] * pDecodedSamples[-22];
+    case 21:
+        prediction += coefficients[20] * pDecodedSamples[-21];
+    case 20:
+        prediction += coefficients[19] * pDecodedSamples[-20];
+    case 19:
+        prediction += coefficients[18] * pDecodedSamples[-19];
+    case 18:
+        prediction += coefficients[17] * pDecodedSamples[-18];
+    case 17:
+        prediction += coefficients[16] * pDecodedSamples[-17];
+    case 16:
+        prediction += coefficients[15] * pDecodedSamples[-16];
+    case 15:
+        prediction += coefficients[14] * pDecodedSamples[-15];
+    case 14:
+        prediction += coefficients[13] * pDecodedSamples[-14];
+    case 13:
+        prediction += coefficients[12] * pDecodedSamples[-13];
+    case 12:
+        prediction += coefficients[11] * pDecodedSamples[-12];
+    case 11:
+        prediction += coefficients[10] * pDecodedSamples[-11];
+    case 10:
+        prediction += coefficients[9] * pDecodedSamples[-10];
+    case 9:
+        prediction += coefficients[8] * pDecodedSamples[-9];
+    case 8:
+        prediction += coefficients[7] * pDecodedSamples[-8];
+    case 7:
+        prediction += coefficients[6] * pDecodedSamples[-7];
+    case 6:
+        prediction += coefficients[5] * pDecodedSamples[-6];
+    case 5:
+        prediction += coefficients[4] * pDecodedSamples[-5];
+    case 4:
+        prediction += coefficients[3] * pDecodedSamples[-4];
+    case 3:
+        prediction += coefficients[2] * pDecodedSamples[-3];
+    case 2:
+        prediction += coefficients[1] * pDecodedSamples[-2];
+    case 1:
+        prediction += coefficients[0] * pDecodedSamples[-1];
     }
 
     return (drflac_int32)(prediction >> shift);
 }
 
-static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_64(drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pDecodedSamples)
+static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_64(drflac_uint32 order,
+                                                                  drflac_int32 shift,
+                                                                  const drflac_int32 *coefficients,
+                                                                  drflac_int32 *pDecodedSamples)
 {
     drflac_assert(order <= 32);
 
@@ -1978,9 +2086,8 @@ static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_64(drflac_uint32
     // This method is faster on the 32-bit build when compiling with VC++. See note below.
 #ifndef DRFLAC_64BIT
     drflac_int64 prediction;
-    if (order == 8)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    if (order == 8) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
         prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
@@ -1989,9 +2096,8 @@ static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_64(drflac_uint32
         prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
         prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
     }
-    else if (order == 7)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 7) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
         prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
@@ -1999,147 +2105,168 @@ static DRFLAC_INLINE drflac_int32 drflac__calculate_prediction_64(drflac_uint32
         prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
         prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
     }
-    else if (order == 3)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 3) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
     }
-    else if (order == 6)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 6) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
         prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
         prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
         prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
     }
-    else if (order == 5)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 5) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
         prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
         prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
     }
-    else if (order == 4)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 4) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
         prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
         prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
     }
-    else if (order == 12)
-    {
-        prediction  = coefficients[0]  * (drflac_int64)pDecodedSamples[-1];
-        prediction += coefficients[1]  * (drflac_int64)pDecodedSamples[-2];
-        prediction += coefficients[2]  * (drflac_int64)pDecodedSamples[-3];
-        prediction += coefficients[3]  * (drflac_int64)pDecodedSamples[-4];
-        prediction += coefficients[4]  * (drflac_int64)pDecodedSamples[-5];
-        prediction += coefficients[5]  * (drflac_int64)pDecodedSamples[-6];
-        prediction += coefficients[6]  * (drflac_int64)pDecodedSamples[-7];
-        prediction += coefficients[7]  * (drflac_int64)pDecodedSamples[-8];
-        prediction += coefficients[8]  * (drflac_int64)pDecodedSamples[-9];
-        prediction += coefficients[9]  * (drflac_int64)pDecodedSamples[-10];
+    else if (order == 12) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+        prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
+        prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
+        prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
+        prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
+        prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
+        prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
+        prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
+        prediction += coefficients[8] * (drflac_int64)pDecodedSamples[-9];
+        prediction += coefficients[9] * (drflac_int64)pDecodedSamples[-10];
         prediction += coefficients[10] * (drflac_int64)pDecodedSamples[-11];
         prediction += coefficients[11] * (drflac_int64)pDecodedSamples[-12];
     }
-    else if (order == 2)
-    {
-        prediction  = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+    else if (order == 2) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
         prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
     }
-    else if (order == 1)
-    {
+    else if (order == 1) {
         prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
     }
-    else if (order == 10)
-    {
-        prediction  = coefficients[0]  * (drflac_int64)pDecodedSamples[-1];
-        prediction += coefficients[1]  * (drflac_int64)pDecodedSamples[-2];
-        prediction += coefficients[2]  * (drflac_int64)pDecodedSamples[-3];
-        prediction += coefficients[3]  * (drflac_int64)pDecodedSamples[-4];
-        prediction += coefficients[4]  * (drflac_int64)pDecodedSamples[-5];
-        prediction += coefficients[5]  * (drflac_int64)pDecodedSamples[-6];
-        prediction += coefficients[6]  * (drflac_int64)pDecodedSamples[-7];
-        prediction += coefficients[7]  * (drflac_int64)pDecodedSamples[-8];
-        prediction += coefficients[8]  * (drflac_int64)pDecodedSamples[-9];
-        prediction += coefficients[9]  * (drflac_int64)pDecodedSamples[-10];
+    else if (order == 10) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+        prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
+        prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
+        prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
+        prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
+        prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
+        prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
+        prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
+        prediction += coefficients[8] * (drflac_int64)pDecodedSamples[-9];
+        prediction += coefficients[9] * (drflac_int64)pDecodedSamples[-10];
     }
-    else if (order == 9)
-    {
-        prediction  = coefficients[0]  * (drflac_int64)pDecodedSamples[-1];
-        prediction += coefficients[1]  * (drflac_int64)pDecodedSamples[-2];
-        prediction += coefficients[2]  * (drflac_int64)pDecodedSamples[-3];
-        prediction += coefficients[3]  * (drflac_int64)pDecodedSamples[-4];
-        prediction += coefficients[4]  * (drflac_int64)pDecodedSamples[-5];
-        prediction += coefficients[5]  * (drflac_int64)pDecodedSamples[-6];
-        prediction += coefficients[6]  * (drflac_int64)pDecodedSamples[-7];
-        prediction += coefficients[7]  * (drflac_int64)pDecodedSamples[-8];
-        prediction += coefficients[8]  * (drflac_int64)pDecodedSamples[-9];
+    else if (order == 9) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+        prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
+        prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
+        prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
+        prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
+        prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
+        prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
+        prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
+        prediction += coefficients[8] * (drflac_int64)pDecodedSamples[-9];
     }
-    else if (order == 11)
-    {
-        prediction  = coefficients[0]  * (drflac_int64)pDecodedSamples[-1];
-        prediction += coefficients[1]  * (drflac_int64)pDecodedSamples[-2];
-        prediction += coefficients[2]  * (drflac_int64)pDecodedSamples[-3];
-        prediction += coefficients[3]  * (drflac_int64)pDecodedSamples[-4];
-        prediction += coefficients[4]  * (drflac_int64)pDecodedSamples[-5];
-        prediction += coefficients[5]  * (drflac_int64)pDecodedSamples[-6];
-        prediction += coefficients[6]  * (drflac_int64)pDecodedSamples[-7];
-        prediction += coefficients[7]  * (drflac_int64)pDecodedSamples[-8];
-        prediction += coefficients[8]  * (drflac_int64)pDecodedSamples[-9];
-        prediction += coefficients[9]  * (drflac_int64)pDecodedSamples[-10];
+    else if (order == 11) {
+        prediction = coefficients[0] * (drflac_int64)pDecodedSamples[-1];
+        prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
+        prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
+        prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
+        prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
+        prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
+        prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
+        prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
+        prediction += coefficients[8] * (drflac_int64)pDecodedSamples[-9];
+        prediction += coefficients[9] * (drflac_int64)pDecodedSamples[-10];
         prediction += coefficients[10] * (drflac_int64)pDecodedSamples[-11];
     }
-    else
-    {
+    else {
         prediction = 0;
         for (int j = 0; j < (int)order; ++j) {
-            prediction += coefficients[j] * (drflac_int64)pDecodedSamples[-j-1];
+            prediction += coefficients[j] * (drflac_int64)pDecodedSamples[-j - 1];
         }
     }
 #endif
 
-    // VC++ optimizes this to a single jmp instruction, but only the 64-bit build. The 32-bit build generates less efficient code for some
-    // reason. The ugly version above is faster so we'll just switch between the two depending on the target platform.
+    // VC++ optimizes this to a single jmp instruction, but only the 64-bit build. The 32-bit build generates less
+    // efficient code for some reason. The ugly version above is faster so we'll just switch between the two depending
+    // on the target platform.
 #ifdef DRFLAC_64BIT
     drflac_int64 prediction = 0;
 
-    switch (order)
-    {
-    case 32: prediction += coefficients[31] * (drflac_int64)pDecodedSamples[-32];
-    case 31: prediction += coefficients[30] * (drflac_int64)pDecodedSamples[-31];
-    case 30: prediction += coefficients[29] * (drflac_int64)pDecodedSamples[-30];
-    case 29: prediction += coefficients[28] * (drflac_int64)pDecodedSamples[-29];
-    case 28: prediction += coefficients[27] * (drflac_int64)pDecodedSamples[-28];
-    case 27: prediction += coefficients[26] * (drflac_int64)pDecodedSamples[-27];
-    case 26: prediction += coefficients[25] * (drflac_int64)pDecodedSamples[-26];
-    case 25: prediction += coefficients[24] * (drflac_int64)pDecodedSamples[-25];
-    case 24: prediction += coefficients[23] * (drflac_int64)pDecodedSamples[-24];
-    case 23: prediction += coefficients[22] * (drflac_int64)pDecodedSamples[-23];
-    case 22: prediction += coefficients[21] * (drflac_int64)pDecodedSamples[-22];
-    case 21: prediction += coefficients[20] * (drflac_int64)pDecodedSamples[-21];
-    case 20: prediction += coefficients[19] * (drflac_int64)pDecodedSamples[-20];
-    case 19: prediction += coefficients[18] * (drflac_int64)pDecodedSamples[-19];
-    case 18: prediction += coefficients[17] * (drflac_int64)pDecodedSamples[-18];
-    case 17: prediction += coefficients[16] * (drflac_int64)pDecodedSamples[-17];
-    case 16: prediction += coefficients[15] * (drflac_int64)pDecodedSamples[-16];
-    case 15: prediction += coefficients[14] * (drflac_int64)pDecodedSamples[-15];
-    case 14: prediction += coefficients[13] * (drflac_int64)pDecodedSamples[-14];
-    case 13: prediction += coefficients[12] * (drflac_int64)pDecodedSamples[-13];
-    case 12: prediction += coefficients[11] * (drflac_int64)pDecodedSamples[-12];
-    case 11: prediction += coefficients[10] * (drflac_int64)pDecodedSamples[-11];
-    case 10: prediction += coefficients[ 9] * (drflac_int64)pDecodedSamples[-10];
-    case  9: prediction += coefficients[ 8] * (drflac_int64)pDecodedSamples[- 9];
-    case  8: prediction += coefficients[ 7] * (drflac_int64)pDecodedSamples[- 8];
-    case  7: prediction += coefficients[ 6] * (drflac_int64)pDecodedSamples[- 7];
-    case  6: prediction += coefficients[ 5] * (drflac_int64)pDecodedSamples[- 6];
-    case  5: prediction += coefficients[ 4] * (drflac_int64)pDecodedSamples[- 5];
-    case  4: prediction += coefficients[ 3] * (drflac_int64)pDecodedSamples[- 4];
-    case  3: prediction += coefficients[ 2] * (drflac_int64)pDecodedSamples[- 3];
-    case  2: prediction += coefficients[ 1] * (drflac_int64)pDecodedSamples[- 2];
-    case  1: prediction += coefficients[ 0] * (drflac_int64)pDecodedSamples[- 1];
+    switch (order) {
+    case 32:
+        prediction += coefficients[31] * (drflac_int64)pDecodedSamples[-32];
+    case 31:
+        prediction += coefficients[30] * (drflac_int64)pDecodedSamples[-31];
+    case 30:
+        prediction += coefficients[29] * (drflac_int64)pDecodedSamples[-30];
+    case 29:
+        prediction += coefficients[28] * (drflac_int64)pDecodedSamples[-29];
+    case 28:
+        prediction += coefficients[27] * (drflac_int64)pDecodedSamples[-28];
+    case 27:
+        prediction += coefficients[26] * (drflac_int64)pDecodedSamples[-27];
+    case 26:
+        prediction += coefficients[25] * (drflac_int64)pDecodedSamples[-26];
+    case 25:
+        prediction += coefficients[24] * (drflac_int64)pDecodedSamples[-25];
+    case 24:
+        prediction += coefficients[23] * (drflac_int64)pDecodedSamples[-24];
+    case 23:
+        prediction += coefficients[22] * (drflac_int64)pDecodedSamples[-23];
+    case 22:
+        prediction += coefficients[21] * (drflac_int64)pDecodedSamples[-22];
+    case 21:
+        prediction += coefficients[20] * (drflac_int64)pDecodedSamples[-21];
+    case 20:
+        prediction += coefficients[19] * (drflac_int64)pDecodedSamples[-20];
+    case 19:
+        prediction += coefficients[18] * (drflac_int64)pDecodedSamples[-19];
+    case 18:
+        prediction += coefficients[17] * (drflac_int64)pDecodedSamples[-18];
+    case 17:
+        prediction += coefficients[16] * (drflac_int64)pDecodedSamples[-17];
+    case 16:
+        prediction += coefficients[15] * (drflac_int64)pDecodedSamples[-16];
+    case 15:
+        prediction += coefficients[14] * (drflac_int64)pDecodedSamples[-15];
+    case 14:
+        prediction += coefficients[13] * (drflac_int64)pDecodedSamples[-14];
+    case 13:
+        prediction += coefficients[12] * (drflac_int64)pDecodedSamples[-13];
+    case 12:
+        prediction += coefficients[11] * (drflac_int64)pDecodedSamples[-12];
+    case 11:
+        prediction += coefficients[10] * (drflac_int64)pDecodedSamples[-11];
+    case 10:
+        prediction += coefficients[9] * (drflac_int64)pDecodedSamples[-10];
+    case 9:
+        prediction += coefficients[8] * (drflac_int64)pDecodedSamples[-9];
+    case 8:
+        prediction += coefficients[7] * (drflac_int64)pDecodedSamples[-8];
+    case 7:
+        prediction += coefficients[6] * (drflac_int64)pDecodedSamples[-7];
+    case 6:
+        prediction += coefficients[5] * (drflac_int64)pDecodedSamples[-6];
+    case 5:
+        prediction += coefficients[4] * (drflac_int64)pDecodedSamples[-5];
+    case 4:
+        prediction += coefficients[3] * (drflac_int64)pDecodedSamples[-4];
+    case 3:
+        prediction += coefficients[2] * (drflac_int64)pDecodedSamples[-3];
+    case 2:
+        prediction += coefficients[1] * (drflac_int64)pDecodedSamples[-2];
+    case 1:
+        prediction += coefficients[0] * (drflac_int64)pDecodedSamples[-1];
     }
 #endif
 
@@ -2230,12 +2357,14 @@ static drflac_bool32 drflac__read_rice_parts__reference(drflac_bs* bs, drflac_ui
 }
 #endif
 
-static DRFLAC_INLINE drflac_bool32 drflac__read_rice_parts(drflac_bs* bs, drflac_uint8 riceParam, drflac_uint32* pZeroCounterOut, drflac_uint32* pRiceParamPartOut)
+static DRFLAC_INLINE drflac_bool32 drflac__read_rice_parts(drflac_bs *bs,
+                                                           drflac_uint8 riceParam,
+                                                           drflac_uint32 *pZeroCounterOut,
+                                                           drflac_uint32 *pRiceParamPartOut)
 {
     drflac_cache_t riceParamMask = DRFLAC_CACHE_L1_SELECTION_MASK(riceParam);
     drflac_cache_t resultHiShift = DRFLAC_CACHE_L1_SIZE_BITS(bs) - riceParam;
 
-
     drflac_uint32 zeroCounter = 0;
     while (bs->cache == 0) {
         zeroCounter += (drflac_uint32)DRFLAC_CACHE_L1_BITS_REMAINING(bs);
@@ -2248,34 +2377,38 @@ static DRFLAC_INLINE drflac_bool32 drflac__read_rice_parts(drflac_bs* bs, drflac
     zeroCounter += setBitOffsetPlus1;
     setBitOffsetPlus1 += 1;
 
-
     drflac_uint32 riceParamPart;
     drflac_uint32 riceLength = setBitOffsetPlus1 + riceParam;
     if (riceLength < DRFLAC_CACHE_L1_BITS_REMAINING(bs)) {
-        riceParamPart = (drflac_uint32)((bs->cache & (riceParamMask >> setBitOffsetPlus1)) >> (DRFLAC_CACHE_L1_SIZE_BITS(bs) - riceLength));
+        riceParamPart = (drflac_uint32)((bs->cache & (riceParamMask >> setBitOffsetPlus1)) >>
+                                        (DRFLAC_CACHE_L1_SIZE_BITS(bs) - riceLength));
 
         bs->consumedBits += riceLength;
         bs->cache <<= riceLength;
-    } else {
+    }
+    else {
         bs->consumedBits += riceLength;
         if (setBitOffsetPlus1 < DRFLAC_CACHE_L1_SIZE_BITS(bs)) {
             bs->cache <<= setBitOffsetPlus1;
         }
 
-        // It straddles the cached data. It will never cover more than the next chunk. We just read the number in two parts and combine them.
+        // It straddles the cached data. It will never cover more than the next chunk. We just read the number in two
+        // parts and combine them.
         drflac_uint32 bitCountLo = bs->consumedBits - DRFLAC_CACHE_L1_SIZE_BITS(bs);
-        drflac_cache_t resultHi = bs->cache & riceParamMask;    // <-- This mask is OK because all bits after the first bits are always zero.
+        drflac_cache_t resultHi =
+            bs->cache & riceParamMask; // <-- This mask is OK because all bits after the first bits are always zero.
 
         if (bs->nextL2Line < DRFLAC_CACHE_L2_LINE_COUNT(bs)) {
-        #ifndef DR_FLAC_NO_CRC
+#ifndef DR_FLAC_NO_CRC
             drflac__update_crc16(bs);
-        #endif
-            bs->cache = drflac__be2host__cache_line(bs->cacheL2[bs->nextL2Line++]);
+#endif
+            bs->cache        = drflac__be2host__cache_line(bs->cacheL2[bs->nextL2Line++]);
             bs->consumedBits = 0;
-        #ifndef DR_FLAC_NO_CRC
+#ifndef DR_FLAC_NO_CRC
             bs->crc16Cache = bs->cache;
-        #endif
-        } else {
+#endif
+        }
+        else {
             // Slow path. We need to fetch more data from the client.
             if (!drflac__reload_cache(bs)) {
                 return DRFLAC_FALSE;
@@ -2288,13 +2421,19 @@ static DRFLAC_INLINE drflac_bool32 drflac__read_rice_parts(drflac_bs* bs, drflac
         bs->cache <<= bitCountLo;
     }
 
-    *pZeroCounterOut = zeroCounter;
+    *pZeroCounterOut   = zeroCounter;
     *pRiceParamPartOut = riceParamPart;
     return DRFLAC_TRUE;
 }
 
-
-static drflac_bool32 drflac__decode_samples_with_residual__rice__simple(drflac_bs* bs, drflac_uint32 bitsPerSample, drflac_uint32 count, drflac_uint8 riceParam, drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pSamplesOut)
+static drflac_bool32 drflac__decode_samples_with_residual__rice__simple(drflac_bs *bs,
+                                                                        drflac_uint32 bitsPerSample,
+                                                                        drflac_uint32 count,
+                                                                        drflac_uint8 riceParam,
+                                                                        drflac_uint32 order,
+                                                                        drflac_int32 shift,
+                                                                        const drflac_int32 *coefficients,
+                                                                        drflac_int32 *pSamplesOut)
 {
     drflac_assert(bs != NULL);
     drflac_assert(count > 0);
@@ -2314,14 +2453,17 @@ static drflac_bool32 drflac__decode_samples_with_residual__rice__simple(drflac_b
         static drflac_uint32 t[2] = {0x00000000, 0xFFFFFFFF};
 
         riceParamPart |= (zeroCountPart << riceParam);
-        riceParamPart  = (riceParamPart >> 1) ^ t[riceParamPart & 0x01];
-        //riceParamPart  = (riceParamPart >> 1) ^ (~(riceParamPart & 0x01) + 1);
+        riceParamPart = (riceParamPart >> 1) ^ t[riceParamPart & 0x01];
+        // riceParamPart  = (riceParamPart >> 1) ^ (~(riceParamPart & 0x01) + 1);
 
         // Sample reconstruction.
         if (bitsPerSample > 16) {
-            pSamplesOut[i] = riceParamPart + drflac__calculate_prediction_64(order, shift, coefficients, pSamplesOut + i);
-        } else {
-            pSamplesOut[i] = riceParamPart + drflac__calculate_prediction_32(order, shift, coefficients, pSamplesOut + i);
+            pSamplesOut[i] =
+                riceParamPart + drflac__calculate_prediction_64(order, shift, coefficients, pSamplesOut + i);
+        }
+        else {
+            pSamplesOut[i] =
+                riceParamPart + drflac__calculate_prediction_32(order, shift, coefficients, pSamplesOut + i);
         }
 
         i += 1;
@@ -2330,17 +2472,26 @@ static drflac_bool32 drflac__decode_samples_with_residual__rice__simple(drflac_b
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_samples_with_residual__rice(drflac_bs* bs, drflac_uint32 bitsPerSample, drflac_uint32 count, drflac_uint8 riceParam, drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pSamplesOut)
+static drflac_bool32 drflac__decode_samples_with_residual__rice(drflac_bs *bs,
+                                                                drflac_uint32 bitsPerSample,
+                                                                drflac_uint32 count,
+                                                                drflac_uint8 riceParam,
+                                                                drflac_uint32 order,
+                                                                drflac_int32 shift,
+                                                                const drflac_int32 *coefficients,
+                                                                drflac_int32 *pSamplesOut)
 {
 #if 0
     return drflac__decode_samples_with_residual__rice__reference(bs, bitsPerSample, count, riceParam, order, shift, coefficients, pSamplesOut);
 #else
-    return drflac__decode_samples_with_residual__rice__simple(bs, bitsPerSample, count, riceParam, order, shift, coefficients, pSamplesOut);
+    return drflac__decode_samples_with_residual__rice__simple(
+        bs, bitsPerSample, count, riceParam, order, shift, coefficients, pSamplesOut);
 #endif
 }
 
-// Reads and seeks past a string of residual values as Rice codes. The decoder should be sitting on the first bit of the Rice codes.
-static drflac_bool32 drflac__read_and_seek_residual__rice(drflac_bs* bs, drflac_uint32 count, drflac_uint8 riceParam)
+// Reads and seeks past a string of residual values as Rice codes. The decoder should be sitting on the first bit of the
+// Rice codes.
+static drflac_bool32 drflac__read_and_seek_residual__rice(drflac_bs *bs, drflac_uint32 count, drflac_uint8 riceParam)
 {
     drflac_assert(bs != NULL);
     drflac_assert(count > 0);
@@ -2356,7 +2507,14 @@ static drflac_bool32 drflac__read_and_seek_residual__rice(drflac_bs* bs, drflac_
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_samples_with_residual__unencoded(drflac_bs* bs, drflac_uint32 bitsPerSample, drflac_uint32 count, drflac_uint8 unencodedBitsPerSample, drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pSamplesOut)
+static drflac_bool32 drflac__decode_samples_with_residual__unencoded(drflac_bs *bs,
+                                                                     drflac_uint32 bitsPerSample,
+                                                                     drflac_uint32 count,
+                                                                     drflac_uint8 unencodedBitsPerSample,
+                                                                     drflac_uint32 order,
+                                                                     drflac_int32 shift,
+                                                                     const drflac_int32 *coefficients,
+                                                                     drflac_int32 *pSamplesOut)
 {
     drflac_assert(bs != NULL);
     drflac_assert(count > 0);
@@ -2370,7 +2528,8 @@ static drflac_bool32 drflac__decode_samples_with_residual__unencoded(drflac_bs*
 
         if (bitsPerSample > 16) {
             pSamplesOut[i] += drflac__calculate_prediction_64(order, shift, coefficients, pSamplesOut + i);
-        } else {
+        }
+        else {
             pSamplesOut[i] += drflac__calculate_prediction_32(order, shift, coefficients, pSamplesOut + i);
         }
     }
@@ -2378,29 +2537,36 @@ static drflac_bool32 drflac__decode_samples_with_residual__unencoded(drflac_bs*
     return DRFLAC_TRUE;
 }
 
-
 // Reads and decodes the residual for the sub-frame the decoder is currently sitting on. This function should be called
 // when the decoder is sitting at the very start of the RESIDUAL block. The first <order> residuals will be ignored. The
 // <blockSize> and <order> parameters are used to determine how many residual values need to be decoded.
-static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs* bs, drflac_uint32 bitsPerSample, drflac_uint32 blockSize, drflac_uint32 order, drflac_int32 shift, const drflac_int32* coefficients, drflac_int32* pDecodedSamples)
+static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs *bs,
+                                                          drflac_uint32 bitsPerSample,
+                                                          drflac_uint32 blockSize,
+                                                          drflac_uint32 order,
+                                                          drflac_int32 shift,
+                                                          const drflac_int32 *coefficients,
+                                                          drflac_int32 *pDecodedSamples)
 {
     drflac_assert(bs != NULL);
     drflac_assert(blockSize != 0);
-    drflac_assert(pDecodedSamples != NULL);       // <-- Should we allow NULL, in which case we just seek past the residual rather than do a full decode?
+    drflac_assert(
+        pDecodedSamples !=
+        NULL); // <-- Should we allow NULL, in which case we just seek past the residual rather than do a full decode?
 
     drflac_uint8 residualMethod;
     if (!drflac__read_uint8(bs, 2, &residualMethod)) {
         return DRFLAC_FALSE;
     }
 
-    if (residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE && residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
-        return DRFLAC_FALSE;    // Unknown or unsupported residual coding method.
+    if (residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE &&
+        residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
+        return DRFLAC_FALSE; // Unknown or unsupported residual coding method.
     }
 
     // Ignore the first <order> values.
     pDecodedSamples += order;
 
-
     drflac_uint8 partitionOrder;
     if (!drflac__read_uint8(bs, 4, &partitionOrder)) {
         return DRFLAC_FALSE;
@@ -2417,7 +2583,7 @@ static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs* bs, drflac_
         return DRFLAC_FALSE;
     }
 
-    drflac_uint32 samplesInPartition = (blockSize / (1 << partitionOrder)) - order;
+    drflac_uint32 samplesInPartition  = (blockSize / (1 << partitionOrder)) - order;
     drflac_uint32 partitionsRemaining = (1 << partitionOrder);
     for (;;) {
         drflac_uint8 riceParam = 0;
@@ -2428,7 +2594,8 @@ static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs* bs, drflac_
             if (riceParam == 16) {
                 riceParam = 0xFF;
             }
-        } else if (residualMethod == DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
+        }
+        else if (residualMethod == DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
             if (!drflac__read_uint8(bs, 5, &riceParam)) {
                 return DRFLAC_FALSE;
             }
@@ -2438,23 +2605,31 @@ static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs* bs, drflac_
         }
 
         if (riceParam != 0xFF) {
-            if (!drflac__decode_samples_with_residual__rice(bs, bitsPerSample, samplesInPartition, riceParam, order, shift, coefficients, pDecodedSamples)) {
+            if (!drflac__decode_samples_with_residual__rice(
+                    bs, bitsPerSample, samplesInPartition, riceParam, order, shift, coefficients, pDecodedSamples)) {
                 return DRFLAC_FALSE;
             }
-        } else {
+        }
+        else {
             unsigned char unencodedBitsPerSample = 0;
             if (!drflac__read_uint8(bs, 5, &unencodedBitsPerSample)) {
                 return DRFLAC_FALSE;
             }
 
-            if (!drflac__decode_samples_with_residual__unencoded(bs, bitsPerSample, samplesInPartition, unencodedBitsPerSample, order, shift, coefficients, pDecodedSamples)) {
+            if (!drflac__decode_samples_with_residual__unencoded(bs,
+                                                                 bitsPerSample,
+                                                                 samplesInPartition,
+                                                                 unencodedBitsPerSample,
+                                                                 order,
+                                                                 shift,
+                                                                 coefficients,
+                                                                 pDecodedSamples)) {
                 return DRFLAC_FALSE;
             }
         }
 
         pDecodedSamples += samplesInPartition;
 
-
         if (partitionsRemaining == 1) {
             break;
         }
@@ -2469,10 +2644,10 @@ static drflac_bool32 drflac__decode_samples_with_residual(drflac_bs* bs, drflac_
     return DRFLAC_TRUE;
 }
 
-// Reads and seeks past the residual for the sub-frame the decoder is currently sitting on. This function should be called
-// when the decoder is sitting at the very start of the RESIDUAL block. The first <order> residuals will be set to 0. The
-// <blockSize> and <order> parameters are used to determine how many residual values need to be decoded.
-static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32 blockSize, drflac_uint32 order)
+// Reads and seeks past the residual for the sub-frame the decoder is currently sitting on. This function should be
+// called when the decoder is sitting at the very start of the RESIDUAL block. The first <order> residuals will be set
+// to 0. The <blockSize> and <order> parameters are used to determine how many residual values need to be decoded.
+static drflac_bool32 drflac__read_and_seek_residual(drflac_bs *bs, drflac_uint32 blockSize, drflac_uint32 order)
 {
     drflac_assert(bs != NULL);
     drflac_assert(blockSize != 0);
@@ -2482,8 +2657,9 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
         return DRFLAC_FALSE;
     }
 
-    if (residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE && residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
-        return DRFLAC_FALSE;    // Unknown or unsupported residual coding method.
+    if (residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE &&
+        residualMethod != DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
+        return DRFLAC_FALSE; // Unknown or unsupported residual coding method.
     }
 
     drflac_uint8 partitionOrder;
@@ -2491,10 +2667,9 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
         return DRFLAC_FALSE;
     }
 
-    drflac_uint32 samplesInPartition = (blockSize / (1 << partitionOrder)) - order;
+    drflac_uint32 samplesInPartition  = (blockSize / (1 << partitionOrder)) - order;
     drflac_uint32 partitionsRemaining = (1 << partitionOrder);
-    for (;;)
-    {
+    for (;;) {
         drflac_uint8 riceParam = 0;
         if (residualMethod == DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE) {
             if (!drflac__read_uint8(bs, 4, &riceParam)) {
@@ -2503,7 +2678,8 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
             if (riceParam == 16) {
                 riceParam = 0xFF;
             }
-        } else if (residualMethod == DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
+        }
+        else if (residualMethod == DRFLAC_RESIDUAL_CODING_METHOD_PARTITIONED_RICE2) {
             if (!drflac__read_uint8(bs, 5, &riceParam)) {
                 return DRFLAC_FALSE;
             }
@@ -2516,7 +2692,8 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
             if (!drflac__read_and_seek_residual__rice(bs, samplesInPartition, riceParam)) {
                 return DRFLAC_FALSE;
             }
-        } else {
+        }
+        else {
             unsigned char unencodedBitsPerSample = 0;
             if (!drflac__read_uint8(bs, 5, &unencodedBitsPerSample)) {
                 return DRFLAC_FALSE;
@@ -2527,7 +2704,6 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
             }
         }
 
-
         if (partitionsRemaining == 1) {
             break;
         }
@@ -2539,8 +2715,10 @@ static drflac_bool32 drflac__read_and_seek_residual(drflac_bs* bs, drflac_uint32
     return DRFLAC_TRUE;
 }
 
-
-static drflac_bool32 drflac__decode_samples__constant(drflac_bs* bs, drflac_uint32 blockSize, drflac_uint32 bitsPerSample, drflac_int32* pDecodedSamples)
+static drflac_bool32 drflac__decode_samples__constant(drflac_bs *bs,
+                                                      drflac_uint32 blockSize,
+                                                      drflac_uint32 bitsPerSample,
+                                                      drflac_int32 *pDecodedSamples)
 {
     // Only a single sample needs to be decoded here.
     drflac_int32 sample;
@@ -2548,8 +2726,8 @@ static drflac_bool32 drflac__decode_samples__constant(drflac_bs* bs, drflac_uint
         return DRFLAC_FALSE;
     }
 
-    // We don't really need to expand this, but it does simplify the process of reading samples. If this becomes a performance issue (unlikely)
-    // we'll want to look at a more efficient way.
+    // We don't really need to expand this, but it does simplify the process of reading samples. If this becomes a
+    // performance issue (unlikely) we'll want to look at a more efficient way.
     for (drflac_uint32 i = 0; i < blockSize; ++i) {
         pDecodedSamples[i] = sample;
     }
@@ -2557,7 +2735,10 @@ static drflac_bool32 drflac__decode_samples__constant(drflac_bs* bs, drflac_uint
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_samples__verbatim(drflac_bs* bs, drflac_uint32 blockSize, drflac_uint32 bitsPerSample, drflac_int32* pDecodedSamples)
+static drflac_bool32 drflac__decode_samples__verbatim(drflac_bs *bs,
+                                                      drflac_uint32 blockSize,
+                                                      drflac_uint32 bitsPerSample,
+                                                      drflac_int32 *pDecodedSamples)
 {
     for (drflac_uint32 i = 0; i < blockSize; ++i) {
         drflac_int32 sample;
@@ -2571,15 +2752,14 @@ static drflac_bool32 drflac__decode_samples__verbatim(drflac_bs* bs, drflac_uint
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_samples__fixed(drflac_bs* bs, drflac_uint32 blockSize, drflac_uint32 bitsPerSample, drflac_uint8 lpcOrder, drflac_int32* pDecodedSamples)
+static drflac_bool32 drflac__decode_samples__fixed(drflac_bs *bs,
+                                                   drflac_uint32 blockSize,
+                                                   drflac_uint32 bitsPerSample,
+                                                   drflac_uint8 lpcOrder,
+                                                   drflac_int32 *pDecodedSamples)
 {
     drflac_int32 lpcCoefficientsTable[5][4] = {
-        {0,  0, 0,  0},
-        {1,  0, 0,  0},
-        {2, -1, 0,  0},
-        {3, -3, 1,  0},
-        {4, -6, 4, -1}
-    };
+        {0, 0, 0, 0}, {1, 0, 0, 0}, {2, -1, 0, 0}, {3, -3, 1, 0}, {4, -6, 4, -1}};
 
     // Warm up samples and coefficients.
     for (drflac_uint32 i = 0; i < lpcOrder; ++i) {
@@ -2591,15 +2771,19 @@ static drflac_bool32 drflac__decode_samples__fixed(drflac_bs* bs, drflac_uint32
         pDecodedSamples[i] = sample;
     }
 
-
-    if (!drflac__decode_samples_with_residual(bs, bitsPerSample, blockSize, lpcOrder, 0, lpcCoefficientsTable[lpcOrder], pDecodedSamples)) {
+    if (!drflac__decode_samples_with_residual(
+            bs, bitsPerSample, blockSize, lpcOrder, 0, lpcCoefficientsTable[lpcOrder], pDecodedSamples)) {
         return DRFLAC_FALSE;
     }
 
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_samples__lpc(drflac_bs* bs, drflac_uint32 blockSize, drflac_uint32 bitsPerSample, drflac_uint8 lpcOrder, drflac_int32* pDecodedSamples)
+static drflac_bool32 drflac__decode_samples__lpc(drflac_bs *bs,
+                                                 drflac_uint32 blockSize,
+                                                 drflac_uint32 bitsPerSample,
+                                                 drflac_uint8 lpcOrder,
+                                                 drflac_int32 *pDecodedSamples)
 {
     drflac_uint8 i;
 
@@ -2618,17 +2802,15 @@ static drflac_bool32 drflac__decode_samples__lpc(drflac_bs* bs, drflac_uint32 bl
         return DRFLAC_FALSE;
     }
     if (lpcPrecision == 15) {
-        return DRFLAC_FALSE;    // Invalid.
+        return DRFLAC_FALSE; // Invalid.
     }
     lpcPrecision += 1;
 
-
     drflac_int8 lpcShift;
     if (!drflac__read_int8(bs, 5, &lpcShift)) {
         return DRFLAC_FALSE;
     }
 
-
     drflac_int32 coefficients[32];
     for (i = 0; i < lpcOrder; ++i) {
         if (!drflac__read_int32(bs, lpcPrecision, coefficients + i)) {
@@ -2636,21 +2818,25 @@ static drflac_bool32 drflac__decode_samples__lpc(drflac_bs* bs, drflac_uint32 bl
         }
     }
 
-    if (!drflac__decode_samples_with_residual(bs, bitsPerSample, blockSize, lpcOrder, lpcShift, coefficients, pDecodedSamples)) {
+    if (!drflac__decode_samples_with_residual(
+            bs, bitsPerSample, blockSize, lpcOrder, lpcShift, coefficients, pDecodedSamples)) {
         return DRFLAC_FALSE;
     }
 
     return DRFLAC_TRUE;
 }
 
-
-static drflac_bool32 drflac__read_next_frame_header(drflac_bs* bs, drflac_uint8 streaminfoBitsPerSample, drflac_frame_header* header)
+static drflac_bool32 drflac__read_next_frame_header(drflac_bs *bs,
+                                                    drflac_uint8 streaminfoBitsPerSample,
+                                                    drflac_frame_header *header)
 {
     drflac_assert(bs != NULL);
     drflac_assert(header != NULL);
 
-    const drflac_uint32 sampleRateTable[12]  = {0, 88200, 176400, 192000, 8000, 16000, 22050, 24000, 32000, 44100, 48000, 96000};
-    const drflac_uint8 bitsPerSampleTable[8] = {0, 8, 12, (drflac_uint8)-1, 16, 20, 24, (drflac_uint8)-1};   // -1 = reserved.
+    const drflac_uint32 sampleRateTable[12] = {
+        0, 88200, 176400, 192000, 8000, 16000, 22050, 24000, 32000, 44100, 48000, 96000};
+    const drflac_uint8 bitsPerSampleTable[8] = {
+        0, 8, 12, (drflac_uint8)-1, 16, 20, 24, (drflac_uint8)-1}; // -1 = reserved.
 
     // Keep looping until we find a valid sync code.
     for (;;) {
@@ -2666,48 +2852,41 @@ static drflac_bool32 drflac__read_next_frame_header(drflac_bs* bs, drflac_uint8
         }
         crc8 = drflac_crc8(crc8, reserved, 1);
 
-
         drflac_uint8 blockingStrategy = 0;
         if (!drflac__read_uint8(bs, 1, &blockingStrategy)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, blockingStrategy, 1);
 
-
         drflac_uint8 blockSize = 0;
         if (!drflac__read_uint8(bs, 4, &blockSize)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, blockSize, 4);
 
-
         drflac_uint8 sampleRate = 0;
         if (!drflac__read_uint8(bs, 4, &sampleRate)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, sampleRate, 4);
 
-
         drflac_uint8 channelAssignment = 0;
         if (!drflac__read_uint8(bs, 4, &channelAssignment)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, channelAssignment, 4);
 
-
         drflac_uint8 bitsPerSample = 0;
         if (!drflac__read_uint8(bs, 3, &bitsPerSample)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, bitsPerSample, 3);
 
-
         if (!drflac__read_uint8(bs, 1, &reserved)) {
             return DRFLAC_FALSE;
         }
         crc8 = drflac_crc8(crc8, reserved, 1);
 
-
         drflac_bool32 isVariableBlockSize = blockingStrategy == 1;
         if (isVariableBlockSize) {
             drflac_uint64 sampleNumber;
@@ -2715,71 +2894,79 @@ static drflac_bool32 drflac__read_next_frame_header(drflac_bs* bs, drflac_uint8
             if (result != DRFLAC_SUCCESS) {
                 if (result == DRFLAC_END_OF_STREAM) {
                     return DRFLAC_FALSE;
-                } else {
+                }
+                else {
                     continue;
                 }
             }
             header->frameNumber  = 0;
             header->sampleNumber = sampleNumber;
-        } else {
+        }
+        else {
             drflac_uint64 frameNumber = 0;
-            drflac_result result = drflac__read_utf8_coded_number(bs, &frameNumber, &crc8);
+            drflac_result result      = drflac__read_utf8_coded_number(bs, &frameNumber, &crc8);
             if (result != DRFLAC_SUCCESS) {
                 if (result == DRFLAC_END_OF_STREAM) {
                     return DRFLAC_FALSE;
-                } else {
+                }
+                else {
                     continue;
                 }
             }
-            header->frameNumber  = (drflac_uint32)frameNumber;   // <-- Safe cast.
+            header->frameNumber  = (drflac_uint32)frameNumber; // <-- Safe cast.
             header->sampleNumber = 0;
         }
 
-
         if (blockSize == 1) {
             header->blockSize = 192;
-        } else if (blockSize >= 2 && blockSize <= 5) {
+        }
+        else if (blockSize >= 2 && blockSize <= 5) {
             header->blockSize = 576 * (1 << (blockSize - 2));
-        } else if (blockSize == 6) {
+        }
+        else if (blockSize == 6) {
             if (!drflac__read_uint16(bs, 8, &header->blockSize)) {
                 return DRFLAC_FALSE;
             }
             crc8 = drflac_crc8(crc8, header->blockSize, 8);
             header->blockSize += 1;
-        } else if (blockSize == 7) {
+        }
+        else if (blockSize == 7) {
             if (!drflac__read_uint16(bs, 16, &header->blockSize)) {
                 return DRFLAC_FALSE;
             }
             crc8 = drflac_crc8(crc8, header->blockSize, 16);
             header->blockSize += 1;
-        } else {
+        }
+        else {
             header->blockSize = 256 * (1 << (blockSize - 8));
         }
 
-
         if (sampleRate <= 11) {
             header->sampleRate = sampleRateTable[sampleRate];
-        } else if (sampleRate == 12) {
+        }
+        else if (sampleRate == 12) {
             if (!drflac__read_uint32(bs, 8, &header->sampleRate)) {
                 return DRFLAC_FALSE;
             }
             crc8 = drflac_crc8(crc8, header->sampleRate, 8);
             header->sampleRate *= 1000;
-        } else if (sampleRate == 13) {
+        }
+        else if (sampleRate == 13) {
             if (!drflac__read_uint32(bs, 16, &header->sampleRate)) {
                 return DRFLAC_FALSE;
             }
             crc8 = drflac_crc8(crc8, header->sampleRate, 16);
-        } else if (sampleRate == 14) {
+        }
+        else if (sampleRate == 14) {
             if (!drflac__read_uint32(bs, 16, &header->sampleRate)) {
                 return DRFLAC_FALSE;
             }
             crc8 = drflac_crc8(crc8, header->sampleRate, 16);
             header->sampleRate *= 10;
-        } else {
-            continue;  // Invalid. Assume an invalid block.
         }
-
+        else {
+            continue; // Invalid. Assume an invalid block.
+        }
 
         header->channelAssignment = channelAssignment;
 
@@ -2792,16 +2979,16 @@ static drflac_bool32 drflac__read_next_frame_header(drflac_bs* bs, drflac_uint8
             return DRFLAC_FALSE;
         }
 
-    #ifndef DR_FLAC_NO_CRC
+#ifndef DR_FLAC_NO_CRC
         if (header->crc8 != crc8) {
-            continue;    // CRC mismatch. Loop back to the top and find the next sync code.
+            continue; // CRC mismatch. Loop back to the top and find the next sync code.
         }
-    #endif
+#endif
         return DRFLAC_TRUE;
     }
 }
 
-static drflac_bool32 drflac__read_subframe_header(drflac_bs* bs, drflac_subframe* pSubframe)
+static drflac_bool32 drflac__read_subframe_header(drflac_bs *bs, drflac_subframe *pSubframe)
 {
     drflac_uint8 header;
     if (!drflac__read_uint8(bs, 8, &header)) {
@@ -2816,20 +3003,24 @@ static drflac_bool32 drflac__read_subframe_header(drflac_bs* bs, drflac_subframe
     int type = (header & 0x7E) >> 1;
     if (type == 0) {
         pSubframe->subframeType = DRFLAC_SUBFRAME_CONSTANT;
-    } else if (type == 1) {
+    }
+    else if (type == 1) {
         pSubframe->subframeType = DRFLAC_SUBFRAME_VERBATIM;
-    } else {
+    }
+    else {
         if ((type & 0x20) != 0) {
             pSubframe->subframeType = DRFLAC_SUBFRAME_LPC;
-            pSubframe->lpcOrder = (type & 0x1F) + 1;
-        } else if ((type & 0x08) != 0) {
+            pSubframe->lpcOrder     = (type & 0x1F) + 1;
+        }
+        else if ((type & 0x08) != 0) {
             pSubframe->subframeType = DRFLAC_SUBFRAME_FIXED;
-            pSubframe->lpcOrder = (type & 0x07);
+            pSubframe->lpcOrder     = (type & 0x07);
             if (pSubframe->lpcOrder > 4) {
                 pSubframe->subframeType = DRFLAC_SUBFRAME_RESERVED;
-                pSubframe->lpcOrder = 0;
+                pSubframe->lpcOrder     = 0;
             }
-        } else {
+        }
+        else {
             pSubframe->subframeType = DRFLAC_SUBFRAME_RESERVED;
         }
     }
@@ -2851,21 +3042,27 @@ static drflac_bool32 drflac__read_subframe_header(drflac_bs* bs, drflac_subframe
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__decode_subframe(drflac_bs* bs, drflac_frame* frame, int subframeIndex, drflac_int32* pDecodedSamplesOut)
+static drflac_bool32 drflac__decode_subframe(drflac_bs *bs,
+                                             drflac_frame *frame,
+                                             int subframeIndex,
+                                             drflac_int32 *pDecodedSamplesOut)
 {
     drflac_assert(bs != NULL);
     drflac_assert(frame != NULL);
 
-    drflac_subframe* pSubframe = frame->subframes + subframeIndex;
+    drflac_subframe *pSubframe = frame->subframes + subframeIndex;
     if (!drflac__read_subframe_header(bs, pSubframe)) {
         return DRFLAC_FALSE;
     }
 
     // Side channels require an extra bit per sample. Took a while to figure that one out...
     pSubframe->bitsPerSample = frame->header.bitsPerSample;
-    if ((frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE || frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE) && subframeIndex == 1) {
+    if ((frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE ||
+         frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE) &&
+        subframeIndex == 1) {
         pSubframe->bitsPerSample += 1;
-    } else if (frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE && subframeIndex == 0) {
+    }
+    else if (frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE && subframeIndex == 0) {
         pSubframe->bitsPerSample += 1;
     }
 
@@ -2873,49 +3070,52 @@ static drflac_bool32 drflac__decode_subframe(drflac_bs* bs, drflac_frame* frame,
     pSubframe->bitsPerSample -= pSubframe->wastedBitsPerSample;
     pSubframe->pDecodedSamples = pDecodedSamplesOut;
 
-    switch (pSubframe->subframeType)
-    {
-        case DRFLAC_SUBFRAME_CONSTANT:
-        {
-            drflac__decode_samples__constant(bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->pDecodedSamples);
-        } break;
+    switch (pSubframe->subframeType) {
+    case DRFLAC_SUBFRAME_CONSTANT: {
+        drflac__decode_samples__constant(
+            bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->pDecodedSamples);
+    } break;
 
-        case DRFLAC_SUBFRAME_VERBATIM:
-        {
-            drflac__decode_samples__verbatim(bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->pDecodedSamples);
-        } break;
+    case DRFLAC_SUBFRAME_VERBATIM: {
+        drflac__decode_samples__verbatim(
+            bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->pDecodedSamples);
+    } break;
 
-        case DRFLAC_SUBFRAME_FIXED:
-        {
-            drflac__decode_samples__fixed(bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->lpcOrder, pSubframe->pDecodedSamples);
-        } break;
+    case DRFLAC_SUBFRAME_FIXED: {
+        drflac__decode_samples__fixed(
+            bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->lpcOrder, pSubframe->pDecodedSamples);
+    } break;
 
-        case DRFLAC_SUBFRAME_LPC:
-        {
-            drflac__decode_samples__lpc(bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->lpcOrder, pSubframe->pDecodedSamples);
-        } break;
+    case DRFLAC_SUBFRAME_LPC: {
+        drflac__decode_samples__lpc(
+            bs, frame->header.blockSize, pSubframe->bitsPerSample, pSubframe->lpcOrder, pSubframe->pDecodedSamples);
+    } break;
 
-        default: return DRFLAC_FALSE;
+    default:
+        return DRFLAC_FALSE;
     }
 
     return DRFLAC_TRUE;
 }
 
-static drflac_bool32 drflac__seek_subframe(drflac_bs* bs, drflac_frame* frame, int subframeIndex)
+static drflac_bool32 drflac__seek_subframe(drflac_bs *bs, drflac_frame *frame, int subframeIndex)
 {
     drflac_assert(bs != NULL);
     drflac_assert(frame != NULL);
 
-    drflac_subframe* pSubframe = frame->subframes + subframeIndex;
+    drflac_subframe *pSubframe = frame->subframes + subframeIndex;
     if (!drflac__read_subframe_header(bs, pSubframe)) {
         return DRFLAC_FALSE;
     }
 
     // Side channels require an extra bit per sample. Took a while to figure that one out...
     pSubframe->bitsPerSample = frame->header.bitsPerSample;
-    if ((frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE || frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE) && subframeIndex == 1) {
+    if ((frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE ||
+         frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE) &&
+        subframeIndex == 1) {
         pSubframe->bitsPerSample += 1;
-    } else if (frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE && subframeIndex == 0) {
+    }
+    else if (frame->header.channelAssignment == DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE && subframeIndex == 0) {
         pSubframe->bitsPerSample += 1;
     }
 
@@ -2923,69 +3123,63 @@ static drflac_bool32 drflac__seek_subframe(drflac_bs* bs, drflac_frame* frame, i
     pSubframe->bitsPerSample -= pSubframe->wastedBitsPerSample;
     pSubframe->pDecodedSamples = NULL;
 
-    switch (pSubframe->subframeType)
-    {
-        case DRFLAC_SUBFRAME_CONSTANT:
-        {
-            if (!drflac__seek_bits(bs, pSubframe->bitsPerSample)) {
-                return DRFLAC_FALSE;
-            }
-        } break;
+    switch (pSubframe->subframeType) {
+    case DRFLAC_SUBFRAME_CONSTANT: {
+        if (!drflac__seek_bits(bs, pSubframe->bitsPerSample)) {
+            return DRFLAC_FALSE;
+        }
+    } break;
 
-        case DRFLAC_SUBFRAME_VERBATIM:
-        {
-            unsigned int bitsToSeek = frame->header.blockSize * pSubframe->bitsPerSample;
-            if (!drflac__seek_bits(bs, bitsToSeek)) {
-                return DRFLAC_FALSE;
-            }
-        } break;
+    case DRFLAC_SUBFRAME_VERBATIM: {
+        unsigned int bitsToSeek = frame->header.blockSize * pSubframe->bitsPerSample;
+        if (!drflac__seek_bits(bs, bitsToSeek)) {
+            return DRFLAC_FALSE;
+        }
+    } break;
 
-        case DRFLAC_SUBFRAME_FIXED:
-        {
-            unsigned int bitsToSeek = pSubframe->lpcOrder * pSubframe->bitsPerSample;
-            if (!drflac__seek_bits(bs, bitsToSeek)) {
-                return DRFLAC_FALSE;
-            }
+    case DRFLAC_SUBFRAME_FIXED: {
+        unsigned int bitsToSeek = pSubframe->lpcOrder * pSubframe->bitsPerSample;
+        if (!drflac__seek_bits(bs, bitsToSeek)) {
+            return DRFLAC_FALSE;
+        }
 
-            if (!drflac__read_and_seek_residual(bs, frame->header.blockSize, pSubframe->lpcOrder)) {
-                return DRFLAC_FALSE;
-            }
-        } break;
+        if (!drflac__read_and_seek_residual(bs, frame->header.blockSize, pSubframe->lpcOrder)) {
+            return DRFLAC_FALSE;
+        }
+    } break;
 
-        case DRFLAC_SUBFRAME_LPC:
-        {
-            unsigned int bitsToSeek = pSubframe->lpcOrder * pSubframe->bitsPerSample;
-            if (!drflac__seek_bits(bs, bitsToSeek)) {
-                return DRFLAC_FALSE;
-            }
+    case DRFLAC_SUBFRAME_LPC: {
+        unsigned int bitsToSeek = pSubframe->lpcOrder * pSubframe->bitsPerSample;
+        if (!drflac__seek_bits(bs, bitsToSeek)) {
+            return DRFLAC_FALSE;
+        }
 
-            unsigned char lpcPrecision;
-            if (!drflac__read_uint8(bs, 4, &lpcPrecision)) {
-                return DRFLAC_FALSE;
-            }
-            if (lpcPrecision == 15) {
-                return DRFLAC_FALSE;    // Invalid.
-            }
-            lpcPrecision += 1;
+        unsigned char lpcPrecision;
+        if (!drflac__read_uint8(bs, 4, &lpcPrecision)) {
+            return DRFLAC_FALSE;
+        }
+        if (lpcPrecision == 15) {
+            return DRFLAC_FALSE; // Invalid.
+        }
+        lpcPrecision += 1;
 
+        bitsToSeek = (pSubframe->lpcOrder * lpcPrecision) + 5; // +5 for shift.
+        if (!drflac__seek_bits(bs, bitsToSeek)) {
+            return DRFLAC_FALSE;
+        }
 
-            bitsToSeek = (pSubframe->lpcOrder * lpcPrecision) + 5;    // +5 for shift.
-            if (!drflac__seek_bits(bs, bitsToSeek)) {
-                return DRFLAC_FALSE;
-            }
+        if (!drflac__read_and_seek_residual(bs, frame->header.blockSize, pSubframe->lpcOrder)) {
+            return DRFLAC_FALSE;
+        }
+    } break;
 
-            if (!drflac__read_and_seek_residual(bs, frame->header.blockSize, pSubframe->lpcOrder)) {
-                return DRFLAC_FALSE;
-            }
-        } break;
-
-        default: return DRFLAC_FALSE;
+    default:
+        return DRFLAC_FALSE;
     }
 
     return DRFLAC_TRUE;
 }
 
-
 static DRFLAC_INLINE drflac_uint8 drflac__get_channel_count_from_channel_assignment(drflac_int8 channelAssignment)
 {
     drflac_assert(channelAssignment <= 10);
@@ -2994,7 +3188,7 @@ static DRFLAC_INLINE drflac_uint8 drflac__get_channel_count_from_channel_assignm
     return lookup[channelAssignment];
 }
 
-static drflac_result drflac__decode_frame(drflac* pFlac)
+static drflac_result drflac__decode_frame(drflac *pFlac)
 {
     // This function should be called while the stream is sitting on the first byte after the frame header.
     drflac_zero_memory(pFlac->currentFrame.subframes, sizeof(pFlac->currentFrame.subframes));
@@ -3011,7 +3205,10 @@ static drflac_result drflac__decode_frame(drflac* pFlac)
     }
 
     for (int i = 0; i < channelCount; ++i) {
-        if (!drflac__decode_subframe(&pFlac->bs, &pFlac->currentFrame, i, pFlac->pDecodedSamples + (pFlac->currentFrame.header.blockSize * i))) {
+        if (!drflac__decode_subframe(&pFlac->bs,
+                                     &pFlac->currentFrame,
+                                     i,
+                                     pFlac->pDecodedSamples + (pFlac->currentFrame.header.blockSize * i))) {
             return DRFLAC_ERROR;
         }
     }
@@ -3034,7 +3231,7 @@ static drflac_result drflac__decode_frame(drflac* pFlac)
 
 #ifndef DR_FLAC_NO_CRC
     if (actualCRC16 != desiredCRC16) {
-        return DRFLAC_CRC_MISMATCH;    // CRC mismatch.
+        return DRFLAC_CRC_MISMATCH; // CRC mismatch.
     }
 #endif
 
@@ -3043,7 +3240,7 @@ static drflac_result drflac__decode_frame(drflac* pFlac)
     return DRFLAC_SUCCESS;
 }
 
-static drflac_result drflac__seek_frame(drflac* pFlac)
+static drflac_result drflac__seek_frame(drflac *pFlac)
 {
     int channelCount = drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
     for (int i = 0; i < channelCount; ++i) {
@@ -3068,14 +3265,14 @@ static drflac_result drflac__seek_frame(drflac* pFlac)
 
 #ifndef DR_FLAC_NO_CRC
     if (actualCRC16 != desiredCRC16) {
-        return DRFLAC_CRC_MISMATCH;    // CRC mismatch.
+        return DRFLAC_CRC_MISMATCH; // CRC mismatch.
     }
 #endif
 
     return DRFLAC_SUCCESS;
 }
 
-static drflac_bool32 drflac__read_and_decode_next_frame(drflac* pFlac)
+static drflac_bool32 drflac__read_and_decode_next_frame(drflac *pFlac)
 {
     drflac_assert(pFlac != NULL);
 
@@ -3087,8 +3284,9 @@ static drflac_bool32 drflac__read_and_decode_next_frame(drflac* pFlac)
         drflac_result result = drflac__decode_frame(pFlac);
         if (result != DRFLAC_SUCCESS) {
             if (result == DRFLAC_CRC_MISMATCH) {
-                continue;   // CRC mismatch. Skip to the next frame.
-            } else {
+                continue; // CRC mismatch. Skip to the next frame.
+            }
+            else {
                 return DRFLAC_FALSE;
             }
         }
@@ -3097,28 +3295,32 @@ static drflac_bool32 drflac__read_and_decode_next_frame(drflac* pFlac)
     }
 }
 
-
-static void drflac__get_current_frame_sample_range(drflac* pFlac, drflac_uint64* pFirstSampleInFrameOut, drflac_uint64* pLastSampleInFrameOut)
+static void drflac__get_current_frame_sample_range(drflac *pFlac,
+                                                   drflac_uint64 *pFirstSampleInFrameOut,
+                                                   drflac_uint64 *pLastSampleInFrameOut)
 {
     drflac_assert(pFlac != NULL);
 
-    unsigned int channelCount = drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
+    unsigned int channelCount =
+        drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
 
     drflac_uint64 firstSampleInFrame = pFlac->currentFrame.header.sampleNumber;
     if (firstSampleInFrame == 0) {
-        firstSampleInFrame = pFlac->currentFrame.header.frameNumber * pFlac->maxBlockSize*channelCount;
+        firstSampleInFrame = pFlac->currentFrame.header.frameNumber * pFlac->maxBlockSize * channelCount;
     }
 
-    drflac_uint64 lastSampleInFrame = firstSampleInFrame + (pFlac->currentFrame.header.blockSize*channelCount);
+    drflac_uint64 lastSampleInFrame = firstSampleInFrame + (pFlac->currentFrame.header.blockSize * channelCount);
     if (lastSampleInFrame > 0) {
         lastSampleInFrame -= 1; // Needs to be zero based.
     }
 
-    if (pFirstSampleInFrameOut) *pFirstSampleInFrameOut = firstSampleInFrame;
-    if (pLastSampleInFrameOut) *pLastSampleInFrameOut = lastSampleInFrame;
+    if (pFirstSampleInFrameOut)
+        *pFirstSampleInFrameOut = firstSampleInFrame;
+    if (pLastSampleInFrameOut)
+        *pLastSampleInFrameOut = lastSampleInFrame;
 }
 
-static drflac_bool32 drflac__seek_to_first_frame(drflac* pFlac)
+static drflac_bool32 drflac__seek_to_first_frame(drflac *pFlac)
 {
     drflac_assert(pFlac != NULL);
 
@@ -3128,17 +3330,19 @@ static drflac_bool32 drflac__seek_to_first_frame(drflac* pFlac)
     return result;
 }
 
-static DRFLAC_INLINE drflac_result drflac__seek_to_next_frame(drflac* pFlac)
+static DRFLAC_INLINE drflac_result drflac__seek_to_next_frame(drflac *pFlac)
 {
-    // This function should only ever be called while the decoder is sitting on the first byte past the FRAME_HEADER section.
+    // This function should only ever be called while the decoder is sitting on the first byte past the FRAME_HEADER
+    // section.
     drflac_assert(pFlac != NULL);
     return drflac__seek_frame(pFlac);
 }
 
-static drflac_bool32 drflac__seek_to_sample__brute_force(drflac* pFlac, drflac_uint64 sampleIndex)
+static drflac_bool32 drflac__seek_to_sample__brute_force(drflac *pFlac, drflac_uint64 sampleIndex)
 {
-    // We need to find the frame that contains the sample. To do this, we iterate over each frame and inspect it's header. If based on the
-    // header we can determine that the frame contains the sample, we do a full decode of that frame.
+    // We need to find the frame that contains the sample. To do this, we iterate over each frame and inspect it's
+    // header. If based on the header we can determine that the frame contains the sample, we do a full decode of that
+    // frame.
     if (!drflac__seek_to_first_frame(pFlac)) {
         return DRFLAC_FALSE;
     }
@@ -3150,38 +3354,46 @@ static drflac_bool32 drflac__seek_to_sample__brute_force(drflac* pFlac, drflac_u
         }
 
         drflac_uint64 firstSampleInFrame = 0;
-        drflac_uint64 lastSampleInFrame = 0;
+        drflac_uint64 lastSampleInFrame  = 0;
         drflac__get_current_frame_sample_range(pFlac, &firstSampleInFrame, &lastSampleInFrame);
 
         drflac_uint64 sampleCountInThisFrame = (lastSampleInFrame - firstSampleInFrame) + 1;
         if (sampleIndex < (runningSampleCount + sampleCountInThisFrame)) {
-            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC mismatch), we need to pretend
-            // it never existed and keep iterating.
+            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC
+            // mismatch), we need to pretend it never existed and keep iterating.
             drflac_result result = drflac__decode_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 // The frame is valid. We just need to skip over some samples to ensure it's sample-exact.
-                drflac_uint64 samplesToDecode = (size_t)(sampleIndex - runningSampleCount);    // <-- Safe cast because the maximum number of samples in a frame is 65535.
+                drflac_uint64 samplesToDecode = (size_t)(
+                    sampleIndex -
+                    runningSampleCount); // <-- Safe cast because the maximum number of samples in a frame is 65535.
                 if (samplesToDecode == 0) {
                     return DRFLAC_TRUE;
                 }
-                return drflac_read_s32(pFlac, samplesToDecode, NULL) != 0;  // <-- If this fails, something bad has happened (it should never fail).
-            } else {
+                return drflac_read_s32(pFlac, samplesToDecode, NULL) !=
+                       0; // <-- If this fails, something bad has happened (it should never fail).
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
-        } else {
-            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we pretend this
-            // frame never existed and leave the running sample count untouched.
+        }
+        else {
+            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we
+            // pretend this frame never existed and leave the running sample count untouched.
             drflac_result result = drflac__seek_to_next_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 runningSampleCount += sampleCountInThisFrame;
-            } else {
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
@@ -3189,8 +3401,7 @@ static drflac_bool32 drflac__seek_to_sample__brute_force(drflac* pFlac, drflac_u
     }
 }
 
-
-static drflac_bool32 drflac__seek_to_sample__seek_table(drflac* pFlac, drflac_uint64 sampleIndex)
+static drflac_bool32 drflac__seek_to_sample__seek_table(drflac *pFlac, drflac_uint64 sampleIndex)
 {
     drflac_assert(pFlac != NULL);
 
@@ -3203,12 +3414,11 @@ static drflac_bool32 drflac__seek_to_sample__seek_table(drflac* pFlac, drflac_ui
     }
 
     // The number of seek points is derived from the size of the SEEKTABLE block.
-    drflac_uint32 seekpointCount = pFlac->seektableSize / 18;   // 18 = the size of each seek point.
+    drflac_uint32 seekpointCount = pFlac->seektableSize / 18; // 18 = the size of each seek point.
     if (seekpointCount == 0) {
-        return DRFLAC_FALSE;   // Would this ever happen?
+        return DRFLAC_FALSE; // Would this ever happen?
     }
 
-
     drflac_seekpoint closestSeekpoint = {0, 0, 0};
 
     drflac_uint32 seekpointsRemaining = seekpointCount;
@@ -3224,9 +3434,9 @@ static drflac_bool32 drflac__seek_to_sample__seek_table(drflac* pFlac, drflac_ui
             break;
         }
 
-        // Note that the seekpoint sample is based on a single channel. The input sample (sampleIndex) is based on interleaving, thus
-        // we need to multiple the seekpoint's sample by the channel count.
-        if (seekpoint.firstSample*pFlac->channels > sampleIndex) {
+        // Note that the seekpoint sample is based on a single channel. The input sample (sampleIndex) is based on
+        // interleaving, thus we need to multiple the seekpoint's sample by the channel count.
+        if (seekpoint.firstSample * pFlac->channels > sampleIndex) {
             break;
         }
 
@@ -3234,51 +3444,59 @@ static drflac_bool32 drflac__seek_to_sample__seek_table(drflac* pFlac, drflac_ui
         seekpointsRemaining -= 1;
     }
 
-    // At this point we should have found the seekpoint closest to our sample. We need to seek to it using basically the same
-    // technique as we use with the brute force method.
+    // At this point we should have found the seekpoint closest to our sample. We need to seek to it using basically the
+    // same technique as we use with the brute force method.
     if (!drflac__seek_to_byte(&pFlac->bs, pFlac->firstFramePos + closestSeekpoint.frameOffset)) {
         return DRFLAC_FALSE;
     }
 
-    drflac_uint64 runningSampleCount = closestSeekpoint.firstSample*pFlac->channels;
+    drflac_uint64 runningSampleCount = closestSeekpoint.firstSample * pFlac->channels;
     for (;;) {
         if (!drflac__read_next_frame_header(&pFlac->bs, pFlac->bitsPerSample, &pFlac->currentFrame.header)) {
             return DRFLAC_FALSE;
         }
 
         drflac_uint64 firstSampleInFrame = 0;
-        drflac_uint64 lastSampleInFrame = 0;
+        drflac_uint64 lastSampleInFrame  = 0;
         drflac__get_current_frame_sample_range(pFlac, &firstSampleInFrame, &lastSampleInFrame);
 
         drflac_uint64 sampleCountInThisFrame = (lastSampleInFrame - firstSampleInFrame) + 1;
         if (sampleIndex < (runningSampleCount + sampleCountInThisFrame)) {
-            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC mismatch), we need to pretend
-            // it never existed and keep iterating.
+            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC
+            // mismatch), we need to pretend it never existed and keep iterating.
             drflac_result result = drflac__decode_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 // The frame is valid. We just need to skip over some samples to ensure it's sample-exact.
-                drflac_uint64 samplesToDecode = (size_t)(sampleIndex - runningSampleCount);    // <-- Safe cast because the maximum number of samples in a frame is 65535.
+                drflac_uint64 samplesToDecode = (size_t)(
+                    sampleIndex -
+                    runningSampleCount); // <-- Safe cast because the maximum number of samples in a frame is 65535.
                 if (samplesToDecode == 0) {
                     return DRFLAC_TRUE;
                 }
-                return drflac_read_s32(pFlac, samplesToDecode, NULL) != 0;  // <-- If this fails, something bad has happened (it should never fail).
-            } else {
+                return drflac_read_s32(pFlac, samplesToDecode, NULL) !=
+                       0; // <-- If this fails, something bad has happened (it should never fail).
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
-        } else {
-            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we pretend this
-            // frame never existed and leave the running sample count untouched.
+        }
+        else {
+            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we
+            // pretend this frame never existed and leave the running sample count untouched.
             drflac_result result = drflac__seek_to_next_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 runningSampleCount += sampleCountInThisFrame;
-            } else {
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
@@ -3286,12 +3504,11 @@ static drflac_bool32 drflac__seek_to_sample__seek_table(drflac* pFlac, drflac_ui
     }
 }
 
-
 #ifndef DR_FLAC_NO_OGG
 typedef struct
 {
-    drflac_uint8 capturePattern[4];  // Should be "OggS"
-    drflac_uint8 structureVersion;   // Always 0.
+    drflac_uint8 capturePattern[4]; // Should be "OggS"
+    drflac_uint8 structureVersion;  // Always 0.
     drflac_uint8 headerType;
     drflac_uint64 granulePosition;
     drflac_uint32 serialNumber;
@@ -3308,18 +3525,19 @@ typedef struct
     drflac_seek_proc onSeek;
     drflac_meta_proc onMeta;
     drflac_container container;
-    void* pUserData;
-    void* pUserDataMD;
+    void *pUserData;
+    void *pUserDataMD;
     drflac_uint32 sampleRate;
-    drflac_uint8  channels;
-    drflac_uint8  bitsPerSample;
+    drflac_uint8 channels;
+    drflac_uint8 bitsPerSample;
     drflac_uint64 totalSampleCount;
     drflac_uint16 maxBlockSize;
     drflac_uint64 runningFilePos;
     drflac_bool32 hasStreamInfoBlock;
     drflac_bool32 hasMetadataBlocks;
-    drflac_bs bs;                           // <-- A bit streamer is required for loading data during initialization.
-    drflac_frame_header firstFrameHeader;   // <-- The header of the first frame that was read during relaxed initalization. Only set if there is no STREAMINFO block.
+    drflac_bs bs;                         // <-- A bit streamer is required for loading data during initialization.
+    drflac_frame_header firstFrameHeader; // <-- The header of the first frame that was read during relaxed
+                                          // initalization. Only set if there is no STREAMINFO block.
 
 #ifndef DR_FLAC_NO_OGG
     drflac_uint32 oggSerial;
@@ -3328,15 +3546,22 @@ typedef struct
 #endif
 } drflac_init_info;
 
-static DRFLAC_INLINE void drflac__decode_block_header(drflac_uint32 blockHeader, drflac_uint8* isLastBlock, drflac_uint8* blockType, drflac_uint32* blockSize)
+static DRFLAC_INLINE void drflac__decode_block_header(drflac_uint32 blockHeader,
+                                                      drflac_uint8 *isLastBlock,
+                                                      drflac_uint8 *blockType,
+                                                      drflac_uint32 *blockSize)
 {
-    blockHeader = drflac__be2host_32(blockHeader);
+    blockHeader  = drflac__be2host_32(blockHeader);
     *isLastBlock = (blockHeader & (0x01 << 31)) >> 31;
     *blockType   = (blockHeader & (0x7F << 24)) >> 24;
     *blockSize   = (blockHeader & 0xFFFFFF);
 }
 
-static DRFLAC_INLINE drflac_bool32 drflac__read_and_decode_block_header(drflac_read_proc onRead, void* pUserData, drflac_uint8* isLastBlock, drflac_uint8* blockType, drflac_uint32* blockSize)
+static DRFLAC_INLINE drflac_bool32 drflac__read_and_decode_block_header(drflac_read_proc onRead,
+                                                                        void *pUserData,
+                                                                        drflac_uint8 *isLastBlock,
+                                                                        drflac_uint8 *blockType,
+                                                                        drflac_uint32 *blockSize)
 {
     drflac_uint32 blockHeader;
     if (onRead(pUserData, &blockHeader, 4) != 4) {
@@ -3347,7 +3572,7 @@ static DRFLAC_INLINE drflac_bool32 drflac__read_and_decode_block_header(drflac_r
     return DRFLAC_TRUE;
 }
 
-drflac_bool32 drflac__read_streaminfo(drflac_read_proc onRead, void* pUserData, drflac_streaminfo* pStreamInfo)
+drflac_bool32 drflac__read_streaminfo(drflac_read_proc onRead, void *pUserData, drflac_streaminfo *pStreamInfo)
 {
     // min/max block size.
     drflac_uint32 blockSizes;
@@ -3379,23 +3604,23 @@ drflac_bool32 drflac__read_streaminfo(drflac_read_proc onRead, void* pUserData,
 
     pStreamInfo->minBlockSize     = (blockSizes & 0xFFFF0000) >> 16;
     pStreamInfo->maxBlockSize     = blockSizes & 0x0000FFFF;
-    pStreamInfo->minFrameSize     = (drflac_uint32)((frameSizes     & (drflac_uint64)0xFFFFFF0000000000) >> 40);
-    pStreamInfo->maxFrameSize     = (drflac_uint32)((frameSizes     & (drflac_uint64)0x000000FFFFFF0000) >> 16);
+    pStreamInfo->minFrameSize     = (drflac_uint32)((frameSizes & (drflac_uint64)0xFFFFFF0000000000) >> 40);
+    pStreamInfo->maxFrameSize     = (drflac_uint32)((frameSizes & (drflac_uint64)0x000000FFFFFF0000) >> 16);
     pStreamInfo->sampleRate       = (drflac_uint32)((importantProps & (drflac_uint64)0xFFFFF00000000000) >> 44);
-    pStreamInfo->channels         = (drflac_uint8 )((importantProps & (drflac_uint64)0x00000E0000000000) >> 41) + 1;
-    pStreamInfo->bitsPerSample    = (drflac_uint8 )((importantProps & (drflac_uint64)0x000001F000000000) >> 36) + 1;
+    pStreamInfo->channels         = (drflac_uint8)((importantProps & (drflac_uint64)0x00000E0000000000) >> 41) + 1;
+    pStreamInfo->bitsPerSample    = (drflac_uint8)((importantProps & (drflac_uint64)0x000001F000000000) >> 36) + 1;
     pStreamInfo->totalSampleCount = (importantProps & (drflac_uint64)0x0000000FFFFFFFFF) * pStreamInfo->channels;
     drflac_copy_memory(pStreamInfo->md5, md5, sizeof(md5));
 
     return DRFLAC_TRUE;
 }
 
-drflac_bool32 drflac__read_and_decode_metadata(drflac* pFlac)
+drflac_bool32 drflac__read_and_decode_metadata(drflac *pFlac)
 {
     drflac_assert(pFlac != NULL);
 
-    // We want to keep track of the byte position in the stream of the seektable. At the time of calling this function we know that
-    // we'll be sitting on byte 42.
+    // We want to keep track of the byte position in the stream of the seektable. At the time of calling this function
+    // we know that we'll be sitting on byte 42.
     drflac_uint64 runningFilePos = 42;
     drflac_uint64 seektablePos   = 0;
     drflac_uint32 seektableSize  = 0;
@@ -3404,216 +3629,229 @@ drflac_bool32 drflac__read_and_decode_metadata(drflac* pFlac)
         drflac_uint8 isLastBlock = 0;
         drflac_uint8 blockType;
         drflac_uint32 blockSize;
-        if (!drflac__read_and_decode_block_header(pFlac->bs.onRead, pFlac->bs.pUserData, &isLastBlock, &blockType, &blockSize)) {
+        if (!drflac__read_and_decode_block_header(
+                pFlac->bs.onRead, pFlac->bs.pUserData, &isLastBlock, &blockType, &blockSize)) {
             return DRFLAC_FALSE;
         }
         runningFilePos += 4;
 
-
         drflac_metadata metadata;
-        metadata.type = blockType;
-        metadata.pRawData = NULL;
+        metadata.type        = blockType;
+        metadata.pRawData    = NULL;
         metadata.rawDataSize = 0;
 
-        switch (blockType)
-        {
-            case DRFLAC_METADATA_BLOCK_TYPE_APPLICATION:
-            {
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
-
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
-
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
-                    metadata.data.application.id       = drflac__be2host_32(*(drflac_uint32*)pRawData);
-                    metadata.data.application.pData    = (const void*)((drflac_uint8*)pRawData + sizeof(drflac_uint32));
-                    metadata.data.application.dataSize = blockSize - sizeof(drflac_uint32);
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+        switch (blockType) {
+        case DRFLAC_METADATA_BLOCK_TYPE_APPLICATION: {
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
 
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
                     DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
                 }
-            } break;
 
-            case DRFLAC_METADATA_BLOCK_TYPE_SEEKTABLE:
-            {
-                seektablePos  = runningFilePos;
-                seektableSize = blockSize;
+                metadata.pRawData                  = pRawData;
+                metadata.rawDataSize               = blockSize;
+                metadata.data.application.id       = drflac__be2host_32(*(drflac_uint32 *)pRawData);
+                metadata.data.application.pData    = (const void *)((drflac_uint8 *)pRawData + sizeof(drflac_uint32));
+                metadata.data.application.dataSize = blockSize - sizeof(drflac_uint32);
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
 
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
 
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
+        case DRFLAC_METADATA_BLOCK_TYPE_SEEKTABLE: {
+            seektablePos  = runningFilePos;
+            seektableSize = blockSize;
 
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
-                    metadata.data.seektable.seekpointCount = blockSize/sizeof(drflac_seekpoint);
-                    metadata.data.seektable.pSeekpoints = (const drflac_seekpoint*)pRawData;
-
-                    // Endian swap.
-                    for (drflac_uint32 iSeekpoint = 0; iSeekpoint < metadata.data.seektable.seekpointCount; ++iSeekpoint) {
-                        drflac_seekpoint* pSeekpoint = (drflac_seekpoint*)pRawData + iSeekpoint;
-                        pSeekpoint->firstSample = drflac__be2host_64(pSeekpoint->firstSample);
-                        pSeekpoint->frameOffset = drflac__be2host_64(pSeekpoint->frameOffset);
-                        pSeekpoint->sampleCount = drflac__be2host_16(pSeekpoint->sampleCount);
-                    }
-
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
 
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
                     DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
                 }
-            } break;
 
-            case DRFLAC_METADATA_BLOCK_TYPE_VORBIS_COMMENT:
-            {
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
+                metadata.pRawData                      = pRawData;
+                metadata.rawDataSize                   = blockSize;
+                metadata.data.seektable.seekpointCount = blockSize / sizeof(drflac_seekpoint);
+                metadata.data.seektable.pSeekpoints    = (const drflac_seekpoint *)pRawData;
 
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
+                // Endian swap.
+                for (drflac_uint32 iSeekpoint = 0; iSeekpoint < metadata.data.seektable.seekpointCount; ++iSeekpoint) {
+                    drflac_seekpoint *pSeekpoint = (drflac_seekpoint *)pRawData + iSeekpoint;
+                    pSeekpoint->firstSample      = drflac__be2host_64(pSeekpoint->firstSample);
+                    pSeekpoint->frameOffset      = drflac__be2host_64(pSeekpoint->frameOffset);
+                    pSeekpoint->sampleCount      = drflac__be2host_16(pSeekpoint->sampleCount);
+                }
 
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
 
-                    const char* pRunningData = (const char*)pRawData;
-                    metadata.data.vorbis_comment.vendorLength = drflac__le2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.vorbis_comment.vendor       = pRunningData;                                      pRunningData += metadata.data.vorbis_comment.vendorLength;
-                    metadata.data.vorbis_comment.commentCount = drflac__le2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.vorbis_comment.comments     = pRunningData;
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
 
+        case DRFLAC_METADATA_BLOCK_TYPE_VORBIS_COMMENT: {
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
+
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
                     DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
                 }
-            } break;
 
-            case DRFLAC_METADATA_BLOCK_TYPE_CUESHEET:
-            {
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
+                metadata.pRawData    = pRawData;
+                metadata.rawDataSize = blockSize;
 
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
+                const char *pRunningData                  = (const char *)pRawData;
+                metadata.data.vorbis_comment.vendorLength = drflac__le2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.vorbis_comment.vendor = pRunningData;
+                pRunningData += metadata.data.vorbis_comment.vendorLength;
+                metadata.data.vorbis_comment.commentCount = drflac__le2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.vorbis_comment.comments = pRunningData;
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
 
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
 
-                    const char* pRunningData = (const char*)pRawData;
-                    drflac_copy_memory(metadata.data.cuesheet.catalog, pRunningData, 128);                        pRunningData += 128;
-                    metadata.data.cuesheet.leadInSampleCount = drflac__be2host_64(*(drflac_uint64*)pRunningData); pRunningData += 4;
-                    metadata.data.cuesheet.isCD              = ((pRunningData[0] & 0x80) >> 7) != 0;              pRunningData += 259;
-                    metadata.data.cuesheet.trackCount        = pRunningData[0];                                   pRunningData += 1;
-                    metadata.data.cuesheet.pTrackData        = (const drflac_uint8*)pRunningData;
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+        case DRFLAC_METADATA_BLOCK_TYPE_CUESHEET: {
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
 
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
                     DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
                 }
-            } break;
 
-            case DRFLAC_METADATA_BLOCK_TYPE_PICTURE:
-            {
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
+                metadata.pRawData    = pRawData;
+                metadata.rawDataSize = blockSize;
 
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
+                const char *pRunningData = (const char *)pRawData;
+                drflac_copy_memory(metadata.data.cuesheet.catalog, pRunningData, 128);
+                pRunningData += 128;
+                metadata.data.cuesheet.leadInSampleCount = drflac__be2host_64(*(drflac_uint64 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.cuesheet.isCD = ((pRunningData[0] & 0x80) >> 7) != 0;
+                pRunningData += 259;
+                metadata.data.cuesheet.trackCount = pRunningData[0];
+                pRunningData += 1;
+                metadata.data.cuesheet.pTrackData = (const drflac_uint8 *)pRunningData;
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
 
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
 
-                    const char* pRunningData = (const char*)pRawData;
-                    metadata.data.picture.type              = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.mimeLength        = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.mime              = pRunningData;                                      pRunningData += metadata.data.picture.mimeLength;
-                    metadata.data.picture.descriptionLength = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.description       = pRunningData;
-                    metadata.data.picture.width             = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.height            = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.colorDepth        = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.indexColorCount   = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.pictureDataSize   = drflac__be2host_32(*(drflac_uint32*)pRunningData); pRunningData += 4;
-                    metadata.data.picture.pPictureData      = (const drflac_uint8*)pRunningData;
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+        case DRFLAC_METADATA_BLOCK_TYPE_PICTURE: {
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
 
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
                     DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
                 }
-            } break;
 
-            case DRFLAC_METADATA_BLOCK_TYPE_PADDING:
-            {
-                if (pFlac->onMeta) {
-                    metadata.data.padding.unused = 0;
+                metadata.pRawData    = pRawData;
+                metadata.rawDataSize = blockSize;
 
-                    // Padding doesn't have anything meaningful in it, so just skip over it, but make sure the caller is aware of it by firing the callback.
-                    if (!pFlac->bs.onSeek(pFlac->bs.pUserData, blockSize, drflac_seek_origin_current)) {
-                        isLastBlock = DRFLAC_TRUE;  // An error occured while seeking. Attempt to recover by treating this as the last block which will in turn terminate the loop.
-                    } else {
-                        pFlac->onMeta(pFlac->pUserDataMD, &metadata);
-                    }
+                const char *pRunningData   = (const char *)pRawData;
+                metadata.data.picture.type = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.mimeLength = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.mime = pRunningData;
+                pRunningData += metadata.data.picture.mimeLength;
+                metadata.data.picture.descriptionLength = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.description = pRunningData;
+                metadata.data.picture.width       = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.height = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.colorDepth = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.indexColorCount = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.pictureDataSize = drflac__be2host_32(*(drflac_uint32 *)pRunningData);
+                pRunningData += 4;
+                metadata.data.picture.pPictureData = (const drflac_uint8 *)pRunningData;
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
+
+        case DRFLAC_METADATA_BLOCK_TYPE_PADDING: {
+            if (pFlac->onMeta) {
+                metadata.data.padding.unused = 0;
+
+                // Padding doesn't have anything meaningful in it, so just skip over it, but make sure the caller is
+                // aware of it by firing the callback.
+                if (!pFlac->bs.onSeek(pFlac->bs.pUserData, blockSize, drflac_seek_origin_current)) {
+                    isLastBlock = DRFLAC_TRUE; // An error occured while seeking. Attempt to recover by treating this as
+                                               // the last block which will in turn terminate the loop.
                 }
-            } break;
-
-            case DRFLAC_METADATA_BLOCK_TYPE_INVALID:
-            {
-                // Invalid chunk. Just skip over this one.
-                if (pFlac->onMeta) {
-                    if (!pFlac->bs.onSeek(pFlac->bs.pUserData, blockSize, drflac_seek_origin_current)) {
-                        isLastBlock = DRFLAC_TRUE;  // An error occured while seeking. Attempt to recover by treating this as the last block which will in turn terminate the loop.
-                    }
+                else {
+                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
                 }
             }
+        } break;
 
-            default:
-            {
-                // It's an unknown chunk, but not necessarily invalid. There's a chance more metadata blocks might be defined later on, so we
-                // can at the very least report the chunk to the application and let it look at the raw data.
-                if (pFlac->onMeta) {
-                    void* pRawData = DRFLAC_MALLOC(blockSize);
-                    if (pRawData == NULL) {
-                        return DRFLAC_FALSE;
-                    }
-
-                    if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
-                        DRFLAC_FREE(pRawData);
-                        return DRFLAC_FALSE;
-                    }
-
-                    metadata.pRawData = pRawData;
-                    metadata.rawDataSize = blockSize;
-                    pFlac->onMeta(pFlac->pUserDataMD, &metadata);
-
-                    DRFLAC_FREE(pRawData);
+        case DRFLAC_METADATA_BLOCK_TYPE_INVALID: {
+            // Invalid chunk. Just skip over this one.
+            if (pFlac->onMeta) {
+                if (!pFlac->bs.onSeek(pFlac->bs.pUserData, blockSize, drflac_seek_origin_current)) {
+                    isLastBlock = DRFLAC_TRUE; // An error occured while seeking. Attempt to recover by treating this as
+                                               // the last block which will in turn terminate the loop.
                 }
-            } break;
+            }
         }
 
-        // If we're not handling metadata, just skip over the block. If we are, it will have been handled earlier in the switch statement above.
+        default: {
+            // It's an unknown chunk, but not necessarily invalid. There's a chance more metadata blocks might be
+            // defined later on, so we can at the very least report the chunk to the application and let it look at the
+            // raw data.
+            if (pFlac->onMeta) {
+                void *pRawData = DRFLAC_MALLOC(blockSize);
+                if (pRawData == NULL) {
+                    return DRFLAC_FALSE;
+                }
+
+                if (pFlac->bs.onRead(pFlac->bs.pUserData, pRawData, blockSize) != blockSize) {
+                    DRFLAC_FREE(pRawData);
+                    return DRFLAC_FALSE;
+                }
+
+                metadata.pRawData    = pRawData;
+                metadata.rawDataSize = blockSize;
+                pFlac->onMeta(pFlac->pUserDataMD, &metadata);
+
+                DRFLAC_FREE(pRawData);
+            }
+        } break;
+        }
+
+        // If we're not handling metadata, just skip over the block. If we are, it will have been handled earlier in the
+        // switch statement above.
         if (pFlac->onMeta == NULL && blockSize > 0) {
             if (!pFlac->bs.onSeek(pFlac->bs.pUserData, blockSize, drflac_seek_origin_current)) {
                 isLastBlock = DRFLAC_TRUE;
@@ -3626,14 +3864,20 @@ drflac_bool32 drflac__read_and_decode_metadata(drflac* pFlac)
         }
     }
 
-    pFlac->seektablePos = seektablePos;
+    pFlac->seektablePos  = seektablePos;
     pFlac->seektableSize = seektableSize;
     pFlac->firstFramePos = runningFilePos;
 
     return DRFLAC_TRUE;
 }
 
-drflac_bool32 drflac__init_private__native(drflac_init_info* pInit, drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, void* pUserData, void* pUserDataMD, drflac_bool32 relaxed)
+drflac_bool32 drflac__init_private__native(drflac_init_info *pInit,
+                                           drflac_read_proc onRead,
+                                           drflac_seek_proc onSeek,
+                                           drflac_meta_proc onMeta,
+                                           void *pUserData,
+                                           void *pUserDataMD,
+                                           drflac_bool32 relaxed)
 {
     (void)onSeek;
 
@@ -3653,27 +3897,32 @@ drflac_bool32 drflac__init_private__native(drflac_init_info* pInit, drflac_read_
         if (!relaxed) {
             // We're opening in strict mode and the first block is not the STREAMINFO block. Error.
             return DRFLAC_FALSE;
-        } else {
-            // Relaxed mode. To open from here we need to just find the first frame and set the sample rate, etc. to whatever is defined
-            // for that frame.
+        }
+        else {
+            // Relaxed mode. To open from here we need to just find the first frame and set the sample rate, etc. to
+            // whatever is defined for that frame.
             pInit->hasStreamInfoBlock = DRFLAC_FALSE;
             pInit->hasMetadataBlocks  = DRFLAC_FALSE;
 
             if (!drflac__read_next_frame_header(&pInit->bs, 0, &pInit->firstFrameHeader)) {
-                return DRFLAC_FALSE;    // Couldn't find a frame.
+                return DRFLAC_FALSE; // Couldn't find a frame.
             }
 
             if (pInit->firstFrameHeader.bitsPerSample == 0) {
-                return DRFLAC_FALSE;    // Failed to initialize because the first frame depends on the STREAMINFO block, which does not exist.
+                return DRFLAC_FALSE; // Failed to initialize because the first frame depends on the STREAMINFO block,
+                                     // which does not exist.
             }
 
-            pInit->sampleRate    = pInit->firstFrameHeader.sampleRate;
-            pInit->channels      = drflac__get_channel_count_from_channel_assignment(pInit->firstFrameHeader.channelAssignment);
+            pInit->sampleRate = pInit->firstFrameHeader.sampleRate;
+            pInit->channels =
+                drflac__get_channel_count_from_channel_assignment(pInit->firstFrameHeader.channelAssignment);
             pInit->bitsPerSample = pInit->firstFrameHeader.bitsPerSample;
-            pInit->maxBlockSize  = 65535;   // <-- See notes here: https://xiph.org/flac/format.html#metadata_block_streaminfo
+            pInit->maxBlockSize =
+                65535; // <-- See notes here: https://xiph.org/flac/format.html#metadata_block_streaminfo
             return DRFLAC_TRUE;
         }
-    } else {
+    }
+    else {
         drflac_streaminfo streaminfo;
         if (!drflac__read_streaminfo(onRead, pUserData, &streaminfo)) {
             return DRFLAC_FALSE;
@@ -3684,14 +3933,15 @@ drflac_bool32 drflac__init_private__native(drflac_init_info* pInit, drflac_read_
         pInit->channels           = streaminfo.channels;
         pInit->bitsPerSample      = streaminfo.bitsPerSample;
         pInit->totalSampleCount   = streaminfo.totalSampleCount;
-        pInit->maxBlockSize       = streaminfo.maxBlockSize;    // Don't care about the min block size - only the max (used for determining the size of the memory allocation).
+        pInit->maxBlockSize = streaminfo.maxBlockSize; // Don't care about the min block size - only the max (used for
+                                                       // determining the size of the memory allocation).
         pInit->hasMetadataBlocks = !isLastBlock;
 
         if (onMeta) {
             drflac_metadata metadata;
-            metadata.type = DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO;
-            metadata.pRawData = NULL;
-            metadata.rawDataSize = 0;
+            metadata.type            = DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO;
+            metadata.pRawData        = NULL;
+            metadata.rawDataSize     = 0;
             metadata.data.streaminfo = streaminfo;
             onMeta(pUserDataMD, &metadata);
         }
@@ -3701,8 +3951,8 @@ drflac_bool32 drflac__init_private__native(drflac_init_info* pInit, drflac_read_
 }
 
 #ifndef DR_FLAC_NO_OGG
-#define DRFLAC_OGG_MAX_PAGE_SIZE            65307
-#define DRFLAC_OGG_CAPTURE_PATTERN_CRC32    1605413199  // CRC-32 of "OggS".
+#define DRFLAC_OGG_MAX_PAGE_SIZE         65307
+#define DRFLAC_OGG_CAPTURE_PATTERN_CRC32 1605413199 // CRC-32 of "OggS".
 
 typedef enum
 {
@@ -3710,73 +3960,36 @@ typedef enum
     drflac_ogg_fail_on_crc_mismatch
 } drflac_ogg_crc_mismatch_recovery;
 
-
 static drflac_uint32 drflac__crc32_table[] = {
-    0x00000000L, 0x04C11DB7L, 0x09823B6EL, 0x0D4326D9L,
-    0x130476DCL, 0x17C56B6BL, 0x1A864DB2L, 0x1E475005L,
-    0x2608EDB8L, 0x22C9F00FL, 0x2F8AD6D6L, 0x2B4BCB61L,
-    0x350C9B64L, 0x31CD86D3L, 0x3C8EA00AL, 0x384FBDBDL,
-    0x4C11DB70L, 0x48D0C6C7L, 0x4593E01EL, 0x4152FDA9L,
-    0x5F15ADACL, 0x5BD4B01BL, 0x569796C2L, 0x52568B75L,
-    0x6A1936C8L, 0x6ED82B7FL, 0x639B0DA6L, 0x675A1011L,
-    0x791D4014L, 0x7DDC5DA3L, 0x709F7B7AL, 0x745E66CDL,
-    0x9823B6E0L, 0x9CE2AB57L, 0x91A18D8EL, 0x95609039L,
-    0x8B27C03CL, 0x8FE6DD8BL, 0x82A5FB52L, 0x8664E6E5L,
-    0xBE2B5B58L, 0xBAEA46EFL, 0xB7A96036L, 0xB3687D81L,
-    0xAD2F2D84L, 0xA9EE3033L, 0xA4AD16EAL, 0xA06C0B5DL,
-    0xD4326D90L, 0xD0F37027L, 0xDDB056FEL, 0xD9714B49L,
-    0xC7361B4CL, 0xC3F706FBL, 0xCEB42022L, 0xCA753D95L,
-    0xF23A8028L, 0xF6FB9D9FL, 0xFBB8BB46L, 0xFF79A6F1L,
-    0xE13EF6F4L, 0xE5FFEB43L, 0xE8BCCD9AL, 0xEC7DD02DL,
-    0x34867077L, 0x30476DC0L, 0x3D044B19L, 0x39C556AEL,
-    0x278206ABL, 0x23431B1CL, 0x2E003DC5L, 0x2AC12072L,
-    0x128E9DCFL, 0x164F8078L, 0x1B0CA6A1L, 0x1FCDBB16L,
-    0x018AEB13L, 0x054BF6A4L, 0x0808D07DL, 0x0CC9CDCAL,
-    0x7897AB07L, 0x7C56B6B0L, 0x71159069L, 0x75D48DDEL,
-    0x6B93DDDBL, 0x6F52C06CL, 0x6211E6B5L, 0x66D0FB02L,
-    0x5E9F46BFL, 0x5A5E5B08L, 0x571D7DD1L, 0x53DC6066L,
-    0x4D9B3063L, 0x495A2DD4L, 0x44190B0DL, 0x40D816BAL,
-    0xACA5C697L, 0xA864DB20L, 0xA527FDF9L, 0xA1E6E04EL,
-    0xBFA1B04BL, 0xBB60ADFCL, 0xB6238B25L, 0xB2E29692L,
-    0x8AAD2B2FL, 0x8E6C3698L, 0x832F1041L, 0x87EE0DF6L,
-    0x99A95DF3L, 0x9D684044L, 0x902B669DL, 0x94EA7B2AL,
-    0xE0B41DE7L, 0xE4750050L, 0xE9362689L, 0xEDF73B3EL,
-    0xF3B06B3BL, 0xF771768CL, 0xFA325055L, 0xFEF34DE2L,
-    0xC6BCF05FL, 0xC27DEDE8L, 0xCF3ECB31L, 0xCBFFD686L,
-    0xD5B88683L, 0xD1799B34L, 0xDC3ABDEDL, 0xD8FBA05AL,
-    0x690CE0EEL, 0x6DCDFD59L, 0x608EDB80L, 0x644FC637L,
-    0x7A089632L, 0x7EC98B85L, 0x738AAD5CL, 0x774BB0EBL,
-    0x4F040D56L, 0x4BC510E1L, 0x46863638L, 0x42472B8FL,
-    0x5C007B8AL, 0x58C1663DL, 0x558240E4L, 0x51435D53L,
-    0x251D3B9EL, 0x21DC2629L, 0x2C9F00F0L, 0x285E1D47L,
-    0x36194D42L, 0x32D850F5L, 0x3F9B762CL, 0x3B5A6B9BL,
-    0x0315D626L, 0x07D4CB91L, 0x0A97ED48L, 0x0E56F0FFL,
-    0x1011A0FAL, 0x14D0BD4DL, 0x19939B94L, 0x1D528623L,
-    0xF12F560EL, 0xF5EE4BB9L, 0xF8AD6D60L, 0xFC6C70D7L,
-    0xE22B20D2L, 0xE6EA3D65L, 0xEBA91BBCL, 0xEF68060BL,
-    0xD727BBB6L, 0xD3E6A601L, 0xDEA580D8L, 0xDA649D6FL,
-    0xC423CD6AL, 0xC0E2D0DDL, 0xCDA1F604L, 0xC960EBB3L,
-    0xBD3E8D7EL, 0xB9FF90C9L, 0xB4BCB610L, 0xB07DABA7L,
-    0xAE3AFBA2L, 0xAAFBE615L, 0xA7B8C0CCL, 0xA379DD7BL,
-    0x9B3660C6L, 0x9FF77D71L, 0x92B45BA8L, 0x9675461FL,
-    0x8832161AL, 0x8CF30BADL, 0x81B02D74L, 0x857130C3L,
-    0x5D8A9099L, 0x594B8D2EL, 0x5408ABF7L, 0x50C9B640L,
-    0x4E8EE645L, 0x4A4FFBF2L, 0x470CDD2BL, 0x43CDC09CL,
-    0x7B827D21L, 0x7F436096L, 0x7200464FL, 0x76C15BF8L,
-    0x68860BFDL, 0x6C47164AL, 0x61043093L, 0x65C52D24L,
-    0x119B4BE9L, 0x155A565EL, 0x18197087L, 0x1CD86D30L,
-    0x029F3D35L, 0x065E2082L, 0x0B1D065BL, 0x0FDC1BECL,
-    0x3793A651L, 0x3352BBE6L, 0x3E119D3FL, 0x3AD08088L,
-    0x2497D08DL, 0x2056CD3AL, 0x2D15EBE3L, 0x29D4F654L,
-    0xC5A92679L, 0xC1683BCEL, 0xCC2B1D17L, 0xC8EA00A0L,
-    0xD6AD50A5L, 0xD26C4D12L, 0xDF2F6BCBL, 0xDBEE767CL,
-    0xE3A1CBC1L, 0xE760D676L, 0xEA23F0AFL, 0xEEE2ED18L,
-    0xF0A5BD1DL, 0xF464A0AAL, 0xF9278673L, 0xFDE69BC4L,
-    0x89B8FD09L, 0x8D79E0BEL, 0x803AC667L, 0x84FBDBD0L,
-    0x9ABC8BD5L, 0x9E7D9662L, 0x933EB0BBL, 0x97FFAD0CL,
-    0xAFB010B1L, 0xAB710D06L, 0xA6322BDFL, 0xA2F33668L,
-    0xBCB4666DL, 0xB8757BDAL, 0xB5365D03L, 0xB1F740B4L
-};
+    0x00000000L, 0x04C11DB7L, 0x09823B6EL, 0x0D4326D9L, 0x130476DCL, 0x17C56B6BL, 0x1A864DB2L, 0x1E475005L, 0x2608EDB8L,
+    0x22C9F00FL, 0x2F8AD6D6L, 0x2B4BCB61L, 0x350C9B64L, 0x31CD86D3L, 0x3C8EA00AL, 0x384FBDBDL, 0x4C11DB70L, 0x48D0C6C7L,
+    0x4593E01EL, 0x4152FDA9L, 0x5F15ADACL, 0x5BD4B01BL, 0x569796C2L, 0x52568B75L, 0x6A1936C8L, 0x6ED82B7FL, 0x639B0DA6L,
+    0x675A1011L, 0x791D4014L, 0x7DDC5DA3L, 0x709F7B7AL, 0x745E66CDL, 0x9823B6E0L, 0x9CE2AB57L, 0x91A18D8EL, 0x95609039L,
+    0x8B27C03CL, 0x8FE6DD8BL, 0x82A5FB52L, 0x8664E6E5L, 0xBE2B5B58L, 0xBAEA46EFL, 0xB7A96036L, 0xB3687D81L, 0xAD2F2D84L,
+    0xA9EE3033L, 0xA4AD16EAL, 0xA06C0B5DL, 0xD4326D90L, 0xD0F37027L, 0xDDB056FEL, 0xD9714B49L, 0xC7361B4CL, 0xC3F706FBL,
+    0xCEB42022L, 0xCA753D95L, 0xF23A8028L, 0xF6FB9D9FL, 0xFBB8BB46L, 0xFF79A6F1L, 0xE13EF6F4L, 0xE5FFEB43L, 0xE8BCCD9AL,
+    0xEC7DD02DL, 0x34867077L, 0x30476DC0L, 0x3D044B19L, 0x39C556AEL, 0x278206ABL, 0x23431B1CL, 0x2E003DC5L, 0x2AC12072L,
+    0x128E9DCFL, 0x164F8078L, 0x1B0CA6A1L, 0x1FCDBB16L, 0x018AEB13L, 0x054BF6A4L, 0x0808D07DL, 0x0CC9CDCAL, 0x7897AB07L,
+    0x7C56B6B0L, 0x71159069L, 0x75D48DDEL, 0x6B93DDDBL, 0x6F52C06CL, 0x6211E6B5L, 0x66D0FB02L, 0x5E9F46BFL, 0x5A5E5B08L,
+    0x571D7DD1L, 0x53DC6066L, 0x4D9B3063L, 0x495A2DD4L, 0x44190B0DL, 0x40D816BAL, 0xACA5C697L, 0xA864DB20L, 0xA527FDF9L,
+    0xA1E6E04EL, 0xBFA1B04BL, 0xBB60ADFCL, 0xB6238B25L, 0xB2E29692L, 0x8AAD2B2FL, 0x8E6C3698L, 0x832F1041L, 0x87EE0DF6L,
+    0x99A95DF3L, 0x9D684044L, 0x902B669DL, 0x94EA7B2AL, 0xE0B41DE7L, 0xE4750050L, 0xE9362689L, 0xEDF73B3EL, 0xF3B06B3BL,
+    0xF771768CL, 0xFA325055L, 0xFEF34DE2L, 0xC6BCF05FL, 0xC27DEDE8L, 0xCF3ECB31L, 0xCBFFD686L, 0xD5B88683L, 0xD1799B34L,
+    0xDC3ABDEDL, 0xD8FBA05AL, 0x690CE0EEL, 0x6DCDFD59L, 0x608EDB80L, 0x644FC637L, 0x7A089632L, 0x7EC98B85L, 0x738AAD5CL,
+    0x774BB0EBL, 0x4F040D56L, 0x4BC510E1L, 0x46863638L, 0x42472B8FL, 0x5C007B8AL, 0x58C1663DL, 0x558240E4L, 0x51435D53L,
+    0x251D3B9EL, 0x21DC2629L, 0x2C9F00F0L, 0x285E1D47L, 0x36194D42L, 0x32D850F5L, 0x3F9B762CL, 0x3B5A6B9BL, 0x0315D626L,
+    0x07D4CB91L, 0x0A97ED48L, 0x0E56F0FFL, 0x1011A0FAL, 0x14D0BD4DL, 0x19939B94L, 0x1D528623L, 0xF12F560EL, 0xF5EE4BB9L,
+    0xF8AD6D60L, 0xFC6C70D7L, 0xE22B20D2L, 0xE6EA3D65L, 0xEBA91BBCL, 0xEF68060BL, 0xD727BBB6L, 0xD3E6A601L, 0xDEA580D8L,
+    0xDA649D6FL, 0xC423CD6AL, 0xC0E2D0DDL, 0xCDA1F604L, 0xC960EBB3L, 0xBD3E8D7EL, 0xB9FF90C9L, 0xB4BCB610L, 0xB07DABA7L,
+    0xAE3AFBA2L, 0xAAFBE615L, 0xA7B8C0CCL, 0xA379DD7BL, 0x9B3660C6L, 0x9FF77D71L, 0x92B45BA8L, 0x9675461FL, 0x8832161AL,
+    0x8CF30BADL, 0x81B02D74L, 0x857130C3L, 0x5D8A9099L, 0x594B8D2EL, 0x5408ABF7L, 0x50C9B640L, 0x4E8EE645L, 0x4A4FFBF2L,
+    0x470CDD2BL, 0x43CDC09CL, 0x7B827D21L, 0x7F436096L, 0x7200464FL, 0x76C15BF8L, 0x68860BFDL, 0x6C47164AL, 0x61043093L,
+    0x65C52D24L, 0x119B4BE9L, 0x155A565EL, 0x18197087L, 0x1CD86D30L, 0x029F3D35L, 0x065E2082L, 0x0B1D065BL, 0x0FDC1BECL,
+    0x3793A651L, 0x3352BBE6L, 0x3E119D3FL, 0x3AD08088L, 0x2497D08DL, 0x2056CD3AL, 0x2D15EBE3L, 0x29D4F654L, 0xC5A92679L,
+    0xC1683BCEL, 0xCC2B1D17L, 0xC8EA00A0L, 0xD6AD50A5L, 0xD26C4D12L, 0xDF2F6BCBL, 0xDBEE767CL, 0xE3A1CBC1L, 0xE760D676L,
+    0xEA23F0AFL, 0xEEE2ED18L, 0xF0A5BD1DL, 0xF464A0AAL, 0xF9278673L, 0xFDE69BC4L, 0x89B8FD09L, 0x8D79E0BEL, 0x803AC667L,
+    0x84FBDBD0L, 0x9ABC8BD5L, 0x9E7D9662L, 0x933EB0BBL, 0x97FFAD0CL, 0xAFB010B1L, 0xAB710D06L, 0xA6322BDFL, 0xA2F33668L,
+    0xBCB4666DL, 0xB8757BDAL, 0xB5365D03L, 0xB1F740B4L};
 
 static DRFLAC_INLINE drflac_uint32 drflac_crc32_byte(drflac_uint32 crc32, drflac_uint8 data)
 {
@@ -3806,7 +4019,7 @@ static DRFLAC_INLINE drflac_uint32 drflac_crc32_uint64(drflac_uint32 crc32, drfl
 }
 #endif
 
-static DRFLAC_INLINE drflac_uint32 drflac_crc32_buffer(drflac_uint32 crc32, drflac_uint8* pData, drflac_uint32 dataSize)
+static DRFLAC_INLINE drflac_uint32 drflac_crc32_buffer(drflac_uint32 crc32, drflac_uint8 *pData, drflac_uint32 dataSize)
 {
     // This can be optimized.
     for (drflac_uint32 i = 0; i < dataSize; ++i) {
@@ -3815,18 +4028,17 @@ static DRFLAC_INLINE drflac_uint32 drflac_crc32_buffer(drflac_uint32 crc32, drfl
     return crc32;
 }
 
-
 static DRFLAC_INLINE drflac_bool32 drflac_ogg__is_capture_pattern(drflac_uint8 pattern[4])
 {
     return pattern[0] == 'O' && pattern[1] == 'g' && pattern[2] == 'g' && pattern[3] == 'S';
 }
 
-static DRFLAC_INLINE drflac_uint32 drflac_ogg__get_page_header_size(drflac_ogg_page_header* pHeader)
+static DRFLAC_INLINE drflac_uint32 drflac_ogg__get_page_header_size(drflac_ogg_page_header *pHeader)
 {
     return 27 + pHeader->segmentCount;
 }
 
-static DRFLAC_INLINE drflac_uint32 drflac_ogg__get_page_body_size(drflac_ogg_page_header* pHeader)
+static DRFLAC_INLINE drflac_uint32 drflac_ogg__get_page_body_size(drflac_ogg_page_header *pHeader)
 {
     drflac_uint32 pageBodySize = 0;
     for (int i = 0; i < pHeader->segmentCount; ++i) {
@@ -3836,7 +4048,11 @@ static DRFLAC_INLINE drflac_uint32 drflac_ogg__get_page_body_size(drflac_ogg_pag
     return pageBodySize;
 }
 
-drflac_result drflac_ogg__read_page_header_after_capture_pattern(drflac_read_proc onRead, void* pUserData, drflac_ogg_page_header* pHeader, drflac_uint32* pBytesRead, drflac_uint32* pCRC32)
+drflac_result drflac_ogg__read_page_header_after_capture_pattern(drflac_read_proc onRead,
+                                                                 void *pUserData,
+                                                                 drflac_ogg_page_header *pHeader,
+                                                                 drflac_uint32 *pBytesRead,
+                                                                 drflac_uint32 *pCRC32)
 {
     drflac_assert(*pCRC32 == DRFLAC_OGG_CAPTURE_PATTERN_CRC32);
 
@@ -3848,11 +4064,11 @@ drflac_result drflac_ogg__read_page_header_after_capture_pattern(drflac_read_pro
 
     pHeader->structureVersion = data[0];
     pHeader->headerType       = data[1];
-    drflac_copy_memory(&pHeader->granulePosition, &data[ 2], 8);
-    drflac_copy_memory(&pHeader->serialNumber,    &data[10], 4);
-    drflac_copy_memory(&pHeader->sequenceNumber,  &data[14], 4);
-    drflac_copy_memory(&pHeader->checksum,        &data[18], 4);
-    pHeader->segmentCount     = data[22];
+    drflac_copy_memory(&pHeader->granulePosition, &data[2], 8);
+    drflac_copy_memory(&pHeader->serialNumber, &data[10], 4);
+    drflac_copy_memory(&pHeader->sequenceNumber, &data[14], 4);
+    drflac_copy_memory(&pHeader->checksum, &data[18], 4);
+    pHeader->segmentCount = data[22];
 
     // Calculate the CRC. Note that for the calculation the checksum part of the page needs to be set to 0.
     data[18] = 0;
@@ -3865,7 +4081,6 @@ drflac_result drflac_ogg__read_page_header_after_capture_pattern(drflac_read_pro
         *pCRC32 = drflac_crc32_byte(*pCRC32, data[i]);
     }
 
-
     if (onRead(pUserData, pHeader->segmentTable, pHeader->segmentCount) != pHeader->segmentCount) {
         return DRFLAC_END_OF_STREAM;
     }
@@ -3878,7 +4093,11 @@ drflac_result drflac_ogg__read_page_header_after_capture_pattern(drflac_read_pro
     return DRFLAC_SUCCESS;
 }
 
-drflac_result drflac_ogg__read_page_header(drflac_read_proc onRead, void* pUserData, drflac_ogg_page_header* pHeader, drflac_uint32* pBytesRead, drflac_uint32* pCRC32)
+drflac_result drflac_ogg__read_page_header(drflac_read_proc onRead,
+                                           void *pUserData,
+                                           drflac_ogg_page_header *pHeader,
+                                           drflac_uint32 *pBytesRead,
+                                           drflac_uint32 *pCRC32)
 {
     *pBytesRead = 0;
 
@@ -3893,17 +4112,21 @@ drflac_result drflac_ogg__read_page_header(drflac_read_proc onRead, void* pUserD
         if (drflac_ogg__is_capture_pattern(id)) {
             *pCRC32 = DRFLAC_OGG_CAPTURE_PATTERN_CRC32;
 
-            drflac_result result = drflac_ogg__read_page_header_after_capture_pattern(onRead, pUserData, pHeader, pBytesRead, pCRC32);
+            drflac_result result =
+                drflac_ogg__read_page_header_after_capture_pattern(onRead, pUserData, pHeader, pBytesRead, pCRC32);
             if (result == DRFLAC_SUCCESS) {
                 return DRFLAC_SUCCESS;
-            } else {
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
                     continue;
-                } else {
+                }
+                else {
                     return result;
                 }
             }
-        } else {
+        }
+        else {
             // The first 4 bytes did not equal the capture pattern. Read the next byte and try again.
             id[0] = id[1];
             id[1] = id[2];
@@ -3916,28 +4139,32 @@ drflac_result drflac_ogg__read_page_header(drflac_read_proc onRead, void* pUserD
     }
 }
 
-
-// The main part of the Ogg encapsulation is the conversion from the physical Ogg bitstream to the native FLAC bitstream. It works
-// in three general stages: Ogg Physical Bitstream -> Ogg/FLAC Logical Bitstream -> FLAC Native Bitstream. dr_flac is architecured
-// in such a way that the core sections assume everything is delivered in native format. Therefore, for each encapsulation type
-// dr_flac is supporting there needs to be a layer sitting on top of the onRead and onSeek callbacks that ensures the bits read from
-// the physical Ogg bitstream are converted and delivered in native FLAC format.
+// The main part of the Ogg encapsulation is the conversion from the physical Ogg bitstream to the native FLAC
+// bitstream. It works in three general stages: Ogg Physical Bitstream -> Ogg/FLAC Logical Bitstream -> FLAC Native
+// Bitstream. dr_flac is architecured in such a way that the core sections assume everything is delivered in native
+// format. Therefore, for each encapsulation type dr_flac is supporting there needs to be a layer sitting on top of the
+// onRead and onSeek callbacks that ensures the bits read from the physical Ogg bitstream are converted and delivered in
+// native FLAC format.
 typedef struct
 {
-    drflac_read_proc onRead;    // The original onRead callback from drflac_open() and family.
-    drflac_seek_proc onSeek;    // The original onSeek callback from drflac_open() and family.
-    void* pUserData;            // The user data passed on onRead and onSeek. This is the user data that was passed on drflac_open() and family.
-    drflac_uint64 currentBytePos;   // The position of the byte we are sitting on in the physical byte stream. Used for efficient seeking.
-    drflac_uint64 firstBytePos;     // The position of the first byte in the physical bitstream. Points to the start of the "OggS" identifier of the FLAC bos page.
-    drflac_uint32 serialNumber;     // The serial number of the FLAC audio pages. This is determined by the initial header page that was read during initialization.
-    drflac_ogg_page_header bosPageHeader;   // Used for seeking.
+    drflac_read_proc onRead;      // The original onRead callback from drflac_open() and family.
+    drflac_seek_proc onSeek;      // The original onSeek callback from drflac_open() and family.
+    void *pUserData;              // The user data passed on onRead and onSeek. This is the user data that was passed on
+                                  // drflac_open() and family.
+    drflac_uint64 currentBytePos; // The position of the byte we are sitting on in the physical byte stream. Used for
+                                  // efficient seeking.
+    drflac_uint64 firstBytePos; // The position of the first byte in the physical bitstream. Points to the start of the
+                                // "OggS" identifier of the FLAC bos page.
+    drflac_uint32 serialNumber; // The serial number of the FLAC audio pages. This is determined by the initial header
+                                // page that was read during initialization.
+    drflac_ogg_page_header bosPageHeader; // Used for seeking.
     drflac_ogg_page_header currentPageHeader;
     drflac_uint32 bytesRemainingInPage;
     drflac_uint32 pageDataSize;
     drflac_uint8 pageData[DRFLAC_OGG_MAX_PAGE_SIZE];
 } drflac_oggbs; // oggbs = Ogg Bitstream
 
-static size_t drflac_oggbs__read_physical(drflac_oggbs* oggbs, void* bufferOut, size_t bytesToRead)
+static size_t drflac_oggbs__read_physical(drflac_oggbs *oggbs, void *bufferOut, size_t bytesToRead)
 {
     size_t bytesActuallyRead = oggbs->onRead(oggbs->pUserData, bufferOut, bytesToRead);
     oggbs->currentBytePos += bytesActuallyRead;
@@ -3945,7 +4172,7 @@ static size_t drflac_oggbs__read_physical(drflac_oggbs* oggbs, void* bufferOut,
     return bytesActuallyRead;
 }
 
-static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs* oggbs, drflac_uint64 offset, drflac_seek_origin origin)
+static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs *oggbs, drflac_uint64 offset, drflac_seek_origin origin)
 {
     if (origin == drflac_seek_origin_start) {
         if (offset <= 0x7FFFFFFF) {
@@ -3955,7 +4182,8 @@ static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs* oggbs, drflac_uin
             oggbs->currentBytePos = offset;
 
             return DRFLAC_TRUE;
-        } else {
+        }
+        else {
             if (!oggbs->onSeek(oggbs->pUserData, 0x7FFFFFFF, drflac_seek_origin_start)) {
                 return DRFLAC_FALSE;
             }
@@ -3963,7 +4191,8 @@ static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs* oggbs, drflac_uin
 
             return drflac_oggbs__seek_physical(oggbs, offset - 0x7FFFFFFF, drflac_seek_origin_current);
         }
-    } else {
+    }
+    else {
         while (offset > 0x7FFFFFFF) {
             if (!oggbs->onSeek(oggbs->pUserData, 0x7FFFFFFF, drflac_seek_origin_current)) {
                 return DRFLAC_FALSE;
@@ -3972,7 +4201,8 @@ static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs* oggbs, drflac_uin
             offset -= 0x7FFFFFFF;
         }
 
-        if (!oggbs->onSeek(oggbs->pUserData, (int)offset, drflac_seek_origin_current)) {    // <-- Safe cast thanks to the loop above.
+        if (!oggbs->onSeek(
+                oggbs->pUserData, (int)offset, drflac_seek_origin_current)) { // <-- Safe cast thanks to the loop above.
             return DRFLAC_FALSE;
         }
         oggbs->currentBytePos += offset;
@@ -3981,20 +4211,21 @@ static drflac_bool32 drflac_oggbs__seek_physical(drflac_oggbs* oggbs, drflac_uin
     }
 }
 
-static drflac_bool32 drflac_oggbs__goto_next_page(drflac_oggbs* oggbs, drflac_ogg_crc_mismatch_recovery recoveryMethod)
+static drflac_bool32 drflac_oggbs__goto_next_page(drflac_oggbs *oggbs, drflac_ogg_crc_mismatch_recovery recoveryMethod)
 {
     drflac_ogg_page_header header;
     for (;;) {
         drflac_uint32 crc32 = 0;
         drflac_uint32 bytesRead;
-        if (drflac_ogg__read_page_header(oggbs->onRead, oggbs->pUserData, &header, &bytesRead, &crc32) != DRFLAC_SUCCESS) {
+        if (drflac_ogg__read_page_header(oggbs->onRead, oggbs->pUserData, &header, &bytesRead, &crc32) !=
+            DRFLAC_SUCCESS) {
             return DRFLAC_FALSE;
         }
         oggbs->currentBytePos += bytesRead;
 
         drflac_uint32 pageBodySize = drflac_ogg__get_page_body_size(&header);
         if (pageBodySize > DRFLAC_OGG_MAX_PAGE_SIZE) {
-            continue;   // Invalid page size. Assume it's corrupted and just move to the next page.
+            continue; // Invalid page size. Assume it's corrupted and just move to the next page.
         }
 
         if (header.serialNumber != oggbs->serialNumber) {
@@ -4005,8 +4236,8 @@ static drflac_bool32 drflac_oggbs__goto_next_page(drflac_oggbs* oggbs, drflac_og
             continue;
         }
 
-
-        // We need to read the entire page and then do a CRC check on it. If there's a CRC mismatch we need to skip this page.
+        // We need to read the entire page and then do a CRC check on it. If there's a CRC mismatch we need to skip this
+        // page.
         if (drflac_oggbs__read_physical(oggbs, oggbs->pageData, pageBodySize) != pageBodySize) {
             return DRFLAC_FALSE;
         }
@@ -4016,18 +4247,19 @@ static drflac_bool32 drflac_oggbs__goto_next_page(drflac_oggbs* oggbs, drflac_og
         drflac_uint32 actualCRC32 = drflac_crc32_buffer(crc32, oggbs->pageData, oggbs->pageDataSize);
         if (actualCRC32 != header.checksum) {
             if (recoveryMethod == drflac_ogg_recover_on_crc_mismatch) {
-                continue;   // CRC mismatch. Skip this page.
-            } else {
-                // Even though we are failing on a CRC mismatch, we still want our stream to be in a good state. Therefore we
-                // go to the next valid page to ensure we're in a good state, but return false to let the caller know that the
-                // seek did not fully complete.
+                continue; // CRC mismatch. Skip this page.
+            }
+            else {
+                // Even though we are failing on a CRC mismatch, we still want our stream to be in a good state.
+                // Therefore we go to the next valid page to ensure we're in a good state, but return false to let the
+                // caller know that the seek did not fully complete.
                 drflac_oggbs__goto_next_page(oggbs, drflac_ogg_recover_on_crc_mismatch);
                 return DRFLAC_FALSE;
             }
         }
 #endif
 
-        oggbs->currentPageHeader = header;
+        oggbs->currentPageHeader    = header;
         oggbs->bytesRemainingInPage = pageBodySize;
         return DRFLAC_TRUE;
     }
@@ -4109,12 +4341,12 @@ static drflac_bool32 drflac_oggbs__seek_to_next_frame(drflac_oggbs* oggbs)
 }
 #endif
 
-static size_t drflac__on_read_ogg(void* pUserData, void* bufferOut, size_t bytesToRead)
+static size_t drflac__on_read_ogg(void *pUserData, void *bufferOut, size_t bytesToRead)
 {
-    drflac_oggbs* oggbs = (drflac_oggbs*)pUserData;
+    drflac_oggbs *oggbs = (drflac_oggbs *)pUserData;
     drflac_assert(oggbs != NULL);
 
-    drflac_uint8* pRunningBufferOut = (drflac_uint8*)bufferOut;
+    drflac_uint8 *pRunningBufferOut = (drflac_uint8 *)bufferOut;
 
     // Reading is done page-by-page. If we've run out of bytes in the page we need to move to the next one.
     size_t bytesRead = 0;
@@ -4122,7 +4354,9 @@ static size_t drflac__on_read_ogg(void* pUserData, void* bufferOut, size_t bytes
         size_t bytesRemainingToRead = bytesToRead - bytesRead;
 
         if (oggbs->bytesRemainingInPage >= bytesRemainingToRead) {
-            drflac_copy_memory(pRunningBufferOut, oggbs->pageData + (oggbs->pageDataSize - oggbs->bytesRemainingInPage), bytesRemainingToRead);
+            drflac_copy_memory(pRunningBufferOut,
+                               oggbs->pageData + (oggbs->pageDataSize - oggbs->bytesRemainingInPage),
+                               bytesRemainingToRead);
             bytesRead += bytesRemainingToRead;
             oggbs->bytesRemainingInPage -= (drflac_uint32)bytesRemainingToRead;
             break;
@@ -4130,7 +4364,9 @@ static size_t drflac__on_read_ogg(void* pUserData, void* bufferOut, size_t bytes
 
         // If we get here it means some of the requested data is contained in the next pages.
         if (oggbs->bytesRemainingInPage > 0) {
-            drflac_copy_memory(pRunningBufferOut, oggbs->pageData + (oggbs->pageDataSize - oggbs->bytesRemainingInPage), oggbs->bytesRemainingInPage);
+            drflac_copy_memory(pRunningBufferOut,
+                               oggbs->pageData + (oggbs->pageDataSize - oggbs->bytesRemainingInPage),
+                               oggbs->bytesRemainingInPage);
             bytesRead += oggbs->bytesRemainingInPage;
             pRunningBufferOut += oggbs->bytesRemainingInPage;
             oggbs->bytesRemainingInPage = 0;
@@ -4138,16 +4374,16 @@ static size_t drflac__on_read_ogg(void* pUserData, void* bufferOut, size_t bytes
 
         drflac_assert(bytesRemainingToRead > 0);
         if (!drflac_oggbs__goto_next_page(oggbs, drflac_ogg_recover_on_crc_mismatch)) {
-            break;  // Failed to go to the next page. Might have simply hit the end of the stream.
+            break; // Failed to go to the next page. Might have simply hit the end of the stream.
         }
     }
 
     return bytesRead;
 }
 
-static drflac_bool32 drflac__on_seek_ogg(void* pUserData, int offset, drflac_seek_origin origin)
+static drflac_bool32 drflac__on_seek_ogg(void *pUserData, int offset, drflac_seek_origin origin)
 {
-    drflac_oggbs* oggbs = (drflac_oggbs*)pUserData;
+    drflac_oggbs *oggbs = (drflac_oggbs *)pUserData;
     drflac_assert(oggbs != NULL);
     drflac_assert(offset > 0 || (offset == 0 && origin == drflac_seek_origin_start));
 
@@ -4164,7 +4400,6 @@ static drflac_bool32 drflac__on_seek_ogg(void* pUserData, int offset, drflac_see
         return drflac__on_seek_ogg(pUserData, offset, drflac_seek_origin_current);
     }
 
-
     drflac_assert(origin == drflac_seek_origin_current);
 
     int bytesSeeked = 0;
@@ -4194,11 +4429,11 @@ static drflac_bool32 drflac__on_seek_ogg(void* pUserData, int offset, drflac_see
     return DRFLAC_TRUE;
 }
 
-drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleIndex)
+drflac_bool32 drflac_ogg__seek_to_sample(drflac *pFlac, drflac_uint64 sampleIndex)
 {
-    drflac_oggbs* oggbs = (drflac_oggbs*)pFlac->_oggbs;
+    drflac_oggbs *oggbs = (drflac_oggbs *)pFlac->_oggbs;
 
-    drflac_uint64 originalBytePos = oggbs->currentBytePos;   // For recovery.
+    drflac_uint64 originalBytePos = oggbs->currentBytePos; // For recovery.
 
     // First seek to the first frame.
     if (!drflac__seek_to_byte(&pFlac->bs, pFlac->firstFramePos)) {
@@ -4207,29 +4442,30 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
     oggbs->bytesRemainingInPage = 0;
 
     drflac_uint64 runningGranulePosition = 0;
-    drflac_uint64 runningFrameBytePos = oggbs->currentBytePos;   // <-- Points to the OggS identifier.
+    drflac_uint64 runningFrameBytePos    = oggbs->currentBytePos; // <-- Points to the OggS identifier.
     for (;;) {
         if (!drflac_oggbs__goto_next_page(oggbs, drflac_ogg_recover_on_crc_mismatch)) {
             drflac_oggbs__seek_physical(oggbs, originalBytePos, drflac_seek_origin_start);
-            return DRFLAC_FALSE;   // Never did find that sample...
+            return DRFLAC_FALSE; // Never did find that sample...
         }
 
-        runningFrameBytePos = oggbs->currentBytePos - drflac_ogg__get_page_header_size(&oggbs->currentPageHeader) - oggbs->pageDataSize;
-        if (oggbs->currentPageHeader.granulePosition*pFlac->channels >= sampleIndex) {
+        runningFrameBytePos =
+            oggbs->currentBytePos - drflac_ogg__get_page_header_size(&oggbs->currentPageHeader) - oggbs->pageDataSize;
+        if (oggbs->currentPageHeader.granulePosition * pFlac->channels >= sampleIndex) {
             break; // The sample is somewhere in the previous page.
         }
 
-
-        // At this point we know the sample is not in the previous page. It could possibly be in this page. For simplicity we
-        // disregard any pages that do not begin a fresh packet.
-        if ((oggbs->currentPageHeader.headerType & 0x01) == 0) {    // <-- Is it a fresh page?
+        // At this point we know the sample is not in the previous page. It could possibly be in this page. For
+        // simplicity we disregard any pages that do not begin a fresh packet.
+        if ((oggbs->currentPageHeader.headerType & 0x01) == 0) { // <-- Is it a fresh page?
             if (oggbs->currentPageHeader.segmentTable[0] >= 2) {
                 drflac_uint8 firstBytesInPage[2];
                 firstBytesInPage[0] = oggbs->pageData[0];
                 firstBytesInPage[1] = oggbs->pageData[1];
 
-                if ((firstBytesInPage[0] == 0xFF) && (firstBytesInPage[1] & 0xFC) == 0xF8) {    // <-- Does the page begin with a frame's sync code?
-                    runningGranulePosition = oggbs->currentPageHeader.granulePosition*pFlac->channels;
+                if ((firstBytesInPage[0] == 0xFF) &&
+                    (firstBytesInPage[1] & 0xFC) == 0xF8) { // <-- Does the page begin with a frame's sync code?
+                    runningGranulePosition = oggbs->currentPageHeader.granulePosition * pFlac->channels;
                 }
 
                 continue;
@@ -4237,11 +4473,10 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
         }
     }
 
-
-    // We found the page that that is closest to the sample, so now we need to find it. The first thing to do is seek to the
-    // start of that page. In the loop above we checked that it was a fresh page which means this page is also the start of
-    // a new frame. This property means that after we've seeked to the page we can immediately start looping over frames until
-    // we find the one containing the target sample.
+    // We found the page that that is closest to the sample, so now we need to find it. The first thing to do is seek to
+    // the start of that page. In the loop above we checked that it was a fresh page which means this page is also the
+    // start of a new frame. This property means that after we've seeked to the page we can immediately start looping
+    // over frames until we find the one containing the target sample.
     if (!drflac_oggbs__seek_physical(oggbs, runningFrameBytePos, drflac_seek_origin_start)) {
         return DRFLAC_FALSE;
     }
@@ -4249,7 +4484,6 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
         return DRFLAC_FALSE;
     }
 
-
     // At this point we'll be sitting on the first byte of the frame header of the first frame in the page. We just keep
     // looping over these frames until we find the one containing the sample we're after.
     drflac_uint64 runningSampleCount = runningGranulePosition;
@@ -4258,18 +4492,19 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
         //   1) Use the native FLAC decoder.
         //   2) Use Ogg's framing system.
         //
-        // Both of these options have their own pros and cons. Using the native FLAC decoder is slower because it needs to
-        // do a full decode of the frame. Using Ogg's framing system is faster, but more complicated and involves some code
-        // duplication for the decoding of frame headers.
+        // Both of these options have their own pros and cons. Using the native FLAC decoder is slower because it needs
+        // to do a full decode of the frame. Using Ogg's framing system is faster, but more complicated and involves
+        // some code duplication for the decoding of frame headers.
         //
-        // Another thing to consider is that using the Ogg framing system will perform direct seeking of the physical Ogg
-        // bitstream. This is important to consider because it means we cannot read data from the drflac_bs object using the
-        // standard drflac__*() APIs because that will read in extra data for it's own internal caching which in turn breaks
-        // the positioning of the read pointer of the physical Ogg bitstream. Therefore, anything that would normally be read
-        // using the native FLAC decoding APIs, such as drflac__read_next_frame_header(), need to be re-implemented so as to
-        // avoid the use of the drflac_bs object.
+        // Another thing to consider is that using the Ogg framing system will perform direct seeking of the physical
+        // Ogg bitstream. This is important to consider because it means we cannot read data from the drflac_bs object
+        // using the standard drflac__*() APIs because that will read in extra data for it's own internal caching which
+        // in turn breaks the positioning of the read pointer of the physical Ogg bitstream. Therefore, anything that
+        // would normally be read using the native FLAC decoding APIs, such as drflac__read_next_frame_header(), need to
+        // be re-implemented so as to avoid the use of the drflac_bs object.
         //
-        // Considering these issues, I have decided to use the slower native FLAC decoding method for the following reasons:
+        // Considering these issues, I have decided to use the slower native FLAC decoding method for the following
+        // reasons:
         //   1) Seeking is already partially accellerated using Ogg's paging system in the code block above.
         //   2) Seeking in an Ogg encapsulated FLAC stream is probably quite uncommon.
         //   3) Simplicity.
@@ -4278,38 +4513,46 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
         }
 
         drflac_uint64 firstSampleInFrame = 0;
-        drflac_uint64 lastSampleInFrame = 0;
+        drflac_uint64 lastSampleInFrame  = 0;
         drflac__get_current_frame_sample_range(pFlac, &firstSampleInFrame, &lastSampleInFrame);
 
         drflac_uint64 sampleCountInThisFrame = (lastSampleInFrame - firstSampleInFrame) + 1;
         if (sampleIndex < (runningSampleCount + sampleCountInThisFrame)) {
-            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC mismatch), we need to pretend
-            // it never existed and keep iterating.
+            // The sample should be in this frame. We need to fully decode it, however if it's an invalid frame (a CRC
+            // mismatch), we need to pretend it never existed and keep iterating.
             drflac_result result = drflac__decode_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 // The frame is valid. We just need to skip over some samples to ensure it's sample-exact.
-                drflac_uint64 samplesToDecode = (size_t)(sampleIndex - runningSampleCount);    // <-- Safe cast because the maximum number of samples in a frame is 65535.
+                drflac_uint64 samplesToDecode = (size_t)(
+                    sampleIndex -
+                    runningSampleCount); // <-- Safe cast because the maximum number of samples in a frame is 65535.
                 if (samplesToDecode == 0) {
                     return DRFLAC_TRUE;
                 }
-                return drflac_read_s32(pFlac, samplesToDecode, NULL) != 0;  // <-- If this fails, something bad has happened (it should never fail).
-            } else {
+                return drflac_read_s32(pFlac, samplesToDecode, NULL) !=
+                       0; // <-- If this fails, something bad has happened (it should never fail).
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
-        } else {
-            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we pretend this
-            // frame never existed and leave the running sample count untouched.
+        }
+        else {
+            // It's not in this frame. We need to seek past the frame, but check if there was a CRC mismatch. If so, we
+            // pretend this frame never existed and leave the running sample count untouched.
             drflac_result result = drflac__seek_to_next_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 runningSampleCount += sampleCountInThisFrame;
-            } else {
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    continue;   // CRC mismatch. Pretend this frame never existed.
-                } else {
+                    continue; // CRC mismatch. Pretend this frame never existed.
+                }
+                else {
                     return DRFLAC_FALSE;
                 }
             }
@@ -4317,23 +4560,30 @@ drflac_bool32 drflac_ogg__seek_to_sample(drflac* pFlac, drflac_uint64 sampleInde
     }
 }
 
-
-drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, void* pUserData, void* pUserDataMD, drflac_bool32 relaxed)
+drflac_bool32 drflac__init_private__ogg(drflac_init_info *pInit,
+                                        drflac_read_proc onRead,
+                                        drflac_seek_proc onSeek,
+                                        drflac_meta_proc onMeta,
+                                        void *pUserData,
+                                        void *pUserDataMD,
+                                        drflac_bool32 relaxed)
 {
     // Pre: The bit stream should be sitting just past the 4-byte OggS capture pattern.
     (void)relaxed;
 
-    pInit->container = drflac_container_ogg;
+    pInit->container       = drflac_container_ogg;
     pInit->oggFirstBytePos = 0;
 
-    // We'll get here if the first 4 bytes of the stream were the OggS capture pattern, however it doesn't necessarily mean the
-    // stream includes FLAC encoded audio. To check for this we need to scan the beginning-of-stream page markers and check if
-    // any match the FLAC specification. Important to keep in mind that the stream may be multiplexed.
+    // We'll get here if the first 4 bytes of the stream were the OggS capture pattern, however it doesn't necessarily
+    // mean the stream includes FLAC encoded audio. To check for this we need to scan the beginning-of-stream page
+    // markers and check if any match the FLAC specification. Important to keep in mind that the stream may be
+    // multiplexed.
     drflac_ogg_page_header header;
 
-    drflac_uint32 crc32 = DRFLAC_OGG_CAPTURE_PATTERN_CRC32;
+    drflac_uint32 crc32     = DRFLAC_OGG_CAPTURE_PATTERN_CRC32;
     drflac_uint32 bytesRead = 0;
-    if (drflac_ogg__read_page_header_after_capture_pattern(onRead, pUserData, &header, &bytesRead, &crc32) != DRFLAC_SUCCESS) {
+    if (drflac_ogg__read_page_header_after_capture_pattern(onRead, pUserData, &header, &bytesRead, &crc32) !=
+        DRFLAC_SUCCESS) {
         return DRFLAC_FALSE;
     }
     pInit->runningFilePos += bytesRead;
@@ -4344,10 +4594,9 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
             return DRFLAC_FALSE;
         }
 
-
         // Check if it's a FLAC header.
         int pageBodySize = drflac_ogg__get_page_body_size(&header);
-        if (pageBodySize == 51) {   // 51 = the lacing value of the FLAC header packet.
+        if (pageBodySize == 51) { // 51 = the lacing value of the FLAC header packet.
             // It could be a FLAC page...
             drflac_uint32 bytesRemainingInPage = pageBodySize;
 
@@ -4373,11 +4622,12 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
                     }
 
                     if (mappingVersion[0] != 1) {
-                        return DRFLAC_FALSE;   // Only supporting version 1.x of the Ogg mapping.
+                        return DRFLAC_FALSE; // Only supporting version 1.x of the Ogg mapping.
                     }
 
-                    // The next 2 bytes are the non-audio packets, not including this one. We don't care about this because we're going to
-                    // be handling it in a generic way based on the serial number and packet types.
+                    // The next 2 bytes are the non-audio packets, not including this one. We don't care about this
+                    // because we're going to be handling it in a generic way based on the serial number and packet
+                    // types.
                     if (!onSeek(pUserData, 2, drflac_seek_origin_current)) {
                         return DRFLAC_FALSE;
                     }
@@ -4392,12 +4642,13 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
                         drflac_uint8 isLastBlock;
                         drflac_uint8 blockType;
                         drflac_uint32 blockSize;
-                        if (!drflac__read_and_decode_block_header(onRead, pUserData, &isLastBlock, &blockType, &blockSize)) {
+                        if (!drflac__read_and_decode_block_header(
+                                onRead, pUserData, &isLastBlock, &blockType, &blockSize)) {
                             return DRFLAC_FALSE;
                         }
 
                         if (blockType != DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO || blockSize != 34) {
-                            return DRFLAC_FALSE;    // Invalid block type. First block must be the STREAMINFO block.
+                            return DRFLAC_FALSE; // Invalid block type. First block must be the STREAMINFO block.
                         }
 
                         drflac_streaminfo streaminfo;
@@ -4413,39 +4664,46 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
 
                             if (onMeta) {
                                 drflac_metadata metadata;
-                                metadata.type = DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO;
-                                metadata.pRawData = NULL;
-                                metadata.rawDataSize = 0;
+                                metadata.type            = DRFLAC_METADATA_BLOCK_TYPE_STREAMINFO;
+                                metadata.pRawData        = NULL;
+                                metadata.rawDataSize     = 0;
                                 metadata.data.streaminfo = streaminfo;
                                 onMeta(pUserDataMD, &metadata);
                             }
 
-                            pInit->runningFilePos  += pageBodySize;
-                            pInit->oggFirstBytePos  = pInit->runningFilePos - 79;   // Subtracting 79 will place us right on top of the "OggS" identifier of the FLAC bos page.
-                            pInit->oggSerial        = header.serialNumber;
-                            pInit->oggBosHeader     = header;
+                            pInit->runningFilePos += pageBodySize;
+                            pInit->oggFirstBytePos =
+                                pInit->runningFilePos - 79; // Subtracting 79 will place us right on top of the "OggS"
+                                                            // identifier of the FLAC bos page.
+                            pInit->oggSerial    = header.serialNumber;
+                            pInit->oggBosHeader = header;
                             break;
-                        } else {
+                        }
+                        else {
                             // Failed to read STREAMINFO block. Aww, so close...
                             return DRFLAC_FALSE;
                         }
-                    } else {
+                    }
+                    else {
                         // Invalid file.
                         return DRFLAC_FALSE;
                     }
-                } else {
+                }
+                else {
                     // Not a FLAC header. Skip it.
                     if (!onSeek(pUserData, bytesRemainingInPage, drflac_seek_origin_current)) {
                         return DRFLAC_FALSE;
                     }
                 }
-            } else {
+            }
+            else {
                 // Not a FLAC header. Seek past the entire page and move on to the next.
                 if (!onSeek(pUserData, bytesRemainingInPage, drflac_seek_origin_current)) {
                     return DRFLAC_FALSE;
                 }
             }
-        } else {
+        }
+        else {
             if (!onSeek(pUserData, pageBodySize, drflac_seek_origin_current)) {
                 return DRFLAC_FALSE;
             }
@@ -4453,7 +4711,6 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
 
         pInit->runningFilePos += pageBodySize;
 
-
         // Read the header of the next page.
         if (drflac_ogg__read_page_header(onRead, pUserData, &header, &bytesRead, &crc32) != DRFLAC_SUCCESS) {
             return DRFLAC_FALSE;
@@ -4461,35 +4718,39 @@ drflac_bool32 drflac__init_private__ogg(drflac_init_info* pInit, drflac_read_pro
         pInit->runningFilePos += bytesRead;
     }
 
-
-    // If we get here it means we found a FLAC audio stream. We should be sitting on the first byte of the header of the next page. The next
-    // packets in the FLAC logical stream contain the metadata. The only thing left to do in the initialiation phase for Ogg is to create the
-    // Ogg bistream object.
-    pInit->hasMetadataBlocks = DRFLAC_TRUE;    // <-- Always have at least VORBIS_COMMENT metadata block.
+    // If we get here it means we found a FLAC audio stream. We should be sitting on the first byte of the header of the
+    // next page. The next packets in the FLAC logical stream contain the metadata. The only thing left to do in the
+    // initialiation phase for Ogg is to create the Ogg bistream object.
+    pInit->hasMetadataBlocks = DRFLAC_TRUE; // <-- Always have at least VORBIS_COMMENT metadata block.
     return DRFLAC_TRUE;
 }
 #endif
 
-drflac_bool32 drflac__init_private(drflac_init_info* pInit, drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, drflac_container container, void* pUserData, void* pUserDataMD)
+drflac_bool32 drflac__init_private(drflac_init_info *pInit,
+                                   drflac_read_proc onRead,
+                                   drflac_seek_proc onSeek,
+                                   drflac_meta_proc onMeta,
+                                   drflac_container container,
+                                   void *pUserData,
+                                   void *pUserDataMD)
 {
     if (pInit == NULL || onRead == NULL || onSeek == NULL) {
         return DRFLAC_FALSE;
     }
 
     drflac_zero_memory(pInit, sizeof(*pInit));
-    pInit->onRead       = onRead;
-    pInit->onSeek       = onSeek;
-    pInit->onMeta       = onMeta;
-    pInit->container    = container;
-    pInit->pUserData    = pUserData;
-    pInit->pUserDataMD  = pUserDataMD;
+    pInit->onRead      = onRead;
+    pInit->onSeek      = onSeek;
+    pInit->onMeta      = onMeta;
+    pInit->container   = container;
+    pInit->pUserData   = pUserData;
+    pInit->pUserDataMD = pUserDataMD;
 
     pInit->bs.onRead    = onRead;
     pInit->bs.onSeek    = onSeek;
     pInit->bs.pUserData = pUserData;
     drflac__reset_cache(&pInit->bs);
 
-
     // If the container is explicitly defined then we can try opening in relaxed mode.
     drflac_bool32 relaxed = container != drflac_container_unknown;
 
@@ -4498,30 +4759,31 @@ drflac_bool32 drflac__init_private(drflac_init_info* pInit, drflac_read_proc onR
     // Skip over any ID3 tags.
     for (;;) {
         if (onRead(pUserData, id, 4) != 4) {
-            return DRFLAC_FALSE;    // Ran out of data.
+            return DRFLAC_FALSE; // Ran out of data.
         }
         pInit->runningFilePos += 4;
 
         if (id[0] == 'I' && id[1] == 'D' && id[2] == '3') {
             drflac_uint8 header[6];
             if (onRead(pUserData, header, 6) != 6) {
-                return DRFLAC_FALSE;    // Ran out of data.
+                return DRFLAC_FALSE; // Ran out of data.
             }
             pInit->runningFilePos += 6;
 
             drflac_uint8 flags = header[1];
             drflac_uint32 headerSize;
-            drflac_copy_memory(&headerSize, header+2, 4);
+            drflac_copy_memory(&headerSize, header + 2, 4);
             headerSize = drflac__unsynchsafe_32(drflac__be2host_32(headerSize));
             if (flags & 0x10) {
                 headerSize += 10;
             }
 
             if (!onSeek(pUserData, headerSize, drflac_seek_origin_current)) {
-                return DRFLAC_FALSE;    // Failed to seek past the tag.
+                return DRFLAC_FALSE; // Failed to seek past the tag.
             }
             pInit->runningFilePos += headerSize;
-        } else {
+        }
+        else {
             break;
         }
     }
@@ -4551,7 +4813,7 @@ drflac_bool32 drflac__init_private(drflac_init_info* pInit, drflac_read_proc onR
     return DRFLAC_FALSE;
 }
 
-void drflac__init_from_info(drflac* pFlac, drflac_init_info* pInit)
+void drflac__init_from_info(drflac *pFlac, drflac_init_info *pInit)
 {
     drflac_assert(pFlac != NULL);
     drflac_assert(pInit != NULL);
@@ -4568,7 +4830,12 @@ void drflac__init_from_info(drflac* pFlac, drflac_init_info* pInit)
     pFlac->container        = pInit->container;
 }
 
-drflac* drflac_open_with_metadata_private(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, drflac_container container, void* pUserData, void* pUserDataMD)
+drflac *drflac_open_with_metadata_private(drflac_read_proc onRead,
+                                          drflac_seek_proc onSeek,
+                                          drflac_meta_proc onMeta,
+                                          drflac_container container,
+                                          void *pUserData,
+                                          void *pUserDataMD)
 {
 #ifndef DRFLAC_NO_CPUID
     // CPU support first.
@@ -4585,23 +4852,25 @@ drflac* drflac_open_with_metadata_private(drflac_read_proc onRead, drflac_seek_p
     //   2) A block of memory large enough to store the decoded samples of the largest frame in the stream
     //   3) If the container is Ogg, a drflac_oggbs object
     //
-    // The complicated part of the allocation is making sure there's enough room the decoded samples, taking into consideration
-    // the different SIMD instruction sets.
+    // The complicated part of the allocation is making sure there's enough room the decoded samples, taking into
+    // consideration the different SIMD instruction sets.
     drflac_uint32 allocationSize = sizeof(drflac);
 
-    // The allocation size for decoded frames depends on the number of 32-bit integers that fit inside the largest SIMD vector
-    // we are supporting.
+    // The allocation size for decoded frames depends on the number of 32-bit integers that fit inside the largest SIMD
+    // vector we are supporting.
     drflac_uint32 wholeSIMDVectorCountPerChannel;
     if ((init.maxBlockSize % (DRFLAC_MAX_SIMD_VECTOR_SIZE / sizeof(drflac_int32))) == 0) {
         wholeSIMDVectorCountPerChannel = (init.maxBlockSize / (DRFLAC_MAX_SIMD_VECTOR_SIZE / sizeof(drflac_int32)));
-    } else {
+    }
+    else {
         wholeSIMDVectorCountPerChannel = (init.maxBlockSize / (DRFLAC_MAX_SIMD_VECTOR_SIZE / sizeof(drflac_int32))) + 1;
     }
 
-    drflac_uint32 decodedSamplesAllocationSize = wholeSIMDVectorCountPerChannel * DRFLAC_MAX_SIMD_VECTOR_SIZE * init.channels;
+    drflac_uint32 decodedSamplesAllocationSize =
+        wholeSIMDVectorCountPerChannel * DRFLAC_MAX_SIMD_VECTOR_SIZE * init.channels;
 
     allocationSize += decodedSamplesAllocationSize;
-    allocationSize += DRFLAC_MAX_SIMD_VECTOR_SIZE;  // Allocate extra bytes to ensure we have enough for alignment.
+    allocationSize += DRFLAC_MAX_SIMD_VECTOR_SIZE; // Allocate extra bytes to ensure we have enough for alignment.
 
 #ifndef DR_FLAC_NO_OGG
     // There's additional data required for Ogg streams.
@@ -4610,27 +4879,27 @@ drflac* drflac_open_with_metadata_private(drflac_read_proc onRead, drflac_seek_p
     }
 #endif
 
-    drflac* pFlac = (drflac*)DRFLAC_MALLOC(allocationSize);
+    drflac *pFlac = (drflac *)DRFLAC_MALLOC(allocationSize);
     drflac__init_from_info(pFlac, &init);
-    pFlac->pDecodedSamples = (drflac_int32*)drflac_align((size_t)pFlac->pExtraData, DRFLAC_MAX_SIMD_VECTOR_SIZE);
+    pFlac->pDecodedSamples = (drflac_int32 *)drflac_align((size_t)pFlac->pExtraData, DRFLAC_MAX_SIMD_VECTOR_SIZE);
 
 #ifndef DR_FLAC_NO_OGG
     if (init.container == drflac_container_ogg) {
-        drflac_oggbs* oggbs = (drflac_oggbs*)((drflac_uint8*)pFlac->pDecodedSamples + decodedSamplesAllocationSize);
-        oggbs->onRead = onRead;
-        oggbs->onSeek = onSeek;
-        oggbs->pUserData = pUserData;
+        drflac_oggbs *oggbs   = (drflac_oggbs *)((drflac_uint8 *)pFlac->pDecodedSamples + decodedSamplesAllocationSize);
+        oggbs->onRead         = onRead;
+        oggbs->onSeek         = onSeek;
+        oggbs->pUserData      = pUserData;
         oggbs->currentBytePos = init.oggFirstBytePos;
-        oggbs->firstBytePos = init.oggFirstBytePos;
-        oggbs->serialNumber = init.oggSerial;
-        oggbs->bosPageHeader = init.oggBosHeader;
+        oggbs->firstBytePos   = init.oggFirstBytePos;
+        oggbs->serialNumber   = init.oggSerial;
+        oggbs->bosPageHeader  = init.oggBosHeader;
         oggbs->bytesRemainingInPage = 0;
 
         // The Ogg bistream needs to be layered on top of the original bitstream.
-        pFlac->bs.onRead = drflac__on_read_ogg;
-        pFlac->bs.onSeek = drflac__on_seek_ogg;
-        pFlac->bs.pUserData = (void*)oggbs;
-        pFlac->_oggbs = (void*)oggbs;
+        pFlac->bs.onRead    = drflac__on_read_ogg;
+        pFlac->bs.onSeek    = drflac__on_seek_ogg;
+        pFlac->bs.pUserData = (void *)oggbs;
+        pFlac->_oggbs       = (void *)oggbs;
     }
 #endif
 
@@ -4642,23 +4911,25 @@ drflac* drflac_open_with_metadata_private(drflac_read_proc onRead, drflac_seek_p
         }
     }
 
-    // If we get here, but don't have a STREAMINFO block, it means we've opened the stream in relaxed mode and need to decode
-    // the first frame.
+    // If we get here, but don't have a STREAMINFO block, it means we've opened the stream in relaxed mode and need to
+    // decode the first frame.
     if (!init.hasStreamInfoBlock) {
         pFlac->currentFrame.header = init.firstFrameHeader;
-        do
-        {
+        do {
             drflac_result result = drflac__decode_frame(pFlac);
             if (result == DRFLAC_SUCCESS) {
                 break;
-            } else {
+            }
+            else {
                 if (result == DRFLAC_CRC_MISMATCH) {
-                    if (!drflac__read_next_frame_header(&pFlac->bs, pFlac->bitsPerSample, &pFlac->currentFrame.header)) {
+                    if (!drflac__read_next_frame_header(
+                            &pFlac->bs, pFlac->bitsPerSample, &pFlac->currentFrame.header)) {
                         DRFLAC_FREE(pFlac);
                         return NULL;
                     }
                     continue;
-                } else {
+                }
+                else {
                     DRFLAC_FREE(pFlac);
                     return NULL;
                 }
@@ -4666,35 +4937,33 @@ drflac* drflac_open_with_metadata_private(drflac_read_proc onRead, drflac_seek_p
         } while (1);
     }
 
-    //M.P: Preallocated scratch buffer used during decoding in order to save on stack usage
-    pFlac->scratchBuffer = (drflac_int32*)DRFLAC_MALLOC(4096*sizeof(drflac_int32));
-    
+    // M.P: Preallocated scratch buffer used during decoding in order to save on stack usage
+    pFlac->scratchBuffer = (drflac_int32 *)DRFLAC_MALLOC(4096 * sizeof(drflac_int32));
+
     return pFlac;
 }
 
-
-
 #ifndef DR_FLAC_NO_STDIO
-typedef void* drflac_file;
+typedef void *drflac_file;
 
 #if defined(DR_FLAC_NO_WIN32_IO) || !defined(_WIN32)
 #include <stdio.h>
 
-static size_t drflac__on_read_stdio(void* pUserData, void* bufferOut, size_t bytesToRead)
+static size_t drflac__on_read_stdio(void *pUserData, void *bufferOut, size_t bytesToRead)
 {
-    return fread(bufferOut, 1, bytesToRead, (FILE*)pUserData);
+    return fread(bufferOut, 1, bytesToRead, (FILE *)pUserData);
 }
 
-static drflac_bool32 drflac__on_seek_stdio(void* pUserData, int offset, drflac_seek_origin origin)
+static drflac_bool32 drflac__on_seek_stdio(void *pUserData, int offset, drflac_seek_origin origin)
 {
     drflac_assert(offset > 0 || (offset == 0 && origin == drflac_seek_origin_start));
 
-    return fseek((FILE*)pUserData, offset, (origin == drflac_seek_origin_current) ? SEEK_CUR : SEEK_SET) == 0;
+    return fseek((FILE *)pUserData, offset, (origin == drflac_seek_origin_current) ? SEEK_CUR : SEEK_SET) == 0;
 }
 
-static drflac_file drflac__open_file_handle(const char* filename)
+static drflac_file drflac__open_file_handle(const char *filename)
 {
-    FILE* pFile;
+    FILE *pFile;
 #ifdef _MSC_VER
     if (fopen_s(&pFile, filename, "rb") != 0) {
         return NULL;
@@ -4711,7 +4980,7 @@ static drflac_file drflac__open_file_handle(const char* filename)
 
 static void drflac__close_file_handle(drflac_file file)
 {
-    fclose((FILE*)file);
+    fclose((FILE *)file);
 }
 #else
 #include <windows.h>
@@ -4721,9 +4990,10 @@ static void drflac__close_file_handle(drflac_file file)
 #define INVALID_SET_FILE_POINTER ((DWORD)-1)
 #endif
 
-static size_t drflac__on_read_stdio(void* pUserData, void* bufferOut, size_t bytesToRead)
+static size_t drflac__on_read_stdio(void *pUserData, void *bufferOut, size_t bytesToRead)
 {
-    drflac_assert(bytesToRead < 0xFFFFFFFF);   // dr_flac will never request huge amounts of data at a time. This is a safe assertion.
+    drflac_assert(bytesToRead <
+                  0xFFFFFFFF); // dr_flac will never request huge amounts of data at a time. This is a safe assertion.
 
     DWORD bytesRead;
     ReadFile((HANDLE)pUserData, bufferOut, (DWORD)bytesToRead, &bytesRead, NULL);
@@ -4731,16 +5001,19 @@ static size_t drflac__on_read_stdio(void* pUserData, void* bufferOut, size_t byt
     return (size_t)bytesRead;
 }
 
-static drflac_bool32 drflac__on_seek_stdio(void* pUserData, int offset, drflac_seek_origin origin)
+static drflac_bool32 drflac__on_seek_stdio(void *pUserData, int offset, drflac_seek_origin origin)
 {
     drflac_assert(offset > 0 || (offset == 0 && origin == drflac_seek_origin_start));
 
-    return SetFilePointer((HANDLE)pUserData, offset, NULL, (origin == drflac_seek_origin_current) ? FILE_CURRENT : FILE_BEGIN) != INVALID_SET_FILE_POINTER;
+    return SetFilePointer(
+               (HANDLE)pUserData, offset, NULL, (origin == drflac_seek_origin_current) ? FILE_CURRENT : FILE_BEGIN) !=
+           INVALID_SET_FILE_POINTER;
 }
 
-static drflac_file drflac__open_file_handle(const char* filename)
+static drflac_file drflac__open_file_handle(const char *filename)
 {
-    HANDLE hFile = CreateFileA(filename, FILE_GENERIC_READ, FILE_SHARE_READ, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
+    HANDLE hFile =
+        CreateFileA(filename, FILE_GENERIC_READ, FILE_SHARE_READ, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
     if (hFile == INVALID_HANDLE_VALUE) {
         return NULL;
     }
@@ -4754,15 +5027,14 @@ static void drflac__close_file_handle(drflac_file file)
 }
 #endif
 
-
-drflac* drflac_open_file(const char* filename)
+drflac *drflac_open_file(const char *filename)
 {
     drflac_file file = drflac__open_file_handle(filename);
     if (file == NULL) {
         return NULL;
     }
 
-    drflac* pFlac = drflac_open(drflac__on_read_stdio, drflac__on_seek_stdio, (void*)file);
+    drflac *pFlac = drflac_open(drflac__on_read_stdio, drflac__on_seek_stdio, (void *)file);
     if (pFlac == NULL) {
         drflac__close_file_handle(file);
         return NULL;
@@ -4771,14 +5043,15 @@ drflac* drflac_open_file(const char* filename)
     return pFlac;
 }
 
-drflac* drflac_open_file_with_metadata(const char* filename, drflac_meta_proc onMeta, void* pUserData)
+drflac *drflac_open_file_with_metadata(const char *filename, drflac_meta_proc onMeta, void *pUserData)
 {
     drflac_file file = drflac__open_file_handle(filename);
     if (file == NULL) {
         return NULL;
     }
 
-    drflac* pFlac = drflac_open_with_metadata_private(drflac__on_read_stdio, drflac__on_seek_stdio, onMeta, drflac_container_unknown, (void*)file, pUserData);
+    drflac *pFlac = drflac_open_with_metadata_private(
+        drflac__on_read_stdio, drflac__on_seek_stdio, onMeta, drflac_container_unknown, (void *)file, pUserData);
     if (pFlac == NULL) {
         drflac__close_file_handle(file);
         return pFlac;
@@ -4786,11 +5059,11 @@ drflac* drflac_open_file_with_metadata(const char* filename, drflac_meta_proc on
 
     return pFlac;
 }
-#endif  //DR_FLAC_NO_STDIO
+#endif // DR_FLAC_NO_STDIO
 
-static size_t drflac__on_read_memory(void* pUserData, void* bufferOut, size_t bytesToRead)
+static size_t drflac__on_read_memory(void *pUserData, void *bufferOut, size_t bytesToRead)
 {
-    drflac__memory_stream* memoryStream = (drflac__memory_stream*)pUserData;
+    drflac__memory_stream *memoryStream = (drflac__memory_stream *)pUserData;
     drflac_assert(memoryStream != NULL);
     drflac_assert(memoryStream->dataSize >= memoryStream->currentReadPos);
 
@@ -4807,36 +5080,39 @@ static size_t drflac__on_read_memory(void* pUserData, void* bufferOut, size_t by
     return bytesToRead;
 }
 
-static drflac_bool32 drflac__on_seek_memory(void* pUserData, int offset, drflac_seek_origin origin)
+static drflac_bool32 drflac__on_seek_memory(void *pUserData, int offset, drflac_seek_origin origin)
 {
-    drflac__memory_stream* memoryStream = (drflac__memory_stream*)pUserData;
+    drflac__memory_stream *memoryStream = (drflac__memory_stream *)pUserData;
     drflac_assert(memoryStream != NULL);
     drflac_assert(offset > 0 || (offset == 0 && origin == drflac_seek_origin_start));
 
     if (origin == drflac_seek_origin_current) {
         if (memoryStream->currentReadPos + offset <= memoryStream->dataSize) {
             memoryStream->currentReadPos += offset;
-        } else {
-            memoryStream->currentReadPos = memoryStream->dataSize;  // Trying to seek too far forward.
         }
-    } else {
+        else {
+            memoryStream->currentReadPos = memoryStream->dataSize; // Trying to seek too far forward.
+        }
+    }
+    else {
         if ((drflac_uint32)offset <= memoryStream->dataSize) {
             memoryStream->currentReadPos = offset;
-        } else {
-            memoryStream->currentReadPos = memoryStream->dataSize;  // Trying to seek too far forward.
+        }
+        else {
+            memoryStream->currentReadPos = memoryStream->dataSize; // Trying to seek too far forward.
         }
     }
 
     return DRFLAC_TRUE;
 }
 
-drflac* drflac_open_memory(const void* data, size_t dataSize)
+drflac *drflac_open_memory(const void *data, size_t dataSize)
 {
     drflac__memory_stream memoryStream;
-    memoryStream.data = (const unsigned char*)data;
-    memoryStream.dataSize = dataSize;
+    memoryStream.data           = (const unsigned char *)data;
+    memoryStream.dataSize       = dataSize;
     memoryStream.currentReadPos = 0;
-    drflac* pFlac = drflac_open(drflac__on_read_memory, drflac__on_seek_memory, &memoryStream);
+    drflac *pFlac               = drflac_open(drflac__on_read_memory, drflac__on_seek_memory, &memoryStream);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -4845,10 +5121,9 @@ drflac* drflac_open_memory(const void* data, size_t dataSize)
 
     // This is an awful hack...
 #ifndef DR_FLAC_NO_OGG
-    if (pFlac->container == drflac_container_ogg)
-    {
-        drflac_oggbs* oggbs = (drflac_oggbs*)pFlac->_oggbs;
-        oggbs->pUserData = &pFlac->memoryStream;
+    if (pFlac->container == drflac_container_ogg) {
+        drflac_oggbs *oggbs = (drflac_oggbs *)pFlac->_oggbs;
+        oggbs->pUserData    = &pFlac->memoryStream;
     }
     else
 #endif
@@ -4859,13 +5134,14 @@ drflac* drflac_open_memory(const void* data, size_t dataSize)
     return pFlac;
 }
 
-drflac* drflac_open_memory_with_metadata(const void* data, size_t dataSize, drflac_meta_proc onMeta, void* pUserData)
+drflac *drflac_open_memory_with_metadata(const void *data, size_t dataSize, drflac_meta_proc onMeta, void *pUserData)
 {
     drflac__memory_stream memoryStream;
-    memoryStream.data = (const unsigned char*)data;
-    memoryStream.dataSize = dataSize;
+    memoryStream.data           = (const unsigned char *)data;
+    memoryStream.dataSize       = dataSize;
     memoryStream.currentReadPos = 0;
-    drflac* pFlac = drflac_open_with_metadata_private(drflac__on_read_memory, drflac__on_seek_memory, onMeta, drflac_container_unknown, &memoryStream, pUserData);
+    drflac *pFlac               = drflac_open_with_metadata_private(
+        drflac__on_read_memory, drflac__on_seek_memory, onMeta, drflac_container_unknown, &memoryStream, pUserData);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -4874,10 +5150,9 @@ drflac* drflac_open_memory_with_metadata(const void* data, size_t dataSize, drfl
 
     // This is an awful hack...
 #ifndef DR_FLAC_NO_OGG
-    if (pFlac->container == drflac_container_ogg)
-    {
-        drflac_oggbs* oggbs = (drflac_oggbs*)pFlac->_oggbs;
-        oggbs->pUserData = &pFlac->memoryStream;
+    if (pFlac->container == drflac_container_ogg) {
+        drflac_oggbs *oggbs = (drflac_oggbs *)pFlac->_oggbs;
+        oggbs->pUserData    = &pFlac->memoryStream;
     }
     else
 #endif
@@ -4888,35 +5163,43 @@ drflac* drflac_open_memory_with_metadata(const void* data, size_t dataSize, drfl
     return pFlac;
 }
 
-
-
-drflac* drflac_open(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData)
+drflac *drflac_open(drflac_read_proc onRead, drflac_seek_proc onSeek, void *pUserData)
 {
     return drflac_open_with_metadata_private(onRead, onSeek, NULL, drflac_container_unknown, pUserData, pUserData);
 }
-drflac* drflac_open_relaxed(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_container container, void* pUserData)
+drflac *drflac_open_relaxed(drflac_read_proc onRead,
+                            drflac_seek_proc onSeek,
+                            drflac_container container,
+                            void *pUserData)
 {
     return drflac_open_with_metadata_private(onRead, onSeek, NULL, container, pUserData, pUserData);
 }
 
-drflac* drflac_open_with_metadata(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, void* pUserData)
+drflac *drflac_open_with_metadata(drflac_read_proc onRead,
+                                  drflac_seek_proc onSeek,
+                                  drflac_meta_proc onMeta,
+                                  void *pUserData)
 {
     return drflac_open_with_metadata_private(onRead, onSeek, onMeta, drflac_container_unknown, pUserData, pUserData);
 }
-drflac* drflac_open_with_metadata_relaxed(drflac_read_proc onRead, drflac_seek_proc onSeek, drflac_meta_proc onMeta, drflac_container container, void* pUserData)
+drflac *drflac_open_with_metadata_relaxed(drflac_read_proc onRead,
+                                          drflac_seek_proc onSeek,
+                                          drflac_meta_proc onMeta,
+                                          drflac_container container,
+                                          void *pUserData)
 {
     return drflac_open_with_metadata_private(onRead, onSeek, onMeta, container, pUserData, pUserData);
 }
 
-void drflac_close(drflac* pFlac)
+void drflac_close(drflac *pFlac)
 {
     if (pFlac == NULL) {
         return;
     }
 
 #ifndef DR_FLAC_NO_STDIO
-    // If we opened the file with drflac_open_file() we will want to close the file handle. We can know whether or not drflac_open_file()
-    // was used by looking at the callbacks.
+    // If we opened the file with drflac_open_file() we will want to close the file handle. We can know whether or not
+    // drflac_open_file() was used by looking at the callbacks.
     if (pFlac->bs.onRead == drflac__on_read_stdio) {
         drflac__close_file_handle((drflac_file)pFlac->bs.pUserData);
     }
@@ -4925,7 +5208,7 @@ void drflac_close(drflac* pFlac)
     // Need to clean up Ogg streams a bit differently due to the way the bit streaming is chained.
     if (pFlac->container == drflac_container_ogg) {
         drflac_assert(pFlac->bs.onRead == drflac__on_read_ogg);
-        drflac_oggbs* oggbs = (drflac_oggbs*)pFlac->_oggbs;
+        drflac_oggbs *oggbs = (drflac_oggbs *)pFlac->_oggbs;
         if (oggbs->onRead == drflac__on_read_stdio) {
             drflac__close_file_handle((drflac_file)oggbs->pUserData);
         }
@@ -4936,76 +5219,74 @@ void drflac_close(drflac* pFlac)
     DRFLAC_FREE(pFlac);
 }
 
-drflac_uint64 drflac__read_s32__misaligned(drflac* pFlac, drflac_uint64 samplesToRead, drflac_int32* bufferOut)
+drflac_uint64 drflac__read_s32__misaligned(drflac *pFlac, drflac_uint64 samplesToRead, drflac_int32 *bufferOut)
 {
-    unsigned int channelCount = drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
+    unsigned int channelCount =
+        drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
 
     // We should never be calling this when the number of samples to read is >= the sample count.
     drflac_assert(samplesToRead < channelCount);
     drflac_assert(pFlac->currentFrame.samplesRemaining > 0 && samplesToRead <= pFlac->currentFrame.samplesRemaining);
 
-
     drflac_uint64 samplesRead = 0;
     while (samplesToRead > 0) {
-        drflac_uint64 totalSamplesInFrame = pFlac->currentFrame.header.blockSize * channelCount;
+        drflac_uint64 totalSamplesInFrame       = pFlac->currentFrame.header.blockSize * channelCount;
         drflac_uint64 samplesReadFromFrameSoFar = totalSamplesInFrame - pFlac->currentFrame.samplesRemaining;
-        drflac_uint64 channelIndex = samplesReadFromFrameSoFar % channelCount;
+        drflac_uint64 channelIndex              = samplesReadFromFrameSoFar % channelCount;
 
         drflac_uint64 nextSampleInFrame = samplesReadFromFrameSoFar / channelCount;
 
         int decodedSample = 0;
-        switch (pFlac->currentFrame.header.channelAssignment)
-        {
-            case DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE:
-            {
-                if (channelIndex == 0) {
-                    decodedSample = pFlac->currentFrame.subframes[channelIndex].pDecodedSamples[nextSampleInFrame];
-                } else {
-                    int side = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
-                    int left = pFlac->currentFrame.subframes[channelIndex - 1].pDecodedSamples[nextSampleInFrame];
-                    decodedSample = left - side;
-                }
-            } break;
-
-            case DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE:
-            {
-                if (channelIndex == 0) {
-                    int side  = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
-                    int right = pFlac->currentFrame.subframes[channelIndex + 1].pDecodedSamples[nextSampleInFrame];
-                    decodedSample = side + right;
-                } else {
-                    decodedSample = pFlac->currentFrame.subframes[channelIndex].pDecodedSamples[nextSampleInFrame];
-                }
-            } break;
-
-            case DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE:
-            {
-                int mid;
-                int side;
-                if (channelIndex == 0) {
-                    mid  = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
-                    side = pFlac->currentFrame.subframes[channelIndex + 1].pDecodedSamples[nextSampleInFrame];
-
-                    mid = (((unsigned int)mid) << 1) | (side & 0x01);
-                    decodedSample = (mid + side) >> 1;
-                } else {
-                    mid  = pFlac->currentFrame.subframes[channelIndex - 1].pDecodedSamples[nextSampleInFrame];
-                    side = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
-
-                    mid = (((unsigned int)mid) << 1) | (side & 0x01);
-                    decodedSample = (mid - side) >> 1;
-                }
-            } break;
-
-            case DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT:
-            default:
-            {
+        switch (pFlac->currentFrame.header.channelAssignment) {
+        case DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE: {
+            if (channelIndex == 0) {
                 decodedSample = pFlac->currentFrame.subframes[channelIndex].pDecodedSamples[nextSampleInFrame];
-            } break;
+            }
+            else {
+                int side      = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
+                int left      = pFlac->currentFrame.subframes[channelIndex - 1].pDecodedSamples[nextSampleInFrame];
+                decodedSample = left - side;
+            }
+        } break;
+
+        case DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE: {
+            if (channelIndex == 0) {
+                int side      = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
+                int right     = pFlac->currentFrame.subframes[channelIndex + 1].pDecodedSamples[nextSampleInFrame];
+                decodedSample = side + right;
+            }
+            else {
+                decodedSample = pFlac->currentFrame.subframes[channelIndex].pDecodedSamples[nextSampleInFrame];
+            }
+        } break;
+
+        case DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE: {
+            int mid;
+            int side;
+            if (channelIndex == 0) {
+                mid  = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
+                side = pFlac->currentFrame.subframes[channelIndex + 1].pDecodedSamples[nextSampleInFrame];
+
+                mid           = (((unsigned int)mid) << 1) | (side & 0x01);
+                decodedSample = (mid + side) >> 1;
+            }
+            else {
+                mid  = pFlac->currentFrame.subframes[channelIndex - 1].pDecodedSamples[nextSampleInFrame];
+                side = pFlac->currentFrame.subframes[channelIndex + 0].pDecodedSamples[nextSampleInFrame];
+
+                mid           = (((unsigned int)mid) << 1) | (side & 0x01);
+                decodedSample = (mid - side) >> 1;
+            }
+        } break;
+
+        case DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT:
+        default: {
+            decodedSample = pFlac->currentFrame.subframes[channelIndex].pDecodedSamples[nextSampleInFrame];
+        } break;
         }
 
-
-        decodedSample <<= ((32 - pFlac->bitsPerSample) + pFlac->currentFrame.subframes[channelIndex].wastedBitsPerSample);
+        decodedSample <<=
+            ((32 - pFlac->bitsPerSample) + pFlac->currentFrame.subframes[channelIndex].wastedBitsPerSample);
 
         if (bufferOut) {
             *bufferOut++ = decodedSample;
@@ -5019,15 +5300,16 @@ drflac_uint64 drflac__read_s32__misaligned(drflac* pFlac, drflac_uint64 samplesT
     return samplesRead;
 }
 
-drflac_uint64 drflac__seek_forward_by_samples(drflac* pFlac, drflac_uint64 samplesToRead)
+drflac_uint64 drflac__seek_forward_by_samples(drflac *pFlac, drflac_uint64 samplesToRead)
 {
     drflac_uint64 samplesRead = 0;
     while (samplesToRead > 0) {
         if (pFlac->currentFrame.samplesRemaining == 0) {
             if (!drflac__read_and_decode_next_frame(pFlac)) {
-                break;  // Couldn't read the next frame, so just break from the loop and return.
+                break; // Couldn't read the next frame, so just break from the loop and return.
             }
-        } else {
+        }
+        else {
             samplesRead += 1;
             pFlac->currentFrame.samplesRemaining -= 1;
             samplesToRead -= 1;
@@ -5037,7 +5319,7 @@ drflac_uint64 drflac__seek_forward_by_samples(drflac* pFlac, drflac_uint64 sampl
     return samplesRead;
 }
 
-drflac_uint64 drflac_read_s32(drflac* pFlac, drflac_uint64 samplesToRead, drflac_int32* bufferOut)
+drflac_uint64 drflac_read_s32(drflac *pFlac, drflac_uint64 samplesToRead, drflac_int32 *bufferOut)
 {
     // Note that <bufferOut> is allowed to be null, in which case this will be treated as something like a seek.
     if (pFlac == NULL || samplesToRead == 0) {
@@ -5048,132 +5330,149 @@ drflac_uint64 drflac_read_s32(drflac* pFlac, drflac_uint64 samplesToRead, drflac
         return drflac__seek_forward_by_samples(pFlac, samplesToRead);
     }
 
-
     drflac_uint64 samplesRead = 0;
     while (samplesToRead > 0) {
         // If we've run out of samples in this frame, go to the next.
         if (pFlac->currentFrame.samplesRemaining == 0) {
             if (!drflac__read_and_decode_next_frame(pFlac)) {
-                break;  // Couldn't read the next frame, so just break from the loop and return.
+                break; // Couldn't read the next frame, so just break from the loop and return.
             }
-        } else {
+        }
+        else {
             // Here is where we grab the samples and interleave them.
 
-            unsigned int channelCount = drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
-            drflac_uint64 totalSamplesInFrame = pFlac->currentFrame.header.blockSize * channelCount;
+            unsigned int channelCount =
+                drflac__get_channel_count_from_channel_assignment(pFlac->currentFrame.header.channelAssignment);
+            drflac_uint64 totalSamplesInFrame       = pFlac->currentFrame.header.blockSize * channelCount;
             drflac_uint64 samplesReadFromFrameSoFar = totalSamplesInFrame - pFlac->currentFrame.samplesRemaining;
 
             drflac_uint64 misalignedSampleCount = samplesReadFromFrameSoFar % channelCount;
             if (misalignedSampleCount > 0) {
-                drflac_uint64 misalignedSamplesRead = drflac__read_s32__misaligned(pFlac, misalignedSampleCount, bufferOut);
-                samplesRead   += misalignedSamplesRead;
+                drflac_uint64 misalignedSamplesRead =
+                    drflac__read_s32__misaligned(pFlac, misalignedSampleCount, bufferOut);
+                samplesRead += misalignedSamplesRead;
                 samplesReadFromFrameSoFar += misalignedSamplesRead;
-                bufferOut     += misalignedSamplesRead;
+                bufferOut += misalignedSamplesRead;
                 samplesToRead -= misalignedSamplesRead;
             }
 
-
             drflac_uint64 alignedSampleCountPerChannel = samplesToRead / channelCount;
             if (alignedSampleCountPerChannel > pFlac->currentFrame.samplesRemaining / channelCount) {
                 alignedSampleCountPerChannel = pFlac->currentFrame.samplesRemaining / channelCount;
             }
 
             drflac_uint64 firstAlignedSampleInFrame = samplesReadFromFrameSoFar / channelCount;
-            unsigned int unusedBitsPerSample = 32 - pFlac->bitsPerSample;
+            unsigned int unusedBitsPerSample        = 32 - pFlac->bitsPerSample;
 
-            switch (pFlac->currentFrame.header.channelAssignment)
-            {
-                case DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE:
+            switch (pFlac->currentFrame.header.channelAssignment) {
+            case DRFLAC_CHANNEL_ASSIGNMENT_LEFT_SIDE: {
+                const drflac_int32 *pDecodedSamples0 =
+                    pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
+                const drflac_int32 *pDecodedSamples1 =
+                    pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
+
+                for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
+                    int left  = pDecodedSamples0[i];
+                    int side  = pDecodedSamples1[i];
+                    int right = left - side;
+
+                    bufferOut[i * 2 + 0] =
+                        left << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
+                    bufferOut[i * 2 + 1] =
+                        right << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
+                }
+            } break;
+
+            case DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE: {
+                const drflac_int32 *pDecodedSamples0 =
+                    pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
+                const drflac_int32 *pDecodedSamples1 =
+                    pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
+
+                for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
+                    int side  = pDecodedSamples0[i];
+                    int right = pDecodedSamples1[i];
+                    int left  = right + side;
+
+                    bufferOut[i * 2 + 0] =
+                        left << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
+                    bufferOut[i * 2 + 1] =
+                        right << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
+                }
+            } break;
+
+            case DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE: {
+                const drflac_int32 *pDecodedSamples0 =
+                    pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
+                const drflac_int32 *pDecodedSamples1 =
+                    pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
+
+                for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
+                    int side = pDecodedSamples1[i];
+                    int mid  = (((drflac_uint32)pDecodedSamples0[i]) << 1) | (side & 0x01);
+
+                    bufferOut[i * 2 + 0] =
+                        ((mid + side) >> 1)
+                        << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
+                    bufferOut[i * 2 + 1] =
+                        ((mid - side) >> 1)
+                        << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
+                }
+            } break;
+
+            case DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT:
+            default: {
+                if (pFlac->currentFrame.header.channelAssignment == 1) // 1 = Stereo
                 {
-                    const drflac_int32* pDecodedSamples0 = pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
-                    const drflac_int32* pDecodedSamples1 = pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
+                    // Stereo optimized inner loop unroll.
+                    const drflac_int32 *pDecodedSamples0 =
+                        pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
+                    const drflac_int32 *pDecodedSamples1 =
+                        pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
 
                     for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
-                        int left  = pDecodedSamples0[i];
-                        int side  = pDecodedSamples1[i];
-                        int right = left - side;
-
-                        bufferOut[i*2+0] = left  << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
-                        bufferOut[i*2+1] = right << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
+                        bufferOut[i * 2 + 0] =
+                            pDecodedSamples0[i]
+                            << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
+                        bufferOut[i * 2 + 1] =
+                            pDecodedSamples1[i]
+                            << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
                     }
-                } break;
-
-                case DRFLAC_CHANNEL_ASSIGNMENT_RIGHT_SIDE:
-                {
-                    const drflac_int32* pDecodedSamples0 = pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
-                    const drflac_int32* pDecodedSamples1 = pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
-
+                }
+                else {
+                    // Generic interleaving.
                     for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
-                        int side  = pDecodedSamples0[i];
-                        int right = pDecodedSamples1[i];
-                        int left  = right + side;
-
-                        bufferOut[i*2+0] = left  << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
-                        bufferOut[i*2+1] = right << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
-                    }
-                } break;
-
-                case DRFLAC_CHANNEL_ASSIGNMENT_MID_SIDE:
-                {
-                    const drflac_int32* pDecodedSamples0 = pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
-                    const drflac_int32* pDecodedSamples1 = pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
-
-                    for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
-                        int side = pDecodedSamples1[i];
-                        int mid  = (((drflac_uint32)pDecodedSamples0[i]) << 1) | (side & 0x01);
-
-                        bufferOut[i*2+0] = ((mid + side) >> 1) << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
-                        bufferOut[i*2+1] = ((mid - side) >> 1) << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
-                    }
-                } break;
-
-                case DRFLAC_CHANNEL_ASSIGNMENT_INDEPENDENT:
-                default:
-                {
-                    if (pFlac->currentFrame.header.channelAssignment == 1) // 1 = Stereo
-                    {
-                        // Stereo optimized inner loop unroll.
-                        const drflac_int32* pDecodedSamples0 = pFlac->currentFrame.subframes[0].pDecodedSamples + firstAlignedSampleInFrame;
-                        const drflac_int32* pDecodedSamples1 = pFlac->currentFrame.subframes[1].pDecodedSamples + firstAlignedSampleInFrame;
-
-                        for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
-                            bufferOut[i*2+0] = pDecodedSamples0[i] << (unusedBitsPerSample + pFlac->currentFrame.subframes[0].wastedBitsPerSample);
-                            bufferOut[i*2+1] = pDecodedSamples1[i] << (unusedBitsPerSample + pFlac->currentFrame.subframes[1].wastedBitsPerSample);
+                        for (unsigned int j = 0; j < channelCount; ++j) {
+                            bufferOut[(i * channelCount) + j] =
+                                (pFlac->currentFrame.subframes[j].pDecodedSamples[firstAlignedSampleInFrame + i])
+                                << (unusedBitsPerSample + pFlac->currentFrame.subframes[j].wastedBitsPerSample);
                         }
                     }
-                    else
-                    {
-                        // Generic interleaving.
-                        for (drflac_uint64 i = 0; i < alignedSampleCountPerChannel; ++i) {
-                            for (unsigned int j = 0; j < channelCount; ++j) {
-                                bufferOut[(i*channelCount)+j] = (pFlac->currentFrame.subframes[j].pDecodedSamples[firstAlignedSampleInFrame + i]) << (unusedBitsPerSample + pFlac->currentFrame.subframes[j].wastedBitsPerSample);
-                            }
-                        }
-                    }
-                } break;
+                }
+            } break;
             }
 
             drflac_uint64 alignedSamplesRead = alignedSampleCountPerChannel * channelCount;
-            samplesRead   += alignedSamplesRead;
+            samplesRead += alignedSamplesRead;
             samplesReadFromFrameSoFar += alignedSamplesRead;
-            bufferOut     += alignedSamplesRead;
+            bufferOut += alignedSamplesRead;
             samplesToRead -= alignedSamplesRead;
             pFlac->currentFrame.samplesRemaining -= (unsigned int)alignedSamplesRead;
 
-
-
             // At this point we may still have some excess samples left to read.
             if (samplesToRead > 0 && pFlac->currentFrame.samplesRemaining > 0) {
                 drflac_uint64 excessSamplesRead = 0;
                 if (samplesToRead < pFlac->currentFrame.samplesRemaining) {
                     excessSamplesRead = drflac__read_s32__misaligned(pFlac, samplesToRead, bufferOut);
-                } else {
-                    excessSamplesRead = drflac__read_s32__misaligned(pFlac, pFlac->currentFrame.samplesRemaining, bufferOut);
+                }
+                else {
+                    excessSamplesRead =
+                        drflac__read_s32__misaligned(pFlac, pFlac->currentFrame.samplesRemaining, bufferOut);
                 }
 
-                samplesRead   += excessSamplesRead;
+                samplesRead += excessSamplesRead;
                 samplesReadFromFrameSoFar += excessSamplesRead;
-                bufferOut     += excessSamplesRead;
+                bufferOut += excessSamplesRead;
                 samplesToRead -= excessSamplesRead;
             }
         }
@@ -5182,16 +5481,17 @@ drflac_uint64 drflac_read_s32(drflac* pFlac, drflac_uint64 samplesToRead, drflac
     return samplesRead;
 }
 
-drflac_uint64 drflac_read_s16(drflac* pFlac, drflac_uint64 samplesToRead, drflac_int16* pBufferOut)
+drflac_uint64 drflac_read_s16(drflac *pFlac, drflac_uint64 samplesToRead, drflac_int16 *pBufferOut)
 {
     // This reads samples in 2 passes and can probably be optimized.
     drflac_uint64 totalSamplesRead = 0;
 
     while (samplesToRead > 0) {
-        //drflac_int32 samples32[4096]; M.P: replaced with dyn allocated one in order to save on stack
-        drflac_uint64 samplesJustRead = drflac_read_s32(pFlac, (samplesToRead > 4096) ? 4096 : samplesToRead, pFlac->scratchBuffer);
+        // drflac_int32 samples32[4096]; M.P: replaced with dyn allocated one in order to save on stack
+        drflac_uint64 samplesJustRead =
+            drflac_read_s32(pFlac, (samplesToRead > 4096) ? 4096 : samplesToRead, pFlac->scratchBuffer);
         if (samplesJustRead == 0) {
-            break;  // Reached the end.
+            break; // Reached the end.
         }
 
         // s32 -> s16
@@ -5207,16 +5507,17 @@ drflac_uint64 drflac_read_s16(drflac* pFlac, drflac_uint64 samplesToRead, drflac
     return totalSamplesRead;
 }
 
-drflac_uint64 drflac_read_f32(drflac* pFlac, drflac_uint64 samplesToRead, float* pBufferOut)
+drflac_uint64 drflac_read_f32(drflac *pFlac, drflac_uint64 samplesToRead, float *pBufferOut)
 {
     // This reads samples in 2 passes and can probably be optimized.
     drflac_uint64 totalSamplesRead = 0;
 
     while (samplesToRead > 0) {
         drflac_int32 samples32[4096];
-        drflac_uint64 samplesJustRead = drflac_read_s32(pFlac, (samplesToRead > 4096) ? 4096 : samplesToRead, samples32);
+        drflac_uint64 samplesJustRead =
+            drflac_read_s32(pFlac, (samplesToRead > 4096) ? 4096 : samplesToRead, samples32);
         if (samplesJustRead == 0) {
-            break;  // Reached the end.
+            break; // Reached the end.
         }
 
         // s32 -> f32
@@ -5232,14 +5533,14 @@ drflac_uint64 drflac_read_f32(drflac* pFlac, drflac_uint64 samplesToRead, float*
     return totalSamplesRead;
 }
 
-drflac_bool32 drflac_seek_to_sample(drflac* pFlac, drflac_uint64 sampleIndex)
+drflac_bool32 drflac_seek_to_sample(drflac *pFlac, drflac_uint64 sampleIndex)
 {
     if (pFlac == NULL) {
         return DRFLAC_FALSE;
     }
 
-    // If we don't know where the first frame begins then we can't seek. This will happen when the STREAMINFO block was not present
-    // when the decoder was opened.
+    // If we don't know where the first frame begins then we can't seek. This will happen when the STREAMINFO block was
+    // not present when the decoder was opened.
     if (pFlac->firstFramePos == 0) {
         return DRFLAC_FALSE;
     }
@@ -5250,15 +5551,13 @@ drflac_bool32 drflac_seek_to_sample(drflac* pFlac, drflac_uint64 sampleIndex)
 
     // Clamp the sample to the end.
     if (sampleIndex >= pFlac->totalSampleCount) {
-        sampleIndex  = pFlac->totalSampleCount - 1;
+        sampleIndex = pFlac->totalSampleCount - 1;
     }
 
-
-    // Different techniques depending on encapsulation. Using the native FLAC seektable with Ogg encapsulation is a bit awkward so
-    // we'll instead use Ogg's natural seeking facility.
+    // Different techniques depending on encapsulation. Using the native FLAC seektable with Ogg encapsulation is a bit
+    // awkward so we'll instead use Ogg's natural seeking facility.
 #ifndef DR_FLAC_NO_OGG
-    if (pFlac->container == drflac_container_ogg)
-    {
+    if (pFlac->container == drflac_container_ogg) {
         return drflac_ogg__seek_to_sample(pFlac, sampleIndex);
     }
     else
@@ -5270,99 +5569,111 @@ drflac_bool32 drflac_seek_to_sample(drflac* pFlac, drflac_uint64 sampleIndex)
         }
     }
 
-
     return DRFLAC_TRUE;
 }
 
-
-
 //// High Level APIs ////
 
 // I couldn't figure out where SIZE_MAX was defined for VC6. If anybody knows, let me know.
 #if defined(_MSC_VER) && _MSC_VER <= 1200
 #ifdef DRFLAC_64BIT
-#define SIZE_MAX    ((drflac_uint64)0xFFFFFFFFFFFFFFFF)
+#define SIZE_MAX ((drflac_uint64)0xFFFFFFFFFFFFFFFF)
 #else
-#define SIZE_MAX    0xFFFFFFFF
+#define SIZE_MAX 0xFFFFFFFF
 #endif
 #endif
 
 // Using a macro as the definition of the drflac__full_decode_and_close_*() API family. Sue me.
-#define DRFLAC_DEFINE_FULL_DECODE_AND_CLOSE(extension, type) \
-static type* drflac__full_decode_and_close_ ## extension (drflac* pFlac, unsigned int* channelsOut, unsigned int* sampleRateOut, drflac_uint64* totalSampleCountOut)\
-{                                                                                                                                                                   \
-    drflac_assert(pFlac != NULL);                                                                                                                                   \
-                                                                                                                                                                    \
-    type* pSampleData = NULL;                                                                                                                                       \
-    drflac_uint64 totalSampleCount = pFlac->totalSampleCount;                                                                                                       \
-                                                                                                                                                                    \
-    if (totalSampleCount == 0) {                                                                                                                                    \
-        type buffer[4096];                                                                                                                                          \
-                                                                                                                                                                    \
-        size_t sampleDataBufferSize = sizeof(buffer);                                                                                                               \
-        pSampleData = (type*)DRFLAC_MALLOC(sampleDataBufferSize);                                                                                                   \
-        if (pSampleData == NULL) {                                                                                                                                  \
-            goto on_error;                                                                                                                                          \
-        }                                                                                                                                                           \
-                                                                                                                                                                    \
-        drflac_uint64 samplesRead;                                                                                                                                  \
-        while ((samplesRead = (drflac_uint64)drflac_read_##extension(pFlac, sizeof(buffer)/sizeof(buffer[0]), buffer)) > 0) {                                       \
-            if (((totalSampleCount + samplesRead) * sizeof(type)) > sampleDataBufferSize) {                                                                         \
-                sampleDataBufferSize *= 2;                                                                                                                          \
-                type* pNewSampleData = (type*)DRFLAC_REALLOC(pSampleData, sampleDataBufferSize);                                                                    \
-                if (pNewSampleData == NULL) {                                                                                                                       \
-                    DRFLAC_FREE(pSampleData);                                                                                                                       \
-                    goto on_error;                                                                                                                                  \
-                }                                                                                                                                                   \
-                                                                                                                                                                    \
-                pSampleData = pNewSampleData;                                                                                                                       \
-            }                                                                                                                                                       \
-                                                                                                                                                                    \
-            drflac_copy_memory(pSampleData + totalSampleCount, buffer, (size_t)(samplesRead*sizeof(type)));                                                         \
-            totalSampleCount += samplesRead;                                                                                                                        \
-        }                                                                                                                                                           \
-                                                                                                                                                                    \
-        /* At this point everything should be decoded, but we just want to fill the unused part buffer with silence - need to                                       \
-           protect those ears from random noise! */                                                                                                                 \
-        drflac_zero_memory(pSampleData + totalSampleCount, (size_t)(sampleDataBufferSize - totalSampleCount*sizeof(type)));                                         \
-    } else {                                                                                                                                                        \
-        drflac_uint64 dataSize = totalSampleCount * sizeof(type);                                                                                                   \
-        if (dataSize > SIZE_MAX) {                                                                                                                                  \
-            goto on_error;  /* The decoded data is too big. */                                                                                                      \
-        }                                                                                                                                                           \
-                                                                                                                                                                    \
-        pSampleData = (type*)DRFLAC_MALLOC((size_t)dataSize);    /* <-- Safe cast as per the check above. */                                                        \
-        if (pSampleData == NULL) {                                                                                                                                  \
-            goto on_error;                                                                                                                                          \
-        }                                                                                                                                                           \
-                                                                                                                                                                    \
-        totalSampleCount = drflac_read_##extension(pFlac, pFlac->totalSampleCount, pSampleData);                                                                    \
-    }                                                                                                                                                               \
-                                                                                                                                                                    \
-    if (sampleRateOut) *sampleRateOut = pFlac->sampleRate;                                                                                                          \
-    if (channelsOut) *channelsOut = pFlac->channels;                                                                                                                \
-    if (totalSampleCountOut) *totalSampleCountOut = totalSampleCount;                                                                                               \
-                                                                                                                                                                    \
-    drflac_close(pFlac);                                                                                                                                            \
-    return pSampleData;                                                                                                                                             \
-                                                                                                                                                                    \
-on_error:                                                                                                                                                           \
-    drflac_close(pFlac);                                                                                                                                            \
-    return NULL;                                                                                                                                                    \
-}
+#define DRFLAC_DEFINE_FULL_DECODE_AND_CLOSE(extension, type)                                                           \
+    static type *drflac__full_decode_and_close_##extension(                                                            \
+        drflac *pFlac, unsigned int *channelsOut, unsigned int *sampleRateOut, drflac_uint64 *totalSampleCountOut)     \
+    {                                                                                                                  \
+        drflac_assert(pFlac != NULL);                                                                                  \
+                                                                                                                       \
+        type *pSampleData              = NULL;                                                                         \
+        drflac_uint64 totalSampleCount = pFlac->totalSampleCount;                                                      \
+                                                                                                                       \
+        if (totalSampleCount == 0) {                                                                                   \
+            type buffer[4096];                                                                                         \
+                                                                                                                       \
+            size_t sampleDataBufferSize = sizeof(buffer);                                                              \
+            pSampleData                 = (type *)DRFLAC_MALLOC(sampleDataBufferSize);                                 \
+            if (pSampleData == NULL) {                                                                                 \
+                goto on_error;                                                                                         \
+            }                                                                                                          \
+                                                                                                                       \
+            drflac_uint64 samplesRead;                                                                                 \
+            while ((samplesRead = (drflac_uint64)drflac_read_##extension(                                              \
+                        pFlac, sizeof(buffer) / sizeof(buffer[0]), buffer)) > 0) {                                     \
+                if (((totalSampleCount + samplesRead) * sizeof(type)) > sampleDataBufferSize) {                        \
+                    sampleDataBufferSize *= 2;                                                                         \
+                    type *pNewSampleData = (type *)DRFLAC_REALLOC(pSampleData, sampleDataBufferSize);                  \
+                    if (pNewSampleData == NULL) {                                                                      \
+                        DRFLAC_FREE(pSampleData);                                                                      \
+                        goto on_error;                                                                                 \
+                    }                                                                                                  \
+                                                                                                                       \
+                    pSampleData = pNewSampleData;                                                                      \
+                }                                                                                                      \
+                                                                                                                       \
+                drflac_copy_memory(pSampleData + totalSampleCount, buffer, (size_t)(samplesRead * sizeof(type)));      \
+                totalSampleCount += samplesRead;                                                                       \
+            }                                                                                                          \
+                                                                                                                       \
+            /* At this point everything should be decoded, but we just want to fill the unused part buffer with        \
+               silence - need to protect those ears from random noise! */                                                                              \
+            drflac_zero_memory(pSampleData + totalSampleCount,                                                         \
+                               (size_t)(sampleDataBufferSize - totalSampleCount * sizeof(type)));                      \
+        }                                                                                                              \
+        else {                                                                                                         \
+            drflac_uint64 dataSize = totalSampleCount * sizeof(type);                                                  \
+            if (dataSize > SIZE_MAX) {                                                                                 \
+                goto on_error; /* The decoded data is too big. */                                                      \
+            }                                                                                                          \
+                                                                                                                       \
+            pSampleData = (type *)DRFLAC_MALLOC((size_t)dataSize); /* <-- Safe cast as per the check above. */         \
+            if (pSampleData == NULL) {                                                                                 \
+                goto on_error;                                                                                         \
+            }                                                                                                          \
+                                                                                                                       \
+            totalSampleCount = drflac_read_##extension(pFlac, pFlac->totalSampleCount, pSampleData);                   \
+        }                                                                                                              \
+                                                                                                                       \
+        if (sampleRateOut)                                                                                             \
+            *sampleRateOut = pFlac->sampleRate;                                                                        \
+        if (channelsOut)                                                                                               \
+            *channelsOut = pFlac->channels;                                                                            \
+        if (totalSampleCountOut)                                                                                       \
+            *totalSampleCountOut = totalSampleCount;                                                                   \
+                                                                                                                       \
+        drflac_close(pFlac);                                                                                           \
+        return pSampleData;                                                                                            \
+                                                                                                                       \
+    on_error:                                                                                                          \
+        drflac_close(pFlac);                                                                                           \
+        return NULL;                                                                                                   \
+    }
 
 DRFLAC_DEFINE_FULL_DECODE_AND_CLOSE(s32, drflac_int32)
 DRFLAC_DEFINE_FULL_DECODE_AND_CLOSE(s16, drflac_int16)
 DRFLAC_DEFINE_FULL_DECODE_AND_CLOSE(f32, float)
 
-drflac_int32* drflac_open_and_decode_s32(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int32 *drflac_open_and_decode_s32(drflac_read_proc onRead,
+                                         drflac_seek_proc onSeek,
+                                         void *pUserData,
+                                         unsigned int *channels,
+                                         unsigned int *sampleRate,
+                                         drflac_uint64 *totalSampleCount)
 {
     // Safety.
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open(onRead, onSeek, pUserData);
+    drflac *pFlac = drflac_open(onRead, onSeek, pUserData);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5370,14 +5681,22 @@ drflac_int32* drflac_open_and_decode_s32(drflac_read_proc onRead, drflac_seek_pr
     return drflac__full_decode_and_close_s32(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-drflac_int16* drflac_open_and_decode_s16(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int16 *drflac_open_and_decode_s16(drflac_read_proc onRead,
+                                         drflac_seek_proc onSeek,
+                                         void *pUserData,
+                                         unsigned int *channels,
+                                         unsigned int *sampleRate,
+                                         drflac_uint64 *totalSampleCount)
 {
     // Safety.
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open(onRead, onSeek, pUserData);
+    drflac *pFlac = drflac_open(onRead, onSeek, pUserData);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5385,14 +5704,22 @@ drflac_int16* drflac_open_and_decode_s16(drflac_read_proc onRead, drflac_seek_pr
     return drflac__full_decode_and_close_s16(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-float* drflac_open_and_decode_f32(drflac_read_proc onRead, drflac_seek_proc onSeek, void* pUserData, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+float *drflac_open_and_decode_f32(drflac_read_proc onRead,
+                                  drflac_seek_proc onSeek,
+                                  void *pUserData,
+                                  unsigned int *channels,
+                                  unsigned int *sampleRate,
+                                  drflac_uint64 *totalSampleCount)
 {
     // Safety.
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open(onRead, onSeek, pUserData);
+    drflac *pFlac = drflac_open(onRead, onSeek, pUserData);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5401,13 +5728,19 @@ float* drflac_open_and_decode_f32(drflac_read_proc onRead, drflac_seek_proc onSe
 }
 
 #ifndef DR_FLAC_NO_STDIO
-drflac_int32* drflac_open_and_decode_file_s32(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int32 *drflac_open_and_decode_file_s32(const char *filename,
+                                              unsigned int *channels,
+                                              unsigned int *sampleRate,
+                                              drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_file(filename);
+    drflac *pFlac = drflac_open_file(filename);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5415,13 +5748,19 @@ drflac_int32* drflac_open_and_decode_file_s32(const char* filename, unsigned int
     return drflac__full_decode_and_close_s32(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-drflac_int16* drflac_open_and_decode_file_s16(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int16 *drflac_open_and_decode_file_s16(const char *filename,
+                                              unsigned int *channels,
+                                              unsigned int *sampleRate,
+                                              drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_file(filename);
+    drflac *pFlac = drflac_open_file(filename);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5429,13 +5768,19 @@ drflac_int16* drflac_open_and_decode_file_s16(const char* filename, unsigned int
     return drflac__full_decode_and_close_s16(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-float* drflac_open_and_decode_file_f32(const char* filename, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+float *drflac_open_and_decode_file_f32(const char *filename,
+                                       unsigned int *channels,
+                                       unsigned int *sampleRate,
+                                       drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_file(filename);
+    drflac *pFlac = drflac_open_file(filename);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5444,13 +5789,20 @@ float* drflac_open_and_decode_file_f32(const char* filename, unsigned int* chann
 }
 #endif
 
-drflac_int32* drflac_open_and_decode_memory_s32(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int32 *drflac_open_and_decode_memory_s32(const void *data,
+                                                size_t dataSize,
+                                                unsigned int *channels,
+                                                unsigned int *sampleRate,
+                                                drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_memory(data, dataSize);
+    drflac *pFlac = drflac_open_memory(data, dataSize);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5458,13 +5810,20 @@ drflac_int32* drflac_open_and_decode_memory_s32(const void* data, size_t dataSiz
     return drflac__full_decode_and_close_s32(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-drflac_int16* drflac_open_and_decode_memory_s16(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+drflac_int16 *drflac_open_and_decode_memory_s16(const void *data,
+                                                size_t dataSize,
+                                                unsigned int *channels,
+                                                unsigned int *sampleRate,
+                                                drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_memory(data, dataSize);
+    drflac *pFlac = drflac_open_memory(data, dataSize);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5472,13 +5831,20 @@ drflac_int16* drflac_open_and_decode_memory_s16(const void* data, size_t dataSiz
     return drflac__full_decode_and_close_s16(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-float* drflac_open_and_decode_memory_f32(const void* data, size_t dataSize, unsigned int* channels, unsigned int* sampleRate, drflac_uint64* totalSampleCount)
+float *drflac_open_and_decode_memory_f32(const void *data,
+                                         size_t dataSize,
+                                         unsigned int *channels,
+                                         unsigned int *sampleRate,
+                                         drflac_uint64 *totalSampleCount)
 {
-    if (sampleRate) *sampleRate = 0;
-    if (channels) *channels = 0;
-    if (totalSampleCount) *totalSampleCount = 0;
+    if (sampleRate)
+        *sampleRate = 0;
+    if (channels)
+        *channels = 0;
+    if (totalSampleCount)
+        *totalSampleCount = 0;
 
-    drflac* pFlac = drflac_open_memory(data, dataSize);
+    drflac *pFlac = drflac_open_memory(data, dataSize);
     if (pFlac == NULL) {
         return NULL;
     }
@@ -5486,15 +5852,14 @@ float* drflac_open_and_decode_memory_f32(const void* data, size_t dataSize, unsi
     return drflac__full_decode_and_close_f32(pFlac, channels, sampleRate, totalSampleCount);
 }
 
-void drflac_free(void* pSampleDataReturnedByOpenAndDecode)
+void drflac_free(void *pSampleDataReturnedByOpenAndDecode)
 {
     DRFLAC_FREE(pSampleDataReturnedByOpenAndDecode);
 }
 
-
-
-
-void drflac_init_vorbis_comment_iterator(drflac_vorbis_comment_iterator* pIter, drflac_uint32 commentCount, const char* pComments)
+void drflac_init_vorbis_comment_iterator(drflac_vorbis_comment_iterator *pIter,
+                                         drflac_uint32 commentCount,
+                                         const char *pComments)
 {
     if (pIter == NULL) {
         return;
@@ -5504,27 +5869,28 @@ void drflac_init_vorbis_comment_iterator(drflac_vorbis_comment_iterator* pIter,
     pIter->pRunningData   = pComments;
 }
 
-const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, drflac_uint32* pCommentLengthOut)
+const char *drflac_next_vorbis_comment(drflac_vorbis_comment_iterator *pIter, drflac_uint32 *pCommentLengthOut)
 {
     // Safety.
-    if (pCommentLengthOut) *pCommentLengthOut = 0;
+    if (pCommentLengthOut)
+        *pCommentLengthOut = 0;
 
     if (pIter == NULL || pIter->countRemaining == 0 || pIter->pRunningData == NULL) {
         return NULL;
     }
 
-    drflac_uint32 length = drflac__le2host_32(*(drflac_uint32*)pIter->pRunningData);
+    drflac_uint32 length = drflac__le2host_32(*(drflac_uint32 *)pIter->pRunningData);
     pIter->pRunningData += 4;
 
-    const char* pComment = pIter->pRunningData;
+    const char *pComment = pIter->pRunningData;
     pIter->pRunningData += length;
     pIter->countRemaining -= 1;
 
-    if (pCommentLengthOut) *pCommentLengthOut = length;
+    if (pCommentLengthOut)
+        *pCommentLengthOut = length;
     return pComment;
 }
-#endif  //DR_FLAC_IMPLEMENTATION
-
+#endif // DR_FLAC_IMPLEMENTATION
 
 // REVISION HISTORY
 //
@@ -5556,11 +5922,14 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 //   - Bug fixes.
 //
 // v0.7 - 2017-07-23
-//   - Add support for opening a stream without a header block. To do this, use drflac_open_relaxed() / drflac_open_with_metadata_relaxed().
+//   - Add support for opening a stream without a header block. To do this, use drflac_open_relaxed() /
+//   drflac_open_with_metadata_relaxed().
 //
 // v0.6 - 2017-07-22
-//   - Add support for recovering from invalid frames. With this change, dr_flac will simply skip over invalid frames as if they
-//     never existed. Frames are checked against their sync code, the CRC-8 of the frame header and the CRC-16 of the whole frame.
+//   - Add support for recovering from invalid frames. With this change, dr_flac will simply skip over invalid frames as
+//   if they
+//     never existed. Frames are checked against their sync code, the CRC-8 of the frame header and the CRC-16 of the
+//     whole frame.
 //
 // v0.5 - 2017-07-16
 //   - Fix typos.
@@ -5590,7 +5959,8 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 // v0.4 - 2016-09-29
 //   - API/ABI CHANGE: Use fixed size 32-bit booleans instead of the built-in bool type.
 //   - API CHANGE: Rename drflac_open_and_decode*() to drflac_open_and_decode*_s32().
-//   - API CHANGE: Swap the order of "channels" and "sampleRate" parameters in drflac_open_and_decode*(). Rationale for this is to
+//   - API CHANGE: Swap the order of "channels" and "sampleRate" parameters in drflac_open_and_decode*(). Rationale for
+//   this is to
 //     keep it consistent with drflac_audio.
 //
 // v0.3f - 2016-09-21
@@ -5643,7 +6013,6 @@ const char* drflac_next_vorbis_comment(drflac_vorbis_comment_iterator* pIter, dr
 // v0.1 - 2016-05-03
 //   - Initial versioned release.
 
-
 /*
 This is free and unencumbered software released into the public domain.
 
diff --git a/module-audio/Audio/decoder/minimp3.h b/module-audio/Audio/decoder/minimp3.h
index cec36ad9a..88e50335a 100644
--- a/module-audio/Audio/decoder/minimp3.h
+++ b/module-audio/Audio/decoder/minimp3.h
@@ -2,12 +2,12 @@
 #define MINIMP3_H
 /*
     https://github.com/lieff/minimp3
-    To the extent possible under law, the author(s) have dedicated all copyright and related and neighboring rights to this software to the public domain worldwide.
-    This software is distributed without any warranty.
-    See <http://creativecommons.org/publicdomain/zero/1.0/>.
+    To the extent possible under law, the author(s) have dedicated all copyright and related and neighboring rights to
+   this software to the public domain worldwide. This software is distributed without any warranty. See
+   <http://creativecommons.org/publicdomain/zero/1.0/>.
 */
 
-#define MINIMP3_MAX_SAMPLES_PER_FRAME (1152*2)
+#define MINIMP3_MAX_SAMPLES_PER_FRAME (1152 * 2)
 
 typedef struct
 {
@@ -20,8 +20,8 @@ typedef struct
 
 typedef struct
 {
-    float mdct_overlap[2][9*32];
-    float qmf_state[15*2*32];
+    float mdct_overlap[2][9 * 32];
+    float qmf_state[15 * 2 * 32];
     int reserv;
     int free_format_bytes;
     unsigned char header[4];
@@ -29,12 +29,14 @@ typedef struct
 } mp3dec_t;
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
-void mp3dec_init(mp3dec_t *dec);
-void mp3dec_deinit(mp3dec_t *dec);
-int mp3dec_decode_frame(mp3dec_t *dec, const unsigned char *mp3, int mp3_bytes, short *pcm, mp3dec_frame_info_t *info);
+    void mp3dec_init(mp3dec_t *dec);
+    void mp3dec_deinit(mp3dec_t *dec);
+    int mp3dec_decode_frame(
+        mp3dec_t *dec, const unsigned char *mp3, int mp3_bytes, short *pcm, mp3dec_frame_info_t *info);
 
 #ifdef __cplusplus
 }
@@ -47,41 +49,41 @@ int mp3dec_decode_frame(mp3dec_t *dec, const unsigned char *mp3, int mp3_bytes,
 #include <string.h>
 #include <stdint.h>
 
-#define MAX_FREE_FORMAT_FRAME_SIZE  2304    /* more than ISO spec's */
-#define MAX_FRAME_SYNC_MATCHES      10
+#define MAX_FREE_FORMAT_FRAME_SIZE 2304 /* more than ISO spec's */
+#define MAX_FRAME_SYNC_MATCHES     10
 
-#define MAX_L3_FRAME_PAYLOAD_BYTES  MAX_FREE_FORMAT_FRAME_SIZE /* MUST be >= 320000/8/32000*1152 = 1440 */
+#define MAX_L3_FRAME_PAYLOAD_BYTES MAX_FREE_FORMAT_FRAME_SIZE /* MUST be >= 320000/8/32000*1152 = 1440 */
 
-#define MAX_BITRESERVOIR_BYTES      511
-#define SHORT_BLOCK_TYPE            2
-#define STOP_BLOCK_TYPE             3
-#define MODE_MONO                   3
-#define MODE_JOINT_STEREO           1
-#define HDR_SIZE                    4
-#define HDR_IS_MONO(h)              (((h[3]) & 0xC0) == 0xC0)
-#define HDR_IS_MS_STEREO(h)         (((h[3]) & 0xE0) == 0x60)
-#define HDR_IS_FREE_FORMAT(h)       (((h[2]) & 0xF0) == 0)
-#define HDR_IS_CRC(h)               (!((h[1]) & 1))
-#define HDR_TEST_PADDING(h)         ((h[2]) & 0x2)
-#define HDR_TEST_MPEG1(h)           ((h[1]) & 0x8)
-#define HDR_TEST_NOT_MPEG25(h)      ((h[1]) & 0x10)
-#define HDR_TEST_I_STEREO(h)        ((h[3]) & 0x10)
-#define HDR_TEST_MS_STEREO(h)       ((h[3]) & 0x20)
-#define HDR_GET_STEREO_MODE(h)      (((h[3]) >> 6) & 3)
-#define HDR_GET_STEREO_MODE_EXT(h)  (((h[3]) >> 4) & 3)
-#define HDR_GET_LAYER(h)            (((h[1]) >> 1) & 3)
-#define HDR_GET_BITRATE(h)          ((h[2]) >> 4)
-#define HDR_GET_SAMPLE_RATE(h)      (((h[2]) >> 2) & 3)
-#define HDR_GET_MY_SAMPLE_RATE(h)   (HDR_GET_SAMPLE_RATE(h) + (((h[1] >> 3) & 1) +  ((h[1] >> 4) & 1)) * 3)
-#define HDR_IS_FRAME_576(h)         ((h[1] & 14) == 2)
-#define HDR_IS_LAYER_1(h)           ((h[1] & 6) == 6)
+#define MAX_BITRESERVOIR_BYTES     511
+#define SHORT_BLOCK_TYPE           2
+#define STOP_BLOCK_TYPE            3
+#define MODE_MONO                  3
+#define MODE_JOINT_STEREO          1
+#define HDR_SIZE                   4
+#define HDR_IS_MONO(h)             (((h[3]) & 0xC0) == 0xC0)
+#define HDR_IS_MS_STEREO(h)        (((h[3]) & 0xE0) == 0x60)
+#define HDR_IS_FREE_FORMAT(h)      (((h[2]) & 0xF0) == 0)
+#define HDR_IS_CRC(h)              (!((h[1]) & 1))
+#define HDR_TEST_PADDING(h)        ((h[2]) & 0x2)
+#define HDR_TEST_MPEG1(h)          ((h[1]) & 0x8)
+#define HDR_TEST_NOT_MPEG25(h)     ((h[1]) & 0x10)
+#define HDR_TEST_I_STEREO(h)       ((h[3]) & 0x10)
+#define HDR_TEST_MS_STEREO(h)      ((h[3]) & 0x20)
+#define HDR_GET_STEREO_MODE(h)     (((h[3]) >> 6) & 3)
+#define HDR_GET_STEREO_MODE_EXT(h) (((h[3]) >> 4) & 3)
+#define HDR_GET_LAYER(h)           (((h[1]) >> 1) & 3)
+#define HDR_GET_BITRATE(h)         ((h[2]) >> 4)
+#define HDR_GET_SAMPLE_RATE(h)     (((h[2]) >> 2) & 3)
+#define HDR_GET_MY_SAMPLE_RATE(h)  (HDR_GET_SAMPLE_RATE(h) + (((h[1] >> 3) & 1) + ((h[1] >> 4) & 1)) * 3)
+#define HDR_IS_FRAME_576(h)        ((h[1] & 14) == 2)
+#define HDR_IS_LAYER_1(h)          ((h[1] & 6) == 6)
 
-#define BITS_DEQUANTIZER_OUT        -1
-#define MAX_SCF                     (255 + BITS_DEQUANTIZER_OUT * 4 - 210)
-#define MAX_SCFI                    ((MAX_SCF + 3) & ~3)
+#define BITS_DEQUANTIZER_OUT -1
+#define MAX_SCF              (255 + BITS_DEQUANTIZER_OUT * 4 - 210)
+#define MAX_SCFI             ((MAX_SCF + 3) & ~3)
 
-#define MINIMP3_MIN(a, b)           ((a) > (b) ? (b) : (a))
-#define MINIMP3_MAX(a, b)           ((a) < (b) ? (b) : (a))
+#define MINIMP3_MIN(a, b) ((a) > (b) ? (b) : (a))
+#define MINIMP3_MAX(a, b) ((a) < (b) ? (b) : (a))
 
 #if !defined(MINIMP3_NO_SIMD)
 
@@ -95,18 +97,18 @@ int mp3dec_decode_frame(mp3dec_t *dec, const unsigned char *mp3, int mp3_bytes,
 #include <intrin.h>
 #endif
 #include <immintrin.h>
-#define HAVE_SSE 1
-#define HAVE_SIMD 1
-#define VSTORE _mm_storeu_ps
-#define VLD _mm_loadu_ps
-#define VSET _mm_set1_ps
-#define VADD _mm_add_ps
-#define VSUB _mm_sub_ps
-#define VMUL _mm_mul_ps
+#define HAVE_SSE      1
+#define HAVE_SIMD     1
+#define VSTORE        _mm_storeu_ps
+#define VLD           _mm_loadu_ps
+#define VSET          _mm_set1_ps
+#define VADD          _mm_add_ps
+#define VSUB          _mm_sub_ps
+#define VMUL          _mm_mul_ps
 #define VMAC(a, x, y) _mm_add_ps(a, _mm_mul_ps(x, y))
 #define VMSB(a, x, y) _mm_sub_ps(a, _mm_mul_ps(x, y))
 #define VMUL_S(x, s)  _mm_mul_ps(x, _mm_set1_ps(s))
-#define VREV(x) _mm_shuffle_ps(x, x, _MM_SHUFFLE(0, 1, 2, 3))
+#define VREV(x)       _mm_shuffle_ps(x, x, _MM_SHUFFLE(0, 1, 2, 3))
 typedef __m128 f4;
 #if defined(_MSC_VER) || defined(MINIMP3_ONLY_SIMD)
 #define minimp3_cpuid __cpuid
@@ -125,13 +127,12 @@ static __inline__ __attribute__((always_inline)) void minimp3_cpuid(int CPUInfo[
         "cpuid\n"
         "xchgl %%ebx, %1\n"
 #endif
-        : "=a" (CPUInfo[0]), "=r" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3])
-        : "a" (InfoType));
+        : "=a"(CPUInfo[0]), "=r"(CPUInfo[1]), "=c"(CPUInfo[2]), "=d"(CPUInfo[3])
+        : "a"(InfoType));
 #else
-    __asm__ __volatile__(
-        "cpuid"
-        : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3])
-        : "a" (InfoType));
+    __asm__ __volatile__("cpuid"
+                         : "=a"(CPUInfo[0]), "=b"(CPUInfo[1]), "=c"(CPUInfo[2]), "=d"(CPUInfo[3])
+                         : "a"(InfoType));
 #endif
 }
 #endif
@@ -150,8 +151,7 @@ static int have_simd()
     if (g_have_simd)
         return g_have_simd - 1;
     minimp3_cpuid(CPUInfo, 0);
-    if (CPUInfo[0] > 0)
-    {
+    if (CPUInfo[0] > 0) {
         minimp3_cpuid(CPUInfo, 1);
         g_have_simd = (CPUInfo[3] & (1 << 26)) + 1; /* SSE2 */
         return g_have_simd - 1;
@@ -165,20 +165,20 @@ test_nosimd:
 }
 #elif defined(__ARM_NEON) || defined(__aarch64__)
 #include <arm_neon.h>
-#define HAVE_SIMD 1
-#define VSTORE vst1q_f32
-#define VLD vld1q_f32
-#define VSET vmovq_n_f32
-#define VADD vaddq_f32
-#define VSUB vsubq_f32
-#define VMUL vmulq_f32
+#define HAVE_SIMD     1
+#define VSTORE        vst1q_f32
+#define VLD           vld1q_f32
+#define VSET          vmovq_n_f32
+#define VADD          vaddq_f32
+#define VSUB          vsubq_f32
+#define VMUL          vmulq_f32
 #define VMAC(a, x, y) vmlaq_f32(a, x, y)
 #define VMSB(a, x, y) vmlsq_f32(a, x, y)
 #define VMUL_S(x, s)  vmulq_f32(x, vmovq_n_f32(s))
-#define VREV(x) vcombine_f32(vget_high_f32(vrev64q_f32(x)), vget_low_f32(vrev64q_f32(x)))
+#define VREV(x)       vcombine_f32(vget_high_f32(vrev64q_f32(x)), vget_low_f32(vrev64q_f32(x)))
 typedef float32x4_t f4;
 static int have_simd()
-{   /* TODO: detect neon for !MINIMP3_ONLY_SIMD */
+{ /* TODO: detect neon for !MINIMP3_ONLY_SIMD */
     return 1;
 }
 #else
@@ -207,7 +207,7 @@ typedef struct
     uint8_t stereo_bands;
     uint8_t bitalloc[64];
     uint8_t scfcod[64];
-    float scf[3*64];
+    float scf[3 * 64];
 } L12_scale_info;
 
 typedef struct
@@ -245,26 +245,25 @@ typedef struct
     float grbuf[2][576];
     float scf[40];
     uint8_t ist_pos[2][39];
-    float syn[18 + 15][2*32];
+    float syn[18 + 15][2 * 32];
 } mp3dec_scratch_t;
 
 static void bs_init(bs_t *bs, const uint8_t *data, int bytes)
 {
     bs->buf   = data;
     bs->pos   = 0;
-    bs->limit = bytes*8;
+    bs->limit = bytes * 8;
 }
 
 static uint32_t get_bits(bs_t *bs, int n)
 {
     uint32_t next, cache = 0, s = bs->pos & 7;
-    int shl = n + s;
+    int shl          = n + s;
     const uint8_t *p = bs->buf + (bs->pos >> 3);
     if ((bs->pos += n) > bs->limit)
         return 0;
     next = *p++ & (255 >> s);
-    while ((shl -= 8) > 0)
-    {
+    while ((shl -= 8) > 0) {
         cache |= next << shl;
         next = *p++;
     }
@@ -273,33 +272,32 @@ static uint32_t get_bits(bs_t *bs, int n)
 
 static int hdr_valid(const uint8_t *h)
 {
-    return h[0] == 0xff &&
-        ((h[1] & 0xF0) == 0xf0 || (h[1] & 0xFE) == 0xe2) &&
-        (HDR_GET_LAYER(h) != 0) &&
-        (HDR_GET_BITRATE(h) != 15) &&
-        (HDR_GET_SAMPLE_RATE(h) != 3);
+    return h[0] == 0xff && ((h[1] & 0xF0) == 0xf0 || (h[1] & 0xFE) == 0xe2) && (HDR_GET_LAYER(h) != 0) &&
+           (HDR_GET_BITRATE(h) != 15) && (HDR_GET_SAMPLE_RATE(h) != 3);
 }
 
 static int hdr_compare(const uint8_t *h1, const uint8_t *h2)
 {
-    return hdr_valid(h2) &&
-        ((h1[1] ^ h2[1]) & 0xFE) == 0 &&
-        ((h1[2] ^ h2[2]) & 0x0C) == 0 &&
-        !(HDR_IS_FREE_FORMAT(h1) ^ HDR_IS_FREE_FORMAT(h2));
+    return hdr_valid(h2) && ((h1[1] ^ h2[1]) & 0xFE) == 0 && ((h1[2] ^ h2[2]) & 0x0C) == 0 &&
+           !(HDR_IS_FREE_FORMAT(h1) ^ HDR_IS_FREE_FORMAT(h2));
 }
 
 static unsigned hdr_bitrate_kbps(const uint8_t *h)
 {
     static const uint8_t halfrate[2][3][15] = {
-        { { 0,4,8,12,16,20,24,28,32,40,48,56,64,72,80 }, { 0,4,8,12,16,20,24,28,32,40,48,56,64,72,80 }, { 0,16,24,28,32,40,48,56,64,72,80,88,96,112,128 } },
-        { { 0,16,20,24,28,32,40,48,56,64,80,96,112,128,160 }, { 0,16,24,28,32,40,48,56,64,80,96,112,128,160,192 }, { 0,16,32,48,64,80,96,112,128,144,160,176,192,208,224 } },
+        {{0, 4, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80},
+         {0, 4, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80},
+         {0, 16, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112, 128}},
+        {{0, 16, 20, 24, 28, 32, 40, 48, 56, 64, 80, 96, 112, 128, 160},
+         {0, 16, 24, 28, 32, 40, 48, 56, 64, 80, 96, 112, 128, 160, 192},
+         {0, 16, 32, 48, 64, 80, 96, 112, 128, 144, 160, 176, 192, 208, 224}},
     };
-    return 2*halfrate[!!HDR_TEST_MPEG1(h)][HDR_GET_LAYER(h) - 1][HDR_GET_BITRATE(h)];
+    return 2 * halfrate[!!HDR_TEST_MPEG1(h)][HDR_GET_LAYER(h) - 1][HDR_GET_BITRATE(h)];
 }
 
 static unsigned hdr_sample_rate_hz(const uint8_t *h)
 {
-    static const unsigned g_hz[3] = { 44100, 48000, 32000 };
+    static const unsigned g_hz[3] = {44100, 48000, 32000};
     return g_hz[HDR_GET_SAMPLE_RATE(h)] >> (int)!HDR_TEST_MPEG1(h) >> (int)!HDR_TEST_NOT_MPEG25(h);
 }
 
@@ -311,8 +309,7 @@ static unsigned hdr_frame_samples(const uint8_t *h)
 static int hdr_frame_bytes(const uint8_t *h, int free_format_size)
 {
     int frame_bytes = hdr_frame_samples(h) * hdr_bitrate_kbps(h) * 125 / hdr_sample_rate_hz(h);
-    if (HDR_IS_LAYER_1(h))
-    {
+    if (HDR_IS_LAYER_1(h)) {
         frame_bytes &= ~3; /* slot align */
     }
     return frame_bytes ? frame_bytes : free_format_size;
@@ -328,42 +325,42 @@ static const L12_subband_alloc_t *L12_subband_alloc_table(const uint8_t *hdr, L1
 {
     const L12_subband_alloc_t *alloc;
     int mode = HDR_GET_STEREO_MODE(hdr);
-    int nbands, stereo_bands = (mode == MODE_MONO) ? 0 : (mode == MODE_JOINT_STEREO) ? (HDR_GET_STEREO_MODE_EXT(hdr) << 2) + 4 : 32;
+    int nbands, stereo_bands = (mode == MODE_MONO)
+                                   ? 0
+                                   : (mode == MODE_JOINT_STEREO) ? (HDR_GET_STEREO_MODE_EXT(hdr) << 2) + 4 : 32;
 
-    if (HDR_IS_LAYER_1(hdr))
-    {
-        static const L12_subband_alloc_t g_alloc_L1[] = { { 76, 4, 32 } };
-        alloc = g_alloc_L1;
-        nbands = 32;
-    } else if (!HDR_TEST_MPEG1(hdr))
-    {
-        static const L12_subband_alloc_t g_alloc_L2M2[] = { { 60, 4, 4 }, { 44, 3, 7 }, { 44, 2, 19 } };
-        alloc = g_alloc_L2M2;
-        nbands = 30;
-    } else
-    {
-        static const L12_subband_alloc_t g_alloc_L2M1[] = { { 0, 4, 3 }, { 16, 4, 8 }, { 32, 3, 12 }, { 40, 2, 7 } };
-        int sample_rate_idx = HDR_GET_SAMPLE_RATE(hdr);
-        unsigned kbps = hdr_bitrate_kbps(hdr) >> (int)(mode != MODE_MONO);
+    if (HDR_IS_LAYER_1(hdr)) {
+        static const L12_subband_alloc_t g_alloc_L1[] = {{76, 4, 32}};
+        alloc                                         = g_alloc_L1;
+        nbands                                        = 32;
+    }
+    else if (!HDR_TEST_MPEG1(hdr)) {
+        static const L12_subband_alloc_t g_alloc_L2M2[] = {{60, 4, 4}, {44, 3, 7}, {44, 2, 19}};
+        alloc                                           = g_alloc_L2M2;
+        nbands                                          = 30;
+    }
+    else {
+        static const L12_subband_alloc_t g_alloc_L2M1[] = {{0, 4, 3}, {16, 4, 8}, {32, 3, 12}, {40, 2, 7}};
+        int sample_rate_idx                             = HDR_GET_SAMPLE_RATE(hdr);
+        unsigned kbps                                   = hdr_bitrate_kbps(hdr) >> (int)(mode != MODE_MONO);
         if (!kbps) /* free-format */
         {
             kbps = 192;
         }
 
-        alloc = g_alloc_L2M1;
+        alloc  = g_alloc_L2M1;
         nbands = 27;
-        if (kbps < 56)
-        {
-            static const L12_subband_alloc_t g_alloc_L2M1_lowrate[] = { { 44, 4, 2 }, { 44, 3, 10 } };
-            alloc = g_alloc_L2M1_lowrate;
-            nbands = sample_rate_idx == 2 ? 12 : 8;
-        } else if (kbps >= 96 && sample_rate_idx != 1)
-        {
+        if (kbps < 56) {
+            static const L12_subband_alloc_t g_alloc_L2M1_lowrate[] = {{44, 4, 2}, {44, 3, 10}};
+            alloc                                                   = g_alloc_L2M1_lowrate;
+            nbands                                                  = sample_rate_idx == 2 ? 12 : 8;
+        }
+        else if (kbps >= 96 && sample_rate_idx != 1) {
             nbands = 30;
         }
     }
 
-    sci->total_bands = (uint8_t)nbands;
+    sci->total_bands  = (uint8_t)nbands;
     sci->stereo_bands = (uint8_t)MINIMP3_MIN(stereo_bands, nbands);
 
     return alloc;
@@ -371,22 +368,35 @@ static const L12_subband_alloc_t *L12_subband_alloc_table(const uint8_t *hdr, L1
 
 static void L12_read_scalefactors(bs_t *bs, uint8_t *pba, uint8_t *scfcod, int bands, float *scf)
 {
-    static const float g_deq_L12[18*3] = {
-#define DQ(x) 9.53674316e-07f/x, 7.56931807e-07f/x, 6.00777173e-07f/x
-        DQ(3),DQ(7),DQ(15),DQ(31),DQ(63),DQ(127),DQ(255),DQ(511),DQ(1023),DQ(2047),DQ(4095),DQ(8191),DQ(16383),DQ(32767),DQ(65535),DQ(3),DQ(5),DQ(9)
-    };
+    static const float g_deq_L12[18 * 3] = {
+#define DQ(x) 9.53674316e-07f / x, 7.56931807e-07f / x, 6.00777173e-07f / x
+        DQ(3),
+        DQ(7),
+        DQ(15),
+        DQ(31),
+        DQ(63),
+        DQ(127),
+        DQ(255),
+        DQ(511),
+        DQ(1023),
+        DQ(2047),
+        DQ(4095),
+        DQ(8191),
+        DQ(16383),
+        DQ(32767),
+        DQ(65535),
+        DQ(3),
+        DQ(5),
+        DQ(9)};
     int i, m;
-    for (i = 0; i < bands; i++)
-    {
-        float s = 0;
-        int ba = *pba++;
+    for (i = 0; i < bands; i++) {
+        float s  = 0;
+        int ba   = *pba++;
         int mask = ba ? 4 + ((19 >> scfcod[i]) & 3) : 0;
-        for (m = 4; m; m >>= 1)
-        {
-            if (mask & m)
-            {
+        for (m = 4; m; m >>= 1) {
+            if (mask & m) {
                 int b = get_bits(bs, 6);
-                s = g_deq_L12[ba*3 - 6 + b % 3] * (1 << 21 >> b/3);
+                s     = g_deq_L12[ba * 3 - 6 + b % 3] * (1 << 21 >> b / 3);
             }
             *scf++ = s;
         }
@@ -396,76 +406,61 @@ static void L12_read_scalefactors(bs_t *bs, uint8_t *pba, uint8_t *scfcod, int b
 static void L12_read_scale_info(const uint8_t *hdr, bs_t *bs, L12_scale_info *sci)
 {
     static const uint8_t g_bitalloc_code_tab[] = {
-        0,17, 3, 4, 5,6,7, 8,9,10,11,12,13,14,15,16,
-        0,17,18, 3,19,4,5, 6,7, 8, 9,10,11,12,13,16,
-        0,17,18, 3,19,4,5,16,
-        0,17,18,16,
-        0,17,18,19, 4,5,6, 7,8, 9,10,11,12,13,14,15,
-        0,17,18, 3,19,4,5, 6,7, 8, 9,10,11,12,13,14,
-        0, 2, 3, 4, 5,6,7, 8,9,10,11,12,13,14,15,16
-    };
-    const L12_subband_alloc_t * subband_alloc = L12_subband_alloc_table(hdr, sci);
+        0,  17, 3,  4,  5,  6,  7,  8,  9,  10, 11, 12, 13, 14, 15, 16, 0,  17, 18, 3,  19, 4,  5,
+        6,  7,  8,  9,  10, 11, 12, 13, 16, 0,  17, 18, 3,  19, 4,  5,  16, 0,  17, 18, 16, 0,  17,
+        18, 19, 4,  5,  6,  7,  8,  9,  10, 11, 12, 13, 14, 15, 0,  17, 18, 3,  19, 4,  5,  6,  7,
+        8,  9,  10, 11, 12, 13, 14, 0,  2,  3,  4,  5,  6,  7,  8,  9,  10, 11, 12, 13, 14, 15, 16};
+    const L12_subband_alloc_t *subband_alloc = L12_subband_alloc_table(hdr, sci);
 
     int i, k = 0, ba_bits = 0;
     const uint8_t *ba_code_tab = g_bitalloc_code_tab;
 
-    for (i = 0; i < sci->total_bands; i++)
-    {
+    for (i = 0; i < sci->total_bands; i++) {
         uint8_t ba;
-        if (i == k)
-        {
+        if (i == k) {
             k += subband_alloc->band_count;
-            ba_bits = subband_alloc->code_tab_width;
+            ba_bits     = subband_alloc->code_tab_width;
             ba_code_tab = g_bitalloc_code_tab + subband_alloc->tab_offset;
             subband_alloc++;
         }
-        ba = ba_code_tab[get_bits(bs, ba_bits)];
-        sci->bitalloc[2*i] = ba;
-        if (i < sci->stereo_bands)
-        {
+        ba                   = ba_code_tab[get_bits(bs, ba_bits)];
+        sci->bitalloc[2 * i] = ba;
+        if (i < sci->stereo_bands) {
             ba = ba_code_tab[get_bits(bs, ba_bits)];
         }
-        sci->bitalloc[2*i + 1] = sci->stereo_bands ? ba : 0;
+        sci->bitalloc[2 * i + 1] = sci->stereo_bands ? ba : 0;
     }
 
-    for (i = 0; i < 2 * sci->total_bands; i++)
-    {
+    for (i = 0; i < 2 * sci->total_bands; i++) {
         sci->scfcod[i] = sci->bitalloc[i] ? HDR_IS_LAYER_1(hdr) ? 2 : get_bits(bs, 2) : 6;
     }
 
     L12_read_scalefactors(bs, sci->bitalloc, sci->scfcod, sci->total_bands * 2, sci->scf);
 
-    for (i = sci->stereo_bands; i < sci->total_bands; i++)
-    {
-        sci->bitalloc[2*i + 1] = 0;
+    for (i = sci->stereo_bands; i < sci->total_bands; i++) {
+        sci->bitalloc[2 * i + 1] = 0;
     }
 }
 
 static int L12_dequantize_granule(float *grbuf, bs_t *bs, L12_scale_info *sci, int group_size)
 {
     int i, j, k, choff = 576;
-    for (j = 0; j < 4; j++)
-    {
-        float *dst = grbuf + group_size*j;
-        for (i = 0; i < 2*sci->total_bands; i++)
-        {
+    for (j = 0; j < 4; j++) {
+        float *dst = grbuf + group_size * j;
+        for (i = 0; i < 2 * sci->total_bands; i++) {
             int ba = sci->bitalloc[i];
-            if (ba != 0)
-            {
-                if (ba < 17)
-                {
+            if (ba != 0) {
+                if (ba < 17) {
                     int half = (1 << (ba - 1)) - 1;
-                    for (k = 0; k < group_size; k++)
-                    {
+                    for (k = 0; k < group_size; k++) {
                         dst[k] = (float)((int)get_bits(bs, ba) - half);
                     }
-                } else
-                {
-                    unsigned mod = (2 << (ba - 17)) + 1;    /* 3, 5, 9 */
-                    unsigned code = get_bits(bs, mod + 2 - (mod >> 3));  /* 5, 7, 10 */
-                    for (k = 0; k < group_size; k++, code /= mod)
-                    {
-                        dst[k] = (float)((int)(code % mod - mod/2));
+                }
+                else {
+                    unsigned mod  = (2 << (ba - 17)) + 1;               /* 3, 5, 9 */
+                    unsigned code = get_bits(bs, mod + 2 - (mod >> 3)); /* 5, 7, 10 */
+                    for (k = 0; k < group_size; k++, code /= mod) {
+                        dst[k] = (float)((int)(code % mod - mod / 2));
                     }
                 }
             }
@@ -473,18 +468,18 @@ static int L12_dequantize_granule(float *grbuf, bs_t *bs, L12_scale_info *sci, i
             choff = 18 - choff;
         }
     }
-    return group_size*4;
+    return group_size * 4;
 }
 
 static void L12_apply_scf_384(L12_scale_info *sci, const float *scf, float *dst)
 {
     int i, k;
-    memcpy(dst + 576 + sci->stereo_bands*18, dst + sci->stereo_bands*18, (sci->total_bands - sci->stereo_bands)*18*sizeof(float));
-    for (i = 0; i < sci->total_bands; i++, dst += 18, scf += 6)
-    {
-        for (k = 0; k < 12; k++)
-        {
-            dst[k + 0]   *= scf[0];
+    memcpy(dst + 576 + sci->stereo_bands * 18,
+           dst + sci->stereo_bands * 18,
+           (sci->total_bands - sci->stereo_bands) * 18 * sizeof(float));
+    for (i = 0; i < sci->total_bands; i++, dst += 18, scf += 6) {
+        for (k = 0; k < 12; k++) {
+            dst[k + 0] *= scf[0];
             dst[k + 576] *= scf[3];
         }
     }
@@ -494,95 +489,102 @@ static void L12_apply_scf_384(L12_scale_info *sci, const float *scf, float *dst)
 static int L3_read_side_info(bs_t *bs, L3_gr_info_t *gr, const uint8_t *hdr)
 {
     static const uint8_t g_scf_long[9][23] = {
-        { 6,6,6,6,6,6,8,10,12,14,16,20,24,28,32,38,46,52,60,68,58,54,0 },
-        { 6,6,6,6,6,6,8,10,12,14,16,20,24,28,32,38,46,52,60,68,58,54,0 },
-        { 12,12,12,12,12,12,16,20,24,28,32,40,48,56,64,76,90,2,2,2,2,2,0 },
-        { 6,6,6,6,6,6,8,10,12,14,16,20,24,28,32,38,46,52,60,68,58,54,0 },
-        { 6,6,6,6,6,6,8,10,12,14,16,18,22,26,32,38,46,54,62,70,76,36,0 },
-        { 6,6,6,6,6,6,8,10,12,14,16,20,24,28,32,38,46,52,60,68,58,54,0 },
-        { 4,4,4,4,4,4,6,6,8,8,10,12,16,20,24,28,34,42,50,54,76,158,0 },
-        { 4,4,4,4,4,4,6,6,6,8,10,12,16,18,22,28,34,40,46,54,54,192,0 },
-        { 4,4,4,4,4,4,6,6,8,10,12,16,20,24,30,38,46,56,68,84,102,26,0 }
-    };
+        {6, 6, 6, 6, 6, 6, 8, 10, 12, 14, 16, 20, 24, 28, 32, 38, 46, 52, 60, 68, 58, 54, 0},
+        {6, 6, 6, 6, 6, 6, 8, 10, 12, 14, 16, 20, 24, 28, 32, 38, 46, 52, 60, 68, 58, 54, 0},
+        {12, 12, 12, 12, 12, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 76, 90, 2, 2, 2, 2, 2, 0},
+        {6, 6, 6, 6, 6, 6, 8, 10, 12, 14, 16, 20, 24, 28, 32, 38, 46, 52, 60, 68, 58, 54, 0},
+        {6, 6, 6, 6, 6, 6, 8, 10, 12, 14, 16, 18, 22, 26, 32, 38, 46, 54, 62, 70, 76, 36, 0},
+        {6, 6, 6, 6, 6, 6, 8, 10, 12, 14, 16, 20, 24, 28, 32, 38, 46, 52, 60, 68, 58, 54, 0},
+        {4, 4, 4, 4, 4, 4, 6, 6, 8, 8, 10, 12, 16, 20, 24, 28, 34, 42, 50, 54, 76, 158, 0},
+        {4, 4, 4, 4, 4, 4, 6, 6, 6, 8, 10, 12, 16, 18, 22, 28, 34, 40, 46, 54, 54, 192, 0},
+        {4, 4, 4, 4, 4, 4, 6, 6, 8, 10, 12, 16, 20, 24, 30, 38, 46, 56, 68, 84, 102, 26, 0}};
     static const uint8_t g_scf_short[9][40] = {
-        { 4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 8,8,8,8,8,8,8,8,8,12,12,12,16,16,16,20,20,20,24,24,24,28,28,28,36,36,36,2,2,2,2,2,2,2,2,2,26,26,26,0 },
-        { 4,4,4,4,4,4,4,4,4,6,6,6,6,6,6,8,8,8,10,10,10,14,14,14,18,18,18,26,26,26,32,32,32,42,42,42,18,18,18,0 },
-        { 4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,32,32,32,44,44,44,12,12,12,0 },
-        { 4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 4,4,4,4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,22,22,22,30,30,30,56,56,56,0 },
-        { 4,4,4,4,4,4,4,4,4,4,4,4,6,6,6,6,6,6,10,10,10,12,12,12,14,14,14,16,16,16,20,20,20,26,26,26,66,66,66,0 },
-        { 4,4,4,4,4,4,4,4,4,4,4,4,6,6,6,8,8,8,12,12,12,16,16,16,20,20,20,26,26,26,34,34,34,42,42,42,12,12,12,0 }
-    };
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12,
+         12, 14, 14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12,
+         12, 14, 14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {8,  8,  8,  8,  8,  8,  8,  8, 8, 12, 12, 12, 16, 16, 16, 20, 20, 20, 24, 24,
+         24, 28, 28, 28, 36, 36, 36, 2, 2, 2,  2,  2,  2,  2,  2,  2,  26, 26, 26, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10,
+         10, 14, 14, 14, 18, 18, 18, 26, 26, 26, 32, 32, 32, 42, 42, 42, 18, 18, 18, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12,
+         12, 14, 14, 14, 18, 18, 18, 24, 24, 24, 32, 32, 32, 44, 44, 44, 12, 12, 12, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12,
+         12, 14, 14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10,
+         10, 12, 12, 12, 14, 14, 14, 18, 18, 18, 22, 22, 22, 30, 30, 30, 56, 56, 56, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  6,  6,  6,  10, 10,
+         10, 12, 12, 12, 14, 14, 14, 16, 16, 16, 20, 20, 20, 26, 26, 26, 66, 66, 66, 0},
+        {4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  4,  6,  6,  6,  8,  8,  8,  12, 12,
+         12, 16, 16, 16, 20, 20, 20, 26, 26, 26, 34, 34, 34, 42, 42, 42, 12, 12, 12, 0}};
     static const uint8_t g_scf_mixed[9][40] = {
-        { 6,6,6,6,6,6,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 6,6,6,6,6,6,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 12,12,12,4,4,4,8,8,8,12,12,12,16,16,16,20,20,20,24,24,24,28,28,28,36,36,36,2,2,2,2,2,2,2,2,2,26,26,26,0 },
-        { 6,6,6,6,6,6,6,6,6,6,6,6,8,8,8,10,10,10,14,14,14,18,18,18,26,26,26,32,32,32,42,42,42,18,18,18,0 },
-        { 6,6,6,6,6,6,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,32,32,32,44,44,44,12,12,12,0 },
-        { 6,6,6,6,6,6,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,24,24,24,30,30,30,40,40,40,18,18,18,0 },
-        { 4,4,4,4,4,4,6,6,4,4,4,6,6,6,8,8,8,10,10,10,12,12,12,14,14,14,18,18,18,22,22,22,30,30,30,56,56,56,0 },
-        { 4,4,4,4,4,4,6,6,4,4,4,6,6,6,6,6,6,10,10,10,12,12,12,14,14,14,16,16,16,20,20,20,26,26,26,66,66,66,0 },
-        { 4,4,4,4,4,4,6,6,4,4,4,6,6,6,8,8,8,12,12,12,16,16,16,20,20,20,26,26,26,34,34,34,42,42,42,12,12,12,0 }
-    };
+        {6,  6,  6,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12, 12, 14,
+         14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {6,  6,  6,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12, 12, 14,
+         14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {12, 12, 12, 4,  4,  4,  8,  8, 8, 12, 12, 12, 16, 16, 16, 20, 20, 20, 24, 24,
+         24, 28, 28, 28, 36, 36, 36, 2, 2, 2,  2,  2,  2,  2,  2,  2,  26, 26, 26, 0},
+        {6,  6,  6,  6,  6,  6,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10, 10, 14,
+         14, 14, 18, 18, 18, 26, 26, 26, 32, 32, 32, 42, 42, 42, 18, 18, 18, 0},
+        {6,  6,  6,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12, 12, 14,
+         14, 14, 18, 18, 18, 24, 24, 24, 32, 32, 32, 44, 44, 44, 12, 12, 12, 0},
+        {6,  6,  6,  6,  6,  6,  6,  6,  6,  8,  8,  8,  10, 10, 10, 12, 12, 12, 14,
+         14, 14, 18, 18, 18, 24, 24, 24, 30, 30, 30, 40, 40, 40, 18, 18, 18, 0},
+        {4,  4,  4,  4,  4,  4,  6,  6,  4,  4,  4,  6,  6,  6,  8,  8,  8,  10, 10, 10,
+         12, 12, 12, 14, 14, 14, 18, 18, 18, 22, 22, 22, 30, 30, 30, 56, 56, 56, 0},
+        {4,  4,  4,  4,  4,  4,  6,  6,  4,  4,  4,  6,  6,  6,  6,  6,  6,  10, 10, 10,
+         12, 12, 12, 14, 14, 14, 16, 16, 16, 20, 20, 20, 26, 26, 26, 66, 66, 66, 0},
+        {4,  4,  4,  4,  4,  4,  6,  6,  4,  4,  4,  6,  6,  6,  8,  8,  8,  12, 12, 12,
+         16, 16, 16, 20, 20, 20, 26, 26, 26, 34, 34, 34, 42, 42, 42, 12, 12, 12, 0}};
 
-    unsigned tables, scfsi = 0;
+    unsigned tables, scfsi           = 0;
     int main_data_begin, part_23_sum = 0;
-    int sr_idx = HDR_GET_MY_SAMPLE_RATE(hdr);
+    int sr_idx   = HDR_GET_MY_SAMPLE_RATE(hdr);
     int gr_count = HDR_IS_MONO(hdr) ? 1 : 2;
 
-    if (HDR_TEST_MPEG1(hdr))
-    {
+    if (HDR_TEST_MPEG1(hdr)) {
         gr_count *= 2;
         main_data_begin = get_bits(bs, 9);
-        scfsi = get_bits(bs, 7 + gr_count);
-    } else
-    {
+        scfsi           = get_bits(bs, 7 + gr_count);
+    }
+    else {
         main_data_begin = get_bits(bs, 8 + gr_count) >> gr_count;
     }
 
-    do
-    {
-        if (HDR_IS_MONO(hdr))
-        {
+    do {
+        if (HDR_IS_MONO(hdr)) {
             scfsi <<= 4;
         }
         gr->part_23_length = (uint16_t)get_bits(bs, 12);
         part_23_sum += gr->part_23_length;
-        gr->big_values = (uint16_t)get_bits(bs,  9);
-        if (gr->big_values > 288)
-        {
+        gr->big_values = (uint16_t)get_bits(bs, 9);
+        if (gr->big_values > 288) {
             return -1;
         }
-        gr->global_gain = (uint8_t)get_bits(bs, 8);
+        gr->global_gain       = (uint8_t)get_bits(bs, 8);
         gr->scalefac_compress = (uint16_t)get_bits(bs, HDR_TEST_MPEG1(hdr) ? 4 : 9);
-        gr->sfbtab = g_scf_long[sr_idx];
-        gr->n_long_sfb  = 22;
-        gr->n_short_sfb = 0;
-        if (get_bits(bs, 1))
-        {
+        gr->sfbtab            = g_scf_long[sr_idx];
+        gr->n_long_sfb        = 22;
+        gr->n_short_sfb       = 0;
+        if (get_bits(bs, 1)) {
             gr->block_type = (uint8_t)get_bits(bs, 2);
-            if (!gr->block_type)
-            {
+            if (!gr->block_type) {
                 return -1;
             }
             gr->mixed_block_flag = (uint8_t)get_bits(bs, 1);
-            gr->region_count[0] = 7;
-            gr->region_count[1] = 255;
-            if (gr->block_type == SHORT_BLOCK_TYPE)
-            {
+            gr->region_count[0]  = 7;
+            gr->region_count[1]  = 255;
+            if (gr->block_type == SHORT_BLOCK_TYPE) {
                 scfsi &= 0x0F0F;
-                if (!gr->mixed_block_flag)
-                {
+                if (!gr->mixed_block_flag) {
                     gr->region_count[0] = 8;
-                    gr->sfbtab = g_scf_short[sr_idx];
-                    gr->n_long_sfb = 0;
-                    gr->n_short_sfb = 39;
-                } else
-                {
-                    gr->sfbtab = g_scf_mixed[sr_idx];
-                    gr->n_long_sfb = HDR_TEST_MPEG1(hdr) ? 8 : 6;
+                    gr->sfbtab          = g_scf_short[sr_idx];
+                    gr->n_long_sfb      = 0;
+                    gr->n_short_sfb     = 39;
+                }
+                else {
+                    gr->sfbtab      = g_scf_mixed[sr_idx];
+                    gr->n_long_sfb  = HDR_TEST_MPEG1(hdr) ? 8 : 6;
                     gr->n_short_sfb = 30;
                 }
             }
@@ -591,58 +593,54 @@ static int L3_read_side_info(bs_t *bs, L3_gr_info_t *gr, const uint8_t *hdr)
             gr->subblock_gain[0] = (uint8_t)get_bits(bs, 3);
             gr->subblock_gain[1] = (uint8_t)get_bits(bs, 3);
             gr->subblock_gain[2] = (uint8_t)get_bits(bs, 3);
-        } else
-        {
-            gr->block_type = 0;
+        }
+        else {
+            gr->block_type       = 0;
             gr->mixed_block_flag = 0;
-            tables = get_bits(bs, 15);
-            gr->region_count[0] = (uint8_t)get_bits(bs, 4);
-            gr->region_count[1] = (uint8_t)get_bits(bs, 3);
-            gr->region_count[2] = 255;
+            tables               = get_bits(bs, 15);
+            gr->region_count[0]  = (uint8_t)get_bits(bs, 4);
+            gr->region_count[1]  = (uint8_t)get_bits(bs, 3);
+            gr->region_count[2]  = 255;
         }
         gr->table_select[0] = (uint8_t)(tables >> 10);
         gr->table_select[1] = (uint8_t)((tables >> 5) & 31);
-        gr->table_select[2] = (uint8_t)((tables) & 31);
-        gr->preflag = HDR_TEST_MPEG1(hdr) ? get_bits(bs, 1) : (gr->scalefac_compress >= 500);
-        gr->scalefac_scale = (uint8_t)get_bits(bs, 1);
-        gr->count1_table = (uint8_t)get_bits(bs, 1);
-        gr->scfsi = (uint8_t)((scfsi >> 12) & 15);
+        gr->table_select[2] = (uint8_t)((tables)&31);
+        gr->preflag         = HDR_TEST_MPEG1(hdr) ? get_bits(bs, 1) : (gr->scalefac_compress >= 500);
+        gr->scalefac_scale  = (uint8_t)get_bits(bs, 1);
+        gr->count1_table    = (uint8_t)get_bits(bs, 1);
+        gr->scfsi           = (uint8_t)((scfsi >> 12) & 15);
         scfsi <<= 4;
         gr++;
-    } while(--gr_count);
+    } while (--gr_count);
 
-    if (part_23_sum + bs->pos > bs->limit + main_data_begin*8)
-    {
+    if (part_23_sum + bs->pos > bs->limit + main_data_begin * 8) {
         return -1;
     }
 
     return main_data_begin;
 }
 
-static void L3_read_scalefactors(uint8_t *scf, uint8_t *ist_pos, const uint8_t *scf_size, const uint8_t *scf_count, bs_t *bitbuf, int scfsi)
+static void L3_read_scalefactors(
+    uint8_t *scf, uint8_t *ist_pos, const uint8_t *scf_size, const uint8_t *scf_count, bs_t *bitbuf, int scfsi)
 {
     int i, k;
-    for (i = 0; i < 4 && scf_count[i]; i++, scfsi *= 2)
-    {
+    for (i = 0; i < 4 && scf_count[i]; i++, scfsi *= 2) {
         int cnt = scf_count[i];
-        if (scfsi & 8)
-        {
+        if (scfsi & 8) {
             memcpy(scf, ist_pos, cnt);
-        } else
-        {
+        }
+        else {
             int bits = scf_size[i];
-            if (!bits)
-            {
+            if (!bits) {
                 memset(scf, 0, cnt);
                 memset(ist_pos, 0, cnt);
-            } else
-            {
+            }
+            else {
                 int max_scf = (scfsi < 0) ? (1 << bits) - 1 : -1;
-                for (k = 0; k < cnt; k++)
-                {
-                    int s = get_bits(bitbuf, bits);
+                for (k = 0; k < cnt; k++) {
+                    int s      = get_bits(bitbuf, bits);
                     ist_pos[k] = (s == max_scf ? -1 : s);
-                    scf[k] = s;
+                    scf[k]     = s;
                 }
             }
         }
@@ -654,43 +652,39 @@ static void L3_read_scalefactors(uint8_t *scf, uint8_t *ist_pos, const uint8_t *
 
 static float L3_ldexp_q2(float y, int exp_q2)
 {
-    static const float g_expfrac[4] = { 9.31322575e-10f,7.83145814e-10f,6.58544508e-10f,5.53767716e-10f };
+    static const float g_expfrac[4] = {9.31322575e-10f, 7.83145814e-10f, 6.58544508e-10f, 5.53767716e-10f};
     int e;
-    do
-    {
-        e = MINIMP3_MIN(30*4, exp_q2);
-        y *= g_expfrac[e & 3]*(1 << 30 >> (e >> 2));
+    do {
+        e = MINIMP3_MIN(30 * 4, exp_q2);
+        y *= g_expfrac[e & 3] * (1 << 30 >> (e >> 2));
     } while ((exp_q2 -= e) > 0);
     return y;
 }
 
-static void L3_decode_scalefactors(const uint8_t *hdr, uint8_t *ist_pos, bs_t *bs, const L3_gr_info_t *gr, float *scf, int ch)
+static void L3_decode_scalefactors(
+    const uint8_t *hdr, uint8_t *ist_pos, bs_t *bs, const L3_gr_info_t *gr, float *scf, int ch)
 {
     static const uint8_t g_scf_partitions[3][28] = {
-        { 6,5,5, 5,6,5,5,5,6,5, 7,3,11,10,0,0, 7, 7, 7,0, 6, 6,6,3, 8, 8,5,0 },
-        { 8,9,6,12,6,9,9,9,6,9,12,6,15,18,0,0, 6,15,12,0, 6,12,9,6, 6,18,9,0 },
-        { 9,9,6,12,9,9,9,9,9,9,12,6,18,18,0,0,12,12,12,0,12, 9,9,6,15,12,9,0 }
-    };
+        {6, 5, 5, 5, 6, 5, 5, 5, 6, 5, 7, 3, 11, 10, 0, 0, 7, 7, 7, 0, 6, 6, 6, 3, 8, 8, 5, 0},
+        {8, 9, 6, 12, 6, 9, 9, 9, 6, 9, 12, 6, 15, 18, 0, 0, 6, 15, 12, 0, 6, 12, 9, 6, 6, 18, 9, 0},
+        {9, 9, 6, 12, 9, 9, 9, 9, 9, 9, 12, 6, 18, 18, 0, 0, 12, 12, 12, 0, 12, 9, 9, 6, 15, 12, 9, 0}};
     const uint8_t *scf_partition = g_scf_partitions[!!gr->n_short_sfb + !gr->n_long_sfb];
     uint8_t scf_size[4], iscf[40];
     int i, scf_shift = gr->scalefac_scale + 1, gain_exp, scfsi = gr->scfsi;
     float gain;
 
-    if (HDR_TEST_MPEG1(hdr))
-    {
-        static const uint8_t g_scfc_decode[16] = { 0,1,2,3, 12,5,6,7, 9,10,11,13, 14,15,18,19 };
-        int part = g_scfc_decode[gr->scalefac_compress];
+    if (HDR_TEST_MPEG1(hdr)) {
+        static const uint8_t g_scfc_decode[16] = {0, 1, 2, 3, 12, 5, 6, 7, 9, 10, 11, 13, 14, 15, 18, 19};
+        int part                               = g_scfc_decode[gr->scalefac_compress];
         scf_size[1] = scf_size[0] = (uint8_t)(part >> 2);
         scf_size[3] = scf_size[2] = (uint8_t)(part & 3);
-    } else
-    {
-        static const uint8_t g_mod[6*4] = { 5,5,4,4,5,5,4,1,4,3,1,1,5,6,6,1,4,4,4,1,4,3,1,1 };
+    }
+    else {
+        static const uint8_t g_mod[6 * 4] = {5, 5, 4, 4, 5, 5, 4, 1, 4, 3, 1, 1, 5, 6, 6, 1, 4, 4, 4, 1, 4, 3, 1, 1};
         int k, modprod, sfc, ist = HDR_TEST_I_STEREO(hdr) && ch;
         sfc = gr->scalefac_compress >> ist;
-        for (k = ist*3*4; sfc >= 0; sfc -= modprod, k += 4)
-        {
-            for (modprod = 1, i = 3; i >= 0; i--)
-            {
+        for (k = ist * 3 * 4; sfc >= 0; sfc -= modprod, k += 4) {
+            for (modprod = 1, i = 3; i >= 0; i--) {
                 scf_size[i] = (uint8_t)(sfc / modprod % g_mod[k + i]);
                 modprod *= g_mod[k + i];
             }
@@ -700,28 +694,24 @@ static void L3_decode_scalefactors(const uint8_t *hdr, uint8_t *ist_pos, bs_t *b
     }
     L3_read_scalefactors(iscf, ist_pos, scf_size, scf_partition, bs, scfsi);
 
-    if (gr->n_short_sfb)
-    {
+    if (gr->n_short_sfb) {
         int sh = 3 - scf_shift;
-        for (i = 0; i < gr->n_short_sfb; i += 3)
-        {
+        for (i = 0; i < gr->n_short_sfb; i += 3) {
             iscf[gr->n_long_sfb + i + 0] += gr->subblock_gain[0] << sh;
             iscf[gr->n_long_sfb + i + 1] += gr->subblock_gain[1] << sh;
             iscf[gr->n_long_sfb + i + 2] += gr->subblock_gain[2] << sh;
         }
-    } else if (gr->preflag)
-    {
-        static const uint8_t g_preamp[10] = { 1,1,1,1,2,2,3,3,3,2 };
-        for (i = 0; i < 10; i++)
-        {
+    }
+    else if (gr->preflag) {
+        static const uint8_t g_preamp[10] = {1, 1, 1, 1, 2, 2, 3, 3, 3, 2};
+        for (i = 0; i < 10; i++) {
             iscf[11 + i] += g_preamp[i];
         }
     }
 
-    gain_exp = gr->global_gain + BITS_DEQUANTIZER_OUT*4 - 210 - (HDR_IS_MS_STEREO(hdr) ? 2 : 0);
-    gain = L3_ldexp_q2(1 << (MAX_SCFI/4),  MAX_SCFI - gain_exp);
-    for (i = 0; i < (int)(gr->n_long_sfb + gr->n_short_sfb); i++)
-    {
+    gain_exp = gr->global_gain + BITS_DEQUANTIZER_OUT * 4 - 210 - (HDR_IS_MS_STEREO(hdr) ? 2 : 0);
+    gain     = L3_ldexp_q2(1 << (MAX_SCFI / 4), MAX_SCFI - gain_exp);
+    for (i = 0; i < (int)(gr->n_long_sfb + gr->n_short_sfb); i++) {
         scf[i] = L3_ldexp_q2(gain, iscf[i] << scf_shift);
     }
 }
@@ -729,125 +719,288 @@ static void L3_decode_scalefactors(const uint8_t *hdr, uint8_t *ist_pos, bs_t *b
 static float L3_pow_43(int x)
 {
     static const float g_pow43[129] = {
-        0,1,2.519842f,4.326749f,6.349604f,8.549880f,10.902724f,13.390518f,16.000000f,18.720754f,21.544347f,24.463781f,27.473142f,30.567351f,33.741992f,36.993181f,40.317474f,43.711787f,47.173345f,50.699631f,54.288352f,57.937408f,61.644865f,65.408941f,69.227979f,73.100443f,77.024898f,81.000000f,85.024491f,89.097188f,93.216975f,97.382800f,101.593667f,105.848633f,110.146801f,114.487321f,118.869381f,123.292209f,127.755065f,132.257246f,136.798076f,141.376907f,145.993119f,150.646117f,155.335327f,160.060199f,164.820202f,169.614826f,174.443577f,179.305980f,184.201575f,189.129918f,194.090580f,199.083145f,204.107210f,209.162385f,214.248292f,219.364564f,224.510845f,229.686789f,234.892058f,240.126328f,245.389280f,250.680604f,256.000000f,261.347174f,266.721841f,272.123723f,277.552547f,283.008049f,288.489971f,293.998060f,299.532071f,305.091761f,310.676898f,316.287249f,321.922592f,327.582707f,333.267377f,338.976394f,344.709550f,350.466646f,356.247482f,362.051866f,367.879608f,373.730522f,379.604427f,385.501143f,391.420496f,397.362314f,403.326427f,409.312672f,415.320884f,421.350905f,427.402579f,433.475750f,439.570269f,445.685987f,451.822757f,457.980436f,464.158883f,470.357960f,476.577530f,482.817459f,489.077615f,495.357868f,501.658090f,507.978156f,514.317941f,520.677324f,527.056184f,533.454404f,539.871867f,546.308458f,552.764065f,559.238575f,565.731879f,572.243870f,578.774440f,585.323483f,591.890898f,598.476581f,605.080431f,611.702349f,618.342238f,625.000000f,631.675540f,638.368763f,645.079578f
-    };
+        0,           1,           2.519842f,   4.326749f,   6.349604f,   8.549880f,   10.902724f,  13.390518f,
+        16.000000f,  18.720754f,  21.544347f,  24.463781f,  27.473142f,  30.567351f,  33.741992f,  36.993181f,
+        40.317474f,  43.711787f,  47.173345f,  50.699631f,  54.288352f,  57.937408f,  61.644865f,  65.408941f,
+        69.227979f,  73.100443f,  77.024898f,  81.000000f,  85.024491f,  89.097188f,  93.216975f,  97.382800f,
+        101.593667f, 105.848633f, 110.146801f, 114.487321f, 118.869381f, 123.292209f, 127.755065f, 132.257246f,
+        136.798076f, 141.376907f, 145.993119f, 150.646117f, 155.335327f, 160.060199f, 164.820202f, 169.614826f,
+        174.443577f, 179.305980f, 184.201575f, 189.129918f, 194.090580f, 199.083145f, 204.107210f, 209.162385f,
+        214.248292f, 219.364564f, 224.510845f, 229.686789f, 234.892058f, 240.126328f, 245.389280f, 250.680604f,
+        256.000000f, 261.347174f, 266.721841f, 272.123723f, 277.552547f, 283.008049f, 288.489971f, 293.998060f,
+        299.532071f, 305.091761f, 310.676898f, 316.287249f, 321.922592f, 327.582707f, 333.267377f, 338.976394f,
+        344.709550f, 350.466646f, 356.247482f, 362.051866f, 367.879608f, 373.730522f, 379.604427f, 385.501143f,
+        391.420496f, 397.362314f, 403.326427f, 409.312672f, 415.320884f, 421.350905f, 427.402579f, 433.475750f,
+        439.570269f, 445.685987f, 451.822757f, 457.980436f, 464.158883f, 470.357960f, 476.577530f, 482.817459f,
+        489.077615f, 495.357868f, 501.658090f, 507.978156f, 514.317941f, 520.677324f, 527.056184f, 533.454404f,
+        539.871867f, 546.308458f, 552.764065f, 559.238575f, 565.731879f, 572.243870f, 578.774440f, 585.323483f,
+        591.890898f, 598.476581f, 605.080431f, 611.702349f, 618.342238f, 625.000000f, 631.675540f, 638.368763f,
+        645.079578f};
     float frac;
     int sign, mult = 256;
 
-    if (x < 129)
-    {
+    if (x < 129) {
         return g_pow43[x];
     }
 
-    if (x < 1024)
-    {
+    if (x < 1024) {
         mult = 16;
         x <<= 3;
     }
 
-    sign = 2*x & 64;
+    sign = 2 * x & 64;
     frac = (float)((x & 63) - sign) / ((x & ~63) + sign);
-    return g_pow43[(x + sign) >> 6] * (1.f + frac * ((4.f/3) + frac * (2.f/9))) * mult;
+    return g_pow43[(x + sign) >> 6] * (1.f + frac * ((4.f / 3) + frac * (2.f / 9))) * mult;
 }
 
 static void L3_huffman(float *dst, bs_t *bs, const L3_gr_info_t *gr_info, const float *scf, int layer3gr_limit)
 {
-    static const float g_pow43_signed[32] = { 0,0,1,-1,2.519842f,-2.519842f,4.326749f,-4.326749f,6.349604f,-6.349604f,8.549880f,-8.549880f,10.902724f,-10.902724f,13.390518f,-13.390518f,16.000000f,-16.000000f,18.720754f,-18.720754f,21.544347f,-21.544347f,24.463781f,-24.463781f,27.473142f,-27.473142f,30.567351f,-30.567351f,33.741992f,-33.741992f,36.993181f,-36.993181f };
-    static const int16_t tab0[32] = { 0, };
-    static const int16_t tab1[] = { 785,785,785,785,784,784,784,784,513,513,513,513,513,513,513,513,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256 };
-    static const int16_t tab2[] = { -255,1313,1298,1282,785,785,785,785,784,784,784,784,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,290,288 };
-    static const int16_t tab3[] = { -255,1313,1298,1282,769,769,769,769,529,529,529,529,529,529,529,529,528,528,528,528,528,528,528,528,512,512,512,512,512,512,512,512,290,288 };
-    static const int16_t tab5[] = { -253,-318,-351,-367,785,785,785,785,784,784,784,784,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,819,818,547,547,275,275,275,275,561,560,515,546,289,274,288,258 };
-    static const int16_t tab6[] = { -254,-287,1329,1299,1314,1312,1057,1057,1042,1042,1026,1026,784,784,784,784,529,529,529,529,529,529,529,529,769,769,769,769,768,768,768,768,563,560,306,306,291,259 };
-    static const int16_t tab7[] = { -252,-413,-477,-542,1298,-575,1041,1041,784,784,784,784,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,-383,-399,1107,1092,1106,1061,849,849,789,789,1104,1091,773,773,1076,1075,341,340,325,309,834,804,577,577,532,532,516,516,832,818,803,816,561,561,531,531,515,546,289,289,288,258 };
-    static const int16_t tab8[] = { -252,-429,-493,-559,1057,1057,1042,1042,529,529,529,529,529,529,529,529,784,784,784,784,769,769,769,769,512,512,512,512,512,512,512,512,-382,1077,-415,1106,1061,1104,849,849,789,789,1091,1076,1029,1075,834,834,597,581,340,340,339,324,804,833,532,532,832,772,818,803,817,787,816,771,290,290,290,290,288,258 };
-    static const int16_t tab9[] = { -253,-349,-414,-447,-463,1329,1299,-479,1314,1312,1057,1057,1042,1042,1026,1026,785,785,785,785,784,784,784,784,769,769,769,769,768,768,768,768,-319,851,821,-335,836,850,805,849,341,340,325,336,533,533,579,579,564,564,773,832,578,548,563,516,321,276,306,291,304,259 };
-    static const int16_t tab10[] = { -251,-572,-733,-830,-863,-879,1041,1041,784,784,784,784,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,-511,-527,-543,1396,1351,1381,1366,1395,1335,1380,-559,1334,1138,1138,1063,1063,1350,1392,1031,1031,1062,1062,1364,1363,1120,1120,1333,1348,881,881,881,881,375,374,359,373,343,358,341,325,791,791,1123,1122,-703,1105,1045,-719,865,865,790,790,774,774,1104,1029,338,293,323,308,-799,-815,833,788,772,818,803,816,322,292,307,320,561,531,515,546,289,274,288,258 };
-    static const int16_t tab11[] = { -251,-525,-605,-685,-765,-831,-846,1298,1057,1057,1312,1282,785,785,785,785,784,784,784,784,769,769,769,769,512,512,512,512,512,512,512,512,1399,1398,1383,1367,1382,1396,1351,-511,1381,1366,1139,1139,1079,1079,1124,1124,1364,1349,1363,1333,882,882,882,882,807,807,807,807,1094,1094,1136,1136,373,341,535,535,881,775,867,822,774,-591,324,338,-671,849,550,550,866,864,609,609,293,336,534,534,789,835,773,-751,834,804,308,307,833,788,832,772,562,562,547,547,305,275,560,515,290,290 };
-    static const int16_t tab12[] = { -252,-397,-477,-557,-622,-653,-719,-735,-750,1329,1299,1314,1057,1057,1042,1042,1312,1282,1024,1024,785,785,785,785,784,784,784,784,769,769,769,769,-383,1127,1141,1111,1126,1140,1095,1110,869,869,883,883,1079,1109,882,882,375,374,807,868,838,881,791,-463,867,822,368,263,852,837,836,-543,610,610,550,550,352,336,534,534,865,774,851,821,850,805,593,533,579,564,773,832,578,578,548,548,577,577,307,276,306,291,516,560,259,259 };
-    static const int16_t tab13[] = { -250,-2107,-2507,-2764,-2909,-2974,-3007,-3023,1041,1041,1040,1040,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,-767,-1052,-1213,-1277,-1358,-1405,-1469,-1535,-1550,-1582,-1614,-1647,-1662,-1694,-1726,-1759,-1774,-1807,-1822,-1854,-1886,1565,-1919,-1935,-1951,-1967,1731,1730,1580,1717,-1983,1729,1564,-1999,1548,-2015,-2031,1715,1595,-2047,1714,-2063,1610,-2079,1609,-2095,1323,1323,1457,1457,1307,1307,1712,1547,1641,1700,1699,1594,1685,1625,1442,1442,1322,1322,-780,-973,-910,1279,1278,1277,1262,1276,1261,1275,1215,1260,1229,-959,974,974,989,989,-943,735,478,478,495,463,506,414,-1039,1003,958,1017,927,942,987,957,431,476,1272,1167,1228,-1183,1256,-1199,895,895,941,941,1242,1227,1212,1135,1014,1014,490,489,503,487,910,1013,985,925,863,894,970,955,1012,847,-1343,831,755,755,984,909,428,366,754,559,-1391,752,486,457,924,997,698,698,983,893,740,740,908,877,739,739,667,667,953,938,497,287,271,271,683,606,590,712,726,574,302,302,738,736,481,286,526,725,605,711,636,724,696,651,589,681,666,710,364,467,573,695,466,466,301,465,379,379,709,604,665,679,316,316,634,633,436,436,464,269,424,394,452,332,438,363,347,408,393,448,331,422,362,407,392,421,346,406,391,376,375,359,1441,1306,-2367,1290,-2383,1337,-2399,-2415,1426,1321,-2431,1411,1336,-2447,-2463,-2479,1169,1169,1049,1049,1424,1289,1412,1352,1319,-2495,1154,1154,1064,1064,1153,1153,416,390,360,404,403,389,344,374,373,343,358,372,327,357,342,311,356,326,1395,1394,1137,1137,1047,1047,1365,1392,1287,1379,1334,1364,1349,1378,1318,1363,792,792,792,792,1152,1152,1032,1032,1121,1121,1046,1046,1120,1120,1030,1030,-2895,1106,1061,1104,849,849,789,789,1091,1076,1029,1090,1060,1075,833,833,309,324,532,532,832,772,818,803,561,561,531,560,515,546,289,274,288,258 };
-    static const int16_t tab15[] = { -250,-1179,-1579,-1836,-1996,-2124,-2253,-2333,-2413,-2477,-2542,-2574,-2607,-2622,-2655,1314,1313,1298,1312,1282,785,785,785,785,1040,1040,1025,1025,768,768,768,768,-766,-798,-830,-862,-895,-911,-927,-943,-959,-975,-991,-1007,-1023,-1039,-1055,-1070,1724,1647,-1103,-1119,1631,1767,1662,1738,1708,1723,-1135,1780,1615,1779,1599,1677,1646,1778,1583,-1151,1777,1567,1737,1692,1765,1722,1707,1630,1751,1661,1764,1614,1736,1676,1763,1750,1645,1598,1721,1691,1762,1706,1582,1761,1566,-1167,1749,1629,767,766,751,765,494,494,735,764,719,749,734,763,447,447,748,718,477,506,431,491,446,476,461,505,415,430,475,445,504,399,460,489,414,503,383,474,429,459,502,502,746,752,488,398,501,473,413,472,486,271,480,270,-1439,-1455,1357,-1471,-1487,-1503,1341,1325,-1519,1489,1463,1403,1309,-1535,1372,1448,1418,1476,1356,1462,1387,-1551,1475,1340,1447,1402,1386,-1567,1068,1068,1474,1461,455,380,468,440,395,425,410,454,364,467,466,464,453,269,409,448,268,432,1371,1473,1432,1417,1308,1460,1355,1446,1459,1431,1083,1083,1401,1416,1458,1445,1067,1067,1370,1457,1051,1051,1291,1430,1385,1444,1354,1415,1400,1443,1082,1082,1173,1113,1186,1066,1185,1050,-1967,1158,1128,1172,1097,1171,1081,-1983,1157,1112,416,266,375,400,1170,1142,1127,1065,793,793,1169,1033,1156,1096,1141,1111,1155,1080,1126,1140,898,898,808,808,897,897,792,792,1095,1152,1032,1125,1110,1139,1079,1124,882,807,838,881,853,791,-2319,867,368,263,822,852,837,866,806,865,-2399,851,352,262,534,534,821,836,594,594,549,549,593,593,533,533,848,773,579,579,564,578,548,563,276,276,577,576,306,291,516,560,305,305,275,259 };
-    static const int16_t tab16[] = { -251,-892,-2058,-2620,-2828,-2957,-3023,-3039,1041,1041,1040,1040,769,769,769,769,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,-511,-527,-543,-559,1530,-575,-591,1528,1527,1407,1526,1391,1023,1023,1023,1023,1525,1375,1268,1268,1103,1103,1087,1087,1039,1039,1523,-604,815,815,815,815,510,495,509,479,508,463,507,447,431,505,415,399,-734,-782,1262,-815,1259,1244,-831,1258,1228,-847,-863,1196,-879,1253,987,987,748,-767,493,493,462,477,414,414,686,669,478,446,461,445,474,429,487,458,412,471,1266,1264,1009,1009,799,799,-1019,-1276,-1452,-1581,-1677,-1757,-1821,-1886,-1933,-1997,1257,1257,1483,1468,1512,1422,1497,1406,1467,1496,1421,1510,1134,1134,1225,1225,1466,1451,1374,1405,1252,1252,1358,1480,1164,1164,1251,1251,1238,1238,1389,1465,-1407,1054,1101,-1423,1207,-1439,830,830,1248,1038,1237,1117,1223,1148,1236,1208,411,426,395,410,379,269,1193,1222,1132,1235,1221,1116,976,976,1192,1162,1177,1220,1131,1191,963,963,-1647,961,780,-1663,558,558,994,993,437,408,393,407,829,978,813,797,947,-1743,721,721,377,392,844,950,828,890,706,706,812,859,796,960,948,843,934,874,571,571,-1919,690,555,689,421,346,539,539,944,779,918,873,932,842,903,888,570,570,931,917,674,674,-2575,1562,-2591,1609,-2607,1654,1322,1322,1441,1441,1696,1546,1683,1593,1669,1624,1426,1426,1321,1321,1639,1680,1425,1425,1305,1305,1545,1668,1608,1623,1667,1592,1638,1666,1320,1320,1652,1607,1409,1409,1304,1304,1288,1288,1664,1637,1395,1395,1335,1335,1622,1636,1394,1394,1319,1319,1606,1621,1392,1392,1137,1137,1137,1137,345,390,360,375,404,373,1047,-2751,-2767,-2783,1062,1121,1046,-2799,1077,-2815,1106,1061,789,789,1105,1104,263,355,310,340,325,354,352,262,339,324,1091,1076,1029,1090,1060,1075,833,833,788,788,1088,1028,818,818,803,803,561,561,531,531,816,771,546,546,289,274,288,258 };
-    static const int16_t tab24[] = { -253,-317,-381,-446,-478,-509,1279,1279,-811,-1179,-1451,-1756,-1900,-2028,-2189,-2253,-2333,-2414,-2445,-2511,-2526,1313,1298,-2559,1041,1041,1040,1040,1025,1025,1024,1024,1022,1007,1021,991,1020,975,1019,959,687,687,1018,1017,671,671,655,655,1016,1015,639,639,758,758,623,623,757,607,756,591,755,575,754,559,543,543,1009,783,-575,-621,-685,-749,496,-590,750,749,734,748,974,989,1003,958,988,973,1002,942,987,957,972,1001,926,986,941,971,956,1000,910,985,925,999,894,970,-1071,-1087,-1102,1390,-1135,1436,1509,1451,1374,-1151,1405,1358,1480,1420,-1167,1507,1494,1389,1342,1465,1435,1450,1326,1505,1310,1493,1373,1479,1404,1492,1464,1419,428,443,472,397,736,526,464,464,486,457,442,471,484,482,1357,1449,1434,1478,1388,1491,1341,1490,1325,1489,1463,1403,1309,1477,1372,1448,1418,1433,1476,1356,1462,1387,-1439,1475,1340,1447,1402,1474,1324,1461,1371,1473,269,448,1432,1417,1308,1460,-1711,1459,-1727,1441,1099,1099,1446,1386,1431,1401,-1743,1289,1083,1083,1160,1160,1458,1445,1067,1067,1370,1457,1307,1430,1129,1129,1098,1098,268,432,267,416,266,400,-1887,1144,1187,1082,1173,1113,1186,1066,1050,1158,1128,1143,1172,1097,1171,1081,420,391,1157,1112,1170,1142,1127,1065,1169,1049,1156,1096,1141,1111,1155,1080,1126,1154,1064,1153,1140,1095,1048,-2159,1125,1110,1137,-2175,823,823,1139,1138,807,807,384,264,368,263,868,838,853,791,867,822,852,837,866,806,865,790,-2319,851,821,836,352,262,850,805,849,-2399,533,533,835,820,336,261,578,548,563,577,532,532,832,772,562,562,547,547,305,275,560,515,290,290,288,258 };
-    static const uint8_t tab32[] = { 130,162,193,209,44,28,76,140,9,9,9,9,9,9,9,9,190,254,222,238,126,94,157,157,109,61,173,205};
-    static const uint8_t tab33[] = { 252,236,220,204,188,172,156,140,124,108,92,76,60,44,28,12 };
-    static const int16_t * const tabindex[2*16] = { tab0,tab1,tab2,tab3,tab0,tab5,tab6,tab7,tab8,tab9,tab10,tab11,tab12,tab13,tab0,tab15,tab16,tab16,tab16,tab16,tab16,tab16,tab16,tab16,tab24,tab24,tab24,tab24,tab24,tab24,tab24,tab24 };
-    static const uint8_t g_linbits[] =  { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,2,3,4,6,8,10,13,4,5,6,7,8,9,11,13 };
+    static const float g_pow43_signed[32] = {
+        0,          0,           1,          -1,          2.519842f,  -2.519842f,  4.326749f,  -4.326749f,
+        6.349604f,  -6.349604f,  8.549880f,  -8.549880f,  10.902724f, -10.902724f, 13.390518f, -13.390518f,
+        16.000000f, -16.000000f, 18.720754f, -18.720754f, 21.544347f, -21.544347f, 24.463781f, -24.463781f,
+        27.473142f, -27.473142f, 30.567351f, -30.567351f, 33.741992f, -33.741992f, 36.993181f, -36.993181f};
+    static const int16_t tab0[32] = {
+        0,
+    };
+    static const int16_t tab1[]  = {785, 785, 785, 785, 784, 784, 784, 784, 513, 513, 513, 513, 513, 513, 513, 513,
+                                   256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256};
+    static const int16_t tab2[]  = {-255, 1313, 1298, 1282, 785, 785, 785, 785, 784, 784, 784, 784,
+                                   769,  769,  769,  769,  256, 256, 256, 256, 256, 256, 256, 256,
+                                   256,  256,  256,  256,  256, 256, 256, 256, 290, 288};
+    static const int16_t tab3[]  = {-255, 1313, 1298, 1282, 769, 769, 769, 769, 529, 529, 529, 529,
+                                   529,  529,  529,  529,  528, 528, 528, 528, 528, 528, 528, 528,
+                                   512,  512,  512,  512,  512, 512, 512, 512, 290, 288};
+    static const int16_t tab5[]  = {-253, -318, -351, -367, 785, 785, 785, 785, 784, 784, 784, 784, 769, 769, 769, 769,
+                                   256,  256,  256,  256,  256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256,
+                                   819,  818,  547,  547,  275, 275, 275, 275, 561, 560, 515, 546, 289, 274, 288, 258};
+    static const int16_t tab6[]  = {-254, -287, 1329, 1299, 1314, 1312, 1057, 1057, 1042, 1042, 1026, 1026, 784,
+                                   784,  784,  784,  529,  529,  529,  529,  529,  529,  529,  529,  769,  769,
+                                   769,  769,  768,  768,  768,  768,  563,  560,  306,  306,  291,  259};
+    static const int16_t tab7[]  = {-252, -413, -477, -542, 1298, -575, 1041, 1041, 784, 784, 784, 784, 769,  769,  769,
+                                   769,  256,  256,  256,  256,  256,  256,  256,  256, 256, 256, 256, 256,  256,  256,
+                                   256,  256,  -383, -399, 1107, 1092, 1106, 1061, 849, 849, 789, 789, 1104, 1091, 773,
+                                   773,  1076, 1075, 341,  340,  325,  309,  834,  804, 577, 577, 532, 532,  516,  516,
+                                   832,  818,  803,  816,  561,  561,  531,  531,  515, 546, 289, 289, 288,  258};
+    static const int16_t tab8[]  = {-252, -429, -493, -559, 1057, 1057, 1042, 1042, 529, 529, 529, 529, 529,  529,  529,
+                                   529,  784,  784,  784,  784,  769,  769,  769,  769, 512, 512, 512, 512,  512,  512,
+                                   512,  512,  -382, 1077, -415, 1106, 1061, 1104, 849, 849, 789, 789, 1091, 1076, 1029,
+                                   1075, 834,  834,  597,  581,  340,  340,  339,  324, 804, 833, 532, 532,  832,  772,
+                                   818,  803,  817,  787,  816,  771,  290,  290,  290, 290, 288, 258};
+    static const int16_t tab9[]  = {-253, -349, -414, -447, -463, 1329, 1299, -479, 1314, 1312, 1057, 1057, 1042,
+                                   1042, 1026, 1026, 785,  785,  785,  785,  784,  784,  784,  784,  769,  769,
+                                   769,  769,  768,  768,  768,  768,  -319, 851,  821,  -335, 836,  850,  805,
+                                   849,  341,  340,  325,  336,  533,  533,  579,  579,  564,  564,  773,  832,
+                                   578,  548,  563,  516,  321,  276,  306,  291,  304,  259};
+    static const int16_t tab10[] = {-251, -572, -733, -830, -863, -879, 1041, 1041, 784,  784,  784,  784,  769,  769,
+                                    769,  769,  256,  256,  256,  256,  256,  256,  256,  256,  256,  256,  256,  256,
+                                    256,  256,  256,  256,  -511, -527, -543, 1396, 1351, 1381, 1366, 1395, 1335, 1380,
+                                    -559, 1334, 1138, 1138, 1063, 1063, 1350, 1392, 1031, 1031, 1062, 1062, 1364, 1363,
+                                    1120, 1120, 1333, 1348, 881,  881,  881,  881,  375,  374,  359,  373,  343,  358,
+                                    341,  325,  791,  791,  1123, 1122, -703, 1105, 1045, -719, 865,  865,  790,  790,
+                                    774,  774,  1104, 1029, 338,  293,  323,  308,  -799, -815, 833,  788,  772,  818,
+                                    803,  816,  322,  292,  307,  320,  561,  531,  515,  546,  289,  274,  288,  258};
+    static const int16_t tab11[] = {-251, -525, -605, -685, -765, -831, -846, 1298, 1057, 1057, 1312, 1282, 785,  785,
+                                    785,  785,  784,  784,  784,  784,  769,  769,  769,  769,  512,  512,  512,  512,
+                                    512,  512,  512,  512,  1399, 1398, 1383, 1367, 1382, 1396, 1351, -511, 1381, 1366,
+                                    1139, 1139, 1079, 1079, 1124, 1124, 1364, 1349, 1363, 1333, 882,  882,  882,  882,
+                                    807,  807,  807,  807,  1094, 1094, 1136, 1136, 373,  341,  535,  535,  881,  775,
+                                    867,  822,  774,  -591, 324,  338,  -671, 849,  550,  550,  866,  864,  609,  609,
+                                    293,  336,  534,  534,  789,  835,  773,  -751, 834,  804,  308,  307,  833,  788,
+                                    832,  772,  562,  562,  547,  547,  305,  275,  560,  515,  290,  290};
+    static const int16_t tab12[] = {-252, -397, -477, -557, -622, -653, -719, -735, -750, 1329, 1299, 1314, 1057, 1057,
+                                    1042, 1042, 1312, 1282, 1024, 1024, 785,  785,  785,  785,  784,  784,  784,  784,
+                                    769,  769,  769,  769,  -383, 1127, 1141, 1111, 1126, 1140, 1095, 1110, 869,  869,
+                                    883,  883,  1079, 1109, 882,  882,  375,  374,  807,  868,  838,  881,  791,  -463,
+                                    867,  822,  368,  263,  852,  837,  836,  -543, 610,  610,  550,  550,  352,  336,
+                                    534,  534,  865,  774,  851,  821,  850,  805,  593,  533,  579,  564,  773,  832,
+                                    578,  578,  548,  548,  577,  577,  307,  276,  306,  291,  516,  560,  259,  259};
+    static const int16_t tab13[] = {
+        -250,  -2107, -2507, -2764, -2909, -2974, -3007, -3023, 1041,  1041,  1040,  1040,  769,   769,   769,   769,
+        256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,
+        -767,  -1052, -1213, -1277, -1358, -1405, -1469, -1535, -1550, -1582, -1614, -1647, -1662, -1694, -1726, -1759,
+        -1774, -1807, -1822, -1854, -1886, 1565,  -1919, -1935, -1951, -1967, 1731,  1730,  1580,  1717,  -1983, 1729,
+        1564,  -1999, 1548,  -2015, -2031, 1715,  1595,  -2047, 1714,  -2063, 1610,  -2079, 1609,  -2095, 1323,  1323,
+        1457,  1457,  1307,  1307,  1712,  1547,  1641,  1700,  1699,  1594,  1685,  1625,  1442,  1442,  1322,  1322,
+        -780,  -973,  -910,  1279,  1278,  1277,  1262,  1276,  1261,  1275,  1215,  1260,  1229,  -959,  974,   974,
+        989,   989,   -943,  735,   478,   478,   495,   463,   506,   414,   -1039, 1003,  958,   1017,  927,   942,
+        987,   957,   431,   476,   1272,  1167,  1228,  -1183, 1256,  -1199, 895,   895,   941,   941,   1242,  1227,
+        1212,  1135,  1014,  1014,  490,   489,   503,   487,   910,   1013,  985,   925,   863,   894,   970,   955,
+        1012,  847,   -1343, 831,   755,   755,   984,   909,   428,   366,   754,   559,   -1391, 752,   486,   457,
+        924,   997,   698,   698,   983,   893,   740,   740,   908,   877,   739,   739,   667,   667,   953,   938,
+        497,   287,   271,   271,   683,   606,   590,   712,   726,   574,   302,   302,   738,   736,   481,   286,
+        526,   725,   605,   711,   636,   724,   696,   651,   589,   681,   666,   710,   364,   467,   573,   695,
+        466,   466,   301,   465,   379,   379,   709,   604,   665,   679,   316,   316,   634,   633,   436,   436,
+        464,   269,   424,   394,   452,   332,   438,   363,   347,   408,   393,   448,   331,   422,   362,   407,
+        392,   421,   346,   406,   391,   376,   375,   359,   1441,  1306,  -2367, 1290,  -2383, 1337,  -2399, -2415,
+        1426,  1321,  -2431, 1411,  1336,  -2447, -2463, -2479, 1169,  1169,  1049,  1049,  1424,  1289,  1412,  1352,
+        1319,  -2495, 1154,  1154,  1064,  1064,  1153,  1153,  416,   390,   360,   404,   403,   389,   344,   374,
+        373,   343,   358,   372,   327,   357,   342,   311,   356,   326,   1395,  1394,  1137,  1137,  1047,  1047,
+        1365,  1392,  1287,  1379,  1334,  1364,  1349,  1378,  1318,  1363,  792,   792,   792,   792,   1152,  1152,
+        1032,  1032,  1121,  1121,  1046,  1046,  1120,  1120,  1030,  1030,  -2895, 1106,  1061,  1104,  849,   849,
+        789,   789,   1091,  1076,  1029,  1090,  1060,  1075,  833,   833,   309,   324,   532,   532,   832,   772,
+        818,   803,   561,   561,   531,   560,   515,   546,   289,   274,   288,   258};
+    static const int16_t tab15[] = {
+        -250,  -1179, -1579, -1836, -1996, -2124, -2253, -2333, -2413, -2477, -2542, -2574, -2607, -2622, -2655, 1314,
+        1313,  1298,  1312,  1282,  785,   785,   785,   785,   1040,  1040,  1025,  1025,  768,   768,   768,   768,
+        -766,  -798,  -830,  -862,  -895,  -911,  -927,  -943,  -959,  -975,  -991,  -1007, -1023, -1039, -1055, -1070,
+        1724,  1647,  -1103, -1119, 1631,  1767,  1662,  1738,  1708,  1723,  -1135, 1780,  1615,  1779,  1599,  1677,
+        1646,  1778,  1583,  -1151, 1777,  1567,  1737,  1692,  1765,  1722,  1707,  1630,  1751,  1661,  1764,  1614,
+        1736,  1676,  1763,  1750,  1645,  1598,  1721,  1691,  1762,  1706,  1582,  1761,  1566,  -1167, 1749,  1629,
+        767,   766,   751,   765,   494,   494,   735,   764,   719,   749,   734,   763,   447,   447,   748,   718,
+        477,   506,   431,   491,   446,   476,   461,   505,   415,   430,   475,   445,   504,   399,   460,   489,
+        414,   503,   383,   474,   429,   459,   502,   502,   746,   752,   488,   398,   501,   473,   413,   472,
+        486,   271,   480,   270,   -1439, -1455, 1357,  -1471, -1487, -1503, 1341,  1325,  -1519, 1489,  1463,  1403,
+        1309,  -1535, 1372,  1448,  1418,  1476,  1356,  1462,  1387,  -1551, 1475,  1340,  1447,  1402,  1386,  -1567,
+        1068,  1068,  1474,  1461,  455,   380,   468,   440,   395,   425,   410,   454,   364,   467,   466,   464,
+        453,   269,   409,   448,   268,   432,   1371,  1473,  1432,  1417,  1308,  1460,  1355,  1446,  1459,  1431,
+        1083,  1083,  1401,  1416,  1458,  1445,  1067,  1067,  1370,  1457,  1051,  1051,  1291,  1430,  1385,  1444,
+        1354,  1415,  1400,  1443,  1082,  1082,  1173,  1113,  1186,  1066,  1185,  1050,  -1967, 1158,  1128,  1172,
+        1097,  1171,  1081,  -1983, 1157,  1112,  416,   266,   375,   400,   1170,  1142,  1127,  1065,  793,   793,
+        1169,  1033,  1156,  1096,  1141,  1111,  1155,  1080,  1126,  1140,  898,   898,   808,   808,   897,   897,
+        792,   792,   1095,  1152,  1032,  1125,  1110,  1139,  1079,  1124,  882,   807,   838,   881,   853,   791,
+        -2319, 867,   368,   263,   822,   852,   837,   866,   806,   865,   -2399, 851,   352,   262,   534,   534,
+        821,   836,   594,   594,   549,   549,   593,   593,   533,   533,   848,   773,   579,   579,   564,   578,
+        548,   563,   276,   276,   577,   576,   306,   291,   516,   560,   305,   305,   275,   259};
+    static const int16_t tab16[] = {
+        -251,  -892,  -2058, -2620, -2828, -2957, -3023, -3039, 1041,  1041,  1040,  1040,  769,   769,   769,   769,
+        256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,   256,
+        -511,  -527,  -543,  -559,  1530,  -575,  -591,  1528,  1527,  1407,  1526,  1391,  1023,  1023,  1023,  1023,
+        1525,  1375,  1268,  1268,  1103,  1103,  1087,  1087,  1039,  1039,  1523,  -604,  815,   815,   815,   815,
+        510,   495,   509,   479,   508,   463,   507,   447,   431,   505,   415,   399,   -734,  -782,  1262,  -815,
+        1259,  1244,  -831,  1258,  1228,  -847,  -863,  1196,  -879,  1253,  987,   987,   748,   -767,  493,   493,
+        462,   477,   414,   414,   686,   669,   478,   446,   461,   445,   474,   429,   487,   458,   412,   471,
+        1266,  1264,  1009,  1009,  799,   799,   -1019, -1276, -1452, -1581, -1677, -1757, -1821, -1886, -1933, -1997,
+        1257,  1257,  1483,  1468,  1512,  1422,  1497,  1406,  1467,  1496,  1421,  1510,  1134,  1134,  1225,  1225,
+        1466,  1451,  1374,  1405,  1252,  1252,  1358,  1480,  1164,  1164,  1251,  1251,  1238,  1238,  1389,  1465,
+        -1407, 1054,  1101,  -1423, 1207,  -1439, 830,   830,   1248,  1038,  1237,  1117,  1223,  1148,  1236,  1208,
+        411,   426,   395,   410,   379,   269,   1193,  1222,  1132,  1235,  1221,  1116,  976,   976,   1192,  1162,
+        1177,  1220,  1131,  1191,  963,   963,   -1647, 961,   780,   -1663, 558,   558,   994,   993,   437,   408,
+        393,   407,   829,   978,   813,   797,   947,   -1743, 721,   721,   377,   392,   844,   950,   828,   890,
+        706,   706,   812,   859,   796,   960,   948,   843,   934,   874,   571,   571,   -1919, 690,   555,   689,
+        421,   346,   539,   539,   944,   779,   918,   873,   932,   842,   903,   888,   570,   570,   931,   917,
+        674,   674,   -2575, 1562,  -2591, 1609,  -2607, 1654,  1322,  1322,  1441,  1441,  1696,  1546,  1683,  1593,
+        1669,  1624,  1426,  1426,  1321,  1321,  1639,  1680,  1425,  1425,  1305,  1305,  1545,  1668,  1608,  1623,
+        1667,  1592,  1638,  1666,  1320,  1320,  1652,  1607,  1409,  1409,  1304,  1304,  1288,  1288,  1664,  1637,
+        1395,  1395,  1335,  1335,  1622,  1636,  1394,  1394,  1319,  1319,  1606,  1621,  1392,  1392,  1137,  1137,
+        1137,  1137,  345,   390,   360,   375,   404,   373,   1047,  -2751, -2767, -2783, 1062,  1121,  1046,  -2799,
+        1077,  -2815, 1106,  1061,  789,   789,   1105,  1104,  263,   355,   310,   340,   325,   354,   352,   262,
+        339,   324,   1091,  1076,  1029,  1090,  1060,  1075,  833,   833,   788,   788,   1088,  1028,  818,   818,
+        803,   803,   561,   561,   531,   531,   816,   771,   546,   546,   289,   274,   288,   258};
+    static const int16_t tab24[] = {
+        -253,  -317,  -381,  -446,  -478,  -509, 1279,  1279,  -811,  -1179, -1451, -1756, -1900, -2028, -2189, -2253,
+        -2333, -2414, -2445, -2511, -2526, 1313, 1298,  -2559, 1041,  1041,  1040,  1040,  1025,  1025,  1024,  1024,
+        1022,  1007,  1021,  991,   1020,  975,  1019,  959,   687,   687,   1018,  1017,  671,   671,   655,   655,
+        1016,  1015,  639,   639,   758,   758,  623,   623,   757,   607,   756,   591,   755,   575,   754,   559,
+        543,   543,   1009,  783,   -575,  -621, -685,  -749,  496,   -590,  750,   749,   734,   748,   974,   989,
+        1003,  958,   988,   973,   1002,  942,  987,   957,   972,   1001,  926,   986,   941,   971,   956,   1000,
+        910,   985,   925,   999,   894,   970,  -1071, -1087, -1102, 1390,  -1135, 1436,  1509,  1451,  1374,  -1151,
+        1405,  1358,  1480,  1420,  -1167, 1507, 1494,  1389,  1342,  1465,  1435,  1450,  1326,  1505,  1310,  1493,
+        1373,  1479,  1404,  1492,  1464,  1419, 428,   443,   472,   397,   736,   526,   464,   464,   486,   457,
+        442,   471,   484,   482,   1357,  1449, 1434,  1478,  1388,  1491,  1341,  1490,  1325,  1489,  1463,  1403,
+        1309,  1477,  1372,  1448,  1418,  1433, 1476,  1356,  1462,  1387,  -1439, 1475,  1340,  1447,  1402,  1474,
+        1324,  1461,  1371,  1473,  269,   448,  1432,  1417,  1308,  1460,  -1711, 1459,  -1727, 1441,  1099,  1099,
+        1446,  1386,  1431,  1401,  -1743, 1289, 1083,  1083,  1160,  1160,  1458,  1445,  1067,  1067,  1370,  1457,
+        1307,  1430,  1129,  1129,  1098,  1098, 268,   432,   267,   416,   266,   400,   -1887, 1144,  1187,  1082,
+        1173,  1113,  1186,  1066,  1050,  1158, 1128,  1143,  1172,  1097,  1171,  1081,  420,   391,   1157,  1112,
+        1170,  1142,  1127,  1065,  1169,  1049, 1156,  1096,  1141,  1111,  1155,  1080,  1126,  1154,  1064,  1153,
+        1140,  1095,  1048,  -2159, 1125,  1110, 1137,  -2175, 823,   823,   1139,  1138,  807,   807,   384,   264,
+        368,   263,   868,   838,   853,   791,  867,   822,   852,   837,   866,   806,   865,   790,   -2319, 851,
+        821,   836,   352,   262,   850,   805,  849,   -2399, 533,   533,   835,   820,   336,   261,   578,   548,
+        563,   577,   532,   532,   832,   772,  562,   562,   547,   547,   305,   275,   560,   515,   290,   290,
+        288,   258};
+    static const uint8_t tab32[] = {130, 162, 193, 209, 44,  28,  76,  140, 9,   9,   9,   9,  9,   9,
+                                    9,   9,   190, 254, 222, 238, 126, 94,  157, 157, 109, 61, 173, 205};
+    static const uint8_t tab33[] = {252, 236, 220, 204, 188, 172, 156, 140, 124, 108, 92, 76, 60, 44, 28, 12};
+    static const int16_t *const tabindex[2 * 16] = {
+        tab0,  tab1,  tab2,  tab3,  tab0,  tab5,  tab6,  tab7,  tab8,  tab9,  tab10, tab11, tab12, tab13, tab0,  tab15,
+        tab16, tab16, tab16, tab16, tab16, tab16, tab16, tab16, tab24, tab24, tab24, tab24, tab24, tab24, tab24, tab24};
+    static const uint8_t g_linbits[] = {0, 0, 0, 0, 0, 0, 0,  0,  0, 0, 0, 0, 0, 0, 0,  0,
+                                        1, 2, 3, 4, 6, 8, 10, 13, 4, 5, 6, 7, 8, 9, 11, 13};
 
-#define PEEK_BITS(n)    (bs_cache >> (32 - n))
-#define FLUSH_BITS(n)   {bs_cache <<= (n); bs_sh += (n);}
-#define CHECK_BITS      while (bs_sh >= 0) { bs_cache |= (uint32_t)*bs_next_ptr++ << bs_sh; bs_sh -= 8; }
-#define BSPOS           ((bs_next_ptr - bs->buf)*8 - 24 + bs_sh)
+#define PEEK_BITS(n) (bs_cache >> (32 - n))
+#define FLUSH_BITS(n)                                                                                                  \
+    {                                                                                                                  \
+        bs_cache <<= (n);                                                                                              \
+        bs_sh += (n);                                                                                                  \
+    }
+#define CHECK_BITS                                                                                                     \
+    while (bs_sh >= 0) {                                                                                               \
+        bs_cache |= (uint32_t)*bs_next_ptr++ << bs_sh;                                                                 \
+        bs_sh -= 8;                                                                                                    \
+    }
+#define BSPOS ((bs_next_ptr - bs->buf) * 8 - 24 + bs_sh)
 
     float one = 0.0f;
     int ireg = 0, big_val_cnt = gr_info->big_values;
-    const uint8_t *sfb = gr_info->sfbtab;
-    const uint8_t *bs_next_ptr = bs->buf + bs->pos/8;
-    uint32_t bs_cache = (((bs_next_ptr[0]*256u + bs_next_ptr[1])*256u + bs_next_ptr[2])*256u + bs_next_ptr[3]) << (bs->pos & 7);
+    const uint8_t *sfb         = gr_info->sfbtab;
+    const uint8_t *bs_next_ptr = bs->buf + bs->pos / 8;
+    uint32_t bs_cache = (((bs_next_ptr[0] * 256u + bs_next_ptr[1]) * 256u + bs_next_ptr[2]) * 256u + bs_next_ptr[3])
+                        << (bs->pos & 7);
     int pairs_to_decode, np, bs_sh = (bs->pos & 7) - 8;
     bs_next_ptr += 4;
 
-    while (big_val_cnt > 0)
-    {
-        int tab_num = gr_info->table_select[ireg];
-        int sfb_cnt = gr_info->region_count[ireg++];
-        const short * codebook = tabindex[tab_num];
-        int linbits = g_linbits[tab_num];
-        do
-        {
-            np = *sfb++ / 2;
+    while (big_val_cnt > 0) {
+        int tab_num           = gr_info->table_select[ireg];
+        int sfb_cnt           = gr_info->region_count[ireg++];
+        const short *codebook = tabindex[tab_num];
+        int linbits           = g_linbits[tab_num];
+        do {
+            np              = *sfb++ / 2;
             pairs_to_decode = MINIMP3_MIN(big_val_cnt, np);
-            one = *scf++;
-            do
-            {
+            one             = *scf++;
+            do {
                 int j, w = 5;
                 int leaf = codebook[PEEK_BITS(w)];
-                while (leaf < 0)
-                {
+                while (leaf < 0) {
                     FLUSH_BITS(w);
-                    w = leaf & 7;
+                    w    = leaf & 7;
                     leaf = codebook[PEEK_BITS(w) - (leaf >> 3)];
                 }
                 FLUSH_BITS(leaf >> 8);
 
-                for (j = 0; j < 2; j++, dst++, leaf >>= 4)
-                {
+                for (j = 0; j < 2; j++, dst++, leaf >>= 4) {
                     int lsb = leaf & 0x0F;
-                    if (lsb)
-                    {
-                        if (lsb == 15 && linbits)
-                        {
+                    if (lsb) {
+                        if (lsb == 15 && linbits) {
                             lsb += PEEK_BITS(linbits);
                             FLUSH_BITS(linbits);
                             CHECK_BITS;
-                            *dst = one*L3_pow_43(lsb)*((int32_t)bs_cache < 0 ? -1: 1);
-                        } else
-                        {
-                            *dst = g_pow43_signed[lsb*2 + (bs_cache >> 31)]*one;
+                            *dst = one * L3_pow_43(lsb) * ((int32_t)bs_cache < 0 ? -1 : 1);
+                        }
+                        else {
+                            *dst = g_pow43_signed[lsb * 2 + (bs_cache >> 31)] * one;
                         }
                         FLUSH_BITS(1);
                     }
                 }
                 CHECK_BITS;
             } while (--pairs_to_decode);
-        } while ((big_val_cnt -= np) > 0 && --sfb_cnt >= 0 );
+        } while ((big_val_cnt -= np) > 0 && --sfb_cnt >= 0);
     }
 
-    for (np = 1 - big_val_cnt;; dst += 4)
-    {
+    for (np = 1 - big_val_cnt;; dst += 4) {
         const uint8_t *codebook_count1 = (gr_info->count1_table) ? tab33 : tab32;
-        int leaf = codebook_count1[PEEK_BITS(4)];
-        if (!(leaf & 8))
-        {
+        int leaf                       = codebook_count1[PEEK_BITS(4)];
+        if (!(leaf & 8)) {
             leaf = codebook_count1[(leaf >> 3) + (bs_cache << 4 >> (32 - (leaf & 3)))];
         }
         FLUSH_BITS(leaf & 7);
-        if (BSPOS > layer3gr_limit)
-        {
+        if (BSPOS > layer3gr_limit) {
             break;
         }
-#define RELOAD_SCALEFACTOR  if (!--np) {np = *sfb++/2; if (!np) break; one = *scf++;}
-#define DEQ_COUNT1(s) if (leaf & (128 >> s)) {dst[s] = ((int32_t)bs_cache < 0) ? -one : one; FLUSH_BITS(1)}
+#define RELOAD_SCALEFACTOR                                                                                             \
+    if (!--np) {                                                                                                       \
+        np = *sfb++ / 2;                                                                                               \
+        if (!np)                                                                                                       \
+            break;                                                                                                     \
+        one = *scf++;                                                                                                  \
+    }
+#define DEQ_COUNT1(s)                                                                                                  \
+    if (leaf & (128 >> s)) {                                                                                           \
+        dst[s] = ((int32_t)bs_cache < 0) ? -one : one;                                                                 \
+        FLUSH_BITS(1)                                                                                                  \
+    }
         RELOAD_SCALEFACTOR;
         DEQ_COUNT1(0);
         DEQ_COUNT1(1);
@@ -862,22 +1015,21 @@ static void L3_huffman(float *dst, bs_t *bs, const L3_gr_info_t *gr_info, const
 
 static void L3_midside_stereo(float *left, int n)
 {
-    int i = 0;
+    int i        = 0;
     float *right = left + 576;
 #if HAVE_SIMD
-    if (have_simd()) for (; i < n - 3; i += 4)
-    {
-        f4 vl = VLD(left + i);
-        f4 vr = VLD(right + i);
-        VSTORE(left + i, VADD(vl, vr));
-        VSTORE(right + i, VSUB(vl, vr));
-    }
+    if (have_simd())
+        for (; i < n - 3; i += 4) {
+            f4 vl = VLD(left + i);
+            f4 vr = VLD(right + i);
+            VSTORE(left + i, VADD(vl, vr));
+            VSTORE(right + i, VSUB(vl, vr));
+        }
 #endif
-    for (; i < n; i++)
-    {
-        float a = left[i];
-        float b = right[i];
-        left[i] = a + b;
+    for (; i < n; i++) {
+        float a  = left[i];
+        float b  = right[i];
+        left[i]  = a + b;
         right[i] = a - b;
     }
 }
@@ -885,10 +1037,9 @@ static void L3_midside_stereo(float *left, int n)
 static void L3_intensity_stereo_band(float *left, int n, float kl, float kr)
 {
     int i;
-    for (i = 0; i < n; i++)
-    {
-        left[i + 576] = left[i]*kr;
-        left[i] = left[i]*kl;
+    for (i = 0; i < n; i++) {
+        left[i + 576] = left[i] * kr;
+        left[i]       = left[i] * kl;
     }
 }
 
@@ -898,12 +1049,9 @@ static void L3_stereo_top_band(const float *right, const uint8_t *sfb, int nband
 
     max_band[0] = max_band[1] = max_band[2] = -1;
 
-    for (i = 0; i < nbands; i++)
-    {
-        for (k = 0; k < sfb[i]; k += 2)
-        {
-            if (right[k] != 0 || right[k + 1] != 0)
-            {
+    for (i = 0; i < nbands; i++) {
+        for (k = 0; k < sfb[i]; k += 2) {
+            if (right[k] != 0 || right[k + 1] != 0) {
                 max_band[i % 3] = i;
                 break;
             }
@@ -912,34 +1060,44 @@ static void L3_stereo_top_band(const float *right, const uint8_t *sfb, int nband
     }
 }
 
-static void L3_stereo_process(float *left, const uint8_t *ist_pos, const uint8_t *sfb, const uint8_t *hdr, int max_band[3], int mpeg2_sh)
+static void L3_stereo_process(
+    float *left, const uint8_t *ist_pos, const uint8_t *sfb, const uint8_t *hdr, int max_band[3], int mpeg2_sh)
 {
-    static const float g_pan[7*2] = { 0,1,0.21132487f,0.78867513f,0.36602540f,0.63397460f,0.5f,0.5f,0.63397460f,0.36602540f,0.78867513f,0.21132487f,1,0 };
+    static const float g_pan[7 * 2] = {0,
+                                       1,
+                                       0.21132487f,
+                                       0.78867513f,
+                                       0.36602540f,
+                                       0.63397460f,
+                                       0.5f,
+                                       0.5f,
+                                       0.63397460f,
+                                       0.36602540f,
+                                       0.78867513f,
+                                       0.21132487f,
+                                       1,
+                                       0};
     unsigned i, max_pos = HDR_TEST_MPEG1(hdr) ? 7 : 64;
 
-    for (i = 0; sfb[i]; i++)
-    {
+    for (i = 0; sfb[i]; i++) {
         unsigned ipos = ist_pos[i];
-        if ((int)i > max_band[i % 3] && ipos < max_pos)
-        {
+        if ((int)i > max_band[i % 3] && ipos < max_pos) {
             float kl, kr, s = HDR_TEST_MS_STEREO(hdr) ? 1.41421356f : 1;
-            if (HDR_TEST_MPEG1(hdr))
-            {
-                kl = g_pan[2*ipos];
-                kr = g_pan[2*ipos + 1];
-            } else
-            {
+            if (HDR_TEST_MPEG1(hdr)) {
+                kl = g_pan[2 * ipos];
+                kr = g_pan[2 * ipos + 1];
+            }
+            else {
                 kl = 1;
                 kr = L3_ldexp_q2(1, (ipos + 1) >> 1 << mpeg2_sh);
-                if (ipos & 1)
-                {
+                if (ipos & 1) {
                     kl = kr;
                     kr = 1;
                 }
             }
-            L3_intensity_stereo_band(left, sfb[i], kl*s, kr*s);
-        } else if (HDR_TEST_MS_STEREO(hdr))
-        {
+            L3_intensity_stereo_band(left, sfb[i], kl * s, kr * s);
+        }
+        else if (HDR_TEST_MS_STEREO(hdr)) {
             L3_midside_stereo(left, sfb[i]);
         }
         left += sfb[i];
@@ -949,21 +1107,19 @@ static void L3_stereo_process(float *left, const uint8_t *ist_pos, const uint8_t
 static void L3_intensity_stereo(float *left, uint8_t *ist_pos, const L3_gr_info_t *gr, const uint8_t *hdr)
 {
     int max_band[3], n_sfb = gr->n_long_sfb + gr->n_short_sfb;
-    int i, max_blocks = gr->n_short_sfb ? 3 : 1;
+    int i, max_blocks      = gr->n_short_sfb ? 3 : 1;
 
     L3_stereo_top_band(left + 576, gr->sfbtab, n_sfb, max_band);
-    if (gr->n_long_sfb)
-    {
+    if (gr->n_long_sfb) {
         max_band[0] = max_band[1] = max_band[2] = MINIMP3_MAX(MINIMP3_MAX(max_band[0], max_band[1]), max_band[2]);
     }
-    for (i = 0; i < max_blocks; i++)
-    {
+    for (i = 0; i < max_blocks; i++) {
         int default_pos = HDR_TEST_MPEG1(hdr) ? 3 : 0;
-        int itop = n_sfb - max_blocks + i;
-        int prev = itop - max_blocks;
-        ist_pos[itop] = max_band[i] >= prev ? default_pos : ist_pos[prev];
+        int itop        = n_sfb - max_blocks + i;
+        int prev        = itop - max_blocks;
+        ist_pos[itop]   = max_band[i] >= prev ? default_pos : ist_pos[prev];
     }
-    L3_stereo_process(left, ist_pos, gr->sfbtab, hdr, max_band, gr[1].scalefac_compress&1);
+    L3_stereo_process(left, ist_pos, gr->sfbtab, hdr, max_band, gr[1].scalefac_compress & 1);
 }
 
 static void L3_reorder(float *grbuf, float *scratch, const uint8_t *sfb)
@@ -971,13 +1127,11 @@ static void L3_reorder(float *grbuf, float *scratch, const uint8_t *sfb)
     int i, len;
     float *src = grbuf, *dst = scratch;
 
-    for (;0 != (len = *sfb); sfb += 3, src += 2*len)
-    {
-        for (i = 0; i < len; i++, src++)
-        {
-            *dst++ = src[0*len];
-            *dst++ = src[1*len];
-            *dst++ = src[2*len];
+    for (; 0 != (len = *sfb); sfb += 3, src += 2 * len) {
+        for (i = 0; i < len; i++, src++) {
+            *dst++ = src[0 * len];
+            *dst++ = src[1 * len];
+            *dst++ = src[2 * len];
         }
     }
     memcpy(grbuf, scratch, (dst - scratch) * sizeof(float));
@@ -986,33 +1140,30 @@ static void L3_reorder(float *grbuf, float *scratch, const uint8_t *sfb)
 static void L3_antialias(float *grbuf, int nbands)
 {
     static const float g_aa[2][8] = {
-        {0.85749293f,0.88174200f,0.94962865f,0.98331459f,0.99551782f,0.99916056f,0.99989920f,0.99999316f},
-        {0.51449576f,0.47173197f,0.31337745f,0.18191320f,0.09457419f,0.04096558f,0.01419856f,0.00369997f}
-    };
+        {0.85749293f, 0.88174200f, 0.94962865f, 0.98331459f, 0.99551782f, 0.99916056f, 0.99989920f, 0.99999316f},
+        {0.51449576f, 0.47173197f, 0.31337745f, 0.18191320f, 0.09457419f, 0.04096558f, 0.01419856f, 0.00369997f}};
 
-    for (; nbands > 0; nbands--, grbuf += 18)
-    {
+    for (; nbands > 0; nbands--, grbuf += 18) {
         int i = 0;
 #if HAVE_SIMD
-        if (have_simd()) for (; i < 8; i += 4)
-        {
-            f4 vu = VLD(grbuf + 18 + i);
-            f4 vd = VLD(grbuf + 14 - i);
-            f4 vc0 = VLD(g_aa[0] + i);
-            f4 vc1 = VLD(g_aa[1] + i);
-            vd = VREV(vd);
-            VSTORE(grbuf + 18 + i, VSUB(VMUL(vu, vc0), VMUL(vd, vc1)));
-            vd = VADD(VMUL(vu, vc1), VMUL(vd, vc0));
-            VSTORE(grbuf + 14 - i, VREV(vd));
-        }
+        if (have_simd())
+            for (; i < 8; i += 4) {
+                f4 vu  = VLD(grbuf + 18 + i);
+                f4 vd  = VLD(grbuf + 14 - i);
+                f4 vc0 = VLD(g_aa[0] + i);
+                f4 vc1 = VLD(g_aa[1] + i);
+                vd     = VREV(vd);
+                VSTORE(grbuf + 18 + i, VSUB(VMUL(vu, vc0), VMUL(vd, vc1)));
+                vd = VADD(VMUL(vu, vc1), VMUL(vd, vc0));
+                VSTORE(grbuf + 14 - i, VREV(vd));
+            }
 #endif
 #ifndef MINIMP3_ONLY_SIMD
-        for(; i < 8; i++)
-        {
-            float u = grbuf[18 + i];
-            float d = grbuf[17 - i];
-            grbuf[18 + i] = u*g_aa[0][i] - d*g_aa[1][i];
-            grbuf[17 - i] = u*g_aa[1][i] + d*g_aa[0][i];
+        for (; i < 8; i++) {
+            float u       = grbuf[18 + i];
+            float d       = grbuf[17 - i];
+            grbuf[18 + i] = u * g_aa[0][i] - d * g_aa[1][i];
+            grbuf[17 - i] = u * g_aa[1][i] + d * g_aa[0][i];
         }
 #endif
     }
@@ -1022,27 +1173,34 @@ static void L3_dct3_9(float *y)
 {
     float s0, s1, s2, s3, s4, s5, s6, s7, s8, t0, t2, t4;
 
-    s0 = y[0]; s2 = y[2]; s4 = y[4]; s6 = y[6]; s8 = y[8];
-    t0 = s0 + s6*0.5f;
+    s0 = y[0];
+    s2 = y[2];
+    s4 = y[4];
+    s6 = y[6];
+    s8 = y[8];
+    t0 = s0 + s6 * 0.5f;
     s0 -= s6;
-    t4 = (s4 + s2)*0.93969262f;
-    t2 = (s8 + s2)*0.76604444f;
-    s6 = (s4 - s8)*0.17364818f;
+    t4 = (s4 + s2) * 0.93969262f;
+    t2 = (s8 + s2) * 0.76604444f;
+    s6 = (s4 - s8) * 0.17364818f;
     s4 += s8 - s2;
 
-    s2 = s0 - s4*0.5f;
+    s2   = s0 - s4 * 0.5f;
     y[4] = s4 + s0;
-    s8 = t0 - t2 + s6;
-    s0 = t0 - t4 + t2;
-    s4 = t0 + t4 - s6;
+    s8   = t0 - t2 + s6;
+    s0   = t0 - t4 + t2;
+    s4   = t0 + t4 - s6;
 
-    s1 = y[1]; s3 = y[3]; s5 = y[5]; s7 = y[7];
+    s1 = y[1];
+    s3 = y[3];
+    s5 = y[5];
+    s7 = y[7];
 
     s3 *= 0.86602540f;
-    t0 = (s5 + s1)*0.98480775f;
-    t4 = (s5 - s7)*0.34202014f;
-    t2 = (s1 + s7)*0.64278761f;
-    s1 = (s1 - s5 - s7)*0.86602540f;
+    t0 = (s5 + s1) * 0.98480775f;
+    t4 = (s5 - s7) * 0.34202014f;
+    t2 = (s1 + s7) * 0.64278761f;
+    s1 = (s1 - s5 - s7) * 0.86602540f;
 
     s5 = t0 - s3 - t2;
     s7 = t4 - s3 - t0;
@@ -1061,21 +1219,34 @@ static void L3_dct3_9(float *y)
 static void L3_imdct36(float *grbuf, float *overlap, const float *window, int nbands)
 {
     int i, j;
-    static const float g_twid9[18] = {
-        0.73727734f,0.79335334f,0.84339145f,0.88701083f,0.92387953f,0.95371695f,0.97629601f,0.99144486f,0.99904822f,0.67559021f,0.60876143f,0.53729961f,0.46174861f,0.38268343f,0.30070580f,0.21643961f,0.13052619f,0.04361938f
-    };
+    static const float g_twid9[18] = {0.73727734f,
+                                      0.79335334f,
+                                      0.84339145f,
+                                      0.88701083f,
+                                      0.92387953f,
+                                      0.95371695f,
+                                      0.97629601f,
+                                      0.99144486f,
+                                      0.99904822f,
+                                      0.67559021f,
+                                      0.60876143f,
+                                      0.53729961f,
+                                      0.46174861f,
+                                      0.38268343f,
+                                      0.30070580f,
+                                      0.21643961f,
+                                      0.13052619f,
+                                      0.04361938f};
 
-    for (j = 0; j < nbands; j++, grbuf += 18, overlap += 9)
-    {
+    for (j = 0; j < nbands; j++, grbuf += 18, overlap += 9) {
         float co[9], si[9];
         co[0] = -grbuf[0];
         si[0] = grbuf[17];
-        for (i = 0; i < 4; i++)
-        {
-            si[8 - 2*i] =   grbuf[4*i + 1] - grbuf[4*i + 2];
-            co[1 + 2*i] =   grbuf[4*i + 1] + grbuf[4*i + 2];
-            si[7 - 2*i] =   grbuf[4*i + 4] - grbuf[4*i + 3];
-            co[2 + 2*i] = -(grbuf[4*i + 3] + grbuf[4*i + 4]);
+        for (i = 0; i < 4; i++) {
+            si[8 - 2 * i] = grbuf[4 * i + 1] - grbuf[4 * i + 2];
+            co[1 + 2 * i] = grbuf[4 * i + 1] + grbuf[4 * i + 2];
+            si[7 - 2 * i] = grbuf[4 * i + 4] - grbuf[4 * i + 3];
+            co[2 + 2 * i] = -(grbuf[4 * i + 3] + grbuf[4 * i + 4]);
         }
         L3_dct3_9(co);
         L3_dct3_9(si);
@@ -1088,45 +1259,44 @@ static void L3_imdct36(float *grbuf, float *overlap, const float *window, int nb
         i = 0;
 
 #if HAVE_SIMD
-        if (have_simd()) for (; i < 8; i += 4)
-        {
-            f4 vovl = VLD(overlap + i);
-            f4 vc = VLD(co + i);
-            f4 vs = VLD(si + i);
-            f4 vr0 = VLD(g_twid9 + i);
-            f4 vr1 = VLD(g_twid9 + 9 + i);
-            f4 vw0 = VLD(window + i);
-            f4 vw1 = VLD(window + 9 + i);
-            f4 vsum = VADD(VMUL(vc, vr1), VMUL(vs, vr0));
-            VSTORE(overlap + i, VSUB(VMUL(vc, vr0), VMUL(vs, vr1)));
-            VSTORE(grbuf + i, VSUB(VMUL(vovl, vw0), VMUL(vsum, vw1)));
-            vsum = VADD(VMUL(vovl, vw1), VMUL(vsum, vw0));
-            VSTORE(grbuf + 14 - i, VREV(vsum));
-        }
+        if (have_simd())
+            for (; i < 8; i += 4) {
+                f4 vovl = VLD(overlap + i);
+                f4 vc   = VLD(co + i);
+                f4 vs   = VLD(si + i);
+                f4 vr0  = VLD(g_twid9 + i);
+                f4 vr1  = VLD(g_twid9 + 9 + i);
+                f4 vw0  = VLD(window + i);
+                f4 vw1  = VLD(window + 9 + i);
+                f4 vsum = VADD(VMUL(vc, vr1), VMUL(vs, vr0));
+                VSTORE(overlap + i, VSUB(VMUL(vc, vr0), VMUL(vs, vr1)));
+                VSTORE(grbuf + i, VSUB(VMUL(vovl, vw0), VMUL(vsum, vw1)));
+                vsum = VADD(VMUL(vovl, vw1), VMUL(vsum, vw0));
+                VSTORE(grbuf + 14 - i, VREV(vsum));
+            }
 #endif
-        for (; i < 9; i++)
-        {
-            float ovl  = overlap[i];
-            float sum  = co[i]*g_twid9[9 + i] + si[i]*g_twid9[0 + i];
-            overlap[i] = co[i]*g_twid9[0 + i] - si[i]*g_twid9[9 + i];
-            grbuf[i]      = ovl*window[0 + i] - sum*window[9 + i];
-            grbuf[17 - i] = ovl*window[9 + i] + sum*window[0 + i];
+        for (; i < 9; i++) {
+            float ovl     = overlap[i];
+            float sum     = co[i] * g_twid9[9 + i] + si[i] * g_twid9[0 + i];
+            overlap[i]    = co[i] * g_twid9[0 + i] - si[i] * g_twid9[9 + i];
+            grbuf[i]      = ovl * window[0 + i] - sum * window[9 + i];
+            grbuf[17 - i] = ovl * window[9 + i] + sum * window[0 + i];
         }
     }
 }
 
 static void L3_idct3(float x0, float x1, float x2, float *dst)
 {
-    float m1 = x1*0.86602540f;
-    float a1 = x0 - x2*0.5f;
-    dst[1] = x0 + x2;
-    dst[0] = a1 + m1;
-    dst[2] = a1 - m1;
+    float m1 = x1 * 0.86602540f;
+    float a1 = x0 - x2 * 0.5f;
+    dst[1]   = x0 + x2;
+    dst[0]   = a1 + m1;
+    dst[2]   = a1 - m1;
 }
 
 static void L3_imdct12(float *x, float *dst, float *overlap)
 {
-    static const float g_twid3[6] = { 0.79335334f,0.92387953f,0.99144486f, 0.60876143f,0.38268343f,0.13052619f };
+    static const float g_twid3[6] = {0.79335334f, 0.92387953f, 0.99144486f, 0.60876143f, 0.38268343f, 0.13052619f};
     float co[3], si[3];
     int i;
 
@@ -1134,23 +1304,21 @@ static void L3_imdct12(float *x, float *dst, float *overlap)
     L3_idct3(x[15], x[12] - x[9], x[6] - x[3], si);
     si[1] = -si[1];
 
-    for (i = 0; i < 3; i++)
-    {
+    for (i = 0; i < 3; i++) {
         float ovl  = overlap[i];
-        float sum  = co[i]*g_twid3[3 + i] + si[i]*g_twid3[0 + i];
-        overlap[i] = co[i]*g_twid3[0 + i] - si[i]*g_twid3[3 + i];
-        dst[i]     = ovl*g_twid3[2 - i] - sum*g_twid3[5 - i];
-        dst[5 - i] = ovl*g_twid3[5 - i] + sum*g_twid3[2 - i];
+        float sum  = co[i] * g_twid3[3 + i] + si[i] * g_twid3[0 + i];
+        overlap[i] = co[i] * g_twid3[0 + i] - si[i] * g_twid3[3 + i];
+        dst[i]     = ovl * g_twid3[2 - i] - sum * g_twid3[5 - i];
+        dst[5 - i] = ovl * g_twid3[5 - i] + sum * g_twid3[2 - i];
     }
 }
 
 static void L3_imdct_short(float *grbuf, float *overlap, int nbands)
 {
-    for (;nbands > 0; nbands--, overlap += 9, grbuf += 18)
-    {
+    for (; nbands > 0; nbands--, overlap += 9, grbuf += 18) {
         float tmp[18];
         memcpy(tmp, grbuf, sizeof(tmp));
-        memcpy(grbuf, overlap, 6*sizeof(float));
+        memcpy(grbuf, overlap, 6 * sizeof(float));
         L3_imdct12(tmp, grbuf + 6, overlap + 6);
         L3_imdct12(tmp + 1, grbuf + 12, overlap + 6);
         L3_imdct12(tmp + 2, overlap, overlap + 6);
@@ -1167,15 +1335,46 @@ static void L3_change_sign(float *grbuf)
 
 static void L3_imdct_gr(float *grbuf, float *overlap, unsigned block_type, unsigned n_long_bands)
 {
-    static const float g_mdct_window[2][18] = {
-        { 0.99904822f,0.99144486f,0.97629601f,0.95371695f,0.92387953f,0.88701083f,0.84339145f,0.79335334f,0.73727734f,0.04361938f,0.13052619f,0.21643961f,0.30070580f,0.38268343f,0.46174861f,0.53729961f,0.60876143f,0.67559021f },
-        { 1,1,1,1,1,1,0.99144486f,0.92387953f,0.79335334f,0,0,0,0,0,0,0.13052619f,0.38268343f,0.60876143f }
-    };
-    if (n_long_bands)
-    {
+    static const float g_mdct_window[2][18] = {{0.99904822f,
+                                                0.99144486f,
+                                                0.97629601f,
+                                                0.95371695f,
+                                                0.92387953f,
+                                                0.88701083f,
+                                                0.84339145f,
+                                                0.79335334f,
+                                                0.73727734f,
+                                                0.04361938f,
+                                                0.13052619f,
+                                                0.21643961f,
+                                                0.30070580f,
+                                                0.38268343f,
+                                                0.46174861f,
+                                                0.53729961f,
+                                                0.60876143f,
+                                                0.67559021f},
+                                               {1,
+                                                1,
+                                                1,
+                                                1,
+                                                1,
+                                                1,
+                                                0.99144486f,
+                                                0.92387953f,
+                                                0.79335334f,
+                                                0,
+                                                0,
+                                                0,
+                                                0,
+                                                0,
+                                                0,
+                                                0.13052619f,
+                                                0.38268343f,
+                                                0.60876143f}};
+    if (n_long_bands) {
         L3_imdct36(grbuf, overlap, g_mdct_window[0], n_long_bands);
-        grbuf += 18*n_long_bands;
-        overlap += 9*n_long_bands;
+        grbuf += 18 * n_long_bands;
+        overlap += 9 * n_long_bands;
     }
     if (block_type == SHORT_BLOCK_TYPE)
         L3_imdct_short(grbuf, overlap, 32 - n_long_bands);
@@ -1185,15 +1384,13 @@ static void L3_imdct_gr(float *grbuf, float *overlap, unsigned block_type, unsig
 
 static void L3_save_reservoir(mp3dec_t *h, mp3dec_scratch_t *s)
 {
-    int pos = (s->bs.pos + 7)/8u;
-    int remains = s->bs.limit/8u - pos;
-    if (remains > MAX_BITRESERVOIR_BYTES)
-    {
+    int pos     = (s->bs.pos + 7) / 8u;
+    int remains = s->bs.limit / 8u - pos;
+    if (remains > MAX_BITRESERVOIR_BYTES) {
         pos += remains - MAX_BITRESERVOIR_BYTES;
         remains = MAX_BITRESERVOIR_BYTES;
     }
-    if (remains > 0)
-    {
+    if (remains > 0) {
         memmove(h->reserv_buf, s->maindata + pos, remains);
     }
     h->reserv = remains;
@@ -1201,10 +1398,12 @@ static void L3_save_reservoir(mp3dec_t *h, mp3dec_scratch_t *s)
 
 static int L3_restore_reservoir(mp3dec_t *h, bs_t *bs, mp3dec_scratch_t *s, int main_data_begin)
 {
-    int frame_bytes = (bs->limit - bs->pos)/8;
-    int bytes_have = MINIMP3_MIN(h->reserv, main_data_begin);
-    memcpy(s->maindata, h->reserv_buf + MINIMP3_MAX(0, h->reserv - main_data_begin), MINIMP3_MIN(h->reserv, main_data_begin));
-    memcpy(s->maindata + bytes_have, bs->buf + bs->pos/8, frame_bytes);
+    int frame_bytes = (bs->limit - bs->pos) / 8;
+    int bytes_have  = MINIMP3_MIN(h->reserv, main_data_begin);
+    memcpy(s->maindata,
+           h->reserv_buf + MINIMP3_MAX(0, h->reserv - main_data_begin),
+           MINIMP3_MIN(h->reserv, main_data_begin));
+    memcpy(s->maindata + bytes_have, bs->buf + bs->pos / 8, frame_bytes);
     bs_init(&s->bs, s->maindata, bytes_have + frame_bytes);
     return h->reserv >= main_data_begin;
 }
@@ -1213,30 +1412,26 @@ static void L3_decode(mp3dec_t *h, mp3dec_scratch_t *s, L3_gr_info_t *gr_info, i
 {
     int ch;
 
-    for (ch = 0; ch < nch; ch++)
-    {
+    for (ch = 0; ch < nch; ch++) {
         int layer3gr_limit = s->bs.pos + gr_info[ch].part_23_length;
         L3_decode_scalefactors(h->header, s->ist_pos[ch], &s->bs, gr_info + ch, s->scf, ch);
         L3_huffman(s->grbuf[ch], &s->bs, gr_info + ch, s->scf, layer3gr_limit);
     }
 
-    if (HDR_TEST_I_STEREO(h->header))
-    {
+    if (HDR_TEST_I_STEREO(h->header)) {
         L3_intensity_stereo(s->grbuf[0], s->ist_pos[1], gr_info, h->header);
-    } else if (HDR_IS_MS_STEREO(h->header))
-    {
+    }
+    else if (HDR_IS_MS_STEREO(h->header)) {
         L3_midside_stereo(s->grbuf[0], 576);
     }
 
-    for (ch = 0; ch < nch; ch++, gr_info++)
-    {
-        int aa_bands = 31;
+    for (ch = 0; ch < nch; ch++, gr_info++) {
+        int aa_bands     = 31;
         int n_long_bands = (gr_info->mixed_block_flag ? 2 : 0) << (int)(HDR_GET_MY_SAMPLE_RATE(h->header) == 2);
 
-        if (gr_info->n_short_sfb)
-        {
+        if (gr_info->n_short_sfb) {
             aa_bands = n_long_bands - 1;
-            L3_reorder(s->grbuf[ch] + n_long_bands*18, s->syn[0], gr_info->sfbtab + gr_info->n_long_sfb);
+            L3_reorder(s->grbuf[ch] + n_long_bands * 18, s->syn[0], gr_info->sfbtab + gr_info->n_long_sfb);
         }
 
         L3_antialias(s->grbuf[ch], aa_bands);
@@ -1247,317 +1442,367 @@ static void L3_decode(mp3dec_t *h, mp3dec_scratch_t *s, L3_gr_info_t *gr_info, i
 
 static void mp3d_DCT_II(float *grbuf, int n)
 {
-    static const float g_sec[24] = {
-        10.19000816f,0.50060302f,0.50241929f,3.40760851f,0.50547093f,0.52249861f,2.05778098f,0.51544732f,0.56694406f,1.48416460f,0.53104258f,0.64682180f,1.16943991f,0.55310392f,0.78815460f,0.97256821f,0.58293498f,1.06067765f,0.83934963f,0.62250412f,1.72244716f,0.74453628f,0.67480832f,5.10114861f
-    };
+    static const float g_sec[24] = {10.19000816f, 0.50060302f, 0.50241929f, 3.40760851f, 0.50547093f, 0.52249861f,
+                                    2.05778098f,  0.51544732f, 0.56694406f, 1.48416460f, 0.53104258f, 0.64682180f,
+                                    1.16943991f,  0.55310392f, 0.78815460f, 0.97256821f, 0.58293498f, 1.06067765f,
+                                    0.83934963f,  0.62250412f, 1.72244716f, 0.74453628f, 0.67480832f, 5.10114861f};
     int i, k = 0;
 #if HAVE_SIMD
-    if (have_simd()) for (; k < n; k += 4)
-    {
-        f4 t[4][8], *x;
-        float *y = grbuf + k;
+    if (have_simd())
+        for (; k < n; k += 4) {
+            f4 t[4][8], *x;
+            float *y = grbuf + k;
 
-        for (x = t[0], i = 0; i < 8; i++, x++)
-        {
-            f4 x0 = VLD(&y[i*18]);
-            f4 x1 = VLD(&y[(15 - i)*18]);
-            f4 x2 = VLD(&y[(16 + i)*18]);
-            f4 x3 = VLD(&y[(31 - i)*18]);
-            f4 t0 = VADD(x0, x3);
-            f4 t1 = VADD(x1, x2);
-            f4 t2 = VMUL_S(VSUB(x1, x2), g_sec[3*i + 0]);
-            f4 t3 = VMUL_S(VSUB(x0, x3), g_sec[3*i + 1]);
-            x[0] = VADD(t0, t1);
-            x[8] = VMUL_S(VSUB(t0, t1), g_sec[3*i + 2]);
-            x[16] = VADD(t3, t2);
-            x[24] = VMUL_S(VSUB(t3, t2), g_sec[3*i + 2]);
-        }
-        for (x = t[0], i = 0; i < 4; i++, x += 8)
-        {
-            f4 x0 = x[0], x1 = x[1], x2 = x[2], x3 = x[3], x4 = x[4], x5 = x[5], x6 = x[6], x7 = x[7], xt;
-            xt = VSUB(x0, x7); x0 = VADD(x0, x7);
-            x7 = VSUB(x1, x6); x1 = VADD(x1, x6);
-            x6 = VSUB(x2, x5); x2 = VADD(x2, x5);
-            x5 = VSUB(x3, x4); x3 = VADD(x3, x4);
-            x4 = VSUB(x0, x3); x0 = VADD(x0, x3);
-            x3 = VSUB(x1, x2); x1 = VADD(x1, x2);
-            x[0] = VADD(x0, x1);
-            x[4] = VMUL_S(VSUB(x0, x1), 0.70710677f);
-            x5 = VADD(x5, x6);
-            x6 = VMUL_S(VADD(x6, x7), 0.70710677f);
-            x7 = VADD(x7, xt);
-            x3 = VMUL_S(VADD(x3, x4), 0.70710677f);
-            x5 = VSUB(x5, VMUL_S(x7, 0.198912367f)); /* rotate by PI/8 */
-            x7 = VADD(x7, VMUL_S(x5, 0.382683432f));
-            x5 = VSUB(x5, VMUL_S(x7, 0.198912367f));
-            x0 = VSUB(xt, x6); xt = VADD(xt, x6);
-            x[1] = VMUL_S(VADD(xt, x7), 0.50979561f);
-            x[2] = VMUL_S(VADD(x4, x3), 0.54119611f);
-            x[3] = VMUL_S(VSUB(x0, x5), 0.60134488f);
-            x[5] = VMUL_S(VADD(x0, x5), 0.89997619f);
-            x[6] = VMUL_S(VSUB(x4, x3), 1.30656302f);
-            x[7] = VMUL_S(VSUB(xt, x7), 2.56291556f);
-        }
+            for (x = t[0], i = 0; i < 8; i++, x++) {
+                f4 x0 = VLD(&y[i * 18]);
+                f4 x1 = VLD(&y[(15 - i) * 18]);
+                f4 x2 = VLD(&y[(16 + i) * 18]);
+                f4 x3 = VLD(&y[(31 - i) * 18]);
+                f4 t0 = VADD(x0, x3);
+                f4 t1 = VADD(x1, x2);
+                f4 t2 = VMUL_S(VSUB(x1, x2), g_sec[3 * i + 0]);
+                f4 t3 = VMUL_S(VSUB(x0, x3), g_sec[3 * i + 1]);
+                x[0]  = VADD(t0, t1);
+                x[8]  = VMUL_S(VSUB(t0, t1), g_sec[3 * i + 2]);
+                x[16] = VADD(t3, t2);
+                x[24] = VMUL_S(VSUB(t3, t2), g_sec[3 * i + 2]);
+            }
+            for (x = t[0], i = 0; i < 4; i++, x += 8) {
+                f4 x0 = x[0], x1 = x[1], x2 = x[2], x3 = x[3], x4 = x[4], x5 = x[5], x6 = x[6], x7 = x[7], xt;
+                xt   = VSUB(x0, x7);
+                x0   = VADD(x0, x7);
+                x7   = VSUB(x1, x6);
+                x1   = VADD(x1, x6);
+                x6   = VSUB(x2, x5);
+                x2   = VADD(x2, x5);
+                x5   = VSUB(x3, x4);
+                x3   = VADD(x3, x4);
+                x4   = VSUB(x0, x3);
+                x0   = VADD(x0, x3);
+                x3   = VSUB(x1, x2);
+                x1   = VADD(x1, x2);
+                x[0] = VADD(x0, x1);
+                x[4] = VMUL_S(VSUB(x0, x1), 0.70710677f);
+                x5   = VADD(x5, x6);
+                x6   = VMUL_S(VADD(x6, x7), 0.70710677f);
+                x7   = VADD(x7, xt);
+                x3   = VMUL_S(VADD(x3, x4), 0.70710677f);
+                x5   = VSUB(x5, VMUL_S(x7, 0.198912367f)); /* rotate by PI/8 */
+                x7   = VADD(x7, VMUL_S(x5, 0.382683432f));
+                x5   = VSUB(x5, VMUL_S(x7, 0.198912367f));
+                x0   = VSUB(xt, x6);
+                xt   = VADD(xt, x6);
+                x[1] = VMUL_S(VADD(xt, x7), 0.50979561f);
+                x[2] = VMUL_S(VADD(x4, x3), 0.54119611f);
+                x[3] = VMUL_S(VSUB(x0, x5), 0.60134488f);
+                x[5] = VMUL_S(VADD(x0, x5), 0.89997619f);
+                x[6] = VMUL_S(VSUB(x4, x3), 1.30656302f);
+                x[7] = VMUL_S(VSUB(xt, x7), 2.56291556f);
+            }
 
-        if (k > n - 3)
-        {
+            if (k > n - 3) {
 #if HAVE_SSE
-#define VSAVE2(i, v) _mm_storel_pi((__m64 *)(void*)&y[i*18], v)
+#define VSAVE2(i, v) _mm_storel_pi((__m64 *)(void *)&y[i * 18], v)
 #else
-#define VSAVE2(i, v) vst1_f32((float32_t *)&y[i*18],  vget_low_f32(v))
+#define VSAVE2(i, v) vst1_f32((float32_t *)&y[i * 18], vget_low_f32(v))
 #endif
-            for (i = 0; i < 7; i++, y += 4*18)
-            {
-                f4 s = VADD(t[3][i], t[3][i + 1]);
-                VSAVE2(0, t[0][i]);
-                VSAVE2(1, VADD(t[2][i], s));
-                VSAVE2(2, VADD(t[1][i], t[1][i + 1]));
-                VSAVE2(3, VADD(t[2][1 + i], s));
+                for (i = 0; i < 7; i++, y += 4 * 18) {
+                    f4 s = VADD(t[3][i], t[3][i + 1]);
+                    VSAVE2(0, t[0][i]);
+                    VSAVE2(1, VADD(t[2][i], s));
+                    VSAVE2(2, VADD(t[1][i], t[1][i + 1]));
+                    VSAVE2(3, VADD(t[2][1 + i], s));
+                }
+                VSAVE2(0, t[0][7]);
+                VSAVE2(1, VADD(t[2][7], t[3][7]));
+                VSAVE2(2, t[1][7]);
+                VSAVE2(3, t[3][7]);
             }
-            VSAVE2(0, t[0][7]);
-            VSAVE2(1, VADD(t[2][7], t[3][7]));
-            VSAVE2(2, t[1][7]);
-            VSAVE2(3, t[3][7]);
-        } else
-        {
-#define VSAVE4(i, v) VSTORE(&y[i*18], v)
-            for (i = 0; i < 7; i++, y += 4*18)
-            {
-                f4 s = VADD(t[3][i], t[3][i + 1]);
-                VSAVE4(0, t[0][i]);
-                VSAVE4(1, VADD(t[2][i], s));
-                VSAVE4(2, VADD(t[1][i], t[1][i + 1]));
-                VSAVE4(3, VADD(t[2][1 + i], s));
+            else {
+#define VSAVE4(i, v) VSTORE(&y[i * 18], v)
+                for (i = 0; i < 7; i++, y += 4 * 18) {
+                    f4 s = VADD(t[3][i], t[3][i + 1]);
+                    VSAVE4(0, t[0][i]);
+                    VSAVE4(1, VADD(t[2][i], s));
+                    VSAVE4(2, VADD(t[1][i], t[1][i + 1]));
+                    VSAVE4(3, VADD(t[2][1 + i], s));
+                }
+                VSAVE4(0, t[0][7]);
+                VSAVE4(1, VADD(t[2][7], t[3][7]));
+                VSAVE4(2, t[1][7]);
+                VSAVE4(3, t[3][7]);
             }
-            VSAVE4(0, t[0][7]);
-            VSAVE4(1, VADD(t[2][7], t[3][7]));
-            VSAVE4(2, t[1][7]);
-            VSAVE4(3, t[3][7]);
         }
-    } else
+    else
 #endif
 #ifdef MINIMP3_ONLY_SIMD
-    {}
-#else
-    for (; k < n; k++)
     {
+    }
+#else
+    for (; k < n; k++) {
         float t[4][8], *x, *y = grbuf + k;
 
-        for (x = t[0], i = 0; i < 8; i++, x++)
-        {
-            float x0 = y[i*18];
-            float x1 = y[(15 - i)*18];
-            float x2 = y[(16 + i)*18];
-            float x3 = y[(31 - i)*18];
+        for (x = t[0], i = 0; i < 8; i++, x++) {
+            float x0 = y[i * 18];
+            float x1 = y[(15 - i) * 18];
+            float x2 = y[(16 + i) * 18];
+            float x3 = y[(31 - i) * 18];
             float t0 = x0 + x3;
             float t1 = x1 + x2;
-            float t2 = (x1 - x2)*g_sec[3*i + 0];
-            float t3 = (x0 - x3)*g_sec[3*i + 1];
-            x[0] = t0 + t1;
-            x[8] = (t0 - t1)*g_sec[3*i + 2];
-            x[16] = t3 + t2;
-            x[24] = (t3 - t2)*g_sec[3*i + 2];
+            float t2 = (x1 - x2) * g_sec[3 * i + 0];
+            float t3 = (x0 - x3) * g_sec[3 * i + 1];
+            x[0]     = t0 + t1;
+            x[8]     = (t0 - t1) * g_sec[3 * i + 2];
+            x[16]    = t3 + t2;
+            x[24]    = (t3 - t2) * g_sec[3 * i + 2];
         }
-        for (x = t[0], i = 0; i < 4; i++, x += 8)
-        {
+        for (x = t[0], i = 0; i < 4; i++, x += 8) {
             float x0 = x[0], x1 = x[1], x2 = x[2], x3 = x[3], x4 = x[4], x5 = x[5], x6 = x[6], x7 = x[7], xt;
-            xt = x0 - x7; x0 += x7;
-            x7 = x1 - x6; x1 += x6;
-            x6 = x2 - x5; x2 += x5;
-            x5 = x3 - x4; x3 += x4;
-            x4 = x0 - x3; x0 += x3;
-            x3 = x1 - x2; x1 += x2;
+            xt = x0 - x7;
+            x0 += x7;
+            x7 = x1 - x6;
+            x1 += x6;
+            x6 = x2 - x5;
+            x2 += x5;
+            x5 = x3 - x4;
+            x3 += x4;
+            x4 = x0 - x3;
+            x0 += x3;
+            x3 = x1 - x2;
+            x1 += x2;
             x[0] = x0 + x1;
-            x[4] = (x0 - x1)*0.70710677f;
-            x5 =  x5 + x6;
-            x6 = (x6 + x7)*0.70710677f;
-            x7 =  x7 + xt;
-            x3 = (x3 + x4)*0.70710677f;
-            x5 -= x7*0.198912367f;  /* rotate by PI/8 */
-            x7 += x5*0.382683432f;
-            x5 -= x7*0.198912367f;
-            x0 = xt - x6; xt += x6;
-            x[1] = (xt + x7)*0.50979561f;
-            x[2] = (x4 + x3)*0.54119611f;
-            x[3] = (x0 - x5)*0.60134488f;
-            x[5] = (x0 + x5)*0.89997619f;
-            x[6] = (x4 - x3)*1.30656302f;
-            x[7] = (xt - x7)*2.56291556f;
-
+            x[4] = (x0 - x1) * 0.70710677f;
+            x5   = x5 + x6;
+            x6   = (x6 + x7) * 0.70710677f;
+            x7   = x7 + xt;
+            x3   = (x3 + x4) * 0.70710677f;
+            x5 -= x7 * 0.198912367f; /* rotate by PI/8 */
+            x7 += x5 * 0.382683432f;
+            x5 -= x7 * 0.198912367f;
+            x0 = xt - x6;
+            xt += x6;
+            x[1] = (xt + x7) * 0.50979561f;
+            x[2] = (x4 + x3) * 0.54119611f;
+            x[3] = (x0 - x5) * 0.60134488f;
+            x[5] = (x0 + x5) * 0.89997619f;
+            x[6] = (x4 - x3) * 1.30656302f;
+            x[7] = (xt - x7) * 2.56291556f;
         }
-        for (i = 0; i < 7; i++, y += 4*18)
-        {
-            y[0*18] = t[0][i];
-            y[1*18] = t[2][i] + t[3][i] + t[3][i + 1];
-            y[2*18] = t[1][i] + t[1][i + 1];
-            y[3*18] = t[2][i + 1] + t[3][i] + t[3][i + 1];
+        for (i = 0; i < 7; i++, y += 4 * 18) {
+            y[0 * 18] = t[0][i];
+            y[1 * 18] = t[2][i] + t[3][i] + t[3][i + 1];
+            y[2 * 18] = t[1][i] + t[1][i + 1];
+            y[3 * 18] = t[2][i + 1] + t[3][i] + t[3][i + 1];
         }
-        y[0*18] = t[0][7];
-        y[1*18] = t[2][7] + t[3][7];
-        y[2*18] = t[1][7];
-        y[3*18] = t[3][7];
+        y[0 * 18] = t[0][7];
+        y[1 * 18] = t[2][7] + t[3][7];
+        y[2 * 18] = t[1][7];
+        y[3 * 18] = t[3][7];
     }
 #endif
 }
 
 static short mp3d_scale_pcm(float sample)
 {
-    if (sample >  32767.0) return (short) 32767;
-    if (sample < -32768.0) return (short)-32768;
+    if (sample > 32767.0)
+        return (short)32767;
+    if (sample < -32768.0)
+        return (short)-32768;
     int s = (int)(sample + .5f);
-    s -= (s < 0);   /* away from zero, to be compliant */
-    if (s >  32767) return (short) 32767;
-    if (s < -32768) return (short)-32768;
+    s -= (s < 0); /* away from zero, to be compliant */
+    if (s > 32767)
+        return (short)32767;
+    if (s < -32768)
+        return (short)-32768;
     return (short)s;
 }
 
 static void mp3d_synth_pair(short *pcm, int nch, const float *z)
 {
     float a;
-    a  = (z[14*64] - z[    0]) * 29;
-    a += (z[ 1*64] + z[13*64]) * 213;
-    a += (z[12*64] - z[ 2*64]) * 459;
-    a += (z[ 3*64] + z[11*64]) * 2037;
-    a += (z[10*64] - z[ 4*64]) * 5153;
-    a += (z[ 5*64] + z[ 9*64]) * 6574;
-    a += (z[ 8*64] - z[ 6*64]) * 37489;
-    a +=  z[ 7*64]             * 75038;
+    a = (z[14 * 64] - z[0]) * 29;
+    a += (z[1 * 64] + z[13 * 64]) * 213;
+    a += (z[12 * 64] - z[2 * 64]) * 459;
+    a += (z[3 * 64] + z[11 * 64]) * 2037;
+    a += (z[10 * 64] - z[4 * 64]) * 5153;
+    a += (z[5 * 64] + z[9 * 64]) * 6574;
+    a += (z[8 * 64] - z[6 * 64]) * 37489;
+    a += z[7 * 64] * 75038;
     pcm[0] = mp3d_scale_pcm(a);
 
     z += 2;
-    a  = z[14*64] * 104;
-    a += z[12*64] * 1567;
-    a += z[10*64] * 9727;
-    a += z[ 8*64] * 64019;
-    a += z[ 6*64] * -9975;
-    a += z[ 4*64] * -45;
-    a += z[ 2*64] * 146;
-    a += z[ 0*64] * -5;
-    pcm[16*nch] = mp3d_scale_pcm(a);
+    a = z[14 * 64] * 104;
+    a += z[12 * 64] * 1567;
+    a += z[10 * 64] * 9727;
+    a += z[8 * 64] * 64019;
+    a += z[6 * 64] * -9975;
+    a += z[4 * 64] * -45;
+    a += z[2 * 64] * 146;
+    a += z[0 * 64] * -5;
+    pcm[16 * nch] = mp3d_scale_pcm(a);
 }
 
 static void mp3d_synth(float *xl, short *dstl, int nch, float *lins)
 {
     int i;
-    float *xr = xl + 576*(nch - 1);
+    float *xr   = xl + 576 * (nch - 1);
     short *dstr = dstl + (nch - 1);
 
     static const float g_win[] = {
-        -1,26,-31,208,218,401,-519,2063,2000,4788,-5517,7134,5959,35640,-39336,74992,
-        -1,24,-35,202,222,347,-581,2080,1952,4425,-5879,7640,5288,33791,-41176,74856,
-        -1,21,-38,196,225,294,-645,2087,1893,4063,-6237,8092,4561,31947,-43006,74630,
-        -1,19,-41,190,227,244,-711,2085,1822,3705,-6589,8492,3776,30112,-44821,74313,
-        -1,17,-45,183,228,197,-779,2075,1739,3351,-6935,8840,2935,28289,-46617,73908,
-        -1,16,-49,176,228,153,-848,2057,1644,3004,-7271,9139,2037,26482,-48390,73415,
-        -2,14,-53,169,227,111,-919,2032,1535,2663,-7597,9389,1082,24694,-50137,72835,
-        -2,13,-58,161,224,72,-991,2001,1414,2330,-7910,9592,70,22929,-51853,72169,
-        -2,11,-63,154,221,36,-1064,1962,1280,2006,-8209,9750,-998,21189,-53534,71420,
-        -2,10,-68,147,215,2,-1137,1919,1131,1692,-8491,9863,-2122,19478,-55178,70590,
-        -3,9,-73,139,208,-29,-1210,1870,970,1388,-8755,9935,-3300,17799,-56778,69679,
-        -3,8,-79,132,200,-57,-1283,1817,794,1095,-8998,9966,-4533,16155,-58333,68692,
-        -4,7,-85,125,189,-83,-1356,1759,605,814,-9219,9959,-5818,14548,-59838,67629,
-        -4,7,-91,117,177,-106,-1428,1698,402,545,-9416,9916,-7154,12980,-61289,66494,
-        -5,6,-97,111,163,-127,-1498,1634,185,288,-9585,9838,-8540,11455,-62684,65290
-    };
-    float * zlin = lins + 15*64;
-    const float * w = g_win;
+        -1, 26, -31, 208, 218, 401,  -519,  2063, 2000, 4788, -5517, 7134, 5959,  35640, -39336, 74992,
+        -1, 24, -35, 202, 222, 347,  -581,  2080, 1952, 4425, -5879, 7640, 5288,  33791, -41176, 74856,
+        -1, 21, -38, 196, 225, 294,  -645,  2087, 1893, 4063, -6237, 8092, 4561,  31947, -43006, 74630,
+        -1, 19, -41, 190, 227, 244,  -711,  2085, 1822, 3705, -6589, 8492, 3776,  30112, -44821, 74313,
+        -1, 17, -45, 183, 228, 197,  -779,  2075, 1739, 3351, -6935, 8840, 2935,  28289, -46617, 73908,
+        -1, 16, -49, 176, 228, 153,  -848,  2057, 1644, 3004, -7271, 9139, 2037,  26482, -48390, 73415,
+        -2, 14, -53, 169, 227, 111,  -919,  2032, 1535, 2663, -7597, 9389, 1082,  24694, -50137, 72835,
+        -2, 13, -58, 161, 224, 72,   -991,  2001, 1414, 2330, -7910, 9592, 70,    22929, -51853, 72169,
+        -2, 11, -63, 154, 221, 36,   -1064, 1962, 1280, 2006, -8209, 9750, -998,  21189, -53534, 71420,
+        -2, 10, -68, 147, 215, 2,    -1137, 1919, 1131, 1692, -8491, 9863, -2122, 19478, -55178, 70590,
+        -3, 9,  -73, 139, 208, -29,  -1210, 1870, 970,  1388, -8755, 9935, -3300, 17799, -56778, 69679,
+        -3, 8,  -79, 132, 200, -57,  -1283, 1817, 794,  1095, -8998, 9966, -4533, 16155, -58333, 68692,
+        -4, 7,  -85, 125, 189, -83,  -1356, 1759, 605,  814,  -9219, 9959, -5818, 14548, -59838, 67629,
+        -4, 7,  -91, 117, 177, -106, -1428, 1698, 402,  545,  -9416, 9916, -7154, 12980, -61289, 66494,
+        -5, 6,  -97, 111, 163, -127, -1498, 1634, 185,  288,  -9585, 9838, -8540, 11455, -62684, 65290};
+    float *zlin    = lins + 15 * 64;
+    const float *w = g_win;
 
-    zlin[4*15]     = xl[18*16];
-    zlin[4*15 + 1] = xr[18*16];
-    zlin[4*15 + 2] = xl[0];
-    zlin[4*15 + 3] = xr[0];
+    zlin[4 * 15]     = xl[18 * 16];
+    zlin[4 * 15 + 1] = xr[18 * 16];
+    zlin[4 * 15 + 2] = xl[0];
+    zlin[4 * 15 + 3] = xr[0];
 
-    zlin[4*31]     = xl[1 + 18*16];
-    zlin[4*31 + 1] = xr[1 + 18*16];
-    zlin[4*31 + 2] = xl[1];
-    zlin[4*31 + 3] = xr[1];
+    zlin[4 * 31]     = xl[1 + 18 * 16];
+    zlin[4 * 31 + 1] = xr[1 + 18 * 16];
+    zlin[4 * 31 + 2] = xl[1];
+    zlin[4 * 31 + 3] = xr[1];
 
-    mp3d_synth_pair(dstr, nch, lins + 4*15 + 1);
-    mp3d_synth_pair(dstr + 32*nch, nch, lins + 4*15 + 64 + 1);
-    mp3d_synth_pair(dstl, nch, lins + 4*15);
-    mp3d_synth_pair(dstl + 32*nch, nch, lins + 4*15 + 64);
+    mp3d_synth_pair(dstr, nch, lins + 4 * 15 + 1);
+    mp3d_synth_pair(dstr + 32 * nch, nch, lins + 4 * 15 + 64 + 1);
+    mp3d_synth_pair(dstl, nch, lins + 4 * 15);
+    mp3d_synth_pair(dstl + 32 * nch, nch, lins + 4 * 15 + 64);
 
 #if HAVE_SIMD
-    if (have_simd()) for (i = 14; i >= 0; i--)
-    {
-#define VLOAD(k) f4 w0 = VSET(*w++); f4 w1 = VSET(*w++); f4 vz = VLD(&zlin[4*i - 64*k]); f4 vy = VLD(&zlin[4*i - 64*(15 - k)]);
-#define V0(k) {VLOAD(k) b =         VADD(VMUL(vz, w1), VMUL(vy, w0)) ; a =         VSUB(VMUL(vz, w0),VMUL(vy, w1));  }
-#define V1(k) {VLOAD(k) b = VADD(b, VADD(VMUL(vz, w1), VMUL(vy, w0))); a = VADD(a, VSUB(VMUL(vz, w0),VMUL(vy, w1))); }
-#define V2(k) {VLOAD(k) b = VADD(b, VADD(VMUL(vz, w1), VMUL(vy, w0))); a = VADD(a, VSUB(VMUL(vy, w1),VMUL(vz, w0))); }
-        f4 a,b;
-        zlin[4*i]     = xl[18*(31 - i)];
-        zlin[4*i + 1] = xr[18*(31 - i)];
-        zlin[4*i + 2] = xl[1 + 18*(31 - i)];
-        zlin[4*i + 3] = xr[1 + 18*(31 - i)];
-        zlin[4*i + 64] = xl[1 + 18*(1 + i)];
-        zlin[4*i + 64 + 1] = xr[1 + 18*(1 + i)];
-        zlin[4*i - 64 + 2] = xl[18*(1 + i)];
-        zlin[4*i - 64 + 3] = xr[18*(1 + i)];
+    if (have_simd())
+        for (i = 14; i >= 0; i--) {
+#define VLOAD(k)                                                                                                       \
+    f4 w0 = VSET(*w++);                                                                                                \
+    f4 w1 = VSET(*w++);                                                                                                \
+    f4 vz = VLD(&zlin[4 * i - 64 * k]);                                                                                \
+    f4 vy = VLD(&zlin[4 * i - 64 * (15 - k)]);
+#define V0(k)                                                                                                          \
+    {                                                                                                                  \
+        VLOAD(k) b = VADD(VMUL(vz, w1), VMUL(vy, w0));                                                                 \
+        a          = VSUB(VMUL(vz, w0), VMUL(vy, w1));                                                                 \
+    }
+#define V1(k)                                                                                                          \
+    {                                                                                                                  \
+        VLOAD(k) b = VADD(b, VADD(VMUL(vz, w1), VMUL(vy, w0)));                                                        \
+        a          = VADD(a, VSUB(VMUL(vz, w0), VMUL(vy, w1)));                                                        \
+    }
+#define V2(k)                                                                                                          \
+    {                                                                                                                  \
+        VLOAD(k) b = VADD(b, VADD(VMUL(vz, w1), VMUL(vy, w0)));                                                        \
+        a          = VADD(a, VSUB(VMUL(vy, w1), VMUL(vz, w0)));                                                        \
+    }
+            f4 a, b;
+            zlin[4 * i]          = xl[18 * (31 - i)];
+            zlin[4 * i + 1]      = xr[18 * (31 - i)];
+            zlin[4 * i + 2]      = xl[1 + 18 * (31 - i)];
+            zlin[4 * i + 3]      = xr[1 + 18 * (31 - i)];
+            zlin[4 * i + 64]     = xl[1 + 18 * (1 + i)];
+            zlin[4 * i + 64 + 1] = xr[1 + 18 * (1 + i)];
+            zlin[4 * i - 64 + 2] = xl[18 * (1 + i)];
+            zlin[4 * i - 64 + 3] = xr[18 * (1 + i)];
 
-        V0(0) V2(1) V1(2) V2(3) V1(4) V2(5) V1(6) V2(7)
+            V0(0) V2(1) V1(2) V2(3) V1(4) V2(5) V1(6) V2(7)
 
-        {
+            {
 #if HAVE_SSE
-            static const f4 g_max = { 32767.0f, 32767.0f, 32767.0f, 32767.0f };
-            static const f4 g_min = { -32768.0f, -32768.0f, -32768.0f, -32768.0f };
-            __m128i pcm8 = _mm_packs_epi32(_mm_cvtps_epi32(_mm_max_ps(_mm_min_ps(a, g_max), g_min)),
-                                           _mm_cvtps_epi32(_mm_max_ps(_mm_min_ps(b, g_max), g_min)));
-            dstr[(15 - i)*nch] = _mm_extract_epi16(pcm8, 1);
-            dstr[(17 + i)*nch] = _mm_extract_epi16(pcm8, 5);
-            dstl[(15 - i)*nch] = _mm_extract_epi16(pcm8, 0);
-            dstl[(17 + i)*nch] = _mm_extract_epi16(pcm8, 4);
-            dstr[(47 - i)*nch] = _mm_extract_epi16(pcm8, 3);
-            dstr[(49 + i)*nch] = _mm_extract_epi16(pcm8, 7);
-            dstl[(47 - i)*nch] = _mm_extract_epi16(pcm8, 2);
-            dstl[(49 + i)*nch] = _mm_extract_epi16(pcm8, 6);
+                static const f4 g_max = {32767.0f, 32767.0f, 32767.0f, 32767.0f};
+                static const f4 g_min = {-32768.0f, -32768.0f, -32768.0f, -32768.0f};
+                __m128i pcm8          = _mm_packs_epi32(_mm_cvtps_epi32(_mm_max_ps(_mm_min_ps(a, g_max), g_min)),
+                                               _mm_cvtps_epi32(_mm_max_ps(_mm_min_ps(b, g_max), g_min)));
+                dstr[(15 - i) * nch]  = _mm_extract_epi16(pcm8, 1);
+                dstr[(17 + i) * nch]  = _mm_extract_epi16(pcm8, 5);
+                dstl[(15 - i) * nch]  = _mm_extract_epi16(pcm8, 0);
+                dstl[(17 + i) * nch]  = _mm_extract_epi16(pcm8, 4);
+                dstr[(47 - i) * nch]  = _mm_extract_epi16(pcm8, 3);
+                dstr[(49 + i) * nch]  = _mm_extract_epi16(pcm8, 7);
+                dstl[(47 - i) * nch]  = _mm_extract_epi16(pcm8, 2);
+                dstl[(49 + i) * nch]  = _mm_extract_epi16(pcm8, 6);
 #else
-            int16x4_t pcma, pcmb;
-            a = VADD(a, VSET(0.5f));
-            b = VADD(b, VSET(0.5f));
-            pcma = vqmovn_s32(vqaddq_s32(vcvtq_s32_f32(a), vreinterpretq_s32_u32(vcltq_f32(a, VSET(0)))));
-            pcmb = vqmovn_s32(vqaddq_s32(vcvtq_s32_f32(b), vreinterpretq_s32_u32(vcltq_f32(b, VSET(0)))));
-            vst1_lane_s16(dstr + (15 - i)*nch, pcma, 1);
-            vst1_lane_s16(dstr + (17 + i)*nch, pcmb, 1);
-            vst1_lane_s16(dstl + (15 - i)*nch, pcma, 0);
-            vst1_lane_s16(dstl + (17 + i)*nch, pcmb, 0);
-            vst1_lane_s16(dstr + (47 - i)*nch, pcma, 3);
-            vst1_lane_s16(dstr + (49 + i)*nch, pcmb, 3);
-            vst1_lane_s16(dstl + (47 - i)*nch, pcma, 2);
-            vst1_lane_s16(dstl + (49 + i)*nch, pcmb, 2);
+                int16x4_t pcma, pcmb;
+                a    = VADD(a, VSET(0.5f));
+                b    = VADD(b, VSET(0.5f));
+                pcma = vqmovn_s32(vqaddq_s32(vcvtq_s32_f32(a), vreinterpretq_s32_u32(vcltq_f32(a, VSET(0)))));
+                pcmb = vqmovn_s32(vqaddq_s32(vcvtq_s32_f32(b), vreinterpretq_s32_u32(vcltq_f32(b, VSET(0)))));
+                vst1_lane_s16(dstr + (15 - i) * nch, pcma, 1);
+                vst1_lane_s16(dstr + (17 + i) * nch, pcmb, 1);
+                vst1_lane_s16(dstl + (15 - i) * nch, pcma, 0);
+                vst1_lane_s16(dstl + (17 + i) * nch, pcmb, 0);
+                vst1_lane_s16(dstr + (47 - i) * nch, pcma, 3);
+                vst1_lane_s16(dstr + (49 + i) * nch, pcmb, 3);
+                vst1_lane_s16(dstl + (47 - i) * nch, pcma, 2);
+                vst1_lane_s16(dstl + (49 + i) * nch, pcmb, 2);
 #endif
+            }
         }
-    } else
+    else
 #endif
 #ifdef MINIMP3_ONLY_SIMD
-    {}
-#else
-    for (i = 14; i >= 0; i--)
     {
-#define LOAD(k) float w0 = *w++; float w1 = *w++; float * vz = &zlin[4*i - k*64]; float * vy = &zlin[4*i - (15 - k)*64];
-#define S0(k) {int j; LOAD(k); for (j = 0; j < 4; j++) b[j]  = vz[j] * w1 + vy[j] * w0, a[j]  = vz[j] * w0 - vy[j] * w1;}
-#define S1(k) {int j; LOAD(k); for (j = 0; j < 4; j++) b[j] += vz[j] * w1 + vy[j] * w0, a[j] += vz[j] * w0 - vy[j] * w1;}
-#define S2(k) {int j; LOAD(k); for (j = 0; j < 4; j++) b[j] += vz[j] * w1 + vy[j] * w0, a[j] += vy[j] * w1 - vz[j] * w0;}
+    }
+#else
+    for (i = 14; i >= 0; i--) {
+#define LOAD(k)                                                                                                        \
+    float w0  = *w++;                                                                                                  \
+    float w1  = *w++;                                                                                                  \
+    float *vz = &zlin[4 * i - k * 64];                                                                                 \
+    float *vy = &zlin[4 * i - (15 - k) * 64];
+#define S0(k)                                                                                                          \
+    {                                                                                                                  \
+        int j;                                                                                                         \
+        LOAD(k);                                                                                                       \
+        for (j = 0; j < 4; j++)                                                                                        \
+            b[j] = vz[j] * w1 + vy[j] * w0, a[j] = vz[j] * w0 - vy[j] * w1;                                            \
+    }
+#define S1(k)                                                                                                          \
+    {                                                                                                                  \
+        int j;                                                                                                         \
+        LOAD(k);                                                                                                       \
+        for (j = 0; j < 4; j++)                                                                                        \
+            b[j] += vz[j] * w1 + vy[j] * w0, a[j] += vz[j] * w0 - vy[j] * w1;                                          \
+    }
+#define S2(k)                                                                                                          \
+    {                                                                                                                  \
+        int j;                                                                                                         \
+        LOAD(k);                                                                                                       \
+        for (j = 0; j < 4; j++)                                                                                        \
+            b[j] += vz[j] * w1 + vy[j] * w0, a[j] += vy[j] * w1 - vz[j] * w0;                                          \
+    }
         float a[4], b[4];
 
-        zlin[4*i]     = xl[18*(31 - i)];
-        zlin[4*i + 1] = xr[18*(31 - i)];
-        zlin[4*i + 2] = xl[1 + 18*(31 - i)];
-        zlin[4*i + 3] = xr[1 + 18*(31 - i)];
-        zlin[4*(i + 16)]   = xl[1 + 18*(1 + i)];
-        zlin[4*(i + 16) + 1] = xr[1 + 18*(1 + i)];
-        zlin[4*(i - 16) + 2] = xl[18*(1 + i)];
-        zlin[4*(i - 16) + 3] = xr[18*(1 + i)];
+        zlin[4 * i]            = xl[18 * (31 - i)];
+        zlin[4 * i + 1]        = xr[18 * (31 - i)];
+        zlin[4 * i + 2]        = xl[1 + 18 * (31 - i)];
+        zlin[4 * i + 3]        = xr[1 + 18 * (31 - i)];
+        zlin[4 * (i + 16)]     = xl[1 + 18 * (1 + i)];
+        zlin[4 * (i + 16) + 1] = xr[1 + 18 * (1 + i)];
+        zlin[4 * (i - 16) + 2] = xl[18 * (1 + i)];
+        zlin[4 * (i - 16) + 3] = xr[18 * (1 + i)];
 
-        S0(0) S2(1) S1(2) S2(3) S1(4) S2(5) S1(6) S2(7)
+        S0(0)
+        S2(1) S1(2) S2(3) S1(4) S2(5) S1(6) S2(7)
 
-        dstr[(15 - i)*nch] = mp3d_scale_pcm(a[1]);
-        dstr[(17 + i)*nch] = mp3d_scale_pcm(b[1]);
-        dstl[(15 - i)*nch] = mp3d_scale_pcm(a[0]);
-        dstl[(17 + i)*nch] = mp3d_scale_pcm(b[0]);
-        dstr[(47 - i)*nch] = mp3d_scale_pcm(a[3]);
-        dstr[(49 + i)*nch] = mp3d_scale_pcm(b[3]);
-        dstl[(47 - i)*nch] = mp3d_scale_pcm(a[2]);
-        dstl[(49 + i)*nch] = mp3d_scale_pcm(b[2]);
+            dstr[(15 - i) * nch] = mp3d_scale_pcm(a[1]);
+        dstr[(17 + i) * nch]     = mp3d_scale_pcm(b[1]);
+        dstl[(15 - i) * nch]     = mp3d_scale_pcm(a[0]);
+        dstl[(17 + i) * nch]     = mp3d_scale_pcm(b[0]);
+        dstr[(47 - i) * nch]     = mp3d_scale_pcm(a[3]);
+        dstr[(49 + i) * nch]     = mp3d_scale_pcm(b[3]);
+        dstl[(47 - i) * nch]     = mp3d_scale_pcm(a[2]);
+        dstl[(49 + i) * nch]     = mp3d_scale_pcm(b[2]);
     }
 #endif
 }
@@ -1565,36 +1810,32 @@ static void mp3d_synth(float *xl, short *dstl, int nch, float *lins)
 static void mp3d_synth_granule(float *qmf_state, float *grbuf, int nbands, int nch, short *pcm, float *lins)
 {
     int i;
-    for (i = 0; i < nch; i++)
-    {
-        mp3d_DCT_II(grbuf + 576*i, nbands);
+    for (i = 0; i < nch; i++) {
+        mp3d_DCT_II(grbuf + 576 * i, nbands);
     }
 
-    memcpy(lins, qmf_state, sizeof(float)*15*64);
+    memcpy(lins, qmf_state, sizeof(float) * 15 * 64);
 
-    for (i = 0; i < nbands; i += 2)
-    {
-        mp3d_synth(grbuf + i, pcm + 32*nch*i, nch, lins + i*64);
+    for (i = 0; i < nbands; i += 2) {
+        mp3d_synth(grbuf + i, pcm + 32 * nch * i, nch, lins + i * 64);
     }
 #ifndef MINIMP3_NONSTANDARD_BUT_LOGICAL
-    if (nch == 1)
-    {
-        for (i = 0; i < 15*64; i += 2)
-        {
-            qmf_state[i] = lins[nbands*64 + i];
+    if (nch == 1) {
+        for (i = 0; i < 15 * 64; i += 2) {
+            qmf_state[i] = lins[nbands * 64 + i];
         }
-    } else
+    }
+    else
 #endif
     {
-        memcpy(qmf_state, lins + nbands*64, sizeof(float)*15*64);
+        memcpy(qmf_state, lins + nbands * 64, sizeof(float) * 15 * 64);
     }
 }
 
 static int mp3d_match_frame(const uint8_t *hdr, int mp3_bytes, int frame_bytes)
 {
     int i, nmatch;
-    for (i = 0, nmatch = 0; nmatch < MAX_FRAME_SYNC_MATCHES; nmatch++)
-    {
+    for (i = 0, nmatch = 0; nmatch < MAX_FRAME_SYNC_MATCHES; nmatch++) {
         i += hdr_frame_bytes(hdr + i, frame_bytes) + hdr_padding(hdr + i);
         if (i + HDR_SIZE > mp3_bytes)
             return nmatch > 0;
@@ -1607,30 +1848,26 @@ static int mp3d_match_frame(const uint8_t *hdr, int mp3_bytes, int frame_bytes)
 static int mp3d_find_frame(const uint8_t *mp3, int mp3_bytes, int *free_format_bytes, int *ptr_frame_bytes)
 {
     int i, k;
-    for (i = 0; i < mp3_bytes - HDR_SIZE; i++, mp3++)
-    {
-        if (hdr_valid(mp3))
-        {
-            int frame_bytes = hdr_frame_bytes(mp3, *free_format_bytes);
+    for (i = 0; i < mp3_bytes - HDR_SIZE; i++, mp3++) {
+        if (hdr_valid(mp3)) {
+            int frame_bytes       = hdr_frame_bytes(mp3, *free_format_bytes);
             int frame_and_padding = frame_bytes + hdr_padding(mp3);
 
-            for (k = HDR_SIZE; !frame_bytes && k < MAX_FREE_FORMAT_FRAME_SIZE && i + 2*k < mp3_bytes - HDR_SIZE; k++)
-            {
-                if (hdr_compare(mp3, mp3 + k))
-                {
-                    int fb = k - hdr_padding(mp3);
+            for (k = HDR_SIZE; !frame_bytes && k < MAX_FREE_FORMAT_FRAME_SIZE && i + 2 * k < mp3_bytes - HDR_SIZE;
+                 k++) {
+                if (hdr_compare(mp3, mp3 + k)) {
+                    int fb     = k - hdr_padding(mp3);
                     int nextfb = fb + hdr_padding(mp3 + k);
                     if (i + k + nextfb + HDR_SIZE > mp3_bytes || !hdr_compare(mp3, mp3 + k + nextfb))
                         continue;
-                    frame_and_padding = k;
-                    frame_bytes = fb;
+                    frame_and_padding  = k;
+                    frame_bytes        = fb;
                     *free_format_bytes = fb;
                 }
             }
             if ((frame_bytes && i + frame_and_padding <= mp3_bytes &&
-                mp3d_match_frame(mp3, mp3_bytes - i, frame_bytes)) ||
-                (!i && frame_and_padding == mp3_bytes))
-            {
+                 mp3d_match_frame(mp3, mp3_bytes - i, frame_bytes)) ||
+                (!i && frame_and_padding == mp3_bytes)) {
                 *ptr_frame_bytes = frame_and_padding;
                 return i;
             }
@@ -1640,48 +1877,42 @@ static int mp3d_find_frame(const uint8_t *mp3, int mp3_bytes, int *free_format_b
     *ptr_frame_bytes = 0;
     return i;
 }
-static mp3dec_scratch_t* scratch = NULL;
+static mp3dec_scratch_t *scratch = NULL;
 void mp3dec_init(mp3dec_t *dec)
 {
-    if(scratch){
+    if (scratch) {
         free(scratch);
     }
-    scratch = (mp3dec_scratch_t*)malloc(sizeof(mp3dec_scratch_t));
-    memset(scratch,0,sizeof(mp3dec_scratch_t));
+    scratch = (mp3dec_scratch_t *)malloc(sizeof(mp3dec_scratch_t));
+    memset(scratch, 0, sizeof(mp3dec_scratch_t));
 
     dec->header[0] = 0;
 }
 
 void mp3dec_deinit(mp3dec_t *dec)
 {
-    if(scratch){
+    if (scratch) {
         free(scratch);
         scratch = NULL;
     }
 }
 
-
-
 int mp3dec_decode_frame(mp3dec_t *dec, const uint8_t *mp3, int mp3_bytes, short *pcm, mp3dec_frame_info_t *info)
 {
     int i = 0, igr, frame_size = 0, success = 1;
     const uint8_t *hdr;
     bs_t bs_frame[1];
 
-    if (mp3_bytes > 4 && dec->header[0] == 0xff && hdr_compare(dec->header, mp3))
-    {
+    if (mp3_bytes > 4 && dec->header[0] == 0xff && hdr_compare(dec->header, mp3)) {
         frame_size = hdr_frame_bytes(mp3, dec->free_format_bytes) + hdr_padding(mp3);
-        if (frame_size != mp3_bytes && (frame_size + HDR_SIZE > mp3_bytes || !hdr_compare(mp3, mp3 + frame_size)))
-        {
+        if (frame_size != mp3_bytes && (frame_size + HDR_SIZE > mp3_bytes || !hdr_compare(mp3, mp3 + frame_size))) {
             frame_size = 0;
         }
     }
-    if (!frame_size)
-    {
+    if (!frame_size) {
         memset(dec, 0, sizeof(mp3dec_t));
         i = mp3d_find_frame(mp3, mp3_bytes, &dec->free_format_bytes, &frame_size);
-        if (!frame_size || i + frame_size > mp3_bytes)
-        {
+        if (!frame_size || i + frame_size > mp3_bytes) {
             info->frame_bytes = i;
             return 0;
         }
@@ -1689,65 +1920,57 @@ int mp3dec_decode_frame(mp3dec_t *dec, const uint8_t *mp3, int mp3_bytes, short
 
     hdr = mp3 + i;
     memcpy(dec->header, hdr, HDR_SIZE);
-    info->frame_bytes = i + frame_size;
-    info->channels = HDR_IS_MONO(hdr) ? 1 : 2;
-    info->hz = hdr_sample_rate_hz(hdr);
-    info->layer = 4 - HDR_GET_LAYER(hdr);
+    info->frame_bytes  = i + frame_size;
+    info->channels     = HDR_IS_MONO(hdr) ? 1 : 2;
+    info->hz           = hdr_sample_rate_hz(hdr);
+    info->layer        = 4 - HDR_GET_LAYER(hdr);
     info->bitrate_kbps = hdr_bitrate_kbps(hdr);
 
     bs_init(bs_frame, hdr + HDR_SIZE, frame_size - HDR_SIZE);
-    if (HDR_IS_CRC(hdr))
-    {
+    if (HDR_IS_CRC(hdr)) {
         get_bits(bs_frame, 16);
     }
 
-    if (info->layer == 3)
-    {
+    if (info->layer == 3) {
         int main_data_begin = L3_read_side_info(bs_frame, scratch->gr_info, hdr);
-        if (main_data_begin < 0 || bs_frame->pos > bs_frame->limit)
-        {
+        if (main_data_begin < 0 || bs_frame->pos > bs_frame->limit) {
             mp3dec_init(dec);
             return 0;
         }
         success = L3_restore_reservoir(dec, bs_frame, scratch, main_data_begin);
-        if (success)
-        {
-            for (igr = 0; igr < (HDR_TEST_MPEG1(hdr) ? 2 : 1); igr++, pcm += 576*info->channels)
-            {
-                memset(scratch->grbuf[0], 0, 576*2*sizeof(float));
-                L3_decode(dec, scratch, scratch->gr_info + igr*info->channels, info->channels);
+        if (success) {
+            for (igr = 0; igr < (HDR_TEST_MPEG1(hdr) ? 2 : 1); igr++, pcm += 576 * info->channels) {
+                memset(scratch->grbuf[0], 0, 576 * 2 * sizeof(float));
+                L3_decode(dec, scratch, scratch->gr_info + igr * info->channels, info->channels);
                 mp3d_synth_granule(dec->qmf_state, scratch->grbuf[0], 18, info->channels, pcm, scratch->syn[0]);
             }
         }
         L3_save_reservoir(dec, scratch);
-    } else
-    {
+    }
+    else {
 #ifdef MINIMP3_ONLY_MP3
         return 0;
 #else
         L12_scale_info sci[1];
         L12_read_scale_info(hdr, bs_frame, sci);
 
-        memset(scratch.grbuf[0], 0, 576*2*sizeof(float));
-        for (i = 0, igr = 0; igr < 3; igr++)
-        {
-            if (12 == (i += L12_dequantize_granule(scratch.grbuf[0] + i, bs_frame, sci, info->layer | 1)))
-            {
+        memset(scratch.grbuf[0], 0, 576 * 2 * sizeof(float));
+        for (i = 0, igr = 0; igr < 3; igr++) {
+            if (12 == (i += L12_dequantize_granule(scratch.grbuf[0] + i, bs_frame, sci, info->layer | 1))) {
                 i = 0;
                 L12_apply_scf_384(sci, sci->scf + igr, scratch.grbuf[0]);
                 mp3d_synth_granule(dec->qmf_state, scratch.grbuf[0], 12, info->channels, pcm, scratch.syn[0]);
-                memset(scratch.grbuf[0], 0, 576*2*sizeof(float));
-                pcm += 384*info->channels;
+                memset(scratch.grbuf[0], 0, 576 * 2 * sizeof(float));
+                pcm += 384 * info->channels;
             }
-            if (bs_frame->pos > bs_frame->limit)
-            {
+            if (bs_frame->pos > bs_frame->limit) {
                 mp3dec_init(dec);
                 return 0;
             }
         }
 #endif
     }
-    return success*hdr_frame_samples(dec->header);
+    return success * hdr_frame_samples(dec->header);
 }
 
 int mp3dec_find_frame(mp3dec_t *dec, const uint8_t *mp3, int mp3_bytes, mp3dec_frame_info_t *info)
@@ -1756,20 +1979,16 @@ int mp3dec_find_frame(mp3dec_t *dec, const uint8_t *mp3, int mp3_bytes, mp3dec_f
     const uint8_t *hdr;
     bs_t bs_frame[1];
 
-    if (mp3_bytes > 4 && dec->header[0] == 0xff && hdr_compare(dec->header, mp3))
-    {
+    if (mp3_bytes > 4 && dec->header[0] == 0xff && hdr_compare(dec->header, mp3)) {
         frame_size = hdr_frame_bytes(mp3, dec->free_format_bytes) + hdr_padding(mp3);
-        if (frame_size != mp3_bytes && (frame_size + HDR_SIZE > mp3_bytes || !hdr_compare(mp3, mp3 + frame_size)))
-        {
+        if (frame_size != mp3_bytes && (frame_size + HDR_SIZE > mp3_bytes || !hdr_compare(mp3, mp3 + frame_size))) {
             frame_size = 0;
         }
     }
-    if (!frame_size)
-    {
+    if (!frame_size) {
         memset(dec, 0, sizeof(mp3dec_t));
         i = mp3d_find_frame(mp3, mp3_bytes, &dec->free_format_bytes, &frame_size);
-        if (!frame_size || i + frame_size > mp3_bytes)
-        {
+        if (!frame_size || i + frame_size > mp3_bytes) {
             info->frame_bytes = i;
             return 0;
         }
@@ -1777,49 +1996,42 @@ int mp3dec_find_frame(mp3dec_t *dec, const uint8_t *mp3, int mp3_bytes, mp3dec_f
 
     hdr = mp3 + i;
     memcpy(dec->header, hdr, HDR_SIZE);
-    info->frame_bytes = i + frame_size;
-    info->channels = HDR_IS_MONO(hdr) ? 1 : 2;
-    info->hz = hdr_sample_rate_hz(hdr);
-    info->layer = 4 - HDR_GET_LAYER(hdr);
+    info->frame_bytes  = i + frame_size;
+    info->channels     = HDR_IS_MONO(hdr) ? 1 : 2;
+    info->hz           = hdr_sample_rate_hz(hdr);
+    info->layer        = 4 - HDR_GET_LAYER(hdr);
     info->bitrate_kbps = hdr_bitrate_kbps(hdr);
 
     bs_init(bs_frame, hdr + HDR_SIZE, frame_size - HDR_SIZE);
-    if (HDR_IS_CRC(hdr))
-    {
+    if (HDR_IS_CRC(hdr)) {
         get_bits(bs_frame, 16);
     }
 
-    if (info->layer == 3)
-    {
-
-    } else
-    {
+    if (info->layer == 3) {}
+    else {
 #ifdef MINIMP3_ONLY_MP3
         return 0;
 #else
         L12_scale_info sci[1];
         L12_read_scale_info(hdr, bs_frame, sci);
 
-        memset(scratch.grbuf[0], 0, 576*2*sizeof(float));
-        for (i = 0, igr = 0; igr < 3; igr++)
-        {
-            if (12 == (i += L12_dequantize_granule(scratch.grbuf[0] + i, bs_frame, sci, info->layer | 1)))
-            {
+        memset(scratch.grbuf[0], 0, 576 * 2 * sizeof(float));
+        for (i = 0, igr = 0; igr < 3; igr++) {
+            if (12 == (i += L12_dequantize_granule(scratch.grbuf[0] + i, bs_frame, sci, info->layer | 1))) {
                 i = 0;
                 L12_apply_scf_384(sci, sci->scf + igr, scratch.grbuf[0]);
                 mp3d_synth_granule(dec->qmf_state, scratch.grbuf[0], 12, info->channels, pcm, scratch.syn[0]);
-                memset(scratch.grbuf[0], 0, 576*2*sizeof(float));
-                pcm += 384*info->channels;
+                memset(scratch.grbuf[0], 0, 576 * 2 * sizeof(float));
+                pcm += 384 * info->channels;
             }
-            if (bs_frame->pos > bs_frame->limit)
-            {
+            if (bs_frame->pos > bs_frame->limit) {
                 mp3dec_init(dec);
                 return 0;
             }
         }
 #endif
     }
-    return success*hdr_frame_samples(dec->header);
+    return success * hdr_frame_samples(dec->header);
 }
 
 #endif /*MINIMP3_IMPLEMENTATION*/
diff --git a/module-audio/Audio/decoder/xing_header.c b/module-audio/Audio/decoder/xing_header.c
index af738c41e..17f11d75d 100644
--- a/module-audio/Audio/decoder/xing_header.c
+++ b/module-audio/Audio/decoder/xing_header.c
@@ -27,34 +27,28 @@ typedef struct
 {
     char desc[4];
     uint32_t flags;
-}xing_header_t;
+} xing_header_t;
 
 // for XING VBR Header flags
-#define FRAMES_FLAG     0x0001
-#define BYTES_FLAG      0x0002
-#define TOC_FLAG        0x0004
-#define VBR_SCALE_FLAG  0x0008
-
+#define FRAMES_FLAG    0x0001
+#define BYTES_FLAG     0x0002
+#define TOC_FLAG       0x0004
+#define VBR_SCALE_FLAG 0x0008
 
 //! Byte swap unsigned int
-static inline uint32_t swap32( uint32_t ui )
+static inline uint32_t swap32(uint32_t ui)
 {
-    return (ui >> 24) |
-         ((ui<<8) & 0x00FF0000) |
-         ((ui>>8) & 0x0000FF00) |
-         (ui << 24);
+    return (ui >> 24) | ((ui << 8) & 0x00FF0000) | ((ui >> 8) & 0x0000FF00) | (ui << 24);
 }
 
-
-uint8_t parseXingHeader(uint8_t* data,size_t datasize,xing_info_t* info)
+uint8_t parseXingHeader(uint8_t *data, size_t datasize, xing_info_t *info)
 {
-    char* p1 = memmem(data,datasize,"Xing",4);
-    char* p2 = memmem(data,datasize,"Info",4);
+    char *p1 = memmem(data, datasize, "Xing", 4);
+    char *p2 = memmem(data, datasize, "Info", 4);
 
-    if(p1 != NULL || p2 != NULL )
-    {
-        xing_header_t* head = (xing_header_t*)(p1 != NULL ? p1 : p2);
-        uint8_t* raw_data = (uint8_t*)head + sizeof(xing_header_t);
+    if (p1 != NULL || p2 != NULL) {
+        xing_header_t *head = (xing_header_t *)(p1 != NULL ? p1 : p2);
+        uint8_t *raw_data   = (uint8_t *)head + sizeof(xing_header_t);
 
         head->flags = swap32(head->flags);
 
@@ -62,38 +56,36 @@ uint8_t parseXingHeader(uint8_t* data,size_t datasize,xing_info_t* info)
         // get flags (mandatory in XING header)
 
         // extract total number of frames in file
-        if(head->flags & FRAMES_FLAG){
-            uint32_t* tmp = (uint32_t*)&raw_data[offset];
+        if (head->flags & FRAMES_FLAG) {
+            uint32_t *tmp     = (uint32_t *)&raw_data[offset];
             info->TotalFrames = swap32(*tmp);
-            offset +=4;
+            offset += 4;
         }
-        else{
+        else {
             return 0;
         }
 
         // extract total number of bytes in file
-        if(head->flags & BYTES_FLAG){
-            uint32_t* tmp = (uint32_t*)&raw_data[offset];
+        if (head->flags & BYTES_FLAG) {
+            uint32_t *tmp    = (uint32_t *)&raw_data[offset];
             info->TotalBytes = swap32(*tmp);
-            offset +=4;
+            offset += 4;
         }
 
         // extract TOC
-        if(head->flags & TOC_FLAG){
-            memcpy(info->TOC,&raw_data[offset],sizeof(info->TOC));
-            offset +=sizeof(info->TOC);
+        if (head->flags & TOC_FLAG) {
+            memcpy(info->TOC, &raw_data[offset], sizeof(info->TOC));
+            offset += sizeof(info->TOC);
         }
 
         // extract quality status
-        if(head->flags & VBR_SCALE_FLAG){
-            info->Quality = raw_data[offset+3];
+        if (head->flags & VBR_SCALE_FLAG) {
+            info->Quality = raw_data[offset + 3];
         }
 
         return 1;
     }
-    else
-    {
+    else {
         return 0;
     }
 }
-
diff --git a/module-audio/Audio/decoder/xing_header.h b/module-audio/Audio/decoder/xing_header.h
index bc549b0e5..dcf3c21cb 100644
--- a/module-audio/Audio/decoder/xing_header.h
+++ b/module-audio/Audio/decoder/xing_header.h
@@ -13,7 +13,7 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#define XING_HEADER_SIZE    120
+#define XING_HEADER_SIZE 120
 
 typedef struct
 {
@@ -21,7 +21,7 @@ typedef struct
     uint32_t TotalBytes;
     uint8_t TOC[100];
     uint32_t Quality;
-}xing_info_t;
+} xing_info_t;
 
 /**
  * @brief This function is used to parse Xing header in MP3 file
@@ -30,7 +30,6 @@ typedef struct
  * @param info [out] Pointer to structure describing xing header
  * @return 1 if success, otherwise 0.
  */
-uint8_t parseXingHeader(uint8_t* data,size_t datasize,xing_info_t* info);
-
+uint8_t parseXingHeader(uint8_t *data, size_t datasize, xing_info_t *info);
 
 #endif /* AUDIOPLAYER_CODECS_XING_HEADER_H_ */
diff --git a/module-audio/Audio/encoder/Encoder.cpp b/module-audio/Audio/encoder/Encoder.cpp
index be86d4135..72313fce7 100644
--- a/module-audio/Audio/encoder/Encoder.cpp
+++ b/module-audio/Audio/encoder/Encoder.cpp
@@ -2,13 +2,11 @@
  *  @file Encoder.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "Encoder.hpp"
 #include "EncoderWAV.hpp"
 
@@ -17,10 +15,11 @@
 #include <memory>
 #include <cstring>
 
-namespace audio {
+namespace audio
+{
 
-    Encoder::Encoder(const char *fileName, const Format &frmt)
-            : filePath(fileName), format(frmt) {
+    Encoder::Encoder(const char *fileName, const Format &frmt) : filePath(fileName), format(frmt)
+    {
 
         fd = vfs.fopen(fileName, "w");
         if (fd == NULL) {
@@ -29,26 +28,29 @@ namespace audio {
         isInitialized = true;
     }
 
-    Encoder::~Encoder() {
+    Encoder::~Encoder()
+    {
         if (fd) {
             vfs.fclose(fd);
         }
     }
 
-    std::unique_ptr<Encoder> Encoder::Create(const char *file, const Format &frmt) {
+    std::unique_ptr<Encoder> Encoder::Create(const char *file, const Format &frmt)
+    {
         std::unique_ptr<Encoder> enc;
         if ((strstr(file, ".wav") != NULL) || (strstr(file, ".WAV") != NULL)) {
             enc = std::make_unique<EncoderWAV>(file, frmt);
         }
-        else{
+        else {
             return nullptr;
         }
 
         if (enc->isInitialized) {
             return enc;
-        } else {
+        }
+        else {
             return nullptr;
         }
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/encoder/Encoder.hpp b/module-audio/Audio/encoder/Encoder.hpp
index d7d04727f..a4c5e641c 100644
--- a/module-audio/Audio/encoder/Encoder.hpp
+++ b/module-audio/Audio/encoder/Encoder.hpp
@@ -2,25 +2,25 @@
  *  @file Encoder.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_ENCODER_HPP
 #define PUREPHONE_ENCODER_HPP
 
 #include <memory>
 #include "vfs.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class Encoder {
-    public:
-
-        struct Format {
+    class Encoder
+    {
+      public:
+        struct Format
+        {
             uint32_t chanNr;
             uint32_t sampleRate;
         };
@@ -33,24 +33,27 @@ namespace audio {
 
         virtual uint32_t Encode(uint32_t samplesToWrite, int16_t *pcmData) = 0;
 
-        float getCurrentPosition() {
+        float getCurrentPosition()
+        {
             return position;
         }
 
-        uint32_t GetFileSize() { return fileSize; }
+        uint32_t GetFileSize()
+        {
+            return fileSize;
+        }
 
         const Format format;
-    protected:
 
-        float position = 0;
-        vfs::FILE *fd = nullptr;
+      protected:
+        float position    = 0;
+        vfs::FILE *fd     = nullptr;
         uint32_t fileSize = 0;
         std::string filePath;
 
         bool isInitialized = false;
     };
 
-}
+} // namespace audio
 
-
-#endif //PUREPHONE_ENCODER_HPP
+#endif // PUREPHONE_ENCODER_HPP
diff --git a/module-audio/Audio/encoder/EncoderWAV.cpp b/module-audio/Audio/encoder/EncoderWAV.cpp
index 5d34da88f..69d6b95f0 100644
--- a/module-audio/Audio/encoder/EncoderWAV.cpp
+++ b/module-audio/Audio/encoder/EncoderWAV.cpp
@@ -2,39 +2,37 @@
  *  @file EncoderWAV.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "EncoderWAV.hpp"
 #include "log/log.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    EncoderWAV::EncoderWAV(const char *fileName, const Encoder::Format &frmt) : Encoder(fileName, frmt) {
+    EncoderWAV::EncoderWAV(const char *fileName, const Encoder::Format &frmt) : Encoder(fileName, frmt)
+    {
 
         WAVE_FormatTypeDef WaveFormat = {0};
 
         /* Initialize the encoder structure */
-        WaveFormat.SampleRate = format.sampleRate;        /* Audio sampling frequency */
-        WaveFormat.NbrChannels = format.chanNr;          /* Number of channels: 1:Mono or 2:Stereo */
-        WaveFormat.BitPerSample = 16;           /* Number of bits per sample (16, 24 or 32) */
-        WaveFormat.FileSize = 0x001D4C00;    /* Total length of useful audio data (payload) */
-        WaveFormat.SubChunk1Size = 44;       /* The file header chunk size */
-        WaveFormat.ByteRate = (WaveFormat.SampleRate * \
-                        (WaveFormat.BitPerSample / 8) * \
-                         WaveFormat.NbrChannels);     /* Number of bytes per second  (sample rate * block align)  */
-        WaveFormat.BlockAlign = WaveFormat.NbrChannels * \
-                         (WaveFormat.BitPerSample / 8); /* channels * bits/sample / 8 */
-
+        WaveFormat.SampleRate    = format.sampleRate; /* Audio sampling frequency */
+        WaveFormat.NbrChannels   = format.chanNr;     /* Number of channels: 1:Mono or 2:Stereo */
+        WaveFormat.BitPerSample  = 16;                /* Number of bits per sample (16, 24 or 32) */
+        WaveFormat.FileSize      = 0x001D4C00;        /* Total length of useful audio data (payload) */
+        WaveFormat.SubChunk1Size = 44;                /* The file header chunk size */
+        WaveFormat.ByteRate      = (WaveFormat.SampleRate * (WaveFormat.BitPerSample / 8) *
+                               WaveFormat.NbrChannels); /* Number of bytes per second  (sample rate * block align)  */
+        WaveFormat.BlockAlign = WaveFormat.NbrChannels * (WaveFormat.BitPerSample / 8); /* channels * bits/sample / 8 */
 
         HeaderInit(WaveFormat);
     }
 
-    EncoderWAV::~EncoderWAV() {
+    EncoderWAV::~EncoderWAV()
+    {
         vfs.rewind(fd);
         /* Update the wav file header save it into wav file */
         HeaderUpdate();
@@ -43,7 +41,8 @@ namespace audio {
         }
     }
 
-    uint32_t EncoderWAV::Encode(uint32_t samplesToWrite, int16_t *pcmData) {
+    uint32_t EncoderWAV::Encode(uint32_t samplesToWrite, int16_t *pcmData)
+    {
         /*
          * Write int16_t PCM samples to file.
          */
@@ -53,11 +52,12 @@ namespace audio {
         }
 
         /* Calculate frame duration in seconds */
-        position += (float) ((float) (samplesToWrite / format.chanNr) / (float) (format.sampleRate));
+        position += (float)((float)(samplesToWrite / format.chanNr) / (float)(format.sampleRate));
         return byteswritten;
     }
 
-    void EncoderWAV::HeaderInit(const EncoderWAV::WAVE_FormatTypeDef &pWaveFormatStruct) {
+    void EncoderWAV::HeaderInit(const EncoderWAV::WAVE_FormatTypeDef &pWaveFormatStruct)
+    {
         /* Write chunkID, must be 'RIFF'  ------------------------------------------*/
         pHeaderBuff[0] = 'R';
         pHeaderBuff[1] = 'I';
@@ -72,8 +72,8 @@ namespace audio {
         pHeaderBuff[6] = 0x1D;
         pHeaderBuff[7] = 0x00;
         /* Write the file format, must be 'WAVE' -----------------------------------*/
-        pHeaderBuff[8] = 'W';
-        pHeaderBuff[9] = 'A';
+        pHeaderBuff[8]  = 'W';
+        pHeaderBuff[9]  = 'A';
         pHeaderBuff[10] = 'V';
         pHeaderBuff[11] = 'E';
 
@@ -99,16 +99,16 @@ namespace audio {
 
         /* Write the Sample Rate in Hz ---------------------------------------------*/
         /* Write Little Endian ie. 8000 = 0x00001F40 => byte[24]=0x40, byte[27]=0x00*/
-        pHeaderBuff[24] = (uint8_t) ((pWaveFormatStruct.SampleRate & 0xFF));
-        pHeaderBuff[25] = (uint8_t) ((pWaveFormatStruct.SampleRate >> 8) & 0xFF);
-        pHeaderBuff[26] = (uint8_t) ((pWaveFormatStruct.SampleRate >> 16) & 0xFF);
-        pHeaderBuff[27] = (uint8_t) ((pWaveFormatStruct.SampleRate >> 24) & 0xFF);
+        pHeaderBuff[24] = (uint8_t)((pWaveFormatStruct.SampleRate & 0xFF));
+        pHeaderBuff[25] = (uint8_t)((pWaveFormatStruct.SampleRate >> 8) & 0xFF);
+        pHeaderBuff[26] = (uint8_t)((pWaveFormatStruct.SampleRate >> 16) & 0xFF);
+        pHeaderBuff[27] = (uint8_t)((pWaveFormatStruct.SampleRate >> 24) & 0xFF);
 
         /* Write the Byte Rate -----------------------------------------------------*/
-        pHeaderBuff[28] = (uint8_t) ((pWaveFormatStruct.ByteRate & 0xFF));
-        pHeaderBuff[29] = (uint8_t) ((pWaveFormatStruct.ByteRate >> 8) & 0xFF);
-        pHeaderBuff[30] = (uint8_t) ((pWaveFormatStruct.ByteRate >> 16) & 0xFF);
-        pHeaderBuff[31] = (uint8_t) ((pWaveFormatStruct.ByteRate >> 24) & 0xFF);
+        pHeaderBuff[28] = (uint8_t)((pWaveFormatStruct.ByteRate & 0xFF));
+        pHeaderBuff[29] = (uint8_t)((pWaveFormatStruct.ByteRate >> 8) & 0xFF);
+        pHeaderBuff[30] = (uint8_t)((pWaveFormatStruct.ByteRate >> 16) & 0xFF);
+        pHeaderBuff[31] = (uint8_t)((pWaveFormatStruct.ByteRate >> 24) & 0xFF);
 
         /* Write the block alignment -----------------------------------------------*/
         pHeaderBuff[32] = pWaveFormatStruct.BlockAlign;
@@ -132,21 +132,22 @@ namespace audio {
         pHeaderBuff[43] = 0x00;
     }
 
-    void EncoderWAV::HeaderUpdate() {
+    void EncoderWAV::HeaderUpdate()
+    {
         /* Write the file length ---------------------------------------------------*/
         /* The sampling time: this value will be written back at the end of the
            recording operation.  Example: 661500 Btyes = 0x000A17FC, byte[7]=0x00, byte[4]=0xFC */
-        pHeaderBuff[4] = (uint8_t) (fileSize);
-        pHeaderBuff[5] = (uint8_t) (fileSize >> 8);
-        pHeaderBuff[6] = (uint8_t) (fileSize >> 16);
-        pHeaderBuff[7] = (uint8_t) (fileSize >> 24);
+        pHeaderBuff[4] = (uint8_t)(fileSize);
+        pHeaderBuff[5] = (uint8_t)(fileSize >> 8);
+        pHeaderBuff[6] = (uint8_t)(fileSize >> 16);
+        pHeaderBuff[7] = (uint8_t)(fileSize >> 24);
         /* Write the number of sample data -----------------------------------------*/
         /* This variable will be written back at the end of the recording operation */
         fileSize -= 44;
-        pHeaderBuff[40] = (uint8_t) (fileSize);
-        pHeaderBuff[41] = (uint8_t) (fileSize >> 8);
-        pHeaderBuff[42] = (uint8_t) (fileSize >> 16);
-        pHeaderBuff[43] = (uint8_t) (fileSize >> 24);
+        pHeaderBuff[40] = (uint8_t)(fileSize);
+        pHeaderBuff[41] = (uint8_t)(fileSize >> 8);
+        pHeaderBuff[42] = (uint8_t)(fileSize >> 16);
+        pHeaderBuff[43] = (uint8_t)(fileSize >> 24);
     }
 
-}
\ No newline at end of file
+} // namespace audio
\ No newline at end of file
diff --git a/module-audio/Audio/encoder/EncoderWAV.hpp b/module-audio/Audio/encoder/EncoderWAV.hpp
index dd53fb108..84a4d0259 100644
--- a/module-audio/Audio/encoder/EncoderWAV.hpp
+++ b/module-audio/Audio/encoder/EncoderWAV.hpp
@@ -2,30 +2,31 @@
  *  @file EncoderWAV.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_ENCODERWAV_HPP
 #define PUREPHONE_ENCODERWAV_HPP
 
 #include "Encoder.hpp"
 
-namespace audio {
+namespace audio
+{
 
-    class EncoderWAV : public Encoder {
-    public:
+    class EncoderWAV : public Encoder
+    {
+      public:
         EncoderWAV(const char *fileName, const Encoder::Format &frmt);
 
         ~EncoderWAV();
 
         uint32_t Encode(uint32_t samplesToWrite, int16_t *pcmData) override final;
 
-    private:
-        using WAVE_FormatTypeDef =  struct {
+      private:
+        using WAVE_FormatTypeDef = struct
+        {
             uint32_t ChunkID;       /* 0 */
             uint32_t FileSize;      /* 4 */
             uint32_t FileFormat;    /* 8 */
@@ -46,12 +47,9 @@ namespace audio {
 
         void HeaderUpdate();
 
-
         uint8_t pHeaderBuff[44] = {0};
-
     };
 
-}
+} // namespace audio
 
-
-#endif //PUREPHONE_ENCODERWAV_HPP
+#endif // PUREPHONE_ENCODERWAV_HPP
diff --git a/module-audio/tests/Audio_tests.cpp b/module-audio/tests/Audio_tests.cpp
index f898d6187..ba1145718 100644
--- a/module-audio/tests/Audio_tests.cpp
+++ b/module-audio/tests/Audio_tests.cpp
@@ -2,7 +2,7 @@
  *  @file Audio_tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -13,7 +13,6 @@
 #include <cstring>
 #include <unistd.h>
 
-
 #include "catch.hpp"
 
 #include "Audio/Audio.hpp"
@@ -23,12 +22,12 @@ using namespace audio;
 namespace fs = std::filesystem;
 static std::string testOutPath{};
 
-TEST_CASE( "Audio API tests" ) {
+TEST_CASE("Audio API tests")
+{
 
     auto cwd = vfs.getcurrdir();
-    cwd = cwd.substr(0,cwd.find_last_of("/\\"));
-    cwd = cwd.append("/module-audio/tests/samples");
-
+    cwd      = cwd.substr(0, cwd.find_last_of("/\\"));
+    cwd      = cwd.append("/module-audio/tests/samples");
 
 #if 0
     SECTION("INIT"){
@@ -59,19 +58,20 @@ TEST_CASE( "Audio API tests" ) {
         fs::remove("rec1.wav");
     }
 #endif
-    SECTION("Switch: Idle->Routing->Idle"){
+    SECTION("Switch: Idle->Routing->Idle")
+    {
 
-        Audio audioTest([](AudioEvents events)->int32_t{std::cout << "End of file\n"; return 0;});
+        Audio audioTest([](AudioEvents events) -> int32_t {
+            std::cout << "End of file\n";
+            return 0;
+        });
 
-        REQUIRE(audioTest.Start(Operation::Type::Router,"") == static_cast<int32_t >(RetCode::Success));
+        REQUIRE(audioTest.Start(Operation::Type::Router, "") == static_cast<int32_t>(RetCode::Success));
         REQUIRE(audioTest.GetCurrentState() == Audio::State::Routing);
         sleep(1);
-        REQUIRE(audioTest.Stop() == static_cast<int32_t >(RetCode::Success));
+        REQUIRE(audioTest.Stop() == static_cast<int32_t>(RetCode::Success));
         REQUIRE(audioTest.GetCurrentState() == Audio::State::Idle);
 
         fs::remove("rec1.wav");
     }
-
-
 }
-
diff --git a/module-audio/tests/Decoders_tests.cpp b/module-audio/tests/Decoders_tests.cpp
index de186845f..40ef4618f 100644
--- a/module-audio/tests/Decoders_tests.cpp
+++ b/module-audio/tests/Decoders_tests.cpp
@@ -2,7 +2,7 @@
  *  @file Decoders_tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -12,18 +12,18 @@
 #include <cstring>
 #include <unistd.h>
 
-
 #include "catch.hpp"
 
 #include "Audio/decoder/decoder.hpp"
 
 using namespace audio;
 
-TEST_CASE( "Decoder tests" ) {
+TEST_CASE("Decoder tests")
+{
 
     auto cwd = vfs.getcurrdir();
-    cwd = cwd.substr(0,cwd.find_last_of("/\\"));
-    cwd = cwd.append("/module-audio/tests/samples");
+    cwd      = cwd.substr(0, cwd.find_last_of("/\\"));
+    cwd      = cwd.append("/module-audio/tests/samples");
 
     SECTION("Sample1.wav 16bit 44100Hz stereo")
     {
@@ -32,162 +32,14 @@ TEST_CASE( "Decoder tests" ) {
         REQUIRE(dec != nullptr);
         auto tag = dec->fetchTags();
 
-        SECTION( "Init values:" ) {
-        REQUIRE( tag->total_duration_s == 5 );
-        REQUIRE( tag->artist == "" );
-        REQUIRE( tag->album == "" );
-        REQUIRE( tag->title == "sample1.wav" );
-        REQUIRE( tag->sample_rate == 44100 );
-        REQUIRE( tag->num_channel == 2 );
-    }
-
-    /*    SECTION( "Set positions:" ) {
-            dec->setPosition(0.5);
-            REQUIRE( dec->getCurrentPosition() == 336/2 );
-            dec->setPosition(0);
-            REQUIRE( dec->getCurrentPosition() == 0 );
-            dec->setPosition(1);
-            REQUIRE( dec->getCurrentPosition() == 336 );
-            dec->setPosition(0.25);
-            REQUIRE( dec->getCurrentPosition() == 336/4 );
-        }*/
-
-    }
-
-    SECTION("Sample1.mp3-> CBR 320Kb stereo")
-    {
-
-        auto dec = decoder::decoder::Create((cwd + "/sample1.mp3").c_str());
-        REQUIRE(dec != nullptr);
-        auto tag = dec->fetchTags();
-
-        SECTION( "Init values:" ) {
-        REQUIRE( tag->total_duration_s == 5 );
-        REQUIRE( tag->artist == "" );
-        REQUIRE( tag->album == "" );
-        REQUIRE( tag->title == "sample1.mp3" );
-        REQUIRE( tag->sample_rate == 44100 );
-        REQUIRE( tag->num_channel == 2 );
-    }
-
-    /*    SECTION( "Set positions:" ) {
-            dec->setPosition(0.5);
-            REQUIRE( dec->getCurrentPosition() == 336/2 );
-            dec->setPosition(0);
-            REQUIRE( dec->getCurrentPosition() == 0 );
-            dec->setPosition(1);
-            REQUIRE( dec->getCurrentPosition() == 336 );
-            dec->setPosition(0.25);
-            REQUIRE( dec->getCurrentPosition() == 336/4 );
-        }*/
-
-    }
-
-    SECTION("Sample1.flac-> stereo")
-    {
-
-        auto dec = decoder::decoder::Create((cwd + "/sample1.flac").c_str());
-        REQUIRE(dec != nullptr);
-        auto tag = dec->fetchTags();
-
-        SECTION( "Init values:" ) {
-        REQUIRE( tag->total_duration_s == 5 );
-        REQUIRE( tag->artist == "" );
-        REQUIRE( tag->album == "" );
-        REQUIRE( tag->title == "sample1.flac" );
-        REQUIRE( tag->sample_rate == 44100 );
-        REQUIRE( tag->num_channel == 2 );
-    }
-
-    /*    SECTION( "Set positions:" ) {
-            dec->setPosition(0.5);
-            REQUIRE( dec->getCurrentPosition() == 336/2 );
-            dec->setPosition(0);
-            REQUIRE( dec->getCurrentPosition() == 0 );
-            dec->setPosition(1);
-            REQUIRE( dec->getCurrentPosition() == 336 );
-            dec->setPosition(0.25);
-            REQUIRE( dec->getCurrentPosition() == 336/4 );
-        }*/
-
-    }
-
-    SECTION("Sample2.flac-> with tags")
-    {
-
-        auto dec = decoder::decoder::Create((cwd + "/sample2.flac").c_str());
-        REQUIRE(dec != nullptr);
-        auto tag = dec->fetchTags();
-
-        SECTION( "Init values:" ) {
-        REQUIRE( tag->total_duration_s == 5 );
-        REQUIRE( tag->artist == "sample1_artist" );
-        REQUIRE( tag->album == "sample1_album" );
-        REQUIRE( tag->title == "sample1_title" );
-        REQUIRE( tag->genre == "Easy Listening" );
-        REQUIRE( tag->year == "1999" );
-        REQUIRE( tag->sample_rate == 44100 );
-        REQUIRE( tag->num_channel == 2 );
-    }
-
-    /*    SECTION( "Set positions:" ) {
-            dec->setPosition(0.5);
-            REQUIRE( dec->getCurrentPosition() == 336/2 );
-            dec->setPosition(0);
-            REQUIRE( dec->getCurrentPosition() == 0 );
-            dec->setPosition(1);
-            REQUIRE( dec->getCurrentPosition() == 336 );
-            dec->setPosition(0.25);
-            REQUIRE( dec->getCurrentPosition() == 336/4 );
-        }*/
-
-    }
-
-    SECTION("Sample2.mp3-> with tags")
-    {
-
-        auto dec = decoder::decoder::Create((cwd + "/sample2.mp3").c_str());
-        REQUIRE(dec != nullptr);
-        auto tag = dec->fetchTags();
-
-        SECTION( "Init values:" ) {
-        REQUIRE( tag->total_duration_s == 5 );
-        REQUIRE( tag->artist == "sample1_artist" );
-        REQUIRE( tag->album == "sample1_album" );
-        REQUIRE( tag->title == "sample1_title" );
-        REQUIRE( tag->genre == "" ); // idtag lib has problems with some tags, skip it
-        REQUIRE( tag->year == "1999" );
-        REQUIRE( tag->sample_rate == 44100 );
-        REQUIRE( tag->num_channel == 2 );
-    }
-
-    /*    SECTION( "Set positions:" ) {
-            dec->setPosition(0.5);
-            REQUIRE( dec->getCurrentPosition() == 336/2 );
-            dec->setPosition(0);
-            REQUIRE( dec->getCurrentPosition() == 0 );
-            dec->setPosition(1);
-            REQUIRE( dec->getCurrentPosition() == 336 );
-            dec->setPosition(0.25);
-            REQUIRE( dec->getCurrentPosition() == 336/4 );
-        }*/
-
-    }
-
-    SECTION("Sample3.wav-> mono no tags")
-    {
-
-        auto dec = decoder::decoder::Create((cwd + "/sample3.wav").c_str());
-        REQUIRE(dec != nullptr);
-        auto tag = dec->fetchTags();
-
-        SECTION( "Init values:" ) {
-            REQUIRE( tag->total_duration_s == 5 );
-            REQUIRE( tag->artist == "" );
-            REQUIRE( tag->album == "" );
-            REQUIRE( tag->title == "sample3.wav" );
-            REQUIRE( tag->sample_rate == 44100 );
-            REQUIRE( tag->num_channel == 1 );
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "");
+            REQUIRE(tag->album == "");
+            REQUIRE(tag->title == "sample1.wav");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 2);
         }
 
         /*    SECTION( "Set positions:" ) {
@@ -200,8 +52,154 @@ TEST_CASE( "Decoder tests" ) {
                 dec->setPosition(0.25);
                 REQUIRE( dec->getCurrentPosition() == 336/4 );
             }*/
-
     }
 
-}
+    SECTION("Sample1.mp3-> CBR 320Kb stereo")
+    {
 
+        auto dec = decoder::decoder::Create((cwd + "/sample1.mp3").c_str());
+        REQUIRE(dec != nullptr);
+        auto tag = dec->fetchTags();
+
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "");
+            REQUIRE(tag->album == "");
+            REQUIRE(tag->title == "sample1.mp3");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 2);
+        }
+
+        /*    SECTION( "Set positions:" ) {
+                dec->setPosition(0.5);
+                REQUIRE( dec->getCurrentPosition() == 336/2 );
+                dec->setPosition(0);
+                REQUIRE( dec->getCurrentPosition() == 0 );
+                dec->setPosition(1);
+                REQUIRE( dec->getCurrentPosition() == 336 );
+                dec->setPosition(0.25);
+                REQUIRE( dec->getCurrentPosition() == 336/4 );
+            }*/
+    }
+
+    SECTION("Sample1.flac-> stereo")
+    {
+
+        auto dec = decoder::decoder::Create((cwd + "/sample1.flac").c_str());
+        REQUIRE(dec != nullptr);
+        auto tag = dec->fetchTags();
+
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "");
+            REQUIRE(tag->album == "");
+            REQUIRE(tag->title == "sample1.flac");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 2);
+        }
+
+        /*    SECTION( "Set positions:" ) {
+                dec->setPosition(0.5);
+                REQUIRE( dec->getCurrentPosition() == 336/2 );
+                dec->setPosition(0);
+                REQUIRE( dec->getCurrentPosition() == 0 );
+                dec->setPosition(1);
+                REQUIRE( dec->getCurrentPosition() == 336 );
+                dec->setPosition(0.25);
+                REQUIRE( dec->getCurrentPosition() == 336/4 );
+            }*/
+    }
+
+    SECTION("Sample2.flac-> with tags")
+    {
+
+        auto dec = decoder::decoder::Create((cwd + "/sample2.flac").c_str());
+        REQUIRE(dec != nullptr);
+        auto tag = dec->fetchTags();
+
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "sample1_artist");
+            REQUIRE(tag->album == "sample1_album");
+            REQUIRE(tag->title == "sample1_title");
+            REQUIRE(tag->genre == "Easy Listening");
+            REQUIRE(tag->year == "1999");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 2);
+        }
+
+        /*    SECTION( "Set positions:" ) {
+                dec->setPosition(0.5);
+                REQUIRE( dec->getCurrentPosition() == 336/2 );
+                dec->setPosition(0);
+                REQUIRE( dec->getCurrentPosition() == 0 );
+                dec->setPosition(1);
+                REQUIRE( dec->getCurrentPosition() == 336 );
+                dec->setPosition(0.25);
+                REQUIRE( dec->getCurrentPosition() == 336/4 );
+            }*/
+    }
+
+    SECTION("Sample2.mp3-> with tags")
+    {
+
+        auto dec = decoder::decoder::Create((cwd + "/sample2.mp3").c_str());
+        REQUIRE(dec != nullptr);
+        auto tag = dec->fetchTags();
+
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "sample1_artist");
+            REQUIRE(tag->album == "sample1_album");
+            REQUIRE(tag->title == "sample1_title");
+            REQUIRE(tag->genre == ""); // idtag lib has problems with some tags, skip it
+            REQUIRE(tag->year == "1999");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 2);
+        }
+
+        /*    SECTION( "Set positions:" ) {
+                dec->setPosition(0.5);
+                REQUIRE( dec->getCurrentPosition() == 336/2 );
+                dec->setPosition(0);
+                REQUIRE( dec->getCurrentPosition() == 0 );
+                dec->setPosition(1);
+                REQUIRE( dec->getCurrentPosition() == 336 );
+                dec->setPosition(0.25);
+                REQUIRE( dec->getCurrentPosition() == 336/4 );
+            }*/
+    }
+
+    SECTION("Sample3.wav-> mono no tags")
+    {
+
+        auto dec = decoder::decoder::Create((cwd + "/sample3.wav").c_str());
+        REQUIRE(dec != nullptr);
+        auto tag = dec->fetchTags();
+
+        SECTION("Init values:")
+        {
+            REQUIRE(tag->total_duration_s == 5);
+            REQUIRE(tag->artist == "");
+            REQUIRE(tag->album == "");
+            REQUIRE(tag->title == "sample3.wav");
+            REQUIRE(tag->sample_rate == 44100);
+            REQUIRE(tag->num_channel == 1);
+        }
+
+        /*    SECTION( "Set positions:" ) {
+                dec->setPosition(0.5);
+                REQUIRE( dec->getCurrentPosition() == 336/2 );
+                dec->setPosition(0);
+                REQUIRE( dec->getCurrentPosition() == 0 );
+                dec->setPosition(1);
+                REQUIRE( dec->getCurrentPosition() == 336 );
+                dec->setPosition(0.25);
+                REQUIRE( dec->getCurrentPosition() == 336/4 );
+            }*/
+    }
+}
diff --git a/module-audio/tests/Playback_tests.cpp b/module-audio/tests/Playback_tests.cpp
index 974982da7..925a9f16a 100644
--- a/module-audio/tests/Playback_tests.cpp
+++ b/module-audio/tests/Playback_tests.cpp
@@ -2,7 +2,7 @@
  *  @file Playback_tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 23.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -12,7 +12,6 @@
 #include <cstring>
 #include <unistd.h>
 
-
 #include "catch.hpp"
 
 #include "vfs.hpp"
@@ -23,65 +22,67 @@
 
 using namespace audio;
 
-TEST_CASE( "Playback tests" ) {
+TEST_CASE("Playback tests")
+{
 
     auto cwd = vfs.getcurrdir();
-    cwd = cwd.substr(0,cwd.find_last_of("/\\"));
-    cwd = cwd.append("/module-audio/tests/samples");
-
-
+    cwd      = cwd.substr(0, cwd.find_last_of("/\\"));
+    cwd      = cwd.append("/module-audio/tests/samples");
 
     SECTION("Sample1.wav 16bit 44100Hz stereo")
     {
 
-
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
                 return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.01) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.01));
         }
 
-        SECTION("Switch profile during playback"){
-            auto playbackRet =  Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+        SECTION("Switch profile during playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
                 return 0;
             });
             sleep(1);
-            playbackRet.value()->SendEvent(Operation::Event::HeadphonesPlugin,nullptr);
+            playbackRet.value()->SendEvent(Operation::Event::HeadphonesPlugin, nullptr);
             REQUIRE(playbackRet.value()->GetProfile()->GetName() == "Playback Headphones");
             sleep(2);
-            playbackRet.value()->SendEvent(Operation::Event::HeadphonesUnplug,nullptr);
+            playbackRet.value()->SendEvent(Operation::Event::HeadphonesUnplug, nullptr);
             REQUIRE(playbackRet.value()->GetProfile()->GetName() == "Playback Loudspeaker");
             sleep(3);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.01) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.01));
         }
 
-        SECTION("Destroy playback object before end of file"){
+        SECTION("Destroy playback object before end of file")
+        {
             {
-                auto playbackRet =  Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+                auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
                 REQUIRE(playbackRet);
-                    playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                    std::cout<<"End of file reached!\n";
+                playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                    std::cout << "End of file reached!\n";
                     return 0;
                 });
                 sleep(1);
             }
         }
 
-        SECTION("Pause/Resume/Stop sequence"){
-            auto playbackRet =  Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+        SECTION("Pause/Resume/Stop sequence")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
                 return 0;
             });
             sleep(1);
@@ -95,16 +96,17 @@ TEST_CASE( "Playback tests" ) {
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
         }
 
-        SECTION("Pause/Resume/Stop sequence with profile switching"){
-            auto playbackRet =  Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+        SECTION("Pause/Resume/Stop sequence with profile switching")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
                 return 0;
             });
             sleep(1);
             playbackRet.value()->Pause();
-            playbackRet.value()->SendEvent(Operation::Event::HeadphonesPlugin,nullptr);
+            playbackRet.value()->SendEvent(Operation::Event::HeadphonesPlugin, nullptr);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Paused);
             REQUIRE(playbackRet.value()->GetProfile()->GetName() == "Playback Headphones");
             playbackRet.value()->Resume();
@@ -114,11 +116,12 @@ TEST_CASE( "Playback tests" ) {
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
         }
 
-        SECTION("Output volume control and input gain during playback"){
-            auto playbackRet =  Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.wav").c_str());
+        SECTION("Output volume control and input gain during playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-            std::cout<<"End of file reached!\n";
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
                 return 0;
             });
             sleep(1);
@@ -128,94 +131,91 @@ TEST_CASE( "Playback tests" ) {
             playbackRet.value()->SetOutputVolume(0.5);
             REQUIRE(playbackRet.value()->GetOutputVolume() == 0.5f);
             sleep(1);
-
         }
-
     }
 
-    SECTION("Sample3.wav 16bit 44100Hz mono"){
+    SECTION("Sample3.wav 16bit 44100Hz mono")
+    {
 
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample3.wav").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample3.wav").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
-            return 0;
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
+                return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.01) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.01));
         }
-
     }
 
-    SECTION("Sample3.flac 16bit 44100Hz mono"){
+    SECTION("Sample3.flac 16bit 44100Hz mono")
+    {
 
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample3.flac").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample3.flac").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
-            return 0;
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
+                return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.01) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.01));
         }
-
     }
 
+    SECTION("Sample1.flac 16bit 44100Hz stereo")
+    {
 
-    SECTION("Sample1.flac 16bit 44100Hz stereo"){
-
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.flac").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.flac").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
-            return 0;
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
+                return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.01) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.01));
         }
-
     }
 
+    SECTION("Sample1.mp3 16bit 44100Hz stereo")
+    {
 
-
-    SECTION("Sample1.mp3 16bit 44100Hz stereo"){
-
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample1.mp3").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample1.mp3").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
-            return 0;
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
+                return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.1) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.1));
         }
-
     }
 
-    SECTION("Sample3.mp3 16bit 44100Hz mono"){
+    SECTION("Sample3.mp3 16bit 44100Hz mono")
+    {
 
-        SECTION("Full playback"){
-            auto playbackRet = Operation::Create(Operation::Type ::Playback,(cwd + "/sample3.mp3").c_str());
+        SECTION("Full playback")
+        {
+            auto playbackRet = Operation::Create(Operation::Type ::Playback, (cwd + "/sample3.mp3").c_str());
             REQUIRE(playbackRet);
-            playbackRet.value()->Start([](AudioEvents event)->int32_t{
-                std::cout<<"End of file reached!\n";
-            return 0;
+            playbackRet.value()->Start([](AudioEvents event) -> int32_t {
+                std::cout << "End of file reached!\n";
+                return 0;
             });
             sleep(6);
             REQUIRE(playbackRet.value()->GetState() == Operation::State::Idle);
-            REQUIRE( playbackRet.value()->GetPosition() == Approx(5).margin(0.1) );
+            REQUIRE(playbackRet.value()->GetPosition() == Approx(5).margin(0.1));
         }
-
     }
-
 }
-
-
diff --git a/module-audio/tests/Recorder_tests.cpp b/module-audio/tests/Recorder_tests.cpp
index 14c21d774..eb523b734 100644
--- a/module-audio/tests/Recorder_tests.cpp
+++ b/module-audio/tests/Recorder_tests.cpp
@@ -2,12 +2,11 @@
  *  @file Recorder_tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 24.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
 #include <iostream>
 #include <memory>
 #include <cstring>
@@ -27,9 +26,11 @@ using namespace audio;
 namespace fs = std::filesystem;
 static std::string testOutPath{};
 
-TEST_CASE( "RecorderOperation tests" ) {
+TEST_CASE("RecorderOperation tests")
+{
 
-    SECTION("INIT"){
+    SECTION("INIT")
+    {
         fs::path dir = fs::current_path();
 
         std::uintmax_t n = fs::remove_all(dir / "tests_out/audio");
@@ -54,24 +55,25 @@ TEST_CASE( "RecorderOperation tests" ) {
     }
 #endif
 
-    SECTION("Simple mono recording 44100"){
+    SECTION("Simple mono recording 44100")
+    {
         RecorderOperation record((testOutPath + "monorec1_44100.wav").c_str());
-        record.Start([](AudioEvents event)->int32_t{
-            std::cout<<"Error!\n";
+        record.Start([](AudioEvents event) -> int32_t {
+            std::cout << "Error!\n";
             return 0;
         });
         REQUIRE(record.GetState() == RecorderOperation::State::Active);
         sleep(2);
         record.Stop();
         REQUIRE(record.GetState() == RecorderOperation::State::Idle);
-        REQUIRE( record.GetPosition() == Approx(2).margin(0.1) );
+        REQUIRE(record.GetPosition() == Approx(2).margin(0.1));
     }
 
-
-SECTION("Simple stereo recording with profile switching 44100"){
+    SECTION("Simple stereo recording with profile switching 44100")
+    {
         RecorderOperation record((testOutPath + "rec1.wav").c_str());
-        record.Start([](AudioEvents event)->int32_t{
-            std::cout<<"Error!\n";
+        record.Start([](AudioEvents event) -> int32_t {
+            std::cout << "Error!\n";
             return 0;
         });
         REQUIRE(record.GetState() == RecorderOperation::State::Active);
@@ -81,7 +83,6 @@ SECTION("Simple stereo recording with profile switching 44100"){
         sleep(5);
         record.Stop();
         REQUIRE(record.GetState() == RecorderOperation::State::Idle);
-        REQUIRE( record.GetPosition() == Approx(6).margin(0.1) );
+        REQUIRE(record.GetPosition() == Approx(6).margin(0.1));
     }
-
 }
diff --git a/module-audio/tests/tests-main.cpp b/module-audio/tests/tests-main.cpp
old mode 100755
new mode 100644
index f421e1546..8cb56f5c0
--- a/module-audio/tests/tests-main.cpp
+++ b/module-audio/tests/tests-main.cpp
@@ -2,15 +2,14 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
 
-
 #include "vfs.hpp"
 
 class vfs vfs;
\ No newline at end of file
diff --git a/module-bluetooth/Bluetooth/BluetoothWorker.cpp b/module-bluetooth/Bluetooth/BluetoothWorker.cpp
index cde2c944e..951e292ad 100644
--- a/module-bluetooth/Bluetooth/BluetoothWorker.cpp
+++ b/module-bluetooth/Bluetooth/BluetoothWorker.cpp
@@ -4,29 +4,32 @@
 
 using namespace bsp;
 
-BluetoothWorker::BluetoothWorker(sys::Service* service) : Worker(service) {
-    init({{"qBtIO", sizeof(Bt::Message), 10},
-          {"qBtWork", sizeof(Bt::EvtWorker), 10},
-         });
+BluetoothWorker::BluetoothWorker(sys::Service *service) : Worker(service)
+{
+    init({
+        {"qBtIO", sizeof(Bt::Message), 10},
+        {"qBtWork", sizeof(Bt::EvtWorker), 10},
+    });
 };
 
 BluetoothWorker::~BluetoothWorker()
 {
-    if(this->bt_worker_task!= nullptr) {
+    if (this->bt_worker_task != nullptr) {
         // TODO kill task
     }
     LOG_INFO("Worker removed");
 }
 
-bool BluetoothWorker::run() {
+bool BluetoothWorker::run()
+{
     LOG_INFO("-> BluetoothWorker run request");
-    if(is_running) {
+    if (is_running) {
         return true;
     }
-    if(Worker::run()) {
+    if (Worker::run()) {
         is_running = true;
         // TODO what - that's just wrong -_-
-        auto el = queues[queueIO_handle];
+        auto el                             = queues[queueIO_handle];
         BlueKitchen::getInstance()->qHandle = el;
         Bt::initialize_stack();
         Bt::register_hw_error_callback();
@@ -38,7 +41,8 @@ bool BluetoothWorker::run() {
         // Bt::GAP::
         Bt::run_stack(&this->bt_worker_task);
         return true;
-    } else {
+    }
+    else {
         return false;
     }
 }
@@ -50,10 +54,11 @@ bool BluetoothWorker::scan()
     // if state inactive -> return not ready or queue?
     // state active - change what? (BT [ON] on display? )
     auto ret = Bt::GAP::scan();
-    if(ret.err != Bt::Error::Succes) {
+    if (ret.err != Bt::Error::Succes) {
         LOG_ERROR("Cant start scan!: %d %d", ret.err, ret.lib_code);
         return false;
-    } else {
+    }
+    else {
         LOG_INFO("Scan started!");
         return true;
     }
@@ -69,7 +74,7 @@ bool BluetoothWorker::start_pan()
 {
     Bt::PAN::bnep_setup();
     auto err = Bt::PAN::bnep_start();
-    if(err.err != Bt::Error::Succes) {
+    if (err.err != Bt::Error::Succes) {
         LOG_ERROR("PAN setup error: %d %d", err.err, err.lib_code);
     }
     return false;
@@ -87,75 +92,72 @@ BluetoothWorker::Error BluetoothWorker::aud_init()
 
 #include <sstream>
 
-bool BluetoothWorker::handleMessage( uint32_t queueID ) {
+bool BluetoothWorker::handleMessage(uint32_t queueID)
+{
 
     QueueHandle_t queue = queues[queueID];
-    if(queueID == queueService) {
-            LOG_DEBUG("not interested");
-            return true;
+    if (queueID == queueService) {
+        LOG_DEBUG("not interested");
+        return true;
     }
-    if(queueID != queueIO_handle) {
+    if (queueID != queueIO_handle) {
         LOG_ERROR("Wrong queue! %d", queueID);
         return false;
     }
 
     Bt::Message notification = Bt::Message::EvtErrorRec;
-    if( xQueueReceive(queue, &notification, 0 ) != pdTRUE ) {
+    if (xQueueReceive(queue, &notification, 0) != pdTRUE) {
         LOG_ERROR("Receive failure!");
         return false;
     }
     auto bt = BlueKitchen::getInstance();
     switch (notification) {
-        case Bt::Message::EvtSent:
+    case Bt::Message::EvtSent:
 #ifdef DO_DEBUG_HCI_COMS
-            LOG_INFO("[evt] sent");
+        LOG_INFO("[evt] sent");
 #endif
-            if(bt->write_done_cb) {
-                bt->write_done_cb();
-            }
+        if (bt->write_done_cb) {
+            bt->write_done_cb();
+        }
+        break;
+    case Bt::Message::EvtReceived: {
+        /// TODO THERE IS SOME TIMING ISSUE >_>
+        /// need to find out if it's cause there is next read while we are pending last one
+        /// TODO check if Bt timer works properly (i.e. request on reneval doesn't come too quick...)
+        /// TODO maybe blocking on write is bad? ( stack don't have time to process other stuff and looses it)
+        if (bt->to_read_req > bt->in.len) {
+            // LOG_ERROR("%d vs %d", bt->to_read_req, bt->in.len);
             break;
-        case Bt::Message::EvtReceived:
-            {
-                /// TODO THERE IS SOME TIMING ISSUE >_>
-                /// need to find out if it's cause there is next read while we are pending last one
-                /// TODO check if Bt timer works properly (i.e. request on reneval doesn't come too quick...)
-                /// TODO maybe blocking on write is bad? ( stack don't have time to process other stuff and looses it)
-                if( bt->to_read_req > bt->in.len) {
-                     // LOG_ERROR("%d vs %d", bt->to_read_req, bt->in.len);
-                     break;
-                }
-                for( int i=0; i < bt->to_read_req; ++i) {
-                    // error in pop should never happen
-                    if(int ret = bt->in.pop((char*)bt->read_buff+i)) {
-                        LOG_ERROR("This shall never happen: %d", ret);
-                    }
-                }
-                // LOG_DEBUG(">> %d",bt->in.len);
+        }
+        for (int i = 0; i < bt->to_read_req; ++i) {
+            // error in pop should never happen
+            if (int ret = bt->in.pop((char *)bt->read_buff + i)) {
+                LOG_ERROR("This shall never happen: %d", ret);
+            }
+        }
+        // LOG_DEBUG(">> %d",bt->in.len);
 #ifdef DO_DEBUG_HCI_COMS
-                std::stringstream ss;
-                for (int i =0; i<bt->to_read_req; ++i) {
-                    ss << " 0x" << std::hex << (int)*(bt->read_buff+i);
-                }
-                LOG_DEBUG("[evt] recieved <-- [%d]>%s<", bt->to_read_req, ss.str().c_str());
+        std::stringstream ss;
+        for (int i = 0; i < bt->to_read_req; ++i) {
+            ss << " 0x" << std::hex << (int)*(bt->read_buff + i);
+        }
+        LOG_DEBUG("[evt] recieved <-- [%d]>%s<", bt->to_read_req, ss.str().c_str());
 #endif
-                bt->to_read_req = 0;
+        bt->to_read_req = 0;
 
-                if(bt->read_ready_cb) {
-                    bt->read_ready_cb();
-                }
-            }
-            break;
-        case Bt::Message::EvtSentError:
-        case Bt::Message::EvtRecError:
-        case Bt::Message::EvtUartError:
-        case Bt::Message::EvtRecUnwanted:
-            {
-                LOG_ERROR("Uart error [%d]: %s", notification, Bt::MessageCstr(notification));
-                break;
-            }
-            break;
-        default:
-            LOG_ERROR("ERROR");
+        if (bt->read_ready_cb) {
+            bt->read_ready_cb();
+        }
+    } break;
+    case Bt::Message::EvtSentError:
+    case Bt::Message::EvtRecError:
+    case Bt::Message::EvtUartError:
+    case Bt::Message::EvtRecUnwanted: {
+        LOG_ERROR("Uart error [%d]: %s", notification, Bt::MessageCstr(notification));
+        break;
+    } break;
+    default:
+        LOG_ERROR("ERROR");
     }
 
     return true;
diff --git a/module-bluetooth/Bluetooth/BluetoothWorker.hpp b/module-bluetooth/Bluetooth/BluetoothWorker.hpp
index 7182a9418..9c313af0d 100644
--- a/module-bluetooth/Bluetooth/BluetoothWorker.hpp
+++ b/module-bluetooth/Bluetooth/BluetoothWorker.hpp
@@ -14,8 +14,10 @@ struct HCI;
 /// debug option for HCI (uart) commands debugging
 // #define DO_DEBUG_HCI_COMS
 
-namespace Bt {
-    enum Message : uint8_t {
+namespace Bt
+{
+    enum Message : uint8_t
+    {
         /// asynchronous messages to use on event from irq
         EvtSent,        /// trigger Bt stack wrote, enable writting in HCI in BluetoothWorker task
         EvtRecUnwanted, /// not requested recieve - probably receive came to fast from sent...
@@ -26,65 +28,71 @@ namespace Bt {
         EvtErrorRec,    /// there was error o queue receive
     };
 
-    inline const char* MessageCstr(Message what) {
+    inline const char *MessageCstr(Message what)
+    {
         switch (what) {
-            case EvtReceived:
-                return "EvtReceived";
-            case EvtSent:
-                return "EvtSent";
-            case EvtRecUnwanted:
-                return "EvtRecUnwanted";
-            case EvtRecError:
-                return "EvtRecError";
-            case EvtSentError:
-                return "EvtSentError";
-            case EvtUartError:
-                return "EvtUartError";
-            case EvtErrorRec:
-                return "EvtErrorRec";
-            default:
-                return "";
+        case EvtReceived:
+            return "EvtReceived";
+        case EvtSent:
+            return "EvtSent";
+        case EvtRecUnwanted:
+            return "EvtRecUnwanted";
+        case EvtRecError:
+            return "EvtRecError";
+        case EvtSentError:
+            return "EvtSentError";
+        case EvtUartError:
+            return "EvtUartError";
+        case EvtErrorRec:
+            return "EvtErrorRec";
+        default:
+            return "";
         }
     }
 
-    struct EvtWorker {
-        enum Evt : uint8_t {
+    struct EvtWorker
+    {
+        enum Evt : uint8_t
+        {
         };
     };
-};
-
-
-class BluetoothWorker : private sys::Worker {
-  enum WorkerEventQueues {
-      queueService = 0,
-      queueIO_handle,             /// bsp support queue
-      queue_profiles,             /// queue for communication between profile workers,
-                                  /// main bt_worker_task should dispatch these in events
-  };
-
-  TaskHandle_t bt_worker_task = nullptr;
-  int is_running = false;
-public:
-  enum Error {
-    SuccessBt,
-    ErrorBtGeneric,
-    ErrorBtAPI,
-  };
-
-  BluetoothWorker(sys::Service* service);
-  virtual ~BluetoothWorker();
-
-  virtual bool handleMessage(uint32_t queueID);
-
-  bool run();
-
-  bool scan();
-
-  bool set_visible();
-
-  bool start_pan();
-
-  Error aud_init();
-  /// bluetooth stack id in use
-  unsigned long active_features;
+}; // namespace Bt
+
+class BluetoothWorker : private sys::Worker
+{
+    enum WorkerEventQueues
+    {
+        queueService = 0,
+        queueIO_handle, /// bsp support queue
+        queue_profiles, /// queue for communication between profile workers,
+                        /// main bt_worker_task should dispatch these in events
+    };
+
+    TaskHandle_t bt_worker_task = nullptr;
+    int is_running              = false;
+
+  public:
+    enum Error
+    {
+        SuccessBt,
+        ErrorBtGeneric,
+        ErrorBtAPI,
+    };
+
+    BluetoothWorker(sys::Service *service);
+    virtual ~BluetoothWorker();
+
+    virtual bool handleMessage(uint32_t queueID);
+
+    bool run();
+
+    bool scan();
+
+    bool set_visible();
+
+    bool start_pan();
+
+    Error aud_init();
+    /// bluetooth stack id in use
+    unsigned long active_features;
 };
diff --git a/module-bluetooth/Bluetooth/BtCommand.hpp b/module-bluetooth/Bluetooth/BtCommand.hpp
index 69840d98e..8e9e39211 100644
--- a/module-bluetooth/Bluetooth/BtCommand.hpp
+++ b/module-bluetooth/Bluetooth/BtCommand.hpp
@@ -6,18 +6,21 @@
 #include "Error.hpp"
 #include <functional>
 
-namespace Bt {
-Error initialize_stack();
-Error register_hw_error_callback(std::function<void(uint8_t)> new_callback=nullptr);
-Error set_name(std::string &name);
-Error run_stack(TaskHandle_t *handle);
-namespace GAP {
-/// THIS have to be called prior to Bt system start!
-Error register_scan();
-Error scan();
-};
-namespace PAN {
-Error bnep_start();
-Error bnep_setup();
-}
-};
+namespace Bt
+{
+    Error initialize_stack();
+    Error register_hw_error_callback(std::function<void(uint8_t)> new_callback = nullptr);
+    Error set_name(std::string &name);
+    Error run_stack(TaskHandle_t *handle);
+    namespace GAP
+    {
+        /// THIS have to be called prior to Bt system start!
+        Error register_scan();
+        Error scan();
+    }; // namespace GAP
+    namespace PAN
+    {
+        Error bnep_start();
+        Error bnep_setup();
+    } // namespace PAN
+};    // namespace Bt
diff --git a/module-bluetooth/Bluetooth/Device.hpp b/module-bluetooth/Bluetooth/Device.hpp
index b9b0e474a..b930ad646 100644
--- a/module-bluetooth/Bluetooth/Device.hpp
+++ b/module-bluetooth/Bluetooth/Device.hpp
@@ -1,9 +1,11 @@
 #pragma once
 #include <string>
 
-struct Device {
-    public:
-        Device(std::string name="") :name(name) {}
-        virtual ~Device() {};
-        std::string name;
+struct Device
+{
+  public:
+    Device(std::string name = "") : name(name)
+    {}
+    virtual ~Device(){};
+    std::string name;
 };
diff --git a/module-bluetooth/Bluetooth/Error.hpp b/module-bluetooth/Bluetooth/Error.hpp
index 1f4b992ef..4b35d9fa0 100644
--- a/module-bluetooth/Bluetooth/Error.hpp
+++ b/module-bluetooth/Bluetooth/Error.hpp
@@ -4,17 +4,21 @@
 #include <variant>
 #include <optional>
 
-namespace Bt {
+namespace Bt
+{
 
-struct Error {
-    enum Code {
-        Succes,
-        NotReady,
-        SystemError,
-        LibraryError,
-    } err = Succes;
-    uint32_t lib_code =0;
-    Error(enum Code err=Succes, int lib_code=Succes) : err(err), lib_code(0) {}
-};
+    struct Error
+    {
+        enum Code
+        {
+            Succes,
+            NotReady,
+            SystemError,
+            LibraryError,
+        } err             = Succes;
+        uint32_t lib_code = 0;
+        Error(enum Code err = Succes, int lib_code = Succes) : err(err), lib_code(0)
+        {}
+    };
 
-}
+} // namespace Bt
diff --git a/module-bluetooth/Bluetooth/Stack.hpp b/module-bluetooth/Bluetooth/Stack.hpp
index d7ab5660b..c08c98d55 100644
--- a/module-bluetooth/Bluetooth/Stack.hpp
+++ b/module-bluetooth/Bluetooth/Stack.hpp
@@ -1,6 +1,8 @@
 #pragma once
 
-struct Stack {
+struct Stack
+{
     int id;
-    Stack() : id(0) {}
+    Stack() : id(0)
+    {}
 };
diff --git a/module-bluetooth/Bluetooth/glucode/HCITRANS.cpp b/module-bluetooth/Bluetooth/glucode/HCITRANS.cpp
index cae2649d9..892e9f333 100644
--- a/module-bluetooth/Bluetooth/glucode/HCITRANS.cpp
+++ b/module-bluetooth/Bluetooth/glucode/HCITRANS.cpp
@@ -3,117 +3,122 @@
 
 using namespace bsp;
 
-extern "C" {
+extern "C"
+{
 
 #include "HCITRANS.h"
 #define TRANSPORT_ID 1
 
-typedef void (BTPSAPI *HCITR_COMDataCallback_t)(unsigned int HCITransportID, unsigned int DataLength, unsigned char *DataBuffer, unsigned long CallbackParameter);
-void RxThread(void *Param);
+    typedef void(BTPSAPI *HCITR_COMDataCallback_t)(unsigned int HCITransportID,
+                                                   unsigned int DataLength,
+                                                   unsigned char *DataBuffer,
+                                                   unsigned long CallbackParameter);
+    void RxThread(void *Param);
 
-int BTPSAPI HCITR_COMOpen(  HCI_COMMDriverInformation_t *COMMDriverInformation,
-                            HCITR_COMDataCallback_t COMDataCallback,
-                            unsigned long CallbackParameter)
-{
+    int BTPSAPI HCITR_COMOpen(HCI_COMMDriverInformation_t *COMMDriverInformation,
+                              HCITR_COMDataCallback_t COMDataCallback,
+                              unsigned long CallbackParameter)
+    {
 
-    int ret=TRANSPORT_ID;
-    LOG_INFO("COM OPEN!");
-    Bluetopia *bt = Bluetopia::getInstance();
-    bt->set_reset(true);
-    bt->open();
-    bt->com_cb = COMDataCallback;
-    bt->com_cb_param = CallbackParameter;
-    bt->rx_thread = xTaskCreate(RxThread, "RxThread", 4096, NULL, 3, &bt->thandle);
-    if(bt->rx_thread != pdPASS) {
-        ret = ErrorBtGeneric;
-        LOG_ERROR("COM OPEN failure: %d", bt->rx_thread);
+        int ret = TRANSPORT_ID;
+        LOG_INFO("COM OPEN!");
+        Bluetopia *bt = Bluetopia::getInstance();
+        bt->set_reset(true);
+        bt->open();
+        bt->com_cb       = COMDataCallback;
+        bt->com_cb_param = CallbackParameter;
+        bt->rx_thread    = xTaskCreate(RxThread, "RxThread", 4096, NULL, 3, &bt->thandle);
+        if (bt->rx_thread != pdPASS) {
+            ret = ErrorBtGeneric;
+            LOG_ERROR("COM OPEN failure: %d", bt->rx_thread);
+        }
+        LOG_INFO("COM OPEN! done");
+        return ret;
     }
-    LOG_INFO("COM OPEN! done");
-    return ret;
-}
 
-void BTPSAPI HCITR_COMClose(unsigned int HCITransportID)
-{
-    LOG_ERROR("COM CLOSE");
-    Bluetopia *dev = Bluetopia::getInstance();
-    if(dev->thandle!= NULL) {
-        // TODO check me
-        //vTaskDelete(bt->thandle);
+    void BTPSAPI HCITR_COMClose(unsigned int HCITransportID)
+    {
+        LOG_ERROR("COM CLOSE");
+        Bluetopia *dev = Bluetopia::getInstance();
+        if (dev->thandle != NULL) {
+            // TODO check me
+            // vTaskDelete(bt->thandle);
+        }
+        dev->close();
+        dev->set_reset(false);
+        if (dev->com_cb) {
+            dev->com_cb(TRANSPORT_ID, 0, NULL, dev->com_cb_param);
+        }
+        LOG_ERROR("COM CLOSED");
     }
-    dev->close();
-    dev->set_reset(false);
-    if (dev->com_cb) {
-        dev->com_cb(TRANSPORT_ID, 0, NULL, dev->com_cb_param);
-    }
-    LOG_ERROR("COM CLOSED");
-}
 
-void BTPSAPI HCITR_COMReconfigure(unsigned int HCITransportID, HCI_Driver_Reconfigure_Data_t *DriverReconfigureData)
-{
-    HCI_COMMReconfigureInformation_t *ReconfigureInformation;
-    Bluetopia *dev = Bluetopia::getInstance();
-    if ((HCITransportID == TRANSPORT_ID) && dev->is_open && (DriverReconfigureData)) {
-        if ((DriverReconfigureData->ReconfigureCommand == HCI_COMM_DRIVER_RECONFIGURE_DATA_COMMAND_CHANGE_COMM_PARAMETERS)
-            && (DriverReconfigureData->ReconfigureData)) {
-            ReconfigureInformation = (HCI_COMMReconfigureInformation_t *)(DriverReconfigureData->ReconfigureData);
-            if (ReconfigureInformation->ReconfigureFlags & HCI_COMM_RECONFIGURE_INFORMATION_RECONFIGURE_FLAGS_CHANGE_BAUDRATE) {
-                LOG_INFO("Set baudrate to: %d",ReconfigureInformation->BaudRate);
-                dev->set_irq(false);
-                dev->set_baudrate(ReconfigureInformation->BaudRate);
-                dev->set_irq(true);
+    void BTPSAPI HCITR_COMReconfigure(unsigned int HCITransportID, HCI_Driver_Reconfigure_Data_t *DriverReconfigureData)
+    {
+        HCI_COMMReconfigureInformation_t *ReconfigureInformation;
+        Bluetopia *dev = Bluetopia::getInstance();
+        if ((HCITransportID == TRANSPORT_ID) && dev->is_open && (DriverReconfigureData)) {
+            if ((DriverReconfigureData->ReconfigureCommand ==
+                 HCI_COMM_DRIVER_RECONFIGURE_DATA_COMMAND_CHANGE_COMM_PARAMETERS) &&
+                (DriverReconfigureData->ReconfigureData)) {
+                ReconfigureInformation = (HCI_COMMReconfigureInformation_t *)(DriverReconfigureData->ReconfigureData);
+                if (ReconfigureInformation->ReconfigureFlags &
+                    HCI_COMM_RECONFIGURE_INFORMATION_RECONFIGURE_FLAGS_CHANGE_BAUDRATE) {
+                    LOG_INFO("Set baudrate to: %d", ReconfigureInformation->BaudRate);
+                    dev->set_irq(false);
+                    dev->set_baudrate(ReconfigureInformation->BaudRate);
+                    dev->set_irq(true);
+                }
             }
         }
     }
-}
 
-int BTPSAPI HCITR_COMWrite(unsigned int HCITransportID, unsigned int Length, unsigned char *Buffer)
-{
-    int ret=0;
-    // LOG_INFO("DATA -> [%d]", Length);
-    if(HCITransportID) {
-        ret=Bluetopia::getInstance()->write_blocking(reinterpret_cast<char*>(Buffer), Length);
-    } else {
-        ret=-1;
-    }
-    return ret;
-}
-
-int BTPSAPI HCITR_COMSuspend(unsigned int HCITransportID)
-{
-    LOG_ERROR("Not implemented!");
-    int ret=-1;
-    if(HCITransportID) {
-    } else {
-        ret =-1;
-    }
-    return ret;
-}
-
-int BTPSAPI HCITR_EnableDebugLogging(Boolean_t Enable)
-{
-    return 0;
-}
-
-
-void RxThread(void *Param)
-{
-    LOG_INFO("BT RxThread created");
-    Bluetopia *dev = Bluetopia::getInstance();
-    while (dev->is_open) {
-        dev->wait_data();
-        dev->set_irq(false);
-        // LOG_INFO("DATA [%d]<--", dev->in.len);
-        // for(int i=0; i<dev->in.len; ++i) {
-        //     LOG_PRINTF("0x%X ", dev->in.buff[i]);
-        // }
-        // LOG_PRINTF("\n");
-        if (dev->com_cb) {
-            dev->com_cb(TRANSPORT_ID, dev->in.len, (unsigned char *)dev->in.buff, dev->com_cb_param);
+    int BTPSAPI HCITR_COMWrite(unsigned int HCITransportID, unsigned int Length, unsigned char *Buffer)
+    {
+        int ret = 0;
+        // LOG_INFO("DATA -> [%d]", Length);
+        if (HCITransportID) {
+            ret = Bluetopia::getInstance()->write_blocking(reinterpret_cast<char *>(Buffer), Length);
         }
-        dev->in.flush();
-        dev->set_irq(true);
-        dev->set_rts(true);
+        else {
+            ret = -1;
+        }
+        return ret;
     }
-}
 
+    int BTPSAPI HCITR_COMSuspend(unsigned int HCITransportID)
+    {
+        LOG_ERROR("Not implemented!");
+        int ret = -1;
+        if (HCITransportID) {}
+        else {
+            ret = -1;
+        }
+        return ret;
+    }
+
+    int BTPSAPI HCITR_EnableDebugLogging(Boolean_t Enable)
+    {
+        return 0;
+    }
+
+    void RxThread(void *Param)
+    {
+        LOG_INFO("BT RxThread created");
+        Bluetopia *dev = Bluetopia::getInstance();
+        while (dev->is_open) {
+            dev->wait_data();
+            dev->set_irq(false);
+            // LOG_INFO("DATA [%d]<--", dev->in.len);
+            // for(int i=0; i<dev->in.len; ++i) {
+            //     LOG_PRINTF("0x%X ", dev->in.buff[i]);
+            // }
+            // LOG_PRINTF("\n");
+            if (dev->com_cb) {
+                dev->com_cb(TRANSPORT_ID, dev->in.len, (unsigned char *)dev->in.buff, dev->com_cb_param);
+            }
+            dev->in.flush();
+            dev->set_irq(true);
+            dev->set_rts(true);
+        }
+    }
 };
diff --git a/module-bluetooth/Bluetooth/glucode/bluetooth_init_cc2564C_1.0.c b/module-bluetooth/Bluetooth/glucode/bluetooth_init_cc2564C_1.0.c
index c58cd0298..44515ec07 100644
--- a/module-bluetooth/Bluetooth/glucode/bluetooth_init_cc2564C_1.0.c
+++ b/module-bluetooth/Bluetooth/glucode/bluetooth_init_cc2564C_1.0.c
@@ -5,15 +5,15 @@
 #include <stdint.h>
 #include "btstack_chipset_cc256x.h"
 
-
 const uint16_t cc256x_init_script_lmp_subversion = 0x9a1a;
 
-uint16_t btstack_chipset_cc256x_lmp_subversion(void){
+uint16_t btstack_chipset_cc256x_lmp_subversion(void)
+{
     return cc256x_init_script_lmp_subversion;
 }
 
 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0)
-__attribute__((section (".fartext")))
+__attribute__((section(".fartext")))
 #endif
 #ifdef __AVR__
 __attribute__((__progmem__))
@@ -34,355 +34,3906 @@ const uint8_t cc256x_init_script[] = {
     // #
     // # Notes       : Use this script on Orca C, 12.0.26 ROM device only (FW v12.0.26)
     // #--------------------------------------------------------------------------------
-    // 
+    //
     // #################################################################
     // ## START of CC256x Add-On
     // #################################################################
-    // 
+    //
     // ## Change UART baudrate
-    // 
+    //
     // #################################################################
     // ## END of CC256x Add-On
     // #################################################################
-    // 
-    0x01, 0x37, 0xfe, 0x02, 0x0c, 0x1a, 
+    //
+    0x01,
+    0x37,
+    0xfe,
+    0x02,
+    0x0c,
+    0x1a,
 
-    // 
-    // 
-    0x01, 0x05, 0xff, 0xff, 0xd0, 0x65, 0x08, 0x00, 0xfa, 0x0c, 0x1a, 0x09, 0x0c, 0x01, 0x6a, 
-    0xc8, 0x7b, 0x00, 0x02, 0x89, 0x7b, 0x01, 0x43, 0x09, 0x48, 0x51, 0x30, 0x02, 0x88, 0x06, 
-    0x48, 0x91, 0x42, 0x03, 0xd1, 0x04, 0x49, 0x09, 0x78, 0x01, 0x29, 0x01, 0xd0, 0x5d, 0x30, 
-    0xf7, 0x46, 0xff, 0x30, 0xd8, 0x30, 0xf7, 0x46, 0x76, 0x24, 0x08, 0x00, 0xbd, 0x28, 0x02, 
-    0x00, 0x69, 0x53, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb5, 0x00, 0x69, 
-    0xff, 0x21, 0x02, 0x31, 0x09, 0x5c, 0x09, 0x29, 0x05, 0xd1, 0x01, 0x21, 0x00, 0x22, 0x8e, 
-    0x46, 0xcb, 0x4b, 0xfe, 0x44, 0x18, 0x47, 0x00, 0xbd, 0xca, 0x4a, 0x11, 0x88, 0x01, 0x20, 
-    0x40, 0x03, 0x08, 0x43, 0x10, 0x80, 0xf7, 0x46, 0x30, 0xb5, 0x00, 0x69, 0xf4, 0x21, 0x08, 
-    0x5c, 0x01, 0x28, 0x16, 0xd1, 0xc5, 0x48, 0x00, 0x78, 0x03, 0x28, 0x12, 0xd0, 0x00, 0x25, 
-    0x28, 0x1c, 0xc3, 0x49, 0x01, 0x24, 0xa6, 0x46, 0xc2, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0x00, 
-    0x28, 0x08, 0xd0, 0xc1, 0x49, 0xc1, 0x4a, 0xbb, 0x32, 0x20, 0x20, 0x2b, 0x1c, 0xa6, 0x46, 
-    0xc0, 0x4c, 0xfe, 0x44, 0x20, 0x47, 0x30, 0xbd, 0x70, 0xb5, 0x85, 0x69, 0x00, 0x7d, 0x80, 
-    0x1f, 0x11, 0xd0, 0x47, 0x38, 0x2e, 0xd1, 0xa9, 0x79, 0x28, 0x20, 0x48, 0x43, 0xba, 0x4a, 
-    0x10, 0x18, 0x23, 0x22, 0x12, 0x5c, 0x01, 0x2a, 0x25, 0xd1, 0x80, 0x7b, 0x00, 0x28, 0x22, 
-    0xd0, 0xb6, 0x4a, 0x00, 0x20, 0x50, 0x54, 0x70, 0xbd, 0x01, 0x24, 0xa6, 0x46, 0xef, 0x48, 
-    0xfe, 0x44, 0x00, 0x47, 
+    //
+    //
+    0x01,
+    0x05,
+    0xff,
+    0xff,
+    0xd0,
+    0x65,
+    0x08,
+    0x00,
+    0xfa,
+    0x0c,
+    0x1a,
+    0x09,
+    0x0c,
+    0x01,
+    0x6a,
+    0xc8,
+    0x7b,
+    0x00,
+    0x02,
+    0x89,
+    0x7b,
+    0x01,
+    0x43,
+    0x09,
+    0x48,
+    0x51,
+    0x30,
+    0x02,
+    0x88,
+    0x06,
+    0x48,
+    0x91,
+    0x42,
+    0x03,
+    0xd1,
+    0x04,
+    0x49,
+    0x09,
+    0x78,
+    0x01,
+    0x29,
+    0x01,
+    0xd0,
+    0x5d,
+    0x30,
+    0xf7,
+    0x46,
+    0xff,
+    0x30,
+    0xd8,
+    0x30,
+    0xf7,
+    0x46,
+    0x76,
+    0x24,
+    0x08,
+    0x00,
+    0xbd,
+    0x28,
+    0x02,
+    0x00,
+    0x69,
+    0x53,
+    0x08,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0xb5,
+    0x00,
+    0x69,
+    0xff,
+    0x21,
+    0x02,
+    0x31,
+    0x09,
+    0x5c,
+    0x09,
+    0x29,
+    0x05,
+    0xd1,
+    0x01,
+    0x21,
+    0x00,
+    0x22,
+    0x8e,
+    0x46,
+    0xcb,
+    0x4b,
+    0xfe,
+    0x44,
+    0x18,
+    0x47,
+    0x00,
+    0xbd,
+    0xca,
+    0x4a,
+    0x11,
+    0x88,
+    0x01,
+    0x20,
+    0x40,
+    0x03,
+    0x08,
+    0x43,
+    0x10,
+    0x80,
+    0xf7,
+    0x46,
+    0x30,
+    0xb5,
+    0x00,
+    0x69,
+    0xf4,
+    0x21,
+    0x08,
+    0x5c,
+    0x01,
+    0x28,
+    0x16,
+    0xd1,
+    0xc5,
+    0x48,
+    0x00,
+    0x78,
+    0x03,
+    0x28,
+    0x12,
+    0xd0,
+    0x00,
+    0x25,
+    0x28,
+    0x1c,
+    0xc3,
+    0x49,
+    0x01,
+    0x24,
+    0xa6,
+    0x46,
+    0xc2,
+    0x4a,
+    0xfe,
+    0x44,
+    0x10,
+    0x47,
+    0x00,
+    0x28,
+    0x08,
+    0xd0,
+    0xc1,
+    0x49,
+    0xc1,
+    0x4a,
+    0xbb,
+    0x32,
+    0x20,
+    0x20,
+    0x2b,
+    0x1c,
+    0xa6,
+    0x46,
+    0xc0,
+    0x4c,
+    0xfe,
+    0x44,
+    0x20,
+    0x47,
+    0x30,
+    0xbd,
+    0x70,
+    0xb5,
+    0x85,
+    0x69,
+    0x00,
+    0x7d,
+    0x80,
+    0x1f,
+    0x11,
+    0xd0,
+    0x47,
+    0x38,
+    0x2e,
+    0xd1,
+    0xa9,
+    0x79,
+    0x28,
+    0x20,
+    0x48,
+    0x43,
+    0xba,
+    0x4a,
+    0x10,
+    0x18,
+    0x23,
+    0x22,
+    0x12,
+    0x5c,
+    0x01,
+    0x2a,
+    0x25,
+    0xd1,
+    0x80,
+    0x7b,
+    0x00,
+    0x28,
+    0x22,
+    0xd0,
+    0xb6,
+    0x4a,
+    0x00,
+    0x20,
+    0x50,
+    0x54,
+    0x70,
+    0xbd,
+    0x01,
+    0x24,
+    0xa6,
+    0x46,
+    0xef,
+    0x48,
+    0xfe,
+    0x44,
+    0x00,
+    0x47,
 
-    0x01, 0x05, 0xff, 0xff, 0xca, 0x66, 0x08, 0x00, 0xfa, 0x01, 0x28, 0x05, 0xd0, 0xa6, 0x46, 
-    0xec, 0x48, 0xfe, 0x44, 0x00, 0x47, 0x04, 0x28, 0x11, 0xd1, 0xe8, 0x78, 0x00, 0x28, 0x0e, 
-    0xd1, 0x0e, 0x26, 0x31, 0x1c, 0xe9, 0x4d, 0x28, 0x1c, 0x14, 0x38, 0xa6, 0x46, 0xe6, 0x4a, 
-    0xfe, 0x44, 0x10, 0x47, 0x28, 0x1c, 0x31, 0x1c, 0xa6, 0x46, 0xe3, 0x4a, 0xfe, 0x44, 0x10, 
-    0x47, 0x70, 0xbd, 0x70, 0xb5, 0x01, 0x1c, 0x88, 0x69, 0x89, 0x8a, 0xe1, 0x4a, 0x89, 0x1a, 
-    0x1c, 0xd0, 0x1c, 0x39, 0x20, 0xd1, 0xc5, 0x7a, 0x01, 0x21, 0x0c, 0x1c, 0x8e, 0x46, 0xde, 
-    0x4a, 0xfe, 0x44, 0x10, 0x47, 0x06, 0x1c, 0x10, 0x20, 0xa6, 0x46, 0xdc, 0x49, 0xfe, 0x44, 
-    0x08, 0x47, 0x00, 0x2d, 0x11, 0xd0, 0x02, 0x2e, 0x0f, 0xd0, 0xd9, 0x49, 0xda, 0x4a, 0xd9, 
-    0x32, 0x20, 0x20, 0x00, 0x23, 0xa6, 0x46, 0x92, 0x4c, 0xfe, 0x44, 0x20, 0x47, 0x70, 0xbd, 
-    0xc0, 0x7a, 0x00, 0x28, 0x02, 0xd1, 0x00, 0x20, 0xd4, 0x49, 0x08, 0x70, 0x70, 0xbd, 0x00, 
-    0xb5, 0x00, 0x69, 0xff, 0x21, 0x04, 0x31, 0x09, 0x5c, 0x06, 0x29, 0x06, 0xd1, 0xff, 0x21, 
-    0x05, 0x31, 0x0a, 0x5c, 0x2c, 0x2a, 0x01, 0xd1, 0x2d, 0x22, 0x0a, 0x54, 0xff, 0x21, 0x05, 
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-    0x2d, 0x0c, 0x02, 0x2d, 
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+    0x0a,
+    0x5c,
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+    0xf7,
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+    0x01,
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+    0x43,
+    0x05,
+    0x04,
+    0x2d,
+    0x0c,
+    0x02,
+    0x2d,
 
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-    0xa8, 0x42, 0x0e, 0xd1, 0xba, 0x48, 0x00, 0x78, 0x01, 0x28, 0x0a, 0xd1, 0xb9, 0x48, 0x82, 
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-    0xfe, 0x44, 0x18, 0x47, 0x35, 0x60, 0xb5, 0x48, 0x24, 0x30, 0x30, 0x62, 0xf0, 0xbd, 0xf0, 
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-    0x47, 0x00, 0x28, 0x0a, 0xd1, 0xa6, 0x46, 0xa9, 0x48, 0xfe, 0x44, 0x00, 0x47, 0x00, 0x28, 
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-    0xfe, 0x44, 0x00, 0x47, 
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+    0xe0,
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+    0x1a,
+    0x22,
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+    0x9c,
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+    0x18,
+    0x47,
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+    0x78,
+    0xc2,
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+    0x48,
+    0xa6,
+    0x46,
+    0x9b,
+    0x4b,
+    0xfe,
+    0x44,
+    0x18,
+    0x47,
+    0x06,
+    0x20,
+    0xb8,
+    0x80,
+    0x08,
+    0x25,
+    0x35,
+    0x70,
+    0x01,
+    0x36,
+    0x30,
+    0x1c,
+    0x00,
+    0x21,
+    0xa6,
+    0x46,
+    0x96,
+    0x4a,
+    0xfe,
+    0x44,
+    0x10,
+    0x47,
+    0x06,
+    0x1c,
+    0x35,
+    0x70,
+    0x01,
+    0x36,
+    0x30,
+    0x1c,
+    0x0d,
+    0x21,
+    0xa6,
+    0x46,
+    0x92,
+    0x4a,
+    0xfe,
+    0x44,
+    0x10,
+    0x47,
+    0x06,
+    0x1c,
+    0xa6,
+    0x46,
+    0x91,
+    0x48,
+    0xfe,
+    0x44,
+    0x00,
+    0x47,
 
-    0x01, 0x05, 0xff, 0xff, 0xbe, 0x68, 0x08, 0x00, 0xfa, 0x81, 0x02, 0x8a, 0x48, 0xc0, 0x78, 
-    0x40, 0x06, 0x40, 0x0e, 0x08, 0x43, 0x8c, 0x49, 0x01, 0x43, 0x09, 0x04, 0x09, 0x0c, 0x30, 
-    0x1c, 0xa6, 0x46, 0x88, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0x7d, 0x80, 0x38, 0x1c, 0xff, 0x21, 
-    0x02, 0x31, 0x00, 0x22, 0xa6, 0x46, 0x86, 0x4b, 0xfe, 0x44, 0x18, 0x47, 0x38, 0xe0, 0x38, 
-    0x1c, 0x00, 0x21, 0x6a, 0x46, 0x01, 0x24, 0xa6, 0x46, 0x84, 0x4b, 0xfe, 0x44, 0x18, 0x47, 
-    0x02, 0xa8, 0x00, 0x21, 0x06, 0x22, 0xa6, 0x46, 0x81, 0x4b, 0xfe, 0x44, 0x18, 0x47, 0x00, 
-    0x25, 0x02, 0xe0, 0x68, 0x1c, 0x05, 0x04, 0x2d, 0x0c, 0x66, 0x48, 0x4f, 0x38, 0x00, 0x78, 
-    0x85, 0x42, 0x23, 0xda, 0x11, 0x20, 0x40, 0x01, 0x68, 0x43, 0x7a, 0x49, 0x0e, 0x18, 0x10, 
-    0x20, 0x80, 0x19, 0x69, 0x46, 0xa6, 0x46, 0x78, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0x00, 0x28, 
-    0xe9, 0xd1, 0x68, 0x46, 0x02, 0xa9, 0xa6, 0x46, 0x74, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0x00, 
-    0x28, 0xe1, 0xd0, 0xb0, 0x78, 0x01, 0x28, 0xde, 0xd0, 0x38, 0x1c, 0x5c, 0x49, 0x3a, 0x22, 
-    0xa6, 0x46, 0x6f, 0x4b, 0xfe, 0x44, 0x18, 0x47, 0x69, 0x49, 0xe2, 0x31, 0x04, 0x98, 0x01, 
-    0x62, 0x05, 0xb0, 0xf0, 0xbd, 0xc0, 0x46, 0xdd, 0x9d, 0x00, 0x00, 0x3e, 0xa6, 0x1b, 0x00, 
-    0x18, 0x32, 0x08, 0x00, 0xce, 0x04, 0x00, 0x00, 0x23, 0xb9, 0x02, 0x00, 0xf1, 0x6b, 0x08, 
-    0x00, 0xfd, 0x79, 0x00, 0x00, 0x35, 0x6b, 0x08, 0x00, 0xd4, 0x1d, 0x08, 0x00, 0x94, 0x54, 
-    0x08, 0x00, 0xfe, 0xb5, 0x00, 0x90, 0x81, 0x69, 0x01, 0x91, 0x4c, 0x78, 0xc6, 0x69, 0x25, 
-    0x20, 0x20, 0x1a, 0x5d, 0x49, 0x32, 0xd0, 0x01, 0x38, 0x68, 0xd1, 0x05, 0x23, 0x03, 0x20, 
-    0x1a, 0x1c, 0x01, 0x25, 
+    0x01,
+    0x05,
+    0xff,
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+    0xbe,
+    0x68,
+    0x08,
+    0x00,
+    0xfa,
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+    0x38,
+    0x1c,
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+    0x46,
+    0x74,
+    0x4a,
+    0xfe,
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+    0x6d,
+    0x6c,
+    0x08,
+    0x00,
+    0x85,
+    0x6c,
+    0x08,
+    0x00,
+    0x9b,
+    0x6c,
+    0x08,
+    0x00,
+    0xa9,
+    0x6c,
+    0x08,
+    0x00,
+    0xd9,
+    0x6c,
+    0x08,
+    0x00,
+    0xed,
+    0x6c,
+    0x08,
+    0x00,
+    0x05,
+    0x6d,
+    0x08,
+    0x00,
+    0x95,
+    0x6d,
+    0x08,
+    0x00,
+    0x99,
+    0x6f,
+    0x08,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x31,
+    0x6c,
+    0x08,
+    0x00,
 
-    0x01, 0x05, 0xff, 0x85, 0x04, 0xf3, 0x1a, 0x00, 0x80, 0xce, 0xfb, 0x04, 0x00, 0xde, 0x33, 
-    0x02, 0x00, 0x14, 0x29, 0x02, 0x00, 0xf4, 0x4b, 0x04, 0x00, 0x60, 0x13, 0x02, 0x00, 0xd6, 
-    0x28, 0x05, 0x00, 0x74, 0x39, 0x02, 0x00, 0x88, 0xac, 0x00, 0x00, 0x0c, 0x76, 0x00, 0x00, 
-    0x06, 0x0a, 0x02, 0x00, 0x50, 0x98, 0x00, 0x00, 0xb4, 0xc6, 0x01, 0x00, 0x7a, 0x95, 0x00, 
-    0x00, 0xb8, 0x5e, 0x02, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x52, 0x48, 
-    0x00, 0x00, 
+    0x01,
+    0x05,
+    0xff,
+    0x85,
+    0x04,
+    0xf3,
+    0x1a,
+    0x00,
+    0x80,
+    0xce,
+    0xfb,
+    0x04,
+    0x00,
+    0xde,
+    0x33,
+    0x02,
+    0x00,
+    0x14,
+    0x29,
+    0x02,
+    0x00,
+    0xf4,
+    0x4b,
+    0x04,
+    0x00,
+    0x60,
+    0x13,
+    0x02,
+    0x00,
+    0xd6,
+    0x28,
+    0x05,
+    0x00,
+    0x74,
+    0x39,
+    0x02,
+    0x00,
+    0x88,
+    0xac,
+    0x00,
+    0x00,
+    0x0c,
+    0x76,
+    0x00,
+    0x00,
+    0x06,
+    0x0a,
+    0x02,
+    0x00,
+    0x50,
+    0x98,
+    0x00,
+    0x00,
+    0xb4,
+    0xc6,
+    0x01,
+    0x00,
+    0x7a,
+    0x95,
+    0x00,
+    0x00,
+    0xb8,
+    0x5e,
+    0x02,
+    0x00,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x52,
+    0x48,
+    0x00,
+    0x00,
 
-    0x01, 0x05, 0xff, 0xff, 0x00, 0x00, 0x18, 0x00, 0xfa, 0x70, 0xb5, 0x25, 0x4d, 0xae, 0x7f, 
-    0x01, 0x24, 0xa6, 0x46, 0x21, 0x48, 0xfe, 0x44, 0x00, 0x47, 0xb0, 0x42, 0xf8, 0xd1, 0x03, 
-    0x20, 0x17, 0x21, 0x89, 0x01, 0xa6, 0x46, 0x1d, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0xad, 0x7f, 
-    0xa6, 0x46, 0x1a, 0x48, 0xfe, 0x44, 0x00, 0x47, 0xa8, 0x42, 0xf9, 0xd1, 0xfe, 0xe7, 0x10, 
-    0xb5, 0x19, 0x49, 0x08, 0x1f, 0x19, 0x4a, 0x10, 0x60, 0x1c, 0x48, 0x02, 0x1c, 0x71, 0x3a, 
-    0x93, 0x24, 0x01, 0x23, 0xa3, 0x54, 0x16, 0x4b, 0x0b, 0x60, 0x02, 0x23, 0x13, 0x71, 0x15, 
-    0x4b, 0x4b, 0x60, 0x03, 0x23, 0x53, 0x71, 0x14, 0x4b, 0x8b, 0x60, 0x04, 0x23, 0x03, 0x70, 
-    0x14, 0x4b, 0xcb, 0x60, 0x05, 0x23, 0x83, 0x73, 0x13, 0x4b, 0x0b, 0x61, 0x06, 0x23, 0x03, 
-    0x73, 0x12, 0x4b, 0x4b, 0x61, 0x07, 0x23, 0x43, 0x71, 0x11, 0x4b, 0x8b, 0x61, 0x08, 0x23, 
-    0x33, 0x38, 0x03, 0x70, 0x10, 0x48, 0xc8, 0x61, 0x09, 0x20, 0xd0, 0x74, 0x0f, 0x48, 0x08, 
-    0x62, 0x10, 0xbd, 0x25, 0x86, 0x04, 0x00, 0x1b, 0x90, 0x04, 0x00, 0x6c, 0x52, 0x08, 0x00, 
-    0x08, 0x66, 0x08, 0x00, 0x20, 0x55, 0x08, 0x00, 0x5b, 0x70, 0x08, 0x00, 0x6f, 0x70, 0x08, 
-    0x00, 0x79, 0x70, 0x08, 0x00, 0x95, 0x55, 0x08, 0x00, 0x47, 0x70, 0x08, 0x00, 0x51, 0x70, 
-    0x08, 0x00, 0x65, 0x70, 0x08, 0x00, 0x29, 0x70, 0x08, 0x00, 0x33, 0x70, 0x08, 0x00, 0x3d, 
-    0x70, 0x08, 0x00, 0xf0, 0xb5, 0x0c, 0x22, 0x22, 0x4e, 0x32, 0x70, 0x1a, 0x23, 0x73, 0x70, 
-    0x09, 0x20, 0xb0, 0x70, 0xf2, 0x70, 0x03, 0x20, 0x20, 0x4d, 0x29, 0x1c, 0x01, 0x39, 0x01, 
-    0x24, 0xa6, 0x46, 0x1d, 0x4f, 0xfe, 0x44, 0x38, 0x47, 0xb2, 0x78, 0xf3, 0x78, 0x03, 0x20, 
-    0x29, 0x1c, 0xa6, 0x46, 
+    0x01,
+    0x05,
+    0xff,
+    0xff,
+    0x00,
+    0x00,
+    0x18,
+    0x00,
+    0xfa,
+    0x70,
+    0xb5,
+    0x25,
+    0x4d,
+    0xae,
+    0x7f,
+    0x01,
+    0x24,
+    0xa6,
+    0x46,
+    0x21,
+    0x48,
+    0xfe,
+    0x44,
+    0x00,
+    0x47,
+    0xb0,
+    0x42,
+    0xf8,
+    0xd1,
+    0x03,
+    0x20,
+    0x17,
+    0x21,
+    0x89,
+    0x01,
+    0xa6,
+    0x46,
+    0x1d,
+    0x4a,
+    0xfe,
+    0x44,
+    0x10,
+    0x47,
+    0xad,
+    0x7f,
+    0xa6,
+    0x46,
+    0x1a,
+    0x48,
+    0xfe,
+    0x44,
+    0x00,
+    0x47,
+    0xa8,
+    0x42,
+    0xf9,
+    0xd1,
+    0xfe,
+    0xe7,
+    0x10,
+    0xb5,
+    0x19,
+    0x49,
+    0x08,
+    0x1f,
+    0x19,
+    0x4a,
+    0x10,
+    0x60,
+    0x1c,
+    0x48,
+    0x02,
+    0x1c,
+    0x71,
+    0x3a,
+    0x93,
+    0x24,
+    0x01,
+    0x23,
+    0xa3,
+    0x54,
+    0x16,
+    0x4b,
+    0x0b,
+    0x60,
+    0x02,
+    0x23,
+    0x13,
+    0x71,
+    0x15,
+    0x4b,
+    0x4b,
+    0x60,
+    0x03,
+    0x23,
+    0x53,
+    0x71,
+    0x14,
+    0x4b,
+    0x8b,
+    0x60,
+    0x04,
+    0x23,
+    0x03,
+    0x70,
+    0x14,
+    0x4b,
+    0xcb,
+    0x60,
+    0x05,
+    0x23,
+    0x83,
+    0x73,
+    0x13,
+    0x4b,
+    0x0b,
+    0x61,
+    0x06,
+    0x23,
+    0x03,
+    0x73,
+    0x12,
+    0x4b,
+    0x4b,
+    0x61,
+    0x07,
+    0x23,
+    0x43,
+    0x71,
+    0x11,
+    0x4b,
+    0x8b,
+    0x61,
+    0x08,
+    0x23,
+    0x33,
+    0x38,
+    0x03,
+    0x70,
+    0x10,
+    0x48,
+    0xc8,
+    0x61,
+    0x09,
+    0x20,
+    0xd0,
+    0x74,
+    0x0f,
+    0x48,
+    0x08,
+    0x62,
+    0x10,
+    0xbd,
+    0x25,
+    0x86,
+    0x04,
+    0x00,
+    0x1b,
+    0x90,
+    0x04,
+    0x00,
+    0x6c,
+    0x52,
+    0x08,
+    0x00,
+    0x08,
+    0x66,
+    0x08,
+    0x00,
+    0x20,
+    0x55,
+    0x08,
+    0x00,
+    0x5b,
+    0x70,
+    0x08,
+    0x00,
+    0x6f,
+    0x70,
+    0x08,
+    0x00,
+    0x79,
+    0x70,
+    0x08,
+    0x00,
+    0x95,
+    0x55,
+    0x08,
+    0x00,
+    0x47,
+    0x70,
+    0x08,
+    0x00,
+    0x51,
+    0x70,
+    0x08,
+    0x00,
+    0x65,
+    0x70,
+    0x08,
+    0x00,
+    0x29,
+    0x70,
+    0x08,
+    0x00,
+    0x33,
+    0x70,
+    0x08,
+    0x00,
+    0x3d,
+    0x70,
+    0x08,
+    0x00,
+    0xf0,
+    0xb5,
+    0x0c,
+    0x22,
+    0x22,
+    0x4e,
+    0x32,
+    0x70,
+    0x1a,
+    0x23,
+    0x73,
+    0x70,
+    0x09,
+    0x20,
+    0xb0,
+    0x70,
+    0xf2,
+    0x70,
+    0x03,
+    0x20,
+    0x20,
+    0x4d,
+    0x29,
+    0x1c,
+    0x01,
+    0x39,
+    0x01,
+    0x24,
+    0xa6,
+    0x46,
+    0x1d,
+    0x4f,
+    0xfe,
+    0x44,
+    0x38,
+    0x47,
+    0xb2,
+    0x78,
+    0xf3,
+    0x78,
+    0x03,
+    0x20,
+    0x29,
+    0x1c,
+    0xa6,
+    0x46,
 
-    0x01, 0x05, 0xff, 0x8b, 0xfa, 0x00, 0x18, 0x00, 0x86, 0x19, 0x4e, 0xfe, 0x44, 0x30, 0x47, 
-    0x03, 0x20, 0x29, 0x1c, 0x01, 0x31, 0xa6, 0x46, 0x17, 0x4a, 0xfe, 0x44, 0x10, 0x47, 0xa6, 
-    0x46, 0x16, 0x48, 0xfe, 0x44, 0x00, 0x47, 0x16, 0x4b, 0x00, 0x21, 0x08, 0x1c, 0x1a, 0x68, 
-    0x00, 0x2a, 0x04, 0xd0, 0x02, 0x07, 0x15, 0x0f, 0x22, 0x1c, 0xaa, 0x40, 0x11, 0x43, 0x02, 
-    0x07, 0x12, 0x0f, 0x0f, 0x2a, 0x05, 0xd1, 0xc5, 0x08, 0x06, 0x22, 0x2a, 0x40, 0x0e, 0x4d, 
-    0xa9, 0x52, 0x00, 0x21, 0x04, 0x33, 0x01, 0x30, 0x20, 0x28, 0xe9, 0xd3, 0x0c, 0x48, 0x01, 
-    0x1c, 0x50, 0x31, 0x0c, 0x70, 0x0a, 0x21, 0x09, 0x4a, 0x11, 0x70, 0x2a, 0x21, 0x01, 0x70, 
-    0xf0, 0xbd, 0xfc, 0x53, 0x08, 0x00, 0x31, 0x90, 0x04, 0x00, 0xc6, 0x05, 0x00, 0x00, 0x1b, 
-    0x90, 0x04, 0x00, 0x33, 0x00, 0x18, 0x00, 0x80, 0x7b, 0x08, 0x00, 0x84, 0xf3, 0x1a, 0x00, 
-    0x6d, 0x22, 0x08, 0x00, 0x69, 0x53, 0x08, 0x00, 
+    0x01,
+    0x05,
+    0xff,
+    0x8b,
+    0xfa,
+    0x00,
+    0x18,
+    0x00,
+    0x86,
+    0x19,
+    0x4e,
+    0xfe,
+    0x44,
+    0x30,
+    0x47,
+    0x03,
+    0x20,
+    0x29,
+    0x1c,
+    0x01,
+    0x31,
+    0xa6,
+    0x46,
+    0x17,
+    0x4a,
+    0xfe,
+    0x44,
+    0x10,
+    0x47,
+    0xa6,
+    0x46,
+    0x16,
+    0x48,
+    0xfe,
+    0x44,
+    0x00,
+    0x47,
+    0x16,
+    0x4b,
+    0x00,
+    0x21,
+    0x08,
+    0x1c,
+    0x1a,
+    0x68,
+    0x00,
+    0x2a,
+    0x04,
+    0xd0,
+    0x02,
+    0x07,
+    0x15,
+    0x0f,
+    0x22,
+    0x1c,
+    0xaa,
+    0x40,
+    0x11,
+    0x43,
+    0x02,
+    0x07,
+    0x12,
+    0x0f,
+    0x0f,
+    0x2a,
+    0x05,
+    0xd1,
+    0xc5,
+    0x08,
+    0x06,
+    0x22,
+    0x2a,
+    0x40,
+    0x0e,
+    0x4d,
+    0xa9,
+    0x52,
+    0x00,
+    0x21,
+    0x04,
+    0x33,
+    0x01,
+    0x30,
+    0x20,
+    0x28,
+    0xe9,
+    0xd3,
+    0x0c,
+    0x48,
+    0x01,
+    0x1c,
+    0x50,
+    0x31,
+    0x0c,
+    0x70,
+    0x0a,
+    0x21,
+    0x09,
+    0x4a,
+    0x11,
+    0x70,
+    0x2a,
+    0x21,
+    0x01,
+    0x70,
+    0xf0,
+    0xbd,
+    0xfc,
+    0x53,
+    0x08,
+    0x00,
+    0x31,
+    0x90,
+    0x04,
+    0x00,
+    0xc6,
+    0x05,
+    0x00,
+    0x00,
+    0x1b,
+    0x90,
+    0x04,
+    0x00,
+    0x33,
+    0x00,
+    0x18,
+    0x00,
+    0x80,
+    0x7b,
+    0x08,
+    0x00,
+    0x84,
+    0xf3,
+    0x1a,
+    0x00,
+    0x6d,
+    0x22,
+    0x08,
+    0x00,
+    0x69,
+    0x53,
+    0x08,
+    0x00,
 
-    0x01, 0x83, 0xff, 0x14, 0x79, 0x7b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x01,
+    0x83,
+    0xff,
+    0x14,
+    0x79,
+    0x7b,
+    0x08,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
 
-    // 
-    // 
-    0x01, 0x0c, 0xfd, 0x09, 0x01, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0x64, 0x00, 
+    //
+    //
+    0x01,
+    0x0c,
+    0xfd,
+    0x09,
+    0x01,
+    0x00,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x64,
+    0x00,
 
-    0x01, 0x09, 0xfd, 0x08, 0x58, 0x60, 0x1a, 0x00, 0x00, 0x10, 0x00, 0x10, 
+    0x01,
+    0x09,
+    0xfd,
+    0x08,
+    0x58,
+    0x60,
+    0x1a,
+    0x00,
+    0x00,
+    0x10,
+    0x00,
+    0x10,
 
-    0x01, 0x09, 0xfd, 0x08, 0x10, 0x60, 0x1a, 0x00, 0x10, 0x00, 0x10, 0x00, 
+    0x01,
+    0x09,
+    0xfd,
+    0x08,
+    0x10,
+    0x60,
+    0x1a,
+    0x00,
+    0x10,
+    0x00,
+    0x10,
+    0x00,
 
-    0x01, 0x1c, 0xfd, 0x14, 0xff, 0x88, 0x13, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xff, 0xff, 
-    0xff, 0xff, 0xff, 0x00, 0xfa, 0x00, 0xff, 0xff, 0x00, 
+    0x01,
+    0x1c,
+    0xfd,
+    0x14,
+    0xff,
+    0x88,
+    0x13,
+    0x00,
+    0x00,
+    0xff,
+    0x00,
+    0x00,
+    0x00,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x00,
+    0xfa,
+    0x00,
+    0xff,
+    0xff,
+    0x00,
 
-    // 
-    // 
+    //
+    //
     // ##--------------------------------------------------------------------------------
     // ## Description:   ORCA_C Commercial PHY FW Initialization Script
     // ##--------------------------------------------------------------------------------
-    0x01, 0x76, 0xfd, 0x31, 0x01, 0x21, 0x54, 0x00, 0x00, 0x61, 0x57, 0x00, 0x00, 0x14, 0x05, 
-    0x0a, 0x05, 0x00, 0x07, 0x06, 0x0a, 0x04, 0x05, 0x08, 0x09, 0x0b, 0x0c, 0x0d, 0x0e, 0x10, 
-    0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 
-    0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 
+    0x01,
+    0x76,
+    0xfd,
+    0x31,
+    0x01,
+    0x21,
+    0x54,
+    0x00,
+    0x00,
+    0x61,
+    0x57,
+    0x00,
+    0x00,
+    0x14,
+    0x05,
+    0x0a,
+    0x05,
+    0x00,
+    0x07,
+    0x06,
+    0x0a,
+    0x04,
+    0x05,
+    0x08,
+    0x09,
+    0x0b,
+    0x0c,
+    0x0d,
+    0x0e,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x10,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
 
     // BTstack: added HCI_VS_SET_POWER_VECTOR(GFSK) 0xFD82 template
-    0x01, 0x82, 0xfd, 0x14, 0x00, 0x9c, 0x18, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xdc,
-    0xe6, 0xf0, 0xfa, 0x04, 0x0e, 0x18, 0xff, 0x00, 0x00,
+    0x01,
+    0x82,
+    0xfd,
+    0x14,
+    0x00,
+    0x9c,
+    0x18,
+    0xd2,
+    0xd2,
+    0xd2,
+    0xd2,
+    0xd2,
+    0xd2,
+    0xd2,
+    0xdc,
+    0xe6,
+    0xf0,
+    0xfa,
+    0x04,
+    0x0e,
+    0x18,
+    0xff,
+    0x00,
+    0x00,
 
     // BTstack: added HCI_VS_SET_POWER_VECTOR(EDR2) 0xFD82 template
-    0x01, 0x82, 0xfd, 0x14, 0x01, 0x9c, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xd8, 
-    0xe2, 0xec, 0xf6, 0x00, 0x0a, 0x14, 0xff, 0x00, 0x00,
+    0x01,
+    0x82,
+    0xfd,
+    0x14,
+    0x01,
+    0x9c,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xd8,
+    0xe2,
+    0xec,
+    0xf6,
+    0x00,
+    0x0a,
+    0x14,
+    0xff,
+    0x00,
+    0x00,
 
     // BTstack: added HCI_VS_SET_POWER_VECTOR(EDR3) 0xFD82 for EDR3 template
-    0x01, 0x82, 0xfd, 0x14, 0x02, 0x9c, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xd8,
-    0xe2, 0xec, 0xf6, 0x00, 0x0a, 0x14, 0xff, 0x00, 0x00,
+    0x01,
+    0x82,
+    0xfd,
+    0x14,
+    0x02,
+    0x9c,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xce,
+    0xd8,
+    0xe2,
+    0xec,
+    0xf6,
+    0x00,
+    0x0a,
+    0x14,
+    0xff,
+    0x00,
+    0x00,
 
     // BTstack: added HCI_VS_SET_CLASS2_SINGLE_POWER 0xFD87 template
-    0x01, 0x87, 0xfd, 0x03, 0x0d, 0x0d, 0x0d,
+    0x01,
+    0x87,
+    0xfd,
+    0x03,
+    0x0d,
+    0x0d,
+    0x0d,
 
-    0x01, 0x80, 0xfd, 0x06, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 
+    0x01,
+    0x80,
+    0xfd,
+    0x06,
+    0x00,
+    0x01,
+    0x00,
+    0x00,
+    0x00,
+    0x01,
 
-    0x01, 0x80, 0xfd, 0x06, 0x3c, 0xf0, 0x5f, 0x00, 0x00, 0x00, 
+    0x01,
+    0x80,
+    0xfd,
+    0x06,
+    0x3c,
+    0xf0,
+    0x5f,
+    0x00,
+    0x00,
+    0x00,
 
-    // 
-    // 
-    // 
-    0x01, 0x38, 0xfe, 0x00, 
+    //
+    //
+    //
+    0x01,
+    0x38,
+    0xfe,
+    0x00,
 
-    // 
+    //
     // #################################################################
     // ## START of CC2564 Adds-On
     // #################################################################
-    // 
+    //
     // ## Enable fast clock XTAL support
-    0x01, 0x1c, 0xfd, 0x14, 0x01, 0x88, 0x13, 0x00, 0x00, 0xd0, 0x07, 0x00, 0x00, 0xff, 0xff, 
-    0x04, 0xff, 0xff, 0xff, 0xfa, 0x00, 0x00, 0x00, 0x00, 
+    0x01,
+    0x1c,
+    0xfd,
+    0x14,
+    0x01,
+    0x88,
+    0x13,
+    0x00,
+    0x00,
+    0xd0,
+    0x07,
+    0x00,
+    0x00,
+    0xff,
+    0xff,
+    0x04,
+    0xff,
+    0xff,
+    0xff,
+    0xfa,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
 
-    // 
+    //
     // ## Enable eHCILL
-    0x01, 0x2b, 0xfd, 0x05, 0x10, 0x00, 0x50, 0x00, 0x96, 
+    0x01,
+    0x2b,
+    0xfd,
+    0x05,
+    0x10,
+    0x00,
+    0x50,
+    0x00,
+    0x96,
 
-    // 
-    0x01, 0x0c, 0xfd, 0x09, 0x01, 0x01, 0x00, 0xff, 0xff, 0xff, 0xff, 0x64, 0x00, 
+    //
+    0x01,
+    0x0c,
+    0xfd,
+    0x09,
+    0x01,
+    0x01,
+    0x00,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x64,
+    0x00,
 
-    // 
+    //
     // #################################################################
     // ## END of CC2564 Adds-On
     // #################################################################
-    0x01, 0x5b, 0xfd, 0x02, 0x01, 0x01, 
+    0x01,
+    0x5b,
+    0xfd,
+    0x02,
+    0x01,
+    0x01,
 
-    // 
-    0x01, 0xdd, 0xfd, 0x01, 0x01, 
+    //
+    0x01,
+    0xdd,
+    0xfd,
+    0x01,
+    0x01,
 
 };
 
 const uint32_t cc256x_init_script_size = 3825;
-
diff --git a/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.cpp b/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.cpp
index d3838299f..e049661c9 100644
--- a/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.cpp
+++ b/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.cpp
@@ -13,106 +13,108 @@ extern "C"
 #include <stddef.h> // for null
 #include <btstack_run_loop_freertos.h>
 
-// #define DEBUG_UART
+    // #define DEBUG_UART
 
-namespace {  // interfacing
-// static hci_transport_config_uart_t *uart_config;
-// data source for integration with BTstack Runloop
-static btstack_data_source_t transport_data_source;
-// callbacks
-static void (*block_sent)(void);
-static void (*block_received)(void);
-};
+    namespace
+    { // interfacing
+        // static hci_transport_config_uart_t *uart_config;
+        // data source for integration with BTstack Runloop
+        static btstack_data_source_t transport_data_source;
+        // callbacks
+        static void (*block_sent)(void);
+        static void (*block_received)(void);
+    }; // namespace
 
-// and it's hci_transport_config_uart_t which is a bit different...
-static int uart_rt1051_init(const btstack_uart_config_t *config)
-{
-    LOG_INFO("Create BlueKitchen interface");
-    BlueKitchen *bt = BlueKitchen::getInstance();
-    return 0;
-}
+    // and it's hci_transport_config_uart_t which is a bit different...
+    static int uart_rt1051_init(const btstack_uart_config_t *config)
+    {
+        LOG_INFO("Create BlueKitchen interface");
+        BlueKitchen *bt = BlueKitchen::getInstance();
+        return 0;
+    }
 
-static int uart_rt1051_open()
-{
-    LOG_INFO("BlueKitchen uart open");
-    BlueKitchen::getInstance()->open();
-    return 0;
-}
+    static int uart_rt1051_open()
+    {
+        LOG_INFO("BlueKitchen uart open");
+        BlueKitchen::getInstance()->open();
+        return 0;
+    }
 
-static int uart_rt1051_close()
-{
-    LOG_INFO("BlueKitchen uart close");
-    BlueKitchen::getInstance()->close();
-    return 0;
-}
+    static int uart_rt1051_close()
+    {
+        LOG_INFO("BlueKitchen uart close");
+        BlueKitchen::getInstance()->close();
+        return 0;
+    }
 
-static void uart_rt1051_set_block_received(void (*handler)(void)) {
-    /// TODO read_ready_cb call from my thread
-    BlueKitchen::getInstance()->read_ready_cb = handler;
-}
+    static void uart_rt1051_set_block_received(void (*handler)(void))
+    {
+        /// TODO read_ready_cb call from my thread
+        BlueKitchen::getInstance()->read_ready_cb = handler;
+    }
 
-static void uart_rt1051_set_block_sent(void (*handler)(void)) {
-    BlueKitchen::getInstance()->write_done_cb = handler;
-}
+    static void uart_rt1051_set_block_sent(void (*handler)(void))
+    {
+        BlueKitchen::getInstance()->write_done_cb = handler;
+    }
 
-static int uart_rt1051_set_baudrate(uint32_t baudrate)
-{
-    BlueKitchen::getInstance()->set_baudrate(baudrate);
-    return 0;
-}
+    static int uart_rt1051_set_baudrate(uint32_t baudrate)
+    {
+        BlueKitchen::getInstance()->set_baudrate(baudrate);
+        return 0;
+    }
 
-static int uart_rt1051_set_parity(int pairity)
-{
-    // Not implemented
-    LOG_INFO("BlueKitchen set pairity: %d", pairity);
-    return 0;
-}
+    static int uart_rt1051_set_parity(int pairity)
+    {
+        // Not implemented
+        LOG_INFO("BlueKitchen set pairity: %d", pairity);
+        return 0;
+    }
 
-static int uart_rt1051_set_flowcontrol(int flowcontrol)
-{
-    LOG_INFO("BlueKitchen set flowcontrol: %d", flowcontrol);
-    // BlueKitchen::getInstance()->set_rts(); ??
-    return 0;
-}
+    static int uart_rt1051_set_flowcontrol(int flowcontrol)
+    {
+        LOG_INFO("BlueKitchen set flowcontrol: %d", flowcontrol);
+        // BlueKitchen::getInstance()->set_rts(); ??
+        return 0;
+    }
 
-static void uart_rt1051_receive_block(uint8_t *buffer, uint16_t len)
-{
+    static void uart_rt1051_receive_block(uint8_t *buffer, uint16_t len)
+    {
 #ifdef DEBUG_UART
-    LOG_INFO("<-- read: %d", len);
+        LOG_INFO("<-- read: %d", len);
 #endif
-    BlueKitchen::getInstance()->read(buffer, len);
-}
+        BlueKitchen::getInstance()->read(buffer, len);
+    }
 
-static void uart_rt1051_send_block(const uint8_t *buffer, uint16_t length)
-{
+    static void uart_rt1051_send_block(const uint8_t *buffer, uint16_t length)
+    {
 #ifdef DEBUG_UART
-    LOG_INFO("--> write: %d", length);
+        LOG_INFO("--> write: %d", length);
 #endif
-    BlueKitchen::getInstance()->write_blocking((char*)buffer, length);
-    /// TODO check me
-}
-
-static const btstack_uart_block_t btstack_uart_posix = {
-    /* int  (*init)(hci_transport_config_uart_t * config); */         uart_rt1051_init,
-    /* int  (*open)(void); */                                         uart_rt1051_open,
-    /* int  (*close)(void); */                                        uart_rt1051_close,
-    /* void (*set_block_received)(void (*handler)(void)); */          uart_rt1051_set_block_received,
-    /* void (*set_block_sent)(void (*handler)(void)); */              uart_rt1051_set_block_sent,
-    /* int  (*set_baudrate)(uint32_t baudrate); */                    uart_rt1051_set_baudrate,
-    /* int  (*set_parity)(int parity); */                             uart_rt1051_set_parity,
-    /* int  (*set_flowcontrol)(int flowcontrol); */                   NULL, // uart_rt1051_set_flowcontrol,
-    /* void (*receive_block)(uint8_t *buffer, uint16_t len); */       uart_rt1051_receive_block,
-    /* void (*send_block)(const uint8_t *buffer, uint16_t length); */ uart_rt1051_send_block,
-    /* int (*get_supported_sleep_modes); */                           NULL,
-    /* void (*set_sleep)(btstack_uart_sleep_mode_t sleep_mode); */    NULL,
-    /* void (*set_wakeup_handler)(void (*handler)(void)); */          NULL,
-};
-
-//// TODO handle me
-const btstack_uart_block_t *btstack_uart_block_rt1051_instance()
-{
-    LOG_INFO("btstack_uart_block_rt1051_instance");
-    return &btstack_uart_posix;
-}
+        BlueKitchen::getInstance()->write_blocking((char *)buffer, length);
+        /// TODO check me
+    }
 
+    static const btstack_uart_block_t btstack_uart_posix = {
+        /* int  (*init)(hci_transport_config_uart_t * config); */ uart_rt1051_init,
+        /* int  (*open)(void); */ uart_rt1051_open,
+        /* int  (*close)(void); */ uart_rt1051_close,
+        /* void (*set_block_received)(void (*handler)(void)); */ uart_rt1051_set_block_received,
+        /* void (*set_block_sent)(void (*handler)(void)); */ uart_rt1051_set_block_sent,
+        /* int  (*set_baudrate)(uint32_t baudrate); */ uart_rt1051_set_baudrate,
+        /* int  (*set_parity)(int parity); */ uart_rt1051_set_parity,
+        /* int  (*set_flowcontrol)(int flowcontrol); */ NULL, // uart_rt1051_set_flowcontrol,
+        /* void (*receive_block)(uint8_t *buffer, uint16_t len); */ uart_rt1051_receive_block,
+        /* void (*send_block)(const uint8_t *buffer, uint16_t length); */ uart_rt1051_send_block,
+        /* int (*get_supported_sleep_modes); */ NULL,
+        /* void (*set_sleep)(btstack_uart_sleep_mode_t sleep_mode); */ NULL,
+        /* void (*set_wakeup_handler)(void (*handler)(void)); */ NULL,
+    };
+
+    //// TODO handle me
+    const btstack_uart_block_t *btstack_uart_block_rt1051_instance()
+    {
+        LOG_INFO("btstack_uart_block_rt1051_instance");
+        return &btstack_uart_posix;
+    }
 };
diff --git a/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.h b/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.h
index 1a244befb..b7950564c 100644
--- a/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.h
+++ b/module-bluetooth/Bluetooth/glucode/btstack_uart_block_rt1051.h
@@ -1,11 +1,12 @@
 #pragma once
 
 #ifdef __cplusplus
-extern "C"{
+extern "C"
+{
 #endif
 #include <btstack_uart_block.h>
 
-const btstack_uart_block_t *btstack_uart_block_rt1051_instance();
+    const btstack_uart_block_t *btstack_uart_block_rt1051_instance();
 
 #ifdef __cplusplus
 }; // __cplusplus
diff --git a/module-bluetooth/Bluetooth/glucode/hal_time_ms.c b/module-bluetooth/Bluetooth/glucode/hal_time_ms.c
index aab2682ed..4101614d7 100644
--- a/module-bluetooth/Bluetooth/glucode/hal_time_ms.c
+++ b/module-bluetooth/Bluetooth/glucode/hal_time_ms.c
@@ -4,5 +4,5 @@
 
 uint32_t hal_time_ms(void)
 {
-    return  xTaskGetTickCount();
+    return xTaskGetTickCount();
 }
diff --git a/module-bluetooth/Bluetooth/interface/bluekitchen/GAP.cpp b/module-bluetooth/Bluetooth/interface/bluekitchen/GAP.cpp
index 26e042f60..a63dc1eee 100644
--- a/module-bluetooth/Bluetooth/interface/bluekitchen/GAP.cpp
+++ b/module-bluetooth/Bluetooth/interface/bluekitchen/GAP.cpp
@@ -3,81 +3,102 @@
 #include <vector>
 #include <Bluetooth/Error.hpp>
 
-extern "C" {
+extern "C"
+{
 #include "btstack.h"
 };
 
 btstack_packet_callback_registration_t cb_handler;
-enum DEVICE_STATE { REMOTE_NAME_REQUEST, REMOTE_NAME_INQUIRED, REMOTE_NAME_FETCHED };
+enum DEVICE_STATE
+{
+    REMOTE_NAME_REQUEST,
+    REMOTE_NAME_INQUIRED,
+    REMOTE_NAME_FETCHED
+};
 
-struct Devicei :public Device {
-    public:
-        bd_addr_t address;
-        uint8_t            pageScanRepetitionMode;
-        uint16_t           clockOffset;
-        enum DEVICE_STATE  state;
-
-        Devicei(std::string name="") :name(name) {}
-        virtual ~Devicei() {}
-        void address_set(bd_addr_t *addr)
-        {
-            memcpy(&address,addr,sizeof address);
-        }
-        std::string name;
+struct Devicei : public Device
+{
+  public:
+    bd_addr_t address;
+    uint8_t pageScanRepetitionMode;
+    uint16_t clockOffset;
+    enum DEVICE_STATE state;
 
+    Devicei(std::string name = "") : name(name)
+    {}
+    virtual ~Devicei()
+    {}
+    void address_set(bd_addr_t *addr)
+    {
+        memcpy(&address, addr, sizeof address);
+    }
+    std::string name;
 };
 
 std::vector<Devicei> devices;
 
-static int getDeviceIndexForAddress(std::vector<Devicei> &devs, bd_addr_t addr){
+static int getDeviceIndexForAddress(std::vector<Devicei> &devs, bd_addr_t addr)
+{
     int j;
-    for (j=0; j< devs.size(); j++){
-        if (bd_addr_cmp(addr, devs[j].address) == 0){
+    for (j = 0; j < devs.size(); j++) {
+        if (bd_addr_cmp(addr, devs[j].address) == 0) {
             return j;
         }
     }
     return -1;
 }
 
-enum STATE {INIT, ACTIVE, DONE} ;
+enum STATE
+{
+    INIT,
+    ACTIVE,
+    DONE
+};
 enum STATE state = INIT;
 
 #define INQUIRY_INTERVAL 5
-static int start_scan(void){
+static int start_scan(void)
+{
     LOG_INFO("Starting inquiry scan..");
     return gap_inquiry_start(INQUIRY_INTERVAL);
 }
 
-static int has_more_remote_name_requests(void){
+static int has_more_remote_name_requests(void)
+{
     int i;
-    for (i=0;i<devices.size();i++) {
-        if (devices[i].state == REMOTE_NAME_REQUEST) return 1;
+    for (i = 0; i < devices.size(); i++) {
+        if (devices[i].state == REMOTE_NAME_REQUEST)
+            return 1;
     }
     return 0;
 }
 
-static void do_next_remote_name_request(void){
+static void do_next_remote_name_request(void)
+{
     int i;
-    for (i=0;i<devices.size();i++) {
+    for (i = 0; i < devices.size(); i++) {
         // remote name request
-        if (devices[i].state == REMOTE_NAME_REQUEST){
+        if (devices[i].state == REMOTE_NAME_REQUEST) {
             devices[i].state = REMOTE_NAME_INQUIRED;
             LOG_INFO("Get remote name of %s...", bd_addr_to_str(devices[i].address));
-            gap_remote_name_request( devices[i].address, devices[i].pageScanRepetitionMode,  devices[i].clockOffset | 0x8000);
+            gap_remote_name_request(
+                devices[i].address, devices[i].pageScanRepetitionMode, devices[i].clockOffset | 0x8000);
             return;
         }
     }
 }
 
-static void continue_remote_names(void){
-    if (has_more_remote_name_requests()){
+static void continue_remote_names(void)
+{
+    if (has_more_remote_name_requests()) {
         do_next_remote_name_request();
         return;
     }
     start_scan();
 }
 
-static void packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size){
+static void packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size)
+{
     UNUSED(channel);
     UNUSED(size);
 
@@ -85,136 +106,141 @@ static void packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packe
     int i;
     int index;
 
-    if (packet_type != HCI_EVENT_PACKET) return;
+    if (packet_type != HCI_EVENT_PACKET)
+        return;
 
     uint8_t event = hci_event_packet_get_type(packet);
 
-    switch(state){
-        /* @text In INIT, an inquiry  scan is started, and the application transits to
-         * ACTIVE state.
-         */
-        case INIT:
-            switch(event){
-                case BTSTACK_EVENT_STATE:
-                    if (btstack_event_state_get_state(packet) == HCI_STATE_WORKING){
-                        state = ACTIVE;
-                    }
-                    break;
-                default:
-                    break;
+    switch (state) {
+    /* @text In INIT, an inquiry  scan is started, and the application transits to
+     * ACTIVE state.
+     */
+    case INIT:
+        switch (event) {
+        case BTSTACK_EVENT_STATE:
+            if (btstack_event_state_get_state(packet) == HCI_STATE_WORKING) {
+                state = ACTIVE;
             }
             break;
-
-        /* @text In ACTIVE, the following events are processed:
-         *  - GAP Inquiry result event: BTstack provides a unified inquiry result that contain
-         *    Class of Device (CoD), page scan mode, clock offset. RSSI and name (from EIR) are optional.
-         *  - Inquiry complete event: the remote name is requested for devices without a fetched
-         *    name. The state of a remote name can be one of the following:
-         *    REMOTE_NAME_REQUEST, REMOTE_NAME_INQUIRED, or REMOTE_NAME_FETCHED.
-         *  - Remote name request complete event: the remote name is stored in the table and the
-         *    state is updated to REMOTE_NAME_FETCHED. The query of remote names is continued.
-         */
-        case ACTIVE:
-            switch(event){
-
-            case GAP_EVENT_INQUIRY_RESULT: {
-                gap_event_inquiry_result_get_bd_addr(packet, addr);
-                index = getDeviceIndexForAddress(devices, addr);
-                if (index >= 0)
-                    break; // already in our list
-
-                Devicei dev;
-                dev.address_set(&addr);
-                dev.pageScanRepetitionMode = gap_event_inquiry_result_get_page_scan_repetition_mode(packet);
-                dev.clockOffset = gap_event_inquiry_result_get_clock_offset(packet);
-                // print info
-                LOG_INFO("Device found: %s ", bd_addr_to_str(addr));
-                LOG_INFO("with COD: 0x%06x, ", (unsigned int)gap_event_inquiry_result_get_class_of_device(packet));
-                LOG_INFO("pageScan %d, ", dev.pageScanRepetitionMode);
-                LOG_INFO("clock offset 0x%04x", dev.clockOffset);
-                if (gap_event_inquiry_result_get_rssi_available(packet)) {
-                    LOG_INFO(", rssi %d dBm", (int8_t)gap_event_inquiry_result_get_rssi(packet));
-                }
-                if (gap_event_inquiry_result_get_name_available(packet)) {
-                    char name_buffer[240];
-                    int name_len = gap_event_inquiry_result_get_name_len(packet);
-                    memcpy(name_buffer, gap_event_inquiry_result_get_name(packet), name_len);
-                    name_buffer[name_len] = 0;
-                    LOG_INFO(", name '%s'", name_buffer);
-                    dev.state = REMOTE_NAME_FETCHED;
-                    ;
-                } else {
-                    dev.state = REMOTE_NAME_REQUEST;
-                }
-                LOG_INFO("");
-                devices.push_back(dev);
-            } break;
-
-                case GAP_EVENT_INQUIRY_COMPLETE:
-                    for (i=0;i<devices.size();i++) {
-                        // retry remote name request
-                        if (devices[i].state == REMOTE_NAME_INQUIRED)
-                            devices[i].state = REMOTE_NAME_REQUEST;
-                    }
-                    continue_remote_names();
-                    break;
-
-                case HCI_EVENT_REMOTE_NAME_REQUEST_COMPLETE: {
-                    reverse_bd_addr(&packet[3], addr);
-                    index = getDeviceIndexForAddress(devices,addr);
-                    if (index >= 0) {
-                        if (packet[2] == 0) {
-                            LOG_INFO("Name: '%s'", &packet[9]);
-                            devices[index].state = REMOTE_NAME_FETCHED;
-                            devices[index].name=reinterpret_cast<char*>(&packet[9]);
-                        } else {
-                            LOG_INFO("Failed to get name: page timeout");
-                        }
-                    }
-                    if(index+1 == devices.size()) {
-                        LOG_INFO("Scanned all");
-                        state = DONE;
-                    }
-                    continue_remote_names();
-                 }
-                 break;
-
-                default:
-                    break;
-            }
+        default:
             break;
+        }
+        break;
+
+    /* @text In ACTIVE, the following events are processed:
+     *  - GAP Inquiry result event: BTstack provides a unified inquiry result that contain
+     *    Class of Device (CoD), page scan mode, clock offset. RSSI and name (from EIR) are optional.
+     *  - Inquiry complete event: the remote name is requested for devices without a fetched
+     *    name. The state of a remote name can be one of the following:
+     *    REMOTE_NAME_REQUEST, REMOTE_NAME_INQUIRED, or REMOTE_NAME_FETCHED.
+     *  - Remote name request complete event: the remote name is stored in the table and the
+     *    state is updated to REMOTE_NAME_FETCHED. The query of remote names is continued.
+     */
+    case ACTIVE:
+        switch (event) {
+
+        case GAP_EVENT_INQUIRY_RESULT: {
+            gap_event_inquiry_result_get_bd_addr(packet, addr);
+            index = getDeviceIndexForAddress(devices, addr);
+            if (index >= 0)
+                break; // already in our list
+
+            Devicei dev;
+            dev.address_set(&addr);
+            dev.pageScanRepetitionMode = gap_event_inquiry_result_get_page_scan_repetition_mode(packet);
+            dev.clockOffset            = gap_event_inquiry_result_get_clock_offset(packet);
+            // print info
+            LOG_INFO("Device found: %s ", bd_addr_to_str(addr));
+            LOG_INFO("with COD: 0x%06x, ", (unsigned int)gap_event_inquiry_result_get_class_of_device(packet));
+            LOG_INFO("pageScan %d, ", dev.pageScanRepetitionMode);
+            LOG_INFO("clock offset 0x%04x", dev.clockOffset);
+            if (gap_event_inquiry_result_get_rssi_available(packet)) {
+                LOG_INFO(", rssi %d dBm", (int8_t)gap_event_inquiry_result_get_rssi(packet));
+            }
+            if (gap_event_inquiry_result_get_name_available(packet)) {
+                char name_buffer[240];
+                int name_len = gap_event_inquiry_result_get_name_len(packet);
+                memcpy(name_buffer, gap_event_inquiry_result_get_name(packet), name_len);
+                name_buffer[name_len] = 0;
+                LOG_INFO(", name '%s'", name_buffer);
+                dev.state = REMOTE_NAME_FETCHED;
+                ;
+            }
+            else {
+                dev.state = REMOTE_NAME_REQUEST;
+            }
+            LOG_INFO("");
+            devices.push_back(dev);
+        } break;
+
+        case GAP_EVENT_INQUIRY_COMPLETE:
+            for (i = 0; i < devices.size(); i++) {
+                // retry remote name request
+                if (devices[i].state == REMOTE_NAME_INQUIRED)
+                    devices[i].state = REMOTE_NAME_REQUEST;
+            }
+            continue_remote_names();
+            break;
+
+        case HCI_EVENT_REMOTE_NAME_REQUEST_COMPLETE: {
+            reverse_bd_addr(&packet[3], addr);
+            index = getDeviceIndexForAddress(devices, addr);
+            if (index >= 0) {
+                if (packet[2] == 0) {
+                    LOG_INFO("Name: '%s'", &packet[9]);
+                    devices[index].state = REMOTE_NAME_FETCHED;
+                    devices[index].name  = reinterpret_cast<char *>(&packet[9]);
+                }
+                else {
+                    LOG_INFO("Failed to get name: page timeout");
+                }
+            }
+            if (index + 1 == devices.size()) {
+                LOG_INFO("Scanned all");
+                state = DONE;
+            }
+            continue_remote_names();
+        } break;
 
         default:
             break;
-    }
-}
-
-namespace Bt {
-namespace GAP {
-
-Error register_scan()
-{
-    LOG_INFO("GAP register scan!");
-    /// -> this have to be called prior to power on!
-    hci_set_inquiry_mode(INQUIRY_MODE_RSSI_AND_EIR);
-    cb_handler.callback = &packet_handler;
-    hci_add_event_handler(&cb_handler);
-    return Error();
-}
-
-Error scan()
-{
-    // TODO We dont use results now, we dont store/return them
-    LOG_INFO("Start scan if active: %d: %d", hci_get_state(), state);
-    if(hci_get_state() == HCI_STATE_WORKING) {
-        if( int ret = start_scan() != 0 ) {
-            LOG_ERROR("Start scan error!: 0x%X", ret);
-            return Error(Error::LibraryError, ret);
         }
-    } else {
-        return Error(Error::NotReady);
+        break;
+
+    default:
+        break;
     }
-    return Error();
-}
-}
 }
+
+namespace Bt
+{
+    namespace GAP
+    {
+
+        Error register_scan()
+        {
+            LOG_INFO("GAP register scan!");
+            /// -> this have to be called prior to power on!
+            hci_set_inquiry_mode(INQUIRY_MODE_RSSI_AND_EIR);
+            cb_handler.callback = &packet_handler;
+            hci_add_event_handler(&cb_handler);
+            return Error();
+        }
+
+        Error scan()
+        {
+            // TODO We dont use results now, we dont store/return them
+            LOG_INFO("Start scan if active: %d: %d", hci_get_state(), state);
+            if (hci_get_state() == HCI_STATE_WORKING) {
+                if (int ret = start_scan() != 0) {
+                    LOG_ERROR("Start scan error!: 0x%X", ret);
+                    return Error(Error::LibraryError, ret);
+                }
+            }
+            else {
+                return Error(Error::NotReady);
+            }
+            return Error();
+        }
+    } // namespace GAP
+} // namespace Bt
diff --git a/module-bluetooth/Bluetooth/interface/bluekitchen/PAN.cpp b/module-bluetooth/Bluetooth/interface/bluekitchen/PAN.cpp
index ae1ce83b8..388958001 100644
--- a/module-bluetooth/Bluetooth/interface/bluekitchen/PAN.cpp
+++ b/module-bluetooth/Bluetooth/interface/bluekitchen/PAN.cpp
@@ -1,6 +1,7 @@
 #include <log/log.hpp>
 
-extern "C" {
+extern "C"
+{
 #include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
@@ -18,14 +19,13 @@ extern "C" {
 #include <hci.h>
 #include <hci_dump.h>
 #include <btstack_stdin.h>
-// #include <btstack_tlv_posix.h>
+    // #include <btstack_tlv_posix.h>
 
 #include <btstack_chipset_cc256x.h>
 #include <pan.h>
 #include <sdp_util.h>
 #include <bnep_lwip.h>
-#include<bluetooth_sdp.h>
-
+#include <bluetooth_sdp.h>
 };
 
 #include <BtCommand.hpp>
@@ -36,13 +36,14 @@ extern "C" {
 
 static btstack_packet_callback_registration_t hci_event_callback_registration;
 
-#define NETWORK_TYPE_IPv4       0x0800
-#define NETWORK_TYPE_ARP        0x0806
-#define NETWORK_TYPE_IPv6       0x86DD
+#define NETWORK_TYPE_IPv4 0x0800
+#define NETWORK_TYPE_ARP  0x0806
+#define NETWORK_TYPE_IPv6 0x86DD
 
 static uint8_t pan_sdp_record[220];
 
-static void packet_handler (uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size){
+static void packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size)
+{
     /* LISTING_PAUSE */
     UNUSED(channel);
     UNUSED(size);
@@ -50,109 +51,127 @@ static void packet_handler (uint8_t packet_type, uint16_t channel, uint8_t *pack
     bd_addr_t event_addr;
 
     switch (packet_type) {
-        case HCI_EVENT_PACKET:
-            switch (hci_event_packet_get_type(packet)) {
+    case HCI_EVENT_PACKET:
+        switch (hci_event_packet_get_type(packet)) {
 
-                case HCI_EVENT_PIN_CODE_REQUEST:
-                    // inform about pin code request
-                    LOG_INFO("Pin code request - using '0000'");
-                    hci_event_pin_code_request_get_bd_addr(packet, event_addr);
-                    gap_pin_code_response(event_addr, "0000");
-                    break;
+        case HCI_EVENT_PIN_CODE_REQUEST:
+            // inform about pin code request
+            LOG_INFO("Pin code request - using '0000'");
+            hci_event_pin_code_request_get_bd_addr(packet, event_addr);
+            gap_pin_code_response(event_addr, "0000");
+            break;
 
-                case HCI_EVENT_USER_CONFIRMATION_REQUEST:
-                    // inform about user confirmation request
-                    LOG_INFO("SSP User Confirmation Auto accept");
-                    hci_event_user_confirmation_request_get_bd_addr(packet, event_addr);
-                    break;
+        case HCI_EVENT_USER_CONFIRMATION_REQUEST:
+            // inform about user confirmation request
+            LOG_INFO("SSP User Confirmation Auto accept");
+            hci_event_user_confirmation_request_get_bd_addr(packet, event_addr);
+            break;
 
-                /* @text BNEP_EVENT_CHANNEL_OPENED is received after a BNEP connection was established or
-                 * or when the connection fails. The status field returns the error code.
-                 */
-                case BNEP_EVENT_CHANNEL_OPENED:
-                    if (bnep_event_channel_opened_get_status(packet)) {
-                        LOG_INFO("BNEP channel open failed, status %02x", bnep_event_channel_opened_get_status(packet));
-                    } else {
-                        uint16_t uuid_source = bnep_event_channel_opened_get_source_uuid(packet);
-                        uint16_t uuid_dest   = bnep_event_channel_opened_get_destination_uuid(packet);
-                        uint16_t mtu         = bnep_event_channel_opened_get_mtu(packet);
-                        bnep_event_channel_opened_get_remote_address(packet, event_addr);
-                        LOG_INFO("BNEP connection open succeeded to %s source UUID 0x%04x dest UUID: 0x%04x, max frame size %u", bd_addr_to_str(event_addr), uuid_source, uuid_dest, mtu);
-                        LOG_INFO("Please open 'http://192.168.7.1' in your web browser: ");
-                    }
-                    break;
-
-                /* @text BNEP_EVENT_CHANNEL_CLOSED is received when the connection gets closed.
-                 */
-                case BNEP_EVENT_CHANNEL_CLOSED:
-                    LOG_INFO("BNEP channel closed");
-                    break;
-
-                default:
-                    break;
+        /* @text BNEP_EVENT_CHANNEL_OPENED is received after a BNEP connection was established or
+         * or when the connection fails. The status field returns the error code.
+         */
+        case BNEP_EVENT_CHANNEL_OPENED:
+            if (bnep_event_channel_opened_get_status(packet)) {
+                LOG_INFO("BNEP channel open failed, status %02x", bnep_event_channel_opened_get_status(packet));
+            }
+            else {
+                uint16_t uuid_source = bnep_event_channel_opened_get_source_uuid(packet);
+                uint16_t uuid_dest   = bnep_event_channel_opened_get_destination_uuid(packet);
+                uint16_t mtu         = bnep_event_channel_opened_get_mtu(packet);
+                bnep_event_channel_opened_get_remote_address(packet, event_addr);
+                LOG_INFO("BNEP connection open succeeded to %s source UUID 0x%04x dest UUID: 0x%04x, max frame size %u",
+                         bd_addr_to_str(event_addr),
+                         uuid_source,
+                         uuid_dest,
+                         mtu);
+                LOG_INFO("Please open 'http://192.168.7.1' in your web browser: ");
             }
             break;
+
+        /* @text BNEP_EVENT_CHANNEL_CLOSED is received when the connection gets closed.
+         */
+        case BNEP_EVENT_CHANNEL_CLOSED:
+            LOG_INFO("BNEP channel closed");
+            break;
+
         default:
             break;
+        }
+        break;
+    default:
+        break;
     }
 }
 
-namespace Bt {
-
-// TODO - in config...
-// TODO - set it settable...
-// Set local name with a template Bluetooth address, that will be automatically
-// replaced with a actual address once it is available, i.e. when BTstack boots
-Error set_name(std::string &name) {
-    // name has to have storage
-    constexpr uint32_t size = 64;
-    static char lname[size] = {0};
-    snprintf(lname, size,"%s %s", name.c_str(), "00:00:00:00:00:00");
-    LOG_INFO("Setting local name: %s", lname);
-    gap_set_local_name(lname);
-    return Error();
-}
-namespace PAN {
-
-Error bnep_setup()
+namespace Bt
 {
-    BluetoothWorker::Error  err = BluetoothWorker::Error::SuccessBt;
-    // Discoverable
-    // up and starts talking to a Bluetooth module.
-    gap_discoverable_control(1);
 
-    // register for HCI events
-    hci_event_callback_registration.callback = &packet_handler;
-    hci_add_event_handler(&hci_event_callback_registration);
+    // TODO - in config...
+    // TODO - set it settable...
+    // Set local name with a template Bluetooth address, that will be automatically
+    // replaced with a actual address once it is available, i.e. when BTstack boots
+    Error set_name(std::string &name)
+    {
+        // name has to have storage
+        constexpr uint32_t size = 64;
+        static char lname[size] = {0};
+        snprintf(lname, size, "%s %s", name.c_str(), "00:00:00:00:00:00");
+        LOG_INFO("Setting local name: %s", lname);
+        gap_set_local_name(lname);
+        return Error();
+    }
+    namespace PAN
+    {
 
-    // Initialize L2CAP
-    l2cap_init();
+        Error bnep_setup()
+        {
+            BluetoothWorker::Error err = BluetoothWorker::Error::SuccessBt;
+            // Discoverable
+            // up and starts talking to a Bluetooth module.
+            gap_discoverable_control(1);
 
-    // Initialize BNEP
-    bnep_init();
+            // register for HCI events
+            hci_event_callback_registration.callback = &packet_handler;
+            hci_add_event_handler(&hci_event_callback_registration);
 
-    // Init SDP
-    sdp_init();
-    memset(pan_sdp_record, 0, sizeof(pan_sdp_record));
-    uint16_t network_packet_types[] = { NETWORK_TYPE_IPv4, NETWORK_TYPE_ARP, 0};    // 0 as end of list
+            // Initialize L2CAP
+            l2cap_init();
 
-    // NAP Network Access Type: Other, 1 MB/s
-    pan_create_nap_sdp_record(pan_sdp_record, sdp_create_service_record_handle(), network_packet_types, NULL, NULL, BNEP_SECURITY_NONE, PAN_NET_ACCESS_TYPE_OTHER, 1000000, NULL, NULL);
-    sdp_register_service(pan_sdp_record);
-    LOG_INFO("SDP service record size: %u", de_get_len((uint8_t*) pan_sdp_record));
-    return Error();
-}
+            // Initialize BNEP
+            bnep_init();
 
-Error bnep_start() {
-    bnep_lwip_init();
+            // Init SDP
+            sdp_init();
+            memset(pan_sdp_record, 0, sizeof(pan_sdp_record));
+            uint16_t network_packet_types[] = {NETWORK_TYPE_IPv4, NETWORK_TYPE_ARP, 0}; // 0 as end of list
 
-    // Setup NAP Service via BENP lwIP adapter
-    bnep_lwip_register_service(BLUETOOTH_SERVICE_CLASS_NAP, 1691);
+            // NAP Network Access Type: Other, 1 MB/s
+            pan_create_nap_sdp_record(pan_sdp_record,
+                                      sdp_create_service_record_handle(),
+                                      network_packet_types,
+                                      NULL,
+                                      NULL,
+                                      BNEP_SECURITY_NONE,
+                                      PAN_NET_ACCESS_TYPE_OTHER,
+                                      1000000,
+                                      NULL,
+                                      NULL);
+            sdp_register_service(pan_sdp_record);
+            LOG_INFO("SDP service record size: %u", de_get_len((uint8_t *)pan_sdp_record));
+            return Error();
+        }
 
-    // register callback - to print state
-    bnep_lwip_register_packet_handler(packet_handler);
-    return Error();
-}
+        Error bnep_start()
+        {
+            bnep_lwip_init();
 
-}
-}
+            // Setup NAP Service via BENP lwIP adapter
+            bnep_lwip_register_service(BLUETOOTH_SERVICE_CLASS_NAP, 1691);
+
+            // register callback - to print state
+            bnep_lwip_register_packet_handler(packet_handler);
+            return Error();
+        }
+
+    } // namespace PAN
+} // namespace Bt
diff --git a/module-bluetooth/Bluetooth/interface/bluekitchen/Worker.cpp b/module-bluetooth/Bluetooth/interface/bluekitchen/Worker.cpp
index 318281e88..d297292ee 100644
--- a/module-bluetooth/Bluetooth/interface/bluekitchen/Worker.cpp
+++ b/module-bluetooth/Bluetooth/interface/bluekitchen/Worker.cpp
@@ -2,7 +2,8 @@
 
 // #define __BTSTACK_FILE__ ".c"
 
-extern "C" {
+extern "C"
+{
 #include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
@@ -21,14 +22,14 @@ extern "C" {
 
 #include <btstack_chipset_cc256x.h>
 #include <btstack_link_key_db_memory.h>
-
 };
 
 #ifdef TARGET_RT1051
 #include <Bluetooth/glucode/btstack_uart_block_rt1051.h>
 #include <btstack_run_loop_freertos.h>
 #else
-extern "C" {
+extern "C"
+{
 #include <btstack_run_loop_posix.h>
 #include <btstack_tlv_posix.h>
 }
@@ -43,50 +44,55 @@ extern "C" {
 // static const btstack_tlv_t * tlv_impl;
 // static btstack_tlv_posix_t   tlv_context;
 
-static void local_version_information_handler(uint8_t * packet);
+static void local_version_information_handler(uint8_t *packet);
 
 static hci_transport_config_uart_t config = {
-    .type = HCI_TRANSPORT_CONFIG_UART,
+    .type          = HCI_TRANSPORT_CONFIG_UART,
     .baudrate_init = 115200,
     .baudrate_main = 0, // main baudrate
-    .flowcontrol = 1,   // flow control
-    .device_name = NULL,
+    .flowcontrol   = 1, // flow control
+    .device_name   = NULL,
 };
 
 static btstack_packet_callback_registration_t hci_event_callback_registration;
 
-static void hci_packet_handler (uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size){
+static void hci_packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size)
+{
     bd_addr_t addr;
-    if (packet_type != HCI_EVENT_PACKET) return;
-    switch (hci_event_packet_get_type(packet)){
-        case BTSTACK_EVENT_STATE:
-            if (btstack_event_state_get_state(packet) != HCI_STATE_WORKING) break;
-            gap_local_bd_addr(addr);
-            LOG_INFO("BTstack up and running at %s",  bd_addr_to_str(addr));
-            // setup TLV
-//            strcpy(tlv_db_path, TLV_DB_PATH_PREFIX);
-//            strcat(tlv_db_path, bd_addr_to_str(addr));
-//            strcat(tlv_db_path, TLV_DB_PATH_POSTFIX);
-//            tlv_impl = btstack_tlv_posix_init_instance(&tlv_context, tlv_db_path);
-//            btstack_tlv_set_instance(tlv_impl, &tlv_context);
-            break;
-        case HCI_EVENT_COMMAND_COMPLETE:
-            if (HCI_EVENT_IS_COMMAND_COMPLETE(packet, hci_read_local_name)){
-                if (hci_event_command_complete_get_return_parameters(packet)[0]) break;
-                // terminate, name 248 chars
-                packet[6+248] = 0;
-                LOG_INFO("Local name: %s", &packet[6]);
-            }
-            if (HCI_EVENT_IS_COMMAND_COMPLETE(packet, hci_read_local_version_information)){
-                local_version_information_handler(packet);
-            }
-            break;
-        default:
+    if (packet_type != HCI_EVENT_PACKET)
+        return;
+    switch (hci_event_packet_get_type(packet)) {
+    case BTSTACK_EVENT_STATE:
+        if (btstack_event_state_get_state(packet) != HCI_STATE_WORKING)
             break;
+        gap_local_bd_addr(addr);
+        LOG_INFO("BTstack up and running at %s", bd_addr_to_str(addr));
+        // setup TLV
+        //            strcpy(tlv_db_path, TLV_DB_PATH_PREFIX);
+        //            strcat(tlv_db_path, bd_addr_to_str(addr));
+        //            strcat(tlv_db_path, TLV_DB_PATH_POSTFIX);
+        //            tlv_impl = btstack_tlv_posix_init_instance(&tlv_context, tlv_db_path);
+        //            btstack_tlv_set_instance(tlv_impl, &tlv_context);
+        break;
+    case HCI_EVENT_COMMAND_COMPLETE:
+        if (HCI_EVENT_IS_COMMAND_COMPLETE(packet, hci_read_local_name)) {
+            if (hci_event_command_complete_get_return_parameters(packet)[0])
+                break;
+            // terminate, name 248 chars
+            packet[6 + 248] = 0;
+            LOG_INFO("Local name: %s", &packet[6]);
+        }
+        if (HCI_EVENT_IS_COMMAND_COMPLETE(packet, hci_read_local_version_information)) {
+            local_version_information_handler(packet);
+        }
+        break;
+    default:
+        break;
     }
 }
 
-static void sigint_handler(int param){
+static void sigint_handler(int param)
+{
     UNUSED(param);
 
     LOG_INFO("CTRL-C - SIGINT received, shutting down..");
@@ -101,11 +107,13 @@ static void sigint_handler(int param){
 }
 
 static int led_state = 0;
-void hal_led_toggle(void){
+void hal_led_toggle(void)
+{
     led_state = 1 - led_state;
     LOG_INFO("LED State %u", led_state);
 }
-static void use_fast_uart(void){
+static void use_fast_uart(void)
+{
 #if defined(HAVE_POSIX_B240000_MAPPED_TO_3000000) || defined(HAVE_POSIX_B600_MAPPED_TO_3000000)
     LOG_INFO("Using 3000000 baud.");
     config.baudrate_main = 3000000;
@@ -118,7 +126,8 @@ static void use_fast_uart(void){
 #endif
 }
 
-static void local_version_information_handler(uint8_t * packet){
+static void local_version_information_handler(uint8_t *packet)
+{
     LOG_INFO("Local version information:");
     uint16_t hci_version    = packet[6];
     uint16_t hci_revision   = little_endian_read_16(packet, 7);
@@ -130,95 +139,95 @@ static void local_version_information_handler(uint8_t * packet){
     LOG_INFO("- LMP Version    0x%04x", lmp_version);
     LOG_INFO("- LMP Subversion 0x%04x", lmp_subversion);
     LOG_INFO("- Manufacturer 0x%04x", manufacturer);
-    switch (manufacturer){
-        case BLUETOOTH_COMPANY_ID_TEXAS_INSTRUMENTS_INC:
-            LOG_INFO("Texas Instruments - CC256x compatible chipset.");
-            if (lmp_subversion != btstack_chipset_cc256x_lmp_subversion()){
-                LOG_INFO("Error: LMP Subversion does not match initscript! ");
-                LOG_INFO("Your initscripts is for %s chipset", btstack_chipset_cc256x_lmp_subversion() < lmp_subversion ? "an older" : "a newer");
-                LOG_INFO("Please update Makefile to include the appropriate bluetooth_init_cc256???.c file");
-                exit(10);
-            }
-            use_fast_uart();
-            hci_set_chipset(btstack_chipset_cc256x_instance());
+    switch (manufacturer) {
+    case BLUETOOTH_COMPANY_ID_TEXAS_INSTRUMENTS_INC:
+        LOG_INFO("Texas Instruments - CC256x compatible chipset.");
+        if (lmp_subversion != btstack_chipset_cc256x_lmp_subversion()) {
+            LOG_INFO("Error: LMP Subversion does not match initscript! ");
+            LOG_INFO("Your initscripts is for %s chipset",
+                     btstack_chipset_cc256x_lmp_subversion() < lmp_subversion ? "an older" : "a newer");
+            LOG_INFO("Please update Makefile to include the appropriate bluetooth_init_cc256???.c file");
+            exit(10);
+        }
+        use_fast_uart();
+        hci_set_chipset(btstack_chipset_cc256x_instance());
 #ifdef ENABLE_EHCILL
-            LOG_INFO("eHCILL enabled.");
+        LOG_INFO("eHCILL enabled.");
 #else
-            LOG_INFO("eHCILL disable.");
+        LOG_INFO("eHCILL disable.");
 #endif
 
-            break;
-        case BLUETOOTH_COMPANY_ID_NORDIC_SEMICONDUCTOR_ASA:
-            LOG_INFO("Nordic Semiconductor nRF5 chipset.");
-            break;
-        default:
-            LOG_INFO("Unknown manufacturer / manufacturer not supported yet.\n");
-            break;
+        break;
+    case BLUETOOTH_COMPANY_ID_NORDIC_SEMICONDUCTOR_ASA:
+        LOG_INFO("Nordic Semiconductor nRF5 chipset.");
+        break;
+    default:
+        LOG_INFO("Unknown manufacturer / manufacturer not supported yet.\n");
+        break;
     }
 }
 
-extern "C" {
+extern "C"
+{
 #include <FreeRTOS.h>
 #include <task.h>
 };
 
-namespace Bt {
-void run_btstack(void*)
+namespace Bt
 {
-    LOG_INFO("- run BtStack loop\n");
-    btstack_run_loop_execute();
-}
+    void run_btstack(void *)
+    {
+        LOG_INFO("- run BtStack loop\n");
+        btstack_run_loop_execute();
+    }
 
-Error initialize_stack()
-{
-    btstack_memory_init();
+    Error initialize_stack()
+    {
+        btstack_memory_init();
 #ifdef TARGET_RT1051
-    btstack_run_loop_init(btstack_run_loop_freertos_get_instance());
-    const btstack_uart_block_t *uart_driver = btstack_uart_block_rt1051_instance();
-    /// TODO
-    //// here -> notify QHandle
+        btstack_run_loop_init(btstack_run_loop_freertos_get_instance());
+        const btstack_uart_block_t *uart_driver = btstack_uart_block_rt1051_instance();
+        /// TODO
+        //// here -> notify QHandle
 #else
-    btstack_run_loop_init(btstack_run_loop_posix_get_instance());
-    config.device_name = "/dev/telit";
-    LOG_INFO("H4 device: %s", config.device_name);
-    const btstack_uart_block_t *uart_driver = btstack_uart_block_posix_instance();
+        btstack_run_loop_init(btstack_run_loop_posix_get_instance());
+        config.device_name = "/dev/telit";
+        LOG_INFO("H4 device: %s", config.device_name);
+        const btstack_uart_block_t *uart_driver = btstack_uart_block_posix_instance();
 #endif
-    const hci_transport_t *transport = hci_transport_h4_instance(uart_driver);
-    const btstack_link_key_db_t * link_key_db = btstack_link_key_db_memory_instance();
-    hci_init(transport, (void *)&config);
-    hci_set_link_key_db(link_key_db);
+        const hci_transport_t *transport         = hci_transport_h4_instance(uart_driver);
+        const btstack_link_key_db_t *link_key_db = btstack_link_key_db_memory_instance();
+        hci_init(transport, (void *)&config);
+        hci_set_link_key_db(link_key_db);
 
-    hci_event_callback_registration.callback = &hci_packet_handler;
-    hci_add_event_handler(&hci_event_callback_registration);
-    LOG_DEBUG("BT worker run success");
-    return Error();
-}
+        hci_event_callback_registration.callback = &hci_packet_handler;
+        hci_add_event_handler(&hci_event_callback_registration);
+        LOG_DEBUG("BT worker run success");
+        return Error();
+    }
 
-Error register_hw_error_callback(std::function<void(uint8_t)> new_callback) {
-    static std::function<void(uint8_t)> callback = nullptr;
-    callback=new_callback;
-    hci_set_hardware_error_callback([](uint8_t val) -> void {
+    Error register_hw_error_callback(std::function<void(uint8_t)> new_callback)
+    {
+        static std::function<void(uint8_t)> callback = nullptr;
+        callback                                     = new_callback;
+        hci_set_hardware_error_callback([](uint8_t val) -> void {
             LOG_ERROR("Bluetooth HW ERROR! %d", val);
-            if(callback) {
+            if (callback) {
                 callback(val);
             }
         });
-    return Error();
-}
-
-Error run_stack(TaskHandle_t *handle)
-{
-    BaseType_t taskerr = 0;
-    LOG_INFO("Past last moment for Bt registration prior to RUN state");
-    hci_power_control(HCI_POWER_ON);
-    if ((taskerr = xTaskCreate(run_btstack, "BtStack",
-                               1024,
-                               NULL,
-                               tskIDLE_PRIORITY,
-                               handle)) != pdPASS) {
-      LOG_ERROR("BT Service failure! %d", taskerr);
-      return Error(Error::SystemError, taskerr);
+        return Error();
     }
-    return Error();
-}
-}
+
+    Error run_stack(TaskHandle_t *handle)
+    {
+        BaseType_t taskerr = 0;
+        LOG_INFO("Past last moment for Bt registration prior to RUN state");
+        hci_power_control(HCI_POWER_ON);
+        if ((taskerr = xTaskCreate(run_btstack, "BtStack", 1024, NULL, tskIDLE_PRIORITY, handle)) != pdPASS) {
+            LOG_ERROR("BT Service failure! %d", taskerr);
+            return Error(Error::SystemError, taskerr);
+        }
+        return Error();
+    }
+} // namespace Bt
diff --git a/module-bluetooth/Bluetooth/interface/bluekitchen/btstack_config.h b/module-bluetooth/Bluetooth/interface/bluekitchen/btstack_config.h
index 865a98cf8..df1b1896b 100644
--- a/module-bluetooth/Bluetooth/interface/bluekitchen/btstack_config.h
+++ b/module-bluetooth/Bluetooth/interface/bluekitchen/btstack_config.h
@@ -37,7 +37,7 @@
 
 // BTstack configuration. buffers, sizes, ...
 #define HCI_INCOMING_PRE_BUFFER_SIZE 14 // sizeof benep heade, avoid memcpy
-#define HCI_ACL_PAYLOAD_SIZE (1691 + 4)
+#define HCI_ACL_PAYLOAD_SIZE         (1691 + 4)
 
 // As an option - much slower (according to docs)
 // HCI Controller to Host Flow Control
@@ -49,4 +49,3 @@
 // #define HCI_HOST_SCO_PACKET_NUM 10
 // #define HCI_HOST_SCO_PACKET_LEN 60
 #endif
-
diff --git a/module-bluetooth/Bluetooth/interface/bluetopia/GAVD.cpp b/module-bluetooth/Bluetooth/interface/bluetopia/GAVD.cpp
index fd0380785..082579cfc 100644
--- a/module-bluetooth/Bluetooth/interface/bluetopia/GAVD.cpp
+++ b/module-bluetooth/Bluetooth/interface/bluetopia/GAVD.cpp
@@ -2,27 +2,26 @@
 #include "BtDev.hpp"
 #include "log/log.hpp"
 
-extern "C" {
+extern "C"
+{
 #include <AUDAPI.h>
 #include <BTPSKRNL.h>
 };
 
 // TODO separate classes by used stack... --> Yuck
-static BTPSCONST AUD_Stream_Format_t AudioSRCSupportedFormats[] =
-{
-   { 44100, 2, 0 },
-   { 48000, 2, 0 },
-   { 48000, 1, 0 },
-   { 44100, 1, 0 }
-};
-#define NUM_SRC_SUPPORTED_FORMATS (sizeof(AudioSRCSupportedFormats)/sizeof(AUD_Stream_Format_t))
+static BTPSCONST AUD_Stream_Format_t AudioSRCSupportedFormats[] = {
+    {44100, 2, 0}, {48000, 2, 0}, {48000, 1, 0}, {44100, 1, 0}};
+#define NUM_SRC_SUPPORTED_FORMATS (sizeof(AudioSRCSupportedFormats) / sizeof(AUD_Stream_Format_t))
 
-static void BTPSAPI AUD_Event_Callback(unsigned int id, AUD_Event_Data_t *AUD_Event_Data, unsigned long CallbackParameter);
+static void BTPSAPI AUD_Event_Callback(unsigned int id,
+                                       AUD_Event_Data_t *AUD_Event_Data,
+                                       unsigned long CallbackParameter);
 // <---
 //
 
-class GAVDi : public GAVD {
-public:
+class GAVDi : public GAVD
+{
+  public:
     GAVDi();
     ErrorBtProfile init(Stack *stack) override;
 };
@@ -35,7 +34,7 @@ GAVD *GAVD::create()
 GAVDi::GAVDi()
 {
     // TODO add depends
-    st=State::ProfileInactive;
+    st = State::ProfileInactive;
 }
 
 BtProfile::ErrorBtProfile GAVDi::init(Stack *stack)
@@ -43,27 +42,27 @@ BtProfile::ErrorBtProfile GAVDi::init(Stack *stack)
     ErrorBtProfile err = ErrorBtProfile::SuccessBtProfile;
     LOG_INFO("GAVD init");
     if (st != ProfileActive) {
-        AUD_Initialization_Info_t                InitializationInfo;
-        AUD_Stream_Initialization_Info_t         InitializationInfoSRC;
+        AUD_Initialization_Info_t InitializationInfo;
+        AUD_Stream_Initialization_Info_t InitializationInfoSRC;
         AUD_Remote_Control_Initialization_Info_t InitializationInfoAVR;
-        AUD_Remote_Control_Role_Info_t           RemoteControlRoleInfo;
+        AUD_Remote_Control_Role_Info_t RemoteControlRoleInfo;
 
         InitializationInfoSRC.InitializationFlags          = 0;
         InitializationInfoSRC.NumberConcurrentStreams      = 1;
-        InitializationInfoSRC.EndpointSDPDescription       = (char*)"A3DP Source";
+        InitializationInfoSRC.EndpointSDPDescription       = (char *)"A3DP Source";
         InitializationInfoSRC.NumberSupportedStreamFormats = NUM_SRC_SUPPORTED_FORMATS;
 
         /* Initialize the stream configuration supported format list.  */
         memcpy(InitializationInfoSRC.StreamFormat, AudioSRCSupportedFormats, sizeof(AudioSRCSupportedFormats));
 
-        RemoteControlRoleInfo.SupportedFeaturesFlags       = SDP_AVRCP_SUPPORTED_FEATURES_CONTROLLER_CATEGORY_1;
-        RemoteControlRoleInfo.ProviderName                 = (char*)"Texas Instruments";
-        RemoteControlRoleInfo.ServiceName                  = (char*)"STM32 A3DP Source";
+        RemoteControlRoleInfo.SupportedFeaturesFlags = SDP_AVRCP_SUPPORTED_FEATURES_CONTROLLER_CATEGORY_1;
+        RemoteControlRoleInfo.ProviderName           = (char *)"Texas Instruments";
+        RemoteControlRoleInfo.ServiceName            = (char *)"STM32 A3DP Source";
 
-        InitializationInfoAVR.InitializationFlags          = 0;
-        InitializationInfoAVR.TargetRoleInfo               = &RemoteControlRoleInfo;
-        InitializationInfoAVR.ControllerRoleInfo           = NULL;
-        InitializationInfoAVR.SupportedVersion             = apvVersion1_0;
+        InitializationInfoAVR.InitializationFlags = 0;
+        InitializationInfoAVR.TargetRoleInfo      = &RemoteControlRoleInfo;
+        InitializationInfoAVR.ControllerRoleInfo  = NULL;
+        InitializationInfoAVR.SupportedVersion    = apvVersion1_0;
 
         InitializationInfo.InitializationFlags             = 0;
         InitializationInfo.RemoteControlInitializationInfo = &InitializationInfoAVR;
@@ -71,7 +70,7 @@ BtProfile::ErrorBtProfile GAVDi::init(Stack *stack)
         InitializationInfo.SNKInitializationInfo           = NULL;
         InitializationInfo.InitializationFlags             = AUD_INITIALIZATION_INFO_FLAGS_OVERRIDE_MEDIA_MTU;
         InitializationInfo.MediaMTU                        = 800;
-        if(AUD_Initialize(stack->id, &InitializationInfo, AUD_Event_Callback, 0)==0)
+        if (AUD_Initialize(stack->id, &InitializationInfo, AUD_Event_Callback, 0) == 0)
             st = State::ProfileActive;
         else
             st = State::ProfileInactive;
@@ -79,138 +78,147 @@ BtProfile::ErrorBtProfile GAVDi::init(Stack *stack)
     return err;
 }
 
-static void BTPSAPI AUD_Event_Callback(unsigned int id, AUD_Event_Data_t *AUD_Event_Data, unsigned long CallbackParameter)
+static void BTPSAPI AUD_Event_Callback(unsigned int id,
+                                       AUD_Event_Data_t *AUD_Event_Data,
+                                       unsigned long CallbackParameter)
 {
     BtDev tmp;
-    if((id) && (AUD_Event_Data))
-    {
+    if ((id) && (AUD_Event_Data)) {
         LOG_INFO("");
-        switch(AUD_Event_Data->Event_Data_Type)
-        {
-            case etAUD_Open_Request_Indication:
-                tmp=AUD_Event_Data->Event_Data.AUD_Open_Request_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Open_Request_Indication");
-                LOG_INFO("BD_ADDR:               %s", tmp.tostr().c_str());
-                LOG_INFO("ConnectionRequestType: %d", AUD_Event_Data->Event_Data.AUD_Open_Request_Indication_Data->ConnectionRequestType);
-                break;
-            case etAUD_Stream_Open_Indication:
-                /* Occurs whenever the master device connects out to us.    */
-                break;
-            case etAUD_Stream_Open_Confirmation:
-                tmp=AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->BD_ADDR;
-                LOG_INFO("etAUD_Stream_Open_Confirmation");
-                LOG_INFO("Status:      %u", AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->OpenStatus);
-                LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
+        switch (AUD_Event_Data->Event_Data_Type) {
+        case etAUD_Open_Request_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Open_Request_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Open_Request_Indication");
+            LOG_INFO("BD_ADDR:               %s", tmp.tostr().c_str());
+            LOG_INFO("ConnectionRequestType: %d",
+                     AUD_Event_Data->Event_Data.AUD_Open_Request_Indication_Data->ConnectionRequestType);
+            break;
+        case etAUD_Stream_Open_Indication:
+            /* Occurs whenever the master device connects out to us.    */
+            break;
+        case etAUD_Stream_Open_Confirmation:
+            tmp = AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->BD_ADDR;
+            LOG_INFO("etAUD_Stream_Open_Confirmation");
+            LOG_INFO("Status:      %u", AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->OpenStatus);
+            LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
 
-//                if(AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->OpenStatus == AUD_STREAM_OPEN_CONFIRMATION_STATUS_SUCCESS)
-//                {
-//                    LOG_INFO("MediaMTU:    %d", AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->MediaMTU);
-//
-//                    OpenA3DPStream(AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data);
-//
-//                    /* Track this connection's BD_ADDR.                      */
-//                    RemoteSinkBD_ADDR = AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->BD_ADDR;
-//
-//                    if(PerformingAutoConnect)
-//                    {
-//                        PerformingAutoConnect = FALSE;
-//
-//                        /* If we autoconnected, then we should start playing. */
-//                        Play(NULL);
-//                    }
-//                }
-//                else
-//                {
-//                    LOG_INFO("Connection to %s failed.", tmp.tostr().c_str());
-//                    if(PerformingAutoConnect)
-//                    {
-//                        if(AutoConnectIndex < NumberofValidResponses)
-//                        {
-//                            /* Keep trying the auto-connection process.        */
-//                            AttemptNextAutoConnect();
-//                        }
-//                        else
-//                        {
-//                            LOG_INFO("Ending auto-connect process.");
-//                            PerformingAutoConnect = FALSE;
-//                        }
-//                    }
-//                }
-                break;
-            case etAUD_Stream_Close_Indication:
-                /* Occurs when the master either closes or disconnects.     */
-                tmp=AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Stream_Close_Indication");
-                LOG_INFO("BD_ADDR:          %s", tmp.tostr().c_str());
-                LOG_INFO("StreamType:       %d", AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->StreamType);
-                LOG_INFO("DisconnectReason: %d", AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->DisconnectReason);
+            //                if(AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->OpenStatus ==
+            //                AUD_STREAM_OPEN_CONFIRMATION_STATUS_SUCCESS)
+            //                {
+            //                    LOG_INFO("MediaMTU:    %d",
+            //                    AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->MediaMTU);
+            //
+            //                    OpenA3DPStream(AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data);
+            //
+            //                    /* Track this connection's BD_ADDR.                      */
+            //                    RemoteSinkBD_ADDR =
+            //                    AUD_Event_Data->Event_Data.AUD_Stream_Open_Confirmation_Data->BD_ADDR;
+            //
+            //                    if(PerformingAutoConnect)
+            //                    {
+            //                        PerformingAutoConnect = FALSE;
+            //
+            //                        /* If we autoconnected, then we should start playing. */
+            //                        Play(NULL);
+            //                    }
+            //                }
+            //                else
+            //                {
+            //                    LOG_INFO("Connection to %s failed.", tmp.tostr().c_str());
+            //                    if(PerformingAutoConnect)
+            //                    {
+            //                        if(AutoConnectIndex < NumberofValidResponses)
+            //                        {
+            //                            /* Keep trying the auto-connection process.        */
+            //                            AttemptNextAutoConnect();
+            //                        }
+            //                        else
+            //                        {
+            //                            LOG_INFO("Ending auto-connect process.");
+            //                            PerformingAutoConnect = FALSE;
+            //                        }
+            //                    }
+            //                }
+            break;
+        case etAUD_Stream_Close_Indication:
+            /* Occurs when the master either closes or disconnects.     */
+            tmp = AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Stream_Close_Indication");
+            LOG_INFO("BD_ADDR:          %s", tmp.tostr().c_str());
+            LOG_INFO("StreamType:       %d", AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->StreamType);
+            LOG_INFO("DisconnectReason: %d",
+                     AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->DisconnectReason);
 
-//                if(AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->DisconnectReason == adrRemoteDeviceDisconnect)
-//                {
-//                    /* Close the stream normally.                            */
-//                    CloseA3DPStream();
-//                }
-//                else
-//                {
-//                    /* On link loss or timeout, the A3DP API seems to return */
-//                    /* invalid connection handle error codes if we try to    */
-//                    /* close the stream. So, instead we will manually reset  */
-//                    /* the state here.                                       */
-//                    LOG_INFO("Resetting A3DP stream state.");
-//                    A3DPOpened  = FALSE;
-//                    A3DPPlaying = FALSE;
-//                }
+            //                if(AUD_Event_Data->Event_Data.AUD_Stream_Close_Indication_Data->DisconnectReason ==
+            //                adrRemoteDeviceDisconnect)
+            //                {
+            //                    /* Close the stream normally.                            */
+            //                    CloseA3DPStream();
+            //                }
+            //                else
+            //                {
+            //                    /* On link loss or timeout, the A3DP API seems to return */
+            //                    /* invalid connection handle error codes if we try to    */
+            //                    /* close the stream. So, instead we will manually reset  */
+            //                    /* the state here.                                       */
+            //                    LOG_INFO("Resetting A3DP stream state.");
+            //                    A3DPOpened  = FALSE;
+            //                    A3DPPlaying = FALSE;
+            //                }
 
-                break;
-            case etAUD_Remote_Control_Open_Indication:
-                tmp=AUD_Event_Data->Event_Data.AUD_Remote_Control_Open_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Remote_Control_Open_Indication");
-                LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
-                break;
-            case etAUD_Remote_Control_Close_Indication:
-                tmp=AUD_Event_Data->Event_Data.AUD_Remote_Control_Close_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Remote_Control_Close_Indication");
-                LOG_INFO("BD_ADDR:          %s", tmp.tostr().c_str());
-                LOG_INFO("DisconnectReason: %d", AUD_Event_Data->Event_Data.AUD_Remote_Control_Close_Indication_Data->DisconnectReason);
-                break;
-            case etAUD_Remote_Control_Command_Indication:
-                LOG_INFO("Remote controll command");
-                //ProcessIncomingRemoteControlCommand(AUD_Event_Data->Event_Data.AUD_Remote_Control_Command_Indication_Data);
-                break;
-            case etAUD_Stream_State_Change_Indication:
-                break;
-            case etAUD_Stream_State_Change_Confirmation:
-                tmp=AUD_Event_Data->Event_Data.AUD_Stream_State_Change_Confirmation_Data->BD_ADDR;
-                LOG_INFO("etAUD_Stream_State_Change_Confirmation");
-                LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
-//                if(AUD_Event_Data->Event_Data.AUD_Stream_State_Change_Confirmation_Data->StreamState == astStreamStarted)
-//                    //StartA3DPStream();
-//                else
-//                    //StopA3DPStream();
-//                break;
-            case etAUD_Stream_Format_Change_Indication:
-                tmp = AUD_Event_Data->Event_Data.AUD_Stream_Format_Change_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Stream_Format_Change_Indication");
-                LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
-//                if(A3DPOpened)
-//                    ReconfigureA3DPStream(&(AUD_Event_Data->Event_Data.AUD_Stream_Format_Change_Indication_Data->StreamFormat));
-                break;
-            case etAUD_Encoded_Audio_Data_Indication:
-                break;
-            case etAUD_Signalling_Channel_Open_Indication:
-                tmp = AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Open_Indication_Data->BD_ADDR;
-                LOG_INFO("etAUD_Signalling_Channel_Open_Indication");
-                LOG_INFO("BD_ADDR:  %s", tmp.tostr().c_str());
-                break;
-            case etAUD_Signalling_Channel_Close_Indication:
-                tmp = AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Close_Indication_Data->BD_ADDR, tmp.tostr().c_str();
-                LOG_INFO("etAUD_Signalling_Channel_Close_Indication");
-                LOG_INFO("BD_ADDR:  %s", tmp.tostr().c_str());
-                LOG_INFO("DisconnectReason: %d", AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Close_Indication_Data->DisconnectReason);
-                break;
-            default:
-                LOG_INFO("Unhandled AUD event: %d", AUD_Event_Data->Event_Data_Type);
-                break;
+            break;
+        case etAUD_Remote_Control_Open_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Remote_Control_Open_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Remote_Control_Open_Indication");
+            LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
+            break;
+        case etAUD_Remote_Control_Close_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Remote_Control_Close_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Remote_Control_Close_Indication");
+            LOG_INFO("BD_ADDR:          %s", tmp.tostr().c_str());
+            LOG_INFO("DisconnectReason: %d",
+                     AUD_Event_Data->Event_Data.AUD_Remote_Control_Close_Indication_Data->DisconnectReason);
+            break;
+        case etAUD_Remote_Control_Command_Indication:
+            LOG_INFO("Remote controll command");
+            // ProcessIncomingRemoteControlCommand(AUD_Event_Data->Event_Data.AUD_Remote_Control_Command_Indication_Data);
+            break;
+        case etAUD_Stream_State_Change_Indication:
+            break;
+        case etAUD_Stream_State_Change_Confirmation:
+            tmp = AUD_Event_Data->Event_Data.AUD_Stream_State_Change_Confirmation_Data->BD_ADDR;
+            LOG_INFO("etAUD_Stream_State_Change_Confirmation");
+            LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
+            //                if(AUD_Event_Data->Event_Data.AUD_Stream_State_Change_Confirmation_Data->StreamState ==
+            //                astStreamStarted)
+            //                    //StartA3DPStream();
+            //                else
+            //                    //StopA3DPStream();
+            //                break;
+        case etAUD_Stream_Format_Change_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Stream_Format_Change_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Stream_Format_Change_Indication");
+            LOG_INFO("BD_ADDR:     %s", tmp.tostr().c_str());
+            //                if(A3DPOpened)
+            //                    ReconfigureA3DPStream(&(AUD_Event_Data->Event_Data.AUD_Stream_Format_Change_Indication_Data->StreamFormat));
+            break;
+        case etAUD_Encoded_Audio_Data_Indication:
+            break;
+        case etAUD_Signalling_Channel_Open_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Open_Indication_Data->BD_ADDR;
+            LOG_INFO("etAUD_Signalling_Channel_Open_Indication");
+            LOG_INFO("BD_ADDR:  %s", tmp.tostr().c_str());
+            break;
+        case etAUD_Signalling_Channel_Close_Indication:
+            tmp = AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Close_Indication_Data->BD_ADDR, tmp.tostr().c_str();
+            LOG_INFO("etAUD_Signalling_Channel_Close_Indication");
+            LOG_INFO("BD_ADDR:  %s", tmp.tostr().c_str());
+            LOG_INFO("DisconnectReason: %d",
+                     AUD_Event_Data->Event_Data.AUD_Signalling_Channel_Close_Indication_Data->DisconnectReason);
+            break;
+        default:
+            LOG_INFO("Unhandled AUD event: %d", AUD_Event_Data->Event_Data_Type);
+            break;
         }
     }
 }
diff --git a/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.cpp b/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.cpp
index d8410371a..d77c86822 100644
--- a/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.cpp
+++ b/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.cpp
@@ -4,7 +4,8 @@
 
 #include <cstdio>
 
-extern "C" {
+extern "C"
+{
 #include <HCITRANS.h>
 #include <BTPSKRNL.h>
 #include <BSCAPI.h>
@@ -18,15 +19,17 @@ using namespace bsp;
 // WORK IN PROGRESS - in open() in A3DP example right now (Stack initialization...)
 struct HCI
 {
-    HCI_DriverInformation_t  driver;
-    HCI_HCILLConfiguration_t  ll;
+    HCI_DriverInformation_t driver;
+    HCI_HCILLConfiguration_t ll;
     HCI_Driver_Reconfigure_Data_t driver_reconfigure;
-    HCI() {
+    HCI()
+    {
         memset(&driver, 0, sizeof driver);
         memset(&ll, 0, sizeof ll);
         memset(&driver_reconfigure, 0, sizeof driver_reconfigure);
     }
-    ~HCI() {}
+    ~HCI()
+    {}
 };
 
 BluetoothWorker *WorkerImpl::create()
@@ -37,9 +40,9 @@ BluetoothWorker *WorkerImpl::create()
 WorkerImpl::WorkerImpl() : active_features(0)
 {
     LOG_INFO("Create bluetooth worker");
-    bt = Bluetopia::getInstance();
+    bt   = Bluetopia::getInstance();
     host = std::make_unique<BtDev>(BtDev());
-    hci = std::make_unique<HCI>(HCI());
+    hci  = std::make_unique<HCI>(HCI());
     bt->open();
     if (initialize_stack() != SuccessBt) {
         LOG_ERROR("initialize_stack error!");
@@ -70,25 +73,24 @@ WorkerImpl::WorkerImpl() : active_features(0)
 }
 
 WorkerImpl::~WorkerImpl()
-{
-}
+{}
 
-int lib_log_callback(int len,char* msg)
+int lib_log_callback(int len, char *msg)
 {
-    LOG_INFO("%.*s",len,msg);
+    LOG_INFO("%.*s", len, msg);
     return 0;
 }
 
 BluetoothWorker::Error WorkerImpl::initialize_stack()
 {
     LOG_INFO("%s", __PRETTY_FUNCTION__);
-    Error ret = SuccessBt;
+    Error ret  = SuccessBt;
     int result = 0;
     BTPS_Initialization_t BTPS_Initialization;
 
     HCI_DRIVER_SET_COMM_INFORMATION(&hci->driver, 1, bt->default_baudrate, cpHCILL_RTS_CTS);
     hci->driver.DriverInformation.COMMDriverInformation.InitializationDelay = 100;
-    BTPS_Initialization.MessageOutputCallback = lib_log_callback;
+    BTPS_Initialization.MessageOutputCallback                               = lib_log_callback;
     // initialize kernel
     BTPS_Init(&BTPS_Initialization);
 
@@ -97,7 +99,8 @@ BluetoothWorker::Error WorkerImpl::initialize_stack()
             LOG_ERROR("HCI Initialization failure");
             ret = ErrorBtAPI;
             break;
-        } else {
+        }
+        else {
             stack.id = result;
         }
 
@@ -105,13 +108,15 @@ BluetoothWorker::Error WorkerImpl::initialize_stack()
         if (HCI_Version_Supported(stack.id, &v_hci) != 0) {
             LOG_ERROR("HCI supported stack err");
             ret = ErrorBtAPI;
-        } else {
+        }
+        else {
             // print supported stack
         }
     } while (0);
 
-    // HCI_Read_Local_Version_Information(BluetoothStackID, &FW_Version_Details.StatusResult, &FW_Version_Details.HCI_VersionResult,
-    // &FW_Version_Details.HCI_RevisionResult, &FW_Version_Details.LMP_VersionResult, &FW_Version_Details.Manufacturer_NameResult,
+    // HCI_Read_Local_Version_Information(BluetoothStackID, &FW_Version_Details.StatusResult,
+    // &FW_Version_Details.HCI_VersionResult, &FW_Version_Details.HCI_RevisionResult,
+    // &FW_Version_Details.LMP_VersionResult, &FW_Version_Details.Manufacturer_NameResult,
     // &FW_Version_Details.LMP_SubversionResult);
     return ret;
 }
@@ -133,7 +138,8 @@ BluetoothWorker::Error WorkerImpl::get_local_addr()
     Error ret = SuccessBt;
     if (!GAP_Query_Local_BD_ADDR(stack.id, host->val)) {
         LOG_INFO("Local address: %s", host->tostr().c_str());
-    } else {
+    }
+    else {
         ret = ErrorBtAPI;
         LOG_ERROR("Local address querry failure");
     }
@@ -146,7 +152,7 @@ BluetoothWorker::Error WorkerImpl::enable_l2ca()
     Error ret = SuccessBt;
     LOG_INFO("Enable l2ca");
     L2CA_Link_Connect_Params_t L2CA_Link_Connect_Params;
-    L2CA_Link_Connect_Params.L2CA_Link_Connect_Request_Config = cqAllowRoleSwitch;
+    L2CA_Link_Connect_Params.L2CA_Link_Connect_Request_Config  = cqAllowRoleSwitch;
     L2CA_Link_Connect_Params.L2CA_Link_Connect_Response_Config = csMaintainCurrentRole;
     L2CA_Set_Link_Connection_Configuration(stack.id, &L2CA_Link_Connect_Params);
     return ret;
@@ -160,7 +166,9 @@ BluetoothWorker::Error WorkerImpl::hci_write_link_policy()
     LOG_INFO("HCI write link policy");
     if (HCI_Command_Supported(stack.id, HCI_SUPPORTED_COMMAND_WRITE_DEFAULT_LINK_POLICY_BIT_NUMBER) > 0)
         HCI_Write_Default_Link_Policy_Settings(
-            stack.id, (HCI_LINK_POLICY_SETTINGS_ENABLE_MASTER_SLAVE_SWITCH | HCI_LINK_POLICY_SETTINGS_ENABLE_SNIFF_MODE), &status);
+            stack.id,
+            (HCI_LINK_POLICY_SETTINGS_ENABLE_MASTER_SLAVE_SWITCH | HCI_LINK_POLICY_SETTINGS_ENABLE_SNIFF_MODE),
+            &status);
     return ret;
 }
 
@@ -189,12 +197,13 @@ BluetoothWorker::Error WorkerImpl::hcill_setup()
     int result;
     if ((hci->driver.DriverInformation.COMMDriverInformation.Protocol == cpHCILL) ||
         (hci->driver.DriverInformation.COMMDriverInformation.Protocol == cpHCILL_RTS_CTS)) {
-        hci->ll.SleepCallbackFunction = sleep_cb;
-        hci->ll.SleepCallbackParameter = 0;
+        hci->ll.SleepCallbackFunction              = sleep_cb;
+        hci->ll.SleepCallbackParameter             = 0;
         hci->driver_reconfigure.ReconfigureCommand = HCI_COMM_DRIVER_RECONFIGURE_DATA_COMMAND_CHANGE_HCILL_PARAMETERS;
-        hci->driver_reconfigure.ReconfigureData = (void *)&hci->ll;
+        hci->driver_reconfigure.ReconfigureData    = (void *)&hci->ll;
 
-        // Register the sleep mode callback.  Note that if this unction returns greater than 0 then sleep is currently enabled.
+        // Register the sleep mode callback.  Note that if this unction returns greater than 0 then sleep is currently
+        // enabled.
         result = HCI_Reconfigure_Driver((unsigned int)result, FALSE, &hci->driver_reconfigure);
         if (result > 0) {
             LOG_INFO("Sleep is allowed.");
diff --git a/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.hpp b/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.hpp
index 3e7da06f4..2988a4b4a 100644
--- a/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.hpp
+++ b/module-bluetooth/Bluetooth/interface/bluetopia/WorkerImpl.hpp
@@ -2,4 +2,3 @@
 #include "../../BluetoothWorker.hpp"
 #include "BtDev.hpp"
 #include <bluetooth/Bluetooth.hpp>
-
diff --git a/module-bsp/board/cross/eMMC/eMMC.cpp b/module-bsp/board/cross/eMMC/eMMC.cpp
index 9a39d07fa..d1216bdc3 100644
--- a/module-bsp/board/cross/eMMC/eMMC.cpp
+++ b/module-bsp/board/cross/eMMC/eMMC.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "eMMC.hpp"
 
 #include "bsp/BoardDefinitions.hpp"
@@ -21,7 +20,6 @@
 #error "Unsupported target 1"
 #endif
 
-
 namespace bsp
 {
 
@@ -29,83 +27,82 @@ namespace bsp
 
     RetCode eMMC::Init()
     {
-    #if defined(TARGET_RT1051)
+#if defined(TARGET_RT1051)
 
-        //pll = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions ::EMMC_PLL),DriverPLLParams{});
+        // pll = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions ::EMMC_PLL),DriverPLLParams{});
 
-        mmcCard.busWidth = kMMC_DataBusWidth8bit;
-        mmcCard.busTiming = kMMC_HighSpeedTiming;
+        mmcCard.busWidth                   = kMMC_DataBusWidth8bit;
+        mmcCard.busTiming                  = kMMC_HighSpeedTiming;
         mmcCard.enablePreDefinedBlockCount = true;
-        mmcCard.host.base = USDHC2; // TODO:M.P move it to BoardDefinitions.hpp
-        mmcCard.host.sourceClock_Hz = GetPerphSourceClock(PerphClock_USDHC2);
-        
+        mmcCard.host.base                  = USDHC2; // TODO:M.P move it to BoardDefinitions.hpp
+        mmcCard.host.sourceClock_Hz        = GetPerphSourceClock(PerphClock_USDHC2);
+
         auto ret = MMC_Init(&mmcCard);
-        if(ret != kStatus_Success){       
+        if (ret != kStatus_Success) {
             return RetCode::Failure;
         }
-        else{
+        else {
             userPartitionBlocks = mmcCard.userPartitionBlocks;
             return RetCode::Success;
         }
-    #else
-    #error "Unsupported target"
-    #endif
-
+#else
+#error "Unsupported target"
+#endif
     }
 
     RetCode eMMC::DeInit()
     {
-    #if defined(TARGET_RT1051)
+#if defined(TARGET_RT1051)
         MMC_Deinit(&mmcCard);
         return RetCode::Success;
-    #else
-    #error "Unsupported target"
-    #endif
+#else
+#error "Unsupported target"
+#endif
     }
 
     RetCode eMMC::ReadBlocks(uint8_t *buffer, uint32_t startBlock, uint32_t blockCount)
     {
-    #if defined(TARGET_RT1051)
-        auto ret = MMC_ReadBlocks(&mmcCard,buffer,startBlock,blockCount);
-        if(ret != kStatus_Success){
+#if defined(TARGET_RT1051)
+        auto ret = MMC_ReadBlocks(&mmcCard, buffer, startBlock, blockCount);
+        if (ret != kStatus_Success) {
             return RetCode::Failure;
         }
-        else{
+        else {
             return RetCode::Success;
         }
-    #else
-    #error "Unsupported target"
-    #endif
+#else
+#error "Unsupported target"
+#endif
     }
 
     RetCode eMMC::WriteBlocks(const uint8_t *buffer, uint32_t startBlock, uint32_t blockCount)
     {
-    #if defined(TARGET_RT1051)
-        auto ret = MMC_WriteBlocks(&mmcCard,buffer,startBlock,blockCount);
-        if(ret != kStatus_Success){
+#if defined(TARGET_RT1051)
+        auto ret = MMC_WriteBlocks(&mmcCard, buffer, startBlock, blockCount);
+        if (ret != kStatus_Success) {
             return RetCode::Failure;
         }
-        else{
+        else {
             return RetCode::Success;
         }
-    #else
-    #error "Unsupported target"
-    #endif
+#else
+#error "Unsupported target"
+#endif
     }
 
     RetCode eMMC::SwitchPartition(eMMC::Partition partition)
     {
-    #if defined(TARGET_RT1051)
+#if defined(TARGET_RT1051)
         auto ret = MMC_SelectPartition(&mmcCard, static_cast<mmc_access_partition_t>(partition));
-        if(ret != kStatus_Success){
+        if (ret != kStatus_Success) {
             return RetCode::Failure;
         }
-        else{
+        else {
             return RetCode::Success;
         }
-    #else
-    #error "Unsupported target"
-    #endif
+#else
+#error "Unsupported target"
+#endif
     }
 
-}
\ No newline at end of file
+} // namespace bsp
\ No newline at end of file
diff --git a/module-bsp/board/cross/eMMC/eMMC.hpp b/module-bsp/board/cross/eMMC/eMMC.hpp
index 37b0ca70a..5faea5f95 100644
--- a/module-bsp/board/cross/eMMC/eMMC.hpp
+++ b/module-bsp/board/cross/eMMC/eMMC.hpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #ifndef MODULE_BSP_EMMC_HPP
 #define MODULE_BSP_EMMC_HPP
 
@@ -22,29 +21,30 @@
 #error "Unsupported target"
 #endif
 
-
 #include "bsp/common.hpp"
 
 namespace bsp
 {
     class eMMC
     {
-    public:
-
-        enum class Partition{
-            UserAera = 0U,                /*!< No access to boot partition (default), normal partition */
-            Boot1 = 1U,                   /*!< Read/Write boot partition 1 */
-            Boot2 = 2U,                   /*!< Read/Write boot partition 2*/
-            RPMB = 3U,                    /*!< Replay protected mem block */
-            GeneralPurpose1 = 4U,         /*!< access to general purpose partition 1 */
-            GeneralPurpose2 = 5U,         /*!< access to general purpose partition 2 */
-            GeneralPurpose3 = 6U,         /*!< access to general purpose partition 3 */
-            GeneralPurpose4 = 7U,         /*!< access to general purpose partition 4 */
+      public:
+        enum class Partition
+        {
+            UserAera        = 0U, /*!< No access to boot partition (default), normal partition */
+            Boot1           = 1U, /*!< Read/Write boot partition 1 */
+            Boot2           = 2U, /*!< Read/Write boot partition 2*/
+            RPMB            = 3U, /*!< Replay protected mem block */
+            GeneralPurpose1 = 4U, /*!< access to general purpose partition 1 */
+            GeneralPurpose2 = 5U, /*!< access to general purpose partition 2 */
+            GeneralPurpose3 = 6U, /*!< access to general purpose partition 3 */
+            GeneralPurpose4 = 7U, /*!< access to general purpose partition 4 */
 
         };
 
-        eMMC(){}
-        ~eMMC(){}
+        eMMC()
+        {}
+        ~eMMC()
+        {}
 
         RetCode Init();
         RetCode DeInit();
@@ -54,19 +54,16 @@ namespace bsp
 
         uint32_t userPartitionBlocks;
 
-    protected:
-
-    private:
-
-    #if defined(TARGET_RT1051)
+      protected:
+      private:
+#if defined(TARGET_RT1051)
         std::shared_ptr<drivers::DriverPLL> pll;
         mmc_card_t mmcCard;
-    #else
-    #error "Unsupported target"
-    #endif
-
+#else
+#error "Unsupported target"
+#endif
     };
 
-}
+} // namespace bsp
 
-#endif //MODULE_BSP_EMMC_HPP
+#endif // MODULE_BSP_EMMC_HPP
diff --git a/module-bsp/board/linux/audio/LinuxCellularAudio.cpp b/module-bsp/board/linux/audio/LinuxCellularAudio.cpp
index 4a9fed5cb..7566fb4a4 100644
--- a/module-bsp/board/linux/audio/LinuxCellularAudio.cpp
+++ b/module-bsp/board/linux/audio/LinuxCellularAudio.cpp
@@ -2,24 +2,22 @@
  *  @file LinuxCellularAudio.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 02.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "LinuxCellularAudio.hpp"
 
-
 #include "linux_audiocodec.hpp"
 
 #include "log/log.hpp"
 
+namespace bsp
+{
 
-namespace bsp {
-
-    LinuxCellularAudio::LinuxCellularAudio(audioCallback_t callback) : AudioDevice(callback), stream(nullptr) {
+    LinuxCellularAudio::LinuxCellularAudio(audioCallback_t callback) : AudioDevice(callback), stream(nullptr)
+    {
         PaError err = Pa_Initialize();
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
@@ -29,7 +27,8 @@ namespace bsp {
         isInitialized = true;
     }
 
-    LinuxCellularAudio::~LinuxCellularAudio() {
+    LinuxCellularAudio::~LinuxCellularAudio()
+    {
 
         PaError err = paNoError;
 
@@ -40,16 +39,16 @@ namespace bsp {
             }
         }
 
-
         err = Pa_Terminate();
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
         }
     }
 
-    int32_t LinuxCellularAudio::Start(const bsp::AudioDevice::Format &format) {
+    int32_t LinuxCellularAudio::Start(const bsp::AudioDevice::Format &format)
+    {
 
-        if(!TryOpenStream(format)){
+        if (!TryOpenStream(format)) {
             return paInternalError;
         }
 
@@ -62,10 +61,10 @@ namespace bsp {
         currentFormat = format;
 
         return 0;
-
     }
 
-    int32_t LinuxCellularAudio::Stop() {
+    int32_t LinuxCellularAudio::Stop()
+    {
 
         if (stream) {
             PaError err = Pa_CloseStream(stream);
@@ -74,50 +73,52 @@ namespace bsp {
             }
         }
 
-        stream = nullptr;
+        stream        = nullptr;
         currentFormat = {};
 
         return 0;
     }
 
-    int LinuxCellularAudio::portAudioCallback(const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer,
-                                           const PaStreamCallbackTimeInfo *timeInfo, PaStreamCallbackFlags statusFlags,
-                                           void *userData) {
+    int LinuxCellularAudio::portAudioCallback(const void *inputBuffer,
+                                              void *outputBuffer,
+                                              unsigned long framesPerBuffer,
+                                              const PaStreamCallbackTimeInfo *timeInfo,
+                                              PaStreamCallbackFlags statusFlags,
+                                              void *userData)
+    {
 
         LinuxCellularAudio *ptr = reinterpret_cast<LinuxCellularAudio *>(userData);
 
         uint32_t framesToFetch = framesPerBuffer;
 
-        if ((ptr->currentFormat.flags & static_cast<uint32_t >(Flags::OutPutStereo)) ) {
+        if ((ptr->currentFormat.flags & static_cast<uint32_t>(Flags::OutPutStereo))) {
             framesToFetch = framesPerBuffer * 2;
         }
 
-        if (ptr->currentFormat.flags & static_cast<uint32_t >(Flags::InputStereo)) {
+        if (ptr->currentFormat.flags & static_cast<uint32_t>(Flags::InputStereo)) {
             framesToFetch = framesPerBuffer * 2;
         }
 
         if (inputBuffer) {
             int16_t *pBuff = reinterpret_cast<int16_t *>(const_cast<void *>(inputBuffer));
-            std::transform(pBuff, pBuff + framesToFetch, pBuff,
-                           [ptr](int16_t c) -> int16_t {
-                               return (float)c * ptr->currentFormat.inputGain;
-                           });
+            std::transform(pBuff, pBuff + framesToFetch, pBuff, [ptr](int16_t c) -> int16_t {
+                return (float)c * ptr->currentFormat.inputGain;
+            });
         }
 
-
         auto ret = ptr->callback(inputBuffer, outputBuffer, framesToFetch);
         if (ret == 0) {
             // close stream
             return paAbort;
-        } else if (ret <= framesToFetch) {
+        }
+        else if (ret <= framesToFetch) {
 
             // Scale output buffer
             if (outputBuffer) {
                 int16_t *pBuff = reinterpret_cast<int16_t *>(outputBuffer);
-                std::transform(pBuff, pBuff + framesToFetch, pBuff,
-                               [ptr](int16_t c) -> int16_t {
-                                   return (float)c * ptr->currentFormat.outputVolume;
-                               });
+                std::transform(pBuff, pBuff + framesToFetch, pBuff, [ptr](int16_t c) -> int16_t {
+                    return (float)c * ptr->currentFormat.outputVolume;
+                });
             }
             return paContinue;
         }
@@ -125,49 +126,53 @@ namespace bsp {
         return paAbort;
     }
 
-    int32_t LinuxCellularAudio::InputGainCtrl(float gain) {
+    int32_t LinuxCellularAudio::InputGainCtrl(float gain)
+    {
         currentFormat.inputGain = gain;
         return 0;
     }
 
-    int32_t LinuxCellularAudio::OutputVolumeCtrl(float vol) {
+    int32_t LinuxCellularAudio::OutputVolumeCtrl(float vol)
+    {
         currentFormat.outputVolume = vol;
         return 0;
     }
 
-    int32_t LinuxCellularAudio::InputPathCtrl([[maybe_unused]] InputPath inputPath) {
+    int32_t LinuxCellularAudio::InputPathCtrl([[maybe_unused]] InputPath inputPath)
+    {
         return 0;
     }
 
-    int32_t LinuxCellularAudio::OutputPathCtrl([[maybe_unused]] OutputPath outputPath) {
+    int32_t LinuxCellularAudio::OutputPathCtrl([[maybe_unused]] OutputPath outputPath)
+    {
         return 0;
     }
 
-    bool LinuxCellularAudio::TryOpenStream(const bsp::AudioDevice::Format &format) {
+    bool LinuxCellularAudio::TryOpenStream(const bsp::AudioDevice::Format &format)
+    {
         uint32_t outChan = 0;
-        uint32_t inChan = 0;
+        uint32_t inChan  = 0;
 
-
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputLeft)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputLeft)) {
             inChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputRight)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputRight)) {
             inChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutputMono)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutputMono)) {
             outChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutPutStereo)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutPutStereo)) {
             outChan = 2;
         }
         /* Open an audio I/O stream. */
         PaError err = Pa_OpenDefaultStream(&stream,
-                                           inChan,          /* no input channels */
-                                           outChan,          /* stereo output */
-                                           paInt16,  /* TODO:M.P only 16bit samples are supported */
+                                           inChan,  /* no input channels */
+                                           outChan, /* stereo output */
+                                           paInt16, /* TODO:M.P only 16bit samples are supported */
                                            format.sampleRate_Hz,
                                            paFramesPerBufferUnspecified, /* frames per buffer, i.e. the number
                                                    of sample frames that PortAudio will
@@ -176,27 +181,28 @@ namespace bsp {
                                                    paFramesPerBufferUnspecified, which
                                                    tells PortAudio to pick the best,
                                                    possibly changing, buffer size.*/
-                                           portAudioCallback, /* this is your callback function */
-                                           this); /*This is a pointer that will be passed to
-                                                   your callback*/
+                                           portAudioCallback,            /* this is your callback function */
+                                           this);                        /*This is a pointer that will be passed to
+                                                                          your callback*/
 
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
             return false;
-        } else {
+        }
+        else {
             return true;
         }
-
     }
 
-    bool LinuxCellularAudio::IsFormatSupported(const bsp::AudioDevice::Format &format) {
+    bool LinuxCellularAudio::IsFormatSupported(const bsp::AudioDevice::Format &format)
+    {
         auto ret = TryOpenStream(format);
         if (ret) {
             Stop();
             return true;
-        } else {
+        }
+        else {
             return false;
         }
-
     }
-}
+} // namespace bsp
diff --git a/module-bsp/board/linux/audio/LinuxCellularAudio.hpp b/module-bsp/board/linux/audio/LinuxCellularAudio.hpp
index e8030de04..15f670341 100644
--- a/module-bsp/board/linux/audio/LinuxCellularAudio.hpp
+++ b/module-bsp/board/linux/audio/LinuxCellularAudio.hpp
@@ -2,23 +2,23 @@
  *  @file LinuxCellularAudio.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 02.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_LINUXCELLULARAUDIO_HPP
 #define PUREPHONE_LINUXCELLULARAUDIO_HPP
 
 #include "bsp/audio/bsp_audio.hpp"
 #include "portaudio.h"
 
-namespace bsp {
+namespace bsp
+{
 
-    class LinuxCellularAudio : public AudioDevice {
-    public:
+    class LinuxCellularAudio : public AudioDevice
+    {
+      public:
         LinuxCellularAudio(AudioDevice::audioCallback_t callback);
 
         virtual ~LinuxCellularAudio();
@@ -37,20 +37,19 @@ namespace bsp {
 
         bool IsFormatSupported(const Format &format) override final;
 
-    private:
+      private:
         PaStream *stream;
 
-
-        static int portAudioCallback(const void *inputBuffer, void *outputBuffer,
+        static int portAudioCallback(const void *inputBuffer,
+                                     void *outputBuffer,
                                      unsigned long framesPerBuffer,
                                      const PaStreamCallbackTimeInfo *timeInfo,
                                      PaStreamCallbackFlags statusFlags,
                                      void *userData);
 
         bool TryOpenStream(const bsp::AudioDevice::Format &format);
-
     };
 
-}
+} // namespace bsp
 
-#endif //PUREPHONE_LINUXCELLULARAUDIO_HPP
+#endif // PUREPHONE_LINUXCELLULARAUDIO_HPP
diff --git a/module-bsp/board/linux/audio/linux_audiocodec.cpp b/module-bsp/board/linux/audio/linux_audiocodec.cpp
index 80332c05b..0c7e814fe 100644
--- a/module-bsp/board/linux/audio/linux_audiocodec.cpp
+++ b/module-bsp/board/linux/audio/linux_audiocodec.cpp
@@ -2,21 +2,20 @@
  *  @file linux_audio.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 22.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "linux_audiocodec.hpp"
 
 #include "log/log.hpp"
 
+namespace bsp
+{
 
-namespace bsp {
-
-    LinuxAudiocodec::LinuxAudiocodec(audioCallback_t callback) : AudioDevice(callback), stream(nullptr) {
+    LinuxAudiocodec::LinuxAudiocodec(audioCallback_t callback) : AudioDevice(callback), stream(nullptr)
+    {
         PaError err = Pa_Initialize();
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
@@ -26,7 +25,8 @@ namespace bsp {
         isInitialized = true;
     }
 
-    LinuxAudiocodec::~LinuxAudiocodec() {
+    LinuxAudiocodec::~LinuxAudiocodec()
+    {
 
         PaError err = paNoError;
 
@@ -37,16 +37,16 @@ namespace bsp {
             }
         }
 
-
         err = Pa_Terminate();
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
         }
     }
 
-    int32_t LinuxAudiocodec::Start(const bsp::AudioDevice::Format &format) {
+    int32_t LinuxAudiocodec::Start(const bsp::AudioDevice::Format &format)
+    {
 
-        if(!TryOpenStream(format)){
+        if (!TryOpenStream(format)) {
             return paInternalError;
         }
 
@@ -59,10 +59,10 @@ namespace bsp {
         currentFormat = format;
 
         return 0;
-
     }
 
-    int32_t LinuxAudiocodec::Stop() {
+    int32_t LinuxAudiocodec::Stop()
+    {
 
         if (stream) {
             PaError err = Pa_CloseStream(stream);
@@ -71,50 +71,52 @@ namespace bsp {
             }
         }
 
-        stream = nullptr;
+        stream        = nullptr;
         currentFormat = {};
 
         return 0;
     }
 
-    int LinuxAudiocodec::portAudioCallback(const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer,
-                                           const PaStreamCallbackTimeInfo *timeInfo, PaStreamCallbackFlags statusFlags,
-                                           void *userData) {
+    int LinuxAudiocodec::portAudioCallback(const void *inputBuffer,
+                                           void *outputBuffer,
+                                           unsigned long framesPerBuffer,
+                                           const PaStreamCallbackTimeInfo *timeInfo,
+                                           PaStreamCallbackFlags statusFlags,
+                                           void *userData)
+    {
 
         LinuxAudiocodec *ptr = reinterpret_cast<LinuxAudiocodec *>(userData);
 
         uint32_t framesToFetch = framesPerBuffer;
 
-        if ((ptr->currentFormat.flags & static_cast<uint32_t >(Flags::OutPutStereo)) ) {
+        if ((ptr->currentFormat.flags & static_cast<uint32_t>(Flags::OutPutStereo))) {
             framesToFetch = framesPerBuffer * 2;
         }
 
-        if (ptr->currentFormat.flags & static_cast<uint32_t >(Flags::InputStereo)) {
+        if (ptr->currentFormat.flags & static_cast<uint32_t>(Flags::InputStereo)) {
             framesToFetch = framesPerBuffer * 2;
         }
 
         if (inputBuffer) {
             int16_t *pBuff = reinterpret_cast<int16_t *>(const_cast<void *>(inputBuffer));
-            std::transform(pBuff, pBuff + framesToFetch, pBuff,
-                           [ptr](int16_t c) -> int16_t {
-                               return (float)c * ptr->currentFormat.inputGain;
-                           });
+            std::transform(pBuff, pBuff + framesToFetch, pBuff, [ptr](int16_t c) -> int16_t {
+                return (float)c * ptr->currentFormat.inputGain;
+            });
         }
 
-
         auto ret = ptr->callback(inputBuffer, outputBuffer, framesToFetch);
         if (ret == 0) {
             // close stream
             return paAbort;
-        } else if (ret <= framesToFetch) {
+        }
+        else if (ret <= framesToFetch) {
 
             // Scale output buffer
             if (outputBuffer) {
                 int16_t *pBuff = reinterpret_cast<int16_t *>(outputBuffer);
-                std::transform(pBuff, pBuff + framesToFetch, pBuff,
-                               [ptr](int16_t c) -> int16_t {
-                                   return (float)c * ptr->currentFormat.outputVolume;
-                               });
+                std::transform(pBuff, pBuff + framesToFetch, pBuff, [ptr](int16_t c) -> int16_t {
+                    return (float)c * ptr->currentFormat.outputVolume;
+                });
             }
             return paContinue;
         }
@@ -122,49 +124,53 @@ namespace bsp {
         return paAbort;
     }
 
-    int32_t LinuxAudiocodec::InputGainCtrl(float gain) {
+    int32_t LinuxAudiocodec::InputGainCtrl(float gain)
+    {
         currentFormat.inputGain = gain;
         return 0;
     }
 
-    int32_t LinuxAudiocodec::OutputVolumeCtrl(float vol) {
+    int32_t LinuxAudiocodec::OutputVolumeCtrl(float vol)
+    {
         currentFormat.outputVolume = vol;
         return 0;
     }
 
-    int32_t LinuxAudiocodec::InputPathCtrl([[maybe_unused]] InputPath inputPath) {
+    int32_t LinuxAudiocodec::InputPathCtrl([[maybe_unused]] InputPath inputPath)
+    {
         return 0;
     }
 
-    int32_t LinuxAudiocodec::OutputPathCtrl([[maybe_unused]] OutputPath outputPath) {
+    int32_t LinuxAudiocodec::OutputPathCtrl([[maybe_unused]] OutputPath outputPath)
+    {
         return 0;
     }
 
-    bool LinuxAudiocodec::TryOpenStream(const bsp::AudioDevice::Format &format) {
+    bool LinuxAudiocodec::TryOpenStream(const bsp::AudioDevice::Format &format)
+    {
         uint32_t outChan = 0;
-        uint32_t inChan = 0;
+        uint32_t inChan  = 0;
 
-
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputLeft)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputLeft)) {
             inChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputRight)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputRight)) {
             inChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutputMono)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutputMono)) {
             outChan++;
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutPutStereo)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutPutStereo)) {
             outChan = 2;
         }
         /* Open an audio I/O stream. */
         PaError err = Pa_OpenDefaultStream(&stream,
-                                           inChan,          /* no input channels */
-                                           outChan,          /* stereo output */
-                                           paInt16,  /* TODO:M.P only 16bit samples are supported */
+                                           inChan,  /* no input channels */
+                                           outChan, /* stereo output */
+                                           paInt16, /* TODO:M.P only 16bit samples are supported */
                                            format.sampleRate_Hz,
                                            paFramesPerBufferUnspecified, /* frames per buffer, i.e. the number
                                                    of sample frames that PortAudio will
@@ -173,27 +179,28 @@ namespace bsp {
                                                    paFramesPerBufferUnspecified, which
                                                    tells PortAudio to pick the best,
                                                    possibly changing, buffer size.*/
-                                           portAudioCallback, /* this is your callback function */
-                                           this); /*This is a pointer that will be passed to
-                                                   your callback*/
+                                           portAudioCallback,            /* this is your callback function */
+                                           this);                        /*This is a pointer that will be passed to
+                                                                          your callback*/
 
         if (err != paNoError) {
             LOG_ERROR("PortAudio error: %s\n", Pa_GetErrorText(err));
             return false;
-        } else {
+        }
+        else {
             return true;
         }
-
     }
 
-    bool LinuxAudiocodec::IsFormatSupported(const bsp::AudioDevice::Format &format) {
+    bool LinuxAudiocodec::IsFormatSupported(const bsp::AudioDevice::Format &format)
+    {
         auto ret = TryOpenStream(format);
         if (ret) {
             Stop();
             return true;
-        } else {
+        }
+        else {
             return false;
         }
-
     }
-}
+} // namespace bsp
diff --git a/module-bsp/board/linux/audio/linux_audiocodec.hpp b/module-bsp/board/linux/audio/linux_audiocodec.hpp
index ec18dfa86..7647ba836 100644
--- a/module-bsp/board/linux/audio/linux_audiocodec.hpp
+++ b/module-bsp/board/linux/audio/linux_audiocodec.hpp
@@ -2,50 +2,46 @@
  *  @file linux_audio.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 22.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_LINUX_AUDIOCODEC_HPP
 #define PUREPHONE_LINUX_AUDIOCODEC_HPP
 
 #include "bsp/audio/bsp_audio.hpp"
 #include "portaudio.h"
 
-namespace bsp{
+namespace bsp
+{
 
-    class LinuxAudiocodec : public AudioDevice{
-    public:
+    class LinuxAudiocodec : public AudioDevice
+    {
+      public:
         LinuxAudiocodec(AudioDevice::audioCallback_t callback);
         virtual ~LinuxAudiocodec();
 
-        int32_t Start(const Format& format) override final;
+        int32_t Start(const Format &format) override final;
         int32_t Stop() override final;
         int32_t OutputVolumeCtrl(float vol) override final;
         int32_t InputGainCtrl(float gain) override final;
         int32_t OutputPathCtrl(OutputPath outputPath) override final;
         int32_t InputPathCtrl(InputPath inputPath) override final;
-        bool IsFormatSupported(const Format& format) override final;
+        bool IsFormatSupported(const Format &format) override final;
 
-    private:
+      private:
         PaStream *stream;
 
-
-        static int portAudioCallback( const void *inputBuffer, void *outputBuffer,
-                                   unsigned long framesPerBuffer,
-                                   const PaStreamCallbackTimeInfo* timeInfo,
-                                   PaStreamCallbackFlags statusFlags,
-                                   void *userData );
+        static int portAudioCallback(const void *inputBuffer,
+                                     void *outputBuffer,
+                                     unsigned long framesPerBuffer,
+                                     const PaStreamCallbackTimeInfo *timeInfo,
+                                     PaStreamCallbackFlags statusFlags,
+                                     void *userData);
 
         bool TryOpenStream(const bsp::AudioDevice::Format &format);
-
     };
-}
+} // namespace bsp
 
-
-
-
-#endif //PUREPHONE_LINUX_AUDIOCODEC_HPP
+#endif // PUREPHONE_LINUX_AUDIOCODEC_HPP
diff --git a/module-bsp/board/linux/battery-charger/battery_charger.cpp b/module-bsp/board/linux/battery-charger/battery_charger.cpp
index d77964bbb..0080ec488 100644
--- a/module-bsp/board/linux/battery-charger/battery_charger.cpp
+++ b/module-bsp/board/linux/battery-charger/battery_charger.cpp
@@ -6,10 +6,11 @@
  */
 #include <stdint.h>
 
-extern "C" {
-	#include "FreeRTOS.h"
-	#include "task.h"
-	#include "queue.h"
+extern "C"
+{
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
 }
 
 #include <sys/stat.h>
@@ -18,100 +19,90 @@ extern "C" {
 #include "board.h"
 #include "bsp/battery-charger/battery_charger.hpp"
 
-#define BSP_BATTERY_CHARGER_I2C_ADDR                        (0xD2 >> 1)
-#define BSP_FUEL_GAUGE_I2C_ADDR                             (0x6C >> 1)
-#define BSP_TOP_CONTROLLER_I2C_ADDR                         (0xCC >> 1)
+#define BSP_BATTERY_CHARGER_I2C_ADDR (0xD2 >> 1)
+#define BSP_FUEL_GAUGE_I2C_ADDR      (0x6C >> 1)
+#define BSP_TOP_CONTROLLER_I2C_ADDR  (0xCC >> 1)
 
-
-static xQueueHandle qHandleIrq = NULL;
+static xQueueHandle qHandleIrq            = NULL;
 static TaskHandle_t battery_worker_handle = NULL;
 
 static uint8_t battLevel = 100;
-static bool plugged = false;
-namespace bsp{
+static bool plugged      = false;
+namespace bsp
+{
 
-	static void battery_worker(void *pvp);
+    static void battery_worker(void *pvp);
 
-	int battery_Init(xQueueHandle qHandle)
-	{
-		qHandleIrq = qHandle;
-		if (xTaskCreate(battery_worker, "battery", 512, qHandle, 0, &battery_worker_handle) != pdPASS) {
-				return 1;
-			}
-		return 0;
-	}
+    int battery_Init(xQueueHandle qHandle)
+    {
+        qHandleIrq = qHandle;
+        if (xTaskCreate(battery_worker, "battery", 512, qHandle, 0, &battery_worker_handle) != pdPASS) {
+            return 1;
+        }
+        return 0;
+    }
 
-	void battery_Deinit(void)
-	{
-		qHandleIrq = NULL;
-		vTaskDelete(battery_worker_handle);
-	}
-	void battery_getBatteryLevel(uint8_t& levelPercent)
-	{
-			levelPercent = battLevel;
-	}
+    void battery_Deinit(void)
+    {
+        qHandleIrq = NULL;
+        vTaskDelete(battery_worker_handle);
+    }
+    void battery_getBatteryLevel(uint8_t &levelPercent)
+    {
+        levelPercent = battLevel;
+    }
 
-	void battery_getChargeStatus( bool& status)
-	{
-		status = plugged;
-	}
+    void battery_getChargeStatus(bool &status)
+    {
+        status = plugged;
+    }
 
-	//TODO function unused in linux driver, left for compatibility with target driver
-	void battery_ClearAllIRQs(void)
-	{
+    // TODO function unused in linux driver, left for compatibility with target driver
+    void battery_ClearAllIRQs(void)
+    {}
+    // TODO function unused in linux driver, left for compatibility with target driver
+    void battery_clearFuelGuageIRQ(void)
+    {}
 
-	}
-	//TODO function unused in linux driver, left for compatibility with target driver
-	void battery_clearFuelGuageIRQ(void)
-	{
+    static void battery_worker(void *pvp)
+    {
 
-	}
+        const char *myfifo = "/tmp/fifoBattKeys";
 
-	static void battery_worker(void *pvp)
-	{
+        // Creating the named file(FIFO)
+        // mkfifo(<pathname>, <permission>)
+        mkfifo(myfifo, 0666);
 
-			const char * myfifo = "/tmp/fifoBattKeys";
-
-			// Creating the named file(FIFO)
-			// mkfifo(<pathname>, <permission>)
-			mkfifo(myfifo, 0666);
-
-			// Open FIFO for write only
-			int fd;
-			fd = open(myfifo, O_RDONLY | O_NONBLOCK );
-
-			while(1)
-			{
-				uint8_t buff [10];
-				int32_t readedBytes = read(fd, buff, 10);
-
-				if(readedBytes > 0)
-				{
-
-					uint8_t notification = 0;
-					switch (buff[0])
-					{
-					case 'p':
-						notification = 0x02;
-						plugged = 1 - plugged;
-						break;
-					case ']':
-						notification = 0x01;
-						if(battLevel < 100)
-							battLevel++;
-						break;
-					case '[':
-						notification = 0x01;
-						if(battLevel > 1)
-							battLevel--;
-					break;
-					}
-					xQueueSend(qHandleIrq, &notification, 100);
-				}
-				vTaskDelay(50);
-		}
-	}
-}
+        // Open FIFO for write only
+        int fd;
+        fd = open(myfifo, O_RDONLY | O_NONBLOCK);
 
+        while (1) {
+            uint8_t buff[10];
+            int32_t readedBytes = read(fd, buff, 10);
 
+            if (readedBytes > 0) {
 
+                uint8_t notification = 0;
+                switch (buff[0]) {
+                case 'p':
+                    notification = 0x02;
+                    plugged      = 1 - plugged;
+                    break;
+                case ']':
+                    notification = 0x01;
+                    if (battLevel < 100)
+                        battLevel++;
+                    break;
+                case '[':
+                    notification = 0x01;
+                    if (battLevel > 1)
+                        battLevel--;
+                    break;
+                }
+                xQueueSend(qHandleIrq, &notification, 100);
+            }
+            vTaskDelay(50);
+        }
+    }
+} // namespace bsp
diff --git a/module-bsp/board/linux/bluetooth/Bluetooth.cpp b/module-bsp/board/linux/bluetooth/Bluetooth.cpp
index ff936aa4c..2d50a4abe 100644
--- a/module-bsp/board/linux/bluetooth/Bluetooth.cpp
+++ b/module-bsp/board/linux/bluetooth/Bluetooth.cpp
@@ -6,25 +6,28 @@
 
 using namespace bsp;
 
-void BTdev::_circ::sem_take() {}
-void BTdev::_circ::sem_give() {}
+void BTdev::_circ::sem_take()
+{}
+void BTdev::_circ::sem_give()
+{}
 
-BTdev::_circ::_circ(unsigned int size, int threshold) : head(0), tail(0), threshold(threshold), size(size), len(0) {
+BTdev::_circ::_circ(unsigned int size, int threshold) : head(0), tail(0), threshold(threshold), size(size), len(0)
+{
     buff = new char[size];
 }
-BTdev::_circ::~_circ() {
+BTdev::_circ::~_circ()
+{
     delete[] buff;
 }
 
-BlueKitchen::BlueKitchen(unsigned int in_size, unsigned int out_size) :BluetoothCommon(in_size,out_size)
-{
-}
+BlueKitchen::BlueKitchen(unsigned int in_size, unsigned int out_size) : BluetoothCommon(in_size, out_size)
+{}
 
 BlueKitchen *BlueKitchen::getInstance()
 {
-    static BlueKitchen *k=NULL;
-    if(k==NULL) {
-        k=new BlueKitchen();
+    static BlueKitchen *k = NULL;
+    if (k == NULL) {
+        k = new BlueKitchen();
     }
     return k;
 }
@@ -34,25 +37,21 @@ ssize_t BlueKitchen::write_blocking(char *buf, ssize_t len)
     return 0;
 }
 
-BluetoothCommon::BluetoothCommon(unsigned int in_size, unsigned int out_size, int threshold):
-    BTdev(in_size,out_size,threshold)
-{
-}
+BluetoothCommon::BluetoothCommon(unsigned int in_size, unsigned int out_size, int threshold)
+    : BTdev(in_size, out_size, threshold)
+{}
 
-BlueKitchen::~BlueKitchen() {
-}
+BlueKitchen::~BlueKitchen()
+{}
 
 BluetoothCommon::~BluetoothCommon()
-{
-}
+{}
 
 void BluetoothCommon::open()
-{
-}
+{}
 
 void BluetoothCommon::close()
-{
-}
+{}
 
 void BluetoothCommon::sleep_ms(ssize_t ms)
 {
@@ -96,20 +95,16 @@ int BluetoothCommon::read_cts()
 }
 
 void BluetoothCommon::configure_uart_io()
-{
-}
+{}
 
 void BluetoothCommon::configure_lpuart()
-{
-}
+{}
 
 void BluetoothCommon::configure_cts_irq()
-{
-}
+{}
 
 void BluetoothCommon::set_irq(bool enable)
-{
-}
+{}
 
 ssize_t BlueKitchen::read(void *buf, size_t nbytes)
 {
diff --git a/module-bsp/board/linux/bluetooth/test/bsp_bt.cpp b/module-bsp/board/linux/bluetooth/test/bsp_bt.cpp
index d8370d7e0..64f23ece5 100644
--- a/module-bsp/board/linux/bluetooth/test/bsp_bt.cpp
+++ b/module-bsp/board/linux/bluetooth/test/bsp_bt.cpp
@@ -1,139 +1,139 @@
 #include "bsp_bt.hpp"
 
-namespace bsp {
-
-BluetopiaHW::BluetopiaHW(LogLvl lvl) : Bluetopia(64,64,0)
+namespace bsp
 {
-    log(LogDebug,"Init done!\n");
-}
 
-BluetopiaHW::~BluetopiaHW() {
-}
-
-Bluetopia *BluetopiaHW::getInstance()
-{
-    static BluetopiaHW *inst = NULL;
-    if(inst==NULL) {
-        inst = new BluetopiaHW();
+    BluetopiaHW::BluetopiaHW(LogLvl lvl) : Bluetopia(64, 64, 0)
+    {
+        log(LogDebug, "Init done!\n");
     }
-    return inst;
-}
 
-void Bluetopia::wait_data()
-{
-}
+    BluetopiaHW::~BluetopiaHW()
+    {}
 
-void Bluetopia::set_data()
-{
-}
-
-void BluetopiaHW::open()
-{
-    log(LogDebug,"open!\n");
-    set_irq(true);
-}
-
-void BluetopiaHW::close()
-{
-    log(LogDebug,"close!\n");
-    set_irq(false);
-}
-
-void BluetopiaHW::sleep_ms(ssize_t ms)
-{
-    log(LogDebug,"sleep %d [ms]!\n", ms);
-    ulTaskNotifyTake(pdTRUE, ms);
-}
-
-void mocup_write_blocking(unsigned char* buf, size_t len)
-{
-    printf("WRITE: [%d][%.*s]\n",int(len),int(len), buf);
-}
-
-BTdev::Error BluetopiaHW::flush()
-{
-    log(LogDebug,"flush [%d] %s\n", out.len, out.tail<out.head?"reverse":"normal");
-    Error err = Success;
-    int i=0;
-    for(i=0; i<default_timeout_ms; ++i) {
-        if(read_cts() == 0) {
-            break;
-        } else {
-            sleep_ms(1);
+    Bluetopia *BluetopiaHW::getInstance()
+    {
+        static BluetopiaHW *inst = NULL;
+        if (inst == NULL) {
+            inst = new BluetopiaHW();
         }
+        return inst;
     }
-    if(i==default_timeout_ms) {
-        printf("BT CTS error!\n");
-        err = ErrorTimeout;
-    }
-    char* from = &out.buff[out.head];
-    if(out.tail >= out.head) {
-        mocup_write_blocking(reinterpret_cast<uint8_t*>(from), out.len);
-    } else {
-        mocup_write_blocking(reinterpret_cast<uint8_t*>(from), out.len - out.tail);
-        from = out.buff;
-        mocup_write_blocking(reinterpret_cast<uint8_t*>(from), out.tail);
-    }
-    out.flush();
-    return err;
-}
 
-ssize_t BluetopiaHW::write(char *buf, size_t nbytes)
-{
-    log(LogDebug, "write %d -> [%.*s]\n", nbytes, nbytes, buf);
-    ssize_t i=0;
-    // if CTS set -> ignore return 0, can use threshold_guard here too
-    for (i=0; i<nbytes; ++i) {
-        if(out.push(*(buf+i)) != 0) {
-            break;
+    void Bluetopia::wait_data()
+    {}
+
+    void Bluetopia::set_data()
+    {}
+
+    void BluetopiaHW::open()
+    {
+        log(LogDebug, "open!\n");
+        set_irq(true);
+    }
+
+    void BluetopiaHW::close()
+    {
+        log(LogDebug, "close!\n");
+        set_irq(false);
+    }
+
+    void BluetopiaHW::sleep_ms(ssize_t ms)
+    {
+        log(LogDebug, "sleep %d [ms]!\n", ms);
+        ulTaskNotifyTake(pdTRUE, ms);
+    }
+
+    void mocup_write_blocking(unsigned char *buf, size_t len)
+    {
+        printf("WRITE: [%d][%.*s]\n", int(len), int(len), buf);
+    }
+
+    BTdev::Error BluetopiaHW::flush()
+    {
+        log(LogDebug, "flush [%d] %s\n", out.len, out.tail < out.head ? "reverse" : "normal");
+        Error err = Success;
+        int i     = 0;
+        for (i = 0; i < default_timeout_ms; ++i) {
+            if (read_cts() == 0) {
+                break;
+            }
+            else {
+                sleep_ms(1);
+            }
         }
+        if (i == default_timeout_ms) {
+            printf("BT CTS error!\n");
+            err = ErrorTimeout;
+        }
+        char *from = &out.buff[out.head];
+        if (out.tail >= out.head) {
+            mocup_write_blocking(reinterpret_cast<uint8_t *>(from), out.len);
+        }
+        else {
+            mocup_write_blocking(reinterpret_cast<uint8_t *>(from), out.len - out.tail);
+            from = out.buff;
+            mocup_write_blocking(reinterpret_cast<uint8_t *>(from), out.tail);
+        }
+        out.flush();
+        return err;
     }
-    return i;
-}
 
-ssize_t BluetopiaHW::write_blocking(char *buf, ssize_t len)
-{
-    int llen = 0;
-    while (llen != len) {
-        llen += write(buf, len-llen);
-        flush();
+    ssize_t BluetopiaHW::write(char *buf, size_t nbytes)
+    {
+        log(LogDebug, "write %d -> [%.*s]\n", nbytes, nbytes, buf);
+        ssize_t i = 0;
+        // if CTS set -> ignore return 0, can use threshold_guard here too
+        for (i = 0; i < nbytes; ++i) {
+            if (out.push(*(buf + i)) != 0) {
+                break;
+            }
+        }
+        return i;
     }
-    return llen;
-}
 
-BTdev::Error BluetopiaHW::set_baudrate(uint32_t bd)
-{
-    log(LogDebug, "Set baudrate: %d", bd);
-    Error ret = Success;
-    int err=0;
-    return ret;
-}
+    ssize_t BluetopiaHW::write_blocking(char *buf, ssize_t len)
+    {
+        int llen = 0;
+        while (llen != len) {
+            llen += write(buf, len - llen);
+            flush();
+        }
+        return llen;
+    }
 
-// set flow on -> true, set flow off -> false
-BTdev::Error BluetopiaHW::set_rts(bool on)
-{
-    log(LogDebug, "RTS %s", on?"on":"off");
-    return Success;
-}
+    BTdev::Error BluetopiaHW::set_baudrate(uint32_t bd)
+    {
+        log(LogDebug, "Set baudrate: %d", bd);
+        Error ret = Success;
+        int err   = 0;
+        return ret;
+    }
 
-BTdev::Error BluetopiaHW::set_reset(bool on)
-{
-    log(LogDebug, "reset %s", on?"on":"off");
-    return Success;
-}
+    // set flow on -> true, set flow off -> false
+    BTdev::Error BluetopiaHW::set_rts(bool on)
+    {
+        log(LogDebug, "RTS %s", on ? "on" : "off");
+        return Success;
+    }
 
-void BluetopiaHW::set_irq(bool enable)
-{
-}
+    BTdev::Error BluetopiaHW::set_reset(bool on)
+    {
+        log(LogDebug, "reset %s", on ? "on" : "off");
+        return Success;
+    }
 
-ssize_t BluetopiaHW::read(void*, unsigned long)
-{
-    return 0;
-}
+    void BluetopiaHW::set_irq(bool enable)
+    {}
 
-int BluetopiaHW::read_cts()
-{
-    return 0;
-}
+    ssize_t BluetopiaHW::read(void *, unsigned long)
+    {
+        return 0;
+    }
 
-};
+    int BluetopiaHW::read_cts()
+    {
+        return 0;
+    }
+
+}; // namespace bsp
diff --git a/module-bsp/board/linux/bluetooth/test/bsp_bt.hpp b/module-bsp/board/linux/bluetooth/test/bsp_bt.hpp
index 917303c8a..4a375b39a 100644
--- a/module-bsp/board/linux/bluetooth/test/bsp_bt.hpp
+++ b/module-bsp/board/linux/bluetooth/test/bsp_bt.hpp
@@ -7,17 +7,17 @@
 
 #include <memory>
 
-
-namespace bsp {
-class BluetopiaHW : public Bluetopia
+namespace bsp
 {
-    public:
-        BluetopiaHW(LogLvl lvl=LogError);
+    class BluetopiaHW : public Bluetopia
+    {
+      public:
+        BluetopiaHW(LogLvl lvl = LogError);
         virtual ~BluetopiaHW();
         static Bluetopia *getInstance();
-        static const ssize_t baudrate =115200;
-        static const ssize_t off_threshold =16;
-        static const ssize_t on_threshold =32;
+        static const ssize_t baudrate      = 115200;
+        static const ssize_t off_threshold = 16;
+        static const ssize_t on_threshold  = 32;
 
         // without them it doesnt see inherited functs o_o
         virtual void open() override;
@@ -34,5 +34,5 @@ class BluetopiaHW : public Bluetopia
         virtual void set_irq(bool enable);
         virtual void wait_data();
         virtual void set_data();
-};
-};
+    };
+}; // namespace bsp
diff --git a/module-bsp/board/linux/board.cpp b/module-bsp/board/linux/board.cpp
index c89f82489..dbd2c063c 100644
--- a/module-bsp/board/linux/board.cpp
+++ b/module-bsp/board/linux/board.cpp
@@ -8,10 +8,10 @@
  * @details
  */
 
-
 namespace bsp
 {
-    void BoardInit(){
+    void BoardInit()
+    {
         // dummy
     }
-}
\ No newline at end of file
+} // namespace bsp
\ No newline at end of file
diff --git a/module-bsp/board/linux/board.h b/module-bsp/board/linux/board.h
index 82d3f106b..9b7f5573d 100644
--- a/module-bsp/board/linux/board.h
+++ b/module-bsp/board/linux/board.h
@@ -257,12 +257,14 @@
 //#define BOARD_ACCEL_I2C_CLOCK_SOURCE_SELECT (0U)
 ///* Clock divider for LPI2C clock source */
 //#define BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER (5U)
-//#define BOARD_ACCEL_I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+//#define BOARD_ACCEL_I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER +
+//1U))
 //
 //#define BOARD_CODEC_I2C_BASEADDR LPI2C1
 //#define BOARD_CODEC_I2C_CLOCK_SOURCE_SELECT (0U)
 //#define BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER (5U)
-//#define BOARD_CODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+//#define BOARD_CODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER +
+//1U))
 //
 ///* @Brief Board CAMERA configuration */
 //#define BOARD_CAMERA_I2C_BASEADDR LPI2C1
@@ -271,7 +273,6 @@
 /*#define BOARD_CAMERA_I2C_CLOCK_FREQ \
     (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER + 1U))*/
 
-
 /**
  * BOARD EINK DEFINITIONS
  */
@@ -294,11 +295,12 @@
 //#define BOARD_EINK_BUSY_IRQ			GPIO3_Combined_16_31_IRQn
 //#define BOARD_EINK_BUSY_IRQ_HANDLER	GPIO3_Combined_16_31_IRQHandler
 
-#define BOARD_EINK_DISPLAY_RES_X   480
-#define BOARD_EINK_DISPLAY_RES_Y   600
+#define BOARD_EINK_DISPLAY_RES_X 480
+#define BOARD_EINK_DISPLAY_RES_Y 600
 
-//#define CELLULAR_UART_BASE                                   LPUART1                 ///< This macro indicate port to which GSM module is connected
-//#define CELLULAR_UART_CLKSRC                                 kCLOCK_PllUsb1          ///< This macro indicate LPUART clock source
+//#define CELLULAR_UART_BASE                                   LPUART1                 ///< This macro indicate port to
+//which GSM module is connected #define CELLULAR_UART_CLKSRC                                 kCLOCK_PllUsb1 ///< This
+//macro indicate LPUART clock source
 //
 //#define BSP_CELLULAR_UART_TX_PORT                            GPIO1
 //#define BSP_CELLULAR_UART_TX_PIN                             12
@@ -387,8 +389,9 @@
 // * Definitions for BSP_BLUETOOTH pins configuration
 // */
 //
-//#define BSP_BLUETOOTH_UART_BASE                              LPUART2                     ///< This macro indicate port to which GSM module is connected
-//#define BSP_BLUETOOTH_UART_CLKSRC                            kCLOCK_PllUsb1              ///< This macro indicate LPUART clock source
+//#define BSP_BLUETOOTH_UART_BASE                              LPUART2                     ///< This macro indicate port
+//to which GSM module is connected #define BSP_BLUETOOTH_UART_CLKSRC                            kCLOCK_PllUsb1 ///< This
+//macro indicate LPUART clock source
 //
 //#define BSP_BLUETOOTH_UART_RTS_PORT                          GPIO1
 //#define BSP_BLUETOOTH_UART_RTS_PIN                           17
@@ -412,8 +415,10 @@
 //#define BOARD_KEYBOARD_I2C_BASEADDR LPI2C2
 //#define BOARD_KEYBOARD_I2C_CLOCK_SOURCE_SELECT (0U)
 //#define BOARD_KEYBOARD_I2C_CLOCK_SOURCE_DIVIDER (5U)
-////#define BOARD_KEYBOARD_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (BOARD_KEYBOARD_I2C_CLOCK_SOURCE_DIVIDER + 1U))
-//#define BOARD_KEYBOARD_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_OscClk) / 8) / (BOARD_KEYBOARD_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+////#define BOARD_KEYBOARD_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) /
+///(BOARD_KEYBOARD_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+//#define BOARD_KEYBOARD_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_OscClk) / 8) / (BOARD_KEYBOARD_I2C_CLOCK_SOURCE_DIVIDER +
+//1U))
 //
 //#define BOARD_KEYBOARD_RESET_GPIO_PIN 	(29U)
 //#define BOARD_KEYBOARD_RESET_GPIO		GPIO2
@@ -452,8 +457,10 @@
 //#define BOARD_AUDIOCODEC_I2C_BASEADDR LPI2C2
 //#define BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_SELECT (0U)
 //#define BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_DIVIDER (5U)
-////#define BOARD_AUDIOCODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_DIVIDER + 1U))
-//#define BOARD_AUDIOCODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_OscClk) / 8) / (BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+////#define BOARD_AUDIOCODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) /
+///(BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_DIVIDER + 1U))
+//#define BOARD_AUDIOCODEC_I2C_CLOCK_FREQ ((CLOCK_GetFreq(kCLOCK_OscClk) / 8) /
+//(BOARD_AUDIOCODEC_I2C_CLOCK_SOURCE_DIVIDER + 1U))
 //
 //
 ///**
@@ -531,12 +538,10 @@
 //#define BOARD_POWER_HOLD_GPIO_PIN 					7U
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-
-
-
 #if defined(__cplusplus)
 }
 #endif /* __cplusplus */
diff --git a/module-bsp/board/linux/cellular/linux_cellular.cpp b/module-bsp/board/linux/cellular/linux_cellular.cpp
index 0e86be969..bfdd3411e 100644
--- a/module-bsp/board/linux/cellular/linux_cellular.cpp
+++ b/module-bsp/board/linux/cellular/linux_cellular.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "linux_cellular.hpp"
 
 #include <iostream>
@@ -25,17 +24,26 @@
 #include <time.h>
 #include <unistd.h>
 
-#define _LINUX_UART_DEBUG   0
+#define _LINUX_UART_DEBUG 0
 
-namespace bsp {
+namespace bsp
+{
 
-    std::map<uint32_t, speed_t> PortSpeeds_text = { {9600U, B9600}, {19200U, B19200}, {38400U, B38400}, {57600U, B57600}, {115200U, B115200}, {230400U, B230400}, {460800U, B460800} };
+    std::map<uint32_t, speed_t> PortSpeeds_text = {{9600U, B9600},
+                                                   {19200U, B19200},
+                                                   {38400U, B38400},
+                                                   {57600U, B57600},
+                                                   {115200U, B115200},
+                                                   {230400U, B230400},
+                                                   {460800U, B460800}};
 
-    LinuxCellular::LinuxCellular(const char *term, uint32_t portSpeed) {
+    LinuxCellular::LinuxCellular(const char *term, uint32_t portSpeed)
+    {
 
         if (strcmp(term, "0") == 0) {
             fd = 0;
-        } else {
+        }
+        else {
             // open serial port
             fd = open(term, O_RDWR | O_NOCTTY | O_NONBLOCK);
             if (fd == -1) {
@@ -48,11 +56,11 @@ namespace bsp {
             tcgetattr(fd, &t);
             cfmakeraw(&t);
             t.c_cflag |= CLOCAL;
-            //if(ctsrts == 1)
+            // if(ctsrts == 1)
             //  t.c_cflag |= CRTSCTS; //enable the flow control on dev board
-            //else
-            t.c_cflag &= ~(CRTSCTS);//disable the flow control on dev board
-            speed_t speed = PortSpeeds_text[portSpeed];//B115200;
+            // else
+            t.c_cflag &= ~(CRTSCTS);                    // disable the flow control on dev board
+            speed_t speed = PortSpeeds_text[portSpeed]; // B115200;
             cfsetispeed(&t, speed);
             cfsetospeed(&t, speed);
             tcsetattr(fd, TCSANOW, &t);
@@ -75,122 +83,119 @@ namespace bsp {
         }
 
         isInitialized = true;
-
     }
 
-    LinuxCellular::~LinuxCellular() {
+    LinuxCellular::~LinuxCellular()
+    {
 
-        if(fd >= 0){
+        if (fd >= 0) {
             close(fd);
         }
 
-        if(epoll_fd >= 0){
+        if (epoll_fd >= 0) {
             close(epoll_fd);
         }
     }
 
-    void LinuxCellular::PowerUp() {
+    void LinuxCellular::PowerUp()
+    {}
 
-    }
+    void LinuxCellular::PowerDown()
+    {}
 
-    void LinuxCellular::PowerDown() {
+    void LinuxCellular::Restart()
+    {}
 
-    }
-
-    void LinuxCellular::Restart() {
-
-    }
-
-    ssize_t LinuxCellular::Read(void *buf, size_t nbytes) {
+    ssize_t LinuxCellular::Read(void *buf, size_t nbytes)
+    {
 
         cpp_freertos::LockGuard lock(serOutMutex);
-        retry:
+    retry:
         auto ret = read(fd, buf, nbytes);
         if ((ret == -1) && (errno == EINTR)) {
             goto retry;
         }
-        #if _LINUX_UART_DEBUG
+#if _LINUX_UART_DEBUG
         if (ret > 0) {
             LOG_PRINTF("[RX] ");
-            uint8_t *ptr = (uint8_t*)buf;
+            uint8_t *ptr = (uint8_t *)buf;
             for (size_t i = 0; i < ret; i++)
                 LOG_PRINTF("%02X ", (uint8_t)*ptr++);
             LOG_PRINTF("\n");
         }
-        #endif
+#endif
         return ret;
     }
 
-    ssize_t LinuxCellular::Write(void *buf, size_t nbytes) {
+    ssize_t LinuxCellular::Write(void *buf, size_t nbytes)
+    {
         cpp_freertos::LockGuard lock(serOutMutex);
-        #if _LINUX_UART_DEBUG
+#if _LINUX_UART_DEBUG
         LOG_PRINTF("[TX] ");
-        uint8_t *ptr = (uint8_t*)buf;
+        uint8_t *ptr = (uint8_t *)buf;
         for (size_t i = 0; i < nbytes; i++)
             LOG_PRINTF("%02X ", (uint8_t)*ptr++);
         LOG_PRINTF("\n");
-        #endif
-        retry:
+#endif
+    retry:
         auto ret = write(fd, buf, nbytes);
-        if((ret == -1) && (errno == EINTR)){
+        if ((ret == -1) && (errno == EINTR)) {
             goto retry;
         }
         return ret;
     }
 
-    void LinuxCellular::InformModemHostAsleep(void){
+    void LinuxCellular::InformModemHostAsleep(void)
+    {}
 
-    }
+    void LinuxCellular::InformModemHostWakeup(void)
+    {}
 
-    void LinuxCellular::InformModemHostWakeup(void){
+    void LinuxCellular::EnterSleep()
+    {}
 
-    }
+    void LinuxCellular::ExitSleep()
+    {}
 
-    void LinuxCellular::EnterSleep() {
+    uint32_t LinuxCellular::Wait(uint32_t timeout)
+    {
 
-    }
-
-    void LinuxCellular::ExitSleep() {
-
-    }
-
-    uint32_t LinuxCellular::Wait(uint32_t timeout) {
-
-        uint32_t currentTime = cpp_freertos::Ticks::GetTicks();
+        uint32_t currentTime   = cpp_freertos::Ticks::GetTicks();
         uint32_t timeoutNeeded = timeout == UINT32_MAX ? UINT32_MAX : currentTime + timeout;
-        uint32_t timeElapsed = currentTime;
+        uint32_t timeElapsed   = currentTime;
 
-        retry:
+    retry:
 
         if (timeElapsed >= timeoutNeeded) {
             return 0; // timeout
         }
 
         auto event_count = epoll_wait(epoll_fd, events, MAX_EVENTS, timeoutNeeded - timeElapsed);
-        timeElapsed = cpp_freertos::Ticks::GetTicks();
+        timeElapsed      = cpp_freertos::Ticks::GetTicks();
 
         if (event_count == 0) {
             return 0; // timeout
-        } else if ((event_count == -1) && (errno == EINTR)) {
+        }
+        else if ((event_count == -1) && (errno == EINTR)) {
             goto retry;
-        } else {
+        }
+        else {
             return 1;
         }
-
-
     }
 
-    void LinuxCellular::SetSpeed(uint32_t portSpeed) {
+    void LinuxCellular::SetSpeed(uint32_t portSpeed)
+    {
         struct termios t;
         memset(&t, 0, sizeof(t));
         tcgetattr(fd, &t);
         cfmakeraw(&t);
         t.c_cflag |= CLOCAL;
-        //if(ctsrts == 1)
+        // if(ctsrts == 1)
         //  t.c_cflag |= CRTSCTS; //enable the flow control on dev board
-        //else
-        t.c_cflag &= ~(CRTSCTS);   //disable the flow control on dev board
-        speed_t speed = PortSpeeds_text[portSpeed]; //B115200;
+        // else
+        t.c_cflag &= ~(CRTSCTS);                    // disable the flow control on dev board
+        speed_t speed = PortSpeeds_text[portSpeed]; // B115200;
         cfsetispeed(&t, speed);
         cfsetospeed(&t, speed);
         tcsetattr(fd, TCSANOW, &t);
@@ -199,8 +204,7 @@ namespace bsp {
     }
 
     void LinuxCellular::SelectAntenna(uint8_t antenna)
-    {
-    }
+    {}
     namespace cellular::sim
     {
         auto init(QueueHandle_t qHandle) -> int
@@ -214,11 +218,9 @@ namespace bsp {
         }
 
         void hotswap_trigger()
-        {
-        }
+        {}
 
         void sim_sel()
-        {
-        }
+        {}
     } // namespace cellular::sim
-}
+} // namespace bsp
diff --git a/module-bsp/board/linux/cellular/linux_cellular.hpp b/module-bsp/board/linux/cellular/linux_cellular.hpp
index 589c0e394..95b4b5feb 100644
--- a/module-bsp/board/linux/cellular/linux_cellular.hpp
+++ b/module-bsp/board/linux/cellular/linux_cellular.hpp
@@ -8,28 +8,27 @@
  * @details
  */
 
-
 #ifndef PUREPHONE_LINUX_CELLULAR_HPP
 #define PUREPHONE_LINUX_CELLULAR_HPP
 
 #include "bsp/cellular/bsp_cellular.hpp"
 
-
 #include <cstring>
 #include <sys/epoll.h>
 #include "termios.h"
 #include <sys/ioctl.h>
 #include "mutex.hpp"
 
-namespace bsp {
+namespace bsp
+{
 
-    class LinuxCellular: public Cellular  {
-    private:
+    class LinuxCellular : public Cellular
+    {
+      private:
         bool pv_SendingAllowed = true;
 
-    public:
-
-        LinuxCellular(const char* term, uint32_t portSpeed);
+      public:
+        LinuxCellular(const char *term, uint32_t portSpeed);
         ~LinuxCellular();
 
         void PowerUp() override final;
@@ -46,7 +45,7 @@ namespace bsp {
 
         void InformModemHostAsleep() override final;
 
-		void InformModemHostWakeup() override final;
+        void InformModemHostWakeup() override final;
 
         void EnterSleep() override final;
 
@@ -54,16 +53,31 @@ namespace bsp {
 
         void SetSpeed(uint32_t portSpeed);
 
-        void SetSendingAllowed(bool state) override final { pv_SendingAllowed = state; }
-        bool GetSendingAllowed() override final { return pv_SendingAllowed; }
+        void SetSendingAllowed(bool state) override final
+        {
+            pv_SendingAllowed = state;
+        }
+        bool GetSendingAllowed() override final
+        {
+            return pv_SendingAllowed;
+        }
 
         void SelectAntenna(uint8_t antenna) override final;
 
       private:
-
-        static constexpr speed_t baud_bits[] = {
-                0, B9600, B19200, B38400, B57600, B115200, B230400, B460800, B921600, B1500000, B2000000, B3000000, B4000000
-        };
+        static constexpr speed_t baud_bits[] = {0,
+                                                B9600,
+                                                B19200,
+                                                B38400,
+                                                B57600,
+                                                B115200,
+                                                B230400,
+                                                B460800,
+                                                B921600,
+                                                B1500000,
+                                                B2000000,
+                                                B3000000,
+                                                B4000000};
 
         static const uint32_t portBaudRate = 115200;
 
@@ -78,7 +92,6 @@ namespace bsp {
         cpp_freertos::MutexStandard serOutMutex;
     };
 
-}
+} // namespace bsp
 
-
-#endif //PUREPHONE_LINUX_CELLULAR_HPP
+#endif // PUREPHONE_LINUX_CELLULAR_HPP
diff --git a/module-bsp/board/linux/chip.h b/module-bsp/board/linux/chip.h
index 6e333ee28..b76cdf149 100644
--- a/module-bsp/board/linux/chip.h
+++ b/module-bsp/board/linux/chip.h
@@ -14,14 +14,15 @@
 #include <stdbool.h>
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-//! Test if in interrupt mode
-static inline bool isIRQ()
-{
-    return false;
-}
+    //! Test if in interrupt mode
+    static inline bool isIRQ()
+    {
+        return false;
+    }
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/linux/eink/ED028TC1.c b/module-bsp/board/linux/eink/ED028TC1.c
index f9475abc0..bb6ebcec1 100644
--- a/module-bsp/board/linux/eink/ED028TC1.c
+++ b/module-bsp/board/linux/eink/ED028TC1.c
@@ -29,31 +29,30 @@
 
 #include "macros.h"
 
-//header of the eink's shared memory frame buffer.
-typedef struct {
-	uint32_t frameCount;
-	uint32_t width;
-	uint32_t height;
-}shared_memory_header;
-//pointer to the header in the shared memory
-static shared_memory_header* shared_header = NULL;
-//pointe to the buffer ( located in memory right after shared header )
-static uint8_t* shared_buffer = NULL;
-//pointer to the buffer that simulates internal einks buffer. Image from the eink service is copied to first to this buffer
-//durinig update operation. When refresh is called image from this buffer is copied to the shared memory.
-static uint8_t* eink_internal_buffer = NULL;
-//size of the buffer in bytes
-static int shared_buffer_size = BOARD_EINK_DISPLAY_RES_X*BOARD_EINK_DISPLAY_RES_Y;
+// header of the eink's shared memory frame buffer.
+typedef struct
+{
+    uint32_t frameCount;
+    uint32_t width;
+    uint32_t height;
+} shared_memory_header;
+// pointer to the header in the shared memory
+static shared_memory_header *shared_header = NULL;
+// pointe to the buffer ( located in memory right after shared header )
+static uint8_t *shared_buffer = NULL;
+// pointer to the buffer that simulates internal einks buffer. Image from the eink service is copied to first to this
+// buffer durinig update operation. When refresh is called image from this buffer is copied to the shared memory.
+static uint8_t *eink_internal_buffer = NULL;
+// size of the buffer in bytes
+static int shared_buffer_size = BOARD_EINK_DISPLAY_RES_X * BOARD_EINK_DISPLAY_RES_Y;
 
 int shared_fd = 0;
 
-static uint8_t              s_einkIsPoweredOn = false;  //  Variable which contains the state of the power of the EPD display
-
+static uint8_t s_einkIsPoweredOn = false; //  Variable which contains the state of the power of the EPD display
 
 /* Function bodies */
 void EinkChangeDisplayUpdateTimings(EinkDisplayTimingsMode_e timingsMode)
-{
-}
+{}
 
 uint8_t EinkIsPoweredOn()
 {
@@ -62,7 +61,7 @@ uint8_t EinkIsPoweredOn()
 
 void EinkPowerOn()
 {
-	s_einkIsPoweredOn = true;
+    s_einkIsPoweredOn = true;
 }
 
 void EinkPowerOff()
@@ -70,134 +69,132 @@ void EinkPowerOff()
     s_einkIsPoweredOn = false;
 }
 
-void EinkPowerDown(void) {
-	EinkPowerOff();
-}
-
-int16_t EinkGetTemperatureInternal() {
-	return 25;
-}
-
-
-static shared_memory_header* createSHMBuffer( const char* name )
+void EinkPowerDown(void)
 {
-	if( shared_header != NULL )
-		return shared_header;
-
-	//check if shared memory blok is already created
-	if ((shared_fd = shm_open ( name, O_RDWR | O_CREAT , 0660)) == -1) {
-		printf("shm is already created");
-	}
-	else {
-		if (ftruncate (shared_fd, sizeof (shared_memory_header)+shared_buffer_size ) == -1) {
-			printf("shm is already created");
-		}
-	}
-	if ((shared_header =
-		mmap (NULL, sizeof (shared_memory_header)+shared_buffer_size, PROT_READ | PROT_WRITE, MAP_SHARED, shared_fd, 0)) == MAP_FAILED) {
-		printf("mmap failed");
-	}
-
-	shared_buffer = ((uint8_t*)shared_header) + sizeof( shared_memory_header );
-	eink_internal_buffer = shared_buffer + shared_buffer_size;
-
-	return shared_header;
+    EinkPowerOff();
 }
 
-//on linux this function is responsible for creating/opeingin shared memory region where image from eink task will be copied
+int16_t EinkGetTemperatureInternal()
+{
+    return 25;
+}
+
+static shared_memory_header *createSHMBuffer(const char *name)
+{
+    if (shared_header != NULL)
+        return shared_header;
+
+    // check if shared memory blok is already created
+    if ((shared_fd = shm_open(name, O_RDWR | O_CREAT, 0660)) == -1) {
+        printf("shm is already created");
+    }
+    else {
+        if (ftruncate(shared_fd, sizeof(shared_memory_header) + shared_buffer_size) == -1) {
+            printf("shm is already created");
+        }
+    }
+    if ((shared_header = mmap(NULL,
+                              sizeof(shared_memory_header) + shared_buffer_size,
+                              PROT_READ | PROT_WRITE,
+                              MAP_SHARED,
+                              shared_fd,
+                              0)) == MAP_FAILED) {
+        printf("mmap failed");
+    }
+
+    shared_buffer        = ((uint8_t *)shared_header) + sizeof(shared_memory_header);
+    eink_internal_buffer = shared_buffer + shared_buffer_size;
+
+    return shared_header;
+}
+
+// on linux this function is responsible for creating/opeingin shared memory region where image from eink task will be
+// copied
 EinkStatus_e EinkResetAndInitialize()
 {
 
-	s_einkIsPoweredOn = false;
+    s_einkIsPoweredOn = false;
 
-	//create and map shared memory
-	char* shared_name = "pure_gui_fmbuf";
-	if( createSHMBuffer( shared_name ) == NULL ){
-		return EinkError;
-	}
+    // create and map shared memory
+    char *shared_name = "pure_gui_fmbuf";
+    if (createSHMBuffer(shared_name) == NULL) {
+        return EinkError;
+    }
 
-	//start renderer application
-	system( "./service_renderer &" );
+    // start renderer application
+    system("./service_renderer &");
 
     return EinkOK;
 }
 
-EinkStatus_e EinkUpdateWaveform( const EinkWaveFormSettings_t* settings )
+EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t *settings)
 {
     return EinkOK;
 }
 
-EinkStatus_e
-EinkWaitTillPipelineBusy()
+EinkStatus_e EinkWaitTillPipelineBusy()
 {
     return EinkOK;
 }
 
-EinkStatus_e
-EinkDitherDisplay()
+EinkStatus_e EinkDitherDisplay()
 {
     return EinkOK;
 }
 
-EinkStatus_e
-EinkUpdateFrame ( uint16_t X,
-                  uint16_t Y,
-                  uint16_t W,
-                  uint16_t H,
-                  uint8_t *buffer,
-                  EinkBpp_e bpp,
-                  EinkDisplayColorMode_e invertColors)
+EinkStatus_e EinkUpdateFrame(
+    uint16_t X, uint16_t Y, uint16_t W, uint16_t H, uint8_t *buffer, EinkBpp_e bpp, EinkDisplayColorMode_e invertColors)
 {
-	uint32_t offset_eink = Y*BOARD_EINK_DISPLAY_RES_X + X;
-	uint32_t offset_buffer = 0;
-	for( uint32_t h=0; h<H; ++h ) {
-		memcpy( shared_buffer + offset_eink, buffer + offset_buffer, W );
-		offset_eink += BOARD_EINK_DISPLAY_RES_X;
-		offset_buffer += W;
-	}
+    uint32_t offset_eink   = Y * BOARD_EINK_DISPLAY_RES_X + X;
+    uint32_t offset_buffer = 0;
+    for (uint32_t h = 0; h < H; ++h) {
+        memcpy(shared_buffer + offset_eink, buffer + offset_buffer, W);
+        offset_eink += BOARD_EINK_DISPLAY_RES_X;
+        offset_buffer += W;
+    }
 
-	shared_header->frameCount++;
+    shared_header->frameCount++;
     return EinkOK;
 }
 
-
-EinkStatus_e
-EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill)
+EinkStatus_e EinkFillScreenWithColor(EinkDisplayColorFilling_e colorFill)
 {
-    if( shared_buffer && shared_header ) {
-    	memset(shared_buffer, colorFill, shared_header->width * shared_header->height );
-    	return EinkOK;
+    if (shared_buffer && shared_header) {
+        memset(shared_buffer, colorFill, shared_header->width * shared_header->height);
+        return EinkOK;
     }
 
     return EinkError;
 }
 
-EinkStatus_e
-EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode)
+EinkStatus_e EinkRefreshImage(
+    uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode)
 {
     return EinkOK;
 }
 
-__attribute__((optimize("O3")))
-void EinkARGBToLuminance(uint8_t *dataIn, uint8_t* dataOut, uint32_t displayWidth, uint32_t displayHeight)
+__attribute__((optimize("O3"))) void EinkARGBToLuminance(uint8_t *dataIn,
+                                                         uint8_t *dataOut,
+                                                         uint32_t displayWidth,
+                                                         uint32_t displayHeight)
 {
     uint8_t r, g, b;
     float fi;
     uint32_t *src;
     uint8_t *dst;
 
-    src = (uint32_t*)dataIn;
-    dst = (uint8_t*)dataOut;
+    src = (uint32_t *)dataIn;
+    dst = (uint8_t *)dataOut;
 
-    for (uint32_t i=0; i<(displayWidth*displayHeight); i+=2)   //increase by 8 pixels - 32bit word is 8 pixels in 4BPP
+    for (uint32_t i = 0; i < (displayWidth * displayHeight);
+         i += 2) // increase by 8 pixels - 32bit word is 8 pixels in 4BPP
     {
         *dst = 0x00000000;
-        for (uint8_t j=0; j<8; j+=4)
-        {
-            r = (uint8_t)((*(src)) >> 16);
-            g = (uint8_t)((*(src)) >> 8);
-            b = (uint8_t)*(src);
-            fi = (r + g + b)/3;
+        for (uint8_t j = 0; j < 8; j += 4) {
+            r  = (uint8_t)((*(src)) >> 16);
+            g  = (uint8_t)((*(src)) >> 8);
+            b  = (uint8_t) * (src);
+            fi = (r + g + b) / 3;
 
             *dst |= ((uint32_t)(floor(fi / 16))) << (4 - j);
 
@@ -207,6 +204,7 @@ void EinkARGBToLuminance(uint8_t *dataIn, uint8_t* dataOut, uint32_t displayWidt
     }
 }
 
-EinkStatus_e EinkMemcpyDmaInit( edma_callback memcpyCallback ) {
-	return EinkOK;
+EinkStatus_e EinkMemcpyDmaInit(edma_callback memcpyCallback)
+{
+    return EinkOK;
 }
diff --git a/module-bsp/board/linux/eink/ED028TC1.h b/module-bsp/board/linux/eink/ED028TC1.h
index 226c6d8f2..4748d11ee 100644
--- a/module-bsp/board/linux/eink/ED028TC1.h
+++ b/module-bsp/board/linux/eink/ED028TC1.h
@@ -19,413 +19,418 @@
 #include "fsl_edma.h"
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
 /* Exported macro ------------------------------------------------------------*/
 /**
  * @brief ED028TC1 register definitions
  */
-#define EinkPanelSetting                  (0x00U)
-#define EinkPowerSetting                  (0x01U)
-#define EinkPowerOFF                      (0x02U)
-#define EinkPowerOFFSequenceSetting       (0x03U)
-#define EinkPowerON                       (0x04U)
-#define EinkDPC                           (0x05U)
-#define EinkDSLP                          (0x06U)
-#define EinkBoosterSoftStart              (0x07U)
+#define EinkPanelSetting            (0x00U)
+#define EinkPowerSetting            (0x01U)
+#define EinkPowerOFF                (0x02U)
+#define EinkPowerOFFSequenceSetting (0x03U)
+#define EinkPowerON                 (0x04U)
+#define EinkDPC                     (0x05U)
+#define EinkDSLP                    (0x06U)
+#define EinkBoosterSoftStart        (0x07U)
 
-#define EinkDataStartTransmission1        (0x10U)
-#define EinkDisplayRefresh                (0x12U)
-#define EinkDTM2                          (0x13U)
-#define EinkAWM1                          (0x15U)
-#define EinkAWM2                          (0x16U)
+#define EinkDataStartTransmission1 (0x10U)
+#define EinkDisplayRefresh         (0x12U)
+#define EinkDTM2                   (0x13U)
+#define EinkAWM1                   (0x15U)
+#define EinkAWM2                   (0x16U)
 
-#define EinkLUTC                          (0x20U)
-#define EinkLUTD                          (0x21U)
-#define EinkLUTR                          (0x22U)
-#define EinkPowerSaving                   (0x26U)
-#define EinkMISCS                         (0x27U)
+#define EinkLUTC        (0x20U)
+#define EinkLUTD        (0x21U)
+#define EinkLUTR        (0x22U)
+#define EinkPowerSaving (0x26U)
+#define EinkMISCS       (0x27U)
 
-#define EinkPLLControl                    (0x30U)
+#define EinkPLLControl (0x30U)
 
-#define EinkTemperatureSensorCalibration  (0x40U)
-#define EinkTemperatureSensorSelection    (0x41U)
+#define EinkTemperatureSensorCalibration (0x40U)
+#define EinkTemperatureSensorSelection   (0x41U)
 
-#define EinkVcomAndDataIntervalSetting    (0x50U)
-#define EinkLPD                           (0x51U)
+#define EinkVcomAndDataIntervalSetting (0x50U)
+#define EinkLPD                        (0x51U)
 
-#define EinkTCONSetting                   (0x60U)
-#define EinkResolutionSetting             (0x61U)
-#define EinkDAM                           (0x65U)
+#define EinkTCONSetting       (0x60U)
+#define EinkResolutionSetting (0x61U)
+#define EinkDAM               (0x65U)
 
-#define EinkREV                           (0x70U)
-#define EinkFLG                           (0x71U)
-#define EinkLUT_COL_FLG                   (0x72U)
-#define EinkLUT_BUSY_FLG                  (0x73U)
+#define EinkREV          (0x70U)
+#define EinkFLG          (0x71U)
+#define EinkLUT_COL_FLG  (0x72U)
+#define EinkLUT_BUSY_FLG (0x73U)
 
-#define EinkAutoMeasurementVcom           (0x80U)
-#define EinkReadVcomValue                 (0x81U)
-#define EinkVCM_DCSetting                 (0x82U)
-#define EinkDataStartTransmissionWindow   (0x83U)
-#define EinkEDS                           (0x84U)
-#define EinkXONS                          (0x85U)
+#define EinkAutoMeasurementVcom         (0x80U)
+#define EinkReadVcomValue               (0x81U)
+#define EinkVCM_DCSetting               (0x82U)
+#define EinkDataStartTransmissionWindow (0x83U)
+#define EinkEDS                         (0x84U)
+#define EinkXONS                        (0x85U)
 
-#define EinkLEDDS                         (0x90U)
-#define EinkPBC                           (0x91U)
-#define EinkPBCS                          (0x92U)
-#define EinkEXTRS                         (0x93U)
-#define EinkNTRS                          (0x94U)
+#define EinkLEDDS (0x90U)
+#define EinkPBC   (0x91U)
+#define EinkPBCS  (0x92U)
+#define EinkEXTRS (0x93U)
+#define EinkNTRS  (0x94U)
 
-#define EinkGDOrderSetting                (0xE0U)
+#define EinkGDOrderSetting (0xE0U)
 
 /**
  * @brief ED028TC1 register bit definitions
  */
-//PanelSetting
-#define XON             (1<<7)
-#define RES0            (1<<6)
-#define LUT_SEL         (1<<5)
-#define DM              (1<<4)
-#define SHL             (1<<2)
-#define SPIWM           (1<<1)
-#define RST_N           (1<<0)
-#define SFT1PX          (0<<0)
-#define SFT2PX          (1<<0)
-#define SFT3PX          (2<<0)
-#define SFT4PX          (3<<0)
+// PanelSetting
+#define XON     (1 << 7)
+#define RES0    (1 << 6)
+#define LUT_SEL (1 << 5)
+#define DM      (1 << 4)
+#define SHL     (1 << 2)
+#define SPIWM   (1 << 1)
+#define RST_N   (1 << 0)
+#define SFT1PX  (0 << 0)
+#define SFT2PX  (1 << 0)
+#define SFT3PX  (2 << 0)
+#define SFT4PX  (3 << 0)
 
-//PowerSetting
-#define VSource_EN      (1<<0)
-#define VGate_EN        (1<<1)
-#define VG_LVL17V       (0<<0)
-#define VG_LVL18V       (1<<0)
-#define VG_LVL19V       (2<<0)
-#define VG_LVL20V       (3<<0)
-#define VG_LVL21V       (4<<0)
-#define VSLV_LVL        (0)     //this is: 7-bit 00h=2.4V, 7Fh=15.0V
-#define VSL_LVL15V      (0<<2)
-#define VSL_LVL14V      (1<<2)
-#define VSL_LVL13V      (2<<2)
-#define VSL_LVL12V      (3<<2)
-#define VSH_LVL15V      (0<<0)
-#define VSH_LVL14V      (1<<0)
-#define VSH_LVL13V      (2<<0)
-#define VSH_LVL12V      (3<<0)
+// PowerSetting
+#define VSource_EN (1 << 0)
+#define VGate_EN   (1 << 1)
+#define VG_LVL17V  (0 << 0)
+#define VG_LVL18V  (1 << 0)
+#define VG_LVL19V  (2 << 0)
+#define VG_LVL20V  (3 << 0)
+#define VG_LVL21V  (4 << 0)
+#define VSLV_LVL   (0) // this is: 7-bit 00h=2.4V, 7Fh=15.0V
+#define VSL_LVL15V (0 << 2)
+#define VSL_LVL14V (1 << 2)
+#define VSL_LVL13V (2 << 2)
+#define VSL_LVL12V (3 << 2)
+#define VSH_LVL15V (0 << 0)
+#define VSH_LVL14V (1 << 0)
+#define VSH_LVL13V (2 << 0)
+#define VSH_LVL12V (3 << 0)
 
-//PowerOFFSequenceSetting
-#define T_VDS_OFF_1F    (0<<4)
-#define T_VDS_OFF_2F    (1<<4)
-#define T_VDS_OFF_3F    (2<<4)
-#define T_VDS_OFF_4F    (3<<4)
+// PowerOFFSequenceSetting
+#define T_VDS_OFF_1F (0 << 4)
+#define T_VDS_OFF_2F (1 << 4)
+#define T_VDS_OFF_3F (2 << 4)
+#define T_VDS_OFF_4F (3 << 4)
 
-//BoosterSoftStart
-#define  BTPHx_SSP_10ms (0<<6)  //soft start period of phase A,B
-#define  BTPHx_SSP_20ms (1<<6)
-#define  BTPHx_SSP_30ms (2<<6)
-#define  BTPHx_SSP_40ms (3<<6)
-#define  BTPHx_DS_1     (0<<3)  //driving strength of phase A,B,C
-#define  BTPHx_DS_2     (1<<3)
-#define  BTPHx_DS_3     (2<<3)
-#define  BTPHx_DS_4     (3<<3)
-#define  BTPHx_DS_5     (4<<3)
-#define  BTPHx_DS_6     (5<<3)
-#define  BTPHx_DS_7     (6<<3)
-#define  BTPHx_DS_8     (7<<3)
-#define  BTPHx_OT_027   (0<<0)  //minimum OFF time setting of phase A,B,C
-#define  BTPHx_OT_034   (1<<0)
-#define  BTPHx_OT_040   (2<<0)
-#define  BTPHx_OT_054   (3<<0)
-#define  BTPHx_OT_080   (4<<0)
-#define  BTPHx_OT_154   (5<<0)
-#define  BTPHx_OT_334   (6<<0)
-#define  BTPHx_OT_658   (7<<0)
+// BoosterSoftStart
+#define BTPHx_SSP_10ms (0 << 6) // soft start period of phase A,B
+#define BTPHx_SSP_20ms (1 << 6)
+#define BTPHx_SSP_30ms (2 << 6)
+#define BTPHx_SSP_40ms (3 << 6)
+#define BTPHx_DS_1     (0 << 3) // driving strength of phase A,B,C
+#define BTPHx_DS_2     (1 << 3)
+#define BTPHx_DS_3     (2 << 3)
+#define BTPHx_DS_4     (3 << 3)
+#define BTPHx_DS_5     (4 << 3)
+#define BTPHx_DS_6     (5 << 3)
+#define BTPHx_DS_7     (6 << 3)
+#define BTPHx_DS_8     (7 << 3)
+#define BTPHx_OT_027   (0 << 0) // minimum OFF time setting of phase A,B,C
+#define BTPHx_OT_034   (1 << 0)
+#define BTPHx_OT_040   (2 << 0)
+#define BTPHx_OT_054   (3 << 0)
+#define BTPHx_OT_080   (4 << 0)
+#define BTPHx_OT_154   (5 << 0)
+#define BTPHx_OT_334   (6 << 0)
+#define BTPHx_OT_658   (7 << 0)
 
-#define EINK_TEMPERATURE_SENSOR_USE_INTERNAL    (0 << 6)
-#define EINK_TEMPERATURE_SENSOR_USE_EXTERNAL    (2 << 6)
+#define EINK_TEMPERATURE_SENSOR_USE_INTERNAL (0 << 6)
+#define EINK_TEMPERATURE_SENSOR_USE_EXTERNAL (2 << 6)
 
-//DataStartTransmission1
-#define Cur_BPP1        (0<<0)
-#define Cur_BPP2        (1<<0)
-#define Cur_BPP3        (2<<0)
-#define Cur_BPP4        (3<<0)
+// DataStartTransmission1
+#define Cur_BPP1 (0 << 0)
+#define Cur_BPP2 (1 << 0)
+#define Cur_BPP3 (2 << 0)
+#define Cur_BPP4 (3 << 0)
 
-//DisplayRefresh
-#define AC_DCVCOM       (1<<7)
-#define WFMode0         (0<<4)
-#define WFMode1         (1<<4)
-#define WFMode2         (2<<4)
-#define WFMode3         (3<<4)
-#define WFMode4         (4<<4)
-#define UPD_CPY_TO_PRE  (1<<3)
-#define DN_EN           (1<<2)
-#define Regal_EN_DIS    (0<<0)
-#define Regal_EN_K      (1<<0)
-#define Regal_EN_W      (2<<0)
-#define Regal_EN_KW     (3<<0)
+// DisplayRefresh
+#define AC_DCVCOM      (1 << 7)
+#define WFMode0        (0 << 4)
+#define WFMode1        (1 << 4)
+#define WFMode2        (2 << 4)
+#define WFMode3        (3 << 4)
+#define WFMode4        (4 << 4)
+#define UPD_CPY_TO_PRE (1 << 3)
+#define DN_EN          (1 << 2)
+#define Regal_EN_DIS   (0 << 0)
+#define Regal_EN_K     (1 << 0)
+#define Regal_EN_W     (2 << 0)
+#define Regal_EN_KW    (3 << 0)
 
-//PLLControl
-#define OSC_RATE_SEL2_5 (0<<1)
-#define OSC_RATE_SEL5   (1<<1)
-#define OSC_RATE_SEL8   (2<<1)
-#define OSC_RATE_SEL10  (3<<1)
-#define OSC_RATE_SEL16  (4<<1)
-#define OSC_RATE_SEL18  (5<<1)
-#define OSC_RATE_SEL19  (6<<1)
-#define OSC_RATE_SEL20  (7<<1)
+// PLLControl
+#define OSC_RATE_SEL2_5 (0 << 1)
+#define OSC_RATE_SEL5   (1 << 1)
+#define OSC_RATE_SEL8   (2 << 1)
+#define OSC_RATE_SEL10  (3 << 1)
+#define OSC_RATE_SEL16  (4 << 1)
+#define OSC_RATE_SEL18  (5 << 1)
+#define OSC_RATE_SEL19  (6 << 1)
+#define OSC_RATE_SEL20  (7 << 1)
 
-//VcomAndDataIntervalSetting
-#define VBD_CON         (1<<3)
-#define VBD_OT_G0_G0    (0<<1)
-#define VBD_OT_G0_G15   (2<<1)
-#define VBD_OT_G15_G0   (3<<1)
-#define VBD_OT_G15_G15  (4<<1)
-#define DDX             (1<<0)
-#define CDI             (4)     //Vcom data interval: 0h=2hsync -> Fh=32hsync, step=2
-#define DCI             (0)     //Data to Vcom interval: 0h=1hsync -> Fh=16hsync, step=1
+// VcomAndDataIntervalSetting
+#define VBD_CON        (1 << 3)
+#define VBD_OT_G0_G0   (0 << 1)
+#define VBD_OT_G0_G15  (2 << 1)
+#define VBD_OT_G15_G0  (3 << 1)
+#define VBD_OT_G15_G15 (4 << 1)
+#define DDX            (1 << 0)
+#define CDI            (4) // Vcom data interval: 0h=2hsync -> Fh=32hsync, step=2
+#define DCI            (0) // Data to Vcom interval: 0h=1hsync -> Fh=16hsync, step=1
 
-//AutoMeasurementVcom
-#define VCM_EN          (1<<6)
-#define AMVT3s          (0<<4)
-#define AMVT5s          (1<<4)
-#define AMVT6s          (2<<4)
-#define AMVT10s         (3<<4)
-#define AMVX            (1<<3)
-#define AMVS            (1<<2)
-#define AMV             (1<<1)
-#define AMVE            (1<<0)
+// AutoMeasurementVcom
+#define VCM_EN  (1 << 6)
+#define AMVT3s  (0 << 4)
+#define AMVT5s  (1 << 4)
+#define AMVT6s  (2 << 4)
+#define AMVT10s (3 << 4)
+#define AMVX    (1 << 3)
+#define AMVS    (1 << 2)
+#define AMV     (1 << 1)
+#define AMVE    (1 << 0)
 
-//GDOrderSetting
-#define VBD_EN_SEL      (1<<3)
-#define GDOS_M0         (0<<0)
-#define GDOS_M1         (1<<0)
-#define GDOS_M2         (2<<0)
-#define GDOS_M3         (3<<0)
-#define GDOS_M4         (4<<0)
-#define GDOS_M5         (5<<0)
-#define GDOS_M6         (6<<0)
-#define GDOS_M7         (7<<0)
-#define VBD_FN          (0)     //VBorder frame number seting: 0-VBD disabled, 1-VBD=8, ... 1Fh-VBD=248
+// GDOrderSetting
+#define VBD_EN_SEL (1 << 3)
+#define GDOS_M0    (0 << 0)
+#define GDOS_M1    (1 << 0)
+#define GDOS_M2    (2 << 0)
+#define GDOS_M3    (3 << 0)
+#define GDOS_M4    (4 << 0)
+#define GDOS_M5    (5 << 0)
+#define GDOS_M6    (6 << 0)
+#define GDOS_M7    (7 << 0)
+#define VBD_FN     (0) // VBorder frame number seting: 0-VBD disabled, 1-VBD=8, ... 1Fh-VBD=248
 
 // Dither
-#define EINK_DITHER_START       0x01
-#define EINK_DITHER_4BPP_MODE   (0 << 1)
-#define EINK_DITHER_2BPP_MODE   (1 << 1)
+#define EINK_DITHER_START     0x01
+#define EINK_DITHER_4BPP_MODE (0 << 1)
+#define EINK_DITHER_2BPP_MODE (1 << 1)
 
+#define EINK_FLAG_BUSY_N 0x0001 ///< This flag informs that the driver is busy. 0 - busy, 1 - idle
+#define EINK_FLAG_POWER_OFF_IN_PROGRESS                                                                                \
+    0x0002 ///< This flag informs that the Power Off sequence is in progress. 1 - in progress
+#define EINK_FLAG_POWER_ON_IN_PROGRESS                                                                                 \
+    0x0004 ///< This flag informs that the Power On sequence is in progress. 1 - in progress
+#define EINK_FLAG_ENTIRE_FRAME_RECEIVED                                                                                \
+    0x0008 ///< This flag informs that the driver received data for entire frame defined in the \ref
+           ///< EinkDataStartTransmissionWindow command
+#define EINK_FLAG_I2C_BUSY           0x0010 ///< This flag informs that the I2C master periph is busy. Active low
+#define EINK_FLAG_I2C_ERROR          0x0020 ///< This flag informs that the I2C master acquired an error
+#define EINK_FLAG_PIPELINE_COLLISION 0x0040 ///< This flag informs that two frames sent in the pipelin overlap
+#define EINK_FLAG_PIPELINE_BUSY      0x0080 ///< This flag informs that pipeline insertion is in progress
+#define EINK_FLAG_REAGL_BUSY         0x0100 ///< This flag informs that the REAGLS function processing is in progress
+#define EINK_FLAG_DITHER_IN_PROGRESS 0x0200 ///< This flag informs that the Dither process is in progress
+#define EINK_FLAG_DISP_REFRESH_IN_PROGRESS                                                                             \
+    0x0400 ///< This flag informs that the Display Refreshing process is in progress
+#define EINK_FLAG_AUTO_MEASURE_VCOM_IN_PROGRESS                                                                        \
+    0x0800 ///< This flag informs that the auto measurement of the VCOM is in progress
+#define EINK_FLAG_EPD_DISCHARGE_IN_PROGRESS 0x1000 ///< This flag informs that the EPD display discharge is in progress
+#define EINK_FLAG_BOOST_VOLTAGE_READY       0x4000 ///< This flag informs that the Boost voltage is ready
+#define EINK_FLAG_RAM_TEST_FLAG             0x8000 ///< This flag is for internal SRAM memory testing
 
-#define EINK_FLAG_BUSY_N                        0x0001      ///< This flag informs that the driver is busy. 0 - busy, 1 - idle
-#define EINK_FLAG_POWER_OFF_IN_PROGRESS         0x0002      ///< This flag informs that the Power Off sequence is in progress. 1 - in progress
-#define EINK_FLAG_POWER_ON_IN_PROGRESS          0x0004      ///< This flag informs that the Power On sequence is in progress. 1 - in progress
-#define EINK_FLAG_ENTIRE_FRAME_RECEIVED         0x0008      ///< This flag informs that the driver received data for entire frame defined in the \ref EinkDataStartTransmissionWindow command
-#define EINK_FLAG_I2C_BUSY                      0x0010      ///< This flag informs that the I2C master periph is busy. Active low
-#define EINK_FLAG_I2C_ERROR                     0x0020      ///< This flag informs that the I2C master acquired an error
-#define EINK_FLAG_PIPELINE_COLLISION            0x0040      ///< This flag informs that two frames sent in the pipelin overlap
-#define EINK_FLAG_PIPELINE_BUSY                 0x0080      ///< This flag informs that pipeline insertion is in progress
-#define EINK_FLAG_REAGL_BUSY                    0x0100      ///< This flag informs that the REAGLS function processing is in progress
-#define EINK_FLAG_DITHER_IN_PROGRESS            0x0200      ///< This flag informs that the Dither process is in progress
-#define EINK_FLAG_DISP_REFRESH_IN_PROGRESS      0x0400      ///< This flag informs that the Display Refreshing process is in progress
-#define EINK_FLAG_AUTO_MEASURE_VCOM_IN_PROGRESS 0x0800      ///< This flag informs that the auto measurement of the VCOM is in progress
-#define EINK_FLAG_EPD_DISCHARGE_IN_PROGRESS     0x1000      ///< This flag informs that the EPD display discharge is in progress
-#define EINK_FLAG_BOOST_VOLTAGE_READY           0x4000      ///< This flag informs that the Boost voltage is ready
-#define EINK_FLAG_RAM_TEST_FLAG                 0x8000      ///< This flag is for internal SRAM memory testing
+    /* Exported types ------------------------------------------------------------*/
+    /**
+     * @enum EinkStatus_e
+     */
+    typedef enum
+    {
+        EinkOK, //!< EinkOK
+        EinkError,
+        EinkSPIErr,                //!< EinkSPIErr
+        EinkSPINotInitializedErr,  //!< EinkSPINotInitializedErr
+        EinkDMAErr,                //!< EinkDMAErr
+        EinkInitErr,               //!< EinkInitErr
+        EinkTimeout,               //!< Timeout occured while waiting for not busy signal from EINK
+        EinkNoMem,                 //!< Could not allocate memory
+        EinkWaveformsFileOpenFail, //!< Could not open the file with the waveforms for EPD display
+    } EinkStatus_e;
 
+    /**
+     * @enum EinkBpp_e
+     */
+    typedef enum
+    {
+        Eink1Bpp = 1, //!< Eink1Bpp
+        Eink2Bpp,     //!< Eink2Bpp
+        Eink3Bpp,     //!< Eink3Bpp
+        Eink4Bpp      //!< Eink4Bpp
+    } EinkBpp_e;
 
-/* Exported types ------------------------------------------------------------*/
-/**
- * @enum EinkStatus_e
- */
-typedef enum
-{
-  EinkOK,                       //!< EinkOK
-  EinkError,
-  EinkSPIErr,                   //!< EinkSPIErr
-  EinkSPINotInitializedErr,     //!< EinkSPINotInitializedErr
-  EinkDMAErr,                   //!< EinkDMAErr
-  EinkInitErr,                  //!< EinkInitErr
-  EinkTimeout,                  //!< Timeout occured while waiting for not busy signal from EINK
-  EinkNoMem,                    //!< Could not allocate memory
-  EinkWaveformsFileOpenFail,    //!< Could not open the file with the waveforms for EPD display
-} EinkStatus_e;
+    typedef enum
+    {
+        EinkWaveformINIT,  ///< Clears deeply the display
+        EinkWaveformA2,    ///< Fastest, direct update, no flashing. Severe ghosting effect
+        EinkWaveformDU2,   ///< Fast, direct update, no flashing. Medium ghosting effect
+        EinkWaveformGLD16, ///< Slow, little flashing. Light ghosting mode
+        EinkWaveformGC16,  ///< Slow, strong flashing. Next to none ghosting
+    } EinkWaveforms_e;
 
-/**
- * @enum EinkBpp_e
- */
-typedef enum
-{
-  Eink1Bpp = 1,//!< Eink1Bpp
-  Eink2Bpp,    //!< Eink2Bpp
-  Eink3Bpp,    //!< Eink3Bpp
-  Eink4Bpp     //!< Eink4Bpp
-} EinkBpp_e;
+    typedef enum
+    {
+        EinkDisplayTimingsDeepCleanMode,
+        EinkDisplayTimingsHighContrastMode,
+        EinkDisplayTimingsFastRefreshMode
+    } EinkDisplayTimingsMode_e;
 
-typedef enum
-{
-    EinkWaveformINIT,   ///< Clears deeply the display
-    EinkWaveformA2,     ///< Fastest, direct update, no flashing. Severe ghosting effect
-    EinkWaveformDU2,    ///< Fast, direct update, no flashing. Medium ghosting effect
-    EinkWaveformGLD16,  ///< Slow, little flashing. Light ghosting mode
-    EinkWaveformGC16,   ///< Slow, strong flashing. Next to none ghosting
-} EinkWaveforms_e;
+    typedef enum
+    {
+        EinkDisplayColorBlack = 0,
+        EinkDisplayColorWhite = 0xFF
+    } EinkDisplayColorFilling_e;
 
-typedef enum
-{
-    EinkDisplayTimingsDeepCleanMode,
-    EinkDisplayTimingsHighContrastMode,
-    EinkDisplayTimingsFastRefreshMode
-} EinkDisplayTimingsMode_e;
+    typedef enum
+    {
+        EinkDisplayColorModeStandard,
+        EinkDisplayColorModeInverted
+    } EinkDisplayColorMode_e;
 
-typedef enum
-{
-    EinkDisplayColorBlack = 0,
-    EinkDisplayColorWhite = 0xFF
-} EinkDisplayColorFilling_e;
+    typedef struct
+    {
+        // type of eink's waveform
+        EinkWaveforms_e mode;
+        // temperature of surrounding
+        int32_t temperature;
+        // pointer to lookup table for lut c
+        uint8_t *LUTCData;
+        // sizeo of lutc data
+        uint32_t LUTCSize;
+        // pointer to lookup table for lut d
+        uint8_t *LUTDData;
+        // size of lutd data
+        uint32_t LUTDSize;
+    } EinkWaveFormSettings_t;
 
-typedef enum
-{
-    EinkDisplayColorModeStandard,
-    EinkDisplayColorModeInverted
-} EinkDisplayColorMode_e;
+    /* Exported constants --------------------------------------------------------*/
 
-typedef struct {
-	//type of eink's waveform
-	EinkWaveforms_e mode;
-	//temperature of surrounding
-	int32_t temperature;
-	//pointer to lookup table for lut c
-	uint8_t* LUTCData;
-	//sizeo of lutc data
-	uint32_t LUTCSize;
-	//pointer to lookup table for lut d
-	uint8_t* LUTDData;
-	//size of lutd data
-	uint32_t LUTDSize;
-}EinkWaveFormSettings_t;
+    /* Exported functions ------------------------------------------------------- */
 
-/* Exported constants --------------------------------------------------------*/
+    /**
+     * This function returns the state of the EPD siplay powe
+     * @return 1 if is currently powered on, 0 otherwise
+     */
+    uint8_t EinkIsPoweredOn();
 
-/* Exported functions ------------------------------------------------------- */
+    /**
+     * This function powers on the display. Needed for refreshing, measuring the temperature
+     */
+    void EinkPowerOn();
 
-/**
- * This function returns the state of the EPD siplay powe
- * @return 1 if is currently powered on, 0 otherwise
- */
-uint8_t EinkIsPoweredOn();
+    /**
+     * This functions powers off the display
+     */
+    void EinkPowerOff();
 
-/**
- * This function powers on the display. Needed for refreshing, measuring the temperature
- */
-void EinkPowerOn();
+    /**
+     * @brief This function is responsible for turning eink of and releasing all resources.
+     */
+    void EinkPowerDown(void);
 
-/**
- * This functions powers off the display
- */
-void EinkPowerOff();
+    /**
+     * This function measures the ambient temperature using the ED028TC1 display internal temperature sensor.
+     * @note The display needs to be powered on
+     *
+     * @return Ambient temperature in the degrees of Celsius
+     */
+    int16_t EinkGetTemperatureInternal();
 
-/**
- * @brief This function is responsible for turning eink of and releasing all resources.
- */
-void EinkPowerDown(void);
+    /**
+     * @brief This function resets the eink display and setups the initial configuration
+     */
+    EinkStatus_e EinkResetAndInitialize();
 
-/**
- * This function measures the ambient temperature using the ED028TC1 display internal temperature sensor.
- * @note The display needs to be powered on
- *
- * @return Ambient temperature in the degrees of Celsius
- */
-int16_t EinkGetTemperatureInternal();
+    /**
+     * TODO: Fill The doxy when got info what does it do
+     * @return
+     */
+    EinkStatus_e EinkWaitTillPipelineBusy();
 
-/**
- * @brief This function resets the eink display and setups the initial configuration
- */
-EinkStatus_e EinkResetAndInitialize();
+    /**
+     * TODO: Fill The doxy when got info what does it do
+     * @return
+     */
+    EinkStatus_e EinkDitherDisplay();
 
-/**
- * TODO: Fill The doxy when got info what does it do
- * @return
- */
-EinkStatus_e EinkWaitTillPipelineBusy();
+    /**
+     * @brief This function sends the part of image from the given buffer to the internal memory of the display. It
+     * makes not screen to update.
+     * @param X [in] - image start position X in pixels
+     * @param Y [in] - image start position Y in pixels
+     * @param W [in] - image width in pixels
+     * @param H [in] - image height in pixels
+     * @param buffer [in] -  pointer to image encoded according to \ref bpp set in initialization
+     * @param bpp [in] - The format of the \ref buffer (number of the bits per pixel)
+     * @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+     *
+     * @return  EinkNoMem - Could not allocate the temporary buffer
+     *          EinkOK - Part of image send successfully
+     */
+    EinkStatus_e EinkUpdateFrame(uint16_t X,
+                                 uint16_t Y,
+                                 uint16_t W,
+                                 uint16_t H,
+                                 uint8_t *buffer,
+                                 EinkBpp_e bpp,
+                                 EinkDisplayColorMode_e invertColors);
 
-/**
- * TODO: Fill The doxy when got info what does it do
- * @return
- */
-EinkStatus_e EinkDitherDisplay();
+    /**
+     * @brief This function sets the waveform to the \ref EinkWaveformINIT to make the display clearing more deep and
+     * sends the white background
+     * @param temperature [in] - current ambient temperature
+     * @return EinkOK
+     */
+    // EinkStatus_e EinkClearScreenDeep (int8_t temperature);
 
-/**
- * @brief This function sends the part of image from the given buffer to the internal memory of the display. It makes not screen to update.
- * @param X [in] - image start position X in pixels
- * @param Y [in] - image start position Y in pixels
- * @param W [in] - image width in pixels
- * @param H [in] - image height in pixels
- * @param buffer [in] -  pointer to image encoded according to \ref bpp set in initialization
- * @param bpp [in] - The format of the \ref buffer (number of the bits per pixel)
- * @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
- *
- * @return  EinkNoMem - Could not allocate the temporary buffer
- *          EinkOK - Part of image send successfully
- */
-EinkStatus_e
-EinkUpdateFrame (uint16_t X,
-                  uint16_t Y,
-                  uint16_t W,
-                  uint16_t H,
-                  uint8_t *buffer,
-                  EinkBpp_e bpp,
-                  EinkDisplayColorMode_e invertColors);
+    /**
+     * @brief This function just displays the color (black or white) on the entire display. Used to clear the display
+     * fast.
+     * @param colorFill [in] - color which is used to fill the display
+     * @return EinkOK
+     */
+    EinkStatus_e EinkFillScreenWithColor(EinkDisplayColorFilling_e colorFill);
 
-/**
- * @brief This function sets the waveform to the \ref EinkWaveformINIT to make the display clearing more deep and sends the white background
- * @param temperature [in] - current ambient temperature
- * @return EinkOK
- */
-//EinkStatus_e EinkClearScreenDeep (int8_t temperature);
+    /**
+     * @brief Refresh window on the screen. E-paper display tends to loose contrast over time. To Keep the image sharp
+     * refresh is needed.
+     * @param X refresh window position X in pixels
+     * @param Y refresh window position Y in pixels
+     * @param W refresh window width in pixels
+     * @param H refresh window height in pixels
+     * @param refreshTimingsMode [in] - EinkDisplayTimingsDeepCleanMode - if image is to be cleared precisely
+     *                                  EinkDisplayTimingsHighContrastMode - if image is displayed in the high contrast
+     * mode EinkDisplayTimingsFastRefreshMode - if image is to be displayed fast
+     *
+     * @return EinkOK
+     */
+    EinkStatus_e EinkRefreshImage(
+        uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode);
 
-/**
- * @brief This function just displays the color (black or white) on the entire display. Used to clear the display fast.
- * @param colorFill [in] - color which is used to fill the display
- * @return EinkOK
- */
-EinkStatus_e EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill);
+    /**
+     * @brief This function sends the proper waveform consisting from the LUTC and LUTD data,
+     *          based on the requested waveform (see \ref Mode) and the given temperature (see \ref temperature)
+     * @param Mode [in] - type of the waveform
+     * @param temperature [in] - current ambient temperature in Celsius degrees
+     * @param LUTCData [in] - Data
+     * @return
+     */
+    EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t *settings);
 
-/**
- * @brief Refresh window on the screen. E-paper display tends to loose contrast over time. To Keep the image sharp refresh is needed.
- * @param X refresh window position X in pixels
- * @param Y refresh window position Y in pixels
- * @param W refresh window width in pixels
- * @param H refresh window height in pixels
- * @param refreshTimingsMode [in] - EinkDisplayTimingsDeepCleanMode - if image is to be cleared precisely
- *                                  EinkDisplayTimingsHighContrastMode - if image is displayed in the high contrast mode
- *                                  EinkDisplayTimingsFastRefreshMode - if image is to be displayed fast
- *
- * @return EinkOK
- */
-EinkStatus_e
-EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode);
+    /**
+     * This function converts the ARGB image to the L4 format
+     * @param dataIn  [in]  - input image
+     * @param dataOut [out] - output image
+     * @param displayWidth    [in] - display width in pixels
+     * @param displayHeight   [in] - display height in pixels
+     */
+    void EinkARGBToLuminance(uint8_t *dataIn, uint8_t *dataOut, uint32_t displayWidth, uint32_t displayHeight);
 
-/**
- * @brief This function sends the proper waveform consisting from the LUTC and LUTD data,
- *          based on the requested waveform (see \ref Mode) and the given temperature (see \ref temperature)
- * @param Mode [in] - type of the waveform
- * @param temperature [in] - current ambient temperature in Celsius degrees
- * @param LUTCData [in] - Data
- * @return
- */
-EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t* settings);
-
-
-/**
-* This function converts the ARGB image to the L4 format
-* @param dataIn  [in]  - input image
-* @param dataOut [out] - output image
-* @param displayWidth    [in] - display width in pixels
-* @param displayHeight   [in] - display height in pixels
-*/
-void EinkARGBToLuminance( uint8_t *dataIn,
-                          uint8_t* dataOut,
-                          uint32_t displayWidth,
-                          uint32_t displayHeight);
-
-EinkStatus_e EinkMemcpyDmaInit( edma_callback memcpyCallback );
+    EinkStatus_e EinkMemcpyDmaInit(edma_callback memcpyCallback);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/linux/eink/fsl_edma.h b/module-bsp/board/linux/eink/fsl_edma.h
index 93afdaa57..4db34a4ca 100644
--- a/module-bsp/board/linux/eink/fsl_edma.h
+++ b/module-bsp/board/linux/eink/fsl_edma.h
@@ -10,29 +10,32 @@
 #define MODULE_BSP_BOARD_LINUX_FSL_DRIVERS_FSL_EDMA_H_
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-/*! @brief Callback for eDMA */
-struct _edma_handle;
+    /*! @brief Callback for eDMA */
+    struct _edma_handle;
 
-typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
+    typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
 
-/*! @brief eDMA transfer handle structure */
-typedef struct _edma_handle
-{
-    edma_callback callback; /*!< Callback function for major count exhausted. */
-    void *userData;         /*!< Callback function parameter. */
-//    DMA_Type *base;         /*!< eDMA peripheral base address. */
-//    edma_tcd_t *tcdPool;    /*!< Pointer to memory stored TCDs. */
-    uint8_t channel;        /*!< eDMA channel number. */
-    volatile int8_t header; /*!< The first TCD index. Should point to the next TCD to be loaded into the eDMA engine. */
-    volatile int8_t tail;   /*!< The last TCD index. Should point to the next TCD to be stored into the memory pool. */
-    volatile int8_t tcdUsed; /*!< The number of used TCD slots. Should reflect the number of TCDs can be used/loaded in
-                                the memory. */
-    volatile int8_t tcdSize; /*!< The total number of TCD slots in the queue. */
-    uint8_t flags;           /*!< The status of the current channel. */
-} edma_handle_t;
+    /*! @brief eDMA transfer handle structure */
+    typedef struct _edma_handle
+    {
+        edma_callback callback; /*!< Callback function for major count exhausted. */
+        void *userData;         /*!< Callback function parameter. */
+                                //    DMA_Type *base;         /*!< eDMA peripheral base address. */
+                                //    edma_tcd_t *tcdPool;    /*!< Pointer to memory stored TCDs. */
+        uint8_t channel;        /*!< eDMA channel number. */
+        volatile int8_t
+            header; /*!< The first TCD index. Should point to the next TCD to be loaded into the eDMA engine. */
+        volatile int8_t
+            tail; /*!< The last TCD index. Should point to the next TCD to be stored into the memory pool. */
+        volatile int8_t tcdUsed; /*!< The number of used TCD slots. Should reflect the number of TCDs can be used/loaded
+                                    in the memory. */
+        volatile int8_t tcdSize; /*!< The total number of TCD slots in the queue. */
+        uint8_t flags;           /*!< The status of the current channel. */
+    } edma_handle_t;
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/linux/harness/harness.cpp b/module-bsp/board/linux/harness/harness.cpp
index 209132adc..230845990 100644
--- a/module-bsp/board/linux/harness/harness.cpp
+++ b/module-bsp/board/linux/harness/harness.cpp
@@ -24,5 +24,4 @@ bool hwGpioRead(enum Pin el)
     return false;
 }
 void hwGpioWrite(enum Pin el, uint32_t state)
-{
-}
+{}
diff --git a/module-bsp/board/linux/keyboard/keyboard.cpp b/module-bsp/board/linux/keyboard/keyboard.cpp
index 7c29a2e71..b2364f83d 100644
--- a/module-bsp/board/linux/keyboard/keyboard.cpp
+++ b/module-bsp/board/linux/keyboard/keyboard.cpp
@@ -22,83 +22,75 @@
 
 #include "bsp/keyboard/keyboard.hpp"
 
-namespace bsp {
+namespace bsp
+{
 
-	static TaskHandle_t linux_keyboard_worker_handle = NULL;
+    static TaskHandle_t linux_keyboard_worker_handle = NULL;
 
-	static uint8_t kcode = 0;
-	static uint8_t kevent = 0;
+    static uint8_t kcode  = 0;
+    static uint8_t kevent = 0;
 
-	static int fd;
+    static int fd;
 
-	static void linux_keyboard_worker(void *pvp)
-	{
+    static void linux_keyboard_worker(void *pvp)
+    {
 
+        const char *myfifo = "/tmp/myfifo3";
 
-		const char * myfifo = "/tmp/myfifo3";
+        // Creating the named file(FIFO)
+        // mkfifo(<pathname>, <permission>)
+        mkfifo(myfifo, 0666);
 
-		// Creating the named file(FIFO)
-		// mkfifo(<pathname>, <permission>)
-		mkfifo(myfifo, 0666);
+        // Open FIFO for write only
+        fd = open(myfifo, O_RDONLY | O_NONBLOCK);
 
-		// Open FIFO for write only
-		fd = open(myfifo, O_RDONLY | O_NONBLOCK );
+        while (1) {
+            uint8_t buff[10];
+            int32_t readedBytes = read(fd, buff, 10);
 
-		while(1)
-		{
-			uint8_t buff [10];
-			int32_t readedBytes = read(fd, buff, 10);
+            if (readedBytes > 1) {
+                kevent = buff[0];
+                kcode  = buff[1];
 
-			if(readedBytes > 1)
-			{
-				kevent = buff[0];
-				kcode = buff[1];
+                xQueueHandle qhandle = reinterpret_cast<xQueueHandle>(pvp);
 
-				xQueueHandle qhandle = reinterpret_cast<xQueueHandle>(pvp);
-
-				uint8_t notification = 0;
-				if(kcode == static_cast<uint8_t>(bsp::KeyCodes::FnRight) )
-				{
-					if( kevent == static_cast<uint8_t>(bsp::KeyEvents::Pressed) )
-						notification = 0x02;
-					else
-						notification = 0x04;
-				}
-				else
-					notification = 0x01;
-				xQueueSend(qhandle, &notification, 100);
-			}
-			vTaskDelay(50);
-		}
-
-		close(fd);
-	}
-
-	void keyboard_get_data(const uint8_t& notification, uint8_t& event, uint8_t& code)
-	{
-		event = kevent;
-		code = kcode;
-	}
-
-	int32_t keyboard_Init(xQueueHandle qHandle){
-
-		if (xTaskCreate(linux_keyboard_worker, "keyboard", 512, qHandle, 0, &linux_keyboard_worker_handle) != pdPASS) {
-			return 1;
-		}
-		return 0;
-	}
-
-	int32_t keyboard_Deinit(void)
-	{
-		vTaskDelete(linux_keyboard_worker_handle);
-		close(fd);
-		return 0;
-	}
-
-}
+                uint8_t notification = 0;
+                if (kcode == static_cast<uint8_t>(bsp::KeyCodes::FnRight)) {
+                    if (kevent == static_cast<uint8_t>(bsp::KeyEvents::Pressed))
+                        notification = 0x02;
+                    else
+                        notification = 0x04;
+                }
+                else
+                    notification = 0x01;
+                xQueueSend(qhandle, &notification, 100);
+            }
+            vTaskDelay(50);
+        }
 
+        close(fd);
+    }
 
+    void keyboard_get_data(const uint8_t &notification, uint8_t &event, uint8_t &code)
+    {
+        event = kevent;
+        code  = kcode;
+    }
 
+    int32_t keyboard_Init(xQueueHandle qHandle)
+    {
 
+        if (xTaskCreate(linux_keyboard_worker, "keyboard", 512, qHandle, 0, &linux_keyboard_worker_handle) != pdPASS) {
+            return 1;
+        }
+        return 0;
+    }
 
+    int32_t keyboard_Deinit(void)
+    {
+        vTaskDelete(linux_keyboard_worker_handle);
+        close(fd);
+        return 0;
+    }
 
+} // namespace bsp
diff --git a/module-bsp/board/linux/lpm/LinuxLPM.cpp b/module-bsp/board/linux/lpm/LinuxLPM.cpp
index 188e719ec..6459cdfa7 100644
--- a/module-bsp/board/linux/lpm/LinuxLPM.cpp
+++ b/module-bsp/board/linux/lpm/LinuxLPM.cpp
@@ -4,17 +4,18 @@
 
 #include "LinuxLPM.h"
 
+namespace bsp
+{
 
-namespace bsp{
-
-
-    int32_t LinuxLPM::Switch(const bsp::LowPowerMode::Mode mode) {
+    int32_t LinuxLPM::Switch(const bsp::LowPowerMode::Mode mode)
+    {
         currentMode = mode;
         return 0;
     }
 
-    int32_t LinuxLPM::PowerOff() {
+    int32_t LinuxLPM::PowerOff()
+    {
         return 0;
     }
 
-}
\ No newline at end of file
+} // namespace bsp
\ No newline at end of file
diff --git a/module-bsp/board/linux/lpm/LinuxLPM.h b/module-bsp/board/linux/lpm/LinuxLPM.h
index 7a5a07eed..20376348e 100644
--- a/module-bsp/board/linux/lpm/LinuxLPM.h
+++ b/module-bsp/board/linux/lpm/LinuxLPM.h
@@ -7,17 +7,16 @@
 
 #include "bsp/lpm/bsp_lpm.hpp"
 
-namespace bsp{
+namespace bsp
+{
 
-    class LinuxLPM : public LowPowerMode {
-    public:
+    class LinuxLPM : public LowPowerMode
+    {
+      public:
         int32_t Switch(const Mode mode) override final;
         int32_t PowerOff() override final;
     };
 
-}
+} // namespace bsp
 
-
-
-
-#endif //PUREPHONE_LINUXLPM_H
+#endif // PUREPHONE_LINUXLPM_H
diff --git a/module-bsp/board/linux/rtc/rtc.cpp b/module-bsp/board/linux/rtc/rtc.cpp
index ce33f836d..117e5454f 100644
--- a/module-bsp/board/linux/rtc/rtc.cpp
+++ b/module-bsp/board/linux/rtc/rtc.cpp
@@ -8,189 +8,182 @@
 #include "bsp/rtc/rtc.hpp"
 #include <time.h>
 
-extern "C" {
-	#include "FreeRTOS.h"
-	#include "task.h"
-	#include "queue.h"
+extern "C"
+{
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
 }
 
-
 static time_t timestampOffset;
 static time_t timestampAlarm;
 time_t localOffset;
-static xQueueHandle qHandleRtcIrq = NULL;
+static xQueueHandle qHandleRtcIrq   = NULL;
 static TaskHandle_t rtcWorkerHandle = NULL;
 
 static void rtc_worker(void *pvp);
 
-namespace bsp{
+namespace bsp
+{
 
-	RtcBspError_e rtc_Init(xQueueHandle qHandle)
-	{
-		qHandleRtcIrq = qHandle;
-		timestampOffset = 0;
-		timestampAlarm = 0;
+    RtcBspError_e rtc_Init(xQueueHandle qHandle)
+    {
+        qHandleRtcIrq   = qHandle;
+        timestampOffset = 0;
+        timestampAlarm  = 0;
 
-		xTaskCreate(rtc_worker, "rtc_worker", 512, qHandle, 0, &rtcWorkerHandle);
-		return RtcBspOK;
-	}
+        xTaskCreate(rtc_worker, "rtc_worker", 512, qHandle, 0, &rtcWorkerHandle);
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetDateTimeFromTimestamp(time_t timestamp)
-	{
+    RtcBspError_e rtc_SetDateTimeFromTimestamp(time_t timestamp)
+    {
 
-		time_t current = time(NULL);
-		struct tm* local = localtime(&current);
+        time_t current   = time(NULL);
+        struct tm *local = localtime(&current);
 
-		localOffset = local->tm_gmtoff;
+        localOffset = local->tm_gmtoff;
 
-		timestampOffset = timestamp - current;
-		return RtcBspOK;
-	}
+        timestampOffset = timestamp - current;
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetDateTime(struct tm* tim)
-	{
+    RtcBspError_e rtc_SetDateTime(struct tm *tim)
+    {
 
-		time_t current = time(NULL);
-		time_t timestamp = mktime(tim);
+        time_t current   = time(NULL);
+        time_t timestamp = mktime(tim);
 
-		timestampOffset = timestamp - current;
-		return RtcBspOK;
-	}
+        timestampOffset = timestamp - current;
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetCurrentDateTime(struct tm* datetime)
-	{
-		time_t t = time(NULL);
-		t += timestampOffset;
-		*datetime = *gmtime(&t);
+    RtcBspError_e rtc_GetCurrentDateTime(struct tm *datetime)
+    {
+        time_t t = time(NULL);
+        t += timestampOffset;
+        *datetime = *gmtime(&t);
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetCurrentTimestamp(time_t* timestamp)
-	{
-		*timestamp = time(NULL) + timestampOffset;
+    RtcBspError_e rtc_GetCurrentTimestamp(time_t *timestamp)
+    {
+        *timestamp = time(NULL) + timestampOffset;
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmOnDate(struct tm* datetime)
-	{
-		if (datetime == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_SetAlarmOnDate(struct tm *datetime)
+    {
+        if (datetime == NULL) {
+            return RtcBspError;
+        }
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmOnTimestamp(uint32_t secs)
-	{
-		timestampAlarm = secs ;
-		return RtcBspOK;
-	}
+    RtcBspError_e rtc_SetAlarmOnTimestamp(uint32_t secs)
+    {
+        timestampAlarm = secs;
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmInSecondsFromNow(uint32_t secs)
-	{
-		time_t current;
-		if(	rtc_GetCurrentTimestamp(&current) != RtcBspOK )
-			return RtcBspError;
+    RtcBspError_e rtc_SetAlarmInSecondsFromNow(uint32_t secs)
+    {
+        time_t current;
+        if (rtc_GetCurrentTimestamp(&current) != RtcBspOK)
+            return RtcBspError;
 
-		current += secs ;
+        current += secs;
 
-		if(	rtc_SetAlarmOnTimestamp(current)!= RtcBspOK )
-			return RtcBspError;
+        if (rtc_SetAlarmOnTimestamp(current) != RtcBspOK)
+            return RtcBspError;
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetAlarmTimestamp(uint32_t* secs)
-	{
-		if (secs == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_GetAlarmTimestamp(uint32_t *secs)
+    {
+        if (secs == NULL) {
+            return RtcBspError;
+        }
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_EnableAlarmIrq()
-	{
-		uint32_t cnt = 100000;
+    RtcBspError_e rtc_EnableAlarmIrq()
+    {
+        uint32_t cnt = 100000;
 
-		if (cnt == 0)
-		{
-			return RtcBspError;
-		}
+        if (cnt == 0) {
+            return RtcBspError;
+        }
 
-		return RtcBspOK;
-	}
-	//TODO delete function if it will not be used in service
-	RtcBspError_e rtc_DisableAlarmIrq()
-	{
-		return RtcBspOK;
-	}
-	//TODO delete function if it will not be used in service
-	RtcBspError_e zrtc_MaskAlarmIrq()
-	{
-		return RtcBspOK;
-	}
-	//TODO delete function if it will not be used in service
-	RtcBspError_e rtc_UnmaskAlarmIrq()
-	{
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
+    // TODO delete function if it will not be used in service
+    RtcBspError_e rtc_DisableAlarmIrq()
+    {
+        return RtcBspOK;
+    }
+    // TODO delete function if it will not be used in service
+    RtcBspError_e zrtc_MaskAlarmIrq()
+    {
+        return RtcBspOK;
+    }
+    // TODO delete function if it will not be used in service
+    RtcBspError_e rtc_UnmaskAlarmIrq()
+    {
+        return RtcBspOK;
+    }
 
-	time_t rtc_GetSecondCounter()
-	{
-		time_t seconds = 0;
-		time_t tmp = 0;
-		do
-		{
+    time_t rtc_GetSecondCounter()
+    {
+        time_t seconds = 0;
+        time_t tmp     = 0;
+        do {
 
-		} while (tmp != seconds);
+        } while (tmp != seconds);
 
-		return seconds;
-	}
+        return seconds;
+    }
 
-	RtcBspError_e rtc_SetMinuteAlarm(time_t timestamp)
-	{
-		uint32_t secondsToMinute = 60 - ( timestamp % 60 );
+    RtcBspError_e rtc_SetMinuteAlarm(time_t timestamp)
+    {
+        uint32_t secondsToMinute = 60 - (timestamp % 60);
 
-		struct tm date;
-		rtc_GetCurrentDateTime(&date);
+        struct tm date;
+        rtc_GetCurrentDateTime(&date);
 
-		return rtc_SetAlarmInSecondsFromNow(secondsToMinute);
-	}
-}
+        return rtc_SetAlarmInSecondsFromNow(secondsToMinute);
+    }
+} // namespace bsp
 
 static void rtc_worker(void *pvp)
 {
-	while(1)
-	{
-		time_t current;
-		bsp::rtc_GetCurrentTimestamp(&current);
+    while (1) {
+        time_t current;
+        bsp::rtc_GetCurrentTimestamp(&current);
 
-		uint8_t notification;
-		if(current == timestampAlarm)
-		{
-			notification = static_cast<uint8_t>(bsp::rtcIrqNotifications::alarmOcured);
-			xQueueSend(qHandleRtcIrq, &notification, 100);
-		}
-		vTaskDelay(1000);
-	}
+        uint8_t notification;
+        if (current == timestampAlarm) {
+            notification = static_cast<uint8_t>(bsp::rtcIrqNotifications::alarmOcured);
+            xQueueSend(qHandleRtcIrq, &notification, 100);
+        }
+        vTaskDelay(1000);
+    }
 }
 
-//TODO delete function if it will not be used in service
+// TODO delete function if it will not be used in service
 void SNVS_HP_WRAPPER_IRQHandler()
-{
-
-}
+{}
 /*
  *  **********************************************************************************************************************
- *  *                                                                                                                    *
- *  *                                                                                                                    *
- *  *                             SNVS RTC DRIVER STATIC FUNCTIONS COPIED FOR OUR USE                                    *
- *  *                                                                                                                    *
- *  *                                                                                                                    *
+ *  * *
+ *  * *
+ *  *                             SNVS RTC DRIVER STATIC FUNCTIONS COPIED FOR OUR USE *
+ *  * *
+ *  * *
  *  **********************************************************************************************************************
  */
diff --git a/module-bsp/board/linux/usb_cdc/usb_cdc.cpp b/module-bsp/board/linux/usb_cdc/usb_cdc.cpp
index 0ea0d4d1e..0a10ac689 100644
--- a/module-bsp/board/linux/usb_cdc/usb_cdc.cpp
+++ b/module-bsp/board/linux/usb_cdc/usb_cdc.cpp
@@ -12,25 +12,20 @@ namespace bsp
         uint8_t inputData[SERIAL_BUFFER_LEN];
         static std::string receiveMsg;
 
-        while (1)
-        {
-            if (uxQueueSpacesAvailable(USBReceiveQueue) != 0)
-            {
+        while (1) {
+            if (uxQueueSpacesAvailable(USBReceiveQueue) != 0) {
                 ssize_t length = read(fd, &inputData[0], SERIAL_BUFFER_LEN);
-                if (length > 0)
-                {
+                if (length > 0) {
                     receiveMsg = std::string(inputData, inputData + length);
                     LOG_DEBUG("[ServiceDesktop:BSP_Driver] Received: %d signs", length);
                     xQueueSend(USBReceiveQueue, &receiveMsg, portMAX_DELAY);
                 }
-                else
-                {
+                else {
                     // yielding task because nothing in a buffer
                     vTaskDelay(10);
                 }
             }
-            else
-            {
+            else {
                 LOG_DEBUG("[ServiceDesktop:BSP_Driver] USB receive Queue is full, yielding task");
                 vTaskDelay(1000);
             }
@@ -42,13 +37,11 @@ namespace bsp
         ssize_t t = write(fd, (*sendMsg).c_str(), (*sendMsg).length());
         delete sendMsg;
 
-        if (t >= 0)
-        {
+        if (t >= 0) {
             LOG_DEBUG("[ServiceDesktop:BSP_Driver] Send: %d signs", t);
             return 0;
         }
-        else
-        {
+        else {
             LOG_ERROR("[ServiceDesktop:BSP_Driver] Writing to PTY failed with code: %d", errno);
             return -1;
         }
@@ -60,8 +53,7 @@ namespace bsp
         fd = 0;
         fd = open("/dev/ptmx", O_RDWR | O_NOCTTY);
 
-        if (fd == -1)
-        {
+        if (fd == -1) {
             return (-1);
         }
 
@@ -75,12 +67,12 @@ namespace bsp
         struct termios oldtio;
         tcgetattr(fd, &oldtio);
 
-        newtio = oldtio;
-        newtio.c_cflag = SERIAL_BAUDRATE | CS8 | CLOCAL | CREAD;
-        newtio.c_iflag = 0;
-        newtio.c_oflag = 0;
-        newtio.c_lflag = 0;
-        newtio.c_cc[VMIN] = 1;
+        newtio             = oldtio;
+        newtio.c_cflag     = SERIAL_BAUDRATE | CS8 | CLOCAL | CREAD;
+        newtio.c_iflag     = 0;
+        newtio.c_oflag     = 0;
+        newtio.c_lflag     = 0;
+        newtio.c_cc[VMIN]  = 1;
         newtio.c_cc[VTIME] = 0;
         tcflush(fd, TCIFLUSH);
 
@@ -91,10 +83,10 @@ namespace bsp
         xTaskHandle taskHandleReceive;
         USBReceiveQueue = receiveQueue;
 
-        BaseType_t task_error = xTaskCreate(usbCDCReceive, "USBLinuxReceive", SERIAL_BUFFER_LEN * 8, (void *)1, tskIDLE_PRIORITY, &taskHandleReceive);
+        BaseType_t task_error = xTaskCreate(
+            usbCDCReceive, "USBLinuxReceive", SERIAL_BUFFER_LEN * 8, (void *)1, tskIDLE_PRIORITY, &taskHandleReceive);
 
-        if (task_error != pdPASS)
-        {
+        if (task_error != pdPASS) {
             LOG_ERROR("[ServiceDesktop:BSP_Driver] Failed to start freertos USB_Linux_Receive");
         }
 
diff --git a/module-bsp/board/rt1051/bluetooth/BlueKitchen.cpp b/module-bsp/board/rt1051/bluetooth/BlueKitchen.cpp
index 52f36437e..2d9822ebf 100644
--- a/module-bsp/board/rt1051/bluetooth/BlueKitchen.cpp
+++ b/module-bsp/board/rt1051/bluetooth/BlueKitchen.cpp
@@ -7,45 +7,43 @@
 
 using namespace bsp;
 
-BlueKitchen::BlueKitchen(unsigned int in_size, unsigned int out_size) :BluetoothCommon(in_size,out_size)
+BlueKitchen::BlueKitchen(unsigned int in_size, unsigned int out_size) : BluetoothCommon(in_size, out_size)
 {
-    to_read=0;
-    read_buff = NULL;
-    read_ready_cb=NULL;
-    write_done_cb=NULL;
-    in.threshold = 128;
+    to_read       = 0;
+    read_buff     = NULL;
+    read_ready_cb = NULL;
+    write_done_cb = NULL;
+    in.threshold  = 128;
 }
 
 BlueKitchen::~BlueKitchen()
-{
-}
+{}
 
 BlueKitchen *BlueKitchen::getInstance()
 {
-    static BlueKitchen *k=NULL;
-    if(k==NULL) {
+    static BlueKitchen *k = NULL;
+    if (k == NULL) {
         /// outcomming & incomming heap allocated buffers sizes
         /// packet on IP network cna have MTU 1500, so big enough buffers were added to not throttle comms
-        k=new BlueKitchen(2048, 8000);
+        k = new BlueKitchen(2048, 8000);
     }
     return k;
 }
 
-
 // request... from circ buffer
 ssize_t BlueKitchen::read(void *buf, size_t nbytes)
 {
     set_rts(false);
-    to_read = nbytes;
+    to_read     = nbytes;
     to_read_req = nbytes;
-    read_buff = reinterpret_cast<char*>(buf);
+    read_buff   = reinterpret_cast<char *>(buf);
     // set bt ptr to 0, len to 0, to read to nbytes
     // bt->to_read
     BaseType_t taskwoken = 0;
-    uint8_t val = Bt::Message::EvtReceived;
-    if((to_read!=0) && (in.len >= to_read)) {
+    uint8_t val          = Bt::Message::EvtReceived;
+    if ((to_read != 0) && (in.len >= to_read)) {
         to_read = 0;
-        if(qHandle) {
+        if (qHandle) {
             xQueueSendFromISR(qHandle, &val, &taskwoken);
             portEND_SWITCHING_ISR(taskwoken);
         }
@@ -54,16 +52,18 @@ ssize_t BlueKitchen::read(void *buf, size_t nbytes)
     return 0;
 }
 
-void BlueKitchen::set_flowcontrol(int on) {
+void BlueKitchen::set_flowcontrol(int on)
+{
     // TODO
 }
 
 #include <sstream>
 
-ssize_t BlueKitchen::write_blocking(char *buf, ssize_t size) {
-    ssize_t i = 0;
+ssize_t BlueKitchen::write_blocking(char *buf, ssize_t size)
+{
+    ssize_t i            = 0;
     BaseType_t taskwoken = 0;
-    uint8_t val = Bt::Message::EvtSent;
+    uint8_t val          = Bt::Message::EvtSent;
 
 #ifdef DO_DEBUG_HCI_COMS
     std::stringstream ss;
@@ -75,7 +75,8 @@ ssize_t BlueKitchen::write_blocking(char *buf, ssize_t size) {
     if (BluetoothCommon::write_blocking(buf, size) == size) {
         xQueueSendFromISR(qHandle, &val, &taskwoken);
         portEND_SWITCHING_ISR(taskwoken);
-    } else {
+    }
+    else {
         val = Bt::Message::EvtSentError;
         xQueueSendFromISR(qHandle, &val, &taskwoken);
     }
@@ -83,34 +84,34 @@ ssize_t BlueKitchen::write_blocking(char *buf, ssize_t size) {
     return i;
 }
 
-extern "C" {
+extern "C"
+{
     void LPUART2_IRQHandler(void)
     {
-        uint32_t isrReg = LPUART_GetStatusFlags(BSP_BLUETOOTH_UART_BASE);
-        static char characterReceived  = 0;
-        BaseType_t taskwoken = 0;
-        uint8_t val = Bt::Message::EvtReceived;
-        bsp::BlueKitchen *bt = bsp::BlueKitchen::getInstance();
+        uint32_t isrReg               = LPUART_GetStatusFlags(BSP_BLUETOOTH_UART_BASE);
+        static char characterReceived = 0;
+        BaseType_t taskwoken          = 0;
+        uint8_t val                   = Bt::Message::EvtReceived;
+        bsp::BlueKitchen *bt          = bsp::BlueKitchen::getInstance();
 
-        if(isrReg & kLPUART_RxDataRegFullFlag)
-        {
+        if (isrReg & kLPUART_RxDataRegFullFlag) {
             characterReceived = LPUART_ReadByte(BSP_BLUETOOTH_UART_BASE);
-            if(bt->in.push(characterReceived)) {
+            if (bt->in.push(characterReceived)) {
                 val = Bt::Message::EvtRecUnwanted;
                 xQueueSendFromISR(bt->qHandle, &val, &taskwoken);
             }
-            if(bt->to_read !=0 && (bt->in.len >= bt->to_read)) {
+            if (bt->to_read != 0 && (bt->in.len >= bt->to_read)) {
                 bt->to_read = 0;
                 assert(bt->qHandle);
                 val = Bt::Message::EvtReceived;
                 xQueueSendFromISR(bt->qHandle, &val, &taskwoken);
                 portEND_SWITCHING_ISR(taskwoken);
             }
-            if(bt->in.threshold_guard()) {
+            if (bt->in.threshold_guard()) {
                 bt->set_rts(false);
             }
         }
-        if(isrReg & kLPUART_RxOverrunFlag) {
+        if (isrReg & kLPUART_RxOverrunFlag) {
             val = Bt::Message::EvtUartError;
             xQueueSendFromISR(bt->qHandle, &val, &taskwoken);
         }
diff --git a/module-bsp/board/rt1051/bluetooth/BluetoothCommon.cpp b/module-bsp/board/rt1051/bluetooth/BluetoothCommon.cpp
index a09ebb339..b95f62121 100644
--- a/module-bsp/board/rt1051/bluetooth/BluetoothCommon.cpp
+++ b/module-bsp/board/rt1051/bluetooth/BluetoothCommon.cpp
@@ -9,36 +9,42 @@ using namespace bsp;
 // TODO it's plain copy same as in cellular - this is kind of wrong
 uint32_t UartGetPeripheralClock();
 
-void BTdev::_circ::sem_take() {
-    if(!(SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)) {
-        xSemaphoreTake(sem,0);
-    } else {
+void BTdev::_circ::sem_take()
+{
+    if (!(SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)) {
+        xSemaphoreTake(sem, 0);
+    }
+    else {
         BaseType_t *px;
-        xSemaphoreTakeFromISR(sem,px);
+        xSemaphoreTakeFromISR(sem, px);
     }
 }
 
-void BTdev::_circ::sem_give() {
-    if(!(SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)) {
+void BTdev::_circ::sem_give()
+{
+    if (!(SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)) {
         xSemaphoreGive(sem);
-    } else {
+    }
+    else {
         BaseType_t *px;
         xSemaphoreGiveFromISR(sem, px);
     }
 }
 
-BTdev::_circ::_circ(unsigned int size, int threshold) : head(0), tail(0), threshold(threshold), size(size), len(0) {
+BTdev::_circ::_circ(unsigned int size, int threshold) : head(0), tail(0), threshold(threshold), size(size), len(0)
+{
     buff = new char[size];
-    sem = xSemaphoreCreateBinary();
+    sem  = xSemaphoreCreateBinary();
 }
 
-BTdev::_circ::~_circ() {
+BTdev::_circ::~_circ()
+{
     vSemaphoreDelete(sem);
     delete[] buff;
 }
 
-BluetoothCommon::BluetoothCommon(unsigned int in_size, unsigned int out_size, int threshold):
-    BTdev(in_size,out_size,threshold)
+BluetoothCommon::BluetoothCommon(unsigned int in_size, unsigned int out_size, int threshold)
+    : BTdev(in_size, out_size, threshold)
 {
     configure_uart_io();
     configure_lpuart();
@@ -47,8 +53,7 @@ BluetoothCommon::BluetoothCommon(unsigned int in_size, unsigned int out_size, in
 }
 
 BluetoothCommon::~BluetoothCommon()
-{
-}
+{}
 
 void BluetoothCommon::open()
 {
@@ -77,23 +82,24 @@ void BluetoothCommon::sleep_ms(ssize_t ms)
 BTdev::Error BluetoothCommon::flush()
 {
     // LOG_INFO("flush [%d] %s", out.len, out.tail<out.head?"reverse":"normal");
-    Error err = Success;
-    int len = out.len;
-    char* from = new char[out.len];
-    for (int i =0; i < len; ++i) {
-        out.pop(from+i);
+    Error err  = Success;
+    int len    = out.len;
+    char *from = new char[out.len];
+    for (int i = 0; i < len; ++i) {
+        out.pop(from + i);
     }
     int to_write = len;
-    char* fromp = from;
-    while(to_write) {
-        while(1) {
-            if(read_cts() == 0) {
+    char *fromp  = from;
+    while (to_write) {
+        while (1) {
+            if (read_cts() == 0) {
                 break;
-            } else {
+            }
+            else {
                 sleep_ms(1);
             }
         }
-        LPUART_WriteBlocking(BSP_BLUETOOTH_UART_BASE, reinterpret_cast<uint8_t*>(fromp), 1);
+        LPUART_WriteBlocking(BSP_BLUETOOTH_UART_BASE, reinterpret_cast<uint8_t *>(fromp), 1);
         --to_write;
         ++fromp;
     }
@@ -104,10 +110,10 @@ BTdev::Error BluetoothCommon::flush()
 ssize_t BluetoothCommon::write(char *buf, size_t nbytes)
 {
     // LOG_INFO( "write -> [%.*s]",nbytes, buf);
-    ssize_t i=0;
+    ssize_t i = 0;
     // if CTS set -> ignore return 0, can use threshold_guard here too
-    for (i=0; i<nbytes; ++i) {
-        if(out.push(*(buf+i)) != 0) {
+    for (i = 0; i < nbytes; ++i) {
+        if (out.push(*(buf + i)) != 0) {
             LOG_ERROR("Cant push!");
             break;
         }
@@ -118,11 +124,11 @@ ssize_t BluetoothCommon::write(char *buf, size_t nbytes)
 ssize_t BluetoothCommon::write_blocking(char *buf, ssize_t len)
 {
     int yet_to_write = len;
-    if(len > out.size) {
+    if (len > out.size) {
         LOG_WARN("WRITE: %d vs %d", len, out.size);
     }
     while (yet_to_write != 0) {
-        yet_to_write -= write(buf+len-yet_to_write, yet_to_write<out.size?yet_to_write:(out.size-1));
+        yet_to_write -= write(buf + len - yet_to_write, yet_to_write < out.size ? yet_to_write : (out.size - 1));
         flush();
     }
     return len;
@@ -130,10 +136,10 @@ ssize_t BluetoothCommon::write_blocking(char *buf, ssize_t len)
 
 BTdev::Error BluetoothCommon::set_baudrate(uint32_t bd)
 {
-    LOG_INFO( "Set baudrate: %d", bd);
+    LOG_INFO("Set baudrate: %d", bd);
     Error ret = Success;
-    int err=0;
-    if((err=LPUART_SetBaudRate(BSP_BLUETOOTH_UART_BASE, bd, UartGetPeripheralClock()))!=0) {
+    int err   = 0;
+    if ((err = LPUART_SetBaudRate(BSP_BLUETOOTH_UART_BASE, bd, UartGetPeripheralClock())) != 0) {
         LOG_ERROR("BT error: baudrate [%lu] set err: %d", bd, err);
         ret = ErrorBSP;
     }
@@ -143,14 +149,14 @@ BTdev::Error BluetoothCommon::set_baudrate(uint32_t bd)
 // set flow on -> true, set flow off -> false
 BTdev::Error BluetoothCommon::set_rts(bool on)
 {
-    GPIO_PinWrite(BSP_BLUETOOTH_UART_RTS_PORT, BSP_BLUETOOTH_UART_RTS_PIN, on?0U:1U);
+    GPIO_PinWrite(BSP_BLUETOOTH_UART_RTS_PORT, BSP_BLUETOOTH_UART_RTS_PIN, on ? 0U : 1U);
     return Success;
 }
 
 BTdev::Error BluetoothCommon::set_reset(bool on)
 {
-    LOG_INFO("reset %s", on?"on":"off");
-    GPIO_PinWrite(BSP_BLUETOOTH_SHUTDOWN_PORT, BSP_BLUETOOTH_SHUTDOWN_PIN, on?1U:0U);
+    LOG_INFO("reset %s", on ? "on" : "off");
+    GPIO_PinWrite(BSP_BLUETOOTH_SHUTDOWN_PORT, BSP_BLUETOOTH_SHUTDOWN_PIN, on ? 1U : 0U);
     return Success;
 }
 
@@ -162,14 +168,14 @@ int BluetoothCommon::read_cts()
 uint32_t UartGetPeripheralClock()
 {
     const int UART_PERIPHERAL_PLL_DIVIDER = 6;
-    uint32_t freq = 0;
+    uint32_t freq                         = 0;
     /* To make it simple, we assume default PLL and divider settings, and the only variable
        from application is use PLL3 source or OSC source */
     if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
     {
-        freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / UART_PERIPHERAL_PLL_DIVIDER) /
-            (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
-    } else {
+        freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / UART_PERIPHERAL_PLL_DIVIDER) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
+    }
+    else {
         freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
     }
 
@@ -179,34 +185,34 @@ uint32_t UartGetPeripheralClock()
 void BluetoothCommon::configure_uart_io()
 {
     gpio_pin_config_t gpio_init_structure;
-    gpio_init_structure.direction       = kGPIO_DigitalOutput;
-    gpio_init_structure.interruptMode   = kGPIO_IntRisingOrFallingEdge;
-    gpio_init_structure.outputLogic     = 1;
-    GPIO_PinInit(BSP_BLUETOOTH_UART_RTS_PORT,            BSP_BLUETOOTH_UART_RTS_PIN,          &gpio_init_structure);
-    gpio_init_structure.direction       = kGPIO_DigitalInput;
-    gpio_init_structure.interruptMode   = kGPIO_IntRisingOrFallingEdge;
-    gpio_init_structure.outputLogic     = 0;
-    GPIO_PinInit(BSP_BLUETOOTH_UART_CTS_PORT,            BSP_BLUETOOTH_UART_CTS_PIN,          &gpio_init_structure);
-    gpio_init_structure.direction       = kGPIO_DigitalOutput;
-    gpio_init_structure.interruptMode   = kGPIO_NoIntmode;
-    GPIO_PinInit(BSP_BLUETOOTH_OSC_EN_PORT, BSP_BLUETOOTH_OSC_EN_PIN ,&gpio_init_structure);
+    gpio_init_structure.direction     = kGPIO_DigitalOutput;
+    gpio_init_structure.interruptMode = kGPIO_IntRisingOrFallingEdge;
+    gpio_init_structure.outputLogic   = 1;
+    GPIO_PinInit(BSP_BLUETOOTH_UART_RTS_PORT, BSP_BLUETOOTH_UART_RTS_PIN, &gpio_init_structure);
+    gpio_init_structure.direction     = kGPIO_DigitalInput;
+    gpio_init_structure.interruptMode = kGPIO_IntRisingOrFallingEdge;
+    gpio_init_structure.outputLogic   = 0;
+    GPIO_PinInit(BSP_BLUETOOTH_UART_CTS_PORT, BSP_BLUETOOTH_UART_CTS_PIN, &gpio_init_structure);
+    gpio_init_structure.direction     = kGPIO_DigitalOutput;
+    gpio_init_structure.interruptMode = kGPIO_NoIntmode;
+    GPIO_PinInit(BSP_BLUETOOTH_OSC_EN_PORT, BSP_BLUETOOTH_OSC_EN_PIN, &gpio_init_structure);
     GPIO_PinWrite(BSP_BLUETOOTH_OSC_EN_PORT, BSP_BLUETOOTH_OSC_EN_PIN, 1U);
-    gpio_init_structure.direction       = kGPIO_DigitalOutput;
-    GPIO_PinInit(BSP_BLUETOOTH_SHUTDOWN_PORT, BSP_BLUETOOTH_SHUTDOWN_PIN ,&gpio_init_structure);
+    gpio_init_structure.direction = kGPIO_DigitalOutput;
+    GPIO_PinInit(BSP_BLUETOOTH_SHUTDOWN_PORT, BSP_BLUETOOTH_SHUTDOWN_PIN, &gpio_init_structure);
 }
 
 void BluetoothCommon::configure_lpuart()
 {
     lpuart_config_t bt_c;
     LPUART_GetDefaultConfig(&bt_c);
-    bt_c.baudRate_Bps   = baudrate;
-    bt_c.dataBitsCount  = kLPUART_EightDataBits;
-    bt_c.parityMode     = kLPUART_ParityDisabled;
-    bt_c.isMsb          = false;
-    bt_c.rxIdleType     = kLPUART_IdleTypeStartBit;
-    bt_c.rxIdleConfig   = kLPUART_IdleCharacter1;
-    bt_c.enableTx       = false;
-    bt_c.enableRx       = false;
+    bt_c.baudRate_Bps  = baudrate;
+    bt_c.dataBitsCount = kLPUART_EightDataBits;
+    bt_c.parityMode    = kLPUART_ParityDisabled;
+    bt_c.isMsb         = false;
+    bt_c.rxIdleType    = kLPUART_IdleTypeStartBit;
+    bt_c.rxIdleConfig  = kLPUART_IdleCharacter1;
+    bt_c.enableTx      = false;
+    bt_c.enableRx      = false;
 
     if (LPUART_Init(BSP_BLUETOOTH_UART_BASE, &bt_c, UartGetPeripheralClock()) != kStatus_Success) {
         LOG_ERROR("BT: UART config error Could not initialize the uart!");
@@ -232,16 +238,19 @@ void BluetoothCommon::configure_cts_irq()
 
 void BluetoothCommon::set_irq(bool enable)
 {
-    //printf("%s\n", __FUNCTION__);
+    // printf("%s\n", __FUNCTION__);
     LPUART_EnableRx(BSP_BLUETOOTH_UART_BASE, false);
     LPUART_EnableTx(BSP_BLUETOOTH_UART_BASE, false);
     LPUART_ClearStatusFlags(BSP_BLUETOOTH_UART_BASE, 0xFFFFFFFF);
-    if(enable) {
+    if (enable) {
         LPUART_EnableInterrupts(BSP_BLUETOOTH_UART_BASE, kLPUART_RxDataRegFullInterruptEnable);
-    } else {
+    }
+    else {
         LPUART_DisableInterrupts(BSP_BLUETOOTH_UART_BASE, kLPUART_RxDataRegFullInterruptEnable);
     }
-    //LPUART_EnableInterrupts(BSP_BLUETOOTH_UART_BASE, kLPUART_RxDataRegFullInterruptEnable|kLPUART_TxDataRegEmptyInterruptEnable|kLPUART_TransmissionCompleteInterruptEnable|kLPUART_RxOverrunInterruptEnable );
+    // LPUART_EnableInterrupts(BSP_BLUETOOTH_UART_BASE,
+    // kLPUART_RxDataRegFullInterruptEnable|kLPUART_TxDataRegEmptyInterruptEnable|kLPUART_TransmissionCompleteInterruptEnable|kLPUART_RxOverrunInterruptEnable
+    // );
     LPUART_EnableRx(BSP_BLUETOOTH_UART_BASE, true);
     LPUART_EnableTx(BSP_BLUETOOTH_UART_BASE, true);
 }
diff --git a/module-bsp/board/rt1051/bluetooth/Bluetopia.cpp b/module-bsp/board/rt1051/bluetooth/Bluetopia.cpp
index 5f0325857..464986e44 100644
--- a/module-bsp/board/rt1051/bluetooth/Bluetopia.cpp
+++ b/module-bsp/board/rt1051/bluetooth/Bluetopia.cpp
@@ -3,57 +3,55 @@
 #include "fsl_lpuart.h"
 #include "board.h"
 
-namespace bsp {
-
-Bluetopia::Bluetopia(unsigned int in_size, unsigned int out_size, int threshold)
-    : BluetoothCommon(default_buff_size,default_buff_size,32)
+namespace bsp
 {
-}
 
-Bluetopia::~Bluetopia()
-{
-}
+    Bluetopia::Bluetopia(unsigned int in_size, unsigned int out_size, int threshold)
+        : BluetoothCommon(default_buff_size, default_buff_size, 32)
+    {}
 
-Bluetopia *Bluetopia::getInstance()
-{
-    static Bluetopia *inst = NULL;
-    if(inst==NULL) {
-        inst = new Bluetopia();
-    }
-    return inst;
-}
+    Bluetopia::~Bluetopia()
+    {}
 
-
-ssize_t Bluetopia::read(void*, size_t nbytes)
-{
-    LOG_INFO("not implemented");
-    return 0;
-}
-
-
-extern "C" {
-    void LPUART2_IRQHandler(void)
+    Bluetopia *Bluetopia::getInstance()
     {
-        uint32_t isrReg = LPUART_GetStatusFlags(BSP_BLUETOOTH_UART_BASE);
-        static char characterReceived  = 0;
-
-        if(isrReg & kLPUART_RxDataRegFullFlag)
-        {
-            characterReceived = LPUART_ReadByte(BSP_BLUETOOTH_UART_BASE);
-            bsp::Bluetopia *bt = bsp::Bluetopia::getInstance();
-            if(bt->in.push(characterReceived) != 0) {
-                // LOG_ERROR("BT: error no RX space!");
-            } else {
-                bt->set_data();
-            }
-            if(bt->in.threshold_guard()) {
-                bt->set_rts(false);
-            }
+        static Bluetopia *inst = NULL;
+        if (inst == NULL) {
+            inst = new Bluetopia();
         }
-        // TODO ths should be handled - othervise uart might be `nicelly` blocked
-        if(isrReg & kLPUART_RxOverrunFlag) {
-            printf("Overrun\n");
-        }
-        LPUART_ClearStatusFlags(BSP_BLUETOOTH_UART_BASE, isrReg);
+        return inst;
     }
-};
+
+    ssize_t Bluetopia::read(void *, size_t nbytes)
+    {
+        LOG_INFO("not implemented");
+        return 0;
+    }
+
+    extern "C"
+    {
+        void LPUART2_IRQHandler(void)
+        {
+            uint32_t isrReg               = LPUART_GetStatusFlags(BSP_BLUETOOTH_UART_BASE);
+            static char characterReceived = 0;
+
+            if (isrReg & kLPUART_RxDataRegFullFlag) {
+                characterReceived  = LPUART_ReadByte(BSP_BLUETOOTH_UART_BASE);
+                bsp::Bluetopia *bt = bsp::Bluetopia::getInstance();
+                if (bt->in.push(characterReceived) != 0) {
+                    // LOG_ERROR("BT: error no RX space!");
+                }
+                else {
+                    bt->set_data();
+                }
+                if (bt->in.threshold_guard()) {
+                    bt->set_rts(false);
+                }
+            }
+            // TODO ths should be handled - othervise uart might be `nicelly` blocked
+            if (isrReg & kLPUART_RxOverrunFlag) {
+                printf("Overrun\n");
+            }
+            LPUART_ClearStatusFlags(BSP_BLUETOOTH_UART_BASE, isrReg);
+        }
+    };
diff --git a/module-bsp/board/rt1051/bsp/audio/Codec.hpp b/module-bsp/board/rt1051/bsp/audio/Codec.hpp
index c77249347..3cf3345a6 100644
--- a/module-bsp/board/rt1051/bsp/audio/Codec.hpp
+++ b/module-bsp/board/rt1051/bsp/audio/Codec.hpp
@@ -2,25 +2,24 @@
  *  @file Codec.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 30.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_CODEC_HPP
 #define PUREPHONE_CODEC_HPP
 
 #include <memory>
 #include <optional>
 
-class CodecParams{
-public:
-
+class CodecParams
+{
+  public:
 };
 
-enum class CodecRetCode{
+enum class CodecRetCode
+{
     Success,
     InvalidSampleRate,
     InvalidInputPath,
@@ -28,14 +27,15 @@ enum class CodecRetCode{
     InvalidArgument
 };
 
-class Codec {
-public:
+class Codec
+{
+  public:
+    virtual ~Codec()
+    {}
 
-    virtual ~Codec(){}
+    virtual std::optional<uint32_t> Probe() = 0;
 
-    virtual std::optional<uint32_t > Probe() = 0;
-
-    virtual CodecRetCode Start(const CodecParams& param) = 0;
+    virtual CodecRetCode Start(const CodecParams &param) = 0;
 
     virtual CodecRetCode Pause() = 0;
 
@@ -43,9 +43,7 @@ public:
 
     virtual CodecRetCode Stop() = 0;
 
-    virtual CodecRetCode Ioctrl(const CodecParams& param) =0;
-
+    virtual CodecRetCode Ioctrl(const CodecParams &param) = 0;
 };
 
-
-#endif //PUREPHONE_CODEC_HPP
+#endif // PUREPHONE_CODEC_HPP
diff --git a/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.cpp b/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.cpp
index dbb818310..b66aaa244 100644
--- a/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.cpp
+++ b/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.cpp
@@ -2,13 +2,11 @@
  *  @file MAX98090.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 30.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "CodecMAX98090.hpp"
 #include "max98090_regs.hpp"
 #include "bsp/BoardDefinitions.hpp"
@@ -16,73 +14,75 @@
 
 using namespace drivers;
 
-CodecMAX98090::CodecMAX98090() : i2cAddr{} {
+CodecMAX98090::CodecMAX98090() : i2cAddr{}
+{
 
-    i2cAddr.deviceAddress = MAX98090_I2C_ADDR;
+    i2cAddr.deviceAddress  = MAX98090_I2C_ADDR;
     i2cAddr.subAddressSize = 1; // MAX98090 uses 1byte addressing
-    i2c = DriverI2C::Create(static_cast<I2CInstances >(BoardDefinitions::AUDIOCODEC_I2C),
-                                             DriverI2CParams{.baudrate=static_cast<uint32_t >(BoardDefinitions::AUDIOCODEC_I2C_BAUDRATE)});
+    i2c                    = DriverI2C::Create(
+        static_cast<I2CInstances>(BoardDefinitions::AUDIOCODEC_I2C),
+        DriverI2CParams{.baudrate = static_cast<uint32_t>(BoardDefinitions::AUDIOCODEC_I2C_BAUDRATE)});
     Reset();
 }
 
-CodecMAX98090::~CodecMAX98090() {
+CodecMAX98090::~CodecMAX98090()
+{
     Reset();
 }
 
-CodecRetCode CodecMAX98090::Start(const CodecParams &param) {
+CodecRetCode CodecMAX98090::Start(const CodecParams &param)
+{
 
     const CodecParamsMAX98090 &params = static_cast<const CodecParamsMAX98090 &>(param);
 
     // Turn off device
-    i2cAddr.subAddress = MAX98090_REG_DEVICE_SHUTDOWN;
-    max98090_reg_shutdown_t dev_shutdown = {.shdn=0};
-    i2c->Write(i2cAddr, (uint8_t *) &dev_shutdown, 1);
-
+    i2cAddr.subAddress                   = MAX98090_REG_DEVICE_SHUTDOWN;
+    max98090_reg_shutdown_t dev_shutdown = {.shdn = 0};
+    i2c->Write(i2cAddr, (uint8_t *)&dev_shutdown, 1);
 
     max98090_reg_masterclock_quick_setup_t masterclock_setup = {0};
-    masterclock_setup.M12P288 = 1;
-    i2cAddr.subAddress = MAX98090_REG_MASTER_CLOCK_QUICK_SETUP;
-    i2c->Write(i2cAddr, (uint8_t *) &masterclock_setup, 1);
+    masterclock_setup.M12P288                                = 1;
+    i2cAddr.subAddress                                       = MAX98090_REG_MASTER_CLOCK_QUICK_SETUP;
+    i2c->Write(i2cAddr, (uint8_t *)&masterclock_setup, 1);
 
     max98090_reg_master_samplerate_quick_setup_t samplerate_setup = {0};
     switch (params.sampleRate) {
 
-        case CodecParamsMAX98090::SampleRate::Rate8KHz:
-            samplerate_setup.SR_8K = 1;
-            break;
+    case CodecParamsMAX98090::SampleRate::Rate8KHz:
+        samplerate_setup.SR_8K = 1;
+        break;
 
-        case CodecParamsMAX98090::SampleRate::Rate16KHz:
-            samplerate_setup.SR_16K = 1;
-            break;
+    case CodecParamsMAX98090::SampleRate::Rate16KHz:
+        samplerate_setup.SR_16K = 1;
+        break;
 
-        case CodecParamsMAX98090::SampleRate::Rate44K1Hz:
-            samplerate_setup.SR_44K1 = 1;
-            break;
+    case CodecParamsMAX98090::SampleRate::Rate44K1Hz:
+        samplerate_setup.SR_44K1 = 1;
+        break;
 
-        case CodecParamsMAX98090::SampleRate::Rate48KHz:
-            samplerate_setup.SR_48K = 1;
-            break;
+    case CodecParamsMAX98090::SampleRate::Rate48KHz:
+        samplerate_setup.SR_48K = 1;
+        break;
 
-        case CodecParamsMAX98090::SampleRate::Rate32KHz:
-            samplerate_setup.SR_32K = 1;
-            break;
+    case CodecParamsMAX98090::SampleRate::Rate32KHz:
+        samplerate_setup.SR_32K = 1;
+        break;
 
-        case CodecParamsMAX98090::SampleRate::Rate96KHz:
-            samplerate_setup.SR_96K = 1;
-            break;
-
-        default:
-            return CodecRetCode::InvalidSampleRate;
+    case CodecParamsMAX98090::SampleRate::Rate96KHz:
+        samplerate_setup.SR_96K = 1;
+        break;
 
+    default:
+        return CodecRetCode::InvalidSampleRate;
     }
     i2cAddr.subAddress = MAX98090_REG_MASTER_SAMPLE_RATE_QUICK_SETUP;
-    i2c->Write(i2cAddr, (uint8_t *) &samplerate_setup, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&samplerate_setup, 1);
 
     // Sets up DAI for I2S master mode operation.
     max98090_reg_dai_quick_setup_t q_dai_setup = {0};
-    q_dai_setup.i2sm = 1;
-    i2cAddr.subAddress = MAX98090_REG_DAI_QUICK_SETUP;
-    i2c->Write(i2cAddr, (uint8_t *) &q_dai_setup, 1);
+    q_dai_setup.i2sm                           = 1;
+    i2cAddr.subAddress                         = MAX98090_REG_DAI_QUICK_SETUP;
+    i2c->Write(i2cAddr, (uint8_t *)&q_dai_setup, 1);
 
     // OUT configuration
     if (params.outputPath != CodecParamsMAX98090::OutputPath::None) {
@@ -94,223 +94,206 @@ CodecRetCode CodecMAX98090::Start(const CodecParams &param) {
 
         switch (params.outputPath) {
 
-            case CodecParamsMAX98090::OutputPath::HeadphonesMono: {
+        case CodecParamsMAX98090::OutputPath::HeadphonesMono: {
 
-                // Mix left DAC channel to left&right HP output
-                max98090_reg_lhp_mixer_t lmixconf = {0};
-                max98090_reg_rhp_mixer_t rmixconf = {0};
-                lmixconf.mixhpl = 1;
-                rmixconf.mixhpr = 1;
+            // Mix left DAC channel to left&right HP output
+            max98090_reg_lhp_mixer_t lmixconf = {0};
+            max98090_reg_rhp_mixer_t rmixconf = {0};
+            lmixconf.mixhpl                   = 1;
+            rmixconf.mixhpr                   = 1;
 
-                i2cAddr.subAddress = MAX98090_REG_LHP_MIXER_CONF;
-                i2c->Write(i2cAddr, (uint8_t *) &lmixconf, 1);
-                i2cAddr.subAddress = MAX98090_REG_RHP_MIXER_CONF;
-                i2c->Write(i2cAddr, (uint8_t *) &rmixconf, 1);
+            i2cAddr.subAddress = MAX98090_REG_LHP_MIXER_CONF;
+            i2c->Write(i2cAddr, (uint8_t *)&lmixconf, 1);
+            i2cAddr.subAddress = MAX98090_REG_RHP_MIXER_CONF;
+            i2c->Write(i2cAddr, (uint8_t *)&rmixconf, 1);
 
-                q_playback_setup.dig2hp = 1;
-                i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
-                i2c->Write(i2cAddr, (uint8_t *) &q_playback_setup, 1);
+            q_playback_setup.dig2hp = 1;
+            i2cAddr.subAddress      = MAX98090_REG_PLAYBACK_QUICK_SETUP;
+            i2c->Write(i2cAddr, (uint8_t *)&q_playback_setup, 1);
 
-                max98090_reg_hpmix_conf_t mixconf = {0};
-                mixconf.mixhplsel = 1;
-                mixconf.mixhprsel = 1;
-                i2cAddr.subAddress = MAX98090_REG_HP_MIX_CONF;
-                i2c->Write(i2cAddr, (uint8_t *) &mixconf, 1);
+            max98090_reg_hpmix_conf_t mixconf = {0};
+            mixconf.mixhplsel                 = 1;
+            mixconf.mixhprsel                 = 1;
+            i2cAddr.subAddress                = MAX98090_REG_HP_MIX_CONF;
+            i2c->Write(i2cAddr, (uint8_t *)&mixconf, 1);
 
-            }
-                break;
+        } break;
 
-            case CodecParamsMAX98090::OutputPath::Headphones: {
-                // Set DAC headphones output to high performance mode, increasing power consumption but providing the highest quality
-                dacperf.dachp = 1;
-                dacperf.perfmode = 1;
-                q_playback_setup.dig2hp = 1;
+        case CodecParamsMAX98090::OutputPath::Headphones: {
+            // Set DAC headphones output to high performance mode, increasing power consumption but providing the
+            // highest quality
+            dacperf.dachp           = 1;
+            dacperf.perfmode        = 1;
+            q_playback_setup.dig2hp = 1;
 
-                i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
-                i2c->Write(i2cAddr, (uint8_t *) &q_playback_setup, 1);
-                i2cAddr.subAddress = MAX98090_REG_DACHP_PERF_MODE;
-                i2c->Write(i2cAddr, (uint8_t *) &dacperf, 1);
+            i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
+            i2c->Write(i2cAddr, (uint8_t *)&q_playback_setup, 1);
+            i2cAddr.subAddress = MAX98090_REG_DACHP_PERF_MODE;
+            i2c->Write(i2cAddr, (uint8_t *)&dacperf, 1);
 
-            }
-                break;
+        } break;
 
-            case CodecParamsMAX98090::OutputPath::Earspeaker: {
-                q_playback_setup.dig2ear = 1;
-                i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
-                i2c->Write(i2cAddr, (uint8_t *) &q_playback_setup, 1);
+        case CodecParamsMAX98090::OutputPath::Earspeaker: {
+            q_playback_setup.dig2ear = 1;
+            i2cAddr.subAddress       = MAX98090_REG_PLAYBACK_QUICK_SETUP;
+            i2c->Write(i2cAddr, (uint8_t *)&q_playback_setup, 1);
 
-                qfilter_coefficients_t band1_filter = {0};
-                qfilter_coefficients_t band2_filter = {0};
-                qfilter_coefficients_t band3_filter = {0};
+            qfilter_coefficients_t band1_filter = {0};
+            qfilter_coefficients_t band2_filter = {0};
+            qfilter_coefficients_t band3_filter = {0};
 
-                // Highpass,lowpass & flat filters don't use Gain parameter
-                qfilter_CalculateCoeffs(FilterHighPass, 800, currentParams.GetSampleRateVal(), 0.707, 1, &band1_filter);
-                qfilter_CalculateCoeffs(FilterLowPass, 6000, currentParams.GetSampleRateVal(), 0.707, 1, &band2_filter);
-                qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band3_filter);
+            // Highpass,lowpass & flat filters don't use Gain parameter
+            qfilter_CalculateCoeffs(FilterHighPass, 800, currentParams.GetSampleRateVal(), 0.707, 1, &band1_filter);
+            qfilter_CalculateCoeffs(FilterLowPass, 6000, currentParams.GetSampleRateVal(), 0.707, 1, &band2_filter);
+            qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band3_filter);
 
-                // BAND1
-                WriteFilterCoeff(band1_filter.b0, 0x46);
-                WriteFilterCoeff(band1_filter.b1, 0x49);
-                WriteFilterCoeff(band1_filter.b2, 0x4C);
-                WriteFilterCoeff(band1_filter.a1, 0x4F);
-                WriteFilterCoeff(band1_filter.a2, 0x52);
+            // BAND1
+            WriteFilterCoeff(band1_filter.b0, 0x46);
+            WriteFilterCoeff(band1_filter.b1, 0x49);
+            WriteFilterCoeff(band1_filter.b2, 0x4C);
+            WriteFilterCoeff(band1_filter.a1, 0x4F);
+            WriteFilterCoeff(band1_filter.a2, 0x52);
 
+            // BAND2
+            WriteFilterCoeff(band2_filter.b0, 0x55);
+            WriteFilterCoeff(band2_filter.b1, 0x58);
+            WriteFilterCoeff(band2_filter.b2, 0x5B);
+            WriteFilterCoeff(band2_filter.a1, 0x5E);
+            WriteFilterCoeff(band2_filter.a2, 0x61);
 
-                // BAND2
-                WriteFilterCoeff(band2_filter.b0, 0x55);
-                WriteFilterCoeff(band2_filter.b1, 0x58);
-                WriteFilterCoeff(band2_filter.b2, 0x5B);
-                WriteFilterCoeff(band2_filter.a1, 0x5E);
-                WriteFilterCoeff(band2_filter.a2, 0x61);
+            // BAND3
+            WriteFilterCoeff(band3_filter.b0, 0x64);
+            WriteFilterCoeff(band3_filter.b1, 0x67);
+            WriteFilterCoeff(band3_filter.b2, 0x6A);
+            WriteFilterCoeff(band3_filter.a1, 0x6D);
+            WriteFilterCoeff(band3_filter.a2, 0x70);
 
-                // BAND3
-                WriteFilterCoeff(band3_filter.b0, 0x64);
-                WriteFilterCoeff(band3_filter.b1, 0x67);
-                WriteFilterCoeff(band3_filter.b2, 0x6A);
-                WriteFilterCoeff(band3_filter.a1, 0x6D);
-                WriteFilterCoeff(band3_filter.a2, 0x70);
+            // Enable 3-band filter
+            max98090_reg_dsp_biquadfilter_enable_t filter = {0};
+            filter.eq3banden                              = 1;
+            i2cAddr.subAddress                            = MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE;
+            i2c->Write(i2cAddr, (uint8_t *)&filter, 1);
 
-                // Enable 3-band filter
-                max98090_reg_dsp_biquadfilter_enable_t filter = {0};
-                filter.eq3banden = 1;
-                i2cAddr.subAddress = MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE;
-                i2c->Write(i2cAddr, (uint8_t *) &filter, 1);
+        } break;
 
-            }
-                break;
+        case CodecParamsMAX98090::OutputPath::Loudspeaker: {
+            q_playback_setup.dig2spk = 1;
 
-            case CodecParamsMAX98090::OutputPath::Loudspeaker: {
-                q_playback_setup.dig2spk = 1;
+            uint8_t mask       = 0x08; // Set 3th bit (dmono on)
+            i2cAddr.subAddress = MAX98090_REG_INOUT_PATH_CONF;
+            i2c->Modify(i2cAddr, mask, true, 1);
 
-                uint8_t mask = 0x08; // Set 3th bit (dmono on)
-                i2cAddr.subAddress = MAX98090_REG_INOUT_PATH_CONF;
-                i2c->Modify(i2cAddr, mask, true,
-                            1);
+            // TODO: Turn off/mute right speaker
 
-                //TODO: Turn off/mute right speaker
+            i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
+            i2c->Write(i2cAddr, (uint8_t *)&q_playback_setup, 1);
 
-                i2cAddr.subAddress = MAX98090_REG_PLAYBACK_QUICK_SETUP;
-                i2c->Write(i2cAddr, (uint8_t *) &q_playback_setup, 1);
+            qfilter_coefficients_t band1_filter = {0};
+            qfilter_coefficients_t band2_filter = {0};
+            qfilter_coefficients_t band3_filter = {0};
 
-                qfilter_coefficients_t band1_filter = {0};
-                qfilter_coefficients_t band2_filter = {0};
-                qfilter_coefficients_t band3_filter = {0};
+            // Highpass,lowpass & flat filters don't use Gain parameter
+            qfilter_CalculateCoeffs(FilterHighPass, 500, currentParams.GetSampleRateVal(), 0.707, 1, &band1_filter);
+            qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band2_filter);
+            qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band3_filter);
 
-                // Highpass,lowpass & flat filters don't use Gain parameter
-                qfilter_CalculateCoeffs(FilterHighPass, 500, currentParams.GetSampleRateVal(), 0.707, 1, &band1_filter);
-                qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band2_filter);
-                qfilter_CalculateCoeffs(FilterFlat, 0, currentParams.GetSampleRateVal(), 0.707, 1, &band3_filter);
+            // BAND1
+            WriteFilterCoeff(band1_filter.b0, 0x46);
+            WriteFilterCoeff(band1_filter.b1, 0x49);
+            WriteFilterCoeff(band1_filter.b2, 0x4C);
+            WriteFilterCoeff(band1_filter.a1, 0x4F);
+            WriteFilterCoeff(band1_filter.a2, 0x52);
 
-                // BAND1
-                WriteFilterCoeff(band1_filter.b0, 0x46);
-                WriteFilterCoeff(band1_filter.b1, 0x49);
-                WriteFilterCoeff(band1_filter.b2, 0x4C);
-                WriteFilterCoeff(band1_filter.a1, 0x4F);
-                WriteFilterCoeff(band1_filter.a2, 0x52);
+            // BAND2
+            WriteFilterCoeff(band2_filter.b0, 0x55);
+            WriteFilterCoeff(band2_filter.b1, 0x58);
+            WriteFilterCoeff(band2_filter.b2, 0x5B);
+            WriteFilterCoeff(band2_filter.a1, 0x5E);
+            WriteFilterCoeff(band2_filter.a2, 0x61);
 
+            // BAND3
+            WriteFilterCoeff(band3_filter.b0, 0x64);
+            WriteFilterCoeff(band3_filter.b1, 0x67);
+            WriteFilterCoeff(band3_filter.b2, 0x6A);
+            WriteFilterCoeff(band3_filter.a1, 0x6D);
+            WriteFilterCoeff(band3_filter.a2, 0x70);
 
-                // BAND2
-                WriteFilterCoeff(band2_filter.b0, 0x55);
-                WriteFilterCoeff(band2_filter.b1, 0x58);
-                WriteFilterCoeff(band2_filter.b2, 0x5B);
-                WriteFilterCoeff(band2_filter.a1, 0x5E);
-                WriteFilterCoeff(band2_filter.a2, 0x61);
+            // Enable 3-band filter
+            max98090_reg_dsp_biquadfilter_enable_t filter = {0};
+            filter.eq3banden                              = 1;
+            i2cAddr.subAddress                            = MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE;
+            i2c->Write(i2cAddr, (uint8_t *)&filter, 1);
 
-                // BAND3
-                WriteFilterCoeff(band3_filter.b0, 0x64);
-                WriteFilterCoeff(band3_filter.b1, 0x67);
-                WriteFilterCoeff(band3_filter.b2, 0x6A);
-                WriteFilterCoeff(band3_filter.a1, 0x6D);
-                WriteFilterCoeff(band3_filter.a2, 0x70);
-
-                // Enable 3-band filter
-                max98090_reg_dsp_biquadfilter_enable_t filter = {0};
-                filter.eq3banden = 1;
-                i2cAddr.subAddress = MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE;
-                i2c->Write(i2cAddr, (uint8_t *) &filter, 1);
-
-
-            }
-                break;
-
-
-            default:
-                return CodecRetCode::InvalidOutputPath;
+        } break;
 
+        default:
+            return CodecRetCode::InvalidOutputPath;
         }
-
     }
 
-
-
     // IN configuration
     if (params.inputPath != CodecParamsMAX98090::InputPath::None) {
         // Set input path
         switch (params.inputPath) {
-            case CodecParamsMAX98090::InputPath::Headphones: {
-                /* 			max98090_reg_analog_to_record_quick_t q_analog_setup = {0};
+        case CodecParamsMAX98090::InputPath::Headphones: {
+            /* 			max98090_reg_analog_to_record_quick_t q_analog_setup = {0};
 
-                            q_analog_setup.in34mic2 = 1;
-                            bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK,(uint8_t*)&q_analog_setup,1);
+                        q_analog_setup.in34mic2 = 1;
+                        bsp_i2c_Send(i2CInst,DeviceAddr,
+               MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK,(uint8_t*)&q_analog_setup,1);
 
-                            max98090_reg_radc_mix_input_t radcmix = {0};
-                            bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_RADC_MIXER_INPUT,(uint8_t*)&radcmix);
+                        max98090_reg_radc_mix_input_t radcmix = {0};
+                        bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_RADC_MIXER_INPUT,(uint8_t*)&radcmix);
 
-                            max98090_reg_ladc_mix_input_t ladcmix = {0};
-                            ladcmix.mixadl = 0x40;
-                            bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_LADC_MIXER_INPUT,(uint8_t*)&ladcmix); */
-                max98090_reg_input_to_record_quick_t q_input_setup = {0};
-                q_input_setup.in34dan = 1;
-                i2cAddr.subAddress = MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK;
-                i2c->Write(i2cAddr, (uint8_t *) &q_input_setup, 1);
+                        max98090_reg_ladc_mix_input_t ladcmix = {0};
+                        ladcmix.mixadl = 0x40;
+                        bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_LADC_MIXER_INPUT,(uint8_t*)&ladcmix); */
+            max98090_reg_input_to_record_quick_t q_input_setup = {0};
+            q_input_setup.in34dan                              = 1;
+            i2cAddr.subAddress                                 = MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK;
+            i2c->Write(i2cAddr, (uint8_t *)&q_input_setup, 1);
 
+            uint8_t mask       = 0x10; // Set 4th bit (mic bias enable)
+            i2cAddr.subAddress = MAX98090_REG_INPUT_ENABLE;
+            i2c->Modify(i2cAddr, mask, true, 1);
 
-                uint8_t mask = 0x10; // Set 4th bit (mic bias enable)
-                i2cAddr.subAddress = MAX98090_REG_INPUT_ENABLE;
-                i2c->Modify(i2cAddr, mask, true, 1);
+        } break;
 
-            }
-                break;
+        case CodecParamsMAX98090::InputPath::Microphone: {
+            max98090_reg_input_to_record_quick_t q_input_setup   = {0};
+            max98090_reg_analog_to_record_quick_t q_analog_setup = {0};
+            max98090_reg_digmic_enable_t digena                  = {0};
 
-            case CodecParamsMAX98090::InputPath::Microphone: {
-                max98090_reg_input_to_record_quick_t q_input_setup = {0};
-                max98090_reg_analog_to_record_quick_t q_analog_setup = {0};
-                max98090_reg_digmic_enable_t digena = {0};
+            // Enable left and right digital mic interface
+            digena.digmicl = 1;
+            digena.digmicr = 1;
+            // Harman Kardon dig microphones specify valid clock range as 1.024MHz - 4.8MHz, typical ~2.4MHz
+            digena.dmicclk = 3; // fDMC = fPCLK/5 - > fPCLK=12.288MHz fDMC = 2.458MHz
 
-                // Enable left and right digital mic interface
-                digena.digmicl = 1;
-                digena.digmicr = 1;
-                // Harman Kardon dig microphones specify valid clock range as 1.024MHz - 4.8MHz, typical ~2.4MHz
-                digena.dmicclk = 3; // fDMC = fPCLK/5 - > fPCLK=12.288MHz fDMC = 2.458MHz
+            i2cAddr.subAddress = MAX98090_REG_DIG_MIC_ENABLE;
+            i2c->Write(i2cAddr, (uint8_t *)&digena, 1);
 
-                i2cAddr.subAddress = MAX98090_REG_DIG_MIC_ENABLE;
-                i2c->Write(i2cAddr, (uint8_t *) &digena, 1);
+            // It seems that for digital mics it doesn't matter if digitial or analog input is chosen
+            q_input_setup.in12sab = 1;
 
+            i2cAddr.subAddress = MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK;
+            i2c->Write(i2cAddr, (uint8_t *)&q_input_setup, 1);
 
-                // It seems that for digital mics it doesn't matter if digitial or analog input is chosen
-                q_input_setup.in12sab = 1;
+            // q_analog_setup.in12mic1 = 1;
+            // bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK,(uint8_t*)&q_analog_setup,1);
 
-                i2cAddr.subAddress = MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK;
-                i2c->Write(i2cAddr, (uint8_t *) &q_input_setup, 1);
+            uint8_t mask       = 0x10; // Clr 4th bit (mic bias disable)
+            i2cAddr.subAddress = MAX98090_REG_INPUT_ENABLE;
+            i2c->Modify(i2cAddr, mask, false, 1);
 
-                //q_analog_setup.in12mic1 = 1;
-                //bsp_i2c_Send(i2CInst,DeviceAddr, MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK,(uint8_t*)&q_analog_setup,1);
-
-
-                uint8_t mask = 0x10; // Clr 4th bit (mic bias disable)
-                i2cAddr.subAddress = MAX98090_REG_INPUT_ENABLE;
-                i2c->Modify(i2cAddr, mask, false, 1);
-
-            }
-                break;
-
-            default:
-                return CodecRetCode::InvalidInputPath;
+        } break;
 
+        default:
+            return CodecRetCode::InvalidInputPath;
         }
 
         // Turn on DC blocking filters
-        uint8_t mask = (1 << 6) | (1 << 5); // set 6th and 7th bit (AHPF and DHPF)
+        uint8_t mask       = (1 << 6) | (1 << 5); // set 6th and 7th bit (AHPF and DHPF)
         i2cAddr.subAddress = MAX98090_REG_PLAYBACK_DSP_FILTER_CONF;
         i2c->Modify(i2cAddr, mask, true, 1);
     }
@@ -327,148 +310,149 @@ CodecRetCode CodecMAX98090::Start(const CodecParams &param) {
     dev_shutdown.shdn = 1;
 
     i2cAddr.subAddress = MAX98090_REG_DEVICE_SHUTDOWN;
-    i2c->Write(i2cAddr, (uint8_t *) &dev_shutdown, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&dev_shutdown, 1);
 
     SetOutputVolume(currVol);
 
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::Pause() {
+CodecRetCode CodecMAX98090::Pause()
+{
     // Turn off device
-    max98090_reg_shutdown_t dev_shutdown = {.shdn=0};
-    i2cAddr.subAddress = MAX98090_REG_DEVICE_SHUTDOWN;
-    i2c->Write(i2cAddr, (uint8_t *) &dev_shutdown, 1);
+    max98090_reg_shutdown_t dev_shutdown = {.shdn = 0};
+    i2cAddr.subAddress                   = MAX98090_REG_DEVICE_SHUTDOWN;
+    i2c->Write(i2cAddr, (uint8_t *)&dev_shutdown, 1);
 
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::Resume() {
+CodecRetCode CodecMAX98090::Resume()
+{
     // Turn on device
-    max98090_reg_shutdown_t dev_shutdown = {.shdn=1};
-    i2cAddr.subAddress = MAX98090_REG_DEVICE_SHUTDOWN;
-    i2c->Write(i2cAddr, (uint8_t *) &dev_shutdown, 1);
+    max98090_reg_shutdown_t dev_shutdown = {.shdn = 1};
+    i2cAddr.subAddress                   = MAX98090_REG_DEVICE_SHUTDOWN;
+    i2c->Write(i2cAddr, (uint8_t *)&dev_shutdown, 1);
 
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::Stop() {
+CodecRetCode CodecMAX98090::Stop()
+{
     Reset();
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::Ioctrl(const CodecParams &param) {
+CodecRetCode CodecMAX98090::Ioctrl(const CodecParams &param)
+{
 
     const CodecParamsMAX98090 &params = static_cast<const CodecParamsMAX98090 &>(param);
 
     CodecRetCode ret = CodecRetCode::Success;
 
     switch (params.opCmd) {
-        case CodecParamsMAX98090::Cmd::SetOutVolume:
-            ret = SetOutputVolume(params.outVolume);
-            break;
+    case CodecParamsMAX98090::Cmd::SetOutVolume:
+        ret = SetOutputVolume(params.outVolume);
+        break;
 
-        case CodecParamsMAX98090::Cmd::SetInGain:
-            ret = SetInputGain(params.inGain);
-            break;
-        case CodecParamsMAX98090::Cmd::SetInput:
-            ret = SetInputPath(params.inputPath);
-            break;
-        case CodecParamsMAX98090::Cmd::SetOutput:
-            ret = SetOutputPath(params.outputPath);
-            break;
-        case CodecParamsMAX98090::Cmd::MicBiasCtrl:
-            ret = MicBias(params.micBiasEnable);
-            break;
-        case CodecParamsMAX98090::Cmd::Reset:
-            ret = Reset();
-            break;
-        case CodecParamsMAX98090::Cmd::SetMute:
-            ret = SetMute(params.muteEnable);
-            break;
-        default:
-            break;
+    case CodecParamsMAX98090::Cmd::SetInGain:
+        ret = SetInputGain(params.inGain);
+        break;
+    case CodecParamsMAX98090::Cmd::SetInput:
+        ret = SetInputPath(params.inputPath);
+        break;
+    case CodecParamsMAX98090::Cmd::SetOutput:
+        ret = SetOutputPath(params.outputPath);
+        break;
+    case CodecParamsMAX98090::Cmd::MicBiasCtrl:
+        ret = MicBias(params.micBiasEnable);
+        break;
+    case CodecParamsMAX98090::Cmd::Reset:
+        ret = Reset();
+        break;
+    case CodecParamsMAX98090::Cmd::SetMute:
+        ret = SetMute(params.muteEnable);
+        break;
+    default:
+        break;
     }
 
     return ret;
 }
 
-
-CodecRetCode CodecMAX98090::SetOutputVolume(const float vol) {
+CodecRetCode CodecMAX98090::SetOutputVolume(const float vol)
+{
     uint8_t mute = 0;
 
-
     // If volume set to 0 then mute output
     if (vol == 0) {
         mute = 1;
     }
 
     switch (currentParams.outputPath) {
-        case CodecParamsMAX98090::OutputPath::Headphones:
-        case CodecParamsMAX98090::OutputPath::HeadphonesMono: {
-            // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
-            float scale_factor = 0.31;
-            uint8_t volume = (float) (vol * 100 * scale_factor);
-            max98090_reg_lhp_vol_ctrl_t lvol = {0};
-            max98090_reg_rhp_vol_ctrl_t rvol = {0};
+    case CodecParamsMAX98090::OutputPath::Headphones:
+    case CodecParamsMAX98090::OutputPath::HeadphonesMono: {
+        // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
+        float scale_factor               = 0.31;
+        uint8_t volume                   = (float)(vol * 100 * scale_factor);
+        max98090_reg_lhp_vol_ctrl_t lvol = {0};
+        max98090_reg_rhp_vol_ctrl_t rvol = {0};
 
-            lvol.hplm = mute;
-            rvol.hprm = mute;
-            lvol.hpvoll = volume;
-            rvol.hpvolr = volume;
+        lvol.hplm   = mute;
+        rvol.hprm   = mute;
+        lvol.hpvoll = volume;
+        rvol.hpvolr = volume;
 
-            i2cAddr.subAddress = MAX98090_REG_LHP_VOL_CTRL;
-            i2c->Write(i2cAddr, (uint8_t *) &lvol, 1);
-            i2cAddr.subAddress = MAX98090_REG_RHP_VOL_CTRL;
-            i2c->Write(i2cAddr, (uint8_t *) &rvol, 1);
+        i2cAddr.subAddress = MAX98090_REG_LHP_VOL_CTRL;
+        i2c->Write(i2cAddr, (uint8_t *)&lvol, 1);
+        i2cAddr.subAddress = MAX98090_REG_RHP_VOL_CTRL;
+        i2c->Write(i2cAddr, (uint8_t *)&rvol, 1);
 
-        }
-            break;
+    } break;
 
-        case CodecParamsMAX98090::OutputPath::Earspeaker: {
-            // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
-            float scale_factor = 0.31;
-            uint8_t volume = (float) (vol * 100 * scale_factor);
-            max98090_reg_recv_vol_ctrl_t vol = {0};
+    case CodecParamsMAX98090::OutputPath::Earspeaker: {
+        // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
+        float scale_factor               = 0.31;
+        uint8_t volume                   = (float)(vol * 100 * scale_factor);
+        max98090_reg_recv_vol_ctrl_t vol = {0};
 
-            vol.rcvlm = mute;
-            vol.rcvlvol = volume;
+        vol.rcvlm   = mute;
+        vol.rcvlvol = volume;
 
-            i2cAddr.subAddress = MAX98090_REG_RECV_VOL_CTRL;
-            i2c->Write(i2cAddr, (uint8_t *) &vol, 1);
-        }
-            break;
+        i2cAddr.subAddress = MAX98090_REG_RECV_VOL_CTRL;
+        i2c->Write(i2cAddr, (uint8_t *)&vol, 1);
+    } break;
 
-        case CodecParamsMAX98090::OutputPath::Loudspeaker: {
-            // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
-            float scale_factor = 0.39;
-            uint8_t volume = (float) (vol * 100 * scale_factor) + 0x18;
+    case CodecParamsMAX98090::OutputPath::Loudspeaker: {
+        // Scale input volume(range 0 - 100) to MAX98090 range(decibels hardcoded as specific hex values)
+        float scale_factor = 0.39;
+        uint8_t volume     = (float)(vol * 100 * scale_factor) + 0x18;
 
-            max98090_reg_lspk_vol_ctrl_t lvol = {0};
-            max98090_reg_rspk_vol_ctrl_t rvol = {0};
+        max98090_reg_lspk_vol_ctrl_t lvol = {0};
+        max98090_reg_rspk_vol_ctrl_t rvol = {0};
 
-            lvol.splm = mute;
-            rvol.sprm = mute;
-            lvol.spvoll = volume;
-            rvol.spvolr = volume;
+        lvol.splm   = mute;
+        rvol.sprm   = mute;
+        lvol.spvoll = volume;
+        rvol.spvolr = volume;
 
-            i2cAddr.subAddress = MAX98090_REG_LSPK_VOL_CTRL;
-            i2c->Write(i2cAddr, (uint8_t *) &lvol, 1);
+        i2cAddr.subAddress = MAX98090_REG_LSPK_VOL_CTRL;
+        i2c->Write(i2cAddr, (uint8_t *)&lvol, 1);
 
-            i2cAddr.subAddress = MAX98090_REG_RSPK_VOL_CTRL;
-            i2c->Write(i2cAddr, (uint8_t *) &rvol, 1);
-        }
-            break;
+        i2cAddr.subAddress = MAX98090_REG_RSPK_VOL_CTRL;
+        i2c->Write(i2cAddr, (uint8_t *)&rvol, 1);
+    } break;
 
-        default:
-            return CodecRetCode::InvalidArgument;
+    default:
+        return CodecRetCode::InvalidArgument;
     }
 
     currentParams.outVolume = vol;
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::SetInputGain(const float gain) {
+CodecRetCode CodecMAX98090::SetInputGain(const float gain)
+{
     float gainToSet = gain;
 
     if (gain > 10) {
@@ -476,19 +460,19 @@ CodecRetCode CodecMAX98090::SetInputGain(const float gain) {
     }
 
     max98090_reg_lrec_dig_gain_t lgain = {0};
-    lgain.avl = 3; // fine gain - 0dB
-    lgain.avlg = gainToSet * 0.7; // coarse gain (0.7 used as scaling factor)
+    lgain.avl                          = 3;               // fine gain - 0dB
+    lgain.avlg                         = gainToSet * 0.7; // coarse gain (0.7 used as scaling factor)
 
     i2cAddr.subAddress = MAX98090_REG_LREC_DIG_GAIN;
-    i2c->Write(i2cAddr, (uint8_t *) &lgain, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&lgain, 1);
 
-    //coarse gain - 18dB, fine gain - 0dB
+    // coarse gain - 18dB, fine gain - 0dB
     max98090_reg_rrec_dig_gain_t rgain = {0};
-    rgain.avr = 3; // fine gain - 0dB
-    rgain.avrg = gainToSet * 0.7; // coarse gain (0.7 used as scaling factor)
+    rgain.avr                          = 3;               // fine gain - 0dB
+    rgain.avrg                         = gainToSet * 0.7; // coarse gain (0.7 used as scaling factor)
 
     i2cAddr.subAddress = MAX98090_REG_RREC_DIG_GAIN;
-    i2c->Write(i2cAddr, (uint8_t *) &rgain, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&rgain, 1);
 
     return CodecRetCode::Success;
 }
@@ -496,8 +480,9 @@ CodecRetCode CodecMAX98090::SetInputGain(const float gain) {
 // This two links are very helpful for calculating proper data format:
 // https://www.mathsisfun.com/binary-decimal-hexadecimal-converter.html
 // http://faculty.weber.edu/fonbrown/EE1000/Chapter%202.pdf
-CodecRetCode CodecMAX98090::WriteFilterCoeff(const float coeff, const uint8_t basereg) {
-    int32_t decimal = coeff * (float) (1 << 20); // multiply by 2^20
+CodecRetCode CodecMAX98090::WriteFilterCoeff(const float coeff, const uint8_t basereg)
+{
+    int32_t decimal = coeff * (float)(1 << 20); // multiply by 2^20
 
     volatile uint32_t fractional = decimal & 0xFFFFF;
     decimal >>= 20;
@@ -508,22 +493,23 @@ CodecRetCode CodecMAX98090::WriteFilterCoeff(const float coeff, const uint8_t ba
     uint8_t byte3 = fractional & 0xFF;
 
     i2cAddr.subAddress = basereg;
-    i2c->Write(i2cAddr, (uint8_t *) &byte1, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&byte1, 1);
     i2cAddr.subAddress = basereg + 1;
-    i2c->Write(i2cAddr, (uint8_t *) &byte2, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&byte2, 1);
     i2cAddr.subAddress = basereg + 2;
-    i2c->Write(i2cAddr, (uint8_t *) &byte3, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&byte3, 1);
 
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::MicBias(const bool enable) {
+CodecRetCode CodecMAX98090::MicBias(const bool enable)
+{
     max98090_reg_bias_mode_t biasmode = {0};
     // BIAS created by bandgap reference
     biasmode.biasmode = 1;
 
     i2cAddr.subAddress = MAX98090_REG_BIAS_CTRL;
-    i2c->Write(i2cAddr, (uint8_t *) &biasmode, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&biasmode, 1);
 
     // Turn on microphone bias(needed for jack detection and powering external analog headphones mic)
     uint8_t mask = 0x10; // Set 4th bit (mic bias enable/disable)
@@ -534,24 +520,26 @@ CodecRetCode CodecMAX98090::MicBias(const bool enable) {
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::Reset() {
+CodecRetCode CodecMAX98090::Reset()
+{
 
     // Turn off device
-    max98090_reg_shutdown_t dev_shutdown = {.shdn=0};
+    max98090_reg_shutdown_t dev_shutdown = {.shdn = 0};
 
     i2cAddr.subAddress = MAX98090_REG_DEVICE_SHUTDOWN;
-    i2c->Write(i2cAddr, (uint8_t *) &dev_shutdown, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&dev_shutdown, 1);
 
     // Set all registers to default state
     max98090_reg_swreset_t reset = {0};
-    reset.swreset = 1;
-    i2cAddr.subAddress = MAX98090_REG_SWRESET;
-    i2c->Write(i2cAddr, (uint8_t *) &reset, 1);
+    reset.swreset                = 1;
+    i2cAddr.subAddress           = MAX98090_REG_SWRESET;
+    i2c->Write(i2cAddr, (uint8_t *)&reset, 1);
 
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::SetOutputPath(const CodecParamsMAX98090::OutputPath path) {
+CodecRetCode CodecMAX98090::SetOutputPath(const CodecParamsMAX98090::OutputPath path)
+{
     Reset();
     currentParams.outputPath = path;
     Start(currentParams);
@@ -559,7 +547,8 @@ CodecRetCode CodecMAX98090::SetOutputPath(const CodecParamsMAX98090::OutputPath
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::SetInputPath(const CodecParamsMAX98090::InputPath path) {
+CodecRetCode CodecMAX98090::SetInputPath(const CodecParamsMAX98090::InputPath path)
+{
     Reset();
     currentParams.inputPath = path;
     Start(currentParams);
@@ -567,32 +556,30 @@ CodecRetCode CodecMAX98090::SetInputPath(const CodecParamsMAX98090::InputPath pa
     return CodecRetCode::Success;
 }
 
-CodecRetCode CodecMAX98090::SetMute(const bool enable) {
+CodecRetCode CodecMAX98090::SetMute(const bool enable)
+{
     // Set/clr 7th bit in register which controls mute/unmute
     uint8_t mask = 0x80;
     uint8_t regl, regr = 0;
 
     switch (currentParams.outputPath) {
-        case CodecParamsMAX98090::OutputPath::Headphones: {
-            regl = MAX98090_REG_LHP_VOL_CTRL;
-            regr = MAX98090_REG_RHP_VOL_CTRL;
-        }
-            break;
+    case CodecParamsMAX98090::OutputPath::Headphones: {
+        regl = MAX98090_REG_LHP_VOL_CTRL;
+        regr = MAX98090_REG_RHP_VOL_CTRL;
+    } break;
 
-        case CodecParamsMAX98090::OutputPath::Earspeaker: {
-            regl = MAX98090_REG_RECV_VOL_CTRL;
-            regr = 0;
-        }
-            break;
+    case CodecParamsMAX98090::OutputPath::Earspeaker: {
+        regl = MAX98090_REG_RECV_VOL_CTRL;
+        regr = 0;
+    } break;
 
-        case CodecParamsMAX98090::OutputPath::Loudspeaker: {
-            regl = MAX98090_REG_LSPK_VOL_CTRL;
-            regr = MAX98090_REG_RSPK_VOL_CTRL;
-        }
-            break;
+    case CodecParamsMAX98090::OutputPath::Loudspeaker: {
+        regl = MAX98090_REG_LSPK_VOL_CTRL;
+        regr = MAX98090_REG_RSPK_VOL_CTRL;
+    } break;
 
-        default:
-            return CodecRetCode::InvalidArgument;
+    default:
+        return CodecRetCode::InvalidArgument;
     }
 
     if (regl) {
@@ -606,10 +593,11 @@ CodecRetCode CodecMAX98090::SetMute(const bool enable) {
     return CodecRetCode::Success;
 }
 
-std::optional<uint32_t> CodecMAX98090::Probe() {
+std::optional<uint32_t> CodecMAX98090::Probe()
+{
     uint8_t id = 0;
 
     i2cAddr.subAddress = MAX98090_REG_REVID;
-    i2c->Write(i2cAddr, (uint8_t *) &id, 1);
+    i2c->Write(i2cAddr, (uint8_t *)&id, 1);
     return id;
 }
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.hpp b/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.hpp
index a79eb3372..e3ced747f 100644
--- a/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.hpp
+++ b/module-bsp/board/rt1051/bsp/audio/CodecMAX98090.hpp
@@ -2,22 +2,22 @@
  *  @file MAX98090.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 30.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_CODECMAX98090_HPP
 #define PUREPHONE_CODECMAX98090_HPP
 
 #include "Codec.hpp"
 #include "drivers/i2c/DriverI2C.hpp"
 
-class CodecParamsMAX98090 : public CodecParams {
-public:
-    enum class Cmd{
+class CodecParamsMAX98090 : public CodecParams
+{
+  public:
+    enum class Cmd
+    {
         SetOutVolume,
         SetInGain,
         SetMute,
@@ -28,7 +28,8 @@ public:
         None
     };
 
-    enum class SampleRate{
+    enum class SampleRate
+    {
         Rate8KHz   = 8000,
         Rate16KHz  = 16000,
         Rate44K1Hz = 44100,
@@ -38,7 +39,8 @@ public:
         Invalid
     };
 
-    enum class OutputPath{
+    enum class OutputPath
+    {
         Headphones,
         HeadphonesMono,
         Earspeaker,
@@ -46,69 +48,73 @@ public:
         None
     };
 
-    enum class InputPath{
+    enum class InputPath
+    {
         Headphones,
         Microphone,
         None
     };
 
-    enum class MonoStereo{
+    enum class MonoStereo
+    {
         Mono,
         Stereoq
     };
 
-    static SampleRate ValToSampleRate(uint32_t rate){
-        switch(rate){
-            case 8000:
-                return SampleRate ::Rate8KHz;
-            case 16000:
-                return SampleRate::Rate16KHz;
-            case 32000:
-                return SampleRate::Rate32KHz;
-            case 44100:
-                return SampleRate::Rate44K1Hz;
-            case 48000:
-                return SampleRate::Rate48KHz;
-            case 96000:
-                return SampleRate::Rate96KHz;
-            default:
-                return SampleRate ::Invalid;
+    static SampleRate ValToSampleRate(uint32_t rate)
+    {
+        switch (rate) {
+        case 8000:
+            return SampleRate ::Rate8KHz;
+        case 16000:
+            return SampleRate::Rate16KHz;
+        case 32000:
+            return SampleRate::Rate32KHz;
+        case 44100:
+            return SampleRate::Rate44K1Hz;
+        case 48000:
+            return SampleRate::Rate48KHz;
+        case 96000:
+            return SampleRate::Rate96KHz;
+        default:
+            return SampleRate ::Invalid;
         }
     }
 
-    uint32_t GetSampleRateVal(){
-        switch(sampleRate){
-            case SampleRate::Rate8KHz:
-                return 8000;
-            case SampleRate::Rate16KHz:
-                return 16000;
-            case SampleRate::Rate32KHz:
-                return 32000;
-            case SampleRate::Rate44K1Hz:
-                return 44100;
-            case SampleRate::Rate48KHz:
-                return 48000;
-            case SampleRate::Rate96KHz:
-                return 96000;
-            default:
-                return 0;
+    uint32_t GetSampleRateVal()
+    {
+        switch (sampleRate) {
+        case SampleRate::Rate8KHz:
+            return 8000;
+        case SampleRate::Rate16KHz:
+            return 16000;
+        case SampleRate::Rate32KHz:
+            return 32000;
+        case SampleRate::Rate44K1Hz:
+            return 44100;
+        case SampleRate::Rate48KHz:
+            return 48000;
+        case SampleRate::Rate96KHz:
+            return 96000;
+        default:
+            return 0;
         }
     }
 
-    Cmd opCmd = Cmd::None;
-    float outVolume = 0;
-    float inGain = 0;
-    bool muteEnable = false;
-    bool resetEnable = false;
-    bool micBiasEnable = false;
-    InputPath inputPath = InputPath ::None;
+    Cmd opCmd             = Cmd::None;
+    float outVolume       = 0;
+    float inGain          = 0;
+    bool muteEnable       = false;
+    bool resetEnable      = false;
+    bool micBiasEnable    = false;
+    InputPath inputPath   = InputPath ::None;
     OutputPath outputPath = OutputPath ::None;
     SampleRate sampleRate = SampleRate ::Rate44K1Hz;
 };
 
-class CodecMAX98090 : public Codec {
-public:
-
+class CodecMAX98090 : public Codec
+{
+  public:
     CodecMAX98090();
     ~CodecMAX98090();
 
@@ -124,25 +130,19 @@ public:
 
     CodecRetCode Ioctrl(const CodecParams &param) override final;
 
-private:
+  private:
     std::shared_ptr<drivers::DriverI2C> i2c;
     drivers::I2CAddress i2cAddr;
     CodecParamsMAX98090 currentParams;
 
-
     CodecRetCode SetOutputVolume(const float vol);
     CodecRetCode SetInputGain(const float gain);
     CodecRetCode SetMute(const bool enable);
     CodecRetCode SetInputPath(const CodecParamsMAX98090::InputPath path);
     CodecRetCode SetOutputPath(const CodecParamsMAX98090::OutputPath path);
     CodecRetCode MicBias(const bool enable);
-    CodecRetCode WriteFilterCoeff(const float coeff,const uint8_t basereg);
+    CodecRetCode WriteFilterCoeff(const float coeff, const uint8_t basereg);
     CodecRetCode Reset();
-
-
-
-
 };
 
-
-#endif //PUREPHONE_CODECMAX98090_HPP
+#endif // PUREPHONE_CODECMAX98090_HPP
diff --git a/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.cpp b/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.cpp
index daa87ccce..11db6a728 100644
--- a/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.cpp
+++ b/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.cpp
@@ -2,13 +2,11 @@
  *  @file rt1051_audiocodec.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051Audiocodec.hpp"
 #include "board.h"
 #include "dma_config.h"
@@ -16,54 +14,57 @@
 
 #include "bsp/BoardDefinitions.hpp"
 
-
-namespace bsp {
+namespace bsp
+{
 
     using namespace drivers;
 
-    sai_edma_handle_t RT1051Audiocodec::txHandle = {};
-    sai_edma_handle_t RT1051Audiocodec::rxHandle = {};
-    int16_t RT1051Audiocodec::inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2] = {};
+    sai_edma_handle_t RT1051Audiocodec::txHandle                           = {};
+    sai_edma_handle_t RT1051Audiocodec::rxHandle                           = {};
+    int16_t RT1051Audiocodec::inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2]  = {};
     int16_t RT1051Audiocodec::outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2] = {};
 
-    RT1051Audiocodec::RT1051Audiocodec(bsp::AudioDevice::audioCallback_t callback) : AudioDevice(callback),
-                                                                                     saiInFormat{}, saiOutFormat{},
-                                                                                     config{}, codecParams{}, codec{} {
+    RT1051Audiocodec::RT1051Audiocodec(bsp::AudioDevice::audioCallback_t callback)
+        : AudioDevice(callback), saiInFormat{}, saiOutFormat{}, config{}, codecParams{}, codec{}
+    {
         isInitialized = true;
-
     }
 
-    RT1051Audiocodec::~RT1051Audiocodec() {
+    RT1051Audiocodec::~RT1051Audiocodec()
+    {
         Stop();
         Deinit();
     }
 
-    int32_t RT1051Audiocodec::Start(const bsp::AudioDevice::Format &format) {
+    int32_t RT1051Audiocodec::Start(const bsp::AudioDevice::Format &format)
+    {
 
         Init();
 
-        saiInFormat.bitWidth = format.bitWidth;
+        saiInFormat.bitWidth      = format.bitWidth;
         saiInFormat.sampleRate_Hz = format.sampleRate_Hz;
 
-        saiOutFormat.bitWidth = format.bitWidth;
+        saiOutFormat.bitWidth      = format.bitWidth;
         saiOutFormat.sampleRate_Hz = format.sampleRate_Hz;
 
-
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputLeft)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputLeft)) {
             saiInFormat.stereo = kSAI_MonoLeft;
             InStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputRight)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputRight)) {
             saiInFormat.stereo = kSAI_MonoRight;
             InStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputStereo)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputStereo)) {
             saiInFormat.stereo = kSAI_Stereo;
             InStart();
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutputMono)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutputMono)) {
             saiOutFormat.stereo = kSAI_MonoLeft;
             OutStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutPutStereo)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutPutStereo)) {
             saiOutFormat.stereo = kSAI_Stereo;
             OutStart();
         }
@@ -73,10 +74,10 @@ namespace bsp {
             LOG_ERROR("Unsupported sample rate");
         }
 
-        codecParams.inputPath = static_cast<CodecParamsMAX98090::InputPath >(format.inputPath); // TODO:M.P fix me
-        codecParams.outputPath = static_cast<CodecParamsMAX98090::OutputPath >(format.outputPath); // TODO:M.P fix me
-        codecParams.outVolume = format.outputVolume;
-        codecParams.inGain = format.inputGain;
+        codecParams.inputPath  = static_cast<CodecParamsMAX98090::InputPath>(format.inputPath);   // TODO:M.P fix me
+        codecParams.outputPath = static_cast<CodecParamsMAX98090::OutputPath>(format.outputPath); // TODO:M.P fix me
+        codecParams.outVolume  = format.outputVolume;
+        codecParams.inGain     = format.inputGain;
         codec.Start(codecParams);
 
         // Store format passed
@@ -85,7 +86,8 @@ namespace bsp {
         return 0;
     }
 
-    int32_t RT1051Audiocodec::Stop() {
+    int32_t RT1051Audiocodec::Stop()
+    {
 
         codec.Stop();
 
@@ -101,49 +103,52 @@ namespace bsp {
             inWorkerThread = nullptr;
         }
 
-
         currentFormat = {};
         return 0;
-
     }
 
-    int32_t RT1051Audiocodec::OutputVolumeCtrl(float vol) {
+    int32_t RT1051Audiocodec::OutputVolumeCtrl(float vol)
+    {
         currentFormat.outputVolume = vol;
         CodecParamsMAX98090 params;
         params.outVolume = vol;
-        params.opCmd = CodecParamsMAX98090::Cmd::SetOutVolume;
+        params.opCmd     = CodecParamsMAX98090::Cmd::SetOutVolume;
         codec.Ioctrl(params);
         return 0;
     }
 
-    int32_t RT1051Audiocodec::InputGainCtrl(float gain) {
+    int32_t RT1051Audiocodec::InputGainCtrl(float gain)
+    {
         currentFormat.inputGain = gain;
         CodecParamsMAX98090 params;
         params.inGain = gain;
-        params.opCmd = CodecParamsMAX98090::Cmd::SetInGain;
+        params.opCmd  = CodecParamsMAX98090::Cmd::SetInGain;
         codec.Ioctrl(params);
         return 0;
     }
 
-    int32_t RT1051Audiocodec::InputPathCtrl(InputPath inputPath) {
+    int32_t RT1051Audiocodec::InputPathCtrl(InputPath inputPath)
+    {
         currentFormat.inputPath = inputPath;
         CodecParamsMAX98090 params;
         params.inputPath = static_cast<CodecParamsMAX98090::InputPath>(inputPath); // TODO: M.P fix me
-        params.opCmd = CodecParamsMAX98090::Cmd::SetInput;
+        params.opCmd     = CodecParamsMAX98090::Cmd::SetInput;
         codec.Ioctrl(params);
         return 0;
     }
 
-    int32_t RT1051Audiocodec::OutputPathCtrl(OutputPath outputPath) {
+    int32_t RT1051Audiocodec::OutputPathCtrl(OutputPath outputPath)
+    {
         currentFormat.outputPath = outputPath;
         CodecParamsMAX98090 params;
-        params.outputPath = static_cast<CodecParamsMAX98090::OutputPath >(outputPath); // TODO: M.P fix me
-        params.opCmd = CodecParamsMAX98090::Cmd::SetOutput;
+        params.outputPath = static_cast<CodecParamsMAX98090::OutputPath>(outputPath); // TODO: M.P fix me
+        params.opCmd      = CodecParamsMAX98090::Cmd::SetOutput;
         codec.Ioctrl(params);
         return 0;
     }
 
-    bool RT1051Audiocodec::IsFormatSupported(const bsp::AudioDevice::Format &format) {
+    bool RT1051Audiocodec::IsFormatSupported(const bsp::AudioDevice::Format &format)
+    {
 
         if (CodecParamsMAX98090::ValToSampleRate(format.sampleRate_Hz) == CodecParamsMAX98090::SampleRate::Invalid) {
             return false;
@@ -151,27 +156,25 @@ namespace bsp {
         return true;
     }
 
-
-
-
-
     // INTERNALS
 
+    void RT1051Audiocodec::Init()
+    {
 
-    void RT1051Audiocodec::Init() {
-
-        pllAudio = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions ::AUDIO_PLL),DriverPLLParams{});
-        dmamux = DriverDMAMux::Create(static_cast<DMAMuxInstances >(BoardDefinitions ::AUDIOCODEC_DMAMUX),DriverDMAMuxParams{});
-        dma = DriverDMA::Create(static_cast<DMAInstances >(BoardDefinitions ::AUDIOCODEC_DMA),DriverDMAParams{});
-
+        pllAudio = DriverPLL::Create(static_cast<PLLInstances>(BoardDefinitions ::AUDIO_PLL), DriverPLLParams{});
+        dmamux   = DriverDMAMux::Create(static_cast<DMAMuxInstances>(BoardDefinitions ::AUDIOCODEC_DMAMUX),
+                                      DriverDMAMuxParams{});
+        dma      = DriverDMA::Create(static_cast<DMAInstances>(BoardDefinitions ::AUDIOCODEC_DMA), DriverDMAParams{});
 
         // Enable MCLK clock
         IOMUXC_GPR->GPR1 |= BOARD_AUDIOCODEC_SAIx_MCLK_MASK;
 
-        txDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL));
-        rxDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL));
-        dmamux->Enable(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL),BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE); // TODO: M.P fix BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE
-        dmamux->Enable(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL),BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE); // TODO: M.P fix BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE
+        txDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL));
+        rxDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL));
+        dmamux->Enable(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL),
+                       BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE); // TODO: M.P fix BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE
+        dmamux->Enable(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL),
+                       BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE); // TODO: M.P fix BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE
 
         mclkSourceClockHz = GetPerphSourceClock(PerphClock_SAI2); // TODO:M.P fix PerphClock_SAI2
 
@@ -187,43 +190,49 @@ namespace bsp {
         SAI_RxInit(BOARD_AUDIOCODEC_SAIx, &config);
     }
 
-    void RT1051Audiocodec::Deinit() {
+    void RT1051Audiocodec::Deinit()
+    {
         memset(&config, 0, sizeof config);
         SAI_Deinit(BOARD_AUDIOCODEC_SAIx);
-        dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL));
-        dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL));
+        dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_TX_DMA_CHANNEL));
+        dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::AUDIOCODEC_RX_DMA_CHANNEL));
     }
 
-    void RT1051Audiocodec::InStart() {
+    void RT1051Audiocodec::InStart()
+    {
         sai_transfer_format_t sai_format = {0};
-        sai_transfer_t xfer = {0};
+        sai_transfer_t xfer              = {0};
 
-        saiInFormat.data = (uint8_t *) inBuffer;
+        saiInFormat.data     = (uint8_t *)inBuffer;
         saiInFormat.dataSize = CODEC_CHANNEL_PCM_BUFFER_SIZE * saiInFormat.bitWidth / 8;
 
         /* Configure the audio format */
-        sai_format.bitWidth = saiInFormat.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = saiInFormat.sampleRate_Hz;
-        sai_format.masterClockHz = mclkSourceClockHz;
+        sai_format.bitWidth           = saiInFormat.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = saiInFormat.sampleRate_Hz;
+        sai_format.masterClockHz      = mclkSourceClockHz;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = config.protocol;
-        sai_format.stereo = saiInFormat.stereo;
+        sai_format.protocol           = config.protocol;
+        sai_format.stereo             = saiInFormat.stereo;
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
-        SAI_TransferRxCreateHandleEDMA(BOARD_AUDIOCODEC_SAIx, &rxHandle, rxAudioCodecCallback, this, reinterpret_cast<edma_handle_t*>(rxDMAHandle->GetHandle()));
+        SAI_TransferRxCreateHandleEDMA(BOARD_AUDIOCODEC_SAIx,
+                                       &rxHandle,
+                                       rxAudioCodecCallback,
+                                       this,
+                                       reinterpret_cast<edma_handle_t *>(rxDMAHandle->GetHandle()));
 
-        SAI_TransferRxSetFormatEDMA(BOARD_AUDIOCODEC_SAIx, &rxHandle, &sai_format, mclkSourceClockHz,
-                                    mclkSourceClockHz);
+        SAI_TransferRxSetFormatEDMA(
+            BOARD_AUDIOCODEC_SAIx, &rxHandle, &sai_format, mclkSourceClockHz, mclkSourceClockHz);
 
         DisableIRQ(BOARD_AUDIOCODEC_SAIx_RX_IRQ);
 
         /* Reset SAI Rx internal logic */
         SAI_RxSoftwareReset(BOARD_AUDIOCODEC_SAIx, kSAI_ResetTypeSoftware);
 
-        xfer.data = saiInFormat.data;
+        xfer.data     = saiInFormat.data;
         xfer.dataSize = saiInFormat.dataSize;
         SAI_TransferReceiveEDMA(BOARD_AUDIOCODEC_SAIx, &rxHandle, &xfer);
 
@@ -232,35 +241,40 @@ namespace bsp {
         }
     }
 
-    void RT1051Audiocodec::OutStart() {
+    void RT1051Audiocodec::OutStart()
+    {
         sai_transfer_format_t sai_format = {0};
-        sai_transfer_t xfer = {0};
+        sai_transfer_t xfer              = {0};
 
-        saiOutFormat.data = (uint8_t *) outBuffer;
+        saiOutFormat.data     = (uint8_t *)outBuffer;
         saiOutFormat.dataSize = CODEC_CHANNEL_PCM_BUFFER_SIZE * saiInFormat.bitWidth / 8;
 
         /* Configure the audio format */
-        sai_format.bitWidth = saiOutFormat.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = saiOutFormat.sampleRate_Hz;
-        sai_format.masterClockHz = mclkSourceClockHz;
+        sai_format.bitWidth           = saiOutFormat.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = saiOutFormat.sampleRate_Hz;
+        sai_format.masterClockHz      = mclkSourceClockHz;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = config.protocol;
-        sai_format.stereo = saiOutFormat.stereo;
+        sai_format.protocol           = config.protocol;
+        sai_format.stereo             = saiOutFormat.stereo;
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
-        SAI_TransferTxCreateHandleEDMA(BOARD_AUDIOCODEC_SAIx, &txHandle, txAudioCodecCallback, this, reinterpret_cast<edma_handle_t*>(txDMAHandle->GetHandle()));
-        SAI_TransferTxSetFormatEDMA(BOARD_AUDIOCODEC_SAIx, &txHandle, &sai_format, mclkSourceClockHz,
-                                    mclkSourceClockHz);
+        SAI_TransferTxCreateHandleEDMA(BOARD_AUDIOCODEC_SAIx,
+                                       &txHandle,
+                                       txAudioCodecCallback,
+                                       this,
+                                       reinterpret_cast<edma_handle_t *>(txDMAHandle->GetHandle()));
+        SAI_TransferTxSetFormatEDMA(
+            BOARD_AUDIOCODEC_SAIx, &txHandle, &sai_format, mclkSourceClockHz, mclkSourceClockHz);
 
         DisableIRQ(BOARD_AUDIOCODEC_SAIx_TX_IRQ);
 
         /* Reset SAI Tx internal logic */
         SAI_TxSoftwareReset(BOARD_AUDIOCODEC_SAIx, kSAI_ResetTypeSoftware);
 
-        xfer.data = saiOutFormat.data;
+        xfer.data     = saiOutFormat.data;
         xfer.dataSize = saiOutFormat.dataSize;
         SAI_TransferSendEDMA(BOARD_AUDIOCODEC_SAIx, &txHandle, &xfer);
 
@@ -268,12 +282,12 @@ namespace bsp {
             LOG_ERROR("Error during creating  output audiocodec task");
         }
 
-        //Fill out buffer with data
-        GetAudioCallback()(nullptr, outBuffer,
-                           RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE * 2);
+        // Fill out buffer with data
+        GetAudioCallback()(nullptr, outBuffer, RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE * 2);
     }
 
-    void RT1051Audiocodec::OutStop() {
+    void RT1051Audiocodec::OutStop()
+    {
         SAI_TxDisableInterrupts(BOARD_AUDIOCODEC_SAIx, kSAI_FIFOErrorInterruptEnable);
         if (txHandle.dmaHandle) {
             SAI_TransferTerminateSendEDMA(BOARD_AUDIOCODEC_SAIx, &txHandle);
@@ -281,7 +295,8 @@ namespace bsp {
         memset(&txHandle, 0, sizeof(txHandle));
     }
 
-    void RT1051Audiocodec::InStop() {
+    void RT1051Audiocodec::InStop()
+    {
         SAI_RxDisableInterrupts(BOARD_AUDIOCODEC_SAIx, kSAI_FIFOErrorInterruptEnable);
         if (rxHandle.dmaHandle) {
             SAI_TransferAbortReceiveEDMA(BOARD_AUDIOCODEC_SAIx, &rxHandle);
@@ -289,167 +304,175 @@ namespace bsp {
         memset(&rxHandle, 0, sizeof(rxHandle));
     }
 
-
-    void inAudioCodecWorkerTask(void *pvp) {
+    void inAudioCodecWorkerTask(void *pvp)
+    {
         uint32_t ulNotificationValue = 0;
 
         RT1051Audiocodec *inst = reinterpret_cast<RT1051Audiocodec *>(pvp);
 
         while (1) {
-            xTaskNotifyWait(0x00,               /* Don't clear any bits on entry. */
-                            UINT32_MAX,          /* Clear all bits on exit. */
+            xTaskNotifyWait(0x00,                 /* Don't clear any bits on entry. */
+                            UINT32_MAX,           /* Clear all bits on exit. */
                             &ulNotificationValue, /* Receives the notification value. */
-                            portMAX_DELAY);    /* Block indefinitely. */
+                            portMAX_DELAY);       /* Block indefinitely. */
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(inst->inBuffer, nullptr,
-                                                              RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(inst->inBuffer, nullptr, RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->inBuffer[framesFetched], 0,
+                }
+                else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->inBuffer[framesFetched],
+                           0,
                            RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051Audiocodec::irq_state_t::IRQStateFullTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(
-                        &inst->inBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE], nullptr,
-                        RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051Audiocodec::irq_state_t::IRQStateFullTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(&inst->inBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE],
+                                             nullptr,
+                                             RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
 
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->inBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched], 0,
+                }
+                else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->inBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched],
+                           0,
                            RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
         }
 
-        cleanup:
+    cleanup:
         inst->codec.Stop();
         inst->InStop();
         inst->inWorkerThread = nullptr;
         vTaskDelete(NULL);
     }
 
-    void outAudioCodecWorkerTask(void *pvp) {
+    void outAudioCodecWorkerTask(void *pvp)
+    {
         uint32_t ulNotificationValue = 0;
 
         RT1051Audiocodec *inst = reinterpret_cast<RT1051Audiocodec *>(pvp);
 
         while (1) {
-            xTaskNotifyWait(0x00,               /* Don't clear any bits on entry. */
-                            UINT32_MAX,          /* Clear all bits on exit. */
+            xTaskNotifyWait(0x00,                 /* Don't clear any bits on entry. */
+                            UINT32_MAX,           /* Clear all bits on exit. */
                             &ulNotificationValue, /* Receives the notification value. */
-                            portMAX_DELAY);    /* Block indefinitely. */
+                            portMAX_DELAY);       /* Block indefinitely. */
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(nullptr, inst->outBuffer,
-                                                              RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(nullptr, inst->outBuffer, RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->outBuffer[framesFetched], 0,
+                }
+                else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->outBuffer[framesFetched],
+                           0,
                            RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051Audiocodec::irq_state_t::IRQStateFullTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(nullptr,
-                                                              &inst->outBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE],
-                                                              RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051Audiocodec::irq_state_t::IRQStateFullTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(nullptr,
+                                             &inst->outBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE],
+                                             RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE);
 
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->outBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched], 0,
+                }
+                else if (framesFetched < RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->outBuffer[RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched],
+                           0,
                            RT1051Audiocodec::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
         }
 
-        cleanup:
+    cleanup:
         inst->codec.Stop();
         inst->OutStop();
         inst->outWorkerThread = nullptr;
         vTaskDelete(NULL);
     }
 
-    void rxAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData) {
+    void rxAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
         static RT1051Audiocodec::irq_state_t state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
-        RT1051Audiocodec *inst = (RT1051Audiocodec *) userData;
-        sai_transfer_t xfer = {0};
-        BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+        RT1051Audiocodec *inst                     = (RT1051Audiocodec *)userData;
+        sai_transfer_t xfer                        = {0};
+        BaseType_t xHigherPriorityTaskWoken        = pdFALSE;
 
         if (state == RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer) {
 
             xfer.dataSize = inst->saiInFormat.dataSize;
-            xfer.data = inst->saiInFormat.data + (inst->saiInFormat.dataSize);
+            xfer.data     = inst->saiInFormat.data + (inst->saiInFormat.dataSize);
             SAI_TransferReceiveEDMA(BOARD_AUDIOCODEC_SAIx, &inst->rxHandle, &xfer);
 
             /* Notify the task that the transmission is complete. */
             if (inst->inWorkerThread) {
-                xTaskNotifyFromISR(inst->inWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
+                xTaskNotifyFromISR(
+                    inst->inWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
             }
             state = RT1051Audiocodec::irq_state_t::IRQStateFullTransfer;
-
-        } else {
-
-            xfer.dataSize = inst->saiInFormat.dataSize;
-            xfer.data = inst->saiInFormat.data;
-            SAI_TransferReceiveEDMA(BOARD_AUDIOCODEC_SAIx, &inst->rxHandle, &xfer);
-
-            /* Notify the task that the transmission is complete. */
-            if (inst->inWorkerThread) {
-                xTaskNotifyFromISR(inst->inWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
-            }
-            state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
-
-
         }
+        else {
 
-
-        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
-    }
-
-    void txAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData) {
-        static RT1051Audiocodec::irq_state_t state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
-        RT1051Audiocodec *inst = (RT1051Audiocodec *) userData;
-        sai_transfer_t xfer = {0};
-        BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-
-        if (state == RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer) {
-
-            xfer.dataSize = inst->saiOutFormat.dataSize;
-            xfer.data = inst->saiOutFormat.data + (inst->saiOutFormat.dataSize);
-            SAI_TransferSendEDMA(BOARD_AUDIOCODEC_SAIx, &inst->txHandle, &xfer);
+            xfer.dataSize = inst->saiInFormat.dataSize;
+            xfer.data     = inst->saiInFormat.data;
+            SAI_TransferReceiveEDMA(BOARD_AUDIOCODEC_SAIx, &inst->rxHandle, &xfer);
 
             /* Notify the task that the transmission is complete. */
-            if (inst->outWorkerThread) {
-                xTaskNotifyFromISR(inst->outWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
-            }
-            state = RT1051Audiocodec::irq_state_t::IRQStateFullTransfer;
-
-
-        } else {
-            xfer.dataSize = inst->saiOutFormat.dataSize;
-            xfer.data = inst->saiOutFormat.data;
-            SAI_TransferSendEDMA(BOARD_AUDIOCODEC_SAIx, &inst->txHandle, &xfer);
-
-            /* Notify the task that the transmission is complete. */
-            if (inst->outWorkerThread) {
-                xTaskNotifyFromISR(inst->outWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
+            if (inst->inWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->inWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
             }
             state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
-
         }
 
         portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
     }
 
-}
\ No newline at end of file
+    void txAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
+        static RT1051Audiocodec::irq_state_t state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
+        RT1051Audiocodec *inst                     = (RT1051Audiocodec *)userData;
+        sai_transfer_t xfer                        = {0};
+        BaseType_t xHigherPriorityTaskWoken        = pdFALSE;
+
+        if (state == RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer) {
+
+            xfer.dataSize = inst->saiOutFormat.dataSize;
+            xfer.data     = inst->saiOutFormat.data + (inst->saiOutFormat.dataSize);
+            SAI_TransferSendEDMA(BOARD_AUDIOCODEC_SAIx, &inst->txHandle, &xfer);
+
+            /* Notify the task that the transmission is complete. */
+            if (inst->outWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->outWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
+            }
+            state = RT1051Audiocodec::irq_state_t::IRQStateFullTransfer;
+        }
+        else {
+            xfer.dataSize = inst->saiOutFormat.dataSize;
+            xfer.data     = inst->saiOutFormat.data;
+            SAI_TransferSendEDMA(BOARD_AUDIOCODEC_SAIx, &inst->txHandle, &xfer);
+
+            /* Notify the task that the transmission is complete. */
+            if (inst->outWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->outWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
+            }
+            state = RT1051Audiocodec::irq_state_t::IRQStateHalfTransfer;
+        }
+
+        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    }
+
+} // namespace bsp
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.hpp b/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.hpp
index fb153e72b..6b3dc3dc9 100644
--- a/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.hpp
+++ b/module-bsp/board/rt1051/bsp/audio/RT1051Audiocodec.hpp
@@ -2,17 +2,14 @@
  *  @file rt1051_audiocodec.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051AUDIOCODEC_HPP
 #define PUREPHONE_RT1051AUDIOCODEC_HPP
 
-
 #include "bsp/audio/bsp_audio.hpp"
 #include "fsl_sai_edma.h"
 #include "FreeRTOS.h"
@@ -25,58 +22,58 @@
 #include "drivers/dmamux/DriverDMAMux.hpp"
 #include "drivers/dma/DriverDMA.hpp"
 
-namespace bsp{
-
+namespace bsp
+{
 
     void txAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
     void rxAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
-    void inAudioCodecWorkerTask(void* pvp);
-    void outAudioCodecWorkerTask(void* pvp);
+    void inAudioCodecWorkerTask(void *pvp);
+    void outAudioCodecWorkerTask(void *pvp);
 
-    class RT1051Audiocodec : public AudioDevice{
-
-    public:
+    class RT1051Audiocodec : public AudioDevice
+    {
 
+      public:
         friend void txAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
         friend void rxAudioCodecCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
-        friend void inAudioCodecWorkerTask(void* pvp);
-        friend void outAudioCodecWorkerTask(void* pvp);
+        friend void inAudioCodecWorkerTask(void *pvp);
+        friend void outAudioCodecWorkerTask(void *pvp);
 
         RT1051Audiocodec(AudioDevice::audioCallback_t callback);
         virtual ~RT1051Audiocodec();
 
-        int32_t Start(const Format& format) override final;
+        int32_t Start(const Format &format) override final;
         int32_t Stop() override final;
         int32_t OutputVolumeCtrl(float vol) override final;
         int32_t InputGainCtrl(float gain) override final;
         int32_t OutputPathCtrl(OutputPath outputPath) override final;
         int32_t InputPathCtrl(InputPath inputPath) override final;
-        bool IsFormatSupported(const Format& format) override final;
+        bool IsFormatSupported(const Format &format) override final;
 
-    private:
-
-        static const uint32_t CODEC_CHANNEL_PCM_BUFFER_SIZE=1024;
+      private:
+        static const uint32_t CODEC_CHANNEL_PCM_BUFFER_SIZE = 1024;
 
         /*! @brief Internals state of Rx/Tx callback, needed for double buffering technique */
         enum class irq_state_t
         {
-            IRQStateHalfTransfer=1<<0,
-            IRQStateFullTransfer=1<<1
+            IRQStateHalfTransfer = 1 << 0,
+            IRQStateFullTransfer = 1 << 1
         };
 
-        struct SAIFormat{
+        struct SAIFormat
+        {
             uint32_t sampleRate_Hz;   /*!< Sample rate of audio data */
             uint32_t bitWidth;        /*!< Data length of audio data, usually 8/16/24/32 bits */
             sai_mono_stereo_t stereo; /*!< Mono or stereo */
-            uint8_t *data;   /*!< Data start address to transfer. */
-            size_t dataSize; /*!< Transfer size. */
+            uint8_t *data;            /*!< Data start address to transfer. */
+            size_t dataSize;          /*!< Transfer size. */
         };
 
         SAIFormat saiInFormat;
         SAIFormat saiOutFormat;
         uint32_t mclkSourceClockHz = 0;
         sai_config_t config;
-        TaskHandle_t inWorkerThread = nullptr;
+        TaskHandle_t inWorkerThread  = nullptr;
         TaskHandle_t outWorkerThread = nullptr;
         CodecParamsMAX98090 codecParams;
         CodecMAX98090 codec;
@@ -88,16 +85,14 @@ namespace bsp{
         std::unique_ptr<drivers::DriverDMAHandle> rxDMAHandle;
         std::unique_ptr<drivers::DriverDMAHandle> txDMAHandle;
 
-
-
         static AT_NONCACHEABLE_SECTION_INIT(sai_edma_handle_t txHandle);
         static AT_NONCACHEABLE_SECTION_INIT(sai_edma_handle_t rxHandle);
 
         // CODEC_CHANNEL_PCM_BUFFER_SIZE * 2 for double buffering
-        static ALIGN_(4) int16_t inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE*2];
+        static ALIGN_(4) int16_t inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2];
 
         // CODEC_CHANNEL_PCM_BUFFER_SIZE * 2 for double buffering
-        static ALIGN_(4) int16_t outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE*2];
+        static ALIGN_(4) int16_t outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2];
 
         void Init();
         void Deinit();
@@ -105,10 +100,7 @@ namespace bsp{
         void InStart();
         void OutStop();
         void InStop();
-
-
     };
-}
+} // namespace bsp
 
-
-#endif //PUREPHONE_RT1051AUDIOCODEC_HPP
+#endif // PUREPHONE_RT1051AUDIOCODEC_HPP
diff --git a/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.cpp b/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.cpp
index 77e3ee1a4..04a0a1905 100644
--- a/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.cpp
+++ b/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.cpp
@@ -2,13 +2,11 @@
  *  @file RT1051CellularAudio.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 03.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051CellularAudio.hpp"
 #include "board.h"
 #include "dma_config.h"
@@ -17,54 +15,57 @@
 
 #include "bsp/BoardDefinitions.hpp"
 
-
-namespace bsp {
+namespace bsp
+{
 
     using namespace drivers;
 
-    sai_edma_handle_t RT1051CellularAudio::txHandle = {};
-    sai_edma_handle_t RT1051CellularAudio::rxHandle = {};
-    int16_t RT1051CellularAudio::inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2] = {};
+    sai_edma_handle_t RT1051CellularAudio::txHandle                           = {};
+    sai_edma_handle_t RT1051CellularAudio::rxHandle                           = {};
+    int16_t RT1051CellularAudio::inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2]  = {};
     int16_t RT1051CellularAudio::outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2] = {};
 
-    RT1051CellularAudio::RT1051CellularAudio(bsp::AudioDevice::audioCallback_t callback) : AudioDevice(callback),
-                                                                                           saiInFormat{},
-                                                                                           saiOutFormat{},
-                                                                                           config{} {
+    RT1051CellularAudio::RT1051CellularAudio(bsp::AudioDevice::audioCallback_t callback)
+        : AudioDevice(callback), saiInFormat{}, saiOutFormat{}, config{}
+    {
         isInitialized = true;
     }
 
-    RT1051CellularAudio::~RT1051CellularAudio() {
+    RT1051CellularAudio::~RT1051CellularAudio()
+    {
         Stop();
         Deinit();
     }
 
-    int32_t RT1051CellularAudio::Start(const bsp::AudioDevice::Format &format) {
+    int32_t RT1051CellularAudio::Start(const bsp::AudioDevice::Format &format)
+    {
 
         Init();
 
-        saiInFormat.bitWidth = format.bitWidth;
+        saiInFormat.bitWidth      = format.bitWidth;
         saiInFormat.sampleRate_Hz = format.sampleRate_Hz;
 
-        saiOutFormat.bitWidth = format.bitWidth;
+        saiOutFormat.bitWidth      = format.bitWidth;
         saiOutFormat.sampleRate_Hz = format.sampleRate_Hz;
 
-
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputLeft)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputLeft)) {
             saiInFormat.stereo = kSAI_MonoLeft;
             InStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputRight)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputRight)) {
             saiInFormat.stereo = kSAI_MonoRight;
             InStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::InputStereo)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::InputStereo)) {
             saiInFormat.stereo = kSAI_Stereo;
             InStart();
         }
 
-        if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutputMono)) {
+        if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutputMono)) {
             saiOutFormat.stereo = kSAI_MonoLeft;
             OutStart();
-        } else if (format.flags & static_cast<uint32_t >(AudioDevice::Flags::OutPutStereo)) {
+        }
+        else if (format.flags & static_cast<uint32_t>(AudioDevice::Flags::OutPutStereo)) {
             saiOutFormat.stereo = kSAI_Stereo;
             OutStart();
         }
@@ -75,7 +76,8 @@ namespace bsp {
         return 0;
     }
 
-    int32_t RT1051CellularAudio::Stop() {
+    int32_t RT1051CellularAudio::Stop()
+    {
 
         InStop();
         OutStop();
@@ -89,63 +91,59 @@ namespace bsp {
             inWorkerThread = nullptr;
         }
 
-
         currentFormat = {};
         return 0;
-
     }
 
-    int32_t RT1051CellularAudio::OutputVolumeCtrl(float vol) {
+    int32_t RT1051CellularAudio::OutputVolumeCtrl(float vol)
+    {
         currentFormat.outputVolume = vol;
         return 0;
     }
 
-    int32_t RT1051CellularAudio::InputGainCtrl(float gain) {
+    int32_t RT1051CellularAudio::InputGainCtrl(float gain)
+    {
         currentFormat.inputGain = gain;
         return 0;
     }
 
-    int32_t RT1051CellularAudio::InputPathCtrl(InputPath inputPath) {
+    int32_t RT1051CellularAudio::InputPathCtrl(InputPath inputPath)
+    {
         currentFormat.inputPath = inputPath;
         return 0;
     }
 
-    int32_t RT1051CellularAudio::OutputPathCtrl(OutputPath outputPath) {
+    int32_t RT1051CellularAudio::OutputPathCtrl(OutputPath outputPath)
+    {
         currentFormat.outputPath = outputPath;
         return 0;
     }
 
-    bool RT1051CellularAudio::IsFormatSupported(const bsp::AudioDevice::Format &format) {
+    bool RT1051CellularAudio::IsFormatSupported(const bsp::AudioDevice::Format &format)
+    {
         return true;
     }
 
-
-
-
-
     // INTERNALS
 
+    void RT1051CellularAudio::Init()
+    {
 
-    void RT1051CellularAudio::Init() {
+        pll = DriverPLL::Create(static_cast<PLLInstances>(BoardDefinitions::AUDIO_PLL), DriverPLLParams{});
 
-        pll = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions::AUDIO_PLL),
-                                                 DriverPLLParams{});
-
-        dmamux = DriverDMAMux::Create(
-                static_cast<DMAMuxInstances >(BoardDefinitions::CELLULAR_AUDIO_DMAMUX), DriverDMAMuxParams{});
-
-        dma = DriverDMA::Create(static_cast<DMAInstances >(BoardDefinitions::CELLULAR_AUDIO_DMA),
-                                                 DriverDMAParams{});
+        dmamux = DriverDMAMux::Create(static_cast<DMAMuxInstances>(BoardDefinitions::CELLULAR_AUDIO_DMAMUX),
+                                      DriverDMAMuxParams{});
 
+        dma = DriverDMA::Create(static_cast<DMAInstances>(BoardDefinitions::CELLULAR_AUDIO_DMA), DriverDMAParams{});
 
         // Enable MCLK clock
         IOMUXC_GPR->GPR1 |= BOARD_CELLULAR_AUDIO_SAIx_MCLK_MASK;
 
-        txDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions::CELLULAR_AUDIO_TX_DMA_CHANNEL));
-        rxDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions::CELLULAR_AUDIO_RX_DMA_CHANNEL));
-        dmamux->Enable(static_cast<uint32_t >(BoardDefinitions::CELLULAR_AUDIO_TX_DMA_CHANNEL),
+        txDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions::CELLULAR_AUDIO_TX_DMA_CHANNEL));
+        rxDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions::CELLULAR_AUDIO_RX_DMA_CHANNEL));
+        dmamux->Enable(static_cast<uint32_t>(BoardDefinitions::CELLULAR_AUDIO_TX_DMA_CHANNEL),
                        BSP_CELLULAR_AUDIO_SAIx_DMA_TX_SOURCE); // TODO: M.P fix BSP_CELLULAR_AUDIO_SAIx_DMA_TX_SOURCE
-        dmamux->Enable(static_cast<uint32_t >(BoardDefinitions::CELLULAR_AUDIO_RX_DMA_CHANNEL),
+        dmamux->Enable(static_cast<uint32_t>(BoardDefinitions::CELLULAR_AUDIO_RX_DMA_CHANNEL),
                        BSP_CELLULAR_AUDIO_SAIx_DMA_RX_SOURCE); // TODO: M.P fix BSP_CELLULAR_AUDIO_SAIx_DMA_RX_SOURCE
 
         mclkSourceClockHz = GetPerphSourceClock(PerphClock_SAI1); // TODO:M.P fix PerphClock_SAI1
@@ -153,54 +151,59 @@ namespace bsp {
         // Initialize SAI Tx module
         SAI_TxGetDefaultConfig(&config);
         config.masterSlave = kSAI_Slave;
-        config.protocol = kSAI_BusPCMA;
+        config.protocol    = kSAI_BusPCMA;
         SAI_TxInit(BOARD_CELLULAR_AUDIO_SAIx, &config);
 
         // Initialize SAI Rx module
         SAI_RxGetDefaultConfig(&config);
         config.masterSlave = kSAI_Slave;
-        config.protocol = kSAI_BusPCMA;
+        config.protocol    = kSAI_BusPCMA;
         SAI_RxInit(BOARD_CELLULAR_AUDIO_SAIx, &config);
     }
 
-    void RT1051CellularAudio::Deinit() {
+    void RT1051CellularAudio::Deinit()
+    {
         memset(&config, 0, sizeof config);
         SAI_Deinit(BOARD_CELLULAR_AUDIO_SAIx);
-        dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::CELLULAR_AUDIO_TX_DMA_CHANNEL));
-        dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::CELLULAR_AUDIO_RX_DMA_CHANNEL));
+        dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::CELLULAR_AUDIO_TX_DMA_CHANNEL));
+        dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::CELLULAR_AUDIO_RX_DMA_CHANNEL));
     }
 
-    void RT1051CellularAudio::InStart() {
+    void RT1051CellularAudio::InStart()
+    {
         sai_transfer_format_t sai_format = {0};
-        sai_transfer_t xfer = {0};
+        sai_transfer_t xfer              = {0};
 
-        saiInFormat.data = (uint8_t *) inBuffer;
+        saiInFormat.data     = (uint8_t *)inBuffer;
         saiInFormat.dataSize = CODEC_CHANNEL_PCM_BUFFER_SIZE * saiInFormat.bitWidth / 8;
 
         /* Configure the audio format */
-        sai_format.bitWidth = saiInFormat.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = saiInFormat.sampleRate_Hz;
-        sai_format.masterClockHz = mclkSourceClockHz;
+        sai_format.bitWidth           = saiInFormat.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = saiInFormat.sampleRate_Hz;
+        sai_format.masterClockHz      = mclkSourceClockHz;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = config.protocol;
-        sai_format.stereo = saiInFormat.stereo;
+        sai_format.protocol           = config.protocol;
+        sai_format.stereo             = saiInFormat.stereo;
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
-        SAI_TransferRxCreateHandleEDMA(BOARD_CELLULAR_AUDIO_SAIx, &rxHandle, rxCellularCallback, this,
+        SAI_TransferRxCreateHandleEDMA(BOARD_CELLULAR_AUDIO_SAIx,
+                                       &rxHandle,
+                                       rxCellularCallback,
+                                       this,
                                        reinterpret_cast<edma_handle_t *>(rxDMAHandle->GetHandle()));
 
-        SAI_TransferRxSetFormatEDMA(BOARD_CELLULAR_AUDIO_SAIx, &rxHandle, &sai_format, mclkSourceClockHz,
-                                    mclkSourceClockHz);
+        SAI_TransferRxSetFormatEDMA(
+            BOARD_CELLULAR_AUDIO_SAIx, &rxHandle, &sai_format, mclkSourceClockHz, mclkSourceClockHz);
 
         DisableIRQ(BOARD_CELLULAR_AUDIO_SAIx_RX_IRQ);
 
         /* Reset SAI Rx internal logic */
         SAI_RxSoftwareReset(BOARD_CELLULAR_AUDIO_SAIx, kSAI_ResetTypeSoftware);
 
-        xfer.data = saiInFormat.data;
+        xfer.data     = saiInFormat.data;
         xfer.dataSize = saiInFormat.dataSize;
         SAI_TransferReceiveEDMA(BOARD_CELLULAR_AUDIO_SAIx, &rxHandle, &xfer);
 
@@ -209,37 +212,41 @@ namespace bsp {
         }
     }
 
-    void RT1051CellularAudio::OutStart() {
+    void RT1051CellularAudio::OutStart()
+    {
         sai_transfer_format_t sai_format = {0};
-        sai_transfer_t xfer = {0};
+        sai_transfer_t xfer              = {0};
 
-        saiOutFormat.data = (uint8_t *) outBuffer;
+        saiOutFormat.data     = (uint8_t *)outBuffer;
         saiOutFormat.dataSize = CODEC_CHANNEL_PCM_BUFFER_SIZE * saiInFormat.bitWidth / 8;
 
         /* Configure the audio format */
-        sai_format.bitWidth = saiOutFormat.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = saiOutFormat.sampleRate_Hz;
-        sai_format.masterClockHz = mclkSourceClockHz;
+        sai_format.bitWidth           = saiOutFormat.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = saiOutFormat.sampleRate_Hz;
+        sai_format.masterClockHz      = mclkSourceClockHz;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = config.protocol;
-        sai_format.stereo = saiOutFormat.stereo;
+        sai_format.protocol           = config.protocol;
+        sai_format.stereo             = saiOutFormat.stereo;
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
-        SAI_TransferTxCreateHandleEDMA(BOARD_CELLULAR_AUDIO_SAIx, &txHandle, txCellularCallback, this,
+        SAI_TransferTxCreateHandleEDMA(BOARD_CELLULAR_AUDIO_SAIx,
+                                       &txHandle,
+                                       txCellularCallback,
+                                       this,
                                        reinterpret_cast<edma_handle_t *>(txDMAHandle->GetHandle()));
 
-        SAI_TransferTxSetFormatEDMA(BOARD_CELLULAR_AUDIO_SAIx, &txHandle, &sai_format, mclkSourceClockHz,
-                                    mclkSourceClockHz);
+        SAI_TransferTxSetFormatEDMA(
+            BOARD_CELLULAR_AUDIO_SAIx, &txHandle, &sai_format, mclkSourceClockHz, mclkSourceClockHz);
 
         DisableIRQ(BOARD_CELLULAR_AUDIO_SAIx_TX_IRQ);
 
         /* Reset SAI Tx internal logic */
         SAI_TxSoftwareReset(BOARD_CELLULAR_AUDIO_SAIx, kSAI_ResetTypeSoftware);
 
-        xfer.data = saiOutFormat.data;
+        xfer.data     = saiOutFormat.data;
         xfer.dataSize = saiOutFormat.dataSize;
         SAI_TransferSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &txHandle, &xfer);
 
@@ -247,12 +254,12 @@ namespace bsp {
             LOG_ERROR("Error during creating  output cellular audio task");
         }
 
-        //Fill out buffer with data
-        GetAudioCallback()(nullptr, outBuffer,
-                           RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE * 2);
+        // Fill out buffer with data
+        GetAudioCallback()(nullptr, outBuffer, RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE * 2);
     }
 
-    void RT1051CellularAudio::OutStop() {
+    void RT1051CellularAudio::OutStop()
+    {
         SAI_TxDisableInterrupts(BOARD_CELLULAR_AUDIO_SAIx, kSAI_FIFOErrorInterruptEnable);
         if (txHandle.dmaHandle) {
             SAI_TransferTerminateSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &txHandle);
@@ -260,7 +267,8 @@ namespace bsp {
         memset(&txHandle, 0, sizeof(txHandle));
     }
 
-    void RT1051CellularAudio::InStop() {
+    void RT1051CellularAudio::InStop()
+    {
         SAI_RxDisableInterrupts(BOARD_CELLULAR_AUDIO_SAIx, kSAI_FIFOErrorInterruptEnable);
         if (rxHandle.dmaHandle) {
             SAI_TransferAbortReceiveEDMA(BOARD_CELLULAR_AUDIO_SAIx, &rxHandle);
@@ -268,165 +276,173 @@ namespace bsp {
         memset(&rxHandle, 0, sizeof(rxHandle));
     }
 
-
-    void inCellularWorkerTask(void *pvp) {
+    void inCellularWorkerTask(void *pvp)
+    {
         uint32_t ulNotificationValue = 0;
 
         RT1051CellularAudio *inst = reinterpret_cast<RT1051CellularAudio *>(pvp);
 
         while (1) {
-            xTaskNotifyWait(0x00,               /* Don't clear any bits on entry. */
-                            UINT32_MAX,          /* Clear all bits on exit. */
+            xTaskNotifyWait(0x00,                 /* Don't clear any bits on entry. */
+                            UINT32_MAX,           /* Clear all bits on exit. */
                             &ulNotificationValue, /* Receives the notification value. */
-                            portMAX_DELAY);    /* Block indefinitely. */
+                            portMAX_DELAY);       /* Block indefinitely. */
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(inst->inBuffer, nullptr,
-                                                              RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer)) {
+                auto framesFetched = inst->GetAudioCallback()(
+                    inst->inBuffer, nullptr, RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->inBuffer[framesFetched], 0,
+                }
+                else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->inBuffer[framesFetched],
+                           0,
                            RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051CellularAudio::irq_state_t::IRQStateFullTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(
-                        &inst->inBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE], nullptr,
-                        RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051CellularAudio::irq_state_t::IRQStateFullTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(&inst->inBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE],
+                                             nullptr,
+                                             RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
 
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->inBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched], 0,
+                }
+                else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->inBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched],
+                           0,
                            RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
         }
 
-        cleanup:
+    cleanup:
         inst->InStop();
         inst->inWorkerThread = nullptr;
         vTaskDelete(NULL);
     }
 
-    void outCellularWorkerTask(void *pvp) {
+    void outCellularWorkerTask(void *pvp)
+    {
         uint32_t ulNotificationValue = 0;
 
         RT1051CellularAudio *inst = reinterpret_cast<RT1051CellularAudio *>(pvp);
 
         while (1) {
-            xTaskNotifyWait(0x00,               /* Don't clear any bits on entry. */
-                            UINT32_MAX,          /* Clear all bits on exit. */
+            xTaskNotifyWait(0x00,                 /* Don't clear any bits on entry. */
+                            UINT32_MAX,           /* Clear all bits on exit. */
                             &ulNotificationValue, /* Receives the notification value. */
-                            portMAX_DELAY);    /* Block indefinitely. */
+                            portMAX_DELAY);       /* Block indefinitely. */
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(nullptr, inst->outBuffer,
-                                                              RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer)) {
+                auto framesFetched = inst->GetAudioCallback()(
+                    nullptr, inst->outBuffer, RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->outBuffer[framesFetched], 0,
+                }
+                else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->outBuffer[framesFetched],
+                           0,
                            RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
 
-            if (ulNotificationValue & static_cast<uint32_t >(RT1051CellularAudio::irq_state_t::IRQStateFullTransfer)) {
-                auto framesFetched = inst->GetAudioCallback()(nullptr,
-                                                              &inst->outBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE],
-                                                              RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
+            if (ulNotificationValue & static_cast<uint32_t>(RT1051CellularAudio::irq_state_t::IRQStateFullTransfer)) {
+                auto framesFetched =
+                    inst->GetAudioCallback()(nullptr,
+                                             &inst->outBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE],
+                                             RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE);
 
                 if (framesFetched == 0) {
                     goto cleanup;
-                } else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
-                    memset(&inst->outBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched], 0,
+                }
+                else if (framesFetched < RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE) {
+                    memset(&inst->outBuffer[RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE + framesFetched],
+                           0,
                            RT1051CellularAudio::CODEC_CHANNEL_PCM_BUFFER_SIZE - framesFetched);
                 }
             }
         }
 
-        cleanup:
+    cleanup:
         inst->OutStop();
         inst->outWorkerThread = nullptr;
         vTaskDelete(NULL);
     }
 
-    void rxCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData) {
+    void rxCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
         static RT1051CellularAudio::irq_state_t state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
-        RT1051CellularAudio *inst = (RT1051CellularAudio *) userData;
-        sai_transfer_t xfer = {0};
-        BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+        RT1051CellularAudio *inst                     = (RT1051CellularAudio *)userData;
+        sai_transfer_t xfer                           = {0};
+        BaseType_t xHigherPriorityTaskWoken           = pdFALSE;
 
         if (state == RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer) {
 
             xfer.dataSize = inst->saiInFormat.dataSize;
-            xfer.data = inst->saiInFormat.data + (inst->saiInFormat.dataSize);
+            xfer.data     = inst->saiInFormat.data + (inst->saiInFormat.dataSize);
             SAI_TransferReceiveEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->rxHandle, &xfer);
 
             /* Notify the task that the transmission is complete. */
             if (inst->inWorkerThread) {
-                xTaskNotifyFromISR(inst->inWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
+                xTaskNotifyFromISR(
+                    inst->inWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
             }
             state = RT1051CellularAudio::irq_state_t::IRQStateFullTransfer;
-
-        } else {
-
-            xfer.dataSize = inst->saiInFormat.dataSize;
-            xfer.data = inst->saiInFormat.data;
-            SAI_TransferReceiveEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->rxHandle, &xfer);
-
-            /* Notify the task that the transmission is complete. */
-            if (inst->inWorkerThread) {
-                xTaskNotifyFromISR(inst->inWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
-            }
-            state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
-
-
         }
+        else {
 
-
-        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
-    }
-
-    void txCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData) {
-        static RT1051CellularAudio::irq_state_t state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
-        RT1051CellularAudio *inst = (RT1051CellularAudio *) userData;
-        sai_transfer_t xfer = {0};
-        BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-
-        if (state == RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer) {
-
-            xfer.dataSize = inst->saiOutFormat.dataSize;
-            xfer.data = inst->saiOutFormat.data + (inst->saiOutFormat.dataSize);
-            SAI_TransferSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->txHandle, &xfer);
+            xfer.dataSize = inst->saiInFormat.dataSize;
+            xfer.data     = inst->saiInFormat.data;
+            SAI_TransferReceiveEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->rxHandle, &xfer);
 
             /* Notify the task that the transmission is complete. */
-            if (inst->outWorkerThread) {
-                xTaskNotifyFromISR(inst->outWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
-            }
-            state = RT1051CellularAudio::irq_state_t::IRQStateFullTransfer;
-
-
-        } else {
-            xfer.dataSize = inst->saiOutFormat.dataSize;
-            xfer.data = inst->saiOutFormat.data;
-            SAI_TransferSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->txHandle, &xfer);
-
-            /* Notify the task that the transmission is complete. */
-            if (inst->outWorkerThread) {
-                xTaskNotifyFromISR(inst->outWorkerThread, static_cast<uint32_t >(state), eSetBits,
-                                   &xHigherPriorityTaskWoken);
+            if (inst->inWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->inWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
             }
             state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
-
         }
 
         portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
     }
 
-}
\ No newline at end of file
+    void txCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
+        static RT1051CellularAudio::irq_state_t state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
+        RT1051CellularAudio *inst                     = (RT1051CellularAudio *)userData;
+        sai_transfer_t xfer                           = {0};
+        BaseType_t xHigherPriorityTaskWoken           = pdFALSE;
+
+        if (state == RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer) {
+
+            xfer.dataSize = inst->saiOutFormat.dataSize;
+            xfer.data     = inst->saiOutFormat.data + (inst->saiOutFormat.dataSize);
+            SAI_TransferSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->txHandle, &xfer);
+
+            /* Notify the task that the transmission is complete. */
+            if (inst->outWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->outWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
+            }
+            state = RT1051CellularAudio::irq_state_t::IRQStateFullTransfer;
+        }
+        else {
+            xfer.dataSize = inst->saiOutFormat.dataSize;
+            xfer.data     = inst->saiOutFormat.data;
+            SAI_TransferSendEDMA(BOARD_CELLULAR_AUDIO_SAIx, &inst->txHandle, &xfer);
+
+            /* Notify the task that the transmission is complete. */
+            if (inst->outWorkerThread) {
+                xTaskNotifyFromISR(
+                    inst->outWorkerThread, static_cast<uint32_t>(state), eSetBits, &xHigherPriorityTaskWoken);
+            }
+            state = RT1051CellularAudio::irq_state_t::IRQStateHalfTransfer;
+        }
+
+        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    }
+
+} // namespace bsp
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.hpp b/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.hpp
index 4d87a2930..8f0d40a26 100644
--- a/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.hpp
+++ b/module-bsp/board/rt1051/bsp/audio/RT1051CellularAudio.hpp
@@ -2,13 +2,11 @@
  *  @file RT1051CellularAudio.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 03.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051CELLULARAUDIO_HPP
 #define PUREPHONE_RT1051CELLULARAUDIO_HPP
 
@@ -22,59 +20,58 @@
 #include "drivers/dmamux/DriverDMAMux.hpp"
 #include "drivers/dma/DriverDMA.hpp"
 
-
-namespace bsp{
-
+namespace bsp
+{
 
     void txCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
     void rxCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
-    void inCellularWorkerTask(void* pvp);
-    void outCellularWorkerTask(void* pvp);
+    void inCellularWorkerTask(void *pvp);
+    void outCellularWorkerTask(void *pvp);
 
-    class RT1051CellularAudio : public AudioDevice{
-
-    public:
+    class RT1051CellularAudio : public AudioDevice
+    {
 
+      public:
         friend void txCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
         friend void rxCellularCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
-        friend void inCellularWorkerTask(void* pvp);
-        friend void outCellularWorkerTask(void* pvp);
+        friend void inCellularWorkerTask(void *pvp);
+        friend void outCellularWorkerTask(void *pvp);
 
         RT1051CellularAudio(AudioDevice::audioCallback_t callback);
         virtual ~RT1051CellularAudio();
 
-        int32_t Start(const Format& format) override final;
+        int32_t Start(const Format &format) override final;
         int32_t Stop() override final;
         int32_t OutputVolumeCtrl(float vol) override final;
         int32_t InputGainCtrl(float gain) override final;
         int32_t OutputPathCtrl(OutputPath outputPath) override final;
         int32_t InputPathCtrl(InputPath inputPath) override final;
-        bool IsFormatSupported(const Format& format) override final;
+        bool IsFormatSupported(const Format &format) override final;
 
-    private:
-
-        static const uint32_t CODEC_CHANNEL_PCM_BUFFER_SIZE=1024;
+      private:
+        static const uint32_t CODEC_CHANNEL_PCM_BUFFER_SIZE = 1024;
 
         /*! @brief Internals state of Rx/Tx callback, needed for double buffering technique */
         enum class irq_state_t
         {
-            IRQStateHalfTransfer=1<<0,
-            IRQStateFullTransfer=1<<1
+            IRQStateHalfTransfer = 1 << 0,
+            IRQStateFullTransfer = 1 << 1
         };
 
-        struct SAIFormat{
+        struct SAIFormat
+        {
             uint32_t sampleRate_Hz;   /*!< Sample rate of audio data */
             uint32_t bitWidth;        /*!< Data length of audio data, usually 8/16/24/32 bits */
             sai_mono_stereo_t stereo; /*!< Mono or stereo */
-            uint8_t *data;   /*!< Data start address to transfer. */
-            size_t dataSize; /*!< Transfer size. */
+            uint8_t *data;            /*!< Data start address to transfer. */
+            size_t dataSize;          /*!< Transfer size. */
         };
 
         SAIFormat saiInFormat;
         SAIFormat saiOutFormat;
         uint32_t mclkSourceClockHz = 0;
         sai_config_t config;
-        TaskHandle_t inWorkerThread = nullptr;
+        TaskHandle_t inWorkerThread  = nullptr;
         TaskHandle_t outWorkerThread = nullptr;
 
         // M.P: It is important to destroy these drivers in specific order
@@ -84,17 +81,14 @@ namespace bsp{
         std::unique_ptr<drivers::DriverDMAHandle> rxDMAHandle;
         std::unique_ptr<drivers::DriverDMAHandle> txDMAHandle;
 
-
-
-
         static AT_NONCACHEABLE_SECTION_INIT(sai_edma_handle_t txHandle);
         static AT_NONCACHEABLE_SECTION_INIT(sai_edma_handle_t rxHandle);
 
         // CODEC_CHANNEL_PCM_BUFFER_SIZE * 2 for double buffering
-        static ALIGN_(4) int16_t inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE*2];
+        static ALIGN_(4) int16_t inBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2];
 
         // CODEC_CHANNEL_PCM_BUFFER_SIZE * 2 for double buffering
-        static ALIGN_(4) int16_t outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE*2];
+        static ALIGN_(4) int16_t outBuffer[CODEC_CHANNEL_PCM_BUFFER_SIZE * 2];
 
         void Init();
         void Deinit();
@@ -102,10 +96,7 @@ namespace bsp{
         void InStart();
         void OutStop();
         void InStop();
-
-
     };
-}
+} // namespace bsp
 
-
-#endif //PUREPHONE_RT1051CELLULARAUDIO_HPP
+#endif // PUREPHONE_RT1051CELLULARAUDIO_HPP
diff --git a/module-bsp/board/rt1051/bsp/audio/max98090_regs.hpp b/module-bsp/board/rt1051/bsp/audio/max98090_regs.hpp
index 187c6b864..8ab4d8e0e 100644
--- a/module-bsp/board/rt1051/bsp/audio/max98090_regs.hpp
+++ b/module-bsp/board/rt1051/bsp/audio/max98090_regs.hpp
@@ -13,588 +13,583 @@
 #include <memory>
 
 // Device revision
-#define MAX98090_REG_REVID	0xFF
+#define MAX98090_REG_REVID 0xFF
 typedef struct
 {
-	uint8_t revid;
-}max98090_reg_revid_t;
+    uint8_t revid;
+} max98090_reg_revid_t;
 
 // Software reset register
-#define MAX98090_REG_SWRESET	0x00
+#define MAX98090_REG_SWRESET 0x00
 typedef struct
 {
-	uint8_t unused:7;
-	uint8_t swreset:1;
-}max98090_reg_swreset_t;
+    uint8_t unused : 7;
+    uint8_t swreset : 1;
+} max98090_reg_swreset_t;
 
 // Device Status Interrupt Register
 // Check Table 85. for more info.
-#define MAX98090_REG_DEVICE_STATUS	0x01
+#define MAX98090_REG_DEVICE_STATUS 0x01
 typedef struct
 {
-	uint8_t drcclp:1;
-	uint8_t drcact:1;
-	uint8_t jdet:1;
-	uint8_t unused:2;
-	uint8_t ulk:1;
-	uint8_t sld:1;
-	uint8_t cld:1;
-}max98090_reg_devstat_t;
+    uint8_t drcclp : 1;
+    uint8_t drcact : 1;
+    uint8_t jdet : 1;
+    uint8_t unused : 2;
+    uint8_t ulk : 1;
+    uint8_t sld : 1;
+    uint8_t cld : 1;
+} max98090_reg_devstat_t;
 
 // Device Status Interrupt Mask Register
 // Check Table 86. for more info.
-#define MAX98090_REG_DEVICE_STATUS_MASK	0x01
+#define MAX98090_REG_DEVICE_STATUS_MASK 0x01
 typedef struct
 {
-	uint8_t idrcclp:1;
-	uint8_t idrcact:1;
-	uint8_t ijdet:1;
-	uint8_t unused:2;
-	uint8_t iulk:1;
-	uint8_t isld:1;
-	uint8_t icld:1;
-}max98090_reg_devstat_mask_t;
+    uint8_t idrcclp : 1;
+    uint8_t idrcact : 1;
+    uint8_t ijdet : 1;
+    uint8_t unused : 2;
+    uint8_t iulk : 1;
+    uint8_t isld : 1;
+    uint8_t icld : 1;
+} max98090_reg_devstat_mask_t;
 
 // Device shutdown register
 // Check Table 6. for more info.
-#define MAX98090_REG_DEVICE_SHUTDOWN	0x45
+#define MAX98090_REG_DEVICE_SHUTDOWN 0x45
 typedef struct
 {
-	uint8_t unused:7;
-	uint8_t shdn:1;
-}max98090_reg_shutdown_t;
+    uint8_t unused : 7;
+    uint8_t shdn : 1;
+} max98090_reg_shutdown_t;
 
 // Input enable register
-#define MAX98090_REG_INPUT_ENABLE						0x3E
+#define MAX98090_REG_INPUT_ENABLE 0x3E
 typedef struct
 {
-	uint8_t adlen:1;
-	uint8_t adren:1;
-	uint8_t lineben:1;
-	uint8_t lineaen:1;
-	uint8_t mben:1;
-	uint8_t unused:3;
-}max98090_reg_inputenable_t;
+    uint8_t adlen : 1;
+    uint8_t adren : 1;
+    uint8_t lineben : 1;
+    uint8_t lineaen : 1;
+    uint8_t mben : 1;
+    uint8_t unused : 3;
+} max98090_reg_inputenable_t;
 
 // Output enable register
-#define MAX98090_REG_OUTPUT_ENABLE	0x3F
+#define MAX98090_REG_OUTPUT_ENABLE 0x3F
 typedef struct
 {
-	uint8_t hpren:1;
-	uint8_t hplen:1;
-	uint8_t spren:1;
-	uint8_t splen:1;
-	uint8_t rcvlen:1;
-	uint8_t rcvren:1;
-	uint8_t daren:1;
-	uint8_t dalen:1;
-}max98090_reg_outputenable_t;
+    uint8_t hpren : 1;
+    uint8_t hplen : 1;
+    uint8_t spren : 1;
+    uint8_t splen : 1;
+    uint8_t rcvlen : 1;
+    uint8_t rcvren : 1;
+    uint8_t daren : 1;
+    uint8_t dalen : 1;
+} max98090_reg_outputenable_t;
 
 // Output enable register
-#define MAX98090_REG_DAC_HP_PERF	0x43
+#define MAX98090_REG_DAC_HP_PERF 0x43
 typedef struct
 {
-	uint8_t dachp:1;
-	uint8_t perfmode:1;
-	uint8_t unused:6;
-}max98090_reg_dac_hp_perf_t;
+    uint8_t dachp : 1;
+    uint8_t perfmode : 1;
+    uint8_t unused : 6;
+} max98090_reg_dac_hp_perf_t;
 
 // Microphone 1 enable and level configuration register
-#define MAX98090_REG_MIC1_ENABLE_LEVEL_CONF	0x10
+#define MAX98090_REG_MIC1_ENABLE_LEVEL_CONF 0x10
 typedef struct
 {
-	uint8_t pgam:5;
-	uint8_t pa1en:2;
-}max98090_reg_mic1ena_lvlctl_t;
+    uint8_t pgam : 5;
+    uint8_t pa1en : 2;
+} max98090_reg_mic1ena_lvlctl_t;
 
 // Microphone 2 enable and level configuration register
-#define MAX98090_REG_MIC2_ENABLE_LEVEL_CONF	0x11
+#define MAX98090_REG_MIC2_ENABLE_LEVEL_CONF 0x11
 typedef struct
 {
-	uint8_t pgam:5;
-	uint8_t pa2en:2;
-}max98090_reg_mic2ena_lvlctl_t;
+    uint8_t pgam : 5;
+    uint8_t pa2en : 2;
+} max98090_reg_mic2ena_lvlctl_t;
 
 // Microphone Bias Level Configuration Register
-#define MAX98090_REG_MIC_BIAS	0x12
+#define MAX98090_REG_MIC_BIAS 0x12
 typedef struct
 {
-	uint8_t mbvsel:2;
-	uint8_t unused:6;
-}max98090_reg_micbias_t;
+    uint8_t mbvsel : 2;
+    uint8_t unused : 6;
+} max98090_reg_micbias_t;
 
 // Digital Microphone Enable
 // For more info check Table 13.
-#define MAX98090_REG_DIG_MIC_ENABLE	0x13
+#define MAX98090_REG_DIG_MIC_ENABLE 0x13
 typedef struct
 {
-	uint8_t digmicl:1;
-	uint8_t digmicr:1;
-	uint8_t unused:2;
-	uint8_t dmicclk:2;
-	uint8_t unused2:1;
-}max98090_reg_digmic_enable_t;
+    uint8_t digmicl : 1;
+    uint8_t digmicr : 1;
+    uint8_t unused : 2;
+    uint8_t dmicclk : 2;
+    uint8_t unused2 : 1;
+} max98090_reg_digmic_enable_t;
 
 // Digital Microphone Configuration
 // Check Table 14. for more info.
 // Check MAX98090 datasheet Table 15-16 for recommended filter configuration
-#define MAX98090_REG_DIG_MIC_CONF	0x14
+#define MAX98090_REG_DIG_MIC_CONF 0x14
 typedef struct
 {
-	uint8_t dmicfreq:2;
-	uint8_t unused:2;
-	uint8_t dmiccomp:4;
-
-}max98090_reg_digmic_conf_t;
+    uint8_t dmicfreq : 2;
+    uint8_t unused : 2;
+    uint8_t dmiccomp : 4;
 
+} max98090_reg_digmic_conf_t;
 
 /*  Left ADC Mixer Input Configuration Register
-	6 R/W 0 Selects microphone input 2 to left ADC mixer.
-	5 R/W 0 Selects microphone input 1 to left ADC mixer.
-	4 R/W 0 Selects line input B to left ADC mixer.
-	3 R/W 0 Selects line input A to left ADC mixer.
-	2 R/W 0 Selects IN5/IN6 differential input direct to left ADC mixer (WLP only).
-	1 R/W 0 Selects IN3/IN4 differential input direct to left ADC mixer.
-	0 R/W 0 Selects IN1/IN2 differential input direct to left ADC mixer
+    6 R/W 0 Selects microphone input 2 to left ADC mixer.
+    5 R/W 0 Selects microphone input 1 to left ADC mixer.
+    4 R/W 0 Selects line input B to left ADC mixer.
+    3 R/W 0 Selects line input A to left ADC mixer.
+    2 R/W 0 Selects IN5/IN6 differential input direct to left ADC mixer (WLP only).
+    1 R/W 0 Selects IN3/IN4 differential input direct to left ADC mixer.
+    0 R/W 0 Selects IN1/IN2 differential input direct to left ADC mixer
 */
-#define MAX98090_REG_LADC_MIXER_INPUT	0x15
+#define MAX98090_REG_LADC_MIXER_INPUT 0x15
 typedef struct
 {
-	uint8_t mixadl:7;
-}max98090_reg_ladc_mix_input_t;
+    uint8_t mixadl : 7;
+} max98090_reg_ladc_mix_input_t;
 
 /*  Right ADC Mixer Input Configuration Register
-	6 R/W 0 Selects microphone input 2 to right ADC mixer.
-	5 R/W 0 Selects microphone input 1 to right ADC mixer.
-	4 R/W 0 Selects line input B to right ADC mixer.
-	3 R/W 0 Selects line input A to right ADC mixer.
-	2 R/W 0 Selects IN5/IN6 differential input direct to right ADC mixer (WLP only).
-	1 R/W 0 Selects IN3/IN4 differential input direct to right ADC mixer.
-	0 R/W 0 Selects IN1/IN2 differential input direct to right ADC mixer
+    6 R/W 0 Selects microphone input 2 to right ADC mixer.
+    5 R/W 0 Selects microphone input 1 to right ADC mixer.
+    4 R/W 0 Selects line input B to right ADC mixer.
+    3 R/W 0 Selects line input A to right ADC mixer.
+    2 R/W 0 Selects IN5/IN6 differential input direct to right ADC mixer (WLP only).
+    1 R/W 0 Selects IN3/IN4 differential input direct to right ADC mixer.
+    0 R/W 0 Selects IN1/IN2 differential input direct to right ADC mixer
 */
-#define MAX98090_REG_RADC_MIXER_INPUT	0x16
+#define MAX98090_REG_RADC_MIXER_INPUT 0x16
 typedef struct
 {
-	uint8_t mixadr:7;
-}max98090_reg_radc_mix_input_t;
+    uint8_t mixadr : 7;
+} max98090_reg_radc_mix_input_t;
 
 /*  Left Record Path Digital Gain Configuration Register
-	Table 32.
+    Table 32.
 */
-#define MAX98090_REG_LREC_DIG_GAIN	0x17
+#define MAX98090_REG_LREC_DIG_GAIN 0x17
 typedef struct
 {
-	uint8_t avl:4;
-	uint8_t avlg:3;
-	uint8_t unused:1;
-}max98090_reg_lrec_dig_gain_t;
+    uint8_t avl : 4;
+    uint8_t avlg : 3;
+    uint8_t unused : 1;
+} max98090_reg_lrec_dig_gain_t;
 
 /*  Right Record Path Digital Gain Configuration Register
-	Table 33.
+    Table 33.
 */
-#define MAX98090_REG_RREC_DIG_GAIN	0x18
+#define MAX98090_REG_RREC_DIG_GAIN 0x18
 typedef struct
 {
-	uint8_t avr:4;
-	uint8_t avrg:3;
-	uint8_t unused:1;
-}max98090_reg_rrec_dig_gain_t;
-
+    uint8_t avr : 4;
+    uint8_t avrg : 3;
+    uint8_t unused : 1;
+} max98090_reg_rrec_dig_gain_t;
 
 // Record DSP Filter Configuration Register
-#define MAX98090_REG_REC_DSP_FILTER_CONF	0x14
+#define MAX98090_REG_REC_DSP_FILTER_CONF 0x14
 typedef struct
 {
 
-	uint8_t unused:4;
+    uint8_t unused : 4;
 
-	/*
-	Enables the DAC High Sample Rate Mode (LRCLK > 48kHz, FIR Only)
-	0: LRCLK is less than 48kHz. 8x FIR interpolation filter used.
-	1: LRCLK is greater than 48kHz. 4x FIR interpolation filter used.
-	 */
-	uint8_t dhf:1;
+    /*
+    Enables the DAC High Sample Rate Mode (LRCLK > 48kHz, FIR Only)
+    0: LRCLK is less than 48kHz. 8x FIR interpolation filter used.
+    1: LRCLK is greater than 48kHz. 4x FIR interpolation filter used.
+     */
+    uint8_t dhf : 1;
 
-	/*
-	Enables the Playback Path DC-Blocking Filter
-	0: DC-blocking filter disabled.
-	1: DC-blocking filter enabled
-	 */
-	uint8_t dhpf:1;
+    /*
+    Enables the Playback Path DC-Blocking Filter
+    0: DC-blocking filter disabled.
+    1: DC-blocking filter enabled
+     */
+    uint8_t dhpf : 1;
 
-	/*
-	Enables the Record Path DC-Blocking Filter
-	0: DC-blocking filter disabled.
-	1: DC-blocking filter enabled.
-	 */
-	uint8_t ahpf:1;
+    /*
+    Enables the Record Path DC-Blocking Filter
+    0: DC-blocking filter disabled.
+    1: DC-blocking filter enabled.
+     */
+    uint8_t ahpf : 1;
 
-	/*
-	Enables the Codec DSP FIR Music Filters (Default IIR Voice Filters)
-	0: The codec DSP filters operate in IIR voice mode with stop band frequencies below
-	the fS/2 Nyquist rate. The voice mode filters are optimized for 8kHz or 16kHz voice
-	application use.
-	1: The codec DSP filters operate in a linear phase FIR audio mode optimized to
-	maintain stereo imaging and operate at higher fS rates while utilizing lower power
-	 */
-	uint8_t mode:1;
+    /*
+    Enables the Codec DSP FIR Music Filters (Default IIR Voice Filters)
+    0: The codec DSP filters operate in IIR voice mode with stop band frequencies below
+    the fS/2 Nyquist rate. The voice mode filters are optimized for 8kHz or 16kHz voice
+    application use.
+    1: The codec DSP filters operate in a linear phase FIR audio mode optimized to
+    maintain stereo imaging and operate at higher fS rates while utilizing lower power
+     */
+    uint8_t mode : 1;
 
-}max98090_reg_rec_dspfilter_conf_t;
+} max98090_reg_rec_dspfilter_conf_t;
 
 // System Master Clock (MCLK) Prescaler Configuration Register
 // Check MAX98090 datasheet Table 34 for available configurations
-#define MAX98090_REG_SYSTEM_MASTER_CLOCK	0x1B
+#define MAX98090_REG_SYSTEM_MASTER_CLOCK 0x1B
 typedef struct
 {
-	uint8_t unused:4;
-	uint8_t psclk:2;
-	uint8_t unused2:2;
+    uint8_t unused : 4;
+    uint8_t psclk : 2;
+    uint8_t unused2 : 2;
 
-}max98090_reg_system_masterclock_conf_t;
+} max98090_reg_system_masterclock_conf_t;
 
 // Master Mode Clock Configuration Register
 // Check MAX98090 datasheet Table 35 for available configurations
-#define MAX98090_REG_SYSTEM_MASTER_MODE	0x21
+#define MAX98090_REG_SYSTEM_MASTER_MODE 0x21
 typedef struct
 {
-	uint8_t bsel:3;
-	uint8_t unused:4;
-	uint8_t mas:1;
+    uint8_t bsel : 3;
+    uint8_t unused : 4;
+    uint8_t mas : 1;
 
-}max98090_reg_master_mode_conf_t;
+} max98090_reg_master_mode_conf_t;
 
 // Clock Mode Configuration Register
 // Check MAX98090 datasheet Table 39 for available configurations
-#define MAX98090_REG_CLOCK_MODE	0x1C
+#define MAX98090_REG_CLOCK_MODE 0x1C
 typedef struct
 {
-	uint8_t usemi:4;
-	uint8_t unused:3;
-	uint8_t freq:4;
-}max98090_reg_clock_mode_t;
+    uint8_t usemi : 4;
+    uint8_t unused : 3;
+    uint8_t freq : 4;
+} max98090_reg_clock_mode_t;
 
 // Manual Clock Ratio Configuration Register (NI MSB)
 // Check MAX98090 datasheet Table 40 for available configurations
-#define MAX98090_REG_NI_MSB	0x1D
+#define MAX98090_REG_NI_MSB 0x1D
 typedef struct
 {
-	uint8_t ni;
-}max98090_reg_manual_clock_ratio_NI_MSB_t;
+    uint8_t ni;
+} max98090_reg_manual_clock_ratio_NI_MSB_t;
 
 // Manual Clock Ratio Configuration Register (NI LSB)
 // Check MAX98090 datasheet Table 41 for available configurations
-#define MAX98090_REG_NI_LSB	0x1E
+#define MAX98090_REG_NI_LSB 0x1E
 typedef struct
 {
-	uint8_t ni;
-}max98090_reg_manual_clock_ratio_NI_LSB_t;
+    uint8_t ni;
+} max98090_reg_manual_clock_ratio_NI_LSB_t;
 
 // Manual Clock Ratio Configuration Register (MI MSB)
 // Check MAX98090 datasheet Table 42 for available configurations
-#define MAX98090_REG_MI_MSB	0x1F
+#define MAX98090_REG_MI_MSB 0x1F
 typedef struct
 {
-	uint8_t mi;
-}max98090_reg_manual_clock_ratio_MI_MSB_t;
+    uint8_t mi;
+} max98090_reg_manual_clock_ratio_MI_MSB_t;
 
 // Manual Clock Ratio Configuration Register (MI LSB)
 // Check MAX98090 datasheet Table 43 for available configurations
-#define MAX98090_REG_MI_LSB	0x20
+#define MAX98090_REG_MI_LSB 0x20
 typedef struct
 {
-	uint8_t mi;
-}max98090_reg_manual_clock_ratio_MI_LSB_t;
-
+    uint8_t mi;
+} max98090_reg_manual_clock_ratio_MI_LSB_t;
 
 // Left Headphone Mixer Configuration Register
 // Check MAX98090 datasheet Table 69 for available path configurations
-#define MAX98090_REG_LHP_MIXER_CONF	0x29
+#define MAX98090_REG_LHP_MIXER_CONF 0x29
 typedef struct
 {
-	uint8_t mixhpl:6;
-	uint8_t unused:2;
+    uint8_t mixhpl : 6;
+    uint8_t unused : 2;
 
-}max98090_reg_lhp_mixer_t;
+} max98090_reg_lhp_mixer_t;
 
 // Right Headphone Mixer Configuration Register
 // Check MAX98090 datasheet Table 69 for available path configurations
-#define MAX98090_REG_RHP_MIXER_CONF	0x2A
+#define MAX98090_REG_RHP_MIXER_CONF 0x2A
 typedef struct
 {
-	uint8_t mixhpr:6;
-	uint8_t unused:2;
+    uint8_t mixhpr : 6;
+    uint8_t unused : 2;
 
-}max98090_reg_rhp_mixer_t;
+} max98090_reg_rhp_mixer_t;
 
 // Headphone Mixer Control and Gain Register
 // Check MAX98090 datasheet Table 71 for available path configurations
-#define MAX98090_REG_HP_MIX_CONF	0x2B
+#define MAX98090_REG_HP_MIX_CONF 0x2B
 typedef struct
 {
-	uint8_t mixhplg:2;
-	uint8_t mixhprg:2;
-	uint8_t mixhplsel:1;
-	uint8_t mixhprsel:1;
-	uint8_t unused:2;
+    uint8_t mixhplg : 2;
+    uint8_t mixhprg : 2;
+    uint8_t mixhplsel : 1;
+    uint8_t mixhprsel : 1;
+    uint8_t unused : 2;
 
-}max98090_reg_hpmix_conf_t;
+} max98090_reg_hpmix_conf_t;
 
 // Digital Audio Interface (DAI) Input/Output Configuration Register
 // Check MAX98090 datasheet Table 44 for available path configurations
-#define MAX98090_REG_INOUT_PATH_CONF	0x25
+#define MAX98090_REG_INOUT_PATH_CONF 0x25
 typedef struct
 {
-	uint8_t sdien:1;
-	uint8_t sdoen:1;
-	uint8_t hizoff:1;
-	uint8_t dmono:1;
-	uint8_t lben:1;
-	uint8_t lten:1;
-	uint8_t unused:2;
+    uint8_t sdien : 1;
+    uint8_t sdoen : 1;
+    uint8_t hizoff : 1;
+    uint8_t dmono : 1;
+    uint8_t lben : 1;
+    uint8_t lten : 1;
+    uint8_t unused : 2;
 
-}max98090_reg_inoutpath_conf_t;
+} max98090_reg_inoutpath_conf_t;
 
 // Digital Audio Interface (DAI) Format Configuration Register
 // Check MAX98090 datasheet Table 46 for available configurations
-#define MAX98090_REG_DAI_FORMAT_CONF	0x22
+#define MAX98090_REG_DAI_FORMAT_CONF 0x22
 typedef struct
 {
-	uint8_t ws:2;
-	uint8_t dly:1;
-	uint8_t bci:1;
-	uint8_t wci:1;
-	uint8_t rj:1;
-	uint8_t unused:2;
+    uint8_t ws : 2;
+    uint8_t dly : 1;
+    uint8_t bci : 1;
+    uint8_t wci : 1;
+    uint8_t rj : 1;
+    uint8_t unused : 2;
 
-}max98090_reg_dai_format_conf_t;
+} max98090_reg_dai_format_conf_t;
 
 // Playback Gain and Level Configuration Register
 // Check MAX98090 datasheet Table 49 for available configurations
-#define MAX98090_REG_PLAYBACK_GAIN_LEVEL_CONF	0x27
+#define MAX98090_REG_PLAYBACK_GAIN_LEVEL_CONF 0x27
 typedef struct
 {
-	uint8_t dv:4;
-	uint8_t dvg:2;
-	uint8_t unused:1;
-	uint8_t dvm:1;
+    uint8_t dv : 4;
+    uint8_t dvg : 2;
+    uint8_t unused : 1;
+    uint8_t dvm : 1;
 
-}max98090_reg_playback_gainlevel_conf_t;
+} max98090_reg_playback_gainlevel_conf_t;
 
 // DSP Biquad Filter Enable Register
 // Check MAX98090 datasheet Table 50 for available configurations
-#define MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE	0x41
+#define MAX98090_REG_DSP_BIQUAD_FILTER_ENABLE 0x41
 typedef struct
 {
-	uint8_t eq7banden:1;
-	uint8_t eq5banden:1;
-	uint8_t eq3banden:1;
-	uint8_t recbqen:1;
-	uint8_t unused:4;
+    uint8_t eq7banden : 1;
+    uint8_t eq5banden : 1;
+    uint8_t eq3banden : 1;
+    uint8_t recbqen : 1;
+    uint8_t unused : 4;
 
-}max98090_reg_dsp_biquadfilter_enable_t;
+} max98090_reg_dsp_biquadfilter_enable_t;
 
 // Parametric Equalizer Playback Level Configuration Register
 // Check MAX98090 datasheet Table 51 for available configurations
-#define MAX98090_REG_EQ_PLAYBACK_LEVEL_CONF	0x28
+#define MAX98090_REG_EQ_PLAYBACK_LEVEL_CONF 0x28
 typedef struct
 {
-	uint8_t dveq:4;
-	uint8_t eqclp:1;
-	uint8_t unused:3;
+    uint8_t dveq : 4;
+    uint8_t eqclp : 1;
+    uint8_t unused : 3;
 
-}max98090_reg_eqplayback_level_conf_t;
+} max98090_reg_eqplayback_level_conf_t;
 
 // Playback DSP Filter Configuration Register
 // Check MAX98090 datasheet Table 57 for available configurations
-#define MAX98090_REG_PLAYBACK_DSP_FILTER_CONF	0x26
+#define MAX98090_REG_PLAYBACK_DSP_FILTER_CONF 0x26
 typedef struct
 {
-	uint8_t unused:4;
-	uint8_t dhf:1;
-	uint8_t dhpf:1;
-	uint8_t ahpf:1;
-	uint8_t mode:1;
+    uint8_t unused : 4;
+    uint8_t dhf : 1;
+    uint8_t dhpf : 1;
+    uint8_t ahpf : 1;
+    uint8_t mode : 1;
 
-}max98090_reg_playback_dspfilter_conf_t;
+} max98090_reg_playback_dspfilter_conf_t;
 
 // Master Clock Quick Setup Register
 // Check MAX98090 datasheet Table 36 for available configurations
-#define MAX98090_REG_MASTER_CLOCK_QUICK_SETUP	0x04
+#define MAX98090_REG_MASTER_CLOCK_QUICK_SETUP 0x04
 typedef struct
 {
-	uint8_t FS256:1;
-	uint8_t unused:1;
-	uint8_t M11P2896:1;
-	uint8_t M12:1;
-	uint8_t M12P288:1;
-	uint8_t M13:1;
-	uint8_t M19P2:1;
-	uint8_t M26:1;
+    uint8_t FS256 : 1;
+    uint8_t unused : 1;
+    uint8_t M11P2896 : 1;
+    uint8_t M12 : 1;
+    uint8_t M12P288 : 1;
+    uint8_t M13 : 1;
+    uint8_t M19P2 : 1;
+    uint8_t M26 : 1;
 
-}max98090_reg_masterclock_quick_setup_t;
+} max98090_reg_masterclock_quick_setup_t;
 
 // Sample Rate Quick Setup Register
 // Check MAX98090 datasheet Table 37 for available configurations
-#define MAX98090_REG_MASTER_SAMPLE_RATE_QUICK_SETUP	0x05
+#define MAX98090_REG_MASTER_SAMPLE_RATE_QUICK_SETUP 0x05
 typedef struct
 {
-	uint8_t SR_8K:1;
-	uint8_t SR_16K:1;
-	uint8_t SR_44K1:1;
-	uint8_t SR_48K:1;
-	uint8_t SR_32K:1;
-	uint8_t SR_96K:1;
-	uint8_t unused:2;
+    uint8_t SR_8K : 1;
+    uint8_t SR_16K : 1;
+    uint8_t SR_44K1 : 1;
+    uint8_t SR_48K : 1;
+    uint8_t SR_32K : 1;
+    uint8_t SR_96K : 1;
+    uint8_t unused : 2;
 
-}max98090_reg_master_samplerate_quick_setup_t;
+} max98090_reg_master_samplerate_quick_setup_t;
 
 // Digital Audio Interface (DAI) Quick Setup Register
 // Check MAX98090 datasheet Table 79 for available configurations
-#define MAX98090_REG_DAI_QUICK_SETUP	0x06
+#define MAX98090_REG_DAI_QUICK_SETUP 0x06
 typedef struct
 {
-	uint8_t i2ss:1;
-	uint8_t i2sm:1;
-	uint8_t ljs:1;
-	uint8_t ljm:1;
-	uint8_t rjs:1;
-	uint8_t rjm:1;
-	uint8_t unused:2;
+    uint8_t i2ss : 1;
+    uint8_t i2sm : 1;
+    uint8_t ljs : 1;
+    uint8_t ljm : 1;
+    uint8_t rjs : 1;
+    uint8_t rjm : 1;
+    uint8_t unused : 2;
 
-}max98090_reg_dai_quick_setup_t;
+} max98090_reg_dai_quick_setup_t;
 
 // Playback Path Quick Setup Register
 // Check MAX98090 datasheet Table 80 for available configurations
-#define MAX98090_REG_PLAYBACK_QUICK_SETUP	0x07
+#define MAX98090_REG_PLAYBACK_QUICK_SETUP 0x07
 typedef struct
 {
-	uint8_t unused:4;
-	uint8_t dig2lout:1;
-	uint8_t dig2spk:1;
-	uint8_t dig2ear:1;
-	uint8_t dig2hp:1;
-
-}max98090_reg_playback_quick_setup_t;
+    uint8_t unused : 4;
+    uint8_t dig2lout : 1;
+    uint8_t dig2spk : 1;
+    uint8_t dig2ear : 1;
+    uint8_t dig2hp : 1;
 
+} max98090_reg_playback_quick_setup_t;
 
 // Analog Microphone/Direct Input to Record Path Quick Setup Register
 // Check MAX98090 datasheet Table 81 for available configurations
-#define MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK	0x08
+#define MAX98090_REG_ANALOG_MIC_TO_RECORD_QUICK 0x08
 typedef struct
 {
-	uint8_t unused:1;
-	uint8_t in56_dadc:1;
-	uint8_t in34_dadc:1;
-	uint8_t in12_dadc:1;
-	uint8_t unused2:2;
-	uint8_t in34mic2:1;
-	uint8_t in12mic1:1;
+    uint8_t unused : 1;
+    uint8_t in56_dadc : 1;
+    uint8_t in34_dadc : 1;
+    uint8_t in12_dadc : 1;
+    uint8_t unused2 : 2;
+    uint8_t in34mic2 : 1;
+    uint8_t in12mic1 : 1;
 
-}max98090_reg_analog_to_record_quick_t;
+} max98090_reg_analog_to_record_quick_t;
 
 // Line Input to Record Path Quick Setup Register
 // Check MAX98090 datasheet Table 82 for available configurations
-#define MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK	0x09
+#define MAX98090_REG_LINE_INPUT_TO_RECORD_QUICK 0x09
 typedef struct
 {
-	uint8_t unused:3;
-	uint8_t in65db:1;
-	uint8_t in34dan:1;
-	uint8_t in56sab:1;
-	uint8_t in34sab:1;
-	uint8_t in12sab:1;
+    uint8_t unused : 3;
+    uint8_t in65db : 1;
+    uint8_t in34dan : 1;
+    uint8_t in56sab : 1;
+    uint8_t in34sab : 1;
+    uint8_t in12sab : 1;
 
-}max98090_reg_input_to_record_quick_t;
+} max98090_reg_input_to_record_quick_t;
 
 // Left Headphone Amplifier Volume Control Register
 // Check MAX98090 datasheet Table 72 for available configurations
-#define MAX98090_REG_LHP_VOL_CTRL	0x2C
+#define MAX98090_REG_LHP_VOL_CTRL 0x2C
 typedef struct
 {
-	uint8_t hpvoll:6;
-	uint8_t unused:1;
-	uint8_t hplm:1;
+    uint8_t hpvoll : 6;
+    uint8_t unused : 1;
+    uint8_t hplm : 1;
 
-}max98090_reg_lhp_vol_ctrl_t;
+} max98090_reg_lhp_vol_ctrl_t;
 
 // Right Headphone Amplifier Volume Control Register
 // Check MAX98090 datasheet Table 73 for available configurations
-#define MAX98090_REG_RHP_VOL_CTRL	0x2D
+#define MAX98090_REG_RHP_VOL_CTRL 0x2D
 typedef struct
 {
-	uint8_t hpvolr:6;
-	uint8_t unused:1;
-	uint8_t hprm:1;
+    uint8_t hpvolr : 6;
+    uint8_t unused : 1;
+    uint8_t hprm : 1;
 
-}max98090_reg_rhp_vol_ctrl_t;
+} max98090_reg_rhp_vol_ctrl_t;
 
 // Left Speaker Amplifier Volume Control Register
 // Check MAX98090 datasheet Table 67 for available configurations
-#define MAX98090_REG_LSPK_VOL_CTRL	0x31
+#define MAX98090_REG_LSPK_VOL_CTRL 0x31
 typedef struct
 {
-	uint8_t spvoll:6;
-	uint8_t unused:1;
-	uint8_t splm:1;
+    uint8_t spvoll : 6;
+    uint8_t unused : 1;
+    uint8_t splm : 1;
 
-}max98090_reg_lspk_vol_ctrl_t;
+} max98090_reg_lspk_vol_ctrl_t;
 
 // Right Speaker Amplifier Volume Control Register
 // Check MAX98090 datasheet Table 68 for available configurations
-#define MAX98090_REG_RSPK_VOL_CTRL	0x32
+#define MAX98090_REG_RSPK_VOL_CTRL 0x32
 typedef struct
 {
-	uint8_t spvolr:6;
-	uint8_t unused:1;
-	uint8_t sprm:1;
+    uint8_t spvolr : 6;
+    uint8_t unused : 1;
+    uint8_t sprm : 1;
 
-}max98090_reg_rspk_vol_ctrl_t;
+} max98090_reg_rspk_vol_ctrl_t;
 
 // Receiver and Left Line Output Volume Control Register
 // Check MAX98090 datasheet Table 60 for available configurations
-#define MAX98090_REG_RECV_VOL_CTRL	0x39
+#define MAX98090_REG_RECV_VOL_CTRL 0x39
 typedef struct
 {
-	uint8_t rcvlvol:6;
-	uint8_t unused:1;
-	uint8_t rcvlm:1;
+    uint8_t rcvlvol : 6;
+    uint8_t unused : 1;
+    uint8_t rcvlm : 1;
 
-}max98090_reg_recv_vol_ctrl_t;
+} max98090_reg_recv_vol_ctrl_t;
 
 // Bias Control Register
 // Check MAX98090 datasheet Table 3 for available configurations
-#define MAX98090_REG_BIAS_CTRL	0x42
+#define MAX98090_REG_BIAS_CTRL 0x42
 typedef struct
 {
-	uint8_t biasmode:1;
-	uint8_t unused:7;
+    uint8_t biasmode : 1;
+    uint8_t unused : 7;
 
-}max98090_reg_bias_mode_t;
+} max98090_reg_bias_mode_t;
 
 // DAC and Headphone Performance Mode Control Register
 // Check MAX98090 datasheet Table 4 for available configurations
-#define MAX98090_REG_DACHP_PERF_MODE	0x43
+#define MAX98090_REG_DACHP_PERF_MODE 0x43
 typedef struct
 {
-	uint8_t dachp:1;
-	uint8_t perfmode:1;
-	uint8_t unused:6;
+    uint8_t dachp : 1;
+    uint8_t perfmode : 1;
+    uint8_t unused : 6;
 
-}max98090_reg_dachp_perfmode_t;
+} max98090_reg_dachp_perfmode_t;
 
 // ADC Performance Mode Control Register
 // Check MAX98090 datasheet Table 5 for available configurations
-#define MAX98090_REG_ADC_PERF_MODE	0x44
+#define MAX98090_REG_ADC_PERF_MODE 0x44
 typedef struct
 {
-	uint8_t adchp:1;
-	uint8_t adcdither:1;
-	uint8_t osr128:1;
-	uint8_t unused:5;
+    uint8_t adchp : 1;
+    uint8_t adcdither : 1;
+    uint8_t osr128 : 1;
+    uint8_t unused : 5;
 
-}max98090_reg_adcperf_mode_t;
+} max98090_reg_adcperf_mode_t;
 
-
-#define MAX98090_I2C_ADDR	0x10
+#define MAX98090_I2C_ADDR 0x10
 
 #endif /* BSP_AUDIOCODEC_MAX98090_H_ */
diff --git a/module-bsp/board/rt1051/bsp/audio/qfilter.c b/module-bsp/board/rt1051/bsp/audio/qfilter.c
index cbef4805d..873decf38 100644
--- a/module-bsp/board/rt1051/bsp/audio/qfilter.c
+++ b/module-bsp/board/rt1051/bsp/audio/qfilter.c
@@ -3,77 +3,80 @@
 #include <stdint.h>
 #include <math.h>
 
-
-int qfilter_CalculateCoeffs(qfilter_t filter,float frequency,uint32_t samplerate,float Q,float gain,qfilter_coefficients_t* const filter_coeff)
+int qfilter_CalculateCoeffs(qfilter_t filter,
+                            float frequency,
+                            uint32_t samplerate,
+                            float Q,
+                            float gain,
+                            qfilter_coefficients_t *const filter_coeff)
 {
-	  float a0 = 0;
-	  float omega = 2 * M_PI * frequency / samplerate;
-	  float sn = sin(omega);
-	  float cs = cos(omega);
-	  float alpha = sn / (2 * Q);
-	  float gain_abs = pow(10, gain / 40);
+    float a0       = 0;
+    float omega    = 2 * M_PI * frequency / samplerate;
+    float sn       = sin(omega);
+    float cs       = cos(omega);
+    float alpha    = sn / (2 * Q);
+    float gain_abs = pow(10, gain / 40);
 
-	  switch(filter)
-	  {
-		case FilterBandPass:
-			filter_coeff->b0 = alpha;
-			filter_coeff->b1 = 0;
-			filter_coeff->b2 = -alpha;
-			filter_coeff->a1 = -2 * cs;
-			filter_coeff->a2 = 1 - alpha;
-			a0 = 1 + alpha;
-			break;
+    switch (filter) {
+    case FilterBandPass:
+        filter_coeff->b0 = alpha;
+        filter_coeff->b1 = 0;
+        filter_coeff->b2 = -alpha;
+        filter_coeff->a1 = -2 * cs;
+        filter_coeff->a2 = 1 - alpha;
+        a0               = 1 + alpha;
+        break;
 
-		case FilterHighPass:
-			filter_coeff->b0 = (1 + cs) / 2;
-			filter_coeff->b1 = -(1 + cs);
-			filter_coeff->b2 = (1 + cs) / 2;
-			filter_coeff->a1 = -2 * cs;
-			filter_coeff->a2 = 1 - alpha;
-			a0 = 1 + alpha;
-			break;
+    case FilterHighPass:
+        filter_coeff->b0 = (1 + cs) / 2;
+        filter_coeff->b1 = -(1 + cs);
+        filter_coeff->b2 = (1 + cs) / 2;
+        filter_coeff->a1 = -2 * cs;
+        filter_coeff->a2 = 1 - alpha;
+        a0               = 1 + alpha;
+        break;
 
-		case FilterLowPass:
-			filter_coeff->b0 = (1 - cs) / 2;
-			filter_coeff->b1 = 1 - cs;
-			filter_coeff->b2 = (1 - cs) / 2;
-			filter_coeff->a1 = -2 * cs;
-			filter_coeff->a2 = 1 - alpha;
-			a0 = 1 + alpha;
-			break;
-		case FilterFlat:
-			filter_coeff->b0 = 0.0;
-			filter_coeff->b1 = 0.0;
-			filter_coeff->b2 = 1;
-			filter_coeff->a1 = 0.0;
-			filter_coeff->a2 = 0.0;
-			a0 = 1;
-			break;
-		case FilterNotch:
-			filter_coeff->b0 = 1;
-			filter_coeff->b1 = -2 * cs;
-			filter_coeff->b2 = 1;			
-			filter_coeff->a1 = -2 * cs;
-			filter_coeff->a2 = 1 - alpha;
-			a0 = 1 + alpha;
+    case FilterLowPass:
+        filter_coeff->b0 = (1 - cs) / 2;
+        filter_coeff->b1 = 1 - cs;
+        filter_coeff->b2 = (1 - cs) / 2;
+        filter_coeff->a1 = -2 * cs;
+        filter_coeff->a2 = 1 - alpha;
+        a0               = 1 + alpha;
+        break;
+    case FilterFlat:
+        filter_coeff->b0 = 0.0;
+        filter_coeff->b1 = 0.0;
+        filter_coeff->b2 = 1;
+        filter_coeff->a1 = 0.0;
+        filter_coeff->a2 = 0.0;
+        a0               = 1;
+        break;
+    case FilterNotch:
+        filter_coeff->b0 = 1;
+        filter_coeff->b1 = -2 * cs;
+        filter_coeff->b2 = 1;
+        filter_coeff->a1 = -2 * cs;
+        filter_coeff->a2 = 1 - alpha;
+        a0               = 1 + alpha;
 
-		case FilterPeak:
-			filter_coeff->b0 = 1 + (alpha * gain_abs);
-			filter_coeff->b1 = -2 * cs;
-			filter_coeff->b2 = 1 - (alpha * gain_abs);			
-			filter_coeff->a1 = -2 * cs;
-			filter_coeff->a2 = 1 - (alpha / gain_abs);
-			a0 = 1 + (alpha / gain_abs);
-	  	  default:
-	  		  return 0;
-	  }
+    case FilterPeak:
+        filter_coeff->b0 = 1 + (alpha * gain_abs);
+        filter_coeff->b1 = -2 * cs;
+        filter_coeff->b2 = 1 - (alpha * gain_abs);
+        filter_coeff->a1 = -2 * cs;
+        filter_coeff->a2 = 1 - (alpha / gain_abs);
+        a0               = 1 + (alpha / gain_abs);
+    default:
+        return 0;
+    }
 
-      // prescale flter constants
-      filter_coeff->b0 /= a0;
-      filter_coeff->b1 /= a0;
-      filter_coeff->b2 /= a0;
-      filter_coeff->a1 /= a0;
-      filter_coeff->a2 /= a0;
+    // prescale flter constants
+    filter_coeff->b0 /= a0;
+    filter_coeff->b1 /= a0;
+    filter_coeff->b2 /= a0;
+    filter_coeff->a1 /= a0;
+    filter_coeff->a2 /= a0;
 
-      return 1;
+    return 1;
 }
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/bsp/audio/qfilter.h b/module-bsp/board/rt1051/bsp/audio/qfilter.h
index 74f44ff95..5a27294c3 100644
--- a/module-bsp/board/rt1051/bsp/audio/qfilter.h
+++ b/module-bsp/board/rt1051/bsp/audio/qfilter.h
@@ -1,33 +1,37 @@
 #pragma once
 
-
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include <stdint.h>
 
-typedef struct
-{
-	float b0;
-	float b1;
-	float b2;
-	float a1;
-	float a2;
-}qfilter_coefficients_t;
+    typedef struct
+    {
+        float b0;
+        float b1;
+        float b2;
+        float a1;
+        float a2;
+    } qfilter_coefficients_t;
 
-typedef enum
-{
-	FilterBandPass,
-	FilterHighPass,
-	FilterLowPass,
-	FilterFlat,
-    FilterNotch,
-    FilterPeak,
-}qfilter_t;
+    typedef enum
+    {
+        FilterBandPass,
+        FilterHighPass,
+        FilterLowPass,
+        FilterFlat,
+        FilterNotch,
+        FilterPeak,
+    } qfilter_t;
 
-
-int qfilter_CalculateCoeffs(qfilter_t filter,float frequency,uint32_t samplerate,float Q,float gain,qfilter_coefficients_t* const filter_coeff);
+    int qfilter_CalculateCoeffs(qfilter_t filter,
+                                float frequency,
+                                uint32_t samplerate,
+                                float Q,
+                                float gain,
+                                qfilter_coefficients_t *const filter_coeff);
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/bsp/battery-charger/battery_charger.cpp b/module-bsp/board/rt1051/bsp/battery-charger/battery_charger.cpp
index 10d9829e5..0801985a0 100644
--- a/module-bsp/board/rt1051/bsp/battery-charger/battery_charger.cpp
+++ b/module-bsp/board/rt1051/bsp/battery-charger/battery_charger.cpp
@@ -5,7 +5,8 @@
  *      Author: kuba
  */
 
-extern "C" {
+extern "C"
+{
 #include "FreeRTOS.h"
 #include "task.h"
 #include "queue.h"
@@ -19,25 +20,29 @@ extern "C" {
 #include "drivers/gpio/DriverGPIO.hpp"
 #include "drivers/i2c/DriverI2C.hpp"
 
-#define BSP_BATTERY_CHARGER_I2C_ADDR                        (0xD2 >> 1)
-#define BSP_FUEL_GAUGE_I2C_ADDR                             (0x6C >> 1)
-#define BSP_TOP_CONTROLLER_I2C_ADDR                         (0xCC >> 1)
+#define BSP_BATTERY_CHARGER_I2C_ADDR (0xD2 >> 1)
+#define BSP_FUEL_GAUGE_I2C_ADDR      (0x6C >> 1)
+#define BSP_TOP_CONTROLLER_I2C_ADDR  (0xCC >> 1)
 
 static const uint32_t i2cSubaddresSize = 1;
 
-const char *battery_cfgFile = "sys/batteryAdjustementConfig.cfg";
+const char *battery_cfgFile     = "sys/batteryAdjustementConfig.cfg";
 const char *battery_cfgFilePrev = "sys/batteryAdjustementConfig_old.cfg";
 
-static const uint16_t BATT_SERVICE_AVG_CURRENT_PERIOD = 0x00;    //< 0.1758 ms * 2^(2 + BATT_SERVICE_AVG_CURRENT_PERIOD)         == 700ms
-static const uint16_t BATT_SERVICE_AVG_CELL_VOLTAGE_PERIOD = 0x00;    //< 0.1758 ms * 2^(6 + BATT_SERVICE_AVG_CELL_VOLTAGE_PERIOD)    == 11.25 s
-static const uint16_t BATT_SERVICE_AVG_MIXING_PERIOD = 0x0D;    //< 0.1758 ms * 2^(5 + BATT_SERVICE_AVG_MIXING_PERIOD)          == 12.8 h
-static const uint16_t BATT_SERVICE_AVG_TEMP_PERIOD = 0x01;    //< 0.1758 ms * 2^(11 + BATT_SERVICE_AVG_TEMP_PERIOD)           == 12 min
+static const uint16_t BATT_SERVICE_AVG_CURRENT_PERIOD =
+    0x00; //< 0.1758 ms * 2^(2 + BATT_SERVICE_AVG_CURRENT_PERIOD)         == 700ms
+static const uint16_t BATT_SERVICE_AVG_CELL_VOLTAGE_PERIOD =
+    0x00; //< 0.1758 ms * 2^(6 + BATT_SERVICE_AVG_CELL_VOLTAGE_PERIOD)    == 11.25 s
+static const uint16_t BATT_SERVICE_AVG_MIXING_PERIOD =
+    0x0D; //< 0.1758 ms * 2^(5 + BATT_SERVICE_AVG_MIXING_PERIOD)          == 12.8 h
+static const uint16_t BATT_SERVICE_AVG_TEMP_PERIOD =
+    0x01; //< 0.1758 ms * 2^(11 + BATT_SERVICE_AVG_TEMP_PERIOD)           == 12 min
 static const uint16_t BATT_SERVICE_AVG_NEMPTY_PERIOD = 0x00;
 
 static const uint16_t battery_nominalCapacitymAh = 3000;
 
 static const uint8_t battery_fullyChargedPercent = 100;
-static const uint8_t battery_DischargedPercent = 15;
+static const uint8_t battery_DischargedPercent   = 15;
 
 static const uint8_t battery_maxTemperatureDegrees = 50;
 static const uint8_t battery_minTemperatureDegrees = 5;
@@ -72,11 +77,11 @@ static bsp::batteryRetval battery_setAvgCalcPeriods(void);
 
 static bsp::batteryRetval battery_setNominalBatteryCapacity(uint16_t capacity);
 
-static bsp::batteryRetval
-battery_setChargingDischargingThresholds(uint8_t chargedThresholdPercent, uint8_t dischargedThresholdPercent);
+static bsp::batteryRetval battery_setChargingDischargingThresholds(uint8_t chargedThresholdPercent,
+                                                                   uint8_t dischargedThresholdPercent);
 
-static bsp::batteryRetval
-battery_setTemperatureThresholds(uint8_t maxTemperatureDegrees, uint8_t minTemperatureDegrees);
+static bsp::batteryRetval battery_setTemperatureThresholds(uint8_t maxTemperatureDegrees,
+                                                           uint8_t minTemperatureDegrees);
 
 static bsp::batteryRetval battery_setServiceVoltageThresholds(uint16_t maxVoltage_mV, uint16_t minVoltage_mV);
 
@@ -90,53 +95,56 @@ static void s_BSP_BatteryChargerIrqPinsInit();
 
 static xQueueHandle qHandleIrq = NULL;
 
-namespace bsp {
+namespace bsp
+{
 
     // STATUS register bits
     enum B_STATUS
     {
-        Inm = (1 << 0),
-        POR = (1 << 1),
-        SPR_2 = (1 << 2),
-        BST = (1 << 3),
+        Inm    = (1 << 0),
+        POR    = (1 << 1),
+        SPR_2  = (1 << 2),
+        BST    = (1 << 3),
         Isysmx = (1 << 4),
-        SPR_5 = (1 << 5),
+        SPR_5  = (1 << 5),
         ThmHot = (1 << 6),
-        dSOCi = (1 << 7),
-        Vmn = (1 << 8),
-        Tmn = (1 << 9),
-        Smn = (1 << 10),
-        Bi = (1 << 11),
-        Vmx = (1 << 12),
-        Tmx = (1 << 13),
-        Smx = (1 << 14),
-        Br = (1 << 15),
+        dSOCi  = (1 << 7),
+        Vmn    = (1 << 8),
+        Tmn    = (1 << 9),
+        Smn    = (1 << 10),
+        Bi     = (1 << 11),
+        Vmx    = (1 << 12),
+        Tmx    = (1 << 13),
+        Smx    = (1 << 14),
+        Br     = (1 << 15),
     };
 
     /// CHG_INT registers from documentation
     enum B_CHG_INT
     {
-        BYP_I = (1 << 0),
-        RSVD = (1 << 1),
-        BATP_I = (1 << 2),
-        BAT_I = (1 << 3),
-        CHG_I = (1 << 4),
-        WCIN_I = (1 << 5),
+        BYP_I   = (1 << 0),
+        RSVD    = (1 << 1),
+        BATP_I  = (1 << 2),
+        BAT_I   = (1 << 3),
+        CHG_I   = (1 << 4),
+        WCIN_I  = (1 << 5),
         CHGIN_I = (1 << 6),
-        AICL_I = (1 << 7),
+        AICL_I  = (1 << 7),
     };
 
     uint16_t battery_get_STATUS();
     uint16_t battery_get_CHG_INT_OK();
 
-    int battery_Init(xQueueHandle qHandle) {
-        i2c = DriverI2C::Create(static_cast<I2CInstances >(BoardDefinitions::BATTERY_CHARGER_I2C),
-                                                 DriverI2CParams{.baudrate=static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_I2C_BAUDRATE)});
+    int battery_Init(xQueueHandle qHandle)
+    {
+        i2c = DriverI2C::Create(
+            static_cast<I2CInstances>(BoardDefinitions::BATTERY_CHARGER_I2C),
+            DriverI2CParams{.baudrate = static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_I2C_BAUDRATE)});
 
         qHandleIrq = qHandle;
 
-        //check Power-On reset bit
-        uint16_t status = 0;
+        // check Power-On reset bit
+        uint16_t status        = 0;
         const uint16_t porMask = 0x0002;
         battery_fuelGaugeRead(bsp::batteryChargerRegisters::STATUS_REG, &status);
 
@@ -167,12 +175,13 @@ namespace bsp {
         return 0;
     }
 
-    void battery_Deinit(void) {
+    void battery_Deinit(void)
+    {
         battery_storeConfiguration();
 
-        gpio->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_INTB_PIN));
-        gpio->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN));
-        gpio->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_WCINOKB));
+        gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INTB_PIN));
+        gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN));
+        gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_WCINOKB));
 
         qHandleIrq = NULL;
 
@@ -180,31 +189,28 @@ namespace bsp {
         gpio.reset();
     }
 
-
-    void battery_getBatteryLevel(uint8_t &levelPercent) {
+    void battery_getBatteryLevel(uint8_t &levelPercent)
+    {
         uint16_t val = 0;
-        if (battery_fuelGaugeRead(bsp::batteryChargerRegisters::RepSOC_REG, &val) != kStatus_Success)
-        {
+        if (battery_fuelGaugeRead(bsp::batteryChargerRegisters::RepSOC_REG, &val) != kStatus_Success) {
             LOG_ERROR("failed to get battery percent");
         }
-        levelPercent = (val & 0xff00) >> 8;
+        levelPercent                   = (val & 0xff00) >> 8;
         Store::Battery::modify().level = levelPercent;
     }
 
-    void battery_getChargeStatus(bool &status) {
+    void battery_getChargeStatus(bool &status)
+    {
         uint8_t val = 0;
         // read clears state
-        if (battery_chargerRead(bsp::batteryChargerRegisters::CHG_INT_OK, &val) != kStatus_Success)
-        {
+        if (battery_chargerRead(bsp::batteryChargerRegisters::CHG_INT_OK, &val) != kStatus_Success) {
             LOG_ERROR("failed to read charge status");
         }
         status = val & B_CHG_INT::CHGIN_I;
-        if (status)
-        {
+        if (status) {
             Store::Battery::modify().state = Store::Battery::State::Charging;
         }
-        else
-        {
+        else {
             Store::Battery::modify().state = Store::Battery::State::Discharging;
         }
     }
@@ -216,117 +222,134 @@ namespace bsp {
         return status;
     }
 
-    void battery_ClearAllIRQs(void) {
+    void battery_ClearAllIRQs(void)
+    {
         uint8_t val = 0;
         battery_chargerRead(bsp::batteryChargerRegisters::CHG_INT_REG, &val);
         if (val != 0) {
-            //write zero to clear irq source
+            // write zero to clear irq source
             battery_chargerWrite(bsp::batteryChargerRegisters::CHG_INT_REG, 0);
         }
 
         uint16_t status = battery_get_STATUS();
         if (status != 0) {
-            //write zero to clear irq source
+            // write zero to clear irq source
             battery_fuelGaugeWrite(bsp::batteryChargerRegisters::STATUS_REG, 0);
         }
     }
 
-    void battery_clearFuelGuageIRQ(void) {
-        //write zero to clear interrupt source
+    void battery_clearFuelGuageIRQ(void)
+    {
+        // write zero to clear interrupt source
         battery_fuelGaugeWrite(bsp::batteryChargerRegisters::STATUS_REG, 0x0000);
     }
-}
+} // namespace bsp
 
-static int battery_fuelGaugeWrite(bsp::batteryChargerRegisters registerAddress, uint16_t value) {
-    I2CAddress addr{.deviceAddress=BSP_FUEL_GAUGE_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+static int battery_fuelGaugeWrite(bsp::batteryChargerRegisters registerAddress, uint16_t value)
+{
+    I2CAddress addr{.deviceAddress  = BSP_FUEL_GAUGE_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Write(addr, reinterpret_cast<uint8_t *>(&value), sizeof(uint16_t));
 
-    if( ret != sizeof(uint16_t)){
+    if (ret != sizeof(uint16_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
 }
 
-static int battery_fuelGaugeRead(bsp::batteryChargerRegisters registerAddress, uint16_t *value) {
+static int battery_fuelGaugeRead(bsp::batteryChargerRegisters registerAddress, uint16_t *value)
+{
     if (value == NULL) {
         return -1;
     }
 
-    I2CAddress addr{.deviceAddress=BSP_FUEL_GAUGE_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+    I2CAddress addr{.deviceAddress  = BSP_FUEL_GAUGE_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Read(addr, reinterpret_cast<uint8_t *>(value), sizeof(uint16_t));
 
-    if( ret != sizeof(uint16_t)){
+    if (ret != sizeof(uint16_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
 }
 
-static int battery_chargerWrite(bsp::batteryChargerRegisters registerAddress, uint8_t value) {
+static int battery_chargerWrite(bsp::batteryChargerRegisters registerAddress, uint8_t value)
+{
 
-    I2CAddress addr{.deviceAddress=BSP_BATTERY_CHARGER_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+    I2CAddress addr{.deviceAddress  = BSP_BATTERY_CHARGER_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Write(addr, reinterpret_cast<uint8_t *>(&value), sizeof(uint8_t));
 
-    if( ret != sizeof(uint8_t)){
+    if (ret != sizeof(uint8_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
 }
 
-static int battery_chargerRead(bsp::batteryChargerRegisters registerAddress, uint8_t *value) {
+static int battery_chargerRead(bsp::batteryChargerRegisters registerAddress, uint8_t *value)
+{
     if (value == NULL) {
         return -1;
     }
 
-    I2CAddress addr{.deviceAddress=BSP_BATTERY_CHARGER_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+    I2CAddress addr{.deviceAddress  = BSP_BATTERY_CHARGER_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Read(addr, value, sizeof(uint8_t));
-    if( ret != sizeof(uint8_t)){
+    if (ret != sizeof(uint8_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
 }
 
-static int battery_chargerTopControllerWrite(bsp::batteryChargerRegisters registerAddress, uint8_t value) {
+static int battery_chargerTopControllerWrite(bsp::batteryChargerRegisters registerAddress, uint8_t value)
+{
 
-    I2CAddress addr{.deviceAddress=BSP_TOP_CONTROLLER_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+    I2CAddress addr{.deviceAddress  = BSP_TOP_CONTROLLER_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Write(addr, reinterpret_cast<uint8_t *>(&value), sizeof(uint8_t));
-    if( ret != sizeof(uint8_t)){
+    if (ret != sizeof(uint8_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
-
 }
 
-static int battery_chargerTopControllerRead(bsp::batteryChargerRegisters registerAddress, uint8_t *value) {
+static int battery_chargerTopControllerRead(bsp::batteryChargerRegisters registerAddress, uint8_t *value)
+{
     if (value == NULL) {
         return -1;
     }
 
-    I2CAddress addr{.deviceAddress=BSP_TOP_CONTROLLER_I2C_ADDR, .subAddress=static_cast<uint32_t>(registerAddress), .subAddressSize=i2cSubaddresSize};
+    I2CAddress addr{.deviceAddress  = BSP_TOP_CONTROLLER_I2C_ADDR,
+                    .subAddress     = static_cast<uint32_t>(registerAddress),
+                    .subAddressSize = i2cSubaddresSize};
     auto ret = i2c->Read(addr, reinterpret_cast<uint8_t *>(value), sizeof(uint8_t));
-    if( ret != sizeof(uint8_t)){
+    if (ret != sizeof(uint8_t)) {
         return kStatus_Fail;
     }
-    else{
+    else {
         return kStatus_Success;
     }
-
 }
 
-
-static bsp::batteryRetval battery_loadConfiguration(void) {
+static bsp::batteryRetval battery_loadConfiguration(void)
+{
     vfs::FILE *fd = NULL;
 
-
     fd = vfs.fopen(battery_cfgFile, "r");
     if (fd == NULL) {
         LOG_WARN("Configuration file [%s] not found. Searching for file [%s]", battery_cfgFile, battery_cfgFilePrev);
@@ -337,7 +360,8 @@ static bsp::batteryRetval battery_loadConfiguration(void) {
         }
     }
 
-    uint16_t regValue = 0;;
+    uint16_t regValue = 0;
+    ;
     for (uint8_t i = 0; i < 0xff; ++i) {
         if (vfs.fread(&regValue, sizeof(regValue), 1, fd) != sizeof(regValue)) {
             LOG_ERROR("Reading register 0x%x failed.", i);
@@ -355,9 +379,10 @@ static bsp::batteryRetval battery_loadConfiguration(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_storeConfiguration(void) {
-    //TODO:M.P procedure below seems to crash system, it should be fixed.
-    if(ff_rename(battery_cfgFile, battery_cfgFilePrev, false) != 0){
+static bsp::batteryRetval battery_storeConfiguration(void)
+{
+    // TODO:M.P procedure below seems to crash system, it should be fixed.
+    if (ff_rename(battery_cfgFile, battery_cfgFilePrev, false) != 0) {
         LOG_ERROR("Could not move configuration file");
         return bsp::batteryRetval::battery_ChargerError;
     }
@@ -388,7 +413,8 @@ static bsp::batteryRetval battery_storeConfiguration(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_setAvgCalcPeriods(void) {
+static bsp::batteryRetval battery_setAvgCalcPeriods(void)
+{
     uint16_t regVal = 0;
     regVal |= (BATT_SERVICE_AVG_CURRENT_PERIOD << 0);
     regVal |= (BATT_SERVICE_AVG_CELL_VOLTAGE_PERIOD << 4);
@@ -403,7 +429,8 @@ static bsp::batteryRetval battery_setAvgCalcPeriods(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_setNominalBatteryCapacity(uint16_t capacity) {
+static bsp::batteryRetval battery_setNominalBatteryCapacity(uint16_t capacity)
+{
     uint16_t regVal = capacity * 2;
 
     if (battery_fuelGaugeWrite(bsp::batteryChargerRegisters::DesignCap_REG, regVal) != kStatus_Success) {
@@ -413,8 +440,9 @@ static bsp::batteryRetval battery_setNominalBatteryCapacity(uint16_t capacity) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval
-battery_setChargingDischargingThresholds(uint8_t chargedThresholdPercent, uint8_t dischargedThresholdPercent) {
+static bsp::batteryRetval battery_setChargingDischargingThresholds(uint8_t chargedThresholdPercent,
+                                                                   uint8_t dischargedThresholdPercent)
+{
     uint16_t regVal = (chargedThresholdPercent << 8) | dischargedThresholdPercent;
 
     if (battery_fuelGaugeWrite(bsp::batteryChargerRegisters::SALRT_Th_REG, regVal) != kStatus_Success) {
@@ -424,8 +452,8 @@ battery_setChargingDischargingThresholds(uint8_t chargedThresholdPercent, uint8_
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval
-battery_setTemperatureThresholds(uint8_t maxTemperatureDegrees, uint8_t minTemperatureDegrees) {
+static bsp::batteryRetval battery_setTemperatureThresholds(uint8_t maxTemperatureDegrees, uint8_t minTemperatureDegrees)
+{
     uint16_t regVal = (maxTemperatureDegrees << 8) | minTemperatureDegrees;
 
     if (battery_fuelGaugeWrite(bsp::batteryChargerRegisters::TALRT_Th_REG, regVal) != kStatus_Success) {
@@ -435,10 +463,10 @@ battery_setTemperatureThresholds(uint8_t maxTemperatureDegrees, uint8_t minTempe
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_setServiceVoltageThresholds(uint16_t maxVoltage_mV, uint16_t minVoltage_mV) {
+static bsp::batteryRetval battery_setServiceVoltageThresholds(uint16_t maxVoltage_mV, uint16_t minVoltage_mV)
+{
     uint16_t regVal = ((maxVoltage_mV / 20) << 8) | (minVoltage_mV / 20);
 
-
     if (battery_fuelGaugeWrite(bsp::batteryChargerRegisters::VALRT_Th_REG, regVal) != kStatus_Success) {
 
         LOG_ERROR("battery_setServiceVoltageThresholds failed.");
@@ -447,7 +475,8 @@ static bsp::batteryRetval battery_setServiceVoltageThresholds(uint16_t maxVoltag
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_enableFuelGuageIRQs(void) {
+static bsp::batteryRetval battery_enableFuelGuageIRQs(void)
+{
     uint16_t regVal = 0;
     // set dSOCen bit
     regVal |= (1 << 7);
@@ -459,7 +488,8 @@ static bsp::batteryRetval battery_enableFuelGuageIRQs(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_disableAlerts(void) {
+static bsp::batteryRetval battery_disableAlerts(void)
+{
     uint16_t regVal = 0;
 
     if (battery_fuelGaugeWrite(bsp::batteryChargerRegisters::CONFIG_REG, regVal) != kStatus_Success) {
@@ -470,7 +500,8 @@ static bsp::batteryRetval battery_disableAlerts(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-static bsp::batteryRetval battery_enableTopIRQs(void) {
+static bsp::batteryRetval battery_enableTopIRQs(void)
+{
     uint8_t val = 0xf8;
 
     if (battery_chargerTopControllerWrite(bsp::batteryChargerRegisters::TOP_CONTROLL_IRQ_MASK_REG, val) !=
@@ -482,22 +513,23 @@ static bsp::batteryRetval battery_enableTopIRQs(void) {
     return bsp::batteryRetval::battery_OK;
 }
 
-BaseType_t BSP_BatteryChargerINOKB_IRQHandler() {
+BaseType_t BSP_BatteryChargerINOKB_IRQHandler()
+{
     BaseType_t xHigherPriorityTaskWoken = pdFALSE;
     if (qHandleIrq != NULL) {
         uint8_t val = static_cast<uint8_t>(bsp::batteryIRQSource::INOKB);
         xQueueSendFromISR(qHandleIrq, &val, &xHigherPriorityTaskWoken);
     }
     return xHigherPriorityTaskWoken;
-
-
 }
 
-BaseType_t BSP_BatteryChargerWCINOKB_IRQHandler() {
+BaseType_t BSP_BatteryChargerWCINOKB_IRQHandler()
+{
     return 0;
 }
 
-BaseType_t BSP_BatteryChargerINTB_IRQHandler() {
+BaseType_t BSP_BatteryChargerINTB_IRQHandler()
+{
     BaseType_t xHigherPriorityTaskWoken = pdFALSE;
     if (qHandleIrq != NULL) {
         uint8_t val = static_cast<uint8_t>(bsp::batteryIRQSource::INTB);
@@ -506,32 +538,27 @@ BaseType_t BSP_BatteryChargerINTB_IRQHandler() {
     return xHigherPriorityTaskWoken;
 }
 
-static void s_BSP_BatteryChargerIrqPinsInit() {
+static void s_BSP_BatteryChargerIrqPinsInit()
+{
 
-    gpio = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::BATTERY_CHARGER_GPIO),
-                                               DriverGPIOParams{});
+    gpio = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::BATTERY_CHARGER_GPIO), DriverGPIOParams{});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-            .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-            .defLogic = 0,
-            .pin = static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN)});
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+                                      .defLogic = 0,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN)});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-            .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-            .defLogic = 0,
-            .pin = static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_WCINOKB)});
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+                                      .defLogic = 0,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_WCINOKB)});
 
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::IntFallingEdge,
+                                      .defLogic = 0,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INTB_PIN)});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-            .irqMode=DriverGPIOPinParams::InterruptMode::IntFallingEdge,
-            .defLogic = 0,
-            .pin = static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_INTB_PIN)});
-
-    gpio->EnableInterrupt(1<< static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_WCINOKB));
-    gpio->EnableInterrupt(1<< static_cast<uint32_t >(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN));
+    gpio->EnableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_WCINOKB));
+    gpio->EnableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INOKB_PIN));
     gpio->EnableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::BATTERY_CHARGER_INTB_PIN));
 }
-
-
-
-
diff --git a/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.cpp b/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.cpp
index db8215309..3310db0ce 100644
--- a/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.cpp
+++ b/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "rt1051_cellular.hpp"
 #include "FreeRTOS.h"
 #include "task.h"
@@ -20,17 +19,17 @@
 #include <common_data/EventStore.hpp>
 #include <map>
 
-namespace bsp::cellular {
-void readline_timeout()
+namespace bsp::cellular
 {
-    BaseType_t hp = pdFALSE;
-    if (bsp::RT1051Cellular::blockedTaskHandle)
+    void readline_timeout()
     {
-        vTaskNotifyGiveFromISR(bsp::RT1051Cellular::blockedTaskHandle, &hp);
+        BaseType_t hp = pdFALSE;
+        if (bsp::RT1051Cellular::blockedTaskHandle) {
+            vTaskNotifyGiveFromISR(bsp::RT1051Cellular::blockedTaskHandle, &hp);
+        }
+        portEND_SWITCHING_ISR(hp);
     }
-    portEND_SWITCHING_ISR(hp);
-}
-};
+}; // namespace bsp::cellular
 
 extern "C"
 {
@@ -38,22 +37,21 @@ extern "C"
     {
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
-        uint32_t isrReg = LPUART_GetStatusFlags(CELLULAR_UART_BASE);
+        uint32_t isrReg               = LPUART_GetStatusFlags(CELLULAR_UART_BASE);
         static char characterReceived = 0;
 
-        if (bsp::RT1051Cellular::uartRxStreamBuffer != NULL)
-        {
-            if (isrReg & kLPUART_RxDataRegFullFlag)
-            {
+        if (bsp::RT1051Cellular::uartRxStreamBuffer != NULL) {
+            if (isrReg & kLPUART_RxDataRegFullFlag) {
                 characterReceived = LPUART_ReadByte(CELLULAR_UART_BASE);
 
-                if (characterReceived != 0)
-                {
-                    if (xStreamBufferSpacesAvailable(bsp::RT1051Cellular::uartRxStreamBuffer) < 8)
-                    {
+                if (characterReceived != 0) {
+                    if (xStreamBufferSpacesAvailable(bsp::RT1051Cellular::uartRxStreamBuffer) < 8) {
                         LOG_FATAL("...");
                     }
-                    xStreamBufferSendFromISR(bsp::RT1051Cellular::uartRxStreamBuffer, (void *)&characterReceived, 1, &xHigherPriorityTaskWoken);
+                    xStreamBufferSendFromISR(bsp::RT1051Cellular::uartRxStreamBuffer,
+                                             (void *)&characterReceived,
+                                             1,
+                                             &xHigherPriorityTaskWoken);
                     bsp::pit::start(25 * 1000, bsp::cellular::readline_timeout);
                 }
             }
@@ -64,20 +62,24 @@ extern "C"
     }
 };
 
-namespace bsp {
+namespace bsp
+{
 
     using namespace drivers;
 
-    lpuart_edma_handle_t            RT1051Cellular::uartDmaHandle = {};
-    TaskHandle_t                    RT1051Cellular::blockedTaskHandle = nullptr;
-    StreamBufferHandle_t            RT1051Cellular::uartRxStreamBuffer = nullptr;
+    lpuart_edma_handle_t RT1051Cellular::uartDmaHandle      = {};
+    TaskHandle_t RT1051Cellular::blockedTaskHandle          = nullptr;
+    StreamBufferHandle_t RT1051Cellular::uartRxStreamBuffer = nullptr;
 
-    RT1051Cellular::RT1051Cellular() {
+    RT1051Cellular::RT1051Cellular()
+    {
         bsp::pit::init(nullptr);
 
         MSPInit();
         /// to set Store::GSM sim state and to log debug
-        Store::GSM::get()->tray = GPIO_PinRead(GPIO2, BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN) == 0 ? Store::GSM::Tray::IN : Store::GSM::Tray::OUT;
+        Store::GSM::get()->tray = GPIO_PinRead(GPIO2, BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN) == 0
+                                      ? Store::GSM::Tray::IN
+                                      : Store::GSM::Tray::OUT;
         DMAInit();
 
         uartRxStreamBuffer = xStreamBufferCreate(rxStreamBufferLength, rxStreamBufferNotifyWatermark);
@@ -90,16 +92,17 @@ namespace bsp {
 
         LPUART_GetDefaultConfig(&s_cellularConfig);
 
-        s_cellularConfig.baudRate_Bps = baudrate;
+        s_cellularConfig.baudRate_Bps  = baudrate;
         s_cellularConfig.dataBitsCount = kLPUART_EightDataBits;
-        s_cellularConfig.parityMode = kLPUART_ParityDisabled;
-        s_cellularConfig.isMsb = false;
-        s_cellularConfig.rxIdleType = kLPUART_IdleTypeStartBit;
-        s_cellularConfig.rxIdleConfig = kLPUART_IdleCharacter1;
-        s_cellularConfig.enableTx = false;
-        s_cellularConfig.enableRx = false;
+        s_cellularConfig.parityMode    = kLPUART_ParityDisabled;
+        s_cellularConfig.isMsb         = false;
+        s_cellularConfig.rxIdleType    = kLPUART_IdleTypeStartBit;
+        s_cellularConfig.rxIdleConfig  = kLPUART_IdleCharacter1;
+        s_cellularConfig.enableTx      = false;
+        s_cellularConfig.enableRx      = false;
 
-        if (LPUART_Init(CELLULAR_UART_BASE, &s_cellularConfig, GetPerphSourceClock(PerphClock_LPUART)) != kStatus_Success) {
+        if (LPUART_Init(CELLULAR_UART_BASE, &s_cellularConfig, GetPerphSourceClock(PerphClock_LPUART)) !=
+            kStatus_Success) {
             LOG_ERROR("Could not initialize the uart!");
             return;
         }
@@ -113,14 +116,15 @@ namespace bsp {
         isInitialized = true;
     }
 
-    void RT1051Cellular::SetSpeed(uint32_t portSpeed) {
+    void RT1051Cellular::SetSpeed(uint32_t portSpeed)
+    {
         LOG_DEBUG("[RT1051] Setting %i baudrate", portSpeed);
 
         LPUART_SetBaudRate(CELLULAR_UART_BASE, portSpeed, GetPerphSourceClock(PerphClock_LPUART));
     }
 
-
-    RT1051Cellular::~RT1051Cellular() {
+    RT1051Cellular::~RT1051Cellular()
+    {
 
         if (uartRxStreamBuffer) {
             vStreamBufferDelete(uartRxStreamBuffer);
@@ -141,10 +145,10 @@ namespace bsp {
 
         memset(&uartDmaHandle, 0, sizeof uartDmaHandle);
         blockedTaskHandle = nullptr;
-
     }
 
-    void RT1051Cellular::PowerUp() {
+    void RT1051Cellular::PowerUp()
+    {
         const TickType_t POWER_UP_DELAY_MS = 500;
 
         DisableRx();
@@ -153,57 +157,59 @@ namespace bsp {
         InformModemHostWakeup();
 
         TickType_t tick = xTaskGetTickCount();
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 1);
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 1);
         vTaskDelayUntil(&tick, POWER_UP_DELAY_MS);
-        //BSP_CellularSetPowerState(CellularPowerStateTurningOn);
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 0);
+        // BSP_CellularSetPowerState(CellularPowerStateTurningOn);
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 0);
 
         EnableRx();
     }
 
-    void RT1051Cellular::PowerDown() {
+    void RT1051Cellular::PowerDown()
+    {
         const uint16_t POWER_DOWN_DELAY_MS = 700;
 
         ExitSleep();
         InformModemHostWakeup();
 
         TickType_t tick = xTaskGetTickCount();
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 1);
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 1);
         vTaskDelayUntil(&tick, POWER_DOWN_DELAY_MS);
-        //BSP_CellularSetPowerState(CellularPowerStateTurningOff);
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 0);
-        //vTaskDelay(pdMS_TO_TICKS(POWER_DOWN_IN_PROGRESS_DELAY_MS));
+        // BSP_CellularSetPowerState(CellularPowerStateTurningOff);
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN), 0);
+        // vTaskDelay(pdMS_TO_TICKS(POWER_DOWN_IN_PROGRESS_DELAY_MS));
 
-/*        while (s_cellularPowerState != CellularPowerStatePoweredDown)
-        {
-            vTaskDelay(pdMS_TO_TICKS(200));
-        }*/
+        /*        while (s_cellularPowerState != CellularPowerStatePoweredDown)
+                {
+                    vTaskDelay(pdMS_TO_TICKS(200));
+                }*/
 
         DisableRx();
     }
 
-    void RT1051Cellular::Restart() {
+    void RT1051Cellular::Restart()
+    {
         const uint16_t RESET_DELAY_MS = 460;
 
         InformModemHostWakeup();
         ExitSleep();
 
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN), 1);
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN), 1);
         vTaskDelay(pdMS_TO_TICKS(RESET_DELAY_MS));
-        gpio_2->WritePin(static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN), 0);
-
+        gpio_2->WritePin(static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN), 0);
     }
 
-    ssize_t RT1051Cellular::Write(void *buf, size_t nbytes) {
+    ssize_t RT1051Cellular::Write(void *buf, size_t nbytes)
+    {
         lpuart_transfer_t sendXfer;
-        #if _RT1051_UART_DEBUG
+#if _RT1051_UART_DEBUG
         LOG_PRINTF("[TX] ");
-        uint8_t *ptr = (uint8_t*)buf;
+        uint8_t *ptr = (uint8_t *)buf;
         for (size_t i = 0; i < nbytes; i++)
             LOG_PRINTF("%02X ", (uint8_t)*ptr++);
         LOG_PRINTF("\n");
-        #endif
-        sendXfer.data = static_cast<uint8_t *>(buf);
+#endif
+        sendXfer.data     = static_cast<uint8_t *>(buf);
         sendXfer.dataSize = nbytes;
 
         EnableTx();
@@ -228,21 +234,23 @@ namespace bsp {
         return nbytes;
     }
 
-    ssize_t RT1051Cellular::Read(void *buf, size_t nbytes) {
+    ssize_t RT1051Cellular::Read(void *buf, size_t nbytes)
+    {
         ssize_t ret = xStreamBufferReceive(uartRxStreamBuffer, buf, nbytes, 0);
-        #if _RT1051_UART_DEBUG
+#if _RT1051_UART_DEBUG
         if (ret > 0) {
             LOG_PRINTF("[RX] ");
-            uint8_t *ptr = (uint8_t*)buf;
+            uint8_t *ptr = (uint8_t *)buf;
             for (size_t i = 0; i < ret; i++)
                 LOG_PRINTF("%02X ", (uint8_t)*ptr++);
             LOG_PRINTF("\n");
         }
-        #endif
+#endif
         return ret;
     }
 
-    uint32_t RT1051Cellular::Wait(uint32_t timeout) {
+    uint32_t RT1051Cellular::Wait(uint32_t timeout)
+    {
         if (blockedTaskHandle != nullptr) {
             LOG_FATAL("Wait called simultaneously from more than one thread!");
             return 0;
@@ -253,40 +261,48 @@ namespace bsp {
         }
 
         blockedTaskHandle = xTaskGetCurrentTaskHandle();
-        auto ret = ulTaskNotifyTake(pdTRUE, timeout);
+        auto ret          = ulTaskNotifyTake(pdTRUE, timeout);
         blockedTaskHandle = nullptr;
         return ret;
     }
 
-    void RT1051Cellular::InformModemHostAsleep() {
-		gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN),!CELLULAR_BSP_AP_READY_PIN_ACTIVE_STATE);
-	}
-
-	void RT1051Cellular::InformModemHostWakeup() {
-		gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN),CELLULAR_BSP_AP_READY_PIN_ACTIVE_STATE);
-	}
-
-	void RT1051Cellular::EnterSleep() {
-        gpio_3->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN),1);
-        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN),1);
+    void RT1051Cellular::InformModemHostAsleep()
+    {
+        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN),
+                         !CELLULAR_BSP_AP_READY_PIN_ACTIVE_STATE);
     }
 
-    void RT1051Cellular::ExitSleep() {
-        gpio_3->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN),0);
-        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN),0);
+    void RT1051Cellular::InformModemHostWakeup()
+    {
+        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN),
+                         CELLULAR_BSP_AP_READY_PIN_ACTIVE_STATE);
+    }
+
+    void RT1051Cellular::EnterSleep()
+    {
+        gpio_3->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN), 1);
+        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN), 1);
+    }
+
+    void RT1051Cellular::ExitSleep()
+    {
+        gpio_3->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN), 0);
+        gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN), 0);
         vTaskDelay(pdMS_TO_TICKS(15));
     }
 
-    void RT1051Cellular::MSPInit() {
+    void RT1051Cellular::MSPInit()
+    {
 
-        gpio_1 = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::CELLULAR_GPIO_1), DriverGPIOParams{});
-        gpio_2 = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::CELLULAR_GPIO_2), DriverGPIOParams{});
-        gpio_3 = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::CELLULAR_GPIO_3), DriverGPIOParams{});
+        gpio_1 = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::CELLULAR_GPIO_1), DriverGPIOParams{});
+        gpio_2 = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::CELLULAR_GPIO_2), DriverGPIOParams{});
+        gpio_3 = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::CELLULAR_GPIO_3), DriverGPIOParams{});
 
-        gpio_2->ClearPortInterrupts(1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN) |
-                                    1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN) |
-                                    1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN) |
-                                    1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN));
+        gpio_2->ClearPortInterrupts(
+            1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN) |
+            1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN) |
+            1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN) |
+            1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN));
 
         gpio_2->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN) |
                                  1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN) |
@@ -295,89 +311,95 @@ namespace bsp {
 
         // INPUTS
 
-        gpio_1->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-                .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-                .defLogic = 1,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN)});
+        gpio_1->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+                                            .defLogic = 1,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN)});
 
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-                .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-                .defLogic = 1,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN)});
+        gpio_2->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+                                            .defLogic = 1,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN)});
 
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-                .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-                .defLogic = 1,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN)});
+        gpio_2->ConfPin(DriverGPIOPinParams{
+            .dir      = DriverGPIOPinParams::Direction::Input,
+            .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+            .defLogic = 1,
+            .pin      = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN)});
 
         // OUTPUTS
 
-        gpio_1->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_1_RTS_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN)});
-
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_SIMSEL_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir = DriverGPIOPinParams::Direction::Output,
-                                            .irqMode = DriverGPIOPinParams::InterruptMode::NoIntmode,
-                                            .defLogic = 1,
-                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_PRESENCE_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN)});
-
-        gpio_2->ConfPin(DriverGPIOPinParams{.dir = DriverGPIOPinParams::Direction::Output,
-                                            .irqMode = DriverGPIOPinParams::InterruptMode::NoIntmode,
+        gpio_1->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
                                             .defLogic = 0,
-                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN)});
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_1_RTS_PIN)});
 
-        gpio_3->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN)});
+        gpio_2->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                            .defLogic = 0,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_APRDY_PIN)});
+
+        gpio_2->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                            .defLogic = 0,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_POWER_PIN)});
+
+        gpio_2->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                            .defLogic = 0,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RESET_PIN)});
+
+        gpio_2->ConfPin(
+            DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                .defLogic = 0,
+                                .pin      = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMSEL_PIN)});
+
+        gpio_2->ConfPin(
+            DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                .defLogic = 1,
+                                .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_PRESENCE_PIN)});
+
+        gpio_2->ConfPin(
+            DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                .defLogic = 0,
+                                .pin      = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_WAKEUP_PIN)});
+
+        gpio_2->ConfPin(
+            DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                .defLogic = 0,
+                                .pin      = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN)});
+
+        gpio_3->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                            .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                            .defLogic = 0,
+                                            .pin = static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_3_DTR_PIN)});
 
         GPIO_PortEnableInterrupts(BSP_CELLULAR_SIM_CARD_1_INSERTED_PORT, 1U << BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN);
     }
 
-    void RT1051Cellular::MSPDeinit() {
-        gpio_2->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN));
-        gpio_2->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN));
-        gpio_1->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN));
+    void RT1051Cellular::MSPDeinit()
+    {
+        gpio_2->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_SIMCARD_1_INSERTED_PIN));
+        gpio_2->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_2_RI_PIN));
+        gpio_1->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::CELLULAR_GPIO_1_CTS_PIN));
     }
 
-    void RT1051Cellular::DMAInit() {
+    void RT1051Cellular::DMAInit()
+    {
 
-        //TODO:M.P add PLL support
-        //pll = DriverInterface<DriverPLL>::Create(static_cast<PLLInstances >(BoardDefinitions ::AUDIO_PLL),DriverPLLParams{});
-        dmamux = DriverDMAMux::Create(static_cast<DMAMuxInstances >(BoardDefinitions::CELLULAR_DMAMUX),
-                                      DriverDMAMuxParams{});
-        dma = DriverDMA::Create(static_cast<DMAInstances >(BoardDefinitions::CELLULAR_DMA), DriverDMAParams{});
+        // TODO:M.P add PLL support
+        // pll = DriverInterface<DriverPLL>::Create(static_cast<PLLInstances >(BoardDefinitions
+        // ::AUDIO_PLL),DriverPLLParams{});
+        dmamux =
+            DriverDMAMux::Create(static_cast<DMAMuxInstances>(BoardDefinitions::CELLULAR_DMAMUX), DriverDMAMuxParams{});
+        dma = DriverDMA::Create(static_cast<DMAInstances>(BoardDefinitions::CELLULAR_DMA), DriverDMAParams{});
 
-
-        txDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL));
-        dmamux->Enable(static_cast<uint32_t >(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL),
+        txDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL));
+        dmamux->Enable(static_cast<uint32_t>(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL),
                        kDmaRequestMuxLPUART1Tx); // TODO: M.P fix BSP_CELLULAR_UART_TX_DMA_CH
 
         LPUART_TransferCreateHandleEDMA(CELLULAR_UART_BASE,
@@ -388,32 +410,42 @@ namespace bsp {
                                         NULL);
     }
 
-    void RT1051Cellular::DMADeinit() {
-        dmamux->Disable(static_cast<uint32_t >(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL));
+    void RT1051Cellular::DMADeinit()
+    {
+        dmamux->Disable(static_cast<uint32_t>(BoardDefinitions::CELLULAR_TX_DMA_CHANNEL));
     }
 
-    void RT1051Cellular::DMATxCompletedCb(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status,
-                                          void *userData) {
+    void RT1051Cellular::DMATxCompletedCb(LPUART_Type *base,
+                                          lpuart_edma_handle_t *handle,
+                                          status_t status,
+                                          void *userData)
+    {
 
         BaseType_t higherPriorTaskWoken = 0;
-        vTaskNotifyGiveFromISR((TaskHandle_t) userData, &higherPriorTaskWoken);
+        vTaskNotifyGiveFromISR((TaskHandle_t)userData, &higherPriorTaskWoken);
 
         portEND_SWITCHING_ISR(higherPriorTaskWoken);
     }
 
-    void RT1051Cellular::SetSendingAllowed(bool state) { pv_SendingAllowed = state; }
-    bool RT1051Cellular::GetSendingAllowed() { return pv_SendingAllowed; }
+    void RT1051Cellular::SetSendingAllowed(bool state)
+    {
+        pv_SendingAllowed = state;
+    }
+    bool RT1051Cellular::GetSendingAllowed()
+    {
+        return pv_SendingAllowed;
+    }
 
     void RT1051Cellular::SelectAntenna(uint8_t antenna)
     {
-        if (antenna == 0)
-        {
-            gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN), CELLULAR_BSP_ANTSEL_PIN_A_STATE);
+        if (antenna == 0) {
+            gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN),
+                             CELLULAR_BSP_ANTSEL_PIN_A_STATE);
             LOG_INFO("Selecting Antenna A");
         }
-        else if (antenna == 1)
-        {
-            gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN), CELLULAR_BSP_ANTSEL_PIN_B_STATE);
+        else if (antenna == 1) {
+            gpio_2->WritePin(magic_enum::enum_integer(BoardDefinitions::CELLULAR_GPIO_2_ANTSEL_PIN),
+                             CELLULAR_BSP_ANTSEL_PIN_B_STATE);
             LOG_INFO("Selecting Antenna B");
         }
     }
@@ -431,9 +463,10 @@ namespace bsp {
         auto trayIRQ_handler() -> BaseType_t
         {
             BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-            Store::GSM::get()->tray = GPIO_PinRead(GPIO2, BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN) == 0 ? Store::GSM::Tray::IN : Store::GSM::Tray::OUT;
-            if (qhandle)
-            {
+            Store::GSM::get()->tray             = GPIO_PinRead(GPIO2, BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN) == 0
+                                          ? Store::GSM::Tray::IN
+                                          : Store::GSM::Tray::OUT;
+            if (qhandle) {
                 int val = GPIO_PinRead(GPIO2, BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN);
                 xQueueSendFromISR(qhandle, &val, &xHigherPriorityTaskWoken);
             }
@@ -449,12 +482,10 @@ namespace bsp {
 
         void sim_sel()
         {
-            if (Store::GSM::get()->selected == Store::GSM::SIM::SIM2)
-            {
+            if (Store::GSM::get()->selected == Store::GSM::SIM::SIM2) {
                 GPIO_PinWrite(BSP_CELLULAR_SIM_CARD_PRESENCE_PORT, BSP_CELLULAR_SIMSEL_PIN, 1);
             }
-            else
-            {
+            else {
                 GPIO_PinWrite(BSP_CELLULAR_SIM_CARD_PRESENCE_PORT, BSP_CELLULAR_SIMSEL_PIN, 0);
             }
         }
diff --git a/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.hpp b/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.hpp
index 5ade6b058..c1913e708 100644
--- a/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.hpp
+++ b/module-bsp/board/rt1051/bsp/cellular/rt1051_cellular.hpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #ifndef PUREPHONE_RT1501_CELLULAR_HPP
 #define PUREPHONE_RT1501_CELLULAR_HPP
 
@@ -21,7 +20,6 @@
 #include "fsl_lpuart.h"
 #include "fsl_lpuart_edma.h"
 
-
 #include "bsp/BoardDefinitions.hpp"
 
 #include "drivers/pll/DriverPLL.hpp"
@@ -29,13 +27,15 @@
 #include "drivers/dma/DriverDMA.hpp"
 #include "drivers/gpio/DriverGPIO.hpp"
 
-namespace bsp {
+namespace bsp
+{
 
-    class RT1051Cellular : public Cellular {
-    private:
+    class RT1051Cellular : public Cellular
+    {
+      private:
         bool pv_SendingAllowed = true;
-    public:
 
+      public:
         RT1051Cellular();
 
         ~RT1051Cellular();
@@ -54,11 +54,11 @@ namespace bsp {
 
         void InformModemHostAsleep() override final;
 
-		void InformModemHostWakeup() override final;
+        void InformModemHostWakeup() override final;
 
-		void EnterSleep() override final;
+        void EnterSleep() override final;
 
-		void ExitSleep() override final;
+        void ExitSleep() override final;
 
         void SetSpeed(uint32_t portSpeed) override final;
 
@@ -79,23 +79,27 @@ namespace bsp {
 
         void DMADeinit();
 
-        inline void EnableRx() {
+        inline void EnableRx()
+        {
             LPUART_ClearStatusFlags(CELLULAR_UART_BASE, 0xFFFFFFFF);
             LPUART_EnableInterrupts(CELLULAR_UART_BASE, kLPUART_RxDataRegFullInterruptEnable);
             LPUART_EnableRx(CELLULAR_UART_BASE, true);
         }
 
-        inline void DisableRx() {
+        inline void DisableRx()
+        {
             LPUART_DisableInterrupts(CELLULAR_UART_BASE, kLPUART_RxDataRegFullInterruptEnable);
             LPUART_ClearStatusFlags(CELLULAR_UART_BASE, kLPUART_RxDataRegFullInterruptEnable);
             LPUART_EnableRx(CELLULAR_UART_BASE, false);
         }
 
-        inline void EnableTx() {
+        inline void EnableTx()
+        {
             LPUART_EnableTx(CELLULAR_UART_BASE, true);
         }
 
-        inline void DisableTx() {
+        inline void DisableTx()
+        {
             LPUART_EnableTx(CELLULAR_UART_BASE, false);
         }
 
@@ -108,8 +112,6 @@ namespace bsp {
         std::shared_ptr<drivers::DriverDMA> dma;
         std::unique_ptr<drivers::DriverDMAHandle> txDMAHandle;
 
-
-
         static lpuart_edma_handle_t uartDmaHandle;
 
         static void DMATxCompletedCb(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData);
@@ -119,15 +121,14 @@ namespace bsp {
 
       private:
         // Constants
-        const static uint32_t baudrate = 115200;
-        const static uint32_t rxStreamBufferLength = 1024;
-        const static uint32_t rxStreamBufferNotifyWatermark = 1;
+        const static uint32_t baudrate                               = 115200;
+        const static uint32_t rxStreamBufferLength                   = 1024;
+        const static uint32_t rxStreamBufferNotifyWatermark          = 1;
         const static uint32_t CELLULAR_BSP_AP_READY_PIN_ACTIVE_STATE = 1;
-        const static uint32_t CELLULAR_BSP_ANTSEL_PIN_A_STATE = 0;
-        const static uint32_t CELLULAR_BSP_ANTSEL_PIN_B_STATE = 1;
+        const static uint32_t CELLULAR_BSP_ANTSEL_PIN_A_STATE        = 0;
+        const static uint32_t CELLULAR_BSP_ANTSEL_PIN_B_STATE        = 1;
     };
 
-}
+} // namespace bsp
 
-
-#endif //PUREPHONE_RT1501_CELLULAR_HPP
+#endif // PUREPHONE_RT1501_CELLULAR_HPP
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.c b/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.c
index aa837d864..15bd0c799 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.c
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -41,7 +41,7 @@
 /*! @brief The divide value used to avoid float point calculation when calculate max speed in normal mode. */
 #define DIVIDER_IN_TRANSFER_SPEED (10U)
 
-#define keMMC_HIGH_VOLTAGE_RANGE        0xC0FF8000U  /*!< for eMMC > 2Gb sector mode   */
+#define keMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode   */
 
 /*******************************************************************************
  * Prototypes
@@ -428,8 +428,8 @@ static status_t MMC_SwitchToHS(mmc_card_t *card);
 /* Frequency unit defined in TRANSFER SPEED field in CSD */
 static const uint32_t g_transerSpeedFrequencyUnit[] = {100000U, 1000000U, 10000000U, 100000000U};
 /* The multiplying value defined in TRANSFER SPEED field in CSD */
-static const uint32_t g_transerSpeedMultiplierFactor[] = {0U,  10U, 12U, 13U, 15U, 20U, 26U, 30U,
-                                                          35U, 40U, 45U, 52U, 55U, 60U, 70U, 80U};
+static const uint32_t g_transerSpeedMultiplierFactor[] = {
+    0U, 10U, 12U, 13U, 15U, 20U, 26U, 30U, 35U, 40U, 45U, 52U, 55U, 60U, 70U, 80U};
 /* g_sdmmc statement */
 extern uint32_t g_sdmmc[SDK_SIZEALIGN(SDMMC_GLOBAL_BUFFER_SIZE, SDMMC_DATA_BUFFER_ALIGN_CACHE)];
 
@@ -470,16 +470,13 @@ static status_t MMC_ExecuteTuning(mmc_card_t *card)
 
     uint32_t blockSize = 0U;
 
-    if (card->busWidth == kMMC_DataBusWidth4bit)
-    {
+    if (card->busWidth == kMMC_DataBusWidth4bit) {
         blockSize = 64U;
     }
-    else if (card->busWidth == kMMC_DataBusWidth8bit)
-    {
+    else if (card->busWidth == kMMC_DataBusWidth8bit) {
         blockSize = 128U;
     }
-    else
-    {
+    else {
         /* do not need tuning in this situation */
         return kStatus_Success;
     }
@@ -493,42 +490,33 @@ static status_t MMC_Transfer(mmc_card_t *card, SDMMCHOST_TRANSFER *content, uint
     assert(content);
     status_t error;
 
-    do
-    {
+    do {
         error = card->host.transfer(card->host.base, content);
         if (((error == SDMMCHOST_RETUNING_REQUEST) || (error == SDMMCHOST_TUNING_ERROR)) &&
-            ((card->busTiming == kMMC_HighSpeed200Timing) || (card->busTiming == kMMC_HighSpeed400Timing)))
-        {
+            ((card->busTiming == kMMC_HighSpeed200Timing) || (card->busTiming == kMMC_HighSpeed400Timing))) {
             /* tuning error need reset tuning circuit */
-            if (error == SDMMCHOST_TUNING_ERROR)
-            {
+            if (error == SDMMCHOST_TUNING_ERROR) {
                 SDMMCHOST_RESET_TUNING(card->host.base, 100U);
             }
             /* execute re-tuning */
-            if (MMC_ExecuteTuning(card) != kStatus_Success)
-            {
+            if (MMC_ExecuteTuning(card) != kStatus_Success) {
                 error = kStatus_SDMMC_TuningFail;
                 break;
             }
-            else
-            {
+            else {
                 continue;
             }
         }
-        else if (error != kStatus_Success)
-        {
+        else if (error != kStatus_Success) {
             error = kStatus_SDMMC_TransferFailed;
         }
-        else
-        {
+        else {
         }
 
-        if (retry != 0U)
-        {
+        if (retry != 0U) {
             retry--;
         }
-        else
-        {
+        else {
             break;
         }
 
@@ -542,30 +530,26 @@ static status_t MMC_WaitWriteComplete(mmc_card_t *card)
     assert(card);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_SendStatus;
-    command.argument = card->relativeAddress << 16U;
+    command.index        = kSDMMC_SendStatus;
+    command.argument     = card->relativeAddress << 16U;
     command.responseType = kCARD_ResponseTypeR1;
 
-    do
-    {
+    do {
         content.command = &command;
-        content.data = 0U;
-        if (kStatus_Success != MMC_Transfer(card, &content, 2U))
-        {
+        content.data    = 0U;
+        if (kStatus_Success != MMC_Transfer(card, &content, 2U)) {
             return kStatus_SDMMC_TransferFailed;
         }
 
         /* check the response error */
-        if ((command.response[0U] & (kSDMMC_R1ErrorAllFlag | kSDMMC_R1SwitchErrorFlag)))
-        {
+        if ((command.response[0U] & (kSDMMC_R1ErrorAllFlag | kSDMMC_R1SwitchErrorFlag))) {
             return kStatus_SDMMC_WaitWriteCompleteFailed;
         }
 
         if ((command.response[0U] & kSDMMC_R1ReadyForDataFlag) &&
-            (SDMMC_R1_CURRENT_STATE(command.response[0U]) != kSDMMC_R1StateProgram))
-        {
+            (SDMMC_R1_CURRENT_STATE(command.response[0U]) != kSDMMC_R1StateProgram)) {
             break;
         }
     } while (true);
@@ -578,18 +562,17 @@ static status_t MMC_StopTransmission(mmc_card_t *card)
     assert(card);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_StopTransmission;
-    command.argument = 0U;
-    command.type = kCARD_CommandTypeAbort;
-    command.responseType = kCARD_ResponseTypeR1b;
+    command.index              = kSDMMC_StopTransmission;
+    command.argument           = 0U;
+    command.type               = kCARD_CommandTypeAbort;
+    command.responseType       = kCARD_ResponseTypeR1b;
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag;
 
     content.command = &command;
-    content.data = 0U;
-    if (kStatus_Success != MMC_Transfer(card, &content, 2U))
-    {
+    content.data    = 0U;
+    if (kStatus_Success != MMC_Transfer(card, &content, 2U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -601,9 +584,9 @@ static status_t MMC_SwitchVoltage(mmc_card_t *card, uint32_t *opCode)
     mmc_voltage_window_t tempVoltage = kMMC_VoltageWindowNone;
     /* Get host's voltage window. */
     if (((kSDMMCHOST_SupportV330 != SDMMCHOST_NOT_SUPPORT) || (kSDMMCHOST_SupportV300 != SDMMCHOST_NOT_SUPPORT)) &&
-        (card->ocr & MMC_OCR_V270TO360_MASK) && ((card->hostVoltageWindowVCC == kMMC_VoltageWindowNone) ||
-                                                 (card->hostVoltageWindowVCC == kMMC_VoltageWindows270to360)))
-    {
+        (card->ocr & MMC_OCR_V270TO360_MASK) &&
+        ((card->hostVoltageWindowVCC == kMMC_VoltageWindowNone) ||
+         (card->hostVoltageWindowVCC == kMMC_VoltageWindows270to360))) {
         /* Save host intended voltage range */
         tempVoltage = kMMC_VoltageWindows270to360;
         /* set the opcode */
@@ -622,8 +605,7 @@ static status_t MMC_SwitchVoltage(mmc_card_t *card, uint32_t *opCode)
 
     if ((kSDMMCHOST_SupportV180 != SDMMCHOST_NOT_SUPPORT) && (card->ocr & MMC_OCR_V170TO195_MASK) &&
         ((card->hostVoltageWindowVCC == kMMC_VoltageWindowNone) ||
-         (card->hostVoltageWindowVCC == kMMC_VoltageWindow170to195)))
-    {
+         (card->hostVoltageWindowVCC == kMMC_VoltageWindow170to195))) {
         /* Save host intended voltage range */
         tempVoltage = kMMC_VoltageWindow170to195;
         /* set the opcode */
@@ -647,84 +629,73 @@ static status_t MMC_SwitchVoltage(mmc_card_t *card, uint32_t *opCode)
 
 static status_t MMC_SendIdentifyDevice(mmc_card_t *card, uint32_t arg)
 {
-	uint32_t count = 0;
-	uint32_t validvoltage = 0;
+    uint32_t count        = 0;
+    uint32_t validvoltage = 0;
 
-	while(validvoltage == 0)
-	{
-		if(count++ == 0xFFFF)
-		{
-		  return kStatus_Timeout;
-		}
+    while (validvoltage == 0) {
+        if (count++ == 0xFFFF) {
+            return kStatus_Timeout;
+        }
 
-		SDMMCHOST_TRANSFER content = {0};
-		SDMMCHOST_COMMAND command = {0};
+        SDMMCHOST_TRANSFER content = {0};
+        SDMMCHOST_COMMAND command  = {0};
 
-		command.index = kMMC_SendOperationCondition;
-		command.argument  =arg;
-		command.responseType = kCARD_ResponseTypeR3;
+        command.index        = kMMC_SendOperationCondition;
+        command.argument     = arg;
+        command.responseType = kCARD_ResponseTypeR3;
 
-		content.command = &command;
-		content.data = NULL;
+        content.command = &command;
+        content.data    = NULL;
 
-		if (kStatus_Success != card->host.transfer(card->host.base, &content))
-		{
-		  return kStatus_SDMMC_TransferFailed;
-		}
+        if (kStatus_Success != card->host.transfer(card->host.base, &content)) {
+            return kStatus_SDMMC_TransferFailed;
+        }
 
-		/* Get operating voltage*/
-		validvoltage = ((command.response[0] & MMC_OCR_BUSY_MASK) ? 1 : 0);
+        /* Get operating voltage*/
+        validvoltage = ((command.response[0] & MMC_OCR_BUSY_MASK) ? 1 : 0);
 
-	    card->ocr = command.response[0U];
-	    if (((card->ocr & MMC_OCR_ACCESS_MODE_MASK) >> MMC_OCR_ACCESS_MODE_SHIFT) == kMMC_AccessModeSector)
-	    {
-	        card->flags |= kMMC_SupportHighCapacityFlag;
-	    }
-	}
+        card->ocr = command.response[0U];
+        if (((card->ocr & MMC_OCR_ACCESS_MODE_MASK) >> MMC_OCR_ACCESS_MODE_SHIFT) == kMMC_AccessModeSector) {
+            card->flags |= kMMC_SupportHighCapacityFlag;
+        }
+    }
 
-	return kStatus_Success;
+    return kStatus_Success;
 }
 
-
 static status_t MMC_SendOperationCondition(mmc_card_t *card, uint32_t arg)
 {
     assert(card);
     assert(card->host.transfer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
     status_t error;
     uint32_t i = FSL_SDMMC_MAX_VOLTAGE_RETRIES;
 
     /* Send CMD1 with the intended voltage range in the argument(either 0x00FF8000 or 0x00000080) */
-    command.index = kMMC_SendOperationCondition;
-    command.argument = arg;
+    command.index        = kMMC_SendOperationCondition;
+    command.argument     = arg;
     command.responseType = kCARD_ResponseTypeR3;
 
     content.command = &command;
-    content.data = NULL;
-    do
-    {
-        if (kStatus_Success != card->host.transfer(card->host.base, &content))
-        {
+    content.data    = NULL;
+    do {
+        if (kStatus_Success != card->host.transfer(card->host.base, &content)) {
             return kStatus_SDMMC_TransferFailed;
         }
 
-        if ((arg == 0U) && (command.response[0U] != 0U))
-        {
+        if ((arg == 0U) && (command.response[0U] != 0U)) {
             error = kStatus_Success;
         }
         /* Repeat CMD1 until the busy bit is cleared. */
-        else if (!(command.response[0U] & MMC_OCR_BUSY_MASK))
-        {
+        else if (!(command.response[0U] & MMC_OCR_BUSY_MASK)) {
             error = kStatus_Timeout;
         }
-        else
-        {
-            error = kStatus_Success;
+        else {
+            error     = kStatus_Success;
             card->ocr = command.response[0U];
-            if (((card->ocr & MMC_OCR_ACCESS_MODE_MASK) >> MMC_OCR_ACCESS_MODE_SHIFT) == kMMC_AccessModeSector)
-            {
+            if (((card->ocr & MMC_OCR_ACCESS_MODE_MASK) >> MMC_OCR_ACCESS_MODE_SHIFT) == kMMC_AccessModeSector) {
                 card->flags |= kMMC_SupportHighCapacityFlag;
             }
         }
@@ -738,19 +709,18 @@ static status_t MMC_SetRelativeAddress(mmc_card_t *card)
     assert(card);
     assert(card->host.transfer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
 
     /* Send CMD3 with a chosen relative address, with value greater than 1 */
-    command.index = kMMC_SetRelativeAddress;
-    command.argument = (MMC_DEFAULT_RELATIVE_ADDRESS << 16U);
+    command.index        = kMMC_SetRelativeAddress;
+    command.argument     = (MMC_DEFAULT_RELATIVE_ADDRESS << 16U);
     command.responseType = kCARD_ResponseTypeR1;
 
     content.command = &command;
-    content.data = NULL;
+    content.data    = NULL;
     if ((kStatus_Success == card->host.transfer(card->host.base, &content)) ||
-        (!((command.response[0U]) & kSDMMC_R1ErrorAllFlag)))
-    {
+        (!((command.response[0U]) & kSDMMC_R1ErrorAllFlag))) {
         card->relativeAddress = MMC_DEFAULT_RELATIVE_ADDRESS;
         return kStatus_Success;
     }
@@ -766,80 +736,68 @@ static void MMC_DecodeCsd(mmc_card_t *card, uint32_t *rawCsd)
     mmc_csd_t *csd;
     uint32_t multiplier;
 
-    csd = &(card->csd);
-    csd->csdStructureVersion = (uint8_t)((rawCsd[3U] & 0xC0000000U) >> 30U);
+    csd                             = &(card->csd);
+    csd->csdStructureVersion        = (uint8_t)((rawCsd[3U] & 0xC0000000U) >> 30U);
     csd->systemSpecificationVersion = (uint8_t)((rawCsd[3U] & 0x3C000000U) >> 26U);
-    csd->dataReadAccessTime1 = (uint8_t)((rawCsd[3U] & 0xFF0000U) >> 16U);
-    csd->dataReadAccessTime2 = (uint8_t)((rawCsd[3U] & 0xFF00U) >> 8U);
-    csd->transferSpeed = (uint8_t)(rawCsd[3U] & 0xFFU);
-    csd->cardCommandClass = (uint16_t)((rawCsd[2U] & 0xFFF00000U) >> 20U);
+    csd->dataReadAccessTime1        = (uint8_t)((rawCsd[3U] & 0xFF0000U) >> 16U);
+    csd->dataReadAccessTime2        = (uint8_t)((rawCsd[3U] & 0xFF00U) >> 8U);
+    csd->transferSpeed              = (uint8_t)(rawCsd[3U] & 0xFFU);
+    csd->cardCommandClass           = (uint16_t)((rawCsd[2U] & 0xFFF00000U) >> 20U);
     /* Max block length read/write one time */
     csd->readBlockLength = (uint8_t)((rawCsd[2U] & 0xF0000U) >> 16U);
-    if (rawCsd[2U] & 0x8000U)
-    {
+    if (rawCsd[2U] & 0x8000U) {
         csd->flags |= kMMC_CsdReadBlockPartialFlag;
     }
-    if (rawCsd[2U] & 0x4000U)
-    {
+    if (rawCsd[2U] & 0x4000U) {
         csd->flags |= kMMC_CsdWriteBlockMisalignFlag;
     }
-    if (rawCsd[2U] & 0x2000U)
-    {
+    if (rawCsd[2U] & 0x2000U) {
         csd->flags |= kMMC_CsdReadBlockMisalignFlag;
     }
-    if (rawCsd[2U] & 0x1000U)
-    {
+    if (rawCsd[2U] & 0x1000U) {
         csd->flags |= kMMC_CsdDsrImplementedFlag;
     }
-    csd->deviceSize = (uint16_t)(((rawCsd[2U] & 0x3FFU) << 2U) + ((rawCsd[1U] & 0xC0000000U) >> 30U));
-    csd->readCurrentVddMin = (uint8_t)((rawCsd[1U] & 0x38000000U) >> 27U);
-    csd->readCurrentVddMax = (uint8_t)((rawCsd[1U] & 0x07000000U) >> 24U);
-    csd->writeCurrentVddMin = (uint8_t)((rawCsd[1U] & 0x00E00000U) >> 21U);
-    csd->writeCurrentVddMax = (uint8_t)((rawCsd[1U] & 0x001C0000U) >> 18U);
-    csd->deviceSizeMultiplier = (uint8_t)((rawCsd[1U] & 0x00038000U) >> 15U);
-    csd->eraseGroupSize = (uint8_t)((rawCsd[1U] & 0x00007C00U) >> 10U);
+    csd->deviceSize               = (uint16_t)(((rawCsd[2U] & 0x3FFU) << 2U) + ((rawCsd[1U] & 0xC0000000U) >> 30U));
+    csd->readCurrentVddMin        = (uint8_t)((rawCsd[1U] & 0x38000000U) >> 27U);
+    csd->readCurrentVddMax        = (uint8_t)((rawCsd[1U] & 0x07000000U) >> 24U);
+    csd->writeCurrentVddMin       = (uint8_t)((rawCsd[1U] & 0x00E00000U) >> 21U);
+    csd->writeCurrentVddMax       = (uint8_t)((rawCsd[1U] & 0x001C0000U) >> 18U);
+    csd->deviceSizeMultiplier     = (uint8_t)((rawCsd[1U] & 0x00038000U) >> 15U);
+    csd->eraseGroupSize           = (uint8_t)((rawCsd[1U] & 0x00007C00U) >> 10U);
     csd->eraseGroupSizeMultiplier = (uint8_t)((rawCsd[1U] & 0x000003E0U) >> 5U);
-    csd->writeProtectGroupSize = (uint8_t)(rawCsd[1U] & 0x0000001FU);
-    if (rawCsd[0U] & 0x80000000U)
-    {
+    csd->writeProtectGroupSize    = (uint8_t)(rawCsd[1U] & 0x0000001FU);
+    if (rawCsd[0U] & 0x80000000U) {
         csd->flags |= kMMC_CsdWriteProtectGroupEnabledFlag;
     }
-    csd->defaultEcc = (uint8_t)((rawCsd[0U] & 0x60000000U) >> 29U);
-    csd->writeSpeedFactor = (uint8_t)((rawCsd[0U] & 0x1C000000U) >> 26U);
+    csd->defaultEcc          = (uint8_t)((rawCsd[0U] & 0x60000000U) >> 29U);
+    csd->writeSpeedFactor    = (uint8_t)((rawCsd[0U] & 0x1C000000U) >> 26U);
     csd->maxWriteBlockLength = (uint8_t)((rawCsd[0U] & 0x03C00000U) >> 22U);
-    if (rawCsd[0U] & 0x00200000U)
-    {
+    if (rawCsd[0U] & 0x00200000U) {
         csd->flags |= kMMC_CsdWriteBlockPartialFlag;
     }
-    if (rawCsd[0U] & 0x00010000U)
-    {
+    if (rawCsd[0U] & 0x00010000U) {
         csd->flags |= kMMC_ContentProtectApplicationFlag;
     }
-    if (rawCsd[0U] & 0x00008000U)
-    {
+    if (rawCsd[0U] & 0x00008000U) {
         csd->flags |= kMMC_CsdFileFormatGroupFlag;
     }
-    if (rawCsd[0U] & 0x00004000U)
-    {
+    if (rawCsd[0U] & 0x00004000U) {
         csd->flags |= kMMC_CsdCopyFlag;
     }
-    if (rawCsd[0U] & 0x00002000U)
-    {
+    if (rawCsd[0U] & 0x00002000U) {
         csd->flags |= kMMC_CsdPermanentWriteProtectFlag;
     }
-    if (rawCsd[0U] & 0x00001000U)
-    {
+    if (rawCsd[0U] & 0x00001000U) {
         csd->flags |= kMMC_CsdTemporaryWriteProtectFlag;
     }
     csd->fileFormat = (uint8_t)((rawCsd[0U] & 0x00000C00U) >> 10U);
-    csd->eccCode = (uint8_t)((rawCsd[0U] & 0x00000300U) >> 8U);
+    csd->eccCode    = (uint8_t)((rawCsd[0U] & 0x00000300U) >> 8U);
 
     /* Calculate the device total block count. */
     /* For the card capacity of witch higher than 2GB, the maximum possible value should be set to this register
     is 0xFFF. */
-    if (card->csd.deviceSize != 0xFFFU)
-    {
-        multiplier = (2U << (card->csd.deviceSizeMultiplier + 2U - 1U));
+    if (card->csd.deviceSize != 0xFFFU) {
+        multiplier                = (2U << (card->csd.deviceSizeMultiplier + 2U - 1U));
         card->userPartitionBlocks = (((card->csd.deviceSize + 1U) * multiplier) / FSL_SDMMC_DEFAULT_BLOCK_SIZE);
     }
 
@@ -859,9 +817,9 @@ static void MMC_SetMaxFrequency(mmc_card_t *card)
     For cards supporting version 4.0, 4.1, and 4.2 of the specification, the value shall be 20MHz(0x2A).
     For cards supporting version 4.3, the value shall be 26 MHz (0x32H). In High speed mode, the max
     frequency is decided by CARD_TYPE in Extended CSD. */
-    frequencyUnit = g_transerSpeedFrequencyUnit[READ_MMC_TRANSFER_SPEED_FREQUENCY_UNIT(card->csd)];
-    multiplierFactor = g_transerSpeedMultiplierFactor[READ_MMC_TRANSFER_SPEED_MULTIPLIER(card->csd)];
-    maxBusClock_Hz = (frequencyUnit * multiplierFactor) / DIVIDER_IN_TRANSFER_SPEED;
+    frequencyUnit     = g_transerSpeedFrequencyUnit[READ_MMC_TRANSFER_SPEED_FREQUENCY_UNIT(card->csd)];
+    multiplierFactor  = g_transerSpeedMultiplierFactor[READ_MMC_TRANSFER_SPEED_MULTIPLIER(card->csd)];
+    maxBusClock_Hz    = (frequencyUnit * multiplierFactor) / DIVIDER_IN_TRANSFER_SPEED;
     card->busClock_Hz = SDMMCHOST_SET_CARD_CLOCK(card->host.base, card->host.sourceClock_Hz, maxBusClock_Hz);
 }
 
@@ -874,23 +832,20 @@ static status_t MMC_SetMaxEraseUnitSize(mmc_card_t *card)
     mmc_extended_csd_config_t extendedCsdconfig;
 
     if (((!(card->flags & kMMC_SupportHighCapacityFlag)) || (card->extendedCsd.highCapacityEraseUnitSize == 0)) ||
-        (card->extendedCsd.highCapacityEraseTimeout == 0))
-    {
-        erase_group_size = card->csd.eraseGroupSize;
+        (card->extendedCsd.highCapacityEraseTimeout == 0)) {
+        erase_group_size       = card->csd.eraseGroupSize;
         erase_group_multiplier = card->csd.eraseGroupSizeMultiplier;
         card->eraseGroupBlocks = ((erase_group_size + 1U) * (erase_group_multiplier + 1U));
     }
-    else
-    {
+    else {
         /* Erase Unit Size = 512Kbyte * HC_ERASE_GRP_SIZE. Block size is 512 bytes. */
         card->eraseGroupBlocks = (card->extendedCsd.highCapacityEraseUnitSize * 1024U);
         /* Enable high capacity erase unit size. */
         extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeSetBits;
-        extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexEraseGroupDefinition;
-        extendedCsdconfig.ByteValue = 0x01U; /* The high capacity erase unit size enable bit is bit 0 */
+        extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexEraseGroupDefinition;
+        extendedCsdconfig.ByteValue  = 0x01U; /* The high capacity erase unit size enable bit is bit 0 */
         extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-        {
+        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
             return kStatus_SDMMC_ConfigureExtendedCsdFailed;
         }
     }
@@ -904,8 +859,8 @@ static status_t MMC_SetExtendedCsdConfig(mmc_card_t *card, const mmc_extended_cs
     assert(card->host.transfer);
     assert(config);
 
-    uint32_t parameter = 0U;
-    SDMMCHOST_COMMAND command = {0};
+    uint32_t parameter         = 0U;
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
 
     parameter |= ((uint32_t)(config->commandSet) << MMC_SWITCH_COMMAND_SET_SHIFT);
@@ -913,21 +868,19 @@ static status_t MMC_SetExtendedCsdConfig(mmc_card_t *card, const mmc_extended_cs
     parameter |= ((uint32_t)(config->ByteIndex) << MMC_SWITCH_BYTE_INDEX_SHIFT);
     parameter |= ((uint32_t)(config->accessMode) << MMC_SWITCH_ACCESS_MODE_SHIFT);
 
-    command.index = kMMC_Switch;
-    command.argument = parameter;
+    command.index        = kMMC_Switch;
+    command.argument     = parameter;
     command.responseType = kCARD_ResponseTypeR1b; /* Send switch command to set the pointed byte in Extended CSD. */
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag | kSDMMC_R1SwitchErrorFlag;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success != MMC_Transfer(card, &content, 2U))
-    {
+    content.data    = NULL;
+    if (kStatus_Success != MMC_Transfer(card, &content, 2U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
     /* Wait for the card write process complete because of that card read process and write process use one buffer. */
-    if (kStatus_Success != MMC_WaitWriteComplete(card))
-    {
+    if (kStatus_Success != MMC_WaitWriteComplete(card)) {
         return kStatus_SDMMC_WaitWriteCompleteFailed;
     }
 
@@ -939,68 +892,66 @@ static void MMC_DecodeExtendedCsd(mmc_card_t *card, uint32_t *rawExtendedCsd)
     assert(card);
     assert(rawExtendedCsd);
 
-    uint8_t *buffer = (uint8_t *)rawExtendedCsd;
+    uint8_t *buffer                 = (uint8_t *)rawExtendedCsd;
     mmc_extended_csd_t *extendedCsd = &(card->extendedCsd);
 
     /* Extended CSD is transferred as a data block from least byte indexed 0. */
-    extendedCsd->partitioningSupport = buffer[160U];
-    extendedCsd->bootPartitionWP = buffer[173U];
-    extendedCsd->bootWPStatus = buffer[174U];
+    extendedCsd->partitioningSupport             = buffer[160U];
+    extendedCsd->bootPartitionWP                 = buffer[173U];
+    extendedCsd->bootWPStatus                    = buffer[174U];
     extendedCsd->highDensityEraseGroupDefinition = buffer[175U];
-    extendedCsd->bootDataBusConditions = buffer[177U];
-    extendedCsd->bootConfigProtect = buffer[178U];
-    extendedCsd->partitionConfig = buffer[179U];
-    extendedCsd->eraseMemoryContent = buffer[181U];
-    extendedCsd->dataBusWidth = buffer[183U];
-    extendedCsd->highSpeedTiming = buffer[185U];
-    extendedCsd->powerClass = buffer[187U];
-    extendedCsd->partitionSwitchTiming = buffer[199U];
-    extendedCsd->commandSetRevision = buffer[189U];
-    extendedCsd->commandSet = buffer[191U];
-    extendedCsd->extendecCsdVersion = buffer[192U];
-    extendedCsd->csdStructureVersion = buffer[194U];
-    extendedCsd->partitionAttribute = buffer[156U];
-    extendedCsd->extPartitionSupport = buffer[494U];
-    extendedCsd->cardType = buffer[196U];
+    extendedCsd->bootDataBusConditions           = buffer[177U];
+    extendedCsd->bootConfigProtect               = buffer[178U];
+    extendedCsd->partitionConfig                 = buffer[179U];
+    extendedCsd->eraseMemoryContent              = buffer[181U];
+    extendedCsd->dataBusWidth                    = buffer[183U];
+    extendedCsd->highSpeedTiming                 = buffer[185U];
+    extendedCsd->powerClass                      = buffer[187U];
+    extendedCsd->partitionSwitchTiming           = buffer[199U];
+    extendedCsd->commandSetRevision              = buffer[189U];
+    extendedCsd->commandSet                      = buffer[191U];
+    extendedCsd->extendecCsdVersion              = buffer[192U];
+    extendedCsd->csdStructureVersion             = buffer[194U];
+    extendedCsd->partitionAttribute              = buffer[156U];
+    extendedCsd->extPartitionSupport             = buffer[494U];
+    extendedCsd->cardType                        = buffer[196U];
     /* This field define the type of the card. The only currently valid values for this field are 0x01 and 0x03. */
     card->flags |= extendedCsd->cardType;
 
     extendedCsd->ioDriverStrength = buffer[197U];
 
-    extendedCsd->powerClass52MHz195V = buffer[200U];
-    extendedCsd->powerClass26MHz195V = buffer[201U];
-    extendedCsd->powerClass52MHz360V = buffer[202U];
-    extendedCsd->powerClass26MHz360V = buffer[203U];
-    extendedCsd->powerClass200MHZVCCQ130VVCC360V = buffer[236U];
-    extendedCsd->powerClass200MHZVCCQ195VVCC360V = buffer[237U];
-    extendedCsd->powerClass52MHZDDR195V = buffer[238U];
-    extendedCsd->powerClass52MHZDDR360V = buffer[239U];
-    extendedCsd->powerClass200MHZDDR360V = buffer[253U];
-    extendedCsd->minimumReadPerformance4Bit26MHz = buffer[205U];
-    extendedCsd->minimumWritePerformance4Bit26MHz = buffer[206U];
-    extendedCsd->minimumReadPerformance8Bit26MHz4Bit52MHz = buffer[207U];
+    extendedCsd->powerClass52MHz195V                       = buffer[200U];
+    extendedCsd->powerClass26MHz195V                       = buffer[201U];
+    extendedCsd->powerClass52MHz360V                       = buffer[202U];
+    extendedCsd->powerClass26MHz360V                       = buffer[203U];
+    extendedCsd->powerClass200MHZVCCQ130VVCC360V           = buffer[236U];
+    extendedCsd->powerClass200MHZVCCQ195VVCC360V           = buffer[237U];
+    extendedCsd->powerClass52MHZDDR195V                    = buffer[238U];
+    extendedCsd->powerClass52MHZDDR360V                    = buffer[239U];
+    extendedCsd->powerClass200MHZDDR360V                   = buffer[253U];
+    extendedCsd->minimumReadPerformance4Bit26MHz           = buffer[205U];
+    extendedCsd->minimumWritePerformance4Bit26MHz          = buffer[206U];
+    extendedCsd->minimumReadPerformance8Bit26MHz4Bit52MHz  = buffer[207U];
     extendedCsd->minimumWritePerformance8Bit26MHz4Bit52MHz = buffer[208U];
-    extendedCsd->minimumReadPerformance8Bit52MHz = buffer[209U];
-    extendedCsd->minimumWritePerformance8Bit52MHz = buffer[210U];
-    extendedCsd->minReadPerformance8bitAt52MHZDDR = buffer[234U];
-    extendedCsd->minWritePerformance8bitAt52MHZDDR = buffer[235U];
+    extendedCsd->minimumReadPerformance8Bit52MHz           = buffer[209U];
+    extendedCsd->minimumWritePerformance8Bit52MHz          = buffer[210U];
+    extendedCsd->minReadPerformance8bitAt52MHZDDR          = buffer[234U];
+    extendedCsd->minWritePerformance8bitAt52MHZDDR         = buffer[235U];
     /* Get user partition size. */
     extendedCsd->sectorCount = ((((uint32_t)buffer[215U]) << 24U) + (((uint32_t)buffer[214U]) << 16U) +
                                 (((uint32_t)buffer[213U]) << 8U) + (uint32_t)buffer[212U]);
-    if (card->flags & kMMC_SupportHighCapacityFlag)
-    {
+    if (card->flags & kMMC_SupportHighCapacityFlag) {
         card->userPartitionBlocks = card->extendedCsd.sectorCount;
     }
 
-    extendedCsd->sleepAwakeTimeout = buffer[217U];
-    extendedCsd->sleepCurrentVCCQ = buffer[219U];
-    extendedCsd->sleepCurrentVCC = buffer[220U];
+    extendedCsd->sleepAwakeTimeout                 = buffer[217U];
+    extendedCsd->sleepCurrentVCCQ                  = buffer[219U];
+    extendedCsd->sleepCurrentVCC                   = buffer[220U];
     extendedCsd->highCapacityWriteProtectGroupSize = buffer[221U];
-    extendedCsd->reliableWriteSectorCount = buffer[222U];
-    extendedCsd->highCapacityEraseTimeout = buffer[223U];
-    extendedCsd->highCapacityEraseUnitSize = buffer[224U];
-    extendedCsd->accessSize = buffer[225U];
-
+    extendedCsd->reliableWriteSectorCount          = buffer[222U];
+    extendedCsd->highCapacityEraseTimeout          = buffer[223U];
+    extendedCsd->highCapacityEraseUnitSize         = buffer[224U];
+    extendedCsd->accessSize                        = buffer[225U];
 
     /* General purpose partition multipliers */
     extendedCsd->generalPartition1Multi0 = buffer[143U];
@@ -1025,20 +976,16 @@ static void MMC_DecodeExtendedCsd(mmc_card_t *card, uint32_t *rawExtendedCsd)
     card->bootPartitionBlocks = ((128U * 1024U * buffer[226U]) / FSL_SDMMC_DEFAULT_BLOCK_SIZE);
 
     /* Check if card support boot mode. */
-    if (buffer[228U] & 0x1U)
-    {
+    if (buffer[228U] & 0x1U) {
         card->flags |= kMMC_SupportAlternateBootFlag;
     }
-    else if (buffer[228U] & 0x2U)
-    {
+    else if (buffer[228U] & 0x2U) {
         card->flags |= kMMC_SupportDDRBootFlag;
     }
-    else if (buffer[228U] & 0x4U)
-    {
+    else if (buffer[228U] & 0x4U) {
         card->flags |= kMMC_SupportHighSpeedBootFlag;
     }
-    else
-    {
+    else {
     }
     /* cache size unit 1kb */
     extendedCsd->cacheSize = (((uint32_t)buffer[252U]) << 24) | (((uint32_t)buffer[251U]) << 16) |
@@ -1052,55 +999,49 @@ static status_t MMC_SendExtendedCsd(mmc_card_t *card, uint8_t *targetAddr, uint3
     assert(card);
     assert(card->host.transfer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_DATA data        = {0};
     uint32_t i;
 
-    command.index = kMMC_SendExtendedCsd;
-    command.argument = 0U;
+    command.index        = kMMC_SendExtendedCsd;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeR1;
 
     data.blockCount = 1U;
-    data.blockSize = MMC_EXTENDED_CSD_BYTES;
-    data.rxData = card->rawExtendedCsd;
+    data.blockSize  = MMC_EXTENDED_CSD_BYTES;
+    data.rxData     = card->rawExtendedCsd;
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
     if ((kStatus_Success == card->host.transfer(card->host.base, &content)) &&
-        (!(command.response[0U] & kSDMMC_R1ErrorAllFlag)))
-    {
+        (!(command.response[0U] & kSDMMC_R1ErrorAllFlag))) {
         /* The response is from bit 127:8 in R2, corresponding to command.response[3][31:0] to
         command.response[0U][31:8] */
-        switch (card->host.config.endianMode)
-        {
-            case kSDMMCHOST_EndianModeLittle:
-                /* Doesn't need to switch byte sequence when decode bytes as little endian sequence. */
-                break;
-            case kSDMMCHOST_EndianModeBig:
-                /* In big endian mode, the SD bus byte transferred first is the byte stored in highest position
-                in a word which cause 4 byte's sequence in a word is not consistent with their original sequence
-                from card. */
-                for (i = 0U; i < MMC_EXTENDED_CSD_BYTES / 4U; i++)
-                {
-                    card->rawExtendedCsd[i] = SWAP_WORD_BYTE_SEQUENCE(card->rawExtendedCsd[i]);
-                }
-                break;
-            case kSDMMCHOST_EndianModeHalfWordBig:
-                for (i = 0U; i < MMC_EXTENDED_CSD_BYTES / 4U; i++)
-                {
-                    card->rawExtendedCsd[i] = SWAP_HALF_WROD_BYTE_SEQUENCE(card->rawExtendedCsd[i]);
-                }
-                break;
-            default:
-                return kStatus_SDMMC_NotSupportYet;
+        switch (card->host.config.endianMode) {
+        case kSDMMCHOST_EndianModeLittle:
+            /* Doesn't need to switch byte sequence when decode bytes as little endian sequence. */
+            break;
+        case kSDMMCHOST_EndianModeBig:
+            /* In big endian mode, the SD bus byte transferred first is the byte stored in highest position
+            in a word which cause 4 byte's sequence in a word is not consistent with their original sequence
+            from card. */
+            for (i = 0U; i < MMC_EXTENDED_CSD_BYTES / 4U; i++) {
+                card->rawExtendedCsd[i] = SWAP_WORD_BYTE_SEQUENCE(card->rawExtendedCsd[i]);
+            }
+            break;
+        case kSDMMCHOST_EndianModeHalfWordBig:
+            for (i = 0U; i < MMC_EXTENDED_CSD_BYTES / 4U; i++) {
+                card->rawExtendedCsd[i] = SWAP_HALF_WROD_BYTE_SEQUENCE(card->rawExtendedCsd[i]);
+            }
+            break;
+        default:
+            return kStatus_SDMMC_NotSupportYet;
         }
-        if (targetAddr != NULL)
-        {
+        if (targetAddr != NULL) {
             *targetAddr = ((uint8_t *)card->rawExtendedCsd)[byteIndex];
         }
-        else
-        {
+        else {
             MMC_DecodeExtendedCsd(card, card->rawExtendedCsd);
         }
 
@@ -1118,87 +1059,71 @@ static status_t MMC_SetPowerClass(mmc_card_t *card)
     uint8_t powerClass = 0;
     mmc_extended_csd_config_t extendedCsdconfig;
 
-    if ((card->busWidth == kMMC_DataBusWidth4bit) || (card->busWidth == kMMC_DataBusWidth4bitDDR))
-    {
-        mask = MMC_POWER_CLASS_4BIT_MASK; /* The mask of 4 bit bus width's power class */
+    if ((card->busWidth == kMMC_DataBusWidth4bit) || (card->busWidth == kMMC_DataBusWidth4bitDDR)) {
+        mask  = MMC_POWER_CLASS_4BIT_MASK; /* The mask of 4 bit bus width's power class */
         shift = 0U;
     }
-    else if ((card->busWidth == kMMC_DataBusWidth8bit) || (card->busWidth == kMMC_DataBusWidth8bitDDR))
-    {
-        mask = MMC_POWER_CLASS_8BIT_MASK; /* The mask of 8 bit bus width's power class */
+    else if ((card->busWidth == kMMC_DataBusWidth8bit) || (card->busWidth == kMMC_DataBusWidth8bitDDR)) {
+        mask  = MMC_POWER_CLASS_8BIT_MASK; /* The mask of 8 bit bus width's power class */
         shift = 4U;
     }
-    else
-    {
+    else {
         return kStatus_Success;
     }
 
-    switch (card->hostVoltageWindowVCC)
-    {
-        case kMMC_VoltageWindows270to360:
+    switch (card->hostVoltageWindowVCC) {
+    case kMMC_VoltageWindows270to360:
 
-            if (card->busTiming == kMMC_HighSpeed200Timing)
-            {
-                if (card->hostVoltageWindowVCCQ == kMMC_VoltageWindow170to195)
-                {
-                    powerClass = ((card->extendedCsd.powerClass200MHZVCCQ195VVCC360V) & mask);
-                }
-                else if (card->hostVoltageWindowVCCQ == kMMC_VoltageWindow120)
-                {
-                    powerClass = ((card->extendedCsd.powerClass200MHZVCCQ130VVCC360V) & mask);
-                }
+        if (card->busTiming == kMMC_HighSpeed200Timing) {
+            if (card->hostVoltageWindowVCCQ == kMMC_VoltageWindow170to195) {
+                powerClass = ((card->extendedCsd.powerClass200MHZVCCQ195VVCC360V) & mask);
             }
-            else if (card->busTiming == kMMC_HighSpeed400Timing)
-            {
-                powerClass = ((card->extendedCsd.powerClass200MHZDDR360V) & mask);
-            }
-            else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busWidth > kMMC_DataBusWidth8bit))
-            {
-                powerClass = ((card->extendedCsd.powerClass52MHZDDR360V) & mask);
-            }
-            else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz > MMC_CLOCK_26MHZ))
-            {
-                powerClass = ((card->extendedCsd.powerClass52MHz360V) & mask);
-            }
-            else if (card->busTiming == kMMC_HighSpeedTiming)
-            {
-                powerClass = ((card->extendedCsd.powerClass26MHz360V) & mask);
+            else if (card->hostVoltageWindowVCCQ == kMMC_VoltageWindow120) {
+                powerClass = ((card->extendedCsd.powerClass200MHZVCCQ130VVCC360V) & mask);
             }
+        }
+        else if (card->busTiming == kMMC_HighSpeed400Timing) {
+            powerClass = ((card->extendedCsd.powerClass200MHZDDR360V) & mask);
+        }
+        else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busWidth > kMMC_DataBusWidth8bit)) {
+            powerClass = ((card->extendedCsd.powerClass52MHZDDR360V) & mask);
+        }
+        else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz > MMC_CLOCK_26MHZ)) {
+            powerClass = ((card->extendedCsd.powerClass52MHz360V) & mask);
+        }
+        else if (card->busTiming == kMMC_HighSpeedTiming) {
+            powerClass = ((card->extendedCsd.powerClass26MHz360V) & mask);
+        }
 
-            break;
+        break;
 
-        case kMMC_VoltageWindow170to195:
+    case kMMC_VoltageWindow170to195:
 
-            if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz <= MMC_CLOCK_26MHZ))
-            {
-                powerClass = ((card->extendedCsd.powerClass26MHz195V) & mask);
-            }
-            else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz > MMC_CLOCK_26MHZ))
-            {
-                powerClass = ((card->extendedCsd.powerClass52MHz195V) & mask);
-            }
-            else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busWidth > kMMC_DataBusWidth8bit))
-            {
-                powerClass = ((card->extendedCsd.powerClass52MHZDDR195V) & mask);
-            }
+        if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz <= MMC_CLOCK_26MHZ)) {
+            powerClass = ((card->extendedCsd.powerClass26MHz195V) & mask);
+        }
+        else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busClock_Hz > MMC_CLOCK_26MHZ)) {
+            powerClass = ((card->extendedCsd.powerClass52MHz195V) & mask);
+        }
+        else if ((card->busTiming == kMMC_HighSpeedTiming) && (card->busWidth > kMMC_DataBusWidth8bit)) {
+            powerClass = ((card->extendedCsd.powerClass52MHZDDR195V) & mask);
+        }
 
-            break;
-        default:
-            powerClass = 0;
-            break;
+        break;
+    default:
+        powerClass = 0;
+        break;
     }
 
     /* due to 8bit power class position [7:4] */
     powerClass >>= shift;
 
-    if (powerClass > 0U)
-    {
+    if (powerClass > 0U) {
         extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-        extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexPowerClass;
-        extendedCsdconfig.ByteValue = powerClass;
+        extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexPowerClass;
+        extendedCsdconfig.ByteValue  = powerClass;
         extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-        {
+        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
             return kStatus_SDMMC_ConfigureExtendedCsdFailed;
         }
         /* restore power class */
@@ -1216,24 +1141,23 @@ static status_t MMC_SendTestPattern(mmc_card_t *card, uint32_t blockSize, uint32
     assert(pattern);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_COMMAND command  = {0};
+    SDMMCHOST_DATA data        = {0};
 
-    command.index = kMMC_SendingBusTest;
-    command.argument = 0U;
+    command.index        = kMMC_SendingBusTest;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeR1;
 
     /* Ignore errors in bus test procedure to improve chances that the test will work. */
     data.enableIgnoreError = true;
-    data.blockCount = 1U;
-    data.blockSize = blockSize;
-    data.txData = pattern;
+    data.blockCount        = 1U;
+    data.blockSize         = blockSize;
+    data.txData            = pattern;
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
     if ((kStatus_Success != card->host.transfer(card->host.base, &content)) ||
-        (command.response[0U] & kSDMMC_R1ErrorAllFlag))
-    {
+        (command.response[0U] & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -1248,23 +1172,22 @@ static status_t MMC_ReceiveTestPattern(mmc_card_t *card, uint32_t blockSize, uin
     assert(pattern);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_COMMAND command  = {0};
+    SDMMCHOST_DATA data        = {0};
 
-    command.index = kMMC_BusTestRead;
+    command.index        = kMMC_BusTestRead;
     command.responseType = kCARD_ResponseTypeR1;
 
     /* Ignore errors in bus test procedure to improve chances that the test will work. */
     data.enableIgnoreError = true;
-    data.blockCount = 1U;
-    data.blockSize = blockSize;
-    data.rxData = pattern;
+    data.blockCount        = 1U;
+    data.blockSize         = blockSize;
+    data.rxData            = pattern;
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
     if ((kStatus_Success != card->host.transfer(card->host.base, &content)) ||
-        ((command.response[0U]) & kSDMMC_R1ErrorAllFlag))
-    {
+        ((command.response[0U]) & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -1275,67 +1198,64 @@ static status_t MMC_TestDataBusWidth(mmc_card_t *card, mmc_data_bus_width_t widt
 {
     assert(card);
 
-    uint32_t blockSize = 0U;
+    uint32_t blockSize       = 0U;
     uint32_t tempsendPattern = 0U;
-    uint32_t *tempPattern = g_sdmmc;
-    uint32_t xorMask = 0U;
-    uint32_t xorResult = 0U;
+    uint32_t *tempPattern    = g_sdmmc;
+    uint32_t xorMask         = 0U;
+    uint32_t xorResult       = 0U;
 
     /* For 8 data lines the data block would be (MSB to LSB): 0x0000_0000_0000_AA55,
     For 4 data lines the data block would be (MSB to LSB): 0x0000_005A,
     For only 1 data line the data block would be: 0x80 */
-    switch (width)
-    {
-        case kMMC_DataBusWidth8bit:
-        case kMMC_DataBusWidth8bitDDR:
-            blockSize = 8U;
-            tempPattern[0U] = 0xAA55U;
-            xorMask = 0xFFFFU;
-            xorResult = 0xFFFFU;
-            break;
-        case kMMC_DataBusWidth4bit:
-        case kMMC_DataBusWidth4bitDDR:
-            blockSize = 4U;
-            tempPattern[0U] = 0x5AU;
-            xorMask = 0xFFU;
-            xorResult = 0xFFU;
-            break;
-        default:
-            blockSize = 4U;
-            tempPattern[0U] = 0x80U;
-            xorMask = 0xFFU;
-            xorResult = 0xC0U;
-            break;
+    switch (width) {
+    case kMMC_DataBusWidth8bit:
+    case kMMC_DataBusWidth8bitDDR:
+        blockSize       = 8U;
+        tempPattern[0U] = 0xAA55U;
+        xorMask         = 0xFFFFU;
+        xorResult       = 0xFFFFU;
+        break;
+    case kMMC_DataBusWidth4bit:
+    case kMMC_DataBusWidth4bitDDR:
+        blockSize       = 4U;
+        tempPattern[0U] = 0x5AU;
+        xorMask         = 0xFFU;
+        xorResult       = 0xFFU;
+        break;
+    default:
+        blockSize       = 4U;
+        tempPattern[0U] = 0x80U;
+        xorMask         = 0xFFU;
+        xorResult       = 0xC0U;
+        break;
     }
-    switch (card->host.config.endianMode)
-    {
-        case kSDMMCHOST_EndianModeLittle:
-            /* Doesn't need to switch byte sequence when decodes bytes as little endian sequence. */
-            break;
-        case kSDMMCHOST_EndianModeBig:
-            /* In big endian mode, the byte transferred first is the byte stored in highest byte position in a word
-            which will cause the card receive the inverted byte sequence in a word in bus test procedure. So the
-            sequence of 4 bytes stored in a word should be converted. */
-            tempPattern[0] = SWAP_WORD_BYTE_SEQUENCE(tempPattern[0]);
-            xorMask = SWAP_WORD_BYTE_SEQUENCE(xorMask);
-            xorResult = SWAP_WORD_BYTE_SEQUENCE(xorResult);
-            break;
-        case kSDMMCHOST_EndianModeHalfWordBig:
-            /* In half word big endian mode, the byte transferred first is the lower byte in the higher half word.
-            0xAA55U should be converted to 0xAA550000U to set the 0x55 to be the first byte to transfer. */
-            tempPattern[0] = SWAP_HALF_WROD_BYTE_SEQUENCE(tempPattern[0]);
-            xorMask = SWAP_HALF_WROD_BYTE_SEQUENCE(xorMask);
-            xorResult = SWAP_HALF_WROD_BYTE_SEQUENCE(xorResult);
-            tempPattern[0] = SWAP_WORD_BYTE_SEQUENCE(tempPattern[0]);
-            xorMask = SWAP_WORD_BYTE_SEQUENCE(xorMask);
-            xorResult = SWAP_WORD_BYTE_SEQUENCE(xorResult);
-            break;
-        default:
-            return kStatus_SDMMC_NotSupportYet;
+    switch (card->host.config.endianMode) {
+    case kSDMMCHOST_EndianModeLittle:
+        /* Doesn't need to switch byte sequence when decodes bytes as little endian sequence. */
+        break;
+    case kSDMMCHOST_EndianModeBig:
+        /* In big endian mode, the byte transferred first is the byte stored in highest byte position in a word
+        which will cause the card receive the inverted byte sequence in a word in bus test procedure. So the
+        sequence of 4 bytes stored in a word should be converted. */
+        tempPattern[0] = SWAP_WORD_BYTE_SEQUENCE(tempPattern[0]);
+        xorMask        = SWAP_WORD_BYTE_SEQUENCE(xorMask);
+        xorResult      = SWAP_WORD_BYTE_SEQUENCE(xorResult);
+        break;
+    case kSDMMCHOST_EndianModeHalfWordBig:
+        /* In half word big endian mode, the byte transferred first is the lower byte in the higher half word.
+        0xAA55U should be converted to 0xAA550000U to set the 0x55 to be the first byte to transfer. */
+        tempPattern[0] = SWAP_HALF_WROD_BYTE_SEQUENCE(tempPattern[0]);
+        xorMask        = SWAP_HALF_WROD_BYTE_SEQUENCE(xorMask);
+        xorResult      = SWAP_HALF_WROD_BYTE_SEQUENCE(xorResult);
+        tempPattern[0] = SWAP_WORD_BYTE_SEQUENCE(tempPattern[0]);
+        xorMask        = SWAP_WORD_BYTE_SEQUENCE(xorMask);
+        xorResult      = SWAP_WORD_BYTE_SEQUENCE(xorResult);
+        break;
+    default:
+        return kStatus_SDMMC_NotSupportYet;
     }
 
-    if (kStatus_Success != MMC_SendTestPattern(card, blockSize, tempPattern))
-    {
+    if (kStatus_Success != MMC_SendTestPattern(card, blockSize, tempPattern)) {
         return kStatus_SDMMC_SendTestPatternFailed;
     }
     /* restore the send pattern */
@@ -1343,14 +1263,12 @@ static status_t MMC_TestDataBusWidth(mmc_card_t *card, mmc_data_bus_width_t widt
     /* reset the global buffer */
     tempPattern[0U] = 0U;
 
-    if (kStatus_Success != MMC_ReceiveTestPattern(card, blockSize, tempPattern))
-    {
+    if (kStatus_Success != MMC_ReceiveTestPattern(card, blockSize, tempPattern)) {
         return kStatus_SDMMC_ReceiveTestPatternFailed;
     }
 
     /* XOR the send pattern and receive pattern */
-    if (((tempPattern[0U] ^ tempsendPattern) & xorMask) != xorResult)
-    {
+    if (((tempPattern[0U] ^ tempsendPattern) & xorMask) != xorResult) {
         return kStatus_Fail;
     }
 
@@ -1365,11 +1283,10 @@ static status_t MMC_SetDataBusWidth(mmc_card_t *card, mmc_data_bus_width_t width
 
     /* Set data bus width */
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexBusWidth;
-    extendedCsdconfig.ByteValue = width;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexBusWidth;
+    extendedCsdconfig.ByteValue  = width;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
     /* restore data bus width */
@@ -1384,82 +1301,70 @@ static status_t MMC_SetMaxDataBusWidth(mmc_card_t *card, mmc_high_speed_timing_t
 
     status_t error = kStatus_Fail;
 
-    switch (card->busWidth)
-    {
-        case kMMC_DataBusWidth1bit:
-        case kMMC_DataBusWidth8bitDDR:
-            /* Test and set the data bus width for card. */
-            if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support8BitBusWidth) &&
-                (card->flags & (kMMC_SupportHighSpeedDDR52MHZ180V300VFlag | kMMC_SupportHighSpeedDDR52MHZ120VFlag)) &&
-                ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed400Timing)))
-            {
-                SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH8BIT);
-                if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth8bitDDR)) &&
-                    (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bitDDR)))
-                {
-                    error = kStatus_Success;
-                    card->busWidth = kMMC_DataBusWidth8bitDDR;
-                    break;
-                }
-                /* HS400 mode only support 8bit data bus */
-                else if (card->busTiming == kMMC_HighSpeed400Timing)
-                {
-                    return kStatus_SDMMC_SetDataBusWidthFailed;
-                }
+    switch (card->busWidth) {
+    case kMMC_DataBusWidth1bit:
+    case kMMC_DataBusWidth8bitDDR:
+        /* Test and set the data bus width for card. */
+        if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support8BitBusWidth) &&
+            (card->flags & (kMMC_SupportHighSpeedDDR52MHZ180V300VFlag | kMMC_SupportHighSpeedDDR52MHZ120VFlag)) &&
+            ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed400Timing))) {
+            SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH8BIT);
+            if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth8bitDDR)) &&
+                (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bitDDR))) {
+                error          = kStatus_Success;
+                card->busWidth = kMMC_DataBusWidth8bitDDR;
+                break;
             }
-        case kMMC_DataBusWidth4bitDDR:
-            if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support4BitBusWidth) &&
-                (card->flags & (kMMC_SupportHighSpeedDDR52MHZ180V300VFlag | kMMC_SupportHighSpeedDDR52MHZ120VFlag)) &&
-                ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed400Timing)))
-            {
-                SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH4BIT);
-                if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth4bitDDR)) &&
-                    (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth4bitDDR)))
-                {
-                    error = kStatus_Success;
-                    card->busWidth = kMMC_DataBusWidth4bitDDR;
+            /* HS400 mode only support 8bit data bus */
+            else if (card->busTiming == kMMC_HighSpeed400Timing) {
+                return kStatus_SDMMC_SetDataBusWidthFailed;
+            }
+        }
+    case kMMC_DataBusWidth4bitDDR:
+        if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support4BitBusWidth) &&
+            (card->flags & (kMMC_SupportHighSpeedDDR52MHZ180V300VFlag | kMMC_SupportHighSpeedDDR52MHZ120VFlag)) &&
+            ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed400Timing))) {
+            SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH4BIT);
+            if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth4bitDDR)) &&
+                (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth4bitDDR))) {
+                error          = kStatus_Success;
+                card->busWidth = kMMC_DataBusWidth4bitDDR;
 
-                    break;
-                }
+                break;
             }
-        case kMMC_DataBusWidth8bit:
-            if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support8BitBusWidth) &&
-                ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed200Timing)))
-            {
-                SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH8BIT);
-                if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth8bit)) &&
-                    (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bit)))
-                {
-                    error = kStatus_Success;
-                    card->busWidth = kMMC_DataBusWidth8bit;
-                    break;
-                }
+        }
+    case kMMC_DataBusWidth8bit:
+        if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support8BitBusWidth) &&
+            ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed200Timing))) {
+            SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH8BIT);
+            if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth8bit)) &&
+                (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bit))) {
+                error          = kStatus_Success;
+                card->busWidth = kMMC_DataBusWidth8bit;
+                break;
             }
+        }
 
-        case kMMC_DataBusWidth4bit:
-            if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support4BitBusWidth) &&
-                ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed200Timing)))
-            {
-                SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH4BIT);
-                if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth4bit)) &&
-                    (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth4bit)))
-                {
-                    error = kStatus_Success;
-                    card->busWidth = kMMC_DataBusWidth4bit;
-                    break;
-                }
-                /* HS200 mode only support 4bit/8bit data bus */
-                else if (targetTiming == kMMC_HighSpeed200Timing)
-                {
-                    return kStatus_SDMMC_SetDataBusWidthFailed;
-                }
+    case kMMC_DataBusWidth4bit:
+        if ((SDMMCHOST_NOT_SUPPORT != kSDMMCHOST_Support4BitBusWidth) &&
+            ((targetTiming == kMMC_HighSpeedTiming) || (targetTiming == kMMC_HighSpeed200Timing))) {
+            SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH4BIT);
+            if ((kStatus_Success == MMC_TestDataBusWidth(card, kMMC_DataBusWidth4bit)) &&
+                (kStatus_Success == MMC_SetDataBusWidth(card, kMMC_DataBusWidth4bit))) {
+                error          = kStatus_Success;
+                card->busWidth = kMMC_DataBusWidth4bit;
+                break;
             }
-        default:
-            break;
+            /* HS200 mode only support 4bit/8bit data bus */
+            else if (targetTiming == kMMC_HighSpeed200Timing) {
+                return kStatus_SDMMC_SetDataBusWidthFailed;
+            }
+        }
+    default:
+        break;
     }
 
-    if (error == kStatus_Fail)
-    {
+    if (error == kStatus_Fail) {
         /* Card's data bus width will be default 1 bit mode. */
         SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH1BIT);
     }
@@ -1477,8 +1382,7 @@ static status_t MMC_SwitchHSTiming(mmc_card_t *card, uint8_t timing, uint8_t dri
 
     /* check the target driver strength support or not */
     if (((card->extendedCsd.ioDriverStrength & (1 << driverStrength)) == 0U) &&
-        (card->extendedCsd.extendecCsdVersion >= kMMC_ExtendedCsdRevision17))
-    {
+        (card->extendedCsd.extendecCsdVersion >= kMMC_ExtendedCsdRevision17)) {
         return kStatus_SDMMC_NotSupportYet;
     }
     /* calucate the register value */
@@ -1486,11 +1390,10 @@ static status_t MMC_SwitchHSTiming(mmc_card_t *card, uint8_t timing, uint8_t dri
 
     /* Switch to high speed timing. */
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexHighSpeedTiming;
-    extendedCsdconfig.ByteValue = hsTiming;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexHighSpeedTiming;
+    extendedCsdconfig.ByteValue  = hsTiming;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
@@ -1531,25 +1434,21 @@ static status_t MMC_SwitchToHighSpeed(mmc_card_t *card)
     }
 #endif
 
-    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeedTiming, kMMC_DriverStrength0))
-    {
+    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeedTiming, kMMC_DriverStrength0)) {
         return kStatus_SDMMC_SwitchBusTimingFailed;
     }
 
-    if ((card->busWidth == kMMC_DataBusWidth4bitDDR) || (card->busWidth == kMMC_DataBusWidth8bitDDR))
-    {
+    if ((card->busWidth == kMMC_DataBusWidth4bitDDR) || (card->busWidth == kMMC_DataBusWidth8bitDDR)) {
         freq = MMC_CLOCK_DDR52;
         SDMMCHOST_ENABLE_DDR_MODE(card->host.base, true, 0U);
     }
-    else if (card->flags & kMMC_SupportHighSpeed52MHZFlag)
-    {
+    else if (card->flags & kMMC_SupportHighSpeed52MHZFlag) {
         freq = MMC_CLOCK_52MHZ;
     }
-    else if (card->flags & kMMC_SupportHighSpeed26MHZFlag)
-    {
+    else if (card->flags & kMMC_SupportHighSpeed26MHZFlag) {
         freq = MMC_CLOCK_26MHZ;
     }
-    //TODO: remove it when custom board arrives, currently 52Mhz is too much for eMMC micro adapter ://
+    // TODO: remove it when custom board arrives, currently 52Mhz is too much for eMMC micro adapter ://
     freq = MMC_CLOCK_26MHZ;
 
     card->busClock_Hz = SDMMCHOST_SET_CARD_CLOCK(card->host.base, card->host.sourceClock_Hz, freq);
@@ -1557,10 +1456,9 @@ static status_t MMC_SwitchToHighSpeed(mmc_card_t *card)
     SDMMCHOST_CONFIG_MMC_IO(CARD_BUS_FREQ_100MHZ1, CARD_BUS_STRENGTH_7);
 
     /* Set card data width, it is nessesary to config the the data bus here, to meet emmc5.0 specification,
-    * when you are working in DDR mode , HS_TIMING must set before set bus width
-    */
-    if (MMC_SetMaxDataBusWidth(card, kMMC_HighSpeedTiming) != kStatus_Success)
-    {
+     * when you are working in DDR mode , HS_TIMING must set before set bus width
+     */
+    if (MMC_SetMaxDataBusWidth(card, kMMC_HighSpeedTiming) != kStatus_Success) {
         return kStatus_SDMMC_SetDataBusWidthFailed;
     }
 
@@ -1575,38 +1473,31 @@ static status_t MMC_SwitchToHS200(mmc_card_t *card, uint32_t freq)
 
 #if 1
     /* check VCCQ voltage supply */
-    if (kSDMMCHOST_SupportV180 != SDMMCHOST_NOT_SUPPORT)
-    {
-        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow170to195)
-        {
+    if (kSDMMCHOST_SupportV180 != SDMMCHOST_NOT_SUPPORT) {
+        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow170to195) {
             SDMMCHOST_SWITCH_VOLTAGE180V(card->host.base, true);
             card->hostVoltageWindowVCCQ = kMMC_VoltageWindow170to195;
         }
     }
-    else if (kSDMMCHOST_SupportV120 != SDMMCHOST_NOT_SUPPORT)
-    {
-        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow120)
-        {
+    else if (kSDMMCHOST_SupportV120 != SDMMCHOST_NOT_SUPPORT) {
+        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow120) {
             SDMMCHOST_SWITCH_VOLTAGE120V(card->host.base, true);
             card->hostVoltageWindowVCCQ = kMMC_VoltageWindow120;
         }
     }
-    else
-    {
+    else {
         return kStatus_SDMMC_InvalidVoltage;
     }
 
 #endif
 
     /* select bus width before select bus timing for HS200 mode */
-    if (MMC_SetMaxDataBusWidth(card, kMMC_HighSpeed200Timing) != kStatus_Success)
-    {
+    if (MMC_SetMaxDataBusWidth(card, kMMC_HighSpeed200Timing) != kStatus_Success) {
         return kStatus_SDMMC_SetDataBusWidthFailed;
     }
 
     /* switch to HS200 mode */
-    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeed200Timing, kMMC_DriverStrength0))
-    {
+    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeed200Timing, kMMC_DriverStrength0)) {
         return kStatus_SDMMC_SwitchBusTimingFailed;
     }
 
@@ -1615,14 +1506,12 @@ static status_t MMC_SwitchToHS200(mmc_card_t *card, uint32_t freq)
     SDMMCHOST_CONFIG_MMC_IO(CARD_BUS_FREQ_200MHZ, CARD_BUS_STRENGTH_7);
 
     /* excute tuning for HS200 */
-    if (MMC_ExecuteTuning(card) != kStatus_Success)
-    {
+    if (MMC_ExecuteTuning(card) != kStatus_Success) {
         return kStatus_SDMMC_TuningFail;
     }
 
     /* Wait for the card status ready. */
-    if (kStatus_Success != MMC_WaitWriteComplete(card))
-    {
+    if (kStatus_Success != MMC_WaitWriteComplete(card)) {
         return kStatus_SDMMC_WaitWriteCompleteFailed;
     }
 
@@ -1636,30 +1525,24 @@ static status_t MMC_SwitchToHS400(mmc_card_t *card)
     assert(card);
 
     /* check VCCQ voltage supply */
-    if (kSDMMCHOST_SupportV180 != SDMMCHOST_NOT_SUPPORT)
-    {
-        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow170to195)
-        {
+    if (kSDMMCHOST_SupportV180 != SDMMCHOST_NOT_SUPPORT) {
+        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow170to195) {
             SDMMCHOST_SWITCH_VOLTAGE180V(card->host.base, true);
             card->hostVoltageWindowVCCQ = kMMC_VoltageWindow170to195;
         }
     }
-    else if (kSDMMCHOST_SupportV120 != SDMMCHOST_NOT_SUPPORT)
-    {
-        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow120)
-        {
+    else if (kSDMMCHOST_SupportV120 != SDMMCHOST_NOT_SUPPORT) {
+        if (card->hostVoltageWindowVCCQ != kMMC_VoltageWindow120) {
             SDMMCHOST_SWITCH_VOLTAGE120V(card->host.base, true);
             card->hostVoltageWindowVCCQ = kMMC_VoltageWindow120;
         }
     }
-    else
-    {
+    else {
         return kStatus_SDMMC_InvalidVoltage;
     }
 
     /* check data bus width is 8 bit , otherwise return false */
-    if (card->busWidth == kMMC_DataBusWidth8bit)
-    {
+    if (card->busWidth == kMMC_DataBusWidth8bit) {
         return kStatus_SDMMC_SwitchBusTimingFailed;
     }
 
@@ -1667,19 +1550,16 @@ static status_t MMC_SwitchToHS400(mmc_card_t *card)
     card->busClock_Hz = SDMMCHOST_SET_CARD_CLOCK(card->host.base, card->host.sourceClock_Hz, MMC_CLOCK_52MHZ);
     SDMMCHOST_CONFIG_MMC_IO(CARD_BUS_FREQ_100MHZ1, CARD_BUS_STRENGTH_5);
     /*switch to high speed*/
-    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeedTiming, kMMC_DriverStrength0))
-    {
+    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeedTiming, kMMC_DriverStrength0)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
     card->busTiming = kMMC_HighSpeed400Timing;
     /* switch to 8 bit DDR data bus width */
-    if (kStatus_Success != MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bitDDR))
-    {
+    if (kStatus_Success != MMC_SetDataBusWidth(card, kMMC_DataBusWidth8bitDDR)) {
         return kStatus_SDMMC_SetDataBusWidthFailed;
     }
     /* switch to HS400 */
-    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeed400Timing, kMMC_DriverStrength0))
-    {
+    if (kStatus_Success != MMC_SwitchHSTiming(card, kMMC_HighSpeed400Timing, kMMC_DriverStrength0)) {
         return kStatus_SDMMC_SwitchBusTimingFailed;
     }
     /* config to target freq */
@@ -1692,8 +1572,8 @@ static status_t MMC_SwitchToHS400(mmc_card_t *card)
     /* enable DDR mode */
     SDMMCHOST_ENABLE_DDR_MODE(card->host.base, true, 0U);
     /* config strobe DLL */
-    SDMMCHOST_CONFIG_STROBE_DLL(card->host.base, SDMMCHOST_STROBE_DLL_DELAY_TARGET,
-                                SDMMCHOST_STROBE_DLL_DELAY_UPDATE_INTERVAL);
+    SDMMCHOST_CONFIG_STROBE_DLL(
+        card->host.base, SDMMCHOST_STROBE_DLL_DELAY_TARGET, SDMMCHOST_STROBE_DLL_DELAY_UPDATE_INTERVAL);
     /* enable DLL */
     SDMMCHOST_ENABLE_STROBE_DLL(card->host.base, true);
 
@@ -1706,44 +1586,37 @@ static status_t MMC_SelectBusTiming(mmc_card_t *card)
 
     mmc_high_speed_timing_t targetTiming = card->busTiming;
 
-    switch (targetTiming)
-    {
-        case kMMC_HighSpeedTimingNone:
-        case kMMC_HighSpeed400Timing:
-            if ((card->flags & (kMMC_SupportHS400DDR200MHZ180VFlag | kMMC_SupportHS400DDR200MHZ120VFlag)) &&
-                ((kSDMMCHOST_SupportHS400 != SDMMCHOST_NOT_SUPPORT)))
-            {
-                /* switch to HS200 perform tuning */
-                if (kStatus_Success != MMC_SwitchToHS200(card, SDMMCHOST_SUPPORT_HS400_FREQ / 2U))
-                {
-                    return kStatus_SDMMC_SwitchBusTimingFailed;
-                }
-                /* switch to HS400 */
-                if (kStatus_Success != MMC_SwitchToHS400(card))
-                {
-                    return kStatus_SDMMC_SwitchBusTimingFailed;
-                }
-                break;
+    switch (targetTiming) {
+    case kMMC_HighSpeedTimingNone:
+    case kMMC_HighSpeed400Timing:
+        if ((card->flags & (kMMC_SupportHS400DDR200MHZ180VFlag | kMMC_SupportHS400DDR200MHZ120VFlag)) &&
+            ((kSDMMCHOST_SupportHS400 != SDMMCHOST_NOT_SUPPORT))) {
+            /* switch to HS200 perform tuning */
+            if (kStatus_Success != MMC_SwitchToHS200(card, SDMMCHOST_SUPPORT_HS400_FREQ / 2U)) {
+                return kStatus_SDMMC_SwitchBusTimingFailed;
             }
-        case kMMC_HighSpeed200Timing:
-            if ((card->flags & (kMMC_SupportHS200200MHZ180VFlag | kMMC_SupportHS200200MHZ120VFlag)) &&
-                ((kSDMMCHOST_SupportHS200 != SDMMCHOST_NOT_SUPPORT)))
-            {
-                if (kStatus_Success != MMC_SwitchToHS200(card, SDMMCHOST_SUPPORT_HS200_FREQ))
-                {
-                    return kStatus_SDMMC_SwitchBusTimingFailed;
-                }
-                break;
-            }
-        case kMMC_HighSpeedTiming:
-            if (kStatus_Success != MMC_SwitchToHighSpeed(card))
-            {
+            /* switch to HS400 */
+            if (kStatus_Success != MMC_SwitchToHS400(card)) {
                 return kStatus_SDMMC_SwitchBusTimingFailed;
             }
             break;
+        }
+    case kMMC_HighSpeed200Timing:
+        if ((card->flags & (kMMC_SupportHS200200MHZ180VFlag | kMMC_SupportHS200200MHZ120VFlag)) &&
+            ((kSDMMCHOST_SupportHS200 != SDMMCHOST_NOT_SUPPORT))) {
+            if (kStatus_Success != MMC_SwitchToHS200(card, SDMMCHOST_SUPPORT_HS200_FREQ)) {
+                return kStatus_SDMMC_SwitchBusTimingFailed;
+            }
+            break;
+        }
+    case kMMC_HighSpeedTiming:
+        if (kStatus_Success != MMC_SwitchToHighSpeed(card)) {
+            return kStatus_SDMMC_SwitchBusTimingFailed;
+        }
+        break;
 
-        default:
-            card->busTiming = kMMC_HighSpeedTimingNone;
+    default:
+        card->busTiming = kMMC_HighSpeedTimingNone;
     }
 
     return kStatus_Success;
@@ -1756,9 +1629,9 @@ static void MMC_DecodeCid(mmc_card_t *card, uint32_t *rawCid)
 
     mmc_cid_t *cid;
 
-    cid = &(card->cid);
+    cid                 = &(card->cid);
     cid->manufacturerID = (uint8_t)((rawCid[3U] & 0xFF000000U) >> 24U);
-    cid->applicationID = (uint16_t)((rawCid[3U] & 0xFFFF00U) >> 8U);
+    cid->applicationID  = (uint16_t)((rawCid[3U] & 0xFFFF00U) >> 8U);
 
     cid->productName[0U] = (uint8_t)((rawCid[3U] & 0xFFU));
     cid->productName[1U] = (uint8_t)((rawCid[2U] & 0xFF000000U) >> 24U);
@@ -1780,16 +1653,15 @@ static status_t MMC_AllSendCid(mmc_card_t *card)
     assert(card->host.transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_AllSendCid;
-    command.argument = 0U;
+    command.index        = kSDMMC_AllSendCid;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeR2;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success == card->host.transfer(card->host.base, &content))
-    {
+    content.data    = NULL;
+    if (kStatus_Success == card->host.transfer(card->host.base, &content)) {
         memcpy(card->rawCid, command.response, sizeof(card->rawCid));
         MMC_DecodeCid(card, command.response);
 
@@ -1804,17 +1676,16 @@ static status_t MMC_SendCsd(mmc_card_t *card)
     assert(card);
     assert(card->host.transfer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
 
-    command.index = kSDMMC_SendCsd;
-    command.argument = (card->relativeAddress << 16U);
+    command.index        = kSDMMC_SendCsd;
+    command.argument     = (card->relativeAddress << 16U);
     command.responseType = kCARD_ResponseTypeR2;
 
     content.command = &command;
-    content.data = 0U;
-    if (kStatus_Success == card->host.transfer(card->host.base, &content))
-    {
+    content.data    = 0U;
+    if (kStatus_Success == card->host.transfer(card->host.base, &content)) {
         memcpy(card->rawCsd, command.response, sizeof(card->rawCsd));
         /* The response is from bit 127:8 in R2, corresponding to command.response[3][31:0] to
         command.response[0U][31:8]. */
@@ -1834,30 +1705,26 @@ static status_t MMC_CheckBlockRange(mmc_card_t *card, uint32_t startBlock, uint3
     status_t error = kStatus_Success;
     uint32_t partitionBlocks;
 
-    switch (card->currentPartition)
-    {
-        case kMMC_AccessPartitionUserAera:
-        {
-            partitionBlocks = card->userPartitionBlocks;
-            break;
-        }
-        case kMMC_AccessPartitionBoot1:
-        case kMMC_AccessPartitionBoot2:
-        {
-            /* Boot partition 1 and partition 2 have the same partition size. */
-            partitionBlocks = card->bootPartitionBlocks;
-            break;
-        }
-        case kMMC_AccessGeneralPurposePartition1:
-        	partitionBlocks = card->systemPartitionBlocks;
-        	break;
-        default:
-            error = kStatus_InvalidArgument;
-            break;
+    switch (card->currentPartition) {
+    case kMMC_AccessPartitionUserAera: {
+        partitionBlocks = card->userPartitionBlocks;
+        break;
+    }
+    case kMMC_AccessPartitionBoot1:
+    case kMMC_AccessPartitionBoot2: {
+        /* Boot partition 1 and partition 2 have the same partition size. */
+        partitionBlocks = card->bootPartitionBlocks;
+        break;
+    }
+    case kMMC_AccessGeneralPurposePartition1:
+        partitionBlocks = card->systemPartitionBlocks;
+        break;
+    default:
+        error = kStatus_InvalidArgument;
+        break;
     }
     /* Check if the block range accessed is within current partition's block boundary. */
-    if ((error == kStatus_Success) && ((startBlock + blockCount) > partitionBlocks))
-    {
+    if ((error == kStatus_Success) && ((startBlock + blockCount) > partitionBlocks)) {
         error = kStatus_InvalidArgument;
     }
 
@@ -1872,41 +1739,34 @@ static status_t MMC_CheckEraseGroupRange(mmc_card_t *card, uint32_t startGroup,
     uint32_t partitionBlocks;
     uint32_t eraseGroupBoundary;
 
-    switch (card->currentPartition)
-    {
-        case kMMC_AccessPartitionUserAera:
-        {
-            partitionBlocks = card->userPartitionBlocks;
-            break;
-        }
-        case kMMC_AccessPartitionBoot1:
-        case kMMC_AccessPartitionBoot2:
-        {
-            /* Boot partition 1 and partition 2 have the same partition size. */
-            partitionBlocks = card->bootPartitionBlocks;
-            break;
-        }
-        default:
-            error = kStatus_InvalidArgument;
-            break;
+    switch (card->currentPartition) {
+    case kMMC_AccessPartitionUserAera: {
+        partitionBlocks = card->userPartitionBlocks;
+        break;
+    }
+    case kMMC_AccessPartitionBoot1:
+    case kMMC_AccessPartitionBoot2: {
+        /* Boot partition 1 and partition 2 have the same partition size. */
+        partitionBlocks = card->bootPartitionBlocks;
+        break;
+    }
+    default:
+        error = kStatus_InvalidArgument;
+        break;
     }
 
-    if (error == kStatus_Success)
-    {
+    if (error == kStatus_Success) {
         /* Check if current partition's total block count is integer multiples of the erase group size. */
-        if ((partitionBlocks % card->eraseGroupBlocks) == 0U)
-        {
+        if ((partitionBlocks % card->eraseGroupBlocks) == 0U) {
             eraseGroupBoundary = (partitionBlocks / card->eraseGroupBlocks);
         }
-        else
-        {
+        else {
             /* Card will ignore the unavailable blocks within the last erase group automatically. */
             eraseGroupBoundary = (partitionBlocks / card->eraseGroupBlocks + 1U);
         }
 
         /* Check if the group range accessed is within current partition's erase group boundary. */
-        if ((startGroup > eraseGroupBoundary) || (endGroup > eraseGroupBoundary))
-        {
+        if ((startGroup > eraseGroupBoundary) || (endGroup > eraseGroupBoundary)) {
             error = kStatus_InvalidArgument;
         }
     }
@@ -1924,45 +1784,38 @@ static status_t MMC_Read(
     assert(blockSize);
     assert(blockSize == FSL_SDMMC_DEFAULT_BLOCK_SIZE);
 
-    SDMMCHOST_COMMAND command = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_COMMAND command  = {0};
+    SDMMCHOST_DATA data        = {0};
     SDMMCHOST_TRANSFER content = {0};
     status_t error;
 
     if (((card->flags & kMMC_SupportHighCapacityFlag) && (blockSize != 512U)) || (blockSize > card->blockSize) ||
-        (blockSize > card->host.capability.maxBlockLength) || (blockSize % 4U))
-    {
+        (blockSize > card->host.capability.maxBlockLength) || (blockSize % 4U)) {
         return kStatus_SDMMC_CardNotSupport;
     }
 
     /* Wait for the card write process complete because of that card read process and write process use one buffer. */
-    if (kStatus_Success != MMC_WaitWriteComplete(card))
-    {
+    if (kStatus_Success != MMC_WaitWriteComplete(card)) {
         return kStatus_SDMMC_WaitWriteCompleteFailed;
     }
 
     /* Set block size */
-    if (kStatus_Success != MMC_SetBlockSize(card, FSL_SDMMC_DEFAULT_BLOCK_SIZE))
-    {
+    if (kStatus_Success != MMC_SetBlockSize(card, FSL_SDMMC_DEFAULT_BLOCK_SIZE)) {
         return kStatus_SDMMC_SetBlockCountFailed;
     }
 
-    data.blockSize = blockSize;
-    data.blockCount = blockCount;
-    data.rxData = (uint32_t *)buffer;
+    data.blockSize           = blockSize;
+    data.blockCount          = blockCount;
+    data.rxData              = (uint32_t *)buffer;
     data.enableAutoCommand12 = true;
-    command.index = kSDMMC_ReadMultipleBlock;
-    if (data.blockCount == 1U)
-    {
+    command.index            = kSDMMC_ReadMultipleBlock;
+    if (data.blockCount == 1U) {
         command.index = kSDMMC_ReadSingleBlock;
     }
-    else
-    {
-        if ((!(data.enableAutoCommand12)) && (card->enablePreDefinedBlockCount))
-        {
+    else {
+        if ((!(data.enableAutoCommand12)) && (card->enablePreDefinedBlockCount)) {
             /* If enabled the pre-define count read/write feature of the card, need to set block count firstly. */
-            if (kStatus_Success != MMC_SetBlockCount(card, blockCount))
-            {
+            if (kStatus_Success != MMC_SetBlockCount(card, blockCount)) {
                 return kStatus_SDMMC_SetBlockCountFailed;
             }
         }
@@ -1977,25 +1830,22 @@ static status_t MMC_Read(
         //command.argument *= data.blockSize;
     }
 #endif
-    command.responseType = kCARD_ResponseTypeR1;
+    command.responseType       = kCARD_ResponseTypeR1;
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag;
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
 
     /* should check tuning error during every transfer */
     error = MMC_Transfer(card, &content, 1U);
-    if (kStatus_Success != error)
-    {
+    if (kStatus_Success != error) {
         return error;
     }
 
     /* When host's AUTO_COMMAND12 feature isn't enabled and PRE_DEFINED_COUNT command isn't enabled in multiple
     blocks transmission, sends STOP_TRANSMISSION command. */
-    if ((blockCount > 1U) && (!(data.enableAutoCommand12)) && (!card->enablePreDefinedBlockCount))
-    {
-        if (kStatus_Success != MMC_StopTransmission(card))
-        {
+    if ((blockCount > 1U) && (!(data.enableAutoCommand12)) && (!card->enablePreDefinedBlockCount)) {
+        if (kStatus_Success != MMC_StopTransmission(card)) {
             return kStatus_SDMMC_StopTransmissionFailed;
         }
     }
@@ -2013,52 +1863,43 @@ static status_t MMC_Write(
     assert(blockSize);
     assert(blockSize == FSL_SDMMC_DEFAULT_BLOCK_SIZE);
 
-    SDMMCHOST_COMMAND command = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_COMMAND command  = {0};
+    SDMMCHOST_DATA data        = {0};
     SDMMCHOST_TRANSFER content = {0};
     status_t error;
 
     /* Check address range */
     if (((card->flags & kMMC_SupportHighCapacityFlag) && (blockSize != 512U)) || (blockSize > card->blockSize) ||
-        (blockSize > card->host.capability.maxBlockLength) || (blockSize % 4U))
-    {
+        (blockSize > card->host.capability.maxBlockLength) || (blockSize % 4U)) {
         return kStatus_SDMMC_CardNotSupport;
     }
 
     /* Wait for the card's buffer to be not full to write to improve the write performance. */
-    while ((GET_SDMMCHOST_STATUS(card->host.base) & CARD_DATA0_STATUS_MASK) != CARD_DATA0_NOT_BUSY)
-    {
-    }
+    while ((GET_SDMMCHOST_STATUS(card->host.base) & CARD_DATA0_STATUS_MASK) != CARD_DATA0_NOT_BUSY) {}
 
     /* Wait for the card write process complete */
-    if (kStatus_Success != MMC_WaitWriteComplete(card))
-    {
+    if (kStatus_Success != MMC_WaitWriteComplete(card)) {
         return kStatus_SDMMC_WaitWriteCompleteFailed;
     }
 
     /* Set block size */
-    if (kStatus_Success != MMC_SetBlockSize(card, FSL_SDMMC_DEFAULT_BLOCK_SIZE))
-    {
+    if (kStatus_Success != MMC_SetBlockSize(card, FSL_SDMMC_DEFAULT_BLOCK_SIZE)) {
         return kStatus_SDMMC_SetBlockCountFailed;
     }
 
-    data.blockSize = blockSize;
-    data.blockCount = blockCount;
-    data.txData = (const uint32_t *)buffer;
+    data.blockSize           = blockSize;
+    data.blockCount          = blockCount;
+    data.txData              = (const uint32_t *)buffer;
     data.enableAutoCommand12 = true;
 
     command.index = kSDMMC_WriteMultipleBlock;
-    if (data.blockCount == 1U)
-    {
+    if (data.blockCount == 1U) {
         command.index = kSDMMC_WriteSingleBlock;
     }
-    else
-    {
-        if ((!(data.enableAutoCommand12)) && (card->enablePreDefinedBlockCount))
-        {
+    else {
+        if ((!(data.enableAutoCommand12)) && (card->enablePreDefinedBlockCount)) {
             /* If enabled the pre-define count read/write featue of the card, need to set block count firstly */
-            if (kStatus_Success != MMC_SetBlockCount(card, blockCount))
-            {
+            if (kStatus_Success != MMC_SetBlockCount(card, blockCount)) {
                 return kStatus_SDMMC_SetBlockCountFailed;
             }
         }
@@ -2073,25 +1914,22 @@ static status_t MMC_Write(
         //command.argument *= blockSize;
     }
 #endif
-    command.responseType = kCARD_ResponseTypeR1;
+    command.responseType       = kCARD_ResponseTypeR1;
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag;
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
 
     /* should check tuning error during every transfer */
     error = MMC_Transfer(card, &content, 1U);
-    if (kStatus_Success != error)
-    {
+    if (kStatus_Success != error) {
         return error;
     }
 
     /* When host's AUTO_COMMAND12 feature isn't enabled and PRE_DEFINED_COUNT command isn't enabled in multiple
     blocks transmission, sends STOP_TRANSMISSION command. */
-    if ((blockCount > 1U) && (!(data.enableAutoCommand12)) && (!card->enablePreDefinedBlockCount))
-    {
-        if (kStatus_Success != MMC_StopTransmission(card))
-        {
+    if ((blockCount > 1U) && (!(data.enableAutoCommand12)) && (!card->enablePreDefinedBlockCount)) {
+        if (kStatus_Success != MMC_StopTransmission(card)) {
             return kStatus_SDMMC_StopTransmissionFailed;
         }
     }
@@ -2099,35 +1937,35 @@ static status_t MMC_Write(
     return kStatus_Success;
 }
 
-static void MMC_CalculateMultiplier(uint32_t multiplier,uint8_t multisplit[3])
+static void MMC_CalculateMultiplier(uint32_t multiplier, uint8_t multisplit[3])
 {
-	uint8_t* multi2x16 = &multisplit[2];
-	uint8_t* multi2x8 = &multisplit[1];
-	uint8_t* multi2x0 = &multisplit[0];
-	//at first check if required multiplier is bigger or equal to 256
-	if(multiplier >= 256){
-		*multi2x16 = multiplier/256;
+    uint8_t *multi2x16 = &multisplit[2];
+    uint8_t *multi2x8  = &multisplit[1];
+    uint8_t *multi2x0  = &multisplit[0];
+    // at first check if required multiplier is bigger or equal to 256
+    if (multiplier >= 256) {
+        *multi2x16 = multiplier / 256;
 
-		//if remainder from 256 divide is bigger than 64 ?
-		if((multiplier%256) >= 64){
-			*multi2x8 = (multiplier%256)/64;
-			*multi2x0 = ((multiplier%256)%64);
-		}
-	}
-	else if(multiplier >= 64){
-		*multi2x16 = multiplier/64;
-		*multi2x0 = multiplier%64;
-	}else{
-		*multi2x0 = multiplier;
-	}
+        // if remainder from 256 divide is bigger than 64 ?
+        if ((multiplier % 256) >= 64) {
+            *multi2x8 = (multiplier % 256) / 64;
+            *multi2x0 = ((multiplier % 256) % 64);
+        }
+    }
+    else if (multiplier >= 64) {
+        *multi2x16 = multiplier / 64;
+        *multi2x0  = multiplier % 64;
+    }
+    else {
+        *multi2x0 = multiplier;
+    }
 }
 
 status_t MMC_CardInit(mmc_card_t *card)
 {
     assert(card);
 
-    if (!card->isHostReady)
-    {
+    if (!card->isHostReady) {
         return kStatus_SDMMC_HostNotReady;
     }
     /* set DATA bus width */
@@ -2138,44 +1976,37 @@ status_t MMC_CardInit(mmc_card_t *card)
     GET_SDMMCHOST_CAPABILITY(card->host.base, &(card->host.capability));
 
     /* Send CMD0 to reset the bus */
-    if (kStatus_Success != MMC_GoIdle(card))
-    {
+    if (kStatus_Success != MMC_GoIdle(card)) {
         return kStatus_SDMMC_GoIdleFailed;
     }
 
-    if (kStatus_Success != MMC_SendIdentifyDevice(card,keMMC_HIGH_VOLTAGE_RANGE))
-    {
-    	return kStatus_SDMMC_NotSupportYet;
+    if (kStatus_Success != MMC_SendIdentifyDevice(card, keMMC_HIGH_VOLTAGE_RANGE)) {
+        return kStatus_SDMMC_NotSupportYet;
     }
 
     /* Get card CID */
-    if (kStatus_Success != MMC_AllSendCid(card))
-    {
+    if (kStatus_Success != MMC_AllSendCid(card)) {
         return kStatus_SDMMC_AllSendCidFailed;
     }
 
     /* Set the card relative address */
-    if (kStatus_Success != MMC_SetRelativeAddress(card))
-    {
+    if (kStatus_Success != MMC_SetRelativeAddress(card)) {
         return kStatus_SDMMC_SetRelativeAddressFailed;
     }
 
     /* Get the CSD register content */
-    if (kStatus_Success != MMC_SendCsd(card))
-    {
+    if (kStatus_Success != MMC_SendCsd(card)) {
         return kStatus_SDMMC_SendCsdFailed;
     }
 
     /* Send CMD7 with the card's relative address to place the card in transfer state. Puts current selected card in
     transfer state. */
-    if (kStatus_Success != MMC_SelectCard(card, true))
-    {
+    if (kStatus_Success != MMC_SelectCard(card, true)) {
         return kStatus_SDMMC_SelectCardFailed;
     }
 
     /* Get Extended CSD register content. */
-    if (kStatus_Success != MMC_SendExtendedCsd(card, NULL, 0U))
-    {
+    if (kStatus_Success != MMC_SendExtendedCsd(card, NULL, 0U)) {
         return kStatus_SDMMC_SendExtendedCsdFailed;
     }
 
@@ -2183,11 +2014,10 @@ status_t MMC_CardInit(mmc_card_t *card)
 
     /* Set Erase Group Definition Bit to 1 */
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexEraseGroupDefinition;
-    extendedCsdconfig.ByteValue = 1;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexEraseGroupDefinition;
+    extendedCsdconfig.ByteValue  = 1;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
@@ -2198,25 +2028,24 @@ status_t MMC_CardInit(mmc_card_t *card)
     }
 #endif
 
-    if (kStatus_Success != MMC_SelectBusTiming(card))
-    {
-    	return kStatus_SDMMC_SwitchBusTimingFailed;
+    if (kStatus_Success != MMC_SelectBusTiming(card)) {
+        return kStatus_SDMMC_SwitchBusTimingFailed;
     }
 
-    //check if system partition configured
-    if(card->extendedCsd.generalPartition1Multi0 ||
-    		card->extendedCsd.generalPartition1Multi1 ||
-			card->extendedCsd.generalPartition1Multi2){
+    // check if system partition configured
+    if (card->extendedCsd.generalPartition1Multi0 || card->extendedCsd.generalPartition1Multi1 ||
+        card->extendedCsd.generalPartition1Multi2) {
 
         /* Calculate system partition block count */
-        card->systemPartitionBlocks = ((512*1024)*card->extendedCsd.highCapacityWriteProtectGroupSize*
-		card->extendedCsd.highCapacityEraseUnitSize *
-		(card->extendedCsd.generalPartition1Multi0 ? card->extendedCsd.generalPartition1Multi0: 1) *
-		(card->extendedCsd.generalPartition1Multi1 ? card->extendedCsd.generalPartition1Multi1*64: 1) *
-		(card->extendedCsd.generalPartition1Multi2 ? card->extendedCsd.generalPartition1Multi2*256: 1))/FSL_SDMMC_DEFAULT_BLOCK_SIZE;
+        card->systemPartitionBlocks =
+            ((512 * 1024) * card->extendedCsd.highCapacityWriteProtectGroupSize *
+             card->extendedCsd.highCapacityEraseUnitSize *
+             (card->extendedCsd.generalPartition1Multi0 ? card->extendedCsd.generalPartition1Multi0 : 1) *
+             (card->extendedCsd.generalPartition1Multi1 ? card->extendedCsd.generalPartition1Multi1 * 64 : 1) *
+             (card->extendedCsd.generalPartition1Multi2 ? card->extendedCsd.generalPartition1Multi2 * 256 : 1)) /
+            FSL_SDMMC_DEFAULT_BLOCK_SIZE;
     }
 
-
     /* Set card default to access non-boot partition */
     card->currentPartition = kMMC_AccessPartitionUserAera;
 
@@ -2234,8 +2063,7 @@ status_t MMC_HostInit(mmc_card_t *card)
 {
     assert(card);
 
-    if ((!card->isHostReady) && SDMMCHOST_Init(&(card->host), NULL) != kStatus_Success)
-    {
+    if ((!card->isHostReady) && SDMMCHOST_Init(&(card->host), NULL) != kStatus_Success) {
         return kStatus_Fail;
     }
 
@@ -2266,15 +2094,12 @@ status_t MMC_Init(mmc_card_t *card)
     /* reset the host */
     MMC_HostReset(&(card->host));
 
-    if (!card->isHostReady)
-    {
-        if (MMC_HostInit(card) != kStatus_Success)
-        {
+    if (!card->isHostReady) {
+        if (MMC_HostInit(card) != kStatus_Success) {
             return kStatus_SDMMC_HostNotReady;
         }
     }
-    else
-    {
+    else {
         /* reset the host */
         MMC_HostReset(&(card->host));
     }
@@ -2310,17 +2135,16 @@ status_t MMC_SelectPartition(mmc_card_t *card, mmc_access_partition_t partitionN
     bootConfig |= ((uint32_t)partitionNumber << MMC_PARTITION_CONFIG_PARTITION_ACCESS_SHIFT);
 
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexPartitionConfig;
-    extendedCsdconfig.ByteValue = bootConfig;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexPartitionConfig;
+    extendedCsdconfig.ByteValue  = bootConfig;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
     /* Save current configuration. */
     card->extendedCsd.partitionConfig = bootConfig;
-    card->currentPartition = partitionNumber;
+    card->currentPartition            = partitionNumber;
 
     return kStatus_Success;
 }
@@ -2339,45 +2163,40 @@ status_t MMC_ReadBlocks(mmc_card_t *card, uint8_t *buffer, uint32_t startBlock,
 
     blockLeft = blockCount;
     blockDone = 0U;
-    if (kStatus_Success != MMC_CheckBlockRange(card, startBlock, blockCount))
-    {
+    if (kStatus_Success != MMC_CheckBlockRange(card, startBlock, blockCount)) {
         return kStatus_InvalidArgument;
     }
 
-    while (blockLeft)
-    {
+    while (blockLeft) {
         nextBuffer = (buffer + blockDone * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
-        if (!card->noInteralAlign && (!dataAddrAlign || (((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U))))
-        {
+        if (!card->noInteralAlign && (!dataAddrAlign || (((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U)))) {
             blockLeft--;
             blockCountOneTime = 1U;
             memset(g_sdmmc, 0U, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
             dataAddrAlign = false;
         }
-        else
-        {
-            if (blockLeft > card->host.capability.maxBlockCount)
-            {
-                blockLeft = (blockLeft - card->host.capability.maxBlockCount);
+        else {
+            if (blockLeft > card->host.capability.maxBlockCount) {
+                blockLeft         = (blockLeft - card->host.capability.maxBlockCount);
                 blockCountOneTime = card->host.capability.maxBlockCount;
             }
-            else
-            {
+            else {
                 blockCountOneTime = blockLeft;
-                blockLeft = 0U;
+                blockLeft         = 0U;
             }
         }
 
-        if (kStatus_Success != MMC_Read(card, dataAddrAlign ? nextBuffer : (uint8_t *)g_sdmmc, (startBlock + blockDone),
-                                        FSL_SDMMC_DEFAULT_BLOCK_SIZE, blockCountOneTime))
-        {
+        if (kStatus_Success != MMC_Read(card,
+                                        dataAddrAlign ? nextBuffer : (uint8_t *)g_sdmmc,
+                                        (startBlock + blockDone),
+                                        FSL_SDMMC_DEFAULT_BLOCK_SIZE,
+                                        blockCountOneTime)) {
             return kStatus_SDMMC_TransferFailed;
         }
 
         blockDone += blockCountOneTime;
 
-        if (!card->noInteralAlign && (!dataAddrAlign))
-        {
+        if (!card->noInteralAlign && (!dataAddrAlign)) {
             memcpy(nextBuffer, (uint8_t *)&g_sdmmc, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
         }
     }
@@ -2400,44 +2219,39 @@ status_t MMC_WriteBlocks(mmc_card_t *card, const uint8_t *buffer, uint32_t start
     blockLeft = blockCount;
     blockDone = 0U;
 
-    if (kStatus_Success != MMC_CheckBlockRange(card, startBlock, blockCount))
-    {
+    if (kStatus_Success != MMC_CheckBlockRange(card, startBlock, blockCount)) {
         return kStatus_InvalidArgument;
     }
 
-    while (blockLeft)
-    {
+    while (blockLeft) {
         nextBuffer = (buffer + blockDone * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
-        if (!card->noInteralAlign && (!dataAddrAlign || (((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U))))
-        {
+        if (!card->noInteralAlign && (!dataAddrAlign || (((uint32_t)nextBuffer) & (sizeof(uint32_t) - 1U)))) {
             blockLeft--;
             blockCountOneTime = 1U;
             memcpy((uint8_t *)&g_sdmmc, nextBuffer, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
             dataAddrAlign = false;
         }
-        else
-        {
-            if (blockLeft > card->host.capability.maxBlockCount)
-            {
-                blockLeft = (blockLeft - card->host.capability.maxBlockCount);
+        else {
+            if (blockLeft > card->host.capability.maxBlockCount) {
+                blockLeft         = (blockLeft - card->host.capability.maxBlockCount);
                 blockCountOneTime = card->host.capability.maxBlockCount;
             }
-            else
-            {
+            else {
                 blockCountOneTime = blockLeft;
-                blockLeft = 0U;
+                blockLeft         = 0U;
             }
         }
 
-        if (kStatus_Success != MMC_Write(card, dataAddrAlign ? nextBuffer : (uint8_t *)g_sdmmc,
-                                         (startBlock + blockDone), FSL_SDMMC_DEFAULT_BLOCK_SIZE, blockCountOneTime))
-        {
+        if (kStatus_Success != MMC_Write(card,
+                                         dataAddrAlign ? nextBuffer : (uint8_t *)g_sdmmc,
+                                         (startBlock + blockDone),
+                                         FSL_SDMMC_DEFAULT_BLOCK_SIZE,
+                                         blockCountOneTime)) {
             return kStatus_SDMMC_TransferFailed;
         }
 
         blockDone += blockCountOneTime;
-        if (!card->noInteralAlign)
-        {
+        if (!card->noInteralAlign) {
             memset(g_sdmmc, 0U, FSL_SDMMC_DEFAULT_BLOCK_SIZE);
         }
     }
@@ -2452,158 +2266,142 @@ status_t MMC_EraseGroups(mmc_card_t *card, uint32_t startGroup, uint32_t endGrou
 
     uint32_t startGroupAddress;
     uint32_t endGroupAddress;
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
 
-    if (kStatus_Success != MMC_CheckEraseGroupRange(card, startGroup, endGroup))
-    {
+    if (kStatus_Success != MMC_CheckEraseGroupRange(card, startGroup, endGroup)) {
         return kStatus_InvalidArgument;
     }
 
     /* Wait for the card's buffer to be not full to write to improve the write performance. */
-    while ((GET_SDMMCHOST_STATUS(card->host.base) & CARD_DATA0_STATUS_MASK) != CARD_DATA0_NOT_BUSY)
-    {
-    }
+    while ((GET_SDMMCHOST_STATUS(card->host.base) & CARD_DATA0_STATUS_MASK) != CARD_DATA0_NOT_BUSY) {}
 
-    if (kStatus_Success != MMC_WaitWriteComplete(card))
-    {
+    if (kStatus_Success != MMC_WaitWriteComplete(card)) {
         return kStatus_SDMMC_WaitWriteCompleteFailed;
     }
 
     /* Calculate the start group address and end group address */
     startGroupAddress = startGroup;
-    endGroupAddress = endGroup;
-    if (card->flags & kMMC_SupportHighCapacityFlag)
-    {
+    endGroupAddress   = endGroup;
+    if (card->flags & kMMC_SupportHighCapacityFlag) {
         /* The implementation of a higher than 2GB of density of memory will not be backwards compatible with the
         lower densities.First of all the address argument for higher than 2GB of density of memory is changed to
         be sector address (512B sectors) instead of byte address */
         startGroupAddress = (startGroupAddress * (card->eraseGroupBlocks));
-        endGroupAddress = (endGroupAddress * (card->eraseGroupBlocks));
+        endGroupAddress   = (endGroupAddress * (card->eraseGroupBlocks));
     }
-    else
-    {
+    else {
         /* The address unit is byte when card capacity is lower than 2GB */
         startGroupAddress = (startGroupAddress * (card->eraseGroupBlocks) * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
-        endGroupAddress = (endGroupAddress * (card->eraseGroupBlocks) * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
+        endGroupAddress   = (endGroupAddress * (card->eraseGroupBlocks) * FSL_SDMMC_DEFAULT_BLOCK_SIZE);
     }
 
     /* Set the start erase group address */
-    command.index = kMMC_EraseGroupStart;
-    command.argument = startGroupAddress;
-    command.responseType = kCARD_ResponseTypeR1;
+    command.index              = kMMC_EraseGroupStart;
+    command.argument           = startGroupAddress;
+    command.responseType       = kCARD_ResponseTypeR1;
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success != MMC_Transfer(card, &content, 0U))
-    {
+    content.data    = NULL;
+    if (kStatus_Success != MMC_Transfer(card, &content, 0U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
     /* Set the end erase group address */
-    command.index = kMMC_EraseGroupEnd;
+    command.index    = kMMC_EraseGroupEnd;
     command.argument = endGroupAddress;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success != MMC_Transfer(card, &content, 0U))
-    {
+    content.data    = NULL;
+    if (kStatus_Success != MMC_Transfer(card, &content, 0U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
     /* Start the erase process */
-    command.index = kSDMMC_Erase;
-    command.argument = 0U;
-    command.responseType = kCARD_ResponseTypeR1b;
+    command.index              = kSDMMC_Erase;
+    command.argument           = 0U;
+    command.responseType       = kCARD_ResponseTypeR1b;
     command.responseErrorFlags = kSDMMC_R1ErrorAllFlag;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success != MMC_Transfer(card, &content, 0U))
-    {
+    content.data    = NULL;
+    if (kStatus_Success != MMC_Transfer(card, &content, 0U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
     return kStatus_Success;
 }
 
-status_t MMC_SetGeneralPurposePartitioning(mmc_card_t *card, mmc_access_partition_t partition,uint32_t size)
+status_t MMC_SetGeneralPurposePartitioning(mmc_card_t *card, mmc_access_partition_t partition, uint32_t size)
 {
     assert(card);
 
     uint8_t byteIndex = 0;
 
-    if(((card->extendedCsd.partitioningSupport & kMMC_ExtCsdExtPartitionSupport) == 0) ||
-    		((card->extendedCsd.partitioningSupport & kMMC_ExtCsdEnhancePartitionSupport) == 0) ||
-			((card->extendedCsd.partitioningSupport & kMMC_ExtCsdPartitioningSupport) == 0)){
-    	return kStatus_SDMMC_PartitioningNotSupported;
+    if (((card->extendedCsd.partitioningSupport & kMMC_ExtCsdExtPartitionSupport) == 0) ||
+        ((card->extendedCsd.partitioningSupport & kMMC_ExtCsdEnhancePartitionSupport) == 0) ||
+        ((card->extendedCsd.partitioningSupport & kMMC_ExtCsdPartitioningSupport) == 0)) {
+        return kStatus_SDMMC_PartitioningNotSupported;
     }
-    switch(partition)
-    {
+    switch (partition) {
     case kMMC_AccessGeneralPurposePartition1:
-    	byteIndex = kMMC_ExtendedCsdIndexGenPartition1Base;
-    	break;
+        byteIndex = kMMC_ExtendedCsdIndexGenPartition1Base;
+        break;
     case kMMC_AccessGeneralPurposePartition2:
-    	byteIndex = kMMC_ExtendedCsdIndexGenPartition2Base;
-    	break;
+        byteIndex = kMMC_ExtendedCsdIndexGenPartition2Base;
+        break;
     case kMMC_AccessGeneralPurposePartition3:
-    	byteIndex = kMMC_ExtendedCsdIndexGenPartition3Base;
-    	break;
+        byteIndex = kMMC_ExtendedCsdIndexGenPartition3Base;
+        break;
     case kMMC_AccessGeneralPurposePartition4:
-    	byteIndex = kMMC_ExtendedCsdIndexGenPartition4Base;
-    	break;
+        byteIndex = kMMC_ExtendedCsdIndexGenPartition4Base;
+        break;
     default:
-    	return kStatus_SDMMC_ConfigureExtendedCsdFailed;
-
+        return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
     mmc_extended_csd_config_t extendedCsdconfig;
 
     /* Set Erase Group Definition Bit to 1 */
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexEraseGroupDefinition;
-    extendedCsdconfig.ByteValue = 1;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexEraseGroupDefinition;
+    extendedCsdconfig.ByteValue  = 1;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
     uint8_t multipliers[3] = {0};
     uint32_t required_size = size; // in KBytes
 
-    uint32_t multiplier = required_size / (512*card->extendedCsd.highCapacityWriteProtectGroupSize*
-    		card->extendedCsd.highCapacityEraseUnitSize);
+    uint32_t multiplier = required_size / (512 * card->extendedCsd.highCapacityWriteProtectGroupSize *
+                                           card->extendedCsd.highCapacityEraseUnitSize);
 
-    MMC_CalculateMultiplier(multiplier,multipliers);
+    MMC_CalculateMultiplier(multiplier, multipliers);
 
-    uint8_t i =0;
-    for(i=0;i<3;i++){
+    uint8_t i = 0;
+    for (i = 0; i < 3; i++) {
         extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-        extendedCsdconfig.ByteIndex = byteIndex++;
-        extendedCsdconfig.ByteValue = multipliers[i];
+        extendedCsdconfig.ByteIndex  = byteIndex++;
+        extendedCsdconfig.ByteValue  = multipliers[i];
         extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-        {
+        if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
             return kStatus_SDMMC_ConfigureExtendedCsdFailed;
         }
-
     }
 
     /* Get Extended CSD register content. */
-    if (kStatus_Success != MMC_SendExtendedCsd(card, NULL, 0U))
-    {
+    if (kStatus_Success != MMC_SendExtendedCsd(card, NULL, 0U)) {
         return kStatus_SDMMC_SendExtendedCsdFailed;
     }
 
     /* Set Partitioning Completed bit */
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeSetBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexPartitioningCompleted;
-    extendedCsdconfig.ByteValue = 1;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexPartitioningCompleted;
+    extendedCsdconfig.ByteValue  = 1;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
@@ -2616,11 +2414,10 @@ status_t MMC_SetBootConfigWP(mmc_card_t *card, uint8_t wp)
 
     mmc_extended_csd_config_t extendedCsdconfig;
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexBootConfigWP;
-    extendedCsdconfig.ByteValue = wp;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexBootConfigWP;
+    extendedCsdconfig.ByteValue  = wp;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
@@ -2635,11 +2432,10 @@ status_t MMC_SetBootPartitionWP(mmc_card_t *card, mmc_boot_partition_wp_t bootPa
 
     mmc_extended_csd_config_t extendedCsdconfig;
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexBootPartitionWP;
-    extendedCsdconfig.ByteValue = bootPartitionWP;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexBootPartitionWP;
+    extendedCsdconfig.ByteValue  = bootPartitionWP;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
@@ -2670,27 +2466,23 @@ status_t MMC_SetBootConfig(mmc_card_t *card, const mmc_boot_config_t *config)
     bootParameter |= ((uint32_t)(config->bootPartition) << MMC_PARTITION_CONFIG_PARTITION_ENABLE_SHIFT);
 
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexPartitionConfig;
-    extendedCsdconfig.ByteValue = bootParameter;
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexPartitionConfig;
+    extendedCsdconfig.ByteValue  = bootParameter;
     extendedCsdconfig.commandSet = kMMC_CommandSetStandard;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureExtendedCsdFailed;
     }
 
     card->extendedCsd.partitionConfig = bootParameter;
 
     /* data bus remapping */
-    if (bootBusWidth == kMMC_DataBusWidth1bit)
-    {
+    if (bootBusWidth == kMMC_DataBusWidth1bit) {
         bootBusWidth = 0U;
     }
-    else if ((bootBusWidth == kMMC_DataBusWidth4bit) || (bootBusWidth == kMMC_DataBusWidth4bitDDR))
-    {
+    else if ((bootBusWidth == kMMC_DataBusWidth4bit) || (bootBusWidth == kMMC_DataBusWidth4bitDDR)) {
         bootBusWidth = 1U;
     }
-    else
-    {
+    else {
         bootBusWidth = 2U;
     }
 
@@ -2704,28 +2496,23 @@ status_t MMC_SetBootConfig(mmc_card_t *card, const mmc_boot_config_t *config)
     bootParameter |= (uint32_t)(config->bootTimingMode);
 
     extendedCsdconfig.accessMode = kMMC_ExtendedCsdAccessModeWriteBits;
-    extendedCsdconfig.ByteIndex = kMMC_ExtendedCsdIndexBootBusConditions;
-    extendedCsdconfig.ByteValue = bootParameter;
-    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig))
-    {
+    extendedCsdconfig.ByteIndex  = kMMC_ExtendedCsdIndexBootBusConditions;
+    extendedCsdconfig.ByteValue  = bootParameter;
+    if (kStatus_Success != MMC_SetExtendedCsdConfig(card, &extendedCsdconfig)) {
         return kStatus_SDMMC_ConfigureBootFailed;
     }
 
     card->extendedCsd.bootDataBusConditions = bootParameter;
     /* check and configure the boot config write protect */
     bootParameter = config->pwrBootConfigProtection | ((uint8_t)(config->premBootConfigProtection) << 4U);
-    if (bootParameter != (card->extendedCsd.bootConfigProtect))
-    {
-        if (kStatus_Success != MMC_SetBootConfigWP(card, bootParameter))
-        {
+    if (bootParameter != (card->extendedCsd.bootConfigProtect)) {
+        if (kStatus_Success != MMC_SetBootConfigWP(card, bootParameter)) {
             return kStatus_SDMMC_ConfigureBootFailed;
         }
     }
     /* check and configure the boot partition write protect */
-    if (card->extendedCsd.bootPartitionWP != (uint8_t)(config->bootPartitionWP))
-    {
-        if (kStatus_Success != MMC_SetBootPartitionWP(card, config->bootPartitionWP))
-        {
+    if (card->extendedCsd.bootPartitionWP != (uint8_t)(config->bootPartitionWP)) {
+        if (kStatus_Success != MMC_SetBootPartitionWP(card, config->bootPartitionWP)) {
             return kStatus_SDMMC_ConfigureBootFailed;
         }
     }
@@ -2742,13 +2529,12 @@ status_t MMC_StartBoot(mmc_card_t *card,
     assert(mmcConfig);
     assert(buffer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_DATA data = {0};
-    uint32_t tempClock = 0U;
+    SDMMCHOST_DATA data        = {0};
+    uint32_t tempClock         = 0U;
 
-    if (!card->isHostReady)
-    {
+    if (!card->isHostReady) {
         return kStatus_Fail;
     }
 
@@ -2759,58 +2545,50 @@ status_t MMC_StartBoot(mmc_card_t *card,
     /* enable MMC boot */
     SDMMCHOST_ENABLE_MMC_BOOT(card->host.base, true);
 
-    if (mmcConfig->bootTimingMode == kMMC_BootModeSDRWithDefaultTiming)
-    {
+    if (mmcConfig->bootTimingMode == kMMC_BootModeSDRWithDefaultTiming) {
         /* Set clock to 400KHz. */
         tempClock = SDMMC_CLOCK_400KHZ;
     }
-    else
-    {
+    else {
         /* Set clock to 52MHZ. */
         tempClock = MMC_CLOCK_52MHZ;
     }
     SDMMCHOST_SET_CARD_CLOCK(card->host.base, card->host.sourceClock_Hz, tempClock);
 
-    if (mmcConfig->bootTimingMode == kMMC_BootModeDDRTiming)
-    {
+    if (mmcConfig->bootTimingMode == kMMC_BootModeDDRTiming) {
         /* enable DDR mode */
         SDMMCHOST_ENABLE_DDR_MODE(card->host.base, true, 0U);
     }
 
     /* data bus remapping */
-    if (mmcConfig->bootDataBusWidth == kMMC_DataBusWidth1bit)
-    {
+    if (mmcConfig->bootDataBusWidth == kMMC_DataBusWidth1bit) {
         SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH1BIT);
     }
     else if ((mmcConfig->bootDataBusWidth == kMMC_DataBusWidth4bit) ||
-             (mmcConfig->bootDataBusWidth == kMMC_DataBusWidth4bitDDR))
-    {
+             (mmcConfig->bootDataBusWidth == kMMC_DataBusWidth4bitDDR)) {
         SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH4BIT);
     }
-    else
-    {
+    else {
         SDMMCHOST_SET_CARD_BUS_WIDTH(card->host.base, kSDMMCHOST_DATABUSWIDTH8BIT);
     }
 
-    if (kMMC_BootModeAlternative == (uint32_t)SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(hostConfig))
-    {
+    if (kMMC_BootModeAlternative == (uint32_t)SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(hostConfig)) {
         /* alternative boot mode */
         command.argument = 0xFFFFFFFA;
     }
 
     command.index = kSDMMC_GoIdleState;
 
-    data.blockSize = SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(hostConfig);
+    data.blockSize  = SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(hostConfig);
     data.blockCount = SDMMCHOST_GET_HOST_CONFIG_BLOCK_COUNT(hostConfig);
-    data.rxData = (uint32_t *)buffer;
+    data.rxData     = (uint32_t *)buffer;
     SDMMCHOST_ENABLE_BOOT_FLAG(data);
 
-    content.data = &data;
+    content.data    = &data;
     content.command = &command;
 
     /* should check tuning error during every transfer*/
-    if (kStatus_Success != MMC_Transfer(card, &content, 1U))
-    {
+    if (kStatus_Success != MMC_Transfer(card, &content, 1U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -2822,27 +2600,26 @@ status_t MMC_ReadBootData(mmc_card_t *card, uint8_t *buffer, SDMMCHOST_BOOT_CONF
     assert(card);
     assert(buffer);
 
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_DATA data = {0};
+    SDMMCHOST_DATA data        = {0};
 
     /* enable MMC boot */
     SDMMCHOST_ENABLE_MMC_BOOT(card->host.base, true);
     /* config the host */
     SDMMCHOST_SETMMCBOOTCONFIG(card->host.base, hostConfig);
-    data.blockSize = SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(hostConfig);
+    data.blockSize  = SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(hostConfig);
     data.blockCount = SDMMCHOST_GET_HOST_CONFIG_BLOCK_COUNT(hostConfig);
-    data.rxData = (uint32_t *)buffer;
+    data.rxData     = (uint32_t *)buffer;
     SDMMCHOST_ENABLE_BOOT_CONTINOUS_FLAG(data);
     /* no command should be send out  */
     SDMMCHOST_EMPTY_CMD_FLAG(command);
 
-    content.data = &data;
+    content.data    = &data;
     content.command = &command;
 
     /* should check tuning error during every transfer*/
-    if (kStatus_Success != MMC_Transfer(card, &content, 1U))
-    {
+    if (kStatus_Success != MMC_Transfer(card, &content, 1U)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -2853,11 +2630,9 @@ status_t MMC_StopBoot(mmc_card_t *card, uint32_t bootMode)
 {
     assert(card);
     /* Disable boot mode */
-    if (kMMC_BootModeAlternative == bootMode)
-    {
+    if (kMMC_BootModeAlternative == bootMode) {
         /* Send CMD0 to reset the bus */
-        if (kStatus_Success != MMC_GoIdle(card))
-        {
+        if (kStatus_Success != MMC_GoIdle(card)) {
             return kStatus_SDMMC_GoIdleFailed;
         }
     }
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.h b/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.h
index 838697ea4..1e84b8831 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.h
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_mmc.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -49,18 +49,18 @@
 /*! @brief MMC card flags */
 enum _mmc_card_flag
 {
-    kMMC_SupportHighSpeed26MHZFlag = (1U << 0U),           /*!< Support high speed 26MHZ */
-    kMMC_SupportHighSpeed52MHZFlag = (1U << 1U),           /*!< Support high speed 52MHZ */
-    kMMC_SupportHighSpeedDDR52MHZ180V300VFlag = (1 << 2U), /*!< ddr 52MHZ 1.8V or 3.0V */
-    kMMC_SupportHighSpeedDDR52MHZ120VFlag = (1 << 3U),     /*!< DDR 52MHZ 1.2V */
-    kMMC_SupportHS200200MHZ180VFlag = (1 << 4U),           /*!< HS200 ,200MHZ,1.8V */
-    kMMC_SupportHS200200MHZ120VFlag = (1 << 5U),           /*!< HS200, 200MHZ, 1.2V */
-    kMMC_SupportHS400DDR200MHZ180VFlag = (1 << 6U),        /*!< HS400, DDR, 200MHZ,1.8V */
-    kMMC_SupportHS400DDR200MHZ120VFlag = (1 << 7U),        /*!< HS400, DDR, 200MHZ,1.2V */
-    kMMC_SupportHighCapacityFlag = (1U << 8U),             /*!< Support high capacity */
-    kMMC_SupportAlternateBootFlag = (1U << 9U),            /*!< Support alternate boot */
-    kMMC_SupportDDRBootFlag = (1U << 10U),                 /*!< support DDR boot flag*/
-    kMMC_SupportHighSpeedBootFlag = (1U << 11U),           /*!< support high speed boot flag*/
+    kMMC_SupportHighSpeed26MHZFlag            = (1U << 0U),  /*!< Support high speed 26MHZ */
+    kMMC_SupportHighSpeed52MHZFlag            = (1U << 1U),  /*!< Support high speed 52MHZ */
+    kMMC_SupportHighSpeedDDR52MHZ180V300VFlag = (1 << 2U),   /*!< ddr 52MHZ 1.8V or 3.0V */
+    kMMC_SupportHighSpeedDDR52MHZ120VFlag     = (1 << 3U),   /*!< DDR 52MHZ 1.2V */
+    kMMC_SupportHS200200MHZ180VFlag           = (1 << 4U),   /*!< HS200 ,200MHZ,1.8V */
+    kMMC_SupportHS200200MHZ120VFlag           = (1 << 5U),   /*!< HS200, 200MHZ, 1.2V */
+    kMMC_SupportHS400DDR200MHZ180VFlag        = (1 << 6U),   /*!< HS400, DDR, 200MHZ,1.8V */
+    kMMC_SupportHS400DDR200MHZ120VFlag        = (1 << 7U),   /*!< HS400, DDR, 200MHZ,1.2V */
+    kMMC_SupportHighCapacityFlag              = (1U << 8U),  /*!< Support high capacity */
+    kMMC_SupportAlternateBootFlag             = (1U << 9U),  /*!< Support alternate boot */
+    kMMC_SupportDDRBootFlag                   = (1U << 10U), /*!< support DDR boot flag*/
+    kMMC_SupportHighSpeedBootFlag             = (1U << 11U), /*!< support high speed boot flag*/
 };
 
 /*!
@@ -87,7 +87,7 @@ typedef struct _mmc_card
     mmc_csd_t csd;                                        /*!< CSD */
     mmc_extended_csd_t extendedCsd;                       /*!< Extended CSD */
     uint32_t blockSize;                                   /*!< Card block size */
-    uint32_t systemPartitionBlocks;                         /*!< Card total block number in system partition */
+    uint32_t systemPartitionBlocks;                       /*!< Card total block number in system partition */
     uint32_t userPartitionBlocks;                         /*!< Card total block number in user partition */
     uint32_t bootPartitionBlocks;                         /*!< Boot partition size united as block size */
     uint32_t eraseGroupBlocks;                            /*!< Erase group size united as block size */
@@ -102,240 +102,241 @@ typedef struct _mmc_card
  * API
  ************************************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name MMCCARD Function
- * @{
- */
+    /*!
+     * @name MMCCARD Function
+     * @{
+     */
 
-/*!
- * @brief Initializes the MMC card and host.
- *
- * @param card Card descriptor.
- *
- * @retval kStatus_SDMMC_HostNotReady host is not ready.
- * @retval kStatus_SDMMC_GoIdleFailed Go idle failed.
- * @retval kStatus_SDMMC_SendOperationConditionFailed Send operation condition failed.
- * @retval kStatus_SDMMC_AllSendCidFailed Send CID failed.
- * @retval kStatus_SDMMC_SetRelativeAddressFailed Set relative address failed.
- * @retval kStatus_SDMMC_SendCsdFailed Send CSD failed.
- * @retval kStatus_SDMMC_CardNotSupport Card not support.
- * @retval kStatus_SDMMC_SelectCardFailed Send SELECT_CARD command failed.
- * @retval kStatus_SDMMC_SendExtendedCsdFailed Send EXT_CSD failed.
- * @retval kStatus_SDMMC_SetBusWidthFailed Set bus width failed.
- * @retval kStatus_SDMMC_SwitchHighSpeedFailed Switch high speed failed.
- * @retval kStatus_SDMMC_SetCardBlockSizeFailed Set card block size failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_Init(mmc_card_t *card);
+    /*!
+     * @brief Initializes the MMC card and host.
+     *
+     * @param card Card descriptor.
+     *
+     * @retval kStatus_SDMMC_HostNotReady host is not ready.
+     * @retval kStatus_SDMMC_GoIdleFailed Go idle failed.
+     * @retval kStatus_SDMMC_SendOperationConditionFailed Send operation condition failed.
+     * @retval kStatus_SDMMC_AllSendCidFailed Send CID failed.
+     * @retval kStatus_SDMMC_SetRelativeAddressFailed Set relative address failed.
+     * @retval kStatus_SDMMC_SendCsdFailed Send CSD failed.
+     * @retval kStatus_SDMMC_CardNotSupport Card not support.
+     * @retval kStatus_SDMMC_SelectCardFailed Send SELECT_CARD command failed.
+     * @retval kStatus_SDMMC_SendExtendedCsdFailed Send EXT_CSD failed.
+     * @retval kStatus_SDMMC_SetBusWidthFailed Set bus width failed.
+     * @retval kStatus_SDMMC_SwitchHighSpeedFailed Switch high speed failed.
+     * @retval kStatus_SDMMC_SetCardBlockSizeFailed Set card block size failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_Init(mmc_card_t *card);
 
-/*!
- * @brief Deinitializes the card and host.
- *
- * @param card Card descriptor.
- */
-void MMC_Deinit(mmc_card_t *card);
+    /*!
+     * @brief Deinitializes the card and host.
+     *
+     * @param card Card descriptor.
+     */
+    void MMC_Deinit(mmc_card_t *card);
 
-/*!
- * @brief intialize the card.
- *
- * @param card Card descriptor.
- *
- * @retval kStatus_SDMMC_HostNotReady host is not ready.
- * @retval kStatus_SDMMC_GoIdleFailed Go idle failed.
- * @retval kStatus_SDMMC_SendOperationConditionFailed Send operation condition failed.
- * @retval kStatus_SDMMC_AllSendCidFailed Send CID failed.
- * @retval kStatus_SDMMC_SetRelativeAddressFailed Set relative address failed.
- * @retval kStatus_SDMMC_SendCsdFailed Send CSD failed.
- * @retval kStatus_SDMMC_CardNotSupport Card not support.
- * @retval kStatus_SDMMC_SelectCardFailed Send SELECT_CARD command failed.
- * @retval kStatus_SDMMC_SendExtendedCsdFailed Send EXT_CSD failed.
- * @retval kStatus_SDMMC_SetBusWidthFailed Set bus width failed.
- * @retval kStatus_SDMMC_SwitchHighSpeedFailed Switch high speed failed.
- * @retval kStatus_SDMMC_SetCardBlockSizeFailed Set card block size failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_CardInit(mmc_card_t *card);
+    /*!
+     * @brief intialize the card.
+     *
+     * @param card Card descriptor.
+     *
+     * @retval kStatus_SDMMC_HostNotReady host is not ready.
+     * @retval kStatus_SDMMC_GoIdleFailed Go idle failed.
+     * @retval kStatus_SDMMC_SendOperationConditionFailed Send operation condition failed.
+     * @retval kStatus_SDMMC_AllSendCidFailed Send CID failed.
+     * @retval kStatus_SDMMC_SetRelativeAddressFailed Set relative address failed.
+     * @retval kStatus_SDMMC_SendCsdFailed Send CSD failed.
+     * @retval kStatus_SDMMC_CardNotSupport Card not support.
+     * @retval kStatus_SDMMC_SelectCardFailed Send SELECT_CARD command failed.
+     * @retval kStatus_SDMMC_SendExtendedCsdFailed Send EXT_CSD failed.
+     * @retval kStatus_SDMMC_SetBusWidthFailed Set bus width failed.
+     * @retval kStatus_SDMMC_SwitchHighSpeedFailed Switch high speed failed.
+     * @retval kStatus_SDMMC_SetCardBlockSizeFailed Set card block size failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_CardInit(mmc_card_t *card);
 
-/*!
- * @brief Deinitializes the card.
- *
- * @param card Card descriptor.
- */
-void MMC_CardDeinit(mmc_card_t *card);
+    /*!
+     * @brief Deinitializes the card.
+     *
+     * @param card Card descriptor.
+     */
+    void MMC_CardDeinit(mmc_card_t *card);
 
-/*!
- * @brief initialize the host.
- *
- * This function deinitializes the specific host.
- *
- * @param card Card descriptor.
- */
-status_t MMC_HostInit(mmc_card_t *card);
+    /*!
+     * @brief initialize the host.
+     *
+     * This function deinitializes the specific host.
+     *
+     * @param card Card descriptor.
+     */
+    status_t MMC_HostInit(mmc_card_t *card);
 
-/*!
- * @brief Deinitializes the host.
- *
- * This function deinitializes the host.
- *
- * @param card Card descriptor.
- */
-void MMC_HostDeinit(mmc_card_t *card);
+    /*!
+     * @brief Deinitializes the host.
+     *
+     * This function deinitializes the host.
+     *
+     * @param card Card descriptor.
+     */
+    void MMC_HostDeinit(mmc_card_t *card);
 
-/*!
- * @brief reset the host.
- *
- * This function reset the specific host.
- *
- * @param host host descriptor.
- */
-void MMC_HostReset(SDMMCHOST_CONFIG *host);
+    /*!
+     * @brief reset the host.
+     *
+     * This function reset the specific host.
+     *
+     * @param host host descriptor.
+     */
+    void MMC_HostReset(SDMMCHOST_CONFIG *host);
 
-/*!
- * @brief Checks if the card is read-only.
- *
- * @param card Card descriptor.
- * @retval true Card is read only.
- * @retval false Card isn't read only.
- */
-bool MMC_CheckReadOnly(mmc_card_t *card);
+    /*!
+     * @brief Checks if the card is read-only.
+     *
+     * @param card Card descriptor.
+     * @retval true Card is read only.
+     * @retval false Card isn't read only.
+     */
+    bool MMC_CheckReadOnly(mmc_card_t *card);
 
-/*!
- * @brief Reads data blocks from the card.
- *
- * @param card Card descriptor.
- * @param buffer The buffer to save data.
- * @param startBlock The start block index.
- * @param blockCount The number of blocks to read.
- * @retval kStatus_InvalidArgument Invalid argument.
- * @retval kStatus_SDMMC_CardNotSupport Card not support.
- * @retval kStatus_SDMMC_SetBlockCountFailed Set block count failed.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_ReadBlocks(mmc_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockCount);
+    /*!
+     * @brief Reads data blocks from the card.
+     *
+     * @param card Card descriptor.
+     * @param buffer The buffer to save data.
+     * @param startBlock The start block index.
+     * @param blockCount The number of blocks to read.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     * @retval kStatus_SDMMC_CardNotSupport Card not support.
+     * @retval kStatus_SDMMC_SetBlockCountFailed Set block count failed.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_ReadBlocks(mmc_card_t *card, uint8_t *buffer, uint32_t startBlock, uint32_t blockCount);
 
-/*!
- * @brief Writes data blocks to the card.
- *
- * @param card Card descriptor.
- * @param buffer The buffer to save data blocks.
- * @param startBlock Start block number to write.
- * @param blockCount Block count.
- * @retval kStatus_InvalidArgument Invalid argument.
- * @retval kStatus_SDMMC_NotSupportYet Not support now.
- * @retval kStatus_SDMMC_SetBlockCountFailed Set block count failed.
- * @retval kStatus_SDMMC_WaitWriteCompleteFailed Send status failed.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_WriteBlocks(mmc_card_t *card, const uint8_t *buffer, uint32_t startBlock, uint32_t blockCount);
+    /*!
+     * @brief Writes data blocks to the card.
+     *
+     * @param card Card descriptor.
+     * @param buffer The buffer to save data blocks.
+     * @param startBlock Start block number to write.
+     * @param blockCount Block count.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     * @retval kStatus_SDMMC_NotSupportYet Not support now.
+     * @retval kStatus_SDMMC_SetBlockCountFailed Set block count failed.
+     * @retval kStatus_SDMMC_WaitWriteCompleteFailed Send status failed.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_SDMMC_StopTransmissionFailed Stop transmission failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_WriteBlocks(mmc_card_t *card, const uint8_t *buffer, uint32_t startBlock, uint32_t blockCount);
 
-/*!
- * @brief Erases groups of the card.
- *
- * Erase group is the smallest erase unit in MMC card. The erase range is [startGroup, endGroup].
- *
- * @param  card Card descriptor.
- * @param  startGroup Start group number.
- * @param  endGroup End group number.
- * @retval kStatus_InvalidArgument Invalid argument.
- * @retval kStatus_SDMMC_WaitWriteCompleteFailed Send status failed.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_EraseGroups(mmc_card_t *card, uint32_t startGroup, uint32_t endGroup);
+    /*!
+     * @brief Erases groups of the card.
+     *
+     * Erase group is the smallest erase unit in MMC card. The erase range is [startGroup, endGroup].
+     *
+     * @param  card Card descriptor.
+     * @param  startGroup Start group number.
+     * @param  endGroup End group number.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     * @retval kStatus_SDMMC_WaitWriteCompleteFailed Send status failed.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_EraseGroups(mmc_card_t *card, uint32_t startGroup, uint32_t endGroup);
 
-/*!
- * @brief Selects the partition to access.
- *
- * @param card Card descriptor.
- * @param partitionNumber The partition number.
- * @retval kStatus_SDMMC_ConfigureExtendedCsdFailed Configure EXT_CSD failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_SelectPartition(mmc_card_t *card, mmc_access_partition_t partitionNumber);
+    /*!
+     * @brief Selects the partition to access.
+     *
+     * @param card Card descriptor.
+     * @param partitionNumber The partition number.
+     * @retval kStatus_SDMMC_ConfigureExtendedCsdFailed Configure EXT_CSD failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_SelectPartition(mmc_card_t *card, mmc_access_partition_t partitionNumber);
 
-/*!
- * @brief Configures the boot activity of the card.
- *
- * @param card Card descriptor.
- * @param config Boot configuration structure.
- * @retval kStatus_SDMMC_NotSupportYet Not support now.
- * @retval kStatus_SDMMC_ConfigureExtendedCsdFailed Configure EXT_CSD failed.
- * @retval kStatus_SDMMC_ConfigureBootFailed Configure boot failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_SetBootConfig(mmc_card_t *card, const mmc_boot_config_t *config);
+    /*!
+     * @brief Configures the boot activity of the card.
+     *
+     * @param card Card descriptor.
+     * @param config Boot configuration structure.
+     * @retval kStatus_SDMMC_NotSupportYet Not support now.
+     * @retval kStatus_SDMMC_ConfigureExtendedCsdFailed Configure EXT_CSD failed.
+     * @retval kStatus_SDMMC_ConfigureBootFailed Configure boot failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_SetBootConfig(mmc_card_t *card, const mmc_boot_config_t *config);
 
-/*!
- * @brief MMC card start boot.
- *
- * @param card Card descriptor.
- * @param mmcConfig mmc Boot configuration structure.
- * @param buffer address to recieve data.
- * @param hostConfig host boot configurations.
- * @retval kStatus_Fail fail.
- * @retval kStatus_SDMMC_TransferFailed transfer fail.
- * @retval kStatus_SDMMC_GoIdleFailed reset card fail.
- * @retval kStatus_Success Operate successfully.
- */
-status_t MMC_StartBoot(mmc_card_t *card,
-                       const mmc_boot_config_t *mmcConfig,
-                       uint8_t *buffer,
-                       SDMMCHOST_BOOT_CONFIG *hostConfig);
+    /*!
+     * @brief MMC card start boot.
+     *
+     * @param card Card descriptor.
+     * @param mmcConfig mmc Boot configuration structure.
+     * @param buffer address to recieve data.
+     * @param hostConfig host boot configurations.
+     * @retval kStatus_Fail fail.
+     * @retval kStatus_SDMMC_TransferFailed transfer fail.
+     * @retval kStatus_SDMMC_GoIdleFailed reset card fail.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t MMC_StartBoot(mmc_card_t *card,
+                           const mmc_boot_config_t *mmcConfig,
+                           uint8_t *buffer,
+                           SDMMCHOST_BOOT_CONFIG *hostConfig);
 
-/*!
- * @brief MMC card set boot configuration write protect.
- *
- * @param card Card descriptor.
- * @param wp write protect value.
- */
-status_t MMC_SetBootConfigWP(mmc_card_t *card, uint8_t wp);
+    /*!
+     * @brief MMC card set boot configuration write protect.
+     *
+     * @param card Card descriptor.
+     * @param wp write protect value.
+     */
+    status_t MMC_SetBootConfigWP(mmc_card_t *card, uint8_t wp);
 
-/*!
- * @brief MMC card continous read boot data.
- *
- * @param card Card descriptor.
- * @param buffer buffer address.
- * @param hostConfig host boot configurations.
- */
-status_t MMC_ReadBootData(mmc_card_t *card, uint8_t *buffer, SDMMCHOST_BOOT_CONFIG *hostConfig);
+    /*!
+     * @brief MMC card continous read boot data.
+     *
+     * @param card Card descriptor.
+     * @param buffer buffer address.
+     * @param hostConfig host boot configurations.
+     */
+    status_t MMC_ReadBootData(mmc_card_t *card, uint8_t *buffer, SDMMCHOST_BOOT_CONFIG *hostConfig);
 
-/*!
- * @brief MMC card stop boot mode.
- *
- * @param card Card descriptor.
- * @param bootMode boot mode.
- */
-status_t MMC_StopBoot(mmc_card_t *card, uint32_t bootMode);
+    /*!
+     * @brief MMC card stop boot mode.
+     *
+     * @param card Card descriptor.
+     * @param bootMode boot mode.
+     */
+    status_t MMC_StopBoot(mmc_card_t *card, uint32_t bootMode);
 
-/*!
- * @brief MMC card set boot partition write protect.
- *
- * @param card Card descriptor.
- * @param bootPartitionWP boot partition write protect value.
- */
-status_t MMC_SetBootPartitionWP(mmc_card_t *card, mmc_boot_partition_wp_t bootPartitionWP);
+    /*!
+     * @brief MMC card set boot partition write protect.
+     *
+     * @param card Card descriptor.
+     * @param bootPartitionWP boot partition write protect value.
+     */
+    status_t MMC_SetBootPartitionWP(mmc_card_t *card, mmc_boot_partition_wp_t bootPartitionWP);
 
-/*!
- * @brief MMC card configure General Purpose Partitions size.
- *
- * @param card Card descriptor.
- * @param partition partition number(only General Purpose Partitions are supported).
- * @param size Size of newly configured partition in KBytes!
- *
- * IMPORTANT NOTE: This function should be called only once. This is because partition configuration bits
- * can be set only once per device i.e they are fuse bits. It is not know if each partition can be configured
- * individually or if partitions must be configured all at once.
- * Anyway invoke this function VERY CAREFULLY, YOU"VE GOT ONLY ONE CHANCE !
- *
- */
-status_t MMC_SetGeneralPurposePartitioning(mmc_card_t *card, mmc_access_partition_t partition,uint32_t size);
+    /*!
+     * @brief MMC card configure General Purpose Partitions size.
+     *
+     * @param card Card descriptor.
+     * @param partition partition number(only General Purpose Partitions are supported).
+     * @param size Size of newly configured partition in KBytes!
+     *
+     * IMPORTANT NOTE: This function should be called only once. This is because partition configuration bits
+     * can be set only once per device i.e they are fuse bits. It is not know if each partition can be configured
+     * individually or if partitions must be configured all at once.
+     * Anyway invoke this function VERY CAREFULLY, YOU"VE GOT ONLY ONE CHANCE !
+     *
+     */
+    status_t MMC_SetGeneralPurposePartitioning(mmc_card_t *card, mmc_access_partition_t partition, uint32_t size);
 
 /* @} */
 #if defined(__cplusplus)
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.c b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.c
index 471517877..98642d9a8 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.c
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -49,24 +49,21 @@ status_t SDMMC_SelectCard(SDMMCHOST_TYPE *base,
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
     command.index = kSDMMC_SelectCard;
-    if (isSelected)
-    {
-        command.argument = relativeAddress << 16U;
+    if (isSelected) {
+        command.argument     = relativeAddress << 16U;
         command.responseType = kCARD_ResponseTypeR1;
     }
-    else
-    {
-        command.argument = 0U;
+    else {
+        command.argument     = 0U;
         command.responseType = kCARD_ResponseTypeNone;
     }
 
     content.command = &command;
-    content.data = NULL;
-    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag))
-    {
+    content.data    = NULL;
+    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -81,21 +78,19 @@ status_t SDMMC_SendApplicationCommand(SDMMCHOST_TYPE *base,
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_ApplicationCommand;
-    command.argument = (relativeAddress << 16U);
+    command.index        = kSDMMC_ApplicationCommand;
+    command.argument     = (relativeAddress << 16U);
     command.responseType = kCARD_ResponseTypeR1;
 
     content.command = &command;
-    content.data = 0U;
-    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag))
-    {
+    content.data    = 0U;
+    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
-    if (!(command.response[0U] & kSDMMC_R1ApplicationCommandFlag))
-    {
+    if (!(command.response[0U] & kSDMMC_R1ApplicationCommandFlag)) {
         return kStatus_SDMMC_CardNotSupport;
     }
 
@@ -107,16 +102,15 @@ status_t SDMMC_SetBlockCount(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION t
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_SetBlockCount;
-    command.argument = blockCount;
+    command.index        = kSDMMC_SetBlockCount;
+    command.argument     = blockCount;
     command.responseType = kCARD_ResponseTypeR1;
 
     content.command = &command;
-    content.data = 0U;
-    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag))
-    {
+    content.data    = 0U;
+    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -128,14 +122,13 @@ status_t SDMMC_GoIdle(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
     command.index = kSDMMC_GoIdleState;
 
     content.command = &command;
-    content.data = 0U;
-    if (kStatus_Success != transfer(base, &content))
-    {
+    content.data    = 0U;
+    if (kStatus_Success != transfer(base, &content)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -147,16 +140,15 @@ status_t SDMMC_SetBlockSize(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION tr
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_SetBlockLength;
-    command.argument = blockSize;
+    command.index        = kSDMMC_SetBlockLength;
+    command.argument     = blockSize;
     command.responseType = kCARD_ResponseTypeR1;
 
     content.command = &command;
-    content.data = 0U;
-    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag))
-    {
+    content.data    = 0U;
+    if ((kStatus_Success != transfer(base, &content)) || (command.response[0U] & kSDMMC_R1ErrorAllFlag)) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -168,16 +160,15 @@ status_t SDMMC_SetCardInactive(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSDMMC_GoInactiveState;
-    command.argument = 0U;
+    command.index        = kSDMMC_GoInactiveState;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeNone;
 
     content.command = &command;
-    content.data = 0U;
-    if ((kStatus_Success != transfer(base, &content)))
-    {
+    content.data    = 0U;
+    if ((kStatus_Success != transfer(base, &content))) {
         return kStatus_SDMMC_TransferFailed;
     }
 
@@ -189,16 +180,15 @@ status_t SDMMC_SwitchVoltage(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION t
     assert(transfer);
 
     SDMMCHOST_TRANSFER content = {0};
-    SDMMCHOST_COMMAND command = {0};
+    SDMMCHOST_COMMAND command  = {0};
 
-    command.index = kSD_VoltageSwitch;
-    command.argument = 0U;
+    command.index        = kSD_VoltageSwitch;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeR1;
 
     content.command = &command;
-    content.data = NULL;
-    if (kStatus_Success != transfer(base, &content))
-    {
+    content.data    = NULL;
+    if (kStatus_Success != transfer(base, &content)) {
         return kStatus_SDMMC_TransferFailed;
     }
     /* disable card clock */
@@ -206,8 +196,7 @@ status_t SDMMC_SwitchVoltage(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION t
 
     /* check data line and cmd line status */
     if ((GET_SDMMCHOST_STATUS(base) &
-         (CARD_DATA1_STATUS_MASK | CARD_DATA2_STATUS_MASK | CARD_DATA3_STATUS_MASK | CARD_DATA0_NOT_BUSY)) != 0U)
-    {
+         (CARD_DATA1_STATUS_MASK | CARD_DATA2_STATUS_MASK | CARD_DATA3_STATUS_MASK | CARD_DATA0_NOT_BUSY)) != 0U) {
         return kStatus_SDMMC_SwitchVoltageFail;
     }
 
@@ -227,8 +216,7 @@ status_t SDMMC_SwitchVoltage(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION t
 
     /* check data line and cmd line status */
     if ((GET_SDMMCHOST_STATUS(base) &
-         (CARD_DATA1_STATUS_MASK | CARD_DATA2_STATUS_MASK | CARD_DATA3_STATUS_MASK | CARD_DATA0_NOT_BUSY)) == 0U)
-    {
+         (CARD_DATA1_STATUS_MASK | CARD_DATA2_STATUS_MASK | CARD_DATA3_STATUS_MASK | CARD_DATA0_NOT_BUSY)) == 0U) {
         return kStatus_SDMMC_SwitchVoltageFail;
     }
 
@@ -241,52 +229,47 @@ status_t SDMMC_ExecuteTuning(SDMMCHOST_TYPE *base,
                              uint32_t blockSize)
 {
     SDMMCHOST_TRANSFER content = {0U};
-    SDMMCHOST_COMMAND command = {0U};
-    SDMMCHOST_DATA data = {0U};
-    uint32_t buffer[32U] = {0U};
-    bool tuningError = true;
+    SDMMCHOST_COMMAND command  = {0U};
+    SDMMCHOST_DATA data        = {0U};
+    uint32_t buffer[32U]       = {0U};
+    bool tuningError           = true;
 
-    command.index = tuningCmd;
-    command.argument = 0U;
+    command.index        = tuningCmd;
+    command.argument     = 0U;
     command.responseType = kCARD_ResponseTypeR1;
 
-    data.blockSize = blockSize;
+    data.blockSize  = blockSize;
     data.blockCount = 1U;
-    data.rxData = buffer;
+    data.rxData     = buffer;
     /* add this macro for adpter to different driver */
     SDMMCHOST_ENABLE_TUNING_FLAG(data);
 
     content.command = &command;
-    content.data = &data;
+    content.data    = &data;
 
     /* enable the standard tuning */
     SDMMCHOST_EXECUTE_STANDARD_TUNING_ENABLE(base, true);
 
-    while (true)
-    {
+    while (true) {
         /* send tuning block */
-        if ((kStatus_Success != transfer(base, &content)))
-        {
+        if ((kStatus_Success != transfer(base, &content))) {
             return kStatus_SDMMC_TransferFailed;
         }
         SDMMCHOST_Delay(1U);
 
         /*wait excute tuning bit clear*/
-        if ((SDMMCHOST_EXECUTE_STANDARD_TUNING_STATUS(base) != 0U))
-        {
+        if ((SDMMCHOST_EXECUTE_STANDARD_TUNING_STATUS(base) != 0U)) {
             continue;
         }
 
         /* if tuning error , re-tuning again */
-        if ((SDMMCHOST_CHECK_TUNING_ERROR(base) != 0U) && tuningError)
-        {
+        if ((SDMMCHOST_CHECK_TUNING_ERROR(base) != 0U) && tuningError) {
             tuningError = false;
             /* enable the standard tuning */
             SDMMCHOST_EXECUTE_STANDARD_TUNING_ENABLE(base, true);
             SDMMCHOST_ADJUST_TUNING_DELAY(base, SDMMCHOST_STANDARD_TUNING_START);
         }
-        else
-        {
+        else {
             break;
         }
     }
@@ -295,8 +278,7 @@ status_t SDMMC_ExecuteTuning(SDMMCHOST_TYPE *base,
     SDMMCHOST_Delay(100U);
 
     /* check tuning result*/
-    if (SDMMCHOST_EXECUTE_STANDARD_TUNING_RESULT(base) == 0U)
-    {
+    if (SDMMCHOST_EXECUTE_STANDARD_TUNING_RESULT(base) == 0U) {
         return kStatus_SDMMC_TuningFail;
     }
 
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.h b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.h
index e5a07a9de..31644c89b 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.h
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_common.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -77,53 +77,53 @@
 /*! @brief SD/MMC card API's running status. */
 enum _sdmmc_status
 {
-    kStatus_SDMMC_NotSupportYet = MAKE_STATUS(kStatusGroup_SDMMC, 0U),             /*!< Haven't supported */
-    kStatus_SDMMC_TransferFailed = MAKE_STATUS(kStatusGroup_SDMMC, 1U),            /*!< Send command failed */
-    kStatus_SDMMC_SetCardBlockSizeFailed = MAKE_STATUS(kStatusGroup_SDMMC, 2U),    /*!< Set block size failed */
-    kStatus_SDMMC_HostNotSupport = MAKE_STATUS(kStatusGroup_SDMMC, 3U),            /*!< Host doesn't support */
-    kStatus_SDMMC_CardNotSupport = MAKE_STATUS(kStatusGroup_SDMMC, 4U),            /*!< Card doesn't support */
-    kStatus_SDMMC_AllSendCidFailed = MAKE_STATUS(kStatusGroup_SDMMC, 5U),          /*!< Send CID failed */
-    kStatus_SDMMC_SendRelativeAddressFailed = MAKE_STATUS(kStatusGroup_SDMMC, 6U), /*!< Send relative address failed */
-    kStatus_SDMMC_SendCsdFailed = MAKE_STATUS(kStatusGroup_SDMMC, 7U),             /*!< Send CSD failed */
-    kStatus_SDMMC_SelectCardFailed = MAKE_STATUS(kStatusGroup_SDMMC, 8U),          /*!< Select card failed */
-    kStatus_SDMMC_SendScrFailed = MAKE_STATUS(kStatusGroup_SDMMC, 9U),             /*!< Send SCR failed */
-    kStatus_SDMMC_SetDataBusWidthFailed = MAKE_STATUS(kStatusGroup_SDMMC, 10U),    /*!< Set bus width failed */
-    kStatus_SDMMC_GoIdleFailed = MAKE_STATUS(kStatusGroup_SDMMC, 11U),             /*!< Go idle failed */
+    kStatus_SDMMC_NotSupportYet             = MAKE_STATUS(kStatusGroup_SDMMC, 0U),  /*!< Haven't supported */
+    kStatus_SDMMC_TransferFailed            = MAKE_STATUS(kStatusGroup_SDMMC, 1U),  /*!< Send command failed */
+    kStatus_SDMMC_SetCardBlockSizeFailed    = MAKE_STATUS(kStatusGroup_SDMMC, 2U),  /*!< Set block size failed */
+    kStatus_SDMMC_HostNotSupport            = MAKE_STATUS(kStatusGroup_SDMMC, 3U),  /*!< Host doesn't support */
+    kStatus_SDMMC_CardNotSupport            = MAKE_STATUS(kStatusGroup_SDMMC, 4U),  /*!< Card doesn't support */
+    kStatus_SDMMC_AllSendCidFailed          = MAKE_STATUS(kStatusGroup_SDMMC, 5U),  /*!< Send CID failed */
+    kStatus_SDMMC_SendRelativeAddressFailed = MAKE_STATUS(kStatusGroup_SDMMC, 6U),  /*!< Send relative address failed */
+    kStatus_SDMMC_SendCsdFailed             = MAKE_STATUS(kStatusGroup_SDMMC, 7U),  /*!< Send CSD failed */
+    kStatus_SDMMC_SelectCardFailed          = MAKE_STATUS(kStatusGroup_SDMMC, 8U),  /*!< Select card failed */
+    kStatus_SDMMC_SendScrFailed             = MAKE_STATUS(kStatusGroup_SDMMC, 9U),  /*!< Send SCR failed */
+    kStatus_SDMMC_SetDataBusWidthFailed     = MAKE_STATUS(kStatusGroup_SDMMC, 10U), /*!< Set bus width failed */
+    kStatus_SDMMC_GoIdleFailed              = MAKE_STATUS(kStatusGroup_SDMMC, 11U), /*!< Go idle failed */
     kStatus_SDMMC_HandShakeOperationConditionFailed =
         MAKE_STATUS(kStatusGroup_SDMMC, 12U), /*!< Send Operation Condition failed */
     kStatus_SDMMC_SendApplicationCommandFailed =
-        MAKE_STATUS(kStatusGroup_SDMMC, 13U),                                    /*!< Send application command failed */
-    kStatus_SDMMC_SwitchFailed = MAKE_STATUS(kStatusGroup_SDMMC, 14U),           /*!< Switch command failed */
-    kStatus_SDMMC_StopTransmissionFailed = MAKE_STATUS(kStatusGroup_SDMMC, 15U), /*!< Stop transmission failed */
-    kStatus_SDMMC_WaitWriteCompleteFailed = MAKE_STATUS(kStatusGroup_SDMMC, 16U),    /*!< Wait write complete failed */
-    kStatus_SDMMC_SetBlockCountFailed = MAKE_STATUS(kStatusGroup_SDMMC, 17U),        /*!< Set block count failed */
-    kStatus_SDMMC_SetRelativeAddressFailed = MAKE_STATUS(kStatusGroup_SDMMC, 18U),   /*!< Set relative address failed */
-    kStatus_SDMMC_SwitchBusTimingFailed = MAKE_STATUS(kStatusGroup_SDMMC, 19U),      /*!< Switch high speed failed */
-    kStatus_SDMMC_SendExtendedCsdFailed = MAKE_STATUS(kStatusGroup_SDMMC, 20U),      /*!< Send EXT_CSD failed */
-    kStatus_SDMMC_ConfigureBootFailed = MAKE_STATUS(kStatusGroup_SDMMC, 21U),        /*!< Configure boot failed */
+        MAKE_STATUS(kStatusGroup_SDMMC, 13U), /*!< Send application command failed */
+    kStatus_SDMMC_SwitchFailed               = MAKE_STATUS(kStatusGroup_SDMMC, 14U), /*!< Switch command failed */
+    kStatus_SDMMC_StopTransmissionFailed     = MAKE_STATUS(kStatusGroup_SDMMC, 15U), /*!< Stop transmission failed */
+    kStatus_SDMMC_WaitWriteCompleteFailed    = MAKE_STATUS(kStatusGroup_SDMMC, 16U), /*!< Wait write complete failed */
+    kStatus_SDMMC_SetBlockCountFailed        = MAKE_STATUS(kStatusGroup_SDMMC, 17U), /*!< Set block count failed */
+    kStatus_SDMMC_SetRelativeAddressFailed   = MAKE_STATUS(kStatusGroup_SDMMC, 18U), /*!< Set relative address failed */
+    kStatus_SDMMC_SwitchBusTimingFailed      = MAKE_STATUS(kStatusGroup_SDMMC, 19U), /*!< Switch high speed failed */
+    kStatus_SDMMC_SendExtendedCsdFailed      = MAKE_STATUS(kStatusGroup_SDMMC, 20U), /*!< Send EXT_CSD failed */
+    kStatus_SDMMC_ConfigureBootFailed        = MAKE_STATUS(kStatusGroup_SDMMC, 21U), /*!< Configure boot failed */
     kStatus_SDMMC_ConfigureExtendedCsdFailed = MAKE_STATUS(kStatusGroup_SDMMC, 22U), /*!< Configure EXT_CSD failed */
     kStatus_SDMMC_EnableHighCapacityEraseFailed =
         MAKE_STATUS(kStatusGroup_SDMMC, 23U), /*!< Enable high capacity erase failed */
-    kStatus_SDMMC_SendTestPatternFailed = MAKE_STATUS(kStatusGroup_SDMMC, 24U),    /*!< Send test pattern failed */
+    kStatus_SDMMC_SendTestPatternFailed    = MAKE_STATUS(kStatusGroup_SDMMC, 24U), /*!< Send test pattern failed */
     kStatus_SDMMC_ReceiveTestPatternFailed = MAKE_STATUS(kStatusGroup_SDMMC, 25U), /*!< Receive test pattern failed */
-    kStatus_SDMMC_SDIO_ResponseError = MAKE_STATUS(kStatusGroup_SDMMC, 26U),       /*!< sdio response error */
+    kStatus_SDMMC_SDIO_ResponseError       = MAKE_STATUS(kStatusGroup_SDMMC, 26U), /*!< sdio response error */
     kStatus_SDMMC_SDIO_InvalidArgument =
         MAKE_STATUS(kStatusGroup_SDMMC, 27U), /*!< sdio invalid argument response error */
     kStatus_SDMMC_SDIO_SendOperationConditionFail =
-        MAKE_STATUS(kStatusGroup_SDMMC, 28U),                            /*!< sdio send operation condition fail */
-    kStatus_SDMMC_InvalidVoltage = MAKE_STATUS(kStatusGroup_SDMMC, 29U), /*!<  invaild voltage */
+        MAKE_STATUS(kStatusGroup_SDMMC, 28U), /*!< sdio send operation condition fail */
+    kStatus_SDMMC_InvalidVoltage           = MAKE_STATUS(kStatusGroup_SDMMC, 29U), /*!<  invaild voltage */
     kStatus_SDMMC_SDIO_SwitchHighSpeedFail = MAKE_STATUS(kStatusGroup_SDMMC, 30U), /*!<  switch to high speed fail */
-    kStatus_SDMMC_SDIO_ReadCISFail = MAKE_STATUS(kStatusGroup_SDMMC, 31U),         /*!<  read CIS fail */
-    kStatus_SDMMC_SDIO_InvalidCard = MAKE_STATUS(kStatusGroup_SDMMC, 32U),         /*!<  invaild SDIO card */
-    kStatus_SDMMC_TuningFail = MAKE_STATUS(kStatusGroup_SDMMC, 33U),               /*!<  tuning fail */
-    kStatus_SDMMC_SwitchVoltageFail = MAKE_STATUS(kStatusGroup_SDMMC, 34U),        /*!< switch voltage fail*/
-    kStatus_SDMMC_ReTuningRequest = MAKE_STATUS(kStatusGroup_SDMMC, 35U),          /*!<  retuning request */
-    kStatus_SDMMC_SetDriverStrengthFail = MAKE_STATUS(kStatusGroup_SDMMC, 36U),    /*!<  set driver strength fail */
-    kStatus_SDMMC_SetPowerClassFail = MAKE_STATUS(kStatusGroup_SDMMC, 37U),        /*!<  set power class fail */
-    kStatus_SDMMC_HostNotReady = MAKE_STATUS(kStatusGroup_SDMMC, 38U),             /*!<  host controller not ready */
-    kStatus_SDMMC_CardDetectFailed = MAKE_STATUS(kStatusGroup_SDMMC, 39U),         /*!<  card detect failed */
-	kStatus_SDMMC_PartitioningFailed = MAKE_STATUS(kStatusGroup_SDMMC, 40U),         /*!<  Partitioning failed */
-	kStatus_SDMMC_PartitioningNotSupported = MAKE_STATUS(kStatusGroup_SDMMC, 41U),         /*!<  Partitioning not supported */
+    kStatus_SDMMC_SDIO_ReadCISFail         = MAKE_STATUS(kStatusGroup_SDMMC, 31U), /*!<  read CIS fail */
+    kStatus_SDMMC_SDIO_InvalidCard         = MAKE_STATUS(kStatusGroup_SDMMC, 32U), /*!<  invaild SDIO card */
+    kStatus_SDMMC_TuningFail               = MAKE_STATUS(kStatusGroup_SDMMC, 33U), /*!<  tuning fail */
+    kStatus_SDMMC_SwitchVoltageFail        = MAKE_STATUS(kStatusGroup_SDMMC, 34U), /*!< switch voltage fail*/
+    kStatus_SDMMC_ReTuningRequest          = MAKE_STATUS(kStatusGroup_SDMMC, 35U), /*!<  retuning request */
+    kStatus_SDMMC_SetDriverStrengthFail    = MAKE_STATUS(kStatusGroup_SDMMC, 36U), /*!<  set driver strength fail */
+    kStatus_SDMMC_SetPowerClassFail        = MAKE_STATUS(kStatusGroup_SDMMC, 37U), /*!<  set power class fail */
+    kStatus_SDMMC_HostNotReady             = MAKE_STATUS(kStatusGroup_SDMMC, 38U), /*!<  host controller not ready */
+    kStatus_SDMMC_CardDetectFailed         = MAKE_STATUS(kStatusGroup_SDMMC, 39U), /*!<  card detect failed */
+    kStatus_SDMMC_PartitioningFailed       = MAKE_STATUS(kStatusGroup_SDMMC, 40U), /*!<  Partitioning failed */
+    kStatus_SDMMC_PartitioningNotSupported = MAKE_STATUS(kStatusGroup_SDMMC, 41U), /*!<  Partitioning not supported */
 };
 
 /*! @brief card operation voltage */
@@ -139,107 +139,108 @@ typedef enum _sdmmc_operation_voltage
  * API
  ************************************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @brief Selects the card to put it into transfer state.
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @param relativeAddress Relative address.
- * @param isSelected True to put card into transfer state.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_SelectCard(SDMMCHOST_TYPE *base,
-                          SDMMCHOST_TRANSFER_FUNCTION transfer,
-                          uint32_t relativeAddress,
-                          bool isSelected);
+    /*!
+     * @brief Selects the card to put it into transfer state.
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @param relativeAddress Relative address.
+     * @param isSelected True to put card into transfer state.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_SelectCard(SDMMCHOST_TYPE *base,
+                              SDMMCHOST_TRANSFER_FUNCTION transfer,
+                              uint32_t relativeAddress,
+                              bool isSelected);
 
-/*!
- * @brief Sends an application command.
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @param relativeAddress Card relative address.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_SDMMC_CardNotSupport Card doesn't support.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_SendApplicationCommand(SDMMCHOST_TYPE *base,
-                                      SDMMCHOST_TRANSFER_FUNCTION transfer,
-                                      uint32_t relativeAddress);
+    /*!
+     * @brief Sends an application command.
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @param relativeAddress Card relative address.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_SDMMC_CardNotSupport Card doesn't support.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_SendApplicationCommand(SDMMCHOST_TYPE *base,
+                                          SDMMCHOST_TRANSFER_FUNCTION transfer,
+                                          uint32_t relativeAddress);
 
-/*!
- * @brief Sets the block count.
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @param blockCount Block count.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_SetBlockCount(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer, uint32_t blockCount);
+    /*!
+     * @brief Sets the block count.
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @param blockCount Block count.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_SetBlockCount(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer, uint32_t blockCount);
 
-/*!
- * @brief Sets the card to be idle state.
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_GoIdle(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
+    /*!
+     * @brief Sets the card to be idle state.
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_GoIdle(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
 
-/*!
- * @brief Sets data block size.
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @param blockSize Block size.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_SetBlockSize(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer, uint32_t blockSize);
+    /*!
+     * @brief Sets data block size.
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @param blockSize Block size.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_SetBlockSize(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer, uint32_t blockSize);
 
-/*!
- * @brief Sets card to inactive status
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- * @retval kStatus_SDMMC_TransferFailed Transfer failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t SDMMC_SetCardInactive(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
+    /*!
+     * @brief Sets card to inactive status
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     * @retval kStatus_SDMMC_TransferFailed Transfer failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t SDMMC_SetCardInactive(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
 
-/*!
- * @brief provide a simple delay function for sdmmc
- *
- * @param num Delay num*10000.
- */
-void SDMMC_Delay(uint32_t num);
+    /*!
+     * @brief provide a simple delay function for sdmmc
+     *
+     * @param num Delay num*10000.
+     */
+    void SDMMC_Delay(uint32_t num);
 
-/*!
- * @brief provide a voltage switch function for SD/SDIO card
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer SDMMCHOST transfer function.
- */
-status_t SDMMC_SwitchVoltage(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
+    /*!
+     * @brief provide a voltage switch function for SD/SDIO card
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer SDMMCHOST transfer function.
+     */
+    status_t SDMMC_SwitchVoltage(SDMMCHOST_TYPE *base, SDMMCHOST_TRANSFER_FUNCTION transfer);
 
-/*!
- * @brief excute tuning
- *
- * @param base SDMMCHOST peripheral base address.
- * @param transfer Host transfer function
- * @param tuningCmd Tuning cmd
- * @param blockSize Tuning block size
- */
-status_t SDMMC_ExecuteTuning(SDMMCHOST_TYPE *base,
-                             SDMMCHOST_TRANSFER_FUNCTION transfer,
-                             uint32_t tuningCmd,
-                             uint32_t blockSize);
+    /*!
+     * @brief excute tuning
+     *
+     * @param base SDMMCHOST peripheral base address.
+     * @param transfer Host transfer function
+     * @param tuningCmd Tuning cmd
+     * @param blockSize Tuning block size
+     */
+    status_t SDMMC_ExecuteTuning(SDMMCHOST_TYPE *base,
+                                 SDMMCHOST_TRANSFER_FUNCTION transfer,
+                                 uint32_t tuningCmd,
+                                 uint32_t blockSize);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.c b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.c
index c791ff333..392ef9cb7 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.c
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -42,7 +42,6 @@
  * Prototypes
  ******************************************************************************/
 
-
 /*******************************************************************************
  * Variables
  ******************************************************************************/
@@ -56,10 +55,10 @@ static volatile uint32_t g_eventTransferComplete;
 volatile uint32_t g_eventTimeMilliseconds;
 
 static QueueHandle_t event_sync = NULL;
-static SemaphoreHandle_t guard = NULL;
+static SemaphoreHandle_t guard  = NULL;
 
 uint32_t cntnotify = 0;
-uint32_t cntwait = 0;
+uint32_t cntwait   = 0;
 /*******************************************************************************
  * Code
  ******************************************************************************/
@@ -70,17 +69,17 @@ uint32_t cntwait = 0;
  */
 bool SDMMCEVENT_Create(void)
 {
-	event_sync = xQueueCreate(1,sizeof(uint32_t));
+    event_sync = xQueueCreate(1, sizeof(uint32_t));
 
-	if(event_sync == NULL){
-		return false;
-	}
+    if (event_sync == NULL) {
+        return false;
+    }
 
-	guard = xSemaphoreCreateBinary();
-	if(guard == NULL){
-		return false;
-	}
-	xSemaphoreGive(guard);
+    guard = xSemaphoreCreateBinary();
+    if (guard == NULL) {
+        return false;
+    }
+    xSemaphoreGive(guard);
 
     return true;
 }
@@ -94,23 +93,22 @@ bool SDMMCEVENT_Create(void)
  */
 bool SDMMCEVENT_Wait(uint32_t timeoutMilliseconds)
 {
-	assert(event_sync);
+    assert(event_sync);
 
-    if (timeoutMilliseconds)
-    {
-    	cntwait++;
-    	status_t status = 0;
+    if (timeoutMilliseconds) {
+        cntwait++;
+        status_t status = 0;
 
-    	BaseType_t ret = xQueueReceive(event_sync, &status, timeoutMilliseconds);
+        BaseType_t ret = xQueueReceive(event_sync, &status, timeoutMilliseconds);
 
-    	if((ret == pdPASS) && (status == kStatus_Success)){
-    		return true;
-    	}else{
-    		return false;
-    	}
+        if ((ret == pdPASS) && (status == kStatus_Success)) {
+            return true;
+        }
+        else {
+            return false;
+        }
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -124,22 +122,21 @@ bool SDMMCEVENT_Wait(uint32_t timeoutMilliseconds)
  */
 bool SDMMCEVENT_Lock(uint32_t timeoutMilliseconds)
 {
-	assert(guard);
+    assert(guard);
 
-    if (timeoutMilliseconds)
-    {
-    	status_t status = 0;
+    if (timeoutMilliseconds) {
+        status_t status = 0;
 
-    	BaseType_t ret = xSemaphoreTake(guard,timeoutMilliseconds);
+        BaseType_t ret = xSemaphoreTake(guard, timeoutMilliseconds);
 
-    	if((ret == pdPASS) && (status == kStatus_Success)){
-    		return true;
-    	}else{
-    		return false;
-    	}
+        if ((ret == pdPASS) && (status == kStatus_Success)) {
+            return true;
+        }
+        else {
+            return false;
+        }
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -154,10 +151,10 @@ bool SDMMCEVENT_Lock(uint32_t timeoutMilliseconds)
  */
 bool SDMMCEVENT_Unlock(void)
 {
-	assert(guard);
-	BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-	xSemaphoreGiveFromISR(guard,&xHigherPriorityTaskWoken);
-	return true;
+    assert(guard);
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    xSemaphoreGiveFromISR(guard, &xHigherPriorityTaskWoken);
+    return true;
 }
 
 /*!
@@ -169,14 +166,14 @@ bool SDMMCEVENT_Unlock(void)
  */
 BaseType_t SDMMCEVENT_Notify(status_t status)
 {
-	cntnotify++;
-	assert(event_sync);
-	BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    cntnotify++;
+    assert(event_sync);
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
-	BaseType_t ret = xQueueSendFromISR(event_sync,&status,&xHigherPriorityTaskWoken);
-	if(ret != pdPASS){
-		assert(0);
-	}
+    BaseType_t ret = xQueueSendFromISR(event_sync, &status, &xHigherPriorityTaskWoken);
+    if (ret != pdPASS) {
+        assert(0);
+    }
 
     /* If xHigherPriorityTaskWoken was set to pdTRUE inside
     xStreamBufferSendFromISR() then a task that has a priority above the
@@ -198,11 +195,11 @@ BaseType_t SDMMCEVENT_Notify(status_t status)
  */
 void SDMMCEVENT_Delete()
 {
-	uint32_t dummy = 0;
+    uint32_t dummy = 0;
 
-	if(xQueueReceive(event_sync, &dummy, 0) != errQUEUE_EMPTY){
-		assert(0);
-	}
+    if (xQueueReceive(event_sync, &dummy, 0) != errQUEUE_EMPTY) {
+        assert(0);
+    }
 }
 
 /*!
@@ -214,5 +211,5 @@ void SDMMCEVENT_Delete()
  */
 void SDMMCEVENT_Delay(uint32_t milliseconds)
 {
-	vTaskDelay(pdMS_TO_TICKS(milliseconds));
+    vTaskDelay(pdMS_TO_TICKS(milliseconds));
 }
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.h b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.h
index 13ec98dc4..333d678d6 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.h
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_event.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -48,63 +48,63 @@
  * API
  ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Event Function
- * @{
- */
+    /*!
+     * @name Event Function
+     * @{
+     */
 
-/*!
- * @brief Initialize timer to implement wait event timeout.
- */
-void SDMMCEVENT_InitTimer(void);
+    /*!
+     * @brief Initialize timer to implement wait event timeout.
+     */
+    void SDMMCEVENT_InitTimer(void);
 
-/* Callback function for SDHC */
+    /* Callback function for SDHC */
 
-/*!
- * @brief Create event.
- * @param eventType The event type
- * @retval true Create event successfully.
- * @retval false Create event failed.
- */
-bool SDMMCEVENT_Create(void);
+    /*!
+     * @brief Create event.
+     * @param eventType The event type
+     * @retval true Create event successfully.
+     * @retval false Create event failed.
+     */
+    bool SDMMCEVENT_Create(void);
 
-/*!
- * @brief Wait event.
- *
- * @param eventType The event type
- * @param timeoutMilliseconds Timeout time in milliseconds.
- * @retval true Wait event successfully.
- * @retval false Wait event failed.
- */
-bool SDMMCEVENT_Wait(uint32_t timeoutMilliseconds);
+    /*!
+     * @brief Wait event.
+     *
+     * @param eventType The event type
+     * @param timeoutMilliseconds Timeout time in milliseconds.
+     * @retval true Wait event successfully.
+     * @retval false Wait event failed.
+     */
+    bool SDMMCEVENT_Wait(uint32_t timeoutMilliseconds);
 
-/*!
- * @brief Notify event.
- * @param status Transfer status
- * @retval true Notify event successfully.
- * @retval false Notify event failed.
- */
-BaseType_t SDMMCEVENT_Notify(status_t status);
+    /*!
+     * @brief Notify event.
+     * @param status Transfer status
+     * @retval true Notify event successfully.
+     * @retval false Notify event failed.
+     */
+    BaseType_t SDMMCEVENT_Notify(status_t status);
 
-/*!
- * @brief Delete event.
- * @param eventType The event type
- */
-void SDMMCEVENT_Delete(void);
+    /*!
+     * @brief Delete event.
+     * @param eventType The event type
+     */
+    void SDMMCEVENT_Delete(void);
 
-/*!
- * @brief sdmmc delay.
- * @param milliseconds time to delay
- */
-void SDMMCEVENT_Delay(uint32_t milliseconds);
+    /*!
+     * @brief sdmmc delay.
+     * @param milliseconds time to delay
+     */
+    void SDMMCEVENT_Delay(uint32_t milliseconds);
 
-
-bool SDMMCEVENT_Unlock(void);
-bool SDMMCEVENT_Lock(uint32_t timeoutMilliseconds);
-/* @} */
+    bool SDMMCEVENT_Unlock(void);
+    bool SDMMCEVENT_Lock(uint32_t timeoutMilliseconds);
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.c b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.c
index d842883df..8c153c0bd 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.c
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -41,8 +41,8 @@
 #endif
 
 /*******************************************************************************
-* Definitions
-******************************************************************************/
+ * Definitions
+ ******************************************************************************/
 
 /*******************************************************************************
  * Prototypes
@@ -68,22 +68,22 @@ static void SDMMCHOST_TransferCompleteCallback(SDMMCHOST_TYPE *base,
 
 /*!
  * @brief SDMMCHOST re-tuning callback
-* @param base host base address.
-* @param userData user can register a application card insert callback through userData.
-*/
+ * @param base host base address.
+ * @param userData user can register a application card insert callback through userData.
+ */
 static void SDMMCHOST_ReTuningCallback(SDMMCHOST_TYPE *base, void *userData);
 
 /*******************************************************************************
  * Variables
  ******************************************************************************/
 /* DMA descriptor should allocate at non-cached memory */
-//TODO: check this !! I don't think this structure needs alignment and special cache treatment
+// TODO: check this !! I don't think this structure needs alignment and special cache treatment
 AT_NONCACHEABLE_SECTION_ALIGN(uint32_t g_usdhcAdma2Table[USDHC_ADMA_TABLE_WORDS], USDHC_ADMA2_ADDR_ALIGN);
 
 usdhc_handle_t g_usdhcHandle;
 volatile bool g_usdhcTransferSuccessFlag = true;
-static volatile bool s_sdInsertedFlag = false;
-volatile status_t g_reTuningFlag = false;
+static volatile bool s_sdInsertedFlag    = false;
+volatile status_t g_reTuningFlag         = false;
 
 /* This variables exists only for testing purposes. I will leave it until code matures. */
 static uint8_t transfer_in_progress = 0;
@@ -97,24 +97,22 @@ static void SDMMCHOST_TransferCompleteCallback(SDMMCHOST_TYPE *base,
                                                void *userData)
 {
     /* wait the target status and then notify the transfer complete */
-    if (status == kStatus_Success)
-    {
+    if (status == kStatus_Success) {
         g_usdhcTransferSuccessFlag = true;
     }
-    else
-    {
+    else {
         g_usdhcTransferSuccessFlag = false;
     }
 
     transfer_in_progress = 0;
-    portEND_SWITCHING_ISR( SDMMCEVENT_Notify(status) );
+    portEND_SWITCHING_ISR(SDMMCEVENT_Notify(status));
 }
 
-//TODO: this need to be checked when using HS200
+// TODO: this need to be checked when using HS200
 static void SDMMCHOST_ReTuningCallback(SDMMCHOST_TYPE *base, void *userData)
 {
     g_reTuningFlag = true;
-    //SDMMCEVENT_Notify(kSDMMCEVENT_TransferComplete);
+    // SDMMCEVENT_Notify(kSDMMCEVENT_TransferComplete);
 }
 
 extern uint32_t cntnotify;
@@ -126,49 +124,46 @@ static status_t SDMMCHOST_TransferFunction(SDMMCHOST_TYPE *base, SDMMCHOST_TRANS
 
     usdhc_adma_config_t dmaConfig;
 
-    if(SDMMCEVENT_Lock(500) == false){
-    	return kStatus_Timeout;
+    if (SDMMCEVENT_Lock(500) == false) {
+        return kStatus_Timeout;
     }
 
-    if(transfer_in_progress){
-    	assert(0);
+    if (transfer_in_progress) {
+        assert(0);
     }
     transfer_in_progress = 1;
 
     assert(cntnotify == cntwait);
 
-    if (content->data != NULL)
-    {
+    if (content->data != NULL) {
         memset(&dmaConfig, 0, sizeof(usdhc_adma_config_t));
         /* config adma */
-        dmaConfig.dmaMode = USDHC_DMA_MODE;
-        dmaConfig.burstLen = kUSDHC_EnBurstLenForINCR;
-        dmaConfig.admaTable = g_usdhcAdma2Table;
+        dmaConfig.dmaMode        = USDHC_DMA_MODE;
+        dmaConfig.burstLen       = kUSDHC_EnBurstLenForINCR;
+        dmaConfig.admaTable      = g_usdhcAdma2Table;
         dmaConfig.admaTableWords = USDHC_ADMA_TABLE_WORDS;
     }
 
-    do
-    {
+    do {
         error = USDHC_TransferNonBlocking(base, &g_usdhcHandle, &dmaConfig, content);
     } while (error == kStatus_USDHC_BusyTransferring);
 
-    if(error != kStatus_Success){
-    	SDMMCEVENT_Delete();
+    if (error != kStatus_Success) {
+        SDMMCEVENT_Delete();
         /* host error recovery */
         SDMMCHOST_ErrorRecovery(base);
         SDMMCEVENT_Unlock();
-    	return error;
+        return error;
     }
 
     bool ret = SDMMCEVENT_Wait(SDMMCHOST_TRANSFER_COMPLETE_TIMEOUT);
 
-    if((!ret) || (g_usdhcTransferSuccessFlag == false))
-    {
-    	SDMMCEVENT_Delete();
+    if ((!ret) || (g_usdhcTransferSuccessFlag == false)) {
+        SDMMCEVENT_Delete();
         /* host error recovery */
         SDMMCHOST_ErrorRecovery(base);
         SDMMCEVENT_Unlock();
-    	return kStatus_Fail;
+        return kStatus_Fail;
     }
 
     SDMMCEVENT_Unlock();
@@ -182,14 +177,12 @@ void SDMMCHOST_ErrorRecovery(SDMMCHOST_TYPE *base)
     /* get host present status */
     status = USDHC_GetPresentStatusFlags(base);
     /* check command inhibit status flag */
-    if ((status & kUSDHC_CommandInhibitFlag) != 0U)
-    {
+    if ((status & kUSDHC_CommandInhibitFlag) != 0U) {
         /* reset command line */
         USDHC_Reset(base, kUSDHC_ResetCommand, 100U);
     }
     /* check data inhibit status flag */
-    if ((status & kUSDHC_DataInhibitFlag) != 0U)
-    {
+    if ((status & kUSDHC_DataInhibitFlag) != 0U) {
         /* reset data line */
         USDHC_Reset(base, kUSDHC_ResetData, 100U);
     }
@@ -202,13 +195,11 @@ void SDMMCHOST_Delay(uint32_t milliseconds)
 
 void SDMMCHOST_PowerOffCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr)
 {
-    if (pwr != NULL)
-    {
+    if (pwr != NULL) {
         pwr->powerOff();
         SDMMCHOST_Delay(pwr->powerOffDelay_ms);
     }
-    else
-    {
+    else {
         /* only SD card need card detect*/
         SDMMCHOST_ENABLE_SD_POWER(false);
         /* Delay several milliseconds to make card stable. */
@@ -219,13 +210,11 @@ void SDMMCHOST_PowerOffCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pw
 void SDMMCHOST_PowerOnCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr)
 {
     /* use user define the power on function  */
-    if (pwr != NULL)
-    {
+    if (pwr != NULL) {
         pwr->powerOn();
         SDMMCHOST_Delay(pwr->powerOnDelay_ms);
     }
-    else
-    {
+    else {
         /* card power on */
         SDMMCHOST_ENABLE_SD_POWER(true);
         /* Delay several milliseconds to make card stable. */
@@ -235,14 +224,14 @@ void SDMMCHOST_PowerOnCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr
 
 status_t SDMMCHOST_Init(SDMMCHOST_CONFIG *host, void *userData)
 {
-    usdhc_host_t *usdhcHost = (usdhc_host_t *)host;
+    usdhc_host_t *usdhcHost            = (usdhc_host_t *)host;
     usdhc_transfer_callback_t callback = {
         .TransferComplete = SDMMCHOST_TransferCompleteCallback,
-        .ReTuning = SDMMCHOST_ReTuningCallback,
-        .CardInserted = NULL,/* Not used for eMMC */
-        .CardRemoved = NULL,/* Not used for eMMC */
-        .SdioInterrupt = NULL,
-        .BlockGap = NULL,
+        .ReTuning         = SDMMCHOST_ReTuningCallback,
+        .CardInserted     = NULL, /* Not used for eMMC */
+        .CardRemoved      = NULL, /* Not used for eMMC */
+        .SdioInterrupt    = NULL,
+        .BlockGap         = NULL,
     };
     /* init card power control */
     SDMMCHOST_INIT_SD_POWER();
@@ -251,24 +240,23 @@ status_t SDMMCHOST_Init(SDMMCHOST_CONFIG *host, void *userData)
     SDMMCHOST_PowerOnCard(host->base, NULL);
 
     /* Initializes USDHC. */
-    usdhcHost->config.dataTimeout = USDHC_DATA_TIMEOUT;
-    usdhcHost->config.endianMode = USDHC_ENDIAN_MODE;
-    usdhcHost->config.readWatermarkLevel = USDHC_READ_WATERMARK_LEVEL;
+    usdhcHost->config.dataTimeout         = USDHC_DATA_TIMEOUT;
+    usdhcHost->config.endianMode          = USDHC_ENDIAN_MODE;
+    usdhcHost->config.readWatermarkLevel  = USDHC_READ_WATERMARK_LEVEL;
     usdhcHost->config.writeWatermarkLevel = USDHC_WRITE_WATERMARK_LEVEL;
-    usdhcHost->config.readBurstLen = USDHC_READ_BURST_LEN;
-    usdhcHost->config.writeBurstLen = USDHC_WRITE_BURST_LEN;
+    usdhcHost->config.readBurstLen        = USDHC_READ_BURST_LEN;
+    usdhcHost->config.writeBurstLen       = USDHC_WRITE_BURST_LEN;
 
     USDHC_Init(usdhcHost->base, &(usdhcHost->config));
 
     /* disable the card insert/remove interrupt, due to use GPIO interrupt detect card */
     USDHC_DisableInterruptSignal(usdhcHost->base, kUSDHC_CardRemovalFlag | kUSDHC_CardInsertionFlag);
-    //TODO: change USDHC1_IRQn to sth different
-    SDMMCHOST_SET_IRQ_PRIORITY(USDHC2_IRQn,configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
+    // TODO: change USDHC1_IRQn to sth different
+    SDMMCHOST_SET_IRQ_PRIORITY(USDHC2_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
     /* create interrupt handler */
     USDHC_TransferCreateHandle(usdhcHost->base, &g_usdhcHandle, &callback, userData);
     /* Create transfer complete event. */
-    if (false == SDMMCEVENT_Create())
-    {
+    if (false == SDMMCEVENT_Create()) {
         return kStatus_Fail;
     }
 
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.h b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.h
index d59586cee..9194a0758 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.h
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_host.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -61,7 +61,7 @@
 
 /* Common definition for support and not support macro */
 #define SDMMCHOST_NOT_SUPPORT 0U /*!< use this define to indicate the host not support feature*/
-#define SDMMCHOST_SUPPORT 1U     /*!< use this define to indicate the host support feature*/
+#define SDMMCHOST_SUPPORT     1U /*!< use this define to indicate the host support feature*/
 
 /* Common definition for board support SDR104/HS200/HS400 frequency */
 /* SDR104 mode freq */
@@ -103,16 +103,16 @@
 /*define host baseaddr ,clk freq, IRQ number*/
 #define MMC_HOST_BASEADDR BOARD_SDHC_BASEADDR
 #define MMC_HOST_CLK_FREQ BOARD_SDHC_CLK_FREQ
-#define MMC_HOST_IRQ BOARD_SDHC_IRQ
-#define SD_HOST_BASEADDR BOARD_SDHC_BASEADDR
-#define SD_HOST_CLK_FREQ BOARD_SDHC_CLK_FREQ
-#define SD_HOST_IRQ BOARD_SDHC_IRQ
+#define MMC_HOST_IRQ      BOARD_SDHC_IRQ
+#define SD_HOST_BASEADDR  BOARD_SDHC_BASEADDR
+#define SD_HOST_CLK_FREQ  BOARD_SDHC_CLK_FREQ
+#define SD_HOST_IRQ       BOARD_SDHC_IRQ
 
 /* define for card bus speed/strength cnofig */
-#define CARD_BUS_FREQ_50MHZ (0U)
+#define CARD_BUS_FREQ_50MHZ   (0U)
 #define CARD_BUS_FREQ_100MHZ0 (0U)
 #define CARD_BUS_FREQ_100MHZ1 (0U)
-#define CARD_BUS_FREQ_200MHZ (0U)
+#define CARD_BUS_FREQ_200MHZ  (0U)
 
 #define CARD_BUS_STRENGTH_0 (0U)
 #define CARD_BUS_STRENGTH_1 (0U)
@@ -123,17 +123,17 @@
 #define CARD_BUS_STRENGTH_6 (0U)
 #define CARD_BUS_STRENGTH_7 (0U)
 
-#define SDMMCHOST_TYPE SDHC_Type
-#define SDMMCHOST_CONFIG sdhc_host_t
-#define SDMMCHOST_TRANSFER sdhc_transfer_t
-#define SDMMCHOST_COMMAND sdhc_command_t
-#define SDMMCHOST_DATA sdhc_data_t
+#define SDMMCHOST_TYPE           SDHC_Type
+#define SDMMCHOST_CONFIG         sdhc_host_t
+#define SDMMCHOST_TRANSFER       sdhc_transfer_t
+#define SDMMCHOST_COMMAND        sdhc_command_t
+#define SDMMCHOST_DATA           sdhc_data_t
 #define SDMMCHOST_BUS_WIDTH_TYPE sdhc_data_bus_width_t
-#define SDMMCHOST_CAPABILITY sdhc_capability_t
-#define SDMMCHOST_BOOT_CONFIG sdhc_boot_config_t
+#define SDMMCHOST_CAPABILITY     sdhc_capability_t
+#define SDMMCHOST_BOOT_CONFIG    sdhc_boot_config_t
 
 #define CARD_DATA0_STATUS_MASK kSDHC_Data0LineLevelFlag
-#define CARD_DATA0_NOT_BUSY kSDHC_Data0LineLevelFlag
+#define CARD_DATA0_NOT_BUSY    kSDHC_Data0LineLevelFlag
 #define CARD_DATA1_STATUS_MASK kSDHC_Data1LineLevelFlag
 #define CARD_DATA2_STATUS_MASK kSDHC_Data2LineLevelFlag
 #define CARD_DATA3_STATUS_MASK kSDHC_Data3LineLevelFlag
@@ -143,19 +143,19 @@
 #define kSDMMCHOST_DATABUSWIDTH8BIT kSDHC_DataBusWidth8Bit /*!< 8-bit mode */
 
 #define SDMMCHOST_STANDARD_TUNING_START (0U) /*!< standard tuning start point */
-#define SDMMCHOST_TUINIG_STEP (1U)           /*!< standard tuning step */
-#define SDMMCHOST_RETUNING_TIMER_COUNT (4U)  /*!< Re-tuning timer */
-#define SDMMCHOST_TUNING_DELAY_MAX (0x7FU)
-#define SDMMCHOST_RETUNING_REQUEST (1U)
-#define SDMMCHOST_TUNING_ERROR (2U)
+#define SDMMCHOST_TUINIG_STEP           (1U) /*!< standard tuning step */
+#define SDMMCHOST_RETUNING_TIMER_COUNT  (4U) /*!< Re-tuning timer */
+#define SDMMCHOST_TUNING_DELAY_MAX      (0x7FU)
+#define SDMMCHOST_RETUNING_REQUEST      (1U)
+#define SDMMCHOST_TUNING_ERROR          (2U)
 
 /* function pointer define */
-#define SDMMCHOST_TRANSFER_FUNCTION sdhc_transfer_function_t
-#define GET_SDMMCHOST_CAPABILITY(base, capability) (SDHC_GetCapability(base, capability))
-#define GET_SDMMCHOST_STATUS(base) (SDHC_GetPresentStatusFlags(base))
+#define SDMMCHOST_TRANSFER_FUNCTION                                 sdhc_transfer_function_t
+#define GET_SDMMCHOST_CAPABILITY(base, capability)                  (SDHC_GetCapability(base, capability))
+#define GET_SDMMCHOST_STATUS(base)                                  (SDHC_GetPresentStatusFlags(base))
 #define SDMMCHOST_SET_CARD_CLOCK(base, sourceClock_HZ, busClock_HZ) (SDHC_SetSdClock(base, sourceClock_HZ, busClock_HZ))
-#define SDMMCHOST_SET_CARD_BUS_WIDTH(base, busWidth) (SDHC_SetDataBusWidth(base, busWidth))
-#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout) (SDHC_SetCardActive(base, timeout))
+#define SDMMCHOST_SET_CARD_BUS_WIDTH(base, busWidth)                (SDHC_SetDataBusWidth(base, busWidth))
+#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout)                   (SDHC_SetCardActive(base, timeout))
 #define SDMMCHOST_SWITCH_VOLTAGE180V(base, enable18v)
 #define SDMMCHOST_SWITCH_VOLTAGE120V(base, enable12v)
 #define SDMMCHOST_CONFIG_IO_STRENGTH(speed, strength)
@@ -191,22 +191,22 @@
 #define SDMMCHOST_ENABLE_TUNING_FLAG(data)
 #define SDMMCHOST_ENABLE_BOOT_FLAG(data)
 #define SDMMCHOST_ENABLE_BOOT_CONTINOUS_FLAG(data)
-#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config) (0U)
+#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config)  (0U)
 #define SDMMCHOST_GET_HOST_CONFIG_BLOCK_COUNT(config) (0U)
-#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config) (0U)
+#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config)   (0U)
 #define SDMMCHOST_EMPTY_CMD_FLAG(command)
 #define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_HANDLER BOARD_SDHC_CD_PORT_IRQ_HANDLER
-#define SDMMCHOST_CARD_DETECT_IRQ BOARD_SDHC_CD_PORT_IRQ
+#define SDMMCHOST_CARD_DETECT_IRQ                    BOARD_SDHC_CD_PORT_IRQ
 /* sd card detect through host CD */
-#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base) (SDHC_EnableInterruptStatus(base, kSDHC_CardInsertionFlag))
-#define SDMMCHOST_CARD_DETECT_REMOVE_ENABLE(base) (SDHC_EnableInterruptStatus(base, kSDHC_CardRemovalFlag))
-#define SDMMCHOST_CARD_DETECT_INSERT_STATUS(base) (SDHC_GetInterruptStatusFlags(base) & kSDHC_CardInsertionFlag)
-#define SDMMCHOST_CARD_DETECT_REMOVE_STATUS(base) (SDHC_GetInterruptStatusFlags(base, kSDHC_CardRemovalFlag))
+#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base)           (SDHC_EnableInterruptStatus(base, kSDHC_CardInsertionFlag))
+#define SDMMCHOST_CARD_DETECT_REMOVE_ENABLE(base)           (SDHC_EnableInterruptStatus(base, kSDHC_CardRemovalFlag))
+#define SDMMCHOST_CARD_DETECT_INSERT_STATUS(base)           (SDHC_GetInterruptStatusFlags(base) & kSDHC_CardInsertionFlag)
+#define SDMMCHOST_CARD_DETECT_REMOVE_STATUS(base)           (SDHC_GetInterruptStatusFlags(base, kSDHC_CardRemovalFlag))
 #define SDMMCHOST_CARD_DETECT_INSERT_INTERRUPT_ENABLE(base) (SDHC_EnableInterruptSignal(base, kSDHC_CardInsertionFlag))
-#define SDMMCHOST_CARD_DETECT_INSERT_INTERRUPT_DISABLE(base) \
+#define SDMMCHOST_CARD_DETECT_INSERT_INTERRUPT_DISABLE(base)                                                           \
     (SDHC_DisableInterruptSignal(base, kSDHC_CardInsertionFlag))
 #define SDMMCHOST_CARD_DETECT_REMOVE_INTERRUPT_ENABLE(base) (SDHC_EnableInterruptSignal(base, kSDHC_CardRemovalFlag))
-#define SDMMCHOST_CARD_DETECT_DATA3_ENABLE(base, flag) (SDHC_CardDetectByData3(base, flag))
+#define SDMMCHOST_CARD_DETECT_DATA3_ENABLE(base, flag)      (SDHC_CardDetectByData3(base, flag))
 #define SDMMCHOST_ENABLE_MMC_BOOT(base, flag)
 #define SDMMCHOST_SETMMCBOOTCONFIG(base, config) (SDHC_SetMmcBootConfig(base, config))
 /* define card detect pin voltage level when card inserted */
@@ -218,21 +218,21 @@
 /*! @brief SDHC host capability*/
 enum _host_capability
 {
-    kSDMMCHOST_SupportAdma = kSDHC_SupportAdmaFlag,
-    kSDMMCHOST_SupportHighSpeed = kSDHC_SupportHighSpeedFlag,
-    kSDMMCHOST_SupportDma = kSDHC_SupportDmaFlag,
+    kSDMMCHOST_SupportAdma          = kSDHC_SupportAdmaFlag,
+    kSDMMCHOST_SupportHighSpeed     = kSDHC_SupportHighSpeedFlag,
+    kSDMMCHOST_SupportDma           = kSDHC_SupportDmaFlag,
     kSDMMCHOST_SupportSuspendResume = kSDHC_SupportSuspendResumeFlag,
-    kSDMMCHOST_SupportV330 = kSDHC_SupportV330Flag,
-    kSDMMCHOST_SupportV300 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportV180 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportV120 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_Support4BitBusWidth = kSDHC_Support4BitFlag,
-    kSDMMCHOST_Support8BitBusWidth = kSDHC_Support8BitFlag,
-    kSDMMCHOST_SupportDDR50 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportSDR104 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportSDR50 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportHS200 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportHS400 = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportV330          = kSDHC_SupportV330Flag,
+    kSDMMCHOST_SupportV300          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportV180          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportV120          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_Support4BitBusWidth  = kSDHC_Support4BitFlag,
+    kSDMMCHOST_Support8BitBusWidth  = kSDHC_Support8BitFlag,
+    kSDMMCHOST_SupportDDR50         = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportSDR104        = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportSDR50         = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportHS200         = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportHS400         = SDMMCHOST_NOT_SUPPORT,
 };
 
 /* Endian mode. */
@@ -244,7 +244,7 @@ enum _host_capability
 #define SDMMCHOST_DMA_BUFFER_ADDR_ALIGN (SDHC_ADMA2_ADDRESS_ALIGN)
 
 /* Read/write watermark level. The bigger value indicates DMA has higher read/write performance. */
-#define SDHC_READ_WATERMARK_LEVEL (0x80U)
+#define SDHC_READ_WATERMARK_LEVEL  (0x80U)
 #define SDHC_WRITE_WATERMARK_LEVEL (0x80U)
 
 /* ADMA table length united as word.
@@ -256,21 +256,21 @@ enum _host_capability
 #define SDHC_ADMA_TABLE_WORDS (8U)
 
 /*********************************************************SDIF**********************************************************/
-#elif(defined(FSL_FEATURE_SOC_SDIF_COUNT) && (FSL_FEATURE_SOC_SDIF_COUNT > 0U))
+#elif (defined(FSL_FEATURE_SOC_SDIF_COUNT) && (FSL_FEATURE_SOC_SDIF_COUNT > 0U))
 
 /*define host baseaddr ,clk freq, IRQ number*/
-#define MMC_HOST_BASEADDR BOARD_SDIF_BASEADDR
-#define MMC_HOST_CLK_FREQ BOARD_SDIF_CLK_FREQ
-#define MMC_HOST_IRQ BOARD_SDIF_IRQ
-#define SD_HOST_BASEADDR BOARD_SDIF_BASEADDR
-#define SD_HOST_CLK_FREQ BOARD_SDIF_CLK_FREQ
-#define SD_HOST_IRQ BOARD_SDIF_IRQ
+#define MMC_HOST_BASEADDR     BOARD_SDIF_BASEADDR
+#define MMC_HOST_CLK_FREQ     BOARD_SDIF_CLK_FREQ
+#define MMC_HOST_IRQ          BOARD_SDIF_IRQ
+#define SD_HOST_BASEADDR      BOARD_SDIF_BASEADDR
+#define SD_HOST_CLK_FREQ      BOARD_SDIF_CLK_FREQ
+#define SD_HOST_IRQ           BOARD_SDIF_IRQ
 
 /* define for card bus speed/strength cnofig */
-#define CARD_BUS_FREQ_50MHZ (0U)
+#define CARD_BUS_FREQ_50MHZ   (0U)
 #define CARD_BUS_FREQ_100MHZ0 (0U)
 #define CARD_BUS_FREQ_100MHZ1 (0U)
-#define CARD_BUS_FREQ_200MHZ (0U)
+#define CARD_BUS_FREQ_200MHZ  (0U)
 
 #define CARD_BUS_STRENGTH_0 (0U)
 #define CARD_BUS_STRENGTH_1 (0U)
@@ -281,17 +281,17 @@ enum _host_capability
 #define CARD_BUS_STRENGTH_6 (0U)
 #define CARD_BUS_STRENGTH_7 (0U)
 
-#define SDMMCHOST_TYPE SDIF_Type
-#define SDMMCHOST_CONFIG sdif_host_t
-#define SDMMCHOST_TRANSFER sdif_transfer_t
-#define SDMMCHOST_COMMAND sdif_command_t
-#define SDMMCHOST_DATA sdif_data_t
+#define SDMMCHOST_TYPE           SDIF_Type
+#define SDMMCHOST_CONFIG         sdif_host_t
+#define SDMMCHOST_TRANSFER       sdif_transfer_t
+#define SDMMCHOST_COMMAND        sdif_command_t
+#define SDMMCHOST_DATA           sdif_data_t
 #define SDMMCHOST_BUS_WIDTH_TYPE sdif_bus_width_t
-#define SDMMCHOST_CAPABILITY sdif_capability_t
-#define SDMMCHOST_BOOT_CONFIG void
+#define SDMMCHOST_CAPABILITY     sdif_capability_t
+#define SDMMCHOST_BOOT_CONFIG    void
 
 #define CARD_DATA0_STATUS_MASK SDIF_STATUS_DATA_BUSY_MASK
-#define CARD_DATA0_NOT_BUSY 0U
+#define CARD_DATA0_NOT_BUSY    0U
 
 #define CARD_DATA1_STATUS_MASK (0U)
 #define CARD_DATA2_STATUS_MASK (0U)
@@ -301,20 +301,20 @@ enum _host_capability
 #define kSDMMCHOST_DATABUSWIDTH4BIT kSDIF_Bus4BitWidth /*!< 4-bit mode */
 #define kSDMMCHOST_DATABUSWIDTH8BIT kSDIF_Bus8BitWidth /*!< 8-bit mode */
 
-#define SDMMCHOST_STANDARD_TUNING_START (0U) /*!< standard tuning start point */
-#define SDMMCHOST_TUINIG_STEP (1U)           /*!< standard tuning step */
-#define SDMMCHOST_RETUNING_TIMER_COUNT (4U)  /*!< Re-tuning timer */
-#define SDMMCHOST_TUNING_DELAY_MAX (0x7FU)
-#define SDMMCHOST_RETUNING_REQUEST (1U)
-#define SDMMCHOST_TUNING_ERROR (2U)
+#define SDMMCHOST_STANDARD_TUNING_START            (0U) /*!< standard tuning start point */
+#define SDMMCHOST_TUINIG_STEP                      (1U) /*!< standard tuning step */
+#define SDMMCHOST_RETUNING_TIMER_COUNT             (4U) /*!< Re-tuning timer */
+#define SDMMCHOST_TUNING_DELAY_MAX                 (0x7FU)
+#define SDMMCHOST_RETUNING_REQUEST                 (1U)
+#define SDMMCHOST_TUNING_ERROR                     (2U)
 /* function pointer define */
-#define SDMMCHOST_TRANSFER_FUNCTION sdif_transfer_function_t
+#define SDMMCHOST_TRANSFER_FUNCTION                sdif_transfer_function_t
 #define GET_SDMMCHOST_CAPABILITY(base, capability) (SDIF_GetCapability(base, capability))
-#define GET_SDMMCHOST_STATUS(base) (SDIF_GetControllerStatus(base))
-#define SDMMCHOST_SET_CARD_CLOCK(base, sourceClock_HZ, busClock_HZ) \
+#define GET_SDMMCHOST_STATUS(base)                 (SDIF_GetControllerStatus(base))
+#define SDMMCHOST_SET_CARD_CLOCK(base, sourceClock_HZ, busClock_HZ)                                                    \
     (SDIF_SetCardClock(base, sourceClock_HZ, busClock_HZ))
 #define SDMMCHOST_SET_CARD_BUS_WIDTH(base, busWidth) (SDIF_SetCardBusWidth(base, busWidth))
-#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout) (SDIF_SendCardActive(base, timeout))
+#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout)    (SDIF_SendCardActive(base, timeout))
 #define SDMMCHOST_SWITCH_VOLTAGE180V(base, enable18v)
 #define SDMMCHOST_SWITCH_VOLTAGE120V(base, enable12v)
 #define SDMMCHOST_CONFIG_IO_STRENGTH(speed, strength)
@@ -352,16 +352,16 @@ enum _host_capability
 #define SDMMCHOST_SETMMCBOOTCONFIG(base, config)
 #define SDMMCHOST_ENABLE_BOOT_FLAG(data)
 #define SDMMCHOST_ENABLE_BOOT_CONTINOUS_FLAG(data)
-#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config) (0U)
+#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config)  (0U)
 #define SDMMCHOST_GET_HOST_CONFIG_BLOCK_COUNT(config) (0U)
-#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config) (0U)
+#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config)   (0U)
 #define SDMMCHOST_EMPTY_CMD_FLAG(command)
-#define SDMMCHOST_CARD_DETECT_STATUS() BOARD_SDIF_CD_STATUS()
-#define SDMMCHOST_CARD_DETECT_INIT() BOARD_SDIF_CD_GPIO_INIT()
-#define SDMMCHOST_CARD_DETECT_INTERRUPT_STATUS() BOARD_SDIF_CD_INTERRUPT_STATUS()
-#define SDMMCHOST_CARD_DETECT_INTERRUPT_CLEAR(flag) BOARD_SDIF_CD_CLEAR_INTERRUPT(flag)
+#define SDMMCHOST_CARD_DETECT_STATUS()               BOARD_SDIF_CD_STATUS()
+#define SDMMCHOST_CARD_DETECT_INIT()                 BOARD_SDIF_CD_GPIO_INIT()
+#define SDMMCHOST_CARD_DETECT_INTERRUPT_STATUS()     BOARD_SDIF_CD_INTERRUPT_STATUS()
+#define SDMMCHOST_CARD_DETECT_INTERRUPT_CLEAR(flag)  BOARD_SDIF_CD_CLEAR_INTERRUPT(flag)
 #define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_HANDLER BOARD_SDIF_CD_PORT_IRQ_HANDLER
-#define SDMMCHOST_CARD_DETECT_IRQ BOARD_SDIF_CD_PORT_IRQ
+#define SDMMCHOST_CARD_DETECT_IRQ                    BOARD_SDIF_CD_PORT_IRQ
 /* define card detect pin voltage level when card inserted */
 #if defined BOARD_SDIF_CARD_INSERT_CD_LEVEL
 #define SDMMCHOST_CARD_INSERT_CD_LEVEL BOARD_SDIF_CARD_INSERT_CD_LEVEL
@@ -370,27 +370,27 @@ enum _host_capability
 #endif
 
 /* sd card detect through host CD */
-#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base) (SDIF_EnableInterrupt(base, kSDIF_CardDetect))
+#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base)        (SDIF_EnableInterrupt(base, kSDIF_CardDetect))
 #define SDMMCHOST_CARD_DETECT_INSERT_STATUS(base, data3) (SDIF_DetectCardInsert(base, data3))
 
 /*! @brief SDIF host capability*/
 enum _host_capability
 {
-    kSDMMCHOST_SupportHighSpeed = kSDIF_SupportHighSpeedFlag,
-    kSDMMCHOST_SupportDma = kSDIF_SupportDmaFlag,
+    kSDMMCHOST_SupportHighSpeed     = kSDIF_SupportHighSpeedFlag,
+    kSDMMCHOST_SupportDma           = kSDIF_SupportDmaFlag,
     kSDMMCHOST_SupportSuspendResume = kSDIF_SupportSuspendResumeFlag,
-    kSDMMCHOST_SupportV330 = kSDIF_SupportV330Flag,
-    kSDMMCHOST_SupportV300 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportV180 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportV120 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_Support4BitBusWidth = kSDIF_Support4BitFlag,
+    kSDMMCHOST_SupportV330          = kSDIF_SupportV330Flag,
+    kSDMMCHOST_SupportV300          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportV180          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportV120          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_Support4BitBusWidth  = kSDIF_Support4BitFlag,
     kSDMMCHOST_Support8BitBusWidth =
         SDMMCHOST_NOT_SUPPORT, /* mask the 8 bit here,user can change depend on your board */
-    kSDMMCHOST_SupportDDR50 = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportDDR50  = SDMMCHOST_NOT_SUPPORT,
     kSDMMCHOST_SupportSDR104 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportSDR50 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportHS200 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_SupportHS400 = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportSDR50  = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportHS200  = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportHS400  = SDMMCHOST_NOT_SUPPORT,
 
 };
 
@@ -400,51 +400,51 @@ enum _host_capability
  * The more data to be transferred in one time, the bigger value of SDHC_ADMA_TABLE_WORDS need to be set.
  * user need check the DMA descriptor table lenght if bigger enough.
  */
-#define SDIF_DMA_TABLE_WORDS (0x40U)
+#define SDIF_DMA_TABLE_WORDS                             (0x40U)
 /* address align */
-#define SDMMCHOST_DMA_BUFFER_ADDR_ALIGN (4U)
+#define SDMMCHOST_DMA_BUFFER_ADDR_ALIGN                  (4U)
 
 /*********************************************************USDHC**********************************************************/
-#elif(defined(FSL_FEATURE_SOC_USDHC_COUNT) && (FSL_FEATURE_SOC_USDHC_COUNT > 0U))
+#elif (defined(FSL_FEATURE_SOC_USDHC_COUNT) && (FSL_FEATURE_SOC_USDHC_COUNT > 0U))
 
 /*define host baseaddr ,clk freq, IRQ number*/
 #define MMC_HOST_BASEADDR BOARD_MMC_HOST_BASEADDR
 #define MMC_HOST_CLK_FREQ BOARD_MMC_HOST_CLK_FREQ
-#define MMC_HOST_IRQ BOARD_MMC_HOST_IRQ
-#define SD_HOST_BASEADDR BOARD_SD_HOST_BASEADDR
-#define SD_HOST_CLK_FREQ BOARD_SD_HOST_CLK_FREQ
-#define SD_HOST_IRQ BOARD_SD_HOST_IRQ
+#define MMC_HOST_IRQ      BOARD_MMC_HOST_IRQ
+#define SD_HOST_BASEADDR  BOARD_SD_HOST_BASEADDR
+#define SD_HOST_CLK_FREQ  BOARD_SD_HOST_CLK_FREQ
+#define SD_HOST_IRQ       BOARD_SD_HOST_IRQ
 
-#define SDMMCHOST_TYPE USDHC_Type
-#define SDMMCHOST_CONFIG usdhc_host_t
-#define SDMMCHOST_TRANSFER usdhc_transfer_t
-#define SDMMCHOST_COMMAND usdhc_command_t
-#define SDMMCHOST_DATA usdhc_data_t
-#define SDMMCHOST_BOOT_CONFIG usdhc_boot_config_t
+#define SDMMCHOST_TYPE         USDHC_Type
+#define SDMMCHOST_CONFIG       usdhc_host_t
+#define SDMMCHOST_TRANSFER     usdhc_transfer_t
+#define SDMMCHOST_COMMAND      usdhc_command_t
+#define SDMMCHOST_DATA         usdhc_data_t
+#define SDMMCHOST_BOOT_CONFIG  usdhc_boot_config_t
 #define CARD_DATA0_STATUS_MASK kUSDHC_Data0LineLevelFlag
 #define CARD_DATA1_STATUS_MASK kUSDHC_Data1LineLevelFlag
 #define CARD_DATA2_STATUS_MASK kUSDHC_Data2LineLevelFlag
 #define CARD_DATA3_STATUS_MASK kUSDHC_Data3LineLevelFlag
-#define CARD_DATA0_NOT_BUSY kUSDHC_Data0LineLevelFlag
+#define CARD_DATA0_NOT_BUSY    kUSDHC_Data0LineLevelFlag
 
 #define SDMMCHOST_BUS_WIDTH_TYPE usdhc_data_bus_width_t
-#define SDMMCHOST_CAPABILITY usdhc_capability_t
+#define SDMMCHOST_CAPABILITY     usdhc_capability_t
 
 #define kSDMMCHOST_DATABUSWIDTH1BIT kUSDHC_DataBusWidth1Bit /*!< 1-bit mode */
 #define kSDMMCHOST_DATABUSWIDTH4BIT kUSDHC_DataBusWidth4Bit /*!< 4-bit mode */
 #define kSDMMCHOST_DATABUSWIDTH8BIT kUSDHC_DataBusWidth8Bit /*!< 8-bit mode */
 
 #define SDMMCHOST_STANDARD_TUNING_START (10U) /*!< standard tuning start point */
-#define SDMMCHOST_TUINIG_STEP (2U)            /*!< standard tuning step */
-#define SDMMCHOST_RETUNING_TIMER_COUNT (0U)   /*!< Re-tuning timer */
-#define SDMMCHOST_TUNING_DELAY_MAX (0x7FU)
-#define SDMMCHOST_RETUNING_REQUEST kStatus_USDHC_ReTuningRequest
-#define SDMMCHOST_TUNING_ERROR kStatus_USDHC_TuningError
+#define SDMMCHOST_TUINIG_STEP           (2U)  /*!< standard tuning step */
+#define SDMMCHOST_RETUNING_TIMER_COUNT  (0U)  /*!< Re-tuning timer */
+#define SDMMCHOST_TUNING_DELAY_MAX      (0x7FU)
+#define SDMMCHOST_RETUNING_REQUEST      kStatus_USDHC_ReTuningRequest
+#define SDMMCHOST_TUNING_ERROR          kStatus_USDHC_TuningError
 /* define for card bus speed/strength cnofig */
-#define CARD_BUS_FREQ_50MHZ (0U)
-#define CARD_BUS_FREQ_100MHZ0 (1U)
-#define CARD_BUS_FREQ_100MHZ1 (2U)
-#define CARD_BUS_FREQ_200MHZ (3U)
+#define CARD_BUS_FREQ_50MHZ             (0U)
+#define CARD_BUS_FREQ_100MHZ0           (1U)
+#define CARD_BUS_FREQ_100MHZ1           (2U)
+#define CARD_BUS_FREQ_200MHZ            (3U)
 
 #define CARD_BUS_STRENGTH_0 (0U)
 #define CARD_BUS_STRENGTH_1 (1U)
@@ -455,22 +455,22 @@ enum _host_capability
 #define CARD_BUS_STRENGTH_6 (6U)
 #define CARD_BUS_STRENGTH_7 (7U)
 
-#define SDMMCHOST_STROBE_DLL_DELAY_TARGET (7U)
+#define SDMMCHOST_STROBE_DLL_DELAY_TARGET          (7U)
 #define SDMMCHOST_STROBE_DLL_DELAY_UPDATE_INTERVAL (4U)
 
 /* function pointer define */
-#define SDMMCHOST_TRANSFER_FUNCTION usdhc_transfer_function_t
+#define SDMMCHOST_TRANSFER_FUNCTION                usdhc_transfer_function_t
 #define GET_SDMMCHOST_CAPABILITY(base, capability) (USDHC_GetCapability(base, capability))
-#define GET_SDMMCHOST_STATUS(base) (USDHC_GetPresentStatusFlags(base))
-#define SDMMCHOST_SET_CARD_CLOCK(base, sourceClock_HZ, busClock_HZ) \
+#define GET_SDMMCHOST_STATUS(base)                 (USDHC_GetPresentStatusFlags(base))
+#define SDMMCHOST_SET_CARD_CLOCK(base, sourceClock_HZ, busClock_HZ)                                                    \
     (USDHC_SetSdClock(base, sourceClock_HZ, busClock_HZ))
 #define SDMMCHOST_ENABLE_CARD_CLOCK(base, enable)
-#define SDMMCHOST_FORCE_SDCLOCK_ON(base, enable) (USDHC_ForceClockOn(base, enable))
-#define SDMMCHOST_SET_CARD_BUS_WIDTH(base, busWidth) (USDHC_SetDataBusWidth(base, busWidth))
-#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout) (USDHC_SetCardActive(base, timeout))
+#define SDMMCHOST_FORCE_SDCLOCK_ON(base, enable)      (USDHC_ForceClockOn(base, enable))
+#define SDMMCHOST_SET_CARD_BUS_WIDTH(base, busWidth)  (USDHC_SetDataBusWidth(base, busWidth))
+#define SDMMCHOST_SEND_CARD_ACTIVE(base, timeout)     (USDHC_SetCardActive(base, timeout))
 #define SDMMCHOST_SWITCH_VOLTAGE180V(base, enable18v) (UDSHC_SelectVoltage(base, enable18v))
 #define SDMMCHOST_SWITCH_VOLTAGE120V(base, enable12v)
-#define SDMMCHOST_CONFIG_SD_IO(speed, strength) BOARD_SD_PIN_CONFIG(speed, strength)
+#define SDMMCHOST_CONFIG_SD_IO(speed, strength)  BOARD_SD_PIN_CONFIG(speed, strength)
 #define SDMMCHOST_CONFIG_MMC_IO(speed, strength) BOARD_MMC_PIN_CONFIG(speed, strength)
 #define SDMMCHOST_SWITCH_VCC_TO_180V()
 #define SDMMCHOST_SWITCH_VCC_TO_330V()
@@ -483,31 +483,31 @@ enum _host_capability
 #define SDMMCHOST_CHECK_TUNING_ERROR(base) (0U)
 #define SDMMCHOST_ADJUST_TUNING_DELAY(base, delay)
 #else
-#define SDMMCHOST_EXECUTE_STANDARD_TUNING_ENABLE(base, flag) \
+#define SDMMCHOST_EXECUTE_STANDARD_TUNING_ENABLE(base, flag)                                                           \
     (USDHC_EnableStandardTuning(base, SDMMCHOST_STANDARD_TUNING_START, SDMMCHOST_TUINIG_STEP, flag))
-#define SDMMCHOST_EXECUTE_STANDARD_TUNING_STATUS(base) (USDHC_GetExecuteStdTuningStatus(base))
-#define SDMMCHOST_EXECUTE_STANDARD_TUNING_RESULT(base) (USDHC_CheckStdTuningResult(base))
-#define SDMMCHOST_AUTO_STANDARD_RETUNING_TIMER(base) (USDHC_SetRetuningTimer(base, SDMMCHOST_RETUNING_TIMER_COUNT))
+#define SDMMCHOST_EXECUTE_STANDARD_TUNING_STATUS(base)     (USDHC_GetExecuteStdTuningStatus(base))
+#define SDMMCHOST_EXECUTE_STANDARD_TUNING_RESULT(base)     (USDHC_CheckStdTuningResult(base))
+#define SDMMCHOST_AUTO_STANDARD_RETUNING_TIMER(base)       (USDHC_SetRetuningTimer(base, SDMMCHOST_RETUNING_TIMER_COUNT))
 #define SDMMCHOST_EXECUTE_MANUAL_TUNING_ENABLE(base, flag) (USDHC_EnableManualTuning(base, flag))
-#define SDMMCHOST_ADJUST_TUNING_DELAY(base, delay) (USDHC_AdjustDelayForManualTuning(base, delay))
-#define SDMMCHOST_AUTO_TUNING_ENABLE(base, flag) (USDHC_EnableAutoTuning(base, flag))
-#define SDMMCHOST_CHECK_TUNING_ERROR(base) (USDHC_CheckTuningError(base))
+#define SDMMCHOST_ADJUST_TUNING_DELAY(base, delay)         (USDHC_AdjustDelayForManualTuning(base, delay))
+#define SDMMCHOST_AUTO_TUNING_ENABLE(base, flag)           (USDHC_EnableAutoTuning(base, flag))
+#define SDMMCHOST_CHECK_TUNING_ERROR(base)                 (USDHC_CheckTuningError(base))
 #endif
 
 #define SDMMCHOST_AUTO_TUNING_CONFIG(base) (USDHC_EnableAutoTuningForCmdAndData(base))
-#define SDMMCHOST_RESET_TUNING(base, timeout)                                                      \
-    {                                                                                              \
-        (USDHC_Reset(base, kUSDHC_ResetTuning | kUSDHC_ResetData | kUSDHC_ResetCommand, timeout)); \
+#define SDMMCHOST_RESET_TUNING(base, timeout)                                                                          \
+    {                                                                                                                  \
+        (USDHC_Reset(base, kUSDHC_ResetTuning | kUSDHC_ResetData | kUSDHC_ResetCommand, timeout));                     \
     }
 
 #define SDMMCHOST_ENABLE_DDR_MODE(base, flag, nibblePos) (USDHC_EnableDDRMode(base, flag, nibblePos))
 
 #if FSL_FEATURE_USDHC_HAS_HS400_MODE
-#define SDMMCHOST_ENABLE_HS400_MODE(base, flag) (USDHC_EnableHS400Mode(base, flag))
-#define SDMMCHOST_RESET_STROBE_DLL(base) (USDHC_ResetStrobeDLL(base))
-#define SDMMCHOST_ENABLE_STROBE_DLL(base, flag) (USDHC_EnableStrobeDLL(base, flag))
+#define SDMMCHOST_ENABLE_HS400_MODE(base, flag)                  (USDHC_EnableHS400Mode(base, flag))
+#define SDMMCHOST_RESET_STROBE_DLL(base)                         (USDHC_ResetStrobeDLL(base))
+#define SDMMCHOST_ENABLE_STROBE_DLL(base, flag)                  (USDHC_EnableStrobeDLL(base, flag))
 #define SDMMCHOST_CONFIG_STROBE_DLL(base, delay, updateInterval) (USDHC_ConfigStrobeDLL(base, delay, updateInterval))
-#define SDMMCHOST_GET_STROBE_DLL_STATUS (base)(USDHC_GetStrobeDLLStatus(base))
+#define SDMMCHOST_GET_STROBE_DLL_STATUS                          (base)(USDHC_GetStrobeDLLStatus(base))
 #else
 #define SDMMCHOST_ENABLE_HS400_MODE(base, flag)
 #define SDMMCHOST_RESET_STROBE_DLL(base)
@@ -516,30 +516,30 @@ enum _host_capability
 #define SDMMCHOST_GET_STROBE_DLL_STATUS(base)
 #endif
 
-#define SDMMCHOST_ENABLE_MMC_BOOT(base, flag) (USDHC_EnableMmcBoot(base, flag))
-#define SDMMCHOST_SETMMCBOOTCONFIG(base, config) (USDHC_SetMmcBootConfig(base, config))
+#define SDMMCHOST_ENABLE_MMC_BOOT(base, flag)                   (USDHC_EnableMmcBoot(base, flag))
+#define SDMMCHOST_SETMMCBOOTCONFIG(base, config)                (USDHC_SetMmcBootConfig(base, config))
 /* sd card power */
-#define SDMMCHOST_INIT_SD_POWER() BOARD_USDHC_SDCARD_POWER_CONTROL_INIT()
-#define SDMMCHOST_ENABLE_SD_POWER(enable) BOARD_USDHC_SDCARD_POWER_CONTROL(enable)
+#define SDMMCHOST_INIT_SD_POWER()                               BOARD_USDHC_SDCARD_POWER_CONTROL_INIT()
+#define SDMMCHOST_ENABLE_SD_POWER(enable)                       BOARD_USDHC_SDCARD_POWER_CONTROL(enable)
 /* mmc card power */
-#define SDMMCHOST_INIT_MMC_POWER() BOARD_USDHC_MMCCARD_POWER_CONTROL_INIT()
-#define SDMMCHOST_ENABLE_MMC_POWER(enable) BOARD_USDHC_MMCCARD_POWER_CONTROL(enable)
+#define SDMMCHOST_INIT_MMC_POWER()                              BOARD_USDHC_MMCCARD_POWER_CONTROL_INIT()
+#define SDMMCHOST_ENABLE_MMC_POWER(enable)                      BOARD_USDHC_MMCCARD_POWER_CONTROL(enable)
 /* sd card detect through gpio */
-#define SDMMCHOST_CARD_DETECT_GPIO_STATUS() BOARD_USDHC_CD_STATUS()
-#define SDMMCHOST_CARD_DETECT_GPIO_INIT() BOARD_USDHC_CD_GPIO_INIT()
-#define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_STATUS() BOARD_USDHC_CD_INTERRUPT_STATUS()
+#define SDMMCHOST_CARD_DETECT_GPIO_STATUS()                     BOARD_USDHC_CD_STATUS()
+#define SDMMCHOST_CARD_DETECT_GPIO_INIT()                       BOARD_USDHC_CD_GPIO_INIT()
+#define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_STATUS()           BOARD_USDHC_CD_INTERRUPT_STATUS()
 #define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_STATUS_CLEAR(flag) BOARD_USDHC_CD_CLEAR_INTERRUPT(flag)
-#define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_HANDLER BOARD_USDHC_CD_PORT_IRQ_HANDLER
-#define SDMMCHOST_CARD_DETECT_GPIO_IRQ BOARD_USDHC_CD_PORT_IRQ
+#define SDMMCHOST_CARD_DETECT_GPIO_INTERRUPT_HANDLER            BOARD_USDHC_CD_PORT_IRQ_HANDLER
+#define SDMMCHOST_CARD_DETECT_GPIO_IRQ                          BOARD_USDHC_CD_PORT_IRQ
 /* sd card detect through host CD */
-#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base) (USDHC_EnableInterruptStatus(base, kUSDHC_CardInsertionFlag))
-#define SDMMCHOST_CARD_DETECT_REMOVE_ENABLE(base) (USDHC_EnableInterruptStatus(base, kUSDHC_CardRemovalFlag))
-#define SDMMCHOST_CARD_DETECT_INSERT_STATUS(base) (USDHC_DetectCardInsert(base))
-#define SDMMCHOST_CARD_DETECT_REMOVE_STATUS(base) (USDHC_GetInterruptStatusFlags(base, kUSDHC_CardRemovalFlag))
-#define SDMMCHOST_CARD_DETECT_INSERT_INTERRUPT_ENABLE(base) \
+#define SDMMCHOST_CARD_DETECT_INSERT_ENABLE(base)               (USDHC_EnableInterruptStatus(base, kUSDHC_CardInsertionFlag))
+#define SDMMCHOST_CARD_DETECT_REMOVE_ENABLE(base)               (USDHC_EnableInterruptStatus(base, kUSDHC_CardRemovalFlag))
+#define SDMMCHOST_CARD_DETECT_INSERT_STATUS(base)               (USDHC_DetectCardInsert(base))
+#define SDMMCHOST_CARD_DETECT_REMOVE_STATUS(base)               (USDHC_GetInterruptStatusFlags(base, kUSDHC_CardRemovalFlag))
+#define SDMMCHOST_CARD_DETECT_INSERT_INTERRUPT_ENABLE(base)                                                            \
     (USDHC_EnableInterruptSignal(base, kUSDHC_CardInsertionFlag))
 #define SDMMCHOST_CARD_DETECT_REMOVE_INTERRUPT_ENABLE(base) (USDHC_EnableInterruptSignal(base, kUSDHC_CardRemovalFlag))
-#define SDMMCHOST_CARD_DETECT_DATA3_ENABLE(base, flag) (USDHC_CardDetectByData3(base, flag))
+#define SDMMCHOST_CARD_DETECT_DATA3_ENABLE(base, flag)      (USDHC_CardDetectByData3(base, flag))
 
 /* define card detect pin voltage level when card inserted */
 #if defined BOARD_USDHC_CARD_INSERT_CD_LEVEL
@@ -547,71 +547,71 @@ enum _host_capability
 #else
 #define SDMMCHOST_CARD_INSERT_CD_LEVEL (0U)
 #endif
-#define SDMMCHOST_ENABLE_TUNING_FLAG(data) (data.dataType = kUSDHC_TransferDataTuning)
-#define SDMMCHOST_ENABLE_BOOT_FLAG(data) (data.dataType = kUSDHC_TransferDataBoot)
-#define SDMMCHOST_ENABLE_BOOT_CONTINOUS_FLAG(data) (data.dataType = kUSDHC_TransferDataBootcontinous)
-#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config) (config->blockSize)
+#define SDMMCHOST_ENABLE_TUNING_FLAG(data)            (data.dataType = kUSDHC_TransferDataTuning)
+#define SDMMCHOST_ENABLE_BOOT_FLAG(data)              (data.dataType = kUSDHC_TransferDataBoot)
+#define SDMMCHOST_ENABLE_BOOT_CONTINOUS_FLAG(data)    (data.dataType = kUSDHC_TransferDataBootcontinous)
+#define SDMMCHOST_GET_HOST_CONFIG_BLOCK_SIZE(config)  (config->blockSize)
 #define SDMMCHOST_GET_HOST_CONFIG_BLOCK_COUNT(config) (config->blockCount)
-#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config) (config->bootMode)
-#define SDMMCHOST_EMPTY_CMD_FLAG(command) (command.type = kCARD_CommandTypeEmpty)
+#define SDMMCHOST_GET_HOST_CONFIG_BOOT_MODE(config)   (config->bootMode)
+#define SDMMCHOST_EMPTY_CMD_FLAG(command)             (command.type = kCARD_CommandTypeEmpty)
 /*! @brief USDHC host capability*/
 enum _host_capability
 {
-    kSDMMCHOST_SupportAdma = kUSDHC_SupportAdmaFlag,
-    kSDMMCHOST_SupportHighSpeed = kUSDHC_SupportHighSpeedFlag,
-    kSDMMCHOST_SupportDma = kUSDHC_SupportDmaFlag,
+    kSDMMCHOST_SupportAdma          = kUSDHC_SupportAdmaFlag,
+    kSDMMCHOST_SupportHighSpeed     = kUSDHC_SupportHighSpeedFlag,
+    kSDMMCHOST_SupportDma           = kUSDHC_SupportDmaFlag,
     kSDMMCHOST_SupportSuspendResume = kUSDHC_SupportSuspendResumeFlag,
-    kSDMMCHOST_SupportV330 = kUSDHC_SupportV330Flag, /* this define should depend on your board config */
-    kSDMMCHOST_SupportV300 = kUSDHC_SupportV300Flag, /* this define should depend on your board config */
+    kSDMMCHOST_SupportV330          = kUSDHC_SupportV330Flag, /* this define should depend on your board config */
+    kSDMMCHOST_SupportV300          = kUSDHC_SupportV300Flag, /* this define should depend on your board config */
 #if defined(BOARD_SD_SUPPORT_180V) && !BOARD_SD_SUPPORT_180V
-    kSDMMCHOST_SupportV180 = SDMMCHOST_NOT_SUPPORT, /* this define should depend on you board config */
+    kSDMMCHOST_SupportV180          = SDMMCHOST_NOT_SUPPORT,  /* this define should depend on you board config */
 #else
-    kSDMMCHOST_SupportV180 = kUSDHC_SupportV180Flag, /* this define should depend on you board config */
+    kSDMMCHOST_SupportV180         = kUSDHC_SupportV180Flag, /* this define should depend on you board config */
 #endif
-    kSDMMCHOST_SupportV120 = SDMMCHOST_NOT_SUPPORT,
-    kSDMMCHOST_Support4BitBusWidth = kUSDHC_Support4BitFlag,
+    kSDMMCHOST_SupportV120          = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_Support4BitBusWidth  = kUSDHC_Support4BitFlag,
 #if defined(BOARD_MMC_SUPPORT_8BIT_BUS)
 #if BOARD_MMC_SUPPORT_8BIT_BUS
-    kSDMMCHOST_Support8BitBusWidth = kUSDHC_Support8BitFlag,
+    kSDMMCHOST_Support8BitBusWidth  = kUSDHC_Support8BitFlag,
 #else
     kSDMMCHOST_Support8BitBusWidth = SDMMCHOST_NOT_SUPPORT,
 #endif
 #else
     kSDMMCHOST_Support8BitBusWidth = kUSDHC_Support8BitFlag,
 #endif
-    kSDMMCHOST_SupportDDR50 = kUSDHC_SupportDDR50Flag,
-    kSDMMCHOST_SupportSDR104 = kUSDHC_SupportSDR104Flag,
-    kSDMMCHOST_SupportSDR50 = kUSDHC_SupportSDR50Flag,
-    kSDMMCHOST_SupportHS200 = kUSDHC_SupportSDR104Flag,
+    kSDMMCHOST_SupportDDR50         = kUSDHC_SupportDDR50Flag,
+    kSDMMCHOST_SupportSDR104        = kUSDHC_SupportSDR104Flag,
+    kSDMMCHOST_SupportSDR50         = kUSDHC_SupportSDR50Flag,
+    kSDMMCHOST_SupportHS200         = kUSDHC_SupportSDR104Flag,
 #if FSL_FEATURE_USDHC_HAS_HS400_MODE
-    kSDMMCHOST_SupportHS400 = SDMMCHOST_SUPPORT
+    kSDMMCHOST_SupportHS400         = SDMMCHOST_SUPPORT
 #else
-    kSDMMCHOST_SupportHS400 = SDMMCHOST_NOT_SUPPORT,
+    kSDMMCHOST_SupportHS400        = SDMMCHOST_NOT_SUPPORT,
 #endif
 };
 
 /* Endian mode. */
-#define USDHC_ENDIAN_MODE kUSDHC_EndianModeLittle
+#define USDHC_ENDIAN_MODE               kUSDHC_EndianModeLittle
 
 /* DMA mode */
-#define USDHC_DMA_MODE kUSDHC_DmaModeAdma2
+#define USDHC_DMA_MODE                  kUSDHC_DmaModeAdma2
 /* address align */
 #define SDMMCHOST_DMA_BUFFER_ADDR_ALIGN (USDHC_ADMA2_ADDRESS_ALIGN)
 
 /* Read/write watermark level. The bigger value indicates DMA has higher read/write performance. */
-#define USDHC_READ_WATERMARK_LEVEL (0x80U)
-#define USDHC_WRITE_WATERMARK_LEVEL (0x80U)
+#define USDHC_READ_WATERMARK_LEVEL      (0x80U)
+#define USDHC_WRITE_WATERMARK_LEVEL     (0x80U)
 
 /* ADMA table length united as word.
  *
  * One ADMA2 table item occupy two words which can transfer maximum 0xFFFFU bytes one time.
  * The more data to be transferred in one time, the bigger value of SDHC_ADMA_TABLE_WORDS need to be set.
  */
-#define USDHC_ADMA_TABLE_WORDS (8U) /* define the ADMA descriptor table length */
-#define USDHC_ADMA2_ADDR_ALIGN (4U) /* define the ADMA2 descriptor table addr align size */
-#define USDHC_READ_BURST_LEN (8U)   /*!< number of words USDHC read in a single burst */
-#define USDHC_WRITE_BURST_LEN (8U)  /*!< number of words USDHC write in a single burst */
-#define USDHC_DATA_TIMEOUT (0xFU)   /*!< data timeout counter value */
+#define USDHC_ADMA_TABLE_WORDS          (8U)   /* define the ADMA descriptor table length */
+#define USDHC_ADMA2_ADDR_ALIGN          (4U)   /* define the ADMA2 descriptor table addr align size */
+#define USDHC_READ_BURST_LEN            (8U)   /*!< number of words USDHC read in a single burst */
+#define USDHC_WRITE_BURST_LEN           (8U)   /*!< number of words USDHC write in a single burst */
+#define USDHC_DATA_TIMEOUT              (0xFU) /*!< data timeout counter value */
 
 #endif /* (defined(FSL_FEATURE_SOC_SDHC_COUNT) && (FSL_FEATURE_SOC_SDHC_COUNT > 0U)) */
 
@@ -619,13 +619,13 @@ enum _host_capability
 typedef void (*sdmmchost_cd_callback_t)(bool isInserted, void *userData);
 
 /*! @brief host Endian mode
-* corresponding to driver define
-*/
+ * corresponding to driver define
+ */
 enum _sdmmchost_endian_mode
 {
-    kSDMMCHOST_EndianModeBig = 0U,         /*!< Big endian mode */
+    kSDMMCHOST_EndianModeBig         = 0U, /*!< Big endian mode */
     kSDMMCHOST_EndianModeHalfWordBig = 1U, /*!< Half word big endian mode */
-    kSDMMCHOST_EndianModeLittle = 2U,      /*!< Little endian mode */
+    kSDMMCHOST_EndianModeLittle      = 2U, /*!< Little endian mode */
 };
 
 /*! @brief sd card detect type */
@@ -666,92 +666,93 @@ typedef struct _sdmmchost_pwr_card
  * API
  ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name adaptor function
- * @{
- */
+    /*!
+     * @name adaptor function
+     * @{
+     */
 
-/*!
- * @brief host not support function, this function is used for host not support feature
- * @param  void parameter ,used to avoid build warning
- * @retval kStatus_Fail ,host do not suppport
- */
-static inline status_t SDMMCHOST_NotSupport(void *parameter)
-{
-    parameter = parameter;
-    return kStatus_Success;
-}
+    /*!
+     * @brief host not support function, this function is used for host not support feature
+     * @param  void parameter ,used to avoid build warning
+     * @retval kStatus_Fail ,host do not suppport
+     */
+    static inline status_t SDMMCHOST_NotSupport(void *parameter)
+    {
+        parameter = parameter;
+        return kStatus_Success;
+    }
 
-/*!
- * @brief Detect card insert, only need for SD cases.
- * @param base the pointer to host base address
- * @param cd card detect configuration
- * @param waitCardStatus status which user want to wait
- * @retval kStatus_Success detect card insert
- * @retval kStatus_Fail card insert event fail
- */
-status_t SDMMCHOST_WaitCardDetectStatus(SDMMCHOST_TYPE *hostBase,
-                                        const sdmmchost_detect_card_t *cd,
-                                        bool waitCardStatus);
+    /*!
+     * @brief Detect card insert, only need for SD cases.
+     * @param base the pointer to host base address
+     * @param cd card detect configuration
+     * @param waitCardStatus status which user want to wait
+     * @retval kStatus_Success detect card insert
+     * @retval kStatus_Fail card insert event fail
+     */
+    status_t SDMMCHOST_WaitCardDetectStatus(SDMMCHOST_TYPE *hostBase,
+                                            const sdmmchost_detect_card_t *cd,
+                                            bool waitCardStatus);
 
-/*!
- * @brief check card is present or not.
- * @retval true card is present
- * @retval false card is not present
- */
-bool SDMMCHOST_IsCardPresent(void);
+    /*!
+     * @brief check card is present or not.
+     * @retval true card is present
+     * @retval false card is not present
+     */
+    bool SDMMCHOST_IsCardPresent(void);
 
-/*!
- * @brief Init host controller.
- * @param host the pointer to host structure in card structure.
- * @param userData specific user data
- * @retval kStatus_Success host init success
- * @retval kStatus_Fail event fail
- */
-status_t SDMMCHOST_Init(SDMMCHOST_CONFIG *host, void *userData);
+    /*!
+     * @brief Init host controller.
+     * @param host the pointer to host structure in card structure.
+     * @param userData specific user data
+     * @retval kStatus_Success host init success
+     * @retval kStatus_Fail event fail
+     */
+    status_t SDMMCHOST_Init(SDMMCHOST_CONFIG *host, void *userData);
 
-/*!
- * @brief reset host controller.
- * @param host base address.
- */
-void SDMMCHOST_Reset(SDMMCHOST_TYPE *base);
+    /*!
+     * @brief reset host controller.
+     * @param host base address.
+     */
+    void SDMMCHOST_Reset(SDMMCHOST_TYPE *base);
 
-/*!
- * @brief host controller error recovery.
- * @param host base address.
- */
-void SDMMCHOST_ErrorRecovery(SDMMCHOST_TYPE *base);
+    /*!
+     * @brief host controller error recovery.
+     * @param host base address.
+     */
+    void SDMMCHOST_ErrorRecovery(SDMMCHOST_TYPE *base);
 
-/*!
- * @brief Deinit host controller.
- * @param host the pointer to host structure in card structure.
- */
-void SDMMCHOST_Deinit(void *host);
+    /*!
+     * @brief Deinit host controller.
+     * @param host the pointer to host structure in card structure.
+     */
+    void SDMMCHOST_Deinit(void *host);
 
-/*!
- * @brief host power off card function.
- * @param base host base address.
- * @param pwr depend on user define power configuration.
- */
-void SDMMCHOST_PowerOffCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr);
+    /*!
+     * @brief host power off card function.
+     * @param base host base address.
+     * @param pwr depend on user define power configuration.
+     */
+    void SDMMCHOST_PowerOffCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr);
 
-/*!
- * @brief host power on card function.
- * @param base host base address.
- * @param pwr depend on user define power configuration.
- */
-void SDMMCHOST_PowerOnCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr);
+    /*!
+     * @brief host power on card function.
+     * @param base host base address.
+     * @param pwr depend on user define power configuration.
+     */
+    void SDMMCHOST_PowerOnCard(SDMMCHOST_TYPE *base, const sdmmchost_pwr_card_t *pwr);
 
-/*!
- * @brief SDMMC host delay function.
- * @param milliseconds delay counter.
- */
-void SDMMCHOST_Delay(uint32_t milliseconds);
+    /*!
+     * @brief SDMMC host delay function.
+     * @param milliseconds delay counter.
+     */
+    void SDMMCHOST_Delay(uint32_t milliseconds);
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_spec.h b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_spec.h
index 91e8c0004..be3d82419 100644
--- a/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_spec.h
+++ b/module-bsp/board/rt1051/bsp/eMMC/fsl_sdmmc_spec.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -64,27 +64,27 @@
 /*! @brief Card status bit in R1 */
 enum _sdmmc_r1_card_status_flag
 {
-    kSDMMC_R1OutOfRangeFlag = (1U << 31U),                 /*!< Out of range status bit */
-    kSDMMC_R1AddressErrorFlag = (1U << 30U),               /*!< Address error status bit */
-    kSDMMC_R1BlockLengthErrorFlag = (1U << 29U),           /*!< Block length error status bit */
-    kSDMMC_R1EraseSequenceErrorFlag = (1U << 28U),         /*!< Erase sequence error status bit */
-    kSDMMC_R1EraseParameterErrorFlag = (1U << 27U),        /*!< Erase parameter error status bit */
-    kSDMMC_R1WriteProtectViolationFlag = (1U << 26U),      /*!< Write protection violation status bit */
-    kSDMMC_R1CardIsLockedFlag = (1U << 25U),               /*!< Card locked status bit */
-    kSDMMC_R1LockUnlockFailedFlag = (1U << 24U),           /*!< lock/unlock error status bit */
-    kSDMMC_R1CommandCrcErrorFlag = (1U << 23U),            /*!< CRC error status bit */
-    kSDMMC_R1IllegalCommandFlag = (1U << 22U),             /*!< Illegal command status bit */
-    kSDMMC_R1CardEccFailedFlag = (1U << 21U),              /*!< Card ecc error status bit */
-    kSDMMC_R1CardControllerErrorFlag = (1U << 20U),        /*!< Internal card controller error status bit */
-    kSDMMC_R1ErrorFlag = (1U << 19U),                      /*!< A general or an unknown error status bit */
-    kSDMMC_R1CidCsdOverwriteFlag = (1U << 16U),            /*!< Cid/csd overwrite status bit */
-    kSDMMC_R1WriteProtectEraseSkipFlag = (1U << 15U),      /*!< Write protection erase skip status bit */
-    kSDMMC_R1CardEccDisabledFlag = (1U << 14U),            /*!< Card ecc disabled status bit */
-    kSDMMC_R1EraseResetFlag = (1U << 13U),                 /*!< Erase reset status bit */
-    kSDMMC_R1ReadyForDataFlag = (1U << 8U),                /*!< Ready for data status bit */
-    kSDMMC_R1SwitchErrorFlag = (1U << 7U),                 /*!< Switch error status bit */
-    kSDMMC_R1ApplicationCommandFlag = (1U << 5U),          /*!< Application command enabled status bit */
-    kSDMMC_R1AuthenticationSequenceErrorFlag = (1U << 3U), /*!< error in the sequence of authentication process */
+    kSDMMC_R1OutOfRangeFlag                  = (1U << 31U), /*!< Out of range status bit */
+    kSDMMC_R1AddressErrorFlag                = (1U << 30U), /*!< Address error status bit */
+    kSDMMC_R1BlockLengthErrorFlag            = (1U << 29U), /*!< Block length error status bit */
+    kSDMMC_R1EraseSequenceErrorFlag          = (1U << 28U), /*!< Erase sequence error status bit */
+    kSDMMC_R1EraseParameterErrorFlag         = (1U << 27U), /*!< Erase parameter error status bit */
+    kSDMMC_R1WriteProtectViolationFlag       = (1U << 26U), /*!< Write protection violation status bit */
+    kSDMMC_R1CardIsLockedFlag                = (1U << 25U), /*!< Card locked status bit */
+    kSDMMC_R1LockUnlockFailedFlag            = (1U << 24U), /*!< lock/unlock error status bit */
+    kSDMMC_R1CommandCrcErrorFlag             = (1U << 23U), /*!< CRC error status bit */
+    kSDMMC_R1IllegalCommandFlag              = (1U << 22U), /*!< Illegal command status bit */
+    kSDMMC_R1CardEccFailedFlag               = (1U << 21U), /*!< Card ecc error status bit */
+    kSDMMC_R1CardControllerErrorFlag         = (1U << 20U), /*!< Internal card controller error status bit */
+    kSDMMC_R1ErrorFlag                       = (1U << 19U), /*!< A general or an unknown error status bit */
+    kSDMMC_R1CidCsdOverwriteFlag             = (1U << 16U), /*!< Cid/csd overwrite status bit */
+    kSDMMC_R1WriteProtectEraseSkipFlag       = (1U << 15U), /*!< Write protection erase skip status bit */
+    kSDMMC_R1CardEccDisabledFlag             = (1U << 14U), /*!< Card ecc disabled status bit */
+    kSDMMC_R1EraseResetFlag                  = (1U << 13U), /*!< Erase reset status bit */
+    kSDMMC_R1ReadyForDataFlag                = (1U << 8U),  /*!< Ready for data status bit */
+    kSDMMC_R1SwitchErrorFlag                 = (1U << 7U),  /*!< Switch error status bit */
+    kSDMMC_R1ApplicationCommandFlag          = (1U << 5U),  /*!< Application command enabled status bit */
+    kSDMMC_R1AuthenticationSequenceErrorFlag = (1U << 3U),  /*!< error in the sequence of authentication process */
 
     kSDMMC_R1ErrorAllFlag =
         (kSDMMC_R1OutOfRangeFlag | kSDMMC_R1AddressErrorFlag | kSDMMC_R1BlockLengthErrorFlag |
@@ -101,42 +101,42 @@ enum _sdmmc_r1_card_status_flag
 /*! @brief CURRENT_STATE filed in R1 */
 typedef enum _sdmmc_r1_current_state
 {
-    kSDMMC_R1StateIdle = 0U,        /*!< R1: current state: idle */
-    kSDMMC_R1StateReady = 1U,       /*!< R1: current state: ready */
-    kSDMMC_R1StateIdentify = 2U,    /*!< R1: current state: identification */
-    kSDMMC_R1StateStandby = 3U,     /*!< R1: current state: standby */
-    kSDMMC_R1StateTransfer = 4U,    /*!< R1: current state: transfer */
-    kSDMMC_R1StateSendData = 5U,    /*!< R1: current state: sending data */
+    kSDMMC_R1StateIdle        = 0U, /*!< R1: current state: idle */
+    kSDMMC_R1StateReady       = 1U, /*!< R1: current state: ready */
+    kSDMMC_R1StateIdentify    = 2U, /*!< R1: current state: identification */
+    kSDMMC_R1StateStandby     = 3U, /*!< R1: current state: standby */
+    kSDMMC_R1StateTransfer    = 4U, /*!< R1: current state: transfer */
+    kSDMMC_R1StateSendData    = 5U, /*!< R1: current state: sending data */
     kSDMMC_R1StateReceiveData = 6U, /*!< R1: current state: receiving data */
-    kSDMMC_R1StateProgram = 7U,     /*!< R1: current state: programming */
-    kSDMMC_R1StateDisconnect = 8U,  /*!< R1: current state: disconnect */
+    kSDMMC_R1StateProgram     = 7U, /*!< R1: current state: programming */
+    kSDMMC_R1StateDisconnect  = 8U, /*!< R1: current state: disconnect */
 } sdmmc_r1_current_state_t;
 
 /*! @brief Error bit in SPI mode R1 */
 enum _sdspi_r1_error_status_flag
 {
-    kSDSPI_R1InIdleStateFlag = (1U << 0U),        /*!< In idle state */
-    kSDSPI_R1EraseResetFlag = (1U << 1U),         /*!< Erase reset */
-    kSDSPI_R1IllegalCommandFlag = (1U << 2U),     /*!< Illegal command */
-    kSDSPI_R1CommandCrcErrorFlag = (1U << 3U),    /*!< Com crc error */
+    kSDSPI_R1InIdleStateFlag        = (1U << 0U), /*!< In idle state */
+    kSDSPI_R1EraseResetFlag         = (1U << 1U), /*!< Erase reset */
+    kSDSPI_R1IllegalCommandFlag     = (1U << 2U), /*!< Illegal command */
+    kSDSPI_R1CommandCrcErrorFlag    = (1U << 3U), /*!< Com crc error */
     kSDSPI_R1EraseSequenceErrorFlag = (1U << 4U), /*!< Erase sequence error */
-    kSDSPI_R1AddressErrorFlag = (1U << 5U),       /*!< Address error */
-    kSDSPI_R1ParameterErrorFlag = (1U << 6U),     /*!< Parameter error */
+    kSDSPI_R1AddressErrorFlag       = (1U << 5U), /*!< Address error */
+    kSDSPI_R1ParameterErrorFlag     = (1U << 6U), /*!< Parameter error */
 };
 
 /*! @brief Error bit in SPI mode R2 */
 enum _sdspi_r2_error_status_flag
 {
-    kSDSPI_R2CardLockedFlag = (1U << 0U),            /*!< Card is locked */
-    kSDSPI_R2WriteProtectEraseSkip = (1U << 1U),     /*!< Write protect erase skip */
-    kSDSPI_R2LockUnlockFailed = (1U << 1U),          /*!< Lock/unlock command failed */
-    kSDSPI_R2ErrorFlag = (1U << 2U),                 /*!< Unknown error */
-    kSDSPI_R2CardControllerErrorFlag = (1U << 3U),   /*!< Card controller error */
-    kSDSPI_R2CardEccFailedFlag = (1U << 4U),         /*!< Card ecc failed */
+    kSDSPI_R2CardLockedFlag            = (1U << 0U), /*!< Card is locked */
+    kSDSPI_R2WriteProtectEraseSkip     = (1U << 1U), /*!< Write protect erase skip */
+    kSDSPI_R2LockUnlockFailed          = (1U << 1U), /*!< Lock/unlock command failed */
+    kSDSPI_R2ErrorFlag                 = (1U << 2U), /*!< Unknown error */
+    kSDSPI_R2CardControllerErrorFlag   = (1U << 3U), /*!< Card controller error */
+    kSDSPI_R2CardEccFailedFlag         = (1U << 4U), /*!< Card ecc failed */
     kSDSPI_R2WriteProtectViolationFlag = (1U << 5U), /*!< Write protect violation */
-    kSDSPI_R2EraseParameterErrorFlag = (1U << 6U),   /*!< Erase parameter error */
-    kSDSPI_R2OutOfRangeFlag = (1U << 7U),            /*!< Out of range */
-    kSDSPI_R2CsdOverwriteFlag = (1U << 7U),          /*!< CSD overwrite */
+    kSDSPI_R2EraseParameterErrorFlag   = (1U << 6U), /*!< Erase parameter error */
+    kSDSPI_R2OutOfRangeFlag            = (1U << 7U), /*!< Out of range */
+    kSDSPI_R2CsdOverwriteFlag          = (1U << 7U), /*!< CSD overwrite */
 };
 
 /*! @brief The bit mask for COMMAND VERSION field in R7 */
@@ -159,19 +159,19 @@ enum _sdspi_r2_error_status_flag
 /*! @brief Data Error Token mask bit */
 enum _sdspi_data_error_token
 {
-    kSDSPI_DataErrorTokenError = (1U << 0U),               /*!< Data error */
+    kSDSPI_DataErrorTokenError               = (1U << 0U), /*!< Data error */
     kSDSPI_DataErrorTokenCardControllerError = (1U << 1U), /*!< Card controller error */
-    kSDSPI_DataErrorTokenCardEccFailed = (1U << 2U),       /*!< Card ecc error */
-    kSDSPI_DataErrorTokenOutOfRange = (1U << 3U),          /*!< Out of range */
+    kSDSPI_DataErrorTokenCardEccFailed       = (1U << 2U), /*!< Card ecc error */
+    kSDSPI_DataErrorTokenOutOfRange          = (1U << 3U), /*!< Out of range */
 };
 
 /*! @brief Data Token */
 typedef enum _sdspi_data_token
 {
-    kSDSPI_DataTokenBlockRead = 0xFEU,          /*!< Single block read, multiple block read */
-    kSDSPI_DataTokenSingleBlockWrite = 0xFEU,   /*!< Single block write */
+    kSDSPI_DataTokenBlockRead          = 0xFEU, /*!< Single block read, multiple block read */
+    kSDSPI_DataTokenSingleBlockWrite   = 0xFEU, /*!< Single block write */
     kSDSPI_DataTokenMultipleBlockWrite = 0xFCU, /*!< Multiple block write */
-    kSDSPI_DataTokenStopTransfer = 0xFDU,       /*!< Stop transmission */
+    kSDSPI_DataTokenStopTransfer       = 0xFDU, /*!< Stop transmission */
 } sdspi_data_token_t;
 
 /* Data Response Token mask */
@@ -179,22 +179,22 @@ typedef enum _sdspi_data_token
 /*! @brief Data Response Token */
 typedef enum _sdspi_data_response_token
 {
-    kSDSPI_DataResponseTokenAccepted = 0x05U,   /*!< Data accepted */
-    kSDSPI_DataResponseTokenCrcError = 0x0BU,   /*!< Data rejected due to CRC error */
+    kSDSPI_DataResponseTokenAccepted   = 0x05U, /*!< Data accepted */
+    kSDSPI_DataResponseTokenCrcError   = 0x0BU, /*!< Data rejected due to CRC error */
     kSDSPI_DataResponseTokenWriteError = 0x0DU, /*!< Data rejected due to write error */
 } sdspi_data_response_token_t;
 
 /*! @brief SD card individual commands */
 typedef enum _sd_command
 {
-    kSD_SendRelativeAddress = 3U,    /*!< Send Relative Address */
-    kSD_Switch = 6U,                 /*!< Switch Function */
-    kSD_SendInterfaceCondition = 8U, /*!< Send Interface Condition */
-    kSD_VoltageSwitch = 11U,         /*!< Voltage Switch */
-    kSD_SpeedClassControl = 20U,     /*!< Speed Class control */
-    kSD_EraseWriteBlockStart = 32U,  /*!< Write Block Start */
-    kSD_EraseWriteBlockEnd = 33U,    /*!< Write Block End */
-    kSD_SendTuningBlock = 19U,       /*!< Send Tuning Block */
+    kSD_SendRelativeAddress    = 3U,  /*!< Send Relative Address */
+    kSD_Switch                 = 6U,  /*!< Switch Function */
+    kSD_SendInterfaceCondition = 8U,  /*!< Send Interface Condition */
+    kSD_VoltageSwitch          = 11U, /*!< Voltage Switch */
+    kSD_SpeedClassControl      = 20U, /*!< Speed Class control */
+    kSD_EraseWriteBlockStart   = 32U, /*!< Write Block Start */
+    kSD_EraseWriteBlockEnd     = 33U, /*!< Write Block End */
+    kSD_SendTuningBlock        = 19U, /*!< Send Tuning Block */
 } sd_command_t;
 
 /*! @brief SDSPI individual commands */
@@ -206,46 +206,46 @@ typedef enum _sdspi_command
 /*! @brief SD card individual application commands */
 typedef enum _sd_application_command
 {
-    kSD_ApplicationSetBusWdith = 6U,              /*!< Set Bus Width */
-    kSD_ApplicationStatus = 13U,                  /*!< Send SD status */
-    kSD_ApplicationSendNumberWriteBlocks = 22U,   /*!< Send Number Of Written Blocks */
+    kSD_ApplicationSetBusWdith             = 6U,  /*!< Set Bus Width */
+    kSD_ApplicationStatus                  = 13U, /*!< Send SD status */
+    kSD_ApplicationSendNumberWriteBlocks   = 22U, /*!< Send Number Of Written Blocks */
     kSD_ApplicationSetWriteBlockEraseCount = 23U, /*!< Set Write Block Erase Count */
-    kSD_ApplicationSendOperationCondition = 41U,  /*!< Send Operation Condition */
-    kSD_ApplicationSetClearCardDetect = 42U,      /*!< Set Connnect/Disconnect pull up on detect pin */
-    kSD_ApplicationSendScr = 51U,                 /*!< Send Scr */
+    kSD_ApplicationSendOperationCondition  = 41U, /*!< Send Operation Condition */
+    kSD_ApplicationSetClearCardDetect      = 42U, /*!< Set Connnect/Disconnect pull up on detect pin */
+    kSD_ApplicationSendScr                 = 51U, /*!< Send Scr */
 } sd_application_command_t;
 
 /*! @brief SD card command class */
 enum _sdmmc_command_class
 {
-    kSDMMC_CommandClassBasic = (1U << 0U),               /*!< Card command class 0 */
-    kSDMMC_CommandClassBlockRead = (1U << 2U),           /*!< Card command class 2 */
-    kSDMMC_CommandClassBlockWrite = (1U << 4U),          /*!< Card command class 4 */
-    kSDMMC_CommandClassErase = (1U << 5U),               /*!< Card command class 5 */
-    kSDMMC_CommandClassWriteProtect = (1U << 6U),        /*!< Card command class 6 */
-    kSDMMC_CommandClassLockCard = (1U << 7U),            /*!< Card command class 7 */
-    kSDMMC_CommandClassApplicationSpecific = (1U << 8U), /*!< Card command class 8 */
-    kSDMMC_CommandClassInputOutputMode = (1U << 9U),     /*!< Card command class 9 */
-    kSDMMC_CommandClassSwitch = (1U << 10U),             /*!< Card command class 10 */
+    kSDMMC_CommandClassBasic               = (1U << 0U),  /*!< Card command class 0 */
+    kSDMMC_CommandClassBlockRead           = (1U << 2U),  /*!< Card command class 2 */
+    kSDMMC_CommandClassBlockWrite          = (1U << 4U),  /*!< Card command class 4 */
+    kSDMMC_CommandClassErase               = (1U << 5U),  /*!< Card command class 5 */
+    kSDMMC_CommandClassWriteProtect        = (1U << 6U),  /*!< Card command class 6 */
+    kSDMMC_CommandClassLockCard            = (1U << 7U),  /*!< Card command class 7 */
+    kSDMMC_CommandClassApplicationSpecific = (1U << 8U),  /*!< Card command class 8 */
+    kSDMMC_CommandClassInputOutputMode     = (1U << 9U),  /*!< Card command class 9 */
+    kSDMMC_CommandClassSwitch              = (1U << 10U), /*!< Card command class 10 */
 };
 
 /*! @brief OCR register in SD card */
 enum _sd_ocr_flag
 {
-    kSD_OcrPowerUpBusyFlag = (1U << 31U),                            /*!< Power up busy status */
+    kSD_OcrPowerUpBusyFlag         = (1U << 31U),                    /*!< Power up busy status */
     kSD_OcrHostCapacitySupportFlag = (1U << 30U),                    /*!< Card capacity status */
     kSD_OcrCardCapacitySupportFlag = kSD_OcrHostCapacitySupportFlag, /*!< Card capacity status */
-    kSD_OcrSwitch18RequestFlag = (1U << 24U),                        /*!< Switch to 1.8V request */
-    kSD_OcrSwitch18AcceptFlag = kSD_OcrSwitch18RequestFlag,          /*!< Switch to 1.8V accepted */
-    kSD_OcrVdd27_28Flag = (1U << 15U),                               /*!< VDD 2.7-2.8 */
-    kSD_OcrVdd28_29Flag = (1U << 16U),                               /*!< VDD 2.8-2.9 */
-    kSD_OcrVdd29_30Flag = (1U << 17U),                               /*!< VDD 2.9-3.0 */
-    kSD_OcrVdd30_31Flag = (1U << 18U),                               /*!< VDD 2.9-3.0 */
-    kSD_OcrVdd31_32Flag = (1U << 19U),                               /*!< VDD 3.0-3.1 */
-    kSD_OcrVdd32_33Flag = (1U << 20U),                               /*!< VDD 3.1-3.2 */
-    kSD_OcrVdd33_34Flag = (1U << 21U),                               /*!< VDD 3.2-3.3 */
-    kSD_OcrVdd34_35Flag = (1U << 22U),                               /*!< VDD 3.3-3.4 */
-    kSD_OcrVdd35_36Flag = (1U << 23U),                               /*!< VDD 3.4-3.5 */
+    kSD_OcrSwitch18RequestFlag     = (1U << 24U),                    /*!< Switch to 1.8V request */
+    kSD_OcrSwitch18AcceptFlag      = kSD_OcrSwitch18RequestFlag,     /*!< Switch to 1.8V accepted */
+    kSD_OcrVdd27_28Flag            = (1U << 15U),                    /*!< VDD 2.7-2.8 */
+    kSD_OcrVdd28_29Flag            = (1U << 16U),                    /*!< VDD 2.8-2.9 */
+    kSD_OcrVdd29_30Flag            = (1U << 17U),                    /*!< VDD 2.9-3.0 */
+    kSD_OcrVdd30_31Flag            = (1U << 18U),                    /*!< VDD 2.9-3.0 */
+    kSD_OcrVdd31_32Flag            = (1U << 19U),                    /*!< VDD 3.0-3.1 */
+    kSD_OcrVdd32_33Flag            = (1U << 20U),                    /*!< VDD 3.1-3.2 */
+    kSD_OcrVdd33_34Flag            = (1U << 21U),                    /*!< VDD 3.2-3.3 */
+    kSD_OcrVdd34_35Flag            = (1U << 22U),                    /*!< VDD 3.3-3.4 */
+    kSD_OcrVdd35_36Flag            = (1U << 23U),                    /*!< VDD 3.4-3.5 */
 };
 
 /*! @brief SD card specification version number */
@@ -268,59 +268,59 @@ typedef enum _sd_data_bus_width
 typedef enum _sd_switch_mode
 {
     kSD_SwitchCheck = 0U, /*!< SD switch mode 0: check function */
-    kSD_SwitchSet = 1U,   /*!< SD switch mode 1: set function */
+    kSD_SwitchSet   = 1U, /*!< SD switch mode 1: set function */
 } sd_switch_mode_t;
 
 /*! @brief SD card CSD register flags */
 enum _sd_csd_flag
 {
-    kSD_CsdReadBlockPartialFlag = (1U << 0U),         /*!< Partial blocks for read allowed [79:79] */
-    kSD_CsdWriteBlockMisalignFlag = (1U << 1U),       /*!< Write block misalignment [78:78] */
-    kSD_CsdReadBlockMisalignFlag = (1U << 2U),        /*!< Read block misalignment [77:77] */
-    kSD_CsdDsrImplementedFlag = (1U << 3U),           /*!< DSR implemented [76:76] */
-    kSD_CsdEraseBlockEnabledFlag = (1U << 4U),        /*!< Erase single block enabled [46:46] */
-    kSD_CsdWriteProtectGroupEnabledFlag = (1U << 5U), /*!< Write protect group enabled [31:31] */
-    kSD_CsdWriteBlockPartialFlag = (1U << 6U),        /*!< Partial blocks for write allowed [21:21] */
-    kSD_CsdFileFormatGroupFlag = (1U << 7U),          /*!< File format group [15:15] */
-    kSD_CsdCopyFlag = (1U << 8U),                     /*!< Copy flag [14:14] */
-    kSD_CsdPermanentWriteProtectFlag = (1U << 9U),    /*!< Permanent write protection [13:13] */
-    kSD_CsdTemporaryWriteProtectFlag = (1U << 10U),   /*!< Temporary write protection [12:12] */
+    kSD_CsdReadBlockPartialFlag         = (1U << 0U),  /*!< Partial blocks for read allowed [79:79] */
+    kSD_CsdWriteBlockMisalignFlag       = (1U << 1U),  /*!< Write block misalignment [78:78] */
+    kSD_CsdReadBlockMisalignFlag        = (1U << 2U),  /*!< Read block misalignment [77:77] */
+    kSD_CsdDsrImplementedFlag           = (1U << 3U),  /*!< DSR implemented [76:76] */
+    kSD_CsdEraseBlockEnabledFlag        = (1U << 4U),  /*!< Erase single block enabled [46:46] */
+    kSD_CsdWriteProtectGroupEnabledFlag = (1U << 5U),  /*!< Write protect group enabled [31:31] */
+    kSD_CsdWriteBlockPartialFlag        = (1U << 6U),  /*!< Partial blocks for write allowed [21:21] */
+    kSD_CsdFileFormatGroupFlag          = (1U << 7U),  /*!< File format group [15:15] */
+    kSD_CsdCopyFlag                     = (1U << 8U),  /*!< Copy flag [14:14] */
+    kSD_CsdPermanentWriteProtectFlag    = (1U << 9U),  /*!< Permanent write protection [13:13] */
+    kSD_CsdTemporaryWriteProtectFlag    = (1U << 10U), /*!< Temporary write protection [12:12] */
 };
 
 /*! @brief SD card SCR register flags */
 enum _sd_scr_flag
 {
     kSD_ScrDataStatusAfterErase = (1U << 0U), /*!< Data status after erases [55:55] */
-    kSD_ScrSdSpecification3 = (1U << 1U),     /*!< Specification version 3.00 or higher [47:47]*/
+    kSD_ScrSdSpecification3     = (1U << 1U), /*!< Specification version 3.00 or higher [47:47]*/
 };
 
 /*! @brief SD timing function number */
 enum _sd_timing_function
 {
-    kSD_FunctionSDR12Deafult = 0U,   /*!< SDR12 mode & default*/
+    kSD_FunctionSDR12Deafult   = 0U, /*!< SDR12 mode & default*/
     kSD_FunctionSDR25HighSpeed = 1U, /*!< SDR25 & high speed*/
-    kSD_FunctionSDR50 = 2U,          /*!< SDR50 mode*/
-    kSD_FunctionSDR104 = 3U,         /*!< SDR104 mode*/
-    kSD_FunctionDDR50 = 4U,          /*!< DDR50 mode*/
+    kSD_FunctionSDR50          = 2U, /*!< SDR50 mode*/
+    kSD_FunctionSDR104         = 3U, /*!< SDR104 mode*/
+    kSD_FunctionDDR50          = 4U, /*!< DDR50 mode*/
 };
 
 /*! @brief SD group number */
 enum _sd_group_num
 {
-    kSD_GroupTimingMode = 0U,     /*!< acess mode group*/
-    kSD_GroupCommandSystem = 1U,  /*!< command system group*/
+    kSD_GroupTimingMode     = 0U, /*!< acess mode group*/
+    kSD_GroupCommandSystem  = 1U, /*!< command system group*/
     kSD_GroupDriverStrength = 2U, /*!< driver strength group*/
-    kSD_GroupCurrentLimit = 3U,   /*!< current limit group*/
+    kSD_GroupCurrentLimit   = 3U, /*!< current limit group*/
 };
 
 /*! @brief SD card timing mode flags */
 typedef enum _sd_timing_mode
 {
-    kSD_TimingSDR12DefaultMode = 0U,   /*!< Identification mode & SDR12 */
+    kSD_TimingSDR12DefaultMode   = 0U, /*!< Identification mode & SDR12 */
     kSD_TimingSDR25HighSpeedMode = 1U, /*!< High speed mode & SDR25 */
-    kSD_TimingSDR50Mode = 2U,          /*!< SDR50 mode*/
-    kSD_TimingSDR104Mode = 3U,         /*!< SDR104 mode */
-    kSD_TimingDDR50Mode = 4U,          /*!< DDR50 mode */
+    kSD_TimingSDR50Mode          = 2U, /*!< SDR50 mode*/
+    kSD_TimingSDR104Mode         = 3U, /*!< SDR104 mode */
+    kSD_TimingDDR50Mode          = 4U, /*!< DDR50 mode */
 } sd_timing_mode_t;
 
 /*! @brief SD card driver strength */
@@ -344,63 +344,63 @@ typedef enum _sd_max_current
 /*! @brief SD/MMC card common commands */
 typedef enum _sdmmc_command
 {
-    kSDMMC_GoIdleState = 0U,         /*!< Go Idle State */
-    kSDMMC_AllSendCid = 2U,          /*!< All Send CID */
-    kSDMMC_SetDsr = 4U,              /*!< Set DSR */
-    kSDMMC_SelectCard = 7U,          /*!< Select Card */
-    kSDMMC_SendCsd = 9U,             /*!< Send CSD */
-    kSDMMC_SendCid = 10U,            /*!< Send CID */
-    kSDMMC_StopTransmission = 12U,   /*!< Stop Transmission */
-    kSDMMC_SendStatus = 13U,         /*!< Send Status */
-    kSDMMC_GoInactiveState = 15U,    /*!< Go Inactive State */
-    kSDMMC_SetBlockLength = 16U,     /*!< Set Block Length */
-    kSDMMC_ReadSingleBlock = 17U,    /*!< Read Single Block */
-    kSDMMC_ReadMultipleBlock = 18U,  /*!< Read Multiple Block */
-    kSDMMC_SetBlockCount = 23U,      /*!< Set Block Count */
-    kSDMMC_WriteSingleBlock = 24U,   /*!< Write Single Block */
+    kSDMMC_GoIdleState        = 0U,  /*!< Go Idle State */
+    kSDMMC_AllSendCid         = 2U,  /*!< All Send CID */
+    kSDMMC_SetDsr             = 4U,  /*!< Set DSR */
+    kSDMMC_SelectCard         = 7U,  /*!< Select Card */
+    kSDMMC_SendCsd            = 9U,  /*!< Send CSD */
+    kSDMMC_SendCid            = 10U, /*!< Send CID */
+    kSDMMC_StopTransmission   = 12U, /*!< Stop Transmission */
+    kSDMMC_SendStatus         = 13U, /*!< Send Status */
+    kSDMMC_GoInactiveState    = 15U, /*!< Go Inactive State */
+    kSDMMC_SetBlockLength     = 16U, /*!< Set Block Length */
+    kSDMMC_ReadSingleBlock    = 17U, /*!< Read Single Block */
+    kSDMMC_ReadMultipleBlock  = 18U, /*!< Read Multiple Block */
+    kSDMMC_SetBlockCount      = 23U, /*!< Set Block Count */
+    kSDMMC_WriteSingleBlock   = 24U, /*!< Write Single Block */
     kSDMMC_WriteMultipleBlock = 25U, /*!< Write Multiple Block */
-    kSDMMC_ProgramCsd = 27U,         /*!< Program CSD */
-    kSDMMC_SetWriteProtect = 28U,    /*!< Set Write Protect */
-    kSDMMC_ClearWriteProtect = 29U,  /*!< Clear Write Protect */
-    kSDMMC_SendWriteProtect = 30U,   /*!< Send Write Protect */
-    kSDMMC_Erase = 38U,              /*!< Erase */
-    kSDMMC_LockUnlock = 42U,         /*!< Lock Unlock */
+    kSDMMC_ProgramCsd         = 27U, /*!< Program CSD */
+    kSDMMC_SetWriteProtect    = 28U, /*!< Set Write Protect */
+    kSDMMC_ClearWriteProtect  = 29U, /*!< Clear Write Protect */
+    kSDMMC_SendWriteProtect   = 30U, /*!< Send Write Protect */
+    kSDMMC_Erase              = 38U, /*!< Erase */
+    kSDMMC_LockUnlock         = 42U, /*!< Lock Unlock */
     kSDMMC_ApplicationCommand = 55U, /*!< Send Application Command */
-    kSDMMC_GeneralCommand = 56U,     /*!< General Purpose Command */
-    kSDMMC_ReadOcr = 58U,            /*!< Read OCR */
+    kSDMMC_GeneralCommand     = 56U, /*!< General Purpose Command */
+    kSDMMC_ReadOcr            = 58U, /*!< Read OCR */
 } sdmmc_command_t;
 
 /*! @brief sdio card cccr register addr */
 enum _sdio_cccr_reg
 {
-    kSDIO_RegCCCRSdioVer = 0x00U,      /*!< CCCR & SDIO version*/
-    kSDIO_RegSDVersion = 0x01U,        /*!< SD version */
-    kSDIO_RegIOEnable = 0x02U,         /*!< io enable register */
-    kSDIO_RegIOReady = 0x03U,          /*!< io ready register */
-    kSDIO_RegIOIntEnable = 0x04U,      /*!< io interrupt enable register */
-    kSDIO_RegIOIntPending = 0x05U,     /*!< io interrupt pending register */
-    kSDIO_RegIOAbort = 0x06U,          /*!< io abort register */
-    kSDIO_RegBusInterface = 0x07U,     /*!< bus interface register */
-    kSDIO_RegCardCapability = 0x08U,   /*!< card capability register */
+    kSDIO_RegCCCRSdioVer      = 0x00U, /*!< CCCR & SDIO version*/
+    kSDIO_RegSDVersion        = 0x01U, /*!< SD version */
+    kSDIO_RegIOEnable         = 0x02U, /*!< io enable register */
+    kSDIO_RegIOReady          = 0x03U, /*!< io ready register */
+    kSDIO_RegIOIntEnable      = 0x04U, /*!< io interrupt enable register */
+    kSDIO_RegIOIntPending     = 0x05U, /*!< io interrupt pending register */
+    kSDIO_RegIOAbort          = 0x06U, /*!< io abort register */
+    kSDIO_RegBusInterface     = 0x07U, /*!< bus interface register */
+    kSDIO_RegCardCapability   = 0x08U, /*!< card capability register */
     kSDIO_RegCommonCISPointer = 0x09U, /*!< common CIS pointer register */
-    kSDIO_RegBusSuspend = 0x0C,        /*!< bus suspend register */
-    kSDIO_RegFunctionSelect = 0x0DU,   /*!< function select register */
-    kSDIO_RegExecutionFlag = 0x0EU,    /*!< execution flag register */
-    kSDIO_RegReadyFlag = 0x0FU,        /*!< ready flag register */
-    kSDIO_RegFN0BlockSizeLow = 0x10U,  /*!< FN0 block size register */
+    kSDIO_RegBusSuspend       = 0x0C,  /*!< bus suspend register */
+    kSDIO_RegFunctionSelect   = 0x0DU, /*!< function select register */
+    kSDIO_RegExecutionFlag    = 0x0EU, /*!< execution flag register */
+    kSDIO_RegReadyFlag        = 0x0FU, /*!< ready flag register */
+    kSDIO_RegFN0BlockSizeLow  = 0x10U, /*!< FN0 block size register */
     kSDIO_RegFN0BlockSizeHigh = 0x11U, /*!< FN0 block size register */
-    kSDIO_RegPowerControl = 0x12U,     /*!< power control register */
-    kSDIO_RegHighSpeed = 0x13U,        /*!< high speed register */
+    kSDIO_RegPowerControl     = 0x12U, /*!< power control register */
+    kSDIO_RegHighSpeed        = 0x13U, /*!< high speed register */
 };
 
 /*! @brief sdio card individual commands */
 typedef enum _sdio_command
 {
-    kSDIO_SendRelativeAddress = 3U,    /*!< send relative address */
-    kSDIO_SendOperationCondition = 5U, /*!< send operation condition */
-    kSDIO_SendInterfaceCondition = 8U, /*!< send interface condition */
-    kSDIO_RWIODirect = 52U,            /*!< read/write IO direct command */
-    kSDIO_RWIOExtended = 53U,          /*!< read/write IO extended command */
+    kSDIO_SendRelativeAddress    = 3U,  /*!< send relative address */
+    kSDIO_SendOperationCondition = 5U,  /*!< send operation condition */
+    kSDIO_SendInterfaceCondition = 8U,  /*!< send interface condition */
+    kSDIO_RWIODirect             = 52U, /*!< read/write IO direct command */
+    kSDIO_RWIOExtended           = 53U, /*!< read/write IO extended command */
 } sdio_command_t;
 
 /*! @brief sdio card individual commands */
@@ -417,41 +417,41 @@ typedef enum _sdio_func_num
     kSDIO_FunctionMemory, /*!< for combo card*/
 } sdio_func_num_t;
 
-#define SDIO_CMD_ARGUMENT_RW_POS (31U)             /*!< read/write flag position */
-#define SDIO_CMD_ARGUMENT_FUNC_NUM_POS (28U)       /*!< function number position */
-#define SDIO_DIRECT_CMD_ARGUMENT_RAW_POS (27U)     /*!< direct raw flag position */
-#define SDIO_CMD_ARGUMENT_REG_ADDR_POS (9U)        /*!< direct reg addr position */
-#define SDIO_CMD_ARGUMENT_REG_ADDR_MASK (0x1FFFFU) /*!< direct reg addr mask */
-#define SDIO_DIRECT_CMD_DATA_MASK (0xFFU)          /*!< data mask */
+#define SDIO_CMD_ARGUMENT_RW_POS         (31U)      /*!< read/write flag position */
+#define SDIO_CMD_ARGUMENT_FUNC_NUM_POS   (28U)      /*!< function number position */
+#define SDIO_DIRECT_CMD_ARGUMENT_RAW_POS (27U)      /*!< direct raw flag position */
+#define SDIO_CMD_ARGUMENT_REG_ADDR_POS   (9U)       /*!< direct reg addr position */
+#define SDIO_CMD_ARGUMENT_REG_ADDR_MASK  (0x1FFFFU) /*!< direct reg addr mask */
+#define SDIO_DIRECT_CMD_DATA_MASK        (0xFFU)    /*!< data mask */
 
-#define SDIO_EXTEND_CMD_ARGUMENT_BLOCK_MODE_POS (27U) /*!< extended command argument block mode bit position */
-#define SDIO_EXTEND_CMD_ARGUMENT_OP_CODE_POS (26U)    /*!< extended command argument OP Code bit position */
-#define SDIO_EXTEND_CMD_BLOCK_MODE_MASK (0x08000000U) /*!< block mode mask */
-#define SDIO_EXTEND_CMD_OP_CODE_MASK (0x04000000U)    /*!< op code mask */
-#define SDIO_EXTEND_CMD_COUNT_MASK (0x1FFU)           /*!< byte/block count mask */
-#define SDIO_MAX_BLOCK_SIZE (2048U)                   /*!< max block size */
-#define SDIO_FBR_BASE(x) (x * 0x100U)                 /*!< function basic register */
-#define SDIO_TPL_CODE_END (0xFFU)                     /*!< tuple end */
-#define SDIO_TPL_CODE_MANIFID (0x20U)                 /*!< manufacturer ID */
-#define SDIO_TPL_CODE_FUNCID (0x21U)                  /*!< function ID */
-#define SDIO_TPL_CODE_FUNCE (0x22U)                   /*!< function extension tuple*/
+#define SDIO_EXTEND_CMD_ARGUMENT_BLOCK_MODE_POS (27U)         /*!< extended command argument block mode bit position */
+#define SDIO_EXTEND_CMD_ARGUMENT_OP_CODE_POS    (26U)         /*!< extended command argument OP Code bit position */
+#define SDIO_EXTEND_CMD_BLOCK_MODE_MASK         (0x08000000U) /*!< block mode mask */
+#define SDIO_EXTEND_CMD_OP_CODE_MASK            (0x04000000U) /*!< op code mask */
+#define SDIO_EXTEND_CMD_COUNT_MASK              (0x1FFU)      /*!< byte/block count mask */
+#define SDIO_MAX_BLOCK_SIZE                     (2048U)       /*!< max block size */
+#define SDIO_FBR_BASE(x)                        (x * 0x100U)  /*!< function basic register */
+#define SDIO_TPL_CODE_END                       (0xFFU)       /*!< tuple end */
+#define SDIO_TPL_CODE_MANIFID                   (0x20U)       /*!< manufacturer ID */
+#define SDIO_TPL_CODE_FUNCID                    (0x21U)       /*!< function ID */
+#define SDIO_TPL_CODE_FUNCE                     (0x22U)       /*!< function extension tuple*/
 /*! @brief sdio command response flag */
 enum _sdio_status_flag
 {
-    kSDIO_StatusCmdCRCError = 0x8000U,      /*!< the CRC check of the previous cmd fail*/
-    kSDIO_StatusIllegalCmd = 0x4000U,       /*!< cmd illegal for the card state */
-    kSDIO_StatusR6Error = 0x2000U,          /*!< special for R6 error status */
-    kSDIO_StatusError = 0x0800U,            /*!< A general or an unknown error occurred */
+    kSDIO_StatusCmdCRCError      = 0x8000U, /*!< the CRC check of the previous cmd fail*/
+    kSDIO_StatusIllegalCmd       = 0x4000U, /*!< cmd illegal for the card state */
+    kSDIO_StatusR6Error          = 0x2000U, /*!< special for R6 error status */
+    kSDIO_StatusError            = 0x0800U, /*!< A general or an unknown error occurred */
     kSDIO_StatusFunctionNumError = 0x0200U, /*!< invail function error */
-    kSDIO_StatusOutofRange = 0x0100U,       /*!<  cmd argument was out of the allowed range*/
+    kSDIO_StatusOutofRange       = 0x0100U, /*!<  cmd argument was out of the allowed range*/
 };
 
 /*! @brief sdio operation condition flag */
 enum _sdio_ocr_flag
 {
     kSDIO_OcrPowerUpBusyFlag = (1U << 31U), /*!< Power up busy status */
-    kSDIO_OcrIONumber = (7U << 28U),        /*!< number of IO function */
-    kSDIO_OcrMemPresent = (1U << 27U),      /*!< memory present flag */
+    kSDIO_OcrIONumber        = (7U << 28U), /*!< number of IO function */
+    kSDIO_OcrMemPresent      = (1U << 27U), /*!< memory present flag */
 
     kSDIO_OcrVdd20_21Flag = (1U << 8U),  /*!< VDD 2.0-2.1 */
     kSDIO_OcrVdd21_22Flag = (1U << 9U),  /*!< VDD 2.1-2.2 */
@@ -475,22 +475,22 @@ enum _sdio_ocr_flag
 /*! @brief sdio capability flag */
 enum _sdio_capability_flag
 {
-    kSDIO_CCCRSupportDirectCmdDuringDataTrans = (1U << 0U), /*!< support direct cmd during data transfer */
-    kSDIO_CCCRSupportMultiBlock = (1U << 1U),               /*!< support multi block mode */
-    kSDIO_CCCRSupportReadWait = (1U << 2U),                 /*!< support read wait */
-    kSDIO_CCCRSupportSuspendResume = (1U << 3U),            /*!< support suspend resume */
-    kSDIO_CCCRSupportIntDuring4BitDataTrans = (1U << 4U),   /*!< support interrupt during 4-bit data transfer */
-    kSDIO_CCCRSupportLowSpeed1Bit = (1U << 6U),             /*!< support low speed 1bit mode */
-    kSDIO_CCCRSupportLowSpeed4Bit = (1U << 7U),             /*!< support low speed 4bit mode */
-    kSDIO_CCCRSupportMasterPowerControl = (1U << 8U),       /*!< support master power control */
-    kSDIO_CCCRSupportHighSpeed = (1U << 9U),                /*!< support high speed */
-    kSDIO_CCCRSupportContinuousSPIInt = (1U << 10U),        /*!< support continuous SPI interrupt */
+    kSDIO_CCCRSupportDirectCmdDuringDataTrans = (1U << 0U),  /*!< support direct cmd during data transfer */
+    kSDIO_CCCRSupportMultiBlock               = (1U << 1U),  /*!< support multi block mode */
+    kSDIO_CCCRSupportReadWait                 = (1U << 2U),  /*!< support read wait */
+    kSDIO_CCCRSupportSuspendResume            = (1U << 3U),  /*!< support suspend resume */
+    kSDIO_CCCRSupportIntDuring4BitDataTrans   = (1U << 4U),  /*!< support interrupt during 4-bit data transfer */
+    kSDIO_CCCRSupportLowSpeed1Bit             = (1U << 6U),  /*!< support low speed 1bit mode */
+    kSDIO_CCCRSupportLowSpeed4Bit             = (1U << 7U),  /*!< support low speed 4bit mode */
+    kSDIO_CCCRSupportMasterPowerControl       = (1U << 8U),  /*!< support master power control */
+    kSDIO_CCCRSupportHighSpeed                = (1U << 9U),  /*!< support high speed */
+    kSDIO_CCCRSupportContinuousSPIInt         = (1U << 10U), /*!< support continuous SPI interrupt */
 };
 
 /*! @brief sdio fbr flag */
 enum _sdio_fbr_flag
 {
-    kSDIO_FBRSupportCSA = (1U << 0U),            /*!< function support CSA */
+    kSDIO_FBRSupportCSA            = (1U << 0U), /*!< function support CSA */
     kSDIO_FBRSupportPowerSelection = (1U << 1U), /*!< function support power selection */
 };
 
@@ -504,21 +504,21 @@ typedef enum _sdio_bus_width
 /*! @brief MMC card individual commands */
 typedef enum _mmc_command
 {
-    kMMC_SendOperationCondition = 1U, /*!< Send Operation Condition */
-    kMMC_SetRelativeAddress = 3U,     /*!< Set Relative Address */
-    kMMC_SleepAwake = 5U,             /*!< Sleep Awake */
-    kMMC_Switch = 6U,                 /*!< Switch */
-    kMMC_SendExtendedCsd = 8U,        /*!< Send EXT_CSD */
-    kMMC_ReadDataUntilStop = 11U,     /*!< Read Data Until Stop */
-    kMMC_BusTestRead = 14U,           /*!< Test Read */
-    kMMC_SendingBusTest = 19U,        /*!< test bus width cmd*/
-    kMMC_WriteDataUntilStop = 20U,    /*!< Write Data Until Stop */
-    kMMC_SendTuningBlock = 21U,       /*!< MMC sending tuning block */
-    kMMC_ProgramCid = 26U,            /*!< Program CID */
-    kMMC_EraseGroupStart = 35U,       /*!< Erase Group Start */
-    kMMC_EraseGroupEnd = 36U,         /*!< Erase Group End */
-    kMMC_FastInputOutput = 39U,       /*!< Fast IO */
-    kMMC_GoInterruptState = 40U,      /*!< Go interrupt State */
+    kMMC_SendOperationCondition = 1U,  /*!< Send Operation Condition */
+    kMMC_SetRelativeAddress     = 3U,  /*!< Set Relative Address */
+    kMMC_SleepAwake             = 5U,  /*!< Sleep Awake */
+    kMMC_Switch                 = 6U,  /*!< Switch */
+    kMMC_SendExtendedCsd        = 8U,  /*!< Send EXT_CSD */
+    kMMC_ReadDataUntilStop      = 11U, /*!< Read Data Until Stop */
+    kMMC_BusTestRead            = 14U, /*!< Test Read */
+    kMMC_SendingBusTest         = 19U, /*!< test bus width cmd*/
+    kMMC_WriteDataUntilStop     = 20U, /*!< Write Data Until Stop */
+    kMMC_SendTuningBlock        = 21U, /*!< MMC sending tuning block */
+    kMMC_ProgramCid             = 26U, /*!< Program CID */
+    kMMC_EraseGroupStart        = 35U, /*!< Erase Group Start */
+    kMMC_EraseGroupEnd          = 36U, /*!< Erase Group End */
+    kMMC_FastInputOutput        = 39U, /*!< Fast IO */
+    kMMC_GoInterruptState       = 40U, /*!< Go interrupt State */
 } mmc_command_t;
 
 /*! @brief MMC card classified as voltage range */
@@ -559,25 +559,25 @@ typedef enum _mmc_classified_density
 /*! @brief MMC card access mode(Access mode in OCR). */
 typedef enum _mmc_access_mode
 {
-    kMMC_AccessModeByte = 0U,   /*!< The card should be accessed as byte */
+    kMMC_AccessModeByte   = 0U, /*!< The card should be accessed as byte */
     kMMC_AccessModeSector = 2U, /*!< The card should be accessed as sector */
 } mmc_access_mode_t;
 
 /*! @brief MMC card voltage window(VDD voltage window in OCR). */
 typedef enum _mmc_voltage_window
 {
-    kMMC_VoltageWindowNone = 0U,          /*!< voltage window is not define by user*/
-    kMMC_VoltageWindow120 = 0x01U,        /*!< Voltage window is 1.20V */
-    kMMC_VoltageWindow170to195 = 0x02U,   /*!< Voltage window is 1.70V to 1.95V */
+    kMMC_VoltageWindowNone      = 0U,     /*!< voltage window is not define by user*/
+    kMMC_VoltageWindow120       = 0x01U,  /*!< Voltage window is 1.20V */
+    kMMC_VoltageWindow170to195  = 0x02U,  /*!< Voltage window is 1.70V to 1.95V */
     kMMC_VoltageWindows270to360 = 0x1FFU, /*!< Voltage window is 2.70V to 3.60V */
 } mmc_voltage_window_t;
 
 /*! @brief CSD structure version(CSD_STRUCTURE in CSD). */
 typedef enum _mmc_csd_structure_version
 {
-    kMMC_CsdStrucureVersion10 = 0U,       /*!< CSD version No. 1.0 */
-    kMMC_CsdStrucureVersion11 = 1U,       /*!< CSD version No. 1.1 */
-    kMMC_CsdStrucureVersion12 = 2U,       /*!< CSD version No. 1.2 */
+    kMMC_CsdStrucureVersion10       = 0U, /*!< CSD version No. 1.0 */
+    kMMC_CsdStrucureVersion11       = 1U, /*!< CSD version No. 1.1 */
+    kMMC_CsdStrucureVersion12       = 2U, /*!< CSD version No. 1.2 */
     kMMC_CsdStrucureVersionInExtcsd = 3U, /*!< Version coded in Extended CSD */
 } mmc_csd_structure_version_t;
 
@@ -601,10 +601,10 @@ typedef enum _mmc_specification_version
 #define MMC_TRANSFER_SPEED_MULTIPLIER_MASK (0x78U)
 
 /*! @brief Read the value of FREQUENCY UNIT in TRANSFER SPEED. */
-#define READ_MMC_TRANSFER_SPEED_FREQUENCY_UNIT(CSD) \
+#define READ_MMC_TRANSFER_SPEED_FREQUENCY_UNIT(CSD)                                                                    \
     (((CSD.transferSpeed) & MMC_TRANSFER_SPEED_FREQUENCY_UNIT_MASK) >> MMC_TRANSFER_SPEED_FREQUENCY_UNIT_SHIFT)
 /*! @brief Read the value of MULTIPLER filed in TRANSFER SPEED. */
-#define READ_MMC_TRANSFER_SPEED_MULTIPLIER(CSD) \
+#define READ_MMC_TRANSFER_SPEED_MULTIPLIER(CSD)                                                                        \
     (((CSD.transferSpeed) & MMC_TRANSFER_SPEED_MULTIPLIER_MASK) >> MMC_TRANSFER_SPEED_MULTIPLIER_SHIFT)
 
 /*! @brief MMC card Extended CSD fix version(EXT_CSD_REV in Extended CSD) */
@@ -624,17 +624,17 @@ enum _mmc_extended_csd_revision
 typedef enum _mmc_command_set
 {
     kMMC_CommandSetStandard = 0U, /*!< Standard MMC */
-    kMMC_CommandSet1 = 1U,        /*!< Command set 1 */
-    kMMC_CommandSet2 = 2U,        /*!< Command set 2 */
-    kMMC_CommandSet3 = 3U,        /*!< Command set 3 */
-    kMMC_CommandSet4 = 4U,        /*!< Command set 4 */
+    kMMC_CommandSet1        = 1U, /*!< Command set 1 */
+    kMMC_CommandSet2        = 2U, /*!< Command set 2 */
+    kMMC_CommandSet3        = 3U, /*!< Command set 3 */
+    kMMC_CommandSet4        = 4U, /*!< Command set 4 */
 } mmc_command_set_t;
 
 /*! @brief boot support(BOOT_INFO in Extended CSD) */
 enum _mmc_support_boot_mode
 {
     kMMC_SupportAlternateBoot = 1U, /*!< support alternative boot mode*/
-    kMMC_SupportDDRBoot = 2U,       /*!< support DDR boot mode*/
+    kMMC_SupportDDRBoot       = 2U, /*!< support DDR boot mode*/
     kMMC_SupportHighSpeedBoot = 4U, /*!< support high speed boot mode*/
 };
 /*! @brief The power class value bit mask when bus in 4 bit mode */
@@ -646,9 +646,9 @@ enum _mmc_support_boot_mode
 typedef enum _mmc_high_speed_timing
 {
     kMMC_HighSpeedTimingNone = 0U, /*!< MMC card using none high-speed timing */
-    kMMC_HighSpeedTiming = 1U,     /*!< MMC card using high-speed timing */
-    kMMC_HighSpeed200Timing = 2U,  /*!< MMC card high speed 200 timing*/
-    kMMC_HighSpeed400Timing = 3U,  /*!< MMC card high speed 400 timing*/
+    kMMC_HighSpeedTiming     = 1U, /*!< MMC card using high-speed timing */
+    kMMC_HighSpeed200Timing  = 2U, /*!< MMC card high speed 200 timing*/
+    kMMC_HighSpeed400Timing  = 3U, /*!< MMC card high speed 400 timing*/
 } mmc_high_speed_timing_t;
 
 /*! @brief The number of data bus width type */
@@ -656,9 +656,9 @@ typedef enum _mmc_high_speed_timing
 /*! @brief MMC card data bus width(BUS_WIDTH in Extended CSD) */
 typedef enum _mmc_data_bus_width
 {
-    kMMC_DataBusWidth1bit = 0U,    /*!< MMC data bus width is 1 bit */
-    kMMC_DataBusWidth4bit = 1U,    /*!< MMC data bus width is 4 bits */
-    kMMC_DataBusWidth8bit = 2U,    /*!< MMC data bus width is 8 bits */
+    kMMC_DataBusWidth1bit    = 0U, /*!< MMC data bus width is 1 bit */
+    kMMC_DataBusWidth4bit    = 1U, /*!< MMC data bus width is 4 bits */
+    kMMC_DataBusWidth8bit    = 2U, /*!< MMC data bus width is 8 bits */
     kMMC_DataBusWidth4bitDDR = 5U, /*!< MMC data bus width is 4 bits ddr */
     kMMC_DataBusWidth8bitDDR = 6U, /*!< MMC data bus width is 8 bits ddr */
 } mmc_data_bus_width_t;
@@ -666,10 +666,10 @@ typedef enum _mmc_data_bus_width
 /*! @brief MMC card boot partition enabled(BOOT_PARTITION_ENABLE in Extended CSD) */
 typedef enum _mmc_boot_partition_enable
 {
-    kMMC_BootPartitionEnableNot = 0U,        /*!< Device not boot enabled (default) */
+    kMMC_BootPartitionEnableNot        = 0U, /*!< Device not boot enabled (default) */
     kMMC_BootPartitionEnablePartition1 = 1U, /*!< Boot partition 1 enabled for boot */
     kMMC_BootPartitionEnablePartition2 = 2U, /*!< Boot partition 2 enabled for boot */
-    kMMC_BootPartitionEnableUserAera = 7U,   /*!< User area enabled for boot */
+    kMMC_BootPartitionEnableUserAera   = 7U, /*!< User area enabled for boot */
 } mmc_boot_partition_enable_t;
 
 /*! @brief boot mode configuration
@@ -677,9 +677,9 @@ typedef enum _mmc_boot_partition_enable
  */
 typedef enum _mmc_boot_timing_mode
 {
-    kMMC_BootModeSDRWithDefaultTiming = 0U << 3U,   /*!< boot mode single data rate with backward compatiable timings */
+    kMMC_BootModeSDRWithDefaultTiming   = 0U << 3U, /*!< boot mode single data rate with backward compatiable timings */
     kMMC_BootModeSDRWithHighSpeedTiming = 1U << 3U, /*!< boot mode single data rate with high speed timing */
-    kMMC_BootModeDDRTiming = 2U << 3U,              /*!< boot mode dual date rate */
+    kMMC_BootModeDDRTiming              = 2U << 3U, /*!< boot mode dual date rate */
 } mmc_boot_timing_mode_t;
 
 /*! @brief MMC card boot partition write protect configurations
@@ -713,18 +713,18 @@ typedef enum _mmc_boot_partition_wp
 /*! @brief MMC card boot partition write protect status */
 enum _mmc_boot_partition_wp_status
 {
-    kMMC_BootPartitionNotProtected = 0U,  /*!< boot partition not protected */
-    kMMC_BootPartitionPwrProtected = 1U,  /*!< boot partition is power on period write protected */
+    kMMC_BootPartitionNotProtected  = 0U, /*!< boot partition not protected */
+    kMMC_BootPartitionPwrProtected  = 1U, /*!< boot partition is power on period write protected */
     kMMC_BootPartitionPermProtected = 2U, /*!< boot partition is permanently protected */
 };
 
 /*! @brief MMC card partition to be accessed(BOOT_PARTITION_ACCESS in Extended CSD) */
 typedef enum _mmc_access_partition
 {
-    kMMC_AccessPartitionUserAera = 0U,        /*!< No access to boot partition (default), normal partition */
-    kMMC_AccessPartitionBoot1 = 1U,           /*!< Read/Write boot partition 1 */
-    kMMC_AccessPartitionBoot2 = 2U,           /*!< Read/Write boot partition 2*/
-    kMMC_AccessRPMB = 3U,                     /*!< Replay protected mem block */
+    kMMC_AccessPartitionUserAera        = 0U, /*!< No access to boot partition (default), normal partition */
+    kMMC_AccessPartitionBoot1           = 1U, /*!< Read/Write boot partition 1 */
+    kMMC_AccessPartitionBoot2           = 2U, /*!< Read/Write boot partition 2*/
+    kMMC_AccessRPMB                     = 3U, /*!< Replay protected mem block */
     kMMC_AccessGeneralPurposePartition1 = 4U, /*!< access to general purpose partition 1 */
     kMMC_AccessGeneralPurposePartition2 = 5U, /*!< access to general purpose partition 2 */
     kMMC_AccessGeneralPurposePartition3 = 6U, /*!< access to general purpose partition 3 */
@@ -757,45 +757,45 @@ typedef enum _mmc_access_partition
 /*! @brief MMC card CSD register flags */
 enum _mmc_csd_flag
 {
-    kMMC_CsdReadBlockPartialFlag = (1U << 0U),         /*!< Partial blocks for read allowed */
-    kMMC_CsdWriteBlockMisalignFlag = (1U << 1U),       /*!< Write block misalignment */
-    kMMC_CsdReadBlockMisalignFlag = (1U << 2U),        /*!< Read block misalignment */
-    kMMC_CsdDsrImplementedFlag = (1U << 3U),           /*!< DSR implemented */
-    kMMC_CsdWriteProtectGroupEnabledFlag = (1U << 4U), /*!< Write protect group enabled */
-    kMMC_CsdWriteBlockPartialFlag = (1U << 5U),        /*!< Partial blocks for write allowed */
-    kMMC_ContentProtectApplicationFlag = (1U << 6U),   /*!< Content protect application */
-    kMMC_CsdFileFormatGroupFlag = (1U << 7U),          /*!< File format group */
-    kMMC_CsdCopyFlag = (1U << 8U),                     /*!< Copy flag */
-    kMMC_CsdPermanentWriteProtectFlag = (1U << 9U),    /*!< Permanent write protection */
-    kMMC_CsdTemporaryWriteProtectFlag = (1U << 10U),   /*!< Temporary write protection */
+    kMMC_CsdReadBlockPartialFlag         = (1U << 0U),  /*!< Partial blocks for read allowed */
+    kMMC_CsdWriteBlockMisalignFlag       = (1U << 1U),  /*!< Write block misalignment */
+    kMMC_CsdReadBlockMisalignFlag        = (1U << 2U),  /*!< Read block misalignment */
+    kMMC_CsdDsrImplementedFlag           = (1U << 3U),  /*!< DSR implemented */
+    kMMC_CsdWriteProtectGroupEnabledFlag = (1U << 4U),  /*!< Write protect group enabled */
+    kMMC_CsdWriteBlockPartialFlag        = (1U << 5U),  /*!< Partial blocks for write allowed */
+    kMMC_ContentProtectApplicationFlag   = (1U << 6U),  /*!< Content protect application */
+    kMMC_CsdFileFormatGroupFlag          = (1U << 7U),  /*!< File format group */
+    kMMC_CsdCopyFlag                     = (1U << 8U),  /*!< Copy flag */
+    kMMC_CsdPermanentWriteProtectFlag    = (1U << 9U),  /*!< Permanent write protection */
+    kMMC_CsdTemporaryWriteProtectFlag    = (1U << 10U), /*!< Temporary write protection */
 };
 
 /*! @brief Extended CSD register access mode(Access mode in CMD6). */
 typedef enum _mmc_extended_csd_access_mode
 {
     kMMC_ExtendedCsdAccessModeCommandSet = 0U, /*!< Command set related setting */
-    kMMC_ExtendedCsdAccessModeSetBits = 1U,    /*!< Set bits in specific byte in Extended CSD  */
-    kMMC_ExtendedCsdAccessModeClearBits = 2U,  /*!< Clear bits in specific byte in Extended CSD */
-    kMMC_ExtendedCsdAccessModeWriteBits = 3U,  /*!< Write a value to specific byte in Extended CSD */
+    kMMC_ExtendedCsdAccessModeSetBits    = 1U, /*!< Set bits in specific byte in Extended CSD  */
+    kMMC_ExtendedCsdAccessModeClearBits  = 2U, /*!< Clear bits in specific byte in Extended CSD */
+    kMMC_ExtendedCsdAccessModeWriteBits  = 3U, /*!< Write a value to specific byte in Extended CSD */
 } mmc_extended_csd_access_mode_t;
 
 /*! @brief EXT CSD byte index */
 typedef enum _mmc_extended_csd_index
 {
-    kMMC_ExtendedCsdIndexBootPartitionWP = 173U,      /*!< Boot partition write protect */
-    kMMC_ExtendedCsdIndexEraseGroupDefinition = 175U, /*!< Erase Group Def */
-    kMMC_ExtendedCsdIndexBootBusConditions = 177U,    /*!< Boot Bus conditions */
-    kMMC_ExtendedCsdIndexBootConfigWP = 178U,         /*!< Boot config write protect */
-    kMMC_ExtendedCsdIndexPartitionConfig = 179U,      /*!< Partition Config, before BOOT_CONFIG */
-    kMMC_ExtendedCsdIndexBusWidth = 183U,             /*!< Bus Width */
-    kMMC_ExtendedCsdIndexHighSpeedTiming = 185U,      /*!< High-speed Timing */
-    kMMC_ExtendedCsdIndexPowerClass = 187U,           /*!< Power Class */
-    kMMC_ExtendedCsdIndexCommandSet = 191U,           /*!< Command Set */
-	kMMC_ExtendedCsdIndexGenPartition1Base = 143U,	  /*!< General Purpose Partition n multiplier base */
-	kMMC_ExtendedCsdIndexGenPartition2Base = 146U,	  /*!< General Purpose Partition n multiplier base */
-	kMMC_ExtendedCsdIndexGenPartition3Base = 149U,	  /*!< General Purpose Partition n multiplier base */
-	kMMC_ExtendedCsdIndexGenPartition4Base = 152U,	  /*!< General Purpose Partition n multiplier base */
-	kMMC_ExtendedCsdIndexPartitioningCompleted = 155U	/*!< Partitioning process complete */
+    kMMC_ExtendedCsdIndexBootPartitionWP       = 173U, /*!< Boot partition write protect */
+    kMMC_ExtendedCsdIndexEraseGroupDefinition  = 175U, /*!< Erase Group Def */
+    kMMC_ExtendedCsdIndexBootBusConditions     = 177U, /*!< Boot Bus conditions */
+    kMMC_ExtendedCsdIndexBootConfigWP          = 178U, /*!< Boot config write protect */
+    kMMC_ExtendedCsdIndexPartitionConfig       = 179U, /*!< Partition Config, before BOOT_CONFIG */
+    kMMC_ExtendedCsdIndexBusWidth              = 183U, /*!< Bus Width */
+    kMMC_ExtendedCsdIndexHighSpeedTiming       = 185U, /*!< High-speed Timing */
+    kMMC_ExtendedCsdIndexPowerClass            = 187U, /*!< Power Class */
+    kMMC_ExtendedCsdIndexCommandSet            = 191U, /*!< Command Set */
+    kMMC_ExtendedCsdIndexGenPartition1Base     = 143U, /*!< General Purpose Partition n multiplier base */
+    kMMC_ExtendedCsdIndexGenPartition2Base     = 146U, /*!< General Purpose Partition n multiplier base */
+    kMMC_ExtendedCsdIndexGenPartition3Base     = 149U, /*!< General Purpose Partition n multiplier base */
+    kMMC_ExtendedCsdIndexGenPartition4Base     = 152U, /*!< General Purpose Partition n multiplier base */
+    kMMC_ExtendedCsdIndexPartitioningCompleted = 155U  /*!< Partitioning process complete */
 } mmc_extended_csd_index_t;
 
 /*! @brief mmc driver strength */
@@ -811,19 +811,19 @@ enum _mmc_driver_strength
 /*! @brief mmc extended csd flags*/
 typedef enum _mmc_extended_csd_flags
 {
-    kMMC_ExtCsdExtPartitionSupport = (1 << 0U),       /*!< partitioning support[160] */
-    kMMC_ExtCsdEnhancePartitionSupport = (1 << 1U),   /*!< partitioning support[160] */
-    kMMC_ExtCsdPartitioningSupport = (1 << 2U),       /*!< partitioning support[160] */
+    kMMC_ExtCsdExtPartitionSupport       = (1 << 0U), /*!< partitioning support[160] */
+    kMMC_ExtCsdEnhancePartitionSupport   = (1 << 1U), /*!< partitioning support[160] */
+    kMMC_ExtCsdPartitioningSupport       = (1 << 2U), /*!< partitioning support[160] */
     kMMC_ExtCsdPrgCIDCSDInDDRModeSupport = (1 << 3U), /*!< CMD26 and CMD27 are support dual data rate [130]*/
-    kMMC_ExtCsdBKOpsSupport = (1 << 4U),              /*!< background operation feature support [502]*/
-    kMMC_ExtCsdDataTagSupport = (1 << 5U),            /*!< data tag support[499]*/
-    kMMC_ExtCsdModeOperationCodeSupport = (1 << 6U),  /*!< mode operation code support[493]*/
+    kMMC_ExtCsdBKOpsSupport              = (1 << 4U), /*!< background operation feature support [502]*/
+    kMMC_ExtCsdDataTagSupport            = (1 << 5U), /*!< data tag support[499]*/
+    kMMC_ExtCsdModeOperationCodeSupport  = (1 << 6U), /*!< mode operation code support[493]*/
 } mmc_extended_csd_flags_t;
 
 /*! @brief MMC card boot mode */
 enum _mmc_boot_mode
 {
-    kMMC_BootModeNormal = 0U,      /*!< Normal boot */
+    kMMC_BootModeNormal      = 0U, /*!< Normal boot */
     kMMC_BootModeAlternative = 1U, /*!< Alternative boot */
 };
 
@@ -942,10 +942,10 @@ typedef struct _sd_csd
 /*! @brief The bit mask for TIME VALUE field in TRANSFER SPEED */
 #define SD_TRANSFER_SPEED_TIME_VALUE_MASK (0x78U)
 /*! @brief Read the value of FREQUENCY UNIT in TRANSFER SPEED field */
-#define SD_RD_TRANSFER_SPEED_RATE_UNIT(x) \
+#define SD_RD_TRANSFER_SPEED_RATE_UNIT(x)                                                                              \
     (((x.transferSpeed) & SD_TRANSFER_SPEED_RATE_UNIT_MASK) >> SD_TRANSFER_SPEED_RATE_UNIT_SHIFT)
 /*! @brief Read the value of TIME VALUE in TRANSFER SPEED field */
-#define SD_RD_TRANSFER_SPEED_TIME_VALUE(x) \
+#define SD_RD_TRANSFER_SPEED_TIME_VALUE(x)                                                                             \
     (((x.transferSpeed) & SD_TRANSFER_SPEED_TIME_VALUE_MASK) >> SD_TRANSFER_SPEED_TIME_VALUE_SHIFT)
 
 /*! @brief SD card SCR register */
@@ -1004,54 +1004,54 @@ typedef struct _mmc_csd
 /*! @brief MMC card Extended CSD register (unit: byte). */
 typedef struct _mmc_extended_csd
 {
-    uint8_t SecureRemoveType;             /*!< secure removal type[16]*/
-    uint8_t enProductStateAware;         /*!< product state awareness enablement[17]*/
-    uint32_t maxPreLoadDataSize;          /*!< max preload data size[21-18]*/
-    uint32_t preLoadDataSize;             /*!< pre-load data size[25-22]*/
-    uint8_t ffuStatus;                   /*!< FFU status [26]*/
-    uint8_t modeOperationCode;            /*!< mode operation code[29]*/
-    uint8_t modeConfig;                   /*!< mode config [30]*/
-    uint8_t cacheCtrl;                   /*!< control to turn on/off cache[33]*/
-    uint8_t pwroffNotify;                 /*!< power off notification[34]*/
-    uint8_t packedCmdFailIndex;          /*!< packed cmd fail index [35]*/
-    uint8_t packedCmdStatus;              /*!< packed cmd status[36]*/
-    uint32_t contextConfig[4U];           /*!< context configuration[51-37]*/
-    uint16_t extPartitionAttr;            /*!< extended partitions attribut[53-52]*/
-    uint16_t exceptEventStatus;           /*!< exception events status[55-54]*/
-    uint16_t exceptEventControl;         /*!< exception events control[57-56]*/
-    uint8_t toReleaseAddressedGroup;      /*!< number of group to be released[58]*/
-    uint8_t class6CmdCtrl;               /*!< class 6 command control[59]*/
-    uint8_t intTimeoutEmu;               /*!< 1st initiallization after disabling sector size emu[60]*/
-    uint8_t sectorSize;                   /*!< sector size[61] */
-    uint8_t sectorSizeEmu;                /*!< sector size emulation[62]*/
-    uint8_t nativeSectorSize;             /*!< native sector size[63]*/
-    uint8_t periodWakeup;                 /*!< period wakeup [131]*/
-    uint8_t tCASESupport;                /*!< package case temperature is controlled[132]*/
-    uint8_t productionStateAware;         /*!< production state awareness[133]*/
-    uint32_t enhanceUsrDataStartAddr;     /*!< enhanced user data start addr [139-136]*/
-    uint32_t enhanceUsrDataSize;          /*!< enhanced user data area size[142-140]*/
-    uint8_t  generalPartition1Multi0;	  /*!< General partition 1 multiplier 0 [143]*/
-    uint8_t  generalPartition1Multi1;	  /*!< General partition 1 multiplier 1 [144]*/
-    uint8_t  generalPartition1Multi2;	 /*!< General partition 1 multiplier 2 [145]*/
-    uint8_t  generalPartition2Multi0;	 /*!< General partition 2 multiplier 0 [146]*/
-    uint8_t  generalPartition2Multi1;	 /*!< General partition 2 multiplier 1 [147]*/
-    uint8_t  generalPartition2Multi2;	 /*!< General partition 2 multiplier 2 [148]*/
-    uint8_t  generalPartition3Multi0;	 /*!< General partition 3 multiplier 0 [149]*/
-    uint8_t  generalPartition3Multi1;	 /*!< General partition 3 multiplier 1 [150]*/
-    uint8_t  generalPartition3Multi2;	 /*!< General partition 3 multiplier 2 [151]*/
-    uint8_t  generalPartition4Multi0; 	 /*!< General partition 4 multiplier 2 [152]*/
-    uint8_t  generalPartition4Multi1; 	 /*!< General partition 4 multiplier 2 [153]*/
-    uint8_t  generalPartition4Multi2; 	 /*!< General partition 4 multiplier 2 [154]*/
-    uint32_t generalPartitionSize[3];     /*!< general purpose partition size[154-143]*/
-    uint8_t  partitioningSettingCompleted; /*!< Partitioning setting completed byte [155]*/
+    uint8_t SecureRemoveType;                 /*!< secure removal type[16]*/
+    uint8_t enProductStateAware;              /*!< product state awareness enablement[17]*/
+    uint32_t maxPreLoadDataSize;              /*!< max preload data size[21-18]*/
+    uint32_t preLoadDataSize;                 /*!< pre-load data size[25-22]*/
+    uint8_t ffuStatus;                        /*!< FFU status [26]*/
+    uint8_t modeOperationCode;                /*!< mode operation code[29]*/
+    uint8_t modeConfig;                       /*!< mode config [30]*/
+    uint8_t cacheCtrl;                        /*!< control to turn on/off cache[33]*/
+    uint8_t pwroffNotify;                     /*!< power off notification[34]*/
+    uint8_t packedCmdFailIndex;               /*!< packed cmd fail index [35]*/
+    uint8_t packedCmdStatus;                  /*!< packed cmd status[36]*/
+    uint32_t contextConfig[4U];               /*!< context configuration[51-37]*/
+    uint16_t extPartitionAttr;                /*!< extended partitions attribut[53-52]*/
+    uint16_t exceptEventStatus;               /*!< exception events status[55-54]*/
+    uint16_t exceptEventControl;              /*!< exception events control[57-56]*/
+    uint8_t toReleaseAddressedGroup;          /*!< number of group to be released[58]*/
+    uint8_t class6CmdCtrl;                    /*!< class 6 command control[59]*/
+    uint8_t intTimeoutEmu;                    /*!< 1st initiallization after disabling sector size emu[60]*/
+    uint8_t sectorSize;                       /*!< sector size[61] */
+    uint8_t sectorSizeEmu;                    /*!< sector size emulation[62]*/
+    uint8_t nativeSectorSize;                 /*!< native sector size[63]*/
+    uint8_t periodWakeup;                     /*!< period wakeup [131]*/
+    uint8_t tCASESupport;                     /*!< package case temperature is controlled[132]*/
+    uint8_t productionStateAware;             /*!< production state awareness[133]*/
+    uint32_t enhanceUsrDataStartAddr;         /*!< enhanced user data start addr [139-136]*/
+    uint32_t enhanceUsrDataSize;              /*!< enhanced user data area size[142-140]*/
+    uint8_t generalPartition1Multi0;          /*!< General partition 1 multiplier 0 [143]*/
+    uint8_t generalPartition1Multi1;          /*!< General partition 1 multiplier 1 [144]*/
+    uint8_t generalPartition1Multi2;          /*!< General partition 1 multiplier 2 [145]*/
+    uint8_t generalPartition2Multi0;          /*!< General partition 2 multiplier 0 [146]*/
+    uint8_t generalPartition2Multi1;          /*!< General partition 2 multiplier 1 [147]*/
+    uint8_t generalPartition2Multi2;          /*!< General partition 2 multiplier 2 [148]*/
+    uint8_t generalPartition3Multi0;          /*!< General partition 3 multiplier 0 [149]*/
+    uint8_t generalPartition3Multi1;          /*!< General partition 3 multiplier 1 [150]*/
+    uint8_t generalPartition3Multi2;          /*!< General partition 3 multiplier 2 [151]*/
+    uint8_t generalPartition4Multi0;          /*!< General partition 4 multiplier 2 [152]*/
+    uint8_t generalPartition4Multi1;          /*!< General partition 4 multiplier 2 [153]*/
+    uint8_t generalPartition4Multi2;          /*!< General partition 4 multiplier 2 [154]*/
+    uint32_t generalPartitionSize[3];         /*!< general purpose partition size[154-143]*/
+    uint8_t partitioningSettingCompleted;     /*!< Partitioning setting completed byte [155]*/
     uint8_t partitionAttribute;               /*!< partition attribute [156]*/
-    uint32_t maxEnhanceAreaSize;          /*!< max enhance area size [159-157]*/
-    uint8_t partitioningSupport;		/*!< Partitioning support [160U]*/
-    uint8_t hpiManagementEn;            /*!< HPI management [161]*/
-    uint8_t writeReliabilityParameter;   /*!< write reliability parameter register[166] */
-    uint8_t writeReliabilitySet;          /*!< write reliability setting register[167] */
-    uint8_t rpmbSizeMult;                 /*!< RPMB size multi [168]*/
-    uint8_t fwConfig;                    /*!< FW configuration[169]*/
+    uint32_t maxEnhanceAreaSize;              /*!< max enhance area size [159-157]*/
+    uint8_t partitioningSupport;              /*!< Partitioning support [160U]*/
+    uint8_t hpiManagementEn;                  /*!< HPI management [161]*/
+    uint8_t writeReliabilityParameter;        /*!< write reliability parameter register[166] */
+    uint8_t writeReliabilitySet;              /*!< write reliability setting register[167] */
+    uint8_t rpmbSizeMult;                     /*!< RPMB size multi [168]*/
+    uint8_t fwConfig;                         /*!< FW configuration[169]*/
     uint8_t userWP;                           /*!< user write protect register[171] */
     uint8_t bootPartitionWP;                  /*!< boot write protect register[173]*/
     uint8_t bootWPStatus;                     /*!< boot write protect status register[174]*/
@@ -1069,8 +1069,8 @@ typedef struct _mmc_extended_csd
     uint8_t csdStructureVersion;              /*!< CSD structure version [194] */
     uint8_t cardType;                         /*!< Card Type [196] */
     uint8_t ioDriverStrength;                 /*!< IO driver strength [197] */
-    uint8_t OutofInterruptBusyTiming;     /*!< out of interrupt busy timing [198] */
-    uint8_t partitionSwitchTiming;        /*!< partition switch timing [199] */
+    uint8_t OutofInterruptBusyTiming;         /*!< out of interrupt busy timing [198] */
+    uint8_t partitionSwitchTiming;            /*!< partition switch timing [199] */
     uint8_t powerClass52MHz195V;              /*!< Power Class for 52MHz @ 1.95V [200] */
     uint8_t powerClass26MHz195V;              /*!< Power Class for 26MHz @ 1.95V [201] */
     uint8_t powerClass52MHz360V;              /*!< Power Class for 52MHz @ 3.6V [202] */
@@ -1084,9 +1084,9 @@ typedef struct _mmc_extended_csd
     uint8_t minimumReadPerformance8Bit52MHz;   /*!< Minimum Read Performance for 8bit at 52MHz [209] */
     uint8_t minimumWritePerformance8Bit52MHz;  /*!< Minimum Write Performance for 8bit at 52MHz [210] */
     uint32_t sectorCount;                      /*!< Sector Count [215:212] */
-    uint8_t sleepNotificationTimeout;     /*!< sleep notification timeout [216]*/
+    uint8_t sleepNotificationTimeout;          /*!< sleep notification timeout [216]*/
     uint8_t sleepAwakeTimeout;                 /*!< Sleep/awake timeout [217] */
-    uint8_t productionStateAwareTimeout;   /*!< Production state awareness timeout [218]*/
+    uint8_t productionStateAwareTimeout;       /*!< Production state awareness timeout [218]*/
     uint8_t sleepCurrentVCCQ;                  /*!< Sleep current (VCCQ) [219] */
     uint8_t sleepCurrentVCC;                   /*!< Sleep current (VCC) [220] */
     uint8_t highCapacityWriteProtectGroupSize; /*!< High-capacity write protect group size [221] */
@@ -1094,48 +1094,47 @@ typedef struct _mmc_extended_csd
     uint8_t highCapacityEraseTimeout;          /*!< High-capacity erase timeout [223] */
     uint8_t highCapacityEraseUnitSize;         /*!< High-capacity erase unit size [224] */
     uint8_t accessSize;                        /*!< Access size [225] */
-    uint8_t secureTrimMultiplier;          /*!< secure trim multiplier[229]*/
-    uint8_t secureEraseMultiplier;        /*!< secure erase multiplier[230]*/
-    uint8_t secureFeatureSupport;          /*!< secure feature support[231]*/
-    uint32_t trimMultiplier;              /*!< trim multiplier[232]*/
+    uint8_t secureTrimMultiplier;              /*!< secure trim multiplier[229]*/
+    uint8_t secureEraseMultiplier;             /*!< secure erase multiplier[230]*/
+    uint8_t secureFeatureSupport;              /*!< secure feature support[231]*/
+    uint32_t trimMultiplier;                   /*!< trim multiplier[232]*/
     uint8_t minReadPerformance8bitAt52MHZDDR;  /*!< Minimum read performance for 8bit at DDR 52MHZ[234]*/
     uint8_t minWritePerformance8bitAt52MHZDDR; /*!< Minimum write performance for 8bit at DDR 52MHZ[235]*/
     uint8_t powerClass200MHZVCCQ130VVCC360V;   /*!< power class for 200MHZ, at VCCQ= 1.3V,VCC=3.6V[236]*/
     uint8_t powerClass200MHZVCCQ195VVCC360V;   /*!< power class for 200MHZ, at VCCQ= 1.95V,VCC=3.6V[237]*/
     uint8_t powerClass52MHZDDR195V;            /*!< power class for 52MHZ,DDR at Vcc 1.95V[238]*/
     uint8_t powerClass52MHZDDR360V;            /*!< power class for 52MHZ,DDR at Vcc 3.6V[239]*/
-    uint8_t iniTimeoutAP;                 /*!< 1st initialization time after partitioning[241]*/
-    uint32_t correctPrgSectorNum;          /*!< correct prg sectors number[245-242]*/
-    uint8_t bkOpsStatus;                 /*!< background operations status[246]*/
-    uint8_t powerOffNotifyTimeout;         /*!< power off notification timeout[247]*/
-    uint8_t genericCMD6Timeout;            /*!< generic CMD6 timeout[248]*/
+    uint8_t iniTimeoutAP;                      /*!< 1st initialization time after partitioning[241]*/
+    uint32_t correctPrgSectorNum;              /*!< correct prg sectors number[245-242]*/
+    uint8_t bkOpsStatus;                       /*!< background operations status[246]*/
+    uint8_t powerOffNotifyTimeout;             /*!< power off notification timeout[247]*/
+    uint8_t genericCMD6Timeout;                /*!< generic CMD6 timeout[248]*/
     uint32_t cacheSize;                        /*!< cache size[252-249]*/
     uint8_t powerClass200MHZDDR360V;           /*!< power class for 200MHZ, DDR at VCC=2.6V[253]*/
-    uint32_t fwVer[2U];                   /*!< fw VERSION [261-254]*/
-    uint16_t deviceVer;                    /*!< device version[263-262]*/
-    uint8_t optimalTrimSize;              /*!< optimal trim size[264]*/
-    uint8_t optimalWriteSize;              /*!< optimal write size[265]*/
-    uint8_t optimalReadSize;               /*!< optimal read size[266]*/
-    uint8_t preEolInfo;                    /*!< pre EOL information[267]*/
-    uint8_t deviceLifeTimeEstimationA;     /*!< device life time estimation typeA[268]*/
-    uint8_t deviceLifeTimeEstimationB;     /*!< device life time estimation typeB[269]*/
-    uint32_t correctPrgFWSectorNum;       /*!< number of FW sectors correctly programmed[305-302]*/
-    uint32_t ffuArg;                     /*!< FFU argument[490-487]*/
-    uint8_t operationCodeTimeout;         /*!< operation code timeout[491]*/
-    uint8_t supportMode;                  /*!< support mode [493]*/
+    uint32_t fwVer[2U];                        /*!< fw VERSION [261-254]*/
+    uint16_t deviceVer;                        /*!< device version[263-262]*/
+    uint8_t optimalTrimSize;                   /*!< optimal trim size[264]*/
+    uint8_t optimalWriteSize;                  /*!< optimal write size[265]*/
+    uint8_t optimalReadSize;                   /*!< optimal read size[266]*/
+    uint8_t preEolInfo;                        /*!< pre EOL information[267]*/
+    uint8_t deviceLifeTimeEstimationA;         /*!< device life time estimation typeA[268]*/
+    uint8_t deviceLifeTimeEstimationB;         /*!< device life time estimation typeB[269]*/
+    uint32_t correctPrgFWSectorNum;            /*!< number of FW sectors correctly programmed[305-302]*/
+    uint32_t ffuArg;                           /*!< FFU argument[490-487]*/
+    uint8_t operationCodeTimeout;              /*!< operation code timeout[491]*/
+    uint8_t supportMode;                       /*!< support mode [493]*/
     uint8_t extPartitionSupport;               /*!< extended partition attribute support[494]*/
-    uint8_t largeUnitSize;                 /*!< large unit size[495]*/
-    uint8_t contextManageCap;             /*!< context management capability[496]*/
-    uint8_t tagResourceSize;               /*!< tag resource size[497]*/
-    uint8_t tagUnitSize;                  /*!< tag unit size[498]*/
-    uint8_t maxPackedWriteCmd;           /*!< max packed write cmd[500]*/
-    uint8_t maxPackedReadCmd;              /*!< max packed read cmd[501]*/
-    uint8_t hpiFeature;                    /*!< HPI feature[503]*/
+    uint8_t largeUnitSize;                     /*!< large unit size[495]*/
+    uint8_t contextManageCap;                  /*!< context management capability[496]*/
+    uint8_t tagResourceSize;                   /*!< tag resource size[497]*/
+    uint8_t tagUnitSize;                       /*!< tag unit size[498]*/
+    uint8_t maxPackedWriteCmd;                 /*!< max packed write cmd[500]*/
+    uint8_t maxPackedReadCmd;                  /*!< max packed read cmd[501]*/
+    uint8_t hpiFeature;                        /*!< HPI feature[503]*/
     uint8_t supportedCommandSet;               /*!< Supported Command Sets [504] */
-    uint8_t extSecurityCmdError;          /*!< extended security commands error[505]*/
+    uint8_t extSecurityCmdError;               /*!< extended security commands error[505]*/
 } mmc_extended_csd_t;
 
-
 /*! @brief The bit shift for COMMAND SET field in SWITCH command. */
 #define MMC_SWITCH_COMMAND_SET_SHIFT (0U)
 /*! @brief The bit mask for COMMAND set field in SWITCH command. */
diff --git a/module-bsp/board/rt1051/bsp/eink/ED028TC1.cpp b/module-bsp/board/rt1051/bsp/eink/ED028TC1.cpp
index 2e335ec0d..1d6a1e688 100644
--- a/module-bsp/board/rt1051/bsp/eink/ED028TC1.cpp
+++ b/module-bsp/board/rt1051/bsp/eink/ED028TC1.cpp
@@ -40,42 +40,42 @@
 #include "drivers/dma/DriverDMA.hpp"
 #include "bsp/BoardDefinitions.hpp"
 
-#define EPD_BOOSTER_START_PERIOD_10MS       0
-#define EPD_BOOSTER_START_PERIOD_20MS       1
-#define EPD_BOOSTER_START_PERIOD_30MS       2
-#define EPD_BOOSTER_START_PERIOD_40MS       3
-#define EPD_BOOSTER_START_PERIOD_POS        6
+#define EPD_BOOSTER_START_PERIOD_10MS 0
+#define EPD_BOOSTER_START_PERIOD_20MS 1
+#define EPD_BOOSTER_START_PERIOD_30MS 2
+#define EPD_BOOSTER_START_PERIOD_40MS 3
+#define EPD_BOOSTER_START_PERIOD_POS  6
 
-#define EPD_BOOSTER_DRIVING_STRENGTH_1      0
-#define EPD_BOOSTER_DRIVING_STRENGTH_2      1
-#define EPD_BOOSTER_DRIVING_STRENGTH_3      2
-#define EPD_BOOSTER_DRIVING_STRENGTH_4      3
-#define EPD_BOOSTER_DRIVING_STRENGTH_5      4
-#define EPD_BOOSTER_DRIVING_STRENGTH_6      5
-#define EPD_BOOSTER_DRIVING_STRENGTH_7      6
-#define EPD_BOOSTER_DRIVING_STRENGTH_8      7
-#define EPD_BOOSTER_DRIVING_STRENGTH_POS    3
+#define EPD_BOOSTER_DRIVING_STRENGTH_1   0
+#define EPD_BOOSTER_DRIVING_STRENGTH_2   1
+#define EPD_BOOSTER_DRIVING_STRENGTH_3   2
+#define EPD_BOOSTER_DRIVING_STRENGTH_4   3
+#define EPD_BOOSTER_DRIVING_STRENGTH_5   4
+#define EPD_BOOSTER_DRIVING_STRENGTH_6   5
+#define EPD_BOOSTER_DRIVING_STRENGTH_7   6
+#define EPD_BOOSTER_DRIVING_STRENGTH_8   7
+#define EPD_BOOSTER_DRIVING_STRENGTH_POS 3
 
-#define EPD_BOOSTER_OFF_TIME_GDR_0_27uS     0
-#define EPD_BOOSTER_OFF_TIME_GDR_0_34uS     1
-#define EPD_BOOSTER_OFF_TIME_GDR_0_40uS     2
-#define EPD_BOOSTER_OFF_TIME_GDR_0_54uS     3
-#define EPD_BOOSTER_OFF_TIME_GDR_0_80uS     4
-#define EPD_BOOSTER_OFF_TIME_GDR_1_54uS     5
-#define EPD_BOOSTER_OFF_TIME_GDR_3_34uS     6
-#define EPD_BOOSTER_OFF_TIME_GDR_6_58uS     7
-#define EPD_BOOSTER_OFF_TIME_GDR_POS        0
+#define EPD_BOOSTER_OFF_TIME_GDR_0_27uS 0
+#define EPD_BOOSTER_OFF_TIME_GDR_0_34uS 1
+#define EPD_BOOSTER_OFF_TIME_GDR_0_40uS 2
+#define EPD_BOOSTER_OFF_TIME_GDR_0_54uS 3
+#define EPD_BOOSTER_OFF_TIME_GDR_0_80uS 4
+#define EPD_BOOSTER_OFF_TIME_GDR_1_54uS 5
+#define EPD_BOOSTER_OFF_TIME_GDR_3_34uS 6
+#define EPD_BOOSTER_OFF_TIME_GDR_6_58uS 7
+#define EPD_BOOSTER_OFF_TIME_GDR_POS    0
 
-#define EINK_BLACK_PIXEL_MASK               0x00        // This is the mask for the black pixel value
-#define EINK_1BPP_WHITE_PIXEL_MASK          0x01        // This is the mask for the white pixel in 1bpp mode
-#define EINK_2BPP_WHITE_PIXEL_MASK          0x03        // This is the mask for the white pixel in 2bpp mode
-#define EINK_4BPP_WHITE_PIXEL_MASK          0x0F        // This is the mask for the white pixel in 4bpp mode
+#define EINK_BLACK_PIXEL_MASK      0x00 // This is the mask for the black pixel value
+#define EINK_1BPP_WHITE_PIXEL_MASK 0x01 // This is the mask for the white pixel in 1bpp mode
+#define EINK_2BPP_WHITE_PIXEL_MASK 0x03 // This is the mask for the white pixel in 2bpp mode
+#define EINK_4BPP_WHITE_PIXEL_MASK 0x0F // This is the mask for the white pixel in 4bpp mode
 
-#define ED028TC1_BUSY_STATE_TIMEOUT_MS      2000        // Time after the display should for sure exit the busy state
+#define ED028TC1_BUSY_STATE_TIMEOUT_MS 2000 // Time after the display should for sure exit the busy state
 
-#define _delay_ms(ms)                       vTaskDelay(pdMS_TO_TICKS(ms))
+#define _delay_ms(ms) vTaskDelay(pdMS_TO_TICKS(ms))
 
-#define EINK_SUSPEND_TASK_TILL_EPD_BUSY()   BSP_EinkWaitUntilDisplayBusy(pdMS_TO_TICKS(1000))
+#define EINK_SUSPEND_TASK_TILL_EPD_BUSY() BSP_EinkWaitUntilDisplayBusy(pdMS_TO_TICKS(1000))
 
 //#define EINK_DEBUG_LOG  1
 //
@@ -84,7 +84,7 @@
 //#endif
 
 /// This is DMA handle for internal frame buffer memory-to-memory copying operation
-static edma_handle_t            s_einkMemcpyDma_handle;
+static edma_handle_t s_einkMemcpyDma_handle;
 
 using namespace drivers;
 using namespace magic_enum;
@@ -94,46 +94,37 @@ static std::shared_ptr<drivers::DriverDMAMux> dmamux;
 #define EINK_LUTS_FILE_PATH "/Luts.bin"
 
 /* Internal variable definitions */
-static uint8_t              s_einkIsPoweredOn = false;  //  Variable which contains the state of the power of the EPD display
+static uint8_t s_einkIsPoweredOn = false; //  Variable which contains the state of the power of the EPD display
 
-static EinkWaveforms_e      s_einkConfiguredWaveform = EinkWaveformGC16;    //  This variable contains the current waveform set in the display
-static int8_t               s_einkPreviousTemperature = 127;                //  This variable contains the last measured temperature of the ambient
+static EinkWaveforms_e s_einkConfiguredWaveform =
+    EinkWaveformGC16;                          //  This variable contains the current waveform set in the display
+static int8_t s_einkPreviousTemperature = 127; //  This variable contains the last measured temperature of the ambient
 
-static CACHEABLE_SECTION_SDRAM(uint8_t s_einkServiceRotatedBuf[BOARD_EINK_DISPLAY_RES_X * BOARD_EINK_DISPLAY_RES_Y/2 + 2]);  // Plus 2 for the EPD command and BPP config
+static CACHEABLE_SECTION_SDRAM(uint8_t s_einkServiceRotatedBuf[BOARD_EINK_DISPLAY_RES_X * BOARD_EINK_DISPLAY_RES_Y / 2 +
+                                                               2]); // Plus 2 for the EPD command and BPP config
 
 /**
  * @brief This lut is used for convertion of the 4bp input grayscale pixel to the 1bpp output pixel
  */
-static uint8_t s_einkMaskLut_1Bpp[16] =
-{
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 1, 1, 1, 1,
- 1, 1, 1, 1
-};
+static uint8_t s_einkMaskLut_1Bpp[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
 
 /**
  * @brief This lut is used for convertion of the 4bp input grayscale pixel to the 2bpp output pixel
  */
-static uint8_t s_einkMaskLut_2Bpp[16] =
-{
- 0, 0, 0, 0,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- 3, 3, 3, 3
-};
+static uint8_t s_einkMaskLut_2Bpp[16] = {0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3};
 
 /* External variable definitions */
 
-
 /* Internal function prototypes */
 
 /**
- *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
  *
  *  @note IT ROTATES only the 1Bpp image
  *
- *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
  *  @param uint16_t x               [in]  - x coordinate of image in pixels
  *  @param uint16_t y               [in]  - y coordinate of image in pixels
  *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
@@ -169,19 +160,20 @@ static uint8_t s_einkMaskLut_2Bpp[16] =
  *
  * @return
  */
-static uint8_t* s_EinkTransformFrameCoordinateSystem_1Bpp(
-       uint8_t* dataIn,
-       uint16_t windowWidthPx,
-       uint16_t windowHeightPx,
-       uint8_t* dataOut,
-       EinkDisplayColorMode_e invertColors);
+static uint8_t *s_EinkTransformFrameCoordinateSystem_1Bpp(uint8_t *dataIn,
+                                                          uint16_t windowWidthPx,
+                                                          uint16_t windowHeightPx,
+                                                          uint8_t *dataOut,
+                                                          EinkDisplayColorMode_e invertColors);
 
 /**
- *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
  *
  *  @note IT ROTATES only the 2Bpp image
  *
- *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
  *  @param uint16_t x               [in]  - x coordinate of image in pixels
  *  @param uint16_t y               [in]  - y coordinate of image in pixels
  *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
@@ -217,19 +209,20 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_1Bpp(
  *
  * @return
  */
-static uint8_t* s_EinkTransformFrameCoordinateSystem_2Bpp(
-       uint8_t* dataIn,
-       uint16_t windowWidthPx,
-       uint16_t windowHeightPx,
-       uint8_t* dataOut,
-       EinkDisplayColorMode_e invertColors);
+static uint8_t *s_EinkTransformFrameCoordinateSystem_2Bpp(uint8_t *dataIn,
+                                                          uint16_t windowWidthPx,
+                                                          uint16_t windowHeightPx,
+                                                          uint8_t *dataOut,
+                                                          EinkDisplayColorMode_e invertColors);
 
 /**
- *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
  *
  *  @note IT ROTATES only the 3Bpp image
  *
- *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
  *  @param uint16_t x               [in]  - x coordinate of image in pixels
  *  @param uint16_t y               [in]  - y coordinate of image in pixels
  *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
@@ -265,19 +258,20 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_2Bpp(
  *
  * @return
  */
-static uint8_t* s_EinkTransformFrameCoordinateSystem_3Bpp(
-       uint8_t* dataIn,
-       uint16_t windowWidthPx,
-       uint16_t windowHeightPx,
-       uint8_t* dataOut,
-       EinkDisplayColorMode_e invertColors);
+static uint8_t *s_EinkTransformFrameCoordinateSystem_3Bpp(uint8_t *dataIn,
+                                                          uint16_t windowWidthPx,
+                                                          uint16_t windowHeightPx,
+                                                          uint8_t *dataOut,
+                                                          EinkDisplayColorMode_e invertColors);
 
 /**
- *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
  *
  *  @note IT ROTATES only the 4Bpp image
  *
- *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
  *  @param uint16_t x               [in]  - x coordinate of image in pixels
  *  @param uint16_t y               [in]  - y coordinate of image in pixels
  *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
@@ -313,241 +307,237 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_3Bpp(
  *
  * @return
  */
-static uint8_t* s_EinkTransformFrameCoordinateSystem_4Bpp(
-    uint8_t* dataIn,
-    uint16_t windowWidthPx,
-    uint16_t windowHeightPx,
-    uint8_t* dataOut,
-    EinkDisplayColorMode_e invertColors);
+static uint8_t *s_EinkTransformFrameCoordinateSystem_4Bpp(uint8_t *dataIn,
+                                                          uint16_t windowWidthPx,
+                                                          uint16_t windowHeightPx,
+                                                          uint8_t *dataOut,
+                                                          EinkDisplayColorMode_e invertColors);
 
 /**
-*  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
-*
-*  @note IT ROTATES only the 1Bpp image. It also makes sure that the image is black and white only
-*
-*  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
-*  @param uint16_t x               [in]  - x coordinate of image in pixels
-*  @param uint16_t y               [in]  - y coordinate of image in pixels
-*  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
-*  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
-*  @param uint8_t* dataOut         [out] - the buffer for rotated image
-*  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
-*
-* @note Assumed dataIn coordinate system is the standard image coordinates system:
-*
-*   (0,0)   X
-*       *-------->
-*       |
-*     Y |
-*       |
-*       v
-*
-*
-* The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
-* way in its own coordinate system which is:
-*
-*              displayWidth
-*                 _______  ^
-*                |       | |
-*                |       | |
-*  displayHeight |       | |
-*                |       | |
-*                |_______| |  X
-*                   \ /    |
-*    signal tape -  | |    |
-*                          |
-*                 <--------*
-*                    Y     (0,0)
-*
-* @return
-*/
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(
-    uint8_t* dataIn,
-    uint16_t windowWidthPx,
-    uint16_t windowHeightPx,
-    uint8_t* dataOut,
-    EinkDisplayColorMode_e invertColors);
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
+ *
+ *  @note IT ROTATES only the 1Bpp image. It also makes sure that the image is black and white only
+ *
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
+ *  @param uint16_t x               [in]  - x coordinate of image in pixels
+ *  @param uint16_t y               [in]  - y coordinate of image in pixels
+ *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
+ *  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
+ *  @param uint8_t* dataOut         [out] - the buffer for rotated image
+ *  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+ *
+ * @note Assumed dataIn coordinate system is the standard image coordinates system:
+ *
+ *   (0,0)   X
+ *       *-------->
+ *       |
+ *     Y |
+ *       |
+ *       v
+ *
+ *
+ * The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
+ * way in its own coordinate system which is:
+ *
+ *              displayWidth
+ *                 _______  ^
+ *                |       | |
+ *                |       | |
+ *  displayHeight |       | |
+ *                |       | |
+ *                |_______| |  X
+ *                   \ /    |
+ *    signal tape -  | |    |
+ *                          |
+ *                 <--------*
+ *                    Y     (0,0)
+ *
+ * @return
+ */
+static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(uint8_t *dataIn,
+                                                                   uint16_t windowWidthPx,
+                                                                   uint16_t windowHeightPx,
+                                                                   uint8_t *dataOut,
+                                                                   EinkDisplayColorMode_e invertColors);
 
 /**
-*  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
-*
-*  @note IT ROTATES only the 2Bpp image. It also makes sure that the image is black and white only
-*
-*  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
-*  @param uint16_t x               [in]  - x coordinate of image in pixels
-*  @param uint16_t y               [in]  - y coordinate of image in pixels
-*  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
-*  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
-*  @param uint8_t* dataOut         [out] - the buffer for rotated image
-*  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
-*
-* @note Assumed dataIn coordinate system is the standard image coordinates system:
-*
-*   (0,0)   X
-*       *-------->
-*       |
-*     Y |
-*       |
-*       v
-*
-*
-* The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
-* way in its own coordinate system which is:
-*
-*              displayWidth
-*                 _______  ^
-*                |       | |
-*                |       | |
-*  displayHeight |       | |
-*                |       | |
-*                |_______| |  X
-*                   \ /    |
-*    signal tape -  | |    |
-*                          |
-*                 <--------*
-*                    Y     (0,0)
-*
-* @return
-*/
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(
-    uint8_t* dataIn,
-    uint16_t windowWidthPx,
-    uint16_t windowHeightPx,
-    uint8_t* dataOut,
-    EinkDisplayColorMode_e invertColors);
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
+ *
+ *  @note IT ROTATES only the 2Bpp image. It also makes sure that the image is black and white only
+ *
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
+ *  @param uint16_t x               [in]  - x coordinate of image in pixels
+ *  @param uint16_t y               [in]  - y coordinate of image in pixels
+ *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
+ *  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
+ *  @param uint8_t* dataOut         [out] - the buffer for rotated image
+ *  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+ *
+ * @note Assumed dataIn coordinate system is the standard image coordinates system:
+ *
+ *   (0,0)   X
+ *       *-------->
+ *       |
+ *     Y |
+ *       |
+ *       v
+ *
+ *
+ * The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
+ * way in its own coordinate system which is:
+ *
+ *              displayWidth
+ *                 _______  ^
+ *                |       | |
+ *                |       | |
+ *  displayHeight |       | |
+ *                |       | |
+ *                |_______| |  X
+ *                   \ /    |
+ *    signal tape -  | |    |
+ *                          |
+ *                 <--------*
+ *                    Y     (0,0)
+ *
+ * @return
+ */
+static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(uint8_t *dataIn,
+                                                                   uint16_t windowWidthPx,
+                                                                   uint16_t windowHeightPx,
+                                                                   uint8_t *dataOut,
+                                                                   EinkDisplayColorMode_e invertColors);
 
 /**
-*  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
-*
-*  @note IT ROTATES only the 3Bpp image. It also makes sure that the image is black and white only
-*
-*  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
-*  @param uint16_t x               [in]  - x coordinate of image in pixels
-*  @param uint16_t y               [in]  - y coordinate of image in pixels
-*  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
-*  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
-*  @param uint8_t* dataOut         [out] - the buffer for rotated image
-*  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
-*
-* @note Assumed dataIn coordinate system is the standard image coordinates system:
-*
-*   (0,0)   X
-*       *-------->
-*       |
-*     Y |
-*       |
-*       v
-*
-*
-* The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
-* way in its own coordinate system which is:
-*
-*              displayWidth
-*                 _______  ^
-*                |       | |
-*                |       | |
-*  displayHeight |       | |
-*                |       | |
-*                |_______| |  X
-*                   \ /    |
-*    signal tape -  | |    |
-*                          |
-*                 <--------*
-*                    Y     (0,0)
-*
-* @return
-*/
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(
-    uint8_t* dataIn,
-    uint16_t windowWidthPx,
-    uint16_t windowHeightPx,
-    uint8_t* dataOut,
-    EinkDisplayColorMode_e invertColors);
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
+ *
+ *  @note IT ROTATES only the 3Bpp image. It also makes sure that the image is black and white only
+ *
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
+ *  @param uint16_t x               [in]  - x coordinate of image in pixels
+ *  @param uint16_t y               [in]  - y coordinate of image in pixels
+ *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
+ *  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
+ *  @param uint8_t* dataOut         [out] - the buffer for rotated image
+ *  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+ *
+ * @note Assumed dataIn coordinate system is the standard image coordinates system:
+ *
+ *   (0,0)   X
+ *       *-------->
+ *       |
+ *     Y |
+ *       |
+ *       v
+ *
+ *
+ * The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
+ * way in its own coordinate system which is:
+ *
+ *              displayWidth
+ *                 _______  ^
+ *                |       | |
+ *                |       | |
+ *  displayHeight |       | |
+ *                |       | |
+ *                |_______| |  X
+ *                   \ /    |
+ *    signal tape -  | |    |
+ *                          |
+ *                 <--------*
+ *                    Y     (0,0)
+ *
+ * @return
+ */
+static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(uint8_t *dataIn,
+                                                                   uint16_t windowWidthPx,
+                                                                   uint16_t windowHeightPx,
+                                                                   uint8_t *dataOut,
+                                                                   EinkDisplayColorMode_e invertColors);
 
 /**
-*  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the ED028TC1 display.
-*
-*  @note IT ROTATES only the 4Bpp image. It also makes sure that the image is black and white only
-*
-*  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the single pixel
-*  @param uint16_t x               [in]  - x coordinate of image in pixels
-*  @param uint16_t y               [in]  - y coordinate of image in pixels
-*  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
-*  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
-*  @param uint8_t* dataOut         [out] - the buffer for rotated image
-*  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
-*
-* @note Assumed dataIn coordinate system is the standard image coordinates system:
-*
-*   (0,0)   X
-*       *-------->
-*       |
-*     Y |
-*       |
-*       v
-*
-*
-* The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
-* way in its own coordinate system which is:
-*
-*              displayWidth
-*                 _______  ^
-*                |       | |
-*                |       | |
-*  displayHeight |       | |
-*                |       | |
-*                |_______| |  X
-*                   \ /    |
-*    signal tape -  | |    |
-*                          |
-*                 <--------*
-*                    Y     (0,0)
-*
-* @return
-*/
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(
-     uint8_t* dataIn,
-     uint16_t windowWidthPx,
-     uint16_t windowHeightPx,
-     uint8_t* dataOut,
-     EinkDisplayColorMode_e invertColors);
-
-
+ *  This function makes rotation of the image from the standard GUI coordinate system to the coord system used by the
+ * ED028TC1 display.
+ *
+ *  @note IT ROTATES only the 4Bpp image. It also makes sure that the image is black and white only
+ *
+ *  @param uint8_t* dataIn          [in]  - input image to be translated. Each byte of that array must represent the
+ * single pixel
+ *  @param uint16_t x               [in]  - x coordinate of image in pixels
+ *  @param uint16_t y               [in]  - y coordinate of image in pixels
+ *  @param uint16_t windowWidthPx   [in]  - width of the image in pixels
+ *  @param uint16_t windowHeightPx  [in]  - height of the image in pixels
+ *  @param uint8_t* dataOut         [out] - the buffer for rotated image
+ *  @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+ *
+ * @note Assumed dataIn coordinate system is the standard image coordinates system:
+ *
+ *   (0,0)   X
+ *       *-------->
+ *       |
+ *     Y |
+ *       |
+ *       v
+ *
+ *
+ * The result of the function is such a conversion of the dataIn array to make the Eink display show it the very same
+ * way in its own coordinate system which is:
+ *
+ *              displayWidth
+ *                 _______  ^
+ *                |       | |
+ *                |       | |
+ *  displayHeight |       | |
+ *                |       | |
+ *                |_______| |  X
+ *                   \ /    |
+ *    signal tape -  | |    |
+ *                          |
+ *                 <--------*
+ *                    Y     (0,0)
+ *
+ * @return
+ */
+static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(uint8_t *dataIn,
+                                                                   uint16_t windowWidthPx,
+                                                                   uint16_t windowHeightPx,
+                                                                   uint8_t *dataOut,
+                                                                   EinkDisplayColorMode_e invertColors);
 
 /* Function bodies */
 
 void EinkChangeDisplayUpdateTimings(EinkDisplayTimingsMode_e timingsMode)
 {
     char tmpbuf[4];
-    tmpbuf[0] = EinkTCONSetting;    //0x60
+    tmpbuf[0] = EinkTCONSetting; // 0x60
 
-    switch (timingsMode)
-    {
-        case EinkDisplayTimingsFastRefreshMode:
-        {
-            tmpbuf[1] = 0x10;
-            tmpbuf[2] = 0x08;
-            tmpbuf[3] = 0x08;
-        }break;
+    switch (timingsMode) {
+    case EinkDisplayTimingsFastRefreshMode: {
+        tmpbuf[1] = 0x10;
+        tmpbuf[2] = 0x08;
+        tmpbuf[3] = 0x08;
+    } break;
 
-        case EinkDisplayTimingsHighContrastMode:
-        {
-            tmpbuf[1] = 0x3F;
-            tmpbuf[2] = 0x09;
-            tmpbuf[3] = 0x2D;
-        }break;
+    case EinkDisplayTimingsHighContrastMode: {
+        tmpbuf[1] = 0x3F;
+        tmpbuf[2] = 0x09;
+        tmpbuf[3] = 0x2D;
+    } break;
 
-        case EinkDisplayTimingsDeepCleanMode:
-        {
-            tmpbuf[1] = 0x3F;
-            tmpbuf[2] = 0x09;
-            tmpbuf[3] = 0x50;
-        }break;
+    case EinkDisplayTimingsDeepCleanMode: {
+        tmpbuf[1] = 0x3F;
+        tmpbuf[2] = 0x09;
+        tmpbuf[3] = 0x50;
+    } break;
     }
 
-    if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Changing the display timings FAILED");
+    if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Changing the display timings FAILED");
         EinkResetAndInitialize();
         return;
     }
@@ -560,12 +550,10 @@ uint8_t EinkIsPoweredOn()
 
 void EinkPowerOn()
 {
-    if (!s_einkIsPoweredOn)
-    {
-        uint8_t cmd = EinkPowerON;    //0x04
-        if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_AUTOMATIC_CS) != 0)
-        {
-//            LOG_ERROR("Powering on the display FAILED");
+    if (!s_einkIsPoweredOn) {
+        uint8_t cmd = EinkPowerON; // 0x04
+        if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_AUTOMATIC_CS) != 0) {
+            //            LOG_ERROR("Powering on the display FAILED");
             EinkResetAndInitialize();
             return;
         }
@@ -577,12 +565,10 @@ void EinkPowerOn()
 
 void EinkPowerOff()
 {
-    if (s_einkIsPoweredOn)
-    {
-        uint8_t cmd = EinkPowerOFF;   //0x02
-        if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_AUTOMATIC_CS) != 0)
-        {
-//            LOG_ERROR("Powering off the display FAILED");
+    if (s_einkIsPoweredOn) {
+        uint8_t cmd = EinkPowerOFF; // 0x02
+        if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_AUTOMATIC_CS) != 0) {
+            //            LOG_ERROR("Powering off the display FAILED");
             EinkResetAndInitialize();
             return;
         }
@@ -592,9 +578,10 @@ void EinkPowerOff()
     }
 }
 
-void EinkPowerDown(void) {
-	EinkPowerOff();
-	BSP_EinkDeinit();
+void EinkPowerDown(void)
+{
+    EinkPowerOff();
+    BSP_EinkDeinit();
 }
 
 int16_t EinkGetTemperatureInternal()
@@ -606,9 +593,8 @@ int16_t EinkGetTemperatureInternal()
 
     BSP_EinkWriteCS(BSP_Eink_CS_Clr);
 
-    if (BSP_EinkWriteData(cmd, sizeof(cmd), SPI_MANUAL_CS) != 0)
-    {
-//        LOG_ERROR("Requesting the temperature FAILED");
+    if (BSP_EinkWriteData(cmd, sizeof(cmd), SPI_MANUAL_CS) != 0) {
+        //        LOG_ERROR("Requesting the temperature FAILED");
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
         EinkResetAndInitialize();
         return -1;
@@ -616,9 +602,8 @@ int16_t EinkGetTemperatureInternal()
 
     EINK_SUSPEND_TASK_TILL_EPD_BUSY();
 
-    if (BSP_EinkReadData(temp, sizeof(temp), SPI_MANUAL_CS) != 0)
-    {
-//        LOG_ERROR("Requesting the temperature FAILED");
+    if (BSP_EinkReadData(temp, sizeof(temp), SPI_MANUAL_CS) != 0) {
+        //        LOG_ERROR("Requesting the temperature FAILED");
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
         EinkResetAndInitialize();
         return -1;
@@ -627,9 +612,10 @@ int16_t EinkGetTemperatureInternal()
     BSP_EinkWriteCS(BSP_Eink_CS_Set);
 
     // First byte of the temp describes the integer part of the temperature in degrees Celsius
-    int8_t temperatureInteger  =    temp[0];
-    // The MSB bit of the second byte describes the fraction of the temperature. Bit value of 1 means .5 degree Celsius, bit value of 0 means .0 degree Celsius
-    //int8_t temperatureFraction =    ((temp[1] & 0x80) >> 7);
+    int8_t temperatureInteger = temp[0];
+    // The MSB bit of the second byte describes the fraction of the temperature. Bit value of 1 means .5 degree Celsius,
+    // bit value of 0 means .0 degree Celsius
+    // int8_t temperatureFraction =    ((temp[1] & 0x80) >> 7);
 
     return temperatureInteger;
 }
@@ -640,137 +626,125 @@ static void s_EinkSetGateOrder()
 
     // Set the order of gate refreshing
     buf[0] = EinkGDOrderSetting;
-    buf[1] = 0x02;  // Magic value required by the ED028TC1 display manufacturer
+    buf[1] = 0x02; // Magic value required by the ED028TC1 display manufacturer
     buf[2] = 0x00;
-   if ( BSP_EinkWriteData(buf, 3, SPI_AUTOMATIC_CS) != 0)
-   {
-//       LOG_ERROR("Setting the gate order for the Eink failed");
-       EinkResetAndInitialize();
-       return;
-   }
-
+    if (BSP_EinkWriteData(buf, 3, SPI_AUTOMATIC_CS) != 0) {
+        //       LOG_ERROR("Setting the gate order for the Eink failed");
+        EinkResetAndInitialize();
+        return;
+    }
 }
 
 static void s_EinkSetInitialConfig()
 {
-    //send initialization data
+    // send initialization data
     unsigned char tmpbuf[10];
 
-     tmpbuf[0] = EinkPowerSetting;   //0x01
-     tmpbuf[1] = 0x03;
-     tmpbuf[2] = 0x04;
-     tmpbuf[3] = 0x00; // 0x06
-     tmpbuf[4] = 0x00;
-     if (BSP_EinkWriteData(tmpbuf, 5, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkPowerSetting; // 0x01
+    tmpbuf[1] = 0x03;
+    tmpbuf[2] = 0x04;
+    tmpbuf[3] = 0x00; // 0x06
+    tmpbuf[4] = 0x00;
+    if (BSP_EinkWriteData(tmpbuf, 5, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkPanelSetting;   //0x00
-     tmpbuf[1] = LUT_SEL | SHL | RST_N;   //0x25 -> _XON _RES0 LUT_SEL _DM - SHL _SPIWM RST_N // If 0x35 (DM - 1 is used (2bpp)) the SPI speed can be 25MHz
-     tmpbuf[2] = 0x00;
-     if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkPanelSetting;      // 0x00
+    tmpbuf[1] = LUT_SEL | SHL | RST_N; // 0x25 -> _XON _RES0 LUT_SEL _DM - SHL _SPIWM RST_N // If 0x35 (DM - 1 is used
+                                       // (2bpp)) the SPI speed can be 25MHz
+    tmpbuf[2] = 0x00;
+    if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkPowerSaving;   //0x26
-     tmpbuf[1] = 0x82;    //B2
-     if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkPowerSaving; // 0x26
+    tmpbuf[1] = 0x82;            // B2
+    if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkPowerOFFSequenceSetting;    //0x03
-     tmpbuf[1] = 0x01;//0x00;//0x03;
-     if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkPowerOFFSequenceSetting; // 0x03
+    tmpbuf[1] = 0x01;                        // 0x00;//0x03;
+    if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkBoosterSoftStart;   //0x07
-     tmpbuf[1] = (EPD_BOOSTER_OFF_TIME_GDR_6_58uS << EPD_BOOSTER_OFF_TIME_GDR_POS    ) |
-                 (EPD_BOOSTER_DRIVING_STRENGTH_6  << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
-                 (EPD_BOOSTER_START_PERIOD_10MS   << EPD_BOOSTER_START_PERIOD_POS    );
+    tmpbuf[0] = EinkBoosterSoftStart; // 0x07
+    tmpbuf[1] = (EPD_BOOSTER_OFF_TIME_GDR_6_58uS << EPD_BOOSTER_OFF_TIME_GDR_POS) |
+                (EPD_BOOSTER_DRIVING_STRENGTH_6 << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
+                (EPD_BOOSTER_START_PERIOD_10MS << EPD_BOOSTER_START_PERIOD_POS);
 
-     tmpbuf[2] = (EPD_BOOSTER_OFF_TIME_GDR_6_58uS << EPD_BOOSTER_OFF_TIME_GDR_POS    ) |
-                 (EPD_BOOSTER_DRIVING_STRENGTH_6  << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
-                 (EPD_BOOSTER_START_PERIOD_10MS   << EPD_BOOSTER_START_PERIOD_POS    );
+    tmpbuf[2] = (EPD_BOOSTER_OFF_TIME_GDR_6_58uS << EPD_BOOSTER_OFF_TIME_GDR_POS) |
+                (EPD_BOOSTER_DRIVING_STRENGTH_6 << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
+                (EPD_BOOSTER_START_PERIOD_10MS << EPD_BOOSTER_START_PERIOD_POS);
 
-     tmpbuf[3] = (EPD_BOOSTER_OFF_TIME_GDR_0_40uS << EPD_BOOSTER_OFF_TIME_GDR_POS    ) |
-                 (EPD_BOOSTER_DRIVING_STRENGTH_7  << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
-                 (EPD_BOOSTER_START_PERIOD_10MS   << EPD_BOOSTER_START_PERIOD_POS    );
-     if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[3] = (EPD_BOOSTER_OFF_TIME_GDR_0_40uS << EPD_BOOSTER_OFF_TIME_GDR_POS) |
+                (EPD_BOOSTER_DRIVING_STRENGTH_7 << EPD_BOOSTER_DRIVING_STRENGTH_POS) |
+                (EPD_BOOSTER_START_PERIOD_10MS << EPD_BOOSTER_START_PERIOD_POS);
+    if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkPLLControl;     //0x30
-     tmpbuf[1] = 0x0E;
-     if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkPLLControl; // 0x30
+    tmpbuf[1] = 0x0E;
+    if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkTemperatureSensorSelection;   //Temp. sensor setting TSE
-     tmpbuf[1] = EINK_TEMPERATURE_SENSOR_USE_INTERNAL | 0x00;                       // Temperature offset
-     tmpbuf[2] = 0x00;                             // Host forced temperature value
-     if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkTemperatureSensorSelection;              // Temp. sensor setting TSE
+    tmpbuf[1] = EINK_TEMPERATURE_SENSOR_USE_INTERNAL | 0x00; // Temperature offset
+    tmpbuf[2] = 0x00;                                        // Host forced temperature value
+    if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkVcomAndDataIntervalSetting; //0x50
-     tmpbuf[1] = DDX; //0x01;   // 0x0D
-     tmpbuf[2] = 0x00;//0x22;
-     if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkVcomAndDataIntervalSetting; // 0x50
+    tmpbuf[1] = DDX;                            // 0x01;   // 0x0D
+    tmpbuf[2] = 0x00;                           // 0x22;
+    if (BSP_EinkWriteData(tmpbuf, 3, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkTCONSetting;    //0x60
-     tmpbuf[1] = 0x3F;
-     tmpbuf[2] = 0x09;
-     tmpbuf[3] = 0x2D;
-     if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkTCONSetting; // 0x60
+    tmpbuf[1] = 0x3F;
+    tmpbuf[2] = 0x09;
+    tmpbuf[3] = 0x2D;
+    if (BSP_EinkWriteData(tmpbuf, 4, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkResolutionSetting;  //0x61
-     tmpbuf[1] = 0x02;    //0x02
-     tmpbuf[2] = 0x60;    //0x60
-     tmpbuf[3] = 0x01;    //0x01
-     tmpbuf[4] = 0xE0;    //0xE0
-     if (BSP_EinkWriteData(tmpbuf, 5, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkResolutionSetting; // 0x61
+    tmpbuf[1] = 0x02;                  // 0x02
+    tmpbuf[2] = 0x60;                  // 0x60
+    tmpbuf[3] = 0x01;                  // 0x01
+    tmpbuf[4] = 0xE0;                  // 0xE0
+    if (BSP_EinkWriteData(tmpbuf, 5, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-     tmpbuf[0] = EinkVCM_DCSetting;  //0x82
-     tmpbuf[1] = 0x30;
-     if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0)
-     {
-//         LOG_ERROR("Setting the initial configuration for the Eink failed");
-         return;
-     }
+    tmpbuf[0] = EinkVCM_DCSetting; // 0x82
+    tmpbuf[1] = 0x30;
+    if (BSP_EinkWriteData(tmpbuf, 2, SPI_AUTOMATIC_CS) != 0) {
+        //         LOG_ERROR("Setting the initial configuration for the Eink failed");
+        return;
+    }
 
-//     LOG_DEBUG("Eink Display configured");
+    //     LOG_DEBUG("Eink Display configured");
 }
 
 EinkStatus_e EinkResetAndInitialize()
 {
-//    LOG_INFO("Resetting the SPI peripheral, Eink display and setting init configuration");
+    //    LOG_INFO("Resetting the SPI peripheral, Eink display and setting init configuration");
     // Initialize the synchronization resources, SPI and GPIOs for the Eink BSP
     BSP_EinkInit(NULL);
     // Reset the display
@@ -783,24 +757,20 @@ EinkStatus_e EinkResetAndInitialize()
     return EinkOK;
 }
 
-EinkStatus_e EinkUpdateWaveform( const EinkWaveFormSettings_t* settings )
+EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t *settings)
 {
     // If neither the temperature nor the waveform has changed - do nothing
-    if ((settings->temperature == s_einkPreviousTemperature) &&
-        (settings->mode == s_einkConfiguredWaveform))
-    {
+    if ((settings->temperature == s_einkPreviousTemperature) && (settings->mode == s_einkConfiguredWaveform)) {
         return EinkOK;
     }
 
-    if (BSP_EinkWriteData(settings->LUTDData, settings->LUTDSize, SPI_AUTOMATIC_CS) != 0)
-    {
+    if (BSP_EinkWriteData(settings->LUTDData, settings->LUTDSize, SPI_AUTOMATIC_CS) != 0) {
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
 
-    ///LUTC
-    if (BSP_EinkWriteData(settings->LUTCData, settings->LUTCSize + 1, SPI_AUTOMATIC_CS) != 0)
-    {
+    /// LUTC
+    if (BSP_EinkWriteData(settings->LUTCData, settings->LUTCSize + 1, SPI_AUTOMATIC_CS) != 0) {
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
@@ -810,25 +780,22 @@ EinkStatus_e EinkUpdateWaveform( const EinkWaveFormSettings_t* settings )
     return EinkOK;
 }
 
-static EinkStatus_e
-s_EinkReadFlagsRegister(uint16_t* flags)
+static EinkStatus_e s_EinkReadFlagsRegister(uint16_t *flags)
 {
     uint8_t cmd = EinkFLG;
 
     BSP_EinkWriteCS(BSP_Eink_CS_Clr);
 
-    if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_MANUAL_CS) != 0)
-    {
+    if (BSP_EinkWriteData(&cmd, sizeof(cmd), SPI_MANUAL_CS) != 0) {
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
-//        LOG_ERROR("Eink: request for the temperature failed");
+        //        LOG_ERROR("Eink: request for the temperature failed");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
 
-    if (BSP_EinkReadData(flags, sizeof(uint16_t), SPI_MANUAL_CS) != 0)
-    {
+    if (BSP_EinkReadData(flags, sizeof(uint16_t), SPI_MANUAL_CS) != 0) {
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
-//        LOG_ERROR("Eink: request for the temperature failed");
+        //        LOG_ERROR("Eink: request for the temperature failed");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
@@ -838,15 +805,13 @@ s_EinkReadFlagsRegister(uint16_t* flags)
     return EinkOK;
 }
 
-EinkStatus_e
-EinkWaitTillPipelineBusy()
+EinkStatus_e EinkWaitTillPipelineBusy()
 {
     uint16_t flags = 0;
 
     s_EinkReadFlagsRegister(&flags);
 
-    while((flags & EINK_FLAG_PIPELINE_BUSY))
-    {
+    while ((flags & EINK_FLAG_PIPELINE_BUSY)) {
         vTaskDelay(pdMS_TO_TICKS(1));
         s_EinkReadFlagsRegister(&flags);
     }
@@ -854,14 +819,12 @@ EinkWaitTillPipelineBusy()
     return EinkOK;
 }
 
-EinkStatus_e
-EinkDitherDisplay()
+EinkStatus_e EinkDitherDisplay()
 {
     uint8_t cmdWithArgs[2] = {EinkDPC, EINK_DITHER_4BPP_MODE | EINK_DITHER_START};
 
-    if (BSP_EinkWriteData(cmdWithArgs, sizeof(cmdWithArgs), SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Eink: dithering the display failed");
+    if (BSP_EinkWriteData(cmdWithArgs, sizeof(cmdWithArgs), SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Eink: dithering the display failed");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
@@ -871,8 +834,7 @@ EinkDitherDisplay()
     s_EinkReadFlagsRegister(&flags);
 
     // Wait for the dither operation finish
-    while (flags & EINK_FLAG_DITHER_IN_PROGRESS)
-    {
+    while (flags & EINK_FLAG_DITHER_IN_PROGRESS) {
         vTaskDelay(pdMS_TO_TICKS(1));
         s_EinkReadFlagsRegister(&flags);
     }
@@ -880,111 +842,99 @@ EinkDitherDisplay()
     return EinkOK;
 }
 
-EinkStatus_e
-EinkUpdateFrame ( uint16_t X,
-                  uint16_t Y,
-                  uint16_t W,
-                  uint16_t H,
-                  uint8_t *buffer,
-                  EinkBpp_e bpp,
-                  EinkDisplayColorMode_e invertColors)
+EinkStatus_e EinkUpdateFrame(
+    uint16_t X, uint16_t Y, uint16_t W, uint16_t H, uint8_t *buffer, EinkBpp_e bpp, EinkDisplayColorMode_e invertColors)
 {
     uint8_t buf[10];
-    uint8_t pixelsInByte = 8/bpp;
+    uint8_t pixelsInByte = 8 / bpp;
 
     s_einkServiceRotatedBuf[0] = EinkDataStartTransmission1;
-    s_einkServiceRotatedBuf[1] = bpp - 1;    //  0 - 1Bpp, 1 - 2Bpp, 2 - 3Bpp, 3 - 4Bpp
+    s_einkServiceRotatedBuf[1] = bpp - 1; //  0 - 1Bpp, 1 - 2Bpp, 2 - 3Bpp, 3 - 4Bpp
 
-    if ((s_einkConfiguredWaveform == EinkWaveformA2) ||
-        (s_einkConfiguredWaveform == EinkWaveformDU2))
-    {
-        switch (bpp)
-        {
-            case Eink1Bpp:
-            {
-                s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+    if ((s_einkConfiguredWaveform == EinkWaveformA2) || (s_einkConfiguredWaveform == EinkWaveformDU2)) {
+        switch (bpp) {
+        case Eink1Bpp: {
+            s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink2Bpp:
-            {
-                s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink2Bpp: {
+            s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink3Bpp:
-            {
-                s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink3Bpp: {
+            s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink4Bpp:
-            {
-                s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink4Bpp: {
+            s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
         }
     }
-    else
-    {
-        switch (bpp)
-        {
-            case Eink1Bpp:
-            {
-                s_EinkTransformFrameCoordinateSystem_1Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+    else {
+        switch (bpp) {
+        case Eink1Bpp: {
+            s_EinkTransformFrameCoordinateSystem_1Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink2Bpp:
-            {
-                s_EinkTransformFrameCoordinateSystem_2Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink2Bpp: {
+            s_EinkTransformFrameCoordinateSystem_2Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink3Bpp:
-            {
-                s_EinkTransformFrameCoordinateSystem_3Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink3Bpp: {
+            s_EinkTransformFrameCoordinateSystem_3Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
 
-            case Eink4Bpp:
-            {
-                s_EinkTransformFrameCoordinateSystem_4Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
-            }break;
+        case Eink4Bpp: {
+            s_EinkTransformFrameCoordinateSystem_4Bpp(buffer, W, H, s_einkServiceRotatedBuf + 2, invertColors);
+        } break;
         }
     }
 
-    buf[0] = EinkDataStartTransmissionWindow;		        //set display window
-    buf[1] = (uint8_t) ((BOARD_EINK_DISPLAY_RES_Y - Y - H) >> 8);      //MSB of the X axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[2] = (uint8_t) BOARD_EINK_DISPLAY_RES_Y - Y - H;			    //LSB of the X axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[3] = (uint8_t) ((BOARD_EINK_DISPLAY_RES_X - X - W) >> 8);      //MSB of the Y axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[4] = (uint8_t) BOARD_EINK_DISPLAY_RES_X - X - W;			    //LSB of the Y axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[5] = (uint8_t) (H >> 8);                            //MSB of the window height in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[6] = (uint8_t) H;			                        //LSB of the window height in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[7] = (uint8_t) (W >> 8);                            //MSB of the window width in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[8] = (uint8_t) W;			                        //LSB of the window width in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
+    buf[0] = EinkDataStartTransmissionWindow; // set display window
+    buf[1] =
+        (uint8_t)((BOARD_EINK_DISPLAY_RES_Y - Y - H) >> 8); // MSB of the X axis in the EPD display. Value converted
+                                                            // from the standard GUI coords system to the ED028TC1 one
+    buf[2] = (uint8_t)BOARD_EINK_DISPLAY_RES_Y - Y - H; // LSB of the X axis in the EPD display. Value converted from
+                                                        // the standard GUI coords system to the ED028TC1 one
+    buf[3] =
+        (uint8_t)((BOARD_EINK_DISPLAY_RES_X - X - W) >> 8); // MSB of the Y axis in the EPD display. Value converted
+                                                            // from the standard GUI coords system to the ED028TC1 one
+    buf[4] = (uint8_t)BOARD_EINK_DISPLAY_RES_X - X - W; // LSB of the Y axis in the EPD display. Value converted from
+                                                        // the standard GUI coords system to the ED028TC1 one
+    buf[5] = (uint8_t)(H >> 8); // MSB of the window height in the EPD display. Value converted from the standard GUI
+                                // coords system to the ED028TC1 one
+    buf[6] = (uint8_t)H; // LSB of the window height in the EPD display. Value converted from the standard GUI coords
+                         // system to the ED028TC1 one
+    buf[7] = (uint8_t)(W >> 8); // MSB of the window width in the EPD display. Value converted from the standard GUI
+                                // coords system to the ED028TC1 one
+    buf[8] = (uint8_t)W; // LSB of the window width in the EPD display. Value converted from the standard GUI coords
+                         // system to the ED028TC1 one
 
-    if (BSP_EinkWriteData(buf, 9, SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the display update header FAILED");
+    if (BSP_EinkWriteData(buf, 9, SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the display update header FAILED");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
 
-    uint32_t msgSize = 2 + ((uint32_t)W * (uint32_t)H / pixelsInByte); // command (1 byte) + bpp (1 byte) + dataSize(W*H/pixelsInByte bytes)
+    uint32_t msgSize = 2 + ((uint32_t)W * (uint32_t)H /
+                            pixelsInByte); // command (1 byte) + bpp (1 byte) + dataSize(W*H/pixelsInByte bytes)
     // Send the part of the image to the display memory
 
-
-    if (BSP_EinkWriteData(s_einkServiceRotatedBuf, msgSize, SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the display update image FAILED");
+    if (BSP_EinkWriteData(s_einkServiceRotatedBuf, msgSize, SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the display update image FAILED");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
 
-    return(EinkOK);
+    return (EinkOK);
 }
 
-EinkStatus_e
-EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill)
+EinkStatus_e EinkFillScreenWithColor(EinkDisplayColorFilling_e colorFill)
 {
     uint8_t buf[10];
 
     // Set the window to the entire screen
-    buf[0] = EinkDataStartTransmissionWindow;    //0x83
+    buf[0] = EinkDataStartTransmissionWindow; // 0x83
     buf[1] = 0x00;
     buf[2] = 0x00;
     buf[3] = 0x00;
@@ -994,20 +944,18 @@ EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill)
     buf[7] = (BOARD_EINK_DISPLAY_RES_X & 0xFF00) >> 8;
     buf[8] = BOARD_EINK_DISPLAY_RES_X & 0x00FF;
 
-    if (BSP_EinkWriteData(buf, 9, SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the display update header FAILED");
+    if (BSP_EinkWriteData(buf, 9, SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the display update header FAILED");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
 
     BSP_EinkWriteCS(BSP_Eink_CS_Clr);
 
-    buf[0] = EinkDataStartTransmission1;    //0x10
+    buf[0] = EinkDataStartTransmission1; // 0x10
     buf[1] = Eink1Bpp - 1;
-    if (BSP_EinkWriteData(buf, 2, SPI_MANUAL_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the display update image FAILED");
+    if (BSP_EinkWriteData(buf, 2, SPI_MANUAL_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the display update image FAILED");
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
         EinkResetAndInitialize();
         return EinkSPIErr;
@@ -1015,18 +963,16 @@ EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill)
 
     uint8_t background = colorFill;
 
-    char* bg = (char*)malloc(BOARD_EINK_DISPLAY_RES_Y * BOARD_EINK_DISPLAY_RES_X / 8);
-    if (bg == NULL)
-    {
-//        LOG_ERROR("Could not create the buffer for the background plane");
+    char *bg = (char *)malloc(BOARD_EINK_DISPLAY_RES_Y * BOARD_EINK_DISPLAY_RES_X / 8);
+    if (bg == NULL) {
+        //        LOG_ERROR("Could not create the buffer for the background plane");
         return EinkNoMem;
     }
 
     memset(bg, background, BOARD_EINK_DISPLAY_RES_Y * BOARD_EINK_DISPLAY_RES_X / 8);
 
-    if (BSP_EinkWriteData(bg, BOARD_EINK_DISPLAY_RES_Y * BOARD_EINK_DISPLAY_RES_X / 8, SPI_MANUAL_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the display update image FAILED");
+    if (BSP_EinkWriteData(bg, BOARD_EINK_DISPLAY_RES_Y * BOARD_EINK_DISPLAY_RES_X / 8, SPI_MANUAL_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the display update image FAILED");
         free(bg);
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
         EinkResetAndInitialize();
@@ -1036,13 +982,13 @@ EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill)
     BSP_EinkWriteCS(BSP_Eink_CS_Set);
 
     free(bg);
-    EinkRefreshImage(0,0, BOARD_EINK_DISPLAY_RES_X, BOARD_EINK_DISPLAY_RES_Y, EinkDisplayTimingsDeepCleanMode);
+    EinkRefreshImage(0, 0, BOARD_EINK_DISPLAY_RES_X, BOARD_EINK_DISPLAY_RES_Y, EinkDisplayTimingsDeepCleanMode);
 
     return EinkOK;
 }
 
-EinkStatus_e
-EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode)
+EinkStatus_e EinkRefreshImage(
+    uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode)
 {
     EinkChangeDisplayUpdateTimings(refreshTimingsMode);
 
@@ -1053,18 +999,27 @@ EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTim
     buf[0] = EinkDisplayRefresh;
     buf[1] = UPD_CPY_TO_PRE;
 
-    buf[2] = (uint8_t) ((BOARD_EINK_DISPLAY_RES_Y - Y - H) >> 8);      //MSB of the X axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[3] = (uint8_t) BOARD_EINK_DISPLAY_RES_Y - Y - H;               //LSB of the X axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[4] = (uint8_t) ((BOARD_EINK_DISPLAY_RES_X - X - W) >> 8);      //MSB of the Y axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[5] = (uint8_t) BOARD_EINK_DISPLAY_RES_X - X - W;               //LSB of the Y axis in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[6] = (uint8_t) (H >> 8);                            //MSB of the window height in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[7] = (uint8_t) H;                                   //LSB of the window height in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[8] = (uint8_t) (W >> 8);                            //MSB of the window width in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
-    buf[9] = (uint8_t) W;                                   //LSB of the window width in the EPD display. Value converted from the standard GUI coords system to the ED028TC1 one
+    buf[2] =
+        (uint8_t)((BOARD_EINK_DISPLAY_RES_Y - Y - H) >> 8); // MSB of the X axis in the EPD display. Value converted
+                                                            // from the standard GUI coords system to the ED028TC1 one
+    buf[3] = (uint8_t)BOARD_EINK_DISPLAY_RES_Y - Y - H; // LSB of the X axis in the EPD display. Value converted from
+                                                        // the standard GUI coords system to the ED028TC1 one
+    buf[4] =
+        (uint8_t)((BOARD_EINK_DISPLAY_RES_X - X - W) >> 8); // MSB of the Y axis in the EPD display. Value converted
+                                                            // from the standard GUI coords system to the ED028TC1 one
+    buf[5] = (uint8_t)BOARD_EINK_DISPLAY_RES_X - X - W; // LSB of the Y axis in the EPD display. Value converted from
+                                                        // the standard GUI coords system to the ED028TC1 one
+    buf[6] = (uint8_t)(H >> 8); // MSB of the window height in the EPD display. Value converted from the standard GUI
+                                // coords system to the ED028TC1 one
+    buf[7] = (uint8_t)H; // LSB of the window height in the EPD display. Value converted from the standard GUI coords
+                         // system to the ED028TC1 one
+    buf[8] = (uint8_t)(W >> 8); // MSB of the window width in the EPD display. Value converted from the standard GUI
+                                // coords system to the ED028TC1 one
+    buf[9] = (uint8_t)W; // LSB of the window width in the EPD display. Value converted from the standard GUI coords
+                         // system to the ED028TC1 one
 
-    if (BSP_EinkWriteData(buf, sizeof(buf), SPI_AUTOMATIC_CS) != 0)
-    {
-//        LOG_ERROR("Eink: transmitting the refresh request image FAILED");
+    if (BSP_EinkWriteData(buf, sizeof(buf), SPI_AUTOMATIC_CS) != 0) {
+        //        LOG_ERROR("Eink: transmitting the refresh request image FAILED");
         EinkResetAndInitialize();
         return EinkSPIErr;
     }
@@ -1074,27 +1029,29 @@ EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTim
     return EinkOK;
 }
 
-__attribute__((optimize("O3")))
-void EinkARGBToLuminance(uint8_t *dataIn, uint8_t* dataOut, uint32_t displayWidth, uint32_t displayHeight)
+__attribute__((optimize("O3"))) void EinkARGBToLuminance(uint8_t *dataIn,
+                                                         uint8_t *dataOut,
+                                                         uint32_t displayWidth,
+                                                         uint32_t displayHeight)
 {
-//    uint32_t i, j;
+    //    uint32_t i, j;
     uint8_t r, g, b;
     float fi;
     uint32_t *src;
     uint8_t *dst;
 
-    src = (uint32_t*)dataIn;
-    dst = (uint8_t*)dataOut;
+    src = (uint32_t *)dataIn;
+    dst = (uint8_t *)dataOut;
 
-    for (uint32_t i=0; i<(displayWidth*displayHeight); i+=2)   //increase by 8 pixels - 32bit word is 8 pixels in 4BPP
+    for (uint32_t i = 0; i < (displayWidth * displayHeight);
+         i += 2) // increase by 8 pixels - 32bit word is 8 pixels in 4BPP
     {
         *dst = 0x00000000;
-        for (uint8_t j=0; j<8; j+=4)
-        {
-            r = (uint8_t)((*(src)) >> 16);
-            g = (uint8_t)((*(src)) >> 8);
-            b = (uint8_t)*(src);
-            fi = (r + g + b)/3;
+        for (uint8_t j = 0; j < 8; j += 4) {
+            r  = (uint8_t)((*(src)) >> 16);
+            g  = (uint8_t)((*(src)) >> 8);
+            b  = (uint8_t) * (src);
+            fi = (r + g + b) / 3;
 
             *dst |= ((uint32_t)(floor(fi / 16))) << (4 - j);
 
@@ -1104,28 +1061,26 @@ void EinkARGBToLuminance(uint8_t *dataIn, uint8_t* dataOut, uint32_t displayWidt
     }
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformFrameCoordinateSystem_1Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformFrameCoordinateSystem_1Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // In 1bpp mode there are 8 pixels in the byte
     const uint8_t pixelsInByte = 8;
 
-    uint8_t pixels = 0;
-    uint8_t* outArray = dataOut;
+    uint8_t pixels    = 0;
+    uint8_t *outArray = dataOut;
 
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time.
-            uint32_t index =  inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
+            uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
             // Use the LUT to convert the input pixel from 4bpp to 1bpp
             uint8_t firstPixel   = s_einkMaskLut_1Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]];
@@ -1138,11 +1093,10 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_1Bpp(
             uint8_t eightPixel   = s_einkMaskLut_1Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]];
 
             // Put the pixels in order: Most left positioned pixel at the most significant side of byte
-            pixels =    (firstPixel << 7) | (secondPixel << 6) | (thirdPixel   << 5) | (fourthPixel << 4) |
-                        (fifthPixel << 3) | (sixthPixel  << 2) | (seventhPixel << 1) | (eightPixel  << 0);
+            pixels = (firstPixel << 7) | (secondPixel << 6) | (thirdPixel << 5) | (fourthPixel << 4) |
+                     (fifthPixel << 3) | (sixthPixel << 2) | (seventhPixel << 1) | (eightPixel << 0);
 
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1154,49 +1108,46 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_1Bpp(
     return dataOut;
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformFrameCoordinateSystem_2Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformFrameCoordinateSystem_2Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // In 2bpp mode there are 4 pixels in the byte
     const uint8_t pixelsInByte = 8;
-    uint16_t pixels = 0;
-    uint16_t* outArray = (uint16_t*)dataOut;
-    uint8_t temp = 0;
+    uint16_t pixels            = 0;
+    uint16_t *outArray         = (uint16_t *)dataOut;
+    uint8_t temp               = 0;
 
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time.
             uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
             // Use the LUT to convert the input pixel from 4bpp to 2bpp and put 4 pixels in single byte
-            temp =  ( s_einkMaskLut_2Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]] << 6);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X]] << 4);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X]] << 2);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X]] << 0);
+            temp = (s_einkMaskLut_2Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]] << 6);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X]] << 4);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X]] << 2);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X]] << 0);
 
             // Push the 4 pixels into the proper place in the uint16_t
             pixels = temp << 0;
 
             // Use the LUT to convert the input pixel from 4bpp to 2bpp and put 4 pixels in single byte
-            temp =  ( s_einkMaskLut_2Bpp[dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X]] << 6);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X]] << 4);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X]] << 2);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]] << 0);
+            temp = (s_einkMaskLut_2Bpp[dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X]] << 6);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X]] << 4);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X]] << 2);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]] << 0);
 
             // Push the 4 pixels into the proper place in the uint16_t
             pixels |= temp << 8;
 
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1208,52 +1159,53 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_2Bpp(
     return dataOut;
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformFrameCoordinateSystem_3Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformFrameCoordinateSystem_3Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // The 4bpp is coded the same way as the 3bpp
     return s_EinkTransformFrameCoordinateSystem_4Bpp(dataIn, windowWidthPx, windowHeightPx, dataOut, invertColors);
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformFrameCoordinateSystem_4Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformFrameCoordinateSystem_4Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
-    // In 3bpp and 4bpp modes there are 2 pixels in the byte. Using 8bpp to process the whole uint32_t at once for faster execution
+    // In 3bpp and 4bpp modes there are 2 pixels in the byte. Using 8bpp to process the whole uint32_t at once for
+    // faster execution
     const uint8_t pixelsInByte = 8;
 
-    uint32_t pixels = 0;
-    uint32_t* outArray = (uint32_t*)dataOut;
+    uint32_t pixels    = 0;
+    uint32_t *outArray = (uint32_t *)dataOut;
 
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time. Using 8 pixels at a time for better performance
             uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
             // Get 4x 2 adjacent pixels to process them as uint32_t for better execution timings
-            uint8_t firstPixel   = (dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t thirdPixel   = (dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t fifthPixel   = (dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t seventhPixel = (dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t firstPixel =
+                (dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t thirdPixel =
+                (dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t fifthPixel =
+                (dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t seventhPixel =
+                (dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X];
 
             // Put the pixels in the uint32_t for faster processing
             pixels = firstPixel | (thirdPixel << 8) | (fifthPixel << 16) | (seventhPixel << 24);
 
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1266,28 +1218,26 @@ static uint8_t* s_EinkTransformFrameCoordinateSystem_4Bpp(
     return dataOut;
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // In 1bpp mode there are 8 pixels in the byte
     const uint8_t pixelsInByte = 8;
-    uint8_t pixels = 0;
-    uint8_t* outArray = dataOut;
+    uint8_t pixels             = 0;
+    uint8_t *outArray          = dataOut;
 
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time.
 
-            uint32_t index =  inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
+            uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
             // Use the LUT to convert the input pixel from 4bpp to 1bpp
             uint8_t firstPixel   = s_einkMaskLut_1Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]];
@@ -1300,11 +1250,10 @@ static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(
             uint8_t eightPixel   = s_einkMaskLut_1Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]];
 
             // Put the pixels in order: Most left positioned pixel at the most significant side of byte
-            pixels =    (firstPixel << 7) | (secondPixel << 6) | (thirdPixel   << 5) | (fourthPixel << 4) |
-                        (fifthPixel << 3) | (sixthPixel  << 2) | (seventhPixel << 1) | (eightPixel  << 0);
+            pixels = (firstPixel << 7) | (secondPixel << 6) | (thirdPixel << 5) | (fourthPixel << 4) |
+                     (fifthPixel << 3) | (sixthPixel << 2) | (seventhPixel << 1) | (eightPixel << 0);
 
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1316,47 +1265,44 @@ static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_1Bpp(
     return dataOut;
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // In 2bpp mode there are 4 pixels in the byte
     const uint8_t pixelsInByte = 8;
-    uint16_t pixels = 0;
-    uint16_t* outArray = (uint16_t*)dataOut;
-    uint8_t temp = 0;
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    uint16_t pixels            = 0;
+    uint16_t *outArray         = (uint16_t *)dataOut;
+    uint8_t temp               = 0;
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time.
             uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
             // Use the LUT to convert the input pixel from 4bpp to 2bpp and put 4 pixels in single byte
-            temp =  ( s_einkMaskLut_2Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]] << 6);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X]] << 4);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X]] << 2);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X]] << 0);
+            temp = (s_einkMaskLut_2Bpp[dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X]] << 6);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X]] << 4);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X]] << 2);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X]] << 0);
 
             // Use the LUT to binarize the 2bpp pixels value and push them into the proper place in the uint16_t
             pixels = einkBinarizationLUT_2bpp[temp] << 0;
 
             // Use the LUT to convert the input pixel from 4bpp to 2bpp and put 4 pixels in single byte
-            temp =  ( s_einkMaskLut_2Bpp[dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X]] << 6);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X]] << 4);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X]] << 2);
-            temp |= ( s_einkMaskLut_2Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]] << 0);
+            temp = (s_einkMaskLut_2Bpp[dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X]] << 6);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X]] << 4);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X]] << 2);
+            temp |= (s_einkMaskLut_2Bpp[dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X]] << 0);
 
             // Use the LUT to binarize the 2bpp pixels value and push them into the proper place in the uint16_t
             pixels |= einkBinarizationLUT_2bpp[temp] << 8;
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1368,51 +1314,53 @@ static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_2Bpp(
     return dataOut;
 }
 
-__attribute__((optimize("O3")))
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O3"))) static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_3Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
     // The 4bpp is coded the same way as the 3bpp
-    return s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(dataIn, windowWidthPx, windowHeightPx, dataOut, invertColors);
+    return s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(
+        dataIn, windowWidthPx, windowHeightPx, dataOut, invertColors);
 }
 
-__attribute__((optimize("O1")))
-static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(
-        uint8_t* dataIn,
-        uint16_t windowWidthPx,
-        uint16_t windowHeightPx,
-        uint8_t* dataOut,
-        EinkDisplayColorMode_e invertColors)
+__attribute__((optimize("O1"))) static uint8_t *s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(
+    uint8_t *dataIn,
+    uint16_t windowWidthPx,
+    uint16_t windowHeightPx,
+    uint8_t *dataOut,
+    EinkDisplayColorMode_e invertColors)
 {
-    // In 3bpp and 4bpp modes there are 2 pixels in the byte. Using 8bpp to process the whole uint32_t at once for faster execution
+    // In 3bpp and 4bpp modes there are 2 pixels in the byte. Using 8bpp to process the whole uint32_t at once for
+    // faster execution
     const uint8_t pixelsInByte = 8;
 
-    uint32_t pixels = 0;
-    uint32_t* outArray = (uint32_t*)dataOut;
+    uint32_t pixels    = 0;
+    uint32_t *outArray = (uint32_t *)dataOut;
 
-    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol)
-    {
-        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte)
-        {
-            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better performance.
+    for (int32_t inputCol = windowWidthPx - 1; inputCol >= 0; --inputCol) {
+        for (int32_t inputRow = windowHeightPx - 1; inputRow >= 7; inputRow -= pixelsInByte) {
+            // HACK: Did not create the loop for accessing pixels and merging them in the single byte for better
+            // performance.
             //       Wanted to avoid unneeded loop count increasing and jump operations which for large amount of data
             //       take considerable amount of time. Using 8 pixels at a time for better performance
             uint32_t index = inputRow * BOARD_EINK_DISPLAY_RES_X + inputCol;
 
-            uint8_t firstPixelPair   = (dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t secondPixelPair  = (dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t thirdPixelPair   = (dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X];
-            uint8_t fourthPixelPair  = (dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t firstPixelPair =
+                (dataIn[index - 0 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 1 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t secondPixelPair =
+                (dataIn[index - 2 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 3 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t thirdPixelPair =
+                (dataIn[index - 4 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 5 * BOARD_EINK_DISPLAY_RES_X];
+            uint8_t fourthPixelPair =
+                (dataIn[index - 6 * BOARD_EINK_DISPLAY_RES_X] << 4) | dataIn[index - 7 * BOARD_EINK_DISPLAY_RES_X];
 
             // Put the pixels in the uint32_t for faster processing
             pixels = firstPixelPair | (secondPixelPair << 8) | (thirdPixelPair << 16) | (fourthPixelPair << 24);
 
-            if (invertColors)
-            {
+            if (invertColors) {
                 pixels = ~pixels;
             }
 
@@ -1424,5 +1372,3 @@ static uint8_t* s_EinkTransformAnimationFrameCoordinateSystem_4Bpp(
 
     return dataOut;
 }
-
-
diff --git a/module-bsp/board/rt1051/bsp/eink/ED028TC1.h b/module-bsp/board/rt1051/bsp/eink/ED028TC1.h
index 3888da754..2eafa3607 100644
--- a/module-bsp/board/rt1051/bsp/eink/ED028TC1.h
+++ b/module-bsp/board/rt1051/bsp/eink/ED028TC1.h
@@ -19,411 +19,416 @@
 #include "semphr.h"
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
 /* Exported macro ------------------------------------------------------------*/
 /**
  * @brief ED028TC1 register definitions
  */
-#define EinkPanelSetting                  (0x00U)
-#define EinkPowerSetting                  (0x01U)
-#define EinkPowerOFF                      (0x02U)
-#define EinkPowerOFFSequenceSetting       (0x03U)
-#define EinkPowerON                       (0x04U)
-#define EinkDPC                           (0x05U)
-#define EinkDSLP                          (0x06U)
-#define EinkBoosterSoftStart              (0x07U)
+#define EinkPanelSetting            (0x00U)
+#define EinkPowerSetting            (0x01U)
+#define EinkPowerOFF                (0x02U)
+#define EinkPowerOFFSequenceSetting (0x03U)
+#define EinkPowerON                 (0x04U)
+#define EinkDPC                     (0x05U)
+#define EinkDSLP                    (0x06U)
+#define EinkBoosterSoftStart        (0x07U)
 
-#define EinkDataStartTransmission1        (0x10U)
-#define EinkDisplayRefresh                (0x12U)
-#define EinkDTM2                          (0x13U)
-#define EinkAWM1                          (0x15U)
-#define EinkAWM2                          (0x16U)
+#define EinkDataStartTransmission1 (0x10U)
+#define EinkDisplayRefresh         (0x12U)
+#define EinkDTM2                   (0x13U)
+#define EinkAWM1                   (0x15U)
+#define EinkAWM2                   (0x16U)
 
-#define EinkLUTC                          (0x20U)
-#define EinkLUTD                          (0x21U)
-#define EinkLUTR                          (0x22U)
-#define EinkPowerSaving                   (0x26U)
-#define EinkMISCS                         (0x27U)
+#define EinkLUTC        (0x20U)
+#define EinkLUTD        (0x21U)
+#define EinkLUTR        (0x22U)
+#define EinkPowerSaving (0x26U)
+#define EinkMISCS       (0x27U)
 
-#define EinkPLLControl                    (0x30U)
+#define EinkPLLControl (0x30U)
 
-#define EinkTemperatureSensorCalibration  (0x40U)
-#define EinkTemperatureSensorSelection    (0x41U)
+#define EinkTemperatureSensorCalibration (0x40U)
+#define EinkTemperatureSensorSelection   (0x41U)
 
-#define EinkVcomAndDataIntervalSetting    (0x50U)
-#define EinkLPD                           (0x51U)
+#define EinkVcomAndDataIntervalSetting (0x50U)
+#define EinkLPD                        (0x51U)
 
-#define EinkTCONSetting                   (0x60U)
-#define EinkResolutionSetting             (0x61U)
-#define EinkDAM                           (0x65U)
+#define EinkTCONSetting       (0x60U)
+#define EinkResolutionSetting (0x61U)
+#define EinkDAM               (0x65U)
 
-#define EinkREV                           (0x70U)
-#define EinkFLG                           (0x71U)
-#define EinkLUT_COL_FLG                   (0x72U)
-#define EinkLUT_BUSY_FLG                  (0x73U)
+#define EinkREV          (0x70U)
+#define EinkFLG          (0x71U)
+#define EinkLUT_COL_FLG  (0x72U)
+#define EinkLUT_BUSY_FLG (0x73U)
 
-#define EinkAutoMeasurementVcom           (0x80U)
-#define EinkReadVcomValue                 (0x81U)
-#define EinkVCM_DCSetting                 (0x82U)
-#define EinkDataStartTransmissionWindow   (0x83U)
-#define EinkEDS                           (0x84U)
-#define EinkXONS                          (0x85U)
+#define EinkAutoMeasurementVcom         (0x80U)
+#define EinkReadVcomValue               (0x81U)
+#define EinkVCM_DCSetting               (0x82U)
+#define EinkDataStartTransmissionWindow (0x83U)
+#define EinkEDS                         (0x84U)
+#define EinkXONS                        (0x85U)
 
-#define EinkLEDDS                         (0x90U)
-#define EinkPBC                           (0x91U)
-#define EinkPBCS                          (0x92U)
-#define EinkEXTRS                         (0x93U)
-#define EinkNTRS                          (0x94U)
+#define EinkLEDDS (0x90U)
+#define EinkPBC   (0x91U)
+#define EinkPBCS  (0x92U)
+#define EinkEXTRS (0x93U)
+#define EinkNTRS  (0x94U)
 
-#define EinkGDOrderSetting                (0xE0U)
+#define EinkGDOrderSetting (0xE0U)
 
 /**
  * @brief ED028TC1 register bit definitions
  */
-//PanelSetting
-#define XON             (1<<7)
-#define RES0            (1<<6)
-#define LUT_SEL         (1<<5)
-#define DM              (1<<4)
-#define SHL             (1<<2)
-#define SPIWM           (1<<1)
-#define RST_N           (1<<0)
-#define SFT1PX          (0<<0)
-#define SFT2PX          (1<<0)
-#define SFT3PX          (2<<0)
-#define SFT4PX          (3<<0)
+// PanelSetting
+#define XON     (1 << 7)
+#define RES0    (1 << 6)
+#define LUT_SEL (1 << 5)
+#define DM      (1 << 4)
+#define SHL     (1 << 2)
+#define SPIWM   (1 << 1)
+#define RST_N   (1 << 0)
+#define SFT1PX  (0 << 0)
+#define SFT2PX  (1 << 0)
+#define SFT3PX  (2 << 0)
+#define SFT4PX  (3 << 0)
 
-//PowerSetting
-#define VSource_EN      (1<<0)
-#define VGate_EN        (1<<1)
-#define VG_LVL17V       (0<<0)
-#define VG_LVL18V       (1<<0)
-#define VG_LVL19V       (2<<0)
-#define VG_LVL20V       (3<<0)
-#define VG_LVL21V       (4<<0)
-#define VSLV_LVL        (0)     //this is: 7-bit 00h=2.4V, 7Fh=15.0V
-#define VSL_LVL15V      (0<<2)
-#define VSL_LVL14V      (1<<2)
-#define VSL_LVL13V      (2<<2)
-#define VSL_LVL12V      (3<<2)
-#define VSH_LVL15V      (0<<0)
-#define VSH_LVL14V      (1<<0)
-#define VSH_LVL13V      (2<<0)
-#define VSH_LVL12V      (3<<0)
+// PowerSetting
+#define VSource_EN (1 << 0)
+#define VGate_EN   (1 << 1)
+#define VG_LVL17V  (0 << 0)
+#define VG_LVL18V  (1 << 0)
+#define VG_LVL19V  (2 << 0)
+#define VG_LVL20V  (3 << 0)
+#define VG_LVL21V  (4 << 0)
+#define VSLV_LVL   (0) // this is: 7-bit 00h=2.4V, 7Fh=15.0V
+#define VSL_LVL15V (0 << 2)
+#define VSL_LVL14V (1 << 2)
+#define VSL_LVL13V (2 << 2)
+#define VSL_LVL12V (3 << 2)
+#define VSH_LVL15V (0 << 0)
+#define VSH_LVL14V (1 << 0)
+#define VSH_LVL13V (2 << 0)
+#define VSH_LVL12V (3 << 0)
 
-//PowerOFFSequenceSetting
-#define T_VDS_OFF_1F    (0<<4)
-#define T_VDS_OFF_2F    (1<<4)
-#define T_VDS_OFF_3F    (2<<4)
-#define T_VDS_OFF_4F    (3<<4)
+// PowerOFFSequenceSetting
+#define T_VDS_OFF_1F (0 << 4)
+#define T_VDS_OFF_2F (1 << 4)
+#define T_VDS_OFF_3F (2 << 4)
+#define T_VDS_OFF_4F (3 << 4)
 
-//BoosterSoftStart
-#define  BTPHx_SSP_10ms (0<<6)  //soft start period of phase A,B
-#define  BTPHx_SSP_20ms (1<<6)
-#define  BTPHx_SSP_30ms (2<<6)
-#define  BTPHx_SSP_40ms (3<<6)
-#define  BTPHx_DS_1     (0<<3)  //driving strength of phase A,B,C
-#define  BTPHx_DS_2     (1<<3)
-#define  BTPHx_DS_3     (2<<3)
-#define  BTPHx_DS_4     (3<<3)
-#define  BTPHx_DS_5     (4<<3)
-#define  BTPHx_DS_6     (5<<3)
-#define  BTPHx_DS_7     (6<<3)
-#define  BTPHx_DS_8     (7<<3)
-#define  BTPHx_OT_027   (0<<0)  //minimum OFF time setting of phase A,B,C
-#define  BTPHx_OT_034   (1<<0)
-#define  BTPHx_OT_040   (2<<0)
-#define  BTPHx_OT_054   (3<<0)
-#define  BTPHx_OT_080   (4<<0)
-#define  BTPHx_OT_154   (5<<0)
-#define  BTPHx_OT_334   (6<<0)
-#define  BTPHx_OT_658   (7<<0)
+// BoosterSoftStart
+#define BTPHx_SSP_10ms (0 << 6) // soft start period of phase A,B
+#define BTPHx_SSP_20ms (1 << 6)
+#define BTPHx_SSP_30ms (2 << 6)
+#define BTPHx_SSP_40ms (3 << 6)
+#define BTPHx_DS_1     (0 << 3) // driving strength of phase A,B,C
+#define BTPHx_DS_2     (1 << 3)
+#define BTPHx_DS_3     (2 << 3)
+#define BTPHx_DS_4     (3 << 3)
+#define BTPHx_DS_5     (4 << 3)
+#define BTPHx_DS_6     (5 << 3)
+#define BTPHx_DS_7     (6 << 3)
+#define BTPHx_DS_8     (7 << 3)
+#define BTPHx_OT_027   (0 << 0) // minimum OFF time setting of phase A,B,C
+#define BTPHx_OT_034   (1 << 0)
+#define BTPHx_OT_040   (2 << 0)
+#define BTPHx_OT_054   (3 << 0)
+#define BTPHx_OT_080   (4 << 0)
+#define BTPHx_OT_154   (5 << 0)
+#define BTPHx_OT_334   (6 << 0)
+#define BTPHx_OT_658   (7 << 0)
 
-#define EINK_TEMPERATURE_SENSOR_USE_INTERNAL    (0 << 6)
-#define EINK_TEMPERATURE_SENSOR_USE_EXTERNAL    (2 << 6)
+#define EINK_TEMPERATURE_SENSOR_USE_INTERNAL (0 << 6)
+#define EINK_TEMPERATURE_SENSOR_USE_EXTERNAL (2 << 6)
 
-//DataStartTransmission1
-#define Cur_BPP1        (0<<0)
-#define Cur_BPP2        (1<<0)
-#define Cur_BPP3        (2<<0)
-#define Cur_BPP4        (3<<0)
+// DataStartTransmission1
+#define Cur_BPP1 (0 << 0)
+#define Cur_BPP2 (1 << 0)
+#define Cur_BPP3 (2 << 0)
+#define Cur_BPP4 (3 << 0)
 
-//DisplayRefresh
-#define AC_DCVCOM       (1<<7)
-#define WFMode0         (0<<4)
-#define WFMode1         (1<<4)
-#define WFMode2         (2<<4)
-#define WFMode3         (3<<4)
-#define WFMode4         (4<<4)
-#define UPD_CPY_TO_PRE  (1<<3)
-#define DN_EN           (1<<2)
-#define Regal_EN_DIS    (0<<0)
-#define Regal_EN_K      (1<<0)
-#define Regal_EN_W      (2<<0)
-#define Regal_EN_KW     (3<<0)
+// DisplayRefresh
+#define AC_DCVCOM      (1 << 7)
+#define WFMode0        (0 << 4)
+#define WFMode1        (1 << 4)
+#define WFMode2        (2 << 4)
+#define WFMode3        (3 << 4)
+#define WFMode4        (4 << 4)
+#define UPD_CPY_TO_PRE (1 << 3)
+#define DN_EN          (1 << 2)
+#define Regal_EN_DIS   (0 << 0)
+#define Regal_EN_K     (1 << 0)
+#define Regal_EN_W     (2 << 0)
+#define Regal_EN_KW    (3 << 0)
 
-//PLLControl
-#define OSC_RATE_SEL2_5 (0<<1)
-#define OSC_RATE_SEL5   (1<<1)
-#define OSC_RATE_SEL8   (2<<1)
-#define OSC_RATE_SEL10  (3<<1)
-#define OSC_RATE_SEL16  (4<<1)
-#define OSC_RATE_SEL18  (5<<1)
-#define OSC_RATE_SEL19  (6<<1)
-#define OSC_RATE_SEL20  (7<<1)
+// PLLControl
+#define OSC_RATE_SEL2_5 (0 << 1)
+#define OSC_RATE_SEL5   (1 << 1)
+#define OSC_RATE_SEL8   (2 << 1)
+#define OSC_RATE_SEL10  (3 << 1)
+#define OSC_RATE_SEL16  (4 << 1)
+#define OSC_RATE_SEL18  (5 << 1)
+#define OSC_RATE_SEL19  (6 << 1)
+#define OSC_RATE_SEL20  (7 << 1)
 
-//VcomAndDataIntervalSetting
-#define VBD_CON         (1<<3)
-#define VBD_OT_G0_G0    (0<<1)
-#define VBD_OT_G0_G15   (2<<1)
-#define VBD_OT_G15_G0   (3<<1)
-#define VBD_OT_G15_G15  (4<<1)
-#define DDX             (1<<0)
-#define CDI             (4)     //Vcom data interval: 0h=2hsync -> Fh=32hsync, step=2
-#define DCI             (0)     //Data to Vcom interval: 0h=1hsync -> Fh=16hsync, step=1
+// VcomAndDataIntervalSetting
+#define VBD_CON        (1 << 3)
+#define VBD_OT_G0_G0   (0 << 1)
+#define VBD_OT_G0_G15  (2 << 1)
+#define VBD_OT_G15_G0  (3 << 1)
+#define VBD_OT_G15_G15 (4 << 1)
+#define DDX            (1 << 0)
+#define CDI            (4) // Vcom data interval: 0h=2hsync -> Fh=32hsync, step=2
+#define DCI            (0) // Data to Vcom interval: 0h=1hsync -> Fh=16hsync, step=1
 
-//AutoMeasurementVcom
-#define VCM_EN          (1<<6)
-#define AMVT3s          (0<<4)
-#define AMVT5s          (1<<4)
-#define AMVT6s          (2<<4)
-#define AMVT10s         (3<<4)
-#define AMVX            (1<<3)
-#define AMVS            (1<<2)
-#define AMV             (1<<1)
-#define AMVE            (1<<0)
+// AutoMeasurementVcom
+#define VCM_EN  (1 << 6)
+#define AMVT3s  (0 << 4)
+#define AMVT5s  (1 << 4)
+#define AMVT6s  (2 << 4)
+#define AMVT10s (3 << 4)
+#define AMVX    (1 << 3)
+#define AMVS    (1 << 2)
+#define AMV     (1 << 1)
+#define AMVE    (1 << 0)
 
-//GDOrderSetting
-#define VBD_EN_SEL      (1<<3)
-#define GDOS_M0         (0<<0)
-#define GDOS_M1         (1<<0)
-#define GDOS_M2         (2<<0)
-#define GDOS_M3         (3<<0)
-#define GDOS_M4         (4<<0)
-#define GDOS_M5         (5<<0)
-#define GDOS_M6         (6<<0)
-#define GDOS_M7         (7<<0)
-#define VBD_FN          (0)     //VBorder frame number seting: 0-VBD disabled, 1-VBD=8, ... 1Fh-VBD=248
+// GDOrderSetting
+#define VBD_EN_SEL (1 << 3)
+#define GDOS_M0    (0 << 0)
+#define GDOS_M1    (1 << 0)
+#define GDOS_M2    (2 << 0)
+#define GDOS_M3    (3 << 0)
+#define GDOS_M4    (4 << 0)
+#define GDOS_M5    (5 << 0)
+#define GDOS_M6    (6 << 0)
+#define GDOS_M7    (7 << 0)
+#define VBD_FN     (0) // VBorder frame number seting: 0-VBD disabled, 1-VBD=8, ... 1Fh-VBD=248
 
 // Dither
-#define EINK_DITHER_START       0x01
-#define EINK_DITHER_4BPP_MODE   (0 << 1)
-#define EINK_DITHER_2BPP_MODE   (1 << 1)
+#define EINK_DITHER_START     0x01
+#define EINK_DITHER_4BPP_MODE (0 << 1)
+#define EINK_DITHER_2BPP_MODE (1 << 1)
 
+#define EINK_FLAG_BUSY_N 0x0001 ///< This flag informs that the driver is busy. 0 - busy, 1 - idle
+#define EINK_FLAG_POWER_OFF_IN_PROGRESS                                                                                \
+    0x0002 ///< This flag informs that the Power Off sequence is in progress. 1 - in progress
+#define EINK_FLAG_POWER_ON_IN_PROGRESS                                                                                 \
+    0x0004 ///< This flag informs that the Power On sequence is in progress. 1 - in progress
+#define EINK_FLAG_ENTIRE_FRAME_RECEIVED                                                                                \
+    0x0008 ///< This flag informs that the driver received data for entire frame defined in the \ref
+           ///< EinkDataStartTransmissionWindow command
+#define EINK_FLAG_I2C_BUSY           0x0010 ///< This flag informs that the I2C master periph is busy. Active low
+#define EINK_FLAG_I2C_ERROR          0x0020 ///< This flag informs that the I2C master acquired an error
+#define EINK_FLAG_PIPELINE_COLLISION 0x0040 ///< This flag informs that two frames sent in the pipelin overlap
+#define EINK_FLAG_PIPELINE_BUSY      0x0080 ///< This flag informs that pipeline insertion is in progress
+#define EINK_FLAG_REAGL_BUSY         0x0100 ///< This flag informs that the REAGLS function processing is in progress
+#define EINK_FLAG_DITHER_IN_PROGRESS 0x0200 ///< This flag informs that the Dither process is in progress
+#define EINK_FLAG_DISP_REFRESH_IN_PROGRESS                                                                             \
+    0x0400 ///< This flag informs that the Display Refreshing process is in progress
+#define EINK_FLAG_AUTO_MEASURE_VCOM_IN_PROGRESS                                                                        \
+    0x0800 ///< This flag informs that the auto measurement of the VCOM is in progress
+#define EINK_FLAG_EPD_DISCHARGE_IN_PROGRESS 0x1000 ///< This flag informs that the EPD display discharge is in progress
+#define EINK_FLAG_BOOST_VOLTAGE_READY       0x4000 ///< This flag informs that the Boost voltage is ready
+#define EINK_FLAG_RAM_TEST_FLAG             0x8000 ///< This flag is for internal SRAM memory testing
 
-#define EINK_FLAG_BUSY_N                        0x0001      ///< This flag informs that the driver is busy. 0 - busy, 1 - idle
-#define EINK_FLAG_POWER_OFF_IN_PROGRESS         0x0002      ///< This flag informs that the Power Off sequence is in progress. 1 - in progress
-#define EINK_FLAG_POWER_ON_IN_PROGRESS          0x0004      ///< This flag informs that the Power On sequence is in progress. 1 - in progress
-#define EINK_FLAG_ENTIRE_FRAME_RECEIVED         0x0008      ///< This flag informs that the driver received data for entire frame defined in the \ref EinkDataStartTransmissionWindow command
-#define EINK_FLAG_I2C_BUSY                      0x0010      ///< This flag informs that the I2C master periph is busy. Active low
-#define EINK_FLAG_I2C_ERROR                     0x0020      ///< This flag informs that the I2C master acquired an error
-#define EINK_FLAG_PIPELINE_COLLISION            0x0040      ///< This flag informs that two frames sent in the pipelin overlap
-#define EINK_FLAG_PIPELINE_BUSY                 0x0080      ///< This flag informs that pipeline insertion is in progress
-#define EINK_FLAG_REAGL_BUSY                    0x0100      ///< This flag informs that the REAGLS function processing is in progress
-#define EINK_FLAG_DITHER_IN_PROGRESS            0x0200      ///< This flag informs that the Dither process is in progress
-#define EINK_FLAG_DISP_REFRESH_IN_PROGRESS      0x0400      ///< This flag informs that the Display Refreshing process is in progress
-#define EINK_FLAG_AUTO_MEASURE_VCOM_IN_PROGRESS 0x0800      ///< This flag informs that the auto measurement of the VCOM is in progress
-#define EINK_FLAG_EPD_DISCHARGE_IN_PROGRESS     0x1000      ///< This flag informs that the EPD display discharge is in progress
-#define EINK_FLAG_BOOST_VOLTAGE_READY           0x4000      ///< This flag informs that the Boost voltage is ready
-#define EINK_FLAG_RAM_TEST_FLAG                 0x8000      ///< This flag is for internal SRAM memory testing
+    /* Exported types ------------------------------------------------------------*/
+    /**
+     * @enum EinkStatus_e
+     */
+    typedef enum
+    {
+        EinkOK, //!< EinkOK
+        EinkError,
+        EinkSPIErr,                //!< EinkSPIErr
+        EinkSPINotInitializedErr,  //!< EinkSPINotInitializedErr
+        EinkDMAErr,                //!< EinkDMAErr
+        EinkInitErr,               //!< EinkInitErr
+        EinkTimeout,               //!< Timeout occured while waiting for not busy signal from EINK
+        EinkNoMem,                 //!< Could not allocate memory
+        EinkWaveformsFileOpenFail, //!< Could not open the file with the waveforms for EPD display
+    } EinkStatus_e;
 
+    /**
+     * @enum EinkBpp_e
+     */
+    typedef enum
+    {
+        Eink1Bpp = 1, //!< Eink1Bpp
+        Eink2Bpp,     //!< Eink2Bpp
+        Eink3Bpp,     //!< Eink3Bpp
+        Eink4Bpp      //!< Eink4Bpp
+    } EinkBpp_e;
 
-/* Exported types ------------------------------------------------------------*/
-/**
- * @enum EinkStatus_e
- */
-typedef enum
-{
-  EinkOK,                       //!< EinkOK
-  EinkError,
-  EinkSPIErr,                   //!< EinkSPIErr
-  EinkSPINotInitializedErr,     //!< EinkSPINotInitializedErr
-  EinkDMAErr,                   //!< EinkDMAErr
-  EinkInitErr,                  //!< EinkInitErr
-  EinkTimeout,                  //!< Timeout occured while waiting for not busy signal from EINK
-  EinkNoMem,                    //!< Could not allocate memory
-  EinkWaveformsFileOpenFail,    //!< Could not open the file with the waveforms for EPD display
-} EinkStatus_e;
+    typedef enum
+    {
+        EinkWaveformINIT,  ///< Clears deeply the display
+        EinkWaveformA2,    ///< Fastest, direct update, no flashing. Severe ghosting effect
+        EinkWaveformDU2,   ///< Fast, direct update, no flashing. Medium ghosting effect
+        EinkWaveformGLD16, ///< Slow, little flashing. Light ghosting mode
+        EinkWaveformGC16,  ///< Slow, strong flashing. Next to none ghosting
+    } EinkWaveforms_e;
 
-/**
- * @enum EinkBpp_e
- */
-typedef enum
-{
-  Eink1Bpp = 1,//!< Eink1Bpp
-  Eink2Bpp,    //!< Eink2Bpp
-  Eink3Bpp,    //!< Eink3Bpp
-  Eink4Bpp     //!< Eink4Bpp
-} EinkBpp_e;
+    typedef enum
+    {
+        EinkDisplayTimingsDeepCleanMode,
+        EinkDisplayTimingsHighContrastMode,
+        EinkDisplayTimingsFastRefreshMode
+    } EinkDisplayTimingsMode_e;
 
-typedef enum
-{
-    EinkWaveformINIT,   ///< Clears deeply the display
-    EinkWaveformA2,     ///< Fastest, direct update, no flashing. Severe ghosting effect
-    EinkWaveformDU2,    ///< Fast, direct update, no flashing. Medium ghosting effect
-    EinkWaveformGLD16,  ///< Slow, little flashing. Light ghosting mode
-    EinkWaveformGC16,   ///< Slow, strong flashing. Next to none ghosting
-} EinkWaveforms_e;
+    typedef enum
+    {
+        EinkDisplayColorBlack = 0,
+        EinkDisplayColorWhite = 0xFF
+    } EinkDisplayColorFilling_e;
 
-typedef enum
-{
-    EinkDisplayTimingsDeepCleanMode,
-    EinkDisplayTimingsHighContrastMode,
-    EinkDisplayTimingsFastRefreshMode
-} EinkDisplayTimingsMode_e;
+    typedef enum
+    {
+        EinkDisplayColorModeStandard,
+        EinkDisplayColorModeInverted
+    } EinkDisplayColorMode_e;
 
-typedef enum
-{
-    EinkDisplayColorBlack = 0,
-    EinkDisplayColorWhite = 0xFF
-} EinkDisplayColorFilling_e;
+    typedef struct
+    {
+        // type of eink's waveform
+        EinkWaveforms_e mode;
+        // temperature of surrounding
+        int32_t temperature;
+        // pointer to lookup table for lut c
+        uint8_t *LUTCData;
+        // sizeo of lutc data
+        uint32_t LUTCSize;
+        // pointer to lookup table for lut d
+        uint8_t *LUTDData;
+        // size of lutd data
+        uint32_t LUTDSize;
+    } EinkWaveFormSettings_t;
 
-typedef enum
-{
-    EinkDisplayColorModeStandard,
-    EinkDisplayColorModeInverted
-} EinkDisplayColorMode_e;
+    /* Exported constants --------------------------------------------------------*/
 
-typedef struct {
-	//type of eink's waveform
-	EinkWaveforms_e mode;
-	//temperature of surrounding
-	int32_t temperature;
-	//pointer to lookup table for lut c
-	uint8_t* LUTCData;
-	//sizeo of lutc data
-	uint32_t LUTCSize;
-	//pointer to lookup table for lut d
-	uint8_t* LUTDData;
-	//size of lutd data
-	uint32_t LUTDSize;
-}EinkWaveFormSettings_t;
+    /* Exported functions ------------------------------------------------------- */
 
-/* Exported constants --------------------------------------------------------*/
+    /**
+     * This function returns the state of the EPD siplay powe
+     * @return 1 if is currently powered on, 0 otherwise
+     */
+    uint8_t EinkIsPoweredOn();
 
-/* Exported functions ------------------------------------------------------- */
+    /**
+     * This function powers on the display. Needed for refreshing, measuring the temperature
+     */
+    void EinkPowerOn();
 
-/**
- * This function returns the state of the EPD siplay powe
- * @return 1 if is currently powered on, 0 otherwise
- */
-uint8_t EinkIsPoweredOn();
+    /**
+     * This functions powers off the display
+     */
+    void EinkPowerOff();
 
-/**
- * This function powers on the display. Needed for refreshing, measuring the temperature
- */
-void EinkPowerOn();
+    /**
+     * @brief This function is responsible for turning eink of and releasing all resources.
+     */
+    void EinkPowerDown(void);
 
-/**
- * This functions powers off the display
- */
-void EinkPowerOff();
+    /**
+     * This function measures the ambient temperature using the ED028TC1 display internal temperature sensor.
+     * @note The display needs to be powered on
+     *
+     * @return Ambient temperature in the degrees of Celsius
+     */
+    int16_t EinkGetTemperatureInternal();
 
-/**
- * @brief This function is responsible for turning eink of and releasing all resources.
- */
-void EinkPowerDown(void);
+    /**
+     * @brief This function resets the eink display and setups the initial configuration
+     */
+    EinkStatus_e EinkResetAndInitialize();
 
-/**
- * This function measures the ambient temperature using the ED028TC1 display internal temperature sensor.
- * @note The display needs to be powered on
- *
- * @return Ambient temperature in the degrees of Celsius
- */
-int16_t EinkGetTemperatureInternal();
+    /**
+     * TODO: Fill The doxy when got info what does it do
+     * @return
+     */
+    EinkStatus_e EinkWaitTillPipelineBusy();
 
-/**
- * @brief This function resets the eink display and setups the initial configuration
- */
-EinkStatus_e EinkResetAndInitialize();
+    /**
+     * TODO: Fill The doxy when got info what does it do
+     * @return
+     */
+    EinkStatus_e EinkDitherDisplay();
 
-/**
- * TODO: Fill The doxy when got info what does it do
- * @return
- */
-EinkStatus_e EinkWaitTillPipelineBusy();
+    /**
+     * @brief This function sends the part of image from the given buffer to the internal memory of the display. It
+     * makes not screen to update.
+     * @param X [in] - image start position X in pixels
+     * @param Y [in] - image start position Y in pixels
+     * @param W [in] - image width in pixels
+     * @param H [in] - image height in pixels
+     * @param buffer [in] -  pointer to image encoded according to \ref bpp set in initialization
+     * @param bpp [in] - The format of the \ref buffer (number of the bits per pixel)
+     * @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
+     *
+     * @return  EinkNoMem - Could not allocate the temporary buffer
+     *          EinkOK - Part of image send successfully
+     */
+    EinkStatus_e EinkUpdateFrame(uint16_t X,
+                                 uint16_t Y,
+                                 uint16_t W,
+                                 uint16_t H,
+                                 uint8_t *buffer,
+                                 EinkBpp_e bpp,
+                                 EinkDisplayColorMode_e invertColors);
 
-/**
- * TODO: Fill The doxy when got info what does it do
- * @return
- */
-EinkStatus_e EinkDitherDisplay();
+    /**
+     * @brief This function sets the waveform to the \ref EinkWaveformINIT to make the display clearing more deep and
+     * sends the white background
+     * @param temperature [in] - current ambient temperature
+     * @return EinkOK
+     */
+    // EinkStatus_e EinkClearScreenDeep (int8_t temperature);
 
-/**
- * @brief This function sends the part of image from the given buffer to the internal memory of the display. It makes not screen to update.
- * @param X [in] - image start position X in pixels
- * @param Y [in] - image start position Y in pixels
- * @param W [in] - image width in pixels
- * @param H [in] - image height in pixels
- * @param buffer [in] -  pointer to image encoded according to \ref bpp set in initialization
- * @param bpp [in] - The format of the \ref buffer (number of the bits per pixel)
- * @param invertColors[in] - true if colors of the image are to be inverted, false otherwise
- *
- * @return  EinkNoMem - Could not allocate the temporary buffer
- *          EinkOK - Part of image send successfully
- */
-EinkStatus_e
-EinkUpdateFrame (uint16_t X,
-                  uint16_t Y,
-                  uint16_t W,
-                  uint16_t H,
-                  uint8_t *buffer,
-                  EinkBpp_e bpp,
-                  EinkDisplayColorMode_e invertColors);
+    /**
+     * @brief This function just displays the color (black or white) on the entire display. Used to clear the display
+     * fast.
+     * @param colorFill [in] - color which is used to fill the display
+     * @return EinkOK
+     */
+    EinkStatus_e EinkFillScreenWithColor(EinkDisplayColorFilling_e colorFill);
 
-/**
- * @brief This function sets the waveform to the \ref EinkWaveformINIT to make the display clearing more deep and sends the white background
- * @param temperature [in] - current ambient temperature
- * @return EinkOK
- */
-//EinkStatus_e EinkClearScreenDeep (int8_t temperature);
+    /**
+     * @brief Refresh window on the screen. E-paper display tends to loose contrast over time. To Keep the image sharp
+     * refresh is needed.
+     * @param X refresh window position X in pixels
+     * @param Y refresh window position Y in pixels
+     * @param W refresh window width in pixels
+     * @param H refresh window height in pixels
+     * @param refreshTimingsMode [in] - EinkDisplayTimingsDeepCleanMode - if image is to be cleared precisely
+     *                                  EinkDisplayTimingsHighContrastMode - if image is displayed in the high contrast
+     * mode EinkDisplayTimingsFastRefreshMode - if image is to be displayed fast
+     *
+     * @return EinkOK
+     */
+    EinkStatus_e EinkRefreshImage(
+        uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode);
 
-/**
- * @brief This function just displays the color (black or white) on the entire display. Used to clear the display fast.
- * @param colorFill [in] - color which is used to fill the display
- * @return EinkOK
- */
-EinkStatus_e EinkFillScreenWithColor (EinkDisplayColorFilling_e colorFill);
+    /**
+     * @brief This function sends the proper waveform consisting from the LUTC and LUTD data,
+     *          based on the requested waveform (see \ref Mode) and the given temperature (see \ref temperature)
+     * @param Mode [in] - type of the waveform
+     * @param temperature [in] - current ambient temperature in Celsius degrees
+     * @param LUTCData [in] - Data
+     * @return
+     */
+    EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t *settings);
 
-/**
- * @brief Refresh window on the screen. E-paper display tends to loose contrast over time. To Keep the image sharp refresh is needed.
- * @param X refresh window position X in pixels
- * @param Y refresh window position Y in pixels
- * @param W refresh window width in pixels
- * @param H refresh window height in pixels
- * @param refreshTimingsMode [in] - EinkDisplayTimingsDeepCleanMode - if image is to be cleared precisely
- *                                  EinkDisplayTimingsHighContrastMode - if image is displayed in the high contrast mode
- *                                  EinkDisplayTimingsFastRefreshMode - if image is to be displayed fast
- *
- * @return EinkOK
- */
-EinkStatus_e
-EinkRefreshImage (uint16_t X, uint16_t Y, uint16_t W, uint16_t H, EinkDisplayTimingsMode_e refreshTimingsMode);
-
-/**
- * @brief This function sends the proper waveform consisting from the LUTC and LUTD data,
- *          based on the requested waveform (see \ref Mode) and the given temperature (see \ref temperature)
- * @param Mode [in] - type of the waveform
- * @param temperature [in] - current ambient temperature in Celsius degrees
- * @param LUTCData [in] - Data
- * @return
- */
-EinkStatus_e EinkUpdateWaveform(const EinkWaveFormSettings_t* settings);
-
-
-/**
-* This function converts the ARGB image to the L4 format
-* @param dataIn  [in]  - input image
-* @param dataOut [out] - output image
-* @param displayWidth    [in] - display width in pixels
-* @param displayHeight   [in] - display height in pixels
-*/
-void EinkARGBToLuminance( uint8_t *dataIn,
-                          uint8_t* dataOut,
-                          uint32_t displayWidth,
-                          uint32_t displayHeight);
+    /**
+     * This function converts the ARGB image to the L4 format
+     * @param dataIn  [in]  - input image
+     * @param dataOut [out] - output image
+     * @param displayWidth    [in] - display width in pixels
+     * @param displayHeight   [in] - display height in pixels
+     */
+    void EinkARGBToLuminance(uint8_t *dataIn, uint8_t *dataOut, uint32_t displayWidth, uint32_t displayHeight);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/bsp/eink/bsp_eink.cpp b/module-bsp/board/rt1051/bsp/eink/bsp_eink.cpp
index e47acb7cd..8c4af780f 100644
--- a/module-bsp/board/rt1051/bsp/eink/bsp_eink.cpp
+++ b/module-bsp/board/rt1051/bsp/eink/bsp_eink.cpp
@@ -24,23 +24,22 @@
 #include "drivers/gpio/DriverGPIO.hpp"
 #include "bsp/BoardDefinitions.hpp"
 
-#define BSP_EINK_LPSPI_PCS_TO_SCK_DELAY 1000
-#define BSP_EINK_LPSPI_SCK_TO_PSC_DELAY 1000
+#define BSP_EINK_LPSPI_PCS_TO_SCK_DELAY       1000
+#define BSP_EINK_LPSPI_SCK_TO_PSC_DELAY       1000
 #define BSP_EINK_LPSPI_BETWEEN_TRANSFER_DELAY 1000
-#define BSP_EINK_LPSPI_MASTER_PCS_PIN_SEL (kLPSPI_MasterPcs0)
-#define BSP_EINK_LPSPI_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
+#define BSP_EINK_LPSPI_MASTER_PCS_PIN_SEL     (kLPSPI_MasterPcs0)
+#define BSP_EINK_LPSPI_SLAVE_PCS_PIN_SEL      (kLPSPI_SlavePcs0)
 
-#define BSP_EINK_LPSPI_BASE	BOARD_EINK_LPSPI_BASE
-
-#define BSP_EINK_TRANSFER_WRITE_CLOCK	18000000
-#define BSP_EINK_TRANSFER_READ_CLOCK    3000000
+#define BSP_EINK_LPSPI_BASE BOARD_EINK_LPSPI_BASE
 
+#define BSP_EINK_TRANSFER_WRITE_CLOCK 18000000
+#define BSP_EINK_TRANSFER_READ_CLOCK  3000000
 
 typedef enum
 {
-	EventWaitRegistered,
-	EventWaitNotRegistered
-}busy_wait_registered_e;
+    EventWaitRegistered,
+    EventWaitNotRegistered
+} busy_wait_registered_e;
 
 typedef const struct _lpspi_edma_resource
 {
@@ -94,151 +93,151 @@ static std::unique_ptr<drivers::DriverDMAHandle> txDMAHandle;
 
 static uint32_t BSP_EINK_LPSPI_GetFreq(void)
 {
-	return GetPerphSourceClock(PerphClock_LPSPI);
+    return GetPerphSourceClock(PerphClock_LPSPI);
 }
 
-
 lpspi_resource_t BSP_EINK_LPSPI_Resource = {BSP_EINK_LPSPI_BASE, 1, BSP_EINK_LPSPI_GetFreq};
 
 lpspi_edma_resource_t BSP_EINK_LPSPI_EdmaResource = {
-	BSP_EINK_LPSPI_DMA_TX_DMA_BASE,    BSP_EINK_LPSPI_DMA_TX_CH,          BSP_EINK_LPSPI_DMA_TX_PERI_SEL,
-	BSP_EINK_LPSPI_DMA_RX_DMA_BASE,    BSP_EINK_LPSPI_DMA_RX_CH,          BSP_EINK_LPSPI_DMA_RX_PERI_SEL,
+    BSP_EINK_LPSPI_DMA_TX_DMA_BASE,
+    BSP_EINK_LPSPI_DMA_TX_CH,
+    BSP_EINK_LPSPI_DMA_TX_PERI_SEL,
+    BSP_EINK_LPSPI_DMA_RX_DMA_BASE,
+    BSP_EINK_LPSPI_DMA_RX_CH,
+    BSP_EINK_LPSPI_DMA_RX_PERI_SEL,
 
-	BSP_EINK_LPSPI_DMA_TX_DMAMUX_BASE, BSP_EINK_LPSPI_DMA_RX_DMAMUX_BASE,
+    BSP_EINK_LPSPI_DMA_TX_DMAMUX_BASE,
+    BSP_EINK_LPSPI_DMA_RX_DMAMUX_BASE,
 };
 
 AT_NONCACHEABLE_SECTION(lpspi_master_edma_handle_t BSP_EINK_LPSPI_EdmaHandle);
 
-
 static bsp_eink_driver_t BSP_EINK_LPSPI_EdmaDriverState = {
     &BSP_EINK_LPSPI_Resource,
     &BSP_EINK_LPSPI_EdmaResource,
     &BSP_EINK_LPSPI_EdmaHandle,
-    nullptr,// will be filled in init function
-    nullptr,// will be filled in init function
+    nullptr, // will be filled in init function
+    nullptr, // will be filled in init function
 };
 
-static SemaphoreHandle_t    bsp_eink_TransferComplete;
+static SemaphoreHandle_t bsp_eink_TransferComplete;
 
-static SemaphoreHandle_t    bsp_eink_busySemaphore;  //  This semaphore suspends the task until the EPD display is busy
+static SemaphoreHandle_t bsp_eink_busySemaphore; //  This semaphore suspends the task until the EPD display is busy
 
 static void s_LPSPI_MasterEdmaCallback(LPSPI_Type *base,
-        lpspi_master_edma_handle_t *handle,
-        status_t status,
-        void *userData)
+                                       lpspi_master_edma_handle_t *handle,
+                                       status_t status,
+                                       void *userData)
 {
-	BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
-	//bsp_eink_driver_t* driver = (bsp_eink_driver_t*)userData;
+    // bsp_eink_driver_t* driver = (bsp_eink_driver_t*)userData;
 
-	if(xQueueSendFromISR(bsp_eink_TransferComplete,&status,&xHigherPriorityTaskWoken) != pdPASS)
-	{
-		//if here sth really bad happened
-	    //LOG_IRQ_ERROR("Could not give the Eink TX Completed semaphore");
-	    return;
-	}
+    if (xQueueSendFromISR(bsp_eink_TransferComplete, &status, &xHigherPriorityTaskWoken) != pdPASS) {
+        // if here sth really bad happened
+        // LOG_IRQ_ERROR("Could not give the Eink TX Completed semaphore");
+        return;
+    }
 
-	// Disable SPI for current consumption reducing
+    // Disable SPI for current consumption reducing
     LPSPI_Enable(BSP_EINK_LPSPI_BASE, false);
 
-	portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
+    portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
 }
 
 status_t BSP_EinkInit(bsp_eink_BusyEvent event)
 {
-	bsp_eink_driver_t* lpspi = &BSP_EINK_LPSPI_EdmaDriverState;
-	lpspi_edma_resource_t *dmaResource = lpspi->dmaResource;
+    bsp_eink_driver_t *lpspi           = &BSP_EINK_LPSPI_EdmaDriverState;
+    lpspi_edma_resource_t *dmaResource = lpspi->dmaResource;
 
-	// If was already created - free it
-	if (bsp_eink_busySemaphore != NULL)
-	{
-	    vSemaphoreDelete(bsp_eink_busySemaphore);
-	}
+    // If was already created - free it
+    if (bsp_eink_busySemaphore != NULL) {
+        vSemaphoreDelete(bsp_eink_busySemaphore);
+    }
 
-	// Create new semaphore
-	bsp_eink_busySemaphore = xSemaphoreCreateBinary();
-    if (bsp_eink_busySemaphore == NULL)
-    {
-//        LOG_ERROR("Could not create the Eink BUSY semaphore");
-    	return kStatus_Fail;
+    // Create new semaphore
+    bsp_eink_busySemaphore = xSemaphoreCreateBinary();
+    if (bsp_eink_busySemaphore == NULL) {
+        //        LOG_ERROR("Could not create the Eink BUSY semaphore");
+        return kStatus_Fail;
     }
 
     // At the beginning the semaphore is in unknown state and it has to clearly taken or given
     xSemaphoreTake(bsp_eink_busySemaphore, 0);
 
     // If was already created - free it
-    if (bsp_eink_TransferComplete != NULL)
-    {
+    if (bsp_eink_TransferComplete != NULL) {
         vQueueDelete(bsp_eink_TransferComplete);
     }
 
     // Create new queue
-    bsp_eink_TransferComplete = xQueueCreate(1,sizeof(uint32_t));
-    if (bsp_eink_TransferComplete == NULL)
-    {
-//        LOG_ERROR("Could not create the single element queue for TX complete");
+    bsp_eink_TransferComplete = xQueueCreate(1, sizeof(uint32_t));
+    if (bsp_eink_TransferComplete == NULL) {
+        //        LOG_ERROR("Could not create the single element queue for TX complete");
         vSemaphoreDelete(bsp_eink_busySemaphore);
         bsp_eink_busySemaphore = NULL;
-    	return kStatus_Fail;
+        return kStatus_Fail;
     }
 
-    //pll = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions ::EINK_PLL),DriverPLLParams{});
+    // pll = DriverPLL::Create(static_cast<PLLInstances >(BoardDefinitions ::EINK_PLL),DriverPLLParams{});
 
     lpspi->eventRegister = EventWaitNotRegistered;
 
-    gpio = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::EINK_GPIO),
-                                               DriverGPIOParams{});
+    gpio = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::EINK_GPIO), DriverGPIOParams{});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-            .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-            .defLogic = 1,
-            .pin = static_cast<uint32_t >(BoardDefinitions::EINK_CS_PIN)});
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                      .defLogic = 1,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::EINK_CS_PIN)});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-            .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-            .defLogic = 0,
-            .pin = static_cast<uint32_t >(BoardDefinitions::EINK_RESET_PIN)});
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                      .defLogic = 0,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::EINK_RESET_PIN)});
 
-    gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-            .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingEdge,
-            .defLogic = 0,
-            .pin = static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN)});
+    gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                      .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingEdge,
+                                      .defLogic = 0,
+                                      .pin      = static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN)});
 
-    gpio->ClearPortInterrupts(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
-    gpio->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->ClearPortInterrupts(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
 
-    s_eink_lpspi_master_config.baudRate                        = BSP_EINK_TRANSFER_WRITE_CLOCK;
-    s_eink_lpspi_master_config.bitsPerFrame                    = 8;
-    s_eink_lpspi_master_config.cpol                            = kLPSPI_ClockPolarityActiveHigh;
-    s_eink_lpspi_master_config.cpha                            = kLPSPI_ClockPhaseFirstEdge;
-    s_eink_lpspi_master_config.direction                       = kLPSPI_MsbFirst;
+    s_eink_lpspi_master_config.baudRate     = BSP_EINK_TRANSFER_WRITE_CLOCK;
+    s_eink_lpspi_master_config.bitsPerFrame = 8;
+    s_eink_lpspi_master_config.cpol         = kLPSPI_ClockPolarityActiveHigh;
+    s_eink_lpspi_master_config.cpha         = kLPSPI_ClockPhaseFirstEdge;
+    s_eink_lpspi_master_config.direction    = kLPSPI_MsbFirst;
 
-    s_eink_lpspi_master_config.pcsToSckDelayInNanoSec          = 1000000000 / s_eink_lpspi_master_config.baudRate;
-    s_eink_lpspi_master_config.lastSckToPcsDelayInNanoSec      = 1000000000 / s_eink_lpspi_master_config.baudRate;
-    s_eink_lpspi_master_config.betweenTransferDelayInNanoSec   = 1000000000 / s_eink_lpspi_master_config.baudRate;
+    s_eink_lpspi_master_config.pcsToSckDelayInNanoSec        = 1000000000 / s_eink_lpspi_master_config.baudRate;
+    s_eink_lpspi_master_config.lastSckToPcsDelayInNanoSec    = 1000000000 / s_eink_lpspi_master_config.baudRate;
+    s_eink_lpspi_master_config.betweenTransferDelayInNanoSec = 1000000000 / s_eink_lpspi_master_config.baudRate;
 
-    s_eink_lpspi_master_config.whichPcs                        = kLPSPI_Pcs0;
-    s_eink_lpspi_master_config.pcsActiveHighOrLow              = kLPSPI_PcsActiveLow;
+    s_eink_lpspi_master_config.whichPcs           = kLPSPI_Pcs0;
+    s_eink_lpspi_master_config.pcsActiveHighOrLow = kLPSPI_PcsActiveLow;
 
-    s_eink_lpspi_master_config.pinCfg                          = kLPSPI_SdiInSdoOut;
-    s_eink_lpspi_master_config.dataOutConfig                   = kLpspiDataOutRetained;
+    s_eink_lpspi_master_config.pinCfg        = kLPSPI_SdiInSdoOut;
+    s_eink_lpspi_master_config.dataOutConfig = kLpspiDataOutRetained;
 
     LPSPI_MasterInit(BSP_EINK_LPSPI_BASE, &s_eink_lpspi_master_config, GetPerphSourceClock(PerphClock_LPSPI));
 
     // fsl_lpspi doesn't support configuring autopcs feature
     BSP_EINK_LPSPI_BASE->CFGR1 |= LPSPI_CFGR1_AUTOPCS(0);
 
-    dmamux = DriverDMAMux::Create(static_cast<DMAMuxInstances >(BoardDefinitions ::EINK_DMAMUX),DriverDMAMuxParams{});
-    dma = DriverDMA::Create(static_cast<DMAInstances >(BoardDefinitions ::EINK_DMA),DriverDMAParams{});
+    dmamux = DriverDMAMux::Create(static_cast<DMAMuxInstances>(BoardDefinitions ::EINK_DMAMUX), DriverDMAMuxParams{});
+    dma    = DriverDMA::Create(static_cast<DMAInstances>(BoardDefinitions ::EINK_DMA), DriverDMAParams{});
 
+    txDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions ::EINK_TX_DMA_CHANNEL));
+    rxDMAHandle = dma->CreateHandle(static_cast<uint32_t>(BoardDefinitions ::EINK_RX_DMA_CHANNEL));
+    dmamux->Enable(static_cast<uint32_t>(BoardDefinitions ::EINK_TX_DMA_CHANNEL),
+                   BSP_EINK_LPSPI_DMA_TX_PERI_SEL); // TODO: M.P fix BSP_EINK_LPSPI_DMA_TX_PERI_SEL
+    dmamux->Enable(static_cast<uint32_t>(BoardDefinitions ::EINK_RX_DMA_CHANNEL),
+                   BSP_EINK_LPSPI_DMA_RX_PERI_SEL); // TODO: M.P fix BSP_EINK_LPSPI_DMA_RX_PERI_SEL
 
-    txDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions ::EINK_TX_DMA_CHANNEL));
-    rxDMAHandle = dma->CreateHandle(static_cast<uint32_t >(BoardDefinitions ::EINK_RX_DMA_CHANNEL));
-    dmamux->Enable(static_cast<uint32_t >(BoardDefinitions ::EINK_TX_DMA_CHANNEL),BSP_EINK_LPSPI_DMA_TX_PERI_SEL); // TODO: M.P fix BSP_EINK_LPSPI_DMA_TX_PERI_SEL
-    dmamux->Enable(static_cast<uint32_t >(BoardDefinitions ::EINK_RX_DMA_CHANNEL),BSP_EINK_LPSPI_DMA_RX_PERI_SEL); // TODO: M.P fix BSP_EINK_LPSPI_DMA_RX_PERI_SEL
-
-    BSP_EINK_LPSPI_EdmaDriverState.edmaTxDataToTxRegHandle = reinterpret_cast<edma_handle_t*>(txDMAHandle->GetHandle());
-    BSP_EINK_LPSPI_EdmaDriverState.edmaRxRegToRxDataHandle = reinterpret_cast<edma_handle_t*>(rxDMAHandle->GetHandle());
+    BSP_EINK_LPSPI_EdmaDriverState.edmaTxDataToTxRegHandle =
+        reinterpret_cast<edma_handle_t *>(txDMAHandle->GetHandle());
+    BSP_EINK_LPSPI_EdmaDriverState.edmaRxRegToRxDataHandle =
+        reinterpret_cast<edma_handle_t *>(rxDMAHandle->GetHandle());
 
     LPSPI_SetMasterSlaveMode(BSP_EINK_LPSPI_BASE, kLPSPI_Master);
     LPSPI_MasterTransferCreateHandleEDMA(BSP_EINK_LPSPI_BASE,
@@ -256,121 +255,114 @@ status_t BSP_EinkChangeSpiFrequency(uint32_t frequencyHz)
     uint32_t tcrPrescalerValue = 0;
 
     LPSPI_Enable(BSP_EINK_LPSPI_BASE, false);
-    LPSPI_MasterSetBaudRate(BSP_EINK_LPSPI_BASE, frequencyHz, GetPerphSourceClock(PerphClock_LPSPI), &tcrPrescalerValue);
+    LPSPI_MasterSetBaudRate(
+        BSP_EINK_LPSPI_BASE, frequencyHz, GetPerphSourceClock(PerphClock_LPSPI), &tcrPrescalerValue);
 
     s_eink_lpspi_master_config.baudRate = frequencyHz;
-    BSP_EINK_LPSPI_BASE->TCR =  LPSPI_TCR_CPOL(s_eink_lpspi_master_config.cpol) | LPSPI_TCR_CPHA(s_eink_lpspi_master_config.cpha) |
-                                LPSPI_TCR_LSBF(s_eink_lpspi_master_config.direction) | LPSPI_TCR_FRAMESZ(s_eink_lpspi_master_config.bitsPerFrame - 1) |
-                                LPSPI_TCR_PRESCALE(tcrPrescalerValue) | LPSPI_TCR_PCS(s_eink_lpspi_master_config.whichPcs);
+    BSP_EINK_LPSPI_BASE->TCR =
+        LPSPI_TCR_CPOL(s_eink_lpspi_master_config.cpol) | LPSPI_TCR_CPHA(s_eink_lpspi_master_config.cpha) |
+        LPSPI_TCR_LSBF(s_eink_lpspi_master_config.direction) |
+        LPSPI_TCR_FRAMESZ(s_eink_lpspi_master_config.bitsPerFrame - 1) | LPSPI_TCR_PRESCALE(tcrPrescalerValue) |
+        LPSPI_TCR_PCS(s_eink_lpspi_master_config.whichPcs);
 
     return 0;
 }
 
 void BSP_EinkDeinit(void)
 {
-//    LOG_WARN("Eink BSP DEINIT");
+    //    LOG_WARN("Eink BSP DEINIT");
     LPSPI_Enable(BSP_EINK_LPSPI_BASE, false);
 
-    if (bsp_eink_busySemaphore != NULL)
-    {
+    if (bsp_eink_busySemaphore != NULL) {
         vSemaphoreDelete(bsp_eink_busySemaphore);
         bsp_eink_busySemaphore = NULL;
     }
 
-    if (bsp_eink_TransferComplete != NULL)
-    {
+    if (bsp_eink_TransferComplete != NULL) {
         vQueueDelete(bsp_eink_TransferComplete);
         bsp_eink_TransferComplete = NULL;
     }
 
     pll.reset();
 
-    dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::EINK_TX_DMA_CHANNEL));
-    dmamux->Disable(static_cast<uint32_t >(BoardDefinitions ::EINK_RX_DMA_CHANNEL));
+    dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::EINK_TX_DMA_CHANNEL));
+    dmamux->Disable(static_cast<uint32_t>(BoardDefinitions ::EINK_RX_DMA_CHANNEL));
 
     dma.reset();
     dmamux.reset();
 
-    gpio->DisableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
-    gpio->ClearPortInterrupts(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->ClearPortInterrupts(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
     gpio.reset();
 
-    //pll.reset(); TODO:M.P
+    // pll.reset(); TODO:M.P
 }
 
-status_t BSP_EinkWriteData(void* txBuffer, uint32_t len, eink_spi_cs_config_e cs)
+status_t BSP_EinkWriteData(void *txBuffer, uint32_t len, eink_spi_cs_config_e cs)
 {
-    const uint32_t  TX_TIMEOUT_MS = 1000;
-	status_t tx_status = 0;
-	status_t status;
+    const uint32_t TX_TIMEOUT_MS = 1000;
+    status_t tx_status           = 0;
+    status_t status;
     lpspi_transfer_t xfer = {0};
 
-    if (cs == SPI_AUTOMATIC_CS)
-    {
+    if (cs == SPI_AUTOMATIC_CS) {
         BSP_EinkWriteCS(BSP_Eink_CS_Clr);
     }
 
-    uint8_t     loopCnt     = (len / (DMA_MAX_SINGLE_TRANSACTION_PAYLOAD + 1)) + 1;
-    uint32_t    frameSize   = 0;
-    uint32_t    bytesSent   = 0;
+    uint8_t loopCnt    = (len / (DMA_MAX_SINGLE_TRANSACTION_PAYLOAD + 1)) + 1;
+    uint32_t frameSize = 0;
+    uint32_t bytesSent = 0;
 
     // Increase the SPI frequency to the SPI WRITE value
     BSP_EinkChangeSpiFrequency(BSP_EINK_TRANSFER_WRITE_CLOCK);
 
-    BSP_EINK_LPSPI_EdmaDriverState.chipselectConf = cs;
+    BSP_EINK_LPSPI_EdmaDriverState.chipselectConf   = cs;
     BSP_EINK_LPSPI_EdmaDriverState.handle->userData = &BSP_EINK_LPSPI_EdmaDriverState;
 
     // Clean the TX complete queue
     xQueueReset(bsp_eink_TransferComplete);
     // Clear the BUSY Pin IRQ Flag
-    gpio->ClearPortInterrupts(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->ClearPortInterrupts(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
     // Enable the BUSY Pin IRQ
-    gpio->EnableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
-    // Take the BUSY semaphore without timeout just in case the transmission makes the BUSY pin state change. It enables the
-    // driver to block then on the bsp_eink_busySemaphore until the BUSY pin is deasserted
+    gpio->EnableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
+    // Take the BUSY semaphore without timeout just in case the transmission makes the BUSY pin state change. It enables
+    // the driver to block then on the bsp_eink_busySemaphore until the BUSY pin is deasserted
     xSemaphoreTake(bsp_eink_busySemaphore, 0);
 
     // The MAJOR loop of the DMA can be maximum of value 32767
-    for (uint8_t i = 0; i < loopCnt; ++i)
-    {
-        if (len > DMA_MAX_SINGLE_TRANSACTION_PAYLOAD)
-        {
+    for (uint8_t i = 0; i < loopCnt; ++i) {
+        if (len > DMA_MAX_SINGLE_TRANSACTION_PAYLOAD) {
             frameSize = DMA_MAX_SINGLE_TRANSACTION_PAYLOAD;
         }
-        else
-        {
+        else {
             frameSize = len;
         }
 
-        xfer.rxData         = NULL;
-        xfer.txData         = (uint8_t *)txBuffer + bytesSent;
-        xfer.dataSize       = frameSize;
-        xfer.configFlags    = /*RTE_SPI1_MASTER_PCS_PIN_SEL |*/ kLPSPI_MasterByteSwap | kLPSPI_MasterPcsContinuous;
+        xfer.rxData      = NULL;
+        xfer.txData      = (uint8_t *)txBuffer + bytesSent;
+        xfer.dataSize    = frameSize;
+        xfer.configFlags = /*RTE_SPI1_MASTER_PCS_PIN_SEL |*/ kLPSPI_MasterByteSwap | kLPSPI_MasterPcsContinuous;
 
         SCB_CleanInvalidateDCache();
-        status = LPSPI_MasterTransferEDMA(BSP_EINK_LPSPI_EdmaDriverState.resource->base, BSP_EINK_LPSPI_EdmaDriverState.handle, &xfer);
+        status = LPSPI_MasterTransferEDMA(
+            BSP_EINK_LPSPI_EdmaDriverState.resource->base, BSP_EINK_LPSPI_EdmaDriverState.handle, &xfer);
 
-        if(status != kStatus_Success)
-        {
-//            LOG_ERROR("Eink SPI transfer failed with reason: %d",status);
-            //in case of error just flush transfer complete queue
+        if (status != kStatus_Success) {
+            //            LOG_ERROR("Eink SPI transfer failed with reason: %d",status);
+            // in case of error just flush transfer complete queue
             xQueueReset(bsp_eink_TransferComplete);
 
-            if (cs == SPI_AUTOMATIC_CS)
-            {
+            if (cs == SPI_AUTOMATIC_CS) {
                 BSP_EinkWriteCS(BSP_Eink_CS_Set);
             }
 
             return status;
         }
-        else
-        {
-            if(xQueueReceive(bsp_eink_TransferComplete, &tx_status, pdMS_TO_TICKS(TX_TIMEOUT_MS)) != pdPASS)
-            {
-                //sth really bad happened
-//                LOG_ERROR("Timeout: The Eink SPI transfer did not complete in time");
-                if (cs == SPI_AUTOMATIC_CS)
-                {
+        else {
+            if (xQueueReceive(bsp_eink_TransferComplete, &tx_status, pdMS_TO_TICKS(TX_TIMEOUT_MS)) != pdPASS) {
+                // sth really bad happened
+                //                LOG_ERROR("Timeout: The Eink SPI transfer did not complete in time");
+                if (cs == SPI_AUTOMATIC_CS) {
                     BSP_EinkWriteCS(BSP_Eink_CS_Set);
                 }
 
@@ -379,86 +371,78 @@ status_t BSP_EinkWriteData(void* txBuffer, uint32_t len, eink_spi_cs_config_e cs
         }
 
         bytesSent += frameSize;
-        len       -= frameSize;
+        len -= frameSize;
     }
 
-    if (len > 0)
-    {
-//        LOG_ERROR("EINK: Some data not transfered: [%d] bytes", len);
+    if (len > 0) {
+        //        LOG_ERROR("EINK: Some data not transfered: [%d] bytes", len);
     }
 
-    if (cs == SPI_AUTOMATIC_CS)
-    {
+    if (cs == SPI_AUTOMATIC_CS) {
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
     }
 
     return tx_status;
 }
 
-status_t BSP_EinkReadData(void* rxBuffer, uint32_t len, eink_spi_cs_config_e cs)
+status_t BSP_EinkReadData(void *rxBuffer, uint32_t len, eink_spi_cs_config_e cs)
 {
     const int RX_TIMEOUT_MS = 1000;
-	status_t tx_status = 0;
+    status_t tx_status      = 0;
     status_t status;
     lpspi_transfer_t xfer = {0};
 
-    xfer.txData = NULL;
-    xfer.rxData = (uint8_t *)rxBuffer;
-    xfer.dataSize = len;
+    xfer.txData      = NULL;
+    xfer.rxData      = (uint8_t *)rxBuffer;
+    xfer.dataSize    = len;
     xfer.configFlags = /*RTE_SPI1_MASTER_PCS_PIN_SEL |*/ kLPSPI_MasterByteSwap | kLPSPI_MasterPcsContinuous;
 
-    if (cs == SPI_AUTOMATIC_CS)
-    {
-    	BSP_EinkWriteCS(BSP_Eink_CS_Clr);
+    if (cs == SPI_AUTOMATIC_CS) {
+        BSP_EinkWriteCS(BSP_Eink_CS_Clr);
     }
 
     // Slow down the SPI clock for the value proper for the read operation
     BSP_EinkChangeSpiFrequency(BSP_EINK_TRANSFER_READ_CLOCK);
 
-    BSP_EINK_LPSPI_EdmaDriverState.chipselectConf = cs;
+    BSP_EINK_LPSPI_EdmaDriverState.chipselectConf   = cs;
     BSP_EINK_LPSPI_EdmaDriverState.handle->userData = &BSP_EINK_LPSPI_EdmaDriverState;
 
     // Clean the TX complete queue
     xQueueReset(bsp_eink_TransferComplete);
     // Clear the BUSY Pin IRQ Flag
-    gpio->ClearPortInterrupts(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
+    gpio->ClearPortInterrupts(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
     // Enable the BUSY Pin IRQ
-    gpio->EnableInterrupt(1 << static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
-    // Take the BUSY semaphore without timeout just in case the transmission makes the BUSY pin state change. It enables the
-    // driver to block then on the bsp_eink_busySemaphore until the BUSY pin is deasserted
+    gpio->EnableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
+    // Take the BUSY semaphore without timeout just in case the transmission makes the BUSY pin state change. It enables
+    // the driver to block then on the bsp_eink_busySemaphore until the BUSY pin is deasserted
     xSemaphoreTake(bsp_eink_busySemaphore, 0);
 
-    status = LPSPI_MasterTransferEDMA(BSP_EINK_LPSPI_EdmaDriverState.resource->base, BSP_EINK_LPSPI_EdmaDriverState.handle, &xfer);
-    if(status != kStatus_Success)
-    {
-//    	LOG_ERROR("eink transfer failed:%d",status);
-    	//in case of error just flush transfer complete queue
-    	uint32_t dummy = 0;
-    	xQueueReceive(bsp_eink_TransferComplete, &dummy, 0);
-        if (cs == SPI_AUTOMATIC_CS)
-        {
+    status = LPSPI_MasterTransferEDMA(
+        BSP_EINK_LPSPI_EdmaDriverState.resource->base, BSP_EINK_LPSPI_EdmaDriverState.handle, &xfer);
+    if (status != kStatus_Success) {
+        //    	LOG_ERROR("eink transfer failed:%d",status);
+        // in case of error just flush transfer complete queue
+        uint32_t dummy = 0;
+        xQueueReceive(bsp_eink_TransferComplete, &dummy, 0);
+        if (cs == SPI_AUTOMATIC_CS) {
             BSP_EinkWriteCS(BSP_Eink_CS_Set);
         }
 
-    	return status;
+        return status;
     }
-    else
-    {
-    	if(xQueueReceive(bsp_eink_TransferComplete, &tx_status, pdMS_TO_TICKS(RX_TIMEOUT_MS)) != pdPASS)
-    	{
-            //sth really bad happened
-//            LOG_ERROR("Timeout: The Eink SPI read operation did not complete in time");
-            if (cs == SPI_AUTOMATIC_CS)
-            {
+    else {
+        if (xQueueReceive(bsp_eink_TransferComplete, &tx_status, pdMS_TO_TICKS(RX_TIMEOUT_MS)) != pdPASS) {
+            // sth really bad happened
+            //            LOG_ERROR("Timeout: The Eink SPI read operation did not complete in time");
+            if (cs == SPI_AUTOMATIC_CS) {
                 BSP_EinkWriteCS(BSP_Eink_CS_Set);
             }
 
             return -1;
-    	}
+        }
     }
 
-    if (cs == SPI_AUTOMATIC_CS)
-    {
+    if (cs == SPI_AUTOMATIC_CS) {
         BSP_EinkWriteCS(BSP_Eink_CS_Set);
     }
 
@@ -467,74 +451,64 @@ status_t BSP_EinkReadData(void* rxBuffer, uint32_t len, eink_spi_cs_config_e cs)
 
 uint8_t BSP_EinkWaitUntilDisplayBusy(uint32_t timeout)
 {
-	uint8_t ret = 0;
+    uint8_t ret                                  = 0;
     BSP_EINK_LPSPI_EdmaDriverState.eventRegister = EventWaitRegistered;
-	if(xSemaphoreTake(bsp_eink_busySemaphore,timeout) != pdPASS)
-	{
-		ret = 0;
-	}else
-	{
-		xSemaphoreGive(bsp_eink_busySemaphore);
-		ret = 1;
-	}
+    if (xSemaphoreTake(bsp_eink_busySemaphore, timeout) != pdPASS) {
+        ret = 0;
+    }
+    else {
+        xSemaphoreGive(bsp_eink_busySemaphore);
+        ret = 1;
+    }
 
-	BSP_EINK_LPSPI_EdmaDriverState.eventRegister = EventWaitNotRegistered;
-	return ret;
+    BSP_EINK_LPSPI_EdmaDriverState.eventRegister = EventWaitNotRegistered;
+    return ret;
 }
 
 void BSP_EinkResetDisplayController(void)
 {
     BSP_EinkWriteCS(BSP_Eink_CS_Set);
 
-    gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::EINK_RESET_PIN),0);
-	vTaskDelay(10);
-    gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::EINK_RESET_PIN),1);
-	vTaskDelay(10);
+    gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::EINK_RESET_PIN), 0);
+    vTaskDelay(10);
+    gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::EINK_RESET_PIN), 1);
+    vTaskDelay(10);
 }
 
 void BSP_EinkWriteCS(bsp_eink_cs_ctrl_t ctrl)
 {
-	if(ctrl == BSP_Eink_CS_Clr)
-	{
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::EINK_CS_PIN),0);
-	}
-	else
-    if(ctrl == BSP_Eink_CS_Set)
-    {
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::EINK_CS_PIN),1);
-	}
-    else
-    {
-//		LOG_ERROR("Invalid control request");
-		return;
-	}
+    if (ctrl == BSP_Eink_CS_Clr) {
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::EINK_CS_PIN), 0);
+    }
+    else if (ctrl == BSP_Eink_CS_Set) {
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::EINK_CS_PIN), 1);
+    }
+    else {
+        //		LOG_ERROR("Invalid control request");
+        return;
+    }
 }
 
 BaseType_t BSP_EinkBusyPinStateChangeHandler(void)
 {
-	BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
     /* Give semaphore only if something is waiting on it */
-    if(BSP_EINK_LPSPI_EdmaDriverState.eventRegister == EventWaitRegistered)
-    {
-        gpio->DisableInterrupt(1<< static_cast<uint32_t >(BoardDefinitions::EINK_BUSY_PIN));
+    if (BSP_EINK_LPSPI_EdmaDriverState.eventRegister == EventWaitRegistered) {
+        gpio->DisableInterrupt(1 << static_cast<uint32_t>(BoardDefinitions::EINK_BUSY_PIN));
 
-        if(xSemaphoreGiveFromISR(bsp_eink_busySemaphore,&xHigherPriorityTaskWoken) != pdPASS)
-        {
-        	//shouldn't get here!
-            //LOG_IRQ_ERROR("Could not clear the BUSY semaphore");
+        if (xSemaphoreGiveFromISR(bsp_eink_busySemaphore, &xHigherPriorityTaskWoken) != pdPASS) {
+            // shouldn't get here!
+            // LOG_IRQ_ERROR("Could not clear the BUSY semaphore");
         }
 
-        //call user defined "eink not busy" event
-        if(BSP_EINK_LPSPI_EdmaDriverState.event)
-        {
-        	BSP_EINK_LPSPI_EdmaDriverState.event();
+        // call user defined "eink not busy" event
+        if (BSP_EINK_LPSPI_EdmaDriverState.event) {
+            BSP_EINK_LPSPI_EdmaDriverState.event();
         }
-
     }
-    else
-    {
-    	//LOG_IRQ_INFO("Busy asserted without wait event registered");
+    else {
+        // LOG_IRQ_INFO("Busy asserted without wait event registered");
     }
 
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
diff --git a/module-bsp/board/rt1051/bsp/eink/bsp_eink.h b/module-bsp/board/rt1051/bsp/eink/bsp_eink.h
index 8b76cb7c1..a42012db9 100644
--- a/module-bsp/board/rt1051/bsp/eink/bsp_eink.h
+++ b/module-bsp/board/rt1051/bsp/eink/bsp_eink.h
@@ -15,37 +15,37 @@
 #include "FreeRTOS.h"
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
-typedef enum
-{
-    SPI_AUTOMATIC_CS,
-    SPI_MANUAL_CS
-}eink_spi_cs_config_e;
+    typedef enum
+    {
+        SPI_AUTOMATIC_CS,
+        SPI_MANUAL_CS
+    } eink_spi_cs_config_e;
 
-typedef enum
-{
-	BSP_Eink_CS_Clr = 0,
-	BSP_Eink_CS_Set = 1
-}bsp_eink_cs_ctrl_t;
+    typedef enum
+    {
+        BSP_Eink_CS_Clr = 0,
+        BSP_Eink_CS_Set = 1
+    } bsp_eink_cs_ctrl_t;
 
-typedef void (*bsp_eink_BusyEvent)(void);
+    typedef void (*bsp_eink_BusyEvent)(void);
 
+#define BSP_EINK_TRANSFER_TIMEOUT_MS 1000
 
-#define BSP_EINK_TRANSFER_TIMEOUT_MS        1000
+    status_t BSP_EinkInit(bsp_eink_BusyEvent event);
+    void BSP_EinkDeinit(void);
+    void BSP_EinkWriteCS(bsp_eink_cs_ctrl_t ctrl);
+    uint8_t BSP_EinkWaitUntilDisplayBusy(uint32_t timeout);
+    void BSP_EinkResetDisplayController(void);
 
-status_t BSP_EinkInit(bsp_eink_BusyEvent event);
-void BSP_EinkDeinit(void);
-void BSP_EinkWriteCS(bsp_eink_cs_ctrl_t ctrl);
-uint8_t BSP_EinkWaitUntilDisplayBusy(uint32_t timeout);
-void BSP_EinkResetDisplayController(void);
+    status_t BSP_EinkChangeSpiFrequency(uint32_t frequencyHz);
+    status_t BSP_EinkWriteData(void *txBuffer, uint32_t len, eink_spi_cs_config_e cs);
+    status_t BSP_EinkReadData(void *rxBuffer, uint32_t len, eink_spi_cs_config_e cs);
 
-status_t BSP_EinkChangeSpiFrequency(uint32_t frequencyHz);
-status_t BSP_EinkWriteData(void* txBuffer, uint32_t len, eink_spi_cs_config_e cs);
-status_t BSP_EinkReadData(void* rxBuffer, uint32_t len, eink_spi_cs_config_e cs);
-
-BaseType_t BSP_EinkBusyPinStateChangeHandler(void);
+    BaseType_t BSP_EinkBusyPinStateChangeHandler(void);
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/bsp/eink/eink_binarization_luts.c b/module-bsp/board/rt1051/bsp/eink/eink_binarization_luts.c
index a895a9af1..536a1bba7 100644
--- a/module-bsp/board/rt1051/bsp/eink/eink_binarization_luts.c
+++ b/module-bsp/board/rt1051/bsp/eink/eink_binarization_luts.c
@@ -1,42 +1,35 @@
 #include <stdint-gcc.h>
 
-
 const uint8_t einkBinarizationLUT_2bpp[256] = {
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x3c, 0x3c, 0x3c, 0x3f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x3c, 0x3c, 0x3c, 0x3f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 
-    0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x3c, 0x3c, 0x3c, 0x3f, 
-    0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 
-    0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 
-    0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 
-    0xf0, 0xf0, 0xf0, 0xf3, 0xf0, 0xf0, 0xf0, 0xf3, 0xf0, 0xf0, 0xf0, 0xf3, 0xfc, 0xfc, 0xfc, 0xff, 
+    0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x00, 0x00, 0x00,
+    0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
+    0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30,
+    0x30, 0x30, 0x33, 0x3c, 0x3c, 0x3c, 0x3f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03,
+    0x0c, 0x0c, 0x0c, 0x0f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c,
+    0x0f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x30, 0x30,
+    0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x3c, 0x3c, 0x3c, 0x3f, 0x00, 0x00, 0x00, 0x03, 0x00,
+    0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03,
+    0x00, 0x00, 0x00, 0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+    0x03, 0x0c, 0x0c, 0x0c, 0x0f, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x30, 0x30, 0x30, 0x33, 0x3c, 0x3c,
+    0x3c, 0x3f, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 0xc0,
+    0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 0xc0, 0xc0, 0xc0, 0xc3,
+    0xc0, 0xc0, 0xc0, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0xcc, 0xcc, 0xcc, 0xcf, 0xf0, 0xf0, 0xf0, 0xf3, 0xf0, 0xf0, 0xf0,
+    0xf3, 0xf0, 0xf0, 0xf0, 0xf3, 0xfc, 0xfc, 0xfc, 0xff,
 };
 
-
 const uint8_t einkBinarizationLUT_4bpp[256] = {
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 
-    0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xff, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
+    0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xff,
 };
-
diff --git a/module-bsp/board/rt1051/bsp/harness/rt1051_harness.cpp b/module-bsp/board/rt1051/bsp/harness/rt1051_harness.cpp
index cd163b28f..0ded96c83 100644
--- a/module-bsp/board/rt1051/bsp/harness/rt1051_harness.cpp
+++ b/module-bsp/board/rt1051/bsp/harness/rt1051_harness.cpp
@@ -14,7 +14,7 @@
 #include "bsp/harness/bsp_pinmap.hpp"
 
 static StreamBufferHandle_t uartRxStreamBuffer = nullptr;
-static xQueueHandle qHandleIrq = NULL;
+static xQueueHandle qHandleIrq                 = NULL;
 
 extern "C"
 {
@@ -22,29 +22,25 @@ extern "C"
     {
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
-        uint32_t isrReg = LPUART_GetStatusFlags(LPUART3);
+        uint32_t isrReg               = LPUART_GetStatusFlags(LPUART3);
         static char characterReceived = 0;
-        if (qHandleIrq != NULL && uartRxStreamBuffer != NULL)
-        {
-            if (isrReg & kLPUART_RxDataRegFullFlag)
-            {
+        if (qHandleIrq != NULL && uartRxStreamBuffer != NULL) {
+            if (isrReg & kLPUART_RxDataRegFullFlag) {
                 characterReceived = LPUART_ReadByte(LPUART3);
 
-                if (characterReceived == STX)
-                {
+                if (characterReceived == STX) {
                     uint8_t stx = STX;
                     xQueueSendFromISR(qHandleIrq, &stx, &xHigherPriorityTaskWoken);
                     portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
                 }
-                else if (characterReceived == ETX)
-                {
+                else if (characterReceived == ETX) {
                     uint8_t etx = ETX;
                     xQueueSendFromISR(qHandleIrq, &etx, &xHigherPriorityTaskWoken);
                     portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
                 }
-                else
-                {
-                    xStreamBufferSendFromISR(uartRxStreamBuffer, (void *)&characterReceived, 1, &xHigherPriorityTaskWoken);
+                else {
+                    xStreamBufferSendFromISR(
+                        uartRxStreamBuffer, (void *)&characterReceived, 1, &xHigherPriorityTaskWoken);
                     // port switching ignored here... just do read when told
                 }
             }
@@ -57,22 +53,21 @@ int hwInit(xQueueHandle qHandle)
 {
     LOG_DEBUG("Initialize test harness!");
     const static uint32_t rxStreamBufferLength = 1024;
-    uartRxStreamBuffer = xStreamBufferCreate(rxStreamBufferLength, 2);
-    qHandleIrq = qHandle;
+    uartRxStreamBuffer                         = xStreamBufferCreate(rxStreamBufferLength, 2);
+    qHandleIrq                                 = qHandle;
     lpuart_config_t s_harnessConfig;
     LPUART_GetDefaultConfig(&s_harnessConfig);
     const static uint32_t baudrate = 115200;
-    s_harnessConfig.baudRate_Bps = baudrate;
-    s_harnessConfig.dataBitsCount = kLPUART_EightDataBits;
-    s_harnessConfig.parityMode = kLPUART_ParityDisabled;
-    s_harnessConfig.isMsb = false;
-    s_harnessConfig.rxIdleType = kLPUART_IdleTypeStartBit;
-    s_harnessConfig.rxIdleConfig = kLPUART_IdleCharacter1;
-    s_harnessConfig.enableTx = false;
-    s_harnessConfig.enableRx = false;
+    s_harnessConfig.baudRate_Bps   = baudrate;
+    s_harnessConfig.dataBitsCount  = kLPUART_EightDataBits;
+    s_harnessConfig.parityMode     = kLPUART_ParityDisabled;
+    s_harnessConfig.isMsb          = false;
+    s_harnessConfig.rxIdleType     = kLPUART_IdleTypeStartBit;
+    s_harnessConfig.rxIdleConfig   = kLPUART_IdleCharacter1;
+    s_harnessConfig.enableTx       = false;
+    s_harnessConfig.enableRx       = false;
 
-    if (LPUART_Init(LPUART3, &s_harnessConfig, GetPerphSourceClock(PerphClock_LPUART)) != kStatus_Success)
-    {
+    if (LPUART_Init(LPUART3, &s_harnessConfig, GetPerphSourceClock(PerphClock_LPUART)) != kStatus_Success) {
         LOG_FATAL("Could not initialize the uart!");
         return -1;
     }
@@ -91,21 +86,19 @@ int hwInit(xQueueHandle qHandle)
 
 std::string hwRead()
 {
-    static size_t oldsize = 0;
+    static size_t oldsize   = 0;
     static const char *buff = nullptr;
-    size_t size = xStreamBufferBytesAvailable(uartRxStreamBuffer);
-    if (size > oldsize)
-    {
+    size_t size             = xStreamBufferBytesAvailable(uartRxStreamBuffer);
+    if (size > oldsize) {
         delete buff;
-        buff = new char[size];
+        buff    = new char[size];
         oldsize = size;
     }
     std::memset((void *)buff, 0, size);
     ssize_t ret = xStreamBufferReceive(uartRxStreamBuffer, (void *)buff, size, 0);
 
     std::string str(buff, buff + size);
-    if (ret != str.size())
-    {
+    if (ret != str.size()) {
         LOG_ERROR("read error: %d vs %d", ret, str.size());
     }
     str.shrink_to_fit();
diff --git a/module-bsp/board/rt1051/bsp/harness/rt1051_harness_gpio.cpp b/module-bsp/board/rt1051/bsp/harness/rt1051_harness_gpio.cpp
index 9050cfb3a..122e0225b 100644
--- a/module-bsp/board/rt1051/bsp/harness/rt1051_harness_gpio.cpp
+++ b/module-bsp/board/rt1051/bsp/harness/rt1051_harness_gpio.cpp
@@ -7,8 +7,7 @@ using namespace bsp::harness::gpio;
 
 void hwGpioWrite(Pin pin, uint32_t state)
 {
-    switch (pin)
-    {
+    switch (pin) {
     case Pin::SIM_PRESENCE:
         GPIO_PinWrite(BSP_CELLULAR_SIM_CARD_PRESENCE_PORT, BSP_CELLULAR_SIM_CARD_PRESENCE_PIN, state);
         break;
@@ -22,8 +21,7 @@ void hwGpioWrite(Pin pin, uint32_t state)
 
 bool hwGpioRead(Pin pin)
 {
-    switch (pin)
-    {
+    switch (pin) {
     case Pin::SIM_PRESENCE:
         return GPIO_PinRead(BSP_CELLULAR_SIM_CARD_PRESENCE_PORT, BSP_CELLULAR_SIM_CARD_PRESENCE_PIN) > 0;
     case Pin::SIM_SELECT:
diff --git a/module-bsp/board/rt1051/bsp/keyboard/TCA8418.h b/module-bsp/board/rt1051/bsp/keyboard/TCA8418.h
index af06e98a6..ff9892ae8 100644
--- a/module-bsp/board/rt1051/bsp/keyboard/TCA8418.h
+++ b/module-bsp/board/rt1051/bsp/keyboard/TCA8418.h
@@ -4,7 +4,7 @@
  * @date 29 aug 2018
  * @brief Basic IO driver for TCA8418 keyboard controller
  * @copyright Copyright (C) 2018 mudita.com.
- * @details 
+ * @details
  */
 
 #ifndef INCLUDE_TCA8418_H_
@@ -15,87 +15,86 @@
 #include "fsl_common.h"
 
 /* TCA8418 I2C bus address */
-#define TCA8418_I2C_ADDRESS     (0x34)
+#define TCA8418_I2C_ADDRESS      (0x34)
 #define TCA8418_I2C_ADDRESS_SIZE 1
-#define TCA8418_ROWS_COUNT	7
-#define TCA8418_COL_COUNT	4
+#define TCA8418_ROWS_COUNT       7
+#define TCA8418_COL_COUNT        4
 
 /* TCA8418 hardware limits */
-#define TCA8418_MAX_ROWS	8
-#define TCA8418_MAX_COLS	10
+#define TCA8418_MAX_ROWS 8
+#define TCA8418_MAX_COLS 10
 
 #define BIT(x) (1 << (x))
 
 /* TCA8418 bit definitions */
-#define CFG_AI          BIT(7)
-#define CFG_GPI_E_CFG       BIT(6)
-#define CFG_OVR_FLOW_M      BIT(5)
-#define CFG_INT_CFG     BIT(4)
-#define CFG_OVR_FLOW_IEN    BIT(3)
-#define CFG_K_LCK_IEN       BIT(2)
-#define CFG_GPI_IEN     BIT(1)
-#define CFG_KE_IEN      BIT(0)
+#define CFG_AI           BIT(7)
+#define CFG_GPI_E_CFG    BIT(6)
+#define CFG_OVR_FLOW_M   BIT(5)
+#define CFG_INT_CFG      BIT(4)
+#define CFG_OVR_FLOW_IEN BIT(3)
+#define CFG_K_LCK_IEN    BIT(2)
+#define CFG_GPI_IEN      BIT(1)
+#define CFG_KE_IEN       BIT(0)
 
-#define INT_STAT_CAD_INT    BIT(4)
-#define INT_STAT_OVR_FLOW_INT   BIT(3)
-#define INT_STAT_K_LCK_INT  BIT(2)
-#define INT_STAT_GPI_INT    BIT(1)
-#define INT_STAT_K_INT      BIT(0)
+#define INT_STAT_CAD_INT      BIT(4)
+#define INT_STAT_OVR_FLOW_INT BIT(3)
+#define INT_STAT_K_LCK_INT    BIT(2)
+#define INT_STAT_GPI_INT      BIT(1)
+#define INT_STAT_K_INT        BIT(0)
 
-#define KEY_LCK_EC          BIT(6)
+#define KEY_LCK_EC BIT(6)
 
 /* TCA8418 register masks */
-#define KEY_LCK_EC_KEC      0x7
-#define KEY_EVENT_CODE      0x7f
-#define KEY_EVENT_VALUE     0x80
+#define KEY_LCK_EC_KEC  0x7
+#define KEY_EVENT_CODE  0x7f
+#define KEY_EVENT_VALUE 0x80
 
 /* TCA8418 register definitions */
-#define REG_CFG         0x01
-#define REG_INT_STAT        0x02
-#define REG_KEY_LCK_EC      0x03
-#define REG_KEY_EVENT_A     0x04
-#define REG_KEY_EVENT_B     0x05
-#define REG_KEY_EVENT_C     0x06
-#define REG_KEY_EVENT_D     0x07
-#define REG_KEY_EVENT_E     0x08
-#define REG_KEY_EVENT_F     0x09
-#define REG_KEY_EVENT_G     0x0A
-#define REG_KEY_EVENT_H     0x0B
-#define REG_KEY_EVENT_I     0x0C
-#define REG_KEY_EVENT_J     0x0D
-#define REG_KP_LCK_TIMER    0x0E
-#define REG_UNLOCK1     0x0F
-#define REG_UNLOCK2     0x10
-#define REG_GPIO_INT_STAT1  0x11
-#define REG_GPIO_INT_STAT2  0x12
-#define REG_GPIO_INT_STAT3  0x13
-#define REG_GPIO_DAT_STAT1  0x14
-#define REG_GPIO_DAT_STAT2  0x15
-#define REG_GPIO_DAT_STAT3  0x16
-#define REG_GPIO_DAT_OUT1   0x17
-#define REG_GPIO_DAT_OUT2   0x18
-#define REG_GPIO_DAT_OUT3   0x19
-#define REG_GPIO_INT_EN1    0x1A
-#define REG_GPIO_INT_EN2    0x1B
-#define REG_GPIO_INT_EN3    0x1C
-#define REG_KP_GPIO1        0x1D
-#define REG_KP_GPIO2        0x1E
-#define REG_KP_GPIO3        0x1F
-#define REG_GPI_EM1     0x20
-#define REG_GPI_EM2     0x21
-#define REG_GPI_EM3     0x22
-#define REG_GPIO_DIR1       0x23
-#define REG_GPIO_DIR2       0x24
-#define REG_GPIO_DIR3       0x25
-#define REG_GPIO_INT_LVL1   0x26
-#define REG_GPIO_INT_LVL2   0x27
-#define REG_GPIO_INT_LVL3   0x28
-#define REG_DEBOUNCE_DIS1   0x29
-#define REG_DEBOUNCE_DIS2   0x2A
-#define REG_DEBOUNCE_DIS3   0x2B
-#define REG_GPIO_PULL1      0x2C
-#define REG_GPIO_PULL2      0x2D
-#define REG_GPIO_PULL3      0x2E
-
+#define REG_CFG            0x01
+#define REG_INT_STAT       0x02
+#define REG_KEY_LCK_EC     0x03
+#define REG_KEY_EVENT_A    0x04
+#define REG_KEY_EVENT_B    0x05
+#define REG_KEY_EVENT_C    0x06
+#define REG_KEY_EVENT_D    0x07
+#define REG_KEY_EVENT_E    0x08
+#define REG_KEY_EVENT_F    0x09
+#define REG_KEY_EVENT_G    0x0A
+#define REG_KEY_EVENT_H    0x0B
+#define REG_KEY_EVENT_I    0x0C
+#define REG_KEY_EVENT_J    0x0D
+#define REG_KP_LCK_TIMER   0x0E
+#define REG_UNLOCK1        0x0F
+#define REG_UNLOCK2        0x10
+#define REG_GPIO_INT_STAT1 0x11
+#define REG_GPIO_INT_STAT2 0x12
+#define REG_GPIO_INT_STAT3 0x13
+#define REG_GPIO_DAT_STAT1 0x14
+#define REG_GPIO_DAT_STAT2 0x15
+#define REG_GPIO_DAT_STAT3 0x16
+#define REG_GPIO_DAT_OUT1  0x17
+#define REG_GPIO_DAT_OUT2  0x18
+#define REG_GPIO_DAT_OUT3  0x19
+#define REG_GPIO_INT_EN1   0x1A
+#define REG_GPIO_INT_EN2   0x1B
+#define REG_GPIO_INT_EN3   0x1C
+#define REG_KP_GPIO1       0x1D
+#define REG_KP_GPIO2       0x1E
+#define REG_KP_GPIO3       0x1F
+#define REG_GPI_EM1        0x20
+#define REG_GPI_EM2        0x21
+#define REG_GPI_EM3        0x22
+#define REG_GPIO_DIR1      0x23
+#define REG_GPIO_DIR2      0x24
+#define REG_GPIO_DIR3      0x25
+#define REG_GPIO_INT_LVL1  0x26
+#define REG_GPIO_INT_LVL2  0x27
+#define REG_GPIO_INT_LVL3  0x28
+#define REG_DEBOUNCE_DIS1  0x29
+#define REG_DEBOUNCE_DIS2  0x2A
+#define REG_DEBOUNCE_DIS3  0x2B
+#define REG_GPIO_PULL1     0x2C
+#define REG_GPIO_PULL2     0x2D
+#define REG_GPIO_PULL3     0x2E
 
 #endif /*INCLUDE_TCA8418_H_*/
diff --git a/module-bsp/board/rt1051/bsp/keyboard/keyboard.cpp b/module-bsp/board/rt1051/bsp/keyboard/keyboard.cpp
index 126429ab2..3d0c9c2e6 100644
--- a/module-bsp/board/rt1051/bsp/keyboard/keyboard.cpp
+++ b/module-bsp/board/rt1051/bsp/keyboard/keyboard.cpp
@@ -1,11 +1,11 @@
 /*
-*  @file bsp_keyboard.c
-*  @author Mateusz Piesta (mateusz.piesta@mudita.com)
-*  @date 25 oct 2018
-*  @brief Keyboard BSP implementation
-*  @copyright Copyright (C) 2018 mudita.com
-*  @details
-*/
+ *  @file bsp_keyboard.c
+ *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
+ *  @date 25 oct 2018
+ *  @brief Keyboard BSP implementation
+ *  @copyright Copyright (C) 2018 mudita.com
+ *  @details
+ */
 
 #include <stdio.h>
 #include <stdint.h>
@@ -26,55 +26,57 @@
 #include "drivers/i2c/DriverI2C.hpp"
 #include "drivers/gpio/DriverGPIO.hpp"
 
-namespace bsp {
+namespace bsp
+{
 
     using namespace drivers;
 
     static std::shared_ptr<drivers::DriverI2C> i2c;
-    static drivers::I2CAddress i2cAddr = {.deviceAddress=TCA8418_I2C_ADDRESS, .subAddressSize=TCA8418_I2C_ADDRESS_SIZE};
+    static drivers::I2CAddress i2cAddr = {.deviceAddress  = TCA8418_I2C_ADDRESS,
+                                          .subAddressSize = TCA8418_I2C_ADDRESS_SIZE};
     static std::shared_ptr<DriverGPIO> gpio;
 
+#define KEYBOARD_CONTACT_OSCILLATION_TIMEOUT_MS 20
 
-#define KEYBOARD_CONTACT_OSCILLATION_TIMEOUT_MS    20
-
-    static TimerHandle_t s_right_functional_check_timer = NULL;
+    static TimerHandle_t s_right_functional_check_timer   = NULL;
     static volatile uint8_t s_rigth_functional_last_state = 0;
 
     static void s_bsp_keyboard_right_functional_check_timer_cb(TimerHandle_t timer);
 
     static xQueueHandle qHandleIrq = NULL;
 
-    status_t keyboard_Init(xQueueHandle qHandle) {
+    status_t keyboard_Init(xQueueHandle qHandle)
+    {
 
-        i2c = DriverI2C::Create(static_cast<I2CInstances >(BoardDefinitions::KEYBOARD_I2C),
-                                                 DriverI2CParams{.baudrate=static_cast<uint32_t >(BoardDefinitions::KEYBOARD_I2C_BAUDRATE)});
+        i2c = DriverI2C::Create(
+            static_cast<I2CInstances>(BoardDefinitions::KEYBOARD_I2C),
+            DriverI2CParams{.baudrate = static_cast<uint32_t>(BoardDefinitions::KEYBOARD_I2C_BAUDRATE)});
 
-        gpio = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::KEYBOARD_GPIO),
-                                                   DriverGPIOParams{});
+        gpio = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::KEYBOARD_GPIO), DriverGPIOParams{});
 
         qHandleIrq = qHandle;
 
-        gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-                .irqMode=DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON)});
+        gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                          .irqMode  = DriverGPIOPinParams::InterruptMode::IntRisingOrFallingEdge,
+                                          .defLogic = 0,
+                                          .pin      = static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON)});
 
-        gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RESET_PIN)});
+        gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                          .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                          .defLogic = 0,
+                                          .pin      = static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RESET_PIN)});
 
-        gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Input,
-                .irqMode=DriverGPIOPinParams::InterruptMode::IntFallingEdge,
-                .defLogic = 0,
-                .pin = static_cast<uint32_t >(BoardDefinitions::KEYBOARD_IRQ_PIN)});
+        gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Input,
+                                          .irqMode  = DriverGPIOPinParams::InterruptMode::IntFallingEdge,
+                                          .defLogic = 0,
+                                          .pin      = static_cast<uint32_t>(BoardDefinitions::KEYBOARD_IRQ_PIN)});
 
-        uint32_t reg = 0;
+        uint32_t reg   = 0;
         status_t error = 0;
 
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RESET_PIN),0);
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RESET_PIN), 0);
         vTaskDelay(1);
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RESET_PIN),1);
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RESET_PIN), 1);
         vTaskDelay(10);
 
         /* Assemble a mask for row and column registers */
@@ -83,23 +85,23 @@ namespace bsp {
 
         /* Set registers to keypad mode */
         i2cAddr.subAddress = REG_KP_GPIO1;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-        reg = reg >> 8;
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
+        reg                = reg >> 8;
         i2cAddr.subAddress = REG_KP_GPIO2;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-        reg = reg >> 16;
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
+        reg                = reg >> 16;
         i2cAddr.subAddress = REG_KP_GPIO3;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
 
         /* Enable column debouncing */
         i2cAddr.subAddress = REG_DEBOUNCE_DIS1;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-        reg = reg >> 8;
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
+        reg                = reg >> 8;
         i2cAddr.subAddress = REG_DEBOUNCE_DIS2;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-        reg = reg >> 16;
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
+        reg                = reg >> 16;
         i2cAddr.subAddress = REG_DEBOUNCE_DIS3;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
 
         if (error != kStatus_Success) {
             return error;
@@ -108,73 +110,70 @@ namespace bsp {
         reg = CFG_INT_CFG | CFG_OVR_FLOW_IEN | CFG_KE_IEN;
         // Enable interrupts
         i2cAddr.subAddress = REG_CFG;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
 
         // Clear keys FIFO, IRQs
         uint8_t val = 0;
-        uint8_t i = 0;
+        uint8_t i   = 0;
 
         // Get key pressed/released count
         i2cAddr.subAddress = REG_KEY_LCK_EC;
-        i2c->Read(i2cAddr, (uint8_t *) &val, 1);
+        i2c->Read(i2cAddr, (uint8_t *)&val, 1);
 
         uint8_t key_count = val & 0xF;
         for (i = 0; i < key_count; i++) {
             i2cAddr.subAddress = REG_KEY_EVENT_A;
-            i2c->Read(i2cAddr, (uint8_t *) &val, 1);
+            i2c->Read(i2cAddr, (uint8_t *)&val, 1);
         }
 
-        //Clear all interrupts
+        // Clear all interrupts
         uint8_t dummy = 0xff;
 
         i2cAddr.subAddress = REG_INT_STAT;
-        i2c->Read(i2cAddr, (uint8_t *) &dummy, 1);
+        i2c->Read(i2cAddr, (uint8_t *)&dummy, 1);
 
-        //Clear all interrupts, even IRQs we didn't check (GPI, CAD, LCK)
-        reg = 0xff;
+        // Clear all interrupts, even IRQs we didn't check (GPI, CAD, LCK)
+        reg                = 0xff;
         i2cAddr.subAddress = REG_INT_STAT;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
 
         if (s_right_functional_check_timer == NULL) {
-            s_right_functional_check_timer = xTimerCreate(
-                    "RfKeyTim",
-                    pdMS_TO_TICKS(KEYBOARD_CONTACT_OSCILLATION_TIMEOUT_MS),
-                    false,
-                    NULL,
-                    s_bsp_keyboard_right_functional_check_timer_cb
-            );
+            s_right_functional_check_timer = xTimerCreate("RfKeyTim",
+                                                          pdMS_TO_TICKS(KEYBOARD_CONTACT_OSCILLATION_TIMEOUT_MS),
+                                                          false,
+                                                          NULL,
+                                                          s_bsp_keyboard_right_functional_check_timer_cb);
             if (s_right_functional_check_timer == NULL) {
                 return kStatus_Fail;
             }
         }
 
         /* Enable GPIO pin interrupt */
-        gpio->EnableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
-        gpio->EnableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_IRQ_PIN));
+        gpio->EnableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
+        gpio->EnableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_IRQ_PIN));
 
         return kStatus_Success;
     }
 
-
-    status_t keyboard_Deinit(void) {
+    status_t keyboard_Deinit(void)
+    {
 
         /* Disable GPIO pin interrupt */
-        gpio->DisableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
-        gpio->DisableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_IRQ_PIN));
+        gpio->DisableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
+        gpio->DisableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_IRQ_PIN));
 
-        gpio->ClearPortInterrupts(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
-        gpio->ClearPortInterrupts(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_IRQ_PIN));
+        gpio->ClearPortInterrupts(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
+        gpio->ClearPortInterrupts(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_IRQ_PIN));
 
-        //Clear all interrupts, even IRQs we didn't check (GPI, CAD, LCK)
-        uint8_t reg = 0xff;
+        // Clear all interrupts, even IRQs we didn't check (GPI, CAD, LCK)
+        uint8_t reg        = 0xff;
         i2cAddr.subAddress = REG_INT_STAT;
-        i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
+        i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
 
-        xTimerDelete(s_right_functional_check_timer,50);
+        xTimerDelete(s_right_functional_check_timer, 50);
         s_right_functional_check_timer = nullptr;
 
-        //Clear IRQ queue handle
+        // Clear IRQ queue handle
         qHandleIrq = NULL;
 
         i2c.reset();
@@ -183,66 +182,67 @@ namespace bsp {
         return kStatus_Success;
     }
 
-
-    void keyboard_get_data(const uint8_t &notification, uint8_t &event, uint8_t &code) {
+    void keyboard_get_data(const uint8_t &notification, uint8_t &event, uint8_t &code)
+    {
         if (notification & 0x01) {
             uint8_t retval = 0;
             // Read how many key events has been registered
             i2cAddr.subAddress = REG_KEY_LCK_EC;
-            i2c->Read(i2cAddr, (uint8_t *) &retval, 1);
+            i2c->Read(i2cAddr, (uint8_t *)&retval, 1);
 
             uint8_t events_count = retval & 0xF;
-            uint8_t i = 0;
+            uint8_t i            = 0;
             // Iterate over and parse each event
             for (i = 0; i < events_count; i++) {
-                uint8_t key = 0;
+                uint8_t key      = 0;
                 uint8_t rel_pres = 0;
 
                 i2cAddr.subAddress = REG_KEY_EVENT_A;
-                i2c->Read(i2cAddr, (uint8_t *) &retval, 1);
+                i2c->Read(i2cAddr, (uint8_t *)&retval, 1);
 
                 key = retval & 0x7F;
                 // rel_pres: 0 - key release, 1 - key press
                 rel_pres = (retval & 0x80) >> 7; // key release/pressed is stored on the last bit
 
-                if (rel_pres == 0) {
-                } else {
+                if (rel_pres == 0) {}
+                else {
                 }
-                code = key;
+                code  = key;
                 event = rel_pres;
             }
 
-            //Clear all interrupts
+            // Clear all interrupts
             uint8_t reg = 0xff;
 
             i2cAddr.subAddress = REG_INT_STAT;
-            i2c->Write(i2cAddr, (uint8_t *) &reg, 1);
-
+            i2c->Write(i2cAddr, (uint8_t *)&reg, 1);
         }
 
         if (notification & 0x02) {
 
-            code = static_cast<uint8_t>(bsp::KeyCodes::FnRight);
+            code  = static_cast<uint8_t>(bsp::KeyCodes::FnRight);
             event = static_cast<uint8_t>(KeyEvents::Pressed);
         }
 
         if (notification & 0x04) {
 
-            code = static_cast<uint8_t>(KeyCodes::FnRight);
+            code  = static_cast<uint8_t>(KeyCodes::FnRight);
             event = static_cast<uint8_t>(KeyEvents::Released);
         }
     }
 
-    BaseType_t keyboard_right_functional_IRQHandler(void) {
+    BaseType_t keyboard_right_functional_IRQHandler(void)
+    {
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-        gpio->ClearPortInterrupts(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
+        gpio->ClearPortInterrupts(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
 
         if (s_right_functional_check_timer != NULL) {
-            gpio->DisableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
+            gpio->DisableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
 
-            if (gpio->ReadPin(static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON)) == 0) {
+            if (gpio->ReadPin(static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON)) == 0) {
                 s_rigth_functional_last_state = 0;
-            } else {
+            }
+            else {
                 s_rigth_functional_last_state = 1;
             }
 
@@ -252,8 +252,8 @@ namespace bsp {
         return xHigherPriorityTaskWoken;
     }
 
-
-    BaseType_t keyboard_IRQHandler(void) {
+    BaseType_t keyboard_IRQHandler(void)
+    {
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
         if (qHandleIrq != NULL) {
             uint8_t val = 0x01;
@@ -262,9 +262,10 @@ namespace bsp {
         return xHigherPriorityTaskWoken;
     }
 
-    static void s_bsp_keyboard_right_functional_check_timer_cb(TimerHandle_t timer) {
-        uint8_t right_functional_current_state = GPIO_PinRead(BOARD_KEYBOARD_RF_BUTTON_PORT,
-                                                              BOARD_KEYBOARD_RF_BUTTON_PIN);
+    static void s_bsp_keyboard_right_functional_check_timer_cb(TimerHandle_t timer)
+    {
+        uint8_t right_functional_current_state =
+            GPIO_PinRead(BOARD_KEYBOARD_RF_BUTTON_PORT, BOARD_KEYBOARD_RF_BUTTON_PIN);
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
         xTimerStop(timer, 0);
 
@@ -276,7 +277,8 @@ namespace bsp {
                     uint8_t val = 0x02;
                     xQueueSendFromISR(qHandleIrq, &val, &xHigherPriorityTaskWoken);
                 }
-            } else {
+            }
+            else {
                 // RIGHT FUNCTIONAL RELEASED
                 if (qHandleIrq != NULL) {
                     uint8_t val = 0x04;
@@ -285,6 +287,6 @@ namespace bsp {
             }
         }
 
-        gpio->EnableInterrupt(1U << static_cast<uint32_t >(BoardDefinitions::KEYBOARD_RF_BUTTON));
+        gpio->EnableInterrupt(1U << static_cast<uint32_t>(BoardDefinitions::KEYBOARD_RF_BUTTON));
     }
-}
+} // namespace bsp
diff --git a/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.cpp b/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.cpp
index 210be5902..ab0623adc 100644
--- a/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.cpp
+++ b/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.cpp
@@ -2,75 +2,78 @@
  *  @file RT1051LPM.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 04.09.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051LPM.hpp"
 
 #include "board.h"
 #include "log/log.hpp"
 #include "bsp/BoardDefinitions.hpp"
 
-
-namespace bsp{
+namespace bsp
+{
 
     using namespace drivers;
 
-    RT1051LPM::RT1051LPM(){
-        gpio = DriverGPIO::Create(static_cast<GPIOInstances >(BoardDefinitions::POWER_SWITCH_HOLD_GPIO),
+    RT1051LPM::RT1051LPM()
+    {
+        gpio = DriverGPIO::Create(static_cast<GPIOInstances>(BoardDefinitions::POWER_SWITCH_HOLD_GPIO),
                                   DriverGPIOParams{});
 
-        gpio->ConfPin(DriverGPIOPinParams{.dir=DriverGPIOPinParams::Direction::Output,
-                .irqMode=DriverGPIOPinParams::InterruptMode::NoIntmode,
-                .defLogic = 1,
-                .pin = static_cast<uint32_t >(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON)});
-
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON),1);
+        gpio->ConfPin(DriverGPIOPinParams{.dir      = DriverGPIOPinParams::Direction::Output,
+                                          .irqMode  = DriverGPIOPinParams::InterruptMode::NoIntmode,
+                                          .defLogic = 1,
+                                          .pin = static_cast<uint32_t>(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON)});
 
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON), 1);
     }
 
-    int32_t RT1051LPM::Switch(const bsp::LowPowerMode::Mode mode) {
+    int32_t RT1051LPM::Switch(const bsp::LowPowerMode::Mode mode)
+    {
         currentMode = mode;
-        switch (mode){
-            case Mode ::FullSpeed:
-                return EnterFullSpeed();
-            case Mode ::LowPowerRun:
-                return EnterLowPowerRun();
-            case Mode ::LowPowerIdle:
-                return EnterLowPowerIdle();
-            case Mode ::Suspend:
-                return EnterSuspend();
-            default:
-                return 0;
+        switch (mode) {
+        case Mode ::FullSpeed:
+            return EnterFullSpeed();
+        case Mode ::LowPowerRun:
+            return EnterLowPowerRun();
+        case Mode ::LowPowerIdle:
+            return EnterLowPowerIdle();
+        case Mode ::Suspend:
+            return EnterSuspend();
+        default:
+            return 0;
         }
     }
 
-    int32_t RT1051LPM::PowerOff() {
-        gpio->WritePin(static_cast<uint32_t >(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON),0);
+    int32_t RT1051LPM::PowerOff()
+    {
+        gpio->WritePin(static_cast<uint32_t>(BoardDefinitions::POWER_SWITCH_HOLD_BUTTON), 0);
         return 0;
     }
 
-
-    int32_t RT1051LPM::EnterFullSpeed() {
+    int32_t RT1051LPM::EnterFullSpeed()
+    {
         LPM_EnterFullSpeed();
         return 0;
     }
 
-    int32_t RT1051LPM::EnterLowPowerRun() {
+    int32_t RT1051LPM::EnterLowPowerRun()
+    {
         LPM_EnterLowPowerRun();
         return 0;
     }
 
-    int32_t RT1051LPM::EnterLowPowerIdle() {
+    int32_t RT1051LPM::EnterLowPowerIdle()
+    {
         LPM_EnterLowPowerIdle();
         return 0;
     }
 
-    int32_t RT1051LPM::EnterSuspend() {
+    int32_t RT1051LPM::EnterSuspend()
+    {
         return 0;
     }
-}
+} // namespace bsp
diff --git a/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.hpp b/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.hpp
index 677a87f84..d35de4439 100644
--- a/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.hpp
+++ b/module-bsp/board/rt1051/bsp/lpm/RT1051LPM.hpp
@@ -2,27 +2,28 @@
  *  @file RT1051LPM.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 04.09.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051LPM_HPP
 #define PUREPHONE_RT1051LPM_HPP
 
 #include "bsp/lpm/bsp_lpm.hpp"
 #include "drivers/gpio/DriverGPIO.hpp"
 
-namespace bsp {
+namespace bsp
+{
 
-    class RT1051LPM : public LowPowerMode {
-    public:
+    class RT1051LPM : public LowPowerMode
+    {
+      public:
         RT1051LPM();
         int32_t Switch(const Mode mode) override final;
         int32_t PowerOff() override final;
-    private:
+
+      private:
         int32_t EnterLowPowerRun();
         int32_t EnterFullSpeed();
         int32_t EnterLowPowerIdle();
@@ -31,9 +32,6 @@ namespace bsp {
         std::shared_ptr<drivers::DriverGPIO> gpio;
     };
 
+} // namespace bsp
 
-
-}
-
-
-#endif //PUREPHONE_RT1051LPM_HPP
+#endif // PUREPHONE_RT1051LPM_HPP
diff --git a/module-bsp/board/rt1051/bsp/pit/pit.cpp b/module-bsp/board/rt1051/bsp/pit/pit.cpp
index 156ac9ee1..1e912cee8 100644
--- a/module-bsp/board/rt1051/bsp/pit/pit.cpp
+++ b/module-bsp/board/rt1051/bsp/pit/pit.cpp
@@ -7,7 +7,7 @@
 
 struct PIT_t
 {
-    uint32_t usec = 1000000;
+    uint32_t usec        = 1000000;
     xQueueHandle qhandle = nullptr;
     std::function<void()> irq_cb;
 };
@@ -75,8 +75,7 @@ extern "C"
     void PIT_IRQHandler(void)
     {
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-        if (LPIT.qhandle)
-        {
+        if (LPIT.qhandle) {
             auto val = bsp::pit::Event::Overflow;
             xQueueSendFromISR(LPIT.qhandle, &val, &xHigherPriorityTaskWoken);
         }
diff --git a/module-bsp/board/rt1051/bsp/pwr/lpm.c b/module-bsp/board/rt1051/bsp/pwr/lpm.c
index 32c516a4d..bdef3f976 100644
--- a/module-bsp/board/rt1051/bsp/pwr/lpm.c
+++ b/module-bsp/board/rt1051/bsp/pwr/lpm.c
@@ -37,7 +37,7 @@
  * configTICK_RATE_HZ.
  */
 #define LPM_SYSTICK_COUNTER_FREQ (32768)
-#define LPM_COUNT_PER_TICK (LPM_SYSTICK_COUNTER_FREQ / configTICK_RATE_HZ)
+#define LPM_COUNT_PER_TICK       (LPM_SYSTICK_COUNTER_FREQ / configTICK_RATE_HZ)
 
 struct _lpm_power_mode_listener
 {
@@ -81,7 +81,7 @@ typedef void (*freertos_tick_func_t)(void);
 static lpm_power_mode_t s_curMode;
 static lpm_clock_context_t s_clockContext;
 static uint32_t s_DllBackupValue = 0;
-static int32_t s_SystemIdleFlag = 0;
+static int32_t s_SystemIdleFlag  = 0;
 static int32_t s_SkipRestorePLLs = 0;
 
 #ifdef FSL_RTOS_FREE_RTOS
@@ -117,29 +117,28 @@ static void BOARD_SetLPClockGate(void)
 
 static void LPM_SetClockMode(clock_mode_t mode, uint32_t clpcr)
 {
-    switch (mode)
-    {
-        case kCLOCK_ModeRun:
-            CCM->CLPCR = clpcr;
-            break;
-        default:
-            /*
-             * ERR007265: CCM: When improper low-power sequence is used,
-             * the SoC enters low power mode before the ARM core executes WFI.
-             *
-             * Software workaround:
-             * 1) Software should trigger IRQ #41 (GPR_IRQ) to be always pending
-             *    by setting IOMUXC_GPR_GPR1_GINT.
-             * 2) Software should then unmask IRQ #41 in GPC before setting CCM
-             *    Low-Power mode.
-             * 3) Software should mask IRQ #41 right after CCM Low-Power mode
-             *    is set (set bits 0-1 of CCM_CLPCR).
-             *
-             */
-            LPM_EnableWakeupSource(GPR_IRQ_IRQn);
-            CCM->CLPCR = clpcr;
-            LPM_DisableWakeupSource(GPR_IRQ_IRQn);
-            break;
+    switch (mode) {
+    case kCLOCK_ModeRun:
+        CCM->CLPCR = clpcr;
+        break;
+    default:
+        /*
+         * ERR007265: CCM: When improper low-power sequence is used,
+         * the SoC enters low power mode before the ARM core executes WFI.
+         *
+         * Software workaround:
+         * 1) Software should trigger IRQ #41 (GPR_IRQ) to be always pending
+         *    by setting IOMUXC_GPR_GPR1_GINT.
+         * 2) Software should then unmask IRQ #41 in GPC before setting CCM
+         *    Low-Power mode.
+         * 3) Software should mask IRQ #41 right after CCM Low-Power mode
+         *    is set (set bits 0-1 of CCM_CLPCR).
+         *
+         */
+        LPM_EnableWakeupSource(GPR_IRQ_IRQn);
+        CCM->CLPCR = clpcr;
+        LPM_DisableWakeupSource(GPR_IRQ_IRQn);
+        break;
     }
 }
 
@@ -147,13 +146,9 @@ void LPM_SwitchToXtalOSC(void)
 {
     /* Restore XTAL-OSC and enable detector */
     CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK; /* Power up */
-    while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0)
-    {
-    }
+    while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0) {}
     CCM_ANALOG->MISC0_SET = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK; /* detect freq */
-    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0) {}
     CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK;
 
     /* Switch to XTAL-OSC */
@@ -182,8 +177,7 @@ void LPM_SwitchToRcOSC(void)
 
 void LPM_SwitchFlexspiClock(lpm_power_mode_t power_mode)
 {
-    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)))
-    {
+    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) {
         ;
     }
     FLEXSPI->MCR0 |= FLEXSPI_MCR0_MDIS_MASK;
@@ -203,21 +197,16 @@ void LPM_SwitchFlexspiClock(lpm_power_mode_t power_mode)
     /* Enable clock gate of flexspi. */
     CCM->CCGR6 |= (CCM_CCGR6_CG5_MASK);
 
-    if ((LPM_PowerModeLPIdle == power_mode) || (LPM_PowerModeLowPowerRun == power_mode))
-    {
+    if ((LPM_PowerModeLPIdle == power_mode) || (LPM_PowerModeLowPowerRun == power_mode)) {
         FLEXSPI->DLLCR[0] = FLEXSPI_DLLCR_OVRDEN(1) | FLEXSPI_DLLCR_OVRDVAL(19);
     }
-    else
-    {
+    else {
         FLEXSPI->DLLCR[0] = 0x79;
     }
     FLEXSPI->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK;
     FLEXSPI->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK;
-    while (FLEXSPI->MCR0 & FLEXSPI_MCR0_SWRESET_MASK)
-    {
-    }
-    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)))
-    {
+    while (FLEXSPI->MCR0 & FLEXSPI_MCR0_SWRESET_MASK) {}
+    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) {
         ;
     }
 
@@ -227,8 +216,7 @@ void LPM_SwitchFlexspiClock(lpm_power_mode_t power_mode)
 
 void LPM_RestoreFlexspiClock(void)
 {
-    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)))
-    {
+    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) {
         ;
     }
     FLEXSPI->MCR0 |= FLEXSPI_MCR0_MDIS_MASK;
@@ -245,11 +233,8 @@ void LPM_RestoreFlexspiClock(void)
     FLEXSPI->DLLCR[0] = s_DllBackupValue;
     FLEXSPI->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK;
     FLEXSPI->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK;
-    while (FLEXSPI->MCR0 & FLEXSPI_MCR0_SWRESET_MASK)
-    {
-    }
-    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)))
-    {
+    while (FLEXSPI->MCR0 & FLEXSPI_MCR0_SWRESET_MASK) {}
+    while (!((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) {
         ;
     }
     /* Take some delay */
@@ -259,9 +244,9 @@ void LPM_RestoreFlexspiClock(void)
 void LPM_SwitchBandgap(void)
 {
     /* Switch bandgap */
-    PMU->MISC0_SET = 0x00000004;
+    PMU->MISC0_SET              = 0x00000004;
     XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK;
-    PMU->MISC0_SET = CCM_ANALOG_MISC0_REFTOP_PWD_MASK;
+    PMU->MISC0_SET              = CCM_ANALOG_MISC0_REFTOP_PWD_MASK;
 
     /* Wait CCM operation finishes */
     CLOCK_CCM_HANDSHAKE_WAIT();
@@ -274,12 +259,10 @@ void LPM_RestoreBandgap(void)
     /* Restore bandgap */
     /* Turn on regular bandgap and wait for stable */
     CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_REFTOP_PWD_MASK;
-    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK) == 0) {}
     /* Low power band gap disable */
     XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK;
-    PMU->MISC0_CLR = 0x00000004;
+    PMU->MISC0_CLR              = 0x00000004;
 
     /* Wait CCM operation finishes */
     CLOCK_CCM_HANDSHAKE_WAIT();
@@ -291,43 +274,42 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
 {
     /* Application shouldn't rely on PLL in low power mode,
      * gate all PLL and PFD now */
-    if (LPM_PowerModeSuspend == power_mode)
-    {
+    if (LPM_PowerModeSuspend == power_mode) {
         return;
     }
 
-    s_clockContext.pfd480 = CCM_ANALOG->PFD_480;
-    s_clockContext.pfd528 = CCM_ANALOG->PFD_528;
-    s_clockContext.pllSys = CCM_ANALOG->PLL_SYS;
-    s_clockContext.pllUsb1 = CCM_ANALOG->PLL_USB1;
-    s_clockContext.pllUsb2 = CCM_ANALOG->PLL_USB2;
+    s_clockContext.pfd480   = CCM_ANALOG->PFD_480;
+    s_clockContext.pfd528   = CCM_ANALOG->PFD_528;
+    s_clockContext.pllSys   = CCM_ANALOG->PLL_SYS;
+    s_clockContext.pllUsb1  = CCM_ANALOG->PLL_USB1;
+    s_clockContext.pllUsb2  = CCM_ANALOG->PLL_USB2;
     s_clockContext.pllAudio = CCM_ANALOG->PLL_AUDIO;
     s_clockContext.pllVideo = CCM_ANALOG->PLL_VIDEO;
-    s_clockContext.pllEnet = CCM_ANALOG->PLL_ENET;
+    s_clockContext.pllEnet  = CCM_ANALOG->PLL_ENET;
     s_clockContext.pllArm_loopdiv =
         (CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT;
-    s_clockContext.pllArm = CCM_ANALOG->PLL_ARM;
-    s_clockContext.periphSel = CLOCK_GetMux(kCLOCK_PeriphMux);
-    s_clockContext.ipgDiv = CLOCK_GetDiv(kCLOCK_IpgDiv);
-    s_clockContext.ahbDiv = CLOCK_GetDiv(kCLOCK_AhbDiv);
-    s_clockContext.perSel = CLOCK_GetMux(kCLOCK_PerclkMux);
-    s_clockContext.perDiv = CLOCK_GetDiv(kCLOCK_PerclkDiv);
+    s_clockContext.pllArm       = CCM_ANALOG->PLL_ARM;
+    s_clockContext.periphSel    = CLOCK_GetMux(kCLOCK_PeriphMux);
+    s_clockContext.ipgDiv       = CLOCK_GetDiv(kCLOCK_IpgDiv);
+    s_clockContext.ahbDiv       = CLOCK_GetDiv(kCLOCK_AhbDiv);
+    s_clockContext.perSel       = CLOCK_GetMux(kCLOCK_PerclkMux);
+    s_clockContext.perDiv       = CLOCK_GetDiv(kCLOCK_PerclkDiv);
     s_clockContext.preperiphSel = CLOCK_GetMux(kCLOCK_PrePeriphMux);
-    s_clockContext.armDiv = CLOCK_GetDiv(kCLOCK_ArmDiv);
-    s_clockContext.is_valid = 1;
+    s_clockContext.armDiv       = CLOCK_GetDiv(kCLOCK_ArmDiv);
+    s_clockContext.is_valid     = 1;
 
     /* When need to close PLL, we need to use bypass clock first and then power it down. */
     /* Power off SYS PLL */
     CCM_ANALOG->PLL_SYS_SET = CCM_ANALOG_PLL_SYS_BYPASS_MASK;
     CCM_ANALOG->PLL_SYS_SET = CCM_ANALOG_PLL_SYS_POWERDOWN_MASK;
-    //CCM_ANALOG->PFD_528_SET = CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK;
+    // CCM_ANALOG->PFD_528_SET = CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK;
 
 #if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
     /* If XIP in hyper flash, should switch to ARM PLL before disble USB1 PLL */
     /* Power off USB1 PLL */
     CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_BYPASS_MASK;
     CCM_ANALOG->PLL_USB1_CLR = CCM_ANALOG_PLL_USB1_POWER_MASK;
-    CCM_ANALOG->PFD_480_SET = CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK;
+    CCM_ANALOG->PFD_480_SET  = CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK;
 #endif
     /* Power off USB2 PLL */
     CCM_ANALOG->PLL_USB2_SET = CCM_ANALOG_PLL_USB2_BYPASS_MASK;
@@ -342,8 +324,7 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
     CCM_ANALOG->PLL_ENET_SET = CCM_ANALOG_PLL_ENET_BYPASS_MASK;
     CCM_ANALOG->PLL_ENET_SET = CCM_ANALOG_PLL_ENET_POWERDOWN_MASK;
 
-    if ((LPM_PowerModeSysIdle == power_mode) || (LPM_PowerModeLowSpeedRun == power_mode))
-    {
+    if ((LPM_PowerModeSysIdle == power_mode) || (LPM_PowerModeLowSpeedRun == power_mode)) {
         CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1);
         CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
         CLOCK_SetMux(kCLOCK_PeriphMux, 1);
@@ -363,14 +344,12 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
         CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
         CLOCK_SetMux(kCLOCK_PeriphMux, 0);
 
-        if (LPM_PowerModeLowSpeedRun == power_mode)
-        {
+        if (LPM_PowerModeLowSpeedRun == power_mode) {
             /* SET AHB to 132MHz, IPG to 33MHz */
             CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
             CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
         }
-        else
-        {
+        else {
             /* SET AHB, IPG to 33MHz */
             CLOCK_SetDiv(kCLOCK_IpgDiv, 0);
             CLOCK_SetDiv(kCLOCK_AhbDiv, 3);
@@ -379,8 +358,7 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
         CLOCK_SetMux(kCLOCK_PerclkMux, 0);
         CLOCK_SetDiv(kCLOCK_PerclkDiv, 0);
     }
-    else if ((LPM_PowerModeLPIdle == power_mode) || (LPM_PowerModeLowPowerRun == power_mode))
-    {
+    else if ((LPM_PowerModeLPIdle == power_mode) || (LPM_PowerModeLowPowerRun == power_mode)) {
         CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1);
         CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
         CLOCK_SetMux(kCLOCK_PeriphMux, 1);
@@ -397,14 +375,12 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
         CLOCK_SetMux(kCLOCK_PrePeriphMux, 0x3);
         CLOCK_SetMux(kCLOCK_PeriphMux, 0x0);
 
-        if (LPM_PowerModeLowPowerRun == power_mode)
-        {
+        if (LPM_PowerModeLowPowerRun == power_mode) {
             /* SET AHB to 24MHz, IPG to 12MHz */
             CLOCK_SetDiv(kCLOCK_IpgDiv, 1);
             CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
         }
-        else
-        {
+        else {
             /* SET AHB, IPG to 12MHz */
             CLOCK_SetDiv(kCLOCK_IpgDiv, 0);
             CLOCK_SetDiv(kCLOCK_AhbDiv, 1);
@@ -413,8 +389,7 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
         CLOCK_SetMux(kCLOCK_PerclkMux, 0x0);
         CLOCK_SetDiv(kCLOCK_PerclkDiv, 0x0);
     }
-    else
-    {
+    else {
         /* Direct return from RUN and Suspend */
         return;
     }
@@ -427,7 +402,7 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
     /* Power off USB1 PLL */
     CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_BYPASS_MASK;
     CCM_ANALOG->PLL_USB1_CLR = CCM_ANALOG_PLL_USB1_POWER_MASK;
-    CCM_ANALOG->PFD_480_SET = CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK;
+    CCM_ANALOG->PFD_480_SET  = CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK;
 #endif
 
     CLOCK_DeinitUsb1Pfd(kCLOCK_Pfd0);
@@ -437,14 +412,13 @@ void LPM_DisablePLLs(lpm_power_mode_t power_mode)
 
     CLOCK_DeinitSysPfd(kCLOCK_Pfd0);
     CLOCK_DeinitSysPfd(kCLOCK_Pfd1);
-//    CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
+    //    CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
     CLOCK_DeinitSysPfd(kCLOCK_Pfd3);
 }
 
 void LPM_RestorePLLs(lpm_power_mode_t power_mode)
 {
-    if (s_clockContext.is_valid)
-    {
+    if (s_clockContext.is_valid) {
         /* Restore USB1 PLL */
         CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_BYPASS_MASK;
         CCM_ANALOG->PLL_USB1 =
@@ -453,19 +427,14 @@ void LPM_RestorePLLs(lpm_power_mode_t power_mode)
         CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_POWER_MASK;
 
         /* Restore USB1 PLL PFD */
-        CCM_ANALOG->PFD_480 = s_clockContext.pfd480;
+        CCM_ANALOG->PFD_480     = s_clockContext.pfd480;
         CCM_ANALOG->PFD_480_CLR = CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK;
 
-        if ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_POWER_MASK) != 0)
-        {
-            while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0)
-            {
-            }
+        if ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_POWER_MASK) != 0) {
+            while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0) {}
         }
         /* Wait CCM operation finishes */
-        while (CCM->CDHIPR != 0)
-        {
-        }
+        while (CCM->CDHIPR != 0) {}
 #if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
         LPM_EnterCritical();
         LPM_RestoreFlexspiClock();
@@ -474,11 +443,10 @@ void LPM_RestorePLLs(lpm_power_mode_t power_mode)
     }
 #if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
     /* If reset from suspend, need to switch back to USB1 PLL as the clock source */
-    else if (is_suspend_reset)
-    {
+    else if (is_suspend_reset) {
         const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};
-        s_DllBackupValue = 0x79;
-        is_suspend_reset = 0;
+        s_DllBackupValue                               = 0x79;
+        is_suspend_reset                               = 0;
         CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll); /* Configure USB1 PLL to 480M */
         CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 26);
 
@@ -488,8 +456,7 @@ void LPM_RestorePLLs(lpm_power_mode_t power_mode)
         return;
     }
 #endif
-    else
-    {
+    else {
         return;
     }
 
@@ -506,14 +473,10 @@ void LPM_RestorePLLs(lpm_power_mode_t power_mode)
     CLOCK_SetDiv(kCLOCK_ArmDiv, s_clockContext.armDiv);
     CCM_ANALOG->PLL_ARM_CLR = CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK;
     CCM_ANALOG->PLL_ARM_SET = CCM_ANALOG_PLL_ARM_DIV_SELECT(s_clockContext.pllArm_loopdiv);
-    if ((s_clockContext.pllArm & CCM_ANALOG_PLL_ARM_BYPASS_MASK) == 0)
-    {
-        while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0)
-        {
-        }
+    if ((s_clockContext.pllArm & CCM_ANALOG_PLL_ARM_BYPASS_MASK) == 0) {
+        while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0) {}
     }
-    if ((s_clockContext.pllArm & CCM_ANALOG_PLL_ARM_BYPASS_MASK) == 0)
-    {
+    if ((s_clockContext.pllArm & CCM_ANALOG_PLL_ARM_BYPASS_MASK) == 0) {
         CCM_ANALOG->PLL_ARM_CLR = CCM_ANALOG_PLL_ARM_BYPASS_MASK;
     }
 
@@ -531,65 +494,48 @@ void LPM_RestorePLLs(lpm_power_mode_t power_mode)
         (CCM->CBCMR & ~CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK) | CCM_CBCMR_PRE_PERIPH_CLK_SEL(s_clockContext.preperiphSel);
 
     /* Wait CCM operation finishes */
-    while (CCM->CDHIPR != 0)
-    {
-    }
+    while (CCM->CDHIPR != 0) {}
 
     /* When need to enable PLL, we need to use bypass clock first and then switch pll back. */
     /* Power on SYS PLL and wait for locked */
     CCM_ANALOG->PLL_SYS_SET = CCM_ANALOG_PLL_SYS_BYPASS_MASK;
     CCM_ANALOG->PLL_SYS_CLR = CCM_ANALOG_PLL_SYS_POWERDOWN_MASK;
-    CCM_ANALOG->PLL_SYS = s_clockContext.pllSys;
-    if ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK) == 0)
-    {
-        while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0)
-        {
-        }
+    CCM_ANALOG->PLL_SYS     = s_clockContext.pllSys;
+    if ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK) == 0) {
+        while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0) {}
     }
-    //CCM_ANALOG->PFD_528_CLR = CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK;
+    // CCM_ANALOG->PFD_528_CLR = CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK;
 
     /* Restore USB2 PLL */
     CCM_ANALOG->PLL_USB2_SET = CCM_ANALOG_PLL_USB2_BYPASS_MASK;
     CCM_ANALOG->PLL_USB2_SET = CCM_ANALOG_PLL_USB2_POWER_MASK;
-    CCM_ANALOG->PLL_USB2 = s_clockContext.pllUsb2;
-    if ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_POWER_MASK) != 0)
-    {
-        while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0)
-        {
-        }
+    CCM_ANALOG->PLL_USB2     = s_clockContext.pllUsb2;
+    if ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_POWER_MASK) != 0) {
+        while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0) {}
     }
 
     /* Restore AUDIO PLL */
     CCM_ANALOG->PLL_AUDIO_SET = CCM_ANALOG_PLL_AUDIO_BYPASS_MASK;
     CCM_ANALOG->PLL_AUDIO_CLR = CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK;
-    CCM_ANALOG->PLL_AUDIO = s_clockContext.pllAudio;
-    if ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK) == 0)
-    {
-        while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0)
-        {
-        }
+    CCM_ANALOG->PLL_AUDIO     = s_clockContext.pllAudio;
+    if ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK) == 0) {
+        while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0) {}
     }
 
     /* Restore VIDEO PLL */
     CCM_ANALOG->PLL_VIDEO_SET = CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
     CCM_ANALOG->PLL_VIDEO_CLR = CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK;
-    CCM_ANALOG->PLL_VIDEO = s_clockContext.pllVideo;
-    if ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK) == 0)
-    {
-        while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
-        {
-        }
+    CCM_ANALOG->PLL_VIDEO     = s_clockContext.pllVideo;
+    if ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK) == 0) {
+        while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0) {}
     }
 
     /* Restore ENET PLL */
     CCM_ANALOG->PLL_ENET_SET = CCM_ANALOG_PLL_ENET_BYPASS_MASK;
     CCM_ANALOG->PLL_ENET_SET = CCM_ANALOG_PLL_ENET_POWERDOWN_MASK;
-    CCM_ANALOG->PLL_ENET = s_clockContext.pllEnet;
-    if ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK) == 0)
-    {
-        while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0)
-        {
-        }
+    CCM_ANALOG->PLL_ENET     = s_clockContext.pllEnet;
+    if ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK) == 0) {
+        while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0) {}
     }
 
     /* Restore SYS PLL PFD */
@@ -604,9 +550,8 @@ static void LPM_DisableRbcBypass(void)
     uint32_t i;
 
     /* Mask all GPC interrupts before disabling the RBC counters */
-    for (i = 0; i < LPM_GPC_IMR_NUM; i++)
-    {
-        gpcIMR[i] = GPC->IMR[i];
+    for (i = 0; i < LPM_GPC_IMR_NUM; i++) {
+        gpcIMR[i]   = GPC->IMR[i];
         GPC->IMR[i] = 0xFFFFFFFFU;
     }
 
@@ -617,14 +562,12 @@ static void LPM_DisableRbcBypass(void)
     /* Now delay for 2 CKIL cycles (61usec). ARM is at 528MHz at this point
      * so a short loop should be enough.
      */
-    for (i = 0; i < 528 * 22; i++)
-    {
+    for (i = 0; i < 528 * 22; i++) {
         __NOP();
     }
 
     /* Recover all the GPC interrupts. */
-    for (i = 0; i < LPM_GPC_IMR_NUM; i++)
-    {
+    for (i = 0; i < LPM_GPC_IMR_NUM; i++) {
         GPC->IMR[i] = gpcIMR[i];
     }
 }
@@ -707,27 +650,22 @@ void LPM_SystemRestoreIdle(void)
 
     /* Enable regular 2P5 and wait for stable */
     PMU->REG_2P5_SET = PMU_REG_2P5_ENABLE_LINREG_MASK;
-    while ((PMU->REG_2P5 & PMU_REG_2P5_OK_VDD2P5_MASK) == 0)
-    {
-    }
+    while ((PMU->REG_2P5 & PMU_REG_2P5_OK_VDD2P5_MASK) == 0) {}
     /* Turn off weak 2P5 */
     PMU->REG_2P5_CLR = PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
 
     /* Enable regular 1P1 and wait for stable */
     PMU->REG_1P1_SET = PMU_REG_1P1_ENABLE_LINREG_MASK;
-    while ((PMU->REG_1P1 & PMU_REG_1P1_OK_VDD1P1_MASK) == 0)
-    {
-    }
+    while ((PMU->REG_1P1 & PMU_REG_1P1_OK_VDD1P1_MASK) == 0) {}
     /* Turn off weak 1P1 */
     PMU->REG_1P1_CLR = PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
 
     /* If s_SkipRestorePLLs is set, skip the process to restore the PLLs. */
-    if (!s_SkipRestorePLLs)
-    {
+    if (!s_SkipRestorePLLs) {
         LPM_RestorePLLs(LPM_PowerModeLPIdle);
     }
     s_SkipRestorePLLs = 0;
-    s_SystemIdleFlag = 0;
+    s_SystemIdleFlag  = 0;
 }
 
 static void LPM_SystemDsm()
@@ -768,9 +706,8 @@ static void LPM_SystemDsm()
        avoid the counter starting too early if an interupt is already
        pending.
     */
-    for (i = 0; i < LPM_GPC_IMR_NUM; i++)
-    {
-        gpcIMR[i] = GPC->IMR[i];
+    for (i = 0; i < LPM_GPC_IMR_NUM; i++) {
+        gpcIMR[i]   = GPC->IMR[i];
         GPC->IMR[i] = 0xFFFFFFFFU;
     }
 
@@ -784,8 +721,7 @@ static void LPM_SystemDsm()
     CCM->CCR |= (CCM_CCR_RBC_EN_MASK | CCM_CCR_COSC_EN_MASK | CCM_CCR_OSCNT(0xAF));
 
     /* Recover all the GPC interrupts. */
-    for (i = 0; i < LPM_GPC_IMR_NUM; i++)
-    {
+    for (i = 0; i < LPM_GPC_IMR_NUM; i++) {
         GPC->IMR[i] = gpcIMR[i];
     }
 
@@ -794,8 +730,7 @@ static void LPM_SystemDsm()
      * the RBC counter can start counting in case an interrupt is already pending
      * or in case an interrupt arrives just as ARM is about to assert DSM_request.
      */
-    for (i = 0; i < 22 * 24; i++)
-    {
+    for (i = 0; i < 22 * 24; i++) {
         __NOP();
     }
 }
@@ -833,7 +768,7 @@ void LPM_SystemResumeDsm(void)
     LPM_DisableRbcBypass();
     LPM_SetClockMode(kCLOCK_ModeRun, clpcr);
 
-    //LPM_DisableWakeupSource(vPortGetGptIrqn());
+    // LPM_DisableWakeupSource(vPortGetGptIrqn());
 }
 
 void LPM_SystemOverRunRecovery(void)
@@ -856,17 +791,13 @@ void LPM_SystemOverRunRecovery(void)
 
     /* Enable regular 2P5 and wait for stable */
     PMU->REG_2P5_SET = PMU_REG_2P5_ENABLE_LINREG_MASK;
-    while ((PMU->REG_2P5 & PMU_REG_2P5_OK_VDD2P5_MASK) == 0)
-    {
-    }
+    while ((PMU->REG_2P5 & PMU_REG_2P5_OK_VDD2P5_MASK) == 0) {}
     /* Turn off weak 2P5 */
     PMU->REG_2P5_CLR = PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
 
     /* Enable regular 1P1 and wait for stable */
     PMU->REG_1P1_SET = PMU_REG_1P1_ENABLE_LINREG_MASK;
-    while ((PMU->REG_1P1 & PMU_REG_1P1_OK_VDD1P1_MASK) == 0)
-    {
-    }
+    while ((PMU->REG_1P1 & PMU_REG_1P1_OK_VDD1P1_MASK) == 0) {}
     /* Turn off weak 1P1 */
     PMU->REG_1P1_CLR = PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
 
@@ -965,7 +896,7 @@ void LPM_InitTicklessTimer(void)
     GPT_GetDefaultConfig(&gptConfig);
     gptConfig.clockSource = kGPT_ClockSource_LowFreq; /* 32K RTC OSC */
     // gptConfig.enableMode = false;                     /* Keep counter when stop */
-    gptConfig.enableMode = true; /* Don't keep counter when stop */
+    gptConfig.enableMode      = true; /* Don't keep counter when stop */
     gptConfig.enableRunInDoze = true;
     /* Initialize GPT module */
     GPT_Init(vPortGetGptBase(), &gptConfig);
@@ -989,20 +920,19 @@ bool LPM_Init(lpm_power_mode_t run_mode)
     CLOCK_SetRtcXtalFreq(BOARD_XTAL32K_CLK_HZ);
 
     /* Recover handshaking */
-	IOMUXC_GPR->GPR4 = 0x00000000;
-	IOMUXC_GPR->GPR7 = 0x00000000;
-	IOMUXC_GPR->GPR8 = 0x00000000;
-	IOMUXC_GPR->GPR12 = 0x00000000;
+    IOMUXC_GPR->GPR4  = 0x00000000;
+    IOMUXC_GPR->GPR7  = 0x00000000;
+    IOMUXC_GPR->GPR8  = 0x00000000;
+    IOMUXC_GPR->GPR12 = 0x00000000;
 
-	CCM->CCR &= ~CCM_CCR_REG_BYPASS_COUNT_MASK;
+    CCM->CCR &= ~CCM_CCR_REG_BYPASS_COUNT_MASK;
 
     s_targetPowerMode = run_mode;
 
 #ifdef FSL_RTOS_FREE_RTOS
     s_mutex = xSemaphoreCreateMutex();
 
-    if (s_mutex == NULL)
-    {
+    if (s_mutex == NULL) {
         return false;
     }
 
@@ -1013,8 +943,7 @@ bool LPM_Init(lpm_power_mode_t run_mode)
 #endif
 #endif
 
-    if (run_mode > LPM_PowerModeRunEnd)
-    {
+    if (run_mode > LPM_PowerModeRunEnd) {
         return false;
     }
     s_curMode = run_mode;
@@ -1042,7 +971,7 @@ bool LPM_Init(lpm_power_mode_t run_mode)
     tmp_reg |= XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG(0x2d7);
     XTALOSC24M->OSC_CONFIG2 = tmp_reg;
     /* Hardware requires to read OSC_CONFIG0 or OSC_CONFIG1 to make OSC_CONFIG2 write work */
-    tmp_reg = XTALOSC24M->OSC_CONFIG1;
+    tmp_reg                 = XTALOSC24M->OSC_CONFIG1;
     XTALOSC24M->OSC_CONFIG1 = tmp_reg;
 
     s_DllBackupValue = FLEXSPI->DLLCR[0];
@@ -1051,8 +980,7 @@ bool LPM_Init(lpm_power_mode_t run_mode)
     IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_GINT_MASK;
 
     /* Initialize GPC to mask all IRQs */
-    for (i = 0; i < LPM_GPC_IMR_NUM; i++)
-    {
+    for (i = 0; i < LPM_GPC_IMR_NUM; i++) {
         GPC->IMR[i] = 0xFFFFFFFFU;
     }
 
@@ -1062,8 +990,7 @@ bool LPM_Init(lpm_power_mode_t run_mode)
 void LPM_Deinit(void)
 {
 #ifdef FSL_RTOS_FREE_RTOS
-    if (s_mutex != NULL)
-    {
+    if (s_mutex != NULL) {
         vSemaphoreDelete(s_mutex);
         s_mutex = NULL;
     }
@@ -1090,8 +1017,7 @@ bool LPM_SetPowerMode(lpm_power_mode_t mode)
 #endif
     bool ret = true;
 
-    if (mode == s_curMode)
-    {
+    if (mode == s_curMode) {
         return ret;
     }
 
@@ -1101,32 +1027,25 @@ bool LPM_SetPowerMode(lpm_power_mode_t mode)
                            */
     xSemaphoreTake(s_mutex, portMAX_DELAY);
 
-    for (l1 = s_listenerHead; l1 != NULL; l1 = l1->next)
-    {
-        if (l1->callback == NULL)
-        {
+    for (l1 = s_listenerHead; l1 != NULL; l1 = l1->next) {
+        if (l1->callback == NULL) {
             continue;
         }
 
-        if (!l1->callback(s_curMode, mode, l1->data))
-        {
+        if (!l1->callback(s_curMode, mode, l1->data)) {
             /* One stakeholder doesn't allow new mode */
             ret = false;
             break;
         }
     }
 
-    if (ret)
-    {
+    if (ret) {
         s_curMode = mode;
     }
-    else
-    {
+    else {
         /* roll back the state change of previous listeners */
-        for (l2 = s_listenerHead; l2 != l1; l2 = l2->next)
-        {
-            if (l2->callback == NULL)
-            {
+        for (l2 = s_listenerHead; l2 != l1; l2 = l2->next) {
+            if (l2->callback == NULL) {
                 continue;
             }
 
@@ -1149,18 +1068,16 @@ void LPM_RegisterPowerListener(lpm_power_mode_callback_t callback, void *data)
     assert(l);
 
     l->callback = callback;
-    l->data = data;
-    l->next = NULL;
+    l->data     = data;
+    l->next     = NULL;
 
     xSemaphoreTake(s_mutex, portMAX_DELAY);
 
-    if (s_listenerHead)
-    {
+    if (s_listenerHead) {
         s_listenerTail->next = l;
-        s_listenerTail = l;
+        s_listenerTail       = l;
     }
-    else
-    {
+    else {
         s_listenerHead = s_listenerTail = l;
     }
 
@@ -1173,21 +1090,16 @@ void LPM_UnregisterPowerListener(lpm_power_mode_callback_t callback, void *data)
 
     xSemaphoreTake(s_mutex, portMAX_DELAY);
 
-    for (l = s_listenerHead; l != NULL; l = l->next)
-    {
-        if (l->callback == callback && l->data == data)
-        {
-            if (p)
-            {
+    for (l = s_listenerHead; l != NULL; l = l->next) {
+        if (l->callback == callback && l->data == data) {
+            if (p) {
                 p->next = l->next;
             }
-            else
-            {
+            else {
                 s_listenerHead = l->next;
             }
 
-            if (l->next == NULL)
-            {
+            if (l->next == NULL) {
                 s_listenerTail = p;
             }
 
@@ -1224,52 +1136,50 @@ void vPortPRE_SLEEP_PROCESSING(TickType_t timeoutMilliSec)
 
     clpcr = CCM->CLPCR & (~(CCM_CLPCR_LPM_MASK | CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK));
 
-    switch (APP_GetLPMPowerMode())
-    {
-        case LPM_PowerModeOverRun:
-        case LPM_PowerModeFullRun:
-        case LPM_PowerModeLowSpeedRun:
-        case LPM_PowerModeLowPowerRun:
-            break;
-        case LPM_PowerModeSysIdle:
-            LPM_SetClockMode(kCLOCK_ModeWait, clpcr | CCM_CLPCR_LPM(kCLOCK_ModeWait) |
-                                                  CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK | CCM_CLPCR_STBY_COUNT_MASK | 0x1C |
-                                                  0x08280000);
-            BOARD_SetLPClockGate();
-            /* If last mode is idle, need to restore idle states. */
-            if (s_SystemIdleFlag)
-            {
-                s_SkipRestorePLLs = 1;
-                LPM_SystemRestoreIdle();
-            }
+    switch (APP_GetLPMPowerMode()) {
+    case LPM_PowerModeOverRun:
+    case LPM_PowerModeFullRun:
+    case LPM_PowerModeLowSpeedRun:
+    case LPM_PowerModeLowPowerRun:
+        break;
+    case LPM_PowerModeSysIdle:
+        LPM_SetClockMode(kCLOCK_ModeWait,
+                         clpcr | CCM_CLPCR_LPM(kCLOCK_ModeWait) | CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK |
+                             CCM_CLPCR_STBY_COUNT_MASK | 0x1C | 0x08280000);
+        BOARD_SetLPClockGate();
+        /* If last mode is idle, need to restore idle states. */
+        if (s_SystemIdleFlag) {
+            s_SkipRestorePLLs = 1;
+            LPM_SystemRestoreIdle();
+        }
 
-            LPM_SystemWait();
-            IOMUXC_GPR->GPR8 = 0xaaaaaaaa;
-            IOMUXC_GPR->GPR12 = 0x0000000a;
-            break;
-        case LPM_PowerModeLPIdle:
-        	LPM_SetClockMode(kCLOCK_ModeWait, clpcr | CCM_CLPCR_LPM(kCLOCK_ModeWait) |
-                                                  CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK | CCM_CLPCR_STBY_COUNT_MASK | 0x1C |
-                                                  0x08280000);
-            BOARD_SetLPClockGate();
-            LPM_SystemIdle();
-            IOMUXC_GPR->GPR8 = 0xaaaaaaaa;
-            IOMUXC_GPR->GPR12 = 0x0000000a;
+        LPM_SystemWait();
+        IOMUXC_GPR->GPR8  = 0xaaaaaaaa;
+        IOMUXC_GPR->GPR12 = 0x0000000a;
+        break;
+    case LPM_PowerModeLPIdle:
+        LPM_SetClockMode(kCLOCK_ModeWait,
+                         clpcr | CCM_CLPCR_LPM(kCLOCK_ModeWait) | CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK |
+                             CCM_CLPCR_STBY_COUNT_MASK | 0x1C | 0x08280000);
+        BOARD_SetLPClockGate();
+        LPM_SystemIdle();
+        IOMUXC_GPR->GPR8  = 0xaaaaaaaa;
+        IOMUXC_GPR->GPR12 = 0x0000000a;
 
-        	/* put SDRAM to self-refresh mode */
-        	IOMUXC_GPR->GPR4 = (1<<9U);
-        	while((IOMUXC_GPR->GPR4 & (1<<25U)) != (1<<25U)) { };
-            break;
-        case LPM_PowerModeSuspend:
-            LPM_SetClockMode(kCLOCK_ModeStop, clpcr | CCM_CLPCR_LPM(kCLOCK_ModeStop) | CCM_CLPCR_VSTBY_MASK |
-                                                  CCM_CLPCR_STBY_COUNT_MASK | CCM_CLPCR_SBYOS_MASK |
-                                                  CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK | 0x08280000);
-            LPM_SystemDsm();
-            // LPM_CoreStateSave();
-            break;
-        default:
-            assert(false);
-            break;
+        /* put SDRAM to self-refresh mode */
+        IOMUXC_GPR->GPR4 = (1 << 9U);
+        while ((IOMUXC_GPR->GPR4 & (1 << 25U)) != (1 << 25U)) {};
+        break;
+    case LPM_PowerModeSuspend:
+        LPM_SetClockMode(kCLOCK_ModeStop,
+                         clpcr | CCM_CLPCR_LPM(kCLOCK_ModeStop) | CCM_CLPCR_VSTBY_MASK | CCM_CLPCR_STBY_COUNT_MASK |
+                             CCM_CLPCR_SBYOS_MASK | CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK | 0x08280000);
+        LPM_SystemDsm();
+        // LPM_CoreStateSave();
+        break;
+    default:
+        assert(false);
+        break;
     }
 }
 
@@ -1279,50 +1189,49 @@ void vPortPOST_SLEEP_PROCESSING(TickType_t timeoutMilliSec)
 
     clpcr = CCM->CLPCR & (~(CCM_CLPCR_LPM_MASK | CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK));
 
-    switch (APP_GetLPMPowerMode())
-    {
-        case LPM_PowerModeOverRun:
-        case LPM_PowerModeFullRun:
-        case LPM_PowerModeLowSpeedRun:
-        case LPM_PowerModeLowPowerRun:
-            break;
-        case LPM_PowerModeSysIdle:
-            IOMUXC_GPR->GPR8 = 0x00000000;
-            IOMUXC_GPR->GPR12 = 0x00000000;
-            LPM_SystemRestoreWait();
-            LPM_SetClockMode(kCLOCK_ModeRun, clpcr);
-            break;
-        case LPM_PowerModeLPIdle:
-            __NOP();
-            __NOP();
-            __NOP();
-            __NOP();
-            /* restore SDRAM from self-refresh mode */
-            IOMUXC_GPR->GPR4 = (0<<9U);
-            while((IOMUXC_GPR->GPR4 & (1<<25U)) != (1<<25U)) { };
+    switch (APP_GetLPMPowerMode()) {
+    case LPM_PowerModeOverRun:
+    case LPM_PowerModeFullRun:
+    case LPM_PowerModeLowSpeedRun:
+    case LPM_PowerModeLowPowerRun:
+        break;
+    case LPM_PowerModeSysIdle:
+        IOMUXC_GPR->GPR8  = 0x00000000;
+        IOMUXC_GPR->GPR12 = 0x00000000;
+        LPM_SystemRestoreWait();
+        LPM_SetClockMode(kCLOCK_ModeRun, clpcr);
+        break;
+    case LPM_PowerModeLPIdle:
+        __NOP();
+        __NOP();
+        __NOP();
+        __NOP();
+        /* restore SDRAM from self-refresh mode */
+        IOMUXC_GPR->GPR4 = (0 << 9U);
+        while ((IOMUXC_GPR->GPR4 & (1 << 25U)) != (1 << 25U)) {};
 
-            IOMUXC_GPR->GPR8 = 0x00000000;
-            IOMUXC_GPR->GPR12 = 0x00000000;
-            /* Interrupt occurs before system idle */
-            LPM_SystemRestoreIdle();
-            LPM_SetClockMode(kCLOCK_ModeRun, clpcr);
+        IOMUXC_GPR->GPR8  = 0x00000000;
+        IOMUXC_GPR->GPR12 = 0x00000000;
+        /* Interrupt occurs before system idle */
+        LPM_SystemRestoreIdle();
+        LPM_SetClockMode(kCLOCK_ModeRun, clpcr);
 
-            break;
-        case LPM_PowerModeSuspend:
-            /* Restore when wakeup from suspend reset */
-            LPM_SystemResumeDsm();
+        break;
+    case LPM_PowerModeSuspend:
+        /* Restore when wakeup from suspend reset */
+        LPM_SystemResumeDsm();
 
-            /* recover handshaking */
-            IOMUXC_GPR->GPR4 = 0x00000000;
-            IOMUXC_GPR->GPR7 = 0x00000000;
-            IOMUXC_GPR->GPR8 = 0x00000000;
-            IOMUXC_GPR->GPR12 = 0x00000000;
+        /* recover handshaking */
+        IOMUXC_GPR->GPR4  = 0x00000000;
+        IOMUXC_GPR->GPR7  = 0x00000000;
+        IOMUXC_GPR->GPR8  = 0x00000000;
+        IOMUXC_GPR->GPR12 = 0x00000000;
 
-            CCM->CCR &= ~CCM_CCR_REG_BYPASS_COUNT_MASK;
-            break;
-        default:
-            assert(false);
-            break;
+        CCM->CCR &= ~CCM_CCR_REG_BYPASS_COUNT_MASK;
+        break;
+    default:
+        assert(false);
+        break;
     }
 
     LPM_DisableWakeupSource(vPortGetGptIrqn());
@@ -1333,13 +1242,10 @@ void vPortPOST_SLEEP_PROCESSING(TickType_t timeoutMilliSec)
 
 void APP_PowerPreSwitchHook(lpm_power_mode_t targetMode)
 {
-    if (targetMode == LPM_PowerModeSuspend || targetMode == LPM_PowerModeSNVS)
-    {
+    if (targetMode == LPM_PowerModeSuspend || targetMode == LPM_PowerModeSNVS) {
         /* Wait for debug console output finished. */
-        while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)BOARD_DEBUG_UART_BASEADDR)))
-        {
-        }
-        //DbgConsole_Deinit();
+        while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)BOARD_DEBUG_UART_BASEADDR))) {}
+        // DbgConsole_Deinit();
 
         /*
          * Set pin for current leakage.
@@ -1347,16 +1253,15 @@ void APP_PowerPreSwitchHook(lpm_power_mode_t targetMode)
          * Debug console TX pin: Don't need to change.
          */
         IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_GPIO1_IO13, 0);
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_GPIO1_IO13, IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
-                                                                 IOMUXC_SW_PAD_CTL_PAD_PUS(2) |
-                                                                 IOMUXC_SW_PAD_CTL_PAD_PUE_MASK);
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_GPIO1_IO13,
+                            IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(2) |
+                                IOMUXC_SW_PAD_CTL_PAD_PUE_MASK);
     }
 }
 
 void APP_PowerPostSwitchHook(lpm_power_mode_t targetMode)
 {
-    if (targetMode == LPM_PowerModeSuspend)
-    {
+    if (targetMode == LPM_PowerModeSuspend) {
         /*
          * Debug console RX pin is set to GPIO input, nee to re-configure pinmux.
          * Debug console TX pin: Don't need to change.
@@ -1364,7 +1269,7 @@ void APP_PowerPostSwitchHook(lpm_power_mode_t targetMode)
         IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
         IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, IOMUXC_SW_PAD_CTL_PAD_SPEED(2));
 
-        //BOARD_InitDebugConsole();
+        // BOARD_InitDebugConsole();
     }
 }
 
@@ -1375,5 +1280,5 @@ lpm_power_mode_t APP_GetLPMPowerMode(void)
 
 void APP_SetLPMPowerMode(lpm_power_mode_t mode)
 {
-    s_targetPowerMode =  mode;
+    s_targetPowerMode = mode;
 }
diff --git a/module-bsp/board/rt1051/bsp/pwr/lpm.h b/module-bsp/board/rt1051/bsp/pwr/lpm.h
index 8ce3f6e28..18fd5008e 100644
--- a/module-bsp/board/rt1051/bsp/pwr/lpm.h
+++ b/module-bsp/board/rt1051/bsp/pwr/lpm.h
@@ -27,75 +27,56 @@ extern void vPortGPTIsr(void);
 
 #define vPortGptIsr GPT1_IRQHandler
 
-#define CLOCK_SET_MUX(mux, value)                                                                        \
-    \
-do                                                                                                \
-    {                                                                                                    \
-        CCM_TUPLE_REG(CCM, mux) = (CCM_TUPLE_REG(CCM, mux) & (~CCM_TUPLE_MASK(mux))) |                   \
-                                  (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); \
-        while (CCM->CDHIPR != 0)                                                                         \
-        {                                                                                                \
-        }                                                                                                \
-    \
-}                                                                                                 \
-    while (0)
+#define CLOCK_SET_MUX(mux, value)                                                                                      \
+                                                                                                                       \
+    do {                                                                                                               \
+        CCM_TUPLE_REG(CCM, mux) = (CCM_TUPLE_REG(CCM, mux) & (~CCM_TUPLE_MASK(mux))) |                                 \
+                                  (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux));               \
+        while (CCM->CDHIPR != 0) {}                                                                                    \
+                                                                                                                       \
+    } while (0)
 
-#define CLOCK_SET_DIV(divider, value)                                                                                \
-    \
-do                                                                                                            \
-    {                                                                                                                \
-        CCM_TUPLE_REG(CCM, divider) = (CCM_TUPLE_REG(CCM, divider) & (~CCM_TUPLE_MASK(divider))) |                   \
-                                      (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); \
-        while (CCM->CDHIPR != 0)                                                                                     \
-        {                                                                                                            \
-        }                                                                                                            \
-    \
-}                                                                                                             \
-    while (0)
+#define CLOCK_SET_DIV(divider, value)                                                                                  \
+                                                                                                                       \
+    do {                                                                                                               \
+        CCM_TUPLE_REG(CCM, divider) = (CCM_TUPLE_REG(CCM, divider) & (~CCM_TUPLE_MASK(divider))) |                     \
+                                      (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider));   \
+        while (CCM->CDHIPR != 0) {}                                                                                    \
+                                                                                                                       \
+    } while (0)
 
-#define CLOCK_CCM_HANDSHAKE_WAIT() \
-    \
-do                          \
-    {                              \
-        while (CCM->CDHIPR != 0)   \
-        {                          \
-        }                          \
-    \
-}                           \
-    while (0)
+#define CLOCK_CCM_HANDSHAKE_WAIT()                                                                                     \
+                                                                                                                       \
+    do {                                                                                                               \
+        while (CCM->CDHIPR != 0) {}                                                                                    \
+                                                                                                                       \
+    } while (0)
 
-#define LPM_DELAY(value)                         \
-    \
-do                                        \
-    {                                            \
-        for (uint32_t i = 0; i < 5 * value; i++) \
-        {                                        \
-            __NOP();                             \
-        }                                        \
-    \
-}                                         \
-    while (0)
+#define LPM_DELAY(value)                                                                                               \
+                                                                                                                       \
+    do {                                                                                                               \
+        for (uint32_t i = 0; i < 5 * value; i++) {                                                                     \
+            __NOP();                                                                                                   \
+        }                                                                                                              \
+                                                                                                                       \
+    } while (0)
 
 #if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
-#define LPM_EnterCritical()                        \
-    \
-do                                          \
-    {                                              \
-        __disable_irq();                           \
-        SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \
-    \
-}                                           \
-    while (0)
+#define LPM_EnterCritical()                                                                                            \
+                                                                                                                       \
+    do {                                                                                                               \
+        __disable_irq();                                                                                               \
+        SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;                                                                     \
+                                                                                                                       \
+    } while (0)
 
-#define LPM_ExitCritical()                        \
-    \
-do                                         \
-    {                                             \
-        __enable_irq();                           \
-        SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; \
-    \
-}                                          \
-    while (0)
+#define LPM_ExitCritical()                                                                                             \
+                                                                                                                       \
+    do {                                                                                                               \
+        __enable_irq();                                                                                                \
+        SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;                                                                      \
+                                                                                                                       \
+    } while (0)
 
 #else
 #define LPM_EnterCritical()
@@ -151,11 +132,11 @@ typedef bool (*lpm_power_mode_callback_t)(lpm_power_mode_t curMode, lpm_power_mo
 #if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
 #if (defined(__ICCARM__))
 #define QUICKACCESS_SECTION_CODE(func) __ramfunc func
-#elif(defined(__ARMCC_VERSION))
+#elif (defined(__ARMCC_VERSION))
 #define QUICKACCESS_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
 #elif defined(__MCUXPRESSO)
 #define QUICKACCESS_SECTION_CODE(func) __attribute__((section(".ramfunc.$SRAM_ITC"))) func
-#elif(defined(__GNUC__))
+#elif (defined(__GNUC__))
 #define QUICKACCESS_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
 #else
 #error Toolchain not supported.
@@ -163,11 +144,11 @@ typedef bool (*lpm_power_mode_callback_t)(lpm_power_mode_t curMode, lpm_power_mo
 #else
 #if (defined(__ICCARM__))
 #define QUICKACCESS_SECTION_CODE(func) func
-#elif(defined(__ARMCC_VERSION))
+#elif (defined(__ARMCC_VERSION))
 #define QUICKACCESS_SECTION_CODE(func) func
-#elif(defined(__MCUXPRESSO))
+#elif (defined(__MCUXPRESSO))
 #define QUICKACCESS_SECTION_CODE(func) func
-#elif(defined(__GNUC__))
+#elif (defined(__GNUC__))
 #define QUICKACCESS_SECTION_CODE(func) func
 #else
 #error Toolchain not supported.
@@ -179,74 +160,75 @@ typedef bool (*lpm_power_mode_callback_t)(lpm_power_mode_t curMode, lpm_power_mo
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus*/
 
-QUICKACCESS_SECTION_CODE(void LPM_SwitchBandgap(void));
-QUICKACCESS_SECTION_CODE(void LPM_RestoreBandgap(void));
-QUICKACCESS_SECTION_CODE(void LPM_SwitchToXtalOSC(void));
-QUICKACCESS_SECTION_CODE(void LPM_SwitchToRcOSC(void));
-QUICKACCESS_SECTION_CODE(void LPM_SwitchFlexspiClock(lpm_power_mode_t power_mode));
-QUICKACCESS_SECTION_CODE(void LPM_RestoreFlexspiClock(void));
+    QUICKACCESS_SECTION_CODE(void LPM_SwitchBandgap(void));
+    QUICKACCESS_SECTION_CODE(void LPM_RestoreBandgap(void));
+    QUICKACCESS_SECTION_CODE(void LPM_SwitchToXtalOSC(void));
+    QUICKACCESS_SECTION_CODE(void LPM_SwitchToRcOSC(void));
+    QUICKACCESS_SECTION_CODE(void LPM_SwitchFlexspiClock(lpm_power_mode_t power_mode));
+    QUICKACCESS_SECTION_CODE(void LPM_RestoreFlexspiClock(void));
 
-/* Initialize the Low Power Management */
-bool LPM_Init(lpm_power_mode_t run_mode);
+    /* Initialize the Low Power Management */
+    bool LPM_Init(lpm_power_mode_t run_mode);
 
-/* Deinitialize the Low Power Management */
-void LPM_Deinit(void);
+    /* Deinitialize the Low Power Management */
+    void LPM_Deinit(void);
 
-/* Enable wakeup source in low power mode */
-void LPM_EnableWakeupSource(uint32_t irq);
+    /* Enable wakeup source in low power mode */
+    void LPM_EnableWakeupSource(uint32_t irq);
 
-/* Disable wakeup source in low power mode */
-void LPM_DisableWakeupSource(uint32_t irq);
+    /* Disable wakeup source in low power mode */
+    void LPM_DisableWakeupSource(uint32_t irq);
 
-/* Set power mode, all registered listeners will be notified.
- * Return true if all the registered listeners return true.
- */
-bool LPM_SetPowerMode(lpm_power_mode_t mode);
+    /* Set power mode, all registered listeners will be notified.
+     * Return true if all the registered listeners return true.
+     */
+    bool LPM_SetPowerMode(lpm_power_mode_t mode);
 
-/* LPM_SetPowerMode() won't switch system power status immediately,
- * instead, such operation is done by LPM_WaitForInterrupt().
- * It can be callled in idle task of FreeRTOS, or main loop in bare
- * metal application. The sleep depth of this API depends
- * on current power mode set by LPM_SetPowerMode().
- * The timeoutMilliSec means if no interrupt occurs before timeout, the
- * system will be waken up by systick. If timeout exceeds hardware timer
- * limitation, timeout will be reduced to maximum time of hardware.
- * timeoutMilliSec only works in FreeRTOS, in bare metal application,
- * it's just ignored.
- */
-void LPM_WaitForInterrupt(uint32_t timeoutMilliSec);
+    /* LPM_SetPowerMode() won't switch system power status immediately,
+     * instead, such operation is done by LPM_WaitForInterrupt().
+     * It can be callled in idle task of FreeRTOS, or main loop in bare
+     * metal application. The sleep depth of this API depends
+     * on current power mode set by LPM_SetPowerMode().
+     * The timeoutMilliSec means if no interrupt occurs before timeout, the
+     * system will be waken up by systick. If timeout exceeds hardware timer
+     * limitation, timeout will be reduced to maximum time of hardware.
+     * timeoutMilliSec only works in FreeRTOS, in bare metal application,
+     * it's just ignored.
+     */
+    void LPM_WaitForInterrupt(uint32_t timeoutMilliSec);
 
 #ifdef FSL_RTOS_FREE_RTOS
-/* Register power mode switch listener. When LPM_SetPowerMode()
- * is called, all the registered listeners will be invoked. The
- * listener returns true if it allows the power mode switch,
- * otherwise returns FALSE.
- */
-void LPM_RegisterPowerListener(lpm_power_mode_callback_t callback, void *data);
+    /* Register power mode switch listener. When LPM_SetPowerMode()
+     * is called, all the registered listeners will be invoked. The
+     * listener returns true if it allows the power mode switch,
+     * otherwise returns FALSE.
+     */
+    void LPM_RegisterPowerListener(lpm_power_mode_callback_t callback, void *data);
 
-/* Unregister power mode switch listener */
-void LPM_UnregisterPowerListener(lpm_power_mode_callback_t callback, void *data);
+    /* Unregister power mode switch listener */
+    void LPM_UnregisterPowerListener(lpm_power_mode_callback_t callback, void *data);
 
-void LPM_SystemRestoreDsm(void);
-void LPM_SystemRestoreIdle(void);
-void LPM_SystemResumeDsm(void);
+    void LPM_SystemRestoreDsm(void);
+    void LPM_SystemRestoreIdle(void);
+    void LPM_SystemResumeDsm(void);
 
-void LPM_RestorePLLs(lpm_power_mode_t power_mode);
-void LPM_DisablePLLs(lpm_power_mode_t power_mode);
+    void LPM_RestorePLLs(lpm_power_mode_t power_mode);
+    void LPM_DisablePLLs(lpm_power_mode_t power_mode);
 
-void LPM_SystemFullRun(void);
-void LPM_SystemOverRun(void);
-void LPM_SystemLowSpeedRun(void);
-void LPM_SystemLowPowerRun(void);
+    void LPM_SystemFullRun(void);
+    void LPM_SystemOverRun(void);
+    void LPM_SystemLowSpeedRun(void);
+    void LPM_SystemLowPowerRun(void);
 
 #endif
 
-void APP_PowerPostSwitchHook(lpm_power_mode_t targetMode);
+    void APP_PowerPostSwitchHook(lpm_power_mode_t targetMode);
 
-void APP_SetLPMPowerMode(lpm_power_mode_t mode);
+    void APP_SetLPMPowerMode(lpm_power_mode_t mode);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/bsp/rtc/rtc.cpp b/module-bsp/board/rt1051/bsp/rtc/rtc.cpp
index 3dcfd98d8..eb45315c8 100644
--- a/module-bsp/board/rt1051/bsp/rtc/rtc.cpp
+++ b/module-bsp/board/rt1051/bsp/rtc/rtc.cpp
@@ -13,290 +13,276 @@
 
 static xQueueHandle qHandleRtcIrq = NULL;
 
-static  snvs_hp_rtc_config_t    s_rtcConfig;
+static snvs_hp_rtc_config_t s_rtcConfig;
 static uint32_t SNVS_HP_ConvertDatetimeToSeconds(const snvs_hp_rtc_datetime_t *datetime);
 static void SNVS_HP_ConvertSecondsToDatetime(uint32_t seconds, snvs_hp_rtc_datetime_t *datetime);
-namespace bsp{
+namespace bsp
+{
 
-	RtcBspError_e rtc_Init(xQueueHandle qHandle)
-	{
-		qHandleRtcIrq = qHandle;
+    RtcBspError_e rtc_Init(xQueueHandle qHandle)
+    {
+        qHandleRtcIrq = qHandle;
 
-		SNVS_HP_RTC_GetDefaultConfig(&s_rtcConfig);
-		SNVS_HP_RTC_Init(SNVS, &s_rtcConfig);
+        SNVS_HP_RTC_GetDefaultConfig(&s_rtcConfig);
+        SNVS_HP_RTC_Init(SNVS, &s_rtcConfig);
 
-		NVIC_SetPriority(SNVS_HP_WRAPPER_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
-		/* Enable at the NVIC */
-		NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
+        NVIC_SetPriority(SNVS_HP_WRAPPER_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
+        /* Enable at the NVIC */
+        NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
 
-		// Start the timer
-		SNVS_HP_RTC_StartTimer(SNVS);
-		return RtcBspOK;
-	}
+        // Start the timer
+        SNVS_HP_RTC_StartTimer(SNVS);
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetDateTimeFromTimestamp(time_t timestamp)
-	{
-		snvs_hp_rtc_datetime_t rtcDateTime;
+    RtcBspError_e rtc_SetDateTimeFromTimestamp(time_t timestamp)
+    {
+        snvs_hp_rtc_datetime_t rtcDateTime;
 
-		SNVS_HP_ConvertSecondsToDatetime((uint32_t)timestamp, &rtcDateTime);
-		portENTER_CRITICAL();
+        SNVS_HP_ConvertSecondsToDatetime((uint32_t)timestamp, &rtcDateTime);
+        portENTER_CRITICAL();
 
-		SNVS_HP_RTC_StopTimer(SNVS);
-		SNVS_HP_RTC_SetDatetime(SNVS, &rtcDateTime);
-		SNVS_HP_RTC_StartTimer(SNVS);
+        SNVS_HP_RTC_StopTimer(SNVS);
+        SNVS_HP_RTC_SetDatetime(SNVS, &rtcDateTime);
+        SNVS_HP_RTC_StartTimer(SNVS);
 
-		portEXIT_CRITICAL();
+        portEXIT_CRITICAL();
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetDateTime(struct tm* time)
-	{
-		if (time == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_SetDateTime(struct tm *time)
+    {
+        if (time == NULL) {
+            return RtcBspError;
+        }
 
-		snvs_hp_rtc_datetime_t rtcDate;
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		rtcDate.year    = time->tm_year + 1900;
-		rtcDate.month   = time->tm_mon  + 1;
-		rtcDate.day     = time->tm_mday;
-		rtcDate.hour    = time->tm_hour;
-		rtcDate.minute  = time->tm_min;
-		rtcDate.second  = time->tm_sec;
+        rtcDate.year   = time->tm_year + 1900;
+        rtcDate.month  = time->tm_mon + 1;
+        rtcDate.day    = time->tm_mday;
+        rtcDate.hour   = time->tm_hour;
+        rtcDate.minute = time->tm_min;
+        rtcDate.second = time->tm_sec;
 
-		portENTER_CRITICAL();
-		SNVS_HP_RTC_StopTimer(SNVS);
-		SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate);
-		SNVS_HP_RTC_StartTimer(SNVS);
-		portEXIT_CRITICAL();
+        portENTER_CRITICAL();
+        SNVS_HP_RTC_StopTimer(SNVS);
+        SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate);
+        SNVS_HP_RTC_StartTimer(SNVS);
+        portEXIT_CRITICAL();
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetCurrentDateTime(struct tm* datetime)
-	{
-		if (datetime == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_GetCurrentDateTime(struct tm *datetime)
+    {
+        if (datetime == NULL) {
+            return RtcBspError;
+        }
 
-		snvs_hp_rtc_datetime_t rtcDate;
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
+        SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
 
-		datetime->tm_year  = rtcDate.year    - 1900;
-		datetime->tm_mon   = rtcDate.month   - 1;
-		datetime->tm_mday  = rtcDate.day;
-		datetime->tm_hour  = rtcDate.hour;
-		datetime->tm_min   = rtcDate.minute;
-		datetime->tm_sec   = rtcDate.second;
+        datetime->tm_year = rtcDate.year - 1900;
+        datetime->tm_mon  = rtcDate.month - 1;
+        datetime->tm_mday = rtcDate.day;
+        datetime->tm_hour = rtcDate.hour;
+        datetime->tm_min  = rtcDate.minute;
+        datetime->tm_sec  = rtcDate.second;
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetCurrentTimestamp(time_t* timestamp)
-	{
-		if (timestamp == NULL)
-		{
-			return RtcBspError;
-		}
-		snvs_hp_rtc_datetime_t rtcDate;
+    RtcBspError_e rtc_GetCurrentTimestamp(time_t *timestamp)
+    {
+        if (timestamp == NULL) {
+            return RtcBspError;
+        }
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
-		*timestamp = (time_t)SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
+        SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
+        *timestamp = (time_t)SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmOnDate(struct tm* datetime)
-	{
-		if (datetime == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_SetAlarmOnDate(struct tm *datetime)
+    {
+        if (datetime == NULL) {
+            return RtcBspError;
+        }
 
-		snvs_hp_rtc_datetime_t rtcDate;
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		rtcDate.year    = datetime->tm_year + 1900;
-		rtcDate.month   = datetime->tm_mon  + 1;
-		rtcDate.day     = datetime->tm_mday;
-		rtcDate.hour    = datetime->tm_hour;
-		rtcDate.minute  = datetime->tm_min;
-		rtcDate.second  = datetime->tm_sec;
+        rtcDate.year   = datetime->tm_year + 1900;
+        rtcDate.month  = datetime->tm_mon + 1;
+        rtcDate.day    = datetime->tm_mday;
+        rtcDate.hour   = datetime->tm_hour;
+        rtcDate.minute = datetime->tm_min;
+        rtcDate.second = datetime->tm_sec;
 
-		rtc_EnableAlarmIrq();
-		SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate);
+        rtc_EnableAlarmIrq();
+        SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate);
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmOnTimestamp(uint32_t secs)
-	{
-		snvs_hp_rtc_datetime_t rtcDate;
+    RtcBspError_e rtc_SetAlarmOnTimestamp(uint32_t secs)
+    {
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		SNVS_HP_ConvertSecondsToDatetime(secs, &rtcDate);
+        SNVS_HP_ConvertSecondsToDatetime(secs, &rtcDate);
 
-		if (SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate) != kStatus_Success)
-		{
-			return RtcBspError;
-		}
+        if (SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate) != kStatus_Success) {
+            return RtcBspError;
+        }
 
-		rtc_EnableAlarmIrq();
+        rtc_EnableAlarmIrq();
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_SetAlarmInSecondsFromNow(uint32_t secs)
-	{
-		snvs_hp_rtc_datetime_t rtcDate;
+    RtcBspError_e rtc_SetAlarmInSecondsFromNow(uint32_t secs)
+    {
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
+        SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
 
-		uint32_t seconds = SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
+        uint32_t seconds = SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
 
-		seconds += secs;
+        seconds += secs;
 
-		SNVS_HP_ConvertSecondsToDatetime(seconds, &rtcDate);
+        SNVS_HP_ConvertSecondsToDatetime(seconds, &rtcDate);
 
-		rtc_EnableAlarmIrq();
-		SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate);
+        rtc_EnableAlarmIrq();
+        SNVS_HP_RTC_SetAlarm(SNVS, &rtcDate);
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_GetAlarmTimestamp(uint32_t* secs)
-	{
-		if (secs == NULL)
-		{
-			return RtcBspError;
-		}
+    RtcBspError_e rtc_GetAlarmTimestamp(uint32_t *secs)
+    {
+        if (secs == NULL) {
+            return RtcBspError;
+        }
 
-		snvs_hp_rtc_datetime_t rtcDate;
+        snvs_hp_rtc_datetime_t rtcDate;
 
-		SNVS_HP_RTC_GetAlarm(SNVS, &rtcDate);
+        SNVS_HP_RTC_GetAlarm(SNVS, &rtcDate);
 
-		*secs = SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
-		return RtcBspOK;
-	}
-	static const uint32_t irqTimeout = 100000;
-	RtcBspError_e rtc_EnableAlarmIrq()
-	{
-		uint32_t cnt = irqTimeout;
-		SNVS->HPCR |= SNVS_HPCR_HPTA_EN_MASK;
-		while ((!(SNVS->HPCR & SNVS_HPCR_HPTA_EN_MASK)) && cnt)
-		{
-			cnt--;
-		}
+        *secs = SNVS_HP_ConvertDatetimeToSeconds(&rtcDate);
+        return RtcBspOK;
+    }
+    static const uint32_t irqTimeout = 100000;
+    RtcBspError_e rtc_EnableAlarmIrq()
+    {
+        uint32_t cnt = irqTimeout;
+        SNVS->HPCR |= SNVS_HPCR_HPTA_EN_MASK;
+        while ((!(SNVS->HPCR & SNVS_HPCR_HPTA_EN_MASK)) && cnt) {
+            cnt--;
+        }
 
-		if (cnt == 0)
-		{
-			return RtcBspError;
-		}
+        if (cnt == 0) {
+            return RtcBspError;
+        }
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_DisableAlarmIrq()
-	{
-		uint32_t cnt = irqTimeout;
+    RtcBspError_e rtc_DisableAlarmIrq()
+    {
+        uint32_t cnt = irqTimeout;
 
-		SNVS->HPCR &= ~SNVS_HPCR_HPTA_EN_MASK;
-		while ((SNVS->HPCR & SNVS_HPCR_HPTA_EN_MASK) && cnt)
-		{
-			cnt--;
-		}
+        SNVS->HPCR &= ~SNVS_HPCR_HPTA_EN_MASK;
+        while ((SNVS->HPCR & SNVS_HPCR_HPTA_EN_MASK) && cnt) {
+            cnt--;
+        }
 
-		if (cnt == 0)
-		{
-			return RtcBspError;
-		}
+        if (cnt == 0) {
+            return RtcBspError;
+        }
 
-		return RtcBspOK;
-	}
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_MaskAlarmIrq()
-	{
-		NVIC_DisableIRQ(SNVS_HP_WRAPPER_IRQn);
-		return RtcBspOK;
-	}
+    RtcBspError_e rtc_MaskAlarmIrq()
+    {
+        NVIC_DisableIRQ(SNVS_HP_WRAPPER_IRQn);
+        return RtcBspOK;
+    }
 
-	RtcBspError_e rtc_UnmaskAlarmIrq()
-	{
-		NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
-		return RtcBspOK;
-	}
+    RtcBspError_e rtc_UnmaskAlarmIrq()
+    {
+        NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
+        return RtcBspOK;
+    }
 
-	time_t rtc_GetSecondCounter()
-	{
-		time_t seconds = 0;
-		time_t tmp = 0;
+    time_t rtc_GetSecondCounter()
+    {
+        time_t seconds = 0;
+        time_t tmp     = 0;
 
-		do
-		{
-			seconds = tmp;
-			tmp = (SNVS->HPRTCMR << 17U) | (SNVS->HPRTCLR >> 15U);
-		} while (tmp != seconds);
+        do {
+            seconds = tmp;
+            tmp     = (SNVS->HPRTCMR << 17U) | (SNVS->HPRTCLR >> 15U);
+        } while (tmp != seconds);
 
-		return seconds;
-	}
+        return seconds;
+    }
 
-	RtcBspError_e rtc_SetMinuteAlarm(time_t timestamp)
-	{
-		uint32_t secondsToMinute = 60 - ( timestamp % 60 );
+    RtcBspError_e rtc_SetMinuteAlarm(time_t timestamp)
+    {
+        uint32_t secondsToMinute = 60 - (timestamp % 60);
 
-		struct tm date;
-		rtc_GetCurrentDateTime(&date);
-
-/*		LOG_INFO("seconds %d",  ( timestamp % 60 ));
-		LOG_INFO("seconds to minute %d", secondsToMinute);*/
-
-		return rtc_SetAlarmInSecondsFromNow(secondsToMinute);
-	}
-}
+        struct tm date;
+        rtc_GetCurrentDateTime(&date);
 
+        /*		LOG_INFO("seconds %d",  ( timestamp % 60 ));
+                LOG_INFO("seconds to minute %d", secondsToMinute);*/
 
+        return rtc_SetAlarmInSecondsFromNow(secondsToMinute);
+    }
+} // namespace bsp
 
 extern "C"
 {
-	void SNVS_HP_WRAPPER_IRQHandler()
-	{
-		BaseType_t xHigherPriorityTaskWoken = 0;
-		if (SNVS_HP_RTC_GetStatusFlags(SNVS) & kSNVS_RTC_AlarmInterruptFlag)
-		{
-			uint8_t notification = static_cast<uint8_t>(bsp::rtcIrqNotifications::alarmOcured);
-			bsp::rtc_DisableAlarmIrq();
-			xQueueSendFromISR(qHandleRtcIrq,&notification, &xHigherPriorityTaskWoken);
-			//TODO service function call
-		  //  RtcAlarmIrqHandler();
-			/* Clear alarm flag */
-			SNVS_HP_RTC_ClearStatusFlags(SNVS, kSNVS_RTC_AlarmInterruptFlag);
-		}
-		 // Switch context if necessary
-		portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
-		/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
-		  exception return operation might vector to incorrect interrupt */
-		#if defined __CORTEX_M && (__CORTEX_M == 4U)
-			__DSB();
-		#endif
-	}
-
+    void SNVS_HP_WRAPPER_IRQHandler()
+    {
+        BaseType_t xHigherPriorityTaskWoken = 0;
+        if (SNVS_HP_RTC_GetStatusFlags(SNVS) & kSNVS_RTC_AlarmInterruptFlag) {
+            uint8_t notification = static_cast<uint8_t>(bsp::rtcIrqNotifications::alarmOcured);
+            bsp::rtc_DisableAlarmIrq();
+            xQueueSendFromISR(qHandleRtcIrq, &notification, &xHigherPriorityTaskWoken);
+            // TODO service function call
+            //  RtcAlarmIrqHandler();
+            /* Clear alarm flag */
+            SNVS_HP_RTC_ClearStatusFlags(SNVS, kSNVS_RTC_AlarmInterruptFlag);
+        }
+        // Switch context if necessary
+        portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
+/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
+  exception return operation might vector to incorrect interrupt */
+#if defined __CORTEX_M && (__CORTEX_M == 4U)
+        __DSB();
+#endif
+    }
 }
 /*
  *  **********************************************************************************************************************
- *  *                                                                                                                    *
- *  *                                                                                                                    *
- *  *                             SNVS RTC DRIVER STATIC FUNCTIONS COPIED FOR OUR USE                                    *
- *  *                                                                                                                    *
- *  *                                                                                                                    *
+ *  * *
+ *  * *
+ *  *                             SNVS RTC DRIVER STATIC FUNCTIONS COPIED FOR OUR USE *
+ *  * *
+ *  * *
  *  **********************************************************************************************************************
  */
-static const uint32_t SECONDS_IN_A_DAY = 86400;
-static const uint32_t SECONDS_IN_A_HOUR = 3600;
+static const uint32_t SECONDS_IN_A_DAY    = 86400;
+static const uint32_t SECONDS_IN_A_HOUR   = 3600;
 static const uint32_t SECONDS_IN_A_MINUTE = 60;
-static const uint32_t DAYS_IN_A_YEAR = 365;
-static const uint32_t YEAR_RANGE_START = 1970;
+static const uint32_t DAYS_IN_A_YEAR      = 365;
+static const uint32_t YEAR_RANGE_START    = 1970;
 
 static uint32_t SNVS_HP_ConvertDatetimeToSeconds(const snvs_hp_rtc_datetime_t *datetime)
 {
@@ -317,8 +303,7 @@ static uint32_t SNVS_HP_ConvertDatetimeToSeconds(const snvs_hp_rtc_datetime_t *d
      * represented in the hours, minutes and seconds field*/
     seconds += (datetime->day - 1);
     /* For leap year if month less than or equal to Febraury, decrement day counter*/
-    if ((!(datetime->year & 3U)) && (datetime->month <= 2U))
-    {
+    if ((!(datetime->year & 3U)) && (datetime->month <= 2U)) {
         seconds--;
     }
 
@@ -352,46 +337,39 @@ static void SNVS_HP_ConvertSecondsToDatetime(uint32_t seconds, snvs_hp_rtc_datet
     secondsRemaining = secondsRemaining % SECONDS_IN_A_DAY;
 
     /* Calculate the datetime hour, minute and second fields */
-    datetime->hour = secondsRemaining / SECONDS_IN_A_HOUR;
+    datetime->hour   = secondsRemaining / SECONDS_IN_A_HOUR;
     secondsRemaining = secondsRemaining % SECONDS_IN_A_HOUR;
     datetime->minute = secondsRemaining / 60U;
     datetime->second = secondsRemaining % SECONDS_IN_A_MINUTE;
 
     /* Calculate year */
-    daysInYear = DAYS_IN_A_YEAR;
+    daysInYear     = DAYS_IN_A_YEAR;
     datetime->year = YEAR_RANGE_START;
-    while (days > daysInYear)
-    {
+    while (days > daysInYear) {
         /* Decrease day count by a year and increment year by 1 */
         days -= daysInYear;
         datetime->year++;
 
         /* Adjust the number of days for a leap year */
-        if (datetime->year & 3U)
-        {
+        if (datetime->year & 3U) {
             daysInYear = DAYS_IN_A_YEAR;
         }
-        else
-        {
+        else {
             daysInYear = DAYS_IN_A_YEAR + 1;
         }
     }
 
     /* Adjust the days in February for a leap year */
-    if (!(datetime->year & 3U))
-    {
+    if (!(datetime->year & 3U)) {
         daysPerMonth[2] = 29U;
     }
 
-    for (x = 1U; x <= 12U; x++)
-    {
-        if (days <= daysPerMonth[x])
-        {
+    for (x = 1U; x <= 12U; x++) {
+        if (days <= daysPerMonth[x]) {
             datetime->month = x;
             break;
         }
-        else
-        {
+        else {
             days -= daysPerMonth[x];
         }
     }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_cdc_acm.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_cdc_acm.c
index 6da1fd65c..82077241d 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_cdc_acm.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_cdc_acm.c
@@ -23,8 +23,8 @@
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
-#define USB_CDC_ACM_ENTER_CRITICAL()                                                                                                                           \
-    USB_OSA_SR_ALLOC();                                                                                                                                        \
+#define USB_CDC_ACM_ENTER_CRITICAL()                                                                                   \
+    USB_OSA_SR_ALLOC();                                                                                                \
     USB_OSA_ENTER_CRITICAL()
 
 #define USB_CDC_ACM_EXIT_CRITICAL() USB_OSA_EXIT_CRITICAL()
@@ -34,7 +34,8 @@
  ******************************************************************************/
 /* CDC ACM device instance */
 
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) usb_device_cdc_acm_struct_t g_cdcAcmHandle[USB_DEVICE_CONFIG_CDC_ACM];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE)
+    usb_device_cdc_acm_struct_t g_cdcAcmHandle[USB_DEVICE_CONFIG_CDC_ACM];
 
 /*******************************************************************************
  * Code
@@ -51,10 +52,8 @@ USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) usb_device_cdc_acm_str
 static usb_status_t USB_DeviceCdcAcmAllocateHandle(usb_device_cdc_acm_struct_t **handle)
 {
     int32_t count;
-    for (count = 0; count < USB_DEVICE_CONFIG_CDC_ACM; count++)
-    {
-        if (NULL == g_cdcAcmHandle[count].handle)
-        {
+    for (count = 0; count < USB_DEVICE_CONFIG_CDC_ACM; count++) {
+        if (NULL == g_cdcAcmHandle[count].handle) {
             *handle = &g_cdcAcmHandle[count];
             return kStatus_USB_Success;
         }
@@ -73,10 +72,10 @@ static usb_status_t USB_DeviceCdcAcmAllocateHandle(usb_device_cdc_acm_struct_t *
  */
 static usb_status_t USB_DeviceCdcAcmFreeHandle(usb_device_cdc_acm_struct_t *handle)
 {
-    handle->handle = NULL;
-    handle->configStruct = NULL;
+    handle->handle        = NULL;
+    handle->configStruct  = NULL;
     handle->configuration = 0;
-    handle->alternate = 0;
+    handle->alternate     = 0;
     return kStatus_USB_Success;
 }
 
@@ -90,23 +89,24 @@ static usb_status_t USB_DeviceCdcAcmFreeHandle(usb_device_cdc_acm_struct_t *hand
  * @param callbackParam The pointer to the parameter of the callback.
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceCdcAcmInterruptIn(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+usb_status_t USB_DeviceCdcAcmInterruptIn(usb_device_handle handle,
+                                         usb_device_endpoint_callback_message_struct_t *message,
+                                         void *callbackParam)
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
     usb_status_t error = kStatus_USB_Error;
-    cdcAcmHandle = (usb_device_cdc_acm_struct_t *)callbackParam;
-    if (!cdcAcmHandle)
-    {
+    cdcAcmHandle       = (usb_device_cdc_acm_struct_t *)callbackParam;
+    if (!cdcAcmHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
     cdcAcmHandle->interruptIn.isBusy = 0;
 
-    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback))
-    {
+    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback)) {
         /*classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
         it is from the second parameter of classInit */
-        error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSerialStateNotif, message);
+        error = cdcAcmHandle->configStruct->classCallback(
+            (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSerialStateNotif, message);
     }
     return error;
 }
@@ -121,24 +121,25 @@ usb_status_t USB_DeviceCdcAcmInterruptIn(usb_device_handle handle, usb_device_en
  * @param callbackParam The pointer to the parameter of the callback.
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceCdcAcmBulkIn(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+usb_status_t USB_DeviceCdcAcmBulkIn(usb_device_handle handle,
+                                    usb_device_endpoint_callback_message_struct_t *message,
+                                    void *callbackParam)
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
     usb_status_t error = kStatus_USB_Error;
-    cdcAcmHandle = (usb_device_cdc_acm_struct_t *)callbackParam;
+    cdcAcmHandle       = (usb_device_cdc_acm_struct_t *)callbackParam;
 
-    if (!cdcAcmHandle)
-    {
+    if (!cdcAcmHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
     cdcAcmHandle->bulkIn.isBusy = 0;
 
-    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback))
-    {
+    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback)) {
         /*classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
         it is from the second parameter of classInit */
-        error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendResponse, message);
+        error = cdcAcmHandle->configStruct->classCallback(
+            (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendResponse, message);
     }
     return error;
 }
@@ -153,24 +154,25 @@ usb_status_t USB_DeviceCdcAcmBulkIn(usb_device_handle handle, usb_device_endpoin
  * @param callbackParam The pointer to the parameter of the callback.
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceCdcAcmBulkOut(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+usb_status_t USB_DeviceCdcAcmBulkOut(usb_device_handle handle,
+                                     usb_device_endpoint_callback_message_struct_t *message,
+                                     void *callbackParam)
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
     usb_status_t error = kStatus_USB_Error;
-    cdcAcmHandle = (usb_device_cdc_acm_struct_t *)callbackParam;
+    cdcAcmHandle       = (usb_device_cdc_acm_struct_t *)callbackParam;
 
-    if (!cdcAcmHandle)
-    {
+    if (!cdcAcmHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
     cdcAcmHandle->bulkOut.isBusy = 0;
 
-    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback))
-    {
+    if ((NULL != cdcAcmHandle->configStruct) && (cdcAcmHandle->configStruct->classCallback)) {
         /*classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
         it is from the second parameter of classInit */
-        error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventRecvResponse, message);
+        error = cdcAcmHandle->configStruct->classCallback(
+            (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventRecvResponse, message);
     }
     return error;
 }
@@ -187,29 +189,24 @@ usb_status_t USB_DeviceCdcAcmEndpointsInit(usb_device_cdc_acm_struct_t *cdcAcmHa
 {
     usb_device_interface_list_t *interfaceList;
     usb_device_interface_struct_t *interface = NULL;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                       = kStatus_USB_Error;
 
-    if (!cdcAcmHandle)
-    {
+    if (!cdcAcmHandle) {
         return error;
     }
 
     /* return error when configuration is invalid (0 or more than the configuration number) */
-    if ((cdcAcmHandle->configuration == 0U) || (cdcAcmHandle->configuration > cdcAcmHandle->configStruct->classInfomation->configurations))
-    {
+    if ((cdcAcmHandle->configuration == 0U) ||
+        (cdcAcmHandle->configuration > cdcAcmHandle->configStruct->classInfomation->configurations)) {
         return error;
     }
 
     interfaceList = &cdcAcmHandle->configStruct->classInfomation->interfaceList[cdcAcmHandle->configuration - 1];
 
-    for (int count = 0; count < interfaceList->count; count++)
-    {
-        if (USB_DEVICE_CONFIG_CDC_COMM_CLASS_CODE == interfaceList->interfaces[count].classCode)
-        {
-            for (int index = 0; index < interfaceList->interfaces[count].count; index++)
-            {
-                if (interfaceList->interfaces[count].interface[index].alternateSetting == cdcAcmHandle->alternate)
-                {
+    for (int count = 0; count < interfaceList->count; count++) {
+        if (USB_DEVICE_CONFIG_CDC_COMM_CLASS_CODE == interfaceList->interfaces[count].classCode) {
+            for (int index = 0; index < interfaceList->interfaces[count].count; index++) {
+                if (interfaceList->interfaces[count].interface[index].alternateSetting == cdcAcmHandle->alternate) {
                     interface = &interfaceList->interfaces[count].interface[index];
                     break;
                 }
@@ -218,30 +215,28 @@ usb_status_t USB_DeviceCdcAcmEndpointsInit(usb_device_cdc_acm_struct_t *cdcAcmHa
             break;
         }
     }
-    if (!interface)
-    {
+    if (!interface) {
         return error;
     }
     cdcAcmHandle->commInterfaceHandle = interface;
-    for (int count = 0; count < interface->endpointList.count; count++)
-    {
+    for (int count = 0; count < interface->endpointList.count; count++) {
         usb_device_endpoint_init_struct_t epInitStruct;
         usb_device_endpoint_callback_struct_t epCallback;
-        epInitStruct.zlt = 0;
-        epInitStruct.interval = interface->endpointList.endpoint[count].interval;
+        epInitStruct.zlt             = 0;
+        epInitStruct.interval        = interface->endpointList.endpoint[count].interval;
         epInitStruct.endpointAddress = interface->endpointList.endpoint[count].endpointAddress;
-        epInitStruct.maxPacketSize = interface->endpointList.endpoint[count].maxPacketSize;
-        epInitStruct.transferType = interface->endpointList.endpoint[count].transferType;
+        epInitStruct.maxPacketSize   = interface->endpointList.endpoint[count].maxPacketSize;
+        epInitStruct.transferType    = interface->endpointList.endpoint[count].transferType;
 
-        if ((USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
-            (USB_ENDPOINT_INTERRUPT == epInitStruct.transferType))
-        {
+        if ((USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
+            (USB_ENDPOINT_INTERRUPT == epInitStruct.transferType)) {
             cdcAcmHandle->interruptIn.ep = (epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK);
-            cdcAcmHandle->interruptIn.isBusy = 0;
+            cdcAcmHandle->interruptIn.isBusy         = 0;
             cdcAcmHandle->interruptIn.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-            cdcAcmHandle->interruptIn.pipeStall = 0U;
-            cdcAcmHandle->interruptIn.pipeDataLen = 0U;
-            epCallback.callbackFn = USB_DeviceCdcAcmInterruptIn;
+            cdcAcmHandle->interruptIn.pipeStall      = 0U;
+            cdcAcmHandle->interruptIn.pipeDataLen    = 0U;
+            epCallback.callbackFn                    = USB_DeviceCdcAcmInterruptIn;
         }
 
         epCallback.callbackParam = cdcAcmHandle;
@@ -249,14 +244,10 @@ usb_status_t USB_DeviceCdcAcmEndpointsInit(usb_device_cdc_acm_struct_t *cdcAcmHa
         error = USB_DeviceInitEndpoint(cdcAcmHandle->handle, &epInitStruct, &epCallback);
     }
 
-    for (int count = 0; count < interfaceList->count; count++)
-    {
-        if (USB_DEVICE_CONFIG_CDC_DATA_CLASS_CODE == interfaceList->interfaces[count].classCode)
-        {
-            for (int index = 0; index < interfaceList->interfaces[count].count; index++)
-            {
-                if (interfaceList->interfaces[count].interface[index].alternateSetting == cdcAcmHandle->alternate)
-                {
+    for (int count = 0; count < interfaceList->count; count++) {
+        if (USB_DEVICE_CONFIG_CDC_DATA_CLASS_CODE == interfaceList->interfaces[count].classCode) {
+            for (int index = 0; index < interfaceList->interfaces[count].count; index++) {
+                if (interfaceList->interfaces[count].interface[index].alternateSetting == cdcAcmHandle->alternate) {
                     interface = &interfaceList->interfaces[count].interface[index];
                     break;
                 }
@@ -267,39 +258,36 @@ usb_status_t USB_DeviceCdcAcmEndpointsInit(usb_device_cdc_acm_struct_t *cdcAcmHa
 
     cdcAcmHandle->dataInterfaceHandle = interface;
 
-    for (int count = 0; count < interface->endpointList.count; count++)
-    {
+    for (int count = 0; count < interface->endpointList.count; count++) {
         usb_device_endpoint_init_struct_t epInitStruct;
         usb_device_endpoint_callback_struct_t epCallback;
-        epInitStruct.zlt = 0;
-        epInitStruct.interval = interface->endpointList.endpoint[count].interval;
+        epInitStruct.zlt             = 0;
+        epInitStruct.interval        = interface->endpointList.endpoint[count].interval;
         epInitStruct.endpointAddress = interface->endpointList.endpoint[count].endpointAddress;
-        epInitStruct.maxPacketSize = interface->endpointList.endpoint[count].maxPacketSize;
-        epInitStruct.transferType = interface->endpointList.endpoint[count].transferType;
+        epInitStruct.maxPacketSize   = interface->endpointList.endpoint[count].maxPacketSize;
+        epInitStruct.transferType    = interface->endpointList.endpoint[count].transferType;
 
-        if ((USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
-            (USB_ENDPOINT_BULK == epInitStruct.transferType))
-        {
-            cdcAcmHandle->bulkIn.ep = (epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK);
+        if ((USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
+            (USB_ENDPOINT_BULK == epInitStruct.transferType)) {
+            cdcAcmHandle->bulkIn.ep     = (epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK);
             cdcAcmHandle->bulkIn.isBusy = 0;
             cdcAcmHandle->bulkIn.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-            cdcAcmHandle->bulkIn.pipeStall = 0U;
-            cdcAcmHandle->bulkIn.pipeDataLen = 0U;
-            epCallback.callbackFn = USB_DeviceCdcAcmBulkIn;
+            cdcAcmHandle->bulkIn.pipeStall      = 0U;
+            cdcAcmHandle->bulkIn.pipeDataLen    = 0U;
+            epCallback.callbackFn               = USB_DeviceCdcAcmBulkIn;
         }
-        else if ((USB_OUT ==
-                  ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
-                 (USB_ENDPOINT_BULK == epInitStruct.transferType))
-        {
-            cdcAcmHandle->bulkOut.ep = (epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK);
+        else if ((USB_OUT == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                              USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) &&
+                 (USB_ENDPOINT_BULK == epInitStruct.transferType)) {
+            cdcAcmHandle->bulkOut.ep     = (epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK);
             cdcAcmHandle->bulkOut.isBusy = 0;
             cdcAcmHandle->bulkOut.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-            cdcAcmHandle->bulkOut.pipeStall = 0U;
-            cdcAcmHandle->bulkOut.pipeDataLen = 0U;
-            epCallback.callbackFn = USB_DeviceCdcAcmBulkOut;
+            cdcAcmHandle->bulkOut.pipeStall      = 0U;
+            cdcAcmHandle->bulkOut.pipeDataLen    = 0U;
+            epCallback.callbackFn                = USB_DeviceCdcAcmBulkOut;
         }
-        else
-        {
+        else {
         }
         epCallback.callbackParam = cdcAcmHandle;
 
@@ -320,17 +308,16 @@ usb_status_t USB_DeviceCdcAcmEndpointsDeinit(usb_device_cdc_acm_struct_t *cdcAcm
 {
     usb_status_t error = kStatus_USB_Error;
 
-    if ((!cdcAcmHandle->commInterfaceHandle) || (!cdcAcmHandle->dataInterfaceHandle))
-    {
+    if ((!cdcAcmHandle->commInterfaceHandle) || (!cdcAcmHandle->dataInterfaceHandle)) {
         return error;
     }
-    for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++)
-    {
-        error = USB_DeviceDeinitEndpoint(cdcAcmHandle->handle, cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress);
+    for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++) {
+        error = USB_DeviceDeinitEndpoint(
+            cdcAcmHandle->handle, cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress);
     }
-    for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++)
-    {
-        error = USB_DeviceDeinitEndpoint(cdcAcmHandle->handle, cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress);
+    for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++) {
+        error = USB_DeviceDeinitEndpoint(
+            cdcAcmHandle->handle, cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress);
     }
     cdcAcmHandle->commInterfaceHandle = NULL;
     cdcAcmHandle->dataInterfaceHandle = NULL;
@@ -359,88 +346,74 @@ usb_status_t USB_DeviceCdcAcmEvent(void *handle, uint32_t event, void *param)
     uint8_t *temp8;
     uint8_t alternate;
 
-    if ((!param) || (!handle))
-    {
+    if ((!param) || (!handle)) {
         return kStatus_USB_InvalidHandle;
     }
 
     cdcAcmHandle = (usb_device_cdc_acm_struct_t *)handle;
 
-    switch (event)
-    {
+    switch (event) {
     case kUSB_DeviceClassEventDeviceReset:
         /* Bus reset, clear the configuration. */
         cdcAcmHandle->configuration = 0;
         break;
     case kUSB_DeviceClassEventSetConfiguration:
         temp8 = ((uint8_t *)param);
-        if (!cdcAcmHandle->configStruct)
-        {
+        if (!cdcAcmHandle->configStruct) {
             break;
         }
-        if (*temp8 == cdcAcmHandle->configuration)
-        {
+        if (*temp8 == cdcAcmHandle->configuration) {
             break;
         }
 
-        error = USB_DeviceCdcAcmEndpointsDeinit(cdcAcmHandle);
+        error                       = USB_DeviceCdcAcmEndpointsDeinit(cdcAcmHandle);
         cdcAcmHandle->configuration = *temp8;
-        cdcAcmHandle->alternate = 0;
-        error = USB_DeviceCdcAcmEndpointsInit(cdcAcmHandle);
-        if (kStatus_USB_Success != error)
-        {
+        cdcAcmHandle->alternate     = 0;
+        error                       = USB_DeviceCdcAcmEndpointsInit(cdcAcmHandle);
+        if (kStatus_USB_Success != error) {
             usb_echo("kUSB_DeviceClassEventSetConfiguration, USB_DeviceInitEndpoint fail\r\n");
         }
         break;
     case kUSB_DeviceClassEventSetInterface:
-        if (!cdcAcmHandle->configStruct)
-        {
+        if (!cdcAcmHandle->configStruct) {
             break;
         }
 
         interfaceAlternate = *((uint16_t *)param);
-        alternate = (uint8_t)(interfaceAlternate & 0xFFU);
+        alternate          = (uint8_t)(interfaceAlternate & 0xFFU);
 
-        if (cdcAcmHandle->interfaceNumber != ((uint8_t)(interfaceAlternate >> 8U)))
-        {
+        if (cdcAcmHandle->interfaceNumber != ((uint8_t)(interfaceAlternate >> 8U))) {
             break;
         }
-        if (alternate == cdcAcmHandle->alternate)
-        {
+        if (alternate == cdcAcmHandle->alternate) {
             break;
         }
-        error = USB_DeviceCdcAcmEndpointsDeinit(cdcAcmHandle);
+        error                   = USB_DeviceCdcAcmEndpointsDeinit(cdcAcmHandle);
         cdcAcmHandle->alternate = alternate;
-        error = USB_DeviceCdcAcmEndpointsInit(cdcAcmHandle);
-        if (kStatus_USB_Success != error)
-        {
+        error                   = USB_DeviceCdcAcmEndpointsInit(cdcAcmHandle);
+        if (kStatus_USB_Success != error) {
             usb_echo("kUSB_DeviceClassEventSetInterface, USB_DeviceInitEndpoint fail\r\n");
         }
         break;
     case kUSB_DeviceClassEventSetEndpointHalt:
-        if ((!cdcAcmHandle->configStruct) || (!cdcAcmHandle->commInterfaceHandle) || (!cdcAcmHandle->dataInterfaceHandle))
-        {
+        if ((!cdcAcmHandle->configStruct) || (!cdcAcmHandle->commInterfaceHandle) ||
+            (!cdcAcmHandle->dataInterfaceHandle)) {
             break;
         }
         temp8 = ((uint8_t *)param);
-        for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++)
-        {
-            if (*temp8 == cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
+        for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++) {
+            if (*temp8 == cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress) {
                 cdcAcmHandle->interruptIn.pipeStall = 1U;
-                error = USB_DeviceStallEndpoint(cdcAcmHandle->handle, *temp8);
+                error                               = USB_DeviceStallEndpoint(cdcAcmHandle->handle, *temp8);
             }
         }
-        for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++)
-        {
-            if (*temp8 == cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
-                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-                {
+        for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++) {
+            if (*temp8 == cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress) {
+                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
                     cdcAcmHandle->bulkIn.pipeStall = 1U;
                 }
-                else
-                {
+                else {
                     cdcAcmHandle->bulkOut.pipeStall = 1U;
                 }
                 error = USB_DeviceStallEndpoint(cdcAcmHandle->handle, *temp8);
@@ -448,87 +421,79 @@ usb_status_t USB_DeviceCdcAcmEvent(void *handle, uint32_t event, void *param)
         }
         break;
     case kUSB_DeviceClassEventClearEndpointHalt:
-        if ((!cdcAcmHandle->configStruct) || (!cdcAcmHandle->commInterfaceHandle) || (!cdcAcmHandle->dataInterfaceHandle))
-        {
+        if ((!cdcAcmHandle->configStruct) || (!cdcAcmHandle->commInterfaceHandle) ||
+            (!cdcAcmHandle->dataInterfaceHandle)) {
             break;
         }
         temp8 = ((uint8_t *)param);
-        for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++)
-        {
-            if (*temp8 == cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
+        for (int count = 0; count < cdcAcmHandle->commInterfaceHandle->endpointList.count; count++) {
+            if (*temp8 == cdcAcmHandle->commInterfaceHandle->endpointList.endpoint[count].endpointAddress) {
                 error = USB_DeviceUnstallEndpoint(cdcAcmHandle->handle, *temp8);
-                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-                {
-                    if (cdcAcmHandle->interruptIn.pipeStall)
-                    {
+                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
+                    if (cdcAcmHandle->interruptIn.pipeStall) {
                         cdcAcmHandle->interruptIn.pipeStall = 0U;
-                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->interruptIn.pipeDataBuffer)
-                        {
-                            error = USB_DeviceSendRequest(cdcAcmHandle->handle, (cdcAcmHandle->interruptIn.ep), cdcAcmHandle->interruptIn.pipeDataBuffer,
+                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->interruptIn.pipeDataBuffer) {
+                            error = USB_DeviceSendRequest(cdcAcmHandle->handle,
+                                                          (cdcAcmHandle->interruptIn.ep),
+                                                          cdcAcmHandle->interruptIn.pipeDataBuffer,
                                                           cdcAcmHandle->interruptIn.pipeDataLen);
-                            if (kStatus_USB_Success != error)
-                            {
+                            if (kStatus_USB_Success != error) {
                                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                                endpointCallbackMessage.buffer = cdcAcmHandle->interruptIn.pipeDataBuffer;
-                                endpointCallbackMessage.length = cdcAcmHandle->interruptIn.pipeDataLen;
+                                endpointCallbackMessage.buffer  = cdcAcmHandle->interruptIn.pipeDataBuffer;
+                                endpointCallbackMessage.length  = cdcAcmHandle->interruptIn.pipeDataLen;
                                 endpointCallbackMessage.isSetup = 0U;
                                 USB_DeviceCdcAcmBulkIn(cdcAcmHandle->handle, (void *)&endpointCallbackMessage, handle);
                             }
                             cdcAcmHandle->interruptIn.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-                            cdcAcmHandle->interruptIn.pipeDataLen = 0U;
+                            cdcAcmHandle->interruptIn.pipeDataLen    = 0U;
                         }
                     }
                 }
             }
         }
-        for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++)
-        {
+        for (int count = 0; count < cdcAcmHandle->dataInterfaceHandle->endpointList.count; count++) {
 
-            if (*temp8 == cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
+            if (*temp8 == cdcAcmHandle->dataInterfaceHandle->endpointList.endpoint[count].endpointAddress) {
                 error = USB_DeviceUnstallEndpoint(cdcAcmHandle->handle, *temp8);
-                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-                {
-                    if (cdcAcmHandle->bulkIn.pipeStall)
-                    {
+                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
+                    if (cdcAcmHandle->bulkIn.pipeStall) {
                         cdcAcmHandle->bulkIn.pipeStall = 0U;
-                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->bulkIn.pipeDataBuffer)
-                        {
-                            error = USB_DeviceSendRequest(cdcAcmHandle->handle, (cdcAcmHandle->bulkIn.ep), cdcAcmHandle->bulkIn.pipeDataBuffer,
+                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->bulkIn.pipeDataBuffer) {
+                            error = USB_DeviceSendRequest(cdcAcmHandle->handle,
+                                                          (cdcAcmHandle->bulkIn.ep),
+                                                          cdcAcmHandle->bulkIn.pipeDataBuffer,
                                                           cdcAcmHandle->bulkIn.pipeDataLen);
-                            if (kStatus_USB_Success != error)
-                            {
+                            if (kStatus_USB_Success != error) {
                                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                                endpointCallbackMessage.buffer = cdcAcmHandle->bulkIn.pipeDataBuffer;
-                                endpointCallbackMessage.length = cdcAcmHandle->bulkIn.pipeDataLen;
+                                endpointCallbackMessage.buffer  = cdcAcmHandle->bulkIn.pipeDataBuffer;
+                                endpointCallbackMessage.length  = cdcAcmHandle->bulkIn.pipeDataLen;
                                 endpointCallbackMessage.isSetup = 0U;
                                 USB_DeviceCdcAcmBulkIn(cdcAcmHandle->handle, (void *)&endpointCallbackMessage, handle);
                             }
                             cdcAcmHandle->bulkIn.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-                            cdcAcmHandle->bulkIn.pipeDataLen = 0U;
+                            cdcAcmHandle->bulkIn.pipeDataLen    = 0U;
                         }
                     }
                 }
-                else
-                {
-                    if (cdcAcmHandle->bulkOut.pipeStall)
-                    {
+                else {
+                    if (cdcAcmHandle->bulkOut.pipeStall) {
                         cdcAcmHandle->bulkOut.pipeStall = 0U;
-                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->bulkOut.pipeDataBuffer)
-                        {
-                            error = USB_DeviceRecvRequest(cdcAcmHandle->handle, (cdcAcmHandle->bulkOut.ep), cdcAcmHandle->bulkOut.pipeDataBuffer,
+                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != cdcAcmHandle->bulkOut.pipeDataBuffer) {
+                            error = USB_DeviceRecvRequest(cdcAcmHandle->handle,
+                                                          (cdcAcmHandle->bulkOut.ep),
+                                                          cdcAcmHandle->bulkOut.pipeDataBuffer,
                                                           cdcAcmHandle->bulkOut.pipeDataLen);
-                            if (kStatus_USB_Success != error)
-                            {
+                            if (kStatus_USB_Success != error) {
                                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                                endpointCallbackMessage.buffer = cdcAcmHandle->bulkOut.pipeDataBuffer;
-                                endpointCallbackMessage.length = cdcAcmHandle->bulkOut.pipeDataLen;
+                                endpointCallbackMessage.buffer  = cdcAcmHandle->bulkOut.pipeDataBuffer;
+                                endpointCallbackMessage.length  = cdcAcmHandle->bulkOut.pipeDataLen;
                                 endpointCallbackMessage.isSetup = 0U;
                                 USB_DeviceCdcAcmBulkOut(cdcAcmHandle->handle, (void *)&endpointCallbackMessage, handle);
                             }
                             cdcAcmHandle->bulkOut.pipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-                            cdcAcmHandle->bulkOut.pipeDataLen = 0U;
+                            cdcAcmHandle->bulkOut.pipeDataLen    = 0U;
                         }
                     }
                 }
@@ -536,68 +501,73 @@ usb_status_t USB_DeviceCdcAcmEvent(void *handle, uint32_t event, void *param)
         }
         break;
     case kUSB_DeviceClassEventClassRequest:
-        if (param)
-        {
+        if (param) {
             usb_device_control_request_struct_t *controlRequest = (usb_device_control_request_struct_t *)param;
 
-            if ((controlRequest->setup->wIndex & 0xFFU) != cdcAcmHandle->interfaceNumber)
-            {
+            if ((controlRequest->setup->wIndex & 0xFFU) != cdcAcmHandle->interfaceNumber) {
                 break;
             }
             /* Standard CDC request */
-            if (USB_REQUEST_TYPE_TYPE_CLASS == (controlRequest->setup->bmRequestType & USB_REQUEST_TYPE_TYPE_MASK))
-            {
-                reqParam.buffer = &(controlRequest->buffer);
-                reqParam.length = &(controlRequest->length);
+            if (USB_REQUEST_TYPE_TYPE_CLASS == (controlRequest->setup->bmRequestType & USB_REQUEST_TYPE_TYPE_MASK)) {
+                reqParam.buffer         = &(controlRequest->buffer);
+                reqParam.length         = &(controlRequest->length);
                 reqParam.interfaceIndex = controlRequest->setup->wIndex;
-                reqParam.setupValue = controlRequest->setup->wValue;
-                reqParam.isSetup = controlRequest->isSetup;
-                switch (controlRequest->setup->bRequest)
-                {
+                reqParam.setupValue     = controlRequest->setup->wValue;
+                reqParam.isSetup        = controlRequest->isSetup;
+                switch (controlRequest->setup->bRequest) {
                 case USB_DEVICE_CDC_REQUEST_SEND_ENCAPSULATED_COMMAND:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendEncapsulatedCommand, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendEncapsulatedCommand, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_GET_ENCAPSULATED_RESPONSE:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetEncapsulatedResponse, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetEncapsulatedResponse, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_SET_COMM_FEATURE:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetCommFeature, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetCommFeature, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_GET_COMM_FEATURE:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetCommFeature, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetCommFeature, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_CLEAR_COMM_FEATURE:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventClearCommFeature, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventClearCommFeature, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_GET_LINE_CODING:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetLineCoding, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventGetLineCoding, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_SET_LINE_CODING:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetLineCoding, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetLineCoding, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_SET_CONTROL_LINE_STATE:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetControlLineState, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSetControlLineState, &reqParam);
                     break;
                 case USB_DEVICE_CDC_REQUEST_SEND_BREAK:
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                     it is from the second parameter of classInit */
-                    error = cdcAcmHandle->configStruct->classCallback((class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendBreak, &reqParam);
+                    error = cdcAcmHandle->configStruct->classCallback(
+                        (class_handle_t)cdcAcmHandle, kUSB_DeviceCdcEventSendBreak, &reqParam);
                     break;
                 default:
                     error = kStatus_USB_InvalidRequest;
@@ -626,43 +596,39 @@ usb_status_t USB_DeviceCdcAcmEvent(void *handle, uint32_t event, void *param)
  * @param handle  It is out parameter. The class handle of the CDC ACM class.
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceCdcAcmInit(uint8_t controllerId, usb_device_class_config_struct_t *config, class_handle_t *handle)
+usb_status_t USB_DeviceCdcAcmInit(uint8_t controllerId,
+                                  usb_device_class_config_struct_t *config,
+                                  class_handle_t *handle)
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
     usb_status_t error = kStatus_USB_Error;
 
     error = USB_DeviceCdcAcmAllocateHandle(&cdcAcmHandle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
     error = USB_DeviceClassGetDeviceHandle(controllerId, &cdcAcmHandle->handle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
-    if (!cdcAcmHandle->handle)
-    {
+    if (!cdcAcmHandle->handle) {
         return kStatus_USB_InvalidHandle;
     }
-    cdcAcmHandle->configStruct = config;
+    cdcAcmHandle->configStruct  = config;
     cdcAcmHandle->configuration = 0;
-    cdcAcmHandle->alternate = 0xFF;
+    cdcAcmHandle->alternate     = 0xFF;
 
-    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->bulkIn.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->bulkIn.mutex))) {
         usb_echo("mutex create error!");
     }
-    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->bulkOut.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->bulkOut.mutex))) {
         usb_echo("mutex create error!");
     }
-    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->interruptIn.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexCreate(&(cdcAcmHandle->interruptIn.mutex))) {
         usb_echo("mutex create error!");
     }
     *handle = (class_handle_t)cdcAcmHandle;
@@ -685,20 +651,16 @@ usb_status_t USB_DeviceCdcAcmDeinit(class_handle_t handle)
 
     cdcAcmHandle = (usb_device_cdc_acm_struct_t *)handle;
 
-    if (!cdcAcmHandle)
-    {
+    if (!cdcAcmHandle) {
         return kStatus_USB_InvalidHandle;
     }
-    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->bulkIn.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->bulkIn.mutex))) {
         usb_echo("mutex destroy error!");
     }
-    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->bulkOut.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->bulkOut.mutex))) {
         usb_echo("mutex destroy error!");
     }
-    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->interruptIn.mutex)))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMutexDestroy((cdcAcmHandle->interruptIn.mutex))) {
         usb_echo("mutex destroy error!");
     }
     error = USB_DeviceCdcAcmEndpointsDeinit(cdcAcmHandle);
@@ -722,45 +684,37 @@ usb_status_t USB_DeviceCdcAcmDeinit(class_handle_t handle)
 usb_status_t USB_DeviceCdcAcmSend(class_handle_t handle, uint8_t ep, uint8_t *buffer, uint32_t length)
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                    = kStatus_USB_Error;
     usb_device_cdc_acm_pipe_t *cdcAcmPipe = NULL;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_InvalidHandle;
     }
     cdcAcmHandle = (usb_device_cdc_acm_struct_t *)handle;
 
-    if (cdcAcmHandle->bulkIn.ep == ep)
-    {
+    if (cdcAcmHandle->bulkIn.ep == ep) {
         cdcAcmPipe = &(cdcAcmHandle->bulkIn);
     }
-    else if (cdcAcmHandle->interruptIn.ep == ep)
-    {
+    else if (cdcAcmHandle->interruptIn.ep == ep) {
         cdcAcmPipe = &(cdcAcmHandle->interruptIn);
     }
-    else
-    {
+    else {
     }
 
-    if (NULL != cdcAcmPipe)
-    {
-        if (1U == cdcAcmPipe->isBusy)
-        {
+    if (NULL != cdcAcmPipe) {
+        if (1U == cdcAcmPipe->isBusy) {
             return kStatus_USB_Busy;
         }
         cdcAcmPipe->isBusy = 1U;
 
-        if (cdcAcmPipe->pipeStall)
-        {
+        if (cdcAcmPipe->pipeStall) {
             cdcAcmPipe->pipeDataBuffer = buffer;
-            cdcAcmPipe->pipeDataLen = length;
+            cdcAcmPipe->pipeDataLen    = length;
             return kStatus_USB_Success;
         }
 
         error = USB_DeviceSendRequest(cdcAcmHandle->handle, ep, buffer, length);
-        if (kStatus_USB_Success != error)
-        {
+        if (kStatus_USB_Success != error) {
             cdcAcmPipe->isBusy = 0U;
         }
     }
@@ -784,28 +738,24 @@ usb_status_t USB_DeviceCdcAcmRecv(class_handle_t handle, uint8_t ep, uint8_t *bu
 {
     usb_device_cdc_acm_struct_t *cdcAcmHandle;
     usb_status_t error = kStatus_USB_Error;
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_InvalidHandle;
     }
     cdcAcmHandle = (usb_device_cdc_acm_struct_t *)handle;
 
-    if (1U == cdcAcmHandle->bulkOut.isBusy)
-    {
+    if (1U == cdcAcmHandle->bulkOut.isBusy) {
         return kStatus_USB_Busy;
     }
     cdcAcmHandle->bulkOut.isBusy = 1U;
 
-    if (cdcAcmHandle->bulkOut.pipeStall)
-    {
+    if (cdcAcmHandle->bulkOut.pipeStall) {
         cdcAcmHandle->bulkOut.pipeDataBuffer = buffer;
-        cdcAcmHandle->bulkOut.pipeDataLen = length;
+        cdcAcmHandle->bulkOut.pipeDataLen    = length;
         return kStatus_USB_Success;
     }
 
     error = USB_DeviceRecvRequest(cdcAcmHandle->handle, ep, buffer, length);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         cdcAcmHandle->bulkOut.isBusy = 0U;
     }
     return error;
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_descriptor.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_descriptor.c
index 3bfafc43d..d80e7648b 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_descriptor.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/usb_device_descriptor.c
@@ -27,16 +27,17 @@ usb_device_endpoint_struct_t g_UsbDeviceCdcVcomCicEndpoints[USB_CDC_VCOM_ENDPOIN
 };
 
 /* Define endpoint for data class */
-usb_device_endpoint_struct_t g_UsbDeviceCdcVcomDicEndpoints[USB_CDC_VCOM_ENDPOINT_DIC_COUNT] = {{
-                                                                                                    USB_CDC_VCOM_BULK_IN_ENDPOINT | (USB_IN << 7U),
-                                                                                                    USB_ENDPOINT_BULK,
-                                                                                                    FS_CDC_VCOM_BULK_IN_PACKET_SIZE,
-                                                                                                },
-                                                                                                {
-                                                                                                    USB_CDC_VCOM_BULK_OUT_ENDPOINT | (USB_OUT << 7U),
-                                                                                                    USB_ENDPOINT_BULK,
-                                                                                                    FS_CDC_VCOM_BULK_OUT_PACKET_SIZE,
-                                                                                                }};
+usb_device_endpoint_struct_t g_UsbDeviceCdcVcomDicEndpoints[USB_CDC_VCOM_ENDPOINT_DIC_COUNT] = {
+    {
+        USB_CDC_VCOM_BULK_IN_ENDPOINT | (USB_IN << 7U),
+        USB_ENDPOINT_BULK,
+        FS_CDC_VCOM_BULK_IN_PACKET_SIZE,
+    },
+    {
+        USB_CDC_VCOM_BULK_OUT_ENDPOINT | (USB_OUT << 7U),
+        USB_ENDPOINT_BULK,
+        FS_CDC_VCOM_BULK_OUT_PACKET_SIZE,
+    }};
 
 /* Define interface for communication class */
 usb_device_interface_struct_t g_UsbDeviceCdcVcomCommunicationInterface[] = {{0,
@@ -56,9 +57,17 @@ usb_device_interface_struct_t g_UsbDeviceCdcVcomDataInterface[] = {{0,
 
 /* Define interfaces for virtual com */
 usb_device_interfaces_struct_t g_UsbDeviceCdcVcomInterfaces[USB_CDC_VCOM_INTERFACE_COUNT] = {
-    {USB_CDC_VCOM_CIC_CLASS, USB_CDC_VCOM_CIC_SUBCLASS, USB_CDC_VCOM_CIC_PROTOCOL, USB_CDC_VCOM_COMM_INTERFACE_INDEX, g_UsbDeviceCdcVcomCommunicationInterface,
+    {USB_CDC_VCOM_CIC_CLASS,
+     USB_CDC_VCOM_CIC_SUBCLASS,
+     USB_CDC_VCOM_CIC_PROTOCOL,
+     USB_CDC_VCOM_COMM_INTERFACE_INDEX,
+     g_UsbDeviceCdcVcomCommunicationInterface,
      sizeof(g_UsbDeviceCdcVcomCommunicationInterface) / sizeof(usb_device_interfaces_struct_t)},
-    {USB_CDC_VCOM_DIC_CLASS, USB_CDC_VCOM_DIC_SUBCLASS, USB_CDC_VCOM_DIC_PROTOCOL, USB_CDC_VCOM_DATA_INTERFACE_INDEX, g_UsbDeviceCdcVcomDataInterface,
+    {USB_CDC_VCOM_DIC_CLASS,
+     USB_CDC_VCOM_DIC_SUBCLASS,
+     USB_CDC_VCOM_DIC_PROTOCOL,
+     USB_CDC_VCOM_DATA_INTERFACE_INDEX,
+     g_UsbDeviceCdcVcomDataInterface,
      sizeof(g_UsbDeviceCdcVcomDataInterface) / sizeof(usb_device_interfaces_struct_t)},
 };
 
@@ -122,12 +131,16 @@ uint8_t g_UsbDeviceConfigurationDescriptor[] = {
     /* CONFIGURATION Descriptor Type */
     USB_DESCRIPTOR_TYPE_CONFIGURE,
     /* Total length of data returned for this configuration. */
-    USB_SHORT_GET_LOW(USB_DESCRIPTOR_LENGTH_CONFIGURE + USB_DESCRIPTOR_LENGTH_INTERFACE + USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC +
-                      USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG + USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT + USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC +
-                      USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_INTERFACE + USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_ENDPOINT),
-    USB_SHORT_GET_HIGH(USB_DESCRIPTOR_LENGTH_CONFIGURE + USB_DESCRIPTOR_LENGTH_INTERFACE + USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC +
-                       USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG + USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT + USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC +
-                       USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_INTERFACE + USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_ENDPOINT),
+    USB_SHORT_GET_LOW(USB_DESCRIPTOR_LENGTH_CONFIGURE + USB_DESCRIPTOR_LENGTH_INTERFACE +
+                      USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC + USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG +
+                      USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT + USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC +
+                      USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_INTERFACE +
+                      USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_ENDPOINT),
+    USB_SHORT_GET_HIGH(USB_DESCRIPTOR_LENGTH_CONFIGURE + USB_DESCRIPTOR_LENGTH_INTERFACE +
+                       USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC + USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG +
+                       USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT + USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC +
+                       USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_INTERFACE +
+                       USB_DESCRIPTOR_LENGTH_ENDPOINT + USB_DESCRIPTOR_LENGTH_ENDPOINT),
     /* Number of interfaces supported by this configuration */
     USB_CDC_VCOM_INTERFACE_COUNT,
     /* Value to use as an argument to the SetConfiguration() request to select this configuration */
@@ -136,54 +149,87 @@ uint8_t g_UsbDeviceConfigurationDescriptor[] = {
     0,
     /* Configuration characteristics D7: Reserved (set to one) D6: Self-powered D5: Remote Wakeup D4...0: Reserved
        (reset to zero) */
-    (USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_D7_MASK) | (USB_DEVICE_CONFIG_SELF_POWER << USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_SELF_POWERED_SHIFT) |
+    (USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_D7_MASK) |
+        (USB_DEVICE_CONFIG_SELF_POWER << USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_SELF_POWERED_SHIFT) |
         (USB_DEVICE_CONFIG_REMOTE_WAKEUP << USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_REMOTE_WAKEUP_SHIFT),
     /* Maximum power consumption of the USB * device from the bus in this specific * configuration when the device is
        fully * operational. Expressed in 2 mA units *  (i.e., 50 = 100 mA).  */
     USB_DEVICE_MAX_POWER,
 
     /* Communication Interface Descriptor */
-    USB_DESCRIPTOR_LENGTH_INTERFACE, USB_DESCRIPTOR_TYPE_INTERFACE, USB_CDC_VCOM_COMM_INTERFACE_INDEX, 0x00, USB_CDC_VCOM_ENDPOINT_CIC_COUNT,
-    USB_CDC_VCOM_CIC_CLASS, USB_CDC_VCOM_CIC_SUBCLASS, USB_CDC_VCOM_CIC_PROTOCOL, 0x00, /* Interface Description String Index*/
+    USB_DESCRIPTOR_LENGTH_INTERFACE,
+    USB_DESCRIPTOR_TYPE_INTERFACE,
+    USB_CDC_VCOM_COMM_INTERFACE_INDEX,
+    0x00,
+    USB_CDC_VCOM_ENDPOINT_CIC_COUNT,
+    USB_CDC_VCOM_CIC_CLASS,
+    USB_CDC_VCOM_CIC_SUBCLASS,
+    USB_CDC_VCOM_CIC_PROTOCOL,
+    0x00, /* Interface Description String Index*/
 
     /* CDC Class-Specific descriptor */
     USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC, /* Size of this descriptor in bytes */
     USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE,  /* CS_INTERFACE Descriptor Type */
-    USB_CDC_HEADER_FUNC_DESC, 0x10, 0x01,  /* USB Class Definitions for Communications the Communication specification version 1.10 */
+    USB_CDC_HEADER_FUNC_DESC,
+    0x10,
+    0x01, /* USB Class Definitions for Communications the Communication specification version 1.10 */
 
-    USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG,    /* Size of this descriptor in bytes */
-    USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE,    /* CS_INTERFACE Descriptor Type */
-    USB_CDC_CALL_MANAGEMENT_FUNC_DESC, 0x01, /*Bit 0: Whether device handle call management itself 1, Bit 1: Whether device can send/receive call
-                                                management information over a Data Class Interface 0 */
-    0x01,                                    /* Indicates multiplexed commands are handled via data interface */
+    USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG, /* Size of this descriptor in bytes */
+    USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE, /* CS_INTERFACE Descriptor Type */
+    USB_CDC_CALL_MANAGEMENT_FUNC_DESC,
+    0x01, /*Bit 0: Whether device handle call management itself 1, Bit 1: Whether device can send/receive call
+             management information over a Data Class Interface 0 */
+    0x01, /* Indicates multiplexed commands are handled via data interface */
 
-    USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT,       /* Size of this descriptor in bytes */
-    USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE,     /* CS_INTERFACE Descriptor Type */
-    USB_CDC_ABSTRACT_CONTROL_FUNC_DESC, 0x06, /* Bit 0: Whether device supports the request combination of Set_Comm_Feature, Clear_Comm_Feature, and
-                                                 Get_Comm_Feature 0, Bit 1: Whether device supports the request combination of Set_Line_Coding,
-                                                 Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State 1, Bit ...  */
+    USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT,   /* Size of this descriptor in bytes */
+    USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE, /* CS_INTERFACE Descriptor Type */
+    USB_CDC_ABSTRACT_CONTROL_FUNC_DESC,
+    0x06, /* Bit 0: Whether device supports the request combination of Set_Comm_Feature, Clear_Comm_Feature, and
+             Get_Comm_Feature 0, Bit 1: Whether device supports the request combination of Set_Line_Coding,
+             Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State 1, Bit ...  */
 
     USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC, /* Size of this descriptor in bytes */
     USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE, /* CS_INTERFACE Descriptor Type */
-    USB_CDC_UNION_FUNC_DESC, 0x00,        /* The interface number of the Communications or Data Class interface  */
-    0x01,                                 /* Interface number of subordinate interface in the Union  */
+    USB_CDC_UNION_FUNC_DESC,
+    0x00, /* The interface number of the Communications or Data Class interface  */
+    0x01, /* Interface number of subordinate interface in the Union  */
 
     /*Notification Endpoint descriptor */
-    USB_DESCRIPTOR_LENGTH_ENDPOINT, USB_DESCRIPTOR_TYPE_ENDPOINT, USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT | (USB_IN << 7U), USB_ENDPOINT_INTERRUPT,
-    USB_SHORT_GET_LOW(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE), USB_SHORT_GET_HIGH(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE), FS_CDC_VCOM_INTERRUPT_IN_INTERVAL,
+    USB_DESCRIPTOR_LENGTH_ENDPOINT,
+    USB_DESCRIPTOR_TYPE_ENDPOINT,
+    USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT | (USB_IN << 7U),
+    USB_ENDPOINT_INTERRUPT,
+    USB_SHORT_GET_LOW(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE),
+    USB_SHORT_GET_HIGH(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE),
+    FS_CDC_VCOM_INTERRUPT_IN_INTERVAL,
 
     /* Data Interface Descriptor */
-    USB_DESCRIPTOR_LENGTH_INTERFACE, USB_DESCRIPTOR_TYPE_INTERFACE, USB_CDC_VCOM_DATA_INTERFACE_INDEX, 0x00, USB_CDC_VCOM_ENDPOINT_DIC_COUNT,
-    USB_CDC_VCOM_DIC_CLASS, USB_CDC_VCOM_DIC_SUBCLASS, USB_CDC_VCOM_DIC_PROTOCOL, 0x00, /* Interface Description String Index*/
+    USB_DESCRIPTOR_LENGTH_INTERFACE,
+    USB_DESCRIPTOR_TYPE_INTERFACE,
+    USB_CDC_VCOM_DATA_INTERFACE_INDEX,
+    0x00,
+    USB_CDC_VCOM_ENDPOINT_DIC_COUNT,
+    USB_CDC_VCOM_DIC_CLASS,
+    USB_CDC_VCOM_DIC_SUBCLASS,
+    USB_CDC_VCOM_DIC_PROTOCOL,
+    0x00, /* Interface Description String Index*/
 
     /*Bulk IN Endpoint descriptor */
-    USB_DESCRIPTOR_LENGTH_ENDPOINT, USB_DESCRIPTOR_TYPE_ENDPOINT, USB_CDC_VCOM_BULK_IN_ENDPOINT | (USB_IN << 7U), USB_ENDPOINT_BULK,
-    USB_SHORT_GET_LOW(FS_CDC_VCOM_BULK_IN_PACKET_SIZE), USB_SHORT_GET_HIGH(FS_CDC_VCOM_BULK_IN_PACKET_SIZE),
+    USB_DESCRIPTOR_LENGTH_ENDPOINT,
+    USB_DESCRIPTOR_TYPE_ENDPOINT,
+    USB_CDC_VCOM_BULK_IN_ENDPOINT | (USB_IN << 7U),
+    USB_ENDPOINT_BULK,
+    USB_SHORT_GET_LOW(FS_CDC_VCOM_BULK_IN_PACKET_SIZE),
+    USB_SHORT_GET_HIGH(FS_CDC_VCOM_BULK_IN_PACKET_SIZE),
     0x00, /* The polling interval value is every 0 Frames */
 
     /*Bulk OUT Endpoint descriptor */
-    USB_DESCRIPTOR_LENGTH_ENDPOINT, USB_DESCRIPTOR_TYPE_ENDPOINT, USB_CDC_VCOM_BULK_OUT_ENDPOINT | (USB_OUT << 7U), USB_ENDPOINT_BULK,
-    USB_SHORT_GET_LOW(FS_CDC_VCOM_BULK_OUT_PACKET_SIZE), USB_SHORT_GET_HIGH(FS_CDC_VCOM_BULK_OUT_PACKET_SIZE),
+    USB_DESCRIPTOR_LENGTH_ENDPOINT,
+    USB_DESCRIPTOR_TYPE_ENDPOINT,
+    USB_CDC_VCOM_BULK_OUT_ENDPOINT | (USB_OUT << 7U),
+    USB_ENDPOINT_BULK,
+    USB_SHORT_GET_LOW(FS_CDC_VCOM_BULK_OUT_PACKET_SIZE),
+    USB_SHORT_GET_HIGH(FS_CDC_VCOM_BULK_OUT_PACKET_SIZE),
     0x00, /* The polling interval value is every 0 Frames */
 };
 
@@ -194,17 +240,32 @@ uint8_t g_UsbDeviceString0[] = {2U + 2U, USB_DESCRIPTOR_TYPE_STRING, 0x09, 0x04}
 // Mudita
 USB_DMA_INIT_DATA_ALIGN(USB_DATA_ALIGN_SIZE)
 uint8_t g_UsbDeviceString1[] = {
-    2U + 2U * 18U, USB_DESCRIPTOR_TYPE_STRING, 'M', 0x00U, 'U', 0x00U, 'D', 0x00U, 'I', 0x00U, 'T', 0x00U, 'A', 0x00U,
+    2U + 2U * 18U,
+    USB_DESCRIPTOR_TYPE_STRING,
+    'M',
+    0x00U,
+    'U',
+    0x00U,
+    'D',
+    0x00U,
+    'I',
+    0x00U,
+    'T',
+    0x00U,
+    'A',
+    0x00U,
 };
 
 // PURE
 USB_DMA_INIT_DATA_ALIGN(USB_DATA_ALIGN_SIZE)
 uint8_t g_UsbDeviceString2[] = {2U + 2U * 20U, USB_DESCRIPTOR_TYPE_STRING, 'P', 0, 'U', 0, 'R', 0, 'E', 0};
 
-uint8_t *g_UsbDeviceStringDescriptorArray[USB_DEVICE_STRING_COUNT] = {g_UsbDeviceString0, g_UsbDeviceString1, g_UsbDeviceString2};
+uint8_t *g_UsbDeviceStringDescriptorArray[USB_DEVICE_STRING_COUNT] = {
+    g_UsbDeviceString0, g_UsbDeviceString1, g_UsbDeviceString2};
 
 /* Define string descriptor size */
-uint32_t g_UsbDeviceStringDescriptorLength[USB_DEVICE_STRING_COUNT] = {sizeof(g_UsbDeviceString0), sizeof(g_UsbDeviceString1), sizeof(g_UsbDeviceString2)};
+uint32_t g_UsbDeviceStringDescriptorLength[USB_DEVICE_STRING_COUNT] = {
+    sizeof(g_UsbDeviceString0), sizeof(g_UsbDeviceString1), sizeof(g_UsbDeviceString2)};
 usb_language_t g_UsbDeviceLanguage[USB_DEVICE_LANGUAGE_COUNT] = {{
     g_UsbDeviceStringDescriptorArray,
     g_UsbDeviceStringDescriptorLength,
@@ -231,7 +292,8 @@ usb_language_list_t g_UsbDeviceLanguageList = {
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle, usb_device_get_device_descriptor_struct_t *deviceDescriptor)
+usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle,
+                                           usb_device_get_device_descriptor_struct_t *deviceDescriptor)
 {
     deviceDescriptor->buffer = g_UsbDeviceDescriptor;
     deviceDescriptor->length = USB_DESCRIPTOR_LENGTH_DEVICE;
@@ -248,10 +310,10 @@ usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle, usb_device_
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceGetConfigurationDescriptor(usb_device_handle handle, usb_device_get_configuration_descriptor_struct_t *configurationDescriptor)
+usb_status_t USB_DeviceGetConfigurationDescriptor(
+    usb_device_handle handle, usb_device_get_configuration_descriptor_struct_t *configurationDescriptor)
 {
-    if (USB_CDC_VCOM_CONFIGURE_INDEX > configurationDescriptor->configuration)
-    {
+    if (USB_CDC_VCOM_CONFIGURE_INDEX > configurationDescriptor->configuration) {
         configurationDescriptor->buffer = g_UsbDeviceConfigurationDescriptor;
         configurationDescriptor->length = USB_DESCRIPTOR_LENGTH_CONFIGURATION_ALL;
         return kStatus_USB_Success;
@@ -269,32 +331,27 @@ usb_status_t USB_DeviceGetConfigurationDescriptor(usb_device_handle handle, usb_
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceGetStringDescriptor(usb_device_handle handle, usb_device_get_string_descriptor_struct_t *stringDescriptor)
+usb_status_t USB_DeviceGetStringDescriptor(usb_device_handle handle,
+                                           usb_device_get_string_descriptor_struct_t *stringDescriptor)
 {
-    if (stringDescriptor->stringIndex == 0U)
-    {
+    if (stringDescriptor->stringIndex == 0U) {
         stringDescriptor->buffer = (uint8_t *)g_UsbDeviceLanguageList.languageString;
         stringDescriptor->length = g_UsbDeviceLanguageList.stringLength;
     }
-    else
-    {
-        uint8_t languageId = 0U;
+    else {
+        uint8_t languageId    = 0U;
         uint8_t languageIndex = USB_DEVICE_STRING_COUNT;
 
-        for (; languageId < USB_DEVICE_LANGUAGE_COUNT; languageId++)
-        {
-            if (stringDescriptor->languageId == g_UsbDeviceLanguageList.languageList[languageId].languageId)
-            {
-                if (stringDescriptor->stringIndex < USB_DEVICE_STRING_COUNT)
-                {
+        for (; languageId < USB_DEVICE_LANGUAGE_COUNT; languageId++) {
+            if (stringDescriptor->languageId == g_UsbDeviceLanguageList.languageList[languageId].languageId) {
+                if (stringDescriptor->stringIndex < USB_DEVICE_STRING_COUNT) {
                     languageIndex = stringDescriptor->stringIndex;
                 }
                 break;
             }
         }
 
-        if (USB_DEVICE_STRING_COUNT == languageIndex)
-        {
+        if (USB_DEVICE_STRING_COUNT == languageIndex) {
             return kStatus_USB_InvalidRequest;
         }
         stringDescriptor->buffer = (uint8_t *)g_UsbDeviceLanguageList.languageList[languageId].string[languageIndex];
@@ -328,92 +385,82 @@ usb_status_t USB_DeviceSetSpeed(usb_device_handle handle, uint8_t speed)
     ptr1 = (usb_descriptor_union_t *)(&g_UsbDeviceConfigurationDescriptor[0]);
     ptr2 = (usb_descriptor_union_t *)(&g_UsbDeviceConfigurationDescriptor[USB_DESCRIPTOR_LENGTH_CONFIGURATION_ALL - 1]);
 
-    while (ptr1 < ptr2)
-    {
-        if (ptr1->common.bDescriptorType == USB_DESCRIPTOR_TYPE_ENDPOINT)
-        {
-            if (USB_SPEED_HIGH == speed)
-            {
-                if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) == USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
-                    (USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+    while (ptr1 < ptr2) {
+        if (ptr1->common.bDescriptorType == USB_DESCRIPTOR_TYPE_ENDPOINT) {
+            if (USB_SPEED_HIGH == speed) {
+                if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
+                     USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
+                    (USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT ==
+                     (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     ptr1->endpoint.bInterval = HS_CDC_VCOM_INTERRUPT_IN_INTERVAL;
-                    USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(HS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
+                    USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(HS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE,
+                                                       ptr1->endpoint.wMaxPacketSize);
                 }
-                else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) == USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
-                         (USB_CDC_VCOM_BULK_IN_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+                else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
+                          USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
+                         (USB_CDC_VCOM_BULK_IN_ENDPOINT ==
+                          (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(HS_CDC_VCOM_BULK_IN_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
                 }
                 else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
                           USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_OUT) &&
-                         (USB_CDC_VCOM_BULK_OUT_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+                         (USB_CDC_VCOM_BULK_OUT_ENDPOINT ==
+                          (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(HS_CDC_VCOM_BULK_OUT_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
                 }
-                else
-                {
+                else {
                 }
             }
-            else
-            {
-                if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) == USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
-                    (USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+            else {
+                if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
+                     USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
+                    (USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT ==
+                     (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     ptr1->endpoint.bInterval = FS_CDC_VCOM_INTERRUPT_IN_INTERVAL;
-                    USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
+                    USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE,
+                                                       ptr1->endpoint.wMaxPacketSize);
                 }
-                else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) == USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
-                         (USB_CDC_VCOM_BULK_IN_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+                else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
+                          USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN) &&
+                         (USB_CDC_VCOM_BULK_IN_ENDPOINT ==
+                          (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(FS_CDC_VCOM_BULK_IN_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
                 }
                 else if (((ptr1->endpoint.bEndpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) ==
                           USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_OUT) &&
-                         (USB_CDC_VCOM_BULK_OUT_ENDPOINT == (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)))
-                {
+                         (USB_CDC_VCOM_BULK_OUT_ENDPOINT ==
+                          (ptr1->endpoint.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))) {
                     USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(FS_CDC_VCOM_BULK_OUT_PACKET_SIZE, ptr1->endpoint.wMaxPacketSize);
                 }
-                else
-                {
+                else {
                 }
             }
         }
         ptr1 = (usb_descriptor_union_t *)((uint8_t *)ptr1 + ptr1->common.bLength);
     }
 
-    for (int i = 0; i < USB_CDC_VCOM_ENDPOINT_CIC_COUNT; i++)
-    {
-        if (USB_SPEED_HIGH == speed)
-        {
+    for (int i = 0; i < USB_CDC_VCOM_ENDPOINT_CIC_COUNT; i++) {
+        if (USB_SPEED_HIGH == speed) {
             g_UsbDeviceCdcVcomCicEndpoints[i].maxPacketSize = HS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE;
         }
-        else
-        {
+        else {
             g_UsbDeviceCdcVcomCicEndpoints[i].maxPacketSize = FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE;
         }
     }
-    for (int i = 0; i < USB_CDC_VCOM_ENDPOINT_DIC_COUNT; i++)
-    {
-        if (USB_SPEED_HIGH == speed)
-        {
-            if (g_UsbDeviceCdcVcomDicEndpoints[i].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK)
-            {
+    for (int i = 0; i < USB_CDC_VCOM_ENDPOINT_DIC_COUNT; i++) {
+        if (USB_SPEED_HIGH == speed) {
+            if (g_UsbDeviceCdcVcomDicEndpoints[i].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) {
                 g_UsbDeviceCdcVcomDicEndpoints[i].maxPacketSize = HS_CDC_VCOM_BULK_IN_PACKET_SIZE;
             }
-            else
-            {
+            else {
                 g_UsbDeviceCdcVcomDicEndpoints[i].maxPacketSize = HS_CDC_VCOM_BULK_OUT_PACKET_SIZE;
             }
         }
-        else
-        {
-            if (g_UsbDeviceCdcVcomDicEndpoints[i].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK)
-            {
+        else {
+            if (g_UsbDeviceCdcVcomDicEndpoints[i].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) {
                 g_UsbDeviceCdcVcomDicEndpoints[i].maxPacketSize = FS_CDC_VCOM_BULK_IN_PACKET_SIZE;
             }
-            else
-            {
+            else {
                 g_UsbDeviceCdcVcomDicEndpoints[i].maxPacketSize = FS_CDC_VCOM_BULK_OUT_PACKET_SIZE;
             }
         }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/virtual_com.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/virtual_com.c
index 31fcf8940..f34f4d25d 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/virtual_com.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/cdc/virtual_com.c
@@ -34,8 +34,9 @@
 #if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0)
 #include "usb_phy.h"
 #endif
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
 extern uint8_t USB_EnterLowpowerMode(void);
 #endif
 #include "pin_mux.h"
@@ -82,11 +83,13 @@ static uint8_t s_lineCoding[LINE_CODING_SIZE] = {
 
 /* Abstract state of cdc device */
 USB_DMA_INIT_DATA_ALIGN(USB_DATA_ALIGN_SIZE)
-static uint8_t s_abstractState[COMM_FEATURE_DATA_SIZE] = {(STATUS_ABSTRACT_STATE >> 0U) & 0x00FFU, (STATUS_ABSTRACT_STATE >> 8U) & 0x00FFU};
+static uint8_t s_abstractState[COMM_FEATURE_DATA_SIZE] = {(STATUS_ABSTRACT_STATE >> 0U) & 0x00FFU,
+                                                          (STATUS_ABSTRACT_STATE >> 8U) & 0x00FFU};
 
 /* Country code of cdc device */
 USB_DMA_INIT_DATA_ALIGN(USB_DATA_ALIGN_SIZE)
-static uint8_t s_countryCode[COMM_FEATURE_DATA_SIZE] = {(COUNTRY_SETTING >> 0U) & 0x00FFU, (COUNTRY_SETTING >> 8U) & 0x00FFU};
+static uint8_t s_countryCode[COMM_FEATURE_DATA_SIZE] = {(COUNTRY_SETTING >> 0U) & 0x00FFU,
+                                                        (COUNTRY_SETTING >> 8U) & 0x00FFU};
 
 /* CDC ACM information */
 USB_DMA_NONINIT_DATA_ALIGN(USB_DATA_ALIGN_SIZE) static usb_cdc_acm_info_t s_usbCdcAcmInfo;
@@ -110,10 +113,11 @@ static usb_device_class_config_list_struct_t s_cdcAcmConfigList = {
     1,
 };
 
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
 volatile static uint8_t s_waitForDataReceive = 0;
-volatile static uint8_t s_comOpen = 0;
+volatile static uint8_t s_comOpen            = 0;
 #endif
 /*******************************************************************************
  * Code
@@ -137,13 +141,11 @@ void USB_DeviceClockInit(void)
         BOARD_USB_PHY_TXCAL45DM,
     };
 
-    if (CONTROLLER_ID == kUSB_ControllerEhci0)
-    {
+    if (CONTROLLER_ID == kUSB_ControllerEhci0) {
         CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
         CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
     }
-    else
-    {
+    else {
         CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
         CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
     }
@@ -154,7 +156,7 @@ void USB_DeviceIsrEnable(void)
     uint8_t irqNumber;
 
     uint8_t usbDeviceEhciIrq[] = USBHS_IRQS;
-    irqNumber = usbDeviceEhciIrq[CONTROLLER_ID - kUSB_ControllerEhci0];
+    irqNumber                  = usbDeviceEhciIrq[CONTROLLER_ID - kUSB_ControllerEhci0];
 
     /* Install isr, set priority, and enable IRQ. */
     NVIC_SetPriority((IRQn_Type)irqNumber, USB_DEVICE_INTERRUPT_PRIORITY);
@@ -183,112 +185,102 @@ usb_status_t USB_DeviceCdcVcomCallback(class_handle_t handle, uint32_t event, vo
     uint8_t *uartBitmap;
     usb_device_cdc_acm_request_param_struct_t *acmReqParam;
     usb_device_endpoint_callback_message_struct_t *epCbParam;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error          = kStatus_USB_Error;
     usb_cdc_acm_info_t *acmInfo = &s_usbCdcAcmInfo;
-    acmReqParam = (usb_device_cdc_acm_request_param_struct_t *)param;
-    epCbParam = (usb_device_endpoint_callback_message_struct_t *)param;
-    switch (event)
-    {
+    acmReqParam                 = (usb_device_cdc_acm_request_param_struct_t *)param;
+    epCbParam                   = (usb_device_endpoint_callback_message_struct_t *)param;
+    switch (event) {
     case kUSB_DeviceCdcEventSendResponse: {
-        if ((epCbParam->length != 0) && (!(epCbParam->length % g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize)))
-        {
+        if ((epCbParam->length != 0) && (!(epCbParam->length % g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize))) {
             /* If the last packet is the size of endpoint, then send also zero-ended packet,
              ** meaning that we want to inform the host that we do not have any additional
              ** data, so it can flush the output.
              */
             error = USB_DeviceCdcAcmSend(handle, USB_CDC_VCOM_BULK_IN_ENDPOINT, NULL, 0);
         }
-        else if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions))
-        {
-            if ((epCbParam->buffer != NULL) || ((epCbParam->buffer == NULL) && (epCbParam->length == 0)))
-            {
+        else if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions)) {
+            if ((epCbParam->buffer != NULL) || ((epCbParam->buffer == NULL) && (epCbParam->length == 0))) {
                 /* User: add your own code for send complete event */
                 /* Schedule buffer for next receive event */
-                error = USB_DeviceCdcAcmRecv(handle, USB_CDC_VCOM_BULK_OUT_ENDPOINT, s_currRecvBuf, g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+                error = USB_DeviceCdcAcmRecv(handle,
+                                             USB_CDC_VCOM_BULK_OUT_ENDPOINT,
+                                             s_currRecvBuf,
+                                             g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
                 s_waitForDataReceive = 1;
                 USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK;
 #endif
             }
         }
-        else
-        {
+        else {
         }
-    }
-    break;
+    } break;
     case kUSB_DeviceCdcEventRecvResponse: {
-        if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions))
-        {
+        if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions)) {
             s_recvSize = epCbParam->length;
 
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
             s_waitForDataReceive = 0;
             USB0->INTEN |= USB_INTEN_SOFTOKEN_MASK;
 #endif
-            if (!s_recvSize)
-            {
+            if (!s_recvSize) {
                 /* Schedule buffer for next receive event */
-                error = USB_DeviceCdcAcmRecv(handle, USB_CDC_VCOM_BULK_OUT_ENDPOINT, s_currRecvBuf, g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+                error = USB_DeviceCdcAcmRecv(handle,
+                                             USB_CDC_VCOM_BULK_OUT_ENDPOINT,
+                                             s_currRecvBuf,
+                                             g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
                 s_waitForDataReceive = 1;
                 USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK;
 #endif
             }
         }
-    }
-    break;
+    } break;
     case kUSB_DeviceCdcEventSerialStateNotif:
         ((usb_device_cdc_acm_struct_t *)handle)->hasSentState = 0;
-        error = kStatus_USB_Success;
+        error                                                 = kStatus_USB_Success;
         break;
     case kUSB_DeviceCdcEventSendEncapsulatedCommand:
         break;
     case kUSB_DeviceCdcEventGetEncapsulatedResponse:
         break;
     case kUSB_DeviceCdcEventSetCommFeature:
-        if (USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE == acmReqParam->setupValue)
-        {
-            if (1 == acmReqParam->isSetup)
-            {
+        if (USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE == acmReqParam->setupValue) {
+            if (1 == acmReqParam->isSetup) {
                 *(acmReqParam->buffer) = s_abstractState;
             }
-            else
-            {
+            else {
                 *(acmReqParam->length) = 0;
             }
         }
-        else if (USB_DEVICE_CDC_FEATURE_COUNTRY_SETTING == acmReqParam->setupValue)
-        {
-            if (1 == acmReqParam->isSetup)
-            {
+        else if (USB_DEVICE_CDC_FEATURE_COUNTRY_SETTING == acmReqParam->setupValue) {
+            if (1 == acmReqParam->isSetup) {
                 *(acmReqParam->buffer) = s_countryCode;
             }
-            else
-            {
+            else {
                 *(acmReqParam->length) = 0;
             }
         }
-        else
-        {
+        else {
         }
         error = kStatus_USB_Success;
         break;
     case kUSB_DeviceCdcEventGetCommFeature:
-        if (USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE == acmReqParam->setupValue)
-        {
+        if (USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE == acmReqParam->setupValue) {
             *(acmReqParam->buffer) = s_abstractState;
             *(acmReqParam->length) = COMM_FEATURE_DATA_SIZE;
         }
-        else if (USB_DEVICE_CDC_FEATURE_COUNTRY_SETTING == acmReqParam->setupValue)
-        {
+        else if (USB_DEVICE_CDC_FEATURE_COUNTRY_SETTING == acmReqParam->setupValue) {
             *(acmReqParam->buffer) = s_countryCode;
             *(acmReqParam->length) = COMM_FEATURE_DATA_SIZE;
         }
-        else
-        {
+        else {
         }
         error = kStatus_USB_Success;
         break;
@@ -297,15 +289,13 @@ usb_status_t USB_DeviceCdcVcomCallback(class_handle_t handle, uint32_t event, vo
     case kUSB_DeviceCdcEventGetLineCoding:
         *(acmReqParam->buffer) = s_lineCoding;
         *(acmReqParam->length) = LINE_CODING_SIZE;
-        error = kStatus_USB_Success;
+        error                  = kStatus_USB_Success;
         break;
     case kUSB_DeviceCdcEventSetLineCoding: {
-        if (1 == acmReqParam->isSetup)
-        {
+        if (1 == acmReqParam->isSetup) {
             *(acmReqParam->buffer) = s_lineCoding;
         }
-        else
-        {
+        else {
             *(acmReqParam->length) = 0;
         }
     }
@@ -314,23 +304,19 @@ usb_status_t USB_DeviceCdcVcomCallback(class_handle_t handle, uint32_t event, vo
     case kUSB_DeviceCdcEventSetControlLineState: {
         s_usbCdcAcmInfo.dteStatus = acmReqParam->setupValue;
         /* activate/deactivate Tx carrier */
-        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION)
-        {
+        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION) {
             acmInfo->uartState |= USB_DEVICE_CDC_UART_STATE_TX_CARRIER;
         }
-        else
-        {
+        else {
             acmInfo->uartState &= (uint16_t)~USB_DEVICE_CDC_UART_STATE_TX_CARRIER;
         }
 
         /* activate carrier and DTE. Com port of terminal tool running on PC is open now */
-        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE)
-        {
+        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE) {
             acmInfo->uartState |= USB_DEVICE_CDC_UART_STATE_RX_CARRIER;
         }
         /* Com port of terminal tool running on PC is closed now */
-        else
-        {
+        else {
             acmInfo->uartState &= (uint16_t)~USB_DEVICE_CDC_UART_STATE_RX_CARRIER;
         }
 
@@ -349,53 +335,45 @@ usb_status_t USB_DeviceCdcVcomCallback(class_handle_t handle, uint32_t event, vo
         /* Notify to host the line state */
         acmInfo->serialStateBuf[4] = acmReqParam->interfaceIndex;
         /* Lower byte of UART BITMAP */
-        uartBitmap = (uint8_t *)&acmInfo->serialStateBuf[NOTIF_PACKET_SIZE + UART_BITMAP_SIZE - 2];
+        uartBitmap    = (uint8_t *)&acmInfo->serialStateBuf[NOTIF_PACKET_SIZE + UART_BITMAP_SIZE - 2];
         uartBitmap[0] = acmInfo->uartState & 0xFFu;
         uartBitmap[1] = (acmInfo->uartState >> 8) & 0xFFu;
-        len = (uint32_t)(NOTIF_PACKET_SIZE + UART_BITMAP_SIZE);
-        if (0 == ((usb_device_cdc_acm_struct_t *)handle)->hasSentState)
-        {
+        len           = (uint32_t)(NOTIF_PACKET_SIZE + UART_BITMAP_SIZE);
+        if (0 == ((usb_device_cdc_acm_struct_t *)handle)->hasSentState) {
             error = USB_DeviceCdcAcmSend(handle, USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT, acmInfo->serialStateBuf, len);
-            if (kStatus_USB_Success != error)
-            {
+            if (kStatus_USB_Success != error) {
                 usb_echo("kUSB_DeviceCdcEventSetControlLineState error!");
             }
             ((usb_device_cdc_acm_struct_t *)handle)->hasSentState = 1;
         }
 
         /* Update status */
-        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION)
-        {
+        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION) {
             /*  To do: CARRIER_ACTIVATED */
         }
-        else
-        {
+        else {
             /* To do: CARRIER_DEACTIVATED */
         }
-        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE)
-        {
+        if (acmInfo->dteStatus & USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE) {
             /* DTE_ACTIVATED */
-            if (1 == s_cdcVcom.attach)
-            {
+            if (1 == s_cdcVcom.attach) {
                 s_cdcVcom.startTransactions = 1;
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
                 s_waitForDataReceive = 1;
                 USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK;
                 s_comOpen = 1;
 #endif
             }
         }
-        else
-        {
+        else {
             /* DTE_DEACTIVATED */
-            if (1 == s_cdcVcom.attach)
-            {
+            if (1 == s_cdcVcom.attach) {
                 s_cdcVcom.startTransactions = 0;
             }
         }
-    }
-    break;
+    } break;
     case kUSB_DeviceCdcEventSendBreak:
         break;
     default:
@@ -419,48 +397,44 @@ usb_status_t USB_DeviceCdcVcomCallback(class_handle_t handle, uint32_t event, vo
 usb_status_t USB_DeviceCallback(usb_device_handle handle, uint32_t event, void *param)
 {
     usb_status_t error = kStatus_USB_Error;
-    uint16_t *temp16 = (uint16_t *)param;
-    uint8_t *temp8 = (uint8_t *)param;
+    uint16_t *temp16   = (uint16_t *)param;
+    uint8_t *temp8     = (uint8_t *)param;
 
-    switch (event)
-    {
+    switch (event) {
     case kUSB_DeviceEventBusReset: {
-        s_cdcVcom.attach = 0;
+        s_cdcVcom.attach               = 0;
         s_cdcVcom.currentConfiguration = 0U;
-#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) || (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))
+#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) ||                                              \
+    (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))
         /* Get USB speed to configure the device, including max packet size and interval of the endpoints. */
-        if (kStatus_USB_Success == USB_DeviceClassGetSpeed(CONTROLLER_ID, &s_cdcVcom.speed))
-        {
+        if (kStatus_USB_Success == USB_DeviceClassGetSpeed(CONTROLLER_ID, &s_cdcVcom.speed)) {
             USB_DeviceSetSpeed(handle, s_cdcVcom.speed);
         }
 #endif
-    }
-    break;
+    } break;
     case kUSB_DeviceEventSetConfiguration:
-        if (0U == (*temp8))
-        {
-            s_cdcVcom.attach = 0;
+        if (0U == (*temp8)) {
+            s_cdcVcom.attach               = 0;
             s_cdcVcom.currentConfiguration = 0U;
         }
-        else if (USB_CDC_VCOM_CONFIGURE_INDEX == (*temp8))
-        {
-            s_cdcVcom.attach = 1;
+        else if (USB_CDC_VCOM_CONFIGURE_INDEX == (*temp8)) {
+            s_cdcVcom.attach               = 1;
             s_cdcVcom.currentConfiguration = *temp8;
             /* Schedule buffer for receive */
-            USB_DeviceCdcAcmRecv(s_cdcVcom.cdcAcmHandle, USB_CDC_VCOM_BULK_OUT_ENDPOINT, s_currRecvBuf, g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
+            USB_DeviceCdcAcmRecv(s_cdcVcom.cdcAcmHandle,
+                                 USB_CDC_VCOM_BULK_OUT_ENDPOINT,
+                                 s_currRecvBuf,
+                                 g_UsbDeviceCdcVcomDicEndpoints[0].maxPacketSize);
         }
-        else
-        {
+        else {
             error = kStatus_USB_InvalidRequest;
         }
         break;
     case kUSB_DeviceEventSetInterface:
-        if (s_cdcVcom.attach)
-        {
-            uint8_t interface = (uint8_t)((*temp16 & 0xFF00U) >> 0x08U);
+        if (s_cdcVcom.attach) {
+            uint8_t interface        = (uint8_t)((*temp16 & 0xFF00U) >> 0x08U);
             uint8_t alternateSetting = (uint8_t)(*temp16 & 0x00FFU);
-            if (interface < USB_CDC_VCOM_INTERFACE_COUNT)
-            {
+            if (interface < USB_CDC_VCOM_INTERFACE_COUNT) {
                 s_cdcVcom.currentInterfaceAlternateSetting[interface] = alternateSetting;
             }
         }
@@ -470,20 +444,18 @@ usb_status_t USB_DeviceCallback(usb_device_handle handle, uint32_t event, void *
     case kUSB_DeviceEventGetInterface:
         break;
     case kUSB_DeviceEventGetDeviceDescriptor:
-        if (param)
-        {
+        if (param) {
             error = USB_DeviceGetDeviceDescriptor(handle, (usb_device_get_device_descriptor_struct_t *)param);
         }
         break;
     case kUSB_DeviceEventGetConfigurationDescriptor:
-        if (param)
-        {
-            error = USB_DeviceGetConfigurationDescriptor(handle, (usb_device_get_configuration_descriptor_struct_t *)param);
+        if (param) {
+            error =
+                USB_DeviceGetConfigurationDescriptor(handle, (usb_device_get_configuration_descriptor_struct_t *)param);
         }
         break;
     case kUSB_DeviceEventGetStringDescriptor:
-        if (param)
-        {
+        if (param) {
             /* Get device string descriptor request */
             error = USB_DeviceGetStringDescriptor(handle, (usb_device_get_string_descriptor_struct_t *)param);
         }
@@ -510,18 +482,16 @@ int VCOMAPPInit(void)
     SYSMPU_Enable(SYSMPU, 0);
 #endif /* FSL_FEATURE_SOC_SYSMPU_COUNT */
 
-    s_cdcVcom.speed = USB_SPEED_FULL;
-    s_cdcVcom.attach = 0;
+    s_cdcVcom.speed        = USB_SPEED_FULL;
+    s_cdcVcom.attach       = 0;
     s_cdcVcom.cdcAcmHandle = (class_handle_t)NULL;
     s_cdcVcom.deviceHandle = NULL;
 
-    if (kStatus_USB_Success != USB_DeviceClassInit(CONTROLLER_ID, &s_cdcAcmConfigList, &s_cdcVcom.deviceHandle))
-    {
+    if (kStatus_USB_Success != USB_DeviceClassInit(CONTROLLER_ID, &s_cdcAcmConfigList, &s_cdcVcom.deviceHandle)) {
         LOG_ERROR("failed to initialize virtualcom");
         ret = -1;
     }
-    else
-    {
+    else {
         LOG_INFO("virtualcom usb-cdc initialized");
         s_cdcVcom.cdcAcmHandle = s_cdcAcmConfigList.config->classHandle;
     }
@@ -543,45 +513,38 @@ int VCOMAPPInit(void)
 void VCOMAPPTask(void)
 {
     usb_status_t error = kStatus_USB_Error;
-    if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions))
-    {
+    if ((1 == s_cdcVcom.attach) && (1 == s_cdcVcom.startTransactions)) {
         /* User Code */
-        if ((0 != s_recvSize) && (0xFFFFFFFFU != s_recvSize))
-        {
+        if ((0 != s_recvSize) && (0xFFFFFFFFU != s_recvSize)) {
             int32_t i;
 
             /* Copy Buffer to Send Buff */
-            for (i = 0; i < s_recvSize; i++)
-            {
+            for (i = 0; i < s_recvSize; i++) {
                 s_currSendBuf[s_sendSize++] = s_currRecvBuf[i];
             }
             s_recvSize = 0;
         }
 
-        if (s_sendSize)
-        {
+        if (s_sendSize) {
             uint32_t size = s_sendSize;
-            s_sendSize = 0;
+            s_sendSize    = 0;
 
             error = USB_DeviceCdcAcmSend(s_cdcVcom.cdcAcmHandle, USB_CDC_VCOM_BULK_IN_ENDPOINT, s_currSendBuf, size);
 
-            if (error != kStatus_USB_Success)
-            {
+            if (error != kStatus_USB_Success) {
                 /* Failure to send Data Handling code here */
             }
         }
-#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) &&        \
-    (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
-        if ((s_waitForDataReceive))
-        {
-            if (s_comOpen == 1)
-            {
+#if defined(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) &&              \
+    defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) &&                          \
+    defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U)
+        if ((s_waitForDataReceive)) {
+            if (s_comOpen == 1) {
                 /* Wait for all the packets been sent during opening the com port. Otherwise these packets may
                  * wake up the system.
                  */
                 usb_echo("Waiting to enter lowpower ...\r\n");
-                for (uint32_t i = 0U; i < 16000000U; ++i)
-                {
+                for (uint32_t i = 0U; i < 16000000U; ++i) {
                     __ASM("NOP"); /* delay */
                 }
 
@@ -615,8 +578,7 @@ void virtual_com(void)
 
     VCOMAPPInit();
 
-    while (1)
-    {
+    while (1) {
         VCOMAPPTask();
 
 #if USB_DEVICE_CONFIG_USE_TASK
@@ -632,16 +594,13 @@ usb_status_t USB_CDCSend(uint8_t *buffer, uint32_t length)
 
 uint32_t USB_CDCGetReceived(uint8_t *buffer)
 {
-    if (buffer)
-    {
-        if ((1 == s_cdcVcom.attach) /*&& (1 == s_cdcVcom.startTransactions)*/)
-        {
+    if (buffer) {
+        if ((1 == s_cdcVcom.attach) /*&& (1 == s_cdcVcom.startTransactions)*/) {
             /* User Code */
-            if ((0 != s_recvSize) && (0xFFFFFFFFU != s_recvSize))
-            {
+            if ((0 != s_recvSize) && (0xFFFFFFFFU != s_recvSize)) {
                 memcpy(buffer, s_currRecvBuf, s_recvSize);
                 uint32_t tmp = s_recvSize;
-                s_recvSize = 0;
+                s_recvSize   = 0;
                 return tmp;
             }
         }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.c
index 2d0e45fde..198925890 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.c
@@ -25,8 +25,12 @@
 
 static usb_status_t USB_DeviceHidAllocateHandle(usb_device_hid_struct_t **handle);
 static usb_status_t USB_DeviceHidFreeHandle(usb_device_hid_struct_t *handle);
-static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam);
-static usb_status_t USB_DeviceHidInterruptOut(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam);
+static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle,
+                                             usb_device_endpoint_callback_message_struct_t *message,
+                                             void *callbackParam);
+static usb_status_t USB_DeviceHidInterruptOut(usb_device_handle handle,
+                                              usb_device_endpoint_callback_message_struct_t *message,
+                                              void *callbackParam);
 static usb_status_t USB_DeviceHidEndpointsInit(usb_device_hid_struct_t *hidHandle);
 static usb_status_t USB_DeviceHidEndpointsDeinit(usb_device_hid_struct_t *hidHandle);
 
@@ -34,7 +38,8 @@ static usb_status_t USB_DeviceHidEndpointsDeinit(usb_device_hid_struct_t *hidHan
  * Variables
  ******************************************************************************/
 
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_device_hid_struct_t s_UsbDeviceHidHandle[USB_DEVICE_CONFIG_HID];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_device_hid_struct_t
+    s_UsbDeviceHidHandle[USB_DEVICE_CONFIG_HID];
 
 /*******************************************************************************
  * Code
@@ -53,10 +58,8 @@ USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_device_hid_
 static usb_status_t USB_DeviceHidAllocateHandle(usb_device_hid_struct_t **handle)
 {
     int32_t count;
-    for (count = 0U; count < USB_DEVICE_CONFIG_HID; count++)
-    {
-        if (NULL == s_UsbDeviceHidHandle[count].handle)
-        {
+    for (count = 0U; count < USB_DEVICE_CONFIG_HID; count++) {
+        if (NULL == s_UsbDeviceHidHandle[count].handle) {
             *handle = &s_UsbDeviceHidHandle[count];
             return kStatus_USB_Success;
         }
@@ -76,10 +79,10 @@ static usb_status_t USB_DeviceHidAllocateHandle(usb_device_hid_struct_t **handle
  */
 static usb_status_t USB_DeviceHidFreeHandle(usb_device_hid_struct_t *handle)
 {
-    handle->handle = NULL;
-    handle->configStruct = (usb_device_class_config_struct_t *)NULL;
+    handle->handle        = NULL;
+    handle->configStruct  = (usb_device_class_config_struct_t *)NULL;
     handle->configuration = 0U;
-    handle->alternate = 0U;
+    handle->alternate     = 0U;
     return kStatus_USB_Success;
 }
 
@@ -96,7 +99,9 @@ static usb_status_t USB_DeviceHidFreeHandle(usb_device_hid_struct_t *handle)
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle,
+                                             usb_device_endpoint_callback_message_struct_t *message,
+                                             void *callbackParam)
 {
     usb_device_hid_struct_t *hidHandle;
     usb_status_t error = kStatus_USB_Error;
@@ -104,16 +109,15 @@ static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle, usb_devic
     /* Get the HID class handle */
     hidHandle = (usb_device_hid_struct_t *)callbackParam;
 
-    if (!hidHandle)
-    {
+    if (!hidHandle) {
         return kStatus_USB_InvalidHandle;
     }
     hidHandle->interruptInPipeBusy = 0U;
-    if ((NULL != hidHandle->configStruct) && (hidHandle->configStruct->classCallback))
-    {
+    if ((NULL != hidHandle->configStruct) && (hidHandle->configStruct->classCallback)) {
         /* Notify the application data sent by calling the hid class callback. classCallback is initialized
            in classInit of s_UsbDeviceClassInterfaceMap,it is from the second parameter of classInit */
-        error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventSendResponse, message);
+        error =
+            hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventSendResponse, message);
     }
 
     return error;
@@ -132,7 +136,9 @@ static usb_status_t USB_DeviceHidInterruptIn(usb_device_handle handle, usb_devic
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceHidInterruptOut(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+static usb_status_t USB_DeviceHidInterruptOut(usb_device_handle handle,
+                                              usb_device_endpoint_callback_message_struct_t *message,
+                                              void *callbackParam)
 {
     usb_device_hid_struct_t *hidHandle;
     usb_status_t error = kStatus_USB_Error;
@@ -140,16 +146,15 @@ static usb_status_t USB_DeviceHidInterruptOut(usb_device_handle handle, usb_devi
     /* Get the HID class handle */
     hidHandle = (usb_device_hid_struct_t *)callbackParam;
 
-    if (!hidHandle)
-    {
+    if (!hidHandle) {
         return kStatus_USB_InvalidHandle;
     }
     hidHandle->interruptOutPipeBusy = 0U;
-    if ((NULL != hidHandle->configStruct) && (hidHandle->configStruct->classCallback))
-    {
+    if ((NULL != hidHandle->configStruct) && (hidHandle->configStruct->classCallback)) {
         /* Notify the application data sent by calling the hid class callback. classCallback is initialized
            in classInit of s_UsbDeviceClassInterfaceMap,it is from the second parameter of classInit */
-        error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventRecvResponse, message);
+        error =
+            hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventRecvResponse, message);
     }
 
     return error;
@@ -169,35 +174,28 @@ static usb_status_t USB_DeviceHidEndpointsInit(usb_device_hid_struct_t *hidHandl
 {
     usb_device_interface_list_t *interfaceList;
     usb_device_interface_struct_t *interface = (usb_device_interface_struct_t *)NULL;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                       = kStatus_USB_Error;
 
     /* Check the configuration is valid or not. */
-    if (!hidHandle->configuration)
-    {
+    if (!hidHandle->configuration) {
         return error;
     }
 
-    if (hidHandle->configuration > hidHandle->configStruct->classInfomation->configurations)
-    {
+    if (hidHandle->configuration > hidHandle->configStruct->classInfomation->configurations) {
         return error;
     }
 
     /* Get the interface list of the new configuration. */
-    if (NULL == hidHandle->configStruct->classInfomation->interfaceList)
-    {
+    if (NULL == hidHandle->configStruct->classInfomation->interfaceList) {
         return error;
     }
     interfaceList = &hidHandle->configStruct->classInfomation->interfaceList[hidHandle->configuration - 1U];
 
     /* Find interface by using the alternate setting of the interface. */
-    for (int count = 0U; count < interfaceList->count; count++)
-    {
-        if (USB_DEVICE_CONFIG_HID_CLASS_CODE == interfaceList->interfaces[count].classCode)
-        {
-            for (int index = 0U; index < interfaceList->interfaces[count].count; index++)
-            {
-                if (interfaceList->interfaces[count].interface[index].alternateSetting == hidHandle->alternate)
-                {
+    for (int count = 0U; count < interfaceList->count; count++) {
+        if (USB_DEVICE_CONFIG_HID_CLASS_CODE == interfaceList->interfaces[count].classCode) {
+            for (int index = 0U; index < interfaceList->interfaces[count].count; index++) {
+                if (interfaceList->interfaces[count].interface[index].alternateSetting == hidHandle->alternate) {
                     interface = &interfaceList->interfaces[count].interface[index];
                     break;
                 }
@@ -206,8 +204,7 @@ static usb_status_t USB_DeviceHidEndpointsInit(usb_device_hid_struct_t *hidHandl
             break;
         }
     }
-    if (!interface)
-    {
+    if (!interface) {
         /* Return error if the interface is not found. */
         return error;
     }
@@ -216,29 +213,27 @@ static usb_status_t USB_DeviceHidEndpointsInit(usb_device_hid_struct_t *hidHandl
     hidHandle->interfaceHandle = interface;
 
     /* Initialize the endpoints of the new interface. */
-    for (int count = 0U; count < interface->endpointList.count; count++)
-    {
+    for (int count = 0U; count < interface->endpointList.count; count++) {
         usb_device_endpoint_init_struct_t epInitStruct;
         usb_device_endpoint_callback_struct_t epCallback;
-        epInitStruct.zlt = 0U;
-        epInitStruct.interval = interface->endpointList.endpoint[count].interval;
+        epInitStruct.zlt             = 0U;
+        epInitStruct.interval        = interface->endpointList.endpoint[count].interval;
         epInitStruct.endpointAddress = interface->endpointList.endpoint[count].endpointAddress;
-        epInitStruct.maxPacketSize = interface->endpointList.endpoint[count].maxPacketSize;
-        epInitStruct.transferType = interface->endpointList.endpoint[count].transferType;
+        epInitStruct.maxPacketSize   = interface->endpointList.endpoint[count].maxPacketSize;
+        epInitStruct.transferType    = interface->endpointList.endpoint[count].transferType;
 
-        if (USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-        {
-            epCallback.callbackFn = USB_DeviceHidInterruptIn;
+        if (USB_IN == ((epInitStruct.endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                       USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
+            epCallback.callbackFn                = USB_DeviceHidInterruptIn;
             hidHandle->interruptInPipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-            hidHandle->interruptInPipeStall = 0U;
-            hidHandle->interruptInPipeDataLen = 0U;
+            hidHandle->interruptInPipeStall      = 0U;
+            hidHandle->interruptInPipeDataLen    = 0U;
         }
-        else
-        {
-            epCallback.callbackFn = USB_DeviceHidInterruptOut;
+        else {
+            epCallback.callbackFn                 = USB_DeviceHidInterruptOut;
             hidHandle->interruptOutPipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-            hidHandle->interruptOutPipeStall = 0U;
-            hidHandle->interruptOutPipeDataLen = 0U;
+            hidHandle->interruptOutPipeStall      = 0U;
+            hidHandle->interruptOutPipeDataLen    = 0U;
         }
         epCallback.callbackParam = hidHandle;
 
@@ -261,14 +256,13 @@ static usb_status_t USB_DeviceHidEndpointsDeinit(usb_device_hid_struct_t *hidHan
 {
     usb_status_t error = kStatus_USB_Error;
 
-    if (!hidHandle->interfaceHandle)
-    {
+    if (!hidHandle->interfaceHandle) {
         return error;
     }
     /* De-initialize all endpoints of the interface */
-    for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++)
-    {
-        error = USB_DeviceDeinitEndpoint(hidHandle->handle, hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress);
+    for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++) {
+        error = USB_DeviceDeinitEndpoint(hidHandle->handle,
+                                         hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress);
     }
     hidHandle->interfaceHandle = NULL;
     return error;
@@ -297,38 +291,33 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
     uint8_t *temp8;
     uint8_t alternate;
 
-    if ((!param) || (!handle))
-    {
+    if ((!param) || (!handle)) {
         return kStatus_USB_InvalidHandle;
     }
 
     /* Get the hid class handle. */
     hidHandle = (usb_device_hid_struct_t *)handle;
 
-    switch (event)
-    {
+    switch (event) {
     case kUSB_DeviceClassEventDeviceReset:
         /* Bus reset, clear the configuration. */
-        hidHandle->configuration = 0U;
-        hidHandle->interruptInPipeBusy = 0U;
+        hidHandle->configuration        = 0U;
+        hidHandle->interruptInPipeBusy  = 0U;
         hidHandle->interruptOutPipeBusy = 0U;
-        hidHandle->interfaceHandle = NULL;
+        hidHandle->interfaceHandle      = NULL;
         break;
     case kUSB_DeviceClassEventSetConfiguration:
         /* Get the new configuration. */
         temp8 = ((uint8_t *)param);
-        if (!hidHandle->configStruct)
-        {
+        if (!hidHandle->configStruct) {
             break;
         }
-        if (*temp8 == hidHandle->configuration)
-        {
+        if (*temp8 == hidHandle->configuration) {
             break;
         }
 
         /* De-initialize the endpoints when current configuration is none zero. */
-        if (hidHandle->configuration)
-        {
+        if (hidHandle->configuration) {
             error = USB_DeviceHidEndpointsDeinit(hidHandle);
         }
         /* Save new configuration. */
@@ -340,8 +329,7 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
         error = USB_DeviceHidEndpointsInit(hidHandle);
         break;
     case kUSB_DeviceClassEventSetInterface:
-        if (!hidHandle->configStruct)
-        {
+        if (!hidHandle->configStruct) {
             break;
         }
         /* Get the new alternate setting of the interface */
@@ -350,40 +338,34 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
         alternate = (uint8_t)(interfaceAlternate & 0xFFU);
 
         /* Whether the interface belongs to the class. */
-        if (hidHandle->interfaceNumber != ((uint8_t)(interfaceAlternate >> 8U)))
-        {
+        if (hidHandle->interfaceNumber != ((uint8_t)(interfaceAlternate >> 8U))) {
             break;
         }
         /* Only handle new alternate setting. */
-        if (alternate == hidHandle->alternate)
-        {
+        if (alternate == hidHandle->alternate) {
             break;
         }
         /* De-initialize old endpoints */
-        error = USB_DeviceHidEndpointsDeinit(hidHandle);
+        error                = USB_DeviceHidEndpointsDeinit(hidHandle);
         hidHandle->alternate = alternate;
         /* Initialize new endpoints */
         error = USB_DeviceHidEndpointsInit(hidHandle);
         break;
     case kUSB_DeviceClassEventSetEndpointHalt:
-        if ((!hidHandle->configStruct) || (!hidHandle->interfaceHandle))
-        {
+        if ((!hidHandle->configStruct) || (!hidHandle->interfaceHandle)) {
             break;
         }
         /* Get the endpoint address */
         temp8 = ((uint8_t *)param);
-        for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++)
-        {
-            if (*temp8 == hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
+        for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++) {
+            if (*temp8 == hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress) {
                 /* Only stall the endpoint belongs to the class */
-                if (USB_IN == ((hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
-                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-                {
+                if (USB_IN == ((hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress &
+                                USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
                     hidHandle->interruptInPipeStall = 1U;
                 }
-                else
-                {
+                else {
                     hidHandle->interruptOutPipeStall = 1U;
                 }
                 error = USB_DeviceStallEndpoint(hidHandle->handle, *temp8);
@@ -391,58 +373,52 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
         }
         break;
     case kUSB_DeviceClassEventClearEndpointHalt:
-        if ((!hidHandle->configStruct) || (!hidHandle->interfaceHandle))
-        {
+        if ((!hidHandle->configStruct) || (!hidHandle->interfaceHandle)) {
             break;
         }
         /* Get the endpoint address */
         temp8 = ((uint8_t *)param);
-        for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++)
-        {
-            if (*temp8 == hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress)
-            {
+        for (int count = 0U; count < hidHandle->interfaceHandle->endpointList.count; count++) {
+            if (*temp8 == hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress) {
                 /* Only un-stall the endpoint belongs to the class */
                 error = USB_DeviceUnstallEndpoint(hidHandle->handle, *temp8);
-                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))
-                {
-                    if (hidHandle->interruptInPipeStall)
-                    {
+                if (USB_IN == (((*temp8) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                               USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)) {
+                    if (hidHandle->interruptInPipeStall) {
                         hidHandle->interruptInPipeStall = 0U;
-                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != hidHandle->interruptInPipeDataBuffer)
-                        {
+                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != hidHandle->interruptInPipeDataBuffer) {
                             error = USB_DeviceSendRequest(
                                 hidHandle->handle,
-                                (hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK),
-                                hidHandle->interruptInPipeDataBuffer, hidHandle->interruptInPipeDataLen);
-                            if (kStatus_USB_Success != error)
-                            {
+                                (hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress &
+                                 USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK),
+                                hidHandle->interruptInPipeDataBuffer,
+                                hidHandle->interruptInPipeDataLen);
+                            if (kStatus_USB_Success != error) {
                                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                                endpointCallbackMessage.buffer = hidHandle->interruptInPipeDataBuffer;
-                                endpointCallbackMessage.length = hidHandle->interruptInPipeDataLen;
+                                endpointCallbackMessage.buffer  = hidHandle->interruptInPipeDataBuffer;
+                                endpointCallbackMessage.length  = hidHandle->interruptInPipeDataLen;
                                 endpointCallbackMessage.isSetup = 0U;
                                 USB_DeviceHidInterruptIn(hidHandle->handle, (void *)&endpointCallbackMessage, handle);
                             }
                             hidHandle->interruptInPipeDataBuffer = (uint8_t *)USB_UNINITIALIZED_VAL_32;
-                            hidHandle->interruptInPipeDataLen = 0U;
+                            hidHandle->interruptInPipeDataLen    = 0U;
                         }
                     }
                 }
-                else
-                {
-                    if (hidHandle->interruptOutPipeStall)
-                    {
+                else {
+                    if (hidHandle->interruptOutPipeStall) {
                         hidHandle->interruptOutPipeStall = 0U;
-                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != hidHandle->interruptOutPipeDataBuffer)
-                        {
+                        if ((uint8_t *)USB_UNINITIALIZED_VAL_32 != hidHandle->interruptOutPipeDataBuffer) {
                             error = USB_DeviceRecvRequest(
                                 hidHandle->handle,
-                                (hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK),
-                                hidHandle->interruptOutPipeDataBuffer, hidHandle->interruptOutPipeDataLen);
-                            if (kStatus_USB_Success != error)
-                            {
+                                (hidHandle->interfaceHandle->endpointList.endpoint[count].endpointAddress &
+                                 USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK),
+                                hidHandle->interruptOutPipeDataBuffer,
+                                hidHandle->interruptOutPipeDataLen);
+                            if (kStatus_USB_Success != error) {
                                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                                endpointCallbackMessage.buffer = hidHandle->interruptOutPipeDataBuffer;
-                                endpointCallbackMessage.length = hidHandle->interruptOutPipeDataLen;
+                                endpointCallbackMessage.buffer  = hidHandle->interruptOutPipeDataBuffer;
+                                endpointCallbackMessage.length  = hidHandle->interruptOutPipeDataLen;
                                 endpointCallbackMessage.isSetup = 0U;
                                 USB_DeviceHidInterruptOut(hidHandle->handle, (void *)&endpointCallbackMessage, handle);
                             }
@@ -456,66 +432,66 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
         }
         break;
     case kUSB_DeviceClassEventClassRequest:
-        if (param)
-        {
+        if (param) {
             /* Handle the hid class specific request. */
             usb_device_control_request_struct_t *controlRequest = (usb_device_control_request_struct_t *)param;
 
-            if ((controlRequest->setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) != USB_REQUEST_TYPE_RECIPIENT_INTERFACE)
-            {
+            if ((controlRequest->setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) !=
+                USB_REQUEST_TYPE_RECIPIENT_INTERFACE) {
                 break;
             }
 
-            if ((controlRequest->setup->wIndex & 0xFFU) != hidHandle->interfaceNumber)
-            {
+            if ((controlRequest->setup->wIndex & 0xFFU) != hidHandle->interfaceNumber) {
                 break;
             }
 
-            switch (controlRequest->setup->bRequest)
-            {
+            switch (controlRequest->setup->bRequest) {
             case USB_DEVICE_HID_REQUEST_GET_REPORT:
                 /* Get report request */
                 report.reportType = (controlRequest->setup->wValue & 0xFF00U) >> 0x08U;
-                report.reportId = (controlRequest->setup->wValue & 0x00FFU);
+                report.reportId   = (controlRequest->setup->wValue & 0x00FFU);
                 /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                    it is from the second parameter of classInit */
-                error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventGetReport, &report);
+                error = hidHandle->configStruct->classCallback(
+                    (class_handle_t)hidHandle, kUSB_DeviceHidEventGetReport, &report);
                 controlRequest->buffer = report.reportBuffer;
                 controlRequest->length = report.reportLength;
                 break;
             case USB_DEVICE_HID_REQUEST_GET_IDLE:
                 /* Get idle request, classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                    it is from the second parameter of classInit */
-                error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventGetIdle, &hidHandle->idleRate);
+                error = hidHandle->configStruct->classCallback(
+                    (class_handle_t)hidHandle, kUSB_DeviceHidEventGetIdle, &hidHandle->idleRate);
                 controlRequest->buffer = &hidHandle->idleRate;
                 break;
             case USB_DEVICE_HID_REQUEST_GET_PROTOCOL:
                 /* Get protocol request, classCallback is initialized in classInit of
                    s_UsbDeviceClassInterfaceMap,
                    it is from the second parameter of classInit */
-                error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventGetIdle, &hidHandle->protocol);
+                error = hidHandle->configStruct->classCallback(
+                    (class_handle_t)hidHandle, kUSB_DeviceHidEventGetIdle, &hidHandle->protocol);
                 controlRequest->buffer = &hidHandle->protocol;
                 break;
             case USB_DEVICE_HID_REQUEST_SET_REPORT:
                 /* Set report request */
                 report.reportType = (controlRequest->setup->wValue & 0xFF00U) >> 0x08U;
-                report.reportId = (controlRequest->setup->wValue & 0x00FFU);
-                if (controlRequest->isSetup)
-                {
+                report.reportId   = (controlRequest->setup->wValue & 0x00FFU);
+                if (controlRequest->isSetup) {
                     report.reportLength = controlRequest->length;
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                        it is from the second parameter of classInit */
-                    error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventRequestReportBuffer, &report);
+                    error = hidHandle->configStruct->classCallback(
+                        (class_handle_t)hidHandle, kUSB_DeviceHidEventRequestReportBuffer, &report);
                     controlRequest->buffer = report.reportBuffer;
                     controlRequest->length = report.reportLength;
                 }
-                else
-                {
+                else {
                     report.reportBuffer = controlRequest->buffer;
                     report.reportLength = controlRequest->length;
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                        it is from the second parameter of classInit */
-                    error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventSetReport, &report);
+                    error = hidHandle->configStruct->classCallback(
+                        (class_handle_t)hidHandle, kUSB_DeviceHidEventSetReport, &report);
                 }
                 break;
             case USB_DEVICE_HID_REQUEST_SET_IDLE:
@@ -524,7 +500,8 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
                     hidHandle->idleRate = (controlRequest->setup->wValue & 0xFF00U) >> 0x08U;
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                        it is from the second parameter of classInit */
-                    error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventSetIdle, &hidHandle->idleRate);
+                    error = hidHandle->configStruct->classCallback(
+                        (class_handle_t)hidHandle, kUSB_DeviceHidEventSetIdle, &hidHandle->idleRate);
                 }
                 break;
             case USB_DEVICE_HID_REQUEST_SET_PROTOCOL:
@@ -533,7 +510,8 @@ usb_status_t USB_DeviceHidEvent(void *handle, uint32_t event, void *param)
                     hidHandle->protocol = (controlRequest->setup->wValue & 0x00FFU);
                     /* classCallback is initialized in classInit of s_UsbDeviceClassInterfaceMap,
                        it is from the second parameter of classInit */
-                    error = hidHandle->configStruct->classCallback((class_handle_t)hidHandle, kUSB_DeviceHidEventSetProtocol, &hidHandle->protocol);
+                    error = hidHandle->configStruct->classCallback(
+                        (class_handle_t)hidHandle, kUSB_DeviceHidEventSetProtocol, &hidHandle->protocol);
                 }
                 break;
             default:
@@ -567,28 +545,25 @@ usb_status_t USB_DeviceHidInit(uint8_t controllerId, usb_device_class_config_str
     /* Allocate a hid class handle. */
     error = USB_DeviceHidAllocateHandle(&hidHandle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
     /* Get the device handle according to the controller id. */
     error = USB_DeviceClassGetDeviceHandle(controllerId, &hidHandle->handle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
-    if (!hidHandle->handle)
-    {
+    if (!hidHandle->handle) {
         return kStatus_USB_InvalidHandle;
     }
     /* Save the configuration of the class. */
     hidHandle->configStruct = config;
     /* Clear the configuration value. */
     hidHandle->configuration = 0U;
-    hidHandle->alternate = 0xffU;
+    hidHandle->alternate     = 0xffU;
 
     *handle = (class_handle_t)hidHandle;
     return error;
@@ -610,8 +585,7 @@ usb_status_t USB_DeviceHidDeinit(class_handle_t handle)
 
     hidHandle = (usb_device_hid_struct_t *)handle;
 
-    if (!hidHandle)
-    {
+    if (!hidHandle) {
         return kStatus_USB_InvalidHandle;
     }
     /* De-initialzie the endpoints. */
@@ -647,27 +621,23 @@ usb_status_t USB_DeviceHidSend(class_handle_t handle, uint8_t ep, uint8_t *buffe
     usb_device_hid_struct_t *hidHandle;
     usb_status_t error = kStatus_USB_Error;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_InvalidHandle;
     }
     hidHandle = (usb_device_hid_struct_t *)handle;
 
-    if (hidHandle->interruptInPipeBusy)
-    {
+    if (hidHandle->interruptInPipeBusy) {
         return kStatus_USB_Busy;
     }
     hidHandle->interruptInPipeBusy = 1U;
 
-    if (hidHandle->interruptInPipeStall)
-    {
+    if (hidHandle->interruptInPipeStall) {
         hidHandle->interruptInPipeDataBuffer = buffer;
-        hidHandle->interruptInPipeDataLen = length;
+        hidHandle->interruptInPipeDataLen    = length;
         return kStatus_USB_Success;
     }
     error = USB_DeviceSendRequest(hidHandle->handle, ep, buffer, length);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         hidHandle->interruptInPipeBusy = 0U;
     }
     return error;
@@ -699,27 +669,23 @@ usb_status_t USB_DeviceHidRecv(class_handle_t handle, uint8_t ep, uint8_t *buffe
     usb_device_hid_struct_t *hidHandle;
     usb_status_t error = kStatus_USB_Error;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_InvalidHandle;
     }
     hidHandle = (usb_device_hid_struct_t *)handle;
 
-    if (hidHandle->interruptOutPipeBusy)
-    {
+    if (hidHandle->interruptOutPipeBusy) {
         return kStatus_USB_Busy;
     }
     hidHandle->interruptOutPipeBusy = 1U;
 
-    if (hidHandle->interruptOutPipeStall)
-    {
+    if (hidHandle->interruptOutPipeStall) {
         hidHandle->interruptOutPipeDataBuffer = buffer;
-        hidHandle->interruptOutPipeDataLen = length;
+        hidHandle->interruptOutPipeDataLen    = length;
         return kStatus_USB_Success;
     }
     error = USB_DeviceRecvRequest(hidHandle->handle, ep, buffer, length);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         hidHandle->interruptOutPipeBusy = 0U;
     }
     return error;
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.h
index f071271cc..e7389ef28 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/hid/usb_device_hid.h
@@ -22,9 +22,9 @@
 #define USB_DEVICE_CONFIG_HID_CLASS_CODE (0x03U)
 
 /*! @brief Request code to get report of HID class. */
-#define USB_DEVICE_HID_REQUEST_GET_REPORT (0x01U)
-#define USB_DEVICE_HID_REQUEST_GET_REPORT_TYPE_INPUT (0x01U)
-#define USB_DEVICE_HID_REQUEST_GET_REPORT_TYPE_OUPUT (0x02U)
+#define USB_DEVICE_HID_REQUEST_GET_REPORT              (0x01U)
+#define USB_DEVICE_HID_REQUEST_GET_REPORT_TYPE_INPUT   (0x01U)
+#define USB_DEVICE_HID_REQUEST_GET_REPORT_TYPE_OUPUT   (0x02U)
 #define USB_DEVICE_HID_REQUEST_GET_REPORT_TYPE_FEATURE (0x03U)
 /*! @brief Request code to get idle of HID class. */
 #define USB_DEVICE_HID_REQUEST_GET_IDLE (0x02U)
@@ -162,7 +162,9 @@ extern "C"
      *
      * @return A USB error code or kStatus_USB_Success.
      */
-    extern usb_status_t USB_DeviceHidInit(uint8_t controllerId, usb_device_class_config_struct_t *config, class_handle_t *handle);
+    extern usb_status_t USB_DeviceHidInit(uint8_t controllerId,
+                                          usb_device_class_config_struct_t *config,
+                                          class_handle_t *handle);
 
     /*!
      * @brief Deinitializes the device HID class.
@@ -178,7 +180,8 @@ extern "C"
     /*!
      * @brief Handles the event passed to the HID class.
      *
-     * This function handles the event passed to the HID class. This function only can be called by #USB_DeviceClassEvent.
+     * This function handles the event passed to the HID class. This function only can be called by
+     * #USB_DeviceClassEvent.
      *
      * @param[in] handle          The HID class handle received from the usb_device_class_config_struct_t::classHandle.
      * @param[in] event           The event codes. See the enumeration usb_device_class_event_t.
@@ -211,9 +214,8 @@ extern "C"
      *
      * @note The function can only be called in the same context.
      *
-     * @note The return value indicates whether the sending request is successful or not. The transfer done is notified by
-     * usb_device_hid_interrupt_in.
-     * Currently, only one transfer request can be supported for one specific endpoint.
+     * @note The return value indicates whether the sending request is successful or not. The transfer done is notified
+     * by usb_device_hid_interrupt_in. Currently, only one transfer request can be supported for one specific endpoint.
      * If there is a specific requirement to support multiple transfer requests for a specific endpoint, the application
      * should implement a queue in the application level.
      * The subsequent transfer can begin only when the previous transfer is done (a notification is received through the
@@ -237,14 +239,11 @@ extern "C"
      *
      * @note The function can only be called in the same context.
      *
-     * @note The return value indicates whether the receiving request is successful or not. The transfer done is notified by
-     * usb_device_hid_interrupt_out.
-     * Currently, only one transfer request can be supported for a specific endpoint.
-     * If there is a specific requirement to support multiple transfer requests for a specific endpoint, the application
-     * should implement a queue in the application level.
-     * The subsequent transfer can begin only when the previous transfer is done (a notification is received through the
-     * endpoint
-     * callback).
+     * @note The return value indicates whether the receiving request is successful or not. The transfer done is
+     * notified by usb_device_hid_interrupt_out. Currently, only one transfer request can be supported for a specific
+     * endpoint. If there is a specific requirement to support multiple transfer requests for a specific endpoint, the
+     * application should implement a queue in the application level. The subsequent transfer can begin only when the
+     * previous transfer is done (a notification is received through the endpoint callback).
      */
     extern usb_status_t USB_DeviceHidRecv(class_handle_t handle, uint8_t ep, uint8_t *buffer, uint32_t length);
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.c
index 46d5c2bda..4a1908565 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.c
@@ -60,8 +60,10 @@
  ******************************************************************************/
 static usb_status_t USB_DeviceClassAllocateHandle(uint8_t controllerId, usb_device_common_class_struct_t **handle);
 static usb_status_t USB_DeviceClassFreeHandle(uint8_t controllerId);
-static usb_status_t USB_DeviceClassGetHandleByControllerId(uint8_t controllerId, usb_device_common_class_struct_t **handle);
-static usb_status_t USB_DeviceClassGetHandleByDeviceHandle(usb_device_handle deviceHandle, usb_device_common_class_struct_t **handle);
+static usb_status_t USB_DeviceClassGetHandleByControllerId(uint8_t controllerId,
+                                                           usb_device_common_class_struct_t **handle);
+static usb_status_t USB_DeviceClassGetHandleByDeviceHandle(usb_device_handle deviceHandle,
+                                                           usb_device_common_class_struct_t **handle);
 
 /*******************************************************************************
  * Variables
@@ -105,10 +107,14 @@ static const usb_device_class_map_t s_UsbDeviceClassInterfaceMap[] = {
     {USB_DeviceCcidInit, USB_DeviceCcidDeinit, USB_DeviceCcidEvent, kUSB_DeviceClassTypeCcid},
 #endif
 
-    {(usb_device_class_init_call_t)NULL, (usb_device_class_deinit_call_t)NULL, (usb_device_class_event_callback_t)NULL, (usb_device_class_type_t)0},
+    {(usb_device_class_init_call_t)NULL,
+     (usb_device_class_deinit_call_t)NULL,
+     (usb_device_class_event_callback_t)NULL,
+     (usb_device_class_type_t)0},
 };
 
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_device_common_class_struct_t s_UsbDeviceCommonClassStruct[USB_DEVICE_CONFIG_NUM];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_device_common_class_struct_t
+    s_UsbDeviceCommonClassStruct[USB_DEVICE_CONFIG_NUM];
 USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static uint8_t
     s_UsbDeviceSetupBuffer[USB_DEVICE_CONFIG_NUM][USB_DATA_ALIGN_SIZE_MULTIPLE(USB_SETUP_PACKET_SIZE)];
 
@@ -136,22 +142,19 @@ static usb_status_t USB_DeviceClassAllocateHandle(uint8_t controllerId, usb_devi
 
     USB_OSA_ENTER_CRITICAL();
     /* Check the controller is initialized or not. */
-    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) && (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId))
-        {
+    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) &&
+            (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId)) {
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Error;
         }
     }
     /* Get a free common class handle. */
-    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if (NULL == s_UsbDeviceCommonClassStruct[count].handle)
-        {
+    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if (NULL == s_UsbDeviceCommonClassStruct[count].handle) {
             s_UsbDeviceCommonClassStruct[count].controllerId = controllerId;
-            s_UsbDeviceCommonClassStruct[count].setupBuffer = s_UsbDeviceSetupBuffer[count];
-            *handle = &s_UsbDeviceCommonClassStruct[count];
+            s_UsbDeviceCommonClassStruct[count].setupBuffer  = s_UsbDeviceSetupBuffer[count];
+            *handle                                          = &s_UsbDeviceCommonClassStruct[count];
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
         }
@@ -177,12 +180,11 @@ static usb_status_t USB_DeviceClassFreeHandle(uint8_t controllerId)
     USB_OSA_SR_ALLOC();
 
     USB_OSA_ENTER_CRITICAL();
-    for (; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) && (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId))
-        {
-            s_UsbDeviceCommonClassStruct[count].handle = NULL;
-            s_UsbDeviceCommonClassStruct[count].configList = (usb_device_class_config_list_struct_t *)NULL;
+    for (; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) &&
+            (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId)) {
+            s_UsbDeviceCommonClassStruct[count].handle       = NULL;
+            s_UsbDeviceCommonClassStruct[count].configList   = (usb_device_class_config_list_struct_t *)NULL;
             s_UsbDeviceCommonClassStruct[count].controllerId = 0U;
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
@@ -205,16 +207,16 @@ static usb_status_t USB_DeviceClassFreeHandle(uint8_t controllerId)
  * @retval kStatus_USB_Success              Free device handle successfully.
  * @retval kStatus_USB_InvalidParameter     The common class can not be found.
  */
-static usb_status_t USB_DeviceClassGetHandleByControllerId(uint8_t controllerId, usb_device_common_class_struct_t **handle)
+static usb_status_t USB_DeviceClassGetHandleByControllerId(uint8_t controllerId,
+                                                           usb_device_common_class_struct_t **handle)
 {
     int32_t count = 0U;
     USB_OSA_SR_ALLOC();
 
     USB_OSA_ENTER_CRITICAL();
-    for (; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) && (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId))
-        {
+    for (; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) &&
+            (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId)) {
             *handle = &s_UsbDeviceCommonClassStruct[count];
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
@@ -236,16 +238,15 @@ static usb_status_t USB_DeviceClassGetHandleByControllerId(uint8_t controllerId,
  * @retval kStatus_USB_Success              Free device handle successfully.
  * @retval kStatus_USB_InvalidParameter     The common class can not be found.
  */
-static usb_status_t USB_DeviceClassGetHandleByDeviceHandle(usb_device_handle deviceHandle, usb_device_common_class_struct_t **handle)
+static usb_status_t USB_DeviceClassGetHandleByDeviceHandle(usb_device_handle deviceHandle,
+                                                           usb_device_common_class_struct_t **handle)
 {
     int32_t count = 0U;
     USB_OSA_SR_ALLOC();
 
     USB_OSA_ENTER_CRITICAL();
-    for (; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if (deviceHandle == s_UsbDeviceCommonClassStruct[count].handle)
-        {
+    for (; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if (deviceHandle == s_UsbDeviceCommonClassStruct[count].handle) {
             *handle = &s_UsbDeviceCommonClassStruct[count];
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
@@ -272,10 +273,9 @@ usb_status_t USB_DeviceClassGetDeviceHandle(uint8_t controllerId, usb_device_han
     USB_OSA_SR_ALLOC();
 
     USB_OSA_ENTER_CRITICAL();
-    for (; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) && (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId))
-        {
+    for (; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if ((NULL != s_UsbDeviceCommonClassStruct[count].handle) &&
+            (controllerId == s_UsbDeviceCommonClassStruct[count].controllerId)) {
             *handle = s_UsbDeviceCommonClassStruct[count].handle;
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
@@ -305,38 +305,33 @@ usb_status_t USB_DeviceClassEvent(usb_device_handle handle, usb_device_class_eve
     uint8_t mapIndex;
     uint8_t classIndex;
     usb_status_t errorReturn = kStatus_USB_Error;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error       = kStatus_USB_Error;
 
-    if (NULL == param)
-    {
+    if (NULL == param) {
         return kStatus_USB_InvalidParameter;
     }
 
     /* Get the common class handle according to the device handle. */
     errorReturn = USB_DeviceClassGetHandleByDeviceHandle(handle, &classHandle);
-    if (kStatus_USB_Success != errorReturn)
-    {
+    if (kStatus_USB_Success != errorReturn) {
         return kStatus_USB_InvalidParameter;
     }
 
-    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++)
-    {
-        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t)); mapIndex++)
-        {
-            if (s_UsbDeviceClassInterfaceMap[mapIndex].type == classHandle->configList->config[classIndex].classInfomation->type)
-            {
+    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++) {
+        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t));
+             mapIndex++) {
+            if (s_UsbDeviceClassInterfaceMap[mapIndex].type ==
+                classHandle->configList->config[classIndex].classInfomation->type) {
                 /* Call class event callback of supported class */
-                errorReturn =
-                    s_UsbDeviceClassInterfaceMap[mapIndex].classEventCallback((void *)classHandle->configList->config[classIndex].classHandle, event, param);
+                errorReturn = s_UsbDeviceClassInterfaceMap[mapIndex].classEventCallback(
+                    (void *)classHandle->configList->config[classIndex].classHandle, event, param);
                 /* Return the error code kStatus_USB_InvalidRequest immediately, when a class returns
                  * kStatus_USB_InvalidRequest. */
-                if (kStatus_USB_InvalidRequest == errorReturn)
-                {
+                if (kStatus_USB_InvalidRequest == errorReturn) {
                     return kStatus_USB_InvalidRequest;
                 }
                 /* For composite device, it should return kStatus_USB_Success once a valid request has been handled */
-                if (kStatus_USB_Success == errorReturn)
-                {
+                if (kStatus_USB_Success == errorReturn) {
                     error = kStatus_USB_Success;
                 }
                 break;
@@ -365,13 +360,11 @@ usb_status_t USB_DeviceClassCallback(usb_device_handle handle, uint32_t event, v
 
     /* Get the common class handle according to the device handle. */
     error = USB_DeviceClassGetHandleByDeviceHandle(handle, &classHandle);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
-    if (kUSB_DeviceEventBusReset == event)
-    {
+    if (kUSB_DeviceEventBusReset == event) {
         /* Initialize the control pipes */
         USB_DeviceControlPipeInit(handle, classHandle);
 
@@ -402,9 +395,10 @@ usb_status_t USB_DeviceClassCallback(usb_device_handle handle, uint32_t event, v
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceClassInit(uint8_t controllerId,                              /*!< [IN] Controller ID */
-                                 usb_device_class_config_list_struct_t *configList, /*!< [IN] Pointer to class configuration list */
-                                 usb_device_handle *handle                          /*!< [OUT] Pointer to the device handle */
+usb_status_t USB_DeviceClassInit(
+    uint8_t controllerId,                              /*!< [IN] Controller ID */
+    usb_device_class_config_list_struct_t *configList, /*!< [IN] Pointer to class configuration list */
+    usb_device_handle *handle                          /*!< [OUT] Pointer to the device handle */
 )
 {
     usb_device_common_class_struct_t *classHandle;
@@ -412,15 +406,13 @@ usb_status_t USB_DeviceClassInit(uint8_t controllerId,
     uint8_t mapIndex;
     uint8_t classIndex;
 
-    if ((NULL == handle) || (NULL == configList) || ((usb_device_callback_t)NULL == configList->deviceCallback))
-    {
+    if ((NULL == handle) || (NULL == configList) || ((usb_device_callback_t)NULL == configList->deviceCallback)) {
         return kStatus_USB_InvalidParameter;
     }
 
     /* Allocate a common class driver handle. */
     error = USB_DeviceClassAllocateHandle(controllerId, &classHandle);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
     /* Save the configuration list */
@@ -429,22 +421,22 @@ usb_status_t USB_DeviceClassInit(uint8_t controllerId,
     /* Initialize the device stack. */
     error = USB_DeviceInit(controllerId, USB_DeviceClassCallback, &classHandle->handle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         USB_DeviceDeinit(classHandle->handle);
         USB_DeviceClassFreeHandle(controllerId);
         return error;
     }
 
     /* Initialize the all supported classes according to the configuration list. */
-    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++)
-    {
-        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t)); mapIndex++)
-        {
-            if (classHandle->configList->config[classIndex].classInfomation->type == s_UsbDeviceClassInterfaceMap[mapIndex].type)
-            {
-                (void)s_UsbDeviceClassInterfaceMap[mapIndex].classInit(controllerId, &classHandle->configList->config[classIndex],
-                                                                       &classHandle->configList->config[classIndex].classHandle);
+    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++) {
+        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t));
+             mapIndex++) {
+            if (classHandle->configList->config[classIndex].classInfomation->type ==
+                s_UsbDeviceClassInterfaceMap[mapIndex].type) {
+                (void)s_UsbDeviceClassInterfaceMap[mapIndex].classInit(
+                    controllerId,
+                    &classHandle->configList->config[classIndex],
+                    &classHandle->configList->config[classIndex].classHandle);
             }
         }
     }
@@ -473,27 +465,25 @@ usb_status_t USB_DeviceClassDeinit(uint8_t controllerId /*!< [IN] Controller ID
     /* Get the common class handle according to the controller id. */
     error = USB_DeviceClassGetHandleByControllerId(controllerId, &classHandle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
     /* De-initialize the all supported classes according to the configuration list. */
-    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++)
-    {
-        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t)); mapIndex++)
-        {
-            if (classHandle->configList->config[classIndex].classInfomation->type == s_UsbDeviceClassInterfaceMap[mapIndex].type)
-            {
-                (void)s_UsbDeviceClassInterfaceMap[mapIndex].classDeinit(classHandle->configList->config[classIndex].classHandle);
+    for (classIndex = 0U; classIndex < classHandle->configList->count; classIndex++) {
+        for (mapIndex = 0U; mapIndex < (sizeof(s_UsbDeviceClassInterfaceMap) / sizeof(usb_device_class_map_t));
+             mapIndex++) {
+            if (classHandle->configList->config[classIndex].classInfomation->type ==
+                s_UsbDeviceClassInterfaceMap[mapIndex].type) {
+                (void)s_UsbDeviceClassInterfaceMap[mapIndex].classDeinit(
+                    classHandle->configList->config[classIndex].classHandle);
             }
         }
     }
 
     /* De-initialize the USB device stack. */
     error = USB_DeviceDeinit(classHandle->handle);
-    if (kStatus_USB_Success == error)
-    {
+    if (kStatus_USB_Success == error) {
         /* Free the common class handle. */
         (void)USB_DeviceClassFreeHandle(controllerId);
     }
@@ -520,8 +510,7 @@ usb_status_t USB_DeviceClassGetSpeed(uint8_t controllerId, /*!< [IN] Controller
     /* Get the common class handle according to the controller id. */
     error = USB_DeviceClassGetHandleByControllerId(controllerId, &classHandle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.h
index c28e2d00c..f70c5180f 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/class/usb_device_class.h
@@ -128,7 +128,9 @@ typedef struct _usb_device_class_struct
 } usb_device_class_struct_t;
 
 /*callback function pointer structure for application to provide class parameters*/
-typedef usb_status_t (*usb_device_class_callback_t)(class_handle_t classHandle, uint32_t callbackEvent, void *eventParam);
+typedef usb_status_t (*usb_device_class_callback_t)(class_handle_t classHandle,
+                                                    uint32_t callbackEvent,
+                                                    void *eventParam);
 
 /*!
  * @brief Obtains the device class information structure.
@@ -264,19 +266,26 @@ typedef struct _usb_device_get_hid_physical_descriptor_struct
 } usb_device_get_hid_physical_descriptor_struct_t;
 
 /*! @brief Obtains the control get descriptor request common union. */
-typedef union _usb_device_get_descriptor_common_union {
-    usb_device_get_descriptor_common_struct_t commonDescriptor;                    /*!< Common structure. */
-    usb_device_get_device_descriptor_struct_t deviceDescriptor;                    /*!< The structure to get device descriptor. */
-    usb_device_get_device_qualifier_descriptor_struct_t deviceQualifierDescriptor; /*!< The structure to get device qualifier descriptor. */
-    usb_device_get_configuration_descriptor_struct_t configurationDescriptor;      /*!< The structure to get configuration descriptor. */
-    usb_device_get_string_descriptor_struct_t stringDescriptor;                    /*!< The structure to get string descriptor. */
-    usb_device_get_hid_descriptor_struct_t hidDescriptor;                          /*!< The structure to get HID descriptor. */
-    usb_device_get_hid_report_descriptor_struct_t hidReportDescriptor;             /*!< The structure to get HID report descriptor. */
-    usb_device_get_hid_physical_descriptor_struct_t hidPhysicalDescriptor;         /*!< The structure to get HID physical descriptor. */
+typedef union _usb_device_get_descriptor_common_union
+{
+    usb_device_get_descriptor_common_struct_t commonDescriptor; /*!< Common structure. */
+    usb_device_get_device_descriptor_struct_t deviceDescriptor; /*!< The structure to get device descriptor. */
+    usb_device_get_device_qualifier_descriptor_struct_t
+        deviceQualifierDescriptor; /*!< The structure to get device qualifier descriptor. */
+    usb_device_get_configuration_descriptor_struct_t
+        configurationDescriptor;                                /*!< The structure to get configuration descriptor. */
+    usb_device_get_string_descriptor_struct_t stringDescriptor; /*!< The structure to get string descriptor. */
+    usb_device_get_hid_descriptor_struct_t hidDescriptor;       /*!< The structure to get HID descriptor. */
+    usb_device_get_hid_report_descriptor_struct_t
+        hidReportDescriptor; /*!< The structure to get HID report descriptor. */
+    usb_device_get_hid_physical_descriptor_struct_t
+        hidPhysicalDescriptor; /*!< The structure to get HID physical descriptor. */
 } usb_device_get_descriptor_common_union_t;
 
 /*! @brief Define function type for class device instance initialization */
-typedef usb_status_t (*usb_device_class_init_call_t)(uint8_t controllerId, usb_device_class_config_struct_t *classConfig, class_handle_t *classHandle);
+typedef usb_status_t (*usb_device_class_init_call_t)(uint8_t controllerId,
+                                                     usb_device_class_config_struct_t *classConfig,
+                                                     class_handle_t *classHandle);
 /*! @brief Define function type for class device instance deinitialization, internal */
 typedef usb_status_t (*usb_device_class_deinit_call_t)(class_handle_t handle);
 /*! @brief Define function type for class device instance Event change */
@@ -285,8 +294,8 @@ typedef usb_status_t (*usb_device_class_event_callback_t)(void *classHandle, uin
 /*! @brief Define class driver interface structure. */
 typedef struct _usb_device_class_map
 {
-    usb_device_class_init_call_t classInit;               /*!< Class driver initialization- entry  of the class driver */
-    usb_device_class_deinit_call_t classDeinit;           /*!< Class driver de-initialization*/
+    usb_device_class_init_call_t classInit;     /*!< Class driver initialization- entry  of the class driver */
+    usb_device_class_deinit_call_t classDeinit; /*!< Class driver de-initialization*/
     usb_device_class_event_callback_t classEventCallback; /*!< Class driver event callback*/
     usb_device_class_type_t type;                         /*!< Class type*/
 } usb_device_class_map_t;
@@ -327,16 +336,16 @@ extern "C"
      *                           See the structure #usb_device_class_config_list_struct_t.
      * @param[out] handle        A parameter used to return pointer of the device handle to the caller.
      *                           The value of the parameter is a pointer to the device handle. This design is used to
-     *                           make a simple device align with the composite device. For the composite device, there are
-     * many
-     *                           kinds of class handles. However, there is only one device handle. Therefore, the handle
-     * points to
-     *                           a device instead of a class. The class handle can be received from the
+     *                           make a simple device align with the composite device. For the composite device, there
+     * are many kinds of class handles. However, there is only one device handle. Therefore, the handle points to a
+     * device instead of a class. The class handle can be received from the
      *                           #usb_device_class_config_struct_t::classHandle after the function successfully.
      *
      * @return A USB error code or kStatus_USB_Success.
      */
-    usb_status_t USB_DeviceClassInit(uint8_t controllerId, usb_device_class_config_list_struct_t *configList, usb_device_handle *handle);
+    usb_status_t USB_DeviceClassInit(uint8_t controllerId,
+                                     usb_device_class_config_list_struct_t *configList,
+                                     usb_device_handle *handle);
 
     /*!
      * @brief Deinitializes the common class and the supported classes.
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/include/usb_device.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/include/usb_device.h
index 7f64be25b..478999f55 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/include/usb_device.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/include/usb_device.h
@@ -50,17 +50,17 @@ typedef enum _usb_device_state
 #if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U))
 typedef enum _usb_dcd_detection_sequence_status
 {
-    kUSB_DcdDetectionNotEnabled = 0x0U,
-    kUSB_DcdDataPinDetectionCompleted = 0x01U,
+    kUSB_DcdDetectionNotEnabled            = 0x0U,
+    kUSB_DcdDataPinDetectionCompleted      = 0x01U,
     kUSB_DcdChargingPortDetectionCompleted = 0x02U,
-    kUSB_DcdChargerTypeDetectionCompleted = 0x03U,
+    kUSB_DcdChargerTypeDetectionCompleted  = 0x03U,
 } usb_dcd_detection_sequence_status_t;
 
 typedef enum _usb_dcd_detection_sequence_results
 {
-    kUSB_DcdDetectionNoResults = 0x0U,
-    kUSB_DcdDetectionStandardHost = 0x01U,
-    kUSB_DcdDetectionChargingPort = 0x02U,
+    kUSB_DcdDetectionNoResults        = 0x0U,
+    kUSB_DcdDetectionStandardHost     = 0x01U,
+    kUSB_DcdDetectionChargingPort     = 0x02U,
     kUSB_DcdDetectionDedicatedCharger = 0x03U,
 } usb_dcd_detection_sequence_results_t;
 #endif
@@ -92,15 +92,15 @@ typedef enum _usb_endpoint_status
 /*! @brief Available common EVENT types in device callback */
 typedef enum _usb_device_event
 {
-    kUSB_DeviceEventBusReset = 1U,    /*!< USB bus reset signal detected */
-    kUSB_DeviceEventSuspend,          /*!< USB bus suspend signal detected */
-    kUSB_DeviceEventResume,           /*!< USB bus resume signal detected. The resume signal is driven by itself or a host */
-    kUSB_DeviceEventSleeped,          /*!< USB bus LPM suspend signal detected */
-    kUSB_DeviceEventLPMResume,        /*!< USB bus LPM resume signal detected. The resume signal is driven by itself or a host
-                                       */
-    kUSB_DeviceEventError,            /*!< An error is happened in the bus. */
-    kUSB_DeviceEventDetach,           /*!< USB device is disconnected from a host. */
-    kUSB_DeviceEventAttach,           /*!< USB device is connected to a host. */
+    kUSB_DeviceEventBusReset = 1U, /*!< USB bus reset signal detected */
+    kUSB_DeviceEventSuspend,       /*!< USB bus suspend signal detected */
+    kUSB_DeviceEventResume,    /*!< USB bus resume signal detected. The resume signal is driven by itself or a host */
+    kUSB_DeviceEventSleeped,   /*!< USB bus LPM suspend signal detected */
+    kUSB_DeviceEventLPMResume, /*!< USB bus LPM resume signal detected. The resume signal is driven by itself or a host
+                                */
+    kUSB_DeviceEventError,     /*!< An error is happened in the bus. */
+    kUSB_DeviceEventDetach,    /*!< USB device is disconnected from a host. */
+    kUSB_DeviceEventAttach,    /*!< USB device is connected to a host. */
     kUSB_DeviceEventSetConfiguration, /*!< Set configuration. */
     kUSB_DeviceEventSetInterface,     /*!< Set interface. */
 
@@ -150,7 +150,9 @@ typedef struct _usb_device_endpoint_callback_message_struct
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-typedef usb_status_t (*usb_device_endpoint_callback_t)(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam);
+typedef usb_status_t (*usb_device_endpoint_callback_t)(usb_device_handle handle,
+                                                       usb_device_endpoint_callback_message_struct_t *message,
+                                                       void *callbackParam);
 
 /*!
  * @brief Device callback function typedef.
@@ -232,11 +234,12 @@ extern "C"
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller according to the controller id.
      * @retval kStatus_USB_InvalidControllerInterface  The controller driver interfaces is invalid. There is an empty
      * 													interface entity.
-     * @retval kStatus_USB_Error                The macro USB_DEVICE_CONFIG_ENDPOINTS is more than the IP's endpoint number.
-     *                                          Or, the device has been initialized.
-     *                                          Or, the mutex or message queue is created failed.
+     * @retval kStatus_USB_Error                The macro USB_DEVICE_CONFIG_ENDPOINTS is more than the IP's endpoint
+     * number. Or, the device has been initialized. Or, the mutex or message queue is created failed.
      */
-    extern usb_status_t USB_DeviceInit(uint8_t controllerId, usb_device_callback_t deviceCallback, usb_device_handle *handle);
+    extern usb_status_t USB_DeviceInit(uint8_t controllerId,
+                                       usb_device_callback_t deviceCallback,
+                                       usb_device_handle *handle);
 
     /*!
      * @brief Enables the device functionality.
@@ -248,7 +251,8 @@ extern "C"
      *
      * @retval kStatus_USB_Success              The device is run successfully.
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
-     * @retval kStatus_USB_InvalidHandle        The device handle is a NULL pointer. Or the controller handle is invalid.
+     * @retval kStatus_USB_InvalidHandle        The device handle is a NULL pointer. Or the controller handle is
+     * invalid.
      *
      */
     extern usb_status_t USB_DeviceRun(usb_device_handle handle);
@@ -296,16 +300,16 @@ extern "C"
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
      * @retval kStatus_USB_Error                The device is doing reset.
      *
-     * @note The return value indicates whether the sending request is successful or not. The transfer done is notified by
-     * the
-     * corresponding callback function.
-     * Currently, only one transfer request can be supported for one specific endpoint.
-     * If there is a specific requirement to support multiple transfer requests for one specific endpoint, the application
-     * should implement a queue on the application level.
-     * The subsequent transfer can begin only when the previous transfer is done (get notification through the endpoint
-     * callback).
+     * @note The return value indicates whether the sending request is successful or not. The transfer done is notified
+     * by the corresponding callback function. Currently, only one transfer request can be supported for one specific
+     * endpoint. If there is a specific requirement to support multiple transfer requests for one specific endpoint, the
+     * application should implement a queue on the application level. The subsequent transfer can begin only when the
+     * previous transfer is done (get notification through the endpoint callback).
      */
-    extern usb_status_t USB_DeviceSendRequest(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+    extern usb_status_t USB_DeviceSendRequest(usb_device_handle handle,
+                                              uint8_t endpointAddress,
+                                              uint8_t *buffer,
+                                              uint32_t length);
 
     /*!
      * @brief Receives data through a specified endpoint.
@@ -323,16 +327,16 @@ extern "C"
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
      * @retval kStatus_USB_Error                The device is doing reset.
      *
-     * @note The return value indicates whether the receiving request is successful or not. The transfer done is notified by
-     * the
-     * corresponding callback function.
-     * Currently, only one transfer request can be supported for one specific endpoint.
-     * If there is a specific requirement to support multiple transfer requests for one specific endpoint, the application
-     * should implement a queue on the application level.
-     * The subsequent transfer can begin only when the previous transfer is done (get notification through the endpoint
-     * callback).
+     * @note The return value indicates whether the receiving request is successful or not. The transfer done is
+     * notified by the corresponding callback function. Currently, only one transfer request can be supported for one
+     * specific endpoint. If there is a specific requirement to support multiple transfer requests for one specific
+     * endpoint, the application should implement a queue on the application level. The subsequent transfer can begin
+     * only when the previous transfer is done (get notification through the endpoint callback).
      */
-    extern usb_status_t USB_DeviceRecvRequest(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+    extern usb_status_t USB_DeviceRecvRequest(usb_device_handle handle,
+                                              uint8_t endpointAddress,
+                                              uint8_t *buffer,
+                                              uint32_t length);
 
     /*!
      * @brief Cancels the pending transfer in a specified endpoint.
@@ -365,7 +369,8 @@ extern "C"
      * @retval kStatus_USB_Busy                 The endpoint is busy in EHCI driver.
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
      */
-    extern usb_status_t USB_DeviceInitEndpoint(usb_device_handle handle, usb_device_endpoint_init_struct_t *epInit,
+    extern usb_status_t USB_DeviceInitEndpoint(usb_device_handle handle,
+                                               usb_device_endpoint_init_struct_t *epInit,
                                                usb_device_endpoint_callback_struct_t *epCallback);
 
     /*!
@@ -458,7 +463,8 @@ extern "C"
      *
      * @retval kStatus_USB_Success              The device is run successfully.
      * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
-     * @retval kStatus_USB_InvalidHandle        The device handle is a NULL pointer. Or the controller handle is invalid.
+     * @retval kStatus_USB_InvalidHandle        The device handle is a NULL pointer. Or the controller handle is
+     * invalid.
      *
      */
     extern usb_status_t USB_DeviceDcdInitModule(usb_device_handle handle, void *time_param);
@@ -471,7 +477,8 @@ extern "C"
      * @param[in] handle The device handle got from #USB_DeviceInit.
      *
      * @retval kStatus_USB_Success 			 The device is stopped successfully.
-     * @retval kStatus_USB_InvalidHandle		 The device handle is a NULL pointer or the controller handle is invalid.
+     * @retval kStatus_USB_InvalidHandle		 The device handle is a NULL pointer or the controller handle is
+     * invalid.
      */
     extern usb_status_t USB_DeviceDcdDeinitModule(usb_device_handle handle);
 #endif
@@ -521,7 +528,7 @@ extern "C"
 #endif
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
 /*!
  * @brief Device LPC ip3511 controller task function.
@@ -567,7 +574,7 @@ extern "C"
     extern void USB_DeviceEhciIsrFunction(void *deviceHandle);
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
     /*!
      * @brief Device LPC USB ISR function.
@@ -579,7 +586,8 @@ extern "C"
     extern void USB_DeviceLpcIp3511IsrFunction(void *deviceHandle);
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_DWC3)) && (USB_DEVICE_CONFIG_DWC3 > 0U)) || ((defined(USB_DEVICE_CONFIG_DWC3)) && (USB_DEVICE_CONFIG_DWC3 > 0U)))
+#if (((defined(USB_DEVICE_CONFIG_DWC3)) && (USB_DEVICE_CONFIG_DWC3 > 0U)) ||                                           \
+     ((defined(USB_DEVICE_CONFIG_DWC3)) && (USB_DEVICE_CONFIG_DWC3 > 0U)))
     /*!
      * @brief Device USB DWC3 ISR function.
      *
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.c
index 343a5aaf2..12de388a2 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.c
@@ -33,12 +33,15 @@
  ******************************************************************************/
 
 static void USB_DeviceEhciSetDefaultState(usb_device_ehci_state_struct_t *ehciState);
-static usb_status_t USB_DeviceEhciEndpointInit(usb_device_ehci_state_struct_t *ehciState, usb_device_endpoint_init_struct_t *epInit);
+static usb_status_t USB_DeviceEhciEndpointInit(usb_device_ehci_state_struct_t *ehciState,
+                                               usb_device_endpoint_init_struct_t *epInit);
 static usb_status_t USB_DeviceEhciEndpointDeinit(usb_device_ehci_state_struct_t *ehciState, uint8_t ep);
 static usb_status_t USB_DeviceEhciEndpointStall(usb_device_ehci_state_struct_t *ehciState, uint8_t ep);
 static usb_status_t USB_DeviceEhciEndpointUnstall(usb_device_ehci_state_struct_t *ehciState, uint8_t ep);
 static void USB_DeviceEhciFillSetupBuffer(usb_device_ehci_state_struct_t *ehciState, uint8_t ep);
-static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehciState, uint8_t endpoint, uint8_t direction);
+static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehciState,
+                                            uint8_t endpoint,
+                                            uint8_t direction);
 static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehciState);
 static void USB_DeviceEhciInterruptPortChange(usb_device_ehci_state_struct_t *ehciState);
 static void USB_DeviceEhciInterruptReset(usb_device_ehci_state_struct_t *ehciState);
@@ -46,7 +49,10 @@ static void USB_DeviceEhciInterruptSof(usb_device_ehci_state_struct_t *ehciState
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
 static void USB_DeviceEhciInterruptSuspend(usb_device_ehci_state_struct_t *ehciState);
 #endif /* USB_DEVICE_CONFIG_LOW_POWER_MODE */
-static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciState, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciState,
+                                           uint8_t endpointAddress,
+                                           uint8_t *buffer,
+                                           uint32_t length);
 
 extern usb_status_t USB_DeviceNotificationTrigger(void *handle, void *msg);
 
@@ -56,19 +62,22 @@ extern usb_status_t USB_DeviceNotificationTrigger(void *handle, void *msg);
 
 /* Apply for QH buffer, 2048-byte alignment */
 USB_RAM_ADDRESS_ALIGNMENT(2048)
-USB_CONTROLLER_DATA static uint8_t qh_buffer[(USB_DEVICE_CONFIG_EHCI - 1) * 2048 + 2 * USB_DEVICE_CONFIG_ENDPOINTS * 2 * sizeof(usb_device_ehci_qh_struct_t)];
+USB_CONTROLLER_DATA static uint8_t qh_buffer[(USB_DEVICE_CONFIG_EHCI - 1) * 2048 +
+                                             2 * USB_DEVICE_CONFIG_ENDPOINTS * 2 * sizeof(usb_device_ehci_qh_struct_t)];
 
 /* Apply for DTD buffer, 32-byte alignment */
 USB_RAM_ADDRESS_ALIGNMENT(32)
-USB_CONTROLLER_DATA static usb_device_ehci_dtd_struct_t s_UsbDeviceEhciDtd[USB_DEVICE_CONFIG_EHCI][USB_DEVICE_CONFIG_EHCI_MAX_DTD];
+USB_CONTROLLER_DATA static usb_device_ehci_dtd_struct_t s_UsbDeviceEhciDtd[USB_DEVICE_CONFIG_EHCI]
+                                                                          [USB_DEVICE_CONFIG_EHCI_MAX_DTD];
 
 /* Apply for ehci device state structure */
 static usb_device_ehci_state_struct_t g_UsbDeviceEhciState[USB_DEVICE_CONFIG_EHCI];
 
-/* Apply for whether the corresponding g_UsbDeviceEhciState is used or not, if used, it is set to 1, if not used, it is set to 0 */
+/* Apply for whether the corresponding g_UsbDeviceEhciState is used or not, if used, it is set to 1, if not used, it is
+ * set to 0 */
 static uint8_t g_UsbDeviceEhciStateStatus[USB_DEVICE_CONFIG_EHCI] = {0};
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
 /* Apply for device dcd state structure */
 static usb_device_dcd_state_struct_t s_UsbDeviceDcdHSState[USB_DEVICE_CONFIG_EHCI];
@@ -93,26 +102,22 @@ void *USB_EhciNCGetBase(uint8_t controllerId)
     void *usbNCBase = NULL;
 #if ((defined FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
     uint32_t instance;
-    uint32_t newinstance = 0;
+    uint32_t newinstance       = 0;
     uint32_t usbnc_base_temp[] = USBNC_BASE_ADDRS;
-    uint32_t usbnc_base[] = USBNC_BASE_ADDRS;
+    uint32_t usbnc_base[]      = USBNC_BASE_ADDRS;
 
-    if (controllerId < kUSB_ControllerEhci0)
-    {
+    if (controllerId < kUSB_ControllerEhci0) {
         return NULL;
     }
 
     controllerId = controllerId - kUSB_ControllerEhci0;
 
-    for (instance = 0; instance < (sizeof(usbnc_base_temp) / sizeof(usbnc_base_temp[0])); instance++)
-    {
-        if (usbnc_base_temp[instance])
-        {
+    for (instance = 0; instance < (sizeof(usbnc_base_temp) / sizeof(usbnc_base_temp[0])); instance++) {
+        if (usbnc_base_temp[instance]) {
             usbnc_base[newinstance++] = usbnc_base_temp[instance];
         }
     }
-    if (controllerId > newinstance)
-    {
+    if (controllerId > newinstance) {
         return NULL;
     }
 
@@ -139,13 +144,12 @@ static void USB_DeviceEhciSetDefaultState(usb_device_ehci_state_struct_t *ehciSt
 
     /* Initialize the dtd free queue */
     ehciState->dtdFree = ehciState->dtd;
-    p = ehciState->dtdFree;
-    for (uint32_t i = 1U; i < USB_DEVICE_CONFIG_EHCI_MAX_DTD; i++)
-    {
+    p                  = ehciState->dtdFree;
+    for (uint32_t i = 1U; i < USB_DEVICE_CONFIG_EHCI_MAX_DTD; i++) {
         p->nextDtdPointer = (uint32_t)&ehciState->dtd[i];
-        p = (usb_device_ehci_dtd_struct_t *)p->nextDtdPointer;
+        p                 = (usb_device_ehci_dtd_struct_t *)p->nextDtdPointer;
     }
-    p->nextDtdPointer = 0U;
+    p->nextDtdPointer   = 0U;
     ehciState->dtdCount = USB_DEVICE_CONFIG_EHCI_MAX_DTD;
 
     /* Not use interrupt threshold. */
@@ -162,12 +166,12 @@ static void USB_DeviceEhciSetDefaultState(usb_device_ehci_state_struct_t *ehciSt
     ehciState->registerBase->USBMODE &= ~USBHS_USBMODE_ES_MASK;
 #endif
     /* Initialize the QHs of endpoint. */
-    for (uint32_t i = 0U; i < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); i++)
-    {
+    for (uint32_t i = 0U; i < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); i++) {
         ehciState->qh[i].nextDtdPointer = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
-        ehciState->qh[i].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize = USB_CONTROL_MAX_PACKET_SIZE;
-        ehciState->dtdHard[i] = NULL;
-        ehciState->dtdTail[i] = NULL;
+        ehciState->qh[i].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize =
+            USB_CONTROL_MAX_PACKET_SIZE;
+        ehciState->dtdHard[i]                                              = NULL;
+        ehciState->dtdTail[i]                                              = NULL;
         ehciState->qh[i].endpointStatusUnion.endpointStatusBitmap.isOpened = 0U;
     }
 
@@ -183,11 +187,12 @@ static void USB_DeviceEhciSetDefaultState(usb_device_ehci_state_struct_t *ehciSt
 #endif /* USB_DEVICE_CONFIG_DETACH_ENABLE */
 
     /* Enable USB Interrupt, USB Error Interrupt, Port Change detect Interrupt, USB-Reset Interrupt*/
-    ehciState->registerBase->USBINTR = (USBHS_USBINTR_UE_MASK | USBHS_USBINTR_UEE_MASK | USBHS_USBINTR_PCE_MASK | USBHS_USBINTR_URE_MASK
+    ehciState->registerBase->USBINTR =
+        (USBHS_USBINTR_UE_MASK | USBHS_USBINTR_UEE_MASK | USBHS_USBINTR_PCE_MASK | USBHS_USBINTR_URE_MASK
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
-                                        | USBHS_USBINTR_SLE_MASK
+         | USBHS_USBINTR_SLE_MASK
 #endif /* USB_DEVICE_CONFIG_LOW_POWER_MODE */
-    );
+        );
 
     /* Clear reset flag */
     ehciState->isResetting = 0U;
@@ -203,67 +208,65 @@ static void USB_DeviceEhciSetDefaultState(usb_device_ehci_state_struct_t *ehciSt
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceEhciEndpointInit(usb_device_ehci_state_struct_t *ehciState, usb_device_endpoint_init_struct_t *epInit)
+static usb_status_t USB_DeviceEhciEndpointInit(usb_device_ehci_state_struct_t *ehciState,
+                                               usb_device_endpoint_init_struct_t *epInit)
 {
-    uint32_t primeBit =
-        1U << ((epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK) + ((epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
+    uint32_t primeBit      = 1U << ((epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK) +
+                               ((epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
     uint16_t maxPacketSize = epInit->maxPacketSize & USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_SIZE_MASK;
-    uint8_t endpoint = (epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK);
-    uint8_t direction = (epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
-    uint8_t index = ((uint8_t)((uint32_t)endpoint << 1U)) | direction;
+    uint8_t endpoint       = (epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK);
+    uint8_t direction      = (epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t index        = ((uint8_t)((uint32_t)endpoint << 1U)) | direction;
     uint8_t transferType = epInit->transferType & USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_TYPE_MASK;
 
     /* Cancel pending transfer of the endpoint */
     USB_DeviceEhciCancel(ehciState, epInit->endpointAddress);
 
-    if ((ehciState->registerBase->EPPRIME & primeBit) || (ehciState->registerBase->EPSR & primeBit))
-    {
+    if ((ehciState->registerBase->EPPRIME & primeBit) || (ehciState->registerBase->EPSR & primeBit)) {
         return kStatus_USB_Busy;
     }
 
     /* Make the endpoint max packet size align with USB Specification 2.0. */
-    if (USB_ENDPOINT_ISOCHRONOUS == transferType)
-    {
-        if (maxPacketSize > USB_DEVICE_MAX_HS_ISO_MAX_PACKET_SIZE)
-        {
+    if (USB_ENDPOINT_ISOCHRONOUS == transferType) {
+        if (maxPacketSize > USB_DEVICE_MAX_HS_ISO_MAX_PACKET_SIZE) {
             maxPacketSize = USB_DEVICE_MAX_HS_ISO_MAX_PACKET_SIZE;
         }
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.mult =
             1U + ((epInit->maxPacketSize & USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_MASK) >>
                   USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_SHFIT);
     }
-    else
-    {
+    else {
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.mult = 0U;
     }
 
     /* Save the max packet size of the endpoint */
-    ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize = maxPacketSize;
+    ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize =
+        maxPacketSize;
     ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.zlt = epInit->zlt;
-    if ((USB_CONTROL_ENDPOINT == endpoint))
-    {
+    if ((USB_CONTROL_ENDPOINT == endpoint)) {
         /* Set ZLT bit. disable control endpoint automatic zlt by default,only send zlt when it is needed*/
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt = 1U;
     }
-    else
-    {
+    else {
         /* Set ZLT bit. */
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt = !epInit->zlt;
     }
 
     /* Enable the endpoint. */
-    if (USB_ENDPOINT_CONTROL == transferType)
-    {
+    if (USB_ENDPOINT_CONTROL == transferType) {
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.ios = 1U;
-        ehciState->registerBase->EPCR0 |= (direction ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXR_MASK | ((uint32_t)transferType << USBHS_EPCR_TXT_SHIFT))
-                                                     : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXR_MASK | ((uint32_t)transferType << USBHS_EPCR_RXT_SHIFT)));
+        ehciState->registerBase->EPCR0 |=
+            (direction
+                 ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXR_MASK | ((uint32_t)transferType << USBHS_EPCR_TXT_SHIFT))
+                 : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXR_MASK | ((uint32_t)transferType << USBHS_EPCR_RXT_SHIFT)));
     }
-    else
-    {
+    else {
         ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.ios = 0U;
         ehciState->registerBase->EPCR[endpoint - 1U] |=
-            (direction ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXR_MASK | ((uint32_t)transferType << USBHS_EPCR_TXT_SHIFT))
-                       : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXR_MASK | ((uint32_t)transferType << USBHS_EPCR_RXT_SHIFT)));
+            (direction
+                 ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXR_MASK | ((uint32_t)transferType << USBHS_EPCR_TXT_SHIFT))
+                 : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXR_MASK | ((uint32_t)transferType << USBHS_EPCR_RXT_SHIFT)));
     }
 
     ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.isOpened = 1U;
@@ -283,9 +286,11 @@ static usb_status_t USB_DeviceEhciEndpointInit(usb_device_ehci_state_struct_t *e
  */
 static usb_status_t USB_DeviceEhciEndpointDeinit(usb_device_ehci_state_struct_t *ehciState, uint8_t ep)
 {
-    uint32_t primeBit = 1U << ((ep & USB_ENDPOINT_NUMBER_MASK) + ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
+    uint32_t primeBit =
+        1U << ((ep & USB_ENDPOINT_NUMBER_MASK) + ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
     uint8_t endpoint = (ep & USB_ENDPOINT_NUMBER_MASK);
-    uint8_t direction = (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t direction =
+        (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
     uint8_t index = ((uint8_t)((uint32_t)endpoint << 1U)) | direction;
 
     ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.isOpened = 0U;
@@ -293,20 +298,18 @@ static usb_status_t USB_DeviceEhciEndpointDeinit(usb_device_ehci_state_struct_t
     /* Cancel the transfer of the endpoint */
     USB_DeviceEhciCancel(ehciState, ep);
 
-    if ((ehciState->registerBase->EPPRIME & primeBit) || (ehciState->registerBase->EPSR & primeBit))
-    {
+    if ((ehciState->registerBase->EPPRIME & primeBit) || (ehciState->registerBase->EPSR & primeBit)) {
         return kStatus_USB_Busy;
     }
 
     /* Clear endpoint state */
     ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristics = 0U;
     /* Disable the endpoint */
-    if (!endpoint)
-    {
-        ehciState->registerBase->EPCR0 &= ~(direction ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXT_MASK) : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXT_MASK));
+    if (!endpoint) {
+        ehciState->registerBase->EPCR0 &=
+            ~(direction ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXT_MASK) : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXT_MASK));
     }
-    else
-    {
+    else {
         ehciState->registerBase->EPCR[endpoint - 1U] &=
             ~(direction ? (USBHS_EPCR_TXE_MASK | USBHS_EPCR_TXT_MASK) : (USBHS_EPCR_RXE_MASK | USBHS_EPCR_RXT_MASK));
     }
@@ -328,32 +331,27 @@ static usb_status_t USB_DeviceEhciEndpointDeinit(usb_device_ehci_state_struct_t
 static usb_status_t USB_DeviceEhciEndpointStall(usb_device_ehci_state_struct_t *ehciState, uint8_t ep)
 {
     uint8_t endpoint = ep & USB_ENDPOINT_NUMBER_MASK;
-    uint8_t direction = (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t direction =
+        (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
     uint8_t index = ((uint8_t)((uint32_t)endpoint << 1U)) | direction;
 
     /* Cancel the transfer of the endpoint */
     USB_DeviceEhciCancel(ehciState, ep);
 
     /* Set endpoint stall flag. */
-    if (ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.ios)
-    {
-        if (!endpoint)
-        {
+    if (ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.ios) {
+        if (!endpoint) {
             ehciState->registerBase->EPCR0 |= (USBHS_EPCR_TXS_MASK | USBHS_EPCR_RXS_MASK);
         }
-        else
-        {
+        else {
             ehciState->registerBase->EPCR[endpoint - 1U] |= (USBHS_EPCR_TXS_MASK | USBHS_EPCR_RXS_MASK);
         }
     }
-    else
-    {
-        if (!endpoint)
-        {
+    else {
+        if (!endpoint) {
             ehciState->registerBase->EPCR0 |= (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK);
         }
-        else
-        {
+        else {
             ehciState->registerBase->EPCR[endpoint - 1U] |= (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK);
         }
     }
@@ -375,15 +373,14 @@ static usb_status_t USB_DeviceEhciEndpointStall(usb_device_ehci_state_struct_t *
 static usb_status_t USB_DeviceEhciEndpointUnstall(usb_device_ehci_state_struct_t *ehciState, uint8_t ep)
 {
     uint8_t endpoint = ep & USB_ENDPOINT_NUMBER_MASK;
-    uint8_t direction = (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t direction =
+        (ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
 
     /* Clear the endpoint stall state */
-    if (!endpoint)
-    {
+    if (!endpoint) {
         ehciState->registerBase->EPCR0 &= ~(direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK);
     }
-    else
-    {
+    else {
         ehciState->registerBase->EPCR[endpoint - 1U] &= ~(direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK);
         ehciState->registerBase->EPCR[endpoint - 1U] |= (direction ? USBHS_EPCR_TXR_MASK : USBHS_EPCR_RXR_MASK);
     }
@@ -405,13 +402,12 @@ static usb_status_t USB_DeviceEhciEndpointUnstall(usb_device_ehci_state_struct_t
 static void USB_DeviceEhciFillSetupBuffer(usb_device_ehci_state_struct_t *ehciState, uint8_t ep)
 {
     uint8_t waitingSafelyAccess = 1U;
-    uint8_t index = (ep * 2U) | USB_OUT;
+    uint8_t index               = (ep * 2U) | USB_OUT;
 
     /* Write 1U to clear corresponding bit in EPSETUPSR. */
     ehciState->registerBase->EPSETUPSR = 1U << ep;
 
-    while (waitingSafelyAccess)
-    {
+    while (waitingSafelyAccess) {
         /* Set the setup tripwire bit. */
         ehciState->registerBase->USBCMD |= USBHS_USBCMD_SUTW_MASK;
 
@@ -420,8 +416,7 @@ static void USB_DeviceEhciFillSetupBuffer(usb_device_ehci_state_struct_t *ehciSt
         ehciState->qh[index].setupBufferBack[1] = ehciState->qh[index].setupBuffer[1];
 
         /* Read the USBCMD[SUTW] bit. If set, jump out from the while loop; if cleared continue */
-        if (ehciState->registerBase->USBCMD & USBHS_USBCMD_SUTW_MASK)
-        {
+        if (ehciState->registerBase->USBCMD & USBHS_USBCMD_SUTW_MASK) {
             waitingSafelyAccess = 0U;
         }
     }
@@ -439,7 +434,9 @@ static void USB_DeviceEhciFillSetupBuffer(usb_device_ehci_state_struct_t *ehciSt
  * @param direction        The direction of the endpoint.
  *
  */
-static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehciState, uint8_t endpoint, uint8_t direction)
+static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehciState,
+                                            uint8_t endpoint,
+                                            uint8_t direction)
 {
     usb_device_ehci_dtd_struct_t *currentDtd;
     uint32_t index = ((uint32_t)endpoint << 1U) + (uint32_t)direction;
@@ -448,44 +445,41 @@ static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehci
     message.buffer = NULL;
     message.length = 0U;
     /* Get the dtd of the control pipe */
-    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
-    while (currentDtd)
-    {
+    currentDtd =
+        (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+    while (currentDtd) {
         /* Pass the transfer buffer address */
-        if (NULL == message.buffer)
-        {
+        if (NULL == message.buffer) {
             uint32_t bufferAddress = currentDtd->bufferPointerPage[0];
-            message.buffer = (uint8_t *)((bufferAddress & USB_DEVICE_ECHI_DTD_PAGE_MASK) | (currentDtd->reservedUnion.originalBufferInfo.originalBufferOffest));
+            message.buffer         = (uint8_t *)((bufferAddress & USB_DEVICE_ECHI_DTD_PAGE_MASK) |
+                                         (currentDtd->reservedUnion.originalBufferInfo.originalBufferOffest));
         }
         /* If the dtd is active, set the message length to USB_UNINITIALIZED_VAL_32. Or set the length by using finished
          * length. */
-        if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)
-        {
+        if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE) {
             message.length = USB_UNINITIALIZED_VAL_32;
         }
-        else
-        {
-            message.length += (currentDtd->reservedUnion.originalBufferInfo.originalBufferLength - currentDtd->dtdTokenUnion.dtdTokenBitmap.totalBytes);
+        else {
+            message.length += (currentDtd->reservedUnion.originalBufferInfo.originalBufferLength -
+                               currentDtd->dtdTokenUnion.dtdTokenBitmap.totalBytes);
         }
 
         /* Move the dtd head pointer to next. */
         /* If the pointer of the head equals to the tail, set the dtd queue to null. */
-        if (ehciState->dtdHard[index] == ehciState->dtdTail[index])
-        {
-            ehciState->dtdHard[index] = NULL;
-            ehciState->dtdTail[index] = NULL;
-            ehciState->qh[index].nextDtdPointer = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
+        if (ehciState->dtdHard[index] == ehciState->dtdTail[index]) {
+            ehciState->dtdHard[index]                   = NULL;
+            ehciState->dtdTail[index]                   = NULL;
+            ehciState->qh[index].nextDtdPointer         = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
             ehciState->qh[index].dtdTokenUnion.dtdToken = 0U;
         }
-        else
-        {
+        else {
             ehciState->dtdHard[index] = (usb_device_ehci_dtd_struct_t *)ehciState->dtdHard[index]->nextDtdPointer;
         }
 
         /* When the ioc is set or the dtd queue is empty, the up layer will be notified. */
-        if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) || (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK)))
-        {
-            message.code = endpoint | (uint8_t)((uint32_t)direction << 0x07U);
+        if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) ||
+            (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK))) {
+            message.code    = endpoint | (uint8_t)((uint32_t)direction << 0x07U);
             message.isSetup = 0U;
             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
             message.buffer = NULL;
@@ -496,11 +490,12 @@ static void USB_DeviceEhciCancelControlPipe(usb_device_ehci_state_struct_t *ehci
         currentDtd->dtdTokenUnion.dtdToken = 0U;
         /* Add the dtd to the free dtd queue. */
         currentDtd->nextDtdPointer = (uint32_t)ehciState->dtdFree;
-        ehciState->dtdFree = currentDtd;
+        ehciState->dtdFree         = currentDtd;
         ehciState->dtdCount++;
 
         /* Get the next in-used dtd. */
-        currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+        currentDtd =
+            (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
     }
 }
 
@@ -526,15 +521,13 @@ static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehc
     /* Get the EPSETUPSR to check the setup packect received in which one endpoint. */
     status = ehciState->registerBase->EPSETUPSR;
 
-    if (status)
-    {
-        for (endpoint = 0U; endpoint < USB_DEVICE_CONFIG_ENDPOINTS; endpoint++)
-        {
+    if (status) {
+        for (endpoint = 0U; endpoint < USB_DEVICE_CONFIG_ENDPOINTS; endpoint++) {
             /* Check the endpoint receive the setup packet. */
-            if (status & (1U << endpoint))
-            {
+            if (status & (1U << endpoint)) {
                 /* Get last setup packet */
-                usb_setup_struct_t *deviceSetup = (usb_setup_struct_t *)&ehciState->qh[(uint8_t)((uint32_t)endpoint << 1U) + USB_OUT].setupBufferBack;
+                usb_setup_struct_t *deviceSetup =
+                    (usb_setup_struct_t *)&ehciState->qh[(uint8_t)((uint32_t)endpoint << 1U) + USB_OUT].setupBufferBack;
 
                 /* Check the direction of the data phase. */
                 direction = (deviceSetup->bmRequestType & USB_REQUEST_TYPE_DIR_IN) >> USB_REQUEST_TYPE_DIR_SHIFT;
@@ -542,9 +535,9 @@ static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehc
                 USB_DeviceEhciCancelControlPipe(ehciState, endpoint, direction);
                 /* Cancel the status phase transfer */
                 USB_DeviceEhciCancelControlPipe(ehciState, endpoint, 1U ^ direction);
-                message.code = (endpoint) | (USB_OUT << 0x07U);
-                message.buffer = (uint8_t *)deviceSetup;
-                message.length = USB_SETUP_PACKET_SIZE;
+                message.code    = (endpoint) | (USB_OUT << 0x07U);
+                message.buffer  = (uint8_t *)deviceSetup;
+                message.length  = USB_SETUP_PACKET_SIZE;
                 message.isSetup = 1U;
                 /* Fill the setup packet to the backup buffer */
                 USB_DeviceEhciFillSetupBuffer(ehciState, endpoint);
@@ -558,107 +551,97 @@ static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehc
     /* Clear the endpoint transfer done status */
     ehciState->registerBase->EPCOMPLETE = status;
 
-    if (status)
-    {
-        for (count = 0U; count < 32U; count++)
-        {
+    if (status) {
+        for (count = 0U; count < 32U; count++) {
             /* Check the transfer is done or not in the specified endpoint. */
-            if (status & ((uint32_t)(1U << count)))
-            {
-                if (count > 15U)
-                {
-                    endpoint = count - 16U;
+            if (status & ((uint32_t)(1U << count))) {
+                if (count > 15U) {
+                    endpoint  = count - 16U;
                     direction = USB_IN;
                 }
-                else
-                {
-                    endpoint = count;
+                else {
+                    endpoint  = count;
                     direction = USB_OUT;
                 }
-                if (endpoint >= USB_DEVICE_CONFIG_ENDPOINTS)
-                {
+                if (endpoint >= USB_DEVICE_CONFIG_ENDPOINTS) {
                     continue;
                 }
-                index = (endpoint << 1U) + direction;
+                index          = (endpoint << 1U) + direction;
                 message.buffer = NULL;
                 message.length = 0U;
-                if ((USB_CONTROL_ENDPOINT == endpoint) && (USB_IN == direction))
-                {
-                    if (1U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.zlt)
-                    {
-                        if (!ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt)
-                        {
+                if ((USB_CONTROL_ENDPOINT == endpoint) && (USB_IN == direction)) {
+                    if (1U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.zlt) {
+                        if (!ehciState->qh[index]
+                                 .capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt) {
                             /*disable zlt after send zlt*/
-                            ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt = 1U;
+                            ehciState->qh[index]
+                                .capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt = 1U;
                         }
                     }
                 }
                 /* Get the in-used dtd of the specified endpoint. */
-                currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
-                while (currentDtd)
-                {
+                currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] &
+                                                              USB_DEVICE_ECHI_DTD_POINTER_MASK);
+                while (currentDtd) {
                     uint8_t isTokenDone = 0;
                     /* Get the in-used dtd of the specified endpoint. */
-                    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+                    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] &
+                                                                  USB_DEVICE_ECHI_DTD_POINTER_MASK);
 
-                    while (currentDtd)
-                    {
+                    while (currentDtd) {
                         /* Don't handle the active dtd. */
                         if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE) ||
-                            (currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc))
-                        {
-                            if ((!(currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)) &&
-                                (currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc))
-                            {
+                            (currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc)) {
+                            if ((!(currentDtd->dtdTokenUnion.dtdTokenBitmap.status &
+                                   USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)) &&
+                                (currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc)) {
                                 isTokenDone = 1U;
                             }
                             break;
                         }
-                        currentDtd = (usb_device_ehci_dtd_struct_t *)(currentDtd->nextDtdPointer & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+                        currentDtd = (usb_device_ehci_dtd_struct_t *)(currentDtd->nextDtdPointer &
+                                                                      USB_DEVICE_ECHI_DTD_POINTER_MASK);
                     }
 
-                    if ((0 == isTokenDone) && (currentDtd))
-                    {
+                    if ((0 == isTokenDone) && (currentDtd)) {
                         break;
                     }
 
                     /* Get the in-used dtd of the specified endpoint. */
-                    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
-                    while (currentDtd)
-                    {
+                    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] &
+                                                                  USB_DEVICE_ECHI_DTD_POINTER_MASK);
+                    while (currentDtd) {
                         /* Don't handle the active dtd. */
-                        if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)
-                        {
+                        if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE) {
                             break;
                         }
 
                         /* Save the transfer buffer address */
-                        if (NULL == message.buffer)
-                        {
-                            message.buffer = (uint8_t *)((currentDtd->bufferPointerPage[0] & USB_DEVICE_ECHI_DTD_PAGE_MASK) |
-                                                         (currentDtd->reservedUnion.originalBufferInfo.originalBufferOffest));
+                        if (NULL == message.buffer) {
+                            message.buffer =
+                                (uint8_t *)((currentDtd->bufferPointerPage[0] & USB_DEVICE_ECHI_DTD_PAGE_MASK) |
+                                            (currentDtd->reservedUnion.originalBufferInfo.originalBufferOffest));
                         }
                         /* Save the transferred data length */
-                        message.length +=
-                            (currentDtd->reservedUnion.originalBufferInfo.originalBufferLength - currentDtd->dtdTokenUnion.dtdTokenBitmap.totalBytes);
+                        message.length += (currentDtd->reservedUnion.originalBufferInfo.originalBufferLength -
+                                           currentDtd->dtdTokenUnion.dtdTokenBitmap.totalBytes);
 
                         /* Move the dtd queue head pointer to next */
-                        if (ehciState->dtdHard[index] == ehciState->dtdTail[index])
-                        {
-                            ehciState->dtdHard[index] = NULL;
-                            ehciState->dtdTail[index] = NULL;
-                            ehciState->qh[index].nextDtdPointer = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
+                        if (ehciState->dtdHard[index] == ehciState->dtdTail[index]) {
+                            ehciState->dtdHard[index]                   = NULL;
+                            ehciState->dtdTail[index]                   = NULL;
+                            ehciState->qh[index].nextDtdPointer         = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
                             ehciState->qh[index].dtdTokenUnion.dtdToken = 0U;
                         }
-                        else
-                        {
-                            ehciState->dtdHard[index] = (usb_device_ehci_dtd_struct_t *)ehciState->dtdHard[index]->nextDtdPointer;
+                        else {
+                            ehciState->dtdHard[index] =
+                                (usb_device_ehci_dtd_struct_t *)ehciState->dtdHard[index]->nextDtdPointer;
                         }
 
                         /* When the ioc is set or the dtd queue is empty, the up layer will be notified. */
-                        if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) || (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK)))
-                        {
-                            message.code = endpoint | (uint8_t)((uint32_t)direction << 0x07U);
+                        if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) ||
+                            (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK))) {
+                            message.code    = endpoint | (uint8_t)((uint32_t)direction << 0x07U);
                             message.isSetup = 0U;
                             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
                             message.buffer = NULL;
@@ -666,14 +649,15 @@ static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehc
                         }
                         /* Clear the token field of the dtd */
                         currentDtd->dtdTokenUnion.dtdToken = 0U;
-                        currentDtd->nextDtdPointer = (uint32_t)ehciState->dtdFree;
-                        ehciState->dtdFree = currentDtd;
+                        currentDtd->nextDtdPointer         = (uint32_t)ehciState->dtdFree;
+                        ehciState->dtdFree                 = currentDtd;
                         ehciState->dtdCount++;
                         /* Get the next in-used dtd */
-                        currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+                        currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] &
+                                                                      USB_DEVICE_ECHI_DTD_POINTER_MASK);
 
-                        if ((NULL != currentDtd) && (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE))
-                        {
+                        if ((NULL != currentDtd) &&
+                            (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)) {
                             primeBit = 1U << (endpoint + 16U * direction);
 
                             /* Try to prime the next dtd. */
@@ -681,18 +665,16 @@ static void USB_DeviceEhciInterruptTokenDone(usb_device_ehci_state_struct_t *ehc
 
                             /* Whether the endpoint transmit/receive buffer is ready or not. If not, wait for prime bit
                              * cleared and prime the next dtd. */
-                            if (!(ehciState->registerBase->EPSR & primeBit))
-                            {
+                            if (!(ehciState->registerBase->EPSR & primeBit)) {
                                 /* Wait for the endpoint prime bit cleared by HW */
                                 while (ehciState->registerBase->EPPRIME & primeBit) {}
 
                                 /* If the endpoint transmit/receive buffer is not ready */
-                                if (!(ehciState->registerBase->EPSR & primeBit))
-                                {
+                                if (!(ehciState->registerBase->EPSR & primeBit)) {
                                     /* Prime next dtd and prime the transfer */
-                                    ehciState->qh[index].nextDtdPointer = (uint32_t)currentDtd;
+                                    ehciState->qh[index].nextDtdPointer         = (uint32_t)currentDtd;
                                     ehciState->qh[index].dtdTokenUnion.dtdToken = 0U;
-                                    ehciState->registerBase->EPPRIME = primeBit;
+                                    ehciState->registerBase->EPPRIME            = primeBit;
                                 }
                             }
                         }
@@ -715,26 +697,22 @@ static void USB_DeviceEhciInterruptPortChange(usb_device_ehci_state_struct_t *eh
 {
     usb_device_callback_message_struct_t message;
 
-    message.buffer = (uint8_t *)NULL;
-    message.length = 0U;
+    message.buffer  = (uint8_t *)NULL;
+    message.length  = 0U;
     message.isSetup = 0U;
 
     /* Whether the port is doing reset. */
-    if (!(ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK))
-    {
+    if (!(ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK)) {
         /* If not, update the USB speed. */
-        if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_HSP_MASK)
-        {
+        if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_HSP_MASK) {
             ehciState->speed = USB_SPEED_HIGH;
         }
-        else
-        {
+        else {
             ehciState->speed = USB_SPEED_FULL;
         }
 
         /* If the device reset flag is non-zero, notify the up layer the device reset finished. */
-        if (ehciState->isResetting)
-        {
+        if (ehciState->isResetting) {
             message.code = kUSB_DeviceNotifyBusReset;
             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
             ehciState->isResetting = 0U;
@@ -742,8 +720,7 @@ static void USB_DeviceEhciInterruptPortChange(usb_device_ehci_state_struct_t *eh
     }
 
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
-    if ((ehciState->isSuspending) && (!(ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SUSP_MASK)))
-    {
+    if ((ehciState->isSuspending) && (!(ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SUSP_MASK))) {
         /* Set the resume flag */
         ehciState->isSuspending = 0U;
 
@@ -766,29 +743,26 @@ static void USB_DeviceEhciInterruptReset(usb_device_ehci_state_struct_t *ehciSta
     uint32_t status = 0U;
 
     /* Clear the setup flag */
-    status = ehciState->registerBase->EPSETUPSR;
+    status                             = ehciState->registerBase->EPSETUPSR;
     ehciState->registerBase->EPSETUPSR = status;
     /* Clear the endpoint complete flag */
-    status = ehciState->registerBase->EPCOMPLETE;
+    status                              = ehciState->registerBase->EPCOMPLETE;
     ehciState->registerBase->EPCOMPLETE = status;
 
-    do
-    {
+    do {
         /* Flush the pending transfers */
         ehciState->registerBase->EPFLUSH = USBHS_EPFLUSH_FERB_MASK | USBHS_EPFLUSH_FETB_MASK;
     } while (ehciState->registerBase->EPPRIME & (USBHS_EPPRIME_PERB_MASK | USBHS_EPPRIME_PETB_MASK));
 
     /* Whether is the port reset. If yes, set the isResetting flag. Or, notify the up layer. */
-    if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK)
-    {
+    if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_PR_MASK) {
         ehciState->isResetting = 1U;
     }
-    else
-    {
+    else {
         usb_device_callback_message_struct_t message;
-        message.buffer = (uint8_t *)NULL;
-        message.code = kUSB_DeviceNotifyBusReset;
-        message.length = 0U;
+        message.buffer  = (uint8_t *)NULL;
+        message.code    = kUSB_DeviceNotifyBusReset;
+        message.length  = 0U;
         message.isSetup = 0U;
 
         USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
@@ -804,8 +778,7 @@ static void USB_DeviceEhciInterruptReset(usb_device_ehci_state_struct_t *ehciSta
  *
  */
 static void USB_DeviceEhciInterruptSof(usb_device_ehci_state_struct_t *ehciState)
-{
-}
+{}
 
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
 /*!
@@ -819,18 +792,17 @@ static void USB_DeviceEhciInterruptSof(usb_device_ehci_state_struct_t *ehciState
 static void USB_DeviceEhciInterruptSuspend(usb_device_ehci_state_struct_t *ehciState)
 {
     /* If the port is in suspend state, notify the up layer */
-    if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SUSP_MASK)
-    {
+    if (ehciState->registerBase->PORTSC1 & USBHS_PORTSC1_SUSP_MASK) {
 #if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
 #else
         if (ehciState->registerPhyBase->USB1_VBUS_DET_STAT & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)
 #endif
         {
             usb_device_callback_message_struct_t message;
-            message.buffer = (uint8_t *)NULL;
-            message.length = 0U;
+            message.buffer  = (uint8_t *)NULL;
+            message.length  = 0U;
             message.isSetup = 0U;
-            message.code = kUSB_DeviceNotifySuspend;
+            message.code    = kUSB_DeviceNotifySuspend;
             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
         }
     }
@@ -849,59 +821,56 @@ static void USB_DeviceEhciInterruptSuspend(usb_device_ehci_state_struct_t *ehciS
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciState, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
+static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciState,
+                                           uint8_t endpointAddress,
+                                           uint8_t *buffer,
+                                           uint32_t length)
 {
     usb_device_ehci_dtd_struct_t *dtd;
     usb_device_ehci_dtd_struct_t *dtdHard;
     uint32_t index = ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) << 1U) |
-                     ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT);
-    uint32_t primeBit = 1U << ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) + ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
+                     ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                      USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT);
+    uint32_t primeBit = 1U << ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) +
+                               ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
     uint32_t epStatus = primeBit;
     uint32_t sendLength;
-    uint32_t currentIndex = 0U;
-    uint32_t dtdRequestCount = (length + USB_DEVICE_ECHI_DTD_TOTAL_BYTES - 1U) / USB_DEVICE_ECHI_DTD_TOTAL_BYTES;
-    uint8_t qhIdle = 0U;
+    uint32_t currentIndex       = 0U;
+    uint32_t dtdRequestCount    = (length + USB_DEVICE_ECHI_DTD_TOTAL_BYTES - 1U) / USB_DEVICE_ECHI_DTD_TOTAL_BYTES;
+    uint8_t qhIdle              = 0U;
     uint8_t waitingSafelyAccess = 1U;
-    uint32_t primeTimesCount = 0U;
+    uint32_t primeTimesCount    = 0U;
     USB_OSA_SR_ALLOC();
 
-    if (!ehciState)
-    {
+    if (!ehciState) {
         return kStatus_USB_InvalidHandle;
     }
 
-    if (0U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.isOpened)
-    {
+    if (0U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.isOpened) {
         return kStatus_USB_Error;
     }
     /* Return error when ehci is doing reset */
-    if (ehciState->isResetting)
-    {
+    if (ehciState->isResetting) {
         return kStatus_USB_Error;
     }
 
-    if (!dtdRequestCount)
-    {
+    if (!dtdRequestCount) {
         dtdRequestCount = 1U;
     }
 
     USB_OSA_ENTER_CRITICAL();
     /* The free dtd count need to not less than the transfer requests. */
-    if (dtdRequestCount > (uint32_t)ehciState->dtdCount)
-    {
+    if (dtdRequestCount > (uint32_t)ehciState->dtdCount) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_Busy;
     }
 
-    do
-    {
+    do {
         /* The transfer length need to not more than USB_DEVICE_ECHI_DTD_TOTAL_BYTES for each dtd. */
-        if (length > USB_DEVICE_ECHI_DTD_TOTAL_BYTES)
-        {
+        if (length > USB_DEVICE_ECHI_DTD_TOTAL_BYTES) {
             sendLength = USB_DEVICE_ECHI_DTD_TOTAL_BYTES;
         }
-        else
-        {
+        else {
             sendLength = length;
         }
         length -= sendLength;
@@ -913,16 +882,16 @@ static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciS
         ehciState->dtdCount--;
 
         /* Save the dtd head when current active buffer offset is zero. */
-        if (!currentIndex)
-        {
+        if (!currentIndex) {
             dtdHard = dtd;
         }
 
         /* Set the dtd field */
-        dtd->nextDtdPointer = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
+        dtd->nextDtdPointer         = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
         dtd->dtdTokenUnion.dtdToken = 0U;
-        dtd->bufferPointerPage[0] = (uint32_t)(buffer + currentIndex);
-        dtd->bufferPointerPage[1] = (dtd->bufferPointerPage[0] + USB_DEVICE_ECHI_DTD_PAGE_BLOCK) & USB_DEVICE_ECHI_DTD_PAGE_MASK;
+        dtd->bufferPointerPage[0]   = (uint32_t)(buffer + currentIndex);
+        dtd->bufferPointerPage[1] =
+            (dtd->bufferPointerPage[0] + USB_DEVICE_ECHI_DTD_PAGE_BLOCK) & USB_DEVICE_ECHI_DTD_PAGE_MASK;
         dtd->bufferPointerPage[2] = dtd->bufferPointerPage[1] + USB_DEVICE_ECHI_DTD_PAGE_BLOCK;
         dtd->bufferPointerPage[3] = dtd->bufferPointerPage[2] + USB_DEVICE_ECHI_DTD_PAGE_BLOCK;
         dtd->bufferPointerPage[4] = dtd->bufferPointerPage[3] + USB_DEVICE_ECHI_DTD_PAGE_BLOCK;
@@ -932,12 +901,12 @@ static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciS
         /* Save the data length needed to be transferred. */
         dtd->reservedUnion.originalBufferInfo.originalBufferLength = sendLength;
         /* Save the original buffer address */
-        dtd->reservedUnion.originalBufferInfo.originalBufferOffest = dtd->bufferPointerPage[0] & USB_DEVICE_ECHI_DTD_PAGE_OFFSET_MASK;
+        dtd->reservedUnion.originalBufferInfo.originalBufferOffest =
+            dtd->bufferPointerPage[0] & USB_DEVICE_ECHI_DTD_PAGE_OFFSET_MASK;
         dtd->reservedUnion.originalBufferInfo.dtdInvalid = 0U;
 
         /* Set the IOC field in last dtd. */
-        if (!length)
-        {
+        if (!length) {
             dtd->dtdTokenUnion.dtdTokenBitmap.ioc = 1U;
         }
 
@@ -948,54 +917,48 @@ static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciS
         currentIndex += sendLength;
 
         /* Add dtd to the in-used dtd queue */
-        if (ehciState->dtdTail[index])
-        {
+        if (ehciState->dtdTail[index]) {
             ehciState->dtdTail[index]->nextDtdPointer = (uint32_t)dtd;
-            ehciState->dtdTail[index] = dtd;
+            ehciState->dtdTail[index]                 = dtd;
         }
-        else
-        {
+        else {
             ehciState->dtdHard[index] = dtd;
             ehciState->dtdTail[index] = dtd;
-            qhIdle = 1U;
+            qhIdle                    = 1U;
         }
     } while (length);
     if ((USB_CONTROL_ENDPOINT == (endpointAddress & USB_ENDPOINT_NUMBER_MASK)) &&
-        (USB_IN == ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT)))
-    {
+        (USB_IN == ((endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                    USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT))) {
         uint8_t setupindex = ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) * 2U);
         /* Get last setup packet */
         usb_setup_struct_t *deviceSetup = (usb_setup_struct_t *)&ehciState->qh[setupindex].setupBufferBack[0];
-        if (1U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.zlt)
-        {
+        if (1U == ehciState->qh[index].endpointStatusUnion.endpointStatusBitmap.zlt) {
             if ((sendLength) && (sendLength < deviceSetup->wLength) &&
-                (!(sendLength % ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize)))
-            {
+                (!(sendLength %
+                   ehciState->qh[index]
+                       .capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.maxPacketSize))) {
                 /* enable ZLT. */
                 ehciState->qh[index].capabilttiesCharacteristicsUnion.capabilttiesCharacteristicsBitmap.zlt = 0U;
             }
         }
     }
     /* If the QH is not empty */
-    if (!qhIdle)
-    {
+    if (!qhIdle) {
         /* If the prime bit is set, nothing need to do. */
-        if (ehciState->registerBase->EPPRIME & primeBit)
-        {
+        if (ehciState->registerBase->EPPRIME & primeBit) {
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
         }
 
         /* To safely a dtd */
-        while (waitingSafelyAccess)
-        {
+        while (waitingSafelyAccess) {
             /* set the ATDTW flag to USBHS_USBCMD_REG. */
             ehciState->registerBase->USBCMD |= USBHS_USBCMD_ATDTW_MASK;
             /* Read EPSR */
             epStatus = ehciState->registerBase->EPSR;
             /* Wait the ATDTW bit set */
-            if (ehciState->registerBase->USBCMD & USBHS_USBCMD_ATDTW_MASK)
-            {
+            if (ehciState->registerBase->USBCMD & USBHS_USBCMD_ATDTW_MASK) {
                 waitingSafelyAccess = 0U;
             }
         }
@@ -1005,25 +968,20 @@ static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciS
 
     /* If QH is empty or the endpoint is not primed, need to link current dtd head to the QH. */
     /* When the endpoint is not primed if qhIdle is zero, it means the QH is empty. */
-    if ((qhIdle) || (!(epStatus & primeBit)))
-    {
-        ehciState->qh[index].nextDtdPointer = (uint32_t)dtdHard;
+    if ((qhIdle) || (!(epStatus & primeBit))) {
+        ehciState->qh[index].nextDtdPointer         = (uint32_t)dtdHard;
         ehciState->qh[index].dtdTokenUnion.dtdToken = 0U;
-        ehciState->registerBase->EPPRIME = primeBit;
-        while (!(ehciState->registerBase->EPSR & primeBit))
-        {
+        ehciState->registerBase->EPPRIME            = primeBit;
+        while (!(ehciState->registerBase->EPSR & primeBit)) {
             primeTimesCount++;
-            if (primeTimesCount == USB_DEVICE_MAX_TRANSFER_PRIME_TIMES)
-            {
+            if (primeTimesCount == USB_DEVICE_MAX_TRANSFER_PRIME_TIMES) {
                 USB_OSA_EXIT_CRITICAL();
                 return kStatus_USB_Error;
             }
-            if (ehciState->registerBase->EPCOMPLETE & primeBit)
-            {
+            if (ehciState->registerBase->EPCOMPLETE & primeBit) {
                 break;
             }
-            else
-            {
+            else {
                 ehciState->registerBase->EPPRIME = primeBit;
             }
         }
@@ -1044,12 +1002,10 @@ static usb_status_t USB_DeviceEhciTransfer(usb_device_ehci_state_struct_t *ehciS
  */
 void *USB_EhciGetValidEhciState(uint8_t *instanceIndex)
 {
-    for (uint8_t instance = 0; instance < USB_DEVICE_CONFIG_EHCI; instance++)
-    {
-        if (!g_UsbDeviceEhciStateStatus[instance])
-        {
+    for (uint8_t instance = 0; instance < USB_DEVICE_CONFIG_EHCI; instance++) {
+        if (!g_UsbDeviceEhciStateStatus[instance]) {
             g_UsbDeviceEhciStateStatus[instance] = 1;
-            *instanceIndex = instance;
+            *instanceIndex                       = instance;
             return &g_UsbDeviceEhciState[instance];
         }
     }
@@ -1067,28 +1023,30 @@ void *USB_EhciGetValidEhciState(uint8_t *instanceIndex)
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceEhciInit(uint8_t controllerId, usb_device_handle handle, usb_device_controller_handle *ehciHandle)
+usb_status_t USB_DeviceEhciInit(uint8_t controllerId,
+                                usb_device_handle handle,
+                                usb_device_controller_handle *ehciHandle)
 {
     usb_device_ehci_state_struct_t *ehciState;
     uint32_t ehci_base[] = USBHS_BASE_ADDRS;
     uint8_t intanceIndex;
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
     usb_device_dcd_state_struct_t *dcdHSState;
     uint32_t dcd_base[] = USBHSDCD_BASE_ADDRS;
     usb_device_callback_message_struct_t message;
 #endif
 
-    if ((controllerId < kUSB_ControllerEhci0) || ((uint32_t)(controllerId - kUSB_ControllerEhci0) >= (sizeof(ehci_base) / sizeof(uint32_t))))
-    {
+    if ((controllerId < kUSB_ControllerEhci0) ||
+        ((uint32_t)(controllerId - kUSB_ControllerEhci0) >= (sizeof(ehci_base) / sizeof(uint32_t)))) {
         return kStatus_USB_ControllerNotFound;
     }
 
     ehciState = USB_EhciGetValidEhciState(&intanceIndex);
 
     ehciState->dtd = s_UsbDeviceEhciDtd[intanceIndex];
-    ehciState->qh = (usb_device_ehci_qh_struct_t *)&qh_buffer[intanceIndex * 2048];
+    ehciState->qh  = (usb_device_ehci_qh_struct_t *)&qh_buffer[intanceIndex * 2048];
 
     ehciState->controllerId = controllerId;
 
@@ -1103,10 +1061,10 @@ usb_status_t USB_DeviceEhciInit(uint8_t controllerId, usb_device_handle handle,
 #endif
 
     /* Get the HW's endpoint count */
-    ehciState->endpointCount = (uint8_t)((ehciState->registerBase->DCCPARAMS & USBHS_DCCPARAMS_DEN_MASK) >> USBHS_DCCPARAMS_DEN_SHIFT);
+    ehciState->endpointCount =
+        (uint8_t)((ehciState->registerBase->DCCPARAMS & USBHS_DCCPARAMS_DEN_MASK) >> USBHS_DCCPARAMS_DEN_SHIFT);
 
-    if (ehciState->endpointCount < USB_DEVICE_CONFIG_ENDPOINTS)
-    {
+    if (ehciState->endpointCount < USB_DEVICE_CONFIG_ENDPOINTS) {
         return kStatus_USB_Error;
     }
     ehciState->deviceHandle = (usb_device_struct_t *)handle;
@@ -1118,7 +1076,7 @@ usb_status_t USB_DeviceEhciInit(uint8_t controllerId, usb_device_handle handle,
     /* Set the EHCI to default status. */
     USB_DeviceEhciSetDefaultState(ehciState);
     *ehciHandle = (usb_device_controller_handle)ehciState;
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
     dcdHSState = &s_UsbDeviceDcdHSState[controllerId - kUSB_ControllerEhci0];
 
@@ -1128,11 +1086,10 @@ usb_status_t USB_DeviceEhciInit(uint8_t controllerId, usb_device_handle handle,
 
     dcdHSState->deviceHandle = (usb_device_struct_t *)handle;
 
-    message.buffer = (uint8_t *)NULL;
-    message.length = 0U;
+    message.buffer  = (uint8_t *)NULL;
+    message.length  = 0U;
     message.isSetup = 0U;
-    if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSV_MASK)
-    {
+    if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSV_MASK) {
         /* Device is connected to a host. */
         message.code = kUSB_DeviceNotifyAttach;
         USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
@@ -1155,14 +1112,11 @@ usb_status_t USB_DeviceEhciDeinit(usb_device_controller_handle ehciHandle)
 {
     usb_device_ehci_state_struct_t *ehciState = (usb_device_ehci_state_struct_t *)ehciHandle;
 
-    if (!ehciHandle)
-    {
+    if (!ehciHandle) {
         return kStatus_USB_InvalidHandle;
     }
-    for (uint8_t instance = 0; instance < USB_DEVICE_CONFIG_EHCI; instance++)
-    {
-        if (ehciState == &g_UsbDeviceEhciState[instance])
-        {
+    for (uint8_t instance = 0; instance < USB_DEVICE_CONFIG_EHCI; instance++) {
+        if (ehciState == &g_UsbDeviceEhciState[instance]) {
             g_UsbDeviceEhciStateStatus[instance] = 0;
         }
     }
@@ -1197,11 +1151,17 @@ usb_status_t USB_DeviceEhciDeinit(usb_device_controller_handle ehciHandle)
  * The subsequent transfer could begin only when the previous transfer is done (get notification through the endpoint
  * callback).
  */
-usb_status_t USB_DeviceEhciSend(usb_device_controller_handle ehciHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
+usb_status_t USB_DeviceEhciSend(usb_device_controller_handle ehciHandle,
+                                uint8_t endpointAddress,
+                                uint8_t *buffer,
+                                uint32_t length)
 {
     /* Add dtd to the QH */
     return USB_DeviceEhciTransfer((usb_device_ehci_state_struct_t *)ehciHandle,
-                                  (endpointAddress & USB_ENDPOINT_NUMBER_MASK) | (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT), buffer, length);
+                                  (endpointAddress & USB_ENDPOINT_NUMBER_MASK) |
+                                      (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT),
+                                  buffer,
+                                  length);
 }
 
 /*!
@@ -1224,11 +1184,17 @@ usb_status_t USB_DeviceEhciSend(usb_device_controller_handle ehciHandle, uint8_t
  * The subsequent transfer could begin only when the previous transfer is done (get notification through the endpoint
  * callback).
  */
-usb_status_t USB_DeviceEhciRecv(usb_device_controller_handle ehciHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
+usb_status_t USB_DeviceEhciRecv(usb_device_controller_handle ehciHandle,
+                                uint8_t endpointAddress,
+                                uint8_t *buffer,
+                                uint32_t length)
 {
     /* Add dtd to the QH */
     return USB_DeviceEhciTransfer((usb_device_ehci_state_struct_t *)ehciHandle,
-                                  (endpointAddress & USB_ENDPOINT_NUMBER_MASK) | (USB_OUT << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT), buffer, length);
+                                  (endpointAddress & USB_ENDPOINT_NUMBER_MASK) |
+                                      (USB_OUT << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT),
+                                  buffer,
+                                  length);
 }
 
 /*!
@@ -1246,13 +1212,14 @@ usb_status_t USB_DeviceEhciCancel(usb_device_controller_handle ehciHandle, uint8
     usb_device_ehci_state_struct_t *ehciState = (usb_device_ehci_state_struct_t *)ehciHandle;
     usb_device_callback_message_struct_t message;
     usb_device_ehci_dtd_struct_t *currentDtd;
-    uint32_t primeBit = 1U << ((ep & USB_ENDPOINT_NUMBER_MASK) + ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
-    uint8_t index = ((ep & USB_ENDPOINT_NUMBER_MASK) << 1U) | ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x07U);
+    uint32_t primeBit =
+        1U << ((ep & USB_ENDPOINT_NUMBER_MASK) + ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x03U));
+    uint8_t index =
+        ((ep & USB_ENDPOINT_NUMBER_MASK) << 1U) | ((ep & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> 0x07U);
 
     USB_OSA_SR_ALLOC();
 
-    if (!ehciHandle)
-    {
+    if (!ehciHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
@@ -1262,29 +1229,25 @@ usb_status_t USB_DeviceEhciCancel(usb_device_controller_handle ehciHandle, uint8
     message.length = USB_UNINITIALIZED_VAL_32;
 
     /* Get the first dtd */
-    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+    currentDtd =
+        (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
 
-    while (currentDtd)
-    {
+    while (currentDtd) {
         currentDtd->reservedUnion.originalBufferInfo.dtdInvalid = 1U;
         currentDtd = (usb_device_ehci_dtd_struct_t *)(currentDtd->nextDtdPointer & USB_DEVICE_ECHI_DTD_POINTER_MASK);
     }
 
     /* Get the first dtd */
-    currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
-    while (currentDtd)
-    {
-        if (!currentDtd->reservedUnion.originalBufferInfo.dtdInvalid)
-        {
+    currentDtd =
+        (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+    while (currentDtd) {
+        if (!currentDtd->reservedUnion.originalBufferInfo.dtdInvalid) {
             break;
         }
-        else
-        {
-            if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE)
-            {
+        else {
+            if (currentDtd->dtdTokenUnion.dtdTokenBitmap.status & USB_DEVICE_ECHI_DTD_STATUS_ACTIVE) {
                 /* Flush the endpoint to stop a transfer. */
-                do
-                {
+                do {
                     /* Set the corresponding bit(s) in the EPFLUSH register */
                     ehciState->registerBase->EPFLUSH |= primeBit;
 
@@ -1299,27 +1262,24 @@ usb_status_t USB_DeviceEhciCancel(usb_device_controller_handle ehciHandle, uint8
             }
 
             /* Save the original buffer address. */
-            if (NULL == message.buffer)
-            {
+            if (NULL == message.buffer) {
                 message.buffer = (uint8_t *)((currentDtd->bufferPointerPage[0] & USB_DEVICE_ECHI_DTD_PAGE_MASK) |
                                              (currentDtd->reservedUnion.originalBufferInfo.originalBufferOffest));
             }
 
             /* Remove the dtd from the dtd in-used queue. */
-            if (ehciState->dtdHard[index] == ehciState->dtdTail[index])
-            {
+            if (ehciState->dtdHard[index] == ehciState->dtdTail[index]) {
                 ehciState->dtdHard[index] = NULL;
                 ehciState->dtdTail[index] = NULL;
             }
-            else
-            {
+            else {
                 ehciState->dtdHard[index] = (usb_device_ehci_dtd_struct_t *)ehciState->dtdHard[index]->nextDtdPointer;
             }
 
             /* When the ioc is set or the dtd queue is empty, the up layer will be notified. */
-            if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) || (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK)))
-            {
-                message.code = ep;
+            if ((currentDtd->dtdTokenUnion.dtdTokenBitmap.ioc) ||
+                (0 == ((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK))) {
+                message.code    = ep;
                 message.isSetup = 0U;
                 USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
                 message.buffer = NULL;
@@ -1328,16 +1288,16 @@ usb_status_t USB_DeviceEhciCancel(usb_device_controller_handle ehciHandle, uint8
             currentDtd->dtdTokenUnion.dtdToken = 0U;
             /* Save the dtd to the free queue. */
             currentDtd->nextDtdPointer = (uint32_t)ehciState->dtdFree;
-            ehciState->dtdFree = currentDtd;
+            ehciState->dtdFree         = currentDtd;
             ehciState->dtdCount++;
         }
         /* Get the next dtd. */
-        currentDtd = (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
+        currentDtd =
+            (usb_device_ehci_dtd_struct_t *)((uint32_t)ehciState->dtdHard[index] & USB_DEVICE_ECHI_DTD_POINTER_MASK);
     }
-    if (!currentDtd)
-    {
+    if (!currentDtd) {
         /* Set the QH to empty. */
-        ehciState->qh[index].nextDtdPointer = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
+        ehciState->qh[index].nextDtdPointer         = USB_DEVICE_ECHI_DTD_TERMINATE_MASK;
         ehciState->qh[index].dtdTokenUnion.dtdToken = 0U;
     }
     USB_OSA_EXIT_CRITICAL();
@@ -1358,13 +1318,14 @@ usb_status_t USB_DeviceEhciCancel(usb_device_controller_handle ehciHandle, uint8
 usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_device_control_type_t type, void *param)
 {
     usb_device_ehci_state_struct_t *ehciState = (usb_device_ehci_state_struct_t *)ehciHandle;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                        = kStatus_USB_Error;
     uint16_t *temp16;
     uint8_t *temp8;
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
     usb_device_dcd_state_struct_t *dcdHSState;
-    dcdHSState = &s_UsbDeviceDcdHSState[ehciState->controllerId - kUSB_ControllerEhci0]; /*The hard code should be replaced*/
+    dcdHSState =
+        &s_UsbDeviceDcdHSState[ehciState->controllerId - kUSB_ControllerEhci0]; /*The hard code should be replaced*/
     usb_device_dcd_charging_time_t *deviceDcdTimingConfig = (usb_device_dcd_charging_time_t *)param;
 #endif
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
@@ -1372,8 +1333,7 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
     uint64_t startTick;
 #endif
 
-    if (!ehciHandle)
-    {
+    if (!ehciHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
@@ -1381,8 +1341,7 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
     deviceHandle = (usb_device_struct_t *)ehciState->deviceHandle;
 #endif
 
-    switch (type)
-    {
+    switch (type) {
     case kUSB_DeviceControlRun:
         ehciState->registerBase->USBCMD |= USBHS_USBCMD_RS_MASK;
         error = kStatus_USB_Success;
@@ -1392,36 +1351,31 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         error = kStatus_USB_Success;
         break;
     case kUSB_DeviceControlEndpointInit:
-        if (param)
-        {
+        if (param) {
             error = USB_DeviceEhciEndpointInit(ehciState, (usb_device_endpoint_init_struct_t *)param);
         }
         break;
     case kUSB_DeviceControlEndpointDeinit:
-        if (param)
-        {
+        if (param) {
             temp8 = (uint8_t *)param;
             error = USB_DeviceEhciEndpointDeinit(ehciState, *temp8);
         }
         break;
     case kUSB_DeviceControlEndpointStall:
-        if (param)
-        {
+        if (param) {
             temp8 = (uint8_t *)param;
             error = USB_DeviceEhciEndpointStall(ehciState, *temp8);
         }
         break;
     case kUSB_DeviceControlEndpointUnstall:
-        if (param)
-        {
+        if (param) {
             temp8 = (uint8_t *)param;
             error = USB_DeviceEhciEndpointUnstall(ehciState, *temp8);
         }
         break;
     case kUSB_DeviceControlGetDeviceStatus:
-        if (param)
-        {
-            temp16 = (uint16_t *)param;
+        if (param) {
+            temp16  = (uint16_t *)param;
             *temp16 = (USB_DEVICE_CONFIG_SELF_POWER << (USB_REQUEST_STANDARD_GET_STATUS_DEVICE_SELF_POWERED_SHIFT))
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
                       | (deviceHandle->remotewakeup << (USB_REQUEST_STANDARD_GET_STATUS_DEVICE_REMOTE_WARKUP_SHIFT))
@@ -1431,37 +1385,34 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         }
         break;
     case kUSB_DeviceControlGetEndpointStatus:
-        if (param)
-        {
+        if (param) {
             usb_device_endpoint_status_struct_t *endpointStatus = (usb_device_endpoint_status_struct_t *)param;
-            uint8_t ep = (endpointStatus->endpointAddress) & USB_ENDPOINT_NUMBER_MASK;
-            uint8_t direction =
-                ((endpointStatus->endpointAddress) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+            uint8_t ep        = (endpointStatus->endpointAddress) & USB_ENDPOINT_NUMBER_MASK;
+            uint8_t direction = ((endpointStatus->endpointAddress) & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                                USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
 
-            if (ep < USB_DEVICE_CONFIG_ENDPOINTS)
-            {
-                if (ep)
-                {
-                    endpointStatus->endpointStatus = (ehciState->registerBase->EPCR[ep - 1U] & (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK))
+            if (ep < USB_DEVICE_CONFIG_ENDPOINTS) {
+                if (ep) {
+                    endpointStatus->endpointStatus = (ehciState->registerBase->EPCR[ep - 1U] &
+                                                      (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK))
                                                          ? kUSB_DeviceEndpointStateStalled
                                                          : kUSB_DeviceEndpointStateIdle;
                 }
-                else
-                {
-                    endpointStatus->endpointStatus = (ehciState->registerBase->EPCR0 & (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK))
-                                                         ? kUSB_DeviceEndpointStateStalled
-                                                         : kUSB_DeviceEndpointStateIdle;
+                else {
+                    endpointStatus->endpointStatus =
+                        (ehciState->registerBase->EPCR0 & (direction ? USBHS_EPCR_TXS_MASK : USBHS_EPCR_RXS_MASK))
+                            ? kUSB_DeviceEndpointStateStalled
+                            : kUSB_DeviceEndpointStateIdle;
                 }
                 error = kStatus_USB_Success;
             }
         }
         break;
     case kUSB_DeviceControlSetDeviceAddress:
-        if (param)
-        {
-            temp8 = (uint8_t *)param;
+        if (param) {
+            temp8                               = (uint8_t *)param;
             ehciState->registerBase->DEVICEADDR = (((uint32_t)(*temp8)) << USBHS_DEVICEADDR_USBADR_SHIFT);
-            error = kStatus_USB_Success;
+            error                               = kStatus_USB_Success;
         }
         break;
     case kUSB_DeviceControlGetSynchFrame:
@@ -1477,8 +1428,7 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_PHCD_MASK;
         ehciState->registerBase->PORTSC1 |= USBHS_PORTSC1_FPR_MASK;
         startTick = deviceHandle->hwTick;
-        while ((deviceHandle->hwTick - startTick) < 10)
-        {
+        while ((deviceHandle->hwTick - startTick) < 10) {
             __ASM("nop");
         }
         ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_FPR_MASK;
@@ -1489,30 +1439,29 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         ehciState->registerBase->OTGSC |= 0x007F0000U;
         ehciState->registerPhyBase->PWD = 0xFFFFFFFF;
         /* ehciState->registerBase->OTGCTL |= ((1U<<10) | (1U<<17) | (1U<<16)); */
-        while (ehciState->registerPhyBase->CTRL & (USBPHY_CTRL_UTMI_SUSPENDM_MASK))
-        {
+        while (ehciState->registerPhyBase->CTRL & (USBPHY_CTRL_UTMI_SUSPENDM_MASK)) {
             __ASM("nop");
         }
         /* ehciState->registerPhyBase->CTRL |= ((1U << 21) | (1U << 22) | (1U << 23)); */
         ehciState->registerBase->USBSTS |= USBHS_USBSTS_SRI_MASK;
         ehciState->registerBase->PORTSC1 |= USBHS_PORTSC1_PHCD_MASK;
 #if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
-        ehciState->registerPhyBase->CTRL |=
-            USBPHY_CTRL_ENVBUSCHG_WKUP_MASK | USBPHY_CTRL_ENIDCHG_WKUP_MASK | USBPHY_CTRL_ENDPDMCHG_WKUP_MASK | USBPHY_CTRL_ENIRQRESUMEDETECT_MASK;
-        ehciState->registerNcBase->USB_OTGn_CTRL |=
-            USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK | USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK | USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK;
+        ehciState->registerPhyBase->CTRL |= USBPHY_CTRL_ENVBUSCHG_WKUP_MASK | USBPHY_CTRL_ENIDCHG_WKUP_MASK |
+                                            USBPHY_CTRL_ENDPDMCHG_WKUP_MASK | USBPHY_CTRL_ENIRQRESUMEDETECT_MASK;
+        ehciState->registerNcBase->USB_OTGn_CTRL |= USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK |
+                                                    USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK |
+                                                    USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK;
         ehciState->registerNcBase->USB_OTGn_CTRL |= USBNC_USB_OTGn_CTRL_WIE_MASK;
 #else
         ehciState->registerBase->USBGENCTRL = USBHS_USBGENCTRL_WU_IE_MASK;
 #endif
         ehciState->registerPhyBase->CTRL |= USBPHY_CTRL_CLKGATE_MASK;
         ehciState->isSuspending = 1U;
-        error = kStatus_USB_Success;
+        error                   = kStatus_USB_Success;
         break;
 #endif /* USB_DEVICE_CONFIG_LOW_POWER_MODE */
     case kUSB_DeviceControlSetDefaultStatus:
-        for (uint8_t count = 0U; count < USB_DEVICE_CONFIG_ENDPOINTS; count++)
-        {
+        for (uint8_t count = 0U; count < USB_DEVICE_CONFIG_ENDPOINTS; count++) {
             USB_DeviceEhciEndpointDeinit(ehciState, (count | (USB_IN << 0x07U)));
             USB_DeviceEhciEndpointDeinit(ehciState, (count | (USB_OUT << 0x07U)));
         }
@@ -1520,11 +1469,10 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         error = kStatus_USB_Success;
         break;
     case kUSB_DeviceControlGetSpeed:
-        if (param)
-        {
-            temp8 = (uint8_t *)param;
+        if (param) {
+            temp8  = (uint8_t *)param;
             *temp8 = ehciState->speed;
-            error = kStatus_USB_Success;
+            error  = kStatus_USB_Success;
         }
         break;
     case kUSB_DeviceControlGetOtgStatus:
@@ -1533,23 +1481,24 @@ usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_
         break;
 #if (defined(USB_DEVICE_CONFIG_USB20_TEST_MODE) && (USB_DEVICE_CONFIG_USB20_TEST_MODE > 0U))
     case kUSB_DeviceControlSetTestMode:
-        if (param)
-        {
+        if (param) {
             temp8 = (uint8_t *)param;
             ehciState->registerBase->PORTSC1 |= ((uint32_t)(*temp8) << 16U);
             error = kStatus_USB_Success;
         }
         break;
 #endif
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
     case kUSB_DeviceControlDcdInitModule:
         dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
         dcdHSState->dcdRegisterBase->TIMER0 = USBDCD_TIMER0_TSEQ_INIT(deviceDcdTimingConfig->dcdSeqInitTime);
         dcdHSState->dcdRegisterBase->TIMER1 = USBDCD_TIMER1_TDCD_DBNC(deviceDcdTimingConfig->dcdDbncTime);
         dcdHSState->dcdRegisterBase->TIMER1 |= USBDCD_TIMER1_TVDPSRC_ON(deviceDcdTimingConfig->dcdDpSrcOnTime);
-        dcdHSState->dcdRegisterBase->TIMER2_BC12 = USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(deviceDcdTimingConfig->dcdTimeWaitAfterPrD);
-        dcdHSState->dcdRegisterBase->TIMER2_BC12 |= USBDCD_TIMER2_BC12_TVDMSRC_ON(deviceDcdTimingConfig->dcdTimeDMSrcOn);
+        dcdHSState->dcdRegisterBase->TIMER2_BC12 =
+            USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(deviceDcdTimingConfig->dcdTimeWaitAfterPrD);
+        dcdHSState->dcdRegisterBase->TIMER2_BC12 |=
+            USBDCD_TIMER2_BC12_TVDMSRC_ON(deviceDcdTimingConfig->dcdTimeDMSrcOn);
         dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_IE_MASK;
         dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_BC12_MASK;
         dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_START_MASK;
@@ -1580,8 +1529,7 @@ void USB_DeviceEhciIsrFunction(void *deviceHandle)
     usb_device_ehci_state_struct_t *ehciState;
     uint32_t status;
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return;
     }
 
@@ -1591,54 +1539,45 @@ void USB_DeviceEhciIsrFunction(void *deviceHandle)
 
 #if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
 
-    if (ehciState->registerNcBase->USB_OTGn_CTRL & USBNC_USB_OTGn_CTRL_WIE_MASK)
-    {
-        if (ehciState->registerNcBase->USB_OTGn_CTRL & USBNC_USB_OTGn_CTRL_WIR_MASK)
-        {
+    if (ehciState->registerNcBase->USB_OTGn_CTRL & USBNC_USB_OTGn_CTRL_WIE_MASK) {
+        if (ehciState->registerNcBase->USB_OTGn_CTRL & USBNC_USB_OTGn_CTRL_WIR_MASK) {
             ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_PHCD_MASK;
             ehciState->registerNcBase->USB_OTGn_CTRL &= ~USBNC_USB_OTGn_CTRL_WIE_MASK;
         }
     }
-    else
-    {
+    else {
     }
 
 #else
-    if (ehciState->registerBase->USBGENCTRL & USBHS_USBGENCTRL_WU_IE_MASK)
-    {
-        if (ehciState->registerBase->USBGENCTRL & (1U << 8))
-        {
+    if (ehciState->registerBase->USBGENCTRL & USBHS_USBGENCTRL_WU_IE_MASK) {
+        if (ehciState->registerBase->USBGENCTRL & (1U << 8)) {
             ehciState->registerBase->USBGENCTRL &= ~(1U << 8);
             ehciState->registerBase->USBGENCTRL |= USBHS_USBGENCTRL_WU_INT_CLR_MASK;
             ehciState->registerBase->PORTSC1 &= ~USBHS_PORTSC1_PHCD_MASK;
             ehciState->registerBase->USBGENCTRL &= ~USBHS_USBGENCTRL_WU_IE_MASK;
         }
     }
-    else
-    {
+    else {
     }
 #endif
 
 #endif
 
 #if defined(USB_DEVICE_CONFIG_DETACH_ENABLE) && (USB_DEVICE_CONFIG_DETACH_ENABLE > 0U)
-    if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSVIS_MASK)
-    {
+    if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSVIS_MASK) {
         usb_device_callback_message_struct_t message;
 
         ehciState->registerBase->OTGSC |= USBHS_OTGSC_BSVIS_MASK;
 
-        message.buffer = (uint8_t *)NULL;
-        message.length = 0U;
+        message.buffer  = (uint8_t *)NULL;
+        message.length  = 0U;
         message.isSetup = 0U;
-        if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSV_MASK)
-        {
+        if (ehciState->registerBase->OTGSC & USBHS_OTGSC_BSV_MASK) {
             /* Device is connected to a host. */
             message.code = kUSB_DeviceNotifyAttach;
             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
         }
-        else
-        {
+        else {
             /* Device is disconnected from a host. */
             message.code = kUSB_DeviceNotifyDetach;
             USB_DeviceNotificationTrigger(ehciState->deviceHandle, &message);
@@ -1652,47 +1591,41 @@ void USB_DeviceEhciIsrFunction(void *deviceHandle)
     ehciState->registerBase->USBSTS = status;
 
 #if defined(USB_DEVICE_CONFIG_ERROR_HANDLING) && (USB_DEVICE_CONFIG_ERROR_HANDLING > 0U)
-    if (status & USBHS_USBSTS_UEI_MASK)
-    {
+    if (status & USBHS_USBSTS_UEI_MASK) {
         /* Error interrupt */
         USB_DeviceEhciInterruptError(ehciState);
     }
 #endif /* USB_DEVICE_CONFIG_ERROR_HANDLING */
 
-    if (status & USBHS_USBSTS_URI_MASK)
-    {
+    if (status & USBHS_USBSTS_URI_MASK) {
         /* Reset interrupt */
         USB_DeviceEhciInterruptReset(ehciState);
     }
 
-    if (status & USBHS_USBSTS_UI_MASK)
-    {
+    if (status & USBHS_USBSTS_UI_MASK) {
         /* Token done interrupt */
         USB_DeviceEhciInterruptTokenDone(ehciState);
     }
 
-    if (status & USBHS_USBSTS_PCI_MASK)
-    {
+    if (status & USBHS_USBSTS_PCI_MASK) {
         /* Port status change interrupt */
         USB_DeviceEhciInterruptPortChange(ehciState);
     }
 
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
-    if (status & USBHS_USBSTS_SLI_MASK)
-    {
+    if (status & USBHS_USBSTS_SLI_MASK) {
         /* Suspend interrupt */
         USB_DeviceEhciInterruptSuspend(ehciState);
     }
 #endif /* USB_DEVICE_CONFIG_LOW_POWER_MODE */
 
-    if (status & USBHS_USBSTS_SRI_MASK)
-    {
+    if (status & USBHS_USBSTS_SRI_MASK) {
         /* Sof interrupt */
         USB_DeviceEhciInterruptSof(ehciState);
     }
 }
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
 void USB_DeviceDcdHSIsrFunction(void *deviceHandle)
 {
@@ -1703,8 +1636,7 @@ void USB_DeviceDcdHSIsrFunction(void *deviceHandle)
     uint32_t chargerType;
     usb_device_callback_message_struct_t message;
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return;
     }
 
@@ -1716,53 +1648,44 @@ void USB_DeviceDcdHSIsrFunction(void *deviceHandle)
 
     dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_IACK_MASK;
 
-    message.buffer = (uint8_t *)NULL;
-    message.length = 0U;
+    message.buffer  = (uint8_t *)NULL;
+    message.length  = 0U;
     message.isSetup = 0U;
 
-    if (status & USBDCD_STATUS_ERR_MASK)
-    {
-        if (status & USBDCD_STATUS_TO_MASK)
-        {
+    if (status & USBDCD_STATUS_ERR_MASK) {
+        if (status & USBDCD_STATUS_TO_MASK) {
             dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
             message.code = kUSB_DeviceNotifyDcdTimeOut;
             USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
         }
-        else
-        {
+        else {
             dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
             message.code = kUSB_DeviceNotifyDcdUnknownPortType;
             USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
         }
     }
-    else
-    {
-        switch (status & USBDCD_STATUS_SEQ_STAT_MASK)
-        {
+    else {
+        switch (status & USBDCD_STATUS_SEQ_STAT_MASK) {
         case USBDCD_STATUS_SEQ_STAT(kUSB_DcdChargingPortDetectionCompleted):
             chargerType = status & USBDCD_STATUS_SEQ_RES_MASK;
-            if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionStandardHost))
-            {
+            if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionStandardHost)) {
                 dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
                 message.code = kUSB_DeviceNotifySDPDetected;
                 USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
             }
-            else if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionChargingPort))
-            {
+            else if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionChargingPort)) {
                 message.code = kUSB_DeviceNotifyChargingPortDetected;
                 USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
             }
             break;
         case USBDCD_STATUS_SEQ_STAT(kUSB_DcdChargerTypeDetectionCompleted):
             chargerType = status & USBDCD_STATUS_SEQ_RES_MASK;
-            if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionChargingPort))
-            {
+            if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionChargingPort)) {
                 dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
                 message.code = kUSB_DeviceNotifyChargingHostDetected;
                 USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
             }
-            else if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionDedicatedCharger))
-            {
+            else if (chargerType == USBDCD_STATUS_SEQ_RES(kUSB_DcdDetectionDedicatedCharger)) {
                 dcdHSState->dcdRegisterBase->CONTROL |= USBDCD_CONTROL_SR_MASK;
                 message.code = kUSB_DeviceNotifyDedicatedChargerDetected;
                 USB_DeviceNotificationTrigger(dcdHSState->deviceHandle, &message);
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.h
index e4ff9baa3..072287281 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/ehci/usb_device_ehci.h
@@ -30,36 +30,38 @@
 /*! @brief The maximum value of control type maximum packet size for HS in USB specification 2.0 */
 #define USB_DEVICE_MAX_HS_CONTROL_MAX_PACKET_SIZE (64U)
 
-#define USB_DEVICE_MAX_TRANSFER_PRIME_TIMES (10000000U) /* The max prime times of EPPRIME, if still doesn't take effect, means status has been reset*/
+#define USB_DEVICE_MAX_TRANSFER_PRIME_TIMES                                                                            \
+    (10000000U) /* The max prime times of EPPRIME, if still doesn't take effect, means status has been reset*/
 
 /* Device QH */
-#define USB_DEVICE_EHCI_QH_POINTER_MASK (0xFFFFFFC0U)
-#define USB_DEVICE_EHCI_QH_MULT_MASK (0xC0000000U)
-#define USB_DEVICE_EHCI_QH_ZLT_MASK (0x20000000U)
+#define USB_DEVICE_EHCI_QH_POINTER_MASK         (0xFFFFFFC0U)
+#define USB_DEVICE_EHCI_QH_MULT_MASK            (0xC0000000U)
+#define USB_DEVICE_EHCI_QH_ZLT_MASK             (0x20000000U)
 #define USB_DEVICE_EHCI_QH_MAX_PACKET_SIZE_MASK (0x07FF0000U)
-#define USB_DEVICE_EHCI_QH_MAX_PACKET_SIZE (0x00000800U)
-#define USB_DEVICE_EHCI_QH_IOS_MASK (0x00008000U)
+#define USB_DEVICE_EHCI_QH_MAX_PACKET_SIZE      (0x00000800U)
+#define USB_DEVICE_EHCI_QH_IOS_MASK             (0x00008000U)
 
 /* Device DTD */
-#define USB_DEVICE_ECHI_DTD_POINTER_MASK (0xFFFFFFE0U)
-#define USB_DEVICE_ECHI_DTD_TERMINATE_MASK (0x00000001U)
-#define USB_DEVICE_ECHI_DTD_PAGE_MASK (0xFFFFF000U)
-#define USB_DEVICE_ECHI_DTD_PAGE_OFFSET_MASK (0x00000FFFU)
-#define USB_DEVICE_ECHI_DTD_PAGE_BLOCK (0x00001000U)
-#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES_MASK (0x7FFF0000U)
-#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES (0x00004000U)
-#define USB_DEVICE_ECHI_DTD_IOC_MASK (0x00008000U)
-#define USB_DEVICE_ECHI_DTD_MULTIO_MASK (0x00000C00U)
-#define USB_DEVICE_ECHI_DTD_STATUS_MASK (0x000000FFU)
-#define USB_DEVICE_EHCI_DTD_STATUS_ERROR_MASK (0x00000068U)
-#define USB_DEVICE_ECHI_DTD_STATUS_ACTIVE (0x00000080U)
-#define USB_DEVICE_ECHI_DTD_STATUS_HALTED (0x00000040U)
+#define USB_DEVICE_ECHI_DTD_POINTER_MASK             (0xFFFFFFE0U)
+#define USB_DEVICE_ECHI_DTD_TERMINATE_MASK           (0x00000001U)
+#define USB_DEVICE_ECHI_DTD_PAGE_MASK                (0xFFFFF000U)
+#define USB_DEVICE_ECHI_DTD_PAGE_OFFSET_MASK         (0x00000FFFU)
+#define USB_DEVICE_ECHI_DTD_PAGE_BLOCK               (0x00001000U)
+#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES_MASK         (0x7FFF0000U)
+#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES              (0x00004000U)
+#define USB_DEVICE_ECHI_DTD_IOC_MASK                 (0x00008000U)
+#define USB_DEVICE_ECHI_DTD_MULTIO_MASK              (0x00000C00U)
+#define USB_DEVICE_ECHI_DTD_STATUS_MASK              (0x000000FFU)
+#define USB_DEVICE_EHCI_DTD_STATUS_ERROR_MASK        (0x00000068U)
+#define USB_DEVICE_ECHI_DTD_STATUS_ACTIVE            (0x00000080U)
+#define USB_DEVICE_ECHI_DTD_STATUS_HALTED            (0x00000040U)
 #define USB_DEVICE_ECHI_DTD_STATUS_DATA_BUFFER_ERROR (0x00000020U)
 #define USB_DEVICE_ECHI_DTD_STATUS_TRANSACTION_ERROR (0x00000008U)
 
 typedef struct _usb_device_ehci_qh_struct
 {
-    union {
+    union
+    {
         volatile uint32_t capabilttiesCharacteristics;
         struct
         {
@@ -73,7 +75,8 @@ typedef struct _usb_device_ehci_qh_struct
     } capabilttiesCharacteristicsUnion;
     volatile uint32_t currentDtdPointer;
     volatile uint32_t nextDtdPointer;
-    union {
+    union
+    {
         volatile uint32_t dtdToken;
         struct
         {
@@ -90,7 +93,8 @@ typedef struct _usb_device_ehci_qh_struct
     volatile uint32_t reserved1;
     uint32_t setupBuffer[2];
     uint32_t setupBufferBack[2];
-    union {
+    union
+    {
         uint32_t endpointStatus;
         struct
         {
@@ -105,7 +109,8 @@ typedef struct _usb_device_ehci_qh_struct
 typedef struct _usb_device_ehci_dtd_struct
 {
     volatile uint32_t nextDtdPointer;
-    union {
+    union
+    {
         volatile uint32_t dtdToken;
         struct
         {
@@ -119,7 +124,8 @@ typedef struct _usb_device_ehci_dtd_struct
         } dtdTokenBitmap;
     } dtdTokenUnion;
     volatile uint32_t bufferPointerPage[5];
-    union {
+    union
+    {
         volatile uint32_t reserved;
         struct
         {
@@ -141,20 +147,22 @@ typedef struct _usb_device_ehci_state_struct
     USBNC_Type *registerNcBase; /*!< The base address of the USBNC register */
 #endif
 #endif
-    usb_device_ehci_qh_struct_t *qh;                                        /*!< The QH structure base address */
-    usb_device_ehci_dtd_struct_t *dtd;                                      /*!< The DTD structure base address */
-    usb_device_ehci_dtd_struct_t *dtdFree;                                  /*!< The idle DTD list head */
-    usb_device_ehci_dtd_struct_t *dtdHard[USB_DEVICE_CONFIG_ENDPOINTS * 2]; /*!< The transferring DTD list head for each endpoint */
-    usb_device_ehci_dtd_struct_t *dtdTail[USB_DEVICE_CONFIG_ENDPOINTS * 2]; /*!< The transferring DTD list tail for each endpoint */
-    int8_t dtdCount;                                                        /*!< The idle DTD node count */
-    uint8_t endpointCount;                                                  /*!< The endpoint number of EHCI */
-    uint8_t isResetting;                                                    /*!< Whether a PORT reset is occurring or not  */
-    uint8_t controllerId;                                                   /*!< Controller ID */
-    uint8_t speed;                                                          /*!< Current speed of EHCI */
-    uint8_t isSuspending;                                                   /*!< Is suspending of the PORT */
+    usb_device_ehci_qh_struct_t *qh;       /*!< The QH structure base address */
+    usb_device_ehci_dtd_struct_t *dtd;     /*!< The DTD structure base address */
+    usb_device_ehci_dtd_struct_t *dtdFree; /*!< The idle DTD list head */
+    usb_device_ehci_dtd_struct_t
+        *dtdHard[USB_DEVICE_CONFIG_ENDPOINTS * 2]; /*!< The transferring DTD list head for each endpoint */
+    usb_device_ehci_dtd_struct_t
+        *dtdTail[USB_DEVICE_CONFIG_ENDPOINTS * 2]; /*!< The transferring DTD list tail for each endpoint */
+    int8_t dtdCount;                               /*!< The idle DTD node count */
+    uint8_t endpointCount;                         /*!< The endpoint number of EHCI */
+    uint8_t isResetting;                           /*!< Whether a PORT reset is occurring or not  */
+    uint8_t controllerId;                          /*!< Controller ID */
+    uint8_t speed;                                 /*!< Current speed of EHCI */
+    uint8_t isSuspending;                          /*!< Is suspending of the PORT */
 } usb_device_ehci_state_struct_t;
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
     (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))
 typedef struct _usb_device_dcd_state_struct
 {
@@ -189,7 +197,9 @@ extern "C"
      *
      * @return A USB error code or kStatus_USB_Success.
      */
-    usb_status_t USB_DeviceEhciInit(uint8_t controllerId, usb_device_handle handle, usb_device_controller_handle *ehciHandle);
+    usb_status_t USB_DeviceEhciInit(uint8_t controllerId,
+                                    usb_device_handle handle,
+                                    usb_device_controller_handle *ehciHandle);
 
     /*!
      * @brief Deinitializes the USB device EHCI instance.
@@ -214,17 +224,16 @@ extern "C"
      *
      * @return A USB error code or kStatus_USB_Success.
      *
-     * @note The return value means whether the sending request is successful or not. The transfer completion is indicated
-     * by the
-     * corresponding callback function.
-     * Currently, only one transfer request can be supported for a specific endpoint.
-     * If there is a specific requirement to support multiple transfer requests for a specific endpoint, the application
-     * should implement a queue in the application level.
-     * The subsequent transfer can begin only when the previous transfer is done (a notification is received through the
-     * endpoint
-     * callback).
+     * @note The return value means whether the sending request is successful or not. The transfer completion is
+     * indicated by the corresponding callback function. Currently, only one transfer request can be supported for a
+     * specific endpoint. If there is a specific requirement to support multiple transfer requests for a specific
+     * endpoint, the application should implement a queue in the application level. The subsequent transfer can begin
+     * only when the previous transfer is done (a notification is received through the endpoint callback).
      */
-    usb_status_t USB_DeviceEhciSend(usb_device_controller_handle ehciHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+    usb_status_t USB_DeviceEhciSend(usb_device_controller_handle ehciHandle,
+                                    uint8_t endpointAddress,
+                                    uint8_t *buffer,
+                                    uint32_t length);
 
     /*!
      * @brief Receive data through a specified endpoint.
@@ -238,15 +247,16 @@ extern "C"
      *
      * @return A USB error code or kStatus_USB_Success.
      *
-     * @note The return value just means if the receiving request is successful or not; the transfer done is notified by the
-     * corresponding callback function.
-     * Currently, only one transfer request can be supported for one specific endpoint.
-     * If there is a specific requirement to support multiple transfer requests for one specific endpoint, the application
-     * should implement a queue in the application level.
-     * The subsequent transfer could begin only when the previous transfer is done (get notification through the endpoint
-     * callback).
+     * @note The return value just means if the receiving request is successful or not; the transfer done is notified by
+     * the corresponding callback function. Currently, only one transfer request can be supported for one specific
+     * endpoint. If there is a specific requirement to support multiple transfer requests for one specific endpoint, the
+     * application should implement a queue in the application level. The subsequent transfer could begin only when the
+     * previous transfer is done (get notification through the endpoint callback).
      */
-    usb_status_t USB_DeviceEhciRecv(usb_device_controller_handle ehciHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+    usb_status_t USB_DeviceEhciRecv(usb_device_controller_handle ehciHandle,
+                                    uint8_t endpointAddress,
+                                    uint8_t *buffer,
+                                    uint32_t length);
 
     /*!
      * @brief Cancels the pending transfer in a specified endpoint.
@@ -271,7 +281,9 @@ extern "C"
      *
      * @return A USB error code or kStatus_USB_Success.
      */
-    usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle, usb_device_control_type_t type, void *param);
+    usb_status_t USB_DeviceEhciControl(usb_device_controller_handle ehciHandle,
+                                       usb_device_control_type_t type,
+                                       void *param);
 
     /*! @} */
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_ch9.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_ch9.c
index ae5d0e0df..fb890d699 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_ch9.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_ch9.c
@@ -30,23 +30,52 @@
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-typedef usb_status_t (*usb_standard_request_callback_t)(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer,
+typedef usb_status_t (*usb_standard_request_callback_t)(usb_device_common_class_struct_t *classHandle,
+                                                        usb_setup_struct_t *setup,
+                                                        uint8_t **buffer,
                                                         uint32_t *length);
 
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
 
-static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
+static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *classHandle,
+                                           usb_setup_struct_t *setup,
+                                           uint8_t **buffer,
+                                           uint32_t *length);
+static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_t *classHandle,
+                                                 usb_setup_struct_t *setup,
+                                                 uint8_t **buffer,
+                                                 uint32_t *length);
 
-static usb_status_t USB_DeviceCh9SetAddress(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9GetDescriptor(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9GetConfiguration(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9SetConfiguration(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9GetInterface(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9SetInterface(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
-static usb_status_t USB_DeviceCh9SynchFrame(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length);
+static usb_status_t USB_DeviceCh9SetAddress(usb_device_common_class_struct_t *classHandle,
+                                            usb_setup_struct_t *setup,
+                                            uint8_t **buffer,
+                                            uint32_t *length);
+static usb_status_t USB_DeviceCh9GetDescriptor(usb_device_common_class_struct_t *classHandle,
+                                               usb_setup_struct_t *setup,
+                                               uint8_t **buffer,
+                                               uint32_t *length);
+static usb_status_t USB_DeviceCh9GetConfiguration(usb_device_common_class_struct_t *classHandle,
+                                                  usb_setup_struct_t *setup,
+                                                  uint8_t **buffer,
+                                                  uint32_t *length);
+static usb_status_t USB_DeviceCh9SetConfiguration(usb_device_common_class_struct_t *classHandle,
+                                                  usb_setup_struct_t *setup,
+                                                  uint8_t **buffer,
+                                                  uint32_t *length);
+static usb_status_t USB_DeviceCh9GetInterface(usb_device_common_class_struct_t *classHandle,
+                                              usb_setup_struct_t *setup,
+                                              uint8_t **buffer,
+                                              uint32_t *length);
+static usb_status_t USB_DeviceCh9SetInterface(usb_device_common_class_struct_t *classHandle,
+                                              usb_setup_struct_t *setup,
+                                              uint8_t **buffer,
+                                              uint32_t *length);
+static usb_status_t USB_DeviceCh9SynchFrame(usb_device_common_class_struct_t *classHandle,
+                                            usb_setup_struct_t *setup,
+                                            uint8_t **buffer,
+                                            uint32_t *length);
 
 /*******************************************************************************
  * Variables
@@ -87,24 +116,25 @@ static const usb_standard_request_callback_t s_UsbDeviceStandardRequest[] = {
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *classHandle,
+                                           usb_setup_struct_t *setup,
+                                           uint8_t **buffer,
+                                           uint32_t *length)
 {
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state))
-    {
+    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state)) {
         return error;
     }
 
-    if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_DEVICE)
-    {
+    if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_DEVICE) {
 #if (defined(USB_DEVICE_CONFIG_OTG) && (USB_DEVICE_CONFIG_OTG))
-        if (setup->wIndex == USB_REQUEST_STANDARD_GET_STATUS_OTG_STATUS_SELECTOR)
-        {
-            error = USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusOtg, &classHandle->standardTranscationBuffer);
+        if (setup->wIndex == USB_REQUEST_STANDARD_GET_STATUS_OTG_STATUS_SELECTOR) {
+            error =
+                USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusOtg, &classHandle->standardTranscationBuffer);
             classHandle->standardTranscationBuffer = USB_SHORT_TO_LITTLE_ENDIAN(classHandle->standardTranscationBuffer);
             /* The device status length must be USB_DEVICE_STATUS_SIZE. */
             *length = 1;
@@ -112,8 +142,10 @@ static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *cla
         else /* Get the device status */
         {
 #endif
-            error = USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDevice, &classHandle->standardTranscationBuffer);
-            classHandle->standardTranscationBuffer = classHandle->standardTranscationBuffer & USB_GET_STATUS_DEVICE_MASK;
+            error = USB_DeviceGetStatus(
+                classHandle->handle, kUSB_DeviceStatusDevice, &classHandle->standardTranscationBuffer);
+            classHandle->standardTranscationBuffer =
+                classHandle->standardTranscationBuffer & USB_GET_STATUS_DEVICE_MASK;
             classHandle->standardTranscationBuffer = USB_SHORT_TO_LITTLE_ENDIAN(classHandle->standardTranscationBuffer);
             /* The device status length must be USB_DEVICE_STATUS_SIZE. */
             *length = USB_DEVICE_STATUS_SIZE;
@@ -121,28 +153,25 @@ static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *cla
         }
 #endif
     }
-    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_INTERFACE)
-    {
+    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_INTERFACE) {
         /* Get the interface status */
-        error = kStatus_USB_Success;
+        error                                  = kStatus_USB_Success;
         classHandle->standardTranscationBuffer = 0U;
         /* The interface status length must be USB_INTERFACE_STATUS_SIZE. */
         *length = USB_INTERFACE_STATUS_SIZE;
     }
-    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_ENDPOINT)
-    {
+    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_ENDPOINT) {
         /* Get the endpoint status */
         usb_device_endpoint_status_struct_t endpointStatus;
         endpointStatus.endpointAddress = (uint8_t)setup->wIndex;
-        endpointStatus.endpointStatus = kUSB_DeviceEndpointStateIdle;
+        endpointStatus.endpointStatus  = kUSB_DeviceEndpointStateIdle;
         error = USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusEndpoint, &endpointStatus);
         classHandle->standardTranscationBuffer = endpointStatus.endpointStatus & USB_GET_STATUS_ENDPOINT_MASK;
         classHandle->standardTranscationBuffer = USB_SHORT_TO_LITTLE_ENDIAN(classHandle->standardTranscationBuffer);
         /* The endpoint status length must be USB_INTERFACE_STATUS_SIZE. */
         *length = USB_ENDPOINT_STATUS_SIZE;
     }
-    else
-    {
+    else {
     }
     *buffer = (uint8_t *)&classHandle->standardTranscationBuffer;
 
@@ -163,7 +192,10 @@ static usb_status_t USB_DeviceCh9GetStatus(usb_device_common_class_struct_t *cla
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_t *classHandle,
+                                                 usb_setup_struct_t *setup,
+                                                 uint8_t **buffer,
+                                                 uint32_t *length)
 {
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
@@ -171,81 +203,66 @@ static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state))
-    {
+    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state)) {
         return error;
     }
 
     /* Identify the request is set or clear the feature. */
-    if (USB_REQUEST_STANDARD_SET_FEATURE == setup->bRequest)
-    {
+    if (USB_REQUEST_STANDARD_SET_FEATURE == setup->bRequest) {
         isSet = 1U;
     }
 
-    if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_DEVICE)
-    {
+    if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_DEVICE) {
         /* Set or Clear the device feature. */
-        if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_REMOTE_WAKEUP == setup->wValue)
-        {
+        if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_REMOTE_WAKEUP == setup->wValue) {
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
             USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusRemoteWakeup, &isSet);
 #endif
             /* Set or Clear the device remote wakeup feature. */
             error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventSetRemoteWakeup, &isSet);
         }
-#if ((defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) ||                                                                                     \
-     (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&                                                                      \
+#if ((defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) ||                                             \
+     (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&                              \
     (defined(USB_DEVICE_CONFIG_USB20_TEST_MODE) && (USB_DEVICE_CONFIG_USB20_TEST_MODE > 0U))
-        else if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_TEST_MODE == setup->wValue)
-        {
+        else if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_TEST_MODE == setup->wValue) {
             state = kUSB_DeviceStateTestMode;
             error = USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
         }
 #endif
 #if (defined(USB_DEVICE_CONFIG_OTG) && (USB_DEVICE_CONFIG_OTG))
-        else if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_B_HNP_ENABLE == setup->wValue)
-        {
+        else if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_B_HNP_ENABLE == setup->wValue) {
             error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventSetBHNPEnable, &isSet);
         }
 #endif
-        else
-        {
+        else {
         }
     }
-    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_ENDPOINT)
-    {
+    else if ((setup->bmRequestType & USB_REQUEST_TYPE_RECIPIENT_MASK) == USB_REQUEST_TYPE_RECIPIENT_ENDPOINT) {
         /* Set or Clear the endpoint feature. */
-        if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_ENDPOINT_HALT == setup->wValue)
-        {
-            if (USB_CONTROL_ENDPOINT == (setup->wIndex & USB_ENDPOINT_NUMBER_MASK))
-            {
+        if (USB_REQUEST_STANDARD_FEATURE_SELECTOR_ENDPOINT_HALT == setup->wValue) {
+            if (USB_CONTROL_ENDPOINT == (setup->wIndex & USB_ENDPOINT_NUMBER_MASK)) {
                 /* Set or Clear the control endpoint status(halt or not). */
-                if (isSet)
-                {
+                if (isSet) {
                     USB_DeviceStallEndpoint(classHandle->handle, (uint8_t)setup->wIndex);
                 }
-                else
-                {
+                else {
                     USB_DeviceUnstallEndpoint(classHandle->handle, (uint8_t)setup->wIndex);
                 }
             }
 
             /* Set or Clear the endpoint status feature. */
-            if (isSet)
-            {
+            if (isSet) {
                 error = USB_DeviceClassEvent(classHandle->handle, kUSB_DeviceClassEventSetEndpointHalt, &setup->wIndex);
             }
-            else
-            {
-                error = USB_DeviceClassEvent(classHandle->handle, kUSB_DeviceClassEventClearEndpointHalt, &setup->wIndex);
+            else {
+                error =
+                    USB_DeviceClassEvent(classHandle->handle, kUSB_DeviceClassEventClearEndpointHalt, &setup->wIndex);
             }
         }
-        else
-        {
+        else {
         }
     }
-    else
-    {
+    else {
     }
 
     return error;
@@ -264,34 +281,33 @@ static usb_status_t USB_DeviceCh9SetClearFeature(usb_device_common_class_struct_
  * @retval kStatus_USB_Success              The request is handled successfully.
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state.
  */
-static usb_status_t USB_DeviceCh9SetAddress(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9SetAddress(usb_device_common_class_struct_t *classHandle,
+                                            usb_setup_struct_t *setup,
+                                            uint8_t **buffer,
+                                            uint32_t *length)
 {
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddressing != state) && (kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateDefault != state) &&
-        (kUSB_DeviceStateConfigured != state))
-    {
+    if ((kUSB_DeviceStateAddressing != state) && (kUSB_DeviceStateAddress != state) &&
+        (kUSB_DeviceStateDefault != state) && (kUSB_DeviceStateConfigured != state)) {
         return error;
     }
 
-    if (kUSB_DeviceStateAddressing != state)
-    {
+    if (kUSB_DeviceStateAddressing != state) {
         /* If the device address is not setting, pass the address and the device state will change to
          * kUSB_DeviceStateAddressing internally. */
         state = setup->wValue & 0xFFU;
         error = USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusAddress, &state);
     }
-    else
-    {
+    else {
         /* If the device address is setting, set device address and the address will be write into the controller
          * internally. */
         error = USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusAddress, NULL);
         /* And then change the device state to kUSB_DeviceStateAddress. */
-        if (kStatus_USB_Success == error)
-        {
+        if (kStatus_USB_Success == error) {
             state = kUSB_DeviceStateAddress;
             error = USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
         }
@@ -314,77 +330,79 @@ static usb_status_t USB_DeviceCh9SetAddress(usb_device_common_class_struct_t *cl
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9GetDescriptor(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9GetDescriptor(usb_device_common_class_struct_t *classHandle,
+                                               usb_setup_struct_t *setup,
+                                               uint8_t **buffer,
+                                               uint32_t *length)
 {
     usb_device_get_descriptor_common_union_t commonDescriptor;
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
-    uint8_t descriptorType = (uint8_t)((setup->wValue & 0xFF00U) >> 8U);
+    uint8_t descriptorType  = (uint8_t)((setup->wValue & 0xFF00U) >> 8U);
     uint8_t descriptorIndex = (uint8_t)((setup->wValue & 0x00FFU));
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state) && (kUSB_DeviceStateDefault != state))
-    {
+    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state) &&
+        (kUSB_DeviceStateDefault != state)) {
         return error;
     }
     commonDescriptor.commonDescriptor.length = setup->wLength;
-    if (USB_DESCRIPTOR_TYPE_DEVICE == descriptorType)
-    {
+    if (USB_DESCRIPTOR_TYPE_DEVICE == descriptorType) {
         /* Get the device descriptor */
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetDeviceDescriptor, &commonDescriptor.deviceDescriptor);
+        error = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetDeviceDescriptor, &commonDescriptor.deviceDescriptor);
     }
-    else if (USB_DESCRIPTOR_TYPE_CONFIGURE == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_CONFIGURE == descriptorType) {
         /* Get the configuration descriptor */
         commonDescriptor.configurationDescriptor.configuration = descriptorIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetConfigurationDescriptor, &commonDescriptor.configurationDescriptor);
+        error                                                  = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetConfigurationDescriptor, &commonDescriptor.configurationDescriptor);
     }
-    else if (USB_DESCRIPTOR_TYPE_STRING == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_STRING == descriptorType) {
         /* Get the string descriptor */
         commonDescriptor.stringDescriptor.stringIndex = descriptorIndex;
-        commonDescriptor.stringDescriptor.languageId = setup->wIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetStringDescriptor, &commonDescriptor.stringDescriptor);
+        commonDescriptor.stringDescriptor.languageId  = setup->wIndex;
+        error                                         = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetStringDescriptor, &commonDescriptor.stringDescriptor);
     }
 #if (defined(USB_DEVICE_CONFIG_HID) && (USB_DEVICE_CONFIG_HID > 0U))
-    else if (USB_DESCRIPTOR_TYPE_HID == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_HID == descriptorType) {
         /* Get the hid descriptor */
         commonDescriptor.hidDescriptor.interfaceNumber = setup->wIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetHidDescriptor, &commonDescriptor.hidDescriptor);
+        error                                          = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetHidDescriptor, &commonDescriptor.hidDescriptor);
     }
-    else if (USB_DESCRIPTOR_TYPE_HID_REPORT == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_HID_REPORT == descriptorType) {
         /* Get the hid report descriptor */
         commonDescriptor.hidReportDescriptor.interfaceNumber = setup->wIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetHidReportDescriptor, &commonDescriptor.hidReportDescriptor);
+        error                                                = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetHidReportDescriptor, &commonDescriptor.hidReportDescriptor);
     }
-    else if (USB_DESCRIPTOR_TYPE_HID_PHYSICAL == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_HID_PHYSICAL == descriptorType) {
         /* Get the hid physical descriptor */
-        commonDescriptor.hidPhysicalDescriptor.index = descriptorIndex;
+        commonDescriptor.hidPhysicalDescriptor.index           = descriptorIndex;
         commonDescriptor.hidPhysicalDescriptor.interfaceNumber = setup->wIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetHidPhysicalDescriptor, &commonDescriptor.hidPhysicalDescriptor);
+        error                                                  = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetHidPhysicalDescriptor, &commonDescriptor.hidPhysicalDescriptor);
     }
 #endif
 #if (defined(USB_DEVICE_CONFIG_CV_TEST) && (USB_DEVICE_CONFIG_CV_TEST > 0U))
-    else if (USB_DESCRIPTOR_TYPE_DEVICE_QUALITIER == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_DEVICE_QUALITIER == descriptorType) {
         /* Get the device descriptor */
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetDeviceQualifierDescriptor, &commonDescriptor.deviceDescriptor);
+        error = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetDeviceQualifierDescriptor, &commonDescriptor.deviceDescriptor);
     }
 #endif
 #if (defined(USB_DEVICE_CONFIG_LPM_L1) && (USB_DEVICE_CONFIG_LPM_L1 > 0U))
-    else if (USB_DESCRIPTOR_TYPE_BOS == descriptorType)
-    {
+    else if (USB_DESCRIPTOR_TYPE_BOS == descriptorType) {
         /* Get the configuration descriptor */
         commonDescriptor.configurationDescriptor.configuration = descriptorIndex;
-        error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetBOSDescriptor, &commonDescriptor.configurationDescriptor);
+        error                                                  = USB_DeviceClassCallback(
+            classHandle->handle, kUSB_DeviceEventGetBOSDescriptor, &commonDescriptor.configurationDescriptor);
     }
 #endif
-    else
-    {
+    else {
     }
     *buffer = commonDescriptor.commonDescriptor.buffer;
     *length = commonDescriptor.commonDescriptor.length;
@@ -405,20 +423,23 @@ static usb_status_t USB_DeviceCh9GetDescriptor(usb_device_common_class_struct_t
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9GetConfiguration(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9GetConfiguration(usb_device_common_class_struct_t *classHandle,
+                                                  usb_setup_struct_t *setup,
+                                                  uint8_t **buffer,
+                                                  uint32_t *length)
 {
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddress != state) && ((kUSB_DeviceStateConfigured != state)))
-    {
+    if ((kUSB_DeviceStateAddress != state) && ((kUSB_DeviceStateConfigured != state))) {
         return kStatus_USB_InvalidRequest;
     }
 
     *length = USB_CONFIGURE_SIZE;
     *buffer = (uint8_t *)&classHandle->standardTranscationBuffer;
-    return USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetConfiguration, &classHandle->standardTranscationBuffer);
+    return USB_DeviceClassCallback(
+        classHandle->handle, kUSB_DeviceEventGetConfiguration, &classHandle->standardTranscationBuffer);
 }
 
 /*!
@@ -435,22 +456,23 @@ static usb_status_t USB_DeviceCh9GetConfiguration(usb_device_common_class_struct
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9SetConfiguration(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9SetConfiguration(usb_device_common_class_struct_t *classHandle,
+                                                  usb_setup_struct_t *setup,
+                                                  uint8_t **buffer,
+                                                  uint32_t *length)
 {
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state))
-    {
+    if ((kUSB_DeviceStateAddress != state) && (kUSB_DeviceStateConfigured != state)) {
         return kStatus_USB_InvalidRequest;
     }
 
     /* The device state is changed to kUSB_DeviceStateConfigured */
     state = kUSB_DeviceStateConfigured;
     USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
-    if (!setup->wValue)
-    {
+    if (!setup->wValue) {
         /* If the new configuration is zero, the device state is changed to kUSB_DeviceStateAddress */
         state = kUSB_DeviceStateAddress;
         USB_DeviceSetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
@@ -476,23 +498,26 @@ static usb_status_t USB_DeviceCh9SetConfiguration(usb_device_common_class_struct
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9GetInterface(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9GetInterface(usb_device_common_class_struct_t *classHandle,
+                                              usb_setup_struct_t *setup,
+                                              uint8_t **buffer,
+                                              uint32_t *length)
 {
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if (state != kUSB_DeviceStateConfigured)
-    {
+    if (state != kUSB_DeviceStateConfigured) {
         return error;
     }
-    *length = USB_INTERFACE_SIZE;
-    *buffer = (uint8_t *)&classHandle->standardTranscationBuffer;
+    *length                                = USB_INTERFACE_SIZE;
+    *buffer                                = (uint8_t *)&classHandle->standardTranscationBuffer;
     classHandle->standardTranscationBuffer = (uint16_t)(((uint32_t)setup->wIndex & 0xFFU) << 8U);
     /* The Bit[15~8] is used to save the interface index, and the alternate setting will be saved in Bit[7~0] by
      * application. */
-    error = USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventGetInterface, &classHandle->standardTranscationBuffer);
+    error = USB_DeviceClassCallback(
+        classHandle->handle, kUSB_DeviceEventGetInterface, &classHandle->standardTranscationBuffer);
     classHandle->standardTranscationBuffer = USB_SHORT_TO_LITTLE_ENDIAN(classHandle->standardTranscationBuffer);
     return error;
 }
@@ -511,23 +536,27 @@ static usb_status_t USB_DeviceCh9GetInterface(usb_device_common_class_struct_t *
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9SetInterface(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9SetInterface(usb_device_common_class_struct_t *classHandle,
+                                              usb_setup_struct_t *setup,
+                                              uint8_t **buffer,
+                                              uint32_t *length)
 {
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if (state != kUSB_DeviceStateConfigured)
-    {
+    if (state != kUSB_DeviceStateConfigured) {
         return kStatus_USB_InvalidRequest;
     }
     classHandle->standardTranscationBuffer = ((setup->wIndex & 0xFFU) << 8U) | (setup->wValue & 0xFFU);
     /* Notify the class driver the alternate setting of the interface is changed. */
     /* The Bit[15~8] is used to save the interface index, and the alternate setting is saved in Bit[7~0]. */
-    USB_DeviceClassEvent(classHandle->handle, kUSB_DeviceClassEventSetInterface, &classHandle->standardTranscationBuffer);
+    USB_DeviceClassEvent(
+        classHandle->handle, kUSB_DeviceClassEventSetInterface, &classHandle->standardTranscationBuffer);
     /* Notify the application the alternate setting of the interface is changed. */
     /* The Bit[15~8] is used to save the interface index, and the alternate setting will is saved in Bit[7~0]. */
-    return USB_DeviceClassCallback(classHandle->handle, kUSB_DeviceEventSetInterface, &classHandle->standardTranscationBuffer);
+    return USB_DeviceClassCallback(
+        classHandle->handle, kUSB_DeviceEventSetInterface, &classHandle->standardTranscationBuffer);
 }
 
 /*!
@@ -544,21 +573,24 @@ static usb_status_t USB_DeviceCh9SetInterface(usb_device_common_class_struct_t *
  * @retval kStatus_USB_InvalidRequest       The request can not be handle in current device state,
  *                                          or, the request is unsupported.
  */
-static usb_status_t USB_DeviceCh9SynchFrame(usb_device_common_class_struct_t *classHandle, usb_setup_struct_t *setup, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceCh9SynchFrame(usb_device_common_class_struct_t *classHandle,
+                                            usb_setup_struct_t *setup,
+                                            uint8_t **buffer,
+                                            uint32_t *length)
 {
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
 
     USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if (state != kUSB_DeviceStateConfigured)
-    {
+    if (state != kUSB_DeviceStateConfigured) {
         return error;
     }
 
     classHandle->standardTranscationBuffer = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wIndex);
     /* Get the sync frame value */
-    error = USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusSynchFrame, &classHandle->standardTranscationBuffer);
+    error =
+        USB_DeviceGetStatus(classHandle->handle, kUSB_DeviceStatusSynchFrame, &classHandle->standardTranscationBuffer);
     *buffer = (uint8_t *)&classHandle->standardTranscationBuffer;
     *length = sizeof(classHandle->standardTranscationBuffer);
 
@@ -591,32 +623,35 @@ static usb_status_t USB_DeviceCh9SynchFrame(usb_device_common_class_struct_t *cl
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceControlCallbackFeedback(usb_device_handle handle, usb_setup_struct_t *setup, usb_status_t error,
-                                                      usb_device_control_read_write_sequence_t stage, uint8_t **buffer, uint32_t *length)
+static usb_status_t USB_DeviceControlCallbackFeedback(usb_device_handle handle,
+                                                      usb_setup_struct_t *setup,
+                                                      usb_status_t error,
+                                                      usb_device_control_read_write_sequence_t stage,
+                                                      uint8_t **buffer,
+                                                      uint32_t *length)
 {
     usb_status_t errorCode = kStatus_USB_Error;
-    uint8_t direction = USB_IN;
+    uint8_t direction      = USB_IN;
 
-    if (kStatus_USB_InvalidRequest == error)
-    {
+    if (kStatus_USB_InvalidRequest == error) {
         /* Stall the control pipe when the request is unsupported. */
         if ((!((setup->bmRequestType & USB_REQUEST_TYPE_TYPE_MASK) == USB_REQUEST_TYPE_TYPE_STANDARD)) &&
-            ((setup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT) && (setup->wLength) && (kUSB_DeviceControlPipeSetupStage == stage))
-        {
+            ((setup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT) && (setup->wLength) &&
+            (kUSB_DeviceControlPipeSetupStage == stage)) {
             direction = USB_OUT;
         }
-        errorCode = USB_DeviceStallEndpoint(handle, (USB_CONTROL_ENDPOINT) | (uint8_t)((uint32_t)direction << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT));
+        errorCode = USB_DeviceStallEndpoint(
+            handle,
+            (USB_CONTROL_ENDPOINT) | (uint8_t)((uint32_t)direction << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT));
     }
-    else
-    {
-        if (*length > setup->wLength)
-        {
+    else {
+        if (*length > setup->wLength) {
             *length = setup->wLength;
         }
         errorCode = USB_DeviceSendRequest(handle, (USB_CONTROL_ENDPOINT), *buffer, *length);
 
-        if ((kStatus_USB_Success == errorCode) && (USB_REQUEST_TYPE_DIR_IN == (setup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK)))
-        {
+        if ((kStatus_USB_Success == errorCode) &&
+            (USB_REQUEST_TYPE_DIR_IN == (setup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK))) {
             errorCode = USB_DeviceRecvRequest(handle, (USB_CONTROL_ENDPOINT), (uint8_t *)NULL, 0U);
         }
     }
@@ -637,17 +672,18 @@ static usb_status_t USB_DeviceControlCallbackFeedback(usb_device_handle handle,
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceControlCallback(usb_device_handle handle, usb_device_endpoint_callback_message_struct_t *message, void *callbackParam)
+usb_status_t USB_DeviceControlCallback(usb_device_handle handle,
+                                       usb_device_endpoint_callback_message_struct_t *message,
+                                       void *callbackParam)
 {
     usb_setup_struct_t *deviceSetup;
     usb_device_common_class_struct_t *classHandle;
-    uint8_t *buffer = (uint8_t *)NULL;
-    uint32_t length = 0U;
+    uint8_t *buffer    = (uint8_t *)NULL;
+    uint32_t length    = 0U;
     usb_status_t error = kStatus_USB_InvalidRequest;
     uint8_t state;
 
-    if ((0xFFFFFFFFU == message->length) || (NULL == callbackParam))
-    {
+    if ((0xFFFFFFFFU == message->length) || (NULL == callbackParam)) {
         return error;
     }
 
@@ -655,10 +691,8 @@ usb_status_t USB_DeviceControlCallback(usb_device_handle handle, usb_device_endp
     deviceSetup = (usb_setup_struct_t *)&classHandle->setupBuffer[0];
     USB_DeviceGetStatus(handle, kUSB_DeviceStatusDeviceState, &state);
 
-    if (message->isSetup)
-    {
-        if ((USB_SETUP_PACKET_SIZE != message->length) || (NULL == message->buffer))
-        {
+    if (message->isSetup) {
+        if ((USB_SETUP_PACKET_SIZE != message->length) || (NULL == message->buffer)) {
             /* If a invalid setup is received, the control pipes should be de-init and init again.
              * Due to the IP can not meet this require, it is reserved for feature.
              */
@@ -675,142 +709,130 @@ usb_status_t USB_DeviceControlCallback(usb_device_handle handle, usb_device_endp
         usb_setup_struct_t *setup = (usb_setup_struct_t *)(message->buffer);
 
         /* Copy the setup packet to the application buffer */
-        deviceSetup->wValue = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wValue);
-        deviceSetup->wIndex = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wIndex);
-        deviceSetup->wLength = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wLength);
-        deviceSetup->bRequest = setup->bRequest;
+        deviceSetup->wValue        = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wValue);
+        deviceSetup->wIndex        = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wIndex);
+        deviceSetup->wLength       = USB_SHORT_FROM_LITTLE_ENDIAN(setup->wLength);
+        deviceSetup->bRequest      = setup->bRequest;
         deviceSetup->bmRequestType = setup->bmRequestType;
 
-        if ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_MASK) == USB_REQUEST_TYPE_TYPE_STANDARD)
-        {
+        if ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_MASK) == USB_REQUEST_TYPE_TYPE_STANDARD) {
             /* Handle the standard request, only handle the request in request array. */
-            if (deviceSetup->bRequest < (sizeof(s_UsbDeviceStandardRequest) / 4))
-            {
-                if (s_UsbDeviceStandardRequest[deviceSetup->bRequest] != (usb_standard_request_callback_t)NULL)
-                {
-                    error = s_UsbDeviceStandardRequest[deviceSetup->bRequest](classHandle, deviceSetup, &buffer, &length);
+            if (deviceSetup->bRequest < (sizeof(s_UsbDeviceStandardRequest) / 4)) {
+                if (s_UsbDeviceStandardRequest[deviceSetup->bRequest] != (usb_standard_request_callback_t)NULL) {
+                    error =
+                        s_UsbDeviceStandardRequest[deviceSetup->bRequest](classHandle, deviceSetup, &buffer, &length);
                 }
             }
         }
-        else
-        {
-            if ((deviceSetup->wLength) && ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT))
-            {
+        else {
+            if ((deviceSetup->wLength) &&
+                ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT)) {
                 /* Class or vendor request with the OUT data phase. */
-                if ((deviceSetup->wLength) && ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS))
-                {
+                if ((deviceSetup->wLength) &&
+                    ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS)) {
                     /* Get data buffer to receive the data from the host. */
                     usb_device_control_request_struct_t controlRequest;
-                    controlRequest.buffer = (uint8_t *)NULL;
+                    controlRequest.buffer  = (uint8_t *)NULL;
                     controlRequest.isSetup = 1U;
-                    controlRequest.setup = deviceSetup;
-                    controlRequest.length = deviceSetup->wLength;
-                    error = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
+                    controlRequest.setup   = deviceSetup;
+                    controlRequest.length  = deviceSetup->wLength;
+                    error  = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
                     length = controlRequest.length;
                     buffer = controlRequest.buffer;
                 }
-                else if ((deviceSetup->wLength) && ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) == USB_REQUEST_TYPE_TYPE_VENDOR))
-                {
+                else if ((deviceSetup->wLength) && ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) ==
+                                                    USB_REQUEST_TYPE_TYPE_VENDOR)) {
                     /* Get data buffer to receive the data from the host. */
                     usb_device_control_request_struct_t controlRequest;
-                    controlRequest.buffer = (uint8_t *)NULL;
+                    controlRequest.buffer  = (uint8_t *)NULL;
                     controlRequest.isSetup = 1U;
-                    controlRequest.setup = deviceSetup;
-                    controlRequest.length = deviceSetup->wLength;
-                    error = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
+                    controlRequest.setup   = deviceSetup;
+                    controlRequest.length  = deviceSetup->wLength;
+                    error  = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
                     length = controlRequest.length;
                     buffer = controlRequest.buffer;
                 }
-                else
-                {
+                else {
                 }
-                if (kStatus_USB_Success == error)
-                {
+                if (kStatus_USB_Success == error) {
                     /* Prime an OUT transfer */
                     error = USB_DeviceRecvRequest(handle, USB_CONTROL_ENDPOINT, buffer, deviceSetup->wLength);
                     return error;
                 }
             }
-            else
-            {
+            else {
                 /* Class or vendor request with the IN data phase. */
-                if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS))
-                {
+                if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS)) {
                     /* Get data buffer to response the host. */
                     usb_device_control_request_struct_t controlRequest;
-                    controlRequest.buffer = (uint8_t *)NULL;
+                    controlRequest.buffer  = (uint8_t *)NULL;
                     controlRequest.isSetup = 1U;
-                    controlRequest.setup = deviceSetup;
-                    controlRequest.length = deviceSetup->wLength;
-                    error = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
+                    controlRequest.setup   = deviceSetup;
+                    controlRequest.length  = deviceSetup->wLength;
+                    error  = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
                     length = controlRequest.length;
                     buffer = controlRequest.buffer;
                 }
-                else if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) == USB_REQUEST_TYPE_TYPE_VENDOR))
-                {
+                else if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) ==
+                          USB_REQUEST_TYPE_TYPE_VENDOR)) {
                     /* Get data buffer to response the host. */
                     usb_device_control_request_struct_t controlRequest;
-                    controlRequest.buffer = (uint8_t *)NULL;
+                    controlRequest.buffer  = (uint8_t *)NULL;
                     controlRequest.isSetup = 1U;
-                    controlRequest.setup = deviceSetup;
-                    controlRequest.length = deviceSetup->wLength;
-                    error = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
+                    controlRequest.setup   = deviceSetup;
+                    controlRequest.length  = deviceSetup->wLength;
+                    error  = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
                     length = controlRequest.length;
                     buffer = controlRequest.buffer;
                 }
-                else
-                {
+                else {
                 }
             }
         }
         /* Send the response to the host. */
-        error = USB_DeviceControlCallbackFeedback(handle, deviceSetup, error, kUSB_DeviceControlPipeSetupStage, &buffer, &length);
+        error = USB_DeviceControlCallbackFeedback(
+            handle, deviceSetup, error, kUSB_DeviceControlPipeSetupStage, &buffer, &length);
     }
-    else if (kUSB_DeviceStateAddressing == state)
-    {
+    else if (kUSB_DeviceStateAddressing == state) {
         /* Set the device address to controller. */
         error = s_UsbDeviceStandardRequest[deviceSetup->bRequest](classHandle, deviceSetup, &buffer, &length);
     }
-#if ((defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) ||                                                                                     \
-     (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&                                                                      \
+#if ((defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) ||                                             \
+     (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&                              \
     (defined(USB_DEVICE_CONFIG_USB20_TEST_MODE) && (USB_DEVICE_CONFIG_USB20_TEST_MODE > 0U))
-    else if (kUSB_DeviceStateTestMode == state)
-    {
+    else if (kUSB_DeviceStateTestMode == state) {
         uint8_t portTestControl = (uint8_t)(deviceSetup->wIndex >> 8);
         /* Set the controller.into test mode. */
         error = USB_DeviceSetStatus(handle, kUSB_DeviceStatusTestMode, &portTestControl);
     }
 #endif
-    else if ((message->length) && (deviceSetup->wLength) && ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT))
-    {
-        if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS))
-        {
+    else if ((message->length) && (deviceSetup->wLength) &&
+             ((deviceSetup->bmRequestType & USB_REQUEST_TYPE_DIR_MASK) == USB_REQUEST_TYPE_DIR_OUT)) {
+        if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_CLASS) == USB_REQUEST_TYPE_TYPE_CLASS)) {
             /* Data received in OUT phase, and notify the class driver. */
             usb_device_control_request_struct_t controlRequest;
-            controlRequest.buffer = message->buffer;
+            controlRequest.buffer  = message->buffer;
             controlRequest.isSetup = 0U;
-            controlRequest.setup = deviceSetup;
-            controlRequest.length = message->length;
-            error = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
+            controlRequest.setup   = deviceSetup;
+            controlRequest.length  = message->length;
+            error                  = USB_DeviceClassEvent(handle, kUSB_DeviceClassEventClassRequest, &controlRequest);
         }
-        else if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) == USB_REQUEST_TYPE_TYPE_VENDOR))
-        {
+        else if (((deviceSetup->bmRequestType & USB_REQUEST_TYPE_TYPE_VENDOR) == USB_REQUEST_TYPE_TYPE_VENDOR)) {
             /* Data received in OUT phase, and notify the application. */
             usb_device_control_request_struct_t controlRequest;
-            controlRequest.buffer = message->buffer;
+            controlRequest.buffer  = message->buffer;
             controlRequest.isSetup = 0U;
-            controlRequest.setup = deviceSetup;
-            controlRequest.length = message->length;
-            error = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
+            controlRequest.setup   = deviceSetup;
+            controlRequest.length  = message->length;
+            error                  = USB_DeviceClassCallback(handle, kUSB_DeviceEventVendorRequest, &controlRequest);
         }
-        else
-        {
+        else {
         }
         /* Send the response to the host. */
-        error = USB_DeviceControlCallbackFeedback(handle, deviceSetup, error, kUSB_DeviceControlPipeDataStage, &buffer, &length);
+        error = USB_DeviceControlCallbackFeedback(
+            handle, deviceSetup, error, kUSB_DeviceControlPipeDataStage, &buffer, &length);
     }
-    else
-    {
+    else {
     }
     return error;
 }
@@ -831,28 +853,27 @@ usb_status_t USB_DeviceControlPipeInit(usb_device_handle handle, void *param)
     usb_device_endpoint_callback_struct_t epCallback;
     usb_status_t error;
 
-    epCallback.callbackFn = USB_DeviceControlCallback;
+    epCallback.callbackFn    = USB_DeviceControlCallback;
     epCallback.callbackParam = param;
 
-    epInitStruct.zlt = 1U;
-    epInitStruct.transferType = USB_ENDPOINT_CONTROL;
-    epInitStruct.interval = 0;
+    epInitStruct.zlt             = 1U;
+    epInitStruct.transferType    = USB_ENDPOINT_CONTROL;
+    epInitStruct.interval        = 0;
     epInitStruct.endpointAddress = USB_CONTROL_ENDPOINT | (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT);
-    epInitStruct.maxPacketSize = USB_CONTROL_MAX_PACKET_SIZE;
+    epInitStruct.maxPacketSize   = USB_CONTROL_MAX_PACKET_SIZE;
     /* Initialize the control IN pipe */
     error = USB_DeviceInitEndpoint(handle, &epInitStruct, &epCallback);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
     epInitStruct.endpointAddress = USB_CONTROL_ENDPOINT | (USB_OUT << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT);
     /* Initialize the control OUT pipe */
     error = USB_DeviceInitEndpoint(handle, &epInitStruct, &epCallback);
 
-    if (kStatus_USB_Success != error)
-    {
-        USB_DeviceDeinitEndpoint(handle, USB_CONTROL_ENDPOINT | (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT));
+    if (kStatus_USB_Success != error) {
+        USB_DeviceDeinitEndpoint(handle,
+                                 USB_CONTROL_ENDPOINT | (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT));
         return error;
     }
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.c
index ae0d92a81..c1dc4e5a8 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.c
@@ -24,7 +24,7 @@
 #include "usb_device_ehci.h"
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
 #include "usb_device_lpcip3511.h"
 #endif
@@ -51,21 +51,31 @@
  ******************************************************************************/
 static usb_status_t USB_DeviceAllocateHandle(uint8_t controllerId, usb_device_struct_t **handle);
 static usb_status_t USB_DeviceFreeHandle(usb_device_struct_t *handle);
-static usb_status_t USB_DeviceGetControllerInterface(uint8_t controllerId, const usb_device_controller_interface_struct_t **controllerInterface);
-static usb_status_t USB_DeviceTransfer(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+static usb_status_t USB_DeviceGetControllerInterface(
+    uint8_t controllerId, const usb_device_controller_interface_struct_t **controllerInterface);
+static usb_status_t USB_DeviceTransfer(usb_device_handle handle,
+                                       uint8_t endpointAddress,
+                                       uint8_t *buffer,
+                                       uint32_t length);
 static usb_status_t USB_DeviceControl(usb_device_handle handle, usb_device_control_type_t type, void *param);
-static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle,
+                                                usb_device_callback_message_struct_t *message);
 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
-static usb_status_t USB_DeviceSuspendNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
-static usb_status_t USB_DeviceResumeNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceSuspendNotification(usb_device_struct_t *handle,
+                                                  usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceResumeNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message);
 #if (defined(USB_DEVICE_CONFIG_LPM_L1) && (USB_DEVICE_CONFIG_LPM_L1 > 0U))
-static usb_status_t USB_DeviceSleepNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceSleepNotification(usb_device_struct_t *handle,
+                                                usb_device_callback_message_struct_t *message);
 
 #endif
 #endif /* USB_DEVICE_CONFIG_LOW_POWER_MODE */
 #if (defined(USB_DEVICE_CONFIG_DETACH_ENABLE) && (USB_DEVICE_CONFIG_DETACH_ENABLE > 0U))
-static usb_status_t USB_DeviceDetachNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
-static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceDetachNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message);
+static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message);
 #endif
 static usb_status_t USB_DeviceNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message);
 
@@ -98,21 +108,17 @@ static usb_status_t USB_DeviceAllocateHandle(uint8_t controllerId, usb_device_st
 
     USB_OSA_ENTER_CRITICAL();
     /* Check the controller is initialized or not. */
-    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if ((NULL != s_UsbDevice[count].controllerHandle) && (controllerId == s_UsbDevice[count].controllerId))
-        {
+    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if ((NULL != s_UsbDevice[count].controllerHandle) && (controllerId == s_UsbDevice[count].controllerId)) {
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Error;
         }
     }
     /* Get a free device handle. */
-    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++)
-    {
-        if (NULL == s_UsbDevice[count].controllerHandle)
-        {
+    for (count = 0U; count < USB_DEVICE_CONFIG_NUM; count++) {
+        if (NULL == s_UsbDevice[count].controllerHandle) {
             s_UsbDevice[count].controllerId = controllerId;
-            *handle = &s_UsbDevice[count];
+            *handle                         = &s_UsbDevice[count];
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_Success;
         }
@@ -136,35 +142,50 @@ static usb_status_t USB_DeviceFreeHandle(usb_device_struct_t *handle)
 
     USB_OSA_ENTER_CRITICAL();
     handle->controllerHandle = NULL;
-    handle->controllerId = 0U;
+    handle->controllerId     = 0U;
     USB_OSA_EXIT_CRITICAL();
     return kStatus_USB_Success;
 }
 
 #if ((defined(USB_DEVICE_CONFIG_KHCI)) && (USB_DEVICE_CONFIG_KHCI > 0U))
 /* KHCI device driver interface */
-static const usb_device_controller_interface_struct_t s_UsbDeviceKhciInterface = {USB_DeviceKhciInit, USB_DeviceKhciDeinit, USB_DeviceKhciSend,
-                                                                                  USB_DeviceKhciRecv, USB_DeviceKhciCancel, USB_DeviceKhciControl};
+static const usb_device_controller_interface_struct_t s_UsbDeviceKhciInterface = {USB_DeviceKhciInit,
+                                                                                  USB_DeviceKhciDeinit,
+                                                                                  USB_DeviceKhciSend,
+                                                                                  USB_DeviceKhciRecv,
+                                                                                  USB_DeviceKhciCancel,
+                                                                                  USB_DeviceKhciControl};
 #endif
 
 #if ((defined(USB_DEVICE_CONFIG_EHCI)) && (USB_DEVICE_CONFIG_EHCI > 0U))
 /* EHCI device driver interface */
-static const usb_device_controller_interface_struct_t s_UsbDeviceEhciInterface = {USB_DeviceEhciInit, USB_DeviceEhciDeinit, USB_DeviceEhciSend,
-                                                                                  USB_DeviceEhciRecv, USB_DeviceEhciCancel, USB_DeviceEhciControl};
+static const usb_device_controller_interface_struct_t s_UsbDeviceEhciInterface = {USB_DeviceEhciInit,
+                                                                                  USB_DeviceEhciDeinit,
+                                                                                  USB_DeviceEhciSend,
+                                                                                  USB_DeviceEhciRecv,
+                                                                                  USB_DeviceEhciCancel,
+                                                                                  USB_DeviceEhciControl};
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
 /* EHCI device driver interface */
-static const usb_device_controller_interface_struct_t s_UsbDeviceLpc3511IpInterface = {USB_DeviceLpc3511IpInit,   USB_DeviceLpc3511IpDeinit,
-                                                                                       USB_DeviceLpc3511IpSend,   USB_DeviceLpc3511IpRecv,
-                                                                                       USB_DeviceLpc3511IpCancel, USB_DeviceLpc3511IpControl};
+static const usb_device_controller_interface_struct_t s_UsbDeviceLpc3511IpInterface = {USB_DeviceLpc3511IpInit,
+                                                                                       USB_DeviceLpc3511IpDeinit,
+                                                                                       USB_DeviceLpc3511IpSend,
+                                                                                       USB_DeviceLpc3511IpRecv,
+                                                                                       USB_DeviceLpc3511IpCancel,
+                                                                                       USB_DeviceLpc3511IpControl};
 #endif
 
 #if ((defined(USB_DEVICE_CONFIG_DWC3)) && (USB_DEVICE_CONFIG_DWC3 > 0U))
 /* EHCI device driver interface */
-static const usb_device_controller_interface_struct_t s_UsbDeviceDwc3Interface = {USB_DeviceDwc3Init, USB_DeviceDwc3Deinit, USB_DeviceDwc3Send,
-                                                                                  USB_DeviceDwc3Recv, USB_DeviceDwc3Cancel, USB_DeviceDwc3Control};
+static const usb_device_controller_interface_struct_t s_UsbDeviceDwc3Interface = {USB_DeviceDwc3Init,
+                                                                                  USB_DeviceDwc3Deinit,
+                                                                                  USB_DeviceDwc3Send,
+                                                                                  USB_DeviceDwc3Recv,
+                                                                                  USB_DeviceDwc3Cancel,
+                                                                                  USB_DeviceDwc3Control};
 #endif
 
 /*!
@@ -179,35 +200,35 @@ static const usb_device_controller_interface_struct_t s_UsbDeviceDwc3Interface =
  * @retval kStatus_USB_Success              Get a device handle successfully.
  * @retval kStatus_USB_ControllerNotFound   The controller id is invalid.
  */
-static usb_status_t USB_DeviceGetControllerInterface(uint8_t controllerId, const usb_device_controller_interface_struct_t **controllerInterface)
+static usb_status_t USB_DeviceGetControllerInterface(
+    uint8_t controllerId, const usb_device_controller_interface_struct_t **controllerInterface)
 {
     usb_status_t error = kStatus_USB_ControllerNotFound;
-    switch (controllerId)
-    {
+    switch (controllerId) {
 #if ((defined(USB_DEVICE_CONFIG_KHCI)) && (USB_DEVICE_CONFIG_KHCI > 0U))
     /* Get the KHCI controller driver interface */
     case kUSB_ControllerKhci0:
     case kUSB_ControllerKhci1:
         *controllerInterface = (const usb_device_controller_interface_struct_t *)&s_UsbDeviceKhciInterface;
-        error = kStatus_USB_Success;
+        error                = kStatus_USB_Success;
         break;
 #endif
 #if ((defined(USB_DEVICE_CONFIG_EHCI)) && (USB_DEVICE_CONFIG_EHCI > 0U))
     /* Get the EHCI controller driver interface */
     case kUSB_ControllerEhci0:
     case kUSB_ControllerEhci1:
-        error = kStatus_USB_Success;
+        error                = kStatus_USB_Success;
         *controllerInterface = (const usb_device_controller_interface_struct_t *)&s_UsbDeviceEhciInterface;
         break;
 #endif
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
     /* Get the EHCI controller driver interface */
     case kUSB_ControllerLpcIp3511Fs0:
     case kUSB_ControllerLpcIp3511Fs1:
     case kUSB_ControllerLpcIp3511Hs0:
     case kUSB_ControllerLpcIp3511Hs1:
-        error = kStatus_USB_Success;
+        error                = kStatus_USB_Success;
         *controllerInterface = (const usb_device_controller_interface_struct_t *)&s_UsbDeviceLpc3511IpInterface;
         break;
 #endif
@@ -215,7 +236,7 @@ static usb_status_t USB_DeviceGetControllerInterface(uint8_t controllerId, const
     /* Get the EHCI controller driver interface */
     case kUSB_ControllerDwc30:
     case kUSB_ControllerDwc31:
-        error = kStatus_USB_Success;
+        error                = kStatus_USB_Success;
         *controllerInterface = (const usb_device_controller_interface_struct_t *)&s_UsbDeviceDwc3Interface;
         break;
 #endif
@@ -241,61 +262,58 @@ static usb_status_t USB_DeviceGetControllerInterface(uint8_t controllerId, const
  * @retval kStatus_USB_ControllerNotFound   The controller interface is not found.
  * @retval kStatus_USB_Error                The device is doing reset.
  */
-static usb_status_t USB_DeviceTransfer(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
+static usb_status_t USB_DeviceTransfer(usb_device_handle handle,
+                                       uint8_t endpointAddress,
+                                       uint8_t *buffer,
+                                       uint32_t length)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
-    usb_status_t error = kStatus_USB_Error;
-    uint8_t endpoint = endpointAddress & USB_ENDPOINT_NUMBER_MASK;
-    uint8_t direction = (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    usb_status_t error                = kStatus_USB_Error;
+    uint8_t endpoint                  = endpointAddress & USB_ENDPOINT_NUMBER_MASK;
+    uint8_t direction                 = (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
     USB_OSA_SR_ALLOC();
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
-    if (NULL != deviceHandle->controllerInterface)
-    {
-        if (deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy)
-        {
+    if (NULL != deviceHandle->controllerInterface) {
+        if (deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy) {
             return kStatus_USB_Busy;
         }
         USB_OSA_ENTER_CRITICAL();
         deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy = 1U;
         USB_OSA_EXIT_CRITICAL();
-        if (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK)
-        {
+        if (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) {
 #if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE > 0U))
-            if (length)
-            {
+            if (length) {
                 DCACHE_CleanByRange((uint32_t)buffer, length);
             }
 #endif
             /* Call the controller send interface, the callbackFn is initialized in
             USB_DeviceGetControllerInterface */
-            error = deviceHandle->controllerInterface->deviceSend(deviceHandle->controllerHandle, endpointAddress, buffer, length);
+            error = deviceHandle->controllerInterface->deviceSend(
+                deviceHandle->controllerHandle, endpointAddress, buffer, length);
         }
-        else
-        {
+        else {
 #if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE > 0U))
-            if (length)
-            {
+            if (length) {
                 DCACHE_CleanInvalidateByRange((uint32_t)buffer, length);
             }
 #endif
             /* Call the controller receive interface, the callbackFn is initialized in
             USB_DeviceGetControllerInterface */
-            error = deviceHandle->controllerInterface->deviceRecv(deviceHandle->controllerHandle, endpointAddress, buffer, length);
+            error = deviceHandle->controllerInterface->deviceRecv(
+                deviceHandle->controllerHandle, endpointAddress, buffer, length);
         }
-        if (kStatus_USB_Success != error)
-        {
+        if (kStatus_USB_Success != error) {
             USB_OSA_ENTER_CRITICAL();
             deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy = 0U;
             USB_OSA_EXIT_CRITICAL();
         }
     }
-    else
-    {
+    else {
         error = kStatus_USB_ControllerNotFound;
     }
     return error;
@@ -319,21 +337,18 @@ static usb_status_t USB_DeviceTransfer(usb_device_handle handle, uint8_t endpoin
 static usb_status_t USB_DeviceControl(usb_device_handle handle, usb_device_control_type_t type, void *param)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                = kStatus_USB_Error;
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
-    if (NULL != deviceHandle->controllerInterface)
-    {
+    if (NULL != deviceHandle->controllerInterface) {
         /* Call the controller control interface. the controllerInterface is initialized in
         USB_DeviceGetControllerInterface */
         error = deviceHandle->controllerInterface->deviceControl(deviceHandle->controllerHandle, type, param);
     }
-    else
-    {
+    else {
         error = kStatus_USB_ControllerNotFound;
     }
     return error;
@@ -349,7 +364,8 @@ static usb_status_t USB_DeviceControl(usb_device_handle handle, usb_device_contr
  *
  * @retval kStatus_USB_Success              Get a device handle successfully.
  */
-static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle,
+                                                usb_device_callback_message_struct_t *message)
 {
 #if (defined(USB_DEVICE_CONFIG_USE_TASK) && (USB_DEVICE_CONFIG_USE_TASK > 0U))
     USB_OSA_SR_ALLOC();
@@ -375,14 +391,13 @@ static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle, usb
     USB_OSA_EXIT_CRITICAL();
 #endif
 
-    handle->state = kUSB_DeviceStateDefault;
+    handle->state         = kUSB_DeviceStateDefault;
     handle->deviceAddress = 0U;
 
-    for (uint32_t count = 0U; count < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); count++)
-    {
-        handle->epCallback[count].callbackFn = (usb_device_endpoint_callback_t)NULL;
+    for (uint32_t count = 0U; count < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); count++) {
+        handle->epCallback[count].callbackFn    = (usb_device_endpoint_callback_t)NULL;
         handle->epCallback[count].callbackParam = NULL;
-        handle->epCallback[count].isBusy = 0U;
+        handle->epCallback[count].isBusy        = 0U;
     }
 
     /* Call device callback to notify the application that the USB bus reset signal detected.
@@ -404,7 +419,8 @@ static usb_status_t USB_DeviceResetNotification(usb_device_struct_t *handle, usb
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceSuspendNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceSuspendNotification(usb_device_struct_t *handle,
+                                                  usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the USB bus suspend signal detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -421,7 +437,8 @@ static usb_status_t USB_DeviceSuspendNotification(usb_device_struct_t *handle, u
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceResumeNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceResumeNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the USB bus resume signal detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -438,7 +455,8 @@ static usb_status_t USB_DeviceResumeNotification(usb_device_struct_t *handle, us
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceSleepNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceSleepNotification(usb_device_struct_t *handle,
+                                                usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the USB bus suspend signal detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -483,7 +501,8 @@ usb_status_t USB_DeviceErrorNotification(usb_device_struct_t *handle, usb_device
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDetachNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDetachNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the device is disconnected from a host.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -500,7 +519,8 @@ static usb_status_t USB_DeviceDetachNotification(usb_device_struct_t *handle, us
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle,
+                                                 usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the device is connected to a host.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -508,8 +528,8 @@ static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle, us
 }
 #endif
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
-    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                                                         \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
+    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                 \
      (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)))
 /*!
  * @brief Handle the dcd module timeout notification.
@@ -521,7 +541,8 @@ static usb_status_t USB_DeviceAttachNotification(usb_device_struct_t *handle, us
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDcdTimeOutNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdTimeOutNotification(usb_device_struct_t *handle,
+                                                     usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the device charger detect timeout happened.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -538,7 +559,8 @@ static usb_status_t USB_DeviceDcdTimeOutNotification(usb_device_struct_t *handle
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDcdUnknownPortTypeNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdUnknownPortTypeNotification(usb_device_struct_t *handle,
+                                                             usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the device charger detect unknown port type happened.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -555,7 +577,8 @@ static usb_status_t USB_DeviceDcdUnknownPortTypeNotification(usb_device_struct_t
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDcdSDPDetectNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdSDPDetectNotification(usb_device_struct_t *handle,
+                                                       usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the SDP facility is detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -572,7 +595,8 @@ static usb_status_t USB_DeviceDcdSDPDetectNotification(usb_device_struct_t *hand
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDcdChargingPortDetectNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdChargingPortDetectNotification(usb_device_struct_t *handle,
+                                                                usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the charing port is detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -589,7 +613,8 @@ static usb_status_t USB_DeviceDcdChargingPortDetectNotification(usb_device_struc
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-static usb_status_t USB_DeviceDcdChargingHostDetectNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdChargingHostDetectNotification(usb_device_struct_t *handle,
+                                                                usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the CDP facility is detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -607,7 +632,8 @@ static usb_status_t USB_DeviceDcdChargingHostDetectNotification(usb_device_struc
  * @return A USB error code or kStatus_USB_Success.
  */
 
-static usb_status_t USB_DeviceDcdDedicatedChargerDetectNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
+static usb_status_t USB_DeviceDcdDedicatedChargerDetectNotification(usb_device_struct_t *handle,
+                                                                    usb_device_callback_message_struct_t *message)
 {
     /* Call device callback to notify the application that the DCP facility is detected.
     the deviceCallback is the second parameter of USB_DeviceInit */
@@ -627,12 +653,12 @@ static usb_status_t USB_DeviceDcdDedicatedChargerDetectNotification(usb_device_s
  */
 static usb_status_t USB_DeviceNotification(usb_device_struct_t *handle, usb_device_callback_message_struct_t *message)
 {
-    uint8_t endpoint = message->code & USB_ENDPOINT_NUMBER_MASK;
-    uint8_t direction = (message->code & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t endpoint  = message->code & USB_ENDPOINT_NUMBER_MASK;
+    uint8_t direction = (message->code & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
     usb_status_t error = kStatus_USB_Error;
 
-    switch (message->code)
-    {
+    switch (message->code) {
     case kUSB_DeviceNotifyBusReset:
         error = USB_DeviceResetNotification(handle, message);
         break;
@@ -664,8 +690,8 @@ static usb_status_t USB_DeviceNotification(usb_device_struct_t *handle, usb_devi
         error = USB_DeviceAttachNotification(handle, message);
         break;
 #endif
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
-    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                                                         \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
+    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                 \
      (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)))
     case kUSB_DeviceNotifyDcdTimeOut:
         error = USB_DeviceDcdTimeOutNotification(handle, message);
@@ -688,26 +714,24 @@ static usb_status_t USB_DeviceNotification(usb_device_struct_t *handle, usb_devi
 #endif
 
     default:
-        if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS)
-        {
-            if (handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn)
-            {
+        if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS) {
+            if (handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn) {
                 usb_device_endpoint_callback_message_struct_t endpointCallbackMessage;
-                endpointCallbackMessage.buffer = message->buffer;
-                endpointCallbackMessage.length = message->length;
+                endpointCallbackMessage.buffer  = message->buffer;
+                endpointCallbackMessage.length  = message->length;
                 endpointCallbackMessage.isSetup = message->isSetup;
-                if (message->isSetup)
-                {
+                if (message->isSetup) {
                     handle->epCallback[0].isBusy = 0U;
                     handle->epCallback[1].isBusy = 0U;
                 }
-                else
-                {
+                else {
                     handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy = 0U;
                 }
                 /* Call endpoint callback, callbackFn is in the third parameter of USB_DeviceInitEndpoint */
                 error = handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn(
-                    handle, &endpointCallbackMessage, handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackParam);
+                    handle,
+                    &endpointCallbackMessage,
+                    handle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackParam);
             }
         }
         break;
@@ -727,32 +751,27 @@ static usb_status_t USB_DeviceNotification(usb_device_struct_t *handle, usb_devi
  */
 usb_status_t USB_DeviceNotificationTrigger(void *handle, void *msg)
 {
-    usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
+    usb_device_struct_t *deviceHandle             = (usb_device_struct_t *)handle;
     usb_device_callback_message_struct_t *message = (usb_device_callback_message_struct_t *)msg;
 
-    if ((NULL == msg) || (NULL == handle))
-    {
+    if ((NULL == msg) || (NULL == handle)) {
         return kStatus_USB_InvalidHandle;
     }
 
     /* The device callback is invalid or not. */
-    if (!deviceHandle->deviceCallback)
-    {
+    if (!deviceHandle->deviceCallback) {
         return kStatus_USB_Error;
     }
 
 #if (defined(USB_DEVICE_CONFIG_USE_TASK) && (USB_DEVICE_CONFIG_USE_TASK > 0U))
-    if (deviceHandle->epCallbackDirectly)
-    {
-        if ((message->code & USB_ENDPOINT_NUMBER_MASK) && (!(message->code & 0x70U)))
-        {
+    if (deviceHandle->epCallbackDirectly) {
+        if ((message->code & USB_ENDPOINT_NUMBER_MASK) && (!(message->code & 0x70U))) {
             return USB_DeviceNotification(deviceHandle, message);
         }
     }
 
     /* Add the message to message queue when the device task is enabled. */
-    if (kStatus_USB_OSA_Success != USB_OsaMsgqSend(deviceHandle->notificationQueue, (void *)message))
-    {
+    if (kStatus_USB_OSA_Success != USB_OsaMsgqSend(deviceHandle->notificationQueue, (void *)message)) {
         return kStatus_USB_Busy;
     }
     return kStatus_USB_Success;
@@ -787,16 +806,14 @@ usb_status_t USB_DeviceInit(uint8_t controllerId, usb_device_callback_t deviceCa
     usb_status_t error;
     uint32_t count;
 
-    if (NULL == handle)
-    {
+    if (NULL == handle) {
         return kStatus_USB_InvalidHandle;
     }
 
     /* Allocate a device handle by using the controller id. */
     error = USB_DeviceAllocateHandle(controllerId, &deviceHandle);
 
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         return error;
     }
 
@@ -810,22 +827,19 @@ usb_status_t USB_DeviceInit(uint8_t controllerId, usb_device_callback_t deviceCa
     deviceHandle->isResetting = 0U;
 
     /* Initialize the endpoints */
-    for (count = 0U; count < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); count++)
-    {
-        deviceHandle->epCallback[count].callbackFn = (usb_device_endpoint_callback_t)NULL;
+    for (count = 0U; count < (USB_DEVICE_CONFIG_ENDPOINTS * 2U); count++) {
+        deviceHandle->epCallback[count].callbackFn    = (usb_device_endpoint_callback_t)NULL;
         deviceHandle->epCallback[count].callbackParam = NULL;
-        deviceHandle->epCallback[count].isBusy = 0U;
+        deviceHandle->epCallback[count].isBusy        = 0U;
     }
 
     /* Get the controller interface according to the controller id */
     error = USB_DeviceGetControllerInterface(controllerId, &deviceHandle->controllerInterface);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         USB_DeviceFreeHandle(deviceHandle);
         return error;
     }
-    if (NULL == deviceHandle->controllerInterface)
-    {
+    if (NULL == deviceHandle->controllerInterface) {
         USB_DeviceFreeHandle(deviceHandle);
         return kStatus_USB_ControllerNotFound;
     }
@@ -834,17 +848,17 @@ usb_status_t USB_DeviceInit(uint8_t controllerId, usb_device_callback_t deviceCa
         ((usb_device_controller_send_t)NULL == deviceHandle->controllerInterface->deviceSend) ||
         ((usb_device_controller_recv_t)NULL == deviceHandle->controllerInterface->deviceRecv) ||
         ((usb_device_controller_cancel_t)NULL == deviceHandle->controllerInterface->deviceCancel) ||
-        ((usb_device_controller_control_t)NULL == deviceHandle->controllerInterface->deviceControl))
-    {
+        ((usb_device_controller_control_t)NULL == deviceHandle->controllerInterface->deviceControl)) {
         USB_DeviceFreeHandle(deviceHandle);
         return kStatus_USB_InvalidControllerInterface;
     }
 
 #if USB_DEVICE_CONFIG_USE_TASK
     /* Create a message queue when the device handle is enabled. */
-    if (kStatus_USB_OSA_Success != USB_OsaMsgqCreate(&deviceHandle->notificationQueue, USB_DEVICE_CONFIG_MAX_MESSAGES,
-                                                     (1U + (sizeof(usb_device_callback_message_struct_t) - 1U) / sizeof(uint32_t))))
-    {
+    if (kStatus_USB_OSA_Success !=
+        USB_OsaMsgqCreate(&deviceHandle->notificationQueue,
+                          USB_DEVICE_CONFIG_MAX_MESSAGES,
+                          (1U + (sizeof(usb_device_callback_message_struct_t) - 1U) / sizeof(uint32_t)))) {
         USB_DeviceDeinit(deviceHandle);
         return kStatus_USB_Error;
     }
@@ -854,8 +868,7 @@ usb_status_t USB_DeviceInit(uint8_t controllerId, usb_device_callback_t deviceCa
 
     /* Initialize the controller, the callbackFn is initialized in USB_DeviceGetControllerInterface */
     error = deviceHandle->controllerInterface->deviceInit(controllerId, deviceHandle, &deviceHandle->controllerHandle);
-    if (kStatus_USB_Success != error)
-    {
+    if (kStatus_USB_Success != error) {
         USB_DeviceDeinit(deviceHandle);
         *handle = NULL;
         return error;
@@ -913,13 +926,11 @@ usb_status_t USB_DeviceDeinit(usb_device_handle handle)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
     /* De-initialize the controller */
-    if (NULL != deviceHandle->controllerInterface)
-    {
+    if (NULL != deviceHandle->controllerInterface) {
         /* the callbackFn is initialized in USB_DeviceGetControllerInterface */
         deviceHandle->controllerInterface->deviceDeinit(deviceHandle->controllerHandle);
         deviceHandle->controllerInterface = (usb_device_controller_interface_struct_t *)NULL;
@@ -927,8 +938,7 @@ usb_status_t USB_DeviceDeinit(usb_device_handle handle)
 
 #if USB_DEVICE_CONFIG_USE_TASK
     /* Destroy the message queue. */
-    if (NULL != deviceHandle->notificationQueue)
-    {
+    if (NULL != deviceHandle->notificationQueue) {
         USB_OsaMsgqDestroy(deviceHandle->notificationQueue);
         deviceHandle->notificationQueue = NULL;
     }
@@ -965,7 +975,10 @@ usb_status_t USB_DeviceDeinit(usb_device_handle handle)
  */
 usb_status_t USB_DeviceSendRequest(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
 {
-    return USB_DeviceTransfer(handle, (endpointAddress & USB_ENDPOINT_NUMBER_MASK) | (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT), buffer,
+    return USB_DeviceTransfer(handle,
+                              (endpointAddress & USB_ENDPOINT_NUMBER_MASK) |
+                                  (USB_IN << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT),
+                              buffer,
                               length);
 }
 
@@ -995,7 +1008,10 @@ usb_status_t USB_DeviceSendRequest(usb_device_handle handle, uint8_t endpointAdd
  */
 usb_status_t USB_DeviceRecvRequest(usb_device_handle handle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length)
 {
-    return USB_DeviceTransfer(handle, (endpointAddress & USB_ENDPOINT_NUMBER_MASK) | (USB_OUT << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT), buffer,
+    return USB_DeviceTransfer(handle,
+                              (endpointAddress & USB_ENDPOINT_NUMBER_MASK) |
+                                  (USB_OUT << USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT),
+                              buffer,
                               length);
 }
 
@@ -1014,20 +1030,17 @@ usb_status_t USB_DeviceRecvRequest(usb_device_handle handle, uint8_t endpointAdd
 usb_status_t USB_DeviceCancel(usb_device_handle handle, uint8_t endpointAddress)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
-    usb_status_t error = kStatus_USB_Error;
+    usb_status_t error                = kStatus_USB_Error;
 
-    if (NULL == deviceHandle)
-    {
+    if (NULL == deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
-    if (NULL != deviceHandle->controllerInterface)
-    {
+    if (NULL != deviceHandle->controllerInterface) {
         /* the callbackFn is initialized in USB_DeviceGetControllerInterface */
         error = deviceHandle->controllerInterface->deviceCancel(deviceHandle->controllerHandle, endpointAddress);
     }
-    else
-    {
+    else {
         error = kStatus_USB_ControllerNotFound;
     }
     return error;
@@ -1050,33 +1063,33 @@ usb_status_t USB_DeviceCancel(usb_device_handle handle, uint8_t endpointAddress)
  * @retval kStatus_USB_Busy                 The endpoint is busy in EHCI driver.
  * @retval kStatus_USB_ControllerNotFound   Cannot find the controller.
  */
-usb_status_t USB_DeviceInitEndpoint(usb_device_handle handle, usb_device_endpoint_init_struct_t *epInit, usb_device_endpoint_callback_struct_t *epCallback)
+usb_status_t USB_DeviceInitEndpoint(usb_device_handle handle,
+                                    usb_device_endpoint_init_struct_t *epInit,
+                                    usb_device_endpoint_callback_struct_t *epCallback)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
     uint8_t endpoint;
     uint8_t direction;
 
-    if (!deviceHandle)
-    {
+    if (!deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
 
-    if ((!epInit) || (!epCallback))
-    {
+    if ((!epInit) || (!epCallback)) {
         return kStatus_USB_InvalidParameter;
     }
 
-    endpoint = epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK;
-    direction = (epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    endpoint  = epInit->endpointAddress & USB_ENDPOINT_NUMBER_MASK;
+    direction = (epInit->endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
 
-    if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS)
-    {
+    if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS) {
         deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn = epCallback->callbackFn;
-        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackParam = epCallback->callbackParam;
+        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackParam =
+            epCallback->callbackParam;
         deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy = 0U;
     }
-    else
-    {
+    else {
         return kStatus_USB_InvalidParameter;
     }
     return USB_DeviceControl(handle, kUSB_DeviceControlEndpointInit, epInit);
@@ -1099,15 +1112,15 @@ usb_status_t USB_DeviceInitEndpoint(usb_device_handle handle, usb_device_endpoin
 usb_status_t USB_DeviceDeinitEndpoint(usb_device_handle handle, uint8_t endpointAddress)
 {
     usb_device_struct_t *deviceHandle = (usb_device_struct_t *)handle;
-    uint8_t endpoint = endpointAddress & USB_ENDPOINT_NUMBER_MASK;
-    uint8_t direction = (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >> USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
+    uint8_t endpoint                  = endpointAddress & USB_ENDPOINT_NUMBER_MASK;
+    uint8_t direction                 = (endpointAddress & USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK) >>
+                        USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT;
     usb_status_t error = kStatus_USB_Error;
 #if (defined(USB_DEVICE_CONFIG_USE_TASK) && (USB_DEVICE_CONFIG_USE_TASK > 0U))
     USB_OSA_SR_ALLOC();
 #endif
 
-    if (!deviceHandle)
-    {
+    if (!deviceHandle) {
         return kStatus_USB_InvalidHandle;
     }
 #if (defined(USB_DEVICE_CONFIG_USE_TASK) && (USB_DEVICE_CONFIG_USE_TASK > 0U))
@@ -1122,14 +1135,13 @@ usb_status_t USB_DeviceDeinitEndpoint(usb_device_handle handle, uint8_t endpoint
     USB_OSA_EXIT_CRITICAL();
 #endif
 
-    if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS)
-    {
-        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn = (usb_device_endpoint_callback_t)NULL;
+    if (endpoint < USB_DEVICE_CONFIG_ENDPOINTS) {
+        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackFn =
+            (usb_device_endpoint_callback_t)NULL;
         deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].callbackParam = NULL;
-        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy = 0U;
+        deviceHandle->epCallback[(uint8_t)((uint32_t)endpoint << 1U) | direction].isBusy        = 0U;
     }
-    else
-    {
+    else {
         return kStatus_USB_InvalidParameter;
     }
     return error;
@@ -1150,12 +1162,10 @@ usb_status_t USB_DeviceDeinitEndpoint(usb_device_handle handle, uint8_t endpoint
  */
 usb_status_t USB_DeviceStallEndpoint(usb_device_handle handle, uint8_t endpointAddress)
 {
-    if ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) < USB_DEVICE_CONFIG_ENDPOINTS)
-    {
+    if ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) < USB_DEVICE_CONFIG_ENDPOINTS) {
         return USB_DeviceControl(handle, kUSB_DeviceControlEndpointStall, &endpointAddress);
     }
-    else
-    {
+    else {
         return kStatus_USB_InvalidParameter;
     }
 }
@@ -1175,12 +1185,10 @@ usb_status_t USB_DeviceStallEndpoint(usb_device_handle handle, uint8_t endpointA
  */
 usb_status_t USB_DeviceUnstallEndpoint(usb_device_handle handle, uint8_t endpointAddress)
 {
-    if ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) < USB_DEVICE_CONFIG_ENDPOINTS)
-    {
+    if ((endpointAddress & USB_ENDPOINT_NUMBER_MASK) < USB_DEVICE_CONFIG_ENDPOINTS) {
         return USB_DeviceControl(handle, kUSB_DeviceControlEndpointUnstall, &endpointAddress);
     }
-    else
-    {
+    else {
         return kStatus_USB_InvalidParameter;
     }
 }
@@ -1205,12 +1213,10 @@ usb_status_t USB_DeviceGetStatus(usb_device_handle handle, usb_device_status_t t
     uint8_t *temp8;
     usb_status_t error = kStatus_USB_Error;
 
-    if (NULL == param)
-    {
+    if (NULL == param) {
         return kStatus_USB_InvalidParameter;
     }
-    switch (type)
-    {
+    switch (type) {
     case kUSB_DeviceStatusSpeed:
         error = USB_DeviceControl(handle, kUSB_DeviceControlGetSpeed, param);
         break;
@@ -1218,13 +1224,13 @@ usb_status_t USB_DeviceGetStatus(usb_device_handle handle, usb_device_status_t t
         error = USB_DeviceControl(handle, kUSB_DeviceControlGetOtgStatus, param);
         break;
     case kUSB_DeviceStatusDeviceState:
-        temp8 = (uint8_t *)param;
-        error = kStatus_USB_Success;
+        temp8  = (uint8_t *)param;
+        error  = kStatus_USB_Success;
         *temp8 = ((usb_device_struct_t *)handle)->state;
         break;
     case kUSB_DeviceStatusAddress:
-        temp8 = (uint8_t *)param;
-        error = kStatus_USB_Success;
+        temp8  = (uint8_t *)param;
+        error  = kStatus_USB_Success;
         *temp8 = ((usb_device_struct_t *)handle)->deviceAddress;
         break;
     case kUSB_DeviceStatusDevice:
@@ -1238,8 +1244,8 @@ usb_status_t USB_DeviceGetStatus(usb_device_handle handle, usb_device_status_t t
         break;
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
     case kUSB_DeviceStatusRemoteWakeup:
-        temp8 = (uint8_t *)param;
-        error = kStatus_USB_Success;
+        temp8  = (uint8_t *)param;
+        error  = kStatus_USB_Success;
         *temp8 = ((usb_device_struct_t *)handle)->remotewakeup;
         break;
 #endif
@@ -1266,9 +1272,9 @@ usb_status_t USB_DeviceGetStatus(usb_device_handle handle, usb_device_status_t t
 usb_status_t USB_DeviceSetStatus(usb_device_handle handle, usb_device_status_t type, void *param)
 {
     usb_status_t error = kStatus_USB_Error;
-    switch (type)
-    {
-#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) || (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&  \
+    switch (type) {
+#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) ||                                               \
+     (defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) &&                              \
     (defined(USB_DEVICE_CONFIG_USB20_TEST_MODE) && (USB_DEVICE_CONFIG_USB20_TEST_MODE > 0U))
     case kUSB_DeviceStatusTestMode:
         error = USB_DeviceControl(handle, kUSB_DeviceControlSetTestMode, param);
@@ -1278,26 +1284,24 @@ usb_status_t USB_DeviceSetStatus(usb_device_handle handle, usb_device_status_t t
         error = USB_DeviceControl(handle, kUSB_DeviceControlSetOtgStatus, param);
         break;
     case kUSB_DeviceStatusDeviceState:
-        if (NULL != param)
-        {
-            error = kStatus_USB_Success;
+        if (NULL != param) {
+            error                                  = kStatus_USB_Success;
             ((usb_device_struct_t *)handle)->state = (uint8_t)(*(uint8_t *)param);
         }
         break;
     case kUSB_DeviceStatusAddress:
-        if (kUSB_DeviceStateAddressing != ((usb_device_struct_t *)handle)->state)
-        {
-            if (NULL != param)
-            {
-                error = kStatus_USB_Success;
+        if (kUSB_DeviceStateAddressing != ((usb_device_struct_t *)handle)->state) {
+            if (NULL != param) {
+                error                                          = kStatus_USB_Success;
                 ((usb_device_struct_t *)handle)->deviceAddress = (uint8_t)(*(uint8_t *)param);
-                ((usb_device_struct_t *)handle)->state = kUSB_DeviceStateAddressing;
-                USB_DeviceControl(handle, kUSB_DeviceControlPreSetDeviceAddress, &((usb_device_struct_t *)handle)->deviceAddress);
+                ((usb_device_struct_t *)handle)->state         = kUSB_DeviceStateAddressing;
+                USB_DeviceControl(
+                    handle, kUSB_DeviceControlPreSetDeviceAddress, &((usb_device_struct_t *)handle)->deviceAddress);
             }
         }
-        else
-        {
-            error = USB_DeviceControl(handle, kUSB_DeviceControlSetDeviceAddress, &((usb_device_struct_t *)handle)->deviceAddress);
+        else {
+            error = USB_DeviceControl(
+                handle, kUSB_DeviceControlSetDeviceAddress, &((usb_device_struct_t *)handle)->deviceAddress);
         }
         break;
     case kUSB_DeviceStatusBusResume:
@@ -1308,9 +1312,8 @@ usb_status_t USB_DeviceSetStatus(usb_device_handle handle, usb_device_status_t t
         break;
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
     case kUSB_DeviceStatusRemoteWakeup:
-        if (NULL != param)
-        {
-            error = kStatus_USB_Success;
+        if (NULL != param) {
+            error                                         = kStatus_USB_Success;
             ((usb_device_struct_t *)handle)->remotewakeup = (uint8_t)(*(uint8_t *)param);
         }
         break;
@@ -1327,8 +1330,8 @@ usb_status_t USB_DeviceSetStatus(usb_device_handle handle, usb_device_status_t t
     return error;
 }
 
-#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                                                                  \
-    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                                                         \
+#if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) &&                          \
+    ((defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) ||                                 \
      (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)))
 /*!
  * @brief Initializes the device dcd module.
@@ -1378,11 +1381,9 @@ void USB_DeviceTaskFunction(void *deviceHandle)
     usb_device_struct_t *handle = (usb_device_struct_t *)deviceHandle;
     static usb_device_callback_message_struct_t message;
 
-    if (deviceHandle)
-    {
+    if (deviceHandle) {
         /* Get the message from the queue */
-        if (kStatus_USB_OSA_Success == USB_OsaMsgqRecv(handle->notificationQueue, (uint32_t *)&message, 0U))
-        {
+        if (kStatus_USB_OSA_Success == USB_OsaMsgqRecv(handle->notificationQueue, (uint32_t *)&message, 0U)) {
             /* Handle the message */
             USB_DeviceNotification(handle, &message);
         }
@@ -1400,9 +1401,9 @@ void USB_DeviceTaskFunction(void *deviceHandle)
  */
 void USB_DeviceGetVersion(uint32_t *version)
 {
-    if (version)
-    {
-        *version = (uint32_t)USB_MAKE_VERSION(USB_STACK_VERSION_MAJOR, USB_STACK_VERSION_MINOR, USB_STACK_VERSION_BUGFIX);
+    if (version) {
+        *version =
+            (uint32_t)USB_MAKE_VERSION(USB_STACK_VERSION_MAJOR, USB_STACK_VERSION_MINOR, USB_STACK_VERSION_BUGFIX);
     }
 }
 
@@ -1421,8 +1422,7 @@ usb_status_t USB_DeviceUpdateHwTick(usb_device_handle handle, uint64_t tick)
     usb_device_struct_t *deviceHandle;
     usb_status_t status = kStatus_USB_Success;
 
-    if (handle == NULL)
-    {
+    if (handle == NULL) {
         return kStatus_USB_InvalidHandle;
     }
     deviceHandle = (usb_device_struct_t *)handle;
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.h
index 0071fb4e7..dba5165cf 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/device/source/usb_device_dci.h
@@ -82,22 +82,33 @@ typedef enum _usb_device_control_type
 } usb_device_control_type_t;
 
 /*! @brief USB device controller initialization function typedef */
-typedef usb_status_t (*usb_device_controller_init_t)(uint8_t controllerId, usb_device_handle handle, usb_device_controller_handle *controllerHandle);
+typedef usb_status_t (*usb_device_controller_init_t)(uint8_t controllerId,
+                                                     usb_device_handle handle,
+                                                     usb_device_controller_handle *controllerHandle);
 
 /*! @brief USB device controller de-initialization function typedef */
 typedef usb_status_t (*usb_device_controller_deinit_t)(usb_device_controller_handle controllerHandle);
 
 /*! @brief USB device controller send data function typedef */
-typedef usb_status_t (*usb_device_controller_send_t)(usb_device_controller_handle controllerHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+typedef usb_status_t (*usb_device_controller_send_t)(usb_device_controller_handle controllerHandle,
+                                                     uint8_t endpointAddress,
+                                                     uint8_t *buffer,
+                                                     uint32_t length);
 
 /*! @brief USB device controller receive data function typedef */
-typedef usb_status_t (*usb_device_controller_recv_t)(usb_device_controller_handle controllerHandle, uint8_t endpointAddress, uint8_t *buffer, uint32_t length);
+typedef usb_status_t (*usb_device_controller_recv_t)(usb_device_controller_handle controllerHandle,
+                                                     uint8_t endpointAddress,
+                                                     uint8_t *buffer,
+                                                     uint32_t length);
 
 /*! @brief USB device controller cancel transfer function in a specified endpoint typedef */
-typedef usb_status_t (*usb_device_controller_cancel_t)(usb_device_controller_handle controllerHandle, uint8_t endpointAddress);
+typedef usb_status_t (*usb_device_controller_cancel_t)(usb_device_controller_handle controllerHandle,
+                                                       uint8_t endpointAddress);
 
 /*! @brief USB device controller control function typedef */
-typedef usb_status_t (*usb_device_controller_control_t)(usb_device_controller_handle controllerHandle, usb_device_control_type_t command, void *param);
+typedef usb_status_t (*usb_device_controller_control_t)(usb_device_controller_handle controllerHandle,
+                                                        usb_device_control_type_t command,
+                                                        void *param);
 
 /*! @brief USB device controller interface structure */
 typedef struct _usb_device_controller_interface_struct
@@ -121,11 +132,12 @@ typedef struct _usb_device_struct
 #if USB_DEVICE_CONFIG_USE_TASK
     usb_osa_msgq_handle notificationQueue; /*!< Message queue */
 #endif
-    usb_device_callback_t deviceCallback;                                                /*!< Device callback function pointer */
-    usb_device_endpoint_callback_struct_t epCallback[USB_DEVICE_CONFIG_ENDPOINTS << 1U]; /*!< Endpoint callback function structure */
-    uint8_t deviceAddress;                                                               /*!< Current device address */
-    uint8_t controllerId;                                                                /*!< Controller ID */
-    uint8_t state;                                                                       /*!< Current device state */
+    usb_device_callback_t deviceCallback; /*!< Device callback function pointer */
+    usb_device_endpoint_callback_struct_t
+        epCallback[USB_DEVICE_CONFIG_ENDPOINTS << 1U]; /*!< Endpoint callback function structure */
+    uint8_t deviceAddress;                             /*!< Current device address */
+    uint8_t controllerId;                              /*!< Controller ID */
+    uint8_t state;                                     /*!< Current device state */
 #if ((defined(USB_DEVICE_CONFIG_REMOTE_WAKEUP)) && (USB_DEVICE_CONFIG_REMOTE_WAKEUP > 0U))
     uint8_t remotewakeup; /*!< Remote wakeup is enabled or not */
 #endif
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb.h
index 5877e9ca5..df12821db 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb.h
@@ -86,23 +86,23 @@ typedef enum _usb_controller_index
                                   to be used in the future. */
 
     kUSB_ControllerLpcIp3511Fs0 = 4U, /*!< LPC USB IP3511 FS controller 0 */
-    kUSB_ControllerLpcIp3511Fs1 = 5U, /*!< LPC USB IP3511 FS controller 1, there are no platforms which have two IP3511 IPs, this is reserved
-                                        to be used in the future. */
+    kUSB_ControllerLpcIp3511Fs1 = 5U, /*!< LPC USB IP3511 FS controller 1, there are no platforms which have two IP3511
+                                        IPs, this is reserved to be used in the future. */
 
     kUSB_ControllerLpcIp3511Hs0 = 6U, /*!< LPC USB IP3511 HS controller 0 */
-    kUSB_ControllerLpcIp3511Hs1 = 7U, /*!< LPC USB IP3511 HS controller 1, there are no platforms which have two IP3511 IPs, this is reserved
-                                        to be used in the future. */
+    kUSB_ControllerLpcIp3511Hs1 = 7U, /*!< LPC USB IP3511 HS controller 1, there are no platforms which have two IP3511
+                                        IPs, this is reserved to be used in the future. */
 
     kUSB_ControllerOhci0 = 8U, /*!< OHCI 0U */
     kUSB_ControllerOhci1 = 9U, /*!< OHCI 1U, Currently, there are no platforms which have two OHCI IPs, this is reserved
                                   to be used in the future. */
 
     kUSB_ControllerIp3516Hs0 = 10U, /*!< IP3516HS 0U */
-    kUSB_ControllerIp3516Hs1 = 11U, /*!< IP3516HS 1U, Currently, there are no platforms which have two IP3516HS IPs, this is reserved
-                                  to be used in the future. */
+    kUSB_ControllerIp3516Hs1 = 11U, /*!< IP3516HS 1U, Currently, there are no platforms which have two IP3516HS IPs,
+                                  this is reserved to be used in the future. */
     kUSB_ControllerDwc30 = 12U,     /*!< DWC3 0U */
-    kUSB_ControllerDwc31 = 13U,     /*!< DWC3 1U Currently, there are no platforms which have two Dwc IPs, this is reserved
-                                  to be used in the future.*/
+    kUSB_ControllerDwc31 = 13U, /*!< DWC3 1U Currently, there are no platforms which have two Dwc IPs, this is reserved
+                              to be used in the future.*/
 } usb_controller_index_t;
 
 /**
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_cdc_acm.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_cdc_acm.h
index 8e4b464b4..9d5413a88 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_cdc_acm.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_cdc_acm.h
@@ -16,87 +16,104 @@
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
-#define USB_DEVICE_CONFIG_CDC_ACM_MAX_INSTANCE (1)   /*!< The maximum number of CDC device instance. */
-#define USB_DEVICE_CONFIG_CDC_COMM_CLASS_CODE (0x02) /*!< The CDC communication class code. */
-#define USB_DEVICE_CONFIG_CDC_DATA_CLASS_CODE (0x0A) /*!< The CDC data class code. */
+#define USB_DEVICE_CONFIG_CDC_ACM_MAX_INSTANCE (1)    /*!< The maximum number of CDC device instance. */
+#define USB_DEVICE_CONFIG_CDC_COMM_CLASS_CODE  (0x02) /*!< The CDC communication class code. */
+#define USB_DEVICE_CONFIG_CDC_DATA_CLASS_CODE  (0x0A) /*!< The CDC data class code. */
 
-#define USB_DEVICE_CDC_REQUEST_SEND_ENCAPSULATED_COMMAND (0x00)      /*!< The CDC class request code for SEND_ENCAPSULATED_COMMAND. */
-#define USB_DEVICE_CDC_REQUEST_GET_ENCAPSULATED_RESPONSE (0x01)      /*!< The CDC class request code for GET_ENCAPSULATED_RESPONSE. */
-#define USB_DEVICE_CDC_REQUEST_SET_COMM_FEATURE (0x02)               /*!< The CDC class request code for SET_COMM_FEATURE. */
-#define USB_DEVICE_CDC_REQUEST_GET_COMM_FEATURE (0x03)               /*!< The CDC class request code for GET_COMM_FEATURE. */
-#define USB_DEVICE_CDC_REQUEST_CLEAR_COMM_FEATURE (0x04)             /*!< The CDC class request code for CLEAR_COMM_FEATURE. */
-#define USB_DEVICE_CDC_REQUEST_SET_AUX_LINE_STATE (0x10)             /*!< The CDC class request code for SET_AUX_LINE_STATE. */
-#define USB_DEVICE_CDC_REQUEST_SET_HOOK_STATE (0x11)                 /*!< The CDC class request code for SET_HOOK_STATE. */
-#define USB_DEVICE_CDC_REQUEST_PULSE_SETUP (0x12)                    /*!< The CDC class request code for PULSE_SETUP. */
-#define USB_DEVICE_CDC_REQUEST_SEND_PULSE (0x13)                     /*!< The CDC class request code for SEND_PULSE. */
-#define USB_DEVICE_CDC_REQUEST_SET_PULSE_TIME (0x14)                 /*!< The CDC class request code for SET_PULSE_TIME. */
-#define USB_DEVICE_CDC_REQUEST_RING_AUX_JACK (0x15)                  /*!< The CDC class request code for RING_AUX_JACK. */
-#define USB_DEVICE_CDC_REQUEST_SET_LINE_CODING (0x20)                /*!< The CDC class request code for SET_LINE_CODING. */
-#define USB_DEVICE_CDC_REQUEST_GET_LINE_CODING (0x21)                /*!< The CDC class request code for GET_LINE_CODING. */
-#define USB_DEVICE_CDC_REQUEST_SET_CONTROL_LINE_STATE (0x22)         /*!< The CDC class request code for SET_CONTROL_LINE_STATE. */
-#define USB_DEVICE_CDC_REQUEST_SEND_BREAK (0x23)                     /*!< The CDC class request code for SEND_BREAK. */
-#define USB_DEVICE_CDC_REQUEST_SET_RINGER_PARAMS (0x30)              /*!< The CDC class request code for SET_RINGER_PARAMS. */
-#define USB_DEVICE_CDC_REQUEST_GET_RINGER_PARAMS (0x31)              /*!< The CDC class request code for GET_RINGER_PARAMS. */
-#define USB_DEVICE_CDC_REQUEST_SET_OPERATION_PARAM (0x32)            /*!< The CDC class request code for SET_OPERATION_PARAM. */
-#define USB_DEVICE_CDC_REQUEST_GET_OPERATION_PARAM (0x33)            /*!< The CDC class request code for GET_OPERATION_PARAM. */
-#define USB_DEVICE_CDC_REQUEST_SET_LINE_PARAMS (0x34)                /*!< The CDC class request code for SET_LINE_PARAMS. */
-#define USB_DEVICE_CDC_REQUEST_GET_LINE_PARAMS (0x35)                /*!< The CDC class request code for GET_LINE_PARAMS. */
-#define USB_DEVICE_CDC_REQUEST_DIAL_DIGITS (0x36)                    /*!< The CDC class request code for DIAL_DIGITS. */
-#define USB_DEVICE_CDC_REQUEST_SET_UNIT_PARAMETER (0x37)             /*!< The CDC class request code for SET_UNIT_PARAMETER. */
-#define USB_DEVICE_CDC_REQUEST_GET_UNIT_PARAMETER (0x38)             /*!< The CDC class request code for GET_UNIT_PARAMETER. */
-#define USB_DEVICE_CDC_REQUEST_CLEAR_UNIT_PARAMETER (0x39)           /*!< The CDC class request code for CLEAR_UNIT_PARAMETER. */
-#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_MULTICAST_FILTERS (0x40) /*!< The CDC class request code for SET_ETHERNET_MULTICAST_FILTERS. */
-#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_POW_PATTER_FILTER (0x41) /*!< The CDC class request code for SET_ETHERNET_POW_PATTER_FILTER. */
-#define USB_DEVICE_CDC_REQUEST_GET_ETHERNET_POW_PATTER_FILTER (0x42) /*!< The CDC class request code for GET_ETHERNET_POW_PATTER_FILTER. */
-#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_PACKET_FILTER (0x43)     /*!< The CDC class request code for SET_ETHERNET_PACKET_FILTER. */
-#define USB_DEVICE_CDC_REQUEST_GET_ETHERNET_STATISTIC (0x44)         /*!< The CDC class request code for GET_ETHERNET_STATISTIC. */
-#define USB_DEVICE_CDC_REQUEST_SET_ATM_DATA_FORMAT (0x50)            /*!< The CDC class request code for SET_ATM_DATA_FORMAT. */
-#define USB_DEVICE_CDC_REQUEST_GET_ATM_DEVICE_STATISTICS (0x51)      /*!< The CDC class request code for GET_ATM_DEVICE_STATISTICS. */
-#define USB_DEVICE_CDC_REQUEST_SET_ATM_DEFAULT_VC (0x52)             /*!< The CDC class request code for SET_ATM_DEFAULT_VC. */
-#define USB_DEVICE_CDC_REQUEST_GET_ATM_VC_STATISTICS (0x53)          /*!< The CDC class request code for GET_ATM_VC_STATISTICS. */
-#define USB_DEVICE_CDC_REQUEST_MDLM_SPECIFIC_REQUESTS_MASK (0x7F)    /*!< The CDC class request code for MDLM_SPECIFIC_REQUESTS_MASK. */
+#define USB_DEVICE_CDC_REQUEST_SEND_ENCAPSULATED_COMMAND                                                               \
+    (0x00) /*!< The CDC class request code for SEND_ENCAPSULATED_COMMAND. */
+#define USB_DEVICE_CDC_REQUEST_GET_ENCAPSULATED_RESPONSE                                                               \
+    (0x01) /*!< The CDC class request code for GET_ENCAPSULATED_RESPONSE. */
+#define USB_DEVICE_CDC_REQUEST_SET_COMM_FEATURE   (0x02) /*!< The CDC class request code for SET_COMM_FEATURE. */
+#define USB_DEVICE_CDC_REQUEST_GET_COMM_FEATURE   (0x03) /*!< The CDC class request code for GET_COMM_FEATURE. */
+#define USB_DEVICE_CDC_REQUEST_CLEAR_COMM_FEATURE (0x04) /*!< The CDC class request code for CLEAR_COMM_FEATURE. */
+#define USB_DEVICE_CDC_REQUEST_SET_AUX_LINE_STATE (0x10) /*!< The CDC class request code for SET_AUX_LINE_STATE. */
+#define USB_DEVICE_CDC_REQUEST_SET_HOOK_STATE     (0x11) /*!< The CDC class request code for SET_HOOK_STATE. */
+#define USB_DEVICE_CDC_REQUEST_PULSE_SETUP        (0x12) /*!< The CDC class request code for PULSE_SETUP. */
+#define USB_DEVICE_CDC_REQUEST_SEND_PULSE         (0x13) /*!< The CDC class request code for SEND_PULSE. */
+#define USB_DEVICE_CDC_REQUEST_SET_PULSE_TIME     (0x14) /*!< The CDC class request code for SET_PULSE_TIME. */
+#define USB_DEVICE_CDC_REQUEST_RING_AUX_JACK      (0x15) /*!< The CDC class request code for RING_AUX_JACK. */
+#define USB_DEVICE_CDC_REQUEST_SET_LINE_CODING    (0x20) /*!< The CDC class request code for SET_LINE_CODING. */
+#define USB_DEVICE_CDC_REQUEST_GET_LINE_CODING    (0x21) /*!< The CDC class request code for GET_LINE_CODING. */
+#define USB_DEVICE_CDC_REQUEST_SET_CONTROL_LINE_STATE                                                                  \
+    (0x22) /*!< The CDC class request code for SET_CONTROL_LINE_STATE. */
+#define USB_DEVICE_CDC_REQUEST_SEND_BREAK           (0x23) /*!< The CDC class request code for SEND_BREAK. */
+#define USB_DEVICE_CDC_REQUEST_SET_RINGER_PARAMS    (0x30) /*!< The CDC class request code for SET_RINGER_PARAMS. */
+#define USB_DEVICE_CDC_REQUEST_GET_RINGER_PARAMS    (0x31) /*!< The CDC class request code for GET_RINGER_PARAMS. */
+#define USB_DEVICE_CDC_REQUEST_SET_OPERATION_PARAM  (0x32) /*!< The CDC class request code for SET_OPERATION_PARAM. */
+#define USB_DEVICE_CDC_REQUEST_GET_OPERATION_PARAM  (0x33) /*!< The CDC class request code for GET_OPERATION_PARAM. */
+#define USB_DEVICE_CDC_REQUEST_SET_LINE_PARAMS      (0x34) /*!< The CDC class request code for SET_LINE_PARAMS. */
+#define USB_DEVICE_CDC_REQUEST_GET_LINE_PARAMS      (0x35) /*!< The CDC class request code for GET_LINE_PARAMS. */
+#define USB_DEVICE_CDC_REQUEST_DIAL_DIGITS          (0x36) /*!< The CDC class request code for DIAL_DIGITS. */
+#define USB_DEVICE_CDC_REQUEST_SET_UNIT_PARAMETER   (0x37) /*!< The CDC class request code for SET_UNIT_PARAMETER. */
+#define USB_DEVICE_CDC_REQUEST_GET_UNIT_PARAMETER   (0x38) /*!< The CDC class request code for GET_UNIT_PARAMETER. */
+#define USB_DEVICE_CDC_REQUEST_CLEAR_UNIT_PARAMETER (0x39) /*!< The CDC class request code for CLEAR_UNIT_PARAMETER.   \
+                                                            */
+#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_MULTICAST_FILTERS                                                          \
+    (0x40) /*!< The CDC class request code for SET_ETHERNET_MULTICAST_FILTERS. */
+#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_POW_PATTER_FILTER                                                          \
+    (0x41) /*!< The CDC class request code for SET_ETHERNET_POW_PATTER_FILTER. */
+#define USB_DEVICE_CDC_REQUEST_GET_ETHERNET_POW_PATTER_FILTER                                                          \
+    (0x42) /*!< The CDC class request code for GET_ETHERNET_POW_PATTER_FILTER. */
+#define USB_DEVICE_CDC_REQUEST_SET_ETHERNET_PACKET_FILTER                                                              \
+    (0x43) /*!< The CDC class request code for SET_ETHERNET_PACKET_FILTER. */
+#define USB_DEVICE_CDC_REQUEST_GET_ETHERNET_STATISTIC                                                                  \
+    (0x44)                                                /*!< The CDC class request code for GET_ETHERNET_STATISTIC. */
+#define USB_DEVICE_CDC_REQUEST_SET_ATM_DATA_FORMAT (0x50) /*!< The CDC class request code for SET_ATM_DATA_FORMAT. */
+#define USB_DEVICE_CDC_REQUEST_GET_ATM_DEVICE_STATISTICS                                                               \
+    (0x51) /*!< The CDC class request code for GET_ATM_DEVICE_STATISTICS. */
+#define USB_DEVICE_CDC_REQUEST_SET_ATM_DEFAULT_VC (0x52) /*!< The CDC class request code for SET_ATM_DEFAULT_VC. */
+#define USB_DEVICE_CDC_REQUEST_GET_ATM_VC_STATISTICS                                                                   \
+    (0x53) /*!< The CDC class request code for GET_ATM_VC_STATISTICS. */
+#define USB_DEVICE_CDC_REQUEST_MDLM_SPECIFIC_REQUESTS_MASK                                                             \
+    (0x7F) /*!< The CDC class request code for MDLM_SPECIFIC_REQUESTS_MASK. */
 
-#define USB_DEVICE_CDC_NOTIF_NETWORK_CONNECTION (0x00)      /*!< The CDC class notify code for NETWORK_CONNECTION. */
-#define USB_DEVICE_CDC_NOTIF_RESPONSE_AVAIL (0x01)          /*!< The CDC class notify code for RESPONSE_AVAIL. */
-#define USB_DEVICE_CDC_NOTIF_AUX_JACK_HOOK_STATE (0x08)     /*!< The CDC class notify code for AUX_JACK_HOOK_STATE. */
-#define USB_DEVICE_CDC_NOTIF_RING_DETECT (0x09)             /*!< The CDC class notify code for RING_DETECT. */
-#define USB_DEVICE_CDC_NOTIF_SERIAL_STATE (0x20)            /*!< The CDC class notify code for SERIAL_STATE. */
-#define USB_DEVICE_CDC_NOTIF_CALL_STATE_CHANGE (0x28)       /*!< The CDC class notify code for CALL_STATE_CHANGE. */
-#define USB_DEVICE_CDC_NOTIF_LINE_STATE_CHANGE (0x29)       /*!< The CDC class notify code for LINE_STATE_CHANGE. */
-#define USB_DEVICE_CDC_NOTIF_CONNECTION_SPEED_CHANGE (0x2A) /*!< The CDC class notify code for CONNECTION_SPEED_CHANGE. */
+#define USB_DEVICE_CDC_NOTIF_NETWORK_CONNECTION  (0x00) /*!< The CDC class notify code for NETWORK_CONNECTION. */
+#define USB_DEVICE_CDC_NOTIF_RESPONSE_AVAIL      (0x01) /*!< The CDC class notify code for RESPONSE_AVAIL. */
+#define USB_DEVICE_CDC_NOTIF_AUX_JACK_HOOK_STATE (0x08) /*!< The CDC class notify code for AUX_JACK_HOOK_STATE. */
+#define USB_DEVICE_CDC_NOTIF_RING_DETECT         (0x09) /*!< The CDC class notify code for RING_DETECT. */
+#define USB_DEVICE_CDC_NOTIF_SERIAL_STATE        (0x20) /*!< The CDC class notify code for SERIAL_STATE. */
+#define USB_DEVICE_CDC_NOTIF_CALL_STATE_CHANGE   (0x28) /*!< The CDC class notify code for CALL_STATE_CHANGE. */
+#define USB_DEVICE_CDC_NOTIF_LINE_STATE_CHANGE   (0x29) /*!< The CDC class notify code for LINE_STATE_CHANGE. */
+#define USB_DEVICE_CDC_NOTIF_CONNECTION_SPEED_CHANGE                                                                   \
+    (0x2A) /*!< The CDC class notify code for CONNECTION_SPEED_CHANGE. */
 
-#define USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE (0x01)  /*!< The CDC class feature select code for ABSTRACT_STATE. */
+#define USB_DEVICE_CDC_FEATURE_ABSTRACT_STATE  (0x01) /*!< The CDC class feature select code for ABSTRACT_STATE. */
 #define USB_DEVICE_CDC_FEATURE_COUNTRY_SETTING (0x02) /*!< The CDC class feature select code for COUNTRY_SETTING. */
 
-#define USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION (0x02) /*!< The CDC class control signal bitmap value for CARRIER_ACTIVATION. */
-#define USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE (0x01)       /*!< The CDC class control signal bitmap value for DTE_PRESENCE. */
-#define USB_DEVICE_CDC_UART_STATE_RX_CARRIER (0x01)                 /*!< The UART state bitmap value of RX_CARRIER. */
-#define USB_DEVICE_CDC_UART_STATE_TX_CARRIER (0x02)                 /*!< The UART state bitmap value of TX_CARRIER. */
-#define USB_DEVICE_CDC_UART_STATE_BREAK (0x04)                      /*!< The UART state bitmap value of BREAK. */
-#define USB_DEVICE_CDC_UART_STATE_RING_SIGNAL (0x08)                /*!< The UART state bitmap value of RING_SIGNAL. */
-#define USB_DEVICE_CDC_UART_STATE_FRAMING (0x10)                    /*!< The UART state bitmap value of FRAMING. */
-#define USB_DEVICE_CDC_UART_STATE_PARITY (0x20)                     /*!< The UART state bitmap value of PARITY. */
-#define USB_DEVICE_CDC_UART_STATE_OVERRUN (0x40)                    /*!< The UART state bitmap value of OVERRUN. */
+#define USB_DEVICE_CDC_CONTROL_SIG_BITMAP_CARRIER_ACTIVATION                                                           \
+    (0x02) /*!< The CDC class control signal bitmap value for CARRIER_ACTIVATION. */
+#define USB_DEVICE_CDC_CONTROL_SIG_BITMAP_DTE_PRESENCE                                                                 \
+    (0x01)                                           /*!< The CDC class control signal bitmap value for DTE_PRESENCE. */
+#define USB_DEVICE_CDC_UART_STATE_RX_CARRIER  (0x01) /*!< The UART state bitmap value of RX_CARRIER. */
+#define USB_DEVICE_CDC_UART_STATE_TX_CARRIER  (0x02) /*!< The UART state bitmap value of TX_CARRIER. */
+#define USB_DEVICE_CDC_UART_STATE_BREAK       (0x04) /*!< The UART state bitmap value of BREAK. */
+#define USB_DEVICE_CDC_UART_STATE_RING_SIGNAL (0x08) /*!< The UART state bitmap value of RING_SIGNAL. */
+#define USB_DEVICE_CDC_UART_STATE_FRAMING     (0x10) /*!< The UART state bitmap value of FRAMING. */
+#define USB_DEVICE_CDC_UART_STATE_PARITY      (0x20) /*!< The UART state bitmap value of PARITY. */
+#define USB_DEVICE_CDC_UART_STATE_OVERRUN     (0x40) /*!< The UART state bitmap value of OVERRUN. */
 
 /*! @brief Definition of CDC class event. */
 typedef enum _usb_device_cdc_acm_event
 {
-    kUSB_DeviceCdcEventSendResponse = 0x01,     /*!< This event indicates the bulk send transfer is complete or cancelled etc. */
-    kUSB_DeviceCdcEventRecvResponse,            /*!< This event indicates the bulk receive transfer is complete or cancelled etc.. */
+    kUSB_DeviceCdcEventSendResponse =
+        0x01,                        /*!< This event indicates the bulk send transfer is complete or cancelled etc. */
+    kUSB_DeviceCdcEventRecvResponse, /*!< This event indicates the bulk receive transfer is complete or cancelled etc..
+                                      */
     kUSB_DeviceCdcEventSerialStateNotif,        /*!< This event indicates the serial state has been sent to the host. */
     kUSB_DeviceCdcEventSendEncapsulatedCommand, /*!< This event indicates the device received the
                                                    SEND_ENCAPSULATED_COMMAND request. */
     kUSB_DeviceCdcEventGetEncapsulatedResponse, /*!< This event indicates the device received the
                                                    GET_ENCAPSULATED_RESPONSE request. */
-    kUSB_DeviceCdcEventSetCommFeature,          /*!< This event indicates the device received the SET_COMM_FEATURE request. */
-    kUSB_DeviceCdcEventGetCommFeature,          /*!< This event indicates the device received the GET_COMM_FEATURE request. */
-    kUSB_DeviceCdcEventClearCommFeature,        /*!< This event indicates the device received the CLEAR_COMM_FEATURE request.
-                                                 */
-    kUSB_DeviceCdcEventGetLineCoding,           /*!< This event indicates the device received the GET_LINE_CODING request. */
-    kUSB_DeviceCdcEventSetLineCoding,           /*!< This event indicates the device received the SET_LINE_CODING request. */
-    kUSB_DeviceCdcEventSetControlLineState,     /*!< This event indicates the device received the SET_CONTRL_LINE_STATE
-                                                   request. */
-    kUSB_DeviceCdcEventSendBreak                /*!< This event indicates the device received the SEND_BREAK request. */
+    kUSB_DeviceCdcEventSetCommFeature,   /*!< This event indicates the device received the SET_COMM_FEATURE request. */
+    kUSB_DeviceCdcEventGetCommFeature,   /*!< This event indicates the device received the GET_COMM_FEATURE request. */
+    kUSB_DeviceCdcEventClearCommFeature, /*!< This event indicates the device received the CLEAR_COMM_FEATURE request.
+                                          */
+    kUSB_DeviceCdcEventGetLineCoding,    /*!< This event indicates the device received the GET_LINE_CODING request. */
+    kUSB_DeviceCdcEventSetLineCoding,    /*!< This event indicates the device received the SET_LINE_CODING request. */
+    kUSB_DeviceCdcEventSetControlLineState, /*!< This event indicates the device received the SET_CONTRL_LINE_STATE
+                                               request. */
+    kUSB_DeviceCdcEventSendBreak            /*!< This event indicates the device received the SEND_BREAK request. */
 } usb_device_cdc_acm_event_t;
 
 /*! @brief Definition of parameters for CDC ACM request. */
@@ -129,11 +146,11 @@ typedef struct _usb_device_cdc_acm_struct
     usb_device_interface_struct_t *dataInterfaceHandle; /*!< The CDC data interface handle. */
     usb_device_cdc_acm_pipe_t bulkIn;                   /*!< The bulk in pipe for sending packet to host. */
     usb_device_cdc_acm_pipe_t bulkOut;                  /*!< The bulk out pipe for receiving packet from host. */
-    usb_device_cdc_acm_pipe_t interruptIn;              /*!< The interrupt in pipe for notifying the device state to host. */
-    uint8_t configuration;                              /*!< The current configuration value. */
-    uint8_t interfaceNumber;                            /*!< The current interface number. */
-    uint8_t alternate;                                  /*!< The alternate setting value of the interface. */
-    uint8_t hasSentState;                               /*!< 1: The device has primed the state in interrupt pipe, 0: Not primed the state. */
+    usb_device_cdc_acm_pipe_t interruptIn; /*!< The interrupt in pipe for notifying the device state to host. */
+    uint8_t configuration;                 /*!< The current configuration value. */
+    uint8_t interfaceNumber;               /*!< The current interface number. */
+    uint8_t alternate;                     /*!< The alternate setting value of the interface. */
+    uint8_t hasSentState; /*!< 1: The device has primed the state in interrupt pipe, 0: Not primed the state. */
 } usb_device_cdc_acm_struct_t;
 
 /*******************************************************************************
@@ -167,7 +184,9 @@ extern "C"
      * @retval kStatus_USB_InvalidHandle The CDC ACM device handle allocation failure.
      * @retval kStatus_USB_InvalidParameter The USB device handle allocation failure.
      */
-    extern usb_status_t USB_DeviceCdcAcmInit(uint8_t controllerId, usb_device_class_config_struct_t *config, class_handle_t *handle);
+    extern usb_status_t USB_DeviceCdcAcmInit(uint8_t controllerId,
+                                             usb_device_class_config_struct_t *config,
+                                             class_handle_t *handle);
     /*!
      * @brief Deinitializes the USB CDC ACM class.
      *
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_config.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_config.h
index b42b13c00..2e0bfb74a 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_config.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_config.h
@@ -35,7 +35,8 @@
 #define USB_DEVICE_CONFIG_LPCIP3511HS (0U)
 
 /*! @brief Device instance count, the sum of KHCI and EHCI instance counts*/
-#define USB_DEVICE_CONFIG_NUM (USB_DEVICE_CONFIG_KHCI + USB_DEVICE_CONFIG_EHCI + USB_DEVICE_CONFIG_LPCIP3511FS + USB_DEVICE_CONFIG_LPCIP3511HS)
+#define USB_DEVICE_CONFIG_NUM                                                                                          \
+    (USB_DEVICE_CONFIG_KHCI + USB_DEVICE_CONFIG_EHCI + USB_DEVICE_CONFIG_LPCIP3511FS + USB_DEVICE_CONFIG_LPCIP3511HS)
 
 /* @} */
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_descriptor.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_descriptor.h
index 1437d2711..ab14a92ea 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_descriptor.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_device_descriptor.h
@@ -12,7 +12,7 @@
  * Definitions
  ******************************************************************************/
 #define USB_DEVICE_SPECIFIC_BCD_VERSION (0x0200)
-#define USB_DEVICE_DEMO_BCD_VERSION (0x0101U)
+#define USB_DEVICE_DEMO_BCD_VERSION     (0x0101U)
 
 /* Communication  Class Codes */
 #define CDC_COMM_CLASS (0x02)
@@ -20,105 +20,105 @@
 #define CDC_DATA_CLASS (0x0A)
 
 /* Communication Class SubClass Codes */
-#define USB_CDC_DIRECT_LINE_CONTROL_MODEL (0x01)
-#define USB_CDC_ABSTRACT_CONTROL_MODEL (0x02)
-#define USB_CDC_TELEPHONE_CONTROL_MODEL (0x03)
-#define USB_CDC_MULTI_CHANNEL_CONTROL_MODEL (0x04)
-#define USB_CDC_CAPI_CONTROL_MOPDEL (0x05)
+#define USB_CDC_DIRECT_LINE_CONTROL_MODEL         (0x01)
+#define USB_CDC_ABSTRACT_CONTROL_MODEL            (0x02)
+#define USB_CDC_TELEPHONE_CONTROL_MODEL           (0x03)
+#define USB_CDC_MULTI_CHANNEL_CONTROL_MODEL       (0x04)
+#define USB_CDC_CAPI_CONTROL_MOPDEL               (0x05)
 #define USB_CDC_ETHERNET_NETWORKING_CONTROL_MODEL (0x06)
-#define USB_CDC_ATM_NETWORKING_CONTROL_MODEL (0x07)
-#define USB_CDC_WIRELESS_HANDSET_CONTROL_MODEL (0x08)
-#define USB_CDC_DEVICE_MANAGEMENT (0x09)
-#define USB_CDC_MOBILE_DIRECT_LINE_MODEL (0x0A)
-#define USB_CDC_OBEX (0x0B)
-#define USB_CDC_ETHERNET_EMULATION_MODEL (0x0C)
+#define USB_CDC_ATM_NETWORKING_CONTROL_MODEL      (0x07)
+#define USB_CDC_WIRELESS_HANDSET_CONTROL_MODEL    (0x08)
+#define USB_CDC_DEVICE_MANAGEMENT                 (0x09)
+#define USB_CDC_MOBILE_DIRECT_LINE_MODEL          (0x0A)
+#define USB_CDC_OBEX                              (0x0B)
+#define USB_CDC_ETHERNET_EMULATION_MODEL          (0x0C)
 
 /* Communication Class Protocol Codes */
-#define USB_CDC_NO_CLASS_SPECIFIC_PROTOCOL (0x00) /*also for Data Class Protocol Code */
-#define USB_CDC_AT_250_PROTOCOL (0x01)
-#define USB_CDC_AT_PCCA_101_PROTOCOL (0x02)
-#define USB_CDC_AT_PCCA_101_ANNEX_O (0x03)
-#define USB_CDC_AT_GSM_7_07 (0x04)
-#define USB_CDC_AT_3GPP_27_007 (0x05)
-#define USB_CDC_AT_TIA_CDMA (0x06)
+#define USB_CDC_NO_CLASS_SPECIFIC_PROTOCOL  (0x00) /*also for Data Class Protocol Code */
+#define USB_CDC_AT_250_PROTOCOL             (0x01)
+#define USB_CDC_AT_PCCA_101_PROTOCOL        (0x02)
+#define USB_CDC_AT_PCCA_101_ANNEX_O         (0x03)
+#define USB_CDC_AT_GSM_7_07                 (0x04)
+#define USB_CDC_AT_3GPP_27_007              (0x05)
+#define USB_CDC_AT_TIA_CDMA                 (0x06)
 #define USB_CDC_ETHERNET_EMULATION_PROTOCOL (0x07)
-#define USB_CDC_EXTERNAL_PROTOCOL (0xFE)
-#define USB_CDC_VENDOR_SPECIFIC (0xFF) /*also for Data Class Protocol Code */
+#define USB_CDC_EXTERNAL_PROTOCOL           (0xFE)
+#define USB_CDC_VENDOR_SPECIFIC             (0xFF) /*also for Data Class Protocol Code */
 
 /* Data Class Protocol Codes */
 #define USB_CDC_PYHSICAL_INTERFACE_PROTOCOL (0x30)
-#define USB_CDC_HDLC_PROTOCOL (0x31)
-#define USB_CDC_TRANSPARENT_PROTOCOL (0x32)
-#define USB_CDC_MANAGEMENT_PROTOCOL (0x50)
-#define USB_CDC_DATA_LINK_Q931_PROTOCOL (0x51)
-#define USB_CDC_DATA_LINK_Q921_PROTOCOL (0x52)
-#define USB_CDC_DATA_COMPRESSION_V42BIS (0x90)
-#define USB_CDC_EURO_ISDN_PROTOCOL (0x91)
-#define USB_CDC_RATE_ADAPTION_ISDN_V24 (0x92)
-#define USB_CDC_CAPI_COMMANDS (0x93)
-#define USB_CDC_HOST_BASED_DRIVER (0xFD)
-#define USB_CDC_UNIT_FUNCTIONAL (0xFE)
+#define USB_CDC_HDLC_PROTOCOL               (0x31)
+#define USB_CDC_TRANSPARENT_PROTOCOL        (0x32)
+#define USB_CDC_MANAGEMENT_PROTOCOL         (0x50)
+#define USB_CDC_DATA_LINK_Q931_PROTOCOL     (0x51)
+#define USB_CDC_DATA_LINK_Q921_PROTOCOL     (0x52)
+#define USB_CDC_DATA_COMPRESSION_V42BIS     (0x90)
+#define USB_CDC_EURO_ISDN_PROTOCOL          (0x91)
+#define USB_CDC_RATE_ADAPTION_ISDN_V24      (0x92)
+#define USB_CDC_CAPI_COMMANDS               (0x93)
+#define USB_CDC_HOST_BASED_DRIVER           (0xFD)
+#define USB_CDC_UNIT_FUNCTIONAL             (0xFE)
 
 /* Descriptor SubType in Communications Class Functional Descriptors */
-#define USB_CDC_HEADER_FUNC_DESC (0x00)
-#define USB_CDC_CALL_MANAGEMENT_FUNC_DESC (0x01)
-#define USB_CDC_ABSTRACT_CONTROL_FUNC_DESC (0x02)
-#define USB_CDC_DIRECT_LINE_FUNC_DESC (0x03)
-#define USB_CDC_TELEPHONE_RINGER_FUNC_DESC (0x04)
-#define USB_CDC_TELEPHONE_REPORT_FUNC_DESC (0x05)
-#define USB_CDC_UNION_FUNC_DESC (0x06)
-#define USB_CDC_COUNTRY_SELECT_FUNC_DESC (0x07)
-#define USB_CDC_TELEPHONE_MODES_FUNC_DESC (0x08)
-#define USB_CDC_TERMINAL_FUNC_DESC (0x09)
-#define USB_CDC_NETWORK_CHANNEL_FUNC_DESC (0x0A)
-#define USB_CDC_PROTOCOL_UNIT_FUNC_DESC (0x0B)
-#define USB_CDC_EXTENSION_UNIT_FUNC_DESC (0x0C)
-#define USB_CDC_MULTI_CHANNEL_FUNC_DESC (0x0D)
-#define USB_CDC_CAPI_CONTROL_FUNC_DESC (0x0E)
+#define USB_CDC_HEADER_FUNC_DESC              (0x00)
+#define USB_CDC_CALL_MANAGEMENT_FUNC_DESC     (0x01)
+#define USB_CDC_ABSTRACT_CONTROL_FUNC_DESC    (0x02)
+#define USB_CDC_DIRECT_LINE_FUNC_DESC         (0x03)
+#define USB_CDC_TELEPHONE_RINGER_FUNC_DESC    (0x04)
+#define USB_CDC_TELEPHONE_REPORT_FUNC_DESC    (0x05)
+#define USB_CDC_UNION_FUNC_DESC               (0x06)
+#define USB_CDC_COUNTRY_SELECT_FUNC_DESC      (0x07)
+#define USB_CDC_TELEPHONE_MODES_FUNC_DESC     (0x08)
+#define USB_CDC_TERMINAL_FUNC_DESC            (0x09)
+#define USB_CDC_NETWORK_CHANNEL_FUNC_DESC     (0x0A)
+#define USB_CDC_PROTOCOL_UNIT_FUNC_DESC       (0x0B)
+#define USB_CDC_EXTENSION_UNIT_FUNC_DESC      (0x0C)
+#define USB_CDC_MULTI_CHANNEL_FUNC_DESC       (0x0D)
+#define USB_CDC_CAPI_CONTROL_FUNC_DESC        (0x0E)
 #define USB_CDC_ETHERNET_NETWORKING_FUNC_DESC (0x0F)
-#define USB_CDC_ATM_NETWORKING_FUNC_DESC (0x10)
-#define USB_CDC_WIRELESS_CONTROL_FUNC_DESC (0x11)
-#define USB_CDC_MOBILE_DIRECT_LINE_FUNC_DESC (0x12)
-#define USB_CDC_MDLM_DETAIL_FUNC_DESC (0x13)
-#define USB_CDC_DEVICE_MANAGEMENT_FUNC_DESC (0x14)
-#define USB_CDC_OBEX_FUNC_DESC (0x15)
-#define USB_CDC_COMMAND_SET_FUNC_DESC (0x16)
-#define USB_CDC_COMMAND_SET_DETAIL_FUNC_DESC (0x17)
-#define USB_CDC_TELEPHONE_CONTROL_FUNC_DESC (0x18)
-#define USB_CDC_OBEX_SERVICE_ID_FUNC_DESC (0x19)
+#define USB_CDC_ATM_NETWORKING_FUNC_DESC      (0x10)
+#define USB_CDC_WIRELESS_CONTROL_FUNC_DESC    (0x11)
+#define USB_CDC_MOBILE_DIRECT_LINE_FUNC_DESC  (0x12)
+#define USB_CDC_MDLM_DETAIL_FUNC_DESC         (0x13)
+#define USB_CDC_DEVICE_MANAGEMENT_FUNC_DESC   (0x14)
+#define USB_CDC_OBEX_FUNC_DESC                (0x15)
+#define USB_CDC_COMMAND_SET_FUNC_DESC         (0x16)
+#define USB_CDC_COMMAND_SET_DETAIL_FUNC_DESC  (0x17)
+#define USB_CDC_TELEPHONE_CONTROL_FUNC_DESC   (0x18)
+#define USB_CDC_OBEX_SERVICE_ID_FUNC_DESC     (0x19)
 
 /* usb descriptor length */
 #define USB_DESCRIPTOR_LENGTH_CONFIGURATION_ALL (sizeof(g_UsbDeviceConfigurationDescriptor))
-#define USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC (5)
-#define USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG (5)
-#define USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT (4)
-#define USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC (5)
+#define USB_DESCRIPTOR_LENGTH_CDC_HEADER_FUNC   (5)
+#define USB_DESCRIPTOR_LENGTH_CDC_CALL_MANAG    (5)
+#define USB_DESCRIPTOR_LENGTH_CDC_ABSTRACT      (4)
+#define USB_DESCRIPTOR_LENGTH_CDC_UNION_FUNC    (5)
 
 /* Configuration, interface and endpoint. */
 #define USB_DEVICE_CONFIGURATION_COUNT (1)
-#define USB_DEVICE_STRING_COUNT (3)
-#define USB_DEVICE_LANGUAGE_COUNT (1)
+#define USB_DEVICE_STRING_COUNT        (3)
+#define USB_DEVICE_LANGUAGE_COUNT      (1)
 
 #define USB_CDC_VCOM_CONFIGURE_INDEX (1)
 
-#define USB_CDC_VCOM_ENDPOINT_CIC_COUNT (1)
-#define USB_CDC_VCOM_ENDPOINT_DIC_COUNT (2)
+#define USB_CDC_VCOM_ENDPOINT_CIC_COUNT    (1)
+#define USB_CDC_VCOM_ENDPOINT_DIC_COUNT    (2)
 #define USB_CDC_VCOM_INTERRUPT_IN_ENDPOINT (1)
-#define USB_CDC_VCOM_BULK_IN_ENDPOINT (2)
-#define USB_CDC_VCOM_BULK_OUT_ENDPOINT (3)
-#define USB_CDC_VCOM_INTERFACE_COUNT (2)
-#define USB_CDC_VCOM_COMM_INTERFACE_INDEX (0)
-#define USB_CDC_VCOM_DATA_INTERFACE_INDEX (1)
+#define USB_CDC_VCOM_BULK_IN_ENDPOINT      (2)
+#define USB_CDC_VCOM_BULK_OUT_ENDPOINT     (3)
+#define USB_CDC_VCOM_INTERFACE_COUNT       (2)
+#define USB_CDC_VCOM_COMM_INTERFACE_INDEX  (0)
+#define USB_CDC_VCOM_DATA_INTERFACE_INDEX  (1)
 
 /* Packet size. */
 #define HS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE (16)
 #define FS_CDC_VCOM_INTERRUPT_IN_PACKET_SIZE (16)
-#define HS_CDC_VCOM_INTERRUPT_IN_INTERVAL (0x07) /* 2^(7-1) = 8ms */
-#define FS_CDC_VCOM_INTERRUPT_IN_INTERVAL (0x08)
-#define HS_CDC_VCOM_BULK_IN_PACKET_SIZE (512)
-#define FS_CDC_VCOM_BULK_IN_PACKET_SIZE (64)
-#define HS_CDC_VCOM_BULK_OUT_PACKET_SIZE (512)
-#define FS_CDC_VCOM_BULK_OUT_PACKET_SIZE (64)
+#define HS_CDC_VCOM_INTERRUPT_IN_INTERVAL    (0x07) /* 2^(7-1) = 8ms */
+#define FS_CDC_VCOM_INTERRUPT_IN_INTERVAL    (0x08)
+#define HS_CDC_VCOM_BULK_IN_PACKET_SIZE      (512)
+#define FS_CDC_VCOM_BULK_IN_PACKET_SIZE      (64)
+#define HS_CDC_VCOM_BULK_OUT_PACKET_SIZE     (512)
+#define FS_CDC_VCOM_BULK_OUT_PACKET_SIZE     (64)
 
 /* String descriptor length. */
 #define USB_DESCRIPTOR_LENGTH_STRING0 (sizeof(g_UsbDeviceString0))
@@ -126,20 +126,20 @@
 #define USB_DESCRIPTOR_LENGTH_STRING2 (sizeof(g_UsbDeviceString2))
 
 #define USB_DESCRIPTOR_TYPE_CDC_CS_INTERFACE (0x24)
-#define USB_DESCRIPTOR_TYPE_CDC_CS_ENDPOINT (0x25)
+#define USB_DESCRIPTOR_TYPE_CDC_CS_ENDPOINT  (0x25)
 
 /* Class code. */
-#define USB_DEVICE_CLASS (0x02)
+#define USB_DEVICE_CLASS    (0x02)
 #define USB_DEVICE_SUBCLASS (0x00)
 #define USB_DEVICE_PROTOCOL (0x00)
 
 #define USB_DEVICE_MAX_POWER (0x32)
 
-#define USB_CDC_VCOM_CIC_CLASS (CDC_COMM_CLASS)
+#define USB_CDC_VCOM_CIC_CLASS    (CDC_COMM_CLASS)
 #define USB_CDC_VCOM_CIC_SUBCLASS (USB_CDC_ABSTRACT_CONTROL_MODEL)
 #define USB_CDC_VCOM_CIC_PROTOCOL (USB_CDC_NO_CLASS_SPECIFIC_PROTOCOL)
 
-#define USB_CDC_VCOM_DIC_CLASS (CDC_DATA_CLASS)
+#define USB_CDC_VCOM_DIC_CLASS    (CDC_DATA_CLASS)
 #define USB_CDC_VCOM_DIC_SUBCLASS (0x00)
 #define USB_CDC_VCOM_DIC_PROTOCOL (USB_CDC_NO_CLASS_SPECIFIC_PROTOCOL)
 
@@ -174,7 +174,8 @@ extern usb_status_t USB_DeviceSetSpeed(usb_device_handle handle, uint8_t speed);
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-extern usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle, usb_device_get_device_descriptor_struct_t *deviceDescriptor);
+extern usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle,
+                                                  usb_device_get_device_descriptor_struct_t *deviceDescriptor);
 /*!
  * @brief USB device get string descriptor function.
  *
@@ -185,7 +186,8 @@ extern usb_status_t USB_DeviceGetDeviceDescriptor(usb_device_handle handle, usb_
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-usb_status_t USB_DeviceGetStringDescriptor(usb_device_handle handle, usb_device_get_string_descriptor_struct_t *stringDescriptor);
+usb_status_t USB_DeviceGetStringDescriptor(usb_device_handle handle,
+                                           usb_device_get_string_descriptor_struct_t *stringDescriptor);
 /*!
  * @brief USB device get configuration descriptor function.
  *
@@ -196,5 +198,6 @@ usb_status_t USB_DeviceGetStringDescriptor(usb_device_handle handle, usb_device_
  *
  * @return A USB error code or kStatus_USB_Success.
  */
-extern usb_status_t USB_DeviceGetConfigurationDescriptor(usb_device_handle handle, usb_device_get_configuration_descriptor_struct_t *configurationDescriptor);
+extern usb_status_t USB_DeviceGetConfigurationDescriptor(
+    usb_device_handle handle, usb_device_get_configuration_descriptor_struct_t *configurationDescriptor);
 #endif /* _USB_DEVICE_DESCRIPTOR_H_ */
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_misc.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_misc.h
index ea40b547a..188ad98a8 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_misc.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_misc.h
@@ -73,7 +73,7 @@ extern "C"
 
 #endif
 
-#define USB_SHORT_GET_LOW(x) (((uint16_t)x) & 0xFFU)
+#define USB_SHORT_GET_LOW(x)  (((uint16_t)x) & 0xFFU)
 #define USB_SHORT_GET_HIGH(x) ((uint8_t)(((uint16_t)x) >> 8U) & 0xFFU)
 
 #define USB_LONG_GET_BYTE0(x) ((uint8_t)(((uint32_t)(x))) & 0xFFU)
@@ -84,176 +84,183 @@ extern "C"
 #define USB_MEM4_ALIGN_MASK (0x03U)
 
 /* accessory macro */
-#define USB_MEM4_ALIGN(n) ((n + 3U) & (0xFFFFFFFCu))
+#define USB_MEM4_ALIGN(n)  ((n + 3U) & (0xFFFFFFFCu))
 #define USB_MEM32_ALIGN(n) ((n + 31U) & (0xFFFFFFE0u))
 #define USB_MEM64_ALIGN(n) ((n + 63U) & (0xFFFFFFC0u))
 
 /* big/little endian */
 #define SWAP2BYTE_CONST(n) ((((n)&0x00FFU) << 8U) | (((n)&0xFF00U) >> 8U))
-#define SWAP4BYTE_CONST(n) ((((n)&0x000000FFU) << 24U) | (((n)&0x0000FF00U) << 8U) | (((n)&0x00FF0000U) >> 8U) | (((n)&0xFF000000U) >> 24U))
+#define SWAP4BYTE_CONST(n)                                                                                             \
+    ((((n)&0x000000FFU) << 24U) | (((n)&0x0000FF00U) << 8U) | (((n)&0x00FF0000U) >> 8U) | (((n)&0xFF000000U) >> 24U))
 
-#define USB_ASSIGN_VALUE_ADDRESS_LONG_BY_BYTE(n, m)                                                                                                            \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(n)) = *((uint8_t *)&(m));                                                                                                               \
-        *((uint8_t *)&(n) + 1) = *((uint8_t *)&(m) + 1);                                                                                                       \
-        *((uint8_t *)&(n) + 2) = *((uint8_t *)&(m) + 2);                                                                                                       \
-        *((uint8_t *)&(n) + 3) = *((uint8_t *)&(m) + 3);                                                                                                       \
+#define USB_ASSIGN_VALUE_ADDRESS_LONG_BY_BYTE(n, m)                                                                    \
+    {                                                                                                                  \
+        *((uint8_t *)&(n))     = *((uint8_t *)&(m));                                                                   \
+        *((uint8_t *)&(n) + 1) = *((uint8_t *)&(m) + 1);                                                               \
+        *((uint8_t *)&(n) + 2) = *((uint8_t *)&(m) + 2);                                                               \
+        *((uint8_t *)&(n) + 3) = *((uint8_t *)&(m) + 3);                                                               \
     }
 
-#define USB_ASSIGN_VALUE_ADDRESS_SHORT_BY_BYTE(n, m)                                                                                                           \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(n)) = *((uint8_t *)&(m));                                                                                                               \
-        *((uint8_t *)&(n) + 1) = *((uint8_t *)&(m) + 1);                                                                                                       \
+#define USB_ASSIGN_VALUE_ADDRESS_SHORT_BY_BYTE(n, m)                                                                   \
+    {                                                                                                                  \
+        *((uint8_t *)&(n))     = *((uint8_t *)&(m));                                                                   \
+        *((uint8_t *)&(n) + 1) = *((uint8_t *)&(m) + 1);                                                               \
     }
 
-#define USB_ASSIGN_MACRO_VALUE_ADDRESS_LONG_BY_BYTE(n, m)                                                                                                      \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(n)) = (uint8_t)m;                                                                                                                       \
-        *((uint8_t *)&(n) + 1) = (uint8_t)(m >> 8);                                                                                                            \
-        *((uint8_t *)&(n) + 2) = (uint8_t)(m >> 16);                                                                                                           \
-        *((uint8_t *)&(n) + 3) = (uint8_t)(m >> 24);                                                                                                           \
+#define USB_ASSIGN_MACRO_VALUE_ADDRESS_LONG_BY_BYTE(n, m)                                                              \
+    {                                                                                                                  \
+        *((uint8_t *)&(n))     = (uint8_t)m;                                                                           \
+        *((uint8_t *)&(n) + 1) = (uint8_t)(m >> 8);                                                                    \
+        *((uint8_t *)&(n) + 2) = (uint8_t)(m >> 16);                                                                   \
+        *((uint8_t *)&(n) + 3) = (uint8_t)(m >> 24);                                                                   \
     }
 
-#define USB_ASSIGN_MACRO_VALUE_ADDRESS_SHORT_BY_BYTE(n, m)                                                                                                     \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(n)) = (uint8_t)m;                                                                                                                       \
-        *((uint8_t *)&(n) + 1) = (uint8_t)(m >> 8);                                                                                                            \
+#define USB_ASSIGN_MACRO_VALUE_ADDRESS_SHORT_BY_BYTE(n, m)                                                             \
+    {                                                                                                                  \
+        *((uint8_t *)&(n))     = (uint8_t)m;                                                                           \
+        *((uint8_t *)&(n) + 1) = (uint8_t)(m >> 8);                                                                    \
     }
 
 #if (ENDIANNESS == USB_BIG_ENDIAN)
 
-#define USB_SHORT_TO_LITTLE_ENDIAN(n) SWAP2BYTE_CONST(n)
-#define USB_LONG_TO_LITTLE_ENDIAN(n) SWAP4BYTE_CONST(n)
+#define USB_SHORT_TO_LITTLE_ENDIAN(n)   SWAP2BYTE_CONST(n)
+#define USB_LONG_TO_LITTLE_ENDIAN(n)    SWAP4BYTE_CONST(n)
 #define USB_SHORT_FROM_LITTLE_ENDIAN(n) SWAP2BYTE_CONST(n)
-#define USB_LONG_FROM_LITTLE_ENDIAN(n) SWAP2BYTE_CONST(n)
+#define USB_LONG_FROM_LITTLE_ENDIAN(n)  SWAP2BYTE_CONST(n)
 
-#define USB_SHORT_TO_BIG_ENDIAN(n) (n)
-#define USB_LONG_TO_BIG_ENDIAN(n) (n)
+#define USB_SHORT_TO_BIG_ENDIAN(n)   (n)
+#define USB_LONG_TO_BIG_ENDIAN(n)    (n)
 #define USB_SHORT_FROM_BIG_ENDIAN(n) (n)
-#define USB_LONG_FROM_BIG_ENDIAN(n) (n)
+#define USB_LONG_FROM_BIG_ENDIAN(n)  (n)
 
-#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                                                                \
-    {                                                                                                                                                          \
-        m[3] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                                             \
-        m[2] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                                             \
-        m[1] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[0] = (((uint32_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                        \
+    {                                                                                                                  \
+        m[3] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                     \
+        m[2] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                     \
+        m[1] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[0] = (((uint32_t)(n)) & 0xFFU);                                                                              \
     }
 
-#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n)                                                                                                                 \
-    ((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
+#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n)                                                                         \
+    ((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) |                        \
+                (((uint8_t)n[0]) << 0U)))
 
-#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                                                                   \
-    {                                                                                                                                                          \
-        m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                                             \
-        m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                                             \
-        m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[3] = (((uint32_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                           \
+    {                                                                                                                  \
+        m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                     \
+        m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                     \
+        m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[3] = (((uint32_t)(n)) & 0xFFU);                                                                              \
     }
 
-#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n)                                                                                                                    \
-    ((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) | (((uint8_t)n[3]) << 0U)))
+#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n)                                                                            \
+    ((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) |                        \
+                (((uint8_t)n[3]) << 0U)))
 
-#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                                                               \
-    {                                                                                                                                                          \
-        m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[0] = (((uint16_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                       \
+    {                                                                                                                  \
+        m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[0] = (((uint16_t)(n)) & 0xFFU);                                                                              \
     }
 
 #define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
 
-#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                                                                  \
-    {                                                                                                                                                          \
-        m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[1] = (((uint16_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                          \
+    {                                                                                                                  \
+        m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[1] = (((uint16_t)(n)) & 0xFFU);                                                                              \
     }
 
 #define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[0]) << 8U) | (((uint8_t)n[1]) << 0U)))
 
-#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m)                                                                                                                   \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                           \
-        *((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                           \
-        *((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                            \
-        *((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU);                                                                                                    \
+#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m)                                                                           \
+    {                                                                                                                  \
+        *((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                   \
+        *((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                   \
+        *((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                    \
+        *((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU);                                                            \
     }
 
-#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n)                                                                                                                    \
-    ((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) | ((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
+#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n)                                                                            \
+    ((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) |                                \
+                ((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
 
-#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m)                                                                                                                  \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                            \
-        *((uint8_t *)&(m)) = ((((uint16_t)(n))) & 0xFFU);                                                                                                      \
+#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m)                                                                          \
+    {                                                                                                                  \
+        *((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                    \
+        *((uint8_t *)&(m))     = ((((uint16_t)(n))) & 0xFFU);                                                          \
     }
 
 #define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) ((uint32_t)(((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))))))
 
 #else
 
-#define USB_SHORT_TO_LITTLE_ENDIAN(n) (n)
-#define USB_LONG_TO_LITTLE_ENDIAN(n) (n)
+#define USB_SHORT_TO_LITTLE_ENDIAN(n)   (n)
+#define USB_LONG_TO_LITTLE_ENDIAN(n)    (n)
 #define USB_SHORT_FROM_LITTLE_ENDIAN(n) (n)
-#define USB_LONG_FROM_LITTLE_ENDIAN(n) (n)
+#define USB_LONG_FROM_LITTLE_ENDIAN(n)  (n)
 
-#define USB_SHORT_TO_BIG_ENDIAN(n) SWAP2BYTE_CONST(n)
-#define USB_LONG_TO_BIG_ENDIAN(n) SWAP4BYTE_CONST(n)
+#define USB_SHORT_TO_BIG_ENDIAN(n)   SWAP2BYTE_CONST(n)
+#define USB_LONG_TO_BIG_ENDIAN(n)    SWAP4BYTE_CONST(n)
 #define USB_SHORT_FROM_BIG_ENDIAN(n) SWAP2BYTE_CONST(n)
-#define USB_LONG_FROM_BIG_ENDIAN(n) SWAP4BYTE_CONST(n)
+#define USB_LONG_FROM_BIG_ENDIAN(n)  SWAP4BYTE_CONST(n)
 
-#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                                                                \
-    {                                                                                                                                                          \
-        m[3] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                                             \
-        m[2] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                                             \
-        m[1] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[0] = (((uint32_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_LONG_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                        \
+    {                                                                                                                  \
+        m[3] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                     \
+        m[2] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                     \
+        m[1] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[0] = (((uint32_t)(n)) & 0xFFU);                                                                              \
     }
 
-#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n)                                                                                                                 \
-    ((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
+#define USB_LONG_FROM_LITTLE_ENDIAN_ADDRESS(n)                                                                         \
+    ((uint32_t)((((uint8_t)n[3]) << 24U) | (((uint8_t)n[2]) << 16U) | (((uint8_t)n[1]) << 8U) |                        \
+                (((uint8_t)n[0]) << 0U)))
 
-#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                                                                   \
-    {                                                                                                                                                          \
-        m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                                             \
-        m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                                             \
-        m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[3] = (((uint32_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_LONG_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                           \
+    {                                                                                                                  \
+        m[0] = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                     \
+        m[1] = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                     \
+        m[2] = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[3] = (((uint32_t)(n)) & 0xFFU);                                                                              \
     }
 
-#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n)                                                                                                                    \
-    ((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) | (((uint8_t)n[3]) << 0U)))
+#define USB_LONG_FROM_BIG_ENDIAN_ADDRESS(n)                                                                            \
+    ((uint32_t)((((uint8_t)n[0]) << 24U) | (((uint8_t)n[1]) << 16U) | (((uint8_t)n[2]) << 8U) |                        \
+                (((uint8_t)n[3]) << 0U)))
 
-#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                                                               \
-    {                                                                                                                                                          \
-        m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[0] = (((uint16_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_SHORT_TO_LITTLE_ENDIAN_ADDRESS(n, m)                                                                       \
+    {                                                                                                                  \
+        m[1] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[0] = (((uint16_t)(n)) & 0xFFU);                                                                              \
     }
 
 #define USB_SHORT_FROM_LITTLE_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[1]) << 8U) | (((uint8_t)n[0]) << 0U)))
 
-#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                                                                  \
-    {                                                                                                                                                          \
-        m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                                              \
-        m[1] = (((uint16_t)(n)) & 0xFFU);                                                                                                                      \
+#define USB_SHORT_TO_BIG_ENDIAN_ADDRESS(n, m)                                                                          \
+    {                                                                                                                  \
+        m[0] = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                      \
+        m[1] = (((uint16_t)(n)) & 0xFFU);                                                                              \
     }
 
 #define USB_SHORT_FROM_BIG_ENDIAN_ADDRESS(n) ((uint32_t)((((uint8_t)n[0]) << 8U) | (((uint8_t)n[1]) << 0U)))
 
-#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m)                                                                                                                   \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                                                           \
-        *((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                                                           \
-        *((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                                                            \
-        *((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU);                                                                                                    \
+#define USB_LONG_TO_LITTLE_ENDIAN_DATA(n, m)                                                                           \
+    {                                                                                                                  \
+        *((uint8_t *)&(m) + 3) = ((((uint32_t)(n)) >> 24U) & 0xFFU);                                                   \
+        *((uint8_t *)&(m) + 2) = ((((uint32_t)(n)) >> 16U) & 0xFFU);                                                   \
+        *((uint8_t *)&(m) + 1) = ((((uint32_t)(n)) >> 8U) & 0xFFU);                                                    \
+        *((uint8_t *)&(m) + 0) = (((uint32_t)(n)) & 0xFFU);                                                            \
     }
 
-#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n)                                                                                                                    \
-    ((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) | ((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
+#define USB_LONG_FROM_LITTLE_ENDIAN_DATA(n)                                                                            \
+    ((uint32_t)(((*((uint8_t *)&(n) + 3)) << 24U) | ((*((uint8_t *)&(n) + 2)) << 16U) |                                \
+                ((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))) << 0U)))
 
-#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m)                                                                                                                  \
-    {                                                                                                                                                          \
-        *((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                                                            \
-        *((uint8_t *)&(m)) = ((((uint16_t)(n))) & 0xFFU);                                                                                                      \
+#define USB_SHORT_TO_LITTLE_ENDIAN_DATA(n, m)                                                                          \
+    {                                                                                                                  \
+        *((uint8_t *)&(m) + 1) = ((((uint16_t)(n)) >> 8U) & 0xFFU);                                                    \
+        *((uint8_t *)&(m))     = ((((uint16_t)(n))) & 0xFFU);                                                          \
     }
 
 #define USB_SHORT_FROM_LITTLE_ENDIAN_DATA(n) ((uint32_t)(((*((uint8_t *)&(n) + 1)) << 8U) | ((*((uint8_t *)&(n))))))
@@ -275,7 +282,7 @@ extern "C"
  * the USB dedicated RAM size is not more than 512 Bytes.
  */
 #define USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL 1
-#define USB_STACK_DEDICATED_RAM_TYPE_BDT 2
+#define USB_STACK_DEDICATED_RAM_TYPE_BDT        2
 
 #if defined(__ICCARM__)
 
@@ -288,46 +295,46 @@ _Pragma("diag_suppress=Pm120")
 
 #define USB_RAM_ADDRESS_ALIGNMENT(n) USB_ALIGN_PRAGMA(data_alignment = n)
         _Pragma("diag_suppress=Pm120")
-#define USB_LINK_SECTION_PART(str) _Pragma(#str)
+#define USB_LINK_SECTION_PART(str)  _Pragma(#str)
 #define USB_LINK_DMA_INIT_DATA(sec) USB_LINK_SECTION_PART(location = #sec)
-#define USB_LINK_USB_GLOBAL _Pragma("location = \"m_usb_global\"")
-#define USB_LINK_USB_BDT _Pragma("location = \"m_usb_bdt\"")
-#define USB_LINK_USB_GLOBAL_BSS _Pragma("location = \".bss.m_usb_global\"")
-#define USB_LINK_USB_BDT_BSS _Pragma("location = \".bss.m_usb_bdt\"")
+#define USB_LINK_USB_GLOBAL         _Pragma("location = \"m_usb_global\"")
+#define USB_LINK_USB_BDT            _Pragma("location = \"m_usb_bdt\"")
+#define USB_LINK_USB_GLOBAL_BSS     _Pragma("location = \".bss.m_usb_global\"")
+#define USB_LINK_USB_BDT_BSS        _Pragma("location = \".bss.m_usb_bdt\"")
             _Pragma("diag_default=Pm120")
-#define USB_LINK_DMA_NONINIT_DATA _Pragma("location = \"m_usb_dma_noninit_data\"")
+#define USB_LINK_DMA_NONINIT_DATA      _Pragma("location = \"m_usb_dma_noninit_data\"")
 #define USB_LINK_NONCACHE_NONINIT_DATA _Pragma("location = \"NonCacheable\"")
 #elif defined(__CC_ARM) || (defined(__ARMCC_VERSION))
 
-#define USB_WEAK_VAR __attribute__((weak))
-#define USB_WEAK_FUN __attribute__((weak))
-#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
-#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
-#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global"))) __attribute__((zero_init))
-#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt"))) __attribute__((zero_init))
-#define USB_LINK_USB_GLOBAL_BSS __attribute__((section(".bss.m_usb_global"))) __attribute__((zero_init))
-#define USB_LINK_USB_BDT_BSS __attribute__((section(".bss.m_usb_bdt"))) __attribute__((zero_init))
-#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data"))) __attribute__((zero_init))
+#define USB_WEAK_VAR                   __attribute__((weak))
+#define USB_WEAK_FUN                   __attribute__((weak))
+#define USB_RAM_ADDRESS_ALIGNMENT(n)   __attribute__((aligned(n)))
+#define USB_LINK_DMA_INIT_DATA(sec)    __attribute__((section(#sec)))
+#define USB_LINK_USB_GLOBAL            __attribute__((section("m_usb_global"))) __attribute__((zero_init))
+#define USB_LINK_USB_BDT               __attribute__((section("m_usb_bdt"))) __attribute__((zero_init))
+#define USB_LINK_USB_GLOBAL_BSS        __attribute__((section(".bss.m_usb_global"))) __attribute__((zero_init))
+#define USB_LINK_USB_BDT_BSS           __attribute__((section(".bss.m_usb_bdt"))) __attribute__((zero_init))
+#define USB_LINK_DMA_NONINIT_DATA      __attribute__((section("m_usb_dma_noninit_data"))) __attribute__((zero_init))
 #define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable"))) __attribute__((zero_init))
 
 #elif defined(__GNUC__)
 
-#define USB_WEAK_VAR __attribute__((weak))
-#define USB_WEAK_FUN __attribute__((weak))
-#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
-#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
-#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global, \"aw\", %nobits @")))
-#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt, \"aw\", %nobits @")))
-#define USB_LINK_USB_GLOBAL_BSS __attribute__((section(".bss.m_usb_global, \"aw\", %nobits @")))
-#define USB_LINK_USB_BDT_BSS __attribute__((section(".bss.m_usb_bdt, \"aw\", %nobits @")))
-#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data, \"aw\", %nobits @")))
+#define USB_WEAK_VAR                   __attribute__((weak))
+#define USB_WEAK_FUN                   __attribute__((weak))
+#define USB_RAM_ADDRESS_ALIGNMENT(n)   __attribute__((aligned(n)))
+#define USB_LINK_DMA_INIT_DATA(sec)    __attribute__((section(#sec)))
+#define USB_LINK_USB_GLOBAL            __attribute__((section("m_usb_global, \"aw\", %nobits @")))
+#define USB_LINK_USB_BDT               __attribute__((section("m_usb_bdt, \"aw\", %nobits @")))
+#define USB_LINK_USB_GLOBAL_BSS        __attribute__((section(".bss.m_usb_global, \"aw\", %nobits @")))
+#define USB_LINK_USB_BDT_BSS           __attribute__((section(".bss.m_usb_bdt, \"aw\", %nobits @")))
+#define USB_LINK_DMA_NONINIT_DATA      __attribute__((section("m_usb_dma_noninit_data, \"aw\", %nobits @")))
 #define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable, \"aw\", %nobits @")))
 
 #else
 #error The tool-chain is not supported.
 #endif
 
-#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||                                                 \
+#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||         \
     (defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
 
 #if ((defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)) && (defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
@@ -344,7 +351,7 @@ _Pragma("diag_suppress=Pm120")
 #define USB_CACHE_LINESIZE 4
 #endif
 
-#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                                                                     \
+#if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) ||                             \
      ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)))
 #define USB_DATA_ALIGN 64
 #else
@@ -358,13 +365,13 @@ _Pragma("diag_suppress=Pm120")
 #if defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM == USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL)
 
 #define USB_GLOBAL USB_LINK_USB_GLOBAL
-#define USB_BDT USB_LINK_USB_BDT
+#define USB_BDT    USB_LINK_USB_BDT
 
-#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||                                                 \
+#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||         \
     (defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
 #define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
-#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
-#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
+#define USB_DMA_DATA_INIT_SUB    USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
+#define USB_CONTROLLER_DATA      USB_LINK_NONCACHE_NONINIT_DATA
 #else
 #define USB_DMA_DATA_NONINIT_SUB
 #define USB_DMA_DATA_INIT_SUB
@@ -375,12 +382,12 @@ _Pragma("diag_suppress=Pm120")
 
 #define USB_BDT USB_LINK_USB_BDT
 
-#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||                                                 \
+#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||         \
     (defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
-#define USB_GLOBAL USB_LINK_DMA_NONINIT_DATA
+#define USB_GLOBAL               USB_LINK_DMA_NONINIT_DATA
 #define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
-#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
-#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
+#define USB_DMA_DATA_INIT_SUB    USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
+#define USB_CONTROLLER_DATA      USB_LINK_NONCACHE_NONINIT_DATA
 #else
 #define USB_GLOBAL USB_LINK_USB_GLOBAL_BSS
 #define USB_DMA_DATA_NONINIT_SUB
@@ -390,18 +397,18 @@ _Pragma("diag_suppress=Pm120")
 
 #else
 
-#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||                                                 \
+#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||         \
     (defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
 
-#define USB_GLOBAL USB_LINK_DMA_NONINIT_DATA
-#define USB_BDT USB_LINK_NONCACHE_NONINIT_DATA
+#define USB_GLOBAL               USB_LINK_DMA_NONINIT_DATA
+#define USB_BDT                  USB_LINK_NONCACHE_NONINIT_DATA
 #define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
-#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
-#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
+#define USB_DMA_DATA_INIT_SUB    USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
+#define USB_CONTROLLER_DATA      USB_LINK_NONCACHE_NONINIT_DATA
 
 #else
 #define USB_GLOBAL USB_LINK_USB_GLOBAL_BSS
-#define USB_BDT USB_LINK_USB_BDT_BSS
+#define USB_BDT    USB_LINK_USB_BDT_BSS
 #define USB_DMA_DATA_NONINIT_SUB
 #define USB_DMA_DATA_INIT_SUB
 #define USB_CONTROLLER_DATA
@@ -410,9 +417,9 @@ _Pragma("diag_suppress=Pm120")
 #endif
 
 #define USB_DMA_NONINIT_DATA_ALIGN(n) USB_RAM_ADDRESS_ALIGNMENT(n) USB_DMA_DATA_NONINIT_SUB
-#define USB_DMA_INIT_DATA_ALIGN(n) USB_RAM_ADDRESS_ALIGNMENT(n) USB_DMA_DATA_INIT_SUB
+#define USB_DMA_INIT_DATA_ALIGN(n)    USB_RAM_ADDRESS_ALIGNMENT(n) USB_DMA_DATA_INIT_SUB
 
-#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||                                                 \
+#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) ||         \
     (defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
 #define USB_DMA_DATA_NONCACHEABLE USB_LINK_NONCACHE_NONINIT_DATA
 
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_spec.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_spec.h
index 2cd8e6513..754ecf9a7 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_spec.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/usb_spec.h
@@ -14,9 +14,9 @@
  ******************************************************************************/
 
 /* USB speed (the value cannot be changed because EHCI QH use the value directly)*/
-#define USB_SPEED_FULL (0x00U)
-#define USB_SPEED_LOW (0x01U)
-#define USB_SPEED_HIGH (0x02U)
+#define USB_SPEED_FULL  (0x00U)
+#define USB_SPEED_LOW   (0x01U)
+#define USB_SPEED_HIGH  (0x02U)
 #define USB_SPEED_SUPER (0x04U)
 
 /* Set up packet structure */
@@ -30,138 +30,138 @@ typedef struct _usb_setup_struct
 } usb_setup_struct_t;
 
 /* USB  standard descriptor endpoint type */
-#define USB_ENDPOINT_CONTROL (0x00U)
+#define USB_ENDPOINT_CONTROL     (0x00U)
 #define USB_ENDPOINT_ISOCHRONOUS (0x01U)
-#define USB_ENDPOINT_BULK (0x02U)
-#define USB_ENDPOINT_INTERRUPT (0x03U)
+#define USB_ENDPOINT_BULK        (0x02U)
+#define USB_ENDPOINT_INTERRUPT   (0x03U)
 
 /* USB  standard descriptor transfer direction (cannot change the value because iTD use the value directly) */
 #define USB_OUT (0U)
-#define USB_IN (1U)
+#define USB_IN  (1U)
 
 /* USB standard descriptor length */
-#define USB_DESCRIPTOR_LENGTH_DEVICE (0x12U)
-#define USB_DESCRIPTOR_LENGTH_CONFIGURE (0x09U)
-#define USB_DESCRIPTOR_LENGTH_INTERFACE (0x09U)
-#define USB_DESCRIPTOR_LENGTH_ENDPOINT (0x07U)
-#define USB_DESCRIPTOR_LENGTH_ENDPOINT_COMPANION (0x06U)
-#define USB_DESCRIPTOR_LENGTH_DEVICE_QUALITIER (0x0AU)
-#define USB_DESCRIPTOR_LENGTH_OTG_DESCRIPTOR (5U)
-#define USB_DESCRIPTOR_LENGTH_BOS_DESCRIPTOR (5U)
+#define USB_DESCRIPTOR_LENGTH_DEVICE                            (0x12U)
+#define USB_DESCRIPTOR_LENGTH_CONFIGURE                         (0x09U)
+#define USB_DESCRIPTOR_LENGTH_INTERFACE                         (0x09U)
+#define USB_DESCRIPTOR_LENGTH_ENDPOINT                          (0x07U)
+#define USB_DESCRIPTOR_LENGTH_ENDPOINT_COMPANION                (0x06U)
+#define USB_DESCRIPTOR_LENGTH_DEVICE_QUALITIER                  (0x0AU)
+#define USB_DESCRIPTOR_LENGTH_OTG_DESCRIPTOR                    (5U)
+#define USB_DESCRIPTOR_LENGTH_BOS_DESCRIPTOR                    (5U)
 #define USB_DESCRIPTOR_LENGTH_DEVICE_CAPABILITY_USB20_EXTENSION (0x07U)
-#define USB_DESCRIPTOR_LENGTH_DEVICE_CAPABILITY_SUPERSPEED (0x0AU)
+#define USB_DESCRIPTOR_LENGTH_DEVICE_CAPABILITY_SUPERSPEED      (0x0AU)
 
 /* USB Device Capability Type Codes */
-#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY_WIRELESS (0x01U)
+#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY_WIRELESS        (0x01U)
 #define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY_USB20_EXTENSION (0x02U)
-#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY_SUPERSPEED (0x03U)
+#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY_SUPERSPEED      (0x03U)
 
 /* USB standard descriptor type */
-#define USB_DESCRIPTOR_TYPE_DEVICE (0x01U)
-#define USB_DESCRIPTOR_TYPE_CONFIGURE (0x02U)
-#define USB_DESCRIPTOR_TYPE_STRING (0x03U)
-#define USB_DESCRIPTOR_TYPE_INTERFACE (0x04U)
-#define USB_DESCRIPTOR_TYPE_ENDPOINT (0x05U)
-#define USB_DESCRIPTOR_TYPE_DEVICE_QUALITIER (0x06U)
+#define USB_DESCRIPTOR_TYPE_DEVICE                    (0x01U)
+#define USB_DESCRIPTOR_TYPE_CONFIGURE                 (0x02U)
+#define USB_DESCRIPTOR_TYPE_STRING                    (0x03U)
+#define USB_DESCRIPTOR_TYPE_INTERFACE                 (0x04U)
+#define USB_DESCRIPTOR_TYPE_ENDPOINT                  (0x05U)
+#define USB_DESCRIPTOR_TYPE_DEVICE_QUALITIER          (0x06U)
 #define USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION (0x07U)
-#define USB_DESCRIPTOR_TYPE_INTERFAACE_POWER (0x08U)
-#define USB_DESCRIPTOR_TYPE_OTG (0x09U)
-#define USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION (0x0BU)
-#define USB_DESCRIPTOR_TYPE_BOS (0x0F)
-#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY (0x10)
+#define USB_DESCRIPTOR_TYPE_INTERFAACE_POWER          (0x08U)
+#define USB_DESCRIPTOR_TYPE_OTG                       (0x09U)
+#define USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION     (0x0BU)
+#define USB_DESCRIPTOR_TYPE_BOS                       (0x0F)
+#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY         (0x10)
 
-#define USB_DESCRIPTOR_TYPE_HID (0x21U)
-#define USB_DESCRIPTOR_TYPE_HID_REPORT (0x22U)
+#define USB_DESCRIPTOR_TYPE_HID          (0x21U)
+#define USB_DESCRIPTOR_TYPE_HID_REPORT   (0x22U)
 #define USB_DESCRIPTOR_TYPE_HID_PHYSICAL (0x23U)
 
 #define USB_DESCRIPTOR_TYPE_ENDPOINT_COMPANION (0x30U)
 
 /* USB standard request type */
-#define USB_REQUEST_TYPE_DIR_MASK (0x80U)
+#define USB_REQUEST_TYPE_DIR_MASK  (0x80U)
 #define USB_REQUEST_TYPE_DIR_SHIFT (7U)
-#define USB_REQUEST_TYPE_DIR_OUT (0x00U)
-#define USB_REQUEST_TYPE_DIR_IN (0x80U)
+#define USB_REQUEST_TYPE_DIR_OUT   (0x00U)
+#define USB_REQUEST_TYPE_DIR_IN    (0x80U)
 
-#define USB_REQUEST_TYPE_TYPE_MASK (0x60U)
-#define USB_REQUEST_TYPE_TYPE_SHIFT (5U)
+#define USB_REQUEST_TYPE_TYPE_MASK     (0x60U)
+#define USB_REQUEST_TYPE_TYPE_SHIFT    (5U)
 #define USB_REQUEST_TYPE_TYPE_STANDARD (0U)
-#define USB_REQUEST_TYPE_TYPE_CLASS (0x20U)
-#define USB_REQUEST_TYPE_TYPE_VENDOR (0x40U)
+#define USB_REQUEST_TYPE_TYPE_CLASS    (0x20U)
+#define USB_REQUEST_TYPE_TYPE_VENDOR   (0x40U)
 
-#define USB_REQUEST_TYPE_RECIPIENT_MASK (0x1FU)
-#define USB_REQUEST_TYPE_RECIPIENT_SHIFT (0U)
-#define USB_REQUEST_TYPE_RECIPIENT_DEVICE (0x00U)
+#define USB_REQUEST_TYPE_RECIPIENT_MASK      (0x1FU)
+#define USB_REQUEST_TYPE_RECIPIENT_SHIFT     (0U)
+#define USB_REQUEST_TYPE_RECIPIENT_DEVICE    (0x00U)
 #define USB_REQUEST_TYPE_RECIPIENT_INTERFACE (0x01U)
-#define USB_REQUEST_TYPE_RECIPIENT_ENDPOINT (0x02U)
-#define USB_REQUEST_TYPE_RECIPIENT_OTHER (0x03U)
+#define USB_REQUEST_TYPE_RECIPIENT_ENDPOINT  (0x02U)
+#define USB_REQUEST_TYPE_RECIPIENT_OTHER     (0x03U)
 
 /* USB standard request */
-#define USB_REQUEST_STANDARD_GET_STATUS (0x00U)
-#define USB_REQUEST_STANDARD_CLEAR_FEATURE (0x01U)
-#define USB_REQUEST_STANDARD_SET_FEATURE (0x03U)
-#define USB_REQUEST_STANDARD_SET_ADDRESS (0x05U)
-#define USB_REQUEST_STANDARD_GET_DESCRIPTOR (0x06U)
-#define USB_REQUEST_STANDARD_SET_DESCRIPTOR (0x07U)
+#define USB_REQUEST_STANDARD_GET_STATUS        (0x00U)
+#define USB_REQUEST_STANDARD_CLEAR_FEATURE     (0x01U)
+#define USB_REQUEST_STANDARD_SET_FEATURE       (0x03U)
+#define USB_REQUEST_STANDARD_SET_ADDRESS       (0x05U)
+#define USB_REQUEST_STANDARD_GET_DESCRIPTOR    (0x06U)
+#define USB_REQUEST_STANDARD_SET_DESCRIPTOR    (0x07U)
 #define USB_REQUEST_STANDARD_GET_CONFIGURATION (0x08U)
 #define USB_REQUEST_STANDARD_SET_CONFIGURATION (0x09U)
-#define USB_REQUEST_STANDARD_GET_INTERFACE (0x0AU)
-#define USB_REQUEST_STANDARD_SET_INTERFACE (0x0BU)
-#define USB_REQUEST_STANDARD_SYNCH_FRAME (0x0CU)
+#define USB_REQUEST_STANDARD_GET_INTERFACE     (0x0AU)
+#define USB_REQUEST_STANDARD_SET_INTERFACE     (0x0BU)
+#define USB_REQUEST_STANDARD_SYNCH_FRAME       (0x0CU)
 
 /* USB standard request GET Status */
-#define USB_REQUEST_STANDARD_GET_STATUS_DEVICE_SELF_POWERED_SHIFT (0U)
+#define USB_REQUEST_STANDARD_GET_STATUS_DEVICE_SELF_POWERED_SHIFT  (0U)
 #define USB_REQUEST_STANDARD_GET_STATUS_DEVICE_REMOTE_WARKUP_SHIFT (1U)
 
-#define USB_REQUEST_STANDARD_GET_STATUS_ENDPOINT_HALT_MASK (0x01U)
+#define USB_REQUEST_STANDARD_GET_STATUS_ENDPOINT_HALT_MASK  (0x01U)
 #define USB_REQUEST_STANDARD_GET_STATUS_ENDPOINT_HALT_SHIFT (0U)
 
 #define USB_REQUEST_STANDARD_GET_STATUS_OTG_STATUS_SELECTOR (0xF000U)
 
 /* USB standard request CLEAR/SET feature */
-#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_ENDPOINT_HALT (0U)
+#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_ENDPOINT_HALT        (0U)
 #define USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_REMOTE_WAKEUP (1U)
-#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_TEST_MODE (2U)
-#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_B_HNP_ENABLE (3U)
-#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_A_HNP_SUPPORT (4U)
-#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_A_ALT_HNP_SUPPORT (5U)
+#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_DEVICE_TEST_MODE     (2U)
+#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_B_HNP_ENABLE         (3U)
+#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_A_HNP_SUPPORT        (4U)
+#define USB_REQUEST_STANDARD_FEATURE_SELECTOR_A_ALT_HNP_SUPPORT    (5U)
 
 /* USB standard descriptor configure bmAttributes */
-#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_D7_MASK (0x80U)
+#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_D7_MASK  (0x80U)
 #define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_D7_SHIFT (7U)
 
-#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_SELF_POWERED_MASK (0x40U)
+#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_SELF_POWERED_MASK  (0x40U)
 #define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_SELF_POWERED_SHIFT (6U)
 
-#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_REMOTE_WAKEUP_MASK (0x20U)
+#define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_REMOTE_WAKEUP_MASK  (0x20U)
 #define USB_DESCRIPTOR_CONFIGURE_ATTRIBUTE_REMOTE_WAKEUP_SHIFT (5U)
 
 /* USB standard descriptor endpoint bmAttributes */
-#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK (0x80U)
+#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK  (0x80U)
 #define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_SHIFT (7U)
-#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_OUT (0U)
-#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN (0x80U)
+#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_OUT   (0U)
+#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_IN    (0x80U)
 
-#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK (0x0FU)
+#define USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_MASK  (0x0FU)
 #define USB_DESCRIPTOR_ENDPOINT_ADDRESS_NUMBER_SHFIT (0U)
 
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_TYPE_MASK (0x03U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_TYPE_MASK    (0x03U)
 #define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_NUMBER_SHFIT (0U)
 
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_MASK (0x0CU)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_SHFIT (2U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_NO_SYNC (0x00U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_ASYNC (0x04U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_MASK     (0x0CU)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_SHFIT    (2U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_NO_SYNC  (0x00U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_ASYNC    (0x04U)
 #define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_ADAPTIVE (0x08U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_SYNC (0x0CU)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_SYNC_TYPE_SYNC     (0x0CU)
 
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_MASK (0x30U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_SHFIT (4U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_DATA_ENDPOINT (0x00U)
-#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_FEEDBACK_ENDPOINT (0x10U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_MASK                            (0x30U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_SHFIT                           (4U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_DATA_ENDPOINT                   (0x00U)
+#define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_FEEDBACK_ENDPOINT               (0x10U)
 #define USB_DESCRIPTOR_ENDPOINT_ATTRIBUTE_USAGE_TYPE_IMPLICIT_FEEDBACK_DATA_ENDPOINT (0x20U)
 
-#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_SIZE_MASK (0x07FFu)
-#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_MASK (0x1800u)
+#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_SIZE_MASK               (0x07FFu)
+#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_MASK  (0x1800u)
 #define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_SHFIT (11U)
 
 /* USB standard descriptor otg bmAttributes */
@@ -170,9 +170,9 @@ typedef struct _usb_setup_struct
 #define USB_DESCRIPTOR_OTG_ATTRIBUTES_ADP_MASK (0x04u)
 
 /* USB standard descriptor device capability usb20 extension bmAttributes */
-#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_LPM_MASK (0x02U)
-#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_LPM_SHIFT (1U)
-#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_BESL_MASK (0x04U)
+#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_LPM_MASK   (0x02U)
+#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_LPM_SHIFT  (1U)
+#define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_BESL_MASK  (0x04U)
 #define USB_DESCRIPTOR_DEVICE_CAPABILITY_USB20_EXTENSION_BESL_SHIFT (2U)
 
 /* Language structure */
@@ -286,7 +286,8 @@ typedef struct _usb_descriptor_super_speed_device_capability
     uint8_t bU1DevExitLat;
     uint8_t wU2DevExitLat[2];
 } usb_bos_device_capability_susperspeed_desc_t;
-typedef union _usb_descriptor_union {
+typedef union _usb_descriptor_union
+{
     usb_descriptor_common_t common;                        /* Common descriptor */
     usb_descriptor_device_t device;                        /* Device descriptor */
     usb_descriptor_configuration_t configuration;          /* Configuration descriptor */
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/virtual_com.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/virtual_com.h
index cd4704db8..f8a936e1f 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/virtual_com.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/include/virtual_com.h
@@ -16,55 +16,57 @@
  * Definitions
  ******************************************************************************/
 #if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0)
-#define CONTROLLER_ID kUSB_ControllerEhci0
+#define CONTROLLER_ID  kUSB_ControllerEhci0
 #define DATA_BUFF_SIZE HS_CDC_VCOM_BULK_OUT_PACKET_SIZE
 
 #endif
 #if defined(USB_DEVICE_CONFIG_KHCI) && (USB_DEVICE_CONFIG_KHCI > 0)
-#define CONTROLLER_ID kUSB_ControllerKhci0
+#define CONTROLLER_ID  kUSB_ControllerKhci0
 #define DATA_BUFF_SIZE FS_CDC_VCOM_BULK_OUT_PACKET_SIZE
 
 #endif
 #if defined(USB_DEVICE_CONFIG_LPCIP3511FS) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)
-#define CONTROLLER_ID kUSB_ControllerLpcIp3511Fs0
+#define CONTROLLER_ID  kUSB_ControllerLpcIp3511Fs0
 #define DATA_BUFF_SIZE FS_CDC_VCOM_BULK_OUT_PACKET_SIZE
 
 #endif
 
 #if defined(USB_DEVICE_CONFIG_LPCIP3511HS) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)
-#define CONTROLLER_ID kUSB_ControllerLpcIp3511Hs0
+#define CONTROLLER_ID  kUSB_ControllerLpcIp3511Hs0
 #define DATA_BUFF_SIZE HS_CDC_VCOM_BULK_OUT_PACKET_SIZE
 #endif
 
 #define USB_DEVICE_INTERRUPT_PRIORITY (3U)
 
 /* Currently configured line coding */
-#define LINE_CODING_SIZE (0x07)
-#define LINE_CODING_DTERATE (115200)
+#define LINE_CODING_SIZE       (0x07)
+#define LINE_CODING_DTERATE    (115200)
 #define LINE_CODING_CHARFORMAT (0x00)
 #define LINE_CODING_PARITYTYPE (0x00)
-#define LINE_CODING_DATABITS (0x08)
+#define LINE_CODING_DATABITS   (0x08)
 
 /* Communications feature */
 #define COMM_FEATURE_DATA_SIZE (0x02)
-#define STATUS_ABSTRACT_STATE (0x0000)
-#define COUNTRY_SETTING (0x0000)
+#define STATUS_ABSTRACT_STATE  (0x0000)
+#define COUNTRY_SETTING        (0x0000)
 
 /* Notification of serial state */
-#define NOTIF_PACKET_SIZE (0x08)
-#define UART_BITMAP_SIZE (0x02)
+#define NOTIF_PACKET_SIZE  (0x08)
+#define UART_BITMAP_SIZE   (0x02)
 #define NOTIF_REQUEST_TYPE (0xA1)
 
 /* Define the types for application */
 typedef struct _usb_cdc_vcom_struct
 {
-    usb_device_handle deviceHandle;     /* USB device handle. */
-    class_handle_t cdcAcmHandle;        /* USB CDC ACM class handle.                                                         */
-    volatile uint8_t attach;            /* A flag to indicate whether a usb device is attached. 1: attached, 0: not attached */
-    uint8_t speed;                      /* Speed of USB device. USB_SPEED_FULL/USB_SPEED_LOW/USB_SPEED_HIGH.                 */
-    volatile uint8_t startTransactions; /* A flag to indicate whether a CDC device is ready to transmit and receive data.    */
-    uint8_t currentConfiguration;       /* Current configuration value. */
-    uint8_t currentInterfaceAlternateSetting[USB_CDC_VCOM_INTERFACE_COUNT]; /* Current alternate setting value for each interface. */
+    usb_device_handle deviceHandle; /* USB device handle. */
+    class_handle_t cdcAcmHandle; /* USB CDC ACM class handle.                                                         */
+    volatile uint8_t attach;     /* A flag to indicate whether a usb device is attached. 1: attached, 0: not attached */
+    uint8_t speed;               /* Speed of USB device. USB_SPEED_FULL/USB_SPEED_LOW/USB_SPEED_HIGH.                 */
+    volatile uint8_t
+        startTransactions; /* A flag to indicate whether a CDC device is ready to transmit and receive data.    */
+    uint8_t currentConfiguration;                                           /* Current configuration value. */
+    uint8_t currentInterfaceAlternateSetting[USB_CDC_VCOM_INTERFACE_COUNT]; /* Current alternate setting value for each
+                                                                               interface. */
 } usb_cdc_vcom_struct_t;
 
 /* Define the information relates to abstract control model */
@@ -72,11 +74,11 @@ typedef struct _usb_cdc_acm_info
 {
     uint8_t serialStateBuf[NOTIF_PACKET_SIZE + UART_BITMAP_SIZE]; /* Serial state buffer of the CDC device to notify the
                                                                      serial state to host. */
-    bool dtePresent;                                              /* A flag to indicate whether DTE is present.         */
-    uint16_t breakDuration;                                       /* Length of time in milliseconds of the break signal */
-    uint8_t dteStatus;                                            /* Status of data terminal equipment                  */
-    uint8_t currentInterface;                                     /* Current interface index.                           */
-    uint16_t uartState;                                           /* UART state of the CDC device.                      */
+    bool dtePresent;          /* A flag to indicate whether DTE is present.         */
+    uint16_t breakDuration;   /* Length of time in milliseconds of the break signal */
+    uint8_t dteStatus;        /* Status of data terminal equipment                  */
+    uint8_t currentInterface; /* Current interface index.                           */
+    uint16_t uartState;       /* UART state of the CDC device.                      */
 } usb_cdc_acm_info_t;
 
 int VCOMAPPInit(void);
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa.h
index b1bbd0d56..9e8a1a4a4 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa.h
@@ -50,7 +50,7 @@ typedef enum _usb_osa_status
 typedef enum _usb_osa_event_mode
 {
     kUSB_OsaEventManualClear = 0U, /*!< The flags of the event is cleared manually. */
-    kUSB_OsaEventAutoClear = 1U,   /*!< The flags of the event is cleared automatically. */
+    kUSB_OsaEventAutoClear   = 1U, /*!< The flags of the event is cleared automatically. */
 } usb_osa_event_mode_t;
 
 /* Include required header file based on RTOS selection */
@@ -226,7 +226,8 @@ extern "C"
        @endcode
      *
      */
-    extern usb_osa_status_t USB_OsaEventWait(usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet);
+    extern usb_osa_status_t USB_OsaEventWait(
+        usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet);
 
     /*!
      * @brief Checks an event flag.
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.c
index 7f350c99a..f998601c7 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.c
@@ -16,10 +16,10 @@
  * Definitions
  ******************************************************************************/
 #define USB_OSA_BM_EVENT_COUNT (4U)
-#define USB_OSA_BM_SEM_COUNT (1U)
-#define USB_OSA_BM_MSGQ_COUNT (1U)
-#define USB_OSA_BM_MSG_COUNT (8U)
-#define USB_OSA_BM_MSG_SIZE (4U)
+#define USB_OSA_BM_SEM_COUNT   (1U)
+#define USB_OSA_BM_MSGQ_COUNT  (1U)
+#define USB_OSA_BM_MSG_COUNT   (8U)
+#define USB_OSA_BM_MSG_SIZE    (4U)
 
 /* BM Event status structure */
 typedef struct _usb_osa_event_struct
@@ -62,9 +62,12 @@ typedef struct _usb_osa_msgq_struct
  * Variables
  ******************************************************************************/
 
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_sem_struct_t s_UsbBmSemStruct[USB_OSA_BM_SEM_COUNT];
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_event_struct_t s_UsbBmEventStruct[USB_OSA_BM_EVENT_COUNT];
-USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_msgq_struct_t s_UsbBmMsgqStruct[USB_OSA_BM_MSGQ_COUNT];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_sem_struct_t
+    s_UsbBmSemStruct[USB_OSA_BM_SEM_COUNT];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_event_struct_t
+    s_UsbBmEventStruct[USB_OSA_BM_EVENT_COUNT];
+USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_msgq_struct_t
+    s_UsbBmMsgqStruct[USB_OSA_BM_MSGQ_COUNT];
 
 /*******************************************************************************
  * Code
@@ -72,12 +75,10 @@ USB_GLOBAL USB_RAM_ADDRESS_ALIGNMENT(USB_DATA_ALIGN_SIZE) static usb_osa_msgq_st
 
 void *USB_OsaMemoryAllocate(uint32_t length)
 {
-    void *p = (void *)malloc(length);
+    void *p       = (void *)malloc(length);
     uint8_t *temp = (uint8_t *)p;
-    if (p)
-    {
-        for (uint32_t count = 0U; count < length; count++)
-        {
+    if (p) {
+        for (uint32_t count = 0U; count < length; count++) {
             temp[count] = 0U;
         }
     }
@@ -106,31 +107,27 @@ usb_osa_status_t USB_OsaEventCreate(usb_osa_event_handle *handle, uint32_t flag)
     usb_osa_event_struct_t *event = NULL;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t i = 0; i < USB_OSA_BM_EVENT_COUNT; i++)
-    {
-        if (0 == s_UsbBmEventStruct[i].isUsed)
-        {
+    for (uint32_t i = 0; i < USB_OSA_BM_EVENT_COUNT; i++) {
+        if (0 == s_UsbBmEventStruct[i].isUsed) {
             event = &s_UsbBmEventStruct[i];
             break;
         }
     }
 
-    if (NULL == event)
-    {
+    if (NULL == event) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_Error;
     }
 
-    event->value = 0U;
-    event->flag = flag;
+    event->value  = 0U;
+    event->flag   = flag;
     event->isUsed = 1;
-    *handle = event;
+    *handle       = event;
     USB_OSA_EXIT_CRITICAL();
     return kStatus_USB_OSA_Success;
 }
@@ -140,8 +137,7 @@ usb_osa_status_t USB_OsaEventDestroy(usb_osa_event_handle handle)
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         event->isUsed = 0;
         USB_OSA_EXIT_CRITICAL();
@@ -155,8 +151,7 @@ usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         event->value |= bitMask;
         USB_OSA_EXIT_CRITICAL();
@@ -165,38 +160,32 @@ usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
     return kStatus_USB_OSA_Error;
 }
 
-usb_osa_status_t USB_OsaEventWait(usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
+usb_osa_status_t USB_OsaEventWait(
+    usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     uint32_t bits;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         bits = event->value & bitMask;
-        if (flag)
-        {
-            if (bits != bitMask)
-            {
+        if (flag) {
+            if (bits != bitMask) {
                 USB_OSA_EXIT_CRITICAL();
                 return kStatus_USB_OSA_TimeOut;
             }
         }
-        else
-        {
-            if (!bits)
-            {
+        else {
+            if (!bits) {
                 USB_OSA_EXIT_CRITICAL();
                 return kStatus_USB_OSA_TimeOut;
             }
         }
-        if (bitSet)
-        {
+        if (bitSet) {
             *bitSet = bits;
         }
-        if (event->flag)
-        {
+        if (event->flag) {
             event->value &= ~bits;
         }
         USB_OSA_EXIT_CRITICAL();
@@ -211,19 +200,16 @@ usb_osa_status_t USB_OsaEventCheck(usb_osa_event_handle handle, uint32_t bitMask
     uint32_t bits;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         bits = event->value & bitMask;
 
-        if (!bits)
-        {
+        if (!bits) {
             USB_OSA_EXIT_CRITICAL();
             return kStatus_USB_OSA_Error;
         }
 
-        if (bitSet)
-        {
+        if (bitSet) {
             *bitSet = bits;
         }
         USB_OSA_EXIT_CRITICAL();
@@ -238,8 +224,7 @@ usb_osa_status_t USB_OsaEventClear(usb_osa_event_handle handle, uint32_t bitMask
     uint32_t bits;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         bits = event->value & bitMask;
         event->value &= ~bits;
@@ -254,29 +239,25 @@ usb_osa_status_t USB_OsaSemCreate(usb_osa_sem_handle *handle, uint32_t count)
     usb_osa_sem_struct_t *sem = NULL;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t i = 0; i < USB_OSA_BM_SEM_COUNT; i++)
-    {
-        if (0 == s_UsbBmSemStruct[i].isUsed)
-        {
+    for (uint32_t i = 0; i < USB_OSA_BM_SEM_COUNT; i++) {
+        if (0 == s_UsbBmSemStruct[i].isUsed) {
             sem = &s_UsbBmSemStruct[i];
             break;
         }
     }
-    if (NULL == sem)
-    {
+    if (NULL == sem) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_Error;
     }
 
-    sem->value = count;
+    sem->value  = count;
     sem->isUsed = 1;
-    *handle = sem;
+    *handle     = sem;
     USB_OSA_EXIT_CRITICAL();
     return kStatus_USB_OSA_Success;
 }
@@ -286,8 +267,7 @@ usb_osa_status_t USB_OsaSemDestroy(usb_osa_sem_handle handle)
     usb_osa_sem_struct_t *sem = (usb_osa_sem_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (handle)
-    {
+    if (handle) {
         USB_OSA_ENTER_CRITICAL();
         sem->isUsed = 0;
         USB_OSA_EXIT_CRITICAL();
@@ -301,8 +281,7 @@ usb_osa_status_t USB_OsaSemPost(usb_osa_sem_handle handle)
     usb_osa_sem_struct_t *sem = (usb_osa_sem_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -317,18 +296,15 @@ usb_osa_status_t USB_OsaSemWait(usb_osa_sem_handle handle, uint32_t timeout)
     usb_osa_sem_struct_t *sem = (usb_osa_sem_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
     USB_OSA_ENTER_CRITICAL();
-    if (sem->value)
-    {
+    if (sem->value) {
         sem->value--;
     }
-    else
-    {
+    else {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_TimeOut;
     }
@@ -338,8 +314,7 @@ usb_osa_status_t USB_OsaSemWait(usb_osa_sem_handle handle, uint32_t timeout)
 
 usb_osa_status_t USB_OsaMutexCreate(usb_osa_mutex_handle *handle)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     *handle = (usb_osa_mutex_handle)0xFFFF0000U;
@@ -364,32 +339,28 @@ usb_osa_status_t USB_OsaMsgqCreate(usb_osa_msgq_handle *handle, uint32_t count,
     usb_osa_msgq_struct_t *msgq = NULL;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     USB_OSA_ENTER_CRITICAL();
 
-    for (uint32_t i = 0; i < USB_OSA_BM_MSGQ_COUNT; i++)
-    {
-        if (0 == s_UsbBmMsgqStruct[i].isUsed)
-        {
+    for (uint32_t i = 0; i < USB_OSA_BM_MSGQ_COUNT; i++) {
+        if (0 == s_UsbBmMsgqStruct[i].isUsed) {
             msgq = &s_UsbBmMsgqStruct[i];
             break;
         }
     }
-    if ((NULL == msgq) || (count > USB_OSA_BM_MSG_COUNT) || (size > USB_OSA_BM_MSG_SIZE))
-    {
+    if ((NULL == msgq) || (count > USB_OSA_BM_MSG_COUNT) || (size > USB_OSA_BM_MSG_SIZE)) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_Error;
     }
-    msgq->count = count;
-    msgq->msgSize = size;
+    msgq->count    = count;
+    msgq->msgSize  = size;
     msgq->msgCount = 0U;
-    msgq->index = 0U;
-    msgq->current = 0U;
-    msgq->isUsed = 1;
-    *handle = msgq;
+    msgq->index    = 0U;
+    msgq->current  = 0U;
+    msgq->isUsed   = 1;
+    *handle        = msgq;
     USB_OSA_EXIT_CRITICAL();
     return kStatus_USB_OSA_Success;
 }
@@ -399,8 +370,7 @@ usb_osa_status_t USB_OsaMsgqDestroy(usb_osa_msgq_handle handle)
     usb_osa_msgq_struct_t *msgq = (usb_osa_msgq_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     USB_OSA_ENTER_CRITICAL();
@@ -418,28 +388,24 @@ usb_osa_status_t USB_OsaMsgqSend(usb_osa_msgq_handle handle, void *msg)
     uint32_t count;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     USB_OSA_ENTER_CRITICAL();
-    if (msgq->msgCount >= msgq->count)
-    {
+    if (msgq->msgCount >= msgq->count) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_Error;
     }
 
     msgEntity = &msgq->msgs[msgq->index];
-    p = (uint32_t *)&msgEntity->msg[0];
-    q = (uint32_t *)msg;
+    p         = (uint32_t *)&msgEntity->msg[0];
+    q         = (uint32_t *)msg;
 
-    for (count = 0U; count < msgq->msgSize; count++)
-    {
+    for (count = 0U; count < msgq->msgSize; count++) {
         p[count] = q[count];
     }
 
-    if (0U == msgq->msgCount)
-    {
+    if (0U == msgq->msgCount) {
         msgq->current = msgq->index;
     }
 
@@ -461,23 +427,20 @@ usb_osa_status_t USB_OsaMsgqRecv(usb_osa_msgq_handle handle, void *msg, uint32_t
     uint32_t count;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     USB_OSA_ENTER_CRITICAL();
-    if (msgq->msgCount < 1U)
-    {
+    if (msgq->msgCount < 1U) {
         USB_OSA_EXIT_CRITICAL();
         return kStatus_USB_OSA_TimeOut;
     }
 
     msgEntity = &msgq->msgs[msgq->current];
-    q = (uint32_t *)&msgEntity->msg[0];
-    p = (uint32_t *)msg;
+    q         = (uint32_t *)&msgEntity->msg[0];
+    p         = (uint32_t *)msg;
 
-    for (count = 0U; count < msgq->msgSize; count++)
-    {
+    for (count = 0U; count < msgq->msgSize; count++) {
         p[count] = q[count];
     }
 
@@ -496,8 +459,7 @@ usb_osa_status_t USB_OsaMsgqCheck(usb_osa_msgq_handle handle, void *msg)
     uint32_t msgCount;
     USB_OSA_SR_ALLOC();
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -505,10 +467,8 @@ usb_osa_status_t USB_OsaMsgqCheck(usb_osa_msgq_handle handle, void *msg)
     msgCount = msgq->msgCount;
     USB_OSA_EXIT_CRITICAL();
 
-    if (msgCount)
-    {
-        if (kStatus_USB_OSA_Success == USB_OsaMsgqRecv(msgq, msg, 0U))
-        {
+    if (msgCount) {
+        if (kStatus_USB_OSA_Success == USB_OsaMsgqRecv(msgq, msg, 0U)) {
             return kStatus_USB_OSA_Success;
         }
     }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.h
index 73ce1e4db..9852e96e4 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_bm.h
@@ -13,9 +13,9 @@
  * Definitions
  ******************************************************************************/
 
-#define USB_OSA_SR_ALLOC() uint32_t usbOsaCurrentSr;
+#define USB_OSA_SR_ALLOC()       uint32_t usbOsaCurrentSr;
 #define USB_OSA_ENTER_CRITICAL() USB_OsaEnterCritical(&usbOsaCurrentSr)
-#define USB_OSA_EXIT_CRITICAL() USB_OsaExitCritical(usbOsaCurrentSr)
+#define USB_OSA_EXIT_CRITICAL()  USB_OsaExitCritical(usbOsaCurrentSr)
 
 /*******************************************************************************
  * API
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.c
index dd253422b..49fac0260 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.c
@@ -15,17 +15,17 @@
  * Definitions
  ******************************************************************************/
 
-#define MSEC_TO_TICK(msec) ((1000L + ((uint32_t)configTICK_RATE_HZ * (uint32_t)(msec - 1U))) / 1000L)
+#define MSEC_TO_TICK(msec)  ((1000L + ((uint32_t)configTICK_RATE_HZ * (uint32_t)(msec - 1U))) / 1000L)
 #define TICKS_TO_MSEC(tick) ((tick)*1000uL / (uint32_t)configTICK_RATE_HZ)
 
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
 
 #define USB_OSA_FREERTOS_EVENT_COUNT (2U)
-#define USB_OSA_FREERTOS_SEM_COUNT (1U)
+#define USB_OSA_FREERTOS_SEM_COUNT   (1U)
 #define USB_OSA_FREERTOS_MUTEX_COUNT (3U)
-#define USB_OSA_FREERTOS_MSGQ_COUNT (1U)
-#define USB_OSA_FREERTOS_MSG_COUNT (8U)
-#define USB_OSA_FREERTOS_MSG_SIZE (4U)
+#define USB_OSA_FREERTOS_MSGQ_COUNT  (1U)
+#define USB_OSA_FREERTOS_MSG_COUNT   (8U)
+#define USB_OSA_FREERTOS_MSG_SIZE    (4U)
 
 /* FreeRTOS Event status structure */
 typedef struct _usb_osa_event_struct
@@ -94,12 +94,10 @@ typedef struct _usb_osa_event_struct
 
 void *USB_OsaMemoryAllocate(uint32_t length)
 {
-    void *p = (void *)pvPortMalloc(length);
+    void *p       = (void *)pvPortMalloc(length);
     uint8_t *temp = (uint8_t *)p;
-    if (p)
-    {
-        for (uint32_t count = 0U; count < length; count++)
-        {
+    if (p) {
+        for (uint32_t count = 0U; count < length; count++) {
             temp[count] = 0U;
         }
     }
@@ -120,8 +118,7 @@ void USB_OsaEnterCritical(uint8_t *sr)
     {
         *sr = portSET_INTERRUPT_MASK_FROM_ISR();
     }
-    else
-    {
+    else {
         portENTER_CRITICAL();
     }
 }
@@ -136,8 +133,7 @@ void USB_OsaExitCritical(uint8_t sr)
     {
         portCLEAR_INTERRUPT_MASK_FROM_ISR(sr);
     }
-    else
-    {
+    else {
         portEXIT_CRITICAL();
     }
 }
@@ -149,35 +145,30 @@ usb_osa_status_t USB_OsaEventCreate(usb_osa_event_handle *handle, uint32_t flag)
     USB_OSA_SR_ALLOC();
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t index = 0; index < USB_OSA_FREERTOS_EVENT_COUNT; index++)
-    {
-        if (0 == s_UsbFreertosEventStruct[index].isUsed)
-        {
-            event = &s_UsbFreertosEventStruct[index];
+    for (uint32_t index = 0; index < USB_OSA_FREERTOS_EVENT_COUNT; index++) {
+        if (0 == s_UsbFreertosEventStruct[index].isUsed) {
+            event         = &s_UsbFreertosEventStruct[index];
             event->isUsed = 1U;
             break;
         }
     }
     USB_OSA_EXIT_CRITICAL();
 #else
-    event = (usb_osa_event_struct_t *)USB_OsaMemoryAllocate(sizeof(usb_osa_event_struct_t));
+    event         = (usb_osa_event_struct_t *)USB_OsaMemoryAllocate(sizeof(usb_osa_event_struct_t));
 #endif
-    if (NULL == event)
-    {
+    if (NULL == event) {
         return kStatus_USB_OSA_Error;
     }
 
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     event->handle = xEventGroupCreateStatic(&event->event);
-    if (NULL == event->handle)
-    {
+    if (NULL == event->handle) {
         USB_OSA_ENTER_CRITICAL();
         event->isUsed = 0U;
         USB_OSA_EXIT_CRITICAL();
@@ -185,14 +176,13 @@ usb_osa_status_t USB_OsaEventCreate(usb_osa_event_handle *handle, uint32_t flag)
     }
 #else
     event->handle = xEventGroupCreate();
-    if (NULL == event->handle)
-    {
+    if (NULL == event->handle) {
         USB_OsaMemoryFree(event);
         return kStatus_USB_OSA_Error;
     }
 #endif
     event->flag = flag;
-    *handle = event;
+    *handle     = event;
     return kStatus_USB_OSA_Success;
 }
 
@@ -203,10 +193,8 @@ usb_osa_status_t USB_OsaEventDestroy(usb_osa_event_handle handle)
     USB_OSA_SR_ALLOC();
 #endif
 
-    if (handle)
-    {
-        if (event->handle)
-        {
+    if (handle) {
+        if (event->handle) {
             vEventGroupDelete(event->handle);
         }
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
@@ -224,24 +212,21 @@ usb_osa_status_t USB_OsaEventDestroy(usb_osa_event_handle handle)
 usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
-    portBASE_TYPE taskToWake = pdFALSE;
-    if (handle)
-    {
+    portBASE_TYPE taskToWake      = pdFALSE;
+    if (handle) {
 #if defined(__GIC_PRIO_BITS)
         if ((__get_CPSR() & CPSR_M_Msk) == 0x13)
 #else
         if (__get_IPSR())
 #endif
         {
-            if (pdPASS == xEventGroupSetBitsFromISR(event->handle, (EventBits_t)bitMask, &taskToWake))
-            {
+            if (pdPASS == xEventGroupSetBitsFromISR(event->handle, (EventBits_t)bitMask, &taskToWake)) {
                 MISRAC_DISABLE
                 portYIELD_FROM_ISR(taskToWake);
                 MISRAC_ENABLE
             }
         }
-        else
-        {
+        else {
             xEventGroupSetBits(event->handle, (EventBits_t)bitMask);
         }
         return kStatus_USB_OSA_Success;
@@ -249,39 +234,33 @@ usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
     return kStatus_USB_OSA_Error;
 }
 
-usb_osa_status_t USB_OsaEventWait(usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
+usb_osa_status_t USB_OsaEventWait(
+    usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     BaseType_t autoClear;
     EventBits_t bits;
 
-    if (handle)
-    {
-        if (!timeout)
-        {
+    if (handle) {
+        if (!timeout) {
             timeout = portMAX_DELAY;
         }
-        else
-        {
+        else {
             timeout = MSEC_TO_TICK(timeout);
         }
 
-        if (event->flag)
-        {
+        if (event->flag) {
             autoClear = pdTRUE;
         }
-        else
-        {
+        else {
             autoClear = pdFALSE;
         }
 
         bits = xEventGroupWaitBits(event->handle, (EventBits_t)bitMask, autoClear, (BaseType_t)flag, timeout);
 
-        if (bitSet)
-        {
+        if (bitSet) {
             *bitSet = bits & ((EventBits_t)bitMask);
-            if (*bitSet)
-            {
+            if (*bitSet) {
                 return kStatus_USB_OSA_Success;
             }
             return kStatus_USB_OSA_TimeOut;
@@ -295,8 +274,7 @@ usb_osa_status_t USB_OsaEventCheck(usb_osa_event_handle handle, uint32_t bitMask
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     EventBits_t bits;
 
-    if (handle)
-    {
+    if (handle) {
 #if defined(__GIC_PRIO_BITS)
         if ((__get_CPSR() & CPSR_M_Msk) == 0x13)
 #else
@@ -305,15 +283,12 @@ usb_osa_status_t USB_OsaEventCheck(usb_osa_event_handle handle, uint32_t bitMask
         {
             bits = xEventGroupGetBitsFromISR(event->handle);
         }
-        else
-        {
+        else {
             bits = xEventGroupGetBits(event->handle);
         }
         bits = (bits & bitMask);
-        if (bits)
-        {
-            if (bitSet)
-            {
+        if (bits) {
+            if (bitSet) {
                 *bitSet = bits & ((EventBits_t)bitMask);
             }
             return kStatus_USB_OSA_Success;
@@ -327,8 +302,7 @@ usb_osa_status_t USB_OsaEventClear(usb_osa_event_handle handle, uint32_t bitMask
     EventBits_t ev;
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
 
-    if (handle)
-    {
+    if (handle) {
 #if defined(__GIC_PRIO_BITS)
         if ((__get_CPSR() & CPSR_M_Msk) == 0x13)
 #else
@@ -337,11 +311,9 @@ usb_osa_status_t USB_OsaEventClear(usb_osa_event_handle handle, uint32_t bitMask
         {
             xEventGroupClearBitsFromISR(event->handle, (EventBits_t)bitMask);
         }
-        else
-        {
+        else {
             ev = xEventGroupClearBits(event->handle, (EventBits_t)bitMask);
-            if (ev == 0)
-            {
+            if (ev == 0) {
                 return kStatus_USB_OSA_Error;
             }
         }
@@ -356,30 +328,25 @@ usb_osa_status_t USB_OsaSemCreate(usb_osa_sem_handle *handle, uint32_t count)
     usb_osa_sem_struct_t *sem = NULL;
     USB_OSA_SR_ALLOC();
 #endif
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t index = 0; index < USB_OSA_FREERTOS_SEM_COUNT; index++)
-    {
-        if (0 == s_UsbFreertosSemStruct[index].isUsed)
-        {
-            sem = &s_UsbFreertosSemStruct[index];
+    for (uint32_t index = 0; index < USB_OSA_FREERTOS_SEM_COUNT; index++) {
+        if (0 == s_UsbFreertosSemStruct[index].isUsed) {
+            sem         = &s_UsbFreertosSemStruct[index];
             sem->isUsed = 1U;
             break;
         }
     }
     USB_OSA_EXIT_CRITICAL();
-    if (NULL == sem)
-    {
+    if (NULL == sem) {
         return kStatus_USB_OSA_Error;
     }
     sem->handle = xSemaphoreCreateCountingStatic(0xFFU, count, &sem->sem);
-    if (NULL == (sem->handle))
-    {
+    if (NULL == (sem->handle)) {
         USB_OSA_ENTER_CRITICAL();
         sem->isUsed = 0U;
         USB_OSA_EXIT_CRITICAL();
@@ -388,8 +355,7 @@ usb_osa_status_t USB_OsaSemCreate(usb_osa_sem_handle *handle, uint32_t count)
     *handle = (usb_osa_sem_handle)sem;
 #else
     *handle = (usb_osa_sem_handle)xSemaphoreCreateCounting(0xFFU, count);
-    if (NULL == (*handle))
-    {
+    if (NULL == (*handle)) {
         return kStatus_USB_OSA_Error;
     }
 #endif
@@ -403,8 +369,7 @@ usb_osa_status_t USB_OsaSemDestroy(usb_osa_sem_handle handle)
     usb_osa_sem_struct_t *sem = (usb_osa_sem_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 #endif
-    if (handle)
-    {
+    if (handle) {
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
         vSemaphoreDelete(sem->handle);
         USB_OSA_ENTER_CRITICAL();
@@ -428,8 +393,7 @@ usb_osa_status_t USB_OsaSemPost(usb_osa_sem_handle handle)
 #endif
     portBASE_TYPE taskToWake = pdFALSE;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -442,18 +406,15 @@ usb_osa_status_t USB_OsaSemPost(usb_osa_sem_handle handle)
     if (__get_IPSR())
 #endif
     {
-        if (pdPASS == xSemaphoreGiveFromISR(sem, &taskToWake))
-        {
+        if (pdPASS == xSemaphoreGiveFromISR(sem, &taskToWake)) {
             MISRAC_DISABLE
             portYIELD_FROM_ISR(taskToWake);
             MISRAC_ENABLE
             return kStatus_USB_OSA_Success;
         }
     }
-    else
-    {
-        if (pdTRUE == xSemaphoreGive(sem))
-        {
+    else {
+        if (pdTRUE == xSemaphoreGive(sem)) {
             return kStatus_USB_OSA_Success;
         }
     }
@@ -469,24 +430,20 @@ usb_osa_status_t USB_OsaSemWait(usb_osa_sem_handle handle, uint32_t timeout)
     SemaphoreHandle_t sem = (SemaphoreHandle_t)handle;
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     sem = (SemaphoreHandle_t)osaSem->handle;
 #endif
-    if (!timeout)
-    {
+    if (!timeout) {
         timeout = portMAX_DELAY;
     }
-    else
-    {
+    else {
         timeout = MSEC_TO_TICK(timeout);
     }
 
-    if (pdFALSE == xSemaphoreTake(sem, timeout))
-    {
+    if (pdFALSE == xSemaphoreTake(sem, timeout)) {
         return kStatus_USB_OSA_TimeOut;
     }
     return kStatus_USB_OSA_Success;
@@ -498,29 +455,24 @@ usb_osa_status_t USB_OsaMutexCreate(usb_osa_mutex_handle *handle)
     usb_osa_sem_struct_t *mutex = NULL;
     USB_OSA_SR_ALLOC();
 #endif
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t index = 0; index < USB_OSA_FREERTOS_MUTEX_COUNT; index++)
-    {
-        if (0 == s_UsbFreertosMutexStruct[index].isUsed)
-        {
-            mutex = &s_UsbFreertosMutexStruct[index];
+    for (uint32_t index = 0; index < USB_OSA_FREERTOS_MUTEX_COUNT; index++) {
+        if (0 == s_UsbFreertosMutexStruct[index].isUsed) {
+            mutex         = &s_UsbFreertosMutexStruct[index];
             mutex->isUsed = 1U;
             break;
         }
     }
     USB_OSA_EXIT_CRITICAL();
-    if (NULL == mutex)
-    {
+    if (NULL == mutex) {
         return kStatus_USB_OSA_Error;
     }
     mutex->handle = xSemaphoreCreateRecursiveMutexStatic(&mutex->sem);
-    if (NULL == (mutex->handle))
-    {
+    if (NULL == (mutex->handle)) {
         USB_OSA_ENTER_CRITICAL();
         mutex->isUsed = 0U;
         USB_OSA_EXIT_CRITICAL();
@@ -528,9 +480,8 @@ usb_osa_status_t USB_OsaMutexCreate(usb_osa_mutex_handle *handle)
     }
     *handle = (usb_osa_sem_handle)mutex;
 #else
-    *handle = (usb_osa_sem_handle)xSemaphoreCreateRecursiveMutex();
-    if (NULL == (*handle))
-    {
+    *handle               = (usb_osa_sem_handle)xSemaphoreCreateRecursiveMutex();
+    if (NULL == (*handle)) {
         return kStatus_USB_OSA_Error;
     }
 #endif
@@ -543,8 +494,7 @@ usb_osa_status_t USB_OsaMutexDestroy(usb_osa_mutex_handle handle)
     usb_osa_sem_struct_t *mutex = (usb_osa_sem_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 #endif
-    if (handle)
-    {
+    if (handle) {
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
         vSemaphoreDelete(mutex->handle);
         USB_OSA_ENTER_CRITICAL();
@@ -567,15 +517,13 @@ usb_osa_status_t USB_OsaMutexLock(usb_osa_mutex_handle handle)
     SemaphoreHandle_t mutex = (SemaphoreHandle_t)handle;
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     mutex = (SemaphoreHandle_t)osaMutex->handle;
 #endif
-    if (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) == pdFALSE)
-    {
+    if (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) == pdFALSE) {
         return kStatus_USB_OSA_TimeOut;
     }
 
@@ -591,15 +539,13 @@ usb_osa_status_t USB_OsaMutexUnlock(usb_osa_mutex_handle handle)
     SemaphoreHandle_t mutex = (SemaphoreHandle_t)handle;
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     mutex = (SemaphoreHandle_t)osaMutex->handle;
 #endif
-    if (xSemaphoreGiveRecursive(mutex) == pdFALSE)
-    {
+    if (xSemaphoreGiveRecursive(mutex) == pdFALSE) {
         return kStatus_USB_OSA_Error;
     }
     return kStatus_USB_OSA_Success;
@@ -611,30 +557,25 @@ usb_osa_status_t USB_OsaMsgqCreate(usb_osa_msgq_handle *handle, uint32_t count,
     usb_osa_msgq_struct_t *msgq = NULL;
     USB_OSA_SR_ALLOC();
 #endif
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
 #if (defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION > 0U))
     USB_OSA_ENTER_CRITICAL();
-    for (uint32_t index = 0; index < USB_OSA_FREERTOS_MSGQ_COUNT; index++)
-    {
-        if (0 == s_UsbFreertosMsgqStruct[index].isUsed)
-        {
-            msgq = &s_UsbFreertosMsgqStruct[index];
+    for (uint32_t index = 0; index < USB_OSA_FREERTOS_MSGQ_COUNT; index++) {
+        if (0 == s_UsbFreertosMsgqStruct[index].isUsed) {
+            msgq         = &s_UsbFreertosMsgqStruct[index];
             msgq->isUsed = 1U;
             break;
         }
     }
     USB_OSA_EXIT_CRITICAL();
-    if (NULL == msgq)
-    {
+    if (NULL == msgq) {
         return kStatus_USB_OSA_Error;
     }
     msgq->handle = xQueueCreateStatic(count, size * sizeof(uint32_t), (uint8_t *)&msgq->msgs[0], &msgq->queue);
-    if (NULL == (msgq->handle))
-    {
+    if (NULL == (msgq->handle)) {
         USB_OSA_ENTER_CRITICAL();
         msgq->isUsed = 0U;
         USB_OSA_EXIT_CRITICAL();
@@ -642,9 +583,8 @@ usb_osa_status_t USB_OsaMsgqCreate(usb_osa_msgq_handle *handle, uint32_t count,
     }
     *handle = (usb_osa_msgq_handle)msgq;
 #else
-    *handle = (usb_osa_msgq_handle)xQueueCreate(count, size * sizeof(uint32_t));
-    if (NULL == (*handle))
-    {
+    *handle                 = (usb_osa_msgq_handle)xQueueCreate(count, size * sizeof(uint32_t));
+    if (NULL == (*handle)) {
         return kStatus_USB_OSA_Error;
     }
 #endif
@@ -658,8 +598,7 @@ usb_osa_status_t USB_OsaMsgqDestroy(usb_osa_msgq_handle handle)
     usb_osa_msgq_struct_t *msgq = (usb_osa_msgq_struct_t *)handle;
     USB_OSA_SR_ALLOC();
 #endif
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -684,8 +623,7 @@ usb_osa_status_t USB_OsaMsgqSend(usb_osa_msgq_handle handle, void *msg)
 #endif
     portBASE_TYPE taskToWake = pdFALSE;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -699,18 +637,15 @@ usb_osa_status_t USB_OsaMsgqSend(usb_osa_msgq_handle handle, void *msg)
     if (__get_IPSR())
 #endif
     {
-        if (pdPASS == xQueueSendToBackFromISR(msgq, msg, &taskToWake))
-        {
+        if (pdPASS == xQueueSendToBackFromISR(msgq, msg, &taskToWake)) {
             MISRAC_DISABLE
             portYIELD_FROM_ISR(taskToWake);
             MISRAC_ENABLE
             return kStatus_USB_OSA_Success;
         }
     }
-    else
-    {
-        if (pdPASS == xQueueSendToBack(msgq, msg, 0U))
-        {
+    else {
+        if (pdPASS == xQueueSendToBack(msgq, msg, 0U)) {
             return kStatus_USB_OSA_Success;
         }
     }
@@ -726,8 +661,7 @@ usb_osa_status_t USB_OsaMsgqRecv(usb_osa_msgq_handle handle, void *msg, uint32_t
     QueueHandle_t msgq = (QueueHandle_t)handle;
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -735,16 +669,13 @@ usb_osa_status_t USB_OsaMsgqRecv(usb_osa_msgq_handle handle, void *msg, uint32_t
     msgq = osaMsgq->handle;
 #endif
 
-    if (!timeout)
-    {
+    if (!timeout) {
         timeout = portMAX_DELAY;
     }
-    else
-    {
+    else {
         timeout = MSEC_TO_TICK(timeout);
     }
-    if (pdPASS != xQueueReceive(msgq, msg, timeout))
-    {
+    if (pdPASS != xQueueReceive(msgq, msg, timeout)) {
         return kStatus_USB_OSA_TimeOut;
     }
     return kStatus_USB_OSA_Success;
@@ -759,8 +690,7 @@ usb_osa_status_t USB_OsaMsgqCheck(usb_osa_msgq_handle handle, void *msg)
     QueueHandle_t msgq = (QueueHandle_t)handle;
 #endif
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -768,10 +698,8 @@ usb_osa_status_t USB_OsaMsgqCheck(usb_osa_msgq_handle handle, void *msg)
     msgq = osaMsgq->handle;
 #endif
 
-    if (uxQueueMessagesWaiting(msgq))
-    {
-        if (pdPASS == xQueueReceive(msgq, msg, 1U))
-        {
+    if (uxQueueMessagesWaiting(msgq)) {
+        if (pdPASS == xQueueReceive(msgq, msg, 1U)) {
             return kStatus_USB_OSA_Success;
         }
     }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.h
index 1b19657ca..0065e16d0 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa/usb_osa_freertos.h
@@ -14,7 +14,7 @@
  * Workaround to disable MISRA C message suppress warnings for IAR compiler.
  * http://supp.iar.com/Support/?note=24725
  */
-#define MISRAC_DISABLE                                                                                                                                         \
+#define MISRAC_DISABLE                                                                                                 \
     _Pragma("diag_suppress=                       \
     Pm001,Pm002,Pm003,Pm004,Pm005,Pm006,Pm007,Pm008,Pm009,Pm010,Pm011,\
     Pm012,Pm013,Pm014,Pm015,Pm016,Pm017,Pm018,Pm019,Pm020,Pm021,Pm022,\
@@ -32,7 +32,7 @@
     Pm144,Pm145,Pm146,Pm147,Pm148,Pm149,Pm150,Pm151,Pm152,Pm153,Pm154,\
     Pm155")
 
-#define MISRAC_ENABLE                                                                                                                                          \
+#define MISRAC_ENABLE                                                                                                  \
     _Pragma("diag_default=                         \
     Pm001,Pm002,Pm003,Pm004,Pm005,Pm006,Pm007,Pm008,Pm009,Pm010,Pm011,\
     Pm012,Pm013,Pm014,Pm015,Pm016,Pm017,Pm018,Pm019,Pm020,Pm021,Pm022,\
@@ -65,9 +65,9 @@ MISRAC_ENABLE
  * Definitions
  ******************************************************************************/
 
-#define USB_OSA_SR_ALLOC() uint8_t usbOsaCurrentSr;
+#define USB_OSA_SR_ALLOC()       uint8_t usbOsaCurrentSr;
 #define USB_OSA_ENTER_CRITICAL() USB_OsaEnterCritical(&usbOsaCurrentSr)
-#define USB_OSA_EXIT_CRITICAL() USB_OsaExitCritical(usbOsaCurrentSr)
+#define USB_OSA_EXIT_CRITICAL()  USB_OsaExitCritical(usbOsaCurrentSr)
 
 /*******************************************************************************
  * API
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa.h
index b1bbd0d56..9e8a1a4a4 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa.h
@@ -50,7 +50,7 @@ typedef enum _usb_osa_status
 typedef enum _usb_osa_event_mode
 {
     kUSB_OsaEventManualClear = 0U, /*!< The flags of the event is cleared manually. */
-    kUSB_OsaEventAutoClear = 1U,   /*!< The flags of the event is cleared automatically. */
+    kUSB_OsaEventAutoClear   = 1U, /*!< The flags of the event is cleared automatically. */
 } usb_osa_event_mode_t;
 
 /* Include required header file based on RTOS selection */
@@ -226,7 +226,8 @@ extern "C"
        @endcode
      *
      */
-    extern usb_osa_status_t USB_OsaEventWait(usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet);
+    extern usb_osa_status_t USB_OsaEventWait(
+        usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet);
 
     /*!
      * @brief Checks an event flag.
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.c
index 49023449d..5ecb73348 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.c
@@ -37,7 +37,7 @@
  * Definitions
  ******************************************************************************/
 
-#define MSEC_TO_TICK(msec) ((1000L + ((uint32_t)configTICK_RATE_HZ * (uint32_t)(msec - 1U))) / 1000L)
+#define MSEC_TO_TICK(msec)  ((1000L + ((uint32_t)configTICK_RATE_HZ * (uint32_t)(msec - 1U))) / 1000L)
 #define TICKS_TO_MSEC(tick) ((tick)*1000uL / (uint32_t)configTICK_RATE_HZ)
 
 /* FreeRTOS Event status structure */
@@ -61,12 +61,10 @@ typedef struct _usb_osa_event_struct
 
 void *USB_OsaMemoryAllocate(uint32_t length)
 {
-    void *p = (void *)pvPortMalloc(length);
+    void *p       = (void *)pvPortMalloc(length);
     uint8_t *temp = (uint8_t *)p;
-    if (p)
-    {
-        for (uint32_t count = 0U; count < length; count++)
-        {
+    if (p) {
+        for (uint32_t count = 0U; count < length; count++) {
             temp[count] = 0U;
         }
     }
@@ -79,24 +77,20 @@ void USB_OsaMemoryFree(void *p)
 }
 void USB_OsaEnterCritical(uint8_t *sr)
 {
-    if (__get_IPSR())
-    {
+    if (__get_IPSR()) {
         *sr = portSET_INTERRUPT_MASK_FROM_ISR();
     }
-    else
-    {
+    else {
         portENTER_CRITICAL();
     }
 }
 
 void USB_OsaExitCritical(uint8_t sr)
 {
-    if (__get_IPSR())
-    {
+    if (__get_IPSR()) {
         portCLEAR_INTERRUPT_MASK_FROM_ISR(sr);
     }
-    else
-    {
+    else {
         portEXIT_CRITICAL();
     }
 }
@@ -105,34 +99,29 @@ usb_osa_status_t USB_OsaEventCreate(usb_osa_event_handle *handle, uint32_t flag)
 {
     usb_osa_event_struct_t *event;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     event = (usb_osa_event_struct_t *)USB_OsaMemoryAllocate(sizeof(usb_osa_event_struct_t));
-    if (NULL == event)
-    {
+    if (NULL == event) {
         return kStatus_USB_OSA_Error;
     }
 
     event->handle = xEventGroupCreate();
-    if (NULL == event->handle)
-    {
+    if (NULL == event->handle) {
         USB_OsaMemoryFree(event);
         return kStatus_USB_OSA_Error;
     }
     event->flag = flag;
-    *handle = event;
+    *handle     = event;
     return kStatus_USB_OSA_Success;
 }
 
 usb_osa_status_t USB_OsaEventDestroy(usb_osa_event_handle handle)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
-    if (handle)
-    {
-        if (event->handle)
-        {
+    if (handle) {
+        if (event->handle) {
             vEventGroupDelete(event->handle);
         }
         USB_OsaMemoryFree(handle);
@@ -144,18 +133,14 @@ usb_osa_status_t USB_OsaEventDestroy(usb_osa_event_handle handle)
 usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
-    portBASE_TYPE taskToWake = pdFALSE;
-    if (handle)
-    {
-        if (__get_IPSR())
-        {
-            if (pdPASS == xEventGroupSetBitsFromISR(event->handle, (EventBits_t)bitMask, &taskToWake))
-            {
+    portBASE_TYPE taskToWake      = pdFALSE;
+    if (handle) {
+        if (__get_IPSR()) {
+            if (pdPASS == xEventGroupSetBitsFromISR(event->handle, (EventBits_t)bitMask, &taskToWake)) {
                 portYIELD_FROM_ISR(taskToWake);
             }
         }
-        else
-        {
+        else {
             xEventGroupSetBits(event->handle, (EventBits_t)bitMask);
         }
         return kStatus_USB_OSA_Success;
@@ -163,39 +148,33 @@ usb_osa_status_t USB_OsaEventSet(usb_osa_event_handle handle, uint32_t bitMask)
     return kStatus_USB_OSA_Error;
 }
 
-usb_osa_status_t USB_OsaEventWait(usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
+usb_osa_status_t USB_OsaEventWait(
+    usb_osa_event_handle handle, uint32_t bitMask, uint32_t flag, uint32_t timeout, uint32_t *bitSet)
 {
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     BaseType_t autoClear;
     EventBits_t bits;
 
-    if (handle)
-    {
-        if (!timeout)
-        {
+    if (handle) {
+        if (!timeout) {
             timeout = portMAX_DELAY;
         }
-        else
-        {
+        else {
             timeout = MSEC_TO_TICK(timeout);
         }
 
-        if (event->flag)
-        {
+        if (event->flag) {
             autoClear = pdTRUE;
         }
-        else
-        {
+        else {
             autoClear = pdFALSE;
         }
 
         bits = xEventGroupWaitBits(event->handle, (EventBits_t)bitMask, autoClear, (BaseType_t)flag, timeout);
 
-        if (bitSet)
-        {
+        if (bitSet) {
             *bitSet = bits & ((EventBits_t)bitMask);
-            if (*bitSet)
-            {
+            if (*bitSet) {
                 return kStatus_USB_OSA_Success;
             }
             return kStatus_USB_OSA_TimeOut;
@@ -209,21 +188,16 @@ usb_osa_status_t USB_OsaEventCheck(usb_osa_event_handle handle, uint32_t bitMask
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
     EventBits_t bits;
 
-    if (handle)
-    {
-        if (__get_IPSR())
-        {
+    if (handle) {
+        if (__get_IPSR()) {
             bits = xEventGroupGetBitsFromISR(event->handle);
         }
-        else
-        {
+        else {
             bits = xEventGroupGetBits(event->handle);
         }
         bits = (bits & bitMask);
-        if (bits)
-        {
-            if (bitSet)
-            {
+        if (bits) {
+            if (bitSet) {
                 *bitSet = bits & ((EventBits_t)bitMask);
             }
             return kStatus_USB_OSA_Success;
@@ -237,17 +211,13 @@ usb_osa_status_t USB_OsaEventClear(usb_osa_event_handle handle, uint32_t bitMask
     EventBits_t ev;
     usb_osa_event_struct_t *event = (usb_osa_event_struct_t *)handle;
 
-    if (handle)
-    {
-        if (__get_IPSR())
-        {
+    if (handle) {
+        if (__get_IPSR()) {
             xEventGroupClearBitsFromISR(event->handle, (EventBits_t)bitMask);
         }
-        else
-        {
+        else {
             ev = xEventGroupClearBits(event->handle, (EventBits_t)bitMask);
-            if (ev == 0)
-            {
+            if (ev == 0) {
                 return kStatus_USB_OSA_Error;
             }
         }
@@ -258,14 +228,12 @@ usb_osa_status_t USB_OsaEventClear(usb_osa_event_handle handle, uint32_t bitMask
 
 usb_osa_status_t USB_OsaSemCreate(usb_osa_sem_handle *handle, uint32_t count)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
     *handle = (usb_osa_sem_handle)xSemaphoreCreateCounting(0xFFU, count);
-    if (NULL == (*handle))
-    {
+    if (NULL == (*handle)) {
         return kStatus_USB_OSA_Error;
     }
     return kStatus_USB_OSA_Success;
@@ -273,8 +241,7 @@ usb_osa_status_t USB_OsaSemCreate(usb_osa_sem_handle *handle, uint32_t count)
 
 usb_osa_status_t USB_OsaSemDestroy(usb_osa_sem_handle handle)
 {
-    if (handle)
-    {
+    if (handle) {
         vSemaphoreDelete(handle);
         return kStatus_USB_OSA_Success;
     }
@@ -283,26 +250,21 @@ usb_osa_status_t USB_OsaSemDestroy(usb_osa_sem_handle handle)
 
 usb_osa_status_t USB_OsaSemPost(usb_osa_sem_handle handle)
 {
-    xSemaphoreHandle sem = (xSemaphoreHandle)handle;
+    xSemaphoreHandle sem     = (xSemaphoreHandle)handle;
     portBASE_TYPE taskToWake = pdFALSE;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (__get_IPSR())
-    {
-        if (pdPASS == xSemaphoreGiveFromISR(sem, &taskToWake))
-        {
+    if (__get_IPSR()) {
+        if (pdPASS == xSemaphoreGiveFromISR(sem, &taskToWake)) {
             portYIELD_FROM_ISR(taskToWake);
             return kStatus_USB_OSA_Success;
         }
     }
-    else
-    {
-        if (pdTRUE == xSemaphoreGive(sem))
-        {
+    else {
+        if (pdTRUE == xSemaphoreGive(sem)) {
             return kStatus_USB_OSA_Success;
         }
     }
@@ -313,22 +275,18 @@ usb_osa_status_t USB_OsaSemWait(usb_osa_sem_handle handle, uint32_t timeout)
 {
     xSemaphoreHandle sem = (xSemaphoreHandle)handle;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (!timeout)
-    {
+    if (!timeout) {
         timeout = portMAX_DELAY;
     }
-    else
-    {
+    else {
         timeout = MSEC_TO_TICK(timeout);
     }
 
-    if (pdFALSE == xSemaphoreTake(sem, timeout))
-    {
+    if (pdFALSE == xSemaphoreTake(sem, timeout)) {
         return kStatus_USB_OSA_TimeOut;
     }
     return kStatus_USB_OSA_Success;
@@ -336,13 +294,11 @@ usb_osa_status_t USB_OsaSemWait(usb_osa_sem_handle handle, uint32_t timeout)
 
 usb_osa_status_t USB_OsaMutexCreate(usb_osa_mutex_handle *handle)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     *handle = (usb_osa_mutex_handle)xSemaphoreCreateRecursiveMutex();
-    if (NULL == *handle)
-    {
+    if (NULL == *handle) {
         return kStatus_USB_OSA_Error;
     }
     return kStatus_USB_OSA_Success;
@@ -350,8 +306,7 @@ usb_osa_status_t USB_OsaMutexCreate(usb_osa_mutex_handle *handle)
 
 usb_osa_status_t USB_OsaMutexDestroy(usb_osa_mutex_handle handle)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     vSemaphoreDelete((xSemaphoreHandle)handle);
@@ -362,13 +317,11 @@ usb_osa_status_t USB_OsaMutexLock(usb_osa_mutex_handle handle)
 {
     xSemaphoreHandle mutex = (xSemaphoreHandle)handle;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) == pdFALSE)
-    {
+    if (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) == pdFALSE) {
         return kStatus_USB_OSA_TimeOut;
     }
 
@@ -379,13 +332,11 @@ usb_osa_status_t USB_OsaMutexUnlock(usb_osa_mutex_handle handle)
 {
     xSemaphoreHandle mutex = (xSemaphoreHandle)handle;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (xSemaphoreGiveRecursive(mutex) == pdFALSE)
-    {
+    if (xSemaphoreGiveRecursive(mutex) == pdFALSE) {
         return kStatus_USB_OSA_Error;
     }
     return kStatus_USB_OSA_Success;
@@ -393,13 +344,11 @@ usb_osa_status_t USB_OsaMutexUnlock(usb_osa_mutex_handle handle)
 
 usb_osa_status_t USB_OsaMsgqCreate(usb_osa_msgq_handle *handle, uint32_t count, uint32_t size)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     *handle = xQueueCreate(count, size * sizeof(uint32_t));
-    if (NULL == *handle)
-    {
+    if (NULL == *handle) {
         return kStatus_USB_OSA_Error;
     }
 
@@ -408,8 +357,7 @@ usb_osa_status_t USB_OsaMsgqCreate(usb_osa_msgq_handle *handle, uint32_t count,
 
 usb_osa_status_t USB_OsaMsgqDestroy(usb_osa_msgq_handle handle)
 {
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
     vQueueDelete((xQueueHandle)handle);
@@ -418,26 +366,21 @@ usb_osa_status_t USB_OsaMsgqDestroy(usb_osa_msgq_handle handle)
 
 usb_osa_status_t USB_OsaMsgqSend(usb_osa_msgq_handle handle, void *msg)
 {
-    xQueueHandle msgq = (xQueueHandle)handle;
+    xQueueHandle msgq        = (xQueueHandle)handle;
     portBASE_TYPE taskToWake = pdFALSE;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (__get_IPSR())
-    {
-        if (pdPASS == xQueueSendToBackFromISR(msgq, msg, &taskToWake))
-        {
+    if (__get_IPSR()) {
+        if (pdPASS == xQueueSendToBackFromISR(msgq, msg, &taskToWake)) {
             portYIELD_FROM_ISR(taskToWake);
             return kStatus_USB_OSA_Success;
         }
     }
-    else
-    {
-        if (pdPASS == xQueueSendToBack(msgq, msg, 0U))
-        {
+    else {
+        if (pdPASS == xQueueSendToBack(msgq, msg, 0U)) {
             return kStatus_USB_OSA_Success;
         }
     }
@@ -448,21 +391,17 @@ usb_osa_status_t USB_OsaMsgqRecv(usb_osa_msgq_handle handle, void *msg, uint32_t
 {
     xQueueHandle msgq = (xQueueHandle)handle;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (!timeout)
-    {
+    if (!timeout) {
         timeout = portMAX_DELAY;
     }
-    else
-    {
+    else {
         timeout = MSEC_TO_TICK(timeout);
     }
-    if (pdPASS != xQueueReceive(msgq, msg, timeout))
-    {
+    if (pdPASS != xQueueReceive(msgq, msg, timeout)) {
         return kStatus_USB_OSA_TimeOut;
     }
     return kStatus_USB_OSA_Success;
@@ -472,15 +411,12 @@ usb_osa_status_t USB_OsaMsgqCheck(usb_osa_msgq_handle handle, void *msg)
 {
     xQueueHandle msgq = (xQueueHandle)handle;
 
-    if (!handle)
-    {
+    if (!handle) {
         return kStatus_USB_OSA_Error;
     }
 
-    if (uxQueueMessagesWaiting(msgq))
-    {
-        if (pdPASS == xQueueReceive(msgq, msg, 1U))
-        {
+    if (uxQueueMessagesWaiting(msgq)) {
+        if (pdPASS == xQueueReceive(msgq, msg, 1U)) {
             return kStatus_USB_OSA_Success;
         }
     }
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.h
index 5e276abad..ee8852497 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/osa_old/usb_osa_freertos.h
@@ -36,7 +36,7 @@
  * Workaround to disable MISRA C message suppress warnings for IAR compiler.
  * http://supp.iar.com/Support/?note=24725
  */
-#define MISRAC_DISABLE                                                                                                                                         \
+#define MISRAC_DISABLE                                                                                                 \
     _Pragma("diag_suppress=                       \
     Pm001,Pm002,Pm003,Pm004,Pm005,Pm006,Pm007,Pm008,Pm009,Pm010,Pm011,\
     Pm012,Pm013,Pm014,Pm015,Pm016,Pm017,Pm018,Pm019,Pm020,Pm021,Pm022,\
@@ -54,7 +54,7 @@
     Pm144,Pm145,Pm146,Pm147,Pm148,Pm149,Pm150,Pm151,Pm152,Pm153,Pm154,\
     Pm155")
 
-#define MISRAC_ENABLE                                                                                                                                          \
+#define MISRAC_ENABLE                                                                                                  \
     _Pragma("diag_default=                         \
     Pm001,Pm002,Pm003,Pm004,Pm005,Pm006,Pm007,Pm008,Pm009,Pm010,Pm011,\
     Pm012,Pm013,Pm014,Pm015,Pm016,Pm017,Pm018,Pm019,Pm020,Pm021,Pm022,\
@@ -87,9 +87,9 @@ MISRAC_ENABLE
  * Definitions
  ******************************************************************************/
 
-#define USB_OSA_SR_ALLOC() uint8_t usbOsaCurrentSr;
+#define USB_OSA_SR_ALLOC()       uint8_t usbOsaCurrentSr;
 #define USB_OSA_ENTER_CRITICAL() USB_OsaEnterCritical(&usbOsaCurrentSr)
-#define USB_OSA_EXIT_CRITICAL() USB_OsaExitCritical(usbOsaCurrentSr)
+#define USB_OSA_EXIT_CRITICAL()  USB_OsaExitCritical(usbOsaCurrentSr)
 
 /*******************************************************************************
  * API
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.c b/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.c
index 7f0556ea8..0e4cee4fc 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.c
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.c
@@ -16,40 +16,32 @@ void *USB_EhciPhyGetBase(uint8_t controllerId)
     void *usbPhyBase = NULL;
 #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U))
     uint32_t instance;
-    uint32_t newinstance = 0;
+    uint32_t newinstance        = 0;
     uint32_t usbphy_base_temp[] = USBPHY_BASE_ADDRS;
-    uint32_t usbphy_base[] = USBPHY_BASE_ADDRS;
+    uint32_t usbphy_base[]      = USBPHY_BASE_ADDRS;
 
-    if (controllerId < kUSB_ControllerEhci0)
-    {
+    if (controllerId < kUSB_ControllerEhci0) {
         return NULL;
     }
 
-    if ((controllerId == kUSB_ControllerEhci0) || (controllerId == kUSB_ControllerEhci1))
-    {
+    if ((controllerId == kUSB_ControllerEhci0) || (controllerId == kUSB_ControllerEhci1)) {
         controllerId = controllerId - kUSB_ControllerEhci0;
     }
-    else if ((controllerId == kUSB_ControllerLpcIp3511Hs0) || (controllerId == kUSB_ControllerLpcIp3511Hs1))
-    {
+    else if ((controllerId == kUSB_ControllerLpcIp3511Hs0) || (controllerId == kUSB_ControllerLpcIp3511Hs1)) {
         controllerId = controllerId - kUSB_ControllerLpcIp3511Hs0;
     }
-    else if ((controllerId == kUSB_ControllerIp3516Hs0) || (controllerId == kUSB_ControllerIp3516Hs1))
-    {
+    else if ((controllerId == kUSB_ControllerIp3516Hs0) || (controllerId == kUSB_ControllerIp3516Hs1)) {
         controllerId = controllerId - kUSB_ControllerIp3516Hs0;
     }
-    else
-    {
+    else {
     }
 
-    for (instance = 0; instance < (sizeof(usbphy_base_temp) / sizeof(usbphy_base_temp[0])); instance++)
-    {
-        if (usbphy_base_temp[instance])
-        {
+    for (instance = 0; instance < (sizeof(usbphy_base_temp) / sizeof(usbphy_base_temp[0])); instance++) {
+        if (usbphy_base_temp[instance]) {
             usbphy_base[newinstance++] = usbphy_base_temp[instance];
         }
     }
-    if (controllerId > newinstance)
-    {
+    if (controllerId > newinstance) {
         return NULL;
     }
 
@@ -76,20 +68,22 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str
     USBPHY_Type *usbPhyBase;
 
     usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId);
-    if (NULL == usbPhyBase)
-    {
+    if (NULL == usbPhyBase) {
         return kStatus_USB_Error;
     }
 
 #if ((defined FSL_FEATURE_SOC_ANATOP_COUNT) && (FSL_FEATURE_SOC_ANATOP_COUNT > 0U))
     ANATOP->HW_ANADIG_REG_3P0.RW =
-        (ANATOP->HW_ANADIG_REG_3P0.RW & (~(ANATOP_HW_ANADIG_REG_3P0_OUTPUT_TRG(0x1F) | ANATOP_HW_ANADIG_REG_3P0_ENABLE_ILIMIT_MASK))) |
+        (ANATOP->HW_ANADIG_REG_3P0.RW &
+         (~(ANATOP_HW_ANADIG_REG_3P0_OUTPUT_TRG(0x1F) | ANATOP_HW_ANADIG_REG_3P0_ENABLE_ILIMIT_MASK))) |
         ANATOP_HW_ANADIG_REG_3P0_OUTPUT_TRG(0x17) | ANATOP_HW_ANADIG_REG_3P0_ENABLE_LINREG_MASK;
-    ANATOP->HW_ANADIG_USB2_CHRG_DETECT.SET = ANATOP_HW_ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B_MASK | ANATOP_HW_ANADIG_USB2_CHRG_DETECT_EN_B_MASK;
+    ANATOP->HW_ANADIG_USB2_CHRG_DETECT.SET =
+        ANATOP_HW_ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B_MASK | ANATOP_HW_ANADIG_USB2_CHRG_DETECT_EN_B_MASK;
 #endif
 
 #if (defined USB_ANALOG)
-    USB_ANALOG->INSTANCE[controllerId - kUSB_ControllerEhci0].CHRG_DETECT_SET = USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(1) | USB_ANALOG_CHRG_DETECT_EN_B(1);
+    USB_ANALOG->INSTANCE[controllerId - kUSB_ControllerEhci0].CHRG_DETECT_SET =
+        USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(1) | USB_ANALOG_CHRG_DETECT_EN_B(1);
 #endif
 
 #if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT)))
@@ -100,17 +94,17 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str
     usbPhyBase->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; /* support external FS Hub with LS device connected. */
     /* PWD register provides overall control of the PHY power state */
     usbPhyBase->PWD = 0U;
-    if ((kUSB_ControllerIp3516Hs0 == controllerId) || (kUSB_ControllerIp3516Hs1 == controllerId) || (kUSB_ControllerLpcIp3511Hs0 == controllerId) ||
-        (kUSB_ControllerLpcIp3511Hs0 == controllerId))
-    {
+    if ((kUSB_ControllerIp3516Hs0 == controllerId) || (kUSB_ControllerIp3516Hs1 == controllerId) ||
+        (kUSB_ControllerLpcIp3511Hs0 == controllerId) || (kUSB_ControllerLpcIp3511Hs0 == controllerId)) {
         usbPhyBase->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK;
         usbPhyBase->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK;
     }
-    if (NULL != phyConfig)
-    {
+    if (NULL != phyConfig) {
         /* Decode to trim the nominal 17.78mA current source for the High Speed TX drivers on USB_DP and USB_DM. */
-        usbPhyBase->TX = ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
-                          (USBPHY_TX_D_CAL(phyConfig->D_CAL) | USBPHY_TX_TXCAL45DP(phyConfig->TXCAL45DP) | USBPHY_TX_TXCAL45DM(phyConfig->TXCAL45DM)));
+        usbPhyBase->TX =
+            ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
+             (USBPHY_TX_D_CAL(phyConfig->D_CAL) | USBPHY_TX_TXCAL45DP(phyConfig->TXCAL45DP) |
+              USBPHY_TX_TXCAL45DM(phyConfig->TXCAL45DM)));
     }
 #endif
 
@@ -135,8 +129,7 @@ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_co
     USBPHY_Type *usbPhyBase;
 
     usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId);
-    if (NULL == usbPhyBase)
-    {
+    if (NULL == usbPhyBase) {
         return kStatus_USB_Error;
     }
 
@@ -167,8 +160,10 @@ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_co
     while (!(usbPhyBase->ANACTRL & USBPHY_ANACTRL_PFD_STABLE_MASK)) {}
 #endif
     /* Decode to trim the nominal 17.78mA current source for the High Speed TX drivers on USB_DP and USB_DM. */
-    usbPhyBase->TX = ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
-                      (USBPHY_TX_D_CAL(phyConfig->D_CAL) | USBPHY_TX_TXCAL45DP(phyConfig->TXCAL45DP) | USBPHY_TX_TXCAL45DM(phyConfig->TXCAL45DM)));
+    usbPhyBase->TX =
+        ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
+         (USBPHY_TX_D_CAL(phyConfig->D_CAL) | USBPHY_TX_TXCAL45DP(phyConfig->TXCAL45DP) |
+          USBPHY_TX_TXCAL45DM(phyConfig->TXCAL45DM)));
 #endif
 
     return kStatus_USB_Success;
@@ -187,8 +182,7 @@ void USB_EhciPhyDeinit(uint8_t controllerId)
     USBPHY_Type *usbPhyBase;
 
     usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId);
-    if (NULL == usbPhyBase)
-    {
+    if (NULL == usbPhyBase) {
         return;
     }
 #if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT)))
@@ -215,17 +209,14 @@ void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable)
     USBPHY_Type *usbPhyBase;
 
     usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId);
-    if (NULL == usbPhyBase)
-    {
+    if (NULL == usbPhyBase) {
         return;
     }
 
-    if (enable)
-    {
+    if (enable) {
         usbPhyBase->CTRL |= USBPHY_CTRL_ENHOSTDISCONDETECT_MASK;
     }
-    else
-    {
+    else {
         usbPhyBase->CTRL &= (~USBPHY_CTRL_ENHOSTDISCONDETECT_MASK);
     }
 #endif
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.h b/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.h
index 97bf11cd6..bd7b89dd5 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.h
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/driver/phy/usb_phy.h
@@ -57,7 +57,8 @@ extern "C"
      *
      * @param[in] controllerId   ehci controller id, please reference to #usb_controller_index_t.
      * @param[in] freq            the external input clock.
-     *                            for example: if the external input clock is 16M, the parameter freq should be 16000000.
+     *                            for example: if the external input clock is 16M, the parameter freq should be
+     * 16000000.
      *
      * @retval kStatus_USB_Success      cancel successfully.
      * @retval kStatus_USB_Error        the freq value is incorrect.
diff --git a/module-bsp/board/rt1051/bsp/usb_cdc/usb_cdc.cpp b/module-bsp/board/rt1051/bsp/usb_cdc/usb_cdc.cpp
index ea6c2b49a..2843937a0 100644
--- a/module-bsp/board/rt1051/bsp/usb_cdc/usb_cdc.cpp
+++ b/module-bsp/board/rt1051/bsp/usb_cdc/usb_cdc.cpp
@@ -15,15 +15,12 @@ namespace bsp
         uint8_t inputData[SERIAL_BUFFER_LEN];
         static std::string receive_msg;
 
-        while (1)
-        {
-            if (uxQueueSpacesAvailable(USBReceiveQueue) != 0)
-            {
+        while (1) {
+            if (uxQueueSpacesAvailable(USBReceiveQueue) != 0) {
 
                 ssize_t length = USB_CDCGetReceived(inputData);
 
-                if (length > 0)
-                {
+                if (length > 0) {
                     static std::string receive_msg;
                     receive_msg = std::string(inputData, inputData + length);
                     LOG_DEBUG("[ServiceDesktop:BSP_Driver] Received: %d signs", length);
@@ -31,13 +28,11 @@ namespace bsp
 
                     USB_CDCSend(NULL, 0);
                 }
-                else if (length == -1)
-                {
+                else if (length == -1) {
                     LOG_ERROR("[ServiceDesktop:BSP_Driver] Error receiving usb data");
                 }
             }
-            else
-            {
+            else {
                 LOG_DEBUG("[ServiceDesktop:BSP_Driver] USB receive Queue is full, yielding task");
                 vTaskDelay(1000);
             }
@@ -50,13 +45,11 @@ namespace bsp
         usb_status_t t = USB_CDCSend((uint8_t *)(*send_msg).c_str(), (*send_msg).length());
         delete send_msg;
 
-        if (t == 0x00)
-        {
+        if (t == 0x00) {
             LOG_DEBUG("[ServiceDesktop:BSP_Driver] Send: %d signs", (*send_msg).length());
             return 0;
         }
-        else
-        {
+        else {
             LOG_ERROR("[ServiceDesktop:BSP_Driver] USB_CDCSend failed with code: %d", t);
             return -1;
         }
@@ -69,10 +62,10 @@ namespace bsp
         xTaskHandle taskHandleReceive;
         USBReceiveQueue = receiveQueue;
 
-        BaseType_t task_error = xTaskCreate(usbCDCReceive, "USBRT1051Receive", SERIAL_BUFFER_LEN * 8, (void *)1, tskIDLE_PRIORITY, &taskHandleReceive);
+        BaseType_t task_error = xTaskCreate(
+            usbCDCReceive, "USBRT1051Receive", SERIAL_BUFFER_LEN * 8, (void *)1, tskIDLE_PRIORITY, &taskHandleReceive);
 
-        if (task_error != pdPASS)
-        {
+        if (task_error != pdPASS) {
             LOG_ERROR("[ServiceDesktop:BSP_Driver] Failed to start freertos USB_RT1051_Receive");
         }
 
diff --git a/module-bsp/board/rt1051/common/board.cpp b/module-bsp/board/rt1051/common/board.cpp
index d73fb0251..ded02f8ca 100644
--- a/module-bsp/board/rt1051/common/board.cpp
+++ b/module-bsp/board/rt1051/common/board.cpp
@@ -20,16 +20,16 @@
 #include "fsl_lpuart.h"
 #endif
 
-namespace bsp {
+namespace bsp
+{
 
 #if LOG_REDIRECT_TO_SERIAL == 1
     static lpuart_handle_t g_lpuartHandle;
 #endif
 
-
-/* Get debug console frequency. */
-    __attribute__((unused))
-    static uint32_t BOARD_DebugConsoleSrcFreq(void) {
+    /* Get debug console frequency. */
+    __attribute__((unused)) static uint32_t BOARD_DebugConsoleSrcFreq(void)
+    {
         uint32_t freq;
 
         /* To make it simple, we assume default PLL and divider settings, and the only variable
@@ -37,17 +37,17 @@ namespace bsp {
         if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
         {
             freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
-        } else {
+        }
+        else {
             freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
         }
 
         return freq;
     }
 
-
-
-/* Initialize debug console. */
-    static void BOARD_InitDebugConsole(void) {
+    /* Initialize debug console. */
+    static void BOARD_InitDebugConsole(void)
+    {
 #if LOG_REDIRECT_TO_SERIAL == 1
         /* The user initialization should be placed here */
         lpuart_config_t lpuartConfig;
@@ -64,8 +64,8 @@ namespace bsp {
          */
         LPUART_GetDefaultConfig(&lpuartConfig);
         lpuartConfig.baudRate_Bps = 115200;
-        lpuartConfig.enableTx = true;
-        lpuartConfig.enableRx = true;
+        lpuartConfig.enableTx     = true;
+        lpuartConfig.enableRx     = true;
 
         LPUART_TransferCreateHandle(LPUART3, &g_lpuartHandle, NULL, NULL);
 
@@ -75,9 +75,9 @@ namespace bsp {
 #endif
     }
 
-
-/* MPU configuration. */
-    static void BOARD_ConfigMPU(void) {
+    /* MPU configuration. */
+    static void BOARD_ConfigMPU(void)
+    {
         /* Disable I cache and D cache */
         if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) {
             SCB_DisableICache();
@@ -90,28 +90,29 @@ namespace bsp {
         ARM_MPU_Disable();
 
         /* MPU configure:
-         * Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size)
-         * API in core_cm7.h.
-         * param DisableExec       Instruction access (XN) disable bit,0=instruction fetches enabled, 1=instruction fetches disabled.
-         * param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-         *      Use MACROS defined in core_cm7.h: ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
+         * Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable,
+         * SubRegionDisable, Size) API in core_cm7.h. param DisableExec       Instruction access (XN) disable
+         * bit,0=instruction fetches enabled, 1=instruction fetches disabled. param AccessPermission  Data access
+         * permissions, allows you to configure read/write access for User and Privileged mode. Use MACROS defined in
+         * core_cm7.h: ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
          * Combine TypeExtField/IsShareable/IsCacheable/IsBufferable to configure MPU memory access attributes.
          *  TypeExtField  IsShareable  IsCacheable  IsBufferable   Memory Attribtue    Shareability        Cache
          *     0             x           0           0             Strongly Ordered    shareable
          *     0             x           0           1              Device             shareable
-         *     0             0           1           0              Normal             not shareable   Outer and inner write through no write allocate
-         *     0             0           1           1              Normal             not shareable   Outer and inner write back no write allocate
-         *     0             1           1           0              Normal             shareable       Outer and inner write through no write allocate
-         *     0             1           1           1              Normal             shareable       Outer and inner write back no write allocate
-         *     1             0           0           0              Normal             not shareable   outer and inner noncache
-         *     1             1           0           0              Normal             shareable       outer and inner noncache
-         *     1             0           1           1              Normal             not shareable   outer and inner write back write/read acllocate
-         *     1             1           1           1              Normal             shareable       outer and inner write back write/read acllocate
-         *     2             x           0           0              Device              not shareable
-         *  Above are normal use settings, if your want to see more details or want to config different inner/outter cache policy.
-         *  please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide <dui0646b_cortex_m7_dgug.pdf>
-         * param SubRegionDisable  Sub-region disable field. 0=sub-region is enabled, 1=sub-region is disabled.
-         * param Size              Region size of the region to be configured. use ARM_MPU_REGION_SIZE_xxx MACRO in core_cm7.h.
+         *     0             0           1           0              Normal             not shareable   Outer and inner
+         * write through no write allocate 0             0           1           1              Normal             not
+         * shareable   Outer and inner write back no write allocate 0             1           1           0 Normal
+         * shareable       Outer and inner write through no write allocate 0             1           1           1
+         * Normal             shareable       Outer and inner write back no write allocate 1             0           0
+         * 0              Normal             not shareable   outer and inner noncache 1             1           0 0
+         * Normal             shareable       outer and inner noncache 1             0           1           1 Normal
+         * not shareable   outer and inner write back write/read acllocate 1             1           1           1
+         * Normal             shareable       outer and inner write back write/read acllocate 2             x 0 0 Device
+         * not shareable Above are normal use settings, if your want to see more details or want to config different
+         * inner/outter cache policy. please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide
+         * <dui0646b_cortex_m7_dgug.pdf> param SubRegionDisable  Sub-region disable field. 0=sub-region is enabled,
+         * 1=sub-region is disabled. param Size              Region size of the region to be configured. use
+         * ARM_MPU_REGION_SIZE_xxx MACRO in core_cm7.h.
          */
 
         /* Region 0 setting: Memory with Device type, not shareable, non-cacheable. */
@@ -129,8 +130,8 @@ namespace bsp {
         MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_512MB);
 #else
         /* Setting Memory with Device type, not shareable, non-cacheable. */
-        //TODO: MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
-        //TODO: MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
+        // TODO: MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
+        // TODO: MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
 #endif
 
         /* Region 3 setting: Memory with Device type, not shareable, non-cacheable. */
@@ -151,14 +152,12 @@ namespace bsp {
         MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
         MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_64KB);
 
-
         /* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back
          * BOARD_SDRAM_TEXT
          */
         MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
         MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_16MB);
 
-
         /* The define sets the cacheable memory to shareable,
          * this suggestion is referred from chapter 2.2.1 Memory regions,
          * types and attributes in Cortex-M7 Devices, Generic User Guide */
@@ -174,7 +173,6 @@ namespace bsp {
         MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_16MB);
 #endif
 
-
         /* Enable MPU */
         ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
 
@@ -183,7 +181,8 @@ namespace bsp {
         SCB_EnableICache();
     }
 
-    void BoardInit(){
+    void BoardInit()
+    {
 
         PINMUX_InitBootPins();
 
@@ -200,5 +199,4 @@ namespace bsp {
         PrintSystemClocks();
     }
 
-
-}
+} // namespace bsp
diff --git a/module-bsp/board/rt1051/common/board.h b/module-bsp/board/rt1051/common/board.h
index d68a7d323..f49dde766 100644
--- a/module-bsp/board/rt1051/common/board.h
+++ b/module-bsp/board/rt1051/common/board.h
@@ -43,81 +43,92 @@
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
-#define BOARD_SD_POWER_RESET_GPIO (GPIO1)
+#define BOARD_SD_POWER_RESET_GPIO     (GPIO1)
 #define BOARD_SD_POWER_RESET_GPIO_PIN (5U)
 
 #define BOARD_USDHC_CARD_INSERT_CD_LEVEL (0U)
 
 #define BOARD_USDHC_MMCCARD_POWER_CONTROL(state)
 
-#define BOARD_USDHC_MMCCARD_POWER_CONTROL_INIT()                                                                                                               \
-    {                                                                                                                                                          \
-        gpio_pin_config_t sw_config = {                                                                                                                        \
-            kGPIO_DigitalOutput,                                                                                                                               \
-            0,                                                                                                                                                 \
-            kGPIO_NoIntmode,                                                                                                                                   \
-        };                                                                                                                                                     \
-        GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config);                                                                    \
-        GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, true);                                                                         \
+#define BOARD_USDHC_MMCCARD_POWER_CONTROL_INIT()                                                                       \
+    {                                                                                                                  \
+        gpio_pin_config_t sw_config = {                                                                                \
+            kGPIO_DigitalOutput,                                                                                       \
+            0,                                                                                                         \
+            kGPIO_NoIntmode,                                                                                           \
+        };                                                                                                             \
+        GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config);                            \
+        GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, true);                                 \
     }
 
-#define BOARD_USDHC_SDCARD_POWER_CONTROL_INIT()                                                                                                                \
-    {                                                                                                                                                          \
-        gpio_pin_config_t sw_config = {                                                                                                                        \
-            kGPIO_DigitalOutput,                                                                                                                               \
-            0,                                                                                                                                                 \
-            kGPIO_NoIntmode,                                                                                                                                   \
-        };                                                                                                                                                     \
-        GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config);                                                                    \
+#define BOARD_USDHC_SDCARD_POWER_CONTROL_INIT()                                                                        \
+    {                                                                                                                  \
+        gpio_pin_config_t sw_config = {                                                                                \
+            kGPIO_DigitalOutput,                                                                                       \
+            0,                                                                                                         \
+            kGPIO_NoIntmode,                                                                                           \
+        };                                                                                                             \
+        GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config);                            \
     }
 
-#define BOARD_USDHC_SDCARD_POWER_CONTROL(state) (GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, state))
+#define BOARD_USDHC_SDCARD_POWER_CONTROL(state)                                                                        \
+    (GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, state))
 
-#define BOARD_MMC_PIN_CONFIG(speed, strength)                                                                                                                  \
-    {                                                                                                                                                          \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_USDHC2_CMD, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                             \
-                                                                 IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                             \
-                                                                 IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                               \
-                                                                 IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                         \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_04_USDHC2_CLK, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                             \
-                                                                 IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |                               \
-                                                                 IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                         \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
-        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7, IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                           \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                             \
-                                                                   IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                       \
+#define BOARD_MMC_PIN_CONFIG(speed, strength)                                                                          \
+    {                                                                                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_USDHC2_CMD,                                                           \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_04_USDHC2_CLK,                                                           \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
+        IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7,                                                         \
+                            IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |                      \
+                                IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |                        \
+                                IOMUXC_SW_PAD_CTL_PAD_DSE(strength));                                                  \
     }
 
 /* USB PHY condfiguration */
-#define BOARD_USB_PHY_D_CAL (0x0CU)
+#define BOARD_USB_PHY_D_CAL     (0x0CU)
 #define BOARD_USB_PHY_TXCAL45DP (0x06U)
 #define BOARD_USB_PHY_TXCAL45DM (0x06U)
 
@@ -125,83 +136,83 @@
  * BOARD EINK DEFINITIONS
  */
 
-#define BOARD_EINK_LPSPI_BASE LPSPI1
-#define BOARD_EINK_CS_GPIO_PIN (13U)
-#define BOARD_EINK_CS_GPIO GPIO3
-#define BOARD_EINK_BUSY_GPIO_PIN (17U)
-#define BOARD_EINK_BUSY_GPIO GPIO3
-#define BOARD_EINK_RESET_GPIO_PIN (16U)
-#define BOARD_EINK_RESET_GPIO GPIO3
-#define BOARD_EINK_BUSY_IRQ GPIO3_Combined_16_31_IRQn
+#define BOARD_EINK_LPSPI_BASE       LPSPI1
+#define BOARD_EINK_CS_GPIO_PIN      (13U)
+#define BOARD_EINK_CS_GPIO          GPIO3
+#define BOARD_EINK_BUSY_GPIO_PIN    (17U)
+#define BOARD_EINK_BUSY_GPIO        GPIO3
+#define BOARD_EINK_RESET_GPIO_PIN   (16U)
+#define BOARD_EINK_RESET_GPIO       GPIO3
+#define BOARD_EINK_BUSY_IRQ         GPIO3_Combined_16_31_IRQn
 #define BOARD_EINK_BUSY_IRQ_HANDLER GPIO3_Combined_16_31_IRQHandler
 
 #define BOARD_EINK_DISPLAY_RES_X 480
 #define BOARD_EINK_DISPLAY_RES_Y 600
 
-#define CELLULAR_UART_BASE LPUART1          ///< This macro indicate port to which GSM module is connected
+#define CELLULAR_UART_BASE   LPUART1        ///< This macro indicate port to which GSM module is connected
 #define CELLULAR_UART_CLKSRC kCLOCK_PllUsb1 ///< This macro indicate LPUART clock source
 
 #define BSP_CELLULAR_UART_TX_PORT GPIO1
-#define BSP_CELLULAR_UART_TX_PIN 12
-#define BSP_CELLULAR_UART_TX_PAD GPIO_AD_B0_12
+#define BSP_CELLULAR_UART_TX_PIN  12
+#define BSP_CELLULAR_UART_TX_PAD  GPIO_AD_B0_12
 
 #define BSP_CELLULAR_UART_RX_PORT GPIO1
-#define BSP_CELLULAR_UART_RX_PIN 13
-#define BSP_CELLULAR_UART_RX_PAD GPIO_AD_B0_13
+#define BSP_CELLULAR_UART_RX_PIN  13
+#define BSP_CELLULAR_UART_RX_PAD  GPIO_AD_B0_13
 
 #define BSP_CELLULAR_UART_CTS_PORT GPIO1
-#define BSP_CELLULAR_UART_CTS_PIN 14
-#define BSP_CELLULAR_UART_CTS_PAD GPIO_AD_B0_14
+#define BSP_CELLULAR_UART_CTS_PIN  14
+#define BSP_CELLULAR_UART_CTS_PAD  GPIO_AD_B0_14
 
 #define BSP_CELLULAR_UART_RTS_PORT GPIO1
-#define BSP_CELLULAR_UART_RTS_PIN 15
-#define BSP_CELLULAR_UART_RTS_PAD GPIO_AD_B0_15
+#define BSP_CELLULAR_UART_RTS_PIN  15
+#define BSP_CELLULAR_UART_RTS_PAD  GPIO_AD_B0_15
 
 #define BSP_CELLULAR_UART_DTR_PORT GPIO3
-#define BSP_CELLULAR_UART_DTR_PIN 27
-#define BSP_CELLULAR_UART_DTR_PAD GPIO_EMC_41
+#define BSP_CELLULAR_UART_DTR_PIN  27
+#define BSP_CELLULAR_UART_DTR_PAD  GPIO_EMC_41
 
 #define BSP_CELLULAR_POWER_PORT GPIO2
-#define BSP_CELLULAR_POWER_PIN 18
-#define BSP_CELLULAR_POWER_PAD GPIO_B1_02
+#define BSP_CELLULAR_POWER_PIN  18
+#define BSP_CELLULAR_POWER_PAD  GPIO_B1_02
 
 #define BSP_CELLULAR_RESET_PORT GPIO2
-#define BSP_CELLULAR_RESET_PIN 17
-#define BSP_CELLULAR_RESET_PAD GPIO_B1_01
+#define BSP_CELLULAR_RESET_PIN  17
+#define BSP_CELLULAR_RESET_PAD  GPIO_B1_01
 
 #define BSP_CELLULAR_RI_PORT GPIO2
-#define BSP_CELLULAR_RI_PIN 21
-#define BSP_CELLULAR_RI_PAD GPIO_B1_05
+#define BSP_CELLULAR_RI_PIN  21
+#define BSP_CELLULAR_RI_PAD  GPIO_B1_05
 
 #define BSP_CELLULAR_AP_RDY_PORT GPIO2
-#define BSP_CELLULAR_AP_RDY_PIN 16
-#define BSP_CELLULAR_AP_RDY_PAD GPIO_B1_00
+#define BSP_CELLULAR_AP_RDY_PIN  16
+#define BSP_CELLULAR_AP_RDY_PAD  GPIO_B1_00
 
 #define BSP_CELLULAR_WAKEUP_PORT GPIO2
-#define BSP_CELLULAR_WAKEUP_PIN 19
-#define BSP_CELLULAR_WAKEUP_PAD GPIO_B1_03
+#define BSP_CELLULAR_WAKEUP_PIN  19
+#define BSP_CELLULAR_WAKEUP_PAD  GPIO_B1_03
 
 #define BSP_CELLULAR_SIM_CARD_1_INSERTED_PORT GPIO2
-#define BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN 11
-#define BSP_CELLULAR_SIM_CARD_1_INSERTED_PAD GPIO_B0_11
+#define BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN  11
+#define BSP_CELLULAR_SIM_CARD_1_INSERTED_PAD  GPIO_B0_11
 
 #define BSP_CELLULAR_SIM_CARD_2_INSERTED_PORT GPIO2
-#define BSP_CELLULAR_SIM_CARD_2_INSERTED_PIN 10
-#define BSP_CELLULAR_SIM_CARD_2_INSERTED_PAD GPIO_B0_10
+#define BSP_CELLULAR_SIM_CARD_2_INSERTED_PIN  10
+#define BSP_CELLULAR_SIM_CARD_2_INSERTED_PAD  GPIO_B0_10
 
 #define BSP_CELLULAR_SIM_CARD_PRESENCE_PORT GPIO2
-#define BSP_CELLULAR_SIM_CARD_PRESENCE_PIN 9
-#define BSP_CELLULAR_SIM_CARD_PRESENCE_PAD GPIO_B0_09
+#define BSP_CELLULAR_SIM_CARD_PRESENCE_PIN  9
+#define BSP_CELLULAR_SIM_CARD_PRESENCE_PAD  GPIO_B0_09
 
 #define BSP_CELLULAR_SIM_CARD_SELECTION_PORT GPIO2
-#define BSP_CELLULAR_SIM_CARD_SELECTION_PIN 20
-#define BSP_CELLULAR_SIM_CARD_SELECTION_PAD GPIO_B1_04
+#define BSP_CELLULAR_SIM_CARD_SELECTION_PIN  20
+#define BSP_CELLULAR_SIM_CARD_SELECTION_PAD  GPIO_B1_04
 
 /* SAI */
-#define BOARD_CELLULAR_AUDIO_SAIx SAI1
-#define BOARD_CELLULAR_AUDIO_SAIx_MUX kCLOCK_Sai1Mux
-#define BOARD_CELLULAR_AUDIO_SAIx_PREDIV kCLOCK_Sai1PreDiv
-#define BOARD_CELLULAR_AUDIO_SAIx_DIV kCLOCK_Sai1Div
+#define BOARD_CELLULAR_AUDIO_SAIx           SAI1
+#define BOARD_CELLULAR_AUDIO_SAIx_MUX       kCLOCK_Sai1Mux
+#define BOARD_CELLULAR_AUDIO_SAIx_PREDIV    kCLOCK_Sai1PreDiv
+#define BOARD_CELLULAR_AUDIO_SAIx_DIV       kCLOCK_Sai1Div
 #define BOARD_CELLULAR_AUDIO_SAIx_MCLK_MASK IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK
 
 /* IRQ */
@@ -209,53 +220,53 @@
 #define BOARD_CELLULAR_AUDIO_SAIx_RX_IRQ SAI1_IRQn
 
 #define BSP_CELLULAR_SIMSEL_PORT GPIO2
-#define BSP_CELLULAR_SIMSEL_PIN 20
-#define BSP_CELLULAR_SIMSEL_PAD GPIO_B1_04
+#define BSP_CELLULAR_SIMSEL_PIN  20
+#define BSP_CELLULAR_SIMSEL_PAD  GPIO_B1_04
 
 /**
  * Definitions for BSP_BLUETOOTH pins configuration
  */
 
-#define BSP_BLUETOOTH_UART_BASE LPUART2          ///< This macro indicate port to which GSM module is connected
+#define BSP_BLUETOOTH_UART_BASE   LPUART2        ///< This macro indicate port to which GSM module is connected
 #define BSP_BLUETOOTH_UART_CLKSRC kCLOCK_PllUsb1 ///< This macro indicate LPUART clock source
 
 #define BSP_BLUETOOTH_UART_RTS_PORT GPIO1
-#define BSP_BLUETOOTH_UART_RTS_PIN 17
-#define BSP_BLUETOOTH_UART_RTS_PAD GPIO_AD_B1_01
+#define BSP_BLUETOOTH_UART_RTS_PIN  17
+#define BSP_BLUETOOTH_UART_RTS_PAD  GPIO_AD_B1_01
 
 #define BSP_BLUETOOTH_UART_CTS_PORT GPIO1
-#define BSP_BLUETOOTH_UART_CTS_PIN 16
-#define BSP_BLUETOOTH_UART_CTS_PAD GPIO_AD_B1_00
+#define BSP_BLUETOOTH_UART_CTS_PIN  16
+#define BSP_BLUETOOTH_UART_CTS_PAD  GPIO_AD_B1_00
 
-#define BSP_BLUETOOTH_OSC_EN_PIN 0
+#define BSP_BLUETOOTH_OSC_EN_PIN  0
 #define BSP_BLUETOOTH_OSC_EN_PORT GPIO2
-#define BSP_BLUETOOTH_OSC_EN_PAD GPIO_B0_00
+#define BSP_BLUETOOTH_OSC_EN_PAD  GPIO_B0_00
 
-#define BSP_BLUETOOTH_SHUTDOWN_PIN 1
+#define BSP_BLUETOOTH_SHUTDOWN_PIN  1
 #define BSP_BLUETOOTH_SHUTDOWN_PORT GPIO2
-#define BSP_BLUETOOTH_SHUTDOWN_PAD GPIO_B0_01
+#define BSP_BLUETOOTH_SHUTDOWN_PAD  GPIO_B0_01
 
 /**
  * BOARD KEYBOARD DEFINITIONS
  */
 
 #define BOARD_KEYBOARD_RESET_GPIO_PIN (29U)
-#define BOARD_KEYBOARD_RESET_GPIO GPIO2
-#define BOARD_KEYBOARD_IRQ_GPIO_PIN (28U)
-#define BOARD_KEYBOARD_IRQ_GPIO GPIO2
+#define BOARD_KEYBOARD_RESET_GPIO     GPIO2
+#define BOARD_KEYBOARD_IRQ_GPIO_PIN   (28U)
+#define BOARD_KEYBOARD_IRQ_GPIO       GPIO2
 
 #define BOARD_KEYBOARD_RF_BUTTON_PORT GPIO2
-#define BOARD_KEYBOARD_RF_BUTTON_PIN 6
-#define BOARD_KEYBOARD_RF_BUTTON_PAD GPIO_B0_06
+#define BOARD_KEYBOARD_RF_BUTTON_PIN  6
+#define BOARD_KEYBOARD_RF_BUTTON_PAD  GPIO_B0_06
 /**
  * BOARD AUDIOCODEC DEFINITIONS
  */
 
 /* SAI */
-#define BOARD_AUDIOCODEC_SAIx SAI2
-#define BOARD_AUDIOCODEC_SAIx_MUX kCLOCK_Sai2Mux
-#define BOARD_AUDIOCODEC_SAIx_PREDIV kCLOCK_Sai2PreDiv
-#define BOARD_AUDIOCODEC_SAIx_DIV kCLOCK_Sai2Div
+#define BOARD_AUDIOCODEC_SAIx           SAI2
+#define BOARD_AUDIOCODEC_SAIx_MUX       kCLOCK_Sai2Mux
+#define BOARD_AUDIOCODEC_SAIx_PREDIV    kCLOCK_Sai2PreDiv
+#define BOARD_AUDIOCODEC_SAIx_DIV       kCLOCK_Sai2Div
 #define BOARD_AUDIOCODEC_SAIx_MCLK_MASK IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK
 
 /* IRQ */
@@ -265,22 +276,22 @@
 /**
  * BOARD USB TYPE-C CONTROLLER DEFINITIONS
  */
-#define BOARD_USBC_GPIO GPIO2
-#define BOARD_USBC_NEN_PIN (22U)
+#define BOARD_USBC_GPIO     GPIO2
+#define BOARD_USBC_NEN_PIN  (22U)
 #define BOARD_USBC_NINT_PIN (25U) // GPIO_B1_09, GPIO2.IO[25]
-#define BOARD_USBC_ID_PIN (26U)
+#define BOARD_USBC_ID_PIN   (26U)
 #define BOARD_USBC_PORT_PIN (23U)
 
 /**
  * BOARD LED DRIVER DEFINITIONS
  */
-#define BOARD_LEDDRIVER_GPIO GPIO1
+#define BOARD_LEDDRIVER_GPIO     GPIO1
 #define BOARD_LEDDRIVER_NRST_PIN (3U)
 
 /**
  * BOARD JACK DETECTION DEFINITIONS
  */
-#define BOARD_JACKDET_IRQ_GPIO GPIO2
+#define BOARD_JACKDET_IRQ_GPIO     GPIO2
 #define BOARD_JACKDET_IRQ_GPIO_PIN (30U)
 
 #define DMA_MAX_SINGLE_TRANSACTION_PAYLOAD 32767
@@ -290,29 +301,29 @@
  * @note VALID ONLY FOR T1
  */
 #define BOARD_BATTERY_CHARGER_INOKB_GPIO GPIO2
-#define BOARD_BATTERY_CHARGER_INOKB_PIN 12
-#define BOARD_BATTERY_CHARGER_INOKB_PAD GPIO_B0_12
+#define BOARD_BATTERY_CHARGER_INOKB_PIN  12
+#define BOARD_BATTERY_CHARGER_INOKB_PAD  GPIO_B0_12
 
 #define BOARD_BATTERY_CHARGER_WCINOKB_GPIO GPIO2
-#define BOARD_BATTERY_CHARGER_WCINOKB_PIN 13
-#define BOARD_BATTERY_CHARGER_WCINOKB_PAD GPIO_B0_13
+#define BOARD_BATTERY_CHARGER_WCINOKB_PIN  13
+#define BOARD_BATTERY_CHARGER_WCINOKB_PAD  GPIO_B0_13
 
 #define BOARD_BATTERY_CHARGER_INTB_GPIO GPIO2
-#define BOARD_BATTERY_CHARGER_INTB_PIN 14
-#define BOARD_BATTERY_CHARGER_INTB_PAD GPIO_B0_14
+#define BOARD_BATTERY_CHARGER_INTB_PIN  14
+#define BOARD_BATTERY_CHARGER_INTB_PAD  GPIO_B0_14
 
 /**
  * BOARD AMBIENT LIGHT SENSOR
  */
-#define BOARD_ALS_ADC_BASE ADC1        // gpio_ad_b1_08 - gpio1.24 - alt5
-#define BOARD_ALS_ADC_USER_CHANNEL 13U // ADC_IN13
+#define BOARD_ALS_ADC_BASE          ADC1 // gpio_ad_b1_08 - gpio1.24 - alt5
+#define BOARD_ALS_ADC_USER_CHANNEL  13U  // ADC_IN13
 #define BOARD_ALS_ADC_CHANNEL_GROUP 0U
-#define BOARD_ALS_GB1_GPIO GPIO1
-#define BOARD_ALS_GB1_PIN 26
-#define BOARD_ALS_GB1_PAD GPIO_AD_B1_10
-#define BOARD_ALS_GB2_GPIO GPIO1
-#define BOARD_ALS_GB2_PIN 27
-#define BOARD_ALS_GB2_PAD GPIO_AD_B1_11
+#define BOARD_ALS_GB1_GPIO          GPIO1
+#define BOARD_ALS_GB1_PIN           26
+#define BOARD_ALS_GB1_PAD           GPIO_AD_B1_10
+#define BOARD_ALS_GB2_GPIO          GPIO1
+#define BOARD_ALS_GB2_PIN           27
+#define BOARD_ALS_GB2_PAD           GPIO_AD_B1_11
 
 #if defined(__cplusplus)
 extern "C"
diff --git a/module-bsp/board/rt1051/common/chip.h b/module-bsp/board/rt1051/common/chip.h
index 934eb45fe..5da8db02f 100644
--- a/module-bsp/board/rt1051/common/chip.h
+++ b/module-bsp/board/rt1051/common/chip.h
@@ -15,15 +15,12 @@
 #include <stdio.h>
 #include <stdbool.h>
 
-
 //#define userprintf(...) SEGGER_RTT_printf(0, __VA_ARGS__)
 
 //! Test if in interrupt mode
 static inline bool isIRQ()
 {
-    return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0 ;
+    return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0;
 }
 
-
-
 #endif /* CHIP_H_ */
diff --git a/module-bsp/board/rt1051/common/clock_config.cpp b/module-bsp/board/rt1051/common/clock_config.cpp
index 6e798680e..1c6d92368 100644
--- a/module-bsp/board/rt1051/common/clock_config.cpp
+++ b/module-bsp/board/rt1051/common/clock_config.cpp
@@ -66,7 +66,8 @@ extern uint32_t SystemCoreClock;
 /*******************************************************************************
  ************************ BOARD_InitBootClocks function ************************
  ******************************************************************************/
-void BOARD_InitBootClocks(void) {
+void BOARD_InitBootClocks(void)
+{
     BOARD_BootClockRUN();
 }
 
@@ -116,7 +117,8 @@ void BOARD_InitBootClocks(void) {
  * ---------------------------------------------------------
  */
 
-void BOARD_BootClockRUN(void) {
+void BOARD_BootClockRUN(void)
+{
     /* Init RTC OSC clock frequency. */
     CLOCK_SetRtcXtalFreq(32768U);
 
@@ -133,136 +135,135 @@ void BOARD_BootClockRUN(void) {
     /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
     /* OSC_CLK (24M) */
     CLOCK_SetMux(kCLOCK_PeriphClk2Mux,
-                 1); //CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
+                 1); // CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
     /* PERIPH_CLK2_SEL */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     //CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1); // CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* Set AHB_PODF. */
-    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);    //CBCDR
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0); // CBCDR
 
     /* Set IPG_PODF. */
     /* AHB_CLK/4 */
-    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);    //CBCDR
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3); // CBCDR
 
     /* Set ARM_PODF. */
     /* PLL1/2 (864MHz / 2 = 432 MHz) */
-    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);    //CACRR
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1); // CACRR
 
     /* Set PERCLK_PODF. */
     /* IPG_CLK_ROOT/2 */
-    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);    //CSCMR1
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); // CSCMR1
     /* Set per clock source. */
-    CLOCK_SetMux(kCLOCK_PerclkMux, 0);    //CSCMR1  (6) 0 - ipg_clk_root, 1 - osc_clk - PIT, GPT
-
-
-
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0); // CSCMR1  (6) 0 - ipg_clk_root, 1 - osc_clk - PIT, GPT
 
     /* Set USDHC1_PODF. */
-    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);    //CSCDR1
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); // CSCDR1
     /* Set Usdhc1 clock source. */
     /* PLL2_PFD2/2 = 396MHz/2 = 198MHz */
-    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);    //CSCMR1  (16) 0 - PLL2_PFD2, 1 - PLL2_PFD0
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); // CSCMR1  (16) 0 - PLL2_PFD2, 1 - PLL2_PFD0
 
     /* Set USDHC2_PODF. */
-    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2);    //CSCDR1
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2); // CSCDR1
     /* Set Usdhc2 clock source. */
     /* PLL2_PFD2/3 = 396MHz/3 = 132MHz */
-    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);    //CSCMR1  (17) 0 - PLL2_PFD2, 1 - PLL2_PFD0
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); // CSCMR1  (17) 0 - PLL2_PFD2, 1 - PLL2_PFD0
 
     /* Set FLEXSPI_PODF. */
-    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0);    //CSCMR1
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); // CSCMR1
     /* Set Flexspi clock source. */
     CLOCK_SetMux(kCLOCK_FlexspiMux,
-                 3);    //CSCMR1  (30-29) 0 - semc_clk_reet_pre, 1 - pll3_sw_clk, 2 - PLL2_PFD2, 3 - PLL3_PFD0
+                 3); // CSCMR1  (30-29) 0 - semc_clk_reet_pre, 1 - pll3_sw_clk, 2 - PLL2_PFD2, 3 - PLL3_PFD0
 
     /* Set CSI_PODF. */
-    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);    //CSCDR3
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1); // CSCDR3
     /* Set Csi clock source. */
-    CLOCK_SetMux(kCLOCK_CsiMux, 0);    //CSCDR3  (10-9) 0 - osc_clk, 1 - PLL2_PFD2, 2 - pll3_120M, 3 - PLL3_PFD1
+    CLOCK_SetMux(kCLOCK_CsiMux, 0); // CSCDR3  (10-9) 0 - osc_clk, 1 - PLL2_PFD2, 2 - pll3_120M, 3 - PLL3_PFD1
 
     /* Set LPSPI_PODF. */
-    CLOCK_SetDiv(kCLOCK_LpspiDiv, 7);    //CBCMR
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); // CBCMR
     /* Set Lpspi clock source. */
     /* PLL2_PFD2/8 = 396MHz / 8 = 49,5MHz */
-    CLOCK_SetMux(kCLOCK_LpspiMux, 3);    //CBCMR  (5-4) 0 - PLL3_PFD1, 1 - PLL3_PFD0, 2 - PLL2, 3 - PLL2_PFD2
+    CLOCK_SetMux(kCLOCK_LpspiMux, 3); // CBCMR  (5-4) 0 - PLL3_PFD1, 1 - PLL3_PFD0, 2 - PLL2, 3 - PLL2_PFD2
 
     /* Set TRACE_PODF. */
-    CLOCK_SetDiv(kCLOCK_TraceDiv, 2);    //CSCDR1
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 2); // CSCDR1
     /* Set Trace clock source. */
     /* PLL2_PFD0/4 disabled*/
-    CLOCK_SetMux(kCLOCK_TraceMux, 2);    //CBCMR  (15-14) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL2_PFD1
+    CLOCK_SetMux(kCLOCK_TraceMux, 2); // CBCMR  (15-14) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL2_PFD1
 
     /* Set SAI1_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 0);    //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 0); // CS1CDR
     /* Set SAI1_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Sai1Div, 63);    //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 63); // CS1CDR
     /* Set Sai1 clock source. */
-    CLOCK_SetMux(kCLOCK_Sai1Mux, 2);    //CSCMR1  (11-10) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 2); // CSCMR1  (11-10) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
 
     /* Set SAI2_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 0);    //CS2CDR
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 0); // CS2CDR
     /* Set SAI2_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Sai2Div, 63);    //CS2CDR
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 63); // CS2CDR
     /* Set Sai2 clock source. */
-    CLOCK_SetMux(kCLOCK_Sai2Mux, 2);    //CSCMR1  (13-12) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 2); // CSCMR1  (13-12) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
 
     /* Set SAI3_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 0);    //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 0); // CS1CDR
     /* Set SAI3_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Sai3Div, 63);    //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 63); // CS1CDR
     /* Set Sai3 clock source. */
-    CLOCK_SetMux(kCLOCK_Sai3Mux, 2);    //CSCMR1  (15-14) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 2); // CSCMR1  (15-14) 0 - PLL3_PFD2, 1 - PLL5, 2 - PLL4, 3 - reserved
 
     /* Set LPI2C_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 1);    //CSCDR2
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 1); // CSCDR2
     /* Set Lpi2c clock source. */
     /* OSC_CLK (24MHz/2 = 12MHz */
-    CLOCK_SetMux(kCLOCK_Lpi2cMux, 1);    //CSCDR2  (18) 0 - pll3_60m, 1 - osc_clk
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 1); // CSCDR2  (18) 0 - pll3_60m, 1 - osc_clk
 
     /* Set CAN_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_CanDiv, 1);        //CSCMR2
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1); // CSCMR2
     /* Set Can clock source. */
     CLOCK_SetMux(kCLOCK_CanMux,
-                 2);        //CSCMR2  (9-8) 0 - pll3_sw_clk (divided clock 60M), 1 - osc_clk, 2 - pll3_sw_clk (divided clock 80M), 3 - disable
+                 2); // CSCMR2  (9-8) 0 - pll3_sw_clk (divided clock 60M), 1 - osc_clk, 2 - pll3_sw_clk (divided clock
+                     // 80M), 3 - disable
 
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);    //CSCDR1
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0); // CSCDR1
     /* Set Uart clock source. */
     /* OSC_CLK (24MHz)/1 */
-    CLOCK_SetMux(kCLOCK_UartMux, 1);    //CSCDR1  (6) 0 - pll3_80m, 1 - osc_clk
+    CLOCK_SetMux(kCLOCK_UartMux, 1); // CSCDR1  (6) 0 - pll3_80m, 1 - osc_clk
 
     /* Set LCDIF_PRED. */
-    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);    //CSCDR2
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1); // CSCDR2
     /* Set LCDIF_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);    //CBCMR
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3); // CBCMR
     /* Set Lcdif pre clock source. */
     /* PLL3_PFD1 (664.62MHz/4/2 = 83.08MHz disabled */
     CLOCK_SetMux(kCLOCK_LcdifPreMux,
-                 5);    //CSCDR2  (17-15) 0 - Pll2, 1 - PLL3_PFD3, 2 - PLL5, 3 - PLL2_PFD0, 4 - PLL2_PFD1, 5 - PLL3_PFD1, 6,7 - reserved
+                 5); // CSCDR2  (17-15) 0 - Pll2, 1 - PLL3_PFD3, 2 - PLL5, 3 - PLL2_PFD0, 4 - PLL2_PFD1, 5 - PLL3_PFD1,
+                     // 6,7 - reserved
 
     /* Set SPDIF0_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);    //CDCDR
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); // CDCDR
     /* Set SPDIF0_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);        //CDCDR
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); // CDCDR
     /* Set Spdif clock source. */
     /* PLL3_main/8/2 = 480MHz / 8 / 2 = 30MHz disabled*/
-    CLOCK_SetMux(kCLOCK_SpdifMux, 3);        //CDCDR  (21-20) 0 - PLL4, 1 - PLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3); // CDCDR  (21-20) 0 - PLL4, 1 - PLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
 
     /* Set FLEXIO1_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);    //CDCDR
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); // CDCDR
     /* Set FLEXIO1_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);        //CDCDR
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); // CDCDR
     /* Set Flexio1 clock source. */
     /* PLL3_main/8/2 = 480MHz / 8 / 2 = 30MHz disabled*/
-    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);        //CDCDR (8-7) 0 - PLL4, 1 - PlLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); // CDCDR (8-7) 0 - PLL4, 1 - PlLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
 
     /* Set FLEXIO2_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);    //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1); // CS1CDR
     /* Set FLEXIO2_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);        //CS1CDR
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7); // CS1CDR
     /* Set Flexio2 clock source. */
     /* PLL3_main/8/2 = 480MHz / 8 / 2 = 30MHz disabled*/
-    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);        //CSCMR2 (20-19) 0 - PLL4, 1 - PLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3); // CSCMR2 (20-19) 0 - PLL4, 1 - PLL3_PFD2, 2 - PLL5, 3 - pll3_sw_clk
 
     clkFLEXSPIsetup(CLK_INSTANCE_ALL, CLK_DISABLE);
 
@@ -300,11 +301,11 @@ void BOARD_BootClockRUN(void) {
 
     /* Set Pll3 sw clock source. */
     /* PLL3_main = 480 MHz */
-    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);        //CCSR  (0) 0 - pll3_main_clk, 1 - pll3_bypass_clock
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); // CCSR  (0) 0 - pll3_main_clk, 1 - pll3_bypass_clock
     /* Set lvds1 clock source. */
 
     CCM_ANALOG->MISC1 =
-            (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+        (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
     /* Set clock out1 divider. */
     CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
     /* Set clock out1 source. */
@@ -361,8 +362,7 @@ void BOARD_BootClockRUN(void) {
     clkPLL2_PFD3setup(CLK_DISABLE);
 
     /* Disable pfd offset. */
-    //CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK;
-
+    // CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK;
 
     /*
      * ------------------------------------------------------------------
@@ -410,7 +410,6 @@ void BOARD_BootClockRUN(void) {
     /* Disable Video PLL output. */
     CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
 
-
     /*
      * ------------------------------------------------------------------
      * PLL6 - ENET PLL
@@ -423,20 +422,18 @@ void BOARD_BootClockRUN(void) {
     CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
     /* Set Enet output divider. */
     CCM_ANALOG->PLL_ENET =
-            (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+        (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
     /* Disable Enet output. */
     CCM_ANALOG->PLL_ENET &= ~CCM_ANALOG_PLL_ENET_ENABLE_MASK;
     /* Disable Enet25M output. */
     CCM_ANALOG->PLL_ENET &= ~CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
 
-
     /*
      * ------------------------------------------------------------------
      * PLL7 - USB2 PLL
      * ------------------------------------------------------------------
      */
 
-
     /* DeInit Usb2 PLL. */
     clkPLL7setup(CLK_DISABLE);
     /* Bypass Usb2 PLL. */
@@ -444,32 +441,36 @@ void BOARD_BootClockRUN(void) {
     /* Disable Usb2 PLL output. */
     CCM_ANALOG->PLL_USB2 &= ~CCM_ANALOG_PLL_USB2_ENABLE_MASK;
 
-
     /* Set preperiph clock source. */
     /* PLL1/2 = 432MHz */
-    CLOCK_SetMux(kCLOCK_PrePeriphMux, 0);        //CBCMR  (19-18) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL1
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 0); // CBCMR  (19-18) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL1
     /* Set periph clock source. */
     /* PRE_PERIPH_CLK <- PLL1/2 = 432MHz */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 0);            //CBCDR  (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0); // CBCDR  (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* Set SystemCoreClock variable. */
     SystemCoreClockUpdate();
-
 }
 
 /* ADC */
-void clkADCsetup(uint8_t instance, uint8_t enabled) {
+void clkADCsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if (instance == 1) CLOCK_EnableClock(kCLOCK_Adc1);
-        if (instance == 2) CLOCK_EnableClock(kCLOCK_Adc2);
+        if (instance == 1)
+            CLOCK_EnableClock(kCLOCK_Adc1);
+        if (instance == 2)
+            CLOCK_EnableClock(kCLOCK_Adc2);
         if (instance == 0) {
             CLOCK_EnableClock(kCLOCK_Adc1);
             CLOCK_EnableClock(kCLOCK_Adc2);
         }
-    } else {
-        if (instance == 1) CLOCK_DisableClock(kCLOCK_Adc1);
-        if (instance == 2) CLOCK_DisableClock(kCLOCK_Adc2);
+    }
+    else {
+        if (instance == 1)
+            CLOCK_DisableClock(kCLOCK_Adc1);
+        if (instance == 2)
+            CLOCK_DisableClock(kCLOCK_Adc2);
         if (instance == 0) {
             CLOCK_DisableClock(kCLOCK_Adc1);
             CLOCK_DisableClock(kCLOCK_Adc2);
@@ -478,21 +479,29 @@ void clkADCsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* XBAR */
-void clkXBARsetup(uint8_t instance, uint8_t enabled) {
+void clkXBARsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if (instance == 1) CLOCK_EnableClock(kCLOCK_Xbar1);
-        if (instance == 2) CLOCK_EnableClock(kCLOCK_Xbar2);
-        if (instance == 3) CLOCK_EnableClock(kCLOCK_Xbar3);
+        if (instance == 1)
+            CLOCK_EnableClock(kCLOCK_Xbar1);
+        if (instance == 2)
+            CLOCK_EnableClock(kCLOCK_Xbar2);
+        if (instance == 3)
+            CLOCK_EnableClock(kCLOCK_Xbar3);
         if (instance == 0) {
             CLOCK_EnableClock(kCLOCK_Xbar1);
             CLOCK_EnableClock(kCLOCK_Xbar2);
             CLOCK_EnableClock(kCLOCK_Xbar3);
         }
-    } else {
-        if (instance == 1) CLOCK_DisableClock(kCLOCK_Xbar1);
-        if (instance == 2) CLOCK_DisableClock(kCLOCK_Xbar2);
-        if (instance == 3) CLOCK_DisableClock(kCLOCK_Xbar3);
+    }
+    else {
+        if (instance == 1)
+            CLOCK_DisableClock(kCLOCK_Xbar1);
+        if (instance == 2)
+            CLOCK_DisableClock(kCLOCK_Xbar2);
+        if (instance == 3)
+            CLOCK_DisableClock(kCLOCK_Xbar3);
         if (instance == 0) {
             CLOCK_DisableClock(kCLOCK_Xbar1);
             CLOCK_DisableClock(kCLOCK_Xbar2);
@@ -502,7 +511,8 @@ void clkXBARsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* GPT */
-void clkGPTsetup(uint8_t instance, uint8_t enabled) {
+void clkGPTsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         if (instance == 1) {
@@ -519,7 +529,8 @@ void clkGPTsetup(uint8_t instance, uint8_t enabled) {
             CLOCK_EnableClock(kCLOCK_Gpt2);
             CLOCK_EnableClock(kCLOCK_Gpt2S);
         }
-    } else {
+    }
+    else {
         if (instance == 1) {
             CLOCK_DisableClock(kCLOCK_Gpt1);
             CLOCK_DisableClock(kCLOCK_Gpt1S);
@@ -538,18 +549,21 @@ void clkGPTsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* PIT */
-void clkPITsetup(uint8_t instance, uint8_t enabled) {
+void clkPITsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         CLOCK_EnableClock(kCLOCK_Pit);
-    } else {
+    }
+    else {
         /* PIT */
         CLOCK_DisableClock(kCLOCK_Pit);
     }
 }
 
 /* USDHC */
-void clkUSDHCsetup(uint8_t instance, uint8_t enabled) {
+void clkUSDHCsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         if ((instance == 1) || (instance == 0)) {
@@ -560,7 +574,8 @@ void clkUSDHCsetup(uint8_t instance, uint8_t enabled) {
         if ((instance == 2) || (instance == 0)) {
             CLOCK_EnableClock(kCLOCK_Usdhc2);
         }
-    } else {
+    }
+    else {
         if ((instance == 1) || (instance == 0)) {
             /* USDHC */
             CLOCK_DisableClock(kCLOCK_Usdhc1);
@@ -574,12 +589,14 @@ void clkUSDHCsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* FLEXSPI */
-void clkFLEXSPIsetup(uint8_t instance, uint8_t enabled) {
+void clkFLEXSPIsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         /* FLEXSPI */
         CLOCK_EnableClock(kCLOCK_FlexSpi);
-    } else {
+    }
+    else {
         /* FLEXSPI */
         /* Disable Flexspi clock gate. */
         CLOCK_DisableClock(kCLOCK_FlexSpi);
@@ -587,11 +604,13 @@ void clkFLEXSPIsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* CSI */
-void clkCSIsetup(uint8_t instance, uint8_t enabled) {
+void clkCSIsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         CLOCK_EnableClock(kCLOCK_Csi);
-    } else {
+    }
+    else {
         /* CSI */
         /* Disable CSI clock gate. */
         CLOCK_DisableClock(kCLOCK_Csi);
@@ -599,27 +618,39 @@ void clkCSIsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* LPSPI */
-void clkLPSPICsetup(uint8_t instance, uint8_t enabled) {
+void clkLPSPICsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if ((instance == 1) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpspi1);
-        if ((instance == 2) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpspi2);
-        if ((instance == 3) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpspi3);
-        if ((instance == 4) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpspi4);
-    } else {
-        if ((instance == 1) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpspi1);
-        if ((instance == 2) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpspi2);
-        if ((instance == 3) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpspi3);
-        if ((instance == 4) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpspi4);
+        if ((instance == 1) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpspi1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpspi2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpspi3);
+        if ((instance == 4) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpspi4);
+    }
+    else {
+        if ((instance == 1) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpspi1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpspi2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpspi3);
+        if ((instance == 4) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpspi4);
     }
 }
 
 /* TRACE */
-void clkTRACEsetup(uint8_t instance, uint8_t enabled) {
+void clkTRACEsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         CLOCK_EnableClock(kCLOCK_Trace);
-    } else {
+    }
+    else {
         /* TRACE */
         /* Disable TRACE clock gate. */
         CLOCK_DisableClock(kCLOCK_Trace);
@@ -627,45 +658,59 @@ void clkTRACEsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* SAI */
-void clkSAIsetup(uint8_t instance, uint8_t enabled) {
+void clkSAIsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if ((instance == 1) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Sai1);
-        if ((instance == 2) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Sai2);
-        if ((instance == 3) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Sai3);
-
-    } else {
+        if ((instance == 1) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Sai1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Sai2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Sai3);
+    }
+    else {
         /* Disable SAI1 clock gate. */
-        if ((instance == 1) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Sai1);
+        if ((instance == 1) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Sai1);
 
         /* Disable SAI2 clock gate. */
-        if ((instance == 2) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Sai2);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Sai2);
 
         /* Disable SAI3 clock gate. */
-        if ((instance == 3) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Sai3);
-
+        if ((instance == 3) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Sai3);
     }
 }
 
 /* LPI2C */
-void clkLPI2Csetup(uint8_t instance, uint8_t enabled) {
+void clkLPI2Csetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if ((instance == 1) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpi2c1);
-        if ((instance == 2) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpi2c2);
-        if ((instance == 3) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpi2c3);
-    } else {
+        if ((instance == 1) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpi2c1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpi2c2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpi2c3);
+    }
+    else {
         /* LPI2C */
         /* Disable Lpi2c clock gate. */
-        if ((instance == 1) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpi2c1);
-        if ((instance == 2) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpi2c2);
-        if ((instance == 3) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpi2c3);
-
+        if ((instance == 1) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpi2c1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpi2c2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpi2c3);
     }
 }
 
 /* CAN */
-void clkCANsetup(uint8_t instance, uint8_t enabled) {
+void clkCANsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         if ((instance == 1) || (instance == 0)) {
@@ -676,9 +721,11 @@ void clkCANsetup(uint8_t instance, uint8_t enabled) {
             CLOCK_EnableClock(kCLOCK_Can2);
             CLOCK_EnableClock(kCLOCK_Can2S);
         }
-    } else {
+    }
+    else {
         CLOCK_SetMux(kCLOCK_CanMux,
-                     3);        //CSCMR2  (9-8) 0 - pll3_sw_clk (divided clock 60M), 1 - osc_clk, 2 - pll3_sw_clk (divided clock 80M), 3 - disable
+                     3); // CSCMR2  (9-8) 0 - pll3_sw_clk (divided clock 60M), 1 - osc_clk, 2 - pll3_sw_clk (divided
+                         // clock 80M), 3 - disable
         if ((instance == 1) || (instance == 0)) {
             CLOCK_DisableClock(kCLOCK_Can1);
             CLOCK_DisableClock(kCLOCK_Can1S);
@@ -687,42 +734,60 @@ void clkCANsetup(uint8_t instance, uint8_t enabled) {
             CLOCK_DisableClock(kCLOCK_Can2);
             CLOCK_DisableClock(kCLOCK_Can2S);
         }
-
     }
 }
 
 /* LPUART */
-void clkLPUARTsetup(uint8_t instance, uint8_t enabled) {
+void clkLPUARTsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if ((instance == 1) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart1);
-        if ((instance == 2) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart2);
-        if ((instance == 3) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart3);
-        if ((instance == 4) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart4);
-        if ((instance == 5) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart5);
-        if ((instance == 6) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart6);
-        if ((instance == 7) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart7);
-        if ((instance == 8) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Lpuart8);
-    } else {
+        if ((instance == 1) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart3);
+        if ((instance == 4) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart4);
+        if ((instance == 5) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart5);
+        if ((instance == 6) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart6);
+        if ((instance == 7) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart7);
+        if ((instance == 8) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Lpuart8);
+    }
+    else {
         /* LPUART */
-        if ((instance == 1) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart1);
-        if ((instance == 2) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart2);
-        if ((instance == 3) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart3);
-        if ((instance == 4) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart4);
-        if ((instance == 5) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart5);
-        if ((instance == 6) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart6);
-        if ((instance == 7) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart7);
-        if ((instance == 8) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Lpuart8);
-
+        if ((instance == 1) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart2);
+        if ((instance == 3) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart3);
+        if ((instance == 4) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart4);
+        if ((instance == 5) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart5);
+        if ((instance == 6) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart6);
+        if ((instance == 7) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart7);
+        if ((instance == 8) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Lpuart8);
     }
 }
 
 /* LCDIF */
-void clkLCDIFsetup(uint8_t instance, uint8_t enabled) {
+void clkLCDIFsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         CLOCK_EnableClock(kCLOCK_LcdPixel);
-    } else {
+    }
+    else {
         /* LCDIF */
         /* Disable LCDIF clock gate. */
         CLOCK_DisableClock(kCLOCK_LcdPixel);
@@ -730,11 +795,13 @@ void clkLCDIFsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* SPDIF */
-void clkSPDIFsetup(uint8_t instance, uint8_t enabled) {
+void clkSPDIFsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
         CLOCK_EnableClock(kCLOCK_Spdif);
-    } else {
+    }
+    else {
         /* SPDIF */
         /* Disable SPDIF clock gate. */
         CLOCK_DisableClock(kCLOCK_Spdif);
@@ -742,266 +809,293 @@ void clkSPDIFsetup(uint8_t instance, uint8_t enabled) {
 }
 
 /* FLEXIO */
-void clkFLEXIOsetup(uint8_t instance, uint8_t enabled) {
-
+void clkFLEXIOsetup(uint8_t instance, uint8_t enabled)
+{
 
     if (enabled) {
-        if ((instance == 1) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Flexio1);
-        if ((instance == 2) || (instance == 0)) CLOCK_EnableClock(kCLOCK_Flexio2);
-    } else {
+        if ((instance == 1) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Flexio1);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_EnableClock(kCLOCK_Flexio2);
+    }
+    else {
         /* FLEXIO */
         /* Disable Flexio1 clock gate. */
-        if ((instance == 1) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Flexio1);
+        if ((instance == 1) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Flexio1);
 
         /* Disable Flexio2 clock gate. */
-        if ((instance == 2) || (instance == 0)) CLOCK_DisableClock(kCLOCK_Flexio2);
+        if ((instance == 2) || (instance == 0))
+            CLOCK_DisableClock(kCLOCK_Flexio2);
     }
 }
 
-void clkPLL1setup(uint8_t enabled) {
-    const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 86,                       /* PLL loop divider, Fout = Fin * 43 */
-                    .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-            };
+void clkPLL1setup(uint8_t enabled)
+{
+    const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 86, /* PLL loop divider, Fout = Fin * 43 */
+        .src         = 0,  /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
 
     if (enabled) {
         /* Init ARM PLL. */
         CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         CLOCK_DeinitArmPll();
     }
 }
 
-
-void clkPLL2setup(uint8_t enabled) {
-    const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
-                    .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
-                    .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
-                    .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-            };
+void clkPLL2setup(uint8_t enabled)
+{
+    const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator   = 0, /* 30 bit numerator of fractional loop divider */
+        .denominator = 1, /* 30 bit denominator of fractional loop divider */
+        .src         = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
     if (enabled) {
         CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         CLOCK_DeinitSysPll();
     }
 }
 
-void clkPLL2_PFD0setup(uint8_t enabled) {
+void clkPLL2_PFD0setup(uint8_t enabled)
+{
     if (enabled) {
         CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
-    } else {
+    }
+    else {
         CLOCK_DeinitSysPfd(kCLOCK_Pfd0);
     }
 }
 
-void clkPLL2_PFD1setup(uint8_t enabled) {
+void clkPLL2_PFD1setup(uint8_t enabled)
+{
     if (enabled) {
         CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
-    } else {
+    }
+    else {
         CLOCK_DeinitSysPfd(kCLOCK_Pfd1);
     }
 }
 
-void clkPLL2_PFD2setup(uint8_t enabled) {
+void clkPLL2_PFD2setup(uint8_t enabled)
+{
     if (enabled) {
         CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
-    } else {
+    }
+    else {
         CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
     }
 }
 
-void clkPLL2_PFD3setup(uint8_t enabled) {
+void clkPLL2_PFD3setup(uint8_t enabled)
+{
     if (enabled) {
         CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
-    } else {
+    }
+    else {
         CLOCK_DeinitSysPfd(kCLOCK_Pfd3);
     }
 }
 
-void clkPLL3setup(uint8_t enabled) {
-    const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
-                    .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-            };
+void clkPLL3setup(uint8_t enabled)
+{
+    const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
+        .src         = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
     if (enabled) {
         /* Init Usb1 PLL. */
         CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         CLOCK_DeinitUsb1Pll();
     }
 }
 
-void clkPLL3_PFD0setup(uint8_t enabled) {
+void clkPLL3_PFD0setup(uint8_t enabled)
+{
     if (enabled) {
         /* Init Usb1 pfd0. */
         CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
-    } else {
+    }
+    else {
         CLOCK_DeinitUsb1Pfd(kCLOCK_Pfd0);
     }
 }
 
-void clkPLL3_PFD1setup(uint8_t enabled) {
+void clkPLL3_PFD1setup(uint8_t enabled)
+{
     if (enabled) {
         /* Init Usb1 pfd1. */
         CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
-    } else {
+    }
+    else {
         CLOCK_DeinitUsb1Pfd(kCLOCK_Pfd1);
     }
 }
 
-void clkPLL3_PFD2setup(uint8_t enabled) {
+void clkPLL3_PFD2setup(uint8_t enabled)
+{
     if (enabled) {
         /* Init Usb1 pfd2. */
         CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
-    } else {
+    }
+    else {
         CLOCK_DeinitUsb1Pfd(kCLOCK_Pfd2);
     }
 }
 
-void clkPLL3_PFD3setup(uint8_t enabled) {
+void clkPLL3_PFD3setup(uint8_t enabled)
+{
     if (enabled) {
         /* Init Usb1 pfd3. */
         CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
-    } else {
+    }
+    else {
         CLOCK_DeinitUsb1Pfd(kCLOCK_Pfd3);
     }
 }
 
-void clkPLL4setup(uint8_t enabled) {
-    const clock_audio_pll_config_t audioPllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 32,  /* PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
-                    .postDivider = 1,   /* Divider after the PLL, should only be 1, 2, 4, 8, 16. */
-                    .numerator = 77,    /* 30 bit numerator of fractional loop divider. */
-                    .denominator = 100, /* 30 bit denominator of fractional loop divider */
-            };
+void clkPLL4setup(uint8_t enabled)
+{
+    const clock_audio_pll_config_t audioPllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 32,  /* PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
+        .postDivider = 1,   /* Divider after the PLL, should only be 1, 2, 4, 8, 16. */
+        .numerator   = 77,  /* 30 bit numerator of fractional loop divider. */
+        .denominator = 100, /* 30 bit denominator of fractional loop divider */
+    };
     if (enabled) {
         CLOCK_InitAudioPll(&audioPllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         /* DeInit Audio PLL */
         CLOCK_DeinitAudioPll();
         CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
     }
 }
 
-void clkPLL5setup(uint8_t enabled) {
-    const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 54,  /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
-                    .postDivider = 16,  /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */
-                    .numerator = 77,    /*!< 30 bit numerator of fractional loop divider.*/
-                    .denominator = 100, /*!< 30 bit denominator of fractional loop divider */
-                    .src = kCLOCK_PllClkSrc24M          /*!< Pll clock source, reference _clock_pll_clk_src */
-            };
+void clkPLL5setup(uint8_t enabled)
+{
+    const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 54,                 /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */
+        .postDivider = 16,                 /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */
+        .numerator   = 77,                 /*!< 30 bit numerator of fractional loop divider.*/
+        .denominator = 100,                /*!< 30 bit denominator of fractional loop divider */
+        .src         = kCLOCK_PllClkSrc24M /*!< Pll clock source, reference _clock_pll_clk_src */
+    };
     if (enabled) {
         CLOCK_InitVideoPll(&videoPllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         /* DeInit Video PLL. */
         CLOCK_DeinitVideoPll();
     }
 }
 
-void clkPLL6setup(uint8_t enabled) {
-    const clock_enet_pll_config_t ethernetPllConfig_BOARD_BootClockRUN =
-            {
-                    .enableClkOutput = false, /*!< Power on and enable PLL clock output for ENET0 (ref_enetpll0). */
-                    .enableClkOutput25M = false, /*!< Power on and enable PLL clock output for ENET1 (ref_enetpll1). */
-                    .loopDivider = 0,     /*!< Controls the frequency of the ENET0 reference clock.
-	                                  b00 25MHz
-	                                  b01 50MHz
-	                                  b10 100MHz (not 50% duty cycle)
-	                                  b11 125MHz */
-                    .src = kCLOCK_PllClkSrc24M             /*!< Pll clock source, reference _clock_pll_clk_src */
+void clkPLL6setup(uint8_t enabled)
+{
+    const clock_enet_pll_config_t ethernetPllConfig_BOARD_BootClockRUN = {
+        .enableClkOutput    = false, /*!< Power on and enable PLL clock output for ENET0 (ref_enetpll0). */
+        .enableClkOutput25M = false, /*!< Power on and enable PLL clock output for ENET1 (ref_enetpll1). */
+        .loopDivider        = 0,     /*!< Controls the frequency of the ENET0 reference clock.
+                                 b00 25MHz
+                                 b01 50MHz
+                                 b10 100MHz (not 50% duty cycle)
+                                 b11 125MHz */
+        .src = kCLOCK_PllClkSrc24M   /*!< Pll clock source, reference _clock_pll_clk_src */
 
-            };
+    };
     if (enabled) {
         CLOCK_InitEnetPll(&ethernetPllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         /* DeInit Enet PLL. */
         CLOCK_DeinitEnetPll();
     }
 }
 
-void clkPLL7setup(uint8_t enabled) {
-    const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
-            {
-                    .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
-                    .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-            };
+void clkPLL7setup(uint8_t enabled)
+{
+    const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN = {
+        .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
+        .src         = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
     if (enabled) {
         CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
-    } else {
+    }
+    else {
         /* DeInit Usb2 PLL. */
         CLOCK_DeinitUsb2Pll();
     }
 }
 
-
-uint32_t GetPerphSourceClock(PerphClock_t clock) {
+uint32_t GetPerphSourceClock(PerphClock_t clock)
+{
     switch (clock) {
 
-        case PerphClock_I2C:
-            return CLOCK_GetFreq(kCLOCK_OscClk) / (CLOCK_GetDiv(kCLOCK_Lpi2cDiv)+1);
-        case PerphClock_LPSPI:
-            return CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv)+1);
-        case PerphClock_LPUART:
-            return CLOCK_GetFreq(kCLOCK_OscClk) / (CLOCK_GetDiv(kCLOCK_UartDiv)+1);
-        case PerphClock_SAI1:
-            return CLOCK_GetFreq(kCLOCK_AudioPllClk) / (CLOCK_GetDiv(kCLOCK_Sai1Div)+1) / (CLOCK_GetDiv(kCLOCK_Sai1PreDiv)+1);
-        case PerphClock_SAI2:
-            return CLOCK_GetFreq(kCLOCK_AudioPllClk) / (CLOCK_GetDiv(kCLOCK_Sai2Div)+1) / (CLOCK_GetDiv(kCLOCK_Sai2PreDiv)+1);
-        case PerphClock_USDHC2:
-            return CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk) / (CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);
-        default:
-            return 0;
-
+    case PerphClock_I2C:
+        return CLOCK_GetFreq(kCLOCK_OscClk) / (CLOCK_GetDiv(kCLOCK_Lpi2cDiv) + 1);
+    case PerphClock_LPSPI:
+        return CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1);
+    case PerphClock_LPUART:
+        return CLOCK_GetFreq(kCLOCK_OscClk) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1);
+    case PerphClock_SAI1:
+        return CLOCK_GetFreq(kCLOCK_AudioPllClk) / (CLOCK_GetDiv(kCLOCK_Sai1Div) + 1) /
+               (CLOCK_GetDiv(kCLOCK_Sai1PreDiv) + 1);
+    case PerphClock_SAI2:
+        return CLOCK_GetFreq(kCLOCK_AudioPllClk) / (CLOCK_GetDiv(kCLOCK_Sai2Div) + 1) /
+               (CLOCK_GetDiv(kCLOCK_Sai2PreDiv) + 1);
+    case PerphClock_USDHC2:
+        return CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk) / (CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);
+    default:
+        return 0;
     }
 }
 
-
-void PrintSystemClocks() {
-
+void PrintSystemClocks()
+{
 
     const char *_PLLNames[22] = {
-            "kCLOCK_CpuClk",  /*!< CPU clock */
-            "kCLOCK_AhbClk",  /*!< AHB clock */
-            "kCLOCK_SemcClk", /*!< SEMC clock */
-            "kCLOCK_IpgClk",  /*!< IPG clock */
+        "kCLOCK_CpuClk",  /*!< CPU clock */
+        "kCLOCK_AhbClk",  /*!< AHB clock */
+        "kCLOCK_SemcClk", /*!< SEMC clock */
+        "kCLOCK_IpgClk",  /*!< IPG clock */
 
-            "kCLOCK_OscClk", /*!< OSC clock selected by PMU_LOWPWR_CTRL[OSC_SEL]. */
-            "kCLOCK_RtcClk", /*!< RTC clock. (RTCCLK) */
+        "kCLOCK_OscClk", /*!< OSC clock selected by PMU_LOWPWR_CTRL[OSC_SEL]. */
+        "kCLOCK_RtcClk", /*!< RTC clock. (RTCCLK) */
 
-            "kCLOCK_ArmPllClk", /*!< ARMPLLCLK. */
+        "kCLOCK_ArmPllClk", /*!< ARMPLLCLK. */
 
-            "kCLOCK_Usb1PllClk",     /*!< USB1PLLCLK. */
-            "kCLOCK_Usb1PllPfd0Clk", /*!< USB1PLLPDF0CLK. */
-            "kCLOCK_Usb1PllPfd1Clk", /*!< USB1PLLPFD1CLK. */
-            "kCLOCK_Usb1PllPfd2Clk", /*!< USB1PLLPFD2CLK. */
-            "kCLOCK_Usb1PllPfd3Clk", /*!< USB1PLLPFD3CLK. */
+        "kCLOCK_Usb1PllClk",     /*!< USB1PLLCLK. */
+        "kCLOCK_Usb1PllPfd0Clk", /*!< USB1PLLPDF0CLK. */
+        "kCLOCK_Usb1PllPfd1Clk", /*!< USB1PLLPFD1CLK. */
+        "kCLOCK_Usb1PllPfd2Clk", /*!< USB1PLLPFD2CLK. */
+        "kCLOCK_Usb1PllPfd3Clk", /*!< USB1PLLPFD3CLK. */
 
-            "kCLOCK_Usb2PllClk", /*!< USB2PLLCLK. */
+        "kCLOCK_Usb2PllClk", /*!< USB2PLLCLK. */
 
-            "kCLOCK_SysPllClk",      /*!< SYSPLLCLK. */
-            "kCLOCK_SysPllPfd0Clk",  /*!< SYSPLLPDF0CLK. */
-            "kCLOCK_SysPllPfd1Clk",  /*!< SYSPLLPFD1CLK. */
-            "kCLOCK_SysPllPfd2Clk", /*!< SYSPLLPFD2CLK. */
-            "kCLOCK_SysPllPfd3Clk", /*!< SYSPLLPFD3CLK. */
+        "kCLOCK_SysPllClk",     /*!< SYSPLLCLK. */
+        "kCLOCK_SysPllPfd0Clk", /*!< SYSPLLPDF0CLK. */
+        "kCLOCK_SysPllPfd1Clk", /*!< SYSPLLPFD1CLK. */
+        "kCLOCK_SysPllPfd2Clk", /*!< SYSPLLPFD2CLK. */
+        "kCLOCK_SysPllPfd3Clk", /*!< SYSPLLPFD3CLK. */
 
-            "kCLOCK_EnetPll0Clk", /*!< Enet PLLCLK ref_enetpll0. */
-            "kCLOCK_EnetPll1Clk", /*!< Enet PLLCLK ref_enetpll1. */
+        "kCLOCK_EnetPll0Clk", /*!< Enet PLLCLK ref_enetpll0. */
+        "kCLOCK_EnetPll1Clk", /*!< Enet PLLCLK ref_enetpll1. */
 
-            "kCLOCK_AudioPllClk", /*!< Audio PLLCLK. */
-            "kCLOCK_VideoPllClk", /*!< Video PLLCLK. */
+        "kCLOCK_AudioPllClk", /*!< Audio PLLCLK. */
+        "kCLOCK_VideoPllClk", /*!< Video PLLCLK. */
     };
     int i;
 
-    for (i=0; i<22; i++) {
+    for (i = 0; i < 22; i++) {
         LOG_PRINTF("%s: %i Hz\r\n", _PLLNames[i], CLOCK_GetFreq(static_cast<clock_name_t>(i)));
-        //volatile uint32_t val = CLOCK_GetFreq(static_cast<clock_name_t>(i));
+        // volatile uint32_t val = CLOCK_GetFreq(static_cast<clock_name_t>(i));
     }
 
     LOG_PRINTF("PerphSourceClock_I2C: %lu\r\n", GetPerphSourceClock(PerphClock_I2C));
@@ -1011,38 +1105,29 @@ void PrintSystemClocks() {
     LOG_PRINTF("PerphSourceClock_SAI2: %lu\r\n", GetPerphSourceClock(PerphClock_SAI2));
     LOG_PRINTF("PerphSourceClock_USDHC2: %lu\r\n", GetPerphSourceClock(PerphClock_USDHC2));
 
-/*    volatile auto  val1 = GetPerphSourceClock(PerphClock_I2C);
-    volatile auto  val2 = GetPerphSourceClock(PerphClock_LPSPI);
-    volatile auto  val3 = GetPerphSourceClock(PerphClock_LPUART);
-    volatile auto  val4 = GetPerphSourceClock(PerphClock_SAI1);
-    volatile auto  val5 = GetPerphSourceClock(PerphClock_SAI2);
-    volatile auto  val6 = GetPerphSourceClock(PerphClock_USDHC2);*/
+    /*    volatile auto  val1 = GetPerphSourceClock(PerphClock_I2C);
+        volatile auto  val2 = GetPerphSourceClock(PerphClock_LPSPI);
+        volatile auto  val3 = GetPerphSourceClock(PerphClock_LPUART);
+        volatile auto  val4 = GetPerphSourceClock(PerphClock_SAI1);
+        volatile auto  val5 = GetPerphSourceClock(PerphClock_SAI2);
+        volatile auto  val6 = GetPerphSourceClock(PerphClock_USDHC2);*/
 }
 
+#define CLOCK_CCM_HANDSHAKE_WAIT()                                                                                     \
+                                                                                                                       \
+    do {                                                                                                               \
+        while (CCM->CDHIPR != 0) {}                                                                                    \
+                                                                                                                       \
+    } while (0)
 
-#define CLOCK_CCM_HANDSHAKE_WAIT() \
-    \
-do                          \
-    {                              \
-        while (CCM->CDHIPR != 0)   \
-        {                          \
-        }                          \
-    \
-}                           \
-    while (0)
-
-#define LPM_DELAY(value)                         \
-    \
-do                                        \
-    {                                            \
-        for (uint32_t i = 0; i < 5 * value; i++) \
-        {                                        \
-            __NOP();                             \
-        }                                        \
-    \
-}                                         \
-    while (0)
-
+#define LPM_DELAY(value)                                                                                               \
+                                                                                                                       \
+    do {                                                                                                               \
+        for (uint32_t i = 0; i < 5 * value; i++) {                                                                     \
+            __NOP();                                                                                                   \
+        }                                                                                                              \
+                                                                                                                       \
+    } while (0)
 
 void EnableWeakLDO(void)
 {
@@ -1077,16 +1162,14 @@ void DisableRegularLDO(void)
 void BandgapOff(void)
 {
     XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK;
-    PMU->MISC0_SET              |= PMU_MISC0_REFTOP_PWD_MASK;
+    PMU->MISC0_SET |= PMU_MISC0_REFTOP_PWD_MASK;
 }
 
 void BandgapOn(void)
 {
     /* Turn on regular bandgap and wait for stable */
     PMU->MISC0_CLR |= PMU_MISC0_REFTOP_PWD_MASK;
-    while ((PMU->MISC0 & PMU_MISC0_REFTOP_VBGUP_MASK) == 0)
-    {
-    }
+    while ((PMU->MISC0 & PMU_MISC0_REFTOP_VBGUP_MASK) == 0) {}
     /* Low power band gap disable */
     XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK;
 }
@@ -1120,9 +1203,10 @@ void SetLowPowerClockGate(void)
     CCM->CCGR0 = CCM_CCGR0_CG0(1) | CCM_CCGR0_CG1(1) | CCM_CCGR0_CG3(3) | CCM_CCGR0_CG11(1) | CCM_CCGR0_CG12(1);
     CCM->CCGR1 = CCM_CCGR1_CG9(3) | CCM_CCGR1_CG10(1) | CCM_CCGR1_CG13(1) | CCM_CCGR1_CG14(1) /*| CCM_CCGR1_CG15(1)*/;
     CCM->CCGR2 = CCM_CCGR2_CG2(1) | CCM_CCGR2_CG8(1) | CCM_CCGR2_CG9(1) | CCM_CCGR2_CG10(1);
-    CCM->CCGR3 = /*CCM_CCGR3_CG2(1) |*/ CCM_CCGR3_CG4(1) /*| CCM_CCGR3_CG9(1) */ /*| CCM_CCGR3_CG14(1) | CCM_CCGR3_CG15(1)*/;
+    CCM->CCGR3 =
+        /*CCM_CCGR3_CG2(1) |*/ CCM_CCGR3_CG4(1) /*| CCM_CCGR3_CG9(1) */ /*| CCM_CCGR3_CG14(1) | CCM_CCGR3_CG15(1)*/;
     CCM->CCGR4 =
-            CCM_CCGR4_CG1(1) | CCM_CCGR4_CG2(1) | CCM_CCGR4_CG4(1) | CCM_CCGR4_CG5(1) | CCM_CCGR4_CG6(1) | CCM_CCGR4_CG7(1);
+        CCM_CCGR4_CG1(1) | CCM_CCGR4_CG2(1) | CCM_CCGR4_CG4(1) | CCM_CCGR4_CG5(1) | CCM_CCGR4_CG6(1) | CCM_CCGR4_CG7(1);
     CCM->CCGR5 = CCM_CCGR5_CG0(1) | CCM_CCGR5_CG1(1) | CCM_CCGR5_CG4(1) | CCM_CCGR5_CG6(1) | CCM_CCGR5_CG12(1) |
                  CCM_CCGR5_CG14(1) /*| CCM_CCGR5_CG15(1)*/;
     /* We can enable DCDC when need to config it and close it after configuration */
@@ -1130,24 +1214,24 @@ void SetLowPowerClockGate(void)
                  CCM_CCGR6_CG11(1);
 }
 
-#define GPR8_DOZE_BITS                                                               \
-    (IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK |   \
-     IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK |   \
-     IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK |   \
-     IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK |   \
-     IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK | \
-     IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK | \
-     IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK | \
+#define GPR8_DOZE_BITS                                                                                                 \
+    (IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK |                                     \
+     IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK |                                     \
+     IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK |                                     \
+     IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK |                                     \
+     IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK |                                   \
+     IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK |                                   \
+     IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK |                                   \
      IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK | IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK)
 
-#define GPR8_STOP_MODE_BITS                                                                    \
-    (IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK |   \
-     IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK |   \
-     IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK |   \
-     IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK |   \
-     IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK | \
-     IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK | \
-     IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK | \
+#define GPR8_STOP_MODE_BITS                                                                                            \
+    (IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK |                           \
+     IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK |                           \
+     IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK |                           \
+     IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK |                           \
+     IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK |                         \
+     IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK |                         \
+     IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK | IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK |                         \
      IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK)
 
 #define GPR12_DOZE_BITS (IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK | IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK)
@@ -1160,53 +1244,46 @@ void PeripheralEnterDozeMode(void)
     IOMUXC_GPR->GPR12 = GPR12_DOZE_BITS;
 }
 
-
-#define GPR4_STOP_REQ_BITS                                                                                          \
-    (IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK | \
-     IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK | IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK |  \
+#define GPR4_STOP_REQ_BITS                                                                                             \
+    (IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK |    \
+     IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK | IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK | IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK |     \
      IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK | IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK)
 
-#define GPR4_STOP_ACK_BITS                                                                                          \
-    (IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK | \
-     IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK | IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK |  \
+#define GPR4_STOP_ACK_BITS                                                                                             \
+    (IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK |    \
+     IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK | IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK | IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK |     \
      IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK | IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK)
 
-#define GPR7_STOP_REQ_BITS                                                           \
-    (IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK |   \
-     IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK |   \
-     IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK |   \
-     IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK |   \
-     IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK | \
-     IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK | \
-     IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK | \
+#define GPR7_STOP_REQ_BITS                                                                                             \
+    (IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK |                                   \
+     IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK |                                   \
+     IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK |                                   \
      IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK | IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK)
 
-#define GPR7_STOP_ACK_BITS                                                           \
-    (IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK |   \
-     IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK |   \
-     IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK |   \
-     IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK |   \
-     IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK | \
-     IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK | \
-     IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK | \
+#define GPR7_STOP_ACK_BITS                                                                                             \
+    (IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK |                                     \
+     IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK |                                   \
+     IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK |                                   \
+     IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK |                                   \
      IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK | IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK)
 
 void PeripheralEnterStopMode(void)
 {
     IOMUXC_GPR->GPR4 = IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK;
-    while ((IOMUXC_GPR->GPR4 & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK) != IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK)
-    {
-    }
+    while ((IOMUXC_GPR->GPR4 & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK) != IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK) {}
     IOMUXC_GPR->GPR4  = GPR4_STOP_REQ_BITS;
     IOMUXC_GPR->GPR7  = GPR7_STOP_REQ_BITS;
     IOMUXC_GPR->GPR8  = GPR8_DOZE_BITS | GPR8_STOP_MODE_BITS;
     IOMUXC_GPR->GPR12 = GPR12_DOZE_BITS | GPR12_STOP_MODE_BITS;
-    while ((IOMUXC_GPR->GPR4 & GPR4_STOP_ACK_BITS) != GPR4_STOP_ACK_BITS)
-    {
-    }
-    while ((IOMUXC_GPR->GPR7 & GPR7_STOP_ACK_BITS) != GPR7_STOP_ACK_BITS)
-    {
-    }
+    while ((IOMUXC_GPR->GPR4 & GPR4_STOP_ACK_BITS) != GPR4_STOP_ACK_BITS) {}
+    while ((IOMUXC_GPR->GPR7 & GPR7_STOP_ACK_BITS) != GPR7_STOP_ACK_BITS) {}
 }
 
 void PowerDownUSBPHY(void)
@@ -1215,17 +1292,18 @@ void PowerDownUSBPHY(void)
     USBPHY2->CTRL = 0xFFFFFFFF;
 }
 
-void LPM_EnterLowPowerRun(){
+void LPM_EnterLowPowerRun()
+{
     /* Switch DCDC to use DCDC internal OSC */
-   // DCDC_SetClockSource(DCDC, kDCDC_ClockInternalOsc);
+    // DCDC_SetClockSource(DCDC, kDCDC_ClockInternalOsc);
 
     CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
 
     /* OSC_CLK (24M) */
     CLOCK_SetMux(kCLOCK_PeriphClk2Mux,
-                 1); //CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
+                 1); // CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
     /* PERIPH_CLK2_SEL */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     //CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1); // CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* SET AHB, IPG to 12MHz */
     CLOCK_SetDiv(kCLOCK_IpgDiv, 0);
@@ -1256,7 +1334,6 @@ void LPM_EnterLowPowerRun(){
     EnableWeakLDO();
     DisableRegularLDO();
     BandgapOff();
-
 }
 
 /*
@@ -1270,64 +1347,63 @@ status_t BOARD_InitSEMC(void)
     uint32_t clockFrq = CLOCK_GetFreq(kCLOCK_SemcClk);
 
     */
-/* Initializes the MAC configure structure to zero. *//*
-
-    memset(&config, 0, sizeof(semc_config_t));
-    memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));
-
-    */
-/* Initialize SEMC. *//*
-
-    SEMC_GetDefaultConfig(&config);
-    config.dqsMode = kSEMC_Loopbackdqspad; */
-/* For more accurate timing. *//*
-
-    SEMC_Init(SEMC, &config);
-
-    */
-/* Configure SDRAM. *//*
-
-    sdramconfig.csxPinMux           = kSEMC_MUXCSX0;
-    sdramconfig.address             = 0x80000000;
-    sdramconfig.memsize_kbytes      = 16 * 1024; */
-/* 16MB = 32*1024*1KBytes*//*
-
-    sdramconfig.portSize            = kSEMC_PortSize16Bit;
-    sdramconfig.burstLen            = kSEMC_Sdram_BurstLen8;
-    sdramconfig.columnAddrBitNum    = kSEMC_SdramColunm_9bit;
-    sdramconfig.casLatency          = kSEMC_LatencyThree;
-    sdramconfig.tPrecharge2Act_Ns   = 18; */
-/* Trp 18ns *//*
-
-    sdramconfig.tAct2ReadWrite_Ns   = 18; */
-/* Trcd 18ns *//*
-
-    sdramconfig.tRefreshRecovery_Ns = 67; */
-/* Use the maximum of the (Trfc , Txsr). *//*
-
-    sdramconfig.tWriteRecovery_Ns   = 12; */
-/* 12ns *//*
-
-    sdramconfig.tCkeOff_Ns =
-            42; */
-/* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*//*
-
-    sdramconfig.tAct2Prechage_Ns       = 42; */
-/* Tras 42ns *//*
-
-    sdramconfig.tSelfRefRecovery_Ns    = 67;
-    sdramconfig.tRefresh2Refresh_Ns    = 60;
-    sdramconfig.tAct2Act_Ns            = 60;
-    sdramconfig.tPrescalePeriod_Ns     = 160 * (1000000000 / clockFrq);
-    sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; */
-/* 64ms/8192 *//*
-
-    sdramconfig.refreshUrgThreshold    = sdramconfig.refreshPeriod_nsPerRow;
-    sdramconfig.refreshBurstLen        = 1;
-    return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq);
-}
-*/
+/* Initializes the MAC configure structure to zero. */                                              /*
+                                             
+                                                  memset(&config, 0, sizeof(semc_config_t));
+                                                  memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));
+                                             
+                                                  */
+/* Initialize SEMC. */                                                                              /*
+                                                                             
+                                                                                  SEMC_GetDefaultConfig(&config);
+                                                                                  config.dqsMode = kSEMC_Loopbackdqspad; */
+/* For more accurate timing. */                                                                     /*
+                                                                    
+                                                                         SEMC_Init(SEMC, &config);
+                                                                    
+                                                                         */
+/* Configure SDRAM. */                                                                              /*
+                                                                             
+                                                                                  sdramconfig.csxPinMux           = kSEMC_MUXCSX0;
+                                                                                  sdramconfig.address             = 0x80000000;
+                                                                                  sdramconfig.memsize_kbytes      = 16 * 1024; */
+/* 16MB = 32*1024*1KBytes*/                                                                         /*
+                                                                        
+                                                                             sdramconfig.portSize            = kSEMC_PortSize16Bit;
+                                                                             sdramconfig.burstLen            = kSEMC_Sdram_BurstLen8;
+                                                                             sdramconfig.columnAddrBitNum    = kSEMC_SdramColunm_9bit;
+                                                                             sdramconfig.casLatency          = kSEMC_LatencyThree;
+                                                                             sdramconfig.tPrecharge2Act_Ns   = 18; */
+/* Trp 18ns */                                                                                      /*
+                                                                                     
+                                                                                          sdramconfig.tAct2ReadWrite_Ns   = 18; */
+/* Trcd 18ns */                                                                                     /*
+                                                                                    
+                                                                                         sdramconfig.tRefreshRecovery_Ns = 67; */
+/* Use the maximum of the (Trfc , Txsr). */                                                         /*
+                                                        
+                                                             sdramconfig.tWriteRecovery_Ns   = 12; */
+/* 12ns */                                                                                          /*
+                                                                                         
+                                                                                              sdramconfig.tCkeOff_Ns =
+                                                                                                      42; */
+/* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/ /*
 
+     sdramconfig.tAct2Prechage_Ns       = 42; */
+/* Tras 42ns */                                                                                     /*
+                                                                                    
+                                                                                         sdramconfig.tSelfRefRecovery_Ns    = 67;
+                                                                                         sdramconfig.tRefresh2Refresh_Ns    = 60;
+                                                                                         sdramconfig.tAct2Act_Ns            = 60;
+                                                                                         sdramconfig.tPrescalePeriod_Ns     = 160 * (1000000000 / clockFrq);
+                                                                                         sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; */
+/* 64ms/8192 */                                                                                     /*
+                                                                                    
+                                                                                         sdramconfig.refreshUrgThreshold    = sdramconfig.refreshPeriod_nsPerRow;
+                                                                                         sdramconfig.refreshBurstLen        = 1;
+                                                                                         return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq);
+                                                                                     }
+                                                                                     */
 
 void LPM_EnterFullSpeed(void)
 {
@@ -1357,37 +1433,36 @@ void LPM_EnterFullSpeed(void)
     /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
     /* OSC_CLK (24M) */
     CLOCK_SetMux(kCLOCK_PeriphClk2Mux,
-                 1); //CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
+                 1); // CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
     /* PERIPH_CLK2_SEL */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     //CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1); // CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* Set AHB_PODF. */
-    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);    //CBCDR
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0); // CBCDR
 
     /* Set IPG_PODF. */
     /* AHB_CLK/4 */
-    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);    //CBCDR
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3); // CBCDR
 
     /* Set ARM_PODF. */
     /* PLL1/2 (864MHz / 2 = 432 MHz) */
-    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);    //CACRR
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1); // CACRR
 
     /* Set PERCLK_PODF. */
     /* IPG_CLK_ROOT/2 */
-    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);    //CSCMR1
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); // CSCMR1
     /* Set per clock source. */
-    CLOCK_SetMux(kCLOCK_PerclkMux, 0);    //CSCMR1  (6) 0 - ipg_clk_root, 1 - osc_clk - PIT, GPT
-
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0); // CSCMR1  (6) 0 - ipg_clk_root, 1 - osc_clk - PIT, GPT
 
     clkPLL2setup(CLK_ENABLE);
-    CLOCK_SetMux(kCLOCK_SemcMux,1);
+    CLOCK_SetMux(kCLOCK_SemcMux, 1);
 
     /* Set preperiph clock source. */
     /* PLL1/2 = 432MHz */
-    CLOCK_SetMux(kCLOCK_PrePeriphMux, 0);        //CBCMR  (19-18) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL1
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 0); // CBCMR  (19-18) 0 - PLL2, 1 - PLL2_PFD2, 2 - PLL2_PFD0, 3 - PLL1
     /* Set periph clock source. */
     /* PRE_PERIPH_CLK <- PLL1/2 = 432MHz */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 0);            //CBCDR  (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0); // CBCDR  (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* Adjust SOC voltage to 1.15V */
     DCDC_AdjustTargetVoltage(DCDC, 0xe, 0x1);
@@ -1404,15 +1479,15 @@ void LPM_EnterLowPowerIdle(void)
     PGC->MEGA_CTRL &= ~PGC_MEGA_CTRL_PCR_MASK;
 
     LPM_SetWaitModeConfig();
-    //SetLowPowerClockGate();
+    // SetLowPowerClockGate();
 
     CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
 
     /* OSC_CLK (24M) */
     CLOCK_SetMux(kCLOCK_PeriphClk2Mux,
-                 1); //CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
+                 1); // CBCMR (13-12) 0 - pll3_sw_clk, 1 - osc_clk (pll1_ref_clk), 2 - pll2_bypass_clk, 3 - reserved
     /* PERIPH_CLK2_SEL */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     //CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1); // CBCDR (25) 0 - pre_periph_clk_sel, 1 - periph_clk2_clk_divided
 
     /* SET AHB, IPG to 12MHz */
     CLOCK_SetDiv(kCLOCK_IpgDiv, 0);
@@ -1445,11 +1520,10 @@ void LPM_EnterLowPowerIdle(void)
     /* Connect vdd_high_in and connect vdd_snvs_in */
     PMU->MISC0_CLR = PMU_MISC0_DISCON_HIGH_SNVS_MASK;
 
-
     EnableWeakLDO();
     DisableRegularLDO();
     BandgapOff();
 
-    CLOCK_SetMux(kCLOCK_SemcMux,0);
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
     clkPLL2setup(CLK_DISABLE);
 }
diff --git a/module-bsp/board/rt1051/common/clock_config.h b/module-bsp/board/rt1051/common/clock_config.h
index a63c8540d..af4da134d 100644
--- a/module-bsp/board/rt1051/common/clock_config.h
+++ b/module-bsp/board/rt1051/common/clock_config.h
@@ -38,22 +38,23 @@
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
 
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
 /*******************************************************************************
  ************************ BOARD_InitBootClocks function ************************
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus*/
 
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
+    /*!
+     * @brief This function executes default configuration of clocks.
+     *
+     */
+    void BOARD_InitBootClocks(void);
 
 #if defined(__cplusplus)
 }
@@ -63,94 +64,95 @@ void BOARD_InitBootClocks(void);
  * API for BOARD_BootClockRUN configuration
  ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus*/
 
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockRUN(void);
+    /*!
+     * @brief This function executes configuration of clocks.
+     *
+     */
+    void BOARD_BootClockRUN(void);
 
-#define CLK_INSTANCE_ALL	0
-#define CLK_ENABLE			1
-#define CLK_DISABLE			0
+#define CLK_INSTANCE_ALL 0
+#define CLK_ENABLE       1
+#define CLK_DISABLE      0
 
-/* ADC */
-void clkADCsetup( uint8_t instance, uint8_t enabled );
-/* XBAR */
-void clkXBARsetup( uint8_t instance, uint8_t enabled );
-/* GPT */
-void clkGPTsetup( uint8_t instance, uint8_t enabled );
-/* PIT */
-void clkPITsetup( uint8_t instance, uint8_t enabled );
-/* USDHC */
-void clkUSDHCsetup( uint8_t instance, uint8_t enabled );
-/* FLEXSPI */
-void clkFLEXSPIsetup( uint8_t instance, uint8_t enabled );
-/* CSI */
-void clkCSIsetup( uint8_t instance, uint8_t enabled );
-/* LPSPI */
-void clkLPSPICsetup( uint8_t instance, uint8_t enabled );
-/* TRACE */
-void clkTRACEsetup( uint8_t instance, uint8_t enabled );
-/* SAI */
-void clkSAIsetup( uint8_t instance, uint8_t enabled );
-/* LPI2C */
-void clkLPI2Csetup( uint8_t instance, uint8_t enabled );
-/* CAN */
-void clkCANsetup( uint8_t instance, uint8_t enabled );
-/* LPUART */
-void clkLPUARTsetup( uint8_t instance, uint8_t enabled );
-/* LCDIF */
-void clkLCDIFsetup( uint8_t instance, uint8_t enabled );
-/* SPDIF */
-void clkSPDIFsetup( uint8_t instance, uint8_t enabled );
-/* FLEXIO */
-void clkFLEXIOsetup( uint8_t instance, uint8_t enabled );
+    /* ADC */
+    void clkADCsetup(uint8_t instance, uint8_t enabled);
+    /* XBAR */
+    void clkXBARsetup(uint8_t instance, uint8_t enabled);
+    /* GPT */
+    void clkGPTsetup(uint8_t instance, uint8_t enabled);
+    /* PIT */
+    void clkPITsetup(uint8_t instance, uint8_t enabled);
+    /* USDHC */
+    void clkUSDHCsetup(uint8_t instance, uint8_t enabled);
+    /* FLEXSPI */
+    void clkFLEXSPIsetup(uint8_t instance, uint8_t enabled);
+    /* CSI */
+    void clkCSIsetup(uint8_t instance, uint8_t enabled);
+    /* LPSPI */
+    void clkLPSPICsetup(uint8_t instance, uint8_t enabled);
+    /* TRACE */
+    void clkTRACEsetup(uint8_t instance, uint8_t enabled);
+    /* SAI */
+    void clkSAIsetup(uint8_t instance, uint8_t enabled);
+    /* LPI2C */
+    void clkLPI2Csetup(uint8_t instance, uint8_t enabled);
+    /* CAN */
+    void clkCANsetup(uint8_t instance, uint8_t enabled);
+    /* LPUART */
+    void clkLPUARTsetup(uint8_t instance, uint8_t enabled);
+    /* LCDIF */
+    void clkLCDIFsetup(uint8_t instance, uint8_t enabled);
+    /* SPDIF */
+    void clkSPDIFsetup(uint8_t instance, uint8_t enabled);
+    /* FLEXIO */
+    void clkFLEXIOsetup(uint8_t instance, uint8_t enabled);
 
-void clkPLL1setup( uint8_t enabled );
+    void clkPLL1setup(uint8_t enabled);
 
-void clkPLL2setup( uint8_t enabled );
-void clkPLL2_PFD0setup( uint8_t enabled );
-void clkPLL2_PFD1setup( uint8_t enabled );
-void clkPLL2_PFD2setup( uint8_t enabled );
-void clkPLL2_PFD3setup( uint8_t enabled );
+    void clkPLL2setup(uint8_t enabled);
+    void clkPLL2_PFD0setup(uint8_t enabled);
+    void clkPLL2_PFD1setup(uint8_t enabled);
+    void clkPLL2_PFD2setup(uint8_t enabled);
+    void clkPLL2_PFD3setup(uint8_t enabled);
 
-void clkPLL3setup( uint8_t enabled );
-void clkPLL3_PFD0setup( uint8_t enabled );
-void clkPLL3_PFD1setup( uint8_t enabled );
-void clkPLL3_PFD2setup( uint8_t enabled );
-void clkPLL3_PFD3setup( uint8_t enabled );
+    void clkPLL3setup(uint8_t enabled);
+    void clkPLL3_PFD0setup(uint8_t enabled);
+    void clkPLL3_PFD1setup(uint8_t enabled);
+    void clkPLL3_PFD2setup(uint8_t enabled);
+    void clkPLL3_PFD3setup(uint8_t enabled);
 
-void clkPLL4setup( uint8_t enabled );
+    void clkPLL4setup(uint8_t enabled);
 
-void clkPLL5setup( uint8_t enabled );
+    void clkPLL5setup(uint8_t enabled);
 
-void clkPLL6setup( uint8_t enabled );
+    void clkPLL6setup(uint8_t enabled);
 
-void clkPLL7setup( uint8_t enabled );
+    void clkPLL7setup(uint8_t enabled);
 
-typedef enum{
-    PerphClock_I2C,
-    PerphClock_LPSPI,
-    PerphClock_LPUART,
-    PerphClock_SAI1,
-    PerphClock_SAI2,
-    PerphClock_USDHC2,
+    typedef enum
+    {
+        PerphClock_I2C,
+        PerphClock_LPSPI,
+        PerphClock_LPUART,
+        PerphClock_SAI1,
+        PerphClock_SAI2,
+        PerphClock_USDHC2,
 
-}PerphClock_t;
+    } PerphClock_t;
 
-uint32_t GetPerphSourceClock(PerphClock_t clock);
-void PrintSystemClocks();
+    uint32_t GetPerphSourceClock(PerphClock_t clock);
+    void PrintSystemClocks();
 
-void LPM_EnterFullSpeed(void);
-void LPM_EnterLowPowerRun();
-void LPM_EnterLowPowerIdle(void);
+    void LPM_EnterFullSpeed(void);
+    void LPM_EnterLowPowerRun();
+    void LPM_EnterLowPowerIdle(void);
 
 #if defined(__cplusplus)
 }
 #endif /* __cplusplus*/
 
 #endif /* _CLOCK_CONFIG_H_ */
-
diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h b/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h
index af465b4aa..3a21ea4d9 100644
--- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h
+++ b/module-bsp/board/rt1051/common/cmsis/MIMXRT1051.h
@@ -71,7 +71,7 @@
  */
 
 #ifndef _MIMXRT1051_H_
-#define _MIMXRT1051_H_                           /**< Symbol preventing repeated inclusion */
+#define _MIMXRT1051_H_ /**< Symbol preventing repeated inclusion */
 
 /** Memory map major version (memory maps with equal major version number are
  * compatible) */
@@ -79,7 +79,6 @@
 /** Memory map minor version */
 #define MCU_MEM_MAP_VERSION_MINOR 0x0001U
 
-
 /* ----------------------------------------------------------------------------
    -- Interrupt vector numbers
    ---------------------------------------------------------------------------- */
@@ -90,191 +89,191 @@
  */
 
 /** Interrupt Number Definitions */
-#define NUMBER_OF_INT_VECTORS 176                /**< Number of interrupts in the Vector table */
+#define NUMBER_OF_INT_VECTORS 176 /**< Number of interrupts in the Vector table */
 
-typedef enum IRQn {
-  /* Auxiliary constants */
-  NotAvail_IRQn                = -128,             /**< Not available device specific interrupt */
+typedef enum IRQn
+{
+    /* Auxiliary constants */
+    NotAvail_IRQn = -128, /**< Not available device specific interrupt */
 
-  /* Core interrupts */
-  NonMaskableInt_IRQn          = -14,              /**< Non Maskable Interrupt */
-  HardFault_IRQn               = -13,              /**< Cortex-M7 SV Hard Fault Interrupt */
-  MemoryManagement_IRQn        = -12,              /**< Cortex-M7 Memory Management Interrupt */
-  BusFault_IRQn                = -11,              /**< Cortex-M7 Bus Fault Interrupt */
-  UsageFault_IRQn              = -10,              /**< Cortex-M7 Usage Fault Interrupt */
-  SVCall_IRQn                  = -5,               /**< Cortex-M7 SV Call Interrupt */
-  DebugMonitor_IRQn            = -4,               /**< Cortex-M7 Debug Monitor Interrupt */
-  PendSV_IRQn                  = -2,               /**< Cortex-M7 Pend SV Interrupt */
-  SysTick_IRQn                 = -1,               /**< Cortex-M7 System Tick Interrupt */
+    /* Core interrupts */
+    NonMaskableInt_IRQn   = -14, /**< Non Maskable Interrupt */
+    HardFault_IRQn        = -13, /**< Cortex-M7 SV Hard Fault Interrupt */
+    MemoryManagement_IRQn = -12, /**< Cortex-M7 Memory Management Interrupt */
+    BusFault_IRQn         = -11, /**< Cortex-M7 Bus Fault Interrupt */
+    UsageFault_IRQn       = -10, /**< Cortex-M7 Usage Fault Interrupt */
+    SVCall_IRQn           = -5,  /**< Cortex-M7 SV Call Interrupt */
+    DebugMonitor_IRQn     = -4,  /**< Cortex-M7 Debug Monitor Interrupt */
+    PendSV_IRQn           = -2,  /**< Cortex-M7 Pend SV Interrupt */
+    SysTick_IRQn          = -1,  /**< Cortex-M7 System Tick Interrupt */
 
-  /* Device specific interrupts */
-  DMA0_DMA16_IRQn              = 0,                /**< DMA channel 0/16 transfer complete */
-  DMA1_DMA17_IRQn              = 1,                /**< DMA channel 1/17 transfer complete */
-  DMA2_DMA18_IRQn              = 2,                /**< DMA channel 2/18 transfer complete */
-  DMA3_DMA19_IRQn              = 3,                /**< DMA channel 3/19 transfer complete */
-  DMA4_DMA20_IRQn              = 4,                /**< DMA channel 4/20 transfer complete */
-  DMA5_DMA21_IRQn              = 5,                /**< DMA channel 5/21 transfer complete */
-  DMA6_DMA22_IRQn              = 6,                /**< DMA channel 6/22 transfer complete */
-  DMA7_DMA23_IRQn              = 7,                /**< DMA channel 7/23 transfer complete */
-  DMA8_DMA24_IRQn              = 8,                /**< DMA channel 8/24 transfer complete */
-  DMA9_DMA25_IRQn              = 9,                /**< DMA channel 9/25 transfer complete */
-  DMA10_DMA26_IRQn             = 10,               /**< DMA channel 10/26 transfer complete */
-  DMA11_DMA27_IRQn             = 11,               /**< DMA channel 11/27 transfer complete */
-  DMA12_DMA28_IRQn             = 12,               /**< DMA channel 12/28 transfer complete */
-  DMA13_DMA29_IRQn             = 13,               /**< DMA channel 13/29 transfer complete */
-  DMA14_DMA30_IRQn             = 14,               /**< DMA channel 14/30 transfer complete */
-  DMA15_DMA31_IRQn             = 15,               /**< DMA channel 15/31 transfer complete */
-  DMA_ERROR_IRQn               = 16,               /**< DMA error interrupt channels 0-15 / 16-31 */
-  CTI0_ERROR_IRQn              = 17,               /**< CTI0_Error */
-  CTI1_ERROR_IRQn              = 18,               /**< CTI1_Error */
-  CORE_IRQn                    = 19,               /**< CorePlatform exception IRQ */
-  LPUART1_IRQn                 = 20,               /**< LPUART1 TX interrupt and RX interrupt */
-  LPUART2_IRQn                 = 21,               /**< LPUART2 TX interrupt and RX interrupt */
-  LPUART3_IRQn                 = 22,               /**< LPUART3 TX interrupt and RX interrupt */
-  LPUART4_IRQn                 = 23,               /**< LPUART4 TX interrupt and RX interrupt */
-  LPUART5_IRQn                 = 24,               /**< LPUART5 TX interrupt and RX interrupt */
-  LPUART6_IRQn                 = 25,               /**< LPUART6 TX interrupt and RX interrupt */
-  LPUART7_IRQn                 = 26,               /**< LPUART7 TX interrupt and RX interrupt */
-  LPUART8_IRQn                 = 27,               /**< LPUART8 TX interrupt and RX interrupt */
-  LPI2C1_IRQn                  = 28,               /**< LPI2C1 interrupt */
-  LPI2C2_IRQn                  = 29,               /**< LPI2C2 interrupt */
-  LPI2C3_IRQn                  = 30,               /**< LPI2C3 interrupt */
-  LPI2C4_IRQn                  = 31,               /**< LPI2C4 interrupt */
-  LPSPI1_IRQn                  = 32,               /**< LPSPI1 single interrupt vector for all sources */
-  LPSPI2_IRQn                  = 33,               /**< LPSPI2 single interrupt vector for all sources */
-  LPSPI3_IRQn                  = 34,               /**< LPSPI3 single interrupt vector for all sources */
-  LPSPI4_IRQn                  = 35,               /**< LPSPI4  single interrupt vector for all sources */
-  CAN1_IRQn                    = 36,               /**< CAN1 interrupt */
-  CAN2_IRQn                    = 37,               /**< CAN2 interrupt */
-  FLEXRAM_IRQn                 = 38,               /**< FlexRAM address out of range Or access hit IRQ */
-  KPP_IRQn                     = 39,               /**< Keypad nterrupt */
-  TSC_DIG_IRQn                 = 40,               /**< TSC interrupt */
-  GPR_IRQ_IRQn                 = 41,               /**< GPR interrupt */
-  Reserved58_IRQn              = 42,               /**< Reserved interrupt */
-  Reserved59_IRQn              = 43,               /**< Reserved interrupt */
-  Reserved60_IRQn              = 44,               /**< Reserved interrupt */
-  WDOG2_IRQn                   = 45,               /**< WDOG2 interrupt */
-  SNVS_HP_WRAPPER_IRQn         = 46,               /**< SRTC Consolidated Interrupt. Non TZ */
-  SNVS_HP_WRAPPER_TZ_IRQn      = 47,               /**< SRTC Security Interrupt. TZ */
-  SNVS_LP_WRAPPER_IRQn         = 48,               /**< ON-OFF button press shorter than 5 secs (pulse event) */
-  CSU_IRQn                     = 49,               /**< CSU interrupt */
-  DCP_IRQn                     = 50,               /**< DCP_IRQ interrupt */
-  DCP_VMI_IRQn                 = 51,               /**< DCP_VMI_IRQ interrupt */
-  Reserved68_IRQn              = 52,               /**< Reserved interrupt */
-  TRNG_IRQn                    = 53,               /**< TRNG interrupt */
-  SJC_IRQn                     = 54,               /**< SJC interrupt */
-  BEE_IRQn                     = 55,               /**< BEE interrupt */
-  SAI1_IRQn                    = 56,               /**< SAI1 interrupt */
-  SAI2_IRQn                    = 57,               /**< SAI1 interrupt */
-  SAI3_RX_IRQn                 = 58,               /**< SAI3 interrupt */
-  SAI3_TX_IRQn                 = 59,               /**< SAI3 interrupt */
-  SPDIF_IRQn                   = 60,               /**< SPDIF interrupt */
-  ANATOP_EVENT0_IRQn           = 61,               /**< ANATOP interrupt */
-  ANATOP_EVENT1_IRQn           = 62,               /**< ANATOP interrupt */
-  ANATOP_TAMP_LOW_HIGH_IRQn    = 63,               /**< ANATOP interrupt */
-  ANATOP_TEMP_PANIC_IRQn       = 64,               /**< ANATOP interrupt */
-  USB_PHY1_IRQn                = 65,               /**< USBPHY (UTMI0), Interrupt */
-  USB_PHY2_IRQn                = 66,               /**< USBPHY (UTMI0), Interrupt */
-  ADC1_IRQn                    = 67,               /**< ADC1 interrupt */
-  ADC2_IRQn                    = 68,               /**< ADC2 interrupt */
-  DCDC_IRQn                    = 69,               /**< DCDC interrupt */
-  Reserved86_IRQn              = 70,               /**< Reserved interrupt */
-  Reserved87_IRQn              = 71,               /**< Reserved interrupt */
-  GPIO1_INT0_IRQn              = 72,               /**< Active HIGH Interrupt from INT0 from GPIO */
-  GPIO1_INT1_IRQn              = 73,               /**< Active HIGH Interrupt from INT1 from GPIO */
-  GPIO1_INT2_IRQn              = 74,               /**< Active HIGH Interrupt from INT2 from GPIO */
-  GPIO1_INT3_IRQn              = 75,               /**< Active HIGH Interrupt from INT3 from GPIO */
-  GPIO1_INT4_IRQn              = 76,               /**< Active HIGH Interrupt from INT4 from GPIO */
-  GPIO1_INT5_IRQn              = 77,               /**< Active HIGH Interrupt from INT5 from GPIO */
-  GPIO1_INT6_IRQn              = 78,               /**< Active HIGH Interrupt from INT6 from GPIO */
-  GPIO1_INT7_IRQn              = 79,               /**< Active HIGH Interrupt from INT7 from GPIO */
-  GPIO1_Combined_0_15_IRQn     = 80,               /**< Combined interrupt indication for GPIO1 signal 0 throughout 15 */
-  GPIO1_Combined_16_31_IRQn    = 81,               /**< Combined interrupt indication for GPIO1 signal 16 throughout 31 */
-  GPIO2_Combined_0_15_IRQn     = 82,               /**< Combined interrupt indication for GPIO2 signal 0 throughout 15 */
-  GPIO2_Combined_16_31_IRQn    = 83,               /**< Combined interrupt indication for GPIO2 signal 16 throughout 31 */
-  GPIO3_Combined_0_15_IRQn     = 84,               /**< Combined interrupt indication for GPIO3 signal 0 throughout 15 */
-  GPIO3_Combined_16_31_IRQn    = 85,               /**< Combined interrupt indication for GPIO3 signal 16 throughout 31 */
-  GPIO4_Combined_0_15_IRQn     = 86,               /**< Combined interrupt indication for GPIO4 signal 0 throughout 15 */
-  GPIO4_Combined_16_31_IRQn    = 87,               /**< Combined interrupt indication for GPIO4 signal 16 throughout 31 */
-  GPIO5_Combined_0_15_IRQn     = 88,               /**< Combined interrupt indication for GPIO5 signal 0 throughout 15 */
-  GPIO5_Combined_16_31_IRQn    = 89,               /**< Combined interrupt indication for GPIO5 signal 16 throughout 31 */
-  FLEXIO1_IRQn                 = 90,               /**< FLEXIO1 interrupt */
-  FLEXIO2_IRQn                 = 91,               /**< FLEXIO2 interrupt */
-  WDOG1_IRQn                   = 92,               /**< WDOG1 interrupt */
-  RTWDOG_IRQn                  = 93,               /**< RTWDOG interrupt */
-  EWM_IRQn                     = 94,               /**< EWM interrupt */
-  CCM_1_IRQn                   = 95,               /**< CCM IRQ1 interrupt */
-  CCM_2_IRQn                   = 96,               /**< CCM IRQ2 interrupt */
-  GPC_IRQn                     = 97,               /**< GPC interrupt */
-  SRC_IRQn                     = 98,               /**< SRC interrupt */
-  Reserved115_IRQn             = 99,               /**< Reserved interrupt */
-  GPT1_IRQn                    = 100,              /**< GPT1 interrupt */
-  GPT2_IRQn                    = 101,              /**< GPT2 interrupt */
-  PWM1_0_IRQn                  = 102,              /**< PWM1 capture 0, compare 0, or reload 0 interrupt */
-  PWM1_1_IRQn                  = 103,              /**< PWM1 capture 1, compare 1, or reload 0 interrupt */
-  PWM1_2_IRQn                  = 104,              /**< PWM1 capture 2, compare 2, or reload 0 interrupt */
-  PWM1_3_IRQn                  = 105,              /**< PWM1 capture 3, compare 3, or reload 0 interrupt */
-  PWM1_FAULT_IRQn              = 106,              /**< PWM1 fault or reload error interrupt */
-  Reserved123_IRQn             = 107,              /**< Reserved interrupt */
-  FLEXSPI_IRQn                 = 108,              /**< FlexSPI0 interrupt */
-  SEMC_IRQn                    = 109,              /**< Reserved interrupt */
-  USDHC1_IRQn                  = 110,              /**< USDHC1 interrupt */
-  USDHC2_IRQn                  = 111,              /**< USDHC2 interrupt */
-  USB_OTG2_IRQn                = 112,              /**< USBO2 USB OTG2 */
-  USB_OTG1_IRQn                = 113,              /**< USBO2 USB OTG1 */
-  ENET_IRQn                    = 114,              /**< ENET interrupt */
-  ENET_1588_Timer_IRQn         = 115,              /**< ENET_1588_Timer interrupt */
-  XBAR1_IRQ_0_1_IRQn           = 116,              /**< XBAR1 interrupt */
-  XBAR1_IRQ_2_3_IRQn           = 117,              /**< XBAR1 interrupt */
-  ADC_ETC_IRQ0_IRQn            = 118,              /**< ADCETC IRQ0 interrupt */
-  ADC_ETC_IRQ1_IRQn            = 119,              /**< ADCETC IRQ1 interrupt */
-  ADC_ETC_IRQ2_IRQn            = 120,              /**< ADCETC IRQ2 interrupt */
-  ADC_ETC_ERROR_IRQ_IRQn       = 121,              /**< ADCETC Error IRQ interrupt */
-  PIT_IRQn                     = 122,              /**< PIT interrupt */
-  ACMP1_IRQn                   = 123,              /**< ACMP interrupt */
-  ACMP2_IRQn                   = 124,              /**< ACMP interrupt */
-  ACMP3_IRQn                   = 125,              /**< ACMP interrupt */
-  ACMP4_IRQn                   = 126,              /**< ACMP interrupt */
-  Reserved143_IRQn             = 127,              /**< Reserved interrupt */
-  Reserved144_IRQn             = 128,              /**< Reserved interrupt */
-  ENC1_IRQn                    = 129,              /**< ENC1 interrupt */
-  ENC2_IRQn                    = 130,              /**< ENC2 interrupt */
-  ENC3_IRQn                    = 131,              /**< ENC3 interrupt */
-  ENC4_IRQn                    = 132,              /**< ENC4 interrupt */
-  TMR1_IRQn                    = 133,              /**< TMR1 interrupt */
-  TMR2_IRQn                    = 134,              /**< TMR2 interrupt */
-  TMR3_IRQn                    = 135,              /**< TMR3 interrupt */
-  TMR4_IRQn                    = 136,              /**< TMR4 interrupt */
-  PWM2_0_IRQn                  = 137,              /**< PWM2 capture 0, compare 0, or reload 0 interrupt */
-  PWM2_1_IRQn                  = 138,              /**< PWM2 capture 1, compare 1, or reload 0 interrupt */
-  PWM2_2_IRQn                  = 139,              /**< PWM2 capture 2, compare 2, or reload 0 interrupt */
-  PWM2_3_IRQn                  = 140,              /**< PWM2 capture 3, compare 3, or reload 0 interrupt */
-  PWM2_FAULT_IRQn              = 141,              /**< PWM2 fault or reload error interrupt */
-  PWM3_0_IRQn                  = 142,              /**< PWM3 capture 0, compare 0, or reload 0 interrupt */
-  PWM3_1_IRQn                  = 143,              /**< PWM3 capture 1, compare 1, or reload 0 interrupt */
-  PWM3_2_IRQn                  = 144,              /**< PWM3 capture 2, compare 2, or reload 0 interrupt */
-  PWM3_3_IRQn                  = 145,              /**< PWM3 capture 3, compare 3, or reload 0 interrupt */
-  PWM3_FAULT_IRQn              = 146,              /**< PWM3 fault or reload error interrupt */
-  PWM4_0_IRQn                  = 147,              /**< PWM4 capture 0, compare 0, or reload 0 interrupt */
-  PWM4_1_IRQn                  = 148,              /**< PWM4 capture 1, compare 1, or reload 0 interrupt */
-  PWM4_2_IRQn                  = 149,              /**< PWM4 capture 2, compare 2, or reload 0 interrupt */
-  PWM4_3_IRQn                  = 150,              /**< PWM4 capture 3, compare 3, or reload 0 interrupt */
-  PWM4_FAULT_IRQn              = 151,              /**< PWM4 fault or reload error interrupt */
-  Reserved168_IRQn             = 152,              /**< Reserved interrupt */
-  Reserved169_IRQn             = 153,              /**< Reserved interrupt */
-  Reserved170_IRQn             = 154,              /**< Reserved interrupt */
-  Reserved171_IRQn             = 155,              /**< Reserved interrupt */
-  Reserved172_IRQn             = 156,              /**< Reserved interrupt */
-  Reserved173_IRQn             = 157,              /**< Reserved interrupt */
-  SJC_ARM_DEBUG_IRQn           = 158,              /**< SJC ARM debug interrupt */
-  NMI_WAKEUP_IRQn              = 159               /**< NMI wake up */
+    /* Device specific interrupts */
+    DMA0_DMA16_IRQn           = 0,   /**< DMA channel 0/16 transfer complete */
+    DMA1_DMA17_IRQn           = 1,   /**< DMA channel 1/17 transfer complete */
+    DMA2_DMA18_IRQn           = 2,   /**< DMA channel 2/18 transfer complete */
+    DMA3_DMA19_IRQn           = 3,   /**< DMA channel 3/19 transfer complete */
+    DMA4_DMA20_IRQn           = 4,   /**< DMA channel 4/20 transfer complete */
+    DMA5_DMA21_IRQn           = 5,   /**< DMA channel 5/21 transfer complete */
+    DMA6_DMA22_IRQn           = 6,   /**< DMA channel 6/22 transfer complete */
+    DMA7_DMA23_IRQn           = 7,   /**< DMA channel 7/23 transfer complete */
+    DMA8_DMA24_IRQn           = 8,   /**< DMA channel 8/24 transfer complete */
+    DMA9_DMA25_IRQn           = 9,   /**< DMA channel 9/25 transfer complete */
+    DMA10_DMA26_IRQn          = 10,  /**< DMA channel 10/26 transfer complete */
+    DMA11_DMA27_IRQn          = 11,  /**< DMA channel 11/27 transfer complete */
+    DMA12_DMA28_IRQn          = 12,  /**< DMA channel 12/28 transfer complete */
+    DMA13_DMA29_IRQn          = 13,  /**< DMA channel 13/29 transfer complete */
+    DMA14_DMA30_IRQn          = 14,  /**< DMA channel 14/30 transfer complete */
+    DMA15_DMA31_IRQn          = 15,  /**< DMA channel 15/31 transfer complete */
+    DMA_ERROR_IRQn            = 16,  /**< DMA error interrupt channels 0-15 / 16-31 */
+    CTI0_ERROR_IRQn           = 17,  /**< CTI0_Error */
+    CTI1_ERROR_IRQn           = 18,  /**< CTI1_Error */
+    CORE_IRQn                 = 19,  /**< CorePlatform exception IRQ */
+    LPUART1_IRQn              = 20,  /**< LPUART1 TX interrupt and RX interrupt */
+    LPUART2_IRQn              = 21,  /**< LPUART2 TX interrupt and RX interrupt */
+    LPUART3_IRQn              = 22,  /**< LPUART3 TX interrupt and RX interrupt */
+    LPUART4_IRQn              = 23,  /**< LPUART4 TX interrupt and RX interrupt */
+    LPUART5_IRQn              = 24,  /**< LPUART5 TX interrupt and RX interrupt */
+    LPUART6_IRQn              = 25,  /**< LPUART6 TX interrupt and RX interrupt */
+    LPUART7_IRQn              = 26,  /**< LPUART7 TX interrupt and RX interrupt */
+    LPUART8_IRQn              = 27,  /**< LPUART8 TX interrupt and RX interrupt */
+    LPI2C1_IRQn               = 28,  /**< LPI2C1 interrupt */
+    LPI2C2_IRQn               = 29,  /**< LPI2C2 interrupt */
+    LPI2C3_IRQn               = 30,  /**< LPI2C3 interrupt */
+    LPI2C4_IRQn               = 31,  /**< LPI2C4 interrupt */
+    LPSPI1_IRQn               = 32,  /**< LPSPI1 single interrupt vector for all sources */
+    LPSPI2_IRQn               = 33,  /**< LPSPI2 single interrupt vector for all sources */
+    LPSPI3_IRQn               = 34,  /**< LPSPI3 single interrupt vector for all sources */
+    LPSPI4_IRQn               = 35,  /**< LPSPI4  single interrupt vector for all sources */
+    CAN1_IRQn                 = 36,  /**< CAN1 interrupt */
+    CAN2_IRQn                 = 37,  /**< CAN2 interrupt */
+    FLEXRAM_IRQn              = 38,  /**< FlexRAM address out of range Or access hit IRQ */
+    KPP_IRQn                  = 39,  /**< Keypad nterrupt */
+    TSC_DIG_IRQn              = 40,  /**< TSC interrupt */
+    GPR_IRQ_IRQn              = 41,  /**< GPR interrupt */
+    Reserved58_IRQn           = 42,  /**< Reserved interrupt */
+    Reserved59_IRQn           = 43,  /**< Reserved interrupt */
+    Reserved60_IRQn           = 44,  /**< Reserved interrupt */
+    WDOG2_IRQn                = 45,  /**< WDOG2 interrupt */
+    SNVS_HP_WRAPPER_IRQn      = 46,  /**< SRTC Consolidated Interrupt. Non TZ */
+    SNVS_HP_WRAPPER_TZ_IRQn   = 47,  /**< SRTC Security Interrupt. TZ */
+    SNVS_LP_WRAPPER_IRQn      = 48,  /**< ON-OFF button press shorter than 5 secs (pulse event) */
+    CSU_IRQn                  = 49,  /**< CSU interrupt */
+    DCP_IRQn                  = 50,  /**< DCP_IRQ interrupt */
+    DCP_VMI_IRQn              = 51,  /**< DCP_VMI_IRQ interrupt */
+    Reserved68_IRQn           = 52,  /**< Reserved interrupt */
+    TRNG_IRQn                 = 53,  /**< TRNG interrupt */
+    SJC_IRQn                  = 54,  /**< SJC interrupt */
+    BEE_IRQn                  = 55,  /**< BEE interrupt */
+    SAI1_IRQn                 = 56,  /**< SAI1 interrupt */
+    SAI2_IRQn                 = 57,  /**< SAI1 interrupt */
+    SAI3_RX_IRQn              = 58,  /**< SAI3 interrupt */
+    SAI3_TX_IRQn              = 59,  /**< SAI3 interrupt */
+    SPDIF_IRQn                = 60,  /**< SPDIF interrupt */
+    ANATOP_EVENT0_IRQn        = 61,  /**< ANATOP interrupt */
+    ANATOP_EVENT1_IRQn        = 62,  /**< ANATOP interrupt */
+    ANATOP_TAMP_LOW_HIGH_IRQn = 63,  /**< ANATOP interrupt */
+    ANATOP_TEMP_PANIC_IRQn    = 64,  /**< ANATOP interrupt */
+    USB_PHY1_IRQn             = 65,  /**< USBPHY (UTMI0), Interrupt */
+    USB_PHY2_IRQn             = 66,  /**< USBPHY (UTMI0), Interrupt */
+    ADC1_IRQn                 = 67,  /**< ADC1 interrupt */
+    ADC2_IRQn                 = 68,  /**< ADC2 interrupt */
+    DCDC_IRQn                 = 69,  /**< DCDC interrupt */
+    Reserved86_IRQn           = 70,  /**< Reserved interrupt */
+    Reserved87_IRQn           = 71,  /**< Reserved interrupt */
+    GPIO1_INT0_IRQn           = 72,  /**< Active HIGH Interrupt from INT0 from GPIO */
+    GPIO1_INT1_IRQn           = 73,  /**< Active HIGH Interrupt from INT1 from GPIO */
+    GPIO1_INT2_IRQn           = 74,  /**< Active HIGH Interrupt from INT2 from GPIO */
+    GPIO1_INT3_IRQn           = 75,  /**< Active HIGH Interrupt from INT3 from GPIO */
+    GPIO1_INT4_IRQn           = 76,  /**< Active HIGH Interrupt from INT4 from GPIO */
+    GPIO1_INT5_IRQn           = 77,  /**< Active HIGH Interrupt from INT5 from GPIO */
+    GPIO1_INT6_IRQn           = 78,  /**< Active HIGH Interrupt from INT6 from GPIO */
+    GPIO1_INT7_IRQn           = 79,  /**< Active HIGH Interrupt from INT7 from GPIO */
+    GPIO1_Combined_0_15_IRQn  = 80,  /**< Combined interrupt indication for GPIO1 signal 0 throughout 15 */
+    GPIO1_Combined_16_31_IRQn = 81,  /**< Combined interrupt indication for GPIO1 signal 16 throughout 31 */
+    GPIO2_Combined_0_15_IRQn  = 82,  /**< Combined interrupt indication for GPIO2 signal 0 throughout 15 */
+    GPIO2_Combined_16_31_IRQn = 83,  /**< Combined interrupt indication for GPIO2 signal 16 throughout 31 */
+    GPIO3_Combined_0_15_IRQn  = 84,  /**< Combined interrupt indication for GPIO3 signal 0 throughout 15 */
+    GPIO3_Combined_16_31_IRQn = 85,  /**< Combined interrupt indication for GPIO3 signal 16 throughout 31 */
+    GPIO4_Combined_0_15_IRQn  = 86,  /**< Combined interrupt indication for GPIO4 signal 0 throughout 15 */
+    GPIO4_Combined_16_31_IRQn = 87,  /**< Combined interrupt indication for GPIO4 signal 16 throughout 31 */
+    GPIO5_Combined_0_15_IRQn  = 88,  /**< Combined interrupt indication for GPIO5 signal 0 throughout 15 */
+    GPIO5_Combined_16_31_IRQn = 89,  /**< Combined interrupt indication for GPIO5 signal 16 throughout 31 */
+    FLEXIO1_IRQn              = 90,  /**< FLEXIO1 interrupt */
+    FLEXIO2_IRQn              = 91,  /**< FLEXIO2 interrupt */
+    WDOG1_IRQn                = 92,  /**< WDOG1 interrupt */
+    RTWDOG_IRQn               = 93,  /**< RTWDOG interrupt */
+    EWM_IRQn                  = 94,  /**< EWM interrupt */
+    CCM_1_IRQn                = 95,  /**< CCM IRQ1 interrupt */
+    CCM_2_IRQn                = 96,  /**< CCM IRQ2 interrupt */
+    GPC_IRQn                  = 97,  /**< GPC interrupt */
+    SRC_IRQn                  = 98,  /**< SRC interrupt */
+    Reserved115_IRQn          = 99,  /**< Reserved interrupt */
+    GPT1_IRQn                 = 100, /**< GPT1 interrupt */
+    GPT2_IRQn                 = 101, /**< GPT2 interrupt */
+    PWM1_0_IRQn               = 102, /**< PWM1 capture 0, compare 0, or reload 0 interrupt */
+    PWM1_1_IRQn               = 103, /**< PWM1 capture 1, compare 1, or reload 0 interrupt */
+    PWM1_2_IRQn               = 104, /**< PWM1 capture 2, compare 2, or reload 0 interrupt */
+    PWM1_3_IRQn               = 105, /**< PWM1 capture 3, compare 3, or reload 0 interrupt */
+    PWM1_FAULT_IRQn           = 106, /**< PWM1 fault or reload error interrupt */
+    Reserved123_IRQn          = 107, /**< Reserved interrupt */
+    FLEXSPI_IRQn              = 108, /**< FlexSPI0 interrupt */
+    SEMC_IRQn                 = 109, /**< Reserved interrupt */
+    USDHC1_IRQn               = 110, /**< USDHC1 interrupt */
+    USDHC2_IRQn               = 111, /**< USDHC2 interrupt */
+    USB_OTG2_IRQn             = 112, /**< USBO2 USB OTG2 */
+    USB_OTG1_IRQn             = 113, /**< USBO2 USB OTG1 */
+    ENET_IRQn                 = 114, /**< ENET interrupt */
+    ENET_1588_Timer_IRQn      = 115, /**< ENET_1588_Timer interrupt */
+    XBAR1_IRQ_0_1_IRQn        = 116, /**< XBAR1 interrupt */
+    XBAR1_IRQ_2_3_IRQn        = 117, /**< XBAR1 interrupt */
+    ADC_ETC_IRQ0_IRQn         = 118, /**< ADCETC IRQ0 interrupt */
+    ADC_ETC_IRQ1_IRQn         = 119, /**< ADCETC IRQ1 interrupt */
+    ADC_ETC_IRQ2_IRQn         = 120, /**< ADCETC IRQ2 interrupt */
+    ADC_ETC_ERROR_IRQ_IRQn    = 121, /**< ADCETC Error IRQ interrupt */
+    PIT_IRQn                  = 122, /**< PIT interrupt */
+    ACMP1_IRQn                = 123, /**< ACMP interrupt */
+    ACMP2_IRQn                = 124, /**< ACMP interrupt */
+    ACMP3_IRQn                = 125, /**< ACMP interrupt */
+    ACMP4_IRQn                = 126, /**< ACMP interrupt */
+    Reserved143_IRQn          = 127, /**< Reserved interrupt */
+    Reserved144_IRQn          = 128, /**< Reserved interrupt */
+    ENC1_IRQn                 = 129, /**< ENC1 interrupt */
+    ENC2_IRQn                 = 130, /**< ENC2 interrupt */
+    ENC3_IRQn                 = 131, /**< ENC3 interrupt */
+    ENC4_IRQn                 = 132, /**< ENC4 interrupt */
+    TMR1_IRQn                 = 133, /**< TMR1 interrupt */
+    TMR2_IRQn                 = 134, /**< TMR2 interrupt */
+    TMR3_IRQn                 = 135, /**< TMR3 interrupt */
+    TMR4_IRQn                 = 136, /**< TMR4 interrupt */
+    PWM2_0_IRQn               = 137, /**< PWM2 capture 0, compare 0, or reload 0 interrupt */
+    PWM2_1_IRQn               = 138, /**< PWM2 capture 1, compare 1, or reload 0 interrupt */
+    PWM2_2_IRQn               = 139, /**< PWM2 capture 2, compare 2, or reload 0 interrupt */
+    PWM2_3_IRQn               = 140, /**< PWM2 capture 3, compare 3, or reload 0 interrupt */
+    PWM2_FAULT_IRQn           = 141, /**< PWM2 fault or reload error interrupt */
+    PWM3_0_IRQn               = 142, /**< PWM3 capture 0, compare 0, or reload 0 interrupt */
+    PWM3_1_IRQn               = 143, /**< PWM3 capture 1, compare 1, or reload 0 interrupt */
+    PWM3_2_IRQn               = 144, /**< PWM3 capture 2, compare 2, or reload 0 interrupt */
+    PWM3_3_IRQn               = 145, /**< PWM3 capture 3, compare 3, or reload 0 interrupt */
+    PWM3_FAULT_IRQn           = 146, /**< PWM3 fault or reload error interrupt */
+    PWM4_0_IRQn               = 147, /**< PWM4 capture 0, compare 0, or reload 0 interrupt */
+    PWM4_1_IRQn               = 148, /**< PWM4 capture 1, compare 1, or reload 0 interrupt */
+    PWM4_2_IRQn               = 149, /**< PWM4 capture 2, compare 2, or reload 0 interrupt */
+    PWM4_3_IRQn               = 150, /**< PWM4 capture 3, compare 3, or reload 0 interrupt */
+    PWM4_FAULT_IRQn           = 151, /**< PWM4 fault or reload error interrupt */
+    Reserved168_IRQn          = 152, /**< Reserved interrupt */
+    Reserved169_IRQn          = 153, /**< Reserved interrupt */
+    Reserved170_IRQn          = 154, /**< Reserved interrupt */
+    Reserved171_IRQn          = 155, /**< Reserved interrupt */
+    Reserved172_IRQn          = 156, /**< Reserved interrupt */
+    Reserved173_IRQn          = 157, /**< Reserved interrupt */
+    SJC_ARM_DEBUG_IRQn        = 158, /**< SJC ARM debug interrupt */
+    NMI_WAKEUP_IRQn           = 159  /**< NMI wake up */
 } IRQn_Type;
 
 /*!
  * @}
  */ /* end of group Interrupt_vector_numbers */
 
-
 /* ----------------------------------------------------------------------------
    -- Cortex M7 Core Configuration
    ---------------------------------------------------------------------------- */
@@ -284,22 +283,21 @@ typedef enum IRQn {
  * @{
  */
 
-#define __MPU_PRESENT                  1         /**< Defines if an MPU is present or not */
-#define __ICACHE_PRESENT               1         /**< Defines if an ICACHE is present or not */
-#define __DCACHE_PRESENT               1         /**< Defines if an DCACHE is present or not */
-#define __DTCM_PRESENT                 1         /**< Defines if an DTCM is present or not */
-#define __NVIC_PRIO_BITS               4         /**< Number of priority bits implemented in the NVIC */
-#define __Vendor_SysTickConfig         0         /**< Vendor specific implementation of SysTickConfig is defined */
-#define __FPU_PRESENT                  1         /**< Defines if an FPU is present or not */
+#define __MPU_PRESENT          1 /**< Defines if an MPU is present or not */
+#define __ICACHE_PRESENT       1 /**< Defines if an ICACHE is present or not */
+#define __DCACHE_PRESENT       1 /**< Defines if an DCACHE is present or not */
+#define __DTCM_PRESENT         1 /**< Defines if an DTCM is present or not */
+#define __NVIC_PRIO_BITS       4 /**< Number of priority bits implemented in the NVIC */
+#define __Vendor_SysTickConfig 0 /**< Vendor specific implementation of SysTickConfig is defined */
+#define __FPU_PRESENT          1 /**< Defines if an FPU is present or not */
 
-#include "core_cm7.h"                  /* Core Peripheral Access Layer */
-#include "system_MIMXRT1051.h"         /* Device specific configuration file */
+#include "core_cm7.h"          /* Core Peripheral Access Layer */
+#include "system_MIMXRT1051.h" /* Device specific configuration file */
 
 /*!
  * @}
  */ /* end of group Cortex_Core_Configuration */
 
-
 /* ----------------------------------------------------------------------------
    -- Mapping Information
    ---------------------------------------------------------------------------- */
@@ -316,7 +314,7 @@ typedef enum IRQn {
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the DMA0 hardware request
@@ -325,117 +323,125 @@ typedef enum IRQn {
  */
 typedef enum _dma_request_source
 {
-    kDmaRequestMuxFlexIO1Request0Request1 = 0|0x100U, /**< FlexIO1 */
-    kDmaRequestMuxFlexIO2Request0Request1 = 1|0x100U, /**< FlexIO2 */
-    kDmaRequestMuxLPUART1Tx         = 2|0x100U,    /**< LPUART1 Transmit */
-    kDmaRequestMuxLPUART1Rx         = 3|0x100U,    /**< LPUART1 Receive */
-    kDmaRequestMuxLPUART3Tx         = 4|0x100U,    /**< LPUART3 Transmit */
-    kDmaRequestMuxLPUART3Rx         = 5|0x100U,    /**< LPUART3 Receive */
-    kDmaRequestMuxLPUART5Tx         = 6|0x100U,    /**< LPUART5 Transmit */
-    kDmaRequestMuxLPUART5Rx         = 7|0x100U,    /**< LPUART5 Receive */
-    kDmaRequestMuxLPUART7Tx         = 8|0x100U,    /**< LPUART7 Transmit */
-    kDmaRequestMuxLPUART7Rx         = 9|0x100U,    /**< LPUART7 Receive */
-    kDmaRequestMuxLPSPI1Rx          = 13|0x100U,   /**< LPSPI1 Receive */
-    kDmaRequestMuxLPSPI1Tx          = 14|0x100U,   /**< LPSPI1 Transmit */
-    kDmaRequestMuxLPSPI3Rx          = 15|0x100U,   /**< LPSPI3 Receive */
-    kDmaRequestMuxLPSPI3Tx          = 16|0x100U,   /**< LPSPI3 Transmit */
-    kDmaRequestMuxLPI2C1            = 17|0x100U,   /**< LPI2C1 */
-    kDmaRequestMuxLPI2C3            = 18|0x100U,   /**< LPI2C3 */
-    kDmaRequestMuxSai1Rx            = 19|0x100U,   /**< Sai1 Receive */
-    kDmaRequestMuxSai1Tx            = 20|0x100U,   /**< Sai1 Transmit */
-    kDmaRequestMuxSai2Rx            = 21|0x100U,   /**< Sai2 Receive */
-    kDmaRequestMuxSai2Tx            = 22|0x100U,   /**< Sai2 Transmit */
-    kDmaRequestMuxADC_ETC           = 23|0x100U,   /**< ADC_ETC */
-    kDmaRequestMuxADC1              = 24|0x100U,   /**< ADC1 */
-    kDmaRequestMuxACMP1             = 25|0x100U,   /**< ACMP1 */
-    kDmaRequestMuxACMP2             = 26|0x100U,   /**< ACMP2 */
-    kDmaRequestMuxFlexSPIRx         = 28|0x100U,   /**< FlexSPI Receive */
-    kDmaRequestMuxFlexSPITx         = 29|0x100U,   /**< FlexSPI Transmit */
-    kDmaRequestMuxXBAR1Request0     = 30|0x100U,   /**< XBAR1 Request 0 */
-    kDmaRequestMuxXBAR1Request1     = 31|0x100U,   /**< XBAR1 Request 1 */
-    kDmaRequestMuxFlexPWM1CaptureSub0 = 32|0x100U, /**< FlexPWM1 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM1CaptureSub1 = 33|0x100U, /**< FlexPWM1 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM1CaptureSub2 = 34|0x100U, /**< FlexPWM1 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM1CaptureSub3 = 35|0x100U, /**< FlexPWM1 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM1ValueSub0 = 36|0x100U,   /**< FlexPWM1 Value sub-module0 */
-    kDmaRequestMuxFlexPWM1ValueSub1 = 37|0x100U,   /**< FlexPWM1 Value sub-module1 */
-    kDmaRequestMuxFlexPWM1ValueSub2 = 38|0x100U,   /**< FlexPWM1 Value sub-module2 */
-    kDmaRequestMuxFlexPWM1ValueSub3 = 39|0x100U,   /**< FlexPWM1 Value sub-module3 */
-    kDmaRequestMuxFlexPWM3CaptureSub0 = 40|0x100U, /**< FlexPWM3 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM3CaptureSub1 = 41|0x100U, /**< FlexPWM3 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM3CaptureSub2 = 42|0x100U, /**< FlexPWM3 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM3CaptureSub3 = 43|0x100U, /**< FlexPWM3 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM3ValueSub0 = 44|0x100U,   /**< FlexPWM3 Value sub-module0 */
-    kDmaRequestMuxFlexPWM3ValueSub1 = 45|0x100U,   /**< FlexPWM3 Value sub-module1 */
-    kDmaRequestMuxFlexPWM3ValueSub2 = 46|0x100U,   /**< FlexPWM3 Value sub-module2 */
-    kDmaRequestMuxFlexPWM3ValueSub3 = 47|0x100U,   /**< FlexPWM3 Value sub-module3 */
-    kDmaRequestMuxQTIMER1CaptTimer0 = 48|0x100U,   /**< QTIMER1 Capture timer 0 */
-    kDmaRequestMuxQTIMER1CaptTimer1 = 49|0x100U,   /**< QTIMER1 Capture timer 1 */
-    kDmaRequestMuxQTIMER1CaptTimer2 = 50|0x100U,   /**< QTIMER1 Capture timer 2 */
-    kDmaRequestMuxQTIMER1CaptTimer3 = 51|0x100U,   /**< QTIMER1 Capture timer 3 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer0Cmpld2Timer1 = 52|0x100U, /**< QTIMER1 cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer1Cmpld2Timer0 = 53|0x100U, /**< QTIMER1 cmpld1 in timer 1 or cmpld2 in timer 0 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer2Cmpld2Timer3 = 54|0x100U, /**< QTIMER1 cmpld1 in timer 2 or cmpld2 in timer 3 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer3Cmpld2Timer2 = 55|0x100U, /**< QTIMER1 cmpld1 in timer 3 or cmpld2 in timer 2 */
-    kDmaRequestMuxQTIMER3CaptTimer0Cmpld1Timer0Cmpld2Timer1 = 56|0x100U, /**< QTIMER3 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer1Cmpld1Timer0Cmpld2Timer1 = 57|0x100U, /**< QTIMER3 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer2Cmpld1Timer0Cmpld2Timer1 = 58|0x100U, /**< QTIMER3 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer3Cmpld1Timer0Cmpld2Timer1 = 59|0x100U, /**< QTIMER3 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxFlexIO1Request2Request3 = 64|0x100U, /**< FlexIO1 */
-    kDmaRequestMuxFlexIO2Request2Request3 = 65|0x100U, /**< FlexIO2 */
-    kDmaRequestMuxLPUART2Tx         = 66|0x100U,   /**< LPUART2 Transmit */
-    kDmaRequestMuxLPUART2Rx         = 67|0x100U,   /**< LPUART2 Receive */
-    kDmaRequestMuxLPUART4Tx         = 68|0x100U,   /**< LPUART4 Transmit */
-    kDmaRequestMuxLPUART4Rx         = 69|0x100U,   /**< LPUART4 Receive */
-    kDmaRequestMuxLPUART6Tx         = 70|0x100U,   /**< LPUART6 Transmit */
-    kDmaRequestMuxLPUART6Rx         = 71|0x100U,   /**< LPUART6 Receive */
-    kDmaRequestMuxLPUART8Tx         = 72|0x100U,   /**< LPUART8 Transmit */
-    kDmaRequestMuxLPUART8Rx         = 73|0x100U,   /**< LPUART8 Receive */
-    kDmaRequestMuxLPSPI2Rx          = 77|0x100U,   /**< LPSPI2 Receive */
-    kDmaRequestMuxLPSPI2Tx          = 78|0x100U,   /**< LPSPI2 Transmit */
-    kDmaRequestMuxLPSPI4Rx          = 79|0x100U,   /**< LPSPI4 Receive */
-    kDmaRequestMuxLPSPI4Tx          = 80|0x100U,   /**< LPSPI4 Transmit */
-    kDmaRequestMuxLPI2C2            = 81|0x100U,   /**< LPI2C2 */
-    kDmaRequestMuxLPI2C4            = 82|0x100U,   /**< LPI2C4 */
-    kDmaRequestMuxSai3Rx            = 83|0x100U,   /**< Sai3 Receive */
-    kDmaRequestMuxSai3Tx            = 84|0x100U,   /**< Sai3 Transmit */
-    kDmaRequestMuxSpdifRx           = 85|0x100U,   /**< Spdif Receive */
-    kDmaRequestMuxSpdifTx           = 86|0x100U,   /**< Spdif Transmit */
-    kDmaRequestMuxADC2              = 88|0x100U,   /**< ADC2 */
-    kDmaRequestMuxACMP3             = 89|0x100U,   /**< ACMP3 */
-    kDmaRequestMuxACMP4             = 90|0x100U,   /**< ACMP4 */
-    kDmaRequestMuxEnetTimer0        = 92|0x100U,   /**< Enet Timer0 */
-    kDmaRequestMuxEnetTimer1        = 93|0x100U,   /**< Enet Timer1 */
-    kDmaRequestMuxXBAR1Request2     = 94|0x100U,   /**< XBAR1 Request 2 */
-    kDmaRequestMuxXBAR1Request3     = 95|0x100U,   /**< XBAR1 Request 3 */
-    kDmaRequestMuxFlexPWM2CaptureSub0 = 96|0x100U, /**< FlexPWM2 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM2CaptureSub1 = 97|0x100U, /**< FlexPWM2 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM2CaptureSub2 = 98|0x100U, /**< FlexPWM2 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM2CaptureSub3 = 99|0x100U, /**< FlexPWM2 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM2ValueSub0 = 100|0x100U,  /**< FlexPWM2 Value sub-module0 */
-    kDmaRequestMuxFlexPWM2ValueSub1 = 101|0x100U,  /**< FlexPWM2 Value sub-module1 */
-    kDmaRequestMuxFlexPWM2ValueSub2 = 102|0x100U,  /**< FlexPWM2 Value sub-module2 */
-    kDmaRequestMuxFlexPWM2ValueSub3 = 103|0x100U,  /**< FlexPWM2 Value sub-module3 */
-    kDmaRequestMuxFlexPWM4CaptureSub0 = 104|0x100U, /**< FlexPWM4 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM4CaptureSub1 = 105|0x100U, /**< FlexPWM4 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM4CaptureSub2 = 106|0x100U, /**< FlexPWM4 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM4CaptureSub3 = 107|0x100U, /**< FlexPWM4 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM4ValueSub0 = 108|0x100U,  /**< FlexPWM4 Value sub-module0 */
-    kDmaRequestMuxFlexPWM4ValueSub1 = 109|0x100U,  /**< FlexPWM4 Value sub-module1 */
-    kDmaRequestMuxFlexPWM4ValueSub2 = 110|0x100U,  /**< FlexPWM4 Value sub-module2 */
-    kDmaRequestMuxFlexPWM4ValueSub3 = 111|0x100U,  /**< FlexPWM4 Value sub-module3 */
-    kDmaRequestMuxQTIMER2CaptTimer0 = 112|0x100U,  /**< QTIMER2 Capture timer 0 */
-    kDmaRequestMuxQTIMER2CaptTimer1 = 113|0x100U,  /**< QTIMER2 Capture timer 1 */
-    kDmaRequestMuxQTIMER2CaptTimer2 = 114|0x100U,  /**< QTIMER2 Capture timer 2 */
-    kDmaRequestMuxQTIMER2CaptTimer3 = 115|0x100U,  /**< QTIMER2 Capture timer 3 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer0Cmpld2Timer1 = 116|0x100U, /**< QTIMER2 cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer1Cmpld2Timer0 = 117|0x100U, /**< QTIMER2 cmpld1 in timer 1 or cmpld2 in timer 0 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer2Cmpld2Timer3 = 118|0x100U, /**< QTIMER2 cmpld1 in timer 2 or cmpld2 in timer 3 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer3Cmpld2Timer2 = 119|0x100U, /**< QTIMER2 cmpld1 in timer 3 or cmpld2 in timer 2 */
-    kDmaRequestMuxQTIMER4CaptTimer0Cmpld1Timer0Cmpld2Timer1 = 120|0x100U, /**< QTIMER4 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer1Cmpld1Timer0Cmpld2Timer1 = 121|0x100U, /**< QTIMER4 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer2Cmpld1Timer0Cmpld2Timer1 = 122|0x100U, /**< QTIMER4 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer3Cmpld1Timer0Cmpld2Timer1 = 123|0x100U, /**< QTIMER4 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxFlexIO1Request0Request1         = 0 | 0x100U,  /**< FlexIO1 */
+    kDmaRequestMuxFlexIO2Request0Request1         = 1 | 0x100U,  /**< FlexIO2 */
+    kDmaRequestMuxLPUART1Tx                       = 2 | 0x100U,  /**< LPUART1 Transmit */
+    kDmaRequestMuxLPUART1Rx                       = 3 | 0x100U,  /**< LPUART1 Receive */
+    kDmaRequestMuxLPUART3Tx                       = 4 | 0x100U,  /**< LPUART3 Transmit */
+    kDmaRequestMuxLPUART3Rx                       = 5 | 0x100U,  /**< LPUART3 Receive */
+    kDmaRequestMuxLPUART5Tx                       = 6 | 0x100U,  /**< LPUART5 Transmit */
+    kDmaRequestMuxLPUART5Rx                       = 7 | 0x100U,  /**< LPUART5 Receive */
+    kDmaRequestMuxLPUART7Tx                       = 8 | 0x100U,  /**< LPUART7 Transmit */
+    kDmaRequestMuxLPUART7Rx                       = 9 | 0x100U,  /**< LPUART7 Receive */
+    kDmaRequestMuxLPSPI1Rx                        = 13 | 0x100U, /**< LPSPI1 Receive */
+    kDmaRequestMuxLPSPI1Tx                        = 14 | 0x100U, /**< LPSPI1 Transmit */
+    kDmaRequestMuxLPSPI3Rx                        = 15 | 0x100U, /**< LPSPI3 Receive */
+    kDmaRequestMuxLPSPI3Tx                        = 16 | 0x100U, /**< LPSPI3 Transmit */
+    kDmaRequestMuxLPI2C1                          = 17 | 0x100U, /**< LPI2C1 */
+    kDmaRequestMuxLPI2C3                          = 18 | 0x100U, /**< LPI2C3 */
+    kDmaRequestMuxSai1Rx                          = 19 | 0x100U, /**< Sai1 Receive */
+    kDmaRequestMuxSai1Tx                          = 20 | 0x100U, /**< Sai1 Transmit */
+    kDmaRequestMuxSai2Rx                          = 21 | 0x100U, /**< Sai2 Receive */
+    kDmaRequestMuxSai2Tx                          = 22 | 0x100U, /**< Sai2 Transmit */
+    kDmaRequestMuxADC_ETC                         = 23 | 0x100U, /**< ADC_ETC */
+    kDmaRequestMuxADC1                            = 24 | 0x100U, /**< ADC1 */
+    kDmaRequestMuxACMP1                           = 25 | 0x100U, /**< ACMP1 */
+    kDmaRequestMuxACMP2                           = 26 | 0x100U, /**< ACMP2 */
+    kDmaRequestMuxFlexSPIRx                       = 28 | 0x100U, /**< FlexSPI Receive */
+    kDmaRequestMuxFlexSPITx                       = 29 | 0x100U, /**< FlexSPI Transmit */
+    kDmaRequestMuxXBAR1Request0                   = 30 | 0x100U, /**< XBAR1 Request 0 */
+    kDmaRequestMuxXBAR1Request1                   = 31 | 0x100U, /**< XBAR1 Request 1 */
+    kDmaRequestMuxFlexPWM1CaptureSub0             = 32 | 0x100U, /**< FlexPWM1 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM1CaptureSub1             = 33 | 0x100U, /**< FlexPWM1 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM1CaptureSub2             = 34 | 0x100U, /**< FlexPWM1 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM1CaptureSub3             = 35 | 0x100U, /**< FlexPWM1 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM1ValueSub0               = 36 | 0x100U, /**< FlexPWM1 Value sub-module0 */
+    kDmaRequestMuxFlexPWM1ValueSub1               = 37 | 0x100U, /**< FlexPWM1 Value sub-module1 */
+    kDmaRequestMuxFlexPWM1ValueSub2               = 38 | 0x100U, /**< FlexPWM1 Value sub-module2 */
+    kDmaRequestMuxFlexPWM1ValueSub3               = 39 | 0x100U, /**< FlexPWM1 Value sub-module3 */
+    kDmaRequestMuxFlexPWM3CaptureSub0             = 40 | 0x100U, /**< FlexPWM3 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM3CaptureSub1             = 41 | 0x100U, /**< FlexPWM3 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM3CaptureSub2             = 42 | 0x100U, /**< FlexPWM3 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM3CaptureSub3             = 43 | 0x100U, /**< FlexPWM3 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM3ValueSub0               = 44 | 0x100U, /**< FlexPWM3 Value sub-module0 */
+    kDmaRequestMuxFlexPWM3ValueSub1               = 45 | 0x100U, /**< FlexPWM3 Value sub-module1 */
+    kDmaRequestMuxFlexPWM3ValueSub2               = 46 | 0x100U, /**< FlexPWM3 Value sub-module2 */
+    kDmaRequestMuxFlexPWM3ValueSub3               = 47 | 0x100U, /**< FlexPWM3 Value sub-module3 */
+    kDmaRequestMuxQTIMER1CaptTimer0               = 48 | 0x100U, /**< QTIMER1 Capture timer 0 */
+    kDmaRequestMuxQTIMER1CaptTimer1               = 49 | 0x100U, /**< QTIMER1 Capture timer 1 */
+    kDmaRequestMuxQTIMER1CaptTimer2               = 50 | 0x100U, /**< QTIMER1 Capture timer 2 */
+    kDmaRequestMuxQTIMER1CaptTimer3               = 51 | 0x100U, /**< QTIMER1 Capture timer 3 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer0Cmpld2Timer1 = 52 | 0x100U, /**< QTIMER1 cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer1Cmpld2Timer0 = 53 | 0x100U, /**< QTIMER1 cmpld1 in timer 1 or cmpld2 in timer 0 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer2Cmpld2Timer3 = 54 | 0x100U, /**< QTIMER1 cmpld1 in timer 2 or cmpld2 in timer 3 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer3Cmpld2Timer2 = 55 | 0x100U, /**< QTIMER1 cmpld1 in timer 3 or cmpld2 in timer 2 */
+    kDmaRequestMuxQTIMER3CaptTimer0Cmpld1Timer0Cmpld2Timer1 =
+        56 | 0x100U, /**< QTIMER3 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer1Cmpld1Timer0Cmpld2Timer1 =
+        57 | 0x100U, /**< QTIMER3 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer2Cmpld1Timer0Cmpld2Timer1 =
+        58 | 0x100U, /**< QTIMER3 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer3Cmpld1Timer0Cmpld2Timer1 =
+        59 | 0x100U, /**< QTIMER3 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxFlexIO1Request2Request3         = 64 | 0x100U,  /**< FlexIO1 */
+    kDmaRequestMuxFlexIO2Request2Request3         = 65 | 0x100U,  /**< FlexIO2 */
+    kDmaRequestMuxLPUART2Tx                       = 66 | 0x100U,  /**< LPUART2 Transmit */
+    kDmaRequestMuxLPUART2Rx                       = 67 | 0x100U,  /**< LPUART2 Receive */
+    kDmaRequestMuxLPUART4Tx                       = 68 | 0x100U,  /**< LPUART4 Transmit */
+    kDmaRequestMuxLPUART4Rx                       = 69 | 0x100U,  /**< LPUART4 Receive */
+    kDmaRequestMuxLPUART6Tx                       = 70 | 0x100U,  /**< LPUART6 Transmit */
+    kDmaRequestMuxLPUART6Rx                       = 71 | 0x100U,  /**< LPUART6 Receive */
+    kDmaRequestMuxLPUART8Tx                       = 72 | 0x100U,  /**< LPUART8 Transmit */
+    kDmaRequestMuxLPUART8Rx                       = 73 | 0x100U,  /**< LPUART8 Receive */
+    kDmaRequestMuxLPSPI2Rx                        = 77 | 0x100U,  /**< LPSPI2 Receive */
+    kDmaRequestMuxLPSPI2Tx                        = 78 | 0x100U,  /**< LPSPI2 Transmit */
+    kDmaRequestMuxLPSPI4Rx                        = 79 | 0x100U,  /**< LPSPI4 Receive */
+    kDmaRequestMuxLPSPI4Tx                        = 80 | 0x100U,  /**< LPSPI4 Transmit */
+    kDmaRequestMuxLPI2C2                          = 81 | 0x100U,  /**< LPI2C2 */
+    kDmaRequestMuxLPI2C4                          = 82 | 0x100U,  /**< LPI2C4 */
+    kDmaRequestMuxSai3Rx                          = 83 | 0x100U,  /**< Sai3 Receive */
+    kDmaRequestMuxSai3Tx                          = 84 | 0x100U,  /**< Sai3 Transmit */
+    kDmaRequestMuxSpdifRx                         = 85 | 0x100U,  /**< Spdif Receive */
+    kDmaRequestMuxSpdifTx                         = 86 | 0x100U,  /**< Spdif Transmit */
+    kDmaRequestMuxADC2                            = 88 | 0x100U,  /**< ADC2 */
+    kDmaRequestMuxACMP3                           = 89 | 0x100U,  /**< ACMP3 */
+    kDmaRequestMuxACMP4                           = 90 | 0x100U,  /**< ACMP4 */
+    kDmaRequestMuxEnetTimer0                      = 92 | 0x100U,  /**< Enet Timer0 */
+    kDmaRequestMuxEnetTimer1                      = 93 | 0x100U,  /**< Enet Timer1 */
+    kDmaRequestMuxXBAR1Request2                   = 94 | 0x100U,  /**< XBAR1 Request 2 */
+    kDmaRequestMuxXBAR1Request3                   = 95 | 0x100U,  /**< XBAR1 Request 3 */
+    kDmaRequestMuxFlexPWM2CaptureSub0             = 96 | 0x100U,  /**< FlexPWM2 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM2CaptureSub1             = 97 | 0x100U,  /**< FlexPWM2 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM2CaptureSub2             = 98 | 0x100U,  /**< FlexPWM2 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM2CaptureSub3             = 99 | 0x100U,  /**< FlexPWM2 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM2ValueSub0               = 100 | 0x100U, /**< FlexPWM2 Value sub-module0 */
+    kDmaRequestMuxFlexPWM2ValueSub1               = 101 | 0x100U, /**< FlexPWM2 Value sub-module1 */
+    kDmaRequestMuxFlexPWM2ValueSub2               = 102 | 0x100U, /**< FlexPWM2 Value sub-module2 */
+    kDmaRequestMuxFlexPWM2ValueSub3               = 103 | 0x100U, /**< FlexPWM2 Value sub-module3 */
+    kDmaRequestMuxFlexPWM4CaptureSub0             = 104 | 0x100U, /**< FlexPWM4 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM4CaptureSub1             = 105 | 0x100U, /**< FlexPWM4 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM4CaptureSub2             = 106 | 0x100U, /**< FlexPWM4 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM4CaptureSub3             = 107 | 0x100U, /**< FlexPWM4 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM4ValueSub0               = 108 | 0x100U, /**< FlexPWM4 Value sub-module0 */
+    kDmaRequestMuxFlexPWM4ValueSub1               = 109 | 0x100U, /**< FlexPWM4 Value sub-module1 */
+    kDmaRequestMuxFlexPWM4ValueSub2               = 110 | 0x100U, /**< FlexPWM4 Value sub-module2 */
+    kDmaRequestMuxFlexPWM4ValueSub3               = 111 | 0x100U, /**< FlexPWM4 Value sub-module3 */
+    kDmaRequestMuxQTIMER2CaptTimer0               = 112 | 0x100U, /**< QTIMER2 Capture timer 0 */
+    kDmaRequestMuxQTIMER2CaptTimer1               = 113 | 0x100U, /**< QTIMER2 Capture timer 1 */
+    kDmaRequestMuxQTIMER2CaptTimer2               = 114 | 0x100U, /**< QTIMER2 Capture timer 2 */
+    kDmaRequestMuxQTIMER2CaptTimer3               = 115 | 0x100U, /**< QTIMER2 Capture timer 3 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer0Cmpld2Timer1 = 116 | 0x100U, /**< QTIMER2 cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer1Cmpld2Timer0 = 117 | 0x100U, /**< QTIMER2 cmpld1 in timer 1 or cmpld2 in timer 0 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer2Cmpld2Timer3 = 118 | 0x100U, /**< QTIMER2 cmpld1 in timer 2 or cmpld2 in timer 3 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer3Cmpld2Timer2 = 119 | 0x100U, /**< QTIMER2 cmpld1 in timer 3 or cmpld2 in timer 2 */
+    kDmaRequestMuxQTIMER4CaptTimer0Cmpld1Timer0Cmpld2Timer1 =
+        120 | 0x100U, /**< QTIMER4 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer1Cmpld1Timer0Cmpld2Timer1 =
+        121 | 0x100U, /**< QTIMER4 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer2Cmpld1Timer0Cmpld2Timer1 =
+        122 | 0x100U, /**< QTIMER4 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer3Cmpld1Timer0Cmpld2Timer1 =
+        123 | 0x100U, /**< QTIMER4 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
 } dma_request_source_t;
 
 /* @} */
@@ -446,7 +452,7 @@ typedef enum _dma_request_source
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the IOMUXC SW_MUX_CTL_PAD
@@ -455,130 +461,130 @@ typedef enum _dma_request_source
  */
 typedef enum _iomuxc_sw_mux_ctl_pad
 {
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00 = 0U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01 = 1U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02 = 2U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03 = 3U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04 = 4U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05 = 5U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06 = 6U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07 = 7U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08 = 8U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09 = 9U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10 = 10U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11 = 11U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12 = 12U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13 = 13U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14 = 14U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15 = 15U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16 = 16U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17 = 17U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18 = 18U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19 = 19U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20 = 20U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21 = 21U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22 = 22U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23 = 23U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24 = 24U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25 = 25U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26 = 26U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27 = 27U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28 = 28U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29 = 29U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30 = 30U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31 = 31U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32 = 32U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33 = 33U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34 = 34U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35 = 35U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36 = 36U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37 = 37U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38 = 38U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39 = 39U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40 = 40U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_41 = 41U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_00 = 42U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_01 = 43U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02 = 44U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 45U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_04 = 46U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_05 = 47U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_06 = 48U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_07 = 49U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_08 = 50U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_09 = 51U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_10 = 52U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_11 = 53U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_12 = 54U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_13 = 55U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_14 = 56U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_15 = 57U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_00 = 58U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_01 = 59U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_02 = 60U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_03 = 61U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_04 = 62U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_05 = 63U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_06 = 64U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_07 = 65U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 66U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_09 = 67U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_10 = 68U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_11 = 69U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_12 = 70U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_13 = 71U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_14 = 72U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_15 = 73U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_00 = 74U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_01 = 75U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_02 = 76U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 77U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_04 = 78U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_05 = 79U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_06 = 80U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_07 = 81U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_08 = 82U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_09 = 83U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_10 = 84U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_11 = 85U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12 = 86U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_13 = 87U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_14 = 88U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_15 = 89U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00 = 90U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01 = 91U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_02 = 92U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_03 = 93U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_04 = 94U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_05 = 95U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_06 = 96U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_07 = 97U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_08 = 98U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_09 = 99U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_10 = 100U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11 = 101U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_12 = 102U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_13 = 103U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_14 = 104U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_15 = 105U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_00 = 106U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_01 = 107U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_02 = 108U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_03 = 109U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 = 110U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 = 111U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_00 = 112U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_01 = 113U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_02 = 114U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_03 = 115U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_04 = 116U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_05 = 117U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_06 = 118U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_07 = 119U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_08 = 120U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_09 = 121U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_10 = 122U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_11 = 123U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00   = 0U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01   = 1U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02   = 2U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03   = 3U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04   = 4U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05   = 5U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06   = 6U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07   = 7U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08   = 8U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09   = 9U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10   = 10U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11   = 11U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12   = 12U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13   = 13U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14   = 14U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15   = 15U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16   = 16U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17   = 17U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18   = 18U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19   = 19U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20   = 20U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21   = 21U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22   = 22U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23   = 23U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24   = 24U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25   = 25U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26   = 26U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27   = 27U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28   = 28U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29   = 29U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30   = 30U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31   = 31U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32   = 32U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33   = 33U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34   = 34U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35   = 35U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36   = 36U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37   = 37U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38   = 38U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39   = 39U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40   = 40U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_41   = 41U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_00 = 42U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_01 = 43U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02 = 44U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 45U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_04 = 46U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_05 = 47U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_06 = 48U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_07 = 49U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_08 = 50U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_09 = 51U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_10 = 52U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_11 = 53U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_12 = 54U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_13 = 55U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_14 = 56U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_15 = 57U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_00 = 58U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_01 = 59U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_02 = 60U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_03 = 61U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_04 = 62U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_05 = 63U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_06 = 64U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_07 = 65U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 66U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_09 = 67U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_10 = 68U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_11 = 69U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_12 = 70U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_13 = 71U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_14 = 72U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_15 = 73U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_00    = 74U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_01    = 75U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_02    = 76U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03    = 77U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_04    = 78U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_05    = 79U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_06    = 80U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_07    = 81U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_08    = 82U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_09    = 83U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_10    = 84U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_11    = 85U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12    = 86U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_13    = 87U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_14    = 88U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_15    = 89U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00    = 90U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01    = 91U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_02    = 92U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_03    = 93U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_04    = 94U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_05    = 95U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_06    = 96U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_07    = 97U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_08    = 98U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_09    = 99U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_10    = 100U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11    = 101U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_12    = 102U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_13    = 103U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_14    = 104U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_15    = 105U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_00 = 106U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_01 = 107U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_02 = 108U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_03 = 109U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 = 110U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 = 111U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_00 = 112U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_01 = 113U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_02 = 114U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_03 = 115U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_04 = 116U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_05 = 117U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_06 = 118U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_07 = 119U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_08 = 120U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_09 = 121U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_10 = 122U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_11 = 123U, /**< IOMUXC SW_MUX_CTL_PAD index */
 } iomuxc_sw_mux_ctl_pad_t;
 
 /* @} */
@@ -589,7 +595,7 @@ typedef enum _iomuxc_sw_mux_ctl_pad
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the IOMUXC SW_PAD_CTL_PAD
@@ -598,130 +604,130 @@ typedef enum _iomuxc_sw_mux_ctl_pad
  */
 typedef enum _iomuxc_sw_pad_ctl_pad
 {
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00 = 0U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01 = 1U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02 = 2U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03 = 3U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04 = 4U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05 = 5U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06 = 6U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07 = 7U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08 = 8U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09 = 9U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10 = 10U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11 = 11U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12 = 12U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13 = 13U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14 = 14U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15 = 15U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16 = 16U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17 = 17U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18 = 18U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19 = 19U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20 = 20U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21 = 21U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22 = 22U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23 = 23U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24 = 24U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25 = 25U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26 = 26U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27 = 27U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28 = 28U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29 = 29U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30 = 30U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31 = 31U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32 = 32U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33 = 33U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34 = 34U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35 = 35U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36 = 36U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37 = 37U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38 = 38U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39 = 39U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_40 = 40U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_41 = 41U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_00 = 42U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_01 = 43U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_02 = 44U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 = 45U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_04 = 46U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_05 = 47U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_06 = 48U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_07 = 49U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_08 = 50U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_09 = 51U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_10 = 52U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_11 = 53U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_12 = 54U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_13 = 55U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_14 = 56U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_15 = 57U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_00 = 58U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_01 = 59U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_02 = 60U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_03 = 61U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_04 = 62U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_05 = 63U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_06 = 64U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_07 = 65U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_08 = 66U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_09 = 67U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_10 = 68U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_11 = 69U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_12 = 70U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_13 = 71U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_14 = 72U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_15 = 73U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_00 = 74U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_01 = 75U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_02 = 76U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03 = 77U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_04 = 78U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_05 = 79U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_06 = 80U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_07 = 81U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_08 = 82U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_09 = 83U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_10 = 84U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_11 = 85U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12 = 86U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_13 = 87U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_14 = 88U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_15 = 89U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_00 = 90U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_01 = 91U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_02 = 92U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_03 = 93U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_04 = 94U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_05 = 95U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_06 = 96U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_07 = 97U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_08 = 98U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_09 = 99U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_10 = 100U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11 = 101U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_12 = 102U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_13 = 103U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_14 = 104U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_15 = 105U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_00 = 106U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_01 = 107U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_02 = 108U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_03 = 109U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 = 110U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 = 111U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_00 = 112U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_01 = 113U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_02 = 114U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_03 = 115U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_04 = 116U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_05 = 117U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_06 = 118U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_07 = 119U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_08 = 120U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_09 = 121U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_10 = 122U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_11 = 123U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00   = 0U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01   = 1U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02   = 2U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03   = 3U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04   = 4U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05   = 5U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06   = 6U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07   = 7U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08   = 8U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09   = 9U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10   = 10U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11   = 11U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12   = 12U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13   = 13U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14   = 14U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15   = 15U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16   = 16U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17   = 17U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18   = 18U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19   = 19U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20   = 20U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21   = 21U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22   = 22U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23   = 23U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24   = 24U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25   = 25U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26   = 26U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27   = 27U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28   = 28U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29   = 29U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30   = 30U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31   = 31U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32   = 32U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33   = 33U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34   = 34U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35   = 35U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36   = 36U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37   = 37U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38   = 38U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39   = 39U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_40   = 40U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_41   = 41U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_00 = 42U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_01 = 43U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_02 = 44U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 = 45U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_04 = 46U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_05 = 47U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_06 = 48U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_07 = 49U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_08 = 50U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_09 = 51U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_10 = 52U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_11 = 53U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_12 = 54U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_13 = 55U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_14 = 56U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_15 = 57U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_00 = 58U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_01 = 59U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_02 = 60U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_03 = 61U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_04 = 62U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_05 = 63U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_06 = 64U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_07 = 65U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_08 = 66U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_09 = 67U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_10 = 68U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_11 = 69U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_12 = 70U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_13 = 71U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_14 = 72U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_15 = 73U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_00    = 74U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_01    = 75U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_02    = 76U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03    = 77U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_04    = 78U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_05    = 79U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_06    = 80U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_07    = 81U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_08    = 82U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_09    = 83U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_10    = 84U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_11    = 85U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12    = 86U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_13    = 87U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_14    = 88U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_15    = 89U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_00    = 90U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_01    = 91U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_02    = 92U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_03    = 93U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_04    = 94U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_05    = 95U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_06    = 96U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_07    = 97U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_08    = 98U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_09    = 99U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_10    = 100U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11    = 101U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_12    = 102U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_13    = 103U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_14    = 104U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_15    = 105U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_00 = 106U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_01 = 107U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_02 = 108U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_03 = 109U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 = 110U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 = 111U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_00 = 112U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_01 = 113U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_02 = 114U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_03 = 115U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_04 = 116U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_05 = 117U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_06 = 118U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_07 = 119U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_08 = 120U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_09 = 121U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_10 = 122U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_11 = 123U, /**< IOMUXC SW_PAD_CTL_PAD index */
 } iomuxc_sw_pad_ctl_pad_t;
 
 /* @} */
@@ -733,543 +739,589 @@ typedef enum _iomuxc_sw_pad_ctl_pad
  */
 typedef enum _iomuxc_select_input
 {
-    kIOMUXC_ANATOP_USB_OTG1_ID_SELECT_INPUT = 0U,  /**< IOMUXC select input index */
-    kIOMUXC_ANATOP_USB_OTG2_ID_SELECT_INPUT = 1U,  /**< IOMUXC select input index */
-    kIOMUXC_CCM_PMIC_READY_SELECT_INPUT = 2U,      /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA02_SELECT_INPUT = 3U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA03_SELECT_INPUT = 4U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA04_SELECT_INPUT = 5U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA05_SELECT_INPUT = 6U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA06_SELECT_INPUT = 7U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA07_SELECT_INPUT = 8U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA08_SELECT_INPUT = 9U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA09_SELECT_INPUT = 10U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_HSYNC_SELECT_INPUT  = 11U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_PIXCLK_SELECT_INPUT = 12U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_VSYNC_SELECT_INPUT  = 13U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET_IPG_CLK_RMII_SELECT_INPUT = 14U,  /**< IOMUXC select input index */
-    kIOMUXC_ENET_MDIO_SELECT_INPUT  = 15U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET0_RXDATA_SELECT_INPUT = 16U,       /**< IOMUXC select input index */
-    kIOMUXC_ENET1_RXDATA_SELECT_INPUT = 17U,       /**< IOMUXC select input index */
-    kIOMUXC_ENET_RXEN_SELECT_INPUT  = 18U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET_RXERR_SELECT_INPUT = 19U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET0_TIMER_SELECT_INPUT = 20U,        /**< IOMUXC select input index */
-    kIOMUXC_ENET_TXCLK_SELECT_INPUT = 21U,         /**< IOMUXC select input index */
-    kIOMUXC_FLEXCAN1_RX_SELECT_INPUT = 22U,        /**< IOMUXC select input index */
-    kIOMUXC_FLEXCAN2_RX_SELECT_INPUT = 23U,        /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA3_SELECT_INPUT = 24U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA0_SELECT_INPUT = 25U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA1_SELECT_INPUT = 26U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA2_SELECT_INPUT = 27U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB3_SELECT_INPUT = 28U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB0_SELECT_INPUT = 29U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB1_SELECT_INPUT = 30U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB2_SELECT_INPUT = 31U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA3_SELECT_INPUT = 32U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA0_SELECT_INPUT = 33U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA1_SELECT_INPUT = 34U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA2_SELECT_INPUT = 35U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB3_SELECT_INPUT = 36U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB0_SELECT_INPUT = 37U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB1_SELECT_INPUT = 38U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB2_SELECT_INPUT = 39U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA0_SELECT_INPUT = 40U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT = 41U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA2_SELECT_INPUT = 42U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA3_SELECT_INPUT = 43U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DQS_SELECT_INPUT = 44U,       /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA0_SELECT_INPUT = 45U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA1_SELECT_INPUT = 46U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA2_SELECT_INPUT = 47U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA3_SELECT_INPUT = 48U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA0_SELECT_INPUT = 49U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA1_SELECT_INPUT = 50U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA2_SELECT_INPUT = 51U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA3_SELECT_INPUT = 52U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_SCK_SELECT_INPUT = 53U,       /**< IOMUXC select input index */
-    kIOMUXC_LPI2C1_SCL_SELECT_INPUT = 54U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C1_SDA_SELECT_INPUT = 55U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C2_SCL_SELECT_INPUT = 56U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C2_SDA_SELECT_INPUT = 57U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C3_SCL_SELECT_INPUT = 58U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C3_SDA_SELECT_INPUT = 59U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C4_SCL_SELECT_INPUT = 60U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C4_SDA_SELECT_INPUT = 61U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_PCS0_SELECT_INPUT = 62U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SCK_SELECT_INPUT = 63U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SDI_SELECT_INPUT = 64U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SDO_SELECT_INPUT = 65U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_PCS0_SELECT_INPUT = 66U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SCK_SELECT_INPUT = 67U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SDI_SELECT_INPUT = 68U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SDO_SELECT_INPUT = 69U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_PCS0_SELECT_INPUT = 70U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SCK_SELECT_INPUT = 71U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SDI_SELECT_INPUT = 72U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SDO_SELECT_INPUT = 73U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_PCS0_SELECT_INPUT = 74U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SCK_SELECT_INPUT = 75U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SDI_SELECT_INPUT = 76U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SDO_SELECT_INPUT = 77U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART2_RX_SELECT_INPUT = 78U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART2_TX_SELECT_INPUT = 79U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_CTS_B_SELECT_INPUT = 80U,      /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_RX_SELECT_INPUT = 81U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_TX_SELECT_INPUT = 82U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART4_RX_SELECT_INPUT = 83U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART4_TX_SELECT_INPUT = 84U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART5_RX_SELECT_INPUT = 85U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART5_TX_SELECT_INPUT = 86U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART6_RX_SELECT_INPUT = 87U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART6_TX_SELECT_INPUT = 88U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART7_RX_SELECT_INPUT = 89U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART7_TX_SELECT_INPUT = 90U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART8_RX_SELECT_INPUT = 91U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART8_TX_SELECT_INPUT = 92U,         /**< IOMUXC select input index */
-    kIOMUXC_NMI_SELECT_INPUT        = 93U,         /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER0_SELECT_INPUT = 94U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER1_SELECT_INPUT = 95U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER2_SELECT_INPUT = 96U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER3_SELECT_INPUT = 97U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER0_SELECT_INPUT = 98U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER1_SELECT_INPUT = 99U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER2_SELECT_INPUT = 100U,    /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER3_SELECT_INPUT = 101U,    /**< IOMUXC select input index */
-    kIOMUXC_SAI1_MCLK2_SELECT_INPUT = 102U,        /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_BCLK_SELECT_INPUT = 103U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA0_SELECT_INPUT = 104U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA1_SELECT_INPUT = 105U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA2_SELECT_INPUT = 106U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA3_SELECT_INPUT = 107U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_SYNC_SELECT_INPUT = 108U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_TX_BCLK_SELECT_INPUT = 109U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_TX_SYNC_SELECT_INPUT = 110U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_MCLK2_SELECT_INPUT = 111U,        /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_BCLK_SELECT_INPUT = 112U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_DATA0_SELECT_INPUT = 113U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_SYNC_SELECT_INPUT = 114U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_TX_BCLK_SELECT_INPUT = 115U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_TX_SYNC_SELECT_INPUT = 116U,      /**< IOMUXC select input index */
-    kIOMUXC_SPDIF_IN_SELECT_INPUT   = 117U,        /**< IOMUXC select input index */
-    kIOMUXC_USB_OTG2_OC_SELECT_INPUT = 118U,       /**< IOMUXC select input index */
-    kIOMUXC_USB_OTG1_OC_SELECT_INPUT = 119U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC1_CD_B_SELECT_INPUT = 120U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC1_WP_SELECT_INPUT  = 121U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CLK_SELECT_INPUT = 122U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CD_B_SELECT_INPUT = 123U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CMD_SELECT_INPUT = 124U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA0_SELECT_INPUT = 125U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA1_SELECT_INPUT = 126U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA2_SELECT_INPUT = 127U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA3_SELECT_INPUT = 128U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA4_SELECT_INPUT = 129U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA5_SELECT_INPUT = 130U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA6_SELECT_INPUT = 131U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA7_SELECT_INPUT = 132U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_WP_SELECT_INPUT  = 133U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN02_SELECT_INPUT = 134U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN03_SELECT_INPUT = 135U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN04_SELECT_INPUT = 136U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN05_SELECT_INPUT = 137U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN06_SELECT_INPUT = 138U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN07_SELECT_INPUT = 139U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN08_SELECT_INPUT = 140U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN09_SELECT_INPUT = 141U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN17_SELECT_INPUT = 142U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN18_SELECT_INPUT = 143U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN20_SELECT_INPUT = 144U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN22_SELECT_INPUT = 145U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN23_SELECT_INPUT = 146U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN24_SELECT_INPUT = 147U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN14_SELECT_INPUT = 148U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN15_SELECT_INPUT = 149U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN16_SELECT_INPUT = 150U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN25_SELECT_INPUT = 151U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN19_SELECT_INPUT = 152U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN21_SELECT_INPUT = 153U,        /**< IOMUXC select input index */
+    kIOMUXC_ANATOP_USB_OTG1_ID_SELECT_INPUT = 0U,   /**< IOMUXC select input index */
+    kIOMUXC_ANATOP_USB_OTG2_ID_SELECT_INPUT = 1U,   /**< IOMUXC select input index */
+    kIOMUXC_CCM_PMIC_READY_SELECT_INPUT     = 2U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA02_SELECT_INPUT         = 3U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA03_SELECT_INPUT         = 4U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA04_SELECT_INPUT         = 5U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA05_SELECT_INPUT         = 6U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA06_SELECT_INPUT         = 7U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA07_SELECT_INPUT         = 8U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA08_SELECT_INPUT         = 9U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA09_SELECT_INPUT         = 10U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_HSYNC_SELECT_INPUT          = 11U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_PIXCLK_SELECT_INPUT         = 12U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_VSYNC_SELECT_INPUT          = 13U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_IPG_CLK_RMII_SELECT_INPUT  = 14U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_MDIO_SELECT_INPUT          = 15U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET0_RXDATA_SELECT_INPUT       = 16U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET1_RXDATA_SELECT_INPUT       = 17U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_RXEN_SELECT_INPUT          = 18U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_RXERR_SELECT_INPUT         = 19U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET0_TIMER_SELECT_INPUT        = 20U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_TXCLK_SELECT_INPUT         = 21U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXCAN1_RX_SELECT_INPUT        = 22U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXCAN2_RX_SELECT_INPUT        = 23U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA3_SELECT_INPUT     = 24U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA0_SELECT_INPUT     = 25U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA1_SELECT_INPUT     = 26U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA2_SELECT_INPUT     = 27U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB3_SELECT_INPUT     = 28U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB0_SELECT_INPUT     = 29U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB1_SELECT_INPUT     = 30U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB2_SELECT_INPUT     = 31U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA3_SELECT_INPUT     = 32U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA0_SELECT_INPUT     = 33U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA1_SELECT_INPUT     = 34U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA2_SELECT_INPUT     = 35U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB3_SELECT_INPUT     = 36U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB0_SELECT_INPUT     = 37U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB1_SELECT_INPUT     = 38U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB2_SELECT_INPUT     = 39U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA0_SELECT_INPUT     = 40U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT     = 41U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA2_SELECT_INPUT     = 42U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA3_SELECT_INPUT     = 43U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DQS_SELECT_INPUT       = 44U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA0_SELECT_INPUT     = 45U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA1_SELECT_INPUT     = 46U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA2_SELECT_INPUT     = 47U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA3_SELECT_INPUT     = 48U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA0_SELECT_INPUT     = 49U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA1_SELECT_INPUT     = 50U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA2_SELECT_INPUT     = 51U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA3_SELECT_INPUT     = 52U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_SCK_SELECT_INPUT       = 53U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C1_SCL_SELECT_INPUT         = 54U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C1_SDA_SELECT_INPUT         = 55U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C2_SCL_SELECT_INPUT         = 56U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C2_SDA_SELECT_INPUT         = 57U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C3_SCL_SELECT_INPUT         = 58U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C3_SDA_SELECT_INPUT         = 59U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C4_SCL_SELECT_INPUT         = 60U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C4_SDA_SELECT_INPUT         = 61U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_PCS0_SELECT_INPUT        = 62U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SCK_SELECT_INPUT         = 63U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SDI_SELECT_INPUT         = 64U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SDO_SELECT_INPUT         = 65U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_PCS0_SELECT_INPUT        = 66U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SCK_SELECT_INPUT         = 67U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SDI_SELECT_INPUT         = 68U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SDO_SELECT_INPUT         = 69U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_PCS0_SELECT_INPUT        = 70U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SCK_SELECT_INPUT         = 71U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SDI_SELECT_INPUT         = 72U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SDO_SELECT_INPUT         = 73U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_PCS0_SELECT_INPUT        = 74U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SCK_SELECT_INPUT         = 75U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SDI_SELECT_INPUT         = 76U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SDO_SELECT_INPUT         = 77U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART2_RX_SELECT_INPUT         = 78U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART2_TX_SELECT_INPUT         = 79U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_CTS_B_SELECT_INPUT      = 80U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_RX_SELECT_INPUT         = 81U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_TX_SELECT_INPUT         = 82U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART4_RX_SELECT_INPUT         = 83U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART4_TX_SELECT_INPUT         = 84U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART5_RX_SELECT_INPUT         = 85U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART5_TX_SELECT_INPUT         = 86U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART6_RX_SELECT_INPUT         = 87U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART6_TX_SELECT_INPUT         = 88U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART7_RX_SELECT_INPUT         = 89U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART7_TX_SELECT_INPUT         = 90U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART8_RX_SELECT_INPUT         = 91U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART8_TX_SELECT_INPUT         = 92U,  /**< IOMUXC select input index */
+    kIOMUXC_NMI_SELECT_INPUT                = 93U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER0_SELECT_INPUT     = 94U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER1_SELECT_INPUT     = 95U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER2_SELECT_INPUT     = 96U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER3_SELECT_INPUT     = 97U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER0_SELECT_INPUT     = 98U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER1_SELECT_INPUT     = 99U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER2_SELECT_INPUT     = 100U, /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER3_SELECT_INPUT     = 101U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_MCLK2_SELECT_INPUT         = 102U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_BCLK_SELECT_INPUT       = 103U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA0_SELECT_INPUT      = 104U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA1_SELECT_INPUT      = 105U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA2_SELECT_INPUT      = 106U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA3_SELECT_INPUT      = 107U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_SYNC_SELECT_INPUT       = 108U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_TX_BCLK_SELECT_INPUT       = 109U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_TX_SYNC_SELECT_INPUT       = 110U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_MCLK2_SELECT_INPUT         = 111U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_BCLK_SELECT_INPUT       = 112U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_DATA0_SELECT_INPUT      = 113U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_SYNC_SELECT_INPUT       = 114U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_TX_BCLK_SELECT_INPUT       = 115U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_TX_SYNC_SELECT_INPUT       = 116U, /**< IOMUXC select input index */
+    kIOMUXC_SPDIF_IN_SELECT_INPUT           = 117U, /**< IOMUXC select input index */
+    kIOMUXC_USB_OTG2_OC_SELECT_INPUT        = 118U, /**< IOMUXC select input index */
+    kIOMUXC_USB_OTG1_OC_SELECT_INPUT        = 119U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC1_CD_B_SELECT_INPUT        = 120U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC1_WP_SELECT_INPUT          = 121U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CLK_SELECT_INPUT         = 122U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CD_B_SELECT_INPUT        = 123U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CMD_SELECT_INPUT         = 124U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA0_SELECT_INPUT       = 125U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA1_SELECT_INPUT       = 126U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA2_SELECT_INPUT       = 127U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA3_SELECT_INPUT       = 128U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA4_SELECT_INPUT       = 129U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA5_SELECT_INPUT       = 130U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA6_SELECT_INPUT       = 131U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA7_SELECT_INPUT       = 132U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_WP_SELECT_INPUT          = 133U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN02_SELECT_INPUT         = 134U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN03_SELECT_INPUT         = 135U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN04_SELECT_INPUT         = 136U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN05_SELECT_INPUT         = 137U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN06_SELECT_INPUT         = 138U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN07_SELECT_INPUT         = 139U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN08_SELECT_INPUT         = 140U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN09_SELECT_INPUT         = 141U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN17_SELECT_INPUT         = 142U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN18_SELECT_INPUT         = 143U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN20_SELECT_INPUT         = 144U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN22_SELECT_INPUT         = 145U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN23_SELECT_INPUT         = 146U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN24_SELECT_INPUT         = 147U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN14_SELECT_INPUT         = 148U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN15_SELECT_INPUT         = 149U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN16_SELECT_INPUT         = 150U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN25_SELECT_INPUT         = 151U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN19_SELECT_INPUT         = 152U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN21_SELECT_INPUT         = 153U, /**< IOMUXC select input index */
 } iomuxc_select_input_t;
 
 typedef enum _xbar_input_signal
 {
-    kXBARA1_InputLogicLow           = 0|0x100U,    /**< LOGIC_LOW output assigned to XBARA1_IN0 input. */
-    kXBARA1_InputLogicHigh          = 1|0x100U,    /**< LOGIC_HIGH output assigned to XBARA1_IN1 input. */
-    kXBARA1_InputIomuxXbarIn02      = 2|0x100U,    /**< IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input. */
-    kXBARA1_InputIomuxXbarIn03      = 3|0x100U,    /**< IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input. */
-    kXBARA1_InputIomuxXbarInout04   = 4|0x100U,    /**< IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input. */
-    kXBARA1_InputIomuxXbarInout05   = 5|0x100U,    /**< IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input. */
-    kXBARA1_InputIomuxXbarInout06   = 6|0x100U,    /**< IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input. */
-    kXBARA1_InputIomuxXbarInout07   = 7|0x100U,    /**< IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input. */
-    kXBARA1_InputIomuxXbarInout08   = 8|0x100U,    /**< IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input. */
-    kXBARA1_InputIomuxXbarInout09   = 9|0x100U,    /**< IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input. */
-    kXBARA1_InputIomuxXbarInout10   = 10|0x100U,   /**< IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input. */
-    kXBARA1_InputIomuxXbarInout11   = 11|0x100U,   /**< IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input. */
-    kXBARA1_InputIomuxXbarInout12   = 12|0x100U,   /**< IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input. */
-    kXBARA1_InputIomuxXbarInout13   = 13|0x100U,   /**< IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input. */
-    kXBARA1_InputIomuxXbarInout14   = 14|0x100U,   /**< IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input. */
-    kXBARA1_InputIomuxXbarInout15   = 15|0x100U,   /**< IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input. */
-    kXBARA1_InputIomuxXbarInout16   = 16|0x100U,   /**< IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input. */
-    kXBARA1_InputIomuxXbarInout17   = 17|0x100U,   /**< IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input. */
-    kXBARA1_InputIomuxXbarInout18   = 18|0x100U,   /**< IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input. */
-    kXBARA1_InputIomuxXbarInout19   = 19|0x100U,   /**< IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input. */
-    kXBARA1_InputIomuxXbarIn20      = 20|0x100U,   /**< IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input. */
-    kXBARA1_InputIomuxXbarIn21      = 21|0x100U,   /**< IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input. */
-    kXBARA1_InputIomuxXbarIn22      = 22|0x100U,   /**< IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input. */
-    kXBARA1_InputIomuxXbarIn23      = 23|0x100U,   /**< IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input. */
-    kXBARA1_InputIomuxXbarIn24      = 24|0x100U,   /**< IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input. */
-    kXBARA1_InputIomuxXbarIn25      = 25|0x100U,   /**< IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input. */
-    kXBARA1_InputAcmp1Out           = 26|0x100U,   /**< ACMP1_OUT output assigned to XBARA1_IN26 input. */
-    kXBARA1_InputAcmp2Out           = 27|0x100U,   /**< ACMP2_OUT output assigned to XBARA1_IN27 input. */
-    kXBARA1_InputAcmp3Out           = 28|0x100U,   /**< ACMP3_OUT output assigned to XBARA1_IN28 input. */
-    kXBARA1_InputAcmp4Out           = 29|0x100U,   /**< ACMP4_OUT output assigned to XBARA1_IN29 input. */
-    kXBARA1_InputRESERVED30         = 30|0x100U,   /**< XBARA1_IN30 input is reserved. */
-    kXBARA1_InputRESERVED31         = 31|0x100U,   /**< XBARA1_IN31 input is reserved. */
-    kXBARA1_InputQtimer3Tmr0Output  = 32|0x100U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input. */
-    kXBARA1_InputQtimer3Tmr1Output  = 33|0x100U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input. */
-    kXBARA1_InputQtimer3Tmr2Output  = 34|0x100U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input. */
-    kXBARA1_InputQtimer3Tmr3Output  = 35|0x100U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input. */
-    kXBARA1_InputQtimer4Tmr0Output  = 36|0x100U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input. */
-    kXBARA1_InputQtimer4Tmr1Output  = 37|0x100U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input. */
-    kXBARA1_InputQtimer4Tmr2Output  = 38|0x100U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input. */
-    kXBARA1_InputQtimer4Tmr3Output  = 39|0x100U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input. */
-    kXBARA1_InputFlexpwm1Pwm1OutTrig01 = 40|0x100U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input. */
-    kXBARA1_InputFlexpwm1Pwm2OutTrig01 = 41|0x100U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input. */
-    kXBARA1_InputFlexpwm1Pwm3OutTrig01 = 42|0x100U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input. */
-    kXBARA1_InputFlexpwm1Pwm4OutTrig01 = 43|0x100U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input. */
-    kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 44|0x100U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input. */
-    kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 45|0x100U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input. */
-    kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 46|0x100U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input. */
-    kXBARA1_InputFlexpwm2Pwm4OutTrig01 = 47|0x100U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input. */
-    kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 48|0x100U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input. */
-    kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 49|0x100U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input. */
-    kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 50|0x100U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input. */
-    kXBARA1_InputFlexpwm3Pwm4OutTrig01 = 51|0x100U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input. */
-    kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 52|0x100U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input. */
-    kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 53|0x100U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input. */
-    kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 54|0x100U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input. */
-    kXBARA1_InputFlexpwm4Pwm4OutTrig01 = 55|0x100U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input. */
-    kXBARA1_InputPitTrigger0        = 56|0x100U,   /**< PIT_TRIGGER0 output assigned to XBARA1_IN56 input. */
-    kXBARA1_InputPitTrigger1        = 57|0x100U,   /**< PIT_TRIGGER1 output assigned to XBARA1_IN57 input. */
-    kXBARA1_InputPitTrigger2        = 58|0x100U,   /**< PIT_TRIGGER2 output assigned to XBARA1_IN58 input. */
-    kXBARA1_InputPitTrigger3        = 59|0x100U,   /**< PIT_TRIGGER3 output assigned to XBARA1_IN59 input. */
-    kXBARA1_InputEnc1PosMatch       = 60|0x100U,   /**< ENC1_POS_MATCH output assigned to XBARA1_IN60 input. */
-    kXBARA1_InputEnc2PosMatch       = 61|0x100U,   /**< ENC2_POS_MATCH output assigned to XBARA1_IN61 input. */
-    kXBARA1_InputEnc3PosMatch       = 62|0x100U,   /**< ENC3_POS_MATCH output assigned to XBARA1_IN62 input. */
-    kXBARA1_InputEnc4PosMatch       = 63|0x100U,   /**< ENC4_POS_MATCH output assigned to XBARA1_IN63 input. */
-    kXBARA1_InputDmaDone0           = 64|0x100U,   /**< DMA_DONE0 output assigned to XBARA1_IN64 input. */
-    kXBARA1_InputDmaDone1           = 65|0x100U,   /**< DMA_DONE1 output assigned to XBARA1_IN65 input. */
-    kXBARA1_InputDmaDone2           = 66|0x100U,   /**< DMA_DONE2 output assigned to XBARA1_IN66 input. */
-    kXBARA1_InputDmaDone3           = 67|0x100U,   /**< DMA_DONE3 output assigned to XBARA1_IN67 input. */
-    kXBARA1_InputDmaDone4           = 68|0x100U,   /**< DMA_DONE4 output assigned to XBARA1_IN68 input. */
-    kXBARA1_InputDmaDone5           = 69|0x100U,   /**< DMA_DONE5 output assigned to XBARA1_IN69 input. */
-    kXBARA1_InputDmaDone6           = 70|0x100U,   /**< DMA_DONE6 output assigned to XBARA1_IN70 input. */
-    kXBARA1_InputDmaDone7           = 71|0x100U,   /**< DMA_DONE7 output assigned to XBARA1_IN71 input. */
-    kXBARA1_InputAoi1Out0           = 72|0x100U,   /**< AOI1_OUT0 output assigned to XBARA1_IN72 input. */
-    kXBARA1_InputAoi1Out1           = 73|0x100U,   /**< AOI1_OUT1 output assigned to XBARA1_IN73 input. */
-    kXBARA1_InputAoi1Out2           = 74|0x100U,   /**< AOI1_OUT2 output assigned to XBARA1_IN74 input. */
-    kXBARA1_InputAoi1Out3           = 75|0x100U,   /**< AOI1_OUT3 output assigned to XBARA1_IN75 input. */
-    kXBARA1_InputAoi2Out0           = 76|0x100U,   /**< AOI2_OUT0 output assigned to XBARA1_IN76 input. */
-    kXBARA1_InputAoi2Out1           = 77|0x100U,   /**< AOI2_OUT1 output assigned to XBARA1_IN77 input. */
-    kXBARA1_InputAoi2Out2           = 78|0x100U,   /**< AOI2_OUT2 output assigned to XBARA1_IN78 input. */
-    kXBARA1_InputAoi2Out3           = 79|0x100U,   /**< AOI2_OUT3 output assigned to XBARA1_IN79 input. */
-    kXBARA1_InputAdcEtcXbar0Coco0   = 80|0x100U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input. */
-    kXBARA1_InputAdcEtcXbar0Coco1   = 81|0x100U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input. */
-    kXBARA1_InputAdcEtcXbar0Coco2   = 82|0x100U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input. */
-    kXBARA1_InputAdcEtcXbar0Coco3   = 83|0x100U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input. */
-    kXBARA1_InputAdcEtcXbar1Coco0   = 84|0x100U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input. */
-    kXBARA1_InputAdcEtcXbar1Coco1   = 85|0x100U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input. */
-    kXBARA1_InputAdcEtcXbar1Coco2   = 86|0x100U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input. */
-    kXBARA1_InputAdcEtcXbar1Coco3   = 87|0x100U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input. */
-    kXBARB2_InputLogicLow           = 0|0x200U,    /**< LOGIC_LOW output assigned to XBARB2_IN0 input. */
-    kXBARB2_InputLogicHigh          = 1|0x200U,    /**< LOGIC_HIGH output assigned to XBARB2_IN1 input. */
-    kXBARB2_InputRESERVED2          = 2|0x200U,    /**< XBARB2_IN2 input is reserved. */
-    kXBARB2_InputRESERVED3          = 3|0x200U,    /**< XBARB2_IN3 input is reserved. */
-    kXBARB2_InputRESERVED4          = 4|0x200U,    /**< XBARB2_IN4 input is reserved. */
-    kXBARB2_InputRESERVED5          = 5|0x200U,    /**< XBARB2_IN5 input is reserved. */
-    kXBARB2_InputAcmp1Out           = 6|0x200U,    /**< ACMP1_OUT output assigned to XBARB2_IN6 input. */
-    kXBARB2_InputAcmp2Out           = 7|0x200U,    /**< ACMP2_OUT output assigned to XBARB2_IN7 input. */
-    kXBARB2_InputAcmp3Out           = 8|0x200U,    /**< ACMP3_OUT output assigned to XBARB2_IN8 input. */
-    kXBARB2_InputAcmp4Out           = 9|0x200U,    /**< ACMP4_OUT output assigned to XBARB2_IN9 input. */
-    kXBARB2_InputRESERVED10         = 10|0x200U,   /**< XBARB2_IN10 input is reserved. */
-    kXBARB2_InputRESERVED11         = 11|0x200U,   /**< XBARB2_IN11 input is reserved. */
-    kXBARB2_InputQtimer3Tmr0Output  = 12|0x200U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input. */
-    kXBARB2_InputQtimer3Tmr1Output  = 13|0x200U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input. */
-    kXBARB2_InputQtimer3Tmr2Output  = 14|0x200U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input. */
-    kXBARB2_InputQtimer3Tmr3Output  = 15|0x200U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input. */
-    kXBARB2_InputQtimer4Tmr0Output  = 16|0x200U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input. */
-    kXBARB2_InputQtimer4Tmr1Output  = 17|0x200U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input. */
-    kXBARB2_InputQtimer4Tmr2Output  = 18|0x200U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input. */
-    kXBARB2_InputQtimer4Tmr3Output  = 19|0x200U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input. */
-    kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 20|0x200U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input. */
-    kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 21|0x200U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input. */
-    kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 22|0x200U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input. */
-    kXBARB2_InputFlexpwm1Pwm4OutTrig01 = 23|0x200U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input. */
-    kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 24|0x200U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input. */
-    kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 25|0x200U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input. */
-    kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 26|0x200U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input. */
-    kXBARB2_InputFlexpwm2Pwm4OutTrig01 = 27|0x200U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input. */
-    kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 28|0x200U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input. */
-    kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 29|0x200U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input. */
-    kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 30|0x200U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input. */
-    kXBARB2_InputFlexpwm3Pwm4OutTrig01 = 31|0x200U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input. */
-    kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 32|0x200U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input. */
-    kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 33|0x200U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input. */
-    kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 34|0x200U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input. */
-    kXBARB2_InputFlexpwm4Pwm4OutTrig01 = 35|0x200U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input. */
-    kXBARB2_InputPitTrigger0        = 36|0x200U,   /**< PIT_TRIGGER0 output assigned to XBARB2_IN36 input. */
-    kXBARB2_InputPitTrigger1        = 37|0x200U,   /**< PIT_TRIGGER1 output assigned to XBARB2_IN37 input. */
-    kXBARB2_InputAdcEtcXbar0Coco0   = 38|0x200U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input. */
-    kXBARB2_InputAdcEtcXbar0Coco1   = 39|0x200U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input. */
-    kXBARB2_InputAdcEtcXbar0Coco2   = 40|0x200U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input. */
-    kXBARB2_InputAdcEtcXbar0Coco3   = 41|0x200U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input. */
-    kXBARB2_InputAdcEtcXbar1Coco0   = 42|0x200U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input. */
-    kXBARB2_InputAdcEtcXbar1Coco1   = 43|0x200U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input. */
-    kXBARB2_InputAdcEtcXbar1Coco2   = 44|0x200U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input. */
-    kXBARB2_InputAdcEtcXbar1Coco3   = 45|0x200U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input. */
-    kXBARB2_InputEnc1PosMatch       = 46|0x200U,   /**< ENC1_POS_MATCH output assigned to XBARB2_IN46 input. */
-    kXBARB2_InputEnc2PosMatch       = 47|0x200U,   /**< ENC2_POS_MATCH output assigned to XBARB2_IN47 input. */
-    kXBARB2_InputEnc3PosMatch       = 48|0x200U,   /**< ENC3_POS_MATCH output assigned to XBARB2_IN48 input. */
-    kXBARB2_InputEnc4PosMatch       = 49|0x200U,   /**< ENC4_POS_MATCH output assigned to XBARB2_IN49 input. */
-    kXBARB2_InputDmaDone0           = 50|0x200U,   /**< DMA_DONE0 output assigned to XBARB2_IN50 input. */
-    kXBARB2_InputDmaDone1           = 51|0x200U,   /**< DMA_DONE1 output assigned to XBARB2_IN51 input. */
-    kXBARB2_InputDmaDone2           = 52|0x200U,   /**< DMA_DONE2 output assigned to XBARB2_IN52 input. */
-    kXBARB2_InputDmaDone3           = 53|0x200U,   /**< DMA_DONE3 output assigned to XBARB2_IN53 input. */
-    kXBARB2_InputDmaDone4           = 54|0x200U,   /**< DMA_DONE4 output assigned to XBARB2_IN54 input. */
-    kXBARB2_InputDmaDone5           = 55|0x200U,   /**< DMA_DONE5 output assigned to XBARB2_IN55 input. */
-    kXBARB2_InputDmaDone6           = 56|0x200U,   /**< DMA_DONE6 output assigned to XBARB2_IN56 input. */
-    kXBARB2_InputDmaDone7           = 57|0x200U,   /**< DMA_DONE7 output assigned to XBARB2_IN57 input. */
-    kXBARB3_InputLogicLow           = 0|0x300U,    /**< LOGIC_LOW output assigned to XBARB3_IN0 input. */
-    kXBARB3_InputLogicHigh          = 1|0x300U,    /**< LOGIC_HIGH output assigned to XBARB3_IN1 input. */
-    kXBARB3_InputRESERVED2          = 2|0x300U,    /**< XBARB3_IN2 input is reserved. */
-    kXBARB3_InputRESERVED3          = 3|0x300U,    /**< XBARB3_IN3 input is reserved. */
-    kXBARB3_InputRESERVED4          = 4|0x300U,    /**< XBARB3_IN4 input is reserved. */
-    kXBARB3_InputRESERVED5          = 5|0x300U,    /**< XBARB3_IN5 input is reserved. */
-    kXBARB3_InputAcmp1Out           = 6|0x300U,    /**< ACMP1_OUT output assigned to XBARB3_IN6 input. */
-    kXBARB3_InputAcmp2Out           = 7|0x300U,    /**< ACMP2_OUT output assigned to XBARB3_IN7 input. */
-    kXBARB3_InputAcmp3Out           = 8|0x300U,    /**< ACMP3_OUT output assigned to XBARB3_IN8 input. */
-    kXBARB3_InputAcmp4Out           = 9|0x300U,    /**< ACMP4_OUT output assigned to XBARB3_IN9 input. */
-    kXBARB3_InputRESERVED10         = 10|0x300U,   /**< XBARB3_IN10 input is reserved. */
-    kXBARB3_InputRESERVED11         = 11|0x300U,   /**< XBARB3_IN11 input is reserved. */
-    kXBARB3_InputQtimer3Tmr0Output  = 12|0x300U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input. */
-    kXBARB3_InputQtimer3Tmr1Output  = 13|0x300U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input. */
-    kXBARB3_InputQtimer3Tmr2Output  = 14|0x300U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input. */
-    kXBARB3_InputQtimer3Tmr3Output  = 15|0x300U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input. */
-    kXBARB3_InputQtimer4Tmr0Output  = 16|0x300U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input. */
-    kXBARB3_InputQtimer4Tmr1Output  = 17|0x300U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input. */
-    kXBARB3_InputQtimer4Tmr2Output  = 18|0x300U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input. */
-    kXBARB3_InputQtimer4Tmr3Output  = 19|0x300U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input. */
-    kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 20|0x300U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input. */
-    kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 21|0x300U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input. */
-    kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 22|0x300U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input. */
-    kXBARB3_InputFlexpwm1Pwm4OutTrig01 = 23|0x300U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input. */
-    kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 24|0x300U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input. */
-    kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 25|0x300U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input. */
-    kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 26|0x300U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input. */
-    kXBARB3_InputFlexpwm2Pwm4OutTrig01 = 27|0x300U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input. */
-    kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 28|0x300U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input. */
-    kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 29|0x300U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input. */
-    kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 30|0x300U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input. */
-    kXBARB3_InputFlexpwm3Pwm4OutTrig01 = 31|0x300U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input. */
-    kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 32|0x300U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input. */
-    kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 33|0x300U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input. */
-    kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 34|0x300U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input. */
-    kXBARB3_InputFlexpwm4Pwm4OutTrig01 = 35|0x300U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input. */
-    kXBARB3_InputPitTrigger0        = 36|0x300U,   /**< PIT_TRIGGER0 output assigned to XBARB3_IN36 input. */
-    kXBARB3_InputPitTrigger1        = 37|0x300U,   /**< PIT_TRIGGER1 output assigned to XBARB3_IN37 input. */
-    kXBARB3_InputAdcEtcXbar0Coco0   = 38|0x300U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input. */
-    kXBARB3_InputAdcEtcXbar0Coco1   = 39|0x300U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input. */
-    kXBARB3_InputAdcEtcXbar0Coco2   = 40|0x300U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input. */
-    kXBARB3_InputAdcEtcXbar0Coco3   = 41|0x300U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input. */
-    kXBARB3_InputAdcEtcXbar1Coco0   = 42|0x300U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input. */
-    kXBARB3_InputAdcEtcXbar1Coco1   = 43|0x300U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input. */
-    kXBARB3_InputAdcEtcXbar1Coco2   = 44|0x300U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input. */
-    kXBARB3_InputAdcEtcXbar1Coco3   = 45|0x300U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input. */
-    kXBARB3_InputEnc1PosMatch       = 46|0x300U,   /**< ENC1_POS_MATCH output assigned to XBARB3_IN46 input. */
-    kXBARB3_InputEnc2PosMatch       = 47|0x300U,   /**< ENC2_POS_MATCH output assigned to XBARB3_IN47 input. */
-    kXBARB3_InputEnc3PosMatch       = 48|0x300U,   /**< ENC3_POS_MATCH output assigned to XBARB3_IN48 input. */
-    kXBARB3_InputEnc4PosMatch       = 49|0x300U,   /**< ENC4_POS_MATCH output assigned to XBARB3_IN49 input. */
-    kXBARB3_InputDmaDone0           = 50|0x300U,   /**< DMA_DONE0 output assigned to XBARB3_IN50 input. */
-    kXBARB3_InputDmaDone1           = 51|0x300U,   /**< DMA_DONE1 output assigned to XBARB3_IN51 input. */
-    kXBARB3_InputDmaDone2           = 52|0x300U,   /**< DMA_DONE2 output assigned to XBARB3_IN52 input. */
-    kXBARB3_InputDmaDone3           = 53|0x300U,   /**< DMA_DONE3 output assigned to XBARB3_IN53 input. */
-    kXBARB3_InputDmaDone4           = 54|0x300U,   /**< DMA_DONE4 output assigned to XBARB3_IN54 input. */
-    kXBARB3_InputDmaDone5           = 55|0x300U,   /**< DMA_DONE5 output assigned to XBARB3_IN55 input. */
-    kXBARB3_InputDmaDone6           = 56|0x300U,   /**< DMA_DONE6 output assigned to XBARB3_IN56 input. */
-    kXBARB3_InputDmaDone7           = 57|0x300U,   /**< DMA_DONE7 output assigned to XBARB3_IN57 input. */
+    kXBARA1_InputLogicLow          = 0 | 0x100U,  /**< LOGIC_LOW output assigned to XBARA1_IN0 input. */
+    kXBARA1_InputLogicHigh         = 1 | 0x100U,  /**< LOGIC_HIGH output assigned to XBARA1_IN1 input. */
+    kXBARA1_InputIomuxXbarIn02     = 2 | 0x100U,  /**< IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input. */
+    kXBARA1_InputIomuxXbarIn03     = 3 | 0x100U,  /**< IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input. */
+    kXBARA1_InputIomuxXbarInout04  = 4 | 0x100U,  /**< IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input. */
+    kXBARA1_InputIomuxXbarInout05  = 5 | 0x100U,  /**< IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input. */
+    kXBARA1_InputIomuxXbarInout06  = 6 | 0x100U,  /**< IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input. */
+    kXBARA1_InputIomuxXbarInout07  = 7 | 0x100U,  /**< IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input. */
+    kXBARA1_InputIomuxXbarInout08  = 8 | 0x100U,  /**< IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input. */
+    kXBARA1_InputIomuxXbarInout09  = 9 | 0x100U,  /**< IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input. */
+    kXBARA1_InputIomuxXbarInout10  = 10 | 0x100U, /**< IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input. */
+    kXBARA1_InputIomuxXbarInout11  = 11 | 0x100U, /**< IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input. */
+    kXBARA1_InputIomuxXbarInout12  = 12 | 0x100U, /**< IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input. */
+    kXBARA1_InputIomuxXbarInout13  = 13 | 0x100U, /**< IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input. */
+    kXBARA1_InputIomuxXbarInout14  = 14 | 0x100U, /**< IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input. */
+    kXBARA1_InputIomuxXbarInout15  = 15 | 0x100U, /**< IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input. */
+    kXBARA1_InputIomuxXbarInout16  = 16 | 0x100U, /**< IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input. */
+    kXBARA1_InputIomuxXbarInout17  = 17 | 0x100U, /**< IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input. */
+    kXBARA1_InputIomuxXbarInout18  = 18 | 0x100U, /**< IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input. */
+    kXBARA1_InputIomuxXbarInout19  = 19 | 0x100U, /**< IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input. */
+    kXBARA1_InputIomuxXbarIn20     = 20 | 0x100U, /**< IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input. */
+    kXBARA1_InputIomuxXbarIn21     = 21 | 0x100U, /**< IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input. */
+    kXBARA1_InputIomuxXbarIn22     = 22 | 0x100U, /**< IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input. */
+    kXBARA1_InputIomuxXbarIn23     = 23 | 0x100U, /**< IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input. */
+    kXBARA1_InputIomuxXbarIn24     = 24 | 0x100U, /**< IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input. */
+    kXBARA1_InputIomuxXbarIn25     = 25 | 0x100U, /**< IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input. */
+    kXBARA1_InputAcmp1Out          = 26 | 0x100U, /**< ACMP1_OUT output assigned to XBARA1_IN26 input. */
+    kXBARA1_InputAcmp2Out          = 27 | 0x100U, /**< ACMP2_OUT output assigned to XBARA1_IN27 input. */
+    kXBARA1_InputAcmp3Out          = 28 | 0x100U, /**< ACMP3_OUT output assigned to XBARA1_IN28 input. */
+    kXBARA1_InputAcmp4Out          = 29 | 0x100U, /**< ACMP4_OUT output assigned to XBARA1_IN29 input. */
+    kXBARA1_InputRESERVED30        = 30 | 0x100U, /**< XBARA1_IN30 input is reserved. */
+    kXBARA1_InputRESERVED31        = 31 | 0x100U, /**< XBARA1_IN31 input is reserved. */
+    kXBARA1_InputQtimer3Tmr0Output = 32 | 0x100U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input. */
+    kXBARA1_InputQtimer3Tmr1Output = 33 | 0x100U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input. */
+    kXBARA1_InputQtimer3Tmr2Output = 34 | 0x100U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input. */
+    kXBARA1_InputQtimer3Tmr3Output = 35 | 0x100U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input. */
+    kXBARA1_InputQtimer4Tmr0Output = 36 | 0x100U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input. */
+    kXBARA1_InputQtimer4Tmr1Output = 37 | 0x100U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input. */
+    kXBARA1_InputQtimer4Tmr2Output = 38 | 0x100U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input. */
+    kXBARA1_InputQtimer4Tmr3Output = 39 | 0x100U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input. */
+    kXBARA1_InputFlexpwm1Pwm1OutTrig01 =
+        40 | 0x100U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input. */
+    kXBARA1_InputFlexpwm1Pwm2OutTrig01 =
+        41 | 0x100U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input. */
+    kXBARA1_InputFlexpwm1Pwm3OutTrig01 =
+        42 | 0x100U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input. */
+    kXBARA1_InputFlexpwm1Pwm4OutTrig01 =
+        43 | 0x100U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input. */
+    kXBARA1_InputFlexpwm2Pwm1OutTrig01 =
+        44 | 0x100U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input. */
+    kXBARA1_InputFlexpwm2Pwm2OutTrig01 =
+        45 | 0x100U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input. */
+    kXBARA1_InputFlexpwm2Pwm3OutTrig01 =
+        46 | 0x100U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input. */
+    kXBARA1_InputFlexpwm2Pwm4OutTrig01 =
+        47 | 0x100U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input. */
+    kXBARA1_InputFlexpwm3Pwm1OutTrig01 =
+        48 | 0x100U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input. */
+    kXBARA1_InputFlexpwm3Pwm2OutTrig01 =
+        49 | 0x100U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input. */
+    kXBARA1_InputFlexpwm3Pwm3OutTrig01 =
+        50 | 0x100U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input. */
+    kXBARA1_InputFlexpwm3Pwm4OutTrig01 =
+        51 | 0x100U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input. */
+    kXBARA1_InputFlexpwm4Pwm1OutTrig01 =
+        52 | 0x100U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input. */
+    kXBARA1_InputFlexpwm4Pwm2OutTrig01 =
+        53 | 0x100U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input. */
+    kXBARA1_InputFlexpwm4Pwm3OutTrig01 =
+        54 | 0x100U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input. */
+    kXBARA1_InputFlexpwm4Pwm4OutTrig01 =
+        55 | 0x100U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input. */
+    kXBARA1_InputPitTrigger0       = 56 | 0x100U, /**< PIT_TRIGGER0 output assigned to XBARA1_IN56 input. */
+    kXBARA1_InputPitTrigger1       = 57 | 0x100U, /**< PIT_TRIGGER1 output assigned to XBARA1_IN57 input. */
+    kXBARA1_InputPitTrigger2       = 58 | 0x100U, /**< PIT_TRIGGER2 output assigned to XBARA1_IN58 input. */
+    kXBARA1_InputPitTrigger3       = 59 | 0x100U, /**< PIT_TRIGGER3 output assigned to XBARA1_IN59 input. */
+    kXBARA1_InputEnc1PosMatch      = 60 | 0x100U, /**< ENC1_POS_MATCH output assigned to XBARA1_IN60 input. */
+    kXBARA1_InputEnc2PosMatch      = 61 | 0x100U, /**< ENC2_POS_MATCH output assigned to XBARA1_IN61 input. */
+    kXBARA1_InputEnc3PosMatch      = 62 | 0x100U, /**< ENC3_POS_MATCH output assigned to XBARA1_IN62 input. */
+    kXBARA1_InputEnc4PosMatch      = 63 | 0x100U, /**< ENC4_POS_MATCH output assigned to XBARA1_IN63 input. */
+    kXBARA1_InputDmaDone0          = 64 | 0x100U, /**< DMA_DONE0 output assigned to XBARA1_IN64 input. */
+    kXBARA1_InputDmaDone1          = 65 | 0x100U, /**< DMA_DONE1 output assigned to XBARA1_IN65 input. */
+    kXBARA1_InputDmaDone2          = 66 | 0x100U, /**< DMA_DONE2 output assigned to XBARA1_IN66 input. */
+    kXBARA1_InputDmaDone3          = 67 | 0x100U, /**< DMA_DONE3 output assigned to XBARA1_IN67 input. */
+    kXBARA1_InputDmaDone4          = 68 | 0x100U, /**< DMA_DONE4 output assigned to XBARA1_IN68 input. */
+    kXBARA1_InputDmaDone5          = 69 | 0x100U, /**< DMA_DONE5 output assigned to XBARA1_IN69 input. */
+    kXBARA1_InputDmaDone6          = 70 | 0x100U, /**< DMA_DONE6 output assigned to XBARA1_IN70 input. */
+    kXBARA1_InputDmaDone7          = 71 | 0x100U, /**< DMA_DONE7 output assigned to XBARA1_IN71 input. */
+    kXBARA1_InputAoi1Out0          = 72 | 0x100U, /**< AOI1_OUT0 output assigned to XBARA1_IN72 input. */
+    kXBARA1_InputAoi1Out1          = 73 | 0x100U, /**< AOI1_OUT1 output assigned to XBARA1_IN73 input. */
+    kXBARA1_InputAoi1Out2          = 74 | 0x100U, /**< AOI1_OUT2 output assigned to XBARA1_IN74 input. */
+    kXBARA1_InputAoi1Out3          = 75 | 0x100U, /**< AOI1_OUT3 output assigned to XBARA1_IN75 input. */
+    kXBARA1_InputAoi2Out0          = 76 | 0x100U, /**< AOI2_OUT0 output assigned to XBARA1_IN76 input. */
+    kXBARA1_InputAoi2Out1          = 77 | 0x100U, /**< AOI2_OUT1 output assigned to XBARA1_IN77 input. */
+    kXBARA1_InputAoi2Out2          = 78 | 0x100U, /**< AOI2_OUT2 output assigned to XBARA1_IN78 input. */
+    kXBARA1_InputAoi2Out3          = 79 | 0x100U, /**< AOI2_OUT3 output assigned to XBARA1_IN79 input. */
+    kXBARA1_InputAdcEtcXbar0Coco0  = 80 | 0x100U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input. */
+    kXBARA1_InputAdcEtcXbar0Coco1  = 81 | 0x100U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input. */
+    kXBARA1_InputAdcEtcXbar0Coco2  = 82 | 0x100U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input. */
+    kXBARA1_InputAdcEtcXbar0Coco3  = 83 | 0x100U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input. */
+    kXBARA1_InputAdcEtcXbar1Coco0  = 84 | 0x100U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input. */
+    kXBARA1_InputAdcEtcXbar1Coco1  = 85 | 0x100U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input. */
+    kXBARA1_InputAdcEtcXbar1Coco2  = 86 | 0x100U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input. */
+    kXBARA1_InputAdcEtcXbar1Coco3  = 87 | 0x100U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input. */
+    kXBARB2_InputLogicLow          = 0 | 0x200U,  /**< LOGIC_LOW output assigned to XBARB2_IN0 input. */
+    kXBARB2_InputLogicHigh         = 1 | 0x200U,  /**< LOGIC_HIGH output assigned to XBARB2_IN1 input. */
+    kXBARB2_InputRESERVED2         = 2 | 0x200U,  /**< XBARB2_IN2 input is reserved. */
+    kXBARB2_InputRESERVED3         = 3 | 0x200U,  /**< XBARB2_IN3 input is reserved. */
+    kXBARB2_InputRESERVED4         = 4 | 0x200U,  /**< XBARB2_IN4 input is reserved. */
+    kXBARB2_InputRESERVED5         = 5 | 0x200U,  /**< XBARB2_IN5 input is reserved. */
+    kXBARB2_InputAcmp1Out          = 6 | 0x200U,  /**< ACMP1_OUT output assigned to XBARB2_IN6 input. */
+    kXBARB2_InputAcmp2Out          = 7 | 0x200U,  /**< ACMP2_OUT output assigned to XBARB2_IN7 input. */
+    kXBARB2_InputAcmp3Out          = 8 | 0x200U,  /**< ACMP3_OUT output assigned to XBARB2_IN8 input. */
+    kXBARB2_InputAcmp4Out          = 9 | 0x200U,  /**< ACMP4_OUT output assigned to XBARB2_IN9 input. */
+    kXBARB2_InputRESERVED10        = 10 | 0x200U, /**< XBARB2_IN10 input is reserved. */
+    kXBARB2_InputRESERVED11        = 11 | 0x200U, /**< XBARB2_IN11 input is reserved. */
+    kXBARB2_InputQtimer3Tmr0Output = 12 | 0x200U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input. */
+    kXBARB2_InputQtimer3Tmr1Output = 13 | 0x200U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input. */
+    kXBARB2_InputQtimer3Tmr2Output = 14 | 0x200U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input. */
+    kXBARB2_InputQtimer3Tmr3Output = 15 | 0x200U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input. */
+    kXBARB2_InputQtimer4Tmr0Output = 16 | 0x200U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input. */
+    kXBARB2_InputQtimer4Tmr1Output = 17 | 0x200U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input. */
+    kXBARB2_InputQtimer4Tmr2Output = 18 | 0x200U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input. */
+    kXBARB2_InputQtimer4Tmr3Output = 19 | 0x200U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input. */
+    kXBARB2_InputFlexpwm1Pwm1OutTrig01 =
+        20 | 0x200U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input. */
+    kXBARB2_InputFlexpwm1Pwm2OutTrig01 =
+        21 | 0x200U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input. */
+    kXBARB2_InputFlexpwm1Pwm3OutTrig01 =
+        22 | 0x200U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input. */
+    kXBARB2_InputFlexpwm1Pwm4OutTrig01 =
+        23 | 0x200U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input. */
+    kXBARB2_InputFlexpwm2Pwm1OutTrig01 =
+        24 | 0x200U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input. */
+    kXBARB2_InputFlexpwm2Pwm2OutTrig01 =
+        25 | 0x200U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input. */
+    kXBARB2_InputFlexpwm2Pwm3OutTrig01 =
+        26 | 0x200U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input. */
+    kXBARB2_InputFlexpwm2Pwm4OutTrig01 =
+        27 | 0x200U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input. */
+    kXBARB2_InputFlexpwm3Pwm1OutTrig01 =
+        28 | 0x200U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input. */
+    kXBARB2_InputFlexpwm3Pwm2OutTrig01 =
+        29 | 0x200U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input. */
+    kXBARB2_InputFlexpwm3Pwm3OutTrig01 =
+        30 | 0x200U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input. */
+    kXBARB2_InputFlexpwm3Pwm4OutTrig01 =
+        31 | 0x200U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input. */
+    kXBARB2_InputFlexpwm4Pwm1OutTrig01 =
+        32 | 0x200U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input. */
+    kXBARB2_InputFlexpwm4Pwm2OutTrig01 =
+        33 | 0x200U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input. */
+    kXBARB2_InputFlexpwm4Pwm3OutTrig01 =
+        34 | 0x200U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input. */
+    kXBARB2_InputFlexpwm4Pwm4OutTrig01 =
+        35 | 0x200U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input. */
+    kXBARB2_InputPitTrigger0       = 36 | 0x200U, /**< PIT_TRIGGER0 output assigned to XBARB2_IN36 input. */
+    kXBARB2_InputPitTrigger1       = 37 | 0x200U, /**< PIT_TRIGGER1 output assigned to XBARB2_IN37 input. */
+    kXBARB2_InputAdcEtcXbar0Coco0  = 38 | 0x200U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input. */
+    kXBARB2_InputAdcEtcXbar0Coco1  = 39 | 0x200U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input. */
+    kXBARB2_InputAdcEtcXbar0Coco2  = 40 | 0x200U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input. */
+    kXBARB2_InputAdcEtcXbar0Coco3  = 41 | 0x200U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input. */
+    kXBARB2_InputAdcEtcXbar1Coco0  = 42 | 0x200U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input. */
+    kXBARB2_InputAdcEtcXbar1Coco1  = 43 | 0x200U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input. */
+    kXBARB2_InputAdcEtcXbar1Coco2  = 44 | 0x200U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input. */
+    kXBARB2_InputAdcEtcXbar1Coco3  = 45 | 0x200U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input. */
+    kXBARB2_InputEnc1PosMatch      = 46 | 0x200U, /**< ENC1_POS_MATCH output assigned to XBARB2_IN46 input. */
+    kXBARB2_InputEnc2PosMatch      = 47 | 0x200U, /**< ENC2_POS_MATCH output assigned to XBARB2_IN47 input. */
+    kXBARB2_InputEnc3PosMatch      = 48 | 0x200U, /**< ENC3_POS_MATCH output assigned to XBARB2_IN48 input. */
+    kXBARB2_InputEnc4PosMatch      = 49 | 0x200U, /**< ENC4_POS_MATCH output assigned to XBARB2_IN49 input. */
+    kXBARB2_InputDmaDone0          = 50 | 0x200U, /**< DMA_DONE0 output assigned to XBARB2_IN50 input. */
+    kXBARB2_InputDmaDone1          = 51 | 0x200U, /**< DMA_DONE1 output assigned to XBARB2_IN51 input. */
+    kXBARB2_InputDmaDone2          = 52 | 0x200U, /**< DMA_DONE2 output assigned to XBARB2_IN52 input. */
+    kXBARB2_InputDmaDone3          = 53 | 0x200U, /**< DMA_DONE3 output assigned to XBARB2_IN53 input. */
+    kXBARB2_InputDmaDone4          = 54 | 0x200U, /**< DMA_DONE4 output assigned to XBARB2_IN54 input. */
+    kXBARB2_InputDmaDone5          = 55 | 0x200U, /**< DMA_DONE5 output assigned to XBARB2_IN55 input. */
+    kXBARB2_InputDmaDone6          = 56 | 0x200U, /**< DMA_DONE6 output assigned to XBARB2_IN56 input. */
+    kXBARB2_InputDmaDone7          = 57 | 0x200U, /**< DMA_DONE7 output assigned to XBARB2_IN57 input. */
+    kXBARB3_InputLogicLow          = 0 | 0x300U,  /**< LOGIC_LOW output assigned to XBARB3_IN0 input. */
+    kXBARB3_InputLogicHigh         = 1 | 0x300U,  /**< LOGIC_HIGH output assigned to XBARB3_IN1 input. */
+    kXBARB3_InputRESERVED2         = 2 | 0x300U,  /**< XBARB3_IN2 input is reserved. */
+    kXBARB3_InputRESERVED3         = 3 | 0x300U,  /**< XBARB3_IN3 input is reserved. */
+    kXBARB3_InputRESERVED4         = 4 | 0x300U,  /**< XBARB3_IN4 input is reserved. */
+    kXBARB3_InputRESERVED5         = 5 | 0x300U,  /**< XBARB3_IN5 input is reserved. */
+    kXBARB3_InputAcmp1Out          = 6 | 0x300U,  /**< ACMP1_OUT output assigned to XBARB3_IN6 input. */
+    kXBARB3_InputAcmp2Out          = 7 | 0x300U,  /**< ACMP2_OUT output assigned to XBARB3_IN7 input. */
+    kXBARB3_InputAcmp3Out          = 8 | 0x300U,  /**< ACMP3_OUT output assigned to XBARB3_IN8 input. */
+    kXBARB3_InputAcmp4Out          = 9 | 0x300U,  /**< ACMP4_OUT output assigned to XBARB3_IN9 input. */
+    kXBARB3_InputRESERVED10        = 10 | 0x300U, /**< XBARB3_IN10 input is reserved. */
+    kXBARB3_InputRESERVED11        = 11 | 0x300U, /**< XBARB3_IN11 input is reserved. */
+    kXBARB3_InputQtimer3Tmr0Output = 12 | 0x300U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input. */
+    kXBARB3_InputQtimer3Tmr1Output = 13 | 0x300U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input. */
+    kXBARB3_InputQtimer3Tmr2Output = 14 | 0x300U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input. */
+    kXBARB3_InputQtimer3Tmr3Output = 15 | 0x300U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input. */
+    kXBARB3_InputQtimer4Tmr0Output = 16 | 0x300U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input. */
+    kXBARB3_InputQtimer4Tmr1Output = 17 | 0x300U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input. */
+    kXBARB3_InputQtimer4Tmr2Output = 18 | 0x300U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input. */
+    kXBARB3_InputQtimer4Tmr3Output = 19 | 0x300U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input. */
+    kXBARB3_InputFlexpwm1Pwm1OutTrig01 =
+        20 | 0x300U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input. */
+    kXBARB3_InputFlexpwm1Pwm2OutTrig01 =
+        21 | 0x300U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input. */
+    kXBARB3_InputFlexpwm1Pwm3OutTrig01 =
+        22 | 0x300U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input. */
+    kXBARB3_InputFlexpwm1Pwm4OutTrig01 =
+        23 | 0x300U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input. */
+    kXBARB3_InputFlexpwm2Pwm1OutTrig01 =
+        24 | 0x300U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input. */
+    kXBARB3_InputFlexpwm2Pwm2OutTrig01 =
+        25 | 0x300U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input. */
+    kXBARB3_InputFlexpwm2Pwm3OutTrig01 =
+        26 | 0x300U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input. */
+    kXBARB3_InputFlexpwm2Pwm4OutTrig01 =
+        27 | 0x300U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input. */
+    kXBARB3_InputFlexpwm3Pwm1OutTrig01 =
+        28 | 0x300U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input. */
+    kXBARB3_InputFlexpwm3Pwm2OutTrig01 =
+        29 | 0x300U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input. */
+    kXBARB3_InputFlexpwm3Pwm3OutTrig01 =
+        30 | 0x300U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input. */
+    kXBARB3_InputFlexpwm3Pwm4OutTrig01 =
+        31 | 0x300U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input. */
+    kXBARB3_InputFlexpwm4Pwm1OutTrig01 =
+        32 | 0x300U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input. */
+    kXBARB3_InputFlexpwm4Pwm2OutTrig01 =
+        33 | 0x300U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input. */
+    kXBARB3_InputFlexpwm4Pwm3OutTrig01 =
+        34 | 0x300U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input. */
+    kXBARB3_InputFlexpwm4Pwm4OutTrig01 =
+        35 | 0x300U,                             /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input. */
+    kXBARB3_InputPitTrigger0      = 36 | 0x300U, /**< PIT_TRIGGER0 output assigned to XBARB3_IN36 input. */
+    kXBARB3_InputPitTrigger1      = 37 | 0x300U, /**< PIT_TRIGGER1 output assigned to XBARB3_IN37 input. */
+    kXBARB3_InputAdcEtcXbar0Coco0 = 38 | 0x300U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input. */
+    kXBARB3_InputAdcEtcXbar0Coco1 = 39 | 0x300U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input. */
+    kXBARB3_InputAdcEtcXbar0Coco2 = 40 | 0x300U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input. */
+    kXBARB3_InputAdcEtcXbar0Coco3 = 41 | 0x300U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input. */
+    kXBARB3_InputAdcEtcXbar1Coco0 = 42 | 0x300U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input. */
+    kXBARB3_InputAdcEtcXbar1Coco1 = 43 | 0x300U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input. */
+    kXBARB3_InputAdcEtcXbar1Coco2 = 44 | 0x300U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input. */
+    kXBARB3_InputAdcEtcXbar1Coco3 = 45 | 0x300U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input. */
+    kXBARB3_InputEnc1PosMatch     = 46 | 0x300U, /**< ENC1_POS_MATCH output assigned to XBARB3_IN46 input. */
+    kXBARB3_InputEnc2PosMatch     = 47 | 0x300U, /**< ENC2_POS_MATCH output assigned to XBARB3_IN47 input. */
+    kXBARB3_InputEnc3PosMatch     = 48 | 0x300U, /**< ENC3_POS_MATCH output assigned to XBARB3_IN48 input. */
+    kXBARB3_InputEnc4PosMatch     = 49 | 0x300U, /**< ENC4_POS_MATCH output assigned to XBARB3_IN49 input. */
+    kXBARB3_InputDmaDone0         = 50 | 0x300U, /**< DMA_DONE0 output assigned to XBARB3_IN50 input. */
+    kXBARB3_InputDmaDone1         = 51 | 0x300U, /**< DMA_DONE1 output assigned to XBARB3_IN51 input. */
+    kXBARB3_InputDmaDone2         = 52 | 0x300U, /**< DMA_DONE2 output assigned to XBARB3_IN52 input. */
+    kXBARB3_InputDmaDone3         = 53 | 0x300U, /**< DMA_DONE3 output assigned to XBARB3_IN53 input. */
+    kXBARB3_InputDmaDone4         = 54 | 0x300U, /**< DMA_DONE4 output assigned to XBARB3_IN54 input. */
+    kXBARB3_InputDmaDone5         = 55 | 0x300U, /**< DMA_DONE5 output assigned to XBARB3_IN55 input. */
+    kXBARB3_InputDmaDone6         = 56 | 0x300U, /**< DMA_DONE6 output assigned to XBARB3_IN56 input. */
+    kXBARB3_InputDmaDone7         = 57 | 0x300U, /**< DMA_DONE7 output assigned to XBARB3_IN57 input. */
 } xbar_input_signal_t;
 
 typedef enum _xbar_output_signal
 {
-    kXBARA1_OutputDmaChMuxReq30     = 0|0x100U,    /**< XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30 */
-    kXBARA1_OutputDmaChMuxReq31     = 1|0x100U,    /**< XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31 */
-    kXBARA1_OutputDmaChMuxReq94     = 2|0x100U,    /**< XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94 */
-    kXBARA1_OutputDmaChMuxReq95     = 3|0x100U,    /**< XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95 */
-    kXBARA1_OutputIomuxXbarInout04  = 4|0x100U,    /**< XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04 */
-    kXBARA1_OutputIomuxXbarInout05  = 5|0x100U,    /**< XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05 */
-    kXBARA1_OutputIomuxXbarInout06  = 6|0x100U,    /**< XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06 */
-    kXBARA1_OutputIomuxXbarInout07  = 7|0x100U,    /**< XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07 */
-    kXBARA1_OutputIomuxXbarInout08  = 8|0x100U,    /**< XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08 */
-    kXBARA1_OutputIomuxXbarInout09  = 9|0x100U,    /**< XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09 */
-    kXBARA1_OutputIomuxXbarInout10  = 10|0x100U,   /**< XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10 */
-    kXBARA1_OutputIomuxXbarInout11  = 11|0x100U,   /**< XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11 */
-    kXBARA1_OutputIomuxXbarInout12  = 12|0x100U,   /**< XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12 */
-    kXBARA1_OutputIomuxXbarInout13  = 13|0x100U,   /**< XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13 */
-    kXBARA1_OutputIomuxXbarInout14  = 14|0x100U,   /**< XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14 */
-    kXBARA1_OutputIomuxXbarInout15  = 15|0x100U,   /**< XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15 */
-    kXBARA1_OutputIomuxXbarInout16  = 16|0x100U,   /**< XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16 */
-    kXBARA1_OutputIomuxXbarInout17  = 17|0x100U,   /**< XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17 */
-    kXBARA1_OutputIomuxXbarInout18  = 18|0x100U,   /**< XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18 */
-    kXBARA1_OutputIomuxXbarInout19  = 19|0x100U,   /**< XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19 */
-    kXBARA1_OutputAcmp1Sample       = 20|0x100U,   /**< XBARA1_OUT20 output assigned to ACMP1_SAMPLE */
-    kXBARA1_OutputAcmp2Sample       = 21|0x100U,   /**< XBARA1_OUT21 output assigned to ACMP2_SAMPLE */
-    kXBARA1_OutputAcmp3Sample       = 22|0x100U,   /**< XBARA1_OUT22 output assigned to ACMP3_SAMPLE */
-    kXBARA1_OutputAcmp4Sample       = 23|0x100U,   /**< XBARA1_OUT23 output assigned to ACMP4_SAMPLE */
-    kXBARA1_OutputRESERVED24        = 24|0x100U,   /**< XBARA1_OUT24 output is reserved. */
-    kXBARA1_OutputRESERVED25        = 25|0x100U,   /**< XBARA1_OUT25 output is reserved. */
-    kXBARA1_OutputFlexpwm1Exta0     = 26|0x100U,   /**< XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0 */
-    kXBARA1_OutputFlexpwm1Exta1     = 27|0x100U,   /**< XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1 */
-    kXBARA1_OutputFlexpwm1Exta2     = 28|0x100U,   /**< XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2 */
-    kXBARA1_OutputFlexpwm1Exta3     = 29|0x100U,   /**< XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3 */
-    kXBARA1_OutputFlexpwm1ExtSync0  = 30|0x100U,   /**< XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm1ExtSync1  = 31|0x100U,   /**< XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm1ExtSync2  = 32|0x100U,   /**< XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm1ExtSync3  = 33|0x100U,   /**< XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm1ExtClk    = 34|0x100U,   /**< XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK */
-    kXBARA1_OutputFlexpwm1Fault0    = 35|0x100U,   /**< XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0 */
-    kXBARA1_OutputFlexpwm1Fault1    = 36|0x100U,   /**< XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1 */
-    kXBARA1_OutputFlexpwm1234Fault2 = 37|0x100U,   /**< XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2 */
-    kXBARA1_OutputFlexpwm1234Fault3 = 38|0x100U,   /**< XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3 */
-    kXBARA1_OutputFlexpwm1ExtForce  = 39|0x100U,   /**< XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE */
-    kXBARA1_OutputFlexpwm234Exta0   = 40|0x100U,   /**< XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0 */
-    kXBARA1_OutputFlexpwm234Exta1   = 41|0x100U,   /**< XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1 */
-    kXBARA1_OutputFlexpwm234Exta2   = 42|0x100U,   /**< XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2 */
-    kXBARA1_OutputFlexpwm234Exta3   = 43|0x100U,   /**< XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3 */
-    kXBARA1_OutputFlexpwm2ExtSync0  = 44|0x100U,   /**< XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm2ExtSync1  = 45|0x100U,   /**< XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm2ExtSync2  = 46|0x100U,   /**< XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm2ExtSync3  = 47|0x100U,   /**< XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm234ExtClk  = 48|0x100U,   /**< XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK */
-    kXBARA1_OutputFlexpwm2Fault0    = 49|0x100U,   /**< XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0 */
-    kXBARA1_OutputFlexpwm2Fault1    = 50|0x100U,   /**< XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1 */
-    kXBARA1_OutputFlexpwm2ExtForce  = 51|0x100U,   /**< XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE */
-    kXBARA1_OutputFlexpwm3ExtSync0  = 52|0x100U,   /**< XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm3ExtSync1  = 53|0x100U,   /**< XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm3ExtSync2  = 54|0x100U,   /**< XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm3ExtSync3  = 55|0x100U,   /**< XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm3Fault0    = 56|0x100U,   /**< XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0 */
-    kXBARA1_OutputFlexpwm3Fault1    = 57|0x100U,   /**< XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1 */
-    kXBARA1_OutputFlexpwm3ExtForce  = 58|0x100U,   /**< XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE */
-    kXBARA1_OutputFlexpwm4ExtSync0  = 59|0x100U,   /**< XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm4ExtSync1  = 60|0x100U,   /**< XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm4ExtSync2  = 61|0x100U,   /**< XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm4ExtSync3  = 62|0x100U,   /**< XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm4Fault0    = 63|0x100U,   /**< XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0 */
-    kXBARA1_OutputFlexpwm4Fault1    = 64|0x100U,   /**< XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1 */
-    kXBARA1_OutputFlexpwm4ExtForce  = 65|0x100U,   /**< XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE */
-    kXBARA1_OutputEnc1PhaseAInput   = 66|0x100U,   /**< XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT */
-    kXBARA1_OutputEnc1PhaseBInput   = 67|0x100U,   /**< XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT */
-    kXBARA1_OutputEnc1Index         = 68|0x100U,   /**< XBARA1_OUT68 output assigned to ENC1_INDEX */
-    kXBARA1_OutputEnc1Home          = 69|0x100U,   /**< XBARA1_OUT69 output assigned to ENC1_HOME */
-    kXBARA1_OutputEnc1Trigger       = 70|0x100U,   /**< XBARA1_OUT70 output assigned to ENC1_TRIGGER */
-    kXBARA1_OutputEnc2PhaseAInput   = 71|0x100U,   /**< XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT */
-    kXBARA1_OutputEnc2PhaseBInput   = 72|0x100U,   /**< XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT */
-    kXBARA1_OutputEnc2Index         = 73|0x100U,   /**< XBARA1_OUT73 output assigned to ENC2_INDEX */
-    kXBARA1_OutputEnc2Home          = 74|0x100U,   /**< XBARA1_OUT74 output assigned to ENC2_HOME */
-    kXBARA1_OutputEnc2Trigger       = 75|0x100U,   /**< XBARA1_OUT75 output assigned to ENC2_TRIGGER */
-    kXBARA1_OutputEnc3PhaseAInput   = 76|0x100U,   /**< XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT */
-    kXBARA1_OutputEnc3PhaseBInput   = 77|0x100U,   /**< XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT */
-    kXBARA1_OutputEnc3Index         = 78|0x100U,   /**< XBARA1_OUT78 output assigned to ENC3_INDEX */
-    kXBARA1_OutputEnc3Home          = 79|0x100U,   /**< XBARA1_OUT79 output assigned to ENC3_HOME */
-    kXBARA1_OutputEnc3Trigger       = 80|0x100U,   /**< XBARA1_OUT80 output assigned to ENC3_TRIGGER */
-    kXBARA1_OutputEnc4PhaseAInput   = 81|0x100U,   /**< XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT */
-    kXBARA1_OutputEnc4PhaseBInput   = 82|0x100U,   /**< XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT */
-    kXBARA1_OutputEnc4Index         = 83|0x100U,   /**< XBARA1_OUT83 output assigned to ENC4_INDEX */
-    kXBARA1_OutputEnc4Home          = 84|0x100U,   /**< XBARA1_OUT84 output assigned to ENC4_HOME */
-    kXBARA1_OutputEnc4Trigger       = 85|0x100U,   /**< XBARA1_OUT85 output assigned to ENC4_TRIGGER */
-    kXBARA1_OutputQtimer1Tmr0Input  = 86|0x100U,   /**< XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT */
-    kXBARA1_OutputQtimer1Tmr1Input  = 87|0x100U,   /**< XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT */
-    kXBARA1_OutputQtimer1Tmr2Input  = 88|0x100U,   /**< XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT */
-    kXBARA1_OutputQtimer1Tmr3Input  = 89|0x100U,   /**< XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT */
-    kXBARA1_OutputQtimer2Tmr0Input  = 90|0x100U,   /**< XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT */
-    kXBARA1_OutputQtimer2Tmr1Input  = 91|0x100U,   /**< XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT */
-    kXBARA1_OutputQtimer2Tmr2Input  = 92|0x100U,   /**< XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT */
-    kXBARA1_OutputQtimer2Tmr3Input  = 93|0x100U,   /**< XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT */
-    kXBARA1_OutputQtimer3Tmr0Input  = 94|0x100U,   /**< XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT */
-    kXBARA1_OutputQtimer3Tmr1Input  = 95|0x100U,   /**< XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT */
-    kXBARA1_OutputQtimer3Tmr2Input  = 96|0x100U,   /**< XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT */
-    kXBARA1_OutputQtimer3Tmr3Input  = 97|0x100U,   /**< XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT */
-    kXBARA1_OutputQtimer4Tmr0Input  = 98|0x100U,   /**< XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT */
-    kXBARA1_OutputQtimer4Tmr1Input  = 99|0x100U,   /**< XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT */
-    kXBARA1_OutputQtimer4Tmr2Input  = 100|0x100U,  /**< XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT */
-    kXBARA1_OutputQtimer4Tmr3Input  = 101|0x100U,  /**< XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT */
-    kXBARA1_OutputEwmEwmIn          = 102|0x100U,  /**< XBARA1_OUT102 output assigned to EWM_EWM_IN */
-    kXBARA1_OutputAdcEtcXbar0Trig0  = 103|0x100U,  /**< XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0 */
-    kXBARA1_OutputAdcEtcXbar0Trig1  = 104|0x100U,  /**< XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1 */
-    kXBARA1_OutputAdcEtcXbar0Trig2  = 105|0x100U,  /**< XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2 */
-    kXBARA1_OutputAdcEtcXbar0Trig3  = 106|0x100U,  /**< XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3 */
-    kXBARA1_OutputAdcEtcXbar1Trig0  = 107|0x100U,  /**< XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0 */
-    kXBARA1_OutputAdcEtcXbar1Trig1  = 108|0x100U,  /**< XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1 */
-    kXBARA1_OutputAdcEtcXbar1Trig2  = 109|0x100U,  /**< XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2 */
-    kXBARA1_OutputAdcEtcXbar1Trig3  = 110|0x100U,  /**< XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3 */
-    kXBARA1_OutputLpi2c1TrgInput    = 111|0x100U,  /**< XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT */
-    kXBARA1_OutputLpi2c2TrgInput    = 112|0x100U,  /**< XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT */
-    kXBARA1_OutputLpi2c3TrgInput    = 113|0x100U,  /**< XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT */
-    kXBARA1_OutputLpi2c4TrgInput    = 114|0x100U,  /**< XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT */
-    kXBARA1_OutputLpspi1TrgInput    = 115|0x100U,  /**< XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT */
-    kXBARA1_OutputLpspi2TrgInput    = 116|0x100U,  /**< XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT */
-    kXBARA1_OutputLpspi3TrgInput    = 117|0x100U,  /**< XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT */
-    kXBARA1_OutputLpspi4TrgInput    = 118|0x100U,  /**< XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT */
-    kXBARA1_OutputLpuart1TrgInput   = 119|0x100U,  /**< XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT */
-    kXBARA1_OutputLpuart2TrgInput   = 120|0x100U,  /**< XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT */
-    kXBARA1_OutputLpuart3TrgInput   = 121|0x100U,  /**< XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT */
-    kXBARA1_OutputLpuart4TrgInput   = 122|0x100U,  /**< XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT */
-    kXBARA1_OutputLpuart5TrgInput   = 123|0x100U,  /**< XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT */
-    kXBARA1_OutputLpuart6TrgInput   = 124|0x100U,  /**< XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT */
-    kXBARA1_OutputLpuart7TrgInput   = 125|0x100U,  /**< XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT */
-    kXBARA1_OutputLpuart8TrgInput   = 126|0x100U,  /**< XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT */
-    kXBARA1_OutputFlexio1TriggerIn0 = 127|0x100U,  /**< XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0 */
-    kXBARA1_OutputFlexio1TriggerIn1 = 128|0x100U,  /**< XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1 */
-    kXBARA1_OutputFlexio2TriggerIn0 = 129|0x100U,  /**< XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0 */
-    kXBARA1_OutputFlexio2TriggerIn1 = 130|0x100U,  /**< XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1 */
-    kXBARB2_OutputAoi1In00          = 0|0x200U,    /**< XBARB2_OUT0 output assigned to AOI1_IN00 */
-    kXBARB2_OutputAoi1In01          = 1|0x200U,    /**< XBARB2_OUT1 output assigned to AOI1_IN01 */
-    kXBARB2_OutputAoi1In02          = 2|0x200U,    /**< XBARB2_OUT2 output assigned to AOI1_IN02 */
-    kXBARB2_OutputAoi1In03          = 3|0x200U,    /**< XBARB2_OUT3 output assigned to AOI1_IN03 */
-    kXBARB2_OutputAoi1In04          = 4|0x200U,    /**< XBARB2_OUT4 output assigned to AOI1_IN04 */
-    kXBARB2_OutputAoi1In05          = 5|0x200U,    /**< XBARB2_OUT5 output assigned to AOI1_IN05 */
-    kXBARB2_OutputAoi1In06          = 6|0x200U,    /**< XBARB2_OUT6 output assigned to AOI1_IN06 */
-    kXBARB2_OutputAoi1In07          = 7|0x200U,    /**< XBARB2_OUT7 output assigned to AOI1_IN07 */
-    kXBARB2_OutputAoi1In08          = 8|0x200U,    /**< XBARB2_OUT8 output assigned to AOI1_IN08 */
-    kXBARB2_OutputAoi1In09          = 9|0x200U,    /**< XBARB2_OUT9 output assigned to AOI1_IN09 */
-    kXBARB2_OutputAoi1In10          = 10|0x200U,   /**< XBARB2_OUT10 output assigned to AOI1_IN10 */
-    kXBARB2_OutputAoi1In11          = 11|0x200U,   /**< XBARB2_OUT11 output assigned to AOI1_IN11 */
-    kXBARB2_OutputAoi1In12          = 12|0x200U,   /**< XBARB2_OUT12 output assigned to AOI1_IN12 */
-    kXBARB2_OutputAoi1In13          = 13|0x200U,   /**< XBARB2_OUT13 output assigned to AOI1_IN13 */
-    kXBARB2_OutputAoi1In14          = 14|0x200U,   /**< XBARB2_OUT14 output assigned to AOI1_IN14 */
-    kXBARB2_OutputAoi1In15          = 15|0x200U,   /**< XBARB2_OUT15 output assigned to AOI1_IN15 */
-    kXBARB3_OutputAoi2In00          = 0|0x300U,    /**< XBARB3_OUT0 output assigned to AOI2_IN00 */
-    kXBARB3_OutputAoi2In01          = 1|0x300U,    /**< XBARB3_OUT1 output assigned to AOI2_IN01 */
-    kXBARB3_OutputAoi2In02          = 2|0x300U,    /**< XBARB3_OUT2 output assigned to AOI2_IN02 */
-    kXBARB3_OutputAoi2In03          = 3|0x300U,    /**< XBARB3_OUT3 output assigned to AOI2_IN03 */
-    kXBARB3_OutputAoi2In04          = 4|0x300U,    /**< XBARB3_OUT4 output assigned to AOI2_IN04 */
-    kXBARB3_OutputAoi2In05          = 5|0x300U,    /**< XBARB3_OUT5 output assigned to AOI2_IN05 */
-    kXBARB3_OutputAoi2In06          = 6|0x300U,    /**< XBARB3_OUT6 output assigned to AOI2_IN06 */
-    kXBARB3_OutputAoi2In07          = 7|0x300U,    /**< XBARB3_OUT7 output assigned to AOI2_IN07 */
-    kXBARB3_OutputAoi2In08          = 8|0x300U,    /**< XBARB3_OUT8 output assigned to AOI2_IN08 */
-    kXBARB3_OutputAoi2In09          = 9|0x300U,    /**< XBARB3_OUT9 output assigned to AOI2_IN09 */
-    kXBARB3_OutputAoi2In10          = 10|0x300U,   /**< XBARB3_OUT10 output assigned to AOI2_IN10 */
-    kXBARB3_OutputAoi2In11          = 11|0x300U,   /**< XBARB3_OUT11 output assigned to AOI2_IN11 */
-    kXBARB3_OutputAoi2In12          = 12|0x300U,   /**< XBARB3_OUT12 output assigned to AOI2_IN12 */
-    kXBARB3_OutputAoi2In13          = 13|0x300U,   /**< XBARB3_OUT13 output assigned to AOI2_IN13 */
-    kXBARB3_OutputAoi2In14          = 14|0x300U,   /**< XBARB3_OUT14 output assigned to AOI2_IN14 */
-    kXBARB3_OutputAoi2In15          = 15|0x300U,   /**< XBARB3_OUT15 output assigned to AOI2_IN15 */
+    kXBARA1_OutputDmaChMuxReq30     = 0 | 0x100U,   /**< XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30 */
+    kXBARA1_OutputDmaChMuxReq31     = 1 | 0x100U,   /**< XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31 */
+    kXBARA1_OutputDmaChMuxReq94     = 2 | 0x100U,   /**< XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94 */
+    kXBARA1_OutputDmaChMuxReq95     = 3 | 0x100U,   /**< XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95 */
+    kXBARA1_OutputIomuxXbarInout04  = 4 | 0x100U,   /**< XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04 */
+    kXBARA1_OutputIomuxXbarInout05  = 5 | 0x100U,   /**< XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05 */
+    kXBARA1_OutputIomuxXbarInout06  = 6 | 0x100U,   /**< XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06 */
+    kXBARA1_OutputIomuxXbarInout07  = 7 | 0x100U,   /**< XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07 */
+    kXBARA1_OutputIomuxXbarInout08  = 8 | 0x100U,   /**< XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08 */
+    kXBARA1_OutputIomuxXbarInout09  = 9 | 0x100U,   /**< XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09 */
+    kXBARA1_OutputIomuxXbarInout10  = 10 | 0x100U,  /**< XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10 */
+    kXBARA1_OutputIomuxXbarInout11  = 11 | 0x100U,  /**< XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11 */
+    kXBARA1_OutputIomuxXbarInout12  = 12 | 0x100U,  /**< XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12 */
+    kXBARA1_OutputIomuxXbarInout13  = 13 | 0x100U,  /**< XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13 */
+    kXBARA1_OutputIomuxXbarInout14  = 14 | 0x100U,  /**< XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14 */
+    kXBARA1_OutputIomuxXbarInout15  = 15 | 0x100U,  /**< XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15 */
+    kXBARA1_OutputIomuxXbarInout16  = 16 | 0x100U,  /**< XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16 */
+    kXBARA1_OutputIomuxXbarInout17  = 17 | 0x100U,  /**< XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17 */
+    kXBARA1_OutputIomuxXbarInout18  = 18 | 0x100U,  /**< XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18 */
+    kXBARA1_OutputIomuxXbarInout19  = 19 | 0x100U,  /**< XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19 */
+    kXBARA1_OutputAcmp1Sample       = 20 | 0x100U,  /**< XBARA1_OUT20 output assigned to ACMP1_SAMPLE */
+    kXBARA1_OutputAcmp2Sample       = 21 | 0x100U,  /**< XBARA1_OUT21 output assigned to ACMP2_SAMPLE */
+    kXBARA1_OutputAcmp3Sample       = 22 | 0x100U,  /**< XBARA1_OUT22 output assigned to ACMP3_SAMPLE */
+    kXBARA1_OutputAcmp4Sample       = 23 | 0x100U,  /**< XBARA1_OUT23 output assigned to ACMP4_SAMPLE */
+    kXBARA1_OutputRESERVED24        = 24 | 0x100U,  /**< XBARA1_OUT24 output is reserved. */
+    kXBARA1_OutputRESERVED25        = 25 | 0x100U,  /**< XBARA1_OUT25 output is reserved. */
+    kXBARA1_OutputFlexpwm1Exta0     = 26 | 0x100U,  /**< XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0 */
+    kXBARA1_OutputFlexpwm1Exta1     = 27 | 0x100U,  /**< XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1 */
+    kXBARA1_OutputFlexpwm1Exta2     = 28 | 0x100U,  /**< XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2 */
+    kXBARA1_OutputFlexpwm1Exta3     = 29 | 0x100U,  /**< XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3 */
+    kXBARA1_OutputFlexpwm1ExtSync0  = 30 | 0x100U,  /**< XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm1ExtSync1  = 31 | 0x100U,  /**< XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm1ExtSync2  = 32 | 0x100U,  /**< XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm1ExtSync3  = 33 | 0x100U,  /**< XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm1ExtClk    = 34 | 0x100U,  /**< XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK */
+    kXBARA1_OutputFlexpwm1Fault0    = 35 | 0x100U,  /**< XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0 */
+    kXBARA1_OutputFlexpwm1Fault1    = 36 | 0x100U,  /**< XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1 */
+    kXBARA1_OutputFlexpwm1234Fault2 = 37 | 0x100U,  /**< XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2 */
+    kXBARA1_OutputFlexpwm1234Fault3 = 38 | 0x100U,  /**< XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3 */
+    kXBARA1_OutputFlexpwm1ExtForce  = 39 | 0x100U,  /**< XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE */
+    kXBARA1_OutputFlexpwm234Exta0   = 40 | 0x100U,  /**< XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0 */
+    kXBARA1_OutputFlexpwm234Exta1   = 41 | 0x100U,  /**< XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1 */
+    kXBARA1_OutputFlexpwm234Exta2   = 42 | 0x100U,  /**< XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2 */
+    kXBARA1_OutputFlexpwm234Exta3   = 43 | 0x100U,  /**< XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3 */
+    kXBARA1_OutputFlexpwm2ExtSync0  = 44 | 0x100U,  /**< XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm2ExtSync1  = 45 | 0x100U,  /**< XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm2ExtSync2  = 46 | 0x100U,  /**< XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm2ExtSync3  = 47 | 0x100U,  /**< XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm234ExtClk  = 48 | 0x100U,  /**< XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK */
+    kXBARA1_OutputFlexpwm2Fault0    = 49 | 0x100U,  /**< XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0 */
+    kXBARA1_OutputFlexpwm2Fault1    = 50 | 0x100U,  /**< XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1 */
+    kXBARA1_OutputFlexpwm2ExtForce  = 51 | 0x100U,  /**< XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE */
+    kXBARA1_OutputFlexpwm3ExtSync0  = 52 | 0x100U,  /**< XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm3ExtSync1  = 53 | 0x100U,  /**< XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm3ExtSync2  = 54 | 0x100U,  /**< XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm3ExtSync3  = 55 | 0x100U,  /**< XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm3Fault0    = 56 | 0x100U,  /**< XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0 */
+    kXBARA1_OutputFlexpwm3Fault1    = 57 | 0x100U,  /**< XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1 */
+    kXBARA1_OutputFlexpwm3ExtForce  = 58 | 0x100U,  /**< XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE */
+    kXBARA1_OutputFlexpwm4ExtSync0  = 59 | 0x100U,  /**< XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm4ExtSync1  = 60 | 0x100U,  /**< XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm4ExtSync2  = 61 | 0x100U,  /**< XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm4ExtSync3  = 62 | 0x100U,  /**< XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm4Fault0    = 63 | 0x100U,  /**< XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0 */
+    kXBARA1_OutputFlexpwm4Fault1    = 64 | 0x100U,  /**< XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1 */
+    kXBARA1_OutputFlexpwm4ExtForce  = 65 | 0x100U,  /**< XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE */
+    kXBARA1_OutputEnc1PhaseAInput   = 66 | 0x100U,  /**< XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT */
+    kXBARA1_OutputEnc1PhaseBInput   = 67 | 0x100U,  /**< XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT */
+    kXBARA1_OutputEnc1Index         = 68 | 0x100U,  /**< XBARA1_OUT68 output assigned to ENC1_INDEX */
+    kXBARA1_OutputEnc1Home          = 69 | 0x100U,  /**< XBARA1_OUT69 output assigned to ENC1_HOME */
+    kXBARA1_OutputEnc1Trigger       = 70 | 0x100U,  /**< XBARA1_OUT70 output assigned to ENC1_TRIGGER */
+    kXBARA1_OutputEnc2PhaseAInput   = 71 | 0x100U,  /**< XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT */
+    kXBARA1_OutputEnc2PhaseBInput   = 72 | 0x100U,  /**< XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT */
+    kXBARA1_OutputEnc2Index         = 73 | 0x100U,  /**< XBARA1_OUT73 output assigned to ENC2_INDEX */
+    kXBARA1_OutputEnc2Home          = 74 | 0x100U,  /**< XBARA1_OUT74 output assigned to ENC2_HOME */
+    kXBARA1_OutputEnc2Trigger       = 75 | 0x100U,  /**< XBARA1_OUT75 output assigned to ENC2_TRIGGER */
+    kXBARA1_OutputEnc3PhaseAInput   = 76 | 0x100U,  /**< XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT */
+    kXBARA1_OutputEnc3PhaseBInput   = 77 | 0x100U,  /**< XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT */
+    kXBARA1_OutputEnc3Index         = 78 | 0x100U,  /**< XBARA1_OUT78 output assigned to ENC3_INDEX */
+    kXBARA1_OutputEnc3Home          = 79 | 0x100U,  /**< XBARA1_OUT79 output assigned to ENC3_HOME */
+    kXBARA1_OutputEnc3Trigger       = 80 | 0x100U,  /**< XBARA1_OUT80 output assigned to ENC3_TRIGGER */
+    kXBARA1_OutputEnc4PhaseAInput   = 81 | 0x100U,  /**< XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT */
+    kXBARA1_OutputEnc4PhaseBInput   = 82 | 0x100U,  /**< XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT */
+    kXBARA1_OutputEnc4Index         = 83 | 0x100U,  /**< XBARA1_OUT83 output assigned to ENC4_INDEX */
+    kXBARA1_OutputEnc4Home          = 84 | 0x100U,  /**< XBARA1_OUT84 output assigned to ENC4_HOME */
+    kXBARA1_OutputEnc4Trigger       = 85 | 0x100U,  /**< XBARA1_OUT85 output assigned to ENC4_TRIGGER */
+    kXBARA1_OutputQtimer1Tmr0Input  = 86 | 0x100U,  /**< XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT */
+    kXBARA1_OutputQtimer1Tmr1Input  = 87 | 0x100U,  /**< XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT */
+    kXBARA1_OutputQtimer1Tmr2Input  = 88 | 0x100U,  /**< XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT */
+    kXBARA1_OutputQtimer1Tmr3Input  = 89 | 0x100U,  /**< XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT */
+    kXBARA1_OutputQtimer2Tmr0Input  = 90 | 0x100U,  /**< XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT */
+    kXBARA1_OutputQtimer2Tmr1Input  = 91 | 0x100U,  /**< XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT */
+    kXBARA1_OutputQtimer2Tmr2Input  = 92 | 0x100U,  /**< XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT */
+    kXBARA1_OutputQtimer2Tmr3Input  = 93 | 0x100U,  /**< XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT */
+    kXBARA1_OutputQtimer3Tmr0Input  = 94 | 0x100U,  /**< XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT */
+    kXBARA1_OutputQtimer3Tmr1Input  = 95 | 0x100U,  /**< XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT */
+    kXBARA1_OutputQtimer3Tmr2Input  = 96 | 0x100U,  /**< XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT */
+    kXBARA1_OutputQtimer3Tmr3Input  = 97 | 0x100U,  /**< XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT */
+    kXBARA1_OutputQtimer4Tmr0Input  = 98 | 0x100U,  /**< XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT */
+    kXBARA1_OutputQtimer4Tmr1Input  = 99 | 0x100U,  /**< XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT */
+    kXBARA1_OutputQtimer4Tmr2Input  = 100 | 0x100U, /**< XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT */
+    kXBARA1_OutputQtimer4Tmr3Input  = 101 | 0x100U, /**< XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT */
+    kXBARA1_OutputEwmEwmIn          = 102 | 0x100U, /**< XBARA1_OUT102 output assigned to EWM_EWM_IN */
+    kXBARA1_OutputAdcEtcXbar0Trig0  = 103 | 0x100U, /**< XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0 */
+    kXBARA1_OutputAdcEtcXbar0Trig1  = 104 | 0x100U, /**< XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1 */
+    kXBARA1_OutputAdcEtcXbar0Trig2  = 105 | 0x100U, /**< XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2 */
+    kXBARA1_OutputAdcEtcXbar0Trig3  = 106 | 0x100U, /**< XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3 */
+    kXBARA1_OutputAdcEtcXbar1Trig0  = 107 | 0x100U, /**< XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0 */
+    kXBARA1_OutputAdcEtcXbar1Trig1  = 108 | 0x100U, /**< XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1 */
+    kXBARA1_OutputAdcEtcXbar1Trig2  = 109 | 0x100U, /**< XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2 */
+    kXBARA1_OutputAdcEtcXbar1Trig3  = 110 | 0x100U, /**< XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3 */
+    kXBARA1_OutputLpi2c1TrgInput    = 111 | 0x100U, /**< XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT */
+    kXBARA1_OutputLpi2c2TrgInput    = 112 | 0x100U, /**< XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT */
+    kXBARA1_OutputLpi2c3TrgInput    = 113 | 0x100U, /**< XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT */
+    kXBARA1_OutputLpi2c4TrgInput    = 114 | 0x100U, /**< XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT */
+    kXBARA1_OutputLpspi1TrgInput    = 115 | 0x100U, /**< XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT */
+    kXBARA1_OutputLpspi2TrgInput    = 116 | 0x100U, /**< XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT */
+    kXBARA1_OutputLpspi3TrgInput    = 117 | 0x100U, /**< XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT */
+    kXBARA1_OutputLpspi4TrgInput    = 118 | 0x100U, /**< XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT */
+    kXBARA1_OutputLpuart1TrgInput   = 119 | 0x100U, /**< XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT */
+    kXBARA1_OutputLpuart2TrgInput   = 120 | 0x100U, /**< XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT */
+    kXBARA1_OutputLpuart3TrgInput   = 121 | 0x100U, /**< XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT */
+    kXBARA1_OutputLpuart4TrgInput   = 122 | 0x100U, /**< XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT */
+    kXBARA1_OutputLpuart5TrgInput   = 123 | 0x100U, /**< XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT */
+    kXBARA1_OutputLpuart6TrgInput   = 124 | 0x100U, /**< XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT */
+    kXBARA1_OutputLpuart7TrgInput   = 125 | 0x100U, /**< XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT */
+    kXBARA1_OutputLpuart8TrgInput   = 126 | 0x100U, /**< XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT */
+    kXBARA1_OutputFlexio1TriggerIn0 = 127 | 0x100U, /**< XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0 */
+    kXBARA1_OutputFlexio1TriggerIn1 = 128 | 0x100U, /**< XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1 */
+    kXBARA1_OutputFlexio2TriggerIn0 = 129 | 0x100U, /**< XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0 */
+    kXBARA1_OutputFlexio2TriggerIn1 = 130 | 0x100U, /**< XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1 */
+    kXBARB2_OutputAoi1In00          = 0 | 0x200U,   /**< XBARB2_OUT0 output assigned to AOI1_IN00 */
+    kXBARB2_OutputAoi1In01          = 1 | 0x200U,   /**< XBARB2_OUT1 output assigned to AOI1_IN01 */
+    kXBARB2_OutputAoi1In02          = 2 | 0x200U,   /**< XBARB2_OUT2 output assigned to AOI1_IN02 */
+    kXBARB2_OutputAoi1In03          = 3 | 0x200U,   /**< XBARB2_OUT3 output assigned to AOI1_IN03 */
+    kXBARB2_OutputAoi1In04          = 4 | 0x200U,   /**< XBARB2_OUT4 output assigned to AOI1_IN04 */
+    kXBARB2_OutputAoi1In05          = 5 | 0x200U,   /**< XBARB2_OUT5 output assigned to AOI1_IN05 */
+    kXBARB2_OutputAoi1In06          = 6 | 0x200U,   /**< XBARB2_OUT6 output assigned to AOI1_IN06 */
+    kXBARB2_OutputAoi1In07          = 7 | 0x200U,   /**< XBARB2_OUT7 output assigned to AOI1_IN07 */
+    kXBARB2_OutputAoi1In08          = 8 | 0x200U,   /**< XBARB2_OUT8 output assigned to AOI1_IN08 */
+    kXBARB2_OutputAoi1In09          = 9 | 0x200U,   /**< XBARB2_OUT9 output assigned to AOI1_IN09 */
+    kXBARB2_OutputAoi1In10          = 10 | 0x200U,  /**< XBARB2_OUT10 output assigned to AOI1_IN10 */
+    kXBARB2_OutputAoi1In11          = 11 | 0x200U,  /**< XBARB2_OUT11 output assigned to AOI1_IN11 */
+    kXBARB2_OutputAoi1In12          = 12 | 0x200U,  /**< XBARB2_OUT12 output assigned to AOI1_IN12 */
+    kXBARB2_OutputAoi1In13          = 13 | 0x200U,  /**< XBARB2_OUT13 output assigned to AOI1_IN13 */
+    kXBARB2_OutputAoi1In14          = 14 | 0x200U,  /**< XBARB2_OUT14 output assigned to AOI1_IN14 */
+    kXBARB2_OutputAoi1In15          = 15 | 0x200U,  /**< XBARB2_OUT15 output assigned to AOI1_IN15 */
+    kXBARB3_OutputAoi2In00          = 0 | 0x300U,   /**< XBARB3_OUT0 output assigned to AOI2_IN00 */
+    kXBARB3_OutputAoi2In01          = 1 | 0x300U,   /**< XBARB3_OUT1 output assigned to AOI2_IN01 */
+    kXBARB3_OutputAoi2In02          = 2 | 0x300U,   /**< XBARB3_OUT2 output assigned to AOI2_IN02 */
+    kXBARB3_OutputAoi2In03          = 3 | 0x300U,   /**< XBARB3_OUT3 output assigned to AOI2_IN03 */
+    kXBARB3_OutputAoi2In04          = 4 | 0x300U,   /**< XBARB3_OUT4 output assigned to AOI2_IN04 */
+    kXBARB3_OutputAoi2In05          = 5 | 0x300U,   /**< XBARB3_OUT5 output assigned to AOI2_IN05 */
+    kXBARB3_OutputAoi2In06          = 6 | 0x300U,   /**< XBARB3_OUT6 output assigned to AOI2_IN06 */
+    kXBARB3_OutputAoi2In07          = 7 | 0x300U,   /**< XBARB3_OUT7 output assigned to AOI2_IN07 */
+    kXBARB3_OutputAoi2In08          = 8 | 0x300U,   /**< XBARB3_OUT8 output assigned to AOI2_IN08 */
+    kXBARB3_OutputAoi2In09          = 9 | 0x300U,   /**< XBARB3_OUT9 output assigned to AOI2_IN09 */
+    kXBARB3_OutputAoi2In10          = 10 | 0x300U,  /**< XBARB3_OUT10 output assigned to AOI2_IN10 */
+    kXBARB3_OutputAoi2In11          = 11 | 0x300U,  /**< XBARB3_OUT11 output assigned to AOI2_IN11 */
+    kXBARB3_OutputAoi2In12          = 12 | 0x300U,  /**< XBARB3_OUT12 output assigned to AOI2_IN12 */
+    kXBARB3_OutputAoi2In13          = 13 | 0x300U,  /**< XBARB3_OUT13 output assigned to AOI2_IN13 */
+    kXBARB3_OutputAoi2In14          = 14 | 0x300U,  /**< XBARB3_OUT14 output assigned to AOI2_IN14 */
+    kXBARB3_OutputAoi2In15          = 15 | 0x300U,  /**< XBARB3_OUT15 output assigned to AOI2_IN15 */
 } xbar_output_signal_t;
 
-
 /*!
  * @}
  */ /* end of group Mapping_Information */
 
-
 /* ----------------------------------------------------------------------------
    -- Device Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1279,27 +1331,26 @@ typedef enum _xbar_output_signal
  * @{
  */
 
-
 /*
 ** Start of section using anonymous unions
 */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang diagnostic push
-  #else
-    #pragma push
-    #pragma anon_unions
-  #endif
-#elif defined(__CWCC__)
-  #pragma push
-  #pragma cpp_extensions on
-#elif defined(__GNUC__)
-  /* anonymous unions are enabled by default */
-#elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma language=extended
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang diagnostic push
 #else
-  #error Not supported compiler type
+#pragma push
+#pragma anon_unions
+#endif
+#elif defined(__CWCC__)
+#pragma push
+#pragma cpp_extensions on
+#elif defined(__GNUC__)
+/* anonymous unions are enabled by default */
+#elif defined(__IAR_SYSTEMS_ICC__)
+#pragma language = extended
+#else
+#error Not supported compiler type
 #endif
 
 /* ----------------------------------------------------------------------------
@@ -1312,16 +1363,17 @@ typedef enum _xbar_output_signal
  */
 
 /** ADC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t HC[8];                             /**< Control register for hardware triggers, array offset: 0x0, array step: 0x4 */
-  __I  uint32_t HS;                                /**< Status register for HW triggers, offset: 0x20 */
-  __I  uint32_t R[8];                              /**< Data result register for HW triggers, array offset: 0x24, array step: 0x4 */
-  __IO uint32_t CFG;                               /**< Configuration register, offset: 0x44 */
-  __IO uint32_t GC;                                /**< General control register, offset: 0x48 */
-  __IO uint32_t GS;                                /**< General status register, offset: 0x4C */
-  __IO uint32_t CV;                                /**< Compare value register, offset: 0x50 */
-  __IO uint32_t OFS;                               /**< Offset correction value register, offset: 0x54 */
-  __IO uint32_t CAL;                               /**< Calibration value register, offset: 0x58 */
+typedef struct
+{
+    __IO uint32_t HC[8]; /**< Control register for hardware triggers, array offset: 0x0, array step: 0x4 */
+    __I uint32_t HS;     /**< Status register for HW triggers, offset: 0x20 */
+    __I uint32_t R[8];   /**< Data result register for HW triggers, array offset: 0x24, array step: 0x4 */
+    __IO uint32_t CFG;   /**< Configuration register, offset: 0x44 */
+    __IO uint32_t GC;    /**< General control register, offset: 0x48 */
+    __IO uint32_t GS;    /**< General status register, offset: 0x4C */
+    __IO uint32_t CV;    /**< Compare value register, offset: 0x50 */
+    __IO uint32_t OFS;   /**< Offset correction value register, offset: 0x54 */
+    __IO uint32_t CAL;   /**< Calibration value register, offset: 0x58 */
 } ADC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1335,166 +1387,172 @@ typedef struct {
 
 /*! @name HC - Control register for hardware triggers */
 /*! @{ */
-#define ADC_HC_ADCH_MASK                         (0x1FU)
-#define ADC_HC_ADCH_SHIFT                        (0U)
-#define ADC_HC_ADCH(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_HC_ADCH_SHIFT)) & ADC_HC_ADCH_MASK)
-#define ADC_HC_AIEN_MASK                         (0x80U)
-#define ADC_HC_AIEN_SHIFT                        (7U)
-#define ADC_HC_AIEN(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_HC_AIEN_SHIFT)) & ADC_HC_AIEN_MASK)
+#define ADC_HC_ADCH_MASK  (0x1FU)
+#define ADC_HC_ADCH_SHIFT (0U)
+#define ADC_HC_ADCH(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HC_ADCH_SHIFT)) & ADC_HC_ADCH_MASK)
+#define ADC_HC_AIEN_MASK  (0x80U)
+#define ADC_HC_AIEN_SHIFT (7U)
+#define ADC_HC_AIEN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HC_AIEN_SHIFT)) & ADC_HC_AIEN_MASK)
 /*! @} */
 
 /* The count of ADC_HC */
-#define ADC_HC_COUNT                             (8U)
+#define ADC_HC_COUNT (8U)
 
 /*! @name HS - Status register for HW triggers */
 /*! @{ */
-#define ADC_HS_COCO0_MASK                        (0x1U)
-#define ADC_HS_COCO0_SHIFT                       (0U)
-#define ADC_HS_COCO0(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_HS_COCO0_SHIFT)) & ADC_HS_COCO0_MASK)
+#define ADC_HS_COCO0_MASK  (0x1U)
+#define ADC_HS_COCO0_SHIFT (0U)
+#define ADC_HS_COCO0(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HS_COCO0_SHIFT)) & ADC_HS_COCO0_MASK)
 /*! @} */
 
 /*! @name R - Data result register for HW triggers */
 /*! @{ */
-#define ADC_R_CDATA_MASK                         (0xFFFU)
-#define ADC_R_CDATA_SHIFT                        (0U)
-#define ADC_R_CDATA(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_R_CDATA_SHIFT)) & ADC_R_CDATA_MASK)
+#define ADC_R_CDATA_MASK  (0xFFFU)
+#define ADC_R_CDATA_SHIFT (0U)
+#define ADC_R_CDATA(x)    (((uint32_t)(((uint32_t)(x)) << ADC_R_CDATA_SHIFT)) & ADC_R_CDATA_MASK)
 /*! @} */
 
 /* The count of ADC_R */
-#define ADC_R_COUNT                              (8U)
+#define ADC_R_COUNT (8U)
 
 /*! @name CFG - Configuration register */
 /*! @{ */
-#define ADC_CFG_ADICLK_MASK                      (0x3U)
-#define ADC_CFG_ADICLK_SHIFT                     (0U)
-#define ADC_CFG_ADICLK(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADICLK_SHIFT)) & ADC_CFG_ADICLK_MASK)
-#define ADC_CFG_MODE_MASK                        (0xCU)
-#define ADC_CFG_MODE_SHIFT                       (2U)
-#define ADC_CFG_MODE(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_MODE_SHIFT)) & ADC_CFG_MODE_MASK)
-#define ADC_CFG_ADLSMP_MASK                      (0x10U)
-#define ADC_CFG_ADLSMP_SHIFT                     (4U)
-#define ADC_CFG_ADLSMP(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
-#define ADC_CFG_ADIV_MASK                        (0x60U)
-#define ADC_CFG_ADIV_SHIFT                       (5U)
-#define ADC_CFG_ADIV(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADIV_SHIFT)) & ADC_CFG_ADIV_MASK)
-#define ADC_CFG_ADLPC_MASK                       (0x80U)
-#define ADC_CFG_ADLPC_SHIFT                      (7U)
-#define ADC_CFG_ADLPC(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLPC_SHIFT)) & ADC_CFG_ADLPC_MASK)
-#define ADC_CFG_ADSTS_MASK                       (0x300U)
-#define ADC_CFG_ADSTS_SHIFT                      (8U)
-#define ADC_CFG_ADSTS(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADSTS_SHIFT)) & ADC_CFG_ADSTS_MASK)
-#define ADC_CFG_ADHSC_MASK                       (0x400U)
-#define ADC_CFG_ADHSC_SHIFT                      (10U)
-#define ADC_CFG_ADHSC(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADHSC_SHIFT)) & ADC_CFG_ADHSC_MASK)
-#define ADC_CFG_REFSEL_MASK                      (0x1800U)
-#define ADC_CFG_REFSEL_SHIFT                     (11U)
-#define ADC_CFG_REFSEL(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_REFSEL_SHIFT)) & ADC_CFG_REFSEL_MASK)
-#define ADC_CFG_ADTRG_MASK                       (0x2000U)
-#define ADC_CFG_ADTRG_SHIFT                      (13U)
-#define ADC_CFG_ADTRG(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADTRG_SHIFT)) & ADC_CFG_ADTRG_MASK)
-#define ADC_CFG_AVGS_MASK                        (0xC000U)
-#define ADC_CFG_AVGS_SHIFT                       (14U)
-#define ADC_CFG_AVGS(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
-#define ADC_CFG_OVWREN_MASK                      (0x10000U)
-#define ADC_CFG_OVWREN_SHIFT                     (16U)
-#define ADC_CFG_OVWREN(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_OVWREN_SHIFT)) & ADC_CFG_OVWREN_MASK)
+#define ADC_CFG_ADICLK_MASK  (0x3U)
+#define ADC_CFG_ADICLK_SHIFT (0U)
+#define ADC_CFG_ADICLK(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADICLK_SHIFT)) & ADC_CFG_ADICLK_MASK)
+#define ADC_CFG_MODE_MASK    (0xCU)
+#define ADC_CFG_MODE_SHIFT   (2U)
+#define ADC_CFG_MODE(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_MODE_SHIFT)) & ADC_CFG_MODE_MASK)
+#define ADC_CFG_ADLSMP_MASK  (0x10U)
+#define ADC_CFG_ADLSMP_SHIFT (4U)
+#define ADC_CFG_ADLSMP(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
+#define ADC_CFG_ADIV_MASK    (0x60U)
+#define ADC_CFG_ADIV_SHIFT   (5U)
+#define ADC_CFG_ADIV(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADIV_SHIFT)) & ADC_CFG_ADIV_MASK)
+#define ADC_CFG_ADLPC_MASK   (0x80U)
+#define ADC_CFG_ADLPC_SHIFT  (7U)
+#define ADC_CFG_ADLPC(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLPC_SHIFT)) & ADC_CFG_ADLPC_MASK)
+#define ADC_CFG_ADSTS_MASK   (0x300U)
+#define ADC_CFG_ADSTS_SHIFT  (8U)
+#define ADC_CFG_ADSTS(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADSTS_SHIFT)) & ADC_CFG_ADSTS_MASK)
+#define ADC_CFG_ADHSC_MASK   (0x400U)
+#define ADC_CFG_ADHSC_SHIFT  (10U)
+#define ADC_CFG_ADHSC(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADHSC_SHIFT)) & ADC_CFG_ADHSC_MASK)
+#define ADC_CFG_REFSEL_MASK  (0x1800U)
+#define ADC_CFG_REFSEL_SHIFT (11U)
+#define ADC_CFG_REFSEL(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_REFSEL_SHIFT)) & ADC_CFG_REFSEL_MASK)
+#define ADC_CFG_ADTRG_MASK   (0x2000U)
+#define ADC_CFG_ADTRG_SHIFT  (13U)
+#define ADC_CFG_ADTRG(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADTRG_SHIFT)) & ADC_CFG_ADTRG_MASK)
+#define ADC_CFG_AVGS_MASK    (0xC000U)
+#define ADC_CFG_AVGS_SHIFT   (14U)
+#define ADC_CFG_AVGS(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
+#define ADC_CFG_OVWREN_MASK  (0x10000U)
+#define ADC_CFG_OVWREN_SHIFT (16U)
+#define ADC_CFG_OVWREN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_OVWREN_SHIFT)) & ADC_CFG_OVWREN_MASK)
 /*! @} */
 
 /*! @name GC - General control register */
 /*! @{ */
-#define ADC_GC_ADACKEN_MASK                      (0x1U)
-#define ADC_GC_ADACKEN_SHIFT                     (0U)
-#define ADC_GC_ADACKEN(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
-#define ADC_GC_DMAEN_MASK                        (0x2U)
-#define ADC_GC_DMAEN_SHIFT                       (1U)
-#define ADC_GC_DMAEN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_DMAEN_SHIFT)) & ADC_GC_DMAEN_MASK)
-#define ADC_GC_ACREN_MASK                        (0x4U)
-#define ADC_GC_ACREN_SHIFT                       (2U)
-#define ADC_GC_ACREN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACREN_SHIFT)) & ADC_GC_ACREN_MASK)
-#define ADC_GC_ACFGT_MASK                        (0x8U)
-#define ADC_GC_ACFGT_SHIFT                       (3U)
-#define ADC_GC_ACFGT(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFGT_SHIFT)) & ADC_GC_ACFGT_MASK)
-#define ADC_GC_ACFE_MASK                         (0x10U)
-#define ADC_GC_ACFE_SHIFT                        (4U)
-#define ADC_GC_ACFE(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFE_SHIFT)) & ADC_GC_ACFE_MASK)
-#define ADC_GC_AVGE_MASK                         (0x20U)
-#define ADC_GC_AVGE_SHIFT                        (5U)
-#define ADC_GC_AVGE(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_AVGE_SHIFT)) & ADC_GC_AVGE_MASK)
-#define ADC_GC_ADCO_MASK                         (0x40U)
-#define ADC_GC_ADCO_SHIFT                        (6U)
-#define ADC_GC_ADCO(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADCO_SHIFT)) & ADC_GC_ADCO_MASK)
-#define ADC_GC_CAL_MASK                          (0x80U)
-#define ADC_GC_CAL_SHIFT                         (7U)
-#define ADC_GC_CAL(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_GC_CAL_SHIFT)) & ADC_GC_CAL_MASK)
+#define ADC_GC_ADACKEN_MASK  (0x1U)
+#define ADC_GC_ADACKEN_SHIFT (0U)
+#define ADC_GC_ADACKEN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
+#define ADC_GC_DMAEN_MASK    (0x2U)
+#define ADC_GC_DMAEN_SHIFT   (1U)
+#define ADC_GC_DMAEN(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_DMAEN_SHIFT)) & ADC_GC_DMAEN_MASK)
+#define ADC_GC_ACREN_MASK    (0x4U)
+#define ADC_GC_ACREN_SHIFT   (2U)
+#define ADC_GC_ACREN(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACREN_SHIFT)) & ADC_GC_ACREN_MASK)
+#define ADC_GC_ACFGT_MASK    (0x8U)
+#define ADC_GC_ACFGT_SHIFT   (3U)
+#define ADC_GC_ACFGT(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFGT_SHIFT)) & ADC_GC_ACFGT_MASK)
+#define ADC_GC_ACFE_MASK     (0x10U)
+#define ADC_GC_ACFE_SHIFT    (4U)
+#define ADC_GC_ACFE(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFE_SHIFT)) & ADC_GC_ACFE_MASK)
+#define ADC_GC_AVGE_MASK     (0x20U)
+#define ADC_GC_AVGE_SHIFT    (5U)
+#define ADC_GC_AVGE(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_AVGE_SHIFT)) & ADC_GC_AVGE_MASK)
+#define ADC_GC_ADCO_MASK     (0x40U)
+#define ADC_GC_ADCO_SHIFT    (6U)
+#define ADC_GC_ADCO(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADCO_SHIFT)) & ADC_GC_ADCO_MASK)
+#define ADC_GC_CAL_MASK      (0x80U)
+#define ADC_GC_CAL_SHIFT     (7U)
+#define ADC_GC_CAL(x)        (((uint32_t)(((uint32_t)(x)) << ADC_GC_CAL_SHIFT)) & ADC_GC_CAL_MASK)
 /*! @} */
 
 /*! @name GS - General status register */
 /*! @{ */
-#define ADC_GS_ADACT_MASK                        (0x1U)
-#define ADC_GS_ADACT_SHIFT                       (0U)
-#define ADC_GS_ADACT(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GS_ADACT_SHIFT)) & ADC_GS_ADACT_MASK)
-#define ADC_GS_CALF_MASK                         (0x2U)
-#define ADC_GS_CALF_SHIFT                        (1U)
-#define ADC_GS_CALF(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GS_CALF_SHIFT)) & ADC_GS_CALF_MASK)
-#define ADC_GS_AWKST_MASK                        (0x4U)
-#define ADC_GS_AWKST_SHIFT                       (2U)
-#define ADC_GS_AWKST(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GS_AWKST_SHIFT)) & ADC_GS_AWKST_MASK)
+#define ADC_GS_ADACT_MASK  (0x1U)
+#define ADC_GS_ADACT_SHIFT (0U)
+#define ADC_GS_ADACT(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GS_ADACT_SHIFT)) & ADC_GS_ADACT_MASK)
+#define ADC_GS_CALF_MASK   (0x2U)
+#define ADC_GS_CALF_SHIFT  (1U)
+#define ADC_GS_CALF(x)     (((uint32_t)(((uint32_t)(x)) << ADC_GS_CALF_SHIFT)) & ADC_GS_CALF_MASK)
+#define ADC_GS_AWKST_MASK  (0x4U)
+#define ADC_GS_AWKST_SHIFT (2U)
+#define ADC_GS_AWKST(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GS_AWKST_SHIFT)) & ADC_GS_AWKST_MASK)
 /*! @} */
 
 /*! @name CV - Compare value register */
 /*! @{ */
-#define ADC_CV_CV1_MASK                          (0xFFFU)
-#define ADC_CV_CV1_SHIFT                         (0U)
-#define ADC_CV_CV1(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV1_SHIFT)) & ADC_CV_CV1_MASK)
-#define ADC_CV_CV2_MASK                          (0xFFF0000U)
-#define ADC_CV_CV2_SHIFT                         (16U)
-#define ADC_CV_CV2(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV2_SHIFT)) & ADC_CV_CV2_MASK)
+#define ADC_CV_CV1_MASK  (0xFFFU)
+#define ADC_CV_CV1_SHIFT (0U)
+#define ADC_CV_CV1(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV1_SHIFT)) & ADC_CV_CV1_MASK)
+#define ADC_CV_CV2_MASK  (0xFFF0000U)
+#define ADC_CV_CV2_SHIFT (16U)
+#define ADC_CV_CV2(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV2_SHIFT)) & ADC_CV_CV2_MASK)
 /*! @} */
 
 /*! @name OFS - Offset correction value register */
 /*! @{ */
-#define ADC_OFS_OFS_MASK                         (0xFFFU)
-#define ADC_OFS_OFS_SHIFT                        (0U)
-#define ADC_OFS_OFS(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_OFS_OFS_SHIFT)) & ADC_OFS_OFS_MASK)
-#define ADC_OFS_SIGN_MASK                        (0x1000U)
-#define ADC_OFS_SIGN_SHIFT                       (12U)
-#define ADC_OFS_SIGN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_OFS_SIGN_SHIFT)) & ADC_OFS_SIGN_MASK)
+#define ADC_OFS_OFS_MASK   (0xFFFU)
+#define ADC_OFS_OFS_SHIFT  (0U)
+#define ADC_OFS_OFS(x)     (((uint32_t)(((uint32_t)(x)) << ADC_OFS_OFS_SHIFT)) & ADC_OFS_OFS_MASK)
+#define ADC_OFS_SIGN_MASK  (0x1000U)
+#define ADC_OFS_SIGN_SHIFT (12U)
+#define ADC_OFS_SIGN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_OFS_SIGN_SHIFT)) & ADC_OFS_SIGN_MASK)
 /*! @} */
 
 /*! @name CAL - Calibration value register */
 /*! @{ */
-#define ADC_CAL_CAL_CODE_MASK                    (0xFU)
-#define ADC_CAL_CAL_CODE_SHIFT                   (0U)
-#define ADC_CAL_CAL_CODE(x)                      (((uint32_t)(((uint32_t)(x)) << ADC_CAL_CAL_CODE_SHIFT)) & ADC_CAL_CAL_CODE_MASK)
+#define ADC_CAL_CAL_CODE_MASK  (0xFU)
+#define ADC_CAL_CAL_CODE_SHIFT (0U)
+#define ADC_CAL_CAL_CODE(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CAL_CAL_CODE_SHIFT)) & ADC_CAL_CAL_CODE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ADC_Register_Masks */
 
-
 /* ADC - Peripheral instance base addresses */
 /** Peripheral ADC1 base address */
-#define ADC1_BASE                                (0x400C4000u)
+#define ADC1_BASE (0x400C4000u)
 /** Peripheral ADC1 base pointer */
-#define ADC1                                     ((ADC_Type *)ADC1_BASE)
+#define ADC1 ((ADC_Type *)ADC1_BASE)
 /** Peripheral ADC2 base address */
-#define ADC2_BASE                                (0x400C8000u)
+#define ADC2_BASE (0x400C8000u)
 /** Peripheral ADC2 base pointer */
-#define ADC2                                     ((ADC_Type *)ADC2_BASE)
+#define ADC2 ((ADC_Type *)ADC2_BASE)
 /** Array initializer of ADC peripheral base addresses */
-#define ADC_BASE_ADDRS                           { 0u, ADC1_BASE, ADC2_BASE }
+#define ADC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, ADC1_BASE, ADC2_BASE                                                                                       \
+    }
 /** Array initializer of ADC peripheral base pointers */
-#define ADC_BASE_PTRS                            { (ADC_Type *)0u, ADC1, ADC2 }
+#define ADC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (ADC_Type *)0u, ADC1, ADC2                                                                                     \
+    }
 /** Interrupt vectors for the ADC peripheral type */
-#define ADC_IRQS                                 { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
+#define ADC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group ADC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ADC_ETC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1505,23 +1563,27 @@ typedef struct {
  */
 
 /** ADC_ETC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< ADC_ETC Global Control Register, offset: 0x0 */
-  __IO uint32_t DONE0_1_IRQ;                       /**< ETC DONE0 and DONE1 IRQ State Register, offset: 0x4 */
-  __IO uint32_t DONE2_ERR_IRQ;                     /**< ETC DONE_2 and DONE_ERR IRQ State Register, offset: 0x8 */
-  __IO uint32_t DMA_CTRL;                          /**< ETC DMA control Register, offset: 0xC */
-  struct {                                         /* offset: 0x10, array step: 0x28 */
-    __IO uint32_t TRIGn_CTRL;                        /**< ETC_TRIG0 Control Register..ETC_TRIG7 Control Register, array offset: 0x10, array step: 0x28 */
-    __IO uint32_t TRIGn_COUNTER;                     /**< ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register, array offset: 0x14, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_1_0;                   /**< ETC_TRIG Chain 0/1 Register, array offset: 0x18, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_3_2;                   /**< ETC_TRIG Chain 2/3 Register, array offset: 0x1C, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_5_4;                   /**< ETC_TRIG Chain 4/5 Register, array offset: 0x20, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_7_6;                   /**< ETC_TRIG Chain 6/7 Register, array offset: 0x24, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_1_0;                  /**< ETC_TRIG Result Data 1/0 Register, array offset: 0x28, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_3_2;                  /**< ETC_TRIG Result Data 3/2 Register, array offset: 0x2C, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_5_4;                  /**< ETC_TRIG Result Data 5/4 Register, array offset: 0x30, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_7_6;                  /**< ETC_TRIG Result Data 7/6 Register, array offset: 0x34, array step: 0x28 */
-  } TRIG[8];
+typedef struct
+{
+    __IO uint32_t CTRL;          /**< ADC_ETC Global Control Register, offset: 0x0 */
+    __IO uint32_t DONE0_1_IRQ;   /**< ETC DONE0 and DONE1 IRQ State Register, offset: 0x4 */
+    __IO uint32_t DONE2_ERR_IRQ; /**< ETC DONE_2 and DONE_ERR IRQ State Register, offset: 0x8 */
+    __IO uint32_t DMA_CTRL;      /**< ETC DMA control Register, offset: 0xC */
+    struct
+    {                             /* offset: 0x10, array step: 0x28 */
+        __IO uint32_t TRIGn_CTRL; /**< ETC_TRIG0 Control Register..ETC_TRIG7 Control Register, array offset: 0x10, array
+                                     step: 0x28 */
+        __IO uint32_t TRIGn_COUNTER;   /**< ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register, array offset: 0x14,
+                                          array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_1_0; /**< ETC_TRIG Chain 0/1 Register, array offset: 0x18, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_3_2; /**< ETC_TRIG Chain 2/3 Register, array offset: 0x1C, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_5_4; /**< ETC_TRIG Chain 4/5 Register, array offset: 0x20, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_7_6; /**< ETC_TRIG Chain 6/7 Register, array offset: 0x24, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_1_0; /**< ETC_TRIG Result Data 1/0 Register, array offset: 0x28, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_3_2; /**< ETC_TRIG Result Data 3/2 Register, array offset: 0x2C, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_5_4; /**< ETC_TRIG Result Data 5/4 Register, array offset: 0x30, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_7_6; /**< ETC_TRIG Result Data 7/6 Register, array offset: 0x34, array step: 0x28 */
+    } TRIG[8];
 } ADC_ETC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1535,426 +1597,542 @@ typedef struct {
 
 /*! @name CTRL - ADC_ETC Global Control Register */
 /*! @{ */
-#define ADC_ETC_CTRL_TRIG_ENABLE_MASK            (0xFFU)
-#define ADC_ETC_CTRL_TRIG_ENABLE_SHIFT           (0U)
-#define ADC_ETC_CTRL_TRIG_ENABLE(x)              (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK       (0x100U)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT      (8U)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK     (0xE00U)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT    (9U)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK       (0x1000U)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT      (12U)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK     (0xE000U)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT    (13U)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK)
-#define ADC_ETC_CTRL_PRE_DIVIDER_MASK            (0xFF0000U)
-#define ADC_ETC_CTRL_PRE_DIVIDER_SHIFT           (16U)
-#define ADC_ETC_CTRL_PRE_DIVIDER(x)              (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_PRE_DIVIDER_SHIFT)) & ADC_ETC_CTRL_PRE_DIVIDER_MASK)
-#define ADC_ETC_CTRL_DMA_MODE_SEL_MASK           (0x20000000U)
-#define ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT          (29U)
-#define ADC_ETC_CTRL_DMA_MODE_SEL(x)             (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT)) & ADC_ETC_CTRL_DMA_MODE_SEL_MASK)
-#define ADC_ETC_CTRL_TSC_BYPASS_MASK             (0x40000000U)
-#define ADC_ETC_CTRL_TSC_BYPASS_SHIFT            (30U)
-#define ADC_ETC_CTRL_TSC_BYPASS(x)               (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TSC_BYPASS_SHIFT)) & ADC_ETC_CTRL_TSC_BYPASS_MASK)
-#define ADC_ETC_CTRL_SOFTRST_MASK                (0x80000000U)
-#define ADC_ETC_CTRL_SOFTRST_SHIFT               (31U)
-#define ADC_ETC_CTRL_SOFTRST(x)                  (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_SOFTRST_SHIFT)) & ADC_ETC_CTRL_SOFTRST_MASK)
+#define ADC_ETC_CTRL_TRIG_ENABLE_MASK  (0xFFU)
+#define ADC_ETC_CTRL_TRIG_ENABLE_SHIFT (0U)
+#define ADC_ETC_CTRL_TRIG_ENABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK  (0x100U)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT (8U)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK  (0xE00U)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT (9U)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK  (0x1000U)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT (12U)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK  (0xE000U)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT (13U)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK)
+#define ADC_ETC_CTRL_PRE_DIVIDER_MASK  (0xFF0000U)
+#define ADC_ETC_CTRL_PRE_DIVIDER_SHIFT (16U)
+#define ADC_ETC_CTRL_PRE_DIVIDER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_PRE_DIVIDER_SHIFT)) & ADC_ETC_CTRL_PRE_DIVIDER_MASK)
+#define ADC_ETC_CTRL_DMA_MODE_SEL_MASK  (0x20000000U)
+#define ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT (29U)
+#define ADC_ETC_CTRL_DMA_MODE_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT)) & ADC_ETC_CTRL_DMA_MODE_SEL_MASK)
+#define ADC_ETC_CTRL_TSC_BYPASS_MASK  (0x40000000U)
+#define ADC_ETC_CTRL_TSC_BYPASS_SHIFT (30U)
+#define ADC_ETC_CTRL_TSC_BYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TSC_BYPASS_SHIFT)) & ADC_ETC_CTRL_TSC_BYPASS_MASK)
+#define ADC_ETC_CTRL_SOFTRST_MASK  (0x80000000U)
+#define ADC_ETC_CTRL_SOFTRST_SHIFT (31U)
+#define ADC_ETC_CTRL_SOFTRST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_SOFTRST_SHIFT)) & ADC_ETC_CTRL_SOFTRST_MASK)
 /*! @} */
 
 /*! @name DONE0_1_IRQ - ETC DONE0 and DONE1 IRQ State Register */
 /*! @{ */
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK     (0x1U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT    (0U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK     (0x2U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT    (1U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK     (0x4U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT    (2U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK     (0x8U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT    (3U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK     (0x10U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT    (4U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK     (0x20U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT    (5U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK     (0x40U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT    (6U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK     (0x80U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT    (7U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK     (0x10000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT    (16U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK     (0x20000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT    (17U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK     (0x40000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT    (18U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK     (0x80000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT    (19U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK     (0x100000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT    (20U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK     (0x200000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT    (21U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK     (0x400000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT    (22U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK     (0x800000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT    (23U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK  (0x1U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT (0U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK  (0x2U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT (1U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK  (0x4U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT (2U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK  (0x8U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT (3U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK  (0x10U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT (4U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK  (0x20U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT (5U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK  (0x40U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT (6U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK  (0x80U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT (7U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK  (0x10000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT (16U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK  (0x20000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT (17U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK  (0x40000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT (18U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK  (0x80000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT (19U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK  (0x100000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT (20U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK  (0x200000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT (21U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK  (0x400000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT (22U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK  (0x800000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT (23U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK)
 /*! @} */
 
 /*! @name DONE2_ERR_IRQ - ETC DONE_2 and DONE_ERR IRQ State Register */
 /*! @{ */
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK   (0x1U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT  (0U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK   (0x2U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT  (1U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK   (0x4U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT  (2U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK   (0x8U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT  (3U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK   (0x10U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT  (4U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK   (0x20U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT  (5U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK   (0x40U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT  (6U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK   (0x80U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT  (7U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK     (0x10000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT    (16U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK     (0x20000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT    (17U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK     (0x40000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT    (18U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK     (0x80000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT    (19U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK     (0x100000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT    (20U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK     (0x200000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT    (21U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK     (0x400000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT    (22U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK     (0x800000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT    (23U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK  (0x1U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT (0U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK  (0x2U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT (1U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK  (0x4U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT (2U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK  (0x8U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT (3U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK  (0x10U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT (4U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK  (0x20U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT (5U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK  (0x40U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT (6U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK  (0x80U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT (7U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK  (0x10000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT (16U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK  (0x20000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT (17U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK  (0x40000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT (18U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK  (0x80000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT (19U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK  (0x100000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT (20U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK  (0x200000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT (21U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK  (0x400000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT (22U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK  (0x800000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT (23U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK)
 /*! @} */
 
 /*! @name DMA_CTRL - ETC DMA control Register */
 /*! @{ */
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK       (0x1U)
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT      (0U)
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK       (0x2U)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT      (1U)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK       (0x4U)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT      (2U)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK       (0x8U)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT      (3U)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK       (0x10U)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT      (4U)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK       (0x20U)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT      (5U)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK       (0x40U)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT      (6U)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK       (0x80U)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT      (7U)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK          (0x10000U)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT         (16U)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK          (0x20000U)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT         (17U)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK          (0x40000U)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT         (18U)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK          (0x80000U)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT         (19U)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK          (0x100000U)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT         (20U)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK          (0x200000U)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT         (21U)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK          (0x400000U)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT         (22U)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK          (0x800000U)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT         (23U)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK  (0x1U)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT (0U)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK  (0x2U)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT (1U)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK  (0x4U)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT (2U)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK  (0x8U)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT (3U)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK  (0x10U)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT (4U)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK  (0x20U)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT (5U)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK  (0x40U)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT (6U)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK  (0x80U)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT (7U)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK  (0x10000U)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT (16U)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK  (0x20000U)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT (17U)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK  (0x40000U)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT (18U)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK  (0x80000U)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT (19U)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK  (0x100000U)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT (20U)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK  (0x200000U)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT (21U)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK  (0x400000U)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT (22U)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK  (0x800000U)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT (23U)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK)
 /*! @} */
 
 /*! @name TRIGn_CTRL - ETC_TRIG0 Control Register..ETC_TRIG7 Control Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK          (0x1U)
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT         (0U)
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT)) & ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK        (0x10U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT       (4U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK       (0x700U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT      (8U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK    (0x7000U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT   (12U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY(x)      (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK        (0x10000U)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT       (16U)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK  (0x1U)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT (0U)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT)) & ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK  (0x10U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT (4U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK  (0x700U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT (8U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK  (0x7000U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT (12U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK  (0x10000U)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT (16U)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CTRL */
-#define ADC_ETC_TRIGn_CTRL_COUNT                 (8U)
+#define ADC_ETC_TRIGn_CTRL_COUNT (8U)
 
 /*! @name TRIGn_COUNTER - ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK    (0xFFFFU)
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT   (0U)
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY(x)      (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT)) & ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK)
-#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK (0xFFFF0000U)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK  (0xFFFFU)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT (0U)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT)) & ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK)
+#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK  (0xFFFF0000U)
 #define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT (16U)
-#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL(x) (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT)) & ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK)
+#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT)) &                                    \
+     ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_COUNTER */
-#define ADC_ETC_TRIGn_COUNTER_COUNT              (8U)
+#define ADC_ETC_TRIGn_COUNTER_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_1_0 - ETC_TRIG Chain 0/1 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_1_0 */
-#define ADC_ETC_TRIGn_CHAIN_1_0_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_3_2 - ETC_TRIG Chain 2/3 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_3_2 */
-#define ADC_ETC_TRIGn_CHAIN_3_2_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_5_4 - ETC_TRIG Chain 4/5 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_5_4 */
-#define ADC_ETC_TRIGn_CHAIN_5_4_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_7_6 - ETC_TRIG Chain 6/7 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_7_6 */
-#define ADC_ETC_TRIGn_CHAIN_7_6_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_COUNT (8U)
 
 /*! @name TRIGn_RESULT_1_0 - ETC_TRIG Result Data 1/0 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_1_0 */
-#define ADC_ETC_TRIGn_RESULT_1_0_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_1_0_COUNT (8U)
 
 /*! @name TRIGn_RESULT_3_2 - ETC_TRIG Result Data 3/2 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_3_2 */
-#define ADC_ETC_TRIGn_RESULT_3_2_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_3_2_COUNT (8U)
 
 /*! @name TRIGn_RESULT_5_4 - ETC_TRIG Result Data 5/4 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_5_4 */
-#define ADC_ETC_TRIGn_RESULT_5_4_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_5_4_COUNT (8U)
 
 /*! @name TRIGn_RESULT_7_6 - ETC_TRIG Result Data 7/6 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_7_6 */
-#define ADC_ETC_TRIGn_RESULT_7_6_COUNT           (8U)
-
+#define ADC_ETC_TRIGn_RESULT_7_6_COUNT (8U)
 
 /*!
  * @}
  */ /* end of group ADC_ETC_Register_Masks */
 
-
 /* ADC_ETC - Peripheral instance base addresses */
 /** Peripheral ADC_ETC base address */
-#define ADC_ETC_BASE                             (0x403B0000u)
+#define ADC_ETC_BASE (0x403B0000u)
 /** Peripheral ADC_ETC base pointer */
-#define ADC_ETC                                  ((ADC_ETC_Type *)ADC_ETC_BASE)
+#define ADC_ETC ((ADC_ETC_Type *)ADC_ETC_BASE)
 /** Array initializer of ADC_ETC peripheral base addresses */
-#define ADC_ETC_BASE_ADDRS                       { ADC_ETC_BASE }
+#define ADC_ETC_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        ADC_ETC_BASE                                                                                                   \
+    }
 /** Array initializer of ADC_ETC peripheral base pointers */
-#define ADC_ETC_BASE_PTRS                        { ADC_ETC }
+#define ADC_ETC_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        ADC_ETC                                                                                                        \
+    }
 /** Interrupt vectors for the ADC_ETC peripheral type */
-#define ADC_ETC_IRQS                             { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }
-#define ADC_ETC_FAULT_IRQS                       { ADC_ETC_ERROR_IRQ_IRQn }
+#define ADC_ETC_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {                                                                                                              \
+            ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn                                                    \
+        }                                                                                                              \
+    }
+#define ADC_ETC_FAULT_IRQS                                                                                             \
+    {                                                                                                                  \
+        ADC_ETC_ERROR_IRQ_IRQn                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group ADC_ETC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- AIPSTZ Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1965,14 +2143,15 @@ typedef struct {
  */
 
 /** AIPSTZ - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MPR;                               /**< Master Priviledge Registers, offset: 0x0 */
-       uint8_t RESERVED_0[60];
-  __IO uint32_t OPACR;                             /**< Off-Platform Peripheral Access Control Registers, offset: 0x40 */
-  __IO uint32_t OPACR1;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x44 */
-  __IO uint32_t OPACR2;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x48 */
-  __IO uint32_t OPACR3;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x4C */
-  __IO uint32_t OPACR4;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x50 */
+typedef struct
+{
+    __IO uint32_t MPR; /**< Master Priviledge Registers, offset: 0x0 */
+    uint8_t RESERVED_0[60];
+    __IO uint32_t OPACR;  /**< Off-Platform Peripheral Access Control Registers, offset: 0x40 */
+    __IO uint32_t OPACR1; /**< Off-Platform Peripheral Access Control Registers, offset: 0x44 */
+    __IO uint32_t OPACR2; /**< Off-Platform Peripheral Access Control Registers, offset: 0x48 */
+    __IO uint32_t OPACR3; /**< Off-Platform Peripheral Access Control Registers, offset: 0x4C */
+    __IO uint32_t OPACR4; /**< Off-Platform Peripheral Access Control Registers, offset: 0x50 */
 } AIPSTZ_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1986,178 +2165,205 @@ typedef struct {
 
 /*! @name MPR - Master Priviledge Registers */
 /*! @{ */
-#define AIPSTZ_MPR_MPROT5_MASK                   (0xF00U)
-#define AIPSTZ_MPR_MPROT5_SHIFT                  (8U)
-#define AIPSTZ_MPR_MPROT5(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT5_SHIFT)) & AIPSTZ_MPR_MPROT5_MASK)
-#define AIPSTZ_MPR_MPROT3_MASK                   (0xF0000U)
-#define AIPSTZ_MPR_MPROT3_SHIFT                  (16U)
-#define AIPSTZ_MPR_MPROT3(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT3_SHIFT)) & AIPSTZ_MPR_MPROT3_MASK)
-#define AIPSTZ_MPR_MPROT2_MASK                   (0xF00000U)
-#define AIPSTZ_MPR_MPROT2_SHIFT                  (20U)
-#define AIPSTZ_MPR_MPROT2(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT2_SHIFT)) & AIPSTZ_MPR_MPROT2_MASK)
-#define AIPSTZ_MPR_MPROT1_MASK                   (0xF000000U)
-#define AIPSTZ_MPR_MPROT1_SHIFT                  (24U)
-#define AIPSTZ_MPR_MPROT1(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT1_SHIFT)) & AIPSTZ_MPR_MPROT1_MASK)
-#define AIPSTZ_MPR_MPROT0_MASK                   (0xF0000000U)
-#define AIPSTZ_MPR_MPROT0_SHIFT                  (28U)
-#define AIPSTZ_MPR_MPROT0(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT0_SHIFT)) & AIPSTZ_MPR_MPROT0_MASK)
+#define AIPSTZ_MPR_MPROT5_MASK  (0xF00U)
+#define AIPSTZ_MPR_MPROT5_SHIFT (8U)
+#define AIPSTZ_MPR_MPROT5(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT5_SHIFT)) & AIPSTZ_MPR_MPROT5_MASK)
+#define AIPSTZ_MPR_MPROT3_MASK  (0xF0000U)
+#define AIPSTZ_MPR_MPROT3_SHIFT (16U)
+#define AIPSTZ_MPR_MPROT3(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT3_SHIFT)) & AIPSTZ_MPR_MPROT3_MASK)
+#define AIPSTZ_MPR_MPROT2_MASK  (0xF00000U)
+#define AIPSTZ_MPR_MPROT2_SHIFT (20U)
+#define AIPSTZ_MPR_MPROT2(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT2_SHIFT)) & AIPSTZ_MPR_MPROT2_MASK)
+#define AIPSTZ_MPR_MPROT1_MASK  (0xF000000U)
+#define AIPSTZ_MPR_MPROT1_SHIFT (24U)
+#define AIPSTZ_MPR_MPROT1(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT1_SHIFT)) & AIPSTZ_MPR_MPROT1_MASK)
+#define AIPSTZ_MPR_MPROT0_MASK  (0xF0000000U)
+#define AIPSTZ_MPR_MPROT0_SHIFT (28U)
+#define AIPSTZ_MPR_MPROT0(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT0_SHIFT)) & AIPSTZ_MPR_MPROT0_MASK)
 /*! @} */
 
 /*! @name OPACR - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR_OPAC7_MASK                  (0xFU)
-#define AIPSTZ_OPACR_OPAC7_SHIFT                 (0U)
-#define AIPSTZ_OPACR_OPAC7(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC7_SHIFT)) & AIPSTZ_OPACR_OPAC7_MASK)
-#define AIPSTZ_OPACR_OPAC6_MASK                  (0xF0U)
-#define AIPSTZ_OPACR_OPAC6_SHIFT                 (4U)
-#define AIPSTZ_OPACR_OPAC6(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC6_SHIFT)) & AIPSTZ_OPACR_OPAC6_MASK)
-#define AIPSTZ_OPACR_OPAC5_MASK                  (0xF00U)
-#define AIPSTZ_OPACR_OPAC5_SHIFT                 (8U)
-#define AIPSTZ_OPACR_OPAC5(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC5_SHIFT)) & AIPSTZ_OPACR_OPAC5_MASK)
-#define AIPSTZ_OPACR_OPAC4_MASK                  (0xF000U)
-#define AIPSTZ_OPACR_OPAC4_SHIFT                 (12U)
-#define AIPSTZ_OPACR_OPAC4(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC4_SHIFT)) & AIPSTZ_OPACR_OPAC4_MASK)
-#define AIPSTZ_OPACR_OPAC3_MASK                  (0xF0000U)
-#define AIPSTZ_OPACR_OPAC3_SHIFT                 (16U)
-#define AIPSTZ_OPACR_OPAC3(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC3_SHIFT)) & AIPSTZ_OPACR_OPAC3_MASK)
-#define AIPSTZ_OPACR_OPAC2_MASK                  (0xF00000U)
-#define AIPSTZ_OPACR_OPAC2_SHIFT                 (20U)
-#define AIPSTZ_OPACR_OPAC2(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC2_SHIFT)) & AIPSTZ_OPACR_OPAC2_MASK)
-#define AIPSTZ_OPACR_OPAC1_MASK                  (0xF000000U)
-#define AIPSTZ_OPACR_OPAC1_SHIFT                 (24U)
-#define AIPSTZ_OPACR_OPAC1(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC1_SHIFT)) & AIPSTZ_OPACR_OPAC1_MASK)
-#define AIPSTZ_OPACR_OPAC0_MASK                  (0xF0000000U)
-#define AIPSTZ_OPACR_OPAC0_SHIFT                 (28U)
-#define AIPSTZ_OPACR_OPAC0(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC0_SHIFT)) & AIPSTZ_OPACR_OPAC0_MASK)
+#define AIPSTZ_OPACR_OPAC7_MASK  (0xFU)
+#define AIPSTZ_OPACR_OPAC7_SHIFT (0U)
+#define AIPSTZ_OPACR_OPAC7(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC7_SHIFT)) & AIPSTZ_OPACR_OPAC7_MASK)
+#define AIPSTZ_OPACR_OPAC6_MASK  (0xF0U)
+#define AIPSTZ_OPACR_OPAC6_SHIFT (4U)
+#define AIPSTZ_OPACR_OPAC6(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC6_SHIFT)) & AIPSTZ_OPACR_OPAC6_MASK)
+#define AIPSTZ_OPACR_OPAC5_MASK  (0xF00U)
+#define AIPSTZ_OPACR_OPAC5_SHIFT (8U)
+#define AIPSTZ_OPACR_OPAC5(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC5_SHIFT)) & AIPSTZ_OPACR_OPAC5_MASK)
+#define AIPSTZ_OPACR_OPAC4_MASK  (0xF000U)
+#define AIPSTZ_OPACR_OPAC4_SHIFT (12U)
+#define AIPSTZ_OPACR_OPAC4(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC4_SHIFT)) & AIPSTZ_OPACR_OPAC4_MASK)
+#define AIPSTZ_OPACR_OPAC3_MASK  (0xF0000U)
+#define AIPSTZ_OPACR_OPAC3_SHIFT (16U)
+#define AIPSTZ_OPACR_OPAC3(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC3_SHIFT)) & AIPSTZ_OPACR_OPAC3_MASK)
+#define AIPSTZ_OPACR_OPAC2_MASK  (0xF00000U)
+#define AIPSTZ_OPACR_OPAC2_SHIFT (20U)
+#define AIPSTZ_OPACR_OPAC2(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC2_SHIFT)) & AIPSTZ_OPACR_OPAC2_MASK)
+#define AIPSTZ_OPACR_OPAC1_MASK  (0xF000000U)
+#define AIPSTZ_OPACR_OPAC1_SHIFT (24U)
+#define AIPSTZ_OPACR_OPAC1(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC1_SHIFT)) & AIPSTZ_OPACR_OPAC1_MASK)
+#define AIPSTZ_OPACR_OPAC0_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR_OPAC0_SHIFT (28U)
+#define AIPSTZ_OPACR_OPAC0(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC0_SHIFT)) & AIPSTZ_OPACR_OPAC0_MASK)
 /*! @} */
 
 /*! @name OPACR1 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR1_OPAC15_MASK                (0xFU)
-#define AIPSTZ_OPACR1_OPAC15_SHIFT               (0U)
-#define AIPSTZ_OPACR1_OPAC15(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC15_SHIFT)) & AIPSTZ_OPACR1_OPAC15_MASK)
-#define AIPSTZ_OPACR1_OPAC14_MASK                (0xF0U)
-#define AIPSTZ_OPACR1_OPAC14_SHIFT               (4U)
-#define AIPSTZ_OPACR1_OPAC14(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC14_SHIFT)) & AIPSTZ_OPACR1_OPAC14_MASK)
-#define AIPSTZ_OPACR1_OPAC13_MASK                (0xF00U)
-#define AIPSTZ_OPACR1_OPAC13_SHIFT               (8U)
-#define AIPSTZ_OPACR1_OPAC13(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC13_SHIFT)) & AIPSTZ_OPACR1_OPAC13_MASK)
-#define AIPSTZ_OPACR1_OPAC12_MASK                (0xF000U)
-#define AIPSTZ_OPACR1_OPAC12_SHIFT               (12U)
-#define AIPSTZ_OPACR1_OPAC12(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC12_SHIFT)) & AIPSTZ_OPACR1_OPAC12_MASK)
-#define AIPSTZ_OPACR1_OPAC11_MASK                (0xF0000U)
-#define AIPSTZ_OPACR1_OPAC11_SHIFT               (16U)
-#define AIPSTZ_OPACR1_OPAC11(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC11_SHIFT)) & AIPSTZ_OPACR1_OPAC11_MASK)
-#define AIPSTZ_OPACR1_OPAC10_MASK                (0xF00000U)
-#define AIPSTZ_OPACR1_OPAC10_SHIFT               (20U)
-#define AIPSTZ_OPACR1_OPAC10(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC10_SHIFT)) & AIPSTZ_OPACR1_OPAC10_MASK)
-#define AIPSTZ_OPACR1_OPAC9_MASK                 (0xF000000U)
-#define AIPSTZ_OPACR1_OPAC9_SHIFT                (24U)
-#define AIPSTZ_OPACR1_OPAC9(x)                   (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC9_SHIFT)) & AIPSTZ_OPACR1_OPAC9_MASK)
-#define AIPSTZ_OPACR1_OPAC8_MASK                 (0xF0000000U)
-#define AIPSTZ_OPACR1_OPAC8_SHIFT                (28U)
-#define AIPSTZ_OPACR1_OPAC8(x)                   (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC8_SHIFT)) & AIPSTZ_OPACR1_OPAC8_MASK)
+#define AIPSTZ_OPACR1_OPAC15_MASK  (0xFU)
+#define AIPSTZ_OPACR1_OPAC15_SHIFT (0U)
+#define AIPSTZ_OPACR1_OPAC15(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC15_SHIFT)) & AIPSTZ_OPACR1_OPAC15_MASK)
+#define AIPSTZ_OPACR1_OPAC14_MASK  (0xF0U)
+#define AIPSTZ_OPACR1_OPAC14_SHIFT (4U)
+#define AIPSTZ_OPACR1_OPAC14(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC14_SHIFT)) & AIPSTZ_OPACR1_OPAC14_MASK)
+#define AIPSTZ_OPACR1_OPAC13_MASK  (0xF00U)
+#define AIPSTZ_OPACR1_OPAC13_SHIFT (8U)
+#define AIPSTZ_OPACR1_OPAC13(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC13_SHIFT)) & AIPSTZ_OPACR1_OPAC13_MASK)
+#define AIPSTZ_OPACR1_OPAC12_MASK  (0xF000U)
+#define AIPSTZ_OPACR1_OPAC12_SHIFT (12U)
+#define AIPSTZ_OPACR1_OPAC12(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC12_SHIFT)) & AIPSTZ_OPACR1_OPAC12_MASK)
+#define AIPSTZ_OPACR1_OPAC11_MASK  (0xF0000U)
+#define AIPSTZ_OPACR1_OPAC11_SHIFT (16U)
+#define AIPSTZ_OPACR1_OPAC11(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC11_SHIFT)) & AIPSTZ_OPACR1_OPAC11_MASK)
+#define AIPSTZ_OPACR1_OPAC10_MASK  (0xF00000U)
+#define AIPSTZ_OPACR1_OPAC10_SHIFT (20U)
+#define AIPSTZ_OPACR1_OPAC10(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC10_SHIFT)) & AIPSTZ_OPACR1_OPAC10_MASK)
+#define AIPSTZ_OPACR1_OPAC9_MASK  (0xF000000U)
+#define AIPSTZ_OPACR1_OPAC9_SHIFT (24U)
+#define AIPSTZ_OPACR1_OPAC9(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC9_SHIFT)) & AIPSTZ_OPACR1_OPAC9_MASK)
+#define AIPSTZ_OPACR1_OPAC8_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR1_OPAC8_SHIFT (28U)
+#define AIPSTZ_OPACR1_OPAC8(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC8_SHIFT)) & AIPSTZ_OPACR1_OPAC8_MASK)
 /*! @} */
 
 /*! @name OPACR2 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR2_OPAC23_MASK                (0xFU)
-#define AIPSTZ_OPACR2_OPAC23_SHIFT               (0U)
-#define AIPSTZ_OPACR2_OPAC23(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC23_SHIFT)) & AIPSTZ_OPACR2_OPAC23_MASK)
-#define AIPSTZ_OPACR2_OPAC22_MASK                (0xF0U)
-#define AIPSTZ_OPACR2_OPAC22_SHIFT               (4U)
-#define AIPSTZ_OPACR2_OPAC22(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC22_SHIFT)) & AIPSTZ_OPACR2_OPAC22_MASK)
-#define AIPSTZ_OPACR2_OPAC21_MASK                (0xF00U)
-#define AIPSTZ_OPACR2_OPAC21_SHIFT               (8U)
-#define AIPSTZ_OPACR2_OPAC21(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC21_SHIFT)) & AIPSTZ_OPACR2_OPAC21_MASK)
-#define AIPSTZ_OPACR2_OPAC20_MASK                (0xF000U)
-#define AIPSTZ_OPACR2_OPAC20_SHIFT               (12U)
-#define AIPSTZ_OPACR2_OPAC20(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC20_SHIFT)) & AIPSTZ_OPACR2_OPAC20_MASK)
-#define AIPSTZ_OPACR2_OPAC19_MASK                (0xF0000U)
-#define AIPSTZ_OPACR2_OPAC19_SHIFT               (16U)
-#define AIPSTZ_OPACR2_OPAC19(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC19_SHIFT)) & AIPSTZ_OPACR2_OPAC19_MASK)
-#define AIPSTZ_OPACR2_OPAC18_MASK                (0xF00000U)
-#define AIPSTZ_OPACR2_OPAC18_SHIFT               (20U)
-#define AIPSTZ_OPACR2_OPAC18(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC18_SHIFT)) & AIPSTZ_OPACR2_OPAC18_MASK)
-#define AIPSTZ_OPACR2_OPAC17_MASK                (0xF000000U)
-#define AIPSTZ_OPACR2_OPAC17_SHIFT               (24U)
-#define AIPSTZ_OPACR2_OPAC17(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC17_SHIFT)) & AIPSTZ_OPACR2_OPAC17_MASK)
-#define AIPSTZ_OPACR2_OPAC16_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR2_OPAC16_SHIFT               (28U)
-#define AIPSTZ_OPACR2_OPAC16(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC16_SHIFT)) & AIPSTZ_OPACR2_OPAC16_MASK)
+#define AIPSTZ_OPACR2_OPAC23_MASK  (0xFU)
+#define AIPSTZ_OPACR2_OPAC23_SHIFT (0U)
+#define AIPSTZ_OPACR2_OPAC23(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC23_SHIFT)) & AIPSTZ_OPACR2_OPAC23_MASK)
+#define AIPSTZ_OPACR2_OPAC22_MASK  (0xF0U)
+#define AIPSTZ_OPACR2_OPAC22_SHIFT (4U)
+#define AIPSTZ_OPACR2_OPAC22(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC22_SHIFT)) & AIPSTZ_OPACR2_OPAC22_MASK)
+#define AIPSTZ_OPACR2_OPAC21_MASK  (0xF00U)
+#define AIPSTZ_OPACR2_OPAC21_SHIFT (8U)
+#define AIPSTZ_OPACR2_OPAC21(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC21_SHIFT)) & AIPSTZ_OPACR2_OPAC21_MASK)
+#define AIPSTZ_OPACR2_OPAC20_MASK  (0xF000U)
+#define AIPSTZ_OPACR2_OPAC20_SHIFT (12U)
+#define AIPSTZ_OPACR2_OPAC20(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC20_SHIFT)) & AIPSTZ_OPACR2_OPAC20_MASK)
+#define AIPSTZ_OPACR2_OPAC19_MASK  (0xF0000U)
+#define AIPSTZ_OPACR2_OPAC19_SHIFT (16U)
+#define AIPSTZ_OPACR2_OPAC19(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC19_SHIFT)) & AIPSTZ_OPACR2_OPAC19_MASK)
+#define AIPSTZ_OPACR2_OPAC18_MASK  (0xF00000U)
+#define AIPSTZ_OPACR2_OPAC18_SHIFT (20U)
+#define AIPSTZ_OPACR2_OPAC18(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC18_SHIFT)) & AIPSTZ_OPACR2_OPAC18_MASK)
+#define AIPSTZ_OPACR2_OPAC17_MASK  (0xF000000U)
+#define AIPSTZ_OPACR2_OPAC17_SHIFT (24U)
+#define AIPSTZ_OPACR2_OPAC17(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC17_SHIFT)) & AIPSTZ_OPACR2_OPAC17_MASK)
+#define AIPSTZ_OPACR2_OPAC16_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR2_OPAC16_SHIFT (28U)
+#define AIPSTZ_OPACR2_OPAC16(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC16_SHIFT)) & AIPSTZ_OPACR2_OPAC16_MASK)
 /*! @} */
 
 /*! @name OPACR3 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR3_OPAC31_MASK                (0xFU)
-#define AIPSTZ_OPACR3_OPAC31_SHIFT               (0U)
-#define AIPSTZ_OPACR3_OPAC31(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC31_SHIFT)) & AIPSTZ_OPACR3_OPAC31_MASK)
-#define AIPSTZ_OPACR3_OPAC30_MASK                (0xF0U)
-#define AIPSTZ_OPACR3_OPAC30_SHIFT               (4U)
-#define AIPSTZ_OPACR3_OPAC30(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC30_SHIFT)) & AIPSTZ_OPACR3_OPAC30_MASK)
-#define AIPSTZ_OPACR3_OPAC29_MASK                (0xF00U)
-#define AIPSTZ_OPACR3_OPAC29_SHIFT               (8U)
-#define AIPSTZ_OPACR3_OPAC29(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC29_SHIFT)) & AIPSTZ_OPACR3_OPAC29_MASK)
-#define AIPSTZ_OPACR3_OPAC28_MASK                (0xF000U)
-#define AIPSTZ_OPACR3_OPAC28_SHIFT               (12U)
-#define AIPSTZ_OPACR3_OPAC28(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC28_SHIFT)) & AIPSTZ_OPACR3_OPAC28_MASK)
-#define AIPSTZ_OPACR3_OPAC27_MASK                (0xF0000U)
-#define AIPSTZ_OPACR3_OPAC27_SHIFT               (16U)
-#define AIPSTZ_OPACR3_OPAC27(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC27_SHIFT)) & AIPSTZ_OPACR3_OPAC27_MASK)
-#define AIPSTZ_OPACR3_OPAC26_MASK                (0xF00000U)
-#define AIPSTZ_OPACR3_OPAC26_SHIFT               (20U)
-#define AIPSTZ_OPACR3_OPAC26(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC26_SHIFT)) & AIPSTZ_OPACR3_OPAC26_MASK)
-#define AIPSTZ_OPACR3_OPAC25_MASK                (0xF000000U)
-#define AIPSTZ_OPACR3_OPAC25_SHIFT               (24U)
-#define AIPSTZ_OPACR3_OPAC25(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC25_SHIFT)) & AIPSTZ_OPACR3_OPAC25_MASK)
-#define AIPSTZ_OPACR3_OPAC24_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR3_OPAC24_SHIFT               (28U)
-#define AIPSTZ_OPACR3_OPAC24(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC24_SHIFT)) & AIPSTZ_OPACR3_OPAC24_MASK)
+#define AIPSTZ_OPACR3_OPAC31_MASK  (0xFU)
+#define AIPSTZ_OPACR3_OPAC31_SHIFT (0U)
+#define AIPSTZ_OPACR3_OPAC31(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC31_SHIFT)) & AIPSTZ_OPACR3_OPAC31_MASK)
+#define AIPSTZ_OPACR3_OPAC30_MASK  (0xF0U)
+#define AIPSTZ_OPACR3_OPAC30_SHIFT (4U)
+#define AIPSTZ_OPACR3_OPAC30(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC30_SHIFT)) & AIPSTZ_OPACR3_OPAC30_MASK)
+#define AIPSTZ_OPACR3_OPAC29_MASK  (0xF00U)
+#define AIPSTZ_OPACR3_OPAC29_SHIFT (8U)
+#define AIPSTZ_OPACR3_OPAC29(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC29_SHIFT)) & AIPSTZ_OPACR3_OPAC29_MASK)
+#define AIPSTZ_OPACR3_OPAC28_MASK  (0xF000U)
+#define AIPSTZ_OPACR3_OPAC28_SHIFT (12U)
+#define AIPSTZ_OPACR3_OPAC28(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC28_SHIFT)) & AIPSTZ_OPACR3_OPAC28_MASK)
+#define AIPSTZ_OPACR3_OPAC27_MASK  (0xF0000U)
+#define AIPSTZ_OPACR3_OPAC27_SHIFT (16U)
+#define AIPSTZ_OPACR3_OPAC27(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC27_SHIFT)) & AIPSTZ_OPACR3_OPAC27_MASK)
+#define AIPSTZ_OPACR3_OPAC26_MASK  (0xF00000U)
+#define AIPSTZ_OPACR3_OPAC26_SHIFT (20U)
+#define AIPSTZ_OPACR3_OPAC26(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC26_SHIFT)) & AIPSTZ_OPACR3_OPAC26_MASK)
+#define AIPSTZ_OPACR3_OPAC25_MASK  (0xF000000U)
+#define AIPSTZ_OPACR3_OPAC25_SHIFT (24U)
+#define AIPSTZ_OPACR3_OPAC25(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC25_SHIFT)) & AIPSTZ_OPACR3_OPAC25_MASK)
+#define AIPSTZ_OPACR3_OPAC24_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR3_OPAC24_SHIFT (28U)
+#define AIPSTZ_OPACR3_OPAC24(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC24_SHIFT)) & AIPSTZ_OPACR3_OPAC24_MASK)
 /*! @} */
 
 /*! @name OPACR4 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR4_OPAC33_MASK                (0xF000000U)
-#define AIPSTZ_OPACR4_OPAC33_SHIFT               (24U)
-#define AIPSTZ_OPACR4_OPAC33(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC33_SHIFT)) & AIPSTZ_OPACR4_OPAC33_MASK)
-#define AIPSTZ_OPACR4_OPAC32_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR4_OPAC32_SHIFT               (28U)
-#define AIPSTZ_OPACR4_OPAC32(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC32_SHIFT)) & AIPSTZ_OPACR4_OPAC32_MASK)
+#define AIPSTZ_OPACR4_OPAC33_MASK  (0xF000000U)
+#define AIPSTZ_OPACR4_OPAC33_SHIFT (24U)
+#define AIPSTZ_OPACR4_OPAC33(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC33_SHIFT)) & AIPSTZ_OPACR4_OPAC33_MASK)
+#define AIPSTZ_OPACR4_OPAC32_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR4_OPAC32_SHIFT (28U)
+#define AIPSTZ_OPACR4_OPAC32(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC32_SHIFT)) & AIPSTZ_OPACR4_OPAC32_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group AIPSTZ_Register_Masks */
 
-
 /* AIPSTZ - Peripheral instance base addresses */
 /** Peripheral AIPSTZ1 base address */
-#define AIPSTZ1_BASE                             (0x4007C000u)
+#define AIPSTZ1_BASE (0x4007C000u)
 /** Peripheral AIPSTZ1 base pointer */
-#define AIPSTZ1                                  ((AIPSTZ_Type *)AIPSTZ1_BASE)
+#define AIPSTZ1 ((AIPSTZ_Type *)AIPSTZ1_BASE)
 /** Peripheral AIPSTZ2 base address */
-#define AIPSTZ2_BASE                             (0x4017C000u)
+#define AIPSTZ2_BASE (0x4017C000u)
 /** Peripheral AIPSTZ2 base pointer */
-#define AIPSTZ2                                  ((AIPSTZ_Type *)AIPSTZ2_BASE)
+#define AIPSTZ2 ((AIPSTZ_Type *)AIPSTZ2_BASE)
 /** Peripheral AIPSTZ3 base address */
-#define AIPSTZ3_BASE                             (0x4027C000u)
+#define AIPSTZ3_BASE (0x4027C000u)
 /** Peripheral AIPSTZ3 base pointer */
-#define AIPSTZ3                                  ((AIPSTZ_Type *)AIPSTZ3_BASE)
+#define AIPSTZ3 ((AIPSTZ_Type *)AIPSTZ3_BASE)
 /** Peripheral AIPSTZ4 base address */
-#define AIPSTZ4_BASE                             (0x4037C000u)
+#define AIPSTZ4_BASE (0x4037C000u)
 /** Peripheral AIPSTZ4 base pointer */
-#define AIPSTZ4                                  ((AIPSTZ_Type *)AIPSTZ4_BASE)
+#define AIPSTZ4 ((AIPSTZ_Type *)AIPSTZ4_BASE)
 /** Array initializer of AIPSTZ peripheral base addresses */
-#define AIPSTZ_BASE_ADDRS                        { 0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE }
+#define AIPSTZ_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE                                                     \
+    }
 /** Array initializer of AIPSTZ peripheral base pointers */
-#define AIPSTZ_BASE_PTRS                         { (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4 }
+#define AIPSTZ_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group AIPSTZ_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- AOI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2168,11 +2374,15 @@ typedef struct {
  */
 
 /** AOI - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x4 */
-    __IO uint16_t BFCRT01;                           /**< Boolean Function Term 0 and 1 Configuration Register for EVENTn, array offset: 0x0, array step: 0x4 */
-    __IO uint16_t BFCRT23;                           /**< Boolean Function Term 2 and 3 Configuration Register for EVENTn, array offset: 0x2, array step: 0x4 */
-  } BFCRT[4];
+typedef struct
+{
+    struct
+    {                          /* offset: 0x0, array step: 0x4 */
+        __IO uint16_t BFCRT01; /**< Boolean Function Term 0 and 1 Configuration Register for EVENTn, array offset: 0x0,
+                                  array step: 0x4 */
+        __IO uint16_t BFCRT23; /**< Boolean Function Term 2 and 3 Configuration Register for EVENTn, array offset: 0x2,
+                                  array step: 0x4 */
+    } BFCRT[4];
 } AOI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2186,91 +2396,94 @@ typedef struct {
 
 /*! @name BFCRT01 - Boolean Function Term 0 and 1 Configuration Register for EVENTn */
 /*! @{ */
-#define AOI_BFCRT01_PT1_DC_MASK                  (0x3U)
-#define AOI_BFCRT01_PT1_DC_SHIFT                 (0U)
-#define AOI_BFCRT01_PT1_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_DC_SHIFT)) & AOI_BFCRT01_PT1_DC_MASK)
-#define AOI_BFCRT01_PT1_CC_MASK                  (0xCU)
-#define AOI_BFCRT01_PT1_CC_SHIFT                 (2U)
-#define AOI_BFCRT01_PT1_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_CC_SHIFT)) & AOI_BFCRT01_PT1_CC_MASK)
-#define AOI_BFCRT01_PT1_BC_MASK                  (0x30U)
-#define AOI_BFCRT01_PT1_BC_SHIFT                 (4U)
-#define AOI_BFCRT01_PT1_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_BC_SHIFT)) & AOI_BFCRT01_PT1_BC_MASK)
-#define AOI_BFCRT01_PT1_AC_MASK                  (0xC0U)
-#define AOI_BFCRT01_PT1_AC_SHIFT                 (6U)
-#define AOI_BFCRT01_PT1_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_AC_SHIFT)) & AOI_BFCRT01_PT1_AC_MASK)
-#define AOI_BFCRT01_PT0_DC_MASK                  (0x300U)
-#define AOI_BFCRT01_PT0_DC_SHIFT                 (8U)
-#define AOI_BFCRT01_PT0_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_DC_SHIFT)) & AOI_BFCRT01_PT0_DC_MASK)
-#define AOI_BFCRT01_PT0_CC_MASK                  (0xC00U)
-#define AOI_BFCRT01_PT0_CC_SHIFT                 (10U)
-#define AOI_BFCRT01_PT0_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_CC_SHIFT)) & AOI_BFCRT01_PT0_CC_MASK)
-#define AOI_BFCRT01_PT0_BC_MASK                  (0x3000U)
-#define AOI_BFCRT01_PT0_BC_SHIFT                 (12U)
-#define AOI_BFCRT01_PT0_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_BC_SHIFT)) & AOI_BFCRT01_PT0_BC_MASK)
-#define AOI_BFCRT01_PT0_AC_MASK                  (0xC000U)
-#define AOI_BFCRT01_PT0_AC_SHIFT                 (14U)
-#define AOI_BFCRT01_PT0_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_AC_SHIFT)) & AOI_BFCRT01_PT0_AC_MASK)
+#define AOI_BFCRT01_PT1_DC_MASK  (0x3U)
+#define AOI_BFCRT01_PT1_DC_SHIFT (0U)
+#define AOI_BFCRT01_PT1_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_DC_SHIFT)) & AOI_BFCRT01_PT1_DC_MASK)
+#define AOI_BFCRT01_PT1_CC_MASK  (0xCU)
+#define AOI_BFCRT01_PT1_CC_SHIFT (2U)
+#define AOI_BFCRT01_PT1_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_CC_SHIFT)) & AOI_BFCRT01_PT1_CC_MASK)
+#define AOI_BFCRT01_PT1_BC_MASK  (0x30U)
+#define AOI_BFCRT01_PT1_BC_SHIFT (4U)
+#define AOI_BFCRT01_PT1_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_BC_SHIFT)) & AOI_BFCRT01_PT1_BC_MASK)
+#define AOI_BFCRT01_PT1_AC_MASK  (0xC0U)
+#define AOI_BFCRT01_PT1_AC_SHIFT (6U)
+#define AOI_BFCRT01_PT1_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_AC_SHIFT)) & AOI_BFCRT01_PT1_AC_MASK)
+#define AOI_BFCRT01_PT0_DC_MASK  (0x300U)
+#define AOI_BFCRT01_PT0_DC_SHIFT (8U)
+#define AOI_BFCRT01_PT0_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_DC_SHIFT)) & AOI_BFCRT01_PT0_DC_MASK)
+#define AOI_BFCRT01_PT0_CC_MASK  (0xC00U)
+#define AOI_BFCRT01_PT0_CC_SHIFT (10U)
+#define AOI_BFCRT01_PT0_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_CC_SHIFT)) & AOI_BFCRT01_PT0_CC_MASK)
+#define AOI_BFCRT01_PT0_BC_MASK  (0x3000U)
+#define AOI_BFCRT01_PT0_BC_SHIFT (12U)
+#define AOI_BFCRT01_PT0_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_BC_SHIFT)) & AOI_BFCRT01_PT0_BC_MASK)
+#define AOI_BFCRT01_PT0_AC_MASK  (0xC000U)
+#define AOI_BFCRT01_PT0_AC_SHIFT (14U)
+#define AOI_BFCRT01_PT0_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_AC_SHIFT)) & AOI_BFCRT01_PT0_AC_MASK)
 /*! @} */
 
 /* The count of AOI_BFCRT01 */
-#define AOI_BFCRT01_COUNT                        (4U)
+#define AOI_BFCRT01_COUNT (4U)
 
 /*! @name BFCRT23 - Boolean Function Term 2 and 3 Configuration Register for EVENTn */
 /*! @{ */
-#define AOI_BFCRT23_PT3_DC_MASK                  (0x3U)
-#define AOI_BFCRT23_PT3_DC_SHIFT                 (0U)
-#define AOI_BFCRT23_PT3_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_DC_SHIFT)) & AOI_BFCRT23_PT3_DC_MASK)
-#define AOI_BFCRT23_PT3_CC_MASK                  (0xCU)
-#define AOI_BFCRT23_PT3_CC_SHIFT                 (2U)
-#define AOI_BFCRT23_PT3_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_CC_SHIFT)) & AOI_BFCRT23_PT3_CC_MASK)
-#define AOI_BFCRT23_PT3_BC_MASK                  (0x30U)
-#define AOI_BFCRT23_PT3_BC_SHIFT                 (4U)
-#define AOI_BFCRT23_PT3_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_BC_SHIFT)) & AOI_BFCRT23_PT3_BC_MASK)
-#define AOI_BFCRT23_PT3_AC_MASK                  (0xC0U)
-#define AOI_BFCRT23_PT3_AC_SHIFT                 (6U)
-#define AOI_BFCRT23_PT3_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_AC_SHIFT)) & AOI_BFCRT23_PT3_AC_MASK)
-#define AOI_BFCRT23_PT2_DC_MASK                  (0x300U)
-#define AOI_BFCRT23_PT2_DC_SHIFT                 (8U)
-#define AOI_BFCRT23_PT2_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_DC_SHIFT)) & AOI_BFCRT23_PT2_DC_MASK)
-#define AOI_BFCRT23_PT2_CC_MASK                  (0xC00U)
-#define AOI_BFCRT23_PT2_CC_SHIFT                 (10U)
-#define AOI_BFCRT23_PT2_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_CC_SHIFT)) & AOI_BFCRT23_PT2_CC_MASK)
-#define AOI_BFCRT23_PT2_BC_MASK                  (0x3000U)
-#define AOI_BFCRT23_PT2_BC_SHIFT                 (12U)
-#define AOI_BFCRT23_PT2_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_BC_SHIFT)) & AOI_BFCRT23_PT2_BC_MASK)
-#define AOI_BFCRT23_PT2_AC_MASK                  (0xC000U)
-#define AOI_BFCRT23_PT2_AC_SHIFT                 (14U)
-#define AOI_BFCRT23_PT2_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_AC_SHIFT)) & AOI_BFCRT23_PT2_AC_MASK)
+#define AOI_BFCRT23_PT3_DC_MASK  (0x3U)
+#define AOI_BFCRT23_PT3_DC_SHIFT (0U)
+#define AOI_BFCRT23_PT3_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_DC_SHIFT)) & AOI_BFCRT23_PT3_DC_MASK)
+#define AOI_BFCRT23_PT3_CC_MASK  (0xCU)
+#define AOI_BFCRT23_PT3_CC_SHIFT (2U)
+#define AOI_BFCRT23_PT3_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_CC_SHIFT)) & AOI_BFCRT23_PT3_CC_MASK)
+#define AOI_BFCRT23_PT3_BC_MASK  (0x30U)
+#define AOI_BFCRT23_PT3_BC_SHIFT (4U)
+#define AOI_BFCRT23_PT3_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_BC_SHIFT)) & AOI_BFCRT23_PT3_BC_MASK)
+#define AOI_BFCRT23_PT3_AC_MASK  (0xC0U)
+#define AOI_BFCRT23_PT3_AC_SHIFT (6U)
+#define AOI_BFCRT23_PT3_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_AC_SHIFT)) & AOI_BFCRT23_PT3_AC_MASK)
+#define AOI_BFCRT23_PT2_DC_MASK  (0x300U)
+#define AOI_BFCRT23_PT2_DC_SHIFT (8U)
+#define AOI_BFCRT23_PT2_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_DC_SHIFT)) & AOI_BFCRT23_PT2_DC_MASK)
+#define AOI_BFCRT23_PT2_CC_MASK  (0xC00U)
+#define AOI_BFCRT23_PT2_CC_SHIFT (10U)
+#define AOI_BFCRT23_PT2_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_CC_SHIFT)) & AOI_BFCRT23_PT2_CC_MASK)
+#define AOI_BFCRT23_PT2_BC_MASK  (0x3000U)
+#define AOI_BFCRT23_PT2_BC_SHIFT (12U)
+#define AOI_BFCRT23_PT2_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_BC_SHIFT)) & AOI_BFCRT23_PT2_BC_MASK)
+#define AOI_BFCRT23_PT2_AC_MASK  (0xC000U)
+#define AOI_BFCRT23_PT2_AC_SHIFT (14U)
+#define AOI_BFCRT23_PT2_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_AC_SHIFT)) & AOI_BFCRT23_PT2_AC_MASK)
 /*! @} */
 
 /* The count of AOI_BFCRT23 */
-#define AOI_BFCRT23_COUNT                        (4U)
-
+#define AOI_BFCRT23_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group AOI_Register_Masks */
 
-
 /* AOI - Peripheral instance base addresses */
 /** Peripheral AOI1 base address */
-#define AOI1_BASE                                (0x403B4000u)
+#define AOI1_BASE (0x403B4000u)
 /** Peripheral AOI1 base pointer */
-#define AOI1                                     ((AOI_Type *)AOI1_BASE)
+#define AOI1 ((AOI_Type *)AOI1_BASE)
 /** Peripheral AOI2 base address */
-#define AOI2_BASE                                (0x403B8000u)
+#define AOI2_BASE (0x403B8000u)
 /** Peripheral AOI2 base pointer */
-#define AOI2                                     ((AOI_Type *)AOI2_BASE)
+#define AOI2 ((AOI_Type *)AOI2_BASE)
 /** Array initializer of AOI peripheral base addresses */
-#define AOI_BASE_ADDRS                           { 0u, AOI1_BASE, AOI2_BASE }
+#define AOI_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, AOI1_BASE, AOI2_BASE                                                                                       \
+    }
 /** Array initializer of AOI peripheral base pointers */
-#define AOI_BASE_PTRS                            { (AOI_Type *)0u, AOI1, AOI2 }
+#define AOI_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (AOI_Type *)0u, AOI1, AOI2                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group AOI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- BEE Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2281,25 +2494,26 @@ typedef struct {
  */
 
 /** BEE - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< BEE Control Register, offset: 0x0 */
-  __IO uint32_t ADDR_OFFSET0;                      /**< , offset: 0x4 */
-  __IO uint32_t ADDR_OFFSET1;                      /**< , offset: 0x8 */
-  __IO uint32_t AES_KEY0_W0;                       /**< , offset: 0xC */
-  __IO uint32_t AES_KEY0_W1;                       /**< , offset: 0x10 */
-  __IO uint32_t AES_KEY0_W2;                       /**< , offset: 0x14 */
-  __IO uint32_t AES_KEY0_W3;                       /**< , offset: 0x18 */
-  __IO uint32_t STATUS;                            /**< , offset: 0x1C */
-  __O  uint32_t CTR_NONCE0_W0;                     /**< , offset: 0x20 */
-  __O  uint32_t CTR_NONCE0_W1;                     /**< , offset: 0x24 */
-  __O  uint32_t CTR_NONCE0_W2;                     /**< , offset: 0x28 */
-  __O  uint32_t CTR_NONCE0_W3;                     /**< , offset: 0x2C */
-  __O  uint32_t CTR_NONCE1_W0;                     /**< , offset: 0x30 */
-  __O  uint32_t CTR_NONCE1_W1;                     /**< , offset: 0x34 */
-  __O  uint32_t CTR_NONCE1_W2;                     /**< , offset: 0x38 */
-  __O  uint32_t CTR_NONCE1_W3;                     /**< , offset: 0x3C */
-  __IO uint32_t REGION1_TOP;                       /**< , offset: 0x40 */
-  __IO uint32_t REGION1_BOT;                       /**< , offset: 0x44 */
+typedef struct
+{
+    __IO uint32_t CTRL;         /**< BEE Control Register, offset: 0x0 */
+    __IO uint32_t ADDR_OFFSET0; /**< , offset: 0x4 */
+    __IO uint32_t ADDR_OFFSET1; /**< , offset: 0x8 */
+    __IO uint32_t AES_KEY0_W0;  /**< , offset: 0xC */
+    __IO uint32_t AES_KEY0_W1;  /**< , offset: 0x10 */
+    __IO uint32_t AES_KEY0_W2;  /**< , offset: 0x14 */
+    __IO uint32_t AES_KEY0_W3;  /**< , offset: 0x18 */
+    __IO uint32_t STATUS;       /**< , offset: 0x1C */
+    __O uint32_t CTR_NONCE0_W0; /**< , offset: 0x20 */
+    __O uint32_t CTR_NONCE0_W1; /**< , offset: 0x24 */
+    __O uint32_t CTR_NONCE0_W2; /**< , offset: 0x28 */
+    __O uint32_t CTR_NONCE0_W3; /**< , offset: 0x2C */
+    __O uint32_t CTR_NONCE1_W0; /**< , offset: 0x30 */
+    __O uint32_t CTR_NONCE1_W1; /**< , offset: 0x34 */
+    __O uint32_t CTR_NONCE1_W2; /**< , offset: 0x38 */
+    __O uint32_t CTR_NONCE1_W3; /**< , offset: 0x3C */
+    __IO uint32_t REGION1_TOP;  /**< , offset: 0x40 */
+    __IO uint32_t REGION1_BOT;  /**< , offset: 0x44 */
 } BEE_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2313,232 +2527,277 @@ typedef struct {
 
 /*! @name CTRL - BEE Control Register */
 /*! @{ */
-#define BEE_CTRL_BEE_ENABLE_MASK                 (0x1U)
-#define BEE_CTRL_BEE_ENABLE_SHIFT                (0U)
-#define BEE_CTRL_BEE_ENABLE(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_SHIFT)) & BEE_CTRL_BEE_ENABLE_MASK)
-#define BEE_CTRL_CTRL_CLK_EN_MASK                (0x2U)
-#define BEE_CTRL_CTRL_CLK_EN_SHIFT               (1U)
-#define BEE_CTRL_CTRL_CLK_EN(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_MASK)
-#define BEE_CTRL_CTRL_SFTRST_N_MASK              (0x4U)
-#define BEE_CTRL_CTRL_SFTRST_N_SHIFT             (2U)
-#define BEE_CTRL_CTRL_SFTRST_N(x)                (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_MASK)
-#define BEE_CTRL_KEY_VALID_MASK                  (0x10U)
-#define BEE_CTRL_KEY_VALID_SHIFT                 (4U)
-#define BEE_CTRL_KEY_VALID(x)                    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_SHIFT)) & BEE_CTRL_KEY_VALID_MASK)
-#define BEE_CTRL_KEY_REGION_SEL_MASK             (0x20U)
-#define BEE_CTRL_KEY_REGION_SEL_SHIFT            (5U)
-#define BEE_CTRL_KEY_REGION_SEL(x)               (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_MASK)
-#define BEE_CTRL_AC_PROT_EN_MASK                 (0x40U)
-#define BEE_CTRL_AC_PROT_EN_SHIFT                (6U)
-#define BEE_CTRL_AC_PROT_EN(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_SHIFT)) & BEE_CTRL_AC_PROT_EN_MASK)
-#define BEE_CTRL_LITTLE_ENDIAN_MASK              (0x80U)
-#define BEE_CTRL_LITTLE_ENDIAN_SHIFT             (7U)
-#define BEE_CTRL_LITTLE_ENDIAN(x)                (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R0_MASK          (0x300U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_SHIFT         (8U)
-#define BEE_CTRL_SECURITY_LEVEL_R0(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R0_MASK           (0x400U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_SHIFT          (10U)
-#define BEE_CTRL_CTRL_AES_MODE_R0(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R1_MASK          (0x3000U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_SHIFT         (12U)
-#define BEE_CTRL_SECURITY_LEVEL_R1(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R1_MASK           (0x4000U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_SHIFT          (14U)
-#define BEE_CTRL_CTRL_AES_MODE_R1(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_MASK)
-#define BEE_CTRL_BEE_ENABLE_LOCK_MASK            (0x10000U)
-#define BEE_CTRL_BEE_ENABLE_LOCK_SHIFT           (16U)
-#define BEE_CTRL_BEE_ENABLE_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_LOCK_SHIFT)) & BEE_CTRL_BEE_ENABLE_LOCK_MASK)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK_MASK           (0x20000U)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT          (17U)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_LOCK_MASK)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK         (0x40000U)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT        (18U)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK)
-#define BEE_CTRL_REGION1_ADDR_LOCK_MASK          (0x80000U)
-#define BEE_CTRL_REGION1_ADDR_LOCK_SHIFT         (19U)
-#define BEE_CTRL_REGION1_ADDR_LOCK(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_ADDR_LOCK_SHIFT)) & BEE_CTRL_REGION1_ADDR_LOCK_MASK)
-#define BEE_CTRL_KEY_VALID_LOCK_MASK             (0x100000U)
-#define BEE_CTRL_KEY_VALID_LOCK_SHIFT            (20U)
-#define BEE_CTRL_KEY_VALID_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_LOCK_SHIFT)) & BEE_CTRL_KEY_VALID_LOCK_MASK)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK_MASK        (0x200000U)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT       (21U)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_LOCK_MASK)
-#define BEE_CTRL_AC_PROT_EN_LOCK_MASK            (0x400000U)
-#define BEE_CTRL_AC_PROT_EN_LOCK_SHIFT           (22U)
-#define BEE_CTRL_AC_PROT_EN_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_LOCK_SHIFT)) & BEE_CTRL_AC_PROT_EN_LOCK_MASK)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK         (0x800000U)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT        (23U)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK     (0x3000000U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT    (24U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK      (0x4000000U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT     (26U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK(x)        (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK)
-#define BEE_CTRL_REGION0_KEY_LOCK_MASK           (0x8000000U)
-#define BEE_CTRL_REGION0_KEY_LOCK_SHIFT          (27U)
-#define BEE_CTRL_REGION0_KEY_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION0_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION0_KEY_LOCK_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK     (0x30000000U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT    (28U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK      (0x40000000U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT     (30U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK(x)        (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK)
-#define BEE_CTRL_REGION1_KEY_LOCK_MASK           (0x80000000U)
-#define BEE_CTRL_REGION1_KEY_LOCK_SHIFT          (31U)
-#define BEE_CTRL_REGION1_KEY_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION1_KEY_LOCK_MASK)
+#define BEE_CTRL_BEE_ENABLE_MASK   (0x1U)
+#define BEE_CTRL_BEE_ENABLE_SHIFT  (0U)
+#define BEE_CTRL_BEE_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_SHIFT)) & BEE_CTRL_BEE_ENABLE_MASK)
+#define BEE_CTRL_CTRL_CLK_EN_MASK  (0x2U)
+#define BEE_CTRL_CTRL_CLK_EN_SHIFT (1U)
+#define BEE_CTRL_CTRL_CLK_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_MASK)
+#define BEE_CTRL_CTRL_SFTRST_N_MASK  (0x4U)
+#define BEE_CTRL_CTRL_SFTRST_N_SHIFT (2U)
+#define BEE_CTRL_CTRL_SFTRST_N(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_MASK)
+#define BEE_CTRL_KEY_VALID_MASK       (0x10U)
+#define BEE_CTRL_KEY_VALID_SHIFT      (4U)
+#define BEE_CTRL_KEY_VALID(x)         (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_SHIFT)) & BEE_CTRL_KEY_VALID_MASK)
+#define BEE_CTRL_KEY_REGION_SEL_MASK  (0x20U)
+#define BEE_CTRL_KEY_REGION_SEL_SHIFT (5U)
+#define BEE_CTRL_KEY_REGION_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_MASK)
+#define BEE_CTRL_AC_PROT_EN_MASK     (0x40U)
+#define BEE_CTRL_AC_PROT_EN_SHIFT    (6U)
+#define BEE_CTRL_AC_PROT_EN(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_SHIFT)) & BEE_CTRL_AC_PROT_EN_MASK)
+#define BEE_CTRL_LITTLE_ENDIAN_MASK  (0x80U)
+#define BEE_CTRL_LITTLE_ENDIAN_SHIFT (7U)
+#define BEE_CTRL_LITTLE_ENDIAN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R0_MASK  (0x300U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_SHIFT (8U)
+#define BEE_CTRL_SECURITY_LEVEL_R0(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R0_MASK  (0x400U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_SHIFT (10U)
+#define BEE_CTRL_CTRL_AES_MODE_R0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R1_MASK  (0x3000U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_SHIFT (12U)
+#define BEE_CTRL_SECURITY_LEVEL_R1(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R1_MASK  (0x4000U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_SHIFT (14U)
+#define BEE_CTRL_CTRL_AES_MODE_R1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_MASK)
+#define BEE_CTRL_BEE_ENABLE_LOCK_MASK  (0x10000U)
+#define BEE_CTRL_BEE_ENABLE_LOCK_SHIFT (16U)
+#define BEE_CTRL_BEE_ENABLE_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_LOCK_SHIFT)) & BEE_CTRL_BEE_ENABLE_LOCK_MASK)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK_MASK  (0x20000U)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT (17U)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_LOCK_MASK)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK  (0x40000U)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT (18U)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK)
+#define BEE_CTRL_REGION1_ADDR_LOCK_MASK  (0x80000U)
+#define BEE_CTRL_REGION1_ADDR_LOCK_SHIFT (19U)
+#define BEE_CTRL_REGION1_ADDR_LOCK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_ADDR_LOCK_SHIFT)) & BEE_CTRL_REGION1_ADDR_LOCK_MASK)
+#define BEE_CTRL_KEY_VALID_LOCK_MASK  (0x100000U)
+#define BEE_CTRL_KEY_VALID_LOCK_SHIFT (20U)
+#define BEE_CTRL_KEY_VALID_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_LOCK_SHIFT)) & BEE_CTRL_KEY_VALID_LOCK_MASK)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK_MASK  (0x200000U)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT (21U)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_LOCK_MASK)
+#define BEE_CTRL_AC_PROT_EN_LOCK_MASK  (0x400000U)
+#define BEE_CTRL_AC_PROT_EN_LOCK_SHIFT (22U)
+#define BEE_CTRL_AC_PROT_EN_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_LOCK_SHIFT)) & BEE_CTRL_AC_PROT_EN_LOCK_MASK)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK  (0x800000U)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT (23U)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK  (0x3000000U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT (24U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK  (0x4000000U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT (26U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK)
+#define BEE_CTRL_REGION0_KEY_LOCK_MASK  (0x8000000U)
+#define BEE_CTRL_REGION0_KEY_LOCK_SHIFT (27U)
+#define BEE_CTRL_REGION0_KEY_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION0_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION0_KEY_LOCK_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK  (0x30000000U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT (28U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK  (0x40000000U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT (30U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK)
+#define BEE_CTRL_REGION1_KEY_LOCK_MASK  (0x80000000U)
+#define BEE_CTRL_REGION1_KEY_LOCK_SHIFT (31U)
+#define BEE_CTRL_REGION1_KEY_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION1_KEY_LOCK_MASK)
 /*! @} */
 
 /*! @name ADDR_OFFSET0 -  */
 /*! @{ */
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK       (0xFFFFU)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT      (0U)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0(x)         (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK  (0xFFFFU)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT (0U)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK)
 #define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK  (0xFFFF0000U)
 #define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT (16U)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK(x)    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT)) &                                       \
+     BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK)
 /*! @} */
 
 /*! @name ADDR_OFFSET1 -  */
 /*! @{ */
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK       (0xFFFFU)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT      (0U)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0(x)         (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK  (0xFFFFU)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT (0U)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK)
 #define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK  (0xFFFF0000U)
 #define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT (16U)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK(x)    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT)) &                                       \
+     BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W0 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W0_KEY0_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W0_KEY0_SHIFT               (0U)
-#define BEE_AES_KEY0_W0_KEY0(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W0_KEY0_SHIFT)) & BEE_AES_KEY0_W0_KEY0_MASK)
+#define BEE_AES_KEY0_W0_KEY0_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W0_KEY0_SHIFT (0U)
+#define BEE_AES_KEY0_W0_KEY0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W0_KEY0_SHIFT)) & BEE_AES_KEY0_W0_KEY0_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W1 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W1_KEY1_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W1_KEY1_SHIFT               (0U)
-#define BEE_AES_KEY0_W1_KEY1(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W1_KEY1_SHIFT)) & BEE_AES_KEY0_W1_KEY1_MASK)
+#define BEE_AES_KEY0_W1_KEY1_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W1_KEY1_SHIFT (0U)
+#define BEE_AES_KEY0_W1_KEY1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W1_KEY1_SHIFT)) & BEE_AES_KEY0_W1_KEY1_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W2 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W2_KEY2_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W2_KEY2_SHIFT               (0U)
-#define BEE_AES_KEY0_W2_KEY2(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W2_KEY2_SHIFT)) & BEE_AES_KEY0_W2_KEY2_MASK)
+#define BEE_AES_KEY0_W2_KEY2_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W2_KEY2_SHIFT (0U)
+#define BEE_AES_KEY0_W2_KEY2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W2_KEY2_SHIFT)) & BEE_AES_KEY0_W2_KEY2_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W3 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W3_KEY3_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W3_KEY3_SHIFT               (0U)
-#define BEE_AES_KEY0_W3_KEY3(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W3_KEY3_SHIFT)) & BEE_AES_KEY0_W3_KEY3_MASK)
+#define BEE_AES_KEY0_W3_KEY3_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W3_KEY3_SHIFT (0U)
+#define BEE_AES_KEY0_W3_KEY3(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W3_KEY3_SHIFT)) & BEE_AES_KEY0_W3_KEY3_MASK)
 /*! @} */
 
 /*! @name STATUS -  */
 /*! @{ */
-#define BEE_STATUS_IRQ_VEC_MASK                  (0xFFU)
-#define BEE_STATUS_IRQ_VEC_SHIFT                 (0U)
-#define BEE_STATUS_IRQ_VEC(x)                    (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_IRQ_VEC_SHIFT)) & BEE_STATUS_IRQ_VEC_MASK)
-#define BEE_STATUS_BEE_IDLE_MASK                 (0x100U)
-#define BEE_STATUS_BEE_IDLE_SHIFT                (8U)
-#define BEE_STATUS_BEE_IDLE(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_BEE_IDLE_SHIFT)) & BEE_STATUS_BEE_IDLE_MASK)
+#define BEE_STATUS_IRQ_VEC_MASK   (0xFFU)
+#define BEE_STATUS_IRQ_VEC_SHIFT  (0U)
+#define BEE_STATUS_IRQ_VEC(x)     (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_IRQ_VEC_SHIFT)) & BEE_STATUS_IRQ_VEC_MASK)
+#define BEE_STATUS_BEE_IDLE_MASK  (0x100U)
+#define BEE_STATUS_BEE_IDLE_SHIFT (8U)
+#define BEE_STATUS_BEE_IDLE(x)    (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_BEE_IDLE_SHIFT)) & BEE_STATUS_BEE_IDLE_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W0 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W0_NONCE00_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W0_NONCE00_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W0_NONCE00(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W0_NONCE00_SHIFT)) & BEE_CTR_NONCE0_W0_NONCE00_MASK)
+#define BEE_CTR_NONCE0_W0_NONCE00_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W0_NONCE00_SHIFT (0U)
+#define BEE_CTR_NONCE0_W0_NONCE00(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W0_NONCE00_SHIFT)) & BEE_CTR_NONCE0_W0_NONCE00_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W1 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W1_NONCE01_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W1_NONCE01_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W1_NONCE01(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W1_NONCE01_SHIFT)) & BEE_CTR_NONCE0_W1_NONCE01_MASK)
+#define BEE_CTR_NONCE0_W1_NONCE01_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W1_NONCE01_SHIFT (0U)
+#define BEE_CTR_NONCE0_W1_NONCE01(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W1_NONCE01_SHIFT)) & BEE_CTR_NONCE0_W1_NONCE01_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W2 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W2_NONCE02_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W2_NONCE02_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W2_NONCE02(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W2_NONCE02_SHIFT)) & BEE_CTR_NONCE0_W2_NONCE02_MASK)
+#define BEE_CTR_NONCE0_W2_NONCE02_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W2_NONCE02_SHIFT (0U)
+#define BEE_CTR_NONCE0_W2_NONCE02(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W2_NONCE02_SHIFT)) & BEE_CTR_NONCE0_W2_NONCE02_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W3 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W3_NONCE03_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W3_NONCE03_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W3_NONCE03(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W3_NONCE03_SHIFT)) & BEE_CTR_NONCE0_W3_NONCE03_MASK)
+#define BEE_CTR_NONCE0_W3_NONCE03_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W3_NONCE03_SHIFT (0U)
+#define BEE_CTR_NONCE0_W3_NONCE03(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W3_NONCE03_SHIFT)) & BEE_CTR_NONCE0_W3_NONCE03_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W0 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W0_NONCE10_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W0_NONCE10_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W0_NONCE10(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W0_NONCE10_SHIFT)) & BEE_CTR_NONCE1_W0_NONCE10_MASK)
+#define BEE_CTR_NONCE1_W0_NONCE10_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W0_NONCE10_SHIFT (0U)
+#define BEE_CTR_NONCE1_W0_NONCE10(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W0_NONCE10_SHIFT)) & BEE_CTR_NONCE1_W0_NONCE10_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W1 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W1_NONCE11_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W1_NONCE11_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W1_NONCE11(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W1_NONCE11_SHIFT)) & BEE_CTR_NONCE1_W1_NONCE11_MASK)
+#define BEE_CTR_NONCE1_W1_NONCE11_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W1_NONCE11_SHIFT (0U)
+#define BEE_CTR_NONCE1_W1_NONCE11(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W1_NONCE11_SHIFT)) & BEE_CTR_NONCE1_W1_NONCE11_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W2 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W2_NONCE12_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W2_NONCE12_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W2_NONCE12(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W2_NONCE12_SHIFT)) & BEE_CTR_NONCE1_W2_NONCE12_MASK)
+#define BEE_CTR_NONCE1_W2_NONCE12_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W2_NONCE12_SHIFT (0U)
+#define BEE_CTR_NONCE1_W2_NONCE12(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W2_NONCE12_SHIFT)) & BEE_CTR_NONCE1_W2_NONCE12_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W3 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W3_NONCE13_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W3_NONCE13_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W3_NONCE13(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W3_NONCE13_SHIFT)) & BEE_CTR_NONCE1_W3_NONCE13_MASK)
+#define BEE_CTR_NONCE1_W3_NONCE13_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W3_NONCE13_SHIFT (0U)
+#define BEE_CTR_NONCE1_W3_NONCE13(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W3_NONCE13_SHIFT)) & BEE_CTR_NONCE1_W3_NONCE13_MASK)
 /*! @} */
 
 /*! @name REGION1_TOP -  */
 /*! @{ */
-#define BEE_REGION1_TOP_REGION1_TOP_MASK         (0xFFFFFFFFU)
-#define BEE_REGION1_TOP_REGION1_TOP_SHIFT        (0U)
-#define BEE_REGION1_TOP_REGION1_TOP(x)           (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_TOP_REGION1_TOP_SHIFT)) & BEE_REGION1_TOP_REGION1_TOP_MASK)
+#define BEE_REGION1_TOP_REGION1_TOP_MASK  (0xFFFFFFFFU)
+#define BEE_REGION1_TOP_REGION1_TOP_SHIFT (0U)
+#define BEE_REGION1_TOP_REGION1_TOP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_TOP_REGION1_TOP_SHIFT)) & BEE_REGION1_TOP_REGION1_TOP_MASK)
 /*! @} */
 
 /*! @name REGION1_BOT -  */
 /*! @{ */
-#define BEE_REGION1_BOT_REGION1_BOT_MASK         (0xFFFFFFFFU)
-#define BEE_REGION1_BOT_REGION1_BOT_SHIFT        (0U)
-#define BEE_REGION1_BOT_REGION1_BOT(x)           (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_BOT_REGION1_BOT_SHIFT)) & BEE_REGION1_BOT_REGION1_BOT_MASK)
+#define BEE_REGION1_BOT_REGION1_BOT_MASK  (0xFFFFFFFFU)
+#define BEE_REGION1_BOT_REGION1_BOT_SHIFT (0U)
+#define BEE_REGION1_BOT_REGION1_BOT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_BOT_REGION1_BOT_SHIFT)) & BEE_REGION1_BOT_REGION1_BOT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group BEE_Register_Masks */
 
-
 /* BEE - Peripheral instance base addresses */
 /** Peripheral BEE base address */
-#define BEE_BASE                                 (0x403EC000u)
+#define BEE_BASE (0x403EC000u)
 /** Peripheral BEE base pointer */
-#define BEE                                      ((BEE_Type *)BEE_BASE)
+#define BEE ((BEE_Type *)BEE_BASE)
 /** Array initializer of BEE peripheral base addresses */
-#define BEE_BASE_ADDRS                           { BEE_BASE }
+#define BEE_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        BEE_BASE                                                                                                       \
+    }
 /** Array initializer of BEE peripheral base pointers */
-#define BEE_BASE_PTRS                            { BEE }
+#define BEE_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        BEE                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group BEE_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CAN Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2549,37 +2808,43 @@ typedef struct {
  */
 
 /** CAN - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< Module Configuration Register, offset: 0x0 */
-  __IO uint32_t CTRL1;                             /**< Control 1 Register, offset: 0x4 */
-  __IO uint32_t TIMER;                             /**< Free Running Timer Register, offset: 0x8 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t RXMGMASK;                          /**< Rx Mailboxes Global Mask Register, offset: 0x10 */
-  __IO uint32_t RX14MASK;                          /**< Rx Buffer 14 Mask Register, offset: 0x14 */
-  __IO uint32_t RX15MASK;                          /**< Rx Buffer 15 Mask Register, offset: 0x18 */
-  __IO uint32_t ECR;                               /**< Error Counter Register, offset: 0x1C */
-  __IO uint32_t ESR1;                              /**< Error and Status 1 Register, offset: 0x20 */
-  __IO uint32_t IMASK2;                            /**< Interrupt Masks 2 Register, offset: 0x24 */
-  __IO uint32_t IMASK1;                            /**< Interrupt Masks 1 Register, offset: 0x28 */
-  __IO uint32_t IFLAG2;                            /**< Interrupt Flags 2 Register, offset: 0x2C */
-  __IO uint32_t IFLAG1;                            /**< Interrupt Flags 1 Register, offset: 0x30 */
-  __IO uint32_t CTRL2;                             /**< Control 2 Register, offset: 0x34 */
-  __I  uint32_t ESR2;                              /**< Error and Status 2 Register, offset: 0x38 */
-       uint8_t RESERVED_1[8];
-  __I  uint32_t CRCR;                              /**< CRC Register, offset: 0x44 */
-  __IO uint32_t RXFGMASK;                          /**< Rx FIFO Global Mask Register, offset: 0x48 */
-  __I  uint32_t RXFIR;                             /**< Rx FIFO Information Register, offset: 0x4C */
-       uint8_t RESERVED_2[48];
-  struct {                                         /* offset: 0x80, array step: 0x10 */
-    __IO uint32_t CS;                                /**< Message Buffer 0 CS Register..Message Buffer 63 CS Register, array offset: 0x80, array step: 0x10 */
-    __IO uint32_t ID;                                /**< Message Buffer 0 ID Register..Message Buffer 63 ID Register, array offset: 0x84, array step: 0x10 */
-    __IO uint32_t WORD0;                             /**< Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register, array offset: 0x88, array step: 0x10 */
-    __IO uint32_t WORD1;                             /**< Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register, array offset: 0x8C, array step: 0x10 */
-  } MB[64];
-       uint8_t RESERVED_3[1024];
-  __IO uint32_t RXIMR[64];                         /**< Rx Individual Mask Registers, array offset: 0x880, array step: 0x4 */
-       uint8_t RESERVED_4[96];
-  __IO uint32_t GFWR;                              /**< Glitch Filter Width Registers, offset: 0x9E0 */
+typedef struct
+{
+    __IO uint32_t MCR;   /**< Module Configuration Register, offset: 0x0 */
+    __IO uint32_t CTRL1; /**< Control 1 Register, offset: 0x4 */
+    __IO uint32_t TIMER; /**< Free Running Timer Register, offset: 0x8 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t RXMGMASK; /**< Rx Mailboxes Global Mask Register, offset: 0x10 */
+    __IO uint32_t RX14MASK; /**< Rx Buffer 14 Mask Register, offset: 0x14 */
+    __IO uint32_t RX15MASK; /**< Rx Buffer 15 Mask Register, offset: 0x18 */
+    __IO uint32_t ECR;      /**< Error Counter Register, offset: 0x1C */
+    __IO uint32_t ESR1;     /**< Error and Status 1 Register, offset: 0x20 */
+    __IO uint32_t IMASK2;   /**< Interrupt Masks 2 Register, offset: 0x24 */
+    __IO uint32_t IMASK1;   /**< Interrupt Masks 1 Register, offset: 0x28 */
+    __IO uint32_t IFLAG2;   /**< Interrupt Flags 2 Register, offset: 0x2C */
+    __IO uint32_t IFLAG1;   /**< Interrupt Flags 1 Register, offset: 0x30 */
+    __IO uint32_t CTRL2;    /**< Control 2 Register, offset: 0x34 */
+    __I uint32_t ESR2;      /**< Error and Status 2 Register, offset: 0x38 */
+    uint8_t RESERVED_1[8];
+    __I uint32_t CRCR;      /**< CRC Register, offset: 0x44 */
+    __IO uint32_t RXFGMASK; /**< Rx FIFO Global Mask Register, offset: 0x48 */
+    __I uint32_t RXFIR;     /**< Rx FIFO Information Register, offset: 0x4C */
+    uint8_t RESERVED_2[48];
+    struct
+    {                        /* offset: 0x80, array step: 0x10 */
+        __IO uint32_t CS;    /**< Message Buffer 0 CS Register..Message Buffer 63 CS Register, array offset: 0x80, array
+                                step: 0x10 */
+        __IO uint32_t ID;    /**< Message Buffer 0 ID Register..Message Buffer 63 ID Register, array offset: 0x84, array
+                                step: 0x10 */
+        __IO uint32_t WORD0; /**< Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register, array offset: 0x88,
+                                array step: 0x10 */
+        __IO uint32_t WORD1; /**< Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register, array offset: 0x8C,
+                                array step: 0x10 */
+    } MB[64];
+    uint8_t RESERVED_3[1024];
+    __IO uint32_t RXIMR[64]; /**< Rx Individual Mask Registers, array offset: 0x880, array step: 0x4 */
+    uint8_t RESERVED_4[96];
+    __IO uint32_t GFWR; /**< Glitch Filter Width Registers, offset: 0x9E0 */
 } CAN_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2593,445 +2858,476 @@ typedef struct {
 
 /*! @name MCR - Module Configuration Register */
 /*! @{ */
-#define CAN_MCR_MAXMB_MASK                       (0x7FU)
-#define CAN_MCR_MAXMB_SHIFT                      (0U)
-#define CAN_MCR_MAXMB(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)
-#define CAN_MCR_IDAM_MASK                        (0x300U)
-#define CAN_MCR_IDAM_SHIFT                       (8U)
-#define CAN_MCR_IDAM(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)
-#define CAN_MCR_AEN_MASK                         (0x1000U)
-#define CAN_MCR_AEN_SHIFT                        (12U)
-#define CAN_MCR_AEN(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)
-#define CAN_MCR_LPRIOEN_MASK                     (0x2000U)
-#define CAN_MCR_LPRIOEN_SHIFT                    (13U)
-#define CAN_MCR_LPRIOEN(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)
-#define CAN_MCR_IRMQ_MASK                        (0x10000U)
-#define CAN_MCR_IRMQ_SHIFT                       (16U)
-#define CAN_MCR_IRMQ(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)
-#define CAN_MCR_SRXDIS_MASK                      (0x20000U)
-#define CAN_MCR_SRXDIS_SHIFT                     (17U)
-#define CAN_MCR_SRXDIS(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)
-#define CAN_MCR_WAKSRC_MASK                      (0x80000U)
-#define CAN_MCR_WAKSRC_SHIFT                     (19U)
-#define CAN_MCR_WAKSRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)
-#define CAN_MCR_LPMACK_MASK                      (0x100000U)
-#define CAN_MCR_LPMACK_SHIFT                     (20U)
-#define CAN_MCR_LPMACK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)
-#define CAN_MCR_WRNEN_MASK                       (0x200000U)
-#define CAN_MCR_WRNEN_SHIFT                      (21U)
-#define CAN_MCR_WRNEN(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)
-#define CAN_MCR_SLFWAK_MASK                      (0x400000U)
-#define CAN_MCR_SLFWAK_SHIFT                     (22U)
-#define CAN_MCR_SLFWAK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)
-#define CAN_MCR_SUPV_MASK                        (0x800000U)
-#define CAN_MCR_SUPV_SHIFT                       (23U)
-#define CAN_MCR_SUPV(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)
-#define CAN_MCR_FRZACK_MASK                      (0x1000000U)
-#define CAN_MCR_FRZACK_SHIFT                     (24U)
-#define CAN_MCR_FRZACK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)
-#define CAN_MCR_SOFTRST_MASK                     (0x2000000U)
-#define CAN_MCR_SOFTRST_SHIFT                    (25U)
-#define CAN_MCR_SOFTRST(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)
-#define CAN_MCR_WAKMSK_MASK                      (0x4000000U)
-#define CAN_MCR_WAKMSK_SHIFT                     (26U)
-#define CAN_MCR_WAKMSK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)
-#define CAN_MCR_NOTRDY_MASK                      (0x8000000U)
-#define CAN_MCR_NOTRDY_SHIFT                     (27U)
-#define CAN_MCR_NOTRDY(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)
-#define CAN_MCR_HALT_MASK                        (0x10000000U)
-#define CAN_MCR_HALT_SHIFT                       (28U)
-#define CAN_MCR_HALT(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)
-#define CAN_MCR_RFEN_MASK                        (0x20000000U)
-#define CAN_MCR_RFEN_SHIFT                       (29U)
-#define CAN_MCR_RFEN(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)
-#define CAN_MCR_FRZ_MASK                         (0x40000000U)
-#define CAN_MCR_FRZ_SHIFT                        (30U)
-#define CAN_MCR_FRZ(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)
-#define CAN_MCR_MDIS_MASK                        (0x80000000U)
-#define CAN_MCR_MDIS_SHIFT                       (31U)
-#define CAN_MCR_MDIS(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)
+#define CAN_MCR_MAXMB_MASK    (0x7FU)
+#define CAN_MCR_MAXMB_SHIFT   (0U)
+#define CAN_MCR_MAXMB(x)      (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)
+#define CAN_MCR_IDAM_MASK     (0x300U)
+#define CAN_MCR_IDAM_SHIFT    (8U)
+#define CAN_MCR_IDAM(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)
+#define CAN_MCR_AEN_MASK      (0x1000U)
+#define CAN_MCR_AEN_SHIFT     (12U)
+#define CAN_MCR_AEN(x)        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)
+#define CAN_MCR_LPRIOEN_MASK  (0x2000U)
+#define CAN_MCR_LPRIOEN_SHIFT (13U)
+#define CAN_MCR_LPRIOEN(x)    (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)
+#define CAN_MCR_IRMQ_MASK     (0x10000U)
+#define CAN_MCR_IRMQ_SHIFT    (16U)
+#define CAN_MCR_IRMQ(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)
+#define CAN_MCR_SRXDIS_MASK   (0x20000U)
+#define CAN_MCR_SRXDIS_SHIFT  (17U)
+#define CAN_MCR_SRXDIS(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)
+#define CAN_MCR_WAKSRC_MASK   (0x80000U)
+#define CAN_MCR_WAKSRC_SHIFT  (19U)
+#define CAN_MCR_WAKSRC(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)
+#define CAN_MCR_LPMACK_MASK   (0x100000U)
+#define CAN_MCR_LPMACK_SHIFT  (20U)
+#define CAN_MCR_LPMACK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)
+#define CAN_MCR_WRNEN_MASK    (0x200000U)
+#define CAN_MCR_WRNEN_SHIFT   (21U)
+#define CAN_MCR_WRNEN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)
+#define CAN_MCR_SLFWAK_MASK   (0x400000U)
+#define CAN_MCR_SLFWAK_SHIFT  (22U)
+#define CAN_MCR_SLFWAK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)
+#define CAN_MCR_SUPV_MASK     (0x800000U)
+#define CAN_MCR_SUPV_SHIFT    (23U)
+#define CAN_MCR_SUPV(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)
+#define CAN_MCR_FRZACK_MASK   (0x1000000U)
+#define CAN_MCR_FRZACK_SHIFT  (24U)
+#define CAN_MCR_FRZACK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)
+#define CAN_MCR_SOFTRST_MASK  (0x2000000U)
+#define CAN_MCR_SOFTRST_SHIFT (25U)
+#define CAN_MCR_SOFTRST(x)    (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)
+#define CAN_MCR_WAKMSK_MASK   (0x4000000U)
+#define CAN_MCR_WAKMSK_SHIFT  (26U)
+#define CAN_MCR_WAKMSK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)
+#define CAN_MCR_NOTRDY_MASK   (0x8000000U)
+#define CAN_MCR_NOTRDY_SHIFT  (27U)
+#define CAN_MCR_NOTRDY(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)
+#define CAN_MCR_HALT_MASK     (0x10000000U)
+#define CAN_MCR_HALT_SHIFT    (28U)
+#define CAN_MCR_HALT(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)
+#define CAN_MCR_RFEN_MASK     (0x20000000U)
+#define CAN_MCR_RFEN_SHIFT    (29U)
+#define CAN_MCR_RFEN(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)
+#define CAN_MCR_FRZ_MASK      (0x40000000U)
+#define CAN_MCR_FRZ_SHIFT     (30U)
+#define CAN_MCR_FRZ(x)        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)
+#define CAN_MCR_MDIS_MASK     (0x80000000U)
+#define CAN_MCR_MDIS_SHIFT    (31U)
+#define CAN_MCR_MDIS(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)
 /*! @} */
 
 /*! @name CTRL1 - Control 1 Register */
 /*! @{ */
-#define CAN_CTRL1_PROPSEG_MASK                   (0x7U)
-#define CAN_CTRL1_PROPSEG_SHIFT                  (0U)
-#define CAN_CTRL1_PROPSEG(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
-#define CAN_CTRL1_LOM_MASK                       (0x8U)
-#define CAN_CTRL1_LOM_SHIFT                      (3U)
-#define CAN_CTRL1_LOM(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)
-#define CAN_CTRL1_LBUF_MASK                      (0x10U)
-#define CAN_CTRL1_LBUF_SHIFT                     (4U)
-#define CAN_CTRL1_LBUF(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)
-#define CAN_CTRL1_TSYN_MASK                      (0x20U)
-#define CAN_CTRL1_TSYN_SHIFT                     (5U)
-#define CAN_CTRL1_TSYN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)
-#define CAN_CTRL1_BOFFREC_MASK                   (0x40U)
-#define CAN_CTRL1_BOFFREC_SHIFT                  (6U)
-#define CAN_CTRL1_BOFFREC(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)
-#define CAN_CTRL1_SMP_MASK                       (0x80U)
-#define CAN_CTRL1_SMP_SHIFT                      (7U)
-#define CAN_CTRL1_SMP(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)
-#define CAN_CTRL1_RWRNMSK_MASK                   (0x400U)
-#define CAN_CTRL1_RWRNMSK_SHIFT                  (10U)
-#define CAN_CTRL1_RWRNMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)
-#define CAN_CTRL1_TWRNMSK_MASK                   (0x800U)
-#define CAN_CTRL1_TWRNMSK_SHIFT                  (11U)
-#define CAN_CTRL1_TWRNMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)
-#define CAN_CTRL1_LPB_MASK                       (0x1000U)
-#define CAN_CTRL1_LPB_SHIFT                      (12U)
-#define CAN_CTRL1_LPB(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)
-#define CAN_CTRL1_ERRMSK_MASK                    (0x4000U)
-#define CAN_CTRL1_ERRMSK_SHIFT                   (14U)
-#define CAN_CTRL1_ERRMSK(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)
-#define CAN_CTRL1_BOFFMSK_MASK                   (0x8000U)
-#define CAN_CTRL1_BOFFMSK_SHIFT                  (15U)
-#define CAN_CTRL1_BOFFMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)
-#define CAN_CTRL1_PSEG2_MASK                     (0x70000U)
-#define CAN_CTRL1_PSEG2_SHIFT                    (16U)
-#define CAN_CTRL1_PSEG2(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)
-#define CAN_CTRL1_PSEG1_MASK                     (0x380000U)
-#define CAN_CTRL1_PSEG1_SHIFT                    (19U)
-#define CAN_CTRL1_PSEG1(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)
-#define CAN_CTRL1_RJW_MASK                       (0xC00000U)
-#define CAN_CTRL1_RJW_SHIFT                      (22U)
-#define CAN_CTRL1_RJW(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)
-#define CAN_CTRL1_PRESDIV_MASK                   (0xFF000000U)
-#define CAN_CTRL1_PRESDIV_SHIFT                  (24U)
-#define CAN_CTRL1_PRESDIV(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)
+#define CAN_CTRL1_PROPSEG_MASK  (0x7U)
+#define CAN_CTRL1_PROPSEG_SHIFT (0U)
+#define CAN_CTRL1_PROPSEG(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
+#define CAN_CTRL1_LOM_MASK      (0x8U)
+#define CAN_CTRL1_LOM_SHIFT     (3U)
+#define CAN_CTRL1_LOM(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)
+#define CAN_CTRL1_LBUF_MASK     (0x10U)
+#define CAN_CTRL1_LBUF_SHIFT    (4U)
+#define CAN_CTRL1_LBUF(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)
+#define CAN_CTRL1_TSYN_MASK     (0x20U)
+#define CAN_CTRL1_TSYN_SHIFT    (5U)
+#define CAN_CTRL1_TSYN(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)
+#define CAN_CTRL1_BOFFREC_MASK  (0x40U)
+#define CAN_CTRL1_BOFFREC_SHIFT (6U)
+#define CAN_CTRL1_BOFFREC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)
+#define CAN_CTRL1_SMP_MASK      (0x80U)
+#define CAN_CTRL1_SMP_SHIFT     (7U)
+#define CAN_CTRL1_SMP(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)
+#define CAN_CTRL1_RWRNMSK_MASK  (0x400U)
+#define CAN_CTRL1_RWRNMSK_SHIFT (10U)
+#define CAN_CTRL1_RWRNMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)
+#define CAN_CTRL1_TWRNMSK_MASK  (0x800U)
+#define CAN_CTRL1_TWRNMSK_SHIFT (11U)
+#define CAN_CTRL1_TWRNMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)
+#define CAN_CTRL1_LPB_MASK      (0x1000U)
+#define CAN_CTRL1_LPB_SHIFT     (12U)
+#define CAN_CTRL1_LPB(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)
+#define CAN_CTRL1_ERRMSK_MASK   (0x4000U)
+#define CAN_CTRL1_ERRMSK_SHIFT  (14U)
+#define CAN_CTRL1_ERRMSK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)
+#define CAN_CTRL1_BOFFMSK_MASK  (0x8000U)
+#define CAN_CTRL1_BOFFMSK_SHIFT (15U)
+#define CAN_CTRL1_BOFFMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)
+#define CAN_CTRL1_PSEG2_MASK    (0x70000U)
+#define CAN_CTRL1_PSEG2_SHIFT   (16U)
+#define CAN_CTRL1_PSEG2(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)
+#define CAN_CTRL1_PSEG1_MASK    (0x380000U)
+#define CAN_CTRL1_PSEG1_SHIFT   (19U)
+#define CAN_CTRL1_PSEG1(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)
+#define CAN_CTRL1_RJW_MASK      (0xC00000U)
+#define CAN_CTRL1_RJW_SHIFT     (22U)
+#define CAN_CTRL1_RJW(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)
+#define CAN_CTRL1_PRESDIV_MASK  (0xFF000000U)
+#define CAN_CTRL1_PRESDIV_SHIFT (24U)
+#define CAN_CTRL1_PRESDIV(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)
 /*! @} */
 
 /*! @name TIMER - Free Running Timer Register */
 /*! @{ */
-#define CAN_TIMER_TIMER_MASK                     (0xFFFFU)
-#define CAN_TIMER_TIMER_SHIFT                    (0U)
-#define CAN_TIMER_TIMER(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)
+#define CAN_TIMER_TIMER_MASK  (0xFFFFU)
+#define CAN_TIMER_TIMER_SHIFT (0U)
+#define CAN_TIMER_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)
 /*! @} */
 
 /*! @name RXMGMASK - Rx Mailboxes Global Mask Register */
 /*! @{ */
-#define CAN_RXMGMASK_MG_MASK                     (0xFFFFFFFFU)
-#define CAN_RXMGMASK_MG_SHIFT                    (0U)
-#define CAN_RXMGMASK_MG(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)
+#define CAN_RXMGMASK_MG_MASK  (0xFFFFFFFFU)
+#define CAN_RXMGMASK_MG_SHIFT (0U)
+#define CAN_RXMGMASK_MG(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)
 /*! @} */
 
 /*! @name RX14MASK - Rx Buffer 14 Mask Register */
 /*! @{ */
-#define CAN_RX14MASK_RX14M_MASK                  (0xFFFFFFFFU)
-#define CAN_RX14MASK_RX14M_SHIFT                 (0U)
-#define CAN_RX14MASK_RX14M(x)                    (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)
+#define CAN_RX14MASK_RX14M_MASK  (0xFFFFFFFFU)
+#define CAN_RX14MASK_RX14M_SHIFT (0U)
+#define CAN_RX14MASK_RX14M(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)
 /*! @} */
 
 /*! @name RX15MASK - Rx Buffer 15 Mask Register */
 /*! @{ */
-#define CAN_RX15MASK_RX15M_MASK                  (0xFFFFFFFFU)
-#define CAN_RX15MASK_RX15M_SHIFT                 (0U)
-#define CAN_RX15MASK_RX15M(x)                    (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)
+#define CAN_RX15MASK_RX15M_MASK  (0xFFFFFFFFU)
+#define CAN_RX15MASK_RX15M_SHIFT (0U)
+#define CAN_RX15MASK_RX15M(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)
 /*! @} */
 
 /*! @name ECR - Error Counter Register */
 /*! @{ */
-#define CAN_ECR_TX_ERR_COUNTER_MASK              (0xFFU)
-#define CAN_ECR_TX_ERR_COUNTER_SHIFT             (0U)
-#define CAN_ECR_TX_ERR_COUNTER(x)                (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)
-#define CAN_ECR_RX_ERR_COUNTER_MASK              (0xFF00U)
-#define CAN_ECR_RX_ERR_COUNTER_SHIFT             (8U)
-#define CAN_ECR_RX_ERR_COUNTER(x)                (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)
+#define CAN_ECR_TX_ERR_COUNTER_MASK  (0xFFU)
+#define CAN_ECR_TX_ERR_COUNTER_SHIFT (0U)
+#define CAN_ECR_TX_ERR_COUNTER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)
+#define CAN_ECR_RX_ERR_COUNTER_MASK  (0xFF00U)
+#define CAN_ECR_RX_ERR_COUNTER_SHIFT (8U)
+#define CAN_ECR_RX_ERR_COUNTER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)
 /*! @} */
 
 /*! @name ESR1 - Error and Status 1 Register */
 /*! @{ */
-#define CAN_ESR1_WAKINT_MASK                     (0x1U)
-#define CAN_ESR1_WAKINT_SHIFT                    (0U)
-#define CAN_ESR1_WAKINT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)
-#define CAN_ESR1_ERRINT_MASK                     (0x2U)
-#define CAN_ESR1_ERRINT_SHIFT                    (1U)
-#define CAN_ESR1_ERRINT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)
-#define CAN_ESR1_BOFFINT_MASK                    (0x4U)
-#define CAN_ESR1_BOFFINT_SHIFT                   (2U)
-#define CAN_ESR1_BOFFINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)
-#define CAN_ESR1_RX_MASK                         (0x8U)
-#define CAN_ESR1_RX_SHIFT                        (3U)
-#define CAN_ESR1_RX(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)
-#define CAN_ESR1_FLTCONF_MASK                    (0x30U)
-#define CAN_ESR1_FLTCONF_SHIFT                   (4U)
-#define CAN_ESR1_FLTCONF(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)
-#define CAN_ESR1_TX_MASK                         (0x40U)
-#define CAN_ESR1_TX_SHIFT                        (6U)
-#define CAN_ESR1_TX(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)
-#define CAN_ESR1_IDLE_MASK                       (0x80U)
-#define CAN_ESR1_IDLE_SHIFT                      (7U)
-#define CAN_ESR1_IDLE(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)
-#define CAN_ESR1_RXWRN_MASK                      (0x100U)
-#define CAN_ESR1_RXWRN_SHIFT                     (8U)
-#define CAN_ESR1_RXWRN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)
-#define CAN_ESR1_TXWRN_MASK                      (0x200U)
-#define CAN_ESR1_TXWRN_SHIFT                     (9U)
-#define CAN_ESR1_TXWRN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)
-#define CAN_ESR1_STFERR_MASK                     (0x400U)
-#define CAN_ESR1_STFERR_SHIFT                    (10U)
-#define CAN_ESR1_STFERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)
-#define CAN_ESR1_FRMERR_MASK                     (0x800U)
-#define CAN_ESR1_FRMERR_SHIFT                    (11U)
-#define CAN_ESR1_FRMERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
-#define CAN_ESR1_CRCERR_MASK                     (0x1000U)
-#define CAN_ESR1_CRCERR_SHIFT                    (12U)
-#define CAN_ESR1_CRCERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)
-#define CAN_ESR1_ACKERR_MASK                     (0x2000U)
-#define CAN_ESR1_ACKERR_SHIFT                    (13U)
-#define CAN_ESR1_ACKERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)
-#define CAN_ESR1_BIT0ERR_MASK                    (0x4000U)
-#define CAN_ESR1_BIT0ERR_SHIFT                   (14U)
-#define CAN_ESR1_BIT0ERR(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)
-#define CAN_ESR1_BIT1ERR_MASK                    (0x8000U)
-#define CAN_ESR1_BIT1ERR_SHIFT                   (15U)
-#define CAN_ESR1_BIT1ERR(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)
-#define CAN_ESR1_RWRNINT_MASK                    (0x10000U)
-#define CAN_ESR1_RWRNINT_SHIFT                   (16U)
-#define CAN_ESR1_RWRNINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)
-#define CAN_ESR1_TWRNINT_MASK                    (0x20000U)
-#define CAN_ESR1_TWRNINT_SHIFT                   (17U)
-#define CAN_ESR1_TWRNINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)
-#define CAN_ESR1_SYNCH_MASK                      (0x40000U)
-#define CAN_ESR1_SYNCH_SHIFT                     (18U)
-#define CAN_ESR1_SYNCH(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)
+#define CAN_ESR1_WAKINT_MASK   (0x1U)
+#define CAN_ESR1_WAKINT_SHIFT  (0U)
+#define CAN_ESR1_WAKINT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)
+#define CAN_ESR1_ERRINT_MASK   (0x2U)
+#define CAN_ESR1_ERRINT_SHIFT  (1U)
+#define CAN_ESR1_ERRINT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)
+#define CAN_ESR1_BOFFINT_MASK  (0x4U)
+#define CAN_ESR1_BOFFINT_SHIFT (2U)
+#define CAN_ESR1_BOFFINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)
+#define CAN_ESR1_RX_MASK       (0x8U)
+#define CAN_ESR1_RX_SHIFT      (3U)
+#define CAN_ESR1_RX(x)         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)
+#define CAN_ESR1_FLTCONF_MASK  (0x30U)
+#define CAN_ESR1_FLTCONF_SHIFT (4U)
+#define CAN_ESR1_FLTCONF(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)
+#define CAN_ESR1_TX_MASK       (0x40U)
+#define CAN_ESR1_TX_SHIFT      (6U)
+#define CAN_ESR1_TX(x)         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)
+#define CAN_ESR1_IDLE_MASK     (0x80U)
+#define CAN_ESR1_IDLE_SHIFT    (7U)
+#define CAN_ESR1_IDLE(x)       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)
+#define CAN_ESR1_RXWRN_MASK    (0x100U)
+#define CAN_ESR1_RXWRN_SHIFT   (8U)
+#define CAN_ESR1_RXWRN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)
+#define CAN_ESR1_TXWRN_MASK    (0x200U)
+#define CAN_ESR1_TXWRN_SHIFT   (9U)
+#define CAN_ESR1_TXWRN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)
+#define CAN_ESR1_STFERR_MASK   (0x400U)
+#define CAN_ESR1_STFERR_SHIFT  (10U)
+#define CAN_ESR1_STFERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)
+#define CAN_ESR1_FRMERR_MASK   (0x800U)
+#define CAN_ESR1_FRMERR_SHIFT  (11U)
+#define CAN_ESR1_FRMERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
+#define CAN_ESR1_CRCERR_MASK   (0x1000U)
+#define CAN_ESR1_CRCERR_SHIFT  (12U)
+#define CAN_ESR1_CRCERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)
+#define CAN_ESR1_ACKERR_MASK   (0x2000U)
+#define CAN_ESR1_ACKERR_SHIFT  (13U)
+#define CAN_ESR1_ACKERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)
+#define CAN_ESR1_BIT0ERR_MASK  (0x4000U)
+#define CAN_ESR1_BIT0ERR_SHIFT (14U)
+#define CAN_ESR1_BIT0ERR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)
+#define CAN_ESR1_BIT1ERR_MASK  (0x8000U)
+#define CAN_ESR1_BIT1ERR_SHIFT (15U)
+#define CAN_ESR1_BIT1ERR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)
+#define CAN_ESR1_RWRNINT_MASK  (0x10000U)
+#define CAN_ESR1_RWRNINT_SHIFT (16U)
+#define CAN_ESR1_RWRNINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)
+#define CAN_ESR1_TWRNINT_MASK  (0x20000U)
+#define CAN_ESR1_TWRNINT_SHIFT (17U)
+#define CAN_ESR1_TWRNINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)
+#define CAN_ESR1_SYNCH_MASK    (0x40000U)
+#define CAN_ESR1_SYNCH_SHIFT   (18U)
+#define CAN_ESR1_SYNCH(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)
 /*! @} */
 
 /*! @name IMASK2 - Interrupt Masks 2 Register */
 /*! @{ */
-#define CAN_IMASK2_BUFHM_MASK                    (0xFFFFFFFFU)
-#define CAN_IMASK2_BUFHM_SHIFT                   (0U)
-#define CAN_IMASK2_BUFHM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)
+#define CAN_IMASK2_BUFHM_MASK  (0xFFFFFFFFU)
+#define CAN_IMASK2_BUFHM_SHIFT (0U)
+#define CAN_IMASK2_BUFHM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)
 /*! @} */
 
 /*! @name IMASK1 - Interrupt Masks 1 Register */
 /*! @{ */
-#define CAN_IMASK1_BUFLM_MASK                    (0xFFFFFFFFU)
-#define CAN_IMASK1_BUFLM_SHIFT                   (0U)
-#define CAN_IMASK1_BUFLM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)
+#define CAN_IMASK1_BUFLM_MASK  (0xFFFFFFFFU)
+#define CAN_IMASK1_BUFLM_SHIFT (0U)
+#define CAN_IMASK1_BUFLM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)
 /*! @} */
 
 /*! @name IFLAG2 - Interrupt Flags 2 Register */
 /*! @{ */
-#define CAN_IFLAG2_BUFHI_MASK                    (0xFFFFFFFFU)
-#define CAN_IFLAG2_BUFHI_SHIFT                   (0U)
-#define CAN_IFLAG2_BUFHI(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)
+#define CAN_IFLAG2_BUFHI_MASK  (0xFFFFFFFFU)
+#define CAN_IFLAG2_BUFHI_SHIFT (0U)
+#define CAN_IFLAG2_BUFHI(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)
 /*! @} */
 
 /*! @name IFLAG1 - Interrupt Flags 1 Register */
 /*! @{ */
-#define CAN_IFLAG1_BUF4TO0I_MASK                 (0x1FU)
-#define CAN_IFLAG1_BUF4TO0I_SHIFT                (0U)
-#define CAN_IFLAG1_BUF4TO0I(x)                   (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)
-#define CAN_IFLAG1_BUF5I_MASK                    (0x20U)
-#define CAN_IFLAG1_BUF5I_SHIFT                   (5U)
-#define CAN_IFLAG1_BUF5I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)
-#define CAN_IFLAG1_BUF6I_MASK                    (0x40U)
-#define CAN_IFLAG1_BUF6I_SHIFT                   (6U)
-#define CAN_IFLAG1_BUF6I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)
-#define CAN_IFLAG1_BUF7I_MASK                    (0x80U)
-#define CAN_IFLAG1_BUF7I_SHIFT                   (7U)
-#define CAN_IFLAG1_BUF7I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)
-#define CAN_IFLAG1_BUF31TO8I_MASK                (0xFFFFFF00U)
-#define CAN_IFLAG1_BUF31TO8I_SHIFT               (8U)
-#define CAN_IFLAG1_BUF31TO8I(x)                  (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)
+#define CAN_IFLAG1_BUF4TO0I_MASK   (0x1FU)
+#define CAN_IFLAG1_BUF4TO0I_SHIFT  (0U)
+#define CAN_IFLAG1_BUF4TO0I(x)     (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)
+#define CAN_IFLAG1_BUF5I_MASK      (0x20U)
+#define CAN_IFLAG1_BUF5I_SHIFT     (5U)
+#define CAN_IFLAG1_BUF5I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)
+#define CAN_IFLAG1_BUF6I_MASK      (0x40U)
+#define CAN_IFLAG1_BUF6I_SHIFT     (6U)
+#define CAN_IFLAG1_BUF6I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)
+#define CAN_IFLAG1_BUF7I_MASK      (0x80U)
+#define CAN_IFLAG1_BUF7I_SHIFT     (7U)
+#define CAN_IFLAG1_BUF7I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)
+#define CAN_IFLAG1_BUF31TO8I_MASK  (0xFFFFFF00U)
+#define CAN_IFLAG1_BUF31TO8I_SHIFT (8U)
+#define CAN_IFLAG1_BUF31TO8I(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)
 /*! @} */
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define CAN_CTRL2_EACEN_MASK                     (0x10000U)
-#define CAN_CTRL2_EACEN_SHIFT                    (16U)
-#define CAN_CTRL2_EACEN(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)
-#define CAN_CTRL2_RRS_MASK                       (0x20000U)
-#define CAN_CTRL2_RRS_SHIFT                      (17U)
-#define CAN_CTRL2_RRS(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)
-#define CAN_CTRL2_MRP_MASK                       (0x40000U)
-#define CAN_CTRL2_MRP_SHIFT                      (18U)
-#define CAN_CTRL2_MRP(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
-#define CAN_CTRL2_TASD_MASK                      (0xF80000U)
-#define CAN_CTRL2_TASD_SHIFT                     (19U)
-#define CAN_CTRL2_TASD(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)
-#define CAN_CTRL2_RFFN_MASK                      (0xF000000U)
-#define CAN_CTRL2_RFFN_SHIFT                     (24U)
-#define CAN_CTRL2_RFFN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)
-#define CAN_CTRL2_WRMFRZ_MASK                    (0x10000000U)
-#define CAN_CTRL2_WRMFRZ_SHIFT                   (28U)
-#define CAN_CTRL2_WRMFRZ(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)
+#define CAN_CTRL2_EACEN_MASK   (0x10000U)
+#define CAN_CTRL2_EACEN_SHIFT  (16U)
+#define CAN_CTRL2_EACEN(x)     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)
+#define CAN_CTRL2_RRS_MASK     (0x20000U)
+#define CAN_CTRL2_RRS_SHIFT    (17U)
+#define CAN_CTRL2_RRS(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)
+#define CAN_CTRL2_MRP_MASK     (0x40000U)
+#define CAN_CTRL2_MRP_SHIFT    (18U)
+#define CAN_CTRL2_MRP(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
+#define CAN_CTRL2_TASD_MASK    (0xF80000U)
+#define CAN_CTRL2_TASD_SHIFT   (19U)
+#define CAN_CTRL2_TASD(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)
+#define CAN_CTRL2_RFFN_MASK    (0xF000000U)
+#define CAN_CTRL2_RFFN_SHIFT   (24U)
+#define CAN_CTRL2_RFFN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)
+#define CAN_CTRL2_WRMFRZ_MASK  (0x10000000U)
+#define CAN_CTRL2_WRMFRZ_SHIFT (28U)
+#define CAN_CTRL2_WRMFRZ(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)
 /*! @} */
 
 /*! @name ESR2 - Error and Status 2 Register */
 /*! @{ */
-#define CAN_ESR2_IMB_MASK                        (0x2000U)
-#define CAN_ESR2_IMB_SHIFT                       (13U)
-#define CAN_ESR2_IMB(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)
-#define CAN_ESR2_VPS_MASK                        (0x4000U)
-#define CAN_ESR2_VPS_SHIFT                       (14U)
-#define CAN_ESR2_VPS(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
-#define CAN_ESR2_LPTM_MASK                       (0x7F0000U)
-#define CAN_ESR2_LPTM_SHIFT                      (16U)
-#define CAN_ESR2_LPTM(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)
+#define CAN_ESR2_IMB_MASK   (0x2000U)
+#define CAN_ESR2_IMB_SHIFT  (13U)
+#define CAN_ESR2_IMB(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)
+#define CAN_ESR2_VPS_MASK   (0x4000U)
+#define CAN_ESR2_VPS_SHIFT  (14U)
+#define CAN_ESR2_VPS(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
+#define CAN_ESR2_LPTM_MASK  (0x7F0000U)
+#define CAN_ESR2_LPTM_SHIFT (16U)
+#define CAN_ESR2_LPTM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)
 /*! @} */
 
 /*! @name CRCR - CRC Register */
 /*! @{ */
-#define CAN_CRCR_TXCRC_MASK                      (0x7FFFU)
-#define CAN_CRCR_TXCRC_SHIFT                     (0U)
-#define CAN_CRCR_TXCRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)
-#define CAN_CRCR_MBCRC_MASK                      (0x7F0000U)
-#define CAN_CRCR_MBCRC_SHIFT                     (16U)
-#define CAN_CRCR_MBCRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)
+#define CAN_CRCR_TXCRC_MASK  (0x7FFFU)
+#define CAN_CRCR_TXCRC_SHIFT (0U)
+#define CAN_CRCR_TXCRC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)
+#define CAN_CRCR_MBCRC_MASK  (0x7F0000U)
+#define CAN_CRCR_MBCRC_SHIFT (16U)
+#define CAN_CRCR_MBCRC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)
 /*! @} */
 
 /*! @name RXFGMASK - Rx FIFO Global Mask Register */
 /*! @{ */
-#define CAN_RXFGMASK_FGM_MASK                    (0xFFFFFFFFU)
-#define CAN_RXFGMASK_FGM_SHIFT                   (0U)
-#define CAN_RXFGMASK_FGM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)
+#define CAN_RXFGMASK_FGM_MASK  (0xFFFFFFFFU)
+#define CAN_RXFGMASK_FGM_SHIFT (0U)
+#define CAN_RXFGMASK_FGM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)
 /*! @} */
 
 /*! @name RXFIR - Rx FIFO Information Register */
 /*! @{ */
-#define CAN_RXFIR_IDHIT_MASK                     (0x1FFU)
-#define CAN_RXFIR_IDHIT_SHIFT                    (0U)
-#define CAN_RXFIR_IDHIT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)
+#define CAN_RXFIR_IDHIT_MASK  (0x1FFU)
+#define CAN_RXFIR_IDHIT_SHIFT (0U)
+#define CAN_RXFIR_IDHIT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)
 /*! @} */
 
 /*! @name CS - Message Buffer 0 CS Register..Message Buffer 63 CS Register */
 /*! @{ */
-#define CAN_CS_TIME_STAMP_MASK                   (0xFFFFU)
-#define CAN_CS_TIME_STAMP_SHIFT                  (0U)
-#define CAN_CS_TIME_STAMP(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)
-#define CAN_CS_DLC_MASK                          (0xF0000U)
-#define CAN_CS_DLC_SHIFT                         (16U)
-#define CAN_CS_DLC(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)
-#define CAN_CS_RTR_MASK                          (0x100000U)
-#define CAN_CS_RTR_SHIFT                         (20U)
-#define CAN_CS_RTR(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)
-#define CAN_CS_IDE_MASK                          (0x200000U)
-#define CAN_CS_IDE_SHIFT                         (21U)
-#define CAN_CS_IDE(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)
-#define CAN_CS_SRR_MASK                          (0x400000U)
-#define CAN_CS_SRR_SHIFT                         (22U)
-#define CAN_CS_SRR(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)
-#define CAN_CS_CODE_MASK                         (0xF000000U)
-#define CAN_CS_CODE_SHIFT                        (24U)
-#define CAN_CS_CODE(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)
+#define CAN_CS_TIME_STAMP_MASK  (0xFFFFU)
+#define CAN_CS_TIME_STAMP_SHIFT (0U)
+#define CAN_CS_TIME_STAMP(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)
+#define CAN_CS_DLC_MASK         (0xF0000U)
+#define CAN_CS_DLC_SHIFT        (16U)
+#define CAN_CS_DLC(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)
+#define CAN_CS_RTR_MASK         (0x100000U)
+#define CAN_CS_RTR_SHIFT        (20U)
+#define CAN_CS_RTR(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)
+#define CAN_CS_IDE_MASK         (0x200000U)
+#define CAN_CS_IDE_SHIFT        (21U)
+#define CAN_CS_IDE(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)
+#define CAN_CS_SRR_MASK         (0x400000U)
+#define CAN_CS_SRR_SHIFT        (22U)
+#define CAN_CS_SRR(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)
+#define CAN_CS_CODE_MASK        (0xF000000U)
+#define CAN_CS_CODE_SHIFT       (24U)
+#define CAN_CS_CODE(x)          (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)
 /*! @} */
 
 /* The count of CAN_CS */
-#define CAN_CS_COUNT                             (64U)
+#define CAN_CS_COUNT (64U)
 
 /*! @name ID - Message Buffer 0 ID Register..Message Buffer 63 ID Register */
 /*! @{ */
-#define CAN_ID_EXT_MASK                          (0x3FFFFU)
-#define CAN_ID_EXT_SHIFT                         (0U)
-#define CAN_ID_EXT(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)
-#define CAN_ID_STD_MASK                          (0x1FFC0000U)
-#define CAN_ID_STD_SHIFT                         (18U)
-#define CAN_ID_STD(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
-#define CAN_ID_PRIO_MASK                         (0xE0000000U)
-#define CAN_ID_PRIO_SHIFT                        (29U)
-#define CAN_ID_PRIO(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)
+#define CAN_ID_EXT_MASK   (0x3FFFFU)
+#define CAN_ID_EXT_SHIFT  (0U)
+#define CAN_ID_EXT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)
+#define CAN_ID_STD_MASK   (0x1FFC0000U)
+#define CAN_ID_STD_SHIFT  (18U)
+#define CAN_ID_STD(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
+#define CAN_ID_PRIO_MASK  (0xE0000000U)
+#define CAN_ID_PRIO_SHIFT (29U)
+#define CAN_ID_PRIO(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)
 /*! @} */
 
 /* The count of CAN_ID */
-#define CAN_ID_COUNT                             (64U)
+#define CAN_ID_COUNT (64U)
 
 /*! @name WORD0 - Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register */
 /*! @{ */
-#define CAN_WORD0_DATA_BYTE_3_MASK               (0xFFU)
-#define CAN_WORD0_DATA_BYTE_3_SHIFT              (0U)
-#define CAN_WORD0_DATA_BYTE_3(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)
-#define CAN_WORD0_DATA_BYTE_2_MASK               (0xFF00U)
-#define CAN_WORD0_DATA_BYTE_2_SHIFT              (8U)
-#define CAN_WORD0_DATA_BYTE_2(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)
-#define CAN_WORD0_DATA_BYTE_1_MASK               (0xFF0000U)
-#define CAN_WORD0_DATA_BYTE_1_SHIFT              (16U)
-#define CAN_WORD0_DATA_BYTE_1(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)
-#define CAN_WORD0_DATA_BYTE_0_MASK               (0xFF000000U)
-#define CAN_WORD0_DATA_BYTE_0_SHIFT              (24U)
-#define CAN_WORD0_DATA_BYTE_0(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)
+#define CAN_WORD0_DATA_BYTE_3_MASK  (0xFFU)
+#define CAN_WORD0_DATA_BYTE_3_SHIFT (0U)
+#define CAN_WORD0_DATA_BYTE_3(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)
+#define CAN_WORD0_DATA_BYTE_2_MASK  (0xFF00U)
+#define CAN_WORD0_DATA_BYTE_2_SHIFT (8U)
+#define CAN_WORD0_DATA_BYTE_2(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)
+#define CAN_WORD0_DATA_BYTE_1_MASK  (0xFF0000U)
+#define CAN_WORD0_DATA_BYTE_1_SHIFT (16U)
+#define CAN_WORD0_DATA_BYTE_1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)
+#define CAN_WORD0_DATA_BYTE_0_MASK  (0xFF000000U)
+#define CAN_WORD0_DATA_BYTE_0_SHIFT (24U)
+#define CAN_WORD0_DATA_BYTE_0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)
 /*! @} */
 
 /* The count of CAN_WORD0 */
-#define CAN_WORD0_COUNT                          (64U)
+#define CAN_WORD0_COUNT (64U)
 
 /*! @name WORD1 - Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register */
 /*! @{ */
-#define CAN_WORD1_DATA_BYTE_7_MASK               (0xFFU)
-#define CAN_WORD1_DATA_BYTE_7_SHIFT              (0U)
-#define CAN_WORD1_DATA_BYTE_7(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)
-#define CAN_WORD1_DATA_BYTE_6_MASK               (0xFF00U)
-#define CAN_WORD1_DATA_BYTE_6_SHIFT              (8U)
-#define CAN_WORD1_DATA_BYTE_6(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)
-#define CAN_WORD1_DATA_BYTE_5_MASK               (0xFF0000U)
-#define CAN_WORD1_DATA_BYTE_5_SHIFT              (16U)
-#define CAN_WORD1_DATA_BYTE_5(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)
-#define CAN_WORD1_DATA_BYTE_4_MASK               (0xFF000000U)
-#define CAN_WORD1_DATA_BYTE_4_SHIFT              (24U)
-#define CAN_WORD1_DATA_BYTE_4(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)
+#define CAN_WORD1_DATA_BYTE_7_MASK  (0xFFU)
+#define CAN_WORD1_DATA_BYTE_7_SHIFT (0U)
+#define CAN_WORD1_DATA_BYTE_7(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)
+#define CAN_WORD1_DATA_BYTE_6_MASK  (0xFF00U)
+#define CAN_WORD1_DATA_BYTE_6_SHIFT (8U)
+#define CAN_WORD1_DATA_BYTE_6(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)
+#define CAN_WORD1_DATA_BYTE_5_MASK  (0xFF0000U)
+#define CAN_WORD1_DATA_BYTE_5_SHIFT (16U)
+#define CAN_WORD1_DATA_BYTE_5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)
+#define CAN_WORD1_DATA_BYTE_4_MASK  (0xFF000000U)
+#define CAN_WORD1_DATA_BYTE_4_SHIFT (24U)
+#define CAN_WORD1_DATA_BYTE_4(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)
 /*! @} */
 
 /* The count of CAN_WORD1 */
-#define CAN_WORD1_COUNT                          (64U)
+#define CAN_WORD1_COUNT (64U)
 
 /*! @name RXIMR - Rx Individual Mask Registers */
 /*! @{ */
-#define CAN_RXIMR_MI_MASK                        (0xFFFFFFFFU)
-#define CAN_RXIMR_MI_SHIFT                       (0U)
-#define CAN_RXIMR_MI(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)
+#define CAN_RXIMR_MI_MASK  (0xFFFFFFFFU)
+#define CAN_RXIMR_MI_SHIFT (0U)
+#define CAN_RXIMR_MI(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)
 /*! @} */
 
 /* The count of CAN_RXIMR */
-#define CAN_RXIMR_COUNT                          (64U)
+#define CAN_RXIMR_COUNT (64U)
 
 /*! @name GFWR - Glitch Filter Width Registers */
 /*! @{ */
-#define CAN_GFWR_GFWR_MASK                       (0xFFU)
-#define CAN_GFWR_GFWR_SHIFT                      (0U)
-#define CAN_GFWR_GFWR(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)
+#define CAN_GFWR_GFWR_MASK  (0xFFU)
+#define CAN_GFWR_GFWR_SHIFT (0U)
+#define CAN_GFWR_GFWR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CAN_Register_Masks */
 
-
 /* CAN - Peripheral instance base addresses */
 /** Peripheral CAN1 base address */
-#define CAN1_BASE                                (0x401D0000u)
+#define CAN1_BASE (0x401D0000u)
 /** Peripheral CAN1 base pointer */
-#define CAN1                                     ((CAN_Type *)CAN1_BASE)
+#define CAN1 ((CAN_Type *)CAN1_BASE)
 /** Peripheral CAN2 base address */
-#define CAN2_BASE                                (0x401D4000u)
+#define CAN2_BASE (0x401D4000u)
 /** Peripheral CAN2 base pointer */
-#define CAN2                                     ((CAN_Type *)CAN2_BASE)
+#define CAN2 ((CAN_Type *)CAN2_BASE)
 /** Array initializer of CAN peripheral base addresses */
-#define CAN_BASE_ADDRS                           { 0u, CAN1_BASE, CAN2_BASE }
+#define CAN_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, CAN1_BASE, CAN2_BASE                                                                                       \
+    }
 /** Array initializer of CAN peripheral base pointers */
-#define CAN_BASE_PTRS                            { (CAN_Type *)0u, CAN1, CAN2 }
+#define CAN_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (CAN_Type *)0u, CAN1, CAN2                                                                                     \
+    }
 /** Interrupt vectors for the CAN peripheral type */
-#define CAN_Rx_Warning_IRQS                      { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Tx_Warning_IRQS                      { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Wake_Up_IRQS                         { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Error_IRQS                           { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Bus_Off_IRQS                         { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_ORed_Message_buffer_IRQS             { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
+#define CAN_Rx_Warning_IRQS                                                                                            \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Tx_Warning_IRQS                                                                                            \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Wake_Up_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Error_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Bus_Off_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_ORed_Message_buffer_IRQS                                                                                   \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
 /* Backward compatibility */
-#define CAN_ECR_TXERRCNT_MASK         CAN_ECR_TX_ERR_COUNTER_MASK
-#define CAN_ECR_TXERRCNT_SHIFT        CAN_ECR_TX_ERR_COUNTER_SHIFT
-#define CAN_ECR_TXERRCNT(x)           CAN_ECR_TX_ERR_COUNTER(x)
-#define CAN_ECR_RXERRCNT_MASK         CAN_ECR_RX_ERR_COUNTER_MASK
-#define CAN_ECR_RXERRCNT_SHIFT        CAN_ECR_RX_ERR_COUNTER_SHIFT
-#define CAN_ECR_RXERRCNT(x)           CAN_ECR_RX_ERR_COUNTER(x)
-
+#define CAN_ECR_TXERRCNT_MASK  CAN_ECR_TX_ERR_COUNTER_MASK
+#define CAN_ECR_TXERRCNT_SHIFT CAN_ECR_TX_ERR_COUNTER_SHIFT
+#define CAN_ECR_TXERRCNT(x)    CAN_ECR_TX_ERR_COUNTER(x)
+#define CAN_ECR_RXERRCNT_MASK  CAN_ECR_RX_ERR_COUNTER_MASK
+#define CAN_ECR_RXERRCNT_SHIFT CAN_ECR_RX_ERR_COUNTER_SHIFT
+#define CAN_ECR_RXERRCNT(x)    CAN_ECR_RX_ERR_COUNTER(x)
 
 /*!
  * @}
  */ /* end of group CAN_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CCM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -3042,40 +3338,41 @@ typedef struct {
  */
 
 /** CCM - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CCR;                               /**< CCM Control Register, offset: 0x0 */
-       uint8_t RESERVED_0[4];
-  __I  uint32_t CSR;                               /**< CCM Status Register, offset: 0x8 */
-  __IO uint32_t CCSR;                              /**< CCM Clock Switcher Register, offset: 0xC */
-  __IO uint32_t CACRR;                             /**< CCM Arm Clock Root Register, offset: 0x10 */
-  __IO uint32_t CBCDR;                             /**< CCM Bus Clock Divider Register, offset: 0x14 */
-  __IO uint32_t CBCMR;                             /**< CCM Bus Clock Multiplexer Register, offset: 0x18 */
-  __IO uint32_t CSCMR1;                            /**< CCM Serial Clock Multiplexer Register 1, offset: 0x1C */
-  __IO uint32_t CSCMR2;                            /**< CCM Serial Clock Multiplexer Register 2, offset: 0x20 */
-  __IO uint32_t CSCDR1;                            /**< CCM Serial Clock Divider Register 1, offset: 0x24 */
-  __IO uint32_t CS1CDR;                            /**< CCM Clock Divider Register, offset: 0x28 */
-  __IO uint32_t CS2CDR;                            /**< CCM Clock Divider Register, offset: 0x2C */
-  __IO uint32_t CDCDR;                             /**< CCM D1 Clock Divider Register, offset: 0x30 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t CSCDR2;                            /**< CCM Serial Clock Divider Register 2, offset: 0x38 */
-  __IO uint32_t CSCDR3;                            /**< CCM Serial Clock Divider Register 3, offset: 0x3C */
-       uint8_t RESERVED_2[8];
-  __I  uint32_t CDHIPR;                            /**< CCM Divider Handshake In-Process Register, offset: 0x48 */
-       uint8_t RESERVED_3[8];
-  __IO uint32_t CLPCR;                             /**< CCM Low Power Control Register, offset: 0x54 */
-  __IO uint32_t CISR;                              /**< CCM Interrupt Status Register, offset: 0x58 */
-  __IO uint32_t CIMR;                              /**< CCM Interrupt Mask Register, offset: 0x5C */
-  __IO uint32_t CCOSR;                             /**< CCM Clock Output Source Register, offset: 0x60 */
-  __IO uint32_t CGPR;                              /**< CCM General Purpose Register, offset: 0x64 */
-  __IO uint32_t CCGR0;                             /**< CCM Clock Gating Register 0, offset: 0x68 */
-  __IO uint32_t CCGR1;                             /**< CCM Clock Gating Register 1, offset: 0x6C */
-  __IO uint32_t CCGR2;                             /**< CCM Clock Gating Register 2, offset: 0x70 */
-  __IO uint32_t CCGR3;                             /**< CCM Clock Gating Register 3, offset: 0x74 */
-  __IO uint32_t CCGR4;                             /**< CCM Clock Gating Register 4, offset: 0x78 */
-  __IO uint32_t CCGR5;                             /**< CCM Clock Gating Register 5, offset: 0x7C */
-  __IO uint32_t CCGR6;                             /**< CCM Clock Gating Register 6, offset: 0x80 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t CMEOR;                             /**< CCM Module Enable Overide Register, offset: 0x88 */
+typedef struct
+{
+    __IO uint32_t CCR; /**< CCM Control Register, offset: 0x0 */
+    uint8_t RESERVED_0[4];
+    __I uint32_t CSR;     /**< CCM Status Register, offset: 0x8 */
+    __IO uint32_t CCSR;   /**< CCM Clock Switcher Register, offset: 0xC */
+    __IO uint32_t CACRR;  /**< CCM Arm Clock Root Register, offset: 0x10 */
+    __IO uint32_t CBCDR;  /**< CCM Bus Clock Divider Register, offset: 0x14 */
+    __IO uint32_t CBCMR;  /**< CCM Bus Clock Multiplexer Register, offset: 0x18 */
+    __IO uint32_t CSCMR1; /**< CCM Serial Clock Multiplexer Register 1, offset: 0x1C */
+    __IO uint32_t CSCMR2; /**< CCM Serial Clock Multiplexer Register 2, offset: 0x20 */
+    __IO uint32_t CSCDR1; /**< CCM Serial Clock Divider Register 1, offset: 0x24 */
+    __IO uint32_t CS1CDR; /**< CCM Clock Divider Register, offset: 0x28 */
+    __IO uint32_t CS2CDR; /**< CCM Clock Divider Register, offset: 0x2C */
+    __IO uint32_t CDCDR;  /**< CCM D1 Clock Divider Register, offset: 0x30 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t CSCDR2; /**< CCM Serial Clock Divider Register 2, offset: 0x38 */
+    __IO uint32_t CSCDR3; /**< CCM Serial Clock Divider Register 3, offset: 0x3C */
+    uint8_t RESERVED_2[8];
+    __I uint32_t CDHIPR; /**< CCM Divider Handshake In-Process Register, offset: 0x48 */
+    uint8_t RESERVED_3[8];
+    __IO uint32_t CLPCR; /**< CCM Low Power Control Register, offset: 0x54 */
+    __IO uint32_t CISR;  /**< CCM Interrupt Status Register, offset: 0x58 */
+    __IO uint32_t CIMR;  /**< CCM Interrupt Mask Register, offset: 0x5C */
+    __IO uint32_t CCOSR; /**< CCM Clock Output Source Register, offset: 0x60 */
+    __IO uint32_t CGPR;  /**< CCM General Purpose Register, offset: 0x64 */
+    __IO uint32_t CCGR0; /**< CCM Clock Gating Register 0, offset: 0x68 */
+    __IO uint32_t CCGR1; /**< CCM Clock Gating Register 1, offset: 0x6C */
+    __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */
+    __IO uint32_t CCGR3; /**< CCM Clock Gating Register 3, offset: 0x74 */
+    __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */
+    __IO uint32_t CCGR5; /**< CCM Clock Gating Register 5, offset: 0x7C */
+    __IO uint32_t CCGR6; /**< CCM Clock Gating Register 6, offset: 0x80 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t CMEOR; /**< CCM Module Enable Overide Register, offset: 0x88 */
 } CCM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -3089,799 +3386,892 @@ typedef struct {
 
 /*! @name CCR - CCM Control Register */
 /*! @{ */
-#define CCM_CCR_OSCNT_MASK                       (0xFFU)
-#define CCM_CCR_OSCNT_SHIFT                      (0U)
-#define CCM_CCR_OSCNT(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)
-#define CCM_CCR_COSC_EN_MASK                     (0x1000U)
-#define CCM_CCR_COSC_EN_SHIFT                    (12U)
-#define CCM_CCR_COSC_EN(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)
-#define CCM_CCR_REG_BYPASS_COUNT_MASK            (0x7E00000U)
-#define CCM_CCR_REG_BYPASS_COUNT_SHIFT           (21U)
-#define CCM_CCR_REG_BYPASS_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)
-#define CCM_CCR_RBC_EN_MASK                      (0x8000000U)
-#define CCM_CCR_RBC_EN_SHIFT                     (27U)
-#define CCM_CCR_RBC_EN(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)
+#define CCM_CCR_OSCNT_MASK             (0xFFU)
+#define CCM_CCR_OSCNT_SHIFT            (0U)
+#define CCM_CCR_OSCNT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)
+#define CCM_CCR_COSC_EN_MASK           (0x1000U)
+#define CCM_CCR_COSC_EN_SHIFT          (12U)
+#define CCM_CCR_COSC_EN(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)
+#define CCM_CCR_REG_BYPASS_COUNT_MASK  (0x7E00000U)
+#define CCM_CCR_REG_BYPASS_COUNT_SHIFT (21U)
+#define CCM_CCR_REG_BYPASS_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)
+#define CCM_CCR_RBC_EN_MASK  (0x8000000U)
+#define CCM_CCR_RBC_EN_SHIFT (27U)
+#define CCM_CCR_RBC_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)
 /*! @} */
 
 /*! @name CSR - CCM Status Register */
 /*! @{ */
-#define CCM_CSR_REF_EN_B_MASK                    (0x1U)
-#define CCM_CSR_REF_EN_B_SHIFT                   (0U)
-#define CCM_CSR_REF_EN_B(x)                      (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)
-#define CCM_CSR_CAMP2_READY_MASK                 (0x8U)
-#define CCM_CSR_CAMP2_READY_SHIFT                (3U)
-#define CCM_CSR_CAMP2_READY(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)
-#define CCM_CSR_COSC_READY_MASK                  (0x20U)
-#define CCM_CSR_COSC_READY_SHIFT                 (5U)
-#define CCM_CSR_COSC_READY(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)
+#define CCM_CSR_REF_EN_B_MASK     (0x1U)
+#define CCM_CSR_REF_EN_B_SHIFT    (0U)
+#define CCM_CSR_REF_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)
+#define CCM_CSR_CAMP2_READY_MASK  (0x8U)
+#define CCM_CSR_CAMP2_READY_SHIFT (3U)
+#define CCM_CSR_CAMP2_READY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)
+#define CCM_CSR_COSC_READY_MASK   (0x20U)
+#define CCM_CSR_COSC_READY_SHIFT  (5U)
+#define CCM_CSR_COSC_READY(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)
 /*! @} */
 
 /*! @name CCSR - CCM Clock Switcher Register */
 /*! @{ */
-#define CCM_CCSR_PLL3_SW_CLK_SEL_MASK            (0x1U)
-#define CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT           (0U)
-#define CCM_CCSR_PLL3_SW_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)
+#define CCM_CCSR_PLL3_SW_CLK_SEL_MASK  (0x1U)
+#define CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT (0U)
+#define CCM_CCSR_PLL3_SW_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CACRR - CCM Arm Clock Root Register */
 /*! @{ */
-#define CCM_CACRR_ARM_PODF_MASK                  (0x7U)
-#define CCM_CACRR_ARM_PODF_SHIFT                 (0U)
-#define CCM_CACRR_ARM_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)
+#define CCM_CACRR_ARM_PODF_MASK  (0x7U)
+#define CCM_CACRR_ARM_PODF_SHIFT (0U)
+#define CCM_CACRR_ARM_PODF(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)
 /*! @} */
 
 /*! @name CBCDR - CCM Bus Clock Divider Register */
 /*! @{ */
-#define CCM_CBCDR_SEMC_CLK_SEL_MASK              (0x40U)
-#define CCM_CBCDR_SEMC_CLK_SEL_SHIFT             (6U)
-#define CCM_CBCDR_SEMC_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK          (0x80U)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT         (7U)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)
-#define CCM_CBCDR_IPG_PODF_MASK                  (0x300U)
-#define CCM_CBCDR_IPG_PODF_SHIFT                 (8U)
-#define CCM_CBCDR_IPG_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)
-#define CCM_CBCDR_AHB_PODF_MASK                  (0x1C00U)
-#define CCM_CBCDR_AHB_PODF_SHIFT                 (10U)
-#define CCM_CBCDR_AHB_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)
-#define CCM_CBCDR_SEMC_PODF_MASK                 (0x70000U)
-#define CCM_CBCDR_SEMC_PODF_SHIFT                (16U)
-#define CCM_CBCDR_SEMC_PODF(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)
-#define CCM_CBCDR_PERIPH_CLK_SEL_MASK            (0x2000000U)
-#define CCM_CBCDR_PERIPH_CLK_SEL_SHIFT           (25U)
-#define CCM_CBCDR_PERIPH_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
-#define CCM_CBCDR_PERIPH_CLK2_PODF_MASK          (0x38000000U)
-#define CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT         (27U)
-#define CCM_CBCDR_PERIPH_CLK2_PODF(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)
+#define CCM_CBCDR_SEMC_CLK_SEL_MASK  (0x40U)
+#define CCM_CBCDR_SEMC_CLK_SEL_SHIFT (6U)
+#define CCM_CBCDR_SEMC_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK  (0x80U)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT (7U)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)
+#define CCM_CBCDR_IPG_PODF_MASK        (0x300U)
+#define CCM_CBCDR_IPG_PODF_SHIFT       (8U)
+#define CCM_CBCDR_IPG_PODF(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)
+#define CCM_CBCDR_AHB_PODF_MASK        (0x1C00U)
+#define CCM_CBCDR_AHB_PODF_SHIFT       (10U)
+#define CCM_CBCDR_AHB_PODF(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)
+#define CCM_CBCDR_SEMC_PODF_MASK       (0x70000U)
+#define CCM_CBCDR_SEMC_PODF_SHIFT      (16U)
+#define CCM_CBCDR_SEMC_PODF(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)
+#define CCM_CBCDR_PERIPH_CLK_SEL_MASK  (0x2000000U)
+#define CCM_CBCDR_PERIPH_CLK_SEL_SHIFT (25U)
+#define CCM_CBCDR_PERIPH_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
+#define CCM_CBCDR_PERIPH_CLK2_PODF_MASK  (0x38000000U)
+#define CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT (27U)
+#define CCM_CBCDR_PERIPH_CLK2_PODF(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)
 /*! @} */
 
 /*! @name CBCMR - CCM Bus Clock Multiplexer Register */
 /*! @{ */
-#define CCM_CBCMR_LPSPI_CLK_SEL_MASK             (0x30U)
-#define CCM_CBCMR_LPSPI_CLK_SEL_SHIFT            (4U)
-#define CCM_CBCMR_LPSPI_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)
-#define CCM_CBCMR_PERIPH_CLK2_SEL_MASK           (0x3000U)
-#define CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT          (12U)
-#define CCM_CBCMR_PERIPH_CLK2_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
-#define CCM_CBCMR_TRACE_CLK_SEL_MASK             (0xC000U)
-#define CCM_CBCMR_TRACE_CLK_SEL_SHIFT            (14U)
-#define CCM_CBCMR_TRACE_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK        (0xC0000U)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT       (18U)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
-#define CCM_CBCMR_LCDIF_PODF_MASK                (0x3800000U)
-#define CCM_CBCMR_LCDIF_PODF_SHIFT               (23U)
-#define CCM_CBCMR_LCDIF_PODF(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)
-#define CCM_CBCMR_LPSPI_PODF_MASK                (0x1C000000U)
-#define CCM_CBCMR_LPSPI_PODF_SHIFT               (26U)
-#define CCM_CBCMR_LPSPI_PODF(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)
+#define CCM_CBCMR_LPSPI_CLK_SEL_MASK  (0x30U)
+#define CCM_CBCMR_LPSPI_CLK_SEL_SHIFT (4U)
+#define CCM_CBCMR_LPSPI_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)
+#define CCM_CBCMR_PERIPH_CLK2_SEL_MASK  (0x3000U)
+#define CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT (12U)
+#define CCM_CBCMR_PERIPH_CLK2_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
+#define CCM_CBCMR_TRACE_CLK_SEL_MASK  (0xC000U)
+#define CCM_CBCMR_TRACE_CLK_SEL_SHIFT (14U)
+#define CCM_CBCMR_TRACE_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK  (0xC0000U)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT (18U)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
+#define CCM_CBCMR_LCDIF_PODF_MASK  (0x3800000U)
+#define CCM_CBCMR_LCDIF_PODF_SHIFT (23U)
+#define CCM_CBCMR_LCDIF_PODF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)
+#define CCM_CBCMR_LPSPI_PODF_MASK  (0x1C000000U)
+#define CCM_CBCMR_LPSPI_PODF_SHIFT (26U)
+#define CCM_CBCMR_LPSPI_PODF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)
 /*! @} */
 
 /*! @name CSCMR1 - CCM Serial Clock Multiplexer Register 1 */
 /*! @{ */
-#define CCM_CSCMR1_PERCLK_PODF_MASK              (0x3FU)
-#define CCM_CSCMR1_PERCLK_PODF_SHIFT             (0U)
-#define CCM_CSCMR1_PERCLK_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)
-#define CCM_CSCMR1_PERCLK_CLK_SEL_MASK           (0x40U)
-#define CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT          (6U)
-#define CCM_CSCMR1_PERCLK_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI1_CLK_SEL_MASK             (0xC00U)
-#define CCM_CSCMR1_SAI1_CLK_SEL_SHIFT            (10U)
-#define CCM_CSCMR1_SAI1_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI2_CLK_SEL_MASK             (0x3000U)
-#define CCM_CSCMR1_SAI2_CLK_SEL_SHIFT            (12U)
-#define CCM_CSCMR1_SAI2_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI3_CLK_SEL_MASK             (0xC000U)
-#define CCM_CSCMR1_SAI3_CLK_SEL_SHIFT            (14U)
-#define CCM_CSCMR1_SAI3_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)
-#define CCM_CSCMR1_USDHC1_CLK_SEL_MASK           (0x10000U)
-#define CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT          (16U)
-#define CCM_CSCMR1_USDHC1_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)
-#define CCM_CSCMR1_USDHC2_CLK_SEL_MASK           (0x20000U)
-#define CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT          (17U)
-#define CCM_CSCMR1_USDHC2_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)
-#define CCM_CSCMR1_FLEXSPI_PODF_MASK             (0x3800000U)
-#define CCM_CSCMR1_FLEXSPI_PODF_SHIFT            (23U)
-#define CCM_CSCMR1_FLEXSPI_PODF(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK          (0x60000000U)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT         (29U)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)
+#define CCM_CSCMR1_PERCLK_PODF_MASK  (0x3FU)
+#define CCM_CSCMR1_PERCLK_PODF_SHIFT (0U)
+#define CCM_CSCMR1_PERCLK_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)
+#define CCM_CSCMR1_PERCLK_CLK_SEL_MASK  (0x40U)
+#define CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT (6U)
+#define CCM_CSCMR1_PERCLK_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI1_CLK_SEL_MASK  (0xC00U)
+#define CCM_CSCMR1_SAI1_CLK_SEL_SHIFT (10U)
+#define CCM_CSCMR1_SAI1_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI2_CLK_SEL_MASK  (0x3000U)
+#define CCM_CSCMR1_SAI2_CLK_SEL_SHIFT (12U)
+#define CCM_CSCMR1_SAI2_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI3_CLK_SEL_MASK  (0xC000U)
+#define CCM_CSCMR1_SAI3_CLK_SEL_SHIFT (14U)
+#define CCM_CSCMR1_SAI3_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)
+#define CCM_CSCMR1_USDHC1_CLK_SEL_MASK  (0x10000U)
+#define CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT (16U)
+#define CCM_CSCMR1_USDHC1_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)
+#define CCM_CSCMR1_USDHC2_CLK_SEL_MASK  (0x20000U)
+#define CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT (17U)
+#define CCM_CSCMR1_USDHC2_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)
+#define CCM_CSCMR1_FLEXSPI_PODF_MASK  (0x3800000U)
+#define CCM_CSCMR1_FLEXSPI_PODF_SHIFT (23U)
+#define CCM_CSCMR1_FLEXSPI_PODF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK  (0x60000000U)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT (29U)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CSCMR2 - CCM Serial Clock Multiplexer Register 2 */
 /*! @{ */
-#define CCM_CSCMR2_CAN_CLK_PODF_MASK             (0xFCU)
-#define CCM_CSCMR2_CAN_CLK_PODF_SHIFT            (2U)
-#define CCM_CSCMR2_CAN_CLK_PODF(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)
-#define CCM_CSCMR2_CAN_CLK_SEL_MASK              (0x300U)
-#define CCM_CSCMR2_CAN_CLK_SEL_SHIFT             (8U)
-#define CCM_CSCMR2_CAN_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK          (0x180000U)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT         (19U)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)
+#define CCM_CSCMR2_CAN_CLK_PODF_MASK  (0xFCU)
+#define CCM_CSCMR2_CAN_CLK_PODF_SHIFT (2U)
+#define CCM_CSCMR2_CAN_CLK_PODF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)
+#define CCM_CSCMR2_CAN_CLK_SEL_MASK  (0x300U)
+#define CCM_CSCMR2_CAN_CLK_SEL_SHIFT (8U)
+#define CCM_CSCMR2_CAN_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK  (0x180000U)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT (19U)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CSCDR1 - CCM Serial Clock Divider Register 1 */
 /*! @{ */
-#define CCM_CSCDR1_UART_CLK_PODF_MASK            (0x3FU)
-#define CCM_CSCDR1_UART_CLK_PODF_SHIFT           (0U)
-#define CCM_CSCDR1_UART_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)
-#define CCM_CSCDR1_UART_CLK_SEL_MASK             (0x40U)
-#define CCM_CSCDR1_UART_CLK_SEL_SHIFT            (6U)
-#define CCM_CSCDR1_UART_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)
-#define CCM_CSCDR1_USDHC1_PODF_MASK              (0x3800U)
-#define CCM_CSCDR1_USDHC1_PODF_SHIFT             (11U)
-#define CCM_CSCDR1_USDHC1_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)
-#define CCM_CSCDR1_USDHC2_PODF_MASK              (0x70000U)
-#define CCM_CSCDR1_USDHC2_PODF_SHIFT             (16U)
-#define CCM_CSCDR1_USDHC2_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)
-#define CCM_CSCDR1_TRACE_PODF_MASK               (0x6000000U)
-#define CCM_CSCDR1_TRACE_PODF_SHIFT              (25U)
-#define CCM_CSCDR1_TRACE_PODF(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)
+#define CCM_CSCDR1_UART_CLK_PODF_MASK  (0x3FU)
+#define CCM_CSCDR1_UART_CLK_PODF_SHIFT (0U)
+#define CCM_CSCDR1_UART_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)
+#define CCM_CSCDR1_UART_CLK_SEL_MASK  (0x40U)
+#define CCM_CSCDR1_UART_CLK_SEL_SHIFT (6U)
+#define CCM_CSCDR1_UART_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)
+#define CCM_CSCDR1_USDHC1_PODF_MASK  (0x3800U)
+#define CCM_CSCDR1_USDHC1_PODF_SHIFT (11U)
+#define CCM_CSCDR1_USDHC1_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)
+#define CCM_CSCDR1_USDHC2_PODF_MASK  (0x70000U)
+#define CCM_CSCDR1_USDHC2_PODF_SHIFT (16U)
+#define CCM_CSCDR1_USDHC2_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)
+#define CCM_CSCDR1_TRACE_PODF_MASK  (0x6000000U)
+#define CCM_CSCDR1_TRACE_PODF_SHIFT (25U)
+#define CCM_CSCDR1_TRACE_PODF(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)
 /*! @} */
 
 /*! @name CS1CDR - CCM Clock Divider Register */
 /*! @{ */
-#define CCM_CS1CDR_SAI1_CLK_PODF_MASK            (0x3FU)
-#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT           (0U)
-#define CCM_CS1CDR_SAI1_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)
-#define CCM_CS1CDR_SAI1_CLK_PRED_MASK            (0x1C0U)
-#define CCM_CS1CDR_SAI1_CLK_PRED_SHIFT           (6U)
-#define CCM_CS1CDR_SAI1_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK         (0xE00U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT        (9U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED(x)           (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)
-#define CCM_CS1CDR_SAI3_CLK_PODF_MASK            (0x3F0000U)
-#define CCM_CS1CDR_SAI3_CLK_PODF_SHIFT           (16U)
-#define CCM_CS1CDR_SAI3_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)
-#define CCM_CS1CDR_SAI3_CLK_PRED_MASK            (0x1C00000U)
-#define CCM_CS1CDR_SAI3_CLK_PRED_SHIFT           (22U)
-#define CCM_CS1CDR_SAI3_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK         (0xE000000U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT        (25U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF(x)           (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI1_CLK_PODF_MASK  (0x3FU)
+#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0U)
+#define CCM_CS1CDR_SAI1_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI1_CLK_PRED_MASK  (0x1C0U)
+#define CCM_CS1CDR_SAI1_CLK_PRED_SHIFT (6U)
+#define CCM_CS1CDR_SAI1_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK  (0xE00U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT (9U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)
+#define CCM_CS1CDR_SAI3_CLK_PODF_MASK  (0x3F0000U)
+#define CCM_CS1CDR_SAI3_CLK_PODF_SHIFT (16U)
+#define CCM_CS1CDR_SAI3_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI3_CLK_PRED_MASK  (0x1C00000U)
+#define CCM_CS1CDR_SAI3_CLK_PRED_SHIFT (22U)
+#define CCM_CS1CDR_SAI3_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK  (0xE000000U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT (25U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)
 /*! @} */
 
 /*! @name CS2CDR - CCM Clock Divider Register */
 /*! @{ */
-#define CCM_CS2CDR_SAI2_CLK_PODF_MASK            (0x3FU)
-#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT           (0U)
-#define CCM_CS2CDR_SAI2_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)
-#define CCM_CS2CDR_SAI2_CLK_PRED_MASK            (0x1C0U)
-#define CCM_CS2CDR_SAI2_CLK_PRED_SHIFT           (6U)
-#define CCM_CS2CDR_SAI2_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)
+#define CCM_CS2CDR_SAI2_CLK_PODF_MASK  (0x3FU)
+#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0U)
+#define CCM_CS2CDR_SAI2_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)
+#define CCM_CS2CDR_SAI2_CLK_PRED_MASK  (0x1C0U)
+#define CCM_CS2CDR_SAI2_CLK_PRED_SHIFT (6U)
+#define CCM_CS2CDR_SAI2_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)
 /*! @} */
 
 /*! @name CDCDR - CCM D1 Clock Divider Register */
 /*! @{ */
-#define CCM_CDCDR_FLEXIO1_CLK_SEL_MASK           (0x180U)
-#define CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT          (7U)
-#define CCM_CDCDR_FLEXIO1_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF_MASK          (0xE00U)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT         (9U)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED_MASK          (0x7000U)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT         (12U)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_SEL_MASK            (0x300000U)
-#define CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT           (20U)
-#define CCM_CDCDR_SPDIF0_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_PODF_MASK           (0x1C00000U)
-#define CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT          (22U)
-#define CCM_CDCDR_SPDIF0_CLK_PODF(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_PRED_MASK           (0xE000000U)
-#define CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT          (25U)
-#define CCM_CDCDR_SPDIF0_CLK_PRED(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL_MASK  (0x180U)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT (7U)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF_MASK  (0xE00U)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT (9U)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED_MASK  (0x7000U)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT (12U)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_SEL_MASK  (0x300000U)
+#define CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT (20U)
+#define CCM_CDCDR_SPDIF0_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_PODF_MASK  (0x1C00000U)
+#define CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT (22U)
+#define CCM_CDCDR_SPDIF0_CLK_PODF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_PRED_MASK  (0xE000000U)
+#define CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT (25U)
+#define CCM_CDCDR_SPDIF0_CLK_PRED(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)
 /*! @} */
 
 /*! @name CSCDR2 - CCM Serial Clock Divider Register 2 */
 /*! @{ */
-#define CCM_CSCDR2_LCDIF_PRED_MASK               (0x7000U)
-#define CCM_CSCDR2_LCDIF_PRED_SHIFT              (12U)
-#define CCM_CSCDR2_LCDIF_PRED(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK        (0x38000U)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT       (15U)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)
-#define CCM_CSCDR2_LPI2C_CLK_SEL_MASK            (0x40000U)
-#define CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT           (18U)
-#define CCM_CSCDR2_LPI2C_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)
-#define CCM_CSCDR2_LPI2C_CLK_PODF_MASK           (0x1F80000U)
-#define CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT          (19U)
-#define CCM_CSCDR2_LPI2C_CLK_PODF(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)
+#define CCM_CSCDR2_LCDIF_PRED_MASK  (0x7000U)
+#define CCM_CSCDR2_LCDIF_PRED_SHIFT (12U)
+#define CCM_CSCDR2_LCDIF_PRED(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK  (0x38000U)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT (15U)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)
+#define CCM_CSCDR2_LPI2C_CLK_SEL_MASK  (0x40000U)
+#define CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT (18U)
+#define CCM_CSCDR2_LPI2C_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)
+#define CCM_CSCDR2_LPI2C_CLK_PODF_MASK  (0x1F80000U)
+#define CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT (19U)
+#define CCM_CSCDR2_LPI2C_CLK_PODF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)
 /*! @} */
 
 /*! @name CSCDR3 - CCM Serial Clock Divider Register 3 */
 /*! @{ */
-#define CCM_CSCDR3_CSI_CLK_SEL_MASK              (0x600U)
-#define CCM_CSCDR3_CSI_CLK_SEL_SHIFT             (9U)
-#define CCM_CSCDR3_CSI_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)
-#define CCM_CSCDR3_CSI_PODF_MASK                 (0x3800U)
-#define CCM_CSCDR3_CSI_PODF_SHIFT                (11U)
-#define CCM_CSCDR3_CSI_PODF(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)
+#define CCM_CSCDR3_CSI_CLK_SEL_MASK  (0x600U)
+#define CCM_CSCDR3_CSI_CLK_SEL_SHIFT (9U)
+#define CCM_CSCDR3_CSI_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)
+#define CCM_CSCDR3_CSI_PODF_MASK  (0x3800U)
+#define CCM_CSCDR3_CSI_PODF_SHIFT (11U)
+#define CCM_CSCDR3_CSI_PODF(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)
 /*! @} */
 
 /*! @name CDHIPR - CCM Divider Handshake In-Process Register */
 /*! @{ */
-#define CCM_CDHIPR_SEMC_PODF_BUSY_MASK           (0x1U)
-#define CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT          (0U)
-#define CCM_CDHIPR_SEMC_PODF_BUSY(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)
-#define CCM_CDHIPR_AHB_PODF_BUSY_MASK            (0x2U)
-#define CCM_CDHIPR_AHB_PODF_BUSY_SHIFT           (1U)
-#define CCM_CDHIPR_AHB_PODF_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK     (0x8U)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT    (3U)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK      (0x20U)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT     (5U)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)
-#define CCM_CDHIPR_ARM_PODF_BUSY_MASK            (0x10000U)
-#define CCM_CDHIPR_ARM_PODF_BUSY_SHIFT           (16U)
-#define CCM_CDHIPR_ARM_PODF_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)
+#define CCM_CDHIPR_SEMC_PODF_BUSY_MASK  (0x1U)
+#define CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT (0U)
+#define CCM_CDHIPR_SEMC_PODF_BUSY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)
+#define CCM_CDHIPR_AHB_PODF_BUSY_MASK  (0x2U)
+#define CCM_CDHIPR_AHB_PODF_BUSY_SHIFT (1U)
+#define CCM_CDHIPR_AHB_PODF_BUSY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK  (0x8U)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT (3U)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK  (0x20U)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT (5U)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)
+#define CCM_CDHIPR_ARM_PODF_BUSY_MASK  (0x10000U)
+#define CCM_CDHIPR_ARM_PODF_BUSY_SHIFT (16U)
+#define CCM_CDHIPR_ARM_PODF_BUSY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)
 /*! @} */
 
 /*! @name CLPCR - CCM Low Power Control Register */
 /*! @{ */
-#define CCM_CLPCR_LPM_MASK                       (0x3U)
-#define CCM_CLPCR_LPM_SHIFT                      (0U)
-#define CCM_CLPCR_LPM(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK        (0x20U)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT       (5U)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)
-#define CCM_CLPCR_SBYOS_MASK                     (0x40U)
-#define CCM_CLPCR_SBYOS_SHIFT                    (6U)
-#define CCM_CLPCR_SBYOS(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)
-#define CCM_CLPCR_DIS_REF_OSC_MASK               (0x80U)
-#define CCM_CLPCR_DIS_REF_OSC_SHIFT              (7U)
-#define CCM_CLPCR_DIS_REF_OSC(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)
-#define CCM_CLPCR_VSTBY_MASK                     (0x100U)
-#define CCM_CLPCR_VSTBY_SHIFT                    (8U)
-#define CCM_CLPCR_VSTBY(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)
-#define CCM_CLPCR_STBY_COUNT_MASK                (0x600U)
-#define CCM_CLPCR_STBY_COUNT_SHIFT               (9U)
-#define CCM_CLPCR_STBY_COUNT(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)
-#define CCM_CLPCR_COSC_PWRDOWN_MASK              (0x800U)
-#define CCM_CLPCR_COSC_PWRDOWN_SHIFT             (11U)
-#define CCM_CLPCR_COSC_PWRDOWN(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)
-#define CCM_CLPCR_BYPASS_LPM_HS1_MASK            (0x80000U)
-#define CCM_CLPCR_BYPASS_LPM_HS1_SHIFT           (19U)
-#define CCM_CLPCR_BYPASS_LPM_HS1(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS1_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS1_MASK)
-#define CCM_CLPCR_BYPASS_LPM_HS0_MASK            (0x200000U)
-#define CCM_CLPCR_BYPASS_LPM_HS0_SHIFT           (21U)
-#define CCM_CLPCR_BYPASS_LPM_HS0(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS0_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS0_MASK)
-#define CCM_CLPCR_MASK_CORE0_WFI_MASK            (0x400000U)
-#define CCM_CLPCR_MASK_CORE0_WFI_SHIFT           (22U)
-#define CCM_CLPCR_MASK_CORE0_WFI(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)
-#define CCM_CLPCR_MASK_SCU_IDLE_MASK             (0x4000000U)
-#define CCM_CLPCR_MASK_SCU_IDLE_SHIFT            (26U)
-#define CCM_CLPCR_MASK_SCU_IDLE(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)
-#define CCM_CLPCR_MASK_L2CC_IDLE_MASK            (0x8000000U)
-#define CCM_CLPCR_MASK_L2CC_IDLE_SHIFT           (27U)
-#define CCM_CLPCR_MASK_L2CC_IDLE(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)
+#define CCM_CLPCR_LPM_MASK                 (0x3U)
+#define CCM_CLPCR_LPM_SHIFT                (0U)
+#define CCM_CLPCR_LPM(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK  (0x20U)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT (5U)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)
+#define CCM_CLPCR_SBYOS_MASK        (0x40U)
+#define CCM_CLPCR_SBYOS_SHIFT       (6U)
+#define CCM_CLPCR_SBYOS(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)
+#define CCM_CLPCR_DIS_REF_OSC_MASK  (0x80U)
+#define CCM_CLPCR_DIS_REF_OSC_SHIFT (7U)
+#define CCM_CLPCR_DIS_REF_OSC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)
+#define CCM_CLPCR_VSTBY_MASK       (0x100U)
+#define CCM_CLPCR_VSTBY_SHIFT      (8U)
+#define CCM_CLPCR_VSTBY(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)
+#define CCM_CLPCR_STBY_COUNT_MASK  (0x600U)
+#define CCM_CLPCR_STBY_COUNT_SHIFT (9U)
+#define CCM_CLPCR_STBY_COUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)
+#define CCM_CLPCR_COSC_PWRDOWN_MASK  (0x800U)
+#define CCM_CLPCR_COSC_PWRDOWN_SHIFT (11U)
+#define CCM_CLPCR_COSC_PWRDOWN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)
+#define CCM_CLPCR_BYPASS_LPM_HS1_MASK  (0x80000U)
+#define CCM_CLPCR_BYPASS_LPM_HS1_SHIFT (19U)
+#define CCM_CLPCR_BYPASS_LPM_HS1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS1_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS1_MASK)
+#define CCM_CLPCR_BYPASS_LPM_HS0_MASK  (0x200000U)
+#define CCM_CLPCR_BYPASS_LPM_HS0_SHIFT (21U)
+#define CCM_CLPCR_BYPASS_LPM_HS0(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS0_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS0_MASK)
+#define CCM_CLPCR_MASK_CORE0_WFI_MASK  (0x400000U)
+#define CCM_CLPCR_MASK_CORE0_WFI_SHIFT (22U)
+#define CCM_CLPCR_MASK_CORE0_WFI(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)
+#define CCM_CLPCR_MASK_SCU_IDLE_MASK  (0x4000000U)
+#define CCM_CLPCR_MASK_SCU_IDLE_SHIFT (26U)
+#define CCM_CLPCR_MASK_SCU_IDLE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)
+#define CCM_CLPCR_MASK_L2CC_IDLE_MASK  (0x8000000U)
+#define CCM_CLPCR_MASK_L2CC_IDLE_SHIFT (27U)
+#define CCM_CLPCR_MASK_L2CC_IDLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)
 /*! @} */
 
 /*! @name CISR - CCM Interrupt Status Register */
 /*! @{ */
-#define CCM_CISR_LRF_PLL_MASK                    (0x1U)
-#define CCM_CISR_LRF_PLL_SHIFT                   (0U)
-#define CCM_CISR_LRF_PLL(x)                      (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)
-#define CCM_CISR_COSC_READY_MASK                 (0x40U)
-#define CCM_CISR_COSC_READY_SHIFT                (6U)
-#define CCM_CISR_COSC_READY(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)
-#define CCM_CISR_SEMC_PODF_LOADED_MASK           (0x20000U)
-#define CCM_CISR_SEMC_PODF_LOADED_SHIFT          (17U)
-#define CCM_CISR_SEMC_PODF_LOADED(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK     (0x80000U)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT    (19U)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)
-#define CCM_CISR_AHB_PODF_LOADED_MASK            (0x100000U)
-#define CCM_CISR_AHB_PODF_LOADED_SHIFT           (20U)
-#define CCM_CISR_AHB_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK      (0x400000U)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT     (22U)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)
-#define CCM_CISR_ARM_PODF_LOADED_MASK            (0x4000000U)
-#define CCM_CISR_ARM_PODF_LOADED_SHIFT           (26U)
-#define CCM_CISR_ARM_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)
+#define CCM_CISR_LRF_PLL_MASK           (0x1U)
+#define CCM_CISR_LRF_PLL_SHIFT          (0U)
+#define CCM_CISR_LRF_PLL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)
+#define CCM_CISR_COSC_READY_MASK        (0x40U)
+#define CCM_CISR_COSC_READY_SHIFT       (6U)
+#define CCM_CISR_COSC_READY(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)
+#define CCM_CISR_SEMC_PODF_LOADED_MASK  (0x20000U)
+#define CCM_CISR_SEMC_PODF_LOADED_SHIFT (17U)
+#define CCM_CISR_SEMC_PODF_LOADED(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK  (0x80000U)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)
+#define CCM_CISR_AHB_PODF_LOADED_MASK  (0x100000U)
+#define CCM_CISR_AHB_PODF_LOADED_SHIFT (20U)
+#define CCM_CISR_AHB_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK  (0x400000U)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT (22U)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)
+#define CCM_CISR_ARM_PODF_LOADED_MASK  (0x4000000U)
+#define CCM_CISR_ARM_PODF_LOADED_SHIFT (26U)
+#define CCM_CISR_ARM_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)
 /*! @} */
 
 /*! @name CIMR - CCM Interrupt Mask Register */
 /*! @{ */
-#define CCM_CIMR_MASK_LRF_PLL_MASK               (0x1U)
-#define CCM_CIMR_MASK_LRF_PLL_SHIFT              (0U)
-#define CCM_CIMR_MASK_LRF_PLL(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)
-#define CCM_CIMR_MASK_COSC_READY_MASK            (0x40U)
-#define CCM_CIMR_MASK_COSC_READY_SHIFT           (6U)
-#define CCM_CIMR_MASK_COSC_READY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK      (0x20000U)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT     (17U)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)
-#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK (0x80000U)
+#define CCM_CIMR_MASK_LRF_PLL_MASK  (0x1U)
+#define CCM_CIMR_MASK_LRF_PLL_SHIFT (0U)
+#define CCM_CIMR_MASK_LRF_PLL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)
+#define CCM_CIMR_MASK_COSC_READY_MASK  (0x40U)
+#define CCM_CIMR_MASK_COSC_READY_SHIFT (6U)
+#define CCM_CIMR_MASK_COSC_READY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK  (0x20000U)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT (17U)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK  (0x80000U)
 #define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)
-#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED(x)  (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED_MASK       (0x100000U)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT      (20U)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)
-#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK (0x400000U)
+#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) &                                     \
+     CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED_MASK  (0x100000U)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT (20U)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK  (0x400000U)
 #define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT (22U)
-#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED(x)   (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)
-#define CCM_CIMR_ARM_PODF_LOADED_MASK            (0x4000000U)
-#define CCM_CIMR_ARM_PODF_LOADED_SHIFT           (26U)
-#define CCM_CIMR_ARM_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) &                                      \
+     CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)
+#define CCM_CIMR_ARM_PODF_LOADED_MASK  (0x4000000U)
+#define CCM_CIMR_ARM_PODF_LOADED_SHIFT (26U)
+#define CCM_CIMR_ARM_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)
 /*! @} */
 
 /*! @name CCOSR - CCM Clock Output Source Register */
 /*! @{ */
-#define CCM_CCOSR_CLKO1_SEL_MASK                 (0xFU)
-#define CCM_CCOSR_CLKO1_SEL_SHIFT                (0U)
-#define CCM_CCOSR_CLKO1_SEL(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)
-#define CCM_CCOSR_CLKO1_DIV_MASK                 (0x70U)
-#define CCM_CCOSR_CLKO1_DIV_SHIFT                (4U)
-#define CCM_CCOSR_CLKO1_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)
-#define CCM_CCOSR_CLKO1_EN_MASK                  (0x80U)
-#define CCM_CCOSR_CLKO1_EN_SHIFT                 (7U)
-#define CCM_CCOSR_CLKO1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
-#define CCM_CCOSR_CLK_OUT_SEL_MASK               (0x100U)
-#define CCM_CCOSR_CLK_OUT_SEL_SHIFT              (8U)
-#define CCM_CCOSR_CLK_OUT_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)
-#define CCM_CCOSR_CLKO2_SEL_MASK                 (0x1F0000U)
-#define CCM_CCOSR_CLKO2_SEL_SHIFT                (16U)
-#define CCM_CCOSR_CLKO2_SEL(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)
-#define CCM_CCOSR_CLKO2_DIV_MASK                 (0xE00000U)
-#define CCM_CCOSR_CLKO2_DIV_SHIFT                (21U)
-#define CCM_CCOSR_CLKO2_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
-#define CCM_CCOSR_CLKO2_EN_MASK                  (0x1000000U)
-#define CCM_CCOSR_CLKO2_EN_SHIFT                 (24U)
-#define CCM_CCOSR_CLKO2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)
+#define CCM_CCOSR_CLKO1_SEL_MASK    (0xFU)
+#define CCM_CCOSR_CLKO1_SEL_SHIFT   (0U)
+#define CCM_CCOSR_CLKO1_SEL(x)      (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)
+#define CCM_CCOSR_CLKO1_DIV_MASK    (0x70U)
+#define CCM_CCOSR_CLKO1_DIV_SHIFT   (4U)
+#define CCM_CCOSR_CLKO1_DIV(x)      (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)
+#define CCM_CCOSR_CLKO1_EN_MASK     (0x80U)
+#define CCM_CCOSR_CLKO1_EN_SHIFT    (7U)
+#define CCM_CCOSR_CLKO1_EN(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
+#define CCM_CCOSR_CLK_OUT_SEL_MASK  (0x100U)
+#define CCM_CCOSR_CLK_OUT_SEL_SHIFT (8U)
+#define CCM_CCOSR_CLK_OUT_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)
+#define CCM_CCOSR_CLKO2_SEL_MASK  (0x1F0000U)
+#define CCM_CCOSR_CLKO2_SEL_SHIFT (16U)
+#define CCM_CCOSR_CLKO2_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)
+#define CCM_CCOSR_CLKO2_DIV_MASK  (0xE00000U)
+#define CCM_CCOSR_CLKO2_DIV_SHIFT (21U)
+#define CCM_CCOSR_CLKO2_DIV(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
+#define CCM_CCOSR_CLKO2_EN_MASK   (0x1000000U)
+#define CCM_CCOSR_CLKO2_EN_SHIFT  (24U)
+#define CCM_CCOSR_CLKO2_EN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)
 /*! @} */
 
 /*! @name CGPR - CCM General Purpose Register */
 /*! @{ */
-#define CCM_CGPR_PMIC_DELAY_SCALER_MASK          (0x1U)
-#define CCM_CGPR_PMIC_DELAY_SCALER_SHIFT         (0U)
-#define CCM_CGPR_PMIC_DELAY_SCALER(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK     (0x10U)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT    (4U)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)
-#define CCM_CGPR_SYS_MEM_DS_CTRL_MASK            (0xC000U)
-#define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT           (14U)
-#define CCM_CGPR_SYS_MEM_DS_CTRL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)
-#define CCM_CGPR_FPL_MASK                        (0x10000U)
-#define CCM_CGPR_FPL_SHIFT                       (16U)
-#define CCM_CGPR_FPL(x)                          (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)
-#define CCM_CGPR_INT_MEM_CLK_LPM_MASK            (0x20000U)
-#define CCM_CGPR_INT_MEM_CLK_LPM_SHIFT           (17U)
-#define CCM_CGPR_INT_MEM_CLK_LPM(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)
+#define CCM_CGPR_PMIC_DELAY_SCALER_MASK  (0x1U)
+#define CCM_CGPR_PMIC_DELAY_SCALER_SHIFT (0U)
+#define CCM_CGPR_PMIC_DELAY_SCALER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK  (0x10U)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT (4U)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)
+#define CCM_CGPR_SYS_MEM_DS_CTRL_MASK  (0xC000U)
+#define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14U)
+#define CCM_CGPR_SYS_MEM_DS_CTRL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)
+#define CCM_CGPR_FPL_MASK              (0x10000U)
+#define CCM_CGPR_FPL_SHIFT             (16U)
+#define CCM_CGPR_FPL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)
+#define CCM_CGPR_INT_MEM_CLK_LPM_MASK  (0x20000U)
+#define CCM_CGPR_INT_MEM_CLK_LPM_SHIFT (17U)
+#define CCM_CGPR_INT_MEM_CLK_LPM(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)
 /*! @} */
 
 /*! @name CCGR0 - CCM Clock Gating Register 0 */
 /*! @{ */
-#define CCM_CCGR0_CG0_MASK                       (0x3U)
-#define CCM_CCGR0_CG0_SHIFT                      (0U)
-#define CCM_CCGR0_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG0_SHIFT)) & CCM_CCGR0_CG0_MASK)
-#define CCM_CCGR0_CG1_MASK                       (0xCU)
-#define CCM_CCGR0_CG1_SHIFT                      (2U)
-#define CCM_CCGR0_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG1_SHIFT)) & CCM_CCGR0_CG1_MASK)
-#define CCM_CCGR0_CG2_MASK                       (0x30U)
-#define CCM_CCGR0_CG2_SHIFT                      (4U)
-#define CCM_CCGR0_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG2_SHIFT)) & CCM_CCGR0_CG2_MASK)
-#define CCM_CCGR0_CG3_MASK                       (0xC0U)
-#define CCM_CCGR0_CG3_SHIFT                      (6U)
-#define CCM_CCGR0_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG3_SHIFT)) & CCM_CCGR0_CG3_MASK)
-#define CCM_CCGR0_CG4_MASK                       (0x300U)
-#define CCM_CCGR0_CG4_SHIFT                      (8U)
-#define CCM_CCGR0_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG4_SHIFT)) & CCM_CCGR0_CG4_MASK)
-#define CCM_CCGR0_CG5_MASK                       (0xC00U)
-#define CCM_CCGR0_CG5_SHIFT                      (10U)
-#define CCM_CCGR0_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG5_SHIFT)) & CCM_CCGR0_CG5_MASK)
-#define CCM_CCGR0_CG6_MASK                       (0x3000U)
-#define CCM_CCGR0_CG6_SHIFT                      (12U)
-#define CCM_CCGR0_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG6_SHIFT)) & CCM_CCGR0_CG6_MASK)
-#define CCM_CCGR0_CG7_MASK                       (0xC000U)
-#define CCM_CCGR0_CG7_SHIFT                      (14U)
-#define CCM_CCGR0_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG7_SHIFT)) & CCM_CCGR0_CG7_MASK)
-#define CCM_CCGR0_CG8_MASK                       (0x30000U)
-#define CCM_CCGR0_CG8_SHIFT                      (16U)
-#define CCM_CCGR0_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG8_SHIFT)) & CCM_CCGR0_CG8_MASK)
-#define CCM_CCGR0_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR0_CG9_SHIFT                      (18U)
-#define CCM_CCGR0_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG9_SHIFT)) & CCM_CCGR0_CG9_MASK)
-#define CCM_CCGR0_CG10_MASK                      (0x300000U)
-#define CCM_CCGR0_CG10_SHIFT                     (20U)
-#define CCM_CCGR0_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG10_SHIFT)) & CCM_CCGR0_CG10_MASK)
-#define CCM_CCGR0_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR0_CG11_SHIFT                     (22U)
-#define CCM_CCGR0_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG11_SHIFT)) & CCM_CCGR0_CG11_MASK)
-#define CCM_CCGR0_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR0_CG12_SHIFT                     (24U)
-#define CCM_CCGR0_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG12_SHIFT)) & CCM_CCGR0_CG12_MASK)
-#define CCM_CCGR0_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR0_CG13_SHIFT                     (26U)
-#define CCM_CCGR0_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG13_SHIFT)) & CCM_CCGR0_CG13_MASK)
-#define CCM_CCGR0_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR0_CG14_SHIFT                     (28U)
-#define CCM_CCGR0_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG14_SHIFT)) & CCM_CCGR0_CG14_MASK)
-#define CCM_CCGR0_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR0_CG15_SHIFT                     (30U)
-#define CCM_CCGR0_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG15_SHIFT)) & CCM_CCGR0_CG15_MASK)
+#define CCM_CCGR0_CG0_MASK   (0x3U)
+#define CCM_CCGR0_CG0_SHIFT  (0U)
+#define CCM_CCGR0_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG0_SHIFT)) & CCM_CCGR0_CG0_MASK)
+#define CCM_CCGR0_CG1_MASK   (0xCU)
+#define CCM_CCGR0_CG1_SHIFT  (2U)
+#define CCM_CCGR0_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG1_SHIFT)) & CCM_CCGR0_CG1_MASK)
+#define CCM_CCGR0_CG2_MASK   (0x30U)
+#define CCM_CCGR0_CG2_SHIFT  (4U)
+#define CCM_CCGR0_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG2_SHIFT)) & CCM_CCGR0_CG2_MASK)
+#define CCM_CCGR0_CG3_MASK   (0xC0U)
+#define CCM_CCGR0_CG3_SHIFT  (6U)
+#define CCM_CCGR0_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG3_SHIFT)) & CCM_CCGR0_CG3_MASK)
+#define CCM_CCGR0_CG4_MASK   (0x300U)
+#define CCM_CCGR0_CG4_SHIFT  (8U)
+#define CCM_CCGR0_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG4_SHIFT)) & CCM_CCGR0_CG4_MASK)
+#define CCM_CCGR0_CG5_MASK   (0xC00U)
+#define CCM_CCGR0_CG5_SHIFT  (10U)
+#define CCM_CCGR0_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG5_SHIFT)) & CCM_CCGR0_CG5_MASK)
+#define CCM_CCGR0_CG6_MASK   (0x3000U)
+#define CCM_CCGR0_CG6_SHIFT  (12U)
+#define CCM_CCGR0_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG6_SHIFT)) & CCM_CCGR0_CG6_MASK)
+#define CCM_CCGR0_CG7_MASK   (0xC000U)
+#define CCM_CCGR0_CG7_SHIFT  (14U)
+#define CCM_CCGR0_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG7_SHIFT)) & CCM_CCGR0_CG7_MASK)
+#define CCM_CCGR0_CG8_MASK   (0x30000U)
+#define CCM_CCGR0_CG8_SHIFT  (16U)
+#define CCM_CCGR0_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG8_SHIFT)) & CCM_CCGR0_CG8_MASK)
+#define CCM_CCGR0_CG9_MASK   (0xC0000U)
+#define CCM_CCGR0_CG9_SHIFT  (18U)
+#define CCM_CCGR0_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG9_SHIFT)) & CCM_CCGR0_CG9_MASK)
+#define CCM_CCGR0_CG10_MASK  (0x300000U)
+#define CCM_CCGR0_CG10_SHIFT (20U)
+#define CCM_CCGR0_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG10_SHIFT)) & CCM_CCGR0_CG10_MASK)
+#define CCM_CCGR0_CG11_MASK  (0xC00000U)
+#define CCM_CCGR0_CG11_SHIFT (22U)
+#define CCM_CCGR0_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG11_SHIFT)) & CCM_CCGR0_CG11_MASK)
+#define CCM_CCGR0_CG12_MASK  (0x3000000U)
+#define CCM_CCGR0_CG12_SHIFT (24U)
+#define CCM_CCGR0_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG12_SHIFT)) & CCM_CCGR0_CG12_MASK)
+#define CCM_CCGR0_CG13_MASK  (0xC000000U)
+#define CCM_CCGR0_CG13_SHIFT (26U)
+#define CCM_CCGR0_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG13_SHIFT)) & CCM_CCGR0_CG13_MASK)
+#define CCM_CCGR0_CG14_MASK  (0x30000000U)
+#define CCM_CCGR0_CG14_SHIFT (28U)
+#define CCM_CCGR0_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG14_SHIFT)) & CCM_CCGR0_CG14_MASK)
+#define CCM_CCGR0_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR0_CG15_SHIFT (30U)
+#define CCM_CCGR0_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG15_SHIFT)) & CCM_CCGR0_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR1 - CCM Clock Gating Register 1 */
 /*! @{ */
-#define CCM_CCGR1_CG0_MASK                       (0x3U)
-#define CCM_CCGR1_CG0_SHIFT                      (0U)
-#define CCM_CCGR1_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG0_SHIFT)) & CCM_CCGR1_CG0_MASK)
-#define CCM_CCGR1_CG1_MASK                       (0xCU)
-#define CCM_CCGR1_CG1_SHIFT                      (2U)
-#define CCM_CCGR1_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG1_SHIFT)) & CCM_CCGR1_CG1_MASK)
-#define CCM_CCGR1_CG2_MASK                       (0x30U)
-#define CCM_CCGR1_CG2_SHIFT                      (4U)
-#define CCM_CCGR1_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG2_SHIFT)) & CCM_CCGR1_CG2_MASK)
-#define CCM_CCGR1_CG3_MASK                       (0xC0U)
-#define CCM_CCGR1_CG3_SHIFT                      (6U)
-#define CCM_CCGR1_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG3_SHIFT)) & CCM_CCGR1_CG3_MASK)
-#define CCM_CCGR1_CG4_MASK                       (0x300U)
-#define CCM_CCGR1_CG4_SHIFT                      (8U)
-#define CCM_CCGR1_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG4_SHIFT)) & CCM_CCGR1_CG4_MASK)
-#define CCM_CCGR1_CG5_MASK                       (0xC00U)
-#define CCM_CCGR1_CG5_SHIFT                      (10U)
-#define CCM_CCGR1_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG5_SHIFT)) & CCM_CCGR1_CG5_MASK)
-#define CCM_CCGR1_CG6_MASK                       (0x3000U)
-#define CCM_CCGR1_CG6_SHIFT                      (12U)
-#define CCM_CCGR1_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG6_SHIFT)) & CCM_CCGR1_CG6_MASK)
-#define CCM_CCGR1_CG7_MASK                       (0xC000U)
-#define CCM_CCGR1_CG7_SHIFT                      (14U)
-#define CCM_CCGR1_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG7_SHIFT)) & CCM_CCGR1_CG7_MASK)
-#define CCM_CCGR1_CG8_MASK                       (0x30000U)
-#define CCM_CCGR1_CG8_SHIFT                      (16U)
-#define CCM_CCGR1_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG8_SHIFT)) & CCM_CCGR1_CG8_MASK)
-#define CCM_CCGR1_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR1_CG9_SHIFT                      (18U)
-#define CCM_CCGR1_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG9_SHIFT)) & CCM_CCGR1_CG9_MASK)
-#define CCM_CCGR1_CG10_MASK                      (0x300000U)
-#define CCM_CCGR1_CG10_SHIFT                     (20U)
-#define CCM_CCGR1_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG10_SHIFT)) & CCM_CCGR1_CG10_MASK)
-#define CCM_CCGR1_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR1_CG11_SHIFT                     (22U)
-#define CCM_CCGR1_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG11_SHIFT)) & CCM_CCGR1_CG11_MASK)
-#define CCM_CCGR1_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR1_CG12_SHIFT                     (24U)
-#define CCM_CCGR1_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG12_SHIFT)) & CCM_CCGR1_CG12_MASK)
-#define CCM_CCGR1_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR1_CG13_SHIFT                     (26U)
-#define CCM_CCGR1_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG13_SHIFT)) & CCM_CCGR1_CG13_MASK)
-#define CCM_CCGR1_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR1_CG14_SHIFT                     (28U)
-#define CCM_CCGR1_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG14_SHIFT)) & CCM_CCGR1_CG14_MASK)
-#define CCM_CCGR1_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR1_CG15_SHIFT                     (30U)
-#define CCM_CCGR1_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG15_SHIFT)) & CCM_CCGR1_CG15_MASK)
+#define CCM_CCGR1_CG0_MASK   (0x3U)
+#define CCM_CCGR1_CG0_SHIFT  (0U)
+#define CCM_CCGR1_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG0_SHIFT)) & CCM_CCGR1_CG0_MASK)
+#define CCM_CCGR1_CG1_MASK   (0xCU)
+#define CCM_CCGR1_CG1_SHIFT  (2U)
+#define CCM_CCGR1_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG1_SHIFT)) & CCM_CCGR1_CG1_MASK)
+#define CCM_CCGR1_CG2_MASK   (0x30U)
+#define CCM_CCGR1_CG2_SHIFT  (4U)
+#define CCM_CCGR1_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG2_SHIFT)) & CCM_CCGR1_CG2_MASK)
+#define CCM_CCGR1_CG3_MASK   (0xC0U)
+#define CCM_CCGR1_CG3_SHIFT  (6U)
+#define CCM_CCGR1_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG3_SHIFT)) & CCM_CCGR1_CG3_MASK)
+#define CCM_CCGR1_CG4_MASK   (0x300U)
+#define CCM_CCGR1_CG4_SHIFT  (8U)
+#define CCM_CCGR1_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG4_SHIFT)) & CCM_CCGR1_CG4_MASK)
+#define CCM_CCGR1_CG5_MASK   (0xC00U)
+#define CCM_CCGR1_CG5_SHIFT  (10U)
+#define CCM_CCGR1_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG5_SHIFT)) & CCM_CCGR1_CG5_MASK)
+#define CCM_CCGR1_CG6_MASK   (0x3000U)
+#define CCM_CCGR1_CG6_SHIFT  (12U)
+#define CCM_CCGR1_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG6_SHIFT)) & CCM_CCGR1_CG6_MASK)
+#define CCM_CCGR1_CG7_MASK   (0xC000U)
+#define CCM_CCGR1_CG7_SHIFT  (14U)
+#define CCM_CCGR1_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG7_SHIFT)) & CCM_CCGR1_CG7_MASK)
+#define CCM_CCGR1_CG8_MASK   (0x30000U)
+#define CCM_CCGR1_CG8_SHIFT  (16U)
+#define CCM_CCGR1_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG8_SHIFT)) & CCM_CCGR1_CG8_MASK)
+#define CCM_CCGR1_CG9_MASK   (0xC0000U)
+#define CCM_CCGR1_CG9_SHIFT  (18U)
+#define CCM_CCGR1_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG9_SHIFT)) & CCM_CCGR1_CG9_MASK)
+#define CCM_CCGR1_CG10_MASK  (0x300000U)
+#define CCM_CCGR1_CG10_SHIFT (20U)
+#define CCM_CCGR1_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG10_SHIFT)) & CCM_CCGR1_CG10_MASK)
+#define CCM_CCGR1_CG11_MASK  (0xC00000U)
+#define CCM_CCGR1_CG11_SHIFT (22U)
+#define CCM_CCGR1_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG11_SHIFT)) & CCM_CCGR1_CG11_MASK)
+#define CCM_CCGR1_CG12_MASK  (0x3000000U)
+#define CCM_CCGR1_CG12_SHIFT (24U)
+#define CCM_CCGR1_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG12_SHIFT)) & CCM_CCGR1_CG12_MASK)
+#define CCM_CCGR1_CG13_MASK  (0xC000000U)
+#define CCM_CCGR1_CG13_SHIFT (26U)
+#define CCM_CCGR1_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG13_SHIFT)) & CCM_CCGR1_CG13_MASK)
+#define CCM_CCGR1_CG14_MASK  (0x30000000U)
+#define CCM_CCGR1_CG14_SHIFT (28U)
+#define CCM_CCGR1_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG14_SHIFT)) & CCM_CCGR1_CG14_MASK)
+#define CCM_CCGR1_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR1_CG15_SHIFT (30U)
+#define CCM_CCGR1_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG15_SHIFT)) & CCM_CCGR1_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR2 - CCM Clock Gating Register 2 */
 /*! @{ */
-#define CCM_CCGR2_CG0_MASK                       (0x3U)
-#define CCM_CCGR2_CG0_SHIFT                      (0U)
-#define CCM_CCGR2_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG0_SHIFT)) & CCM_CCGR2_CG0_MASK)
-#define CCM_CCGR2_CG1_MASK                       (0xCU)
-#define CCM_CCGR2_CG1_SHIFT                      (2U)
-#define CCM_CCGR2_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG1_SHIFT)) & CCM_CCGR2_CG1_MASK)
-#define CCM_CCGR2_CG2_MASK                       (0x30U)
-#define CCM_CCGR2_CG2_SHIFT                      (4U)
-#define CCM_CCGR2_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG2_SHIFT)) & CCM_CCGR2_CG2_MASK)
-#define CCM_CCGR2_CG3_MASK                       (0xC0U)
-#define CCM_CCGR2_CG3_SHIFT                      (6U)
-#define CCM_CCGR2_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG3_SHIFT)) & CCM_CCGR2_CG3_MASK)
-#define CCM_CCGR2_CG4_MASK                       (0x300U)
-#define CCM_CCGR2_CG4_SHIFT                      (8U)
-#define CCM_CCGR2_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG4_SHIFT)) & CCM_CCGR2_CG4_MASK)
-#define CCM_CCGR2_CG5_MASK                       (0xC00U)
-#define CCM_CCGR2_CG5_SHIFT                      (10U)
-#define CCM_CCGR2_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG5_SHIFT)) & CCM_CCGR2_CG5_MASK)
-#define CCM_CCGR2_CG6_MASK                       (0x3000U)
-#define CCM_CCGR2_CG6_SHIFT                      (12U)
-#define CCM_CCGR2_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG6_SHIFT)) & CCM_CCGR2_CG6_MASK)
-#define CCM_CCGR2_CG7_MASK                       (0xC000U)
-#define CCM_CCGR2_CG7_SHIFT                      (14U)
-#define CCM_CCGR2_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG7_SHIFT)) & CCM_CCGR2_CG7_MASK)
-#define CCM_CCGR2_CG8_MASK                       (0x30000U)
-#define CCM_CCGR2_CG8_SHIFT                      (16U)
-#define CCM_CCGR2_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG8_SHIFT)) & CCM_CCGR2_CG8_MASK)
-#define CCM_CCGR2_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR2_CG9_SHIFT                      (18U)
-#define CCM_CCGR2_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG9_SHIFT)) & CCM_CCGR2_CG9_MASK)
-#define CCM_CCGR2_CG10_MASK                      (0x300000U)
-#define CCM_CCGR2_CG10_SHIFT                     (20U)
-#define CCM_CCGR2_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG10_SHIFT)) & CCM_CCGR2_CG10_MASK)
-#define CCM_CCGR2_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR2_CG11_SHIFT                     (22U)
-#define CCM_CCGR2_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG11_SHIFT)) & CCM_CCGR2_CG11_MASK)
-#define CCM_CCGR2_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR2_CG12_SHIFT                     (24U)
-#define CCM_CCGR2_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG12_SHIFT)) & CCM_CCGR2_CG12_MASK)
-#define CCM_CCGR2_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR2_CG13_SHIFT                     (26U)
-#define CCM_CCGR2_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG13_SHIFT)) & CCM_CCGR2_CG13_MASK)
-#define CCM_CCGR2_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR2_CG14_SHIFT                     (28U)
-#define CCM_CCGR2_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG14_SHIFT)) & CCM_CCGR2_CG14_MASK)
-#define CCM_CCGR2_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR2_CG15_SHIFT                     (30U)
-#define CCM_CCGR2_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG15_SHIFT)) & CCM_CCGR2_CG15_MASK)
+#define CCM_CCGR2_CG0_MASK   (0x3U)
+#define CCM_CCGR2_CG0_SHIFT  (0U)
+#define CCM_CCGR2_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG0_SHIFT)) & CCM_CCGR2_CG0_MASK)
+#define CCM_CCGR2_CG1_MASK   (0xCU)
+#define CCM_CCGR2_CG1_SHIFT  (2U)
+#define CCM_CCGR2_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG1_SHIFT)) & CCM_CCGR2_CG1_MASK)
+#define CCM_CCGR2_CG2_MASK   (0x30U)
+#define CCM_CCGR2_CG2_SHIFT  (4U)
+#define CCM_CCGR2_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG2_SHIFT)) & CCM_CCGR2_CG2_MASK)
+#define CCM_CCGR2_CG3_MASK   (0xC0U)
+#define CCM_CCGR2_CG3_SHIFT  (6U)
+#define CCM_CCGR2_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG3_SHIFT)) & CCM_CCGR2_CG3_MASK)
+#define CCM_CCGR2_CG4_MASK   (0x300U)
+#define CCM_CCGR2_CG4_SHIFT  (8U)
+#define CCM_CCGR2_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG4_SHIFT)) & CCM_CCGR2_CG4_MASK)
+#define CCM_CCGR2_CG5_MASK   (0xC00U)
+#define CCM_CCGR2_CG5_SHIFT  (10U)
+#define CCM_CCGR2_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG5_SHIFT)) & CCM_CCGR2_CG5_MASK)
+#define CCM_CCGR2_CG6_MASK   (0x3000U)
+#define CCM_CCGR2_CG6_SHIFT  (12U)
+#define CCM_CCGR2_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG6_SHIFT)) & CCM_CCGR2_CG6_MASK)
+#define CCM_CCGR2_CG7_MASK   (0xC000U)
+#define CCM_CCGR2_CG7_SHIFT  (14U)
+#define CCM_CCGR2_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG7_SHIFT)) & CCM_CCGR2_CG7_MASK)
+#define CCM_CCGR2_CG8_MASK   (0x30000U)
+#define CCM_CCGR2_CG8_SHIFT  (16U)
+#define CCM_CCGR2_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG8_SHIFT)) & CCM_CCGR2_CG8_MASK)
+#define CCM_CCGR2_CG9_MASK   (0xC0000U)
+#define CCM_CCGR2_CG9_SHIFT  (18U)
+#define CCM_CCGR2_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG9_SHIFT)) & CCM_CCGR2_CG9_MASK)
+#define CCM_CCGR2_CG10_MASK  (0x300000U)
+#define CCM_CCGR2_CG10_SHIFT (20U)
+#define CCM_CCGR2_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG10_SHIFT)) & CCM_CCGR2_CG10_MASK)
+#define CCM_CCGR2_CG11_MASK  (0xC00000U)
+#define CCM_CCGR2_CG11_SHIFT (22U)
+#define CCM_CCGR2_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG11_SHIFT)) & CCM_CCGR2_CG11_MASK)
+#define CCM_CCGR2_CG12_MASK  (0x3000000U)
+#define CCM_CCGR2_CG12_SHIFT (24U)
+#define CCM_CCGR2_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG12_SHIFT)) & CCM_CCGR2_CG12_MASK)
+#define CCM_CCGR2_CG13_MASK  (0xC000000U)
+#define CCM_CCGR2_CG13_SHIFT (26U)
+#define CCM_CCGR2_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG13_SHIFT)) & CCM_CCGR2_CG13_MASK)
+#define CCM_CCGR2_CG14_MASK  (0x30000000U)
+#define CCM_CCGR2_CG14_SHIFT (28U)
+#define CCM_CCGR2_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG14_SHIFT)) & CCM_CCGR2_CG14_MASK)
+#define CCM_CCGR2_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR2_CG15_SHIFT (30U)
+#define CCM_CCGR2_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG15_SHIFT)) & CCM_CCGR2_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR3 - CCM Clock Gating Register 3 */
 /*! @{ */
-#define CCM_CCGR3_CG0_MASK                       (0x3U)
-#define CCM_CCGR3_CG0_SHIFT                      (0U)
-#define CCM_CCGR3_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG0_SHIFT)) & CCM_CCGR3_CG0_MASK)
-#define CCM_CCGR3_CG1_MASK                       (0xCU)
-#define CCM_CCGR3_CG1_SHIFT                      (2U)
-#define CCM_CCGR3_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG1_SHIFT)) & CCM_CCGR3_CG1_MASK)
-#define CCM_CCGR3_CG2_MASK                       (0x30U)
-#define CCM_CCGR3_CG2_SHIFT                      (4U)
-#define CCM_CCGR3_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG2_SHIFT)) & CCM_CCGR3_CG2_MASK)
-#define CCM_CCGR3_CG3_MASK                       (0xC0U)
-#define CCM_CCGR3_CG3_SHIFT                      (6U)
-#define CCM_CCGR3_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG3_SHIFT)) & CCM_CCGR3_CG3_MASK)
-#define CCM_CCGR3_CG4_MASK                       (0x300U)
-#define CCM_CCGR3_CG4_SHIFT                      (8U)
-#define CCM_CCGR3_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG4_SHIFT)) & CCM_CCGR3_CG4_MASK)
-#define CCM_CCGR3_CG5_MASK                       (0xC00U)
-#define CCM_CCGR3_CG5_SHIFT                      (10U)
-#define CCM_CCGR3_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG5_SHIFT)) & CCM_CCGR3_CG5_MASK)
-#define CCM_CCGR3_CG6_MASK                       (0x3000U)
-#define CCM_CCGR3_CG6_SHIFT                      (12U)
-#define CCM_CCGR3_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG6_SHIFT)) & CCM_CCGR3_CG6_MASK)
-#define CCM_CCGR3_CG7_MASK                       (0xC000U)
-#define CCM_CCGR3_CG7_SHIFT                      (14U)
-#define CCM_CCGR3_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG7_SHIFT)) & CCM_CCGR3_CG7_MASK)
-#define CCM_CCGR3_CG8_MASK                       (0x30000U)
-#define CCM_CCGR3_CG8_SHIFT                      (16U)
-#define CCM_CCGR3_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG8_SHIFT)) & CCM_CCGR3_CG8_MASK)
-#define CCM_CCGR3_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR3_CG9_SHIFT                      (18U)
-#define CCM_CCGR3_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG9_SHIFT)) & CCM_CCGR3_CG9_MASK)
-#define CCM_CCGR3_CG10_MASK                      (0x300000U)
-#define CCM_CCGR3_CG10_SHIFT                     (20U)
-#define CCM_CCGR3_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG10_SHIFT)) & CCM_CCGR3_CG10_MASK)
-#define CCM_CCGR3_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR3_CG11_SHIFT                     (22U)
-#define CCM_CCGR3_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG11_SHIFT)) & CCM_CCGR3_CG11_MASK)
-#define CCM_CCGR3_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR3_CG12_SHIFT                     (24U)
-#define CCM_CCGR3_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG12_SHIFT)) & CCM_CCGR3_CG12_MASK)
-#define CCM_CCGR3_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR3_CG13_SHIFT                     (26U)
-#define CCM_CCGR3_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG13_SHIFT)) & CCM_CCGR3_CG13_MASK)
-#define CCM_CCGR3_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR3_CG14_SHIFT                     (28U)
-#define CCM_CCGR3_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)
-#define CCM_CCGR3_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR3_CG15_SHIFT                     (30U)
-#define CCM_CCGR3_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG15_SHIFT)) & CCM_CCGR3_CG15_MASK)
+#define CCM_CCGR3_CG0_MASK   (0x3U)
+#define CCM_CCGR3_CG0_SHIFT  (0U)
+#define CCM_CCGR3_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG0_SHIFT)) & CCM_CCGR3_CG0_MASK)
+#define CCM_CCGR3_CG1_MASK   (0xCU)
+#define CCM_CCGR3_CG1_SHIFT  (2U)
+#define CCM_CCGR3_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG1_SHIFT)) & CCM_CCGR3_CG1_MASK)
+#define CCM_CCGR3_CG2_MASK   (0x30U)
+#define CCM_CCGR3_CG2_SHIFT  (4U)
+#define CCM_CCGR3_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG2_SHIFT)) & CCM_CCGR3_CG2_MASK)
+#define CCM_CCGR3_CG3_MASK   (0xC0U)
+#define CCM_CCGR3_CG3_SHIFT  (6U)
+#define CCM_CCGR3_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG3_SHIFT)) & CCM_CCGR3_CG3_MASK)
+#define CCM_CCGR3_CG4_MASK   (0x300U)
+#define CCM_CCGR3_CG4_SHIFT  (8U)
+#define CCM_CCGR3_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG4_SHIFT)) & CCM_CCGR3_CG4_MASK)
+#define CCM_CCGR3_CG5_MASK   (0xC00U)
+#define CCM_CCGR3_CG5_SHIFT  (10U)
+#define CCM_CCGR3_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG5_SHIFT)) & CCM_CCGR3_CG5_MASK)
+#define CCM_CCGR3_CG6_MASK   (0x3000U)
+#define CCM_CCGR3_CG6_SHIFT  (12U)
+#define CCM_CCGR3_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG6_SHIFT)) & CCM_CCGR3_CG6_MASK)
+#define CCM_CCGR3_CG7_MASK   (0xC000U)
+#define CCM_CCGR3_CG7_SHIFT  (14U)
+#define CCM_CCGR3_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG7_SHIFT)) & CCM_CCGR3_CG7_MASK)
+#define CCM_CCGR3_CG8_MASK   (0x30000U)
+#define CCM_CCGR3_CG8_SHIFT  (16U)
+#define CCM_CCGR3_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG8_SHIFT)) & CCM_CCGR3_CG8_MASK)
+#define CCM_CCGR3_CG9_MASK   (0xC0000U)
+#define CCM_CCGR3_CG9_SHIFT  (18U)
+#define CCM_CCGR3_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG9_SHIFT)) & CCM_CCGR3_CG9_MASK)
+#define CCM_CCGR3_CG10_MASK  (0x300000U)
+#define CCM_CCGR3_CG10_SHIFT (20U)
+#define CCM_CCGR3_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG10_SHIFT)) & CCM_CCGR3_CG10_MASK)
+#define CCM_CCGR3_CG11_MASK  (0xC00000U)
+#define CCM_CCGR3_CG11_SHIFT (22U)
+#define CCM_CCGR3_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG11_SHIFT)) & CCM_CCGR3_CG11_MASK)
+#define CCM_CCGR3_CG12_MASK  (0x3000000U)
+#define CCM_CCGR3_CG12_SHIFT (24U)
+#define CCM_CCGR3_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG12_SHIFT)) & CCM_CCGR3_CG12_MASK)
+#define CCM_CCGR3_CG13_MASK  (0xC000000U)
+#define CCM_CCGR3_CG13_SHIFT (26U)
+#define CCM_CCGR3_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG13_SHIFT)) & CCM_CCGR3_CG13_MASK)
+#define CCM_CCGR3_CG14_MASK  (0x30000000U)
+#define CCM_CCGR3_CG14_SHIFT (28U)
+#define CCM_CCGR3_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)
+#define CCM_CCGR3_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR3_CG15_SHIFT (30U)
+#define CCM_CCGR3_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG15_SHIFT)) & CCM_CCGR3_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR4 - CCM Clock Gating Register 4 */
 /*! @{ */
-#define CCM_CCGR4_CG0_MASK                       (0x3U)
-#define CCM_CCGR4_CG0_SHIFT                      (0U)
-#define CCM_CCGR4_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG0_SHIFT)) & CCM_CCGR4_CG0_MASK)
-#define CCM_CCGR4_CG1_MASK                       (0xCU)
-#define CCM_CCGR4_CG1_SHIFT                      (2U)
-#define CCM_CCGR4_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG1_SHIFT)) & CCM_CCGR4_CG1_MASK)
-#define CCM_CCGR4_CG2_MASK                       (0x30U)
-#define CCM_CCGR4_CG2_SHIFT                      (4U)
-#define CCM_CCGR4_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG2_SHIFT)) & CCM_CCGR4_CG2_MASK)
-#define CCM_CCGR4_CG3_MASK                       (0xC0U)
-#define CCM_CCGR4_CG3_SHIFT                      (6U)
-#define CCM_CCGR4_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG3_SHIFT)) & CCM_CCGR4_CG3_MASK)
-#define CCM_CCGR4_CG4_MASK                       (0x300U)
-#define CCM_CCGR4_CG4_SHIFT                      (8U)
-#define CCM_CCGR4_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG4_SHIFT)) & CCM_CCGR4_CG4_MASK)
-#define CCM_CCGR4_CG5_MASK                       (0xC00U)
-#define CCM_CCGR4_CG5_SHIFT                      (10U)
-#define CCM_CCGR4_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG5_SHIFT)) & CCM_CCGR4_CG5_MASK)
-#define CCM_CCGR4_CG6_MASK                       (0x3000U)
-#define CCM_CCGR4_CG6_SHIFT                      (12U)
-#define CCM_CCGR4_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG6_SHIFT)) & CCM_CCGR4_CG6_MASK)
-#define CCM_CCGR4_CG7_MASK                       (0xC000U)
-#define CCM_CCGR4_CG7_SHIFT                      (14U)
-#define CCM_CCGR4_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG7_SHIFT)) & CCM_CCGR4_CG7_MASK)
-#define CCM_CCGR4_CG8_MASK                       (0x30000U)
-#define CCM_CCGR4_CG8_SHIFT                      (16U)
-#define CCM_CCGR4_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG8_SHIFT)) & CCM_CCGR4_CG8_MASK)
-#define CCM_CCGR4_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR4_CG9_SHIFT                      (18U)
-#define CCM_CCGR4_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG9_SHIFT)) & CCM_CCGR4_CG9_MASK)
-#define CCM_CCGR4_CG10_MASK                      (0x300000U)
-#define CCM_CCGR4_CG10_SHIFT                     (20U)
-#define CCM_CCGR4_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG10_SHIFT)) & CCM_CCGR4_CG10_MASK)
-#define CCM_CCGR4_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR4_CG11_SHIFT                     (22U)
-#define CCM_CCGR4_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG11_SHIFT)) & CCM_CCGR4_CG11_MASK)
-#define CCM_CCGR4_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR4_CG12_SHIFT                     (24U)
-#define CCM_CCGR4_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG12_SHIFT)) & CCM_CCGR4_CG12_MASK)
-#define CCM_CCGR4_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR4_CG13_SHIFT                     (26U)
-#define CCM_CCGR4_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG13_SHIFT)) & CCM_CCGR4_CG13_MASK)
-#define CCM_CCGR4_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR4_CG14_SHIFT                     (28U)
-#define CCM_CCGR4_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG14_SHIFT)) & CCM_CCGR4_CG14_MASK)
-#define CCM_CCGR4_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR4_CG15_SHIFT                     (30U)
-#define CCM_CCGR4_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG15_SHIFT)) & CCM_CCGR4_CG15_MASK)
+#define CCM_CCGR4_CG0_MASK   (0x3U)
+#define CCM_CCGR4_CG0_SHIFT  (0U)
+#define CCM_CCGR4_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG0_SHIFT)) & CCM_CCGR4_CG0_MASK)
+#define CCM_CCGR4_CG1_MASK   (0xCU)
+#define CCM_CCGR4_CG1_SHIFT  (2U)
+#define CCM_CCGR4_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG1_SHIFT)) & CCM_CCGR4_CG1_MASK)
+#define CCM_CCGR4_CG2_MASK   (0x30U)
+#define CCM_CCGR4_CG2_SHIFT  (4U)
+#define CCM_CCGR4_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG2_SHIFT)) & CCM_CCGR4_CG2_MASK)
+#define CCM_CCGR4_CG3_MASK   (0xC0U)
+#define CCM_CCGR4_CG3_SHIFT  (6U)
+#define CCM_CCGR4_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG3_SHIFT)) & CCM_CCGR4_CG3_MASK)
+#define CCM_CCGR4_CG4_MASK   (0x300U)
+#define CCM_CCGR4_CG4_SHIFT  (8U)
+#define CCM_CCGR4_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG4_SHIFT)) & CCM_CCGR4_CG4_MASK)
+#define CCM_CCGR4_CG5_MASK   (0xC00U)
+#define CCM_CCGR4_CG5_SHIFT  (10U)
+#define CCM_CCGR4_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG5_SHIFT)) & CCM_CCGR4_CG5_MASK)
+#define CCM_CCGR4_CG6_MASK   (0x3000U)
+#define CCM_CCGR4_CG6_SHIFT  (12U)
+#define CCM_CCGR4_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG6_SHIFT)) & CCM_CCGR4_CG6_MASK)
+#define CCM_CCGR4_CG7_MASK   (0xC000U)
+#define CCM_CCGR4_CG7_SHIFT  (14U)
+#define CCM_CCGR4_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG7_SHIFT)) & CCM_CCGR4_CG7_MASK)
+#define CCM_CCGR4_CG8_MASK   (0x30000U)
+#define CCM_CCGR4_CG8_SHIFT  (16U)
+#define CCM_CCGR4_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG8_SHIFT)) & CCM_CCGR4_CG8_MASK)
+#define CCM_CCGR4_CG9_MASK   (0xC0000U)
+#define CCM_CCGR4_CG9_SHIFT  (18U)
+#define CCM_CCGR4_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG9_SHIFT)) & CCM_CCGR4_CG9_MASK)
+#define CCM_CCGR4_CG10_MASK  (0x300000U)
+#define CCM_CCGR4_CG10_SHIFT (20U)
+#define CCM_CCGR4_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG10_SHIFT)) & CCM_CCGR4_CG10_MASK)
+#define CCM_CCGR4_CG11_MASK  (0xC00000U)
+#define CCM_CCGR4_CG11_SHIFT (22U)
+#define CCM_CCGR4_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG11_SHIFT)) & CCM_CCGR4_CG11_MASK)
+#define CCM_CCGR4_CG12_MASK  (0x3000000U)
+#define CCM_CCGR4_CG12_SHIFT (24U)
+#define CCM_CCGR4_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG12_SHIFT)) & CCM_CCGR4_CG12_MASK)
+#define CCM_CCGR4_CG13_MASK  (0xC000000U)
+#define CCM_CCGR4_CG13_SHIFT (26U)
+#define CCM_CCGR4_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG13_SHIFT)) & CCM_CCGR4_CG13_MASK)
+#define CCM_CCGR4_CG14_MASK  (0x30000000U)
+#define CCM_CCGR4_CG14_SHIFT (28U)
+#define CCM_CCGR4_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG14_SHIFT)) & CCM_CCGR4_CG14_MASK)
+#define CCM_CCGR4_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR4_CG15_SHIFT (30U)
+#define CCM_CCGR4_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG15_SHIFT)) & CCM_CCGR4_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR5 - CCM Clock Gating Register 5 */
 /*! @{ */
-#define CCM_CCGR5_CG0_MASK                       (0x3U)
-#define CCM_CCGR5_CG0_SHIFT                      (0U)
-#define CCM_CCGR5_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG0_SHIFT)) & CCM_CCGR5_CG0_MASK)
-#define CCM_CCGR5_CG1_MASK                       (0xCU)
-#define CCM_CCGR5_CG1_SHIFT                      (2U)
-#define CCM_CCGR5_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG1_SHIFT)) & CCM_CCGR5_CG1_MASK)
-#define CCM_CCGR5_CG2_MASK                       (0x30U)
-#define CCM_CCGR5_CG2_SHIFT                      (4U)
-#define CCM_CCGR5_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG2_SHIFT)) & CCM_CCGR5_CG2_MASK)
-#define CCM_CCGR5_CG3_MASK                       (0xC0U)
-#define CCM_CCGR5_CG3_SHIFT                      (6U)
-#define CCM_CCGR5_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG3_SHIFT)) & CCM_CCGR5_CG3_MASK)
-#define CCM_CCGR5_CG4_MASK                       (0x300U)
-#define CCM_CCGR5_CG4_SHIFT                      (8U)
-#define CCM_CCGR5_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG4_SHIFT)) & CCM_CCGR5_CG4_MASK)
-#define CCM_CCGR5_CG5_MASK                       (0xC00U)
-#define CCM_CCGR5_CG5_SHIFT                      (10U)
-#define CCM_CCGR5_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG5_SHIFT)) & CCM_CCGR5_CG5_MASK)
-#define CCM_CCGR5_CG6_MASK                       (0x3000U)
-#define CCM_CCGR5_CG6_SHIFT                      (12U)
-#define CCM_CCGR5_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG6_SHIFT)) & CCM_CCGR5_CG6_MASK)
-#define CCM_CCGR5_CG7_MASK                       (0xC000U)
-#define CCM_CCGR5_CG7_SHIFT                      (14U)
-#define CCM_CCGR5_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG7_SHIFT)) & CCM_CCGR5_CG7_MASK)
-#define CCM_CCGR5_CG8_MASK                       (0x30000U)
-#define CCM_CCGR5_CG8_SHIFT                      (16U)
-#define CCM_CCGR5_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG8_SHIFT)) & CCM_CCGR5_CG8_MASK)
-#define CCM_CCGR5_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR5_CG9_SHIFT                      (18U)
-#define CCM_CCGR5_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG9_SHIFT)) & CCM_CCGR5_CG9_MASK)
-#define CCM_CCGR5_CG10_MASK                      (0x300000U)
-#define CCM_CCGR5_CG10_SHIFT                     (20U)
-#define CCM_CCGR5_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG10_SHIFT)) & CCM_CCGR5_CG10_MASK)
-#define CCM_CCGR5_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR5_CG11_SHIFT                     (22U)
-#define CCM_CCGR5_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG11_SHIFT)) & CCM_CCGR5_CG11_MASK)
-#define CCM_CCGR5_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR5_CG12_SHIFT                     (24U)
-#define CCM_CCGR5_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG12_SHIFT)) & CCM_CCGR5_CG12_MASK)
-#define CCM_CCGR5_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR5_CG13_SHIFT                     (26U)
-#define CCM_CCGR5_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG13_SHIFT)) & CCM_CCGR5_CG13_MASK)
-#define CCM_CCGR5_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR5_CG14_SHIFT                     (28U)
-#define CCM_CCGR5_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG14_SHIFT)) & CCM_CCGR5_CG14_MASK)
-#define CCM_CCGR5_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR5_CG15_SHIFT                     (30U)
-#define CCM_CCGR5_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG15_SHIFT)) & CCM_CCGR5_CG15_MASK)
+#define CCM_CCGR5_CG0_MASK   (0x3U)
+#define CCM_CCGR5_CG0_SHIFT  (0U)
+#define CCM_CCGR5_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG0_SHIFT)) & CCM_CCGR5_CG0_MASK)
+#define CCM_CCGR5_CG1_MASK   (0xCU)
+#define CCM_CCGR5_CG1_SHIFT  (2U)
+#define CCM_CCGR5_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG1_SHIFT)) & CCM_CCGR5_CG1_MASK)
+#define CCM_CCGR5_CG2_MASK   (0x30U)
+#define CCM_CCGR5_CG2_SHIFT  (4U)
+#define CCM_CCGR5_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG2_SHIFT)) & CCM_CCGR5_CG2_MASK)
+#define CCM_CCGR5_CG3_MASK   (0xC0U)
+#define CCM_CCGR5_CG3_SHIFT  (6U)
+#define CCM_CCGR5_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG3_SHIFT)) & CCM_CCGR5_CG3_MASK)
+#define CCM_CCGR5_CG4_MASK   (0x300U)
+#define CCM_CCGR5_CG4_SHIFT  (8U)
+#define CCM_CCGR5_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG4_SHIFT)) & CCM_CCGR5_CG4_MASK)
+#define CCM_CCGR5_CG5_MASK   (0xC00U)
+#define CCM_CCGR5_CG5_SHIFT  (10U)
+#define CCM_CCGR5_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG5_SHIFT)) & CCM_CCGR5_CG5_MASK)
+#define CCM_CCGR5_CG6_MASK   (0x3000U)
+#define CCM_CCGR5_CG6_SHIFT  (12U)
+#define CCM_CCGR5_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG6_SHIFT)) & CCM_CCGR5_CG6_MASK)
+#define CCM_CCGR5_CG7_MASK   (0xC000U)
+#define CCM_CCGR5_CG7_SHIFT  (14U)
+#define CCM_CCGR5_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG7_SHIFT)) & CCM_CCGR5_CG7_MASK)
+#define CCM_CCGR5_CG8_MASK   (0x30000U)
+#define CCM_CCGR5_CG8_SHIFT  (16U)
+#define CCM_CCGR5_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG8_SHIFT)) & CCM_CCGR5_CG8_MASK)
+#define CCM_CCGR5_CG9_MASK   (0xC0000U)
+#define CCM_CCGR5_CG9_SHIFT  (18U)
+#define CCM_CCGR5_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG9_SHIFT)) & CCM_CCGR5_CG9_MASK)
+#define CCM_CCGR5_CG10_MASK  (0x300000U)
+#define CCM_CCGR5_CG10_SHIFT (20U)
+#define CCM_CCGR5_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG10_SHIFT)) & CCM_CCGR5_CG10_MASK)
+#define CCM_CCGR5_CG11_MASK  (0xC00000U)
+#define CCM_CCGR5_CG11_SHIFT (22U)
+#define CCM_CCGR5_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG11_SHIFT)) & CCM_CCGR5_CG11_MASK)
+#define CCM_CCGR5_CG12_MASK  (0x3000000U)
+#define CCM_CCGR5_CG12_SHIFT (24U)
+#define CCM_CCGR5_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG12_SHIFT)) & CCM_CCGR5_CG12_MASK)
+#define CCM_CCGR5_CG13_MASK  (0xC000000U)
+#define CCM_CCGR5_CG13_SHIFT (26U)
+#define CCM_CCGR5_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG13_SHIFT)) & CCM_CCGR5_CG13_MASK)
+#define CCM_CCGR5_CG14_MASK  (0x30000000U)
+#define CCM_CCGR5_CG14_SHIFT (28U)
+#define CCM_CCGR5_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG14_SHIFT)) & CCM_CCGR5_CG14_MASK)
+#define CCM_CCGR5_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR5_CG15_SHIFT (30U)
+#define CCM_CCGR5_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG15_SHIFT)) & CCM_CCGR5_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR6 - CCM Clock Gating Register 6 */
 /*! @{ */
-#define CCM_CCGR6_CG0_MASK                       (0x3U)
-#define CCM_CCGR6_CG0_SHIFT                      (0U)
-#define CCM_CCGR6_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG0_SHIFT)) & CCM_CCGR6_CG0_MASK)
-#define CCM_CCGR6_CG1_MASK                       (0xCU)
-#define CCM_CCGR6_CG1_SHIFT                      (2U)
-#define CCM_CCGR6_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG1_SHIFT)) & CCM_CCGR6_CG1_MASK)
-#define CCM_CCGR6_CG2_MASK                       (0x30U)
-#define CCM_CCGR6_CG2_SHIFT                      (4U)
-#define CCM_CCGR6_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG2_SHIFT)) & CCM_CCGR6_CG2_MASK)
-#define CCM_CCGR6_CG3_MASK                       (0xC0U)
-#define CCM_CCGR6_CG3_SHIFT                      (6U)
-#define CCM_CCGR6_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG3_SHIFT)) & CCM_CCGR6_CG3_MASK)
-#define CCM_CCGR6_CG4_MASK                       (0x300U)
-#define CCM_CCGR6_CG4_SHIFT                      (8U)
-#define CCM_CCGR6_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG4_SHIFT)) & CCM_CCGR6_CG4_MASK)
-#define CCM_CCGR6_CG5_MASK                       (0xC00U)
-#define CCM_CCGR6_CG5_SHIFT                      (10U)
-#define CCM_CCGR6_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG5_SHIFT)) & CCM_CCGR6_CG5_MASK)
-#define CCM_CCGR6_CG6_MASK                       (0x3000U)
-#define CCM_CCGR6_CG6_SHIFT                      (12U)
-#define CCM_CCGR6_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG6_SHIFT)) & CCM_CCGR6_CG6_MASK)
-#define CCM_CCGR6_CG7_MASK                       (0xC000U)
-#define CCM_CCGR6_CG7_SHIFT                      (14U)
-#define CCM_CCGR6_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG7_SHIFT)) & CCM_CCGR6_CG7_MASK)
-#define CCM_CCGR6_CG8_MASK                       (0x30000U)
-#define CCM_CCGR6_CG8_SHIFT                      (16U)
-#define CCM_CCGR6_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG8_SHIFT)) & CCM_CCGR6_CG8_MASK)
-#define CCM_CCGR6_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR6_CG9_SHIFT                      (18U)
-#define CCM_CCGR6_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG9_SHIFT)) & CCM_CCGR6_CG9_MASK)
-#define CCM_CCGR6_CG10_MASK                      (0x300000U)
-#define CCM_CCGR6_CG10_SHIFT                     (20U)
-#define CCM_CCGR6_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG10_SHIFT)) & CCM_CCGR6_CG10_MASK)
-#define CCM_CCGR6_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR6_CG11_SHIFT                     (22U)
-#define CCM_CCGR6_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG11_SHIFT)) & CCM_CCGR6_CG11_MASK)
-#define CCM_CCGR6_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR6_CG12_SHIFT                     (24U)
-#define CCM_CCGR6_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG12_SHIFT)) & CCM_CCGR6_CG12_MASK)
-#define CCM_CCGR6_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR6_CG13_SHIFT                     (26U)
-#define CCM_CCGR6_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG13_SHIFT)) & CCM_CCGR6_CG13_MASK)
-#define CCM_CCGR6_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR6_CG14_SHIFT                     (28U)
-#define CCM_CCGR6_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG14_SHIFT)) & CCM_CCGR6_CG14_MASK)
-#define CCM_CCGR6_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR6_CG15_SHIFT                     (30U)
-#define CCM_CCGR6_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG15_SHIFT)) & CCM_CCGR6_CG15_MASK)
+#define CCM_CCGR6_CG0_MASK   (0x3U)
+#define CCM_CCGR6_CG0_SHIFT  (0U)
+#define CCM_CCGR6_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG0_SHIFT)) & CCM_CCGR6_CG0_MASK)
+#define CCM_CCGR6_CG1_MASK   (0xCU)
+#define CCM_CCGR6_CG1_SHIFT  (2U)
+#define CCM_CCGR6_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG1_SHIFT)) & CCM_CCGR6_CG1_MASK)
+#define CCM_CCGR6_CG2_MASK   (0x30U)
+#define CCM_CCGR6_CG2_SHIFT  (4U)
+#define CCM_CCGR6_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG2_SHIFT)) & CCM_CCGR6_CG2_MASK)
+#define CCM_CCGR6_CG3_MASK   (0xC0U)
+#define CCM_CCGR6_CG3_SHIFT  (6U)
+#define CCM_CCGR6_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG3_SHIFT)) & CCM_CCGR6_CG3_MASK)
+#define CCM_CCGR6_CG4_MASK   (0x300U)
+#define CCM_CCGR6_CG4_SHIFT  (8U)
+#define CCM_CCGR6_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG4_SHIFT)) & CCM_CCGR6_CG4_MASK)
+#define CCM_CCGR6_CG5_MASK   (0xC00U)
+#define CCM_CCGR6_CG5_SHIFT  (10U)
+#define CCM_CCGR6_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG5_SHIFT)) & CCM_CCGR6_CG5_MASK)
+#define CCM_CCGR6_CG6_MASK   (0x3000U)
+#define CCM_CCGR6_CG6_SHIFT  (12U)
+#define CCM_CCGR6_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG6_SHIFT)) & CCM_CCGR6_CG6_MASK)
+#define CCM_CCGR6_CG7_MASK   (0xC000U)
+#define CCM_CCGR6_CG7_SHIFT  (14U)
+#define CCM_CCGR6_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG7_SHIFT)) & CCM_CCGR6_CG7_MASK)
+#define CCM_CCGR6_CG8_MASK   (0x30000U)
+#define CCM_CCGR6_CG8_SHIFT  (16U)
+#define CCM_CCGR6_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG8_SHIFT)) & CCM_CCGR6_CG8_MASK)
+#define CCM_CCGR6_CG9_MASK   (0xC0000U)
+#define CCM_CCGR6_CG9_SHIFT  (18U)
+#define CCM_CCGR6_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG9_SHIFT)) & CCM_CCGR6_CG9_MASK)
+#define CCM_CCGR6_CG10_MASK  (0x300000U)
+#define CCM_CCGR6_CG10_SHIFT (20U)
+#define CCM_CCGR6_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG10_SHIFT)) & CCM_CCGR6_CG10_MASK)
+#define CCM_CCGR6_CG11_MASK  (0xC00000U)
+#define CCM_CCGR6_CG11_SHIFT (22U)
+#define CCM_CCGR6_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG11_SHIFT)) & CCM_CCGR6_CG11_MASK)
+#define CCM_CCGR6_CG12_MASK  (0x3000000U)
+#define CCM_CCGR6_CG12_SHIFT (24U)
+#define CCM_CCGR6_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG12_SHIFT)) & CCM_CCGR6_CG12_MASK)
+#define CCM_CCGR6_CG13_MASK  (0xC000000U)
+#define CCM_CCGR6_CG13_SHIFT (26U)
+#define CCM_CCGR6_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG13_SHIFT)) & CCM_CCGR6_CG13_MASK)
+#define CCM_CCGR6_CG14_MASK  (0x30000000U)
+#define CCM_CCGR6_CG14_SHIFT (28U)
+#define CCM_CCGR6_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG14_SHIFT)) & CCM_CCGR6_CG14_MASK)
+#define CCM_CCGR6_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR6_CG15_SHIFT (30U)
+#define CCM_CCGR6_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG15_SHIFT)) & CCM_CCGR6_CG15_MASK)
 /*! @} */
 
 /*! @name CMEOR - CCM Module Enable Overide Register */
 /*! @{ */
-#define CCM_CMEOR_MOD_EN_OV_GPT_MASK             (0x20U)
-#define CCM_CMEOR_MOD_EN_OV_GPT_SHIFT            (5U)
-#define CCM_CMEOR_MOD_EN_OV_GPT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)
-#define CCM_CMEOR_MOD_EN_OV_PIT_MASK             (0x40U)
-#define CCM_CMEOR_MOD_EN_OV_PIT_SHIFT            (6U)
-#define CCM_CMEOR_MOD_EN_OV_PIT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)
-#define CCM_CMEOR_MOD_EN_USDHC_MASK              (0x80U)
-#define CCM_CMEOR_MOD_EN_USDHC_SHIFT             (7U)
-#define CCM_CMEOR_MOD_EN_USDHC(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)
-#define CCM_CMEOR_MOD_EN_OV_TRNG_MASK            (0x200U)
-#define CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT           (9U)
-#define CCM_CMEOR_MOD_EN_OV_TRNG(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK        (0x10000000U)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT       (28U)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK        (0x40000000U)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT       (30U)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)
+#define CCM_CMEOR_MOD_EN_OV_GPT_MASK  (0x20U)
+#define CCM_CMEOR_MOD_EN_OV_GPT_SHIFT (5U)
+#define CCM_CMEOR_MOD_EN_OV_GPT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)
+#define CCM_CMEOR_MOD_EN_OV_PIT_MASK  (0x40U)
+#define CCM_CMEOR_MOD_EN_OV_PIT_SHIFT (6U)
+#define CCM_CMEOR_MOD_EN_OV_PIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)
+#define CCM_CMEOR_MOD_EN_USDHC_MASK  (0x80U)
+#define CCM_CMEOR_MOD_EN_USDHC_SHIFT (7U)
+#define CCM_CMEOR_MOD_EN_USDHC(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)
+#define CCM_CMEOR_MOD_EN_OV_TRNG_MASK  (0x200U)
+#define CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT (9U)
+#define CCM_CMEOR_MOD_EN_OV_TRNG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK  (0x10000000U)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT (28U)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK  (0x40000000U)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT (30U)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CCM_Register_Masks */
 
-
 /* CCM - Peripheral instance base addresses */
 /** Peripheral CCM base address */
-#define CCM_BASE                                 (0x400FC000u)
+#define CCM_BASE (0x400FC000u)
 /** Peripheral CCM base pointer */
-#define CCM                                      ((CCM_Type *)CCM_BASE)
+#define CCM ((CCM_Type *)CCM_BASE)
 /** Array initializer of CCM peripheral base addresses */
-#define CCM_BASE_ADDRS                           { CCM_BASE }
+#define CCM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        CCM_BASE                                                                                                       \
+    }
 /** Array initializer of CCM peripheral base pointers */
-#define CCM_BASE_PTRS                            { CCM }
+#define CCM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        CCM                                                                                                            \
+    }
 /** Interrupt vectors for the CCM peripheral type */
-#define CCM_IRQS                                 { CCM_1_IRQn, CCM_2_IRQn }
+#define CCM_IRQS                                                                                                       \
+    {                                                                                                                  \
+        CCM_1_IRQn, CCM_2_IRQn                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group CCM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CCM_ANALOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -3892,70 +4282,71 @@ typedef struct {
  */
 
 /** CCM_ANALOG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t PLL_ARM;                           /**< Analog ARM PLL control Register, offset: 0x0 */
-  __IO uint32_t PLL_ARM_SET;                       /**< Analog ARM PLL control Register, offset: 0x4 */
-  __IO uint32_t PLL_ARM_CLR;                       /**< Analog ARM PLL control Register, offset: 0x8 */
-  __IO uint32_t PLL_ARM_TOG;                       /**< Analog ARM PLL control Register, offset: 0xC */
-  __IO uint32_t PLL_USB1;                          /**< Analog USB1 480MHz PLL Control Register, offset: 0x10 */
-  __IO uint32_t PLL_USB1_SET;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x14 */
-  __IO uint32_t PLL_USB1_CLR;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x18 */
-  __IO uint32_t PLL_USB1_TOG;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x1C */
-  __IO uint32_t PLL_USB2;                          /**< Analog USB2 480MHz PLL Control Register, offset: 0x20 */
-  __IO uint32_t PLL_USB2_SET;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x24 */
-  __IO uint32_t PLL_USB2_CLR;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x28 */
-  __IO uint32_t PLL_USB2_TOG;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x2C */
-  __IO uint32_t PLL_SYS;                           /**< Analog System PLL Control Register, offset: 0x30 */
-  __IO uint32_t PLL_SYS_SET;                       /**< Analog System PLL Control Register, offset: 0x34 */
-  __IO uint32_t PLL_SYS_CLR;                       /**< Analog System PLL Control Register, offset: 0x38 */
-  __IO uint32_t PLL_SYS_TOG;                       /**< Analog System PLL Control Register, offset: 0x3C */
-  __IO uint32_t PLL_SYS_SS;                        /**< 528MHz System PLL Spread Spectrum Register, offset: 0x40 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t PLL_SYS_NUM;                       /**< Numerator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x50 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t PLL_SYS_DENOM;                     /**< Denominator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x60 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t PLL_AUDIO;                         /**< Analog Audio PLL control Register, offset: 0x70 */
-  __IO uint32_t PLL_AUDIO_SET;                     /**< Analog Audio PLL control Register, offset: 0x74 */
-  __IO uint32_t PLL_AUDIO_CLR;                     /**< Analog Audio PLL control Register, offset: 0x78 */
-  __IO uint32_t PLL_AUDIO_TOG;                     /**< Analog Audio PLL control Register, offset: 0x7C */
-  __IO uint32_t PLL_AUDIO_NUM;                     /**< Numerator of Audio PLL Fractional Loop Divider Register, offset: 0x80 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t PLL_AUDIO_DENOM;                   /**< Denominator of Audio PLL Fractional Loop Divider Register, offset: 0x90 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t PLL_VIDEO;                         /**< Analog Video PLL control Register, offset: 0xA0 */
-  __IO uint32_t PLL_VIDEO_SET;                     /**< Analog Video PLL control Register, offset: 0xA4 */
-  __IO uint32_t PLL_VIDEO_CLR;                     /**< Analog Video PLL control Register, offset: 0xA8 */
-  __IO uint32_t PLL_VIDEO_TOG;                     /**< Analog Video PLL control Register, offset: 0xAC */
-  __IO uint32_t PLL_VIDEO_NUM;                     /**< Numerator of Video PLL Fractional Loop Divider Register, offset: 0xB0 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t PLL_VIDEO_DENOM;                   /**< Denominator of Video PLL Fractional Loop Divider Register, offset: 0xC0 */
-       uint8_t RESERVED_6[28];
-  __IO uint32_t PLL_ENET;                          /**< Analog ENET PLL Control Register, offset: 0xE0 */
-  __IO uint32_t PLL_ENET_SET;                      /**< Analog ENET PLL Control Register, offset: 0xE4 */
-  __IO uint32_t PLL_ENET_CLR;                      /**< Analog ENET PLL Control Register, offset: 0xE8 */
-  __IO uint32_t PLL_ENET_TOG;                      /**< Analog ENET PLL Control Register, offset: 0xEC */
-  __IO uint32_t PFD_480;                           /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF0 */
-  __IO uint32_t PFD_480_SET;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF4 */
-  __IO uint32_t PFD_480_CLR;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF8 */
-  __IO uint32_t PFD_480_TOG;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xFC */
-  __IO uint32_t PFD_528;                           /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x100 */
-  __IO uint32_t PFD_528_SET;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x104 */
-  __IO uint32_t PFD_528_CLR;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x108 */
-  __IO uint32_t PFD_528_TOG;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x10C */
-       uint8_t RESERVED_7[64];
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-  __IO uint32_t MISC1;                             /**< Miscellaneous Register 1, offset: 0x160 */
-  __IO uint32_t MISC1_SET;                         /**< Miscellaneous Register 1, offset: 0x164 */
-  __IO uint32_t MISC1_CLR;                         /**< Miscellaneous Register 1, offset: 0x168 */
-  __IO uint32_t MISC1_TOG;                         /**< Miscellaneous Register 1, offset: 0x16C */
-  __IO uint32_t MISC2;                             /**< Miscellaneous Register 2, offset: 0x170 */
-  __IO uint32_t MISC2_SET;                         /**< Miscellaneous Register 2, offset: 0x174 */
-  __IO uint32_t MISC2_CLR;                         /**< Miscellaneous Register 2, offset: 0x178 */
-  __IO uint32_t MISC2_TOG;                         /**< Miscellaneous Register 2, offset: 0x17C */
+typedef struct
+{
+    __IO uint32_t PLL_ARM;      /**< Analog ARM PLL control Register, offset: 0x0 */
+    __IO uint32_t PLL_ARM_SET;  /**< Analog ARM PLL control Register, offset: 0x4 */
+    __IO uint32_t PLL_ARM_CLR;  /**< Analog ARM PLL control Register, offset: 0x8 */
+    __IO uint32_t PLL_ARM_TOG;  /**< Analog ARM PLL control Register, offset: 0xC */
+    __IO uint32_t PLL_USB1;     /**< Analog USB1 480MHz PLL Control Register, offset: 0x10 */
+    __IO uint32_t PLL_USB1_SET; /**< Analog USB1 480MHz PLL Control Register, offset: 0x14 */
+    __IO uint32_t PLL_USB1_CLR; /**< Analog USB1 480MHz PLL Control Register, offset: 0x18 */
+    __IO uint32_t PLL_USB1_TOG; /**< Analog USB1 480MHz PLL Control Register, offset: 0x1C */
+    __IO uint32_t PLL_USB2;     /**< Analog USB2 480MHz PLL Control Register, offset: 0x20 */
+    __IO uint32_t PLL_USB2_SET; /**< Analog USB2 480MHz PLL Control Register, offset: 0x24 */
+    __IO uint32_t PLL_USB2_CLR; /**< Analog USB2 480MHz PLL Control Register, offset: 0x28 */
+    __IO uint32_t PLL_USB2_TOG; /**< Analog USB2 480MHz PLL Control Register, offset: 0x2C */
+    __IO uint32_t PLL_SYS;      /**< Analog System PLL Control Register, offset: 0x30 */
+    __IO uint32_t PLL_SYS_SET;  /**< Analog System PLL Control Register, offset: 0x34 */
+    __IO uint32_t PLL_SYS_CLR;  /**< Analog System PLL Control Register, offset: 0x38 */
+    __IO uint32_t PLL_SYS_TOG;  /**< Analog System PLL Control Register, offset: 0x3C */
+    __IO uint32_t PLL_SYS_SS;   /**< 528MHz System PLL Spread Spectrum Register, offset: 0x40 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t PLL_SYS_NUM; /**< Numerator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x50 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t PLL_SYS_DENOM; /**< Denominator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x60 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t PLL_AUDIO;     /**< Analog Audio PLL control Register, offset: 0x70 */
+    __IO uint32_t PLL_AUDIO_SET; /**< Analog Audio PLL control Register, offset: 0x74 */
+    __IO uint32_t PLL_AUDIO_CLR; /**< Analog Audio PLL control Register, offset: 0x78 */
+    __IO uint32_t PLL_AUDIO_TOG; /**< Analog Audio PLL control Register, offset: 0x7C */
+    __IO uint32_t PLL_AUDIO_NUM; /**< Numerator of Audio PLL Fractional Loop Divider Register, offset: 0x80 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t PLL_AUDIO_DENOM; /**< Denominator of Audio PLL Fractional Loop Divider Register, offset: 0x90 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t PLL_VIDEO;     /**< Analog Video PLL control Register, offset: 0xA0 */
+    __IO uint32_t PLL_VIDEO_SET; /**< Analog Video PLL control Register, offset: 0xA4 */
+    __IO uint32_t PLL_VIDEO_CLR; /**< Analog Video PLL control Register, offset: 0xA8 */
+    __IO uint32_t PLL_VIDEO_TOG; /**< Analog Video PLL control Register, offset: 0xAC */
+    __IO uint32_t PLL_VIDEO_NUM; /**< Numerator of Video PLL Fractional Loop Divider Register, offset: 0xB0 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t PLL_VIDEO_DENOM; /**< Denominator of Video PLL Fractional Loop Divider Register, offset: 0xC0 */
+    uint8_t RESERVED_6[28];
+    __IO uint32_t PLL_ENET;     /**< Analog ENET PLL Control Register, offset: 0xE0 */
+    __IO uint32_t PLL_ENET_SET; /**< Analog ENET PLL Control Register, offset: 0xE4 */
+    __IO uint32_t PLL_ENET_CLR; /**< Analog ENET PLL Control Register, offset: 0xE8 */
+    __IO uint32_t PLL_ENET_TOG; /**< Analog ENET PLL Control Register, offset: 0xEC */
+    __IO uint32_t PFD_480;      /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF0 */
+    __IO uint32_t PFD_480_SET;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF4 */
+    __IO uint32_t PFD_480_CLR;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF8 */
+    __IO uint32_t PFD_480_TOG;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xFC */
+    __IO uint32_t PFD_528;      /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x100 */
+    __IO uint32_t PFD_528_SET;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x104 */
+    __IO uint32_t PFD_528_CLR;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x108 */
+    __IO uint32_t PFD_528_TOG;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x10C */
+    uint8_t RESERVED_7[64];
+    __IO uint32_t MISC0;     /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET; /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR; /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG; /**< Miscellaneous Register 0, offset: 0x15C */
+    __IO uint32_t MISC1;     /**< Miscellaneous Register 1, offset: 0x160 */
+    __IO uint32_t MISC1_SET; /**< Miscellaneous Register 1, offset: 0x164 */
+    __IO uint32_t MISC1_CLR; /**< Miscellaneous Register 1, offset: 0x168 */
+    __IO uint32_t MISC1_TOG; /**< Miscellaneous Register 1, offset: 0x16C */
+    __IO uint32_t MISC2;     /**< Miscellaneous Register 2, offset: 0x170 */
+    __IO uint32_t MISC2_SET; /**< Miscellaneous Register 2, offset: 0x174 */
+    __IO uint32_t MISC2_CLR; /**< Miscellaneous Register 2, offset: 0x178 */
+    __IO uint32_t MISC2_TOG; /**< Miscellaneous Register 2, offset: 0x17C */
 } CCM_ANALOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -3969,1688 +4360,2383 @@ typedef struct {
 
 /*! @name PLL_ARM - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK       (0x7FU)
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT      (0U)
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN_MASK        (0x1000U)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT       (12U)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_ENABLE_MASK           (0x2000U)
-#define CCM_ANALOG_PLL_ARM_ENABLE_SHIFT          (13U)
-#define CCM_ANALOG_PLL_ARM_ENABLE(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK   (0xC000U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT  (14U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_BYPASS_MASK           (0x10000U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_SHIFT          (16U)
-#define CCM_ANALOG_PLL_ARM_BYPASS(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL_MASK          (0x80000U)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT         (19U)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_LOCK_MASK             (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_LOCK_SHIFT            (31U)
-#define CCM_ANALOG_PLL_ARM_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_ENABLE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK  (0xC000U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT (14U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_BYPASS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_SET - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_CLR - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_TOG - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1 - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK      (0x2U)
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT     (1U)
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK     (0x40U)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT    (6U)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_POWER_MASK           (0x1000U)
-#define CCM_ANALOG_PLL_USB1_POWER_SHIFT          (12U)
-#define CCM_ANALOG_PLL_USB1_POWER(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_USB1_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_USB1_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK  (0x2U)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT (1U)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK  (0x40U)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT (6U)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_POWER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_ENABLE_MASK)
 #define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_USB1_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_USB1_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_USB1_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_SET - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_SET_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_SET_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_CLR - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_TOG - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2 - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK      (0x2U)
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT     (1U)
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK     (0x40U)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT    (6U)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_POWER_MASK           (0x1000U)
-#define CCM_ANALOG_PLL_USB2_POWER_SHIFT          (12U)
-#define CCM_ANALOG_PLL_USB2_POWER(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_USB2_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_USB2_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK  (0x2U)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT (1U)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK  (0x40U)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT (6U)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_POWER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_ENABLE_MASK)
 #define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_USB2_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_USB2_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_USB2_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_SET - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_SET_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_SET_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_CLR - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_TOG - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK       (0x1U)
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT      (0U)
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN_MASK        (0x1000U)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT       (12U)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_ENABLE_MASK           (0x2000U)
-#define CCM_ANALOG_PLL_SYS_ENABLE_SHIFT          (13U)
-#define CCM_ANALOG_PLL_SYS_ENABLE(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK   (0xC000U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT  (14U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_BYPASS_MASK           (0x10000U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_SHIFT          (16U)
-#define CCM_ANALOG_PLL_SYS_BYPASS(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK    (0x40000U)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT   (18U)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_LOCK_MASK             (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_LOCK_SHIFT            (31U)
-#define CCM_ANALOG_PLL_SYS_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_ENABLE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK  (0xC000U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT (14U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_BYPASS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK  (0x40000U)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT (18U)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_SET - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_CLR - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_TOG - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_SS - 528MHz System PLL Spread Spectrum Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_SS_STEP_MASK          (0x7FFFU)
-#define CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT         (0U)
-#define CCM_ANALOG_PLL_SYS_SS_STEP(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STEP_MASK)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK        (0x8000U)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT       (15U)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_SS_STOP_MASK          (0xFFFF0000U)
-#define CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT         (16U)
-#define CCM_ANALOG_PLL_SYS_SS_STOP(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STOP_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_STEP_MASK  (0x7FFFU)
+#define CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_SS_STEP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STEP_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK  (0x8000U)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT (15U)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_STOP_MASK  (0xFFFF0000U)
+#define CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_SS_STOP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STOP_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_NUM - Numerator of 528MHz System PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_NUM_A_MASK            (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_SYS_NUM_A_SHIFT           (0U)
-#define CCM_ANALOG_PLL_SYS_NUM_A(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_NUM_A_SHIFT)) & CCM_ANALOG_PLL_SYS_NUM_A_MASK)
+#define CCM_ANALOG_PLL_SYS_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_SYS_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_NUM_A(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_NUM_A_SHIFT)) & CCM_ANALOG_PLL_SYS_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_DENOM - Denominator of 528MHz System PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_DENOM_B_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT         (0U)
-#define CCM_ANALOG_PLL_SYS_DENOM_B(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_SYS_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_SYS_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_DENOM_B(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_SYS_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK     (0x7FU)
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT    (0U)
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK      (0x1000U)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT     (12U)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE_MASK         (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT        (13U)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_MASK         (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT        (16U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_MASK)
 #define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_LOCK_MASK           (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT          (31U)
-#define CCM_ANALOG_PLL_AUDIO_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_SET - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_CLR - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_TOG - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_NUM - Numerator of Audio PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_NUM_A_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT         (0U)
-#define CCM_ANALOG_PLL_AUDIO_NUM_A(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_AUDIO_NUM_A_MASK)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_AUDIO_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_DENOM - Denominator of Audio PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK        (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT       (0U)
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK     (0x7FU)
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT    (0U)
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK      (0x1000U)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT     (12U)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK         (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT        (13U)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_MASK         (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT        (16U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_MASK)
 #define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_LOCK_MASK           (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT          (31U)
-#define CCM_ANALOG_PLL_VIDEO_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_SET - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_CLR - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_TOG - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_NUM - Numerator of Video PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_NUM_A_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT         (0U)
-#define CCM_ANALOG_PLL_VIDEO_NUM_A(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_VIDEO_NUM_A_MASK)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_VIDEO_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_DENOM - Denominator of Video PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK        (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT       (0U)
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_ENET - Analog ENET PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK      (0x3U)
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT     (0U)
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT      (12U)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_ENET_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_ENET_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK  (0x3U)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_ENABLE_MASK)
 #define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_ENET_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_ENET_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK   (0x40000U)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT  (18U)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK  (0x40000U)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT (18U)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_ENET_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_SET - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_CLR - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_TOG - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PFD_480 - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_PFD0_FRAC_MASK        (0x3FU)
-#define CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT       (0U)
-#define CCM_ANALOG_PFD_480_PFD0_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE_MASK      (0x40U)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT     (6U)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK     (0x80U)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT    (7U)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC_MASK        (0x3F00U)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT       (8U)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE_MASK      (0x4000U)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT     (14U)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK     (0x8000U)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT    (15U)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC_MASK        (0x3F0000U)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT       (16U)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE_MASK      (0x400000U)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT     (22U)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK     (0x800000U)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT    (23U)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC_MASK        (0x3F000000U)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT       (24U)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE_MASK      (0x40000000U)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT     (30U)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK     (0x80000000U)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT    (31U)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE_MASK  (0x40U)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT (6U)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK  (0x80U)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT (7U)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE_MASK  (0x4000U)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT (14U)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK  (0x8000U)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT (15U)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE_MASK  (0x400000U)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT (22U)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK  (0x800000U)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT (23U)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE_MASK  (0x40000000U)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT (30U)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK  (0x80000000U)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT (31U)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_SET - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_SET_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_CLR - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_TOG - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528 - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_PFD0_FRAC_MASK        (0x3FU)
-#define CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT       (0U)
-#define CCM_ANALOG_PFD_528_PFD0_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE_MASK      (0x40U)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT     (6U)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK     (0x80U)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT    (7U)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC_MASK        (0x3F00U)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT       (8U)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE_MASK      (0x4000U)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT     (14U)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK     (0x8000U)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT    (15U)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC_MASK        (0x3F0000U)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT       (16U)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE_MASK      (0x400000U)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT     (22U)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK     (0x800000U)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT    (23U)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC_MASK        (0x3F000000U)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT       (24U)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE_MASK      (0x40000000U)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT     (30U)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK     (0x80000000U)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT    (31U)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE_MASK  (0x40U)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT (6U)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK  (0x80U)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT (7U)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE_MASK  (0x4000U)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT (14U)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK  (0x8000U)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT (15U)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE_MASK  (0x400000U)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT (22U)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK  (0x800000U)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT (23U)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE_MASK  (0x40000000U)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT (30U)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK  (0x80000000U)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT (31U)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_SET - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_SET_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_CLR - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_TOG - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_REFTOP_PWD_MASK         (0x1U)
-#define CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT        (0U)
-#define CCM_ANALOG_MISC0_REFTOP_PWD(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK      (0x70U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT     (4U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK       (0x80U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT      (7U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK   (0xC00U)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT  (10U)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK   (0x1000U)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT  (12U)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_OSC_I_MASK              (0x6000U)
-#define CCM_ANALOG_MISC0_OSC_I_SHIFT             (13U)
-#define CCM_ANALOG_MISC0_OSC_I(x)                (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_MASK         (0x8000U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT        (15U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_MASK)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK      (0x10000U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT     (16U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK       (0x2000000U)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT      (25U)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK      (0x1C000000U)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT     (26U)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK    (0x20000000U)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT   (29U)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK       (0x40000000U)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT      (30U)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT)) &                                      \
+     CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_OSC_I(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_SET_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_SET_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_SET_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_SET_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_SET_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_CLR_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_CLR_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_CLR_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_TOG_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_TOG_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_TOG_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC1 - Miscellaneous Register 1 */
 /*! @{ */
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK      (0x1FU)
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT     (0U)
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK      (0x400U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT     (10U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK      (0x1000U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT     (12U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT (0U)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK  (0x400U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT (10U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT (12U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) &                                     \
+     CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK      (0x8000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT     (27U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK        (0x10000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT       (28U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK       (0x20000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT      (29U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK         (0x40000000U)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT        (30U)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK         (0x80000000U)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT        (31U)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) &                                     \
+     CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT (27U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_SET - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_CLR - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_TOG - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC2 - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK     (0x7U)
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT    (0U)
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK     (0x8U)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT    (3U)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK     (0x20U)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT    (5U)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG0_OK_MASK            (0x40U)
-#define CCM_ANALOG_MISC2_REG0_OK_SHIFT           (6U)
-#define CCM_ANALOG_MISC2_REG0_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_PLL3_disable_MASK       (0x80U)
-#define CCM_ANALOG_MISC2_PLL3_disable_SHIFT      (7U)
-#define CCM_ANALOG_MISC2_PLL3_disable(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK     (0x700U)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT    (8U)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK     (0x800U)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT    (11U)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK     (0x2000U)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT    (13U)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG1_OK_MASK            (0x4000U)
-#define CCM_ANALOG_MISC2_REG1_OK_SHIFT           (14U)
-#define CCM_ANALOG_MISC2_REG1_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_REG1_OK_MASK)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK      (0x8000U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT     (15U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK     (0x70000U)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT    (16U)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK     (0x80000U)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT    (19U)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK     (0x200000U)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT    (21U)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG2_OK_MASK            (0x400000U)
-#define CCM_ANALOG_MISC2_REG2_OK_SHIFT           (22U)
-#define CCM_ANALOG_MISC2_REG2_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_REG2_OK_MASK)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK      (0x800000U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT     (23U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK     (0x3000000U)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT    (24U)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK     (0xC000000U)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT    (26U)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK     (0x30000000U)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT    (28U)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_VIDEO_DIV_MASK          (0xC0000000U)
-#define CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT         (30U)
-#define CCM_ANALOG_MISC2_VIDEO_DIV(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK  (0x7U)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT (0U)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK  (0x8U)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT (3U)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK  (0x20U)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT (5U)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_REG0_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_PLL3_disable(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK  (0x700U)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT (8U)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK  (0x800U)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT (11U)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK  (0x2000U)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT (13U)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_REG1_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT (15U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK  (0x70000U)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT (16U)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK  (0x80000U)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT (19U)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK  (0x200000U)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT (21U)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_REG2_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT (23U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK  (0x3000000U)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT (24U)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK  (0xC000000U)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT (26U)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK  (0x30000000U)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT (28U)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_VIDEO_DIV(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_SET - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_SET_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_SET_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_SET_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_SET_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_SET_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_SET_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_SET_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_SET_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_CLR - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_TOG - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CCM_ANALOG_Register_Masks */
 
-
 /* CCM_ANALOG - Peripheral instance base addresses */
 /** Peripheral CCM_ANALOG base address */
-#define CCM_ANALOG_BASE                          (0x400D8000u)
+#define CCM_ANALOG_BASE (0x400D8000u)
 /** Peripheral CCM_ANALOG base pointer */
-#define CCM_ANALOG                               ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
+#define CCM_ANALOG ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
 /** Array initializer of CCM_ANALOG peripheral base addresses */
-#define CCM_ANALOG_BASE_ADDRS                    { CCM_ANALOG_BASE }
+#define CCM_ANALOG_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        CCM_ANALOG_BASE                                                                                                \
+    }
 /** Array initializer of CCM_ANALOG peripheral base pointers */
-#define CCM_ANALOG_BASE_PTRS                     { CCM_ANALOG }
+#define CCM_ANALOG_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        CCM_ANALOG                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group CCM_ANALOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CMP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -5661,13 +6747,14 @@ typedef struct {
  */
 
 /** CMP - Register Layout Typedef */
-typedef struct {
-  __IO uint8_t CR0;                                /**< CMP Control Register 0, offset: 0x0 */
-  __IO uint8_t CR1;                                /**< CMP Control Register 1, offset: 0x1 */
-  __IO uint8_t FPR;                                /**< CMP Filter Period Register, offset: 0x2 */
-  __IO uint8_t SCR;                                /**< CMP Status and Control Register, offset: 0x3 */
-  __IO uint8_t DACCR;                              /**< DAC Control Register, offset: 0x4 */
-  __IO uint8_t MUXCR;                              /**< MUX Control Register, offset: 0x5 */
+typedef struct
+{
+    __IO uint8_t CR0;   /**< CMP Control Register 0, offset: 0x0 */
+    __IO uint8_t CR1;   /**< CMP Control Register 1, offset: 0x1 */
+    __IO uint8_t FPR;   /**< CMP Filter Period Register, offset: 0x2 */
+    __IO uint8_t SCR;   /**< CMP Status and Control Register, offset: 0x3 */
+    __IO uint8_t DACCR; /**< DAC Control Register, offset: 0x4 */
+    __IO uint8_t MUXCR; /**< MUX Control Register, offset: 0x5 */
 } CMP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -5681,126 +6768,132 @@ typedef struct {
 
 /*! @name CR0 - CMP Control Register 0 */
 /*! @{ */
-#define CMP_CR0_HYSTCTR_MASK                     (0x3U)
-#define CMP_CR0_HYSTCTR_SHIFT                    (0U)
-#define CMP_CR0_HYSTCTR(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)
-#define CMP_CR0_FILTER_CNT_MASK                  (0x70U)
-#define CMP_CR0_FILTER_CNT_SHIFT                 (4U)
-#define CMP_CR0_FILTER_CNT(x)                    (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)
+#define CMP_CR0_HYSTCTR_MASK     (0x3U)
+#define CMP_CR0_HYSTCTR_SHIFT    (0U)
+#define CMP_CR0_HYSTCTR(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)
+#define CMP_CR0_FILTER_CNT_MASK  (0x70U)
+#define CMP_CR0_FILTER_CNT_SHIFT (4U)
+#define CMP_CR0_FILTER_CNT(x)    (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)
 /*! @} */
 
 /*! @name CR1 - CMP Control Register 1 */
 /*! @{ */
-#define CMP_CR1_EN_MASK                          (0x1U)
-#define CMP_CR1_EN_SHIFT                         (0U)
-#define CMP_CR1_EN(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)
-#define CMP_CR1_OPE_MASK                         (0x2U)
-#define CMP_CR1_OPE_SHIFT                        (1U)
-#define CMP_CR1_OPE(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)
-#define CMP_CR1_COS_MASK                         (0x4U)
-#define CMP_CR1_COS_SHIFT                        (2U)
-#define CMP_CR1_COS(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)
-#define CMP_CR1_INV_MASK                         (0x8U)
-#define CMP_CR1_INV_SHIFT                        (3U)
-#define CMP_CR1_INV(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)
-#define CMP_CR1_PMODE_MASK                       (0x10U)
-#define CMP_CR1_PMODE_SHIFT                      (4U)
-#define CMP_CR1_PMODE(x)                         (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)
-#define CMP_CR1_WE_MASK                          (0x40U)
-#define CMP_CR1_WE_SHIFT                         (6U)
-#define CMP_CR1_WE(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
-#define CMP_CR1_SE_MASK                          (0x80U)
-#define CMP_CR1_SE_SHIFT                         (7U)
-#define CMP_CR1_SE(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)
+#define CMP_CR1_EN_MASK     (0x1U)
+#define CMP_CR1_EN_SHIFT    (0U)
+#define CMP_CR1_EN(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)
+#define CMP_CR1_OPE_MASK    (0x2U)
+#define CMP_CR1_OPE_SHIFT   (1U)
+#define CMP_CR1_OPE(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)
+#define CMP_CR1_COS_MASK    (0x4U)
+#define CMP_CR1_COS_SHIFT   (2U)
+#define CMP_CR1_COS(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)
+#define CMP_CR1_INV_MASK    (0x8U)
+#define CMP_CR1_INV_SHIFT   (3U)
+#define CMP_CR1_INV(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)
+#define CMP_CR1_PMODE_MASK  (0x10U)
+#define CMP_CR1_PMODE_SHIFT (4U)
+#define CMP_CR1_PMODE(x)    (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)
+#define CMP_CR1_WE_MASK     (0x40U)
+#define CMP_CR1_WE_SHIFT    (6U)
+#define CMP_CR1_WE(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
+#define CMP_CR1_SE_MASK     (0x80U)
+#define CMP_CR1_SE_SHIFT    (7U)
+#define CMP_CR1_SE(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)
 /*! @} */
 
 /*! @name FPR - CMP Filter Period Register */
 /*! @{ */
-#define CMP_FPR_FILT_PER_MASK                    (0xFFU)
-#define CMP_FPR_FILT_PER_SHIFT                   (0U)
-#define CMP_FPR_FILT_PER(x)                      (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)
+#define CMP_FPR_FILT_PER_MASK  (0xFFU)
+#define CMP_FPR_FILT_PER_SHIFT (0U)
+#define CMP_FPR_FILT_PER(x)    (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)
 /*! @} */
 
 /*! @name SCR - CMP Status and Control Register */
 /*! @{ */
-#define CMP_SCR_COUT_MASK                        (0x1U)
-#define CMP_SCR_COUT_SHIFT                       (0U)
-#define CMP_SCR_COUT(x)                          (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)
-#define CMP_SCR_CFF_MASK                         (0x2U)
-#define CMP_SCR_CFF_SHIFT                        (1U)
-#define CMP_SCR_CFF(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
-#define CMP_SCR_CFR_MASK                         (0x4U)
-#define CMP_SCR_CFR_SHIFT                        (2U)
-#define CMP_SCR_CFR(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)
-#define CMP_SCR_IEF_MASK                         (0x8U)
-#define CMP_SCR_IEF_SHIFT                        (3U)
-#define CMP_SCR_IEF(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)
-#define CMP_SCR_IER_MASK                         (0x10U)
-#define CMP_SCR_IER_SHIFT                        (4U)
-#define CMP_SCR_IER(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)
-#define CMP_SCR_DMAEN_MASK                       (0x40U)
-#define CMP_SCR_DMAEN_SHIFT                      (6U)
-#define CMP_SCR_DMAEN(x)                         (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)
+#define CMP_SCR_COUT_MASK   (0x1U)
+#define CMP_SCR_COUT_SHIFT  (0U)
+#define CMP_SCR_COUT(x)     (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)
+#define CMP_SCR_CFF_MASK    (0x2U)
+#define CMP_SCR_CFF_SHIFT   (1U)
+#define CMP_SCR_CFF(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
+#define CMP_SCR_CFR_MASK    (0x4U)
+#define CMP_SCR_CFR_SHIFT   (2U)
+#define CMP_SCR_CFR(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)
+#define CMP_SCR_IEF_MASK    (0x8U)
+#define CMP_SCR_IEF_SHIFT   (3U)
+#define CMP_SCR_IEF(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)
+#define CMP_SCR_IER_MASK    (0x10U)
+#define CMP_SCR_IER_SHIFT   (4U)
+#define CMP_SCR_IER(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)
+#define CMP_SCR_DMAEN_MASK  (0x40U)
+#define CMP_SCR_DMAEN_SHIFT (6U)
+#define CMP_SCR_DMAEN(x)    (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)
 /*! @} */
 
 /*! @name DACCR - DAC Control Register */
 /*! @{ */
-#define CMP_DACCR_VOSEL_MASK                     (0x3FU)
-#define CMP_DACCR_VOSEL_SHIFT                    (0U)
-#define CMP_DACCR_VOSEL(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
-#define CMP_DACCR_VRSEL_MASK                     (0x40U)
-#define CMP_DACCR_VRSEL_SHIFT                    (6U)
-#define CMP_DACCR_VRSEL(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)
-#define CMP_DACCR_DACEN_MASK                     (0x80U)
-#define CMP_DACCR_DACEN_SHIFT                    (7U)
-#define CMP_DACCR_DACEN(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)
+#define CMP_DACCR_VOSEL_MASK  (0x3FU)
+#define CMP_DACCR_VOSEL_SHIFT (0U)
+#define CMP_DACCR_VOSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
+#define CMP_DACCR_VRSEL_MASK  (0x40U)
+#define CMP_DACCR_VRSEL_SHIFT (6U)
+#define CMP_DACCR_VRSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)
+#define CMP_DACCR_DACEN_MASK  (0x80U)
+#define CMP_DACCR_DACEN_SHIFT (7U)
+#define CMP_DACCR_DACEN(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)
 /*! @} */
 
 /*! @name MUXCR - MUX Control Register */
 /*! @{ */
-#define CMP_MUXCR_MSEL_MASK                      (0x7U)
-#define CMP_MUXCR_MSEL_SHIFT                     (0U)
-#define CMP_MUXCR_MSEL(x)                        (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)
-#define CMP_MUXCR_PSEL_MASK                      (0x38U)
-#define CMP_MUXCR_PSEL_SHIFT                     (3U)
-#define CMP_MUXCR_PSEL(x)                        (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)
+#define CMP_MUXCR_MSEL_MASK  (0x7U)
+#define CMP_MUXCR_MSEL_SHIFT (0U)
+#define CMP_MUXCR_MSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)
+#define CMP_MUXCR_PSEL_MASK  (0x38U)
+#define CMP_MUXCR_PSEL_SHIFT (3U)
+#define CMP_MUXCR_PSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CMP_Register_Masks */
 
-
 /* CMP - Peripheral instance base addresses */
 /** Peripheral CMP1 base address */
-#define CMP1_BASE                                (0x40094000u)
+#define CMP1_BASE (0x40094000u)
 /** Peripheral CMP1 base pointer */
-#define CMP1                                     ((CMP_Type *)CMP1_BASE)
+#define CMP1 ((CMP_Type *)CMP1_BASE)
 /** Peripheral CMP2 base address */
-#define CMP2_BASE                                (0x40094008u)
+#define CMP2_BASE (0x40094008u)
 /** Peripheral CMP2 base pointer */
-#define CMP2                                     ((CMP_Type *)CMP2_BASE)
+#define CMP2 ((CMP_Type *)CMP2_BASE)
 /** Peripheral CMP3 base address */
-#define CMP3_BASE                                (0x40094010u)
+#define CMP3_BASE (0x40094010u)
 /** Peripheral CMP3 base pointer */
-#define CMP3                                     ((CMP_Type *)CMP3_BASE)
+#define CMP3 ((CMP_Type *)CMP3_BASE)
 /** Peripheral CMP4 base address */
-#define CMP4_BASE                                (0x40094018u)
+#define CMP4_BASE (0x40094018u)
 /** Peripheral CMP4 base pointer */
-#define CMP4                                     ((CMP_Type *)CMP4_BASE)
+#define CMP4 ((CMP_Type *)CMP4_BASE)
 /** Array initializer of CMP peripheral base addresses */
-#define CMP_BASE_ADDRS                           { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }
+#define CMP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE                                                                 \
+    }
 /** Array initializer of CMP peripheral base pointers */
-#define CMP_BASE_PTRS                            { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }
+#define CMP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4                                                                         \
+    }
 /** Interrupt vectors for the CMP peripheral type */
-#define CMP_IRQS                                 { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }
+#define CMP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn                                                  \
+    }
 
 /*!
  * @}
  */ /* end of group CMP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CSU Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -5811,14 +6904,15 @@ typedef struct {
  */
 
 /** CSU - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CSL[32];                           /**< Config security level register, array offset: 0x0, array step: 0x4 */
-       uint8_t RESERVED_0[384];
-  __IO uint32_t HP0;                               /**< HP0 register, offset: 0x200 */
-       uint8_t RESERVED_1[20];
-  __IO uint32_t SA;                                /**< Secure access register, offset: 0x218 */
-       uint8_t RESERVED_2[316];
-  __IO uint32_t HPCONTROL0;                        /**< HPCONTROL0 register, offset: 0x358 */
+typedef struct
+{
+    __IO uint32_t CSL[32]; /**< Config security level register, array offset: 0x0, array step: 0x4 */
+    uint8_t RESERVED_0[384];
+    __IO uint32_t HP0; /**< HP0 register, offset: 0x200 */
+    uint8_t RESERVED_1[20];
+    __IO uint32_t SA; /**< Secure access register, offset: 0x218 */
+    uint8_t RESERVED_2[316];
+    __IO uint32_t HPCONTROL0; /**< HPCONTROL0 register, offset: 0x358 */
 } CSU_Type;
 
 /* ----------------------------------------------------------------------------
@@ -5832,278 +6926,301 @@ typedef struct {
 
 /*! @name CSL - Config security level register */
 /*! @{ */
-#define CSU_CSL_SUR_S2_MASK                      (0x1U)
-#define CSU_CSL_SUR_S2_SHIFT                     (0U)
-#define CSU_CSL_SUR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S2_SHIFT)) & CSU_CSL_SUR_S2_MASK)
-#define CSU_CSL_SSR_S2_MASK                      (0x2U)
-#define CSU_CSL_SSR_S2_SHIFT                     (1U)
-#define CSU_CSL_SSR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S2_SHIFT)) & CSU_CSL_SSR_S2_MASK)
-#define CSU_CSL_NUR_S2_MASK                      (0x4U)
-#define CSU_CSL_NUR_S2_SHIFT                     (2U)
-#define CSU_CSL_NUR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S2_SHIFT)) & CSU_CSL_NUR_S2_MASK)
-#define CSU_CSL_NSR_S2_MASK                      (0x8U)
-#define CSU_CSL_NSR_S2_SHIFT                     (3U)
-#define CSU_CSL_NSR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S2_SHIFT)) & CSU_CSL_NSR_S2_MASK)
-#define CSU_CSL_SUW_S2_MASK                      (0x10U)
-#define CSU_CSL_SUW_S2_SHIFT                     (4U)
-#define CSU_CSL_SUW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S2_SHIFT)) & CSU_CSL_SUW_S2_MASK)
-#define CSU_CSL_SSW_S2_MASK                      (0x20U)
-#define CSU_CSL_SSW_S2_SHIFT                     (5U)
-#define CSU_CSL_SSW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S2_SHIFT)) & CSU_CSL_SSW_S2_MASK)
-#define CSU_CSL_NUW_S2_MASK                      (0x40U)
-#define CSU_CSL_NUW_S2_SHIFT                     (6U)
-#define CSU_CSL_NUW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S2_SHIFT)) & CSU_CSL_NUW_S2_MASK)
-#define CSU_CSL_NSW_S2_MASK                      (0x80U)
-#define CSU_CSL_NSW_S2_SHIFT                     (7U)
-#define CSU_CSL_NSW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S2_SHIFT)) & CSU_CSL_NSW_S2_MASK)
-#define CSU_CSL_LOCK_S2_MASK                     (0x100U)
-#define CSU_CSL_LOCK_S2_SHIFT                    (8U)
-#define CSU_CSL_LOCK_S2(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S2_SHIFT)) & CSU_CSL_LOCK_S2_MASK)
-#define CSU_CSL_SUR_S1_MASK                      (0x10000U)
-#define CSU_CSL_SUR_S1_SHIFT                     (16U)
-#define CSU_CSL_SUR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S1_SHIFT)) & CSU_CSL_SUR_S1_MASK)
-#define CSU_CSL_SSR_S1_MASK                      (0x20000U)
-#define CSU_CSL_SSR_S1_SHIFT                     (17U)
-#define CSU_CSL_SSR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S1_SHIFT)) & CSU_CSL_SSR_S1_MASK)
-#define CSU_CSL_NUR_S1_MASK                      (0x40000U)
-#define CSU_CSL_NUR_S1_SHIFT                     (18U)
-#define CSU_CSL_NUR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S1_SHIFT)) & CSU_CSL_NUR_S1_MASK)
-#define CSU_CSL_NSR_S1_MASK                      (0x80000U)
-#define CSU_CSL_NSR_S1_SHIFT                     (19U)
-#define CSU_CSL_NSR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S1_SHIFT)) & CSU_CSL_NSR_S1_MASK)
-#define CSU_CSL_SUW_S1_MASK                      (0x100000U)
-#define CSU_CSL_SUW_S1_SHIFT                     (20U)
-#define CSU_CSL_SUW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S1_SHIFT)) & CSU_CSL_SUW_S1_MASK)
-#define CSU_CSL_SSW_S1_MASK                      (0x200000U)
-#define CSU_CSL_SSW_S1_SHIFT                     (21U)
-#define CSU_CSL_SSW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S1_SHIFT)) & CSU_CSL_SSW_S1_MASK)
-#define CSU_CSL_NUW_S1_MASK                      (0x400000U)
-#define CSU_CSL_NUW_S1_SHIFT                     (22U)
-#define CSU_CSL_NUW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S1_SHIFT)) & CSU_CSL_NUW_S1_MASK)
-#define CSU_CSL_NSW_S1_MASK                      (0x800000U)
-#define CSU_CSL_NSW_S1_SHIFT                     (23U)
-#define CSU_CSL_NSW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S1_SHIFT)) & CSU_CSL_NSW_S1_MASK)
-#define CSU_CSL_LOCK_S1_MASK                     (0x1000000U)
-#define CSU_CSL_LOCK_S1_SHIFT                    (24U)
-#define CSU_CSL_LOCK_S1(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S1_SHIFT)) & CSU_CSL_LOCK_S1_MASK)
+#define CSU_CSL_SUR_S2_MASK   (0x1U)
+#define CSU_CSL_SUR_S2_SHIFT  (0U)
+#define CSU_CSL_SUR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S2_SHIFT)) & CSU_CSL_SUR_S2_MASK)
+#define CSU_CSL_SSR_S2_MASK   (0x2U)
+#define CSU_CSL_SSR_S2_SHIFT  (1U)
+#define CSU_CSL_SSR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S2_SHIFT)) & CSU_CSL_SSR_S2_MASK)
+#define CSU_CSL_NUR_S2_MASK   (0x4U)
+#define CSU_CSL_NUR_S2_SHIFT  (2U)
+#define CSU_CSL_NUR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S2_SHIFT)) & CSU_CSL_NUR_S2_MASK)
+#define CSU_CSL_NSR_S2_MASK   (0x8U)
+#define CSU_CSL_NSR_S2_SHIFT  (3U)
+#define CSU_CSL_NSR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S2_SHIFT)) & CSU_CSL_NSR_S2_MASK)
+#define CSU_CSL_SUW_S2_MASK   (0x10U)
+#define CSU_CSL_SUW_S2_SHIFT  (4U)
+#define CSU_CSL_SUW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S2_SHIFT)) & CSU_CSL_SUW_S2_MASK)
+#define CSU_CSL_SSW_S2_MASK   (0x20U)
+#define CSU_CSL_SSW_S2_SHIFT  (5U)
+#define CSU_CSL_SSW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S2_SHIFT)) & CSU_CSL_SSW_S2_MASK)
+#define CSU_CSL_NUW_S2_MASK   (0x40U)
+#define CSU_CSL_NUW_S2_SHIFT  (6U)
+#define CSU_CSL_NUW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S2_SHIFT)) & CSU_CSL_NUW_S2_MASK)
+#define CSU_CSL_NSW_S2_MASK   (0x80U)
+#define CSU_CSL_NSW_S2_SHIFT  (7U)
+#define CSU_CSL_NSW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S2_SHIFT)) & CSU_CSL_NSW_S2_MASK)
+#define CSU_CSL_LOCK_S2_MASK  (0x100U)
+#define CSU_CSL_LOCK_S2_SHIFT (8U)
+#define CSU_CSL_LOCK_S2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S2_SHIFT)) & CSU_CSL_LOCK_S2_MASK)
+#define CSU_CSL_SUR_S1_MASK   (0x10000U)
+#define CSU_CSL_SUR_S1_SHIFT  (16U)
+#define CSU_CSL_SUR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S1_SHIFT)) & CSU_CSL_SUR_S1_MASK)
+#define CSU_CSL_SSR_S1_MASK   (0x20000U)
+#define CSU_CSL_SSR_S1_SHIFT  (17U)
+#define CSU_CSL_SSR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S1_SHIFT)) & CSU_CSL_SSR_S1_MASK)
+#define CSU_CSL_NUR_S1_MASK   (0x40000U)
+#define CSU_CSL_NUR_S1_SHIFT  (18U)
+#define CSU_CSL_NUR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S1_SHIFT)) & CSU_CSL_NUR_S1_MASK)
+#define CSU_CSL_NSR_S1_MASK   (0x80000U)
+#define CSU_CSL_NSR_S1_SHIFT  (19U)
+#define CSU_CSL_NSR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S1_SHIFT)) & CSU_CSL_NSR_S1_MASK)
+#define CSU_CSL_SUW_S1_MASK   (0x100000U)
+#define CSU_CSL_SUW_S1_SHIFT  (20U)
+#define CSU_CSL_SUW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S1_SHIFT)) & CSU_CSL_SUW_S1_MASK)
+#define CSU_CSL_SSW_S1_MASK   (0x200000U)
+#define CSU_CSL_SSW_S1_SHIFT  (21U)
+#define CSU_CSL_SSW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S1_SHIFT)) & CSU_CSL_SSW_S1_MASK)
+#define CSU_CSL_NUW_S1_MASK   (0x400000U)
+#define CSU_CSL_NUW_S1_SHIFT  (22U)
+#define CSU_CSL_NUW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S1_SHIFT)) & CSU_CSL_NUW_S1_MASK)
+#define CSU_CSL_NSW_S1_MASK   (0x800000U)
+#define CSU_CSL_NSW_S1_SHIFT  (23U)
+#define CSU_CSL_NSW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S1_SHIFT)) & CSU_CSL_NSW_S1_MASK)
+#define CSU_CSL_LOCK_S1_MASK  (0x1000000U)
+#define CSU_CSL_LOCK_S1_SHIFT (24U)
+#define CSU_CSL_LOCK_S1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S1_SHIFT)) & CSU_CSL_LOCK_S1_MASK)
 /*! @} */
 
 /* The count of CSU_CSL */
-#define CSU_CSL_COUNT                            (32U)
+#define CSU_CSL_COUNT (32U)
 
 /*! @name HP0 - HP0 register */
 /*! @{ */
-#define CSU_HP0_HP_DMA_MASK                      (0x4U)
-#define CSU_HP0_HP_DMA_SHIFT                     (2U)
-#define CSU_HP0_HP_DMA(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DMA_SHIFT)) & CSU_HP0_HP_DMA_MASK)
-#define CSU_HP0_L_DMA_MASK                       (0x8U)
-#define CSU_HP0_L_DMA_SHIFT                      (3U)
-#define CSU_HP0_L_DMA(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DMA_SHIFT)) & CSU_HP0_L_DMA_MASK)
-#define CSU_HP0_HP_LCDIF_MASK                    (0x10U)
-#define CSU_HP0_HP_LCDIF_SHIFT                   (4U)
-#define CSU_HP0_HP_LCDIF(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_LCDIF_SHIFT)) & CSU_HP0_HP_LCDIF_MASK)
-#define CSU_HP0_L_LCDIF_MASK                     (0x20U)
-#define CSU_HP0_L_LCDIF_SHIFT                    (5U)
-#define CSU_HP0_L_LCDIF(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_LCDIF_SHIFT)) & CSU_HP0_L_LCDIF_MASK)
-#define CSU_HP0_HP_CSI_MASK                      (0x40U)
-#define CSU_HP0_HP_CSI_SHIFT                     (6U)
-#define CSU_HP0_HP_CSI(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_CSI_SHIFT)) & CSU_HP0_HP_CSI_MASK)
-#define CSU_HP0_L_CSI_MASK                       (0x80U)
-#define CSU_HP0_L_CSI_SHIFT                      (7U)
-#define CSU_HP0_L_CSI(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_CSI_SHIFT)) & CSU_HP0_L_CSI_MASK)
-#define CSU_HP0_HP_PXP_MASK                      (0x100U)
-#define CSU_HP0_HP_PXP_SHIFT                     (8U)
-#define CSU_HP0_HP_PXP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_PXP_SHIFT)) & CSU_HP0_HP_PXP_MASK)
-#define CSU_HP0_L_PXP_MASK                       (0x200U)
-#define CSU_HP0_L_PXP_SHIFT                      (9U)
-#define CSU_HP0_L_PXP(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_PXP_SHIFT)) & CSU_HP0_L_PXP_MASK)
-#define CSU_HP0_HP_DCP_MASK                      (0x400U)
-#define CSU_HP0_HP_DCP_SHIFT                     (10U)
-#define CSU_HP0_HP_DCP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DCP_SHIFT)) & CSU_HP0_HP_DCP_MASK)
-#define CSU_HP0_L_DCP_MASK                       (0x800U)
-#define CSU_HP0_L_DCP_SHIFT                      (11U)
-#define CSU_HP0_L_DCP(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DCP_SHIFT)) & CSU_HP0_L_DCP_MASK)
-#define CSU_HP0_HP_ENET_MASK                     (0x4000U)
-#define CSU_HP0_HP_ENET_SHIFT                    (14U)
-#define CSU_HP0_HP_ENET(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_ENET_SHIFT)) & CSU_HP0_HP_ENET_MASK)
-#define CSU_HP0_L_ENET_MASK                      (0x8000U)
-#define CSU_HP0_L_ENET_SHIFT                     (15U)
-#define CSU_HP0_L_ENET(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_ENET_SHIFT)) & CSU_HP0_L_ENET_MASK)
-#define CSU_HP0_HP_USDHC1_MASK                   (0x10000U)
-#define CSU_HP0_HP_USDHC1_SHIFT                  (16U)
-#define CSU_HP0_HP_USDHC1(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC1_SHIFT)) & CSU_HP0_HP_USDHC1_MASK)
-#define CSU_HP0_L_USDHC1_MASK                    (0x20000U)
-#define CSU_HP0_L_USDHC1_SHIFT                   (17U)
-#define CSU_HP0_L_USDHC1(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC1_SHIFT)) & CSU_HP0_L_USDHC1_MASK)
-#define CSU_HP0_HP_USDHC2_MASK                   (0x40000U)
-#define CSU_HP0_HP_USDHC2_SHIFT                  (18U)
-#define CSU_HP0_HP_USDHC2(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC2_SHIFT)) & CSU_HP0_HP_USDHC2_MASK)
-#define CSU_HP0_L_USDHC2_MASK                    (0x80000U)
-#define CSU_HP0_L_USDHC2_SHIFT                   (19U)
-#define CSU_HP0_L_USDHC2(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC2_SHIFT)) & CSU_HP0_L_USDHC2_MASK)
-#define CSU_HP0_HP_TPSMP_MASK                    (0x100000U)
-#define CSU_HP0_HP_TPSMP_SHIFT                   (20U)
-#define CSU_HP0_HP_TPSMP(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_TPSMP_SHIFT)) & CSU_HP0_HP_TPSMP_MASK)
-#define CSU_HP0_L_TPSMP_MASK                     (0x200000U)
-#define CSU_HP0_L_TPSMP_SHIFT                    (21U)
-#define CSU_HP0_L_TPSMP(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_TPSMP_SHIFT)) & CSU_HP0_L_TPSMP_MASK)
-#define CSU_HP0_HP_USB_MASK                      (0x400000U)
-#define CSU_HP0_HP_USB_SHIFT                     (22U)
-#define CSU_HP0_HP_USB(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USB_SHIFT)) & CSU_HP0_HP_USB_MASK)
-#define CSU_HP0_L_USB_MASK                       (0x800000U)
-#define CSU_HP0_L_USB_SHIFT                      (23U)
-#define CSU_HP0_L_USB(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USB_SHIFT)) & CSU_HP0_L_USB_MASK)
+#define CSU_HP0_HP_DMA_MASK     (0x4U)
+#define CSU_HP0_HP_DMA_SHIFT    (2U)
+#define CSU_HP0_HP_DMA(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DMA_SHIFT)) & CSU_HP0_HP_DMA_MASK)
+#define CSU_HP0_L_DMA_MASK      (0x8U)
+#define CSU_HP0_L_DMA_SHIFT     (3U)
+#define CSU_HP0_L_DMA(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DMA_SHIFT)) & CSU_HP0_L_DMA_MASK)
+#define CSU_HP0_HP_LCDIF_MASK   (0x10U)
+#define CSU_HP0_HP_LCDIF_SHIFT  (4U)
+#define CSU_HP0_HP_LCDIF(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_LCDIF_SHIFT)) & CSU_HP0_HP_LCDIF_MASK)
+#define CSU_HP0_L_LCDIF_MASK    (0x20U)
+#define CSU_HP0_L_LCDIF_SHIFT   (5U)
+#define CSU_HP0_L_LCDIF(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_LCDIF_SHIFT)) & CSU_HP0_L_LCDIF_MASK)
+#define CSU_HP0_HP_CSI_MASK     (0x40U)
+#define CSU_HP0_HP_CSI_SHIFT    (6U)
+#define CSU_HP0_HP_CSI(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_CSI_SHIFT)) & CSU_HP0_HP_CSI_MASK)
+#define CSU_HP0_L_CSI_MASK      (0x80U)
+#define CSU_HP0_L_CSI_SHIFT     (7U)
+#define CSU_HP0_L_CSI(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_CSI_SHIFT)) & CSU_HP0_L_CSI_MASK)
+#define CSU_HP0_HP_PXP_MASK     (0x100U)
+#define CSU_HP0_HP_PXP_SHIFT    (8U)
+#define CSU_HP0_HP_PXP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_PXP_SHIFT)) & CSU_HP0_HP_PXP_MASK)
+#define CSU_HP0_L_PXP_MASK      (0x200U)
+#define CSU_HP0_L_PXP_SHIFT     (9U)
+#define CSU_HP0_L_PXP(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_PXP_SHIFT)) & CSU_HP0_L_PXP_MASK)
+#define CSU_HP0_HP_DCP_MASK     (0x400U)
+#define CSU_HP0_HP_DCP_SHIFT    (10U)
+#define CSU_HP0_HP_DCP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DCP_SHIFT)) & CSU_HP0_HP_DCP_MASK)
+#define CSU_HP0_L_DCP_MASK      (0x800U)
+#define CSU_HP0_L_DCP_SHIFT     (11U)
+#define CSU_HP0_L_DCP(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DCP_SHIFT)) & CSU_HP0_L_DCP_MASK)
+#define CSU_HP0_HP_ENET_MASK    (0x4000U)
+#define CSU_HP0_HP_ENET_SHIFT   (14U)
+#define CSU_HP0_HP_ENET(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_ENET_SHIFT)) & CSU_HP0_HP_ENET_MASK)
+#define CSU_HP0_L_ENET_MASK     (0x8000U)
+#define CSU_HP0_L_ENET_SHIFT    (15U)
+#define CSU_HP0_L_ENET(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_ENET_SHIFT)) & CSU_HP0_L_ENET_MASK)
+#define CSU_HP0_HP_USDHC1_MASK  (0x10000U)
+#define CSU_HP0_HP_USDHC1_SHIFT (16U)
+#define CSU_HP0_HP_USDHC1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC1_SHIFT)) & CSU_HP0_HP_USDHC1_MASK)
+#define CSU_HP0_L_USDHC1_MASK   (0x20000U)
+#define CSU_HP0_L_USDHC1_SHIFT  (17U)
+#define CSU_HP0_L_USDHC1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC1_SHIFT)) & CSU_HP0_L_USDHC1_MASK)
+#define CSU_HP0_HP_USDHC2_MASK  (0x40000U)
+#define CSU_HP0_HP_USDHC2_SHIFT (18U)
+#define CSU_HP0_HP_USDHC2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC2_SHIFT)) & CSU_HP0_HP_USDHC2_MASK)
+#define CSU_HP0_L_USDHC2_MASK   (0x80000U)
+#define CSU_HP0_L_USDHC2_SHIFT  (19U)
+#define CSU_HP0_L_USDHC2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC2_SHIFT)) & CSU_HP0_L_USDHC2_MASK)
+#define CSU_HP0_HP_TPSMP_MASK   (0x100000U)
+#define CSU_HP0_HP_TPSMP_SHIFT  (20U)
+#define CSU_HP0_HP_TPSMP(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_TPSMP_SHIFT)) & CSU_HP0_HP_TPSMP_MASK)
+#define CSU_HP0_L_TPSMP_MASK    (0x200000U)
+#define CSU_HP0_L_TPSMP_SHIFT   (21U)
+#define CSU_HP0_L_TPSMP(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_TPSMP_SHIFT)) & CSU_HP0_L_TPSMP_MASK)
+#define CSU_HP0_HP_USB_MASK     (0x400000U)
+#define CSU_HP0_HP_USB_SHIFT    (22U)
+#define CSU_HP0_HP_USB(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USB_SHIFT)) & CSU_HP0_HP_USB_MASK)
+#define CSU_HP0_L_USB_MASK      (0x800000U)
+#define CSU_HP0_L_USB_SHIFT     (23U)
+#define CSU_HP0_L_USB(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USB_SHIFT)) & CSU_HP0_L_USB_MASK)
 /*! @} */
 
 /*! @name SA - Secure access register */
 /*! @{ */
-#define CSU_SA_NSA_DMA_MASK                      (0x4U)
-#define CSU_SA_NSA_DMA_SHIFT                     (2U)
-#define CSU_SA_NSA_DMA(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DMA_SHIFT)) & CSU_SA_NSA_DMA_MASK)
-#define CSU_SA_L_DMA_MASK                        (0x8U)
-#define CSU_SA_L_DMA_SHIFT                       (3U)
-#define CSU_SA_L_DMA(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DMA_SHIFT)) & CSU_SA_L_DMA_MASK)
-#define CSU_SA_NSA_LCDIF_MASK                    (0x10U)
-#define CSU_SA_NSA_LCDIF_SHIFT                   (4U)
-#define CSU_SA_NSA_LCDIF(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_LCDIF_SHIFT)) & CSU_SA_NSA_LCDIF_MASK)
-#define CSU_SA_L_LCDIF_MASK                      (0x20U)
-#define CSU_SA_L_LCDIF_SHIFT                     (5U)
-#define CSU_SA_L_LCDIF(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_LCDIF_SHIFT)) & CSU_SA_L_LCDIF_MASK)
-#define CSU_SA_NSA_CSI_MASK                      (0x40U)
-#define CSU_SA_NSA_CSI_SHIFT                     (6U)
-#define CSU_SA_NSA_CSI(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_CSI_SHIFT)) & CSU_SA_NSA_CSI_MASK)
-#define CSU_SA_L_CSI_MASK                        (0x80U)
-#define CSU_SA_L_CSI_SHIFT                       (7U)
-#define CSU_SA_L_CSI(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_CSI_SHIFT)) & CSU_SA_L_CSI_MASK)
-#define CSU_SA_NSA_PXP_MASK                      (0x100U)
-#define CSU_SA_NSA_PXP_SHIFT                     (8U)
-#define CSU_SA_NSA_PXP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_PXP_SHIFT)) & CSU_SA_NSA_PXP_MASK)
-#define CSU_SA_L_PXP_MASK                        (0x200U)
-#define CSU_SA_L_PXP_SHIFT                       (9U)
-#define CSU_SA_L_PXP(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_PXP_SHIFT)) & CSU_SA_L_PXP_MASK)
-#define CSU_SA_NSA_DCP_MASK                      (0x400U)
-#define CSU_SA_NSA_DCP_SHIFT                     (10U)
-#define CSU_SA_NSA_DCP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DCP_SHIFT)) & CSU_SA_NSA_DCP_MASK)
-#define CSU_SA_L_DCP_MASK                        (0x800U)
-#define CSU_SA_L_DCP_SHIFT                       (11U)
-#define CSU_SA_L_DCP(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DCP_SHIFT)) & CSU_SA_L_DCP_MASK)
-#define CSU_SA_NSA_ENET_MASK                     (0x4000U)
-#define CSU_SA_NSA_ENET_SHIFT                    (14U)
-#define CSU_SA_NSA_ENET(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_ENET_SHIFT)) & CSU_SA_NSA_ENET_MASK)
-#define CSU_SA_L_ENET_MASK                       (0x8000U)
-#define CSU_SA_L_ENET_SHIFT                      (15U)
-#define CSU_SA_L_ENET(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_ENET_SHIFT)) & CSU_SA_L_ENET_MASK)
-#define CSU_SA_NSA_USDHC1_MASK                   (0x10000U)
-#define CSU_SA_NSA_USDHC1_SHIFT                  (16U)
-#define CSU_SA_NSA_USDHC1(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC1_SHIFT)) & CSU_SA_NSA_USDHC1_MASK)
-#define CSU_SA_L_USDHC1_MASK                     (0x20000U)
-#define CSU_SA_L_USDHC1_SHIFT                    (17U)
-#define CSU_SA_L_USDHC1(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC1_SHIFT)) & CSU_SA_L_USDHC1_MASK)
-#define CSU_SA_NSA_USDHC2_MASK                   (0x40000U)
-#define CSU_SA_NSA_USDHC2_SHIFT                  (18U)
-#define CSU_SA_NSA_USDHC2(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC2_SHIFT)) & CSU_SA_NSA_USDHC2_MASK)
-#define CSU_SA_L_USDHC2_MASK                     (0x80000U)
-#define CSU_SA_L_USDHC2_SHIFT                    (19U)
-#define CSU_SA_L_USDHC2(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC2_SHIFT)) & CSU_SA_L_USDHC2_MASK)
-#define CSU_SA_NSA_TPSMP_MASK                    (0x100000U)
-#define CSU_SA_NSA_TPSMP_SHIFT                   (20U)
-#define CSU_SA_NSA_TPSMP(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_TPSMP_SHIFT)) & CSU_SA_NSA_TPSMP_MASK)
-#define CSU_SA_L_TPSMP_MASK                      (0x200000U)
-#define CSU_SA_L_TPSMP_SHIFT                     (21U)
-#define CSU_SA_L_TPSMP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_TPSMP_SHIFT)) & CSU_SA_L_TPSMP_MASK)
-#define CSU_SA_NSA_USB_MASK                      (0x400000U)
-#define CSU_SA_NSA_USB_SHIFT                     (22U)
-#define CSU_SA_NSA_USB(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USB_SHIFT)) & CSU_SA_NSA_USB_MASK)
-#define CSU_SA_L_USB_MASK                        (0x800000U)
-#define CSU_SA_L_USB_SHIFT                       (23U)
-#define CSU_SA_L_USB(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USB_SHIFT)) & CSU_SA_L_USB_MASK)
+#define CSU_SA_NSA_DMA_MASK     (0x4U)
+#define CSU_SA_NSA_DMA_SHIFT    (2U)
+#define CSU_SA_NSA_DMA(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DMA_SHIFT)) & CSU_SA_NSA_DMA_MASK)
+#define CSU_SA_L_DMA_MASK       (0x8U)
+#define CSU_SA_L_DMA_SHIFT      (3U)
+#define CSU_SA_L_DMA(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DMA_SHIFT)) & CSU_SA_L_DMA_MASK)
+#define CSU_SA_NSA_LCDIF_MASK   (0x10U)
+#define CSU_SA_NSA_LCDIF_SHIFT  (4U)
+#define CSU_SA_NSA_LCDIF(x)     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_LCDIF_SHIFT)) & CSU_SA_NSA_LCDIF_MASK)
+#define CSU_SA_L_LCDIF_MASK     (0x20U)
+#define CSU_SA_L_LCDIF_SHIFT    (5U)
+#define CSU_SA_L_LCDIF(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_LCDIF_SHIFT)) & CSU_SA_L_LCDIF_MASK)
+#define CSU_SA_NSA_CSI_MASK     (0x40U)
+#define CSU_SA_NSA_CSI_SHIFT    (6U)
+#define CSU_SA_NSA_CSI(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_CSI_SHIFT)) & CSU_SA_NSA_CSI_MASK)
+#define CSU_SA_L_CSI_MASK       (0x80U)
+#define CSU_SA_L_CSI_SHIFT      (7U)
+#define CSU_SA_L_CSI(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_CSI_SHIFT)) & CSU_SA_L_CSI_MASK)
+#define CSU_SA_NSA_PXP_MASK     (0x100U)
+#define CSU_SA_NSA_PXP_SHIFT    (8U)
+#define CSU_SA_NSA_PXP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_PXP_SHIFT)) & CSU_SA_NSA_PXP_MASK)
+#define CSU_SA_L_PXP_MASK       (0x200U)
+#define CSU_SA_L_PXP_SHIFT      (9U)
+#define CSU_SA_L_PXP(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_PXP_SHIFT)) & CSU_SA_L_PXP_MASK)
+#define CSU_SA_NSA_DCP_MASK     (0x400U)
+#define CSU_SA_NSA_DCP_SHIFT    (10U)
+#define CSU_SA_NSA_DCP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DCP_SHIFT)) & CSU_SA_NSA_DCP_MASK)
+#define CSU_SA_L_DCP_MASK       (0x800U)
+#define CSU_SA_L_DCP_SHIFT      (11U)
+#define CSU_SA_L_DCP(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DCP_SHIFT)) & CSU_SA_L_DCP_MASK)
+#define CSU_SA_NSA_ENET_MASK    (0x4000U)
+#define CSU_SA_NSA_ENET_SHIFT   (14U)
+#define CSU_SA_NSA_ENET(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_ENET_SHIFT)) & CSU_SA_NSA_ENET_MASK)
+#define CSU_SA_L_ENET_MASK      (0x8000U)
+#define CSU_SA_L_ENET_SHIFT     (15U)
+#define CSU_SA_L_ENET(x)        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_ENET_SHIFT)) & CSU_SA_L_ENET_MASK)
+#define CSU_SA_NSA_USDHC1_MASK  (0x10000U)
+#define CSU_SA_NSA_USDHC1_SHIFT (16U)
+#define CSU_SA_NSA_USDHC1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC1_SHIFT)) & CSU_SA_NSA_USDHC1_MASK)
+#define CSU_SA_L_USDHC1_MASK    (0x20000U)
+#define CSU_SA_L_USDHC1_SHIFT   (17U)
+#define CSU_SA_L_USDHC1(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC1_SHIFT)) & CSU_SA_L_USDHC1_MASK)
+#define CSU_SA_NSA_USDHC2_MASK  (0x40000U)
+#define CSU_SA_NSA_USDHC2_SHIFT (18U)
+#define CSU_SA_NSA_USDHC2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC2_SHIFT)) & CSU_SA_NSA_USDHC2_MASK)
+#define CSU_SA_L_USDHC2_MASK    (0x80000U)
+#define CSU_SA_L_USDHC2_SHIFT   (19U)
+#define CSU_SA_L_USDHC2(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC2_SHIFT)) & CSU_SA_L_USDHC2_MASK)
+#define CSU_SA_NSA_TPSMP_MASK   (0x100000U)
+#define CSU_SA_NSA_TPSMP_SHIFT  (20U)
+#define CSU_SA_NSA_TPSMP(x)     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_TPSMP_SHIFT)) & CSU_SA_NSA_TPSMP_MASK)
+#define CSU_SA_L_TPSMP_MASK     (0x200000U)
+#define CSU_SA_L_TPSMP_SHIFT    (21U)
+#define CSU_SA_L_TPSMP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_TPSMP_SHIFT)) & CSU_SA_L_TPSMP_MASK)
+#define CSU_SA_NSA_USB_MASK     (0x400000U)
+#define CSU_SA_NSA_USB_SHIFT    (22U)
+#define CSU_SA_NSA_USB(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USB_SHIFT)) & CSU_SA_NSA_USB_MASK)
+#define CSU_SA_L_USB_MASK       (0x800000U)
+#define CSU_SA_L_USB_SHIFT      (23U)
+#define CSU_SA_L_USB(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USB_SHIFT)) & CSU_SA_L_USB_MASK)
 /*! @} */
 
 /*! @name HPCONTROL0 - HPCONTROL0 register */
 /*! @{ */
-#define CSU_HPCONTROL0_HPC_DMA_MASK              (0x4U)
-#define CSU_HPCONTROL0_HPC_DMA_SHIFT             (2U)
-#define CSU_HPCONTROL0_HPC_DMA(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DMA_SHIFT)) & CSU_HPCONTROL0_HPC_DMA_MASK)
-#define CSU_HPCONTROL0_L_DMA_MASK                (0x8U)
-#define CSU_HPCONTROL0_L_DMA_SHIFT               (3U)
-#define CSU_HPCONTROL0_L_DMA(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DMA_SHIFT)) & CSU_HPCONTROL0_L_DMA_MASK)
-#define CSU_HPCONTROL0_HPC_LCDIF_MASK            (0x10U)
-#define CSU_HPCONTROL0_HPC_LCDIF_SHIFT           (4U)
-#define CSU_HPCONTROL0_HPC_LCDIF(x)              (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_LCDIF_SHIFT)) & CSU_HPCONTROL0_HPC_LCDIF_MASK)
-#define CSU_HPCONTROL0_L_LCDIF_MASK              (0x20U)
-#define CSU_HPCONTROL0_L_LCDIF_SHIFT             (5U)
-#define CSU_HPCONTROL0_L_LCDIF(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_LCDIF_SHIFT)) & CSU_HPCONTROL0_L_LCDIF_MASK)
-#define CSU_HPCONTROL0_HPC_CSI_MASK              (0x40U)
-#define CSU_HPCONTROL0_HPC_CSI_SHIFT             (6U)
-#define CSU_HPCONTROL0_HPC_CSI(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_CSI_SHIFT)) & CSU_HPCONTROL0_HPC_CSI_MASK)
-#define CSU_HPCONTROL0_L_CSI_MASK                (0x80U)
-#define CSU_HPCONTROL0_L_CSI_SHIFT               (7U)
-#define CSU_HPCONTROL0_L_CSI(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_CSI_SHIFT)) & CSU_HPCONTROL0_L_CSI_MASK)
-#define CSU_HPCONTROL0_HPC_PXP_MASK              (0x100U)
-#define CSU_HPCONTROL0_HPC_PXP_SHIFT             (8U)
-#define CSU_HPCONTROL0_HPC_PXP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_PXP_SHIFT)) & CSU_HPCONTROL0_HPC_PXP_MASK)
-#define CSU_HPCONTROL0_L_PXP_MASK                (0x200U)
-#define CSU_HPCONTROL0_L_PXP_SHIFT               (9U)
-#define CSU_HPCONTROL0_L_PXP(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_PXP_SHIFT)) & CSU_HPCONTROL0_L_PXP_MASK)
-#define CSU_HPCONTROL0_HPC_DCP_MASK              (0x400U)
-#define CSU_HPCONTROL0_HPC_DCP_SHIFT             (10U)
-#define CSU_HPCONTROL0_HPC_DCP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DCP_SHIFT)) & CSU_HPCONTROL0_HPC_DCP_MASK)
-#define CSU_HPCONTROL0_L_DCP_MASK                (0x800U)
-#define CSU_HPCONTROL0_L_DCP_SHIFT               (11U)
-#define CSU_HPCONTROL0_L_DCP(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DCP_SHIFT)) & CSU_HPCONTROL0_L_DCP_MASK)
-#define CSU_HPCONTROL0_HPC_ENET_MASK             (0x4000U)
-#define CSU_HPCONTROL0_HPC_ENET_SHIFT            (14U)
-#define CSU_HPCONTROL0_HPC_ENET(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_ENET_SHIFT)) & CSU_HPCONTROL0_HPC_ENET_MASK)
-#define CSU_HPCONTROL0_L_ENET_MASK               (0x8000U)
-#define CSU_HPCONTROL0_L_ENET_SHIFT              (15U)
-#define CSU_HPCONTROL0_L_ENET(x)                 (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_ENET_SHIFT)) & CSU_HPCONTROL0_L_ENET_MASK)
-#define CSU_HPCONTROL0_HPC_USDHC1_MASK           (0x10000U)
-#define CSU_HPCONTROL0_HPC_USDHC1_SHIFT          (16U)
-#define CSU_HPCONTROL0_HPC_USDHC1(x)             (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC1_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC1_MASK)
-#define CSU_HPCONTROL0_L_USDHC1_MASK             (0x20000U)
-#define CSU_HPCONTROL0_L_USDHC1_SHIFT            (17U)
-#define CSU_HPCONTROL0_L_USDHC1(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC1_SHIFT)) & CSU_HPCONTROL0_L_USDHC1_MASK)
-#define CSU_HPCONTROL0_HPC_USDHC2_MASK           (0x40000U)
-#define CSU_HPCONTROL0_HPC_USDHC2_SHIFT          (18U)
-#define CSU_HPCONTROL0_HPC_USDHC2(x)             (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC2_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC2_MASK)
-#define CSU_HPCONTROL0_L_USDHC2_MASK             (0x80000U)
-#define CSU_HPCONTROL0_L_USDHC2_SHIFT            (19U)
-#define CSU_HPCONTROL0_L_USDHC2(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC2_SHIFT)) & CSU_HPCONTROL0_L_USDHC2_MASK)
-#define CSU_HPCONTROL0_HPC_TPSMP_MASK            (0x100000U)
-#define CSU_HPCONTROL0_HPC_TPSMP_SHIFT           (20U)
-#define CSU_HPCONTROL0_HPC_TPSMP(x)              (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_TPSMP_SHIFT)) & CSU_HPCONTROL0_HPC_TPSMP_MASK)
-#define CSU_HPCONTROL0_L_TPSMP_MASK              (0x200000U)
-#define CSU_HPCONTROL0_L_TPSMP_SHIFT             (21U)
-#define CSU_HPCONTROL0_L_TPSMP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_TPSMP_SHIFT)) & CSU_HPCONTROL0_L_TPSMP_MASK)
-#define CSU_HPCONTROL0_HPC_USB_MASK              (0x400000U)
-#define CSU_HPCONTROL0_HPC_USB_SHIFT             (22U)
-#define CSU_HPCONTROL0_HPC_USB(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USB_SHIFT)) & CSU_HPCONTROL0_HPC_USB_MASK)
-#define CSU_HPCONTROL0_L_USB_MASK                (0x800000U)
-#define CSU_HPCONTROL0_L_USB_SHIFT               (23U)
-#define CSU_HPCONTROL0_L_USB(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USB_SHIFT)) & CSU_HPCONTROL0_L_USB_MASK)
+#define CSU_HPCONTROL0_HPC_DMA_MASK  (0x4U)
+#define CSU_HPCONTROL0_HPC_DMA_SHIFT (2U)
+#define CSU_HPCONTROL0_HPC_DMA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DMA_SHIFT)) & CSU_HPCONTROL0_HPC_DMA_MASK)
+#define CSU_HPCONTROL0_L_DMA_MASK  (0x8U)
+#define CSU_HPCONTROL0_L_DMA_SHIFT (3U)
+#define CSU_HPCONTROL0_L_DMA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DMA_SHIFT)) & CSU_HPCONTROL0_L_DMA_MASK)
+#define CSU_HPCONTROL0_HPC_LCDIF_MASK  (0x10U)
+#define CSU_HPCONTROL0_HPC_LCDIF_SHIFT (4U)
+#define CSU_HPCONTROL0_HPC_LCDIF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_LCDIF_SHIFT)) & CSU_HPCONTROL0_HPC_LCDIF_MASK)
+#define CSU_HPCONTROL0_L_LCDIF_MASK  (0x20U)
+#define CSU_HPCONTROL0_L_LCDIF_SHIFT (5U)
+#define CSU_HPCONTROL0_L_LCDIF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_LCDIF_SHIFT)) & CSU_HPCONTROL0_L_LCDIF_MASK)
+#define CSU_HPCONTROL0_HPC_CSI_MASK  (0x40U)
+#define CSU_HPCONTROL0_HPC_CSI_SHIFT (6U)
+#define CSU_HPCONTROL0_HPC_CSI(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_CSI_SHIFT)) & CSU_HPCONTROL0_HPC_CSI_MASK)
+#define CSU_HPCONTROL0_L_CSI_MASK  (0x80U)
+#define CSU_HPCONTROL0_L_CSI_SHIFT (7U)
+#define CSU_HPCONTROL0_L_CSI(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_CSI_SHIFT)) & CSU_HPCONTROL0_L_CSI_MASK)
+#define CSU_HPCONTROL0_HPC_PXP_MASK  (0x100U)
+#define CSU_HPCONTROL0_HPC_PXP_SHIFT (8U)
+#define CSU_HPCONTROL0_HPC_PXP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_PXP_SHIFT)) & CSU_HPCONTROL0_HPC_PXP_MASK)
+#define CSU_HPCONTROL0_L_PXP_MASK  (0x200U)
+#define CSU_HPCONTROL0_L_PXP_SHIFT (9U)
+#define CSU_HPCONTROL0_L_PXP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_PXP_SHIFT)) & CSU_HPCONTROL0_L_PXP_MASK)
+#define CSU_HPCONTROL0_HPC_DCP_MASK  (0x400U)
+#define CSU_HPCONTROL0_HPC_DCP_SHIFT (10U)
+#define CSU_HPCONTROL0_HPC_DCP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DCP_SHIFT)) & CSU_HPCONTROL0_HPC_DCP_MASK)
+#define CSU_HPCONTROL0_L_DCP_MASK  (0x800U)
+#define CSU_HPCONTROL0_L_DCP_SHIFT (11U)
+#define CSU_HPCONTROL0_L_DCP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DCP_SHIFT)) & CSU_HPCONTROL0_L_DCP_MASK)
+#define CSU_HPCONTROL0_HPC_ENET_MASK  (0x4000U)
+#define CSU_HPCONTROL0_HPC_ENET_SHIFT (14U)
+#define CSU_HPCONTROL0_HPC_ENET(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_ENET_SHIFT)) & CSU_HPCONTROL0_HPC_ENET_MASK)
+#define CSU_HPCONTROL0_L_ENET_MASK  (0x8000U)
+#define CSU_HPCONTROL0_L_ENET_SHIFT (15U)
+#define CSU_HPCONTROL0_L_ENET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_ENET_SHIFT)) & CSU_HPCONTROL0_L_ENET_MASK)
+#define CSU_HPCONTROL0_HPC_USDHC1_MASK  (0x10000U)
+#define CSU_HPCONTROL0_HPC_USDHC1_SHIFT (16U)
+#define CSU_HPCONTROL0_HPC_USDHC1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC1_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC1_MASK)
+#define CSU_HPCONTROL0_L_USDHC1_MASK  (0x20000U)
+#define CSU_HPCONTROL0_L_USDHC1_SHIFT (17U)
+#define CSU_HPCONTROL0_L_USDHC1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC1_SHIFT)) & CSU_HPCONTROL0_L_USDHC1_MASK)
+#define CSU_HPCONTROL0_HPC_USDHC2_MASK  (0x40000U)
+#define CSU_HPCONTROL0_HPC_USDHC2_SHIFT (18U)
+#define CSU_HPCONTROL0_HPC_USDHC2(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC2_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC2_MASK)
+#define CSU_HPCONTROL0_L_USDHC2_MASK  (0x80000U)
+#define CSU_HPCONTROL0_L_USDHC2_SHIFT (19U)
+#define CSU_HPCONTROL0_L_USDHC2(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC2_SHIFT)) & CSU_HPCONTROL0_L_USDHC2_MASK)
+#define CSU_HPCONTROL0_HPC_TPSMP_MASK  (0x100000U)
+#define CSU_HPCONTROL0_HPC_TPSMP_SHIFT (20U)
+#define CSU_HPCONTROL0_HPC_TPSMP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_TPSMP_SHIFT)) & CSU_HPCONTROL0_HPC_TPSMP_MASK)
+#define CSU_HPCONTROL0_L_TPSMP_MASK  (0x200000U)
+#define CSU_HPCONTROL0_L_TPSMP_SHIFT (21U)
+#define CSU_HPCONTROL0_L_TPSMP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_TPSMP_SHIFT)) & CSU_HPCONTROL0_L_TPSMP_MASK)
+#define CSU_HPCONTROL0_HPC_USB_MASK  (0x400000U)
+#define CSU_HPCONTROL0_HPC_USB_SHIFT (22U)
+#define CSU_HPCONTROL0_HPC_USB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USB_SHIFT)) & CSU_HPCONTROL0_HPC_USB_MASK)
+#define CSU_HPCONTROL0_L_USB_MASK  (0x800000U)
+#define CSU_HPCONTROL0_L_USB_SHIFT (23U)
+#define CSU_HPCONTROL0_L_USB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USB_SHIFT)) & CSU_HPCONTROL0_L_USB_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CSU_Register_Masks */
 
-
 /* CSU - Peripheral instance base addresses */
 /** Peripheral CSU base address */
-#define CSU_BASE                                 (0x400DC000u)
+#define CSU_BASE (0x400DC000u)
 /** Peripheral CSU base pointer */
-#define CSU                                      ((CSU_Type *)CSU_BASE)
+#define CSU ((CSU_Type *)CSU_BASE)
 /** Array initializer of CSU peripheral base addresses */
-#define CSU_BASE_ADDRS                           { CSU_BASE }
+#define CSU_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        CSU_BASE                                                                                                       \
+    }
 /** Array initializer of CSU peripheral base pointers */
-#define CSU_BASE_PTRS                            { CSU }
+#define CSU_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        CSU                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group CSU_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DCDC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6114,11 +7231,12 @@ typedef struct {
  */
 
 /** DCDC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t REG0;                              /**< DCDC Register 0, offset: 0x0 */
-  __IO uint32_t REG1;                              /**< DCDC Register 1, offset: 0x4 */
-  __IO uint32_t REG2;                              /**< DCDC Register 2, offset: 0x8 */
-  __IO uint32_t REG3;                              /**< DCDC Register 3, offset: 0xC */
+typedef struct
+{
+    __IO uint32_t REG0; /**< DCDC Register 0, offset: 0x0 */
+    __IO uint32_t REG1; /**< DCDC Register 1, offset: 0x4 */
+    __IO uint32_t REG2; /**< DCDC Register 2, offset: 0x8 */
+    __IO uint32_t REG3; /**< DCDC Register 3, offset: 0xC */
 } DCDC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -6132,163 +7250,203 @@ typedef struct {
 
 /*! @name REG0 - DCDC Register 0 */
 /*! @{ */
-#define DCDC_REG0_PWD_ZCD_MASK                   (0x1U)
-#define DCDC_REG0_PWD_ZCD_SHIFT                  (0U)
-#define DCDC_REG0_PWD_ZCD(x)                     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_ZCD_SHIFT)) & DCDC_REG0_PWD_ZCD_MASK)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK   (0x2U)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT  (1U)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH(x)     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT)) & DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK)
-#define DCDC_REG0_SEL_CLK_MASK                   (0x4U)
-#define DCDC_REG0_SEL_CLK_SHIFT                  (2U)
-#define DCDC_REG0_SEL_CLK(x)                     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_SEL_CLK_SHIFT)) & DCDC_REG0_SEL_CLK_MASK)
-#define DCDC_REG0_PWD_OSC_INT_MASK               (0x8U)
-#define DCDC_REG0_PWD_OSC_INT_SHIFT              (3U)
-#define DCDC_REG0_PWD_OSC_INT(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OSC_INT_SHIFT)) & DCDC_REG0_PWD_OSC_INT_MASK)
-#define DCDC_REG0_PWD_CUR_SNS_CMP_MASK           (0x10U)
-#define DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT          (4U)
-#define DCDC_REG0_PWD_CUR_SNS_CMP(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT)) & DCDC_REG0_PWD_CUR_SNS_CMP_MASK)
-#define DCDC_REG0_CUR_SNS_THRSH_MASK             (0xE0U)
-#define DCDC_REG0_CUR_SNS_THRSH_SHIFT            (5U)
-#define DCDC_REG0_CUR_SNS_THRSH(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CUR_SNS_THRSH_SHIFT)) & DCDC_REG0_CUR_SNS_THRSH_MASK)
-#define DCDC_REG0_PWD_OVERCUR_DET_MASK           (0x100U)
-#define DCDC_REG0_PWD_OVERCUR_DET_SHIFT          (8U)
-#define DCDC_REG0_PWD_OVERCUR_DET(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OVERCUR_DET_SHIFT)) & DCDC_REG0_PWD_OVERCUR_DET_MASK)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ_MASK          (0x600U)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT         (9U)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT)) & DCDC_REG0_OVERCUR_TRIG_ADJ_MASK)
-#define DCDC_REG0_PWD_CMP_BATT_DET_MASK          (0x800U)
-#define DCDC_REG0_PWD_CMP_BATT_DET_SHIFT         (11U)
-#define DCDC_REG0_PWD_CMP_BATT_DET(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_BATT_DET_SHIFT)) & DCDC_REG0_PWD_CMP_BATT_DET_MASK)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK         (0xF000U)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT        (12U)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT)) & DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK        (0x10000U)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT       (16U)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT)) & DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET_MASK         (0x20000U)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT        (17U)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT)) & DCDC_REG0_PWD_HIGH_VOLT_DET_MASK)
-#define DCDC_REG0_LP_OVERLOAD_THRSH_MASK         (0xC0000U)
-#define DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT        (18U)
-#define DCDC_REG0_LP_OVERLOAD_THRSH(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT)) & DCDC_REG0_LP_OVERLOAD_THRSH_MASK)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK      (0x100000U)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT     (20U)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL(x)        (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT)) & DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK)
-#define DCDC_REG0_LP_HIGH_HYS_MASK               (0x200000U)
-#define DCDC_REG0_LP_HIGH_HYS_SHIFT              (21U)
-#define DCDC_REG0_LP_HIGH_HYS(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_HIGH_HYS_SHIFT)) & DCDC_REG0_LP_HIGH_HYS_MASK)
-#define DCDC_REG0_PWD_CMP_OFFSET_MASK            (0x4000000U)
-#define DCDC_REG0_PWD_CMP_OFFSET_SHIFT           (26U)
-#define DCDC_REG0_PWD_CMP_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_OFFSET_SHIFT)) & DCDC_REG0_PWD_CMP_OFFSET_MASK)
-#define DCDC_REG0_XTALOK_DISABLE_MASK            (0x8000000U)
-#define DCDC_REG0_XTALOK_DISABLE_SHIFT           (27U)
-#define DCDC_REG0_XTALOK_DISABLE(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTALOK_DISABLE_SHIFT)) & DCDC_REG0_XTALOK_DISABLE_MASK)
-#define DCDC_REG0_CURRENT_ALERT_RESET_MASK       (0x10000000U)
-#define DCDC_REG0_CURRENT_ALERT_RESET_SHIFT      (28U)
-#define DCDC_REG0_CURRENT_ALERT_RESET(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CURRENT_ALERT_RESET_SHIFT)) & DCDC_REG0_CURRENT_ALERT_RESET_MASK)
-#define DCDC_REG0_XTAL_24M_OK_MASK               (0x20000000U)
-#define DCDC_REG0_XTAL_24M_OK_SHIFT              (29U)
-#define DCDC_REG0_XTAL_24M_OK(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTAL_24M_OK_SHIFT)) & DCDC_REG0_XTAL_24M_OK_MASK)
-#define DCDC_REG0_STS_DC_OK_MASK                 (0x80000000U)
-#define DCDC_REG0_STS_DC_OK_SHIFT                (31U)
-#define DCDC_REG0_STS_DC_OK(x)                   (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_STS_DC_OK_SHIFT)) & DCDC_REG0_STS_DC_OK_MASK)
+#define DCDC_REG0_PWD_ZCD_MASK                  (0x1U)
+#define DCDC_REG0_PWD_ZCD_SHIFT                 (0U)
+#define DCDC_REG0_PWD_ZCD(x)                    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_ZCD_SHIFT)) & DCDC_REG0_PWD_ZCD_MASK)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK  (0x2U)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT (1U)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT)) & DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK)
+#define DCDC_REG0_SEL_CLK_MASK      (0x4U)
+#define DCDC_REG0_SEL_CLK_SHIFT     (2U)
+#define DCDC_REG0_SEL_CLK(x)        (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_SEL_CLK_SHIFT)) & DCDC_REG0_SEL_CLK_MASK)
+#define DCDC_REG0_PWD_OSC_INT_MASK  (0x8U)
+#define DCDC_REG0_PWD_OSC_INT_SHIFT (3U)
+#define DCDC_REG0_PWD_OSC_INT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OSC_INT_SHIFT)) & DCDC_REG0_PWD_OSC_INT_MASK)
+#define DCDC_REG0_PWD_CUR_SNS_CMP_MASK  (0x10U)
+#define DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT (4U)
+#define DCDC_REG0_PWD_CUR_SNS_CMP(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT)) & DCDC_REG0_PWD_CUR_SNS_CMP_MASK)
+#define DCDC_REG0_CUR_SNS_THRSH_MASK  (0xE0U)
+#define DCDC_REG0_CUR_SNS_THRSH_SHIFT (5U)
+#define DCDC_REG0_CUR_SNS_THRSH(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CUR_SNS_THRSH_SHIFT)) & DCDC_REG0_CUR_SNS_THRSH_MASK)
+#define DCDC_REG0_PWD_OVERCUR_DET_MASK  (0x100U)
+#define DCDC_REG0_PWD_OVERCUR_DET_SHIFT (8U)
+#define DCDC_REG0_PWD_OVERCUR_DET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OVERCUR_DET_SHIFT)) & DCDC_REG0_PWD_OVERCUR_DET_MASK)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ_MASK  (0x600U)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT (9U)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT)) & DCDC_REG0_OVERCUR_TRIG_ADJ_MASK)
+#define DCDC_REG0_PWD_CMP_BATT_DET_MASK  (0x800U)
+#define DCDC_REG0_PWD_CMP_BATT_DET_SHIFT (11U)
+#define DCDC_REG0_PWD_CMP_BATT_DET(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_BATT_DET_SHIFT)) & DCDC_REG0_PWD_CMP_BATT_DET_MASK)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK  (0xF000U)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT (12U)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT)) & DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK  (0x10000U)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT (16U)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT)) & DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET_MASK  (0x20000U)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT (17U)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT)) & DCDC_REG0_PWD_HIGH_VOLT_DET_MASK)
+#define DCDC_REG0_LP_OVERLOAD_THRSH_MASK  (0xC0000U)
+#define DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT (18U)
+#define DCDC_REG0_LP_OVERLOAD_THRSH(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT)) & DCDC_REG0_LP_OVERLOAD_THRSH_MASK)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK  (0x100000U)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT (20U)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT)) & DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK)
+#define DCDC_REG0_LP_HIGH_HYS_MASK  (0x200000U)
+#define DCDC_REG0_LP_HIGH_HYS_SHIFT (21U)
+#define DCDC_REG0_LP_HIGH_HYS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_HIGH_HYS_SHIFT)) & DCDC_REG0_LP_HIGH_HYS_MASK)
+#define DCDC_REG0_PWD_CMP_OFFSET_MASK  (0x4000000U)
+#define DCDC_REG0_PWD_CMP_OFFSET_SHIFT (26U)
+#define DCDC_REG0_PWD_CMP_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_OFFSET_SHIFT)) & DCDC_REG0_PWD_CMP_OFFSET_MASK)
+#define DCDC_REG0_XTALOK_DISABLE_MASK  (0x8000000U)
+#define DCDC_REG0_XTALOK_DISABLE_SHIFT (27U)
+#define DCDC_REG0_XTALOK_DISABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTALOK_DISABLE_SHIFT)) & DCDC_REG0_XTALOK_DISABLE_MASK)
+#define DCDC_REG0_CURRENT_ALERT_RESET_MASK  (0x10000000U)
+#define DCDC_REG0_CURRENT_ALERT_RESET_SHIFT (28U)
+#define DCDC_REG0_CURRENT_ALERT_RESET(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CURRENT_ALERT_RESET_SHIFT)) & DCDC_REG0_CURRENT_ALERT_RESET_MASK)
+#define DCDC_REG0_XTAL_24M_OK_MASK  (0x20000000U)
+#define DCDC_REG0_XTAL_24M_OK_SHIFT (29U)
+#define DCDC_REG0_XTAL_24M_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTAL_24M_OK_SHIFT)) & DCDC_REG0_XTAL_24M_OK_MASK)
+#define DCDC_REG0_STS_DC_OK_MASK  (0x80000000U)
+#define DCDC_REG0_STS_DC_OK_SHIFT (31U)
+#define DCDC_REG0_STS_DC_OK(x)    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_STS_DC_OK_SHIFT)) & DCDC_REG0_STS_DC_OK_MASK)
 /*! @} */
 
 /*! @name REG1 - DCDC Register 1 */
 /*! @{ */
-#define DCDC_REG1_REG_FBK_SEL_MASK               (0x180U)
-#define DCDC_REG1_REG_FBK_SEL_SHIFT              (7U)
-#define DCDC_REG1_REG_FBK_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_FBK_SEL_SHIFT)) & DCDC_REG1_REG_FBK_SEL_MASK)
-#define DCDC_REG1_REG_RLOAD_SW_MASK              (0x200U)
-#define DCDC_REG1_REG_RLOAD_SW_SHIFT             (9U)
-#define DCDC_REG1_REG_RLOAD_SW(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_RLOAD_SW_SHIFT)) & DCDC_REG1_REG_RLOAD_SW_MASK)
-#define DCDC_REG1_LP_CMP_ISRC_SEL_MASK           (0x3000U)
-#define DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT          (12U)
-#define DCDC_REG1_LP_CMP_ISRC_SEL(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT)) & DCDC_REG1_LP_CMP_ISRC_SEL_MASK)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH_MASK       (0x200000U)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT      (21U)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT)) & DCDC_REG1_LOOPCTRL_HST_THRESH_MASK)
-#define DCDC_REG1_LOOPCTRL_EN_HYST_MASK          (0x800000U)
-#define DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT         (23U)
-#define DCDC_REG1_LOOPCTRL_EN_HYST(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT)) & DCDC_REG1_LOOPCTRL_EN_HYST_MASK)
-#define DCDC_REG1_VBG_TRIM_MASK                  (0x1F000000U)
-#define DCDC_REG1_VBG_TRIM_SHIFT                 (24U)
-#define DCDC_REG1_VBG_TRIM(x)                    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_VBG_TRIM_SHIFT)) & DCDC_REG1_VBG_TRIM_MASK)
+#define DCDC_REG1_REG_FBK_SEL_MASK  (0x180U)
+#define DCDC_REG1_REG_FBK_SEL_SHIFT (7U)
+#define DCDC_REG1_REG_FBK_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_FBK_SEL_SHIFT)) & DCDC_REG1_REG_FBK_SEL_MASK)
+#define DCDC_REG1_REG_RLOAD_SW_MASK  (0x200U)
+#define DCDC_REG1_REG_RLOAD_SW_SHIFT (9U)
+#define DCDC_REG1_REG_RLOAD_SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_RLOAD_SW_SHIFT)) & DCDC_REG1_REG_RLOAD_SW_MASK)
+#define DCDC_REG1_LP_CMP_ISRC_SEL_MASK  (0x3000U)
+#define DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT (12U)
+#define DCDC_REG1_LP_CMP_ISRC_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT)) & DCDC_REG1_LP_CMP_ISRC_SEL_MASK)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH_MASK  (0x200000U)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT (21U)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT)) & DCDC_REG1_LOOPCTRL_HST_THRESH_MASK)
+#define DCDC_REG1_LOOPCTRL_EN_HYST_MASK  (0x800000U)
+#define DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT (23U)
+#define DCDC_REG1_LOOPCTRL_EN_HYST(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT)) & DCDC_REG1_LOOPCTRL_EN_HYST_MASK)
+#define DCDC_REG1_VBG_TRIM_MASK  (0x1F000000U)
+#define DCDC_REG1_VBG_TRIM_SHIFT (24U)
+#define DCDC_REG1_VBG_TRIM(x)    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_VBG_TRIM_SHIFT)) & DCDC_REG1_VBG_TRIM_MASK)
 /*! @} */
 
 /*! @name REG2 - DCDC Register 2 */
 /*! @{ */
-#define DCDC_REG2_LOOPCTRL_DC_C_MASK             (0x3U)
-#define DCDC_REG2_LOOPCTRL_DC_C_SHIFT            (0U)
-#define DCDC_REG2_LOOPCTRL_DC_C(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_C_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_C_MASK)
-#define DCDC_REG2_LOOPCTRL_DC_R_MASK             (0x3CU)
-#define DCDC_REG2_LOOPCTRL_DC_R_SHIFT            (2U)
-#define DCDC_REG2_LOOPCTRL_DC_R(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_R_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_R_MASK)
-#define DCDC_REG2_LOOPCTRL_DC_FF_MASK            (0x1C0U)
-#define DCDC_REG2_LOOPCTRL_DC_FF_SHIFT           (6U)
-#define DCDC_REG2_LOOPCTRL_DC_FF(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_FF_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_FF_MASK)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK       (0xE00U)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT      (9U)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT)) & DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK    (0x1000U)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT   (12U)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH(x)      (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT)) & DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK        (0x2000U)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT       (13U)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT)) & DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK)
-#define DCDC_REG2_DISABLE_PULSE_SKIP_MASK        (0x8000000U)
-#define DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT       (27U)
-#define DCDC_REG2_DISABLE_PULSE_SKIP(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT)) & DCDC_REG2_DISABLE_PULSE_SKIP_MASK)
-#define DCDC_REG2_DCM_SET_CTRL_MASK              (0x10000000U)
-#define DCDC_REG2_DCM_SET_CTRL_SHIFT             (28U)
-#define DCDC_REG2_DCM_SET_CTRL(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DCM_SET_CTRL_SHIFT)) & DCDC_REG2_DCM_SET_CTRL_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_C_MASK  (0x3U)
+#define DCDC_REG2_LOOPCTRL_DC_C_SHIFT (0U)
+#define DCDC_REG2_LOOPCTRL_DC_C(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_C_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_C_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_R_MASK  (0x3CU)
+#define DCDC_REG2_LOOPCTRL_DC_R_SHIFT (2U)
+#define DCDC_REG2_LOOPCTRL_DC_R(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_R_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_R_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_FF_MASK  (0x1C0U)
+#define DCDC_REG2_LOOPCTRL_DC_FF_SHIFT (6U)
+#define DCDC_REG2_LOOPCTRL_DC_FF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_FF_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_FF_MASK)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK  (0xE00U)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT (9U)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT)) & DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK  (0x1000U)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT (12U)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT)) & DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK  (0x2000U)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT (13U)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT)) & DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK)
+#define DCDC_REG2_DISABLE_PULSE_SKIP_MASK  (0x8000000U)
+#define DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT (27U)
+#define DCDC_REG2_DISABLE_PULSE_SKIP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT)) & DCDC_REG2_DISABLE_PULSE_SKIP_MASK)
+#define DCDC_REG2_DCM_SET_CTRL_MASK  (0x10000000U)
+#define DCDC_REG2_DCM_SET_CTRL_SHIFT (28U)
+#define DCDC_REG2_DCM_SET_CTRL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DCM_SET_CTRL_SHIFT)) & DCDC_REG2_DCM_SET_CTRL_MASK)
 /*! @} */
 
 /*! @name REG3 - DCDC Register 3 */
 /*! @{ */
-#define DCDC_REG3_TRG_MASK                       (0x1FU)
-#define DCDC_REG3_TRG_SHIFT                      (0U)
-#define DCDC_REG3_TRG(x)                         (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TRG_SHIFT)) & DCDC_REG3_TRG_MASK)
-#define DCDC_REG3_TARGET_LP_MASK                 (0x700U)
-#define DCDC_REG3_TARGET_LP_SHIFT                (8U)
-#define DCDC_REG3_TARGET_LP(x)                   (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TARGET_LP_SHIFT)) & DCDC_REG3_TARGET_LP_MASK)
-#define DCDC_REG3_MINPWR_DC_HALFCLK_MASK         (0x1000000U)
-#define DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT        (24U)
-#define DCDC_REG3_MINPWR_DC_HALFCLK(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT)) & DCDC_REG3_MINPWR_DC_HALFCLK_MASK)
-#define DCDC_REG3_MISC_DELAY_TIMING_MASK         (0x8000000U)
-#define DCDC_REG3_MISC_DELAY_TIMING_SHIFT        (27U)
-#define DCDC_REG3_MISC_DELAY_TIMING(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DELAY_TIMING_SHIFT)) & DCDC_REG3_MISC_DELAY_TIMING_MASK)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK     (0x10000000U)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT    (28U)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC(x)       (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT)) & DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK)
-#define DCDC_REG3_DISABLE_STEP_MASK              (0x40000000U)
-#define DCDC_REG3_DISABLE_STEP_SHIFT             (30U)
-#define DCDC_REG3_DISABLE_STEP(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_DISABLE_STEP_SHIFT)) & DCDC_REG3_DISABLE_STEP_MASK)
+#define DCDC_REG3_TRG_MASK                (0x1FU)
+#define DCDC_REG3_TRG_SHIFT               (0U)
+#define DCDC_REG3_TRG(x)                  (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TRG_SHIFT)) & DCDC_REG3_TRG_MASK)
+#define DCDC_REG3_TARGET_LP_MASK          (0x700U)
+#define DCDC_REG3_TARGET_LP_SHIFT         (8U)
+#define DCDC_REG3_TARGET_LP(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TARGET_LP_SHIFT)) & DCDC_REG3_TARGET_LP_MASK)
+#define DCDC_REG3_MINPWR_DC_HALFCLK_MASK  (0x1000000U)
+#define DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT (24U)
+#define DCDC_REG3_MINPWR_DC_HALFCLK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT)) & DCDC_REG3_MINPWR_DC_HALFCLK_MASK)
+#define DCDC_REG3_MISC_DELAY_TIMING_MASK  (0x8000000U)
+#define DCDC_REG3_MISC_DELAY_TIMING_SHIFT (27U)
+#define DCDC_REG3_MISC_DELAY_TIMING(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DELAY_TIMING_SHIFT)) & DCDC_REG3_MISC_DELAY_TIMING_MASK)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK  (0x10000000U)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT (28U)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT)) & DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK)
+#define DCDC_REG3_DISABLE_STEP_MASK  (0x40000000U)
+#define DCDC_REG3_DISABLE_STEP_SHIFT (30U)
+#define DCDC_REG3_DISABLE_STEP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_DISABLE_STEP_SHIFT)) & DCDC_REG3_DISABLE_STEP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group DCDC_Register_Masks */
 
-
 /* DCDC - Peripheral instance base addresses */
 /** Peripheral DCDC base address */
-#define DCDC_BASE                                (0x40080000u)
+#define DCDC_BASE (0x40080000u)
 /** Peripheral DCDC base pointer */
-#define DCDC                                     ((DCDC_Type *)DCDC_BASE)
+#define DCDC ((DCDC_Type *)DCDC_BASE)
 /** Array initializer of DCDC peripheral base addresses */
-#define DCDC_BASE_ADDRS                          { DCDC_BASE }
+#define DCDC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        DCDC_BASE                                                                                                      \
+    }
 /** Array initializer of DCDC peripheral base pointers */
-#define DCDC_BASE_PTRS                           { DCDC }
+#define DCDC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        DCDC                                                                                                           \
+    }
 /** Interrupt vectors for the DCDC peripheral type */
-#define DCDC_IRQS                                { DCDC_IRQn }
+#define DCDC_IRQS                                                                                                      \
+    {                                                                                                                  \
+        DCDC_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group DCDC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DCP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6299,76 +7457,77 @@ typedef struct {
  */
 
 /** DCP - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< DCP control register 0, offset: 0x0 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t STAT;                              /**< DCP status register, offset: 0x10 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t CHANNELCTRL;                       /**< DCP channel control register, offset: 0x20 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t CAPABILITY0;                       /**< DCP capability 0 register, offset: 0x30 */
-       uint8_t RESERVED_3[12];
-  __I  uint32_t CAPABILITY1;                       /**< DCP capability 1 register, offset: 0x40 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t CONTEXT;                           /**< DCP context buffer pointer, offset: 0x50 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t KEY;                               /**< DCP key index, offset: 0x60 */
-       uint8_t RESERVED_6[12];
-  __IO uint32_t KEYDATA;                           /**< DCP key data, offset: 0x70 */
-       uint8_t RESERVED_7[12];
-  __I  uint32_t PACKET0;                           /**< DCP work packet 0 status register, offset: 0x80 */
-       uint8_t RESERVED_8[12];
-  __I  uint32_t PACKET1;                           /**< DCP work packet 1 status register, offset: 0x90 */
-       uint8_t RESERVED_9[12];
-  __I  uint32_t PACKET2;                           /**< DCP work packet 2 status register, offset: 0xA0 */
-       uint8_t RESERVED_10[12];
-  __I  uint32_t PACKET3;                           /**< DCP work packet 3 status register, offset: 0xB0 */
-       uint8_t RESERVED_11[12];
-  __I  uint32_t PACKET4;                           /**< DCP work packet 4 status register, offset: 0xC0 */
-       uint8_t RESERVED_12[12];
-  __I  uint32_t PACKET5;                           /**< DCP work packet 5 status register, offset: 0xD0 */
-       uint8_t RESERVED_13[12];
-  __I  uint32_t PACKET6;                           /**< DCP work packet 6 status register, offset: 0xE0 */
-       uint8_t RESERVED_14[28];
-  __IO uint32_t CH0CMDPTR;                         /**< DCP channel 0 command pointer address register, offset: 0x100 */
-       uint8_t RESERVED_15[12];
-  __IO uint32_t CH0SEMA;                           /**< DCP channel 0 semaphore register, offset: 0x110 */
-       uint8_t RESERVED_16[12];
-  __IO uint32_t CH0STAT;                           /**< DCP channel 0 status register, offset: 0x120 */
-       uint8_t RESERVED_17[12];
-  __IO uint32_t CH0OPTS;                           /**< DCP channel 0 options register, offset: 0x130 */
-       uint8_t RESERVED_18[12];
-  __IO uint32_t CH1CMDPTR;                         /**< DCP channel 1 command pointer address register, offset: 0x140 */
-       uint8_t RESERVED_19[12];
-  __IO uint32_t CH1SEMA;                           /**< DCP channel 1 semaphore register, offset: 0x150 */
-       uint8_t RESERVED_20[12];
-  __IO uint32_t CH1STAT;                           /**< DCP channel 1 status register, offset: 0x160 */
-       uint8_t RESERVED_21[12];
-  __IO uint32_t CH1OPTS;                           /**< DCP channel 1 options register, offset: 0x170 */
-       uint8_t RESERVED_22[12];
-  __IO uint32_t CH2CMDPTR;                         /**< DCP channel 2 command pointer address register, offset: 0x180 */
-       uint8_t RESERVED_23[12];
-  __IO uint32_t CH2SEMA;                           /**< DCP channel 2 semaphore register, offset: 0x190 */
-       uint8_t RESERVED_24[12];
-  __IO uint32_t CH2STAT;                           /**< DCP channel 2 status register, offset: 0x1A0 */
-       uint8_t RESERVED_25[12];
-  __IO uint32_t CH2OPTS;                           /**< DCP channel 2 options register, offset: 0x1B0 */
-       uint8_t RESERVED_26[12];
-  __IO uint32_t CH3CMDPTR;                         /**< DCP channel 3 command pointer address register, offset: 0x1C0 */
-       uint8_t RESERVED_27[12];
-  __IO uint32_t CH3SEMA;                           /**< DCP channel 3 semaphore register, offset: 0x1D0 */
-       uint8_t RESERVED_28[12];
-  __IO uint32_t CH3STAT;                           /**< DCP channel 3 status register, offset: 0x1E0 */
-       uint8_t RESERVED_29[12];
-  __IO uint32_t CH3OPTS;                           /**< DCP channel 3 options register, offset: 0x1F0 */
-       uint8_t RESERVED_30[524];
-  __IO uint32_t DBGSELECT;                         /**< DCP debug select register, offset: 0x400 */
-       uint8_t RESERVED_31[12];
-  __I  uint32_t DBGDATA;                           /**< DCP debug data register, offset: 0x410 */
-       uint8_t RESERVED_32[12];
-  __IO uint32_t PAGETABLE;                         /**< DCP page table register, offset: 0x420 */
-       uint8_t RESERVED_33[12];
-  __I  uint32_t VERSION;                           /**< DCP version register, offset: 0x430 */
+typedef struct
+{
+    __IO uint32_t CTRL; /**< DCP control register 0, offset: 0x0 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t STAT; /**< DCP status register, offset: 0x10 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t CHANNELCTRL; /**< DCP channel control register, offset: 0x20 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t CAPABILITY0; /**< DCP capability 0 register, offset: 0x30 */
+    uint8_t RESERVED_3[12];
+    __I uint32_t CAPABILITY1; /**< DCP capability 1 register, offset: 0x40 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t CONTEXT; /**< DCP context buffer pointer, offset: 0x50 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t KEY; /**< DCP key index, offset: 0x60 */
+    uint8_t RESERVED_6[12];
+    __IO uint32_t KEYDATA; /**< DCP key data, offset: 0x70 */
+    uint8_t RESERVED_7[12];
+    __I uint32_t PACKET0; /**< DCP work packet 0 status register, offset: 0x80 */
+    uint8_t RESERVED_8[12];
+    __I uint32_t PACKET1; /**< DCP work packet 1 status register, offset: 0x90 */
+    uint8_t RESERVED_9[12];
+    __I uint32_t PACKET2; /**< DCP work packet 2 status register, offset: 0xA0 */
+    uint8_t RESERVED_10[12];
+    __I uint32_t PACKET3; /**< DCP work packet 3 status register, offset: 0xB0 */
+    uint8_t RESERVED_11[12];
+    __I uint32_t PACKET4; /**< DCP work packet 4 status register, offset: 0xC0 */
+    uint8_t RESERVED_12[12];
+    __I uint32_t PACKET5; /**< DCP work packet 5 status register, offset: 0xD0 */
+    uint8_t RESERVED_13[12];
+    __I uint32_t PACKET6; /**< DCP work packet 6 status register, offset: 0xE0 */
+    uint8_t RESERVED_14[28];
+    __IO uint32_t CH0CMDPTR; /**< DCP channel 0 command pointer address register, offset: 0x100 */
+    uint8_t RESERVED_15[12];
+    __IO uint32_t CH0SEMA; /**< DCP channel 0 semaphore register, offset: 0x110 */
+    uint8_t RESERVED_16[12];
+    __IO uint32_t CH0STAT; /**< DCP channel 0 status register, offset: 0x120 */
+    uint8_t RESERVED_17[12];
+    __IO uint32_t CH0OPTS; /**< DCP channel 0 options register, offset: 0x130 */
+    uint8_t RESERVED_18[12];
+    __IO uint32_t CH1CMDPTR; /**< DCP channel 1 command pointer address register, offset: 0x140 */
+    uint8_t RESERVED_19[12];
+    __IO uint32_t CH1SEMA; /**< DCP channel 1 semaphore register, offset: 0x150 */
+    uint8_t RESERVED_20[12];
+    __IO uint32_t CH1STAT; /**< DCP channel 1 status register, offset: 0x160 */
+    uint8_t RESERVED_21[12];
+    __IO uint32_t CH1OPTS; /**< DCP channel 1 options register, offset: 0x170 */
+    uint8_t RESERVED_22[12];
+    __IO uint32_t CH2CMDPTR; /**< DCP channel 2 command pointer address register, offset: 0x180 */
+    uint8_t RESERVED_23[12];
+    __IO uint32_t CH2SEMA; /**< DCP channel 2 semaphore register, offset: 0x190 */
+    uint8_t RESERVED_24[12];
+    __IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0 */
+    uint8_t RESERVED_25[12];
+    __IO uint32_t CH2OPTS; /**< DCP channel 2 options register, offset: 0x1B0 */
+    uint8_t RESERVED_26[12];
+    __IO uint32_t CH3CMDPTR; /**< DCP channel 3 command pointer address register, offset: 0x1C0 */
+    uint8_t RESERVED_27[12];
+    __IO uint32_t CH3SEMA; /**< DCP channel 3 semaphore register, offset: 0x1D0 */
+    uint8_t RESERVED_28[12];
+    __IO uint32_t CH3STAT; /**< DCP channel 3 status register, offset: 0x1E0 */
+    uint8_t RESERVED_29[12];
+    __IO uint32_t CH3OPTS; /**< DCP channel 3 options register, offset: 0x1F0 */
+    uint8_t RESERVED_30[524];
+    __IO uint32_t DBGSELECT; /**< DCP debug select register, offset: 0x400 */
+    uint8_t RESERVED_31[12];
+    __I uint32_t DBGDATA; /**< DCP debug data register, offset: 0x410 */
+    uint8_t RESERVED_32[12];
+    __IO uint32_t PAGETABLE; /**< DCP page table register, offset: 0x420 */
+    uint8_t RESERVED_33[12];
+    __I uint32_t VERSION; /**< DCP version register, offset: 0x430 */
 } DCP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -6382,567 +7541,669 @@ typedef struct {
 
 /*! @name CTRL - DCP control register 0 */
 /*! @{ */
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK   (0xFFU)
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT  (0U)
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK  (0xFFU)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)
 #define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK  (0x100U)
 #define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
-#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK   (0x200000U)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT  (21U)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK     (0x400000U)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT    (22U)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK     (0x800000U)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT    (23U)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)
-#define DCP_CTRL_PRESENT_SHA_MASK                (0x10000000U)
-#define DCP_CTRL_PRESENT_SHA_SHIFT               (28U)
-#define DCP_CTRL_PRESENT_SHA(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)
-#define DCP_CTRL_PRESENT_CRYPTO_MASK             (0x20000000U)
-#define DCP_CTRL_PRESENT_CRYPTO_SHIFT            (29U)
-#define DCP_CTRL_PRESENT_CRYPTO(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)
-#define DCP_CTRL_CLKGATE_MASK                    (0x40000000U)
-#define DCP_CTRL_CLKGATE_SHIFT                   (30U)
-#define DCP_CTRL_CLKGATE(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)
-#define DCP_CTRL_SFTRST_MASK                     (0x80000000U)
-#define DCP_CTRL_SFTRST_SHIFT                    (31U)
-#define DCP_CTRL_SFTRST(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)
+#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) &                                       \
+     DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK  (0x200000U)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK  (0x400000U)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT (22U)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK  (0x800000U)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT (23U)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)
+#define DCP_CTRL_PRESENT_SHA_MASK  (0x10000000U)
+#define DCP_CTRL_PRESENT_SHA_SHIFT (28U)
+#define DCP_CTRL_PRESENT_SHA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)
+#define DCP_CTRL_PRESENT_CRYPTO_MASK  (0x20000000U)
+#define DCP_CTRL_PRESENT_CRYPTO_SHIFT (29U)
+#define DCP_CTRL_PRESENT_CRYPTO(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)
+#define DCP_CTRL_CLKGATE_MASK  (0x40000000U)
+#define DCP_CTRL_CLKGATE_SHIFT (30U)
+#define DCP_CTRL_CLKGATE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)
+#define DCP_CTRL_SFTRST_MASK   (0x80000000U)
+#define DCP_CTRL_SFTRST_SHIFT  (31U)
+#define DCP_CTRL_SFTRST(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)
 /*! @} */
 
 /*! @name STAT - DCP status register */
 /*! @{ */
-#define DCP_STAT_IRQ_MASK                        (0xFU)
-#define DCP_STAT_IRQ_SHIFT                       (0U)
-#define DCP_STAT_IRQ(x)                          (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)
-#define DCP_STAT_RSVD_IRQ_MASK                   (0x100U)
-#define DCP_STAT_RSVD_IRQ_SHIFT                  (8U)
-#define DCP_STAT_RSVD_IRQ(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)
-#define DCP_STAT_READY_CHANNELS_MASK             (0xFF0000U)
-#define DCP_STAT_READY_CHANNELS_SHIFT            (16U)
-#define DCP_STAT_READY_CHANNELS(x)               (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)
-#define DCP_STAT_CUR_CHANNEL_MASK                (0xF000000U)
-#define DCP_STAT_CUR_CHANNEL_SHIFT               (24U)
-#define DCP_STAT_CUR_CHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)
-#define DCP_STAT_OTP_KEY_READY_MASK              (0x10000000U)
-#define DCP_STAT_OTP_KEY_READY_SHIFT             (28U)
-#define DCP_STAT_OTP_KEY_READY(x)                (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)
+#define DCP_STAT_IRQ_MASK             (0xFU)
+#define DCP_STAT_IRQ_SHIFT            (0U)
+#define DCP_STAT_IRQ(x)               (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)
+#define DCP_STAT_RSVD_IRQ_MASK        (0x100U)
+#define DCP_STAT_RSVD_IRQ_SHIFT       (8U)
+#define DCP_STAT_RSVD_IRQ(x)          (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)
+#define DCP_STAT_READY_CHANNELS_MASK  (0xFF0000U)
+#define DCP_STAT_READY_CHANNELS_SHIFT (16U)
+#define DCP_STAT_READY_CHANNELS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)
+#define DCP_STAT_CUR_CHANNEL_MASK  (0xF000000U)
+#define DCP_STAT_CUR_CHANNEL_SHIFT (24U)
+#define DCP_STAT_CUR_CHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)
+#define DCP_STAT_OTP_KEY_READY_MASK  (0x10000000U)
+#define DCP_STAT_OTP_KEY_READY_SHIFT (28U)
+#define DCP_STAT_OTP_KEY_READY(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)
 /*! @} */
 
 /*! @name CHANNELCTRL - DCP channel control register */
 /*! @{ */
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK      (0xFFU)
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT     (0U)
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL(x)        (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)
-#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK  (0xFFU)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT (0U)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)
+#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK  (0xFF00U)
 #define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
-#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK      (0x10000U)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT     (16U)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED(x)        (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)
-#define DCP_CHANNELCTRL_RSVD_MASK                (0xFFFE0000U)
-#define DCP_CHANNELCTRL_RSVD_SHIFT               (17U)
-#define DCP_CHANNELCTRL_RSVD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)
+#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) &                                    \
+     DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK  (0x10000U)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT (16U)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)
+#define DCP_CHANNELCTRL_RSVD_MASK  (0xFFFE0000U)
+#define DCP_CHANNELCTRL_RSVD_SHIFT (17U)
+#define DCP_CHANNELCTRL_RSVD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)
 /*! @} */
 
 /*! @name CAPABILITY0 - DCP capability 0 register */
 /*! @{ */
-#define DCP_CAPABILITY0_NUM_KEYS_MASK            (0xFFU)
-#define DCP_CAPABILITY0_NUM_KEYS_SHIFT           (0U)
-#define DCP_CAPABILITY0_NUM_KEYS(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)
-#define DCP_CAPABILITY0_NUM_CHANNELS_MASK        (0xF00U)
-#define DCP_CAPABILITY0_NUM_CHANNELS_SHIFT       (8U)
-#define DCP_CAPABILITY0_NUM_CHANNELS(x)          (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)
-#define DCP_CAPABILITY0_RSVD_MASK                (0x1FFFF000U)
-#define DCP_CAPABILITY0_RSVD_SHIFT               (12U)
-#define DCP_CAPABILITY0_RSVD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)
+#define DCP_CAPABILITY0_NUM_KEYS_MASK  (0xFFU)
+#define DCP_CAPABILITY0_NUM_KEYS_SHIFT (0U)
+#define DCP_CAPABILITY0_NUM_KEYS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)
+#define DCP_CAPABILITY0_NUM_CHANNELS_MASK  (0xF00U)
+#define DCP_CAPABILITY0_NUM_CHANNELS_SHIFT (8U)
+#define DCP_CAPABILITY0_NUM_CHANNELS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)
+#define DCP_CAPABILITY0_RSVD_MASK  (0x1FFFF000U)
+#define DCP_CAPABILITY0_RSVD_SHIFT (12U)
+#define DCP_CAPABILITY0_RSVD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)
 #define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK  (0x20000000U)
 #define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT (29U)
-#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) & DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT_MASK     (0x80000000U)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT    (31U)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)
+#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) &                                       \
+     DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT_MASK  (0x80000000U)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT (31U)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)
 /*! @} */
 
 /*! @name CAPABILITY1 - DCP capability 1 register */
 /*! @{ */
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK   (0xFFFFU)
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT  (0U)
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS_MASK     (0xFFFF0000U)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT    (16U)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK  (0xFFFFU)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT (0U)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS_MASK  (0xFFFF0000U)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT (16U)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)
 /*! @} */
 
 /*! @name CONTEXT - DCP context buffer pointer */
 /*! @{ */
-#define DCP_CONTEXT_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_CONTEXT_ADDR_SHIFT                   (0U)
-#define DCP_CONTEXT_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)
+#define DCP_CONTEXT_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CONTEXT_ADDR_SHIFT (0U)
+#define DCP_CONTEXT_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)
 /*! @} */
 
 /*! @name KEY - DCP key index */
 /*! @{ */
-#define DCP_KEY_SUBWORD_MASK                     (0x3U)
-#define DCP_KEY_SUBWORD_SHIFT                    (0U)
-#define DCP_KEY_SUBWORD(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)
-#define DCP_KEY_RSVD_SUBWORD_MASK                (0xCU)
-#define DCP_KEY_RSVD_SUBWORD_SHIFT               (2U)
-#define DCP_KEY_RSVD_SUBWORD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)
-#define DCP_KEY_INDEX_MASK                       (0x30U)
-#define DCP_KEY_INDEX_SHIFT                      (4U)
-#define DCP_KEY_INDEX(x)                         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)
-#define DCP_KEY_RSVD_INDEX_MASK                  (0xC0U)
-#define DCP_KEY_RSVD_INDEX_SHIFT                 (6U)
-#define DCP_KEY_RSVD_INDEX(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)
-#define DCP_KEY_RSVD_MASK                        (0xFFFFFF00U)
-#define DCP_KEY_RSVD_SHIFT                       (8U)
-#define DCP_KEY_RSVD(x)                          (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)
+#define DCP_KEY_SUBWORD_MASK       (0x3U)
+#define DCP_KEY_SUBWORD_SHIFT      (0U)
+#define DCP_KEY_SUBWORD(x)         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)
+#define DCP_KEY_RSVD_SUBWORD_MASK  (0xCU)
+#define DCP_KEY_RSVD_SUBWORD_SHIFT (2U)
+#define DCP_KEY_RSVD_SUBWORD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)
+#define DCP_KEY_INDEX_MASK       (0x30U)
+#define DCP_KEY_INDEX_SHIFT      (4U)
+#define DCP_KEY_INDEX(x)         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)
+#define DCP_KEY_RSVD_INDEX_MASK  (0xC0U)
+#define DCP_KEY_RSVD_INDEX_SHIFT (6U)
+#define DCP_KEY_RSVD_INDEX(x)    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)
+#define DCP_KEY_RSVD_MASK        (0xFFFFFF00U)
+#define DCP_KEY_RSVD_SHIFT       (8U)
+#define DCP_KEY_RSVD(x)          (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)
 /*! @} */
 
 /*! @name KEYDATA - DCP key data */
 /*! @{ */
-#define DCP_KEYDATA_DATA_MASK                    (0xFFFFFFFFU)
-#define DCP_KEYDATA_DATA_SHIFT                   (0U)
-#define DCP_KEYDATA_DATA(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)
+#define DCP_KEYDATA_DATA_MASK  (0xFFFFFFFFU)
+#define DCP_KEYDATA_DATA_SHIFT (0U)
+#define DCP_KEYDATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)
 /*! @} */
 
 /*! @name PACKET0 - DCP work packet 0 status register */
 /*! @{ */
-#define DCP_PACKET0_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET0_ADDR_SHIFT                   (0U)
-#define DCP_PACKET0_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)
+#define DCP_PACKET0_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET0_ADDR_SHIFT (0U)
+#define DCP_PACKET0_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET1 - DCP work packet 1 status register */
 /*! @{ */
-#define DCP_PACKET1_INTERRUPT_MASK               (0x1U)
-#define DCP_PACKET1_INTERRUPT_SHIFT              (0U)
-#define DCP_PACKET1_INTERRUPT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)
-#define DCP_PACKET1_DECR_SEMAPHORE_MASK          (0x2U)
-#define DCP_PACKET1_DECR_SEMAPHORE_SHIFT         (1U)
-#define DCP_PACKET1_DECR_SEMAPHORE(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)
-#define DCP_PACKET1_CHAIN_MASK                   (0x4U)
-#define DCP_PACKET1_CHAIN_SHIFT                  (2U)
-#define DCP_PACKET1_CHAIN(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS_MASK        (0x8U)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT       (3U)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS(x)          (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)
-#define DCP_PACKET1_ENABLE_MEMCOPY_MASK          (0x10U)
-#define DCP_PACKET1_ENABLE_MEMCOPY_SHIFT         (4U)
-#define DCP_PACKET1_ENABLE_MEMCOPY(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)
-#define DCP_PACKET1_ENABLE_CIPHER_MASK           (0x20U)
-#define DCP_PACKET1_ENABLE_CIPHER_SHIFT          (5U)
-#define DCP_PACKET1_ENABLE_CIPHER(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)
-#define DCP_PACKET1_ENABLE_HASH_MASK             (0x40U)
-#define DCP_PACKET1_ENABLE_HASH_SHIFT            (6U)
-#define DCP_PACKET1_ENABLE_HASH(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)
-#define DCP_PACKET1_ENABLE_BLIT_MASK             (0x80U)
-#define DCP_PACKET1_ENABLE_BLIT_SHIFT            (7U)
-#define DCP_PACKET1_ENABLE_BLIT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)
-#define DCP_PACKET1_CIPHER_ENCRYPT_MASK          (0x100U)
-#define DCP_PACKET1_CIPHER_ENCRYPT_SHIFT         (8U)
-#define DCP_PACKET1_CIPHER_ENCRYPT(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)
-#define DCP_PACKET1_CIPHER_INIT_MASK             (0x200U)
-#define DCP_PACKET1_CIPHER_INIT_SHIFT            (9U)
-#define DCP_PACKET1_CIPHER_INIT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)
-#define DCP_PACKET1_OTP_KEY_MASK                 (0x400U)
-#define DCP_PACKET1_OTP_KEY_SHIFT                (10U)
-#define DCP_PACKET1_OTP_KEY(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)
-#define DCP_PACKET1_PAYLOAD_KEY_MASK             (0x800U)
-#define DCP_PACKET1_PAYLOAD_KEY_SHIFT            (11U)
-#define DCP_PACKET1_PAYLOAD_KEY(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)
-#define DCP_PACKET1_HASH_INIT_MASK               (0x1000U)
-#define DCP_PACKET1_HASH_INIT_SHIFT              (12U)
-#define DCP_PACKET1_HASH_INIT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)
-#define DCP_PACKET1_HASH_TERM_MASK               (0x2000U)
-#define DCP_PACKET1_HASH_TERM_SHIFT              (13U)
-#define DCP_PACKET1_HASH_TERM(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)
-#define DCP_PACKET1_CHECK_HASH_MASK              (0x4000U)
-#define DCP_PACKET1_CHECK_HASH_SHIFT             (14U)
-#define DCP_PACKET1_CHECK_HASH(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)
-#define DCP_PACKET1_HASH_OUTPUT_MASK             (0x8000U)
-#define DCP_PACKET1_HASH_OUTPUT_SHIFT            (15U)
-#define DCP_PACKET1_HASH_OUTPUT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)
-#define DCP_PACKET1_CONSTANT_FILL_MASK           (0x10000U)
-#define DCP_PACKET1_CONSTANT_FILL_SHIFT          (16U)
-#define DCP_PACKET1_CONSTANT_FILL(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)
-#define DCP_PACKET1_TEST_SEMA_IRQ_MASK           (0x20000U)
-#define DCP_PACKET1_TEST_SEMA_IRQ_SHIFT          (17U)
-#define DCP_PACKET1_TEST_SEMA_IRQ(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)
-#define DCP_PACKET1_KEY_BYTESWAP_MASK            (0x40000U)
-#define DCP_PACKET1_KEY_BYTESWAP_SHIFT           (18U)
-#define DCP_PACKET1_KEY_BYTESWAP(x)              (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)
-#define DCP_PACKET1_KEY_WORDSWAP_MASK            (0x80000U)
-#define DCP_PACKET1_KEY_WORDSWAP_SHIFT           (19U)
-#define DCP_PACKET1_KEY_WORDSWAP(x)              (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)
-#define DCP_PACKET1_INPUT_BYTESWAP_MASK          (0x100000U)
-#define DCP_PACKET1_INPUT_BYTESWAP_SHIFT         (20U)
-#define DCP_PACKET1_INPUT_BYTESWAP(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)
-#define DCP_PACKET1_INPUT_WORDSWAP_MASK          (0x200000U)
-#define DCP_PACKET1_INPUT_WORDSWAP_SHIFT         (21U)
-#define DCP_PACKET1_INPUT_WORDSWAP(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)
-#define DCP_PACKET1_OUTPUT_BYTESWAP_MASK         (0x400000U)
-#define DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT        (22U)
-#define DCP_PACKET1_OUTPUT_BYTESWAP(x)           (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)
-#define DCP_PACKET1_OUTPUT_WORDSWAP_MASK         (0x800000U)
-#define DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT        (23U)
-#define DCP_PACKET1_OUTPUT_WORDSWAP(x)           (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)
-#define DCP_PACKET1_TAG_MASK                     (0xFF000000U)
-#define DCP_PACKET1_TAG_SHIFT                    (24U)
-#define DCP_PACKET1_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)
+#define DCP_PACKET1_INTERRUPT_MASK  (0x1U)
+#define DCP_PACKET1_INTERRUPT_SHIFT (0U)
+#define DCP_PACKET1_INTERRUPT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)
+#define DCP_PACKET1_DECR_SEMAPHORE_MASK  (0x2U)
+#define DCP_PACKET1_DECR_SEMAPHORE_SHIFT (1U)
+#define DCP_PACKET1_DECR_SEMAPHORE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)
+#define DCP_PACKET1_CHAIN_MASK             (0x4U)
+#define DCP_PACKET1_CHAIN_SHIFT            (2U)
+#define DCP_PACKET1_CHAIN(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS_MASK  (0x8U)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT (3U)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)
+#define DCP_PACKET1_ENABLE_MEMCOPY_MASK  (0x10U)
+#define DCP_PACKET1_ENABLE_MEMCOPY_SHIFT (4U)
+#define DCP_PACKET1_ENABLE_MEMCOPY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)
+#define DCP_PACKET1_ENABLE_CIPHER_MASK  (0x20U)
+#define DCP_PACKET1_ENABLE_CIPHER_SHIFT (5U)
+#define DCP_PACKET1_ENABLE_CIPHER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)
+#define DCP_PACKET1_ENABLE_HASH_MASK  (0x40U)
+#define DCP_PACKET1_ENABLE_HASH_SHIFT (6U)
+#define DCP_PACKET1_ENABLE_HASH(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)
+#define DCP_PACKET1_ENABLE_BLIT_MASK  (0x80U)
+#define DCP_PACKET1_ENABLE_BLIT_SHIFT (7U)
+#define DCP_PACKET1_ENABLE_BLIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)
+#define DCP_PACKET1_CIPHER_ENCRYPT_MASK  (0x100U)
+#define DCP_PACKET1_CIPHER_ENCRYPT_SHIFT (8U)
+#define DCP_PACKET1_CIPHER_ENCRYPT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)
+#define DCP_PACKET1_CIPHER_INIT_MASK  (0x200U)
+#define DCP_PACKET1_CIPHER_INIT_SHIFT (9U)
+#define DCP_PACKET1_CIPHER_INIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)
+#define DCP_PACKET1_OTP_KEY_MASK      (0x400U)
+#define DCP_PACKET1_OTP_KEY_SHIFT     (10U)
+#define DCP_PACKET1_OTP_KEY(x)        (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)
+#define DCP_PACKET1_PAYLOAD_KEY_MASK  (0x800U)
+#define DCP_PACKET1_PAYLOAD_KEY_SHIFT (11U)
+#define DCP_PACKET1_PAYLOAD_KEY(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)
+#define DCP_PACKET1_HASH_INIT_MASK  (0x1000U)
+#define DCP_PACKET1_HASH_INIT_SHIFT (12U)
+#define DCP_PACKET1_HASH_INIT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)
+#define DCP_PACKET1_HASH_TERM_MASK  (0x2000U)
+#define DCP_PACKET1_HASH_TERM_SHIFT (13U)
+#define DCP_PACKET1_HASH_TERM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)
+#define DCP_PACKET1_CHECK_HASH_MASK  (0x4000U)
+#define DCP_PACKET1_CHECK_HASH_SHIFT (14U)
+#define DCP_PACKET1_CHECK_HASH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)
+#define DCP_PACKET1_HASH_OUTPUT_MASK  (0x8000U)
+#define DCP_PACKET1_HASH_OUTPUT_SHIFT (15U)
+#define DCP_PACKET1_HASH_OUTPUT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)
+#define DCP_PACKET1_CONSTANT_FILL_MASK  (0x10000U)
+#define DCP_PACKET1_CONSTANT_FILL_SHIFT (16U)
+#define DCP_PACKET1_CONSTANT_FILL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)
+#define DCP_PACKET1_TEST_SEMA_IRQ_MASK  (0x20000U)
+#define DCP_PACKET1_TEST_SEMA_IRQ_SHIFT (17U)
+#define DCP_PACKET1_TEST_SEMA_IRQ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)
+#define DCP_PACKET1_KEY_BYTESWAP_MASK  (0x40000U)
+#define DCP_PACKET1_KEY_BYTESWAP_SHIFT (18U)
+#define DCP_PACKET1_KEY_BYTESWAP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)
+#define DCP_PACKET1_KEY_WORDSWAP_MASK  (0x80000U)
+#define DCP_PACKET1_KEY_WORDSWAP_SHIFT (19U)
+#define DCP_PACKET1_KEY_WORDSWAP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)
+#define DCP_PACKET1_INPUT_BYTESWAP_MASK  (0x100000U)
+#define DCP_PACKET1_INPUT_BYTESWAP_SHIFT (20U)
+#define DCP_PACKET1_INPUT_BYTESWAP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)
+#define DCP_PACKET1_INPUT_WORDSWAP_MASK  (0x200000U)
+#define DCP_PACKET1_INPUT_WORDSWAP_SHIFT (21U)
+#define DCP_PACKET1_INPUT_WORDSWAP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)
+#define DCP_PACKET1_OUTPUT_BYTESWAP_MASK  (0x400000U)
+#define DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT (22U)
+#define DCP_PACKET1_OUTPUT_BYTESWAP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)
+#define DCP_PACKET1_OUTPUT_WORDSWAP_MASK  (0x800000U)
+#define DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT (23U)
+#define DCP_PACKET1_OUTPUT_WORDSWAP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)
+#define DCP_PACKET1_TAG_MASK  (0xFF000000U)
+#define DCP_PACKET1_TAG_SHIFT (24U)
+#define DCP_PACKET1_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)
 /*! @} */
 
 /*! @name PACKET2 - DCP work packet 2 status register */
 /*! @{ */
-#define DCP_PACKET2_CIPHER_SELECT_MASK           (0xFU)
-#define DCP_PACKET2_CIPHER_SELECT_SHIFT          (0U)
-#define DCP_PACKET2_CIPHER_SELECT(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)
-#define DCP_PACKET2_CIPHER_MODE_MASK             (0xF0U)
-#define DCP_PACKET2_CIPHER_MODE_SHIFT            (4U)
-#define DCP_PACKET2_CIPHER_MODE(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)
-#define DCP_PACKET2_KEY_SELECT_MASK              (0xFF00U)
-#define DCP_PACKET2_KEY_SELECT_SHIFT             (8U)
-#define DCP_PACKET2_KEY_SELECT(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)
-#define DCP_PACKET2_HASH_SELECT_MASK             (0xF0000U)
-#define DCP_PACKET2_HASH_SELECT_SHIFT            (16U)
-#define DCP_PACKET2_HASH_SELECT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)
-#define DCP_PACKET2_RSVD_MASK                    (0xF00000U)
-#define DCP_PACKET2_RSVD_SHIFT                   (20U)
-#define DCP_PACKET2_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)
-#define DCP_PACKET2_CIPHER_CFG_MASK              (0xFF000000U)
-#define DCP_PACKET2_CIPHER_CFG_SHIFT             (24U)
-#define DCP_PACKET2_CIPHER_CFG(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)
+#define DCP_PACKET2_CIPHER_SELECT_MASK  (0xFU)
+#define DCP_PACKET2_CIPHER_SELECT_SHIFT (0U)
+#define DCP_PACKET2_CIPHER_SELECT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)
+#define DCP_PACKET2_CIPHER_MODE_MASK  (0xF0U)
+#define DCP_PACKET2_CIPHER_MODE_SHIFT (4U)
+#define DCP_PACKET2_CIPHER_MODE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)
+#define DCP_PACKET2_KEY_SELECT_MASK  (0xFF00U)
+#define DCP_PACKET2_KEY_SELECT_SHIFT (8U)
+#define DCP_PACKET2_KEY_SELECT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)
+#define DCP_PACKET2_HASH_SELECT_MASK  (0xF0000U)
+#define DCP_PACKET2_HASH_SELECT_SHIFT (16U)
+#define DCP_PACKET2_HASH_SELECT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)
+#define DCP_PACKET2_RSVD_MASK        (0xF00000U)
+#define DCP_PACKET2_RSVD_SHIFT       (20U)
+#define DCP_PACKET2_RSVD(x)          (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)
+#define DCP_PACKET2_CIPHER_CFG_MASK  (0xFF000000U)
+#define DCP_PACKET2_CIPHER_CFG_SHIFT (24U)
+#define DCP_PACKET2_CIPHER_CFG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)
 /*! @} */
 
 /*! @name PACKET3 - DCP work packet 3 status register */
 /*! @{ */
-#define DCP_PACKET3_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET3_ADDR_SHIFT                   (0U)
-#define DCP_PACKET3_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)
+#define DCP_PACKET3_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET3_ADDR_SHIFT (0U)
+#define DCP_PACKET3_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET4 - DCP work packet 4 status register */
 /*! @{ */
-#define DCP_PACKET4_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET4_ADDR_SHIFT                   (0U)
-#define DCP_PACKET4_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)
+#define DCP_PACKET4_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET4_ADDR_SHIFT (0U)
+#define DCP_PACKET4_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET5 - DCP work packet 5 status register */
 /*! @{ */
-#define DCP_PACKET5_COUNT_MASK                   (0xFFFFFFFFU)
-#define DCP_PACKET5_COUNT_SHIFT                  (0U)
-#define DCP_PACKET5_COUNT(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)
+#define DCP_PACKET5_COUNT_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET5_COUNT_SHIFT (0U)
+#define DCP_PACKET5_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)
 /*! @} */
 
 /*! @name PACKET6 - DCP work packet 6 status register */
 /*! @{ */
-#define DCP_PACKET6_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET6_ADDR_SHIFT                   (0U)
-#define DCP_PACKET6_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)
+#define DCP_PACKET6_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET6_ADDR_SHIFT (0U)
+#define DCP_PACKET6_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)
 /*! @} */
 
 /*! @name CH0CMDPTR - DCP channel 0 command pointer address register */
 /*! @{ */
-#define DCP_CH0CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH0CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH0CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)
+#define DCP_CH0CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH0CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH0CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH0SEMA - DCP channel 0 semaphore register */
 /*! @{ */
-#define DCP_CH0SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH0SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH0SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)
-#define DCP_CH0SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH0SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH0SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)
+#define DCP_CH0SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH0SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH0SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)
+#define DCP_CH0SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH0SEMA_VALUE_SHIFT (16U)
+#define DCP_CH0SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH0STAT - DCP channel 0 status register */
 /*! @{ */
-#define DCP_CH0STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH0STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH0STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH0STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH0STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH0STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)
-#define DCP_CH0STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH0STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH0STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)
-#define DCP_CH0STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH0STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH0STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)
-#define DCP_CH0STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH0STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH0STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)
-#define DCP_CH0STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH0STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH0STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)
-#define DCP_CH0STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH0STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH0STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH0STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH0STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)
-#define DCP_CH0STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH0STAT_TAG_SHIFT                    (24U)
-#define DCP_CH0STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)
+#define DCP_CH0STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH0STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH0STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH0STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH0STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH0STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)
+#define DCP_CH0STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH0STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH0STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)
+#define DCP_CH0STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH0STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH0STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)
+#define DCP_CH0STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH0STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH0STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)
+#define DCP_CH0STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH0STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH0STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)
+#define DCP_CH0STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH0STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH0STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH0STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH0STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)
+#define DCP_CH0STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH0STAT_TAG_SHIFT (24U)
+#define DCP_CH0STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH0OPTS - DCP channel 0 options register */
 /*! @{ */
-#define DCP_CH0OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH0OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH0OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH0OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH0OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH0OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)
+#define DCP_CH0OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH0OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH0OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH0OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH0OPTS_RSVD_SHIFT (16U)
+#define DCP_CH0OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH1CMDPTR - DCP channel 1 command pointer address register */
 /*! @{ */
-#define DCP_CH1CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH1CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH1CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)
+#define DCP_CH1CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH1CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH1CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH1SEMA - DCP channel 1 semaphore register */
 /*! @{ */
-#define DCP_CH1SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH1SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH1SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)
-#define DCP_CH1SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH1SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH1SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)
+#define DCP_CH1SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH1SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH1SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)
+#define DCP_CH1SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH1SEMA_VALUE_SHIFT (16U)
+#define DCP_CH1SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH1STAT - DCP channel 1 status register */
 /*! @{ */
-#define DCP_CH1STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH1STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH1STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH1STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH1STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH1STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)
-#define DCP_CH1STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH1STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH1STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)
-#define DCP_CH1STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH1STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH1STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)
-#define DCP_CH1STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH1STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH1STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)
-#define DCP_CH1STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH1STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH1STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)
-#define DCP_CH1STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH1STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH1STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH1STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH1STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)
-#define DCP_CH1STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH1STAT_TAG_SHIFT                    (24U)
-#define DCP_CH1STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)
+#define DCP_CH1STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH1STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH1STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH1STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH1STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH1STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)
+#define DCP_CH1STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH1STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH1STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)
+#define DCP_CH1STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH1STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH1STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)
+#define DCP_CH1STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH1STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH1STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)
+#define DCP_CH1STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH1STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH1STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)
+#define DCP_CH1STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH1STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH1STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH1STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH1STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)
+#define DCP_CH1STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH1STAT_TAG_SHIFT (24U)
+#define DCP_CH1STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH1OPTS - DCP channel 1 options register */
 /*! @{ */
-#define DCP_CH1OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH1OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH1OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH1OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH1OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH1OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)
+#define DCP_CH1OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH1OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH1OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH1OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH1OPTS_RSVD_SHIFT (16U)
+#define DCP_CH1OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH2CMDPTR - DCP channel 2 command pointer address register */
 /*! @{ */
-#define DCP_CH2CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH2CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH2CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)
+#define DCP_CH2CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH2CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH2CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH2SEMA - DCP channel 2 semaphore register */
 /*! @{ */
-#define DCP_CH2SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH2SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH2SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)
-#define DCP_CH2SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH2SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH2SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)
+#define DCP_CH2SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH2SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH2SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)
+#define DCP_CH2SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH2SEMA_VALUE_SHIFT (16U)
+#define DCP_CH2SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH2STAT - DCP channel 2 status register */
 /*! @{ */
-#define DCP_CH2STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH2STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH2STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH2STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH2STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH2STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)
-#define DCP_CH2STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH2STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH2STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)
-#define DCP_CH2STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH2STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH2STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)
-#define DCP_CH2STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH2STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH2STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)
-#define DCP_CH2STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH2STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH2STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)
-#define DCP_CH2STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH2STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH2STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH2STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH2STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)
-#define DCP_CH2STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH2STAT_TAG_SHIFT                    (24U)
-#define DCP_CH2STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)
+#define DCP_CH2STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH2STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH2STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH2STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH2STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH2STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)
+#define DCP_CH2STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH2STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH2STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)
+#define DCP_CH2STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH2STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH2STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)
+#define DCP_CH2STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH2STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH2STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)
+#define DCP_CH2STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH2STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH2STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)
+#define DCP_CH2STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH2STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH2STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH2STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH2STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)
+#define DCP_CH2STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH2STAT_TAG_SHIFT (24U)
+#define DCP_CH2STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH2OPTS - DCP channel 2 options register */
 /*! @{ */
-#define DCP_CH2OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH2OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH2OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH2OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH2OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH2OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)
+#define DCP_CH2OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH2OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH2OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH2OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH2OPTS_RSVD_SHIFT (16U)
+#define DCP_CH2OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH3CMDPTR - DCP channel 3 command pointer address register */
 /*! @{ */
-#define DCP_CH3CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH3CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH3CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)
+#define DCP_CH3CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH3CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH3CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH3SEMA - DCP channel 3 semaphore register */
 /*! @{ */
-#define DCP_CH3SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH3SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH3SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)
-#define DCP_CH3SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH3SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH3SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)
+#define DCP_CH3SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH3SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH3SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)
+#define DCP_CH3SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH3SEMA_VALUE_SHIFT (16U)
+#define DCP_CH3SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH3STAT - DCP channel 3 status register */
 /*! @{ */
-#define DCP_CH3STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH3STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH3STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH3STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH3STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH3STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)
-#define DCP_CH3STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH3STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH3STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)
-#define DCP_CH3STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH3STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH3STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)
-#define DCP_CH3STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH3STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH3STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)
-#define DCP_CH3STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH3STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH3STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)
-#define DCP_CH3STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH3STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH3STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH3STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH3STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)
-#define DCP_CH3STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH3STAT_TAG_SHIFT                    (24U)
-#define DCP_CH3STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)
+#define DCP_CH3STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH3STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH3STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH3STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH3STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH3STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)
+#define DCP_CH3STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH3STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH3STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)
+#define DCP_CH3STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH3STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH3STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)
+#define DCP_CH3STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH3STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH3STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)
+#define DCP_CH3STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH3STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH3STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)
+#define DCP_CH3STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH3STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH3STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH3STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH3STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)
+#define DCP_CH3STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH3STAT_TAG_SHIFT (24U)
+#define DCP_CH3STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH3OPTS - DCP channel 3 options register */
 /*! @{ */
-#define DCP_CH3OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH3OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH3OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH3OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH3OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH3OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)
+#define DCP_CH3OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH3OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH3OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH3OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH3OPTS_RSVD_SHIFT (16U)
+#define DCP_CH3OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name DBGSELECT - DCP debug select register */
 /*! @{ */
-#define DCP_DBGSELECT_INDEX_MASK                 (0xFFU)
-#define DCP_DBGSELECT_INDEX_SHIFT                (0U)
-#define DCP_DBGSELECT_INDEX(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)
-#define DCP_DBGSELECT_RSVD_MASK                  (0xFFFFFF00U)
-#define DCP_DBGSELECT_RSVD_SHIFT                 (8U)
-#define DCP_DBGSELECT_RSVD(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)
+#define DCP_DBGSELECT_INDEX_MASK  (0xFFU)
+#define DCP_DBGSELECT_INDEX_SHIFT (0U)
+#define DCP_DBGSELECT_INDEX(x)    (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)
+#define DCP_DBGSELECT_RSVD_MASK   (0xFFFFFF00U)
+#define DCP_DBGSELECT_RSVD_SHIFT  (8U)
+#define DCP_DBGSELECT_RSVD(x)     (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)
 /*! @} */
 
 /*! @name DBGDATA - DCP debug data register */
 /*! @{ */
-#define DCP_DBGDATA_DATA_MASK                    (0xFFFFFFFFU)
-#define DCP_DBGDATA_DATA_SHIFT                   (0U)
-#define DCP_DBGDATA_DATA(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)
+#define DCP_DBGDATA_DATA_MASK  (0xFFFFFFFFU)
+#define DCP_DBGDATA_DATA_SHIFT (0U)
+#define DCP_DBGDATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)
 /*! @} */
 
 /*! @name PAGETABLE - DCP page table register */
 /*! @{ */
-#define DCP_PAGETABLE_ENABLE_MASK                (0x1U)
-#define DCP_PAGETABLE_ENABLE_SHIFT               (0U)
-#define DCP_PAGETABLE_ENABLE(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)
-#define DCP_PAGETABLE_FLUSH_MASK                 (0x2U)
-#define DCP_PAGETABLE_FLUSH_SHIFT                (1U)
-#define DCP_PAGETABLE_FLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)
-#define DCP_PAGETABLE_BASE_MASK                  (0xFFFFFFFCU)
-#define DCP_PAGETABLE_BASE_SHIFT                 (2U)
-#define DCP_PAGETABLE_BASE(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)
+#define DCP_PAGETABLE_ENABLE_MASK  (0x1U)
+#define DCP_PAGETABLE_ENABLE_SHIFT (0U)
+#define DCP_PAGETABLE_ENABLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)
+#define DCP_PAGETABLE_FLUSH_MASK  (0x2U)
+#define DCP_PAGETABLE_FLUSH_SHIFT (1U)
+#define DCP_PAGETABLE_FLUSH(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)
+#define DCP_PAGETABLE_BASE_MASK   (0xFFFFFFFCU)
+#define DCP_PAGETABLE_BASE_SHIFT  (2U)
+#define DCP_PAGETABLE_BASE(x)     (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)
 /*! @} */
 
 /*! @name VERSION - DCP version register */
 /*! @{ */
-#define DCP_VERSION_STEP_MASK                    (0xFFFFU)
-#define DCP_VERSION_STEP_SHIFT                   (0U)
-#define DCP_VERSION_STEP(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)
-#define DCP_VERSION_MINOR_MASK                   (0xFF0000U)
-#define DCP_VERSION_MINOR_SHIFT                  (16U)
-#define DCP_VERSION_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)
-#define DCP_VERSION_MAJOR_MASK                   (0xFF000000U)
-#define DCP_VERSION_MAJOR_SHIFT                  (24U)
-#define DCP_VERSION_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)
+#define DCP_VERSION_STEP_MASK   (0xFFFFU)
+#define DCP_VERSION_STEP_SHIFT  (0U)
+#define DCP_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)
+#define DCP_VERSION_MINOR_MASK  (0xFF0000U)
+#define DCP_VERSION_MINOR_SHIFT (16U)
+#define DCP_VERSION_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)
+#define DCP_VERSION_MAJOR_MASK  (0xFF000000U)
+#define DCP_VERSION_MAJOR_SHIFT (24U)
+#define DCP_VERSION_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group DCP_Register_Masks */
 
-
 /* DCP - Peripheral instance base addresses */
 /** Peripheral DCP base address */
-#define DCP_BASE                                 (0x402FC000u)
+#define DCP_BASE (0x402FC000u)
 /** Peripheral DCP base pointer */
-#define DCP                                      ((DCP_Type *)DCP_BASE)
+#define DCP ((DCP_Type *)DCP_BASE)
 /** Array initializer of DCP peripheral base addresses */
-#define DCP_BASE_ADDRS                           { DCP_BASE }
+#define DCP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        DCP_BASE                                                                                                       \
+    }
 /** Array initializer of DCP peripheral base pointers */
-#define DCP_BASE_PTRS                            { DCP }
+#define DCP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        DCP                                                                                                            \
+    }
 /** Interrupt vectors for the DCP peripheral type */
-#define DCP_IRQS                                 { DCP_IRQn }
-#define DCP_VMI_IRQS                             { DCP_VMI_IRQn }
+#define DCP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        DCP_IRQn                                                                                                       \
+    }
+#define DCP_VMI_IRQS                                                                                                   \
+    {                                                                                                                  \
+        DCP_VMI_IRQn                                                                                                   \
+    }
 
 /*!
  * @}
  */ /* end of group DCP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DMA Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6953,86 +8214,99 @@ typedef struct {
  */
 
 /** DMA - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CR;                                /**< Control Register, offset: 0x0 */
-  __I  uint32_t ES;                                /**< Error Status Register, offset: 0x4 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t ERQ;                               /**< Enable Request Register, offset: 0xC */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t EEI;                               /**< Enable Error Interrupt Register, offset: 0x14 */
-  __O  uint8_t CEEI;                               /**< Clear Enable Error Interrupt Register, offset: 0x18 */
-  __O  uint8_t SEEI;                               /**< Set Enable Error Interrupt Register, offset: 0x19 */
-  __O  uint8_t CERQ;                               /**< Clear Enable Request Register, offset: 0x1A */
-  __O  uint8_t SERQ;                               /**< Set Enable Request Register, offset: 0x1B */
-  __O  uint8_t CDNE;                               /**< Clear DONE Status Bit Register, offset: 0x1C */
-  __O  uint8_t SSRT;                               /**< Set START Bit Register, offset: 0x1D */
-  __O  uint8_t CERR;                               /**< Clear Error Register, offset: 0x1E */
-  __O  uint8_t CINT;                               /**< Clear Interrupt Request Register, offset: 0x1F */
-       uint8_t RESERVED_2[4];
-  __IO uint32_t INT;                               /**< Interrupt Request Register, offset: 0x24 */
-       uint8_t RESERVED_3[4];
-  __IO uint32_t ERR;                               /**< Error Register, offset: 0x2C */
-       uint8_t RESERVED_4[4];
-  __I  uint32_t HRS;                               /**< Hardware Request Status Register, offset: 0x34 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t EARS;                              /**< Enable Asynchronous Request in Stop Register, offset: 0x44 */
-       uint8_t RESERVED_6[184];
-  __IO uint8_t DCHPRI3;                            /**< Channel n Priority Register, offset: 0x100 */
-  __IO uint8_t DCHPRI2;                            /**< Channel n Priority Register, offset: 0x101 */
-  __IO uint8_t DCHPRI1;                            /**< Channel n Priority Register, offset: 0x102 */
-  __IO uint8_t DCHPRI0;                            /**< Channel n Priority Register, offset: 0x103 */
-  __IO uint8_t DCHPRI7;                            /**< Channel n Priority Register, offset: 0x104 */
-  __IO uint8_t DCHPRI6;                            /**< Channel n Priority Register, offset: 0x105 */
-  __IO uint8_t DCHPRI5;                            /**< Channel n Priority Register, offset: 0x106 */
-  __IO uint8_t DCHPRI4;                            /**< Channel n Priority Register, offset: 0x107 */
-  __IO uint8_t DCHPRI11;                           /**< Channel n Priority Register, offset: 0x108 */
-  __IO uint8_t DCHPRI10;                           /**< Channel n Priority Register, offset: 0x109 */
-  __IO uint8_t DCHPRI9;                            /**< Channel n Priority Register, offset: 0x10A */
-  __IO uint8_t DCHPRI8;                            /**< Channel n Priority Register, offset: 0x10B */
-  __IO uint8_t DCHPRI15;                           /**< Channel n Priority Register, offset: 0x10C */
-  __IO uint8_t DCHPRI14;                           /**< Channel n Priority Register, offset: 0x10D */
-  __IO uint8_t DCHPRI13;                           /**< Channel n Priority Register, offset: 0x10E */
-  __IO uint8_t DCHPRI12;                           /**< Channel n Priority Register, offset: 0x10F */
-  __IO uint8_t DCHPRI19;                           /**< Channel n Priority Register, offset: 0x110 */
-  __IO uint8_t DCHPRI18;                           /**< Channel n Priority Register, offset: 0x111 */
-  __IO uint8_t DCHPRI17;                           /**< Channel n Priority Register, offset: 0x112 */
-  __IO uint8_t DCHPRI16;                           /**< Channel n Priority Register, offset: 0x113 */
-  __IO uint8_t DCHPRI23;                           /**< Channel n Priority Register, offset: 0x114 */
-  __IO uint8_t DCHPRI22;                           /**< Channel n Priority Register, offset: 0x115 */
-  __IO uint8_t DCHPRI21;                           /**< Channel n Priority Register, offset: 0x116 */
-  __IO uint8_t DCHPRI20;                           /**< Channel n Priority Register, offset: 0x117 */
-  __IO uint8_t DCHPRI27;                           /**< Channel n Priority Register, offset: 0x118 */
-  __IO uint8_t DCHPRI26;                           /**< Channel n Priority Register, offset: 0x119 */
-  __IO uint8_t DCHPRI25;                           /**< Channel n Priority Register, offset: 0x11A */
-  __IO uint8_t DCHPRI24;                           /**< Channel n Priority Register, offset: 0x11B */
-  __IO uint8_t DCHPRI31;                           /**< Channel n Priority Register, offset: 0x11C */
-  __IO uint8_t DCHPRI30;                           /**< Channel n Priority Register, offset: 0x11D */
-  __IO uint8_t DCHPRI29;                           /**< Channel n Priority Register, offset: 0x11E */
-  __IO uint8_t DCHPRI28;                           /**< Channel n Priority Register, offset: 0x11F */
-       uint8_t RESERVED_7[3808];
-  struct {                                         /* offset: 0x1000, array step: 0x20 */
-    __IO uint32_t SADDR;                             /**< TCD Source Address, array offset: 0x1000, array step: 0x20 */
-    __IO uint16_t SOFF;                              /**< TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20 */
-    __IO uint16_t ATTR;                              /**< TCD Transfer Attributes, array offset: 0x1006, array step: 0x20 */
-    union {                                          /* offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLNO;                       /**< TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLOFFNO;                    /**< TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled), array offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLOFFYES;                   /**< TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled), array offset: 0x1008, array step: 0x20 */
-    };
-    __IO uint32_t SLAST;                             /**< TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20 */
-    __IO uint32_t DADDR;                             /**< TCD Destination Address, array offset: 0x1010, array step: 0x20 */
-    __IO uint16_t DOFF;                              /**< TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20 */
-    union {                                          /* offset: 0x1016, array step: 0x20 */
-      __IO uint16_t CITER_ELINKNO;                     /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x1016, array step: 0x20 */
-      __IO uint16_t CITER_ELINKYES;                    /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x1016, array step: 0x20 */
-    };
-    __IO uint32_t DLAST_SGA;                         /**< TCD Last Destination Address Adjustment/Scatter Gather Address, array offset: 0x1018, array step: 0x20 */
-    __IO uint16_t CSR;                               /**< TCD Control and Status, array offset: 0x101C, array step: 0x20 */
-    union {                                          /* offset: 0x101E, array step: 0x20 */
-      __IO uint16_t BITER_ELINKNO;                     /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x101E, array step: 0x20 */
-      __IO uint16_t BITER_ELINKYES;                    /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x101E, array step: 0x20 */
-    };
-  } TCD[32];
+typedef struct
+{
+    __IO uint32_t CR; /**< Control Register, offset: 0x0 */
+    __I uint32_t ES;  /**< Error Status Register, offset: 0x4 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t ERQ; /**< Enable Request Register, offset: 0xC */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t EEI; /**< Enable Error Interrupt Register, offset: 0x14 */
+    __O uint8_t CEEI;  /**< Clear Enable Error Interrupt Register, offset: 0x18 */
+    __O uint8_t SEEI;  /**< Set Enable Error Interrupt Register, offset: 0x19 */
+    __O uint8_t CERQ;  /**< Clear Enable Request Register, offset: 0x1A */
+    __O uint8_t SERQ;  /**< Set Enable Request Register, offset: 0x1B */
+    __O uint8_t CDNE;  /**< Clear DONE Status Bit Register, offset: 0x1C */
+    __O uint8_t SSRT;  /**< Set START Bit Register, offset: 0x1D */
+    __O uint8_t CERR;  /**< Clear Error Register, offset: 0x1E */
+    __O uint8_t CINT;  /**< Clear Interrupt Request Register, offset: 0x1F */
+    uint8_t RESERVED_2[4];
+    __IO uint32_t INT; /**< Interrupt Request Register, offset: 0x24 */
+    uint8_t RESERVED_3[4];
+    __IO uint32_t ERR; /**< Error Register, offset: 0x2C */
+    uint8_t RESERVED_4[4];
+    __I uint32_t HRS; /**< Hardware Request Status Register, offset: 0x34 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t EARS; /**< Enable Asynchronous Request in Stop Register, offset: 0x44 */
+    uint8_t RESERVED_6[184];
+    __IO uint8_t DCHPRI3;  /**< Channel n Priority Register, offset: 0x100 */
+    __IO uint8_t DCHPRI2;  /**< Channel n Priority Register, offset: 0x101 */
+    __IO uint8_t DCHPRI1;  /**< Channel n Priority Register, offset: 0x102 */
+    __IO uint8_t DCHPRI0;  /**< Channel n Priority Register, offset: 0x103 */
+    __IO uint8_t DCHPRI7;  /**< Channel n Priority Register, offset: 0x104 */
+    __IO uint8_t DCHPRI6;  /**< Channel n Priority Register, offset: 0x105 */
+    __IO uint8_t DCHPRI5;  /**< Channel n Priority Register, offset: 0x106 */
+    __IO uint8_t DCHPRI4;  /**< Channel n Priority Register, offset: 0x107 */
+    __IO uint8_t DCHPRI11; /**< Channel n Priority Register, offset: 0x108 */
+    __IO uint8_t DCHPRI10; /**< Channel n Priority Register, offset: 0x109 */
+    __IO uint8_t DCHPRI9;  /**< Channel n Priority Register, offset: 0x10A */
+    __IO uint8_t DCHPRI8;  /**< Channel n Priority Register, offset: 0x10B */
+    __IO uint8_t DCHPRI15; /**< Channel n Priority Register, offset: 0x10C */
+    __IO uint8_t DCHPRI14; /**< Channel n Priority Register, offset: 0x10D */
+    __IO uint8_t DCHPRI13; /**< Channel n Priority Register, offset: 0x10E */
+    __IO uint8_t DCHPRI12; /**< Channel n Priority Register, offset: 0x10F */
+    __IO uint8_t DCHPRI19; /**< Channel n Priority Register, offset: 0x110 */
+    __IO uint8_t DCHPRI18; /**< Channel n Priority Register, offset: 0x111 */
+    __IO uint8_t DCHPRI17; /**< Channel n Priority Register, offset: 0x112 */
+    __IO uint8_t DCHPRI16; /**< Channel n Priority Register, offset: 0x113 */
+    __IO uint8_t DCHPRI23; /**< Channel n Priority Register, offset: 0x114 */
+    __IO uint8_t DCHPRI22; /**< Channel n Priority Register, offset: 0x115 */
+    __IO uint8_t DCHPRI21; /**< Channel n Priority Register, offset: 0x116 */
+    __IO uint8_t DCHPRI20; /**< Channel n Priority Register, offset: 0x117 */
+    __IO uint8_t DCHPRI27; /**< Channel n Priority Register, offset: 0x118 */
+    __IO uint8_t DCHPRI26; /**< Channel n Priority Register, offset: 0x119 */
+    __IO uint8_t DCHPRI25; /**< Channel n Priority Register, offset: 0x11A */
+    __IO uint8_t DCHPRI24; /**< Channel n Priority Register, offset: 0x11B */
+    __IO uint8_t DCHPRI31; /**< Channel n Priority Register, offset: 0x11C */
+    __IO uint8_t DCHPRI30; /**< Channel n Priority Register, offset: 0x11D */
+    __IO uint8_t DCHPRI29; /**< Channel n Priority Register, offset: 0x11E */
+    __IO uint8_t DCHPRI28; /**< Channel n Priority Register, offset: 0x11F */
+    uint8_t RESERVED_7[3808];
+    struct
+    {                        /* offset: 0x1000, array step: 0x20 */
+        __IO uint32_t SADDR; /**< TCD Source Address, array offset: 0x1000, array step: 0x20 */
+        __IO uint16_t SOFF;  /**< TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20 */
+        __IO uint16_t ATTR;  /**< TCD Transfer Attributes, array offset: 0x1006, array step: 0x20 */
+        union
+        {                                 /* offset: 0x1008, array step: 0x20 */
+            __IO uint32_t NBYTES_MLNO;    /**< TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008,
+                                             array step: 0x20 */
+            __IO uint32_t NBYTES_MLOFFNO; /**< TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset
+                                             Disabled), array offset: 0x1008, array step: 0x20 */
+            __IO uint32_t NBYTES_MLOFFYES; /**< TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled),
+                                              array offset: 0x1008, array step: 0x20 */
+        };
+        __IO uint32_t SLAST; /**< TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20 */
+        __IO uint32_t DADDR; /**< TCD Destination Address, array offset: 0x1010, array step: 0x20 */
+        __IO uint16_t DOFF;  /**< TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20 */
+        union
+        {                                 /* offset: 0x1016, array step: 0x20 */
+            __IO uint16_t CITER_ELINKNO;  /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled),
+                                             array offset: 0x1016, array step: 0x20 */
+            __IO uint16_t CITER_ELINKYES; /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled),
+                                             array offset: 0x1016, array step: 0x20 */
+        };
+        __IO uint32_t DLAST_SGA; /**< TCD Last Destination Address Adjustment/Scatter Gather Address, array offset:
+                                    0x1018, array step: 0x20 */
+        __IO uint16_t CSR;       /**< TCD Control and Status, array offset: 0x101C, array step: 0x20 */
+        union
+        {                                 /* offset: 0x101E, array step: 0x20 */
+            __IO uint16_t BITER_ELINKNO;  /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking
+                                             Disabled), array offset: 0x101E, array step: 0x20 */
+            __IO uint16_t BITER_ELINKYES; /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking
+                                             Enabled), array offset: 0x101E, array step: 0x20 */
+        };
+    } TCD[32];
 } DMA_Type;
 
 /* ----------------------------------------------------------------------------
@@ -7046,1546 +8320,1581 @@ typedef struct {
 
 /*! @name CR - Control Register */
 /*! @{ */
-#define DMA_CR_EDBG_MASK                         (0x2U)
-#define DMA_CR_EDBG_SHIFT                        (1U)
-#define DMA_CR_EDBG(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_EDBG_SHIFT)) & DMA_CR_EDBG_MASK)
-#define DMA_CR_ERCA_MASK                         (0x4U)
-#define DMA_CR_ERCA_SHIFT                        (2U)
-#define DMA_CR_ERCA(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERCA_SHIFT)) & DMA_CR_ERCA_MASK)
-#define DMA_CR_ERGA_MASK                         (0x8U)
-#define DMA_CR_ERGA_SHIFT                        (3U)
-#define DMA_CR_ERGA(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERGA_SHIFT)) & DMA_CR_ERGA_MASK)
-#define DMA_CR_HOE_MASK                          (0x10U)
-#define DMA_CR_HOE_SHIFT                         (4U)
-#define DMA_CR_HOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_HOE_SHIFT)) & DMA_CR_HOE_MASK)
-#define DMA_CR_HALT_MASK                         (0x20U)
-#define DMA_CR_HALT_SHIFT                        (5U)
-#define DMA_CR_HALT(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_HALT_SHIFT)) & DMA_CR_HALT_MASK)
-#define DMA_CR_CLM_MASK                          (0x40U)
-#define DMA_CR_CLM_SHIFT                         (6U)
-#define DMA_CR_CLM(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_CLM_SHIFT)) & DMA_CR_CLM_MASK)
-#define DMA_CR_EMLM_MASK                         (0x80U)
-#define DMA_CR_EMLM_SHIFT                        (7U)
-#define DMA_CR_EMLM(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_EMLM_SHIFT)) & DMA_CR_EMLM_MASK)
-#define DMA_CR_GRP0PRI_MASK                      (0x100U)
-#define DMA_CR_GRP0PRI_SHIFT                     (8U)
-#define DMA_CR_GRP0PRI(x)                        (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP0PRI_SHIFT)) & DMA_CR_GRP0PRI_MASK)
-#define DMA_CR_GRP1PRI_MASK                      (0x400U)
-#define DMA_CR_GRP1PRI_SHIFT                     (10U)
-#define DMA_CR_GRP1PRI(x)                        (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP1PRI_SHIFT)) & DMA_CR_GRP1PRI_MASK)
-#define DMA_CR_ECX_MASK                          (0x10000U)
-#define DMA_CR_ECX_SHIFT                         (16U)
-#define DMA_CR_ECX(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_ECX_SHIFT)) & DMA_CR_ECX_MASK)
-#define DMA_CR_CX_MASK                           (0x20000U)
-#define DMA_CR_CX_SHIFT                          (17U)
-#define DMA_CR_CX(x)                             (((uint32_t)(((uint32_t)(x)) << DMA_CR_CX_SHIFT)) & DMA_CR_CX_MASK)
-#define DMA_CR_ACTIVE_MASK                       (0x80000000U)
-#define DMA_CR_ACTIVE_SHIFT                      (31U)
-#define DMA_CR_ACTIVE(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_CR_ACTIVE_SHIFT)) & DMA_CR_ACTIVE_MASK)
+#define DMA_CR_EDBG_MASK     (0x2U)
+#define DMA_CR_EDBG_SHIFT    (1U)
+#define DMA_CR_EDBG(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_EDBG_SHIFT)) & DMA_CR_EDBG_MASK)
+#define DMA_CR_ERCA_MASK     (0x4U)
+#define DMA_CR_ERCA_SHIFT    (2U)
+#define DMA_CR_ERCA(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERCA_SHIFT)) & DMA_CR_ERCA_MASK)
+#define DMA_CR_ERGA_MASK     (0x8U)
+#define DMA_CR_ERGA_SHIFT    (3U)
+#define DMA_CR_ERGA(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERGA_SHIFT)) & DMA_CR_ERGA_MASK)
+#define DMA_CR_HOE_MASK      (0x10U)
+#define DMA_CR_HOE_SHIFT     (4U)
+#define DMA_CR_HOE(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_HOE_SHIFT)) & DMA_CR_HOE_MASK)
+#define DMA_CR_HALT_MASK     (0x20U)
+#define DMA_CR_HALT_SHIFT    (5U)
+#define DMA_CR_HALT(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_HALT_SHIFT)) & DMA_CR_HALT_MASK)
+#define DMA_CR_CLM_MASK      (0x40U)
+#define DMA_CR_CLM_SHIFT     (6U)
+#define DMA_CR_CLM(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_CLM_SHIFT)) & DMA_CR_CLM_MASK)
+#define DMA_CR_EMLM_MASK     (0x80U)
+#define DMA_CR_EMLM_SHIFT    (7U)
+#define DMA_CR_EMLM(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_EMLM_SHIFT)) & DMA_CR_EMLM_MASK)
+#define DMA_CR_GRP0PRI_MASK  (0x100U)
+#define DMA_CR_GRP0PRI_SHIFT (8U)
+#define DMA_CR_GRP0PRI(x)    (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP0PRI_SHIFT)) & DMA_CR_GRP0PRI_MASK)
+#define DMA_CR_GRP1PRI_MASK  (0x400U)
+#define DMA_CR_GRP1PRI_SHIFT (10U)
+#define DMA_CR_GRP1PRI(x)    (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP1PRI_SHIFT)) & DMA_CR_GRP1PRI_MASK)
+#define DMA_CR_ECX_MASK      (0x10000U)
+#define DMA_CR_ECX_SHIFT     (16U)
+#define DMA_CR_ECX(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_ECX_SHIFT)) & DMA_CR_ECX_MASK)
+#define DMA_CR_CX_MASK       (0x20000U)
+#define DMA_CR_CX_SHIFT      (17U)
+#define DMA_CR_CX(x)         (((uint32_t)(((uint32_t)(x)) << DMA_CR_CX_SHIFT)) & DMA_CR_CX_MASK)
+#define DMA_CR_ACTIVE_MASK   (0x80000000U)
+#define DMA_CR_ACTIVE_SHIFT  (31U)
+#define DMA_CR_ACTIVE(x)     (((uint32_t)(((uint32_t)(x)) << DMA_CR_ACTIVE_SHIFT)) & DMA_CR_ACTIVE_MASK)
 /*! @} */
 
 /*! @name ES - Error Status Register */
 /*! @{ */
-#define DMA_ES_DBE_MASK                          (0x1U)
-#define DMA_ES_DBE_SHIFT                         (0U)
-#define DMA_ES_DBE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DBE_SHIFT)) & DMA_ES_DBE_MASK)
-#define DMA_ES_SBE_MASK                          (0x2U)
-#define DMA_ES_SBE_SHIFT                         (1U)
-#define DMA_ES_SBE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SBE_SHIFT)) & DMA_ES_SBE_MASK)
-#define DMA_ES_SGE_MASK                          (0x4U)
-#define DMA_ES_SGE_SHIFT                         (2U)
-#define DMA_ES_SGE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SGE_SHIFT)) & DMA_ES_SGE_MASK)
-#define DMA_ES_NCE_MASK                          (0x8U)
-#define DMA_ES_NCE_SHIFT                         (3U)
-#define DMA_ES_NCE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_NCE_SHIFT)) & DMA_ES_NCE_MASK)
-#define DMA_ES_DOE_MASK                          (0x10U)
-#define DMA_ES_DOE_SHIFT                         (4U)
-#define DMA_ES_DOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DOE_SHIFT)) & DMA_ES_DOE_MASK)
-#define DMA_ES_DAE_MASK                          (0x20U)
-#define DMA_ES_DAE_SHIFT                         (5U)
-#define DMA_ES_DAE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DAE_SHIFT)) & DMA_ES_DAE_MASK)
-#define DMA_ES_SOE_MASK                          (0x40U)
-#define DMA_ES_SOE_SHIFT                         (6U)
-#define DMA_ES_SOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SOE_SHIFT)) & DMA_ES_SOE_MASK)
-#define DMA_ES_SAE_MASK                          (0x80U)
-#define DMA_ES_SAE_SHIFT                         (7U)
-#define DMA_ES_SAE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SAE_SHIFT)) & DMA_ES_SAE_MASK)
-#define DMA_ES_ERRCHN_MASK                       (0x1F00U)
-#define DMA_ES_ERRCHN_SHIFT                      (8U)
-#define DMA_ES_ERRCHN(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ES_ERRCHN_SHIFT)) & DMA_ES_ERRCHN_MASK)
-#define DMA_ES_CPE_MASK                          (0x4000U)
-#define DMA_ES_CPE_SHIFT                         (14U)
-#define DMA_ES_CPE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_CPE_SHIFT)) & DMA_ES_CPE_MASK)
-#define DMA_ES_GPE_MASK                          (0x8000U)
-#define DMA_ES_GPE_SHIFT                         (15U)
-#define DMA_ES_GPE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_GPE_SHIFT)) & DMA_ES_GPE_MASK)
-#define DMA_ES_ECX_MASK                          (0x10000U)
-#define DMA_ES_ECX_SHIFT                         (16U)
-#define DMA_ES_ECX(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_ECX_SHIFT)) & DMA_ES_ECX_MASK)
-#define DMA_ES_VLD_MASK                          (0x80000000U)
-#define DMA_ES_VLD_SHIFT                         (31U)
-#define DMA_ES_VLD(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_VLD_SHIFT)) & DMA_ES_VLD_MASK)
+#define DMA_ES_DBE_MASK     (0x1U)
+#define DMA_ES_DBE_SHIFT    (0U)
+#define DMA_ES_DBE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DBE_SHIFT)) & DMA_ES_DBE_MASK)
+#define DMA_ES_SBE_MASK     (0x2U)
+#define DMA_ES_SBE_SHIFT    (1U)
+#define DMA_ES_SBE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SBE_SHIFT)) & DMA_ES_SBE_MASK)
+#define DMA_ES_SGE_MASK     (0x4U)
+#define DMA_ES_SGE_SHIFT    (2U)
+#define DMA_ES_SGE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SGE_SHIFT)) & DMA_ES_SGE_MASK)
+#define DMA_ES_NCE_MASK     (0x8U)
+#define DMA_ES_NCE_SHIFT    (3U)
+#define DMA_ES_NCE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_NCE_SHIFT)) & DMA_ES_NCE_MASK)
+#define DMA_ES_DOE_MASK     (0x10U)
+#define DMA_ES_DOE_SHIFT    (4U)
+#define DMA_ES_DOE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DOE_SHIFT)) & DMA_ES_DOE_MASK)
+#define DMA_ES_DAE_MASK     (0x20U)
+#define DMA_ES_DAE_SHIFT    (5U)
+#define DMA_ES_DAE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DAE_SHIFT)) & DMA_ES_DAE_MASK)
+#define DMA_ES_SOE_MASK     (0x40U)
+#define DMA_ES_SOE_SHIFT    (6U)
+#define DMA_ES_SOE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SOE_SHIFT)) & DMA_ES_SOE_MASK)
+#define DMA_ES_SAE_MASK     (0x80U)
+#define DMA_ES_SAE_SHIFT    (7U)
+#define DMA_ES_SAE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SAE_SHIFT)) & DMA_ES_SAE_MASK)
+#define DMA_ES_ERRCHN_MASK  (0x1F00U)
+#define DMA_ES_ERRCHN_SHIFT (8U)
+#define DMA_ES_ERRCHN(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ES_ERRCHN_SHIFT)) & DMA_ES_ERRCHN_MASK)
+#define DMA_ES_CPE_MASK     (0x4000U)
+#define DMA_ES_CPE_SHIFT    (14U)
+#define DMA_ES_CPE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_CPE_SHIFT)) & DMA_ES_CPE_MASK)
+#define DMA_ES_GPE_MASK     (0x8000U)
+#define DMA_ES_GPE_SHIFT    (15U)
+#define DMA_ES_GPE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_GPE_SHIFT)) & DMA_ES_GPE_MASK)
+#define DMA_ES_ECX_MASK     (0x10000U)
+#define DMA_ES_ECX_SHIFT    (16U)
+#define DMA_ES_ECX(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_ECX_SHIFT)) & DMA_ES_ECX_MASK)
+#define DMA_ES_VLD_MASK     (0x80000000U)
+#define DMA_ES_VLD_SHIFT    (31U)
+#define DMA_ES_VLD(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_VLD_SHIFT)) & DMA_ES_VLD_MASK)
 /*! @} */
 
 /*! @name ERQ - Enable Request Register */
 /*! @{ */
-#define DMA_ERQ_ERQ0_MASK                        (0x1U)
-#define DMA_ERQ_ERQ0_SHIFT                       (0U)
-#define DMA_ERQ_ERQ0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ0_SHIFT)) & DMA_ERQ_ERQ0_MASK)
-#define DMA_ERQ_ERQ1_MASK                        (0x2U)
-#define DMA_ERQ_ERQ1_SHIFT                       (1U)
-#define DMA_ERQ_ERQ1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ1_SHIFT)) & DMA_ERQ_ERQ1_MASK)
-#define DMA_ERQ_ERQ2_MASK                        (0x4U)
-#define DMA_ERQ_ERQ2_SHIFT                       (2U)
-#define DMA_ERQ_ERQ2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ2_SHIFT)) & DMA_ERQ_ERQ2_MASK)
-#define DMA_ERQ_ERQ3_MASK                        (0x8U)
-#define DMA_ERQ_ERQ3_SHIFT                       (3U)
-#define DMA_ERQ_ERQ3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ3_SHIFT)) & DMA_ERQ_ERQ3_MASK)
-#define DMA_ERQ_ERQ4_MASK                        (0x10U)
-#define DMA_ERQ_ERQ4_SHIFT                       (4U)
-#define DMA_ERQ_ERQ4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ4_SHIFT)) & DMA_ERQ_ERQ4_MASK)
-#define DMA_ERQ_ERQ5_MASK                        (0x20U)
-#define DMA_ERQ_ERQ5_SHIFT                       (5U)
-#define DMA_ERQ_ERQ5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ5_SHIFT)) & DMA_ERQ_ERQ5_MASK)
-#define DMA_ERQ_ERQ6_MASK                        (0x40U)
-#define DMA_ERQ_ERQ6_SHIFT                       (6U)
-#define DMA_ERQ_ERQ6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ6_SHIFT)) & DMA_ERQ_ERQ6_MASK)
-#define DMA_ERQ_ERQ7_MASK                        (0x80U)
-#define DMA_ERQ_ERQ7_SHIFT                       (7U)
-#define DMA_ERQ_ERQ7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ7_SHIFT)) & DMA_ERQ_ERQ7_MASK)
-#define DMA_ERQ_ERQ8_MASK                        (0x100U)
-#define DMA_ERQ_ERQ8_SHIFT                       (8U)
-#define DMA_ERQ_ERQ8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ8_SHIFT)) & DMA_ERQ_ERQ8_MASK)
-#define DMA_ERQ_ERQ9_MASK                        (0x200U)
-#define DMA_ERQ_ERQ9_SHIFT                       (9U)
-#define DMA_ERQ_ERQ9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ9_SHIFT)) & DMA_ERQ_ERQ9_MASK)
-#define DMA_ERQ_ERQ10_MASK                       (0x400U)
-#define DMA_ERQ_ERQ10_SHIFT                      (10U)
-#define DMA_ERQ_ERQ10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ10_SHIFT)) & DMA_ERQ_ERQ10_MASK)
-#define DMA_ERQ_ERQ11_MASK                       (0x800U)
-#define DMA_ERQ_ERQ11_SHIFT                      (11U)
-#define DMA_ERQ_ERQ11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ11_SHIFT)) & DMA_ERQ_ERQ11_MASK)
-#define DMA_ERQ_ERQ12_MASK                       (0x1000U)
-#define DMA_ERQ_ERQ12_SHIFT                      (12U)
-#define DMA_ERQ_ERQ12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ12_SHIFT)) & DMA_ERQ_ERQ12_MASK)
-#define DMA_ERQ_ERQ13_MASK                       (0x2000U)
-#define DMA_ERQ_ERQ13_SHIFT                      (13U)
-#define DMA_ERQ_ERQ13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ13_SHIFT)) & DMA_ERQ_ERQ13_MASK)
-#define DMA_ERQ_ERQ14_MASK                       (0x4000U)
-#define DMA_ERQ_ERQ14_SHIFT                      (14U)
-#define DMA_ERQ_ERQ14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ14_SHIFT)) & DMA_ERQ_ERQ14_MASK)
-#define DMA_ERQ_ERQ15_MASK                       (0x8000U)
-#define DMA_ERQ_ERQ15_SHIFT                      (15U)
-#define DMA_ERQ_ERQ15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ15_SHIFT)) & DMA_ERQ_ERQ15_MASK)
-#define DMA_ERQ_ERQ16_MASK                       (0x10000U)
-#define DMA_ERQ_ERQ16_SHIFT                      (16U)
-#define DMA_ERQ_ERQ16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ16_SHIFT)) & DMA_ERQ_ERQ16_MASK)
-#define DMA_ERQ_ERQ17_MASK                       (0x20000U)
-#define DMA_ERQ_ERQ17_SHIFT                      (17U)
-#define DMA_ERQ_ERQ17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ17_SHIFT)) & DMA_ERQ_ERQ17_MASK)
-#define DMA_ERQ_ERQ18_MASK                       (0x40000U)
-#define DMA_ERQ_ERQ18_SHIFT                      (18U)
-#define DMA_ERQ_ERQ18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ18_SHIFT)) & DMA_ERQ_ERQ18_MASK)
-#define DMA_ERQ_ERQ19_MASK                       (0x80000U)
-#define DMA_ERQ_ERQ19_SHIFT                      (19U)
-#define DMA_ERQ_ERQ19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ19_SHIFT)) & DMA_ERQ_ERQ19_MASK)
-#define DMA_ERQ_ERQ20_MASK                       (0x100000U)
-#define DMA_ERQ_ERQ20_SHIFT                      (20U)
-#define DMA_ERQ_ERQ20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ20_SHIFT)) & DMA_ERQ_ERQ20_MASK)
-#define DMA_ERQ_ERQ21_MASK                       (0x200000U)
-#define DMA_ERQ_ERQ21_SHIFT                      (21U)
-#define DMA_ERQ_ERQ21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ21_SHIFT)) & DMA_ERQ_ERQ21_MASK)
-#define DMA_ERQ_ERQ22_MASK                       (0x400000U)
-#define DMA_ERQ_ERQ22_SHIFT                      (22U)
-#define DMA_ERQ_ERQ22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ22_SHIFT)) & DMA_ERQ_ERQ22_MASK)
-#define DMA_ERQ_ERQ23_MASK                       (0x800000U)
-#define DMA_ERQ_ERQ23_SHIFT                      (23U)
-#define DMA_ERQ_ERQ23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ23_SHIFT)) & DMA_ERQ_ERQ23_MASK)
-#define DMA_ERQ_ERQ24_MASK                       (0x1000000U)
-#define DMA_ERQ_ERQ24_SHIFT                      (24U)
-#define DMA_ERQ_ERQ24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ24_SHIFT)) & DMA_ERQ_ERQ24_MASK)
-#define DMA_ERQ_ERQ25_MASK                       (0x2000000U)
-#define DMA_ERQ_ERQ25_SHIFT                      (25U)
-#define DMA_ERQ_ERQ25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ25_SHIFT)) & DMA_ERQ_ERQ25_MASK)
-#define DMA_ERQ_ERQ26_MASK                       (0x4000000U)
-#define DMA_ERQ_ERQ26_SHIFT                      (26U)
-#define DMA_ERQ_ERQ26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ26_SHIFT)) & DMA_ERQ_ERQ26_MASK)
-#define DMA_ERQ_ERQ27_MASK                       (0x8000000U)
-#define DMA_ERQ_ERQ27_SHIFT                      (27U)
-#define DMA_ERQ_ERQ27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ27_SHIFT)) & DMA_ERQ_ERQ27_MASK)
-#define DMA_ERQ_ERQ28_MASK                       (0x10000000U)
-#define DMA_ERQ_ERQ28_SHIFT                      (28U)
-#define DMA_ERQ_ERQ28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ28_SHIFT)) & DMA_ERQ_ERQ28_MASK)
-#define DMA_ERQ_ERQ29_MASK                       (0x20000000U)
-#define DMA_ERQ_ERQ29_SHIFT                      (29U)
-#define DMA_ERQ_ERQ29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ29_SHIFT)) & DMA_ERQ_ERQ29_MASK)
-#define DMA_ERQ_ERQ30_MASK                       (0x40000000U)
-#define DMA_ERQ_ERQ30_SHIFT                      (30U)
-#define DMA_ERQ_ERQ30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ30_SHIFT)) & DMA_ERQ_ERQ30_MASK)
-#define DMA_ERQ_ERQ31_MASK                       (0x80000000U)
-#define DMA_ERQ_ERQ31_SHIFT                      (31U)
-#define DMA_ERQ_ERQ31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ31_SHIFT)) & DMA_ERQ_ERQ31_MASK)
+#define DMA_ERQ_ERQ0_MASK   (0x1U)
+#define DMA_ERQ_ERQ0_SHIFT  (0U)
+#define DMA_ERQ_ERQ0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ0_SHIFT)) & DMA_ERQ_ERQ0_MASK)
+#define DMA_ERQ_ERQ1_MASK   (0x2U)
+#define DMA_ERQ_ERQ1_SHIFT  (1U)
+#define DMA_ERQ_ERQ1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ1_SHIFT)) & DMA_ERQ_ERQ1_MASK)
+#define DMA_ERQ_ERQ2_MASK   (0x4U)
+#define DMA_ERQ_ERQ2_SHIFT  (2U)
+#define DMA_ERQ_ERQ2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ2_SHIFT)) & DMA_ERQ_ERQ2_MASK)
+#define DMA_ERQ_ERQ3_MASK   (0x8U)
+#define DMA_ERQ_ERQ3_SHIFT  (3U)
+#define DMA_ERQ_ERQ3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ3_SHIFT)) & DMA_ERQ_ERQ3_MASK)
+#define DMA_ERQ_ERQ4_MASK   (0x10U)
+#define DMA_ERQ_ERQ4_SHIFT  (4U)
+#define DMA_ERQ_ERQ4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ4_SHIFT)) & DMA_ERQ_ERQ4_MASK)
+#define DMA_ERQ_ERQ5_MASK   (0x20U)
+#define DMA_ERQ_ERQ5_SHIFT  (5U)
+#define DMA_ERQ_ERQ5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ5_SHIFT)) & DMA_ERQ_ERQ5_MASK)
+#define DMA_ERQ_ERQ6_MASK   (0x40U)
+#define DMA_ERQ_ERQ6_SHIFT  (6U)
+#define DMA_ERQ_ERQ6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ6_SHIFT)) & DMA_ERQ_ERQ6_MASK)
+#define DMA_ERQ_ERQ7_MASK   (0x80U)
+#define DMA_ERQ_ERQ7_SHIFT  (7U)
+#define DMA_ERQ_ERQ7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ7_SHIFT)) & DMA_ERQ_ERQ7_MASK)
+#define DMA_ERQ_ERQ8_MASK   (0x100U)
+#define DMA_ERQ_ERQ8_SHIFT  (8U)
+#define DMA_ERQ_ERQ8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ8_SHIFT)) & DMA_ERQ_ERQ8_MASK)
+#define DMA_ERQ_ERQ9_MASK   (0x200U)
+#define DMA_ERQ_ERQ9_SHIFT  (9U)
+#define DMA_ERQ_ERQ9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ9_SHIFT)) & DMA_ERQ_ERQ9_MASK)
+#define DMA_ERQ_ERQ10_MASK  (0x400U)
+#define DMA_ERQ_ERQ10_SHIFT (10U)
+#define DMA_ERQ_ERQ10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ10_SHIFT)) & DMA_ERQ_ERQ10_MASK)
+#define DMA_ERQ_ERQ11_MASK  (0x800U)
+#define DMA_ERQ_ERQ11_SHIFT (11U)
+#define DMA_ERQ_ERQ11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ11_SHIFT)) & DMA_ERQ_ERQ11_MASK)
+#define DMA_ERQ_ERQ12_MASK  (0x1000U)
+#define DMA_ERQ_ERQ12_SHIFT (12U)
+#define DMA_ERQ_ERQ12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ12_SHIFT)) & DMA_ERQ_ERQ12_MASK)
+#define DMA_ERQ_ERQ13_MASK  (0x2000U)
+#define DMA_ERQ_ERQ13_SHIFT (13U)
+#define DMA_ERQ_ERQ13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ13_SHIFT)) & DMA_ERQ_ERQ13_MASK)
+#define DMA_ERQ_ERQ14_MASK  (0x4000U)
+#define DMA_ERQ_ERQ14_SHIFT (14U)
+#define DMA_ERQ_ERQ14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ14_SHIFT)) & DMA_ERQ_ERQ14_MASK)
+#define DMA_ERQ_ERQ15_MASK  (0x8000U)
+#define DMA_ERQ_ERQ15_SHIFT (15U)
+#define DMA_ERQ_ERQ15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ15_SHIFT)) & DMA_ERQ_ERQ15_MASK)
+#define DMA_ERQ_ERQ16_MASK  (0x10000U)
+#define DMA_ERQ_ERQ16_SHIFT (16U)
+#define DMA_ERQ_ERQ16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ16_SHIFT)) & DMA_ERQ_ERQ16_MASK)
+#define DMA_ERQ_ERQ17_MASK  (0x20000U)
+#define DMA_ERQ_ERQ17_SHIFT (17U)
+#define DMA_ERQ_ERQ17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ17_SHIFT)) & DMA_ERQ_ERQ17_MASK)
+#define DMA_ERQ_ERQ18_MASK  (0x40000U)
+#define DMA_ERQ_ERQ18_SHIFT (18U)
+#define DMA_ERQ_ERQ18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ18_SHIFT)) & DMA_ERQ_ERQ18_MASK)
+#define DMA_ERQ_ERQ19_MASK  (0x80000U)
+#define DMA_ERQ_ERQ19_SHIFT (19U)
+#define DMA_ERQ_ERQ19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ19_SHIFT)) & DMA_ERQ_ERQ19_MASK)
+#define DMA_ERQ_ERQ20_MASK  (0x100000U)
+#define DMA_ERQ_ERQ20_SHIFT (20U)
+#define DMA_ERQ_ERQ20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ20_SHIFT)) & DMA_ERQ_ERQ20_MASK)
+#define DMA_ERQ_ERQ21_MASK  (0x200000U)
+#define DMA_ERQ_ERQ21_SHIFT (21U)
+#define DMA_ERQ_ERQ21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ21_SHIFT)) & DMA_ERQ_ERQ21_MASK)
+#define DMA_ERQ_ERQ22_MASK  (0x400000U)
+#define DMA_ERQ_ERQ22_SHIFT (22U)
+#define DMA_ERQ_ERQ22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ22_SHIFT)) & DMA_ERQ_ERQ22_MASK)
+#define DMA_ERQ_ERQ23_MASK  (0x800000U)
+#define DMA_ERQ_ERQ23_SHIFT (23U)
+#define DMA_ERQ_ERQ23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ23_SHIFT)) & DMA_ERQ_ERQ23_MASK)
+#define DMA_ERQ_ERQ24_MASK  (0x1000000U)
+#define DMA_ERQ_ERQ24_SHIFT (24U)
+#define DMA_ERQ_ERQ24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ24_SHIFT)) & DMA_ERQ_ERQ24_MASK)
+#define DMA_ERQ_ERQ25_MASK  (0x2000000U)
+#define DMA_ERQ_ERQ25_SHIFT (25U)
+#define DMA_ERQ_ERQ25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ25_SHIFT)) & DMA_ERQ_ERQ25_MASK)
+#define DMA_ERQ_ERQ26_MASK  (0x4000000U)
+#define DMA_ERQ_ERQ26_SHIFT (26U)
+#define DMA_ERQ_ERQ26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ26_SHIFT)) & DMA_ERQ_ERQ26_MASK)
+#define DMA_ERQ_ERQ27_MASK  (0x8000000U)
+#define DMA_ERQ_ERQ27_SHIFT (27U)
+#define DMA_ERQ_ERQ27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ27_SHIFT)) & DMA_ERQ_ERQ27_MASK)
+#define DMA_ERQ_ERQ28_MASK  (0x10000000U)
+#define DMA_ERQ_ERQ28_SHIFT (28U)
+#define DMA_ERQ_ERQ28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ28_SHIFT)) & DMA_ERQ_ERQ28_MASK)
+#define DMA_ERQ_ERQ29_MASK  (0x20000000U)
+#define DMA_ERQ_ERQ29_SHIFT (29U)
+#define DMA_ERQ_ERQ29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ29_SHIFT)) & DMA_ERQ_ERQ29_MASK)
+#define DMA_ERQ_ERQ30_MASK  (0x40000000U)
+#define DMA_ERQ_ERQ30_SHIFT (30U)
+#define DMA_ERQ_ERQ30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ30_SHIFT)) & DMA_ERQ_ERQ30_MASK)
+#define DMA_ERQ_ERQ31_MASK  (0x80000000U)
+#define DMA_ERQ_ERQ31_SHIFT (31U)
+#define DMA_ERQ_ERQ31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ31_SHIFT)) & DMA_ERQ_ERQ31_MASK)
 /*! @} */
 
 /*! @name EEI - Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_EEI_EEI0_MASK                        (0x1U)
-#define DMA_EEI_EEI0_SHIFT                       (0U)
-#define DMA_EEI_EEI0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI0_SHIFT)) & DMA_EEI_EEI0_MASK)
-#define DMA_EEI_EEI1_MASK                        (0x2U)
-#define DMA_EEI_EEI1_SHIFT                       (1U)
-#define DMA_EEI_EEI1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI1_SHIFT)) & DMA_EEI_EEI1_MASK)
-#define DMA_EEI_EEI2_MASK                        (0x4U)
-#define DMA_EEI_EEI2_SHIFT                       (2U)
-#define DMA_EEI_EEI2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI2_SHIFT)) & DMA_EEI_EEI2_MASK)
-#define DMA_EEI_EEI3_MASK                        (0x8U)
-#define DMA_EEI_EEI3_SHIFT                       (3U)
-#define DMA_EEI_EEI3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI3_SHIFT)) & DMA_EEI_EEI3_MASK)
-#define DMA_EEI_EEI4_MASK                        (0x10U)
-#define DMA_EEI_EEI4_SHIFT                       (4U)
-#define DMA_EEI_EEI4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI4_SHIFT)) & DMA_EEI_EEI4_MASK)
-#define DMA_EEI_EEI5_MASK                        (0x20U)
-#define DMA_EEI_EEI5_SHIFT                       (5U)
-#define DMA_EEI_EEI5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI5_SHIFT)) & DMA_EEI_EEI5_MASK)
-#define DMA_EEI_EEI6_MASK                        (0x40U)
-#define DMA_EEI_EEI6_SHIFT                       (6U)
-#define DMA_EEI_EEI6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI6_SHIFT)) & DMA_EEI_EEI6_MASK)
-#define DMA_EEI_EEI7_MASK                        (0x80U)
-#define DMA_EEI_EEI7_SHIFT                       (7U)
-#define DMA_EEI_EEI7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI7_SHIFT)) & DMA_EEI_EEI7_MASK)
-#define DMA_EEI_EEI8_MASK                        (0x100U)
-#define DMA_EEI_EEI8_SHIFT                       (8U)
-#define DMA_EEI_EEI8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI8_SHIFT)) & DMA_EEI_EEI8_MASK)
-#define DMA_EEI_EEI9_MASK                        (0x200U)
-#define DMA_EEI_EEI9_SHIFT                       (9U)
-#define DMA_EEI_EEI9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI9_SHIFT)) & DMA_EEI_EEI9_MASK)
-#define DMA_EEI_EEI10_MASK                       (0x400U)
-#define DMA_EEI_EEI10_SHIFT                      (10U)
-#define DMA_EEI_EEI10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI10_SHIFT)) & DMA_EEI_EEI10_MASK)
-#define DMA_EEI_EEI11_MASK                       (0x800U)
-#define DMA_EEI_EEI11_SHIFT                      (11U)
-#define DMA_EEI_EEI11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI11_SHIFT)) & DMA_EEI_EEI11_MASK)
-#define DMA_EEI_EEI12_MASK                       (0x1000U)
-#define DMA_EEI_EEI12_SHIFT                      (12U)
-#define DMA_EEI_EEI12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI12_SHIFT)) & DMA_EEI_EEI12_MASK)
-#define DMA_EEI_EEI13_MASK                       (0x2000U)
-#define DMA_EEI_EEI13_SHIFT                      (13U)
-#define DMA_EEI_EEI13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI13_SHIFT)) & DMA_EEI_EEI13_MASK)
-#define DMA_EEI_EEI14_MASK                       (0x4000U)
-#define DMA_EEI_EEI14_SHIFT                      (14U)
-#define DMA_EEI_EEI14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI14_SHIFT)) & DMA_EEI_EEI14_MASK)
-#define DMA_EEI_EEI15_MASK                       (0x8000U)
-#define DMA_EEI_EEI15_SHIFT                      (15U)
-#define DMA_EEI_EEI15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI15_SHIFT)) & DMA_EEI_EEI15_MASK)
-#define DMA_EEI_EEI16_MASK                       (0x10000U)
-#define DMA_EEI_EEI16_SHIFT                      (16U)
-#define DMA_EEI_EEI16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI16_SHIFT)) & DMA_EEI_EEI16_MASK)
-#define DMA_EEI_EEI17_MASK                       (0x20000U)
-#define DMA_EEI_EEI17_SHIFT                      (17U)
-#define DMA_EEI_EEI17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI17_SHIFT)) & DMA_EEI_EEI17_MASK)
-#define DMA_EEI_EEI18_MASK                       (0x40000U)
-#define DMA_EEI_EEI18_SHIFT                      (18U)
-#define DMA_EEI_EEI18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI18_SHIFT)) & DMA_EEI_EEI18_MASK)
-#define DMA_EEI_EEI19_MASK                       (0x80000U)
-#define DMA_EEI_EEI19_SHIFT                      (19U)
-#define DMA_EEI_EEI19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI19_SHIFT)) & DMA_EEI_EEI19_MASK)
-#define DMA_EEI_EEI20_MASK                       (0x100000U)
-#define DMA_EEI_EEI20_SHIFT                      (20U)
-#define DMA_EEI_EEI20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI20_SHIFT)) & DMA_EEI_EEI20_MASK)
-#define DMA_EEI_EEI21_MASK                       (0x200000U)
-#define DMA_EEI_EEI21_SHIFT                      (21U)
-#define DMA_EEI_EEI21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI21_SHIFT)) & DMA_EEI_EEI21_MASK)
-#define DMA_EEI_EEI22_MASK                       (0x400000U)
-#define DMA_EEI_EEI22_SHIFT                      (22U)
-#define DMA_EEI_EEI22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI22_SHIFT)) & DMA_EEI_EEI22_MASK)
-#define DMA_EEI_EEI23_MASK                       (0x800000U)
-#define DMA_EEI_EEI23_SHIFT                      (23U)
-#define DMA_EEI_EEI23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI23_SHIFT)) & DMA_EEI_EEI23_MASK)
-#define DMA_EEI_EEI24_MASK                       (0x1000000U)
-#define DMA_EEI_EEI24_SHIFT                      (24U)
-#define DMA_EEI_EEI24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI24_SHIFT)) & DMA_EEI_EEI24_MASK)
-#define DMA_EEI_EEI25_MASK                       (0x2000000U)
-#define DMA_EEI_EEI25_SHIFT                      (25U)
-#define DMA_EEI_EEI25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI25_SHIFT)) & DMA_EEI_EEI25_MASK)
-#define DMA_EEI_EEI26_MASK                       (0x4000000U)
-#define DMA_EEI_EEI26_SHIFT                      (26U)
-#define DMA_EEI_EEI26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI26_SHIFT)) & DMA_EEI_EEI26_MASK)
-#define DMA_EEI_EEI27_MASK                       (0x8000000U)
-#define DMA_EEI_EEI27_SHIFT                      (27U)
-#define DMA_EEI_EEI27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI27_SHIFT)) & DMA_EEI_EEI27_MASK)
-#define DMA_EEI_EEI28_MASK                       (0x10000000U)
-#define DMA_EEI_EEI28_SHIFT                      (28U)
-#define DMA_EEI_EEI28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI28_SHIFT)) & DMA_EEI_EEI28_MASK)
-#define DMA_EEI_EEI29_MASK                       (0x20000000U)
-#define DMA_EEI_EEI29_SHIFT                      (29U)
-#define DMA_EEI_EEI29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI29_SHIFT)) & DMA_EEI_EEI29_MASK)
-#define DMA_EEI_EEI30_MASK                       (0x40000000U)
-#define DMA_EEI_EEI30_SHIFT                      (30U)
-#define DMA_EEI_EEI30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI30_SHIFT)) & DMA_EEI_EEI30_MASK)
-#define DMA_EEI_EEI31_MASK                       (0x80000000U)
-#define DMA_EEI_EEI31_SHIFT                      (31U)
-#define DMA_EEI_EEI31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI31_SHIFT)) & DMA_EEI_EEI31_MASK)
+#define DMA_EEI_EEI0_MASK   (0x1U)
+#define DMA_EEI_EEI0_SHIFT  (0U)
+#define DMA_EEI_EEI0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI0_SHIFT)) & DMA_EEI_EEI0_MASK)
+#define DMA_EEI_EEI1_MASK   (0x2U)
+#define DMA_EEI_EEI1_SHIFT  (1U)
+#define DMA_EEI_EEI1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI1_SHIFT)) & DMA_EEI_EEI1_MASK)
+#define DMA_EEI_EEI2_MASK   (0x4U)
+#define DMA_EEI_EEI2_SHIFT  (2U)
+#define DMA_EEI_EEI2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI2_SHIFT)) & DMA_EEI_EEI2_MASK)
+#define DMA_EEI_EEI3_MASK   (0x8U)
+#define DMA_EEI_EEI3_SHIFT  (3U)
+#define DMA_EEI_EEI3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI3_SHIFT)) & DMA_EEI_EEI3_MASK)
+#define DMA_EEI_EEI4_MASK   (0x10U)
+#define DMA_EEI_EEI4_SHIFT  (4U)
+#define DMA_EEI_EEI4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI4_SHIFT)) & DMA_EEI_EEI4_MASK)
+#define DMA_EEI_EEI5_MASK   (0x20U)
+#define DMA_EEI_EEI5_SHIFT  (5U)
+#define DMA_EEI_EEI5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI5_SHIFT)) & DMA_EEI_EEI5_MASK)
+#define DMA_EEI_EEI6_MASK   (0x40U)
+#define DMA_EEI_EEI6_SHIFT  (6U)
+#define DMA_EEI_EEI6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI6_SHIFT)) & DMA_EEI_EEI6_MASK)
+#define DMA_EEI_EEI7_MASK   (0x80U)
+#define DMA_EEI_EEI7_SHIFT  (7U)
+#define DMA_EEI_EEI7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI7_SHIFT)) & DMA_EEI_EEI7_MASK)
+#define DMA_EEI_EEI8_MASK   (0x100U)
+#define DMA_EEI_EEI8_SHIFT  (8U)
+#define DMA_EEI_EEI8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI8_SHIFT)) & DMA_EEI_EEI8_MASK)
+#define DMA_EEI_EEI9_MASK   (0x200U)
+#define DMA_EEI_EEI9_SHIFT  (9U)
+#define DMA_EEI_EEI9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI9_SHIFT)) & DMA_EEI_EEI9_MASK)
+#define DMA_EEI_EEI10_MASK  (0x400U)
+#define DMA_EEI_EEI10_SHIFT (10U)
+#define DMA_EEI_EEI10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI10_SHIFT)) & DMA_EEI_EEI10_MASK)
+#define DMA_EEI_EEI11_MASK  (0x800U)
+#define DMA_EEI_EEI11_SHIFT (11U)
+#define DMA_EEI_EEI11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI11_SHIFT)) & DMA_EEI_EEI11_MASK)
+#define DMA_EEI_EEI12_MASK  (0x1000U)
+#define DMA_EEI_EEI12_SHIFT (12U)
+#define DMA_EEI_EEI12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI12_SHIFT)) & DMA_EEI_EEI12_MASK)
+#define DMA_EEI_EEI13_MASK  (0x2000U)
+#define DMA_EEI_EEI13_SHIFT (13U)
+#define DMA_EEI_EEI13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI13_SHIFT)) & DMA_EEI_EEI13_MASK)
+#define DMA_EEI_EEI14_MASK  (0x4000U)
+#define DMA_EEI_EEI14_SHIFT (14U)
+#define DMA_EEI_EEI14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI14_SHIFT)) & DMA_EEI_EEI14_MASK)
+#define DMA_EEI_EEI15_MASK  (0x8000U)
+#define DMA_EEI_EEI15_SHIFT (15U)
+#define DMA_EEI_EEI15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI15_SHIFT)) & DMA_EEI_EEI15_MASK)
+#define DMA_EEI_EEI16_MASK  (0x10000U)
+#define DMA_EEI_EEI16_SHIFT (16U)
+#define DMA_EEI_EEI16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI16_SHIFT)) & DMA_EEI_EEI16_MASK)
+#define DMA_EEI_EEI17_MASK  (0x20000U)
+#define DMA_EEI_EEI17_SHIFT (17U)
+#define DMA_EEI_EEI17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI17_SHIFT)) & DMA_EEI_EEI17_MASK)
+#define DMA_EEI_EEI18_MASK  (0x40000U)
+#define DMA_EEI_EEI18_SHIFT (18U)
+#define DMA_EEI_EEI18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI18_SHIFT)) & DMA_EEI_EEI18_MASK)
+#define DMA_EEI_EEI19_MASK  (0x80000U)
+#define DMA_EEI_EEI19_SHIFT (19U)
+#define DMA_EEI_EEI19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI19_SHIFT)) & DMA_EEI_EEI19_MASK)
+#define DMA_EEI_EEI20_MASK  (0x100000U)
+#define DMA_EEI_EEI20_SHIFT (20U)
+#define DMA_EEI_EEI20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI20_SHIFT)) & DMA_EEI_EEI20_MASK)
+#define DMA_EEI_EEI21_MASK  (0x200000U)
+#define DMA_EEI_EEI21_SHIFT (21U)
+#define DMA_EEI_EEI21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI21_SHIFT)) & DMA_EEI_EEI21_MASK)
+#define DMA_EEI_EEI22_MASK  (0x400000U)
+#define DMA_EEI_EEI22_SHIFT (22U)
+#define DMA_EEI_EEI22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI22_SHIFT)) & DMA_EEI_EEI22_MASK)
+#define DMA_EEI_EEI23_MASK  (0x800000U)
+#define DMA_EEI_EEI23_SHIFT (23U)
+#define DMA_EEI_EEI23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI23_SHIFT)) & DMA_EEI_EEI23_MASK)
+#define DMA_EEI_EEI24_MASK  (0x1000000U)
+#define DMA_EEI_EEI24_SHIFT (24U)
+#define DMA_EEI_EEI24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI24_SHIFT)) & DMA_EEI_EEI24_MASK)
+#define DMA_EEI_EEI25_MASK  (0x2000000U)
+#define DMA_EEI_EEI25_SHIFT (25U)
+#define DMA_EEI_EEI25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI25_SHIFT)) & DMA_EEI_EEI25_MASK)
+#define DMA_EEI_EEI26_MASK  (0x4000000U)
+#define DMA_EEI_EEI26_SHIFT (26U)
+#define DMA_EEI_EEI26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI26_SHIFT)) & DMA_EEI_EEI26_MASK)
+#define DMA_EEI_EEI27_MASK  (0x8000000U)
+#define DMA_EEI_EEI27_SHIFT (27U)
+#define DMA_EEI_EEI27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI27_SHIFT)) & DMA_EEI_EEI27_MASK)
+#define DMA_EEI_EEI28_MASK  (0x10000000U)
+#define DMA_EEI_EEI28_SHIFT (28U)
+#define DMA_EEI_EEI28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI28_SHIFT)) & DMA_EEI_EEI28_MASK)
+#define DMA_EEI_EEI29_MASK  (0x20000000U)
+#define DMA_EEI_EEI29_SHIFT (29U)
+#define DMA_EEI_EEI29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI29_SHIFT)) & DMA_EEI_EEI29_MASK)
+#define DMA_EEI_EEI30_MASK  (0x40000000U)
+#define DMA_EEI_EEI30_SHIFT (30U)
+#define DMA_EEI_EEI30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI30_SHIFT)) & DMA_EEI_EEI30_MASK)
+#define DMA_EEI_EEI31_MASK  (0x80000000U)
+#define DMA_EEI_EEI31_SHIFT (31U)
+#define DMA_EEI_EEI31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI31_SHIFT)) & DMA_EEI_EEI31_MASK)
 /*! @} */
 
 /*! @name CEEI - Clear Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_CEEI_CEEI_MASK                       (0x1FU)
-#define DMA_CEEI_CEEI_SHIFT                      (0U)
-#define DMA_CEEI_CEEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CEEI_SHIFT)) & DMA_CEEI_CEEI_MASK)
-#define DMA_CEEI_CAEE_MASK                       (0x40U)
-#define DMA_CEEI_CAEE_SHIFT                      (6U)
-#define DMA_CEEI_CAEE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CAEE_SHIFT)) & DMA_CEEI_CAEE_MASK)
-#define DMA_CEEI_NOP_MASK                        (0x80U)
-#define DMA_CEEI_NOP_SHIFT                       (7U)
-#define DMA_CEEI_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_NOP_SHIFT)) & DMA_CEEI_NOP_MASK)
+#define DMA_CEEI_CEEI_MASK  (0x1FU)
+#define DMA_CEEI_CEEI_SHIFT (0U)
+#define DMA_CEEI_CEEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CEEI_SHIFT)) & DMA_CEEI_CEEI_MASK)
+#define DMA_CEEI_CAEE_MASK  (0x40U)
+#define DMA_CEEI_CAEE_SHIFT (6U)
+#define DMA_CEEI_CAEE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CAEE_SHIFT)) & DMA_CEEI_CAEE_MASK)
+#define DMA_CEEI_NOP_MASK   (0x80U)
+#define DMA_CEEI_NOP_SHIFT  (7U)
+#define DMA_CEEI_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_NOP_SHIFT)) & DMA_CEEI_NOP_MASK)
 /*! @} */
 
 /*! @name SEEI - Set Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_SEEI_SEEI_MASK                       (0x1FU)
-#define DMA_SEEI_SEEI_SHIFT                      (0U)
-#define DMA_SEEI_SEEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SEEI_SHIFT)) & DMA_SEEI_SEEI_MASK)
-#define DMA_SEEI_SAEE_MASK                       (0x40U)
-#define DMA_SEEI_SAEE_SHIFT                      (6U)
-#define DMA_SEEI_SAEE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SAEE_SHIFT)) & DMA_SEEI_SAEE_MASK)
-#define DMA_SEEI_NOP_MASK                        (0x80U)
-#define DMA_SEEI_NOP_SHIFT                       (7U)
-#define DMA_SEEI_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_NOP_SHIFT)) & DMA_SEEI_NOP_MASK)
+#define DMA_SEEI_SEEI_MASK  (0x1FU)
+#define DMA_SEEI_SEEI_SHIFT (0U)
+#define DMA_SEEI_SEEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SEEI_SHIFT)) & DMA_SEEI_SEEI_MASK)
+#define DMA_SEEI_SAEE_MASK  (0x40U)
+#define DMA_SEEI_SAEE_SHIFT (6U)
+#define DMA_SEEI_SAEE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SAEE_SHIFT)) & DMA_SEEI_SAEE_MASK)
+#define DMA_SEEI_NOP_MASK   (0x80U)
+#define DMA_SEEI_NOP_SHIFT  (7U)
+#define DMA_SEEI_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_NOP_SHIFT)) & DMA_SEEI_NOP_MASK)
 /*! @} */
 
 /*! @name CERQ - Clear Enable Request Register */
 /*! @{ */
-#define DMA_CERQ_CERQ_MASK                       (0x1FU)
-#define DMA_CERQ_CERQ_SHIFT                      (0U)
-#define DMA_CERQ_CERQ(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CERQ_SHIFT)) & DMA_CERQ_CERQ_MASK)
-#define DMA_CERQ_CAER_MASK                       (0x40U)
-#define DMA_CERQ_CAER_SHIFT                      (6U)
-#define DMA_CERQ_CAER(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CAER_SHIFT)) & DMA_CERQ_CAER_MASK)
-#define DMA_CERQ_NOP_MASK                        (0x80U)
-#define DMA_CERQ_NOP_SHIFT                       (7U)
-#define DMA_CERQ_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_NOP_SHIFT)) & DMA_CERQ_NOP_MASK)
+#define DMA_CERQ_CERQ_MASK  (0x1FU)
+#define DMA_CERQ_CERQ_SHIFT (0U)
+#define DMA_CERQ_CERQ(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CERQ_SHIFT)) & DMA_CERQ_CERQ_MASK)
+#define DMA_CERQ_CAER_MASK  (0x40U)
+#define DMA_CERQ_CAER_SHIFT (6U)
+#define DMA_CERQ_CAER(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CAER_SHIFT)) & DMA_CERQ_CAER_MASK)
+#define DMA_CERQ_NOP_MASK   (0x80U)
+#define DMA_CERQ_NOP_SHIFT  (7U)
+#define DMA_CERQ_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_NOP_SHIFT)) & DMA_CERQ_NOP_MASK)
 /*! @} */
 
 /*! @name SERQ - Set Enable Request Register */
 /*! @{ */
-#define DMA_SERQ_SERQ_MASK                       (0x1FU)
-#define DMA_SERQ_SERQ_SHIFT                      (0U)
-#define DMA_SERQ_SERQ(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SERQ_SHIFT)) & DMA_SERQ_SERQ_MASK)
-#define DMA_SERQ_SAER_MASK                       (0x40U)
-#define DMA_SERQ_SAER_SHIFT                      (6U)
-#define DMA_SERQ_SAER(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SAER_SHIFT)) & DMA_SERQ_SAER_MASK)
-#define DMA_SERQ_NOP_MASK                        (0x80U)
-#define DMA_SERQ_NOP_SHIFT                       (7U)
-#define DMA_SERQ_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_NOP_SHIFT)) & DMA_SERQ_NOP_MASK)
+#define DMA_SERQ_SERQ_MASK  (0x1FU)
+#define DMA_SERQ_SERQ_SHIFT (0U)
+#define DMA_SERQ_SERQ(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SERQ_SHIFT)) & DMA_SERQ_SERQ_MASK)
+#define DMA_SERQ_SAER_MASK  (0x40U)
+#define DMA_SERQ_SAER_SHIFT (6U)
+#define DMA_SERQ_SAER(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SAER_SHIFT)) & DMA_SERQ_SAER_MASK)
+#define DMA_SERQ_NOP_MASK   (0x80U)
+#define DMA_SERQ_NOP_SHIFT  (7U)
+#define DMA_SERQ_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_NOP_SHIFT)) & DMA_SERQ_NOP_MASK)
 /*! @} */
 
 /*! @name CDNE - Clear DONE Status Bit Register */
 /*! @{ */
-#define DMA_CDNE_CDNE_MASK                       (0x1FU)
-#define DMA_CDNE_CDNE_SHIFT                      (0U)
-#define DMA_CDNE_CDNE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CDNE_SHIFT)) & DMA_CDNE_CDNE_MASK)
-#define DMA_CDNE_CADN_MASK                       (0x40U)
-#define DMA_CDNE_CADN_SHIFT                      (6U)
-#define DMA_CDNE_CADN(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CADN_SHIFT)) & DMA_CDNE_CADN_MASK)
-#define DMA_CDNE_NOP_MASK                        (0x80U)
-#define DMA_CDNE_NOP_SHIFT                       (7U)
-#define DMA_CDNE_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_NOP_SHIFT)) & DMA_CDNE_NOP_MASK)
+#define DMA_CDNE_CDNE_MASK  (0x1FU)
+#define DMA_CDNE_CDNE_SHIFT (0U)
+#define DMA_CDNE_CDNE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CDNE_SHIFT)) & DMA_CDNE_CDNE_MASK)
+#define DMA_CDNE_CADN_MASK  (0x40U)
+#define DMA_CDNE_CADN_SHIFT (6U)
+#define DMA_CDNE_CADN(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CADN_SHIFT)) & DMA_CDNE_CADN_MASK)
+#define DMA_CDNE_NOP_MASK   (0x80U)
+#define DMA_CDNE_NOP_SHIFT  (7U)
+#define DMA_CDNE_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_NOP_SHIFT)) & DMA_CDNE_NOP_MASK)
 /*! @} */
 
 /*! @name SSRT - Set START Bit Register */
 /*! @{ */
-#define DMA_SSRT_SSRT_MASK                       (0x1FU)
-#define DMA_SSRT_SSRT_SHIFT                      (0U)
-#define DMA_SSRT_SSRT(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SSRT_SHIFT)) & DMA_SSRT_SSRT_MASK)
-#define DMA_SSRT_SAST_MASK                       (0x40U)
-#define DMA_SSRT_SAST_SHIFT                      (6U)
-#define DMA_SSRT_SAST(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SAST_SHIFT)) & DMA_SSRT_SAST_MASK)
-#define DMA_SSRT_NOP_MASK                        (0x80U)
-#define DMA_SSRT_NOP_SHIFT                       (7U)
-#define DMA_SSRT_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_NOP_SHIFT)) & DMA_SSRT_NOP_MASK)
+#define DMA_SSRT_SSRT_MASK  (0x1FU)
+#define DMA_SSRT_SSRT_SHIFT (0U)
+#define DMA_SSRT_SSRT(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SSRT_SHIFT)) & DMA_SSRT_SSRT_MASK)
+#define DMA_SSRT_SAST_MASK  (0x40U)
+#define DMA_SSRT_SAST_SHIFT (6U)
+#define DMA_SSRT_SAST(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SAST_SHIFT)) & DMA_SSRT_SAST_MASK)
+#define DMA_SSRT_NOP_MASK   (0x80U)
+#define DMA_SSRT_NOP_SHIFT  (7U)
+#define DMA_SSRT_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_NOP_SHIFT)) & DMA_SSRT_NOP_MASK)
 /*! @} */
 
 /*! @name CERR - Clear Error Register */
 /*! @{ */
-#define DMA_CERR_CERR_MASK                       (0x1FU)
-#define DMA_CERR_CERR_SHIFT                      (0U)
-#define DMA_CERR_CERR(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CERR_SHIFT)) & DMA_CERR_CERR_MASK)
-#define DMA_CERR_CAEI_MASK                       (0x40U)
-#define DMA_CERR_CAEI_SHIFT                      (6U)
-#define DMA_CERR_CAEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CAEI_SHIFT)) & DMA_CERR_CAEI_MASK)
-#define DMA_CERR_NOP_MASK                        (0x80U)
-#define DMA_CERR_NOP_SHIFT                       (7U)
-#define DMA_CERR_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CERR_NOP_SHIFT)) & DMA_CERR_NOP_MASK)
+#define DMA_CERR_CERR_MASK  (0x1FU)
+#define DMA_CERR_CERR_SHIFT (0U)
+#define DMA_CERR_CERR(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CERR_SHIFT)) & DMA_CERR_CERR_MASK)
+#define DMA_CERR_CAEI_MASK  (0x40U)
+#define DMA_CERR_CAEI_SHIFT (6U)
+#define DMA_CERR_CAEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CAEI_SHIFT)) & DMA_CERR_CAEI_MASK)
+#define DMA_CERR_NOP_MASK   (0x80U)
+#define DMA_CERR_NOP_SHIFT  (7U)
+#define DMA_CERR_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CERR_NOP_SHIFT)) & DMA_CERR_NOP_MASK)
 /*! @} */
 
 /*! @name CINT - Clear Interrupt Request Register */
 /*! @{ */
-#define DMA_CINT_CINT_MASK                       (0x1FU)
-#define DMA_CINT_CINT_SHIFT                      (0U)
-#define DMA_CINT_CINT(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CINT_SHIFT)) & DMA_CINT_CINT_MASK)
-#define DMA_CINT_CAIR_MASK                       (0x40U)
-#define DMA_CINT_CAIR_SHIFT                      (6U)
-#define DMA_CINT_CAIR(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CAIR_SHIFT)) & DMA_CINT_CAIR_MASK)
-#define DMA_CINT_NOP_MASK                        (0x80U)
-#define DMA_CINT_NOP_SHIFT                       (7U)
-#define DMA_CINT_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CINT_NOP_SHIFT)) & DMA_CINT_NOP_MASK)
+#define DMA_CINT_CINT_MASK  (0x1FU)
+#define DMA_CINT_CINT_SHIFT (0U)
+#define DMA_CINT_CINT(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CINT_SHIFT)) & DMA_CINT_CINT_MASK)
+#define DMA_CINT_CAIR_MASK  (0x40U)
+#define DMA_CINT_CAIR_SHIFT (6U)
+#define DMA_CINT_CAIR(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CAIR_SHIFT)) & DMA_CINT_CAIR_MASK)
+#define DMA_CINT_NOP_MASK   (0x80U)
+#define DMA_CINT_NOP_SHIFT  (7U)
+#define DMA_CINT_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CINT_NOP_SHIFT)) & DMA_CINT_NOP_MASK)
 /*! @} */
 
 /*! @name INT - Interrupt Request Register */
 /*! @{ */
-#define DMA_INT_INT0_MASK                        (0x1U)
-#define DMA_INT_INT0_SHIFT                       (0U)
-#define DMA_INT_INT0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT0_SHIFT)) & DMA_INT_INT0_MASK)
-#define DMA_INT_INT1_MASK                        (0x2U)
-#define DMA_INT_INT1_SHIFT                       (1U)
-#define DMA_INT_INT1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT1_SHIFT)) & DMA_INT_INT1_MASK)
-#define DMA_INT_INT2_MASK                        (0x4U)
-#define DMA_INT_INT2_SHIFT                       (2U)
-#define DMA_INT_INT2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT2_SHIFT)) & DMA_INT_INT2_MASK)
-#define DMA_INT_INT3_MASK                        (0x8U)
-#define DMA_INT_INT3_SHIFT                       (3U)
-#define DMA_INT_INT3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT3_SHIFT)) & DMA_INT_INT3_MASK)
-#define DMA_INT_INT4_MASK                        (0x10U)
-#define DMA_INT_INT4_SHIFT                       (4U)
-#define DMA_INT_INT4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT4_SHIFT)) & DMA_INT_INT4_MASK)
-#define DMA_INT_INT5_MASK                        (0x20U)
-#define DMA_INT_INT5_SHIFT                       (5U)
-#define DMA_INT_INT5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT5_SHIFT)) & DMA_INT_INT5_MASK)
-#define DMA_INT_INT6_MASK                        (0x40U)
-#define DMA_INT_INT6_SHIFT                       (6U)
-#define DMA_INT_INT6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT6_SHIFT)) & DMA_INT_INT6_MASK)
-#define DMA_INT_INT7_MASK                        (0x80U)
-#define DMA_INT_INT7_SHIFT                       (7U)
-#define DMA_INT_INT7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT7_SHIFT)) & DMA_INT_INT7_MASK)
-#define DMA_INT_INT8_MASK                        (0x100U)
-#define DMA_INT_INT8_SHIFT                       (8U)
-#define DMA_INT_INT8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT8_SHIFT)) & DMA_INT_INT8_MASK)
-#define DMA_INT_INT9_MASK                        (0x200U)
-#define DMA_INT_INT9_SHIFT                       (9U)
-#define DMA_INT_INT9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT9_SHIFT)) & DMA_INT_INT9_MASK)
-#define DMA_INT_INT10_MASK                       (0x400U)
-#define DMA_INT_INT10_SHIFT                      (10U)
-#define DMA_INT_INT10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT10_SHIFT)) & DMA_INT_INT10_MASK)
-#define DMA_INT_INT11_MASK                       (0x800U)
-#define DMA_INT_INT11_SHIFT                      (11U)
-#define DMA_INT_INT11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT11_SHIFT)) & DMA_INT_INT11_MASK)
-#define DMA_INT_INT12_MASK                       (0x1000U)
-#define DMA_INT_INT12_SHIFT                      (12U)
-#define DMA_INT_INT12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT12_SHIFT)) & DMA_INT_INT12_MASK)
-#define DMA_INT_INT13_MASK                       (0x2000U)
-#define DMA_INT_INT13_SHIFT                      (13U)
-#define DMA_INT_INT13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT13_SHIFT)) & DMA_INT_INT13_MASK)
-#define DMA_INT_INT14_MASK                       (0x4000U)
-#define DMA_INT_INT14_SHIFT                      (14U)
-#define DMA_INT_INT14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT14_SHIFT)) & DMA_INT_INT14_MASK)
-#define DMA_INT_INT15_MASK                       (0x8000U)
-#define DMA_INT_INT15_SHIFT                      (15U)
-#define DMA_INT_INT15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT15_SHIFT)) & DMA_INT_INT15_MASK)
-#define DMA_INT_INT16_MASK                       (0x10000U)
-#define DMA_INT_INT16_SHIFT                      (16U)
-#define DMA_INT_INT16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT16_SHIFT)) & DMA_INT_INT16_MASK)
-#define DMA_INT_INT17_MASK                       (0x20000U)
-#define DMA_INT_INT17_SHIFT                      (17U)
-#define DMA_INT_INT17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT17_SHIFT)) & DMA_INT_INT17_MASK)
-#define DMA_INT_INT18_MASK                       (0x40000U)
-#define DMA_INT_INT18_SHIFT                      (18U)
-#define DMA_INT_INT18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT18_SHIFT)) & DMA_INT_INT18_MASK)
-#define DMA_INT_INT19_MASK                       (0x80000U)
-#define DMA_INT_INT19_SHIFT                      (19U)
-#define DMA_INT_INT19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
-#define DMA_INT_INT20_MASK                       (0x100000U)
-#define DMA_INT_INT20_SHIFT                      (20U)
-#define DMA_INT_INT20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
-#define DMA_INT_INT21_MASK                       (0x200000U)
-#define DMA_INT_INT21_SHIFT                      (21U)
-#define DMA_INT_INT21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT21_SHIFT)) & DMA_INT_INT21_MASK)
-#define DMA_INT_INT22_MASK                       (0x400000U)
-#define DMA_INT_INT22_SHIFT                      (22U)
-#define DMA_INT_INT22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT22_SHIFT)) & DMA_INT_INT22_MASK)
-#define DMA_INT_INT23_MASK                       (0x800000U)
-#define DMA_INT_INT23_SHIFT                      (23U)
-#define DMA_INT_INT23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT23_SHIFT)) & DMA_INT_INT23_MASK)
-#define DMA_INT_INT24_MASK                       (0x1000000U)
-#define DMA_INT_INT24_SHIFT                      (24U)
-#define DMA_INT_INT24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
-#define DMA_INT_INT25_MASK                       (0x2000000U)
-#define DMA_INT_INT25_SHIFT                      (25U)
-#define DMA_INT_INT25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT25_SHIFT)) & DMA_INT_INT25_MASK)
-#define DMA_INT_INT26_MASK                       (0x4000000U)
-#define DMA_INT_INT26_SHIFT                      (26U)
-#define DMA_INT_INT26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT26_SHIFT)) & DMA_INT_INT26_MASK)
-#define DMA_INT_INT27_MASK                       (0x8000000U)
-#define DMA_INT_INT27_SHIFT                      (27U)
-#define DMA_INT_INT27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT27_SHIFT)) & DMA_INT_INT27_MASK)
-#define DMA_INT_INT28_MASK                       (0x10000000U)
-#define DMA_INT_INT28_SHIFT                      (28U)
-#define DMA_INT_INT28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT28_SHIFT)) & DMA_INT_INT28_MASK)
-#define DMA_INT_INT29_MASK                       (0x20000000U)
-#define DMA_INT_INT29_SHIFT                      (29U)
-#define DMA_INT_INT29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT29_SHIFT)) & DMA_INT_INT29_MASK)
-#define DMA_INT_INT30_MASK                       (0x40000000U)
-#define DMA_INT_INT30_SHIFT                      (30U)
-#define DMA_INT_INT30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT30_SHIFT)) & DMA_INT_INT30_MASK)
-#define DMA_INT_INT31_MASK                       (0x80000000U)
-#define DMA_INT_INT31_SHIFT                      (31U)
-#define DMA_INT_INT31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT31_SHIFT)) & DMA_INT_INT31_MASK)
+#define DMA_INT_INT0_MASK   (0x1U)
+#define DMA_INT_INT0_SHIFT  (0U)
+#define DMA_INT_INT0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT0_SHIFT)) & DMA_INT_INT0_MASK)
+#define DMA_INT_INT1_MASK   (0x2U)
+#define DMA_INT_INT1_SHIFT  (1U)
+#define DMA_INT_INT1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT1_SHIFT)) & DMA_INT_INT1_MASK)
+#define DMA_INT_INT2_MASK   (0x4U)
+#define DMA_INT_INT2_SHIFT  (2U)
+#define DMA_INT_INT2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT2_SHIFT)) & DMA_INT_INT2_MASK)
+#define DMA_INT_INT3_MASK   (0x8U)
+#define DMA_INT_INT3_SHIFT  (3U)
+#define DMA_INT_INT3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT3_SHIFT)) & DMA_INT_INT3_MASK)
+#define DMA_INT_INT4_MASK   (0x10U)
+#define DMA_INT_INT4_SHIFT  (4U)
+#define DMA_INT_INT4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT4_SHIFT)) & DMA_INT_INT4_MASK)
+#define DMA_INT_INT5_MASK   (0x20U)
+#define DMA_INT_INT5_SHIFT  (5U)
+#define DMA_INT_INT5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT5_SHIFT)) & DMA_INT_INT5_MASK)
+#define DMA_INT_INT6_MASK   (0x40U)
+#define DMA_INT_INT6_SHIFT  (6U)
+#define DMA_INT_INT6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT6_SHIFT)) & DMA_INT_INT6_MASK)
+#define DMA_INT_INT7_MASK   (0x80U)
+#define DMA_INT_INT7_SHIFT  (7U)
+#define DMA_INT_INT7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT7_SHIFT)) & DMA_INT_INT7_MASK)
+#define DMA_INT_INT8_MASK   (0x100U)
+#define DMA_INT_INT8_SHIFT  (8U)
+#define DMA_INT_INT8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT8_SHIFT)) & DMA_INT_INT8_MASK)
+#define DMA_INT_INT9_MASK   (0x200U)
+#define DMA_INT_INT9_SHIFT  (9U)
+#define DMA_INT_INT9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT9_SHIFT)) & DMA_INT_INT9_MASK)
+#define DMA_INT_INT10_MASK  (0x400U)
+#define DMA_INT_INT10_SHIFT (10U)
+#define DMA_INT_INT10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT10_SHIFT)) & DMA_INT_INT10_MASK)
+#define DMA_INT_INT11_MASK  (0x800U)
+#define DMA_INT_INT11_SHIFT (11U)
+#define DMA_INT_INT11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT11_SHIFT)) & DMA_INT_INT11_MASK)
+#define DMA_INT_INT12_MASK  (0x1000U)
+#define DMA_INT_INT12_SHIFT (12U)
+#define DMA_INT_INT12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT12_SHIFT)) & DMA_INT_INT12_MASK)
+#define DMA_INT_INT13_MASK  (0x2000U)
+#define DMA_INT_INT13_SHIFT (13U)
+#define DMA_INT_INT13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT13_SHIFT)) & DMA_INT_INT13_MASK)
+#define DMA_INT_INT14_MASK  (0x4000U)
+#define DMA_INT_INT14_SHIFT (14U)
+#define DMA_INT_INT14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT14_SHIFT)) & DMA_INT_INT14_MASK)
+#define DMA_INT_INT15_MASK  (0x8000U)
+#define DMA_INT_INT15_SHIFT (15U)
+#define DMA_INT_INT15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT15_SHIFT)) & DMA_INT_INT15_MASK)
+#define DMA_INT_INT16_MASK  (0x10000U)
+#define DMA_INT_INT16_SHIFT (16U)
+#define DMA_INT_INT16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT16_SHIFT)) & DMA_INT_INT16_MASK)
+#define DMA_INT_INT17_MASK  (0x20000U)
+#define DMA_INT_INT17_SHIFT (17U)
+#define DMA_INT_INT17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT17_SHIFT)) & DMA_INT_INT17_MASK)
+#define DMA_INT_INT18_MASK  (0x40000U)
+#define DMA_INT_INT18_SHIFT (18U)
+#define DMA_INT_INT18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT18_SHIFT)) & DMA_INT_INT18_MASK)
+#define DMA_INT_INT19_MASK  (0x80000U)
+#define DMA_INT_INT19_SHIFT (19U)
+#define DMA_INT_INT19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
+#define DMA_INT_INT20_MASK  (0x100000U)
+#define DMA_INT_INT20_SHIFT (20U)
+#define DMA_INT_INT20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
+#define DMA_INT_INT21_MASK  (0x200000U)
+#define DMA_INT_INT21_SHIFT (21U)
+#define DMA_INT_INT21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT21_SHIFT)) & DMA_INT_INT21_MASK)
+#define DMA_INT_INT22_MASK  (0x400000U)
+#define DMA_INT_INT22_SHIFT (22U)
+#define DMA_INT_INT22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT22_SHIFT)) & DMA_INT_INT22_MASK)
+#define DMA_INT_INT23_MASK  (0x800000U)
+#define DMA_INT_INT23_SHIFT (23U)
+#define DMA_INT_INT23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT23_SHIFT)) & DMA_INT_INT23_MASK)
+#define DMA_INT_INT24_MASK  (0x1000000U)
+#define DMA_INT_INT24_SHIFT (24U)
+#define DMA_INT_INT24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
+#define DMA_INT_INT25_MASK  (0x2000000U)
+#define DMA_INT_INT25_SHIFT (25U)
+#define DMA_INT_INT25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT25_SHIFT)) & DMA_INT_INT25_MASK)
+#define DMA_INT_INT26_MASK  (0x4000000U)
+#define DMA_INT_INT26_SHIFT (26U)
+#define DMA_INT_INT26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT26_SHIFT)) & DMA_INT_INT26_MASK)
+#define DMA_INT_INT27_MASK  (0x8000000U)
+#define DMA_INT_INT27_SHIFT (27U)
+#define DMA_INT_INT27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT27_SHIFT)) & DMA_INT_INT27_MASK)
+#define DMA_INT_INT28_MASK  (0x10000000U)
+#define DMA_INT_INT28_SHIFT (28U)
+#define DMA_INT_INT28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT28_SHIFT)) & DMA_INT_INT28_MASK)
+#define DMA_INT_INT29_MASK  (0x20000000U)
+#define DMA_INT_INT29_SHIFT (29U)
+#define DMA_INT_INT29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT29_SHIFT)) & DMA_INT_INT29_MASK)
+#define DMA_INT_INT30_MASK  (0x40000000U)
+#define DMA_INT_INT30_SHIFT (30U)
+#define DMA_INT_INT30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT30_SHIFT)) & DMA_INT_INT30_MASK)
+#define DMA_INT_INT31_MASK  (0x80000000U)
+#define DMA_INT_INT31_SHIFT (31U)
+#define DMA_INT_INT31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT31_SHIFT)) & DMA_INT_INT31_MASK)
 /*! @} */
 
 /*! @name ERR - Error Register */
 /*! @{ */
-#define DMA_ERR_ERR0_MASK                        (0x1U)
-#define DMA_ERR_ERR0_SHIFT                       (0U)
-#define DMA_ERR_ERR0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR0_SHIFT)) & DMA_ERR_ERR0_MASK)
-#define DMA_ERR_ERR1_MASK                        (0x2U)
-#define DMA_ERR_ERR1_SHIFT                       (1U)
-#define DMA_ERR_ERR1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR1_SHIFT)) & DMA_ERR_ERR1_MASK)
-#define DMA_ERR_ERR2_MASK                        (0x4U)
-#define DMA_ERR_ERR2_SHIFT                       (2U)
-#define DMA_ERR_ERR2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR2_SHIFT)) & DMA_ERR_ERR2_MASK)
-#define DMA_ERR_ERR3_MASK                        (0x8U)
-#define DMA_ERR_ERR3_SHIFT                       (3U)
-#define DMA_ERR_ERR3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR3_SHIFT)) & DMA_ERR_ERR3_MASK)
-#define DMA_ERR_ERR4_MASK                        (0x10U)
-#define DMA_ERR_ERR4_SHIFT                       (4U)
-#define DMA_ERR_ERR4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR4_SHIFT)) & DMA_ERR_ERR4_MASK)
-#define DMA_ERR_ERR5_MASK                        (0x20U)
-#define DMA_ERR_ERR5_SHIFT                       (5U)
-#define DMA_ERR_ERR5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR5_SHIFT)) & DMA_ERR_ERR5_MASK)
-#define DMA_ERR_ERR6_MASK                        (0x40U)
-#define DMA_ERR_ERR6_SHIFT                       (6U)
-#define DMA_ERR_ERR6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR6_SHIFT)) & DMA_ERR_ERR6_MASK)
-#define DMA_ERR_ERR7_MASK                        (0x80U)
-#define DMA_ERR_ERR7_SHIFT                       (7U)
-#define DMA_ERR_ERR7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR7_SHIFT)) & DMA_ERR_ERR7_MASK)
-#define DMA_ERR_ERR8_MASK                        (0x100U)
-#define DMA_ERR_ERR8_SHIFT                       (8U)
-#define DMA_ERR_ERR8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR8_SHIFT)) & DMA_ERR_ERR8_MASK)
-#define DMA_ERR_ERR9_MASK                        (0x200U)
-#define DMA_ERR_ERR9_SHIFT                       (9U)
-#define DMA_ERR_ERR9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR9_SHIFT)) & DMA_ERR_ERR9_MASK)
-#define DMA_ERR_ERR10_MASK                       (0x400U)
-#define DMA_ERR_ERR10_SHIFT                      (10U)
-#define DMA_ERR_ERR10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR10_SHIFT)) & DMA_ERR_ERR10_MASK)
-#define DMA_ERR_ERR11_MASK                       (0x800U)
-#define DMA_ERR_ERR11_SHIFT                      (11U)
-#define DMA_ERR_ERR11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR11_SHIFT)) & DMA_ERR_ERR11_MASK)
-#define DMA_ERR_ERR12_MASK                       (0x1000U)
-#define DMA_ERR_ERR12_SHIFT                      (12U)
-#define DMA_ERR_ERR12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR12_SHIFT)) & DMA_ERR_ERR12_MASK)
-#define DMA_ERR_ERR13_MASK                       (0x2000U)
-#define DMA_ERR_ERR13_SHIFT                      (13U)
-#define DMA_ERR_ERR13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR13_SHIFT)) & DMA_ERR_ERR13_MASK)
-#define DMA_ERR_ERR14_MASK                       (0x4000U)
-#define DMA_ERR_ERR14_SHIFT                      (14U)
-#define DMA_ERR_ERR14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR14_SHIFT)) & DMA_ERR_ERR14_MASK)
-#define DMA_ERR_ERR15_MASK                       (0x8000U)
-#define DMA_ERR_ERR15_SHIFT                      (15U)
-#define DMA_ERR_ERR15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR15_SHIFT)) & DMA_ERR_ERR15_MASK)
-#define DMA_ERR_ERR16_MASK                       (0x10000U)
-#define DMA_ERR_ERR16_SHIFT                      (16U)
-#define DMA_ERR_ERR16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR16_SHIFT)) & DMA_ERR_ERR16_MASK)
-#define DMA_ERR_ERR17_MASK                       (0x20000U)
-#define DMA_ERR_ERR17_SHIFT                      (17U)
-#define DMA_ERR_ERR17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR17_SHIFT)) & DMA_ERR_ERR17_MASK)
-#define DMA_ERR_ERR18_MASK                       (0x40000U)
-#define DMA_ERR_ERR18_SHIFT                      (18U)
-#define DMA_ERR_ERR18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR18_SHIFT)) & DMA_ERR_ERR18_MASK)
-#define DMA_ERR_ERR19_MASK                       (0x80000U)
-#define DMA_ERR_ERR19_SHIFT                      (19U)
-#define DMA_ERR_ERR19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR19_SHIFT)) & DMA_ERR_ERR19_MASK)
-#define DMA_ERR_ERR20_MASK                       (0x100000U)
-#define DMA_ERR_ERR20_SHIFT                      (20U)
-#define DMA_ERR_ERR20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR20_SHIFT)) & DMA_ERR_ERR20_MASK)
-#define DMA_ERR_ERR21_MASK                       (0x200000U)
-#define DMA_ERR_ERR21_SHIFT                      (21U)
-#define DMA_ERR_ERR21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR21_SHIFT)) & DMA_ERR_ERR21_MASK)
-#define DMA_ERR_ERR22_MASK                       (0x400000U)
-#define DMA_ERR_ERR22_SHIFT                      (22U)
-#define DMA_ERR_ERR22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR22_SHIFT)) & DMA_ERR_ERR22_MASK)
-#define DMA_ERR_ERR23_MASK                       (0x800000U)
-#define DMA_ERR_ERR23_SHIFT                      (23U)
-#define DMA_ERR_ERR23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR23_SHIFT)) & DMA_ERR_ERR23_MASK)
-#define DMA_ERR_ERR24_MASK                       (0x1000000U)
-#define DMA_ERR_ERR24_SHIFT                      (24U)
-#define DMA_ERR_ERR24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR24_SHIFT)) & DMA_ERR_ERR24_MASK)
-#define DMA_ERR_ERR25_MASK                       (0x2000000U)
-#define DMA_ERR_ERR25_SHIFT                      (25U)
-#define DMA_ERR_ERR25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR25_SHIFT)) & DMA_ERR_ERR25_MASK)
-#define DMA_ERR_ERR26_MASK                       (0x4000000U)
-#define DMA_ERR_ERR26_SHIFT                      (26U)
-#define DMA_ERR_ERR26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR26_SHIFT)) & DMA_ERR_ERR26_MASK)
-#define DMA_ERR_ERR27_MASK                       (0x8000000U)
-#define DMA_ERR_ERR27_SHIFT                      (27U)
-#define DMA_ERR_ERR27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR27_SHIFT)) & DMA_ERR_ERR27_MASK)
-#define DMA_ERR_ERR28_MASK                       (0x10000000U)
-#define DMA_ERR_ERR28_SHIFT                      (28U)
-#define DMA_ERR_ERR28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR28_SHIFT)) & DMA_ERR_ERR28_MASK)
-#define DMA_ERR_ERR29_MASK                       (0x20000000U)
-#define DMA_ERR_ERR29_SHIFT                      (29U)
-#define DMA_ERR_ERR29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR29_SHIFT)) & DMA_ERR_ERR29_MASK)
-#define DMA_ERR_ERR30_MASK                       (0x40000000U)
-#define DMA_ERR_ERR30_SHIFT                      (30U)
-#define DMA_ERR_ERR30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR30_SHIFT)) & DMA_ERR_ERR30_MASK)
-#define DMA_ERR_ERR31_MASK                       (0x80000000U)
-#define DMA_ERR_ERR31_SHIFT                      (31U)
-#define DMA_ERR_ERR31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR31_SHIFT)) & DMA_ERR_ERR31_MASK)
+#define DMA_ERR_ERR0_MASK   (0x1U)
+#define DMA_ERR_ERR0_SHIFT  (0U)
+#define DMA_ERR_ERR0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR0_SHIFT)) & DMA_ERR_ERR0_MASK)
+#define DMA_ERR_ERR1_MASK   (0x2U)
+#define DMA_ERR_ERR1_SHIFT  (1U)
+#define DMA_ERR_ERR1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR1_SHIFT)) & DMA_ERR_ERR1_MASK)
+#define DMA_ERR_ERR2_MASK   (0x4U)
+#define DMA_ERR_ERR2_SHIFT  (2U)
+#define DMA_ERR_ERR2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR2_SHIFT)) & DMA_ERR_ERR2_MASK)
+#define DMA_ERR_ERR3_MASK   (0x8U)
+#define DMA_ERR_ERR3_SHIFT  (3U)
+#define DMA_ERR_ERR3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR3_SHIFT)) & DMA_ERR_ERR3_MASK)
+#define DMA_ERR_ERR4_MASK   (0x10U)
+#define DMA_ERR_ERR4_SHIFT  (4U)
+#define DMA_ERR_ERR4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR4_SHIFT)) & DMA_ERR_ERR4_MASK)
+#define DMA_ERR_ERR5_MASK   (0x20U)
+#define DMA_ERR_ERR5_SHIFT  (5U)
+#define DMA_ERR_ERR5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR5_SHIFT)) & DMA_ERR_ERR5_MASK)
+#define DMA_ERR_ERR6_MASK   (0x40U)
+#define DMA_ERR_ERR6_SHIFT  (6U)
+#define DMA_ERR_ERR6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR6_SHIFT)) & DMA_ERR_ERR6_MASK)
+#define DMA_ERR_ERR7_MASK   (0x80U)
+#define DMA_ERR_ERR7_SHIFT  (7U)
+#define DMA_ERR_ERR7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR7_SHIFT)) & DMA_ERR_ERR7_MASK)
+#define DMA_ERR_ERR8_MASK   (0x100U)
+#define DMA_ERR_ERR8_SHIFT  (8U)
+#define DMA_ERR_ERR8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR8_SHIFT)) & DMA_ERR_ERR8_MASK)
+#define DMA_ERR_ERR9_MASK   (0x200U)
+#define DMA_ERR_ERR9_SHIFT  (9U)
+#define DMA_ERR_ERR9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR9_SHIFT)) & DMA_ERR_ERR9_MASK)
+#define DMA_ERR_ERR10_MASK  (0x400U)
+#define DMA_ERR_ERR10_SHIFT (10U)
+#define DMA_ERR_ERR10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR10_SHIFT)) & DMA_ERR_ERR10_MASK)
+#define DMA_ERR_ERR11_MASK  (0x800U)
+#define DMA_ERR_ERR11_SHIFT (11U)
+#define DMA_ERR_ERR11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR11_SHIFT)) & DMA_ERR_ERR11_MASK)
+#define DMA_ERR_ERR12_MASK  (0x1000U)
+#define DMA_ERR_ERR12_SHIFT (12U)
+#define DMA_ERR_ERR12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR12_SHIFT)) & DMA_ERR_ERR12_MASK)
+#define DMA_ERR_ERR13_MASK  (0x2000U)
+#define DMA_ERR_ERR13_SHIFT (13U)
+#define DMA_ERR_ERR13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR13_SHIFT)) & DMA_ERR_ERR13_MASK)
+#define DMA_ERR_ERR14_MASK  (0x4000U)
+#define DMA_ERR_ERR14_SHIFT (14U)
+#define DMA_ERR_ERR14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR14_SHIFT)) & DMA_ERR_ERR14_MASK)
+#define DMA_ERR_ERR15_MASK  (0x8000U)
+#define DMA_ERR_ERR15_SHIFT (15U)
+#define DMA_ERR_ERR15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR15_SHIFT)) & DMA_ERR_ERR15_MASK)
+#define DMA_ERR_ERR16_MASK  (0x10000U)
+#define DMA_ERR_ERR16_SHIFT (16U)
+#define DMA_ERR_ERR16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR16_SHIFT)) & DMA_ERR_ERR16_MASK)
+#define DMA_ERR_ERR17_MASK  (0x20000U)
+#define DMA_ERR_ERR17_SHIFT (17U)
+#define DMA_ERR_ERR17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR17_SHIFT)) & DMA_ERR_ERR17_MASK)
+#define DMA_ERR_ERR18_MASK  (0x40000U)
+#define DMA_ERR_ERR18_SHIFT (18U)
+#define DMA_ERR_ERR18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR18_SHIFT)) & DMA_ERR_ERR18_MASK)
+#define DMA_ERR_ERR19_MASK  (0x80000U)
+#define DMA_ERR_ERR19_SHIFT (19U)
+#define DMA_ERR_ERR19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR19_SHIFT)) & DMA_ERR_ERR19_MASK)
+#define DMA_ERR_ERR20_MASK  (0x100000U)
+#define DMA_ERR_ERR20_SHIFT (20U)
+#define DMA_ERR_ERR20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR20_SHIFT)) & DMA_ERR_ERR20_MASK)
+#define DMA_ERR_ERR21_MASK  (0x200000U)
+#define DMA_ERR_ERR21_SHIFT (21U)
+#define DMA_ERR_ERR21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR21_SHIFT)) & DMA_ERR_ERR21_MASK)
+#define DMA_ERR_ERR22_MASK  (0x400000U)
+#define DMA_ERR_ERR22_SHIFT (22U)
+#define DMA_ERR_ERR22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR22_SHIFT)) & DMA_ERR_ERR22_MASK)
+#define DMA_ERR_ERR23_MASK  (0x800000U)
+#define DMA_ERR_ERR23_SHIFT (23U)
+#define DMA_ERR_ERR23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR23_SHIFT)) & DMA_ERR_ERR23_MASK)
+#define DMA_ERR_ERR24_MASK  (0x1000000U)
+#define DMA_ERR_ERR24_SHIFT (24U)
+#define DMA_ERR_ERR24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR24_SHIFT)) & DMA_ERR_ERR24_MASK)
+#define DMA_ERR_ERR25_MASK  (0x2000000U)
+#define DMA_ERR_ERR25_SHIFT (25U)
+#define DMA_ERR_ERR25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR25_SHIFT)) & DMA_ERR_ERR25_MASK)
+#define DMA_ERR_ERR26_MASK  (0x4000000U)
+#define DMA_ERR_ERR26_SHIFT (26U)
+#define DMA_ERR_ERR26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR26_SHIFT)) & DMA_ERR_ERR26_MASK)
+#define DMA_ERR_ERR27_MASK  (0x8000000U)
+#define DMA_ERR_ERR27_SHIFT (27U)
+#define DMA_ERR_ERR27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR27_SHIFT)) & DMA_ERR_ERR27_MASK)
+#define DMA_ERR_ERR28_MASK  (0x10000000U)
+#define DMA_ERR_ERR28_SHIFT (28U)
+#define DMA_ERR_ERR28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR28_SHIFT)) & DMA_ERR_ERR28_MASK)
+#define DMA_ERR_ERR29_MASK  (0x20000000U)
+#define DMA_ERR_ERR29_SHIFT (29U)
+#define DMA_ERR_ERR29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR29_SHIFT)) & DMA_ERR_ERR29_MASK)
+#define DMA_ERR_ERR30_MASK  (0x40000000U)
+#define DMA_ERR_ERR30_SHIFT (30U)
+#define DMA_ERR_ERR30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR30_SHIFT)) & DMA_ERR_ERR30_MASK)
+#define DMA_ERR_ERR31_MASK  (0x80000000U)
+#define DMA_ERR_ERR31_SHIFT (31U)
+#define DMA_ERR_ERR31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR31_SHIFT)) & DMA_ERR_ERR31_MASK)
 /*! @} */
 
 /*! @name HRS - Hardware Request Status Register */
 /*! @{ */
-#define DMA_HRS_HRS0_MASK                        (0x1U)
-#define DMA_HRS_HRS0_SHIFT                       (0U)
-#define DMA_HRS_HRS0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS0_SHIFT)) & DMA_HRS_HRS0_MASK)
-#define DMA_HRS_HRS1_MASK                        (0x2U)
-#define DMA_HRS_HRS1_SHIFT                       (1U)
-#define DMA_HRS_HRS1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS1_SHIFT)) & DMA_HRS_HRS1_MASK)
-#define DMA_HRS_HRS2_MASK                        (0x4U)
-#define DMA_HRS_HRS2_SHIFT                       (2U)
-#define DMA_HRS_HRS2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS2_SHIFT)) & DMA_HRS_HRS2_MASK)
-#define DMA_HRS_HRS3_MASK                        (0x8U)
-#define DMA_HRS_HRS3_SHIFT                       (3U)
-#define DMA_HRS_HRS3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS3_SHIFT)) & DMA_HRS_HRS3_MASK)
-#define DMA_HRS_HRS4_MASK                        (0x10U)
-#define DMA_HRS_HRS4_SHIFT                       (4U)
-#define DMA_HRS_HRS4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS4_SHIFT)) & DMA_HRS_HRS4_MASK)
-#define DMA_HRS_HRS5_MASK                        (0x20U)
-#define DMA_HRS_HRS5_SHIFT                       (5U)
-#define DMA_HRS_HRS5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS5_SHIFT)) & DMA_HRS_HRS5_MASK)
-#define DMA_HRS_HRS6_MASK                        (0x40U)
-#define DMA_HRS_HRS6_SHIFT                       (6U)
-#define DMA_HRS_HRS6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS6_SHIFT)) & DMA_HRS_HRS6_MASK)
-#define DMA_HRS_HRS7_MASK                        (0x80U)
-#define DMA_HRS_HRS7_SHIFT                       (7U)
-#define DMA_HRS_HRS7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS7_SHIFT)) & DMA_HRS_HRS7_MASK)
-#define DMA_HRS_HRS8_MASK                        (0x100U)
-#define DMA_HRS_HRS8_SHIFT                       (8U)
-#define DMA_HRS_HRS8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS8_SHIFT)) & DMA_HRS_HRS8_MASK)
-#define DMA_HRS_HRS9_MASK                        (0x200U)
-#define DMA_HRS_HRS9_SHIFT                       (9U)
-#define DMA_HRS_HRS9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS9_SHIFT)) & DMA_HRS_HRS9_MASK)
-#define DMA_HRS_HRS10_MASK                       (0x400U)
-#define DMA_HRS_HRS10_SHIFT                      (10U)
-#define DMA_HRS_HRS10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS10_SHIFT)) & DMA_HRS_HRS10_MASK)
-#define DMA_HRS_HRS11_MASK                       (0x800U)
-#define DMA_HRS_HRS11_SHIFT                      (11U)
-#define DMA_HRS_HRS11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS11_SHIFT)) & DMA_HRS_HRS11_MASK)
-#define DMA_HRS_HRS12_MASK                       (0x1000U)
-#define DMA_HRS_HRS12_SHIFT                      (12U)
-#define DMA_HRS_HRS12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS12_SHIFT)) & DMA_HRS_HRS12_MASK)
-#define DMA_HRS_HRS13_MASK                       (0x2000U)
-#define DMA_HRS_HRS13_SHIFT                      (13U)
-#define DMA_HRS_HRS13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS13_SHIFT)) & DMA_HRS_HRS13_MASK)
-#define DMA_HRS_HRS14_MASK                       (0x4000U)
-#define DMA_HRS_HRS14_SHIFT                      (14U)
-#define DMA_HRS_HRS14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS14_SHIFT)) & DMA_HRS_HRS14_MASK)
-#define DMA_HRS_HRS15_MASK                       (0x8000U)
-#define DMA_HRS_HRS15_SHIFT                      (15U)
-#define DMA_HRS_HRS15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS15_SHIFT)) & DMA_HRS_HRS15_MASK)
-#define DMA_HRS_HRS16_MASK                       (0x10000U)
-#define DMA_HRS_HRS16_SHIFT                      (16U)
-#define DMA_HRS_HRS16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS16_SHIFT)) & DMA_HRS_HRS16_MASK)
-#define DMA_HRS_HRS17_MASK                       (0x20000U)
-#define DMA_HRS_HRS17_SHIFT                      (17U)
-#define DMA_HRS_HRS17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS17_SHIFT)) & DMA_HRS_HRS17_MASK)
-#define DMA_HRS_HRS18_MASK                       (0x40000U)
-#define DMA_HRS_HRS18_SHIFT                      (18U)
-#define DMA_HRS_HRS18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS18_SHIFT)) & DMA_HRS_HRS18_MASK)
-#define DMA_HRS_HRS19_MASK                       (0x80000U)
-#define DMA_HRS_HRS19_SHIFT                      (19U)
-#define DMA_HRS_HRS19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS19_SHIFT)) & DMA_HRS_HRS19_MASK)
-#define DMA_HRS_HRS20_MASK                       (0x100000U)
-#define DMA_HRS_HRS20_SHIFT                      (20U)
-#define DMA_HRS_HRS20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS20_SHIFT)) & DMA_HRS_HRS20_MASK)
-#define DMA_HRS_HRS21_MASK                       (0x200000U)
-#define DMA_HRS_HRS21_SHIFT                      (21U)
-#define DMA_HRS_HRS21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS21_SHIFT)) & DMA_HRS_HRS21_MASK)
-#define DMA_HRS_HRS22_MASK                       (0x400000U)
-#define DMA_HRS_HRS22_SHIFT                      (22U)
-#define DMA_HRS_HRS22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS22_SHIFT)) & DMA_HRS_HRS22_MASK)
-#define DMA_HRS_HRS23_MASK                       (0x800000U)
-#define DMA_HRS_HRS23_SHIFT                      (23U)
-#define DMA_HRS_HRS23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS23_SHIFT)) & DMA_HRS_HRS23_MASK)
-#define DMA_HRS_HRS24_MASK                       (0x1000000U)
-#define DMA_HRS_HRS24_SHIFT                      (24U)
-#define DMA_HRS_HRS24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS24_SHIFT)) & DMA_HRS_HRS24_MASK)
-#define DMA_HRS_HRS25_MASK                       (0x2000000U)
-#define DMA_HRS_HRS25_SHIFT                      (25U)
-#define DMA_HRS_HRS25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS25_SHIFT)) & DMA_HRS_HRS25_MASK)
-#define DMA_HRS_HRS26_MASK                       (0x4000000U)
-#define DMA_HRS_HRS26_SHIFT                      (26U)
-#define DMA_HRS_HRS26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS26_SHIFT)) & DMA_HRS_HRS26_MASK)
-#define DMA_HRS_HRS27_MASK                       (0x8000000U)
-#define DMA_HRS_HRS27_SHIFT                      (27U)
-#define DMA_HRS_HRS27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS27_SHIFT)) & DMA_HRS_HRS27_MASK)
-#define DMA_HRS_HRS28_MASK                       (0x10000000U)
-#define DMA_HRS_HRS28_SHIFT                      (28U)
-#define DMA_HRS_HRS28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS28_SHIFT)) & DMA_HRS_HRS28_MASK)
-#define DMA_HRS_HRS29_MASK                       (0x20000000U)
-#define DMA_HRS_HRS29_SHIFT                      (29U)
-#define DMA_HRS_HRS29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS29_SHIFT)) & DMA_HRS_HRS29_MASK)
-#define DMA_HRS_HRS30_MASK                       (0x40000000U)
-#define DMA_HRS_HRS30_SHIFT                      (30U)
-#define DMA_HRS_HRS30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS30_SHIFT)) & DMA_HRS_HRS30_MASK)
-#define DMA_HRS_HRS31_MASK                       (0x80000000U)
-#define DMA_HRS_HRS31_SHIFT                      (31U)
-#define DMA_HRS_HRS31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS31_SHIFT)) & DMA_HRS_HRS31_MASK)
+#define DMA_HRS_HRS0_MASK   (0x1U)
+#define DMA_HRS_HRS0_SHIFT  (0U)
+#define DMA_HRS_HRS0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS0_SHIFT)) & DMA_HRS_HRS0_MASK)
+#define DMA_HRS_HRS1_MASK   (0x2U)
+#define DMA_HRS_HRS1_SHIFT  (1U)
+#define DMA_HRS_HRS1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS1_SHIFT)) & DMA_HRS_HRS1_MASK)
+#define DMA_HRS_HRS2_MASK   (0x4U)
+#define DMA_HRS_HRS2_SHIFT  (2U)
+#define DMA_HRS_HRS2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS2_SHIFT)) & DMA_HRS_HRS2_MASK)
+#define DMA_HRS_HRS3_MASK   (0x8U)
+#define DMA_HRS_HRS3_SHIFT  (3U)
+#define DMA_HRS_HRS3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS3_SHIFT)) & DMA_HRS_HRS3_MASK)
+#define DMA_HRS_HRS4_MASK   (0x10U)
+#define DMA_HRS_HRS4_SHIFT  (4U)
+#define DMA_HRS_HRS4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS4_SHIFT)) & DMA_HRS_HRS4_MASK)
+#define DMA_HRS_HRS5_MASK   (0x20U)
+#define DMA_HRS_HRS5_SHIFT  (5U)
+#define DMA_HRS_HRS5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS5_SHIFT)) & DMA_HRS_HRS5_MASK)
+#define DMA_HRS_HRS6_MASK   (0x40U)
+#define DMA_HRS_HRS6_SHIFT  (6U)
+#define DMA_HRS_HRS6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS6_SHIFT)) & DMA_HRS_HRS6_MASK)
+#define DMA_HRS_HRS7_MASK   (0x80U)
+#define DMA_HRS_HRS7_SHIFT  (7U)
+#define DMA_HRS_HRS7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS7_SHIFT)) & DMA_HRS_HRS7_MASK)
+#define DMA_HRS_HRS8_MASK   (0x100U)
+#define DMA_HRS_HRS8_SHIFT  (8U)
+#define DMA_HRS_HRS8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS8_SHIFT)) & DMA_HRS_HRS8_MASK)
+#define DMA_HRS_HRS9_MASK   (0x200U)
+#define DMA_HRS_HRS9_SHIFT  (9U)
+#define DMA_HRS_HRS9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS9_SHIFT)) & DMA_HRS_HRS9_MASK)
+#define DMA_HRS_HRS10_MASK  (0x400U)
+#define DMA_HRS_HRS10_SHIFT (10U)
+#define DMA_HRS_HRS10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS10_SHIFT)) & DMA_HRS_HRS10_MASK)
+#define DMA_HRS_HRS11_MASK  (0x800U)
+#define DMA_HRS_HRS11_SHIFT (11U)
+#define DMA_HRS_HRS11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS11_SHIFT)) & DMA_HRS_HRS11_MASK)
+#define DMA_HRS_HRS12_MASK  (0x1000U)
+#define DMA_HRS_HRS12_SHIFT (12U)
+#define DMA_HRS_HRS12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS12_SHIFT)) & DMA_HRS_HRS12_MASK)
+#define DMA_HRS_HRS13_MASK  (0x2000U)
+#define DMA_HRS_HRS13_SHIFT (13U)
+#define DMA_HRS_HRS13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS13_SHIFT)) & DMA_HRS_HRS13_MASK)
+#define DMA_HRS_HRS14_MASK  (0x4000U)
+#define DMA_HRS_HRS14_SHIFT (14U)
+#define DMA_HRS_HRS14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS14_SHIFT)) & DMA_HRS_HRS14_MASK)
+#define DMA_HRS_HRS15_MASK  (0x8000U)
+#define DMA_HRS_HRS15_SHIFT (15U)
+#define DMA_HRS_HRS15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS15_SHIFT)) & DMA_HRS_HRS15_MASK)
+#define DMA_HRS_HRS16_MASK  (0x10000U)
+#define DMA_HRS_HRS16_SHIFT (16U)
+#define DMA_HRS_HRS16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS16_SHIFT)) & DMA_HRS_HRS16_MASK)
+#define DMA_HRS_HRS17_MASK  (0x20000U)
+#define DMA_HRS_HRS17_SHIFT (17U)
+#define DMA_HRS_HRS17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS17_SHIFT)) & DMA_HRS_HRS17_MASK)
+#define DMA_HRS_HRS18_MASK  (0x40000U)
+#define DMA_HRS_HRS18_SHIFT (18U)
+#define DMA_HRS_HRS18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS18_SHIFT)) & DMA_HRS_HRS18_MASK)
+#define DMA_HRS_HRS19_MASK  (0x80000U)
+#define DMA_HRS_HRS19_SHIFT (19U)
+#define DMA_HRS_HRS19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS19_SHIFT)) & DMA_HRS_HRS19_MASK)
+#define DMA_HRS_HRS20_MASK  (0x100000U)
+#define DMA_HRS_HRS20_SHIFT (20U)
+#define DMA_HRS_HRS20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS20_SHIFT)) & DMA_HRS_HRS20_MASK)
+#define DMA_HRS_HRS21_MASK  (0x200000U)
+#define DMA_HRS_HRS21_SHIFT (21U)
+#define DMA_HRS_HRS21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS21_SHIFT)) & DMA_HRS_HRS21_MASK)
+#define DMA_HRS_HRS22_MASK  (0x400000U)
+#define DMA_HRS_HRS22_SHIFT (22U)
+#define DMA_HRS_HRS22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS22_SHIFT)) & DMA_HRS_HRS22_MASK)
+#define DMA_HRS_HRS23_MASK  (0x800000U)
+#define DMA_HRS_HRS23_SHIFT (23U)
+#define DMA_HRS_HRS23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS23_SHIFT)) & DMA_HRS_HRS23_MASK)
+#define DMA_HRS_HRS24_MASK  (0x1000000U)
+#define DMA_HRS_HRS24_SHIFT (24U)
+#define DMA_HRS_HRS24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS24_SHIFT)) & DMA_HRS_HRS24_MASK)
+#define DMA_HRS_HRS25_MASK  (0x2000000U)
+#define DMA_HRS_HRS25_SHIFT (25U)
+#define DMA_HRS_HRS25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS25_SHIFT)) & DMA_HRS_HRS25_MASK)
+#define DMA_HRS_HRS26_MASK  (0x4000000U)
+#define DMA_HRS_HRS26_SHIFT (26U)
+#define DMA_HRS_HRS26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS26_SHIFT)) & DMA_HRS_HRS26_MASK)
+#define DMA_HRS_HRS27_MASK  (0x8000000U)
+#define DMA_HRS_HRS27_SHIFT (27U)
+#define DMA_HRS_HRS27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS27_SHIFT)) & DMA_HRS_HRS27_MASK)
+#define DMA_HRS_HRS28_MASK  (0x10000000U)
+#define DMA_HRS_HRS28_SHIFT (28U)
+#define DMA_HRS_HRS28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS28_SHIFT)) & DMA_HRS_HRS28_MASK)
+#define DMA_HRS_HRS29_MASK  (0x20000000U)
+#define DMA_HRS_HRS29_SHIFT (29U)
+#define DMA_HRS_HRS29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS29_SHIFT)) & DMA_HRS_HRS29_MASK)
+#define DMA_HRS_HRS30_MASK  (0x40000000U)
+#define DMA_HRS_HRS30_SHIFT (30U)
+#define DMA_HRS_HRS30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS30_SHIFT)) & DMA_HRS_HRS30_MASK)
+#define DMA_HRS_HRS31_MASK  (0x80000000U)
+#define DMA_HRS_HRS31_SHIFT (31U)
+#define DMA_HRS_HRS31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS31_SHIFT)) & DMA_HRS_HRS31_MASK)
 /*! @} */
 
 /*! @name EARS - Enable Asynchronous Request in Stop Register */
 /*! @{ */
-#define DMA_EARS_EDREQ_0_MASK                    (0x1U)
-#define DMA_EARS_EDREQ_0_SHIFT                   (0U)
-#define DMA_EARS_EDREQ_0(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_0_SHIFT)) & DMA_EARS_EDREQ_0_MASK)
-#define DMA_EARS_EDREQ_1_MASK                    (0x2U)
-#define DMA_EARS_EDREQ_1_SHIFT                   (1U)
-#define DMA_EARS_EDREQ_1(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_1_SHIFT)) & DMA_EARS_EDREQ_1_MASK)
-#define DMA_EARS_EDREQ_2_MASK                    (0x4U)
-#define DMA_EARS_EDREQ_2_SHIFT                   (2U)
-#define DMA_EARS_EDREQ_2(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_2_SHIFT)) & DMA_EARS_EDREQ_2_MASK)
-#define DMA_EARS_EDREQ_3_MASK                    (0x8U)
-#define DMA_EARS_EDREQ_3_SHIFT                   (3U)
-#define DMA_EARS_EDREQ_3(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_3_SHIFT)) & DMA_EARS_EDREQ_3_MASK)
-#define DMA_EARS_EDREQ_4_MASK                    (0x10U)
-#define DMA_EARS_EDREQ_4_SHIFT                   (4U)
-#define DMA_EARS_EDREQ_4(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_4_SHIFT)) & DMA_EARS_EDREQ_4_MASK)
-#define DMA_EARS_EDREQ_5_MASK                    (0x20U)
-#define DMA_EARS_EDREQ_5_SHIFT                   (5U)
-#define DMA_EARS_EDREQ_5(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_5_SHIFT)) & DMA_EARS_EDREQ_5_MASK)
-#define DMA_EARS_EDREQ_6_MASK                    (0x40U)
-#define DMA_EARS_EDREQ_6_SHIFT                   (6U)
-#define DMA_EARS_EDREQ_6(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_6_SHIFT)) & DMA_EARS_EDREQ_6_MASK)
-#define DMA_EARS_EDREQ_7_MASK                    (0x80U)
-#define DMA_EARS_EDREQ_7_SHIFT                   (7U)
-#define DMA_EARS_EDREQ_7(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_7_SHIFT)) & DMA_EARS_EDREQ_7_MASK)
-#define DMA_EARS_EDREQ_8_MASK                    (0x100U)
-#define DMA_EARS_EDREQ_8_SHIFT                   (8U)
-#define DMA_EARS_EDREQ_8(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_8_SHIFT)) & DMA_EARS_EDREQ_8_MASK)
-#define DMA_EARS_EDREQ_9_MASK                    (0x200U)
-#define DMA_EARS_EDREQ_9_SHIFT                   (9U)
-#define DMA_EARS_EDREQ_9(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_9_SHIFT)) & DMA_EARS_EDREQ_9_MASK)
-#define DMA_EARS_EDREQ_10_MASK                   (0x400U)
-#define DMA_EARS_EDREQ_10_SHIFT                  (10U)
-#define DMA_EARS_EDREQ_10(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_10_SHIFT)) & DMA_EARS_EDREQ_10_MASK)
-#define DMA_EARS_EDREQ_11_MASK                   (0x800U)
-#define DMA_EARS_EDREQ_11_SHIFT                  (11U)
-#define DMA_EARS_EDREQ_11(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_11_SHIFT)) & DMA_EARS_EDREQ_11_MASK)
-#define DMA_EARS_EDREQ_12_MASK                   (0x1000U)
-#define DMA_EARS_EDREQ_12_SHIFT                  (12U)
-#define DMA_EARS_EDREQ_12(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_12_SHIFT)) & DMA_EARS_EDREQ_12_MASK)
-#define DMA_EARS_EDREQ_13_MASK                   (0x2000U)
-#define DMA_EARS_EDREQ_13_SHIFT                  (13U)
-#define DMA_EARS_EDREQ_13(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_13_SHIFT)) & DMA_EARS_EDREQ_13_MASK)
-#define DMA_EARS_EDREQ_14_MASK                   (0x4000U)
-#define DMA_EARS_EDREQ_14_SHIFT                  (14U)
-#define DMA_EARS_EDREQ_14(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_14_SHIFT)) & DMA_EARS_EDREQ_14_MASK)
-#define DMA_EARS_EDREQ_15_MASK                   (0x8000U)
-#define DMA_EARS_EDREQ_15_SHIFT                  (15U)
-#define DMA_EARS_EDREQ_15(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_15_SHIFT)) & DMA_EARS_EDREQ_15_MASK)
-#define DMA_EARS_EDREQ_16_MASK                   (0x10000U)
-#define DMA_EARS_EDREQ_16_SHIFT                  (16U)
-#define DMA_EARS_EDREQ_16(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_16_SHIFT)) & DMA_EARS_EDREQ_16_MASK)
-#define DMA_EARS_EDREQ_17_MASK                   (0x20000U)
-#define DMA_EARS_EDREQ_17_SHIFT                  (17U)
-#define DMA_EARS_EDREQ_17(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_17_SHIFT)) & DMA_EARS_EDREQ_17_MASK)
-#define DMA_EARS_EDREQ_18_MASK                   (0x40000U)
-#define DMA_EARS_EDREQ_18_SHIFT                  (18U)
-#define DMA_EARS_EDREQ_18(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_18_SHIFT)) & DMA_EARS_EDREQ_18_MASK)
-#define DMA_EARS_EDREQ_19_MASK                   (0x80000U)
-#define DMA_EARS_EDREQ_19_SHIFT                  (19U)
-#define DMA_EARS_EDREQ_19(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_19_SHIFT)) & DMA_EARS_EDREQ_19_MASK)
-#define DMA_EARS_EDREQ_20_MASK                   (0x100000U)
-#define DMA_EARS_EDREQ_20_SHIFT                  (20U)
-#define DMA_EARS_EDREQ_20(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_20_SHIFT)) & DMA_EARS_EDREQ_20_MASK)
-#define DMA_EARS_EDREQ_21_MASK                   (0x200000U)
-#define DMA_EARS_EDREQ_21_SHIFT                  (21U)
-#define DMA_EARS_EDREQ_21(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_21_SHIFT)) & DMA_EARS_EDREQ_21_MASK)
-#define DMA_EARS_EDREQ_22_MASK                   (0x400000U)
-#define DMA_EARS_EDREQ_22_SHIFT                  (22U)
-#define DMA_EARS_EDREQ_22(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_22_SHIFT)) & DMA_EARS_EDREQ_22_MASK)
-#define DMA_EARS_EDREQ_23_MASK                   (0x800000U)
-#define DMA_EARS_EDREQ_23_SHIFT                  (23U)
-#define DMA_EARS_EDREQ_23(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_23_SHIFT)) & DMA_EARS_EDREQ_23_MASK)
-#define DMA_EARS_EDREQ_24_MASK                   (0x1000000U)
-#define DMA_EARS_EDREQ_24_SHIFT                  (24U)
-#define DMA_EARS_EDREQ_24(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_24_SHIFT)) & DMA_EARS_EDREQ_24_MASK)
-#define DMA_EARS_EDREQ_25_MASK                   (0x2000000U)
-#define DMA_EARS_EDREQ_25_SHIFT                  (25U)
-#define DMA_EARS_EDREQ_25(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_25_SHIFT)) & DMA_EARS_EDREQ_25_MASK)
-#define DMA_EARS_EDREQ_26_MASK                   (0x4000000U)
-#define DMA_EARS_EDREQ_26_SHIFT                  (26U)
-#define DMA_EARS_EDREQ_26(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_26_SHIFT)) & DMA_EARS_EDREQ_26_MASK)
-#define DMA_EARS_EDREQ_27_MASK                   (0x8000000U)
-#define DMA_EARS_EDREQ_27_SHIFT                  (27U)
-#define DMA_EARS_EDREQ_27(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_27_SHIFT)) & DMA_EARS_EDREQ_27_MASK)
-#define DMA_EARS_EDREQ_28_MASK                   (0x10000000U)
-#define DMA_EARS_EDREQ_28_SHIFT                  (28U)
-#define DMA_EARS_EDREQ_28(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_28_SHIFT)) & DMA_EARS_EDREQ_28_MASK)
-#define DMA_EARS_EDREQ_29_MASK                   (0x20000000U)
-#define DMA_EARS_EDREQ_29_SHIFT                  (29U)
-#define DMA_EARS_EDREQ_29(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_29_SHIFT)) & DMA_EARS_EDREQ_29_MASK)
-#define DMA_EARS_EDREQ_30_MASK                   (0x40000000U)
-#define DMA_EARS_EDREQ_30_SHIFT                  (30U)
-#define DMA_EARS_EDREQ_30(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_30_SHIFT)) & DMA_EARS_EDREQ_30_MASK)
-#define DMA_EARS_EDREQ_31_MASK                   (0x80000000U)
-#define DMA_EARS_EDREQ_31_SHIFT                  (31U)
-#define DMA_EARS_EDREQ_31(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_31_SHIFT)) & DMA_EARS_EDREQ_31_MASK)
+#define DMA_EARS_EDREQ_0_MASK   (0x1U)
+#define DMA_EARS_EDREQ_0_SHIFT  (0U)
+#define DMA_EARS_EDREQ_0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_0_SHIFT)) & DMA_EARS_EDREQ_0_MASK)
+#define DMA_EARS_EDREQ_1_MASK   (0x2U)
+#define DMA_EARS_EDREQ_1_SHIFT  (1U)
+#define DMA_EARS_EDREQ_1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_1_SHIFT)) & DMA_EARS_EDREQ_1_MASK)
+#define DMA_EARS_EDREQ_2_MASK   (0x4U)
+#define DMA_EARS_EDREQ_2_SHIFT  (2U)
+#define DMA_EARS_EDREQ_2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_2_SHIFT)) & DMA_EARS_EDREQ_2_MASK)
+#define DMA_EARS_EDREQ_3_MASK   (0x8U)
+#define DMA_EARS_EDREQ_3_SHIFT  (3U)
+#define DMA_EARS_EDREQ_3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_3_SHIFT)) & DMA_EARS_EDREQ_3_MASK)
+#define DMA_EARS_EDREQ_4_MASK   (0x10U)
+#define DMA_EARS_EDREQ_4_SHIFT  (4U)
+#define DMA_EARS_EDREQ_4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_4_SHIFT)) & DMA_EARS_EDREQ_4_MASK)
+#define DMA_EARS_EDREQ_5_MASK   (0x20U)
+#define DMA_EARS_EDREQ_5_SHIFT  (5U)
+#define DMA_EARS_EDREQ_5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_5_SHIFT)) & DMA_EARS_EDREQ_5_MASK)
+#define DMA_EARS_EDREQ_6_MASK   (0x40U)
+#define DMA_EARS_EDREQ_6_SHIFT  (6U)
+#define DMA_EARS_EDREQ_6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_6_SHIFT)) & DMA_EARS_EDREQ_6_MASK)
+#define DMA_EARS_EDREQ_7_MASK   (0x80U)
+#define DMA_EARS_EDREQ_7_SHIFT  (7U)
+#define DMA_EARS_EDREQ_7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_7_SHIFT)) & DMA_EARS_EDREQ_7_MASK)
+#define DMA_EARS_EDREQ_8_MASK   (0x100U)
+#define DMA_EARS_EDREQ_8_SHIFT  (8U)
+#define DMA_EARS_EDREQ_8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_8_SHIFT)) & DMA_EARS_EDREQ_8_MASK)
+#define DMA_EARS_EDREQ_9_MASK   (0x200U)
+#define DMA_EARS_EDREQ_9_SHIFT  (9U)
+#define DMA_EARS_EDREQ_9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_9_SHIFT)) & DMA_EARS_EDREQ_9_MASK)
+#define DMA_EARS_EDREQ_10_MASK  (0x400U)
+#define DMA_EARS_EDREQ_10_SHIFT (10U)
+#define DMA_EARS_EDREQ_10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_10_SHIFT)) & DMA_EARS_EDREQ_10_MASK)
+#define DMA_EARS_EDREQ_11_MASK  (0x800U)
+#define DMA_EARS_EDREQ_11_SHIFT (11U)
+#define DMA_EARS_EDREQ_11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_11_SHIFT)) & DMA_EARS_EDREQ_11_MASK)
+#define DMA_EARS_EDREQ_12_MASK  (0x1000U)
+#define DMA_EARS_EDREQ_12_SHIFT (12U)
+#define DMA_EARS_EDREQ_12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_12_SHIFT)) & DMA_EARS_EDREQ_12_MASK)
+#define DMA_EARS_EDREQ_13_MASK  (0x2000U)
+#define DMA_EARS_EDREQ_13_SHIFT (13U)
+#define DMA_EARS_EDREQ_13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_13_SHIFT)) & DMA_EARS_EDREQ_13_MASK)
+#define DMA_EARS_EDREQ_14_MASK  (0x4000U)
+#define DMA_EARS_EDREQ_14_SHIFT (14U)
+#define DMA_EARS_EDREQ_14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_14_SHIFT)) & DMA_EARS_EDREQ_14_MASK)
+#define DMA_EARS_EDREQ_15_MASK  (0x8000U)
+#define DMA_EARS_EDREQ_15_SHIFT (15U)
+#define DMA_EARS_EDREQ_15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_15_SHIFT)) & DMA_EARS_EDREQ_15_MASK)
+#define DMA_EARS_EDREQ_16_MASK  (0x10000U)
+#define DMA_EARS_EDREQ_16_SHIFT (16U)
+#define DMA_EARS_EDREQ_16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_16_SHIFT)) & DMA_EARS_EDREQ_16_MASK)
+#define DMA_EARS_EDREQ_17_MASK  (0x20000U)
+#define DMA_EARS_EDREQ_17_SHIFT (17U)
+#define DMA_EARS_EDREQ_17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_17_SHIFT)) & DMA_EARS_EDREQ_17_MASK)
+#define DMA_EARS_EDREQ_18_MASK  (0x40000U)
+#define DMA_EARS_EDREQ_18_SHIFT (18U)
+#define DMA_EARS_EDREQ_18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_18_SHIFT)) & DMA_EARS_EDREQ_18_MASK)
+#define DMA_EARS_EDREQ_19_MASK  (0x80000U)
+#define DMA_EARS_EDREQ_19_SHIFT (19U)
+#define DMA_EARS_EDREQ_19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_19_SHIFT)) & DMA_EARS_EDREQ_19_MASK)
+#define DMA_EARS_EDREQ_20_MASK  (0x100000U)
+#define DMA_EARS_EDREQ_20_SHIFT (20U)
+#define DMA_EARS_EDREQ_20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_20_SHIFT)) & DMA_EARS_EDREQ_20_MASK)
+#define DMA_EARS_EDREQ_21_MASK  (0x200000U)
+#define DMA_EARS_EDREQ_21_SHIFT (21U)
+#define DMA_EARS_EDREQ_21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_21_SHIFT)) & DMA_EARS_EDREQ_21_MASK)
+#define DMA_EARS_EDREQ_22_MASK  (0x400000U)
+#define DMA_EARS_EDREQ_22_SHIFT (22U)
+#define DMA_EARS_EDREQ_22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_22_SHIFT)) & DMA_EARS_EDREQ_22_MASK)
+#define DMA_EARS_EDREQ_23_MASK  (0x800000U)
+#define DMA_EARS_EDREQ_23_SHIFT (23U)
+#define DMA_EARS_EDREQ_23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_23_SHIFT)) & DMA_EARS_EDREQ_23_MASK)
+#define DMA_EARS_EDREQ_24_MASK  (0x1000000U)
+#define DMA_EARS_EDREQ_24_SHIFT (24U)
+#define DMA_EARS_EDREQ_24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_24_SHIFT)) & DMA_EARS_EDREQ_24_MASK)
+#define DMA_EARS_EDREQ_25_MASK  (0x2000000U)
+#define DMA_EARS_EDREQ_25_SHIFT (25U)
+#define DMA_EARS_EDREQ_25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_25_SHIFT)) & DMA_EARS_EDREQ_25_MASK)
+#define DMA_EARS_EDREQ_26_MASK  (0x4000000U)
+#define DMA_EARS_EDREQ_26_SHIFT (26U)
+#define DMA_EARS_EDREQ_26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_26_SHIFT)) & DMA_EARS_EDREQ_26_MASK)
+#define DMA_EARS_EDREQ_27_MASK  (0x8000000U)
+#define DMA_EARS_EDREQ_27_SHIFT (27U)
+#define DMA_EARS_EDREQ_27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_27_SHIFT)) & DMA_EARS_EDREQ_27_MASK)
+#define DMA_EARS_EDREQ_28_MASK  (0x10000000U)
+#define DMA_EARS_EDREQ_28_SHIFT (28U)
+#define DMA_EARS_EDREQ_28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_28_SHIFT)) & DMA_EARS_EDREQ_28_MASK)
+#define DMA_EARS_EDREQ_29_MASK  (0x20000000U)
+#define DMA_EARS_EDREQ_29_SHIFT (29U)
+#define DMA_EARS_EDREQ_29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_29_SHIFT)) & DMA_EARS_EDREQ_29_MASK)
+#define DMA_EARS_EDREQ_30_MASK  (0x40000000U)
+#define DMA_EARS_EDREQ_30_SHIFT (30U)
+#define DMA_EARS_EDREQ_30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_30_SHIFT)) & DMA_EARS_EDREQ_30_MASK)
+#define DMA_EARS_EDREQ_31_MASK  (0x80000000U)
+#define DMA_EARS_EDREQ_31_SHIFT (31U)
+#define DMA_EARS_EDREQ_31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_31_SHIFT)) & DMA_EARS_EDREQ_31_MASK)
 /*! @} */
 
 /*! @name DCHPRI3 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI3_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI3_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI3_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_CHPRI_SHIFT)) & DMA_DCHPRI3_CHPRI_MASK)
-#define DMA_DCHPRI3_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI3_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI3_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_GRPPRI_SHIFT)) & DMA_DCHPRI3_GRPPRI_MASK)
-#define DMA_DCHPRI3_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI3_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI3_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_DPA_SHIFT)) & DMA_DCHPRI3_DPA_MASK)
-#define DMA_DCHPRI3_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI3_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI3_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_ECP_SHIFT)) & DMA_DCHPRI3_ECP_MASK)
+#define DMA_DCHPRI3_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI3_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI3_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_CHPRI_SHIFT)) & DMA_DCHPRI3_CHPRI_MASK)
+#define DMA_DCHPRI3_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI3_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI3_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_GRPPRI_SHIFT)) & DMA_DCHPRI3_GRPPRI_MASK)
+#define DMA_DCHPRI3_DPA_MASK     (0x40U)
+#define DMA_DCHPRI3_DPA_SHIFT    (6U)
+#define DMA_DCHPRI3_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_DPA_SHIFT)) & DMA_DCHPRI3_DPA_MASK)
+#define DMA_DCHPRI3_ECP_MASK     (0x80U)
+#define DMA_DCHPRI3_ECP_SHIFT    (7U)
+#define DMA_DCHPRI3_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_ECP_SHIFT)) & DMA_DCHPRI3_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI2 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI2_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI2_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI2_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_CHPRI_SHIFT)) & DMA_DCHPRI2_CHPRI_MASK)
-#define DMA_DCHPRI2_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI2_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI2_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_GRPPRI_SHIFT)) & DMA_DCHPRI2_GRPPRI_MASK)
-#define DMA_DCHPRI2_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI2_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI2_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_DPA_SHIFT)) & DMA_DCHPRI2_DPA_MASK)
-#define DMA_DCHPRI2_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI2_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI2_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_ECP_SHIFT)) & DMA_DCHPRI2_ECP_MASK)
+#define DMA_DCHPRI2_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI2_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI2_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_CHPRI_SHIFT)) & DMA_DCHPRI2_CHPRI_MASK)
+#define DMA_DCHPRI2_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI2_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI2_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_GRPPRI_SHIFT)) & DMA_DCHPRI2_GRPPRI_MASK)
+#define DMA_DCHPRI2_DPA_MASK     (0x40U)
+#define DMA_DCHPRI2_DPA_SHIFT    (6U)
+#define DMA_DCHPRI2_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_DPA_SHIFT)) & DMA_DCHPRI2_DPA_MASK)
+#define DMA_DCHPRI2_ECP_MASK     (0x80U)
+#define DMA_DCHPRI2_ECP_SHIFT    (7U)
+#define DMA_DCHPRI2_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_ECP_SHIFT)) & DMA_DCHPRI2_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI1 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI1_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI1_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI1_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_CHPRI_SHIFT)) & DMA_DCHPRI1_CHPRI_MASK)
-#define DMA_DCHPRI1_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI1_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI1_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_GRPPRI_SHIFT)) & DMA_DCHPRI1_GRPPRI_MASK)
-#define DMA_DCHPRI1_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI1_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI1_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_DPA_SHIFT)) & DMA_DCHPRI1_DPA_MASK)
-#define DMA_DCHPRI1_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI1_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI1_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_ECP_SHIFT)) & DMA_DCHPRI1_ECP_MASK)
+#define DMA_DCHPRI1_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI1_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI1_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_CHPRI_SHIFT)) & DMA_DCHPRI1_CHPRI_MASK)
+#define DMA_DCHPRI1_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI1_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI1_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_GRPPRI_SHIFT)) & DMA_DCHPRI1_GRPPRI_MASK)
+#define DMA_DCHPRI1_DPA_MASK     (0x40U)
+#define DMA_DCHPRI1_DPA_SHIFT    (6U)
+#define DMA_DCHPRI1_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_DPA_SHIFT)) & DMA_DCHPRI1_DPA_MASK)
+#define DMA_DCHPRI1_ECP_MASK     (0x80U)
+#define DMA_DCHPRI1_ECP_SHIFT    (7U)
+#define DMA_DCHPRI1_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_ECP_SHIFT)) & DMA_DCHPRI1_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI0 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI0_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI0_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI0_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_CHPRI_SHIFT)) & DMA_DCHPRI0_CHPRI_MASK)
-#define DMA_DCHPRI0_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI0_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI0_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_GRPPRI_SHIFT)) & DMA_DCHPRI0_GRPPRI_MASK)
-#define DMA_DCHPRI0_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI0_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI0_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_DPA_SHIFT)) & DMA_DCHPRI0_DPA_MASK)
-#define DMA_DCHPRI0_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI0_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI0_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_ECP_SHIFT)) & DMA_DCHPRI0_ECP_MASK)
+#define DMA_DCHPRI0_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI0_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI0_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_CHPRI_SHIFT)) & DMA_DCHPRI0_CHPRI_MASK)
+#define DMA_DCHPRI0_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI0_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI0_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_GRPPRI_SHIFT)) & DMA_DCHPRI0_GRPPRI_MASK)
+#define DMA_DCHPRI0_DPA_MASK     (0x40U)
+#define DMA_DCHPRI0_DPA_SHIFT    (6U)
+#define DMA_DCHPRI0_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_DPA_SHIFT)) & DMA_DCHPRI0_DPA_MASK)
+#define DMA_DCHPRI0_ECP_MASK     (0x80U)
+#define DMA_DCHPRI0_ECP_SHIFT    (7U)
+#define DMA_DCHPRI0_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_ECP_SHIFT)) & DMA_DCHPRI0_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI7 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI7_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI7_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI7_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_CHPRI_SHIFT)) & DMA_DCHPRI7_CHPRI_MASK)
-#define DMA_DCHPRI7_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI7_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI7_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_GRPPRI_SHIFT)) & DMA_DCHPRI7_GRPPRI_MASK)
-#define DMA_DCHPRI7_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI7_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI7_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_DPA_SHIFT)) & DMA_DCHPRI7_DPA_MASK)
-#define DMA_DCHPRI7_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI7_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI7_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_ECP_SHIFT)) & DMA_DCHPRI7_ECP_MASK)
+#define DMA_DCHPRI7_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI7_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI7_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_CHPRI_SHIFT)) & DMA_DCHPRI7_CHPRI_MASK)
+#define DMA_DCHPRI7_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI7_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI7_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_GRPPRI_SHIFT)) & DMA_DCHPRI7_GRPPRI_MASK)
+#define DMA_DCHPRI7_DPA_MASK     (0x40U)
+#define DMA_DCHPRI7_DPA_SHIFT    (6U)
+#define DMA_DCHPRI7_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_DPA_SHIFT)) & DMA_DCHPRI7_DPA_MASK)
+#define DMA_DCHPRI7_ECP_MASK     (0x80U)
+#define DMA_DCHPRI7_ECP_SHIFT    (7U)
+#define DMA_DCHPRI7_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_ECP_SHIFT)) & DMA_DCHPRI7_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI6 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI6_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI6_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI6_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_CHPRI_SHIFT)) & DMA_DCHPRI6_CHPRI_MASK)
-#define DMA_DCHPRI6_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI6_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI6_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_GRPPRI_SHIFT)) & DMA_DCHPRI6_GRPPRI_MASK)
-#define DMA_DCHPRI6_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI6_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI6_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_DPA_SHIFT)) & DMA_DCHPRI6_DPA_MASK)
-#define DMA_DCHPRI6_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI6_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI6_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_ECP_SHIFT)) & DMA_DCHPRI6_ECP_MASK)
+#define DMA_DCHPRI6_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI6_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI6_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_CHPRI_SHIFT)) & DMA_DCHPRI6_CHPRI_MASK)
+#define DMA_DCHPRI6_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI6_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI6_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_GRPPRI_SHIFT)) & DMA_DCHPRI6_GRPPRI_MASK)
+#define DMA_DCHPRI6_DPA_MASK     (0x40U)
+#define DMA_DCHPRI6_DPA_SHIFT    (6U)
+#define DMA_DCHPRI6_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_DPA_SHIFT)) & DMA_DCHPRI6_DPA_MASK)
+#define DMA_DCHPRI6_ECP_MASK     (0x80U)
+#define DMA_DCHPRI6_ECP_SHIFT    (7U)
+#define DMA_DCHPRI6_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_ECP_SHIFT)) & DMA_DCHPRI6_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI5 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI5_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI5_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI5_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_CHPRI_SHIFT)) & DMA_DCHPRI5_CHPRI_MASK)
-#define DMA_DCHPRI5_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI5_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI5_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_GRPPRI_SHIFT)) & DMA_DCHPRI5_GRPPRI_MASK)
-#define DMA_DCHPRI5_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI5_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI5_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_DPA_SHIFT)) & DMA_DCHPRI5_DPA_MASK)
-#define DMA_DCHPRI5_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI5_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI5_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
+#define DMA_DCHPRI5_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI5_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI5_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_CHPRI_SHIFT)) & DMA_DCHPRI5_CHPRI_MASK)
+#define DMA_DCHPRI5_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI5_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI5_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_GRPPRI_SHIFT)) & DMA_DCHPRI5_GRPPRI_MASK)
+#define DMA_DCHPRI5_DPA_MASK     (0x40U)
+#define DMA_DCHPRI5_DPA_SHIFT    (6U)
+#define DMA_DCHPRI5_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_DPA_SHIFT)) & DMA_DCHPRI5_DPA_MASK)
+#define DMA_DCHPRI5_ECP_MASK     (0x80U)
+#define DMA_DCHPRI5_ECP_SHIFT    (7U)
+#define DMA_DCHPRI5_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI4 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI4_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI4_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI4_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_CHPRI_SHIFT)) & DMA_DCHPRI4_CHPRI_MASK)
-#define DMA_DCHPRI4_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI4_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI4_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_GRPPRI_SHIFT)) & DMA_DCHPRI4_GRPPRI_MASK)
-#define DMA_DCHPRI4_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI4_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI4_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_DPA_SHIFT)) & DMA_DCHPRI4_DPA_MASK)
-#define DMA_DCHPRI4_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI4_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI4_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_ECP_SHIFT)) & DMA_DCHPRI4_ECP_MASK)
+#define DMA_DCHPRI4_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI4_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI4_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_CHPRI_SHIFT)) & DMA_DCHPRI4_CHPRI_MASK)
+#define DMA_DCHPRI4_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI4_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI4_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_GRPPRI_SHIFT)) & DMA_DCHPRI4_GRPPRI_MASK)
+#define DMA_DCHPRI4_DPA_MASK     (0x40U)
+#define DMA_DCHPRI4_DPA_SHIFT    (6U)
+#define DMA_DCHPRI4_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_DPA_SHIFT)) & DMA_DCHPRI4_DPA_MASK)
+#define DMA_DCHPRI4_ECP_MASK     (0x80U)
+#define DMA_DCHPRI4_ECP_SHIFT    (7U)
+#define DMA_DCHPRI4_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_ECP_SHIFT)) & DMA_DCHPRI4_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI11 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI11_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI11_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI11_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_CHPRI_SHIFT)) & DMA_DCHPRI11_CHPRI_MASK)
-#define DMA_DCHPRI11_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI11_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI11_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_GRPPRI_SHIFT)) & DMA_DCHPRI11_GRPPRI_MASK)
-#define DMA_DCHPRI11_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI11_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI11_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_DPA_SHIFT)) & DMA_DCHPRI11_DPA_MASK)
-#define DMA_DCHPRI11_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI11_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI11_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_ECP_SHIFT)) & DMA_DCHPRI11_ECP_MASK)
+#define DMA_DCHPRI11_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI11_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI11_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_CHPRI_SHIFT)) & DMA_DCHPRI11_CHPRI_MASK)
+#define DMA_DCHPRI11_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI11_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI11_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_GRPPRI_SHIFT)) & DMA_DCHPRI11_GRPPRI_MASK)
+#define DMA_DCHPRI11_DPA_MASK     (0x40U)
+#define DMA_DCHPRI11_DPA_SHIFT    (6U)
+#define DMA_DCHPRI11_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_DPA_SHIFT)) & DMA_DCHPRI11_DPA_MASK)
+#define DMA_DCHPRI11_ECP_MASK     (0x80U)
+#define DMA_DCHPRI11_ECP_SHIFT    (7U)
+#define DMA_DCHPRI11_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_ECP_SHIFT)) & DMA_DCHPRI11_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI10 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI10_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI10_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI10_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_CHPRI_SHIFT)) & DMA_DCHPRI10_CHPRI_MASK)
-#define DMA_DCHPRI10_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI10_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI10_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_GRPPRI_SHIFT)) & DMA_DCHPRI10_GRPPRI_MASK)
-#define DMA_DCHPRI10_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI10_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI10_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_DPA_SHIFT)) & DMA_DCHPRI10_DPA_MASK)
-#define DMA_DCHPRI10_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI10_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI10_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_ECP_SHIFT)) & DMA_DCHPRI10_ECP_MASK)
+#define DMA_DCHPRI10_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI10_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI10_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_CHPRI_SHIFT)) & DMA_DCHPRI10_CHPRI_MASK)
+#define DMA_DCHPRI10_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI10_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI10_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_GRPPRI_SHIFT)) & DMA_DCHPRI10_GRPPRI_MASK)
+#define DMA_DCHPRI10_DPA_MASK     (0x40U)
+#define DMA_DCHPRI10_DPA_SHIFT    (6U)
+#define DMA_DCHPRI10_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_DPA_SHIFT)) & DMA_DCHPRI10_DPA_MASK)
+#define DMA_DCHPRI10_ECP_MASK     (0x80U)
+#define DMA_DCHPRI10_ECP_SHIFT    (7U)
+#define DMA_DCHPRI10_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_ECP_SHIFT)) & DMA_DCHPRI10_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI9 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI9_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI9_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI9_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_CHPRI_SHIFT)) & DMA_DCHPRI9_CHPRI_MASK)
-#define DMA_DCHPRI9_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI9_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI9_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_GRPPRI_SHIFT)) & DMA_DCHPRI9_GRPPRI_MASK)
-#define DMA_DCHPRI9_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI9_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI9_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_DPA_SHIFT)) & DMA_DCHPRI9_DPA_MASK)
-#define DMA_DCHPRI9_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI9_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI9_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_ECP_SHIFT)) & DMA_DCHPRI9_ECP_MASK)
+#define DMA_DCHPRI9_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI9_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI9_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_CHPRI_SHIFT)) & DMA_DCHPRI9_CHPRI_MASK)
+#define DMA_DCHPRI9_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI9_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI9_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_GRPPRI_SHIFT)) & DMA_DCHPRI9_GRPPRI_MASK)
+#define DMA_DCHPRI9_DPA_MASK     (0x40U)
+#define DMA_DCHPRI9_DPA_SHIFT    (6U)
+#define DMA_DCHPRI9_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_DPA_SHIFT)) & DMA_DCHPRI9_DPA_MASK)
+#define DMA_DCHPRI9_ECP_MASK     (0x80U)
+#define DMA_DCHPRI9_ECP_SHIFT    (7U)
+#define DMA_DCHPRI9_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_ECP_SHIFT)) & DMA_DCHPRI9_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI8 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI8_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI8_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI8_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_CHPRI_SHIFT)) & DMA_DCHPRI8_CHPRI_MASK)
-#define DMA_DCHPRI8_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI8_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI8_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_GRPPRI_SHIFT)) & DMA_DCHPRI8_GRPPRI_MASK)
-#define DMA_DCHPRI8_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI8_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI8_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_DPA_SHIFT)) & DMA_DCHPRI8_DPA_MASK)
-#define DMA_DCHPRI8_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI8_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI8_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_ECP_SHIFT)) & DMA_DCHPRI8_ECP_MASK)
+#define DMA_DCHPRI8_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI8_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI8_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_CHPRI_SHIFT)) & DMA_DCHPRI8_CHPRI_MASK)
+#define DMA_DCHPRI8_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI8_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI8_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_GRPPRI_SHIFT)) & DMA_DCHPRI8_GRPPRI_MASK)
+#define DMA_DCHPRI8_DPA_MASK     (0x40U)
+#define DMA_DCHPRI8_DPA_SHIFT    (6U)
+#define DMA_DCHPRI8_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_DPA_SHIFT)) & DMA_DCHPRI8_DPA_MASK)
+#define DMA_DCHPRI8_ECP_MASK     (0x80U)
+#define DMA_DCHPRI8_ECP_SHIFT    (7U)
+#define DMA_DCHPRI8_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_ECP_SHIFT)) & DMA_DCHPRI8_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI15 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI15_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI15_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI15_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_CHPRI_SHIFT)) & DMA_DCHPRI15_CHPRI_MASK)
-#define DMA_DCHPRI15_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI15_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI15_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_GRPPRI_SHIFT)) & DMA_DCHPRI15_GRPPRI_MASK)
-#define DMA_DCHPRI15_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI15_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI15_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_DPA_SHIFT)) & DMA_DCHPRI15_DPA_MASK)
-#define DMA_DCHPRI15_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI15_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI15_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_ECP_SHIFT)) & DMA_DCHPRI15_ECP_MASK)
+#define DMA_DCHPRI15_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI15_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI15_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_CHPRI_SHIFT)) & DMA_DCHPRI15_CHPRI_MASK)
+#define DMA_DCHPRI15_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI15_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI15_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_GRPPRI_SHIFT)) & DMA_DCHPRI15_GRPPRI_MASK)
+#define DMA_DCHPRI15_DPA_MASK     (0x40U)
+#define DMA_DCHPRI15_DPA_SHIFT    (6U)
+#define DMA_DCHPRI15_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_DPA_SHIFT)) & DMA_DCHPRI15_DPA_MASK)
+#define DMA_DCHPRI15_ECP_MASK     (0x80U)
+#define DMA_DCHPRI15_ECP_SHIFT    (7U)
+#define DMA_DCHPRI15_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_ECP_SHIFT)) & DMA_DCHPRI15_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI14 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI14_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI14_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI14_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_CHPRI_SHIFT)) & DMA_DCHPRI14_CHPRI_MASK)
-#define DMA_DCHPRI14_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI14_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI14_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_GRPPRI_SHIFT)) & DMA_DCHPRI14_GRPPRI_MASK)
-#define DMA_DCHPRI14_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI14_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI14_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_DPA_SHIFT)) & DMA_DCHPRI14_DPA_MASK)
-#define DMA_DCHPRI14_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI14_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI14_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_ECP_SHIFT)) & DMA_DCHPRI14_ECP_MASK)
+#define DMA_DCHPRI14_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI14_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI14_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_CHPRI_SHIFT)) & DMA_DCHPRI14_CHPRI_MASK)
+#define DMA_DCHPRI14_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI14_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI14_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_GRPPRI_SHIFT)) & DMA_DCHPRI14_GRPPRI_MASK)
+#define DMA_DCHPRI14_DPA_MASK     (0x40U)
+#define DMA_DCHPRI14_DPA_SHIFT    (6U)
+#define DMA_DCHPRI14_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_DPA_SHIFT)) & DMA_DCHPRI14_DPA_MASK)
+#define DMA_DCHPRI14_ECP_MASK     (0x80U)
+#define DMA_DCHPRI14_ECP_SHIFT    (7U)
+#define DMA_DCHPRI14_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_ECP_SHIFT)) & DMA_DCHPRI14_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI13 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI13_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI13_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI13_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_CHPRI_SHIFT)) & DMA_DCHPRI13_CHPRI_MASK)
-#define DMA_DCHPRI13_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI13_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI13_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_GRPPRI_SHIFT)) & DMA_DCHPRI13_GRPPRI_MASK)
-#define DMA_DCHPRI13_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI13_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI13_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_DPA_SHIFT)) & DMA_DCHPRI13_DPA_MASK)
-#define DMA_DCHPRI13_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI13_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI13_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_ECP_SHIFT)) & DMA_DCHPRI13_ECP_MASK)
+#define DMA_DCHPRI13_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI13_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI13_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_CHPRI_SHIFT)) & DMA_DCHPRI13_CHPRI_MASK)
+#define DMA_DCHPRI13_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI13_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI13_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_GRPPRI_SHIFT)) & DMA_DCHPRI13_GRPPRI_MASK)
+#define DMA_DCHPRI13_DPA_MASK     (0x40U)
+#define DMA_DCHPRI13_DPA_SHIFT    (6U)
+#define DMA_DCHPRI13_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_DPA_SHIFT)) & DMA_DCHPRI13_DPA_MASK)
+#define DMA_DCHPRI13_ECP_MASK     (0x80U)
+#define DMA_DCHPRI13_ECP_SHIFT    (7U)
+#define DMA_DCHPRI13_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_ECP_SHIFT)) & DMA_DCHPRI13_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI12 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI12_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI12_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI12_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_CHPRI_SHIFT)) & DMA_DCHPRI12_CHPRI_MASK)
-#define DMA_DCHPRI12_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI12_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI12_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_GRPPRI_SHIFT)) & DMA_DCHPRI12_GRPPRI_MASK)
-#define DMA_DCHPRI12_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI12_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI12_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_DPA_SHIFT)) & DMA_DCHPRI12_DPA_MASK)
-#define DMA_DCHPRI12_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI12_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI12_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_ECP_SHIFT)) & DMA_DCHPRI12_ECP_MASK)
+#define DMA_DCHPRI12_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI12_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI12_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_CHPRI_SHIFT)) & DMA_DCHPRI12_CHPRI_MASK)
+#define DMA_DCHPRI12_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI12_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI12_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_GRPPRI_SHIFT)) & DMA_DCHPRI12_GRPPRI_MASK)
+#define DMA_DCHPRI12_DPA_MASK     (0x40U)
+#define DMA_DCHPRI12_DPA_SHIFT    (6U)
+#define DMA_DCHPRI12_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_DPA_SHIFT)) & DMA_DCHPRI12_DPA_MASK)
+#define DMA_DCHPRI12_ECP_MASK     (0x80U)
+#define DMA_DCHPRI12_ECP_SHIFT    (7U)
+#define DMA_DCHPRI12_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_ECP_SHIFT)) & DMA_DCHPRI12_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI19 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI19_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI19_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI19_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_CHPRI_SHIFT)) & DMA_DCHPRI19_CHPRI_MASK)
-#define DMA_DCHPRI19_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI19_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI19_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_GRPPRI_SHIFT)) & DMA_DCHPRI19_GRPPRI_MASK)
-#define DMA_DCHPRI19_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI19_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI19_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_DPA_SHIFT)) & DMA_DCHPRI19_DPA_MASK)
-#define DMA_DCHPRI19_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI19_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI19_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_ECP_SHIFT)) & DMA_DCHPRI19_ECP_MASK)
+#define DMA_DCHPRI19_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI19_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI19_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_CHPRI_SHIFT)) & DMA_DCHPRI19_CHPRI_MASK)
+#define DMA_DCHPRI19_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI19_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI19_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_GRPPRI_SHIFT)) & DMA_DCHPRI19_GRPPRI_MASK)
+#define DMA_DCHPRI19_DPA_MASK     (0x40U)
+#define DMA_DCHPRI19_DPA_SHIFT    (6U)
+#define DMA_DCHPRI19_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_DPA_SHIFT)) & DMA_DCHPRI19_DPA_MASK)
+#define DMA_DCHPRI19_ECP_MASK     (0x80U)
+#define DMA_DCHPRI19_ECP_SHIFT    (7U)
+#define DMA_DCHPRI19_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_ECP_SHIFT)) & DMA_DCHPRI19_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI18 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI18_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI18_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI18_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_CHPRI_SHIFT)) & DMA_DCHPRI18_CHPRI_MASK)
-#define DMA_DCHPRI18_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI18_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI18_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_GRPPRI_SHIFT)) & DMA_DCHPRI18_GRPPRI_MASK)
-#define DMA_DCHPRI18_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI18_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI18_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_DPA_SHIFT)) & DMA_DCHPRI18_DPA_MASK)
-#define DMA_DCHPRI18_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI18_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI18_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_ECP_SHIFT)) & DMA_DCHPRI18_ECP_MASK)
+#define DMA_DCHPRI18_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI18_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI18_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_CHPRI_SHIFT)) & DMA_DCHPRI18_CHPRI_MASK)
+#define DMA_DCHPRI18_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI18_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI18_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_GRPPRI_SHIFT)) & DMA_DCHPRI18_GRPPRI_MASK)
+#define DMA_DCHPRI18_DPA_MASK     (0x40U)
+#define DMA_DCHPRI18_DPA_SHIFT    (6U)
+#define DMA_DCHPRI18_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_DPA_SHIFT)) & DMA_DCHPRI18_DPA_MASK)
+#define DMA_DCHPRI18_ECP_MASK     (0x80U)
+#define DMA_DCHPRI18_ECP_SHIFT    (7U)
+#define DMA_DCHPRI18_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_ECP_SHIFT)) & DMA_DCHPRI18_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI17 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI17_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI17_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI17_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_CHPRI_SHIFT)) & DMA_DCHPRI17_CHPRI_MASK)
-#define DMA_DCHPRI17_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI17_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI17_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_GRPPRI_SHIFT)) & DMA_DCHPRI17_GRPPRI_MASK)
-#define DMA_DCHPRI17_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI17_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI17_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_DPA_SHIFT)) & DMA_DCHPRI17_DPA_MASK)
-#define DMA_DCHPRI17_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI17_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI17_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_ECP_SHIFT)) & DMA_DCHPRI17_ECP_MASK)
+#define DMA_DCHPRI17_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI17_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI17_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_CHPRI_SHIFT)) & DMA_DCHPRI17_CHPRI_MASK)
+#define DMA_DCHPRI17_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI17_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI17_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_GRPPRI_SHIFT)) & DMA_DCHPRI17_GRPPRI_MASK)
+#define DMA_DCHPRI17_DPA_MASK     (0x40U)
+#define DMA_DCHPRI17_DPA_SHIFT    (6U)
+#define DMA_DCHPRI17_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_DPA_SHIFT)) & DMA_DCHPRI17_DPA_MASK)
+#define DMA_DCHPRI17_ECP_MASK     (0x80U)
+#define DMA_DCHPRI17_ECP_SHIFT    (7U)
+#define DMA_DCHPRI17_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_ECP_SHIFT)) & DMA_DCHPRI17_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI16 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI16_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI16_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI16_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_CHPRI_SHIFT)) & DMA_DCHPRI16_CHPRI_MASK)
-#define DMA_DCHPRI16_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI16_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI16_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_GRPPRI_SHIFT)) & DMA_DCHPRI16_GRPPRI_MASK)
-#define DMA_DCHPRI16_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI16_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI16_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_DPA_SHIFT)) & DMA_DCHPRI16_DPA_MASK)
-#define DMA_DCHPRI16_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI16_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI16_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_ECP_SHIFT)) & DMA_DCHPRI16_ECP_MASK)
+#define DMA_DCHPRI16_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI16_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI16_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_CHPRI_SHIFT)) & DMA_DCHPRI16_CHPRI_MASK)
+#define DMA_DCHPRI16_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI16_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI16_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_GRPPRI_SHIFT)) & DMA_DCHPRI16_GRPPRI_MASK)
+#define DMA_DCHPRI16_DPA_MASK     (0x40U)
+#define DMA_DCHPRI16_DPA_SHIFT    (6U)
+#define DMA_DCHPRI16_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_DPA_SHIFT)) & DMA_DCHPRI16_DPA_MASK)
+#define DMA_DCHPRI16_ECP_MASK     (0x80U)
+#define DMA_DCHPRI16_ECP_SHIFT    (7U)
+#define DMA_DCHPRI16_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_ECP_SHIFT)) & DMA_DCHPRI16_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI23 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI23_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI23_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI23_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_CHPRI_SHIFT)) & DMA_DCHPRI23_CHPRI_MASK)
-#define DMA_DCHPRI23_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI23_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI23_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_GRPPRI_SHIFT)) & DMA_DCHPRI23_GRPPRI_MASK)
-#define DMA_DCHPRI23_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI23_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI23_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_DPA_SHIFT)) & DMA_DCHPRI23_DPA_MASK)
-#define DMA_DCHPRI23_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI23_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI23_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_ECP_SHIFT)) & DMA_DCHPRI23_ECP_MASK)
+#define DMA_DCHPRI23_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI23_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI23_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_CHPRI_SHIFT)) & DMA_DCHPRI23_CHPRI_MASK)
+#define DMA_DCHPRI23_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI23_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI23_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_GRPPRI_SHIFT)) & DMA_DCHPRI23_GRPPRI_MASK)
+#define DMA_DCHPRI23_DPA_MASK     (0x40U)
+#define DMA_DCHPRI23_DPA_SHIFT    (6U)
+#define DMA_DCHPRI23_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_DPA_SHIFT)) & DMA_DCHPRI23_DPA_MASK)
+#define DMA_DCHPRI23_ECP_MASK     (0x80U)
+#define DMA_DCHPRI23_ECP_SHIFT    (7U)
+#define DMA_DCHPRI23_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_ECP_SHIFT)) & DMA_DCHPRI23_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI22 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI22_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI22_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI22_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_CHPRI_SHIFT)) & DMA_DCHPRI22_CHPRI_MASK)
-#define DMA_DCHPRI22_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI22_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI22_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_GRPPRI_SHIFT)) & DMA_DCHPRI22_GRPPRI_MASK)
-#define DMA_DCHPRI22_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI22_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI22_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_DPA_SHIFT)) & DMA_DCHPRI22_DPA_MASK)
-#define DMA_DCHPRI22_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI22_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI22_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_ECP_SHIFT)) & DMA_DCHPRI22_ECP_MASK)
+#define DMA_DCHPRI22_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI22_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI22_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_CHPRI_SHIFT)) & DMA_DCHPRI22_CHPRI_MASK)
+#define DMA_DCHPRI22_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI22_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI22_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_GRPPRI_SHIFT)) & DMA_DCHPRI22_GRPPRI_MASK)
+#define DMA_DCHPRI22_DPA_MASK     (0x40U)
+#define DMA_DCHPRI22_DPA_SHIFT    (6U)
+#define DMA_DCHPRI22_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_DPA_SHIFT)) & DMA_DCHPRI22_DPA_MASK)
+#define DMA_DCHPRI22_ECP_MASK     (0x80U)
+#define DMA_DCHPRI22_ECP_SHIFT    (7U)
+#define DMA_DCHPRI22_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_ECP_SHIFT)) & DMA_DCHPRI22_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI21 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI21_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI21_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI21_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_CHPRI_SHIFT)) & DMA_DCHPRI21_CHPRI_MASK)
-#define DMA_DCHPRI21_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI21_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI21_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_GRPPRI_SHIFT)) & DMA_DCHPRI21_GRPPRI_MASK)
-#define DMA_DCHPRI21_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI21_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI21_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_DPA_SHIFT)) & DMA_DCHPRI21_DPA_MASK)
-#define DMA_DCHPRI21_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI21_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI21_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_ECP_SHIFT)) & DMA_DCHPRI21_ECP_MASK)
+#define DMA_DCHPRI21_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI21_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI21_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_CHPRI_SHIFT)) & DMA_DCHPRI21_CHPRI_MASK)
+#define DMA_DCHPRI21_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI21_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI21_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_GRPPRI_SHIFT)) & DMA_DCHPRI21_GRPPRI_MASK)
+#define DMA_DCHPRI21_DPA_MASK     (0x40U)
+#define DMA_DCHPRI21_DPA_SHIFT    (6U)
+#define DMA_DCHPRI21_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_DPA_SHIFT)) & DMA_DCHPRI21_DPA_MASK)
+#define DMA_DCHPRI21_ECP_MASK     (0x80U)
+#define DMA_DCHPRI21_ECP_SHIFT    (7U)
+#define DMA_DCHPRI21_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_ECP_SHIFT)) & DMA_DCHPRI21_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI20 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI20_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI20_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI20_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_CHPRI_SHIFT)) & DMA_DCHPRI20_CHPRI_MASK)
-#define DMA_DCHPRI20_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI20_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI20_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_GRPPRI_SHIFT)) & DMA_DCHPRI20_GRPPRI_MASK)
-#define DMA_DCHPRI20_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI20_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI20_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_DPA_SHIFT)) & DMA_DCHPRI20_DPA_MASK)
-#define DMA_DCHPRI20_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI20_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI20_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_ECP_SHIFT)) & DMA_DCHPRI20_ECP_MASK)
+#define DMA_DCHPRI20_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI20_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI20_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_CHPRI_SHIFT)) & DMA_DCHPRI20_CHPRI_MASK)
+#define DMA_DCHPRI20_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI20_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI20_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_GRPPRI_SHIFT)) & DMA_DCHPRI20_GRPPRI_MASK)
+#define DMA_DCHPRI20_DPA_MASK     (0x40U)
+#define DMA_DCHPRI20_DPA_SHIFT    (6U)
+#define DMA_DCHPRI20_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_DPA_SHIFT)) & DMA_DCHPRI20_DPA_MASK)
+#define DMA_DCHPRI20_ECP_MASK     (0x80U)
+#define DMA_DCHPRI20_ECP_SHIFT    (7U)
+#define DMA_DCHPRI20_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_ECP_SHIFT)) & DMA_DCHPRI20_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI27 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI27_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI27_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI27_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_CHPRI_SHIFT)) & DMA_DCHPRI27_CHPRI_MASK)
-#define DMA_DCHPRI27_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI27_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI27_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_GRPPRI_SHIFT)) & DMA_DCHPRI27_GRPPRI_MASK)
-#define DMA_DCHPRI27_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI27_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI27_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_DPA_SHIFT)) & DMA_DCHPRI27_DPA_MASK)
-#define DMA_DCHPRI27_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI27_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI27_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_ECP_SHIFT)) & DMA_DCHPRI27_ECP_MASK)
+#define DMA_DCHPRI27_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI27_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI27_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_CHPRI_SHIFT)) & DMA_DCHPRI27_CHPRI_MASK)
+#define DMA_DCHPRI27_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI27_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI27_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_GRPPRI_SHIFT)) & DMA_DCHPRI27_GRPPRI_MASK)
+#define DMA_DCHPRI27_DPA_MASK     (0x40U)
+#define DMA_DCHPRI27_DPA_SHIFT    (6U)
+#define DMA_DCHPRI27_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_DPA_SHIFT)) & DMA_DCHPRI27_DPA_MASK)
+#define DMA_DCHPRI27_ECP_MASK     (0x80U)
+#define DMA_DCHPRI27_ECP_SHIFT    (7U)
+#define DMA_DCHPRI27_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_ECP_SHIFT)) & DMA_DCHPRI27_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI26 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI26_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI26_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI26_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_CHPRI_SHIFT)) & DMA_DCHPRI26_CHPRI_MASK)
-#define DMA_DCHPRI26_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI26_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI26_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_GRPPRI_SHIFT)) & DMA_DCHPRI26_GRPPRI_MASK)
-#define DMA_DCHPRI26_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI26_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI26_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_DPA_SHIFT)) & DMA_DCHPRI26_DPA_MASK)
-#define DMA_DCHPRI26_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI26_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI26_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_ECP_SHIFT)) & DMA_DCHPRI26_ECP_MASK)
+#define DMA_DCHPRI26_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI26_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI26_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_CHPRI_SHIFT)) & DMA_DCHPRI26_CHPRI_MASK)
+#define DMA_DCHPRI26_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI26_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI26_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_GRPPRI_SHIFT)) & DMA_DCHPRI26_GRPPRI_MASK)
+#define DMA_DCHPRI26_DPA_MASK     (0x40U)
+#define DMA_DCHPRI26_DPA_SHIFT    (6U)
+#define DMA_DCHPRI26_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_DPA_SHIFT)) & DMA_DCHPRI26_DPA_MASK)
+#define DMA_DCHPRI26_ECP_MASK     (0x80U)
+#define DMA_DCHPRI26_ECP_SHIFT    (7U)
+#define DMA_DCHPRI26_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_ECP_SHIFT)) & DMA_DCHPRI26_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI25 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI25_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI25_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI25_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_CHPRI_SHIFT)) & DMA_DCHPRI25_CHPRI_MASK)
-#define DMA_DCHPRI25_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI25_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI25_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_GRPPRI_SHIFT)) & DMA_DCHPRI25_GRPPRI_MASK)
-#define DMA_DCHPRI25_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI25_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI25_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_DPA_SHIFT)) & DMA_DCHPRI25_DPA_MASK)
-#define DMA_DCHPRI25_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI25_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI25_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_ECP_SHIFT)) & DMA_DCHPRI25_ECP_MASK)
+#define DMA_DCHPRI25_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI25_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI25_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_CHPRI_SHIFT)) & DMA_DCHPRI25_CHPRI_MASK)
+#define DMA_DCHPRI25_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI25_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI25_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_GRPPRI_SHIFT)) & DMA_DCHPRI25_GRPPRI_MASK)
+#define DMA_DCHPRI25_DPA_MASK     (0x40U)
+#define DMA_DCHPRI25_DPA_SHIFT    (6U)
+#define DMA_DCHPRI25_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_DPA_SHIFT)) & DMA_DCHPRI25_DPA_MASK)
+#define DMA_DCHPRI25_ECP_MASK     (0x80U)
+#define DMA_DCHPRI25_ECP_SHIFT    (7U)
+#define DMA_DCHPRI25_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_ECP_SHIFT)) & DMA_DCHPRI25_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI24 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI24_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI24_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI24_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_CHPRI_SHIFT)) & DMA_DCHPRI24_CHPRI_MASK)
-#define DMA_DCHPRI24_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI24_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI24_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_GRPPRI_SHIFT)) & DMA_DCHPRI24_GRPPRI_MASK)
-#define DMA_DCHPRI24_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI24_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI24_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_DPA_SHIFT)) & DMA_DCHPRI24_DPA_MASK)
-#define DMA_DCHPRI24_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI24_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI24_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_ECP_SHIFT)) & DMA_DCHPRI24_ECP_MASK)
+#define DMA_DCHPRI24_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI24_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI24_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_CHPRI_SHIFT)) & DMA_DCHPRI24_CHPRI_MASK)
+#define DMA_DCHPRI24_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI24_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI24_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_GRPPRI_SHIFT)) & DMA_DCHPRI24_GRPPRI_MASK)
+#define DMA_DCHPRI24_DPA_MASK     (0x40U)
+#define DMA_DCHPRI24_DPA_SHIFT    (6U)
+#define DMA_DCHPRI24_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_DPA_SHIFT)) & DMA_DCHPRI24_DPA_MASK)
+#define DMA_DCHPRI24_ECP_MASK     (0x80U)
+#define DMA_DCHPRI24_ECP_SHIFT    (7U)
+#define DMA_DCHPRI24_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_ECP_SHIFT)) & DMA_DCHPRI24_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI31 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI31_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI31_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI31_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_CHPRI_SHIFT)) & DMA_DCHPRI31_CHPRI_MASK)
-#define DMA_DCHPRI31_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI31_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI31_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_GRPPRI_SHIFT)) & DMA_DCHPRI31_GRPPRI_MASK)
-#define DMA_DCHPRI31_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI31_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI31_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_DPA_SHIFT)) & DMA_DCHPRI31_DPA_MASK)
-#define DMA_DCHPRI31_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI31_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI31_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_ECP_SHIFT)) & DMA_DCHPRI31_ECP_MASK)
+#define DMA_DCHPRI31_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI31_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI31_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_CHPRI_SHIFT)) & DMA_DCHPRI31_CHPRI_MASK)
+#define DMA_DCHPRI31_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI31_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI31_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_GRPPRI_SHIFT)) & DMA_DCHPRI31_GRPPRI_MASK)
+#define DMA_DCHPRI31_DPA_MASK     (0x40U)
+#define DMA_DCHPRI31_DPA_SHIFT    (6U)
+#define DMA_DCHPRI31_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_DPA_SHIFT)) & DMA_DCHPRI31_DPA_MASK)
+#define DMA_DCHPRI31_ECP_MASK     (0x80U)
+#define DMA_DCHPRI31_ECP_SHIFT    (7U)
+#define DMA_DCHPRI31_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_ECP_SHIFT)) & DMA_DCHPRI31_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI30 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI30_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI30_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI30_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_CHPRI_SHIFT)) & DMA_DCHPRI30_CHPRI_MASK)
-#define DMA_DCHPRI30_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI30_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI30_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_GRPPRI_SHIFT)) & DMA_DCHPRI30_GRPPRI_MASK)
-#define DMA_DCHPRI30_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI30_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI30_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_DPA_SHIFT)) & DMA_DCHPRI30_DPA_MASK)
-#define DMA_DCHPRI30_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI30_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI30_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_ECP_SHIFT)) & DMA_DCHPRI30_ECP_MASK)
+#define DMA_DCHPRI30_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI30_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI30_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_CHPRI_SHIFT)) & DMA_DCHPRI30_CHPRI_MASK)
+#define DMA_DCHPRI30_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI30_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI30_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_GRPPRI_SHIFT)) & DMA_DCHPRI30_GRPPRI_MASK)
+#define DMA_DCHPRI30_DPA_MASK     (0x40U)
+#define DMA_DCHPRI30_DPA_SHIFT    (6U)
+#define DMA_DCHPRI30_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_DPA_SHIFT)) & DMA_DCHPRI30_DPA_MASK)
+#define DMA_DCHPRI30_ECP_MASK     (0x80U)
+#define DMA_DCHPRI30_ECP_SHIFT    (7U)
+#define DMA_DCHPRI30_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_ECP_SHIFT)) & DMA_DCHPRI30_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI29 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI29_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI29_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI29_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_CHPRI_SHIFT)) & DMA_DCHPRI29_CHPRI_MASK)
-#define DMA_DCHPRI29_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI29_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI29_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_GRPPRI_SHIFT)) & DMA_DCHPRI29_GRPPRI_MASK)
-#define DMA_DCHPRI29_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI29_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI29_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_DPA_SHIFT)) & DMA_DCHPRI29_DPA_MASK)
-#define DMA_DCHPRI29_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI29_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI29_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_ECP_SHIFT)) & DMA_DCHPRI29_ECP_MASK)
+#define DMA_DCHPRI29_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI29_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI29_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_CHPRI_SHIFT)) & DMA_DCHPRI29_CHPRI_MASK)
+#define DMA_DCHPRI29_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI29_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI29_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_GRPPRI_SHIFT)) & DMA_DCHPRI29_GRPPRI_MASK)
+#define DMA_DCHPRI29_DPA_MASK     (0x40U)
+#define DMA_DCHPRI29_DPA_SHIFT    (6U)
+#define DMA_DCHPRI29_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_DPA_SHIFT)) & DMA_DCHPRI29_DPA_MASK)
+#define DMA_DCHPRI29_ECP_MASK     (0x80U)
+#define DMA_DCHPRI29_ECP_SHIFT    (7U)
+#define DMA_DCHPRI29_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_ECP_SHIFT)) & DMA_DCHPRI29_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI28 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI28_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI28_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI28_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_CHPRI_SHIFT)) & DMA_DCHPRI28_CHPRI_MASK)
-#define DMA_DCHPRI28_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI28_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI28_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_GRPPRI_SHIFT)) & DMA_DCHPRI28_GRPPRI_MASK)
-#define DMA_DCHPRI28_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI28_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI28_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_DPA_SHIFT)) & DMA_DCHPRI28_DPA_MASK)
-#define DMA_DCHPRI28_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI28_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI28_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_ECP_SHIFT)) & DMA_DCHPRI28_ECP_MASK)
+#define DMA_DCHPRI28_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI28_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI28_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_CHPRI_SHIFT)) & DMA_DCHPRI28_CHPRI_MASK)
+#define DMA_DCHPRI28_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI28_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI28_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_GRPPRI_SHIFT)) & DMA_DCHPRI28_GRPPRI_MASK)
+#define DMA_DCHPRI28_DPA_MASK     (0x40U)
+#define DMA_DCHPRI28_DPA_SHIFT    (6U)
+#define DMA_DCHPRI28_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_DPA_SHIFT)) & DMA_DCHPRI28_DPA_MASK)
+#define DMA_DCHPRI28_ECP_MASK     (0x80U)
+#define DMA_DCHPRI28_ECP_SHIFT    (7U)
+#define DMA_DCHPRI28_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_ECP_SHIFT)) & DMA_DCHPRI28_ECP_MASK)
 /*! @} */
 
 /*! @name SADDR - TCD Source Address */
 /*! @{ */
-#define DMA_SADDR_SADDR_MASK                     (0xFFFFFFFFU)
-#define DMA_SADDR_SADDR_SHIFT                    (0U)
-#define DMA_SADDR_SADDR(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_SADDR_SADDR_SHIFT)) & DMA_SADDR_SADDR_MASK)
+#define DMA_SADDR_SADDR_MASK  (0xFFFFFFFFU)
+#define DMA_SADDR_SADDR_SHIFT (0U)
+#define DMA_SADDR_SADDR(x)    (((uint32_t)(((uint32_t)(x)) << DMA_SADDR_SADDR_SHIFT)) & DMA_SADDR_SADDR_MASK)
 /*! @} */
 
 /* The count of DMA_SADDR */
-#define DMA_SADDR_COUNT                          (32U)
+#define DMA_SADDR_COUNT (32U)
 
 /*! @name SOFF - TCD Signed Source Address Offset */
 /*! @{ */
-#define DMA_SOFF_SOFF_MASK                       (0xFFFFU)
-#define DMA_SOFF_SOFF_SHIFT                      (0U)
-#define DMA_SOFF_SOFF(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_SOFF_SOFF_SHIFT)) & DMA_SOFF_SOFF_MASK)
+#define DMA_SOFF_SOFF_MASK  (0xFFFFU)
+#define DMA_SOFF_SOFF_SHIFT (0U)
+#define DMA_SOFF_SOFF(x)    (((uint16_t)(((uint16_t)(x)) << DMA_SOFF_SOFF_SHIFT)) & DMA_SOFF_SOFF_MASK)
 /*! @} */
 
 /* The count of DMA_SOFF */
-#define DMA_SOFF_COUNT                           (32U)
+#define DMA_SOFF_COUNT (32U)
 
 /*! @name ATTR - TCD Transfer Attributes */
 /*! @{ */
-#define DMA_ATTR_DSIZE_MASK                      (0x7U)
-#define DMA_ATTR_DSIZE_SHIFT                     (0U)
-#define DMA_ATTR_DSIZE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DSIZE_SHIFT)) & DMA_ATTR_DSIZE_MASK)
-#define DMA_ATTR_DMOD_MASK                       (0xF8U)
-#define DMA_ATTR_DMOD_SHIFT                      (3U)
-#define DMA_ATTR_DMOD(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DMOD_SHIFT)) & DMA_ATTR_DMOD_MASK)
-#define DMA_ATTR_SSIZE_MASK                      (0x700U)
-#define DMA_ATTR_SSIZE_SHIFT                     (8U)
-#define DMA_ATTR_SSIZE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SSIZE_SHIFT)) & DMA_ATTR_SSIZE_MASK)
-#define DMA_ATTR_SMOD_MASK                       (0xF800U)
-#define DMA_ATTR_SMOD_SHIFT                      (11U)
-#define DMA_ATTR_SMOD(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SMOD_SHIFT)) & DMA_ATTR_SMOD_MASK)
+#define DMA_ATTR_DSIZE_MASK  (0x7U)
+#define DMA_ATTR_DSIZE_SHIFT (0U)
+#define DMA_ATTR_DSIZE(x)    (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DSIZE_SHIFT)) & DMA_ATTR_DSIZE_MASK)
+#define DMA_ATTR_DMOD_MASK   (0xF8U)
+#define DMA_ATTR_DMOD_SHIFT  (3U)
+#define DMA_ATTR_DMOD(x)     (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DMOD_SHIFT)) & DMA_ATTR_DMOD_MASK)
+#define DMA_ATTR_SSIZE_MASK  (0x700U)
+#define DMA_ATTR_SSIZE_SHIFT (8U)
+#define DMA_ATTR_SSIZE(x)    (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SSIZE_SHIFT)) & DMA_ATTR_SSIZE_MASK)
+#define DMA_ATTR_SMOD_MASK   (0xF800U)
+#define DMA_ATTR_SMOD_SHIFT  (11U)
+#define DMA_ATTR_SMOD(x)     (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SMOD_SHIFT)) & DMA_ATTR_SMOD_MASK)
 /*! @} */
 
 /* The count of DMA_ATTR */
-#define DMA_ATTR_COUNT                           (32U)
+#define DMA_ATTR_COUNT (32U)
 
 /*! @name NBYTES_MLNO - TCD Minor Byte Count (Minor Loop Mapping Disabled) */
 /*! @{ */
-#define DMA_NBYTES_MLNO_NBYTES_MASK              (0xFFFFFFFFU)
-#define DMA_NBYTES_MLNO_NBYTES_SHIFT             (0U)
-#define DMA_NBYTES_MLNO_NBYTES(x)                (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLNO_NBYTES_SHIFT)) & DMA_NBYTES_MLNO_NBYTES_MASK)
+#define DMA_NBYTES_MLNO_NBYTES_MASK  (0xFFFFFFFFU)
+#define DMA_NBYTES_MLNO_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLNO_NBYTES(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLNO_NBYTES_SHIFT)) & DMA_NBYTES_MLNO_NBYTES_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLNO */
-#define DMA_NBYTES_MLNO_COUNT                    (32U)
+#define DMA_NBYTES_MLNO_COUNT (32U)
 
 /*! @name NBYTES_MLOFFNO - TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled) */
 /*! @{ */
-#define DMA_NBYTES_MLOFFNO_NBYTES_MASK           (0x3FFFFFFFU)
-#define DMA_NBYTES_MLOFFNO_NBYTES_SHIFT          (0U)
-#define DMA_NBYTES_MLOFFNO_NBYTES(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFNO_NBYTES_MASK)
-#define DMA_NBYTES_MLOFFNO_DMLOE_MASK            (0x40000000U)
-#define DMA_NBYTES_MLOFFNO_DMLOE_SHIFT           (30U)
-#define DMA_NBYTES_MLOFFNO_DMLOE(x)              (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_DMLOE_MASK)
-#define DMA_NBYTES_MLOFFNO_SMLOE_MASK            (0x80000000U)
-#define DMA_NBYTES_MLOFFNO_SMLOE_SHIFT           (31U)
-#define DMA_NBYTES_MLOFFNO_SMLOE(x)              (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_SMLOE_MASK)
+#define DMA_NBYTES_MLOFFNO_NBYTES_MASK  (0x3FFFFFFFU)
+#define DMA_NBYTES_MLOFFNO_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLOFFNO_NBYTES(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFNO_NBYTES_MASK)
+#define DMA_NBYTES_MLOFFNO_DMLOE_MASK  (0x40000000U)
+#define DMA_NBYTES_MLOFFNO_DMLOE_SHIFT (30U)
+#define DMA_NBYTES_MLOFFNO_DMLOE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_DMLOE_MASK)
+#define DMA_NBYTES_MLOFFNO_SMLOE_MASK  (0x80000000U)
+#define DMA_NBYTES_MLOFFNO_SMLOE_SHIFT (31U)
+#define DMA_NBYTES_MLOFFNO_SMLOE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_SMLOE_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLOFFNO */
-#define DMA_NBYTES_MLOFFNO_COUNT                 (32U)
+#define DMA_NBYTES_MLOFFNO_COUNT (32U)
 
 /*! @name NBYTES_MLOFFYES - TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled) */
 /*! @{ */
-#define DMA_NBYTES_MLOFFYES_NBYTES_MASK          (0x3FFU)
-#define DMA_NBYTES_MLOFFYES_NBYTES_SHIFT         (0U)
-#define DMA_NBYTES_MLOFFYES_NBYTES(x)            (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFYES_NBYTES_MASK)
-#define DMA_NBYTES_MLOFFYES_MLOFF_MASK           (0x3FFFFC00U)
-#define DMA_NBYTES_MLOFFYES_MLOFF_SHIFT          (10U)
-#define DMA_NBYTES_MLOFFYES_MLOFF(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_MLOFF_SHIFT)) & DMA_NBYTES_MLOFFYES_MLOFF_MASK)
-#define DMA_NBYTES_MLOFFYES_DMLOE_MASK           (0x40000000U)
-#define DMA_NBYTES_MLOFFYES_DMLOE_SHIFT          (30U)
-#define DMA_NBYTES_MLOFFYES_DMLOE(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_DMLOE_MASK)
-#define DMA_NBYTES_MLOFFYES_SMLOE_MASK           (0x80000000U)
-#define DMA_NBYTES_MLOFFYES_SMLOE_SHIFT          (31U)
-#define DMA_NBYTES_MLOFFYES_SMLOE(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_SMLOE_MASK)
+#define DMA_NBYTES_MLOFFYES_NBYTES_MASK  (0x3FFU)
+#define DMA_NBYTES_MLOFFYES_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLOFFYES_NBYTES(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFYES_NBYTES_MASK)
+#define DMA_NBYTES_MLOFFYES_MLOFF_MASK  (0x3FFFFC00U)
+#define DMA_NBYTES_MLOFFYES_MLOFF_SHIFT (10U)
+#define DMA_NBYTES_MLOFFYES_MLOFF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_MLOFF_SHIFT)) & DMA_NBYTES_MLOFFYES_MLOFF_MASK)
+#define DMA_NBYTES_MLOFFYES_DMLOE_MASK  (0x40000000U)
+#define DMA_NBYTES_MLOFFYES_DMLOE_SHIFT (30U)
+#define DMA_NBYTES_MLOFFYES_DMLOE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_DMLOE_MASK)
+#define DMA_NBYTES_MLOFFYES_SMLOE_MASK  (0x80000000U)
+#define DMA_NBYTES_MLOFFYES_SMLOE_SHIFT (31U)
+#define DMA_NBYTES_MLOFFYES_SMLOE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_SMLOE_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLOFFYES */
-#define DMA_NBYTES_MLOFFYES_COUNT                (32U)
+#define DMA_NBYTES_MLOFFYES_COUNT (32U)
 
 /*! @name SLAST - TCD Last Source Address Adjustment */
 /*! @{ */
-#define DMA_SLAST_SLAST_MASK                     (0xFFFFFFFFU)
-#define DMA_SLAST_SLAST_SHIFT                    (0U)
-#define DMA_SLAST_SLAST(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_SLAST_SLAST_SHIFT)) & DMA_SLAST_SLAST_MASK)
+#define DMA_SLAST_SLAST_MASK  (0xFFFFFFFFU)
+#define DMA_SLAST_SLAST_SHIFT (0U)
+#define DMA_SLAST_SLAST(x)    (((uint32_t)(((uint32_t)(x)) << DMA_SLAST_SLAST_SHIFT)) & DMA_SLAST_SLAST_MASK)
 /*! @} */
 
 /* The count of DMA_SLAST */
-#define DMA_SLAST_COUNT                          (32U)
+#define DMA_SLAST_COUNT (32U)
 
 /*! @name DADDR - TCD Destination Address */
 /*! @{ */
-#define DMA_DADDR_DADDR_MASK                     (0xFFFFFFFFU)
-#define DMA_DADDR_DADDR_SHIFT                    (0U)
-#define DMA_DADDR_DADDR(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_DADDR_DADDR_SHIFT)) & DMA_DADDR_DADDR_MASK)
+#define DMA_DADDR_DADDR_MASK  (0xFFFFFFFFU)
+#define DMA_DADDR_DADDR_SHIFT (0U)
+#define DMA_DADDR_DADDR(x)    (((uint32_t)(((uint32_t)(x)) << DMA_DADDR_DADDR_SHIFT)) & DMA_DADDR_DADDR_MASK)
 /*! @} */
 
 /* The count of DMA_DADDR */
-#define DMA_DADDR_COUNT                          (32U)
+#define DMA_DADDR_COUNT (32U)
 
 /*! @name DOFF - TCD Signed Destination Address Offset */
 /*! @{ */
-#define DMA_DOFF_DOFF_MASK                       (0xFFFFU)
-#define DMA_DOFF_DOFF_SHIFT                      (0U)
-#define DMA_DOFF_DOFF(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_DOFF_DOFF_SHIFT)) & DMA_DOFF_DOFF_MASK)
+#define DMA_DOFF_DOFF_MASK  (0xFFFFU)
+#define DMA_DOFF_DOFF_SHIFT (0U)
+#define DMA_DOFF_DOFF(x)    (((uint16_t)(((uint16_t)(x)) << DMA_DOFF_DOFF_SHIFT)) & DMA_DOFF_DOFF_MASK)
 /*! @} */
 
 /* The count of DMA_DOFF */
-#define DMA_DOFF_COUNT                           (32U)
+#define DMA_DOFF_COUNT (32U)
 
 /*! @name CITER_ELINKNO - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled) */
 /*! @{ */
-#define DMA_CITER_ELINKNO_CITER_MASK             (0x7FFFU)
-#define DMA_CITER_ELINKNO_CITER_SHIFT            (0U)
-#define DMA_CITER_ELINKNO_CITER(x)               (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_CITER_SHIFT)) & DMA_CITER_ELINKNO_CITER_MASK)
-#define DMA_CITER_ELINKNO_ELINK_MASK             (0x8000U)
-#define DMA_CITER_ELINKNO_ELINK_SHIFT            (15U)
-#define DMA_CITER_ELINKNO_ELINK(x)               (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_ELINK_SHIFT)) & DMA_CITER_ELINKNO_ELINK_MASK)
+#define DMA_CITER_ELINKNO_CITER_MASK  (0x7FFFU)
+#define DMA_CITER_ELINKNO_CITER_SHIFT (0U)
+#define DMA_CITER_ELINKNO_CITER(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_CITER_SHIFT)) & DMA_CITER_ELINKNO_CITER_MASK)
+#define DMA_CITER_ELINKNO_ELINK_MASK  (0x8000U)
+#define DMA_CITER_ELINKNO_ELINK_SHIFT (15U)
+#define DMA_CITER_ELINKNO_ELINK(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_ELINK_SHIFT)) & DMA_CITER_ELINKNO_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_CITER_ELINKNO */
-#define DMA_CITER_ELINKNO_COUNT                  (32U)
+#define DMA_CITER_ELINKNO_COUNT (32U)
 
 /*! @name CITER_ELINKYES - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled) */
 /*! @{ */
-#define DMA_CITER_ELINKYES_CITER_MASK            (0x1FFU)
-#define DMA_CITER_ELINKYES_CITER_SHIFT           (0U)
-#define DMA_CITER_ELINKYES_CITER(x)              (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_CITER_SHIFT)) & DMA_CITER_ELINKYES_CITER_MASK)
-#define DMA_CITER_ELINKYES_LINKCH_MASK           (0x3E00U)
-#define DMA_CITER_ELINKYES_LINKCH_SHIFT          (9U)
-#define DMA_CITER_ELINKYES_LINKCH(x)             (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_LINKCH_SHIFT)) & DMA_CITER_ELINKYES_LINKCH_MASK)
-#define DMA_CITER_ELINKYES_ELINK_MASK            (0x8000U)
-#define DMA_CITER_ELINKYES_ELINK_SHIFT           (15U)
-#define DMA_CITER_ELINKYES_ELINK(x)              (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_ELINK_SHIFT)) & DMA_CITER_ELINKYES_ELINK_MASK)
+#define DMA_CITER_ELINKYES_CITER_MASK  (0x1FFU)
+#define DMA_CITER_ELINKYES_CITER_SHIFT (0U)
+#define DMA_CITER_ELINKYES_CITER(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_CITER_SHIFT)) & DMA_CITER_ELINKYES_CITER_MASK)
+#define DMA_CITER_ELINKYES_LINKCH_MASK  (0x3E00U)
+#define DMA_CITER_ELINKYES_LINKCH_SHIFT (9U)
+#define DMA_CITER_ELINKYES_LINKCH(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_LINKCH_SHIFT)) & DMA_CITER_ELINKYES_LINKCH_MASK)
+#define DMA_CITER_ELINKYES_ELINK_MASK  (0x8000U)
+#define DMA_CITER_ELINKYES_ELINK_SHIFT (15U)
+#define DMA_CITER_ELINKYES_ELINK(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_ELINK_SHIFT)) & DMA_CITER_ELINKYES_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_CITER_ELINKYES */
-#define DMA_CITER_ELINKYES_COUNT                 (32U)
+#define DMA_CITER_ELINKYES_COUNT (32U)
 
 /*! @name DLAST_SGA - TCD Last Destination Address Adjustment/Scatter Gather Address */
 /*! @{ */
-#define DMA_DLAST_SGA_DLASTSGA_MASK              (0xFFFFFFFFU)
-#define DMA_DLAST_SGA_DLASTSGA_SHIFT             (0U)
-#define DMA_DLAST_SGA_DLASTSGA(x)                (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
+#define DMA_DLAST_SGA_DLASTSGA_MASK  (0xFFFFFFFFU)
+#define DMA_DLAST_SGA_DLASTSGA_SHIFT (0U)
+#define DMA_DLAST_SGA_DLASTSGA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
 /*! @} */
 
 /* The count of DMA_DLAST_SGA */
-#define DMA_DLAST_SGA_COUNT                      (32U)
+#define DMA_DLAST_SGA_COUNT (32U)
 
 /*! @name CSR - TCD Control and Status */
 /*! @{ */
-#define DMA_CSR_START_MASK                       (0x1U)
-#define DMA_CSR_START_SHIFT                      (0U)
-#define DMA_CSR_START(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_CSR_START_SHIFT)) & DMA_CSR_START_MASK)
-#define DMA_CSR_INTMAJOR_MASK                    (0x2U)
-#define DMA_CSR_INTMAJOR_SHIFT                   (1U)
-#define DMA_CSR_INTMAJOR(x)                      (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTMAJOR_SHIFT)) & DMA_CSR_INTMAJOR_MASK)
-#define DMA_CSR_INTHALF_MASK                     (0x4U)
-#define DMA_CSR_INTHALF_SHIFT                    (2U)
-#define DMA_CSR_INTHALF(x)                       (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTHALF_SHIFT)) & DMA_CSR_INTHALF_MASK)
-#define DMA_CSR_DREQ_MASK                        (0x8U)
-#define DMA_CSR_DREQ_SHIFT                       (3U)
-#define DMA_CSR_DREQ(x)                          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DREQ_SHIFT)) & DMA_CSR_DREQ_MASK)
-#define DMA_CSR_ESG_MASK                         (0x10U)
-#define DMA_CSR_ESG_SHIFT                        (4U)
-#define DMA_CSR_ESG(x)                           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ESG_SHIFT)) & DMA_CSR_ESG_MASK)
-#define DMA_CSR_MAJORELINK_MASK                  (0x20U)
-#define DMA_CSR_MAJORELINK_SHIFT                 (5U)
-#define DMA_CSR_MAJORELINK(x)                    (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORELINK_SHIFT)) & DMA_CSR_MAJORELINK_MASK)
-#define DMA_CSR_ACTIVE_MASK                      (0x40U)
-#define DMA_CSR_ACTIVE_SHIFT                     (6U)
-#define DMA_CSR_ACTIVE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ACTIVE_SHIFT)) & DMA_CSR_ACTIVE_MASK)
-#define DMA_CSR_DONE_MASK                        (0x80U)
-#define DMA_CSR_DONE_SHIFT                       (7U)
-#define DMA_CSR_DONE(x)                          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)
-#define DMA_CSR_MAJORLINKCH_MASK                 (0x1F00U)
-#define DMA_CSR_MAJORLINKCH_SHIFT                (8U)
-#define DMA_CSR_MAJORLINKCH(x)                   (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORLINKCH_SHIFT)) & DMA_CSR_MAJORLINKCH_MASK)
-#define DMA_CSR_BWC_MASK                         (0xC000U)
-#define DMA_CSR_BWC_SHIFT                        (14U)
-#define DMA_CSR_BWC(x)                           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_BWC_SHIFT)) & DMA_CSR_BWC_MASK)
+#define DMA_CSR_START_MASK        (0x1U)
+#define DMA_CSR_START_SHIFT       (0U)
+#define DMA_CSR_START(x)          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_START_SHIFT)) & DMA_CSR_START_MASK)
+#define DMA_CSR_INTMAJOR_MASK     (0x2U)
+#define DMA_CSR_INTMAJOR_SHIFT    (1U)
+#define DMA_CSR_INTMAJOR(x)       (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTMAJOR_SHIFT)) & DMA_CSR_INTMAJOR_MASK)
+#define DMA_CSR_INTHALF_MASK      (0x4U)
+#define DMA_CSR_INTHALF_SHIFT     (2U)
+#define DMA_CSR_INTHALF(x)        (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTHALF_SHIFT)) & DMA_CSR_INTHALF_MASK)
+#define DMA_CSR_DREQ_MASK         (0x8U)
+#define DMA_CSR_DREQ_SHIFT        (3U)
+#define DMA_CSR_DREQ(x)           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DREQ_SHIFT)) & DMA_CSR_DREQ_MASK)
+#define DMA_CSR_ESG_MASK          (0x10U)
+#define DMA_CSR_ESG_SHIFT         (4U)
+#define DMA_CSR_ESG(x)            (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ESG_SHIFT)) & DMA_CSR_ESG_MASK)
+#define DMA_CSR_MAJORELINK_MASK   (0x20U)
+#define DMA_CSR_MAJORELINK_SHIFT  (5U)
+#define DMA_CSR_MAJORELINK(x)     (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORELINK_SHIFT)) & DMA_CSR_MAJORELINK_MASK)
+#define DMA_CSR_ACTIVE_MASK       (0x40U)
+#define DMA_CSR_ACTIVE_SHIFT      (6U)
+#define DMA_CSR_ACTIVE(x)         (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ACTIVE_SHIFT)) & DMA_CSR_ACTIVE_MASK)
+#define DMA_CSR_DONE_MASK         (0x80U)
+#define DMA_CSR_DONE_SHIFT        (7U)
+#define DMA_CSR_DONE(x)           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)
+#define DMA_CSR_MAJORLINKCH_MASK  (0x1F00U)
+#define DMA_CSR_MAJORLINKCH_SHIFT (8U)
+#define DMA_CSR_MAJORLINKCH(x)    (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORLINKCH_SHIFT)) & DMA_CSR_MAJORLINKCH_MASK)
+#define DMA_CSR_BWC_MASK          (0xC000U)
+#define DMA_CSR_BWC_SHIFT         (14U)
+#define DMA_CSR_BWC(x)            (((uint16_t)(((uint16_t)(x)) << DMA_CSR_BWC_SHIFT)) & DMA_CSR_BWC_MASK)
 /*! @} */
 
 /* The count of DMA_CSR */
-#define DMA_CSR_COUNT                            (32U)
+#define DMA_CSR_COUNT (32U)
 
 /*! @name BITER_ELINKNO - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled) */
 /*! @{ */
-#define DMA_BITER_ELINKNO_BITER_MASK             (0x7FFFU)
-#define DMA_BITER_ELINKNO_BITER_SHIFT            (0U)
-#define DMA_BITER_ELINKNO_BITER(x)               (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_BITER_SHIFT)) & DMA_BITER_ELINKNO_BITER_MASK)
-#define DMA_BITER_ELINKNO_ELINK_MASK             (0x8000U)
-#define DMA_BITER_ELINKNO_ELINK_SHIFT            (15U)
-#define DMA_BITER_ELINKNO_ELINK(x)               (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_ELINK_SHIFT)) & DMA_BITER_ELINKNO_ELINK_MASK)
+#define DMA_BITER_ELINKNO_BITER_MASK  (0x7FFFU)
+#define DMA_BITER_ELINKNO_BITER_SHIFT (0U)
+#define DMA_BITER_ELINKNO_BITER(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_BITER_SHIFT)) & DMA_BITER_ELINKNO_BITER_MASK)
+#define DMA_BITER_ELINKNO_ELINK_MASK  (0x8000U)
+#define DMA_BITER_ELINKNO_ELINK_SHIFT (15U)
+#define DMA_BITER_ELINKNO_ELINK(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_ELINK_SHIFT)) & DMA_BITER_ELINKNO_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_BITER_ELINKNO */
-#define DMA_BITER_ELINKNO_COUNT                  (32U)
+#define DMA_BITER_ELINKNO_COUNT (32U)
 
 /*! @name BITER_ELINKYES - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled) */
 /*! @{ */
-#define DMA_BITER_ELINKYES_BITER_MASK            (0x1FFU)
-#define DMA_BITER_ELINKYES_BITER_SHIFT           (0U)
-#define DMA_BITER_ELINKYES_BITER(x)              (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_BITER_SHIFT)) & DMA_BITER_ELINKYES_BITER_MASK)
-#define DMA_BITER_ELINKYES_LINKCH_MASK           (0x3E00U)
-#define DMA_BITER_ELINKYES_LINKCH_SHIFT          (9U)
-#define DMA_BITER_ELINKYES_LINKCH(x)             (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_LINKCH_SHIFT)) & DMA_BITER_ELINKYES_LINKCH_MASK)
-#define DMA_BITER_ELINKYES_ELINK_MASK            (0x8000U)
-#define DMA_BITER_ELINKYES_ELINK_SHIFT           (15U)
-#define DMA_BITER_ELINKYES_ELINK(x)              (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_ELINK_SHIFT)) & DMA_BITER_ELINKYES_ELINK_MASK)
+#define DMA_BITER_ELINKYES_BITER_MASK  (0x1FFU)
+#define DMA_BITER_ELINKYES_BITER_SHIFT (0U)
+#define DMA_BITER_ELINKYES_BITER(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_BITER_SHIFT)) & DMA_BITER_ELINKYES_BITER_MASK)
+#define DMA_BITER_ELINKYES_LINKCH_MASK  (0x3E00U)
+#define DMA_BITER_ELINKYES_LINKCH_SHIFT (9U)
+#define DMA_BITER_ELINKYES_LINKCH(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_LINKCH_SHIFT)) & DMA_BITER_ELINKYES_LINKCH_MASK)
+#define DMA_BITER_ELINKYES_ELINK_MASK  (0x8000U)
+#define DMA_BITER_ELINKYES_ELINK_SHIFT (15U)
+#define DMA_BITER_ELINKYES_ELINK(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_ELINK_SHIFT)) & DMA_BITER_ELINKYES_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_BITER_ELINKYES */
-#define DMA_BITER_ELINKYES_COUNT                 (32U)
-
+#define DMA_BITER_ELINKYES_COUNT (32U)
 
 /*!
  * @}
  */ /* end of group DMA_Register_Masks */
 
-
 /* DMA - Peripheral instance base addresses */
 /** Peripheral DMA0 base address */
-#define DMA0_BASE                                (0x400E8000u)
+#define DMA0_BASE (0x400E8000u)
 /** Peripheral DMA0 base pointer */
-#define DMA0                                     ((DMA_Type *)DMA0_BASE)
+#define DMA0 ((DMA_Type *)DMA0_BASE)
 /** Array initializer of DMA peripheral base addresses */
-#define DMA_BASE_ADDRS                           { DMA0_BASE }
+#define DMA_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        DMA0_BASE                                                                                                      \
+    }
 /** Array initializer of DMA peripheral base pointers */
-#define DMA_BASE_PTRS                            { DMA0 }
+#define DMA_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        DMA0                                                                                                           \
+    }
 /** Interrupt vectors for the DMA peripheral type */
-#define DMA_CHN_IRQS                             { { DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn, DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn } }
-#define DMA_ERROR_IRQS                           { DMA_ERROR_IRQn }
+#define DMA_CHN_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {                                                                                                              \
+            DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn,      \
+                DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn,                  \
+                DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn,              \
+                DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn,  \
+                DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn,                  \
+                DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn               \
+        }                                                                                                              \
+    }
+#define DMA_ERROR_IRQS                                                                                                 \
+    {                                                                                                                  \
+        DMA_ERROR_IRQn                                                                                                 \
+    }
 
 /*!
  * @}
  */ /* end of group DMA_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DMAMUX Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8596,8 +9905,10 @@ typedef struct {
  */
 
 /** DMAMUX - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CHCFG[32];                         /**< Channel 0 Configuration Register..Channel 31 Configuration Register, array offset: 0x0, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t CHCFG[32]; /**< Channel 0 Configuration Register..Channel 31 Configuration Register, array offset:
+                                0x0, array step: 0x4 */
 } DMAMUX_Type;
 
 /* ----------------------------------------------------------------------------
@@ -8611,44 +9922,47 @@ typedef struct {
 
 /*! @name CHCFG - Channel 0 Configuration Register..Channel 31 Configuration Register */
 /*! @{ */
-#define DMAMUX_CHCFG_SOURCE_MASK                 (0x7FU)
-#define DMAMUX_CHCFG_SOURCE_SHIFT                (0U)
-#define DMAMUX_CHCFG_SOURCE(x)                   (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
-#define DMAMUX_CHCFG_A_ON_MASK                   (0x20000000U)
-#define DMAMUX_CHCFG_A_ON_SHIFT                  (29U)
-#define DMAMUX_CHCFG_A_ON(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_A_ON_SHIFT)) & DMAMUX_CHCFG_A_ON_MASK)
-#define DMAMUX_CHCFG_TRIG_MASK                   (0x40000000U)
-#define DMAMUX_CHCFG_TRIG_SHIFT                  (30U)
-#define DMAMUX_CHCFG_TRIG(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
-#define DMAMUX_CHCFG_ENBL_MASK                   (0x80000000U)
-#define DMAMUX_CHCFG_ENBL_SHIFT                  (31U)
-#define DMAMUX_CHCFG_ENBL(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
+#define DMAMUX_CHCFG_SOURCE_MASK  (0x7FU)
+#define DMAMUX_CHCFG_SOURCE_SHIFT (0U)
+#define DMAMUX_CHCFG_SOURCE(x)    (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
+#define DMAMUX_CHCFG_A_ON_MASK    (0x20000000U)
+#define DMAMUX_CHCFG_A_ON_SHIFT   (29U)
+#define DMAMUX_CHCFG_A_ON(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_A_ON_SHIFT)) & DMAMUX_CHCFG_A_ON_MASK)
+#define DMAMUX_CHCFG_TRIG_MASK    (0x40000000U)
+#define DMAMUX_CHCFG_TRIG_SHIFT   (30U)
+#define DMAMUX_CHCFG_TRIG(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
+#define DMAMUX_CHCFG_ENBL_MASK    (0x80000000U)
+#define DMAMUX_CHCFG_ENBL_SHIFT   (31U)
+#define DMAMUX_CHCFG_ENBL(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
 /*! @} */
 
 /* The count of DMAMUX_CHCFG */
-#define DMAMUX_CHCFG_COUNT                       (32U)
-
+#define DMAMUX_CHCFG_COUNT (32U)
 
 /*!
  * @}
  */ /* end of group DMAMUX_Register_Masks */
 
-
 /* DMAMUX - Peripheral instance base addresses */
 /** Peripheral DMAMUX base address */
-#define DMAMUX_BASE                              (0x400EC000u)
+#define DMAMUX_BASE (0x400EC000u)
 /** Peripheral DMAMUX base pointer */
-#define DMAMUX                                   ((DMAMUX_Type *)DMAMUX_BASE)
+#define DMAMUX ((DMAMUX_Type *)DMAMUX_BASE)
 /** Array initializer of DMAMUX peripheral base addresses */
-#define DMAMUX_BASE_ADDRS                        { DMAMUX_BASE }
+#define DMAMUX_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        DMAMUX_BASE                                                                                                    \
+    }
 /** Array initializer of DMAMUX peripheral base pointers */
-#define DMAMUX_BASE_PTRS                         { DMAMUX }
+#define DMAMUX_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        DMAMUX                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group DMAMUX_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ENC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8659,27 +9973,28 @@ typedef struct {
  */
 
 /** ENC - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t CTRL;                              /**< Control Register, offset: 0x0 */
-  __IO uint16_t FILT;                              /**< Input Filter Register, offset: 0x2 */
-  __IO uint16_t WTR;                               /**< Watchdog Timeout Register, offset: 0x4 */
-  __IO uint16_t POSD;                              /**< Position Difference Counter Register, offset: 0x6 */
-  __I  uint16_t POSDH;                             /**< Position Difference Hold Register, offset: 0x8 */
-  __IO uint16_t REV;                               /**< Revolution Counter Register, offset: 0xA */
-  __I  uint16_t REVH;                              /**< Revolution Hold Register, offset: 0xC */
-  __IO uint16_t UPOS;                              /**< Upper Position Counter Register, offset: 0xE */
-  __IO uint16_t LPOS;                              /**< Lower Position Counter Register, offset: 0x10 */
-  __I  uint16_t UPOSH;                             /**< Upper Position Hold Register, offset: 0x12 */
-  __I  uint16_t LPOSH;                             /**< Lower Position Hold Register, offset: 0x14 */
-  __IO uint16_t UINIT;                             /**< Upper Initialization Register, offset: 0x16 */
-  __IO uint16_t LINIT;                             /**< Lower Initialization Register, offset: 0x18 */
-  __I  uint16_t IMR;                               /**< Input Monitor Register, offset: 0x1A */
-  __IO uint16_t TST;                               /**< Test Register, offset: 0x1C */
-  __IO uint16_t CTRL2;                             /**< Control 2 Register, offset: 0x1E */
-  __IO uint16_t UMOD;                              /**< Upper Modulus Register, offset: 0x20 */
-  __IO uint16_t LMOD;                              /**< Lower Modulus Register, offset: 0x22 */
-  __IO uint16_t UCOMP;                             /**< Upper Position Compare Register, offset: 0x24 */
-  __IO uint16_t LCOMP;                             /**< Lower Position Compare Register, offset: 0x26 */
+typedef struct
+{
+    __IO uint16_t CTRL;  /**< Control Register, offset: 0x0 */
+    __IO uint16_t FILT;  /**< Input Filter Register, offset: 0x2 */
+    __IO uint16_t WTR;   /**< Watchdog Timeout Register, offset: 0x4 */
+    __IO uint16_t POSD;  /**< Position Difference Counter Register, offset: 0x6 */
+    __I uint16_t POSDH;  /**< Position Difference Hold Register, offset: 0x8 */
+    __IO uint16_t REV;   /**< Revolution Counter Register, offset: 0xA */
+    __I uint16_t REVH;   /**< Revolution Hold Register, offset: 0xC */
+    __IO uint16_t UPOS;  /**< Upper Position Counter Register, offset: 0xE */
+    __IO uint16_t LPOS;  /**< Lower Position Counter Register, offset: 0x10 */
+    __I uint16_t UPOSH;  /**< Upper Position Hold Register, offset: 0x12 */
+    __I uint16_t LPOSH;  /**< Lower Position Hold Register, offset: 0x14 */
+    __IO uint16_t UINIT; /**< Upper Initialization Register, offset: 0x16 */
+    __IO uint16_t LINIT; /**< Lower Initialization Register, offset: 0x18 */
+    __I uint16_t IMR;    /**< Input Monitor Register, offset: 0x1A */
+    __IO uint16_t TST;   /**< Test Register, offset: 0x1C */
+    __IO uint16_t CTRL2; /**< Control 2 Register, offset: 0x1E */
+    __IO uint16_t UMOD;  /**< Upper Modulus Register, offset: 0x20 */
+    __IO uint16_t LMOD;  /**< Lower Modulus Register, offset: 0x22 */
+    __IO uint16_t UCOMP; /**< Upper Position Compare Register, offset: 0x24 */
+    __IO uint16_t LCOMP; /**< Lower Position Compare Register, offset: 0x26 */
 } ENC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -8693,297 +10008,315 @@ typedef struct {
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define ENC_CTRL_CMPIE_MASK                      (0x1U)
-#define ENC_CTRL_CMPIE_SHIFT                     (0U)
-#define ENC_CTRL_CMPIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)
-#define ENC_CTRL_CMPIRQ_MASK                     (0x2U)
-#define ENC_CTRL_CMPIRQ_SHIFT                    (1U)
-#define ENC_CTRL_CMPIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)
-#define ENC_CTRL_WDE_MASK                        (0x4U)
-#define ENC_CTRL_WDE_SHIFT                       (2U)
-#define ENC_CTRL_WDE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)
-#define ENC_CTRL_DIE_MASK                        (0x8U)
-#define ENC_CTRL_DIE_SHIFT                       (3U)
-#define ENC_CTRL_DIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)
-#define ENC_CTRL_DIRQ_MASK                       (0x10U)
-#define ENC_CTRL_DIRQ_SHIFT                      (4U)
-#define ENC_CTRL_DIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)
-#define ENC_CTRL_XNE_MASK                        (0x20U)
-#define ENC_CTRL_XNE_SHIFT                       (5U)
-#define ENC_CTRL_XNE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)
-#define ENC_CTRL_XIP_MASK                        (0x40U)
-#define ENC_CTRL_XIP_SHIFT                       (6U)
-#define ENC_CTRL_XIP(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)
-#define ENC_CTRL_XIE_MASK                        (0x80U)
-#define ENC_CTRL_XIE_SHIFT                       (7U)
-#define ENC_CTRL_XIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)
-#define ENC_CTRL_XIRQ_MASK                       (0x100U)
-#define ENC_CTRL_XIRQ_SHIFT                      (8U)
-#define ENC_CTRL_XIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)
-#define ENC_CTRL_PH1_MASK                        (0x200U)
-#define ENC_CTRL_PH1_SHIFT                       (9U)
-#define ENC_CTRL_PH1(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)
-#define ENC_CTRL_REV_MASK                        (0x400U)
-#define ENC_CTRL_REV_SHIFT                       (10U)
-#define ENC_CTRL_REV(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)
-#define ENC_CTRL_SWIP_MASK                       (0x800U)
-#define ENC_CTRL_SWIP_SHIFT                      (11U)
-#define ENC_CTRL_SWIP(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)
-#define ENC_CTRL_HNE_MASK                        (0x1000U)
-#define ENC_CTRL_HNE_SHIFT                       (12U)
-#define ENC_CTRL_HNE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)
-#define ENC_CTRL_HIP_MASK                        (0x2000U)
-#define ENC_CTRL_HIP_SHIFT                       (13U)
-#define ENC_CTRL_HIP(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)
-#define ENC_CTRL_HIE_MASK                        (0x4000U)
-#define ENC_CTRL_HIE_SHIFT                       (14U)
-#define ENC_CTRL_HIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)
-#define ENC_CTRL_HIRQ_MASK                       (0x8000U)
-#define ENC_CTRL_HIRQ_SHIFT                      (15U)
-#define ENC_CTRL_HIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)
+#define ENC_CTRL_CMPIE_MASK   (0x1U)
+#define ENC_CTRL_CMPIE_SHIFT  (0U)
+#define ENC_CTRL_CMPIE(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)
+#define ENC_CTRL_CMPIRQ_MASK  (0x2U)
+#define ENC_CTRL_CMPIRQ_SHIFT (1U)
+#define ENC_CTRL_CMPIRQ(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)
+#define ENC_CTRL_WDE_MASK     (0x4U)
+#define ENC_CTRL_WDE_SHIFT    (2U)
+#define ENC_CTRL_WDE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)
+#define ENC_CTRL_DIE_MASK     (0x8U)
+#define ENC_CTRL_DIE_SHIFT    (3U)
+#define ENC_CTRL_DIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)
+#define ENC_CTRL_DIRQ_MASK    (0x10U)
+#define ENC_CTRL_DIRQ_SHIFT   (4U)
+#define ENC_CTRL_DIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)
+#define ENC_CTRL_XNE_MASK     (0x20U)
+#define ENC_CTRL_XNE_SHIFT    (5U)
+#define ENC_CTRL_XNE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)
+#define ENC_CTRL_XIP_MASK     (0x40U)
+#define ENC_CTRL_XIP_SHIFT    (6U)
+#define ENC_CTRL_XIP(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)
+#define ENC_CTRL_XIE_MASK     (0x80U)
+#define ENC_CTRL_XIE_SHIFT    (7U)
+#define ENC_CTRL_XIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)
+#define ENC_CTRL_XIRQ_MASK    (0x100U)
+#define ENC_CTRL_XIRQ_SHIFT   (8U)
+#define ENC_CTRL_XIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)
+#define ENC_CTRL_PH1_MASK     (0x200U)
+#define ENC_CTRL_PH1_SHIFT    (9U)
+#define ENC_CTRL_PH1(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)
+#define ENC_CTRL_REV_MASK     (0x400U)
+#define ENC_CTRL_REV_SHIFT    (10U)
+#define ENC_CTRL_REV(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)
+#define ENC_CTRL_SWIP_MASK    (0x800U)
+#define ENC_CTRL_SWIP_SHIFT   (11U)
+#define ENC_CTRL_SWIP(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)
+#define ENC_CTRL_HNE_MASK     (0x1000U)
+#define ENC_CTRL_HNE_SHIFT    (12U)
+#define ENC_CTRL_HNE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)
+#define ENC_CTRL_HIP_MASK     (0x2000U)
+#define ENC_CTRL_HIP_SHIFT    (13U)
+#define ENC_CTRL_HIP(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)
+#define ENC_CTRL_HIE_MASK     (0x4000U)
+#define ENC_CTRL_HIE_SHIFT    (14U)
+#define ENC_CTRL_HIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)
+#define ENC_CTRL_HIRQ_MASK    (0x8000U)
+#define ENC_CTRL_HIRQ_SHIFT   (15U)
+#define ENC_CTRL_HIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)
 /*! @} */
 
 /*! @name FILT - Input Filter Register */
 /*! @{ */
-#define ENC_FILT_FILT_PER_MASK                   (0xFFU)
-#define ENC_FILT_FILT_PER_SHIFT                  (0U)
-#define ENC_FILT_FILT_PER(x)                     (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)
-#define ENC_FILT_FILT_CNT_MASK                   (0x700U)
-#define ENC_FILT_FILT_CNT_SHIFT                  (8U)
-#define ENC_FILT_FILT_CNT(x)                     (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)
+#define ENC_FILT_FILT_PER_MASK  (0xFFU)
+#define ENC_FILT_FILT_PER_SHIFT (0U)
+#define ENC_FILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)
+#define ENC_FILT_FILT_CNT_MASK  (0x700U)
+#define ENC_FILT_FILT_CNT_SHIFT (8U)
+#define ENC_FILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)
 /*! @} */
 
 /*! @name WTR - Watchdog Timeout Register */
 /*! @{ */
-#define ENC_WTR_WDOG_MASK                        (0xFFFFU)
-#define ENC_WTR_WDOG_SHIFT                       (0U)
-#define ENC_WTR_WDOG(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)
+#define ENC_WTR_WDOG_MASK  (0xFFFFU)
+#define ENC_WTR_WDOG_SHIFT (0U)
+#define ENC_WTR_WDOG(x)    (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)
 /*! @} */
 
 /*! @name POSD - Position Difference Counter Register */
 /*! @{ */
-#define ENC_POSD_POSD_MASK                       (0xFFFFU)
-#define ENC_POSD_POSD_SHIFT                      (0U)
-#define ENC_POSD_POSD(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)
+#define ENC_POSD_POSD_MASK  (0xFFFFU)
+#define ENC_POSD_POSD_SHIFT (0U)
+#define ENC_POSD_POSD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)
 /*! @} */
 
 /*! @name POSDH - Position Difference Hold Register */
 /*! @{ */
-#define ENC_POSDH_POSDH_MASK                     (0xFFFFU)
-#define ENC_POSDH_POSDH_SHIFT                    (0U)
-#define ENC_POSDH_POSDH(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)
+#define ENC_POSDH_POSDH_MASK  (0xFFFFU)
+#define ENC_POSDH_POSDH_SHIFT (0U)
+#define ENC_POSDH_POSDH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)
 /*! @} */
 
 /*! @name REV - Revolution Counter Register */
 /*! @{ */
-#define ENC_REV_REV_MASK                         (0xFFFFU)
-#define ENC_REV_REV_SHIFT                        (0U)
-#define ENC_REV_REV(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)
+#define ENC_REV_REV_MASK  (0xFFFFU)
+#define ENC_REV_REV_SHIFT (0U)
+#define ENC_REV_REV(x)    (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)
 /*! @} */
 
 /*! @name REVH - Revolution Hold Register */
 /*! @{ */
-#define ENC_REVH_REVH_MASK                       (0xFFFFU)
-#define ENC_REVH_REVH_SHIFT                      (0U)
-#define ENC_REVH_REVH(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)
+#define ENC_REVH_REVH_MASK  (0xFFFFU)
+#define ENC_REVH_REVH_SHIFT (0U)
+#define ENC_REVH_REVH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)
 /*! @} */
 
 /*! @name UPOS - Upper Position Counter Register */
 /*! @{ */
-#define ENC_UPOS_POS_MASK                        (0xFFFFU)
-#define ENC_UPOS_POS_SHIFT                       (0U)
-#define ENC_UPOS_POS(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)
+#define ENC_UPOS_POS_MASK  (0xFFFFU)
+#define ENC_UPOS_POS_SHIFT (0U)
+#define ENC_UPOS_POS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)
 /*! @} */
 
 /*! @name LPOS - Lower Position Counter Register */
 /*! @{ */
-#define ENC_LPOS_POS_MASK                        (0xFFFFU)
-#define ENC_LPOS_POS_SHIFT                       (0U)
-#define ENC_LPOS_POS(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)
+#define ENC_LPOS_POS_MASK  (0xFFFFU)
+#define ENC_LPOS_POS_SHIFT (0U)
+#define ENC_LPOS_POS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)
 /*! @} */
 
 /*! @name UPOSH - Upper Position Hold Register */
 /*! @{ */
-#define ENC_UPOSH_POSH_MASK                      (0xFFFFU)
-#define ENC_UPOSH_POSH_SHIFT                     (0U)
-#define ENC_UPOSH_POSH(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)
+#define ENC_UPOSH_POSH_MASK  (0xFFFFU)
+#define ENC_UPOSH_POSH_SHIFT (0U)
+#define ENC_UPOSH_POSH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)
 /*! @} */
 
 /*! @name LPOSH - Lower Position Hold Register */
 /*! @{ */
-#define ENC_LPOSH_POSH_MASK                      (0xFFFFU)
-#define ENC_LPOSH_POSH_SHIFT                     (0U)
-#define ENC_LPOSH_POSH(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)
+#define ENC_LPOSH_POSH_MASK  (0xFFFFU)
+#define ENC_LPOSH_POSH_SHIFT (0U)
+#define ENC_LPOSH_POSH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)
 /*! @} */
 
 /*! @name UINIT - Upper Initialization Register */
 /*! @{ */
-#define ENC_UINIT_INIT_MASK                      (0xFFFFU)
-#define ENC_UINIT_INIT_SHIFT                     (0U)
-#define ENC_UINIT_INIT(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)
+#define ENC_UINIT_INIT_MASK  (0xFFFFU)
+#define ENC_UINIT_INIT_SHIFT (0U)
+#define ENC_UINIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)
 /*! @} */
 
 /*! @name LINIT - Lower Initialization Register */
 /*! @{ */
-#define ENC_LINIT_INIT_MASK                      (0xFFFFU)
-#define ENC_LINIT_INIT_SHIFT                     (0U)
-#define ENC_LINIT_INIT(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)
+#define ENC_LINIT_INIT_MASK  (0xFFFFU)
+#define ENC_LINIT_INIT_SHIFT (0U)
+#define ENC_LINIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)
 /*! @} */
 
 /*! @name IMR - Input Monitor Register */
 /*! @{ */
-#define ENC_IMR_HOME_MASK                        (0x1U)
-#define ENC_IMR_HOME_SHIFT                       (0U)
-#define ENC_IMR_HOME(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)
-#define ENC_IMR_INDEX_MASK                       (0x2U)
-#define ENC_IMR_INDEX_SHIFT                      (1U)
-#define ENC_IMR_INDEX(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)
-#define ENC_IMR_PHB_MASK                         (0x4U)
-#define ENC_IMR_PHB_SHIFT                        (2U)
-#define ENC_IMR_PHB(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)
-#define ENC_IMR_PHA_MASK                         (0x8U)
-#define ENC_IMR_PHA_SHIFT                        (3U)
-#define ENC_IMR_PHA(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)
-#define ENC_IMR_FHOM_MASK                        (0x10U)
-#define ENC_IMR_FHOM_SHIFT                       (4U)
-#define ENC_IMR_FHOM(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)
-#define ENC_IMR_FIND_MASK                        (0x20U)
-#define ENC_IMR_FIND_SHIFT                       (5U)
-#define ENC_IMR_FIND(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)
-#define ENC_IMR_FPHB_MASK                        (0x40U)
-#define ENC_IMR_FPHB_SHIFT                       (6U)
-#define ENC_IMR_FPHB(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)
-#define ENC_IMR_FPHA_MASK                        (0x80U)
-#define ENC_IMR_FPHA_SHIFT                       (7U)
-#define ENC_IMR_FPHA(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)
+#define ENC_IMR_HOME_MASK   (0x1U)
+#define ENC_IMR_HOME_SHIFT  (0U)
+#define ENC_IMR_HOME(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)
+#define ENC_IMR_INDEX_MASK  (0x2U)
+#define ENC_IMR_INDEX_SHIFT (1U)
+#define ENC_IMR_INDEX(x)    (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)
+#define ENC_IMR_PHB_MASK    (0x4U)
+#define ENC_IMR_PHB_SHIFT   (2U)
+#define ENC_IMR_PHB(x)      (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)
+#define ENC_IMR_PHA_MASK    (0x8U)
+#define ENC_IMR_PHA_SHIFT   (3U)
+#define ENC_IMR_PHA(x)      (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)
+#define ENC_IMR_FHOM_MASK   (0x10U)
+#define ENC_IMR_FHOM_SHIFT  (4U)
+#define ENC_IMR_FHOM(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)
+#define ENC_IMR_FIND_MASK   (0x20U)
+#define ENC_IMR_FIND_SHIFT  (5U)
+#define ENC_IMR_FIND(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)
+#define ENC_IMR_FPHB_MASK   (0x40U)
+#define ENC_IMR_FPHB_SHIFT  (6U)
+#define ENC_IMR_FPHB(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)
+#define ENC_IMR_FPHA_MASK   (0x80U)
+#define ENC_IMR_FPHA_SHIFT  (7U)
+#define ENC_IMR_FPHA(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)
 /*! @} */
 
 /*! @name TST - Test Register */
 /*! @{ */
-#define ENC_TST_TEST_COUNT_MASK                  (0xFFU)
-#define ENC_TST_TEST_COUNT_SHIFT                 (0U)
-#define ENC_TST_TEST_COUNT(x)                    (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)
-#define ENC_TST_TEST_PERIOD_MASK                 (0x1F00U)
-#define ENC_TST_TEST_PERIOD_SHIFT                (8U)
-#define ENC_TST_TEST_PERIOD(x)                   (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)
-#define ENC_TST_QDN_MASK                         (0x2000U)
-#define ENC_TST_QDN_SHIFT                        (13U)
-#define ENC_TST_QDN(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)
-#define ENC_TST_TCE_MASK                         (0x4000U)
-#define ENC_TST_TCE_SHIFT                        (14U)
-#define ENC_TST_TCE(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)
-#define ENC_TST_TEN_MASK                         (0x8000U)
-#define ENC_TST_TEN_SHIFT                        (15U)
-#define ENC_TST_TEN(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)
+#define ENC_TST_TEST_COUNT_MASK   (0xFFU)
+#define ENC_TST_TEST_COUNT_SHIFT  (0U)
+#define ENC_TST_TEST_COUNT(x)     (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)
+#define ENC_TST_TEST_PERIOD_MASK  (0x1F00U)
+#define ENC_TST_TEST_PERIOD_SHIFT (8U)
+#define ENC_TST_TEST_PERIOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)
+#define ENC_TST_QDN_MASK          (0x2000U)
+#define ENC_TST_QDN_SHIFT         (13U)
+#define ENC_TST_QDN(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)
+#define ENC_TST_TCE_MASK          (0x4000U)
+#define ENC_TST_TCE_SHIFT         (14U)
+#define ENC_TST_TCE(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)
+#define ENC_TST_TEN_MASK          (0x8000U)
+#define ENC_TST_TEN_SHIFT         (15U)
+#define ENC_TST_TEN(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)
 /*! @} */
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define ENC_CTRL2_UPDHLD_MASK                    (0x1U)
-#define ENC_CTRL2_UPDHLD_SHIFT                   (0U)
-#define ENC_CTRL2_UPDHLD(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)
-#define ENC_CTRL2_UPDPOS_MASK                    (0x2U)
-#define ENC_CTRL2_UPDPOS_SHIFT                   (1U)
-#define ENC_CTRL2_UPDPOS(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)
-#define ENC_CTRL2_MOD_MASK                       (0x4U)
-#define ENC_CTRL2_MOD_SHIFT                      (2U)
-#define ENC_CTRL2_MOD(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)
-#define ENC_CTRL2_DIR_MASK                       (0x8U)
-#define ENC_CTRL2_DIR_SHIFT                      (3U)
-#define ENC_CTRL2_DIR(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)
-#define ENC_CTRL2_RUIE_MASK                      (0x10U)
-#define ENC_CTRL2_RUIE_SHIFT                     (4U)
-#define ENC_CTRL2_RUIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)
-#define ENC_CTRL2_RUIRQ_MASK                     (0x20U)
-#define ENC_CTRL2_RUIRQ_SHIFT                    (5U)
-#define ENC_CTRL2_RUIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)
-#define ENC_CTRL2_ROIE_MASK                      (0x40U)
-#define ENC_CTRL2_ROIE_SHIFT                     (6U)
-#define ENC_CTRL2_ROIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)
-#define ENC_CTRL2_ROIRQ_MASK                     (0x80U)
-#define ENC_CTRL2_ROIRQ_SHIFT                    (7U)
-#define ENC_CTRL2_ROIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)
-#define ENC_CTRL2_REVMOD_MASK                    (0x100U)
-#define ENC_CTRL2_REVMOD_SHIFT                   (8U)
-#define ENC_CTRL2_REVMOD(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)
-#define ENC_CTRL2_OUTCTL_MASK                    (0x200U)
-#define ENC_CTRL2_OUTCTL_SHIFT                   (9U)
-#define ENC_CTRL2_OUTCTL(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)
-#define ENC_CTRL2_SABIE_MASK                     (0x400U)
-#define ENC_CTRL2_SABIE_SHIFT                    (10U)
-#define ENC_CTRL2_SABIE(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)
-#define ENC_CTRL2_SABIRQ_MASK                    (0x800U)
-#define ENC_CTRL2_SABIRQ_SHIFT                   (11U)
-#define ENC_CTRL2_SABIRQ(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)
+#define ENC_CTRL2_UPDHLD_MASK  (0x1U)
+#define ENC_CTRL2_UPDHLD_SHIFT (0U)
+#define ENC_CTRL2_UPDHLD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)
+#define ENC_CTRL2_UPDPOS_MASK  (0x2U)
+#define ENC_CTRL2_UPDPOS_SHIFT (1U)
+#define ENC_CTRL2_UPDPOS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)
+#define ENC_CTRL2_MOD_MASK     (0x4U)
+#define ENC_CTRL2_MOD_SHIFT    (2U)
+#define ENC_CTRL2_MOD(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)
+#define ENC_CTRL2_DIR_MASK     (0x8U)
+#define ENC_CTRL2_DIR_SHIFT    (3U)
+#define ENC_CTRL2_DIR(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)
+#define ENC_CTRL2_RUIE_MASK    (0x10U)
+#define ENC_CTRL2_RUIE_SHIFT   (4U)
+#define ENC_CTRL2_RUIE(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)
+#define ENC_CTRL2_RUIRQ_MASK   (0x20U)
+#define ENC_CTRL2_RUIRQ_SHIFT  (5U)
+#define ENC_CTRL2_RUIRQ(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)
+#define ENC_CTRL2_ROIE_MASK    (0x40U)
+#define ENC_CTRL2_ROIE_SHIFT   (6U)
+#define ENC_CTRL2_ROIE(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)
+#define ENC_CTRL2_ROIRQ_MASK   (0x80U)
+#define ENC_CTRL2_ROIRQ_SHIFT  (7U)
+#define ENC_CTRL2_ROIRQ(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)
+#define ENC_CTRL2_REVMOD_MASK  (0x100U)
+#define ENC_CTRL2_REVMOD_SHIFT (8U)
+#define ENC_CTRL2_REVMOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)
+#define ENC_CTRL2_OUTCTL_MASK  (0x200U)
+#define ENC_CTRL2_OUTCTL_SHIFT (9U)
+#define ENC_CTRL2_OUTCTL(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)
+#define ENC_CTRL2_SABIE_MASK   (0x400U)
+#define ENC_CTRL2_SABIE_SHIFT  (10U)
+#define ENC_CTRL2_SABIE(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)
+#define ENC_CTRL2_SABIRQ_MASK  (0x800U)
+#define ENC_CTRL2_SABIRQ_SHIFT (11U)
+#define ENC_CTRL2_SABIRQ(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)
 /*! @} */
 
 /*! @name UMOD - Upper Modulus Register */
 /*! @{ */
-#define ENC_UMOD_MOD_MASK                        (0xFFFFU)
-#define ENC_UMOD_MOD_SHIFT                       (0U)
-#define ENC_UMOD_MOD(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)
+#define ENC_UMOD_MOD_MASK  (0xFFFFU)
+#define ENC_UMOD_MOD_SHIFT (0U)
+#define ENC_UMOD_MOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)
 /*! @} */
 
 /*! @name LMOD - Lower Modulus Register */
 /*! @{ */
-#define ENC_LMOD_MOD_MASK                        (0xFFFFU)
-#define ENC_LMOD_MOD_SHIFT                       (0U)
-#define ENC_LMOD_MOD(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)
+#define ENC_LMOD_MOD_MASK  (0xFFFFU)
+#define ENC_LMOD_MOD_SHIFT (0U)
+#define ENC_LMOD_MOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)
 /*! @} */
 
 /*! @name UCOMP - Upper Position Compare Register */
 /*! @{ */
-#define ENC_UCOMP_COMP_MASK                      (0xFFFFU)
-#define ENC_UCOMP_COMP_SHIFT                     (0U)
-#define ENC_UCOMP_COMP(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)
+#define ENC_UCOMP_COMP_MASK  (0xFFFFU)
+#define ENC_UCOMP_COMP_SHIFT (0U)
+#define ENC_UCOMP_COMP(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)
 /*! @} */
 
 /*! @name LCOMP - Lower Position Compare Register */
 /*! @{ */
-#define ENC_LCOMP_COMP_MASK                      (0xFFFFU)
-#define ENC_LCOMP_COMP_SHIFT                     (0U)
-#define ENC_LCOMP_COMP(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)
+#define ENC_LCOMP_COMP_MASK  (0xFFFFU)
+#define ENC_LCOMP_COMP_SHIFT (0U)
+#define ENC_LCOMP_COMP(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ENC_Register_Masks */
 
-
 /* ENC - Peripheral instance base addresses */
 /** Peripheral ENC1 base address */
-#define ENC1_BASE                                (0x403C8000u)
+#define ENC1_BASE (0x403C8000u)
 /** Peripheral ENC1 base pointer */
-#define ENC1                                     ((ENC_Type *)ENC1_BASE)
+#define ENC1 ((ENC_Type *)ENC1_BASE)
 /** Peripheral ENC2 base address */
-#define ENC2_BASE                                (0x403CC000u)
+#define ENC2_BASE (0x403CC000u)
 /** Peripheral ENC2 base pointer */
-#define ENC2                                     ((ENC_Type *)ENC2_BASE)
+#define ENC2 ((ENC_Type *)ENC2_BASE)
 /** Peripheral ENC3 base address */
-#define ENC3_BASE                                (0x403D0000u)
+#define ENC3_BASE (0x403D0000u)
 /** Peripheral ENC3 base pointer */
-#define ENC3                                     ((ENC_Type *)ENC3_BASE)
+#define ENC3 ((ENC_Type *)ENC3_BASE)
 /** Peripheral ENC4 base address */
-#define ENC4_BASE                                (0x403D4000u)
+#define ENC4_BASE (0x403D4000u)
 /** Peripheral ENC4 base pointer */
-#define ENC4                                     ((ENC_Type *)ENC4_BASE)
+#define ENC4 ((ENC_Type *)ENC4_BASE)
 /** Array initializer of ENC peripheral base addresses */
-#define ENC_BASE_ADDRS                           { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
+#define ENC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE                                                                 \
+    }
 /** Array initializer of ENC peripheral base pointers */
-#define ENC_BASE_PTRS                            { (ENC_Type *)0u, ENC1, ENC2, ENC3, ENC4 }
+#define ENC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (ENC_Type *)0u, ENC1, ENC2, ENC3, ENC4                                                                         \
+    }
 /** Interrupt vectors for the ENC peripheral type */
-#define ENC_COMPARE_IRQS                         { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_HOME_IRQS                            { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_WDOG_IRQS                            { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_INDEX_IRQS                           { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_INPUT_SWITCH_IRQS                    { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
+#define ENC_COMPARE_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_HOME_IRQS                                                                                                  \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_WDOG_IRQS                                                                                                  \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_INDEX_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_INPUT_SWITCH_IRQS                                                                                          \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group ENC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ENET Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8994,125 +10327,130 @@ typedef struct {
  */
 
 /** ENET - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[4];
-  __IO uint32_t EIR;                               /**< Interrupt Event Register, offset: 0x4 */
-  __IO uint32_t EIMR;                              /**< Interrupt Mask Register, offset: 0x8 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t RDAR;                              /**< Receive Descriptor Active Register, offset: 0x10 */
-  __IO uint32_t TDAR;                              /**< Transmit Descriptor Active Register, offset: 0x14 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t ECR;                               /**< Ethernet Control Register, offset: 0x24 */
-       uint8_t RESERVED_3[24];
-  __IO uint32_t MMFR;                              /**< MII Management Frame Register, offset: 0x40 */
-  __IO uint32_t MSCR;                              /**< MII Speed Control Register, offset: 0x44 */
-       uint8_t RESERVED_4[28];
-  __IO uint32_t MIBC;                              /**< MIB Control Register, offset: 0x64 */
-       uint8_t RESERVED_5[28];
-  __IO uint32_t RCR;                               /**< Receive Control Register, offset: 0x84 */
-       uint8_t RESERVED_6[60];
-  __IO uint32_t TCR;                               /**< Transmit Control Register, offset: 0xC4 */
-       uint8_t RESERVED_7[28];
-  __IO uint32_t PALR;                              /**< Physical Address Lower Register, offset: 0xE4 */
-  __IO uint32_t PAUR;                              /**< Physical Address Upper Register, offset: 0xE8 */
-  __IO uint32_t OPD;                               /**< Opcode/Pause Duration Register, offset: 0xEC */
-  __IO uint32_t TXIC;                              /**< Transmit Interrupt Coalescing Register, offset: 0xF0 */
-       uint8_t RESERVED_8[12];
-  __IO uint32_t RXIC;                              /**< Receive Interrupt Coalescing Register, offset: 0x100 */
-       uint8_t RESERVED_9[20];
-  __IO uint32_t IAUR;                              /**< Descriptor Individual Upper Address Register, offset: 0x118 */
-  __IO uint32_t IALR;                              /**< Descriptor Individual Lower Address Register, offset: 0x11C */
-  __IO uint32_t GAUR;                              /**< Descriptor Group Upper Address Register, offset: 0x120 */
-  __IO uint32_t GALR;                              /**< Descriptor Group Lower Address Register, offset: 0x124 */
-       uint8_t RESERVED_10[28];
-  __IO uint32_t TFWR;                              /**< Transmit FIFO Watermark Register, offset: 0x144 */
-       uint8_t RESERVED_11[56];
-  __IO uint32_t RDSR;                              /**< Receive Descriptor Ring Start Register, offset: 0x180 */
-  __IO uint32_t TDSR;                              /**< Transmit Buffer Descriptor Ring Start Register, offset: 0x184 */
-  __IO uint32_t MRBR;                              /**< Maximum Receive Buffer Size Register, offset: 0x188 */
-       uint8_t RESERVED_12[4];
-  __IO uint32_t RSFL;                              /**< Receive FIFO Section Full Threshold, offset: 0x190 */
-  __IO uint32_t RSEM;                              /**< Receive FIFO Section Empty Threshold, offset: 0x194 */
-  __IO uint32_t RAEM;                              /**< Receive FIFO Almost Empty Threshold, offset: 0x198 */
-  __IO uint32_t RAFL;                              /**< Receive FIFO Almost Full Threshold, offset: 0x19C */
-  __IO uint32_t TSEM;                              /**< Transmit FIFO Section Empty Threshold, offset: 0x1A0 */
-  __IO uint32_t TAEM;                              /**< Transmit FIFO Almost Empty Threshold, offset: 0x1A4 */
-  __IO uint32_t TAFL;                              /**< Transmit FIFO Almost Full Threshold, offset: 0x1A8 */
-  __IO uint32_t TIPG;                              /**< Transmit Inter-Packet Gap, offset: 0x1AC */
-  __IO uint32_t FTRL;                              /**< Frame Truncation Length, offset: 0x1B0 */
-       uint8_t RESERVED_13[12];
-  __IO uint32_t TACC;                              /**< Transmit Accelerator Function Configuration, offset: 0x1C0 */
-  __IO uint32_t RACC;                              /**< Receive Accelerator Function Configuration, offset: 0x1C4 */
-       uint8_t RESERVED_14[56];
-       uint32_t RMON_T_DROP;                       /**< Reserved Statistic Register, offset: 0x200 */
-  __I  uint32_t RMON_T_PACKETS;                    /**< Tx Packet Count Statistic Register, offset: 0x204 */
-  __I  uint32_t RMON_T_BC_PKT;                     /**< Tx Broadcast Packets Statistic Register, offset: 0x208 */
-  __I  uint32_t RMON_T_MC_PKT;                     /**< Tx Multicast Packets Statistic Register, offset: 0x20C */
-  __I  uint32_t RMON_T_CRC_ALIGN;                  /**< Tx Packets with CRC/Align Error Statistic Register, offset: 0x210 */
-  __I  uint32_t RMON_T_UNDERSIZE;                  /**< Tx Packets Less Than Bytes and Good CRC Statistic Register, offset: 0x214 */
-  __I  uint32_t RMON_T_OVERSIZE;                   /**< Tx Packets GT MAX_FL bytes and Good CRC Statistic Register, offset: 0x218 */
-  __I  uint32_t RMON_T_FRAG;                       /**< Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x21C */
-  __I  uint32_t RMON_T_JAB;                        /**< Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register, offset: 0x220 */
-  __I  uint32_t RMON_T_COL;                        /**< Tx Collision Count Statistic Register, offset: 0x224 */
-  __I  uint32_t RMON_T_P64;                        /**< Tx 64-Byte Packets Statistic Register, offset: 0x228 */
-  __I  uint32_t RMON_T_P65TO127;                   /**< Tx 65- to 127-byte Packets Statistic Register, offset: 0x22C */
-  __I  uint32_t RMON_T_P128TO255;                  /**< Tx 128- to 255-byte Packets Statistic Register, offset: 0x230 */
-  __I  uint32_t RMON_T_P256TO511;                  /**< Tx 256- to 511-byte Packets Statistic Register, offset: 0x234 */
-  __I  uint32_t RMON_T_P512TO1023;                 /**< Tx 512- to 1023-byte Packets Statistic Register, offset: 0x238 */
-  __I  uint32_t RMON_T_P1024TO2047;                /**< Tx 1024- to 2047-byte Packets Statistic Register, offset: 0x23C */
-  __I  uint32_t RMON_T_P_GTE2048;                  /**< Tx Packets Greater Than 2048 Bytes Statistic Register, offset: 0x240 */
-  __I  uint32_t RMON_T_OCTETS;                     /**< Tx Octets Statistic Register, offset: 0x244 */
-       uint32_t IEEE_T_DROP;                       /**< Reserved Statistic Register, offset: 0x248 */
-  __I  uint32_t IEEE_T_FRAME_OK;                   /**< Frames Transmitted OK Statistic Register, offset: 0x24C */
-  __I  uint32_t IEEE_T_1COL;                       /**< Frames Transmitted with Single Collision Statistic Register, offset: 0x250 */
-  __I  uint32_t IEEE_T_MCOL;                       /**< Frames Transmitted with Multiple Collisions Statistic Register, offset: 0x254 */
-  __I  uint32_t IEEE_T_DEF;                        /**< Frames Transmitted after Deferral Delay Statistic Register, offset: 0x258 */
-  __I  uint32_t IEEE_T_LCOL;                       /**< Frames Transmitted with Late Collision Statistic Register, offset: 0x25C */
-  __I  uint32_t IEEE_T_EXCOL;                      /**< Frames Transmitted with Excessive Collisions Statistic Register, offset: 0x260 */
-  __I  uint32_t IEEE_T_MACERR;                     /**< Frames Transmitted with Tx FIFO Underrun Statistic Register, offset: 0x264 */
-  __I  uint32_t IEEE_T_CSERR;                      /**< Frames Transmitted with Carrier Sense Error Statistic Register, offset: 0x268 */
-  __I  uint32_t IEEE_T_SQE;                        /**< Reserved Statistic Register, offset: 0x26C */
-  __I  uint32_t IEEE_T_FDXFC;                      /**< Flow Control Pause Frames Transmitted Statistic Register, offset: 0x270 */
-  __I  uint32_t IEEE_T_OCTETS_OK;                  /**< Octet Count for Frames Transmitted w/o Error Statistic Register, offset: 0x274 */
-       uint8_t RESERVED_15[12];
-  __I  uint32_t RMON_R_PACKETS;                    /**< Rx Packet Count Statistic Register, offset: 0x284 */
-  __I  uint32_t RMON_R_BC_PKT;                     /**< Rx Broadcast Packets Statistic Register, offset: 0x288 */
-  __I  uint32_t RMON_R_MC_PKT;                     /**< Rx Multicast Packets Statistic Register, offset: 0x28C */
-  __I  uint32_t RMON_R_CRC_ALIGN;                  /**< Rx Packets with CRC/Align Error Statistic Register, offset: 0x290 */
-  __I  uint32_t RMON_R_UNDERSIZE;                  /**< Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register, offset: 0x294 */
-  __I  uint32_t RMON_R_OVERSIZE;                   /**< Rx Packets Greater Than MAX_FL and Good CRC Statistic Register, offset: 0x298 */
-  __I  uint32_t RMON_R_FRAG;                       /**< Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x29C */
-  __I  uint32_t RMON_R_JAB;                        /**< Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register, offset: 0x2A0 */
-       uint32_t RMON_R_RESVD_0;                    /**< Reserved Statistic Register, offset: 0x2A4 */
-  __I  uint32_t RMON_R_P64;                        /**< Rx 64-Byte Packets Statistic Register, offset: 0x2A8 */
-  __I  uint32_t RMON_R_P65TO127;                   /**< Rx 65- to 127-Byte Packets Statistic Register, offset: 0x2AC */
-  __I  uint32_t RMON_R_P128TO255;                  /**< Rx 128- to 255-Byte Packets Statistic Register, offset: 0x2B0 */
-  __I  uint32_t RMON_R_P256TO511;                  /**< Rx 256- to 511-Byte Packets Statistic Register, offset: 0x2B4 */
-  __I  uint32_t RMON_R_P512TO1023;                 /**< Rx 512- to 1023-Byte Packets Statistic Register, offset: 0x2B8 */
-  __I  uint32_t RMON_R_P1024TO2047;                /**< Rx 1024- to 2047-Byte Packets Statistic Register, offset: 0x2BC */
-  __I  uint32_t RMON_R_P_GTE2048;                  /**< Rx Packets Greater than 2048 Bytes Statistic Register, offset: 0x2C0 */
-  __I  uint32_t RMON_R_OCTETS;                     /**< Rx Octets Statistic Register, offset: 0x2C4 */
-  __I  uint32_t IEEE_R_DROP;                       /**< Frames not Counted Correctly Statistic Register, offset: 0x2C8 */
-  __I  uint32_t IEEE_R_FRAME_OK;                   /**< Frames Received OK Statistic Register, offset: 0x2CC */
-  __I  uint32_t IEEE_R_CRC;                        /**< Frames Received with CRC Error Statistic Register, offset: 0x2D0 */
-  __I  uint32_t IEEE_R_ALIGN;                      /**< Frames Received with Alignment Error Statistic Register, offset: 0x2D4 */
-  __I  uint32_t IEEE_R_MACERR;                     /**< Receive FIFO Overflow Count Statistic Register, offset: 0x2D8 */
-  __I  uint32_t IEEE_R_FDXFC;                      /**< Flow Control Pause Frames Received Statistic Register, offset: 0x2DC */
-  __I  uint32_t IEEE_R_OCTETS_OK;                  /**< Octet Count for Frames Received without Error Statistic Register, offset: 0x2E0 */
-       uint8_t RESERVED_16[284];
-  __IO uint32_t ATCR;                              /**< Adjustable Timer Control Register, offset: 0x400 */
-  __IO uint32_t ATVR;                              /**< Timer Value Register, offset: 0x404 */
-  __IO uint32_t ATOFF;                             /**< Timer Offset Register, offset: 0x408 */
-  __IO uint32_t ATPER;                             /**< Timer Period Register, offset: 0x40C */
-  __IO uint32_t ATCOR;                             /**< Timer Correction Register, offset: 0x410 */
-  __IO uint32_t ATINC;                             /**< Time-Stamping Clock Period Register, offset: 0x414 */
-  __I  uint32_t ATSTMP;                            /**< Timestamp of Last Transmitted Frame, offset: 0x418 */
-       uint8_t RESERVED_17[488];
-  __IO uint32_t TGSR;                              /**< Timer Global Status Register, offset: 0x604 */
-  struct {                                         /* offset: 0x608, array step: 0x8 */
-    __IO uint32_t TCSR;                              /**< Timer Control Status Register, array offset: 0x608, array step: 0x8 */
-    __IO uint32_t TCCR;                              /**< Timer Compare Capture Register, array offset: 0x60C, array step: 0x8 */
-  } CHANNEL[4];
+typedef struct
+{
+    uint8_t RESERVED_0[4];
+    __IO uint32_t EIR;  /**< Interrupt Event Register, offset: 0x4 */
+    __IO uint32_t EIMR; /**< Interrupt Mask Register, offset: 0x8 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t RDAR; /**< Receive Descriptor Active Register, offset: 0x10 */
+    __IO uint32_t TDAR; /**< Transmit Descriptor Active Register, offset: 0x14 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t ECR; /**< Ethernet Control Register, offset: 0x24 */
+    uint8_t RESERVED_3[24];
+    __IO uint32_t MMFR; /**< MII Management Frame Register, offset: 0x40 */
+    __IO uint32_t MSCR; /**< MII Speed Control Register, offset: 0x44 */
+    uint8_t RESERVED_4[28];
+    __IO uint32_t MIBC; /**< MIB Control Register, offset: 0x64 */
+    uint8_t RESERVED_5[28];
+    __IO uint32_t RCR; /**< Receive Control Register, offset: 0x84 */
+    uint8_t RESERVED_6[60];
+    __IO uint32_t TCR; /**< Transmit Control Register, offset: 0xC4 */
+    uint8_t RESERVED_7[28];
+    __IO uint32_t PALR; /**< Physical Address Lower Register, offset: 0xE4 */
+    __IO uint32_t PAUR; /**< Physical Address Upper Register, offset: 0xE8 */
+    __IO uint32_t OPD;  /**< Opcode/Pause Duration Register, offset: 0xEC */
+    __IO uint32_t TXIC; /**< Transmit Interrupt Coalescing Register, offset: 0xF0 */
+    uint8_t RESERVED_8[12];
+    __IO uint32_t RXIC; /**< Receive Interrupt Coalescing Register, offset: 0x100 */
+    uint8_t RESERVED_9[20];
+    __IO uint32_t IAUR; /**< Descriptor Individual Upper Address Register, offset: 0x118 */
+    __IO uint32_t IALR; /**< Descriptor Individual Lower Address Register, offset: 0x11C */
+    __IO uint32_t GAUR; /**< Descriptor Group Upper Address Register, offset: 0x120 */
+    __IO uint32_t GALR; /**< Descriptor Group Lower Address Register, offset: 0x124 */
+    uint8_t RESERVED_10[28];
+    __IO uint32_t TFWR; /**< Transmit FIFO Watermark Register, offset: 0x144 */
+    uint8_t RESERVED_11[56];
+    __IO uint32_t RDSR; /**< Receive Descriptor Ring Start Register, offset: 0x180 */
+    __IO uint32_t TDSR; /**< Transmit Buffer Descriptor Ring Start Register, offset: 0x184 */
+    __IO uint32_t MRBR; /**< Maximum Receive Buffer Size Register, offset: 0x188 */
+    uint8_t RESERVED_12[4];
+    __IO uint32_t RSFL; /**< Receive FIFO Section Full Threshold, offset: 0x190 */
+    __IO uint32_t RSEM; /**< Receive FIFO Section Empty Threshold, offset: 0x194 */
+    __IO uint32_t RAEM; /**< Receive FIFO Almost Empty Threshold, offset: 0x198 */
+    __IO uint32_t RAFL; /**< Receive FIFO Almost Full Threshold, offset: 0x19C */
+    __IO uint32_t TSEM; /**< Transmit FIFO Section Empty Threshold, offset: 0x1A0 */
+    __IO uint32_t TAEM; /**< Transmit FIFO Almost Empty Threshold, offset: 0x1A4 */
+    __IO uint32_t TAFL; /**< Transmit FIFO Almost Full Threshold, offset: 0x1A8 */
+    __IO uint32_t TIPG; /**< Transmit Inter-Packet Gap, offset: 0x1AC */
+    __IO uint32_t FTRL; /**< Frame Truncation Length, offset: 0x1B0 */
+    uint8_t RESERVED_13[12];
+    __IO uint32_t TACC; /**< Transmit Accelerator Function Configuration, offset: 0x1C0 */
+    __IO uint32_t RACC; /**< Receive Accelerator Function Configuration, offset: 0x1C4 */
+    uint8_t RESERVED_14[56];
+    uint32_t RMON_T_DROP;          /**< Reserved Statistic Register, offset: 0x200 */
+    __I uint32_t RMON_T_PACKETS;   /**< Tx Packet Count Statistic Register, offset: 0x204 */
+    __I uint32_t RMON_T_BC_PKT;    /**< Tx Broadcast Packets Statistic Register, offset: 0x208 */
+    __I uint32_t RMON_T_MC_PKT;    /**< Tx Multicast Packets Statistic Register, offset: 0x20C */
+    __I uint32_t RMON_T_CRC_ALIGN; /**< Tx Packets with CRC/Align Error Statistic Register, offset: 0x210 */
+    __I uint32_t RMON_T_UNDERSIZE; /**< Tx Packets Less Than Bytes and Good CRC Statistic Register, offset: 0x214 */
+    __I uint32_t RMON_T_OVERSIZE;  /**< Tx Packets GT MAX_FL bytes and Good CRC Statistic Register, offset: 0x218 */
+    __I uint32_t RMON_T_FRAG;      /**< Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x21C */
+    __I uint32_t RMON_T_JAB; /**< Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register, offset: 0x220 */
+    __I uint32_t RMON_T_COL; /**< Tx Collision Count Statistic Register, offset: 0x224 */
+    __I uint32_t RMON_T_P64; /**< Tx 64-Byte Packets Statistic Register, offset: 0x228 */
+    __I uint32_t RMON_T_P65TO127;    /**< Tx 65- to 127-byte Packets Statistic Register, offset: 0x22C */
+    __I uint32_t RMON_T_P128TO255;   /**< Tx 128- to 255-byte Packets Statistic Register, offset: 0x230 */
+    __I uint32_t RMON_T_P256TO511;   /**< Tx 256- to 511-byte Packets Statistic Register, offset: 0x234 */
+    __I uint32_t RMON_T_P512TO1023;  /**< Tx 512- to 1023-byte Packets Statistic Register, offset: 0x238 */
+    __I uint32_t RMON_T_P1024TO2047; /**< Tx 1024- to 2047-byte Packets Statistic Register, offset: 0x23C */
+    __I uint32_t RMON_T_P_GTE2048;   /**< Tx Packets Greater Than 2048 Bytes Statistic Register, offset: 0x240 */
+    __I uint32_t RMON_T_OCTETS;      /**< Tx Octets Statistic Register, offset: 0x244 */
+    uint32_t IEEE_T_DROP;            /**< Reserved Statistic Register, offset: 0x248 */
+    __I uint32_t IEEE_T_FRAME_OK;    /**< Frames Transmitted OK Statistic Register, offset: 0x24C */
+    __I uint32_t IEEE_T_1COL;        /**< Frames Transmitted with Single Collision Statistic Register, offset: 0x250 */
+    __I uint32_t IEEE_T_MCOL;   /**< Frames Transmitted with Multiple Collisions Statistic Register, offset: 0x254 */
+    __I uint32_t IEEE_T_DEF;    /**< Frames Transmitted after Deferral Delay Statistic Register, offset: 0x258 */
+    __I uint32_t IEEE_T_LCOL;   /**< Frames Transmitted with Late Collision Statistic Register, offset: 0x25C */
+    __I uint32_t IEEE_T_EXCOL;  /**< Frames Transmitted with Excessive Collisions Statistic Register, offset: 0x260 */
+    __I uint32_t IEEE_T_MACERR; /**< Frames Transmitted with Tx FIFO Underrun Statistic Register, offset: 0x264 */
+    __I uint32_t IEEE_T_CSERR;  /**< Frames Transmitted with Carrier Sense Error Statistic Register, offset: 0x268 */
+    __I uint32_t IEEE_T_SQE;    /**< Reserved Statistic Register, offset: 0x26C */
+    __I uint32_t IEEE_T_FDXFC;  /**< Flow Control Pause Frames Transmitted Statistic Register, offset: 0x270 */
+    __I uint32_t
+        IEEE_T_OCTETS_OK; /**< Octet Count for Frames Transmitted w/o Error Statistic Register, offset: 0x274 */
+    uint8_t RESERVED_15[12];
+    __I uint32_t RMON_R_PACKETS;   /**< Rx Packet Count Statistic Register, offset: 0x284 */
+    __I uint32_t RMON_R_BC_PKT;    /**< Rx Broadcast Packets Statistic Register, offset: 0x288 */
+    __I uint32_t RMON_R_MC_PKT;    /**< Rx Multicast Packets Statistic Register, offset: 0x28C */
+    __I uint32_t RMON_R_CRC_ALIGN; /**< Rx Packets with CRC/Align Error Statistic Register, offset: 0x290 */
+    __I uint32_t
+        RMON_R_UNDERSIZE; /**< Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register, offset: 0x294 */
+    __I uint32_t RMON_R_OVERSIZE; /**< Rx Packets Greater Than MAX_FL and Good CRC Statistic Register, offset: 0x298 */
+    __I uint32_t RMON_R_FRAG;     /**< Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x29C */
+    __I uint32_t RMON_R_JAB; /**< Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register, offset: 0x2A0 */
+    uint32_t RMON_R_RESVD_0; /**< Reserved Statistic Register, offset: 0x2A4 */
+    __I uint32_t RMON_R_P64; /**< Rx 64-Byte Packets Statistic Register, offset: 0x2A8 */
+    __I uint32_t RMON_R_P65TO127;    /**< Rx 65- to 127-Byte Packets Statistic Register, offset: 0x2AC */
+    __I uint32_t RMON_R_P128TO255;   /**< Rx 128- to 255-Byte Packets Statistic Register, offset: 0x2B0 */
+    __I uint32_t RMON_R_P256TO511;   /**< Rx 256- to 511-Byte Packets Statistic Register, offset: 0x2B4 */
+    __I uint32_t RMON_R_P512TO1023;  /**< Rx 512- to 1023-Byte Packets Statistic Register, offset: 0x2B8 */
+    __I uint32_t RMON_R_P1024TO2047; /**< Rx 1024- to 2047-Byte Packets Statistic Register, offset: 0x2BC */
+    __I uint32_t RMON_R_P_GTE2048;   /**< Rx Packets Greater than 2048 Bytes Statistic Register, offset: 0x2C0 */
+    __I uint32_t RMON_R_OCTETS;      /**< Rx Octets Statistic Register, offset: 0x2C4 */
+    __I uint32_t IEEE_R_DROP;        /**< Frames not Counted Correctly Statistic Register, offset: 0x2C8 */
+    __I uint32_t IEEE_R_FRAME_OK;    /**< Frames Received OK Statistic Register, offset: 0x2CC */
+    __I uint32_t IEEE_R_CRC;         /**< Frames Received with CRC Error Statistic Register, offset: 0x2D0 */
+    __I uint32_t IEEE_R_ALIGN;       /**< Frames Received with Alignment Error Statistic Register, offset: 0x2D4 */
+    __I uint32_t IEEE_R_MACERR;      /**< Receive FIFO Overflow Count Statistic Register, offset: 0x2D8 */
+    __I uint32_t IEEE_R_FDXFC;       /**< Flow Control Pause Frames Received Statistic Register, offset: 0x2DC */
+    __I uint32_t
+        IEEE_R_OCTETS_OK; /**< Octet Count for Frames Received without Error Statistic Register, offset: 0x2E0 */
+    uint8_t RESERVED_16[284];
+    __IO uint32_t ATCR;  /**< Adjustable Timer Control Register, offset: 0x400 */
+    __IO uint32_t ATVR;  /**< Timer Value Register, offset: 0x404 */
+    __IO uint32_t ATOFF; /**< Timer Offset Register, offset: 0x408 */
+    __IO uint32_t ATPER; /**< Timer Period Register, offset: 0x40C */
+    __IO uint32_t ATCOR; /**< Timer Correction Register, offset: 0x410 */
+    __IO uint32_t ATINC; /**< Time-Stamping Clock Period Register, offset: 0x414 */
+    __I uint32_t ATSTMP; /**< Timestamp of Last Transmitted Frame, offset: 0x418 */
+    uint8_t RESERVED_17[488];
+    __IO uint32_t TGSR; /**< Timer Global Status Register, offset: 0x604 */
+    struct
+    {                       /* offset: 0x608, array step: 0x8 */
+        __IO uint32_t TCSR; /**< Timer Control Status Register, array offset: 0x608, array step: 0x8 */
+        __IO uint32_t TCCR; /**< Timer Compare Capture Register, array offset: 0x60C, array step: 0x8 */
+    } CHANNEL[4];
 } ENET_Type;
 
 /* ----------------------------------------------------------------------------
@@ -9126,992 +10464,1069 @@ typedef struct {
 
 /*! @name EIR - Interrupt Event Register */
 /*! @{ */
-#define ENET_EIR_TS_TIMER_MASK                   (0x8000U)
-#define ENET_EIR_TS_TIMER_SHIFT                  (15U)
-#define ENET_EIR_TS_TIMER(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_TIMER_SHIFT)) & ENET_EIR_TS_TIMER_MASK)
-#define ENET_EIR_TS_AVAIL_MASK                   (0x10000U)
-#define ENET_EIR_TS_AVAIL_SHIFT                  (16U)
-#define ENET_EIR_TS_AVAIL(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_AVAIL_SHIFT)) & ENET_EIR_TS_AVAIL_MASK)
-#define ENET_EIR_WAKEUP_MASK                     (0x20000U)
-#define ENET_EIR_WAKEUP_SHIFT                    (17U)
-#define ENET_EIR_WAKEUP(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_EIR_WAKEUP_SHIFT)) & ENET_EIR_WAKEUP_MASK)
-#define ENET_EIR_PLR_MASK                        (0x40000U)
-#define ENET_EIR_PLR_SHIFT                       (18U)
-#define ENET_EIR_PLR(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_PLR_SHIFT)) & ENET_EIR_PLR_MASK)
-#define ENET_EIR_UN_MASK                         (0x80000U)
-#define ENET_EIR_UN_SHIFT                        (19U)
-#define ENET_EIR_UN(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_UN_SHIFT)) & ENET_EIR_UN_MASK)
-#define ENET_EIR_RL_MASK                         (0x100000U)
-#define ENET_EIR_RL_SHIFT                        (20U)
-#define ENET_EIR_RL(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RL_SHIFT)) & ENET_EIR_RL_MASK)
-#define ENET_EIR_LC_MASK                         (0x200000U)
-#define ENET_EIR_LC_SHIFT                        (21U)
-#define ENET_EIR_LC(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_LC_SHIFT)) & ENET_EIR_LC_MASK)
-#define ENET_EIR_EBERR_MASK                      (0x400000U)
-#define ENET_EIR_EBERR_SHIFT                     (22U)
-#define ENET_EIR_EBERR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_EBERR_SHIFT)) & ENET_EIR_EBERR_MASK)
-#define ENET_EIR_MII_MASK                        (0x800000U)
-#define ENET_EIR_MII_SHIFT                       (23U)
-#define ENET_EIR_MII(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_MII_SHIFT)) & ENET_EIR_MII_MASK)
-#define ENET_EIR_RXB_MASK                        (0x1000000U)
-#define ENET_EIR_RXB_SHIFT                       (24U)
-#define ENET_EIR_RXB(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXB_SHIFT)) & ENET_EIR_RXB_MASK)
-#define ENET_EIR_RXF_MASK                        (0x2000000U)
-#define ENET_EIR_RXF_SHIFT                       (25U)
-#define ENET_EIR_RXF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXF_SHIFT)) & ENET_EIR_RXF_MASK)
-#define ENET_EIR_TXB_MASK                        (0x4000000U)
-#define ENET_EIR_TXB_SHIFT                       (26U)
-#define ENET_EIR_TXB(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXB_SHIFT)) & ENET_EIR_TXB_MASK)
-#define ENET_EIR_TXF_MASK                        (0x8000000U)
-#define ENET_EIR_TXF_SHIFT                       (27U)
-#define ENET_EIR_TXF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXF_SHIFT)) & ENET_EIR_TXF_MASK)
-#define ENET_EIR_GRA_MASK                        (0x10000000U)
-#define ENET_EIR_GRA_SHIFT                       (28U)
-#define ENET_EIR_GRA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_GRA_SHIFT)) & ENET_EIR_GRA_MASK)
-#define ENET_EIR_BABT_MASK                       (0x20000000U)
-#define ENET_EIR_BABT_SHIFT                      (29U)
-#define ENET_EIR_BABT(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABT_SHIFT)) & ENET_EIR_BABT_MASK)
-#define ENET_EIR_BABR_MASK                       (0x40000000U)
-#define ENET_EIR_BABR_SHIFT                      (30U)
-#define ENET_EIR_BABR(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABR_SHIFT)) & ENET_EIR_BABR_MASK)
+#define ENET_EIR_TS_TIMER_MASK  (0x8000U)
+#define ENET_EIR_TS_TIMER_SHIFT (15U)
+#define ENET_EIR_TS_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_TIMER_SHIFT)) & ENET_EIR_TS_TIMER_MASK)
+#define ENET_EIR_TS_AVAIL_MASK  (0x10000U)
+#define ENET_EIR_TS_AVAIL_SHIFT (16U)
+#define ENET_EIR_TS_AVAIL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_AVAIL_SHIFT)) & ENET_EIR_TS_AVAIL_MASK)
+#define ENET_EIR_WAKEUP_MASK    (0x20000U)
+#define ENET_EIR_WAKEUP_SHIFT   (17U)
+#define ENET_EIR_WAKEUP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_EIR_WAKEUP_SHIFT)) & ENET_EIR_WAKEUP_MASK)
+#define ENET_EIR_PLR_MASK       (0x40000U)
+#define ENET_EIR_PLR_SHIFT      (18U)
+#define ENET_EIR_PLR(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_PLR_SHIFT)) & ENET_EIR_PLR_MASK)
+#define ENET_EIR_UN_MASK        (0x80000U)
+#define ENET_EIR_UN_SHIFT       (19U)
+#define ENET_EIR_UN(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_UN_SHIFT)) & ENET_EIR_UN_MASK)
+#define ENET_EIR_RL_MASK        (0x100000U)
+#define ENET_EIR_RL_SHIFT       (20U)
+#define ENET_EIR_RL(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RL_SHIFT)) & ENET_EIR_RL_MASK)
+#define ENET_EIR_LC_MASK        (0x200000U)
+#define ENET_EIR_LC_SHIFT       (21U)
+#define ENET_EIR_LC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_LC_SHIFT)) & ENET_EIR_LC_MASK)
+#define ENET_EIR_EBERR_MASK     (0x400000U)
+#define ENET_EIR_EBERR_SHIFT    (22U)
+#define ENET_EIR_EBERR(x)       (((uint32_t)(((uint32_t)(x)) << ENET_EIR_EBERR_SHIFT)) & ENET_EIR_EBERR_MASK)
+#define ENET_EIR_MII_MASK       (0x800000U)
+#define ENET_EIR_MII_SHIFT      (23U)
+#define ENET_EIR_MII(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_MII_SHIFT)) & ENET_EIR_MII_MASK)
+#define ENET_EIR_RXB_MASK       (0x1000000U)
+#define ENET_EIR_RXB_SHIFT      (24U)
+#define ENET_EIR_RXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXB_SHIFT)) & ENET_EIR_RXB_MASK)
+#define ENET_EIR_RXF_MASK       (0x2000000U)
+#define ENET_EIR_RXF_SHIFT      (25U)
+#define ENET_EIR_RXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXF_SHIFT)) & ENET_EIR_RXF_MASK)
+#define ENET_EIR_TXB_MASK       (0x4000000U)
+#define ENET_EIR_TXB_SHIFT      (26U)
+#define ENET_EIR_TXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXB_SHIFT)) & ENET_EIR_TXB_MASK)
+#define ENET_EIR_TXF_MASK       (0x8000000U)
+#define ENET_EIR_TXF_SHIFT      (27U)
+#define ENET_EIR_TXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXF_SHIFT)) & ENET_EIR_TXF_MASK)
+#define ENET_EIR_GRA_MASK       (0x10000000U)
+#define ENET_EIR_GRA_SHIFT      (28U)
+#define ENET_EIR_GRA(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_GRA_SHIFT)) & ENET_EIR_GRA_MASK)
+#define ENET_EIR_BABT_MASK      (0x20000000U)
+#define ENET_EIR_BABT_SHIFT     (29U)
+#define ENET_EIR_BABT(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABT_SHIFT)) & ENET_EIR_BABT_MASK)
+#define ENET_EIR_BABR_MASK      (0x40000000U)
+#define ENET_EIR_BABR_SHIFT     (30U)
+#define ENET_EIR_BABR(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABR_SHIFT)) & ENET_EIR_BABR_MASK)
 /*! @} */
 
 /*! @name EIMR - Interrupt Mask Register */
 /*! @{ */
-#define ENET_EIMR_TS_TIMER_MASK                  (0x8000U)
-#define ENET_EIMR_TS_TIMER_SHIFT                 (15U)
-#define ENET_EIMR_TS_TIMER(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_TIMER_SHIFT)) & ENET_EIMR_TS_TIMER_MASK)
-#define ENET_EIMR_TS_AVAIL_MASK                  (0x10000U)
-#define ENET_EIMR_TS_AVAIL_SHIFT                 (16U)
-#define ENET_EIMR_TS_AVAIL(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_AVAIL_SHIFT)) & ENET_EIMR_TS_AVAIL_MASK)
-#define ENET_EIMR_WAKEUP_MASK                    (0x20000U)
-#define ENET_EIMR_WAKEUP_SHIFT                   (17U)
-#define ENET_EIMR_WAKEUP(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_WAKEUP_SHIFT)) & ENET_EIMR_WAKEUP_MASK)
-#define ENET_EIMR_PLR_MASK                       (0x40000U)
-#define ENET_EIMR_PLR_SHIFT                      (18U)
-#define ENET_EIMR_PLR(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_PLR_SHIFT)) & ENET_EIMR_PLR_MASK)
-#define ENET_EIMR_UN_MASK                        (0x80000U)
-#define ENET_EIMR_UN_SHIFT                       (19U)
-#define ENET_EIMR_UN(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_UN_SHIFT)) & ENET_EIMR_UN_MASK)
-#define ENET_EIMR_RL_MASK                        (0x100000U)
-#define ENET_EIMR_RL_SHIFT                       (20U)
-#define ENET_EIMR_RL(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RL_SHIFT)) & ENET_EIMR_RL_MASK)
-#define ENET_EIMR_LC_MASK                        (0x200000U)
-#define ENET_EIMR_LC_SHIFT                       (21U)
-#define ENET_EIMR_LC(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_LC_SHIFT)) & ENET_EIMR_LC_MASK)
-#define ENET_EIMR_EBERR_MASK                     (0x400000U)
-#define ENET_EIMR_EBERR_SHIFT                    (22U)
-#define ENET_EIMR_EBERR(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_EBERR_SHIFT)) & ENET_EIMR_EBERR_MASK)
-#define ENET_EIMR_MII_MASK                       (0x800000U)
-#define ENET_EIMR_MII_SHIFT                      (23U)
-#define ENET_EIMR_MII(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_MII_SHIFT)) & ENET_EIMR_MII_MASK)
-#define ENET_EIMR_RXB_MASK                       (0x1000000U)
-#define ENET_EIMR_RXB_SHIFT                      (24U)
-#define ENET_EIMR_RXB(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXB_SHIFT)) & ENET_EIMR_RXB_MASK)
-#define ENET_EIMR_RXF_MASK                       (0x2000000U)
-#define ENET_EIMR_RXF_SHIFT                      (25U)
-#define ENET_EIMR_RXF(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXF_SHIFT)) & ENET_EIMR_RXF_MASK)
-#define ENET_EIMR_TXB_MASK                       (0x4000000U)
-#define ENET_EIMR_TXB_SHIFT                      (26U)
-#define ENET_EIMR_TXB(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXB_SHIFT)) & ENET_EIMR_TXB_MASK)
-#define ENET_EIMR_TXF_MASK                       (0x8000000U)
-#define ENET_EIMR_TXF_SHIFT                      (27U)
-#define ENET_EIMR_TXF(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXF_SHIFT)) & ENET_EIMR_TXF_MASK)
-#define ENET_EIMR_GRA_MASK                       (0x10000000U)
-#define ENET_EIMR_GRA_SHIFT                      (28U)
-#define ENET_EIMR_GRA(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_GRA_SHIFT)) & ENET_EIMR_GRA_MASK)
-#define ENET_EIMR_BABT_MASK                      (0x20000000U)
-#define ENET_EIMR_BABT_SHIFT                     (29U)
-#define ENET_EIMR_BABT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABT_SHIFT)) & ENET_EIMR_BABT_MASK)
-#define ENET_EIMR_BABR_MASK                      (0x40000000U)
-#define ENET_EIMR_BABR_SHIFT                     (30U)
-#define ENET_EIMR_BABR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABR_SHIFT)) & ENET_EIMR_BABR_MASK)
+#define ENET_EIMR_TS_TIMER_MASK  (0x8000U)
+#define ENET_EIMR_TS_TIMER_SHIFT (15U)
+#define ENET_EIMR_TS_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_TIMER_SHIFT)) & ENET_EIMR_TS_TIMER_MASK)
+#define ENET_EIMR_TS_AVAIL_MASK  (0x10000U)
+#define ENET_EIMR_TS_AVAIL_SHIFT (16U)
+#define ENET_EIMR_TS_AVAIL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_AVAIL_SHIFT)) & ENET_EIMR_TS_AVAIL_MASK)
+#define ENET_EIMR_WAKEUP_MASK    (0x20000U)
+#define ENET_EIMR_WAKEUP_SHIFT   (17U)
+#define ENET_EIMR_WAKEUP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_WAKEUP_SHIFT)) & ENET_EIMR_WAKEUP_MASK)
+#define ENET_EIMR_PLR_MASK       (0x40000U)
+#define ENET_EIMR_PLR_SHIFT      (18U)
+#define ENET_EIMR_PLR(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_PLR_SHIFT)) & ENET_EIMR_PLR_MASK)
+#define ENET_EIMR_UN_MASK        (0x80000U)
+#define ENET_EIMR_UN_SHIFT       (19U)
+#define ENET_EIMR_UN(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_UN_SHIFT)) & ENET_EIMR_UN_MASK)
+#define ENET_EIMR_RL_MASK        (0x100000U)
+#define ENET_EIMR_RL_SHIFT       (20U)
+#define ENET_EIMR_RL(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RL_SHIFT)) & ENET_EIMR_RL_MASK)
+#define ENET_EIMR_LC_MASK        (0x200000U)
+#define ENET_EIMR_LC_SHIFT       (21U)
+#define ENET_EIMR_LC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_LC_SHIFT)) & ENET_EIMR_LC_MASK)
+#define ENET_EIMR_EBERR_MASK     (0x400000U)
+#define ENET_EIMR_EBERR_SHIFT    (22U)
+#define ENET_EIMR_EBERR(x)       (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_EBERR_SHIFT)) & ENET_EIMR_EBERR_MASK)
+#define ENET_EIMR_MII_MASK       (0x800000U)
+#define ENET_EIMR_MII_SHIFT      (23U)
+#define ENET_EIMR_MII(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_MII_SHIFT)) & ENET_EIMR_MII_MASK)
+#define ENET_EIMR_RXB_MASK       (0x1000000U)
+#define ENET_EIMR_RXB_SHIFT      (24U)
+#define ENET_EIMR_RXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXB_SHIFT)) & ENET_EIMR_RXB_MASK)
+#define ENET_EIMR_RXF_MASK       (0x2000000U)
+#define ENET_EIMR_RXF_SHIFT      (25U)
+#define ENET_EIMR_RXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXF_SHIFT)) & ENET_EIMR_RXF_MASK)
+#define ENET_EIMR_TXB_MASK       (0x4000000U)
+#define ENET_EIMR_TXB_SHIFT      (26U)
+#define ENET_EIMR_TXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXB_SHIFT)) & ENET_EIMR_TXB_MASK)
+#define ENET_EIMR_TXF_MASK       (0x8000000U)
+#define ENET_EIMR_TXF_SHIFT      (27U)
+#define ENET_EIMR_TXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXF_SHIFT)) & ENET_EIMR_TXF_MASK)
+#define ENET_EIMR_GRA_MASK       (0x10000000U)
+#define ENET_EIMR_GRA_SHIFT      (28U)
+#define ENET_EIMR_GRA(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_GRA_SHIFT)) & ENET_EIMR_GRA_MASK)
+#define ENET_EIMR_BABT_MASK      (0x20000000U)
+#define ENET_EIMR_BABT_SHIFT     (29U)
+#define ENET_EIMR_BABT(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABT_SHIFT)) & ENET_EIMR_BABT_MASK)
+#define ENET_EIMR_BABR_MASK      (0x40000000U)
+#define ENET_EIMR_BABR_SHIFT     (30U)
+#define ENET_EIMR_BABR(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABR_SHIFT)) & ENET_EIMR_BABR_MASK)
 /*! @} */
 
 /*! @name RDAR - Receive Descriptor Active Register */
 /*! @{ */
-#define ENET_RDAR_RDAR_MASK                      (0x1000000U)
-#define ENET_RDAR_RDAR_SHIFT                     (24U)
-#define ENET_RDAR_RDAR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RDAR_RDAR_SHIFT)) & ENET_RDAR_RDAR_MASK)
+#define ENET_RDAR_RDAR_MASK  (0x1000000U)
+#define ENET_RDAR_RDAR_SHIFT (24U)
+#define ENET_RDAR_RDAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RDAR_RDAR_SHIFT)) & ENET_RDAR_RDAR_MASK)
 /*! @} */
 
 /*! @name TDAR - Transmit Descriptor Active Register */
 /*! @{ */
-#define ENET_TDAR_TDAR_MASK                      (0x1000000U)
-#define ENET_TDAR_TDAR_SHIFT                     (24U)
-#define ENET_TDAR_TDAR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TDAR_TDAR_SHIFT)) & ENET_TDAR_TDAR_MASK)
+#define ENET_TDAR_TDAR_MASK  (0x1000000U)
+#define ENET_TDAR_TDAR_SHIFT (24U)
+#define ENET_TDAR_TDAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TDAR_TDAR_SHIFT)) & ENET_TDAR_TDAR_MASK)
 /*! @} */
 
 /*! @name ECR - Ethernet Control Register */
 /*! @{ */
-#define ENET_ECR_RESET_MASK                      (0x1U)
-#define ENET_ECR_RESET_SHIFT                     (0U)
-#define ENET_ECR_RESET(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_RESET_SHIFT)) & ENET_ECR_RESET_MASK)
-#define ENET_ECR_ETHEREN_MASK                    (0x2U)
-#define ENET_ECR_ETHEREN_SHIFT                   (1U)
-#define ENET_ECR_ETHEREN(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_ETHEREN_SHIFT)) & ENET_ECR_ETHEREN_MASK)
-#define ENET_ECR_MAGICEN_MASK                    (0x4U)
-#define ENET_ECR_MAGICEN_SHIFT                   (2U)
-#define ENET_ECR_MAGICEN(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_MAGICEN_SHIFT)) & ENET_ECR_MAGICEN_MASK)
-#define ENET_ECR_SLEEP_MASK                      (0x8U)
-#define ENET_ECR_SLEEP_SHIFT                     (3U)
-#define ENET_ECR_SLEEP(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_SLEEP_SHIFT)) & ENET_ECR_SLEEP_MASK)
-#define ENET_ECR_EN1588_MASK                     (0x10U)
-#define ENET_ECR_EN1588_SHIFT                    (4U)
-#define ENET_ECR_EN1588(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ECR_EN1588_SHIFT)) & ENET_ECR_EN1588_MASK)
-#define ENET_ECR_DBGEN_MASK                      (0x40U)
-#define ENET_ECR_DBGEN_SHIFT                     (6U)
-#define ENET_ECR_DBGEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBGEN_SHIFT)) & ENET_ECR_DBGEN_MASK)
-#define ENET_ECR_DBSWP_MASK                      (0x100U)
-#define ENET_ECR_DBSWP_SHIFT                     (8U)
-#define ENET_ECR_DBSWP(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBSWP_SHIFT)) & ENET_ECR_DBSWP_MASK)
+#define ENET_ECR_RESET_MASK    (0x1U)
+#define ENET_ECR_RESET_SHIFT   (0U)
+#define ENET_ECR_RESET(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_RESET_SHIFT)) & ENET_ECR_RESET_MASK)
+#define ENET_ECR_ETHEREN_MASK  (0x2U)
+#define ENET_ECR_ETHEREN_SHIFT (1U)
+#define ENET_ECR_ETHEREN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ECR_ETHEREN_SHIFT)) & ENET_ECR_ETHEREN_MASK)
+#define ENET_ECR_MAGICEN_MASK  (0x4U)
+#define ENET_ECR_MAGICEN_SHIFT (2U)
+#define ENET_ECR_MAGICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ECR_MAGICEN_SHIFT)) & ENET_ECR_MAGICEN_MASK)
+#define ENET_ECR_SLEEP_MASK    (0x8U)
+#define ENET_ECR_SLEEP_SHIFT   (3U)
+#define ENET_ECR_SLEEP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_SLEEP_SHIFT)) & ENET_ECR_SLEEP_MASK)
+#define ENET_ECR_EN1588_MASK   (0x10U)
+#define ENET_ECR_EN1588_SHIFT  (4U)
+#define ENET_ECR_EN1588(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ECR_EN1588_SHIFT)) & ENET_ECR_EN1588_MASK)
+#define ENET_ECR_DBGEN_MASK    (0x40U)
+#define ENET_ECR_DBGEN_SHIFT   (6U)
+#define ENET_ECR_DBGEN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBGEN_SHIFT)) & ENET_ECR_DBGEN_MASK)
+#define ENET_ECR_DBSWP_MASK    (0x100U)
+#define ENET_ECR_DBSWP_SHIFT   (8U)
+#define ENET_ECR_DBSWP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBSWP_SHIFT)) & ENET_ECR_DBSWP_MASK)
 /*! @} */
 
 /*! @name MMFR - MII Management Frame Register */
 /*! @{ */
-#define ENET_MMFR_DATA_MASK                      (0xFFFFU)
-#define ENET_MMFR_DATA_SHIFT                     (0U)
-#define ENET_MMFR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_DATA_SHIFT)) & ENET_MMFR_DATA_MASK)
-#define ENET_MMFR_TA_MASK                        (0x30000U)
-#define ENET_MMFR_TA_SHIFT                       (16U)
-#define ENET_MMFR_TA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_TA_SHIFT)) & ENET_MMFR_TA_MASK)
-#define ENET_MMFR_RA_MASK                        (0x7C0000U)
-#define ENET_MMFR_RA_SHIFT                       (18U)
-#define ENET_MMFR_RA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_RA_SHIFT)) & ENET_MMFR_RA_MASK)
-#define ENET_MMFR_PA_MASK                        (0xF800000U)
-#define ENET_MMFR_PA_SHIFT                       (23U)
-#define ENET_MMFR_PA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_PA_SHIFT)) & ENET_MMFR_PA_MASK)
-#define ENET_MMFR_OP_MASK                        (0x30000000U)
-#define ENET_MMFR_OP_SHIFT                       (28U)
-#define ENET_MMFR_OP(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_OP_SHIFT)) & ENET_MMFR_OP_MASK)
-#define ENET_MMFR_ST_MASK                        (0xC0000000U)
-#define ENET_MMFR_ST_SHIFT                       (30U)
-#define ENET_MMFR_ST(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_ST_SHIFT)) & ENET_MMFR_ST_MASK)
+#define ENET_MMFR_DATA_MASK  (0xFFFFU)
+#define ENET_MMFR_DATA_SHIFT (0U)
+#define ENET_MMFR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_DATA_SHIFT)) & ENET_MMFR_DATA_MASK)
+#define ENET_MMFR_TA_MASK    (0x30000U)
+#define ENET_MMFR_TA_SHIFT   (16U)
+#define ENET_MMFR_TA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_TA_SHIFT)) & ENET_MMFR_TA_MASK)
+#define ENET_MMFR_RA_MASK    (0x7C0000U)
+#define ENET_MMFR_RA_SHIFT   (18U)
+#define ENET_MMFR_RA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_RA_SHIFT)) & ENET_MMFR_RA_MASK)
+#define ENET_MMFR_PA_MASK    (0xF800000U)
+#define ENET_MMFR_PA_SHIFT   (23U)
+#define ENET_MMFR_PA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_PA_SHIFT)) & ENET_MMFR_PA_MASK)
+#define ENET_MMFR_OP_MASK    (0x30000000U)
+#define ENET_MMFR_OP_SHIFT   (28U)
+#define ENET_MMFR_OP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_OP_SHIFT)) & ENET_MMFR_OP_MASK)
+#define ENET_MMFR_ST_MASK    (0xC0000000U)
+#define ENET_MMFR_ST_SHIFT   (30U)
+#define ENET_MMFR_ST(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_ST_SHIFT)) & ENET_MMFR_ST_MASK)
 /*! @} */
 
 /*! @name MSCR - MII Speed Control Register */
 /*! @{ */
-#define ENET_MSCR_MII_SPEED_MASK                 (0x7EU)
-#define ENET_MSCR_MII_SPEED_SHIFT                (1U)
-#define ENET_MSCR_MII_SPEED(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_MII_SPEED_SHIFT)) & ENET_MSCR_MII_SPEED_MASK)
-#define ENET_MSCR_DIS_PRE_MASK                   (0x80U)
-#define ENET_MSCR_DIS_PRE_SHIFT                  (7U)
-#define ENET_MSCR_DIS_PRE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_DIS_PRE_SHIFT)) & ENET_MSCR_DIS_PRE_MASK)
-#define ENET_MSCR_HOLDTIME_MASK                  (0x700U)
-#define ENET_MSCR_HOLDTIME_SHIFT                 (8U)
-#define ENET_MSCR_HOLDTIME(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_HOLDTIME_SHIFT)) & ENET_MSCR_HOLDTIME_MASK)
+#define ENET_MSCR_MII_SPEED_MASK  (0x7EU)
+#define ENET_MSCR_MII_SPEED_SHIFT (1U)
+#define ENET_MSCR_MII_SPEED(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_MII_SPEED_SHIFT)) & ENET_MSCR_MII_SPEED_MASK)
+#define ENET_MSCR_DIS_PRE_MASK    (0x80U)
+#define ENET_MSCR_DIS_PRE_SHIFT   (7U)
+#define ENET_MSCR_DIS_PRE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_DIS_PRE_SHIFT)) & ENET_MSCR_DIS_PRE_MASK)
+#define ENET_MSCR_HOLDTIME_MASK   (0x700U)
+#define ENET_MSCR_HOLDTIME_SHIFT  (8U)
+#define ENET_MSCR_HOLDTIME(x)     (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_HOLDTIME_SHIFT)) & ENET_MSCR_HOLDTIME_MASK)
 /*! @} */
 
 /*! @name MIBC - MIB Control Register */
 /*! @{ */
-#define ENET_MIBC_MIB_CLEAR_MASK                 (0x20000000U)
-#define ENET_MIBC_MIB_CLEAR_SHIFT                (29U)
-#define ENET_MIBC_MIB_CLEAR(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_CLEAR_SHIFT)) & ENET_MIBC_MIB_CLEAR_MASK)
-#define ENET_MIBC_MIB_IDLE_MASK                  (0x40000000U)
-#define ENET_MIBC_MIB_IDLE_SHIFT                 (30U)
-#define ENET_MIBC_MIB_IDLE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_IDLE_SHIFT)) & ENET_MIBC_MIB_IDLE_MASK)
-#define ENET_MIBC_MIB_DIS_MASK                   (0x80000000U)
-#define ENET_MIBC_MIB_DIS_SHIFT                  (31U)
-#define ENET_MIBC_MIB_DIS(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_DIS_SHIFT)) & ENET_MIBC_MIB_DIS_MASK)
+#define ENET_MIBC_MIB_CLEAR_MASK  (0x20000000U)
+#define ENET_MIBC_MIB_CLEAR_SHIFT (29U)
+#define ENET_MIBC_MIB_CLEAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_CLEAR_SHIFT)) & ENET_MIBC_MIB_CLEAR_MASK)
+#define ENET_MIBC_MIB_IDLE_MASK   (0x40000000U)
+#define ENET_MIBC_MIB_IDLE_SHIFT  (30U)
+#define ENET_MIBC_MIB_IDLE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_IDLE_SHIFT)) & ENET_MIBC_MIB_IDLE_MASK)
+#define ENET_MIBC_MIB_DIS_MASK    (0x80000000U)
+#define ENET_MIBC_MIB_DIS_SHIFT   (31U)
+#define ENET_MIBC_MIB_DIS(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_DIS_SHIFT)) & ENET_MIBC_MIB_DIS_MASK)
 /*! @} */
 
 /*! @name RCR - Receive Control Register */
 /*! @{ */
-#define ENET_RCR_LOOP_MASK                       (0x1U)
-#define ENET_RCR_LOOP_SHIFT                      (0U)
-#define ENET_RCR_LOOP(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_LOOP_SHIFT)) & ENET_RCR_LOOP_MASK)
-#define ENET_RCR_DRT_MASK                        (0x2U)
-#define ENET_RCR_DRT_SHIFT                       (1U)
-#define ENET_RCR_DRT(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
-#define ENET_RCR_MII_MODE_MASK                   (0x4U)
-#define ENET_RCR_MII_MODE_SHIFT                  (2U)
-#define ENET_RCR_MII_MODE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MII_MODE_SHIFT)) & ENET_RCR_MII_MODE_MASK)
-#define ENET_RCR_PROM_MASK                       (0x8U)
-#define ENET_RCR_PROM_SHIFT                      (3U)
-#define ENET_RCR_PROM(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PROM_SHIFT)) & ENET_RCR_PROM_MASK)
-#define ENET_RCR_BC_REJ_MASK                     (0x10U)
-#define ENET_RCR_BC_REJ_SHIFT                    (4U)
-#define ENET_RCR_BC_REJ(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_BC_REJ_SHIFT)) & ENET_RCR_BC_REJ_MASK)
-#define ENET_RCR_FCE_MASK                        (0x20U)
-#define ENET_RCR_FCE_SHIFT                       (5U)
-#define ENET_RCR_FCE(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_FCE_SHIFT)) & ENET_RCR_FCE_MASK)
-#define ENET_RCR_RMII_MODE_MASK                  (0x100U)
-#define ENET_RCR_RMII_MODE_SHIFT                 (8U)
-#define ENET_RCR_RMII_MODE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_MODE_SHIFT)) & ENET_RCR_RMII_MODE_MASK)
-#define ENET_RCR_RMII_10T_MASK                   (0x200U)
-#define ENET_RCR_RMII_10T_SHIFT                  (9U)
-#define ENET_RCR_RMII_10T(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_10T_SHIFT)) & ENET_RCR_RMII_10T_MASK)
-#define ENET_RCR_PADEN_MASK                      (0x1000U)
-#define ENET_RCR_PADEN_SHIFT                     (12U)
-#define ENET_RCR_PADEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PADEN_SHIFT)) & ENET_RCR_PADEN_MASK)
-#define ENET_RCR_PAUFWD_MASK                     (0x2000U)
-#define ENET_RCR_PAUFWD_SHIFT                    (13U)
-#define ENET_RCR_PAUFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PAUFWD_SHIFT)) & ENET_RCR_PAUFWD_MASK)
-#define ENET_RCR_CRCFWD_MASK                     (0x4000U)
-#define ENET_RCR_CRCFWD_SHIFT                    (14U)
-#define ENET_RCR_CRCFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CRCFWD_SHIFT)) & ENET_RCR_CRCFWD_MASK)
-#define ENET_RCR_CFEN_MASK                       (0x8000U)
-#define ENET_RCR_CFEN_SHIFT                      (15U)
-#define ENET_RCR_CFEN(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CFEN_SHIFT)) & ENET_RCR_CFEN_MASK)
-#define ENET_RCR_MAX_FL_MASK                     (0x3FFF0000U)
-#define ENET_RCR_MAX_FL_SHIFT                    (16U)
-#define ENET_RCR_MAX_FL(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MAX_FL_SHIFT)) & ENET_RCR_MAX_FL_MASK)
-#define ENET_RCR_NLC_MASK                        (0x40000000U)
-#define ENET_RCR_NLC_SHIFT                       (30U)
-#define ENET_RCR_NLC(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_NLC_SHIFT)) & ENET_RCR_NLC_MASK)
-#define ENET_RCR_GRS_MASK                        (0x80000000U)
-#define ENET_RCR_GRS_SHIFT                       (31U)
-#define ENET_RCR_GRS(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_GRS_SHIFT)) & ENET_RCR_GRS_MASK)
+#define ENET_RCR_LOOP_MASK       (0x1U)
+#define ENET_RCR_LOOP_SHIFT      (0U)
+#define ENET_RCR_LOOP(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_LOOP_SHIFT)) & ENET_RCR_LOOP_MASK)
+#define ENET_RCR_DRT_MASK        (0x2U)
+#define ENET_RCR_DRT_SHIFT       (1U)
+#define ENET_RCR_DRT(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
+#define ENET_RCR_MII_MODE_MASK   (0x4U)
+#define ENET_RCR_MII_MODE_SHIFT  (2U)
+#define ENET_RCR_MII_MODE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MII_MODE_SHIFT)) & ENET_RCR_MII_MODE_MASK)
+#define ENET_RCR_PROM_MASK       (0x8U)
+#define ENET_RCR_PROM_SHIFT      (3U)
+#define ENET_RCR_PROM(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PROM_SHIFT)) & ENET_RCR_PROM_MASK)
+#define ENET_RCR_BC_REJ_MASK     (0x10U)
+#define ENET_RCR_BC_REJ_SHIFT    (4U)
+#define ENET_RCR_BC_REJ(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_BC_REJ_SHIFT)) & ENET_RCR_BC_REJ_MASK)
+#define ENET_RCR_FCE_MASK        (0x20U)
+#define ENET_RCR_FCE_SHIFT       (5U)
+#define ENET_RCR_FCE(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_FCE_SHIFT)) & ENET_RCR_FCE_MASK)
+#define ENET_RCR_RMII_MODE_MASK  (0x100U)
+#define ENET_RCR_RMII_MODE_SHIFT (8U)
+#define ENET_RCR_RMII_MODE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_MODE_SHIFT)) & ENET_RCR_RMII_MODE_MASK)
+#define ENET_RCR_RMII_10T_MASK   (0x200U)
+#define ENET_RCR_RMII_10T_SHIFT  (9U)
+#define ENET_RCR_RMII_10T(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_10T_SHIFT)) & ENET_RCR_RMII_10T_MASK)
+#define ENET_RCR_PADEN_MASK      (0x1000U)
+#define ENET_RCR_PADEN_SHIFT     (12U)
+#define ENET_RCR_PADEN(x)        (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PADEN_SHIFT)) & ENET_RCR_PADEN_MASK)
+#define ENET_RCR_PAUFWD_MASK     (0x2000U)
+#define ENET_RCR_PAUFWD_SHIFT    (13U)
+#define ENET_RCR_PAUFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PAUFWD_SHIFT)) & ENET_RCR_PAUFWD_MASK)
+#define ENET_RCR_CRCFWD_MASK     (0x4000U)
+#define ENET_RCR_CRCFWD_SHIFT    (14U)
+#define ENET_RCR_CRCFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CRCFWD_SHIFT)) & ENET_RCR_CRCFWD_MASK)
+#define ENET_RCR_CFEN_MASK       (0x8000U)
+#define ENET_RCR_CFEN_SHIFT      (15U)
+#define ENET_RCR_CFEN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CFEN_SHIFT)) & ENET_RCR_CFEN_MASK)
+#define ENET_RCR_MAX_FL_MASK     (0x3FFF0000U)
+#define ENET_RCR_MAX_FL_SHIFT    (16U)
+#define ENET_RCR_MAX_FL(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MAX_FL_SHIFT)) & ENET_RCR_MAX_FL_MASK)
+#define ENET_RCR_NLC_MASK        (0x40000000U)
+#define ENET_RCR_NLC_SHIFT       (30U)
+#define ENET_RCR_NLC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_NLC_SHIFT)) & ENET_RCR_NLC_MASK)
+#define ENET_RCR_GRS_MASK        (0x80000000U)
+#define ENET_RCR_GRS_SHIFT       (31U)
+#define ENET_RCR_GRS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_GRS_SHIFT)) & ENET_RCR_GRS_MASK)
 /*! @} */
 
 /*! @name TCR - Transmit Control Register */
 /*! @{ */
-#define ENET_TCR_GTS_MASK                        (0x1U)
-#define ENET_TCR_GTS_SHIFT                       (0U)
-#define ENET_TCR_GTS(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_TCR_GTS_SHIFT)) & ENET_TCR_GTS_MASK)
-#define ENET_TCR_FDEN_MASK                       (0x4U)
-#define ENET_TCR_FDEN_SHIFT                      (2U)
-#define ENET_TCR_FDEN(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCR_FDEN_SHIFT)) & ENET_TCR_FDEN_MASK)
-#define ENET_TCR_TFC_PAUSE_MASK                  (0x8U)
-#define ENET_TCR_TFC_PAUSE_SHIFT                 (3U)
-#define ENET_TCR_TFC_PAUSE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_TFC_PAUSE_SHIFT)) & ENET_TCR_TFC_PAUSE_MASK)
-#define ENET_TCR_RFC_PAUSE_MASK                  (0x10U)
-#define ENET_TCR_RFC_PAUSE_SHIFT                 (4U)
-#define ENET_TCR_RFC_PAUSE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
-#define ENET_TCR_ADDSEL_MASK                     (0xE0U)
-#define ENET_TCR_ADDSEL_SHIFT                    (5U)
-#define ENET_TCR_ADDSEL(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDSEL_SHIFT)) & ENET_TCR_ADDSEL_MASK)
-#define ENET_TCR_ADDINS_MASK                     (0x100U)
-#define ENET_TCR_ADDINS_SHIFT                    (8U)
-#define ENET_TCR_ADDINS(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDINS_SHIFT)) & ENET_TCR_ADDINS_MASK)
-#define ENET_TCR_CRCFWD_MASK                     (0x200U)
-#define ENET_TCR_CRCFWD_SHIFT                    (9U)
-#define ENET_TCR_CRCFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_CRCFWD_SHIFT)) & ENET_TCR_CRCFWD_MASK)
+#define ENET_TCR_GTS_MASK        (0x1U)
+#define ENET_TCR_GTS_SHIFT       (0U)
+#define ENET_TCR_GTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_TCR_GTS_SHIFT)) & ENET_TCR_GTS_MASK)
+#define ENET_TCR_FDEN_MASK       (0x4U)
+#define ENET_TCR_FDEN_SHIFT      (2U)
+#define ENET_TCR_FDEN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_TCR_FDEN_SHIFT)) & ENET_TCR_FDEN_MASK)
+#define ENET_TCR_TFC_PAUSE_MASK  (0x8U)
+#define ENET_TCR_TFC_PAUSE_SHIFT (3U)
+#define ENET_TCR_TFC_PAUSE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_TFC_PAUSE_SHIFT)) & ENET_TCR_TFC_PAUSE_MASK)
+#define ENET_TCR_RFC_PAUSE_MASK  (0x10U)
+#define ENET_TCR_RFC_PAUSE_SHIFT (4U)
+#define ENET_TCR_RFC_PAUSE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
+#define ENET_TCR_ADDSEL_MASK     (0xE0U)
+#define ENET_TCR_ADDSEL_SHIFT    (5U)
+#define ENET_TCR_ADDSEL(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDSEL_SHIFT)) & ENET_TCR_ADDSEL_MASK)
+#define ENET_TCR_ADDINS_MASK     (0x100U)
+#define ENET_TCR_ADDINS_SHIFT    (8U)
+#define ENET_TCR_ADDINS(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDINS_SHIFT)) & ENET_TCR_ADDINS_MASK)
+#define ENET_TCR_CRCFWD_MASK     (0x200U)
+#define ENET_TCR_CRCFWD_SHIFT    (9U)
+#define ENET_TCR_CRCFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_CRCFWD_SHIFT)) & ENET_TCR_CRCFWD_MASK)
 /*! @} */
 
 /*! @name PALR - Physical Address Lower Register */
 /*! @{ */
-#define ENET_PALR_PADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_PALR_PADDR1_SHIFT                   (0U)
-#define ENET_PALR_PADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_PALR_PADDR1_SHIFT)) & ENET_PALR_PADDR1_MASK)
+#define ENET_PALR_PADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_PALR_PADDR1_SHIFT (0U)
+#define ENET_PALR_PADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_PALR_PADDR1_SHIFT)) & ENET_PALR_PADDR1_MASK)
 /*! @} */
 
 /*! @name PAUR - Physical Address Upper Register */
 /*! @{ */
-#define ENET_PAUR_TYPE_MASK                      (0xFFFFU)
-#define ENET_PAUR_TYPE_SHIFT                     (0U)
-#define ENET_PAUR_TYPE(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_TYPE_SHIFT)) & ENET_PAUR_TYPE_MASK)
-#define ENET_PAUR_PADDR2_MASK                    (0xFFFF0000U)
-#define ENET_PAUR_PADDR2_SHIFT                   (16U)
-#define ENET_PAUR_PADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_PADDR2_SHIFT)) & ENET_PAUR_PADDR2_MASK)
+#define ENET_PAUR_TYPE_MASK    (0xFFFFU)
+#define ENET_PAUR_TYPE_SHIFT   (0U)
+#define ENET_PAUR_TYPE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_TYPE_SHIFT)) & ENET_PAUR_TYPE_MASK)
+#define ENET_PAUR_PADDR2_MASK  (0xFFFF0000U)
+#define ENET_PAUR_PADDR2_SHIFT (16U)
+#define ENET_PAUR_PADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_PADDR2_SHIFT)) & ENET_PAUR_PADDR2_MASK)
 /*! @} */
 
 /*! @name OPD - Opcode/Pause Duration Register */
 /*! @{ */
-#define ENET_OPD_PAUSE_DUR_MASK                  (0xFFFFU)
-#define ENET_OPD_PAUSE_DUR_SHIFT                 (0U)
-#define ENET_OPD_PAUSE_DUR(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_OPD_PAUSE_DUR_SHIFT)) & ENET_OPD_PAUSE_DUR_MASK)
-#define ENET_OPD_OPCODE_MASK                     (0xFFFF0000U)
-#define ENET_OPD_OPCODE_SHIFT                    (16U)
-#define ENET_OPD_OPCODE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_OPD_OPCODE_SHIFT)) & ENET_OPD_OPCODE_MASK)
+#define ENET_OPD_PAUSE_DUR_MASK  (0xFFFFU)
+#define ENET_OPD_PAUSE_DUR_SHIFT (0U)
+#define ENET_OPD_PAUSE_DUR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_OPD_PAUSE_DUR_SHIFT)) & ENET_OPD_PAUSE_DUR_MASK)
+#define ENET_OPD_OPCODE_MASK     (0xFFFF0000U)
+#define ENET_OPD_OPCODE_SHIFT    (16U)
+#define ENET_OPD_OPCODE(x)       (((uint32_t)(((uint32_t)(x)) << ENET_OPD_OPCODE_SHIFT)) & ENET_OPD_OPCODE_MASK)
 /*! @} */
 
 /*! @name TXIC - Transmit Interrupt Coalescing Register */
 /*! @{ */
-#define ENET_TXIC_ICTT_MASK                      (0xFFFFU)
-#define ENET_TXIC_ICTT_SHIFT                     (0U)
-#define ENET_TXIC_ICTT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICTT_SHIFT)) & ENET_TXIC_ICTT_MASK)
-#define ENET_TXIC_ICFT_MASK                      (0xFF00000U)
-#define ENET_TXIC_ICFT_SHIFT                     (20U)
-#define ENET_TXIC_ICFT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICFT_SHIFT)) & ENET_TXIC_ICFT_MASK)
-#define ENET_TXIC_ICCS_MASK                      (0x40000000U)
-#define ENET_TXIC_ICCS_SHIFT                     (30U)
-#define ENET_TXIC_ICCS(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICCS_SHIFT)) & ENET_TXIC_ICCS_MASK)
-#define ENET_TXIC_ICEN_MASK                      (0x80000000U)
-#define ENET_TXIC_ICEN_SHIFT                     (31U)
-#define ENET_TXIC_ICEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICEN_SHIFT)) & ENET_TXIC_ICEN_MASK)
+#define ENET_TXIC_ICTT_MASK  (0xFFFFU)
+#define ENET_TXIC_ICTT_SHIFT (0U)
+#define ENET_TXIC_ICTT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICTT_SHIFT)) & ENET_TXIC_ICTT_MASK)
+#define ENET_TXIC_ICFT_MASK  (0xFF00000U)
+#define ENET_TXIC_ICFT_SHIFT (20U)
+#define ENET_TXIC_ICFT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICFT_SHIFT)) & ENET_TXIC_ICFT_MASK)
+#define ENET_TXIC_ICCS_MASK  (0x40000000U)
+#define ENET_TXIC_ICCS_SHIFT (30U)
+#define ENET_TXIC_ICCS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICCS_SHIFT)) & ENET_TXIC_ICCS_MASK)
+#define ENET_TXIC_ICEN_MASK  (0x80000000U)
+#define ENET_TXIC_ICEN_SHIFT (31U)
+#define ENET_TXIC_ICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICEN_SHIFT)) & ENET_TXIC_ICEN_MASK)
 /*! @} */
 
 /*! @name RXIC - Receive Interrupt Coalescing Register */
 /*! @{ */
-#define ENET_RXIC_ICTT_MASK                      (0xFFFFU)
-#define ENET_RXIC_ICTT_SHIFT                     (0U)
-#define ENET_RXIC_ICTT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICTT_SHIFT)) & ENET_RXIC_ICTT_MASK)
-#define ENET_RXIC_ICFT_MASK                      (0xFF00000U)
-#define ENET_RXIC_ICFT_SHIFT                     (20U)
-#define ENET_RXIC_ICFT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICFT_SHIFT)) & ENET_RXIC_ICFT_MASK)
-#define ENET_RXIC_ICCS_MASK                      (0x40000000U)
-#define ENET_RXIC_ICCS_SHIFT                     (30U)
-#define ENET_RXIC_ICCS(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICCS_SHIFT)) & ENET_RXIC_ICCS_MASK)
-#define ENET_RXIC_ICEN_MASK                      (0x80000000U)
-#define ENET_RXIC_ICEN_SHIFT                     (31U)
-#define ENET_RXIC_ICEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICEN_SHIFT)) & ENET_RXIC_ICEN_MASK)
+#define ENET_RXIC_ICTT_MASK  (0xFFFFU)
+#define ENET_RXIC_ICTT_SHIFT (0U)
+#define ENET_RXIC_ICTT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICTT_SHIFT)) & ENET_RXIC_ICTT_MASK)
+#define ENET_RXIC_ICFT_MASK  (0xFF00000U)
+#define ENET_RXIC_ICFT_SHIFT (20U)
+#define ENET_RXIC_ICFT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICFT_SHIFT)) & ENET_RXIC_ICFT_MASK)
+#define ENET_RXIC_ICCS_MASK  (0x40000000U)
+#define ENET_RXIC_ICCS_SHIFT (30U)
+#define ENET_RXIC_ICCS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICCS_SHIFT)) & ENET_RXIC_ICCS_MASK)
+#define ENET_RXIC_ICEN_MASK  (0x80000000U)
+#define ENET_RXIC_ICEN_SHIFT (31U)
+#define ENET_RXIC_ICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICEN_SHIFT)) & ENET_RXIC_ICEN_MASK)
 /*! @} */
 
 /*! @name IAUR - Descriptor Individual Upper Address Register */
 /*! @{ */
-#define ENET_IAUR_IADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_IAUR_IADDR1_SHIFT                   (0U)
-#define ENET_IAUR_IADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_IAUR_IADDR1_SHIFT)) & ENET_IAUR_IADDR1_MASK)
+#define ENET_IAUR_IADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_IAUR_IADDR1_SHIFT (0U)
+#define ENET_IAUR_IADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_IAUR_IADDR1_SHIFT)) & ENET_IAUR_IADDR1_MASK)
 /*! @} */
 
 /*! @name IALR - Descriptor Individual Lower Address Register */
 /*! @{ */
-#define ENET_IALR_IADDR2_MASK                    (0xFFFFFFFFU)
-#define ENET_IALR_IADDR2_SHIFT                   (0U)
-#define ENET_IALR_IADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_IALR_IADDR2_SHIFT)) & ENET_IALR_IADDR2_MASK)
+#define ENET_IALR_IADDR2_MASK  (0xFFFFFFFFU)
+#define ENET_IALR_IADDR2_SHIFT (0U)
+#define ENET_IALR_IADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_IALR_IADDR2_SHIFT)) & ENET_IALR_IADDR2_MASK)
 /*! @} */
 
 /*! @name GAUR - Descriptor Group Upper Address Register */
 /*! @{ */
-#define ENET_GAUR_GADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_GAUR_GADDR1_SHIFT                   (0U)
-#define ENET_GAUR_GADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_GAUR_GADDR1_SHIFT)) & ENET_GAUR_GADDR1_MASK)
+#define ENET_GAUR_GADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_GAUR_GADDR1_SHIFT (0U)
+#define ENET_GAUR_GADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_GAUR_GADDR1_SHIFT)) & ENET_GAUR_GADDR1_MASK)
 /*! @} */
 
 /*! @name GALR - Descriptor Group Lower Address Register */
 /*! @{ */
-#define ENET_GALR_GADDR2_MASK                    (0xFFFFFFFFU)
-#define ENET_GALR_GADDR2_SHIFT                   (0U)
-#define ENET_GALR_GADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_GALR_GADDR2_SHIFT)) & ENET_GALR_GADDR2_MASK)
+#define ENET_GALR_GADDR2_MASK  (0xFFFFFFFFU)
+#define ENET_GALR_GADDR2_SHIFT (0U)
+#define ENET_GALR_GADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_GALR_GADDR2_SHIFT)) & ENET_GALR_GADDR2_MASK)
 /*! @} */
 
 /*! @name TFWR - Transmit FIFO Watermark Register */
 /*! @{ */
-#define ENET_TFWR_TFWR_MASK                      (0x3FU)
-#define ENET_TFWR_TFWR_SHIFT                     (0U)
-#define ENET_TFWR_TFWR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_TFWR_SHIFT)) & ENET_TFWR_TFWR_MASK)
-#define ENET_TFWR_STRFWD_MASK                    (0x100U)
-#define ENET_TFWR_STRFWD_SHIFT                   (8U)
-#define ENET_TFWR_STRFWD(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_STRFWD_SHIFT)) & ENET_TFWR_STRFWD_MASK)
+#define ENET_TFWR_TFWR_MASK    (0x3FU)
+#define ENET_TFWR_TFWR_SHIFT   (0U)
+#define ENET_TFWR_TFWR(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_TFWR_SHIFT)) & ENET_TFWR_TFWR_MASK)
+#define ENET_TFWR_STRFWD_MASK  (0x100U)
+#define ENET_TFWR_STRFWD_SHIFT (8U)
+#define ENET_TFWR_STRFWD(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_STRFWD_SHIFT)) & ENET_TFWR_STRFWD_MASK)
 /*! @} */
 
 /*! @name RDSR - Receive Descriptor Ring Start Register */
 /*! @{ */
-#define ENET_RDSR_R_DES_START_MASK               (0xFFFFFFF8U)
-#define ENET_RDSR_R_DES_START_SHIFT              (3U)
-#define ENET_RDSR_R_DES_START(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RDSR_R_DES_START_SHIFT)) & ENET_RDSR_R_DES_START_MASK)
+#define ENET_RDSR_R_DES_START_MASK  (0xFFFFFFF8U)
+#define ENET_RDSR_R_DES_START_SHIFT (3U)
+#define ENET_RDSR_R_DES_START(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RDSR_R_DES_START_SHIFT)) & ENET_RDSR_R_DES_START_MASK)
 /*! @} */
 
 /*! @name TDSR - Transmit Buffer Descriptor Ring Start Register */
 /*! @{ */
-#define ENET_TDSR_X_DES_START_MASK               (0xFFFFFFF8U)
-#define ENET_TDSR_X_DES_START_SHIFT              (3U)
-#define ENET_TDSR_X_DES_START(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_TDSR_X_DES_START_SHIFT)) & ENET_TDSR_X_DES_START_MASK)
+#define ENET_TDSR_X_DES_START_MASK  (0xFFFFFFF8U)
+#define ENET_TDSR_X_DES_START_SHIFT (3U)
+#define ENET_TDSR_X_DES_START(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TDSR_X_DES_START_SHIFT)) & ENET_TDSR_X_DES_START_MASK)
 /*! @} */
 
 /*! @name MRBR - Maximum Receive Buffer Size Register */
 /*! @{ */
-#define ENET_MRBR_R_BUF_SIZE_MASK                (0x3FF0U)
-#define ENET_MRBR_R_BUF_SIZE_SHIFT               (4U)
-#define ENET_MRBR_R_BUF_SIZE(x)                  (((uint32_t)(((uint32_t)(x)) << ENET_MRBR_R_BUF_SIZE_SHIFT)) & ENET_MRBR_R_BUF_SIZE_MASK)
+#define ENET_MRBR_R_BUF_SIZE_MASK  (0x3FF0U)
+#define ENET_MRBR_R_BUF_SIZE_SHIFT (4U)
+#define ENET_MRBR_R_BUF_SIZE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ENET_MRBR_R_BUF_SIZE_SHIFT)) & ENET_MRBR_R_BUF_SIZE_MASK)
 /*! @} */
 
 /*! @name RSFL - Receive FIFO Section Full Threshold */
 /*! @{ */
-#define ENET_RSFL_RX_SECTION_FULL_MASK           (0xFFU)
-#define ENET_RSFL_RX_SECTION_FULL_SHIFT          (0U)
-#define ENET_RSFL_RX_SECTION_FULL(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RSFL_RX_SECTION_FULL_SHIFT)) & ENET_RSFL_RX_SECTION_FULL_MASK)
+#define ENET_RSFL_RX_SECTION_FULL_MASK  (0xFFU)
+#define ENET_RSFL_RX_SECTION_FULL_SHIFT (0U)
+#define ENET_RSFL_RX_SECTION_FULL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSFL_RX_SECTION_FULL_SHIFT)) & ENET_RSFL_RX_SECTION_FULL_MASK)
 /*! @} */
 
 /*! @name RSEM - Receive FIFO Section Empty Threshold */
 /*! @{ */
-#define ENET_RSEM_RX_SECTION_EMPTY_MASK          (0xFFU)
-#define ENET_RSEM_RX_SECTION_EMPTY_SHIFT         (0U)
-#define ENET_RSEM_RX_SECTION_EMPTY(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_RX_SECTION_EMPTY_SHIFT)) & ENET_RSEM_RX_SECTION_EMPTY_MASK)
-#define ENET_RSEM_STAT_SECTION_EMPTY_MASK        (0x1F0000U)
-#define ENET_RSEM_STAT_SECTION_EMPTY_SHIFT       (16U)
-#define ENET_RSEM_STAT_SECTION_EMPTY(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_STAT_SECTION_EMPTY_SHIFT)) & ENET_RSEM_STAT_SECTION_EMPTY_MASK)
+#define ENET_RSEM_RX_SECTION_EMPTY_MASK  (0xFFU)
+#define ENET_RSEM_RX_SECTION_EMPTY_SHIFT (0U)
+#define ENET_RSEM_RX_SECTION_EMPTY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_RX_SECTION_EMPTY_SHIFT)) & ENET_RSEM_RX_SECTION_EMPTY_MASK)
+#define ENET_RSEM_STAT_SECTION_EMPTY_MASK  (0x1F0000U)
+#define ENET_RSEM_STAT_SECTION_EMPTY_SHIFT (16U)
+#define ENET_RSEM_STAT_SECTION_EMPTY(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_STAT_SECTION_EMPTY_SHIFT)) & ENET_RSEM_STAT_SECTION_EMPTY_MASK)
 /*! @} */
 
 /*! @name RAEM - Receive FIFO Almost Empty Threshold */
 /*! @{ */
-#define ENET_RAEM_RX_ALMOST_EMPTY_MASK           (0xFFU)
-#define ENET_RAEM_RX_ALMOST_EMPTY_SHIFT          (0U)
-#define ENET_RAEM_RX_ALMOST_EMPTY(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RAEM_RX_ALMOST_EMPTY_SHIFT)) & ENET_RAEM_RX_ALMOST_EMPTY_MASK)
+#define ENET_RAEM_RX_ALMOST_EMPTY_MASK  (0xFFU)
+#define ENET_RAEM_RX_ALMOST_EMPTY_SHIFT (0U)
+#define ENET_RAEM_RX_ALMOST_EMPTY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RAEM_RX_ALMOST_EMPTY_SHIFT)) & ENET_RAEM_RX_ALMOST_EMPTY_MASK)
 /*! @} */
 
 /*! @name RAFL - Receive FIFO Almost Full Threshold */
 /*! @{ */
-#define ENET_RAFL_RX_ALMOST_FULL_MASK            (0xFFU)
-#define ENET_RAFL_RX_ALMOST_FULL_SHIFT           (0U)
-#define ENET_RAFL_RX_ALMOST_FULL(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RAFL_RX_ALMOST_FULL_SHIFT)) & ENET_RAFL_RX_ALMOST_FULL_MASK)
+#define ENET_RAFL_RX_ALMOST_FULL_MASK  (0xFFU)
+#define ENET_RAFL_RX_ALMOST_FULL_SHIFT (0U)
+#define ENET_RAFL_RX_ALMOST_FULL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RAFL_RX_ALMOST_FULL_SHIFT)) & ENET_RAFL_RX_ALMOST_FULL_MASK)
 /*! @} */
 
 /*! @name TSEM - Transmit FIFO Section Empty Threshold */
 /*! @{ */
-#define ENET_TSEM_TX_SECTION_EMPTY_MASK          (0xFFU)
-#define ENET_TSEM_TX_SECTION_EMPTY_SHIFT         (0U)
-#define ENET_TSEM_TX_SECTION_EMPTY(x)            (((uint32_t)(((uint32_t)(x)) << ENET_TSEM_TX_SECTION_EMPTY_SHIFT)) & ENET_TSEM_TX_SECTION_EMPTY_MASK)
+#define ENET_TSEM_TX_SECTION_EMPTY_MASK  (0xFFU)
+#define ENET_TSEM_TX_SECTION_EMPTY_SHIFT (0U)
+#define ENET_TSEM_TX_SECTION_EMPTY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TSEM_TX_SECTION_EMPTY_SHIFT)) & ENET_TSEM_TX_SECTION_EMPTY_MASK)
 /*! @} */
 
 /*! @name TAEM - Transmit FIFO Almost Empty Threshold */
 /*! @{ */
-#define ENET_TAEM_TX_ALMOST_EMPTY_MASK           (0xFFU)
-#define ENET_TAEM_TX_ALMOST_EMPTY_SHIFT          (0U)
-#define ENET_TAEM_TX_ALMOST_EMPTY(x)             (((uint32_t)(((uint32_t)(x)) << ENET_TAEM_TX_ALMOST_EMPTY_SHIFT)) & ENET_TAEM_TX_ALMOST_EMPTY_MASK)
+#define ENET_TAEM_TX_ALMOST_EMPTY_MASK  (0xFFU)
+#define ENET_TAEM_TX_ALMOST_EMPTY_SHIFT (0U)
+#define ENET_TAEM_TX_ALMOST_EMPTY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TAEM_TX_ALMOST_EMPTY_SHIFT)) & ENET_TAEM_TX_ALMOST_EMPTY_MASK)
 /*! @} */
 
 /*! @name TAFL - Transmit FIFO Almost Full Threshold */
 /*! @{ */
-#define ENET_TAFL_TX_ALMOST_FULL_MASK            (0xFFU)
-#define ENET_TAFL_TX_ALMOST_FULL_SHIFT           (0U)
-#define ENET_TAFL_TX_ALMOST_FULL(x)              (((uint32_t)(((uint32_t)(x)) << ENET_TAFL_TX_ALMOST_FULL_SHIFT)) & ENET_TAFL_TX_ALMOST_FULL_MASK)
+#define ENET_TAFL_TX_ALMOST_FULL_MASK  (0xFFU)
+#define ENET_TAFL_TX_ALMOST_FULL_SHIFT (0U)
+#define ENET_TAFL_TX_ALMOST_FULL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TAFL_TX_ALMOST_FULL_SHIFT)) & ENET_TAFL_TX_ALMOST_FULL_MASK)
 /*! @} */
 
 /*! @name TIPG - Transmit Inter-Packet Gap */
 /*! @{ */
-#define ENET_TIPG_IPG_MASK                       (0x1FU)
-#define ENET_TIPG_IPG_SHIFT                      (0U)
-#define ENET_TIPG_IPG(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TIPG_IPG_SHIFT)) & ENET_TIPG_IPG_MASK)
+#define ENET_TIPG_IPG_MASK  (0x1FU)
+#define ENET_TIPG_IPG_SHIFT (0U)
+#define ENET_TIPG_IPG(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TIPG_IPG_SHIFT)) & ENET_TIPG_IPG_MASK)
 /*! @} */
 
 /*! @name FTRL - Frame Truncation Length */
 /*! @{ */
-#define ENET_FTRL_TRUNC_FL_MASK                  (0x3FFFU)
-#define ENET_FTRL_TRUNC_FL_SHIFT                 (0U)
-#define ENET_FTRL_TRUNC_FL(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_FTRL_TRUNC_FL_SHIFT)) & ENET_FTRL_TRUNC_FL_MASK)
+#define ENET_FTRL_TRUNC_FL_MASK  (0x3FFFU)
+#define ENET_FTRL_TRUNC_FL_SHIFT (0U)
+#define ENET_FTRL_TRUNC_FL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_FTRL_TRUNC_FL_SHIFT)) & ENET_FTRL_TRUNC_FL_MASK)
 /*! @} */
 
 /*! @name TACC - Transmit Accelerator Function Configuration */
 /*! @{ */
-#define ENET_TACC_SHIFT16_MASK                   (0x1U)
-#define ENET_TACC_SHIFT16_SHIFT                  (0U)
-#define ENET_TACC_SHIFT16(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_TACC_SHIFT16_SHIFT)) & ENET_TACC_SHIFT16_MASK)
-#define ENET_TACC_IPCHK_MASK                     (0x8U)
-#define ENET_TACC_IPCHK_SHIFT                    (3U)
-#define ENET_TACC_IPCHK(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
-#define ENET_TACC_PROCHK_MASK                    (0x10U)
-#define ENET_TACC_PROCHK_SHIFT                   (4U)
-#define ENET_TACC_PROCHK(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_TACC_PROCHK_SHIFT)) & ENET_TACC_PROCHK_MASK)
+#define ENET_TACC_SHIFT16_MASK  (0x1U)
+#define ENET_TACC_SHIFT16_SHIFT (0U)
+#define ENET_TACC_SHIFT16(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TACC_SHIFT16_SHIFT)) & ENET_TACC_SHIFT16_MASK)
+#define ENET_TACC_IPCHK_MASK    (0x8U)
+#define ENET_TACC_IPCHK_SHIFT   (3U)
+#define ENET_TACC_IPCHK(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
+#define ENET_TACC_PROCHK_MASK   (0x10U)
+#define ENET_TACC_PROCHK_SHIFT  (4U)
+#define ENET_TACC_PROCHK(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TACC_PROCHK_SHIFT)) & ENET_TACC_PROCHK_MASK)
 /*! @} */
 
 /*! @name RACC - Receive Accelerator Function Configuration */
 /*! @{ */
-#define ENET_RACC_PADREM_MASK                    (0x1U)
-#define ENET_RACC_PADREM_SHIFT                   (0U)
-#define ENET_RACC_PADREM(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PADREM_SHIFT)) & ENET_RACC_PADREM_MASK)
-#define ENET_RACC_IPDIS_MASK                     (0x2U)
-#define ENET_RACC_IPDIS_SHIFT                    (1U)
-#define ENET_RACC_IPDIS(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RACC_IPDIS_SHIFT)) & ENET_RACC_IPDIS_MASK)
-#define ENET_RACC_PRODIS_MASK                    (0x4U)
-#define ENET_RACC_PRODIS_SHIFT                   (2U)
-#define ENET_RACC_PRODIS(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PRODIS_SHIFT)) & ENET_RACC_PRODIS_MASK)
-#define ENET_RACC_LINEDIS_MASK                   (0x40U)
-#define ENET_RACC_LINEDIS_SHIFT                  (6U)
-#define ENET_RACC_LINEDIS(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_LINEDIS_SHIFT)) & ENET_RACC_LINEDIS_MASK)
-#define ENET_RACC_SHIFT16_MASK                   (0x80U)
-#define ENET_RACC_SHIFT16_SHIFT                  (7U)
-#define ENET_RACC_SHIFT16(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_SHIFT16_SHIFT)) & ENET_RACC_SHIFT16_MASK)
+#define ENET_RACC_PADREM_MASK   (0x1U)
+#define ENET_RACC_PADREM_SHIFT  (0U)
+#define ENET_RACC_PADREM(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PADREM_SHIFT)) & ENET_RACC_PADREM_MASK)
+#define ENET_RACC_IPDIS_MASK    (0x2U)
+#define ENET_RACC_IPDIS_SHIFT   (1U)
+#define ENET_RACC_IPDIS(x)      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_IPDIS_SHIFT)) & ENET_RACC_IPDIS_MASK)
+#define ENET_RACC_PRODIS_MASK   (0x4U)
+#define ENET_RACC_PRODIS_SHIFT  (2U)
+#define ENET_RACC_PRODIS(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PRODIS_SHIFT)) & ENET_RACC_PRODIS_MASK)
+#define ENET_RACC_LINEDIS_MASK  (0x40U)
+#define ENET_RACC_LINEDIS_SHIFT (6U)
+#define ENET_RACC_LINEDIS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RACC_LINEDIS_SHIFT)) & ENET_RACC_LINEDIS_MASK)
+#define ENET_RACC_SHIFT16_MASK  (0x80U)
+#define ENET_RACC_SHIFT16_SHIFT (7U)
+#define ENET_RACC_SHIFT16(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RACC_SHIFT16_SHIFT)) & ENET_RACC_SHIFT16_MASK)
 /*! @} */
 
 /*! @name RMON_T_PACKETS - Tx Packet Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_PACKETS_TXPKTS_MASK          (0xFFFFU)
-#define ENET_RMON_T_PACKETS_TXPKTS_SHIFT         (0U)
-#define ENET_RMON_T_PACKETS_TXPKTS(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_PACKETS_TXPKTS_SHIFT)) & ENET_RMON_T_PACKETS_TXPKTS_MASK)
+#define ENET_RMON_T_PACKETS_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_PACKETS_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_PACKETS_TXPKTS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_PACKETS_TXPKTS_SHIFT)) & ENET_RMON_T_PACKETS_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_BC_PKT - Tx Broadcast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_BC_PKT_TXPKTS_MASK           (0xFFFFU)
-#define ENET_RMON_T_BC_PKT_TXPKTS_SHIFT          (0U)
-#define ENET_RMON_T_BC_PKT_TXPKTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_BC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_BC_PKT_TXPKTS_MASK)
+#define ENET_RMON_T_BC_PKT_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_BC_PKT_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_BC_PKT_TXPKTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_BC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_BC_PKT_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_MC_PKT - Tx Multicast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_MC_PKT_TXPKTS_MASK           (0xFFFFU)
-#define ENET_RMON_T_MC_PKT_TXPKTS_SHIFT          (0U)
-#define ENET_RMON_T_MC_PKT_TXPKTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_MC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_MC_PKT_TXPKTS_MASK)
+#define ENET_RMON_T_MC_PKT_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_MC_PKT_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_MC_PKT_TXPKTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_MC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_MC_PKT_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_CRC_ALIGN - Tx Packets with CRC/Align Error Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT)) & ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT)) & ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_UNDERSIZE - Tx Packets Less Than Bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_UNDERSIZE_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_UNDERSIZE_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_UNDERSIZE_TXPKTS_MASK)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_UNDERSIZE_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_OVERSIZE - Tx Packets GT MAX_FL bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_OVERSIZE_TXPKTS_MASK         (0xFFFFU)
-#define ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT        (0U)
-#define ENET_RMON_T_OVERSIZE_TXPKTS(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_OVERSIZE_TXPKTS_MASK)
+#define ENET_RMON_T_OVERSIZE_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_OVERSIZE_TXPKTS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_OVERSIZE_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_FRAG - Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_FRAG_TXPKTS_MASK             (0xFFFFU)
-#define ENET_RMON_T_FRAG_TXPKTS_SHIFT            (0U)
-#define ENET_RMON_T_FRAG_TXPKTS(x)               (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_FRAG_TXPKTS_SHIFT)) & ENET_RMON_T_FRAG_TXPKTS_MASK)
+#define ENET_RMON_T_FRAG_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_FRAG_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_FRAG_TXPKTS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_FRAG_TXPKTS_SHIFT)) & ENET_RMON_T_FRAG_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_JAB - Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_JAB_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_JAB_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_JAB_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_JAB_TXPKTS_SHIFT)) & ENET_RMON_T_JAB_TXPKTS_MASK)
+#define ENET_RMON_T_JAB_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_JAB_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_JAB_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_JAB_TXPKTS_SHIFT)) & ENET_RMON_T_JAB_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_COL - Tx Collision Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_COL_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_COL_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_COL_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_COL_TXPKTS_SHIFT)) & ENET_RMON_T_COL_TXPKTS_MASK)
+#define ENET_RMON_T_COL_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_COL_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_COL_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_COL_TXPKTS_SHIFT)) & ENET_RMON_T_COL_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P64 - Tx 64-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P64_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_P64_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_P64_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P64_TXPKTS_SHIFT)) & ENET_RMON_T_P64_TXPKTS_MASK)
+#define ENET_RMON_T_P64_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P64_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P64_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P64_TXPKTS_SHIFT)) & ENET_RMON_T_P64_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P65TO127 - Tx 65- to 127-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P65TO127_TXPKTS_MASK         (0xFFFFU)
-#define ENET_RMON_T_P65TO127_TXPKTS_SHIFT        (0U)
-#define ENET_RMON_T_P65TO127_TXPKTS(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P65TO127_TXPKTS_SHIFT)) & ENET_RMON_T_P65TO127_TXPKTS_MASK)
+#define ENET_RMON_T_P65TO127_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P65TO127_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P65TO127_TXPKTS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P65TO127_TXPKTS_SHIFT)) & ENET_RMON_T_P65TO127_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P128TO255 - Tx 128- to 255-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P128TO255_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P128TO255_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P128TO255_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P128TO255_TXPKTS_SHIFT)) & ENET_RMON_T_P128TO255_TXPKTS_MASK)
+#define ENET_RMON_T_P128TO255_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P128TO255_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P128TO255_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P128TO255_TXPKTS_SHIFT)) & ENET_RMON_T_P128TO255_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P256TO511 - Tx 256- to 511-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P256TO511_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P256TO511_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P256TO511_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P256TO511_TXPKTS_SHIFT)) & ENET_RMON_T_P256TO511_TXPKTS_MASK)
+#define ENET_RMON_T_P256TO511_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P256TO511_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P256TO511_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P256TO511_TXPKTS_SHIFT)) & ENET_RMON_T_P256TO511_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P512TO1023 - Tx 512- to 1023-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P512TO1023_TXPKTS_MASK       (0xFFFFU)
-#define ENET_RMON_T_P512TO1023_TXPKTS_SHIFT      (0U)
-#define ENET_RMON_T_P512TO1023_TXPKTS(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P512TO1023_TXPKTS_SHIFT)) & ENET_RMON_T_P512TO1023_TXPKTS_MASK)
+#define ENET_RMON_T_P512TO1023_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P512TO1023_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P512TO1023_TXPKTS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P512TO1023_TXPKTS_SHIFT)) & ENET_RMON_T_P512TO1023_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P1024TO2047 - Tx 1024- to 2047-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P1024TO2047_TXPKTS_MASK      (0xFFFFU)
-#define ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT     (0U)
-#define ENET_RMON_T_P1024TO2047_TXPKTS(x)        (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT)) & ENET_RMON_T_P1024TO2047_TXPKTS_MASK)
+#define ENET_RMON_T_P1024TO2047_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P1024TO2047_TXPKTS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT)) & ENET_RMON_T_P1024TO2047_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P_GTE2048 - Tx Packets Greater Than 2048 Bytes Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P_GTE2048_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P_GTE2048_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT)) & ENET_RMON_T_P_GTE2048_TXPKTS_MASK)
+#define ENET_RMON_T_P_GTE2048_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P_GTE2048_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT)) & ENET_RMON_T_P_GTE2048_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_OCTETS - Tx Octets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_OCTETS_TXOCTS_MASK           (0xFFFFFFFFU)
-#define ENET_RMON_T_OCTETS_TXOCTS_SHIFT          (0U)
-#define ENET_RMON_T_OCTETS_TXOCTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OCTETS_TXOCTS_SHIFT)) & ENET_RMON_T_OCTETS_TXOCTS_MASK)
+#define ENET_RMON_T_OCTETS_TXOCTS_MASK  (0xFFFFFFFFU)
+#define ENET_RMON_T_OCTETS_TXOCTS_SHIFT (0U)
+#define ENET_RMON_T_OCTETS_TXOCTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OCTETS_TXOCTS_SHIFT)) & ENET_RMON_T_OCTETS_TXOCTS_MASK)
 /*! @} */
 
 /*! @name IEEE_T_FRAME_OK - Frames Transmitted OK Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_FRAME_OK_COUNT_MASK          (0xFFFFU)
-#define ENET_IEEE_T_FRAME_OK_COUNT_SHIFT         (0U)
-#define ENET_IEEE_T_FRAME_OK_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_T_FRAME_OK_COUNT_MASK)
+#define ENET_IEEE_T_FRAME_OK_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_FRAME_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_FRAME_OK_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_T_FRAME_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_1COL - Frames Transmitted with Single Collision Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_1COL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_1COL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_1COL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_1COL_COUNT_SHIFT)) & ENET_IEEE_T_1COL_COUNT_MASK)
+#define ENET_IEEE_T_1COL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_1COL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_1COL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_1COL_COUNT_SHIFT)) & ENET_IEEE_T_1COL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_MCOL - Frames Transmitted with Multiple Collisions Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_MCOL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_MCOL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_MCOL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MCOL_COUNT_SHIFT)) & ENET_IEEE_T_MCOL_COUNT_MASK)
+#define ENET_IEEE_T_MCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_MCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_MCOL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MCOL_COUNT_SHIFT)) & ENET_IEEE_T_MCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_DEF - Frames Transmitted after Deferral Delay Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_DEF_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_T_DEF_COUNT_SHIFT              (0U)
-#define ENET_IEEE_T_DEF_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_DEF_COUNT_SHIFT)) & ENET_IEEE_T_DEF_COUNT_MASK)
+#define ENET_IEEE_T_DEF_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_DEF_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_DEF_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_DEF_COUNT_SHIFT)) & ENET_IEEE_T_DEF_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_LCOL - Frames Transmitted with Late Collision Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_LCOL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_LCOL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_LCOL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_LCOL_COUNT_SHIFT)) & ENET_IEEE_T_LCOL_COUNT_MASK)
+#define ENET_IEEE_T_LCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_LCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_LCOL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_LCOL_COUNT_SHIFT)) & ENET_IEEE_T_LCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_EXCOL - Frames Transmitted with Excessive Collisions Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_EXCOL_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_EXCOL_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_EXCOL_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_EXCOL_COUNT_SHIFT)) & ENET_IEEE_T_EXCOL_COUNT_MASK)
+#define ENET_IEEE_T_EXCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_EXCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_EXCOL_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_EXCOL_COUNT_SHIFT)) & ENET_IEEE_T_EXCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_MACERR - Frames Transmitted with Tx FIFO Underrun Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_MACERR_COUNT_MASK            (0xFFFFU)
-#define ENET_IEEE_T_MACERR_COUNT_SHIFT           (0U)
-#define ENET_IEEE_T_MACERR_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MACERR_COUNT_SHIFT)) & ENET_IEEE_T_MACERR_COUNT_MASK)
+#define ENET_IEEE_T_MACERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_MACERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_MACERR_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MACERR_COUNT_SHIFT)) & ENET_IEEE_T_MACERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_CSERR - Frames Transmitted with Carrier Sense Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_CSERR_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_CSERR_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_CSERR_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_CSERR_COUNT_SHIFT)) & ENET_IEEE_T_CSERR_COUNT_MASK)
+#define ENET_IEEE_T_CSERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_CSERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_CSERR_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_CSERR_COUNT_SHIFT)) & ENET_IEEE_T_CSERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_SQE - Reserved Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_SQE_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_T_SQE_COUNT_SHIFT              (0U)
-#define ENET_IEEE_T_SQE_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_SQE_COUNT_SHIFT)) & ENET_IEEE_T_SQE_COUNT_MASK)
+#define ENET_IEEE_T_SQE_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_SQE_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_SQE_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_SQE_COUNT_SHIFT)) & ENET_IEEE_T_SQE_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_FDXFC - Flow Control Pause Frames Transmitted Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_FDXFC_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_FDXFC_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_FDXFC_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FDXFC_COUNT_SHIFT)) & ENET_IEEE_T_FDXFC_COUNT_MASK)
+#define ENET_IEEE_T_FDXFC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_FDXFC_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_FDXFC_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FDXFC_COUNT_SHIFT)) & ENET_IEEE_T_FDXFC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_OCTETS_OK - Octet Count for Frames Transmitted w/o Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_OCTETS_OK_COUNT_MASK         (0xFFFFFFFFU)
-#define ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT        (0U)
-#define ENET_IEEE_T_OCTETS_OK_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_T_OCTETS_OK_COUNT_MASK)
+#define ENET_IEEE_T_OCTETS_OK_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_OCTETS_OK_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_T_OCTETS_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_PACKETS - Rx Packet Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_PACKETS_COUNT_MASK           (0xFFFFU)
-#define ENET_RMON_R_PACKETS_COUNT_SHIFT          (0U)
-#define ENET_RMON_R_PACKETS_COUNT(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_PACKETS_COUNT_SHIFT)) & ENET_RMON_R_PACKETS_COUNT_MASK)
+#define ENET_RMON_R_PACKETS_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_PACKETS_COUNT_SHIFT (0U)
+#define ENET_RMON_R_PACKETS_COUNT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_PACKETS_COUNT_SHIFT)) & ENET_RMON_R_PACKETS_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_BC_PKT - Rx Broadcast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_BC_PKT_COUNT_MASK            (0xFFFFU)
-#define ENET_RMON_R_BC_PKT_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_BC_PKT_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_BC_PKT_COUNT_SHIFT)) & ENET_RMON_R_BC_PKT_COUNT_MASK)
+#define ENET_RMON_R_BC_PKT_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_BC_PKT_COUNT_SHIFT (0U)
+#define ENET_RMON_R_BC_PKT_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_BC_PKT_COUNT_SHIFT)) & ENET_RMON_R_BC_PKT_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_MC_PKT - Rx Multicast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_MC_PKT_COUNT_MASK            (0xFFFFU)
-#define ENET_RMON_R_MC_PKT_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_MC_PKT_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_MC_PKT_COUNT_SHIFT)) & ENET_RMON_R_MC_PKT_COUNT_MASK)
+#define ENET_RMON_R_MC_PKT_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_MC_PKT_COUNT_SHIFT (0U)
+#define ENET_RMON_R_MC_PKT_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_MC_PKT_COUNT_SHIFT)) & ENET_RMON_R_MC_PKT_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_CRC_ALIGN - Rx Packets with CRC/Align Error Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_CRC_ALIGN_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_CRC_ALIGN_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT)) & ENET_RMON_R_CRC_ALIGN_COUNT_MASK)
+#define ENET_RMON_R_CRC_ALIGN_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT (0U)
+#define ENET_RMON_R_CRC_ALIGN_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT)) & ENET_RMON_R_CRC_ALIGN_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_UNDERSIZE - Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_UNDERSIZE_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_UNDERSIZE_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_UNDERSIZE_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_UNDERSIZE_COUNT_SHIFT)) & ENET_RMON_R_UNDERSIZE_COUNT_MASK)
+#define ENET_RMON_R_UNDERSIZE_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_UNDERSIZE_COUNT_SHIFT (0U)
+#define ENET_RMON_R_UNDERSIZE_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_UNDERSIZE_COUNT_SHIFT)) & ENET_RMON_R_UNDERSIZE_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_OVERSIZE - Rx Packets Greater Than MAX_FL and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_OVERSIZE_COUNT_MASK          (0xFFFFU)
-#define ENET_RMON_R_OVERSIZE_COUNT_SHIFT         (0U)
-#define ENET_RMON_R_OVERSIZE_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OVERSIZE_COUNT_SHIFT)) & ENET_RMON_R_OVERSIZE_COUNT_MASK)
+#define ENET_RMON_R_OVERSIZE_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_OVERSIZE_COUNT_SHIFT (0U)
+#define ENET_RMON_R_OVERSIZE_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OVERSIZE_COUNT_SHIFT)) & ENET_RMON_R_OVERSIZE_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_FRAG - Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_FRAG_COUNT_MASK              (0xFFFFU)
-#define ENET_RMON_R_FRAG_COUNT_SHIFT             (0U)
-#define ENET_RMON_R_FRAG_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_FRAG_COUNT_SHIFT)) & ENET_RMON_R_FRAG_COUNT_MASK)
+#define ENET_RMON_R_FRAG_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_FRAG_COUNT_SHIFT (0U)
+#define ENET_RMON_R_FRAG_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_FRAG_COUNT_SHIFT)) & ENET_RMON_R_FRAG_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_JAB - Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_JAB_COUNT_MASK               (0xFFFFU)
-#define ENET_RMON_R_JAB_COUNT_SHIFT              (0U)
-#define ENET_RMON_R_JAB_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_JAB_COUNT_SHIFT)) & ENET_RMON_R_JAB_COUNT_MASK)
+#define ENET_RMON_R_JAB_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_JAB_COUNT_SHIFT (0U)
+#define ENET_RMON_R_JAB_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_JAB_COUNT_SHIFT)) & ENET_RMON_R_JAB_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P64 - Rx 64-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P64_COUNT_MASK               (0xFFFFU)
-#define ENET_RMON_R_P64_COUNT_SHIFT              (0U)
-#define ENET_RMON_R_P64_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P64_COUNT_SHIFT)) & ENET_RMON_R_P64_COUNT_MASK)
+#define ENET_RMON_R_P64_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P64_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P64_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P64_COUNT_SHIFT)) & ENET_RMON_R_P64_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P65TO127 - Rx 65- to 127-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P65TO127_COUNT_MASK          (0xFFFFU)
-#define ENET_RMON_R_P65TO127_COUNT_SHIFT         (0U)
-#define ENET_RMON_R_P65TO127_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P65TO127_COUNT_SHIFT)) & ENET_RMON_R_P65TO127_COUNT_MASK)
+#define ENET_RMON_R_P65TO127_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P65TO127_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P65TO127_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P65TO127_COUNT_SHIFT)) & ENET_RMON_R_P65TO127_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P128TO255 - Rx 128- to 255-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P128TO255_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P128TO255_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P128TO255_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P128TO255_COUNT_SHIFT)) & ENET_RMON_R_P128TO255_COUNT_MASK)
+#define ENET_RMON_R_P128TO255_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P128TO255_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P128TO255_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P128TO255_COUNT_SHIFT)) & ENET_RMON_R_P128TO255_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P256TO511 - Rx 256- to 511-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P256TO511_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P256TO511_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P256TO511_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P256TO511_COUNT_SHIFT)) & ENET_RMON_R_P256TO511_COUNT_MASK)
+#define ENET_RMON_R_P256TO511_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P256TO511_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P256TO511_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P256TO511_COUNT_SHIFT)) & ENET_RMON_R_P256TO511_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P512TO1023 - Rx 512- to 1023-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P512TO1023_COUNT_MASK        (0xFFFFU)
-#define ENET_RMON_R_P512TO1023_COUNT_SHIFT       (0U)
-#define ENET_RMON_R_P512TO1023_COUNT(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P512TO1023_COUNT_SHIFT)) & ENET_RMON_R_P512TO1023_COUNT_MASK)
+#define ENET_RMON_R_P512TO1023_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P512TO1023_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P512TO1023_COUNT(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P512TO1023_COUNT_SHIFT)) & ENET_RMON_R_P512TO1023_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P1024TO2047 - Rx 1024- to 2047-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P1024TO2047_COUNT_MASK       (0xFFFFU)
-#define ENET_RMON_R_P1024TO2047_COUNT_SHIFT      (0U)
-#define ENET_RMON_R_P1024TO2047_COUNT(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P1024TO2047_COUNT_SHIFT)) & ENET_RMON_R_P1024TO2047_COUNT_MASK)
+#define ENET_RMON_R_P1024TO2047_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P1024TO2047_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P1024TO2047_COUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P1024TO2047_COUNT_SHIFT)) & ENET_RMON_R_P1024TO2047_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P_GTE2048 - Rx Packets Greater than 2048 Bytes Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P_GTE2048_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P_GTE2048_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P_GTE2048_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P_GTE2048_COUNT_SHIFT)) & ENET_RMON_R_P_GTE2048_COUNT_MASK)
+#define ENET_RMON_R_P_GTE2048_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P_GTE2048_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P_GTE2048_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P_GTE2048_COUNT_SHIFT)) & ENET_RMON_R_P_GTE2048_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_OCTETS - Rx Octets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_OCTETS_COUNT_MASK            (0xFFFFFFFFU)
-#define ENET_RMON_R_OCTETS_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_OCTETS_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OCTETS_COUNT_SHIFT)) & ENET_RMON_R_OCTETS_COUNT_MASK)
+#define ENET_RMON_R_OCTETS_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_RMON_R_OCTETS_COUNT_SHIFT (0U)
+#define ENET_RMON_R_OCTETS_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OCTETS_COUNT_SHIFT)) & ENET_RMON_R_OCTETS_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_DROP - Frames not Counted Correctly Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_DROP_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_R_DROP_COUNT_SHIFT             (0U)
-#define ENET_IEEE_R_DROP_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_DROP_COUNT_SHIFT)) & ENET_IEEE_R_DROP_COUNT_MASK)
+#define ENET_IEEE_R_DROP_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_DROP_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_DROP_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_DROP_COUNT_SHIFT)) & ENET_IEEE_R_DROP_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_FRAME_OK - Frames Received OK Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_FRAME_OK_COUNT_MASK          (0xFFFFU)
-#define ENET_IEEE_R_FRAME_OK_COUNT_SHIFT         (0U)
-#define ENET_IEEE_R_FRAME_OK_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_R_FRAME_OK_COUNT_MASK)
+#define ENET_IEEE_R_FRAME_OK_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_FRAME_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_FRAME_OK_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_R_FRAME_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_CRC - Frames Received with CRC Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_CRC_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_R_CRC_COUNT_SHIFT              (0U)
-#define ENET_IEEE_R_CRC_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_CRC_COUNT_SHIFT)) & ENET_IEEE_R_CRC_COUNT_MASK)
+#define ENET_IEEE_R_CRC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_CRC_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_CRC_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_CRC_COUNT_SHIFT)) & ENET_IEEE_R_CRC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_ALIGN - Frames Received with Alignment Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_ALIGN_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_R_ALIGN_COUNT_SHIFT            (0U)
-#define ENET_IEEE_R_ALIGN_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_ALIGN_COUNT_SHIFT)) & ENET_IEEE_R_ALIGN_COUNT_MASK)
+#define ENET_IEEE_R_ALIGN_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_ALIGN_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_ALIGN_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_ALIGN_COUNT_SHIFT)) & ENET_IEEE_R_ALIGN_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_MACERR - Receive FIFO Overflow Count Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_MACERR_COUNT_MASK            (0xFFFFU)
-#define ENET_IEEE_R_MACERR_COUNT_SHIFT           (0U)
-#define ENET_IEEE_R_MACERR_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_MACERR_COUNT_SHIFT)) & ENET_IEEE_R_MACERR_COUNT_MASK)
+#define ENET_IEEE_R_MACERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_MACERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_MACERR_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_MACERR_COUNT_SHIFT)) & ENET_IEEE_R_MACERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_FDXFC - Flow Control Pause Frames Received Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_FDXFC_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_R_FDXFC_COUNT_SHIFT            (0U)
-#define ENET_IEEE_R_FDXFC_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FDXFC_COUNT_SHIFT)) & ENET_IEEE_R_FDXFC_COUNT_MASK)
+#define ENET_IEEE_R_FDXFC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_FDXFC_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_FDXFC_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FDXFC_COUNT_SHIFT)) & ENET_IEEE_R_FDXFC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_OCTETS_OK - Octet Count for Frames Received without Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_OCTETS_OK_COUNT_MASK         (0xFFFFFFFFU)
-#define ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT        (0U)
-#define ENET_IEEE_R_OCTETS_OK_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_R_OCTETS_OK_COUNT_MASK)
+#define ENET_IEEE_R_OCTETS_OK_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_OCTETS_OK_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_R_OCTETS_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name ATCR - Adjustable Timer Control Register */
 /*! @{ */
-#define ENET_ATCR_EN_MASK                        (0x1U)
-#define ENET_ATCR_EN_SHIFT                       (0U)
-#define ENET_ATCR_EN(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_EN_SHIFT)) & ENET_ATCR_EN_MASK)
-#define ENET_ATCR_OFFEN_MASK                     (0x4U)
-#define ENET_ATCR_OFFEN_SHIFT                    (2U)
-#define ENET_ATCR_OFFEN(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFEN_SHIFT)) & ENET_ATCR_OFFEN_MASK)
-#define ENET_ATCR_OFFRST_MASK                    (0x8U)
-#define ENET_ATCR_OFFRST_SHIFT                   (3U)
-#define ENET_ATCR_OFFRST(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFRST_SHIFT)) & ENET_ATCR_OFFRST_MASK)
-#define ENET_ATCR_PEREN_MASK                     (0x10U)
-#define ENET_ATCR_PEREN_SHIFT                    (4U)
-#define ENET_ATCR_PEREN(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PEREN_SHIFT)) & ENET_ATCR_PEREN_MASK)
-#define ENET_ATCR_PINPER_MASK                    (0x80U)
-#define ENET_ATCR_PINPER_SHIFT                   (7U)
-#define ENET_ATCR_PINPER(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PINPER_SHIFT)) & ENET_ATCR_PINPER_MASK)
-#define ENET_ATCR_RESTART_MASK                   (0x200U)
-#define ENET_ATCR_RESTART_SHIFT                  (9U)
-#define ENET_ATCR_RESTART(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_RESTART_SHIFT)) & ENET_ATCR_RESTART_MASK)
-#define ENET_ATCR_CAPTURE_MASK                   (0x800U)
-#define ENET_ATCR_CAPTURE_SHIFT                  (11U)
-#define ENET_ATCR_CAPTURE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_CAPTURE_SHIFT)) & ENET_ATCR_CAPTURE_MASK)
-#define ENET_ATCR_SLAVE_MASK                     (0x2000U)
-#define ENET_ATCR_SLAVE_SHIFT                    (13U)
-#define ENET_ATCR_SLAVE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_SLAVE_SHIFT)) & ENET_ATCR_SLAVE_MASK)
+#define ENET_ATCR_EN_MASK       (0x1U)
+#define ENET_ATCR_EN_SHIFT      (0U)
+#define ENET_ATCR_EN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_EN_SHIFT)) & ENET_ATCR_EN_MASK)
+#define ENET_ATCR_OFFEN_MASK    (0x4U)
+#define ENET_ATCR_OFFEN_SHIFT   (2U)
+#define ENET_ATCR_OFFEN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFEN_SHIFT)) & ENET_ATCR_OFFEN_MASK)
+#define ENET_ATCR_OFFRST_MASK   (0x8U)
+#define ENET_ATCR_OFFRST_SHIFT  (3U)
+#define ENET_ATCR_OFFRST(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFRST_SHIFT)) & ENET_ATCR_OFFRST_MASK)
+#define ENET_ATCR_PEREN_MASK    (0x10U)
+#define ENET_ATCR_PEREN_SHIFT   (4U)
+#define ENET_ATCR_PEREN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PEREN_SHIFT)) & ENET_ATCR_PEREN_MASK)
+#define ENET_ATCR_PINPER_MASK   (0x80U)
+#define ENET_ATCR_PINPER_SHIFT  (7U)
+#define ENET_ATCR_PINPER(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PINPER_SHIFT)) & ENET_ATCR_PINPER_MASK)
+#define ENET_ATCR_RESTART_MASK  (0x200U)
+#define ENET_ATCR_RESTART_SHIFT (9U)
+#define ENET_ATCR_RESTART(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_RESTART_SHIFT)) & ENET_ATCR_RESTART_MASK)
+#define ENET_ATCR_CAPTURE_MASK  (0x800U)
+#define ENET_ATCR_CAPTURE_SHIFT (11U)
+#define ENET_ATCR_CAPTURE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_CAPTURE_SHIFT)) & ENET_ATCR_CAPTURE_MASK)
+#define ENET_ATCR_SLAVE_MASK    (0x2000U)
+#define ENET_ATCR_SLAVE_SHIFT   (13U)
+#define ENET_ATCR_SLAVE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_SLAVE_SHIFT)) & ENET_ATCR_SLAVE_MASK)
 /*! @} */
 
 /*! @name ATVR - Timer Value Register */
 /*! @{ */
-#define ENET_ATVR_ATIME_MASK                     (0xFFFFFFFFU)
-#define ENET_ATVR_ATIME_SHIFT                    (0U)
-#define ENET_ATVR_ATIME(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATVR_ATIME_SHIFT)) & ENET_ATVR_ATIME_MASK)
+#define ENET_ATVR_ATIME_MASK  (0xFFFFFFFFU)
+#define ENET_ATVR_ATIME_SHIFT (0U)
+#define ENET_ATVR_ATIME(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATVR_ATIME_SHIFT)) & ENET_ATVR_ATIME_MASK)
 /*! @} */
 
 /*! @name ATOFF - Timer Offset Register */
 /*! @{ */
-#define ENET_ATOFF_OFFSET_MASK                   (0xFFFFFFFFU)
-#define ENET_ATOFF_OFFSET_SHIFT                  (0U)
-#define ENET_ATOFF_OFFSET(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATOFF_OFFSET_SHIFT)) & ENET_ATOFF_OFFSET_MASK)
+#define ENET_ATOFF_OFFSET_MASK  (0xFFFFFFFFU)
+#define ENET_ATOFF_OFFSET_SHIFT (0U)
+#define ENET_ATOFF_OFFSET(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATOFF_OFFSET_SHIFT)) & ENET_ATOFF_OFFSET_MASK)
 /*! @} */
 
 /*! @name ATPER - Timer Period Register */
 /*! @{ */
-#define ENET_ATPER_PERIOD_MASK                   (0xFFFFFFFFU)
-#define ENET_ATPER_PERIOD_SHIFT                  (0U)
-#define ENET_ATPER_PERIOD(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATPER_PERIOD_SHIFT)) & ENET_ATPER_PERIOD_MASK)
+#define ENET_ATPER_PERIOD_MASK  (0xFFFFFFFFU)
+#define ENET_ATPER_PERIOD_SHIFT (0U)
+#define ENET_ATPER_PERIOD(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATPER_PERIOD_SHIFT)) & ENET_ATPER_PERIOD_MASK)
 /*! @} */
 
 /*! @name ATCOR - Timer Correction Register */
 /*! @{ */
-#define ENET_ATCOR_COR_MASK                      (0x7FFFFFFFU)
-#define ENET_ATCOR_COR_SHIFT                     (0U)
-#define ENET_ATCOR_COR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ATCOR_COR_SHIFT)) & ENET_ATCOR_COR_MASK)
+#define ENET_ATCOR_COR_MASK  (0x7FFFFFFFU)
+#define ENET_ATCOR_COR_SHIFT (0U)
+#define ENET_ATCOR_COR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCOR_COR_SHIFT)) & ENET_ATCOR_COR_MASK)
 /*! @} */
 
 /*! @name ATINC - Time-Stamping Clock Period Register */
 /*! @{ */
-#define ENET_ATINC_INC_MASK                      (0x7FU)
-#define ENET_ATINC_INC_SHIFT                     (0U)
-#define ENET_ATINC_INC(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_SHIFT)) & ENET_ATINC_INC_MASK)
-#define ENET_ATINC_INC_CORR_MASK                 (0x7F00U)
-#define ENET_ATINC_INC_CORR_SHIFT                (8U)
-#define ENET_ATINC_INC_CORR(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_CORR_SHIFT)) & ENET_ATINC_INC_CORR_MASK)
+#define ENET_ATINC_INC_MASK       (0x7FU)
+#define ENET_ATINC_INC_SHIFT      (0U)
+#define ENET_ATINC_INC(x)         (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_SHIFT)) & ENET_ATINC_INC_MASK)
+#define ENET_ATINC_INC_CORR_MASK  (0x7F00U)
+#define ENET_ATINC_INC_CORR_SHIFT (8U)
+#define ENET_ATINC_INC_CORR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_CORR_SHIFT)) & ENET_ATINC_INC_CORR_MASK)
 /*! @} */
 
 /*! @name ATSTMP - Timestamp of Last Transmitted Frame */
 /*! @{ */
-#define ENET_ATSTMP_TIMESTAMP_MASK               (0xFFFFFFFFU)
-#define ENET_ATSTMP_TIMESTAMP_SHIFT              (0U)
-#define ENET_ATSTMP_TIMESTAMP(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_ATSTMP_TIMESTAMP_SHIFT)) & ENET_ATSTMP_TIMESTAMP_MASK)
+#define ENET_ATSTMP_TIMESTAMP_MASK  (0xFFFFFFFFU)
+#define ENET_ATSTMP_TIMESTAMP_SHIFT (0U)
+#define ENET_ATSTMP_TIMESTAMP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_ATSTMP_TIMESTAMP_SHIFT)) & ENET_ATSTMP_TIMESTAMP_MASK)
 /*! @} */
 
 /*! @name TGSR - Timer Global Status Register */
 /*! @{ */
-#define ENET_TGSR_TF0_MASK                       (0x1U)
-#define ENET_TGSR_TF0_SHIFT                      (0U)
-#define ENET_TGSR_TF0(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF0_SHIFT)) & ENET_TGSR_TF0_MASK)
-#define ENET_TGSR_TF1_MASK                       (0x2U)
-#define ENET_TGSR_TF1_SHIFT                      (1U)
-#define ENET_TGSR_TF1(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF1_SHIFT)) & ENET_TGSR_TF1_MASK)
-#define ENET_TGSR_TF2_MASK                       (0x4U)
-#define ENET_TGSR_TF2_SHIFT                      (2U)
-#define ENET_TGSR_TF2(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF2_SHIFT)) & ENET_TGSR_TF2_MASK)
-#define ENET_TGSR_TF3_MASK                       (0x8U)
-#define ENET_TGSR_TF3_SHIFT                      (3U)
-#define ENET_TGSR_TF3(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF3_SHIFT)) & ENET_TGSR_TF3_MASK)
+#define ENET_TGSR_TF0_MASK  (0x1U)
+#define ENET_TGSR_TF0_SHIFT (0U)
+#define ENET_TGSR_TF0(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF0_SHIFT)) & ENET_TGSR_TF0_MASK)
+#define ENET_TGSR_TF1_MASK  (0x2U)
+#define ENET_TGSR_TF1_SHIFT (1U)
+#define ENET_TGSR_TF1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF1_SHIFT)) & ENET_TGSR_TF1_MASK)
+#define ENET_TGSR_TF2_MASK  (0x4U)
+#define ENET_TGSR_TF2_SHIFT (2U)
+#define ENET_TGSR_TF2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF2_SHIFT)) & ENET_TGSR_TF2_MASK)
+#define ENET_TGSR_TF3_MASK  (0x8U)
+#define ENET_TGSR_TF3_SHIFT (3U)
+#define ENET_TGSR_TF3(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF3_SHIFT)) & ENET_TGSR_TF3_MASK)
 /*! @} */
 
 /*! @name TCSR - Timer Control Status Register */
 /*! @{ */
-#define ENET_TCSR_TDRE_MASK                      (0x1U)
-#define ENET_TCSR_TDRE_SHIFT                     (0U)
-#define ENET_TCSR_TDRE(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TDRE_SHIFT)) & ENET_TCSR_TDRE_MASK)
-#define ENET_TCSR_TMODE_MASK                     (0x3CU)
-#define ENET_TCSR_TMODE_SHIFT                    (2U)
-#define ENET_TCSR_TMODE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TMODE_SHIFT)) & ENET_TCSR_TMODE_MASK)
-#define ENET_TCSR_TIE_MASK                       (0x40U)
-#define ENET_TCSR_TIE_SHIFT                      (6U)
-#define ENET_TCSR_TIE(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TIE_SHIFT)) & ENET_TCSR_TIE_MASK)
-#define ENET_TCSR_TF_MASK                        (0x80U)
-#define ENET_TCSR_TF_SHIFT                       (7U)
-#define ENET_TCSR_TF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TF_SHIFT)) & ENET_TCSR_TF_MASK)
-#define ENET_TCSR_TPWC_MASK                      (0xF800U)
-#define ENET_TCSR_TPWC_SHIFT                     (11U)
-#define ENET_TCSR_TPWC(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TPWC_SHIFT)) & ENET_TCSR_TPWC_MASK)
+#define ENET_TCSR_TDRE_MASK   (0x1U)
+#define ENET_TCSR_TDRE_SHIFT  (0U)
+#define ENET_TCSR_TDRE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TDRE_SHIFT)) & ENET_TCSR_TDRE_MASK)
+#define ENET_TCSR_TMODE_MASK  (0x3CU)
+#define ENET_TCSR_TMODE_SHIFT (2U)
+#define ENET_TCSR_TMODE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TMODE_SHIFT)) & ENET_TCSR_TMODE_MASK)
+#define ENET_TCSR_TIE_MASK    (0x40U)
+#define ENET_TCSR_TIE_SHIFT   (6U)
+#define ENET_TCSR_TIE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TIE_SHIFT)) & ENET_TCSR_TIE_MASK)
+#define ENET_TCSR_TF_MASK     (0x80U)
+#define ENET_TCSR_TF_SHIFT    (7U)
+#define ENET_TCSR_TF(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TF_SHIFT)) & ENET_TCSR_TF_MASK)
+#define ENET_TCSR_TPWC_MASK   (0xF800U)
+#define ENET_TCSR_TPWC_SHIFT  (11U)
+#define ENET_TCSR_TPWC(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TPWC_SHIFT)) & ENET_TCSR_TPWC_MASK)
 /*! @} */
 
 /* The count of ENET_TCSR */
-#define ENET_TCSR_COUNT                          (4U)
+#define ENET_TCSR_COUNT (4U)
 
 /*! @name TCCR - Timer Compare Capture Register */
 /*! @{ */
-#define ENET_TCCR_TCC_MASK                       (0xFFFFFFFFU)
-#define ENET_TCCR_TCC_SHIFT                      (0U)
-#define ENET_TCCR_TCC(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCCR_TCC_SHIFT)) & ENET_TCCR_TCC_MASK)
+#define ENET_TCCR_TCC_MASK  (0xFFFFFFFFU)
+#define ENET_TCCR_TCC_SHIFT (0U)
+#define ENET_TCCR_TCC(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCCR_TCC_SHIFT)) & ENET_TCCR_TCC_MASK)
 /*! @} */
 
 /* The count of ENET_TCCR */
-#define ENET_TCCR_COUNT                          (4U)
-
+#define ENET_TCCR_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group ENET_Register_Masks */
 
-
 /* ENET - Peripheral instance base addresses */
 /** Peripheral ENET base address */
-#define ENET_BASE                                (0x402D8000u)
+#define ENET_BASE (0x402D8000u)
 /** Peripheral ENET base pointer */
-#define ENET                                     ((ENET_Type *)ENET_BASE)
+#define ENET ((ENET_Type *)ENET_BASE)
 /** Array initializer of ENET peripheral base addresses */
-#define ENET_BASE_ADDRS                          { ENET_BASE }
+#define ENET_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        ENET_BASE                                                                                                      \
+    }
 /** Array initializer of ENET peripheral base pointers */
-#define ENET_BASE_PTRS                           { ENET }
+#define ENET_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        ENET                                                                                                           \
+    }
 /** Interrupt vectors for the ENET peripheral type */
-#define ENET_Transmit_IRQS                       { ENET_IRQn }
-#define ENET_Receive_IRQS                        { ENET_IRQn }
-#define ENET_Error_IRQS                          { ENET_IRQn }
-#define ENET_1588_Timer_IRQS                     { ENET_1588_Timer_IRQn }
+#define ENET_Transmit_IRQS                                                                                             \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_Receive_IRQS                                                                                              \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_Error_IRQS                                                                                                \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_1588_Timer_IRQS                                                                                           \
+    {                                                                                                                  \
+        ENET_1588_Timer_IRQn                                                                                           \
+    }
 /* ENET Buffer Descriptor and Buffer Address Alignment. */
-#define ENET_BUFF_ALIGNMENT                      (64U)
-
+#define ENET_BUFF_ALIGNMENT (64U)
 
 /*!
  * @}
  */ /* end of group ENET_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- EWM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10122,13 +11537,14 @@ typedef struct {
  */
 
 /** EWM - Register Layout Typedef */
-typedef struct {
-  __IO uint8_t CTRL;                               /**< Control Register, offset: 0x0 */
-  __O  uint8_t SERV;                               /**< Service Register, offset: 0x1 */
-  __IO uint8_t CMPL;                               /**< Compare Low Register, offset: 0x2 */
-  __IO uint8_t CMPH;                               /**< Compare High Register, offset: 0x3 */
-  __IO uint8_t CLKCTRL;                            /**< Clock Control Register, offset: 0x4 */
-  __IO uint8_t CLKPRESCALER;                       /**< Clock Prescaler Register, offset: 0x5 */
+typedef struct
+{
+    __IO uint8_t CTRL;         /**< Control Register, offset: 0x0 */
+    __O uint8_t SERV;          /**< Service Register, offset: 0x1 */
+    __IO uint8_t CMPL;         /**< Compare Low Register, offset: 0x2 */
+    __IO uint8_t CMPH;         /**< Compare High Register, offset: 0x3 */
+    __IO uint8_t CLKCTRL;      /**< Clock Control Register, offset: 0x4 */
+    __IO uint8_t CLKPRESCALER; /**< Clock Prescaler Register, offset: 0x5 */
 } EWM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10142,78 +11558,85 @@ typedef struct {
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define EWM_CTRL_EWMEN_MASK                      (0x1U)
-#define EWM_CTRL_EWMEN_SHIFT                     (0U)
-#define EWM_CTRL_EWMEN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
-#define EWM_CTRL_ASSIN_MASK                      (0x2U)
-#define EWM_CTRL_ASSIN_SHIFT                     (1U)
-#define EWM_CTRL_ASSIN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
-#define EWM_CTRL_INEN_MASK                       (0x4U)
-#define EWM_CTRL_INEN_SHIFT                      (2U)
-#define EWM_CTRL_INEN(x)                         (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
-#define EWM_CTRL_INTEN_MASK                      (0x8U)
-#define EWM_CTRL_INTEN_SHIFT                     (3U)
-#define EWM_CTRL_INTEN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
+#define EWM_CTRL_EWMEN_MASK  (0x1U)
+#define EWM_CTRL_EWMEN_SHIFT (0U)
+#define EWM_CTRL_EWMEN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
+#define EWM_CTRL_ASSIN_MASK  (0x2U)
+#define EWM_CTRL_ASSIN_SHIFT (1U)
+#define EWM_CTRL_ASSIN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
+#define EWM_CTRL_INEN_MASK   (0x4U)
+#define EWM_CTRL_INEN_SHIFT  (2U)
+#define EWM_CTRL_INEN(x)     (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
+#define EWM_CTRL_INTEN_MASK  (0x8U)
+#define EWM_CTRL_INTEN_SHIFT (3U)
+#define EWM_CTRL_INTEN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 /*! @} */
 
 /*! @name SERV - Service Register */
 /*! @{ */
-#define EWM_SERV_SERVICE_MASK                    (0xFFU)
-#define EWM_SERV_SERVICE_SHIFT                   (0U)
-#define EWM_SERV_SERVICE(x)                      (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
+#define EWM_SERV_SERVICE_MASK  (0xFFU)
+#define EWM_SERV_SERVICE_SHIFT (0U)
+#define EWM_SERV_SERVICE(x)    (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 /*! @} */
 
 /*! @name CMPL - Compare Low Register */
 /*! @{ */
-#define EWM_CMPL_COMPAREL_MASK                   (0xFFU)
-#define EWM_CMPL_COMPAREL_SHIFT                  (0U)
-#define EWM_CMPL_COMPAREL(x)                     (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
+#define EWM_CMPL_COMPAREL_MASK  (0xFFU)
+#define EWM_CMPL_COMPAREL_SHIFT (0U)
+#define EWM_CMPL_COMPAREL(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 /*! @} */
 
 /*! @name CMPH - Compare High Register */
 /*! @{ */
-#define EWM_CMPH_COMPAREH_MASK                   (0xFFU)
-#define EWM_CMPH_COMPAREH_SHIFT                  (0U)
-#define EWM_CMPH_COMPAREH(x)                     (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
+#define EWM_CMPH_COMPAREH_MASK  (0xFFU)
+#define EWM_CMPH_COMPAREH_SHIFT (0U)
+#define EWM_CMPH_COMPAREH(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 /*! @} */
 
 /*! @name CLKCTRL - Clock Control Register */
 /*! @{ */
-#define EWM_CLKCTRL_CLKSEL_MASK                  (0x3U)
-#define EWM_CLKCTRL_CLKSEL_SHIFT                 (0U)
-#define EWM_CLKCTRL_CLKSEL(x)                    (((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)
+#define EWM_CLKCTRL_CLKSEL_MASK  (0x3U)
+#define EWM_CLKCTRL_CLKSEL_SHIFT (0U)
+#define EWM_CLKCTRL_CLKSEL(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)
 /*! @} */
 
 /*! @name CLKPRESCALER - Clock Prescaler Register */
 /*! @{ */
-#define EWM_CLKPRESCALER_CLK_DIV_MASK            (0xFFU)
-#define EWM_CLKPRESCALER_CLK_DIV_SHIFT           (0U)
-#define EWM_CLKPRESCALER_CLK_DIV(x)              (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
+#define EWM_CLKPRESCALER_CLK_DIV_MASK  (0xFFU)
+#define EWM_CLKPRESCALER_CLK_DIV_SHIFT (0U)
+#define EWM_CLKPRESCALER_CLK_DIV(x)                                                                                    \
+    (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group EWM_Register_Masks */
 
-
 /* EWM - Peripheral instance base addresses */
 /** Peripheral EWM base address */
-#define EWM_BASE                                 (0x400B4000u)
+#define EWM_BASE (0x400B4000u)
 /** Peripheral EWM base pointer */
-#define EWM                                      ((EWM_Type *)EWM_BASE)
+#define EWM ((EWM_Type *)EWM_BASE)
 /** Array initializer of EWM peripheral base addresses */
-#define EWM_BASE_ADDRS                           { EWM_BASE }
+#define EWM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        EWM_BASE                                                                                                       \
+    }
 /** Array initializer of EWM peripheral base pointers */
-#define EWM_BASE_PTRS                            { EWM }
+#define EWM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        EWM                                                                                                            \
+    }
 /** Interrupt vectors for the EWM peripheral type */
-#define EWM_IRQS                                 { EWM_IRQn }
+#define EWM_IRQS                                                                                                       \
+    {                                                                                                                  \
+        EWM_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group EWM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXIO Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10224,46 +11647,50 @@ typedef struct {
  */
 
 /** FLEXIO - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t CTRL;                              /**< FlexIO Control Register, offset: 0x8 */
-  __I  uint32_t PIN;                               /**< Pin State Register, offset: 0xC */
-  __IO uint32_t SHIFTSTAT;                         /**< Shifter Status Register, offset: 0x10 */
-  __IO uint32_t SHIFTERR;                          /**< Shifter Error Register, offset: 0x14 */
-  __IO uint32_t TIMSTAT;                           /**< Timer Status Register, offset: 0x18 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t SHIFTSIEN;                         /**< Shifter Status Interrupt Enable, offset: 0x20 */
-  __IO uint32_t SHIFTEIEN;                         /**< Shifter Error Interrupt Enable, offset: 0x24 */
-  __IO uint32_t TIMIEN;                            /**< Timer Interrupt Enable Register, offset: 0x28 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t SHIFTSDEN;                         /**< Shifter Status DMA Enable, offset: 0x30 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t SHIFTSTATE;                        /**< Shifter State Register, offset: 0x40 */
-       uint8_t RESERVED_3[60];
-  __IO uint32_t SHIFTCTL[4];                       /**< Shifter Control N Register, array offset: 0x80, array step: 0x4 */
-       uint8_t RESERVED_4[112];
-  __IO uint32_t SHIFTCFG[4];                       /**< Shifter Configuration N Register, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_5[240];
-  __IO uint32_t SHIFTBUF[4];                       /**< Shifter Buffer N Register, array offset: 0x200, array step: 0x4 */
-       uint8_t RESERVED_6[112];
-  __IO uint32_t SHIFTBUFBIS[4];                    /**< Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4 */
-       uint8_t RESERVED_7[112];
-  __IO uint32_t SHIFTBUFBYS[4];                    /**< Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4 */
-       uint8_t RESERVED_8[112];
-  __IO uint32_t SHIFTBUFBBS[4];                    /**< Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4 */
-       uint8_t RESERVED_9[112];
-  __IO uint32_t TIMCTL[4];                         /**< Timer Control N Register, array offset: 0x400, array step: 0x4 */
-       uint8_t RESERVED_10[112];
-  __IO uint32_t TIMCFG[4];                         /**< Timer Configuration N Register, array offset: 0x480, array step: 0x4 */
-       uint8_t RESERVED_11[112];
-  __IO uint32_t TIMCMP[4];                         /**< Timer Compare N Register, array offset: 0x500, array step: 0x4 */
-       uint8_t RESERVED_12[368];
-  __IO uint32_t SHIFTBUFNBS[4];                    /**< Shifter Buffer N Nibble Byte Swapped Register, array offset: 0x680, array step: 0x4 */
-       uint8_t RESERVED_13[112];
-  __IO uint32_t SHIFTBUFHWS[4];                    /**< Shifter Buffer N Half Word Swapped Register, array offset: 0x700, array step: 0x4 */
-       uint8_t RESERVED_14[112];
-  __IO uint32_t SHIFTBUFNIS[4];                    /**< Shifter Buffer N Nibble Swapped Register, array offset: 0x780, array step: 0x4 */
+typedef struct
+{
+    __I uint32_t VERID;      /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;      /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t CTRL;      /**< FlexIO Control Register, offset: 0x8 */
+    __I uint32_t PIN;        /**< Pin State Register, offset: 0xC */
+    __IO uint32_t SHIFTSTAT; /**< Shifter Status Register, offset: 0x10 */
+    __IO uint32_t SHIFTERR;  /**< Shifter Error Register, offset: 0x14 */
+    __IO uint32_t TIMSTAT;   /**< Timer Status Register, offset: 0x18 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t SHIFTSIEN; /**< Shifter Status Interrupt Enable, offset: 0x20 */
+    __IO uint32_t SHIFTEIEN; /**< Shifter Error Interrupt Enable, offset: 0x24 */
+    __IO uint32_t TIMIEN;    /**< Timer Interrupt Enable Register, offset: 0x28 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t SHIFTSDEN; /**< Shifter Status DMA Enable, offset: 0x30 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t SHIFTSTATE; /**< Shifter State Register, offset: 0x40 */
+    uint8_t RESERVED_3[60];
+    __IO uint32_t SHIFTCTL[4]; /**< Shifter Control N Register, array offset: 0x80, array step: 0x4 */
+    uint8_t RESERVED_4[112];
+    __IO uint32_t SHIFTCFG[4]; /**< Shifter Configuration N Register, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_5[240];
+    __IO uint32_t SHIFTBUF[4]; /**< Shifter Buffer N Register, array offset: 0x200, array step: 0x4 */
+    uint8_t RESERVED_6[112];
+    __IO uint32_t SHIFTBUFBIS[4]; /**< Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4 */
+    uint8_t RESERVED_7[112];
+    __IO uint32_t SHIFTBUFBYS[4]; /**< Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4 */
+    uint8_t RESERVED_8[112];
+    __IO uint32_t
+        SHIFTBUFBBS[4]; /**< Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4 */
+    uint8_t RESERVED_9[112];
+    __IO uint32_t TIMCTL[4]; /**< Timer Control N Register, array offset: 0x400, array step: 0x4 */
+    uint8_t RESERVED_10[112];
+    __IO uint32_t TIMCFG[4]; /**< Timer Configuration N Register, array offset: 0x480, array step: 0x4 */
+    uint8_t RESERVED_11[112];
+    __IO uint32_t TIMCMP[4]; /**< Timer Compare N Register, array offset: 0x500, array step: 0x4 */
+    uint8_t RESERVED_12[368];
+    __IO uint32_t
+        SHIFTBUFNBS[4]; /**< Shifter Buffer N Nibble Byte Swapped Register, array offset: 0x680, array step: 0x4 */
+    uint8_t RESERVED_13[112];
+    __IO uint32_t
+        SHIFTBUFHWS[4]; /**< Shifter Buffer N Half Word Swapped Register, array offset: 0x700, array step: 0x4 */
+    uint8_t RESERVED_14[112];
+    __IO uint32_t SHIFTBUFNIS[4]; /**< Shifter Buffer N Nibble Swapped Register, array offset: 0x780, array step: 0x4 */
 } FLEXIO_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10277,322 +11704,365 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define FLEXIO_VERID_FEATURE_MASK                (0xFFFFU)
-#define FLEXIO_VERID_FEATURE_SHIFT               (0U)
-#define FLEXIO_VERID_FEATURE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_FEATURE_SHIFT)) & FLEXIO_VERID_FEATURE_MASK)
-#define FLEXIO_VERID_MINOR_MASK                  (0xFF0000U)
-#define FLEXIO_VERID_MINOR_SHIFT                 (16U)
-#define FLEXIO_VERID_MINOR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MINOR_SHIFT)) & FLEXIO_VERID_MINOR_MASK)
-#define FLEXIO_VERID_MAJOR_MASK                  (0xFF000000U)
-#define FLEXIO_VERID_MAJOR_SHIFT                 (24U)
-#define FLEXIO_VERID_MAJOR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MAJOR_SHIFT)) & FLEXIO_VERID_MAJOR_MASK)
+#define FLEXIO_VERID_FEATURE_MASK  (0xFFFFU)
+#define FLEXIO_VERID_FEATURE_SHIFT (0U)
+#define FLEXIO_VERID_FEATURE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_FEATURE_SHIFT)) & FLEXIO_VERID_FEATURE_MASK)
+#define FLEXIO_VERID_MINOR_MASK  (0xFF0000U)
+#define FLEXIO_VERID_MINOR_SHIFT (16U)
+#define FLEXIO_VERID_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MINOR_SHIFT)) & FLEXIO_VERID_MINOR_MASK)
+#define FLEXIO_VERID_MAJOR_MASK  (0xFF000000U)
+#define FLEXIO_VERID_MAJOR_SHIFT (24U)
+#define FLEXIO_VERID_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MAJOR_SHIFT)) & FLEXIO_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define FLEXIO_PARAM_SHIFTER_MASK                (0xFFU)
-#define FLEXIO_PARAM_SHIFTER_SHIFT               (0U)
-#define FLEXIO_PARAM_SHIFTER(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_SHIFTER_SHIFT)) & FLEXIO_PARAM_SHIFTER_MASK)
-#define FLEXIO_PARAM_TIMER_MASK                  (0xFF00U)
-#define FLEXIO_PARAM_TIMER_SHIFT                 (8U)
-#define FLEXIO_PARAM_TIMER(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TIMER_SHIFT)) & FLEXIO_PARAM_TIMER_MASK)
-#define FLEXIO_PARAM_PIN_MASK                    (0xFF0000U)
-#define FLEXIO_PARAM_PIN_SHIFT                   (16U)
-#define FLEXIO_PARAM_PIN(x)                      (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_PIN_SHIFT)) & FLEXIO_PARAM_PIN_MASK)
-#define FLEXIO_PARAM_TRIGGER_MASK                (0xFF000000U)
-#define FLEXIO_PARAM_TRIGGER_SHIFT               (24U)
-#define FLEXIO_PARAM_TRIGGER(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TRIGGER_SHIFT)) & FLEXIO_PARAM_TRIGGER_MASK)
+#define FLEXIO_PARAM_SHIFTER_MASK  (0xFFU)
+#define FLEXIO_PARAM_SHIFTER_SHIFT (0U)
+#define FLEXIO_PARAM_SHIFTER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_SHIFTER_SHIFT)) & FLEXIO_PARAM_SHIFTER_MASK)
+#define FLEXIO_PARAM_TIMER_MASK    (0xFF00U)
+#define FLEXIO_PARAM_TIMER_SHIFT   (8U)
+#define FLEXIO_PARAM_TIMER(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TIMER_SHIFT)) & FLEXIO_PARAM_TIMER_MASK)
+#define FLEXIO_PARAM_PIN_MASK      (0xFF0000U)
+#define FLEXIO_PARAM_PIN_SHIFT     (16U)
+#define FLEXIO_PARAM_PIN(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_PIN_SHIFT)) & FLEXIO_PARAM_PIN_MASK)
+#define FLEXIO_PARAM_TRIGGER_MASK  (0xFF000000U)
+#define FLEXIO_PARAM_TRIGGER_SHIFT (24U)
+#define FLEXIO_PARAM_TRIGGER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TRIGGER_SHIFT)) & FLEXIO_PARAM_TRIGGER_MASK)
 /*! @} */
 
 /*! @name CTRL - FlexIO Control Register */
 /*! @{ */
-#define FLEXIO_CTRL_FLEXEN_MASK                  (0x1U)
-#define FLEXIO_CTRL_FLEXEN_SHIFT                 (0U)
-#define FLEXIO_CTRL_FLEXEN(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FLEXEN_SHIFT)) & FLEXIO_CTRL_FLEXEN_MASK)
-#define FLEXIO_CTRL_SWRST_MASK                   (0x2U)
-#define FLEXIO_CTRL_SWRST_SHIFT                  (1U)
-#define FLEXIO_CTRL_SWRST(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_SWRST_SHIFT)) & FLEXIO_CTRL_SWRST_MASK)
-#define FLEXIO_CTRL_FASTACC_MASK                 (0x4U)
-#define FLEXIO_CTRL_FASTACC_SHIFT                (2U)
-#define FLEXIO_CTRL_FASTACC(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FASTACC_SHIFT)) & FLEXIO_CTRL_FASTACC_MASK)
-#define FLEXIO_CTRL_DBGE_MASK                    (0x40000000U)
-#define FLEXIO_CTRL_DBGE_SHIFT                   (30U)
-#define FLEXIO_CTRL_DBGE(x)                      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)
-#define FLEXIO_CTRL_DOZEN_MASK                   (0x80000000U)
-#define FLEXIO_CTRL_DOZEN_SHIFT                  (31U)
-#define FLEXIO_CTRL_DOZEN(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DOZEN_SHIFT)) & FLEXIO_CTRL_DOZEN_MASK)
+#define FLEXIO_CTRL_FLEXEN_MASK   (0x1U)
+#define FLEXIO_CTRL_FLEXEN_SHIFT  (0U)
+#define FLEXIO_CTRL_FLEXEN(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FLEXEN_SHIFT)) & FLEXIO_CTRL_FLEXEN_MASK)
+#define FLEXIO_CTRL_SWRST_MASK    (0x2U)
+#define FLEXIO_CTRL_SWRST_SHIFT   (1U)
+#define FLEXIO_CTRL_SWRST(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_SWRST_SHIFT)) & FLEXIO_CTRL_SWRST_MASK)
+#define FLEXIO_CTRL_FASTACC_MASK  (0x4U)
+#define FLEXIO_CTRL_FASTACC_SHIFT (2U)
+#define FLEXIO_CTRL_FASTACC(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FASTACC_SHIFT)) & FLEXIO_CTRL_FASTACC_MASK)
+#define FLEXIO_CTRL_DBGE_MASK     (0x40000000U)
+#define FLEXIO_CTRL_DBGE_SHIFT    (30U)
+#define FLEXIO_CTRL_DBGE(x)       (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)
+#define FLEXIO_CTRL_DOZEN_MASK    (0x80000000U)
+#define FLEXIO_CTRL_DOZEN_SHIFT   (31U)
+#define FLEXIO_CTRL_DOZEN(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DOZEN_SHIFT)) & FLEXIO_CTRL_DOZEN_MASK)
 /*! @} */
 
 /*! @name PIN - Pin State Register */
 /*! @{ */
-#define FLEXIO_PIN_PDI_MASK                      (0xFFFFFFFFU)
-#define FLEXIO_PIN_PDI_SHIFT                     (0U)
-#define FLEXIO_PIN_PDI(x)                        (((uint32_t)(((uint32_t)(x)) << FLEXIO_PIN_PDI_SHIFT)) & FLEXIO_PIN_PDI_MASK)
+#define FLEXIO_PIN_PDI_MASK  (0xFFFFFFFFU)
+#define FLEXIO_PIN_PDI_SHIFT (0U)
+#define FLEXIO_PIN_PDI(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PIN_PDI_SHIFT)) & FLEXIO_PIN_PDI_MASK)
 /*! @} */
 
 /*! @name SHIFTSTAT - Shifter Status Register */
 /*! @{ */
-#define FLEXIO_SHIFTSTAT_SSF_MASK                (0xFU)
-#define FLEXIO_SHIFTSTAT_SSF_SHIFT               (0U)
-#define FLEXIO_SHIFTSTAT_SSF(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTAT_SSF_SHIFT)) & FLEXIO_SHIFTSTAT_SSF_MASK)
+#define FLEXIO_SHIFTSTAT_SSF_MASK  (0xFU)
+#define FLEXIO_SHIFTSTAT_SSF_SHIFT (0U)
+#define FLEXIO_SHIFTSTAT_SSF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTAT_SSF_SHIFT)) & FLEXIO_SHIFTSTAT_SSF_MASK)
 /*! @} */
 
 /*! @name SHIFTERR - Shifter Error Register */
 /*! @{ */
-#define FLEXIO_SHIFTERR_SEF_MASK                 (0xFU)
-#define FLEXIO_SHIFTERR_SEF_SHIFT                (0U)
-#define FLEXIO_SHIFTERR_SEF(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTERR_SEF_SHIFT)) & FLEXIO_SHIFTERR_SEF_MASK)
+#define FLEXIO_SHIFTERR_SEF_MASK  (0xFU)
+#define FLEXIO_SHIFTERR_SEF_SHIFT (0U)
+#define FLEXIO_SHIFTERR_SEF(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTERR_SEF_SHIFT)) & FLEXIO_SHIFTERR_SEF_MASK)
 /*! @} */
 
 /*! @name TIMSTAT - Timer Status Register */
 /*! @{ */
-#define FLEXIO_TIMSTAT_TSF_MASK                  (0xFU)
-#define FLEXIO_TIMSTAT_TSF_SHIFT                 (0U)
-#define FLEXIO_TIMSTAT_TSF(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMSTAT_TSF_SHIFT)) & FLEXIO_TIMSTAT_TSF_MASK)
+#define FLEXIO_TIMSTAT_TSF_MASK  (0xFU)
+#define FLEXIO_TIMSTAT_TSF_SHIFT (0U)
+#define FLEXIO_TIMSTAT_TSF(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMSTAT_TSF_SHIFT)) & FLEXIO_TIMSTAT_TSF_MASK)
 /*! @} */
 
 /*! @name SHIFTSIEN - Shifter Status Interrupt Enable */
 /*! @{ */
-#define FLEXIO_SHIFTSIEN_SSIE_MASK               (0xFU)
-#define FLEXIO_SHIFTSIEN_SSIE_SHIFT              (0U)
-#define FLEXIO_SHIFTSIEN_SSIE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSIEN_SSIE_SHIFT)) & FLEXIO_SHIFTSIEN_SSIE_MASK)
+#define FLEXIO_SHIFTSIEN_SSIE_MASK  (0xFU)
+#define FLEXIO_SHIFTSIEN_SSIE_SHIFT (0U)
+#define FLEXIO_SHIFTSIEN_SSIE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSIEN_SSIE_SHIFT)) & FLEXIO_SHIFTSIEN_SSIE_MASK)
 /*! @} */
 
 /*! @name SHIFTEIEN - Shifter Error Interrupt Enable */
 /*! @{ */
-#define FLEXIO_SHIFTEIEN_SEIE_MASK               (0xFU)
-#define FLEXIO_SHIFTEIEN_SEIE_SHIFT              (0U)
-#define FLEXIO_SHIFTEIEN_SEIE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTEIEN_SEIE_SHIFT)) & FLEXIO_SHIFTEIEN_SEIE_MASK)
+#define FLEXIO_SHIFTEIEN_SEIE_MASK  (0xFU)
+#define FLEXIO_SHIFTEIEN_SEIE_SHIFT (0U)
+#define FLEXIO_SHIFTEIEN_SEIE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTEIEN_SEIE_SHIFT)) & FLEXIO_SHIFTEIEN_SEIE_MASK)
 /*! @} */
 
 /*! @name TIMIEN - Timer Interrupt Enable Register */
 /*! @{ */
-#define FLEXIO_TIMIEN_TEIE_MASK                  (0xFU)
-#define FLEXIO_TIMIEN_TEIE_SHIFT                 (0U)
-#define FLEXIO_TIMIEN_TEIE(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMIEN_TEIE_SHIFT)) & FLEXIO_TIMIEN_TEIE_MASK)
+#define FLEXIO_TIMIEN_TEIE_MASK  (0xFU)
+#define FLEXIO_TIMIEN_TEIE_SHIFT (0U)
+#define FLEXIO_TIMIEN_TEIE(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMIEN_TEIE_SHIFT)) & FLEXIO_TIMIEN_TEIE_MASK)
 /*! @} */
 
 /*! @name SHIFTSDEN - Shifter Status DMA Enable */
 /*! @{ */
-#define FLEXIO_SHIFTSDEN_SSDE_MASK               (0xFU)
-#define FLEXIO_SHIFTSDEN_SSDE_SHIFT              (0U)
-#define FLEXIO_SHIFTSDEN_SSDE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSDEN_SSDE_SHIFT)) & FLEXIO_SHIFTSDEN_SSDE_MASK)
+#define FLEXIO_SHIFTSDEN_SSDE_MASK  (0xFU)
+#define FLEXIO_SHIFTSDEN_SSDE_SHIFT (0U)
+#define FLEXIO_SHIFTSDEN_SSDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSDEN_SSDE_SHIFT)) & FLEXIO_SHIFTSDEN_SSDE_MASK)
 /*! @} */
 
 /*! @name SHIFTSTATE - Shifter State Register */
 /*! @{ */
-#define FLEXIO_SHIFTSTATE_STATE_MASK             (0x7U)
-#define FLEXIO_SHIFTSTATE_STATE_SHIFT            (0U)
-#define FLEXIO_SHIFTSTATE_STATE(x)               (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTATE_STATE_SHIFT)) & FLEXIO_SHIFTSTATE_STATE_MASK)
+#define FLEXIO_SHIFTSTATE_STATE_MASK  (0x7U)
+#define FLEXIO_SHIFTSTATE_STATE_SHIFT (0U)
+#define FLEXIO_SHIFTSTATE_STATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTATE_STATE_SHIFT)) & FLEXIO_SHIFTSTATE_STATE_MASK)
 /*! @} */
 
 /*! @name SHIFTCTL - Shifter Control N Register */
 /*! @{ */
-#define FLEXIO_SHIFTCTL_SMOD_MASK                (0x7U)
-#define FLEXIO_SHIFTCTL_SMOD_SHIFT               (0U)
-#define FLEXIO_SHIFTCTL_SMOD(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_SMOD_SHIFT)) & FLEXIO_SHIFTCTL_SMOD_MASK)
-#define FLEXIO_SHIFTCTL_PINPOL_MASK              (0x80U)
-#define FLEXIO_SHIFTCTL_PINPOL_SHIFT             (7U)
-#define FLEXIO_SHIFTCTL_PINPOL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINPOL_SHIFT)) & FLEXIO_SHIFTCTL_PINPOL_MASK)
-#define FLEXIO_SHIFTCTL_PINSEL_MASK              (0x1F00U)
-#define FLEXIO_SHIFTCTL_PINSEL_SHIFT             (8U)
-#define FLEXIO_SHIFTCTL_PINSEL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINSEL_SHIFT)) & FLEXIO_SHIFTCTL_PINSEL_MASK)
-#define FLEXIO_SHIFTCTL_PINCFG_MASK              (0x30000U)
-#define FLEXIO_SHIFTCTL_PINCFG_SHIFT             (16U)
-#define FLEXIO_SHIFTCTL_PINCFG(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINCFG_SHIFT)) & FLEXIO_SHIFTCTL_PINCFG_MASK)
-#define FLEXIO_SHIFTCTL_TIMPOL_MASK              (0x800000U)
-#define FLEXIO_SHIFTCTL_TIMPOL_SHIFT             (23U)
-#define FLEXIO_SHIFTCTL_TIMPOL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMPOL_SHIFT)) & FLEXIO_SHIFTCTL_TIMPOL_MASK)
-#define FLEXIO_SHIFTCTL_TIMSEL_MASK              (0x3000000U)
-#define FLEXIO_SHIFTCTL_TIMSEL_SHIFT             (24U)
-#define FLEXIO_SHIFTCTL_TIMSEL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMSEL_SHIFT)) & FLEXIO_SHIFTCTL_TIMSEL_MASK)
+#define FLEXIO_SHIFTCTL_SMOD_MASK  (0x7U)
+#define FLEXIO_SHIFTCTL_SMOD_SHIFT (0U)
+#define FLEXIO_SHIFTCTL_SMOD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_SMOD_SHIFT)) & FLEXIO_SHIFTCTL_SMOD_MASK)
+#define FLEXIO_SHIFTCTL_PINPOL_MASK  (0x80U)
+#define FLEXIO_SHIFTCTL_PINPOL_SHIFT (7U)
+#define FLEXIO_SHIFTCTL_PINPOL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINPOL_SHIFT)) & FLEXIO_SHIFTCTL_PINPOL_MASK)
+#define FLEXIO_SHIFTCTL_PINSEL_MASK  (0x1F00U)
+#define FLEXIO_SHIFTCTL_PINSEL_SHIFT (8U)
+#define FLEXIO_SHIFTCTL_PINSEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINSEL_SHIFT)) & FLEXIO_SHIFTCTL_PINSEL_MASK)
+#define FLEXIO_SHIFTCTL_PINCFG_MASK  (0x30000U)
+#define FLEXIO_SHIFTCTL_PINCFG_SHIFT (16U)
+#define FLEXIO_SHIFTCTL_PINCFG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINCFG_SHIFT)) & FLEXIO_SHIFTCTL_PINCFG_MASK)
+#define FLEXIO_SHIFTCTL_TIMPOL_MASK  (0x800000U)
+#define FLEXIO_SHIFTCTL_TIMPOL_SHIFT (23U)
+#define FLEXIO_SHIFTCTL_TIMPOL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMPOL_SHIFT)) & FLEXIO_SHIFTCTL_TIMPOL_MASK)
+#define FLEXIO_SHIFTCTL_TIMSEL_MASK  (0x3000000U)
+#define FLEXIO_SHIFTCTL_TIMSEL_SHIFT (24U)
+#define FLEXIO_SHIFTCTL_TIMSEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMSEL_SHIFT)) & FLEXIO_SHIFTCTL_TIMSEL_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTCTL */
-#define FLEXIO_SHIFTCTL_COUNT                    (4U)
+#define FLEXIO_SHIFTCTL_COUNT (4U)
 
 /*! @name SHIFTCFG - Shifter Configuration N Register */
 /*! @{ */
-#define FLEXIO_SHIFTCFG_SSTART_MASK              (0x3U)
-#define FLEXIO_SHIFTCFG_SSTART_SHIFT             (0U)
-#define FLEXIO_SHIFTCFG_SSTART(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTART_SHIFT)) & FLEXIO_SHIFTCFG_SSTART_MASK)
-#define FLEXIO_SHIFTCFG_SSTOP_MASK               (0x30U)
-#define FLEXIO_SHIFTCFG_SSTOP_SHIFT              (4U)
-#define FLEXIO_SHIFTCFG_SSTOP(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTOP_SHIFT)) & FLEXIO_SHIFTCFG_SSTOP_MASK)
-#define FLEXIO_SHIFTCFG_INSRC_MASK               (0x100U)
-#define FLEXIO_SHIFTCFG_INSRC_SHIFT              (8U)
-#define FLEXIO_SHIFTCFG_INSRC(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_INSRC_SHIFT)) & FLEXIO_SHIFTCFG_INSRC_MASK)
-#define FLEXIO_SHIFTCFG_PWIDTH_MASK              (0x1F0000U)
-#define FLEXIO_SHIFTCFG_PWIDTH_SHIFT             (16U)
-#define FLEXIO_SHIFTCFG_PWIDTH(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_PWIDTH_SHIFT)) & FLEXIO_SHIFTCFG_PWIDTH_MASK)
+#define FLEXIO_SHIFTCFG_SSTART_MASK  (0x3U)
+#define FLEXIO_SHIFTCFG_SSTART_SHIFT (0U)
+#define FLEXIO_SHIFTCFG_SSTART(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTART_SHIFT)) & FLEXIO_SHIFTCFG_SSTART_MASK)
+#define FLEXIO_SHIFTCFG_SSTOP_MASK  (0x30U)
+#define FLEXIO_SHIFTCFG_SSTOP_SHIFT (4U)
+#define FLEXIO_SHIFTCFG_SSTOP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTOP_SHIFT)) & FLEXIO_SHIFTCFG_SSTOP_MASK)
+#define FLEXIO_SHIFTCFG_INSRC_MASK  (0x100U)
+#define FLEXIO_SHIFTCFG_INSRC_SHIFT (8U)
+#define FLEXIO_SHIFTCFG_INSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_INSRC_SHIFT)) & FLEXIO_SHIFTCFG_INSRC_MASK)
+#define FLEXIO_SHIFTCFG_PWIDTH_MASK  (0x1F0000U)
+#define FLEXIO_SHIFTCFG_PWIDTH_SHIFT (16U)
+#define FLEXIO_SHIFTCFG_PWIDTH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_PWIDTH_SHIFT)) & FLEXIO_SHIFTCFG_PWIDTH_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTCFG */
-#define FLEXIO_SHIFTCFG_COUNT                    (4U)
+#define FLEXIO_SHIFTCFG_COUNT (4U)
 
 /*! @name SHIFTBUF - Shifter Buffer N Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUF_SHIFTBUF_MASK            (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT           (0U)
-#define FLEXIO_SHIFTBUF_SHIFTBUF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT)) & FLEXIO_SHIFTBUF_SHIFTBUF_MASK)
+#define FLEXIO_SHIFTBUF_SHIFTBUF_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT (0U)
+#define FLEXIO_SHIFTBUF_SHIFTBUF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT)) & FLEXIO_SHIFTBUF_SHIFTBUF_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUF */
-#define FLEXIO_SHIFTBUF_COUNT                    (4U)
+#define FLEXIO_SHIFTBUF_COUNT (4U)
 
 /*! @name SHIFTBUFBIS - Shifter Buffer N Bit Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT)) & FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT)) & FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBIS */
-#define FLEXIO_SHIFTBUFBIS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBIS_COUNT (4U)
 
 /*! @name SHIFTBUFBYS - Shifter Buffer N Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT)) & FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT)) & FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBYS */
-#define FLEXIO_SHIFTBUFBYS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBYS_COUNT (4U)
 
 /*! @name SHIFTBUFBBS - Shifter Buffer N Bit Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT)) & FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT)) & FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBBS */
-#define FLEXIO_SHIFTBUFBBS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBBS_COUNT (4U)
 
 /*! @name TIMCTL - Timer Control N Register */
 /*! @{ */
-#define FLEXIO_TIMCTL_TIMOD_MASK                 (0x3U)
-#define FLEXIO_TIMCTL_TIMOD_SHIFT                (0U)
-#define FLEXIO_TIMCTL_TIMOD(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TIMOD_SHIFT)) & FLEXIO_TIMCTL_TIMOD_MASK)
-#define FLEXIO_TIMCTL_PINPOL_MASK                (0x80U)
-#define FLEXIO_TIMCTL_PINPOL_SHIFT               (7U)
-#define FLEXIO_TIMCTL_PINPOL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINPOL_SHIFT)) & FLEXIO_TIMCTL_PINPOL_MASK)
-#define FLEXIO_TIMCTL_PINSEL_MASK                (0x1F00U)
-#define FLEXIO_TIMCTL_PINSEL_SHIFT               (8U)
-#define FLEXIO_TIMCTL_PINSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINSEL_SHIFT)) & FLEXIO_TIMCTL_PINSEL_MASK)
-#define FLEXIO_TIMCTL_PINCFG_MASK                (0x30000U)
-#define FLEXIO_TIMCTL_PINCFG_SHIFT               (16U)
-#define FLEXIO_TIMCTL_PINCFG(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINCFG_SHIFT)) & FLEXIO_TIMCTL_PINCFG_MASK)
-#define FLEXIO_TIMCTL_TRGSRC_MASK                (0x400000U)
-#define FLEXIO_TIMCTL_TRGSRC_SHIFT               (22U)
-#define FLEXIO_TIMCTL_TRGSRC(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)
-#define FLEXIO_TIMCTL_TRGPOL_MASK                (0x800000U)
-#define FLEXIO_TIMCTL_TRGPOL_SHIFT               (23U)
-#define FLEXIO_TIMCTL_TRGPOL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGPOL_SHIFT)) & FLEXIO_TIMCTL_TRGPOL_MASK)
-#define FLEXIO_TIMCTL_TRGSEL_MASK                (0x3F000000U)
-#define FLEXIO_TIMCTL_TRGSEL_SHIFT               (24U)
-#define FLEXIO_TIMCTL_TRGSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSEL_SHIFT)) & FLEXIO_TIMCTL_TRGSEL_MASK)
+#define FLEXIO_TIMCTL_TIMOD_MASK   (0x3U)
+#define FLEXIO_TIMCTL_TIMOD_SHIFT  (0U)
+#define FLEXIO_TIMCTL_TIMOD(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TIMOD_SHIFT)) & FLEXIO_TIMCTL_TIMOD_MASK)
+#define FLEXIO_TIMCTL_PINPOL_MASK  (0x80U)
+#define FLEXIO_TIMCTL_PINPOL_SHIFT (7U)
+#define FLEXIO_TIMCTL_PINPOL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINPOL_SHIFT)) & FLEXIO_TIMCTL_PINPOL_MASK)
+#define FLEXIO_TIMCTL_PINSEL_MASK  (0x1F00U)
+#define FLEXIO_TIMCTL_PINSEL_SHIFT (8U)
+#define FLEXIO_TIMCTL_PINSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINSEL_SHIFT)) & FLEXIO_TIMCTL_PINSEL_MASK)
+#define FLEXIO_TIMCTL_PINCFG_MASK  (0x30000U)
+#define FLEXIO_TIMCTL_PINCFG_SHIFT (16U)
+#define FLEXIO_TIMCTL_PINCFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINCFG_SHIFT)) & FLEXIO_TIMCTL_PINCFG_MASK)
+#define FLEXIO_TIMCTL_TRGSRC_MASK  (0x400000U)
+#define FLEXIO_TIMCTL_TRGSRC_SHIFT (22U)
+#define FLEXIO_TIMCTL_TRGSRC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)
+#define FLEXIO_TIMCTL_TRGPOL_MASK  (0x800000U)
+#define FLEXIO_TIMCTL_TRGPOL_SHIFT (23U)
+#define FLEXIO_TIMCTL_TRGPOL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGPOL_SHIFT)) & FLEXIO_TIMCTL_TRGPOL_MASK)
+#define FLEXIO_TIMCTL_TRGSEL_MASK  (0x3F000000U)
+#define FLEXIO_TIMCTL_TRGSEL_SHIFT (24U)
+#define FLEXIO_TIMCTL_TRGSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSEL_SHIFT)) & FLEXIO_TIMCTL_TRGSEL_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCTL */
-#define FLEXIO_TIMCTL_COUNT                      (4U)
+#define FLEXIO_TIMCTL_COUNT (4U)
 
 /*! @name TIMCFG - Timer Configuration N Register */
 /*! @{ */
-#define FLEXIO_TIMCFG_TSTART_MASK                (0x2U)
-#define FLEXIO_TIMCFG_TSTART_SHIFT               (1U)
-#define FLEXIO_TIMCFG_TSTART(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTART_SHIFT)) & FLEXIO_TIMCFG_TSTART_MASK)
-#define FLEXIO_TIMCFG_TSTOP_MASK                 (0x30U)
-#define FLEXIO_TIMCFG_TSTOP_SHIFT                (4U)
-#define FLEXIO_TIMCFG_TSTOP(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTOP_SHIFT)) & FLEXIO_TIMCFG_TSTOP_MASK)
-#define FLEXIO_TIMCFG_TIMENA_MASK                (0x700U)
-#define FLEXIO_TIMCFG_TIMENA_SHIFT               (8U)
-#define FLEXIO_TIMCFG_TIMENA(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMENA_SHIFT)) & FLEXIO_TIMCFG_TIMENA_MASK)
-#define FLEXIO_TIMCFG_TIMDIS_MASK                (0x7000U)
-#define FLEXIO_TIMCFG_TIMDIS_SHIFT               (12U)
-#define FLEXIO_TIMCFG_TIMDIS(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDIS_SHIFT)) & FLEXIO_TIMCFG_TIMDIS_MASK)
-#define FLEXIO_TIMCFG_TIMRST_MASK                (0x70000U)
-#define FLEXIO_TIMCFG_TIMRST_SHIFT               (16U)
-#define FLEXIO_TIMCFG_TIMRST(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMRST_SHIFT)) & FLEXIO_TIMCFG_TIMRST_MASK)
-#define FLEXIO_TIMCFG_TIMDEC_MASK                (0x300000U)
-#define FLEXIO_TIMCFG_TIMDEC_SHIFT               (20U)
-#define FLEXIO_TIMCFG_TIMDEC(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDEC_SHIFT)) & FLEXIO_TIMCFG_TIMDEC_MASK)
-#define FLEXIO_TIMCFG_TIMOUT_MASK                (0x3000000U)
-#define FLEXIO_TIMCFG_TIMOUT_SHIFT               (24U)
-#define FLEXIO_TIMCFG_TIMOUT(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMOUT_SHIFT)) & FLEXIO_TIMCFG_TIMOUT_MASK)
+#define FLEXIO_TIMCFG_TSTART_MASK  (0x2U)
+#define FLEXIO_TIMCFG_TSTART_SHIFT (1U)
+#define FLEXIO_TIMCFG_TSTART(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTART_SHIFT)) & FLEXIO_TIMCFG_TSTART_MASK)
+#define FLEXIO_TIMCFG_TSTOP_MASK   (0x30U)
+#define FLEXIO_TIMCFG_TSTOP_SHIFT  (4U)
+#define FLEXIO_TIMCFG_TSTOP(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTOP_SHIFT)) & FLEXIO_TIMCFG_TSTOP_MASK)
+#define FLEXIO_TIMCFG_TIMENA_MASK  (0x700U)
+#define FLEXIO_TIMCFG_TIMENA_SHIFT (8U)
+#define FLEXIO_TIMCFG_TIMENA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMENA_SHIFT)) & FLEXIO_TIMCFG_TIMENA_MASK)
+#define FLEXIO_TIMCFG_TIMDIS_MASK  (0x7000U)
+#define FLEXIO_TIMCFG_TIMDIS_SHIFT (12U)
+#define FLEXIO_TIMCFG_TIMDIS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDIS_SHIFT)) & FLEXIO_TIMCFG_TIMDIS_MASK)
+#define FLEXIO_TIMCFG_TIMRST_MASK  (0x70000U)
+#define FLEXIO_TIMCFG_TIMRST_SHIFT (16U)
+#define FLEXIO_TIMCFG_TIMRST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMRST_SHIFT)) & FLEXIO_TIMCFG_TIMRST_MASK)
+#define FLEXIO_TIMCFG_TIMDEC_MASK  (0x300000U)
+#define FLEXIO_TIMCFG_TIMDEC_SHIFT (20U)
+#define FLEXIO_TIMCFG_TIMDEC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDEC_SHIFT)) & FLEXIO_TIMCFG_TIMDEC_MASK)
+#define FLEXIO_TIMCFG_TIMOUT_MASK  (0x3000000U)
+#define FLEXIO_TIMCFG_TIMOUT_SHIFT (24U)
+#define FLEXIO_TIMCFG_TIMOUT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMOUT_SHIFT)) & FLEXIO_TIMCFG_TIMOUT_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCFG */
-#define FLEXIO_TIMCFG_COUNT                      (4U)
+#define FLEXIO_TIMCFG_COUNT (4U)
 
 /*! @name TIMCMP - Timer Compare N Register */
 /*! @{ */
-#define FLEXIO_TIMCMP_CMP_MASK                   (0xFFFFU)
-#define FLEXIO_TIMCMP_CMP_SHIFT                  (0U)
-#define FLEXIO_TIMCMP_CMP(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCMP_CMP_SHIFT)) & FLEXIO_TIMCMP_CMP_MASK)
+#define FLEXIO_TIMCMP_CMP_MASK  (0xFFFFU)
+#define FLEXIO_TIMCMP_CMP_SHIFT (0U)
+#define FLEXIO_TIMCMP_CMP(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCMP_CMP_SHIFT)) & FLEXIO_TIMCMP_CMP_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCMP */
-#define FLEXIO_TIMCMP_COUNT                      (4U)
+#define FLEXIO_TIMCMP_COUNT (4U)
 
 /*! @name SHIFTBUFNBS - Shifter Buffer N Nibble Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT)) & FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT)) & FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFNBS */
-#define FLEXIO_SHIFTBUFNBS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFNBS_COUNT (4U)
 
 /*! @name SHIFTBUFHWS - Shifter Buffer N Half Word Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT)) & FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT)) & FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFHWS */
-#define FLEXIO_SHIFTBUFHWS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFHWS_COUNT (4U)
 
 /*! @name SHIFTBUFNIS - Shifter Buffer N Nibble Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT)) & FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT)) & FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFNIS */
-#define FLEXIO_SHIFTBUFNIS_COUNT                 (4U)
-
+#define FLEXIO_SHIFTBUFNIS_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group FLEXIO_Register_Masks */
 
-
 /* FLEXIO - Peripheral instance base addresses */
 /** Peripheral FLEXIO1 base address */
-#define FLEXIO1_BASE                             (0x401AC000u)
+#define FLEXIO1_BASE (0x401AC000u)
 /** Peripheral FLEXIO1 base pointer */
-#define FLEXIO1                                  ((FLEXIO_Type *)FLEXIO1_BASE)
+#define FLEXIO1 ((FLEXIO_Type *)FLEXIO1_BASE)
 /** Peripheral FLEXIO2 base address */
-#define FLEXIO2_BASE                             (0x401B0000u)
+#define FLEXIO2_BASE (0x401B0000u)
 /** Peripheral FLEXIO2 base pointer */
-#define FLEXIO2                                  ((FLEXIO_Type *)FLEXIO2_BASE)
+#define FLEXIO2 ((FLEXIO_Type *)FLEXIO2_BASE)
 /** Array initializer of FLEXIO peripheral base addresses */
-#define FLEXIO_BASE_ADDRS                        { 0u, FLEXIO1_BASE, FLEXIO2_BASE }
+#define FLEXIO_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, FLEXIO1_BASE, FLEXIO2_BASE                                                                                 \
+    }
 /** Array initializer of FLEXIO peripheral base pointers */
-#define FLEXIO_BASE_PTRS                         { (FLEXIO_Type *)0u, FLEXIO1, FLEXIO2 }
+#define FLEXIO_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (FLEXIO_Type *)0u, FLEXIO1, FLEXIO2                                                                            \
+    }
 /** Interrupt vectors for the FLEXIO peripheral type */
-#define FLEXIO_IRQS                              { NotAvail_IRQn, FLEXIO1_IRQn, FLEXIO2_IRQn }
+#define FLEXIO_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, FLEXIO1_IRQn, FLEXIO2_IRQn                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group FLEXIO_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXRAM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10603,14 +12073,15 @@ typedef struct {
  */
 
 /** FLEXRAM - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t TCM_CTRL;                          /**< TCM CRTL Register, offset: 0x0 */
-  __IO uint32_t OCRAM_MAGIC_ADDR;                  /**< OCRAM Magic Address Register, offset: 0x4 */
-  __IO uint32_t DTCM_MAGIC_ADDR;                   /**< DTCM Magic Address Register, offset: 0x8 */
-  __IO uint32_t ITCM_MAGIC_ADDR;                   /**< ITCM Magic Address Register, offset: 0xC */
-  __IO uint32_t INT_STATUS;                        /**< Interrupt Status Register, offset: 0x10 */
-  __IO uint32_t INT_STAT_EN;                       /**< Interrupt Status Enable Register, offset: 0x14 */
-  __IO uint32_t INT_SIG_EN;                        /**< Interrupt Enable Register, offset: 0x18 */
+typedef struct
+{
+    __IO uint32_t TCM_CTRL;         /**< TCM CRTL Register, offset: 0x0 */
+    __IO uint32_t OCRAM_MAGIC_ADDR; /**< OCRAM Magic Address Register, offset: 0x4 */
+    __IO uint32_t DTCM_MAGIC_ADDR;  /**< DTCM Magic Address Register, offset: 0x8 */
+    __IO uint32_t ITCM_MAGIC_ADDR;  /**< ITCM Magic Address Register, offset: 0xC */
+    __IO uint32_t INT_STATUS;       /**< Interrupt Status Register, offset: 0x10 */
+    __IO uint32_t INT_STAT_EN;      /**< Interrupt Status Enable Register, offset: 0x14 */
+    __IO uint32_t INT_SIG_EN;       /**< Interrupt Enable Register, offset: 0x18 */
 } FLEXRAM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10624,157 +12095,221 @@ typedef struct {
 
 /*! @name TCM_CTRL - TCM CRTL Register */
 /*! @{ */
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK       (0x1U)
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT      (0U)
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK       (0x2U)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT      (1U)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK       (0x4U)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT      (2U)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT)) & FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK)
-#define FLEXRAM_TCM_CTRL_Reserved_MASK           (0xFFFFFFF8U)
-#define FLEXRAM_TCM_CTRL_Reserved_SHIFT          (3U)
-#define FLEXRAM_TCM_CTRL_Reserved(x)             (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_Reserved_SHIFT)) & FLEXRAM_TCM_CTRL_Reserved_MASK)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK  (0x1U)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT (0U)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK  (0x2U)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT (1U)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK  (0x4U)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT (2U)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT)) & FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK)
+#define FLEXRAM_TCM_CTRL_Reserved_MASK  (0xFFFFFFF8U)
+#define FLEXRAM_TCM_CTRL_Reserved_SHIFT (3U)
+#define FLEXRAM_TCM_CTRL_Reserved(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_Reserved_SHIFT)) & FLEXRAM_TCM_CTRL_Reserved_MASK)
 /*! @} */
 
 /*! @name OCRAM_MAGIC_ADDR - OCRAM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT)) &                                 \
+     FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK   (0xFFFE0000U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT  (17U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved(x)     (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT)) &                                \
+     FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name DTCM_MAGIC_ADDR - DTCM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT)) &                                   \
+     FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK    (0xFFFE0000U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT   (17U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved(x)      (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT)) &                                  \
+     FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name ITCM_MAGIC_ADDR - ITCM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT)) &                                   \
+     FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK    (0xFFFE0000U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT   (17U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved(x)      (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT)) &                                  \
+     FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status Register */
 /*! @{ */
 #define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK  (0x1U)
 #define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT (0U)
-#define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK  (0x2U)
 #define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT (1U)
-#define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK (0x4U)
+#define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK  (0x4U)
 #define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT (2U)
-#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT)) &                                      \
+     FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK  (0x8U)
 #define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT (3U)
-#define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK  (0x10U)
 #define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT (4U)
-#define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK (0x20U)
+#define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK  (0x20U)
 #define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT (5U)
-#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_Reserved_MASK         (0xFFFFFFC0U)
-#define FLEXRAM_INT_STATUS_Reserved_SHIFT        (6U)
-#define FLEXRAM_INT_STATUS_Reserved(x)           (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_Reserved_SHIFT)) & FLEXRAM_INT_STATUS_Reserved_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT)) &                                      \
+     FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_STATUS_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_STATUS_Reserved(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_Reserved_SHIFT)) & FLEXRAM_INT_STATUS_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_STAT_EN - Interrupt Status Enable Register */
 /*! @{ */
-#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK (0x1U)
+#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK  (0x1U)
 #define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT (0U)
-#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK (0x2U)
+#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK  (0x2U)
 #define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT (1U)
-#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK (0x4U)
+#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK  (0x4U)
 #define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT (2U)
-#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK (0x8U)
+#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT)) &                                    \
+     FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK  (0x8U)
 #define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT (3U)
-#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK (0x10U)
+#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK  (0x10U)
 #define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT (4U)
-#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK (0x20U)
+#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK  (0x20U)
 #define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT (5U)
-#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_Reserved_MASK        (0xFFFFFFC0U)
-#define FLEXRAM_INT_STAT_EN_Reserved_SHIFT       (6U)
-#define FLEXRAM_INT_STAT_EN_Reserved(x)          (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_Reserved_SHIFT)) & FLEXRAM_INT_STAT_EN_Reserved_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT)) &                                    \
+     FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_STAT_EN_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_STAT_EN_Reserved(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_Reserved_SHIFT)) & FLEXRAM_INT_STAT_EN_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_SIG_EN - Interrupt Enable Register */
 /*! @{ */
 #define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK  (0x1U)
 #define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT (0U)
-#define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK  (0x2U)
 #define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT (1U)
-#define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK (0x4U)
+#define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK  (0x4U)
 #define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT (2U)
-#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT)) &                                      \
+     FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK  (0x8U)
 #define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT (3U)
-#define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK  (0x10U)
 #define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT (4U)
-#define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK (0x20U)
+#define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK  (0x20U)
 #define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT (5U)
-#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_Reserved_MASK         (0xFFFFFFC0U)
-#define FLEXRAM_INT_SIG_EN_Reserved_SHIFT        (6U)
-#define FLEXRAM_INT_SIG_EN_Reserved(x)           (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_Reserved_SHIFT)) & FLEXRAM_INT_SIG_EN_Reserved_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT)) &                                      \
+     FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_SIG_EN_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_SIG_EN_Reserved(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_Reserved_SHIFT)) & FLEXRAM_INT_SIG_EN_Reserved_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group FLEXRAM_Register_Masks */
 
-
 /* FLEXRAM - Peripheral instance base addresses */
 /** Peripheral FLEXRAM base address */
-#define FLEXRAM_BASE                             (0x400B0000u)
+#define FLEXRAM_BASE (0x400B0000u)
 /** Peripheral FLEXRAM base pointer */
-#define FLEXRAM                                  ((FLEXRAM_Type *)FLEXRAM_BASE)
+#define FLEXRAM ((FLEXRAM_Type *)FLEXRAM_BASE)
 /** Array initializer of FLEXRAM peripheral base addresses */
-#define FLEXRAM_BASE_ADDRS                       { FLEXRAM_BASE }
+#define FLEXRAM_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        FLEXRAM_BASE                                                                                                   \
+    }
 /** Array initializer of FLEXRAM peripheral base pointers */
-#define FLEXRAM_BASE_PTRS                        { FLEXRAM }
+#define FLEXRAM_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        FLEXRAM                                                                                                        \
+    }
 /** Interrupt vectors for the FLEXRAM peripheral type */
-#define FLEXRAM_IRQS                             { FLEXRAM_IRQn }
+#define FLEXRAM_IRQS                                                                                                   \
+    {                                                                                                                  \
+        FLEXRAM_IRQn                                                                                                   \
+    }
 
 /*!
  * @}
  */ /* end of group FLEXRAM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXSPI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10785,42 +12320,49 @@ typedef struct {
  */
 
 /** FLEXSPI - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR0;                              /**< Module Control Register 0, offset: 0x0 */
-  __IO uint32_t MCR1;                              /**< Module Control Register 1, offset: 0x4 */
-  __IO uint32_t MCR2;                              /**< Module Control Register 2, offset: 0x8 */
-  __IO uint32_t AHBCR;                             /**< AHB Bus Control Register, offset: 0xC */
-  __IO uint32_t INTEN;                             /**< Interrupt Enable Register, offset: 0x10 */
-  __IO uint32_t INTR;                              /**< Interrupt Register, offset: 0x14 */
-  __IO uint32_t LUTKEY;                            /**< LUT Key Register, offset: 0x18 */
-  __IO uint32_t LUTCR;                             /**< LUT Control Register, offset: 0x1C */
-  __IO uint32_t AHBRXBUFCR0[4];                    /**< AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0, array offset: 0x20, array step: 0x4 */
-       uint8_t RESERVED_0[48];
-  __IO uint32_t FLSHCR0[4];                        /**< Flash A1 Control Register 0..Flash B2 Control Register 0, array offset: 0x60, array step: 0x4 */
-  __IO uint32_t FLSHCR1[4];                        /**< Flash A1 Control Register 1..Flash B2 Control Register 1, array offset: 0x70, array step: 0x4 */
-  __IO uint32_t FLSHCR2[4];                        /**< Flash A1 Control Register 2..Flash B2 Control Register 2, array offset: 0x80, array step: 0x4 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t FLSHCR4;                           /**< Flash Control Register 4, offset: 0x94 */
-       uint8_t RESERVED_2[8];
-  __IO uint32_t IPCR0;                             /**< IP Control Register 0, offset: 0xA0 */
-  __IO uint32_t IPCR1;                             /**< IP Control Register 1, offset: 0xA4 */
-       uint8_t RESERVED_3[8];
-  __IO uint32_t IPCMD;                             /**< IP Command Register, offset: 0xB0 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t IPRXFCR;                           /**< IP RX FIFO Control Register, offset: 0xB8 */
-  __IO uint32_t IPTXFCR;                           /**< IP TX FIFO Control Register, offset: 0xBC */
-  __IO uint32_t DLLCR[2];                          /**< DLL Control Register 0, array offset: 0xC0, array step: 0x4 */
-       uint8_t RESERVED_5[24];
-  __I  uint32_t STS0;                              /**< Status Register 0, offset: 0xE0 */
-  __I  uint32_t STS1;                              /**< Status Register 1, offset: 0xE4 */
-  __I  uint32_t STS2;                              /**< Status Register 2, offset: 0xE8 */
-  __I  uint32_t AHBSPNDSTS;                        /**< AHB Suspend Status Register, offset: 0xEC */
-  __I  uint32_t IPRXFSTS;                          /**< IP RX FIFO Status Register, offset: 0xF0 */
-  __I  uint32_t IPTXFSTS;                          /**< IP TX FIFO Status Register, offset: 0xF4 */
-       uint8_t RESERVED_6[8];
-  __I  uint32_t RFDR[32];                          /**< IP RX FIFO Data Register 0..IP RX FIFO Data Register 31, array offset: 0x100, array step: 0x4 */
-  __O  uint32_t TFDR[32];                          /**< IP TX FIFO Data Register 0..IP TX FIFO Data Register 31, array offset: 0x180, array step: 0x4 */
-  __IO uint32_t LUT[64];                           /**< LUT 0..LUT 63, array offset: 0x200, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t MCR0;           /**< Module Control Register 0, offset: 0x0 */
+    __IO uint32_t MCR1;           /**< Module Control Register 1, offset: 0x4 */
+    __IO uint32_t MCR2;           /**< Module Control Register 2, offset: 0x8 */
+    __IO uint32_t AHBCR;          /**< AHB Bus Control Register, offset: 0xC */
+    __IO uint32_t INTEN;          /**< Interrupt Enable Register, offset: 0x10 */
+    __IO uint32_t INTR;           /**< Interrupt Register, offset: 0x14 */
+    __IO uint32_t LUTKEY;         /**< LUT Key Register, offset: 0x18 */
+    __IO uint32_t LUTCR;          /**< LUT Control Register, offset: 0x1C */
+    __IO uint32_t AHBRXBUFCR0[4]; /**< AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0, array
+                                     offset: 0x20, array step: 0x4 */
+    uint8_t RESERVED_0[48];
+    __IO uint32_t FLSHCR0[4]; /**< Flash A1 Control Register 0..Flash B2 Control Register 0, array offset: 0x60, array
+                                 step: 0x4 */
+    __IO uint32_t FLSHCR1[4]; /**< Flash A1 Control Register 1..Flash B2 Control Register 1, array offset: 0x70, array
+                                 step: 0x4 */
+    __IO uint32_t FLSHCR2[4]; /**< Flash A1 Control Register 2..Flash B2 Control Register 2, array offset: 0x80, array
+                                 step: 0x4 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t FLSHCR4; /**< Flash Control Register 4, offset: 0x94 */
+    uint8_t RESERVED_2[8];
+    __IO uint32_t IPCR0; /**< IP Control Register 0, offset: 0xA0 */
+    __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */
+    uint8_t RESERVED_3[8];
+    __IO uint32_t IPCMD; /**< IP Command Register, offset: 0xB0 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t IPRXFCR;  /**< IP RX FIFO Control Register, offset: 0xB8 */
+    __IO uint32_t IPTXFCR;  /**< IP TX FIFO Control Register, offset: 0xBC */
+    __IO uint32_t DLLCR[2]; /**< DLL Control Register 0, array offset: 0xC0, array step: 0x4 */
+    uint8_t RESERVED_5[24];
+    __I uint32_t STS0;       /**< Status Register 0, offset: 0xE0 */
+    __I uint32_t STS1;       /**< Status Register 1, offset: 0xE4 */
+    __I uint32_t STS2;       /**< Status Register 2, offset: 0xE8 */
+    __I uint32_t AHBSPNDSTS; /**< AHB Suspend Status Register, offset: 0xEC */
+    __I uint32_t IPRXFSTS;   /**< IP RX FIFO Status Register, offset: 0xF0 */
+    __I uint32_t IPTXFSTS;   /**< IP TX FIFO Status Register, offset: 0xF4 */
+    uint8_t RESERVED_6[8];
+    __I uint32_t
+        RFDR[32]; /**< IP RX FIFO Data Register 0..IP RX FIFO Data Register 31, array offset: 0x100, array step: 0x4 */
+    __O uint32_t
+        TFDR[32]; /**< IP TX FIFO Data Register 0..IP TX FIFO Data Register 31, array offset: 0x180, array step: 0x4 */
+    __IO uint32_t LUT[64]; /**< LUT 0..LUT 63, array offset: 0x200, array step: 0x4 */
 } FLEXSPI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10834,520 +12376,623 @@ typedef struct {
 
 /*! @name MCR0 - Module Control Register 0 */
 /*! @{ */
-#define FLEXSPI_MCR0_SWRESET_MASK                (0x1U)
-#define FLEXSPI_MCR0_SWRESET_SHIFT               (0U)
-#define FLEXSPI_MCR0_SWRESET(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SWRESET_SHIFT)) & FLEXSPI_MCR0_SWRESET_MASK)
-#define FLEXSPI_MCR0_MDIS_MASK                   (0x2U)
-#define FLEXSPI_MCR0_MDIS_SHIFT                  (1U)
-#define FLEXSPI_MCR0_MDIS(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_MDIS_SHIFT)) & FLEXSPI_MCR0_MDIS_MASK)
-#define FLEXSPI_MCR0_RXCLKSRC_MASK               (0x30U)
-#define FLEXSPI_MCR0_RXCLKSRC_SHIFT              (4U)
-#define FLEXSPI_MCR0_RXCLKSRC(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_RXCLKSRC_SHIFT)) & FLEXSPI_MCR0_RXCLKSRC_MASK)
-#define FLEXSPI_MCR0_ARDFEN_MASK                 (0x40U)
-#define FLEXSPI_MCR0_ARDFEN_SHIFT                (6U)
-#define FLEXSPI_MCR0_ARDFEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ARDFEN_SHIFT)) & FLEXSPI_MCR0_ARDFEN_MASK)
-#define FLEXSPI_MCR0_ATDFEN_MASK                 (0x80U)
-#define FLEXSPI_MCR0_ATDFEN_SHIFT                (7U)
-#define FLEXSPI_MCR0_ATDFEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ATDFEN_SHIFT)) & FLEXSPI_MCR0_ATDFEN_MASK)
-#define FLEXSPI_MCR0_HSEN_MASK                   (0x800U)
-#define FLEXSPI_MCR0_HSEN_SHIFT                  (11U)
-#define FLEXSPI_MCR0_HSEN(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_HSEN_SHIFT)) & FLEXSPI_MCR0_HSEN_MASK)
-#define FLEXSPI_MCR0_DOZEEN_MASK                 (0x1000U)
-#define FLEXSPI_MCR0_DOZEEN_SHIFT                (12U)
-#define FLEXSPI_MCR0_DOZEEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_DOZEEN_SHIFT)) & FLEXSPI_MCR0_DOZEEN_MASK)
-#define FLEXSPI_MCR0_COMBINATIONEN_MASK          (0x2000U)
-#define FLEXSPI_MCR0_COMBINATIONEN_SHIFT         (13U)
-#define FLEXSPI_MCR0_COMBINATIONEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_COMBINATIONEN_SHIFT)) & FLEXSPI_MCR0_COMBINATIONEN_MASK)
-#define FLEXSPI_MCR0_SCKFREERUNEN_MASK           (0x4000U)
-#define FLEXSPI_MCR0_SCKFREERUNEN_SHIFT          (14U)
-#define FLEXSPI_MCR0_SCKFREERUNEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SCKFREERUNEN_SHIFT)) & FLEXSPI_MCR0_SCKFREERUNEN_MASK)
-#define FLEXSPI_MCR0_IPGRANTWAIT_MASK            (0xFF0000U)
-#define FLEXSPI_MCR0_IPGRANTWAIT_SHIFT           (16U)
-#define FLEXSPI_MCR0_IPGRANTWAIT(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_IPGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_IPGRANTWAIT_MASK)
-#define FLEXSPI_MCR0_AHBGRANTWAIT_MASK           (0xFF000000U)
-#define FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT          (24U)
-#define FLEXSPI_MCR0_AHBGRANTWAIT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_AHBGRANTWAIT_MASK)
+#define FLEXSPI_MCR0_SWRESET_MASK  (0x1U)
+#define FLEXSPI_MCR0_SWRESET_SHIFT (0U)
+#define FLEXSPI_MCR0_SWRESET(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SWRESET_SHIFT)) & FLEXSPI_MCR0_SWRESET_MASK)
+#define FLEXSPI_MCR0_MDIS_MASK      (0x2U)
+#define FLEXSPI_MCR0_MDIS_SHIFT     (1U)
+#define FLEXSPI_MCR0_MDIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_MDIS_SHIFT)) & FLEXSPI_MCR0_MDIS_MASK)
+#define FLEXSPI_MCR0_RXCLKSRC_MASK  (0x30U)
+#define FLEXSPI_MCR0_RXCLKSRC_SHIFT (4U)
+#define FLEXSPI_MCR0_RXCLKSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_RXCLKSRC_SHIFT)) & FLEXSPI_MCR0_RXCLKSRC_MASK)
+#define FLEXSPI_MCR0_ARDFEN_MASK         (0x40U)
+#define FLEXSPI_MCR0_ARDFEN_SHIFT        (6U)
+#define FLEXSPI_MCR0_ARDFEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ARDFEN_SHIFT)) & FLEXSPI_MCR0_ARDFEN_MASK)
+#define FLEXSPI_MCR0_ATDFEN_MASK         (0x80U)
+#define FLEXSPI_MCR0_ATDFEN_SHIFT        (7U)
+#define FLEXSPI_MCR0_ATDFEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ATDFEN_SHIFT)) & FLEXSPI_MCR0_ATDFEN_MASK)
+#define FLEXSPI_MCR0_HSEN_MASK           (0x800U)
+#define FLEXSPI_MCR0_HSEN_SHIFT          (11U)
+#define FLEXSPI_MCR0_HSEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_HSEN_SHIFT)) & FLEXSPI_MCR0_HSEN_MASK)
+#define FLEXSPI_MCR0_DOZEEN_MASK         (0x1000U)
+#define FLEXSPI_MCR0_DOZEEN_SHIFT        (12U)
+#define FLEXSPI_MCR0_DOZEEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_DOZEEN_SHIFT)) & FLEXSPI_MCR0_DOZEEN_MASK)
+#define FLEXSPI_MCR0_COMBINATIONEN_MASK  (0x2000U)
+#define FLEXSPI_MCR0_COMBINATIONEN_SHIFT (13U)
+#define FLEXSPI_MCR0_COMBINATIONEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_COMBINATIONEN_SHIFT)) & FLEXSPI_MCR0_COMBINATIONEN_MASK)
+#define FLEXSPI_MCR0_SCKFREERUNEN_MASK  (0x4000U)
+#define FLEXSPI_MCR0_SCKFREERUNEN_SHIFT (14U)
+#define FLEXSPI_MCR0_SCKFREERUNEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SCKFREERUNEN_SHIFT)) & FLEXSPI_MCR0_SCKFREERUNEN_MASK)
+#define FLEXSPI_MCR0_IPGRANTWAIT_MASK  (0xFF0000U)
+#define FLEXSPI_MCR0_IPGRANTWAIT_SHIFT (16U)
+#define FLEXSPI_MCR0_IPGRANTWAIT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_IPGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_IPGRANTWAIT_MASK)
+#define FLEXSPI_MCR0_AHBGRANTWAIT_MASK  (0xFF000000U)
+#define FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT (24U)
+#define FLEXSPI_MCR0_AHBGRANTWAIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_AHBGRANTWAIT_MASK)
 /*! @} */
 
 /*! @name MCR1 - Module Control Register 1 */
 /*! @{ */
-#define FLEXSPI_MCR1_AHBBUSWAIT_MASK             (0xFFFFU)
-#define FLEXSPI_MCR1_AHBBUSWAIT_SHIFT            (0U)
-#define FLEXSPI_MCR1_AHBBUSWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_AHBBUSWAIT_SHIFT)) & FLEXSPI_MCR1_AHBBUSWAIT_MASK)
-#define FLEXSPI_MCR1_SEQWAIT_MASK                (0xFFFF0000U)
-#define FLEXSPI_MCR1_SEQWAIT_SHIFT               (16U)
-#define FLEXSPI_MCR1_SEQWAIT(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_SEQWAIT_SHIFT)) & FLEXSPI_MCR1_SEQWAIT_MASK)
+#define FLEXSPI_MCR1_AHBBUSWAIT_MASK  (0xFFFFU)
+#define FLEXSPI_MCR1_AHBBUSWAIT_SHIFT (0U)
+#define FLEXSPI_MCR1_AHBBUSWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_AHBBUSWAIT_SHIFT)) & FLEXSPI_MCR1_AHBBUSWAIT_MASK)
+#define FLEXSPI_MCR1_SEQWAIT_MASK  (0xFFFF0000U)
+#define FLEXSPI_MCR1_SEQWAIT_SHIFT (16U)
+#define FLEXSPI_MCR1_SEQWAIT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_SEQWAIT_SHIFT)) & FLEXSPI_MCR1_SEQWAIT_MASK)
 /*! @} */
 
 /*! @name MCR2 - Module Control Register 2 */
 /*! @{ */
-#define FLEXSPI_MCR2_CLRAHBBUFOPT_MASK           (0x800U)
-#define FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT          (11U)
-#define FLEXSPI_MCR2_CLRAHBBUFOPT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT)) & FLEXSPI_MCR2_CLRAHBBUFOPT_MASK)
-#define FLEXSPI_MCR2_CLRLEARNPHASE_MASK          (0x4000U)
-#define FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT         (14U)
-#define FLEXSPI_MCR2_CLRLEARNPHASE(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT)) & FLEXSPI_MCR2_CLRLEARNPHASE_MASK)
-#define FLEXSPI_MCR2_SAMEDEVICEEN_MASK           (0x8000U)
-#define FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT          (15U)
-#define FLEXSPI_MCR2_SAMEDEVICEEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT)) & FLEXSPI_MCR2_SAMEDEVICEEN_MASK)
-#define FLEXSPI_MCR2_SCKBDIFFOPT_MASK            (0x80000U)
-#define FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT           (19U)
-#define FLEXSPI_MCR2_SCKBDIFFOPT(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT)) & FLEXSPI_MCR2_SCKBDIFFOPT_MASK)
-#define FLEXSPI_MCR2_RESUMEWAIT_MASK             (0xFF000000U)
-#define FLEXSPI_MCR2_RESUMEWAIT_SHIFT            (24U)
-#define FLEXSPI_MCR2_RESUMEWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_RESUMEWAIT_SHIFT)) & FLEXSPI_MCR2_RESUMEWAIT_MASK)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT_MASK  (0x800U)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT (11U)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT)) & FLEXSPI_MCR2_CLRAHBBUFOPT_MASK)
+#define FLEXSPI_MCR2_CLRLEARNPHASE_MASK  (0x4000U)
+#define FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT (14U)
+#define FLEXSPI_MCR2_CLRLEARNPHASE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT)) & FLEXSPI_MCR2_CLRLEARNPHASE_MASK)
+#define FLEXSPI_MCR2_SAMEDEVICEEN_MASK  (0x8000U)
+#define FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT (15U)
+#define FLEXSPI_MCR2_SAMEDEVICEEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT)) & FLEXSPI_MCR2_SAMEDEVICEEN_MASK)
+#define FLEXSPI_MCR2_SCKBDIFFOPT_MASK  (0x80000U)
+#define FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT (19U)
+#define FLEXSPI_MCR2_SCKBDIFFOPT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT)) & FLEXSPI_MCR2_SCKBDIFFOPT_MASK)
+#define FLEXSPI_MCR2_RESUMEWAIT_MASK  (0xFF000000U)
+#define FLEXSPI_MCR2_RESUMEWAIT_SHIFT (24U)
+#define FLEXSPI_MCR2_RESUMEWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_RESUMEWAIT_SHIFT)) & FLEXSPI_MCR2_RESUMEWAIT_MASK)
 /*! @} */
 
 /*! @name AHBCR - AHB Bus Control Register */
 /*! @{ */
-#define FLEXSPI_AHBCR_APAREN_MASK                (0x1U)
-#define FLEXSPI_AHBCR_APAREN_SHIFT               (0U)
-#define FLEXSPI_AHBCR_APAREN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_APAREN_SHIFT)) & FLEXSPI_AHBCR_APAREN_MASK)
-#define FLEXSPI_AHBCR_CACHABLEEN_MASK            (0x8U)
-#define FLEXSPI_AHBCR_CACHABLEEN_SHIFT           (3U)
-#define FLEXSPI_AHBCR_CACHABLEEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_CACHABLEEN_SHIFT)) & FLEXSPI_AHBCR_CACHABLEEN_MASK)
-#define FLEXSPI_AHBCR_BUFFERABLEEN_MASK          (0x10U)
-#define FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT         (4U)
-#define FLEXSPI_AHBCR_BUFFERABLEEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT)) & FLEXSPI_AHBCR_BUFFERABLEEN_MASK)
-#define FLEXSPI_AHBCR_PREFETCHEN_MASK            (0x20U)
-#define FLEXSPI_AHBCR_PREFETCHEN_SHIFT           (5U)
-#define FLEXSPI_AHBCR_PREFETCHEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_PREFETCHEN_SHIFT)) & FLEXSPI_AHBCR_PREFETCHEN_MASK)
-#define FLEXSPI_AHBCR_READADDROPT_MASK           (0x40U)
-#define FLEXSPI_AHBCR_READADDROPT_SHIFT          (6U)
-#define FLEXSPI_AHBCR_READADDROPT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_READADDROPT_SHIFT)) & FLEXSPI_AHBCR_READADDROPT_MASK)
+#define FLEXSPI_AHBCR_APAREN_MASK  (0x1U)
+#define FLEXSPI_AHBCR_APAREN_SHIFT (0U)
+#define FLEXSPI_AHBCR_APAREN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_APAREN_SHIFT)) & FLEXSPI_AHBCR_APAREN_MASK)
+#define FLEXSPI_AHBCR_CACHABLEEN_MASK  (0x8U)
+#define FLEXSPI_AHBCR_CACHABLEEN_SHIFT (3U)
+#define FLEXSPI_AHBCR_CACHABLEEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_CACHABLEEN_SHIFT)) & FLEXSPI_AHBCR_CACHABLEEN_MASK)
+#define FLEXSPI_AHBCR_BUFFERABLEEN_MASK  (0x10U)
+#define FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT (4U)
+#define FLEXSPI_AHBCR_BUFFERABLEEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT)) & FLEXSPI_AHBCR_BUFFERABLEEN_MASK)
+#define FLEXSPI_AHBCR_PREFETCHEN_MASK  (0x20U)
+#define FLEXSPI_AHBCR_PREFETCHEN_SHIFT (5U)
+#define FLEXSPI_AHBCR_PREFETCHEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_PREFETCHEN_SHIFT)) & FLEXSPI_AHBCR_PREFETCHEN_MASK)
+#define FLEXSPI_AHBCR_READADDROPT_MASK  (0x40U)
+#define FLEXSPI_AHBCR_READADDROPT_SHIFT (6U)
+#define FLEXSPI_AHBCR_READADDROPT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_READADDROPT_SHIFT)) & FLEXSPI_AHBCR_READADDROPT_MASK)
 /*! @} */
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define FLEXSPI_INTEN_IPCMDDONEEN_MASK           (0x1U)
-#define FLEXSPI_INTEN_IPCMDDONEEN_SHIFT          (0U)
-#define FLEXSPI_INTEN_IPCMDDONEEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDDONEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDDONEEN_MASK)
-#define FLEXSPI_INTEN_IPCMDGEEN_MASK             (0x2U)
-#define FLEXSPI_INTEN_IPCMDGEEN_SHIFT            (1U)
-#define FLEXSPI_INTEN_IPCMDGEEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDGEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDGEEN_MASK)
-#define FLEXSPI_INTEN_AHBCMDGEEN_MASK            (0x4U)
-#define FLEXSPI_INTEN_AHBCMDGEEN_SHIFT           (2U)
-#define FLEXSPI_INTEN_AHBCMDGEEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDGEEN_SHIFT)) & FLEXSPI_INTEN_AHBCMDGEEN_MASK)
-#define FLEXSPI_INTEN_IPCMDERREN_MASK            (0x8U)
-#define FLEXSPI_INTEN_IPCMDERREN_SHIFT           (3U)
-#define FLEXSPI_INTEN_IPCMDERREN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDERREN_SHIFT)) & FLEXSPI_INTEN_IPCMDERREN_MASK)
-#define FLEXSPI_INTEN_AHBCMDERREN_MASK           (0x10U)
-#define FLEXSPI_INTEN_AHBCMDERREN_SHIFT          (4U)
-#define FLEXSPI_INTEN_AHBCMDERREN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDERREN_SHIFT)) & FLEXSPI_INTEN_AHBCMDERREN_MASK)
-#define FLEXSPI_INTEN_IPRXWAEN_MASK              (0x20U)
-#define FLEXSPI_INTEN_IPRXWAEN_SHIFT             (5U)
-#define FLEXSPI_INTEN_IPRXWAEN(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPRXWAEN_SHIFT)) & FLEXSPI_INTEN_IPRXWAEN_MASK)
-#define FLEXSPI_INTEN_IPTXWEEN_MASK              (0x40U)
-#define FLEXSPI_INTEN_IPTXWEEN_SHIFT             (6U)
-#define FLEXSPI_INTEN_IPTXWEEN(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPTXWEEN_SHIFT)) & FLEXSPI_INTEN_IPTXWEEN_MASK)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK         (0x100U)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT        (8U)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN_MASK         (0x200U)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT        (9U)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYWREN_MASK)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK       (0x400U)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT      (10U)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN_MASK          (0x800U)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT         (11U)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_SEQTIMEOUTEN_MASK)
+#define FLEXSPI_INTEN_IPCMDDONEEN_MASK  (0x1U)
+#define FLEXSPI_INTEN_IPCMDDONEEN_SHIFT (0U)
+#define FLEXSPI_INTEN_IPCMDDONEEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDDONEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDDONEEN_MASK)
+#define FLEXSPI_INTEN_IPCMDGEEN_MASK  (0x2U)
+#define FLEXSPI_INTEN_IPCMDGEEN_SHIFT (1U)
+#define FLEXSPI_INTEN_IPCMDGEEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDGEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDGEEN_MASK)
+#define FLEXSPI_INTEN_AHBCMDGEEN_MASK  (0x4U)
+#define FLEXSPI_INTEN_AHBCMDGEEN_SHIFT (2U)
+#define FLEXSPI_INTEN_AHBCMDGEEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDGEEN_SHIFT)) & FLEXSPI_INTEN_AHBCMDGEEN_MASK)
+#define FLEXSPI_INTEN_IPCMDERREN_MASK  (0x8U)
+#define FLEXSPI_INTEN_IPCMDERREN_SHIFT (3U)
+#define FLEXSPI_INTEN_IPCMDERREN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDERREN_SHIFT)) & FLEXSPI_INTEN_IPCMDERREN_MASK)
+#define FLEXSPI_INTEN_AHBCMDERREN_MASK  (0x10U)
+#define FLEXSPI_INTEN_AHBCMDERREN_SHIFT (4U)
+#define FLEXSPI_INTEN_AHBCMDERREN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDERREN_SHIFT)) & FLEXSPI_INTEN_AHBCMDERREN_MASK)
+#define FLEXSPI_INTEN_IPRXWAEN_MASK  (0x20U)
+#define FLEXSPI_INTEN_IPRXWAEN_SHIFT (5U)
+#define FLEXSPI_INTEN_IPRXWAEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPRXWAEN_SHIFT)) & FLEXSPI_INTEN_IPRXWAEN_MASK)
+#define FLEXSPI_INTEN_IPTXWEEN_MASK  (0x40U)
+#define FLEXSPI_INTEN_IPTXWEEN_SHIFT (6U)
+#define FLEXSPI_INTEN_IPTXWEEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPTXWEEN_SHIFT)) & FLEXSPI_INTEN_IPTXWEEN_MASK)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK  (0x100U)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT (8U)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN_MASK  (0x200U)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT (9U)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYWREN_MASK)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK  (0x400U)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT (10U)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN_MASK  (0x800U)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT (11U)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_SEQTIMEOUTEN_MASK)
 /*! @} */
 
 /*! @name INTR - Interrupt Register */
 /*! @{ */
-#define FLEXSPI_INTR_IPCMDDONE_MASK              (0x1U)
-#define FLEXSPI_INTR_IPCMDDONE_SHIFT             (0U)
-#define FLEXSPI_INTR_IPCMDDONE(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDDONE_SHIFT)) & FLEXSPI_INTR_IPCMDDONE_MASK)
-#define FLEXSPI_INTR_IPCMDGE_MASK                (0x2U)
-#define FLEXSPI_INTR_IPCMDGE_SHIFT               (1U)
-#define FLEXSPI_INTR_IPCMDGE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDGE_SHIFT)) & FLEXSPI_INTR_IPCMDGE_MASK)
-#define FLEXSPI_INTR_AHBCMDGE_MASK               (0x4U)
-#define FLEXSPI_INTR_AHBCMDGE_SHIFT              (2U)
-#define FLEXSPI_INTR_AHBCMDGE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDGE_SHIFT)) & FLEXSPI_INTR_AHBCMDGE_MASK)
-#define FLEXSPI_INTR_IPCMDERR_MASK               (0x8U)
-#define FLEXSPI_INTR_IPCMDERR_SHIFT              (3U)
-#define FLEXSPI_INTR_IPCMDERR(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDERR_SHIFT)) & FLEXSPI_INTR_IPCMDERR_MASK)
-#define FLEXSPI_INTR_AHBCMDERR_MASK              (0x10U)
-#define FLEXSPI_INTR_AHBCMDERR_SHIFT             (4U)
-#define FLEXSPI_INTR_AHBCMDERR(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDERR_SHIFT)) & FLEXSPI_INTR_AHBCMDERR_MASK)
-#define FLEXSPI_INTR_IPRXWA_MASK                 (0x20U)
-#define FLEXSPI_INTR_IPRXWA_SHIFT                (5U)
-#define FLEXSPI_INTR_IPRXWA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPRXWA_SHIFT)) & FLEXSPI_INTR_IPRXWA_MASK)
-#define FLEXSPI_INTR_IPTXWE_MASK                 (0x40U)
-#define FLEXSPI_INTR_IPTXWE_SHIFT                (6U)
-#define FLEXSPI_INTR_IPTXWE(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPTXWE_SHIFT)) & FLEXSPI_INTR_IPTXWE_MASK)
-#define FLEXSPI_INTR_SCKSTOPBYRD_MASK            (0x100U)
-#define FLEXSPI_INTR_SCKSTOPBYRD_SHIFT           (8U)
-#define FLEXSPI_INTR_SCKSTOPBYRD(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYRD_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYRD_MASK)
-#define FLEXSPI_INTR_SCKSTOPBYWR_MASK            (0x200U)
-#define FLEXSPI_INTR_SCKSTOPBYWR_SHIFT           (9U)
-#define FLEXSPI_INTR_SCKSTOPBYWR(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYWR_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYWR_MASK)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT_MASK          (0x400U)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT         (10U)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT)) & FLEXSPI_INTR_AHBBUSTIMEOUT_MASK)
-#define FLEXSPI_INTR_SEQTIMEOUT_MASK             (0x800U)
-#define FLEXSPI_INTR_SEQTIMEOUT_SHIFT            (11U)
-#define FLEXSPI_INTR_SEQTIMEOUT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SEQTIMEOUT_SHIFT)) & FLEXSPI_INTR_SEQTIMEOUT_MASK)
+#define FLEXSPI_INTR_IPCMDDONE_MASK  (0x1U)
+#define FLEXSPI_INTR_IPCMDDONE_SHIFT (0U)
+#define FLEXSPI_INTR_IPCMDDONE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDDONE_SHIFT)) & FLEXSPI_INTR_IPCMDDONE_MASK)
+#define FLEXSPI_INTR_IPCMDGE_MASK  (0x2U)
+#define FLEXSPI_INTR_IPCMDGE_SHIFT (1U)
+#define FLEXSPI_INTR_IPCMDGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDGE_SHIFT)) & FLEXSPI_INTR_IPCMDGE_MASK)
+#define FLEXSPI_INTR_AHBCMDGE_MASK  (0x4U)
+#define FLEXSPI_INTR_AHBCMDGE_SHIFT (2U)
+#define FLEXSPI_INTR_AHBCMDGE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDGE_SHIFT)) & FLEXSPI_INTR_AHBCMDGE_MASK)
+#define FLEXSPI_INTR_IPCMDERR_MASK  (0x8U)
+#define FLEXSPI_INTR_IPCMDERR_SHIFT (3U)
+#define FLEXSPI_INTR_IPCMDERR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDERR_SHIFT)) & FLEXSPI_INTR_IPCMDERR_MASK)
+#define FLEXSPI_INTR_AHBCMDERR_MASK  (0x10U)
+#define FLEXSPI_INTR_AHBCMDERR_SHIFT (4U)
+#define FLEXSPI_INTR_AHBCMDERR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDERR_SHIFT)) & FLEXSPI_INTR_AHBCMDERR_MASK)
+#define FLEXSPI_INTR_IPRXWA_MASK       (0x20U)
+#define FLEXSPI_INTR_IPRXWA_SHIFT      (5U)
+#define FLEXSPI_INTR_IPRXWA(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPRXWA_SHIFT)) & FLEXSPI_INTR_IPRXWA_MASK)
+#define FLEXSPI_INTR_IPTXWE_MASK       (0x40U)
+#define FLEXSPI_INTR_IPTXWE_SHIFT      (6U)
+#define FLEXSPI_INTR_IPTXWE(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPTXWE_SHIFT)) & FLEXSPI_INTR_IPTXWE_MASK)
+#define FLEXSPI_INTR_SCKSTOPBYRD_MASK  (0x100U)
+#define FLEXSPI_INTR_SCKSTOPBYRD_SHIFT (8U)
+#define FLEXSPI_INTR_SCKSTOPBYRD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYRD_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYRD_MASK)
+#define FLEXSPI_INTR_SCKSTOPBYWR_MASK  (0x200U)
+#define FLEXSPI_INTR_SCKSTOPBYWR_SHIFT (9U)
+#define FLEXSPI_INTR_SCKSTOPBYWR(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYWR_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYWR_MASK)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT_MASK  (0x400U)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT (10U)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT)) & FLEXSPI_INTR_AHBBUSTIMEOUT_MASK)
+#define FLEXSPI_INTR_SEQTIMEOUT_MASK  (0x800U)
+#define FLEXSPI_INTR_SEQTIMEOUT_SHIFT (11U)
+#define FLEXSPI_INTR_SEQTIMEOUT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SEQTIMEOUT_SHIFT)) & FLEXSPI_INTR_SEQTIMEOUT_MASK)
 /*! @} */
 
 /*! @name LUTKEY - LUT Key Register */
 /*! @{ */
-#define FLEXSPI_LUTKEY_KEY_MASK                  (0xFFFFFFFFU)
-#define FLEXSPI_LUTKEY_KEY_SHIFT                 (0U)
-#define FLEXSPI_LUTKEY_KEY(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTKEY_KEY_SHIFT)) & FLEXSPI_LUTKEY_KEY_MASK)
+#define FLEXSPI_LUTKEY_KEY_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_LUTKEY_KEY_SHIFT (0U)
+#define FLEXSPI_LUTKEY_KEY(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTKEY_KEY_SHIFT)) & FLEXSPI_LUTKEY_KEY_MASK)
 /*! @} */
 
 /*! @name LUTCR - LUT Control Register */
 /*! @{ */
-#define FLEXSPI_LUTCR_LOCK_MASK                  (0x1U)
-#define FLEXSPI_LUTCR_LOCK_SHIFT                 (0U)
-#define FLEXSPI_LUTCR_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_LOCK_SHIFT)) & FLEXSPI_LUTCR_LOCK_MASK)
-#define FLEXSPI_LUTCR_UNLOCK_MASK                (0x2U)
-#define FLEXSPI_LUTCR_UNLOCK_SHIFT               (1U)
-#define FLEXSPI_LUTCR_UNLOCK(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_UNLOCK_SHIFT)) & FLEXSPI_LUTCR_UNLOCK_MASK)
+#define FLEXSPI_LUTCR_LOCK_MASK    (0x1U)
+#define FLEXSPI_LUTCR_LOCK_SHIFT   (0U)
+#define FLEXSPI_LUTCR_LOCK(x)      (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_LOCK_SHIFT)) & FLEXSPI_LUTCR_LOCK_MASK)
+#define FLEXSPI_LUTCR_UNLOCK_MASK  (0x2U)
+#define FLEXSPI_LUTCR_UNLOCK_SHIFT (1U)
+#define FLEXSPI_LUTCR_UNLOCK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_UNLOCK_SHIFT)) & FLEXSPI_LUTCR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name AHBRXBUFCR0 - AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0 */
 /*! @{ */
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK           (0xFFU)
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT          (0U)
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT)) & FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID_MASK          (0xF0000U)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT         (16U)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT)) & FLEXSPI_AHBRXBUFCR0_MSTRID_MASK)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK        (0x3000000U)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT       (24U)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY(x)          (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK      (0x80000000U)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT     (31U)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK  (0xFFU)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT (0U)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT)) & FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID_MASK  (0xF0000U)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT (16U)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT)) & FLEXSPI_AHBRXBUFCR0_MSTRID_MASK)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK  (0x3000000U)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT (24U)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK  (0x80000000U)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT (31U)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_AHBRXBUFCR0 */
-#define FLEXSPI_AHBRXBUFCR0_COUNT                (4U)
+#define FLEXSPI_AHBRXBUFCR0_COUNT (4U)
 
 /*! @name FLSHCR0 - Flash A1 Control Register 0..Flash B2 Control Register 0 */
 /*! @{ */
-#define FLEXSPI_FLSHCR0_FLSHSZ_MASK              (0x7FFFFFU)
-#define FLEXSPI_FLSHCR0_FLSHSZ_SHIFT             (0U)
-#define FLEXSPI_FLSHCR0_FLSHSZ(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR0_FLSHSZ_SHIFT)) & FLEXSPI_FLSHCR0_FLSHSZ_MASK)
+#define FLEXSPI_FLSHCR0_FLSHSZ_MASK  (0x7FFFFFU)
+#define FLEXSPI_FLSHCR0_FLSHSZ_SHIFT (0U)
+#define FLEXSPI_FLSHCR0_FLSHSZ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR0_FLSHSZ_SHIFT)) & FLEXSPI_FLSHCR0_FLSHSZ_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR0 */
-#define FLEXSPI_FLSHCR0_COUNT                    (4U)
+#define FLEXSPI_FLSHCR0_COUNT (4U)
 
 /*! @name FLSHCR1 - Flash A1 Control Register 1..Flash B2 Control Register 1 */
 /*! @{ */
-#define FLEXSPI_FLSHCR1_TCSS_MASK                (0x1FU)
-#define FLEXSPI_FLSHCR1_TCSS_SHIFT               (0U)
-#define FLEXSPI_FLSHCR1_TCSS(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSS_SHIFT)) & FLEXSPI_FLSHCR1_TCSS_MASK)
-#define FLEXSPI_FLSHCR1_TCSH_MASK                (0x3E0U)
-#define FLEXSPI_FLSHCR1_TCSH_SHIFT               (5U)
-#define FLEXSPI_FLSHCR1_TCSH(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSH_SHIFT)) & FLEXSPI_FLSHCR1_TCSH_MASK)
-#define FLEXSPI_FLSHCR1_WA_MASK                  (0x400U)
-#define FLEXSPI_FLSHCR1_WA_SHIFT                 (10U)
-#define FLEXSPI_FLSHCR1_WA(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_WA_SHIFT)) & FLEXSPI_FLSHCR1_WA_MASK)
-#define FLEXSPI_FLSHCR1_CAS_MASK                 (0x7800U)
-#define FLEXSPI_FLSHCR1_CAS_SHIFT                (11U)
-#define FLEXSPI_FLSHCR1_CAS(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CAS_SHIFT)) & FLEXSPI_FLSHCR1_CAS_MASK)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK      (0x8000U)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT     (15U)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK)
-#define FLEXSPI_FLSHCR1_CSINTERVAL_MASK          (0xFFFF0000U)
-#define FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT         (16U)
-#define FLEXSPI_FLSHCR1_CSINTERVAL(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVAL_MASK)
+#define FLEXSPI_FLSHCR1_TCSS_MASK  (0x1FU)
+#define FLEXSPI_FLSHCR1_TCSS_SHIFT (0U)
+#define FLEXSPI_FLSHCR1_TCSS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSS_SHIFT)) & FLEXSPI_FLSHCR1_TCSS_MASK)
+#define FLEXSPI_FLSHCR1_TCSH_MASK  (0x3E0U)
+#define FLEXSPI_FLSHCR1_TCSH_SHIFT (5U)
+#define FLEXSPI_FLSHCR1_TCSH(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSH_SHIFT)) & FLEXSPI_FLSHCR1_TCSH_MASK)
+#define FLEXSPI_FLSHCR1_WA_MASK              (0x400U)
+#define FLEXSPI_FLSHCR1_WA_SHIFT             (10U)
+#define FLEXSPI_FLSHCR1_WA(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_WA_SHIFT)) & FLEXSPI_FLSHCR1_WA_MASK)
+#define FLEXSPI_FLSHCR1_CAS_MASK             (0x7800U)
+#define FLEXSPI_FLSHCR1_CAS_SHIFT            (11U)
+#define FLEXSPI_FLSHCR1_CAS(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CAS_SHIFT)) & FLEXSPI_FLSHCR1_CAS_MASK)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK  (0x8000U)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT (15U)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK)
+#define FLEXSPI_FLSHCR1_CSINTERVAL_MASK  (0xFFFF0000U)
+#define FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT (16U)
+#define FLEXSPI_FLSHCR1_CSINTERVAL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVAL_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR1 */
-#define FLEXSPI_FLSHCR1_COUNT                    (4U)
+#define FLEXSPI_FLSHCR1_COUNT (4U)
 
 /*! @name FLSHCR2 - Flash A1 Control Register 2..Flash B2 Control Register 2 */
 /*! @{ */
-#define FLEXSPI_FLSHCR2_ARDSEQID_MASK            (0xFU)
-#define FLEXSPI_FLSHCR2_ARDSEQID_SHIFT           (0U)
-#define FLEXSPI_FLSHCR2_ARDSEQID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQID_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQID_MASK)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM_MASK           (0xE0U)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT          (5U)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQNUM_MASK)
-#define FLEXSPI_FLSHCR2_AWRSEQID_MASK            (0xF00U)
-#define FLEXSPI_FLSHCR2_AWRSEQID_SHIFT           (8U)
-#define FLEXSPI_FLSHCR2_AWRSEQID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQID_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQID_MASK)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM_MASK           (0xE000U)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT          (13U)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQNUM_MASK)
-#define FLEXSPI_FLSHCR2_AWRWAIT_MASK             (0xFFF0000U)
-#define FLEXSPI_FLSHCR2_AWRWAIT_SHIFT            (16U)
-#define FLEXSPI_FLSHCR2_AWRWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAIT_MASK)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK         (0x70000000U)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT        (28U)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK         (0x80000000U)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT        (31U)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT)) & FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK)
+#define FLEXSPI_FLSHCR2_ARDSEQID_MASK  (0xFU)
+#define FLEXSPI_FLSHCR2_ARDSEQID_SHIFT (0U)
+#define FLEXSPI_FLSHCR2_ARDSEQID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQID_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQID_MASK)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM_MASK  (0xE0U)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT (5U)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQNUM_MASK)
+#define FLEXSPI_FLSHCR2_AWRSEQID_MASK  (0xF00U)
+#define FLEXSPI_FLSHCR2_AWRSEQID_SHIFT (8U)
+#define FLEXSPI_FLSHCR2_AWRSEQID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQID_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQID_MASK)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM_MASK  (0xE000U)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT (13U)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQNUM_MASK)
+#define FLEXSPI_FLSHCR2_AWRWAIT_MASK  (0xFFF0000U)
+#define FLEXSPI_FLSHCR2_AWRWAIT_SHIFT (16U)
+#define FLEXSPI_FLSHCR2_AWRWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAIT_MASK)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK  (0x70000000U)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT (28U)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK  (0x80000000U)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT (31U)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT)) & FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR2 */
-#define FLEXSPI_FLSHCR2_COUNT                    (4U)
+#define FLEXSPI_FLSHCR2_COUNT (4U)
 
 /*! @name FLSHCR4 - Flash Control Register 4 */
 /*! @{ */
-#define FLEXSPI_FLSHCR4_WMOPT1_MASK              (0x1U)
-#define FLEXSPI_FLSHCR4_WMOPT1_SHIFT             (0U)
-#define FLEXSPI_FLSHCR4_WMOPT1(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMOPT1_SHIFT)) & FLEXSPI_FLSHCR4_WMOPT1_MASK)
-#define FLEXSPI_FLSHCR4_WMENA_MASK               (0x4U)
-#define FLEXSPI_FLSHCR4_WMENA_SHIFT              (2U)
-#define FLEXSPI_FLSHCR4_WMENA(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENA_SHIFT)) & FLEXSPI_FLSHCR4_WMENA_MASK)
-#define FLEXSPI_FLSHCR4_WMENB_MASK               (0x8U)
-#define FLEXSPI_FLSHCR4_WMENB_SHIFT              (3U)
-#define FLEXSPI_FLSHCR4_WMENB(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENB_SHIFT)) & FLEXSPI_FLSHCR4_WMENB_MASK)
+#define FLEXSPI_FLSHCR4_WMOPT1_MASK  (0x1U)
+#define FLEXSPI_FLSHCR4_WMOPT1_SHIFT (0U)
+#define FLEXSPI_FLSHCR4_WMOPT1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMOPT1_SHIFT)) & FLEXSPI_FLSHCR4_WMOPT1_MASK)
+#define FLEXSPI_FLSHCR4_WMENA_MASK  (0x4U)
+#define FLEXSPI_FLSHCR4_WMENA_SHIFT (2U)
+#define FLEXSPI_FLSHCR4_WMENA(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENA_SHIFT)) & FLEXSPI_FLSHCR4_WMENA_MASK)
+#define FLEXSPI_FLSHCR4_WMENB_MASK  (0x8U)
+#define FLEXSPI_FLSHCR4_WMENB_SHIFT (3U)
+#define FLEXSPI_FLSHCR4_WMENB(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENB_SHIFT)) & FLEXSPI_FLSHCR4_WMENB_MASK)
 /*! @} */
 
 /*! @name IPCR0 - IP Control Register 0 */
 /*! @{ */
-#define FLEXSPI_IPCR0_SFAR_MASK                  (0xFFFFFFFFU)
-#define FLEXSPI_IPCR0_SFAR_SHIFT                 (0U)
-#define FLEXSPI_IPCR0_SFAR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR0_SFAR_SHIFT)) & FLEXSPI_IPCR0_SFAR_MASK)
+#define FLEXSPI_IPCR0_SFAR_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_IPCR0_SFAR_SHIFT (0U)
+#define FLEXSPI_IPCR0_SFAR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR0_SFAR_SHIFT)) & FLEXSPI_IPCR0_SFAR_MASK)
 /*! @} */
 
 /*! @name IPCR1 - IP Control Register 1 */
 /*! @{ */
-#define FLEXSPI_IPCR1_IDATSZ_MASK                (0xFFFFU)
-#define FLEXSPI_IPCR1_IDATSZ_SHIFT               (0U)
-#define FLEXSPI_IPCR1_IDATSZ(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IDATSZ_SHIFT)) & FLEXSPI_IPCR1_IDATSZ_MASK)
-#define FLEXSPI_IPCR1_ISEQID_MASK                (0xF0000U)
-#define FLEXSPI_IPCR1_ISEQID_SHIFT               (16U)
-#define FLEXSPI_IPCR1_ISEQID(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQID_SHIFT)) & FLEXSPI_IPCR1_ISEQID_MASK)
-#define FLEXSPI_IPCR1_ISEQNUM_MASK               (0x7000000U)
-#define FLEXSPI_IPCR1_ISEQNUM_SHIFT              (24U)
-#define FLEXSPI_IPCR1_ISEQNUM(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQNUM_SHIFT)) & FLEXSPI_IPCR1_ISEQNUM_MASK)
-#define FLEXSPI_IPCR1_IPAREN_MASK                (0x80000000U)
-#define FLEXSPI_IPCR1_IPAREN_SHIFT               (31U)
-#define FLEXSPI_IPCR1_IPAREN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IPAREN_SHIFT)) & FLEXSPI_IPCR1_IPAREN_MASK)
+#define FLEXSPI_IPCR1_IDATSZ_MASK  (0xFFFFU)
+#define FLEXSPI_IPCR1_IDATSZ_SHIFT (0U)
+#define FLEXSPI_IPCR1_IDATSZ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IDATSZ_SHIFT)) & FLEXSPI_IPCR1_IDATSZ_MASK)
+#define FLEXSPI_IPCR1_ISEQID_MASK  (0xF0000U)
+#define FLEXSPI_IPCR1_ISEQID_SHIFT (16U)
+#define FLEXSPI_IPCR1_ISEQID(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQID_SHIFT)) & FLEXSPI_IPCR1_ISEQID_MASK)
+#define FLEXSPI_IPCR1_ISEQNUM_MASK  (0x7000000U)
+#define FLEXSPI_IPCR1_ISEQNUM_SHIFT (24U)
+#define FLEXSPI_IPCR1_ISEQNUM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQNUM_SHIFT)) & FLEXSPI_IPCR1_ISEQNUM_MASK)
+#define FLEXSPI_IPCR1_IPAREN_MASK  (0x80000000U)
+#define FLEXSPI_IPCR1_IPAREN_SHIFT (31U)
+#define FLEXSPI_IPCR1_IPAREN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IPAREN_SHIFT)) & FLEXSPI_IPCR1_IPAREN_MASK)
 /*! @} */
 
 /*! @name IPCMD - IP Command Register */
 /*! @{ */
-#define FLEXSPI_IPCMD_TRG_MASK                   (0x1U)
-#define FLEXSPI_IPCMD_TRG_SHIFT                  (0U)
-#define FLEXSPI_IPCMD_TRG(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCMD_TRG_SHIFT)) & FLEXSPI_IPCMD_TRG_MASK)
+#define FLEXSPI_IPCMD_TRG_MASK  (0x1U)
+#define FLEXSPI_IPCMD_TRG_SHIFT (0U)
+#define FLEXSPI_IPCMD_TRG(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCMD_TRG_SHIFT)) & FLEXSPI_IPCMD_TRG_MASK)
 /*! @} */
 
 /*! @name IPRXFCR - IP RX FIFO Control Register */
 /*! @{ */
-#define FLEXSPI_IPRXFCR_CLRIPRXF_MASK            (0x1U)
-#define FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT           (0U)
-#define FLEXSPI_IPRXFCR_CLRIPRXF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT)) & FLEXSPI_IPRXFCR_CLRIPRXF_MASK)
-#define FLEXSPI_IPRXFCR_RXDMAEN_MASK             (0x2U)
-#define FLEXSPI_IPRXFCR_RXDMAEN_SHIFT            (1U)
-#define FLEXSPI_IPRXFCR_RXDMAEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXDMAEN_SHIFT)) & FLEXSPI_IPRXFCR_RXDMAEN_MASK)
-#define FLEXSPI_IPRXFCR_RXWMRK_MASK              (0x3CU)
-#define FLEXSPI_IPRXFCR_RXWMRK_SHIFT             (2U)
-#define FLEXSPI_IPRXFCR_RXWMRK(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXWMRK_SHIFT)) & FLEXSPI_IPRXFCR_RXWMRK_MASK)
+#define FLEXSPI_IPRXFCR_CLRIPRXF_MASK  (0x1U)
+#define FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT (0U)
+#define FLEXSPI_IPRXFCR_CLRIPRXF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT)) & FLEXSPI_IPRXFCR_CLRIPRXF_MASK)
+#define FLEXSPI_IPRXFCR_RXDMAEN_MASK  (0x2U)
+#define FLEXSPI_IPRXFCR_RXDMAEN_SHIFT (1U)
+#define FLEXSPI_IPRXFCR_RXDMAEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXDMAEN_SHIFT)) & FLEXSPI_IPRXFCR_RXDMAEN_MASK)
+#define FLEXSPI_IPRXFCR_RXWMRK_MASK  (0x3CU)
+#define FLEXSPI_IPRXFCR_RXWMRK_SHIFT (2U)
+#define FLEXSPI_IPRXFCR_RXWMRK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXWMRK_SHIFT)) & FLEXSPI_IPRXFCR_RXWMRK_MASK)
 /*! @} */
 
 /*! @name IPTXFCR - IP TX FIFO Control Register */
 /*! @{ */
-#define FLEXSPI_IPTXFCR_CLRIPTXF_MASK            (0x1U)
-#define FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT           (0U)
-#define FLEXSPI_IPTXFCR_CLRIPTXF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
-#define FLEXSPI_IPTXFCR_TXDMAEN_MASK             (0x2U)
-#define FLEXSPI_IPTXFCR_TXDMAEN_SHIFT            (1U)
-#define FLEXSPI_IPTXFCR_TXDMAEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXDMAEN_SHIFT)) & FLEXSPI_IPTXFCR_TXDMAEN_MASK)
-#define FLEXSPI_IPTXFCR_TXWMRK_MASK              (0x3CU)
-#define FLEXSPI_IPTXFCR_TXWMRK_SHIFT             (2U)
-#define FLEXSPI_IPTXFCR_TXWMRK(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXWMRK_SHIFT)) & FLEXSPI_IPTXFCR_TXWMRK_MASK)
+#define FLEXSPI_IPTXFCR_CLRIPTXF_MASK  (0x1U)
+#define FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT (0U)
+#define FLEXSPI_IPTXFCR_CLRIPTXF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
+#define FLEXSPI_IPTXFCR_TXDMAEN_MASK  (0x2U)
+#define FLEXSPI_IPTXFCR_TXDMAEN_SHIFT (1U)
+#define FLEXSPI_IPTXFCR_TXDMAEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXDMAEN_SHIFT)) & FLEXSPI_IPTXFCR_TXDMAEN_MASK)
+#define FLEXSPI_IPTXFCR_TXWMRK_MASK  (0x3CU)
+#define FLEXSPI_IPTXFCR_TXWMRK_SHIFT (2U)
+#define FLEXSPI_IPTXFCR_TXWMRK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXWMRK_SHIFT)) & FLEXSPI_IPTXFCR_TXWMRK_MASK)
 /*! @} */
 
 /*! @name DLLCR - DLL Control Register 0 */
 /*! @{ */
-#define FLEXSPI_DLLCR_DLLEN_MASK                 (0x1U)
-#define FLEXSPI_DLLCR_DLLEN_SHIFT                (0U)
-#define FLEXSPI_DLLCR_DLLEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLEN_SHIFT)) & FLEXSPI_DLLCR_DLLEN_MASK)
-#define FLEXSPI_DLLCR_DLLRESET_MASK              (0x2U)
-#define FLEXSPI_DLLCR_DLLRESET_SHIFT             (1U)
-#define FLEXSPI_DLLCR_DLLRESET(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLRESET_SHIFT)) & FLEXSPI_DLLCR_DLLRESET_MASK)
-#define FLEXSPI_DLLCR_SLVDLYTARGET_MASK          (0x78U)
-#define FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT         (3U)
-#define FLEXSPI_DLLCR_SLVDLYTARGET(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT)) & FLEXSPI_DLLCR_SLVDLYTARGET_MASK)
-#define FLEXSPI_DLLCR_OVRDEN_MASK                (0x100U)
-#define FLEXSPI_DLLCR_OVRDEN_SHIFT               (8U)
-#define FLEXSPI_DLLCR_OVRDEN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDEN_SHIFT)) & FLEXSPI_DLLCR_OVRDEN_MASK)
-#define FLEXSPI_DLLCR_OVRDVAL_MASK               (0x7E00U)
-#define FLEXSPI_DLLCR_OVRDVAL_SHIFT              (9U)
-#define FLEXSPI_DLLCR_OVRDVAL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDVAL_SHIFT)) & FLEXSPI_DLLCR_OVRDVAL_MASK)
+#define FLEXSPI_DLLCR_DLLEN_MASK     (0x1U)
+#define FLEXSPI_DLLCR_DLLEN_SHIFT    (0U)
+#define FLEXSPI_DLLCR_DLLEN(x)       (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLEN_SHIFT)) & FLEXSPI_DLLCR_DLLEN_MASK)
+#define FLEXSPI_DLLCR_DLLRESET_MASK  (0x2U)
+#define FLEXSPI_DLLCR_DLLRESET_SHIFT (1U)
+#define FLEXSPI_DLLCR_DLLRESET(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLRESET_SHIFT)) & FLEXSPI_DLLCR_DLLRESET_MASK)
+#define FLEXSPI_DLLCR_SLVDLYTARGET_MASK  (0x78U)
+#define FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT (3U)
+#define FLEXSPI_DLLCR_SLVDLYTARGET(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT)) & FLEXSPI_DLLCR_SLVDLYTARGET_MASK)
+#define FLEXSPI_DLLCR_OVRDEN_MASK  (0x100U)
+#define FLEXSPI_DLLCR_OVRDEN_SHIFT (8U)
+#define FLEXSPI_DLLCR_OVRDEN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDEN_SHIFT)) & FLEXSPI_DLLCR_OVRDEN_MASK)
+#define FLEXSPI_DLLCR_OVRDVAL_MASK  (0x7E00U)
+#define FLEXSPI_DLLCR_OVRDVAL_SHIFT (9U)
+#define FLEXSPI_DLLCR_OVRDVAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDVAL_SHIFT)) & FLEXSPI_DLLCR_OVRDVAL_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_DLLCR */
-#define FLEXSPI_DLLCR_COUNT                      (2U)
+#define FLEXSPI_DLLCR_COUNT (2U)
 
 /*! @name STS0 - Status Register 0 */
 /*! @{ */
-#define FLEXSPI_STS0_SEQIDLE_MASK                (0x1U)
-#define FLEXSPI_STS0_SEQIDLE_SHIFT               (0U)
-#define FLEXSPI_STS0_SEQIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_SEQIDLE_SHIFT)) & FLEXSPI_STS0_SEQIDLE_MASK)
-#define FLEXSPI_STS0_ARBIDLE_MASK                (0x2U)
-#define FLEXSPI_STS0_ARBIDLE_SHIFT               (1U)
-#define FLEXSPI_STS0_ARBIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBIDLE_SHIFT)) & FLEXSPI_STS0_ARBIDLE_MASK)
-#define FLEXSPI_STS0_ARBCMDSRC_MASK              (0xCU)
-#define FLEXSPI_STS0_ARBCMDSRC_SHIFT             (2U)
-#define FLEXSPI_STS0_ARBCMDSRC(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBCMDSRC_SHIFT)) & FLEXSPI_STS0_ARBCMDSRC_MASK)
+#define FLEXSPI_STS0_SEQIDLE_MASK  (0x1U)
+#define FLEXSPI_STS0_SEQIDLE_SHIFT (0U)
+#define FLEXSPI_STS0_SEQIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_SEQIDLE_SHIFT)) & FLEXSPI_STS0_SEQIDLE_MASK)
+#define FLEXSPI_STS0_ARBIDLE_MASK  (0x2U)
+#define FLEXSPI_STS0_ARBIDLE_SHIFT (1U)
+#define FLEXSPI_STS0_ARBIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBIDLE_SHIFT)) & FLEXSPI_STS0_ARBIDLE_MASK)
+#define FLEXSPI_STS0_ARBCMDSRC_MASK  (0xCU)
+#define FLEXSPI_STS0_ARBCMDSRC_SHIFT (2U)
+#define FLEXSPI_STS0_ARBCMDSRC(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBCMDSRC_SHIFT)) & FLEXSPI_STS0_ARBCMDSRC_MASK)
 /*! @} */
 
 /*! @name STS1 - Status Register 1 */
 /*! @{ */
-#define FLEXSPI_STS1_AHBCMDERRID_MASK            (0xFU)
-#define FLEXSPI_STS1_AHBCMDERRID_SHIFT           (0U)
-#define FLEXSPI_STS1_AHBCMDERRID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRID_SHIFT)) & FLEXSPI_STS1_AHBCMDERRID_MASK)
-#define FLEXSPI_STS1_AHBCMDERRCODE_MASK          (0xF00U)
-#define FLEXSPI_STS1_AHBCMDERRCODE_SHIFT         (8U)
-#define FLEXSPI_STS1_AHBCMDERRCODE(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRCODE_SHIFT)) & FLEXSPI_STS1_AHBCMDERRCODE_MASK)
-#define FLEXSPI_STS1_IPCMDERRID_MASK             (0xF0000U)
-#define FLEXSPI_STS1_IPCMDERRID_SHIFT            (16U)
-#define FLEXSPI_STS1_IPCMDERRID(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRID_SHIFT)) & FLEXSPI_STS1_IPCMDERRID_MASK)
-#define FLEXSPI_STS1_IPCMDERRCODE_MASK           (0xF000000U)
-#define FLEXSPI_STS1_IPCMDERRCODE_SHIFT          (24U)
-#define FLEXSPI_STS1_IPCMDERRCODE(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRCODE_SHIFT)) & FLEXSPI_STS1_IPCMDERRCODE_MASK)
+#define FLEXSPI_STS1_AHBCMDERRID_MASK  (0xFU)
+#define FLEXSPI_STS1_AHBCMDERRID_SHIFT (0U)
+#define FLEXSPI_STS1_AHBCMDERRID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRID_SHIFT)) & FLEXSPI_STS1_AHBCMDERRID_MASK)
+#define FLEXSPI_STS1_AHBCMDERRCODE_MASK  (0xF00U)
+#define FLEXSPI_STS1_AHBCMDERRCODE_SHIFT (8U)
+#define FLEXSPI_STS1_AHBCMDERRCODE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRCODE_SHIFT)) & FLEXSPI_STS1_AHBCMDERRCODE_MASK)
+#define FLEXSPI_STS1_IPCMDERRID_MASK  (0xF0000U)
+#define FLEXSPI_STS1_IPCMDERRID_SHIFT (16U)
+#define FLEXSPI_STS1_IPCMDERRID(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRID_SHIFT)) & FLEXSPI_STS1_IPCMDERRID_MASK)
+#define FLEXSPI_STS1_IPCMDERRCODE_MASK  (0xF000000U)
+#define FLEXSPI_STS1_IPCMDERRCODE_SHIFT (24U)
+#define FLEXSPI_STS1_IPCMDERRCODE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRCODE_SHIFT)) & FLEXSPI_STS1_IPCMDERRCODE_MASK)
 /*! @} */
 
 /*! @name STS2 - Status Register 2 */
 /*! @{ */
-#define FLEXSPI_STS2_ASLVLOCK_MASK               (0x1U)
-#define FLEXSPI_STS2_ASLVLOCK_SHIFT              (0U)
-#define FLEXSPI_STS2_ASLVLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVLOCK_SHIFT)) & FLEXSPI_STS2_ASLVLOCK_MASK)
-#define FLEXSPI_STS2_AREFLOCK_MASK               (0x2U)
-#define FLEXSPI_STS2_AREFLOCK_SHIFT              (1U)
-#define FLEXSPI_STS2_AREFLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFLOCK_SHIFT)) & FLEXSPI_STS2_AREFLOCK_MASK)
-#define FLEXSPI_STS2_ASLVSEL_MASK                (0xFCU)
-#define FLEXSPI_STS2_ASLVSEL_SHIFT               (2U)
-#define FLEXSPI_STS2_ASLVSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVSEL_SHIFT)) & FLEXSPI_STS2_ASLVSEL_MASK)
-#define FLEXSPI_STS2_AREFSEL_MASK                (0x3F00U)
-#define FLEXSPI_STS2_AREFSEL_SHIFT               (8U)
-#define FLEXSPI_STS2_AREFSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFSEL_SHIFT)) & FLEXSPI_STS2_AREFSEL_MASK)
-#define FLEXSPI_STS2_BSLVLOCK_MASK               (0x10000U)
-#define FLEXSPI_STS2_BSLVLOCK_SHIFT              (16U)
-#define FLEXSPI_STS2_BSLVLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVLOCK_SHIFT)) & FLEXSPI_STS2_BSLVLOCK_MASK)
-#define FLEXSPI_STS2_BREFLOCK_MASK               (0x20000U)
-#define FLEXSPI_STS2_BREFLOCK_SHIFT              (17U)
-#define FLEXSPI_STS2_BREFLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFLOCK_SHIFT)) & FLEXSPI_STS2_BREFLOCK_MASK)
-#define FLEXSPI_STS2_BSLVSEL_MASK                (0xFC0000U)
-#define FLEXSPI_STS2_BSLVSEL_SHIFT               (18U)
-#define FLEXSPI_STS2_BSLVSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVSEL_SHIFT)) & FLEXSPI_STS2_BSLVSEL_MASK)
-#define FLEXSPI_STS2_BREFSEL_MASK                (0x3F000000U)
-#define FLEXSPI_STS2_BREFSEL_SHIFT               (24U)
-#define FLEXSPI_STS2_BREFSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFSEL_SHIFT)) & FLEXSPI_STS2_BREFSEL_MASK)
+#define FLEXSPI_STS2_ASLVLOCK_MASK  (0x1U)
+#define FLEXSPI_STS2_ASLVLOCK_SHIFT (0U)
+#define FLEXSPI_STS2_ASLVLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVLOCK_SHIFT)) & FLEXSPI_STS2_ASLVLOCK_MASK)
+#define FLEXSPI_STS2_AREFLOCK_MASK  (0x2U)
+#define FLEXSPI_STS2_AREFLOCK_SHIFT (1U)
+#define FLEXSPI_STS2_AREFLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFLOCK_SHIFT)) & FLEXSPI_STS2_AREFLOCK_MASK)
+#define FLEXSPI_STS2_ASLVSEL_MASK  (0xFCU)
+#define FLEXSPI_STS2_ASLVSEL_SHIFT (2U)
+#define FLEXSPI_STS2_ASLVSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVSEL_SHIFT)) & FLEXSPI_STS2_ASLVSEL_MASK)
+#define FLEXSPI_STS2_AREFSEL_MASK  (0x3F00U)
+#define FLEXSPI_STS2_AREFSEL_SHIFT (8U)
+#define FLEXSPI_STS2_AREFSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFSEL_SHIFT)) & FLEXSPI_STS2_AREFSEL_MASK)
+#define FLEXSPI_STS2_BSLVLOCK_MASK  (0x10000U)
+#define FLEXSPI_STS2_BSLVLOCK_SHIFT (16U)
+#define FLEXSPI_STS2_BSLVLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVLOCK_SHIFT)) & FLEXSPI_STS2_BSLVLOCK_MASK)
+#define FLEXSPI_STS2_BREFLOCK_MASK  (0x20000U)
+#define FLEXSPI_STS2_BREFLOCK_SHIFT (17U)
+#define FLEXSPI_STS2_BREFLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFLOCK_SHIFT)) & FLEXSPI_STS2_BREFLOCK_MASK)
+#define FLEXSPI_STS2_BSLVSEL_MASK  (0xFC0000U)
+#define FLEXSPI_STS2_BSLVSEL_SHIFT (18U)
+#define FLEXSPI_STS2_BSLVSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVSEL_SHIFT)) & FLEXSPI_STS2_BSLVSEL_MASK)
+#define FLEXSPI_STS2_BREFSEL_MASK  (0x3F000000U)
+#define FLEXSPI_STS2_BREFSEL_SHIFT (24U)
+#define FLEXSPI_STS2_BREFSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFSEL_SHIFT)) & FLEXSPI_STS2_BREFSEL_MASK)
 /*! @} */
 
 /*! @name AHBSPNDSTS - AHB Suspend Status Register */
 /*! @{ */
-#define FLEXSPI_AHBSPNDSTS_ACTIVE_MASK           (0x1U)
-#define FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT          (0U)
-#define FLEXSPI_AHBSPNDSTS_ACTIVE(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT)) & FLEXSPI_AHBSPNDSTS_ACTIVE_MASK)
-#define FLEXSPI_AHBSPNDSTS_BUFID_MASK            (0xEU)
-#define FLEXSPI_AHBSPNDSTS_BUFID_SHIFT           (1U)
-#define FLEXSPI_AHBSPNDSTS_BUFID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_BUFID_SHIFT)) & FLEXSPI_AHBSPNDSTS_BUFID_MASK)
-#define FLEXSPI_AHBSPNDSTS_DATLFT_MASK           (0xFFFF0000U)
-#define FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT          (16U)
-#define FLEXSPI_AHBSPNDSTS_DATLFT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT)) & FLEXSPI_AHBSPNDSTS_DATLFT_MASK)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE_MASK  (0x1U)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT (0U)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT)) & FLEXSPI_AHBSPNDSTS_ACTIVE_MASK)
+#define FLEXSPI_AHBSPNDSTS_BUFID_MASK  (0xEU)
+#define FLEXSPI_AHBSPNDSTS_BUFID_SHIFT (1U)
+#define FLEXSPI_AHBSPNDSTS_BUFID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_BUFID_SHIFT)) & FLEXSPI_AHBSPNDSTS_BUFID_MASK)
+#define FLEXSPI_AHBSPNDSTS_DATLFT_MASK  (0xFFFF0000U)
+#define FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT (16U)
+#define FLEXSPI_AHBSPNDSTS_DATLFT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT)) & FLEXSPI_AHBSPNDSTS_DATLFT_MASK)
 /*! @} */
 
 /*! @name IPRXFSTS - IP RX FIFO Status Register */
 /*! @{ */
-#define FLEXSPI_IPRXFSTS_FILL_MASK               (0xFFU)
-#define FLEXSPI_IPRXFSTS_FILL_SHIFT              (0U)
-#define FLEXSPI_IPRXFSTS_FILL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_FILL_SHIFT)) & FLEXSPI_IPRXFSTS_FILL_MASK)
-#define FLEXSPI_IPRXFSTS_RDCNTR_MASK             (0xFFFF0000U)
-#define FLEXSPI_IPRXFSTS_RDCNTR_SHIFT            (16U)
-#define FLEXSPI_IPRXFSTS_RDCNTR(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_RDCNTR_SHIFT)) & FLEXSPI_IPRXFSTS_RDCNTR_MASK)
+#define FLEXSPI_IPRXFSTS_FILL_MASK  (0xFFU)
+#define FLEXSPI_IPRXFSTS_FILL_SHIFT (0U)
+#define FLEXSPI_IPRXFSTS_FILL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_FILL_SHIFT)) & FLEXSPI_IPRXFSTS_FILL_MASK)
+#define FLEXSPI_IPRXFSTS_RDCNTR_MASK  (0xFFFF0000U)
+#define FLEXSPI_IPRXFSTS_RDCNTR_SHIFT (16U)
+#define FLEXSPI_IPRXFSTS_RDCNTR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_RDCNTR_SHIFT)) & FLEXSPI_IPRXFSTS_RDCNTR_MASK)
 /*! @} */
 
 /*! @name IPTXFSTS - IP TX FIFO Status Register */
 /*! @{ */
-#define FLEXSPI_IPTXFSTS_FILL_MASK               (0xFFU)
-#define FLEXSPI_IPTXFSTS_FILL_SHIFT              (0U)
-#define FLEXSPI_IPTXFSTS_FILL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_FILL_SHIFT)) & FLEXSPI_IPTXFSTS_FILL_MASK)
-#define FLEXSPI_IPTXFSTS_WRCNTR_MASK             (0xFFFF0000U)
-#define FLEXSPI_IPTXFSTS_WRCNTR_SHIFT            (16U)
-#define FLEXSPI_IPTXFSTS_WRCNTR(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_WRCNTR_SHIFT)) & FLEXSPI_IPTXFSTS_WRCNTR_MASK)
+#define FLEXSPI_IPTXFSTS_FILL_MASK  (0xFFU)
+#define FLEXSPI_IPTXFSTS_FILL_SHIFT (0U)
+#define FLEXSPI_IPTXFSTS_FILL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_FILL_SHIFT)) & FLEXSPI_IPTXFSTS_FILL_MASK)
+#define FLEXSPI_IPTXFSTS_WRCNTR_MASK  (0xFFFF0000U)
+#define FLEXSPI_IPTXFSTS_WRCNTR_SHIFT (16U)
+#define FLEXSPI_IPTXFSTS_WRCNTR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_WRCNTR_SHIFT)) & FLEXSPI_IPTXFSTS_WRCNTR_MASK)
 /*! @} */
 
 /*! @name RFDR - IP RX FIFO Data Register 0..IP RX FIFO Data Register 31 */
 /*! @{ */
-#define FLEXSPI_RFDR_RXDATA_MASK                 (0xFFFFFFFFU)
-#define FLEXSPI_RFDR_RXDATA_SHIFT                (0U)
-#define FLEXSPI_RFDR_RXDATA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_RFDR_RXDATA_SHIFT)) & FLEXSPI_RFDR_RXDATA_MASK)
+#define FLEXSPI_RFDR_RXDATA_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_RFDR_RXDATA_SHIFT (0U)
+#define FLEXSPI_RFDR_RXDATA(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_RFDR_RXDATA_SHIFT)) & FLEXSPI_RFDR_RXDATA_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_RFDR */
-#define FLEXSPI_RFDR_COUNT                       (32U)
+#define FLEXSPI_RFDR_COUNT (32U)
 
 /*! @name TFDR - IP TX FIFO Data Register 0..IP TX FIFO Data Register 31 */
 /*! @{ */
-#define FLEXSPI_TFDR_TXDATA_MASK                 (0xFFFFFFFFU)
-#define FLEXSPI_TFDR_TXDATA_SHIFT                (0U)
-#define FLEXSPI_TFDR_TXDATA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_TFDR_TXDATA_SHIFT)) & FLEXSPI_TFDR_TXDATA_MASK)
+#define FLEXSPI_TFDR_TXDATA_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_TFDR_TXDATA_SHIFT (0U)
+#define FLEXSPI_TFDR_TXDATA(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_TFDR_TXDATA_SHIFT)) & FLEXSPI_TFDR_TXDATA_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_TFDR */
-#define FLEXSPI_TFDR_COUNT                       (32U)
+#define FLEXSPI_TFDR_COUNT (32U)
 
 /*! @name LUT - LUT 0..LUT 63 */
 /*! @{ */
-#define FLEXSPI_LUT_OPERAND0_MASK                (0xFFU)
-#define FLEXSPI_LUT_OPERAND0_SHIFT               (0U)
-#define FLEXSPI_LUT_OPERAND0(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & FLEXSPI_LUT_OPERAND0_MASK)
-#define FLEXSPI_LUT_NUM_PADS0_MASK               (0x300U)
-#define FLEXSPI_LUT_NUM_PADS0_SHIFT              (8U)
-#define FLEXSPI_LUT_NUM_PADS0(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & FLEXSPI_LUT_NUM_PADS0_MASK)
-#define FLEXSPI_LUT_OPCODE0_MASK                 (0xFC00U)
-#define FLEXSPI_LUT_OPCODE0_SHIFT                (10U)
-#define FLEXSPI_LUT_OPCODE0(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & FLEXSPI_LUT_OPCODE0_MASK)
-#define FLEXSPI_LUT_OPERAND1_MASK                (0xFF0000U)
-#define FLEXSPI_LUT_OPERAND1_SHIFT               (16U)
-#define FLEXSPI_LUT_OPERAND1(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & FLEXSPI_LUT_OPERAND1_MASK)
-#define FLEXSPI_LUT_NUM_PADS1_MASK               (0x3000000U)
-#define FLEXSPI_LUT_NUM_PADS1_SHIFT              (24U)
-#define FLEXSPI_LUT_NUM_PADS1(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & FLEXSPI_LUT_NUM_PADS1_MASK)
-#define FLEXSPI_LUT_OPCODE1_MASK                 (0xFC000000U)
-#define FLEXSPI_LUT_OPCODE1_SHIFT                (26U)
-#define FLEXSPI_LUT_OPCODE1(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & FLEXSPI_LUT_OPCODE1_MASK)
+#define FLEXSPI_LUT_OPERAND0_MASK  (0xFFU)
+#define FLEXSPI_LUT_OPERAND0_SHIFT (0U)
+#define FLEXSPI_LUT_OPERAND0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & FLEXSPI_LUT_OPERAND0_MASK)
+#define FLEXSPI_LUT_NUM_PADS0_MASK  (0x300U)
+#define FLEXSPI_LUT_NUM_PADS0_SHIFT (8U)
+#define FLEXSPI_LUT_NUM_PADS0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & FLEXSPI_LUT_NUM_PADS0_MASK)
+#define FLEXSPI_LUT_OPCODE0_MASK   (0xFC00U)
+#define FLEXSPI_LUT_OPCODE0_SHIFT  (10U)
+#define FLEXSPI_LUT_OPCODE0(x)     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & FLEXSPI_LUT_OPCODE0_MASK)
+#define FLEXSPI_LUT_OPERAND1_MASK  (0xFF0000U)
+#define FLEXSPI_LUT_OPERAND1_SHIFT (16U)
+#define FLEXSPI_LUT_OPERAND1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & FLEXSPI_LUT_OPERAND1_MASK)
+#define FLEXSPI_LUT_NUM_PADS1_MASK  (0x3000000U)
+#define FLEXSPI_LUT_NUM_PADS1_SHIFT (24U)
+#define FLEXSPI_LUT_NUM_PADS1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & FLEXSPI_LUT_NUM_PADS1_MASK)
+#define FLEXSPI_LUT_OPCODE1_MASK  (0xFC000000U)
+#define FLEXSPI_LUT_OPCODE1_SHIFT (26U)
+#define FLEXSPI_LUT_OPCODE1(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & FLEXSPI_LUT_OPCODE1_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_LUT */
-#define FLEXSPI_LUT_COUNT                        (64U)
-
+#define FLEXSPI_LUT_COUNT (64U)
 
 /*!
  * @}
  */ /* end of group FLEXSPI_Register_Masks */
 
-
 /* FLEXSPI - Peripheral instance base addresses */
 /** Peripheral FLEXSPI base address */
-#define FLEXSPI_BASE                             (0x402A8000u)
+#define FLEXSPI_BASE (0x402A8000u)
 /** Peripheral FLEXSPI base pointer */
-#define FLEXSPI                                  ((FLEXSPI_Type *)FLEXSPI_BASE)
+#define FLEXSPI ((FLEXSPI_Type *)FLEXSPI_BASE)
 /** Array initializer of FLEXSPI peripheral base addresses */
-#define FLEXSPI_BASE_ADDRS                       { FLEXSPI_BASE }
+#define FLEXSPI_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        FLEXSPI_BASE                                                                                                   \
+    }
 /** Array initializer of FLEXSPI peripheral base pointers */
-#define FLEXSPI_BASE_PTRS                        { FLEXSPI }
+#define FLEXSPI_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        FLEXSPI                                                                                                        \
+    }
 /** Interrupt vectors for the FLEXSPI peripheral type */
-#define FLEXSPI_IRQS                             { FLEXSPI_IRQn }
+#define FLEXSPI_IRQS                                                                                                   \
+    {                                                                                                                  \
+        FLEXSPI_IRQn                                                                                                   \
+    }
 /* FlexSPI AMBA address. */
-#define FlexSPI_AMBA_BASE                       (0x60000000U)
+#define FlexSPI_AMBA_BASE (0x60000000U)
 /* FlexSPI ASFM address. */
-#define FlexSPI_ASFM_BASE                        (0x00000000U)
+#define FlexSPI_ASFM_BASE (0x00000000U)
 /* Base Address of AHB address space mapped to IP RX FIFO. */
-#define FlexSPI_ARDF_BASE                        (0x7FC00000U)
+#define FlexSPI_ARDF_BASE (0x7FC00000U)
 /* Base Address of AHB address space mapped to IP TX FIFO. */
-#define FlexSPI_ATDF_BASE                        (0x7F800000U)
-
+#define FlexSPI_ATDF_BASE (0x7F800000U)
 
 /*!
  * @}
  */ /* end of group FLEXSPI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11358,14 +13003,15 @@ typedef struct {
  */
 
 /** GPC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CNTR;                              /**< GPC Interface control register, offset: 0x0 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t IMR[4];                            /**< IRQ masking register 1..IRQ masking register 4, array offset: 0x8, array step: 0x4 */
-  __I  uint32_t ISR[4];                            /**< IRQ status resister 1..IRQ status resister 4, array offset: 0x18, array step: 0x4 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t IMR5;                              /**< IRQ masking register 5, offset: 0x34 */
-  __I  uint32_t ISR5;                              /**< IRQ status resister 5, offset: 0x38 */
+typedef struct
+{
+    __IO uint32_t CNTR; /**< GPC Interface control register, offset: 0x0 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t IMR[4]; /**< IRQ masking register 1..IRQ masking register 4, array offset: 0x8, array step: 0x4 */
+    __I uint32_t ISR[4];  /**< IRQ status resister 1..IRQ status resister 4, array offset: 0x18, array step: 0x4 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t IMR5; /**< IRQ masking register 5, offset: 0x34 */
+    __I uint32_t ISR5;  /**< IRQ status resister 5, offset: 0x38 */
 } GPC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11379,92 +13025,100 @@ typedef struct {
 
 /*! @name CNTR - GPC Interface control register */
 /*! @{ */
-#define GPC_CNTR_MEGA_PDN_REQ_MASK               (0x4U)
-#define GPC_CNTR_MEGA_PDN_REQ_SHIFT              (2U)
-#define GPC_CNTR_MEGA_PDN_REQ(x)                 (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PDN_REQ_SHIFT)) & GPC_CNTR_MEGA_PDN_REQ_MASK)
-#define GPC_CNTR_MEGA_PUP_REQ_MASK               (0x8U)
-#define GPC_CNTR_MEGA_PUP_REQ_SHIFT              (3U)
-#define GPC_CNTR_MEGA_PUP_REQ(x)                 (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PUP_REQ_SHIFT)) & GPC_CNTR_MEGA_PUP_REQ_MASK)
-#define GPC_CNTR_PDRAM0_PGE_MASK                 (0x400000U)
-#define GPC_CNTR_PDRAM0_PGE_SHIFT                (22U)
-#define GPC_CNTR_PDRAM0_PGE(x)                   (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_PDRAM0_PGE_SHIFT)) & GPC_CNTR_PDRAM0_PGE_MASK)
+#define GPC_CNTR_MEGA_PDN_REQ_MASK  (0x4U)
+#define GPC_CNTR_MEGA_PDN_REQ_SHIFT (2U)
+#define GPC_CNTR_MEGA_PDN_REQ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PDN_REQ_SHIFT)) & GPC_CNTR_MEGA_PDN_REQ_MASK)
+#define GPC_CNTR_MEGA_PUP_REQ_MASK  (0x8U)
+#define GPC_CNTR_MEGA_PUP_REQ_SHIFT (3U)
+#define GPC_CNTR_MEGA_PUP_REQ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PUP_REQ_SHIFT)) & GPC_CNTR_MEGA_PUP_REQ_MASK)
+#define GPC_CNTR_PDRAM0_PGE_MASK  (0x400000U)
+#define GPC_CNTR_PDRAM0_PGE_SHIFT (22U)
+#define GPC_CNTR_PDRAM0_PGE(x)    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_PDRAM0_PGE_SHIFT)) & GPC_CNTR_PDRAM0_PGE_MASK)
 /*! @} */
 
 /*! @name IMR - IRQ masking register 1..IRQ masking register 4 */
 /*! @{ */
-#define GPC_IMR_IMR1_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR1_SHIFT                       (0U)
-#define GPC_IMR_IMR1(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR1_SHIFT)) & GPC_IMR_IMR1_MASK)
-#define GPC_IMR_IMR2_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR2_SHIFT                       (0U)
-#define GPC_IMR_IMR2(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
-#define GPC_IMR_IMR3_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR3_SHIFT                       (0U)
-#define GPC_IMR_IMR3(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
-#define GPC_IMR_IMR4_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR4_SHIFT                       (0U)
-#define GPC_IMR_IMR4(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR4_SHIFT)) & GPC_IMR_IMR4_MASK)
+#define GPC_IMR_IMR1_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR1_SHIFT (0U)
+#define GPC_IMR_IMR1(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR1_SHIFT)) & GPC_IMR_IMR1_MASK)
+#define GPC_IMR_IMR2_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR2_SHIFT (0U)
+#define GPC_IMR_IMR2(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
+#define GPC_IMR_IMR3_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR3_SHIFT (0U)
+#define GPC_IMR_IMR3(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
+#define GPC_IMR_IMR4_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR4_SHIFT (0U)
+#define GPC_IMR_IMR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR4_SHIFT)) & GPC_IMR_IMR4_MASK)
 /*! @} */
 
 /* The count of GPC_IMR */
-#define GPC_IMR_COUNT                            (4U)
+#define GPC_IMR_COUNT (4U)
 
 /*! @name ISR - IRQ status resister 1..IRQ status resister 4 */
 /*! @{ */
-#define GPC_ISR_ISR1_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR1_SHIFT                       (0U)
-#define GPC_ISR_ISR1(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR1_SHIFT)) & GPC_ISR_ISR1_MASK)
-#define GPC_ISR_ISR2_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR2_SHIFT                       (0U)
-#define GPC_ISR_ISR2(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR2_SHIFT)) & GPC_ISR_ISR2_MASK)
-#define GPC_ISR_ISR3_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR3_SHIFT                       (0U)
-#define GPC_ISR_ISR3(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR3_SHIFT)) & GPC_ISR_ISR3_MASK)
-#define GPC_ISR_ISR4_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR4_SHIFT                       (0U)
-#define GPC_ISR_ISR4(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR4_SHIFT)) & GPC_ISR_ISR4_MASK)
+#define GPC_ISR_ISR1_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR1_SHIFT (0U)
+#define GPC_ISR_ISR1(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR1_SHIFT)) & GPC_ISR_ISR1_MASK)
+#define GPC_ISR_ISR2_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR2_SHIFT (0U)
+#define GPC_ISR_ISR2(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR2_SHIFT)) & GPC_ISR_ISR2_MASK)
+#define GPC_ISR_ISR3_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR3_SHIFT (0U)
+#define GPC_ISR_ISR3(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR3_SHIFT)) & GPC_ISR_ISR3_MASK)
+#define GPC_ISR_ISR4_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR4_SHIFT (0U)
+#define GPC_ISR_ISR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR4_SHIFT)) & GPC_ISR_ISR4_MASK)
 /*! @} */
 
 /* The count of GPC_ISR */
-#define GPC_ISR_COUNT                            (4U)
+#define GPC_ISR_COUNT (4U)
 
 /*! @name IMR5 - IRQ masking register 5 */
 /*! @{ */
-#define GPC_IMR5_IMR5_MASK                       (0xFFFFFFFFU)
-#define GPC_IMR5_IMR5_SHIFT                      (0U)
-#define GPC_IMR5_IMR5(x)                         (((uint32_t)(((uint32_t)(x)) << GPC_IMR5_IMR5_SHIFT)) & GPC_IMR5_IMR5_MASK)
+#define GPC_IMR5_IMR5_MASK  (0xFFFFFFFFU)
+#define GPC_IMR5_IMR5_SHIFT (0U)
+#define GPC_IMR5_IMR5(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR5_IMR5_SHIFT)) & GPC_IMR5_IMR5_MASK)
 /*! @} */
 
 /*! @name ISR5 - IRQ status resister 5 */
 /*! @{ */
-#define GPC_ISR5_ISR4_MASK                       (0xFFFFFFFFU)
-#define GPC_ISR5_ISR4_SHIFT                      (0U)
-#define GPC_ISR5_ISR4(x)                         (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR4_SHIFT)) & GPC_ISR5_ISR4_MASK)
+#define GPC_ISR5_ISR4_MASK  (0xFFFFFFFFU)
+#define GPC_ISR5_ISR4_SHIFT (0U)
+#define GPC_ISR5_ISR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR4_SHIFT)) & GPC_ISR5_ISR4_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPC_Register_Masks */
 
-
 /* GPC - Peripheral instance base addresses */
 /** Peripheral GPC base address */
-#define GPC_BASE                                 (0x400F4000u)
+#define GPC_BASE (0x400F4000u)
 /** Peripheral GPC base pointer */
-#define GPC                                      ((GPC_Type *)GPC_BASE)
+#define GPC ((GPC_Type *)GPC_BASE)
 /** Array initializer of GPC peripheral base addresses */
-#define GPC_BASE_ADDRS                           { GPC_BASE }
+#define GPC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        GPC_BASE                                                                                                       \
+    }
 /** Array initializer of GPC peripheral base pointers */
-#define GPC_BASE_PTRS                            { GPC }
+#define GPC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        GPC                                                                                                            \
+    }
 /** Interrupt vectors for the GPC peripheral type */
-#define GPC_IRQS                                 { GPC_IRQn }
+#define GPC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        GPC_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group GPC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPIO Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11475,19 +13129,20 @@ typedef struct {
  */
 
 /** GPIO - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t DR;                                /**< GPIO data register, offset: 0x0 */
-  __IO uint32_t GDIR;                              /**< GPIO direction register, offset: 0x4 */
-  __I  uint32_t PSR;                               /**< GPIO pad status register, offset: 0x8 */
-  __IO uint32_t ICR1;                              /**< GPIO interrupt configuration register1, offset: 0xC */
-  __IO uint32_t ICR2;                              /**< GPIO interrupt configuration register2, offset: 0x10 */
-  __IO uint32_t IMR;                               /**< GPIO interrupt mask register, offset: 0x14 */
-  __IO uint32_t ISR;                               /**< GPIO interrupt status register, offset: 0x18 */
-  __IO uint32_t EDGE_SEL;                          /**< GPIO edge select register, offset: 0x1C */
-       uint8_t RESERVED_0[100];
-  __O  uint32_t DR_SET;                            /**< GPIO data register SET, offset: 0x84 */
-  __O  uint32_t DR_CLEAR;                          /**< GPIO data register CLEAR, offset: 0x88 */
-  __O  uint32_t DR_TOGGLE;                         /**< GPIO data register TOGGLE, offset: 0x8C */
+typedef struct
+{
+    __IO uint32_t DR;       /**< GPIO data register, offset: 0x0 */
+    __IO uint32_t GDIR;     /**< GPIO direction register, offset: 0x4 */
+    __I uint32_t PSR;       /**< GPIO pad status register, offset: 0x8 */
+    __IO uint32_t ICR1;     /**< GPIO interrupt configuration register1, offset: 0xC */
+    __IO uint32_t ICR2;     /**< GPIO interrupt configuration register2, offset: 0x10 */
+    __IO uint32_t IMR;      /**< GPIO interrupt mask register, offset: 0x14 */
+    __IO uint32_t ISR;      /**< GPIO interrupt status register, offset: 0x18 */
+    __IO uint32_t EDGE_SEL; /**< GPIO edge select register, offset: 0x1C */
+    uint8_t RESERVED_0[100];
+    __O uint32_t DR_SET;    /**< GPIO data register SET, offset: 0x84 */
+    __O uint32_t DR_CLEAR;  /**< GPIO data register CLEAR, offset: 0x88 */
+    __O uint32_t DR_TOGGLE; /**< GPIO data register TOGGLE, offset: 0x8C */
 } GPIO_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11501,211 +13156,227 @@ typedef struct {
 
 /*! @name DR - GPIO data register */
 /*! @{ */
-#define GPIO_DR_DR_MASK                          (0xFFFFFFFFU)
-#define GPIO_DR_DR_SHIFT                         (0U)
-#define GPIO_DR_DR(x)                            (((uint32_t)(((uint32_t)(x)) << GPIO_DR_DR_SHIFT)) & GPIO_DR_DR_MASK)
+#define GPIO_DR_DR_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_DR_SHIFT (0U)
+#define GPIO_DR_DR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_DR_SHIFT)) & GPIO_DR_DR_MASK)
 /*! @} */
 
 /*! @name GDIR - GPIO direction register */
 /*! @{ */
-#define GPIO_GDIR_GDIR_MASK                      (0xFFFFFFFFU)
-#define GPIO_GDIR_GDIR_SHIFT                     (0U)
-#define GPIO_GDIR_GDIR(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_GDIR_GDIR_SHIFT)) & GPIO_GDIR_GDIR_MASK)
+#define GPIO_GDIR_GDIR_MASK  (0xFFFFFFFFU)
+#define GPIO_GDIR_GDIR_SHIFT (0U)
+#define GPIO_GDIR_GDIR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_GDIR_GDIR_SHIFT)) & GPIO_GDIR_GDIR_MASK)
 /*! @} */
 
 /*! @name PSR - GPIO pad status register */
 /*! @{ */
-#define GPIO_PSR_PSR_MASK                        (0xFFFFFFFFU)
-#define GPIO_PSR_PSR_SHIFT                       (0U)
-#define GPIO_PSR_PSR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_PSR_PSR_SHIFT)) & GPIO_PSR_PSR_MASK)
+#define GPIO_PSR_PSR_MASK  (0xFFFFFFFFU)
+#define GPIO_PSR_PSR_SHIFT (0U)
+#define GPIO_PSR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_PSR_PSR_SHIFT)) & GPIO_PSR_PSR_MASK)
 /*! @} */
 
 /*! @name ICR1 - GPIO interrupt configuration register1 */
 /*! @{ */
-#define GPIO_ICR1_ICR0_MASK                      (0x3U)
-#define GPIO_ICR1_ICR0_SHIFT                     (0U)
-#define GPIO_ICR1_ICR0(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR0_SHIFT)) & GPIO_ICR1_ICR0_MASK)
-#define GPIO_ICR1_ICR1_MASK                      (0xCU)
-#define GPIO_ICR1_ICR1_SHIFT                     (2U)
-#define GPIO_ICR1_ICR1(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR1_SHIFT)) & GPIO_ICR1_ICR1_MASK)
-#define GPIO_ICR1_ICR2_MASK                      (0x30U)
-#define GPIO_ICR1_ICR2_SHIFT                     (4U)
-#define GPIO_ICR1_ICR2(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR2_SHIFT)) & GPIO_ICR1_ICR2_MASK)
-#define GPIO_ICR1_ICR3_MASK                      (0xC0U)
-#define GPIO_ICR1_ICR3_SHIFT                     (6U)
-#define GPIO_ICR1_ICR3(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR3_SHIFT)) & GPIO_ICR1_ICR3_MASK)
-#define GPIO_ICR1_ICR4_MASK                      (0x300U)
-#define GPIO_ICR1_ICR4_SHIFT                     (8U)
-#define GPIO_ICR1_ICR4(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR4_SHIFT)) & GPIO_ICR1_ICR4_MASK)
-#define GPIO_ICR1_ICR5_MASK                      (0xC00U)
-#define GPIO_ICR1_ICR5_SHIFT                     (10U)
-#define GPIO_ICR1_ICR5(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR5_SHIFT)) & GPIO_ICR1_ICR5_MASK)
-#define GPIO_ICR1_ICR6_MASK                      (0x3000U)
-#define GPIO_ICR1_ICR6_SHIFT                     (12U)
-#define GPIO_ICR1_ICR6(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR6_SHIFT)) & GPIO_ICR1_ICR6_MASK)
-#define GPIO_ICR1_ICR7_MASK                      (0xC000U)
-#define GPIO_ICR1_ICR7_SHIFT                     (14U)
-#define GPIO_ICR1_ICR7(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR7_SHIFT)) & GPIO_ICR1_ICR7_MASK)
-#define GPIO_ICR1_ICR8_MASK                      (0x30000U)
-#define GPIO_ICR1_ICR8_SHIFT                     (16U)
-#define GPIO_ICR1_ICR8(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR8_SHIFT)) & GPIO_ICR1_ICR8_MASK)
-#define GPIO_ICR1_ICR9_MASK                      (0xC0000U)
-#define GPIO_ICR1_ICR9_SHIFT                     (18U)
-#define GPIO_ICR1_ICR9(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR9_SHIFT)) & GPIO_ICR1_ICR9_MASK)
-#define GPIO_ICR1_ICR10_MASK                     (0x300000U)
-#define GPIO_ICR1_ICR10_SHIFT                    (20U)
-#define GPIO_ICR1_ICR10(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR10_SHIFT)) & GPIO_ICR1_ICR10_MASK)
-#define GPIO_ICR1_ICR11_MASK                     (0xC00000U)
-#define GPIO_ICR1_ICR11_SHIFT                    (22U)
-#define GPIO_ICR1_ICR11(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR11_SHIFT)) & GPIO_ICR1_ICR11_MASK)
-#define GPIO_ICR1_ICR12_MASK                     (0x3000000U)
-#define GPIO_ICR1_ICR12_SHIFT                    (24U)
-#define GPIO_ICR1_ICR12(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR12_SHIFT)) & GPIO_ICR1_ICR12_MASK)
-#define GPIO_ICR1_ICR13_MASK                     (0xC000000U)
-#define GPIO_ICR1_ICR13_SHIFT                    (26U)
-#define GPIO_ICR1_ICR13(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR13_SHIFT)) & GPIO_ICR1_ICR13_MASK)
-#define GPIO_ICR1_ICR14_MASK                     (0x30000000U)
-#define GPIO_ICR1_ICR14_SHIFT                    (28U)
-#define GPIO_ICR1_ICR14(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR14_SHIFT)) & GPIO_ICR1_ICR14_MASK)
-#define GPIO_ICR1_ICR15_MASK                     (0xC0000000U)
-#define GPIO_ICR1_ICR15_SHIFT                    (30U)
-#define GPIO_ICR1_ICR15(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR15_SHIFT)) & GPIO_ICR1_ICR15_MASK)
+#define GPIO_ICR1_ICR0_MASK   (0x3U)
+#define GPIO_ICR1_ICR0_SHIFT  (0U)
+#define GPIO_ICR1_ICR0(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR0_SHIFT)) & GPIO_ICR1_ICR0_MASK)
+#define GPIO_ICR1_ICR1_MASK   (0xCU)
+#define GPIO_ICR1_ICR1_SHIFT  (2U)
+#define GPIO_ICR1_ICR1(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR1_SHIFT)) & GPIO_ICR1_ICR1_MASK)
+#define GPIO_ICR1_ICR2_MASK   (0x30U)
+#define GPIO_ICR1_ICR2_SHIFT  (4U)
+#define GPIO_ICR1_ICR2(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR2_SHIFT)) & GPIO_ICR1_ICR2_MASK)
+#define GPIO_ICR1_ICR3_MASK   (0xC0U)
+#define GPIO_ICR1_ICR3_SHIFT  (6U)
+#define GPIO_ICR1_ICR3(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR3_SHIFT)) & GPIO_ICR1_ICR3_MASK)
+#define GPIO_ICR1_ICR4_MASK   (0x300U)
+#define GPIO_ICR1_ICR4_SHIFT  (8U)
+#define GPIO_ICR1_ICR4(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR4_SHIFT)) & GPIO_ICR1_ICR4_MASK)
+#define GPIO_ICR1_ICR5_MASK   (0xC00U)
+#define GPIO_ICR1_ICR5_SHIFT  (10U)
+#define GPIO_ICR1_ICR5(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR5_SHIFT)) & GPIO_ICR1_ICR5_MASK)
+#define GPIO_ICR1_ICR6_MASK   (0x3000U)
+#define GPIO_ICR1_ICR6_SHIFT  (12U)
+#define GPIO_ICR1_ICR6(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR6_SHIFT)) & GPIO_ICR1_ICR6_MASK)
+#define GPIO_ICR1_ICR7_MASK   (0xC000U)
+#define GPIO_ICR1_ICR7_SHIFT  (14U)
+#define GPIO_ICR1_ICR7(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR7_SHIFT)) & GPIO_ICR1_ICR7_MASK)
+#define GPIO_ICR1_ICR8_MASK   (0x30000U)
+#define GPIO_ICR1_ICR8_SHIFT  (16U)
+#define GPIO_ICR1_ICR8(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR8_SHIFT)) & GPIO_ICR1_ICR8_MASK)
+#define GPIO_ICR1_ICR9_MASK   (0xC0000U)
+#define GPIO_ICR1_ICR9_SHIFT  (18U)
+#define GPIO_ICR1_ICR9(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR9_SHIFT)) & GPIO_ICR1_ICR9_MASK)
+#define GPIO_ICR1_ICR10_MASK  (0x300000U)
+#define GPIO_ICR1_ICR10_SHIFT (20U)
+#define GPIO_ICR1_ICR10(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR10_SHIFT)) & GPIO_ICR1_ICR10_MASK)
+#define GPIO_ICR1_ICR11_MASK  (0xC00000U)
+#define GPIO_ICR1_ICR11_SHIFT (22U)
+#define GPIO_ICR1_ICR11(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR11_SHIFT)) & GPIO_ICR1_ICR11_MASK)
+#define GPIO_ICR1_ICR12_MASK  (0x3000000U)
+#define GPIO_ICR1_ICR12_SHIFT (24U)
+#define GPIO_ICR1_ICR12(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR12_SHIFT)) & GPIO_ICR1_ICR12_MASK)
+#define GPIO_ICR1_ICR13_MASK  (0xC000000U)
+#define GPIO_ICR1_ICR13_SHIFT (26U)
+#define GPIO_ICR1_ICR13(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR13_SHIFT)) & GPIO_ICR1_ICR13_MASK)
+#define GPIO_ICR1_ICR14_MASK  (0x30000000U)
+#define GPIO_ICR1_ICR14_SHIFT (28U)
+#define GPIO_ICR1_ICR14(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR14_SHIFT)) & GPIO_ICR1_ICR14_MASK)
+#define GPIO_ICR1_ICR15_MASK  (0xC0000000U)
+#define GPIO_ICR1_ICR15_SHIFT (30U)
+#define GPIO_ICR1_ICR15(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR15_SHIFT)) & GPIO_ICR1_ICR15_MASK)
 /*! @} */
 
 /*! @name ICR2 - GPIO interrupt configuration register2 */
 /*! @{ */
-#define GPIO_ICR2_ICR16_MASK                     (0x3U)
-#define GPIO_ICR2_ICR16_SHIFT                    (0U)
-#define GPIO_ICR2_ICR16(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR16_SHIFT)) & GPIO_ICR2_ICR16_MASK)
-#define GPIO_ICR2_ICR17_MASK                     (0xCU)
-#define GPIO_ICR2_ICR17_SHIFT                    (2U)
-#define GPIO_ICR2_ICR17(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR17_SHIFT)) & GPIO_ICR2_ICR17_MASK)
-#define GPIO_ICR2_ICR18_MASK                     (0x30U)
-#define GPIO_ICR2_ICR18_SHIFT                    (4U)
-#define GPIO_ICR2_ICR18(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR18_SHIFT)) & GPIO_ICR2_ICR18_MASK)
-#define GPIO_ICR2_ICR19_MASK                     (0xC0U)
-#define GPIO_ICR2_ICR19_SHIFT                    (6U)
-#define GPIO_ICR2_ICR19(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR19_SHIFT)) & GPIO_ICR2_ICR19_MASK)
-#define GPIO_ICR2_ICR20_MASK                     (0x300U)
-#define GPIO_ICR2_ICR20_SHIFT                    (8U)
-#define GPIO_ICR2_ICR20(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR20_SHIFT)) & GPIO_ICR2_ICR20_MASK)
-#define GPIO_ICR2_ICR21_MASK                     (0xC00U)
-#define GPIO_ICR2_ICR21_SHIFT                    (10U)
-#define GPIO_ICR2_ICR21(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR21_SHIFT)) & GPIO_ICR2_ICR21_MASK)
-#define GPIO_ICR2_ICR22_MASK                     (0x3000U)
-#define GPIO_ICR2_ICR22_SHIFT                    (12U)
-#define GPIO_ICR2_ICR22(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR22_SHIFT)) & GPIO_ICR2_ICR22_MASK)
-#define GPIO_ICR2_ICR23_MASK                     (0xC000U)
-#define GPIO_ICR2_ICR23_SHIFT                    (14U)
-#define GPIO_ICR2_ICR23(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR23_SHIFT)) & GPIO_ICR2_ICR23_MASK)
-#define GPIO_ICR2_ICR24_MASK                     (0x30000U)
-#define GPIO_ICR2_ICR24_SHIFT                    (16U)
-#define GPIO_ICR2_ICR24(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR24_SHIFT)) & GPIO_ICR2_ICR24_MASK)
-#define GPIO_ICR2_ICR25_MASK                     (0xC0000U)
-#define GPIO_ICR2_ICR25_SHIFT                    (18U)
-#define GPIO_ICR2_ICR25(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR25_SHIFT)) & GPIO_ICR2_ICR25_MASK)
-#define GPIO_ICR2_ICR26_MASK                     (0x300000U)
-#define GPIO_ICR2_ICR26_SHIFT                    (20U)
-#define GPIO_ICR2_ICR26(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR26_SHIFT)) & GPIO_ICR2_ICR26_MASK)
-#define GPIO_ICR2_ICR27_MASK                     (0xC00000U)
-#define GPIO_ICR2_ICR27_SHIFT                    (22U)
-#define GPIO_ICR2_ICR27(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR27_SHIFT)) & GPIO_ICR2_ICR27_MASK)
-#define GPIO_ICR2_ICR28_MASK                     (0x3000000U)
-#define GPIO_ICR2_ICR28_SHIFT                    (24U)
-#define GPIO_ICR2_ICR28(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR28_SHIFT)) & GPIO_ICR2_ICR28_MASK)
-#define GPIO_ICR2_ICR29_MASK                     (0xC000000U)
-#define GPIO_ICR2_ICR29_SHIFT                    (26U)
-#define GPIO_ICR2_ICR29(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR29_SHIFT)) & GPIO_ICR2_ICR29_MASK)
-#define GPIO_ICR2_ICR30_MASK                     (0x30000000U)
-#define GPIO_ICR2_ICR30_SHIFT                    (28U)
-#define GPIO_ICR2_ICR30(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR30_SHIFT)) & GPIO_ICR2_ICR30_MASK)
-#define GPIO_ICR2_ICR31_MASK                     (0xC0000000U)
-#define GPIO_ICR2_ICR31_SHIFT                    (30U)
-#define GPIO_ICR2_ICR31(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR31_SHIFT)) & GPIO_ICR2_ICR31_MASK)
+#define GPIO_ICR2_ICR16_MASK  (0x3U)
+#define GPIO_ICR2_ICR16_SHIFT (0U)
+#define GPIO_ICR2_ICR16(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR16_SHIFT)) & GPIO_ICR2_ICR16_MASK)
+#define GPIO_ICR2_ICR17_MASK  (0xCU)
+#define GPIO_ICR2_ICR17_SHIFT (2U)
+#define GPIO_ICR2_ICR17(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR17_SHIFT)) & GPIO_ICR2_ICR17_MASK)
+#define GPIO_ICR2_ICR18_MASK  (0x30U)
+#define GPIO_ICR2_ICR18_SHIFT (4U)
+#define GPIO_ICR2_ICR18(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR18_SHIFT)) & GPIO_ICR2_ICR18_MASK)
+#define GPIO_ICR2_ICR19_MASK  (0xC0U)
+#define GPIO_ICR2_ICR19_SHIFT (6U)
+#define GPIO_ICR2_ICR19(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR19_SHIFT)) & GPIO_ICR2_ICR19_MASK)
+#define GPIO_ICR2_ICR20_MASK  (0x300U)
+#define GPIO_ICR2_ICR20_SHIFT (8U)
+#define GPIO_ICR2_ICR20(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR20_SHIFT)) & GPIO_ICR2_ICR20_MASK)
+#define GPIO_ICR2_ICR21_MASK  (0xC00U)
+#define GPIO_ICR2_ICR21_SHIFT (10U)
+#define GPIO_ICR2_ICR21(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR21_SHIFT)) & GPIO_ICR2_ICR21_MASK)
+#define GPIO_ICR2_ICR22_MASK  (0x3000U)
+#define GPIO_ICR2_ICR22_SHIFT (12U)
+#define GPIO_ICR2_ICR22(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR22_SHIFT)) & GPIO_ICR2_ICR22_MASK)
+#define GPIO_ICR2_ICR23_MASK  (0xC000U)
+#define GPIO_ICR2_ICR23_SHIFT (14U)
+#define GPIO_ICR2_ICR23(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR23_SHIFT)) & GPIO_ICR2_ICR23_MASK)
+#define GPIO_ICR2_ICR24_MASK  (0x30000U)
+#define GPIO_ICR2_ICR24_SHIFT (16U)
+#define GPIO_ICR2_ICR24(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR24_SHIFT)) & GPIO_ICR2_ICR24_MASK)
+#define GPIO_ICR2_ICR25_MASK  (0xC0000U)
+#define GPIO_ICR2_ICR25_SHIFT (18U)
+#define GPIO_ICR2_ICR25(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR25_SHIFT)) & GPIO_ICR2_ICR25_MASK)
+#define GPIO_ICR2_ICR26_MASK  (0x300000U)
+#define GPIO_ICR2_ICR26_SHIFT (20U)
+#define GPIO_ICR2_ICR26(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR26_SHIFT)) & GPIO_ICR2_ICR26_MASK)
+#define GPIO_ICR2_ICR27_MASK  (0xC00000U)
+#define GPIO_ICR2_ICR27_SHIFT (22U)
+#define GPIO_ICR2_ICR27(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR27_SHIFT)) & GPIO_ICR2_ICR27_MASK)
+#define GPIO_ICR2_ICR28_MASK  (0x3000000U)
+#define GPIO_ICR2_ICR28_SHIFT (24U)
+#define GPIO_ICR2_ICR28(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR28_SHIFT)) & GPIO_ICR2_ICR28_MASK)
+#define GPIO_ICR2_ICR29_MASK  (0xC000000U)
+#define GPIO_ICR2_ICR29_SHIFT (26U)
+#define GPIO_ICR2_ICR29(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR29_SHIFT)) & GPIO_ICR2_ICR29_MASK)
+#define GPIO_ICR2_ICR30_MASK  (0x30000000U)
+#define GPIO_ICR2_ICR30_SHIFT (28U)
+#define GPIO_ICR2_ICR30(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR30_SHIFT)) & GPIO_ICR2_ICR30_MASK)
+#define GPIO_ICR2_ICR31_MASK  (0xC0000000U)
+#define GPIO_ICR2_ICR31_SHIFT (30U)
+#define GPIO_ICR2_ICR31(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR31_SHIFT)) & GPIO_ICR2_ICR31_MASK)
 /*! @} */
 
 /*! @name IMR - GPIO interrupt mask register */
 /*! @{ */
-#define GPIO_IMR_IMR_MASK                        (0xFFFFFFFFU)
-#define GPIO_IMR_IMR_SHIFT                       (0U)
-#define GPIO_IMR_IMR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_IMR_IMR_SHIFT)) & GPIO_IMR_IMR_MASK)
+#define GPIO_IMR_IMR_MASK  (0xFFFFFFFFU)
+#define GPIO_IMR_IMR_SHIFT (0U)
+#define GPIO_IMR_IMR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_IMR_IMR_SHIFT)) & GPIO_IMR_IMR_MASK)
 /*! @} */
 
 /*! @name ISR - GPIO interrupt status register */
 /*! @{ */
-#define GPIO_ISR_ISR_MASK                        (0xFFFFFFFFU)
-#define GPIO_ISR_ISR_SHIFT                       (0U)
-#define GPIO_ISR_ISR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_ISR_ISR_SHIFT)) & GPIO_ISR_ISR_MASK)
+#define GPIO_ISR_ISR_MASK  (0xFFFFFFFFU)
+#define GPIO_ISR_ISR_SHIFT (0U)
+#define GPIO_ISR_ISR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ISR_ISR_SHIFT)) & GPIO_ISR_ISR_MASK)
 /*! @} */
 
 /*! @name EDGE_SEL - GPIO edge select register */
 /*! @{ */
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK         (0xFFFFFFFFU)
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT        (0U)
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL(x)           (((uint32_t)(((uint32_t)(x)) << GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT)) & GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK  (0xFFFFFFFFU)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT (0U)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT)) & GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK)
 /*! @} */
 
 /*! @name DR_SET - GPIO data register SET */
 /*! @{ */
-#define GPIO_DR_SET_DR_SET_MASK                  (0xFFFFFFFFU)
-#define GPIO_DR_SET_DR_SET_SHIFT                 (0U)
-#define GPIO_DR_SET_DR_SET(x)                    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_SET_DR_SET_SHIFT)) & GPIO_DR_SET_DR_SET_MASK)
+#define GPIO_DR_SET_DR_SET_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_SET_DR_SET_SHIFT (0U)
+#define GPIO_DR_SET_DR_SET(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_SET_DR_SET_SHIFT)) & GPIO_DR_SET_DR_SET_MASK)
 /*! @} */
 
 /*! @name DR_CLEAR - GPIO data register CLEAR */
 /*! @{ */
-#define GPIO_DR_CLEAR_DR_CLEAR_MASK              (0xFFFFFFFFU)
-#define GPIO_DR_CLEAR_DR_CLEAR_SHIFT             (0U)
-#define GPIO_DR_CLEAR_DR_CLEAR(x)                (((uint32_t)(((uint32_t)(x)) << GPIO_DR_CLEAR_DR_CLEAR_SHIFT)) & GPIO_DR_CLEAR_DR_CLEAR_MASK)
+#define GPIO_DR_CLEAR_DR_CLEAR_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_CLEAR_DR_CLEAR_SHIFT (0U)
+#define GPIO_DR_CLEAR_DR_CLEAR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_CLEAR_DR_CLEAR_SHIFT)) & GPIO_DR_CLEAR_DR_CLEAR_MASK)
 /*! @} */
 
 /*! @name DR_TOGGLE - GPIO data register TOGGLE */
 /*! @{ */
-#define GPIO_DR_TOGGLE_DR_TOGGLE_MASK            (0xFFFFFFFFU)
-#define GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT           (0U)
-#define GPIO_DR_TOGGLE_DR_TOGGLE(x)              (((uint32_t)(((uint32_t)(x)) << GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT)) & GPIO_DR_TOGGLE_DR_TOGGLE_MASK)
+#define GPIO_DR_TOGGLE_DR_TOGGLE_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT (0U)
+#define GPIO_DR_TOGGLE_DR_TOGGLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT)) & GPIO_DR_TOGGLE_DR_TOGGLE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPIO_Register_Masks */
 
-
 /* GPIO - Peripheral instance base addresses */
 /** Peripheral GPIO1 base address */
-#define GPIO1_BASE                               (0x401B8000u)
+#define GPIO1_BASE (0x401B8000u)
 /** Peripheral GPIO1 base pointer */
-#define GPIO1                                    ((GPIO_Type *)GPIO1_BASE)
+#define GPIO1 ((GPIO_Type *)GPIO1_BASE)
 /** Peripheral GPIO2 base address */
-#define GPIO2_BASE                               (0x401BC000u)
+#define GPIO2_BASE (0x401BC000u)
 /** Peripheral GPIO2 base pointer */
-#define GPIO2                                    ((GPIO_Type *)GPIO2_BASE)
+#define GPIO2 ((GPIO_Type *)GPIO2_BASE)
 /** Peripheral GPIO3 base address */
-#define GPIO3_BASE                               (0x401C0000u)
+#define GPIO3_BASE (0x401C0000u)
 /** Peripheral GPIO3 base pointer */
-#define GPIO3                                    ((GPIO_Type *)GPIO3_BASE)
+#define GPIO3 ((GPIO_Type *)GPIO3_BASE)
 /** Peripheral GPIO4 base address */
-#define GPIO4_BASE                               (0x401C4000u)
+#define GPIO4_BASE (0x401C4000u)
 /** Peripheral GPIO4 base pointer */
-#define GPIO4                                    ((GPIO_Type *)GPIO4_BASE)
+#define GPIO4 ((GPIO_Type *)GPIO4_BASE)
 /** Peripheral GPIO5 base address */
-#define GPIO5_BASE                               (0x400C0000u)
+#define GPIO5_BASE (0x400C0000u)
 /** Peripheral GPIO5 base pointer */
-#define GPIO5                                    ((GPIO_Type *)GPIO5_BASE)
+#define GPIO5 ((GPIO_Type *)GPIO5_BASE)
 /** Array initializer of GPIO peripheral base addresses */
-#define GPIO_BASE_ADDRS                          { 0u, GPIO1_BASE, GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE }
+#define GPIO_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        0u, GPIO1_BASE, GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE                                                 \
+    }
 /** Array initializer of GPIO peripheral base pointers */
-#define GPIO_BASE_PTRS                           { (GPIO_Type *)0u, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5 }
+#define GPIO_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        (GPIO_Type *)0u, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5                                                             \
+    }
 /** Interrupt vectors for the GPIO peripheral type */
-#define GPIO_IRQS                                { NotAvail_IRQn, GPIO1_INT0_IRQn, GPIO1_INT1_IRQn, GPIO1_INT2_IRQn, GPIO1_INT3_IRQn, GPIO1_INT4_IRQn, GPIO1_INT5_IRQn, GPIO1_INT6_IRQn, GPIO1_INT7_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }
-#define GPIO_COMBINED_IRQS                       { NotAvail_IRQn, GPIO1_Combined_16_31_IRQn, GPIO2_Combined_16_31_IRQn, GPIO2_Combined_0_15_IRQn, GPIO3_Combined_16_31_IRQn, GPIO3_Combined_0_15_IRQn, GPIO4_Combined_16_31_IRQn, GPIO4_Combined_0_15_IRQn, GPIO5_Combined_16_31_IRQn, GPIO5_Combined_0_15_IRQn }
+#define GPIO_IRQS                                                                                                      \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPIO1_INT0_IRQn, GPIO1_INT1_IRQn, GPIO1_INT2_IRQn, GPIO1_INT3_IRQn, GPIO1_INT4_IRQn,            \
+            GPIO1_INT5_IRQn, GPIO1_INT6_IRQn, GPIO1_INT7_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn,            \
+            NotAvail_IRQn                                                                                              \
+    }
+#define GPIO_COMBINED_IRQS                                                                                             \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPIO1_Combined_16_31_IRQn, GPIO2_Combined_16_31_IRQn, GPIO2_Combined_0_15_IRQn,                 \
+            GPIO3_Combined_16_31_IRQn, GPIO3_Combined_0_15_IRQn, GPIO4_Combined_16_31_IRQn, GPIO4_Combined_0_15_IRQn,  \
+            GPIO5_Combined_16_31_IRQn, GPIO5_Combined_0_15_IRQn                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group GPIO_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPT Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11716,14 +13387,17 @@ typedef struct {
  */
 
 /** GPT - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CR;                                /**< GPT Control Register, offset: 0x0 */
-  __IO uint32_t PR;                                /**< GPT Prescaler Register, offset: 0x4 */
-  __IO uint32_t SR;                                /**< GPT Status Register, offset: 0x8 */
-  __IO uint32_t IR;                                /**< GPT Interrupt Register, offset: 0xC */
-  __IO uint32_t OCR[3];                            /**< GPT Output Compare Register 1..GPT Output Compare Register 3, array offset: 0x10, array step: 0x4 */
-  __I  uint32_t ICR[2];                            /**< GPT Input Capture Register 1..GPT Input Capture Register 2, array offset: 0x1C, array step: 0x4 */
-  __I  uint32_t CNT;                               /**< GPT Counter Register, offset: 0x24 */
+typedef struct
+{
+    __IO uint32_t CR;     /**< GPT Control Register, offset: 0x0 */
+    __IO uint32_t PR;     /**< GPT Prescaler Register, offset: 0x4 */
+    __IO uint32_t SR;     /**< GPT Status Register, offset: 0x8 */
+    __IO uint32_t IR;     /**< GPT Interrupt Register, offset: 0xC */
+    __IO uint32_t OCR[3]; /**< GPT Output Compare Register 1..GPT Output Compare Register 3, array offset: 0x10, array
+                             step: 0x4 */
+    __I uint32_t
+        ICR[2]; /**< GPT Input Capture Register 1..GPT Input Capture Register 2, array offset: 0x1C, array step: 0x4 */
+    __I uint32_t CNT; /**< GPT Counter Register, offset: 0x24 */
 } GPT_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11737,170 +13411,176 @@ typedef struct {
 
 /*! @name CR - GPT Control Register */
 /*! @{ */
-#define GPT_CR_EN_MASK                           (0x1U)
-#define GPT_CR_EN_SHIFT                          (0U)
-#define GPT_CR_EN(x)                             (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_SHIFT)) & GPT_CR_EN_MASK)
-#define GPT_CR_ENMOD_MASK                        (0x2U)
-#define GPT_CR_ENMOD_SHIFT                       (1U)
-#define GPT_CR_ENMOD(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_CR_ENMOD_SHIFT)) & GPT_CR_ENMOD_MASK)
-#define GPT_CR_DBGEN_MASK                        (0x4U)
-#define GPT_CR_DBGEN_SHIFT                       (2U)
-#define GPT_CR_DBGEN(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_CR_DBGEN_SHIFT)) & GPT_CR_DBGEN_MASK)
-#define GPT_CR_WAITEN_MASK                       (0x8U)
-#define GPT_CR_WAITEN_SHIFT                      (3U)
-#define GPT_CR_WAITEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_WAITEN_SHIFT)) & GPT_CR_WAITEN_MASK)
-#define GPT_CR_DOZEEN_MASK                       (0x10U)
-#define GPT_CR_DOZEEN_SHIFT                      (4U)
-#define GPT_CR_DOZEEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_DOZEEN_SHIFT)) & GPT_CR_DOZEEN_MASK)
-#define GPT_CR_STOPEN_MASK                       (0x20U)
-#define GPT_CR_STOPEN_SHIFT                      (5U)
-#define GPT_CR_STOPEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_STOPEN_SHIFT)) & GPT_CR_STOPEN_MASK)
-#define GPT_CR_CLKSRC_MASK                       (0x1C0U)
-#define GPT_CR_CLKSRC_SHIFT                      (6U)
-#define GPT_CR_CLKSRC(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_CLKSRC_SHIFT)) & GPT_CR_CLKSRC_MASK)
-#define GPT_CR_FRR_MASK                          (0x200U)
-#define GPT_CR_FRR_SHIFT                         (9U)
-#define GPT_CR_FRR(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FRR_SHIFT)) & GPT_CR_FRR_MASK)
-#define GPT_CR_EN_24M_MASK                       (0x400U)
-#define GPT_CR_EN_24M_SHIFT                      (10U)
-#define GPT_CR_EN_24M(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_24M_SHIFT)) & GPT_CR_EN_24M_MASK)
-#define GPT_CR_SWR_MASK                          (0x8000U)
-#define GPT_CR_SWR_SHIFT                         (15U)
-#define GPT_CR_SWR(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_SWR_SHIFT)) & GPT_CR_SWR_MASK)
-#define GPT_CR_IM1_MASK                          (0x30000U)
-#define GPT_CR_IM1_SHIFT                         (16U)
-#define GPT_CR_IM1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM1_SHIFT)) & GPT_CR_IM1_MASK)
-#define GPT_CR_IM2_MASK                          (0xC0000U)
-#define GPT_CR_IM2_SHIFT                         (18U)
-#define GPT_CR_IM2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM2_SHIFT)) & GPT_CR_IM2_MASK)
-#define GPT_CR_OM1_MASK                          (0x700000U)
-#define GPT_CR_OM1_SHIFT                         (20U)
-#define GPT_CR_OM1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM1_SHIFT)) & GPT_CR_OM1_MASK)
-#define GPT_CR_OM2_MASK                          (0x3800000U)
-#define GPT_CR_OM2_SHIFT                         (23U)
-#define GPT_CR_OM2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM2_SHIFT)) & GPT_CR_OM2_MASK)
-#define GPT_CR_OM3_MASK                          (0x1C000000U)
-#define GPT_CR_OM3_SHIFT                         (26U)
-#define GPT_CR_OM3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM3_SHIFT)) & GPT_CR_OM3_MASK)
-#define GPT_CR_FO1_MASK                          (0x20000000U)
-#define GPT_CR_FO1_SHIFT                         (29U)
-#define GPT_CR_FO1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO1_SHIFT)) & GPT_CR_FO1_MASK)
-#define GPT_CR_FO2_MASK                          (0x40000000U)
-#define GPT_CR_FO2_SHIFT                         (30U)
-#define GPT_CR_FO2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO2_SHIFT)) & GPT_CR_FO2_MASK)
-#define GPT_CR_FO3_MASK                          (0x80000000U)
-#define GPT_CR_FO3_SHIFT                         (31U)
-#define GPT_CR_FO3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO3_SHIFT)) & GPT_CR_FO3_MASK)
+#define GPT_CR_EN_MASK      (0x1U)
+#define GPT_CR_EN_SHIFT     (0U)
+#define GPT_CR_EN(x)        (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_SHIFT)) & GPT_CR_EN_MASK)
+#define GPT_CR_ENMOD_MASK   (0x2U)
+#define GPT_CR_ENMOD_SHIFT  (1U)
+#define GPT_CR_ENMOD(x)     (((uint32_t)(((uint32_t)(x)) << GPT_CR_ENMOD_SHIFT)) & GPT_CR_ENMOD_MASK)
+#define GPT_CR_DBGEN_MASK   (0x4U)
+#define GPT_CR_DBGEN_SHIFT  (2U)
+#define GPT_CR_DBGEN(x)     (((uint32_t)(((uint32_t)(x)) << GPT_CR_DBGEN_SHIFT)) & GPT_CR_DBGEN_MASK)
+#define GPT_CR_WAITEN_MASK  (0x8U)
+#define GPT_CR_WAITEN_SHIFT (3U)
+#define GPT_CR_WAITEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_WAITEN_SHIFT)) & GPT_CR_WAITEN_MASK)
+#define GPT_CR_DOZEEN_MASK  (0x10U)
+#define GPT_CR_DOZEEN_SHIFT (4U)
+#define GPT_CR_DOZEEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_DOZEEN_SHIFT)) & GPT_CR_DOZEEN_MASK)
+#define GPT_CR_STOPEN_MASK  (0x20U)
+#define GPT_CR_STOPEN_SHIFT (5U)
+#define GPT_CR_STOPEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_STOPEN_SHIFT)) & GPT_CR_STOPEN_MASK)
+#define GPT_CR_CLKSRC_MASK  (0x1C0U)
+#define GPT_CR_CLKSRC_SHIFT (6U)
+#define GPT_CR_CLKSRC(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_CLKSRC_SHIFT)) & GPT_CR_CLKSRC_MASK)
+#define GPT_CR_FRR_MASK     (0x200U)
+#define GPT_CR_FRR_SHIFT    (9U)
+#define GPT_CR_FRR(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FRR_SHIFT)) & GPT_CR_FRR_MASK)
+#define GPT_CR_EN_24M_MASK  (0x400U)
+#define GPT_CR_EN_24M_SHIFT (10U)
+#define GPT_CR_EN_24M(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_24M_SHIFT)) & GPT_CR_EN_24M_MASK)
+#define GPT_CR_SWR_MASK     (0x8000U)
+#define GPT_CR_SWR_SHIFT    (15U)
+#define GPT_CR_SWR(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_SWR_SHIFT)) & GPT_CR_SWR_MASK)
+#define GPT_CR_IM1_MASK     (0x30000U)
+#define GPT_CR_IM1_SHIFT    (16U)
+#define GPT_CR_IM1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM1_SHIFT)) & GPT_CR_IM1_MASK)
+#define GPT_CR_IM2_MASK     (0xC0000U)
+#define GPT_CR_IM2_SHIFT    (18U)
+#define GPT_CR_IM2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM2_SHIFT)) & GPT_CR_IM2_MASK)
+#define GPT_CR_OM1_MASK     (0x700000U)
+#define GPT_CR_OM1_SHIFT    (20U)
+#define GPT_CR_OM1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM1_SHIFT)) & GPT_CR_OM1_MASK)
+#define GPT_CR_OM2_MASK     (0x3800000U)
+#define GPT_CR_OM2_SHIFT    (23U)
+#define GPT_CR_OM2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM2_SHIFT)) & GPT_CR_OM2_MASK)
+#define GPT_CR_OM3_MASK     (0x1C000000U)
+#define GPT_CR_OM3_SHIFT    (26U)
+#define GPT_CR_OM3(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM3_SHIFT)) & GPT_CR_OM3_MASK)
+#define GPT_CR_FO1_MASK     (0x20000000U)
+#define GPT_CR_FO1_SHIFT    (29U)
+#define GPT_CR_FO1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO1_SHIFT)) & GPT_CR_FO1_MASK)
+#define GPT_CR_FO2_MASK     (0x40000000U)
+#define GPT_CR_FO2_SHIFT    (30U)
+#define GPT_CR_FO2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO2_SHIFT)) & GPT_CR_FO2_MASK)
+#define GPT_CR_FO3_MASK     (0x80000000U)
+#define GPT_CR_FO3_SHIFT    (31U)
+#define GPT_CR_FO3(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO3_SHIFT)) & GPT_CR_FO3_MASK)
 /*! @} */
 
 /*! @name PR - GPT Prescaler Register */
 /*! @{ */
-#define GPT_PR_PRESCALER_MASK                    (0xFFFU)
-#define GPT_PR_PRESCALER_SHIFT                   (0U)
-#define GPT_PR_PRESCALER(x)                      (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER_SHIFT)) & GPT_PR_PRESCALER_MASK)
-#define GPT_PR_PRESCALER24M_MASK                 (0xF000U)
-#define GPT_PR_PRESCALER24M_SHIFT                (12U)
-#define GPT_PR_PRESCALER24M(x)                   (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER24M_SHIFT)) & GPT_PR_PRESCALER24M_MASK)
+#define GPT_PR_PRESCALER_MASK     (0xFFFU)
+#define GPT_PR_PRESCALER_SHIFT    (0U)
+#define GPT_PR_PRESCALER(x)       (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER_SHIFT)) & GPT_PR_PRESCALER_MASK)
+#define GPT_PR_PRESCALER24M_MASK  (0xF000U)
+#define GPT_PR_PRESCALER24M_SHIFT (12U)
+#define GPT_PR_PRESCALER24M(x)    (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER24M_SHIFT)) & GPT_PR_PRESCALER24M_MASK)
 /*! @} */
 
 /*! @name SR - GPT Status Register */
 /*! @{ */
-#define GPT_SR_OF1_MASK                          (0x1U)
-#define GPT_SR_OF1_SHIFT                         (0U)
-#define GPT_SR_OF1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF1_SHIFT)) & GPT_SR_OF1_MASK)
-#define GPT_SR_OF2_MASK                          (0x2U)
-#define GPT_SR_OF2_SHIFT                         (1U)
-#define GPT_SR_OF2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF2_SHIFT)) & GPT_SR_OF2_MASK)
-#define GPT_SR_OF3_MASK                          (0x4U)
-#define GPT_SR_OF3_SHIFT                         (2U)
-#define GPT_SR_OF3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF3_SHIFT)) & GPT_SR_OF3_MASK)
-#define GPT_SR_IF1_MASK                          (0x8U)
-#define GPT_SR_IF1_SHIFT                         (3U)
-#define GPT_SR_IF1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF1_SHIFT)) & GPT_SR_IF1_MASK)
-#define GPT_SR_IF2_MASK                          (0x10U)
-#define GPT_SR_IF2_SHIFT                         (4U)
-#define GPT_SR_IF2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF2_SHIFT)) & GPT_SR_IF2_MASK)
-#define GPT_SR_ROV_MASK                          (0x20U)
-#define GPT_SR_ROV_SHIFT                         (5U)
-#define GPT_SR_ROV(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_ROV_SHIFT)) & GPT_SR_ROV_MASK)
+#define GPT_SR_OF1_MASK  (0x1U)
+#define GPT_SR_OF1_SHIFT (0U)
+#define GPT_SR_OF1(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF1_SHIFT)) & GPT_SR_OF1_MASK)
+#define GPT_SR_OF2_MASK  (0x2U)
+#define GPT_SR_OF2_SHIFT (1U)
+#define GPT_SR_OF2(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF2_SHIFT)) & GPT_SR_OF2_MASK)
+#define GPT_SR_OF3_MASK  (0x4U)
+#define GPT_SR_OF3_SHIFT (2U)
+#define GPT_SR_OF3(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF3_SHIFT)) & GPT_SR_OF3_MASK)
+#define GPT_SR_IF1_MASK  (0x8U)
+#define GPT_SR_IF1_SHIFT (3U)
+#define GPT_SR_IF1(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF1_SHIFT)) & GPT_SR_IF1_MASK)
+#define GPT_SR_IF2_MASK  (0x10U)
+#define GPT_SR_IF2_SHIFT (4U)
+#define GPT_SR_IF2(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF2_SHIFT)) & GPT_SR_IF2_MASK)
+#define GPT_SR_ROV_MASK  (0x20U)
+#define GPT_SR_ROV_SHIFT (5U)
+#define GPT_SR_ROV(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_ROV_SHIFT)) & GPT_SR_ROV_MASK)
 /*! @} */
 
 /*! @name IR - GPT Interrupt Register */
 /*! @{ */
-#define GPT_IR_OF1IE_MASK                        (0x1U)
-#define GPT_IR_OF1IE_SHIFT                       (0U)
-#define GPT_IR_OF1IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF1IE_SHIFT)) & GPT_IR_OF1IE_MASK)
-#define GPT_IR_OF2IE_MASK                        (0x2U)
-#define GPT_IR_OF2IE_SHIFT                       (1U)
-#define GPT_IR_OF2IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF2IE_SHIFT)) & GPT_IR_OF2IE_MASK)
-#define GPT_IR_OF3IE_MASK                        (0x4U)
-#define GPT_IR_OF3IE_SHIFT                       (2U)
-#define GPT_IR_OF3IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF3IE_SHIFT)) & GPT_IR_OF3IE_MASK)
-#define GPT_IR_IF1IE_MASK                        (0x8U)
-#define GPT_IR_IF1IE_SHIFT                       (3U)
-#define GPT_IR_IF1IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF1IE_SHIFT)) & GPT_IR_IF1IE_MASK)
-#define GPT_IR_IF2IE_MASK                        (0x10U)
-#define GPT_IR_IF2IE_SHIFT                       (4U)
-#define GPT_IR_IF2IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF2IE_SHIFT)) & GPT_IR_IF2IE_MASK)
-#define GPT_IR_ROVIE_MASK                        (0x20U)
-#define GPT_IR_ROVIE_SHIFT                       (5U)
-#define GPT_IR_ROVIE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_ROVIE_SHIFT)) & GPT_IR_ROVIE_MASK)
+#define GPT_IR_OF1IE_MASK  (0x1U)
+#define GPT_IR_OF1IE_SHIFT (0U)
+#define GPT_IR_OF1IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF1IE_SHIFT)) & GPT_IR_OF1IE_MASK)
+#define GPT_IR_OF2IE_MASK  (0x2U)
+#define GPT_IR_OF2IE_SHIFT (1U)
+#define GPT_IR_OF2IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF2IE_SHIFT)) & GPT_IR_OF2IE_MASK)
+#define GPT_IR_OF3IE_MASK  (0x4U)
+#define GPT_IR_OF3IE_SHIFT (2U)
+#define GPT_IR_OF3IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF3IE_SHIFT)) & GPT_IR_OF3IE_MASK)
+#define GPT_IR_IF1IE_MASK  (0x8U)
+#define GPT_IR_IF1IE_SHIFT (3U)
+#define GPT_IR_IF1IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF1IE_SHIFT)) & GPT_IR_IF1IE_MASK)
+#define GPT_IR_IF2IE_MASK  (0x10U)
+#define GPT_IR_IF2IE_SHIFT (4U)
+#define GPT_IR_IF2IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF2IE_SHIFT)) & GPT_IR_IF2IE_MASK)
+#define GPT_IR_ROVIE_MASK  (0x20U)
+#define GPT_IR_ROVIE_SHIFT (5U)
+#define GPT_IR_ROVIE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_ROVIE_SHIFT)) & GPT_IR_ROVIE_MASK)
 /*! @} */
 
 /*! @name OCR - GPT Output Compare Register 1..GPT Output Compare Register 3 */
 /*! @{ */
-#define GPT_OCR_COMP_MASK                        (0xFFFFFFFFU)
-#define GPT_OCR_COMP_SHIFT                       (0U)
-#define GPT_OCR_COMP(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_OCR_COMP_SHIFT)) & GPT_OCR_COMP_MASK)
+#define GPT_OCR_COMP_MASK  (0xFFFFFFFFU)
+#define GPT_OCR_COMP_SHIFT (0U)
+#define GPT_OCR_COMP(x)    (((uint32_t)(((uint32_t)(x)) << GPT_OCR_COMP_SHIFT)) & GPT_OCR_COMP_MASK)
 /*! @} */
 
 /* The count of GPT_OCR */
-#define GPT_OCR_COUNT                            (3U)
+#define GPT_OCR_COUNT (3U)
 
 /*! @name ICR - GPT Input Capture Register 1..GPT Input Capture Register 2 */
 /*! @{ */
-#define GPT_ICR_CAPT_MASK                        (0xFFFFFFFFU)
-#define GPT_ICR_CAPT_SHIFT                       (0U)
-#define GPT_ICR_CAPT(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_ICR_CAPT_SHIFT)) & GPT_ICR_CAPT_MASK)
+#define GPT_ICR_CAPT_MASK  (0xFFFFFFFFU)
+#define GPT_ICR_CAPT_SHIFT (0U)
+#define GPT_ICR_CAPT(x)    (((uint32_t)(((uint32_t)(x)) << GPT_ICR_CAPT_SHIFT)) & GPT_ICR_CAPT_MASK)
 /*! @} */
 
 /* The count of GPT_ICR */
-#define GPT_ICR_COUNT                            (2U)
+#define GPT_ICR_COUNT (2U)
 
 /*! @name CNT - GPT Counter Register */
 /*! @{ */
-#define GPT_CNT_COUNT_MASK                       (0xFFFFFFFFU)
-#define GPT_CNT_COUNT_SHIFT                      (0U)
-#define GPT_CNT_COUNT(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CNT_COUNT_SHIFT)) & GPT_CNT_COUNT_MASK)
+#define GPT_CNT_COUNT_MASK  (0xFFFFFFFFU)
+#define GPT_CNT_COUNT_SHIFT (0U)
+#define GPT_CNT_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CNT_COUNT_SHIFT)) & GPT_CNT_COUNT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPT_Register_Masks */
 
-
 /* GPT - Peripheral instance base addresses */
 /** Peripheral GPT1 base address */
-#define GPT1_BASE                                (0x401EC000u)
+#define GPT1_BASE (0x401EC000u)
 /** Peripheral GPT1 base pointer */
-#define GPT1                                     ((GPT_Type *)GPT1_BASE)
+#define GPT1 ((GPT_Type *)GPT1_BASE)
 /** Peripheral GPT2 base address */
-#define GPT2_BASE                                (0x401F0000u)
+#define GPT2_BASE (0x401F0000u)
 /** Peripheral GPT2 base pointer */
-#define GPT2                                     ((GPT_Type *)GPT2_BASE)
+#define GPT2 ((GPT_Type *)GPT2_BASE)
 /** Array initializer of GPT peripheral base addresses */
-#define GPT_BASE_ADDRS                           { 0u, GPT1_BASE, GPT2_BASE }
+#define GPT_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, GPT1_BASE, GPT2_BASE                                                                                       \
+    }
 /** Array initializer of GPT peripheral base pointers */
-#define GPT_BASE_PTRS                            { (GPT_Type *)0u, GPT1, GPT2 }
+#define GPT_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (GPT_Type *)0u, GPT1, GPT2                                                                                     \
+    }
 /** Interrupt vectors for the GPT peripheral type */
-#define GPT_IRQS                                 { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
+#define GPT_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group GPT_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- I2S Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11911,32 +13591,33 @@ typedef struct {
  */
 
 /** I2S - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t TCSR;                              /**< SAI Transmit Control Register, offset: 0x8 */
-  __IO uint32_t TCR1;                              /**< SAI Transmit Configuration 1 Register, offset: 0xC */
-  __IO uint32_t TCR2;                              /**< SAI Transmit Configuration 2 Register, offset: 0x10 */
-  __IO uint32_t TCR3;                              /**< SAI Transmit Configuration 3 Register, offset: 0x14 */
-  __IO uint32_t TCR4;                              /**< SAI Transmit Configuration 4 Register, offset: 0x18 */
-  __IO uint32_t TCR5;                              /**< SAI Transmit Configuration 5 Register, offset: 0x1C */
-  __O  uint32_t TDR[4];                            /**< SAI Transmit Data Register, array offset: 0x20, array step: 0x4 */
-       uint8_t RESERVED_0[16];
-  __I  uint32_t TFR[4];                            /**< SAI Transmit FIFO Register, array offset: 0x40, array step: 0x4 */
-       uint8_t RESERVED_1[16];
-  __IO uint32_t TMR;                               /**< SAI Transmit Mask Register, offset: 0x60 */
-       uint8_t RESERVED_2[36];
-  __IO uint32_t RCSR;                              /**< SAI Receive Control Register, offset: 0x88 */
-  __IO uint32_t RCR1;                              /**< SAI Receive Configuration 1 Register, offset: 0x8C */
-  __IO uint32_t RCR2;                              /**< SAI Receive Configuration 2 Register, offset: 0x90 */
-  __IO uint32_t RCR3;                              /**< SAI Receive Configuration 3 Register, offset: 0x94 */
-  __IO uint32_t RCR4;                              /**< SAI Receive Configuration 4 Register, offset: 0x98 */
-  __IO uint32_t RCR5;                              /**< SAI Receive Configuration 5 Register, offset: 0x9C */
-  __I  uint32_t RDR[4];                            /**< SAI Receive Data Register, array offset: 0xA0, array step: 0x4 */
-       uint8_t RESERVED_3[16];
-  __I  uint32_t RFR[4];                            /**< SAI Receive FIFO Register, array offset: 0xC0, array step: 0x4 */
-       uint8_t RESERVED_4[16];
-  __IO uint32_t RMR;                               /**< SAI Receive Mask Register, offset: 0xE0 */
+typedef struct
+{
+    __I uint32_t VERID;  /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;  /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t TCSR;  /**< SAI Transmit Control Register, offset: 0x8 */
+    __IO uint32_t TCR1;  /**< SAI Transmit Configuration 1 Register, offset: 0xC */
+    __IO uint32_t TCR2;  /**< SAI Transmit Configuration 2 Register, offset: 0x10 */
+    __IO uint32_t TCR3;  /**< SAI Transmit Configuration 3 Register, offset: 0x14 */
+    __IO uint32_t TCR4;  /**< SAI Transmit Configuration 4 Register, offset: 0x18 */
+    __IO uint32_t TCR5;  /**< SAI Transmit Configuration 5 Register, offset: 0x1C */
+    __O uint32_t TDR[4]; /**< SAI Transmit Data Register, array offset: 0x20, array step: 0x4 */
+    uint8_t RESERVED_0[16];
+    __I uint32_t TFR[4]; /**< SAI Transmit FIFO Register, array offset: 0x40, array step: 0x4 */
+    uint8_t RESERVED_1[16];
+    __IO uint32_t TMR; /**< SAI Transmit Mask Register, offset: 0x60 */
+    uint8_t RESERVED_2[36];
+    __IO uint32_t RCSR;  /**< SAI Receive Control Register, offset: 0x88 */
+    __IO uint32_t RCR1;  /**< SAI Receive Configuration 1 Register, offset: 0x8C */
+    __IO uint32_t RCR2;  /**< SAI Receive Configuration 2 Register, offset: 0x90 */
+    __IO uint32_t RCR3;  /**< SAI Receive Configuration 3 Register, offset: 0x94 */
+    __IO uint32_t RCR4;  /**< SAI Receive Configuration 4 Register, offset: 0x98 */
+    __IO uint32_t RCR5;  /**< SAI Receive Configuration 5 Register, offset: 0x9C */
+    __I uint32_t RDR[4]; /**< SAI Receive Data Register, array offset: 0xA0, array step: 0x4 */
+    uint8_t RESERVED_3[16];
+    __I uint32_t RFR[4]; /**< SAI Receive FIFO Register, array offset: 0xC0, array step: 0x4 */
+    uint8_t RESERVED_4[16];
+    __IO uint32_t RMR; /**< SAI Receive Mask Register, offset: 0xE0 */
 } I2S_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11950,431 +13631,440 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define I2S_VERID_FEATURE_MASK                   (0xFFFFU)
-#define I2S_VERID_FEATURE_SHIFT                  (0U)
-#define I2S_VERID_FEATURE(x)                     (((uint32_t)(((uint32_t)(x)) << I2S_VERID_FEATURE_SHIFT)) & I2S_VERID_FEATURE_MASK)
-#define I2S_VERID_MINOR_MASK                     (0xFF0000U)
-#define I2S_VERID_MINOR_SHIFT                    (16U)
-#define I2S_VERID_MINOR(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MINOR_SHIFT)) & I2S_VERID_MINOR_MASK)
-#define I2S_VERID_MAJOR_MASK                     (0xFF000000U)
-#define I2S_VERID_MAJOR_SHIFT                    (24U)
-#define I2S_VERID_MAJOR(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MAJOR_SHIFT)) & I2S_VERID_MAJOR_MASK)
+#define I2S_VERID_FEATURE_MASK  (0xFFFFU)
+#define I2S_VERID_FEATURE_SHIFT (0U)
+#define I2S_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_VERID_FEATURE_SHIFT)) & I2S_VERID_FEATURE_MASK)
+#define I2S_VERID_MINOR_MASK    (0xFF0000U)
+#define I2S_VERID_MINOR_SHIFT   (16U)
+#define I2S_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MINOR_SHIFT)) & I2S_VERID_MINOR_MASK)
+#define I2S_VERID_MAJOR_MASK    (0xFF000000U)
+#define I2S_VERID_MAJOR_SHIFT   (24U)
+#define I2S_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MAJOR_SHIFT)) & I2S_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define I2S_PARAM_DATALINE_MASK                  (0xFU)
-#define I2S_PARAM_DATALINE_SHIFT                 (0U)
-#define I2S_PARAM_DATALINE(x)                    (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_DATALINE_SHIFT)) & I2S_PARAM_DATALINE_MASK)
-#define I2S_PARAM_FIFO_MASK                      (0xF00U)
-#define I2S_PARAM_FIFO_SHIFT                     (8U)
-#define I2S_PARAM_FIFO(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FIFO_SHIFT)) & I2S_PARAM_FIFO_MASK)
-#define I2S_PARAM_FRAME_MASK                     (0xF0000U)
-#define I2S_PARAM_FRAME_SHIFT                    (16U)
-#define I2S_PARAM_FRAME(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FRAME_SHIFT)) & I2S_PARAM_FRAME_MASK)
+#define I2S_PARAM_DATALINE_MASK  (0xFU)
+#define I2S_PARAM_DATALINE_SHIFT (0U)
+#define I2S_PARAM_DATALINE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_DATALINE_SHIFT)) & I2S_PARAM_DATALINE_MASK)
+#define I2S_PARAM_FIFO_MASK      (0xF00U)
+#define I2S_PARAM_FIFO_SHIFT     (8U)
+#define I2S_PARAM_FIFO(x)        (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FIFO_SHIFT)) & I2S_PARAM_FIFO_MASK)
+#define I2S_PARAM_FRAME_MASK     (0xF0000U)
+#define I2S_PARAM_FRAME_SHIFT    (16U)
+#define I2S_PARAM_FRAME(x)       (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FRAME_SHIFT)) & I2S_PARAM_FRAME_MASK)
 /*! @} */
 
 /*! @name TCSR - SAI Transmit Control Register */
 /*! @{ */
-#define I2S_TCSR_FRDE_MASK                       (0x1U)
-#define I2S_TCSR_FRDE_SHIFT                      (0U)
-#define I2S_TCSR_FRDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRDE_SHIFT)) & I2S_TCSR_FRDE_MASK)
-#define I2S_TCSR_FWDE_MASK                       (0x2U)
-#define I2S_TCSR_FWDE_SHIFT                      (1U)
-#define I2S_TCSR_FWDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWDE_SHIFT)) & I2S_TCSR_FWDE_MASK)
-#define I2S_TCSR_FRIE_MASK                       (0x100U)
-#define I2S_TCSR_FRIE_SHIFT                      (8U)
-#define I2S_TCSR_FRIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRIE_SHIFT)) & I2S_TCSR_FRIE_MASK)
-#define I2S_TCSR_FWIE_MASK                       (0x200U)
-#define I2S_TCSR_FWIE_SHIFT                      (9U)
-#define I2S_TCSR_FWIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWIE_SHIFT)) & I2S_TCSR_FWIE_MASK)
-#define I2S_TCSR_FEIE_MASK                       (0x400U)
-#define I2S_TCSR_FEIE_SHIFT                      (10U)
-#define I2S_TCSR_FEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEIE_SHIFT)) & I2S_TCSR_FEIE_MASK)
-#define I2S_TCSR_SEIE_MASK                       (0x800U)
-#define I2S_TCSR_SEIE_SHIFT                      (11U)
-#define I2S_TCSR_SEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEIE_SHIFT)) & I2S_TCSR_SEIE_MASK)
-#define I2S_TCSR_WSIE_MASK                       (0x1000U)
-#define I2S_TCSR_WSIE_SHIFT                      (12U)
-#define I2S_TCSR_WSIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSIE_SHIFT)) & I2S_TCSR_WSIE_MASK)
-#define I2S_TCSR_FRF_MASK                        (0x10000U)
-#define I2S_TCSR_FRF_SHIFT                       (16U)
-#define I2S_TCSR_FRF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRF_SHIFT)) & I2S_TCSR_FRF_MASK)
-#define I2S_TCSR_FWF_MASK                        (0x20000U)
-#define I2S_TCSR_FWF_SHIFT                       (17U)
-#define I2S_TCSR_FWF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWF_SHIFT)) & I2S_TCSR_FWF_MASK)
-#define I2S_TCSR_FEF_MASK                        (0x40000U)
-#define I2S_TCSR_FEF_SHIFT                       (18U)
-#define I2S_TCSR_FEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEF_SHIFT)) & I2S_TCSR_FEF_MASK)
-#define I2S_TCSR_SEF_MASK                        (0x80000U)
-#define I2S_TCSR_SEF_SHIFT                       (19U)
-#define I2S_TCSR_SEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEF_SHIFT)) & I2S_TCSR_SEF_MASK)
-#define I2S_TCSR_WSF_MASK                        (0x100000U)
-#define I2S_TCSR_WSF_SHIFT                       (20U)
-#define I2S_TCSR_WSF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSF_SHIFT)) & I2S_TCSR_WSF_MASK)
-#define I2S_TCSR_SR_MASK                         (0x1000000U)
-#define I2S_TCSR_SR_SHIFT                        (24U)
-#define I2S_TCSR_SR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SR_SHIFT)) & I2S_TCSR_SR_MASK)
-#define I2S_TCSR_FR_MASK                         (0x2000000U)
-#define I2S_TCSR_FR_SHIFT                        (25U)
-#define I2S_TCSR_FR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
-#define I2S_TCSR_BCE_MASK                        (0x10000000U)
-#define I2S_TCSR_BCE_SHIFT                       (28U)
-#define I2S_TCSR_BCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_BCE_SHIFT)) & I2S_TCSR_BCE_MASK)
-#define I2S_TCSR_DBGE_MASK                       (0x20000000U)
-#define I2S_TCSR_DBGE_SHIFT                      (29U)
-#define I2S_TCSR_DBGE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_DBGE_SHIFT)) & I2S_TCSR_DBGE_MASK)
-#define I2S_TCSR_STOPE_MASK                      (0x40000000U)
-#define I2S_TCSR_STOPE_SHIFT                     (30U)
-#define I2S_TCSR_STOPE(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_STOPE_SHIFT)) & I2S_TCSR_STOPE_MASK)
-#define I2S_TCSR_TE_MASK                         (0x80000000U)
-#define I2S_TCSR_TE_SHIFT                        (31U)
-#define I2S_TCSR_TE(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_TE_SHIFT)) & I2S_TCSR_TE_MASK)
+#define I2S_TCSR_FRDE_MASK   (0x1U)
+#define I2S_TCSR_FRDE_SHIFT  (0U)
+#define I2S_TCSR_FRDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRDE_SHIFT)) & I2S_TCSR_FRDE_MASK)
+#define I2S_TCSR_FWDE_MASK   (0x2U)
+#define I2S_TCSR_FWDE_SHIFT  (1U)
+#define I2S_TCSR_FWDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWDE_SHIFT)) & I2S_TCSR_FWDE_MASK)
+#define I2S_TCSR_FRIE_MASK   (0x100U)
+#define I2S_TCSR_FRIE_SHIFT  (8U)
+#define I2S_TCSR_FRIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRIE_SHIFT)) & I2S_TCSR_FRIE_MASK)
+#define I2S_TCSR_FWIE_MASK   (0x200U)
+#define I2S_TCSR_FWIE_SHIFT  (9U)
+#define I2S_TCSR_FWIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWIE_SHIFT)) & I2S_TCSR_FWIE_MASK)
+#define I2S_TCSR_FEIE_MASK   (0x400U)
+#define I2S_TCSR_FEIE_SHIFT  (10U)
+#define I2S_TCSR_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEIE_SHIFT)) & I2S_TCSR_FEIE_MASK)
+#define I2S_TCSR_SEIE_MASK   (0x800U)
+#define I2S_TCSR_SEIE_SHIFT  (11U)
+#define I2S_TCSR_SEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEIE_SHIFT)) & I2S_TCSR_SEIE_MASK)
+#define I2S_TCSR_WSIE_MASK   (0x1000U)
+#define I2S_TCSR_WSIE_SHIFT  (12U)
+#define I2S_TCSR_WSIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSIE_SHIFT)) & I2S_TCSR_WSIE_MASK)
+#define I2S_TCSR_FRF_MASK    (0x10000U)
+#define I2S_TCSR_FRF_SHIFT   (16U)
+#define I2S_TCSR_FRF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRF_SHIFT)) & I2S_TCSR_FRF_MASK)
+#define I2S_TCSR_FWF_MASK    (0x20000U)
+#define I2S_TCSR_FWF_SHIFT   (17U)
+#define I2S_TCSR_FWF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWF_SHIFT)) & I2S_TCSR_FWF_MASK)
+#define I2S_TCSR_FEF_MASK    (0x40000U)
+#define I2S_TCSR_FEF_SHIFT   (18U)
+#define I2S_TCSR_FEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEF_SHIFT)) & I2S_TCSR_FEF_MASK)
+#define I2S_TCSR_SEF_MASK    (0x80000U)
+#define I2S_TCSR_SEF_SHIFT   (19U)
+#define I2S_TCSR_SEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEF_SHIFT)) & I2S_TCSR_SEF_MASK)
+#define I2S_TCSR_WSF_MASK    (0x100000U)
+#define I2S_TCSR_WSF_SHIFT   (20U)
+#define I2S_TCSR_WSF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSF_SHIFT)) & I2S_TCSR_WSF_MASK)
+#define I2S_TCSR_SR_MASK     (0x1000000U)
+#define I2S_TCSR_SR_SHIFT    (24U)
+#define I2S_TCSR_SR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SR_SHIFT)) & I2S_TCSR_SR_MASK)
+#define I2S_TCSR_FR_MASK     (0x2000000U)
+#define I2S_TCSR_FR_SHIFT    (25U)
+#define I2S_TCSR_FR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
+#define I2S_TCSR_BCE_MASK    (0x10000000U)
+#define I2S_TCSR_BCE_SHIFT   (28U)
+#define I2S_TCSR_BCE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_BCE_SHIFT)) & I2S_TCSR_BCE_MASK)
+#define I2S_TCSR_DBGE_MASK   (0x20000000U)
+#define I2S_TCSR_DBGE_SHIFT  (29U)
+#define I2S_TCSR_DBGE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_DBGE_SHIFT)) & I2S_TCSR_DBGE_MASK)
+#define I2S_TCSR_STOPE_MASK  (0x40000000U)
+#define I2S_TCSR_STOPE_SHIFT (30U)
+#define I2S_TCSR_STOPE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_STOPE_SHIFT)) & I2S_TCSR_STOPE_MASK)
+#define I2S_TCSR_TE_MASK     (0x80000000U)
+#define I2S_TCSR_TE_SHIFT    (31U)
+#define I2S_TCSR_TE(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_TE_SHIFT)) & I2S_TCSR_TE_MASK)
 /*! @} */
 
 /*! @name TCR1 - SAI Transmit Configuration 1 Register */
 /*! @{ */
-#define I2S_TCR1_TFW_MASK                        (0x1FU)
-#define I2S_TCR1_TFW_SHIFT                       (0U)
-#define I2S_TCR1_TFW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR1_TFW_SHIFT)) & I2S_TCR1_TFW_MASK)
+#define I2S_TCR1_TFW_MASK  (0x1FU)
+#define I2S_TCR1_TFW_SHIFT (0U)
+#define I2S_TCR1_TFW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR1_TFW_SHIFT)) & I2S_TCR1_TFW_MASK)
 /*! @} */
 
 /*! @name TCR2 - SAI Transmit Configuration 2 Register */
 /*! @{ */
-#define I2S_TCR2_DIV_MASK                        (0xFFU)
-#define I2S_TCR2_DIV_SHIFT                       (0U)
-#define I2S_TCR2_DIV(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)
-#define I2S_TCR2_BCD_MASK                        (0x1000000U)
-#define I2S_TCR2_BCD_SHIFT                       (24U)
-#define I2S_TCR2_BCD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCD_SHIFT)) & I2S_TCR2_BCD_MASK)
-#define I2S_TCR2_BCP_MASK                        (0x2000000U)
-#define I2S_TCR2_BCP_SHIFT                       (25U)
-#define I2S_TCR2_BCP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCP_SHIFT)) & I2S_TCR2_BCP_MASK)
-#define I2S_TCR2_MSEL_MASK                       (0xC000000U)
-#define I2S_TCR2_MSEL_SHIFT                      (26U)
-#define I2S_TCR2_MSEL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_MSEL_SHIFT)) & I2S_TCR2_MSEL_MASK)
-#define I2S_TCR2_BCI_MASK                        (0x10000000U)
-#define I2S_TCR2_BCI_SHIFT                       (28U)
-#define I2S_TCR2_BCI(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCI_SHIFT)) & I2S_TCR2_BCI_MASK)
-#define I2S_TCR2_BCS_MASK                        (0x20000000U)
-#define I2S_TCR2_BCS_SHIFT                       (29U)
-#define I2S_TCR2_BCS(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCS_SHIFT)) & I2S_TCR2_BCS_MASK)
-#define I2S_TCR2_SYNC_MASK                       (0xC0000000U)
-#define I2S_TCR2_SYNC_SHIFT                      (30U)
-#define I2S_TCR2_SYNC(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_SYNC_SHIFT)) & I2S_TCR2_SYNC_MASK)
+#define I2S_TCR2_DIV_MASK   (0xFFU)
+#define I2S_TCR2_DIV_SHIFT  (0U)
+#define I2S_TCR2_DIV(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)
+#define I2S_TCR2_BCD_MASK   (0x1000000U)
+#define I2S_TCR2_BCD_SHIFT  (24U)
+#define I2S_TCR2_BCD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCD_SHIFT)) & I2S_TCR2_BCD_MASK)
+#define I2S_TCR2_BCP_MASK   (0x2000000U)
+#define I2S_TCR2_BCP_SHIFT  (25U)
+#define I2S_TCR2_BCP(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCP_SHIFT)) & I2S_TCR2_BCP_MASK)
+#define I2S_TCR2_MSEL_MASK  (0xC000000U)
+#define I2S_TCR2_MSEL_SHIFT (26U)
+#define I2S_TCR2_MSEL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_MSEL_SHIFT)) & I2S_TCR2_MSEL_MASK)
+#define I2S_TCR2_BCI_MASK   (0x10000000U)
+#define I2S_TCR2_BCI_SHIFT  (28U)
+#define I2S_TCR2_BCI(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCI_SHIFT)) & I2S_TCR2_BCI_MASK)
+#define I2S_TCR2_BCS_MASK   (0x20000000U)
+#define I2S_TCR2_BCS_SHIFT  (29U)
+#define I2S_TCR2_BCS(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCS_SHIFT)) & I2S_TCR2_BCS_MASK)
+#define I2S_TCR2_SYNC_MASK  (0xC0000000U)
+#define I2S_TCR2_SYNC_SHIFT (30U)
+#define I2S_TCR2_SYNC(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_SYNC_SHIFT)) & I2S_TCR2_SYNC_MASK)
 /*! @} */
 
 /*! @name TCR3 - SAI Transmit Configuration 3 Register */
 /*! @{ */
-#define I2S_TCR3_WDFL_MASK                       (0x1FU)
-#define I2S_TCR3_WDFL_SHIFT                      (0U)
-#define I2S_TCR3_WDFL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_WDFL_SHIFT)) & I2S_TCR3_WDFL_MASK)
-#define I2S_TCR3_TCE_MASK                        (0xF0000U)
-#define I2S_TCR3_TCE_SHIFT                       (16U)
-#define I2S_TCR3_TCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_TCE_SHIFT)) & I2S_TCR3_TCE_MASK)
-#define I2S_TCR3_CFR_MASK                        (0xF000000U)
-#define I2S_TCR3_CFR_SHIFT                       (24U)
-#define I2S_TCR3_CFR(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_CFR_SHIFT)) & I2S_TCR3_CFR_MASK)
+#define I2S_TCR3_WDFL_MASK  (0x1FU)
+#define I2S_TCR3_WDFL_SHIFT (0U)
+#define I2S_TCR3_WDFL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_WDFL_SHIFT)) & I2S_TCR3_WDFL_MASK)
+#define I2S_TCR3_TCE_MASK   (0xF0000U)
+#define I2S_TCR3_TCE_SHIFT  (16U)
+#define I2S_TCR3_TCE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_TCE_SHIFT)) & I2S_TCR3_TCE_MASK)
+#define I2S_TCR3_CFR_MASK   (0xF000000U)
+#define I2S_TCR3_CFR_SHIFT  (24U)
+#define I2S_TCR3_CFR(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_CFR_SHIFT)) & I2S_TCR3_CFR_MASK)
 /*! @} */
 
 /*! @name TCR4 - SAI Transmit Configuration 4 Register */
 /*! @{ */
-#define I2S_TCR4_FSD_MASK                        (0x1U)
-#define I2S_TCR4_FSD_SHIFT                       (0U)
-#define I2S_TCR4_FSD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
-#define I2S_TCR4_FSP_MASK                        (0x2U)
-#define I2S_TCR4_FSP_SHIFT                       (1U)
-#define I2S_TCR4_FSP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSP_SHIFT)) & I2S_TCR4_FSP_MASK)
-#define I2S_TCR4_ONDEM_MASK                      (0x4U)
-#define I2S_TCR4_ONDEM_SHIFT                     (2U)
-#define I2S_TCR4_ONDEM(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_ONDEM_SHIFT)) & I2S_TCR4_ONDEM_MASK)
-#define I2S_TCR4_FSE_MASK                        (0x8U)
-#define I2S_TCR4_FSE_SHIFT                       (3U)
-#define I2S_TCR4_FSE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSE_SHIFT)) & I2S_TCR4_FSE_MASK)
-#define I2S_TCR4_MF_MASK                         (0x10U)
-#define I2S_TCR4_MF_SHIFT                        (4U)
-#define I2S_TCR4_MF(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_MF_SHIFT)) & I2S_TCR4_MF_MASK)
-#define I2S_TCR4_CHMOD_MASK                      (0x20U)
-#define I2S_TCR4_CHMOD_SHIFT                     (5U)
-#define I2S_TCR4_CHMOD(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_CHMOD_SHIFT)) & I2S_TCR4_CHMOD_MASK)
-#define I2S_TCR4_SYWD_MASK                       (0x1F00U)
-#define I2S_TCR4_SYWD_SHIFT                      (8U)
-#define I2S_TCR4_SYWD(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_SYWD_SHIFT)) & I2S_TCR4_SYWD_MASK)
-#define I2S_TCR4_FRSZ_MASK                       (0x1F0000U)
-#define I2S_TCR4_FRSZ_SHIFT                      (16U)
-#define I2S_TCR4_FRSZ(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FRSZ_SHIFT)) & I2S_TCR4_FRSZ_MASK)
-#define I2S_TCR4_FPACK_MASK                      (0x3000000U)
-#define I2S_TCR4_FPACK_SHIFT                     (24U)
-#define I2S_TCR4_FPACK(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FPACK_SHIFT)) & I2S_TCR4_FPACK_MASK)
-#define I2S_TCR4_FCOMB_MASK                      (0xC000000U)
-#define I2S_TCR4_FCOMB_SHIFT                     (26U)
-#define I2S_TCR4_FCOMB(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCOMB_SHIFT)) & I2S_TCR4_FCOMB_MASK)
-#define I2S_TCR4_FCONT_MASK                      (0x10000000U)
-#define I2S_TCR4_FCONT_SHIFT                     (28U)
-#define I2S_TCR4_FCONT(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCONT_SHIFT)) & I2S_TCR4_FCONT_MASK)
+#define I2S_TCR4_FSD_MASK    (0x1U)
+#define I2S_TCR4_FSD_SHIFT   (0U)
+#define I2S_TCR4_FSD(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
+#define I2S_TCR4_FSP_MASK    (0x2U)
+#define I2S_TCR4_FSP_SHIFT   (1U)
+#define I2S_TCR4_FSP(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSP_SHIFT)) & I2S_TCR4_FSP_MASK)
+#define I2S_TCR4_ONDEM_MASK  (0x4U)
+#define I2S_TCR4_ONDEM_SHIFT (2U)
+#define I2S_TCR4_ONDEM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_ONDEM_SHIFT)) & I2S_TCR4_ONDEM_MASK)
+#define I2S_TCR4_FSE_MASK    (0x8U)
+#define I2S_TCR4_FSE_SHIFT   (3U)
+#define I2S_TCR4_FSE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSE_SHIFT)) & I2S_TCR4_FSE_MASK)
+#define I2S_TCR4_MF_MASK     (0x10U)
+#define I2S_TCR4_MF_SHIFT    (4U)
+#define I2S_TCR4_MF(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_MF_SHIFT)) & I2S_TCR4_MF_MASK)
+#define I2S_TCR4_CHMOD_MASK  (0x20U)
+#define I2S_TCR4_CHMOD_SHIFT (5U)
+#define I2S_TCR4_CHMOD(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_CHMOD_SHIFT)) & I2S_TCR4_CHMOD_MASK)
+#define I2S_TCR4_SYWD_MASK   (0x1F00U)
+#define I2S_TCR4_SYWD_SHIFT  (8U)
+#define I2S_TCR4_SYWD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_SYWD_SHIFT)) & I2S_TCR4_SYWD_MASK)
+#define I2S_TCR4_FRSZ_MASK   (0x1F0000U)
+#define I2S_TCR4_FRSZ_SHIFT  (16U)
+#define I2S_TCR4_FRSZ(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FRSZ_SHIFT)) & I2S_TCR4_FRSZ_MASK)
+#define I2S_TCR4_FPACK_MASK  (0x3000000U)
+#define I2S_TCR4_FPACK_SHIFT (24U)
+#define I2S_TCR4_FPACK(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FPACK_SHIFT)) & I2S_TCR4_FPACK_MASK)
+#define I2S_TCR4_FCOMB_MASK  (0xC000000U)
+#define I2S_TCR4_FCOMB_SHIFT (26U)
+#define I2S_TCR4_FCOMB(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCOMB_SHIFT)) & I2S_TCR4_FCOMB_MASK)
+#define I2S_TCR4_FCONT_MASK  (0x10000000U)
+#define I2S_TCR4_FCONT_SHIFT (28U)
+#define I2S_TCR4_FCONT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCONT_SHIFT)) & I2S_TCR4_FCONT_MASK)
 /*! @} */
 
 /*! @name TCR5 - SAI Transmit Configuration 5 Register */
 /*! @{ */
-#define I2S_TCR5_FBT_MASK                        (0x1F00U)
-#define I2S_TCR5_FBT_SHIFT                       (8U)
-#define I2S_TCR5_FBT(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_FBT_SHIFT)) & I2S_TCR5_FBT_MASK)
-#define I2S_TCR5_W0W_MASK                        (0x1F0000U)
-#define I2S_TCR5_W0W_SHIFT                       (16U)
-#define I2S_TCR5_W0W(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_W0W_SHIFT)) & I2S_TCR5_W0W_MASK)
-#define I2S_TCR5_WNW_MASK                        (0x1F000000U)
-#define I2S_TCR5_WNW_SHIFT                       (24U)
-#define I2S_TCR5_WNW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_WNW_SHIFT)) & I2S_TCR5_WNW_MASK)
+#define I2S_TCR5_FBT_MASK  (0x1F00U)
+#define I2S_TCR5_FBT_SHIFT (8U)
+#define I2S_TCR5_FBT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_FBT_SHIFT)) & I2S_TCR5_FBT_MASK)
+#define I2S_TCR5_W0W_MASK  (0x1F0000U)
+#define I2S_TCR5_W0W_SHIFT (16U)
+#define I2S_TCR5_W0W(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_W0W_SHIFT)) & I2S_TCR5_W0W_MASK)
+#define I2S_TCR5_WNW_MASK  (0x1F000000U)
+#define I2S_TCR5_WNW_SHIFT (24U)
+#define I2S_TCR5_WNW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_WNW_SHIFT)) & I2S_TCR5_WNW_MASK)
 /*! @} */
 
 /*! @name TDR - SAI Transmit Data Register */
 /*! @{ */
-#define I2S_TDR_TDR_MASK                         (0xFFFFFFFFU)
-#define I2S_TDR_TDR_SHIFT                        (0U)
-#define I2S_TDR_TDR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TDR_TDR_SHIFT)) & I2S_TDR_TDR_MASK)
+#define I2S_TDR_TDR_MASK  (0xFFFFFFFFU)
+#define I2S_TDR_TDR_SHIFT (0U)
+#define I2S_TDR_TDR(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TDR_TDR_SHIFT)) & I2S_TDR_TDR_MASK)
 /*! @} */
 
 /* The count of I2S_TDR */
-#define I2S_TDR_COUNT                            (4U)
+#define I2S_TDR_COUNT (4U)
 
 /*! @name TFR - SAI Transmit FIFO Register */
 /*! @{ */
-#define I2S_TFR_RFP_MASK                         (0x3FU)
-#define I2S_TFR_RFP_SHIFT                        (0U)
-#define I2S_TFR_RFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_RFP_SHIFT)) & I2S_TFR_RFP_MASK)
-#define I2S_TFR_WFP_MASK                         (0x3F0000U)
-#define I2S_TFR_WFP_SHIFT                        (16U)
-#define I2S_TFR_WFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WFP_SHIFT)) & I2S_TFR_WFP_MASK)
-#define I2S_TFR_WCP_MASK                         (0x80000000U)
-#define I2S_TFR_WCP_SHIFT                        (31U)
-#define I2S_TFR_WCP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WCP_SHIFT)) & I2S_TFR_WCP_MASK)
+#define I2S_TFR_RFP_MASK  (0x3FU)
+#define I2S_TFR_RFP_SHIFT (0U)
+#define I2S_TFR_RFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_RFP_SHIFT)) & I2S_TFR_RFP_MASK)
+#define I2S_TFR_WFP_MASK  (0x3F0000U)
+#define I2S_TFR_WFP_SHIFT (16U)
+#define I2S_TFR_WFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WFP_SHIFT)) & I2S_TFR_WFP_MASK)
+#define I2S_TFR_WCP_MASK  (0x80000000U)
+#define I2S_TFR_WCP_SHIFT (31U)
+#define I2S_TFR_WCP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WCP_SHIFT)) & I2S_TFR_WCP_MASK)
 /*! @} */
 
 /* The count of I2S_TFR */
-#define I2S_TFR_COUNT                            (4U)
+#define I2S_TFR_COUNT (4U)
 
 /*! @name TMR - SAI Transmit Mask Register */
 /*! @{ */
-#define I2S_TMR_TWM_MASK                         (0xFFFFFFFFU)
-#define I2S_TMR_TWM_SHIFT                        (0U)
-#define I2S_TMR_TWM(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TMR_TWM_SHIFT)) & I2S_TMR_TWM_MASK)
+#define I2S_TMR_TWM_MASK  (0xFFFFFFFFU)
+#define I2S_TMR_TWM_SHIFT (0U)
+#define I2S_TMR_TWM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TMR_TWM_SHIFT)) & I2S_TMR_TWM_MASK)
 /*! @} */
 
 /*! @name RCSR - SAI Receive Control Register */
 /*! @{ */
-#define I2S_RCSR_FRDE_MASK                       (0x1U)
-#define I2S_RCSR_FRDE_SHIFT                      (0U)
-#define I2S_RCSR_FRDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRDE_SHIFT)) & I2S_RCSR_FRDE_MASK)
-#define I2S_RCSR_FWDE_MASK                       (0x2U)
-#define I2S_RCSR_FWDE_SHIFT                      (1U)
-#define I2S_RCSR_FWDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWDE_SHIFT)) & I2S_RCSR_FWDE_MASK)
-#define I2S_RCSR_FRIE_MASK                       (0x100U)
-#define I2S_RCSR_FRIE_SHIFT                      (8U)
-#define I2S_RCSR_FRIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRIE_SHIFT)) & I2S_RCSR_FRIE_MASK)
-#define I2S_RCSR_FWIE_MASK                       (0x200U)
-#define I2S_RCSR_FWIE_SHIFT                      (9U)
-#define I2S_RCSR_FWIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWIE_SHIFT)) & I2S_RCSR_FWIE_MASK)
-#define I2S_RCSR_FEIE_MASK                       (0x400U)
-#define I2S_RCSR_FEIE_SHIFT                      (10U)
-#define I2S_RCSR_FEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEIE_SHIFT)) & I2S_RCSR_FEIE_MASK)
-#define I2S_RCSR_SEIE_MASK                       (0x800U)
-#define I2S_RCSR_SEIE_SHIFT                      (11U)
-#define I2S_RCSR_SEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEIE_SHIFT)) & I2S_RCSR_SEIE_MASK)
-#define I2S_RCSR_WSIE_MASK                       (0x1000U)
-#define I2S_RCSR_WSIE_SHIFT                      (12U)
-#define I2S_RCSR_WSIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSIE_SHIFT)) & I2S_RCSR_WSIE_MASK)
-#define I2S_RCSR_FRF_MASK                        (0x10000U)
-#define I2S_RCSR_FRF_SHIFT                       (16U)
-#define I2S_RCSR_FRF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRF_SHIFT)) & I2S_RCSR_FRF_MASK)
-#define I2S_RCSR_FWF_MASK                        (0x20000U)
-#define I2S_RCSR_FWF_SHIFT                       (17U)
-#define I2S_RCSR_FWF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWF_SHIFT)) & I2S_RCSR_FWF_MASK)
-#define I2S_RCSR_FEF_MASK                        (0x40000U)
-#define I2S_RCSR_FEF_SHIFT                       (18U)
-#define I2S_RCSR_FEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEF_SHIFT)) & I2S_RCSR_FEF_MASK)
-#define I2S_RCSR_SEF_MASK                        (0x80000U)
-#define I2S_RCSR_SEF_SHIFT                       (19U)
-#define I2S_RCSR_SEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEF_SHIFT)) & I2S_RCSR_SEF_MASK)
-#define I2S_RCSR_WSF_MASK                        (0x100000U)
-#define I2S_RCSR_WSF_SHIFT                       (20U)
-#define I2S_RCSR_WSF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSF_SHIFT)) & I2S_RCSR_WSF_MASK)
-#define I2S_RCSR_SR_MASK                         (0x1000000U)
-#define I2S_RCSR_SR_SHIFT                        (24U)
-#define I2S_RCSR_SR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SR_SHIFT)) & I2S_RCSR_SR_MASK)
-#define I2S_RCSR_FR_MASK                         (0x2000000U)
-#define I2S_RCSR_FR_SHIFT                        (25U)
-#define I2S_RCSR_FR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FR_SHIFT)) & I2S_RCSR_FR_MASK)
-#define I2S_RCSR_BCE_MASK                        (0x10000000U)
-#define I2S_RCSR_BCE_SHIFT                       (28U)
-#define I2S_RCSR_BCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_BCE_SHIFT)) & I2S_RCSR_BCE_MASK)
-#define I2S_RCSR_DBGE_MASK                       (0x20000000U)
-#define I2S_RCSR_DBGE_SHIFT                      (29U)
-#define I2S_RCSR_DBGE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_DBGE_SHIFT)) & I2S_RCSR_DBGE_MASK)
-#define I2S_RCSR_STOPE_MASK                      (0x40000000U)
-#define I2S_RCSR_STOPE_SHIFT                     (30U)
-#define I2S_RCSR_STOPE(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_STOPE_SHIFT)) & I2S_RCSR_STOPE_MASK)
-#define I2S_RCSR_RE_MASK                         (0x80000000U)
-#define I2S_RCSR_RE_SHIFT                        (31U)
-#define I2S_RCSR_RE(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_RE_SHIFT)) & I2S_RCSR_RE_MASK)
+#define I2S_RCSR_FRDE_MASK   (0x1U)
+#define I2S_RCSR_FRDE_SHIFT  (0U)
+#define I2S_RCSR_FRDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRDE_SHIFT)) & I2S_RCSR_FRDE_MASK)
+#define I2S_RCSR_FWDE_MASK   (0x2U)
+#define I2S_RCSR_FWDE_SHIFT  (1U)
+#define I2S_RCSR_FWDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWDE_SHIFT)) & I2S_RCSR_FWDE_MASK)
+#define I2S_RCSR_FRIE_MASK   (0x100U)
+#define I2S_RCSR_FRIE_SHIFT  (8U)
+#define I2S_RCSR_FRIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRIE_SHIFT)) & I2S_RCSR_FRIE_MASK)
+#define I2S_RCSR_FWIE_MASK   (0x200U)
+#define I2S_RCSR_FWIE_SHIFT  (9U)
+#define I2S_RCSR_FWIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWIE_SHIFT)) & I2S_RCSR_FWIE_MASK)
+#define I2S_RCSR_FEIE_MASK   (0x400U)
+#define I2S_RCSR_FEIE_SHIFT  (10U)
+#define I2S_RCSR_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEIE_SHIFT)) & I2S_RCSR_FEIE_MASK)
+#define I2S_RCSR_SEIE_MASK   (0x800U)
+#define I2S_RCSR_SEIE_SHIFT  (11U)
+#define I2S_RCSR_SEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEIE_SHIFT)) & I2S_RCSR_SEIE_MASK)
+#define I2S_RCSR_WSIE_MASK   (0x1000U)
+#define I2S_RCSR_WSIE_SHIFT  (12U)
+#define I2S_RCSR_WSIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSIE_SHIFT)) & I2S_RCSR_WSIE_MASK)
+#define I2S_RCSR_FRF_MASK    (0x10000U)
+#define I2S_RCSR_FRF_SHIFT   (16U)
+#define I2S_RCSR_FRF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRF_SHIFT)) & I2S_RCSR_FRF_MASK)
+#define I2S_RCSR_FWF_MASK    (0x20000U)
+#define I2S_RCSR_FWF_SHIFT   (17U)
+#define I2S_RCSR_FWF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWF_SHIFT)) & I2S_RCSR_FWF_MASK)
+#define I2S_RCSR_FEF_MASK    (0x40000U)
+#define I2S_RCSR_FEF_SHIFT   (18U)
+#define I2S_RCSR_FEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEF_SHIFT)) & I2S_RCSR_FEF_MASK)
+#define I2S_RCSR_SEF_MASK    (0x80000U)
+#define I2S_RCSR_SEF_SHIFT   (19U)
+#define I2S_RCSR_SEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEF_SHIFT)) & I2S_RCSR_SEF_MASK)
+#define I2S_RCSR_WSF_MASK    (0x100000U)
+#define I2S_RCSR_WSF_SHIFT   (20U)
+#define I2S_RCSR_WSF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSF_SHIFT)) & I2S_RCSR_WSF_MASK)
+#define I2S_RCSR_SR_MASK     (0x1000000U)
+#define I2S_RCSR_SR_SHIFT    (24U)
+#define I2S_RCSR_SR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SR_SHIFT)) & I2S_RCSR_SR_MASK)
+#define I2S_RCSR_FR_MASK     (0x2000000U)
+#define I2S_RCSR_FR_SHIFT    (25U)
+#define I2S_RCSR_FR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FR_SHIFT)) & I2S_RCSR_FR_MASK)
+#define I2S_RCSR_BCE_MASK    (0x10000000U)
+#define I2S_RCSR_BCE_SHIFT   (28U)
+#define I2S_RCSR_BCE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_BCE_SHIFT)) & I2S_RCSR_BCE_MASK)
+#define I2S_RCSR_DBGE_MASK   (0x20000000U)
+#define I2S_RCSR_DBGE_SHIFT  (29U)
+#define I2S_RCSR_DBGE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_DBGE_SHIFT)) & I2S_RCSR_DBGE_MASK)
+#define I2S_RCSR_STOPE_MASK  (0x40000000U)
+#define I2S_RCSR_STOPE_SHIFT (30U)
+#define I2S_RCSR_STOPE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_STOPE_SHIFT)) & I2S_RCSR_STOPE_MASK)
+#define I2S_RCSR_RE_MASK     (0x80000000U)
+#define I2S_RCSR_RE_SHIFT    (31U)
+#define I2S_RCSR_RE(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_RE_SHIFT)) & I2S_RCSR_RE_MASK)
 /*! @} */
 
 /*! @name RCR1 - SAI Receive Configuration 1 Register */
 /*! @{ */
-#define I2S_RCR1_RFW_MASK                        (0x1FU)
-#define I2S_RCR1_RFW_SHIFT                       (0U)
-#define I2S_RCR1_RFW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR1_RFW_SHIFT)) & I2S_RCR1_RFW_MASK)
+#define I2S_RCR1_RFW_MASK  (0x1FU)
+#define I2S_RCR1_RFW_SHIFT (0U)
+#define I2S_RCR1_RFW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR1_RFW_SHIFT)) & I2S_RCR1_RFW_MASK)
 /*! @} */
 
 /*! @name RCR2 - SAI Receive Configuration 2 Register */
 /*! @{ */
-#define I2S_RCR2_DIV_MASK                        (0xFFU)
-#define I2S_RCR2_DIV_SHIFT                       (0U)
-#define I2S_RCR2_DIV(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_DIV_SHIFT)) & I2S_RCR2_DIV_MASK)
-#define I2S_RCR2_BCD_MASK                        (0x1000000U)
-#define I2S_RCR2_BCD_SHIFT                       (24U)
-#define I2S_RCR2_BCD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCD_SHIFT)) & I2S_RCR2_BCD_MASK)
-#define I2S_RCR2_BCP_MASK                        (0x2000000U)
-#define I2S_RCR2_BCP_SHIFT                       (25U)
-#define I2S_RCR2_BCP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCP_SHIFT)) & I2S_RCR2_BCP_MASK)
-#define I2S_RCR2_MSEL_MASK                       (0xC000000U)
-#define I2S_RCR2_MSEL_SHIFT                      (26U)
-#define I2S_RCR2_MSEL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_MSEL_SHIFT)) & I2S_RCR2_MSEL_MASK)
-#define I2S_RCR2_BCI_MASK                        (0x10000000U)
-#define I2S_RCR2_BCI_SHIFT                       (28U)
-#define I2S_RCR2_BCI(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCI_SHIFT)) & I2S_RCR2_BCI_MASK)
-#define I2S_RCR2_BCS_MASK                        (0x20000000U)
-#define I2S_RCR2_BCS_SHIFT                       (29U)
-#define I2S_RCR2_BCS(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCS_SHIFT)) & I2S_RCR2_BCS_MASK)
-#define I2S_RCR2_SYNC_MASK                       (0xC0000000U)
-#define I2S_RCR2_SYNC_SHIFT                      (30U)
-#define I2S_RCR2_SYNC(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_SYNC_SHIFT)) & I2S_RCR2_SYNC_MASK)
+#define I2S_RCR2_DIV_MASK   (0xFFU)
+#define I2S_RCR2_DIV_SHIFT  (0U)
+#define I2S_RCR2_DIV(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_DIV_SHIFT)) & I2S_RCR2_DIV_MASK)
+#define I2S_RCR2_BCD_MASK   (0x1000000U)
+#define I2S_RCR2_BCD_SHIFT  (24U)
+#define I2S_RCR2_BCD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCD_SHIFT)) & I2S_RCR2_BCD_MASK)
+#define I2S_RCR2_BCP_MASK   (0x2000000U)
+#define I2S_RCR2_BCP_SHIFT  (25U)
+#define I2S_RCR2_BCP(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCP_SHIFT)) & I2S_RCR2_BCP_MASK)
+#define I2S_RCR2_MSEL_MASK  (0xC000000U)
+#define I2S_RCR2_MSEL_SHIFT (26U)
+#define I2S_RCR2_MSEL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_MSEL_SHIFT)) & I2S_RCR2_MSEL_MASK)
+#define I2S_RCR2_BCI_MASK   (0x10000000U)
+#define I2S_RCR2_BCI_SHIFT  (28U)
+#define I2S_RCR2_BCI(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCI_SHIFT)) & I2S_RCR2_BCI_MASK)
+#define I2S_RCR2_BCS_MASK   (0x20000000U)
+#define I2S_RCR2_BCS_SHIFT  (29U)
+#define I2S_RCR2_BCS(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCS_SHIFT)) & I2S_RCR2_BCS_MASK)
+#define I2S_RCR2_SYNC_MASK  (0xC0000000U)
+#define I2S_RCR2_SYNC_SHIFT (30U)
+#define I2S_RCR2_SYNC(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_SYNC_SHIFT)) & I2S_RCR2_SYNC_MASK)
 /*! @} */
 
 /*! @name RCR3 - SAI Receive Configuration 3 Register */
 /*! @{ */
-#define I2S_RCR3_WDFL_MASK                       (0x1FU)
-#define I2S_RCR3_WDFL_SHIFT                      (0U)
-#define I2S_RCR3_WDFL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_WDFL_SHIFT)) & I2S_RCR3_WDFL_MASK)
-#define I2S_RCR3_RCE_MASK                        (0xF0000U)
-#define I2S_RCR3_RCE_SHIFT                       (16U)
-#define I2S_RCR3_RCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_RCE_SHIFT)) & I2S_RCR3_RCE_MASK)
-#define I2S_RCR3_CFR_MASK                        (0xF000000U)
-#define I2S_RCR3_CFR_SHIFT                       (24U)
-#define I2S_RCR3_CFR(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_CFR_SHIFT)) & I2S_RCR3_CFR_MASK)
+#define I2S_RCR3_WDFL_MASK  (0x1FU)
+#define I2S_RCR3_WDFL_SHIFT (0U)
+#define I2S_RCR3_WDFL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_WDFL_SHIFT)) & I2S_RCR3_WDFL_MASK)
+#define I2S_RCR3_RCE_MASK   (0xF0000U)
+#define I2S_RCR3_RCE_SHIFT  (16U)
+#define I2S_RCR3_RCE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_RCE_SHIFT)) & I2S_RCR3_RCE_MASK)
+#define I2S_RCR3_CFR_MASK   (0xF000000U)
+#define I2S_RCR3_CFR_SHIFT  (24U)
+#define I2S_RCR3_CFR(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_CFR_SHIFT)) & I2S_RCR3_CFR_MASK)
 /*! @} */
 
 /*! @name RCR4 - SAI Receive Configuration 4 Register */
 /*! @{ */
-#define I2S_RCR4_FSD_MASK                        (0x1U)
-#define I2S_RCR4_FSD_SHIFT                       (0U)
-#define I2S_RCR4_FSD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSD_SHIFT)) & I2S_RCR4_FSD_MASK)
-#define I2S_RCR4_FSP_MASK                        (0x2U)
-#define I2S_RCR4_FSP_SHIFT                       (1U)
-#define I2S_RCR4_FSP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSP_SHIFT)) & I2S_RCR4_FSP_MASK)
-#define I2S_RCR4_ONDEM_MASK                      (0x4U)
-#define I2S_RCR4_ONDEM_SHIFT                     (2U)
-#define I2S_RCR4_ONDEM(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_ONDEM_SHIFT)) & I2S_RCR4_ONDEM_MASK)
-#define I2S_RCR4_FSE_MASK                        (0x8U)
-#define I2S_RCR4_FSE_SHIFT                       (3U)
-#define I2S_RCR4_FSE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSE_SHIFT)) & I2S_RCR4_FSE_MASK)
-#define I2S_RCR4_MF_MASK                         (0x10U)
-#define I2S_RCR4_MF_SHIFT                        (4U)
-#define I2S_RCR4_MF(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_MF_SHIFT)) & I2S_RCR4_MF_MASK)
-#define I2S_RCR4_SYWD_MASK                       (0x1F00U)
-#define I2S_RCR4_SYWD_SHIFT                      (8U)
-#define I2S_RCR4_SYWD(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_SYWD_SHIFT)) & I2S_RCR4_SYWD_MASK)
-#define I2S_RCR4_FRSZ_MASK                       (0x1F0000U)
-#define I2S_RCR4_FRSZ_SHIFT                      (16U)
-#define I2S_RCR4_FRSZ(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FRSZ_SHIFT)) & I2S_RCR4_FRSZ_MASK)
-#define I2S_RCR4_FPACK_MASK                      (0x3000000U)
-#define I2S_RCR4_FPACK_SHIFT                     (24U)
-#define I2S_RCR4_FPACK(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FPACK_SHIFT)) & I2S_RCR4_FPACK_MASK)
-#define I2S_RCR4_FCOMB_MASK                      (0xC000000U)
-#define I2S_RCR4_FCOMB_SHIFT                     (26U)
-#define I2S_RCR4_FCOMB(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCOMB_SHIFT)) & I2S_RCR4_FCOMB_MASK)
-#define I2S_RCR4_FCONT_MASK                      (0x10000000U)
-#define I2S_RCR4_FCONT_SHIFT                     (28U)
-#define I2S_RCR4_FCONT(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
+#define I2S_RCR4_FSD_MASK    (0x1U)
+#define I2S_RCR4_FSD_SHIFT   (0U)
+#define I2S_RCR4_FSD(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSD_SHIFT)) & I2S_RCR4_FSD_MASK)
+#define I2S_RCR4_FSP_MASK    (0x2U)
+#define I2S_RCR4_FSP_SHIFT   (1U)
+#define I2S_RCR4_FSP(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSP_SHIFT)) & I2S_RCR4_FSP_MASK)
+#define I2S_RCR4_ONDEM_MASK  (0x4U)
+#define I2S_RCR4_ONDEM_SHIFT (2U)
+#define I2S_RCR4_ONDEM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_ONDEM_SHIFT)) & I2S_RCR4_ONDEM_MASK)
+#define I2S_RCR4_FSE_MASK    (0x8U)
+#define I2S_RCR4_FSE_SHIFT   (3U)
+#define I2S_RCR4_FSE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSE_SHIFT)) & I2S_RCR4_FSE_MASK)
+#define I2S_RCR4_MF_MASK     (0x10U)
+#define I2S_RCR4_MF_SHIFT    (4U)
+#define I2S_RCR4_MF(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_MF_SHIFT)) & I2S_RCR4_MF_MASK)
+#define I2S_RCR4_SYWD_MASK   (0x1F00U)
+#define I2S_RCR4_SYWD_SHIFT  (8U)
+#define I2S_RCR4_SYWD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_SYWD_SHIFT)) & I2S_RCR4_SYWD_MASK)
+#define I2S_RCR4_FRSZ_MASK   (0x1F0000U)
+#define I2S_RCR4_FRSZ_SHIFT  (16U)
+#define I2S_RCR4_FRSZ(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FRSZ_SHIFT)) & I2S_RCR4_FRSZ_MASK)
+#define I2S_RCR4_FPACK_MASK  (0x3000000U)
+#define I2S_RCR4_FPACK_SHIFT (24U)
+#define I2S_RCR4_FPACK(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FPACK_SHIFT)) & I2S_RCR4_FPACK_MASK)
+#define I2S_RCR4_FCOMB_MASK  (0xC000000U)
+#define I2S_RCR4_FCOMB_SHIFT (26U)
+#define I2S_RCR4_FCOMB(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCOMB_SHIFT)) & I2S_RCR4_FCOMB_MASK)
+#define I2S_RCR4_FCONT_MASK  (0x10000000U)
+#define I2S_RCR4_FCONT_SHIFT (28U)
+#define I2S_RCR4_FCONT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
 /*! @} */
 
 /*! @name RCR5 - SAI Receive Configuration 5 Register */
 /*! @{ */
-#define I2S_RCR5_FBT_MASK                        (0x1F00U)
-#define I2S_RCR5_FBT_SHIFT                       (8U)
-#define I2S_RCR5_FBT(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_FBT_SHIFT)) & I2S_RCR5_FBT_MASK)
-#define I2S_RCR5_W0W_MASK                        (0x1F0000U)
-#define I2S_RCR5_W0W_SHIFT                       (16U)
-#define I2S_RCR5_W0W(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_W0W_SHIFT)) & I2S_RCR5_W0W_MASK)
-#define I2S_RCR5_WNW_MASK                        (0x1F000000U)
-#define I2S_RCR5_WNW_SHIFT                       (24U)
-#define I2S_RCR5_WNW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_WNW_SHIFT)) & I2S_RCR5_WNW_MASK)
+#define I2S_RCR5_FBT_MASK  (0x1F00U)
+#define I2S_RCR5_FBT_SHIFT (8U)
+#define I2S_RCR5_FBT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_FBT_SHIFT)) & I2S_RCR5_FBT_MASK)
+#define I2S_RCR5_W0W_MASK  (0x1F0000U)
+#define I2S_RCR5_W0W_SHIFT (16U)
+#define I2S_RCR5_W0W(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_W0W_SHIFT)) & I2S_RCR5_W0W_MASK)
+#define I2S_RCR5_WNW_MASK  (0x1F000000U)
+#define I2S_RCR5_WNW_SHIFT (24U)
+#define I2S_RCR5_WNW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_WNW_SHIFT)) & I2S_RCR5_WNW_MASK)
 /*! @} */
 
 /*! @name RDR - SAI Receive Data Register */
 /*! @{ */
-#define I2S_RDR_RDR_MASK                         (0xFFFFFFFFU)
-#define I2S_RDR_RDR_SHIFT                        (0U)
-#define I2S_RDR_RDR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RDR_RDR_SHIFT)) & I2S_RDR_RDR_MASK)
+#define I2S_RDR_RDR_MASK  (0xFFFFFFFFU)
+#define I2S_RDR_RDR_SHIFT (0U)
+#define I2S_RDR_RDR(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RDR_RDR_SHIFT)) & I2S_RDR_RDR_MASK)
 /*! @} */
 
 /* The count of I2S_RDR */
-#define I2S_RDR_COUNT                            (4U)
+#define I2S_RDR_COUNT (4U)
 
 /*! @name RFR - SAI Receive FIFO Register */
 /*! @{ */
-#define I2S_RFR_RFP_MASK                         (0x3FU)
-#define I2S_RFR_RFP_SHIFT                        (0U)
-#define I2S_RFR_RFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RFP_SHIFT)) & I2S_RFR_RFP_MASK)
-#define I2S_RFR_RCP_MASK                         (0x8000U)
-#define I2S_RFR_RCP_SHIFT                        (15U)
-#define I2S_RFR_RCP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RCP_SHIFT)) & I2S_RFR_RCP_MASK)
-#define I2S_RFR_WFP_MASK                         (0x3F0000U)
-#define I2S_RFR_WFP_SHIFT                        (16U)
-#define I2S_RFR_WFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_WFP_SHIFT)) & I2S_RFR_WFP_MASK)
+#define I2S_RFR_RFP_MASK  (0x3FU)
+#define I2S_RFR_RFP_SHIFT (0U)
+#define I2S_RFR_RFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RFP_SHIFT)) & I2S_RFR_RFP_MASK)
+#define I2S_RFR_RCP_MASK  (0x8000U)
+#define I2S_RFR_RCP_SHIFT (15U)
+#define I2S_RFR_RCP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RCP_SHIFT)) & I2S_RFR_RCP_MASK)
+#define I2S_RFR_WFP_MASK  (0x3F0000U)
+#define I2S_RFR_WFP_SHIFT (16U)
+#define I2S_RFR_WFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_WFP_SHIFT)) & I2S_RFR_WFP_MASK)
 /*! @} */
 
 /* The count of I2S_RFR */
-#define I2S_RFR_COUNT                            (4U)
+#define I2S_RFR_COUNT (4U)
 
 /*! @name RMR - SAI Receive Mask Register */
 /*! @{ */
-#define I2S_RMR_RWM_MASK                         (0xFFFFFFFFU)
-#define I2S_RMR_RWM_SHIFT                        (0U)
-#define I2S_RMR_RWM(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RMR_RWM_SHIFT)) & I2S_RMR_RWM_MASK)
+#define I2S_RMR_RWM_MASK  (0xFFFFFFFFU)
+#define I2S_RMR_RWM_SHIFT (0U)
+#define I2S_RMR_RWM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RMR_RWM_SHIFT)) & I2S_RMR_RWM_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group I2S_Register_Masks */
 
-
 /* I2S - Peripheral instance base addresses */
 /** Peripheral SAI1 base address */
-#define SAI1_BASE                                (0x40384000u)
+#define SAI1_BASE (0x40384000u)
 /** Peripheral SAI1 base pointer */
-#define SAI1                                     ((I2S_Type *)SAI1_BASE)
+#define SAI1 ((I2S_Type *)SAI1_BASE)
 /** Peripheral SAI2 base address */
-#define SAI2_BASE                                (0x40388000u)
+#define SAI2_BASE (0x40388000u)
 /** Peripheral SAI2 base pointer */
-#define SAI2                                     ((I2S_Type *)SAI2_BASE)
+#define SAI2 ((I2S_Type *)SAI2_BASE)
 /** Peripheral SAI3 base address */
-#define SAI3_BASE                                (0x4038C000u)
+#define SAI3_BASE (0x4038C000u)
 /** Peripheral SAI3 base pointer */
-#define SAI3                                     ((I2S_Type *)SAI3_BASE)
+#define SAI3 ((I2S_Type *)SAI3_BASE)
 /** Array initializer of I2S peripheral base addresses */
-#define I2S_BASE_ADDRS                           { 0u, SAI1_BASE, SAI2_BASE, SAI3_BASE }
+#define I2S_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, SAI1_BASE, SAI2_BASE, SAI3_BASE                                                                            \
+    }
 /** Array initializer of I2S peripheral base pointers */
-#define I2S_BASE_PTRS                            { (I2S_Type *)0u, SAI1, SAI2, SAI3 }
+#define I2S_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (I2S_Type *)0u, SAI1, SAI2, SAI3                                                                               \
+    }
 /** Interrupt vectors for the I2S peripheral type */
-#define I2S_RX_IRQS                              { NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_RX_IRQn }
-#define I2S_TX_IRQS                              { NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_TX_IRQn }
+#define I2S_RX_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_RX_IRQn                                                              \
+    }
+#define I2S_TX_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_TX_IRQn                                                              \
+    }
 
 /*!
  * @}
  */ /* end of group I2S_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -12385,11 +14075,17 @@ typedef struct {
  */
 
 /** IOMUXC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[20];
-  __IO uint32_t SW_MUX_CTL_PAD[124];               /**< SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register, array offset: 0x14, array step: 0x4 */
-  __IO uint32_t SW_PAD_CTL_PAD[124];               /**< SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register, array offset: 0x204, array step: 0x4 */
-  __IO uint32_t SELECT_INPUT[154];                 /**< ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY Register, array offset: 0x3F4, array step: 0x4 */
+typedef struct
+{
+    uint8_t RESERVED_0[20];
+    __IO uint32_t
+        SW_MUX_CTL_PAD[124]; /**< SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW
+                                MUX Control Register, array offset: 0x14, array step: 0x4 */
+    __IO uint32_t
+        SW_PAD_CTL_PAD[124]; /**< SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW
+                                PAD Control Register, array offset: 0x204, array step: 0x4 */
+    __IO uint32_t SELECT_INPUT[154]; /**< ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY
+                                        Register, array offset: 0x3F4, array step: 0x4 */
 } IOMUXC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -12401,81 +14097,100 @@ typedef struct {
  * @{
  */
 
-/*! @name SW_MUX_CTL_PAD - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register */
+/*! @name SW_MUX_CTL_PAD - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX
+ * Control Register */
 /*! @{ */
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK      (0x7U)
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT     (0U)
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK)
-#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK          (0x10U)
-#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT         (4U)
-#define IOMUXC_SW_MUX_CTL_PAD_SION(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK  (0x7U)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK)
+#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK  (0x10U)
+#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U)
+#define IOMUXC_SW_MUX_CTL_PAD_SION(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK)
 /*! @} */
 
 /* The count of IOMUXC_SW_MUX_CTL_PAD */
-#define IOMUXC_SW_MUX_CTL_PAD_COUNT              (124U)
+#define IOMUXC_SW_MUX_CTL_PAD_COUNT (124U)
 
-/*! @name SW_PAD_CTL_PAD - SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register */
+/*! @name SW_PAD_CTL_PAD - SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD
+ * Control Register */
 /*! @{ */
-#define IOMUXC_SW_PAD_CTL_PAD_SRE_MASK           (0x1U)
-#define IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT          (0U)
-#define IOMUXC_SW_PAD_CTL_PAD_SRE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SRE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE_MASK           (0x38U)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT          (3U)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_DSE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK         (0xC0U)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT        (6U)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE_MASK           (0x800U)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT          (11U)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_ODE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE_MASK           (0x1000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT          (12U)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PKE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK           (0x2000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT          (13U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS_MASK           (0xC000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT          (14U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUS_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS_MASK           (0x10000U)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT          (16U)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_HYS_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE_MASK  (0x1U)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT (0U)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SRE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE_MASK  (0x38U)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT (3U)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_DSE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK  (0xC0U)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT (6U)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE_MASK  (0x800U)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT (11U)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_ODE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE_MASK  (0x1000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT (12U)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PKE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK  (0x2000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT (13U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS_MASK  (0xC000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT (14U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUS_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS_MASK  (0x10000U)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT (16U)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_HYS_MASK)
 /*! @} */
 
 /* The count of IOMUXC_SW_PAD_CTL_PAD */
-#define IOMUXC_SW_PAD_CTL_PAD_COUNT              (124U)
+#define IOMUXC_SW_PAD_CTL_PAD_COUNT (124U)
 
 /*! @name SELECT_INPUT - ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY Register */
 /*! @{ */
-#define IOMUXC_SELECT_INPUT_DAISY_MASK           (0x7U)  /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
-#define IOMUXC_SELECT_INPUT_DAISY_SHIFT          (0U)
-#define IOMUXC_SELECT_INPUT_DAISY(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) & IOMUXC_SELECT_INPUT_DAISY_MASK)  /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
+#define IOMUXC_SELECT_INPUT_DAISY_MASK                                                                                 \
+    (0x7U) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
+#define IOMUXC_SELECT_INPUT_DAISY_SHIFT (0U)
+#define IOMUXC_SELECT_INPUT_DAISY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) &                                                \
+     IOMUXC_SELECT_INPUT_DAISY_MASK) /* Merged from fields with different position or width, of widths (1, 2, 3),      \
+                                        largest definition used */
 /*! @} */
 
 /* The count of IOMUXC_SELECT_INPUT */
-#define IOMUXC_SELECT_INPUT_COUNT                (154U)
-
+#define IOMUXC_SELECT_INPUT_COUNT (154U)
 
 /*!
  * @}
  */ /* end of group IOMUXC_Register_Masks */
 
-
 /* IOMUXC - Peripheral instance base addresses */
 /** Peripheral IOMUXC base address */
-#define IOMUXC_BASE                              (0x401F8000u)
+#define IOMUXC_BASE (0x401F8000u)
 /** Peripheral IOMUXC base pointer */
-#define IOMUXC                                   ((IOMUXC_Type *)IOMUXC_BASE)
+#define IOMUXC ((IOMUXC_Type *)IOMUXC_BASE)
 /** Array initializer of IOMUXC peripheral base addresses */
-#define IOMUXC_BASE_ADDRS                        { IOMUXC_BASE }
+#define IOMUXC_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        IOMUXC_BASE                                                                                                    \
+    }
 /** Array initializer of IOMUXC peripheral base pointers */
-#define IOMUXC_BASE_PTRS                         { IOMUXC }
+#define IOMUXC_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        IOMUXC                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_GPR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -12486,33 +14201,34 @@ typedef struct {
  */
 
 /** IOMUXC_GPR - Register Layout Typedef */
-typedef struct {
-       uint32_t GPR0;                              /**< GPR0 General Purpose Register, offset: 0x0 */
-  __IO uint32_t GPR1;                              /**< GPR1 General Purpose Register, offset: 0x4 */
-  __IO uint32_t GPR2;                              /**< GPR2 General Purpose Register, offset: 0x8 */
-  __IO uint32_t GPR3;                              /**< GPR3 General Purpose Register, offset: 0xC */
-  __IO uint32_t GPR4;                              /**< GPR4 General Purpose Register, offset: 0x10 */
-  __IO uint32_t GPR5;                              /**< GPR5 General Purpose Register, offset: 0x14 */
-  __IO uint32_t GPR6;                              /**< GPR6 General Purpose Register, offset: 0x18 */
-  __IO uint32_t GPR7;                              /**< GPR7 General Purpose Register, offset: 0x1C */
-  __IO uint32_t GPR8;                              /**< GPR8 General Purpose Register, offset: 0x20 */
-       uint32_t GPR9;                              /**< GPR9 General Purpose Register, offset: 0x24 */
-  __IO uint32_t GPR10;                             /**< GPR10 General Purpose Register, offset: 0x28 */
-  __IO uint32_t GPR11;                             /**< GPR11 General Purpose Register, offset: 0x2C */
-  __IO uint32_t GPR12;                             /**< GPR12 General Purpose Register, offset: 0x30 */
-  __IO uint32_t GPR13;                             /**< GPR13 General Purpose Register, offset: 0x34 */
-  __IO uint32_t GPR14;                             /**< GPR14 General Purpose Register, offset: 0x38 */
-       uint32_t GPR15;                             /**< GPR15 General Purpose Register, offset: 0x3C */
-  __IO uint32_t GPR16;                             /**< GPR16 General Purpose Register, offset: 0x40 */
-  __IO uint32_t GPR17;                             /**< GPR17 General Purpose Register, offset: 0x44 */
-  __IO uint32_t GPR18;                             /**< GPR18 General Purpose Register, offset: 0x48 */
-  __IO uint32_t GPR19;                             /**< GPR19 General Purpose Register, offset: 0x4C */
-  __IO uint32_t GPR20;                             /**< GPR20 General Purpose Register, offset: 0x50 */
-  __IO uint32_t GPR21;                             /**< GPR21 General Purpose Register, offset: 0x54 */
-  __IO uint32_t GPR22;                             /**< GPR22 General Purpose Register, offset: 0x58 */
-  __IO uint32_t GPR23;                             /**< GPR23 General Purpose Register, offset: 0x5C */
-  __IO uint32_t GPR24;                             /**< GPR24 General Purpose Register, offset: 0x60 */
-  __IO uint32_t GPR25;                             /**< GPR25 General Purpose Register, offset: 0x64 */
+typedef struct
+{
+    uint32_t GPR0;       /**< GPR0 General Purpose Register, offset: 0x0 */
+    __IO uint32_t GPR1;  /**< GPR1 General Purpose Register, offset: 0x4 */
+    __IO uint32_t GPR2;  /**< GPR2 General Purpose Register, offset: 0x8 */
+    __IO uint32_t GPR3;  /**< GPR3 General Purpose Register, offset: 0xC */
+    __IO uint32_t GPR4;  /**< GPR4 General Purpose Register, offset: 0x10 */
+    __IO uint32_t GPR5;  /**< GPR5 General Purpose Register, offset: 0x14 */
+    __IO uint32_t GPR6;  /**< GPR6 General Purpose Register, offset: 0x18 */
+    __IO uint32_t GPR7;  /**< GPR7 General Purpose Register, offset: 0x1C */
+    __IO uint32_t GPR8;  /**< GPR8 General Purpose Register, offset: 0x20 */
+    uint32_t GPR9;       /**< GPR9 General Purpose Register, offset: 0x24 */
+    __IO uint32_t GPR10; /**< GPR10 General Purpose Register, offset: 0x28 */
+    __IO uint32_t GPR11; /**< GPR11 General Purpose Register, offset: 0x2C */
+    __IO uint32_t GPR12; /**< GPR12 General Purpose Register, offset: 0x30 */
+    __IO uint32_t GPR13; /**< GPR13 General Purpose Register, offset: 0x34 */
+    __IO uint32_t GPR14; /**< GPR14 General Purpose Register, offset: 0x38 */
+    uint32_t GPR15;      /**< GPR15 General Purpose Register, offset: 0x3C */
+    __IO uint32_t GPR16; /**< GPR16 General Purpose Register, offset: 0x40 */
+    __IO uint32_t GPR17; /**< GPR17 General Purpose Register, offset: 0x44 */
+    __IO uint32_t GPR18; /**< GPR18 General Purpose Register, offset: 0x48 */
+    __IO uint32_t GPR19; /**< GPR19 General Purpose Register, offset: 0x4C */
+    __IO uint32_t GPR20; /**< GPR20 General Purpose Register, offset: 0x50 */
+    __IO uint32_t GPR21; /**< GPR21 General Purpose Register, offset: 0x54 */
+    __IO uint32_t GPR22; /**< GPR22 General Purpose Register, offset: 0x58 */
+    __IO uint32_t GPR23; /**< GPR23 General Purpose Register, offset: 0x5C */
+    __IO uint32_t GPR24; /**< GPR24 General Purpose Register, offset: 0x60 */
+    __IO uint32_t GPR25; /**< GPR25 General Purpose Register, offset: 0x64 */
 } IOMUXC_GPR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -12526,783 +14242,1098 @@ typedef struct {
 
 /*! @name GPR1 - GPR1 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK      (0x7U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT     (0U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK      (0x38U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT     (3U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK      (0xC0U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT     (6U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK      (0x300U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT     (8U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK      (0xC00U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT     (10U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_GINT_MASK                (0x1000U)
-#define IOMUXC_GPR_GPR1_GINT_SHIFT               (12U)
-#define IOMUXC_GPR_GPR1_GINT(x)                  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_GINT_SHIFT)) & IOMUXC_GPR_GPR1_GINT_MASK)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK       (0x2000U)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT      (13U)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK        (0x8000U)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT       (15U)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT)) & IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK    (0x20000U)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT   (17U)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK       (0x80000U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT      (19U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK       (0x100000U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT      (20U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK       (0x200000U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT      (21U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_EXC_MON_MASK             (0x400000U)
-#define IOMUXC_GPR_GPR1_EXC_MON_SHIFT            (22U)
-#define IOMUXC_GPR_GPR1_EXC_MON(x)               (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_EXC_MON_SHIFT)) & IOMUXC_GPR_GPR1_EXC_MON_MASK)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK   (0x800000U)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT  (23U)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT)) & IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK   (0x80000000U)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT  (31U)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT)) & IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK  (0x7U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT (0U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK  (0x38U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT (3U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK  (0xC0U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT (6U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK  (0x300U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT (8U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK  (0xC00U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT (10U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_GINT_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR1_GINT_SHIFT (12U)
+#define IOMUXC_GPR_GPR1_GINT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_GINT_SHIFT)) & IOMUXC_GPR_GPR1_GINT_MASK)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT (13U)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT (15U)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT)) & IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT (17U)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT (19U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT (20U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT (21U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_EXC_MON_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR1_EXC_MON_SHIFT (22U)
+#define IOMUXC_GPR_GPR1_EXC_MON(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_EXC_MON_SHIFT)) & IOMUXC_GPR_GPR1_EXC_MON_MASK)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT (23U)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT)) & IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT (31U)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT)) & IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK)
 /*! @} */
 
 /*! @name GPR2 - GPR2 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK (0x1000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT (12U)
-#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK    (0x4000U)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT   (14U)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK         (0xFF0000U)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT        (16U)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT)) & IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST_MASK          (0x1000000U)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT         (24U)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT)) & IOMUXC_GPR_GPR2_MQS_SW_RST_MASK)
-#define IOMUXC_GPR_GPR2_MQS_EN_MASK              (0x2000000U)
-#define IOMUXC_GPR_GPR2_MQS_EN_SHIFT             (25U)
-#define IOMUXC_GPR_GPR2_MQS_EN(x)                (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_EN_SHIFT)) & IOMUXC_GPR_GPR2_MQS_EN_MASK)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK      (0x4000000U)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT     (26U)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT)) & IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK  (0x4000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT (14U)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK  (0xFF0000U)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT (16U)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT)) & IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT (24U)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT)) & IOMUXC_GPR_GPR2_MQS_SW_RST_MASK)
+#define IOMUXC_GPR_GPR2_MQS_EN_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR2_MQS_EN_SHIFT (25U)
+#define IOMUXC_GPR_GPR2_MQS_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_EN_SHIFT)) & IOMUXC_GPR_GPR2_MQS_EN_MASK)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT (26U)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT)) & IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT (28U)
-#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK (0x20000000U)
+#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK  (0x20000000U)
 #define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT (29U)
-#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT (30U)
-#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK (0x80000000U)
+#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK  (0x80000000U)
 #define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT (31U)
-#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK)
 /*! @} */
 
 /*! @name GPR3 - GPR3 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR3_OCRAM_CTL_MASK           (0xFU)
-#define IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT          (0U)
-#define IOMUXC_GPR_GPR3_OCRAM_CTL(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_CTL_MASK)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK         (0x10U)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT        (4U)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT)) & IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK        (0xF0000U)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT       (16U)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL_MASK  (0xFU)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT (0U)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_CTL_MASK)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK  (0x10U)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT (4U)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT)) & IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK  (0xF0000U)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT (16U)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK)
 /*! @} */
 
 /*! @name GPR4 - GPR4 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK       (0x1U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT      (0U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK       (0x2U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT      (1U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK       (0x4U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT      (2U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK       (0x8U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT      (3U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK       (0x10U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT      (4U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK       (0x20U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT      (5U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK       (0x40U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT      (6U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK       (0x80U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT      (7U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK       (0x200U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT      (9U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK        (0x400U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT       (10U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK    (0x800U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT   (11U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK    (0x1000U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT   (12U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK    (0x2000U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT   (13U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK       (0x10000U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT      (16U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK       (0x20000U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT      (17U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK       (0x40000U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT      (18U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK       (0x80000U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT      (19U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK       (0x100000U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT      (20U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK       (0x200000U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT      (21U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK       (0x400000U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT      (22U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK       (0x800000U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT      (23U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK       (0x2000000U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT      (25U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK        (0x4000000U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT       (26U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT   (27U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT   (28U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT   (29U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK  (0x1U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT (0U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK  (0x2U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT (1U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK  (0x4U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT (2U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK  (0x8U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT (3U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK  (0x10U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT (4U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK  (0x20U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT (5U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK  (0x40U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT (6U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK  (0x80U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT (7U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK  (0x200U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT (9U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK  (0x400U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT (10U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK  (0x800U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT (11U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT (12U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT (13U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT (16U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT (17U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK  (0x40000U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT (18U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT (19U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT (20U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT (21U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT (22U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT (23U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT (25U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT (26U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT (27U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT (28U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT (29U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK)
 /*! @} */
 
 /*! @name GPR5 - GPR5 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR5_WDOG1_MASK_MASK          (0x40U)
-#define IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT         (6U)
-#define IOMUXC_GPR_GPR5_WDOG1_MASK(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG1_MASK_MASK)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK_MASK          (0x80U)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT         (7U)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG2_MASK_MASK)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK     (0x800000U)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT    (23U)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT)) & IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK   (0x2000000U)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT  (25U)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT)) & IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT   (28U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT   (29U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK_MASK  (0x40U)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT (6U)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG1_MASK_MASK)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK_MASK  (0x80U)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT (7U)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG2_MASK_MASK)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT (23U)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT)) & IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT (25U)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT)) & IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT (28U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT (29U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK)
 /*! @} */
 
 /*! @name GPR6 - GPR6 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK (0x1U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK  (0x1U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT (0U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK (0x2U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK  (0x2U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT (1U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK (0x4U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK  (0x4U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT (2U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK (0x8U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK  (0x8U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT (3U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK (0x10U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK  (0x10U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT (4U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK (0x20U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK  (0x20U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT (5U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK (0x40U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK  (0x40U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT (6U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK (0x80U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK  (0x80U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT (7U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK (0x100U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK  (0x100U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT (8U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK (0x200U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK  (0x200U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT (9U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK (0x400U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK  (0x400U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT (10U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK (0x800U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK  (0x800U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT (11U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK (0x1000U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT (12U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK (0x2000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK  (0x2000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT (13U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK (0x4000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK  (0x4000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT (14U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK (0x8000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK  (0x8000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT (15U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK (0x10000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK  (0x10000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT (16U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK (0x20000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK  (0x20000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT (17U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK (0x40000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT (18U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK (0x80000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK  (0x80000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT (19U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK (0x100000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT (20U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK (0x200000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK  (0x200000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT (21U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK (0x400000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK  (0x400000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT (22U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK (0x800000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK  (0x800000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT (23U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK (0x1000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK  (0x1000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT (24U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK (0x2000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK  (0x2000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT (25U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK (0x4000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK  (0x4000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT (26U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK (0x8000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK  (0x8000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT (27U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT (28U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK (0x20000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK  (0x20000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT (29U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT (30U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK (0x80000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK  (0x80000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT (31U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK)
 /*! @} */
 
 /*! @name GPR7 - GPR7 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK     (0x1U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT    (0U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK     (0x2U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT    (1U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK     (0x4U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT    (2U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK     (0x8U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT    (3U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK     (0x10U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT    (4U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK     (0x20U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT    (5U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK     (0x40U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT    (6U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK     (0x80U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT    (7U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK    (0x100U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT   (8U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK    (0x200U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT   (9U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK    (0x400U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT   (10U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK    (0x800U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT   (11U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK    (0x1000U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT   (12U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK    (0x2000U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT   (13U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK    (0x4000U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT   (14U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK    (0x8000U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT   (15U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK     (0x10000U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT    (16U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK     (0x20000U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT    (17U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK     (0x40000U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT    (18U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK     (0x80000U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT    (19U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK     (0x100000U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT    (20U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK     (0x200000U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT    (21U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK     (0x400000U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT    (22U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK     (0x800000U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT    (23U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK    (0x1000000U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT   (24U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK    (0x2000000U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT   (25U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK    (0x4000000U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT   (26U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT   (27U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT   (28U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT   (29U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK    (0x40000000U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT   (30U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK    (0x80000000U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT   (31U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK  (0x1U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT (0U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK  (0x2U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT (1U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK  (0x4U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT (2U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK  (0x8U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT (3U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK  (0x10U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT (4U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK  (0x20U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT (5U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK  (0x40U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT (6U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK  (0x80U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT (7U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK  (0x100U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT (8U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK  (0x200U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT (9U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK  (0x400U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT (10U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK  (0x800U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT (11U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT (12U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT (13U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK  (0x4000U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT (14U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT (15U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT (16U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT (17U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK  (0x40000U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT (18U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT (19U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT (20U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT (21U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT (22U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT (23U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT (24U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT (25U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT (26U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT (27U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT (28U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT (29U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK  (0x40000000U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT (30U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT (31U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK)
 /*! @} */
 
 /*! @name GPR8 - GPR8 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK (0x1U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK  (0x1U)
 #define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT (0U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK     (0x2U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT    (1U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK (0x4U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK  (0x2U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT (1U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK  (0x4U)
 #define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT (2U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK     (0x8U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT    (3U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK (0x10U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK  (0x8U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT (3U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK  (0x10U)
 #define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT (4U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK     (0x20U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT    (5U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK (0x40U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK  (0x20U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT (5U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK  (0x40U)
 #define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT (6U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK     (0x80U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT    (7U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK (0x100U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK  (0x80U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT (7U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK  (0x100U)
 #define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT (8U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK     (0x200U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT    (9U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK (0x400U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK  (0x200U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT (9U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK  (0x400U)
 #define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT (10U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK     (0x800U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT    (11U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK (0x1000U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK  (0x800U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT (11U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT (12U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK     (0x2000U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT    (13U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK (0x4000U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT (13U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK  (0x4000U)
 #define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT (14U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK     (0x8000U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT    (15U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK (0x10000U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT (15U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK  (0x10000U)
 #define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT (16U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK    (0x20000U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT   (17U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK (0x40000U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT (17U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT (18U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK    (0x80000U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT   (19U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK (0x100000U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT (19U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT (20U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK    (0x200000U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT   (21U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK (0x400000U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT (21U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK  (0x400000U)
 #define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT (22U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK    (0x800000U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT   (23U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK (0x1000000U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT (23U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK  (0x1000000U)
 #define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT (24U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK    (0x2000000U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT   (25U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK (0x4000000U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT (25U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK  (0x4000000U)
 #define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT (26U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT   (27U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT (27U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT (28U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT   (29U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT (29U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT (30U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK    (0x80000000U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT   (31U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT (31U)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK)
 /*! @} */
 
 /*! @name GPR10 - GPR10 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR10_NIDEN_MASK              (0x1U)
-#define IOMUXC_GPR_GPR10_NIDEN_SHIFT             (0U)
-#define IOMUXC_GPR_GPR10_NIDEN(x)                (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_NIDEN_MASK)
-#define IOMUXC_GPR_GPR10_DBG_EN_MASK             (0x2U)
-#define IOMUXC_GPR_GPR10_DBG_EN_SHIFT            (1U)
-#define IOMUXC_GPR_GPR10_DBG_EN(x)               (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_DBG_EN_MASK)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK       (0x4U)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT      (2U)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK)
-#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK (0x10U)
+#define IOMUXC_GPR_GPR10_NIDEN_MASK  (0x1U)
+#define IOMUXC_GPR_GPR10_NIDEN_SHIFT (0U)
+#define IOMUXC_GPR_GPR10_NIDEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_NIDEN_MASK)
+#define IOMUXC_GPR_GPR10_DBG_EN_MASK  (0x2U)
+#define IOMUXC_GPR_GPR10_DBG_EN_SHIFT (1U)
+#define IOMUXC_GPR_GPR10_DBG_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_DBG_EN_MASK)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK  (0x4U)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT (2U)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK)
+#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK  (0x10U)
 #define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT (4U)
-#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) & IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK        (0x100U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT       (8U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK      (0xFE00U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT     (9U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK         (0x10000U)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT        (16U)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK        (0x20000U)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT       (17U)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK)
+#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK  (0x100U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT (8U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK  (0xFE00U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT (9U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT (16U)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT (17U)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK)
 #define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT (18U)
-#define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK (0x100000U)
+#define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT (20U)
-#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK   (0x1000000U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT  (24U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK (0xFE000000U)
+#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) &                             \
+     IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT (24U)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK  (0xFE000000U)
 #define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT (25U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT)) &                                      \
+     IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK)
 /*! @} */
 
 /*! @name GPR11 - GPR11 General Purpose Register */
 /*! @{ */
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK  (0x3U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT (0U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK  (0xCU)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT (2U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK  (0x30U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT (4U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK  (0xC0U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT (6U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK       (0xF00U)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT      (8U)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK (0x30000U)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK  (0xF00U)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT (8U)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK  (0x30000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT (16U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK (0xC0000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK  (0xC0000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT (18U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK (0x300000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK  (0x300000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT (20U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK (0xC00000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK  (0xC00000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT (22U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK  (0xF000000U)
 #define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT (24U)
-#define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK)
 /*! @} */
 
 /*! @name GPR12 - GPR12 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK (0x1U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK  (0x1U)
 #define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT (0U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK   (0x2U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT  (1U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK (0x4U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK  (0x2U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT (1U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK  (0x4U)
 #define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT (2U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK   (0x8U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT  (3U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK (0x10U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK  (0x8U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT (3U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK  (0x10U)
 #define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT (4U)
-#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT)) &                                      \
+     IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK)
 /*! @} */
 
 /*! @name GPR13 - GPR13 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK      (0x1U)
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT     (0U)
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK      (0x2U)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT     (1U)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK)
-#define IOMUXC_GPR_GPR13_CACHE_ENET_MASK         (0x80U)
-#define IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT        (7U)
-#define IOMUXC_GPR_GPR13_CACHE_ENET(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_ENET_MASK)
-#define IOMUXC_GPR_GPR13_CACHE_USB_MASK          (0x2000U)
-#define IOMUXC_GPR_GPR13_CACHE_USB_SHIFT         (13U)
-#define IOMUXC_GPR_GPR13_CACHE_USB(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_USB_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_USB_MASK)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK  (0x1U)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT (0U)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK  (0x2U)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT (1U)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK)
+#define IOMUXC_GPR_GPR13_CACHE_ENET_MASK  (0x80U)
+#define IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT (7U)
+#define IOMUXC_GPR_GPR13_CACHE_ENET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_ENET_MASK)
+#define IOMUXC_GPR_GPR13_CACHE_USB_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR13_CACHE_USB_SHIFT (13U)
+#define IOMUXC_GPR_GPR13_CACHE_USB(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_USB_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_USB_MASK)
 /*! @} */
 
 /*! @name GPR14 - GPR14 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK (0x1U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK  (0x1U)
 #define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT (0U)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK (0x2U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK  (0x2U)
 #define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT (1U)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK (0x4U)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK  (0x4U)
 #define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT (2U)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK (0x8U)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK  (0x8U)
 #define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT (3U)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK (0x10U)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK  (0x10U)
 #define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT (4U)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK (0x20U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK  (0x20U)
 #define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT (5U)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK (0x40U)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK  (0x40U)
 #define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT (6U)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK (0x80U)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK  (0x80U)
 #define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT (7U)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK (0x100U)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK  (0x100U)
 #define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT (8U)
-#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK (0x200U)
+#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK  (0x200U)
 #define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT (9U)
-#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK (0x400U)
+#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK  (0x400U)
 #define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT (10U)
-#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK (0x800U)
+#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK  (0x800U)
 #define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT (11U)
-#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK      (0xF0000U)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT     (16U)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK      (0xF00000U)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT     (20U)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK  (0xF0000U)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT (16U)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK  (0xF00000U)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT (20U)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK)
 /*! @} */
 
 /*! @name GPR16 - GPR16 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK       (0x1U)
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT      (0U)
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK       (0x2U)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT      (1U)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK)
-#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK (0x4U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK  (0x1U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT (0U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK  (0x2U)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT (1U)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK)
+#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK  (0x4U)
 #define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT (2U)
-#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT)) & IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK      (0xFFFFFF80U)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT     (7U)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT)) & IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK)
+#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK  (0xFFFFFF80U)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT (7U)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT)) & IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK)
 /*! @} */
 
 /*! @name GPR17 - GPR17 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK   (0xFFFFFFFFU)
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT  (0U)
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT)) & IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK  (0xFFFFFFFFU)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT (0U)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT)) & IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK)
 /*! @} */
 
 /*! @name GPR18 - GPR18 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK)
+#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK)
 /*! @} */
 
 /*! @name GPR19 - GPR19 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK)
+#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK)
 /*! @} */
 
 /*! @name GPR20 - GPR20 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK)
+#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK)
 /*! @} */
 
 /*! @name GPR21 - GPR21 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK)
 /*! @} */
 
 /*! @name GPR22 - GPR22 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK)
 /*! @} */
 
 /*! @name GPR23 - GPR23 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT)) & IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK)
+#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT)) & IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK)
 /*! @} */
 
 /*! @name GPR24 - GPR24 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT)) & IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK)
 /*! @} */
 
 /*! @name GPR25 - GPR25 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK)
+#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_GPR_Register_Masks */
 
-
 /* IOMUXC_GPR - Peripheral instance base addresses */
 /** Peripheral IOMUXC_GPR base address */
-#define IOMUXC_GPR_BASE                          (0x400AC000u)
+#define IOMUXC_GPR_BASE (0x400AC000u)
 /** Peripheral IOMUXC_GPR base pointer */
-#define IOMUXC_GPR                               ((IOMUXC_GPR_Type *)IOMUXC_GPR_BASE)
+#define IOMUXC_GPR ((IOMUXC_GPR_Type *)IOMUXC_GPR_BASE)
 /** Array initializer of IOMUXC_GPR peripheral base addresses */
-#define IOMUXC_GPR_BASE_ADDRS                    { IOMUXC_GPR_BASE }
+#define IOMUXC_GPR_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        IOMUXC_GPR_BASE                                                                                                \
+    }
 /** Array initializer of IOMUXC_GPR peripheral base pointers */
-#define IOMUXC_GPR_BASE_PTRS                     { IOMUXC_GPR }
+#define IOMUXC_GPR_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        IOMUXC_GPR                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_GPR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_SNVS Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13313,16 +15344,19 @@ typedef struct {
  */
 
 /** IOMUXC_SNVS - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SW_MUX_CTL_PAD_WAKEUP;             /**< SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register, offset: 0x0 */
-  __IO uint32_t SW_MUX_CTL_PAD_PMIC_ON_REQ;        /**< SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register, offset: 0x4 */
-  __IO uint32_t SW_MUX_CTL_PAD_PMIC_STBY_REQ;      /**< SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register, offset: 0x8 */
-  __IO uint32_t SW_PAD_CTL_PAD_TEST_MODE;          /**< SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register, offset: 0xC */
-  __IO uint32_t SW_PAD_CTL_PAD_POR_B;              /**< SW_PAD_CTL_PAD_POR_B SW PAD Control Register, offset: 0x10 */
-  __IO uint32_t SW_PAD_CTL_PAD_ONOFF;              /**< SW_PAD_CTL_PAD_ONOFF SW PAD Control Register, offset: 0x14 */
-  __IO uint32_t SW_PAD_CTL_PAD_WAKEUP;             /**< SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register, offset: 0x18 */
-  __IO uint32_t SW_PAD_CTL_PAD_PMIC_ON_REQ;        /**< SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register, offset: 0x1C */
-  __IO uint32_t SW_PAD_CTL_PAD_PMIC_STBY_REQ;      /**< SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register, offset: 0x20 */
+typedef struct
+{
+    __IO uint32_t SW_MUX_CTL_PAD_WAKEUP;      /**< SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register, offset: 0x0 */
+    __IO uint32_t SW_MUX_CTL_PAD_PMIC_ON_REQ; /**< SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register, offset: 0x4 */
+    __IO uint32_t
+        SW_MUX_CTL_PAD_PMIC_STBY_REQ;         /**< SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register, offset: 0x8 */
+    __IO uint32_t SW_PAD_CTL_PAD_TEST_MODE;   /**< SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register, offset: 0xC */
+    __IO uint32_t SW_PAD_CTL_PAD_POR_B;       /**< SW_PAD_CTL_PAD_POR_B SW PAD Control Register, offset: 0x10 */
+    __IO uint32_t SW_PAD_CTL_PAD_ONOFF;       /**< SW_PAD_CTL_PAD_ONOFF SW PAD Control Register, offset: 0x14 */
+    __IO uint32_t SW_PAD_CTL_PAD_WAKEUP;      /**< SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register, offset: 0x18 */
+    __IO uint32_t SW_PAD_CTL_PAD_PMIC_ON_REQ; /**< SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register, offset: 0x1C */
+    __IO uint32_t
+        SW_PAD_CTL_PAD_PMIC_STBY_REQ; /**< SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register, offset: 0x20 */
 } IOMUXC_SNVS_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13336,223 +15370,334 @@ typedef struct {
 
 /*! @name SW_MUX_CTL_PAD_WAKEUP - SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK)
 /*! @} */
 
 /*! @name SW_MUX_CTL_PAD_PMIC_ON_REQ - SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT)) &                          \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT)) &                              \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK)
 /*! @} */
 
 /*! @name SW_MUX_CTL_PAD_PMIC_STBY_REQ - SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE(x)                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT)) &                        \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT)) &                            \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_TEST_MODE - SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_POR_B - SW_PAD_CTL_PAD_POR_B SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_ONOFF - SW_PAD_CTL_PAD_ONOFF SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_WAKEUP - SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT)) &                                  \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_PMIC_ON_REQ - SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_PMIC_STBY_REQ - SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT)) &                           \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_Register_Masks */
 
-
 /* IOMUXC_SNVS - Peripheral instance base addresses */
 /** Peripheral IOMUXC_SNVS base address */
-#define IOMUXC_SNVS_BASE                         (0x400A8000u)
+#define IOMUXC_SNVS_BASE (0x400A8000u)
 /** Peripheral IOMUXC_SNVS base pointer */
-#define IOMUXC_SNVS                              ((IOMUXC_SNVS_Type *)IOMUXC_SNVS_BASE)
+#define IOMUXC_SNVS ((IOMUXC_SNVS_Type *)IOMUXC_SNVS_BASE)
 /** Array initializer of IOMUXC_SNVS peripheral base addresses */
-#define IOMUXC_SNVS_BASE_ADDRS                   { IOMUXC_SNVS_BASE }
+#define IOMUXC_SNVS_BASE_ADDRS                                                                                         \
+    {                                                                                                                  \
+        IOMUXC_SNVS_BASE                                                                                               \
+    }
 /** Array initializer of IOMUXC_SNVS peripheral base pointers */
-#define IOMUXC_SNVS_BASE_PTRS                    { IOMUXC_SNVS }
+#define IOMUXC_SNVS_BASE_PTRS                                                                                          \
+    {                                                                                                                  \
+        IOMUXC_SNVS                                                                                                    \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_SNVS_GPR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13563,11 +15708,12 @@ typedef struct {
  */
 
 /** IOMUXC_SNVS_GPR - Register Layout Typedef */
-typedef struct {
-       uint32_t GPR0;                              /**< GPR0 General Purpose Register, offset: 0x0 */
-       uint32_t GPR1;                              /**< GPR1 General Purpose Register, offset: 0x4 */
-       uint32_t GPR2;                              /**< GPR2 General Purpose Register, offset: 0x8 */
-  __IO uint32_t GPR3;                              /**< GPR3 General Purpose Register, offset: 0xC */
+typedef struct
+{
+    uint32_t GPR0;      /**< GPR0 General Purpose Register, offset: 0x0 */
+    uint32_t GPR1;      /**< GPR1 General Purpose Register, offset: 0x4 */
+    uint32_t GPR2;      /**< GPR2 General Purpose Register, offset: 0x8 */
+    __IO uint32_t GPR3; /**< GPR3 General Purpose Register, offset: 0xC */
 } IOMUXC_SNVS_GPR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13581,50 +15727,67 @@ typedef struct {
 
 /*! @name GPR3 - GPR3 General Purpose Register */
 /*! @{ */
-#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK (0x1U)
+#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK  (0x1U)
 #define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT (0U)
-#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK (0x2U)
+#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT)) &                                    \
+     IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK  (0x2U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT (1U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT)) &                                \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK  (0xCU)
 #define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT (2U)
-#define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK (0x10000U)
+#define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK  (0x10000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT (16U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT)) &                                     \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK  (0x20000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT (17U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK  (0x40000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT (18U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK (0x80000U)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK  (0x80000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT (19U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT)) &                                      \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_GPR_Register_Masks */
 
-
 /* IOMUXC_SNVS_GPR - Peripheral instance base addresses */
 /** Peripheral IOMUXC_SNVS_GPR base address */
-#define IOMUXC_SNVS_GPR_BASE                     (0x400A4000u)
+#define IOMUXC_SNVS_GPR_BASE (0x400A4000u)
 /** Peripheral IOMUXC_SNVS_GPR base pointer */
-#define IOMUXC_SNVS_GPR                          ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)
+#define IOMUXC_SNVS_GPR ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)
 /** Array initializer of IOMUXC_SNVS_GPR peripheral base addresses */
-#define IOMUXC_SNVS_GPR_BASE_ADDRS               { IOMUXC_SNVS_GPR_BASE }
+#define IOMUXC_SNVS_GPR_BASE_ADDRS                                                                                     \
+    {                                                                                                                  \
+        IOMUXC_SNVS_GPR_BASE                                                                                           \
+    }
 /** Array initializer of IOMUXC_SNVS_GPR peripheral base pointers */
-#define IOMUXC_SNVS_GPR_BASE_PTRS                { IOMUXC_SNVS_GPR }
+#define IOMUXC_SNVS_GPR_BASE_PTRS                                                                                      \
+    {                                                                                                                  \
+        IOMUXC_SNVS_GPR                                                                                                \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_GPR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- KPP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13635,11 +15798,12 @@ typedef struct {
  */
 
 /** KPP - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t KPCR;                              /**< Keypad Control Register, offset: 0x0 */
-  __IO uint16_t KPSR;                              /**< Keypad Status Register, offset: 0x2 */
-  __IO uint16_t KDDR;                              /**< Keypad Data Direction Register, offset: 0x4 */
-  __IO uint16_t KPDR;                              /**< Keypad Data Register, offset: 0x6 */
+typedef struct
+{
+    __IO uint16_t KPCR; /**< Keypad Control Register, offset: 0x0 */
+    __IO uint16_t KPSR; /**< Keypad Status Register, offset: 0x2 */
+    __IO uint16_t KDDR; /**< Keypad Data Direction Register, offset: 0x4 */
+    __IO uint16_t KPDR; /**< Keypad Data Register, offset: 0x6 */
 } KPP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13653,79 +15817,85 @@ typedef struct {
 
 /*! @name KPCR - Keypad Control Register */
 /*! @{ */
-#define KPP_KPCR_KRE_MASK                        (0xFFU)
-#define KPP_KPCR_KRE_SHIFT                       (0U)
-#define KPP_KPCR_KRE(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KRE_SHIFT)) & KPP_KPCR_KRE_MASK)
-#define KPP_KPCR_KCO_MASK                        (0xFF00U)
-#define KPP_KPCR_KCO_SHIFT                       (8U)
-#define KPP_KPCR_KCO(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KCO_SHIFT)) & KPP_KPCR_KCO_MASK)
+#define KPP_KPCR_KRE_MASK  (0xFFU)
+#define KPP_KPCR_KRE_SHIFT (0U)
+#define KPP_KPCR_KRE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KRE_SHIFT)) & KPP_KPCR_KRE_MASK)
+#define KPP_KPCR_KCO_MASK  (0xFF00U)
+#define KPP_KPCR_KCO_SHIFT (8U)
+#define KPP_KPCR_KCO(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KCO_SHIFT)) & KPP_KPCR_KCO_MASK)
 /*! @} */
 
 /*! @name KPSR - Keypad Status Register */
 /*! @{ */
-#define KPP_KPSR_KPKD_MASK                       (0x1U)
-#define KPP_KPSR_KPKD_SHIFT                      (0U)
-#define KPP_KPSR_KPKD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKD_SHIFT)) & KPP_KPSR_KPKD_MASK)
-#define KPP_KPSR_KPKR_MASK                       (0x2U)
-#define KPP_KPSR_KPKR_SHIFT                      (1U)
-#define KPP_KPSR_KPKR(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKR_SHIFT)) & KPP_KPSR_KPKR_MASK)
-#define KPP_KPSR_KDSC_MASK                       (0x4U)
-#define KPP_KPSR_KDSC_SHIFT                      (2U)
-#define KPP_KPSR_KDSC(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDSC_SHIFT)) & KPP_KPSR_KDSC_MASK)
-#define KPP_KPSR_KRSS_MASK                       (0x8U)
-#define KPP_KPSR_KRSS_SHIFT                      (3U)
-#define KPP_KPSR_KRSS(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRSS_SHIFT)) & KPP_KPSR_KRSS_MASK)
-#define KPP_KPSR_KDIE_MASK                       (0x100U)
-#define KPP_KPSR_KDIE_SHIFT                      (8U)
-#define KPP_KPSR_KDIE(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDIE_SHIFT)) & KPP_KPSR_KDIE_MASK)
-#define KPP_KPSR_KRIE_MASK                       (0x200U)
-#define KPP_KPSR_KRIE_SHIFT                      (9U)
-#define KPP_KPSR_KRIE(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRIE_SHIFT)) & KPP_KPSR_KRIE_MASK)
+#define KPP_KPSR_KPKD_MASK  (0x1U)
+#define KPP_KPSR_KPKD_SHIFT (0U)
+#define KPP_KPSR_KPKD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKD_SHIFT)) & KPP_KPSR_KPKD_MASK)
+#define KPP_KPSR_KPKR_MASK  (0x2U)
+#define KPP_KPSR_KPKR_SHIFT (1U)
+#define KPP_KPSR_KPKR(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKR_SHIFT)) & KPP_KPSR_KPKR_MASK)
+#define KPP_KPSR_KDSC_MASK  (0x4U)
+#define KPP_KPSR_KDSC_SHIFT (2U)
+#define KPP_KPSR_KDSC(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDSC_SHIFT)) & KPP_KPSR_KDSC_MASK)
+#define KPP_KPSR_KRSS_MASK  (0x8U)
+#define KPP_KPSR_KRSS_SHIFT (3U)
+#define KPP_KPSR_KRSS(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRSS_SHIFT)) & KPP_KPSR_KRSS_MASK)
+#define KPP_KPSR_KDIE_MASK  (0x100U)
+#define KPP_KPSR_KDIE_SHIFT (8U)
+#define KPP_KPSR_KDIE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDIE_SHIFT)) & KPP_KPSR_KDIE_MASK)
+#define KPP_KPSR_KRIE_MASK  (0x200U)
+#define KPP_KPSR_KRIE_SHIFT (9U)
+#define KPP_KPSR_KRIE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRIE_SHIFT)) & KPP_KPSR_KRIE_MASK)
 /*! @} */
 
 /*! @name KDDR - Keypad Data Direction Register */
 /*! @{ */
-#define KPP_KDDR_KRDD_MASK                       (0xFFU)
-#define KPP_KDDR_KRDD_SHIFT                      (0U)
-#define KPP_KDDR_KRDD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KRDD_SHIFT)) & KPP_KDDR_KRDD_MASK)
-#define KPP_KDDR_KCDD_MASK                       (0xFF00U)
-#define KPP_KDDR_KCDD_SHIFT                      (8U)
-#define KPP_KDDR_KCDD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KCDD_SHIFT)) & KPP_KDDR_KCDD_MASK)
+#define KPP_KDDR_KRDD_MASK  (0xFFU)
+#define KPP_KDDR_KRDD_SHIFT (0U)
+#define KPP_KDDR_KRDD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KRDD_SHIFT)) & KPP_KDDR_KRDD_MASK)
+#define KPP_KDDR_KCDD_MASK  (0xFF00U)
+#define KPP_KDDR_KCDD_SHIFT (8U)
+#define KPP_KDDR_KCDD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KCDD_SHIFT)) & KPP_KDDR_KCDD_MASK)
 /*! @} */
 
 /*! @name KPDR - Keypad Data Register */
 /*! @{ */
-#define KPP_KPDR_KRD_MASK                        (0xFFU)
-#define KPP_KPDR_KRD_SHIFT                       (0U)
-#define KPP_KPDR_KRD(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KRD_SHIFT)) & KPP_KPDR_KRD_MASK)
-#define KPP_KPDR_KCD_MASK                        (0xFF00U)
-#define KPP_KPDR_KCD_SHIFT                       (8U)
-#define KPP_KPDR_KCD(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KCD_SHIFT)) & KPP_KPDR_KCD_MASK)
+#define KPP_KPDR_KRD_MASK  (0xFFU)
+#define KPP_KPDR_KRD_SHIFT (0U)
+#define KPP_KPDR_KRD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KRD_SHIFT)) & KPP_KPDR_KRD_MASK)
+#define KPP_KPDR_KCD_MASK  (0xFF00U)
+#define KPP_KPDR_KCD_SHIFT (8U)
+#define KPP_KPDR_KCD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KCD_SHIFT)) & KPP_KPDR_KCD_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group KPP_Register_Masks */
 
-
 /* KPP - Peripheral instance base addresses */
 /** Peripheral KPP base address */
-#define KPP_BASE                                 (0x401FC000u)
+#define KPP_BASE (0x401FC000u)
 /** Peripheral KPP base pointer */
-#define KPP                                      ((KPP_Type *)KPP_BASE)
+#define KPP ((KPP_Type *)KPP_BASE)
 /** Array initializer of KPP peripheral base addresses */
-#define KPP_BASE_ADDRS                           { KPP_BASE }
+#define KPP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        KPP_BASE                                                                                                       \
+    }
 /** Array initializer of KPP peripheral base pointers */
-#define KPP_BASE_PTRS                            { KPP }
+#define KPP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        KPP                                                                                                            \
+    }
 /** Interrupt vectors for the KPP peripheral type */
-#define KPP_IRQS                                 { KPP_IRQn }
+#define KPP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        KPP_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group KPP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPI2C Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13736,47 +15906,48 @@ typedef struct {
  */
 
 /** LPI2C - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-       uint8_t RESERVED_0[8];
-  __IO uint32_t MCR;                               /**< Master Control Register, offset: 0x10 */
-  __IO uint32_t MSR;                               /**< Master Status Register, offset: 0x14 */
-  __IO uint32_t MIER;                              /**< Master Interrupt Enable Register, offset: 0x18 */
-  __IO uint32_t MDER;                              /**< Master DMA Enable Register, offset: 0x1C */
-  __IO uint32_t MCFGR0;                            /**< Master Configuration Register 0, offset: 0x20 */
-  __IO uint32_t MCFGR1;                            /**< Master Configuration Register 1, offset: 0x24 */
-  __IO uint32_t MCFGR2;                            /**< Master Configuration Register 2, offset: 0x28 */
-  __IO uint32_t MCFGR3;                            /**< Master Configuration Register 3, offset: 0x2C */
-       uint8_t RESERVED_1[16];
-  __IO uint32_t MDMR;                              /**< Master Data Match Register, offset: 0x40 */
-       uint8_t RESERVED_2[4];
-  __IO uint32_t MCCR0;                             /**< Master Clock Configuration Register 0, offset: 0x48 */
-       uint8_t RESERVED_3[4];
-  __IO uint32_t MCCR1;                             /**< Master Clock Configuration Register 1, offset: 0x50 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t MFCR;                              /**< Master FIFO Control Register, offset: 0x58 */
-  __I  uint32_t MFSR;                              /**< Master FIFO Status Register, offset: 0x5C */
-  __O  uint32_t MTDR;                              /**< Master Transmit Data Register, offset: 0x60 */
-       uint8_t RESERVED_5[12];
-  __I  uint32_t MRDR;                              /**< Master Receive Data Register, offset: 0x70 */
-       uint8_t RESERVED_6[156];
-  __IO uint32_t SCR;                               /**< Slave Control Register, offset: 0x110 */
-  __IO uint32_t SSR;                               /**< Slave Status Register, offset: 0x114 */
-  __IO uint32_t SIER;                              /**< Slave Interrupt Enable Register, offset: 0x118 */
-  __IO uint32_t SDER;                              /**< Slave DMA Enable Register, offset: 0x11C */
-       uint8_t RESERVED_7[4];
-  __IO uint32_t SCFGR1;                            /**< Slave Configuration Register 1, offset: 0x124 */
-  __IO uint32_t SCFGR2;                            /**< Slave Configuration Register 2, offset: 0x128 */
-       uint8_t RESERVED_8[20];
-  __IO uint32_t SAMR;                              /**< Slave Address Match Register, offset: 0x140 */
-       uint8_t RESERVED_9[12];
-  __I  uint32_t SASR;                              /**< Slave Address Status Register, offset: 0x150 */
-  __IO uint32_t STAR;                              /**< Slave Transmit ACK Register, offset: 0x154 */
-       uint8_t RESERVED_10[8];
-  __O  uint32_t STDR;                              /**< Slave Transmit Data Register, offset: 0x160 */
-       uint8_t RESERVED_11[12];
-  __I  uint32_t SRDR;                              /**< Slave Receive Data Register, offset: 0x170 */
+typedef struct
+{
+    __I uint32_t VERID; /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM; /**< Parameter Register, offset: 0x4 */
+    uint8_t RESERVED_0[8];
+    __IO uint32_t MCR;    /**< Master Control Register, offset: 0x10 */
+    __IO uint32_t MSR;    /**< Master Status Register, offset: 0x14 */
+    __IO uint32_t MIER;   /**< Master Interrupt Enable Register, offset: 0x18 */
+    __IO uint32_t MDER;   /**< Master DMA Enable Register, offset: 0x1C */
+    __IO uint32_t MCFGR0; /**< Master Configuration Register 0, offset: 0x20 */
+    __IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x24 */
+    __IO uint32_t MCFGR2; /**< Master Configuration Register 2, offset: 0x28 */
+    __IO uint32_t MCFGR3; /**< Master Configuration Register 3, offset: 0x2C */
+    uint8_t RESERVED_1[16];
+    __IO uint32_t MDMR; /**< Master Data Match Register, offset: 0x40 */
+    uint8_t RESERVED_2[4];
+    __IO uint32_t MCCR0; /**< Master Clock Configuration Register 0, offset: 0x48 */
+    uint8_t RESERVED_3[4];
+    __IO uint32_t MCCR1; /**< Master Clock Configuration Register 1, offset: 0x50 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t MFCR; /**< Master FIFO Control Register, offset: 0x58 */
+    __I uint32_t MFSR;  /**< Master FIFO Status Register, offset: 0x5C */
+    __O uint32_t MTDR;  /**< Master Transmit Data Register, offset: 0x60 */
+    uint8_t RESERVED_5[12];
+    __I uint32_t MRDR; /**< Master Receive Data Register, offset: 0x70 */
+    uint8_t RESERVED_6[156];
+    __IO uint32_t SCR;  /**< Slave Control Register, offset: 0x110 */
+    __IO uint32_t SSR;  /**< Slave Status Register, offset: 0x114 */
+    __IO uint32_t SIER; /**< Slave Interrupt Enable Register, offset: 0x118 */
+    __IO uint32_t SDER; /**< Slave DMA Enable Register, offset: 0x11C */
+    uint8_t RESERVED_7[4];
+    __IO uint32_t SCFGR1; /**< Slave Configuration Register 1, offset: 0x124 */
+    __IO uint32_t SCFGR2; /**< Slave Configuration Register 2, offset: 0x128 */
+    uint8_t RESERVED_8[20];
+    __IO uint32_t SAMR; /**< Slave Address Match Register, offset: 0x140 */
+    uint8_t RESERVED_9[12];
+    __I uint32_t SASR;  /**< Slave Address Status Register, offset: 0x150 */
+    __IO uint32_t STAR; /**< Slave Transmit ACK Register, offset: 0x154 */
+    uint8_t RESERVED_10[8];
+    __O uint32_t STDR; /**< Slave Transmit Data Register, offset: 0x160 */
+    uint8_t RESERVED_11[12];
+    __I uint32_t SRDR; /**< Slave Receive Data Register, offset: 0x170 */
 } LPI2C_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13790,526 +15961,547 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPI2C_VERID_FEATURE_MASK                 (0xFFFFU)
-#define LPI2C_VERID_FEATURE_SHIFT                (0U)
-#define LPI2C_VERID_FEATURE(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
-#define LPI2C_VERID_MINOR_MASK                   (0xFF0000U)
-#define LPI2C_VERID_MINOR_SHIFT                  (16U)
-#define LPI2C_VERID_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
-#define LPI2C_VERID_MAJOR_MASK                   (0xFF000000U)
-#define LPI2C_VERID_MAJOR_SHIFT                  (24U)
-#define LPI2C_VERID_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
+#define LPI2C_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPI2C_VERID_FEATURE_SHIFT (0U)
+#define LPI2C_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
+#define LPI2C_VERID_MINOR_MASK    (0xFF0000U)
+#define LPI2C_VERID_MINOR_SHIFT   (16U)
+#define LPI2C_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
+#define LPI2C_VERID_MAJOR_MASK    (0xFF000000U)
+#define LPI2C_VERID_MAJOR_SHIFT   (24U)
+#define LPI2C_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPI2C_PARAM_MTXFIFO_MASK                 (0xFU)
-#define LPI2C_PARAM_MTXFIFO_SHIFT                (0U)
-#define LPI2C_PARAM_MTXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
-#define LPI2C_PARAM_MRXFIFO_MASK                 (0xF00U)
-#define LPI2C_PARAM_MRXFIFO_SHIFT                (8U)
-#define LPI2C_PARAM_MRXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
+#define LPI2C_PARAM_MTXFIFO_MASK  (0xFU)
+#define LPI2C_PARAM_MTXFIFO_SHIFT (0U)
+#define LPI2C_PARAM_MTXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
+#define LPI2C_PARAM_MRXFIFO_MASK  (0xF00U)
+#define LPI2C_PARAM_MRXFIFO_SHIFT (8U)
+#define LPI2C_PARAM_MRXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
 /*! @} */
 
 /*! @name MCR - Master Control Register */
 /*! @{ */
-#define LPI2C_MCR_MEN_MASK                       (0x1U)
-#define LPI2C_MCR_MEN_SHIFT                      (0U)
-#define LPI2C_MCR_MEN(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
-#define LPI2C_MCR_RST_MASK                       (0x2U)
-#define LPI2C_MCR_RST_SHIFT                      (1U)
-#define LPI2C_MCR_RST(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
-#define LPI2C_MCR_DOZEN_MASK                     (0x4U)
-#define LPI2C_MCR_DOZEN_SHIFT                    (2U)
-#define LPI2C_MCR_DOZEN(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)
-#define LPI2C_MCR_DBGEN_MASK                     (0x8U)
-#define LPI2C_MCR_DBGEN_SHIFT                    (3U)
-#define LPI2C_MCR_DBGEN(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)
-#define LPI2C_MCR_RTF_MASK                       (0x100U)
-#define LPI2C_MCR_RTF_SHIFT                      (8U)
-#define LPI2C_MCR_RTF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)
-#define LPI2C_MCR_RRF_MASK                       (0x200U)
-#define LPI2C_MCR_RRF_SHIFT                      (9U)
-#define LPI2C_MCR_RRF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)
+#define LPI2C_MCR_MEN_MASK    (0x1U)
+#define LPI2C_MCR_MEN_SHIFT   (0U)
+#define LPI2C_MCR_MEN(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
+#define LPI2C_MCR_RST_MASK    (0x2U)
+#define LPI2C_MCR_RST_SHIFT   (1U)
+#define LPI2C_MCR_RST(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
+#define LPI2C_MCR_DOZEN_MASK  (0x4U)
+#define LPI2C_MCR_DOZEN_SHIFT (2U)
+#define LPI2C_MCR_DOZEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)
+#define LPI2C_MCR_DBGEN_MASK  (0x8U)
+#define LPI2C_MCR_DBGEN_SHIFT (3U)
+#define LPI2C_MCR_DBGEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)
+#define LPI2C_MCR_RTF_MASK    (0x100U)
+#define LPI2C_MCR_RTF_SHIFT   (8U)
+#define LPI2C_MCR_RTF(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)
+#define LPI2C_MCR_RRF_MASK    (0x200U)
+#define LPI2C_MCR_RRF_SHIFT   (9U)
+#define LPI2C_MCR_RRF(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)
 /*! @} */
 
 /*! @name MSR - Master Status Register */
 /*! @{ */
-#define LPI2C_MSR_TDF_MASK                       (0x1U)
-#define LPI2C_MSR_TDF_SHIFT                      (0U)
-#define LPI2C_MSR_TDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)
-#define LPI2C_MSR_RDF_MASK                       (0x2U)
-#define LPI2C_MSR_RDF_SHIFT                      (1U)
-#define LPI2C_MSR_RDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)
-#define LPI2C_MSR_EPF_MASK                       (0x100U)
-#define LPI2C_MSR_EPF_SHIFT                      (8U)
-#define LPI2C_MSR_EPF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)
-#define LPI2C_MSR_SDF_MASK                       (0x200U)
-#define LPI2C_MSR_SDF_SHIFT                      (9U)
-#define LPI2C_MSR_SDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)
-#define LPI2C_MSR_NDF_MASK                       (0x400U)
-#define LPI2C_MSR_NDF_SHIFT                      (10U)
-#define LPI2C_MSR_NDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)
-#define LPI2C_MSR_ALF_MASK                       (0x800U)
-#define LPI2C_MSR_ALF_SHIFT                      (11U)
-#define LPI2C_MSR_ALF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)
-#define LPI2C_MSR_FEF_MASK                       (0x1000U)
-#define LPI2C_MSR_FEF_SHIFT                      (12U)
-#define LPI2C_MSR_FEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)
-#define LPI2C_MSR_PLTF_MASK                      (0x2000U)
-#define LPI2C_MSR_PLTF_SHIFT                     (13U)
-#define LPI2C_MSR_PLTF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)
-#define LPI2C_MSR_DMF_MASK                       (0x4000U)
-#define LPI2C_MSR_DMF_SHIFT                      (14U)
-#define LPI2C_MSR_DMF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)
-#define LPI2C_MSR_MBF_MASK                       (0x1000000U)
-#define LPI2C_MSR_MBF_SHIFT                      (24U)
-#define LPI2C_MSR_MBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)
-#define LPI2C_MSR_BBF_MASK                       (0x2000000U)
-#define LPI2C_MSR_BBF_SHIFT                      (25U)
-#define LPI2C_MSR_BBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)
+#define LPI2C_MSR_TDF_MASK   (0x1U)
+#define LPI2C_MSR_TDF_SHIFT  (0U)
+#define LPI2C_MSR_TDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)
+#define LPI2C_MSR_RDF_MASK   (0x2U)
+#define LPI2C_MSR_RDF_SHIFT  (1U)
+#define LPI2C_MSR_RDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)
+#define LPI2C_MSR_EPF_MASK   (0x100U)
+#define LPI2C_MSR_EPF_SHIFT  (8U)
+#define LPI2C_MSR_EPF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)
+#define LPI2C_MSR_SDF_MASK   (0x200U)
+#define LPI2C_MSR_SDF_SHIFT  (9U)
+#define LPI2C_MSR_SDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)
+#define LPI2C_MSR_NDF_MASK   (0x400U)
+#define LPI2C_MSR_NDF_SHIFT  (10U)
+#define LPI2C_MSR_NDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)
+#define LPI2C_MSR_ALF_MASK   (0x800U)
+#define LPI2C_MSR_ALF_SHIFT  (11U)
+#define LPI2C_MSR_ALF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)
+#define LPI2C_MSR_FEF_MASK   (0x1000U)
+#define LPI2C_MSR_FEF_SHIFT  (12U)
+#define LPI2C_MSR_FEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)
+#define LPI2C_MSR_PLTF_MASK  (0x2000U)
+#define LPI2C_MSR_PLTF_SHIFT (13U)
+#define LPI2C_MSR_PLTF(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)
+#define LPI2C_MSR_DMF_MASK   (0x4000U)
+#define LPI2C_MSR_DMF_SHIFT  (14U)
+#define LPI2C_MSR_DMF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)
+#define LPI2C_MSR_MBF_MASK   (0x1000000U)
+#define LPI2C_MSR_MBF_SHIFT  (24U)
+#define LPI2C_MSR_MBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)
+#define LPI2C_MSR_BBF_MASK   (0x2000000U)
+#define LPI2C_MSR_BBF_SHIFT  (25U)
+#define LPI2C_MSR_BBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)
 /*! @} */
 
 /*! @name MIER - Master Interrupt Enable Register */
 /*! @{ */
-#define LPI2C_MIER_TDIE_MASK                     (0x1U)
-#define LPI2C_MIER_TDIE_SHIFT                    (0U)
-#define LPI2C_MIER_TDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)
-#define LPI2C_MIER_RDIE_MASK                     (0x2U)
-#define LPI2C_MIER_RDIE_SHIFT                    (1U)
-#define LPI2C_MIER_RDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)
-#define LPI2C_MIER_EPIE_MASK                     (0x100U)
-#define LPI2C_MIER_EPIE_SHIFT                    (8U)
-#define LPI2C_MIER_EPIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)
-#define LPI2C_MIER_SDIE_MASK                     (0x200U)
-#define LPI2C_MIER_SDIE_SHIFT                    (9U)
-#define LPI2C_MIER_SDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)
-#define LPI2C_MIER_NDIE_MASK                     (0x400U)
-#define LPI2C_MIER_NDIE_SHIFT                    (10U)
-#define LPI2C_MIER_NDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)
-#define LPI2C_MIER_ALIE_MASK                     (0x800U)
-#define LPI2C_MIER_ALIE_SHIFT                    (11U)
-#define LPI2C_MIER_ALIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)
-#define LPI2C_MIER_FEIE_MASK                     (0x1000U)
-#define LPI2C_MIER_FEIE_SHIFT                    (12U)
-#define LPI2C_MIER_FEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)
-#define LPI2C_MIER_PLTIE_MASK                    (0x2000U)
-#define LPI2C_MIER_PLTIE_SHIFT                   (13U)
-#define LPI2C_MIER_PLTIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)
-#define LPI2C_MIER_DMIE_MASK                     (0x4000U)
-#define LPI2C_MIER_DMIE_SHIFT                    (14U)
-#define LPI2C_MIER_DMIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)
+#define LPI2C_MIER_TDIE_MASK   (0x1U)
+#define LPI2C_MIER_TDIE_SHIFT  (0U)
+#define LPI2C_MIER_TDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)
+#define LPI2C_MIER_RDIE_MASK   (0x2U)
+#define LPI2C_MIER_RDIE_SHIFT  (1U)
+#define LPI2C_MIER_RDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)
+#define LPI2C_MIER_EPIE_MASK   (0x100U)
+#define LPI2C_MIER_EPIE_SHIFT  (8U)
+#define LPI2C_MIER_EPIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)
+#define LPI2C_MIER_SDIE_MASK   (0x200U)
+#define LPI2C_MIER_SDIE_SHIFT  (9U)
+#define LPI2C_MIER_SDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)
+#define LPI2C_MIER_NDIE_MASK   (0x400U)
+#define LPI2C_MIER_NDIE_SHIFT  (10U)
+#define LPI2C_MIER_NDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)
+#define LPI2C_MIER_ALIE_MASK   (0x800U)
+#define LPI2C_MIER_ALIE_SHIFT  (11U)
+#define LPI2C_MIER_ALIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)
+#define LPI2C_MIER_FEIE_MASK   (0x1000U)
+#define LPI2C_MIER_FEIE_SHIFT  (12U)
+#define LPI2C_MIER_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)
+#define LPI2C_MIER_PLTIE_MASK  (0x2000U)
+#define LPI2C_MIER_PLTIE_SHIFT (13U)
+#define LPI2C_MIER_PLTIE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)
+#define LPI2C_MIER_DMIE_MASK   (0x4000U)
+#define LPI2C_MIER_DMIE_SHIFT  (14U)
+#define LPI2C_MIER_DMIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)
 /*! @} */
 
 /*! @name MDER - Master DMA Enable Register */
 /*! @{ */
-#define LPI2C_MDER_TDDE_MASK                     (0x1U)
-#define LPI2C_MDER_TDDE_SHIFT                    (0U)
-#define LPI2C_MDER_TDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)
-#define LPI2C_MDER_RDDE_MASK                     (0x2U)
-#define LPI2C_MDER_RDDE_SHIFT                    (1U)
-#define LPI2C_MDER_RDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)
+#define LPI2C_MDER_TDDE_MASK  (0x1U)
+#define LPI2C_MDER_TDDE_SHIFT (0U)
+#define LPI2C_MDER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)
+#define LPI2C_MDER_RDDE_MASK  (0x2U)
+#define LPI2C_MDER_RDDE_SHIFT (1U)
+#define LPI2C_MDER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)
 /*! @} */
 
 /*! @name MCFGR0 - Master Configuration Register 0 */
 /*! @{ */
-#define LPI2C_MCFGR0_HREN_MASK                   (0x1U)
-#define LPI2C_MCFGR0_HREN_SHIFT                  (0U)
-#define LPI2C_MCFGR0_HREN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)
-#define LPI2C_MCFGR0_HRPOL_MASK                  (0x2U)
-#define LPI2C_MCFGR0_HRPOL_SHIFT                 (1U)
-#define LPI2C_MCFGR0_HRPOL(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)
-#define LPI2C_MCFGR0_HRSEL_MASK                  (0x4U)
-#define LPI2C_MCFGR0_HRSEL_SHIFT                 (2U)
-#define LPI2C_MCFGR0_HRSEL(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)
-#define LPI2C_MCFGR0_CIRFIFO_MASK                (0x100U)
-#define LPI2C_MCFGR0_CIRFIFO_SHIFT               (8U)
-#define LPI2C_MCFGR0_CIRFIFO(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)
-#define LPI2C_MCFGR0_RDMO_MASK                   (0x200U)
-#define LPI2C_MCFGR0_RDMO_SHIFT                  (9U)
-#define LPI2C_MCFGR0_RDMO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)
+#define LPI2C_MCFGR0_HREN_MASK     (0x1U)
+#define LPI2C_MCFGR0_HREN_SHIFT    (0U)
+#define LPI2C_MCFGR0_HREN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)
+#define LPI2C_MCFGR0_HRPOL_MASK    (0x2U)
+#define LPI2C_MCFGR0_HRPOL_SHIFT   (1U)
+#define LPI2C_MCFGR0_HRPOL(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)
+#define LPI2C_MCFGR0_HRSEL_MASK    (0x4U)
+#define LPI2C_MCFGR0_HRSEL_SHIFT   (2U)
+#define LPI2C_MCFGR0_HRSEL(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)
+#define LPI2C_MCFGR0_CIRFIFO_MASK  (0x100U)
+#define LPI2C_MCFGR0_CIRFIFO_SHIFT (8U)
+#define LPI2C_MCFGR0_CIRFIFO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)
+#define LPI2C_MCFGR0_RDMO_MASK  (0x200U)
+#define LPI2C_MCFGR0_RDMO_SHIFT (9U)
+#define LPI2C_MCFGR0_RDMO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)
 /*! @} */
 
 /*! @name MCFGR1 - Master Configuration Register 1 */
 /*! @{ */
-#define LPI2C_MCFGR1_PRESCALE_MASK               (0x7U)
-#define LPI2C_MCFGR1_PRESCALE_SHIFT              (0U)
-#define LPI2C_MCFGR1_PRESCALE(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)
-#define LPI2C_MCFGR1_AUTOSTOP_MASK               (0x100U)
-#define LPI2C_MCFGR1_AUTOSTOP_SHIFT              (8U)
-#define LPI2C_MCFGR1_AUTOSTOP(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)
-#define LPI2C_MCFGR1_IGNACK_MASK                 (0x200U)
-#define LPI2C_MCFGR1_IGNACK_SHIFT                (9U)
-#define LPI2C_MCFGR1_IGNACK(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)
-#define LPI2C_MCFGR1_TIMECFG_MASK                (0x400U)
-#define LPI2C_MCFGR1_TIMECFG_SHIFT               (10U)
-#define LPI2C_MCFGR1_TIMECFG(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)
-#define LPI2C_MCFGR1_MATCFG_MASK                 (0x70000U)
-#define LPI2C_MCFGR1_MATCFG_SHIFT                (16U)
-#define LPI2C_MCFGR1_MATCFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)
-#define LPI2C_MCFGR1_PINCFG_MASK                 (0x7000000U)
-#define LPI2C_MCFGR1_PINCFG_SHIFT                (24U)
-#define LPI2C_MCFGR1_PINCFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)
+#define LPI2C_MCFGR1_PRESCALE_MASK  (0x7U)
+#define LPI2C_MCFGR1_PRESCALE_SHIFT (0U)
+#define LPI2C_MCFGR1_PRESCALE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)
+#define LPI2C_MCFGR1_AUTOSTOP_MASK  (0x100U)
+#define LPI2C_MCFGR1_AUTOSTOP_SHIFT (8U)
+#define LPI2C_MCFGR1_AUTOSTOP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)
+#define LPI2C_MCFGR1_IGNACK_MASK   (0x200U)
+#define LPI2C_MCFGR1_IGNACK_SHIFT  (9U)
+#define LPI2C_MCFGR1_IGNACK(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)
+#define LPI2C_MCFGR1_TIMECFG_MASK  (0x400U)
+#define LPI2C_MCFGR1_TIMECFG_SHIFT (10U)
+#define LPI2C_MCFGR1_TIMECFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)
+#define LPI2C_MCFGR1_MATCFG_MASK  (0x70000U)
+#define LPI2C_MCFGR1_MATCFG_SHIFT (16U)
+#define LPI2C_MCFGR1_MATCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)
+#define LPI2C_MCFGR1_PINCFG_MASK  (0x7000000U)
+#define LPI2C_MCFGR1_PINCFG_SHIFT (24U)
+#define LPI2C_MCFGR1_PINCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)
 /*! @} */
 
 /*! @name MCFGR2 - Master Configuration Register 2 */
 /*! @{ */
-#define LPI2C_MCFGR2_BUSIDLE_MASK                (0xFFFU)
-#define LPI2C_MCFGR2_BUSIDLE_SHIFT               (0U)
-#define LPI2C_MCFGR2_BUSIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)
-#define LPI2C_MCFGR2_FILTSCL_MASK                (0xF0000U)
-#define LPI2C_MCFGR2_FILTSCL_SHIFT               (16U)
-#define LPI2C_MCFGR2_FILTSCL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)
-#define LPI2C_MCFGR2_FILTSDA_MASK                (0xF000000U)
-#define LPI2C_MCFGR2_FILTSDA_SHIFT               (24U)
-#define LPI2C_MCFGR2_FILTSDA(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)
+#define LPI2C_MCFGR2_BUSIDLE_MASK  (0xFFFU)
+#define LPI2C_MCFGR2_BUSIDLE_SHIFT (0U)
+#define LPI2C_MCFGR2_BUSIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)
+#define LPI2C_MCFGR2_FILTSCL_MASK  (0xF0000U)
+#define LPI2C_MCFGR2_FILTSCL_SHIFT (16U)
+#define LPI2C_MCFGR2_FILTSCL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)
+#define LPI2C_MCFGR2_FILTSDA_MASK  (0xF000000U)
+#define LPI2C_MCFGR2_FILTSDA_SHIFT (24U)
+#define LPI2C_MCFGR2_FILTSDA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)
 /*! @} */
 
 /*! @name MCFGR3 - Master Configuration Register 3 */
 /*! @{ */
-#define LPI2C_MCFGR3_PINLOW_MASK                 (0xFFF00U)
-#define LPI2C_MCFGR3_PINLOW_SHIFT                (8U)
-#define LPI2C_MCFGR3_PINLOW(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)
+#define LPI2C_MCFGR3_PINLOW_MASK  (0xFFF00U)
+#define LPI2C_MCFGR3_PINLOW_SHIFT (8U)
+#define LPI2C_MCFGR3_PINLOW(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)
 /*! @} */
 
 /*! @name MDMR - Master Data Match Register */
 /*! @{ */
-#define LPI2C_MDMR_MATCH0_MASK                   (0xFFU)
-#define LPI2C_MDMR_MATCH0_SHIFT                  (0U)
-#define LPI2C_MDMR_MATCH0(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)
-#define LPI2C_MDMR_MATCH1_MASK                   (0xFF0000U)
-#define LPI2C_MDMR_MATCH1_SHIFT                  (16U)
-#define LPI2C_MDMR_MATCH1(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)
+#define LPI2C_MDMR_MATCH0_MASK  (0xFFU)
+#define LPI2C_MDMR_MATCH0_SHIFT (0U)
+#define LPI2C_MDMR_MATCH0(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)
+#define LPI2C_MDMR_MATCH1_MASK  (0xFF0000U)
+#define LPI2C_MDMR_MATCH1_SHIFT (16U)
+#define LPI2C_MDMR_MATCH1(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)
 /*! @} */
 
 /*! @name MCCR0 - Master Clock Configuration Register 0 */
 /*! @{ */
-#define LPI2C_MCCR0_CLKLO_MASK                   (0x3FU)
-#define LPI2C_MCCR0_CLKLO_SHIFT                  (0U)
-#define LPI2C_MCCR0_CLKLO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)
-#define LPI2C_MCCR0_CLKHI_MASK                   (0x3F00U)
-#define LPI2C_MCCR0_CLKHI_SHIFT                  (8U)
-#define LPI2C_MCCR0_CLKHI(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)
-#define LPI2C_MCCR0_SETHOLD_MASK                 (0x3F0000U)
-#define LPI2C_MCCR0_SETHOLD_SHIFT                (16U)
-#define LPI2C_MCCR0_SETHOLD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)
-#define LPI2C_MCCR0_DATAVD_MASK                  (0x3F000000U)
-#define LPI2C_MCCR0_DATAVD_SHIFT                 (24U)
-#define LPI2C_MCCR0_DATAVD(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)
+#define LPI2C_MCCR0_CLKLO_MASK    (0x3FU)
+#define LPI2C_MCCR0_CLKLO_SHIFT   (0U)
+#define LPI2C_MCCR0_CLKLO(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)
+#define LPI2C_MCCR0_CLKHI_MASK    (0x3F00U)
+#define LPI2C_MCCR0_CLKHI_SHIFT   (8U)
+#define LPI2C_MCCR0_CLKHI(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)
+#define LPI2C_MCCR0_SETHOLD_MASK  (0x3F0000U)
+#define LPI2C_MCCR0_SETHOLD_SHIFT (16U)
+#define LPI2C_MCCR0_SETHOLD(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)
+#define LPI2C_MCCR0_DATAVD_MASK   (0x3F000000U)
+#define LPI2C_MCCR0_DATAVD_SHIFT  (24U)
+#define LPI2C_MCCR0_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)
 /*! @} */
 
 /*! @name MCCR1 - Master Clock Configuration Register 1 */
 /*! @{ */
-#define LPI2C_MCCR1_CLKLO_MASK                   (0x3FU)
-#define LPI2C_MCCR1_CLKLO_SHIFT                  (0U)
-#define LPI2C_MCCR1_CLKLO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)
-#define LPI2C_MCCR1_CLKHI_MASK                   (0x3F00U)
-#define LPI2C_MCCR1_CLKHI_SHIFT                  (8U)
-#define LPI2C_MCCR1_CLKHI(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)
-#define LPI2C_MCCR1_SETHOLD_MASK                 (0x3F0000U)
-#define LPI2C_MCCR1_SETHOLD_SHIFT                (16U)
-#define LPI2C_MCCR1_SETHOLD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
-#define LPI2C_MCCR1_DATAVD_MASK                  (0x3F000000U)
-#define LPI2C_MCCR1_DATAVD_SHIFT                 (24U)
-#define LPI2C_MCCR1_DATAVD(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)
+#define LPI2C_MCCR1_CLKLO_MASK    (0x3FU)
+#define LPI2C_MCCR1_CLKLO_SHIFT   (0U)
+#define LPI2C_MCCR1_CLKLO(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)
+#define LPI2C_MCCR1_CLKHI_MASK    (0x3F00U)
+#define LPI2C_MCCR1_CLKHI_SHIFT   (8U)
+#define LPI2C_MCCR1_CLKHI(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)
+#define LPI2C_MCCR1_SETHOLD_MASK  (0x3F0000U)
+#define LPI2C_MCCR1_SETHOLD_SHIFT (16U)
+#define LPI2C_MCCR1_SETHOLD(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
+#define LPI2C_MCCR1_DATAVD_MASK   (0x3F000000U)
+#define LPI2C_MCCR1_DATAVD_SHIFT  (24U)
+#define LPI2C_MCCR1_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)
 /*! @} */
 
 /*! @name MFCR - Master FIFO Control Register */
 /*! @{ */
-#define LPI2C_MFCR_TXWATER_MASK                  (0x3U)
-#define LPI2C_MFCR_TXWATER_SHIFT                 (0U)
-#define LPI2C_MFCR_TXWATER(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)
-#define LPI2C_MFCR_RXWATER_MASK                  (0x30000U)
-#define LPI2C_MFCR_RXWATER_SHIFT                 (16U)
-#define LPI2C_MFCR_RXWATER(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)
+#define LPI2C_MFCR_TXWATER_MASK  (0x3U)
+#define LPI2C_MFCR_TXWATER_SHIFT (0U)
+#define LPI2C_MFCR_TXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)
+#define LPI2C_MFCR_RXWATER_MASK  (0x30000U)
+#define LPI2C_MFCR_RXWATER_SHIFT (16U)
+#define LPI2C_MFCR_RXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)
 /*! @} */
 
 /*! @name MFSR - Master FIFO Status Register */
 /*! @{ */
-#define LPI2C_MFSR_TXCOUNT_MASK                  (0x7U)
-#define LPI2C_MFSR_TXCOUNT_SHIFT                 (0U)
-#define LPI2C_MFSR_TXCOUNT(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)
-#define LPI2C_MFSR_RXCOUNT_MASK                  (0x70000U)
-#define LPI2C_MFSR_RXCOUNT_SHIFT                 (16U)
-#define LPI2C_MFSR_RXCOUNT(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)
+#define LPI2C_MFSR_TXCOUNT_MASK  (0x7U)
+#define LPI2C_MFSR_TXCOUNT_SHIFT (0U)
+#define LPI2C_MFSR_TXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)
+#define LPI2C_MFSR_RXCOUNT_MASK  (0x70000U)
+#define LPI2C_MFSR_RXCOUNT_SHIFT (16U)
+#define LPI2C_MFSR_RXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)
 /*! @} */
 
 /*! @name MTDR - Master Transmit Data Register */
 /*! @{ */
-#define LPI2C_MTDR_DATA_MASK                     (0xFFU)
-#define LPI2C_MTDR_DATA_SHIFT                    (0U)
-#define LPI2C_MTDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)
-#define LPI2C_MTDR_CMD_MASK                      (0x700U)
-#define LPI2C_MTDR_CMD_SHIFT                     (8U)
-#define LPI2C_MTDR_CMD(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)
+#define LPI2C_MTDR_DATA_MASK  (0xFFU)
+#define LPI2C_MTDR_DATA_SHIFT (0U)
+#define LPI2C_MTDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)
+#define LPI2C_MTDR_CMD_MASK   (0x700U)
+#define LPI2C_MTDR_CMD_SHIFT  (8U)
+#define LPI2C_MTDR_CMD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)
 /*! @} */
 
 /*! @name MRDR - Master Receive Data Register */
 /*! @{ */
-#define LPI2C_MRDR_DATA_MASK                     (0xFFU)
-#define LPI2C_MRDR_DATA_SHIFT                    (0U)
-#define LPI2C_MRDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)
-#define LPI2C_MRDR_RXEMPTY_MASK                  (0x4000U)
-#define LPI2C_MRDR_RXEMPTY_SHIFT                 (14U)
-#define LPI2C_MRDR_RXEMPTY(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)
+#define LPI2C_MRDR_DATA_MASK     (0xFFU)
+#define LPI2C_MRDR_DATA_SHIFT    (0U)
+#define LPI2C_MRDR_DATA(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)
+#define LPI2C_MRDR_RXEMPTY_MASK  (0x4000U)
+#define LPI2C_MRDR_RXEMPTY_SHIFT (14U)
+#define LPI2C_MRDR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)
 /*! @} */
 
 /*! @name SCR - Slave Control Register */
 /*! @{ */
-#define LPI2C_SCR_SEN_MASK                       (0x1U)
-#define LPI2C_SCR_SEN_SHIFT                      (0U)
-#define LPI2C_SCR_SEN(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)
-#define LPI2C_SCR_RST_MASK                       (0x2U)
-#define LPI2C_SCR_RST_SHIFT                      (1U)
-#define LPI2C_SCR_RST(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)
-#define LPI2C_SCR_FILTEN_MASK                    (0x10U)
-#define LPI2C_SCR_FILTEN_SHIFT                   (4U)
-#define LPI2C_SCR_FILTEN(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)
-#define LPI2C_SCR_FILTDZ_MASK                    (0x20U)
-#define LPI2C_SCR_FILTDZ_SHIFT                   (5U)
-#define LPI2C_SCR_FILTDZ(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)
-#define LPI2C_SCR_RTF_MASK                       (0x100U)
-#define LPI2C_SCR_RTF_SHIFT                      (8U)
-#define LPI2C_SCR_RTF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)
-#define LPI2C_SCR_RRF_MASK                       (0x200U)
-#define LPI2C_SCR_RRF_SHIFT                      (9U)
-#define LPI2C_SCR_RRF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)
+#define LPI2C_SCR_SEN_MASK     (0x1U)
+#define LPI2C_SCR_SEN_SHIFT    (0U)
+#define LPI2C_SCR_SEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)
+#define LPI2C_SCR_RST_MASK     (0x2U)
+#define LPI2C_SCR_RST_SHIFT    (1U)
+#define LPI2C_SCR_RST(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)
+#define LPI2C_SCR_FILTEN_MASK  (0x10U)
+#define LPI2C_SCR_FILTEN_SHIFT (4U)
+#define LPI2C_SCR_FILTEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)
+#define LPI2C_SCR_FILTDZ_MASK  (0x20U)
+#define LPI2C_SCR_FILTDZ_SHIFT (5U)
+#define LPI2C_SCR_FILTDZ(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)
+#define LPI2C_SCR_RTF_MASK     (0x100U)
+#define LPI2C_SCR_RTF_SHIFT    (8U)
+#define LPI2C_SCR_RTF(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)
+#define LPI2C_SCR_RRF_MASK     (0x200U)
+#define LPI2C_SCR_RRF_SHIFT    (9U)
+#define LPI2C_SCR_RRF(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)
 /*! @} */
 
 /*! @name SSR - Slave Status Register */
 /*! @{ */
-#define LPI2C_SSR_TDF_MASK                       (0x1U)
-#define LPI2C_SSR_TDF_SHIFT                      (0U)
-#define LPI2C_SSR_TDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)
-#define LPI2C_SSR_RDF_MASK                       (0x2U)
-#define LPI2C_SSR_RDF_SHIFT                      (1U)
-#define LPI2C_SSR_RDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)
-#define LPI2C_SSR_AVF_MASK                       (0x4U)
-#define LPI2C_SSR_AVF_SHIFT                      (2U)
-#define LPI2C_SSR_AVF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)
-#define LPI2C_SSR_TAF_MASK                       (0x8U)
-#define LPI2C_SSR_TAF_SHIFT                      (3U)
-#define LPI2C_SSR_TAF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)
-#define LPI2C_SSR_RSF_MASK                       (0x100U)
-#define LPI2C_SSR_RSF_SHIFT                      (8U)
-#define LPI2C_SSR_RSF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)
-#define LPI2C_SSR_SDF_MASK                       (0x200U)
-#define LPI2C_SSR_SDF_SHIFT                      (9U)
-#define LPI2C_SSR_SDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)
-#define LPI2C_SSR_BEF_MASK                       (0x400U)
-#define LPI2C_SSR_BEF_SHIFT                      (10U)
-#define LPI2C_SSR_BEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)
-#define LPI2C_SSR_FEF_MASK                       (0x800U)
-#define LPI2C_SSR_FEF_SHIFT                      (11U)
-#define LPI2C_SSR_FEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)
-#define LPI2C_SSR_AM0F_MASK                      (0x1000U)
-#define LPI2C_SSR_AM0F_SHIFT                     (12U)
-#define LPI2C_SSR_AM0F(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)
-#define LPI2C_SSR_AM1F_MASK                      (0x2000U)
-#define LPI2C_SSR_AM1F_SHIFT                     (13U)
-#define LPI2C_SSR_AM1F(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)
-#define LPI2C_SSR_GCF_MASK                       (0x4000U)
-#define LPI2C_SSR_GCF_SHIFT                      (14U)
-#define LPI2C_SSR_GCF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)
-#define LPI2C_SSR_SARF_MASK                      (0x8000U)
-#define LPI2C_SSR_SARF_SHIFT                     (15U)
-#define LPI2C_SSR_SARF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)
-#define LPI2C_SSR_SBF_MASK                       (0x1000000U)
-#define LPI2C_SSR_SBF_SHIFT                      (24U)
-#define LPI2C_SSR_SBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)
-#define LPI2C_SSR_BBF_MASK                       (0x2000000U)
-#define LPI2C_SSR_BBF_SHIFT                      (25U)
-#define LPI2C_SSR_BBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)
+#define LPI2C_SSR_TDF_MASK   (0x1U)
+#define LPI2C_SSR_TDF_SHIFT  (0U)
+#define LPI2C_SSR_TDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)
+#define LPI2C_SSR_RDF_MASK   (0x2U)
+#define LPI2C_SSR_RDF_SHIFT  (1U)
+#define LPI2C_SSR_RDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)
+#define LPI2C_SSR_AVF_MASK   (0x4U)
+#define LPI2C_SSR_AVF_SHIFT  (2U)
+#define LPI2C_SSR_AVF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)
+#define LPI2C_SSR_TAF_MASK   (0x8U)
+#define LPI2C_SSR_TAF_SHIFT  (3U)
+#define LPI2C_SSR_TAF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)
+#define LPI2C_SSR_RSF_MASK   (0x100U)
+#define LPI2C_SSR_RSF_SHIFT  (8U)
+#define LPI2C_SSR_RSF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)
+#define LPI2C_SSR_SDF_MASK   (0x200U)
+#define LPI2C_SSR_SDF_SHIFT  (9U)
+#define LPI2C_SSR_SDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)
+#define LPI2C_SSR_BEF_MASK   (0x400U)
+#define LPI2C_SSR_BEF_SHIFT  (10U)
+#define LPI2C_SSR_BEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)
+#define LPI2C_SSR_FEF_MASK   (0x800U)
+#define LPI2C_SSR_FEF_SHIFT  (11U)
+#define LPI2C_SSR_FEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)
+#define LPI2C_SSR_AM0F_MASK  (0x1000U)
+#define LPI2C_SSR_AM0F_SHIFT (12U)
+#define LPI2C_SSR_AM0F(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)
+#define LPI2C_SSR_AM1F_MASK  (0x2000U)
+#define LPI2C_SSR_AM1F_SHIFT (13U)
+#define LPI2C_SSR_AM1F(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)
+#define LPI2C_SSR_GCF_MASK   (0x4000U)
+#define LPI2C_SSR_GCF_SHIFT  (14U)
+#define LPI2C_SSR_GCF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)
+#define LPI2C_SSR_SARF_MASK  (0x8000U)
+#define LPI2C_SSR_SARF_SHIFT (15U)
+#define LPI2C_SSR_SARF(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)
+#define LPI2C_SSR_SBF_MASK   (0x1000000U)
+#define LPI2C_SSR_SBF_SHIFT  (24U)
+#define LPI2C_SSR_SBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)
+#define LPI2C_SSR_BBF_MASK   (0x2000000U)
+#define LPI2C_SSR_BBF_SHIFT  (25U)
+#define LPI2C_SSR_BBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)
 /*! @} */
 
 /*! @name SIER - Slave Interrupt Enable Register */
 /*! @{ */
-#define LPI2C_SIER_TDIE_MASK                     (0x1U)
-#define LPI2C_SIER_TDIE_SHIFT                    (0U)
-#define LPI2C_SIER_TDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)
-#define LPI2C_SIER_RDIE_MASK                     (0x2U)
-#define LPI2C_SIER_RDIE_SHIFT                    (1U)
-#define LPI2C_SIER_RDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)
-#define LPI2C_SIER_AVIE_MASK                     (0x4U)
-#define LPI2C_SIER_AVIE_SHIFT                    (2U)
-#define LPI2C_SIER_AVIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)
-#define LPI2C_SIER_TAIE_MASK                     (0x8U)
-#define LPI2C_SIER_TAIE_SHIFT                    (3U)
-#define LPI2C_SIER_TAIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)
-#define LPI2C_SIER_RSIE_MASK                     (0x100U)
-#define LPI2C_SIER_RSIE_SHIFT                    (8U)
-#define LPI2C_SIER_RSIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)
-#define LPI2C_SIER_SDIE_MASK                     (0x200U)
-#define LPI2C_SIER_SDIE_SHIFT                    (9U)
-#define LPI2C_SIER_SDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)
-#define LPI2C_SIER_BEIE_MASK                     (0x400U)
-#define LPI2C_SIER_BEIE_SHIFT                    (10U)
-#define LPI2C_SIER_BEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)
-#define LPI2C_SIER_FEIE_MASK                     (0x800U)
-#define LPI2C_SIER_FEIE_SHIFT                    (11U)
-#define LPI2C_SIER_FEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)
-#define LPI2C_SIER_AM0IE_MASK                    (0x1000U)
-#define LPI2C_SIER_AM0IE_SHIFT                   (12U)
-#define LPI2C_SIER_AM0IE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)
-#define LPI2C_SIER_AM1F_MASK                     (0x2000U)
-#define LPI2C_SIER_AM1F_SHIFT                    (13U)
-#define LPI2C_SIER_AM1F(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)
-#define LPI2C_SIER_GCIE_MASK                     (0x4000U)
-#define LPI2C_SIER_GCIE_SHIFT                    (14U)
-#define LPI2C_SIER_GCIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)
-#define LPI2C_SIER_SARIE_MASK                    (0x8000U)
-#define LPI2C_SIER_SARIE_SHIFT                   (15U)
-#define LPI2C_SIER_SARIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)
+#define LPI2C_SIER_TDIE_MASK   (0x1U)
+#define LPI2C_SIER_TDIE_SHIFT  (0U)
+#define LPI2C_SIER_TDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)
+#define LPI2C_SIER_RDIE_MASK   (0x2U)
+#define LPI2C_SIER_RDIE_SHIFT  (1U)
+#define LPI2C_SIER_RDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)
+#define LPI2C_SIER_AVIE_MASK   (0x4U)
+#define LPI2C_SIER_AVIE_SHIFT  (2U)
+#define LPI2C_SIER_AVIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)
+#define LPI2C_SIER_TAIE_MASK   (0x8U)
+#define LPI2C_SIER_TAIE_SHIFT  (3U)
+#define LPI2C_SIER_TAIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)
+#define LPI2C_SIER_RSIE_MASK   (0x100U)
+#define LPI2C_SIER_RSIE_SHIFT  (8U)
+#define LPI2C_SIER_RSIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)
+#define LPI2C_SIER_SDIE_MASK   (0x200U)
+#define LPI2C_SIER_SDIE_SHIFT  (9U)
+#define LPI2C_SIER_SDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)
+#define LPI2C_SIER_BEIE_MASK   (0x400U)
+#define LPI2C_SIER_BEIE_SHIFT  (10U)
+#define LPI2C_SIER_BEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)
+#define LPI2C_SIER_FEIE_MASK   (0x800U)
+#define LPI2C_SIER_FEIE_SHIFT  (11U)
+#define LPI2C_SIER_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)
+#define LPI2C_SIER_AM0IE_MASK  (0x1000U)
+#define LPI2C_SIER_AM0IE_SHIFT (12U)
+#define LPI2C_SIER_AM0IE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)
+#define LPI2C_SIER_AM1F_MASK   (0x2000U)
+#define LPI2C_SIER_AM1F_SHIFT  (13U)
+#define LPI2C_SIER_AM1F(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)
+#define LPI2C_SIER_GCIE_MASK   (0x4000U)
+#define LPI2C_SIER_GCIE_SHIFT  (14U)
+#define LPI2C_SIER_GCIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)
+#define LPI2C_SIER_SARIE_MASK  (0x8000U)
+#define LPI2C_SIER_SARIE_SHIFT (15U)
+#define LPI2C_SIER_SARIE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)
 /*! @} */
 
 /*! @name SDER - Slave DMA Enable Register */
 /*! @{ */
-#define LPI2C_SDER_TDDE_MASK                     (0x1U)
-#define LPI2C_SDER_TDDE_SHIFT                    (0U)
-#define LPI2C_SDER_TDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)
-#define LPI2C_SDER_RDDE_MASK                     (0x2U)
-#define LPI2C_SDER_RDDE_SHIFT                    (1U)
-#define LPI2C_SDER_RDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)
-#define LPI2C_SDER_AVDE_MASK                     (0x4U)
-#define LPI2C_SDER_AVDE_SHIFT                    (2U)
-#define LPI2C_SDER_AVDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)
+#define LPI2C_SDER_TDDE_MASK  (0x1U)
+#define LPI2C_SDER_TDDE_SHIFT (0U)
+#define LPI2C_SDER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)
+#define LPI2C_SDER_RDDE_MASK  (0x2U)
+#define LPI2C_SDER_RDDE_SHIFT (1U)
+#define LPI2C_SDER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)
+#define LPI2C_SDER_AVDE_MASK  (0x4U)
+#define LPI2C_SDER_AVDE_SHIFT (2U)
+#define LPI2C_SDER_AVDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)
 /*! @} */
 
 /*! @name SCFGR1 - Slave Configuration Register 1 */
 /*! @{ */
-#define LPI2C_SCFGR1_ADRSTALL_MASK               (0x1U)
-#define LPI2C_SCFGR1_ADRSTALL_SHIFT              (0U)
-#define LPI2C_SCFGR1_ADRSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)
-#define LPI2C_SCFGR1_RXSTALL_MASK                (0x2U)
-#define LPI2C_SCFGR1_RXSTALL_SHIFT               (1U)
-#define LPI2C_SCFGR1_RXSTALL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)
-#define LPI2C_SCFGR1_TXDSTALL_MASK               (0x4U)
-#define LPI2C_SCFGR1_TXDSTALL_SHIFT              (2U)
-#define LPI2C_SCFGR1_TXDSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)
-#define LPI2C_SCFGR1_ACKSTALL_MASK               (0x8U)
-#define LPI2C_SCFGR1_ACKSTALL_SHIFT              (3U)
-#define LPI2C_SCFGR1_ACKSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)
-#define LPI2C_SCFGR1_GCEN_MASK                   (0x100U)
-#define LPI2C_SCFGR1_GCEN_SHIFT                  (8U)
-#define LPI2C_SCFGR1_GCEN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)
-#define LPI2C_SCFGR1_SAEN_MASK                   (0x200U)
-#define LPI2C_SCFGR1_SAEN_SHIFT                  (9U)
-#define LPI2C_SCFGR1_SAEN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)
-#define LPI2C_SCFGR1_TXCFG_MASK                  (0x400U)
-#define LPI2C_SCFGR1_TXCFG_SHIFT                 (10U)
-#define LPI2C_SCFGR1_TXCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)
-#define LPI2C_SCFGR1_RXCFG_MASK                  (0x800U)
-#define LPI2C_SCFGR1_RXCFG_SHIFT                 (11U)
-#define LPI2C_SCFGR1_RXCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)
-#define LPI2C_SCFGR1_IGNACK_MASK                 (0x1000U)
-#define LPI2C_SCFGR1_IGNACK_SHIFT                (12U)
-#define LPI2C_SCFGR1_IGNACK(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)
-#define LPI2C_SCFGR1_HSMEN_MASK                  (0x2000U)
-#define LPI2C_SCFGR1_HSMEN_SHIFT                 (13U)
-#define LPI2C_SCFGR1_HSMEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)
-#define LPI2C_SCFGR1_ADDRCFG_MASK                (0x70000U)
-#define LPI2C_SCFGR1_ADDRCFG_SHIFT               (16U)
-#define LPI2C_SCFGR1_ADDRCFG(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)
+#define LPI2C_SCFGR1_ADRSTALL_MASK  (0x1U)
+#define LPI2C_SCFGR1_ADRSTALL_SHIFT (0U)
+#define LPI2C_SCFGR1_ADRSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)
+#define LPI2C_SCFGR1_RXSTALL_MASK  (0x2U)
+#define LPI2C_SCFGR1_RXSTALL_SHIFT (1U)
+#define LPI2C_SCFGR1_RXSTALL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)
+#define LPI2C_SCFGR1_TXDSTALL_MASK  (0x4U)
+#define LPI2C_SCFGR1_TXDSTALL_SHIFT (2U)
+#define LPI2C_SCFGR1_TXDSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)
+#define LPI2C_SCFGR1_ACKSTALL_MASK  (0x8U)
+#define LPI2C_SCFGR1_ACKSTALL_SHIFT (3U)
+#define LPI2C_SCFGR1_ACKSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)
+#define LPI2C_SCFGR1_GCEN_MASK     (0x100U)
+#define LPI2C_SCFGR1_GCEN_SHIFT    (8U)
+#define LPI2C_SCFGR1_GCEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)
+#define LPI2C_SCFGR1_SAEN_MASK     (0x200U)
+#define LPI2C_SCFGR1_SAEN_SHIFT    (9U)
+#define LPI2C_SCFGR1_SAEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)
+#define LPI2C_SCFGR1_TXCFG_MASK    (0x400U)
+#define LPI2C_SCFGR1_TXCFG_SHIFT   (10U)
+#define LPI2C_SCFGR1_TXCFG(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)
+#define LPI2C_SCFGR1_RXCFG_MASK    (0x800U)
+#define LPI2C_SCFGR1_RXCFG_SHIFT   (11U)
+#define LPI2C_SCFGR1_RXCFG(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)
+#define LPI2C_SCFGR1_IGNACK_MASK   (0x1000U)
+#define LPI2C_SCFGR1_IGNACK_SHIFT  (12U)
+#define LPI2C_SCFGR1_IGNACK(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)
+#define LPI2C_SCFGR1_HSMEN_MASK    (0x2000U)
+#define LPI2C_SCFGR1_HSMEN_SHIFT   (13U)
+#define LPI2C_SCFGR1_HSMEN(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)
+#define LPI2C_SCFGR1_ADDRCFG_MASK  (0x70000U)
+#define LPI2C_SCFGR1_ADDRCFG_SHIFT (16U)
+#define LPI2C_SCFGR1_ADDRCFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)
 /*! @} */
 
 /*! @name SCFGR2 - Slave Configuration Register 2 */
 /*! @{ */
-#define LPI2C_SCFGR2_CLKHOLD_MASK                (0xFU)
-#define LPI2C_SCFGR2_CLKHOLD_SHIFT               (0U)
-#define LPI2C_SCFGR2_CLKHOLD(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)
-#define LPI2C_SCFGR2_DATAVD_MASK                 (0x3F00U)
-#define LPI2C_SCFGR2_DATAVD_SHIFT                (8U)
-#define LPI2C_SCFGR2_DATAVD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)
-#define LPI2C_SCFGR2_FILTSCL_MASK                (0xF0000U)
-#define LPI2C_SCFGR2_FILTSCL_SHIFT               (16U)
-#define LPI2C_SCFGR2_FILTSCL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)
-#define LPI2C_SCFGR2_FILTSDA_MASK                (0xF000000U)
-#define LPI2C_SCFGR2_FILTSDA_SHIFT               (24U)
-#define LPI2C_SCFGR2_FILTSDA(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)
+#define LPI2C_SCFGR2_CLKHOLD_MASK  (0xFU)
+#define LPI2C_SCFGR2_CLKHOLD_SHIFT (0U)
+#define LPI2C_SCFGR2_CLKHOLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)
+#define LPI2C_SCFGR2_DATAVD_MASK   (0x3F00U)
+#define LPI2C_SCFGR2_DATAVD_SHIFT  (8U)
+#define LPI2C_SCFGR2_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)
+#define LPI2C_SCFGR2_FILTSCL_MASK  (0xF0000U)
+#define LPI2C_SCFGR2_FILTSCL_SHIFT (16U)
+#define LPI2C_SCFGR2_FILTSCL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)
+#define LPI2C_SCFGR2_FILTSDA_MASK  (0xF000000U)
+#define LPI2C_SCFGR2_FILTSDA_SHIFT (24U)
+#define LPI2C_SCFGR2_FILTSDA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)
 /*! @} */
 
 /*! @name SAMR - Slave Address Match Register */
 /*! @{ */
-#define LPI2C_SAMR_ADDR0_MASK                    (0x7FEU)
-#define LPI2C_SAMR_ADDR0_SHIFT                   (1U)
-#define LPI2C_SAMR_ADDR0(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
-#define LPI2C_SAMR_ADDR1_MASK                    (0x7FE0000U)
-#define LPI2C_SAMR_ADDR1_SHIFT                   (17U)
-#define LPI2C_SAMR_ADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)
+#define LPI2C_SAMR_ADDR0_MASK  (0x7FEU)
+#define LPI2C_SAMR_ADDR0_SHIFT (1U)
+#define LPI2C_SAMR_ADDR0(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
+#define LPI2C_SAMR_ADDR1_MASK  (0x7FE0000U)
+#define LPI2C_SAMR_ADDR1_SHIFT (17U)
+#define LPI2C_SAMR_ADDR1(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)
 /*! @} */
 
 /*! @name SASR - Slave Address Status Register */
 /*! @{ */
-#define LPI2C_SASR_RADDR_MASK                    (0x7FFU)
-#define LPI2C_SASR_RADDR_SHIFT                   (0U)
-#define LPI2C_SASR_RADDR(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)
-#define LPI2C_SASR_ANV_MASK                      (0x4000U)
-#define LPI2C_SASR_ANV_SHIFT                     (14U)
-#define LPI2C_SASR_ANV(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)
+#define LPI2C_SASR_RADDR_MASK  (0x7FFU)
+#define LPI2C_SASR_RADDR_SHIFT (0U)
+#define LPI2C_SASR_RADDR(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)
+#define LPI2C_SASR_ANV_MASK    (0x4000U)
+#define LPI2C_SASR_ANV_SHIFT   (14U)
+#define LPI2C_SASR_ANV(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)
 /*! @} */
 
 /*! @name STAR - Slave Transmit ACK Register */
 /*! @{ */
-#define LPI2C_STAR_TXNACK_MASK                   (0x1U)
-#define LPI2C_STAR_TXNACK_SHIFT                  (0U)
-#define LPI2C_STAR_TXNACK(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)
+#define LPI2C_STAR_TXNACK_MASK  (0x1U)
+#define LPI2C_STAR_TXNACK_SHIFT (0U)
+#define LPI2C_STAR_TXNACK(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)
 /*! @} */
 
 /*! @name STDR - Slave Transmit Data Register */
 /*! @{ */
-#define LPI2C_STDR_DATA_MASK                     (0xFFU)
-#define LPI2C_STDR_DATA_SHIFT                    (0U)
-#define LPI2C_STDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)
+#define LPI2C_STDR_DATA_MASK  (0xFFU)
+#define LPI2C_STDR_DATA_SHIFT (0U)
+#define LPI2C_STDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)
 /*! @} */
 
 /*! @name SRDR - Slave Receive Data Register */
 /*! @{ */
-#define LPI2C_SRDR_DATA_MASK                     (0xFFU)
-#define LPI2C_SRDR_DATA_SHIFT                    (0U)
-#define LPI2C_SRDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)
-#define LPI2C_SRDR_RXEMPTY_MASK                  (0x4000U)
-#define LPI2C_SRDR_RXEMPTY_SHIFT                 (14U)
-#define LPI2C_SRDR_RXEMPTY(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)
-#define LPI2C_SRDR_SOF_MASK                      (0x8000U)
-#define LPI2C_SRDR_SOF_SHIFT                     (15U)
-#define LPI2C_SRDR_SOF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)
+#define LPI2C_SRDR_DATA_MASK     (0xFFU)
+#define LPI2C_SRDR_DATA_SHIFT    (0U)
+#define LPI2C_SRDR_DATA(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)
+#define LPI2C_SRDR_RXEMPTY_MASK  (0x4000U)
+#define LPI2C_SRDR_RXEMPTY_SHIFT (14U)
+#define LPI2C_SRDR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)
+#define LPI2C_SRDR_SOF_MASK      (0x8000U)
+#define LPI2C_SRDR_SOF_SHIFT     (15U)
+#define LPI2C_SRDR_SOF(x)        (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPI2C_Register_Masks */
 
-
 /* LPI2C - Peripheral instance base addresses */
 /** Peripheral LPI2C1 base address */
-#define LPI2C1_BASE                              (0x403F0000u)
+#define LPI2C1_BASE (0x403F0000u)
 /** Peripheral LPI2C1 base pointer */
-#define LPI2C1                                   ((LPI2C_Type *)LPI2C1_BASE)
+#define LPI2C1 ((LPI2C_Type *)LPI2C1_BASE)
 /** Peripheral LPI2C2 base address */
-#define LPI2C2_BASE                              (0x403F4000u)
+#define LPI2C2_BASE (0x403F4000u)
 /** Peripheral LPI2C2 base pointer */
-#define LPI2C2                                   ((LPI2C_Type *)LPI2C2_BASE)
+#define LPI2C2 ((LPI2C_Type *)LPI2C2_BASE)
 /** Peripheral LPI2C3 base address */
-#define LPI2C3_BASE                              (0x403F8000u)
+#define LPI2C3_BASE (0x403F8000u)
 /** Peripheral LPI2C3 base pointer */
-#define LPI2C3                                   ((LPI2C_Type *)LPI2C3_BASE)
+#define LPI2C3 ((LPI2C_Type *)LPI2C3_BASE)
 /** Peripheral LPI2C4 base address */
-#define LPI2C4_BASE                              (0x403FC000u)
+#define LPI2C4_BASE (0x403FC000u)
 /** Peripheral LPI2C4 base pointer */
-#define LPI2C4                                   ((LPI2C_Type *)LPI2C4_BASE)
+#define LPI2C4 ((LPI2C_Type *)LPI2C4_BASE)
 /** Array initializer of LPI2C peripheral base addresses */
-#define LPI2C_BASE_ADDRS                         { 0u, LPI2C1_BASE, LPI2C2_BASE, LPI2C3_BASE, LPI2C4_BASE }
+#define LPI2C_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, LPI2C1_BASE, LPI2C2_BASE, LPI2C3_BASE, LPI2C4_BASE                                                         \
+    }
 /** Array initializer of LPI2C peripheral base pointers */
-#define LPI2C_BASE_PTRS                          { (LPI2C_Type *)0u, LPI2C1, LPI2C2, LPI2C3, LPI2C4 }
+#define LPI2C_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (LPI2C_Type *)0u, LPI2C1, LPI2C2, LPI2C3, LPI2C4                                                               \
+    }
 /** Interrupt vectors for the LPI2C peripheral type */
-#define LPI2C_IRQS                               { NotAvail_IRQn, LPI2C1_IRQn, LPI2C2_IRQn, LPI2C3_IRQn, LPI2C4_IRQn }
+#define LPI2C_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPI2C1_IRQn, LPI2C2_IRQn, LPI2C3_IRQn, LPI2C4_IRQn                                              \
+    }
 
 /*!
  * @}
  */ /* end of group LPI2C_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPSPI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -14320,29 +16512,30 @@ typedef struct {
  */
 
 /** LPSPI - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-       uint8_t RESERVED_0[8];
-  __IO uint32_t CR;                                /**< Control Register, offset: 0x10 */
-  __IO uint32_t SR;                                /**< Status Register, offset: 0x14 */
-  __IO uint32_t IER;                               /**< Interrupt Enable Register, offset: 0x18 */
-  __IO uint32_t DER;                               /**< DMA Enable Register, offset: 0x1C */
-  __IO uint32_t CFGR0;                             /**< Configuration Register 0, offset: 0x20 */
-  __IO uint32_t CFGR1;                             /**< Configuration Register 1, offset: 0x24 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t DMR0;                              /**< Data Match Register 0, offset: 0x30 */
-  __IO uint32_t DMR1;                              /**< Data Match Register 1, offset: 0x34 */
-       uint8_t RESERVED_2[8];
-  __IO uint32_t CCR;                               /**< Clock Configuration Register, offset: 0x40 */
-       uint8_t RESERVED_3[20];
-  __IO uint32_t FCR;                               /**< FIFO Control Register, offset: 0x58 */
-  __I  uint32_t FSR;                               /**< FIFO Status Register, offset: 0x5C */
-  __IO uint32_t TCR;                               /**< Transmit Command Register, offset: 0x60 */
-  __O  uint32_t TDR;                               /**< Transmit Data Register, offset: 0x64 */
-       uint8_t RESERVED_4[8];
-  __I  uint32_t RSR;                               /**< Receive Status Register, offset: 0x70 */
-  __I  uint32_t RDR;                               /**< Receive Data Register, offset: 0x74 */
+typedef struct
+{
+    __I uint32_t VERID; /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM; /**< Parameter Register, offset: 0x4 */
+    uint8_t RESERVED_0[8];
+    __IO uint32_t CR;    /**< Control Register, offset: 0x10 */
+    __IO uint32_t SR;    /**< Status Register, offset: 0x14 */
+    __IO uint32_t IER;   /**< Interrupt Enable Register, offset: 0x18 */
+    __IO uint32_t DER;   /**< DMA Enable Register, offset: 0x1C */
+    __IO uint32_t CFGR0; /**< Configuration Register 0, offset: 0x20 */
+    __IO uint32_t CFGR1; /**< Configuration Register 1, offset: 0x24 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t DMR0; /**< Data Match Register 0, offset: 0x30 */
+    __IO uint32_t DMR1; /**< Data Match Register 1, offset: 0x34 */
+    uint8_t RESERVED_2[8];
+    __IO uint32_t CCR; /**< Clock Configuration Register, offset: 0x40 */
+    uint8_t RESERVED_3[20];
+    __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */
+    __I uint32_t FSR;  /**< FIFO Status Register, offset: 0x5C */
+    __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */
+    __O uint32_t TDR;  /**< Transmit Data Register, offset: 0x64 */
+    uint8_t RESERVED_4[8];
+    __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */
+    __I uint32_t RDR; /**< Receive Data Register, offset: 0x74 */
 } LPSPI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -14356,320 +16549,326 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPSPI_VERID_FEATURE_MASK                 (0xFFFFU)
-#define LPSPI_VERID_FEATURE_SHIFT                (0U)
-#define LPSPI_VERID_FEATURE(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_FEATURE_SHIFT)) & LPSPI_VERID_FEATURE_MASK)
-#define LPSPI_VERID_MINOR_MASK                   (0xFF0000U)
-#define LPSPI_VERID_MINOR_SHIFT                  (16U)
-#define LPSPI_VERID_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MINOR_SHIFT)) & LPSPI_VERID_MINOR_MASK)
-#define LPSPI_VERID_MAJOR_MASK                   (0xFF000000U)
-#define LPSPI_VERID_MAJOR_SHIFT                  (24U)
-#define LPSPI_VERID_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MAJOR_SHIFT)) & LPSPI_VERID_MAJOR_MASK)
+#define LPSPI_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPSPI_VERID_FEATURE_SHIFT (0U)
+#define LPSPI_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_FEATURE_SHIFT)) & LPSPI_VERID_FEATURE_MASK)
+#define LPSPI_VERID_MINOR_MASK    (0xFF0000U)
+#define LPSPI_VERID_MINOR_SHIFT   (16U)
+#define LPSPI_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MINOR_SHIFT)) & LPSPI_VERID_MINOR_MASK)
+#define LPSPI_VERID_MAJOR_MASK    (0xFF000000U)
+#define LPSPI_VERID_MAJOR_SHIFT   (24U)
+#define LPSPI_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MAJOR_SHIFT)) & LPSPI_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPSPI_PARAM_TXFIFO_MASK                  (0xFFU)
-#define LPSPI_PARAM_TXFIFO_SHIFT                 (0U)
-#define LPSPI_PARAM_TXFIFO(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_TXFIFO_SHIFT)) & LPSPI_PARAM_TXFIFO_MASK)
-#define LPSPI_PARAM_RXFIFO_MASK                  (0xFF00U)
-#define LPSPI_PARAM_RXFIFO_SHIFT                 (8U)
-#define LPSPI_PARAM_RXFIFO(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_RXFIFO_SHIFT)) & LPSPI_PARAM_RXFIFO_MASK)
-#define LPSPI_PARAM_PCSNUM_MASK                  (0xFF0000U)
-#define LPSPI_PARAM_PCSNUM_SHIFT                 (16U)
-#define LPSPI_PARAM_PCSNUM(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_PCSNUM_SHIFT)) & LPSPI_PARAM_PCSNUM_MASK)
+#define LPSPI_PARAM_TXFIFO_MASK  (0xFFU)
+#define LPSPI_PARAM_TXFIFO_SHIFT (0U)
+#define LPSPI_PARAM_TXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_TXFIFO_SHIFT)) & LPSPI_PARAM_TXFIFO_MASK)
+#define LPSPI_PARAM_RXFIFO_MASK  (0xFF00U)
+#define LPSPI_PARAM_RXFIFO_SHIFT (8U)
+#define LPSPI_PARAM_RXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_RXFIFO_SHIFT)) & LPSPI_PARAM_RXFIFO_MASK)
+#define LPSPI_PARAM_PCSNUM_MASK  (0xFF0000U)
+#define LPSPI_PARAM_PCSNUM_SHIFT (16U)
+#define LPSPI_PARAM_PCSNUM(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_PCSNUM_SHIFT)) & LPSPI_PARAM_PCSNUM_MASK)
 /*! @} */
 
 /*! @name CR - Control Register */
 /*! @{ */
-#define LPSPI_CR_MEN_MASK                        (0x1U)
-#define LPSPI_CR_MEN_SHIFT                       (0U)
-#define LPSPI_CR_MEN(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_MEN_SHIFT)) & LPSPI_CR_MEN_MASK)
-#define LPSPI_CR_RST_MASK                        (0x2U)
-#define LPSPI_CR_RST_SHIFT                       (1U)
-#define LPSPI_CR_RST(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RST_SHIFT)) & LPSPI_CR_RST_MASK)
-#define LPSPI_CR_DOZEN_MASK                      (0x4U)
-#define LPSPI_CR_DOZEN_SHIFT                     (2U)
-#define LPSPI_CR_DOZEN(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DOZEN_SHIFT)) & LPSPI_CR_DOZEN_MASK)
-#define LPSPI_CR_DBGEN_MASK                      (0x8U)
-#define LPSPI_CR_DBGEN_SHIFT                     (3U)
-#define LPSPI_CR_DBGEN(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DBGEN_SHIFT)) & LPSPI_CR_DBGEN_MASK)
-#define LPSPI_CR_RTF_MASK                        (0x100U)
-#define LPSPI_CR_RTF_SHIFT                       (8U)
-#define LPSPI_CR_RTF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RTF_SHIFT)) & LPSPI_CR_RTF_MASK)
-#define LPSPI_CR_RRF_MASK                        (0x200U)
-#define LPSPI_CR_RRF_SHIFT                       (9U)
-#define LPSPI_CR_RRF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RRF_SHIFT)) & LPSPI_CR_RRF_MASK)
+#define LPSPI_CR_MEN_MASK    (0x1U)
+#define LPSPI_CR_MEN_SHIFT   (0U)
+#define LPSPI_CR_MEN(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_MEN_SHIFT)) & LPSPI_CR_MEN_MASK)
+#define LPSPI_CR_RST_MASK    (0x2U)
+#define LPSPI_CR_RST_SHIFT   (1U)
+#define LPSPI_CR_RST(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RST_SHIFT)) & LPSPI_CR_RST_MASK)
+#define LPSPI_CR_DOZEN_MASK  (0x4U)
+#define LPSPI_CR_DOZEN_SHIFT (2U)
+#define LPSPI_CR_DOZEN(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DOZEN_SHIFT)) & LPSPI_CR_DOZEN_MASK)
+#define LPSPI_CR_DBGEN_MASK  (0x8U)
+#define LPSPI_CR_DBGEN_SHIFT (3U)
+#define LPSPI_CR_DBGEN(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DBGEN_SHIFT)) & LPSPI_CR_DBGEN_MASK)
+#define LPSPI_CR_RTF_MASK    (0x100U)
+#define LPSPI_CR_RTF_SHIFT   (8U)
+#define LPSPI_CR_RTF(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RTF_SHIFT)) & LPSPI_CR_RTF_MASK)
+#define LPSPI_CR_RRF_MASK    (0x200U)
+#define LPSPI_CR_RRF_SHIFT   (9U)
+#define LPSPI_CR_RRF(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RRF_SHIFT)) & LPSPI_CR_RRF_MASK)
 /*! @} */
 
 /*! @name SR - Status Register */
 /*! @{ */
-#define LPSPI_SR_TDF_MASK                        (0x1U)
-#define LPSPI_SR_TDF_SHIFT                       (0U)
-#define LPSPI_SR_TDF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TDF_SHIFT)) & LPSPI_SR_TDF_MASK)
-#define LPSPI_SR_RDF_MASK                        (0x2U)
-#define LPSPI_SR_RDF_SHIFT                       (1U)
-#define LPSPI_SR_RDF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_RDF_SHIFT)) & LPSPI_SR_RDF_MASK)
-#define LPSPI_SR_WCF_MASK                        (0x100U)
-#define LPSPI_SR_WCF_SHIFT                       (8U)
-#define LPSPI_SR_WCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_WCF_SHIFT)) & LPSPI_SR_WCF_MASK)
-#define LPSPI_SR_FCF_MASK                        (0x200U)
-#define LPSPI_SR_FCF_SHIFT                       (9U)
-#define LPSPI_SR_FCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_FCF_SHIFT)) & LPSPI_SR_FCF_MASK)
-#define LPSPI_SR_TCF_MASK                        (0x400U)
-#define LPSPI_SR_TCF_SHIFT                       (10U)
-#define LPSPI_SR_TCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TCF_SHIFT)) & LPSPI_SR_TCF_MASK)
-#define LPSPI_SR_TEF_MASK                        (0x800U)
-#define LPSPI_SR_TEF_SHIFT                       (11U)
-#define LPSPI_SR_TEF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TEF_SHIFT)) & LPSPI_SR_TEF_MASK)
-#define LPSPI_SR_REF_MASK                        (0x1000U)
-#define LPSPI_SR_REF_SHIFT                       (12U)
-#define LPSPI_SR_REF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_REF_SHIFT)) & LPSPI_SR_REF_MASK)
-#define LPSPI_SR_DMF_MASK                        (0x2000U)
-#define LPSPI_SR_DMF_SHIFT                       (13U)
-#define LPSPI_SR_DMF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_DMF_SHIFT)) & LPSPI_SR_DMF_MASK)
-#define LPSPI_SR_MBF_MASK                        (0x1000000U)
-#define LPSPI_SR_MBF_SHIFT                       (24U)
-#define LPSPI_SR_MBF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_MBF_SHIFT)) & LPSPI_SR_MBF_MASK)
+#define LPSPI_SR_TDF_MASK  (0x1U)
+#define LPSPI_SR_TDF_SHIFT (0U)
+#define LPSPI_SR_TDF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TDF_SHIFT)) & LPSPI_SR_TDF_MASK)
+#define LPSPI_SR_RDF_MASK  (0x2U)
+#define LPSPI_SR_RDF_SHIFT (1U)
+#define LPSPI_SR_RDF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_RDF_SHIFT)) & LPSPI_SR_RDF_MASK)
+#define LPSPI_SR_WCF_MASK  (0x100U)
+#define LPSPI_SR_WCF_SHIFT (8U)
+#define LPSPI_SR_WCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_WCF_SHIFT)) & LPSPI_SR_WCF_MASK)
+#define LPSPI_SR_FCF_MASK  (0x200U)
+#define LPSPI_SR_FCF_SHIFT (9U)
+#define LPSPI_SR_FCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_FCF_SHIFT)) & LPSPI_SR_FCF_MASK)
+#define LPSPI_SR_TCF_MASK  (0x400U)
+#define LPSPI_SR_TCF_SHIFT (10U)
+#define LPSPI_SR_TCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TCF_SHIFT)) & LPSPI_SR_TCF_MASK)
+#define LPSPI_SR_TEF_MASK  (0x800U)
+#define LPSPI_SR_TEF_SHIFT (11U)
+#define LPSPI_SR_TEF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TEF_SHIFT)) & LPSPI_SR_TEF_MASK)
+#define LPSPI_SR_REF_MASK  (0x1000U)
+#define LPSPI_SR_REF_SHIFT (12U)
+#define LPSPI_SR_REF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_REF_SHIFT)) & LPSPI_SR_REF_MASK)
+#define LPSPI_SR_DMF_MASK  (0x2000U)
+#define LPSPI_SR_DMF_SHIFT (13U)
+#define LPSPI_SR_DMF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_DMF_SHIFT)) & LPSPI_SR_DMF_MASK)
+#define LPSPI_SR_MBF_MASK  (0x1000000U)
+#define LPSPI_SR_MBF_SHIFT (24U)
+#define LPSPI_SR_MBF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_MBF_SHIFT)) & LPSPI_SR_MBF_MASK)
 /*! @} */
 
 /*! @name IER - Interrupt Enable Register */
 /*! @{ */
-#define LPSPI_IER_TDIE_MASK                      (0x1U)
-#define LPSPI_IER_TDIE_SHIFT                     (0U)
-#define LPSPI_IER_TDIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TDIE_SHIFT)) & LPSPI_IER_TDIE_MASK)
-#define LPSPI_IER_RDIE_MASK                      (0x2U)
-#define LPSPI_IER_RDIE_SHIFT                     (1U)
-#define LPSPI_IER_RDIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_RDIE_SHIFT)) & LPSPI_IER_RDIE_MASK)
-#define LPSPI_IER_WCIE_MASK                      (0x100U)
-#define LPSPI_IER_WCIE_SHIFT                     (8U)
-#define LPSPI_IER_WCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_WCIE_SHIFT)) & LPSPI_IER_WCIE_MASK)
-#define LPSPI_IER_FCIE_MASK                      (0x200U)
-#define LPSPI_IER_FCIE_SHIFT                     (9U)
-#define LPSPI_IER_FCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_FCIE_SHIFT)) & LPSPI_IER_FCIE_MASK)
-#define LPSPI_IER_TCIE_MASK                      (0x400U)
-#define LPSPI_IER_TCIE_SHIFT                     (10U)
-#define LPSPI_IER_TCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TCIE_SHIFT)) & LPSPI_IER_TCIE_MASK)
-#define LPSPI_IER_TEIE_MASK                      (0x800U)
-#define LPSPI_IER_TEIE_SHIFT                     (11U)
-#define LPSPI_IER_TEIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TEIE_SHIFT)) & LPSPI_IER_TEIE_MASK)
-#define LPSPI_IER_REIE_MASK                      (0x1000U)
-#define LPSPI_IER_REIE_SHIFT                     (12U)
-#define LPSPI_IER_REIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_REIE_SHIFT)) & LPSPI_IER_REIE_MASK)
-#define LPSPI_IER_DMIE_MASK                      (0x2000U)
-#define LPSPI_IER_DMIE_SHIFT                     (13U)
-#define LPSPI_IER_DMIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_DMIE_SHIFT)) & LPSPI_IER_DMIE_MASK)
+#define LPSPI_IER_TDIE_MASK  (0x1U)
+#define LPSPI_IER_TDIE_SHIFT (0U)
+#define LPSPI_IER_TDIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TDIE_SHIFT)) & LPSPI_IER_TDIE_MASK)
+#define LPSPI_IER_RDIE_MASK  (0x2U)
+#define LPSPI_IER_RDIE_SHIFT (1U)
+#define LPSPI_IER_RDIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_RDIE_SHIFT)) & LPSPI_IER_RDIE_MASK)
+#define LPSPI_IER_WCIE_MASK  (0x100U)
+#define LPSPI_IER_WCIE_SHIFT (8U)
+#define LPSPI_IER_WCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_WCIE_SHIFT)) & LPSPI_IER_WCIE_MASK)
+#define LPSPI_IER_FCIE_MASK  (0x200U)
+#define LPSPI_IER_FCIE_SHIFT (9U)
+#define LPSPI_IER_FCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_FCIE_SHIFT)) & LPSPI_IER_FCIE_MASK)
+#define LPSPI_IER_TCIE_MASK  (0x400U)
+#define LPSPI_IER_TCIE_SHIFT (10U)
+#define LPSPI_IER_TCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TCIE_SHIFT)) & LPSPI_IER_TCIE_MASK)
+#define LPSPI_IER_TEIE_MASK  (0x800U)
+#define LPSPI_IER_TEIE_SHIFT (11U)
+#define LPSPI_IER_TEIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TEIE_SHIFT)) & LPSPI_IER_TEIE_MASK)
+#define LPSPI_IER_REIE_MASK  (0x1000U)
+#define LPSPI_IER_REIE_SHIFT (12U)
+#define LPSPI_IER_REIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_REIE_SHIFT)) & LPSPI_IER_REIE_MASK)
+#define LPSPI_IER_DMIE_MASK  (0x2000U)
+#define LPSPI_IER_DMIE_SHIFT (13U)
+#define LPSPI_IER_DMIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_DMIE_SHIFT)) & LPSPI_IER_DMIE_MASK)
 /*! @} */
 
 /*! @name DER - DMA Enable Register */
 /*! @{ */
-#define LPSPI_DER_TDDE_MASK                      (0x1U)
-#define LPSPI_DER_TDDE_SHIFT                     (0U)
-#define LPSPI_DER_TDDE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_TDDE_SHIFT)) & LPSPI_DER_TDDE_MASK)
-#define LPSPI_DER_RDDE_MASK                      (0x2U)
-#define LPSPI_DER_RDDE_SHIFT                     (1U)
-#define LPSPI_DER_RDDE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_RDDE_SHIFT)) & LPSPI_DER_RDDE_MASK)
+#define LPSPI_DER_TDDE_MASK  (0x1U)
+#define LPSPI_DER_TDDE_SHIFT (0U)
+#define LPSPI_DER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_TDDE_SHIFT)) & LPSPI_DER_TDDE_MASK)
+#define LPSPI_DER_RDDE_MASK  (0x2U)
+#define LPSPI_DER_RDDE_SHIFT (1U)
+#define LPSPI_DER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_RDDE_SHIFT)) & LPSPI_DER_RDDE_MASK)
 /*! @} */
 
 /*! @name CFGR0 - Configuration Register 0 */
 /*! @{ */
-#define LPSPI_CFGR0_HREN_MASK                    (0x1U)
-#define LPSPI_CFGR0_HREN_SHIFT                   (0U)
-#define LPSPI_CFGR0_HREN(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HREN_SHIFT)) & LPSPI_CFGR0_HREN_MASK)
-#define LPSPI_CFGR0_HRPOL_MASK                   (0x2U)
-#define LPSPI_CFGR0_HRPOL_SHIFT                  (1U)
-#define LPSPI_CFGR0_HRPOL(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRPOL_SHIFT)) & LPSPI_CFGR0_HRPOL_MASK)
-#define LPSPI_CFGR0_HRSEL_MASK                   (0x4U)
-#define LPSPI_CFGR0_HRSEL_SHIFT                  (2U)
-#define LPSPI_CFGR0_HRSEL(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRSEL_SHIFT)) & LPSPI_CFGR0_HRSEL_MASK)
-#define LPSPI_CFGR0_CIRFIFO_MASK                 (0x100U)
-#define LPSPI_CFGR0_CIRFIFO_SHIFT                (8U)
-#define LPSPI_CFGR0_CIRFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_CIRFIFO_SHIFT)) & LPSPI_CFGR0_CIRFIFO_MASK)
-#define LPSPI_CFGR0_RDMO_MASK                    (0x200U)
-#define LPSPI_CFGR0_RDMO_SHIFT                   (9U)
-#define LPSPI_CFGR0_RDMO(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_RDMO_SHIFT)) & LPSPI_CFGR0_RDMO_MASK)
+#define LPSPI_CFGR0_HREN_MASK     (0x1U)
+#define LPSPI_CFGR0_HREN_SHIFT    (0U)
+#define LPSPI_CFGR0_HREN(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HREN_SHIFT)) & LPSPI_CFGR0_HREN_MASK)
+#define LPSPI_CFGR0_HRPOL_MASK    (0x2U)
+#define LPSPI_CFGR0_HRPOL_SHIFT   (1U)
+#define LPSPI_CFGR0_HRPOL(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRPOL_SHIFT)) & LPSPI_CFGR0_HRPOL_MASK)
+#define LPSPI_CFGR0_HRSEL_MASK    (0x4U)
+#define LPSPI_CFGR0_HRSEL_SHIFT   (2U)
+#define LPSPI_CFGR0_HRSEL(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRSEL_SHIFT)) & LPSPI_CFGR0_HRSEL_MASK)
+#define LPSPI_CFGR0_CIRFIFO_MASK  (0x100U)
+#define LPSPI_CFGR0_CIRFIFO_SHIFT (8U)
+#define LPSPI_CFGR0_CIRFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_CIRFIFO_SHIFT)) & LPSPI_CFGR0_CIRFIFO_MASK)
+#define LPSPI_CFGR0_RDMO_MASK     (0x200U)
+#define LPSPI_CFGR0_RDMO_SHIFT    (9U)
+#define LPSPI_CFGR0_RDMO(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_RDMO_SHIFT)) & LPSPI_CFGR0_RDMO_MASK)
 /*! @} */
 
 /*! @name CFGR1 - Configuration Register 1 */
 /*! @{ */
-#define LPSPI_CFGR1_MASTER_MASK                  (0x1U)
-#define LPSPI_CFGR1_MASTER_SHIFT                 (0U)
-#define LPSPI_CFGR1_MASTER(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MASTER_SHIFT)) & LPSPI_CFGR1_MASTER_MASK)
-#define LPSPI_CFGR1_SAMPLE_MASK                  (0x2U)
-#define LPSPI_CFGR1_SAMPLE_SHIFT                 (1U)
-#define LPSPI_CFGR1_SAMPLE(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_SAMPLE_SHIFT)) & LPSPI_CFGR1_SAMPLE_MASK)
-#define LPSPI_CFGR1_AUTOPCS_MASK                 (0x4U)
-#define LPSPI_CFGR1_AUTOPCS_SHIFT                (2U)
-#define LPSPI_CFGR1_AUTOPCS(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_AUTOPCS_SHIFT)) & LPSPI_CFGR1_AUTOPCS_MASK)
-#define LPSPI_CFGR1_NOSTALL_MASK                 (0x8U)
-#define LPSPI_CFGR1_NOSTALL_SHIFT                (3U)
-#define LPSPI_CFGR1_NOSTALL(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_NOSTALL_SHIFT)) & LPSPI_CFGR1_NOSTALL_MASK)
-#define LPSPI_CFGR1_PCSPOL_MASK                  (0xF00U)
-#define LPSPI_CFGR1_PCSPOL_SHIFT                 (8U)
-#define LPSPI_CFGR1_PCSPOL(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSPOL_SHIFT)) & LPSPI_CFGR1_PCSPOL_MASK)
-#define LPSPI_CFGR1_MATCFG_MASK                  (0x70000U)
-#define LPSPI_CFGR1_MATCFG_SHIFT                 (16U)
-#define LPSPI_CFGR1_MATCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MATCFG_SHIFT)) & LPSPI_CFGR1_MATCFG_MASK)
-#define LPSPI_CFGR1_PINCFG_MASK                  (0x3000000U)
-#define LPSPI_CFGR1_PINCFG_SHIFT                 (24U)
-#define LPSPI_CFGR1_PINCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
-#define LPSPI_CFGR1_OUTCFG_MASK                  (0x4000000U)
-#define LPSPI_CFGR1_OUTCFG_SHIFT                 (26U)
-#define LPSPI_CFGR1_OUTCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_OUTCFG_SHIFT)) & LPSPI_CFGR1_OUTCFG_MASK)
-#define LPSPI_CFGR1_PCSCFG_MASK                  (0x8000000U)
-#define LPSPI_CFGR1_PCSCFG_SHIFT                 (27U)
-#define LPSPI_CFGR1_PCSCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSCFG_SHIFT)) & LPSPI_CFGR1_PCSCFG_MASK)
+#define LPSPI_CFGR1_MASTER_MASK   (0x1U)
+#define LPSPI_CFGR1_MASTER_SHIFT  (0U)
+#define LPSPI_CFGR1_MASTER(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MASTER_SHIFT)) & LPSPI_CFGR1_MASTER_MASK)
+#define LPSPI_CFGR1_SAMPLE_MASK   (0x2U)
+#define LPSPI_CFGR1_SAMPLE_SHIFT  (1U)
+#define LPSPI_CFGR1_SAMPLE(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_SAMPLE_SHIFT)) & LPSPI_CFGR1_SAMPLE_MASK)
+#define LPSPI_CFGR1_AUTOPCS_MASK  (0x4U)
+#define LPSPI_CFGR1_AUTOPCS_SHIFT (2U)
+#define LPSPI_CFGR1_AUTOPCS(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_AUTOPCS_SHIFT)) & LPSPI_CFGR1_AUTOPCS_MASK)
+#define LPSPI_CFGR1_NOSTALL_MASK  (0x8U)
+#define LPSPI_CFGR1_NOSTALL_SHIFT (3U)
+#define LPSPI_CFGR1_NOSTALL(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_NOSTALL_SHIFT)) & LPSPI_CFGR1_NOSTALL_MASK)
+#define LPSPI_CFGR1_PCSPOL_MASK   (0xF00U)
+#define LPSPI_CFGR1_PCSPOL_SHIFT  (8U)
+#define LPSPI_CFGR1_PCSPOL(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSPOL_SHIFT)) & LPSPI_CFGR1_PCSPOL_MASK)
+#define LPSPI_CFGR1_MATCFG_MASK   (0x70000U)
+#define LPSPI_CFGR1_MATCFG_SHIFT  (16U)
+#define LPSPI_CFGR1_MATCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MATCFG_SHIFT)) & LPSPI_CFGR1_MATCFG_MASK)
+#define LPSPI_CFGR1_PINCFG_MASK   (0x3000000U)
+#define LPSPI_CFGR1_PINCFG_SHIFT  (24U)
+#define LPSPI_CFGR1_PINCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
+#define LPSPI_CFGR1_OUTCFG_MASK   (0x4000000U)
+#define LPSPI_CFGR1_OUTCFG_SHIFT  (26U)
+#define LPSPI_CFGR1_OUTCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_OUTCFG_SHIFT)) & LPSPI_CFGR1_OUTCFG_MASK)
+#define LPSPI_CFGR1_PCSCFG_MASK   (0x8000000U)
+#define LPSPI_CFGR1_PCSCFG_SHIFT  (27U)
+#define LPSPI_CFGR1_PCSCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSCFG_SHIFT)) & LPSPI_CFGR1_PCSCFG_MASK)
 /*! @} */
 
 /*! @name DMR0 - Data Match Register 0 */
 /*! @{ */
-#define LPSPI_DMR0_MATCH0_MASK                   (0xFFFFFFFFU)
-#define LPSPI_DMR0_MATCH0_SHIFT                  (0U)
-#define LPSPI_DMR0_MATCH0(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
+#define LPSPI_DMR0_MATCH0_MASK  (0xFFFFFFFFU)
+#define LPSPI_DMR0_MATCH0_SHIFT (0U)
+#define LPSPI_DMR0_MATCH0(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
 /*! @} */
 
 /*! @name DMR1 - Data Match Register 1 */
 /*! @{ */
-#define LPSPI_DMR1_MATCH1_MASK                   (0xFFFFFFFFU)
-#define LPSPI_DMR1_MATCH1_SHIFT                  (0U)
-#define LPSPI_DMR1_MATCH1(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR1_MATCH1_SHIFT)) & LPSPI_DMR1_MATCH1_MASK)
+#define LPSPI_DMR1_MATCH1_MASK  (0xFFFFFFFFU)
+#define LPSPI_DMR1_MATCH1_SHIFT (0U)
+#define LPSPI_DMR1_MATCH1(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR1_MATCH1_SHIFT)) & LPSPI_DMR1_MATCH1_MASK)
 /*! @} */
 
 /*! @name CCR - Clock Configuration Register */
 /*! @{ */
-#define LPSPI_CCR_SCKDIV_MASK                    (0xFFU)
-#define LPSPI_CCR_SCKDIV_SHIFT                   (0U)
-#define LPSPI_CCR_SCKDIV(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKDIV_SHIFT)) & LPSPI_CCR_SCKDIV_MASK)
-#define LPSPI_CCR_DBT_MASK                       (0xFF00U)
-#define LPSPI_CCR_DBT_SHIFT                      (8U)
-#define LPSPI_CCR_DBT(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_DBT_SHIFT)) & LPSPI_CCR_DBT_MASK)
-#define LPSPI_CCR_PCSSCK_MASK                    (0xFF0000U)
-#define LPSPI_CCR_PCSSCK_SHIFT                   (16U)
-#define LPSPI_CCR_PCSSCK(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_PCSSCK_SHIFT)) & LPSPI_CCR_PCSSCK_MASK)
-#define LPSPI_CCR_SCKPCS_MASK                    (0xFF000000U)
-#define LPSPI_CCR_SCKPCS_SHIFT                   (24U)
-#define LPSPI_CCR_SCKPCS(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKPCS_SHIFT)) & LPSPI_CCR_SCKPCS_MASK)
+#define LPSPI_CCR_SCKDIV_MASK  (0xFFU)
+#define LPSPI_CCR_SCKDIV_SHIFT (0U)
+#define LPSPI_CCR_SCKDIV(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKDIV_SHIFT)) & LPSPI_CCR_SCKDIV_MASK)
+#define LPSPI_CCR_DBT_MASK     (0xFF00U)
+#define LPSPI_CCR_DBT_SHIFT    (8U)
+#define LPSPI_CCR_DBT(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_DBT_SHIFT)) & LPSPI_CCR_DBT_MASK)
+#define LPSPI_CCR_PCSSCK_MASK  (0xFF0000U)
+#define LPSPI_CCR_PCSSCK_SHIFT (16U)
+#define LPSPI_CCR_PCSSCK(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_PCSSCK_SHIFT)) & LPSPI_CCR_PCSSCK_MASK)
+#define LPSPI_CCR_SCKPCS_MASK  (0xFF000000U)
+#define LPSPI_CCR_SCKPCS_SHIFT (24U)
+#define LPSPI_CCR_SCKPCS(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKPCS_SHIFT)) & LPSPI_CCR_SCKPCS_MASK)
 /*! @} */
 
 /*! @name FCR - FIFO Control Register */
 /*! @{ */
-#define LPSPI_FCR_TXWATER_MASK                   (0xFU)
-#define LPSPI_FCR_TXWATER_SHIFT                  (0U)
-#define LPSPI_FCR_TXWATER(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_TXWATER_SHIFT)) & LPSPI_FCR_TXWATER_MASK)
-#define LPSPI_FCR_RXWATER_MASK                   (0xF0000U)
-#define LPSPI_FCR_RXWATER_SHIFT                  (16U)
-#define LPSPI_FCR_RXWATER(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_RXWATER_SHIFT)) & LPSPI_FCR_RXWATER_MASK)
+#define LPSPI_FCR_TXWATER_MASK  (0xFU)
+#define LPSPI_FCR_TXWATER_SHIFT (0U)
+#define LPSPI_FCR_TXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_TXWATER_SHIFT)) & LPSPI_FCR_TXWATER_MASK)
+#define LPSPI_FCR_RXWATER_MASK  (0xF0000U)
+#define LPSPI_FCR_RXWATER_SHIFT (16U)
+#define LPSPI_FCR_RXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_RXWATER_SHIFT)) & LPSPI_FCR_RXWATER_MASK)
 /*! @} */
 
 /*! @name FSR - FIFO Status Register */
 /*! @{ */
-#define LPSPI_FSR_TXCOUNT_MASK                   (0x1FU)
-#define LPSPI_FSR_TXCOUNT_SHIFT                  (0U)
-#define LPSPI_FSR_TXCOUNT(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_TXCOUNT_SHIFT)) & LPSPI_FSR_TXCOUNT_MASK)
-#define LPSPI_FSR_RXCOUNT_MASK                   (0x1F0000U)
-#define LPSPI_FSR_RXCOUNT_SHIFT                  (16U)
-#define LPSPI_FSR_RXCOUNT(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_RXCOUNT_SHIFT)) & LPSPI_FSR_RXCOUNT_MASK)
+#define LPSPI_FSR_TXCOUNT_MASK  (0x1FU)
+#define LPSPI_FSR_TXCOUNT_SHIFT (0U)
+#define LPSPI_FSR_TXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_TXCOUNT_SHIFT)) & LPSPI_FSR_TXCOUNT_MASK)
+#define LPSPI_FSR_RXCOUNT_MASK  (0x1F0000U)
+#define LPSPI_FSR_RXCOUNT_SHIFT (16U)
+#define LPSPI_FSR_RXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_RXCOUNT_SHIFT)) & LPSPI_FSR_RXCOUNT_MASK)
 /*! @} */
 
 /*! @name TCR - Transmit Command Register */
 /*! @{ */
-#define LPSPI_TCR_FRAMESZ_MASK                   (0xFFFU)
-#define LPSPI_TCR_FRAMESZ_SHIFT                  (0U)
-#define LPSPI_TCR_FRAMESZ(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_FRAMESZ_SHIFT)) & LPSPI_TCR_FRAMESZ_MASK)
-#define LPSPI_TCR_WIDTH_MASK                     (0x30000U)
-#define LPSPI_TCR_WIDTH_SHIFT                    (16U)
-#define LPSPI_TCR_WIDTH(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_WIDTH_SHIFT)) & LPSPI_TCR_WIDTH_MASK)
-#define LPSPI_TCR_TXMSK_MASK                     (0x40000U)
-#define LPSPI_TCR_TXMSK_SHIFT                    (18U)
-#define LPSPI_TCR_TXMSK(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_TXMSK_SHIFT)) & LPSPI_TCR_TXMSK_MASK)
-#define LPSPI_TCR_RXMSK_MASK                     (0x80000U)
-#define LPSPI_TCR_RXMSK_SHIFT                    (19U)
-#define LPSPI_TCR_RXMSK(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_RXMSK_SHIFT)) & LPSPI_TCR_RXMSK_MASK)
-#define LPSPI_TCR_CONTC_MASK                     (0x100000U)
-#define LPSPI_TCR_CONTC_SHIFT                    (20U)
-#define LPSPI_TCR_CONTC(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONTC_SHIFT)) & LPSPI_TCR_CONTC_MASK)
-#define LPSPI_TCR_CONT_MASK                      (0x200000U)
-#define LPSPI_TCR_CONT_SHIFT                     (21U)
-#define LPSPI_TCR_CONT(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONT_SHIFT)) & LPSPI_TCR_CONT_MASK)
-#define LPSPI_TCR_BYSW_MASK                      (0x400000U)
-#define LPSPI_TCR_BYSW_SHIFT                     (22U)
-#define LPSPI_TCR_BYSW(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_BYSW_SHIFT)) & LPSPI_TCR_BYSW_MASK)
-#define LPSPI_TCR_LSBF_MASK                      (0x800000U)
-#define LPSPI_TCR_LSBF_SHIFT                     (23U)
-#define LPSPI_TCR_LSBF(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_LSBF_SHIFT)) & LPSPI_TCR_LSBF_MASK)
-#define LPSPI_TCR_PCS_MASK                       (0x3000000U)
-#define LPSPI_TCR_PCS_SHIFT                      (24U)
-#define LPSPI_TCR_PCS(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PCS_SHIFT)) & LPSPI_TCR_PCS_MASK)
-#define LPSPI_TCR_PRESCALE_MASK                  (0x38000000U)
-#define LPSPI_TCR_PRESCALE_SHIFT                 (27U)
-#define LPSPI_TCR_PRESCALE(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PRESCALE_SHIFT)) & LPSPI_TCR_PRESCALE_MASK)
-#define LPSPI_TCR_CPHA_MASK                      (0x40000000U)
-#define LPSPI_TCR_CPHA_SHIFT                     (30U)
-#define LPSPI_TCR_CPHA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPHA_SHIFT)) & LPSPI_TCR_CPHA_MASK)
-#define LPSPI_TCR_CPOL_MASK                      (0x80000000U)
-#define LPSPI_TCR_CPOL_SHIFT                     (31U)
-#define LPSPI_TCR_CPOL(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPOL_SHIFT)) & LPSPI_TCR_CPOL_MASK)
+#define LPSPI_TCR_FRAMESZ_MASK   (0xFFFU)
+#define LPSPI_TCR_FRAMESZ_SHIFT  (0U)
+#define LPSPI_TCR_FRAMESZ(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_FRAMESZ_SHIFT)) & LPSPI_TCR_FRAMESZ_MASK)
+#define LPSPI_TCR_WIDTH_MASK     (0x30000U)
+#define LPSPI_TCR_WIDTH_SHIFT    (16U)
+#define LPSPI_TCR_WIDTH(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_WIDTH_SHIFT)) & LPSPI_TCR_WIDTH_MASK)
+#define LPSPI_TCR_TXMSK_MASK     (0x40000U)
+#define LPSPI_TCR_TXMSK_SHIFT    (18U)
+#define LPSPI_TCR_TXMSK(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_TXMSK_SHIFT)) & LPSPI_TCR_TXMSK_MASK)
+#define LPSPI_TCR_RXMSK_MASK     (0x80000U)
+#define LPSPI_TCR_RXMSK_SHIFT    (19U)
+#define LPSPI_TCR_RXMSK(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_RXMSK_SHIFT)) & LPSPI_TCR_RXMSK_MASK)
+#define LPSPI_TCR_CONTC_MASK     (0x100000U)
+#define LPSPI_TCR_CONTC_SHIFT    (20U)
+#define LPSPI_TCR_CONTC(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONTC_SHIFT)) & LPSPI_TCR_CONTC_MASK)
+#define LPSPI_TCR_CONT_MASK      (0x200000U)
+#define LPSPI_TCR_CONT_SHIFT     (21U)
+#define LPSPI_TCR_CONT(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONT_SHIFT)) & LPSPI_TCR_CONT_MASK)
+#define LPSPI_TCR_BYSW_MASK      (0x400000U)
+#define LPSPI_TCR_BYSW_SHIFT     (22U)
+#define LPSPI_TCR_BYSW(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_BYSW_SHIFT)) & LPSPI_TCR_BYSW_MASK)
+#define LPSPI_TCR_LSBF_MASK      (0x800000U)
+#define LPSPI_TCR_LSBF_SHIFT     (23U)
+#define LPSPI_TCR_LSBF(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_LSBF_SHIFT)) & LPSPI_TCR_LSBF_MASK)
+#define LPSPI_TCR_PCS_MASK       (0x3000000U)
+#define LPSPI_TCR_PCS_SHIFT      (24U)
+#define LPSPI_TCR_PCS(x)         (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PCS_SHIFT)) & LPSPI_TCR_PCS_MASK)
+#define LPSPI_TCR_PRESCALE_MASK  (0x38000000U)
+#define LPSPI_TCR_PRESCALE_SHIFT (27U)
+#define LPSPI_TCR_PRESCALE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PRESCALE_SHIFT)) & LPSPI_TCR_PRESCALE_MASK)
+#define LPSPI_TCR_CPHA_MASK      (0x40000000U)
+#define LPSPI_TCR_CPHA_SHIFT     (30U)
+#define LPSPI_TCR_CPHA(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPHA_SHIFT)) & LPSPI_TCR_CPHA_MASK)
+#define LPSPI_TCR_CPOL_MASK      (0x80000000U)
+#define LPSPI_TCR_CPOL_SHIFT     (31U)
+#define LPSPI_TCR_CPOL(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPOL_SHIFT)) & LPSPI_TCR_CPOL_MASK)
 /*! @} */
 
 /*! @name TDR - Transmit Data Register */
 /*! @{ */
-#define LPSPI_TDR_DATA_MASK                      (0xFFFFFFFFU)
-#define LPSPI_TDR_DATA_SHIFT                     (0U)
-#define LPSPI_TDR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TDR_DATA_SHIFT)) & LPSPI_TDR_DATA_MASK)
+#define LPSPI_TDR_DATA_MASK  (0xFFFFFFFFU)
+#define LPSPI_TDR_DATA_SHIFT (0U)
+#define LPSPI_TDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_TDR_DATA_SHIFT)) & LPSPI_TDR_DATA_MASK)
 /*! @} */
 
 /*! @name RSR - Receive Status Register */
 /*! @{ */
-#define LPSPI_RSR_SOF_MASK                       (0x1U)
-#define LPSPI_RSR_SOF_SHIFT                      (0U)
-#define LPSPI_RSR_SOF(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_SOF_SHIFT)) & LPSPI_RSR_SOF_MASK)
-#define LPSPI_RSR_RXEMPTY_MASK                   (0x2U)
-#define LPSPI_RSR_RXEMPTY_SHIFT                  (1U)
-#define LPSPI_RSR_RXEMPTY(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_RXEMPTY_SHIFT)) & LPSPI_RSR_RXEMPTY_MASK)
+#define LPSPI_RSR_SOF_MASK      (0x1U)
+#define LPSPI_RSR_SOF_SHIFT     (0U)
+#define LPSPI_RSR_SOF(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_SOF_SHIFT)) & LPSPI_RSR_SOF_MASK)
+#define LPSPI_RSR_RXEMPTY_MASK  (0x2U)
+#define LPSPI_RSR_RXEMPTY_SHIFT (1U)
+#define LPSPI_RSR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_RXEMPTY_SHIFT)) & LPSPI_RSR_RXEMPTY_MASK)
 /*! @} */
 
 /*! @name RDR - Receive Data Register */
 /*! @{ */
-#define LPSPI_RDR_DATA_MASK                      (0xFFFFFFFFU)
-#define LPSPI_RDR_DATA_SHIFT                     (0U)
-#define LPSPI_RDR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_RDR_DATA_SHIFT)) & LPSPI_RDR_DATA_MASK)
+#define LPSPI_RDR_DATA_MASK  (0xFFFFFFFFU)
+#define LPSPI_RDR_DATA_SHIFT (0U)
+#define LPSPI_RDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_RDR_DATA_SHIFT)) & LPSPI_RDR_DATA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPSPI_Register_Masks */
 
-
 /* LPSPI - Peripheral instance base addresses */
 /** Peripheral LPSPI1 base address */
-#define LPSPI1_BASE                              (0x40394000u)
+#define LPSPI1_BASE (0x40394000u)
 /** Peripheral LPSPI1 base pointer */
-#define LPSPI1                                   ((LPSPI_Type *)LPSPI1_BASE)
+#define LPSPI1 ((LPSPI_Type *)LPSPI1_BASE)
 /** Peripheral LPSPI2 base address */
-#define LPSPI2_BASE                              (0x40398000u)
+#define LPSPI2_BASE (0x40398000u)
 /** Peripheral LPSPI2 base pointer */
-#define LPSPI2                                   ((LPSPI_Type *)LPSPI2_BASE)
+#define LPSPI2 ((LPSPI_Type *)LPSPI2_BASE)
 /** Peripheral LPSPI3 base address */
-#define LPSPI3_BASE                              (0x4039C000u)
+#define LPSPI3_BASE (0x4039C000u)
 /** Peripheral LPSPI3 base pointer */
-#define LPSPI3                                   ((LPSPI_Type *)LPSPI3_BASE)
+#define LPSPI3 ((LPSPI_Type *)LPSPI3_BASE)
 /** Peripheral LPSPI4 base address */
-#define LPSPI4_BASE                              (0x403A0000u)
+#define LPSPI4_BASE (0x403A0000u)
 /** Peripheral LPSPI4 base pointer */
-#define LPSPI4                                   ((LPSPI_Type *)LPSPI4_BASE)
+#define LPSPI4 ((LPSPI_Type *)LPSPI4_BASE)
 /** Array initializer of LPSPI peripheral base addresses */
-#define LPSPI_BASE_ADDRS                         { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }
+#define LPSPI_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE                                                         \
+    }
 /** Array initializer of LPSPI peripheral base pointers */
-#define LPSPI_BASE_PTRS                          { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }
+#define LPSPI_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4                                                               \
+    }
 /** Interrupt vectors for the LPSPI peripheral type */
-#define LPSPI_IRQS                               { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }
+#define LPSPI_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn                                              \
+    }
 
 /*!
  * @}
  */ /* end of group LPSPI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPUART Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -14680,19 +16879,20 @@ typedef struct {
  */
 
 /** LPUART - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t GLOBAL;                            /**< LPUART Global Register, offset: 0x8 */
-  __IO uint32_t PINCFG;                            /**< LPUART Pin Configuration Register, offset: 0xC */
-  __IO uint32_t BAUD;                              /**< LPUART Baud Rate Register, offset: 0x10 */
-  __IO uint32_t STAT;                              /**< LPUART Status Register, offset: 0x14 */
-  __IO uint32_t CTRL;                              /**< LPUART Control Register, offset: 0x18 */
-  __IO uint32_t DATA;                              /**< LPUART Data Register, offset: 0x1C */
-  __IO uint32_t MATCH;                             /**< LPUART Match Address Register, offset: 0x20 */
-  __IO uint32_t MODIR;                             /**< LPUART Modem IrDA Register, offset: 0x24 */
-  __IO uint32_t FIFO;                              /**< LPUART FIFO Register, offset: 0x28 */
-  __IO uint32_t WATER;                             /**< LPUART Watermark Register, offset: 0x2C */
+typedef struct
+{
+    __I uint32_t VERID;   /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;   /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t GLOBAL; /**< LPUART Global Register, offset: 0x8 */
+    __IO uint32_t PINCFG; /**< LPUART Pin Configuration Register, offset: 0xC */
+    __IO uint32_t BAUD;   /**< LPUART Baud Rate Register, offset: 0x10 */
+    __IO uint32_t STAT;   /**< LPUART Status Register, offset: 0x14 */
+    __IO uint32_t CTRL;   /**< LPUART Control Register, offset: 0x18 */
+    __IO uint32_t DATA;   /**< LPUART Data Register, offset: 0x1C */
+    __IO uint32_t MATCH;  /**< LPUART Match Address Register, offset: 0x20 */
+    __IO uint32_t MODIR;  /**< LPUART Modem IrDA Register, offset: 0x24 */
+    __IO uint32_t FIFO;   /**< LPUART FIFO Register, offset: 0x28 */
+    __IO uint32_t WATER;  /**< LPUART Watermark Register, offset: 0x2C */
 } LPUART_Type;
 
 /* ----------------------------------------------------------------------------
@@ -14706,433 +16906,454 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPUART_VERID_FEATURE_MASK                (0xFFFFU)
-#define LPUART_VERID_FEATURE_SHIFT               (0U)
-#define LPUART_VERID_FEATURE(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)
-#define LPUART_VERID_MINOR_MASK                  (0xFF0000U)
-#define LPUART_VERID_MINOR_SHIFT                 (16U)
-#define LPUART_VERID_MINOR(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)
-#define LPUART_VERID_MAJOR_MASK                  (0xFF000000U)
-#define LPUART_VERID_MAJOR_SHIFT                 (24U)
-#define LPUART_VERID_MAJOR(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)
+#define LPUART_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPUART_VERID_FEATURE_SHIFT (0U)
+#define LPUART_VERID_FEATURE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)
+#define LPUART_VERID_MINOR_MASK  (0xFF0000U)
+#define LPUART_VERID_MINOR_SHIFT (16U)
+#define LPUART_VERID_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)
+#define LPUART_VERID_MAJOR_MASK  (0xFF000000U)
+#define LPUART_VERID_MAJOR_SHIFT (24U)
+#define LPUART_VERID_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPUART_PARAM_TXFIFO_MASK                 (0xFFU)
-#define LPUART_PARAM_TXFIFO_SHIFT                (0U)
-#define LPUART_PARAM_TXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)
-#define LPUART_PARAM_RXFIFO_MASK                 (0xFF00U)
-#define LPUART_PARAM_RXFIFO_SHIFT                (8U)
-#define LPUART_PARAM_RXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)
+#define LPUART_PARAM_TXFIFO_MASK  (0xFFU)
+#define LPUART_PARAM_TXFIFO_SHIFT (0U)
+#define LPUART_PARAM_TXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)
+#define LPUART_PARAM_RXFIFO_MASK  (0xFF00U)
+#define LPUART_PARAM_RXFIFO_SHIFT (8U)
+#define LPUART_PARAM_RXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)
 /*! @} */
 
 /*! @name GLOBAL - LPUART Global Register */
 /*! @{ */
-#define LPUART_GLOBAL_RST_MASK                   (0x2U)
-#define LPUART_GLOBAL_RST_SHIFT                  (1U)
-#define LPUART_GLOBAL_RST(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)
+#define LPUART_GLOBAL_RST_MASK  (0x2U)
+#define LPUART_GLOBAL_RST_SHIFT (1U)
+#define LPUART_GLOBAL_RST(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)
 /*! @} */
 
 /*! @name PINCFG - LPUART Pin Configuration Register */
 /*! @{ */
-#define LPUART_PINCFG_TRGSEL_MASK                (0x3U)
-#define LPUART_PINCFG_TRGSEL_SHIFT               (0U)
-#define LPUART_PINCFG_TRGSEL(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)
+#define LPUART_PINCFG_TRGSEL_MASK  (0x3U)
+#define LPUART_PINCFG_TRGSEL_SHIFT (0U)
+#define LPUART_PINCFG_TRGSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)
 /*! @} */
 
 /*! @name BAUD - LPUART Baud Rate Register */
 /*! @{ */
-#define LPUART_BAUD_SBR_MASK                     (0x1FFFU)
-#define LPUART_BAUD_SBR_SHIFT                    (0U)
-#define LPUART_BAUD_SBR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
-#define LPUART_BAUD_SBNS_MASK                    (0x2000U)
-#define LPUART_BAUD_SBNS_SHIFT                   (13U)
-#define LPUART_BAUD_SBNS(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)
-#define LPUART_BAUD_RXEDGIE_MASK                 (0x4000U)
-#define LPUART_BAUD_RXEDGIE_SHIFT                (14U)
-#define LPUART_BAUD_RXEDGIE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)
-#define LPUART_BAUD_LBKDIE_MASK                  (0x8000U)
-#define LPUART_BAUD_LBKDIE_SHIFT                 (15U)
-#define LPUART_BAUD_LBKDIE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)
-#define LPUART_BAUD_RESYNCDIS_MASK               (0x10000U)
-#define LPUART_BAUD_RESYNCDIS_SHIFT              (16U)
-#define LPUART_BAUD_RESYNCDIS(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)
-#define LPUART_BAUD_BOTHEDGE_MASK                (0x20000U)
-#define LPUART_BAUD_BOTHEDGE_SHIFT               (17U)
-#define LPUART_BAUD_BOTHEDGE(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)
-#define LPUART_BAUD_MATCFG_MASK                  (0xC0000U)
-#define LPUART_BAUD_MATCFG_SHIFT                 (18U)
-#define LPUART_BAUD_MATCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)
-#define LPUART_BAUD_RIDMAE_MASK                  (0x100000U)
-#define LPUART_BAUD_RIDMAE_SHIFT                 (20U)
-#define LPUART_BAUD_RIDMAE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)
-#define LPUART_BAUD_RDMAE_MASK                   (0x200000U)
-#define LPUART_BAUD_RDMAE_SHIFT                  (21U)
-#define LPUART_BAUD_RDMAE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)
-#define LPUART_BAUD_TDMAE_MASK                   (0x800000U)
-#define LPUART_BAUD_TDMAE_SHIFT                  (23U)
-#define LPUART_BAUD_TDMAE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)
-#define LPUART_BAUD_OSR_MASK                     (0x1F000000U)
-#define LPUART_BAUD_OSR_SHIFT                    (24U)
-#define LPUART_BAUD_OSR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
-#define LPUART_BAUD_M10_MASK                     (0x20000000U)
-#define LPUART_BAUD_M10_SHIFT                    (29U)
-#define LPUART_BAUD_M10(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)
-#define LPUART_BAUD_MAEN2_MASK                   (0x40000000U)
-#define LPUART_BAUD_MAEN2_SHIFT                  (30U)
-#define LPUART_BAUD_MAEN2(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)
-#define LPUART_BAUD_MAEN1_MASK                   (0x80000000U)
-#define LPUART_BAUD_MAEN1_SHIFT                  (31U)
-#define LPUART_BAUD_MAEN1(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)
+#define LPUART_BAUD_SBR_MASK        (0x1FFFU)
+#define LPUART_BAUD_SBR_SHIFT       (0U)
+#define LPUART_BAUD_SBR(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
+#define LPUART_BAUD_SBNS_MASK       (0x2000U)
+#define LPUART_BAUD_SBNS_SHIFT      (13U)
+#define LPUART_BAUD_SBNS(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)
+#define LPUART_BAUD_RXEDGIE_MASK    (0x4000U)
+#define LPUART_BAUD_RXEDGIE_SHIFT   (14U)
+#define LPUART_BAUD_RXEDGIE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)
+#define LPUART_BAUD_LBKDIE_MASK     (0x8000U)
+#define LPUART_BAUD_LBKDIE_SHIFT    (15U)
+#define LPUART_BAUD_LBKDIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)
+#define LPUART_BAUD_RESYNCDIS_MASK  (0x10000U)
+#define LPUART_BAUD_RESYNCDIS_SHIFT (16U)
+#define LPUART_BAUD_RESYNCDIS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)
+#define LPUART_BAUD_BOTHEDGE_MASK  (0x20000U)
+#define LPUART_BAUD_BOTHEDGE_SHIFT (17U)
+#define LPUART_BAUD_BOTHEDGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)
+#define LPUART_BAUD_MATCFG_MASK  (0xC0000U)
+#define LPUART_BAUD_MATCFG_SHIFT (18U)
+#define LPUART_BAUD_MATCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)
+#define LPUART_BAUD_RIDMAE_MASK  (0x100000U)
+#define LPUART_BAUD_RIDMAE_SHIFT (20U)
+#define LPUART_BAUD_RIDMAE(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)
+#define LPUART_BAUD_RDMAE_MASK   (0x200000U)
+#define LPUART_BAUD_RDMAE_SHIFT  (21U)
+#define LPUART_BAUD_RDMAE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)
+#define LPUART_BAUD_TDMAE_MASK   (0x800000U)
+#define LPUART_BAUD_TDMAE_SHIFT  (23U)
+#define LPUART_BAUD_TDMAE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)
+#define LPUART_BAUD_OSR_MASK     (0x1F000000U)
+#define LPUART_BAUD_OSR_SHIFT    (24U)
+#define LPUART_BAUD_OSR(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
+#define LPUART_BAUD_M10_MASK     (0x20000000U)
+#define LPUART_BAUD_M10_SHIFT    (29U)
+#define LPUART_BAUD_M10(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)
+#define LPUART_BAUD_MAEN2_MASK   (0x40000000U)
+#define LPUART_BAUD_MAEN2_SHIFT  (30U)
+#define LPUART_BAUD_MAEN2(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)
+#define LPUART_BAUD_MAEN1_MASK   (0x80000000U)
+#define LPUART_BAUD_MAEN1_SHIFT  (31U)
+#define LPUART_BAUD_MAEN1(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)
 /*! @} */
 
 /*! @name STAT - LPUART Status Register */
 /*! @{ */
-#define LPUART_STAT_MA2F_MASK                    (0x4000U)
-#define LPUART_STAT_MA2F_SHIFT                   (14U)
-#define LPUART_STAT_MA2F(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)
-#define LPUART_STAT_MA1F_MASK                    (0x8000U)
-#define LPUART_STAT_MA1F_SHIFT                   (15U)
-#define LPUART_STAT_MA1F(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)
-#define LPUART_STAT_PF_MASK                      (0x10000U)
-#define LPUART_STAT_PF_SHIFT                     (16U)
-#define LPUART_STAT_PF(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)
-#define LPUART_STAT_FE_MASK                      (0x20000U)
-#define LPUART_STAT_FE_SHIFT                     (17U)
-#define LPUART_STAT_FE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)
-#define LPUART_STAT_NF_MASK                      (0x40000U)
-#define LPUART_STAT_NF_SHIFT                     (18U)
-#define LPUART_STAT_NF(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)
-#define LPUART_STAT_OR_MASK                      (0x80000U)
-#define LPUART_STAT_OR_SHIFT                     (19U)
-#define LPUART_STAT_OR(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)
-#define LPUART_STAT_IDLE_MASK                    (0x100000U)
-#define LPUART_STAT_IDLE_SHIFT                   (20U)
-#define LPUART_STAT_IDLE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)
-#define LPUART_STAT_RDRF_MASK                    (0x200000U)
-#define LPUART_STAT_RDRF_SHIFT                   (21U)
-#define LPUART_STAT_RDRF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)
-#define LPUART_STAT_TC_MASK                      (0x400000U)
-#define LPUART_STAT_TC_SHIFT                     (22U)
-#define LPUART_STAT_TC(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)
-#define LPUART_STAT_TDRE_MASK                    (0x800000U)
-#define LPUART_STAT_TDRE_SHIFT                   (23U)
-#define LPUART_STAT_TDRE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)
-#define LPUART_STAT_RAF_MASK                     (0x1000000U)
-#define LPUART_STAT_RAF_SHIFT                    (24U)
-#define LPUART_STAT_RAF(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)
-#define LPUART_STAT_LBKDE_MASK                   (0x2000000U)
-#define LPUART_STAT_LBKDE_SHIFT                  (25U)
-#define LPUART_STAT_LBKDE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)
-#define LPUART_STAT_BRK13_MASK                   (0x4000000U)
-#define LPUART_STAT_BRK13_SHIFT                  (26U)
-#define LPUART_STAT_BRK13(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)
-#define LPUART_STAT_RWUID_MASK                   (0x8000000U)
-#define LPUART_STAT_RWUID_SHIFT                  (27U)
-#define LPUART_STAT_RWUID(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)
-#define LPUART_STAT_RXINV_MASK                   (0x10000000U)
-#define LPUART_STAT_RXINV_SHIFT                  (28U)
-#define LPUART_STAT_RXINV(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)
-#define LPUART_STAT_MSBF_MASK                    (0x20000000U)
-#define LPUART_STAT_MSBF_SHIFT                   (29U)
-#define LPUART_STAT_MSBF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)
-#define LPUART_STAT_RXEDGIF_MASK                 (0x40000000U)
-#define LPUART_STAT_RXEDGIF_SHIFT                (30U)
-#define LPUART_STAT_RXEDGIF(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)
-#define LPUART_STAT_LBKDIF_MASK                  (0x80000000U)
-#define LPUART_STAT_LBKDIF_SHIFT                 (31U)
-#define LPUART_STAT_LBKDIF(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)
+#define LPUART_STAT_MA2F_MASK     (0x4000U)
+#define LPUART_STAT_MA2F_SHIFT    (14U)
+#define LPUART_STAT_MA2F(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)
+#define LPUART_STAT_MA1F_MASK     (0x8000U)
+#define LPUART_STAT_MA1F_SHIFT    (15U)
+#define LPUART_STAT_MA1F(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)
+#define LPUART_STAT_PF_MASK       (0x10000U)
+#define LPUART_STAT_PF_SHIFT      (16U)
+#define LPUART_STAT_PF(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)
+#define LPUART_STAT_FE_MASK       (0x20000U)
+#define LPUART_STAT_FE_SHIFT      (17U)
+#define LPUART_STAT_FE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)
+#define LPUART_STAT_NF_MASK       (0x40000U)
+#define LPUART_STAT_NF_SHIFT      (18U)
+#define LPUART_STAT_NF(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)
+#define LPUART_STAT_OR_MASK       (0x80000U)
+#define LPUART_STAT_OR_SHIFT      (19U)
+#define LPUART_STAT_OR(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)
+#define LPUART_STAT_IDLE_MASK     (0x100000U)
+#define LPUART_STAT_IDLE_SHIFT    (20U)
+#define LPUART_STAT_IDLE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)
+#define LPUART_STAT_RDRF_MASK     (0x200000U)
+#define LPUART_STAT_RDRF_SHIFT    (21U)
+#define LPUART_STAT_RDRF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)
+#define LPUART_STAT_TC_MASK       (0x400000U)
+#define LPUART_STAT_TC_SHIFT      (22U)
+#define LPUART_STAT_TC(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)
+#define LPUART_STAT_TDRE_MASK     (0x800000U)
+#define LPUART_STAT_TDRE_SHIFT    (23U)
+#define LPUART_STAT_TDRE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)
+#define LPUART_STAT_RAF_MASK      (0x1000000U)
+#define LPUART_STAT_RAF_SHIFT     (24U)
+#define LPUART_STAT_RAF(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)
+#define LPUART_STAT_LBKDE_MASK    (0x2000000U)
+#define LPUART_STAT_LBKDE_SHIFT   (25U)
+#define LPUART_STAT_LBKDE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)
+#define LPUART_STAT_BRK13_MASK    (0x4000000U)
+#define LPUART_STAT_BRK13_SHIFT   (26U)
+#define LPUART_STAT_BRK13(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)
+#define LPUART_STAT_RWUID_MASK    (0x8000000U)
+#define LPUART_STAT_RWUID_SHIFT   (27U)
+#define LPUART_STAT_RWUID(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)
+#define LPUART_STAT_RXINV_MASK    (0x10000000U)
+#define LPUART_STAT_RXINV_SHIFT   (28U)
+#define LPUART_STAT_RXINV(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)
+#define LPUART_STAT_MSBF_MASK     (0x20000000U)
+#define LPUART_STAT_MSBF_SHIFT    (29U)
+#define LPUART_STAT_MSBF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)
+#define LPUART_STAT_RXEDGIF_MASK  (0x40000000U)
+#define LPUART_STAT_RXEDGIF_SHIFT (30U)
+#define LPUART_STAT_RXEDGIF(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)
+#define LPUART_STAT_LBKDIF_MASK   (0x80000000U)
+#define LPUART_STAT_LBKDIF_SHIFT  (31U)
+#define LPUART_STAT_LBKDIF(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)
 /*! @} */
 
 /*! @name CTRL - LPUART Control Register */
 /*! @{ */
-#define LPUART_CTRL_PT_MASK                      (0x1U)
-#define LPUART_CTRL_PT_SHIFT                     (0U)
-#define LPUART_CTRL_PT(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)
-#define LPUART_CTRL_PE_MASK                      (0x2U)
-#define LPUART_CTRL_PE_SHIFT                     (1U)
-#define LPUART_CTRL_PE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)
-#define LPUART_CTRL_ILT_MASK                     (0x4U)
-#define LPUART_CTRL_ILT_SHIFT                    (2U)
-#define LPUART_CTRL_ILT(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)
-#define LPUART_CTRL_WAKE_MASK                    (0x8U)
-#define LPUART_CTRL_WAKE_SHIFT                   (3U)
-#define LPUART_CTRL_WAKE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)
-#define LPUART_CTRL_M_MASK                       (0x10U)
-#define LPUART_CTRL_M_SHIFT                      (4U)
-#define LPUART_CTRL_M(x)                         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)
-#define LPUART_CTRL_RSRC_MASK                    (0x20U)
-#define LPUART_CTRL_RSRC_SHIFT                   (5U)
-#define LPUART_CTRL_RSRC(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)
-#define LPUART_CTRL_DOZEEN_MASK                  (0x40U)
-#define LPUART_CTRL_DOZEEN_SHIFT                 (6U)
-#define LPUART_CTRL_DOZEEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)
-#define LPUART_CTRL_LOOPS_MASK                   (0x80U)
-#define LPUART_CTRL_LOOPS_SHIFT                  (7U)
-#define LPUART_CTRL_LOOPS(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)
-#define LPUART_CTRL_IDLECFG_MASK                 (0x700U)
-#define LPUART_CTRL_IDLECFG_SHIFT                (8U)
-#define LPUART_CTRL_IDLECFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)
-#define LPUART_CTRL_M7_MASK                      (0x800U)
-#define LPUART_CTRL_M7_SHIFT                     (11U)
-#define LPUART_CTRL_M7(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)
-#define LPUART_CTRL_MA2IE_MASK                   (0x4000U)
-#define LPUART_CTRL_MA2IE_SHIFT                  (14U)
-#define LPUART_CTRL_MA2IE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)
-#define LPUART_CTRL_MA1IE_MASK                   (0x8000U)
-#define LPUART_CTRL_MA1IE_SHIFT                  (15U)
-#define LPUART_CTRL_MA1IE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)
-#define LPUART_CTRL_SBK_MASK                     (0x10000U)
-#define LPUART_CTRL_SBK_SHIFT                    (16U)
-#define LPUART_CTRL_SBK(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)
-#define LPUART_CTRL_RWU_MASK                     (0x20000U)
-#define LPUART_CTRL_RWU_SHIFT                    (17U)
-#define LPUART_CTRL_RWU(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)
-#define LPUART_CTRL_RE_MASK                      (0x40000U)
-#define LPUART_CTRL_RE_SHIFT                     (18U)
-#define LPUART_CTRL_RE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)
-#define LPUART_CTRL_TE_MASK                      (0x80000U)
-#define LPUART_CTRL_TE_SHIFT                     (19U)
-#define LPUART_CTRL_TE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)
-#define LPUART_CTRL_ILIE_MASK                    (0x100000U)
-#define LPUART_CTRL_ILIE_SHIFT                   (20U)
-#define LPUART_CTRL_ILIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)
-#define LPUART_CTRL_RIE_MASK                     (0x200000U)
-#define LPUART_CTRL_RIE_SHIFT                    (21U)
-#define LPUART_CTRL_RIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)
-#define LPUART_CTRL_TCIE_MASK                    (0x400000U)
-#define LPUART_CTRL_TCIE_SHIFT                   (22U)
-#define LPUART_CTRL_TCIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)
-#define LPUART_CTRL_TIE_MASK                     (0x800000U)
-#define LPUART_CTRL_TIE_SHIFT                    (23U)
-#define LPUART_CTRL_TIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)
-#define LPUART_CTRL_PEIE_MASK                    (0x1000000U)
-#define LPUART_CTRL_PEIE_SHIFT                   (24U)
-#define LPUART_CTRL_PEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)
-#define LPUART_CTRL_FEIE_MASK                    (0x2000000U)
-#define LPUART_CTRL_FEIE_SHIFT                   (25U)
-#define LPUART_CTRL_FEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)
-#define LPUART_CTRL_NEIE_MASK                    (0x4000000U)
-#define LPUART_CTRL_NEIE_SHIFT                   (26U)
-#define LPUART_CTRL_NEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)
-#define LPUART_CTRL_ORIE_MASK                    (0x8000000U)
-#define LPUART_CTRL_ORIE_SHIFT                   (27U)
-#define LPUART_CTRL_ORIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)
-#define LPUART_CTRL_TXINV_MASK                   (0x10000000U)
-#define LPUART_CTRL_TXINV_SHIFT                  (28U)
-#define LPUART_CTRL_TXINV(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)
-#define LPUART_CTRL_TXDIR_MASK                   (0x20000000U)
-#define LPUART_CTRL_TXDIR_SHIFT                  (29U)
-#define LPUART_CTRL_TXDIR(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)
-#define LPUART_CTRL_R9T8_MASK                    (0x40000000U)
-#define LPUART_CTRL_R9T8_SHIFT                   (30U)
-#define LPUART_CTRL_R9T8(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)
-#define LPUART_CTRL_R8T9_MASK                    (0x80000000U)
-#define LPUART_CTRL_R8T9_SHIFT                   (31U)
-#define LPUART_CTRL_R8T9(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)
+#define LPUART_CTRL_PT_MASK       (0x1U)
+#define LPUART_CTRL_PT_SHIFT      (0U)
+#define LPUART_CTRL_PT(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)
+#define LPUART_CTRL_PE_MASK       (0x2U)
+#define LPUART_CTRL_PE_SHIFT      (1U)
+#define LPUART_CTRL_PE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)
+#define LPUART_CTRL_ILT_MASK      (0x4U)
+#define LPUART_CTRL_ILT_SHIFT     (2U)
+#define LPUART_CTRL_ILT(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)
+#define LPUART_CTRL_WAKE_MASK     (0x8U)
+#define LPUART_CTRL_WAKE_SHIFT    (3U)
+#define LPUART_CTRL_WAKE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)
+#define LPUART_CTRL_M_MASK        (0x10U)
+#define LPUART_CTRL_M_SHIFT       (4U)
+#define LPUART_CTRL_M(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)
+#define LPUART_CTRL_RSRC_MASK     (0x20U)
+#define LPUART_CTRL_RSRC_SHIFT    (5U)
+#define LPUART_CTRL_RSRC(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)
+#define LPUART_CTRL_DOZEEN_MASK   (0x40U)
+#define LPUART_CTRL_DOZEEN_SHIFT  (6U)
+#define LPUART_CTRL_DOZEEN(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)
+#define LPUART_CTRL_LOOPS_MASK    (0x80U)
+#define LPUART_CTRL_LOOPS_SHIFT   (7U)
+#define LPUART_CTRL_LOOPS(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)
+#define LPUART_CTRL_IDLECFG_MASK  (0x700U)
+#define LPUART_CTRL_IDLECFG_SHIFT (8U)
+#define LPUART_CTRL_IDLECFG(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)
+#define LPUART_CTRL_M7_MASK       (0x800U)
+#define LPUART_CTRL_M7_SHIFT      (11U)
+#define LPUART_CTRL_M7(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)
+#define LPUART_CTRL_MA2IE_MASK    (0x4000U)
+#define LPUART_CTRL_MA2IE_SHIFT   (14U)
+#define LPUART_CTRL_MA2IE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)
+#define LPUART_CTRL_MA1IE_MASK    (0x8000U)
+#define LPUART_CTRL_MA1IE_SHIFT   (15U)
+#define LPUART_CTRL_MA1IE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)
+#define LPUART_CTRL_SBK_MASK      (0x10000U)
+#define LPUART_CTRL_SBK_SHIFT     (16U)
+#define LPUART_CTRL_SBK(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)
+#define LPUART_CTRL_RWU_MASK      (0x20000U)
+#define LPUART_CTRL_RWU_SHIFT     (17U)
+#define LPUART_CTRL_RWU(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)
+#define LPUART_CTRL_RE_MASK       (0x40000U)
+#define LPUART_CTRL_RE_SHIFT      (18U)
+#define LPUART_CTRL_RE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)
+#define LPUART_CTRL_TE_MASK       (0x80000U)
+#define LPUART_CTRL_TE_SHIFT      (19U)
+#define LPUART_CTRL_TE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)
+#define LPUART_CTRL_ILIE_MASK     (0x100000U)
+#define LPUART_CTRL_ILIE_SHIFT    (20U)
+#define LPUART_CTRL_ILIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)
+#define LPUART_CTRL_RIE_MASK      (0x200000U)
+#define LPUART_CTRL_RIE_SHIFT     (21U)
+#define LPUART_CTRL_RIE(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)
+#define LPUART_CTRL_TCIE_MASK     (0x400000U)
+#define LPUART_CTRL_TCIE_SHIFT    (22U)
+#define LPUART_CTRL_TCIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)
+#define LPUART_CTRL_TIE_MASK      (0x800000U)
+#define LPUART_CTRL_TIE_SHIFT     (23U)
+#define LPUART_CTRL_TIE(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)
+#define LPUART_CTRL_PEIE_MASK     (0x1000000U)
+#define LPUART_CTRL_PEIE_SHIFT    (24U)
+#define LPUART_CTRL_PEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)
+#define LPUART_CTRL_FEIE_MASK     (0x2000000U)
+#define LPUART_CTRL_FEIE_SHIFT    (25U)
+#define LPUART_CTRL_FEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)
+#define LPUART_CTRL_NEIE_MASK     (0x4000000U)
+#define LPUART_CTRL_NEIE_SHIFT    (26U)
+#define LPUART_CTRL_NEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)
+#define LPUART_CTRL_ORIE_MASK     (0x8000000U)
+#define LPUART_CTRL_ORIE_SHIFT    (27U)
+#define LPUART_CTRL_ORIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)
+#define LPUART_CTRL_TXINV_MASK    (0x10000000U)
+#define LPUART_CTRL_TXINV_SHIFT   (28U)
+#define LPUART_CTRL_TXINV(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)
+#define LPUART_CTRL_TXDIR_MASK    (0x20000000U)
+#define LPUART_CTRL_TXDIR_SHIFT   (29U)
+#define LPUART_CTRL_TXDIR(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)
+#define LPUART_CTRL_R9T8_MASK     (0x40000000U)
+#define LPUART_CTRL_R9T8_SHIFT    (30U)
+#define LPUART_CTRL_R9T8(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)
+#define LPUART_CTRL_R8T9_MASK     (0x80000000U)
+#define LPUART_CTRL_R8T9_SHIFT    (31U)
+#define LPUART_CTRL_R8T9(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)
 /*! @} */
 
 /*! @name DATA - LPUART Data Register */
 /*! @{ */
-#define LPUART_DATA_R0T0_MASK                    (0x1U)
-#define LPUART_DATA_R0T0_SHIFT                   (0U)
-#define LPUART_DATA_R0T0(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)
-#define LPUART_DATA_R1T1_MASK                    (0x2U)
-#define LPUART_DATA_R1T1_SHIFT                   (1U)
-#define LPUART_DATA_R1T1(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)
-#define LPUART_DATA_R2T2_MASK                    (0x4U)
-#define LPUART_DATA_R2T2_SHIFT                   (2U)
-#define LPUART_DATA_R2T2(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)
-#define LPUART_DATA_R3T3_MASK                    (0x8U)
-#define LPUART_DATA_R3T3_SHIFT                   (3U)
-#define LPUART_DATA_R3T3(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)
-#define LPUART_DATA_R4T4_MASK                    (0x10U)
-#define LPUART_DATA_R4T4_SHIFT                   (4U)
-#define LPUART_DATA_R4T4(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)
-#define LPUART_DATA_R5T5_MASK                    (0x20U)
-#define LPUART_DATA_R5T5_SHIFT                   (5U)
-#define LPUART_DATA_R5T5(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)
-#define LPUART_DATA_R6T6_MASK                    (0x40U)
-#define LPUART_DATA_R6T6_SHIFT                   (6U)
-#define LPUART_DATA_R6T6(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)
-#define LPUART_DATA_R7T7_MASK                    (0x80U)
-#define LPUART_DATA_R7T7_SHIFT                   (7U)
-#define LPUART_DATA_R7T7(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)
-#define LPUART_DATA_R8T8_MASK                    (0x100U)
-#define LPUART_DATA_R8T8_SHIFT                   (8U)
-#define LPUART_DATA_R8T8(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)
-#define LPUART_DATA_R9T9_MASK                    (0x200U)
-#define LPUART_DATA_R9T9_SHIFT                   (9U)
-#define LPUART_DATA_R9T9(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)
-#define LPUART_DATA_IDLINE_MASK                  (0x800U)
-#define LPUART_DATA_IDLINE_SHIFT                 (11U)
-#define LPUART_DATA_IDLINE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)
-#define LPUART_DATA_RXEMPT_MASK                  (0x1000U)
-#define LPUART_DATA_RXEMPT_SHIFT                 (12U)
-#define LPUART_DATA_RXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)
-#define LPUART_DATA_FRETSC_MASK                  (0x2000U)
-#define LPUART_DATA_FRETSC_SHIFT                 (13U)
-#define LPUART_DATA_FRETSC(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)
-#define LPUART_DATA_PARITYE_MASK                 (0x4000U)
-#define LPUART_DATA_PARITYE_SHIFT                (14U)
-#define LPUART_DATA_PARITYE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)
-#define LPUART_DATA_NOISY_MASK                   (0x8000U)
-#define LPUART_DATA_NOISY_SHIFT                  (15U)
-#define LPUART_DATA_NOISY(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)
+#define LPUART_DATA_R0T0_MASK     (0x1U)
+#define LPUART_DATA_R0T0_SHIFT    (0U)
+#define LPUART_DATA_R0T0(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)
+#define LPUART_DATA_R1T1_MASK     (0x2U)
+#define LPUART_DATA_R1T1_SHIFT    (1U)
+#define LPUART_DATA_R1T1(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)
+#define LPUART_DATA_R2T2_MASK     (0x4U)
+#define LPUART_DATA_R2T2_SHIFT    (2U)
+#define LPUART_DATA_R2T2(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)
+#define LPUART_DATA_R3T3_MASK     (0x8U)
+#define LPUART_DATA_R3T3_SHIFT    (3U)
+#define LPUART_DATA_R3T3(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)
+#define LPUART_DATA_R4T4_MASK     (0x10U)
+#define LPUART_DATA_R4T4_SHIFT    (4U)
+#define LPUART_DATA_R4T4(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)
+#define LPUART_DATA_R5T5_MASK     (0x20U)
+#define LPUART_DATA_R5T5_SHIFT    (5U)
+#define LPUART_DATA_R5T5(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)
+#define LPUART_DATA_R6T6_MASK     (0x40U)
+#define LPUART_DATA_R6T6_SHIFT    (6U)
+#define LPUART_DATA_R6T6(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)
+#define LPUART_DATA_R7T7_MASK     (0x80U)
+#define LPUART_DATA_R7T7_SHIFT    (7U)
+#define LPUART_DATA_R7T7(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)
+#define LPUART_DATA_R8T8_MASK     (0x100U)
+#define LPUART_DATA_R8T8_SHIFT    (8U)
+#define LPUART_DATA_R8T8(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)
+#define LPUART_DATA_R9T9_MASK     (0x200U)
+#define LPUART_DATA_R9T9_SHIFT    (9U)
+#define LPUART_DATA_R9T9(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)
+#define LPUART_DATA_IDLINE_MASK   (0x800U)
+#define LPUART_DATA_IDLINE_SHIFT  (11U)
+#define LPUART_DATA_IDLINE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)
+#define LPUART_DATA_RXEMPT_MASK   (0x1000U)
+#define LPUART_DATA_RXEMPT_SHIFT  (12U)
+#define LPUART_DATA_RXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)
+#define LPUART_DATA_FRETSC_MASK   (0x2000U)
+#define LPUART_DATA_FRETSC_SHIFT  (13U)
+#define LPUART_DATA_FRETSC(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)
+#define LPUART_DATA_PARITYE_MASK  (0x4000U)
+#define LPUART_DATA_PARITYE_SHIFT (14U)
+#define LPUART_DATA_PARITYE(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)
+#define LPUART_DATA_NOISY_MASK    (0x8000U)
+#define LPUART_DATA_NOISY_SHIFT   (15U)
+#define LPUART_DATA_NOISY(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)
 /*! @} */
 
 /*! @name MATCH - LPUART Match Address Register */
 /*! @{ */
-#define LPUART_MATCH_MA1_MASK                    (0x3FFU)
-#define LPUART_MATCH_MA1_SHIFT                   (0U)
-#define LPUART_MATCH_MA1(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)
-#define LPUART_MATCH_MA2_MASK                    (0x3FF0000U)
-#define LPUART_MATCH_MA2_SHIFT                   (16U)
-#define LPUART_MATCH_MA2(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)
+#define LPUART_MATCH_MA1_MASK  (0x3FFU)
+#define LPUART_MATCH_MA1_SHIFT (0U)
+#define LPUART_MATCH_MA1(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)
+#define LPUART_MATCH_MA2_MASK  (0x3FF0000U)
+#define LPUART_MATCH_MA2_SHIFT (16U)
+#define LPUART_MATCH_MA2(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)
 /*! @} */
 
 /*! @name MODIR - LPUART Modem IrDA Register */
 /*! @{ */
-#define LPUART_MODIR_TXCTSE_MASK                 (0x1U)
-#define LPUART_MODIR_TXCTSE_SHIFT                (0U)
-#define LPUART_MODIR_TXCTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)
-#define LPUART_MODIR_TXRTSE_MASK                 (0x2U)
-#define LPUART_MODIR_TXRTSE_SHIFT                (1U)
-#define LPUART_MODIR_TXRTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)
-#define LPUART_MODIR_TXRTSPOL_MASK               (0x4U)
-#define LPUART_MODIR_TXRTSPOL_SHIFT              (2U)
-#define LPUART_MODIR_TXRTSPOL(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)
-#define LPUART_MODIR_RXRTSE_MASK                 (0x8U)
-#define LPUART_MODIR_RXRTSE_SHIFT                (3U)
-#define LPUART_MODIR_RXRTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)
-#define LPUART_MODIR_TXCTSC_MASK                 (0x10U)
-#define LPUART_MODIR_TXCTSC_SHIFT                (4U)
-#define LPUART_MODIR_TXCTSC(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)
-#define LPUART_MODIR_TXCTSSRC_MASK               (0x20U)
-#define LPUART_MODIR_TXCTSSRC_SHIFT              (5U)
-#define LPUART_MODIR_TXCTSSRC(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)
-#define LPUART_MODIR_RTSWATER_MASK               (0x300U)
-#define LPUART_MODIR_RTSWATER_SHIFT              (8U)
-#define LPUART_MODIR_RTSWATER(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)
-#define LPUART_MODIR_TNP_MASK                    (0x30000U)
-#define LPUART_MODIR_TNP_SHIFT                   (16U)
-#define LPUART_MODIR_TNP(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)
-#define LPUART_MODIR_IREN_MASK                   (0x40000U)
-#define LPUART_MODIR_IREN_SHIFT                  (18U)
-#define LPUART_MODIR_IREN(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)
+#define LPUART_MODIR_TXCTSE_MASK    (0x1U)
+#define LPUART_MODIR_TXCTSE_SHIFT   (0U)
+#define LPUART_MODIR_TXCTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)
+#define LPUART_MODIR_TXRTSE_MASK    (0x2U)
+#define LPUART_MODIR_TXRTSE_SHIFT   (1U)
+#define LPUART_MODIR_TXRTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)
+#define LPUART_MODIR_TXRTSPOL_MASK  (0x4U)
+#define LPUART_MODIR_TXRTSPOL_SHIFT (2U)
+#define LPUART_MODIR_TXRTSPOL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)
+#define LPUART_MODIR_RXRTSE_MASK    (0x8U)
+#define LPUART_MODIR_RXRTSE_SHIFT   (3U)
+#define LPUART_MODIR_RXRTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)
+#define LPUART_MODIR_TXCTSC_MASK    (0x10U)
+#define LPUART_MODIR_TXCTSC_SHIFT   (4U)
+#define LPUART_MODIR_TXCTSC(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)
+#define LPUART_MODIR_TXCTSSRC_MASK  (0x20U)
+#define LPUART_MODIR_TXCTSSRC_SHIFT (5U)
+#define LPUART_MODIR_TXCTSSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)
+#define LPUART_MODIR_RTSWATER_MASK  (0x300U)
+#define LPUART_MODIR_RTSWATER_SHIFT (8U)
+#define LPUART_MODIR_RTSWATER(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)
+#define LPUART_MODIR_TNP_MASK   (0x30000U)
+#define LPUART_MODIR_TNP_SHIFT  (16U)
+#define LPUART_MODIR_TNP(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)
+#define LPUART_MODIR_IREN_MASK  (0x40000U)
+#define LPUART_MODIR_IREN_SHIFT (18U)
+#define LPUART_MODIR_IREN(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)
 /*! @} */
 
 /*! @name FIFO - LPUART FIFO Register */
 /*! @{ */
-#define LPUART_FIFO_RXFIFOSIZE_MASK              (0x7U)
-#define LPUART_FIFO_RXFIFOSIZE_SHIFT             (0U)
-#define LPUART_FIFO_RXFIFOSIZE(x)                (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)
-#define LPUART_FIFO_RXFE_MASK                    (0x8U)
-#define LPUART_FIFO_RXFE_SHIFT                   (3U)
-#define LPUART_FIFO_RXFE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)
-#define LPUART_FIFO_TXFIFOSIZE_MASK              (0x70U)
-#define LPUART_FIFO_TXFIFOSIZE_SHIFT             (4U)
-#define LPUART_FIFO_TXFIFOSIZE(x)                (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)
-#define LPUART_FIFO_TXFE_MASK                    (0x80U)
-#define LPUART_FIFO_TXFE_SHIFT                   (7U)
-#define LPUART_FIFO_TXFE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)
-#define LPUART_FIFO_RXUFE_MASK                   (0x100U)
-#define LPUART_FIFO_RXUFE_SHIFT                  (8U)
-#define LPUART_FIFO_RXUFE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)
-#define LPUART_FIFO_TXOFE_MASK                   (0x200U)
-#define LPUART_FIFO_TXOFE_SHIFT                  (9U)
-#define LPUART_FIFO_TXOFE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)
-#define LPUART_FIFO_RXIDEN_MASK                  (0x1C00U)
-#define LPUART_FIFO_RXIDEN_SHIFT                 (10U)
-#define LPUART_FIFO_RXIDEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)
-#define LPUART_FIFO_RXFLUSH_MASK                 (0x4000U)
-#define LPUART_FIFO_RXFLUSH_SHIFT                (14U)
-#define LPUART_FIFO_RXFLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)
-#define LPUART_FIFO_TXFLUSH_MASK                 (0x8000U)
-#define LPUART_FIFO_TXFLUSH_SHIFT                (15U)
-#define LPUART_FIFO_TXFLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)
-#define LPUART_FIFO_RXUF_MASK                    (0x10000U)
-#define LPUART_FIFO_RXUF_SHIFT                   (16U)
-#define LPUART_FIFO_RXUF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)
-#define LPUART_FIFO_TXOF_MASK                    (0x20000U)
-#define LPUART_FIFO_TXOF_SHIFT                   (17U)
-#define LPUART_FIFO_TXOF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)
-#define LPUART_FIFO_RXEMPT_MASK                  (0x400000U)
-#define LPUART_FIFO_RXEMPT_SHIFT                 (22U)
-#define LPUART_FIFO_RXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)
-#define LPUART_FIFO_TXEMPT_MASK                  (0x800000U)
-#define LPUART_FIFO_TXEMPT_SHIFT                 (23U)
-#define LPUART_FIFO_TXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)
+#define LPUART_FIFO_RXFIFOSIZE_MASK  (0x7U)
+#define LPUART_FIFO_RXFIFOSIZE_SHIFT (0U)
+#define LPUART_FIFO_RXFIFOSIZE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)
+#define LPUART_FIFO_RXFE_MASK        (0x8U)
+#define LPUART_FIFO_RXFE_SHIFT       (3U)
+#define LPUART_FIFO_RXFE(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)
+#define LPUART_FIFO_TXFIFOSIZE_MASK  (0x70U)
+#define LPUART_FIFO_TXFIFOSIZE_SHIFT (4U)
+#define LPUART_FIFO_TXFIFOSIZE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)
+#define LPUART_FIFO_TXFE_MASK     (0x80U)
+#define LPUART_FIFO_TXFE_SHIFT    (7U)
+#define LPUART_FIFO_TXFE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)
+#define LPUART_FIFO_RXUFE_MASK    (0x100U)
+#define LPUART_FIFO_RXUFE_SHIFT   (8U)
+#define LPUART_FIFO_RXUFE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)
+#define LPUART_FIFO_TXOFE_MASK    (0x200U)
+#define LPUART_FIFO_TXOFE_SHIFT   (9U)
+#define LPUART_FIFO_TXOFE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)
+#define LPUART_FIFO_RXIDEN_MASK   (0x1C00U)
+#define LPUART_FIFO_RXIDEN_SHIFT  (10U)
+#define LPUART_FIFO_RXIDEN(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)
+#define LPUART_FIFO_RXFLUSH_MASK  (0x4000U)
+#define LPUART_FIFO_RXFLUSH_SHIFT (14U)
+#define LPUART_FIFO_RXFLUSH(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)
+#define LPUART_FIFO_TXFLUSH_MASK  (0x8000U)
+#define LPUART_FIFO_TXFLUSH_SHIFT (15U)
+#define LPUART_FIFO_TXFLUSH(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)
+#define LPUART_FIFO_RXUF_MASK     (0x10000U)
+#define LPUART_FIFO_RXUF_SHIFT    (16U)
+#define LPUART_FIFO_RXUF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)
+#define LPUART_FIFO_TXOF_MASK     (0x20000U)
+#define LPUART_FIFO_TXOF_SHIFT    (17U)
+#define LPUART_FIFO_TXOF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)
+#define LPUART_FIFO_RXEMPT_MASK   (0x400000U)
+#define LPUART_FIFO_RXEMPT_SHIFT  (22U)
+#define LPUART_FIFO_RXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)
+#define LPUART_FIFO_TXEMPT_MASK   (0x800000U)
+#define LPUART_FIFO_TXEMPT_SHIFT  (23U)
+#define LPUART_FIFO_TXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)
 /*! @} */
 
 /*! @name WATER - LPUART Watermark Register */
 /*! @{ */
-#define LPUART_WATER_TXWATER_MASK                (0x3U)
-#define LPUART_WATER_TXWATER_SHIFT               (0U)
-#define LPUART_WATER_TXWATER(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)
-#define LPUART_WATER_TXCOUNT_MASK                (0x700U)
-#define LPUART_WATER_TXCOUNT_SHIFT               (8U)
-#define LPUART_WATER_TXCOUNT(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)
-#define LPUART_WATER_RXWATER_MASK                (0x30000U)
-#define LPUART_WATER_RXWATER_SHIFT               (16U)
-#define LPUART_WATER_RXWATER(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)
-#define LPUART_WATER_RXCOUNT_MASK                (0x7000000U)
-#define LPUART_WATER_RXCOUNT_SHIFT               (24U)
-#define LPUART_WATER_RXCOUNT(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)
+#define LPUART_WATER_TXWATER_MASK  (0x3U)
+#define LPUART_WATER_TXWATER_SHIFT (0U)
+#define LPUART_WATER_TXWATER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)
+#define LPUART_WATER_TXCOUNT_MASK  (0x700U)
+#define LPUART_WATER_TXCOUNT_SHIFT (8U)
+#define LPUART_WATER_TXCOUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)
+#define LPUART_WATER_RXWATER_MASK  (0x30000U)
+#define LPUART_WATER_RXWATER_SHIFT (16U)
+#define LPUART_WATER_RXWATER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)
+#define LPUART_WATER_RXCOUNT_MASK  (0x7000000U)
+#define LPUART_WATER_RXCOUNT_SHIFT (24U)
+#define LPUART_WATER_RXCOUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPUART_Register_Masks */
 
-
 /* LPUART - Peripheral instance base addresses */
 /** Peripheral LPUART1 base address */
-#define LPUART1_BASE                             (0x40184000u)
+#define LPUART1_BASE (0x40184000u)
 /** Peripheral LPUART1 base pointer */
-#define LPUART1                                  ((LPUART_Type *)LPUART1_BASE)
+#define LPUART1 ((LPUART_Type *)LPUART1_BASE)
 /** Peripheral LPUART2 base address */
-#define LPUART2_BASE                             (0x40188000u)
+#define LPUART2_BASE (0x40188000u)
 /** Peripheral LPUART2 base pointer */
-#define LPUART2                                  ((LPUART_Type *)LPUART2_BASE)
+#define LPUART2 ((LPUART_Type *)LPUART2_BASE)
 /** Peripheral LPUART3 base address */
-#define LPUART3_BASE                             (0x4018C000u)
+#define LPUART3_BASE (0x4018C000u)
 /** Peripheral LPUART3 base pointer */
-#define LPUART3                                  ((LPUART_Type *)LPUART3_BASE)
+#define LPUART3 ((LPUART_Type *)LPUART3_BASE)
 /** Peripheral LPUART4 base address */
-#define LPUART4_BASE                             (0x40190000u)
+#define LPUART4_BASE (0x40190000u)
 /** Peripheral LPUART4 base pointer */
-#define LPUART4                                  ((LPUART_Type *)LPUART4_BASE)
+#define LPUART4 ((LPUART_Type *)LPUART4_BASE)
 /** Peripheral LPUART5 base address */
-#define LPUART5_BASE                             (0x40194000u)
+#define LPUART5_BASE (0x40194000u)
 /** Peripheral LPUART5 base pointer */
-#define LPUART5                                  ((LPUART_Type *)LPUART5_BASE)
+#define LPUART5 ((LPUART_Type *)LPUART5_BASE)
 /** Peripheral LPUART6 base address */
-#define LPUART6_BASE                             (0x40198000u)
+#define LPUART6_BASE (0x40198000u)
 /** Peripheral LPUART6 base pointer */
-#define LPUART6                                  ((LPUART_Type *)LPUART6_BASE)
+#define LPUART6 ((LPUART_Type *)LPUART6_BASE)
 /** Peripheral LPUART7 base address */
-#define LPUART7_BASE                             (0x4019C000u)
+#define LPUART7_BASE (0x4019C000u)
 /** Peripheral LPUART7 base pointer */
-#define LPUART7                                  ((LPUART_Type *)LPUART7_BASE)
+#define LPUART7 ((LPUART_Type *)LPUART7_BASE)
 /** Peripheral LPUART8 base address */
-#define LPUART8_BASE                             (0x401A0000u)
+#define LPUART8_BASE (0x401A0000u)
 /** Peripheral LPUART8 base pointer */
-#define LPUART8                                  ((LPUART_Type *)LPUART8_BASE)
+#define LPUART8 ((LPUART_Type *)LPUART8_BASE)
 /** Array initializer of LPUART peripheral base addresses */
-#define LPUART_BASE_ADDRS                        { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE }
+#define LPUART_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE,          \
+            LPUART8_BASE                                                                                               \
+    }
 /** Array initializer of LPUART peripheral base pointers */
-#define LPUART_BASE_PTRS                         { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }
+#define LPUART_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8                      \
+    }
 /** Interrupt vectors for the LPUART peripheral type */
-#define LPUART_RX_TX_IRQS                        { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn }
+#define LPUART_RX_TX_IRQS                                                                                              \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn,             \
+            LPUART7_IRQn, LPUART8_IRQn                                                                                 \
+    }
 
 /*!
  * @}
  */ /* end of group LPUART_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- OCOTP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15143,107 +17364,108 @@ typedef struct {
  */
 
 /** OCOTP - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< OTP Controller Control Register, offset: 0x0 */
-  __IO uint32_t CTRL_SET;                          /**< OTP Controller Control Register, offset: 0x4 */
-  __IO uint32_t CTRL_CLR;                          /**< OTP Controller Control Register, offset: 0x8 */
-  __IO uint32_t CTRL_TOG;                          /**< OTP Controller Control Register, offset: 0xC */
-  __IO uint32_t TIMING;                            /**< OTP Controller Timing Register, offset: 0x10 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t DATA;                              /**< OTP Controller Write Data Register, offset: 0x20 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t READ_CTRL;                         /**< OTP Controller Write Data Register, offset: 0x30 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t READ_FUSE_DATA;                    /**< OTP Controller Read Data Register, offset: 0x40 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t SW_STICKY;                         /**< Sticky bit Register, offset: 0x50 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t SCS;                               /**< Software Controllable Signals Register, offset: 0x60 */
-  __IO uint32_t SCS_SET;                           /**< Software Controllable Signals Register, offset: 0x64 */
-  __IO uint32_t SCS_CLR;                           /**< Software Controllable Signals Register, offset: 0x68 */
-  __IO uint32_t SCS_TOG;                           /**< Software Controllable Signals Register, offset: 0x6C */
-       uint8_t RESERVED_5[32];
-  __I  uint32_t VERSION;                           /**< OTP Controller Version Register, offset: 0x90 */
-       uint8_t RESERVED_6[108];
-  __IO uint32_t TIMING2;                           /**< OTP Controller Timing Register 2, offset: 0x100 */
-       uint8_t RESERVED_7[764];
-  __IO uint32_t LOCK;                              /**< Value of OTP Bank0 Word0 (Lock controls), offset: 0x400 */
-       uint8_t RESERVED_8[12];
-  __IO uint32_t CFG0;                              /**< Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.), offset: 0x410 */
-       uint8_t RESERVED_9[12];
-  __IO uint32_t CFG1;                              /**< Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.), offset: 0x420 */
-       uint8_t RESERVED_10[12];
-  __IO uint32_t CFG2;                              /**< Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.), offset: 0x430 */
-       uint8_t RESERVED_11[12];
-  __IO uint32_t CFG3;                              /**< Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.), offset: 0x440 */
-       uint8_t RESERVED_12[12];
-  __IO uint32_t CFG4;                              /**< Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.), offset: 0x450 */
-       uint8_t RESERVED_13[12];
-  __IO uint32_t CFG5;                              /**< Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.), offset: 0x460 */
-       uint8_t RESERVED_14[12];
-  __IO uint32_t CFG6;                              /**< Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.), offset: 0x470 */
-       uint8_t RESERVED_15[12];
-  __IO uint32_t MEM0;                              /**< Value of OTP Bank1 Word0 (Memory Related Info.), offset: 0x480 */
-       uint8_t RESERVED_16[12];
-  __IO uint32_t MEM1;                              /**< Value of OTP Bank1 Word1 (Memory Related Info.), offset: 0x490 */
-       uint8_t RESERVED_17[12];
-  __IO uint32_t MEM2;                              /**< Value of OTP Bank1 Word2 (Memory Related Info.), offset: 0x4A0 */
-       uint8_t RESERVED_18[12];
-  __IO uint32_t MEM3;                              /**< Value of OTP Bank1 Word3 (Memory Related Info.), offset: 0x4B0 */
-       uint8_t RESERVED_19[12];
-  __IO uint32_t MEM4;                              /**< Value of OTP Bank1 Word4 (Memory Related Info.), offset: 0x4C0 */
-       uint8_t RESERVED_20[12];
-  __IO uint32_t ANA0;                              /**< Value of OTP Bank1 Word5 (Analog Info.), offset: 0x4D0 */
-       uint8_t RESERVED_21[12];
-  __IO uint32_t ANA1;                              /**< Value of OTP Bank1 Word6 (Analog Info.), offset: 0x4E0 */
-       uint8_t RESERVED_22[12];
-  __IO uint32_t ANA2;                              /**< Value of OTP Bank1 Word7 (Analog Info.), offset: 0x4F0 */
-       uint8_t RESERVED_23[140];
-  __IO uint32_t SRK0;                              /**< Shadow Register for OTP Bank3 Word0 (SRK Hash), offset: 0x580 */
-       uint8_t RESERVED_24[12];
-  __IO uint32_t SRK1;                              /**< Shadow Register for OTP Bank3 Word1 (SRK Hash), offset: 0x590 */
-       uint8_t RESERVED_25[12];
-  __IO uint32_t SRK2;                              /**< Shadow Register for OTP Bank3 Word2 (SRK Hash), offset: 0x5A0 */
-       uint8_t RESERVED_26[12];
-  __IO uint32_t SRK3;                              /**< Shadow Register for OTP Bank3 Word3 (SRK Hash), offset: 0x5B0 */
-       uint8_t RESERVED_27[12];
-  __IO uint32_t SRK4;                              /**< Shadow Register for OTP Bank3 Word4 (SRK Hash), offset: 0x5C0 */
-       uint8_t RESERVED_28[12];
-  __IO uint32_t SRK5;                              /**< Shadow Register for OTP Bank3 Word5 (SRK Hash), offset: 0x5D0 */
-       uint8_t RESERVED_29[12];
-  __IO uint32_t SRK6;                              /**< Shadow Register for OTP Bank3 Word6 (SRK Hash), offset: 0x5E0 */
-       uint8_t RESERVED_30[12];
-  __IO uint32_t SRK7;                              /**< Shadow Register for OTP Bank3 Word7 (SRK Hash), offset: 0x5F0 */
-       uint8_t RESERVED_31[12];
-  __IO uint32_t SJC_RESP0;                         /**< Value of OTP Bank4 Word0 (Secure JTAG Response Field), offset: 0x600 */
-       uint8_t RESERVED_32[12];
-  __IO uint32_t SJC_RESP1;                         /**< Value of OTP Bank4 Word1 (Secure JTAG Response Field), offset: 0x610 */
-       uint8_t RESERVED_33[12];
-  __IO uint32_t MAC0;                              /**< Value of OTP Bank4 Word2 (MAC Address), offset: 0x620 */
-       uint8_t RESERVED_34[12];
-  __IO uint32_t MAC1;                              /**< Value of OTP Bank4 Word3 (MAC Address), offset: 0x630 */
-       uint8_t RESERVED_35[12];
-  __IO uint32_t GP3;                               /**< Value of OTP Bank4 Word4 (MAC Address), offset: 0x640 */
-       uint8_t RESERVED_36[28];
-  __IO uint32_t GP1;                               /**< Value of OTP Bank4 Word6 (General Purpose Customer Defined Info), offset: 0x660 */
-       uint8_t RESERVED_37[12];
-  __IO uint32_t GP2;                               /**< Value of OTP Bank4 Word7 (General Purpose Customer Defined Info), offset: 0x670 */
-       uint8_t RESERVED_38[12];
-  __IO uint32_t SW_GP1;                            /**< Value of OTP Bank5 Word0 (SW GP1), offset: 0x680 */
-       uint8_t RESERVED_39[12];
-  __IO uint32_t SW_GP20;                           /**< Value of OTP Bank5 Word1 (SW GP2), offset: 0x690 */
-       uint8_t RESERVED_40[12];
-  __IO uint32_t SW_GP21;                           /**< Value of OTP Bank5 Word2 (SW GP2), offset: 0x6A0 */
-       uint8_t RESERVED_41[12];
-  __IO uint32_t SW_GP22;                           /**< Value of OTP Bank5 Word3 (SW GP2), offset: 0x6B0 */
-       uint8_t RESERVED_42[12];
-  __IO uint32_t SW_GP23;                           /**< Value of OTP Bank5 Word4 (SW GP2), offset: 0x6C0 */
-       uint8_t RESERVED_43[12];
-  __IO uint32_t MISC_CONF0;                        /**< Value of OTP Bank5 Word5 (Misc Conf), offset: 0x6D0 */
-       uint8_t RESERVED_44[12];
-  __IO uint32_t MISC_CONF1;                        /**< Value of OTP Bank5 Word6 (Misc Conf), offset: 0x6E0 */
-       uint8_t RESERVED_45[12];
-  __IO uint32_t SRK_REVOKE;                        /**< Value of OTP Bank5 Word7 (SRK Revoke), offset: 0x6F0 */
+typedef struct
+{
+    __IO uint32_t CTRL;     /**< OTP Controller Control Register, offset: 0x0 */
+    __IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4 */
+    __IO uint32_t CTRL_CLR; /**< OTP Controller Control Register, offset: 0x8 */
+    __IO uint32_t CTRL_TOG; /**< OTP Controller Control Register, offset: 0xC */
+    __IO uint32_t TIMING;   /**< OTP Controller Timing Register, offset: 0x10 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t DATA; /**< OTP Controller Write Data Register, offset: 0x20 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t READ_CTRL; /**< OTP Controller Write Data Register, offset: 0x30 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t READ_FUSE_DATA; /**< OTP Controller Read Data Register, offset: 0x40 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t SW_STICKY; /**< Sticky bit Register, offset: 0x50 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t SCS;     /**< Software Controllable Signals Register, offset: 0x60 */
+    __IO uint32_t SCS_SET; /**< Software Controllable Signals Register, offset: 0x64 */
+    __IO uint32_t SCS_CLR; /**< Software Controllable Signals Register, offset: 0x68 */
+    __IO uint32_t SCS_TOG; /**< Software Controllable Signals Register, offset: 0x6C */
+    uint8_t RESERVED_5[32];
+    __I uint32_t VERSION; /**< OTP Controller Version Register, offset: 0x90 */
+    uint8_t RESERVED_6[108];
+    __IO uint32_t TIMING2; /**< OTP Controller Timing Register 2, offset: 0x100 */
+    uint8_t RESERVED_7[764];
+    __IO uint32_t LOCK; /**< Value of OTP Bank0 Word0 (Lock controls), offset: 0x400 */
+    uint8_t RESERVED_8[12];
+    __IO uint32_t CFG0; /**< Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.), offset: 0x410 */
+    uint8_t RESERVED_9[12];
+    __IO uint32_t CFG1; /**< Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.), offset: 0x420 */
+    uint8_t RESERVED_10[12];
+    __IO uint32_t CFG2; /**< Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.), offset: 0x430 */
+    uint8_t RESERVED_11[12];
+    __IO uint32_t CFG3; /**< Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.), offset: 0x440 */
+    uint8_t RESERVED_12[12];
+    __IO uint32_t CFG4; /**< Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.), offset: 0x450 */
+    uint8_t RESERVED_13[12];
+    __IO uint32_t CFG5; /**< Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.), offset: 0x460 */
+    uint8_t RESERVED_14[12];
+    __IO uint32_t CFG6; /**< Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.), offset: 0x470 */
+    uint8_t RESERVED_15[12];
+    __IO uint32_t MEM0; /**< Value of OTP Bank1 Word0 (Memory Related Info.), offset: 0x480 */
+    uint8_t RESERVED_16[12];
+    __IO uint32_t MEM1; /**< Value of OTP Bank1 Word1 (Memory Related Info.), offset: 0x490 */
+    uint8_t RESERVED_17[12];
+    __IO uint32_t MEM2; /**< Value of OTP Bank1 Word2 (Memory Related Info.), offset: 0x4A0 */
+    uint8_t RESERVED_18[12];
+    __IO uint32_t MEM3; /**< Value of OTP Bank1 Word3 (Memory Related Info.), offset: 0x4B0 */
+    uint8_t RESERVED_19[12];
+    __IO uint32_t MEM4; /**< Value of OTP Bank1 Word4 (Memory Related Info.), offset: 0x4C0 */
+    uint8_t RESERVED_20[12];
+    __IO uint32_t ANA0; /**< Value of OTP Bank1 Word5 (Analog Info.), offset: 0x4D0 */
+    uint8_t RESERVED_21[12];
+    __IO uint32_t ANA1; /**< Value of OTP Bank1 Word6 (Analog Info.), offset: 0x4E0 */
+    uint8_t RESERVED_22[12];
+    __IO uint32_t ANA2; /**< Value of OTP Bank1 Word7 (Analog Info.), offset: 0x4F0 */
+    uint8_t RESERVED_23[140];
+    __IO uint32_t SRK0; /**< Shadow Register for OTP Bank3 Word0 (SRK Hash), offset: 0x580 */
+    uint8_t RESERVED_24[12];
+    __IO uint32_t SRK1; /**< Shadow Register for OTP Bank3 Word1 (SRK Hash), offset: 0x590 */
+    uint8_t RESERVED_25[12];
+    __IO uint32_t SRK2; /**< Shadow Register for OTP Bank3 Word2 (SRK Hash), offset: 0x5A0 */
+    uint8_t RESERVED_26[12];
+    __IO uint32_t SRK3; /**< Shadow Register for OTP Bank3 Word3 (SRK Hash), offset: 0x5B0 */
+    uint8_t RESERVED_27[12];
+    __IO uint32_t SRK4; /**< Shadow Register for OTP Bank3 Word4 (SRK Hash), offset: 0x5C0 */
+    uint8_t RESERVED_28[12];
+    __IO uint32_t SRK5; /**< Shadow Register for OTP Bank3 Word5 (SRK Hash), offset: 0x5D0 */
+    uint8_t RESERVED_29[12];
+    __IO uint32_t SRK6; /**< Shadow Register for OTP Bank3 Word6 (SRK Hash), offset: 0x5E0 */
+    uint8_t RESERVED_30[12];
+    __IO uint32_t SRK7; /**< Shadow Register for OTP Bank3 Word7 (SRK Hash), offset: 0x5F0 */
+    uint8_t RESERVED_31[12];
+    __IO uint32_t SJC_RESP0; /**< Value of OTP Bank4 Word0 (Secure JTAG Response Field), offset: 0x600 */
+    uint8_t RESERVED_32[12];
+    __IO uint32_t SJC_RESP1; /**< Value of OTP Bank4 Word1 (Secure JTAG Response Field), offset: 0x610 */
+    uint8_t RESERVED_33[12];
+    __IO uint32_t MAC0; /**< Value of OTP Bank4 Word2 (MAC Address), offset: 0x620 */
+    uint8_t RESERVED_34[12];
+    __IO uint32_t MAC1; /**< Value of OTP Bank4 Word3 (MAC Address), offset: 0x630 */
+    uint8_t RESERVED_35[12];
+    __IO uint32_t GP3; /**< Value of OTP Bank4 Word4 (MAC Address), offset: 0x640 */
+    uint8_t RESERVED_36[28];
+    __IO uint32_t GP1; /**< Value of OTP Bank4 Word6 (General Purpose Customer Defined Info), offset: 0x660 */
+    uint8_t RESERVED_37[12];
+    __IO uint32_t GP2; /**< Value of OTP Bank4 Word7 (General Purpose Customer Defined Info), offset: 0x670 */
+    uint8_t RESERVED_38[12];
+    __IO uint32_t SW_GP1; /**< Value of OTP Bank5 Word0 (SW GP1), offset: 0x680 */
+    uint8_t RESERVED_39[12];
+    __IO uint32_t SW_GP20; /**< Value of OTP Bank5 Word1 (SW GP2), offset: 0x690 */
+    uint8_t RESERVED_40[12];
+    __IO uint32_t SW_GP21; /**< Value of OTP Bank5 Word2 (SW GP2), offset: 0x6A0 */
+    uint8_t RESERVED_41[12];
+    __IO uint32_t SW_GP22; /**< Value of OTP Bank5 Word3 (SW GP2), offset: 0x6B0 */
+    uint8_t RESERVED_42[12];
+    __IO uint32_t SW_GP23; /**< Value of OTP Bank5 Word4 (SW GP2), offset: 0x6C0 */
+    uint8_t RESERVED_43[12];
+    __IO uint32_t MISC_CONF0; /**< Value of OTP Bank5 Word5 (Misc Conf), offset: 0x6D0 */
+    uint8_t RESERVED_44[12];
+    __IO uint32_t MISC_CONF1; /**< Value of OTP Bank5 Word6 (Misc Conf), offset: 0x6E0 */
+    uint8_t RESERVED_45[12];
+    __IO uint32_t SRK_REVOKE; /**< Value of OTP Bank5 Word7 (SRK Revoke), offset: 0x6F0 */
 } OCOTP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15257,559 +17479,601 @@ typedef struct {
 
 /*! @name CTRL - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_ADDR_MASK                     (0x3FU)
-#define OCOTP_CTRL_ADDR_SHIFT                    (0U)
-#define OCOTP_CTRL_ADDR(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ADDR_SHIFT)) & OCOTP_CTRL_ADDR_MASK)
-#define OCOTP_CTRL_BUSY_MASK                     (0x100U)
-#define OCOTP_CTRL_BUSY_SHIFT                    (8U)
-#define OCOTP_CTRL_BUSY(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_BUSY_SHIFT)) & OCOTP_CTRL_BUSY_MASK)
-#define OCOTP_CTRL_ERROR_MASK                    (0x200U)
-#define OCOTP_CTRL_ERROR_SHIFT                   (9U)
-#define OCOTP_CTRL_ERROR(x)                      (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ERROR_SHIFT)) & OCOTP_CTRL_ERROR_MASK)
-#define OCOTP_CTRL_RELOAD_SHADOWS_MASK           (0x400U)
-#define OCOTP_CTRL_RELOAD_SHADOWS_SHIFT          (10U)
-#define OCOTP_CTRL_RELOAD_SHADOWS(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_WR_UNLOCK_MASK                (0xFFFF0000U)
-#define OCOTP_CTRL_WR_UNLOCK_SHIFT               (16U)
-#define OCOTP_CTRL_WR_UNLOCK(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_ADDR_MASK            (0x3FU)
+#define OCOTP_CTRL_ADDR_SHIFT           (0U)
+#define OCOTP_CTRL_ADDR(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ADDR_SHIFT)) & OCOTP_CTRL_ADDR_MASK)
+#define OCOTP_CTRL_BUSY_MASK            (0x100U)
+#define OCOTP_CTRL_BUSY_SHIFT           (8U)
+#define OCOTP_CTRL_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_BUSY_SHIFT)) & OCOTP_CTRL_BUSY_MASK)
+#define OCOTP_CTRL_ERROR_MASK           (0x200U)
+#define OCOTP_CTRL_ERROR_SHIFT          (9U)
+#define OCOTP_CTRL_ERROR(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ERROR_SHIFT)) & OCOTP_CTRL_ERROR_MASK)
+#define OCOTP_CTRL_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_RELOAD_SHADOWS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_WR_UNLOCK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_SET - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_SET_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_SET_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_SET_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ADDR_SHIFT)) & OCOTP_CTRL_SET_ADDR_MASK)
-#define OCOTP_CTRL_SET_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_SET_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_SET_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_BUSY_SHIFT)) & OCOTP_CTRL_SET_BUSY_MASK)
-#define OCOTP_CTRL_SET_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_SET_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_SET_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ERROR_SHIFT)) & OCOTP_CTRL_SET_ERROR_MASK)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_SET_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_SET_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_SET_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_SET_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_SET_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_SET_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_SET_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ADDR_SHIFT)) & OCOTP_CTRL_SET_ADDR_MASK)
+#define OCOTP_CTRL_SET_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_SET_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_SET_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_BUSY_SHIFT)) & OCOTP_CTRL_SET_BUSY_MASK)
+#define OCOTP_CTRL_SET_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_SET_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_SET_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ERROR_SHIFT)) & OCOTP_CTRL_SET_ERROR_MASK)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_SET_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_SET_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_SET_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_SET_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_CLR - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_CLR_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_CLR_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_CLR_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ADDR_SHIFT)) & OCOTP_CTRL_CLR_ADDR_MASK)
-#define OCOTP_CTRL_CLR_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_CLR_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_CLR_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_BUSY_SHIFT)) & OCOTP_CTRL_CLR_BUSY_MASK)
-#define OCOTP_CTRL_CLR_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_CLR_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_CLR_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ERROR_SHIFT)) & OCOTP_CTRL_CLR_ERROR_MASK)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_CLR_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_CLR_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_CLR_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_CLR_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_CLR_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_CLR_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ADDR_SHIFT)) & OCOTP_CTRL_CLR_ADDR_MASK)
+#define OCOTP_CTRL_CLR_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_CLR_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_CLR_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_BUSY_SHIFT)) & OCOTP_CTRL_CLR_BUSY_MASK)
+#define OCOTP_CTRL_CLR_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_CLR_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_CLR_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ERROR_SHIFT)) & OCOTP_CTRL_CLR_ERROR_MASK)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_CLR_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_CLR_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_CLR_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_TOG - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_TOG_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_TOG_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_TOG_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ADDR_SHIFT)) & OCOTP_CTRL_TOG_ADDR_MASK)
-#define OCOTP_CTRL_TOG_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_TOG_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_TOG_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_BUSY_SHIFT)) & OCOTP_CTRL_TOG_BUSY_MASK)
-#define OCOTP_CTRL_TOG_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_TOG_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_TOG_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ERROR_SHIFT)) & OCOTP_CTRL_TOG_ERROR_MASK)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_TOG_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_TOG_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_TOG_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_TOG_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_TOG_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_TOG_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ADDR_SHIFT)) & OCOTP_CTRL_TOG_ADDR_MASK)
+#define OCOTP_CTRL_TOG_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_TOG_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_TOG_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_BUSY_SHIFT)) & OCOTP_CTRL_TOG_BUSY_MASK)
+#define OCOTP_CTRL_TOG_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_TOG_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_TOG_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ERROR_SHIFT)) & OCOTP_CTRL_TOG_ERROR_MASK)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_TOG_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_TOG_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_TOG_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name TIMING - OTP Controller Timing Register */
 /*! @{ */
-#define OCOTP_TIMING_STROBE_PROG_MASK            (0xFFFU)
-#define OCOTP_TIMING_STROBE_PROG_SHIFT           (0U)
-#define OCOTP_TIMING_STROBE_PROG(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_PROG_SHIFT)) & OCOTP_TIMING_STROBE_PROG_MASK)
-#define OCOTP_TIMING_RELAX_MASK                  (0xF000U)
-#define OCOTP_TIMING_RELAX_SHIFT                 (12U)
-#define OCOTP_TIMING_RELAX(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_RELAX_SHIFT)) & OCOTP_TIMING_RELAX_MASK)
-#define OCOTP_TIMING_STROBE_READ_MASK            (0x3F0000U)
-#define OCOTP_TIMING_STROBE_READ_SHIFT           (16U)
-#define OCOTP_TIMING_STROBE_READ(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_READ_SHIFT)) & OCOTP_TIMING_STROBE_READ_MASK)
-#define OCOTP_TIMING_WAIT_MASK                   (0xFC00000U)
-#define OCOTP_TIMING_WAIT_SHIFT                  (22U)
-#define OCOTP_TIMING_WAIT(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_WAIT_SHIFT)) & OCOTP_TIMING_WAIT_MASK)
+#define OCOTP_TIMING_STROBE_PROG_MASK  (0xFFFU)
+#define OCOTP_TIMING_STROBE_PROG_SHIFT (0U)
+#define OCOTP_TIMING_STROBE_PROG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_PROG_SHIFT)) & OCOTP_TIMING_STROBE_PROG_MASK)
+#define OCOTP_TIMING_RELAX_MASK        (0xF000U)
+#define OCOTP_TIMING_RELAX_SHIFT       (12U)
+#define OCOTP_TIMING_RELAX(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_RELAX_SHIFT)) & OCOTP_TIMING_RELAX_MASK)
+#define OCOTP_TIMING_STROBE_READ_MASK  (0x3F0000U)
+#define OCOTP_TIMING_STROBE_READ_SHIFT (16U)
+#define OCOTP_TIMING_STROBE_READ(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_READ_SHIFT)) & OCOTP_TIMING_STROBE_READ_MASK)
+#define OCOTP_TIMING_WAIT_MASK  (0xFC00000U)
+#define OCOTP_TIMING_WAIT_SHIFT (22U)
+#define OCOTP_TIMING_WAIT(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_WAIT_SHIFT)) & OCOTP_TIMING_WAIT_MASK)
 /*! @} */
 
 /*! @name DATA - OTP Controller Write Data Register */
 /*! @{ */
-#define OCOTP_DATA_DATA_MASK                     (0xFFFFFFFFU)
-#define OCOTP_DATA_DATA_SHIFT                    (0U)
-#define OCOTP_DATA_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_DATA_DATA_SHIFT)) & OCOTP_DATA_DATA_MASK)
+#define OCOTP_DATA_DATA_MASK  (0xFFFFFFFFU)
+#define OCOTP_DATA_DATA_SHIFT (0U)
+#define OCOTP_DATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_DATA_DATA_SHIFT)) & OCOTP_DATA_DATA_MASK)
 /*! @} */
 
 /*! @name READ_CTRL - OTP Controller Write Data Register */
 /*! @{ */
-#define OCOTP_READ_CTRL_READ_FUSE_MASK           (0x1U)
-#define OCOTP_READ_CTRL_READ_FUSE_SHIFT          (0U)
-#define OCOTP_READ_CTRL_READ_FUSE(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_CTRL_READ_FUSE_SHIFT)) & OCOTP_READ_CTRL_READ_FUSE_MASK)
+#define OCOTP_READ_CTRL_READ_FUSE_MASK  (0x1U)
+#define OCOTP_READ_CTRL_READ_FUSE_SHIFT (0U)
+#define OCOTP_READ_CTRL_READ_FUSE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_CTRL_READ_FUSE_SHIFT)) & OCOTP_READ_CTRL_READ_FUSE_MASK)
 /*! @} */
 
 /*! @name READ_FUSE_DATA - OTP Controller Read Data Register */
 /*! @{ */
-#define OCOTP_READ_FUSE_DATA_DATA_MASK           (0xFFFFFFFFU)
-#define OCOTP_READ_FUSE_DATA_DATA_SHIFT          (0U)
-#define OCOTP_READ_FUSE_DATA_DATA(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_FUSE_DATA_DATA_SHIFT)) & OCOTP_READ_FUSE_DATA_DATA_MASK)
+#define OCOTP_READ_FUSE_DATA_DATA_MASK  (0xFFFFFFFFU)
+#define OCOTP_READ_FUSE_DATA_DATA_SHIFT (0U)
+#define OCOTP_READ_FUSE_DATA_DATA(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_FUSE_DATA_DATA_SHIFT)) & OCOTP_READ_FUSE_DATA_DATA_MASK)
 /*! @} */
 
 /*! @name SW_STICKY - Sticky bit Register */
 /*! @{ */
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK      (0x1U)
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT     (0U)
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY(x)        (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT)) & OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK     (0x2U)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT    (1U)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT)) & OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK   (0x4U)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT  (2U)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT)) & OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK      (0x8U)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT     (3U)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART(x)        (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT)) & OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK  (0x1U)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT (0U)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT)) & OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK  (0x2U)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT (1U)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT)) & OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK  (0x4U)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT (2U)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT)) & OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK  (0x8U)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT (3U)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT)) & OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK)
 #define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK  (0x10U)
 #define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT (4U)
-#define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT)) & OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK)
+#define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT)) &                                       \
+     OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK)
 /*! @} */
 
 /*! @name SCS - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_HAB_JDE_MASK                   (0x1U)
-#define OCOTP_SCS_HAB_JDE_SHIFT                  (0U)
-#define OCOTP_SCS_HAB_JDE(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_HAB_JDE_SHIFT)) & OCOTP_SCS_HAB_JDE_MASK)
-#define OCOTP_SCS_SPARE_MASK                     (0x7FFFFFFEU)
-#define OCOTP_SCS_SPARE_SHIFT                    (1U)
-#define OCOTP_SCS_SPARE(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SPARE_SHIFT)) & OCOTP_SCS_SPARE_MASK)
-#define OCOTP_SCS_LOCK_MASK                      (0x80000000U)
-#define OCOTP_SCS_LOCK_SHIFT                     (31U)
-#define OCOTP_SCS_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_LOCK_SHIFT)) & OCOTP_SCS_LOCK_MASK)
+#define OCOTP_SCS_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_HAB_JDE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_HAB_JDE_SHIFT)) & OCOTP_SCS_HAB_JDE_MASK)
+#define OCOTP_SCS_SPARE_MASK    (0x7FFFFFFEU)
+#define OCOTP_SCS_SPARE_SHIFT   (1U)
+#define OCOTP_SCS_SPARE(x)      (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SPARE_SHIFT)) & OCOTP_SCS_SPARE_MASK)
+#define OCOTP_SCS_LOCK_MASK     (0x80000000U)
+#define OCOTP_SCS_LOCK_SHIFT    (31U)
+#define OCOTP_SCS_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_LOCK_SHIFT)) & OCOTP_SCS_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_SET - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_SET_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_SET_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_SET_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_HAB_JDE_SHIFT)) & OCOTP_SCS_SET_HAB_JDE_MASK)
-#define OCOTP_SCS_SET_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_SET_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_SET_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
-#define OCOTP_SCS_SET_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_SET_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_SET_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_LOCK_SHIFT)) & OCOTP_SCS_SET_LOCK_MASK)
+#define OCOTP_SCS_SET_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_SET_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_SET_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_HAB_JDE_SHIFT)) & OCOTP_SCS_SET_HAB_JDE_MASK)
+#define OCOTP_SCS_SET_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_SET_SPARE_SHIFT (1U)
+#define OCOTP_SCS_SET_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
+#define OCOTP_SCS_SET_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_SET_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_SET_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_LOCK_SHIFT)) & OCOTP_SCS_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_CLR - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_CLR_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_CLR_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_CLR_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_HAB_JDE_SHIFT)) & OCOTP_SCS_CLR_HAB_JDE_MASK)
-#define OCOTP_SCS_CLR_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_CLR_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_CLR_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_SPARE_SHIFT)) & OCOTP_SCS_CLR_SPARE_MASK)
-#define OCOTP_SCS_CLR_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_CLR_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_CLR_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_LOCK_SHIFT)) & OCOTP_SCS_CLR_LOCK_MASK)
+#define OCOTP_SCS_CLR_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_CLR_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_CLR_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_HAB_JDE_SHIFT)) & OCOTP_SCS_CLR_HAB_JDE_MASK)
+#define OCOTP_SCS_CLR_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_CLR_SPARE_SHIFT (1U)
+#define OCOTP_SCS_CLR_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_SPARE_SHIFT)) & OCOTP_SCS_CLR_SPARE_MASK)
+#define OCOTP_SCS_CLR_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_CLR_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_CLR_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_LOCK_SHIFT)) & OCOTP_SCS_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_TOG - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_TOG_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_TOG_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_TOG_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_HAB_JDE_SHIFT)) & OCOTP_SCS_TOG_HAB_JDE_MASK)
-#define OCOTP_SCS_TOG_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_TOG_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_TOG_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_SPARE_SHIFT)) & OCOTP_SCS_TOG_SPARE_MASK)
-#define OCOTP_SCS_TOG_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_TOG_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_TOG_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_LOCK_SHIFT)) & OCOTP_SCS_TOG_LOCK_MASK)
+#define OCOTP_SCS_TOG_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_TOG_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_TOG_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_HAB_JDE_SHIFT)) & OCOTP_SCS_TOG_HAB_JDE_MASK)
+#define OCOTP_SCS_TOG_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_TOG_SPARE_SHIFT (1U)
+#define OCOTP_SCS_TOG_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_SPARE_SHIFT)) & OCOTP_SCS_TOG_SPARE_MASK)
+#define OCOTP_SCS_TOG_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_TOG_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_TOG_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_LOCK_SHIFT)) & OCOTP_SCS_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name VERSION - OTP Controller Version Register */
 /*! @{ */
-#define OCOTP_VERSION_STEP_MASK                  (0xFFFFU)
-#define OCOTP_VERSION_STEP_SHIFT                 (0U)
-#define OCOTP_VERSION_STEP(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_STEP_SHIFT)) & OCOTP_VERSION_STEP_MASK)
-#define OCOTP_VERSION_MINOR_MASK                 (0xFF0000U)
-#define OCOTP_VERSION_MINOR_SHIFT                (16U)
-#define OCOTP_VERSION_MINOR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MINOR_SHIFT)) & OCOTP_VERSION_MINOR_MASK)
-#define OCOTP_VERSION_MAJOR_MASK                 (0xFF000000U)
-#define OCOTP_VERSION_MAJOR_SHIFT                (24U)
-#define OCOTP_VERSION_MAJOR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MAJOR_SHIFT)) & OCOTP_VERSION_MAJOR_MASK)
+#define OCOTP_VERSION_STEP_MASK   (0xFFFFU)
+#define OCOTP_VERSION_STEP_SHIFT  (0U)
+#define OCOTP_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_STEP_SHIFT)) & OCOTP_VERSION_STEP_MASK)
+#define OCOTP_VERSION_MINOR_MASK  (0xFF0000U)
+#define OCOTP_VERSION_MINOR_SHIFT (16U)
+#define OCOTP_VERSION_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MINOR_SHIFT)) & OCOTP_VERSION_MINOR_MASK)
+#define OCOTP_VERSION_MAJOR_MASK  (0xFF000000U)
+#define OCOTP_VERSION_MAJOR_SHIFT (24U)
+#define OCOTP_VERSION_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MAJOR_SHIFT)) & OCOTP_VERSION_MAJOR_MASK)
 /*! @} */
 
 /*! @name TIMING2 - OTP Controller Timing Register 2 */
 /*! @{ */
-#define OCOTP_TIMING2_RELAX_PROG_MASK            (0xFFFU)
-#define OCOTP_TIMING2_RELAX_PROG_SHIFT           (0U)
-#define OCOTP_TIMING2_RELAX_PROG(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_PROG_SHIFT)) & OCOTP_TIMING2_RELAX_PROG_MASK)
-#define OCOTP_TIMING2_RELAX_READ_MASK            (0x3F0000U)
-#define OCOTP_TIMING2_RELAX_READ_SHIFT           (16U)
-#define OCOTP_TIMING2_RELAX_READ(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_READ_SHIFT)) & OCOTP_TIMING2_RELAX_READ_MASK)
-#define OCOTP_TIMING2_RELAX1_MASK                (0x1FC00000U)
-#define OCOTP_TIMING2_RELAX1_SHIFT               (22U)
-#define OCOTP_TIMING2_RELAX1(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX1_SHIFT)) & OCOTP_TIMING2_RELAX1_MASK)
+#define OCOTP_TIMING2_RELAX_PROG_MASK  (0xFFFU)
+#define OCOTP_TIMING2_RELAX_PROG_SHIFT (0U)
+#define OCOTP_TIMING2_RELAX_PROG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_PROG_SHIFT)) & OCOTP_TIMING2_RELAX_PROG_MASK)
+#define OCOTP_TIMING2_RELAX_READ_MASK  (0x3F0000U)
+#define OCOTP_TIMING2_RELAX_READ_SHIFT (16U)
+#define OCOTP_TIMING2_RELAX_READ(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_READ_SHIFT)) & OCOTP_TIMING2_RELAX_READ_MASK)
+#define OCOTP_TIMING2_RELAX1_MASK  (0x1FC00000U)
+#define OCOTP_TIMING2_RELAX1_SHIFT (22U)
+#define OCOTP_TIMING2_RELAX1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX1_SHIFT)) & OCOTP_TIMING2_RELAX1_MASK)
 /*! @} */
 
 /*! @name LOCK - Value of OTP Bank0 Word0 (Lock controls) */
 /*! @{ */
-#define OCOTP_LOCK_TESTER_MASK                   (0x3U)
-#define OCOTP_LOCK_TESTER_SHIFT                  (0U)
-#define OCOTP_LOCK_TESTER(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_TESTER_SHIFT)) & OCOTP_LOCK_TESTER_MASK)
-#define OCOTP_LOCK_BOOT_CFG_MASK                 (0xCU)
-#define OCOTP_LOCK_BOOT_CFG_SHIFT                (2U)
-#define OCOTP_LOCK_BOOT_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_BOOT_CFG_SHIFT)) & OCOTP_LOCK_BOOT_CFG_MASK)
-#define OCOTP_LOCK_MEM_TRIM_MASK                 (0x30U)
-#define OCOTP_LOCK_MEM_TRIM_SHIFT                (4U)
-#define OCOTP_LOCK_MEM_TRIM(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MEM_TRIM_SHIFT)) & OCOTP_LOCK_MEM_TRIM_MASK)
-#define OCOTP_LOCK_SJC_RESP_MASK                 (0x40U)
-#define OCOTP_LOCK_SJC_RESP_SHIFT                (6U)
-#define OCOTP_LOCK_SJC_RESP(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SJC_RESP_SHIFT)) & OCOTP_LOCK_SJC_RESP_MASK)
-#define OCOTP_LOCK_MAC_ADDR_MASK                 (0x300U)
-#define OCOTP_LOCK_MAC_ADDR_SHIFT                (8U)
-#define OCOTP_LOCK_MAC_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MAC_ADDR_SHIFT)) & OCOTP_LOCK_MAC_ADDR_MASK)
-#define OCOTP_LOCK_GP1_MASK                      (0xC00U)
-#define OCOTP_LOCK_GP1_SHIFT                     (10U)
-#define OCOTP_LOCK_GP1(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP1_SHIFT)) & OCOTP_LOCK_GP1_MASK)
-#define OCOTP_LOCK_GP2_MASK                      (0x3000U)
-#define OCOTP_LOCK_GP2_SHIFT                     (12U)
-#define OCOTP_LOCK_GP2(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP2_SHIFT)) & OCOTP_LOCK_GP2_MASK)
-#define OCOTP_LOCK_SRK_MASK                      (0x4000U)
-#define OCOTP_LOCK_SRK_SHIFT                     (14U)
-#define OCOTP_LOCK_SRK(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SRK_SHIFT)) & OCOTP_LOCK_SRK_MASK)
-#define OCOTP_LOCK_OTPMK_MSB_MASK                (0x8000U)
-#define OCOTP_LOCK_OTPMK_MSB_SHIFT               (15U)
-#define OCOTP_LOCK_OTPMK_MSB(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_MSB_SHIFT)) & OCOTP_LOCK_OTPMK_MSB_MASK)
-#define OCOTP_LOCK_SW_GP1_MASK                   (0x10000U)
-#define OCOTP_LOCK_SW_GP1_SHIFT                  (16U)
-#define OCOTP_LOCK_SW_GP1(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP1_SHIFT)) & OCOTP_LOCK_SW_GP1_MASK)
-#define OCOTP_LOCK_OTPMK_LSB_MASK                (0x20000U)
-#define OCOTP_LOCK_OTPMK_LSB_SHIFT               (17U)
-#define OCOTP_LOCK_OTPMK_LSB(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_LSB_SHIFT)) & OCOTP_LOCK_OTPMK_LSB_MASK)
-#define OCOTP_LOCK_ANALOG_MASK                   (0xC0000U)
-#define OCOTP_LOCK_ANALOG_SHIFT                  (18U)
-#define OCOTP_LOCK_ANALOG(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_ANALOG_SHIFT)) & OCOTP_LOCK_ANALOG_MASK)
-#define OCOTP_LOCK_OTPMK_CRC_MASK                (0x100000U)
-#define OCOTP_LOCK_OTPMK_CRC_SHIFT               (20U)
-#define OCOTP_LOCK_OTPMK_CRC(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_CRC_SHIFT)) & OCOTP_LOCK_OTPMK_CRC_MASK)
-#define OCOTP_LOCK_SW_GP2_LOCK_MASK              (0x200000U)
-#define OCOTP_LOCK_SW_GP2_LOCK_SHIFT             (21U)
-#define OCOTP_LOCK_SW_GP2_LOCK(x)                (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_LOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_LOCK_MASK)
-#define OCOTP_LOCK_MISC_CONF_MASK                (0x400000U)
-#define OCOTP_LOCK_MISC_CONF_SHIFT               (22U)
-#define OCOTP_LOCK_MISC_CONF(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MISC_CONF_SHIFT)) & OCOTP_LOCK_MISC_CONF_MASK)
-#define OCOTP_LOCK_SW_GP2_RLOCK_MASK             (0x800000U)
-#define OCOTP_LOCK_SW_GP2_RLOCK_SHIFT            (23U)
-#define OCOTP_LOCK_SW_GP2_RLOCK(x)               (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_RLOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_RLOCK_MASK)
-#define OCOTP_LOCK_GP3_MASK                      (0xC000000U)
-#define OCOTP_LOCK_GP3_SHIFT                     (26U)
-#define OCOTP_LOCK_GP3(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP3_SHIFT)) & OCOTP_LOCK_GP3_MASK)
-#define OCOTP_LOCK_FIELD_RETURN_MASK             (0xF0000000U)
-#define OCOTP_LOCK_FIELD_RETURN_SHIFT            (28U)
-#define OCOTP_LOCK_FIELD_RETURN(x)               (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_FIELD_RETURN_SHIFT)) & OCOTP_LOCK_FIELD_RETURN_MASK)
+#define OCOTP_LOCK_TESTER_MASK     (0x3U)
+#define OCOTP_LOCK_TESTER_SHIFT    (0U)
+#define OCOTP_LOCK_TESTER(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_TESTER_SHIFT)) & OCOTP_LOCK_TESTER_MASK)
+#define OCOTP_LOCK_BOOT_CFG_MASK   (0xCU)
+#define OCOTP_LOCK_BOOT_CFG_SHIFT  (2U)
+#define OCOTP_LOCK_BOOT_CFG(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_BOOT_CFG_SHIFT)) & OCOTP_LOCK_BOOT_CFG_MASK)
+#define OCOTP_LOCK_MEM_TRIM_MASK   (0x30U)
+#define OCOTP_LOCK_MEM_TRIM_SHIFT  (4U)
+#define OCOTP_LOCK_MEM_TRIM(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MEM_TRIM_SHIFT)) & OCOTP_LOCK_MEM_TRIM_MASK)
+#define OCOTP_LOCK_SJC_RESP_MASK   (0x40U)
+#define OCOTP_LOCK_SJC_RESP_SHIFT  (6U)
+#define OCOTP_LOCK_SJC_RESP(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SJC_RESP_SHIFT)) & OCOTP_LOCK_SJC_RESP_MASK)
+#define OCOTP_LOCK_MAC_ADDR_MASK   (0x300U)
+#define OCOTP_LOCK_MAC_ADDR_SHIFT  (8U)
+#define OCOTP_LOCK_MAC_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MAC_ADDR_SHIFT)) & OCOTP_LOCK_MAC_ADDR_MASK)
+#define OCOTP_LOCK_GP1_MASK        (0xC00U)
+#define OCOTP_LOCK_GP1_SHIFT       (10U)
+#define OCOTP_LOCK_GP1(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP1_SHIFT)) & OCOTP_LOCK_GP1_MASK)
+#define OCOTP_LOCK_GP2_MASK        (0x3000U)
+#define OCOTP_LOCK_GP2_SHIFT       (12U)
+#define OCOTP_LOCK_GP2(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP2_SHIFT)) & OCOTP_LOCK_GP2_MASK)
+#define OCOTP_LOCK_SRK_MASK        (0x4000U)
+#define OCOTP_LOCK_SRK_SHIFT       (14U)
+#define OCOTP_LOCK_SRK(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SRK_SHIFT)) & OCOTP_LOCK_SRK_MASK)
+#define OCOTP_LOCK_OTPMK_MSB_MASK  (0x8000U)
+#define OCOTP_LOCK_OTPMK_MSB_SHIFT (15U)
+#define OCOTP_LOCK_OTPMK_MSB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_MSB_SHIFT)) & OCOTP_LOCK_OTPMK_MSB_MASK)
+#define OCOTP_LOCK_SW_GP1_MASK     (0x10000U)
+#define OCOTP_LOCK_SW_GP1_SHIFT    (16U)
+#define OCOTP_LOCK_SW_GP1(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP1_SHIFT)) & OCOTP_LOCK_SW_GP1_MASK)
+#define OCOTP_LOCK_OTPMK_LSB_MASK  (0x20000U)
+#define OCOTP_LOCK_OTPMK_LSB_SHIFT (17U)
+#define OCOTP_LOCK_OTPMK_LSB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_LSB_SHIFT)) & OCOTP_LOCK_OTPMK_LSB_MASK)
+#define OCOTP_LOCK_ANALOG_MASK     (0xC0000U)
+#define OCOTP_LOCK_ANALOG_SHIFT    (18U)
+#define OCOTP_LOCK_ANALOG(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_ANALOG_SHIFT)) & OCOTP_LOCK_ANALOG_MASK)
+#define OCOTP_LOCK_OTPMK_CRC_MASK  (0x100000U)
+#define OCOTP_LOCK_OTPMK_CRC_SHIFT (20U)
+#define OCOTP_LOCK_OTPMK_CRC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_CRC_SHIFT)) & OCOTP_LOCK_OTPMK_CRC_MASK)
+#define OCOTP_LOCK_SW_GP2_LOCK_MASK  (0x200000U)
+#define OCOTP_LOCK_SW_GP2_LOCK_SHIFT (21U)
+#define OCOTP_LOCK_SW_GP2_LOCK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_LOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_LOCK_MASK)
+#define OCOTP_LOCK_MISC_CONF_MASK  (0x400000U)
+#define OCOTP_LOCK_MISC_CONF_SHIFT (22U)
+#define OCOTP_LOCK_MISC_CONF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MISC_CONF_SHIFT)) & OCOTP_LOCK_MISC_CONF_MASK)
+#define OCOTP_LOCK_SW_GP2_RLOCK_MASK  (0x800000U)
+#define OCOTP_LOCK_SW_GP2_RLOCK_SHIFT (23U)
+#define OCOTP_LOCK_SW_GP2_RLOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_RLOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_RLOCK_MASK)
+#define OCOTP_LOCK_GP3_MASK           (0xC000000U)
+#define OCOTP_LOCK_GP3_SHIFT          (26U)
+#define OCOTP_LOCK_GP3(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP3_SHIFT)) & OCOTP_LOCK_GP3_MASK)
+#define OCOTP_LOCK_FIELD_RETURN_MASK  (0xF0000000U)
+#define OCOTP_LOCK_FIELD_RETURN_SHIFT (28U)
+#define OCOTP_LOCK_FIELD_RETURN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_FIELD_RETURN_SHIFT)) & OCOTP_LOCK_FIELD_RETURN_MASK)
 /*! @} */
 
 /*! @name CFG0 - Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG0_BITS_SHIFT                    (0U)
-#define OCOTP_CFG0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG0_BITS_SHIFT)) & OCOTP_CFG0_BITS_MASK)
+#define OCOTP_CFG0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG0_BITS_SHIFT (0U)
+#define OCOTP_CFG0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG0_BITS_SHIFT)) & OCOTP_CFG0_BITS_MASK)
 /*! @} */
 
 /*! @name CFG1 - Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG1_BITS_SHIFT                    (0U)
-#define OCOTP_CFG1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG1_BITS_SHIFT)) & OCOTP_CFG1_BITS_MASK)
+#define OCOTP_CFG1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG1_BITS_SHIFT (0U)
+#define OCOTP_CFG1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG1_BITS_SHIFT)) & OCOTP_CFG1_BITS_MASK)
 /*! @} */
 
 /*! @name CFG2 - Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG2_BITS_SHIFT                    (0U)
-#define OCOTP_CFG2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG2_BITS_SHIFT)) & OCOTP_CFG2_BITS_MASK)
+#define OCOTP_CFG2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG2_BITS_SHIFT (0U)
+#define OCOTP_CFG2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG2_BITS_SHIFT)) & OCOTP_CFG2_BITS_MASK)
 /*! @} */
 
 /*! @name CFG3 - Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG3_BITS_SHIFT                    (0U)
-#define OCOTP_CFG3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG3_BITS_SHIFT)) & OCOTP_CFG3_BITS_MASK)
+#define OCOTP_CFG3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG3_BITS_SHIFT (0U)
+#define OCOTP_CFG3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG3_BITS_SHIFT)) & OCOTP_CFG3_BITS_MASK)
 /*! @} */
 
 /*! @name CFG4 - Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG4_BITS_SHIFT                    (0U)
-#define OCOTP_CFG4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG4_BITS_SHIFT)) & OCOTP_CFG4_BITS_MASK)
+#define OCOTP_CFG4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG4_BITS_SHIFT (0U)
+#define OCOTP_CFG4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG4_BITS_SHIFT)) & OCOTP_CFG4_BITS_MASK)
 /*! @} */
 
 /*! @name CFG5 - Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG5_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG5_BITS_SHIFT                    (0U)
-#define OCOTP_CFG5_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG5_BITS_SHIFT)) & OCOTP_CFG5_BITS_MASK)
+#define OCOTP_CFG5_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG5_BITS_SHIFT (0U)
+#define OCOTP_CFG5_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG5_BITS_SHIFT)) & OCOTP_CFG5_BITS_MASK)
 /*! @} */
 
 /*! @name CFG6 - Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG6_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG6_BITS_SHIFT                    (0U)
-#define OCOTP_CFG6_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG6_BITS_SHIFT)) & OCOTP_CFG6_BITS_MASK)
+#define OCOTP_CFG6_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG6_BITS_SHIFT (0U)
+#define OCOTP_CFG6_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG6_BITS_SHIFT)) & OCOTP_CFG6_BITS_MASK)
 /*! @} */
 
 /*! @name MEM0 - Value of OTP Bank1 Word0 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM0_BITS_SHIFT                    (0U)
-#define OCOTP_MEM0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM0_BITS_SHIFT)) & OCOTP_MEM0_BITS_MASK)
+#define OCOTP_MEM0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM0_BITS_SHIFT (0U)
+#define OCOTP_MEM0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM0_BITS_SHIFT)) & OCOTP_MEM0_BITS_MASK)
 /*! @} */
 
 /*! @name MEM1 - Value of OTP Bank1 Word1 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM1_BITS_SHIFT                    (0U)
-#define OCOTP_MEM1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM1_BITS_SHIFT)) & OCOTP_MEM1_BITS_MASK)
+#define OCOTP_MEM1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM1_BITS_SHIFT (0U)
+#define OCOTP_MEM1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM1_BITS_SHIFT)) & OCOTP_MEM1_BITS_MASK)
 /*! @} */
 
 /*! @name MEM2 - Value of OTP Bank1 Word2 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM2_BITS_SHIFT                    (0U)
-#define OCOTP_MEM2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM2_BITS_SHIFT)) & OCOTP_MEM2_BITS_MASK)
+#define OCOTP_MEM2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM2_BITS_SHIFT (0U)
+#define OCOTP_MEM2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM2_BITS_SHIFT)) & OCOTP_MEM2_BITS_MASK)
 /*! @} */
 
 /*! @name MEM3 - Value of OTP Bank1 Word3 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM3_BITS_SHIFT                    (0U)
-#define OCOTP_MEM3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM3_BITS_SHIFT)) & OCOTP_MEM3_BITS_MASK)
+#define OCOTP_MEM3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM3_BITS_SHIFT (0U)
+#define OCOTP_MEM3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM3_BITS_SHIFT)) & OCOTP_MEM3_BITS_MASK)
 /*! @} */
 
 /*! @name MEM4 - Value of OTP Bank1 Word4 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM4_BITS_SHIFT                    (0U)
-#define OCOTP_MEM4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM4_BITS_SHIFT)) & OCOTP_MEM4_BITS_MASK)
+#define OCOTP_MEM4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM4_BITS_SHIFT (0U)
+#define OCOTP_MEM4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM4_BITS_SHIFT)) & OCOTP_MEM4_BITS_MASK)
 /*! @} */
 
 /*! @name ANA0 - Value of OTP Bank1 Word5 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA0_BITS_SHIFT                    (0U)
-#define OCOTP_ANA0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA0_BITS_SHIFT)) & OCOTP_ANA0_BITS_MASK)
+#define OCOTP_ANA0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA0_BITS_SHIFT (0U)
+#define OCOTP_ANA0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA0_BITS_SHIFT)) & OCOTP_ANA0_BITS_MASK)
 /*! @} */
 
 /*! @name ANA1 - Value of OTP Bank1 Word6 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA1_BITS_SHIFT                    (0U)
-#define OCOTP_ANA1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA1_BITS_SHIFT)) & OCOTP_ANA1_BITS_MASK)
+#define OCOTP_ANA1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA1_BITS_SHIFT (0U)
+#define OCOTP_ANA1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA1_BITS_SHIFT)) & OCOTP_ANA1_BITS_MASK)
 /*! @} */
 
 /*! @name ANA2 - Value of OTP Bank1 Word7 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA2_BITS_SHIFT                    (0U)
-#define OCOTP_ANA2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA2_BITS_SHIFT)) & OCOTP_ANA2_BITS_MASK)
+#define OCOTP_ANA2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA2_BITS_SHIFT (0U)
+#define OCOTP_ANA2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA2_BITS_SHIFT)) & OCOTP_ANA2_BITS_MASK)
 /*! @} */
 
 /*! @name SRK0 - Shadow Register for OTP Bank3 Word0 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK0_BITS_SHIFT                    (0U)
-#define OCOTP_SRK0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK0_BITS_SHIFT)) & OCOTP_SRK0_BITS_MASK)
+#define OCOTP_SRK0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK0_BITS_SHIFT (0U)
+#define OCOTP_SRK0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK0_BITS_SHIFT)) & OCOTP_SRK0_BITS_MASK)
 /*! @} */
 
 /*! @name SRK1 - Shadow Register for OTP Bank3 Word1 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK1_BITS_SHIFT                    (0U)
-#define OCOTP_SRK1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK1_BITS_SHIFT)) & OCOTP_SRK1_BITS_MASK)
+#define OCOTP_SRK1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK1_BITS_SHIFT (0U)
+#define OCOTP_SRK1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK1_BITS_SHIFT)) & OCOTP_SRK1_BITS_MASK)
 /*! @} */
 
 /*! @name SRK2 - Shadow Register for OTP Bank3 Word2 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK2_BITS_SHIFT                    (0U)
-#define OCOTP_SRK2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK2_BITS_SHIFT)) & OCOTP_SRK2_BITS_MASK)
+#define OCOTP_SRK2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK2_BITS_SHIFT (0U)
+#define OCOTP_SRK2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK2_BITS_SHIFT)) & OCOTP_SRK2_BITS_MASK)
 /*! @} */
 
 /*! @name SRK3 - Shadow Register for OTP Bank3 Word3 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK3_BITS_SHIFT                    (0U)
-#define OCOTP_SRK3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK3_BITS_SHIFT)) & OCOTP_SRK3_BITS_MASK)
+#define OCOTP_SRK3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK3_BITS_SHIFT (0U)
+#define OCOTP_SRK3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK3_BITS_SHIFT)) & OCOTP_SRK3_BITS_MASK)
 /*! @} */
 
 /*! @name SRK4 - Shadow Register for OTP Bank3 Word4 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK4_BITS_SHIFT                    (0U)
-#define OCOTP_SRK4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK4_BITS_SHIFT)) & OCOTP_SRK4_BITS_MASK)
+#define OCOTP_SRK4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK4_BITS_SHIFT (0U)
+#define OCOTP_SRK4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK4_BITS_SHIFT)) & OCOTP_SRK4_BITS_MASK)
 /*! @} */
 
 /*! @name SRK5 - Shadow Register for OTP Bank3 Word5 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK5_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK5_BITS_SHIFT                    (0U)
-#define OCOTP_SRK5_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK5_BITS_SHIFT)) & OCOTP_SRK5_BITS_MASK)
+#define OCOTP_SRK5_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK5_BITS_SHIFT (0U)
+#define OCOTP_SRK5_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK5_BITS_SHIFT)) & OCOTP_SRK5_BITS_MASK)
 /*! @} */
 
 /*! @name SRK6 - Shadow Register for OTP Bank3 Word6 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK6_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK6_BITS_SHIFT                    (0U)
-#define OCOTP_SRK6_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK6_BITS_SHIFT)) & OCOTP_SRK6_BITS_MASK)
+#define OCOTP_SRK6_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK6_BITS_SHIFT (0U)
+#define OCOTP_SRK6_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK6_BITS_SHIFT)) & OCOTP_SRK6_BITS_MASK)
 /*! @} */
 
 /*! @name SRK7 - Shadow Register for OTP Bank3 Word7 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK7_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK7_BITS_SHIFT                    (0U)
-#define OCOTP_SRK7_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK7_BITS_SHIFT)) & OCOTP_SRK7_BITS_MASK)
+#define OCOTP_SRK7_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK7_BITS_SHIFT (0U)
+#define OCOTP_SRK7_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK7_BITS_SHIFT)) & OCOTP_SRK7_BITS_MASK)
 /*! @} */
 
 /*! @name SJC_RESP0 - Value of OTP Bank4 Word0 (Secure JTAG Response Field) */
 /*! @{ */
-#define OCOTP_SJC_RESP0_BITS_MASK                (0xFFFFFFFFU)
-#define OCOTP_SJC_RESP0_BITS_SHIFT               (0U)
-#define OCOTP_SJC_RESP0_BITS(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP0_BITS_SHIFT)) & OCOTP_SJC_RESP0_BITS_MASK)
+#define OCOTP_SJC_RESP0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SJC_RESP0_BITS_SHIFT (0U)
+#define OCOTP_SJC_RESP0_BITS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP0_BITS_SHIFT)) & OCOTP_SJC_RESP0_BITS_MASK)
 /*! @} */
 
 /*! @name SJC_RESP1 - Value of OTP Bank4 Word1 (Secure JTAG Response Field) */
 /*! @{ */
-#define OCOTP_SJC_RESP1_BITS_MASK                (0xFFFFFFFFU)
-#define OCOTP_SJC_RESP1_BITS_SHIFT               (0U)
-#define OCOTP_SJC_RESP1_BITS(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP1_BITS_SHIFT)) & OCOTP_SJC_RESP1_BITS_MASK)
+#define OCOTP_SJC_RESP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SJC_RESP1_BITS_SHIFT (0U)
+#define OCOTP_SJC_RESP1_BITS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP1_BITS_SHIFT)) & OCOTP_SJC_RESP1_BITS_MASK)
 /*! @} */
 
 /*! @name MAC0 - Value of OTP Bank4 Word2 (MAC Address) */
 /*! @{ */
-#define OCOTP_MAC0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MAC0_BITS_SHIFT                    (0U)
-#define OCOTP_MAC0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC0_BITS_SHIFT)) & OCOTP_MAC0_BITS_MASK)
+#define OCOTP_MAC0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MAC0_BITS_SHIFT (0U)
+#define OCOTP_MAC0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC0_BITS_SHIFT)) & OCOTP_MAC0_BITS_MASK)
 /*! @} */
 
 /*! @name MAC1 - Value of OTP Bank4 Word3 (MAC Address) */
 /*! @{ */
-#define OCOTP_MAC1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MAC1_BITS_SHIFT                    (0U)
-#define OCOTP_MAC1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC1_BITS_SHIFT)) & OCOTP_MAC1_BITS_MASK)
+#define OCOTP_MAC1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MAC1_BITS_SHIFT (0U)
+#define OCOTP_MAC1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC1_BITS_SHIFT)) & OCOTP_MAC1_BITS_MASK)
 /*! @} */
 
 /*! @name GP3 - Value of OTP Bank4 Word4 (MAC Address) */
 /*! @{ */
-#define OCOTP_GP3_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP3_BITS_SHIFT                     (0U)
-#define OCOTP_GP3_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP3_BITS_SHIFT)) & OCOTP_GP3_BITS_MASK)
+#define OCOTP_GP3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP3_BITS_SHIFT (0U)
+#define OCOTP_GP3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP3_BITS_SHIFT)) & OCOTP_GP3_BITS_MASK)
 /*! @} */
 
 /*! @name GP1 - Value of OTP Bank4 Word6 (General Purpose Customer Defined Info) */
 /*! @{ */
-#define OCOTP_GP1_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP1_BITS_SHIFT                     (0U)
-#define OCOTP_GP1_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP1_BITS_SHIFT)) & OCOTP_GP1_BITS_MASK)
+#define OCOTP_GP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP1_BITS_SHIFT (0U)
+#define OCOTP_GP1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP1_BITS_SHIFT)) & OCOTP_GP1_BITS_MASK)
 /*! @} */
 
 /*! @name GP2 - Value of OTP Bank4 Word7 (General Purpose Customer Defined Info) */
 /*! @{ */
-#define OCOTP_GP2_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP2_BITS_SHIFT                     (0U)
-#define OCOTP_GP2_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP2_BITS_SHIFT)) & OCOTP_GP2_BITS_MASK)
+#define OCOTP_GP2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP2_BITS_SHIFT (0U)
+#define OCOTP_GP2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP2_BITS_SHIFT)) & OCOTP_GP2_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP1 - Value of OTP Bank5 Word0 (SW GP1) */
 /*! @{ */
-#define OCOTP_SW_GP1_BITS_MASK                   (0xFFFFFFFFU)
-#define OCOTP_SW_GP1_BITS_SHIFT                  (0U)
-#define OCOTP_SW_GP1_BITS(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP1_BITS_SHIFT)) & OCOTP_SW_GP1_BITS_MASK)
+#define OCOTP_SW_GP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP1_BITS_SHIFT (0U)
+#define OCOTP_SW_GP1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP1_BITS_SHIFT)) & OCOTP_SW_GP1_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP20 - Value of OTP Bank5 Word1 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP20_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP20_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP20_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP20_BITS_SHIFT)) & OCOTP_SW_GP20_BITS_MASK)
+#define OCOTP_SW_GP20_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP20_BITS_SHIFT (0U)
+#define OCOTP_SW_GP20_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP20_BITS_SHIFT)) & OCOTP_SW_GP20_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP21 - Value of OTP Bank5 Word2 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP21_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP21_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP21_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP21_BITS_SHIFT)) & OCOTP_SW_GP21_BITS_MASK)
+#define OCOTP_SW_GP21_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP21_BITS_SHIFT (0U)
+#define OCOTP_SW_GP21_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP21_BITS_SHIFT)) & OCOTP_SW_GP21_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP22 - Value of OTP Bank5 Word3 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP22_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP22_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP22_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP22_BITS_SHIFT)) & OCOTP_SW_GP22_BITS_MASK)
+#define OCOTP_SW_GP22_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP22_BITS_SHIFT (0U)
+#define OCOTP_SW_GP22_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP22_BITS_SHIFT)) & OCOTP_SW_GP22_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP23 - Value of OTP Bank5 Word4 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP23_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP23_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP23_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP23_BITS_SHIFT)) & OCOTP_SW_GP23_BITS_MASK)
+#define OCOTP_SW_GP23_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP23_BITS_SHIFT (0U)
+#define OCOTP_SW_GP23_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP23_BITS_SHIFT)) & OCOTP_SW_GP23_BITS_MASK)
 /*! @} */
 
 /*! @name MISC_CONF0 - Value of OTP Bank5 Word5 (Misc Conf) */
 /*! @{ */
-#define OCOTP_MISC_CONF0_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_MISC_CONF0_BITS_SHIFT              (0U)
-#define OCOTP_MISC_CONF0_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF0_BITS_SHIFT)) & OCOTP_MISC_CONF0_BITS_MASK)
+#define OCOTP_MISC_CONF0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MISC_CONF0_BITS_SHIFT (0U)
+#define OCOTP_MISC_CONF0_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF0_BITS_SHIFT)) & OCOTP_MISC_CONF0_BITS_MASK)
 /*! @} */
 
 /*! @name MISC_CONF1 - Value of OTP Bank5 Word6 (Misc Conf) */
 /*! @{ */
-#define OCOTP_MISC_CONF1_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_MISC_CONF1_BITS_SHIFT              (0U)
-#define OCOTP_MISC_CONF1_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF1_BITS_SHIFT)) & OCOTP_MISC_CONF1_BITS_MASK)
+#define OCOTP_MISC_CONF1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MISC_CONF1_BITS_SHIFT (0U)
+#define OCOTP_MISC_CONF1_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF1_BITS_SHIFT)) & OCOTP_MISC_CONF1_BITS_MASK)
 /*! @} */
 
 /*! @name SRK_REVOKE - Value of OTP Bank5 Word7 (SRK Revoke) */
 /*! @{ */
-#define OCOTP_SRK_REVOKE_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_SRK_REVOKE_BITS_SHIFT              (0U)
-#define OCOTP_SRK_REVOKE_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK_REVOKE_BITS_SHIFT)) & OCOTP_SRK_REVOKE_BITS_MASK)
+#define OCOTP_SRK_REVOKE_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK_REVOKE_BITS_SHIFT (0U)
+#define OCOTP_SRK_REVOKE_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK_REVOKE_BITS_SHIFT)) & OCOTP_SRK_REVOKE_BITS_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group OCOTP_Register_Masks */
 
-
 /* OCOTP - Peripheral instance base addresses */
 /** Peripheral OCOTP base address */
-#define OCOTP_BASE                               (0x401F4000u)
+#define OCOTP_BASE (0x401F4000u)
 /** Peripheral OCOTP base pointer */
-#define OCOTP                                    ((OCOTP_Type *)OCOTP_BASE)
+#define OCOTP ((OCOTP_Type *)OCOTP_BASE)
 /** Array initializer of OCOTP peripheral base addresses */
-#define OCOTP_BASE_ADDRS                         { OCOTP_BASE }
+#define OCOTP_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        OCOTP_BASE                                                                                                     \
+    }
 /** Array initializer of OCOTP peripheral base pointers */
-#define OCOTP_BASE_PTRS                          { OCOTP }
+#define OCOTP_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        OCOTP                                                                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group OCOTP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PGC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15820,17 +18084,18 @@ typedef struct {
  */
 
 /** PGC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[544];
-  __IO uint32_t MEGA_CTRL;                         /**< PGC Mega Control Register, offset: 0x220 */
-  __IO uint32_t MEGA_PUPSCR;                       /**< PGC Mega Power Up Sequence Control Register, offset: 0x224 */
-  __IO uint32_t MEGA_PDNSCR;                       /**< PGC Mega Pull Down Sequence Control Register, offset: 0x228 */
-  __IO uint32_t MEGA_SR;                           /**< PGC Mega Power Gating Controller Status Register, offset: 0x22C */
-       uint8_t RESERVED_1[112];
-  __IO uint32_t CPU_CTRL;                          /**< PGC CPU Control Register, offset: 0x2A0 */
-  __IO uint32_t CPU_PUPSCR;                        /**< PGC CPU Power Up Sequence Control Register, offset: 0x2A4 */
-  __IO uint32_t CPU_PDNSCR;                        /**< PGC CPU Pull Down Sequence Control Register, offset: 0x2A8 */
-  __IO uint32_t CPU_SR;                            /**< PGC CPU Power Gating Controller Status Register, offset: 0x2AC */
+typedef struct
+{
+    uint8_t RESERVED_0[544];
+    __IO uint32_t MEGA_CTRL;   /**< PGC Mega Control Register, offset: 0x220 */
+    __IO uint32_t MEGA_PUPSCR; /**< PGC Mega Power Up Sequence Control Register, offset: 0x224 */
+    __IO uint32_t MEGA_PDNSCR; /**< PGC Mega Pull Down Sequence Control Register, offset: 0x228 */
+    __IO uint32_t MEGA_SR;     /**< PGC Mega Power Gating Controller Status Register, offset: 0x22C */
+    uint8_t RESERVED_1[112];
+    __IO uint32_t CPU_CTRL;   /**< PGC CPU Control Register, offset: 0x2A0 */
+    __IO uint32_t CPU_PUPSCR; /**< PGC CPU Power Up Sequence Control Register, offset: 0x2A4 */
+    __IO uint32_t CPU_PDNSCR; /**< PGC CPU Pull Down Sequence Control Register, offset: 0x2A8 */
+    __IO uint32_t CPU_SR;     /**< PGC CPU Power Gating Controller Status Register, offset: 0x2AC */
 } PGC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15844,93 +18109,100 @@ typedef struct {
 
 /*! @name MEGA_CTRL - PGC Mega Control Register */
 /*! @{ */
-#define PGC_MEGA_CTRL_PCR_MASK                   (0x1U)
-#define PGC_MEGA_CTRL_PCR_SHIFT                  (0U)
-#define PGC_MEGA_CTRL_PCR(x)                     (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)
+#define PGC_MEGA_CTRL_PCR_MASK  (0x1U)
+#define PGC_MEGA_CTRL_PCR_SHIFT (0U)
+#define PGC_MEGA_CTRL_PCR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)
 /*! @} */
 
 /*! @name MEGA_PUPSCR - PGC Mega Power Up Sequence Control Register */
 /*! @{ */
-#define PGC_MEGA_PUPSCR_SW_MASK                  (0x3FU)
-#define PGC_MEGA_PUPSCR_SW_SHIFT                 (0U)
-#define PGC_MEGA_PUPSCR_SW(x)                    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)
-#define PGC_MEGA_PUPSCR_SW2ISO_MASK              (0x3F00U)
-#define PGC_MEGA_PUPSCR_SW2ISO_SHIFT             (8U)
-#define PGC_MEGA_PUPSCR_SW2ISO(x)                (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)
+#define PGC_MEGA_PUPSCR_SW_MASK      (0x3FU)
+#define PGC_MEGA_PUPSCR_SW_SHIFT     (0U)
+#define PGC_MEGA_PUPSCR_SW(x)        (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)
+#define PGC_MEGA_PUPSCR_SW2ISO_MASK  (0x3F00U)
+#define PGC_MEGA_PUPSCR_SW2ISO_SHIFT (8U)
+#define PGC_MEGA_PUPSCR_SW2ISO(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)
 /*! @} */
 
 /*! @name MEGA_PDNSCR - PGC Mega Pull Down Sequence Control Register */
 /*! @{ */
-#define PGC_MEGA_PDNSCR_ISO_MASK                 (0x3FU)
-#define PGC_MEGA_PDNSCR_ISO_SHIFT                (0U)
-#define PGC_MEGA_PDNSCR_ISO(x)                   (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)
-#define PGC_MEGA_PDNSCR_ISO2SW_MASK              (0x3F00U)
-#define PGC_MEGA_PDNSCR_ISO2SW_SHIFT             (8U)
-#define PGC_MEGA_PDNSCR_ISO2SW(x)                (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)
+#define PGC_MEGA_PDNSCR_ISO_MASK     (0x3FU)
+#define PGC_MEGA_PDNSCR_ISO_SHIFT    (0U)
+#define PGC_MEGA_PDNSCR_ISO(x)       (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)
+#define PGC_MEGA_PDNSCR_ISO2SW_MASK  (0x3F00U)
+#define PGC_MEGA_PDNSCR_ISO2SW_SHIFT (8U)
+#define PGC_MEGA_PDNSCR_ISO2SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)
 /*! @} */
 
 /*! @name MEGA_SR - PGC Mega Power Gating Controller Status Register */
 /*! @{ */
-#define PGC_MEGA_SR_PSR_MASK                     (0x1U)
-#define PGC_MEGA_SR_PSR_SHIFT                    (0U)
-#define PGC_MEGA_SR_PSR(x)                       (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)
+#define PGC_MEGA_SR_PSR_MASK  (0x1U)
+#define PGC_MEGA_SR_PSR_SHIFT (0U)
+#define PGC_MEGA_SR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)
 /*! @} */
 
 /*! @name CPU_CTRL - PGC CPU Control Register */
 /*! @{ */
-#define PGC_CPU_CTRL_PCR_MASK                    (0x1U)
-#define PGC_CPU_CTRL_PCR_SHIFT                   (0U)
-#define PGC_CPU_CTRL_PCR(x)                      (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)
+#define PGC_CPU_CTRL_PCR_MASK  (0x1U)
+#define PGC_CPU_CTRL_PCR_SHIFT (0U)
+#define PGC_CPU_CTRL_PCR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)
 /*! @} */
 
 /*! @name CPU_PUPSCR - PGC CPU Power Up Sequence Control Register */
 /*! @{ */
-#define PGC_CPU_PUPSCR_SW_MASK                   (0x3FU)
-#define PGC_CPU_PUPSCR_SW_SHIFT                  (0U)
-#define PGC_CPU_PUPSCR_SW(x)                     (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)
-#define PGC_CPU_PUPSCR_SW2ISO_MASK               (0x3F00U)
-#define PGC_CPU_PUPSCR_SW2ISO_SHIFT              (8U)
-#define PGC_CPU_PUPSCR_SW2ISO(x)                 (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)
+#define PGC_CPU_PUPSCR_SW_MASK      (0x3FU)
+#define PGC_CPU_PUPSCR_SW_SHIFT     (0U)
+#define PGC_CPU_PUPSCR_SW(x)        (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)
+#define PGC_CPU_PUPSCR_SW2ISO_MASK  (0x3F00U)
+#define PGC_CPU_PUPSCR_SW2ISO_SHIFT (8U)
+#define PGC_CPU_PUPSCR_SW2ISO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)
 /*! @} */
 
 /*! @name CPU_PDNSCR - PGC CPU Pull Down Sequence Control Register */
 /*! @{ */
-#define PGC_CPU_PDNSCR_ISO_MASK                  (0x3FU)
-#define PGC_CPU_PDNSCR_ISO_SHIFT                 (0U)
-#define PGC_CPU_PDNSCR_ISO(x)                    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)
-#define PGC_CPU_PDNSCR_ISO2SW_MASK               (0x3F00U)
-#define PGC_CPU_PDNSCR_ISO2SW_SHIFT              (8U)
-#define PGC_CPU_PDNSCR_ISO2SW(x)                 (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)
+#define PGC_CPU_PDNSCR_ISO_MASK     (0x3FU)
+#define PGC_CPU_PDNSCR_ISO_SHIFT    (0U)
+#define PGC_CPU_PDNSCR_ISO(x)       (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)
+#define PGC_CPU_PDNSCR_ISO2SW_MASK  (0x3F00U)
+#define PGC_CPU_PDNSCR_ISO2SW_SHIFT (8U)
+#define PGC_CPU_PDNSCR_ISO2SW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)
 /*! @} */
 
 /*! @name CPU_SR - PGC CPU Power Gating Controller Status Register */
 /*! @{ */
-#define PGC_CPU_SR_PSR_MASK                      (0x1U)
-#define PGC_CPU_SR_PSR_SHIFT                     (0U)
-#define PGC_CPU_SR_PSR(x)                        (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)
+#define PGC_CPU_SR_PSR_MASK  (0x1U)
+#define PGC_CPU_SR_PSR_SHIFT (0U)
+#define PGC_CPU_SR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PGC_Register_Masks */
 
-
 /* PGC - Peripheral instance base addresses */
 /** Peripheral PGC base address */
-#define PGC_BASE                                 (0x400F4000u)
+#define PGC_BASE (0x400F4000u)
 /** Peripheral PGC base pointer */
-#define PGC                                      ((PGC_Type *)PGC_BASE)
+#define PGC ((PGC_Type *)PGC_BASE)
 /** Array initializer of PGC peripheral base addresses */
-#define PGC_BASE_ADDRS                           { PGC_BASE }
+#define PGC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PGC_BASE                                                                                                       \
+    }
 /** Array initializer of PGC peripheral base pointers */
-#define PGC_BASE_PTRS                            { PGC }
+#define PGC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PGC                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group PGC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PIT Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15941,18 +18213,20 @@ typedef struct {
  */
 
 /** PIT - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< PIT Module Control Register, offset: 0x0 */
-       uint8_t RESERVED_0[220];
-  __I  uint32_t LTMR64H;                           /**< PIT Upper Lifetime Timer Register, offset: 0xE0 */
-  __I  uint32_t LTMR64L;                           /**< PIT Lower Lifetime Timer Register, offset: 0xE4 */
-       uint8_t RESERVED_1[24];
-  struct {                                         /* offset: 0x100, array step: 0x10 */
-    __IO uint32_t LDVAL;                             /**< Timer Load Value Register, array offset: 0x100, array step: 0x10 */
-    __I  uint32_t CVAL;                              /**< Current Timer Value Register, array offset: 0x104, array step: 0x10 */
-    __IO uint32_t TCTRL;                             /**< Timer Control Register, array offset: 0x108, array step: 0x10 */
-    __IO uint32_t TFLG;                              /**< Timer Flag Register, array offset: 0x10C, array step: 0x10 */
-  } CHANNEL[4];
+typedef struct
+{
+    __IO uint32_t MCR; /**< PIT Module Control Register, offset: 0x0 */
+    uint8_t RESERVED_0[220];
+    __I uint32_t LTMR64H; /**< PIT Upper Lifetime Timer Register, offset: 0xE0 */
+    __I uint32_t LTMR64L; /**< PIT Lower Lifetime Timer Register, offset: 0xE4 */
+    uint8_t RESERVED_1[24];
+    struct
+    {                        /* offset: 0x100, array step: 0x10 */
+        __IO uint32_t LDVAL; /**< Timer Load Value Register, array offset: 0x100, array step: 0x10 */
+        __I uint32_t CVAL;   /**< Current Timer Value Register, array offset: 0x104, array step: 0x10 */
+        __IO uint32_t TCTRL; /**< Timer Control Register, array offset: 0x108, array step: 0x10 */
+        __IO uint32_t TFLG;  /**< Timer Flag Register, array offset: 0x10C, array step: 0x10 */
+    } CHANNEL[4];
 } PIT_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15966,97 +18240,105 @@ typedef struct {
 
 /*! @name MCR - PIT Module Control Register */
 /*! @{ */
-#define PIT_MCR_FRZ_MASK                         (0x1U)
-#define PIT_MCR_FRZ_SHIFT                        (0U)
-#define PIT_MCR_FRZ(x)                           (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)
-#define PIT_MCR_MDIS_MASK                        (0x2U)
-#define PIT_MCR_MDIS_SHIFT                       (1U)
-#define PIT_MCR_MDIS(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)
+#define PIT_MCR_FRZ_MASK   (0x1U)
+#define PIT_MCR_FRZ_SHIFT  (0U)
+#define PIT_MCR_FRZ(x)     (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)
+#define PIT_MCR_MDIS_MASK  (0x2U)
+#define PIT_MCR_MDIS_SHIFT (1U)
+#define PIT_MCR_MDIS(x)    (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)
 /*! @} */
 
 /*! @name LTMR64H - PIT Upper Lifetime Timer Register */
 /*! @{ */
-#define PIT_LTMR64H_LTH_MASK                     (0xFFFFFFFFU)
-#define PIT_LTMR64H_LTH_SHIFT                    (0U)
-#define PIT_LTMR64H_LTH(x)                       (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)
+#define PIT_LTMR64H_LTH_MASK  (0xFFFFFFFFU)
+#define PIT_LTMR64H_LTH_SHIFT (0U)
+#define PIT_LTMR64H_LTH(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)
 /*! @} */
 
 /*! @name LTMR64L - PIT Lower Lifetime Timer Register */
 /*! @{ */
-#define PIT_LTMR64L_LTL_MASK                     (0xFFFFFFFFU)
-#define PIT_LTMR64L_LTL_SHIFT                    (0U)
-#define PIT_LTMR64L_LTL(x)                       (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)
+#define PIT_LTMR64L_LTL_MASK  (0xFFFFFFFFU)
+#define PIT_LTMR64L_LTL_SHIFT (0U)
+#define PIT_LTMR64L_LTL(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)
 /*! @} */
 
 /*! @name LDVAL - Timer Load Value Register */
 /*! @{ */
-#define PIT_LDVAL_TSV_MASK                       (0xFFFFFFFFU)
-#define PIT_LDVAL_TSV_SHIFT                      (0U)
-#define PIT_LDVAL_TSV(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)
+#define PIT_LDVAL_TSV_MASK  (0xFFFFFFFFU)
+#define PIT_LDVAL_TSV_SHIFT (0U)
+#define PIT_LDVAL_TSV(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)
 /*! @} */
 
 /* The count of PIT_LDVAL */
-#define PIT_LDVAL_COUNT                          (4U)
+#define PIT_LDVAL_COUNT (4U)
 
 /*! @name CVAL - Current Timer Value Register */
 /*! @{ */
-#define PIT_CVAL_TVL_MASK                        (0xFFFFFFFFU)
-#define PIT_CVAL_TVL_SHIFT                       (0U)
-#define PIT_CVAL_TVL(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
+#define PIT_CVAL_TVL_MASK  (0xFFFFFFFFU)
+#define PIT_CVAL_TVL_SHIFT (0U)
+#define PIT_CVAL_TVL(x)    (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
 /*! @} */
 
 /* The count of PIT_CVAL */
-#define PIT_CVAL_COUNT                           (4U)
+#define PIT_CVAL_COUNT (4U)
 
 /*! @name TCTRL - Timer Control Register */
 /*! @{ */
-#define PIT_TCTRL_TEN_MASK                       (0x1U)
-#define PIT_TCTRL_TEN_SHIFT                      (0U)
-#define PIT_TCTRL_TEN(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)
-#define PIT_TCTRL_TIE_MASK                       (0x2U)
-#define PIT_TCTRL_TIE_SHIFT                      (1U)
-#define PIT_TCTRL_TIE(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)
-#define PIT_TCTRL_CHN_MASK                       (0x4U)
-#define PIT_TCTRL_CHN_SHIFT                      (2U)
-#define PIT_TCTRL_CHN(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
+#define PIT_TCTRL_TEN_MASK  (0x1U)
+#define PIT_TCTRL_TEN_SHIFT (0U)
+#define PIT_TCTRL_TEN(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)
+#define PIT_TCTRL_TIE_MASK  (0x2U)
+#define PIT_TCTRL_TIE_SHIFT (1U)
+#define PIT_TCTRL_TIE(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)
+#define PIT_TCTRL_CHN_MASK  (0x4U)
+#define PIT_TCTRL_CHN_SHIFT (2U)
+#define PIT_TCTRL_CHN(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
 /*! @} */
 
 /* The count of PIT_TCTRL */
-#define PIT_TCTRL_COUNT                          (4U)
+#define PIT_TCTRL_COUNT (4U)
 
 /*! @name TFLG - Timer Flag Register */
 /*! @{ */
-#define PIT_TFLG_TIF_MASK                        (0x1U)
-#define PIT_TFLG_TIF_SHIFT                       (0U)
-#define PIT_TFLG_TIF(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)
+#define PIT_TFLG_TIF_MASK  (0x1U)
+#define PIT_TFLG_TIF_SHIFT (0U)
+#define PIT_TFLG_TIF(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)
 /*! @} */
 
 /* The count of PIT_TFLG */
-#define PIT_TFLG_COUNT                           (4U)
-
+#define PIT_TFLG_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group PIT_Register_Masks */
 
-
 /* PIT - Peripheral instance base addresses */
 /** Peripheral PIT base address */
-#define PIT_BASE                                 (0x40084000u)
+#define PIT_BASE (0x40084000u)
 /** Peripheral PIT base pointer */
-#define PIT                                      ((PIT_Type *)PIT_BASE)
+#define PIT ((PIT_Type *)PIT_BASE)
 /** Array initializer of PIT peripheral base addresses */
-#define PIT_BASE_ADDRS                           { PIT_BASE }
+#define PIT_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PIT_BASE                                                                                                       \
+    }
 /** Array initializer of PIT peripheral base pointers */
-#define PIT_BASE_PTRS                            { PIT }
+#define PIT_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PIT                                                                                                            \
+    }
 /** Interrupt vectors for the PIT peripheral type */
-#define PIT_IRQS                                 { { PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn } }
+#define PIT_IRQS                                                                                                       \
+    {                                                                                                                  \
+        {                                                                                                              \
+            PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn                                                                     \
+        }                                                                                                              \
+    }
 
 /*!
  * @}
  */ /* end of group PIT_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PMU Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -16067,36 +18349,37 @@ typedef struct {
  */
 
 /** PMU - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[272];
-  __IO uint32_t REG_1P1;                           /**< Regulator 1P1 Register, offset: 0x110 */
-  __IO uint32_t REG_1P1_SET;                       /**< Regulator 1P1 Register, offset: 0x114 */
-  __IO uint32_t REG_1P1_CLR;                       /**< Regulator 1P1 Register, offset: 0x118 */
-  __IO uint32_t REG_1P1_TOG;                       /**< Regulator 1P1 Register, offset: 0x11C */
-  __IO uint32_t REG_3P0;                           /**< Regulator 3P0 Register, offset: 0x120 */
-  __IO uint32_t REG_3P0_SET;                       /**< Regulator 3P0 Register, offset: 0x124 */
-  __IO uint32_t REG_3P0_CLR;                       /**< Regulator 3P0 Register, offset: 0x128 */
-  __IO uint32_t REG_3P0_TOG;                       /**< Regulator 3P0 Register, offset: 0x12C */
-  __IO uint32_t REG_2P5;                           /**< Regulator 2P5 Register, offset: 0x130 */
-  __IO uint32_t REG_2P5_SET;                       /**< Regulator 2P5 Register, offset: 0x134 */
-  __IO uint32_t REG_2P5_CLR;                       /**< Regulator 2P5 Register, offset: 0x138 */
-  __IO uint32_t REG_2P5_TOG;                       /**< Regulator 2P5 Register, offset: 0x13C */
-  __IO uint32_t REG_CORE;                          /**< Digital Regulator Core Register, offset: 0x140 */
-  __IO uint32_t REG_CORE_SET;                      /**< Digital Regulator Core Register, offset: 0x144 */
-  __IO uint32_t REG_CORE_CLR;                      /**< Digital Regulator Core Register, offset: 0x148 */
-  __IO uint32_t REG_CORE_TOG;                      /**< Digital Regulator Core Register, offset: 0x14C */
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-  __IO uint32_t MISC1;                             /**< Miscellaneous Register 1, offset: 0x160 */
-  __IO uint32_t MISC1_SET;                         /**< Miscellaneous Register 1, offset: 0x164 */
-  __IO uint32_t MISC1_CLR;                         /**< Miscellaneous Register 1, offset: 0x168 */
-  __IO uint32_t MISC1_TOG;                         /**< Miscellaneous Register 1, offset: 0x16C */
-  __IO uint32_t MISC2;                             /**< Miscellaneous Control Register, offset: 0x170 */
-  __IO uint32_t MISC2_SET;                         /**< Miscellaneous Control Register, offset: 0x174 */
-  __IO uint32_t MISC2_CLR;                         /**< Miscellaneous Control Register, offset: 0x178 */
-  __IO uint32_t MISC2_TOG;                         /**< Miscellaneous Control Register, offset: 0x17C */
+typedef struct
+{
+    uint8_t RESERVED_0[272];
+    __IO uint32_t REG_1P1;      /**< Regulator 1P1 Register, offset: 0x110 */
+    __IO uint32_t REG_1P1_SET;  /**< Regulator 1P1 Register, offset: 0x114 */
+    __IO uint32_t REG_1P1_CLR;  /**< Regulator 1P1 Register, offset: 0x118 */
+    __IO uint32_t REG_1P1_TOG;  /**< Regulator 1P1 Register, offset: 0x11C */
+    __IO uint32_t REG_3P0;      /**< Regulator 3P0 Register, offset: 0x120 */
+    __IO uint32_t REG_3P0_SET;  /**< Regulator 3P0 Register, offset: 0x124 */
+    __IO uint32_t REG_3P0_CLR;  /**< Regulator 3P0 Register, offset: 0x128 */
+    __IO uint32_t REG_3P0_TOG;  /**< Regulator 3P0 Register, offset: 0x12C */
+    __IO uint32_t REG_2P5;      /**< Regulator 2P5 Register, offset: 0x130 */
+    __IO uint32_t REG_2P5_SET;  /**< Regulator 2P5 Register, offset: 0x134 */
+    __IO uint32_t REG_2P5_CLR;  /**< Regulator 2P5 Register, offset: 0x138 */
+    __IO uint32_t REG_2P5_TOG;  /**< Regulator 2P5 Register, offset: 0x13C */
+    __IO uint32_t REG_CORE;     /**< Digital Regulator Core Register, offset: 0x140 */
+    __IO uint32_t REG_CORE_SET; /**< Digital Regulator Core Register, offset: 0x144 */
+    __IO uint32_t REG_CORE_CLR; /**< Digital Regulator Core Register, offset: 0x148 */
+    __IO uint32_t REG_CORE_TOG; /**< Digital Regulator Core Register, offset: 0x14C */
+    __IO uint32_t MISC0;        /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET;    /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR;    /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG;    /**< Miscellaneous Register 0, offset: 0x15C */
+    __IO uint32_t MISC1;        /**< Miscellaneous Register 1, offset: 0x160 */
+    __IO uint32_t MISC1_SET;    /**< Miscellaneous Register 1, offset: 0x164 */
+    __IO uint32_t MISC1_CLR;    /**< Miscellaneous Register 1, offset: 0x168 */
+    __IO uint32_t MISC1_TOG;    /**< Miscellaneous Register 1, offset: 0x16C */
+    __IO uint32_t MISC2;        /**< Miscellaneous Control Register, offset: 0x170 */
+    __IO uint32_t MISC2_SET;    /**< Miscellaneous Control Register, offset: 0x174 */
+    __IO uint32_t MISC2_CLR;    /**< Miscellaneous Control Register, offset: 0x178 */
+    __IO uint32_t MISC2_TOG;    /**< Miscellaneous Control Register, offset: 0x17C */
 } PMU_Type;
 
 /* ----------------------------------------------------------------------------
@@ -16110,1085 +18393,1407 @@ typedef struct {
 
 /*! @name REG_1P1 - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_1P1_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_1P1_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_1P1_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_1P1_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
-#define PMU_REG_1P1_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_1P1_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_1P1_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_ENABLE_PULLDOWN_MASK         (0x8U)
-#define PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT        (3U)
-#define PMU_REG_1P1_ENABLE_PULLDOWN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_1P1_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_1P1_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_OFFSET_SHIFT)) & PMU_REG_1P1_BO_OFFSET_MASK)
-#define PMU_REG_1P1_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_1P1_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_1P1_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_BO_VDD1P1_MASK               (0x10000U)
-#define PMU_REG_1P1_BO_VDD1P1_SHIFT              (16U)
-#define PMU_REG_1P1_BO_VDD1P1(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_OK_VDD1P1_MASK               (0x20000U)
-#define PMU_REG_1P1_OK_VDD1P1_SHIFT              (17U)
-#define PMU_REG_1P1_OK_VDD1P1(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_OK_VDD1P1_MASK)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK      (0x40000U)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT     (18U)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG_MASK      (0x80000U)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT     (19U)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
+#define PMU_REG_1P1_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_ENABLE_PULLDOWN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_OFFSET_SHIFT)) & PMU_REG_1P1_BO_OFFSET_MASK)
+#define PMU_REG_1P1_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_BO_VDD1P1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_OK_VDD1P1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK  (0x40000U)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT (18U)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG_MASK  (0x80000U)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT (19U)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_SET - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_BO_SHIFT)) & PMU_REG_1P1_SET_ENABLE_BO_MASK)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_OFFSET_SHIFT)) & PMU_REG_1P1_SET_BO_OFFSET_MASK)
-#define PMU_REG_1P1_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_SET_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_SET_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_SET_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_SET_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_SET_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_SET_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_BO_SHIFT)) & PMU_REG_1P1_SET_ENABLE_BO_MASK)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_OFFSET_SHIFT)) & PMU_REG_1P1_SET_BO_OFFSET_MASK)
+#define PMU_REG_1P1_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_SET_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_SET_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_SET_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_SET_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_SET_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_SET_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_SET_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SET_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_CLR - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_BO_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_BO_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_OFFSET_SHIFT)) & PMU_REG_1P1_CLR_BO_OFFSET_MASK)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_CLR_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_CLR_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_CLR_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_CLR_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_BO_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_BO_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_OFFSET_SHIFT)) & PMU_REG_1P1_CLR_BO_OFFSET_MASK)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_CLR_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_CLR_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_CLR_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_CLR_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_TOG - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_BO_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_BO_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_OFFSET_SHIFT)) & PMU_REG_1P1_TOG_BO_OFFSET_MASK)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_TOG_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_TOG_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_TOG_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_TOG_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_BO_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_BO_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_OFFSET_SHIFT)) & PMU_REG_1P1_TOG_BO_OFFSET_MASK)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_TOG_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_TOG_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_TOG_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_TOG_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_3P0 - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_3P0_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_3P0_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_3P0_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_3P0_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_BO_SHIFT)) & PMU_REG_3P0_ENABLE_BO_MASK)
-#define PMU_REG_3P0_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_3P0_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_3P0_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_3P0_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_3P0_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_OFFSET_SHIFT)) & PMU_REG_3P0_BO_OFFSET_MASK)
-#define PMU_REG_3P0_VBUS_SEL_MASK                (0x80U)
-#define PMU_REG_3P0_VBUS_SEL_SHIFT               (7U)
-#define PMU_REG_3P0_VBUS_SEL(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_VBUS_SEL_SHIFT)) & PMU_REG_3P0_VBUS_SEL_MASK)
-#define PMU_REG_3P0_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_3P0_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_3P0_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_BO_VDD3P0_MASK               (0x10000U)
-#define PMU_REG_3P0_BO_VDD3P0_SHIFT              (16U)
-#define PMU_REG_3P0_BO_VDD3P0(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_OK_VDD3P0_MASK               (0x20000U)
-#define PMU_REG_3P0_OK_VDD3P0_SHIFT              (17U)
-#define PMU_REG_3P0_OK_VDD3P0(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_BO_SHIFT)) & PMU_REG_3P0_ENABLE_BO_MASK)
+#define PMU_REG_3P0_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_OFFSET_SHIFT)) & PMU_REG_3P0_BO_OFFSET_MASK)
+#define PMU_REG_3P0_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_VBUS_SEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_VBUS_SEL_SHIFT)) & PMU_REG_3P0_VBUS_SEL_MASK)
+#define PMU_REG_3P0_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_BO_VDD3P0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_OK_VDD3P0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_SET - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_BO_SHIFT)) & PMU_REG_3P0_SET_ENABLE_BO_MASK)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_OFFSET_SHIFT)) & PMU_REG_3P0_SET_BO_OFFSET_MASK)
-#define PMU_REG_3P0_SET_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_SET_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_SET_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_VBUS_SEL_SHIFT)) & PMU_REG_3P0_SET_VBUS_SEL_MASK)
-#define PMU_REG_3P0_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_SET_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_SET_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_SET_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_SET_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_SET_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_SET_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_BO_SHIFT)) & PMU_REG_3P0_SET_ENABLE_BO_MASK)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_OFFSET_SHIFT)) & PMU_REG_3P0_SET_BO_OFFSET_MASK)
+#define PMU_REG_3P0_SET_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_SET_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_SET_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_VBUS_SEL_SHIFT)) & PMU_REG_3P0_SET_VBUS_SEL_MASK)
+#define PMU_REG_3P0_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_SET_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_SET_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_SET_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_SET_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_SET_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_SET_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_CLR - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_BO_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_BO_MASK)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_OFFSET_SHIFT)) & PMU_REG_3P0_CLR_BO_OFFSET_MASK)
-#define PMU_REG_3P0_CLR_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_CLR_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_CLR_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_VBUS_SEL_SHIFT)) & PMU_REG_3P0_CLR_VBUS_SEL_MASK)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_CLR_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_CLR_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_CLR_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_CLR_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_BO_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_BO_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_OFFSET_SHIFT)) & PMU_REG_3P0_CLR_BO_OFFSET_MASK)
+#define PMU_REG_3P0_CLR_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_CLR_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_CLR_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_VBUS_SEL_SHIFT)) & PMU_REG_3P0_CLR_VBUS_SEL_MASK)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_CLR_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_CLR_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_CLR_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_CLR_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_TOG - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_BO_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_BO_MASK)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_OFFSET_SHIFT)) & PMU_REG_3P0_TOG_BO_OFFSET_MASK)
-#define PMU_REG_3P0_TOG_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_TOG_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_TOG_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_VBUS_SEL_SHIFT)) & PMU_REG_3P0_TOG_VBUS_SEL_MASK)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_TOG_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_TOG_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_TOG_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_TOG_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_BO_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_BO_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_OFFSET_SHIFT)) & PMU_REG_3P0_TOG_BO_OFFSET_MASK)
+#define PMU_REG_3P0_TOG_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_TOG_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_TOG_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_VBUS_SEL_SHIFT)) & PMU_REG_3P0_TOG_VBUS_SEL_MASK)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_TOG_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_TOG_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_TOG_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_TOG_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_2P5 - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_2P5_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_2P5_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_2P5_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_2P5_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_BO_SHIFT)) & PMU_REG_2P5_ENABLE_BO_MASK)
-#define PMU_REG_2P5_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_2P5_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_2P5_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_ENABLE_PULLDOWN_MASK         (0x8U)
-#define PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT        (3U)
-#define PMU_REG_2P5_ENABLE_PULLDOWN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_2P5_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_2P5_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_OFFSET_SHIFT)) & PMU_REG_2P5_BO_OFFSET_MASK)
-#define PMU_REG_2P5_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_2P5_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_2P5_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_BO_VDD2P5_MASK               (0x10000U)
-#define PMU_REG_2P5_BO_VDD2P5_SHIFT              (16U)
-#define PMU_REG_2P5_BO_VDD2P5(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_OK_VDD2P5_MASK               (0x20000U)
-#define PMU_REG_2P5_OK_VDD2P5_SHIFT              (17U)
-#define PMU_REG_2P5_OK_VDD2P5(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_OK_VDD2P5_MASK)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK      (0x40000U)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT     (18U)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_BO_SHIFT)) & PMU_REG_2P5_ENABLE_BO_MASK)
+#define PMU_REG_2P5_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_ENABLE_PULLDOWN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_OFFSET_SHIFT)) & PMU_REG_2P5_BO_OFFSET_MASK)
+#define PMU_REG_2P5_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_BO_VDD2P5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_OK_VDD2P5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK  (0x40000U)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT (18U)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_SET - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_BO_SHIFT)) & PMU_REG_2P5_SET_ENABLE_BO_MASK)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_OFFSET_SHIFT)) & PMU_REG_2P5_SET_BO_OFFSET_MASK)
-#define PMU_REG_2P5_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_SET_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_SET_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_SET_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_SET_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_SET_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_SET_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_BO_SHIFT)) & PMU_REG_2P5_SET_ENABLE_BO_MASK)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_OFFSET_SHIFT)) & PMU_REG_2P5_SET_BO_OFFSET_MASK)
+#define PMU_REG_2P5_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_SET_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_SET_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_SET_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_SET_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_SET_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_SET_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_CLR - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_BO_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_BO_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_OFFSET_SHIFT)) & PMU_REG_2P5_CLR_BO_OFFSET_MASK)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_CLR_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_CLR_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_CLR_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_CLR_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_BO_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_BO_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_OFFSET_SHIFT)) & PMU_REG_2P5_CLR_BO_OFFSET_MASK)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_CLR_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_CLR_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_CLR_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_CLR_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_TOG - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_BO_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_BO_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_OFFSET_SHIFT)) & PMU_REG_2P5_TOG_BO_OFFSET_MASK)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_TOG_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_TOG_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_TOG_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_TOG_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_BO_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_BO_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_OFFSET_SHIFT)) & PMU_REG_2P5_TOG_BO_OFFSET_MASK)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_TOG_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_TOG_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_TOG_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_TOG_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_CORE - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_REG0_TARG_MASK              (0x1FU)
-#define PMU_REG_CORE_REG0_TARG_SHIFT             (0U)
-#define PMU_REG_CORE_REG0_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_TARG_SHIFT)) & PMU_REG_CORE_REG0_TARG_MASK)
-#define PMU_REG_CORE_REG0_ADJ_MASK               (0x1E0U)
-#define PMU_REG_CORE_REG0_ADJ_SHIFT              (5U)
-#define PMU_REG_CORE_REG0_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_ADJ_SHIFT)) & PMU_REG_CORE_REG0_ADJ_MASK)
-#define PMU_REG_CORE_REG1_TARG_MASK              (0x3E00U)
-#define PMU_REG_CORE_REG1_TARG_SHIFT             (9U)
-#define PMU_REG_CORE_REG1_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_TARG_SHIFT)) & PMU_REG_CORE_REG1_TARG_MASK)
-#define PMU_REG_CORE_REG1_ADJ_MASK               (0x3C000U)
-#define PMU_REG_CORE_REG1_ADJ_SHIFT              (14U)
-#define PMU_REG_CORE_REG1_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_ADJ_SHIFT)) & PMU_REG_CORE_REG1_ADJ_MASK)
-#define PMU_REG_CORE_REG2_TARG_MASK              (0x7C0000U)
-#define PMU_REG_CORE_REG2_TARG_SHIFT             (18U)
-#define PMU_REG_CORE_REG2_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_TARG_SHIFT)) & PMU_REG_CORE_REG2_TARG_MASK)
-#define PMU_REG_CORE_REG2_ADJ_MASK               (0x7800000U)
-#define PMU_REG_CORE_REG2_ADJ_SHIFT              (23U)
-#define PMU_REG_CORE_REG2_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_ADJ_SHIFT)) & PMU_REG_CORE_REG2_ADJ_MASK)
-#define PMU_REG_CORE_RAMP_RATE_MASK              (0x18000000U)
-#define PMU_REG_CORE_RAMP_RATE_SHIFT             (27U)
-#define PMU_REG_CORE_RAMP_RATE(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_RAMP_RATE_SHIFT)) & PMU_REG_CORE_RAMP_RATE_MASK)
-#define PMU_REG_CORE_FET_ODRIVE_MASK             (0x20000000U)
-#define PMU_REG_CORE_FET_ODRIVE_SHIFT            (29U)
-#define PMU_REG_CORE_FET_ODRIVE(x)               (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_REG0_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_TARG_SHIFT)) & PMU_REG_CORE_REG0_TARG_MASK)
+#define PMU_REG_CORE_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_REG0_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_ADJ_SHIFT)) & PMU_REG_CORE_REG0_ADJ_MASK)
+#define PMU_REG_CORE_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_REG1_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_TARG_SHIFT)) & PMU_REG_CORE_REG1_TARG_MASK)
+#define PMU_REG_CORE_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_REG1_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_ADJ_SHIFT)) & PMU_REG_CORE_REG1_ADJ_MASK)
+#define PMU_REG_CORE_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_REG2_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_TARG_SHIFT)) & PMU_REG_CORE_REG2_TARG_MASK)
+#define PMU_REG_CORE_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_REG2_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_ADJ_SHIFT)) & PMU_REG_CORE_REG2_ADJ_MASK)
+#define PMU_REG_CORE_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_RAMP_RATE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_RAMP_RATE_SHIFT)) & PMU_REG_CORE_RAMP_RATE_MASK)
+#define PMU_REG_CORE_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_FET_ODRIVE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_SET - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_SET_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_SET_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_SET_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_TARG_SHIFT)) & PMU_REG_CORE_SET_REG0_TARG_MASK)
-#define PMU_REG_CORE_SET_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_SET_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_SET_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG0_ADJ_MASK)
-#define PMU_REG_CORE_SET_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_SET_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_SET_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_TARG_SHIFT)) & PMU_REG_CORE_SET_REG1_TARG_MASK)
-#define PMU_REG_CORE_SET_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_SET_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_SET_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG1_ADJ_MASK)
-#define PMU_REG_CORE_SET_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_SET_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_SET_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_TARG_SHIFT)) & PMU_REG_CORE_SET_REG2_TARG_MASK)
-#define PMU_REG_CORE_SET_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_SET_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_SET_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG2_ADJ_MASK)
-#define PMU_REG_CORE_SET_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_SET_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_SET_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_RAMP_RATE_SHIFT)) & PMU_REG_CORE_SET_RAMP_RATE_MASK)
-#define PMU_REG_CORE_SET_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_SET_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_SET_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_SET_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_SET_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_SET_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_SET_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_TARG_SHIFT)) & PMU_REG_CORE_SET_REG0_TARG_MASK)
+#define PMU_REG_CORE_SET_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_SET_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_SET_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG0_ADJ_MASK)
+#define PMU_REG_CORE_SET_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_SET_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_SET_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_TARG_SHIFT)) & PMU_REG_CORE_SET_REG1_TARG_MASK)
+#define PMU_REG_CORE_SET_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_SET_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_SET_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG1_ADJ_MASK)
+#define PMU_REG_CORE_SET_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_SET_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_SET_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_TARG_SHIFT)) & PMU_REG_CORE_SET_REG2_TARG_MASK)
+#define PMU_REG_CORE_SET_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_SET_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_SET_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG2_ADJ_MASK)
+#define PMU_REG_CORE_SET_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_SET_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_SET_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_RAMP_RATE_SHIFT)) & PMU_REG_CORE_SET_RAMP_RATE_MASK)
+#define PMU_REG_CORE_SET_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_SET_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_SET_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_SET_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_CLR - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_CLR_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_CLR_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_CLR_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG0_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_CLR_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_CLR_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG0_ADJ_MASK)
-#define PMU_REG_CORE_CLR_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_CLR_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_CLR_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG1_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_CLR_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_CLR_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG1_ADJ_MASK)
-#define PMU_REG_CORE_CLR_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_CLR_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_CLR_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG2_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_CLR_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_CLR_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG2_ADJ_MASK)
-#define PMU_REG_CORE_CLR_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_CLR_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_CLR_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_RAMP_RATE_SHIFT)) & PMU_REG_CORE_CLR_RAMP_RATE_MASK)
-#define PMU_REG_CORE_CLR_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_CLR_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_CLR_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_CLR_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_CLR_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_CLR_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG0_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_CLR_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_CLR_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG0_ADJ_MASK)
+#define PMU_REG_CORE_CLR_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_CLR_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_CLR_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG1_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_CLR_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_CLR_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG1_ADJ_MASK)
+#define PMU_REG_CORE_CLR_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_CLR_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_CLR_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG2_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_CLR_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_CLR_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG2_ADJ_MASK)
+#define PMU_REG_CORE_CLR_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_CLR_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_CLR_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_RAMP_RATE_SHIFT)) & PMU_REG_CORE_CLR_RAMP_RATE_MASK)
+#define PMU_REG_CORE_CLR_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_CLR_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_CLR_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_TOG - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_TOG_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_TOG_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_TOG_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG0_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_TOG_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_TOG_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG0_ADJ_MASK)
-#define PMU_REG_CORE_TOG_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_TOG_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_TOG_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG1_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_TOG_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_TOG_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG1_ADJ_MASK)
-#define PMU_REG_CORE_TOG_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_TOG_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_TOG_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG2_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_TOG_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_TOG_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG2_ADJ_MASK)
-#define PMU_REG_CORE_TOG_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_TOG_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_TOG_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_RAMP_RATE_SHIFT)) & PMU_REG_CORE_TOG_RAMP_RATE_MASK)
-#define PMU_REG_CORE_TOG_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_TOG_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_TOG_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_TOG_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_TOG_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_TOG_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG0_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_TOG_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_TOG_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG0_ADJ_MASK)
+#define PMU_REG_CORE_TOG_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_TOG_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_TOG_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG1_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_TOG_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_TOG_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG1_ADJ_MASK)
+#define PMU_REG_CORE_TOG_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_TOG_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_TOG_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG2_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_TOG_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_TOG_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG2_ADJ_MASK)
+#define PMU_REG_CORE_TOG_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_TOG_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_TOG_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_RAMP_RATE_SHIFT)) & PMU_REG_CORE_TOG_RAMP_RATE_MASK)
+#define PMU_REG_CORE_TOG_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_TOG_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_TOG_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_REFTOP_PWD_MASK                (0x1U)
-#define PMU_MISC0_REFTOP_PWD_SHIFT               (0U)
-#define PMU_MISC0_REFTOP_PWD(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_PWD_SHIFT)) & PMU_MISC0_REFTOP_PWD_MASK)
-#define PMU_MISC0_REFTOP_SELFBIASOFF_MASK        (0x8U)
-#define PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT       (3U)
-#define PMU_MISC0_REFTOP_SELFBIASOFF(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_REFTOP_VBGADJ_MASK             (0x70U)
-#define PMU_MISC0_REFTOP_VBGADJ_SHIFT            (4U)
-#define PMU_MISC0_REFTOP_VBGADJ(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_REFTOP_VBGUP_MASK              (0x80U)
-#define PMU_MISC0_REFTOP_VBGUP_SHIFT             (7U)
-#define PMU_MISC0_REFTOP_VBGUP(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_STOP_MODE_CONFIG_MASK          (0xC00U)
-#define PMU_MISC0_STOP_MODE_CONFIG_SHIFT         (10U)
-#define PMU_MISC0_STOP_MODE_CONFIG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_DISCON_HIGH_SNVS_MASK          (0x1000U)
-#define PMU_MISC0_DISCON_HIGH_SNVS_SHIFT         (12U)
-#define PMU_MISC0_DISCON_HIGH_SNVS(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_OSC_I_MASK                     (0x6000U)
-#define PMU_MISC0_OSC_I_SHIFT                    (13U)
-#define PMU_MISC0_OSC_I(x)                       (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_I_SHIFT)) & PMU_MISC0_OSC_I_MASK)
-#define PMU_MISC0_OSC_XTALOK_MASK                (0x8000U)
-#define PMU_MISC0_OSC_XTALOK_SHIFT               (15U)
-#define PMU_MISC0_OSC_XTALOK(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_SHIFT)) & PMU_MISC0_OSC_XTALOK_MASK)
-#define PMU_MISC0_OSC_XTALOK_EN_MASK             (0x10000U)
-#define PMU_MISC0_OSC_XTALOK_EN_SHIFT            (16U)
-#define PMU_MISC0_OSC_XTALOK_EN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_CLKGATE_CTRL_MASK              (0x2000000U)
-#define PMU_MISC0_CLKGATE_CTRL_SHIFT             (25U)
-#define PMU_MISC0_CLKGATE_CTRL(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_CLKGATE_DELAY_MASK             (0x1C000000U)
-#define PMU_MISC0_CLKGATE_DELAY_SHIFT            (26U)
-#define PMU_MISC0_CLKGATE_DELAY(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_RTC_XTAL_SOURCE_MASK           (0x20000000U)
-#define PMU_MISC0_RTC_XTAL_SOURCE_SHIFT          (29U)
-#define PMU_MISC0_RTC_XTAL_SOURCE(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_XTAL_24M_PWD_MASK              (0x40000000U)
-#define PMU_MISC0_XTAL_24M_PWD_SHIFT             (30U)
-#define PMU_MISC0_XTAL_24M_PWD(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_VID_PLL_PREDIV_MASK            (0x80000000U)
-#define PMU_MISC0_VID_PLL_PREDIV_SHIFT           (31U)
-#define PMU_MISC0_VID_PLL_PREDIV(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_REFTOP_PWD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_PWD_SHIFT)) & PMU_MISC0_REFTOP_PWD_MASK)
+#define PMU_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_REFTOP_SELFBIASOFF(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_REFTOP_VBGADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_REFTOP_VBGUP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_STOP_MODE_CONFIG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_DISCON_HIGH_SNVS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_I_SHIFT)) & PMU_MISC0_OSC_I_MASK)
+#define PMU_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_OSC_XTALOK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_SHIFT)) & PMU_MISC0_OSC_XTALOK_MASK)
+#define PMU_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_OSC_XTALOK_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_CLKGATE_CTRL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_CLKGATE_DELAY(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_RTC_XTAL_SOURCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_XTAL_24M_PWD(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_VID_PLL_PREDIV(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_SET_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_SET_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_SET_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_PWD_SHIFT)) & PMU_MISC0_SET_REFTOP_PWD_MASK)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_SET_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_SET_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_SET_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_SET_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_SET_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_SET_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_SET_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_SET_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_I_SHIFT)) & PMU_MISC0_SET_OSC_I_MASK)
-#define PMU_MISC0_SET_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_SET_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_SET_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_MASK)
-#define PMU_MISC0_SET_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_SET_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_SET_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_SET_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_SET_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_SET_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_SET_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_SET_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_SET_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_SET_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_SET_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_SET_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_SET_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_SET_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_SET_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_SET_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_SET_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_SET_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_PWD_SHIFT)) & PMU_MISC0_SET_REFTOP_PWD_MASK)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_SET_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_SET_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_SET_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_SET_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_SET_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_I_SHIFT)) & PMU_MISC0_SET_OSC_I_MASK)
+#define PMU_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_SET_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_MASK)
+#define PMU_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_SET_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_SET_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_SET_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_SET_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_SET_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_SET_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_SET_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_SET_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_SET_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_SET_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_CLR_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_CLR_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_CLR_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_PWD_SHIFT)) & PMU_MISC0_CLR_REFTOP_PWD_MASK)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_CLR_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_CLR_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_CLR_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_CLR_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_CLR_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_I_SHIFT)) & PMU_MISC0_CLR_OSC_I_MASK)
-#define PMU_MISC0_CLR_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_CLR_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_CLR_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_MASK)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_CLR_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_CLR_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLR_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_CLR_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_CLR_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_CLR_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_CLR_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_CLR_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_CLR_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_CLR_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_PWD_SHIFT)) & PMU_MISC0_CLR_REFTOP_PWD_MASK)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_CLR_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_CLR_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_CLR_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_CLR_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_I_SHIFT)) & PMU_MISC0_CLR_OSC_I_MASK)
+#define PMU_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_CLR_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_MASK)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_CLR_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_CLR_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_CLR_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_CLR_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_TOG_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_TOG_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_TOG_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_PWD_SHIFT)) & PMU_MISC0_TOG_REFTOP_PWD_MASK)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_TOG_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_TOG_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_TOG_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_TOG_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_TOG_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_I_SHIFT)) & PMU_MISC0_TOG_OSC_I_MASK)
-#define PMU_MISC0_TOG_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_TOG_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_TOG_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_MASK)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_TOG_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_TOG_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_TOG_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_TOG_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_TOG_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_TOG_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_TOG_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_TOG_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_TOG_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_TOG_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_PWD_SHIFT)) & PMU_MISC0_TOG_REFTOP_PWD_MASK)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_TOG_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_TOG_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_TOG_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_TOG_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_I_SHIFT)) & PMU_MISC0_TOG_OSC_I_MASK)
+#define PMU_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_TOG_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_MASK)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_TOG_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_TOG_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_TOG_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_TOG_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC1 - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_LVDS1_CLK_SEL_MASK             (0x1FU)
-#define PMU_MISC1_LVDS1_CLK_SEL_SHIFT            (0U)
-#define PMU_MISC1_LVDS1_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_LVDS2_CLK_SEL_MASK             (0x3E0U)
-#define PMU_MISC1_LVDS2_CLK_SEL_SHIFT            (5U)
-#define PMU_MISC1_LVDS2_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_LVDSCLK1_OBEN_MASK             (0x400U)
-#define PMU_MISC1_LVDSCLK1_OBEN_SHIFT            (10U)
-#define PMU_MISC1_LVDSCLK1_OBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_LVDSCLK2_OBEN_MASK             (0x800U)
-#define PMU_MISC1_LVDSCLK2_OBEN_SHIFT            (11U)
-#define PMU_MISC1_LVDSCLK2_OBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_LVDSCLK1_IBEN_MASK             (0x1000U)
-#define PMU_MISC1_LVDSCLK1_IBEN_SHIFT            (12U)
-#define PMU_MISC1_LVDSCLK1_IBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_LVDSCLK2_IBEN_MASK             (0x2000U)
-#define PMU_MISC1_LVDSCLK2_IBEN_SHIFT            (13U)
-#define PMU_MISC1_LVDSCLK2_IBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN_MASK       (0x10000U)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT      (16U)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN_MASK       (0x20000U)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT      (17U)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_IRQ_TEMPPANIC_MASK             (0x8000000U)
-#define PMU_MISC1_IRQ_TEMPPANIC_SHIFT            (27U)
-#define PMU_MISC1_IRQ_TEMPPANIC(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_IRQ_TEMPLOW_MASK               (0x10000000U)
-#define PMU_MISC1_IRQ_TEMPLOW_SHIFT              (28U)
-#define PMU_MISC1_IRQ_TEMPLOW(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_IRQ_TEMPHIGH_MASK              (0x20000000U)
-#define PMU_MISC1_IRQ_TEMPHIGH_SHIFT             (29U)
-#define PMU_MISC1_IRQ_TEMPHIGH(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_IRQ_ANA_BO_MASK                (0x40000000U)
-#define PMU_MISC1_IRQ_ANA_BO_SHIFT               (30U)
-#define PMU_MISC1_IRQ_ANA_BO(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_IRQ_DIG_BO_MASK                (0x80000000U)
-#define PMU_MISC1_IRQ_DIG_BO_SHIFT               (31U)
-#define PMU_MISC1_IRQ_DIG_BO(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_LVDS1_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_LVDS2_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_LVDSCLK1_OBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_LVDSCLK2_OBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_LVDSCLK1_IBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_LVDSCLK2_IBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_IRQ_TEMPPANIC(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_IRQ_TEMPLOW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_IRQ_TEMPHIGH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_IRQ_ANA_BO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_IRQ_DIG_BO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_SET - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_SET_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_SET_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_SET_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_SET_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_SET_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_SET_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_SET_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_SET_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_SET_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_SET_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_SET_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_SET_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_SET_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_SET_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_SET_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_SET_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_SET_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_SET_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_SET_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_SET_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_CLR - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_CLR_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_CLR_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_CLR_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_CLR_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_CLR_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_CLR_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_CLR_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_CLR_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_TOG - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_TOG_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_TOG_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_TOG_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_TOG_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_TOG_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_TOG_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_TOG_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_TOG_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC2 - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_REG0_BO_OFFSET_MASK            (0x7U)
-#define PMU_MISC2_REG0_BO_OFFSET_SHIFT           (0U)
-#define PMU_MISC2_REG0_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_REG0_BO_STATUS_MASK            (0x8U)
-#define PMU_MISC2_REG0_BO_STATUS_SHIFT           (3U)
-#define PMU_MISC2_REG0_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_REG0_ENABLE_BO_MASK            (0x20U)
-#define PMU_MISC2_REG0_ENABLE_BO_SHIFT           (5U)
-#define PMU_MISC2_REG0_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_PLL3_disable_MASK              (0x80U)
-#define PMU_MISC2_PLL3_disable_SHIFT             (7U)
-#define PMU_MISC2_PLL3_disable(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_PLL3_disable_SHIFT)) & PMU_MISC2_PLL3_disable_MASK)
-#define PMU_MISC2_REG1_BO_OFFSET_MASK            (0x700U)
-#define PMU_MISC2_REG1_BO_OFFSET_SHIFT           (8U)
-#define PMU_MISC2_REG1_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_REG1_BO_STATUS_MASK            (0x800U)
-#define PMU_MISC2_REG1_BO_STATUS_SHIFT           (11U)
-#define PMU_MISC2_REG1_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_REG1_ENABLE_BO_MASK            (0x2000U)
-#define PMU_MISC2_REG1_ENABLE_BO_SHIFT           (13U)
-#define PMU_MISC2_REG1_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_AUDIO_DIV_LSB_MASK             (0x8000U)
-#define PMU_MISC2_AUDIO_DIV_LSB_SHIFT            (15U)
-#define PMU_MISC2_AUDIO_DIV_LSB(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_REG2_BO_OFFSET_MASK            (0x70000U)
-#define PMU_MISC2_REG2_BO_OFFSET_SHIFT           (16U)
-#define PMU_MISC2_REG2_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_REG2_BO_STATUS_MASK            (0x80000U)
-#define PMU_MISC2_REG2_BO_STATUS_SHIFT           (19U)
-#define PMU_MISC2_REG2_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_REG2_ENABLE_BO_MASK            (0x200000U)
-#define PMU_MISC2_REG2_ENABLE_BO_SHIFT           (21U)
-#define PMU_MISC2_REG2_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_REG2_OK_MASK                   (0x400000U)
-#define PMU_MISC2_REG2_OK_SHIFT                  (22U)
-#define PMU_MISC2_REG2_OK(x)                     (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_OK_SHIFT)) & PMU_MISC2_REG2_OK_MASK)
-#define PMU_MISC2_AUDIO_DIV_MSB_MASK             (0x800000U)
-#define PMU_MISC2_AUDIO_DIV_MSB_SHIFT            (23U)
-#define PMU_MISC2_AUDIO_DIV_MSB(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_REG0_STEP_TIME_MASK            (0x3000000U)
-#define PMU_MISC2_REG0_STEP_TIME_SHIFT           (24U)
-#define PMU_MISC2_REG0_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_REG1_STEP_TIME_MASK            (0xC000000U)
-#define PMU_MISC2_REG1_STEP_TIME_SHIFT           (26U)
-#define PMU_MISC2_REG1_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_REG2_STEP_TIME_MASK            (0x30000000U)
-#define PMU_MISC2_REG2_STEP_TIME_SHIFT           (28U)
-#define PMU_MISC2_REG2_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_VIDEO_DIV_MASK                 (0xC0000000U)
-#define PMU_MISC2_VIDEO_DIV_SHIFT                (30U)
-#define PMU_MISC2_VIDEO_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_VIDEO_DIV_SHIFT)) & PMU_MISC2_VIDEO_DIV_MASK)
+#define PMU_MISC2_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_REG0_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_REG0_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_REG0_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_PLL3_disable(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_PLL3_disable_SHIFT)) & PMU_MISC2_PLL3_disable_MASK)
+#define PMU_MISC2_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_REG1_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_REG1_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_REG1_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_AUDIO_DIV_LSB(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_REG2_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_REG2_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_REG2_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_REG2_OK_MASK        (0x400000U)
+#define PMU_MISC2_REG2_OK_SHIFT       (22U)
+#define PMU_MISC2_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_OK_SHIFT)) & PMU_MISC2_REG2_OK_MASK)
+#define PMU_MISC2_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_AUDIO_DIV_MSB(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_REG0_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_REG1_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_REG2_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_VIDEO_DIV(x)    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_VIDEO_DIV_SHIFT)) & PMU_MISC2_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_SET - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_SET_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_SET_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_SET_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_SET_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_SET_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_SET_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_SET_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_PLL3_disable_SHIFT)) & PMU_MISC2_SET_PLL3_disable_MASK)
-#define PMU_MISC2_SET_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_SET_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_SET_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_SET_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_SET_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_SET_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_SET_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_SET_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_SET_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_SET_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_SET_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_SET_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_OK_SHIFT)) & PMU_MISC2_SET_REG2_OK_MASK)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_SET_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_SET_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_SET_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_SET_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_SET_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_SET_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_SET_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_SET_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_SET_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_SET_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_SET_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_SET_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_VIDEO_DIV_SHIFT)) & PMU_MISC2_SET_VIDEO_DIV_MASK)
+#define PMU_MISC2_SET_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_SET_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_SET_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_SET_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_SET_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_SET_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_SET_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_PLL3_disable_SHIFT)) & PMU_MISC2_SET_PLL3_disable_MASK)
+#define PMU_MISC2_SET_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_SET_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_SET_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_SET_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_SET_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_SET_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_SET_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_SET_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_SET_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_SET_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_SET_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_SET_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_OK_SHIFT)) & PMU_MISC2_SET_REG2_OK_MASK)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_SET_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_SET_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_SET_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_SET_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_SET_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_SET_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_SET_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_SET_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_SET_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_SET_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_SET_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_SET_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_VIDEO_DIV_SHIFT)) & PMU_MISC2_SET_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_CLR - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_CLR_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_CLR_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_CLR_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_CLR_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_CLR_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_PLL3_disable_SHIFT)) & PMU_MISC2_CLR_PLL3_disable_MASK)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_CLR_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_CLR_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_CLR_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_CLR_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_OK_SHIFT)) & PMU_MISC2_CLR_REG2_OK_MASK)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_CLR_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_CLR_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_CLR_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_CLR_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_CLR_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_CLR_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_VIDEO_DIV_SHIFT)) & PMU_MISC2_CLR_VIDEO_DIV_MASK)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_CLR_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_CLR_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_CLR_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_PLL3_disable_SHIFT)) & PMU_MISC2_CLR_PLL3_disable_MASK)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_CLR_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_CLR_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_CLR_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_CLR_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_OK_SHIFT)) & PMU_MISC2_CLR_REG2_OK_MASK)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_CLR_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_CLR_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_CLR_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_CLR_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_CLR_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_CLR_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_VIDEO_DIV_SHIFT)) & PMU_MISC2_CLR_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_TOG - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_TOG_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_TOG_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_TOG_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_TOG_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_PLL3_disable_SHIFT)) & PMU_MISC2_TOG_PLL3_disable_MASK)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_TOG_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_TOG_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_TOG_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_TOG_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_OK_SHIFT)) & PMU_MISC2_TOG_REG2_OK_MASK)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_TOG_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_TOG_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_TOG_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_TOG_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_TOG_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_TOG_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_VIDEO_DIV_SHIFT)) & PMU_MISC2_TOG_VIDEO_DIV_MASK)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_TOG_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_TOG_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_TOG_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_PLL3_disable_SHIFT)) & PMU_MISC2_TOG_PLL3_disable_MASK)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_TOG_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_TOG_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_TOG_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_TOG_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_OK_SHIFT)) & PMU_MISC2_TOG_REG2_OK_MASK)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_TOG_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_TOG_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_TOG_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_TOG_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_TOG_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_TOG_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_VIDEO_DIV_SHIFT)) & PMU_MISC2_TOG_VIDEO_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PMU_Register_Masks */
 
-
 /* PMU - Peripheral instance base addresses */
 /** Peripheral PMU base address */
-#define PMU_BASE                                 (0x400D8000u)
+#define PMU_BASE (0x400D8000u)
 /** Peripheral PMU base pointer */
-#define PMU                                      ((PMU_Type *)PMU_BASE)
+#define PMU ((PMU_Type *)PMU_BASE)
 /** Array initializer of PMU peripheral base addresses */
-#define PMU_BASE_ADDRS                           { PMU_BASE }
+#define PMU_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PMU_BASE                                                                                                       \
+    }
 /** Array initializer of PMU peripheral base pointers */
-#define PMU_BASE_PTRS                            { PMU }
+#define PMU_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PMU                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group PMU_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PWM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -17199,64 +19804,67 @@ typedef struct {
  */
 
 /** PWM - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x60 */
-    __I  uint16_t CNT;                               /**< Counter Register, array offset: 0x0, array step: 0x60 */
-    __IO uint16_t INIT;                              /**< Initial Count Register, array offset: 0x2, array step: 0x60 */
-    __IO uint16_t CTRL2;                             /**< Control 2 Register, array offset: 0x4, array step: 0x60 */
-    __IO uint16_t CTRL;                              /**< Control Register, array offset: 0x6, array step: 0x60 */
-         uint8_t RESERVED_0[2];
-    __IO uint16_t VAL0;                              /**< Value Register 0, array offset: 0xA, array step: 0x60 */
-    __IO uint16_t FRACVAL1;                          /**< Fractional Value Register 1, array offset: 0xC, array step: 0x60 */
-    __IO uint16_t VAL1;                              /**< Value Register 1, array offset: 0xE, array step: 0x60 */
-    __IO uint16_t FRACVAL2;                          /**< Fractional Value Register 2, array offset: 0x10, array step: 0x60 */
-    __IO uint16_t VAL2;                              /**< Value Register 2, array offset: 0x12, array step: 0x60 */
-    __IO uint16_t FRACVAL3;                          /**< Fractional Value Register 3, array offset: 0x14, array step: 0x60 */
-    __IO uint16_t VAL3;                              /**< Value Register 3, array offset: 0x16, array step: 0x60 */
-    __IO uint16_t FRACVAL4;                          /**< Fractional Value Register 4, array offset: 0x18, array step: 0x60 */
-    __IO uint16_t VAL4;                              /**< Value Register 4, array offset: 0x1A, array step: 0x60 */
-    __IO uint16_t FRACVAL5;                          /**< Fractional Value Register 5, array offset: 0x1C, array step: 0x60 */
-    __IO uint16_t VAL5;                              /**< Value Register 5, array offset: 0x1E, array step: 0x60 */
-    __IO uint16_t FRCTRL;                            /**< Fractional Control Register, array offset: 0x20, array step: 0x60 */
-    __IO uint16_t OCTRL;                             /**< Output Control Register, array offset: 0x22, array step: 0x60 */
-    __IO uint16_t STS;                               /**< Status Register, array offset: 0x24, array step: 0x60 */
-    __IO uint16_t INTEN;                             /**< Interrupt Enable Register, array offset: 0x26, array step: 0x60 */
-    __IO uint16_t DMAEN;                             /**< DMA Enable Register, array offset: 0x28, array step: 0x60 */
-    __IO uint16_t TCTRL;                             /**< Output Trigger Control Register, array offset: 0x2A, array step: 0x60 */
-    __IO uint16_t DISMAP[2];                         /**< Fault Disable Mapping Register 0..Fault Disable Mapping Register 1, array offset: 0x2C, array step: index*0x60, index2*0x2 */
-    __IO uint16_t DTCNT0;                            /**< Deadtime Count Register 0, array offset: 0x30, array step: 0x60 */
-    __IO uint16_t DTCNT1;                            /**< Deadtime Count Register 1, array offset: 0x32, array step: 0x60 */
-    __IO uint16_t CAPTCTRLA;                         /**< Capture Control A Register, array offset: 0x34, array step: 0x60 */
-    __IO uint16_t CAPTCOMPA;                         /**< Capture Compare A Register, array offset: 0x36, array step: 0x60 */
-    __IO uint16_t CAPTCTRLB;                         /**< Capture Control B Register, array offset: 0x38, array step: 0x60 */
-    __IO uint16_t CAPTCOMPB;                         /**< Capture Compare B Register, array offset: 0x3A, array step: 0x60 */
-    __IO uint16_t CAPTCTRLX;                         /**< Capture Control X Register, array offset: 0x3C, array step: 0x60 */
-    __IO uint16_t CAPTCOMPX;                         /**< Capture Compare X Register, array offset: 0x3E, array step: 0x60 */
-    __I  uint16_t CVAL0;                             /**< Capture Value 0 Register, array offset: 0x40, array step: 0x60 */
-    __I  uint16_t CVAL0CYC;                          /**< Capture Value 0 Cycle Register, array offset: 0x42, array step: 0x60 */
-    __I  uint16_t CVAL1;                             /**< Capture Value 1 Register, array offset: 0x44, array step: 0x60 */
-    __I  uint16_t CVAL1CYC;                          /**< Capture Value 1 Cycle Register, array offset: 0x46, array step: 0x60 */
-    __I  uint16_t CVAL2;                             /**< Capture Value 2 Register, array offset: 0x48, array step: 0x60 */
-    __I  uint16_t CVAL2CYC;                          /**< Capture Value 2 Cycle Register, array offset: 0x4A, array step: 0x60 */
-    __I  uint16_t CVAL3;                             /**< Capture Value 3 Register, array offset: 0x4C, array step: 0x60 */
-    __I  uint16_t CVAL3CYC;                          /**< Capture Value 3 Cycle Register, array offset: 0x4E, array step: 0x60 */
-    __I  uint16_t CVAL4;                             /**< Capture Value 4 Register, array offset: 0x50, array step: 0x60 */
-    __I  uint16_t CVAL4CYC;                          /**< Capture Value 4 Cycle Register, array offset: 0x52, array step: 0x60 */
-    __I  uint16_t CVAL5;                             /**< Capture Value 5 Register, array offset: 0x54, array step: 0x60 */
-    __I  uint16_t CVAL5CYC;                          /**< Capture Value 5 Cycle Register, array offset: 0x56, array step: 0x60 */
-         uint8_t RESERVED_1[8];
-  } SM[4];
-  __IO uint16_t OUTEN;                             /**< Output Enable Register, offset: 0x180 */
-  __IO uint16_t MASK;                              /**< Mask Register, offset: 0x182 */
-  __IO uint16_t SWCOUT;                            /**< Software Controlled Output Register, offset: 0x184 */
-  __IO uint16_t DTSRCSEL;                          /**< PWM Source Select Register, offset: 0x186 */
-  __IO uint16_t MCTRL;                             /**< Master Control Register, offset: 0x188 */
-  __IO uint16_t MCTRL2;                            /**< Master Control 2 Register, offset: 0x18A */
-  __IO uint16_t FCTRL;                             /**< Fault Control Register, offset: 0x18C */
-  __IO uint16_t FSTS;                              /**< Fault Status Register, offset: 0x18E */
-  __IO uint16_t FFILT;                             /**< Fault Filter Register, offset: 0x190 */
-  __IO uint16_t FTST;                              /**< Fault Test Register, offset: 0x192 */
-  __IO uint16_t FCTRL2;                            /**< Fault Control 2 Register, offset: 0x194 */
+typedef struct
+{
+    struct
+    {                        /* offset: 0x0, array step: 0x60 */
+        __I uint16_t CNT;    /**< Counter Register, array offset: 0x0, array step: 0x60 */
+        __IO uint16_t INIT;  /**< Initial Count Register, array offset: 0x2, array step: 0x60 */
+        __IO uint16_t CTRL2; /**< Control 2 Register, array offset: 0x4, array step: 0x60 */
+        __IO uint16_t CTRL;  /**< Control Register, array offset: 0x6, array step: 0x60 */
+        uint8_t RESERVED_0[2];
+        __IO uint16_t VAL0;      /**< Value Register 0, array offset: 0xA, array step: 0x60 */
+        __IO uint16_t FRACVAL1;  /**< Fractional Value Register 1, array offset: 0xC, array step: 0x60 */
+        __IO uint16_t VAL1;      /**< Value Register 1, array offset: 0xE, array step: 0x60 */
+        __IO uint16_t FRACVAL2;  /**< Fractional Value Register 2, array offset: 0x10, array step: 0x60 */
+        __IO uint16_t VAL2;      /**< Value Register 2, array offset: 0x12, array step: 0x60 */
+        __IO uint16_t FRACVAL3;  /**< Fractional Value Register 3, array offset: 0x14, array step: 0x60 */
+        __IO uint16_t VAL3;      /**< Value Register 3, array offset: 0x16, array step: 0x60 */
+        __IO uint16_t FRACVAL4;  /**< Fractional Value Register 4, array offset: 0x18, array step: 0x60 */
+        __IO uint16_t VAL4;      /**< Value Register 4, array offset: 0x1A, array step: 0x60 */
+        __IO uint16_t FRACVAL5;  /**< Fractional Value Register 5, array offset: 0x1C, array step: 0x60 */
+        __IO uint16_t VAL5;      /**< Value Register 5, array offset: 0x1E, array step: 0x60 */
+        __IO uint16_t FRCTRL;    /**< Fractional Control Register, array offset: 0x20, array step: 0x60 */
+        __IO uint16_t OCTRL;     /**< Output Control Register, array offset: 0x22, array step: 0x60 */
+        __IO uint16_t STS;       /**< Status Register, array offset: 0x24, array step: 0x60 */
+        __IO uint16_t INTEN;     /**< Interrupt Enable Register, array offset: 0x26, array step: 0x60 */
+        __IO uint16_t DMAEN;     /**< DMA Enable Register, array offset: 0x28, array step: 0x60 */
+        __IO uint16_t TCTRL;     /**< Output Trigger Control Register, array offset: 0x2A, array step: 0x60 */
+        __IO uint16_t DISMAP[2]; /**< Fault Disable Mapping Register 0..Fault Disable Mapping Register 1, array offset:
+                                    0x2C, array step: index*0x60, index2*0x2 */
+        __IO uint16_t DTCNT0;    /**< Deadtime Count Register 0, array offset: 0x30, array step: 0x60 */
+        __IO uint16_t DTCNT1;    /**< Deadtime Count Register 1, array offset: 0x32, array step: 0x60 */
+        __IO uint16_t CAPTCTRLA; /**< Capture Control A Register, array offset: 0x34, array step: 0x60 */
+        __IO uint16_t CAPTCOMPA; /**< Capture Compare A Register, array offset: 0x36, array step: 0x60 */
+        __IO uint16_t CAPTCTRLB; /**< Capture Control B Register, array offset: 0x38, array step: 0x60 */
+        __IO uint16_t CAPTCOMPB; /**< Capture Compare B Register, array offset: 0x3A, array step: 0x60 */
+        __IO uint16_t CAPTCTRLX; /**< Capture Control X Register, array offset: 0x3C, array step: 0x60 */
+        __IO uint16_t CAPTCOMPX; /**< Capture Compare X Register, array offset: 0x3E, array step: 0x60 */
+        __I uint16_t CVAL0;      /**< Capture Value 0 Register, array offset: 0x40, array step: 0x60 */
+        __I uint16_t CVAL0CYC;   /**< Capture Value 0 Cycle Register, array offset: 0x42, array step: 0x60 */
+        __I uint16_t CVAL1;      /**< Capture Value 1 Register, array offset: 0x44, array step: 0x60 */
+        __I uint16_t CVAL1CYC;   /**< Capture Value 1 Cycle Register, array offset: 0x46, array step: 0x60 */
+        __I uint16_t CVAL2;      /**< Capture Value 2 Register, array offset: 0x48, array step: 0x60 */
+        __I uint16_t CVAL2CYC;   /**< Capture Value 2 Cycle Register, array offset: 0x4A, array step: 0x60 */
+        __I uint16_t CVAL3;      /**< Capture Value 3 Register, array offset: 0x4C, array step: 0x60 */
+        __I uint16_t CVAL3CYC;   /**< Capture Value 3 Cycle Register, array offset: 0x4E, array step: 0x60 */
+        __I uint16_t CVAL4;      /**< Capture Value 4 Register, array offset: 0x50, array step: 0x60 */
+        __I uint16_t CVAL4CYC;   /**< Capture Value 4 Cycle Register, array offset: 0x52, array step: 0x60 */
+        __I uint16_t CVAL5;      /**< Capture Value 5 Register, array offset: 0x54, array step: 0x60 */
+        __I uint16_t CVAL5CYC;   /**< Capture Value 5 Cycle Register, array offset: 0x56, array step: 0x60 */
+        uint8_t RESERVED_1[8];
+    } SM[4];
+    __IO uint16_t OUTEN;    /**< Output Enable Register, offset: 0x180 */
+    __IO uint16_t MASK;     /**< Mask Register, offset: 0x182 */
+    __IO uint16_t SWCOUT;   /**< Software Controlled Output Register, offset: 0x184 */
+    __IO uint16_t DTSRCSEL; /**< PWM Source Select Register, offset: 0x186 */
+    __IO uint16_t MCTRL;    /**< Master Control Register, offset: 0x188 */
+    __IO uint16_t MCTRL2;   /**< Master Control 2 Register, offset: 0x18A */
+    __IO uint16_t FCTRL;    /**< Fault Control Register, offset: 0x18C */
+    __IO uint16_t FSTS;     /**< Fault Status Register, offset: 0x18E */
+    __IO uint16_t FFILT;    /**< Fault Filter Register, offset: 0x190 */
+    __IO uint16_t FTST;     /**< Fault Test Register, offset: 0x192 */
+    __IO uint16_t FCTRL2;   /**< Fault Control 2 Register, offset: 0x194 */
 } PWM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -17270,909 +19878,992 @@ typedef struct {
 
 /*! @name CNT - Counter Register */
 /*! @{ */
-#define PWM_CNT_CNT_MASK                         (0xFFFFU)
-#define PWM_CNT_CNT_SHIFT                        (0U)
-#define PWM_CNT_CNT(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_CNT_CNT_SHIFT)) & PWM_CNT_CNT_MASK)
+#define PWM_CNT_CNT_MASK  (0xFFFFU)
+#define PWM_CNT_CNT_SHIFT (0U)
+#define PWM_CNT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CNT_CNT_SHIFT)) & PWM_CNT_CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CNT */
-#define PWM_CNT_COUNT                            (4U)
+#define PWM_CNT_COUNT (4U)
 
 /*! @name INIT - Initial Count Register */
 /*! @{ */
-#define PWM_INIT_INIT_MASK                       (0xFFFFU)
-#define PWM_INIT_INIT_SHIFT                      (0U)
-#define PWM_INIT_INIT(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_INIT_INIT_SHIFT)) & PWM_INIT_INIT_MASK)
+#define PWM_INIT_INIT_MASK  (0xFFFFU)
+#define PWM_INIT_INIT_SHIFT (0U)
+#define PWM_INIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INIT_INIT_SHIFT)) & PWM_INIT_INIT_MASK)
 /*! @} */
 
 /* The count of PWM_INIT */
-#define PWM_INIT_COUNT                           (4U)
+#define PWM_INIT_COUNT (4U)
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define PWM_CTRL2_CLK_SEL_MASK                   (0x3U)
-#define PWM_CTRL2_CLK_SEL_SHIFT                  (0U)
-#define PWM_CTRL2_CLK_SEL(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)
-#define PWM_CTRL2_RELOAD_SEL_MASK                (0x4U)
-#define PWM_CTRL2_RELOAD_SEL_SHIFT               (2U)
-#define PWM_CTRL2_RELOAD_SEL(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)
-#define PWM_CTRL2_FORCE_SEL_MASK                 (0x38U)
-#define PWM_CTRL2_FORCE_SEL_SHIFT                (3U)
-#define PWM_CTRL2_FORCE_SEL(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)
-#define PWM_CTRL2_FORCE_MASK                     (0x40U)
-#define PWM_CTRL2_FORCE_SHIFT                    (6U)
-#define PWM_CTRL2_FORCE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)
-#define PWM_CTRL2_FRCEN_MASK                     (0x80U)
-#define PWM_CTRL2_FRCEN_SHIFT                    (7U)
-#define PWM_CTRL2_FRCEN(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)
-#define PWM_CTRL2_INIT_SEL_MASK                  (0x300U)
-#define PWM_CTRL2_INIT_SEL_SHIFT                 (8U)
-#define PWM_CTRL2_INIT_SEL(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)
-#define PWM_CTRL2_PWMX_INIT_MASK                 (0x400U)
-#define PWM_CTRL2_PWMX_INIT_SHIFT                (10U)
-#define PWM_CTRL2_PWMX_INIT(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)
-#define PWM_CTRL2_PWM45_INIT_MASK                (0x800U)
-#define PWM_CTRL2_PWM45_INIT_SHIFT               (11U)
-#define PWM_CTRL2_PWM45_INIT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)
-#define PWM_CTRL2_PWM23_INIT_MASK                (0x1000U)
-#define PWM_CTRL2_PWM23_INIT_SHIFT               (12U)
-#define PWM_CTRL2_PWM23_INIT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)
-#define PWM_CTRL2_INDEP_MASK                     (0x2000U)
-#define PWM_CTRL2_INDEP_SHIFT                    (13U)
-#define PWM_CTRL2_INDEP(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)
-#define PWM_CTRL2_WAITEN_MASK                    (0x4000U)
-#define PWM_CTRL2_WAITEN_SHIFT                   (14U)
-#define PWM_CTRL2_WAITEN(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)
-#define PWM_CTRL2_DBGEN_MASK                     (0x8000U)
-#define PWM_CTRL2_DBGEN_SHIFT                    (15U)
-#define PWM_CTRL2_DBGEN(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)
+#define PWM_CTRL2_CLK_SEL_MASK     (0x3U)
+#define PWM_CTRL2_CLK_SEL_SHIFT    (0U)
+#define PWM_CTRL2_CLK_SEL(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)
+#define PWM_CTRL2_RELOAD_SEL_MASK  (0x4U)
+#define PWM_CTRL2_RELOAD_SEL_SHIFT (2U)
+#define PWM_CTRL2_RELOAD_SEL(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)
+#define PWM_CTRL2_FORCE_SEL_MASK   (0x38U)
+#define PWM_CTRL2_FORCE_SEL_SHIFT  (3U)
+#define PWM_CTRL2_FORCE_SEL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)
+#define PWM_CTRL2_FORCE_MASK       (0x40U)
+#define PWM_CTRL2_FORCE_SHIFT      (6U)
+#define PWM_CTRL2_FORCE(x)         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)
+#define PWM_CTRL2_FRCEN_MASK       (0x80U)
+#define PWM_CTRL2_FRCEN_SHIFT      (7U)
+#define PWM_CTRL2_FRCEN(x)         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)
+#define PWM_CTRL2_INIT_SEL_MASK    (0x300U)
+#define PWM_CTRL2_INIT_SEL_SHIFT   (8U)
+#define PWM_CTRL2_INIT_SEL(x)      (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)
+#define PWM_CTRL2_PWMX_INIT_MASK   (0x400U)
+#define PWM_CTRL2_PWMX_INIT_SHIFT  (10U)
+#define PWM_CTRL2_PWMX_INIT(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)
+#define PWM_CTRL2_PWM45_INIT_MASK  (0x800U)
+#define PWM_CTRL2_PWM45_INIT_SHIFT (11U)
+#define PWM_CTRL2_PWM45_INIT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)
+#define PWM_CTRL2_PWM23_INIT_MASK  (0x1000U)
+#define PWM_CTRL2_PWM23_INIT_SHIFT (12U)
+#define PWM_CTRL2_PWM23_INIT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)
+#define PWM_CTRL2_INDEP_MASK   (0x2000U)
+#define PWM_CTRL2_INDEP_SHIFT  (13U)
+#define PWM_CTRL2_INDEP(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)
+#define PWM_CTRL2_WAITEN_MASK  (0x4000U)
+#define PWM_CTRL2_WAITEN_SHIFT (14U)
+#define PWM_CTRL2_WAITEN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)
+#define PWM_CTRL2_DBGEN_MASK   (0x8000U)
+#define PWM_CTRL2_DBGEN_SHIFT  (15U)
+#define PWM_CTRL2_DBGEN(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)
 /*! @} */
 
 /* The count of PWM_CTRL2 */
-#define PWM_CTRL2_COUNT                          (4U)
+#define PWM_CTRL2_COUNT (4U)
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define PWM_CTRL_DBLEN_MASK                      (0x1U)
-#define PWM_CTRL_DBLEN_SHIFT                     (0U)
-#define PWM_CTRL_DBLEN(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLEN_SHIFT)) & PWM_CTRL_DBLEN_MASK)
-#define PWM_CTRL_DBLX_MASK                       (0x2U)
-#define PWM_CTRL_DBLX_SHIFT                      (1U)
-#define PWM_CTRL_DBLX(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLX_SHIFT)) & PWM_CTRL_DBLX_MASK)
-#define PWM_CTRL_LDMOD_MASK                      (0x4U)
-#define PWM_CTRL_LDMOD_SHIFT                     (2U)
-#define PWM_CTRL_LDMOD(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDMOD_SHIFT)) & PWM_CTRL_LDMOD_MASK)
-#define PWM_CTRL_SPLIT_MASK                      (0x8U)
-#define PWM_CTRL_SPLIT_SHIFT                     (3U)
-#define PWM_CTRL_SPLIT(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_SPLIT_SHIFT)) & PWM_CTRL_SPLIT_MASK)
-#define PWM_CTRL_PRSC_MASK                       (0x70U)
-#define PWM_CTRL_PRSC_SHIFT                      (4U)
-#define PWM_CTRL_PRSC(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_PRSC_SHIFT)) & PWM_CTRL_PRSC_MASK)
-#define PWM_CTRL_COMPMODE_MASK                   (0x80U)
-#define PWM_CTRL_COMPMODE_SHIFT                  (7U)
-#define PWM_CTRL_COMPMODE(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_COMPMODE_SHIFT)) & PWM_CTRL_COMPMODE_MASK)
-#define PWM_CTRL_DT_MASK                         (0x300U)
-#define PWM_CTRL_DT_SHIFT                        (8U)
-#define PWM_CTRL_DT(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DT_SHIFT)) & PWM_CTRL_DT_MASK)
-#define PWM_CTRL_FULL_MASK                       (0x400U)
-#define PWM_CTRL_FULL_SHIFT                      (10U)
-#define PWM_CTRL_FULL(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_FULL_SHIFT)) & PWM_CTRL_FULL_MASK)
-#define PWM_CTRL_HALF_MASK                       (0x800U)
-#define PWM_CTRL_HALF_SHIFT                      (11U)
-#define PWM_CTRL_HALF(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_HALF_SHIFT)) & PWM_CTRL_HALF_MASK)
-#define PWM_CTRL_LDFQ_MASK                       (0xF000U)
-#define PWM_CTRL_LDFQ_SHIFT                      (12U)
-#define PWM_CTRL_LDFQ(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDFQ_SHIFT)) & PWM_CTRL_LDFQ_MASK)
+#define PWM_CTRL_DBLEN_MASK     (0x1U)
+#define PWM_CTRL_DBLEN_SHIFT    (0U)
+#define PWM_CTRL_DBLEN(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLEN_SHIFT)) & PWM_CTRL_DBLEN_MASK)
+#define PWM_CTRL_DBLX_MASK      (0x2U)
+#define PWM_CTRL_DBLX_SHIFT     (1U)
+#define PWM_CTRL_DBLX(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLX_SHIFT)) & PWM_CTRL_DBLX_MASK)
+#define PWM_CTRL_LDMOD_MASK     (0x4U)
+#define PWM_CTRL_LDMOD_SHIFT    (2U)
+#define PWM_CTRL_LDMOD(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDMOD_SHIFT)) & PWM_CTRL_LDMOD_MASK)
+#define PWM_CTRL_SPLIT_MASK     (0x8U)
+#define PWM_CTRL_SPLIT_SHIFT    (3U)
+#define PWM_CTRL_SPLIT(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_SPLIT_SHIFT)) & PWM_CTRL_SPLIT_MASK)
+#define PWM_CTRL_PRSC_MASK      (0x70U)
+#define PWM_CTRL_PRSC_SHIFT     (4U)
+#define PWM_CTRL_PRSC(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_PRSC_SHIFT)) & PWM_CTRL_PRSC_MASK)
+#define PWM_CTRL_COMPMODE_MASK  (0x80U)
+#define PWM_CTRL_COMPMODE_SHIFT (7U)
+#define PWM_CTRL_COMPMODE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_COMPMODE_SHIFT)) & PWM_CTRL_COMPMODE_MASK)
+#define PWM_CTRL_DT_MASK        (0x300U)
+#define PWM_CTRL_DT_SHIFT       (8U)
+#define PWM_CTRL_DT(x)          (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DT_SHIFT)) & PWM_CTRL_DT_MASK)
+#define PWM_CTRL_FULL_MASK      (0x400U)
+#define PWM_CTRL_FULL_SHIFT     (10U)
+#define PWM_CTRL_FULL(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_FULL_SHIFT)) & PWM_CTRL_FULL_MASK)
+#define PWM_CTRL_HALF_MASK      (0x800U)
+#define PWM_CTRL_HALF_SHIFT     (11U)
+#define PWM_CTRL_HALF(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_HALF_SHIFT)) & PWM_CTRL_HALF_MASK)
+#define PWM_CTRL_LDFQ_MASK      (0xF000U)
+#define PWM_CTRL_LDFQ_SHIFT     (12U)
+#define PWM_CTRL_LDFQ(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDFQ_SHIFT)) & PWM_CTRL_LDFQ_MASK)
 /*! @} */
 
 /* The count of PWM_CTRL */
-#define PWM_CTRL_COUNT                           (4U)
+#define PWM_CTRL_COUNT (4U)
 
 /*! @name VAL0 - Value Register 0 */
 /*! @{ */
-#define PWM_VAL0_VAL0_MASK                       (0xFFFFU)
-#define PWM_VAL0_VAL0_SHIFT                      (0U)
-#define PWM_VAL0_VAL0(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL0_VAL0_SHIFT)) & PWM_VAL0_VAL0_MASK)
+#define PWM_VAL0_VAL0_MASK  (0xFFFFU)
+#define PWM_VAL0_VAL0_SHIFT (0U)
+#define PWM_VAL0_VAL0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL0_VAL0_SHIFT)) & PWM_VAL0_VAL0_MASK)
 /*! @} */
 
 /* The count of PWM_VAL0 */
-#define PWM_VAL0_COUNT                           (4U)
+#define PWM_VAL0_COUNT (4U)
 
 /*! @name FRACVAL1 - Fractional Value Register 1 */
 /*! @{ */
-#define PWM_FRACVAL1_FRACVAL1_MASK               (0xF800U)
-#define PWM_FRACVAL1_FRACVAL1_SHIFT              (11U)
-#define PWM_FRACVAL1_FRACVAL1(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL1_FRACVAL1_SHIFT)) & PWM_FRACVAL1_FRACVAL1_MASK)
+#define PWM_FRACVAL1_FRACVAL1_MASK  (0xF800U)
+#define PWM_FRACVAL1_FRACVAL1_SHIFT (11U)
+#define PWM_FRACVAL1_FRACVAL1(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL1_FRACVAL1_SHIFT)) & PWM_FRACVAL1_FRACVAL1_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL1 */
-#define PWM_FRACVAL1_COUNT                       (4U)
+#define PWM_FRACVAL1_COUNT (4U)
 
 /*! @name VAL1 - Value Register 1 */
 /*! @{ */
-#define PWM_VAL1_VAL1_MASK                       (0xFFFFU)
-#define PWM_VAL1_VAL1_SHIFT                      (0U)
-#define PWM_VAL1_VAL1(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL1_VAL1_SHIFT)) & PWM_VAL1_VAL1_MASK)
+#define PWM_VAL1_VAL1_MASK  (0xFFFFU)
+#define PWM_VAL1_VAL1_SHIFT (0U)
+#define PWM_VAL1_VAL1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL1_VAL1_SHIFT)) & PWM_VAL1_VAL1_MASK)
 /*! @} */
 
 /* The count of PWM_VAL1 */
-#define PWM_VAL1_COUNT                           (4U)
+#define PWM_VAL1_COUNT (4U)
 
 /*! @name FRACVAL2 - Fractional Value Register 2 */
 /*! @{ */
-#define PWM_FRACVAL2_FRACVAL2_MASK               (0xF800U)
-#define PWM_FRACVAL2_FRACVAL2_SHIFT              (11U)
-#define PWM_FRACVAL2_FRACVAL2(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL2_FRACVAL2_SHIFT)) & PWM_FRACVAL2_FRACVAL2_MASK)
+#define PWM_FRACVAL2_FRACVAL2_MASK  (0xF800U)
+#define PWM_FRACVAL2_FRACVAL2_SHIFT (11U)
+#define PWM_FRACVAL2_FRACVAL2(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL2_FRACVAL2_SHIFT)) & PWM_FRACVAL2_FRACVAL2_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL2 */
-#define PWM_FRACVAL2_COUNT                       (4U)
+#define PWM_FRACVAL2_COUNT (4U)
 
 /*! @name VAL2 - Value Register 2 */
 /*! @{ */
-#define PWM_VAL2_VAL2_MASK                       (0xFFFFU)
-#define PWM_VAL2_VAL2_SHIFT                      (0U)
-#define PWM_VAL2_VAL2(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL2_VAL2_SHIFT)) & PWM_VAL2_VAL2_MASK)
+#define PWM_VAL2_VAL2_MASK  (0xFFFFU)
+#define PWM_VAL2_VAL2_SHIFT (0U)
+#define PWM_VAL2_VAL2(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL2_VAL2_SHIFT)) & PWM_VAL2_VAL2_MASK)
 /*! @} */
 
 /* The count of PWM_VAL2 */
-#define PWM_VAL2_COUNT                           (4U)
+#define PWM_VAL2_COUNT (4U)
 
 /*! @name FRACVAL3 - Fractional Value Register 3 */
 /*! @{ */
-#define PWM_FRACVAL3_FRACVAL3_MASK               (0xF800U)
-#define PWM_FRACVAL3_FRACVAL3_SHIFT              (11U)
-#define PWM_FRACVAL3_FRACVAL3(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL3_FRACVAL3_SHIFT)) & PWM_FRACVAL3_FRACVAL3_MASK)
+#define PWM_FRACVAL3_FRACVAL3_MASK  (0xF800U)
+#define PWM_FRACVAL3_FRACVAL3_SHIFT (11U)
+#define PWM_FRACVAL3_FRACVAL3(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL3_FRACVAL3_SHIFT)) & PWM_FRACVAL3_FRACVAL3_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL3 */
-#define PWM_FRACVAL3_COUNT                       (4U)
+#define PWM_FRACVAL3_COUNT (4U)
 
 /*! @name VAL3 - Value Register 3 */
 /*! @{ */
-#define PWM_VAL3_VAL3_MASK                       (0xFFFFU)
-#define PWM_VAL3_VAL3_SHIFT                      (0U)
-#define PWM_VAL3_VAL3(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL3_VAL3_SHIFT)) & PWM_VAL3_VAL3_MASK)
+#define PWM_VAL3_VAL3_MASK  (0xFFFFU)
+#define PWM_VAL3_VAL3_SHIFT (0U)
+#define PWM_VAL3_VAL3(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL3_VAL3_SHIFT)) & PWM_VAL3_VAL3_MASK)
 /*! @} */
 
 /* The count of PWM_VAL3 */
-#define PWM_VAL3_COUNT                           (4U)
+#define PWM_VAL3_COUNT (4U)
 
 /*! @name FRACVAL4 - Fractional Value Register 4 */
 /*! @{ */
-#define PWM_FRACVAL4_FRACVAL4_MASK               (0xF800U)
-#define PWM_FRACVAL4_FRACVAL4_SHIFT              (11U)
-#define PWM_FRACVAL4_FRACVAL4(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL4_FRACVAL4_SHIFT)) & PWM_FRACVAL4_FRACVAL4_MASK)
+#define PWM_FRACVAL4_FRACVAL4_MASK  (0xF800U)
+#define PWM_FRACVAL4_FRACVAL4_SHIFT (11U)
+#define PWM_FRACVAL4_FRACVAL4(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL4_FRACVAL4_SHIFT)) & PWM_FRACVAL4_FRACVAL4_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL4 */
-#define PWM_FRACVAL4_COUNT                       (4U)
+#define PWM_FRACVAL4_COUNT (4U)
 
 /*! @name VAL4 - Value Register 4 */
 /*! @{ */
-#define PWM_VAL4_VAL4_MASK                       (0xFFFFU)
-#define PWM_VAL4_VAL4_SHIFT                      (0U)
-#define PWM_VAL4_VAL4(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL4_VAL4_SHIFT)) & PWM_VAL4_VAL4_MASK)
+#define PWM_VAL4_VAL4_MASK  (0xFFFFU)
+#define PWM_VAL4_VAL4_SHIFT (0U)
+#define PWM_VAL4_VAL4(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL4_VAL4_SHIFT)) & PWM_VAL4_VAL4_MASK)
 /*! @} */
 
 /* The count of PWM_VAL4 */
-#define PWM_VAL4_COUNT                           (4U)
+#define PWM_VAL4_COUNT (4U)
 
 /*! @name FRACVAL5 - Fractional Value Register 5 */
 /*! @{ */
-#define PWM_FRACVAL5_FRACVAL5_MASK               (0xF800U)
-#define PWM_FRACVAL5_FRACVAL5_SHIFT              (11U)
-#define PWM_FRACVAL5_FRACVAL5(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL5_FRACVAL5_SHIFT)) & PWM_FRACVAL5_FRACVAL5_MASK)
+#define PWM_FRACVAL5_FRACVAL5_MASK  (0xF800U)
+#define PWM_FRACVAL5_FRACVAL5_SHIFT (11U)
+#define PWM_FRACVAL5_FRACVAL5(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL5_FRACVAL5_SHIFT)) & PWM_FRACVAL5_FRACVAL5_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL5 */
-#define PWM_FRACVAL5_COUNT                       (4U)
+#define PWM_FRACVAL5_COUNT (4U)
 
 /*! @name VAL5 - Value Register 5 */
 /*! @{ */
-#define PWM_VAL5_VAL5_MASK                       (0xFFFFU)
-#define PWM_VAL5_VAL5_SHIFT                      (0U)
-#define PWM_VAL5_VAL5(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL5_VAL5_SHIFT)) & PWM_VAL5_VAL5_MASK)
+#define PWM_VAL5_VAL5_MASK  (0xFFFFU)
+#define PWM_VAL5_VAL5_SHIFT (0U)
+#define PWM_VAL5_VAL5(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL5_VAL5_SHIFT)) & PWM_VAL5_VAL5_MASK)
 /*! @} */
 
 /* The count of PWM_VAL5 */
-#define PWM_VAL5_COUNT                           (4U)
+#define PWM_VAL5_COUNT (4U)
 
 /*! @name FRCTRL - Fractional Control Register */
 /*! @{ */
-#define PWM_FRCTRL_FRAC1_EN_MASK                 (0x2U)
-#define PWM_FRCTRL_FRAC1_EN_SHIFT                (1U)
-#define PWM_FRCTRL_FRAC1_EN(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC1_EN_SHIFT)) & PWM_FRCTRL_FRAC1_EN_MASK)
-#define PWM_FRCTRL_FRAC23_EN_MASK                (0x4U)
-#define PWM_FRCTRL_FRAC23_EN_SHIFT               (2U)
-#define PWM_FRCTRL_FRAC23_EN(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC23_EN_SHIFT)) & PWM_FRCTRL_FRAC23_EN_MASK)
-#define PWM_FRCTRL_FRAC45_EN_MASK                (0x10U)
-#define PWM_FRCTRL_FRAC45_EN_SHIFT               (4U)
-#define PWM_FRCTRL_FRAC45_EN(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC45_EN_SHIFT)) & PWM_FRCTRL_FRAC45_EN_MASK)
-#define PWM_FRCTRL_FRAC_PU_MASK                  (0x100U)
-#define PWM_FRCTRL_FRAC_PU_SHIFT                 (8U)
-#define PWM_FRCTRL_FRAC_PU(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC_PU_SHIFT)) & PWM_FRCTRL_FRAC_PU_MASK)
-#define PWM_FRCTRL_TEST_MASK                     (0x8000U)
-#define PWM_FRCTRL_TEST_SHIFT                    (15U)
-#define PWM_FRCTRL_TEST(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_TEST_SHIFT)) & PWM_FRCTRL_TEST_MASK)
+#define PWM_FRCTRL_FRAC1_EN_MASK   (0x2U)
+#define PWM_FRCTRL_FRAC1_EN_SHIFT  (1U)
+#define PWM_FRCTRL_FRAC1_EN(x)     (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC1_EN_SHIFT)) & PWM_FRCTRL_FRAC1_EN_MASK)
+#define PWM_FRCTRL_FRAC23_EN_MASK  (0x4U)
+#define PWM_FRCTRL_FRAC23_EN_SHIFT (2U)
+#define PWM_FRCTRL_FRAC23_EN(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC23_EN_SHIFT)) & PWM_FRCTRL_FRAC23_EN_MASK)
+#define PWM_FRCTRL_FRAC45_EN_MASK  (0x10U)
+#define PWM_FRCTRL_FRAC45_EN_SHIFT (4U)
+#define PWM_FRCTRL_FRAC45_EN(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC45_EN_SHIFT)) & PWM_FRCTRL_FRAC45_EN_MASK)
+#define PWM_FRCTRL_FRAC_PU_MASK  (0x100U)
+#define PWM_FRCTRL_FRAC_PU_SHIFT (8U)
+#define PWM_FRCTRL_FRAC_PU(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC_PU_SHIFT)) & PWM_FRCTRL_FRAC_PU_MASK)
+#define PWM_FRCTRL_TEST_MASK     (0x8000U)
+#define PWM_FRCTRL_TEST_SHIFT    (15U)
+#define PWM_FRCTRL_TEST(x)       (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_TEST_SHIFT)) & PWM_FRCTRL_TEST_MASK)
 /*! @} */
 
 /* The count of PWM_FRCTRL */
-#define PWM_FRCTRL_COUNT                         (4U)
+#define PWM_FRCTRL_COUNT (4U)
 
 /*! @name OCTRL - Output Control Register */
 /*! @{ */
-#define PWM_OCTRL_PWMXFS_MASK                    (0x3U)
-#define PWM_OCTRL_PWMXFS_SHIFT                   (0U)
-#define PWM_OCTRL_PWMXFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMXFS_SHIFT)) & PWM_OCTRL_PWMXFS_MASK)
-#define PWM_OCTRL_PWMBFS_MASK                    (0xCU)
-#define PWM_OCTRL_PWMBFS_SHIFT                   (2U)
-#define PWM_OCTRL_PWMBFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMBFS_SHIFT)) & PWM_OCTRL_PWMBFS_MASK)
-#define PWM_OCTRL_PWMAFS_MASK                    (0x30U)
-#define PWM_OCTRL_PWMAFS_SHIFT                   (4U)
-#define PWM_OCTRL_PWMAFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMAFS_SHIFT)) & PWM_OCTRL_PWMAFS_MASK)
-#define PWM_OCTRL_POLX_MASK                      (0x100U)
-#define PWM_OCTRL_POLX_SHIFT                     (8U)
-#define PWM_OCTRL_POLX(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLX_SHIFT)) & PWM_OCTRL_POLX_MASK)
-#define PWM_OCTRL_POLB_MASK                      (0x200U)
-#define PWM_OCTRL_POLB_SHIFT                     (9U)
-#define PWM_OCTRL_POLB(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLB_SHIFT)) & PWM_OCTRL_POLB_MASK)
-#define PWM_OCTRL_POLA_MASK                      (0x400U)
-#define PWM_OCTRL_POLA_SHIFT                     (10U)
-#define PWM_OCTRL_POLA(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLA_SHIFT)) & PWM_OCTRL_POLA_MASK)
-#define PWM_OCTRL_PWMX_IN_MASK                   (0x2000U)
-#define PWM_OCTRL_PWMX_IN_SHIFT                  (13U)
-#define PWM_OCTRL_PWMX_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMX_IN_SHIFT)) & PWM_OCTRL_PWMX_IN_MASK)
-#define PWM_OCTRL_PWMB_IN_MASK                   (0x4000U)
-#define PWM_OCTRL_PWMB_IN_SHIFT                  (14U)
-#define PWM_OCTRL_PWMB_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMB_IN_SHIFT)) & PWM_OCTRL_PWMB_IN_MASK)
-#define PWM_OCTRL_PWMA_IN_MASK                   (0x8000U)
-#define PWM_OCTRL_PWMA_IN_SHIFT                  (15U)
-#define PWM_OCTRL_PWMA_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMA_IN_SHIFT)) & PWM_OCTRL_PWMA_IN_MASK)
+#define PWM_OCTRL_PWMXFS_MASK   (0x3U)
+#define PWM_OCTRL_PWMXFS_SHIFT  (0U)
+#define PWM_OCTRL_PWMXFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMXFS_SHIFT)) & PWM_OCTRL_PWMXFS_MASK)
+#define PWM_OCTRL_PWMBFS_MASK   (0xCU)
+#define PWM_OCTRL_PWMBFS_SHIFT  (2U)
+#define PWM_OCTRL_PWMBFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMBFS_SHIFT)) & PWM_OCTRL_PWMBFS_MASK)
+#define PWM_OCTRL_PWMAFS_MASK   (0x30U)
+#define PWM_OCTRL_PWMAFS_SHIFT  (4U)
+#define PWM_OCTRL_PWMAFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMAFS_SHIFT)) & PWM_OCTRL_PWMAFS_MASK)
+#define PWM_OCTRL_POLX_MASK     (0x100U)
+#define PWM_OCTRL_POLX_SHIFT    (8U)
+#define PWM_OCTRL_POLX(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLX_SHIFT)) & PWM_OCTRL_POLX_MASK)
+#define PWM_OCTRL_POLB_MASK     (0x200U)
+#define PWM_OCTRL_POLB_SHIFT    (9U)
+#define PWM_OCTRL_POLB(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLB_SHIFT)) & PWM_OCTRL_POLB_MASK)
+#define PWM_OCTRL_POLA_MASK     (0x400U)
+#define PWM_OCTRL_POLA_SHIFT    (10U)
+#define PWM_OCTRL_POLA(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLA_SHIFT)) & PWM_OCTRL_POLA_MASK)
+#define PWM_OCTRL_PWMX_IN_MASK  (0x2000U)
+#define PWM_OCTRL_PWMX_IN_SHIFT (13U)
+#define PWM_OCTRL_PWMX_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMX_IN_SHIFT)) & PWM_OCTRL_PWMX_IN_MASK)
+#define PWM_OCTRL_PWMB_IN_MASK  (0x4000U)
+#define PWM_OCTRL_PWMB_IN_SHIFT (14U)
+#define PWM_OCTRL_PWMB_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMB_IN_SHIFT)) & PWM_OCTRL_PWMB_IN_MASK)
+#define PWM_OCTRL_PWMA_IN_MASK  (0x8000U)
+#define PWM_OCTRL_PWMA_IN_SHIFT (15U)
+#define PWM_OCTRL_PWMA_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMA_IN_SHIFT)) & PWM_OCTRL_PWMA_IN_MASK)
 /*! @} */
 
 /* The count of PWM_OCTRL */
-#define PWM_OCTRL_COUNT                          (4U)
+#define PWM_OCTRL_COUNT (4U)
 
 /*! @name STS - Status Register */
 /*! @{ */
-#define PWM_STS_CMPF_MASK                        (0x3FU)
-#define PWM_STS_CMPF_SHIFT                       (0U)
-#define PWM_STS_CMPF(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CMPF_SHIFT)) & PWM_STS_CMPF_MASK)
-#define PWM_STS_CFX0_MASK                        (0x40U)
-#define PWM_STS_CFX0_SHIFT                       (6U)
-#define PWM_STS_CFX0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX0_SHIFT)) & PWM_STS_CFX0_MASK)
-#define PWM_STS_CFX1_MASK                        (0x80U)
-#define PWM_STS_CFX1_SHIFT                       (7U)
-#define PWM_STS_CFX1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX1_SHIFT)) & PWM_STS_CFX1_MASK)
-#define PWM_STS_CFB0_MASK                        (0x100U)
-#define PWM_STS_CFB0_SHIFT                       (8U)
-#define PWM_STS_CFB0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB0_SHIFT)) & PWM_STS_CFB0_MASK)
-#define PWM_STS_CFB1_MASK                        (0x200U)
-#define PWM_STS_CFB1_SHIFT                       (9U)
-#define PWM_STS_CFB1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB1_SHIFT)) & PWM_STS_CFB1_MASK)
-#define PWM_STS_CFA0_MASK                        (0x400U)
-#define PWM_STS_CFA0_SHIFT                       (10U)
-#define PWM_STS_CFA0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA0_SHIFT)) & PWM_STS_CFA0_MASK)
-#define PWM_STS_CFA1_MASK                        (0x800U)
-#define PWM_STS_CFA1_SHIFT                       (11U)
-#define PWM_STS_CFA1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA1_SHIFT)) & PWM_STS_CFA1_MASK)
-#define PWM_STS_RF_MASK                          (0x1000U)
-#define PWM_STS_RF_SHIFT                         (12U)
-#define PWM_STS_RF(x)                            (((uint16_t)(((uint16_t)(x)) << PWM_STS_RF_SHIFT)) & PWM_STS_RF_MASK)
-#define PWM_STS_REF_MASK                         (0x2000U)
-#define PWM_STS_REF_SHIFT                        (13U)
-#define PWM_STS_REF(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_STS_REF_SHIFT)) & PWM_STS_REF_MASK)
-#define PWM_STS_RUF_MASK                         (0x4000U)
-#define PWM_STS_RUF_SHIFT                        (14U)
-#define PWM_STS_RUF(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_STS_RUF_SHIFT)) & PWM_STS_RUF_MASK)
+#define PWM_STS_CMPF_MASK  (0x3FU)
+#define PWM_STS_CMPF_SHIFT (0U)
+#define PWM_STS_CMPF(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CMPF_SHIFT)) & PWM_STS_CMPF_MASK)
+#define PWM_STS_CFX0_MASK  (0x40U)
+#define PWM_STS_CFX0_SHIFT (6U)
+#define PWM_STS_CFX0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX0_SHIFT)) & PWM_STS_CFX0_MASK)
+#define PWM_STS_CFX1_MASK  (0x80U)
+#define PWM_STS_CFX1_SHIFT (7U)
+#define PWM_STS_CFX1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX1_SHIFT)) & PWM_STS_CFX1_MASK)
+#define PWM_STS_CFB0_MASK  (0x100U)
+#define PWM_STS_CFB0_SHIFT (8U)
+#define PWM_STS_CFB0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB0_SHIFT)) & PWM_STS_CFB0_MASK)
+#define PWM_STS_CFB1_MASK  (0x200U)
+#define PWM_STS_CFB1_SHIFT (9U)
+#define PWM_STS_CFB1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB1_SHIFT)) & PWM_STS_CFB1_MASK)
+#define PWM_STS_CFA0_MASK  (0x400U)
+#define PWM_STS_CFA0_SHIFT (10U)
+#define PWM_STS_CFA0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA0_SHIFT)) & PWM_STS_CFA0_MASK)
+#define PWM_STS_CFA1_MASK  (0x800U)
+#define PWM_STS_CFA1_SHIFT (11U)
+#define PWM_STS_CFA1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA1_SHIFT)) & PWM_STS_CFA1_MASK)
+#define PWM_STS_RF_MASK    (0x1000U)
+#define PWM_STS_RF_SHIFT   (12U)
+#define PWM_STS_RF(x)      (((uint16_t)(((uint16_t)(x)) << PWM_STS_RF_SHIFT)) & PWM_STS_RF_MASK)
+#define PWM_STS_REF_MASK   (0x2000U)
+#define PWM_STS_REF_SHIFT  (13U)
+#define PWM_STS_REF(x)     (((uint16_t)(((uint16_t)(x)) << PWM_STS_REF_SHIFT)) & PWM_STS_REF_MASK)
+#define PWM_STS_RUF_MASK   (0x4000U)
+#define PWM_STS_RUF_SHIFT  (14U)
+#define PWM_STS_RUF(x)     (((uint16_t)(((uint16_t)(x)) << PWM_STS_RUF_SHIFT)) & PWM_STS_RUF_MASK)
 /*! @} */
 
 /* The count of PWM_STS */
-#define PWM_STS_COUNT                            (4U)
+#define PWM_STS_COUNT (4U)
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define PWM_INTEN_CMPIE_MASK                     (0x3FU)
-#define PWM_INTEN_CMPIE_SHIFT                    (0U)
-#define PWM_INTEN_CMPIE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CMPIE_SHIFT)) & PWM_INTEN_CMPIE_MASK)
-#define PWM_INTEN_CX0IE_MASK                     (0x40U)
-#define PWM_INTEN_CX0IE_SHIFT                    (6U)
-#define PWM_INTEN_CX0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX0IE_SHIFT)) & PWM_INTEN_CX0IE_MASK)
-#define PWM_INTEN_CX1IE_MASK                     (0x80U)
-#define PWM_INTEN_CX1IE_SHIFT                    (7U)
-#define PWM_INTEN_CX1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX1IE_SHIFT)) & PWM_INTEN_CX1IE_MASK)
-#define PWM_INTEN_CB0IE_MASK                     (0x100U)
-#define PWM_INTEN_CB0IE_SHIFT                    (8U)
-#define PWM_INTEN_CB0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB0IE_SHIFT)) & PWM_INTEN_CB0IE_MASK)
-#define PWM_INTEN_CB1IE_MASK                     (0x200U)
-#define PWM_INTEN_CB1IE_SHIFT                    (9U)
-#define PWM_INTEN_CB1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB1IE_SHIFT)) & PWM_INTEN_CB1IE_MASK)
-#define PWM_INTEN_CA0IE_MASK                     (0x400U)
-#define PWM_INTEN_CA0IE_SHIFT                    (10U)
-#define PWM_INTEN_CA0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA0IE_SHIFT)) & PWM_INTEN_CA0IE_MASK)
-#define PWM_INTEN_CA1IE_MASK                     (0x800U)
-#define PWM_INTEN_CA1IE_SHIFT                    (11U)
-#define PWM_INTEN_CA1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA1IE_SHIFT)) & PWM_INTEN_CA1IE_MASK)
-#define PWM_INTEN_RIE_MASK                       (0x1000U)
-#define PWM_INTEN_RIE_SHIFT                      (12U)
-#define PWM_INTEN_RIE(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_RIE_SHIFT)) & PWM_INTEN_RIE_MASK)
-#define PWM_INTEN_REIE_MASK                      (0x2000U)
-#define PWM_INTEN_REIE_SHIFT                     (13U)
-#define PWM_INTEN_REIE(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_REIE_SHIFT)) & PWM_INTEN_REIE_MASK)
+#define PWM_INTEN_CMPIE_MASK  (0x3FU)
+#define PWM_INTEN_CMPIE_SHIFT (0U)
+#define PWM_INTEN_CMPIE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CMPIE_SHIFT)) & PWM_INTEN_CMPIE_MASK)
+#define PWM_INTEN_CX0IE_MASK  (0x40U)
+#define PWM_INTEN_CX0IE_SHIFT (6U)
+#define PWM_INTEN_CX0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX0IE_SHIFT)) & PWM_INTEN_CX0IE_MASK)
+#define PWM_INTEN_CX1IE_MASK  (0x80U)
+#define PWM_INTEN_CX1IE_SHIFT (7U)
+#define PWM_INTEN_CX1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX1IE_SHIFT)) & PWM_INTEN_CX1IE_MASK)
+#define PWM_INTEN_CB0IE_MASK  (0x100U)
+#define PWM_INTEN_CB0IE_SHIFT (8U)
+#define PWM_INTEN_CB0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB0IE_SHIFT)) & PWM_INTEN_CB0IE_MASK)
+#define PWM_INTEN_CB1IE_MASK  (0x200U)
+#define PWM_INTEN_CB1IE_SHIFT (9U)
+#define PWM_INTEN_CB1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB1IE_SHIFT)) & PWM_INTEN_CB1IE_MASK)
+#define PWM_INTEN_CA0IE_MASK  (0x400U)
+#define PWM_INTEN_CA0IE_SHIFT (10U)
+#define PWM_INTEN_CA0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA0IE_SHIFT)) & PWM_INTEN_CA0IE_MASK)
+#define PWM_INTEN_CA1IE_MASK  (0x800U)
+#define PWM_INTEN_CA1IE_SHIFT (11U)
+#define PWM_INTEN_CA1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA1IE_SHIFT)) & PWM_INTEN_CA1IE_MASK)
+#define PWM_INTEN_RIE_MASK    (0x1000U)
+#define PWM_INTEN_RIE_SHIFT   (12U)
+#define PWM_INTEN_RIE(x)      (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_RIE_SHIFT)) & PWM_INTEN_RIE_MASK)
+#define PWM_INTEN_REIE_MASK   (0x2000U)
+#define PWM_INTEN_REIE_SHIFT  (13U)
+#define PWM_INTEN_REIE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_REIE_SHIFT)) & PWM_INTEN_REIE_MASK)
 /*! @} */
 
 /* The count of PWM_INTEN */
-#define PWM_INTEN_COUNT                          (4U)
+#define PWM_INTEN_COUNT (4U)
 
 /*! @name DMAEN - DMA Enable Register */
 /*! @{ */
-#define PWM_DMAEN_CX0DE_MASK                     (0x1U)
-#define PWM_DMAEN_CX0DE_SHIFT                    (0U)
-#define PWM_DMAEN_CX0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX0DE_SHIFT)) & PWM_DMAEN_CX0DE_MASK)
-#define PWM_DMAEN_CX1DE_MASK                     (0x2U)
-#define PWM_DMAEN_CX1DE_SHIFT                    (1U)
-#define PWM_DMAEN_CX1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX1DE_SHIFT)) & PWM_DMAEN_CX1DE_MASK)
-#define PWM_DMAEN_CB0DE_MASK                     (0x4U)
-#define PWM_DMAEN_CB0DE_SHIFT                    (2U)
-#define PWM_DMAEN_CB0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB0DE_SHIFT)) & PWM_DMAEN_CB0DE_MASK)
-#define PWM_DMAEN_CB1DE_MASK                     (0x8U)
-#define PWM_DMAEN_CB1DE_SHIFT                    (3U)
-#define PWM_DMAEN_CB1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB1DE_SHIFT)) & PWM_DMAEN_CB1DE_MASK)
-#define PWM_DMAEN_CA0DE_MASK                     (0x10U)
-#define PWM_DMAEN_CA0DE_SHIFT                    (4U)
-#define PWM_DMAEN_CA0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA0DE_SHIFT)) & PWM_DMAEN_CA0DE_MASK)
-#define PWM_DMAEN_CA1DE_MASK                     (0x20U)
-#define PWM_DMAEN_CA1DE_SHIFT                    (5U)
-#define PWM_DMAEN_CA1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA1DE_SHIFT)) & PWM_DMAEN_CA1DE_MASK)
-#define PWM_DMAEN_CAPTDE_MASK                    (0xC0U)
-#define PWM_DMAEN_CAPTDE_SHIFT                   (6U)
-#define PWM_DMAEN_CAPTDE(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CAPTDE_SHIFT)) & PWM_DMAEN_CAPTDE_MASK)
-#define PWM_DMAEN_FAND_MASK                      (0x100U)
-#define PWM_DMAEN_FAND_SHIFT                     (8U)
-#define PWM_DMAEN_FAND(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_FAND_SHIFT)) & PWM_DMAEN_FAND_MASK)
-#define PWM_DMAEN_VALDE_MASK                     (0x200U)
-#define PWM_DMAEN_VALDE_SHIFT                    (9U)
-#define PWM_DMAEN_VALDE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_VALDE_SHIFT)) & PWM_DMAEN_VALDE_MASK)
+#define PWM_DMAEN_CX0DE_MASK   (0x1U)
+#define PWM_DMAEN_CX0DE_SHIFT  (0U)
+#define PWM_DMAEN_CX0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX0DE_SHIFT)) & PWM_DMAEN_CX0DE_MASK)
+#define PWM_DMAEN_CX1DE_MASK   (0x2U)
+#define PWM_DMAEN_CX1DE_SHIFT  (1U)
+#define PWM_DMAEN_CX1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX1DE_SHIFT)) & PWM_DMAEN_CX1DE_MASK)
+#define PWM_DMAEN_CB0DE_MASK   (0x4U)
+#define PWM_DMAEN_CB0DE_SHIFT  (2U)
+#define PWM_DMAEN_CB0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB0DE_SHIFT)) & PWM_DMAEN_CB0DE_MASK)
+#define PWM_DMAEN_CB1DE_MASK   (0x8U)
+#define PWM_DMAEN_CB1DE_SHIFT  (3U)
+#define PWM_DMAEN_CB1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB1DE_SHIFT)) & PWM_DMAEN_CB1DE_MASK)
+#define PWM_DMAEN_CA0DE_MASK   (0x10U)
+#define PWM_DMAEN_CA0DE_SHIFT  (4U)
+#define PWM_DMAEN_CA0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA0DE_SHIFT)) & PWM_DMAEN_CA0DE_MASK)
+#define PWM_DMAEN_CA1DE_MASK   (0x20U)
+#define PWM_DMAEN_CA1DE_SHIFT  (5U)
+#define PWM_DMAEN_CA1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA1DE_SHIFT)) & PWM_DMAEN_CA1DE_MASK)
+#define PWM_DMAEN_CAPTDE_MASK  (0xC0U)
+#define PWM_DMAEN_CAPTDE_SHIFT (6U)
+#define PWM_DMAEN_CAPTDE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CAPTDE_SHIFT)) & PWM_DMAEN_CAPTDE_MASK)
+#define PWM_DMAEN_FAND_MASK    (0x100U)
+#define PWM_DMAEN_FAND_SHIFT   (8U)
+#define PWM_DMAEN_FAND(x)      (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_FAND_SHIFT)) & PWM_DMAEN_FAND_MASK)
+#define PWM_DMAEN_VALDE_MASK   (0x200U)
+#define PWM_DMAEN_VALDE_SHIFT  (9U)
+#define PWM_DMAEN_VALDE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_VALDE_SHIFT)) & PWM_DMAEN_VALDE_MASK)
 /*! @} */
 
 /* The count of PWM_DMAEN */
-#define PWM_DMAEN_COUNT                          (4U)
+#define PWM_DMAEN_COUNT (4U)
 
 /*! @name TCTRL - Output Trigger Control Register */
 /*! @{ */
-#define PWM_TCTRL_OUT_TRIG_EN_MASK               (0x3FU)
-#define PWM_TCTRL_OUT_TRIG_EN_SHIFT              (0U)
-#define PWM_TCTRL_OUT_TRIG_EN(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_OUT_TRIG_EN_SHIFT)) & PWM_TCTRL_OUT_TRIG_EN_MASK)
-#define PWM_TCTRL_TRGFRQ_MASK                    (0x1000U)
-#define PWM_TCTRL_TRGFRQ_SHIFT                   (12U)
-#define PWM_TCTRL_TRGFRQ(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_TRGFRQ_SHIFT)) & PWM_TCTRL_TRGFRQ_MASK)
-#define PWM_TCTRL_PWBOT1_MASK                    (0x4000U)
-#define PWM_TCTRL_PWBOT1_SHIFT                   (14U)
-#define PWM_TCTRL_PWBOT1(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWBOT1_SHIFT)) & PWM_TCTRL_PWBOT1_MASK)
-#define PWM_TCTRL_PWAOT0_MASK                    (0x8000U)
-#define PWM_TCTRL_PWAOT0_SHIFT                   (15U)
-#define PWM_TCTRL_PWAOT0(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWAOT0_SHIFT)) & PWM_TCTRL_PWAOT0_MASK)
+#define PWM_TCTRL_OUT_TRIG_EN_MASK  (0x3FU)
+#define PWM_TCTRL_OUT_TRIG_EN_SHIFT (0U)
+#define PWM_TCTRL_OUT_TRIG_EN(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_OUT_TRIG_EN_SHIFT)) & PWM_TCTRL_OUT_TRIG_EN_MASK)
+#define PWM_TCTRL_TRGFRQ_MASK  (0x1000U)
+#define PWM_TCTRL_TRGFRQ_SHIFT (12U)
+#define PWM_TCTRL_TRGFRQ(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_TRGFRQ_SHIFT)) & PWM_TCTRL_TRGFRQ_MASK)
+#define PWM_TCTRL_PWBOT1_MASK  (0x4000U)
+#define PWM_TCTRL_PWBOT1_SHIFT (14U)
+#define PWM_TCTRL_PWBOT1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWBOT1_SHIFT)) & PWM_TCTRL_PWBOT1_MASK)
+#define PWM_TCTRL_PWAOT0_MASK  (0x8000U)
+#define PWM_TCTRL_PWAOT0_SHIFT (15U)
+#define PWM_TCTRL_PWAOT0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWAOT0_SHIFT)) & PWM_TCTRL_PWAOT0_MASK)
 /*! @} */
 
 /* The count of PWM_TCTRL */
-#define PWM_TCTRL_COUNT                          (4U)
+#define PWM_TCTRL_COUNT (4U)
 
 /*! @name DISMAP - Fault Disable Mapping Register 0..Fault Disable Mapping Register 1 */
 /*! @{ */
-#define PWM_DISMAP_DIS0A_MASK                    (0xFU)
-#define PWM_DISMAP_DIS0A_SHIFT                   (0U)
-#define PWM_DISMAP_DIS0A(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0A_SHIFT)) & PWM_DISMAP_DIS0A_MASK)
-#define PWM_DISMAP_DIS1A_MASK                    (0xFU)
-#define PWM_DISMAP_DIS1A_SHIFT                   (0U)
-#define PWM_DISMAP_DIS1A(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1A_SHIFT)) & PWM_DISMAP_DIS1A_MASK)
-#define PWM_DISMAP_DIS0B_MASK                    (0xF0U)
-#define PWM_DISMAP_DIS0B_SHIFT                   (4U)
-#define PWM_DISMAP_DIS0B(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0B_SHIFT)) & PWM_DISMAP_DIS0B_MASK)
-#define PWM_DISMAP_DIS1B_MASK                    (0xF0U)
-#define PWM_DISMAP_DIS1B_SHIFT                   (4U)
-#define PWM_DISMAP_DIS1B(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1B_SHIFT)) & PWM_DISMAP_DIS1B_MASK)
-#define PWM_DISMAP_DIS0X_MASK                    (0xF00U)
-#define PWM_DISMAP_DIS0X_SHIFT                   (8U)
-#define PWM_DISMAP_DIS0X(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0X_SHIFT)) & PWM_DISMAP_DIS0X_MASK)
-#define PWM_DISMAP_DIS1X_MASK                    (0xF00U)
-#define PWM_DISMAP_DIS1X_SHIFT                   (8U)
-#define PWM_DISMAP_DIS1X(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1X_SHIFT)) & PWM_DISMAP_DIS1X_MASK)
+#define PWM_DISMAP_DIS0A_MASK  (0xFU)
+#define PWM_DISMAP_DIS0A_SHIFT (0U)
+#define PWM_DISMAP_DIS0A(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0A_SHIFT)) & PWM_DISMAP_DIS0A_MASK)
+#define PWM_DISMAP_DIS1A_MASK  (0xFU)
+#define PWM_DISMAP_DIS1A_SHIFT (0U)
+#define PWM_DISMAP_DIS1A(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1A_SHIFT)) & PWM_DISMAP_DIS1A_MASK)
+#define PWM_DISMAP_DIS0B_MASK  (0xF0U)
+#define PWM_DISMAP_DIS0B_SHIFT (4U)
+#define PWM_DISMAP_DIS0B(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0B_SHIFT)) & PWM_DISMAP_DIS0B_MASK)
+#define PWM_DISMAP_DIS1B_MASK  (0xF0U)
+#define PWM_DISMAP_DIS1B_SHIFT (4U)
+#define PWM_DISMAP_DIS1B(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1B_SHIFT)) & PWM_DISMAP_DIS1B_MASK)
+#define PWM_DISMAP_DIS0X_MASK  (0xF00U)
+#define PWM_DISMAP_DIS0X_SHIFT (8U)
+#define PWM_DISMAP_DIS0X(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0X_SHIFT)) & PWM_DISMAP_DIS0X_MASK)
+#define PWM_DISMAP_DIS1X_MASK  (0xF00U)
+#define PWM_DISMAP_DIS1X_SHIFT (8U)
+#define PWM_DISMAP_DIS1X(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1X_SHIFT)) & PWM_DISMAP_DIS1X_MASK)
 /*! @} */
 
 /* The count of PWM_DISMAP */
-#define PWM_DISMAP_COUNT                         (4U)
+#define PWM_DISMAP_COUNT (4U)
 
 /* The count of PWM_DISMAP */
-#define PWM_DISMAP_COUNT2                        (2U)
+#define PWM_DISMAP_COUNT2 (2U)
 
 /*! @name DTCNT0 - Deadtime Count Register 0 */
 /*! @{ */
-#define PWM_DTCNT0_DTCNT0_MASK                   (0xFFFFU)
-#define PWM_DTCNT0_DTCNT0_SHIFT                  (0U)
-#define PWM_DTCNT0_DTCNT0(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT0_DTCNT0_SHIFT)) & PWM_DTCNT0_DTCNT0_MASK)
+#define PWM_DTCNT0_DTCNT0_MASK  (0xFFFFU)
+#define PWM_DTCNT0_DTCNT0_SHIFT (0U)
+#define PWM_DTCNT0_DTCNT0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT0_DTCNT0_SHIFT)) & PWM_DTCNT0_DTCNT0_MASK)
 /*! @} */
 
 /* The count of PWM_DTCNT0 */
-#define PWM_DTCNT0_COUNT                         (4U)
+#define PWM_DTCNT0_COUNT (4U)
 
 /*! @name DTCNT1 - Deadtime Count Register 1 */
 /*! @{ */
-#define PWM_DTCNT1_DTCNT1_MASK                   (0xFFFFU)
-#define PWM_DTCNT1_DTCNT1_SHIFT                  (0U)
-#define PWM_DTCNT1_DTCNT1(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT1_DTCNT1_SHIFT)) & PWM_DTCNT1_DTCNT1_MASK)
+#define PWM_DTCNT1_DTCNT1_MASK  (0xFFFFU)
+#define PWM_DTCNT1_DTCNT1_SHIFT (0U)
+#define PWM_DTCNT1_DTCNT1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT1_DTCNT1_SHIFT)) & PWM_DTCNT1_DTCNT1_MASK)
 /*! @} */
 
 /* The count of PWM_DTCNT1 */
-#define PWM_DTCNT1_COUNT                         (4U)
+#define PWM_DTCNT1_COUNT (4U)
 
 /*! @name CAPTCTRLA - Capture Control A Register */
 /*! @{ */
-#define PWM_CAPTCTRLA_ARMA_MASK                  (0x1U)
-#define PWM_CAPTCTRLA_ARMA_SHIFT                 (0U)
-#define PWM_CAPTCTRLA_ARMA(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ARMA_SHIFT)) & PWM_CAPTCTRLA_ARMA_MASK)
-#define PWM_CAPTCTRLA_ONESHOTA_MASK              (0x2U)
-#define PWM_CAPTCTRLA_ONESHOTA_SHIFT             (1U)
-#define PWM_CAPTCTRLA_ONESHOTA(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ONESHOTA_SHIFT)) & PWM_CAPTCTRLA_ONESHOTA_MASK)
-#define PWM_CAPTCTRLA_EDGA0_MASK                 (0xCU)
-#define PWM_CAPTCTRLA_EDGA0_SHIFT                (2U)
-#define PWM_CAPTCTRLA_EDGA0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA0_SHIFT)) & PWM_CAPTCTRLA_EDGA0_MASK)
-#define PWM_CAPTCTRLA_EDGA1_MASK                 (0x30U)
-#define PWM_CAPTCTRLA_EDGA1_SHIFT                (4U)
-#define PWM_CAPTCTRLA_EDGA1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA1_SHIFT)) & PWM_CAPTCTRLA_EDGA1_MASK)
-#define PWM_CAPTCTRLA_INP_SELA_MASK              (0x40U)
-#define PWM_CAPTCTRLA_INP_SELA_SHIFT             (6U)
-#define PWM_CAPTCTRLA_INP_SELA(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_INP_SELA_SHIFT)) & PWM_CAPTCTRLA_INP_SELA_MASK)
-#define PWM_CAPTCTRLA_EDGCNTA_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLA_EDGCNTA_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT)) & PWM_CAPTCTRLA_EDGCNTA_EN_MASK)
-#define PWM_CAPTCTRLA_CFAWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLA_CFAWM_SHIFT                (8U)
-#define PWM_CAPTCTRLA_CFAWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CFAWM_SHIFT)) & PWM_CAPTCTRLA_CFAWM_MASK)
-#define PWM_CAPTCTRLA_CA0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLA_CA0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLA_CA0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA0CNT_SHIFT)) & PWM_CAPTCTRLA_CA0CNT_MASK)
-#define PWM_CAPTCTRLA_CA1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLA_CA1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLA_CA1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA1CNT_SHIFT)) & PWM_CAPTCTRLA_CA1CNT_MASK)
+#define PWM_CAPTCTRLA_ARMA_MASK      (0x1U)
+#define PWM_CAPTCTRLA_ARMA_SHIFT     (0U)
+#define PWM_CAPTCTRLA_ARMA(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ARMA_SHIFT)) & PWM_CAPTCTRLA_ARMA_MASK)
+#define PWM_CAPTCTRLA_ONESHOTA_MASK  (0x2U)
+#define PWM_CAPTCTRLA_ONESHOTA_SHIFT (1U)
+#define PWM_CAPTCTRLA_ONESHOTA(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ONESHOTA_SHIFT)) & PWM_CAPTCTRLA_ONESHOTA_MASK)
+#define PWM_CAPTCTRLA_EDGA0_MASK     (0xCU)
+#define PWM_CAPTCTRLA_EDGA0_SHIFT    (2U)
+#define PWM_CAPTCTRLA_EDGA0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA0_SHIFT)) & PWM_CAPTCTRLA_EDGA0_MASK)
+#define PWM_CAPTCTRLA_EDGA1_MASK     (0x30U)
+#define PWM_CAPTCTRLA_EDGA1_SHIFT    (4U)
+#define PWM_CAPTCTRLA_EDGA1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA1_SHIFT)) & PWM_CAPTCTRLA_EDGA1_MASK)
+#define PWM_CAPTCTRLA_INP_SELA_MASK  (0x40U)
+#define PWM_CAPTCTRLA_INP_SELA_SHIFT (6U)
+#define PWM_CAPTCTRLA_INP_SELA(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_INP_SELA_SHIFT)) & PWM_CAPTCTRLA_INP_SELA_MASK)
+#define PWM_CAPTCTRLA_EDGCNTA_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT (7U)
+#define PWM_CAPTCTRLA_EDGCNTA_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT)) & PWM_CAPTCTRLA_EDGCNTA_EN_MASK)
+#define PWM_CAPTCTRLA_CFAWM_MASK   (0x300U)
+#define PWM_CAPTCTRLA_CFAWM_SHIFT  (8U)
+#define PWM_CAPTCTRLA_CFAWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CFAWM_SHIFT)) & PWM_CAPTCTRLA_CFAWM_MASK)
+#define PWM_CAPTCTRLA_CA0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLA_CA0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLA_CA0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA0CNT_SHIFT)) & PWM_CAPTCTRLA_CA0CNT_MASK)
+#define PWM_CAPTCTRLA_CA1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLA_CA1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLA_CA1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA1CNT_SHIFT)) & PWM_CAPTCTRLA_CA1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLA */
-#define PWM_CAPTCTRLA_COUNT                      (4U)
+#define PWM_CAPTCTRLA_COUNT (4U)
 
 /*! @name CAPTCOMPA - Capture Compare A Register */
 /*! @{ */
-#define PWM_CAPTCOMPA_EDGCMPA_MASK               (0xFFU)
-#define PWM_CAPTCOMPA_EDGCMPA_SHIFT              (0U)
-#define PWM_CAPTCOMPA_EDGCMPA(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCMPA_SHIFT)) & PWM_CAPTCOMPA_EDGCMPA_MASK)
-#define PWM_CAPTCOMPA_EDGCNTA_MASK               (0xFF00U)
-#define PWM_CAPTCOMPA_EDGCNTA_SHIFT              (8U)
-#define PWM_CAPTCOMPA_EDGCNTA(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCNTA_SHIFT)) & PWM_CAPTCOMPA_EDGCNTA_MASK)
+#define PWM_CAPTCOMPA_EDGCMPA_MASK  (0xFFU)
+#define PWM_CAPTCOMPA_EDGCMPA_SHIFT (0U)
+#define PWM_CAPTCOMPA_EDGCMPA(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCMPA_SHIFT)) & PWM_CAPTCOMPA_EDGCMPA_MASK)
+#define PWM_CAPTCOMPA_EDGCNTA_MASK  (0xFF00U)
+#define PWM_CAPTCOMPA_EDGCNTA_SHIFT (8U)
+#define PWM_CAPTCOMPA_EDGCNTA(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCNTA_SHIFT)) & PWM_CAPTCOMPA_EDGCNTA_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPA */
-#define PWM_CAPTCOMPA_COUNT                      (4U)
+#define PWM_CAPTCOMPA_COUNT (4U)
 
 /*! @name CAPTCTRLB - Capture Control B Register */
 /*! @{ */
-#define PWM_CAPTCTRLB_ARMB_MASK                  (0x1U)
-#define PWM_CAPTCTRLB_ARMB_SHIFT                 (0U)
-#define PWM_CAPTCTRLB_ARMB(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ARMB_SHIFT)) & PWM_CAPTCTRLB_ARMB_MASK)
-#define PWM_CAPTCTRLB_ONESHOTB_MASK              (0x2U)
-#define PWM_CAPTCTRLB_ONESHOTB_SHIFT             (1U)
-#define PWM_CAPTCTRLB_ONESHOTB(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ONESHOTB_SHIFT)) & PWM_CAPTCTRLB_ONESHOTB_MASK)
-#define PWM_CAPTCTRLB_EDGB0_MASK                 (0xCU)
-#define PWM_CAPTCTRLB_EDGB0_SHIFT                (2U)
-#define PWM_CAPTCTRLB_EDGB0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB0_SHIFT)) & PWM_CAPTCTRLB_EDGB0_MASK)
-#define PWM_CAPTCTRLB_EDGB1_MASK                 (0x30U)
-#define PWM_CAPTCTRLB_EDGB1_SHIFT                (4U)
-#define PWM_CAPTCTRLB_EDGB1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB1_SHIFT)) & PWM_CAPTCTRLB_EDGB1_MASK)
-#define PWM_CAPTCTRLB_INP_SELB_MASK              (0x40U)
-#define PWM_CAPTCTRLB_INP_SELB_SHIFT             (6U)
-#define PWM_CAPTCTRLB_INP_SELB(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_INP_SELB_SHIFT)) & PWM_CAPTCTRLB_INP_SELB_MASK)
-#define PWM_CAPTCTRLB_EDGCNTB_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLB_EDGCNTB_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT)) & PWM_CAPTCTRLB_EDGCNTB_EN_MASK)
-#define PWM_CAPTCTRLB_CFBWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLB_CFBWM_SHIFT                (8U)
-#define PWM_CAPTCTRLB_CFBWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CFBWM_SHIFT)) & PWM_CAPTCTRLB_CFBWM_MASK)
-#define PWM_CAPTCTRLB_CB0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLB_CB0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLB_CB0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB0CNT_SHIFT)) & PWM_CAPTCTRLB_CB0CNT_MASK)
-#define PWM_CAPTCTRLB_CB1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLB_CB1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLB_CB1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB1CNT_SHIFT)) & PWM_CAPTCTRLB_CB1CNT_MASK)
+#define PWM_CAPTCTRLB_ARMB_MASK      (0x1U)
+#define PWM_CAPTCTRLB_ARMB_SHIFT     (0U)
+#define PWM_CAPTCTRLB_ARMB(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ARMB_SHIFT)) & PWM_CAPTCTRLB_ARMB_MASK)
+#define PWM_CAPTCTRLB_ONESHOTB_MASK  (0x2U)
+#define PWM_CAPTCTRLB_ONESHOTB_SHIFT (1U)
+#define PWM_CAPTCTRLB_ONESHOTB(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ONESHOTB_SHIFT)) & PWM_CAPTCTRLB_ONESHOTB_MASK)
+#define PWM_CAPTCTRLB_EDGB0_MASK     (0xCU)
+#define PWM_CAPTCTRLB_EDGB0_SHIFT    (2U)
+#define PWM_CAPTCTRLB_EDGB0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB0_SHIFT)) & PWM_CAPTCTRLB_EDGB0_MASK)
+#define PWM_CAPTCTRLB_EDGB1_MASK     (0x30U)
+#define PWM_CAPTCTRLB_EDGB1_SHIFT    (4U)
+#define PWM_CAPTCTRLB_EDGB1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB1_SHIFT)) & PWM_CAPTCTRLB_EDGB1_MASK)
+#define PWM_CAPTCTRLB_INP_SELB_MASK  (0x40U)
+#define PWM_CAPTCTRLB_INP_SELB_SHIFT (6U)
+#define PWM_CAPTCTRLB_INP_SELB(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_INP_SELB_SHIFT)) & PWM_CAPTCTRLB_INP_SELB_MASK)
+#define PWM_CAPTCTRLB_EDGCNTB_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT (7U)
+#define PWM_CAPTCTRLB_EDGCNTB_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT)) & PWM_CAPTCTRLB_EDGCNTB_EN_MASK)
+#define PWM_CAPTCTRLB_CFBWM_MASK   (0x300U)
+#define PWM_CAPTCTRLB_CFBWM_SHIFT  (8U)
+#define PWM_CAPTCTRLB_CFBWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CFBWM_SHIFT)) & PWM_CAPTCTRLB_CFBWM_MASK)
+#define PWM_CAPTCTRLB_CB0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLB_CB0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLB_CB0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB0CNT_SHIFT)) & PWM_CAPTCTRLB_CB0CNT_MASK)
+#define PWM_CAPTCTRLB_CB1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLB_CB1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLB_CB1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB1CNT_SHIFT)) & PWM_CAPTCTRLB_CB1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLB */
-#define PWM_CAPTCTRLB_COUNT                      (4U)
+#define PWM_CAPTCTRLB_COUNT (4U)
 
 /*! @name CAPTCOMPB - Capture Compare B Register */
 /*! @{ */
-#define PWM_CAPTCOMPB_EDGCMPB_MASK               (0xFFU)
-#define PWM_CAPTCOMPB_EDGCMPB_SHIFT              (0U)
-#define PWM_CAPTCOMPB_EDGCMPB(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCMPB_SHIFT)) & PWM_CAPTCOMPB_EDGCMPB_MASK)
-#define PWM_CAPTCOMPB_EDGCNTB_MASK               (0xFF00U)
-#define PWM_CAPTCOMPB_EDGCNTB_SHIFT              (8U)
-#define PWM_CAPTCOMPB_EDGCNTB(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCNTB_SHIFT)) & PWM_CAPTCOMPB_EDGCNTB_MASK)
+#define PWM_CAPTCOMPB_EDGCMPB_MASK  (0xFFU)
+#define PWM_CAPTCOMPB_EDGCMPB_SHIFT (0U)
+#define PWM_CAPTCOMPB_EDGCMPB(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCMPB_SHIFT)) & PWM_CAPTCOMPB_EDGCMPB_MASK)
+#define PWM_CAPTCOMPB_EDGCNTB_MASK  (0xFF00U)
+#define PWM_CAPTCOMPB_EDGCNTB_SHIFT (8U)
+#define PWM_CAPTCOMPB_EDGCNTB(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCNTB_SHIFT)) & PWM_CAPTCOMPB_EDGCNTB_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPB */
-#define PWM_CAPTCOMPB_COUNT                      (4U)
+#define PWM_CAPTCOMPB_COUNT (4U)
 
 /*! @name CAPTCTRLX - Capture Control X Register */
 /*! @{ */
-#define PWM_CAPTCTRLX_ARMX_MASK                  (0x1U)
-#define PWM_CAPTCTRLX_ARMX_SHIFT                 (0U)
-#define PWM_CAPTCTRLX_ARMX(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ARMX_SHIFT)) & PWM_CAPTCTRLX_ARMX_MASK)
-#define PWM_CAPTCTRLX_ONESHOTX_MASK              (0x2U)
-#define PWM_CAPTCTRLX_ONESHOTX_SHIFT             (1U)
-#define PWM_CAPTCTRLX_ONESHOTX(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ONESHOTX_SHIFT)) & PWM_CAPTCTRLX_ONESHOTX_MASK)
-#define PWM_CAPTCTRLX_EDGX0_MASK                 (0xCU)
-#define PWM_CAPTCTRLX_EDGX0_SHIFT                (2U)
-#define PWM_CAPTCTRLX_EDGX0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX0_SHIFT)) & PWM_CAPTCTRLX_EDGX0_MASK)
-#define PWM_CAPTCTRLX_EDGX1_MASK                 (0x30U)
-#define PWM_CAPTCTRLX_EDGX1_SHIFT                (4U)
-#define PWM_CAPTCTRLX_EDGX1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX1_SHIFT)) & PWM_CAPTCTRLX_EDGX1_MASK)
-#define PWM_CAPTCTRLX_INP_SELX_MASK              (0x40U)
-#define PWM_CAPTCTRLX_INP_SELX_SHIFT             (6U)
-#define PWM_CAPTCTRLX_INP_SELX(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_INP_SELX_SHIFT)) & PWM_CAPTCTRLX_INP_SELX_MASK)
-#define PWM_CAPTCTRLX_EDGCNTX_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLX_EDGCNTX_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT)) & PWM_CAPTCTRLX_EDGCNTX_EN_MASK)
-#define PWM_CAPTCTRLX_CFXWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLX_CFXWM_SHIFT                (8U)
-#define PWM_CAPTCTRLX_CFXWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CFXWM_SHIFT)) & PWM_CAPTCTRLX_CFXWM_MASK)
-#define PWM_CAPTCTRLX_CX0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLX_CX0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLX_CX0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX0CNT_SHIFT)) & PWM_CAPTCTRLX_CX0CNT_MASK)
-#define PWM_CAPTCTRLX_CX1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLX_CX1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLX_CX1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX1CNT_SHIFT)) & PWM_CAPTCTRLX_CX1CNT_MASK)
+#define PWM_CAPTCTRLX_ARMX_MASK      (0x1U)
+#define PWM_CAPTCTRLX_ARMX_SHIFT     (0U)
+#define PWM_CAPTCTRLX_ARMX(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ARMX_SHIFT)) & PWM_CAPTCTRLX_ARMX_MASK)
+#define PWM_CAPTCTRLX_ONESHOTX_MASK  (0x2U)
+#define PWM_CAPTCTRLX_ONESHOTX_SHIFT (1U)
+#define PWM_CAPTCTRLX_ONESHOTX(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ONESHOTX_SHIFT)) & PWM_CAPTCTRLX_ONESHOTX_MASK)
+#define PWM_CAPTCTRLX_EDGX0_MASK     (0xCU)
+#define PWM_CAPTCTRLX_EDGX0_SHIFT    (2U)
+#define PWM_CAPTCTRLX_EDGX0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX0_SHIFT)) & PWM_CAPTCTRLX_EDGX0_MASK)
+#define PWM_CAPTCTRLX_EDGX1_MASK     (0x30U)
+#define PWM_CAPTCTRLX_EDGX1_SHIFT    (4U)
+#define PWM_CAPTCTRLX_EDGX1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX1_SHIFT)) & PWM_CAPTCTRLX_EDGX1_MASK)
+#define PWM_CAPTCTRLX_INP_SELX_MASK  (0x40U)
+#define PWM_CAPTCTRLX_INP_SELX_SHIFT (6U)
+#define PWM_CAPTCTRLX_INP_SELX(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_INP_SELX_SHIFT)) & PWM_CAPTCTRLX_INP_SELX_MASK)
+#define PWM_CAPTCTRLX_EDGCNTX_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT (7U)
+#define PWM_CAPTCTRLX_EDGCNTX_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT)) & PWM_CAPTCTRLX_EDGCNTX_EN_MASK)
+#define PWM_CAPTCTRLX_CFXWM_MASK   (0x300U)
+#define PWM_CAPTCTRLX_CFXWM_SHIFT  (8U)
+#define PWM_CAPTCTRLX_CFXWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CFXWM_SHIFT)) & PWM_CAPTCTRLX_CFXWM_MASK)
+#define PWM_CAPTCTRLX_CX0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLX_CX0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLX_CX0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX0CNT_SHIFT)) & PWM_CAPTCTRLX_CX0CNT_MASK)
+#define PWM_CAPTCTRLX_CX1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLX_CX1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLX_CX1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX1CNT_SHIFT)) & PWM_CAPTCTRLX_CX1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLX */
-#define PWM_CAPTCTRLX_COUNT                      (4U)
+#define PWM_CAPTCTRLX_COUNT (4U)
 
 /*! @name CAPTCOMPX - Capture Compare X Register */
 /*! @{ */
-#define PWM_CAPTCOMPX_EDGCMPX_MASK               (0xFFU)
-#define PWM_CAPTCOMPX_EDGCMPX_SHIFT              (0U)
-#define PWM_CAPTCOMPX_EDGCMPX(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCMPX_SHIFT)) & PWM_CAPTCOMPX_EDGCMPX_MASK)
-#define PWM_CAPTCOMPX_EDGCNTX_MASK               (0xFF00U)
-#define PWM_CAPTCOMPX_EDGCNTX_SHIFT              (8U)
-#define PWM_CAPTCOMPX_EDGCNTX(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCNTX_SHIFT)) & PWM_CAPTCOMPX_EDGCNTX_MASK)
+#define PWM_CAPTCOMPX_EDGCMPX_MASK  (0xFFU)
+#define PWM_CAPTCOMPX_EDGCMPX_SHIFT (0U)
+#define PWM_CAPTCOMPX_EDGCMPX(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCMPX_SHIFT)) & PWM_CAPTCOMPX_EDGCMPX_MASK)
+#define PWM_CAPTCOMPX_EDGCNTX_MASK  (0xFF00U)
+#define PWM_CAPTCOMPX_EDGCNTX_SHIFT (8U)
+#define PWM_CAPTCOMPX_EDGCNTX(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCNTX_SHIFT)) & PWM_CAPTCOMPX_EDGCNTX_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPX */
-#define PWM_CAPTCOMPX_COUNT                      (4U)
+#define PWM_CAPTCOMPX_COUNT (4U)
 
 /*! @name CVAL0 - Capture Value 0 Register */
 /*! @{ */
-#define PWM_CVAL0_CAPTVAL0_MASK                  (0xFFFFU)
-#define PWM_CVAL0_CAPTVAL0_SHIFT                 (0U)
-#define PWM_CVAL0_CAPTVAL0(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0_CAPTVAL0_SHIFT)) & PWM_CVAL0_CAPTVAL0_MASK)
+#define PWM_CVAL0_CAPTVAL0_MASK  (0xFFFFU)
+#define PWM_CVAL0_CAPTVAL0_SHIFT (0U)
+#define PWM_CVAL0_CAPTVAL0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0_CAPTVAL0_SHIFT)) & PWM_CVAL0_CAPTVAL0_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL0 */
-#define PWM_CVAL0_COUNT                          (4U)
+#define PWM_CVAL0_COUNT (4U)
 
 /*! @name CVAL0CYC - Capture Value 0 Cycle Register */
 /*! @{ */
-#define PWM_CVAL0CYC_CVAL0CYC_MASK               (0xFU)
-#define PWM_CVAL0CYC_CVAL0CYC_SHIFT              (0U)
-#define PWM_CVAL0CYC_CVAL0CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0CYC_CVAL0CYC_SHIFT)) & PWM_CVAL0CYC_CVAL0CYC_MASK)
+#define PWM_CVAL0CYC_CVAL0CYC_MASK  (0xFU)
+#define PWM_CVAL0CYC_CVAL0CYC_SHIFT (0U)
+#define PWM_CVAL0CYC_CVAL0CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0CYC_CVAL0CYC_SHIFT)) & PWM_CVAL0CYC_CVAL0CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL0CYC */
-#define PWM_CVAL0CYC_COUNT                       (4U)
+#define PWM_CVAL0CYC_COUNT (4U)
 
 /*! @name CVAL1 - Capture Value 1 Register */
 /*! @{ */
-#define PWM_CVAL1_CAPTVAL1_MASK                  (0xFFFFU)
-#define PWM_CVAL1_CAPTVAL1_SHIFT                 (0U)
-#define PWM_CVAL1_CAPTVAL1(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1_CAPTVAL1_SHIFT)) & PWM_CVAL1_CAPTVAL1_MASK)
+#define PWM_CVAL1_CAPTVAL1_MASK  (0xFFFFU)
+#define PWM_CVAL1_CAPTVAL1_SHIFT (0U)
+#define PWM_CVAL1_CAPTVAL1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1_CAPTVAL1_SHIFT)) & PWM_CVAL1_CAPTVAL1_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL1 */
-#define PWM_CVAL1_COUNT                          (4U)
+#define PWM_CVAL1_COUNT (4U)
 
 /*! @name CVAL1CYC - Capture Value 1 Cycle Register */
 /*! @{ */
-#define PWM_CVAL1CYC_CVAL1CYC_MASK               (0xFU)
-#define PWM_CVAL1CYC_CVAL1CYC_SHIFT              (0U)
-#define PWM_CVAL1CYC_CVAL1CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1CYC_CVAL1CYC_SHIFT)) & PWM_CVAL1CYC_CVAL1CYC_MASK)
+#define PWM_CVAL1CYC_CVAL1CYC_MASK  (0xFU)
+#define PWM_CVAL1CYC_CVAL1CYC_SHIFT (0U)
+#define PWM_CVAL1CYC_CVAL1CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1CYC_CVAL1CYC_SHIFT)) & PWM_CVAL1CYC_CVAL1CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL1CYC */
-#define PWM_CVAL1CYC_COUNT                       (4U)
+#define PWM_CVAL1CYC_COUNT (4U)
 
 /*! @name CVAL2 - Capture Value 2 Register */
 /*! @{ */
-#define PWM_CVAL2_CAPTVAL2_MASK                  (0xFFFFU)
-#define PWM_CVAL2_CAPTVAL2_SHIFT                 (0U)
-#define PWM_CVAL2_CAPTVAL2(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2_CAPTVAL2_SHIFT)) & PWM_CVAL2_CAPTVAL2_MASK)
+#define PWM_CVAL2_CAPTVAL2_MASK  (0xFFFFU)
+#define PWM_CVAL2_CAPTVAL2_SHIFT (0U)
+#define PWM_CVAL2_CAPTVAL2(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2_CAPTVAL2_SHIFT)) & PWM_CVAL2_CAPTVAL2_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL2 */
-#define PWM_CVAL2_COUNT                          (4U)
+#define PWM_CVAL2_COUNT (4U)
 
 /*! @name CVAL2CYC - Capture Value 2 Cycle Register */
 /*! @{ */
-#define PWM_CVAL2CYC_CVAL2CYC_MASK               (0xFU)
-#define PWM_CVAL2CYC_CVAL2CYC_SHIFT              (0U)
-#define PWM_CVAL2CYC_CVAL2CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2CYC_CVAL2CYC_SHIFT)) & PWM_CVAL2CYC_CVAL2CYC_MASK)
+#define PWM_CVAL2CYC_CVAL2CYC_MASK  (0xFU)
+#define PWM_CVAL2CYC_CVAL2CYC_SHIFT (0U)
+#define PWM_CVAL2CYC_CVAL2CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2CYC_CVAL2CYC_SHIFT)) & PWM_CVAL2CYC_CVAL2CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL2CYC */
-#define PWM_CVAL2CYC_COUNT                       (4U)
+#define PWM_CVAL2CYC_COUNT (4U)
 
 /*! @name CVAL3 - Capture Value 3 Register */
 /*! @{ */
-#define PWM_CVAL3_CAPTVAL3_MASK                  (0xFFFFU)
-#define PWM_CVAL3_CAPTVAL3_SHIFT                 (0U)
-#define PWM_CVAL3_CAPTVAL3(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3_CAPTVAL3_SHIFT)) & PWM_CVAL3_CAPTVAL3_MASK)
+#define PWM_CVAL3_CAPTVAL3_MASK  (0xFFFFU)
+#define PWM_CVAL3_CAPTVAL3_SHIFT (0U)
+#define PWM_CVAL3_CAPTVAL3(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3_CAPTVAL3_SHIFT)) & PWM_CVAL3_CAPTVAL3_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL3 */
-#define PWM_CVAL3_COUNT                          (4U)
+#define PWM_CVAL3_COUNT (4U)
 
 /*! @name CVAL3CYC - Capture Value 3 Cycle Register */
 /*! @{ */
-#define PWM_CVAL3CYC_CVAL3CYC_MASK               (0xFU)
-#define PWM_CVAL3CYC_CVAL3CYC_SHIFT              (0U)
-#define PWM_CVAL3CYC_CVAL3CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3CYC_CVAL3CYC_SHIFT)) & PWM_CVAL3CYC_CVAL3CYC_MASK)
+#define PWM_CVAL3CYC_CVAL3CYC_MASK  (0xFU)
+#define PWM_CVAL3CYC_CVAL3CYC_SHIFT (0U)
+#define PWM_CVAL3CYC_CVAL3CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3CYC_CVAL3CYC_SHIFT)) & PWM_CVAL3CYC_CVAL3CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL3CYC */
-#define PWM_CVAL3CYC_COUNT                       (4U)
+#define PWM_CVAL3CYC_COUNT (4U)
 
 /*! @name CVAL4 - Capture Value 4 Register */
 /*! @{ */
-#define PWM_CVAL4_CAPTVAL4_MASK                  (0xFFFFU)
-#define PWM_CVAL4_CAPTVAL4_SHIFT                 (0U)
-#define PWM_CVAL4_CAPTVAL4(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4_CAPTVAL4_SHIFT)) & PWM_CVAL4_CAPTVAL4_MASK)
+#define PWM_CVAL4_CAPTVAL4_MASK  (0xFFFFU)
+#define PWM_CVAL4_CAPTVAL4_SHIFT (0U)
+#define PWM_CVAL4_CAPTVAL4(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4_CAPTVAL4_SHIFT)) & PWM_CVAL4_CAPTVAL4_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL4 */
-#define PWM_CVAL4_COUNT                          (4U)
+#define PWM_CVAL4_COUNT (4U)
 
 /*! @name CVAL4CYC - Capture Value 4 Cycle Register */
 /*! @{ */
-#define PWM_CVAL4CYC_CVAL4CYC_MASK               (0xFU)
-#define PWM_CVAL4CYC_CVAL4CYC_SHIFT              (0U)
-#define PWM_CVAL4CYC_CVAL4CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4CYC_CVAL4CYC_SHIFT)) & PWM_CVAL4CYC_CVAL4CYC_MASK)
+#define PWM_CVAL4CYC_CVAL4CYC_MASK  (0xFU)
+#define PWM_CVAL4CYC_CVAL4CYC_SHIFT (0U)
+#define PWM_CVAL4CYC_CVAL4CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4CYC_CVAL4CYC_SHIFT)) & PWM_CVAL4CYC_CVAL4CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL4CYC */
-#define PWM_CVAL4CYC_COUNT                       (4U)
+#define PWM_CVAL4CYC_COUNT (4U)
 
 /*! @name CVAL5 - Capture Value 5 Register */
 /*! @{ */
-#define PWM_CVAL5_CAPTVAL5_MASK                  (0xFFFFU)
-#define PWM_CVAL5_CAPTVAL5_SHIFT                 (0U)
-#define PWM_CVAL5_CAPTVAL5(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5_CAPTVAL5_SHIFT)) & PWM_CVAL5_CAPTVAL5_MASK)
+#define PWM_CVAL5_CAPTVAL5_MASK  (0xFFFFU)
+#define PWM_CVAL5_CAPTVAL5_SHIFT (0U)
+#define PWM_CVAL5_CAPTVAL5(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5_CAPTVAL5_SHIFT)) & PWM_CVAL5_CAPTVAL5_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL5 */
-#define PWM_CVAL5_COUNT                          (4U)
+#define PWM_CVAL5_COUNT (4U)
 
 /*! @name CVAL5CYC - Capture Value 5 Cycle Register */
 /*! @{ */
-#define PWM_CVAL5CYC_CVAL5CYC_MASK               (0xFU)
-#define PWM_CVAL5CYC_CVAL5CYC_SHIFT              (0U)
-#define PWM_CVAL5CYC_CVAL5CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5CYC_CVAL5CYC_SHIFT)) & PWM_CVAL5CYC_CVAL5CYC_MASK)
+#define PWM_CVAL5CYC_CVAL5CYC_MASK  (0xFU)
+#define PWM_CVAL5CYC_CVAL5CYC_SHIFT (0U)
+#define PWM_CVAL5CYC_CVAL5CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5CYC_CVAL5CYC_SHIFT)) & PWM_CVAL5CYC_CVAL5CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL5CYC */
-#define PWM_CVAL5CYC_COUNT                       (4U)
+#define PWM_CVAL5CYC_COUNT (4U)
 
 /*! @name OUTEN - Output Enable Register */
 /*! @{ */
-#define PWM_OUTEN_PWMX_EN_MASK                   (0xFU)
-#define PWM_OUTEN_PWMX_EN_SHIFT                  (0U)
-#define PWM_OUTEN_PWMX_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMX_EN_SHIFT)) & PWM_OUTEN_PWMX_EN_MASK)
-#define PWM_OUTEN_PWMB_EN_MASK                   (0xF0U)
-#define PWM_OUTEN_PWMB_EN_SHIFT                  (4U)
-#define PWM_OUTEN_PWMB_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMB_EN_SHIFT)) & PWM_OUTEN_PWMB_EN_MASK)
-#define PWM_OUTEN_PWMA_EN_MASK                   (0xF00U)
-#define PWM_OUTEN_PWMA_EN_SHIFT                  (8U)
-#define PWM_OUTEN_PWMA_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMA_EN_SHIFT)) & PWM_OUTEN_PWMA_EN_MASK)
+#define PWM_OUTEN_PWMX_EN_MASK  (0xFU)
+#define PWM_OUTEN_PWMX_EN_SHIFT (0U)
+#define PWM_OUTEN_PWMX_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMX_EN_SHIFT)) & PWM_OUTEN_PWMX_EN_MASK)
+#define PWM_OUTEN_PWMB_EN_MASK  (0xF0U)
+#define PWM_OUTEN_PWMB_EN_SHIFT (4U)
+#define PWM_OUTEN_PWMB_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMB_EN_SHIFT)) & PWM_OUTEN_PWMB_EN_MASK)
+#define PWM_OUTEN_PWMA_EN_MASK  (0xF00U)
+#define PWM_OUTEN_PWMA_EN_SHIFT (8U)
+#define PWM_OUTEN_PWMA_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMA_EN_SHIFT)) & PWM_OUTEN_PWMA_EN_MASK)
 /*! @} */
 
 /*! @name MASK - Mask Register */
 /*! @{ */
-#define PWM_MASK_MASKX_MASK                      (0xFU)
-#define PWM_MASK_MASKX_SHIFT                     (0U)
-#define PWM_MASK_MASKX(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKX_SHIFT)) & PWM_MASK_MASKX_MASK)
-#define PWM_MASK_MASKB_MASK                      (0xF0U)
-#define PWM_MASK_MASKB_SHIFT                     (4U)
-#define PWM_MASK_MASKB(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKB_SHIFT)) & PWM_MASK_MASKB_MASK)
-#define PWM_MASK_MASKA_MASK                      (0xF00U)
-#define PWM_MASK_MASKA_SHIFT                     (8U)
-#define PWM_MASK_MASKA(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKA_SHIFT)) & PWM_MASK_MASKA_MASK)
-#define PWM_MASK_UPDATE_MASK_MASK                (0xF000U)
-#define PWM_MASK_UPDATE_MASK_SHIFT               (12U)
-#define PWM_MASK_UPDATE_MASK(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_MASK_UPDATE_MASK_SHIFT)) & PWM_MASK_UPDATE_MASK_MASK)
+#define PWM_MASK_MASKX_MASK        (0xFU)
+#define PWM_MASK_MASKX_SHIFT       (0U)
+#define PWM_MASK_MASKX(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKX_SHIFT)) & PWM_MASK_MASKX_MASK)
+#define PWM_MASK_MASKB_MASK        (0xF0U)
+#define PWM_MASK_MASKB_SHIFT       (4U)
+#define PWM_MASK_MASKB(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKB_SHIFT)) & PWM_MASK_MASKB_MASK)
+#define PWM_MASK_MASKA_MASK        (0xF00U)
+#define PWM_MASK_MASKA_SHIFT       (8U)
+#define PWM_MASK_MASKA(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKA_SHIFT)) & PWM_MASK_MASKA_MASK)
+#define PWM_MASK_UPDATE_MASK_MASK  (0xF000U)
+#define PWM_MASK_UPDATE_MASK_SHIFT (12U)
+#define PWM_MASK_UPDATE_MASK(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_MASK_UPDATE_MASK_SHIFT)) & PWM_MASK_UPDATE_MASK_MASK)
 /*! @} */
 
 /*! @name SWCOUT - Software Controlled Output Register */
 /*! @{ */
-#define PWM_SWCOUT_SM0OUT45_MASK                 (0x1U)
-#define PWM_SWCOUT_SM0OUT45_SHIFT                (0U)
-#define PWM_SWCOUT_SM0OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT45_SHIFT)) & PWM_SWCOUT_SM0OUT45_MASK)
-#define PWM_SWCOUT_SM0OUT23_MASK                 (0x2U)
-#define PWM_SWCOUT_SM0OUT23_SHIFT                (1U)
-#define PWM_SWCOUT_SM0OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT23_SHIFT)) & PWM_SWCOUT_SM0OUT23_MASK)
-#define PWM_SWCOUT_SM1OUT45_MASK                 (0x4U)
-#define PWM_SWCOUT_SM1OUT45_SHIFT                (2U)
-#define PWM_SWCOUT_SM1OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT45_SHIFT)) & PWM_SWCOUT_SM1OUT45_MASK)
-#define PWM_SWCOUT_SM1OUT23_MASK                 (0x8U)
-#define PWM_SWCOUT_SM1OUT23_SHIFT                (3U)
-#define PWM_SWCOUT_SM1OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT23_SHIFT)) & PWM_SWCOUT_SM1OUT23_MASK)
-#define PWM_SWCOUT_SM2OUT45_MASK                 (0x10U)
-#define PWM_SWCOUT_SM2OUT45_SHIFT                (4U)
-#define PWM_SWCOUT_SM2OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT45_SHIFT)) & PWM_SWCOUT_SM2OUT45_MASK)
-#define PWM_SWCOUT_SM2OUT23_MASK                 (0x20U)
-#define PWM_SWCOUT_SM2OUT23_SHIFT                (5U)
-#define PWM_SWCOUT_SM2OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT23_SHIFT)) & PWM_SWCOUT_SM2OUT23_MASK)
-#define PWM_SWCOUT_SM3OUT45_MASK                 (0x40U)
-#define PWM_SWCOUT_SM3OUT45_SHIFT                (6U)
-#define PWM_SWCOUT_SM3OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT45_SHIFT)) & PWM_SWCOUT_SM3OUT45_MASK)
-#define PWM_SWCOUT_SM3OUT23_MASK                 (0x80U)
-#define PWM_SWCOUT_SM3OUT23_SHIFT                (7U)
-#define PWM_SWCOUT_SM3OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT23_SHIFT)) & PWM_SWCOUT_SM3OUT23_MASK)
+#define PWM_SWCOUT_SM0OUT45_MASK  (0x1U)
+#define PWM_SWCOUT_SM0OUT45_SHIFT (0U)
+#define PWM_SWCOUT_SM0OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT45_SHIFT)) & PWM_SWCOUT_SM0OUT45_MASK)
+#define PWM_SWCOUT_SM0OUT23_MASK  (0x2U)
+#define PWM_SWCOUT_SM0OUT23_SHIFT (1U)
+#define PWM_SWCOUT_SM0OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT23_SHIFT)) & PWM_SWCOUT_SM0OUT23_MASK)
+#define PWM_SWCOUT_SM1OUT45_MASK  (0x4U)
+#define PWM_SWCOUT_SM1OUT45_SHIFT (2U)
+#define PWM_SWCOUT_SM1OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT45_SHIFT)) & PWM_SWCOUT_SM1OUT45_MASK)
+#define PWM_SWCOUT_SM1OUT23_MASK  (0x8U)
+#define PWM_SWCOUT_SM1OUT23_SHIFT (3U)
+#define PWM_SWCOUT_SM1OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT23_SHIFT)) & PWM_SWCOUT_SM1OUT23_MASK)
+#define PWM_SWCOUT_SM2OUT45_MASK  (0x10U)
+#define PWM_SWCOUT_SM2OUT45_SHIFT (4U)
+#define PWM_SWCOUT_SM2OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT45_SHIFT)) & PWM_SWCOUT_SM2OUT45_MASK)
+#define PWM_SWCOUT_SM2OUT23_MASK  (0x20U)
+#define PWM_SWCOUT_SM2OUT23_SHIFT (5U)
+#define PWM_SWCOUT_SM2OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT23_SHIFT)) & PWM_SWCOUT_SM2OUT23_MASK)
+#define PWM_SWCOUT_SM3OUT45_MASK  (0x40U)
+#define PWM_SWCOUT_SM3OUT45_SHIFT (6U)
+#define PWM_SWCOUT_SM3OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT45_SHIFT)) & PWM_SWCOUT_SM3OUT45_MASK)
+#define PWM_SWCOUT_SM3OUT23_MASK  (0x80U)
+#define PWM_SWCOUT_SM3OUT23_SHIFT (7U)
+#define PWM_SWCOUT_SM3OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT23_SHIFT)) & PWM_SWCOUT_SM3OUT23_MASK)
 /*! @} */
 
 /*! @name DTSRCSEL - PWM Source Select Register */
 /*! @{ */
-#define PWM_DTSRCSEL_SM0SEL45_MASK               (0x3U)
-#define PWM_DTSRCSEL_SM0SEL45_SHIFT              (0U)
-#define PWM_DTSRCSEL_SM0SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL45_SHIFT)) & PWM_DTSRCSEL_SM0SEL45_MASK)
-#define PWM_DTSRCSEL_SM0SEL23_MASK               (0xCU)
-#define PWM_DTSRCSEL_SM0SEL23_SHIFT              (2U)
-#define PWM_DTSRCSEL_SM0SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL23_SHIFT)) & PWM_DTSRCSEL_SM0SEL23_MASK)
-#define PWM_DTSRCSEL_SM1SEL45_MASK               (0x30U)
-#define PWM_DTSRCSEL_SM1SEL45_SHIFT              (4U)
-#define PWM_DTSRCSEL_SM1SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL45_SHIFT)) & PWM_DTSRCSEL_SM1SEL45_MASK)
-#define PWM_DTSRCSEL_SM1SEL23_MASK               (0xC0U)
-#define PWM_DTSRCSEL_SM1SEL23_SHIFT              (6U)
-#define PWM_DTSRCSEL_SM1SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL23_SHIFT)) & PWM_DTSRCSEL_SM1SEL23_MASK)
-#define PWM_DTSRCSEL_SM2SEL45_MASK               (0x300U)
-#define PWM_DTSRCSEL_SM2SEL45_SHIFT              (8U)
-#define PWM_DTSRCSEL_SM2SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL45_SHIFT)) & PWM_DTSRCSEL_SM2SEL45_MASK)
-#define PWM_DTSRCSEL_SM2SEL23_MASK               (0xC00U)
-#define PWM_DTSRCSEL_SM2SEL23_SHIFT              (10U)
-#define PWM_DTSRCSEL_SM2SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL23_SHIFT)) & PWM_DTSRCSEL_SM2SEL23_MASK)
-#define PWM_DTSRCSEL_SM3SEL45_MASK               (0x3000U)
-#define PWM_DTSRCSEL_SM3SEL45_SHIFT              (12U)
-#define PWM_DTSRCSEL_SM3SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL45_SHIFT)) & PWM_DTSRCSEL_SM3SEL45_MASK)
-#define PWM_DTSRCSEL_SM3SEL23_MASK               (0xC000U)
-#define PWM_DTSRCSEL_SM3SEL23_SHIFT              (14U)
-#define PWM_DTSRCSEL_SM3SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL23_SHIFT)) & PWM_DTSRCSEL_SM3SEL23_MASK)
+#define PWM_DTSRCSEL_SM0SEL45_MASK  (0x3U)
+#define PWM_DTSRCSEL_SM0SEL45_SHIFT (0U)
+#define PWM_DTSRCSEL_SM0SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL45_SHIFT)) & PWM_DTSRCSEL_SM0SEL45_MASK)
+#define PWM_DTSRCSEL_SM0SEL23_MASK  (0xCU)
+#define PWM_DTSRCSEL_SM0SEL23_SHIFT (2U)
+#define PWM_DTSRCSEL_SM0SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL23_SHIFT)) & PWM_DTSRCSEL_SM0SEL23_MASK)
+#define PWM_DTSRCSEL_SM1SEL45_MASK  (0x30U)
+#define PWM_DTSRCSEL_SM1SEL45_SHIFT (4U)
+#define PWM_DTSRCSEL_SM1SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL45_SHIFT)) & PWM_DTSRCSEL_SM1SEL45_MASK)
+#define PWM_DTSRCSEL_SM1SEL23_MASK  (0xC0U)
+#define PWM_DTSRCSEL_SM1SEL23_SHIFT (6U)
+#define PWM_DTSRCSEL_SM1SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL23_SHIFT)) & PWM_DTSRCSEL_SM1SEL23_MASK)
+#define PWM_DTSRCSEL_SM2SEL45_MASK  (0x300U)
+#define PWM_DTSRCSEL_SM2SEL45_SHIFT (8U)
+#define PWM_DTSRCSEL_SM2SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL45_SHIFT)) & PWM_DTSRCSEL_SM2SEL45_MASK)
+#define PWM_DTSRCSEL_SM2SEL23_MASK  (0xC00U)
+#define PWM_DTSRCSEL_SM2SEL23_SHIFT (10U)
+#define PWM_DTSRCSEL_SM2SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL23_SHIFT)) & PWM_DTSRCSEL_SM2SEL23_MASK)
+#define PWM_DTSRCSEL_SM3SEL45_MASK  (0x3000U)
+#define PWM_DTSRCSEL_SM3SEL45_SHIFT (12U)
+#define PWM_DTSRCSEL_SM3SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL45_SHIFT)) & PWM_DTSRCSEL_SM3SEL45_MASK)
+#define PWM_DTSRCSEL_SM3SEL23_MASK  (0xC000U)
+#define PWM_DTSRCSEL_SM3SEL23_SHIFT (14U)
+#define PWM_DTSRCSEL_SM3SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL23_SHIFT)) & PWM_DTSRCSEL_SM3SEL23_MASK)
 /*! @} */
 
 /*! @name MCTRL - Master Control Register */
 /*! @{ */
-#define PWM_MCTRL_LDOK_MASK                      (0xFU)
-#define PWM_MCTRL_LDOK_SHIFT                     (0U)
-#define PWM_MCTRL_LDOK(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_LDOK_SHIFT)) & PWM_MCTRL_LDOK_MASK)
-#define PWM_MCTRL_CLDOK_MASK                     (0xF0U)
-#define PWM_MCTRL_CLDOK_SHIFT                    (4U)
-#define PWM_MCTRL_CLDOK(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_CLDOK_SHIFT)) & PWM_MCTRL_CLDOK_MASK)
-#define PWM_MCTRL_RUN_MASK                       (0xF00U)
-#define PWM_MCTRL_RUN_SHIFT                      (8U)
-#define PWM_MCTRL_RUN(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_RUN_SHIFT)) & PWM_MCTRL_RUN_MASK)
-#define PWM_MCTRL_IPOL_MASK                      (0xF000U)
-#define PWM_MCTRL_IPOL_SHIFT                     (12U)
-#define PWM_MCTRL_IPOL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_IPOL_SHIFT)) & PWM_MCTRL_IPOL_MASK)
+#define PWM_MCTRL_LDOK_MASK   (0xFU)
+#define PWM_MCTRL_LDOK_SHIFT  (0U)
+#define PWM_MCTRL_LDOK(x)     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_LDOK_SHIFT)) & PWM_MCTRL_LDOK_MASK)
+#define PWM_MCTRL_CLDOK_MASK  (0xF0U)
+#define PWM_MCTRL_CLDOK_SHIFT (4U)
+#define PWM_MCTRL_CLDOK(x)    (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_CLDOK_SHIFT)) & PWM_MCTRL_CLDOK_MASK)
+#define PWM_MCTRL_RUN_MASK    (0xF00U)
+#define PWM_MCTRL_RUN_SHIFT   (8U)
+#define PWM_MCTRL_RUN(x)      (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_RUN_SHIFT)) & PWM_MCTRL_RUN_MASK)
+#define PWM_MCTRL_IPOL_MASK   (0xF000U)
+#define PWM_MCTRL_IPOL_SHIFT  (12U)
+#define PWM_MCTRL_IPOL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_IPOL_SHIFT)) & PWM_MCTRL_IPOL_MASK)
 /*! @} */
 
 /*! @name MCTRL2 - Master Control 2 Register */
 /*! @{ */
-#define PWM_MCTRL2_MONPLL_MASK                   (0x3U)
-#define PWM_MCTRL2_MONPLL_SHIFT                  (0U)
-#define PWM_MCTRL2_MONPLL(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL2_MONPLL_SHIFT)) & PWM_MCTRL2_MONPLL_MASK)
+#define PWM_MCTRL2_MONPLL_MASK  (0x3U)
+#define PWM_MCTRL2_MONPLL_SHIFT (0U)
+#define PWM_MCTRL2_MONPLL(x)    (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL2_MONPLL_SHIFT)) & PWM_MCTRL2_MONPLL_MASK)
 /*! @} */
 
 /*! @name FCTRL - Fault Control Register */
 /*! @{ */
-#define PWM_FCTRL_FIE_MASK                       (0xFU)
-#define PWM_FCTRL_FIE_SHIFT                      (0U)
-#define PWM_FCTRL_FIE(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FIE_SHIFT)) & PWM_FCTRL_FIE_MASK)
-#define PWM_FCTRL_FSAFE_MASK                     (0xF0U)
-#define PWM_FCTRL_FSAFE_SHIFT                    (4U)
-#define PWM_FCTRL_FSAFE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FSAFE_SHIFT)) & PWM_FCTRL_FSAFE_MASK)
-#define PWM_FCTRL_FAUTO_MASK                     (0xF00U)
-#define PWM_FCTRL_FAUTO_SHIFT                    (8U)
-#define PWM_FCTRL_FAUTO(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FAUTO_SHIFT)) & PWM_FCTRL_FAUTO_MASK)
-#define PWM_FCTRL_FLVL_MASK                      (0xF000U)
-#define PWM_FCTRL_FLVL_SHIFT                     (12U)
-#define PWM_FCTRL_FLVL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FLVL_SHIFT)) & PWM_FCTRL_FLVL_MASK)
+#define PWM_FCTRL_FIE_MASK    (0xFU)
+#define PWM_FCTRL_FIE_SHIFT   (0U)
+#define PWM_FCTRL_FIE(x)      (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FIE_SHIFT)) & PWM_FCTRL_FIE_MASK)
+#define PWM_FCTRL_FSAFE_MASK  (0xF0U)
+#define PWM_FCTRL_FSAFE_SHIFT (4U)
+#define PWM_FCTRL_FSAFE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FSAFE_SHIFT)) & PWM_FCTRL_FSAFE_MASK)
+#define PWM_FCTRL_FAUTO_MASK  (0xF00U)
+#define PWM_FCTRL_FAUTO_SHIFT (8U)
+#define PWM_FCTRL_FAUTO(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FAUTO_SHIFT)) & PWM_FCTRL_FAUTO_MASK)
+#define PWM_FCTRL_FLVL_MASK   (0xF000U)
+#define PWM_FCTRL_FLVL_SHIFT  (12U)
+#define PWM_FCTRL_FLVL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FLVL_SHIFT)) & PWM_FCTRL_FLVL_MASK)
 /*! @} */
 
 /*! @name FSTS - Fault Status Register */
 /*! @{ */
-#define PWM_FSTS_FFLAG_MASK                      (0xFU)
-#define PWM_FSTS_FFLAG_SHIFT                     (0U)
-#define PWM_FSTS_FFLAG(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFLAG_SHIFT)) & PWM_FSTS_FFLAG_MASK)
-#define PWM_FSTS_FFULL_MASK                      (0xF0U)
-#define PWM_FSTS_FFULL_SHIFT                     (4U)
-#define PWM_FSTS_FFULL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFULL_SHIFT)) & PWM_FSTS_FFULL_MASK)
-#define PWM_FSTS_FFPIN_MASK                      (0xF00U)
-#define PWM_FSTS_FFPIN_SHIFT                     (8U)
-#define PWM_FSTS_FFPIN(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFPIN_SHIFT)) & PWM_FSTS_FFPIN_MASK)
-#define PWM_FSTS_FHALF_MASK                      (0xF000U)
-#define PWM_FSTS_FHALF_SHIFT                     (12U)
-#define PWM_FSTS_FHALF(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FHALF_SHIFT)) & PWM_FSTS_FHALF_MASK)
+#define PWM_FSTS_FFLAG_MASK  (0xFU)
+#define PWM_FSTS_FFLAG_SHIFT (0U)
+#define PWM_FSTS_FFLAG(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFLAG_SHIFT)) & PWM_FSTS_FFLAG_MASK)
+#define PWM_FSTS_FFULL_MASK  (0xF0U)
+#define PWM_FSTS_FFULL_SHIFT (4U)
+#define PWM_FSTS_FFULL(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFULL_SHIFT)) & PWM_FSTS_FFULL_MASK)
+#define PWM_FSTS_FFPIN_MASK  (0xF00U)
+#define PWM_FSTS_FFPIN_SHIFT (8U)
+#define PWM_FSTS_FFPIN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFPIN_SHIFT)) & PWM_FSTS_FFPIN_MASK)
+#define PWM_FSTS_FHALF_MASK  (0xF000U)
+#define PWM_FSTS_FHALF_SHIFT (12U)
+#define PWM_FSTS_FHALF(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FHALF_SHIFT)) & PWM_FSTS_FHALF_MASK)
 /*! @} */
 
 /*! @name FFILT - Fault Filter Register */
 /*! @{ */
-#define PWM_FFILT_FILT_PER_MASK                  (0xFFU)
-#define PWM_FFILT_FILT_PER_SHIFT                 (0U)
-#define PWM_FFILT_FILT_PER(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_PER_SHIFT)) & PWM_FFILT_FILT_PER_MASK)
-#define PWM_FFILT_FILT_CNT_MASK                  (0x700U)
-#define PWM_FFILT_FILT_CNT_SHIFT                 (8U)
-#define PWM_FFILT_FILT_CNT(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_CNT_SHIFT)) & PWM_FFILT_FILT_CNT_MASK)
-#define PWM_FFILT_GSTR_MASK                      (0x8000U)
-#define PWM_FFILT_GSTR_SHIFT                     (15U)
-#define PWM_FFILT_GSTR(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_GSTR_SHIFT)) & PWM_FFILT_GSTR_MASK)
+#define PWM_FFILT_FILT_PER_MASK  (0xFFU)
+#define PWM_FFILT_FILT_PER_SHIFT (0U)
+#define PWM_FFILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_PER_SHIFT)) & PWM_FFILT_FILT_PER_MASK)
+#define PWM_FFILT_FILT_CNT_MASK  (0x700U)
+#define PWM_FFILT_FILT_CNT_SHIFT (8U)
+#define PWM_FFILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_CNT_SHIFT)) & PWM_FFILT_FILT_CNT_MASK)
+#define PWM_FFILT_GSTR_MASK      (0x8000U)
+#define PWM_FFILT_GSTR_SHIFT     (15U)
+#define PWM_FFILT_GSTR(x)        (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_GSTR_SHIFT)) & PWM_FFILT_GSTR_MASK)
 /*! @} */
 
 /*! @name FTST - Fault Test Register */
 /*! @{ */
-#define PWM_FTST_FTEST_MASK                      (0x1U)
-#define PWM_FTST_FTEST_SHIFT                     (0U)
-#define PWM_FTST_FTEST(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FTST_FTEST_SHIFT)) & PWM_FTST_FTEST_MASK)
+#define PWM_FTST_FTEST_MASK  (0x1U)
+#define PWM_FTST_FTEST_SHIFT (0U)
+#define PWM_FTST_FTEST(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FTST_FTEST_SHIFT)) & PWM_FTST_FTEST_MASK)
 /*! @} */
 
 /*! @name FCTRL2 - Fault Control 2 Register */
 /*! @{ */
-#define PWM_FCTRL2_NOCOMB_MASK                   (0xFU)
-#define PWM_FCTRL2_NOCOMB_SHIFT                  (0U)
-#define PWM_FCTRL2_NOCOMB(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL2_NOCOMB_SHIFT)) & PWM_FCTRL2_NOCOMB_MASK)
+#define PWM_FCTRL2_NOCOMB_MASK  (0xFU)
+#define PWM_FCTRL2_NOCOMB_SHIFT (0U)
+#define PWM_FCTRL2_NOCOMB(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL2_NOCOMB_SHIFT)) & PWM_FCTRL2_NOCOMB_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PWM_Register_Masks */
 
-
 /* PWM - Peripheral instance base addresses */
 /** Peripheral PWM1 base address */
-#define PWM1_BASE                                (0x403DC000u)
+#define PWM1_BASE (0x403DC000u)
 /** Peripheral PWM1 base pointer */
-#define PWM1                                     ((PWM_Type *)PWM1_BASE)
+#define PWM1 ((PWM_Type *)PWM1_BASE)
 /** Peripheral PWM2 base address */
-#define PWM2_BASE                                (0x403E0000u)
+#define PWM2_BASE (0x403E0000u)
 /** Peripheral PWM2 base pointer */
-#define PWM2                                     ((PWM_Type *)PWM2_BASE)
+#define PWM2 ((PWM_Type *)PWM2_BASE)
 /** Peripheral PWM3 base address */
-#define PWM3_BASE                                (0x403E4000u)
+#define PWM3_BASE (0x403E4000u)
 /** Peripheral PWM3 base pointer */
-#define PWM3                                     ((PWM_Type *)PWM3_BASE)
+#define PWM3 ((PWM_Type *)PWM3_BASE)
 /** Peripheral PWM4 base address */
-#define PWM4_BASE                                (0x403E8000u)
+#define PWM4_BASE (0x403E8000u)
 /** Peripheral PWM4 base pointer */
-#define PWM4                                     ((PWM_Type *)PWM4_BASE)
+#define PWM4 ((PWM_Type *)PWM4_BASE)
 /** Array initializer of PWM peripheral base addresses */
-#define PWM_BASE_ADDRS                           { 0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE }
+#define PWM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE                                                                 \
+    }
 /** Array initializer of PWM peripheral base pointers */
-#define PWM_BASE_PTRS                            { (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4 }
+#define PWM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4                                                                         \
+    }
 /** Interrupt vectors for the PWM peripheral type */
-#define PWM_CMP_IRQS                             { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_RELOAD_IRQS                          { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_CAPTURE_IRQS                         { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_FAULT_IRQS                           { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
-#define PWM_RELOAD_ERROR_IRQS                    { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
+#define PWM_CMP_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_RELOAD_IRQS                                                                                                \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_CAPTURE_IRQS                                                                                               \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_FAULT_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn                              \
+    }
+#define PWM_RELOAD_ERROR_IRQS                                                                                          \
+    {                                                                                                                  \
+        NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn                              \
+    }
 
 /*!
  * @}
  */ /* end of group PWM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ROMC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18183,15 +20874,16 @@ typedef struct {
  */
 
 /** ROMC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[212];
-  __IO uint32_t ROMPATCHD[8];                      /**< ROMC Data Registers, array offset: 0xD4, array step: 0x4 */
-  __IO uint32_t ROMPATCHCNTL;                      /**< ROMC Control Register, offset: 0xF4 */
-       uint32_t ROMPATCHENH;                       /**< ROMC Enable Register High, offset: 0xF8 */
-  __IO uint32_t ROMPATCHENL;                       /**< ROMC Enable Register Low, offset: 0xFC */
-  __IO uint32_t ROMPATCHA[16];                     /**< ROMC Address Registers, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_1[200];
-  __IO uint32_t ROMPATCHSR;                        /**< ROMC Status Register, offset: 0x208 */
+typedef struct
+{
+    uint8_t RESERVED_0[212];
+    __IO uint32_t ROMPATCHD[8];  /**< ROMC Data Registers, array offset: 0xD4, array step: 0x4 */
+    __IO uint32_t ROMPATCHCNTL;  /**< ROMC Control Register, offset: 0xF4 */
+    uint32_t ROMPATCHENH;        /**< ROMC Enable Register High, offset: 0xF8 */
+    __IO uint32_t ROMPATCHENL;   /**< ROMC Enable Register Low, offset: 0xFC */
+    __IO uint32_t ROMPATCHA[16]; /**< ROMC Address Registers, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_1[200];
+    __IO uint32_t ROMPATCHSR; /**< ROMC Status Register, offset: 0x208 */
 } ROMC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18205,75 +20897,85 @@ typedef struct {
 
 /*! @name ROMPATCHD - ROMC Data Registers */
 /*! @{ */
-#define ROMC_ROMPATCHD_DATAX_MASK                (0xFFFFFFFFU)
-#define ROMC_ROMPATCHD_DATAX_SHIFT               (0U)
-#define ROMC_ROMPATCHD_DATAX(x)                  (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHD_DATAX_SHIFT)) & ROMC_ROMPATCHD_DATAX_MASK)
+#define ROMC_ROMPATCHD_DATAX_MASK  (0xFFFFFFFFU)
+#define ROMC_ROMPATCHD_DATAX_SHIFT (0U)
+#define ROMC_ROMPATCHD_DATAX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHD_DATAX_SHIFT)) & ROMC_ROMPATCHD_DATAX_MASK)
 /*! @} */
 
 /* The count of ROMC_ROMPATCHD */
-#define ROMC_ROMPATCHD_COUNT                     (8U)
+#define ROMC_ROMPATCHD_COUNT (8U)
 
 /*! @name ROMPATCHCNTL - ROMC Control Register */
 /*! @{ */
-#define ROMC_ROMPATCHCNTL_DATAFIX_MASK           (0xFFU)
-#define ROMC_ROMPATCHCNTL_DATAFIX_SHIFT          (0U)
-#define ROMC_ROMPATCHCNTL_DATAFIX(x)             (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DATAFIX_SHIFT)) & ROMC_ROMPATCHCNTL_DATAFIX_MASK)
-#define ROMC_ROMPATCHCNTL_DIS_MASK               (0x20000000U)
-#define ROMC_ROMPATCHCNTL_DIS_SHIFT              (29U)
-#define ROMC_ROMPATCHCNTL_DIS(x)                 (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DIS_SHIFT)) & ROMC_ROMPATCHCNTL_DIS_MASK)
+#define ROMC_ROMPATCHCNTL_DATAFIX_MASK  (0xFFU)
+#define ROMC_ROMPATCHCNTL_DATAFIX_SHIFT (0U)
+#define ROMC_ROMPATCHCNTL_DATAFIX(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DATAFIX_SHIFT)) & ROMC_ROMPATCHCNTL_DATAFIX_MASK)
+#define ROMC_ROMPATCHCNTL_DIS_MASK  (0x20000000U)
+#define ROMC_ROMPATCHCNTL_DIS_SHIFT (29U)
+#define ROMC_ROMPATCHCNTL_DIS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DIS_SHIFT)) & ROMC_ROMPATCHCNTL_DIS_MASK)
 /*! @} */
 
 /*! @name ROMPATCHENL - ROMC Enable Register Low */
 /*! @{ */
-#define ROMC_ROMPATCHENL_ENABLE_MASK             (0xFFFFU)
-#define ROMC_ROMPATCHENL_ENABLE_SHIFT            (0U)
-#define ROMC_ROMPATCHENL_ENABLE(x)               (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHENL_ENABLE_SHIFT)) & ROMC_ROMPATCHENL_ENABLE_MASK)
+#define ROMC_ROMPATCHENL_ENABLE_MASK  (0xFFFFU)
+#define ROMC_ROMPATCHENL_ENABLE_SHIFT (0U)
+#define ROMC_ROMPATCHENL_ENABLE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHENL_ENABLE_SHIFT)) & ROMC_ROMPATCHENL_ENABLE_MASK)
 /*! @} */
 
 /*! @name ROMPATCHA - ROMC Address Registers */
 /*! @{ */
-#define ROMC_ROMPATCHA_THUMBX_MASK               (0x1U)
-#define ROMC_ROMPATCHA_THUMBX_SHIFT              (0U)
-#define ROMC_ROMPATCHA_THUMBX(x)                 (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_THUMBX_SHIFT)) & ROMC_ROMPATCHA_THUMBX_MASK)
-#define ROMC_ROMPATCHA_ADDRX_MASK                (0x7FFFFEU)
-#define ROMC_ROMPATCHA_ADDRX_SHIFT               (1U)
-#define ROMC_ROMPATCHA_ADDRX(x)                  (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_ADDRX_SHIFT)) & ROMC_ROMPATCHA_ADDRX_MASK)
+#define ROMC_ROMPATCHA_THUMBX_MASK  (0x1U)
+#define ROMC_ROMPATCHA_THUMBX_SHIFT (0U)
+#define ROMC_ROMPATCHA_THUMBX(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_THUMBX_SHIFT)) & ROMC_ROMPATCHA_THUMBX_MASK)
+#define ROMC_ROMPATCHA_ADDRX_MASK  (0x7FFFFEU)
+#define ROMC_ROMPATCHA_ADDRX_SHIFT (1U)
+#define ROMC_ROMPATCHA_ADDRX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_ADDRX_SHIFT)) & ROMC_ROMPATCHA_ADDRX_MASK)
 /*! @} */
 
 /* The count of ROMC_ROMPATCHA */
-#define ROMC_ROMPATCHA_COUNT                     (16U)
+#define ROMC_ROMPATCHA_COUNT (16U)
 
 /*! @name ROMPATCHSR - ROMC Status Register */
 /*! @{ */
-#define ROMC_ROMPATCHSR_SOURCE_MASK              (0x3FU)
-#define ROMC_ROMPATCHSR_SOURCE_SHIFT             (0U)
-#define ROMC_ROMPATCHSR_SOURCE(x)                (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SOURCE_SHIFT)) & ROMC_ROMPATCHSR_SOURCE_MASK)
-#define ROMC_ROMPATCHSR_SW_MASK                  (0x20000U)
-#define ROMC_ROMPATCHSR_SW_SHIFT                 (17U)
-#define ROMC_ROMPATCHSR_SW(x)                    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SW_SHIFT)) & ROMC_ROMPATCHSR_SW_MASK)
+#define ROMC_ROMPATCHSR_SOURCE_MASK  (0x3FU)
+#define ROMC_ROMPATCHSR_SOURCE_SHIFT (0U)
+#define ROMC_ROMPATCHSR_SOURCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SOURCE_SHIFT)) & ROMC_ROMPATCHSR_SOURCE_MASK)
+#define ROMC_ROMPATCHSR_SW_MASK  (0x20000U)
+#define ROMC_ROMPATCHSR_SW_SHIFT (17U)
+#define ROMC_ROMPATCHSR_SW(x)    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SW_SHIFT)) & ROMC_ROMPATCHSR_SW_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ROMC_Register_Masks */
 
-
 /* ROMC - Peripheral instance base addresses */
 /** Peripheral ROMC base address */
-#define ROMC_BASE                                (0x40180000u)
+#define ROMC_BASE (0x40180000u)
 /** Peripheral ROMC base pointer */
-#define ROMC                                     ((ROMC_Type *)ROMC_BASE)
+#define ROMC ((ROMC_Type *)ROMC_BASE)
 /** Array initializer of ROMC peripheral base addresses */
-#define ROMC_BASE_ADDRS                          { ROMC_BASE }
+#define ROMC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        ROMC_BASE                                                                                                      \
+    }
 /** Array initializer of ROMC peripheral base pointers */
-#define ROMC_BASE_PTRS                           { ROMC }
+#define ROMC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        ROMC                                                                                                           \
+    }
 
 /*!
  * @}
  */ /* end of group ROMC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- RTWDOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18284,11 +20986,12 @@ typedef struct {
  */
 
 /** RTWDOG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CS;                                /**< Watchdog Control and Status Register, offset: 0x0 */
-  __IO uint32_t CNT;                               /**< Watchdog Counter Register, offset: 0x4 */
-  __IO uint32_t TOVAL;                             /**< Watchdog Timeout Value Register, offset: 0x8 */
-  __IO uint32_t WIN;                               /**< Watchdog Window Register, offset: 0xC */
+typedef struct
+{
+    __IO uint32_t CS;    /**< Watchdog Control and Status Register, offset: 0x0 */
+    __IO uint32_t CNT;   /**< Watchdog Counter Register, offset: 0x4 */
+    __IO uint32_t TOVAL; /**< Watchdog Timeout Value Register, offset: 0x8 */
+    __IO uint32_t WIN;   /**< Watchdog Window Register, offset: 0xC */
 } RTWDOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18302,107 +21005,114 @@ typedef struct {
 
 /*! @name CS - Watchdog Control and Status Register */
 /*! @{ */
-#define RTWDOG_CS_STOP_MASK                      (0x1U)
-#define RTWDOG_CS_STOP_SHIFT                     (0U)
-#define RTWDOG_CS_STOP(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)
-#define RTWDOG_CS_WAIT_MASK                      (0x2U)
-#define RTWDOG_CS_WAIT_SHIFT                     (1U)
-#define RTWDOG_CS_WAIT(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)
-#define RTWDOG_CS_DBG_MASK                       (0x4U)
-#define RTWDOG_CS_DBG_SHIFT                      (2U)
-#define RTWDOG_CS_DBG(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)
-#define RTWDOG_CS_TST_MASK                       (0x18U)
-#define RTWDOG_CS_TST_SHIFT                      (3U)
-#define RTWDOG_CS_TST(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)
-#define RTWDOG_CS_UPDATE_MASK                    (0x20U)
-#define RTWDOG_CS_UPDATE_SHIFT                   (5U)
-#define RTWDOG_CS_UPDATE(x)                      (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)
-#define RTWDOG_CS_INT_MASK                       (0x40U)
-#define RTWDOG_CS_INT_SHIFT                      (6U)
-#define RTWDOG_CS_INT(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)
-#define RTWDOG_CS_EN_MASK                        (0x80U)
-#define RTWDOG_CS_EN_SHIFT                       (7U)
-#define RTWDOG_CS_EN(x)                          (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)
-#define RTWDOG_CS_CLK_MASK                       (0x300U)
-#define RTWDOG_CS_CLK_SHIFT                      (8U)
-#define RTWDOG_CS_CLK(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)
-#define RTWDOG_CS_RCS_MASK                       (0x400U)
-#define RTWDOG_CS_RCS_SHIFT                      (10U)
-#define RTWDOG_CS_RCS(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)
-#define RTWDOG_CS_ULK_MASK                       (0x800U)
-#define RTWDOG_CS_ULK_SHIFT                      (11U)
-#define RTWDOG_CS_ULK(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)
-#define RTWDOG_CS_PRES_MASK                      (0x1000U)
-#define RTWDOG_CS_PRES_SHIFT                     (12U)
-#define RTWDOG_CS_PRES(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)
-#define RTWDOG_CS_CMD32EN_MASK                   (0x2000U)
-#define RTWDOG_CS_CMD32EN_SHIFT                  (13U)
-#define RTWDOG_CS_CMD32EN(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)
-#define RTWDOG_CS_FLG_MASK                       (0x4000U)
-#define RTWDOG_CS_FLG_SHIFT                      (14U)
-#define RTWDOG_CS_FLG(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)
-#define RTWDOG_CS_WIN_MASK                       (0x8000U)
-#define RTWDOG_CS_WIN_SHIFT                      (15U)
-#define RTWDOG_CS_WIN(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)
+#define RTWDOG_CS_STOP_MASK     (0x1U)
+#define RTWDOG_CS_STOP_SHIFT    (0U)
+#define RTWDOG_CS_STOP(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)
+#define RTWDOG_CS_WAIT_MASK     (0x2U)
+#define RTWDOG_CS_WAIT_SHIFT    (1U)
+#define RTWDOG_CS_WAIT(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)
+#define RTWDOG_CS_DBG_MASK      (0x4U)
+#define RTWDOG_CS_DBG_SHIFT     (2U)
+#define RTWDOG_CS_DBG(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)
+#define RTWDOG_CS_TST_MASK      (0x18U)
+#define RTWDOG_CS_TST_SHIFT     (3U)
+#define RTWDOG_CS_TST(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)
+#define RTWDOG_CS_UPDATE_MASK   (0x20U)
+#define RTWDOG_CS_UPDATE_SHIFT  (5U)
+#define RTWDOG_CS_UPDATE(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)
+#define RTWDOG_CS_INT_MASK      (0x40U)
+#define RTWDOG_CS_INT_SHIFT     (6U)
+#define RTWDOG_CS_INT(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)
+#define RTWDOG_CS_EN_MASK       (0x80U)
+#define RTWDOG_CS_EN_SHIFT      (7U)
+#define RTWDOG_CS_EN(x)         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)
+#define RTWDOG_CS_CLK_MASK      (0x300U)
+#define RTWDOG_CS_CLK_SHIFT     (8U)
+#define RTWDOG_CS_CLK(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)
+#define RTWDOG_CS_RCS_MASK      (0x400U)
+#define RTWDOG_CS_RCS_SHIFT     (10U)
+#define RTWDOG_CS_RCS(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)
+#define RTWDOG_CS_ULK_MASK      (0x800U)
+#define RTWDOG_CS_ULK_SHIFT     (11U)
+#define RTWDOG_CS_ULK(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)
+#define RTWDOG_CS_PRES_MASK     (0x1000U)
+#define RTWDOG_CS_PRES_SHIFT    (12U)
+#define RTWDOG_CS_PRES(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)
+#define RTWDOG_CS_CMD32EN_MASK  (0x2000U)
+#define RTWDOG_CS_CMD32EN_SHIFT (13U)
+#define RTWDOG_CS_CMD32EN(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)
+#define RTWDOG_CS_FLG_MASK      (0x4000U)
+#define RTWDOG_CS_FLG_SHIFT     (14U)
+#define RTWDOG_CS_FLG(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)
+#define RTWDOG_CS_WIN_MASK      (0x8000U)
+#define RTWDOG_CS_WIN_SHIFT     (15U)
+#define RTWDOG_CS_WIN(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)
 /*! @} */
 
 /*! @name CNT - Watchdog Counter Register */
 /*! @{ */
-#define RTWDOG_CNT_CNTLOW_MASK                   (0xFFU)
-#define RTWDOG_CNT_CNTLOW_SHIFT                  (0U)
-#define RTWDOG_CNT_CNTLOW(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)
-#define RTWDOG_CNT_CNTHIGH_MASK                  (0xFF00U)
-#define RTWDOG_CNT_CNTHIGH_SHIFT                 (8U)
-#define RTWDOG_CNT_CNTHIGH(x)                    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)
+#define RTWDOG_CNT_CNTLOW_MASK   (0xFFU)
+#define RTWDOG_CNT_CNTLOW_SHIFT  (0U)
+#define RTWDOG_CNT_CNTLOW(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)
+#define RTWDOG_CNT_CNTHIGH_MASK  (0xFF00U)
+#define RTWDOG_CNT_CNTHIGH_SHIFT (8U)
+#define RTWDOG_CNT_CNTHIGH(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)
 /*! @} */
 
 /*! @name TOVAL - Watchdog Timeout Value Register */
 /*! @{ */
-#define RTWDOG_TOVAL_TOVALLOW_MASK               (0xFFU)
-#define RTWDOG_TOVAL_TOVALLOW_SHIFT              (0U)
-#define RTWDOG_TOVAL_TOVALLOW(x)                 (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)
-#define RTWDOG_TOVAL_TOVALHIGH_MASK              (0xFF00U)
-#define RTWDOG_TOVAL_TOVALHIGH_SHIFT             (8U)
-#define RTWDOG_TOVAL_TOVALHIGH(x)                (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)
+#define RTWDOG_TOVAL_TOVALLOW_MASK  (0xFFU)
+#define RTWDOG_TOVAL_TOVALLOW_SHIFT (0U)
+#define RTWDOG_TOVAL_TOVALLOW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)
+#define RTWDOG_TOVAL_TOVALHIGH_MASK  (0xFF00U)
+#define RTWDOG_TOVAL_TOVALHIGH_SHIFT (8U)
+#define RTWDOG_TOVAL_TOVALHIGH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)
 /*! @} */
 
 /*! @name WIN - Watchdog Window Register */
 /*! @{ */
-#define RTWDOG_WIN_WINLOW_MASK                   (0xFFU)
-#define RTWDOG_WIN_WINLOW_SHIFT                  (0U)
-#define RTWDOG_WIN_WINLOW(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)
-#define RTWDOG_WIN_WINHIGH_MASK                  (0xFF00U)
-#define RTWDOG_WIN_WINHIGH_SHIFT                 (8U)
-#define RTWDOG_WIN_WINHIGH(x)                    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)
+#define RTWDOG_WIN_WINLOW_MASK   (0xFFU)
+#define RTWDOG_WIN_WINLOW_SHIFT  (0U)
+#define RTWDOG_WIN_WINLOW(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)
+#define RTWDOG_WIN_WINHIGH_MASK  (0xFF00U)
+#define RTWDOG_WIN_WINHIGH_SHIFT (8U)
+#define RTWDOG_WIN_WINHIGH(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group RTWDOG_Register_Masks */
 
-
 /* RTWDOG - Peripheral instance base addresses */
 /** Peripheral RTWDOG base address */
-#define RTWDOG_BASE                              (0x400BC000u)
+#define RTWDOG_BASE (0x400BC000u)
 /** Peripheral RTWDOG base pointer */
-#define RTWDOG                                   ((RTWDOG_Type *)RTWDOG_BASE)
+#define RTWDOG ((RTWDOG_Type *)RTWDOG_BASE)
 /** Array initializer of RTWDOG peripheral base addresses */
-#define RTWDOG_BASE_ADDRS                        { RTWDOG_BASE }
+#define RTWDOG_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        RTWDOG_BASE                                                                                                    \
+    }
 /** Array initializer of RTWDOG peripheral base pointers */
-#define RTWDOG_BASE_PTRS                         { RTWDOG }
+#define RTWDOG_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        RTWDOG                                                                                                         \
+    }
 /** Interrupt vectors for the RTWDOG peripheral type */
-#define RTWDOG_IRQS                              { RTWDOG_IRQn }
+#define RTWDOG_IRQS                                                                                                    \
+    {                                                                                                                  \
+        RTWDOG_IRQn                                                                                                    \
+    }
 /* Extra definition */
-#define RTWDOG_UPDATE_KEY                        (0xD928C520U)
-#define RTWDOG_REFRESH_KEY                       (0xB480A602U)
-
+#define RTWDOG_UPDATE_KEY  (0xD928C520U)
+#define RTWDOG_REFRESH_KEY (0xB480A602U)
 
 /*!
  * @}
  */ /* end of group RTWDOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SEMC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18413,58 +21123,60 @@ typedef struct {
  */
 
 /** SEMC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< Module Control Register, offset: 0x0 */
-  __IO uint32_t IOCR;                              /**< IO Mux Control Register, offset: 0x4 */
-  __IO uint32_t BMCR0;                             /**< Master Bus (AXI) Control Register 0, offset: 0x8 */
-  __IO uint32_t BMCR1;                             /**< Master Bus (AXI) Control Register 1, offset: 0xC */
-  __IO uint32_t BR[9];                             /**< Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device), array offset: 0x10, array step: 0x4 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t INTEN;                             /**< Interrupt Enable Register, offset: 0x38 */
-  __IO uint32_t INTR;                              /**< Interrupt Enable Register, offset: 0x3C */
-  __IO uint32_t SDRAMCR0;                          /**< SDRAM control register 0, offset: 0x40 */
-  __IO uint32_t SDRAMCR1;                          /**< SDRAM control register 1, offset: 0x44 */
-  __IO uint32_t SDRAMCR2;                          /**< SDRAM control register 2, offset: 0x48 */
-  __IO uint32_t SDRAMCR3;                          /**< SDRAM control register 3, offset: 0x4C */
-  __IO uint32_t NANDCR0;                           /**< NAND control register 0, offset: 0x50 */
-  __IO uint32_t NANDCR1;                           /**< NAND control register 1, offset: 0x54 */
-  __IO uint32_t NANDCR2;                           /**< NAND control register 2, offset: 0x58 */
-  __IO uint32_t NANDCR3;                           /**< NAND control register 3, offset: 0x5C */
-  __IO uint32_t NORCR0;                            /**< NOR control register 0, offset: 0x60 */
-  __IO uint32_t NORCR1;                            /**< NOR control register 1, offset: 0x64 */
-  __IO uint32_t NORCR2;                            /**< NOR control register 2, offset: 0x68 */
-       uint32_t NORCR3;                            /**< NOR control register 3, offset: 0x6C */
-  __IO uint32_t SRAMCR0;                           /**< SRAM control register 0, offset: 0x70 */
-  __IO uint32_t SRAMCR1;                           /**< SRAM control register 1, offset: 0x74 */
-  __IO uint32_t SRAMCR2;                           /**< SRAM control register 2, offset: 0x78 */
-       uint32_t SRAMCR3;                           /**< SRAM control register 3, offset: 0x7C */
-  __IO uint32_t DBICR0;                            /**< DBI-B control register 0, offset: 0x80 */
-  __IO uint32_t DBICR1;                            /**< DBI-B control register 1, offset: 0x84 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t IPCR0;                             /**< IP Command control register 0, offset: 0x90 */
-  __IO uint32_t IPCR1;                             /**< IP Command control register 1, offset: 0x94 */
-  __IO uint32_t IPCR2;                             /**< IP Command control register 2, offset: 0x98 */
-  __IO uint32_t IPCMD;                             /**< IP Command register, offset: 0x9C */
-  __IO uint32_t IPTXDAT;                           /**< TX DATA register (for IP Command), offset: 0xA0 */
-       uint8_t RESERVED_2[12];
-  __I  uint32_t IPRXDAT;                           /**< RX DATA register (for IP Command), offset: 0xB0 */
-       uint8_t RESERVED_3[12];
-  __I  uint32_t STS0;                              /**< Status register 0, offset: 0xC0 */
-       uint32_t STS1;                              /**< Status register 1, offset: 0xC4 */
-  __I  uint32_t STS2;                              /**< Status register 2, offset: 0xC8 */
-       uint32_t STS3;                              /**< Status register 3, offset: 0xCC */
-       uint32_t STS4;                              /**< Status register 4, offset: 0xD0 */
-       uint32_t STS5;                              /**< Status register 5, offset: 0xD4 */
-       uint32_t STS6;                              /**< Status register 6, offset: 0xD8 */
-       uint32_t STS7;                              /**< Status register 7, offset: 0xDC */
-       uint32_t STS8;                              /**< Status register 8, offset: 0xE0 */
-       uint32_t STS9;                              /**< Status register 9, offset: 0xE4 */
-       uint32_t STS10;                             /**< Status register 10, offset: 0xE8 */
-       uint32_t STS11;                             /**< Status register 11, offset: 0xEC */
-  __I  uint32_t STS12;                             /**< Status register 12, offset: 0xF0 */
-       uint32_t STS13;                             /**< Status register 13, offset: 0xF4 */
-       uint32_t STS14;                             /**< Status register 14, offset: 0xF8 */
-       uint32_t STS15;                             /**< Status register 15, offset: 0xFC */
+typedef struct
+{
+    __IO uint32_t MCR;   /**< Module Control Register, offset: 0x0 */
+    __IO uint32_t IOCR;  /**< IO Mux Control Register, offset: 0x4 */
+    __IO uint32_t BMCR0; /**< Master Bus (AXI) Control Register 0, offset: 0x8 */
+    __IO uint32_t BMCR1; /**< Master Bus (AXI) Control Register 1, offset: 0xC */
+    __IO uint32_t BR[9]; /**< Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device), array offset:
+                            0x10, array step: 0x4 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t INTEN;    /**< Interrupt Enable Register, offset: 0x38 */
+    __IO uint32_t INTR;     /**< Interrupt Enable Register, offset: 0x3C */
+    __IO uint32_t SDRAMCR0; /**< SDRAM control register 0, offset: 0x40 */
+    __IO uint32_t SDRAMCR1; /**< SDRAM control register 1, offset: 0x44 */
+    __IO uint32_t SDRAMCR2; /**< SDRAM control register 2, offset: 0x48 */
+    __IO uint32_t SDRAMCR3; /**< SDRAM control register 3, offset: 0x4C */
+    __IO uint32_t NANDCR0;  /**< NAND control register 0, offset: 0x50 */
+    __IO uint32_t NANDCR1;  /**< NAND control register 1, offset: 0x54 */
+    __IO uint32_t NANDCR2;  /**< NAND control register 2, offset: 0x58 */
+    __IO uint32_t NANDCR3;  /**< NAND control register 3, offset: 0x5C */
+    __IO uint32_t NORCR0;   /**< NOR control register 0, offset: 0x60 */
+    __IO uint32_t NORCR1;   /**< NOR control register 1, offset: 0x64 */
+    __IO uint32_t NORCR2;   /**< NOR control register 2, offset: 0x68 */
+    uint32_t NORCR3;        /**< NOR control register 3, offset: 0x6C */
+    __IO uint32_t SRAMCR0;  /**< SRAM control register 0, offset: 0x70 */
+    __IO uint32_t SRAMCR1;  /**< SRAM control register 1, offset: 0x74 */
+    __IO uint32_t SRAMCR2;  /**< SRAM control register 2, offset: 0x78 */
+    uint32_t SRAMCR3;       /**< SRAM control register 3, offset: 0x7C */
+    __IO uint32_t DBICR0;   /**< DBI-B control register 0, offset: 0x80 */
+    __IO uint32_t DBICR1;   /**< DBI-B control register 1, offset: 0x84 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t IPCR0;   /**< IP Command control register 0, offset: 0x90 */
+    __IO uint32_t IPCR1;   /**< IP Command control register 1, offset: 0x94 */
+    __IO uint32_t IPCR2;   /**< IP Command control register 2, offset: 0x98 */
+    __IO uint32_t IPCMD;   /**< IP Command register, offset: 0x9C */
+    __IO uint32_t IPTXDAT; /**< TX DATA register (for IP Command), offset: 0xA0 */
+    uint8_t RESERVED_2[12];
+    __I uint32_t IPRXDAT; /**< RX DATA register (for IP Command), offset: 0xB0 */
+    uint8_t RESERVED_3[12];
+    __I uint32_t STS0;  /**< Status register 0, offset: 0xC0 */
+    uint32_t STS1;      /**< Status register 1, offset: 0xC4 */
+    __I uint32_t STS2;  /**< Status register 2, offset: 0xC8 */
+    uint32_t STS3;      /**< Status register 3, offset: 0xCC */
+    uint32_t STS4;      /**< Status register 4, offset: 0xD0 */
+    uint32_t STS5;      /**< Status register 5, offset: 0xD4 */
+    uint32_t STS6;      /**< Status register 6, offset: 0xD8 */
+    uint32_t STS7;      /**< Status register 7, offset: 0xDC */
+    uint32_t STS8;      /**< Status register 8, offset: 0xE0 */
+    uint32_t STS9;      /**< Status register 9, offset: 0xE4 */
+    uint32_t STS10;     /**< Status register 10, offset: 0xE8 */
+    uint32_t STS11;     /**< Status register 11, offset: 0xEC */
+    __I uint32_t STS12; /**< Status register 12, offset: 0xF0 */
+    uint32_t STS13;     /**< Status register 13, offset: 0xF4 */
+    uint32_t STS14;     /**< Status register 14, offset: 0xF8 */
+    uint32_t STS15;     /**< Status register 15, offset: 0xFC */
 } SEMC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18478,584 +21190,603 @@ typedef struct {
 
 /*! @name MCR - Module Control Register */
 /*! @{ */
-#define SEMC_MCR_SWRST_MASK                      (0x1U)
-#define SEMC_MCR_SWRST_SHIFT                     (0U)
-#define SEMC_MCR_SWRST(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_SWRST_SHIFT)) & SEMC_MCR_SWRST_MASK)
-#define SEMC_MCR_MDIS_MASK                       (0x2U)
-#define SEMC_MCR_MDIS_SHIFT                      (1U)
-#define SEMC_MCR_MDIS(x)                         (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_MDIS_SHIFT)) & SEMC_MCR_MDIS_MASK)
-#define SEMC_MCR_DQSMD_MASK                      (0x4U)
-#define SEMC_MCR_DQSMD_SHIFT                     (2U)
-#define SEMC_MCR_DQSMD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_DQSMD_SHIFT)) & SEMC_MCR_DQSMD_MASK)
-#define SEMC_MCR_WPOL0_MASK                      (0x40U)
-#define SEMC_MCR_WPOL0_SHIFT                     (6U)
-#define SEMC_MCR_WPOL0(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL0_SHIFT)) & SEMC_MCR_WPOL0_MASK)
-#define SEMC_MCR_WPOL1_MASK                      (0x80U)
-#define SEMC_MCR_WPOL1_SHIFT                     (7U)
-#define SEMC_MCR_WPOL1(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL1_SHIFT)) & SEMC_MCR_WPOL1_MASK)
-#define SEMC_MCR_CTO_MASK                        (0xFF0000U)
-#define SEMC_MCR_CTO_SHIFT                       (16U)
-#define SEMC_MCR_CTO(x)                          (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_CTO_SHIFT)) & SEMC_MCR_CTO_MASK)
-#define SEMC_MCR_BTO_MASK                        (0x1F000000U)
-#define SEMC_MCR_BTO_SHIFT                       (24U)
-#define SEMC_MCR_BTO(x)                          (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_BTO_SHIFT)) & SEMC_MCR_BTO_MASK)
+#define SEMC_MCR_SWRST_MASK  (0x1U)
+#define SEMC_MCR_SWRST_SHIFT (0U)
+#define SEMC_MCR_SWRST(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_SWRST_SHIFT)) & SEMC_MCR_SWRST_MASK)
+#define SEMC_MCR_MDIS_MASK   (0x2U)
+#define SEMC_MCR_MDIS_SHIFT  (1U)
+#define SEMC_MCR_MDIS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_MDIS_SHIFT)) & SEMC_MCR_MDIS_MASK)
+#define SEMC_MCR_DQSMD_MASK  (0x4U)
+#define SEMC_MCR_DQSMD_SHIFT (2U)
+#define SEMC_MCR_DQSMD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_DQSMD_SHIFT)) & SEMC_MCR_DQSMD_MASK)
+#define SEMC_MCR_WPOL0_MASK  (0x40U)
+#define SEMC_MCR_WPOL0_SHIFT (6U)
+#define SEMC_MCR_WPOL0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL0_SHIFT)) & SEMC_MCR_WPOL0_MASK)
+#define SEMC_MCR_WPOL1_MASK  (0x80U)
+#define SEMC_MCR_WPOL1_SHIFT (7U)
+#define SEMC_MCR_WPOL1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL1_SHIFT)) & SEMC_MCR_WPOL1_MASK)
+#define SEMC_MCR_CTO_MASK    (0xFF0000U)
+#define SEMC_MCR_CTO_SHIFT   (16U)
+#define SEMC_MCR_CTO(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_CTO_SHIFT)) & SEMC_MCR_CTO_MASK)
+#define SEMC_MCR_BTO_MASK    (0x1F000000U)
+#define SEMC_MCR_BTO_SHIFT   (24U)
+#define SEMC_MCR_BTO(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_BTO_SHIFT)) & SEMC_MCR_BTO_MASK)
 /*! @} */
 
 /*! @name IOCR - IO Mux Control Register */
 /*! @{ */
-#define SEMC_IOCR_MUX_A8_MASK                    (0x7U)
-#define SEMC_IOCR_MUX_A8_SHIFT                   (0U)
-#define SEMC_IOCR_MUX_A8(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_A8_SHIFT)) & SEMC_IOCR_MUX_A8_MASK)
-#define SEMC_IOCR_MUX_CSX0_MASK                  (0x38U)
-#define SEMC_IOCR_MUX_CSX0_SHIFT                 (3U)
-#define SEMC_IOCR_MUX_CSX0(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX0_SHIFT)) & SEMC_IOCR_MUX_CSX0_MASK)
-#define SEMC_IOCR_MUX_CSX1_MASK                  (0x1C0U)
-#define SEMC_IOCR_MUX_CSX1_SHIFT                 (6U)
-#define SEMC_IOCR_MUX_CSX1(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX1_SHIFT)) & SEMC_IOCR_MUX_CSX1_MASK)
-#define SEMC_IOCR_MUX_CSX2_MASK                  (0xE00U)
-#define SEMC_IOCR_MUX_CSX2_SHIFT                 (9U)
-#define SEMC_IOCR_MUX_CSX2(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX2_SHIFT)) & SEMC_IOCR_MUX_CSX2_MASK)
-#define SEMC_IOCR_MUX_CSX3_MASK                  (0x7000U)
-#define SEMC_IOCR_MUX_CSX3_SHIFT                 (12U)
-#define SEMC_IOCR_MUX_CSX3(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX3_SHIFT)) & SEMC_IOCR_MUX_CSX3_MASK)
-#define SEMC_IOCR_MUX_RDY_MASK                   (0x38000U)
-#define SEMC_IOCR_MUX_RDY_SHIFT                  (15U)
-#define SEMC_IOCR_MUX_RDY(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_RDY_SHIFT)) & SEMC_IOCR_MUX_RDY_MASK)
+#define SEMC_IOCR_MUX_A8_MASK    (0x7U)
+#define SEMC_IOCR_MUX_A8_SHIFT   (0U)
+#define SEMC_IOCR_MUX_A8(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_A8_SHIFT)) & SEMC_IOCR_MUX_A8_MASK)
+#define SEMC_IOCR_MUX_CSX0_MASK  (0x38U)
+#define SEMC_IOCR_MUX_CSX0_SHIFT (3U)
+#define SEMC_IOCR_MUX_CSX0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX0_SHIFT)) & SEMC_IOCR_MUX_CSX0_MASK)
+#define SEMC_IOCR_MUX_CSX1_MASK  (0x1C0U)
+#define SEMC_IOCR_MUX_CSX1_SHIFT (6U)
+#define SEMC_IOCR_MUX_CSX1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX1_SHIFT)) & SEMC_IOCR_MUX_CSX1_MASK)
+#define SEMC_IOCR_MUX_CSX2_MASK  (0xE00U)
+#define SEMC_IOCR_MUX_CSX2_SHIFT (9U)
+#define SEMC_IOCR_MUX_CSX2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX2_SHIFT)) & SEMC_IOCR_MUX_CSX2_MASK)
+#define SEMC_IOCR_MUX_CSX3_MASK  (0x7000U)
+#define SEMC_IOCR_MUX_CSX3_SHIFT (12U)
+#define SEMC_IOCR_MUX_CSX3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX3_SHIFT)) & SEMC_IOCR_MUX_CSX3_MASK)
+#define SEMC_IOCR_MUX_RDY_MASK   (0x38000U)
+#define SEMC_IOCR_MUX_RDY_SHIFT  (15U)
+#define SEMC_IOCR_MUX_RDY(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_RDY_SHIFT)) & SEMC_IOCR_MUX_RDY_MASK)
 /*! @} */
 
 /*! @name BMCR0 - Master Bus (AXI) Control Register 0 */
 /*! @{ */
-#define SEMC_BMCR0_WQOS_MASK                     (0xFU)
-#define SEMC_BMCR0_WQOS_SHIFT                    (0U)
-#define SEMC_BMCR0_WQOS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WQOS_SHIFT)) & SEMC_BMCR0_WQOS_MASK)
-#define SEMC_BMCR0_WAGE_MASK                     (0xF0U)
-#define SEMC_BMCR0_WAGE_SHIFT                    (4U)
-#define SEMC_BMCR0_WAGE(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WAGE_SHIFT)) & SEMC_BMCR0_WAGE_MASK)
-#define SEMC_BMCR0_WSH_MASK                      (0xFF00U)
-#define SEMC_BMCR0_WSH_SHIFT                     (8U)
-#define SEMC_BMCR0_WSH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WSH_SHIFT)) & SEMC_BMCR0_WSH_MASK)
-#define SEMC_BMCR0_WRWS_MASK                     (0xFF0000U)
-#define SEMC_BMCR0_WRWS_SHIFT                    (16U)
-#define SEMC_BMCR0_WRWS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WRWS_SHIFT)) & SEMC_BMCR0_WRWS_MASK)
+#define SEMC_BMCR0_WQOS_MASK  (0xFU)
+#define SEMC_BMCR0_WQOS_SHIFT (0U)
+#define SEMC_BMCR0_WQOS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WQOS_SHIFT)) & SEMC_BMCR0_WQOS_MASK)
+#define SEMC_BMCR0_WAGE_MASK  (0xF0U)
+#define SEMC_BMCR0_WAGE_SHIFT (4U)
+#define SEMC_BMCR0_WAGE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WAGE_SHIFT)) & SEMC_BMCR0_WAGE_MASK)
+#define SEMC_BMCR0_WSH_MASK   (0xFF00U)
+#define SEMC_BMCR0_WSH_SHIFT  (8U)
+#define SEMC_BMCR0_WSH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WSH_SHIFT)) & SEMC_BMCR0_WSH_MASK)
+#define SEMC_BMCR0_WRWS_MASK  (0xFF0000U)
+#define SEMC_BMCR0_WRWS_SHIFT (16U)
+#define SEMC_BMCR0_WRWS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WRWS_SHIFT)) & SEMC_BMCR0_WRWS_MASK)
 /*! @} */
 
 /*! @name BMCR1 - Master Bus (AXI) Control Register 1 */
 /*! @{ */
-#define SEMC_BMCR1_WQOS_MASK                     (0xFU)
-#define SEMC_BMCR1_WQOS_SHIFT                    (0U)
-#define SEMC_BMCR1_WQOS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WQOS_SHIFT)) & SEMC_BMCR1_WQOS_MASK)
-#define SEMC_BMCR1_WAGE_MASK                     (0xF0U)
-#define SEMC_BMCR1_WAGE_SHIFT                    (4U)
-#define SEMC_BMCR1_WAGE(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WAGE_SHIFT)) & SEMC_BMCR1_WAGE_MASK)
-#define SEMC_BMCR1_WPH_MASK                      (0xFF00U)
-#define SEMC_BMCR1_WPH_SHIFT                     (8U)
-#define SEMC_BMCR1_WPH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WPH_SHIFT)) & SEMC_BMCR1_WPH_MASK)
-#define SEMC_BMCR1_WRWS_MASK                     (0xFF0000U)
-#define SEMC_BMCR1_WRWS_SHIFT                    (16U)
-#define SEMC_BMCR1_WRWS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WRWS_SHIFT)) & SEMC_BMCR1_WRWS_MASK)
-#define SEMC_BMCR1_WBR_MASK                      (0xFF000000U)
-#define SEMC_BMCR1_WBR_SHIFT                     (24U)
-#define SEMC_BMCR1_WBR(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WBR_SHIFT)) & SEMC_BMCR1_WBR_MASK)
+#define SEMC_BMCR1_WQOS_MASK  (0xFU)
+#define SEMC_BMCR1_WQOS_SHIFT (0U)
+#define SEMC_BMCR1_WQOS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WQOS_SHIFT)) & SEMC_BMCR1_WQOS_MASK)
+#define SEMC_BMCR1_WAGE_MASK  (0xF0U)
+#define SEMC_BMCR1_WAGE_SHIFT (4U)
+#define SEMC_BMCR1_WAGE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WAGE_SHIFT)) & SEMC_BMCR1_WAGE_MASK)
+#define SEMC_BMCR1_WPH_MASK   (0xFF00U)
+#define SEMC_BMCR1_WPH_SHIFT  (8U)
+#define SEMC_BMCR1_WPH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WPH_SHIFT)) & SEMC_BMCR1_WPH_MASK)
+#define SEMC_BMCR1_WRWS_MASK  (0xFF0000U)
+#define SEMC_BMCR1_WRWS_SHIFT (16U)
+#define SEMC_BMCR1_WRWS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WRWS_SHIFT)) & SEMC_BMCR1_WRWS_MASK)
+#define SEMC_BMCR1_WBR_MASK   (0xFF000000U)
+#define SEMC_BMCR1_WBR_SHIFT  (24U)
+#define SEMC_BMCR1_WBR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WBR_SHIFT)) & SEMC_BMCR1_WBR_MASK)
 /*! @} */
 
 /*! @name BR - Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device) */
 /*! @{ */
-#define SEMC_BR_VLD_MASK                         (0x1U)
-#define SEMC_BR_VLD_SHIFT                        (0U)
-#define SEMC_BR_VLD(x)                           (((uint32_t)(((uint32_t)(x)) << SEMC_BR_VLD_SHIFT)) & SEMC_BR_VLD_MASK)
-#define SEMC_BR_MS_MASK                          (0x3EU)
-#define SEMC_BR_MS_SHIFT                         (1U)
-#define SEMC_BR_MS(x)                            (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
-#define SEMC_BR_BA_MASK                          (0xFFFFF000U)
-#define SEMC_BR_BA_SHIFT                         (12U)
-#define SEMC_BR_BA(x)                            (((uint32_t)(((uint32_t)(x)) << SEMC_BR_BA_SHIFT)) & SEMC_BR_BA_MASK)
+#define SEMC_BR_VLD_MASK  (0x1U)
+#define SEMC_BR_VLD_SHIFT (0U)
+#define SEMC_BR_VLD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BR_VLD_SHIFT)) & SEMC_BR_VLD_MASK)
+#define SEMC_BR_MS_MASK   (0x3EU)
+#define SEMC_BR_MS_SHIFT  (1U)
+#define SEMC_BR_MS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
+#define SEMC_BR_BA_MASK   (0xFFFFF000U)
+#define SEMC_BR_BA_SHIFT  (12U)
+#define SEMC_BR_BA(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BR_BA_SHIFT)) & SEMC_BR_BA_MASK)
 /*! @} */
 
 /* The count of SEMC_BR */
-#define SEMC_BR_COUNT                            (9U)
+#define SEMC_BR_COUNT (9U)
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define SEMC_INTEN_IPCMDDONEEN_MASK              (0x1U)
-#define SEMC_INTEN_IPCMDDONEEN_SHIFT             (0U)
-#define SEMC_INTEN_IPCMDDONEEN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDDONEEN_SHIFT)) & SEMC_INTEN_IPCMDDONEEN_MASK)
-#define SEMC_INTEN_IPCMDERREN_MASK               (0x2U)
-#define SEMC_INTEN_IPCMDERREN_SHIFT              (1U)
-#define SEMC_INTEN_IPCMDERREN(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDERREN_SHIFT)) & SEMC_INTEN_IPCMDERREN_MASK)
-#define SEMC_INTEN_AXICMDERREN_MASK              (0x4U)
-#define SEMC_INTEN_AXICMDERREN_SHIFT             (2U)
-#define SEMC_INTEN_AXICMDERREN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXICMDERREN_SHIFT)) & SEMC_INTEN_AXICMDERREN_MASK)
-#define SEMC_INTEN_AXIBUSERREN_MASK              (0x8U)
-#define SEMC_INTEN_AXIBUSERREN_SHIFT             (3U)
-#define SEMC_INTEN_AXIBUSERREN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXIBUSERREN_SHIFT)) & SEMC_INTEN_AXIBUSERREN_MASK)
-#define SEMC_INTEN_NDPAGEENDEN_MASK              (0x10U)
-#define SEMC_INTEN_NDPAGEENDEN_SHIFT             (4U)
-#define SEMC_INTEN_NDPAGEENDEN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDPAGEENDEN_SHIFT)) & SEMC_INTEN_NDPAGEENDEN_MASK)
-#define SEMC_INTEN_NDNOPENDEN_MASK               (0x20U)
-#define SEMC_INTEN_NDNOPENDEN_SHIFT              (5U)
-#define SEMC_INTEN_NDNOPENDEN(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDNOPENDEN_SHIFT)) & SEMC_INTEN_NDNOPENDEN_MASK)
+#define SEMC_INTEN_IPCMDDONEEN_MASK  (0x1U)
+#define SEMC_INTEN_IPCMDDONEEN_SHIFT (0U)
+#define SEMC_INTEN_IPCMDDONEEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDDONEEN_SHIFT)) & SEMC_INTEN_IPCMDDONEEN_MASK)
+#define SEMC_INTEN_IPCMDERREN_MASK  (0x2U)
+#define SEMC_INTEN_IPCMDERREN_SHIFT (1U)
+#define SEMC_INTEN_IPCMDERREN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDERREN_SHIFT)) & SEMC_INTEN_IPCMDERREN_MASK)
+#define SEMC_INTEN_AXICMDERREN_MASK  (0x4U)
+#define SEMC_INTEN_AXICMDERREN_SHIFT (2U)
+#define SEMC_INTEN_AXICMDERREN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXICMDERREN_SHIFT)) & SEMC_INTEN_AXICMDERREN_MASK)
+#define SEMC_INTEN_AXIBUSERREN_MASK  (0x8U)
+#define SEMC_INTEN_AXIBUSERREN_SHIFT (3U)
+#define SEMC_INTEN_AXIBUSERREN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXIBUSERREN_SHIFT)) & SEMC_INTEN_AXIBUSERREN_MASK)
+#define SEMC_INTEN_NDPAGEENDEN_MASK  (0x10U)
+#define SEMC_INTEN_NDPAGEENDEN_SHIFT (4U)
+#define SEMC_INTEN_NDPAGEENDEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDPAGEENDEN_SHIFT)) & SEMC_INTEN_NDPAGEENDEN_MASK)
+#define SEMC_INTEN_NDNOPENDEN_MASK  (0x20U)
+#define SEMC_INTEN_NDNOPENDEN_SHIFT (5U)
+#define SEMC_INTEN_NDNOPENDEN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDNOPENDEN_SHIFT)) & SEMC_INTEN_NDNOPENDEN_MASK)
 /*! @} */
 
 /*! @name INTR - Interrupt Enable Register */
 /*! @{ */
-#define SEMC_INTR_IPCMDDONE_MASK                 (0x1U)
-#define SEMC_INTR_IPCMDDONE_SHIFT                (0U)
-#define SEMC_INTR_IPCMDDONE(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDDONE_SHIFT)) & SEMC_INTR_IPCMDDONE_MASK)
-#define SEMC_INTR_IPCMDERR_MASK                  (0x2U)
-#define SEMC_INTR_IPCMDERR_SHIFT                 (1U)
-#define SEMC_INTR_IPCMDERR(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDERR_SHIFT)) & SEMC_INTR_IPCMDERR_MASK)
-#define SEMC_INTR_AXICMDERR_MASK                 (0x4U)
-#define SEMC_INTR_AXICMDERR_SHIFT                (2U)
-#define SEMC_INTR_AXICMDERR(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXICMDERR_SHIFT)) & SEMC_INTR_AXICMDERR_MASK)
-#define SEMC_INTR_AXIBUSERR_MASK                 (0x8U)
-#define SEMC_INTR_AXIBUSERR_SHIFT                (3U)
-#define SEMC_INTR_AXIBUSERR(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXIBUSERR_SHIFT)) & SEMC_INTR_AXIBUSERR_MASK)
-#define SEMC_INTR_NDPAGEEND_MASK                 (0x10U)
-#define SEMC_INTR_NDPAGEEND_SHIFT                (4U)
-#define SEMC_INTR_NDPAGEEND(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDPAGEEND_SHIFT)) & SEMC_INTR_NDPAGEEND_MASK)
-#define SEMC_INTR_NDNOPEND_MASK                  (0x20U)
-#define SEMC_INTR_NDNOPEND_SHIFT                 (5U)
-#define SEMC_INTR_NDNOPEND(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDNOPEND_SHIFT)) & SEMC_INTR_NDNOPEND_MASK)
+#define SEMC_INTR_IPCMDDONE_MASK  (0x1U)
+#define SEMC_INTR_IPCMDDONE_SHIFT (0U)
+#define SEMC_INTR_IPCMDDONE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDDONE_SHIFT)) & SEMC_INTR_IPCMDDONE_MASK)
+#define SEMC_INTR_IPCMDERR_MASK   (0x2U)
+#define SEMC_INTR_IPCMDERR_SHIFT  (1U)
+#define SEMC_INTR_IPCMDERR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDERR_SHIFT)) & SEMC_INTR_IPCMDERR_MASK)
+#define SEMC_INTR_AXICMDERR_MASK  (0x4U)
+#define SEMC_INTR_AXICMDERR_SHIFT (2U)
+#define SEMC_INTR_AXICMDERR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXICMDERR_SHIFT)) & SEMC_INTR_AXICMDERR_MASK)
+#define SEMC_INTR_AXIBUSERR_MASK  (0x8U)
+#define SEMC_INTR_AXIBUSERR_SHIFT (3U)
+#define SEMC_INTR_AXIBUSERR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXIBUSERR_SHIFT)) & SEMC_INTR_AXIBUSERR_MASK)
+#define SEMC_INTR_NDPAGEEND_MASK  (0x10U)
+#define SEMC_INTR_NDPAGEEND_SHIFT (4U)
+#define SEMC_INTR_NDPAGEEND(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDPAGEEND_SHIFT)) & SEMC_INTR_NDPAGEEND_MASK)
+#define SEMC_INTR_NDNOPEND_MASK   (0x20U)
+#define SEMC_INTR_NDNOPEND_SHIFT  (5U)
+#define SEMC_INTR_NDNOPEND(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDNOPEND_SHIFT)) & SEMC_INTR_NDNOPEND_MASK)
 /*! @} */
 
 /*! @name SDRAMCR0 - SDRAM control register 0 */
 /*! @{ */
-#define SEMC_SDRAMCR0_PS_MASK                    (0x1U)
-#define SEMC_SDRAMCR0_PS_SHIFT                   (0U)
-#define SEMC_SDRAMCR0_PS(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_PS_SHIFT)) & SEMC_SDRAMCR0_PS_MASK)
-#define SEMC_SDRAMCR0_BL_MASK                    (0x70U)
-#define SEMC_SDRAMCR0_BL_SHIFT                   (4U)
-#define SEMC_SDRAMCR0_BL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_BL_SHIFT)) & SEMC_SDRAMCR0_BL_MASK)
-#define SEMC_SDRAMCR0_COL_MASK                   (0x300U)
-#define SEMC_SDRAMCR0_COL_SHIFT                  (8U)
-#define SEMC_SDRAMCR0_COL(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_COL_SHIFT)) & SEMC_SDRAMCR0_COL_MASK)
-#define SEMC_SDRAMCR0_CL_MASK                    (0xC00U)
-#define SEMC_SDRAMCR0_CL_SHIFT                   (10U)
-#define SEMC_SDRAMCR0_CL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_CL_SHIFT)) & SEMC_SDRAMCR0_CL_MASK)
+#define SEMC_SDRAMCR0_PS_MASK   (0x1U)
+#define SEMC_SDRAMCR0_PS_SHIFT  (0U)
+#define SEMC_SDRAMCR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_PS_SHIFT)) & SEMC_SDRAMCR0_PS_MASK)
+#define SEMC_SDRAMCR0_BL_MASK   (0x70U)
+#define SEMC_SDRAMCR0_BL_SHIFT  (4U)
+#define SEMC_SDRAMCR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_BL_SHIFT)) & SEMC_SDRAMCR0_BL_MASK)
+#define SEMC_SDRAMCR0_COL_MASK  (0x300U)
+#define SEMC_SDRAMCR0_COL_SHIFT (8U)
+#define SEMC_SDRAMCR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_COL_SHIFT)) & SEMC_SDRAMCR0_COL_MASK)
+#define SEMC_SDRAMCR0_CL_MASK   (0xC00U)
+#define SEMC_SDRAMCR0_CL_SHIFT  (10U)
+#define SEMC_SDRAMCR0_CL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_CL_SHIFT)) & SEMC_SDRAMCR0_CL_MASK)
 /*! @} */
 
 /*! @name SDRAMCR1 - SDRAM control register 1 */
 /*! @{ */
-#define SEMC_SDRAMCR1_PRE2ACT_MASK               (0xFU)
-#define SEMC_SDRAMCR1_PRE2ACT_SHIFT              (0U)
-#define SEMC_SDRAMCR1_PRE2ACT(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_PRE2ACT_SHIFT)) & SEMC_SDRAMCR1_PRE2ACT_MASK)
-#define SEMC_SDRAMCR1_ACT2RW_MASK                (0xF0U)
-#define SEMC_SDRAMCR1_ACT2RW_SHIFT               (4U)
-#define SEMC_SDRAMCR1_ACT2RW(x)                  (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2RW_SHIFT)) & SEMC_SDRAMCR1_ACT2RW_MASK)
-#define SEMC_SDRAMCR1_RFRC_MASK                  (0x1F00U)
-#define SEMC_SDRAMCR1_RFRC_SHIFT                 (8U)
-#define SEMC_SDRAMCR1_RFRC(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_RFRC_SHIFT)) & SEMC_SDRAMCR1_RFRC_MASK)
-#define SEMC_SDRAMCR1_WRC_MASK                   (0xE000U)
-#define SEMC_SDRAMCR1_WRC_SHIFT                  (13U)
-#define SEMC_SDRAMCR1_WRC(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_WRC_SHIFT)) & SEMC_SDRAMCR1_WRC_MASK)
-#define SEMC_SDRAMCR1_CKEOFF_MASK                (0xF0000U)
-#define SEMC_SDRAMCR1_CKEOFF_SHIFT               (16U)
-#define SEMC_SDRAMCR1_CKEOFF(x)                  (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_CKEOFF_SHIFT)) & SEMC_SDRAMCR1_CKEOFF_MASK)
-#define SEMC_SDRAMCR1_ACT2PRE_MASK               (0xF00000U)
-#define SEMC_SDRAMCR1_ACT2PRE_SHIFT              (20U)
-#define SEMC_SDRAMCR1_ACT2PRE(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2PRE_SHIFT)) & SEMC_SDRAMCR1_ACT2PRE_MASK)
+#define SEMC_SDRAMCR1_PRE2ACT_MASK  (0xFU)
+#define SEMC_SDRAMCR1_PRE2ACT_SHIFT (0U)
+#define SEMC_SDRAMCR1_PRE2ACT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_PRE2ACT_SHIFT)) & SEMC_SDRAMCR1_PRE2ACT_MASK)
+#define SEMC_SDRAMCR1_ACT2RW_MASK  (0xF0U)
+#define SEMC_SDRAMCR1_ACT2RW_SHIFT (4U)
+#define SEMC_SDRAMCR1_ACT2RW(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2RW_SHIFT)) & SEMC_SDRAMCR1_ACT2RW_MASK)
+#define SEMC_SDRAMCR1_RFRC_MASK    (0x1F00U)
+#define SEMC_SDRAMCR1_RFRC_SHIFT   (8U)
+#define SEMC_SDRAMCR1_RFRC(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_RFRC_SHIFT)) & SEMC_SDRAMCR1_RFRC_MASK)
+#define SEMC_SDRAMCR1_WRC_MASK     (0xE000U)
+#define SEMC_SDRAMCR1_WRC_SHIFT    (13U)
+#define SEMC_SDRAMCR1_WRC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_WRC_SHIFT)) & SEMC_SDRAMCR1_WRC_MASK)
+#define SEMC_SDRAMCR1_CKEOFF_MASK  (0xF0000U)
+#define SEMC_SDRAMCR1_CKEOFF_SHIFT (16U)
+#define SEMC_SDRAMCR1_CKEOFF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_CKEOFF_SHIFT)) & SEMC_SDRAMCR1_CKEOFF_MASK)
+#define SEMC_SDRAMCR1_ACT2PRE_MASK  (0xF00000U)
+#define SEMC_SDRAMCR1_ACT2PRE_SHIFT (20U)
+#define SEMC_SDRAMCR1_ACT2PRE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2PRE_SHIFT)) & SEMC_SDRAMCR1_ACT2PRE_MASK)
 /*! @} */
 
 /*! @name SDRAMCR2 - SDRAM control register 2 */
 /*! @{ */
-#define SEMC_SDRAMCR2_SRRC_MASK                  (0xFFU)
-#define SEMC_SDRAMCR2_SRRC_SHIFT                 (0U)
-#define SEMC_SDRAMCR2_SRRC(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_SRRC_SHIFT)) & SEMC_SDRAMCR2_SRRC_MASK)
-#define SEMC_SDRAMCR2_REF2REF_MASK               (0xFF00U)
-#define SEMC_SDRAMCR2_REF2REF_SHIFT              (8U)
-#define SEMC_SDRAMCR2_REF2REF(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_REF2REF_SHIFT)) & SEMC_SDRAMCR2_REF2REF_MASK)
-#define SEMC_SDRAMCR2_ACT2ACT_MASK               (0xFF0000U)
-#define SEMC_SDRAMCR2_ACT2ACT_SHIFT              (16U)
-#define SEMC_SDRAMCR2_ACT2ACT(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ACT2ACT_SHIFT)) & SEMC_SDRAMCR2_ACT2ACT_MASK)
-#define SEMC_SDRAMCR2_ITO_MASK                   (0xFF000000U)
-#define SEMC_SDRAMCR2_ITO_SHIFT                  (24U)
-#define SEMC_SDRAMCR2_ITO(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ITO_SHIFT)) & SEMC_SDRAMCR2_ITO_MASK)
+#define SEMC_SDRAMCR2_SRRC_MASK     (0xFFU)
+#define SEMC_SDRAMCR2_SRRC_SHIFT    (0U)
+#define SEMC_SDRAMCR2_SRRC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_SRRC_SHIFT)) & SEMC_SDRAMCR2_SRRC_MASK)
+#define SEMC_SDRAMCR2_REF2REF_MASK  (0xFF00U)
+#define SEMC_SDRAMCR2_REF2REF_SHIFT (8U)
+#define SEMC_SDRAMCR2_REF2REF(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_REF2REF_SHIFT)) & SEMC_SDRAMCR2_REF2REF_MASK)
+#define SEMC_SDRAMCR2_ACT2ACT_MASK  (0xFF0000U)
+#define SEMC_SDRAMCR2_ACT2ACT_SHIFT (16U)
+#define SEMC_SDRAMCR2_ACT2ACT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ACT2ACT_SHIFT)) & SEMC_SDRAMCR2_ACT2ACT_MASK)
+#define SEMC_SDRAMCR2_ITO_MASK  (0xFF000000U)
+#define SEMC_SDRAMCR2_ITO_SHIFT (24U)
+#define SEMC_SDRAMCR2_ITO(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ITO_SHIFT)) & SEMC_SDRAMCR2_ITO_MASK)
 /*! @} */
 
 /*! @name SDRAMCR3 - SDRAM control register 3 */
 /*! @{ */
-#define SEMC_SDRAMCR3_REN_MASK                   (0x1U)
-#define SEMC_SDRAMCR3_REN_SHIFT                  (0U)
-#define SEMC_SDRAMCR3_REN(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REN_SHIFT)) & SEMC_SDRAMCR3_REN_MASK)
-#define SEMC_SDRAMCR3_REBL_MASK                  (0xEU)
-#define SEMC_SDRAMCR3_REBL_SHIFT                 (1U)
-#define SEMC_SDRAMCR3_REBL(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REBL_SHIFT)) & SEMC_SDRAMCR3_REBL_MASK)
-#define SEMC_SDRAMCR3_PRESCALE_MASK              (0xFF00U)
-#define SEMC_SDRAMCR3_PRESCALE_SHIFT             (8U)
-#define SEMC_SDRAMCR3_PRESCALE(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_PRESCALE_SHIFT)) & SEMC_SDRAMCR3_PRESCALE_MASK)
-#define SEMC_SDRAMCR3_RT_MASK                    (0xFF0000U)
-#define SEMC_SDRAMCR3_RT_SHIFT                   (16U)
-#define SEMC_SDRAMCR3_RT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_RT_SHIFT)) & SEMC_SDRAMCR3_RT_MASK)
-#define SEMC_SDRAMCR3_UT_MASK                    (0xFF000000U)
-#define SEMC_SDRAMCR3_UT_SHIFT                   (24U)
-#define SEMC_SDRAMCR3_UT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_UT_SHIFT)) & SEMC_SDRAMCR3_UT_MASK)
+#define SEMC_SDRAMCR3_REN_MASK       (0x1U)
+#define SEMC_SDRAMCR3_REN_SHIFT      (0U)
+#define SEMC_SDRAMCR3_REN(x)         (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REN_SHIFT)) & SEMC_SDRAMCR3_REN_MASK)
+#define SEMC_SDRAMCR3_REBL_MASK      (0xEU)
+#define SEMC_SDRAMCR3_REBL_SHIFT     (1U)
+#define SEMC_SDRAMCR3_REBL(x)        (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REBL_SHIFT)) & SEMC_SDRAMCR3_REBL_MASK)
+#define SEMC_SDRAMCR3_PRESCALE_MASK  (0xFF00U)
+#define SEMC_SDRAMCR3_PRESCALE_SHIFT (8U)
+#define SEMC_SDRAMCR3_PRESCALE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_PRESCALE_SHIFT)) & SEMC_SDRAMCR3_PRESCALE_MASK)
+#define SEMC_SDRAMCR3_RT_MASK  (0xFF0000U)
+#define SEMC_SDRAMCR3_RT_SHIFT (16U)
+#define SEMC_SDRAMCR3_RT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_RT_SHIFT)) & SEMC_SDRAMCR3_RT_MASK)
+#define SEMC_SDRAMCR3_UT_MASK  (0xFF000000U)
+#define SEMC_SDRAMCR3_UT_SHIFT (24U)
+#define SEMC_SDRAMCR3_UT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_UT_SHIFT)) & SEMC_SDRAMCR3_UT_MASK)
 /*! @} */
 
 /*! @name NANDCR0 - NAND control register 0 */
 /*! @{ */
-#define SEMC_NANDCR0_PS_MASK                     (0x1U)
-#define SEMC_NANDCR0_PS_SHIFT                    (0U)
-#define SEMC_NANDCR0_PS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_PS_SHIFT)) & SEMC_NANDCR0_PS_MASK)
-#define SEMC_NANDCR0_BL_MASK                     (0x70U)
-#define SEMC_NANDCR0_BL_SHIFT                    (4U)
-#define SEMC_NANDCR0_BL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_BL_SHIFT)) & SEMC_NANDCR0_BL_MASK)
-#define SEMC_NANDCR0_EDO_MASK                    (0x80U)
-#define SEMC_NANDCR0_EDO_SHIFT                   (7U)
-#define SEMC_NANDCR0_EDO(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_EDO_SHIFT)) & SEMC_NANDCR0_EDO_MASK)
-#define SEMC_NANDCR0_COL_MASK                    (0x700U)
-#define SEMC_NANDCR0_COL_SHIFT                   (8U)
-#define SEMC_NANDCR0_COL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_COL_SHIFT)) & SEMC_NANDCR0_COL_MASK)
+#define SEMC_NANDCR0_PS_MASK   (0x1U)
+#define SEMC_NANDCR0_PS_SHIFT  (0U)
+#define SEMC_NANDCR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_PS_SHIFT)) & SEMC_NANDCR0_PS_MASK)
+#define SEMC_NANDCR0_BL_MASK   (0x70U)
+#define SEMC_NANDCR0_BL_SHIFT  (4U)
+#define SEMC_NANDCR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_BL_SHIFT)) & SEMC_NANDCR0_BL_MASK)
+#define SEMC_NANDCR0_EDO_MASK  (0x80U)
+#define SEMC_NANDCR0_EDO_SHIFT (7U)
+#define SEMC_NANDCR0_EDO(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_EDO_SHIFT)) & SEMC_NANDCR0_EDO_MASK)
+#define SEMC_NANDCR0_COL_MASK  (0x700U)
+#define SEMC_NANDCR0_COL_SHIFT (8U)
+#define SEMC_NANDCR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_COL_SHIFT)) & SEMC_NANDCR0_COL_MASK)
 /*! @} */
 
 /*! @name NANDCR1 - NAND control register 1 */
 /*! @{ */
-#define SEMC_NANDCR1_CES_MASK                    (0xFU)
-#define SEMC_NANDCR1_CES_SHIFT                   (0U)
-#define SEMC_NANDCR1_CES(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CES_SHIFT)) & SEMC_NANDCR1_CES_MASK)
-#define SEMC_NANDCR1_CEH_MASK                    (0xF0U)
-#define SEMC_NANDCR1_CEH_SHIFT                   (4U)
-#define SEMC_NANDCR1_CEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEH_SHIFT)) & SEMC_NANDCR1_CEH_MASK)
-#define SEMC_NANDCR1_WEL_MASK                    (0xF00U)
-#define SEMC_NANDCR1_WEL_SHIFT                   (8U)
-#define SEMC_NANDCR1_WEL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEL_SHIFT)) & SEMC_NANDCR1_WEL_MASK)
-#define SEMC_NANDCR1_WEH_MASK                    (0xF000U)
-#define SEMC_NANDCR1_WEH_SHIFT                   (12U)
-#define SEMC_NANDCR1_WEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEH_SHIFT)) & SEMC_NANDCR1_WEH_MASK)
-#define SEMC_NANDCR1_REL_MASK                    (0xF0000U)
-#define SEMC_NANDCR1_REL_SHIFT                   (16U)
-#define SEMC_NANDCR1_REL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REL_SHIFT)) & SEMC_NANDCR1_REL_MASK)
-#define SEMC_NANDCR1_REH_MASK                    (0xF00000U)
-#define SEMC_NANDCR1_REH_SHIFT                   (20U)
-#define SEMC_NANDCR1_REH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REH_SHIFT)) & SEMC_NANDCR1_REH_MASK)
-#define SEMC_NANDCR1_TA_MASK                     (0xF000000U)
-#define SEMC_NANDCR1_TA_SHIFT                    (24U)
-#define SEMC_NANDCR1_TA(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_TA_SHIFT)) & SEMC_NANDCR1_TA_MASK)
-#define SEMC_NANDCR1_CEITV_MASK                  (0xF0000000U)
-#define SEMC_NANDCR1_CEITV_SHIFT                 (28U)
-#define SEMC_NANDCR1_CEITV(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEITV_SHIFT)) & SEMC_NANDCR1_CEITV_MASK)
+#define SEMC_NANDCR1_CES_MASK    (0xFU)
+#define SEMC_NANDCR1_CES_SHIFT   (0U)
+#define SEMC_NANDCR1_CES(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CES_SHIFT)) & SEMC_NANDCR1_CES_MASK)
+#define SEMC_NANDCR1_CEH_MASK    (0xF0U)
+#define SEMC_NANDCR1_CEH_SHIFT   (4U)
+#define SEMC_NANDCR1_CEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEH_SHIFT)) & SEMC_NANDCR1_CEH_MASK)
+#define SEMC_NANDCR1_WEL_MASK    (0xF00U)
+#define SEMC_NANDCR1_WEL_SHIFT   (8U)
+#define SEMC_NANDCR1_WEL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEL_SHIFT)) & SEMC_NANDCR1_WEL_MASK)
+#define SEMC_NANDCR1_WEH_MASK    (0xF000U)
+#define SEMC_NANDCR1_WEH_SHIFT   (12U)
+#define SEMC_NANDCR1_WEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEH_SHIFT)) & SEMC_NANDCR1_WEH_MASK)
+#define SEMC_NANDCR1_REL_MASK    (0xF0000U)
+#define SEMC_NANDCR1_REL_SHIFT   (16U)
+#define SEMC_NANDCR1_REL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REL_SHIFT)) & SEMC_NANDCR1_REL_MASK)
+#define SEMC_NANDCR1_REH_MASK    (0xF00000U)
+#define SEMC_NANDCR1_REH_SHIFT   (20U)
+#define SEMC_NANDCR1_REH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REH_SHIFT)) & SEMC_NANDCR1_REH_MASK)
+#define SEMC_NANDCR1_TA_MASK     (0xF000000U)
+#define SEMC_NANDCR1_TA_SHIFT    (24U)
+#define SEMC_NANDCR1_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_TA_SHIFT)) & SEMC_NANDCR1_TA_MASK)
+#define SEMC_NANDCR1_CEITV_MASK  (0xF0000000U)
+#define SEMC_NANDCR1_CEITV_SHIFT (28U)
+#define SEMC_NANDCR1_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEITV_SHIFT)) & SEMC_NANDCR1_CEITV_MASK)
 /*! @} */
 
 /*! @name NANDCR2 - NAND control register 2 */
 /*! @{ */
-#define SEMC_NANDCR2_TWHR_MASK                   (0x3FU)
-#define SEMC_NANDCR2_TWHR_SHIFT                  (0U)
-#define SEMC_NANDCR2_TWHR(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWHR_SHIFT)) & SEMC_NANDCR2_TWHR_MASK)
-#define SEMC_NANDCR2_TRHW_MASK                   (0xFC0U)
-#define SEMC_NANDCR2_TRHW_SHIFT                  (6U)
-#define SEMC_NANDCR2_TRHW(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRHW_SHIFT)) & SEMC_NANDCR2_TRHW_MASK)
-#define SEMC_NANDCR2_TADL_MASK                   (0x3F000U)
-#define SEMC_NANDCR2_TADL_SHIFT                  (12U)
-#define SEMC_NANDCR2_TADL(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TADL_SHIFT)) & SEMC_NANDCR2_TADL_MASK)
-#define SEMC_NANDCR2_TRR_MASK                    (0xFC0000U)
-#define SEMC_NANDCR2_TRR_SHIFT                   (18U)
-#define SEMC_NANDCR2_TRR(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRR_SHIFT)) & SEMC_NANDCR2_TRR_MASK)
-#define SEMC_NANDCR2_TWB_MASK                    (0x3F000000U)
-#define SEMC_NANDCR2_TWB_SHIFT                   (24U)
-#define SEMC_NANDCR2_TWB(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWB_SHIFT)) & SEMC_NANDCR2_TWB_MASK)
+#define SEMC_NANDCR2_TWHR_MASK  (0x3FU)
+#define SEMC_NANDCR2_TWHR_SHIFT (0U)
+#define SEMC_NANDCR2_TWHR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWHR_SHIFT)) & SEMC_NANDCR2_TWHR_MASK)
+#define SEMC_NANDCR2_TRHW_MASK  (0xFC0U)
+#define SEMC_NANDCR2_TRHW_SHIFT (6U)
+#define SEMC_NANDCR2_TRHW(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRHW_SHIFT)) & SEMC_NANDCR2_TRHW_MASK)
+#define SEMC_NANDCR2_TADL_MASK  (0x3F000U)
+#define SEMC_NANDCR2_TADL_SHIFT (12U)
+#define SEMC_NANDCR2_TADL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TADL_SHIFT)) & SEMC_NANDCR2_TADL_MASK)
+#define SEMC_NANDCR2_TRR_MASK   (0xFC0000U)
+#define SEMC_NANDCR2_TRR_SHIFT  (18U)
+#define SEMC_NANDCR2_TRR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRR_SHIFT)) & SEMC_NANDCR2_TRR_MASK)
+#define SEMC_NANDCR2_TWB_MASK   (0x3F000000U)
+#define SEMC_NANDCR2_TWB_SHIFT  (24U)
+#define SEMC_NANDCR2_TWB(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWB_SHIFT)) & SEMC_NANDCR2_TWB_MASK)
 /*! @} */
 
 /*! @name NANDCR3 - NAND control register 3 */
 /*! @{ */
-#define SEMC_NANDCR3_NDOPT1_MASK                 (0x1U)
-#define SEMC_NANDCR3_NDOPT1_SHIFT                (0U)
-#define SEMC_NANDCR3_NDOPT1(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT1_SHIFT)) & SEMC_NANDCR3_NDOPT1_MASK)
-#define SEMC_NANDCR3_NDOPT2_MASK                 (0x2U)
-#define SEMC_NANDCR3_NDOPT2_SHIFT                (1U)
-#define SEMC_NANDCR3_NDOPT2(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT2_SHIFT)) & SEMC_NANDCR3_NDOPT2_MASK)
-#define SEMC_NANDCR3_NDOPT3_MASK                 (0x4U)
-#define SEMC_NANDCR3_NDOPT3_SHIFT                (2U)
-#define SEMC_NANDCR3_NDOPT3(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT3_SHIFT)) & SEMC_NANDCR3_NDOPT3_MASK)
+#define SEMC_NANDCR3_NDOPT1_MASK  (0x1U)
+#define SEMC_NANDCR3_NDOPT1_SHIFT (0U)
+#define SEMC_NANDCR3_NDOPT1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT1_SHIFT)) & SEMC_NANDCR3_NDOPT1_MASK)
+#define SEMC_NANDCR3_NDOPT2_MASK  (0x2U)
+#define SEMC_NANDCR3_NDOPT2_SHIFT (1U)
+#define SEMC_NANDCR3_NDOPT2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT2_SHIFT)) & SEMC_NANDCR3_NDOPT2_MASK)
+#define SEMC_NANDCR3_NDOPT3_MASK  (0x4U)
+#define SEMC_NANDCR3_NDOPT3_SHIFT (2U)
+#define SEMC_NANDCR3_NDOPT3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT3_SHIFT)) & SEMC_NANDCR3_NDOPT3_MASK)
 /*! @} */
 
 /*! @name NORCR0 - NOR control register 0 */
 /*! @{ */
-#define SEMC_NORCR0_PS_MASK                      (0x1U)
-#define SEMC_NORCR0_PS_SHIFT                     (0U)
-#define SEMC_NORCR0_PS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_PS_SHIFT)) & SEMC_NORCR0_PS_MASK)
-#define SEMC_NORCR0_BL_MASK                      (0x70U)
-#define SEMC_NORCR0_BL_SHIFT                     (4U)
-#define SEMC_NORCR0_BL(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_BL_SHIFT)) & SEMC_NORCR0_BL_MASK)
-#define SEMC_NORCR0_AM_MASK                      (0x300U)
-#define SEMC_NORCR0_AM_SHIFT                     (8U)
-#define SEMC_NORCR0_AM(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_AM_SHIFT)) & SEMC_NORCR0_AM_MASK)
-#define SEMC_NORCR0_ADVP_MASK                    (0x400U)
-#define SEMC_NORCR0_ADVP_SHIFT                   (10U)
-#define SEMC_NORCR0_ADVP(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_ADVP_SHIFT)) & SEMC_NORCR0_ADVP_MASK)
-#define SEMC_NORCR0_COL_MASK                     (0xF000U)
-#define SEMC_NORCR0_COL_SHIFT                    (12U)
-#define SEMC_NORCR0_COL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_COL_SHIFT)) & SEMC_NORCR0_COL_MASK)
+#define SEMC_NORCR0_PS_MASK    (0x1U)
+#define SEMC_NORCR0_PS_SHIFT   (0U)
+#define SEMC_NORCR0_PS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_PS_SHIFT)) & SEMC_NORCR0_PS_MASK)
+#define SEMC_NORCR0_BL_MASK    (0x70U)
+#define SEMC_NORCR0_BL_SHIFT   (4U)
+#define SEMC_NORCR0_BL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_BL_SHIFT)) & SEMC_NORCR0_BL_MASK)
+#define SEMC_NORCR0_AM_MASK    (0x300U)
+#define SEMC_NORCR0_AM_SHIFT   (8U)
+#define SEMC_NORCR0_AM(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_AM_SHIFT)) & SEMC_NORCR0_AM_MASK)
+#define SEMC_NORCR0_ADVP_MASK  (0x400U)
+#define SEMC_NORCR0_ADVP_SHIFT (10U)
+#define SEMC_NORCR0_ADVP(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_ADVP_SHIFT)) & SEMC_NORCR0_ADVP_MASK)
+#define SEMC_NORCR0_COL_MASK   (0xF000U)
+#define SEMC_NORCR0_COL_SHIFT  (12U)
+#define SEMC_NORCR0_COL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_COL_SHIFT)) & SEMC_NORCR0_COL_MASK)
 /*! @} */
 
 /*! @name NORCR1 - NOR control register 1 */
 /*! @{ */
-#define SEMC_NORCR1_CES_MASK                     (0xFU)
-#define SEMC_NORCR1_CES_SHIFT                    (0U)
-#define SEMC_NORCR1_CES(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CES_SHIFT)) & SEMC_NORCR1_CES_MASK)
-#define SEMC_NORCR1_CEH_MASK                     (0xF0U)
-#define SEMC_NORCR1_CEH_SHIFT                    (4U)
-#define SEMC_NORCR1_CEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CEH_SHIFT)) & SEMC_NORCR1_CEH_MASK)
-#define SEMC_NORCR1_AS_MASK                      (0xF00U)
-#define SEMC_NORCR1_AS_SHIFT                     (8U)
-#define SEMC_NORCR1_AS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AS_SHIFT)) & SEMC_NORCR1_AS_MASK)
-#define SEMC_NORCR1_AH_MASK                      (0xF000U)
-#define SEMC_NORCR1_AH_SHIFT                     (12U)
-#define SEMC_NORCR1_AH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AH_SHIFT)) & SEMC_NORCR1_AH_MASK)
-#define SEMC_NORCR1_WEL_MASK                     (0xF0000U)
-#define SEMC_NORCR1_WEL_SHIFT                    (16U)
-#define SEMC_NORCR1_WEL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEL_SHIFT)) & SEMC_NORCR1_WEL_MASK)
-#define SEMC_NORCR1_WEH_MASK                     (0xF00000U)
-#define SEMC_NORCR1_WEH_SHIFT                    (20U)
-#define SEMC_NORCR1_WEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEH_SHIFT)) & SEMC_NORCR1_WEH_MASK)
-#define SEMC_NORCR1_REL_MASK                     (0xF000000U)
-#define SEMC_NORCR1_REL_SHIFT                    (24U)
-#define SEMC_NORCR1_REL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REL_SHIFT)) & SEMC_NORCR1_REL_MASK)
-#define SEMC_NORCR1_REH_MASK                     (0xF0000000U)
-#define SEMC_NORCR1_REH_SHIFT                    (28U)
-#define SEMC_NORCR1_REH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REH_SHIFT)) & SEMC_NORCR1_REH_MASK)
+#define SEMC_NORCR1_CES_MASK  (0xFU)
+#define SEMC_NORCR1_CES_SHIFT (0U)
+#define SEMC_NORCR1_CES(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CES_SHIFT)) & SEMC_NORCR1_CES_MASK)
+#define SEMC_NORCR1_CEH_MASK  (0xF0U)
+#define SEMC_NORCR1_CEH_SHIFT (4U)
+#define SEMC_NORCR1_CEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CEH_SHIFT)) & SEMC_NORCR1_CEH_MASK)
+#define SEMC_NORCR1_AS_MASK   (0xF00U)
+#define SEMC_NORCR1_AS_SHIFT  (8U)
+#define SEMC_NORCR1_AS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AS_SHIFT)) & SEMC_NORCR1_AS_MASK)
+#define SEMC_NORCR1_AH_MASK   (0xF000U)
+#define SEMC_NORCR1_AH_SHIFT  (12U)
+#define SEMC_NORCR1_AH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AH_SHIFT)) & SEMC_NORCR1_AH_MASK)
+#define SEMC_NORCR1_WEL_MASK  (0xF0000U)
+#define SEMC_NORCR1_WEL_SHIFT (16U)
+#define SEMC_NORCR1_WEL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEL_SHIFT)) & SEMC_NORCR1_WEL_MASK)
+#define SEMC_NORCR1_WEH_MASK  (0xF00000U)
+#define SEMC_NORCR1_WEH_SHIFT (20U)
+#define SEMC_NORCR1_WEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEH_SHIFT)) & SEMC_NORCR1_WEH_MASK)
+#define SEMC_NORCR1_REL_MASK  (0xF000000U)
+#define SEMC_NORCR1_REL_SHIFT (24U)
+#define SEMC_NORCR1_REL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REL_SHIFT)) & SEMC_NORCR1_REL_MASK)
+#define SEMC_NORCR1_REH_MASK  (0xF0000000U)
+#define SEMC_NORCR1_REH_SHIFT (28U)
+#define SEMC_NORCR1_REH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REH_SHIFT)) & SEMC_NORCR1_REH_MASK)
 /*! @} */
 
 /*! @name NORCR2 - NOR control register 2 */
 /*! @{ */
-#define SEMC_NORCR2_WDS_MASK                     (0xFU)
-#define SEMC_NORCR2_WDS_SHIFT                    (0U)
-#define SEMC_NORCR2_WDS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDS_SHIFT)) & SEMC_NORCR2_WDS_MASK)
-#define SEMC_NORCR2_WDH_MASK                     (0xF0U)
-#define SEMC_NORCR2_WDH_SHIFT                    (4U)
-#define SEMC_NORCR2_WDH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDH_SHIFT)) & SEMC_NORCR2_WDH_MASK)
-#define SEMC_NORCR2_TA_MASK                      (0xF00U)
-#define SEMC_NORCR2_TA_SHIFT                     (8U)
-#define SEMC_NORCR2_TA(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_TA_SHIFT)) & SEMC_NORCR2_TA_MASK)
-#define SEMC_NORCR2_AWDH_MASK                    (0xF000U)
-#define SEMC_NORCR2_AWDH_SHIFT                   (12U)
-#define SEMC_NORCR2_AWDH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_AWDH_SHIFT)) & SEMC_NORCR2_AWDH_MASK)
-#define SEMC_NORCR2_LC_MASK                      (0xF0000U)
-#define SEMC_NORCR2_LC_SHIFT                     (16U)
-#define SEMC_NORCR2_LC(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_LC_SHIFT)) & SEMC_NORCR2_LC_MASK)
-#define SEMC_NORCR2_RD_MASK                      (0xF00000U)
-#define SEMC_NORCR2_RD_SHIFT                     (20U)
-#define SEMC_NORCR2_RD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_RD_SHIFT)) & SEMC_NORCR2_RD_MASK)
-#define SEMC_NORCR2_CEITV_MASK                   (0xF000000U)
-#define SEMC_NORCR2_CEITV_SHIFT                  (24U)
-#define SEMC_NORCR2_CEITV(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_CEITV_SHIFT)) & SEMC_NORCR2_CEITV_MASK)
+#define SEMC_NORCR2_WDS_MASK    (0xFU)
+#define SEMC_NORCR2_WDS_SHIFT   (0U)
+#define SEMC_NORCR2_WDS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDS_SHIFT)) & SEMC_NORCR2_WDS_MASK)
+#define SEMC_NORCR2_WDH_MASK    (0xF0U)
+#define SEMC_NORCR2_WDH_SHIFT   (4U)
+#define SEMC_NORCR2_WDH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDH_SHIFT)) & SEMC_NORCR2_WDH_MASK)
+#define SEMC_NORCR2_TA_MASK     (0xF00U)
+#define SEMC_NORCR2_TA_SHIFT    (8U)
+#define SEMC_NORCR2_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_TA_SHIFT)) & SEMC_NORCR2_TA_MASK)
+#define SEMC_NORCR2_AWDH_MASK   (0xF000U)
+#define SEMC_NORCR2_AWDH_SHIFT  (12U)
+#define SEMC_NORCR2_AWDH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_AWDH_SHIFT)) & SEMC_NORCR2_AWDH_MASK)
+#define SEMC_NORCR2_LC_MASK     (0xF0000U)
+#define SEMC_NORCR2_LC_SHIFT    (16U)
+#define SEMC_NORCR2_LC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_LC_SHIFT)) & SEMC_NORCR2_LC_MASK)
+#define SEMC_NORCR2_RD_MASK     (0xF00000U)
+#define SEMC_NORCR2_RD_SHIFT    (20U)
+#define SEMC_NORCR2_RD(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_RD_SHIFT)) & SEMC_NORCR2_RD_MASK)
+#define SEMC_NORCR2_CEITV_MASK  (0xF000000U)
+#define SEMC_NORCR2_CEITV_SHIFT (24U)
+#define SEMC_NORCR2_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_CEITV_SHIFT)) & SEMC_NORCR2_CEITV_MASK)
 /*! @} */
 
 /*! @name SRAMCR0 - SRAM control register 0 */
 /*! @{ */
-#define SEMC_SRAMCR0_PS_MASK                     (0x1U)
-#define SEMC_SRAMCR0_PS_SHIFT                    (0U)
-#define SEMC_SRAMCR0_PS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_PS_SHIFT)) & SEMC_SRAMCR0_PS_MASK)
-#define SEMC_SRAMCR0_BL_MASK                     (0x70U)
-#define SEMC_SRAMCR0_BL_SHIFT                    (4U)
-#define SEMC_SRAMCR0_BL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_BL_SHIFT)) & SEMC_SRAMCR0_BL_MASK)
-#define SEMC_SRAMCR0_AM_MASK                     (0x300U)
-#define SEMC_SRAMCR0_AM_SHIFT                    (8U)
-#define SEMC_SRAMCR0_AM(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_AM_SHIFT)) & SEMC_SRAMCR0_AM_MASK)
-#define SEMC_SRAMCR0_ADVP_MASK                   (0x400U)
-#define SEMC_SRAMCR0_ADVP_SHIFT                  (10U)
-#define SEMC_SRAMCR0_ADVP(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_ADVP_SHIFT)) & SEMC_SRAMCR0_ADVP_MASK)
-#define SEMC_SRAMCR0_COL_MASK                    (0xF000U)
-#define SEMC_SRAMCR0_COL_SHIFT                   (12U)
-#define SEMC_SRAMCR0_COL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_COL_SHIFT)) & SEMC_SRAMCR0_COL_MASK)
+#define SEMC_SRAMCR0_PS_MASK    (0x1U)
+#define SEMC_SRAMCR0_PS_SHIFT   (0U)
+#define SEMC_SRAMCR0_PS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_PS_SHIFT)) & SEMC_SRAMCR0_PS_MASK)
+#define SEMC_SRAMCR0_BL_MASK    (0x70U)
+#define SEMC_SRAMCR0_BL_SHIFT   (4U)
+#define SEMC_SRAMCR0_BL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_BL_SHIFT)) & SEMC_SRAMCR0_BL_MASK)
+#define SEMC_SRAMCR0_AM_MASK    (0x300U)
+#define SEMC_SRAMCR0_AM_SHIFT   (8U)
+#define SEMC_SRAMCR0_AM(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_AM_SHIFT)) & SEMC_SRAMCR0_AM_MASK)
+#define SEMC_SRAMCR0_ADVP_MASK  (0x400U)
+#define SEMC_SRAMCR0_ADVP_SHIFT (10U)
+#define SEMC_SRAMCR0_ADVP(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_ADVP_SHIFT)) & SEMC_SRAMCR0_ADVP_MASK)
+#define SEMC_SRAMCR0_COL_MASK   (0xF000U)
+#define SEMC_SRAMCR0_COL_SHIFT  (12U)
+#define SEMC_SRAMCR0_COL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_COL_SHIFT)) & SEMC_SRAMCR0_COL_MASK)
 /*! @} */
 
 /*! @name SRAMCR1 - SRAM control register 1 */
 /*! @{ */
-#define SEMC_SRAMCR1_CES_MASK                    (0xFU)
-#define SEMC_SRAMCR1_CES_SHIFT                   (0U)
-#define SEMC_SRAMCR1_CES(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CES_SHIFT)) & SEMC_SRAMCR1_CES_MASK)
-#define SEMC_SRAMCR1_CEH_MASK                    (0xF0U)
-#define SEMC_SRAMCR1_CEH_SHIFT                   (4U)
-#define SEMC_SRAMCR1_CEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CEH_SHIFT)) & SEMC_SRAMCR1_CEH_MASK)
-#define SEMC_SRAMCR1_AS_MASK                     (0xF00U)
-#define SEMC_SRAMCR1_AS_SHIFT                    (8U)
-#define SEMC_SRAMCR1_AS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AS_SHIFT)) & SEMC_SRAMCR1_AS_MASK)
-#define SEMC_SRAMCR1_AH_MASK                     (0xF000U)
-#define SEMC_SRAMCR1_AH_SHIFT                    (12U)
-#define SEMC_SRAMCR1_AH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AH_SHIFT)) & SEMC_SRAMCR1_AH_MASK)
-#define SEMC_SRAMCR1_WEL_MASK                    (0xF0000U)
-#define SEMC_SRAMCR1_WEL_SHIFT                   (16U)
-#define SEMC_SRAMCR1_WEL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEL_SHIFT)) & SEMC_SRAMCR1_WEL_MASK)
-#define SEMC_SRAMCR1_WEH_MASK                    (0xF00000U)
-#define SEMC_SRAMCR1_WEH_SHIFT                   (20U)
-#define SEMC_SRAMCR1_WEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEH_SHIFT)) & SEMC_SRAMCR1_WEH_MASK)
-#define SEMC_SRAMCR1_REL_MASK                    (0xF000000U)
-#define SEMC_SRAMCR1_REL_SHIFT                   (24U)
-#define SEMC_SRAMCR1_REL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REL_SHIFT)) & SEMC_SRAMCR1_REL_MASK)
-#define SEMC_SRAMCR1_REH_MASK                    (0xF0000000U)
-#define SEMC_SRAMCR1_REH_SHIFT                   (28U)
-#define SEMC_SRAMCR1_REH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REH_SHIFT)) & SEMC_SRAMCR1_REH_MASK)
+#define SEMC_SRAMCR1_CES_MASK  (0xFU)
+#define SEMC_SRAMCR1_CES_SHIFT (0U)
+#define SEMC_SRAMCR1_CES(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CES_SHIFT)) & SEMC_SRAMCR1_CES_MASK)
+#define SEMC_SRAMCR1_CEH_MASK  (0xF0U)
+#define SEMC_SRAMCR1_CEH_SHIFT (4U)
+#define SEMC_SRAMCR1_CEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CEH_SHIFT)) & SEMC_SRAMCR1_CEH_MASK)
+#define SEMC_SRAMCR1_AS_MASK   (0xF00U)
+#define SEMC_SRAMCR1_AS_SHIFT  (8U)
+#define SEMC_SRAMCR1_AS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AS_SHIFT)) & SEMC_SRAMCR1_AS_MASK)
+#define SEMC_SRAMCR1_AH_MASK   (0xF000U)
+#define SEMC_SRAMCR1_AH_SHIFT  (12U)
+#define SEMC_SRAMCR1_AH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AH_SHIFT)) & SEMC_SRAMCR1_AH_MASK)
+#define SEMC_SRAMCR1_WEL_MASK  (0xF0000U)
+#define SEMC_SRAMCR1_WEL_SHIFT (16U)
+#define SEMC_SRAMCR1_WEL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEL_SHIFT)) & SEMC_SRAMCR1_WEL_MASK)
+#define SEMC_SRAMCR1_WEH_MASK  (0xF00000U)
+#define SEMC_SRAMCR1_WEH_SHIFT (20U)
+#define SEMC_SRAMCR1_WEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEH_SHIFT)) & SEMC_SRAMCR1_WEH_MASK)
+#define SEMC_SRAMCR1_REL_MASK  (0xF000000U)
+#define SEMC_SRAMCR1_REL_SHIFT (24U)
+#define SEMC_SRAMCR1_REL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REL_SHIFT)) & SEMC_SRAMCR1_REL_MASK)
+#define SEMC_SRAMCR1_REH_MASK  (0xF0000000U)
+#define SEMC_SRAMCR1_REH_SHIFT (28U)
+#define SEMC_SRAMCR1_REH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REH_SHIFT)) & SEMC_SRAMCR1_REH_MASK)
 /*! @} */
 
 /*! @name SRAMCR2 - SRAM control register 2 */
 /*! @{ */
-#define SEMC_SRAMCR2_WDS_MASK                    (0xFU)
-#define SEMC_SRAMCR2_WDS_SHIFT                   (0U)
-#define SEMC_SRAMCR2_WDS(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDS_SHIFT)) & SEMC_SRAMCR2_WDS_MASK)
-#define SEMC_SRAMCR2_WDH_MASK                    (0xF0U)
-#define SEMC_SRAMCR2_WDH_SHIFT                   (4U)
-#define SEMC_SRAMCR2_WDH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDH_SHIFT)) & SEMC_SRAMCR2_WDH_MASK)
-#define SEMC_SRAMCR2_TA_MASK                     (0xF00U)
-#define SEMC_SRAMCR2_TA_SHIFT                    (8U)
-#define SEMC_SRAMCR2_TA(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_TA_SHIFT)) & SEMC_SRAMCR2_TA_MASK)
-#define SEMC_SRAMCR2_AWDH_MASK                   (0xF000U)
-#define SEMC_SRAMCR2_AWDH_SHIFT                  (12U)
-#define SEMC_SRAMCR2_AWDH(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_AWDH_SHIFT)) & SEMC_SRAMCR2_AWDH_MASK)
-#define SEMC_SRAMCR2_LC_MASK                     (0xF0000U)
-#define SEMC_SRAMCR2_LC_SHIFT                    (16U)
-#define SEMC_SRAMCR2_LC(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_LC_SHIFT)) & SEMC_SRAMCR2_LC_MASK)
-#define SEMC_SRAMCR2_RD_MASK                     (0xF00000U)
-#define SEMC_SRAMCR2_RD_SHIFT                    (20U)
-#define SEMC_SRAMCR2_RD(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_RD_SHIFT)) & SEMC_SRAMCR2_RD_MASK)
-#define SEMC_SRAMCR2_CEITV_MASK                  (0xF000000U)
-#define SEMC_SRAMCR2_CEITV_SHIFT                 (24U)
-#define SEMC_SRAMCR2_CEITV(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_CEITV_SHIFT)) & SEMC_SRAMCR2_CEITV_MASK)
+#define SEMC_SRAMCR2_WDS_MASK    (0xFU)
+#define SEMC_SRAMCR2_WDS_SHIFT   (0U)
+#define SEMC_SRAMCR2_WDS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDS_SHIFT)) & SEMC_SRAMCR2_WDS_MASK)
+#define SEMC_SRAMCR2_WDH_MASK    (0xF0U)
+#define SEMC_SRAMCR2_WDH_SHIFT   (4U)
+#define SEMC_SRAMCR2_WDH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDH_SHIFT)) & SEMC_SRAMCR2_WDH_MASK)
+#define SEMC_SRAMCR2_TA_MASK     (0xF00U)
+#define SEMC_SRAMCR2_TA_SHIFT    (8U)
+#define SEMC_SRAMCR2_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_TA_SHIFT)) & SEMC_SRAMCR2_TA_MASK)
+#define SEMC_SRAMCR2_AWDH_MASK   (0xF000U)
+#define SEMC_SRAMCR2_AWDH_SHIFT  (12U)
+#define SEMC_SRAMCR2_AWDH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_AWDH_SHIFT)) & SEMC_SRAMCR2_AWDH_MASK)
+#define SEMC_SRAMCR2_LC_MASK     (0xF0000U)
+#define SEMC_SRAMCR2_LC_SHIFT    (16U)
+#define SEMC_SRAMCR2_LC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_LC_SHIFT)) & SEMC_SRAMCR2_LC_MASK)
+#define SEMC_SRAMCR2_RD_MASK     (0xF00000U)
+#define SEMC_SRAMCR2_RD_SHIFT    (20U)
+#define SEMC_SRAMCR2_RD(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_RD_SHIFT)) & SEMC_SRAMCR2_RD_MASK)
+#define SEMC_SRAMCR2_CEITV_MASK  (0xF000000U)
+#define SEMC_SRAMCR2_CEITV_SHIFT (24U)
+#define SEMC_SRAMCR2_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_CEITV_SHIFT)) & SEMC_SRAMCR2_CEITV_MASK)
 /*! @} */
 
 /*! @name DBICR0 - DBI-B control register 0 */
 /*! @{ */
-#define SEMC_DBICR0_PS_MASK                      (0x1U)
-#define SEMC_DBICR0_PS_SHIFT                     (0U)
-#define SEMC_DBICR0_PS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_PS_SHIFT)) & SEMC_DBICR0_PS_MASK)
-#define SEMC_DBICR0_BL_MASK                      (0x70U)
-#define SEMC_DBICR0_BL_SHIFT                     (4U)
-#define SEMC_DBICR0_BL(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_BL_SHIFT)) & SEMC_DBICR0_BL_MASK)
-#define SEMC_DBICR0_COL_MASK                     (0xF000U)
-#define SEMC_DBICR0_COL_SHIFT                    (12U)
-#define SEMC_DBICR0_COL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_COL_SHIFT)) & SEMC_DBICR0_COL_MASK)
+#define SEMC_DBICR0_PS_MASK   (0x1U)
+#define SEMC_DBICR0_PS_SHIFT  (0U)
+#define SEMC_DBICR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_PS_SHIFT)) & SEMC_DBICR0_PS_MASK)
+#define SEMC_DBICR0_BL_MASK   (0x70U)
+#define SEMC_DBICR0_BL_SHIFT  (4U)
+#define SEMC_DBICR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_BL_SHIFT)) & SEMC_DBICR0_BL_MASK)
+#define SEMC_DBICR0_COL_MASK  (0xF000U)
+#define SEMC_DBICR0_COL_SHIFT (12U)
+#define SEMC_DBICR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_COL_SHIFT)) & SEMC_DBICR0_COL_MASK)
 /*! @} */
 
 /*! @name DBICR1 - DBI-B control register 1 */
 /*! @{ */
-#define SEMC_DBICR1_CES_MASK                     (0xFU)
-#define SEMC_DBICR1_CES_SHIFT                    (0U)
-#define SEMC_DBICR1_CES(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CES_SHIFT)) & SEMC_DBICR1_CES_MASK)
-#define SEMC_DBICR1_CEH_MASK                     (0xF0U)
-#define SEMC_DBICR1_CEH_SHIFT                    (4U)
-#define SEMC_DBICR1_CEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEH_SHIFT)) & SEMC_DBICR1_CEH_MASK)
-#define SEMC_DBICR1_WEL_MASK                     (0xF00U)
-#define SEMC_DBICR1_WEL_SHIFT                    (8U)
-#define SEMC_DBICR1_WEL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEL_SHIFT)) & SEMC_DBICR1_WEL_MASK)
-#define SEMC_DBICR1_WEH_MASK                     (0xF000U)
-#define SEMC_DBICR1_WEH_SHIFT                    (12U)
-#define SEMC_DBICR1_WEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEH_SHIFT)) & SEMC_DBICR1_WEH_MASK)
-#define SEMC_DBICR1_REL_MASK                     (0xF0000U)
-#define SEMC_DBICR1_REL_SHIFT                    (16U)
-#define SEMC_DBICR1_REL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL_SHIFT)) & SEMC_DBICR1_REL_MASK)
-#define SEMC_DBICR1_REH_MASK                     (0xF00000U)
-#define SEMC_DBICR1_REH_SHIFT                    (20U)
-#define SEMC_DBICR1_REH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH_SHIFT)) & SEMC_DBICR1_REH_MASK)
-#define SEMC_DBICR1_CEITV_MASK                   (0xF000000U)
-#define SEMC_DBICR1_CEITV_SHIFT                  (24U)
-#define SEMC_DBICR1_CEITV(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEITV_SHIFT)) & SEMC_DBICR1_CEITV_MASK)
-#define SEMC_DBICR1_REL2_MASK                    (0x30000000U)
-#define SEMC_DBICR1_REL2_SHIFT                   (28U)
-#define SEMC_DBICR1_REL2(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL2_SHIFT)) & SEMC_DBICR1_REL2_MASK)
-#define SEMC_DBICR1_REH2_MASK                    (0xC0000000U)
-#define SEMC_DBICR1_REH2_SHIFT                   (30U)
-#define SEMC_DBICR1_REH2(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH2_SHIFT)) & SEMC_DBICR1_REH2_MASK)
+#define SEMC_DBICR1_CES_MASK    (0xFU)
+#define SEMC_DBICR1_CES_SHIFT   (0U)
+#define SEMC_DBICR1_CES(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CES_SHIFT)) & SEMC_DBICR1_CES_MASK)
+#define SEMC_DBICR1_CEH_MASK    (0xF0U)
+#define SEMC_DBICR1_CEH_SHIFT   (4U)
+#define SEMC_DBICR1_CEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEH_SHIFT)) & SEMC_DBICR1_CEH_MASK)
+#define SEMC_DBICR1_WEL_MASK    (0xF00U)
+#define SEMC_DBICR1_WEL_SHIFT   (8U)
+#define SEMC_DBICR1_WEL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEL_SHIFT)) & SEMC_DBICR1_WEL_MASK)
+#define SEMC_DBICR1_WEH_MASK    (0xF000U)
+#define SEMC_DBICR1_WEH_SHIFT   (12U)
+#define SEMC_DBICR1_WEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEH_SHIFT)) & SEMC_DBICR1_WEH_MASK)
+#define SEMC_DBICR1_REL_MASK    (0xF0000U)
+#define SEMC_DBICR1_REL_SHIFT   (16U)
+#define SEMC_DBICR1_REL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL_SHIFT)) & SEMC_DBICR1_REL_MASK)
+#define SEMC_DBICR1_REH_MASK    (0xF00000U)
+#define SEMC_DBICR1_REH_SHIFT   (20U)
+#define SEMC_DBICR1_REH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH_SHIFT)) & SEMC_DBICR1_REH_MASK)
+#define SEMC_DBICR1_CEITV_MASK  (0xF000000U)
+#define SEMC_DBICR1_CEITV_SHIFT (24U)
+#define SEMC_DBICR1_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEITV_SHIFT)) & SEMC_DBICR1_CEITV_MASK)
+#define SEMC_DBICR1_REL2_MASK   (0x30000000U)
+#define SEMC_DBICR1_REL2_SHIFT  (28U)
+#define SEMC_DBICR1_REL2(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL2_SHIFT)) & SEMC_DBICR1_REL2_MASK)
+#define SEMC_DBICR1_REH2_MASK   (0xC0000000U)
+#define SEMC_DBICR1_REH2_SHIFT  (30U)
+#define SEMC_DBICR1_REH2(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH2_SHIFT)) & SEMC_DBICR1_REH2_MASK)
 /*! @} */
 
 /*! @name IPCR0 - IP Command control register 0 */
 /*! @{ */
-#define SEMC_IPCR0_SA_MASK                       (0xFFFFFFFFU)
-#define SEMC_IPCR0_SA_SHIFT                      (0U)
-#define SEMC_IPCR0_SA(x)                         (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR0_SA_SHIFT)) & SEMC_IPCR0_SA_MASK)
+#define SEMC_IPCR0_SA_MASK  (0xFFFFFFFFU)
+#define SEMC_IPCR0_SA_SHIFT (0U)
+#define SEMC_IPCR0_SA(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR0_SA_SHIFT)) & SEMC_IPCR0_SA_MASK)
 /*! @} */
 
 /*! @name IPCR1 - IP Command control register 1 */
 /*! @{ */
-#define SEMC_IPCR1_DATSZ_MASK                    (0x7U)
-#define SEMC_IPCR1_DATSZ_SHIFT                   (0U)
-#define SEMC_IPCR1_DATSZ(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR1_DATSZ_SHIFT)) & SEMC_IPCR1_DATSZ_MASK)
+#define SEMC_IPCR1_DATSZ_MASK  (0x7U)
+#define SEMC_IPCR1_DATSZ_SHIFT (0U)
+#define SEMC_IPCR1_DATSZ(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR1_DATSZ_SHIFT)) & SEMC_IPCR1_DATSZ_MASK)
 /*! @} */
 
 /*! @name IPCR2 - IP Command control register 2 */
 /*! @{ */
-#define SEMC_IPCR2_BM0_MASK                      (0x1U)
-#define SEMC_IPCR2_BM0_SHIFT                     (0U)
-#define SEMC_IPCR2_BM0(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM0_SHIFT)) & SEMC_IPCR2_BM0_MASK)
-#define SEMC_IPCR2_BM1_MASK                      (0x2U)
-#define SEMC_IPCR2_BM1_SHIFT                     (1U)
-#define SEMC_IPCR2_BM1(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM1_SHIFT)) & SEMC_IPCR2_BM1_MASK)
-#define SEMC_IPCR2_BM2_MASK                      (0x4U)
-#define SEMC_IPCR2_BM2_SHIFT                     (2U)
-#define SEMC_IPCR2_BM2(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM2_SHIFT)) & SEMC_IPCR2_BM2_MASK)
-#define SEMC_IPCR2_BM3_MASK                      (0x8U)
-#define SEMC_IPCR2_BM3_SHIFT                     (3U)
-#define SEMC_IPCR2_BM3(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM3_SHIFT)) & SEMC_IPCR2_BM3_MASK)
+#define SEMC_IPCR2_BM0_MASK  (0x1U)
+#define SEMC_IPCR2_BM0_SHIFT (0U)
+#define SEMC_IPCR2_BM0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM0_SHIFT)) & SEMC_IPCR2_BM0_MASK)
+#define SEMC_IPCR2_BM1_MASK  (0x2U)
+#define SEMC_IPCR2_BM1_SHIFT (1U)
+#define SEMC_IPCR2_BM1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM1_SHIFT)) & SEMC_IPCR2_BM1_MASK)
+#define SEMC_IPCR2_BM2_MASK  (0x4U)
+#define SEMC_IPCR2_BM2_SHIFT (2U)
+#define SEMC_IPCR2_BM2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM2_SHIFT)) & SEMC_IPCR2_BM2_MASK)
+#define SEMC_IPCR2_BM3_MASK  (0x8U)
+#define SEMC_IPCR2_BM3_SHIFT (3U)
+#define SEMC_IPCR2_BM3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM3_SHIFT)) & SEMC_IPCR2_BM3_MASK)
 /*! @} */
 
 /*! @name IPCMD - IP Command register */
 /*! @{ */
-#define SEMC_IPCMD_CMD_MASK                      (0xFFFFU)
-#define SEMC_IPCMD_CMD_SHIFT                     (0U)
-#define SEMC_IPCMD_CMD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_CMD_SHIFT)) & SEMC_IPCMD_CMD_MASK)
-#define SEMC_IPCMD_KEY_MASK                      (0xFFFF0000U)
-#define SEMC_IPCMD_KEY_SHIFT                     (16U)
-#define SEMC_IPCMD_KEY(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_KEY_SHIFT)) & SEMC_IPCMD_KEY_MASK)
+#define SEMC_IPCMD_CMD_MASK  (0xFFFFU)
+#define SEMC_IPCMD_CMD_SHIFT (0U)
+#define SEMC_IPCMD_CMD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_CMD_SHIFT)) & SEMC_IPCMD_CMD_MASK)
+#define SEMC_IPCMD_KEY_MASK  (0xFFFF0000U)
+#define SEMC_IPCMD_KEY_SHIFT (16U)
+#define SEMC_IPCMD_KEY(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_KEY_SHIFT)) & SEMC_IPCMD_KEY_MASK)
 /*! @} */
 
 /*! @name IPTXDAT - TX DATA register (for IP Command) */
 /*! @{ */
-#define SEMC_IPTXDAT_DAT_MASK                    (0xFFFFFFFFU)
-#define SEMC_IPTXDAT_DAT_SHIFT                   (0U)
-#define SEMC_IPTXDAT_DAT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPTXDAT_DAT_SHIFT)) & SEMC_IPTXDAT_DAT_MASK)
+#define SEMC_IPTXDAT_DAT_MASK  (0xFFFFFFFFU)
+#define SEMC_IPTXDAT_DAT_SHIFT (0U)
+#define SEMC_IPTXDAT_DAT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPTXDAT_DAT_SHIFT)) & SEMC_IPTXDAT_DAT_MASK)
 /*! @} */
 
 /*! @name IPRXDAT - RX DATA register (for IP Command) */
 /*! @{ */
-#define SEMC_IPRXDAT_DAT_MASK                    (0xFFFFFFFFU)
-#define SEMC_IPRXDAT_DAT_SHIFT                   (0U)
-#define SEMC_IPRXDAT_DAT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPRXDAT_DAT_SHIFT)) & SEMC_IPRXDAT_DAT_MASK)
+#define SEMC_IPRXDAT_DAT_MASK  (0xFFFFFFFFU)
+#define SEMC_IPRXDAT_DAT_SHIFT (0U)
+#define SEMC_IPRXDAT_DAT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPRXDAT_DAT_SHIFT)) & SEMC_IPRXDAT_DAT_MASK)
 /*! @} */
 
 /*! @name STS0 - Status register 0 */
 /*! @{ */
-#define SEMC_STS0_IDLE_MASK                      (0x1U)
-#define SEMC_STS0_IDLE_SHIFT                     (0U)
-#define SEMC_STS0_IDLE(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_IDLE_SHIFT)) & SEMC_STS0_IDLE_MASK)
-#define SEMC_STS0_NARDY_MASK                     (0x2U)
-#define SEMC_STS0_NARDY_SHIFT                    (1U)
-#define SEMC_STS0_NARDY(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_NARDY_SHIFT)) & SEMC_STS0_NARDY_MASK)
+#define SEMC_STS0_IDLE_MASK   (0x1U)
+#define SEMC_STS0_IDLE_SHIFT  (0U)
+#define SEMC_STS0_IDLE(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_IDLE_SHIFT)) & SEMC_STS0_IDLE_MASK)
+#define SEMC_STS0_NARDY_MASK  (0x2U)
+#define SEMC_STS0_NARDY_SHIFT (1U)
+#define SEMC_STS0_NARDY(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_NARDY_SHIFT)) & SEMC_STS0_NARDY_MASK)
 /*! @} */
 
 /*! @name STS2 - Status register 2 */
 /*! @{ */
-#define SEMC_STS2_NDWRPEND_MASK                  (0x8U)
-#define SEMC_STS2_NDWRPEND_SHIFT                 (3U)
-#define SEMC_STS2_NDWRPEND(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_STS2_NDWRPEND_SHIFT)) & SEMC_STS2_NDWRPEND_MASK)
+#define SEMC_STS2_NDWRPEND_MASK  (0x8U)
+#define SEMC_STS2_NDWRPEND_SHIFT (3U)
+#define SEMC_STS2_NDWRPEND(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS2_NDWRPEND_SHIFT)) & SEMC_STS2_NDWRPEND_MASK)
 /*! @} */
 
 /*! @name STS12 - Status register 12 */
 /*! @{ */
-#define SEMC_STS12_NDADDR_MASK                   (0xFFFFFFFFU)
-#define SEMC_STS12_NDADDR_SHIFT                  (0U)
-#define SEMC_STS12_NDADDR(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_STS12_NDADDR_SHIFT)) & SEMC_STS12_NDADDR_MASK)
+#define SEMC_STS12_NDADDR_MASK  (0xFFFFFFFFU)
+#define SEMC_STS12_NDADDR_SHIFT (0U)
+#define SEMC_STS12_NDADDR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS12_NDADDR_SHIFT)) & SEMC_STS12_NDADDR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SEMC_Register_Masks */
 
-
 /* SEMC - Peripheral instance base addresses */
 /** Peripheral SEMC base address */
-#define SEMC_BASE                                (0x402F0000u)
+#define SEMC_BASE (0x402F0000u)
 /** Peripheral SEMC base pointer */
-#define SEMC                                     ((SEMC_Type *)SEMC_BASE)
+#define SEMC ((SEMC_Type *)SEMC_BASE)
 /** Array initializer of SEMC peripheral base addresses */
-#define SEMC_BASE_ADDRS                          { SEMC_BASE }
+#define SEMC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        SEMC_BASE                                                                                                      \
+    }
 /** Array initializer of SEMC peripheral base pointers */
-#define SEMC_BASE_PTRS                           { SEMC }
+#define SEMC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        SEMC                                                                                                           \
+    }
 /** Interrupt vectors for the SEMC peripheral type */
-#define SEMC_IRQS                                { SEMC_IRQn }
+#define SEMC_IRQS                                                                                                      \
+    {                                                                                                                  \
+        SEMC_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group SEMC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SNVS Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -19066,42 +21797,43 @@ typedef struct {
  */
 
 /** SNVS - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t HPLR;                              /**< SNVS_HP Lock Register, offset: 0x0 */
-  __IO uint32_t HPCOMR;                            /**< SNVS_HP Command Register, offset: 0x4 */
-  __IO uint32_t HPCR;                              /**< SNVS_HP Control Register, offset: 0x8 */
-  __IO uint32_t HPSICR;                            /**< SNVS_HP Security Interrupt Control Register, offset: 0xC */
-  __IO uint32_t HPSVCR;                            /**< SNVS_HP Security Violation Control Register, offset: 0x10 */
-  __IO uint32_t HPSR;                              /**< SNVS_HP Status Register, offset: 0x14 */
-  __IO uint32_t HPSVSR;                            /**< SNVS_HP Security Violation Status Register, offset: 0x18 */
-  __IO uint32_t HPHACIVR;                          /**< SNVS_HP High Assurance Counter IV Register, offset: 0x1C */
-  __I  uint32_t HPHACR;                            /**< SNVS_HP High Assurance Counter Register, offset: 0x20 */
-  __IO uint32_t HPRTCMR;                           /**< SNVS_HP Real Time Counter MSB Register, offset: 0x24 */
-  __IO uint32_t HPRTCLR;                           /**< SNVS_HP Real Time Counter LSB Register, offset: 0x28 */
-  __IO uint32_t HPTAMR;                            /**< SNVS_HP Time Alarm MSB Register, offset: 0x2C */
-  __IO uint32_t HPTALR;                            /**< SNVS_HP Time Alarm LSB Register, offset: 0x30 */
-  __IO uint32_t LPLR;                              /**< SNVS_LP Lock Register, offset: 0x34 */
-  __IO uint32_t LPCR;                              /**< SNVS_LP Control Register, offset: 0x38 */
-  __IO uint32_t LPMKCR;                            /**< SNVS_LP Master Key Control Register, offset: 0x3C */
-  __IO uint32_t LPSVCR;                            /**< SNVS_LP Security Violation Control Register, offset: 0x40 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t LPTDCR;                            /**< SNVS_LP Tamper Detectors Configuration Register, offset: 0x48 */
-  __IO uint32_t LPSR;                              /**< SNVS_LP Status Register, offset: 0x4C */
-  __IO uint32_t LPSRTCMR;                          /**< SNVS_LP Secure Real Time Counter MSB Register, offset: 0x50 */
-  __IO uint32_t LPSRTCLR;                          /**< SNVS_LP Secure Real Time Counter LSB Register, offset: 0x54 */
-  __IO uint32_t LPTAR;                             /**< SNVS_LP Time Alarm Register, offset: 0x58 */
-  __I  uint32_t LPSMCMR;                           /**< SNVS_LP Secure Monotonic Counter MSB Register, offset: 0x5C */
-  __I  uint32_t LPSMCLR;                           /**< SNVS_LP Secure Monotonic Counter LSB Register, offset: 0x60 */
-  __IO uint32_t LPPGDR;                            /**< SNVS_LP Power Glitch Detector Register, offset: 0x64 */
-  __IO uint32_t LPGPR0_LEGACY_ALIAS;               /**< SNVS_LP General Purpose Register 0 (legacy alias), offset: 0x68 */
-  __IO uint32_t LPZMKR[8];                         /**< SNVS_LP Zeroizable Master Key Register, array offset: 0x6C, array step: 0x4 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t LPGPR_ALIAS[4];                    /**< SNVS_LP General Purpose Registers 0 .. 3, array offset: 0x90, array step: 0x4 */
-       uint8_t RESERVED_2[96];
-  __IO uint32_t LPGPR[8];                          /**< SNVS_LP General Purpose Registers 0 .. 7, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_3[2776];
-  __I  uint32_t HPVIDR1;                           /**< SNVS_HP Version ID Register 1, offset: 0xBF8 */
-  __I  uint32_t HPVIDR2;                           /**< SNVS_HP Version ID Register 2, offset: 0xBFC */
+typedef struct
+{
+    __IO uint32_t HPLR;     /**< SNVS_HP Lock Register, offset: 0x0 */
+    __IO uint32_t HPCOMR;   /**< SNVS_HP Command Register, offset: 0x4 */
+    __IO uint32_t HPCR;     /**< SNVS_HP Control Register, offset: 0x8 */
+    __IO uint32_t HPSICR;   /**< SNVS_HP Security Interrupt Control Register, offset: 0xC */
+    __IO uint32_t HPSVCR;   /**< SNVS_HP Security Violation Control Register, offset: 0x10 */
+    __IO uint32_t HPSR;     /**< SNVS_HP Status Register, offset: 0x14 */
+    __IO uint32_t HPSVSR;   /**< SNVS_HP Security Violation Status Register, offset: 0x18 */
+    __IO uint32_t HPHACIVR; /**< SNVS_HP High Assurance Counter IV Register, offset: 0x1C */
+    __I uint32_t HPHACR;    /**< SNVS_HP High Assurance Counter Register, offset: 0x20 */
+    __IO uint32_t HPRTCMR;  /**< SNVS_HP Real Time Counter MSB Register, offset: 0x24 */
+    __IO uint32_t HPRTCLR;  /**< SNVS_HP Real Time Counter LSB Register, offset: 0x28 */
+    __IO uint32_t HPTAMR;   /**< SNVS_HP Time Alarm MSB Register, offset: 0x2C */
+    __IO uint32_t HPTALR;   /**< SNVS_HP Time Alarm LSB Register, offset: 0x30 */
+    __IO uint32_t LPLR;     /**< SNVS_LP Lock Register, offset: 0x34 */
+    __IO uint32_t LPCR;     /**< SNVS_LP Control Register, offset: 0x38 */
+    __IO uint32_t LPMKCR;   /**< SNVS_LP Master Key Control Register, offset: 0x3C */
+    __IO uint32_t LPSVCR;   /**< SNVS_LP Security Violation Control Register, offset: 0x40 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t LPTDCR;              /**< SNVS_LP Tamper Detectors Configuration Register, offset: 0x48 */
+    __IO uint32_t LPSR;                /**< SNVS_LP Status Register, offset: 0x4C */
+    __IO uint32_t LPSRTCMR;            /**< SNVS_LP Secure Real Time Counter MSB Register, offset: 0x50 */
+    __IO uint32_t LPSRTCLR;            /**< SNVS_LP Secure Real Time Counter LSB Register, offset: 0x54 */
+    __IO uint32_t LPTAR;               /**< SNVS_LP Time Alarm Register, offset: 0x58 */
+    __I uint32_t LPSMCMR;              /**< SNVS_LP Secure Monotonic Counter MSB Register, offset: 0x5C */
+    __I uint32_t LPSMCLR;              /**< SNVS_LP Secure Monotonic Counter LSB Register, offset: 0x60 */
+    __IO uint32_t LPPGDR;              /**< SNVS_LP Power Glitch Detector Register, offset: 0x64 */
+    __IO uint32_t LPGPR0_LEGACY_ALIAS; /**< SNVS_LP General Purpose Register 0 (legacy alias), offset: 0x68 */
+    __IO uint32_t LPZMKR[8]; /**< SNVS_LP Zeroizable Master Key Register, array offset: 0x6C, array step: 0x4 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t LPGPR_ALIAS[4]; /**< SNVS_LP General Purpose Registers 0 .. 3, array offset: 0x90, array step: 0x4 */
+    uint8_t RESERVED_2[96];
+    __IO uint32_t LPGPR[8]; /**< SNVS_LP General Purpose Registers 0 .. 7, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_3[2776];
+    __I uint32_t HPVIDR1; /**< SNVS_HP Version ID Register 1, offset: 0xBF8 */
+    __I uint32_t HPVIDR2; /**< SNVS_HP Version ID Register 2, offset: 0xBFC */
 } SNVS_Type;
 
 /* ----------------------------------------------------------------------------
@@ -19115,615 +21847,668 @@ typedef struct {
 
 /*! @name HPLR - SNVS_HP Lock Register */
 /*! @{ */
-#define SNVS_HPLR_ZMK_WSL_MASK                   (0x1U)
-#define SNVS_HPLR_ZMK_WSL_SHIFT                  (0U)
-#define SNVS_HPLR_ZMK_WSL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_WSL_SHIFT)) & SNVS_HPLR_ZMK_WSL_MASK)
-#define SNVS_HPLR_ZMK_RSL_MASK                   (0x2U)
-#define SNVS_HPLR_ZMK_RSL_SHIFT                  (1U)
-#define SNVS_HPLR_ZMK_RSL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_RSL_SHIFT)) & SNVS_HPLR_ZMK_RSL_MASK)
-#define SNVS_HPLR_SRTC_SL_MASK                   (0x4U)
-#define SNVS_HPLR_SRTC_SL_SHIFT                  (2U)
-#define SNVS_HPLR_SRTC_SL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_SRTC_SL_SHIFT)) & SNVS_HPLR_SRTC_SL_MASK)
-#define SNVS_HPLR_LPCALB_SL_MASK                 (0x8U)
-#define SNVS_HPLR_LPCALB_SL_SHIFT                (3U)
-#define SNVS_HPLR_LPCALB_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPCALB_SL_SHIFT)) & SNVS_HPLR_LPCALB_SL_MASK)
-#define SNVS_HPLR_MC_SL_MASK                     (0x10U)
-#define SNVS_HPLR_MC_SL_SHIFT                    (4U)
-#define SNVS_HPLR_MC_SL(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MC_SL_SHIFT)) & SNVS_HPLR_MC_SL_MASK)
-#define SNVS_HPLR_GPR_SL_MASK                    (0x20U)
-#define SNVS_HPLR_GPR_SL_SHIFT                   (5U)
-#define SNVS_HPLR_GPR_SL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_GPR_SL_SHIFT)) & SNVS_HPLR_GPR_SL_MASK)
-#define SNVS_HPLR_LPSVCR_SL_MASK                 (0x40U)
-#define SNVS_HPLR_LPSVCR_SL_SHIFT                (6U)
-#define SNVS_HPLR_LPSVCR_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPSVCR_SL_SHIFT)) & SNVS_HPLR_LPSVCR_SL_MASK)
-#define SNVS_HPLR_LPTDCR_SL_MASK                 (0x100U)
-#define SNVS_HPLR_LPTDCR_SL_SHIFT                (8U)
-#define SNVS_HPLR_LPTDCR_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPTDCR_SL_SHIFT)) & SNVS_HPLR_LPTDCR_SL_MASK)
-#define SNVS_HPLR_MKS_SL_MASK                    (0x200U)
-#define SNVS_HPLR_MKS_SL_SHIFT                   (9U)
-#define SNVS_HPLR_MKS_SL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MKS_SL_SHIFT)) & SNVS_HPLR_MKS_SL_MASK)
-#define SNVS_HPLR_HPSVCR_L_MASK                  (0x10000U)
-#define SNVS_HPLR_HPSVCR_L_SHIFT                 (16U)
-#define SNVS_HPLR_HPSVCR_L(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSVCR_L_SHIFT)) & SNVS_HPLR_HPSVCR_L_MASK)
-#define SNVS_HPLR_HPSICR_L_MASK                  (0x20000U)
-#define SNVS_HPLR_HPSICR_L_SHIFT                 (17U)
-#define SNVS_HPLR_HPSICR_L(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSICR_L_SHIFT)) & SNVS_HPLR_HPSICR_L_MASK)
-#define SNVS_HPLR_HAC_L_MASK                     (0x40000U)
-#define SNVS_HPLR_HAC_L_SHIFT                    (18U)
-#define SNVS_HPLR_HAC_L(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HAC_L_SHIFT)) & SNVS_HPLR_HAC_L_MASK)
+#define SNVS_HPLR_ZMK_WSL_MASK    (0x1U)
+#define SNVS_HPLR_ZMK_WSL_SHIFT   (0U)
+#define SNVS_HPLR_ZMK_WSL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_WSL_SHIFT)) & SNVS_HPLR_ZMK_WSL_MASK)
+#define SNVS_HPLR_ZMK_RSL_MASK    (0x2U)
+#define SNVS_HPLR_ZMK_RSL_SHIFT   (1U)
+#define SNVS_HPLR_ZMK_RSL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_RSL_SHIFT)) & SNVS_HPLR_ZMK_RSL_MASK)
+#define SNVS_HPLR_SRTC_SL_MASK    (0x4U)
+#define SNVS_HPLR_SRTC_SL_SHIFT   (2U)
+#define SNVS_HPLR_SRTC_SL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_SRTC_SL_SHIFT)) & SNVS_HPLR_SRTC_SL_MASK)
+#define SNVS_HPLR_LPCALB_SL_MASK  (0x8U)
+#define SNVS_HPLR_LPCALB_SL_SHIFT (3U)
+#define SNVS_HPLR_LPCALB_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPCALB_SL_SHIFT)) & SNVS_HPLR_LPCALB_SL_MASK)
+#define SNVS_HPLR_MC_SL_MASK      (0x10U)
+#define SNVS_HPLR_MC_SL_SHIFT     (4U)
+#define SNVS_HPLR_MC_SL(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MC_SL_SHIFT)) & SNVS_HPLR_MC_SL_MASK)
+#define SNVS_HPLR_GPR_SL_MASK     (0x20U)
+#define SNVS_HPLR_GPR_SL_SHIFT    (5U)
+#define SNVS_HPLR_GPR_SL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_GPR_SL_SHIFT)) & SNVS_HPLR_GPR_SL_MASK)
+#define SNVS_HPLR_LPSVCR_SL_MASK  (0x40U)
+#define SNVS_HPLR_LPSVCR_SL_SHIFT (6U)
+#define SNVS_HPLR_LPSVCR_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPSVCR_SL_SHIFT)) & SNVS_HPLR_LPSVCR_SL_MASK)
+#define SNVS_HPLR_LPTDCR_SL_MASK  (0x100U)
+#define SNVS_HPLR_LPTDCR_SL_SHIFT (8U)
+#define SNVS_HPLR_LPTDCR_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPTDCR_SL_SHIFT)) & SNVS_HPLR_LPTDCR_SL_MASK)
+#define SNVS_HPLR_MKS_SL_MASK     (0x200U)
+#define SNVS_HPLR_MKS_SL_SHIFT    (9U)
+#define SNVS_HPLR_MKS_SL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MKS_SL_SHIFT)) & SNVS_HPLR_MKS_SL_MASK)
+#define SNVS_HPLR_HPSVCR_L_MASK   (0x10000U)
+#define SNVS_HPLR_HPSVCR_L_SHIFT  (16U)
+#define SNVS_HPLR_HPSVCR_L(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSVCR_L_SHIFT)) & SNVS_HPLR_HPSVCR_L_MASK)
+#define SNVS_HPLR_HPSICR_L_MASK   (0x20000U)
+#define SNVS_HPLR_HPSICR_L_SHIFT  (17U)
+#define SNVS_HPLR_HPSICR_L(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSICR_L_SHIFT)) & SNVS_HPLR_HPSICR_L_MASK)
+#define SNVS_HPLR_HAC_L_MASK      (0x40000U)
+#define SNVS_HPLR_HAC_L_SHIFT     (18U)
+#define SNVS_HPLR_HAC_L(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HAC_L_SHIFT)) & SNVS_HPLR_HAC_L_MASK)
 /*! @} */
 
 /*! @name HPCOMR - SNVS_HP Command Register */
 /*! @{ */
-#define SNVS_HPCOMR_SSM_ST_MASK                  (0x1U)
-#define SNVS_HPCOMR_SSM_ST_SHIFT                 (0U)
-#define SNVS_HPCOMR_SSM_ST(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_SHIFT)) & SNVS_HPCOMR_SSM_ST_MASK)
-#define SNVS_HPCOMR_SSM_ST_DIS_MASK              (0x2U)
-#define SNVS_HPCOMR_SSM_ST_DIS_SHIFT             (1U)
-#define SNVS_HPCOMR_SSM_ST_DIS(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_DIS_SHIFT)) & SNVS_HPCOMR_SSM_ST_DIS_MASK)
-#define SNVS_HPCOMR_SSM_SFNS_DIS_MASK            (0x4U)
-#define SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT           (2U)
-#define SNVS_HPCOMR_SSM_SFNS_DIS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT)) & SNVS_HPCOMR_SSM_SFNS_DIS_MASK)
-#define SNVS_HPCOMR_LP_SWR_MASK                  (0x10U)
-#define SNVS_HPCOMR_LP_SWR_SHIFT                 (4U)
-#define SNVS_HPCOMR_LP_SWR(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_SHIFT)) & SNVS_HPCOMR_LP_SWR_MASK)
-#define SNVS_HPCOMR_LP_SWR_DIS_MASK              (0x20U)
-#define SNVS_HPCOMR_LP_SWR_DIS_SHIFT             (5U)
-#define SNVS_HPCOMR_LP_SWR_DIS(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_DIS_SHIFT)) & SNVS_HPCOMR_LP_SWR_DIS_MASK)
-#define SNVS_HPCOMR_SW_SV_MASK                   (0x100U)
-#define SNVS_HPCOMR_SW_SV_SHIFT                  (8U)
-#define SNVS_HPCOMR_SW_SV(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_SV_SHIFT)) & SNVS_HPCOMR_SW_SV_MASK)
-#define SNVS_HPCOMR_SW_FSV_MASK                  (0x200U)
-#define SNVS_HPCOMR_SW_FSV_SHIFT                 (9U)
-#define SNVS_HPCOMR_SW_FSV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_FSV_SHIFT)) & SNVS_HPCOMR_SW_FSV_MASK)
-#define SNVS_HPCOMR_SW_LPSV_MASK                 (0x400U)
-#define SNVS_HPCOMR_SW_LPSV_SHIFT                (10U)
-#define SNVS_HPCOMR_SW_LPSV(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_LPSV_SHIFT)) & SNVS_HPCOMR_SW_LPSV_MASK)
-#define SNVS_HPCOMR_PROG_ZMK_MASK                (0x1000U)
-#define SNVS_HPCOMR_PROG_ZMK_SHIFT               (12U)
-#define SNVS_HPCOMR_PROG_ZMK(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_PROG_ZMK_SHIFT)) & SNVS_HPCOMR_PROG_ZMK_MASK)
-#define SNVS_HPCOMR_MKS_EN_MASK                  (0x2000U)
-#define SNVS_HPCOMR_MKS_EN_SHIFT                 (13U)
-#define SNVS_HPCOMR_MKS_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_MKS_EN_SHIFT)) & SNVS_HPCOMR_MKS_EN_MASK)
-#define SNVS_HPCOMR_HAC_EN_MASK                  (0x10000U)
-#define SNVS_HPCOMR_HAC_EN_SHIFT                 (16U)
-#define SNVS_HPCOMR_HAC_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_EN_SHIFT)) & SNVS_HPCOMR_HAC_EN_MASK)
-#define SNVS_HPCOMR_HAC_LOAD_MASK                (0x20000U)
-#define SNVS_HPCOMR_HAC_LOAD_SHIFT               (17U)
-#define SNVS_HPCOMR_HAC_LOAD(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_LOAD_SHIFT)) & SNVS_HPCOMR_HAC_LOAD_MASK)
-#define SNVS_HPCOMR_HAC_CLEAR_MASK               (0x40000U)
-#define SNVS_HPCOMR_HAC_CLEAR_SHIFT              (18U)
-#define SNVS_HPCOMR_HAC_CLEAR(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_CLEAR_SHIFT)) & SNVS_HPCOMR_HAC_CLEAR_MASK)
-#define SNVS_HPCOMR_HAC_STOP_MASK                (0x80000U)
-#define SNVS_HPCOMR_HAC_STOP_SHIFT               (19U)
-#define SNVS_HPCOMR_HAC_STOP(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_STOP_SHIFT)) & SNVS_HPCOMR_HAC_STOP_MASK)
-#define SNVS_HPCOMR_NPSWA_EN_MASK                (0x80000000U)
-#define SNVS_HPCOMR_NPSWA_EN_SHIFT               (31U)
-#define SNVS_HPCOMR_NPSWA_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_NPSWA_EN_SHIFT)) & SNVS_HPCOMR_NPSWA_EN_MASK)
+#define SNVS_HPCOMR_SSM_ST_MASK      (0x1U)
+#define SNVS_HPCOMR_SSM_ST_SHIFT     (0U)
+#define SNVS_HPCOMR_SSM_ST(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_SHIFT)) & SNVS_HPCOMR_SSM_ST_MASK)
+#define SNVS_HPCOMR_SSM_ST_DIS_MASK  (0x2U)
+#define SNVS_HPCOMR_SSM_ST_DIS_SHIFT (1U)
+#define SNVS_HPCOMR_SSM_ST_DIS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_DIS_SHIFT)) & SNVS_HPCOMR_SSM_ST_DIS_MASK)
+#define SNVS_HPCOMR_SSM_SFNS_DIS_MASK  (0x4U)
+#define SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT (2U)
+#define SNVS_HPCOMR_SSM_SFNS_DIS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT)) & SNVS_HPCOMR_SSM_SFNS_DIS_MASK)
+#define SNVS_HPCOMR_LP_SWR_MASK      (0x10U)
+#define SNVS_HPCOMR_LP_SWR_SHIFT     (4U)
+#define SNVS_HPCOMR_LP_SWR(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_SHIFT)) & SNVS_HPCOMR_LP_SWR_MASK)
+#define SNVS_HPCOMR_LP_SWR_DIS_MASK  (0x20U)
+#define SNVS_HPCOMR_LP_SWR_DIS_SHIFT (5U)
+#define SNVS_HPCOMR_LP_SWR_DIS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_DIS_SHIFT)) & SNVS_HPCOMR_LP_SWR_DIS_MASK)
+#define SNVS_HPCOMR_SW_SV_MASK     (0x100U)
+#define SNVS_HPCOMR_SW_SV_SHIFT    (8U)
+#define SNVS_HPCOMR_SW_SV(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_SV_SHIFT)) & SNVS_HPCOMR_SW_SV_MASK)
+#define SNVS_HPCOMR_SW_FSV_MASK    (0x200U)
+#define SNVS_HPCOMR_SW_FSV_SHIFT   (9U)
+#define SNVS_HPCOMR_SW_FSV(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_FSV_SHIFT)) & SNVS_HPCOMR_SW_FSV_MASK)
+#define SNVS_HPCOMR_SW_LPSV_MASK   (0x400U)
+#define SNVS_HPCOMR_SW_LPSV_SHIFT  (10U)
+#define SNVS_HPCOMR_SW_LPSV(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_LPSV_SHIFT)) & SNVS_HPCOMR_SW_LPSV_MASK)
+#define SNVS_HPCOMR_PROG_ZMK_MASK  (0x1000U)
+#define SNVS_HPCOMR_PROG_ZMK_SHIFT (12U)
+#define SNVS_HPCOMR_PROG_ZMK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_PROG_ZMK_SHIFT)) & SNVS_HPCOMR_PROG_ZMK_MASK)
+#define SNVS_HPCOMR_MKS_EN_MASK    (0x2000U)
+#define SNVS_HPCOMR_MKS_EN_SHIFT   (13U)
+#define SNVS_HPCOMR_MKS_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_MKS_EN_SHIFT)) & SNVS_HPCOMR_MKS_EN_MASK)
+#define SNVS_HPCOMR_HAC_EN_MASK    (0x10000U)
+#define SNVS_HPCOMR_HAC_EN_SHIFT   (16U)
+#define SNVS_HPCOMR_HAC_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_EN_SHIFT)) & SNVS_HPCOMR_HAC_EN_MASK)
+#define SNVS_HPCOMR_HAC_LOAD_MASK  (0x20000U)
+#define SNVS_HPCOMR_HAC_LOAD_SHIFT (17U)
+#define SNVS_HPCOMR_HAC_LOAD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_LOAD_SHIFT)) & SNVS_HPCOMR_HAC_LOAD_MASK)
+#define SNVS_HPCOMR_HAC_CLEAR_MASK  (0x40000U)
+#define SNVS_HPCOMR_HAC_CLEAR_SHIFT (18U)
+#define SNVS_HPCOMR_HAC_CLEAR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_CLEAR_SHIFT)) & SNVS_HPCOMR_HAC_CLEAR_MASK)
+#define SNVS_HPCOMR_HAC_STOP_MASK  (0x80000U)
+#define SNVS_HPCOMR_HAC_STOP_SHIFT (19U)
+#define SNVS_HPCOMR_HAC_STOP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_STOP_SHIFT)) & SNVS_HPCOMR_HAC_STOP_MASK)
+#define SNVS_HPCOMR_NPSWA_EN_MASK  (0x80000000U)
+#define SNVS_HPCOMR_NPSWA_EN_SHIFT (31U)
+#define SNVS_HPCOMR_NPSWA_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_NPSWA_EN_SHIFT)) & SNVS_HPCOMR_NPSWA_EN_MASK)
 /*! @} */
 
 /*! @name HPCR - SNVS_HP Control Register */
 /*! @{ */
-#define SNVS_HPCR_RTC_EN_MASK                    (0x1U)
-#define SNVS_HPCR_RTC_EN_SHIFT                   (0U)
-#define SNVS_HPCR_RTC_EN(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_RTC_EN_SHIFT)) & SNVS_HPCR_RTC_EN_MASK)
-#define SNVS_HPCR_HPTA_EN_MASK                   (0x2U)
-#define SNVS_HPCR_HPTA_EN_SHIFT                  (1U)
-#define SNVS_HPCR_HPTA_EN(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPTA_EN_SHIFT)) & SNVS_HPCR_HPTA_EN_MASK)
-#define SNVS_HPCR_DIS_PI_MASK                    (0x4U)
-#define SNVS_HPCR_DIS_PI_SHIFT                   (2U)
-#define SNVS_HPCR_DIS_PI(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_DIS_PI_SHIFT)) & SNVS_HPCR_DIS_PI_MASK)
-#define SNVS_HPCR_PI_EN_MASK                     (0x8U)
-#define SNVS_HPCR_PI_EN_SHIFT                    (3U)
-#define SNVS_HPCR_PI_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_EN_SHIFT)) & SNVS_HPCR_PI_EN_MASK)
-#define SNVS_HPCR_PI_FREQ_MASK                   (0xF0U)
-#define SNVS_HPCR_PI_FREQ_SHIFT                  (4U)
-#define SNVS_HPCR_PI_FREQ(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_FREQ_SHIFT)) & SNVS_HPCR_PI_FREQ_MASK)
-#define SNVS_HPCR_HPCALB_EN_MASK                 (0x100U)
-#define SNVS_HPCR_HPCALB_EN_SHIFT                (8U)
-#define SNVS_HPCR_HPCALB_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_EN_SHIFT)) & SNVS_HPCR_HPCALB_EN_MASK)
-#define SNVS_HPCR_HPCALB_VAL_MASK                (0x7C00U)
-#define SNVS_HPCR_HPCALB_VAL_SHIFT               (10U)
-#define SNVS_HPCR_HPCALB_VAL(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_VAL_SHIFT)) & SNVS_HPCR_HPCALB_VAL_MASK)
-#define SNVS_HPCR_HP_TS_MASK                     (0x10000U)
-#define SNVS_HPCR_HP_TS_SHIFT                    (16U)
-#define SNVS_HPCR_HP_TS(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HP_TS_SHIFT)) & SNVS_HPCR_HP_TS_MASK)
-#define SNVS_HPCR_BTN_CONFIG_MASK                (0x7000000U)
-#define SNVS_HPCR_BTN_CONFIG_SHIFT               (24U)
-#define SNVS_HPCR_BTN_CONFIG(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_CONFIG_SHIFT)) & SNVS_HPCR_BTN_CONFIG_MASK)
-#define SNVS_HPCR_BTN_MASK_MASK                  (0x8000000U)
-#define SNVS_HPCR_BTN_MASK_SHIFT                 (27U)
-#define SNVS_HPCR_BTN_MASK(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_MASK_SHIFT)) & SNVS_HPCR_BTN_MASK_MASK)
+#define SNVS_HPCR_RTC_EN_MASK      (0x1U)
+#define SNVS_HPCR_RTC_EN_SHIFT     (0U)
+#define SNVS_HPCR_RTC_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_RTC_EN_SHIFT)) & SNVS_HPCR_RTC_EN_MASK)
+#define SNVS_HPCR_HPTA_EN_MASK     (0x2U)
+#define SNVS_HPCR_HPTA_EN_SHIFT    (1U)
+#define SNVS_HPCR_HPTA_EN(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPTA_EN_SHIFT)) & SNVS_HPCR_HPTA_EN_MASK)
+#define SNVS_HPCR_DIS_PI_MASK      (0x4U)
+#define SNVS_HPCR_DIS_PI_SHIFT     (2U)
+#define SNVS_HPCR_DIS_PI(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_DIS_PI_SHIFT)) & SNVS_HPCR_DIS_PI_MASK)
+#define SNVS_HPCR_PI_EN_MASK       (0x8U)
+#define SNVS_HPCR_PI_EN_SHIFT      (3U)
+#define SNVS_HPCR_PI_EN(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_EN_SHIFT)) & SNVS_HPCR_PI_EN_MASK)
+#define SNVS_HPCR_PI_FREQ_MASK     (0xF0U)
+#define SNVS_HPCR_PI_FREQ_SHIFT    (4U)
+#define SNVS_HPCR_PI_FREQ(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_FREQ_SHIFT)) & SNVS_HPCR_PI_FREQ_MASK)
+#define SNVS_HPCR_HPCALB_EN_MASK   (0x100U)
+#define SNVS_HPCR_HPCALB_EN_SHIFT  (8U)
+#define SNVS_HPCR_HPCALB_EN(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_EN_SHIFT)) & SNVS_HPCR_HPCALB_EN_MASK)
+#define SNVS_HPCR_HPCALB_VAL_MASK  (0x7C00U)
+#define SNVS_HPCR_HPCALB_VAL_SHIFT (10U)
+#define SNVS_HPCR_HPCALB_VAL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_VAL_SHIFT)) & SNVS_HPCR_HPCALB_VAL_MASK)
+#define SNVS_HPCR_HP_TS_MASK       (0x10000U)
+#define SNVS_HPCR_HP_TS_SHIFT      (16U)
+#define SNVS_HPCR_HP_TS(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HP_TS_SHIFT)) & SNVS_HPCR_HP_TS_MASK)
+#define SNVS_HPCR_BTN_CONFIG_MASK  (0x7000000U)
+#define SNVS_HPCR_BTN_CONFIG_SHIFT (24U)
+#define SNVS_HPCR_BTN_CONFIG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_CONFIG_SHIFT)) & SNVS_HPCR_BTN_CONFIG_MASK)
+#define SNVS_HPCR_BTN_MASK_MASK  (0x8000000U)
+#define SNVS_HPCR_BTN_MASK_SHIFT (27U)
+#define SNVS_HPCR_BTN_MASK(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_MASK_SHIFT)) & SNVS_HPCR_BTN_MASK_MASK)
 /*! @} */
 
 /*! @name HPSICR - SNVS_HP Security Interrupt Control Register */
 /*! @{ */
-#define SNVS_HPSICR_SV0_EN_MASK                  (0x1U)
-#define SNVS_HPSICR_SV0_EN_SHIFT                 (0U)
-#define SNVS_HPSICR_SV0_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV0_EN_SHIFT)) & SNVS_HPSICR_SV0_EN_MASK)
-#define SNVS_HPSICR_SV1_EN_MASK                  (0x2U)
-#define SNVS_HPSICR_SV1_EN_SHIFT                 (1U)
-#define SNVS_HPSICR_SV1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV1_EN_SHIFT)) & SNVS_HPSICR_SV1_EN_MASK)
-#define SNVS_HPSICR_SV2_EN_MASK                  (0x4U)
-#define SNVS_HPSICR_SV2_EN_SHIFT                 (2U)
-#define SNVS_HPSICR_SV2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV2_EN_SHIFT)) & SNVS_HPSICR_SV2_EN_MASK)
-#define SNVS_HPSICR_SV3_EN_MASK                  (0x8U)
-#define SNVS_HPSICR_SV3_EN_SHIFT                 (3U)
-#define SNVS_HPSICR_SV3_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV3_EN_SHIFT)) & SNVS_HPSICR_SV3_EN_MASK)
-#define SNVS_HPSICR_SV4_EN_MASK                  (0x10U)
-#define SNVS_HPSICR_SV4_EN_SHIFT                 (4U)
-#define SNVS_HPSICR_SV4_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV4_EN_SHIFT)) & SNVS_HPSICR_SV4_EN_MASK)
-#define SNVS_HPSICR_SV5_EN_MASK                  (0x20U)
-#define SNVS_HPSICR_SV5_EN_SHIFT                 (5U)
-#define SNVS_HPSICR_SV5_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV5_EN_SHIFT)) & SNVS_HPSICR_SV5_EN_MASK)
-#define SNVS_HPSICR_LPSVI_EN_MASK                (0x80000000U)
-#define SNVS_HPSICR_LPSVI_EN_SHIFT               (31U)
-#define SNVS_HPSICR_LPSVI_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_LPSVI_EN_SHIFT)) & SNVS_HPSICR_LPSVI_EN_MASK)
+#define SNVS_HPSICR_SV0_EN_MASK    (0x1U)
+#define SNVS_HPSICR_SV0_EN_SHIFT   (0U)
+#define SNVS_HPSICR_SV0_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV0_EN_SHIFT)) & SNVS_HPSICR_SV0_EN_MASK)
+#define SNVS_HPSICR_SV1_EN_MASK    (0x2U)
+#define SNVS_HPSICR_SV1_EN_SHIFT   (1U)
+#define SNVS_HPSICR_SV1_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV1_EN_SHIFT)) & SNVS_HPSICR_SV1_EN_MASK)
+#define SNVS_HPSICR_SV2_EN_MASK    (0x4U)
+#define SNVS_HPSICR_SV2_EN_SHIFT   (2U)
+#define SNVS_HPSICR_SV2_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV2_EN_SHIFT)) & SNVS_HPSICR_SV2_EN_MASK)
+#define SNVS_HPSICR_SV3_EN_MASK    (0x8U)
+#define SNVS_HPSICR_SV3_EN_SHIFT   (3U)
+#define SNVS_HPSICR_SV3_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV3_EN_SHIFT)) & SNVS_HPSICR_SV3_EN_MASK)
+#define SNVS_HPSICR_SV4_EN_MASK    (0x10U)
+#define SNVS_HPSICR_SV4_EN_SHIFT   (4U)
+#define SNVS_HPSICR_SV4_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV4_EN_SHIFT)) & SNVS_HPSICR_SV4_EN_MASK)
+#define SNVS_HPSICR_SV5_EN_MASK    (0x20U)
+#define SNVS_HPSICR_SV5_EN_SHIFT   (5U)
+#define SNVS_HPSICR_SV5_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV5_EN_SHIFT)) & SNVS_HPSICR_SV5_EN_MASK)
+#define SNVS_HPSICR_LPSVI_EN_MASK  (0x80000000U)
+#define SNVS_HPSICR_LPSVI_EN_SHIFT (31U)
+#define SNVS_HPSICR_LPSVI_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_LPSVI_EN_SHIFT)) & SNVS_HPSICR_LPSVI_EN_MASK)
 /*! @} */
 
 /*! @name HPSVCR - SNVS_HP Security Violation Control Register */
 /*! @{ */
-#define SNVS_HPSVCR_SV0_CFG_MASK                 (0x1U)
-#define SNVS_HPSVCR_SV0_CFG_SHIFT                (0U)
-#define SNVS_HPSVCR_SV0_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV0_CFG_SHIFT)) & SNVS_HPSVCR_SV0_CFG_MASK)
-#define SNVS_HPSVCR_SV1_CFG_MASK                 (0x2U)
-#define SNVS_HPSVCR_SV1_CFG_SHIFT                (1U)
-#define SNVS_HPSVCR_SV1_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV1_CFG_SHIFT)) & SNVS_HPSVCR_SV1_CFG_MASK)
-#define SNVS_HPSVCR_SV2_CFG_MASK                 (0x4U)
-#define SNVS_HPSVCR_SV2_CFG_SHIFT                (2U)
-#define SNVS_HPSVCR_SV2_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV2_CFG_SHIFT)) & SNVS_HPSVCR_SV2_CFG_MASK)
-#define SNVS_HPSVCR_SV3_CFG_MASK                 (0x8U)
-#define SNVS_HPSVCR_SV3_CFG_SHIFT                (3U)
-#define SNVS_HPSVCR_SV3_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV3_CFG_SHIFT)) & SNVS_HPSVCR_SV3_CFG_MASK)
-#define SNVS_HPSVCR_SV4_CFG_MASK                 (0x10U)
-#define SNVS_HPSVCR_SV4_CFG_SHIFT                (4U)
-#define SNVS_HPSVCR_SV4_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV4_CFG_SHIFT)) & SNVS_HPSVCR_SV4_CFG_MASK)
-#define SNVS_HPSVCR_SV5_CFG_MASK                 (0x60U)
-#define SNVS_HPSVCR_SV5_CFG_SHIFT                (5U)
-#define SNVS_HPSVCR_SV5_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV5_CFG_SHIFT)) & SNVS_HPSVCR_SV5_CFG_MASK)
-#define SNVS_HPSVCR_LPSV_CFG_MASK                (0xC0000000U)
-#define SNVS_HPSVCR_LPSV_CFG_SHIFT               (30U)
-#define SNVS_HPSVCR_LPSV_CFG(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_LPSV_CFG_SHIFT)) & SNVS_HPSVCR_LPSV_CFG_MASK)
+#define SNVS_HPSVCR_SV0_CFG_MASK   (0x1U)
+#define SNVS_HPSVCR_SV0_CFG_SHIFT  (0U)
+#define SNVS_HPSVCR_SV0_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV0_CFG_SHIFT)) & SNVS_HPSVCR_SV0_CFG_MASK)
+#define SNVS_HPSVCR_SV1_CFG_MASK   (0x2U)
+#define SNVS_HPSVCR_SV1_CFG_SHIFT  (1U)
+#define SNVS_HPSVCR_SV1_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV1_CFG_SHIFT)) & SNVS_HPSVCR_SV1_CFG_MASK)
+#define SNVS_HPSVCR_SV2_CFG_MASK   (0x4U)
+#define SNVS_HPSVCR_SV2_CFG_SHIFT  (2U)
+#define SNVS_HPSVCR_SV2_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV2_CFG_SHIFT)) & SNVS_HPSVCR_SV2_CFG_MASK)
+#define SNVS_HPSVCR_SV3_CFG_MASK   (0x8U)
+#define SNVS_HPSVCR_SV3_CFG_SHIFT  (3U)
+#define SNVS_HPSVCR_SV3_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV3_CFG_SHIFT)) & SNVS_HPSVCR_SV3_CFG_MASK)
+#define SNVS_HPSVCR_SV4_CFG_MASK   (0x10U)
+#define SNVS_HPSVCR_SV4_CFG_SHIFT  (4U)
+#define SNVS_HPSVCR_SV4_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV4_CFG_SHIFT)) & SNVS_HPSVCR_SV4_CFG_MASK)
+#define SNVS_HPSVCR_SV5_CFG_MASK   (0x60U)
+#define SNVS_HPSVCR_SV5_CFG_SHIFT  (5U)
+#define SNVS_HPSVCR_SV5_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV5_CFG_SHIFT)) & SNVS_HPSVCR_SV5_CFG_MASK)
+#define SNVS_HPSVCR_LPSV_CFG_MASK  (0xC0000000U)
+#define SNVS_HPSVCR_LPSV_CFG_SHIFT (30U)
+#define SNVS_HPSVCR_LPSV_CFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_LPSV_CFG_SHIFT)) & SNVS_HPSVCR_LPSV_CFG_MASK)
 /*! @} */
 
 /*! @name HPSR - SNVS_HP Status Register */
 /*! @{ */
-#define SNVS_HPSR_HPTA_MASK                      (0x1U)
-#define SNVS_HPSR_HPTA_SHIFT                     (0U)
-#define SNVS_HPSR_HPTA(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
-#define SNVS_HPSR_PI_MASK                        (0x2U)
-#define SNVS_HPSR_PI_SHIFT                       (1U)
-#define SNVS_HPSR_PI(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
-#define SNVS_HPSR_LPDIS_MASK                     (0x10U)
-#define SNVS_HPSR_LPDIS_SHIFT                    (4U)
-#define SNVS_HPSR_LPDIS(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_LPDIS_SHIFT)) & SNVS_HPSR_LPDIS_MASK)
-#define SNVS_HPSR_BTN_MASK                       (0x40U)
-#define SNVS_HPSR_BTN_SHIFT                      (6U)
-#define SNVS_HPSR_BTN(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BTN_SHIFT)) & SNVS_HPSR_BTN_MASK)
-#define SNVS_HPSR_BI_MASK                        (0x80U)
-#define SNVS_HPSR_BI_SHIFT                       (7U)
-#define SNVS_HPSR_BI(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BI_SHIFT)) & SNVS_HPSR_BI_MASK)
-#define SNVS_HPSR_SSM_STATE_MASK                 (0xF00U)
-#define SNVS_HPSR_SSM_STATE_SHIFT                (8U)
-#define SNVS_HPSR_SSM_STATE(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SSM_STATE_SHIFT)) & SNVS_HPSR_SSM_STATE_MASK)
-#define SNVS_HPSR_SECURITY_CONFIG_MASK           (0xF000U)
-#define SNVS_HPSR_SECURITY_CONFIG_SHIFT          (12U)
-#define SNVS_HPSR_SECURITY_CONFIG(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SECURITY_CONFIG_SHIFT)) & SNVS_HPSR_SECURITY_CONFIG_MASK)
-#define SNVS_HPSR_OTPMK_SYNDROME_MASK            (0x1FF0000U)
-#define SNVS_HPSR_OTPMK_SYNDROME_SHIFT           (16U)
-#define SNVS_HPSR_OTPMK_SYNDROME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_SYNDROME_SHIFT)) & SNVS_HPSR_OTPMK_SYNDROME_MASK)
-#define SNVS_HPSR_OTPMK_ZERO_MASK                (0x8000000U)
-#define SNVS_HPSR_OTPMK_ZERO_SHIFT               (27U)
-#define SNVS_HPSR_OTPMK_ZERO(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_ZERO_SHIFT)) & SNVS_HPSR_OTPMK_ZERO_MASK)
-#define SNVS_HPSR_ZMK_ZERO_MASK                  (0x80000000U)
-#define SNVS_HPSR_ZMK_ZERO_SHIFT                 (31U)
-#define SNVS_HPSR_ZMK_ZERO(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_ZMK_ZERO_SHIFT)) & SNVS_HPSR_ZMK_ZERO_MASK)
+#define SNVS_HPSR_HPTA_MASK             (0x1U)
+#define SNVS_HPSR_HPTA_SHIFT            (0U)
+#define SNVS_HPSR_HPTA(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
+#define SNVS_HPSR_PI_MASK               (0x2U)
+#define SNVS_HPSR_PI_SHIFT              (1U)
+#define SNVS_HPSR_PI(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
+#define SNVS_HPSR_LPDIS_MASK            (0x10U)
+#define SNVS_HPSR_LPDIS_SHIFT           (4U)
+#define SNVS_HPSR_LPDIS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_LPDIS_SHIFT)) & SNVS_HPSR_LPDIS_MASK)
+#define SNVS_HPSR_BTN_MASK              (0x40U)
+#define SNVS_HPSR_BTN_SHIFT             (6U)
+#define SNVS_HPSR_BTN(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BTN_SHIFT)) & SNVS_HPSR_BTN_MASK)
+#define SNVS_HPSR_BI_MASK               (0x80U)
+#define SNVS_HPSR_BI_SHIFT              (7U)
+#define SNVS_HPSR_BI(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BI_SHIFT)) & SNVS_HPSR_BI_MASK)
+#define SNVS_HPSR_SSM_STATE_MASK        (0xF00U)
+#define SNVS_HPSR_SSM_STATE_SHIFT       (8U)
+#define SNVS_HPSR_SSM_STATE(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SSM_STATE_SHIFT)) & SNVS_HPSR_SSM_STATE_MASK)
+#define SNVS_HPSR_SECURITY_CONFIG_MASK  (0xF000U)
+#define SNVS_HPSR_SECURITY_CONFIG_SHIFT (12U)
+#define SNVS_HPSR_SECURITY_CONFIG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SECURITY_CONFIG_SHIFT)) & SNVS_HPSR_SECURITY_CONFIG_MASK)
+#define SNVS_HPSR_OTPMK_SYNDROME_MASK  (0x1FF0000U)
+#define SNVS_HPSR_OTPMK_SYNDROME_SHIFT (16U)
+#define SNVS_HPSR_OTPMK_SYNDROME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_SYNDROME_SHIFT)) & SNVS_HPSR_OTPMK_SYNDROME_MASK)
+#define SNVS_HPSR_OTPMK_ZERO_MASK  (0x8000000U)
+#define SNVS_HPSR_OTPMK_ZERO_SHIFT (27U)
+#define SNVS_HPSR_OTPMK_ZERO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_ZERO_SHIFT)) & SNVS_HPSR_OTPMK_ZERO_MASK)
+#define SNVS_HPSR_ZMK_ZERO_MASK  (0x80000000U)
+#define SNVS_HPSR_ZMK_ZERO_SHIFT (31U)
+#define SNVS_HPSR_ZMK_ZERO(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_ZMK_ZERO_SHIFT)) & SNVS_HPSR_ZMK_ZERO_MASK)
 /*! @} */
 
 /*! @name HPSVSR - SNVS_HP Security Violation Status Register */
 /*! @{ */
-#define SNVS_HPSVSR_SV0_MASK                     (0x1U)
-#define SNVS_HPSVSR_SV0_SHIFT                    (0U)
-#define SNVS_HPSVSR_SV0(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
-#define SNVS_HPSVSR_SV1_MASK                     (0x2U)
-#define SNVS_HPSVSR_SV1_SHIFT                    (1U)
-#define SNVS_HPSVSR_SV1(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV1_SHIFT)) & SNVS_HPSVSR_SV1_MASK)
-#define SNVS_HPSVSR_SV2_MASK                     (0x4U)
-#define SNVS_HPSVSR_SV2_SHIFT                    (2U)
-#define SNVS_HPSVSR_SV2(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
-#define SNVS_HPSVSR_SV3_MASK                     (0x8U)
-#define SNVS_HPSVSR_SV3_SHIFT                    (3U)
-#define SNVS_HPSVSR_SV3(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV3_SHIFT)) & SNVS_HPSVSR_SV3_MASK)
-#define SNVS_HPSVSR_SV4_MASK                     (0x10U)
-#define SNVS_HPSVSR_SV4_SHIFT                    (4U)
-#define SNVS_HPSVSR_SV4(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV4_SHIFT)) & SNVS_HPSVSR_SV4_MASK)
-#define SNVS_HPSVSR_SV5_MASK                     (0x20U)
-#define SNVS_HPSVSR_SV5_SHIFT                    (5U)
-#define SNVS_HPSVSR_SV5(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV5_SHIFT)) & SNVS_HPSVSR_SV5_MASK)
-#define SNVS_HPSVSR_SW_SV_MASK                   (0x2000U)
-#define SNVS_HPSVSR_SW_SV_SHIFT                  (13U)
-#define SNVS_HPSVSR_SW_SV(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_SV_SHIFT)) & SNVS_HPSVSR_SW_SV_MASK)
-#define SNVS_HPSVSR_SW_FSV_MASK                  (0x4000U)
-#define SNVS_HPSVSR_SW_FSV_SHIFT                 (14U)
-#define SNVS_HPSVSR_SW_FSV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_FSV_SHIFT)) & SNVS_HPSVSR_SW_FSV_MASK)
-#define SNVS_HPSVSR_SW_LPSV_MASK                 (0x8000U)
-#define SNVS_HPSVSR_SW_LPSV_SHIFT                (15U)
-#define SNVS_HPSVSR_SW_LPSV(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_LPSV_SHIFT)) & SNVS_HPSVSR_SW_LPSV_MASK)
-#define SNVS_HPSVSR_ZMK_SYNDROME_MASK            (0x1FF0000U)
-#define SNVS_HPSVSR_ZMK_SYNDROME_SHIFT           (16U)
-#define SNVS_HPSVSR_ZMK_SYNDROME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_SYNDROME_SHIFT)) & SNVS_HPSVSR_ZMK_SYNDROME_MASK)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL_MASK            (0x8000000U)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT           (27U)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT)) & SNVS_HPSVSR_ZMK_ECC_FAIL_MASK)
-#define SNVS_HPSVSR_LP_SEC_VIO_MASK              (0x80000000U)
-#define SNVS_HPSVSR_LP_SEC_VIO_SHIFT             (31U)
-#define SNVS_HPSVSR_LP_SEC_VIO(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_LP_SEC_VIO_SHIFT)) & SNVS_HPSVSR_LP_SEC_VIO_MASK)
+#define SNVS_HPSVSR_SV0_MASK           (0x1U)
+#define SNVS_HPSVSR_SV0_SHIFT          (0U)
+#define SNVS_HPSVSR_SV0(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
+#define SNVS_HPSVSR_SV1_MASK           (0x2U)
+#define SNVS_HPSVSR_SV1_SHIFT          (1U)
+#define SNVS_HPSVSR_SV1(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV1_SHIFT)) & SNVS_HPSVSR_SV1_MASK)
+#define SNVS_HPSVSR_SV2_MASK           (0x4U)
+#define SNVS_HPSVSR_SV2_SHIFT          (2U)
+#define SNVS_HPSVSR_SV2(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
+#define SNVS_HPSVSR_SV3_MASK           (0x8U)
+#define SNVS_HPSVSR_SV3_SHIFT          (3U)
+#define SNVS_HPSVSR_SV3(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV3_SHIFT)) & SNVS_HPSVSR_SV3_MASK)
+#define SNVS_HPSVSR_SV4_MASK           (0x10U)
+#define SNVS_HPSVSR_SV4_SHIFT          (4U)
+#define SNVS_HPSVSR_SV4(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV4_SHIFT)) & SNVS_HPSVSR_SV4_MASK)
+#define SNVS_HPSVSR_SV5_MASK           (0x20U)
+#define SNVS_HPSVSR_SV5_SHIFT          (5U)
+#define SNVS_HPSVSR_SV5(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV5_SHIFT)) & SNVS_HPSVSR_SV5_MASK)
+#define SNVS_HPSVSR_SW_SV_MASK         (0x2000U)
+#define SNVS_HPSVSR_SW_SV_SHIFT        (13U)
+#define SNVS_HPSVSR_SW_SV(x)           (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_SV_SHIFT)) & SNVS_HPSVSR_SW_SV_MASK)
+#define SNVS_HPSVSR_SW_FSV_MASK        (0x4000U)
+#define SNVS_HPSVSR_SW_FSV_SHIFT       (14U)
+#define SNVS_HPSVSR_SW_FSV(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_FSV_SHIFT)) & SNVS_HPSVSR_SW_FSV_MASK)
+#define SNVS_HPSVSR_SW_LPSV_MASK       (0x8000U)
+#define SNVS_HPSVSR_SW_LPSV_SHIFT      (15U)
+#define SNVS_HPSVSR_SW_LPSV(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_LPSV_SHIFT)) & SNVS_HPSVSR_SW_LPSV_MASK)
+#define SNVS_HPSVSR_ZMK_SYNDROME_MASK  (0x1FF0000U)
+#define SNVS_HPSVSR_ZMK_SYNDROME_SHIFT (16U)
+#define SNVS_HPSVSR_ZMK_SYNDROME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_SYNDROME_SHIFT)) & SNVS_HPSVSR_ZMK_SYNDROME_MASK)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL_MASK  (0x8000000U)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT (27U)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT)) & SNVS_HPSVSR_ZMK_ECC_FAIL_MASK)
+#define SNVS_HPSVSR_LP_SEC_VIO_MASK  (0x80000000U)
+#define SNVS_HPSVSR_LP_SEC_VIO_SHIFT (31U)
+#define SNVS_HPSVSR_LP_SEC_VIO(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_LP_SEC_VIO_SHIFT)) & SNVS_HPSVSR_LP_SEC_VIO_MASK)
 /*! @} */
 
 /*! @name HPHACIVR - SNVS_HP High Assurance Counter IV Register */
 /*! @{ */
-#define SNVS_HPHACIVR_HAC_COUNTER_IV_MASK        (0xFFFFFFFFU)
-#define SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT       (0U)
-#define SNVS_HPHACIVR_HAC_COUNTER_IV(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT)) & SNVS_HPHACIVR_HAC_COUNTER_IV_MASK)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV_MASK  (0xFFFFFFFFU)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT (0U)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT)) & SNVS_HPHACIVR_HAC_COUNTER_IV_MASK)
 /*! @} */
 
 /*! @name HPHACR - SNVS_HP High Assurance Counter Register */
 /*! @{ */
-#define SNVS_HPHACR_HAC_COUNTER_MASK             (0xFFFFFFFFU)
-#define SNVS_HPHACR_HAC_COUNTER_SHIFT            (0U)
-#define SNVS_HPHACR_HAC_COUNTER(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACR_HAC_COUNTER_SHIFT)) & SNVS_HPHACR_HAC_COUNTER_MASK)
+#define SNVS_HPHACR_HAC_COUNTER_MASK  (0xFFFFFFFFU)
+#define SNVS_HPHACR_HAC_COUNTER_SHIFT (0U)
+#define SNVS_HPHACR_HAC_COUNTER(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACR_HAC_COUNTER_SHIFT)) & SNVS_HPHACR_HAC_COUNTER_MASK)
 /*! @} */
 
 /*! @name HPRTCMR - SNVS_HP Real Time Counter MSB Register */
 /*! @{ */
-#define SNVS_HPRTCMR_RTC_MASK                    (0x7FFFU)
-#define SNVS_HPRTCMR_RTC_SHIFT                   (0U)
-#define SNVS_HPRTCMR_RTC(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCMR_RTC_SHIFT)) & SNVS_HPRTCMR_RTC_MASK)
+#define SNVS_HPRTCMR_RTC_MASK  (0x7FFFU)
+#define SNVS_HPRTCMR_RTC_SHIFT (0U)
+#define SNVS_HPRTCMR_RTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCMR_RTC_SHIFT)) & SNVS_HPRTCMR_RTC_MASK)
 /*! @} */
 
 /*! @name HPRTCLR - SNVS_HP Real Time Counter LSB Register */
 /*! @{ */
-#define SNVS_HPRTCLR_RTC_MASK                    (0xFFFFFFFFU)
-#define SNVS_HPRTCLR_RTC_SHIFT                   (0U)
-#define SNVS_HPRTCLR_RTC(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCLR_RTC_SHIFT)) & SNVS_HPRTCLR_RTC_MASK)
+#define SNVS_HPRTCLR_RTC_MASK  (0xFFFFFFFFU)
+#define SNVS_HPRTCLR_RTC_SHIFT (0U)
+#define SNVS_HPRTCLR_RTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCLR_RTC_SHIFT)) & SNVS_HPRTCLR_RTC_MASK)
 /*! @} */
 
 /*! @name HPTAMR - SNVS_HP Time Alarm MSB Register */
 /*! @{ */
-#define SNVS_HPTAMR_HPTA_MS_MASK                 (0x7FFFU)
-#define SNVS_HPTAMR_HPTA_MS_SHIFT                (0U)
-#define SNVS_HPTAMR_HPTA_MS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPTAMR_HPTA_MS_SHIFT)) & SNVS_HPTAMR_HPTA_MS_MASK)
+#define SNVS_HPTAMR_HPTA_MS_MASK  (0x7FFFU)
+#define SNVS_HPTAMR_HPTA_MS_SHIFT (0U)
+#define SNVS_HPTAMR_HPTA_MS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPTAMR_HPTA_MS_SHIFT)) & SNVS_HPTAMR_HPTA_MS_MASK)
 /*! @} */
 
 /*! @name HPTALR - SNVS_HP Time Alarm LSB Register */
 /*! @{ */
-#define SNVS_HPTALR_HPTA_LS_MASK                 (0xFFFFFFFFU)
-#define SNVS_HPTALR_HPTA_LS_SHIFT                (0U)
-#define SNVS_HPTALR_HPTA_LS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPTALR_HPTA_LS_SHIFT)) & SNVS_HPTALR_HPTA_LS_MASK)
+#define SNVS_HPTALR_HPTA_LS_MASK  (0xFFFFFFFFU)
+#define SNVS_HPTALR_HPTA_LS_SHIFT (0U)
+#define SNVS_HPTALR_HPTA_LS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPTALR_HPTA_LS_SHIFT)) & SNVS_HPTALR_HPTA_LS_MASK)
 /*! @} */
 
 /*! @name LPLR - SNVS_LP Lock Register */
 /*! @{ */
-#define SNVS_LPLR_ZMK_WHL_MASK                   (0x1U)
-#define SNVS_LPLR_ZMK_WHL_SHIFT                  (0U)
-#define SNVS_LPLR_ZMK_WHL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_WHL_SHIFT)) & SNVS_LPLR_ZMK_WHL_MASK)
-#define SNVS_LPLR_ZMK_RHL_MASK                   (0x2U)
-#define SNVS_LPLR_ZMK_RHL_SHIFT                  (1U)
-#define SNVS_LPLR_ZMK_RHL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_RHL_SHIFT)) & SNVS_LPLR_ZMK_RHL_MASK)
-#define SNVS_LPLR_SRTC_HL_MASK                   (0x4U)
-#define SNVS_LPLR_SRTC_HL_SHIFT                  (2U)
-#define SNVS_LPLR_SRTC_HL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_SRTC_HL_SHIFT)) & SNVS_LPLR_SRTC_HL_MASK)
-#define SNVS_LPLR_LPCALB_HL_MASK                 (0x8U)
-#define SNVS_LPLR_LPCALB_HL_SHIFT                (3U)
-#define SNVS_LPLR_LPCALB_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPCALB_HL_SHIFT)) & SNVS_LPLR_LPCALB_HL_MASK)
-#define SNVS_LPLR_MC_HL_MASK                     (0x10U)
-#define SNVS_LPLR_MC_HL_SHIFT                    (4U)
-#define SNVS_LPLR_MC_HL(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MC_HL_SHIFT)) & SNVS_LPLR_MC_HL_MASK)
-#define SNVS_LPLR_GPR_HL_MASK                    (0x20U)
-#define SNVS_LPLR_GPR_HL_SHIFT                   (5U)
-#define SNVS_LPLR_GPR_HL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_GPR_HL_SHIFT)) & SNVS_LPLR_GPR_HL_MASK)
-#define SNVS_LPLR_LPSVCR_HL_MASK                 (0x40U)
-#define SNVS_LPLR_LPSVCR_HL_SHIFT                (6U)
-#define SNVS_LPLR_LPSVCR_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPSVCR_HL_SHIFT)) & SNVS_LPLR_LPSVCR_HL_MASK)
-#define SNVS_LPLR_LPTDCR_HL_MASK                 (0x100U)
-#define SNVS_LPLR_LPTDCR_HL_SHIFT                (8U)
-#define SNVS_LPLR_LPTDCR_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPTDCR_HL_SHIFT)) & SNVS_LPLR_LPTDCR_HL_MASK)
-#define SNVS_LPLR_MKS_HL_MASK                    (0x200U)
-#define SNVS_LPLR_MKS_HL_SHIFT                   (9U)
-#define SNVS_LPLR_MKS_HL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MKS_HL_SHIFT)) & SNVS_LPLR_MKS_HL_MASK)
+#define SNVS_LPLR_ZMK_WHL_MASK    (0x1U)
+#define SNVS_LPLR_ZMK_WHL_SHIFT   (0U)
+#define SNVS_LPLR_ZMK_WHL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_WHL_SHIFT)) & SNVS_LPLR_ZMK_WHL_MASK)
+#define SNVS_LPLR_ZMK_RHL_MASK    (0x2U)
+#define SNVS_LPLR_ZMK_RHL_SHIFT   (1U)
+#define SNVS_LPLR_ZMK_RHL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_RHL_SHIFT)) & SNVS_LPLR_ZMK_RHL_MASK)
+#define SNVS_LPLR_SRTC_HL_MASK    (0x4U)
+#define SNVS_LPLR_SRTC_HL_SHIFT   (2U)
+#define SNVS_LPLR_SRTC_HL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_SRTC_HL_SHIFT)) & SNVS_LPLR_SRTC_HL_MASK)
+#define SNVS_LPLR_LPCALB_HL_MASK  (0x8U)
+#define SNVS_LPLR_LPCALB_HL_SHIFT (3U)
+#define SNVS_LPLR_LPCALB_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPCALB_HL_SHIFT)) & SNVS_LPLR_LPCALB_HL_MASK)
+#define SNVS_LPLR_MC_HL_MASK      (0x10U)
+#define SNVS_LPLR_MC_HL_SHIFT     (4U)
+#define SNVS_LPLR_MC_HL(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MC_HL_SHIFT)) & SNVS_LPLR_MC_HL_MASK)
+#define SNVS_LPLR_GPR_HL_MASK     (0x20U)
+#define SNVS_LPLR_GPR_HL_SHIFT    (5U)
+#define SNVS_LPLR_GPR_HL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_GPR_HL_SHIFT)) & SNVS_LPLR_GPR_HL_MASK)
+#define SNVS_LPLR_LPSVCR_HL_MASK  (0x40U)
+#define SNVS_LPLR_LPSVCR_HL_SHIFT (6U)
+#define SNVS_LPLR_LPSVCR_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPSVCR_HL_SHIFT)) & SNVS_LPLR_LPSVCR_HL_MASK)
+#define SNVS_LPLR_LPTDCR_HL_MASK  (0x100U)
+#define SNVS_LPLR_LPTDCR_HL_SHIFT (8U)
+#define SNVS_LPLR_LPTDCR_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPTDCR_HL_SHIFT)) & SNVS_LPLR_LPTDCR_HL_MASK)
+#define SNVS_LPLR_MKS_HL_MASK     (0x200U)
+#define SNVS_LPLR_MKS_HL_SHIFT    (9U)
+#define SNVS_LPLR_MKS_HL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MKS_HL_SHIFT)) & SNVS_LPLR_MKS_HL_MASK)
 /*! @} */
 
 /*! @name LPCR - SNVS_LP Control Register */
 /*! @{ */
-#define SNVS_LPCR_SRTC_ENV_MASK                  (0x1U)
-#define SNVS_LPCR_SRTC_ENV_SHIFT                 (0U)
-#define SNVS_LPCR_SRTC_ENV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_ENV_SHIFT)) & SNVS_LPCR_SRTC_ENV_MASK)
-#define SNVS_LPCR_LPTA_EN_MASK                   (0x2U)
-#define SNVS_LPCR_LPTA_EN_SHIFT                  (1U)
-#define SNVS_LPCR_LPTA_EN(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPTA_EN_SHIFT)) & SNVS_LPCR_LPTA_EN_MASK)
-#define SNVS_LPCR_MC_ENV_MASK                    (0x4U)
-#define SNVS_LPCR_MC_ENV_SHIFT                   (2U)
-#define SNVS_LPCR_MC_ENV(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_MC_ENV_SHIFT)) & SNVS_LPCR_MC_ENV_MASK)
-#define SNVS_LPCR_LPWUI_EN_MASK                  (0x8U)
-#define SNVS_LPCR_LPWUI_EN_SHIFT                 (3U)
-#define SNVS_LPCR_LPWUI_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPWUI_EN_SHIFT)) & SNVS_LPCR_LPWUI_EN_MASK)
-#define SNVS_LPCR_SRTC_INV_EN_MASK               (0x10U)
-#define SNVS_LPCR_SRTC_INV_EN_SHIFT              (4U)
-#define SNVS_LPCR_SRTC_INV_EN(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_INV_EN_SHIFT)) & SNVS_LPCR_SRTC_INV_EN_MASK)
-#define SNVS_LPCR_DP_EN_MASK                     (0x20U)
-#define SNVS_LPCR_DP_EN_SHIFT                    (5U)
-#define SNVS_LPCR_DP_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DP_EN_SHIFT)) & SNVS_LPCR_DP_EN_MASK)
-#define SNVS_LPCR_TOP_MASK                       (0x40U)
-#define SNVS_LPCR_TOP_SHIFT                      (6U)
-#define SNVS_LPCR_TOP(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_TOP_SHIFT)) & SNVS_LPCR_TOP_MASK)
-#define SNVS_LPCR_PWR_GLITCH_EN_MASK             (0x80U)
-#define SNVS_LPCR_PWR_GLITCH_EN_SHIFT            (7U)
-#define SNVS_LPCR_PWR_GLITCH_EN(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PWR_GLITCH_EN_SHIFT)) & SNVS_LPCR_PWR_GLITCH_EN_MASK)
-#define SNVS_LPCR_LPCALB_EN_MASK                 (0x100U)
-#define SNVS_LPCR_LPCALB_EN_SHIFT                (8U)
-#define SNVS_LPCR_LPCALB_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_EN_SHIFT)) & SNVS_LPCR_LPCALB_EN_MASK)
-#define SNVS_LPCR_LPCALB_VAL_MASK                (0x7C00U)
-#define SNVS_LPCR_LPCALB_VAL_SHIFT               (10U)
-#define SNVS_LPCR_LPCALB_VAL(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_VAL_SHIFT)) & SNVS_LPCR_LPCALB_VAL_MASK)
-#define SNVS_LPCR_BTN_PRESS_TIME_MASK            (0x30000U)
-#define SNVS_LPCR_BTN_PRESS_TIME_SHIFT           (16U)
-#define SNVS_LPCR_BTN_PRESS_TIME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_BTN_PRESS_TIME_SHIFT)) & SNVS_LPCR_BTN_PRESS_TIME_MASK)
-#define SNVS_LPCR_DEBOUNCE_MASK                  (0xC0000U)
-#define SNVS_LPCR_DEBOUNCE_SHIFT                 (18U)
-#define SNVS_LPCR_DEBOUNCE(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DEBOUNCE_SHIFT)) & SNVS_LPCR_DEBOUNCE_MASK)
-#define SNVS_LPCR_ON_TIME_MASK                   (0x300000U)
-#define SNVS_LPCR_ON_TIME_SHIFT                  (20U)
-#define SNVS_LPCR_ON_TIME(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_ON_TIME_SHIFT)) & SNVS_LPCR_ON_TIME_MASK)
-#define SNVS_LPCR_PK_EN_MASK                     (0x400000U)
-#define SNVS_LPCR_PK_EN_SHIFT                    (22U)
-#define SNVS_LPCR_PK_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_EN_SHIFT)) & SNVS_LPCR_PK_EN_MASK)
-#define SNVS_LPCR_PK_OVERRIDE_MASK               (0x800000U)
-#define SNVS_LPCR_PK_OVERRIDE_SHIFT              (23U)
-#define SNVS_LPCR_PK_OVERRIDE(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_OVERRIDE_SHIFT)) & SNVS_LPCR_PK_OVERRIDE_MASK)
-#define SNVS_LPCR_GPR_Z_DIS_MASK                 (0x1000000U)
-#define SNVS_LPCR_GPR_Z_DIS_SHIFT                (24U)
-#define SNVS_LPCR_GPR_Z_DIS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_GPR_Z_DIS_SHIFT)) & SNVS_LPCR_GPR_Z_DIS_MASK)
+#define SNVS_LPCR_SRTC_ENV_MASK     (0x1U)
+#define SNVS_LPCR_SRTC_ENV_SHIFT    (0U)
+#define SNVS_LPCR_SRTC_ENV(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_ENV_SHIFT)) & SNVS_LPCR_SRTC_ENV_MASK)
+#define SNVS_LPCR_LPTA_EN_MASK      (0x2U)
+#define SNVS_LPCR_LPTA_EN_SHIFT     (1U)
+#define SNVS_LPCR_LPTA_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPTA_EN_SHIFT)) & SNVS_LPCR_LPTA_EN_MASK)
+#define SNVS_LPCR_MC_ENV_MASK       (0x4U)
+#define SNVS_LPCR_MC_ENV_SHIFT      (2U)
+#define SNVS_LPCR_MC_ENV(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_MC_ENV_SHIFT)) & SNVS_LPCR_MC_ENV_MASK)
+#define SNVS_LPCR_LPWUI_EN_MASK     (0x8U)
+#define SNVS_LPCR_LPWUI_EN_SHIFT    (3U)
+#define SNVS_LPCR_LPWUI_EN(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPWUI_EN_SHIFT)) & SNVS_LPCR_LPWUI_EN_MASK)
+#define SNVS_LPCR_SRTC_INV_EN_MASK  (0x10U)
+#define SNVS_LPCR_SRTC_INV_EN_SHIFT (4U)
+#define SNVS_LPCR_SRTC_INV_EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_INV_EN_SHIFT)) & SNVS_LPCR_SRTC_INV_EN_MASK)
+#define SNVS_LPCR_DP_EN_MASK          (0x20U)
+#define SNVS_LPCR_DP_EN_SHIFT         (5U)
+#define SNVS_LPCR_DP_EN(x)            (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DP_EN_SHIFT)) & SNVS_LPCR_DP_EN_MASK)
+#define SNVS_LPCR_TOP_MASK            (0x40U)
+#define SNVS_LPCR_TOP_SHIFT           (6U)
+#define SNVS_LPCR_TOP(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_TOP_SHIFT)) & SNVS_LPCR_TOP_MASK)
+#define SNVS_LPCR_PWR_GLITCH_EN_MASK  (0x80U)
+#define SNVS_LPCR_PWR_GLITCH_EN_SHIFT (7U)
+#define SNVS_LPCR_PWR_GLITCH_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PWR_GLITCH_EN_SHIFT)) & SNVS_LPCR_PWR_GLITCH_EN_MASK)
+#define SNVS_LPCR_LPCALB_EN_MASK   (0x100U)
+#define SNVS_LPCR_LPCALB_EN_SHIFT  (8U)
+#define SNVS_LPCR_LPCALB_EN(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_EN_SHIFT)) & SNVS_LPCR_LPCALB_EN_MASK)
+#define SNVS_LPCR_LPCALB_VAL_MASK  (0x7C00U)
+#define SNVS_LPCR_LPCALB_VAL_SHIFT (10U)
+#define SNVS_LPCR_LPCALB_VAL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_VAL_SHIFT)) & SNVS_LPCR_LPCALB_VAL_MASK)
+#define SNVS_LPCR_BTN_PRESS_TIME_MASK  (0x30000U)
+#define SNVS_LPCR_BTN_PRESS_TIME_SHIFT (16U)
+#define SNVS_LPCR_BTN_PRESS_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_BTN_PRESS_TIME_SHIFT)) & SNVS_LPCR_BTN_PRESS_TIME_MASK)
+#define SNVS_LPCR_DEBOUNCE_MASK     (0xC0000U)
+#define SNVS_LPCR_DEBOUNCE_SHIFT    (18U)
+#define SNVS_LPCR_DEBOUNCE(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DEBOUNCE_SHIFT)) & SNVS_LPCR_DEBOUNCE_MASK)
+#define SNVS_LPCR_ON_TIME_MASK      (0x300000U)
+#define SNVS_LPCR_ON_TIME_SHIFT     (20U)
+#define SNVS_LPCR_ON_TIME(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_ON_TIME_SHIFT)) & SNVS_LPCR_ON_TIME_MASK)
+#define SNVS_LPCR_PK_EN_MASK        (0x400000U)
+#define SNVS_LPCR_PK_EN_SHIFT       (22U)
+#define SNVS_LPCR_PK_EN(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_EN_SHIFT)) & SNVS_LPCR_PK_EN_MASK)
+#define SNVS_LPCR_PK_OVERRIDE_MASK  (0x800000U)
+#define SNVS_LPCR_PK_OVERRIDE_SHIFT (23U)
+#define SNVS_LPCR_PK_OVERRIDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_OVERRIDE_SHIFT)) & SNVS_LPCR_PK_OVERRIDE_MASK)
+#define SNVS_LPCR_GPR_Z_DIS_MASK  (0x1000000U)
+#define SNVS_LPCR_GPR_Z_DIS_SHIFT (24U)
+#define SNVS_LPCR_GPR_Z_DIS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_GPR_Z_DIS_SHIFT)) & SNVS_LPCR_GPR_Z_DIS_MASK)
 /*! @} */
 
 /*! @name LPMKCR - SNVS_LP Master Key Control Register */
 /*! @{ */
-#define SNVS_LPMKCR_MASTER_KEY_SEL_MASK          (0x3U)
-#define SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT         (0U)
-#define SNVS_LPMKCR_MASTER_KEY_SEL(x)            (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT)) & SNVS_LPMKCR_MASTER_KEY_SEL_MASK)
-#define SNVS_LPMKCR_ZMK_HWP_MASK                 (0x4U)
-#define SNVS_LPMKCR_ZMK_HWP_SHIFT                (2U)
-#define SNVS_LPMKCR_ZMK_HWP(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_HWP_SHIFT)) & SNVS_LPMKCR_ZMK_HWP_MASK)
-#define SNVS_LPMKCR_ZMK_VAL_MASK                 (0x8U)
-#define SNVS_LPMKCR_ZMK_VAL_SHIFT                (3U)
-#define SNVS_LPMKCR_ZMK_VAL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_VAL_SHIFT)) & SNVS_LPMKCR_ZMK_VAL_MASK)
-#define SNVS_LPMKCR_ZMK_ECC_EN_MASK              (0x10U)
-#define SNVS_LPMKCR_ZMK_ECC_EN_SHIFT             (4U)
-#define SNVS_LPMKCR_ZMK_ECC_EN(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_EN_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_EN_MASK)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE_MASK           (0xFF80U)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT          (7U)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_VALUE_MASK)
+#define SNVS_LPMKCR_MASTER_KEY_SEL_MASK  (0x3U)
+#define SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT (0U)
+#define SNVS_LPMKCR_MASTER_KEY_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT)) & SNVS_LPMKCR_MASTER_KEY_SEL_MASK)
+#define SNVS_LPMKCR_ZMK_HWP_MASK     (0x4U)
+#define SNVS_LPMKCR_ZMK_HWP_SHIFT    (2U)
+#define SNVS_LPMKCR_ZMK_HWP(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_HWP_SHIFT)) & SNVS_LPMKCR_ZMK_HWP_MASK)
+#define SNVS_LPMKCR_ZMK_VAL_MASK     (0x8U)
+#define SNVS_LPMKCR_ZMK_VAL_SHIFT    (3U)
+#define SNVS_LPMKCR_ZMK_VAL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_VAL_SHIFT)) & SNVS_LPMKCR_ZMK_VAL_MASK)
+#define SNVS_LPMKCR_ZMK_ECC_EN_MASK  (0x10U)
+#define SNVS_LPMKCR_ZMK_ECC_EN_SHIFT (4U)
+#define SNVS_LPMKCR_ZMK_ECC_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_EN_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_EN_MASK)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE_MASK  (0xFF80U)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT (7U)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_VALUE_MASK)
 /*! @} */
 
 /*! @name LPSVCR - SNVS_LP Security Violation Control Register */
 /*! @{ */
-#define SNVS_LPSVCR_SV0_EN_MASK                  (0x1U)
-#define SNVS_LPSVCR_SV0_EN_SHIFT                 (0U)
-#define SNVS_LPSVCR_SV0_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV0_EN_SHIFT)) & SNVS_LPSVCR_SV0_EN_MASK)
-#define SNVS_LPSVCR_SV1_EN_MASK                  (0x2U)
-#define SNVS_LPSVCR_SV1_EN_SHIFT                 (1U)
-#define SNVS_LPSVCR_SV1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV1_EN_SHIFT)) & SNVS_LPSVCR_SV1_EN_MASK)
-#define SNVS_LPSVCR_SV2_EN_MASK                  (0x4U)
-#define SNVS_LPSVCR_SV2_EN_SHIFT                 (2U)
-#define SNVS_LPSVCR_SV2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV2_EN_SHIFT)) & SNVS_LPSVCR_SV2_EN_MASK)
-#define SNVS_LPSVCR_SV3_EN_MASK                  (0x8U)
-#define SNVS_LPSVCR_SV3_EN_SHIFT                 (3U)
-#define SNVS_LPSVCR_SV3_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV3_EN_SHIFT)) & SNVS_LPSVCR_SV3_EN_MASK)
-#define SNVS_LPSVCR_SV4_EN_MASK                  (0x10U)
-#define SNVS_LPSVCR_SV4_EN_SHIFT                 (4U)
-#define SNVS_LPSVCR_SV4_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV4_EN_SHIFT)) & SNVS_LPSVCR_SV4_EN_MASK)
-#define SNVS_LPSVCR_SV5_EN_MASK                  (0x20U)
-#define SNVS_LPSVCR_SV5_EN_SHIFT                 (5U)
-#define SNVS_LPSVCR_SV5_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV5_EN_SHIFT)) & SNVS_LPSVCR_SV5_EN_MASK)
+#define SNVS_LPSVCR_SV0_EN_MASK  (0x1U)
+#define SNVS_LPSVCR_SV0_EN_SHIFT (0U)
+#define SNVS_LPSVCR_SV0_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV0_EN_SHIFT)) & SNVS_LPSVCR_SV0_EN_MASK)
+#define SNVS_LPSVCR_SV1_EN_MASK  (0x2U)
+#define SNVS_LPSVCR_SV1_EN_SHIFT (1U)
+#define SNVS_LPSVCR_SV1_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV1_EN_SHIFT)) & SNVS_LPSVCR_SV1_EN_MASK)
+#define SNVS_LPSVCR_SV2_EN_MASK  (0x4U)
+#define SNVS_LPSVCR_SV2_EN_SHIFT (2U)
+#define SNVS_LPSVCR_SV2_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV2_EN_SHIFT)) & SNVS_LPSVCR_SV2_EN_MASK)
+#define SNVS_LPSVCR_SV3_EN_MASK  (0x8U)
+#define SNVS_LPSVCR_SV3_EN_SHIFT (3U)
+#define SNVS_LPSVCR_SV3_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV3_EN_SHIFT)) & SNVS_LPSVCR_SV3_EN_MASK)
+#define SNVS_LPSVCR_SV4_EN_MASK  (0x10U)
+#define SNVS_LPSVCR_SV4_EN_SHIFT (4U)
+#define SNVS_LPSVCR_SV4_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV4_EN_SHIFT)) & SNVS_LPSVCR_SV4_EN_MASK)
+#define SNVS_LPSVCR_SV5_EN_MASK  (0x20U)
+#define SNVS_LPSVCR_SV5_EN_SHIFT (5U)
+#define SNVS_LPSVCR_SV5_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV5_EN_SHIFT)) & SNVS_LPSVCR_SV5_EN_MASK)
 /*! @} */
 
 /*! @name LPTDCR - SNVS_LP Tamper Detectors Configuration Register */
 /*! @{ */
-#define SNVS_LPTDCR_SRTCR_EN_MASK                (0x2U)
-#define SNVS_LPTDCR_SRTCR_EN_SHIFT               (1U)
-#define SNVS_LPTDCR_SRTCR_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_SRTCR_EN_SHIFT)) & SNVS_LPTDCR_SRTCR_EN_MASK)
-#define SNVS_LPTDCR_MCR_EN_MASK                  (0x4U)
-#define SNVS_LPTDCR_MCR_EN_SHIFT                 (2U)
-#define SNVS_LPTDCR_MCR_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_MCR_EN_SHIFT)) & SNVS_LPTDCR_MCR_EN_MASK)
-#define SNVS_LPTDCR_ET1_EN_MASK                  (0x200U)
-#define SNVS_LPTDCR_ET1_EN_SHIFT                 (9U)
-#define SNVS_LPTDCR_ET1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1_EN_SHIFT)) & SNVS_LPTDCR_ET1_EN_MASK)
-#define SNVS_LPTDCR_ET1P_MASK                    (0x800U)
-#define SNVS_LPTDCR_ET1P_SHIFT                   (11U)
-#define SNVS_LPTDCR_ET1P(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1P_SHIFT)) & SNVS_LPTDCR_ET1P_MASK)
-#define SNVS_LPTDCR_PFD_OBSERV_MASK              (0x4000U)
-#define SNVS_LPTDCR_PFD_OBSERV_SHIFT             (14U)
-#define SNVS_LPTDCR_PFD_OBSERV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_PFD_OBSERV_SHIFT)) & SNVS_LPTDCR_PFD_OBSERV_MASK)
-#define SNVS_LPTDCR_POR_OBSERV_MASK              (0x8000U)
-#define SNVS_LPTDCR_POR_OBSERV_SHIFT             (15U)
-#define SNVS_LPTDCR_POR_OBSERV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_POR_OBSERV_SHIFT)) & SNVS_LPTDCR_POR_OBSERV_MASK)
-#define SNVS_LPTDCR_OSCB_MASK                    (0x10000000U)
-#define SNVS_LPTDCR_OSCB_SHIFT                   (28U)
-#define SNVS_LPTDCR_OSCB(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_OSCB_SHIFT)) & SNVS_LPTDCR_OSCB_MASK)
+#define SNVS_LPTDCR_SRTCR_EN_MASK  (0x2U)
+#define SNVS_LPTDCR_SRTCR_EN_SHIFT (1U)
+#define SNVS_LPTDCR_SRTCR_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_SRTCR_EN_SHIFT)) & SNVS_LPTDCR_SRTCR_EN_MASK)
+#define SNVS_LPTDCR_MCR_EN_MASK      (0x4U)
+#define SNVS_LPTDCR_MCR_EN_SHIFT     (2U)
+#define SNVS_LPTDCR_MCR_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_MCR_EN_SHIFT)) & SNVS_LPTDCR_MCR_EN_MASK)
+#define SNVS_LPTDCR_ET1_EN_MASK      (0x200U)
+#define SNVS_LPTDCR_ET1_EN_SHIFT     (9U)
+#define SNVS_LPTDCR_ET1_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1_EN_SHIFT)) & SNVS_LPTDCR_ET1_EN_MASK)
+#define SNVS_LPTDCR_ET1P_MASK        (0x800U)
+#define SNVS_LPTDCR_ET1P_SHIFT       (11U)
+#define SNVS_LPTDCR_ET1P(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1P_SHIFT)) & SNVS_LPTDCR_ET1P_MASK)
+#define SNVS_LPTDCR_PFD_OBSERV_MASK  (0x4000U)
+#define SNVS_LPTDCR_PFD_OBSERV_SHIFT (14U)
+#define SNVS_LPTDCR_PFD_OBSERV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_PFD_OBSERV_SHIFT)) & SNVS_LPTDCR_PFD_OBSERV_MASK)
+#define SNVS_LPTDCR_POR_OBSERV_MASK  (0x8000U)
+#define SNVS_LPTDCR_POR_OBSERV_SHIFT (15U)
+#define SNVS_LPTDCR_POR_OBSERV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_POR_OBSERV_SHIFT)) & SNVS_LPTDCR_POR_OBSERV_MASK)
+#define SNVS_LPTDCR_OSCB_MASK  (0x10000000U)
+#define SNVS_LPTDCR_OSCB_SHIFT (28U)
+#define SNVS_LPTDCR_OSCB(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_OSCB_SHIFT)) & SNVS_LPTDCR_OSCB_MASK)
 /*! @} */
 
 /*! @name LPSR - SNVS_LP Status Register */
 /*! @{ */
-#define SNVS_LPSR_LPTA_MASK                      (0x1U)
-#define SNVS_LPSR_LPTA_SHIFT                     (0U)
-#define SNVS_LPSR_LPTA(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPTA_SHIFT)) & SNVS_LPSR_LPTA_MASK)
-#define SNVS_LPSR_SRTCR_MASK                     (0x2U)
-#define SNVS_LPSR_SRTCR_SHIFT                    (1U)
-#define SNVS_LPSR_SRTCR(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SRTCR_SHIFT)) & SNVS_LPSR_SRTCR_MASK)
-#define SNVS_LPSR_MCR_MASK                       (0x4U)
-#define SNVS_LPSR_MCR_SHIFT                      (2U)
-#define SNVS_LPSR_MCR(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_MCR_SHIFT)) & SNVS_LPSR_MCR_MASK)
-#define SNVS_LPSR_PGD_MASK                       (0x8U)
-#define SNVS_LPSR_PGD_SHIFT                      (3U)
-#define SNVS_LPSR_PGD(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_PGD_SHIFT)) & SNVS_LPSR_PGD_MASK)
-#define SNVS_LPSR_ET1D_MASK                      (0x200U)
-#define SNVS_LPSR_ET1D_SHIFT                     (9U)
-#define SNVS_LPSR_ET1D(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ET1D_SHIFT)) & SNVS_LPSR_ET1D_MASK)
-#define SNVS_LPSR_ESVD_MASK                      (0x10000U)
-#define SNVS_LPSR_ESVD_SHIFT                     (16U)
-#define SNVS_LPSR_ESVD(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ESVD_SHIFT)) & SNVS_LPSR_ESVD_MASK)
-#define SNVS_LPSR_EO_MASK                        (0x20000U)
-#define SNVS_LPSR_EO_SHIFT                       (17U)
-#define SNVS_LPSR_EO(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_EO_SHIFT)) & SNVS_LPSR_EO_MASK)
-#define SNVS_LPSR_SPO_MASK                       (0x40000U)
-#define SNVS_LPSR_SPO_SHIFT                      (18U)
-#define SNVS_LPSR_SPO(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SPO_SHIFT)) & SNVS_LPSR_SPO_MASK)
-#define SNVS_LPSR_SED_MASK                       (0x100000U)
-#define SNVS_LPSR_SED_SHIFT                      (20U)
-#define SNVS_LPSR_SED(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SED_SHIFT)) & SNVS_LPSR_SED_MASK)
-#define SNVS_LPSR_LPNS_MASK                      (0x40000000U)
-#define SNVS_LPSR_LPNS_SHIFT                     (30U)
-#define SNVS_LPSR_LPNS(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPNS_SHIFT)) & SNVS_LPSR_LPNS_MASK)
-#define SNVS_LPSR_LPS_MASK                       (0x80000000U)
-#define SNVS_LPSR_LPS_SHIFT                      (31U)
-#define SNVS_LPSR_LPS(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPS_SHIFT)) & SNVS_LPSR_LPS_MASK)
+#define SNVS_LPSR_LPTA_MASK   (0x1U)
+#define SNVS_LPSR_LPTA_SHIFT  (0U)
+#define SNVS_LPSR_LPTA(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPTA_SHIFT)) & SNVS_LPSR_LPTA_MASK)
+#define SNVS_LPSR_SRTCR_MASK  (0x2U)
+#define SNVS_LPSR_SRTCR_SHIFT (1U)
+#define SNVS_LPSR_SRTCR(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SRTCR_SHIFT)) & SNVS_LPSR_SRTCR_MASK)
+#define SNVS_LPSR_MCR_MASK    (0x4U)
+#define SNVS_LPSR_MCR_SHIFT   (2U)
+#define SNVS_LPSR_MCR(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_MCR_SHIFT)) & SNVS_LPSR_MCR_MASK)
+#define SNVS_LPSR_PGD_MASK    (0x8U)
+#define SNVS_LPSR_PGD_SHIFT   (3U)
+#define SNVS_LPSR_PGD(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_PGD_SHIFT)) & SNVS_LPSR_PGD_MASK)
+#define SNVS_LPSR_ET1D_MASK   (0x200U)
+#define SNVS_LPSR_ET1D_SHIFT  (9U)
+#define SNVS_LPSR_ET1D(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ET1D_SHIFT)) & SNVS_LPSR_ET1D_MASK)
+#define SNVS_LPSR_ESVD_MASK   (0x10000U)
+#define SNVS_LPSR_ESVD_SHIFT  (16U)
+#define SNVS_LPSR_ESVD(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ESVD_SHIFT)) & SNVS_LPSR_ESVD_MASK)
+#define SNVS_LPSR_EO_MASK     (0x20000U)
+#define SNVS_LPSR_EO_SHIFT    (17U)
+#define SNVS_LPSR_EO(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_EO_SHIFT)) & SNVS_LPSR_EO_MASK)
+#define SNVS_LPSR_SPO_MASK    (0x40000U)
+#define SNVS_LPSR_SPO_SHIFT   (18U)
+#define SNVS_LPSR_SPO(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SPO_SHIFT)) & SNVS_LPSR_SPO_MASK)
+#define SNVS_LPSR_SED_MASK    (0x100000U)
+#define SNVS_LPSR_SED_SHIFT   (20U)
+#define SNVS_LPSR_SED(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SED_SHIFT)) & SNVS_LPSR_SED_MASK)
+#define SNVS_LPSR_LPNS_MASK   (0x40000000U)
+#define SNVS_LPSR_LPNS_SHIFT  (30U)
+#define SNVS_LPSR_LPNS(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPNS_SHIFT)) & SNVS_LPSR_LPNS_MASK)
+#define SNVS_LPSR_LPS_MASK    (0x80000000U)
+#define SNVS_LPSR_LPS_SHIFT   (31U)
+#define SNVS_LPSR_LPS(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPS_SHIFT)) & SNVS_LPSR_LPS_MASK)
 /*! @} */
 
 /*! @name LPSRTCMR - SNVS_LP Secure Real Time Counter MSB Register */
 /*! @{ */
-#define SNVS_LPSRTCMR_SRTC_MASK                  (0x7FFFU)
-#define SNVS_LPSRTCMR_SRTC_SHIFT                 (0U)
-#define SNVS_LPSRTCMR_SRTC(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCMR_SRTC_SHIFT)) & SNVS_LPSRTCMR_SRTC_MASK)
+#define SNVS_LPSRTCMR_SRTC_MASK  (0x7FFFU)
+#define SNVS_LPSRTCMR_SRTC_SHIFT (0U)
+#define SNVS_LPSRTCMR_SRTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCMR_SRTC_SHIFT)) & SNVS_LPSRTCMR_SRTC_MASK)
 /*! @} */
 
 /*! @name LPSRTCLR - SNVS_LP Secure Real Time Counter LSB Register */
 /*! @{ */
-#define SNVS_LPSRTCLR_SRTC_MASK                  (0xFFFFFFFFU)
-#define SNVS_LPSRTCLR_SRTC_SHIFT                 (0U)
-#define SNVS_LPSRTCLR_SRTC(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCLR_SRTC_SHIFT)) & SNVS_LPSRTCLR_SRTC_MASK)
+#define SNVS_LPSRTCLR_SRTC_MASK  (0xFFFFFFFFU)
+#define SNVS_LPSRTCLR_SRTC_SHIFT (0U)
+#define SNVS_LPSRTCLR_SRTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCLR_SRTC_SHIFT)) & SNVS_LPSRTCLR_SRTC_MASK)
 /*! @} */
 
 /*! @name LPTAR - SNVS_LP Time Alarm Register */
 /*! @{ */
-#define SNVS_LPTAR_LPTA_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPTAR_LPTA_SHIFT                    (0U)
-#define SNVS_LPTAR_LPTA(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPTAR_LPTA_SHIFT)) & SNVS_LPTAR_LPTA_MASK)
+#define SNVS_LPTAR_LPTA_MASK  (0xFFFFFFFFU)
+#define SNVS_LPTAR_LPTA_SHIFT (0U)
+#define SNVS_LPTAR_LPTA(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTAR_LPTA_SHIFT)) & SNVS_LPTAR_LPTA_MASK)
 /*! @} */
 
 /*! @name LPSMCMR - SNVS_LP Secure Monotonic Counter MSB Register */
 /*! @{ */
-#define SNVS_LPSMCMR_MON_COUNTER_MASK            (0xFFFFU)
-#define SNVS_LPSMCMR_MON_COUNTER_SHIFT           (0U)
-#define SNVS_LPSMCMR_MON_COUNTER(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MON_COUNTER_SHIFT)) & SNVS_LPSMCMR_MON_COUNTER_MASK)
-#define SNVS_LPSMCMR_MC_ERA_BITS_MASK            (0xFFFF0000U)
-#define SNVS_LPSMCMR_MC_ERA_BITS_SHIFT           (16U)
-#define SNVS_LPSMCMR_MC_ERA_BITS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MC_ERA_BITS_SHIFT)) & SNVS_LPSMCMR_MC_ERA_BITS_MASK)
+#define SNVS_LPSMCMR_MON_COUNTER_MASK  (0xFFFFU)
+#define SNVS_LPSMCMR_MON_COUNTER_SHIFT (0U)
+#define SNVS_LPSMCMR_MON_COUNTER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MON_COUNTER_SHIFT)) & SNVS_LPSMCMR_MON_COUNTER_MASK)
+#define SNVS_LPSMCMR_MC_ERA_BITS_MASK  (0xFFFF0000U)
+#define SNVS_LPSMCMR_MC_ERA_BITS_SHIFT (16U)
+#define SNVS_LPSMCMR_MC_ERA_BITS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MC_ERA_BITS_SHIFT)) & SNVS_LPSMCMR_MC_ERA_BITS_MASK)
 /*! @} */
 
 /*! @name LPSMCLR - SNVS_LP Secure Monotonic Counter LSB Register */
 /*! @{ */
-#define SNVS_LPSMCLR_MON_COUNTER_MASK            (0xFFFFFFFFU)
-#define SNVS_LPSMCLR_MON_COUNTER_SHIFT           (0U)
-#define SNVS_LPSMCLR_MON_COUNTER(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCLR_MON_COUNTER_SHIFT)) & SNVS_LPSMCLR_MON_COUNTER_MASK)
+#define SNVS_LPSMCLR_MON_COUNTER_MASK  (0xFFFFFFFFU)
+#define SNVS_LPSMCLR_MON_COUNTER_SHIFT (0U)
+#define SNVS_LPSMCLR_MON_COUNTER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCLR_MON_COUNTER_SHIFT)) & SNVS_LPSMCLR_MON_COUNTER_MASK)
 /*! @} */
 
 /*! @name LPPGDR - SNVS_LP Power Glitch Detector Register */
 /*! @{ */
-#define SNVS_LPPGDR_PGD_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPPGDR_PGD_SHIFT                    (0U)
-#define SNVS_LPPGDR_PGD(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPPGDR_PGD_SHIFT)) & SNVS_LPPGDR_PGD_MASK)
+#define SNVS_LPPGDR_PGD_MASK  (0xFFFFFFFFU)
+#define SNVS_LPPGDR_PGD_SHIFT (0U)
+#define SNVS_LPPGDR_PGD(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPPGDR_PGD_SHIFT)) & SNVS_LPPGDR_PGD_MASK)
 /*! @} */
 
 /*! @name LPGPR0_LEGACY_ALIAS - SNVS_LP General Purpose Register 0 (legacy alias) */
 /*! @{ */
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK        (0xFFFFFFFFU)
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT       (0U)
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT)) & SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT (0U)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT)) & SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK)
 /*! @} */
 
 /*! @name LPZMKR - SNVS_LP Zeroizable Master Key Register */
 /*! @{ */
-#define SNVS_LPZMKR_ZMK_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPZMKR_ZMK_SHIFT                    (0U)
-#define SNVS_LPZMKR_ZMK(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPZMKR_ZMK_SHIFT)) & SNVS_LPZMKR_ZMK_MASK)
+#define SNVS_LPZMKR_ZMK_MASK  (0xFFFFFFFFU)
+#define SNVS_LPZMKR_ZMK_SHIFT (0U)
+#define SNVS_LPZMKR_ZMK(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPZMKR_ZMK_SHIFT)) & SNVS_LPZMKR_ZMK_MASK)
 /*! @} */
 
 /* The count of SNVS_LPZMKR */
-#define SNVS_LPZMKR_COUNT                        (8U)
+#define SNVS_LPZMKR_COUNT (8U)
 
 /*! @name LPGPR_ALIAS - SNVS_LP General Purpose Registers 0 .. 3 */
 /*! @{ */
-#define SNVS_LPGPR_ALIAS_GPR_MASK                (0xFFFFFFFFU)
-#define SNVS_LPGPR_ALIAS_GPR_SHIFT               (0U)
-#define SNVS_LPGPR_ALIAS_GPR(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_ALIAS_GPR_SHIFT)) & SNVS_LPGPR_ALIAS_GPR_MASK)
+#define SNVS_LPGPR_ALIAS_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR_ALIAS_GPR_SHIFT (0U)
+#define SNVS_LPGPR_ALIAS_GPR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_ALIAS_GPR_SHIFT)) & SNVS_LPGPR_ALIAS_GPR_MASK)
 /*! @} */
 
 /* The count of SNVS_LPGPR_ALIAS */
-#define SNVS_LPGPR_ALIAS_COUNT                   (4U)
+#define SNVS_LPGPR_ALIAS_COUNT (4U)
 
 /*! @name LPGPR - SNVS_LP General Purpose Registers 0 .. 7 */
 /*! @{ */
-#define SNVS_LPGPR_GPR_MASK                      (0xFFFFFFFFU)
-#define SNVS_LPGPR_GPR_SHIFT                     (0U)
-#define SNVS_LPGPR_GPR(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_GPR_SHIFT)) & SNVS_LPGPR_GPR_MASK)
+#define SNVS_LPGPR_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR_GPR_SHIFT (0U)
+#define SNVS_LPGPR_GPR(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_GPR_SHIFT)) & SNVS_LPGPR_GPR_MASK)
 /*! @} */
 
 /* The count of SNVS_LPGPR */
-#define SNVS_LPGPR_COUNT                         (8U)
+#define SNVS_LPGPR_COUNT (8U)
 
 /*! @name HPVIDR1 - SNVS_HP Version ID Register 1 */
 /*! @{ */
-#define SNVS_HPVIDR1_MINOR_REV_MASK              (0xFFU)
-#define SNVS_HPVIDR1_MINOR_REV_SHIFT             (0U)
-#define SNVS_HPVIDR1_MINOR_REV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MINOR_REV_SHIFT)) & SNVS_HPVIDR1_MINOR_REV_MASK)
-#define SNVS_HPVIDR1_MAJOR_REV_MASK              (0xFF00U)
-#define SNVS_HPVIDR1_MAJOR_REV_SHIFT             (8U)
-#define SNVS_HPVIDR1_MAJOR_REV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MAJOR_REV_SHIFT)) & SNVS_HPVIDR1_MAJOR_REV_MASK)
-#define SNVS_HPVIDR1_IP_ID_MASK                  (0xFFFF0000U)
-#define SNVS_HPVIDR1_IP_ID_SHIFT                 (16U)
-#define SNVS_HPVIDR1_IP_ID(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_IP_ID_SHIFT)) & SNVS_HPVIDR1_IP_ID_MASK)
+#define SNVS_HPVIDR1_MINOR_REV_MASK  (0xFFU)
+#define SNVS_HPVIDR1_MINOR_REV_SHIFT (0U)
+#define SNVS_HPVIDR1_MINOR_REV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MINOR_REV_SHIFT)) & SNVS_HPVIDR1_MINOR_REV_MASK)
+#define SNVS_HPVIDR1_MAJOR_REV_MASK  (0xFF00U)
+#define SNVS_HPVIDR1_MAJOR_REV_SHIFT (8U)
+#define SNVS_HPVIDR1_MAJOR_REV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MAJOR_REV_SHIFT)) & SNVS_HPVIDR1_MAJOR_REV_MASK)
+#define SNVS_HPVIDR1_IP_ID_MASK  (0xFFFF0000U)
+#define SNVS_HPVIDR1_IP_ID_SHIFT (16U)
+#define SNVS_HPVIDR1_IP_ID(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_IP_ID_SHIFT)) & SNVS_HPVIDR1_IP_ID_MASK)
 /*! @} */
 
 /*! @name HPVIDR2 - SNVS_HP Version ID Register 2 */
 /*! @{ */
-#define SNVS_HPVIDR2_CONFIG_OPT_MASK             (0xFFU)
-#define SNVS_HPVIDR2_CONFIG_OPT_SHIFT            (0U)
-#define SNVS_HPVIDR2_CONFIG_OPT(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_CONFIG_OPT_SHIFT)) & SNVS_HPVIDR2_CONFIG_OPT_MASK)
-#define SNVS_HPVIDR2_ECO_REV_MASK                (0xFF00U)
-#define SNVS_HPVIDR2_ECO_REV_SHIFT               (8U)
-#define SNVS_HPVIDR2_ECO_REV(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_ECO_REV_SHIFT)) & SNVS_HPVIDR2_ECO_REV_MASK)
-#define SNVS_HPVIDR2_INTG_OPT_MASK               (0xFF0000U)
-#define SNVS_HPVIDR2_INTG_OPT_SHIFT              (16U)
-#define SNVS_HPVIDR2_INTG_OPT(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_INTG_OPT_SHIFT)) & SNVS_HPVIDR2_INTG_OPT_MASK)
-#define SNVS_HPVIDR2_IP_ERA_MASK                 (0xFF000000U)
-#define SNVS_HPVIDR2_IP_ERA_SHIFT                (24U)
-#define SNVS_HPVIDR2_IP_ERA(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_IP_ERA_SHIFT)) & SNVS_HPVIDR2_IP_ERA_MASK)
+#define SNVS_HPVIDR2_CONFIG_OPT_MASK  (0xFFU)
+#define SNVS_HPVIDR2_CONFIG_OPT_SHIFT (0U)
+#define SNVS_HPVIDR2_CONFIG_OPT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_CONFIG_OPT_SHIFT)) & SNVS_HPVIDR2_CONFIG_OPT_MASK)
+#define SNVS_HPVIDR2_ECO_REV_MASK  (0xFF00U)
+#define SNVS_HPVIDR2_ECO_REV_SHIFT (8U)
+#define SNVS_HPVIDR2_ECO_REV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_ECO_REV_SHIFT)) & SNVS_HPVIDR2_ECO_REV_MASK)
+#define SNVS_HPVIDR2_INTG_OPT_MASK  (0xFF0000U)
+#define SNVS_HPVIDR2_INTG_OPT_SHIFT (16U)
+#define SNVS_HPVIDR2_INTG_OPT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_INTG_OPT_SHIFT)) & SNVS_HPVIDR2_INTG_OPT_MASK)
+#define SNVS_HPVIDR2_IP_ERA_MASK  (0xFF000000U)
+#define SNVS_HPVIDR2_IP_ERA_SHIFT (24U)
+#define SNVS_HPVIDR2_IP_ERA(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_IP_ERA_SHIFT)) & SNVS_HPVIDR2_IP_ERA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SNVS_Register_Masks */
 
-
 /* SNVS - Peripheral instance base addresses */
 /** Peripheral SNVS base address */
-#define SNVS_BASE                                (0x400D4000u)
+#define SNVS_BASE (0x400D4000u)
 /** Peripheral SNVS base pointer */
-#define SNVS                                     ((SNVS_Type *)SNVS_BASE)
+#define SNVS ((SNVS_Type *)SNVS_BASE)
 /** Array initializer of SNVS peripheral base addresses */
-#define SNVS_BASE_ADDRS                          { SNVS_BASE }
+#define SNVS_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        SNVS_BASE                                                                                                      \
+    }
 /** Array initializer of SNVS peripheral base pointers */
-#define SNVS_BASE_PTRS                           { SNVS }
+#define SNVS_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        SNVS                                                                                                           \
+    }
 /** Interrupt vectors for the SNVS peripheral type */
-#define SNVS_IRQS                                { SNVS_LP_WRAPPER_IRQn }
-#define SNVS_CONSOLIDATED_IRQS                   { SNVS_HP_WRAPPER_IRQn }
-#define SNVS_SECURITY_IRQS                       { SNVS_HP_WRAPPER_TZ_IRQn }
+#define SNVS_IRQS                                                                                                      \
+    {                                                                                                                  \
+        SNVS_LP_WRAPPER_IRQn                                                                                           \
+    }
+#define SNVS_CONSOLIDATED_IRQS                                                                                         \
+    {                                                                                                                  \
+        SNVS_HP_WRAPPER_IRQn                                                                                           \
+    }
+#define SNVS_SECURITY_IRQS                                                                                             \
+    {                                                                                                                  \
+        SNVS_HP_WRAPPER_TZ_IRQn                                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group SNVS_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SPDIF Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -19734,29 +22519,31 @@ typedef struct {
  */
 
 /** SPDIF - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SCR;                               /**< SPDIF Configuration Register, offset: 0x0 */
-  __IO uint32_t SRCD;                              /**< CDText Control Register, offset: 0x4 */
-  __IO uint32_t SRPC;                              /**< PhaseConfig Register, offset: 0x8 */
-  __IO uint32_t SIE;                               /**< InterruptEn Register, offset: 0xC */
-  union {                                          /* offset: 0x10 */
-    __O  uint32_t SIC;                               /**< InterruptClear Register, offset: 0x10 */
-    __I  uint32_t SIS;                               /**< InterruptStat Register, offset: 0x10 */
-  };
-  __I  uint32_t SRL;                               /**< SPDIFRxLeft Register, offset: 0x14 */
-  __I  uint32_t SRR;                               /**< SPDIFRxRight Register, offset: 0x18 */
-  __I  uint32_t SRCSH;                             /**< SPDIFRxCChannel_h Register, offset: 0x1C */
-  __I  uint32_t SRCSL;                             /**< SPDIFRxCChannel_l Register, offset: 0x20 */
-  __I  uint32_t SRU;                               /**< UchannelRx Register, offset: 0x24 */
-  __I  uint32_t SRQ;                               /**< QchannelRx Register, offset: 0x28 */
-  __O  uint32_t STL;                               /**< SPDIFTxLeft Register, offset: 0x2C */
-  __O  uint32_t STR;                               /**< SPDIFTxRight Register, offset: 0x30 */
-  __IO uint32_t STCSCH;                            /**< SPDIFTxCChannelCons_h Register, offset: 0x34 */
-  __IO uint32_t STCSCL;                            /**< SPDIFTxCChannelCons_l Register, offset: 0x38 */
-       uint8_t RESERVED_0[8];
-  __I  uint32_t SRFM;                              /**< FreqMeas Register, offset: 0x44 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t STC;                               /**< SPDIFTxClk Register, offset: 0x50 */
+typedef struct
+{
+    __IO uint32_t SCR;  /**< SPDIF Configuration Register, offset: 0x0 */
+    __IO uint32_t SRCD; /**< CDText Control Register, offset: 0x4 */
+    __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */
+    __IO uint32_t SIE;  /**< InterruptEn Register, offset: 0xC */
+    union
+    {                     /* offset: 0x10 */
+        __O uint32_t SIC; /**< InterruptClear Register, offset: 0x10 */
+        __I uint32_t SIS; /**< InterruptStat Register, offset: 0x10 */
+    };
+    __I uint32_t SRL;     /**< SPDIFRxLeft Register, offset: 0x14 */
+    __I uint32_t SRR;     /**< SPDIFRxRight Register, offset: 0x18 */
+    __I uint32_t SRCSH;   /**< SPDIFRxCChannel_h Register, offset: 0x1C */
+    __I uint32_t SRCSL;   /**< SPDIFRxCChannel_l Register, offset: 0x20 */
+    __I uint32_t SRU;     /**< UchannelRx Register, offset: 0x24 */
+    __I uint32_t SRQ;     /**< QchannelRx Register, offset: 0x28 */
+    __O uint32_t STL;     /**< SPDIFTxLeft Register, offset: 0x2C */
+    __O uint32_t STR;     /**< SPDIFTxRight Register, offset: 0x30 */
+    __IO uint32_t STCSCH; /**< SPDIFTxCChannelCons_h Register, offset: 0x34 */
+    __IO uint32_t STCSCL; /**< SPDIFTxCChannelCons_l Register, offset: 0x38 */
+    uint8_t RESERVED_0[8];
+    __I uint32_t SRFM; /**< FreqMeas Register, offset: 0x44 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t STC; /**< SPDIFTxClk Register, offset: 0x50 */
 } SPDIF_Type;
 
 /* ----------------------------------------------------------------------------
@@ -19770,351 +22557,386 @@ typedef struct {
 
 /*! @name SCR - SPDIF Configuration Register */
 /*! @{ */
-#define SPDIF_SCR_USRC_SEL_MASK                  (0x3U)
-#define SPDIF_SCR_USRC_SEL_SHIFT                 (0U)
-#define SPDIF_SCR_USRC_SEL(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_USRC_SEL_SHIFT)) & SPDIF_SCR_USRC_SEL_MASK)
-#define SPDIF_SCR_TXSEL_MASK                     (0x1CU)
-#define SPDIF_SCR_TXSEL_SHIFT                    (2U)
-#define SPDIF_SCR_TXSEL(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXSEL_SHIFT)) & SPDIF_SCR_TXSEL_MASK)
-#define SPDIF_SCR_VALCTRL_MASK                   (0x20U)
-#define SPDIF_SCR_VALCTRL_SHIFT                  (5U)
-#define SPDIF_SCR_VALCTRL(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_VALCTRL_SHIFT)) & SPDIF_SCR_VALCTRL_MASK)
-#define SPDIF_SCR_DMA_TX_EN_MASK                 (0x100U)
-#define SPDIF_SCR_DMA_TX_EN_SHIFT                (8U)
-#define SPDIF_SCR_DMA_TX_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_TX_EN_SHIFT)) & SPDIF_SCR_DMA_TX_EN_MASK)
-#define SPDIF_SCR_DMA_RX_EN_MASK                 (0x200U)
-#define SPDIF_SCR_DMA_RX_EN_SHIFT                (9U)
-#define SPDIF_SCR_DMA_RX_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_RX_EN_SHIFT)) & SPDIF_SCR_DMA_RX_EN_MASK)
-#define SPDIF_SCR_TXFIFO_CTRL_MASK               (0xC00U)
-#define SPDIF_SCR_TXFIFO_CTRL_SHIFT              (10U)
-#define SPDIF_SCR_TXFIFO_CTRL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFO_CTRL_SHIFT)) & SPDIF_SCR_TXFIFO_CTRL_MASK)
-#define SPDIF_SCR_SOFT_RESET_MASK                (0x1000U)
-#define SPDIF_SCR_SOFT_RESET_SHIFT               (12U)
-#define SPDIF_SCR_SOFT_RESET(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_SOFT_RESET_SHIFT)) & SPDIF_SCR_SOFT_RESET_MASK)
-#define SPDIF_SCR_LOW_POWER_MASK                 (0x2000U)
-#define SPDIF_SCR_LOW_POWER_SHIFT                (13U)
-#define SPDIF_SCR_LOW_POWER(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_LOW_POWER_SHIFT)) & SPDIF_SCR_LOW_POWER_MASK)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL_MASK           (0x18000U)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT          (15U)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL(x)             (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT)) & SPDIF_SCR_TXFIFOEMPTY_SEL_MASK)
-#define SPDIF_SCR_TXAUTOSYNC_MASK                (0x20000U)
-#define SPDIF_SCR_TXAUTOSYNC_SHIFT               (17U)
-#define SPDIF_SCR_TXAUTOSYNC(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXAUTOSYNC_SHIFT)) & SPDIF_SCR_TXAUTOSYNC_MASK)
-#define SPDIF_SCR_RXAUTOSYNC_MASK                (0x40000U)
-#define SPDIF_SCR_RXAUTOSYNC_SHIFT               (18U)
-#define SPDIF_SCR_RXAUTOSYNC(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXAUTOSYNC_SHIFT)) & SPDIF_SCR_RXAUTOSYNC_MASK)
-#define SPDIF_SCR_RXFIFOFULL_SEL_MASK            (0x180000U)
-#define SPDIF_SCR_RXFIFOFULL_SEL_SHIFT           (19U)
-#define SPDIF_SCR_RXFIFOFULL_SEL(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFOFULL_SEL_SHIFT)) & SPDIF_SCR_RXFIFOFULL_SEL_MASK)
-#define SPDIF_SCR_RXFIFO_RST_MASK                (0x200000U)
-#define SPDIF_SCR_RXFIFO_RST_SHIFT               (21U)
-#define SPDIF_SCR_RXFIFO_RST(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_RST_SHIFT)) & SPDIF_SCR_RXFIFO_RST_MASK)
-#define SPDIF_SCR_RXFIFO_OFF_ON_MASK             (0x400000U)
-#define SPDIF_SCR_RXFIFO_OFF_ON_SHIFT            (22U)
-#define SPDIF_SCR_RXFIFO_OFF_ON(x)               (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_OFF_ON_SHIFT)) & SPDIF_SCR_RXFIFO_OFF_ON_MASK)
-#define SPDIF_SCR_RXFIFO_CTRL_MASK               (0x800000U)
-#define SPDIF_SCR_RXFIFO_CTRL_SHIFT              (23U)
-#define SPDIF_SCR_RXFIFO_CTRL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_CTRL_SHIFT)) & SPDIF_SCR_RXFIFO_CTRL_MASK)
+#define SPDIF_SCR_USRC_SEL_MASK     (0x3U)
+#define SPDIF_SCR_USRC_SEL_SHIFT    (0U)
+#define SPDIF_SCR_USRC_SEL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_USRC_SEL_SHIFT)) & SPDIF_SCR_USRC_SEL_MASK)
+#define SPDIF_SCR_TXSEL_MASK        (0x1CU)
+#define SPDIF_SCR_TXSEL_SHIFT       (2U)
+#define SPDIF_SCR_TXSEL(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXSEL_SHIFT)) & SPDIF_SCR_TXSEL_MASK)
+#define SPDIF_SCR_VALCTRL_MASK      (0x20U)
+#define SPDIF_SCR_VALCTRL_SHIFT     (5U)
+#define SPDIF_SCR_VALCTRL(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_VALCTRL_SHIFT)) & SPDIF_SCR_VALCTRL_MASK)
+#define SPDIF_SCR_DMA_TX_EN_MASK    (0x100U)
+#define SPDIF_SCR_DMA_TX_EN_SHIFT   (8U)
+#define SPDIF_SCR_DMA_TX_EN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_TX_EN_SHIFT)) & SPDIF_SCR_DMA_TX_EN_MASK)
+#define SPDIF_SCR_DMA_RX_EN_MASK    (0x200U)
+#define SPDIF_SCR_DMA_RX_EN_SHIFT   (9U)
+#define SPDIF_SCR_DMA_RX_EN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_RX_EN_SHIFT)) & SPDIF_SCR_DMA_RX_EN_MASK)
+#define SPDIF_SCR_TXFIFO_CTRL_MASK  (0xC00U)
+#define SPDIF_SCR_TXFIFO_CTRL_SHIFT (10U)
+#define SPDIF_SCR_TXFIFO_CTRL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFO_CTRL_SHIFT)) & SPDIF_SCR_TXFIFO_CTRL_MASK)
+#define SPDIF_SCR_SOFT_RESET_MASK  (0x1000U)
+#define SPDIF_SCR_SOFT_RESET_SHIFT (12U)
+#define SPDIF_SCR_SOFT_RESET(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_SOFT_RESET_SHIFT)) & SPDIF_SCR_SOFT_RESET_MASK)
+#define SPDIF_SCR_LOW_POWER_MASK        (0x2000U)
+#define SPDIF_SCR_LOW_POWER_SHIFT       (13U)
+#define SPDIF_SCR_LOW_POWER(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_LOW_POWER_SHIFT)) & SPDIF_SCR_LOW_POWER_MASK)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL_MASK  (0x18000U)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT (15U)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT)) & SPDIF_SCR_TXFIFOEMPTY_SEL_MASK)
+#define SPDIF_SCR_TXAUTOSYNC_MASK  (0x20000U)
+#define SPDIF_SCR_TXAUTOSYNC_SHIFT (17U)
+#define SPDIF_SCR_TXAUTOSYNC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXAUTOSYNC_SHIFT)) & SPDIF_SCR_TXAUTOSYNC_MASK)
+#define SPDIF_SCR_RXAUTOSYNC_MASK  (0x40000U)
+#define SPDIF_SCR_RXAUTOSYNC_SHIFT (18U)
+#define SPDIF_SCR_RXAUTOSYNC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXAUTOSYNC_SHIFT)) & SPDIF_SCR_RXAUTOSYNC_MASK)
+#define SPDIF_SCR_RXFIFOFULL_SEL_MASK  (0x180000U)
+#define SPDIF_SCR_RXFIFOFULL_SEL_SHIFT (19U)
+#define SPDIF_SCR_RXFIFOFULL_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFOFULL_SEL_SHIFT)) & SPDIF_SCR_RXFIFOFULL_SEL_MASK)
+#define SPDIF_SCR_RXFIFO_RST_MASK  (0x200000U)
+#define SPDIF_SCR_RXFIFO_RST_SHIFT (21U)
+#define SPDIF_SCR_RXFIFO_RST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_RST_SHIFT)) & SPDIF_SCR_RXFIFO_RST_MASK)
+#define SPDIF_SCR_RXFIFO_OFF_ON_MASK  (0x400000U)
+#define SPDIF_SCR_RXFIFO_OFF_ON_SHIFT (22U)
+#define SPDIF_SCR_RXFIFO_OFF_ON(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_OFF_ON_SHIFT)) & SPDIF_SCR_RXFIFO_OFF_ON_MASK)
+#define SPDIF_SCR_RXFIFO_CTRL_MASK  (0x800000U)
+#define SPDIF_SCR_RXFIFO_CTRL_SHIFT (23U)
+#define SPDIF_SCR_RXFIFO_CTRL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_CTRL_SHIFT)) & SPDIF_SCR_RXFIFO_CTRL_MASK)
 /*! @} */
 
 /*! @name SRCD - CDText Control Register */
 /*! @{ */
-#define SPDIF_SRCD_USYNCMODE_MASK                (0x2U)
-#define SPDIF_SRCD_USYNCMODE_SHIFT               (1U)
-#define SPDIF_SRCD_USYNCMODE(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCD_USYNCMODE_SHIFT)) & SPDIF_SRCD_USYNCMODE_MASK)
+#define SPDIF_SRCD_USYNCMODE_MASK  (0x2U)
+#define SPDIF_SRCD_USYNCMODE_SHIFT (1U)
+#define SPDIF_SRCD_USYNCMODE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCD_USYNCMODE_SHIFT)) & SPDIF_SRCD_USYNCMODE_MASK)
 /*! @} */
 
 /*! @name SRPC - PhaseConfig Register */
 /*! @{ */
-#define SPDIF_SRPC_GAINSEL_MASK                  (0x38U)
-#define SPDIF_SRPC_GAINSEL_SHIFT                 (3U)
-#define SPDIF_SRPC_GAINSEL(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_GAINSEL_SHIFT)) & SPDIF_SRPC_GAINSEL_MASK)
-#define SPDIF_SRPC_LOCK_MASK                     (0x40U)
-#define SPDIF_SRPC_LOCK_SHIFT                    (6U)
-#define SPDIF_SRPC_LOCK(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_LOCK_SHIFT)) & SPDIF_SRPC_LOCK_MASK)
-#define SPDIF_SRPC_CLKSRC_SEL_MASK               (0x780U)
-#define SPDIF_SRPC_CLKSRC_SEL_SHIFT              (7U)
-#define SPDIF_SRPC_CLKSRC_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_CLKSRC_SEL_SHIFT)) & SPDIF_SRPC_CLKSRC_SEL_MASK)
+#define SPDIF_SRPC_GAINSEL_MASK     (0x38U)
+#define SPDIF_SRPC_GAINSEL_SHIFT    (3U)
+#define SPDIF_SRPC_GAINSEL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_GAINSEL_SHIFT)) & SPDIF_SRPC_GAINSEL_MASK)
+#define SPDIF_SRPC_LOCK_MASK        (0x40U)
+#define SPDIF_SRPC_LOCK_SHIFT       (6U)
+#define SPDIF_SRPC_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_LOCK_SHIFT)) & SPDIF_SRPC_LOCK_MASK)
+#define SPDIF_SRPC_CLKSRC_SEL_MASK  (0x780U)
+#define SPDIF_SRPC_CLKSRC_SEL_SHIFT (7U)
+#define SPDIF_SRPC_CLKSRC_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_CLKSRC_SEL_SHIFT)) & SPDIF_SRPC_CLKSRC_SEL_MASK)
 /*! @} */
 
 /*! @name SIE - InterruptEn Register */
 /*! @{ */
-#define SPDIF_SIE_RXFIFOFUL_MASK                 (0x1U)
-#define SPDIF_SIE_RXFIFOFUL_SHIFT                (0U)
-#define SPDIF_SIE_RXFIFOFUL(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOFUL_SHIFT)) & SPDIF_SIE_RXFIFOFUL_MASK)
-#define SPDIF_SIE_TXEM_MASK                      (0x2U)
-#define SPDIF_SIE_TXEM_SHIFT                     (1U)
-#define SPDIF_SIE_TXEM(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXEM_SHIFT)) & SPDIF_SIE_TXEM_MASK)
-#define SPDIF_SIE_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIE_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIE_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCKLOSS_SHIFT)) & SPDIF_SIE_LOCKLOSS_MASK)
-#define SPDIF_SIE_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIE_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIE_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFORESYN_SHIFT)) & SPDIF_SIE_RXFIFORESYN_MASK)
-#define SPDIF_SIE_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIE_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIE_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOUNOV_SHIFT)) & SPDIF_SIE_RXFIFOUNOV_MASK)
-#define SPDIF_SIE_UQERR_MASK                     (0x20U)
-#define SPDIF_SIE_UQERR_SHIFT                    (5U)
-#define SPDIF_SIE_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQERR_SHIFT)) & SPDIF_SIE_UQERR_MASK)
-#define SPDIF_SIE_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIE_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIE_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQSYNC_SHIFT)) & SPDIF_SIE_UQSYNC_MASK)
-#define SPDIF_SIE_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIE_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIE_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXOV_SHIFT)) & SPDIF_SIE_QRXOV_MASK)
-#define SPDIF_SIE_QRXFUL_MASK                    (0x100U)
-#define SPDIF_SIE_QRXFUL_SHIFT                   (8U)
-#define SPDIF_SIE_QRXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXFUL_SHIFT)) & SPDIF_SIE_QRXFUL_MASK)
-#define SPDIF_SIE_URXOV_MASK                     (0x200U)
-#define SPDIF_SIE_URXOV_SHIFT                    (9U)
-#define SPDIF_SIE_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXOV_SHIFT)) & SPDIF_SIE_URXOV_MASK)
-#define SPDIF_SIE_URXFUL_MASK                    (0x400U)
-#define SPDIF_SIE_URXFUL_SHIFT                   (10U)
-#define SPDIF_SIE_URXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXFUL_SHIFT)) & SPDIF_SIE_URXFUL_MASK)
-#define SPDIF_SIE_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIE_BITERR_SHIFT                   (14U)
-#define SPDIF_SIE_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_BITERR_SHIFT)) & SPDIF_SIE_BITERR_MASK)
-#define SPDIF_SIE_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIE_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIE_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_SYMERR_SHIFT)) & SPDIF_SIE_SYMERR_MASK)
-#define SPDIF_SIE_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIE_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIE_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_VALNOGOOD_SHIFT)) & SPDIF_SIE_VALNOGOOD_MASK)
-#define SPDIF_SIE_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIE_CNEW_SHIFT                     (17U)
-#define SPDIF_SIE_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_CNEW_SHIFT)) & SPDIF_SIE_CNEW_MASK)
-#define SPDIF_SIE_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIE_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIE_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXRESYN_SHIFT)) & SPDIF_SIE_TXRESYN_MASK)
-#define SPDIF_SIE_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIE_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIE_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXUNOV_SHIFT)) & SPDIF_SIE_TXUNOV_MASK)
-#define SPDIF_SIE_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIE_LOCK_SHIFT                     (20U)
-#define SPDIF_SIE_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCK_SHIFT)) & SPDIF_SIE_LOCK_MASK)
+#define SPDIF_SIE_RXFIFOFUL_MASK    (0x1U)
+#define SPDIF_SIE_RXFIFOFUL_SHIFT   (0U)
+#define SPDIF_SIE_RXFIFOFUL(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOFUL_SHIFT)) & SPDIF_SIE_RXFIFOFUL_MASK)
+#define SPDIF_SIE_TXEM_MASK         (0x2U)
+#define SPDIF_SIE_TXEM_SHIFT        (1U)
+#define SPDIF_SIE_TXEM(x)           (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXEM_SHIFT)) & SPDIF_SIE_TXEM_MASK)
+#define SPDIF_SIE_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIE_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIE_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCKLOSS_SHIFT)) & SPDIF_SIE_LOCKLOSS_MASK)
+#define SPDIF_SIE_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIE_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIE_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFORESYN_SHIFT)) & SPDIF_SIE_RXFIFORESYN_MASK)
+#define SPDIF_SIE_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIE_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIE_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOUNOV_SHIFT)) & SPDIF_SIE_RXFIFOUNOV_MASK)
+#define SPDIF_SIE_UQERR_MASK      (0x20U)
+#define SPDIF_SIE_UQERR_SHIFT     (5U)
+#define SPDIF_SIE_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQERR_SHIFT)) & SPDIF_SIE_UQERR_MASK)
+#define SPDIF_SIE_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIE_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIE_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQSYNC_SHIFT)) & SPDIF_SIE_UQSYNC_MASK)
+#define SPDIF_SIE_QRXOV_MASK      (0x80U)
+#define SPDIF_SIE_QRXOV_SHIFT     (7U)
+#define SPDIF_SIE_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXOV_SHIFT)) & SPDIF_SIE_QRXOV_MASK)
+#define SPDIF_SIE_QRXFUL_MASK     (0x100U)
+#define SPDIF_SIE_QRXFUL_SHIFT    (8U)
+#define SPDIF_SIE_QRXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXFUL_SHIFT)) & SPDIF_SIE_QRXFUL_MASK)
+#define SPDIF_SIE_URXOV_MASK      (0x200U)
+#define SPDIF_SIE_URXOV_SHIFT     (9U)
+#define SPDIF_SIE_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXOV_SHIFT)) & SPDIF_SIE_URXOV_MASK)
+#define SPDIF_SIE_URXFUL_MASK     (0x400U)
+#define SPDIF_SIE_URXFUL_SHIFT    (10U)
+#define SPDIF_SIE_URXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXFUL_SHIFT)) & SPDIF_SIE_URXFUL_MASK)
+#define SPDIF_SIE_BITERR_MASK     (0x4000U)
+#define SPDIF_SIE_BITERR_SHIFT    (14U)
+#define SPDIF_SIE_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_BITERR_SHIFT)) & SPDIF_SIE_BITERR_MASK)
+#define SPDIF_SIE_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIE_SYMERR_SHIFT    (15U)
+#define SPDIF_SIE_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_SYMERR_SHIFT)) & SPDIF_SIE_SYMERR_MASK)
+#define SPDIF_SIE_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIE_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIE_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_VALNOGOOD_SHIFT)) & SPDIF_SIE_VALNOGOOD_MASK)
+#define SPDIF_SIE_CNEW_MASK       (0x20000U)
+#define SPDIF_SIE_CNEW_SHIFT      (17U)
+#define SPDIF_SIE_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_CNEW_SHIFT)) & SPDIF_SIE_CNEW_MASK)
+#define SPDIF_SIE_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIE_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIE_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXRESYN_SHIFT)) & SPDIF_SIE_TXRESYN_MASK)
+#define SPDIF_SIE_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIE_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIE_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXUNOV_SHIFT)) & SPDIF_SIE_TXUNOV_MASK)
+#define SPDIF_SIE_LOCK_MASK       (0x100000U)
+#define SPDIF_SIE_LOCK_SHIFT      (20U)
+#define SPDIF_SIE_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCK_SHIFT)) & SPDIF_SIE_LOCK_MASK)
 /*! @} */
 
 /*! @name SIC - InterruptClear Register */
 /*! @{ */
-#define SPDIF_SIC_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIC_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIC_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCKLOSS_SHIFT)) & SPDIF_SIC_LOCKLOSS_MASK)
-#define SPDIF_SIC_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIC_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIC_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFORESYN_SHIFT)) & SPDIF_SIC_RXFIFORESYN_MASK)
-#define SPDIF_SIC_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIC_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIC_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFOUNOV_SHIFT)) & SPDIF_SIC_RXFIFOUNOV_MASK)
-#define SPDIF_SIC_UQERR_MASK                     (0x20U)
-#define SPDIF_SIC_UQERR_SHIFT                    (5U)
-#define SPDIF_SIC_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQERR_SHIFT)) & SPDIF_SIC_UQERR_MASK)
-#define SPDIF_SIC_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIC_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIC_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQSYNC_SHIFT)) & SPDIF_SIC_UQSYNC_MASK)
-#define SPDIF_SIC_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIC_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIC_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_QRXOV_SHIFT)) & SPDIF_SIC_QRXOV_MASK)
-#define SPDIF_SIC_URXOV_MASK                     (0x200U)
-#define SPDIF_SIC_URXOV_SHIFT                    (9U)
-#define SPDIF_SIC_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_URXOV_SHIFT)) & SPDIF_SIC_URXOV_MASK)
-#define SPDIF_SIC_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIC_BITERR_SHIFT                   (14U)
-#define SPDIF_SIC_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_BITERR_SHIFT)) & SPDIF_SIC_BITERR_MASK)
-#define SPDIF_SIC_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIC_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIC_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_SYMERR_SHIFT)) & SPDIF_SIC_SYMERR_MASK)
-#define SPDIF_SIC_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIC_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIC_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_VALNOGOOD_SHIFT)) & SPDIF_SIC_VALNOGOOD_MASK)
-#define SPDIF_SIC_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIC_CNEW_SHIFT                     (17U)
-#define SPDIF_SIC_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_CNEW_SHIFT)) & SPDIF_SIC_CNEW_MASK)
-#define SPDIF_SIC_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIC_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIC_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXRESYN_SHIFT)) & SPDIF_SIC_TXRESYN_MASK)
-#define SPDIF_SIC_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIC_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIC_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXUNOV_SHIFT)) & SPDIF_SIC_TXUNOV_MASK)
-#define SPDIF_SIC_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIC_LOCK_SHIFT                     (20U)
-#define SPDIF_SIC_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCK_SHIFT)) & SPDIF_SIC_LOCK_MASK)
+#define SPDIF_SIC_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIC_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIC_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCKLOSS_SHIFT)) & SPDIF_SIC_LOCKLOSS_MASK)
+#define SPDIF_SIC_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIC_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIC_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFORESYN_SHIFT)) & SPDIF_SIC_RXFIFORESYN_MASK)
+#define SPDIF_SIC_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIC_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIC_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFOUNOV_SHIFT)) & SPDIF_SIC_RXFIFOUNOV_MASK)
+#define SPDIF_SIC_UQERR_MASK      (0x20U)
+#define SPDIF_SIC_UQERR_SHIFT     (5U)
+#define SPDIF_SIC_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQERR_SHIFT)) & SPDIF_SIC_UQERR_MASK)
+#define SPDIF_SIC_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIC_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIC_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQSYNC_SHIFT)) & SPDIF_SIC_UQSYNC_MASK)
+#define SPDIF_SIC_QRXOV_MASK      (0x80U)
+#define SPDIF_SIC_QRXOV_SHIFT     (7U)
+#define SPDIF_SIC_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_QRXOV_SHIFT)) & SPDIF_SIC_QRXOV_MASK)
+#define SPDIF_SIC_URXOV_MASK      (0x200U)
+#define SPDIF_SIC_URXOV_SHIFT     (9U)
+#define SPDIF_SIC_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_URXOV_SHIFT)) & SPDIF_SIC_URXOV_MASK)
+#define SPDIF_SIC_BITERR_MASK     (0x4000U)
+#define SPDIF_SIC_BITERR_SHIFT    (14U)
+#define SPDIF_SIC_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_BITERR_SHIFT)) & SPDIF_SIC_BITERR_MASK)
+#define SPDIF_SIC_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIC_SYMERR_SHIFT    (15U)
+#define SPDIF_SIC_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_SYMERR_SHIFT)) & SPDIF_SIC_SYMERR_MASK)
+#define SPDIF_SIC_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIC_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIC_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_VALNOGOOD_SHIFT)) & SPDIF_SIC_VALNOGOOD_MASK)
+#define SPDIF_SIC_CNEW_MASK       (0x20000U)
+#define SPDIF_SIC_CNEW_SHIFT      (17U)
+#define SPDIF_SIC_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_CNEW_SHIFT)) & SPDIF_SIC_CNEW_MASK)
+#define SPDIF_SIC_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIC_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIC_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXRESYN_SHIFT)) & SPDIF_SIC_TXRESYN_MASK)
+#define SPDIF_SIC_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIC_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIC_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXUNOV_SHIFT)) & SPDIF_SIC_TXUNOV_MASK)
+#define SPDIF_SIC_LOCK_MASK       (0x100000U)
+#define SPDIF_SIC_LOCK_SHIFT      (20U)
+#define SPDIF_SIC_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCK_SHIFT)) & SPDIF_SIC_LOCK_MASK)
 /*! @} */
 
 /*! @name SIS - InterruptStat Register */
 /*! @{ */
-#define SPDIF_SIS_RXFIFOFUL_MASK                 (0x1U)
-#define SPDIF_SIS_RXFIFOFUL_SHIFT                (0U)
-#define SPDIF_SIS_RXFIFOFUL(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOFUL_SHIFT)) & SPDIF_SIS_RXFIFOFUL_MASK)
-#define SPDIF_SIS_TXEM_MASK                      (0x2U)
-#define SPDIF_SIS_TXEM_SHIFT                     (1U)
-#define SPDIF_SIS_TXEM(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXEM_SHIFT)) & SPDIF_SIS_TXEM_MASK)
-#define SPDIF_SIS_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIS_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIS_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCKLOSS_SHIFT)) & SPDIF_SIS_LOCKLOSS_MASK)
-#define SPDIF_SIS_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIS_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIS_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFORESYN_SHIFT)) & SPDIF_SIS_RXFIFORESYN_MASK)
-#define SPDIF_SIS_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIS_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIS_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOUNOV_SHIFT)) & SPDIF_SIS_RXFIFOUNOV_MASK)
-#define SPDIF_SIS_UQERR_MASK                     (0x20U)
-#define SPDIF_SIS_UQERR_SHIFT                    (5U)
-#define SPDIF_SIS_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQERR_SHIFT)) & SPDIF_SIS_UQERR_MASK)
-#define SPDIF_SIS_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIS_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIS_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQSYNC_SHIFT)) & SPDIF_SIS_UQSYNC_MASK)
-#define SPDIF_SIS_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIS_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIS_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXOV_SHIFT)) & SPDIF_SIS_QRXOV_MASK)
-#define SPDIF_SIS_QRXFUL_MASK                    (0x100U)
-#define SPDIF_SIS_QRXFUL_SHIFT                   (8U)
-#define SPDIF_SIS_QRXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXFUL_SHIFT)) & SPDIF_SIS_QRXFUL_MASK)
-#define SPDIF_SIS_URXOV_MASK                     (0x200U)
-#define SPDIF_SIS_URXOV_SHIFT                    (9U)
-#define SPDIF_SIS_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXOV_SHIFT)) & SPDIF_SIS_URXOV_MASK)
-#define SPDIF_SIS_URXFUL_MASK                    (0x400U)
-#define SPDIF_SIS_URXFUL_SHIFT                   (10U)
-#define SPDIF_SIS_URXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXFUL_SHIFT)) & SPDIF_SIS_URXFUL_MASK)
-#define SPDIF_SIS_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIS_BITERR_SHIFT                   (14U)
-#define SPDIF_SIS_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_BITERR_SHIFT)) & SPDIF_SIS_BITERR_MASK)
-#define SPDIF_SIS_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIS_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIS_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_SYMERR_SHIFT)) & SPDIF_SIS_SYMERR_MASK)
-#define SPDIF_SIS_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIS_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIS_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_VALNOGOOD_SHIFT)) & SPDIF_SIS_VALNOGOOD_MASK)
-#define SPDIF_SIS_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIS_CNEW_SHIFT                     (17U)
-#define SPDIF_SIS_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_CNEW_SHIFT)) & SPDIF_SIS_CNEW_MASK)
-#define SPDIF_SIS_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIS_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIS_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXRESYN_SHIFT)) & SPDIF_SIS_TXRESYN_MASK)
-#define SPDIF_SIS_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIS_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIS_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXUNOV_SHIFT)) & SPDIF_SIS_TXUNOV_MASK)
-#define SPDIF_SIS_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIS_LOCK_SHIFT                     (20U)
-#define SPDIF_SIS_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCK_SHIFT)) & SPDIF_SIS_LOCK_MASK)
+#define SPDIF_SIS_RXFIFOFUL_MASK    (0x1U)
+#define SPDIF_SIS_RXFIFOFUL_SHIFT   (0U)
+#define SPDIF_SIS_RXFIFOFUL(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOFUL_SHIFT)) & SPDIF_SIS_RXFIFOFUL_MASK)
+#define SPDIF_SIS_TXEM_MASK         (0x2U)
+#define SPDIF_SIS_TXEM_SHIFT        (1U)
+#define SPDIF_SIS_TXEM(x)           (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXEM_SHIFT)) & SPDIF_SIS_TXEM_MASK)
+#define SPDIF_SIS_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIS_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIS_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCKLOSS_SHIFT)) & SPDIF_SIS_LOCKLOSS_MASK)
+#define SPDIF_SIS_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIS_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIS_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFORESYN_SHIFT)) & SPDIF_SIS_RXFIFORESYN_MASK)
+#define SPDIF_SIS_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIS_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIS_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOUNOV_SHIFT)) & SPDIF_SIS_RXFIFOUNOV_MASK)
+#define SPDIF_SIS_UQERR_MASK      (0x20U)
+#define SPDIF_SIS_UQERR_SHIFT     (5U)
+#define SPDIF_SIS_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQERR_SHIFT)) & SPDIF_SIS_UQERR_MASK)
+#define SPDIF_SIS_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIS_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIS_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQSYNC_SHIFT)) & SPDIF_SIS_UQSYNC_MASK)
+#define SPDIF_SIS_QRXOV_MASK      (0x80U)
+#define SPDIF_SIS_QRXOV_SHIFT     (7U)
+#define SPDIF_SIS_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXOV_SHIFT)) & SPDIF_SIS_QRXOV_MASK)
+#define SPDIF_SIS_QRXFUL_MASK     (0x100U)
+#define SPDIF_SIS_QRXFUL_SHIFT    (8U)
+#define SPDIF_SIS_QRXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXFUL_SHIFT)) & SPDIF_SIS_QRXFUL_MASK)
+#define SPDIF_SIS_URXOV_MASK      (0x200U)
+#define SPDIF_SIS_URXOV_SHIFT     (9U)
+#define SPDIF_SIS_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXOV_SHIFT)) & SPDIF_SIS_URXOV_MASK)
+#define SPDIF_SIS_URXFUL_MASK     (0x400U)
+#define SPDIF_SIS_URXFUL_SHIFT    (10U)
+#define SPDIF_SIS_URXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXFUL_SHIFT)) & SPDIF_SIS_URXFUL_MASK)
+#define SPDIF_SIS_BITERR_MASK     (0x4000U)
+#define SPDIF_SIS_BITERR_SHIFT    (14U)
+#define SPDIF_SIS_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_BITERR_SHIFT)) & SPDIF_SIS_BITERR_MASK)
+#define SPDIF_SIS_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIS_SYMERR_SHIFT    (15U)
+#define SPDIF_SIS_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_SYMERR_SHIFT)) & SPDIF_SIS_SYMERR_MASK)
+#define SPDIF_SIS_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIS_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIS_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_VALNOGOOD_SHIFT)) & SPDIF_SIS_VALNOGOOD_MASK)
+#define SPDIF_SIS_CNEW_MASK       (0x20000U)
+#define SPDIF_SIS_CNEW_SHIFT      (17U)
+#define SPDIF_SIS_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_CNEW_SHIFT)) & SPDIF_SIS_CNEW_MASK)
+#define SPDIF_SIS_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIS_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIS_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXRESYN_SHIFT)) & SPDIF_SIS_TXRESYN_MASK)
+#define SPDIF_SIS_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIS_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIS_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXUNOV_SHIFT)) & SPDIF_SIS_TXUNOV_MASK)
+#define SPDIF_SIS_LOCK_MASK       (0x100000U)
+#define SPDIF_SIS_LOCK_SHIFT      (20U)
+#define SPDIF_SIS_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCK_SHIFT)) & SPDIF_SIS_LOCK_MASK)
 /*! @} */
 
 /*! @name SRL - SPDIFRxLeft Register */
 /*! @{ */
-#define SPDIF_SRL_RXDATALEFT_MASK                (0xFFFFFFU)
-#define SPDIF_SRL_RXDATALEFT_SHIFT               (0U)
-#define SPDIF_SRL_RXDATALEFT(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRL_RXDATALEFT_SHIFT)) & SPDIF_SRL_RXDATALEFT_MASK)
+#define SPDIF_SRL_RXDATALEFT_MASK  (0xFFFFFFU)
+#define SPDIF_SRL_RXDATALEFT_SHIFT (0U)
+#define SPDIF_SRL_RXDATALEFT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRL_RXDATALEFT_SHIFT)) & SPDIF_SRL_RXDATALEFT_MASK)
 /*! @} */
 
 /*! @name SRR - SPDIFRxRight Register */
 /*! @{ */
-#define SPDIF_SRR_RXDATARIGHT_MASK               (0xFFFFFFU)
-#define SPDIF_SRR_RXDATARIGHT_SHIFT              (0U)
-#define SPDIF_SRR_RXDATARIGHT(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SRR_RXDATARIGHT_SHIFT)) & SPDIF_SRR_RXDATARIGHT_MASK)
+#define SPDIF_SRR_RXDATARIGHT_MASK  (0xFFFFFFU)
+#define SPDIF_SRR_RXDATARIGHT_SHIFT (0U)
+#define SPDIF_SRR_RXDATARIGHT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRR_RXDATARIGHT_SHIFT)) & SPDIF_SRR_RXDATARIGHT_MASK)
 /*! @} */
 
 /*! @name SRCSH - SPDIFRxCChannel_h Register */
 /*! @{ */
-#define SPDIF_SRCSH_RXCCHANNEL_H_MASK            (0xFFFFFFU)
-#define SPDIF_SRCSH_RXCCHANNEL_H_SHIFT           (0U)
-#define SPDIF_SRCSH_RXCCHANNEL_H(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSH_RXCCHANNEL_H_SHIFT)) & SPDIF_SRCSH_RXCCHANNEL_H_MASK)
+#define SPDIF_SRCSH_RXCCHANNEL_H_MASK  (0xFFFFFFU)
+#define SPDIF_SRCSH_RXCCHANNEL_H_SHIFT (0U)
+#define SPDIF_SRCSH_RXCCHANNEL_H(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSH_RXCCHANNEL_H_SHIFT)) & SPDIF_SRCSH_RXCCHANNEL_H_MASK)
 /*! @} */
 
 /*! @name SRCSL - SPDIFRxCChannel_l Register */
 /*! @{ */
-#define SPDIF_SRCSL_RXCCHANNEL_L_MASK            (0xFFFFFFU)
-#define SPDIF_SRCSL_RXCCHANNEL_L_SHIFT           (0U)
-#define SPDIF_SRCSL_RXCCHANNEL_L(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSL_RXCCHANNEL_L_SHIFT)) & SPDIF_SRCSL_RXCCHANNEL_L_MASK)
+#define SPDIF_SRCSL_RXCCHANNEL_L_MASK  (0xFFFFFFU)
+#define SPDIF_SRCSL_RXCCHANNEL_L_SHIFT (0U)
+#define SPDIF_SRCSL_RXCCHANNEL_L(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSL_RXCCHANNEL_L_SHIFT)) & SPDIF_SRCSL_RXCCHANNEL_L_MASK)
 /*! @} */
 
 /*! @name SRU - UchannelRx Register */
 /*! @{ */
-#define SPDIF_SRU_RXUCHANNEL_MASK                (0xFFFFFFU)
-#define SPDIF_SRU_RXUCHANNEL_SHIFT               (0U)
-#define SPDIF_SRU_RXUCHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRU_RXUCHANNEL_SHIFT)) & SPDIF_SRU_RXUCHANNEL_MASK)
+#define SPDIF_SRU_RXUCHANNEL_MASK  (0xFFFFFFU)
+#define SPDIF_SRU_RXUCHANNEL_SHIFT (0U)
+#define SPDIF_SRU_RXUCHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRU_RXUCHANNEL_SHIFT)) & SPDIF_SRU_RXUCHANNEL_MASK)
 /*! @} */
 
 /*! @name SRQ - QchannelRx Register */
 /*! @{ */
-#define SPDIF_SRQ_RXQCHANNEL_MASK                (0xFFFFFFU)
-#define SPDIF_SRQ_RXQCHANNEL_SHIFT               (0U)
-#define SPDIF_SRQ_RXQCHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRQ_RXQCHANNEL_SHIFT)) & SPDIF_SRQ_RXQCHANNEL_MASK)
+#define SPDIF_SRQ_RXQCHANNEL_MASK  (0xFFFFFFU)
+#define SPDIF_SRQ_RXQCHANNEL_SHIFT (0U)
+#define SPDIF_SRQ_RXQCHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRQ_RXQCHANNEL_SHIFT)) & SPDIF_SRQ_RXQCHANNEL_MASK)
 /*! @} */
 
 /*! @name STL - SPDIFTxLeft Register */
 /*! @{ */
-#define SPDIF_STL_TXDATALEFT_MASK                (0xFFFFFFU)
-#define SPDIF_STL_TXDATALEFT_SHIFT               (0U)
-#define SPDIF_STL_TXDATALEFT(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_STL_TXDATALEFT_SHIFT)) & SPDIF_STL_TXDATALEFT_MASK)
+#define SPDIF_STL_TXDATALEFT_MASK  (0xFFFFFFU)
+#define SPDIF_STL_TXDATALEFT_SHIFT (0U)
+#define SPDIF_STL_TXDATALEFT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STL_TXDATALEFT_SHIFT)) & SPDIF_STL_TXDATALEFT_MASK)
 /*! @} */
 
 /*! @name STR - SPDIFTxRight Register */
 /*! @{ */
-#define SPDIF_STR_TXDATARIGHT_MASK               (0xFFFFFFU)
-#define SPDIF_STR_TXDATARIGHT_SHIFT              (0U)
-#define SPDIF_STR_TXDATARIGHT(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_STR_TXDATARIGHT_SHIFT)) & SPDIF_STR_TXDATARIGHT_MASK)
+#define SPDIF_STR_TXDATARIGHT_MASK  (0xFFFFFFU)
+#define SPDIF_STR_TXDATARIGHT_SHIFT (0U)
+#define SPDIF_STR_TXDATARIGHT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STR_TXDATARIGHT_SHIFT)) & SPDIF_STR_TXDATARIGHT_MASK)
 /*! @} */
 
 /*! @name STCSCH - SPDIFTxCChannelCons_h Register */
 /*! @{ */
-#define SPDIF_STCSCH_TXCCHANNELCONS_H_MASK       (0xFFFFFFU)
-#define SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT      (0U)
-#define SPDIF_STCSCH_TXCCHANNELCONS_H(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT)) & SPDIF_STCSCH_TXCCHANNELCONS_H_MASK)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H_MASK  (0xFFFFFFU)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT (0U)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT)) & SPDIF_STCSCH_TXCCHANNELCONS_H_MASK)
 /*! @} */
 
 /*! @name STCSCL - SPDIFTxCChannelCons_l Register */
 /*! @{ */
-#define SPDIF_STCSCL_TXCCHANNELCONS_L_MASK       (0xFFFFFFU)
-#define SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT      (0U)
-#define SPDIF_STCSCL_TXCCHANNELCONS_L(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT)) & SPDIF_STCSCL_TXCCHANNELCONS_L_MASK)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L_MASK  (0xFFFFFFU)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT (0U)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT)) & SPDIF_STCSCL_TXCCHANNELCONS_L_MASK)
 /*! @} */
 
 /*! @name SRFM - FreqMeas Register */
 /*! @{ */
-#define SPDIF_SRFM_FREQMEAS_MASK                 (0xFFFFFFU)
-#define SPDIF_SRFM_FREQMEAS_SHIFT                (0U)
-#define SPDIF_SRFM_FREQMEAS(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SRFM_FREQMEAS_SHIFT)) & SPDIF_SRFM_FREQMEAS_MASK)
+#define SPDIF_SRFM_FREQMEAS_MASK  (0xFFFFFFU)
+#define SPDIF_SRFM_FREQMEAS_SHIFT (0U)
+#define SPDIF_SRFM_FREQMEAS(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRFM_FREQMEAS_SHIFT)) & SPDIF_SRFM_FREQMEAS_MASK)
 /*! @} */
 
 /*! @name STC - SPDIFTxClk Register */
 /*! @{ */
-#define SPDIF_STC_TXCLK_DF_MASK                  (0x7FU)
-#define SPDIF_STC_TXCLK_DF_SHIFT                 (0U)
-#define SPDIF_STC_TXCLK_DF(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_DF_SHIFT)) & SPDIF_STC_TXCLK_DF_MASK)
-#define SPDIF_STC_TX_ALL_CLK_EN_MASK             (0x80U)
-#define SPDIF_STC_TX_ALL_CLK_EN_SHIFT            (7U)
-#define SPDIF_STC_TX_ALL_CLK_EN(x)               (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TX_ALL_CLK_EN_SHIFT)) & SPDIF_STC_TX_ALL_CLK_EN_MASK)
-#define SPDIF_STC_TXCLK_SOURCE_MASK              (0x700U)
-#define SPDIF_STC_TXCLK_SOURCE_SHIFT             (8U)
-#define SPDIF_STC_TXCLK_SOURCE(x)                (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_SOURCE_SHIFT)) & SPDIF_STC_TXCLK_SOURCE_MASK)
-#define SPDIF_STC_SYSCLK_DF_MASK                 (0xFF800U)
-#define SPDIF_STC_SYSCLK_DF_SHIFT                (11U)
-#define SPDIF_STC_SYSCLK_DF(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_SYSCLK_DF_SHIFT)) & SPDIF_STC_SYSCLK_DF_MASK)
+#define SPDIF_STC_TXCLK_DF_MASK       (0x7FU)
+#define SPDIF_STC_TXCLK_DF_SHIFT      (0U)
+#define SPDIF_STC_TXCLK_DF(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_DF_SHIFT)) & SPDIF_STC_TXCLK_DF_MASK)
+#define SPDIF_STC_TX_ALL_CLK_EN_MASK  (0x80U)
+#define SPDIF_STC_TX_ALL_CLK_EN_SHIFT (7U)
+#define SPDIF_STC_TX_ALL_CLK_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TX_ALL_CLK_EN_SHIFT)) & SPDIF_STC_TX_ALL_CLK_EN_MASK)
+#define SPDIF_STC_TXCLK_SOURCE_MASK  (0x700U)
+#define SPDIF_STC_TXCLK_SOURCE_SHIFT (8U)
+#define SPDIF_STC_TXCLK_SOURCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_SOURCE_SHIFT)) & SPDIF_STC_TXCLK_SOURCE_MASK)
+#define SPDIF_STC_SYSCLK_DF_MASK  (0xFF800U)
+#define SPDIF_STC_SYSCLK_DF_SHIFT (11U)
+#define SPDIF_STC_SYSCLK_DF(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_SYSCLK_DF_SHIFT)) & SPDIF_STC_SYSCLK_DF_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SPDIF_Register_Masks */
 
-
 /* SPDIF - Peripheral instance base addresses */
 /** Peripheral SPDIF base address */
-#define SPDIF_BASE                               (0x40380000u)
+#define SPDIF_BASE (0x40380000u)
 /** Peripheral SPDIF base pointer */
-#define SPDIF                                    ((SPDIF_Type *)SPDIF_BASE)
+#define SPDIF ((SPDIF_Type *)SPDIF_BASE)
 /** Array initializer of SPDIF peripheral base addresses */
-#define SPDIF_BASE_ADDRS                         { SPDIF_BASE }
+#define SPDIF_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        SPDIF_BASE                                                                                                     \
+    }
 /** Array initializer of SPDIF peripheral base pointers */
-#define SPDIF_BASE_PTRS                          { SPDIF }
+#define SPDIF_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        SPDIF                                                                                                          \
+    }
 /** Interrupt vectors for the SPDIF peripheral type */
-#define SPDIF_IRQS                               { SPDIF_IRQn }
+#define SPDIF_IRQS                                                                                                     \
+    {                                                                                                                  \
+        SPDIF_IRQn                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group SPDIF_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SRC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20125,13 +22947,15 @@ typedef struct {
  */
 
 /** SRC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SCR;                               /**< SRC Control Register, offset: 0x0 */
-  __I  uint32_t SBMR1;                             /**< SRC Boot Mode Register 1, offset: 0x4 */
-  __IO uint32_t SRSR;                              /**< SRC Reset Status Register, offset: 0x8 */
-       uint8_t RESERVED_0[16];
-  __I  uint32_t SBMR2;                             /**< SRC Boot Mode Register 2, offset: 0x1C */
-  __IO uint32_t GPR[10];                           /**< SRC General Purpose Register 1..SRC General Purpose Register 10, array offset: 0x20, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t SCR;  /**< SRC Control Register, offset: 0x0 */
+    __I uint32_t SBMR1; /**< SRC Boot Mode Register 1, offset: 0x4 */
+    __IO uint32_t SRSR; /**< SRC Reset Status Register, offset: 0x8 */
+    uint8_t RESERVED_0[16];
+    __I uint32_t SBMR2;    /**< SRC Boot Mode Register 2, offset: 0x1C */
+    __IO uint32_t GPR[10]; /**< SRC General Purpose Register 1..SRC General Purpose Register 10, array offset: 0x20,
+                              array step: 0x4 */
 } SRC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20145,148 +22969,165 @@ typedef struct {
 
 /*! @name SCR - SRC Control Register */
 /*! @{ */
-#define SRC_SCR_MASK_WDOG_RST_MASK               (0x780U)
-#define SRC_SCR_MASK_WDOG_RST_SHIFT              (7U)
-#define SRC_SCR_MASK_WDOG_RST(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG_RST_SHIFT)) & SRC_SCR_MASK_WDOG_RST_MASK)
-#define SRC_SCR_CORE0_RST_MASK                   (0x2000U)
-#define SRC_SCR_CORE0_RST_SHIFT                  (13U)
-#define SRC_SCR_CORE0_RST(x)                     (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_RST_SHIFT)) & SRC_SCR_CORE0_RST_MASK)
-#define SRC_SCR_CORE0_DBG_RST_MASK               (0x20000U)
-#define SRC_SCR_CORE0_DBG_RST_SHIFT              (17U)
-#define SRC_SCR_CORE0_DBG_RST(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_DBG_RST_SHIFT)) & SRC_SCR_CORE0_DBG_RST_MASK)
-#define SRC_SCR_DBG_RST_MSK_PG_MASK              (0x2000000U)
-#define SRC_SCR_DBG_RST_MSK_PG_SHIFT             (25U)
-#define SRC_SCR_DBG_RST_MSK_PG(x)                (((uint32_t)(((uint32_t)(x)) << SRC_SCR_DBG_RST_MSK_PG_SHIFT)) & SRC_SCR_DBG_RST_MSK_PG_MASK)
-#define SRC_SCR_MASK_WDOG3_RST_MASK              (0xF0000000U)
-#define SRC_SCR_MASK_WDOG3_RST_SHIFT             (28U)
-#define SRC_SCR_MASK_WDOG3_RST(x)                (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG3_RST_SHIFT)) & SRC_SCR_MASK_WDOG3_RST_MASK)
+#define SRC_SCR_MASK_WDOG_RST_MASK  (0x780U)
+#define SRC_SCR_MASK_WDOG_RST_SHIFT (7U)
+#define SRC_SCR_MASK_WDOG_RST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG_RST_SHIFT)) & SRC_SCR_MASK_WDOG_RST_MASK)
+#define SRC_SCR_CORE0_RST_MASK      (0x2000U)
+#define SRC_SCR_CORE0_RST_SHIFT     (13U)
+#define SRC_SCR_CORE0_RST(x)        (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_RST_SHIFT)) & SRC_SCR_CORE0_RST_MASK)
+#define SRC_SCR_CORE0_DBG_RST_MASK  (0x20000U)
+#define SRC_SCR_CORE0_DBG_RST_SHIFT (17U)
+#define SRC_SCR_CORE0_DBG_RST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_DBG_RST_SHIFT)) & SRC_SCR_CORE0_DBG_RST_MASK)
+#define SRC_SCR_DBG_RST_MSK_PG_MASK  (0x2000000U)
+#define SRC_SCR_DBG_RST_MSK_PG_SHIFT (25U)
+#define SRC_SCR_DBG_RST_MSK_PG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_DBG_RST_MSK_PG_SHIFT)) & SRC_SCR_DBG_RST_MSK_PG_MASK)
+#define SRC_SCR_MASK_WDOG3_RST_MASK  (0xF0000000U)
+#define SRC_SCR_MASK_WDOG3_RST_SHIFT (28U)
+#define SRC_SCR_MASK_WDOG3_RST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG3_RST_SHIFT)) & SRC_SCR_MASK_WDOG3_RST_MASK)
 /*! @} */
 
 /*! @name SBMR1 - SRC Boot Mode Register 1 */
 /*! @{ */
-#define SRC_SBMR1_BOOT_CFG1_MASK                 (0xFFU)
-#define SRC_SBMR1_BOOT_CFG1_SHIFT                (0U)
-#define SRC_SBMR1_BOOT_CFG1(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG1_SHIFT)) & SRC_SBMR1_BOOT_CFG1_MASK)
-#define SRC_SBMR1_BOOT_CFG2_MASK                 (0xFF00U)
-#define SRC_SBMR1_BOOT_CFG2_SHIFT                (8U)
-#define SRC_SBMR1_BOOT_CFG2(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG2_SHIFT)) & SRC_SBMR1_BOOT_CFG2_MASK)
-#define SRC_SBMR1_BOOT_CFG3_MASK                 (0xFF0000U)
-#define SRC_SBMR1_BOOT_CFG3_SHIFT                (16U)
-#define SRC_SBMR1_BOOT_CFG3(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG3_SHIFT)) & SRC_SBMR1_BOOT_CFG3_MASK)
-#define SRC_SBMR1_BOOT_CFG4_MASK                 (0xFF000000U)
-#define SRC_SBMR1_BOOT_CFG4_SHIFT                (24U)
-#define SRC_SBMR1_BOOT_CFG4(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG4_SHIFT)) & SRC_SBMR1_BOOT_CFG4_MASK)
+#define SRC_SBMR1_BOOT_CFG1_MASK  (0xFFU)
+#define SRC_SBMR1_BOOT_CFG1_SHIFT (0U)
+#define SRC_SBMR1_BOOT_CFG1(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG1_SHIFT)) & SRC_SBMR1_BOOT_CFG1_MASK)
+#define SRC_SBMR1_BOOT_CFG2_MASK  (0xFF00U)
+#define SRC_SBMR1_BOOT_CFG2_SHIFT (8U)
+#define SRC_SBMR1_BOOT_CFG2(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG2_SHIFT)) & SRC_SBMR1_BOOT_CFG2_MASK)
+#define SRC_SBMR1_BOOT_CFG3_MASK  (0xFF0000U)
+#define SRC_SBMR1_BOOT_CFG3_SHIFT (16U)
+#define SRC_SBMR1_BOOT_CFG3(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG3_SHIFT)) & SRC_SBMR1_BOOT_CFG3_MASK)
+#define SRC_SBMR1_BOOT_CFG4_MASK  (0xFF000000U)
+#define SRC_SBMR1_BOOT_CFG4_SHIFT (24U)
+#define SRC_SBMR1_BOOT_CFG4(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG4_SHIFT)) & SRC_SBMR1_BOOT_CFG4_MASK)
 /*! @} */
 
 /*! @name SRSR - SRC Reset Status Register */
 /*! @{ */
-#define SRC_SRSR_IPP_RESET_B_MASK                (0x1U)
-#define SRC_SRSR_IPP_RESET_B_SHIFT               (0U)
-#define SRC_SRSR_IPP_RESET_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_RESET_B_SHIFT)) & SRC_SRSR_IPP_RESET_B_MASK)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ_MASK         (0x2U)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT        (1U)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ(x)           (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT)) & SRC_SRSR_LOCKUP_SYSRESETREQ_MASK)
-#define SRC_SRSR_CSU_RESET_B_MASK                (0x4U)
-#define SRC_SRSR_CSU_RESET_B_SHIFT               (2U)
-#define SRC_SRSR_CSU_RESET_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_CSU_RESET_B_SHIFT)) & SRC_SRSR_CSU_RESET_B_MASK)
-#define SRC_SRSR_IPP_USER_RESET_B_MASK           (0x8U)
-#define SRC_SRSR_IPP_USER_RESET_B_SHIFT          (3U)
-#define SRC_SRSR_IPP_USER_RESET_B(x)             (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_USER_RESET_B_SHIFT)) & SRC_SRSR_IPP_USER_RESET_B_MASK)
-#define SRC_SRSR_WDOG_RST_B_MASK                 (0x10U)
-#define SRC_SRSR_WDOG_RST_B_SHIFT                (4U)
-#define SRC_SRSR_WDOG_RST_B(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG_RST_B_SHIFT)) & SRC_SRSR_WDOG_RST_B_MASK)
-#define SRC_SRSR_JTAG_RST_B_MASK                 (0x20U)
-#define SRC_SRSR_JTAG_RST_B_SHIFT                (5U)
-#define SRC_SRSR_JTAG_RST_B(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_RST_B_SHIFT)) & SRC_SRSR_JTAG_RST_B_MASK)
-#define SRC_SRSR_JTAG_SW_RST_MASK                (0x40U)
-#define SRC_SRSR_JTAG_SW_RST_SHIFT               (6U)
-#define SRC_SRSR_JTAG_SW_RST(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_SW_RST_SHIFT)) & SRC_SRSR_JTAG_SW_RST_MASK)
-#define SRC_SRSR_WDOG3_RST_B_MASK                (0x80U)
-#define SRC_SRSR_WDOG3_RST_B_SHIFT               (7U)
-#define SRC_SRSR_WDOG3_RST_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG3_RST_B_SHIFT)) & SRC_SRSR_WDOG3_RST_B_MASK)
-#define SRC_SRSR_TEMPSENSE_RST_B_MASK            (0x100U)
-#define SRC_SRSR_TEMPSENSE_RST_B_SHIFT           (8U)
-#define SRC_SRSR_TEMPSENSE_RST_B(x)              (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_TEMPSENSE_RST_B_SHIFT)) & SRC_SRSR_TEMPSENSE_RST_B_MASK)
+#define SRC_SRSR_IPP_RESET_B_MASK  (0x1U)
+#define SRC_SRSR_IPP_RESET_B_SHIFT (0U)
+#define SRC_SRSR_IPP_RESET_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_RESET_B_SHIFT)) & SRC_SRSR_IPP_RESET_B_MASK)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ_MASK  (0x2U)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT (1U)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT)) & SRC_SRSR_LOCKUP_SYSRESETREQ_MASK)
+#define SRC_SRSR_CSU_RESET_B_MASK  (0x4U)
+#define SRC_SRSR_CSU_RESET_B_SHIFT (2U)
+#define SRC_SRSR_CSU_RESET_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_CSU_RESET_B_SHIFT)) & SRC_SRSR_CSU_RESET_B_MASK)
+#define SRC_SRSR_IPP_USER_RESET_B_MASK  (0x8U)
+#define SRC_SRSR_IPP_USER_RESET_B_SHIFT (3U)
+#define SRC_SRSR_IPP_USER_RESET_B(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_USER_RESET_B_SHIFT)) & SRC_SRSR_IPP_USER_RESET_B_MASK)
+#define SRC_SRSR_WDOG_RST_B_MASK   (0x10U)
+#define SRC_SRSR_WDOG_RST_B_SHIFT  (4U)
+#define SRC_SRSR_WDOG_RST_B(x)     (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG_RST_B_SHIFT)) & SRC_SRSR_WDOG_RST_B_MASK)
+#define SRC_SRSR_JTAG_RST_B_MASK   (0x20U)
+#define SRC_SRSR_JTAG_RST_B_SHIFT  (5U)
+#define SRC_SRSR_JTAG_RST_B(x)     (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_RST_B_SHIFT)) & SRC_SRSR_JTAG_RST_B_MASK)
+#define SRC_SRSR_JTAG_SW_RST_MASK  (0x40U)
+#define SRC_SRSR_JTAG_SW_RST_SHIFT (6U)
+#define SRC_SRSR_JTAG_SW_RST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_SW_RST_SHIFT)) & SRC_SRSR_JTAG_SW_RST_MASK)
+#define SRC_SRSR_WDOG3_RST_B_MASK  (0x80U)
+#define SRC_SRSR_WDOG3_RST_B_SHIFT (7U)
+#define SRC_SRSR_WDOG3_RST_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG3_RST_B_SHIFT)) & SRC_SRSR_WDOG3_RST_B_MASK)
+#define SRC_SRSR_TEMPSENSE_RST_B_MASK  (0x100U)
+#define SRC_SRSR_TEMPSENSE_RST_B_SHIFT (8U)
+#define SRC_SRSR_TEMPSENSE_RST_B(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_TEMPSENSE_RST_B_SHIFT)) & SRC_SRSR_TEMPSENSE_RST_B_MASK)
 /*! @} */
 
 /*! @name SBMR2 - SRC Boot Mode Register 2 */
 /*! @{ */
-#define SRC_SBMR2_SEC_CONFIG_MASK                (0x3U)
-#define SRC_SBMR2_SEC_CONFIG_SHIFT               (0U)
-#define SRC_SBMR2_SEC_CONFIG(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_SEC_CONFIG_SHIFT)) & SRC_SBMR2_SEC_CONFIG_MASK)
-#define SRC_SBMR2_DIR_BT_DIS_MASK                (0x8U)
-#define SRC_SBMR2_DIR_BT_DIS_SHIFT               (3U)
-#define SRC_SBMR2_DIR_BT_DIS(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_DIR_BT_DIS_SHIFT)) & SRC_SBMR2_DIR_BT_DIS_MASK)
-#define SRC_SBMR2_BT_FUSE_SEL_MASK               (0x10U)
-#define SRC_SBMR2_BT_FUSE_SEL_SHIFT              (4U)
-#define SRC_SBMR2_BT_FUSE_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BT_FUSE_SEL_SHIFT)) & SRC_SBMR2_BT_FUSE_SEL_MASK)
-#define SRC_SBMR2_BMOD_MASK                      (0x3000000U)
-#define SRC_SBMR2_BMOD_SHIFT                     (24U)
-#define SRC_SBMR2_BMOD(x)                        (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BMOD_SHIFT)) & SRC_SBMR2_BMOD_MASK)
+#define SRC_SBMR2_SEC_CONFIG_MASK  (0x3U)
+#define SRC_SBMR2_SEC_CONFIG_SHIFT (0U)
+#define SRC_SBMR2_SEC_CONFIG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_SEC_CONFIG_SHIFT)) & SRC_SBMR2_SEC_CONFIG_MASK)
+#define SRC_SBMR2_DIR_BT_DIS_MASK  (0x8U)
+#define SRC_SBMR2_DIR_BT_DIS_SHIFT (3U)
+#define SRC_SBMR2_DIR_BT_DIS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_DIR_BT_DIS_SHIFT)) & SRC_SBMR2_DIR_BT_DIS_MASK)
+#define SRC_SBMR2_BT_FUSE_SEL_MASK  (0x10U)
+#define SRC_SBMR2_BT_FUSE_SEL_SHIFT (4U)
+#define SRC_SBMR2_BT_FUSE_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BT_FUSE_SEL_SHIFT)) & SRC_SBMR2_BT_FUSE_SEL_MASK)
+#define SRC_SBMR2_BMOD_MASK  (0x3000000U)
+#define SRC_SBMR2_BMOD_SHIFT (24U)
+#define SRC_SBMR2_BMOD(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BMOD_SHIFT)) & SRC_SBMR2_BMOD_MASK)
 /*! @} */
 
 /*! @name GPR - SRC General Purpose Register 1..SRC General Purpose Register 10 */
 /*! @{ */
-#define SRC_GPR_PERSISTENT_ARG0_MASK             (0xFFFFFFFFU)
-#define SRC_GPR_PERSISTENT_ARG0_SHIFT            (0U)
-#define SRC_GPR_PERSISTENT_ARG0(x)               (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ARG0_SHIFT)) & SRC_GPR_PERSISTENT_ARG0_MASK)
-#define SRC_GPR_PERSISTENT_ENTRY0_MASK           (0xFFFFFFFFU)
-#define SRC_GPR_PERSISTENT_ENTRY0_SHIFT          (0U)
-#define SRC_GPR_PERSISTENT_ENTRY0(x)             (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ENTRY0_SHIFT)) & SRC_GPR_PERSISTENT_ENTRY0_MASK)
+#define SRC_GPR_PERSISTENT_ARG0_MASK  (0xFFFFFFFFU)
+#define SRC_GPR_PERSISTENT_ARG0_SHIFT (0U)
+#define SRC_GPR_PERSISTENT_ARG0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ARG0_SHIFT)) & SRC_GPR_PERSISTENT_ARG0_MASK)
+#define SRC_GPR_PERSISTENT_ENTRY0_MASK  (0xFFFFFFFFU)
+#define SRC_GPR_PERSISTENT_ENTRY0_SHIFT (0U)
+#define SRC_GPR_PERSISTENT_ENTRY0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ENTRY0_SHIFT)) & SRC_GPR_PERSISTENT_ENTRY0_MASK)
 /*! @} */
 
 /* The count of SRC_GPR */
-#define SRC_GPR_COUNT                            (10U)
-
+#define SRC_GPR_COUNT (10U)
 
 /*!
  * @}
  */ /* end of group SRC_Register_Masks */
 
-
 /* SRC - Peripheral instance base addresses */
 /** Peripheral SRC base address */
-#define SRC_BASE                                 (0x400F8000u)
+#define SRC_BASE (0x400F8000u)
 /** Peripheral SRC base pointer */
-#define SRC                                      ((SRC_Type *)SRC_BASE)
+#define SRC ((SRC_Type *)SRC_BASE)
 /** Array initializer of SRC peripheral base addresses */
-#define SRC_BASE_ADDRS                           { SRC_BASE }
+#define SRC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        SRC_BASE                                                                                                       \
+    }
 /** Array initializer of SRC peripheral base pointers */
-#define SRC_BASE_PTRS                            { SRC }
+#define SRC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        SRC                                                                                                            \
+    }
 /** Interrupt vectors for the SRC peripheral type */
-#define SRC_IRQS                                 { SRC_IRQn }
+#define SRC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        SRC_IRQn                                                                                                       \
+    }
 /* Backward compatibility */
-#define SRC_SCR_MWDR_MASK                      SRC_SCR_MASK_WDOG_RST_MASK
-#define SRC_SCR_MWDR_SHIFT                     SRC_SCR_MASK_WDOG_RST_SHIFT
-#define SRC_SCR_MWDR(x)                        SRC_SCR_MASK_WDOG_RST(x)
-#define SRC_SRSR_WDOG_MASK                     SRC_SRSR_WDOG_RST_B_MASK
-#define SRC_SRSR_WDOG_SHIFT                    SRC_SRSR_WDOG_RST_B_SHIFT
-#define SRC_SRSR_WDOG(x)                       SRC_SRSR_WDOG_RST_B(x)
-#define SRC_SRSR_JTAG_MASK                     SRC_SRSR_JTAG_RST_B_MASK
-#define SRC_SRSR_JTAG_SHIFT                    SRC_SRSR_JTAG_RST_B_SHIFT
-#define SRC_SRSR_JTAG(x)                       SRC_SRSR_JTAG_RST_B(x)
-#define SRC_SRSR_SJC_MASK                      SRC_SRSR_JTAG_SW_RST_MASK
-#define SRC_SRSR_SJC_SHIFT                     SRC_SRSR_JTAG_SW_RST_SHIFT
-#define SRC_SRSR_SJC(x)                        SRC_SRSR_JTAG_SW_RST(x)
-#define SRC_SRSR_TSR_MASK                      SRC_SRSR_TEMPSENSE_RST_B_MASK
-#define SRC_SRSR_TSR_SHIFT                     SRC_SRSR_TEMPSENSE_RST_B_SHIFT
-#define SRC_SRSR_TSR(x)                        SRC_SRSR_TEMPSENSE_RST_B(x)
+#define SRC_SCR_MWDR_MASK   SRC_SCR_MASK_WDOG_RST_MASK
+#define SRC_SCR_MWDR_SHIFT  SRC_SCR_MASK_WDOG_RST_SHIFT
+#define SRC_SCR_MWDR(x)     SRC_SCR_MASK_WDOG_RST(x)
+#define SRC_SRSR_WDOG_MASK  SRC_SRSR_WDOG_RST_B_MASK
+#define SRC_SRSR_WDOG_SHIFT SRC_SRSR_WDOG_RST_B_SHIFT
+#define SRC_SRSR_WDOG(x)    SRC_SRSR_WDOG_RST_B(x)
+#define SRC_SRSR_JTAG_MASK  SRC_SRSR_JTAG_RST_B_MASK
+#define SRC_SRSR_JTAG_SHIFT SRC_SRSR_JTAG_RST_B_SHIFT
+#define SRC_SRSR_JTAG(x)    SRC_SRSR_JTAG_RST_B(x)
+#define SRC_SRSR_SJC_MASK   SRC_SRSR_JTAG_SW_RST_MASK
+#define SRC_SRSR_SJC_SHIFT  SRC_SRSR_JTAG_SW_RST_SHIFT
+#define SRC_SRSR_SJC(x)     SRC_SRSR_JTAG_SW_RST(x)
+#define SRC_SRSR_TSR_MASK   SRC_SRSR_TEMPSENSE_RST_B_MASK
+#define SRC_SRSR_TSR_SHIFT  SRC_SRSR_TEMPSENSE_RST_B_SHIFT
+#define SRC_SRSR_TSR(x)     SRC_SRSR_TEMPSENSE_RST_B(x)
 /* Extra definition */
-#define SRC_SRSR_W1C_BITS_MASK  ( SRC_SRSR_WDOG3_RST_B_MASK \
-                                | SRC_SRSR_JTAG_SW_RST_MASK \
-                                | SRC_SRSR_JTAG_RST_B_MASK \
-                                | SRC_SRSR_WDOG_RST_B_MASK \
-                                | SRC_SRSR_IPP_USER_RESET_B_MASK \
-                                | SRC_SRSR_CSU_RESET_B_MASK \
-                                | SRC_SRSR_LOCKUP_SYSRESETREQ_MASK \
-                                | SRC_SRSR_IPP_RESET_B_MASK)
-
+#define SRC_SRSR_W1C_BITS_MASK                                                                                         \
+    (SRC_SRSR_WDOG3_RST_B_MASK | SRC_SRSR_JTAG_SW_RST_MASK | SRC_SRSR_JTAG_RST_B_MASK | SRC_SRSR_WDOG_RST_B_MASK |     \
+     SRC_SRSR_IPP_USER_RESET_B_MASK | SRC_SRSR_CSU_RESET_B_MASK | SRC_SRSR_LOCKUP_SYSRESETREQ_MASK |                   \
+     SRC_SRSR_IPP_RESET_B_MASK)
 
 /*!
  * @}
  */ /* end of group SRC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TEMPMON Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20297,21 +23138,22 @@ typedef struct {
  */
 
 /** TEMPMON - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[384];
-  __IO uint32_t TEMPSENSE0;                        /**< Tempsensor Control Register 0, offset: 0x180 */
-  __IO uint32_t TEMPSENSE0_SET;                    /**< Tempsensor Control Register 0, offset: 0x184 */
-  __IO uint32_t TEMPSENSE0_CLR;                    /**< Tempsensor Control Register 0, offset: 0x188 */
-  __IO uint32_t TEMPSENSE0_TOG;                    /**< Tempsensor Control Register 0, offset: 0x18C */
-  __IO uint32_t TEMPSENSE1;                        /**< Tempsensor Control Register 1, offset: 0x190 */
-  __IO uint32_t TEMPSENSE1_SET;                    /**< Tempsensor Control Register 1, offset: 0x194 */
-  __IO uint32_t TEMPSENSE1_CLR;                    /**< Tempsensor Control Register 1, offset: 0x198 */
-  __IO uint32_t TEMPSENSE1_TOG;                    /**< Tempsensor Control Register 1, offset: 0x19C */
-       uint8_t RESERVED_1[240];
-  __IO uint32_t TEMPSENSE2;                        /**< Tempsensor Control Register 2, offset: 0x290 */
-  __IO uint32_t TEMPSENSE2_SET;                    /**< Tempsensor Control Register 2, offset: 0x294 */
-  __IO uint32_t TEMPSENSE2_CLR;                    /**< Tempsensor Control Register 2, offset: 0x298 */
-  __IO uint32_t TEMPSENSE2_TOG;                    /**< Tempsensor Control Register 2, offset: 0x29C */
+typedef struct
+{
+    uint8_t RESERVED_0[384];
+    __IO uint32_t TEMPSENSE0;     /**< Tempsensor Control Register 0, offset: 0x180 */
+    __IO uint32_t TEMPSENSE0_SET; /**< Tempsensor Control Register 0, offset: 0x184 */
+    __IO uint32_t TEMPSENSE0_CLR; /**< Tempsensor Control Register 0, offset: 0x188 */
+    __IO uint32_t TEMPSENSE0_TOG; /**< Tempsensor Control Register 0, offset: 0x18C */
+    __IO uint32_t TEMPSENSE1;     /**< Tempsensor Control Register 1, offset: 0x190 */
+    __IO uint32_t TEMPSENSE1_SET; /**< Tempsensor Control Register 1, offset: 0x194 */
+    __IO uint32_t TEMPSENSE1_CLR; /**< Tempsensor Control Register 1, offset: 0x198 */
+    __IO uint32_t TEMPSENSE1_TOG; /**< Tempsensor Control Register 1, offset: 0x19C */
+    uint8_t RESERVED_1[240];
+    __IO uint32_t TEMPSENSE2;     /**< Tempsensor Control Register 2, offset: 0x290 */
+    __IO uint32_t TEMPSENSE2_SET; /**< Tempsensor Control Register 2, offset: 0x294 */
+    __IO uint32_t TEMPSENSE2_CLR; /**< Tempsensor Control Register 2, offset: 0x298 */
+    __IO uint32_t TEMPSENSE2_TOG; /**< Tempsensor Control Register 2, offset: 0x29C */
 } TEMPMON_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20325,169 +23167,221 @@ typedef struct {
 
 /*! @name TEMPSENSE0 - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK       (0x1U)
-#define TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT      (0U)
-#define TEMPMON_TEMPSENSE0_POWER_DOWN(x)         (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK     (0x2U)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT    (1U)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_FINISHED_MASK         (0x4U)
-#define TEMPMON_TEMPSENSE0_FINISHED_SHIFT        (2U)
-#define TEMPMON_TEMPSENSE0_FINISHED(x)           (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT_MASK         (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT        (8U)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT(x)           (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK      (0xFFF00000U)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT     (20U)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE(x)        (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK  (0x2U)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT (1U)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_FINISHED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK  (0xFFF00000U)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT (20U)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_SET - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_CLR - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_TOG - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1 - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK     (0xFFFFU)
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT    (0U)
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK  (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT (0U)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_SET - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_CLR - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_TOG - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2 - Tempsensor Control Register 2 */
 /*! @{ */
 #define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE(x)  (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT)) &                                     \
+     TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_SET - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_CLR - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_TOG - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TEMPMON_Register_Masks */
 
-
 /* TEMPMON - Peripheral instance base addresses */
 /** Peripheral TEMPMON base address */
-#define TEMPMON_BASE                             (0x400D8000u)
+#define TEMPMON_BASE (0x400D8000u)
 /** Peripheral TEMPMON base pointer */
-#define TEMPMON                                  ((TEMPMON_Type *)TEMPMON_BASE)
+#define TEMPMON ((TEMPMON_Type *)TEMPMON_BASE)
 /** Array initializer of TEMPMON peripheral base addresses */
-#define TEMPMON_BASE_ADDRS                       { TEMPMON_BASE }
+#define TEMPMON_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        TEMPMON_BASE                                                                                                   \
+    }
 /** Array initializer of TEMPMON peripheral base pointers */
-#define TEMPMON_BASE_PTRS                        { TEMPMON }
+#define TEMPMON_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        TEMPMON                                                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group TEMPMON_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TMR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20498,24 +23392,28 @@ typedef struct {
  */
 
 /** TMR - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x20 */
-    __IO uint16_t COMP1;                             /**< Timer Channel Compare Register 1, array offset: 0x0, array step: 0x20 */
-    __IO uint16_t COMP2;                             /**< Timer Channel Compare Register 2, array offset: 0x2, array step: 0x20 */
-    __IO uint16_t CAPT;                              /**< Timer Channel Capture Register, array offset: 0x4, array step: 0x20 */
-    __IO uint16_t LOAD;                              /**< Timer Channel Load Register, array offset: 0x6, array step: 0x20 */
-    __IO uint16_t HOLD;                              /**< Timer Channel Hold Register, array offset: 0x8, array step: 0x20 */
-    __IO uint16_t CNTR;                              /**< Timer Channel Counter Register, array offset: 0xA, array step: 0x20 */
-    __IO uint16_t CTRL;                              /**< Timer Channel Control Register, array offset: 0xC, array step: 0x20 */
-    __IO uint16_t SCTRL;                             /**< Timer Channel Status and Control Register, array offset: 0xE, array step: 0x20 */
-    __IO uint16_t CMPLD1;                            /**< Timer Channel Comparator Load Register 1, array offset: 0x10, array step: 0x20 */
-    __IO uint16_t CMPLD2;                            /**< Timer Channel Comparator Load Register 2, array offset: 0x12, array step: 0x20 */
-    __IO uint16_t CSCTRL;                            /**< Timer Channel Comparator Status and Control Register, array offset: 0x14, array step: 0x20 */
-    __IO uint16_t FILT;                              /**< Timer Channel Input Filter Register, array offset: 0x16, array step: 0x20 */
-    __IO uint16_t DMA;                               /**< Timer Channel DMA Enable Register, array offset: 0x18, array step: 0x20 */
-         uint8_t RESERVED_0[4];
-    __IO uint16_t ENBL;                              /**< Timer Channel Enable Register, array offset: 0x1E, array step: 0x20, this item is not available for all array instances */
-  } CHANNEL[4];
+typedef struct
+{
+    struct
+    {                         /* offset: 0x0, array step: 0x20 */
+        __IO uint16_t COMP1;  /**< Timer Channel Compare Register 1, array offset: 0x0, array step: 0x20 */
+        __IO uint16_t COMP2;  /**< Timer Channel Compare Register 2, array offset: 0x2, array step: 0x20 */
+        __IO uint16_t CAPT;   /**< Timer Channel Capture Register, array offset: 0x4, array step: 0x20 */
+        __IO uint16_t LOAD;   /**< Timer Channel Load Register, array offset: 0x6, array step: 0x20 */
+        __IO uint16_t HOLD;   /**< Timer Channel Hold Register, array offset: 0x8, array step: 0x20 */
+        __IO uint16_t CNTR;   /**< Timer Channel Counter Register, array offset: 0xA, array step: 0x20 */
+        __IO uint16_t CTRL;   /**< Timer Channel Control Register, array offset: 0xC, array step: 0x20 */
+        __IO uint16_t SCTRL;  /**< Timer Channel Status and Control Register, array offset: 0xE, array step: 0x20 */
+        __IO uint16_t CMPLD1; /**< Timer Channel Comparator Load Register 1, array offset: 0x10, array step: 0x20 */
+        __IO uint16_t CMPLD2; /**< Timer Channel Comparator Load Register 2, array offset: 0x12, array step: 0x20 */
+        __IO uint16_t
+            CSCTRL; /**< Timer Channel Comparator Status and Control Register, array offset: 0x14, array step: 0x20 */
+        __IO uint16_t FILT; /**< Timer Channel Input Filter Register, array offset: 0x16, array step: 0x20 */
+        __IO uint16_t DMA;  /**< Timer Channel DMA Enable Register, array offset: 0x18, array step: 0x20 */
+        uint8_t RESERVED_0[4];
+        __IO uint16_t ENBL; /**< Timer Channel Enable Register, array offset: 0x1E, array step: 0x20, this item is not
+                               available for all array instances */
+    } CHANNEL[4];
 } TMR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20529,284 +23427,295 @@ typedef struct {
 
 /*! @name COMP1 - Timer Channel Compare Register 1 */
 /*! @{ */
-#define TMR_COMP1_COMPARISON_1_MASK              (0xFFFFU)
-#define TMR_COMP1_COMPARISON_1_SHIFT             (0U)
-#define TMR_COMP1_COMPARISON_1(x)                (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK)
+#define TMR_COMP1_COMPARISON_1_MASK  (0xFFFFU)
+#define TMR_COMP1_COMPARISON_1_SHIFT (0U)
+#define TMR_COMP1_COMPARISON_1(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK)
 /*! @} */
 
 /* The count of TMR_COMP1 */
-#define TMR_COMP1_COUNT                          (4U)
+#define TMR_COMP1_COUNT (4U)
 
 /*! @name COMP2 - Timer Channel Compare Register 2 */
 /*! @{ */
-#define TMR_COMP2_COMPARISON_2_MASK              (0xFFFFU)
-#define TMR_COMP2_COMPARISON_2_SHIFT             (0U)
-#define TMR_COMP2_COMPARISON_2(x)                (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK)
+#define TMR_COMP2_COMPARISON_2_MASK  (0xFFFFU)
+#define TMR_COMP2_COMPARISON_2_SHIFT (0U)
+#define TMR_COMP2_COMPARISON_2(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK)
 /*! @} */
 
 /* The count of TMR_COMP2 */
-#define TMR_COMP2_COUNT                          (4U)
+#define TMR_COMP2_COUNT (4U)
 
 /*! @name CAPT - Timer Channel Capture Register */
 /*! @{ */
-#define TMR_CAPT_CAPTURE_MASK                    (0xFFFFU)
-#define TMR_CAPT_CAPTURE_SHIFT                   (0U)
-#define TMR_CAPT_CAPTURE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK)
+#define TMR_CAPT_CAPTURE_MASK  (0xFFFFU)
+#define TMR_CAPT_CAPTURE_SHIFT (0U)
+#define TMR_CAPT_CAPTURE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK)
 /*! @} */
 
 /* The count of TMR_CAPT */
-#define TMR_CAPT_COUNT                           (4U)
+#define TMR_CAPT_COUNT (4U)
 
 /*! @name LOAD - Timer Channel Load Register */
 /*! @{ */
-#define TMR_LOAD_LOAD_MASK                       (0xFFFFU)
-#define TMR_LOAD_LOAD_SHIFT                      (0U)
-#define TMR_LOAD_LOAD(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK)
+#define TMR_LOAD_LOAD_MASK  (0xFFFFU)
+#define TMR_LOAD_LOAD_SHIFT (0U)
+#define TMR_LOAD_LOAD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK)
 /*! @} */
 
 /* The count of TMR_LOAD */
-#define TMR_LOAD_COUNT                           (4U)
+#define TMR_LOAD_COUNT (4U)
 
 /*! @name HOLD - Timer Channel Hold Register */
 /*! @{ */
-#define TMR_HOLD_HOLD_MASK                       (0xFFFFU)
-#define TMR_HOLD_HOLD_SHIFT                      (0U)
-#define TMR_HOLD_HOLD(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK)
+#define TMR_HOLD_HOLD_MASK  (0xFFFFU)
+#define TMR_HOLD_HOLD_SHIFT (0U)
+#define TMR_HOLD_HOLD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK)
 /*! @} */
 
 /* The count of TMR_HOLD */
-#define TMR_HOLD_COUNT                           (4U)
+#define TMR_HOLD_COUNT (4U)
 
 /*! @name CNTR - Timer Channel Counter Register */
 /*! @{ */
-#define TMR_CNTR_COUNTER_MASK                    (0xFFFFU)
-#define TMR_CNTR_COUNTER_SHIFT                   (0U)
-#define TMR_CNTR_COUNTER(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK)
+#define TMR_CNTR_COUNTER_MASK  (0xFFFFU)
+#define TMR_CNTR_COUNTER_SHIFT (0U)
+#define TMR_CNTR_COUNTER(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK)
 /*! @} */
 
 /* The count of TMR_CNTR */
-#define TMR_CNTR_COUNT                           (4U)
+#define TMR_CNTR_COUNT (4U)
 
 /*! @name CTRL - Timer Channel Control Register */
 /*! @{ */
-#define TMR_CTRL_OUTMODE_MASK                    (0x7U)
-#define TMR_CTRL_OUTMODE_SHIFT                   (0U)
-#define TMR_CTRL_OUTMODE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_OUTMODE_SHIFT)) & TMR_CTRL_OUTMODE_MASK)
-#define TMR_CTRL_COINIT_MASK                     (0x8U)
-#define TMR_CTRL_COINIT_SHIFT                    (3U)
-#define TMR_CTRL_COINIT(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_COINIT_SHIFT)) & TMR_CTRL_COINIT_MASK)
-#define TMR_CTRL_DIR_MASK                        (0x10U)
-#define TMR_CTRL_DIR_SHIFT                       (4U)
-#define TMR_CTRL_DIR(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_DIR_SHIFT)) & TMR_CTRL_DIR_MASK)
-#define TMR_CTRL_LENGTH_MASK                     (0x20U)
-#define TMR_CTRL_LENGTH_SHIFT                    (5U)
-#define TMR_CTRL_LENGTH(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_LENGTH_SHIFT)) & TMR_CTRL_LENGTH_MASK)
-#define TMR_CTRL_ONCE_MASK                       (0x40U)
-#define TMR_CTRL_ONCE_SHIFT                      (6U)
-#define TMR_CTRL_ONCE(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_ONCE_SHIFT)) & TMR_CTRL_ONCE_MASK)
-#define TMR_CTRL_SCS_MASK                        (0x180U)
-#define TMR_CTRL_SCS_SHIFT                       (7U)
-#define TMR_CTRL_SCS(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_SCS_SHIFT)) & TMR_CTRL_SCS_MASK)
-#define TMR_CTRL_PCS_MASK                        (0x1E00U)
-#define TMR_CTRL_PCS_SHIFT                       (9U)
-#define TMR_CTRL_PCS(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_PCS_SHIFT)) & TMR_CTRL_PCS_MASK)
-#define TMR_CTRL_CM_MASK                         (0xE000U)
-#define TMR_CTRL_CM_SHIFT                        (13U)
-#define TMR_CTRL_CM(x)                           (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_CM_SHIFT)) & TMR_CTRL_CM_MASK)
+#define TMR_CTRL_OUTMODE_MASK  (0x7U)
+#define TMR_CTRL_OUTMODE_SHIFT (0U)
+#define TMR_CTRL_OUTMODE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_OUTMODE_SHIFT)) & TMR_CTRL_OUTMODE_MASK)
+#define TMR_CTRL_COINIT_MASK   (0x8U)
+#define TMR_CTRL_COINIT_SHIFT  (3U)
+#define TMR_CTRL_COINIT(x)     (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_COINIT_SHIFT)) & TMR_CTRL_COINIT_MASK)
+#define TMR_CTRL_DIR_MASK      (0x10U)
+#define TMR_CTRL_DIR_SHIFT     (4U)
+#define TMR_CTRL_DIR(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_DIR_SHIFT)) & TMR_CTRL_DIR_MASK)
+#define TMR_CTRL_LENGTH_MASK   (0x20U)
+#define TMR_CTRL_LENGTH_SHIFT  (5U)
+#define TMR_CTRL_LENGTH(x)     (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_LENGTH_SHIFT)) & TMR_CTRL_LENGTH_MASK)
+#define TMR_CTRL_ONCE_MASK     (0x40U)
+#define TMR_CTRL_ONCE_SHIFT    (6U)
+#define TMR_CTRL_ONCE(x)       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_ONCE_SHIFT)) & TMR_CTRL_ONCE_MASK)
+#define TMR_CTRL_SCS_MASK      (0x180U)
+#define TMR_CTRL_SCS_SHIFT     (7U)
+#define TMR_CTRL_SCS(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_SCS_SHIFT)) & TMR_CTRL_SCS_MASK)
+#define TMR_CTRL_PCS_MASK      (0x1E00U)
+#define TMR_CTRL_PCS_SHIFT     (9U)
+#define TMR_CTRL_PCS(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_PCS_SHIFT)) & TMR_CTRL_PCS_MASK)
+#define TMR_CTRL_CM_MASK       (0xE000U)
+#define TMR_CTRL_CM_SHIFT      (13U)
+#define TMR_CTRL_CM(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_CM_SHIFT)) & TMR_CTRL_CM_MASK)
 /*! @} */
 
 /* The count of TMR_CTRL */
-#define TMR_CTRL_COUNT                           (4U)
+#define TMR_CTRL_COUNT (4U)
 
 /*! @name SCTRL - Timer Channel Status and Control Register */
 /*! @{ */
-#define TMR_SCTRL_OEN_MASK                       (0x1U)
-#define TMR_SCTRL_OEN_SHIFT                      (0U)
-#define TMR_SCTRL_OEN(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OEN_SHIFT)) & TMR_SCTRL_OEN_MASK)
-#define TMR_SCTRL_OPS_MASK                       (0x2U)
-#define TMR_SCTRL_OPS_SHIFT                      (1U)
-#define TMR_SCTRL_OPS(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OPS_SHIFT)) & TMR_SCTRL_OPS_MASK)
-#define TMR_SCTRL_FORCE_MASK                     (0x4U)
-#define TMR_SCTRL_FORCE_SHIFT                    (2U)
-#define TMR_SCTRL_FORCE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_FORCE_SHIFT)) & TMR_SCTRL_FORCE_MASK)
-#define TMR_SCTRL_VAL_MASK                       (0x8U)
-#define TMR_SCTRL_VAL_SHIFT                      (3U)
-#define TMR_SCTRL_VAL(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_VAL_SHIFT)) & TMR_SCTRL_VAL_MASK)
-#define TMR_SCTRL_EEOF_MASK                      (0x10U)
-#define TMR_SCTRL_EEOF_SHIFT                     (4U)
-#define TMR_SCTRL_EEOF(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_EEOF_SHIFT)) & TMR_SCTRL_EEOF_MASK)
-#define TMR_SCTRL_MSTR_MASK                      (0x20U)
-#define TMR_SCTRL_MSTR_SHIFT                     (5U)
-#define TMR_SCTRL_MSTR(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_MSTR_SHIFT)) & TMR_SCTRL_MSTR_MASK)
-#define TMR_SCTRL_CAPTURE_MODE_MASK              (0xC0U)
-#define TMR_SCTRL_CAPTURE_MODE_SHIFT             (6U)
-#define TMR_SCTRL_CAPTURE_MODE(x)                (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_CAPTURE_MODE_SHIFT)) & TMR_SCTRL_CAPTURE_MODE_MASK)
-#define TMR_SCTRL_INPUT_MASK                     (0x100U)
-#define TMR_SCTRL_INPUT_SHIFT                    (8U)
-#define TMR_SCTRL_INPUT(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_INPUT_SHIFT)) & TMR_SCTRL_INPUT_MASK)
-#define TMR_SCTRL_IPS_MASK                       (0x200U)
-#define TMR_SCTRL_IPS_SHIFT                      (9U)
-#define TMR_SCTRL_IPS(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IPS_SHIFT)) & TMR_SCTRL_IPS_MASK)
-#define TMR_SCTRL_IEFIE_MASK                     (0x400U)
-#define TMR_SCTRL_IEFIE_SHIFT                    (10U)
-#define TMR_SCTRL_IEFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEFIE_SHIFT)) & TMR_SCTRL_IEFIE_MASK)
-#define TMR_SCTRL_IEF_MASK                       (0x800U)
-#define TMR_SCTRL_IEF_SHIFT                      (11U)
-#define TMR_SCTRL_IEF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEF_SHIFT)) & TMR_SCTRL_IEF_MASK)
-#define TMR_SCTRL_TOFIE_MASK                     (0x1000U)
-#define TMR_SCTRL_TOFIE_SHIFT                    (12U)
-#define TMR_SCTRL_TOFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOFIE_SHIFT)) & TMR_SCTRL_TOFIE_MASK)
-#define TMR_SCTRL_TOF_MASK                       (0x2000U)
-#define TMR_SCTRL_TOF_SHIFT                      (13U)
-#define TMR_SCTRL_TOF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOF_SHIFT)) & TMR_SCTRL_TOF_MASK)
-#define TMR_SCTRL_TCFIE_MASK                     (0x4000U)
-#define TMR_SCTRL_TCFIE_SHIFT                    (14U)
-#define TMR_SCTRL_TCFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCFIE_SHIFT)) & TMR_SCTRL_TCFIE_MASK)
-#define TMR_SCTRL_TCF_MASK                       (0x8000U)
-#define TMR_SCTRL_TCF_SHIFT                      (15U)
-#define TMR_SCTRL_TCF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCF_SHIFT)) & TMR_SCTRL_TCF_MASK)
+#define TMR_SCTRL_OEN_MASK           (0x1U)
+#define TMR_SCTRL_OEN_SHIFT          (0U)
+#define TMR_SCTRL_OEN(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OEN_SHIFT)) & TMR_SCTRL_OEN_MASK)
+#define TMR_SCTRL_OPS_MASK           (0x2U)
+#define TMR_SCTRL_OPS_SHIFT          (1U)
+#define TMR_SCTRL_OPS(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OPS_SHIFT)) & TMR_SCTRL_OPS_MASK)
+#define TMR_SCTRL_FORCE_MASK         (0x4U)
+#define TMR_SCTRL_FORCE_SHIFT        (2U)
+#define TMR_SCTRL_FORCE(x)           (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_FORCE_SHIFT)) & TMR_SCTRL_FORCE_MASK)
+#define TMR_SCTRL_VAL_MASK           (0x8U)
+#define TMR_SCTRL_VAL_SHIFT          (3U)
+#define TMR_SCTRL_VAL(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_VAL_SHIFT)) & TMR_SCTRL_VAL_MASK)
+#define TMR_SCTRL_EEOF_MASK          (0x10U)
+#define TMR_SCTRL_EEOF_SHIFT         (4U)
+#define TMR_SCTRL_EEOF(x)            (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_EEOF_SHIFT)) & TMR_SCTRL_EEOF_MASK)
+#define TMR_SCTRL_MSTR_MASK          (0x20U)
+#define TMR_SCTRL_MSTR_SHIFT         (5U)
+#define TMR_SCTRL_MSTR(x)            (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_MSTR_SHIFT)) & TMR_SCTRL_MSTR_MASK)
+#define TMR_SCTRL_CAPTURE_MODE_MASK  (0xC0U)
+#define TMR_SCTRL_CAPTURE_MODE_SHIFT (6U)
+#define TMR_SCTRL_CAPTURE_MODE(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_CAPTURE_MODE_SHIFT)) & TMR_SCTRL_CAPTURE_MODE_MASK)
+#define TMR_SCTRL_INPUT_MASK  (0x100U)
+#define TMR_SCTRL_INPUT_SHIFT (8U)
+#define TMR_SCTRL_INPUT(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_INPUT_SHIFT)) & TMR_SCTRL_INPUT_MASK)
+#define TMR_SCTRL_IPS_MASK    (0x200U)
+#define TMR_SCTRL_IPS_SHIFT   (9U)
+#define TMR_SCTRL_IPS(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IPS_SHIFT)) & TMR_SCTRL_IPS_MASK)
+#define TMR_SCTRL_IEFIE_MASK  (0x400U)
+#define TMR_SCTRL_IEFIE_SHIFT (10U)
+#define TMR_SCTRL_IEFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEFIE_SHIFT)) & TMR_SCTRL_IEFIE_MASK)
+#define TMR_SCTRL_IEF_MASK    (0x800U)
+#define TMR_SCTRL_IEF_SHIFT   (11U)
+#define TMR_SCTRL_IEF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEF_SHIFT)) & TMR_SCTRL_IEF_MASK)
+#define TMR_SCTRL_TOFIE_MASK  (0x1000U)
+#define TMR_SCTRL_TOFIE_SHIFT (12U)
+#define TMR_SCTRL_TOFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOFIE_SHIFT)) & TMR_SCTRL_TOFIE_MASK)
+#define TMR_SCTRL_TOF_MASK    (0x2000U)
+#define TMR_SCTRL_TOF_SHIFT   (13U)
+#define TMR_SCTRL_TOF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOF_SHIFT)) & TMR_SCTRL_TOF_MASK)
+#define TMR_SCTRL_TCFIE_MASK  (0x4000U)
+#define TMR_SCTRL_TCFIE_SHIFT (14U)
+#define TMR_SCTRL_TCFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCFIE_SHIFT)) & TMR_SCTRL_TCFIE_MASK)
+#define TMR_SCTRL_TCF_MASK    (0x8000U)
+#define TMR_SCTRL_TCF_SHIFT   (15U)
+#define TMR_SCTRL_TCF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCF_SHIFT)) & TMR_SCTRL_TCF_MASK)
 /*! @} */
 
 /* The count of TMR_SCTRL */
-#define TMR_SCTRL_COUNT                          (4U)
+#define TMR_SCTRL_COUNT (4U)
 
 /*! @name CMPLD1 - Timer Channel Comparator Load Register 1 */
 /*! @{ */
-#define TMR_CMPLD1_COMPARATOR_LOAD_1_MASK        (0xFFFFU)
-#define TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT       (0U)
-#define TMR_CMPLD1_COMPARATOR_LOAD_1(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1_MASK  (0xFFFFU)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT (0U)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1(x)                                                                                \
+    (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK)
 /*! @} */
 
 /* The count of TMR_CMPLD1 */
-#define TMR_CMPLD1_COUNT                         (4U)
+#define TMR_CMPLD1_COUNT (4U)
 
 /*! @name CMPLD2 - Timer Channel Comparator Load Register 2 */
 /*! @{ */
-#define TMR_CMPLD2_COMPARATOR_LOAD_2_MASK        (0xFFFFU)
-#define TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT       (0U)
-#define TMR_CMPLD2_COMPARATOR_LOAD_2(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2_MASK  (0xFFFFU)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT (0U)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2(x)                                                                                \
+    (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK)
 /*! @} */
 
 /* The count of TMR_CMPLD2 */
-#define TMR_CMPLD2_COUNT                         (4U)
+#define TMR_CMPLD2_COUNT (4U)
 
 /*! @name CSCTRL - Timer Channel Comparator Status and Control Register */
 /*! @{ */
-#define TMR_CSCTRL_CL1_MASK                      (0x3U)
-#define TMR_CSCTRL_CL1_SHIFT                     (0U)
-#define TMR_CSCTRL_CL1(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL1_SHIFT)) & TMR_CSCTRL_CL1_MASK)
-#define TMR_CSCTRL_CL2_MASK                      (0xCU)
-#define TMR_CSCTRL_CL2_SHIFT                     (2U)
-#define TMR_CSCTRL_CL2(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL2_SHIFT)) & TMR_CSCTRL_CL2_MASK)
-#define TMR_CSCTRL_TCF1_MASK                     (0x10U)
-#define TMR_CSCTRL_TCF1_SHIFT                    (4U)
-#define TMR_CSCTRL_TCF1(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1_SHIFT)) & TMR_CSCTRL_TCF1_MASK)
-#define TMR_CSCTRL_TCF2_MASK                     (0x20U)
-#define TMR_CSCTRL_TCF2_SHIFT                    (5U)
-#define TMR_CSCTRL_TCF2(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2_SHIFT)) & TMR_CSCTRL_TCF2_MASK)
-#define TMR_CSCTRL_TCF1EN_MASK                   (0x40U)
-#define TMR_CSCTRL_TCF1EN_SHIFT                  (6U)
-#define TMR_CSCTRL_TCF1EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1EN_SHIFT)) & TMR_CSCTRL_TCF1EN_MASK)
-#define TMR_CSCTRL_TCF2EN_MASK                   (0x80U)
-#define TMR_CSCTRL_TCF2EN_SHIFT                  (7U)
-#define TMR_CSCTRL_TCF2EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2EN_SHIFT)) & TMR_CSCTRL_TCF2EN_MASK)
-#define TMR_CSCTRL_UP_MASK                       (0x200U)
-#define TMR_CSCTRL_UP_SHIFT                      (9U)
-#define TMR_CSCTRL_UP(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_UP_SHIFT)) & TMR_CSCTRL_UP_MASK)
-#define TMR_CSCTRL_TCI_MASK                      (0x400U)
-#define TMR_CSCTRL_TCI_SHIFT                     (10U)
-#define TMR_CSCTRL_TCI(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCI_SHIFT)) & TMR_CSCTRL_TCI_MASK)
-#define TMR_CSCTRL_ROC_MASK                      (0x800U)
-#define TMR_CSCTRL_ROC_SHIFT                     (11U)
-#define TMR_CSCTRL_ROC(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ROC_SHIFT)) & TMR_CSCTRL_ROC_MASK)
-#define TMR_CSCTRL_ALT_LOAD_MASK                 (0x1000U)
-#define TMR_CSCTRL_ALT_LOAD_SHIFT                (12U)
-#define TMR_CSCTRL_ALT_LOAD(x)                   (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ALT_LOAD_SHIFT)) & TMR_CSCTRL_ALT_LOAD_MASK)
-#define TMR_CSCTRL_FAULT_MASK                    (0x2000U)
-#define TMR_CSCTRL_FAULT_SHIFT                   (13U)
-#define TMR_CSCTRL_FAULT(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_FAULT_SHIFT)) & TMR_CSCTRL_FAULT_MASK)
-#define TMR_CSCTRL_DBG_EN_MASK                   (0xC000U)
-#define TMR_CSCTRL_DBG_EN_SHIFT                  (14U)
-#define TMR_CSCTRL_DBG_EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_DBG_EN_SHIFT)) & TMR_CSCTRL_DBG_EN_MASK)
+#define TMR_CSCTRL_CL1_MASK       (0x3U)
+#define TMR_CSCTRL_CL1_SHIFT      (0U)
+#define TMR_CSCTRL_CL1(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL1_SHIFT)) & TMR_CSCTRL_CL1_MASK)
+#define TMR_CSCTRL_CL2_MASK       (0xCU)
+#define TMR_CSCTRL_CL2_SHIFT      (2U)
+#define TMR_CSCTRL_CL2(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL2_SHIFT)) & TMR_CSCTRL_CL2_MASK)
+#define TMR_CSCTRL_TCF1_MASK      (0x10U)
+#define TMR_CSCTRL_TCF1_SHIFT     (4U)
+#define TMR_CSCTRL_TCF1(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1_SHIFT)) & TMR_CSCTRL_TCF1_MASK)
+#define TMR_CSCTRL_TCF2_MASK      (0x20U)
+#define TMR_CSCTRL_TCF2_SHIFT     (5U)
+#define TMR_CSCTRL_TCF2(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2_SHIFT)) & TMR_CSCTRL_TCF2_MASK)
+#define TMR_CSCTRL_TCF1EN_MASK    (0x40U)
+#define TMR_CSCTRL_TCF1EN_SHIFT   (6U)
+#define TMR_CSCTRL_TCF1EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1EN_SHIFT)) & TMR_CSCTRL_TCF1EN_MASK)
+#define TMR_CSCTRL_TCF2EN_MASK    (0x80U)
+#define TMR_CSCTRL_TCF2EN_SHIFT   (7U)
+#define TMR_CSCTRL_TCF2EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2EN_SHIFT)) & TMR_CSCTRL_TCF2EN_MASK)
+#define TMR_CSCTRL_UP_MASK        (0x200U)
+#define TMR_CSCTRL_UP_SHIFT       (9U)
+#define TMR_CSCTRL_UP(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_UP_SHIFT)) & TMR_CSCTRL_UP_MASK)
+#define TMR_CSCTRL_TCI_MASK       (0x400U)
+#define TMR_CSCTRL_TCI_SHIFT      (10U)
+#define TMR_CSCTRL_TCI(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCI_SHIFT)) & TMR_CSCTRL_TCI_MASK)
+#define TMR_CSCTRL_ROC_MASK       (0x800U)
+#define TMR_CSCTRL_ROC_SHIFT      (11U)
+#define TMR_CSCTRL_ROC(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ROC_SHIFT)) & TMR_CSCTRL_ROC_MASK)
+#define TMR_CSCTRL_ALT_LOAD_MASK  (0x1000U)
+#define TMR_CSCTRL_ALT_LOAD_SHIFT (12U)
+#define TMR_CSCTRL_ALT_LOAD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ALT_LOAD_SHIFT)) & TMR_CSCTRL_ALT_LOAD_MASK)
+#define TMR_CSCTRL_FAULT_MASK     (0x2000U)
+#define TMR_CSCTRL_FAULT_SHIFT    (13U)
+#define TMR_CSCTRL_FAULT(x)       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_FAULT_SHIFT)) & TMR_CSCTRL_FAULT_MASK)
+#define TMR_CSCTRL_DBG_EN_MASK    (0xC000U)
+#define TMR_CSCTRL_DBG_EN_SHIFT   (14U)
+#define TMR_CSCTRL_DBG_EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_DBG_EN_SHIFT)) & TMR_CSCTRL_DBG_EN_MASK)
 /*! @} */
 
 /* The count of TMR_CSCTRL */
-#define TMR_CSCTRL_COUNT                         (4U)
+#define TMR_CSCTRL_COUNT (4U)
 
 /*! @name FILT - Timer Channel Input Filter Register */
 /*! @{ */
-#define TMR_FILT_FILT_PER_MASK                   (0xFFU)
-#define TMR_FILT_FILT_PER_SHIFT                  (0U)
-#define TMR_FILT_FILT_PER(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK)
-#define TMR_FILT_FILT_CNT_MASK                   (0x700U)
-#define TMR_FILT_FILT_CNT_SHIFT                  (8U)
-#define TMR_FILT_FILT_CNT(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK)
+#define TMR_FILT_FILT_PER_MASK  (0xFFU)
+#define TMR_FILT_FILT_PER_SHIFT (0U)
+#define TMR_FILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK)
+#define TMR_FILT_FILT_CNT_MASK  (0x700U)
+#define TMR_FILT_FILT_CNT_SHIFT (8U)
+#define TMR_FILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK)
 /*! @} */
 
 /* The count of TMR_FILT */
-#define TMR_FILT_COUNT                           (4U)
+#define TMR_FILT_COUNT (4U)
 
 /*! @name DMA - Timer Channel DMA Enable Register */
 /*! @{ */
-#define TMR_DMA_IEFDE_MASK                       (0x1U)
-#define TMR_DMA_IEFDE_SHIFT                      (0U)
-#define TMR_DMA_IEFDE(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK)
-#define TMR_DMA_CMPLD1DE_MASK                    (0x2U)
-#define TMR_DMA_CMPLD1DE_SHIFT                   (1U)
-#define TMR_DMA_CMPLD1DE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK)
-#define TMR_DMA_CMPLD2DE_MASK                    (0x4U)
-#define TMR_DMA_CMPLD2DE_SHIFT                   (2U)
-#define TMR_DMA_CMPLD2DE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK)
+#define TMR_DMA_IEFDE_MASK     (0x1U)
+#define TMR_DMA_IEFDE_SHIFT    (0U)
+#define TMR_DMA_IEFDE(x)       (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK)
+#define TMR_DMA_CMPLD1DE_MASK  (0x2U)
+#define TMR_DMA_CMPLD1DE_SHIFT (1U)
+#define TMR_DMA_CMPLD1DE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK)
+#define TMR_DMA_CMPLD2DE_MASK  (0x4U)
+#define TMR_DMA_CMPLD2DE_SHIFT (2U)
+#define TMR_DMA_CMPLD2DE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK)
 /*! @} */
 
 /* The count of TMR_DMA */
-#define TMR_DMA_COUNT                            (4U)
+#define TMR_DMA_COUNT (4U)
 
 /*! @name ENBL - Timer Channel Enable Register */
 /*! @{ */
-#define TMR_ENBL_ENBL_MASK                       (0xFU)
-#define TMR_ENBL_ENBL_SHIFT                      (0U)
-#define TMR_ENBL_ENBL(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK)
+#define TMR_ENBL_ENBL_MASK  (0xFU)
+#define TMR_ENBL_ENBL_SHIFT (0U)
+#define TMR_ENBL_ENBL(x)    (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK)
 /*! @} */
 
 /* The count of TMR_ENBL */
-#define TMR_ENBL_COUNT                           (4U)
-
+#define TMR_ENBL_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group TMR_Register_Masks */
 
-
 /* TMR - Peripheral instance base addresses */
 /** Peripheral TMR1 base address */
-#define TMR1_BASE                                (0x401DC000u)
+#define TMR1_BASE (0x401DC000u)
 /** Peripheral TMR1 base pointer */
-#define TMR1                                     ((TMR_Type *)TMR1_BASE)
+#define TMR1 ((TMR_Type *)TMR1_BASE)
 /** Peripheral TMR2 base address */
-#define TMR2_BASE                                (0x401E0000u)
+#define TMR2_BASE (0x401E0000u)
 /** Peripheral TMR2 base pointer */
-#define TMR2                                     ((TMR_Type *)TMR2_BASE)
+#define TMR2 ((TMR_Type *)TMR2_BASE)
 /** Peripheral TMR3 base address */
-#define TMR3_BASE                                (0x401E4000u)
+#define TMR3_BASE (0x401E4000u)
 /** Peripheral TMR3 base pointer */
-#define TMR3                                     ((TMR_Type *)TMR3_BASE)
+#define TMR3 ((TMR_Type *)TMR3_BASE)
 /** Peripheral TMR4 base address */
-#define TMR4_BASE                                (0x401E8000u)
+#define TMR4_BASE (0x401E8000u)
 /** Peripheral TMR4 base pointer */
-#define TMR4                                     ((TMR_Type *)TMR4_BASE)
+#define TMR4 ((TMR_Type *)TMR4_BASE)
 /** Array initializer of TMR peripheral base addresses */
-#define TMR_BASE_ADDRS                           { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
+#define TMR_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE                                                                 \
+    }
 /** Array initializer of TMR peripheral base pointers */
-#define TMR_BASE_PTRS                            { (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4 }
+#define TMR_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4                                                                         \
+    }
 /** Interrupt vectors for the TMR peripheral type */
-#define TMR_IRQS                                 { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn }
+#define TMR_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group TMR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TRNG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20817,69 +23726,80 @@ typedef struct {
  */
 
 /** TRNG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCTL;                              /**< Miscellaneous Control Register, offset: 0x0 */
-  __IO uint32_t SCMISC;                            /**< Statistical Check Miscellaneous Register, offset: 0x4 */
-  __IO uint32_t PKRRNG;                            /**< Poker Range Register, offset: 0x8 */
-  union {                                          /* offset: 0xC */
-    __IO uint32_t PKRMAX;                            /**< Poker Maximum Limit Register, offset: 0xC */
-    __I  uint32_t PKRSQ;                             /**< Poker Square Calculation Result Register, offset: 0xC */
-  };
-  __IO uint32_t SDCTL;                             /**< Seed Control Register, offset: 0x10 */
-  union {                                          /* offset: 0x14 */
-    __IO uint32_t SBLIM;                             /**< Sparse Bit Limit Register, offset: 0x14 */
-    __I  uint32_t TOTSAM;                            /**< Total Samples Register, offset: 0x14 */
-  };
-  __IO uint32_t FRQMIN;                            /**< Frequency Count Minimum Limit Register, offset: 0x18 */
-  union {                                          /* offset: 0x1C */
-    __I  uint32_t FRQCNT;                            /**< Frequency Count Register, offset: 0x1C */
-    __IO uint32_t FRQMAX;                            /**< Frequency Count Maximum Limit Register, offset: 0x1C */
-  };
-  union {                                          /* offset: 0x20 */
-    __I  uint32_t SCMC;                              /**< Statistical Check Monobit Count Register, offset: 0x20 */
-    __IO uint32_t SCML;                              /**< Statistical Check Monobit Limit Register, offset: 0x20 */
-  };
-  union {                                          /* offset: 0x24 */
-    __I  uint32_t SCR1C;                             /**< Statistical Check Run Length 1 Count Register, offset: 0x24 */
-    __IO uint32_t SCR1L;                             /**< Statistical Check Run Length 1 Limit Register, offset: 0x24 */
-  };
-  union {                                          /* offset: 0x28 */
-    __I  uint32_t SCR2C;                             /**< Statistical Check Run Length 2 Count Register, offset: 0x28 */
-    __IO uint32_t SCR2L;                             /**< Statistical Check Run Length 2 Limit Register, offset: 0x28 */
-  };
-  union {                                          /* offset: 0x2C */
-    __I  uint32_t SCR3C;                             /**< Statistical Check Run Length 3 Count Register, offset: 0x2C */
-    __IO uint32_t SCR3L;                             /**< Statistical Check Run Length 3 Limit Register, offset: 0x2C */
-  };
-  union {                                          /* offset: 0x30 */
-    __I  uint32_t SCR4C;                             /**< Statistical Check Run Length 4 Count Register, offset: 0x30 */
-    __IO uint32_t SCR4L;                             /**< Statistical Check Run Length 4 Limit Register, offset: 0x30 */
-  };
-  union {                                          /* offset: 0x34 */
-    __I  uint32_t SCR5C;                             /**< Statistical Check Run Length 5 Count Register, offset: 0x34 */
-    __IO uint32_t SCR5L;                             /**< Statistical Check Run Length 5 Limit Register, offset: 0x34 */
-  };
-  union {                                          /* offset: 0x38 */
-    __I  uint32_t SCR6PC;                            /**< Statistical Check Run Length 6+ Count Register, offset: 0x38 */
-    __IO uint32_t SCR6PL;                            /**< Statistical Check Run Length 6+ Limit Register, offset: 0x38 */
-  };
-  __I  uint32_t STATUS;                            /**< Status Register, offset: 0x3C */
-  __I  uint32_t ENT[16];                           /**< Entropy Read Register, array offset: 0x40, array step: 0x4 */
-  __I  uint32_t PKRCNT10;                          /**< Statistical Check Poker Count 1 and 0 Register, offset: 0x80 */
-  __I  uint32_t PKRCNT32;                          /**< Statistical Check Poker Count 3 and 2 Register, offset: 0x84 */
-  __I  uint32_t PKRCNT54;                          /**< Statistical Check Poker Count 5 and 4 Register, offset: 0x88 */
-  __I  uint32_t PKRCNT76;                          /**< Statistical Check Poker Count 7 and 6 Register, offset: 0x8C */
-  __I  uint32_t PKRCNT98;                          /**< Statistical Check Poker Count 9 and 8 Register, offset: 0x90 */
-  __I  uint32_t PKRCNTBA;                          /**< Statistical Check Poker Count B and A Register, offset: 0x94 */
-  __I  uint32_t PKRCNTDC;                          /**< Statistical Check Poker Count D and C Register, offset: 0x98 */
-  __I  uint32_t PKRCNTFE;                          /**< Statistical Check Poker Count F and E Register, offset: 0x9C */
-  __IO uint32_t SEC_CFG;                           /**< Security Configuration Register, offset: 0xA0 */
-  __IO uint32_t INT_CTRL;                          /**< Interrupt Control Register, offset: 0xA4 */
-  __IO uint32_t INT_MASK;                          /**< Mask Register, offset: 0xA8 */
-  __I  uint32_t INT_STATUS;                        /**< Interrupt Status Register, offset: 0xAC */
-       uint8_t RESERVED_0[64];
-  __I  uint32_t VID1;                              /**< Version ID Register (MS), offset: 0xF0 */
-  __I  uint32_t VID2;                              /**< Version ID Register (LS), offset: 0xF4 */
+typedef struct
+{
+    __IO uint32_t MCTL;   /**< Miscellaneous Control Register, offset: 0x0 */
+    __IO uint32_t SCMISC; /**< Statistical Check Miscellaneous Register, offset: 0x4 */
+    __IO uint32_t PKRRNG; /**< Poker Range Register, offset: 0x8 */
+    union
+    {                         /* offset: 0xC */
+        __IO uint32_t PKRMAX; /**< Poker Maximum Limit Register, offset: 0xC */
+        __I uint32_t PKRSQ;   /**< Poker Square Calculation Result Register, offset: 0xC */
+    };
+    __IO uint32_t SDCTL; /**< Seed Control Register, offset: 0x10 */
+    union
+    {                        /* offset: 0x14 */
+        __IO uint32_t SBLIM; /**< Sparse Bit Limit Register, offset: 0x14 */
+        __I uint32_t TOTSAM; /**< Total Samples Register, offset: 0x14 */
+    };
+    __IO uint32_t FRQMIN; /**< Frequency Count Minimum Limit Register, offset: 0x18 */
+    union
+    {                         /* offset: 0x1C */
+        __I uint32_t FRQCNT;  /**< Frequency Count Register, offset: 0x1C */
+        __IO uint32_t FRQMAX; /**< Frequency Count Maximum Limit Register, offset: 0x1C */
+    };
+    union
+    {                       /* offset: 0x20 */
+        __I uint32_t SCMC;  /**< Statistical Check Monobit Count Register, offset: 0x20 */
+        __IO uint32_t SCML; /**< Statistical Check Monobit Limit Register, offset: 0x20 */
+    };
+    union
+    {                        /* offset: 0x24 */
+        __I uint32_t SCR1C;  /**< Statistical Check Run Length 1 Count Register, offset: 0x24 */
+        __IO uint32_t SCR1L; /**< Statistical Check Run Length 1 Limit Register, offset: 0x24 */
+    };
+    union
+    {                        /* offset: 0x28 */
+        __I uint32_t SCR2C;  /**< Statistical Check Run Length 2 Count Register, offset: 0x28 */
+        __IO uint32_t SCR2L; /**< Statistical Check Run Length 2 Limit Register, offset: 0x28 */
+    };
+    union
+    {                        /* offset: 0x2C */
+        __I uint32_t SCR3C;  /**< Statistical Check Run Length 3 Count Register, offset: 0x2C */
+        __IO uint32_t SCR3L; /**< Statistical Check Run Length 3 Limit Register, offset: 0x2C */
+    };
+    union
+    {                        /* offset: 0x30 */
+        __I uint32_t SCR4C;  /**< Statistical Check Run Length 4 Count Register, offset: 0x30 */
+        __IO uint32_t SCR4L; /**< Statistical Check Run Length 4 Limit Register, offset: 0x30 */
+    };
+    union
+    {                        /* offset: 0x34 */
+        __I uint32_t SCR5C;  /**< Statistical Check Run Length 5 Count Register, offset: 0x34 */
+        __IO uint32_t SCR5L; /**< Statistical Check Run Length 5 Limit Register, offset: 0x34 */
+    };
+    union
+    {                         /* offset: 0x38 */
+        __I uint32_t SCR6PC;  /**< Statistical Check Run Length 6+ Count Register, offset: 0x38 */
+        __IO uint32_t SCR6PL; /**< Statistical Check Run Length 6+ Limit Register, offset: 0x38 */
+    };
+    __I uint32_t STATUS;     /**< Status Register, offset: 0x3C */
+    __I uint32_t ENT[16];    /**< Entropy Read Register, array offset: 0x40, array step: 0x4 */
+    __I uint32_t PKRCNT10;   /**< Statistical Check Poker Count 1 and 0 Register, offset: 0x80 */
+    __I uint32_t PKRCNT32;   /**< Statistical Check Poker Count 3 and 2 Register, offset: 0x84 */
+    __I uint32_t PKRCNT54;   /**< Statistical Check Poker Count 5 and 4 Register, offset: 0x88 */
+    __I uint32_t PKRCNT76;   /**< Statistical Check Poker Count 7 and 6 Register, offset: 0x8C */
+    __I uint32_t PKRCNT98;   /**< Statistical Check Poker Count 9 and 8 Register, offset: 0x90 */
+    __I uint32_t PKRCNTBA;   /**< Statistical Check Poker Count B and A Register, offset: 0x94 */
+    __I uint32_t PKRCNTDC;   /**< Statistical Check Poker Count D and C Register, offset: 0x98 */
+    __I uint32_t PKRCNTFE;   /**< Statistical Check Poker Count F and E Register, offset: 0x9C */
+    __IO uint32_t SEC_CFG;   /**< Security Configuration Register, offset: 0xA0 */
+    __IO uint32_t INT_CTRL;  /**< Interrupt Control Register, offset: 0xA4 */
+    __IO uint32_t INT_MASK;  /**< Mask Register, offset: 0xA8 */
+    __I uint32_t INT_STATUS; /**< Interrupt Status Register, offset: 0xAC */
+    uint8_t RESERVED_0[64];
+    __I uint32_t VID1; /**< Version ID Register (MS), offset: 0xF0 */
+    __I uint32_t VID2; /**< Version ID Register (LS), offset: 0xF4 */
 } TRNG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20893,515 +23813,558 @@ typedef struct {
 
 /*! @name MCTL - Miscellaneous Control Register */
 /*! @{ */
-#define TRNG_MCTL_SAMP_MODE_MASK                 (0x3U)
-#define TRNG_MCTL_SAMP_MODE_SHIFT                (0U)
-#define TRNG_MCTL_SAMP_MODE(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_SAMP_MODE_SHIFT)) & TRNG_MCTL_SAMP_MODE_MASK)
-#define TRNG_MCTL_OSC_DIV_MASK                   (0xCU)
-#define TRNG_MCTL_OSC_DIV_SHIFT                  (2U)
-#define TRNG_MCTL_OSC_DIV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_OSC_DIV_SHIFT)) & TRNG_MCTL_OSC_DIV_MASK)
-#define TRNG_MCTL_UNUSED4_MASK                   (0x10U)
-#define TRNG_MCTL_UNUSED4_SHIFT                  (4U)
-#define TRNG_MCTL_UNUSED4(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED4_SHIFT)) & TRNG_MCTL_UNUSED4_MASK)
-#define TRNG_MCTL_UNUSED5_MASK                   (0x20U)
-#define TRNG_MCTL_UNUSED5_SHIFT                  (5U)
-#define TRNG_MCTL_UNUSED5(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED5_SHIFT)) & TRNG_MCTL_UNUSED5_MASK)
-#define TRNG_MCTL_RST_DEF_MASK                   (0x40U)
-#define TRNG_MCTL_RST_DEF_SHIFT                  (6U)
-#define TRNG_MCTL_RST_DEF(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_RST_DEF_SHIFT)) & TRNG_MCTL_RST_DEF_MASK)
-#define TRNG_MCTL_FOR_SCLK_MASK                  (0x80U)
-#define TRNG_MCTL_FOR_SCLK_SHIFT                 (7U)
-#define TRNG_MCTL_FOR_SCLK(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FOR_SCLK_SHIFT)) & TRNG_MCTL_FOR_SCLK_MASK)
-#define TRNG_MCTL_FCT_FAIL_MASK                  (0x100U)
-#define TRNG_MCTL_FCT_FAIL_SHIFT                 (8U)
-#define TRNG_MCTL_FCT_FAIL(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_FAIL_SHIFT)) & TRNG_MCTL_FCT_FAIL_MASK)
-#define TRNG_MCTL_FCT_VAL_MASK                   (0x200U)
-#define TRNG_MCTL_FCT_VAL_SHIFT                  (9U)
-#define TRNG_MCTL_FCT_VAL(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_VAL_SHIFT)) & TRNG_MCTL_FCT_VAL_MASK)
-#define TRNG_MCTL_ENT_VAL_MASK                   (0x400U)
-#define TRNG_MCTL_ENT_VAL_SHIFT                  (10U)
-#define TRNG_MCTL_ENT_VAL(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ENT_VAL_SHIFT)) & TRNG_MCTL_ENT_VAL_MASK)
-#define TRNG_MCTL_TST_OUT_MASK                   (0x800U)
-#define TRNG_MCTL_TST_OUT_SHIFT                  (11U)
-#define TRNG_MCTL_TST_OUT(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TST_OUT_SHIFT)) & TRNG_MCTL_TST_OUT_MASK)
-#define TRNG_MCTL_ERR_MASK                       (0x1000U)
-#define TRNG_MCTL_ERR_SHIFT                      (12U)
-#define TRNG_MCTL_ERR(x)                         (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ERR_SHIFT)) & TRNG_MCTL_ERR_MASK)
-#define TRNG_MCTL_TSTOP_OK_MASK                  (0x2000U)
-#define TRNG_MCTL_TSTOP_OK_SHIFT                 (13U)
-#define TRNG_MCTL_TSTOP_OK(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TSTOP_OK_SHIFT)) & TRNG_MCTL_TSTOP_OK_MASK)
-#define TRNG_MCTL_LRUN_CONT_MASK                 (0x4000U)
-#define TRNG_MCTL_LRUN_CONT_SHIFT                (14U)
-#define TRNG_MCTL_LRUN_CONT(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_LRUN_CONT_SHIFT)) & TRNG_MCTL_LRUN_CONT_MASK)
-#define TRNG_MCTL_PRGM_MASK                      (0x10000U)
-#define TRNG_MCTL_PRGM_SHIFT                     (16U)
-#define TRNG_MCTL_PRGM(x)                        (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_PRGM_SHIFT)) & TRNG_MCTL_PRGM_MASK)
+#define TRNG_MCTL_SAMP_MODE_MASK  (0x3U)
+#define TRNG_MCTL_SAMP_MODE_SHIFT (0U)
+#define TRNG_MCTL_SAMP_MODE(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_SAMP_MODE_SHIFT)) & TRNG_MCTL_SAMP_MODE_MASK)
+#define TRNG_MCTL_OSC_DIV_MASK    (0xCU)
+#define TRNG_MCTL_OSC_DIV_SHIFT   (2U)
+#define TRNG_MCTL_OSC_DIV(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_OSC_DIV_SHIFT)) & TRNG_MCTL_OSC_DIV_MASK)
+#define TRNG_MCTL_UNUSED4_MASK    (0x10U)
+#define TRNG_MCTL_UNUSED4_SHIFT   (4U)
+#define TRNG_MCTL_UNUSED4(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED4_SHIFT)) & TRNG_MCTL_UNUSED4_MASK)
+#define TRNG_MCTL_UNUSED5_MASK    (0x20U)
+#define TRNG_MCTL_UNUSED5_SHIFT   (5U)
+#define TRNG_MCTL_UNUSED5(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED5_SHIFT)) & TRNG_MCTL_UNUSED5_MASK)
+#define TRNG_MCTL_RST_DEF_MASK    (0x40U)
+#define TRNG_MCTL_RST_DEF_SHIFT   (6U)
+#define TRNG_MCTL_RST_DEF(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_RST_DEF_SHIFT)) & TRNG_MCTL_RST_DEF_MASK)
+#define TRNG_MCTL_FOR_SCLK_MASK   (0x80U)
+#define TRNG_MCTL_FOR_SCLK_SHIFT  (7U)
+#define TRNG_MCTL_FOR_SCLK(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FOR_SCLK_SHIFT)) & TRNG_MCTL_FOR_SCLK_MASK)
+#define TRNG_MCTL_FCT_FAIL_MASK   (0x100U)
+#define TRNG_MCTL_FCT_FAIL_SHIFT  (8U)
+#define TRNG_MCTL_FCT_FAIL(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_FAIL_SHIFT)) & TRNG_MCTL_FCT_FAIL_MASK)
+#define TRNG_MCTL_FCT_VAL_MASK    (0x200U)
+#define TRNG_MCTL_FCT_VAL_SHIFT   (9U)
+#define TRNG_MCTL_FCT_VAL(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_VAL_SHIFT)) & TRNG_MCTL_FCT_VAL_MASK)
+#define TRNG_MCTL_ENT_VAL_MASK    (0x400U)
+#define TRNG_MCTL_ENT_VAL_SHIFT   (10U)
+#define TRNG_MCTL_ENT_VAL(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ENT_VAL_SHIFT)) & TRNG_MCTL_ENT_VAL_MASK)
+#define TRNG_MCTL_TST_OUT_MASK    (0x800U)
+#define TRNG_MCTL_TST_OUT_SHIFT   (11U)
+#define TRNG_MCTL_TST_OUT(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TST_OUT_SHIFT)) & TRNG_MCTL_TST_OUT_MASK)
+#define TRNG_MCTL_ERR_MASK        (0x1000U)
+#define TRNG_MCTL_ERR_SHIFT       (12U)
+#define TRNG_MCTL_ERR(x)          (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ERR_SHIFT)) & TRNG_MCTL_ERR_MASK)
+#define TRNG_MCTL_TSTOP_OK_MASK   (0x2000U)
+#define TRNG_MCTL_TSTOP_OK_SHIFT  (13U)
+#define TRNG_MCTL_TSTOP_OK(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TSTOP_OK_SHIFT)) & TRNG_MCTL_TSTOP_OK_MASK)
+#define TRNG_MCTL_LRUN_CONT_MASK  (0x4000U)
+#define TRNG_MCTL_LRUN_CONT_SHIFT (14U)
+#define TRNG_MCTL_LRUN_CONT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_LRUN_CONT_SHIFT)) & TRNG_MCTL_LRUN_CONT_MASK)
+#define TRNG_MCTL_PRGM_MASK       (0x10000U)
+#define TRNG_MCTL_PRGM_SHIFT      (16U)
+#define TRNG_MCTL_PRGM(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_PRGM_SHIFT)) & TRNG_MCTL_PRGM_MASK)
 /*! @} */
 
 /*! @name SCMISC - Statistical Check Miscellaneous Register */
 /*! @{ */
-#define TRNG_SCMISC_LRUN_MAX_MASK                (0xFFU)
-#define TRNG_SCMISC_LRUN_MAX_SHIFT               (0U)
-#define TRNG_SCMISC_LRUN_MAX(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_LRUN_MAX_SHIFT)) & TRNG_SCMISC_LRUN_MAX_MASK)
-#define TRNG_SCMISC_RTY_CT_MASK                  (0xF0000U)
-#define TRNG_SCMISC_RTY_CT_SHIFT                 (16U)
-#define TRNG_SCMISC_RTY_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_RTY_CT_SHIFT)) & TRNG_SCMISC_RTY_CT_MASK)
+#define TRNG_SCMISC_LRUN_MAX_MASK  (0xFFU)
+#define TRNG_SCMISC_LRUN_MAX_SHIFT (0U)
+#define TRNG_SCMISC_LRUN_MAX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_LRUN_MAX_SHIFT)) & TRNG_SCMISC_LRUN_MAX_MASK)
+#define TRNG_SCMISC_RTY_CT_MASK  (0xF0000U)
+#define TRNG_SCMISC_RTY_CT_SHIFT (16U)
+#define TRNG_SCMISC_RTY_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_RTY_CT_SHIFT)) & TRNG_SCMISC_RTY_CT_MASK)
 /*! @} */
 
 /*! @name PKRRNG - Poker Range Register */
 /*! @{ */
-#define TRNG_PKRRNG_PKR_RNG_MASK                 (0xFFFFU)
-#define TRNG_PKRRNG_PKR_RNG_SHIFT                (0U)
-#define TRNG_PKRRNG_PKR_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_PKRRNG_PKR_RNG_SHIFT)) & TRNG_PKRRNG_PKR_RNG_MASK)
+#define TRNG_PKRRNG_PKR_RNG_MASK  (0xFFFFU)
+#define TRNG_PKRRNG_PKR_RNG_SHIFT (0U)
+#define TRNG_PKRRNG_PKR_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRRNG_PKR_RNG_SHIFT)) & TRNG_PKRRNG_PKR_RNG_MASK)
 /*! @} */
 
 /*! @name PKRMAX - Poker Maximum Limit Register */
 /*! @{ */
-#define TRNG_PKRMAX_PKR_MAX_MASK                 (0xFFFFFFU)
-#define TRNG_PKRMAX_PKR_MAX_SHIFT                (0U)
-#define TRNG_PKRMAX_PKR_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_PKRMAX_PKR_MAX_SHIFT)) & TRNG_PKRMAX_PKR_MAX_MASK)
+#define TRNG_PKRMAX_PKR_MAX_MASK  (0xFFFFFFU)
+#define TRNG_PKRMAX_PKR_MAX_SHIFT (0U)
+#define TRNG_PKRMAX_PKR_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRMAX_PKR_MAX_SHIFT)) & TRNG_PKRMAX_PKR_MAX_MASK)
 /*! @} */
 
 /*! @name PKRSQ - Poker Square Calculation Result Register */
 /*! @{ */
-#define TRNG_PKRSQ_PKR_SQ_MASK                   (0xFFFFFFU)
-#define TRNG_PKRSQ_PKR_SQ_SHIFT                  (0U)
-#define TRNG_PKRSQ_PKR_SQ(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_PKRSQ_PKR_SQ_SHIFT)) & TRNG_PKRSQ_PKR_SQ_MASK)
+#define TRNG_PKRSQ_PKR_SQ_MASK  (0xFFFFFFU)
+#define TRNG_PKRSQ_PKR_SQ_SHIFT (0U)
+#define TRNG_PKRSQ_PKR_SQ(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRSQ_PKR_SQ_SHIFT)) & TRNG_PKRSQ_PKR_SQ_MASK)
 /*! @} */
 
 /*! @name SDCTL - Seed Control Register */
 /*! @{ */
-#define TRNG_SDCTL_SAMP_SIZE_MASK                (0xFFFFU)
-#define TRNG_SDCTL_SAMP_SIZE_SHIFT               (0U)
-#define TRNG_SDCTL_SAMP_SIZE(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_SAMP_SIZE_SHIFT)) & TRNG_SDCTL_SAMP_SIZE_MASK)
-#define TRNG_SDCTL_ENT_DLY_MASK                  (0xFFFF0000U)
-#define TRNG_SDCTL_ENT_DLY_SHIFT                 (16U)
-#define TRNG_SDCTL_ENT_DLY(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_ENT_DLY_SHIFT)) & TRNG_SDCTL_ENT_DLY_MASK)
+#define TRNG_SDCTL_SAMP_SIZE_MASK  (0xFFFFU)
+#define TRNG_SDCTL_SAMP_SIZE_SHIFT (0U)
+#define TRNG_SDCTL_SAMP_SIZE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_SAMP_SIZE_SHIFT)) & TRNG_SDCTL_SAMP_SIZE_MASK)
+#define TRNG_SDCTL_ENT_DLY_MASK  (0xFFFF0000U)
+#define TRNG_SDCTL_ENT_DLY_SHIFT (16U)
+#define TRNG_SDCTL_ENT_DLY(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_ENT_DLY_SHIFT)) & TRNG_SDCTL_ENT_DLY_MASK)
 /*! @} */
 
 /*! @name SBLIM - Sparse Bit Limit Register */
 /*! @{ */
-#define TRNG_SBLIM_SB_LIM_MASK                   (0x3FFU)
-#define TRNG_SBLIM_SB_LIM_SHIFT                  (0U)
-#define TRNG_SBLIM_SB_LIM(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_SBLIM_SB_LIM_SHIFT)) & TRNG_SBLIM_SB_LIM_MASK)
+#define TRNG_SBLIM_SB_LIM_MASK  (0x3FFU)
+#define TRNG_SBLIM_SB_LIM_SHIFT (0U)
+#define TRNG_SBLIM_SB_LIM(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SBLIM_SB_LIM_SHIFT)) & TRNG_SBLIM_SB_LIM_MASK)
 /*! @} */
 
 /*! @name TOTSAM - Total Samples Register */
 /*! @{ */
-#define TRNG_TOTSAM_TOT_SAM_MASK                 (0xFFFFFU)
-#define TRNG_TOTSAM_TOT_SAM_SHIFT                (0U)
-#define TRNG_TOTSAM_TOT_SAM(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_TOTSAM_TOT_SAM_SHIFT)) & TRNG_TOTSAM_TOT_SAM_MASK)
+#define TRNG_TOTSAM_TOT_SAM_MASK  (0xFFFFFU)
+#define TRNG_TOTSAM_TOT_SAM_SHIFT (0U)
+#define TRNG_TOTSAM_TOT_SAM(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_TOTSAM_TOT_SAM_SHIFT)) & TRNG_TOTSAM_TOT_SAM_MASK)
 /*! @} */
 
 /*! @name FRQMIN - Frequency Count Minimum Limit Register */
 /*! @{ */
-#define TRNG_FRQMIN_FRQ_MIN_MASK                 (0x3FFFFFU)
-#define TRNG_FRQMIN_FRQ_MIN_SHIFT                (0U)
-#define TRNG_FRQMIN_FRQ_MIN(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMIN_FRQ_MIN_SHIFT)) & TRNG_FRQMIN_FRQ_MIN_MASK)
+#define TRNG_FRQMIN_FRQ_MIN_MASK  (0x3FFFFFU)
+#define TRNG_FRQMIN_FRQ_MIN_SHIFT (0U)
+#define TRNG_FRQMIN_FRQ_MIN(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMIN_FRQ_MIN_SHIFT)) & TRNG_FRQMIN_FRQ_MIN_MASK)
 /*! @} */
 
 /*! @name FRQCNT - Frequency Count Register */
 /*! @{ */
-#define TRNG_FRQCNT_FRQ_CT_MASK                  (0x3FFFFFU)
-#define TRNG_FRQCNT_FRQ_CT_SHIFT                 (0U)
-#define TRNG_FRQCNT_FRQ_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQCNT_FRQ_CT_SHIFT)) & TRNG_FRQCNT_FRQ_CT_MASK)
+#define TRNG_FRQCNT_FRQ_CT_MASK  (0x3FFFFFU)
+#define TRNG_FRQCNT_FRQ_CT_SHIFT (0U)
+#define TRNG_FRQCNT_FRQ_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQCNT_FRQ_CT_SHIFT)) & TRNG_FRQCNT_FRQ_CT_MASK)
 /*! @} */
 
 /*! @name FRQMAX - Frequency Count Maximum Limit Register */
 /*! @{ */
-#define TRNG_FRQMAX_FRQ_MAX_MASK                 (0x3FFFFFU)
-#define TRNG_FRQMAX_FRQ_MAX_SHIFT                (0U)
-#define TRNG_FRQMAX_FRQ_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMAX_FRQ_MAX_SHIFT)) & TRNG_FRQMAX_FRQ_MAX_MASK)
+#define TRNG_FRQMAX_FRQ_MAX_MASK  (0x3FFFFFU)
+#define TRNG_FRQMAX_FRQ_MAX_SHIFT (0U)
+#define TRNG_FRQMAX_FRQ_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMAX_FRQ_MAX_SHIFT)) & TRNG_FRQMAX_FRQ_MAX_MASK)
 /*! @} */
 
 /*! @name SCMC - Statistical Check Monobit Count Register */
 /*! @{ */
-#define TRNG_SCMC_MONO_CT_MASK                   (0xFFFFU)
-#define TRNG_SCMC_MONO_CT_SHIFT                  (0U)
-#define TRNG_SCMC_MONO_CT(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_SCMC_MONO_CT_SHIFT)) & TRNG_SCMC_MONO_CT_MASK)
+#define TRNG_SCMC_MONO_CT_MASK  (0xFFFFU)
+#define TRNG_SCMC_MONO_CT_SHIFT (0U)
+#define TRNG_SCMC_MONO_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMC_MONO_CT_SHIFT)) & TRNG_SCMC_MONO_CT_MASK)
 /*! @} */
 
 /*! @name SCML - Statistical Check Monobit Limit Register */
 /*! @{ */
-#define TRNG_SCML_MONO_MAX_MASK                  (0xFFFFU)
-#define TRNG_SCML_MONO_MAX_SHIFT                 (0U)
-#define TRNG_SCML_MONO_MAX(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_MAX_SHIFT)) & TRNG_SCML_MONO_MAX_MASK)
-#define TRNG_SCML_MONO_RNG_MASK                  (0xFFFF0000U)
-#define TRNG_SCML_MONO_RNG_SHIFT                 (16U)
-#define TRNG_SCML_MONO_RNG(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_RNG_SHIFT)) & TRNG_SCML_MONO_RNG_MASK)
+#define TRNG_SCML_MONO_MAX_MASK  (0xFFFFU)
+#define TRNG_SCML_MONO_MAX_SHIFT (0U)
+#define TRNG_SCML_MONO_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_MAX_SHIFT)) & TRNG_SCML_MONO_MAX_MASK)
+#define TRNG_SCML_MONO_RNG_MASK  (0xFFFF0000U)
+#define TRNG_SCML_MONO_RNG_SHIFT (16U)
+#define TRNG_SCML_MONO_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_RNG_SHIFT)) & TRNG_SCML_MONO_RNG_MASK)
 /*! @} */
 
 /*! @name SCR1C - Statistical Check Run Length 1 Count Register */
 /*! @{ */
-#define TRNG_SCR1C_R1_0_CT_MASK                  (0x7FFFU)
-#define TRNG_SCR1C_R1_0_CT_SHIFT                 (0U)
-#define TRNG_SCR1C_R1_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_0_CT_SHIFT)) & TRNG_SCR1C_R1_0_CT_MASK)
-#define TRNG_SCR1C_R1_1_CT_MASK                  (0x7FFF0000U)
-#define TRNG_SCR1C_R1_1_CT_SHIFT                 (16U)
-#define TRNG_SCR1C_R1_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_1_CT_SHIFT)) & TRNG_SCR1C_R1_1_CT_MASK)
+#define TRNG_SCR1C_R1_0_CT_MASK  (0x7FFFU)
+#define TRNG_SCR1C_R1_0_CT_SHIFT (0U)
+#define TRNG_SCR1C_R1_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_0_CT_SHIFT)) & TRNG_SCR1C_R1_0_CT_MASK)
+#define TRNG_SCR1C_R1_1_CT_MASK  (0x7FFF0000U)
+#define TRNG_SCR1C_R1_1_CT_SHIFT (16U)
+#define TRNG_SCR1C_R1_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_1_CT_SHIFT)) & TRNG_SCR1C_R1_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR1L - Statistical Check Run Length 1 Limit Register */
 /*! @{ */
-#define TRNG_SCR1L_RUN1_MAX_MASK                 (0x7FFFU)
-#define TRNG_SCR1L_RUN1_MAX_SHIFT                (0U)
-#define TRNG_SCR1L_RUN1_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_MAX_SHIFT)) & TRNG_SCR1L_RUN1_MAX_MASK)
-#define TRNG_SCR1L_RUN1_RNG_MASK                 (0x7FFF0000U)
-#define TRNG_SCR1L_RUN1_RNG_SHIFT                (16U)
-#define TRNG_SCR1L_RUN1_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_RNG_SHIFT)) & TRNG_SCR1L_RUN1_RNG_MASK)
+#define TRNG_SCR1L_RUN1_MAX_MASK  (0x7FFFU)
+#define TRNG_SCR1L_RUN1_MAX_SHIFT (0U)
+#define TRNG_SCR1L_RUN1_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_MAX_SHIFT)) & TRNG_SCR1L_RUN1_MAX_MASK)
+#define TRNG_SCR1L_RUN1_RNG_MASK  (0x7FFF0000U)
+#define TRNG_SCR1L_RUN1_RNG_SHIFT (16U)
+#define TRNG_SCR1L_RUN1_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_RNG_SHIFT)) & TRNG_SCR1L_RUN1_RNG_MASK)
 /*! @} */
 
 /*! @name SCR2C - Statistical Check Run Length 2 Count Register */
 /*! @{ */
-#define TRNG_SCR2C_R2_0_CT_MASK                  (0x3FFFU)
-#define TRNG_SCR2C_R2_0_CT_SHIFT                 (0U)
-#define TRNG_SCR2C_R2_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_0_CT_SHIFT)) & TRNG_SCR2C_R2_0_CT_MASK)
-#define TRNG_SCR2C_R2_1_CT_MASK                  (0x3FFF0000U)
-#define TRNG_SCR2C_R2_1_CT_SHIFT                 (16U)
-#define TRNG_SCR2C_R2_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_1_CT_SHIFT)) & TRNG_SCR2C_R2_1_CT_MASK)
+#define TRNG_SCR2C_R2_0_CT_MASK  (0x3FFFU)
+#define TRNG_SCR2C_R2_0_CT_SHIFT (0U)
+#define TRNG_SCR2C_R2_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_0_CT_SHIFT)) & TRNG_SCR2C_R2_0_CT_MASK)
+#define TRNG_SCR2C_R2_1_CT_MASK  (0x3FFF0000U)
+#define TRNG_SCR2C_R2_1_CT_SHIFT (16U)
+#define TRNG_SCR2C_R2_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_1_CT_SHIFT)) & TRNG_SCR2C_R2_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR2L - Statistical Check Run Length 2 Limit Register */
 /*! @{ */
-#define TRNG_SCR2L_RUN2_MAX_MASK                 (0x3FFFU)
-#define TRNG_SCR2L_RUN2_MAX_SHIFT                (0U)
-#define TRNG_SCR2L_RUN2_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_MAX_SHIFT)) & TRNG_SCR2L_RUN2_MAX_MASK)
-#define TRNG_SCR2L_RUN2_RNG_MASK                 (0x3FFF0000U)
-#define TRNG_SCR2L_RUN2_RNG_SHIFT                (16U)
-#define TRNG_SCR2L_RUN2_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_RNG_SHIFT)) & TRNG_SCR2L_RUN2_RNG_MASK)
+#define TRNG_SCR2L_RUN2_MAX_MASK  (0x3FFFU)
+#define TRNG_SCR2L_RUN2_MAX_SHIFT (0U)
+#define TRNG_SCR2L_RUN2_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_MAX_SHIFT)) & TRNG_SCR2L_RUN2_MAX_MASK)
+#define TRNG_SCR2L_RUN2_RNG_MASK  (0x3FFF0000U)
+#define TRNG_SCR2L_RUN2_RNG_SHIFT (16U)
+#define TRNG_SCR2L_RUN2_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_RNG_SHIFT)) & TRNG_SCR2L_RUN2_RNG_MASK)
 /*! @} */
 
 /*! @name SCR3C - Statistical Check Run Length 3 Count Register */
 /*! @{ */
-#define TRNG_SCR3C_R3_0_CT_MASK                  (0x1FFFU)
-#define TRNG_SCR3C_R3_0_CT_SHIFT                 (0U)
-#define TRNG_SCR3C_R3_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_0_CT_SHIFT)) & TRNG_SCR3C_R3_0_CT_MASK)
-#define TRNG_SCR3C_R3_1_CT_MASK                  (0x1FFF0000U)
-#define TRNG_SCR3C_R3_1_CT_SHIFT                 (16U)
-#define TRNG_SCR3C_R3_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_1_CT_SHIFT)) & TRNG_SCR3C_R3_1_CT_MASK)
+#define TRNG_SCR3C_R3_0_CT_MASK  (0x1FFFU)
+#define TRNG_SCR3C_R3_0_CT_SHIFT (0U)
+#define TRNG_SCR3C_R3_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_0_CT_SHIFT)) & TRNG_SCR3C_R3_0_CT_MASK)
+#define TRNG_SCR3C_R3_1_CT_MASK  (0x1FFF0000U)
+#define TRNG_SCR3C_R3_1_CT_SHIFT (16U)
+#define TRNG_SCR3C_R3_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_1_CT_SHIFT)) & TRNG_SCR3C_R3_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR3L - Statistical Check Run Length 3 Limit Register */
 /*! @{ */
-#define TRNG_SCR3L_RUN3_MAX_MASK                 (0x1FFFU)
-#define TRNG_SCR3L_RUN3_MAX_SHIFT                (0U)
-#define TRNG_SCR3L_RUN3_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_MAX_SHIFT)) & TRNG_SCR3L_RUN3_MAX_MASK)
-#define TRNG_SCR3L_RUN3_RNG_MASK                 (0x1FFF0000U)
-#define TRNG_SCR3L_RUN3_RNG_SHIFT                (16U)
-#define TRNG_SCR3L_RUN3_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_RNG_SHIFT)) & TRNG_SCR3L_RUN3_RNG_MASK)
+#define TRNG_SCR3L_RUN3_MAX_MASK  (0x1FFFU)
+#define TRNG_SCR3L_RUN3_MAX_SHIFT (0U)
+#define TRNG_SCR3L_RUN3_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_MAX_SHIFT)) & TRNG_SCR3L_RUN3_MAX_MASK)
+#define TRNG_SCR3L_RUN3_RNG_MASK  (0x1FFF0000U)
+#define TRNG_SCR3L_RUN3_RNG_SHIFT (16U)
+#define TRNG_SCR3L_RUN3_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_RNG_SHIFT)) & TRNG_SCR3L_RUN3_RNG_MASK)
 /*! @} */
 
 /*! @name SCR4C - Statistical Check Run Length 4 Count Register */
 /*! @{ */
-#define TRNG_SCR4C_R4_0_CT_MASK                  (0xFFFU)
-#define TRNG_SCR4C_R4_0_CT_SHIFT                 (0U)
-#define TRNG_SCR4C_R4_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_0_CT_SHIFT)) & TRNG_SCR4C_R4_0_CT_MASK)
-#define TRNG_SCR4C_R4_1_CT_MASK                  (0xFFF0000U)
-#define TRNG_SCR4C_R4_1_CT_SHIFT                 (16U)
-#define TRNG_SCR4C_R4_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_1_CT_SHIFT)) & TRNG_SCR4C_R4_1_CT_MASK)
+#define TRNG_SCR4C_R4_0_CT_MASK  (0xFFFU)
+#define TRNG_SCR4C_R4_0_CT_SHIFT (0U)
+#define TRNG_SCR4C_R4_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_0_CT_SHIFT)) & TRNG_SCR4C_R4_0_CT_MASK)
+#define TRNG_SCR4C_R4_1_CT_MASK  (0xFFF0000U)
+#define TRNG_SCR4C_R4_1_CT_SHIFT (16U)
+#define TRNG_SCR4C_R4_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_1_CT_SHIFT)) & TRNG_SCR4C_R4_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR4L - Statistical Check Run Length 4 Limit Register */
 /*! @{ */
-#define TRNG_SCR4L_RUN4_MAX_MASK                 (0xFFFU)
-#define TRNG_SCR4L_RUN4_MAX_SHIFT                (0U)
-#define TRNG_SCR4L_RUN4_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_MAX_SHIFT)) & TRNG_SCR4L_RUN4_MAX_MASK)
-#define TRNG_SCR4L_RUN4_RNG_MASK                 (0xFFF0000U)
-#define TRNG_SCR4L_RUN4_RNG_SHIFT                (16U)
-#define TRNG_SCR4L_RUN4_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_RNG_SHIFT)) & TRNG_SCR4L_RUN4_RNG_MASK)
+#define TRNG_SCR4L_RUN4_MAX_MASK  (0xFFFU)
+#define TRNG_SCR4L_RUN4_MAX_SHIFT (0U)
+#define TRNG_SCR4L_RUN4_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_MAX_SHIFT)) & TRNG_SCR4L_RUN4_MAX_MASK)
+#define TRNG_SCR4L_RUN4_RNG_MASK  (0xFFF0000U)
+#define TRNG_SCR4L_RUN4_RNG_SHIFT (16U)
+#define TRNG_SCR4L_RUN4_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_RNG_SHIFT)) & TRNG_SCR4L_RUN4_RNG_MASK)
 /*! @} */
 
 /*! @name SCR5C - Statistical Check Run Length 5 Count Register */
 /*! @{ */
-#define TRNG_SCR5C_R5_0_CT_MASK                  (0x7FFU)
-#define TRNG_SCR5C_R5_0_CT_SHIFT                 (0U)
-#define TRNG_SCR5C_R5_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_0_CT_SHIFT)) & TRNG_SCR5C_R5_0_CT_MASK)
-#define TRNG_SCR5C_R5_1_CT_MASK                  (0x7FF0000U)
-#define TRNG_SCR5C_R5_1_CT_SHIFT                 (16U)
-#define TRNG_SCR5C_R5_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_1_CT_SHIFT)) & TRNG_SCR5C_R5_1_CT_MASK)
+#define TRNG_SCR5C_R5_0_CT_MASK  (0x7FFU)
+#define TRNG_SCR5C_R5_0_CT_SHIFT (0U)
+#define TRNG_SCR5C_R5_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_0_CT_SHIFT)) & TRNG_SCR5C_R5_0_CT_MASK)
+#define TRNG_SCR5C_R5_1_CT_MASK  (0x7FF0000U)
+#define TRNG_SCR5C_R5_1_CT_SHIFT (16U)
+#define TRNG_SCR5C_R5_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_1_CT_SHIFT)) & TRNG_SCR5C_R5_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR5L - Statistical Check Run Length 5 Limit Register */
 /*! @{ */
-#define TRNG_SCR5L_RUN5_MAX_MASK                 (0x7FFU)
-#define TRNG_SCR5L_RUN5_MAX_SHIFT                (0U)
-#define TRNG_SCR5L_RUN5_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_MAX_SHIFT)) & TRNG_SCR5L_RUN5_MAX_MASK)
-#define TRNG_SCR5L_RUN5_RNG_MASK                 (0x7FF0000U)
-#define TRNG_SCR5L_RUN5_RNG_SHIFT                (16U)
-#define TRNG_SCR5L_RUN5_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_RNG_SHIFT)) & TRNG_SCR5L_RUN5_RNG_MASK)
+#define TRNG_SCR5L_RUN5_MAX_MASK  (0x7FFU)
+#define TRNG_SCR5L_RUN5_MAX_SHIFT (0U)
+#define TRNG_SCR5L_RUN5_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_MAX_SHIFT)) & TRNG_SCR5L_RUN5_MAX_MASK)
+#define TRNG_SCR5L_RUN5_RNG_MASK  (0x7FF0000U)
+#define TRNG_SCR5L_RUN5_RNG_SHIFT (16U)
+#define TRNG_SCR5L_RUN5_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_RNG_SHIFT)) & TRNG_SCR5L_RUN5_RNG_MASK)
 /*! @} */
 
 /*! @name SCR6PC - Statistical Check Run Length 6+ Count Register */
 /*! @{ */
-#define TRNG_SCR6PC_R6P_0_CT_MASK                (0x7FFU)
-#define TRNG_SCR6PC_R6P_0_CT_SHIFT               (0U)
-#define TRNG_SCR6PC_R6P_0_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_0_CT_SHIFT)) & TRNG_SCR6PC_R6P_0_CT_MASK)
-#define TRNG_SCR6PC_R6P_1_CT_MASK                (0x7FF0000U)
-#define TRNG_SCR6PC_R6P_1_CT_SHIFT               (16U)
-#define TRNG_SCR6PC_R6P_1_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_1_CT_SHIFT)) & TRNG_SCR6PC_R6P_1_CT_MASK)
+#define TRNG_SCR6PC_R6P_0_CT_MASK  (0x7FFU)
+#define TRNG_SCR6PC_R6P_0_CT_SHIFT (0U)
+#define TRNG_SCR6PC_R6P_0_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_0_CT_SHIFT)) & TRNG_SCR6PC_R6P_0_CT_MASK)
+#define TRNG_SCR6PC_R6P_1_CT_MASK  (0x7FF0000U)
+#define TRNG_SCR6PC_R6P_1_CT_SHIFT (16U)
+#define TRNG_SCR6PC_R6P_1_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_1_CT_SHIFT)) & TRNG_SCR6PC_R6P_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR6PL - Statistical Check Run Length 6+ Limit Register */
 /*! @{ */
-#define TRNG_SCR6PL_RUN6P_MAX_MASK               (0x7FFU)
-#define TRNG_SCR6PL_RUN6P_MAX_SHIFT              (0U)
-#define TRNG_SCR6PL_RUN6P_MAX(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_MAX_SHIFT)) & TRNG_SCR6PL_RUN6P_MAX_MASK)
-#define TRNG_SCR6PL_RUN6P_RNG_MASK               (0x7FF0000U)
-#define TRNG_SCR6PL_RUN6P_RNG_SHIFT              (16U)
-#define TRNG_SCR6PL_RUN6P_RNG(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_RNG_SHIFT)) & TRNG_SCR6PL_RUN6P_RNG_MASK)
+#define TRNG_SCR6PL_RUN6P_MAX_MASK  (0x7FFU)
+#define TRNG_SCR6PL_RUN6P_MAX_SHIFT (0U)
+#define TRNG_SCR6PL_RUN6P_MAX(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_MAX_SHIFT)) & TRNG_SCR6PL_RUN6P_MAX_MASK)
+#define TRNG_SCR6PL_RUN6P_RNG_MASK  (0x7FF0000U)
+#define TRNG_SCR6PL_RUN6P_RNG_SHIFT (16U)
+#define TRNG_SCR6PL_RUN6P_RNG(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_RNG_SHIFT)) & TRNG_SCR6PL_RUN6P_RNG_MASK)
 /*! @} */
 
 /*! @name STATUS - Status Register */
 /*! @{ */
-#define TRNG_STATUS_TF1BR0_MASK                  (0x1U)
-#define TRNG_STATUS_TF1BR0_SHIFT                 (0U)
-#define TRNG_STATUS_TF1BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR0_SHIFT)) & TRNG_STATUS_TF1BR0_MASK)
-#define TRNG_STATUS_TF1BR1_MASK                  (0x2U)
-#define TRNG_STATUS_TF1BR1_SHIFT                 (1U)
-#define TRNG_STATUS_TF1BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR1_SHIFT)) & TRNG_STATUS_TF1BR1_MASK)
-#define TRNG_STATUS_TF2BR0_MASK                  (0x4U)
-#define TRNG_STATUS_TF2BR0_SHIFT                 (2U)
-#define TRNG_STATUS_TF2BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR0_SHIFT)) & TRNG_STATUS_TF2BR0_MASK)
-#define TRNG_STATUS_TF2BR1_MASK                  (0x8U)
-#define TRNG_STATUS_TF2BR1_SHIFT                 (3U)
-#define TRNG_STATUS_TF2BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR1_SHIFT)) & TRNG_STATUS_TF2BR1_MASK)
-#define TRNG_STATUS_TF3BR0_MASK                  (0x10U)
-#define TRNG_STATUS_TF3BR0_SHIFT                 (4U)
-#define TRNG_STATUS_TF3BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR0_SHIFT)) & TRNG_STATUS_TF3BR0_MASK)
-#define TRNG_STATUS_TF3BR1_MASK                  (0x20U)
-#define TRNG_STATUS_TF3BR1_SHIFT                 (5U)
-#define TRNG_STATUS_TF3BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR1_SHIFT)) & TRNG_STATUS_TF3BR1_MASK)
-#define TRNG_STATUS_TF4BR0_MASK                  (0x40U)
-#define TRNG_STATUS_TF4BR0_SHIFT                 (6U)
-#define TRNG_STATUS_TF4BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR0_SHIFT)) & TRNG_STATUS_TF4BR0_MASK)
-#define TRNG_STATUS_TF4BR1_MASK                  (0x80U)
-#define TRNG_STATUS_TF4BR1_SHIFT                 (7U)
-#define TRNG_STATUS_TF4BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
-#define TRNG_STATUS_TF5BR0_MASK                  (0x100U)
-#define TRNG_STATUS_TF5BR0_SHIFT                 (8U)
-#define TRNG_STATUS_TF5BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR0_SHIFT)) & TRNG_STATUS_TF5BR0_MASK)
-#define TRNG_STATUS_TF5BR1_MASK                  (0x200U)
-#define TRNG_STATUS_TF5BR1_SHIFT                 (9U)
-#define TRNG_STATUS_TF5BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR1_SHIFT)) & TRNG_STATUS_TF5BR1_MASK)
-#define TRNG_STATUS_TF6PBR0_MASK                 (0x400U)
-#define TRNG_STATUS_TF6PBR0_SHIFT                (10U)
-#define TRNG_STATUS_TF6PBR0(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR0_SHIFT)) & TRNG_STATUS_TF6PBR0_MASK)
-#define TRNG_STATUS_TF6PBR1_MASK                 (0x800U)
-#define TRNG_STATUS_TF6PBR1_SHIFT                (11U)
-#define TRNG_STATUS_TF6PBR1(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR1_SHIFT)) & TRNG_STATUS_TF6PBR1_MASK)
-#define TRNG_STATUS_TFSB_MASK                    (0x1000U)
-#define TRNG_STATUS_TFSB_SHIFT                   (12U)
-#define TRNG_STATUS_TFSB(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFSB_SHIFT)) & TRNG_STATUS_TFSB_MASK)
-#define TRNG_STATUS_TFLR_MASK                    (0x2000U)
-#define TRNG_STATUS_TFLR_SHIFT                   (13U)
-#define TRNG_STATUS_TFLR(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFLR_SHIFT)) & TRNG_STATUS_TFLR_MASK)
-#define TRNG_STATUS_TFP_MASK                     (0x4000U)
-#define TRNG_STATUS_TFP_SHIFT                    (14U)
-#define TRNG_STATUS_TFP(x)                       (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFP_SHIFT)) & TRNG_STATUS_TFP_MASK)
-#define TRNG_STATUS_TFMB_MASK                    (0x8000U)
-#define TRNG_STATUS_TFMB_SHIFT                   (15U)
-#define TRNG_STATUS_TFMB(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFMB_SHIFT)) & TRNG_STATUS_TFMB_MASK)
-#define TRNG_STATUS_RETRY_CT_MASK                (0xF0000U)
-#define TRNG_STATUS_RETRY_CT_SHIFT               (16U)
-#define TRNG_STATUS_RETRY_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_RETRY_CT_SHIFT)) & TRNG_STATUS_RETRY_CT_MASK)
+#define TRNG_STATUS_TF1BR0_MASK    (0x1U)
+#define TRNG_STATUS_TF1BR0_SHIFT   (0U)
+#define TRNG_STATUS_TF1BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR0_SHIFT)) & TRNG_STATUS_TF1BR0_MASK)
+#define TRNG_STATUS_TF1BR1_MASK    (0x2U)
+#define TRNG_STATUS_TF1BR1_SHIFT   (1U)
+#define TRNG_STATUS_TF1BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR1_SHIFT)) & TRNG_STATUS_TF1BR1_MASK)
+#define TRNG_STATUS_TF2BR0_MASK    (0x4U)
+#define TRNG_STATUS_TF2BR0_SHIFT   (2U)
+#define TRNG_STATUS_TF2BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR0_SHIFT)) & TRNG_STATUS_TF2BR0_MASK)
+#define TRNG_STATUS_TF2BR1_MASK    (0x8U)
+#define TRNG_STATUS_TF2BR1_SHIFT   (3U)
+#define TRNG_STATUS_TF2BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR1_SHIFT)) & TRNG_STATUS_TF2BR1_MASK)
+#define TRNG_STATUS_TF3BR0_MASK    (0x10U)
+#define TRNG_STATUS_TF3BR0_SHIFT   (4U)
+#define TRNG_STATUS_TF3BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR0_SHIFT)) & TRNG_STATUS_TF3BR0_MASK)
+#define TRNG_STATUS_TF3BR1_MASK    (0x20U)
+#define TRNG_STATUS_TF3BR1_SHIFT   (5U)
+#define TRNG_STATUS_TF3BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR1_SHIFT)) & TRNG_STATUS_TF3BR1_MASK)
+#define TRNG_STATUS_TF4BR0_MASK    (0x40U)
+#define TRNG_STATUS_TF4BR0_SHIFT   (6U)
+#define TRNG_STATUS_TF4BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR0_SHIFT)) & TRNG_STATUS_TF4BR0_MASK)
+#define TRNG_STATUS_TF4BR1_MASK    (0x80U)
+#define TRNG_STATUS_TF4BR1_SHIFT   (7U)
+#define TRNG_STATUS_TF4BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
+#define TRNG_STATUS_TF5BR0_MASK    (0x100U)
+#define TRNG_STATUS_TF5BR0_SHIFT   (8U)
+#define TRNG_STATUS_TF5BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR0_SHIFT)) & TRNG_STATUS_TF5BR0_MASK)
+#define TRNG_STATUS_TF5BR1_MASK    (0x200U)
+#define TRNG_STATUS_TF5BR1_SHIFT   (9U)
+#define TRNG_STATUS_TF5BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR1_SHIFT)) & TRNG_STATUS_TF5BR1_MASK)
+#define TRNG_STATUS_TF6PBR0_MASK   (0x400U)
+#define TRNG_STATUS_TF6PBR0_SHIFT  (10U)
+#define TRNG_STATUS_TF6PBR0(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR0_SHIFT)) & TRNG_STATUS_TF6PBR0_MASK)
+#define TRNG_STATUS_TF6PBR1_MASK   (0x800U)
+#define TRNG_STATUS_TF6PBR1_SHIFT  (11U)
+#define TRNG_STATUS_TF6PBR1(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR1_SHIFT)) & TRNG_STATUS_TF6PBR1_MASK)
+#define TRNG_STATUS_TFSB_MASK      (0x1000U)
+#define TRNG_STATUS_TFSB_SHIFT     (12U)
+#define TRNG_STATUS_TFSB(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFSB_SHIFT)) & TRNG_STATUS_TFSB_MASK)
+#define TRNG_STATUS_TFLR_MASK      (0x2000U)
+#define TRNG_STATUS_TFLR_SHIFT     (13U)
+#define TRNG_STATUS_TFLR(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFLR_SHIFT)) & TRNG_STATUS_TFLR_MASK)
+#define TRNG_STATUS_TFP_MASK       (0x4000U)
+#define TRNG_STATUS_TFP_SHIFT      (14U)
+#define TRNG_STATUS_TFP(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFP_SHIFT)) & TRNG_STATUS_TFP_MASK)
+#define TRNG_STATUS_TFMB_MASK      (0x8000U)
+#define TRNG_STATUS_TFMB_SHIFT     (15U)
+#define TRNG_STATUS_TFMB(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFMB_SHIFT)) & TRNG_STATUS_TFMB_MASK)
+#define TRNG_STATUS_RETRY_CT_MASK  (0xF0000U)
+#define TRNG_STATUS_RETRY_CT_SHIFT (16U)
+#define TRNG_STATUS_RETRY_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_RETRY_CT_SHIFT)) & TRNG_STATUS_RETRY_CT_MASK)
 /*! @} */
 
 /*! @name ENT - Entropy Read Register */
 /*! @{ */
-#define TRNG_ENT_ENT_MASK                        (0xFFFFFFFFU)
-#define TRNG_ENT_ENT_SHIFT                       (0U)
-#define TRNG_ENT_ENT(x)                          (((uint32_t)(((uint32_t)(x)) << TRNG_ENT_ENT_SHIFT)) & TRNG_ENT_ENT_MASK)
+#define TRNG_ENT_ENT_MASK  (0xFFFFFFFFU)
+#define TRNG_ENT_ENT_SHIFT (0U)
+#define TRNG_ENT_ENT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_ENT_ENT_SHIFT)) & TRNG_ENT_ENT_MASK)
 /*! @} */
 
 /* The count of TRNG_ENT */
-#define TRNG_ENT_COUNT                           (16U)
+#define TRNG_ENT_COUNT (16U)
 
 /*! @name PKRCNT10 - Statistical Check Poker Count 1 and 0 Register */
 /*! @{ */
-#define TRNG_PKRCNT10_PKR_0_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT10_PKR_0_CT_SHIFT             (0U)
-#define TRNG_PKRCNT10_PKR_0_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_0_CT_SHIFT)) & TRNG_PKRCNT10_PKR_0_CT_MASK)
-#define TRNG_PKRCNT10_PKR_1_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT10_PKR_1_CT_SHIFT             (16U)
-#define TRNG_PKRCNT10_PKR_1_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_1_CT_SHIFT)) & TRNG_PKRCNT10_PKR_1_CT_MASK)
+#define TRNG_PKRCNT10_PKR_0_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT10_PKR_0_CT_SHIFT (0U)
+#define TRNG_PKRCNT10_PKR_0_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_0_CT_SHIFT)) & TRNG_PKRCNT10_PKR_0_CT_MASK)
+#define TRNG_PKRCNT10_PKR_1_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT10_PKR_1_CT_SHIFT (16U)
+#define TRNG_PKRCNT10_PKR_1_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_1_CT_SHIFT)) & TRNG_PKRCNT10_PKR_1_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT32 - Statistical Check Poker Count 3 and 2 Register */
 /*! @{ */
-#define TRNG_PKRCNT32_PKR_2_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT32_PKR_2_CT_SHIFT             (0U)
-#define TRNG_PKRCNT32_PKR_2_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_2_CT_SHIFT)) & TRNG_PKRCNT32_PKR_2_CT_MASK)
-#define TRNG_PKRCNT32_PKR_3_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT32_PKR_3_CT_SHIFT             (16U)
-#define TRNG_PKRCNT32_PKR_3_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_3_CT_SHIFT)) & TRNG_PKRCNT32_PKR_3_CT_MASK)
+#define TRNG_PKRCNT32_PKR_2_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT32_PKR_2_CT_SHIFT (0U)
+#define TRNG_PKRCNT32_PKR_2_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_2_CT_SHIFT)) & TRNG_PKRCNT32_PKR_2_CT_MASK)
+#define TRNG_PKRCNT32_PKR_3_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT32_PKR_3_CT_SHIFT (16U)
+#define TRNG_PKRCNT32_PKR_3_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_3_CT_SHIFT)) & TRNG_PKRCNT32_PKR_3_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT54 - Statistical Check Poker Count 5 and 4 Register */
 /*! @{ */
-#define TRNG_PKRCNT54_PKR_4_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT54_PKR_4_CT_SHIFT             (0U)
-#define TRNG_PKRCNT54_PKR_4_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_4_CT_SHIFT)) & TRNG_PKRCNT54_PKR_4_CT_MASK)
-#define TRNG_PKRCNT54_PKR_5_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT54_PKR_5_CT_SHIFT             (16U)
-#define TRNG_PKRCNT54_PKR_5_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_5_CT_SHIFT)) & TRNG_PKRCNT54_PKR_5_CT_MASK)
+#define TRNG_PKRCNT54_PKR_4_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT54_PKR_4_CT_SHIFT (0U)
+#define TRNG_PKRCNT54_PKR_4_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_4_CT_SHIFT)) & TRNG_PKRCNT54_PKR_4_CT_MASK)
+#define TRNG_PKRCNT54_PKR_5_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT54_PKR_5_CT_SHIFT (16U)
+#define TRNG_PKRCNT54_PKR_5_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_5_CT_SHIFT)) & TRNG_PKRCNT54_PKR_5_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT76 - Statistical Check Poker Count 7 and 6 Register */
 /*! @{ */
-#define TRNG_PKRCNT76_PKR_6_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT76_PKR_6_CT_SHIFT             (0U)
-#define TRNG_PKRCNT76_PKR_6_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_6_CT_SHIFT)) & TRNG_PKRCNT76_PKR_6_CT_MASK)
-#define TRNG_PKRCNT76_PKR_7_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT76_PKR_7_CT_SHIFT             (16U)
-#define TRNG_PKRCNT76_PKR_7_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_7_CT_SHIFT)) & TRNG_PKRCNT76_PKR_7_CT_MASK)
+#define TRNG_PKRCNT76_PKR_6_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT76_PKR_6_CT_SHIFT (0U)
+#define TRNG_PKRCNT76_PKR_6_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_6_CT_SHIFT)) & TRNG_PKRCNT76_PKR_6_CT_MASK)
+#define TRNG_PKRCNT76_PKR_7_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT76_PKR_7_CT_SHIFT (16U)
+#define TRNG_PKRCNT76_PKR_7_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_7_CT_SHIFT)) & TRNG_PKRCNT76_PKR_7_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT98 - Statistical Check Poker Count 9 and 8 Register */
 /*! @{ */
-#define TRNG_PKRCNT98_PKR_8_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT98_PKR_8_CT_SHIFT             (0U)
-#define TRNG_PKRCNT98_PKR_8_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_8_CT_SHIFT)) & TRNG_PKRCNT98_PKR_8_CT_MASK)
-#define TRNG_PKRCNT98_PKR_9_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT98_PKR_9_CT_SHIFT             (16U)
-#define TRNG_PKRCNT98_PKR_9_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_9_CT_SHIFT)) & TRNG_PKRCNT98_PKR_9_CT_MASK)
+#define TRNG_PKRCNT98_PKR_8_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT98_PKR_8_CT_SHIFT (0U)
+#define TRNG_PKRCNT98_PKR_8_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_8_CT_SHIFT)) & TRNG_PKRCNT98_PKR_8_CT_MASK)
+#define TRNG_PKRCNT98_PKR_9_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT98_PKR_9_CT_SHIFT (16U)
+#define TRNG_PKRCNT98_PKR_9_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_9_CT_SHIFT)) & TRNG_PKRCNT98_PKR_9_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTBA - Statistical Check Poker Count B and A Register */
 /*! @{ */
-#define TRNG_PKRCNTBA_PKR_A_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTBA_PKR_A_CT_SHIFT             (0U)
-#define TRNG_PKRCNTBA_PKR_A_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_A_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_A_CT_MASK)
-#define TRNG_PKRCNTBA_PKR_B_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTBA_PKR_B_CT_SHIFT             (16U)
-#define TRNG_PKRCNTBA_PKR_B_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_B_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_B_CT_MASK)
+#define TRNG_PKRCNTBA_PKR_A_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTBA_PKR_A_CT_SHIFT (0U)
+#define TRNG_PKRCNTBA_PKR_A_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_A_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_A_CT_MASK)
+#define TRNG_PKRCNTBA_PKR_B_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTBA_PKR_B_CT_SHIFT (16U)
+#define TRNG_PKRCNTBA_PKR_B_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_B_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_B_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTDC - Statistical Check Poker Count D and C Register */
 /*! @{ */
-#define TRNG_PKRCNTDC_PKR_C_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTDC_PKR_C_CT_SHIFT             (0U)
-#define TRNG_PKRCNTDC_PKR_C_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_C_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_C_CT_MASK)
-#define TRNG_PKRCNTDC_PKR_D_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTDC_PKR_D_CT_SHIFT             (16U)
-#define TRNG_PKRCNTDC_PKR_D_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_D_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_D_CT_MASK)
+#define TRNG_PKRCNTDC_PKR_C_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTDC_PKR_C_CT_SHIFT (0U)
+#define TRNG_PKRCNTDC_PKR_C_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_C_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_C_CT_MASK)
+#define TRNG_PKRCNTDC_PKR_D_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTDC_PKR_D_CT_SHIFT (16U)
+#define TRNG_PKRCNTDC_PKR_D_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_D_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_D_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTFE - Statistical Check Poker Count F and E Register */
 /*! @{ */
-#define TRNG_PKRCNTFE_PKR_E_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTFE_PKR_E_CT_SHIFT             (0U)
-#define TRNG_PKRCNTFE_PKR_E_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_E_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_E_CT_MASK)
-#define TRNG_PKRCNTFE_PKR_F_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTFE_PKR_F_CT_SHIFT             (16U)
-#define TRNG_PKRCNTFE_PKR_F_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_F_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_F_CT_MASK)
+#define TRNG_PKRCNTFE_PKR_E_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTFE_PKR_E_CT_SHIFT (0U)
+#define TRNG_PKRCNTFE_PKR_E_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_E_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_E_CT_MASK)
+#define TRNG_PKRCNTFE_PKR_F_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTFE_PKR_F_CT_SHIFT (16U)
+#define TRNG_PKRCNTFE_PKR_F_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_F_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_F_CT_MASK)
 /*! @} */
 
 /*! @name SEC_CFG - Security Configuration Register */
 /*! @{ */
-#define TRNG_SEC_CFG_UNUSED0_MASK                (0x1U)
-#define TRNG_SEC_CFG_UNUSED0_SHIFT               (0U)
-#define TRNG_SEC_CFG_UNUSED0(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED0_SHIFT)) & TRNG_SEC_CFG_UNUSED0_MASK)
-#define TRNG_SEC_CFG_NO_PRGM_MASK                (0x2U)
-#define TRNG_SEC_CFG_NO_PRGM_SHIFT               (1U)
-#define TRNG_SEC_CFG_NO_PRGM(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_NO_PRGM_SHIFT)) & TRNG_SEC_CFG_NO_PRGM_MASK)
-#define TRNG_SEC_CFG_UNUSED2_MASK                (0x4U)
-#define TRNG_SEC_CFG_UNUSED2_SHIFT               (2U)
-#define TRNG_SEC_CFG_UNUSED2(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED2_SHIFT)) & TRNG_SEC_CFG_UNUSED2_MASK)
+#define TRNG_SEC_CFG_UNUSED0_MASK  (0x1U)
+#define TRNG_SEC_CFG_UNUSED0_SHIFT (0U)
+#define TRNG_SEC_CFG_UNUSED0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED0_SHIFT)) & TRNG_SEC_CFG_UNUSED0_MASK)
+#define TRNG_SEC_CFG_NO_PRGM_MASK  (0x2U)
+#define TRNG_SEC_CFG_NO_PRGM_SHIFT (1U)
+#define TRNG_SEC_CFG_NO_PRGM(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_NO_PRGM_SHIFT)) & TRNG_SEC_CFG_NO_PRGM_MASK)
+#define TRNG_SEC_CFG_UNUSED2_MASK  (0x4U)
+#define TRNG_SEC_CFG_UNUSED2_SHIFT (2U)
+#define TRNG_SEC_CFG_UNUSED2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED2_SHIFT)) & TRNG_SEC_CFG_UNUSED2_MASK)
 /*! @} */
 
 /*! @name INT_CTRL - Interrupt Control Register */
 /*! @{ */
-#define TRNG_INT_CTRL_HW_ERR_MASK                (0x1U)
-#define TRNG_INT_CTRL_HW_ERR_SHIFT               (0U)
-#define TRNG_INT_CTRL_HW_ERR(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_HW_ERR_SHIFT)) & TRNG_INT_CTRL_HW_ERR_MASK)
-#define TRNG_INT_CTRL_ENT_VAL_MASK               (0x2U)
-#define TRNG_INT_CTRL_ENT_VAL_SHIFT              (1U)
-#define TRNG_INT_CTRL_ENT_VAL(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_ENT_VAL_SHIFT)) & TRNG_INT_CTRL_ENT_VAL_MASK)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL_MASK           (0x4U)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT          (2U)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL(x)             (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_CTRL_FRQ_CT_FAIL_MASK)
-#define TRNG_INT_CTRL_UNUSED_MASK                (0xFFFFFFF8U)
-#define TRNG_INT_CTRL_UNUSED_SHIFT               (3U)
-#define TRNG_INT_CTRL_UNUSED(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_UNUSED_SHIFT)) & TRNG_INT_CTRL_UNUSED_MASK)
+#define TRNG_INT_CTRL_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_CTRL_HW_ERR_SHIFT (0U)
+#define TRNG_INT_CTRL_HW_ERR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_HW_ERR_SHIFT)) & TRNG_INT_CTRL_HW_ERR_MASK)
+#define TRNG_INT_CTRL_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_CTRL_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_CTRL_ENT_VAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_ENT_VAL_SHIFT)) & TRNG_INT_CTRL_ENT_VAL_MASK)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_CTRL_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_CTRL_UNUSED_MASK  (0xFFFFFFF8U)
+#define TRNG_INT_CTRL_UNUSED_SHIFT (3U)
+#define TRNG_INT_CTRL_UNUSED(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_UNUSED_SHIFT)) & TRNG_INT_CTRL_UNUSED_MASK)
 /*! @} */
 
 /*! @name INT_MASK - Mask Register */
 /*! @{ */
-#define TRNG_INT_MASK_HW_ERR_MASK                (0x1U)
-#define TRNG_INT_MASK_HW_ERR_SHIFT               (0U)
-#define TRNG_INT_MASK_HW_ERR(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_HW_ERR_SHIFT)) & TRNG_INT_MASK_HW_ERR_MASK)
-#define TRNG_INT_MASK_ENT_VAL_MASK               (0x2U)
-#define TRNG_INT_MASK_ENT_VAL_SHIFT              (1U)
-#define TRNG_INT_MASK_ENT_VAL(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_ENT_VAL_SHIFT)) & TRNG_INT_MASK_ENT_VAL_MASK)
-#define TRNG_INT_MASK_FRQ_CT_FAIL_MASK           (0x4U)
-#define TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT          (2U)
-#define TRNG_INT_MASK_FRQ_CT_FAIL(x)             (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_MASK_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_MASK_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_MASK_HW_ERR_SHIFT (0U)
+#define TRNG_INT_MASK_HW_ERR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_HW_ERR_SHIFT)) & TRNG_INT_MASK_HW_ERR_MASK)
+#define TRNG_INT_MASK_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_MASK_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_MASK_ENT_VAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_ENT_VAL_SHIFT)) & TRNG_INT_MASK_ENT_VAL_MASK)
+#define TRNG_INT_MASK_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_MASK_FRQ_CT_FAIL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_MASK_FRQ_CT_FAIL_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status Register */
 /*! @{ */
-#define TRNG_INT_STATUS_HW_ERR_MASK              (0x1U)
-#define TRNG_INT_STATUS_HW_ERR_SHIFT             (0U)
-#define TRNG_INT_STATUS_HW_ERR(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_HW_ERR_SHIFT)) & TRNG_INT_STATUS_HW_ERR_MASK)
-#define TRNG_INT_STATUS_ENT_VAL_MASK             (0x2U)
-#define TRNG_INT_STATUS_ENT_VAL_SHIFT            (1U)
-#define TRNG_INT_STATUS_ENT_VAL(x)               (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_ENT_VAL_SHIFT)) & TRNG_INT_STATUS_ENT_VAL_MASK)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL_MASK         (0x4U)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT        (2U)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL(x)           (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_STATUS_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_STATUS_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_STATUS_HW_ERR_SHIFT (0U)
+#define TRNG_INT_STATUS_HW_ERR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_HW_ERR_SHIFT)) & TRNG_INT_STATUS_HW_ERR_MASK)
+#define TRNG_INT_STATUS_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_STATUS_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_STATUS_ENT_VAL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_ENT_VAL_SHIFT)) & TRNG_INT_STATUS_ENT_VAL_MASK)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_STATUS_FRQ_CT_FAIL_MASK)
 /*! @} */
 
 /*! @name VID1 - Version ID Register (MS) */
 /*! @{ */
-#define TRNG_VID1_MIN_REV_MASK                   (0xFFU)
-#define TRNG_VID1_MIN_REV_SHIFT                  (0U)
-#define TRNG_VID1_MIN_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MIN_REV_SHIFT)) & TRNG_VID1_MIN_REV_MASK)
-#define TRNG_VID1_MAJ_REV_MASK                   (0xFF00U)
-#define TRNG_VID1_MAJ_REV_SHIFT                  (8U)
-#define TRNG_VID1_MAJ_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MAJ_REV_SHIFT)) & TRNG_VID1_MAJ_REV_MASK)
-#define TRNG_VID1_IP_ID_MASK                     (0xFFFF0000U)
-#define TRNG_VID1_IP_ID_SHIFT                    (16U)
-#define TRNG_VID1_IP_ID(x)                       (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_IP_ID_SHIFT)) & TRNG_VID1_IP_ID_MASK)
+#define TRNG_VID1_MIN_REV_MASK  (0xFFU)
+#define TRNG_VID1_MIN_REV_SHIFT (0U)
+#define TRNG_VID1_MIN_REV(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MIN_REV_SHIFT)) & TRNG_VID1_MIN_REV_MASK)
+#define TRNG_VID1_MAJ_REV_MASK  (0xFF00U)
+#define TRNG_VID1_MAJ_REV_SHIFT (8U)
+#define TRNG_VID1_MAJ_REV(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MAJ_REV_SHIFT)) & TRNG_VID1_MAJ_REV_MASK)
+#define TRNG_VID1_IP_ID_MASK    (0xFFFF0000U)
+#define TRNG_VID1_IP_ID_SHIFT   (16U)
+#define TRNG_VID1_IP_ID(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_IP_ID_SHIFT)) & TRNG_VID1_IP_ID_MASK)
 /*! @} */
 
 /*! @name VID2 - Version ID Register (LS) */
 /*! @{ */
-#define TRNG_VID2_CONFIG_OPT_MASK                (0xFFU)
-#define TRNG_VID2_CONFIG_OPT_SHIFT               (0U)
-#define TRNG_VID2_CONFIG_OPT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_CONFIG_OPT_SHIFT)) & TRNG_VID2_CONFIG_OPT_MASK)
-#define TRNG_VID2_ECO_REV_MASK                   (0xFF00U)
-#define TRNG_VID2_ECO_REV_SHIFT                  (8U)
-#define TRNG_VID2_ECO_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
-#define TRNG_VID2_INTG_OPT_MASK                  (0xFF0000U)
-#define TRNG_VID2_INTG_OPT_SHIFT                 (16U)
-#define TRNG_VID2_INTG_OPT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_INTG_OPT_SHIFT)) & TRNG_VID2_INTG_OPT_MASK)
-#define TRNG_VID2_ERA_MASK                       (0xFF000000U)
-#define TRNG_VID2_ERA_SHIFT                      (24U)
-#define TRNG_VID2_ERA(x)                         (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ERA_SHIFT)) & TRNG_VID2_ERA_MASK)
+#define TRNG_VID2_CONFIG_OPT_MASK  (0xFFU)
+#define TRNG_VID2_CONFIG_OPT_SHIFT (0U)
+#define TRNG_VID2_CONFIG_OPT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_CONFIG_OPT_SHIFT)) & TRNG_VID2_CONFIG_OPT_MASK)
+#define TRNG_VID2_ECO_REV_MASK   (0xFF00U)
+#define TRNG_VID2_ECO_REV_SHIFT  (8U)
+#define TRNG_VID2_ECO_REV(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
+#define TRNG_VID2_INTG_OPT_MASK  (0xFF0000U)
+#define TRNG_VID2_INTG_OPT_SHIFT (16U)
+#define TRNG_VID2_INTG_OPT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_INTG_OPT_SHIFT)) & TRNG_VID2_INTG_OPT_MASK)
+#define TRNG_VID2_ERA_MASK       (0xFF000000U)
+#define TRNG_VID2_ERA_SHIFT      (24U)
+#define TRNG_VID2_ERA(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ERA_SHIFT)) & TRNG_VID2_ERA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TRNG_Register_Masks */
 
-
 /* TRNG - Peripheral instance base addresses */
 /** Peripheral TRNG base address */
-#define TRNG_BASE                                (0x400CC000u)
+#define TRNG_BASE (0x400CC000u)
 /** Peripheral TRNG base pointer */
-#define TRNG                                     ((TRNG_Type *)TRNG_BASE)
+#define TRNG ((TRNG_Type *)TRNG_BASE)
 /** Array initializer of TRNG peripheral base addresses */
-#define TRNG_BASE_ADDRS                          { TRNG_BASE }
+#define TRNG_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        TRNG_BASE                                                                                                      \
+    }
 /** Array initializer of TRNG peripheral base pointers */
-#define TRNG_BASE_PTRS                           { TRNG }
+#define TRNG_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        TRNG                                                                                                           \
+    }
 /** Interrupt vectors for the TRNG peripheral type */
-#define TRNG_IRQS                                { TRNG_IRQn }
+#define TRNG_IRQS                                                                                                      \
+    {                                                                                                                  \
+        TRNG_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group TRNG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TSC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -21412,24 +24375,25 @@ typedef struct {
  */
 
 /** TSC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t BASIC_SETTING;                     /**< , offset: 0x0 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t PRE_CHARGE_TIME;                   /**< , offset: 0x10 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t FLOW_CONTROL;                      /**< Flow Control, offset: 0x20 */
-       uint8_t RESERVED_2[12];
-  __I  uint32_t MEASEURE_VALUE;                    /**< Measure Value, offset: 0x30 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t INT_EN;                            /**< Interrupt Enable, offset: 0x40 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t INT_SIG_EN;                        /**< Interrupt Signal Enable, offset: 0x50 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t INT_STATUS;                        /**< Intterrupt Status, offset: 0x60 */
-       uint8_t RESERVED_6[12];
-  __IO uint32_t DEBUG_MODE;                        /**< , offset: 0x70 */
-       uint8_t RESERVED_7[12];
-  __IO uint32_t DEBUG_MODE2;                       /**< , offset: 0x80 */
+typedef struct
+{
+    __IO uint32_t BASIC_SETTING; /**< , offset: 0x0 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t PRE_CHARGE_TIME; /**< , offset: 0x10 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t FLOW_CONTROL; /**< Flow Control, offset: 0x20 */
+    uint8_t RESERVED_2[12];
+    __I uint32_t MEASEURE_VALUE; /**< Measure Value, offset: 0x30 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t INT_EN; /**< Interrupt Enable, offset: 0x40 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t INT_SIG_EN; /**< Interrupt Signal Enable, offset: 0x50 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t INT_STATUS; /**< Intterrupt Status, offset: 0x60 */
+    uint8_t RESERVED_6[12];
+    __IO uint32_t DEBUG_MODE; /**< , offset: 0x70 */
+    uint8_t RESERVED_7[12];
+    __IO uint32_t DEBUG_MODE2; /**< , offset: 0x80 */
 } TSC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -21443,221 +24407,283 @@ typedef struct {
 
 /*! @name BASIC_SETTING -  */
 /*! @{ */
-#define TSC_BASIC_SETTING_AUTO_MEASURE_MASK      (0x1U)
-#define TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT     (0U)
-#define TSC_BASIC_SETTING_AUTO_MEASURE(x)        (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT)) & TSC_BASIC_SETTING_AUTO_MEASURE_MASK)
-#define TSC_BASIC_SETTING_4_5_WIRE_MASK          (0x10U)
-#define TSC_BASIC_SETTING_4_5_WIRE_SHIFT         (4U)
-#define TSC_BASIC_SETTING_4_5_WIRE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_4_5_WIRE_SHIFT)) & TSC_BASIC_SETTING_4_5_WIRE_MASK)
-#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK (0xFFFFFF00U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE_MASK  (0x1U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT (0U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT)) & TSC_BASIC_SETTING_AUTO_MEASURE_MASK)
+#define TSC_BASIC_SETTING_4_5_WIRE_MASK  (0x10U)
+#define TSC_BASIC_SETTING_4_5_WIRE_SHIFT (4U)
+#define TSC_BASIC_SETTING_4_5_WIRE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_4_5_WIRE_SHIFT)) & TSC_BASIC_SETTING_4_5_WIRE_MASK)
+#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK  (0xFFFFFF00U)
 #define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT (8U)
-#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME(x)  (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT)) & TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK)
+#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT)) &                                     \
+     TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK)
 /*! @} */
 
 /*! @name PRE_CHARGE_TIME -  */
 /*! @{ */
-#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK (0xFFFFFFFFU)
+#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK  (0xFFFFFFFFU)
 #define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT (0U)
-#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME(x)   (((uint32_t)(((uint32_t)(x)) << TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT)) & TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK)
+#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT)) &                                      \
+     TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK)
 /*! @} */
 
 /*! @name FLOW_CONTROL - Flow Control */
 /*! @{ */
-#define TSC_FLOW_CONTROL_SW_RST_MASK             (0x1U)
-#define TSC_FLOW_CONTROL_SW_RST_SHIFT            (0U)
-#define TSC_FLOW_CONTROL_SW_RST(x)               (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_SW_RST_SHIFT)) & TSC_FLOW_CONTROL_SW_RST_MASK)
-#define TSC_FLOW_CONTROL_START_MEASURE_MASK      (0x10U)
-#define TSC_FLOW_CONTROL_START_MEASURE_SHIFT     (4U)
-#define TSC_FLOW_CONTROL_START_MEASURE(x)        (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_START_MEASURE_MASK)
-#define TSC_FLOW_CONTROL_DROP_MEASURE_MASK       (0x100U)
-#define TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT      (8U)
-#define TSC_FLOW_CONTROL_DROP_MEASURE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_DROP_MEASURE_MASK)
-#define TSC_FLOW_CONTROL_START_SENSE_MASK        (0x1000U)
-#define TSC_FLOW_CONTROL_START_SENSE_SHIFT       (12U)
-#define TSC_FLOW_CONTROL_START_SENSE(x)          (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_SENSE_SHIFT)) & TSC_FLOW_CONTROL_START_SENSE_MASK)
-#define TSC_FLOW_CONTROL_DISABLE_MASK            (0x10000U)
-#define TSC_FLOW_CONTROL_DISABLE_SHIFT           (16U)
-#define TSC_FLOW_CONTROL_DISABLE(x)              (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DISABLE_SHIFT)) & TSC_FLOW_CONTROL_DISABLE_MASK)
+#define TSC_FLOW_CONTROL_SW_RST_MASK  (0x1U)
+#define TSC_FLOW_CONTROL_SW_RST_SHIFT (0U)
+#define TSC_FLOW_CONTROL_SW_RST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_SW_RST_SHIFT)) & TSC_FLOW_CONTROL_SW_RST_MASK)
+#define TSC_FLOW_CONTROL_START_MEASURE_MASK  (0x10U)
+#define TSC_FLOW_CONTROL_START_MEASURE_SHIFT (4U)
+#define TSC_FLOW_CONTROL_START_MEASURE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_START_MEASURE_MASK)
+#define TSC_FLOW_CONTROL_DROP_MEASURE_MASK  (0x100U)
+#define TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT (8U)
+#define TSC_FLOW_CONTROL_DROP_MEASURE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_DROP_MEASURE_MASK)
+#define TSC_FLOW_CONTROL_START_SENSE_MASK  (0x1000U)
+#define TSC_FLOW_CONTROL_START_SENSE_SHIFT (12U)
+#define TSC_FLOW_CONTROL_START_SENSE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_SENSE_SHIFT)) & TSC_FLOW_CONTROL_START_SENSE_MASK)
+#define TSC_FLOW_CONTROL_DISABLE_MASK  (0x10000U)
+#define TSC_FLOW_CONTROL_DISABLE_SHIFT (16U)
+#define TSC_FLOW_CONTROL_DISABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DISABLE_SHIFT)) & TSC_FLOW_CONTROL_DISABLE_MASK)
 /*! @} */
 
 /*! @name MEASEURE_VALUE - Measure Value */
 /*! @{ */
-#define TSC_MEASEURE_VALUE_Y_VALUE_MASK          (0xFFFU)
-#define TSC_MEASEURE_VALUE_Y_VALUE_SHIFT         (0U)
-#define TSC_MEASEURE_VALUE_Y_VALUE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_Y_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_Y_VALUE_MASK)
-#define TSC_MEASEURE_VALUE_X_VALUE_MASK          (0xFFF0000U)
-#define TSC_MEASEURE_VALUE_X_VALUE_SHIFT         (16U)
-#define TSC_MEASEURE_VALUE_X_VALUE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_X_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_X_VALUE_MASK)
+#define TSC_MEASEURE_VALUE_Y_VALUE_MASK  (0xFFFU)
+#define TSC_MEASEURE_VALUE_Y_VALUE_SHIFT (0U)
+#define TSC_MEASEURE_VALUE_Y_VALUE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_Y_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_Y_VALUE_MASK)
+#define TSC_MEASEURE_VALUE_X_VALUE_MASK  (0xFFF0000U)
+#define TSC_MEASEURE_VALUE_X_VALUE_SHIFT (16U)
+#define TSC_MEASEURE_VALUE_X_VALUE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_X_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_X_VALUE_MASK)
 /*! @} */
 
 /*! @name INT_EN - Interrupt Enable */
 /*! @{ */
-#define TSC_INT_EN_MEASURE_INT_EN_MASK           (0x1U)
-#define TSC_INT_EN_MEASURE_INT_EN_SHIFT          (0U)
-#define TSC_INT_EN_MEASURE_INT_EN(x)             (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_MEASURE_INT_EN_SHIFT)) & TSC_INT_EN_MEASURE_INT_EN_MASK)
-#define TSC_INT_EN_DETECT_INT_EN_MASK            (0x10U)
-#define TSC_INT_EN_DETECT_INT_EN_SHIFT           (4U)
-#define TSC_INT_EN_DETECT_INT_EN(x)              (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_DETECT_INT_EN_SHIFT)) & TSC_INT_EN_DETECT_INT_EN_MASK)
-#define TSC_INT_EN_IDLE_SW_INT_EN_MASK           (0x1000U)
-#define TSC_INT_EN_IDLE_SW_INT_EN_SHIFT          (12U)
-#define TSC_INT_EN_IDLE_SW_INT_EN(x)             (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_IDLE_SW_INT_EN_SHIFT)) & TSC_INT_EN_IDLE_SW_INT_EN_MASK)
+#define TSC_INT_EN_MEASURE_INT_EN_MASK  (0x1U)
+#define TSC_INT_EN_MEASURE_INT_EN_SHIFT (0U)
+#define TSC_INT_EN_MEASURE_INT_EN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_MEASURE_INT_EN_SHIFT)) & TSC_INT_EN_MEASURE_INT_EN_MASK)
+#define TSC_INT_EN_DETECT_INT_EN_MASK  (0x10U)
+#define TSC_INT_EN_DETECT_INT_EN_SHIFT (4U)
+#define TSC_INT_EN_DETECT_INT_EN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_DETECT_INT_EN_SHIFT)) & TSC_INT_EN_DETECT_INT_EN_MASK)
+#define TSC_INT_EN_IDLE_SW_INT_EN_MASK  (0x1000U)
+#define TSC_INT_EN_IDLE_SW_INT_EN_SHIFT (12U)
+#define TSC_INT_EN_IDLE_SW_INT_EN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_IDLE_SW_INT_EN_SHIFT)) & TSC_INT_EN_IDLE_SW_INT_EN_MASK)
 /*! @} */
 
 /*! @name INT_SIG_EN - Interrupt Signal Enable */
 /*! @{ */
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK       (0x1U)
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT      (0U)
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN(x)         (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN_MASK        (0x10U)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT       (4U)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN(x)          (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_DETECT_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_VALID_SIG_EN_MASK         (0x100U)
-#define TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT        (8U)
-#define TSC_INT_SIG_EN_VALID_SIG_EN(x)           (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_VALID_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK       (0x1000U)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT      (12U)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN(x)         (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK  (0x1U)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT (0U)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN_MASK  (0x10U)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT (4U)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_DETECT_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_VALID_SIG_EN_MASK  (0x100U)
+#define TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT (8U)
+#define TSC_INT_SIG_EN_VALID_SIG_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_VALID_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK  (0x1000U)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT (12U)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Intterrupt Status */
 /*! @{ */
-#define TSC_INT_STATUS_MEASURE_MASK              (0x1U)
-#define TSC_INT_STATUS_MEASURE_SHIFT             (0U)
-#define TSC_INT_STATUS_MEASURE(x)                (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_MEASURE_SHIFT)) & TSC_INT_STATUS_MEASURE_MASK)
-#define TSC_INT_STATUS_DETECT_MASK               (0x10U)
-#define TSC_INT_STATUS_DETECT_SHIFT              (4U)
-#define TSC_INT_STATUS_DETECT(x)                 (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_DETECT_SHIFT)) & TSC_INT_STATUS_DETECT_MASK)
-#define TSC_INT_STATUS_VALID_MASK                (0x100U)
-#define TSC_INT_STATUS_VALID_SHIFT               (8U)
-#define TSC_INT_STATUS_VALID(x)                  (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_VALID_SHIFT)) & TSC_INT_STATUS_VALID_MASK)
-#define TSC_INT_STATUS_IDLE_SW_MASK              (0x1000U)
-#define TSC_INT_STATUS_IDLE_SW_SHIFT             (12U)
-#define TSC_INT_STATUS_IDLE_SW(x)                (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_IDLE_SW_SHIFT)) & TSC_INT_STATUS_IDLE_SW_MASK)
+#define TSC_INT_STATUS_MEASURE_MASK  (0x1U)
+#define TSC_INT_STATUS_MEASURE_SHIFT (0U)
+#define TSC_INT_STATUS_MEASURE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_MEASURE_SHIFT)) & TSC_INT_STATUS_MEASURE_MASK)
+#define TSC_INT_STATUS_DETECT_MASK  (0x10U)
+#define TSC_INT_STATUS_DETECT_SHIFT (4U)
+#define TSC_INT_STATUS_DETECT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_DETECT_SHIFT)) & TSC_INT_STATUS_DETECT_MASK)
+#define TSC_INT_STATUS_VALID_MASK  (0x100U)
+#define TSC_INT_STATUS_VALID_SHIFT (8U)
+#define TSC_INT_STATUS_VALID(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_VALID_SHIFT)) & TSC_INT_STATUS_VALID_MASK)
+#define TSC_INT_STATUS_IDLE_SW_MASK  (0x1000U)
+#define TSC_INT_STATUS_IDLE_SW_SHIFT (12U)
+#define TSC_INT_STATUS_IDLE_SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_IDLE_SW_SHIFT)) & TSC_INT_STATUS_IDLE_SW_MASK)
 /*! @} */
 
 /*! @name DEBUG_MODE -  */
 /*! @{ */
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK       (0xFFFU)
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT      (0U)
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT)) & TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_MASK             (0x1000U)
-#define TSC_DEBUG_MODE_ADC_COCO_SHIFT            (12U)
-#define TSC_DEBUG_MODE_ADC_COCO(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_MASK)
-#define TSC_DEBUG_MODE_EXT_HWTS_MASK             (0x1F0000U)
-#define TSC_DEBUG_MODE_EXT_HWTS_SHIFT            (16U)
-#define TSC_DEBUG_MODE_EXT_HWTS(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_EXT_HWTS_SHIFT)) & TSC_DEBUG_MODE_EXT_HWTS_MASK)
-#define TSC_DEBUG_MODE_TRIGGER_MASK              (0x1000000U)
-#define TSC_DEBUG_MODE_TRIGGER_SHIFT             (24U)
-#define TSC_DEBUG_MODE_TRIGGER(x)                (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_TRIGGER_SHIFT)) & TSC_DEBUG_MODE_TRIGGER_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK       (0x2000000U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT      (25U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK (0x4000000U)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK  (0xFFFU)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT (0U)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT)) & TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_MASK  (0x1000U)
+#define TSC_DEBUG_MODE_ADC_COCO_SHIFT (12U)
+#define TSC_DEBUG_MODE_ADC_COCO(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_MASK)
+#define TSC_DEBUG_MODE_EXT_HWTS_MASK  (0x1F0000U)
+#define TSC_DEBUG_MODE_EXT_HWTS_SHIFT (16U)
+#define TSC_DEBUG_MODE_EXT_HWTS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_EXT_HWTS_SHIFT)) & TSC_DEBUG_MODE_EXT_HWTS_MASK)
+#define TSC_DEBUG_MODE_TRIGGER_MASK  (0x1000000U)
+#define TSC_DEBUG_MODE_TRIGGER_SHIFT (24U)
+#define TSC_DEBUG_MODE_TRIGGER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_TRIGGER_SHIFT)) & TSC_DEBUG_MODE_TRIGGER_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK  (0x2000000U)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT (25U)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK  (0x4000000U)
 #define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT (26U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK)
-#define TSC_DEBUG_MODE_DEBUG_EN_MASK             (0x10000000U)
-#define TSC_DEBUG_MODE_DEBUG_EN_SHIFT            (28U)
-#define TSC_DEBUG_MODE_DEBUG_EN(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_DEBUG_EN_SHIFT)) & TSC_DEBUG_MODE_DEBUG_EN_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT)) &                                    \
+     TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK)
+#define TSC_DEBUG_MODE_DEBUG_EN_MASK  (0x10000000U)
+#define TSC_DEBUG_MODE_DEBUG_EN_SHIFT (28U)
+#define TSC_DEBUG_MODE_DEBUG_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_DEBUG_EN_SHIFT)) & TSC_DEBUG_MODE_DEBUG_EN_MASK)
 /*! @} */
 
 /*! @name DEBUG_MODE2 -  */
 /*! @{ */
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK      (0x1U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT     (0U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK        (0x2U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT       (1U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK   (0x4U)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT  (2U)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK      (0x8U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT     (3U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK        (0x10U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT       (4U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK   (0x20U)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT  (5U)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK      (0x40U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT     (6U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK        (0x80U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT       (7U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK   (0x100U)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT  (8U)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK      (0x200U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT     (9U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK        (0x400U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT       (10U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK   (0x800U)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT  (11U)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK     (0x1000U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT    (12U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN(x)       (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK       (0x2000U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT      (13U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK  (0x1U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT (0U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK  (0x2U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT (1U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK  (0x4U)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT (2U)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK  (0x8U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT (3U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK  (0x10U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT (4U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK  (0x20U)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT (5U)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK  (0x40U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT (6U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK  (0x80U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT (7U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK  (0x100U)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT (8U)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK  (0x200U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT (9U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK  (0x400U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT (10U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK  (0x800U)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT (11U)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK  (0x1000U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT (12U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK  (0x2000U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT (13U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK)
 #define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK  (0x4000U)
 #define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT (14U)
-#define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP(x)    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK    (0x10000U)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT   (16U)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE(x)      (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK    (0x20000U)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT   (17U)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE(x)      (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK)
-#define TSC_DEBUG_MODE2_STATE_MACHINE_MASK       (0x700000U)
-#define TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT      (20U)
-#define TSC_DEBUG_MODE2_STATE_MACHINE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT)) & TSC_DEBUG_MODE2_STATE_MACHINE_MASK)
-#define TSC_DEBUG_MODE2_INTERMEDIATE_MASK        (0x800000U)
-#define TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT       (23U)
-#define TSC_DEBUG_MODE2_INTERMEDIATE(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT)) & TSC_DEBUG_MODE2_INTERMEDIATE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK (0x1000000U)
+#define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT)) &                                       \
+     TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK  (0x10000U)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT (16U)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK  (0x20000U)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT (17U)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK)
+#define TSC_DEBUG_MODE2_STATE_MACHINE_MASK  (0x700000U)
+#define TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT (20U)
+#define TSC_DEBUG_MODE2_STATE_MACHINE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT)) & TSC_DEBUG_MODE2_STATE_MACHINE_MASK)
+#define TSC_DEBUG_MODE2_INTERMEDIATE_MASK  (0x800000U)
+#define TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT (23U)
+#define TSC_DEBUG_MODE2_INTERMEDIATE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT)) & TSC_DEBUG_MODE2_INTERMEDIATE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK  (0x1000000U)
 #define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT (24U)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK (0x10000000U)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT)) &                                  \
+     TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK  (0x10000000U)
 #define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT (28U)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DE_GLITCH_MASK           (0x60000000U)
-#define TSC_DEBUG_MODE2_DE_GLITCH_SHIFT          (29U)
-#define TSC_DEBUG_MODE2_DE_GLITCH(x)             (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DE_GLITCH_SHIFT)) & TSC_DEBUG_MODE2_DE_GLITCH_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT)) &                                  \
+     TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DE_GLITCH_MASK  (0x60000000U)
+#define TSC_DEBUG_MODE2_DE_GLITCH_SHIFT (29U)
+#define TSC_DEBUG_MODE2_DE_GLITCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DE_GLITCH_SHIFT)) & TSC_DEBUG_MODE2_DE_GLITCH_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TSC_Register_Masks */
 
-
 /* TSC - Peripheral instance base addresses */
 /** Peripheral TSC base address */
-#define TSC_BASE                                 (0x400E0000u)
+#define TSC_BASE (0x400E0000u)
 /** Peripheral TSC base pointer */
-#define TSC                                      ((TSC_Type *)TSC_BASE)
+#define TSC ((TSC_Type *)TSC_BASE)
 /** Array initializer of TSC peripheral base addresses */
-#define TSC_BASE_ADDRS                           { TSC_BASE }
+#define TSC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        TSC_BASE                                                                                                       \
+    }
 /** Array initializer of TSC peripheral base pointers */
-#define TSC_BASE_PTRS                            { TSC }
+#define TSC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        TSC                                                                                                            \
+    }
 /** Interrupt vectors for the TSC peripheral type */
-#define TSC_IRQS                                 { TSC_DIG_IRQn }
+#define TSC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        TSC_DIG_IRQn                                                                                                   \
+    }
 /* Backward compatibility */
-#define TSC_BASIC_SETTING__4_5_WIRE_MASK          TSC_BASIC_SETTING_4_5_WIRE_MASK
-#define TSC_BASIC_SETTING__4_5_WIRE_SHIFT         TSC_BASIC_SETTING_4_5_WIRE_SHIFT
-#define TSC_BASIC_SETTING__4_5_WIRE(x)            TSC_BASIC_SETTING_4_5_WIRE(x)
-
+#define TSC_BASIC_SETTING__4_5_WIRE_MASK  TSC_BASIC_SETTING_4_5_WIRE_MASK
+#define TSC_BASIC_SETTING__4_5_WIRE_SHIFT TSC_BASIC_SETTING_4_5_WIRE_SHIFT
+#define TSC_BASIC_SETTING__4_5_WIRE(x)    TSC_BASIC_SETTING_4_5_WIRE(x)
 
 /*!
  * @}
  */ /* end of group TSC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USB Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -21668,61 +24694,64 @@ typedef struct {
  */
 
 /** USB - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t ID;                                /**< Identification register, offset: 0x0 */
-  __I  uint32_t HWGENERAL;                         /**< Hardware General, offset: 0x4 */
-  __I  uint32_t HWHOST;                            /**< Host Hardware Parameters, offset: 0x8 */
-  __I  uint32_t HWDEVICE;                          /**< Device Hardware Parameters, offset: 0xC */
-  __I  uint32_t HWTXBUF;                           /**< TX Buffer Hardware Parameters, offset: 0x10 */
-  __I  uint32_t HWRXBUF;                           /**< RX Buffer Hardware Parameters, offset: 0x14 */
-       uint8_t RESERVED_0[104];
-  __IO uint32_t GPTIMER0LD;                        /**< General Purpose Timer #0 Load, offset: 0x80 */
-  __IO uint32_t GPTIMER0CTRL;                      /**< General Purpose Timer #0 Controller, offset: 0x84 */
-  __IO uint32_t GPTIMER1LD;                        /**< General Purpose Timer #1 Load, offset: 0x88 */
-  __IO uint32_t GPTIMER1CTRL;                      /**< General Purpose Timer #1 Controller, offset: 0x8C */
-  __IO uint32_t SBUSCFG;                           /**< System Bus Config, offset: 0x90 */
-       uint8_t RESERVED_1[108];
-  __I  uint8_t CAPLENGTH;                          /**< Capability Registers Length, offset: 0x100 */
-       uint8_t RESERVED_2[1];
-  __I  uint16_t HCIVERSION;                        /**< Host Controller Interface Version, offset: 0x102 */
-  __I  uint32_t HCSPARAMS;                         /**< Host Controller Structural Parameters, offset: 0x104 */
-  __I  uint32_t HCCPARAMS;                         /**< Host Controller Capability Parameters, offset: 0x108 */
-       uint8_t RESERVED_3[20];
-  __I  uint16_t DCIVERSION;                        /**< Device Controller Interface Version, offset: 0x120 */
-       uint8_t RESERVED_4[2];
-  __I  uint32_t DCCPARAMS;                         /**< Device Controller Capability Parameters, offset: 0x124 */
-       uint8_t RESERVED_5[24];
-  __IO uint32_t USBCMD;                            /**< USB Command Register, offset: 0x140 */
-  __IO uint32_t USBSTS;                            /**< USB Status Register, offset: 0x144 */
-  __IO uint32_t USBINTR;                           /**< Interrupt Enable Register, offset: 0x148 */
-  __IO uint32_t FRINDEX;                           /**< USB Frame Index, offset: 0x14C */
-       uint8_t RESERVED_6[4];
-  union {                                          /* offset: 0x154 */
-    __IO uint32_t DEVICEADDR;                        /**< Device Address, offset: 0x154 */
-    __IO uint32_t PERIODICLISTBASE;                  /**< Frame List Base Address, offset: 0x154 */
-  };
-  union {                                          /* offset: 0x158 */
-    __IO uint32_t ASYNCLISTADDR;                     /**< Next Asynch. Address, offset: 0x158 */
-    __IO uint32_t ENDPTLISTADDR;                     /**< Endpoint List Address, offset: 0x158 */
-  };
-       uint8_t RESERVED_7[4];
-  __IO uint32_t BURSTSIZE;                         /**< Programmable Burst Size, offset: 0x160 */
-  __IO uint32_t TXFILLTUNING;                      /**< TX FIFO Fill Tuning, offset: 0x164 */
-       uint8_t RESERVED_8[16];
-  __IO uint32_t ENDPTNAK;                          /**< Endpoint NAK, offset: 0x178 */
-  __IO uint32_t ENDPTNAKEN;                        /**< Endpoint NAK Enable, offset: 0x17C */
-  __I  uint32_t CONFIGFLAG;                        /**< Configure Flag Register, offset: 0x180 */
-  __IO uint32_t PORTSC1;                           /**< Port Status & Control, offset: 0x184 */
-       uint8_t RESERVED_9[28];
-  __IO uint32_t OTGSC;                             /**< On-The-Go Status & control, offset: 0x1A4 */
-  __IO uint32_t USBMODE;                           /**< USB Device Mode, offset: 0x1A8 */
-  __IO uint32_t ENDPTSETUPSTAT;                    /**< Endpoint Setup Status, offset: 0x1AC */
-  __IO uint32_t ENDPTPRIME;                        /**< Endpoint Prime, offset: 0x1B0 */
-  __IO uint32_t ENDPTFLUSH;                        /**< Endpoint Flush, offset: 0x1B4 */
-  __I  uint32_t ENDPTSTAT;                         /**< Endpoint Status, offset: 0x1B8 */
-  __IO uint32_t ENDPTCOMPLETE;                     /**< Endpoint Complete, offset: 0x1BC */
-  __IO uint32_t ENDPTCTRL0;                        /**< Endpoint Control0, offset: 0x1C0 */
-  __IO uint32_t ENDPTCTRL[7];                      /**< Endpoint Control 1..Endpoint Control 7, array offset: 0x1C4, array step: 0x4 */
+typedef struct
+{
+    __I uint32_t ID;        /**< Identification register, offset: 0x0 */
+    __I uint32_t HWGENERAL; /**< Hardware General, offset: 0x4 */
+    __I uint32_t HWHOST;    /**< Host Hardware Parameters, offset: 0x8 */
+    __I uint32_t HWDEVICE;  /**< Device Hardware Parameters, offset: 0xC */
+    __I uint32_t HWTXBUF;   /**< TX Buffer Hardware Parameters, offset: 0x10 */
+    __I uint32_t HWRXBUF;   /**< RX Buffer Hardware Parameters, offset: 0x14 */
+    uint8_t RESERVED_0[104];
+    __IO uint32_t GPTIMER0LD;   /**< General Purpose Timer #0 Load, offset: 0x80 */
+    __IO uint32_t GPTIMER0CTRL; /**< General Purpose Timer #0 Controller, offset: 0x84 */
+    __IO uint32_t GPTIMER1LD;   /**< General Purpose Timer #1 Load, offset: 0x88 */
+    __IO uint32_t GPTIMER1CTRL; /**< General Purpose Timer #1 Controller, offset: 0x8C */
+    __IO uint32_t SBUSCFG;      /**< System Bus Config, offset: 0x90 */
+    uint8_t RESERVED_1[108];
+    __I uint8_t CAPLENGTH; /**< Capability Registers Length, offset: 0x100 */
+    uint8_t RESERVED_2[1];
+    __I uint16_t HCIVERSION; /**< Host Controller Interface Version, offset: 0x102 */
+    __I uint32_t HCSPARAMS;  /**< Host Controller Structural Parameters, offset: 0x104 */
+    __I uint32_t HCCPARAMS;  /**< Host Controller Capability Parameters, offset: 0x108 */
+    uint8_t RESERVED_3[20];
+    __I uint16_t DCIVERSION; /**< Device Controller Interface Version, offset: 0x120 */
+    uint8_t RESERVED_4[2];
+    __I uint32_t DCCPARAMS; /**< Device Controller Capability Parameters, offset: 0x124 */
+    uint8_t RESERVED_5[24];
+    __IO uint32_t USBCMD;  /**< USB Command Register, offset: 0x140 */
+    __IO uint32_t USBSTS;  /**< USB Status Register, offset: 0x144 */
+    __IO uint32_t USBINTR; /**< Interrupt Enable Register, offset: 0x148 */
+    __IO uint32_t FRINDEX; /**< USB Frame Index, offset: 0x14C */
+    uint8_t RESERVED_6[4];
+    union
+    {                                   /* offset: 0x154 */
+        __IO uint32_t DEVICEADDR;       /**< Device Address, offset: 0x154 */
+        __IO uint32_t PERIODICLISTBASE; /**< Frame List Base Address, offset: 0x154 */
+    };
+    union
+    {                                /* offset: 0x158 */
+        __IO uint32_t ASYNCLISTADDR; /**< Next Asynch. Address, offset: 0x158 */
+        __IO uint32_t ENDPTLISTADDR; /**< Endpoint List Address, offset: 0x158 */
+    };
+    uint8_t RESERVED_7[4];
+    __IO uint32_t BURSTSIZE;    /**< Programmable Burst Size, offset: 0x160 */
+    __IO uint32_t TXFILLTUNING; /**< TX FIFO Fill Tuning, offset: 0x164 */
+    uint8_t RESERVED_8[16];
+    __IO uint32_t ENDPTNAK;   /**< Endpoint NAK, offset: 0x178 */
+    __IO uint32_t ENDPTNAKEN; /**< Endpoint NAK Enable, offset: 0x17C */
+    __I uint32_t CONFIGFLAG;  /**< Configure Flag Register, offset: 0x180 */
+    __IO uint32_t PORTSC1;    /**< Port Status & Control, offset: 0x184 */
+    uint8_t RESERVED_9[28];
+    __IO uint32_t OTGSC;          /**< On-The-Go Status & control, offset: 0x1A4 */
+    __IO uint32_t USBMODE;        /**< USB Device Mode, offset: 0x1A8 */
+    __IO uint32_t ENDPTSETUPSTAT; /**< Endpoint Setup Status, offset: 0x1AC */
+    __IO uint32_t ENDPTPRIME;     /**< Endpoint Prime, offset: 0x1B0 */
+    __IO uint32_t ENDPTFLUSH;     /**< Endpoint Flush, offset: 0x1B4 */
+    __I uint32_t ENDPTSTAT;       /**< Endpoint Status, offset: 0x1B8 */
+    __IO uint32_t ENDPTCOMPLETE;  /**< Endpoint Complete, offset: 0x1BC */
+    __IO uint32_t ENDPTCTRL0;     /**< Endpoint Control0, offset: 0x1C0 */
+    __IO uint32_t ENDPTCTRL[7];   /**< Endpoint Control 1..Endpoint Control 7, array offset: 0x1C4, array step: 0x4 */
 } USB_Type;
 
 /* ----------------------------------------------------------------------------
@@ -21736,1320 +24765,1362 @@ typedef struct {
 
 /*! @name ID - Identification register */
 /*! @{ */
-#define USB_ID_ID_MASK                           (0x3FU)
-#define USB_ID_ID_SHIFT                          (0U)
-#define USB_ID_ID(x)                             (((uint32_t)(((uint32_t)(x)) << USB_ID_ID_SHIFT)) & USB_ID_ID_MASK)
-#define USB_ID_NID_MASK                          (0x3F00U)
-#define USB_ID_NID_SHIFT                         (8U)
-#define USB_ID_NID(x)                            (((uint32_t)(((uint32_t)(x)) << USB_ID_NID_SHIFT)) & USB_ID_NID_MASK)
-#define USB_ID_REVISION_MASK                     (0xFF0000U)
-#define USB_ID_REVISION_SHIFT                    (16U)
-#define USB_ID_REVISION(x)                       (((uint32_t)(((uint32_t)(x)) << USB_ID_REVISION_SHIFT)) & USB_ID_REVISION_MASK)
+#define USB_ID_ID_MASK        (0x3FU)
+#define USB_ID_ID_SHIFT       (0U)
+#define USB_ID_ID(x)          (((uint32_t)(((uint32_t)(x)) << USB_ID_ID_SHIFT)) & USB_ID_ID_MASK)
+#define USB_ID_NID_MASK       (0x3F00U)
+#define USB_ID_NID_SHIFT      (8U)
+#define USB_ID_NID(x)         (((uint32_t)(((uint32_t)(x)) << USB_ID_NID_SHIFT)) & USB_ID_NID_MASK)
+#define USB_ID_REVISION_MASK  (0xFF0000U)
+#define USB_ID_REVISION_SHIFT (16U)
+#define USB_ID_REVISION(x)    (((uint32_t)(((uint32_t)(x)) << USB_ID_REVISION_SHIFT)) & USB_ID_REVISION_MASK)
 /*! @} */
 
 /*! @name HWGENERAL - Hardware General */
 /*! @{ */
-#define USB_HWGENERAL_PHYW_MASK                  (0x30U)
-#define USB_HWGENERAL_PHYW_SHIFT                 (4U)
-#define USB_HWGENERAL_PHYW(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYW_SHIFT)) & USB_HWGENERAL_PHYW_MASK)
-#define USB_HWGENERAL_PHYM_MASK                  (0x1C0U)
-#define USB_HWGENERAL_PHYM_SHIFT                 (6U)
-#define USB_HWGENERAL_PHYM(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYM_SHIFT)) & USB_HWGENERAL_PHYM_MASK)
-#define USB_HWGENERAL_SM_MASK                    (0x600U)
-#define USB_HWGENERAL_SM_SHIFT                   (9U)
-#define USB_HWGENERAL_SM(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_SM_SHIFT)) & USB_HWGENERAL_SM_MASK)
+#define USB_HWGENERAL_PHYW_MASK  (0x30U)
+#define USB_HWGENERAL_PHYW_SHIFT (4U)
+#define USB_HWGENERAL_PHYW(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYW_SHIFT)) & USB_HWGENERAL_PHYW_MASK)
+#define USB_HWGENERAL_PHYM_MASK  (0x1C0U)
+#define USB_HWGENERAL_PHYM_SHIFT (6U)
+#define USB_HWGENERAL_PHYM(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYM_SHIFT)) & USB_HWGENERAL_PHYM_MASK)
+#define USB_HWGENERAL_SM_MASK    (0x600U)
+#define USB_HWGENERAL_SM_SHIFT   (9U)
+#define USB_HWGENERAL_SM(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_SM_SHIFT)) & USB_HWGENERAL_SM_MASK)
 /*! @} */
 
 /*! @name HWHOST - Host Hardware Parameters */
 /*! @{ */
-#define USB_HWHOST_HC_MASK                       (0x1U)
-#define USB_HWHOST_HC_SHIFT                      (0U)
-#define USB_HWHOST_HC(x)                         (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_HC_SHIFT)) & USB_HWHOST_HC_MASK)
-#define USB_HWHOST_NPORT_MASK                    (0xEU)
-#define USB_HWHOST_NPORT_SHIFT                   (1U)
-#define USB_HWHOST_NPORT(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_NPORT_SHIFT)) & USB_HWHOST_NPORT_MASK)
+#define USB_HWHOST_HC_MASK     (0x1U)
+#define USB_HWHOST_HC_SHIFT    (0U)
+#define USB_HWHOST_HC(x)       (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_HC_SHIFT)) & USB_HWHOST_HC_MASK)
+#define USB_HWHOST_NPORT_MASK  (0xEU)
+#define USB_HWHOST_NPORT_SHIFT (1U)
+#define USB_HWHOST_NPORT(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_NPORT_SHIFT)) & USB_HWHOST_NPORT_MASK)
 /*! @} */
 
 /*! @name HWDEVICE - Device Hardware Parameters */
 /*! @{ */
-#define USB_HWDEVICE_DC_MASK                     (0x1U)
-#define USB_HWDEVICE_DC_SHIFT                    (0U)
-#define USB_HWDEVICE_DC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DC_SHIFT)) & USB_HWDEVICE_DC_MASK)
-#define USB_HWDEVICE_DEVEP_MASK                  (0x3EU)
-#define USB_HWDEVICE_DEVEP_SHIFT                 (1U)
-#define USB_HWDEVICE_DEVEP(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DEVEP_SHIFT)) & USB_HWDEVICE_DEVEP_MASK)
+#define USB_HWDEVICE_DC_MASK     (0x1U)
+#define USB_HWDEVICE_DC_SHIFT    (0U)
+#define USB_HWDEVICE_DC(x)       (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DC_SHIFT)) & USB_HWDEVICE_DC_MASK)
+#define USB_HWDEVICE_DEVEP_MASK  (0x3EU)
+#define USB_HWDEVICE_DEVEP_SHIFT (1U)
+#define USB_HWDEVICE_DEVEP(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DEVEP_SHIFT)) & USB_HWDEVICE_DEVEP_MASK)
 /*! @} */
 
 /*! @name HWTXBUF - TX Buffer Hardware Parameters */
 /*! @{ */
-#define USB_HWTXBUF_TXBURST_MASK                 (0xFFU)
-#define USB_HWTXBUF_TXBURST_SHIFT                (0U)
-#define USB_HWTXBUF_TXBURST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXBURST_SHIFT)) & USB_HWTXBUF_TXBURST_MASK)
-#define USB_HWTXBUF_TXCHANADD_MASK               (0xFF0000U)
-#define USB_HWTXBUF_TXCHANADD_SHIFT              (16U)
-#define USB_HWTXBUF_TXCHANADD(x)                 (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXCHANADD_SHIFT)) & USB_HWTXBUF_TXCHANADD_MASK)
+#define USB_HWTXBUF_TXBURST_MASK    (0xFFU)
+#define USB_HWTXBUF_TXBURST_SHIFT   (0U)
+#define USB_HWTXBUF_TXBURST(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXBURST_SHIFT)) & USB_HWTXBUF_TXBURST_MASK)
+#define USB_HWTXBUF_TXCHANADD_MASK  (0xFF0000U)
+#define USB_HWTXBUF_TXCHANADD_SHIFT (16U)
+#define USB_HWTXBUF_TXCHANADD(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXCHANADD_SHIFT)) & USB_HWTXBUF_TXCHANADD_MASK)
 /*! @} */
 
 /*! @name HWRXBUF - RX Buffer Hardware Parameters */
 /*! @{ */
-#define USB_HWRXBUF_RXBURST_MASK                 (0xFFU)
-#define USB_HWRXBUF_RXBURST_SHIFT                (0U)
-#define USB_HWRXBUF_RXBURST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXBURST_SHIFT)) & USB_HWRXBUF_RXBURST_MASK)
-#define USB_HWRXBUF_RXADD_MASK                   (0xFF00U)
-#define USB_HWRXBUF_RXADD_SHIFT                  (8U)
-#define USB_HWRXBUF_RXADD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXADD_SHIFT)) & USB_HWRXBUF_RXADD_MASK)
+#define USB_HWRXBUF_RXBURST_MASK  (0xFFU)
+#define USB_HWRXBUF_RXBURST_SHIFT (0U)
+#define USB_HWRXBUF_RXBURST(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXBURST_SHIFT)) & USB_HWRXBUF_RXBURST_MASK)
+#define USB_HWRXBUF_RXADD_MASK    (0xFF00U)
+#define USB_HWRXBUF_RXADD_SHIFT   (8U)
+#define USB_HWRXBUF_RXADD(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXADD_SHIFT)) & USB_HWRXBUF_RXADD_MASK)
 /*! @} */
 
 /*! @name GPTIMER0LD - General Purpose Timer #0 Load */
 /*! @{ */
-#define USB_GPTIMER0LD_GPTLD_MASK                (0xFFFFFFU)
-#define USB_GPTIMER0LD_GPTLD_SHIFT               (0U)
-#define USB_GPTIMER0LD_GPTLD(x)                  (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0LD_GPTLD_SHIFT)) & USB_GPTIMER0LD_GPTLD_MASK)
+#define USB_GPTIMER0LD_GPTLD_MASK  (0xFFFFFFU)
+#define USB_GPTIMER0LD_GPTLD_SHIFT (0U)
+#define USB_GPTIMER0LD_GPTLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0LD_GPTLD_SHIFT)) & USB_GPTIMER0LD_GPTLD_MASK)
 /*! @} */
 
 /*! @name GPTIMER0CTRL - General Purpose Timer #0 Controller */
 /*! @{ */
-#define USB_GPTIMER0CTRL_GPTCNT_MASK             (0xFFFFFFU)
-#define USB_GPTIMER0CTRL_GPTCNT_SHIFT            (0U)
-#define USB_GPTIMER0CTRL_GPTCNT(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTCNT_SHIFT)) & USB_GPTIMER0CTRL_GPTCNT_MASK)
-#define USB_GPTIMER0CTRL_GPTMODE_MASK            (0x1000000U)
-#define USB_GPTIMER0CTRL_GPTMODE_SHIFT           (24U)
-#define USB_GPTIMER0CTRL_GPTMODE(x)              (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTMODE_SHIFT)) & USB_GPTIMER0CTRL_GPTMODE_MASK)
-#define USB_GPTIMER0CTRL_GPTRST_MASK             (0x40000000U)
-#define USB_GPTIMER0CTRL_GPTRST_SHIFT            (30U)
-#define USB_GPTIMER0CTRL_GPTRST(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRST_SHIFT)) & USB_GPTIMER0CTRL_GPTRST_MASK)
-#define USB_GPTIMER0CTRL_GPTRUN_MASK             (0x80000000U)
-#define USB_GPTIMER0CTRL_GPTRUN_SHIFT            (31U)
-#define USB_GPTIMER0CTRL_GPTRUN(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRUN_SHIFT)) & USB_GPTIMER0CTRL_GPTRUN_MASK)
+#define USB_GPTIMER0CTRL_GPTCNT_MASK  (0xFFFFFFU)
+#define USB_GPTIMER0CTRL_GPTCNT_SHIFT (0U)
+#define USB_GPTIMER0CTRL_GPTCNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTCNT_SHIFT)) & USB_GPTIMER0CTRL_GPTCNT_MASK)
+#define USB_GPTIMER0CTRL_GPTMODE_MASK  (0x1000000U)
+#define USB_GPTIMER0CTRL_GPTMODE_SHIFT (24U)
+#define USB_GPTIMER0CTRL_GPTMODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTMODE_SHIFT)) & USB_GPTIMER0CTRL_GPTMODE_MASK)
+#define USB_GPTIMER0CTRL_GPTRST_MASK  (0x40000000U)
+#define USB_GPTIMER0CTRL_GPTRST_SHIFT (30U)
+#define USB_GPTIMER0CTRL_GPTRST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRST_SHIFT)) & USB_GPTIMER0CTRL_GPTRST_MASK)
+#define USB_GPTIMER0CTRL_GPTRUN_MASK  (0x80000000U)
+#define USB_GPTIMER0CTRL_GPTRUN_SHIFT (31U)
+#define USB_GPTIMER0CTRL_GPTRUN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRUN_SHIFT)) & USB_GPTIMER0CTRL_GPTRUN_MASK)
 /*! @} */
 
 /*! @name GPTIMER1LD - General Purpose Timer #1 Load */
 /*! @{ */
-#define USB_GPTIMER1LD_GPTLD_MASK                (0xFFFFFFU)
-#define USB_GPTIMER1LD_GPTLD_SHIFT               (0U)
-#define USB_GPTIMER1LD_GPTLD(x)                  (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1LD_GPTLD_SHIFT)) & USB_GPTIMER1LD_GPTLD_MASK)
+#define USB_GPTIMER1LD_GPTLD_MASK  (0xFFFFFFU)
+#define USB_GPTIMER1LD_GPTLD_SHIFT (0U)
+#define USB_GPTIMER1LD_GPTLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1LD_GPTLD_SHIFT)) & USB_GPTIMER1LD_GPTLD_MASK)
 /*! @} */
 
 /*! @name GPTIMER1CTRL - General Purpose Timer #1 Controller */
 /*! @{ */
-#define USB_GPTIMER1CTRL_GPTCNT_MASK             (0xFFFFFFU)
-#define USB_GPTIMER1CTRL_GPTCNT_SHIFT            (0U)
-#define USB_GPTIMER1CTRL_GPTCNT(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTCNT_SHIFT)) & USB_GPTIMER1CTRL_GPTCNT_MASK)
-#define USB_GPTIMER1CTRL_GPTMODE_MASK            (0x1000000U)
-#define USB_GPTIMER1CTRL_GPTMODE_SHIFT           (24U)
-#define USB_GPTIMER1CTRL_GPTMODE(x)              (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTMODE_SHIFT)) & USB_GPTIMER1CTRL_GPTMODE_MASK)
-#define USB_GPTIMER1CTRL_GPTRST_MASK             (0x40000000U)
-#define USB_GPTIMER1CTRL_GPTRST_SHIFT            (30U)
-#define USB_GPTIMER1CTRL_GPTRST(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRST_SHIFT)) & USB_GPTIMER1CTRL_GPTRST_MASK)
-#define USB_GPTIMER1CTRL_GPTRUN_MASK             (0x80000000U)
-#define USB_GPTIMER1CTRL_GPTRUN_SHIFT            (31U)
-#define USB_GPTIMER1CTRL_GPTRUN(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRUN_SHIFT)) & USB_GPTIMER1CTRL_GPTRUN_MASK)
+#define USB_GPTIMER1CTRL_GPTCNT_MASK  (0xFFFFFFU)
+#define USB_GPTIMER1CTRL_GPTCNT_SHIFT (0U)
+#define USB_GPTIMER1CTRL_GPTCNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTCNT_SHIFT)) & USB_GPTIMER1CTRL_GPTCNT_MASK)
+#define USB_GPTIMER1CTRL_GPTMODE_MASK  (0x1000000U)
+#define USB_GPTIMER1CTRL_GPTMODE_SHIFT (24U)
+#define USB_GPTIMER1CTRL_GPTMODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTMODE_SHIFT)) & USB_GPTIMER1CTRL_GPTMODE_MASK)
+#define USB_GPTIMER1CTRL_GPTRST_MASK  (0x40000000U)
+#define USB_GPTIMER1CTRL_GPTRST_SHIFT (30U)
+#define USB_GPTIMER1CTRL_GPTRST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRST_SHIFT)) & USB_GPTIMER1CTRL_GPTRST_MASK)
+#define USB_GPTIMER1CTRL_GPTRUN_MASK  (0x80000000U)
+#define USB_GPTIMER1CTRL_GPTRUN_SHIFT (31U)
+#define USB_GPTIMER1CTRL_GPTRUN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRUN_SHIFT)) & USB_GPTIMER1CTRL_GPTRUN_MASK)
 /*! @} */
 
 /*! @name SBUSCFG - System Bus Config */
 /*! @{ */
-#define USB_SBUSCFG_AHBBRST_MASK                 (0x7U)
-#define USB_SBUSCFG_AHBBRST_SHIFT                (0U)
-#define USB_SBUSCFG_AHBBRST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_SBUSCFG_AHBBRST_SHIFT)) & USB_SBUSCFG_AHBBRST_MASK)
+#define USB_SBUSCFG_AHBBRST_MASK  (0x7U)
+#define USB_SBUSCFG_AHBBRST_SHIFT (0U)
+#define USB_SBUSCFG_AHBBRST(x)    (((uint32_t)(((uint32_t)(x)) << USB_SBUSCFG_AHBBRST_SHIFT)) & USB_SBUSCFG_AHBBRST_MASK)
 /*! @} */
 
 /*! @name CAPLENGTH - Capability Registers Length */
 /*! @{ */
-#define USB_CAPLENGTH_CAPLENGTH_MASK             (0xFFU)
-#define USB_CAPLENGTH_CAPLENGTH_SHIFT            (0U)
-#define USB_CAPLENGTH_CAPLENGTH(x)               (((uint8_t)(((uint8_t)(x)) << USB_CAPLENGTH_CAPLENGTH_SHIFT)) & USB_CAPLENGTH_CAPLENGTH_MASK)
+#define USB_CAPLENGTH_CAPLENGTH_MASK  (0xFFU)
+#define USB_CAPLENGTH_CAPLENGTH_SHIFT (0U)
+#define USB_CAPLENGTH_CAPLENGTH(x)                                                                                     \
+    (((uint8_t)(((uint8_t)(x)) << USB_CAPLENGTH_CAPLENGTH_SHIFT)) & USB_CAPLENGTH_CAPLENGTH_MASK)
 /*! @} */
 
 /*! @name HCIVERSION - Host Controller Interface Version */
 /*! @{ */
-#define USB_HCIVERSION_HCIVERSION_MASK           (0xFFFFU)
-#define USB_HCIVERSION_HCIVERSION_SHIFT          (0U)
-#define USB_HCIVERSION_HCIVERSION(x)             (((uint16_t)(((uint16_t)(x)) << USB_HCIVERSION_HCIVERSION_SHIFT)) & USB_HCIVERSION_HCIVERSION_MASK)
+#define USB_HCIVERSION_HCIVERSION_MASK  (0xFFFFU)
+#define USB_HCIVERSION_HCIVERSION_SHIFT (0U)
+#define USB_HCIVERSION_HCIVERSION(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << USB_HCIVERSION_HCIVERSION_SHIFT)) & USB_HCIVERSION_HCIVERSION_MASK)
 /*! @} */
 
 /*! @name HCSPARAMS - Host Controller Structural Parameters */
 /*! @{ */
-#define USB_HCSPARAMS_N_PORTS_MASK               (0xFU)
-#define USB_HCSPARAMS_N_PORTS_SHIFT              (0U)
-#define USB_HCSPARAMS_N_PORTS(x)                 (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PORTS_SHIFT)) & USB_HCSPARAMS_N_PORTS_MASK)
-#define USB_HCSPARAMS_PPC_MASK                   (0x10U)
-#define USB_HCSPARAMS_PPC_SHIFT                  (4U)
-#define USB_HCSPARAMS_PPC(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PPC_SHIFT)) & USB_HCSPARAMS_PPC_MASK)
-#define USB_HCSPARAMS_N_PCC_MASK                 (0xF00U)
-#define USB_HCSPARAMS_N_PCC_SHIFT                (8U)
-#define USB_HCSPARAMS_N_PCC(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PCC_SHIFT)) & USB_HCSPARAMS_N_PCC_MASK)
-#define USB_HCSPARAMS_N_CC_MASK                  (0xF000U)
-#define USB_HCSPARAMS_N_CC_SHIFT                 (12U)
-#define USB_HCSPARAMS_N_CC(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_CC_SHIFT)) & USB_HCSPARAMS_N_CC_MASK)
-#define USB_HCSPARAMS_PI_MASK                    (0x10000U)
-#define USB_HCSPARAMS_PI_SHIFT                   (16U)
-#define USB_HCSPARAMS_PI(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PI_SHIFT)) & USB_HCSPARAMS_PI_MASK)
-#define USB_HCSPARAMS_N_PTT_MASK                 (0xF00000U)
-#define USB_HCSPARAMS_N_PTT_SHIFT                (20U)
-#define USB_HCSPARAMS_N_PTT(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PTT_SHIFT)) & USB_HCSPARAMS_N_PTT_MASK)
-#define USB_HCSPARAMS_N_TT_MASK                  (0xF000000U)
-#define USB_HCSPARAMS_N_TT_SHIFT                 (24U)
-#define USB_HCSPARAMS_N_TT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_TT_SHIFT)) & USB_HCSPARAMS_N_TT_MASK)
+#define USB_HCSPARAMS_N_PORTS_MASK  (0xFU)
+#define USB_HCSPARAMS_N_PORTS_SHIFT (0U)
+#define USB_HCSPARAMS_N_PORTS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PORTS_SHIFT)) & USB_HCSPARAMS_N_PORTS_MASK)
+#define USB_HCSPARAMS_PPC_MASK    (0x10U)
+#define USB_HCSPARAMS_PPC_SHIFT   (4U)
+#define USB_HCSPARAMS_PPC(x)      (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PPC_SHIFT)) & USB_HCSPARAMS_PPC_MASK)
+#define USB_HCSPARAMS_N_PCC_MASK  (0xF00U)
+#define USB_HCSPARAMS_N_PCC_SHIFT (8U)
+#define USB_HCSPARAMS_N_PCC(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PCC_SHIFT)) & USB_HCSPARAMS_N_PCC_MASK)
+#define USB_HCSPARAMS_N_CC_MASK   (0xF000U)
+#define USB_HCSPARAMS_N_CC_SHIFT  (12U)
+#define USB_HCSPARAMS_N_CC(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_CC_SHIFT)) & USB_HCSPARAMS_N_CC_MASK)
+#define USB_HCSPARAMS_PI_MASK     (0x10000U)
+#define USB_HCSPARAMS_PI_SHIFT    (16U)
+#define USB_HCSPARAMS_PI(x)       (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PI_SHIFT)) & USB_HCSPARAMS_PI_MASK)
+#define USB_HCSPARAMS_N_PTT_MASK  (0xF00000U)
+#define USB_HCSPARAMS_N_PTT_SHIFT (20U)
+#define USB_HCSPARAMS_N_PTT(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PTT_SHIFT)) & USB_HCSPARAMS_N_PTT_MASK)
+#define USB_HCSPARAMS_N_TT_MASK   (0xF000000U)
+#define USB_HCSPARAMS_N_TT_SHIFT  (24U)
+#define USB_HCSPARAMS_N_TT(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_TT_SHIFT)) & USB_HCSPARAMS_N_TT_MASK)
 /*! @} */
 
 /*! @name HCCPARAMS - Host Controller Capability Parameters */
 /*! @{ */
-#define USB_HCCPARAMS_ADC_MASK                   (0x1U)
-#define USB_HCCPARAMS_ADC_SHIFT                  (0U)
-#define USB_HCCPARAMS_ADC(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ADC_SHIFT)) & USB_HCCPARAMS_ADC_MASK)
-#define USB_HCCPARAMS_PFL_MASK                   (0x2U)
-#define USB_HCCPARAMS_PFL_SHIFT                  (1U)
-#define USB_HCCPARAMS_PFL(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_PFL_SHIFT)) & USB_HCCPARAMS_PFL_MASK)
-#define USB_HCCPARAMS_ASP_MASK                   (0x4U)
-#define USB_HCCPARAMS_ASP_SHIFT                  (2U)
-#define USB_HCCPARAMS_ASP(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ASP_SHIFT)) & USB_HCCPARAMS_ASP_MASK)
-#define USB_HCCPARAMS_IST_MASK                   (0xF0U)
-#define USB_HCCPARAMS_IST_SHIFT                  (4U)
-#define USB_HCCPARAMS_IST(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_IST_SHIFT)) & USB_HCCPARAMS_IST_MASK)
-#define USB_HCCPARAMS_EECP_MASK                  (0xFF00U)
-#define USB_HCCPARAMS_EECP_SHIFT                 (8U)
-#define USB_HCCPARAMS_EECP(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_EECP_SHIFT)) & USB_HCCPARAMS_EECP_MASK)
+#define USB_HCCPARAMS_ADC_MASK   (0x1U)
+#define USB_HCCPARAMS_ADC_SHIFT  (0U)
+#define USB_HCCPARAMS_ADC(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ADC_SHIFT)) & USB_HCCPARAMS_ADC_MASK)
+#define USB_HCCPARAMS_PFL_MASK   (0x2U)
+#define USB_HCCPARAMS_PFL_SHIFT  (1U)
+#define USB_HCCPARAMS_PFL(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_PFL_SHIFT)) & USB_HCCPARAMS_PFL_MASK)
+#define USB_HCCPARAMS_ASP_MASK   (0x4U)
+#define USB_HCCPARAMS_ASP_SHIFT  (2U)
+#define USB_HCCPARAMS_ASP(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ASP_SHIFT)) & USB_HCCPARAMS_ASP_MASK)
+#define USB_HCCPARAMS_IST_MASK   (0xF0U)
+#define USB_HCCPARAMS_IST_SHIFT  (4U)
+#define USB_HCCPARAMS_IST(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_IST_SHIFT)) & USB_HCCPARAMS_IST_MASK)
+#define USB_HCCPARAMS_EECP_MASK  (0xFF00U)
+#define USB_HCCPARAMS_EECP_SHIFT (8U)
+#define USB_HCCPARAMS_EECP(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_EECP_SHIFT)) & USB_HCCPARAMS_EECP_MASK)
 /*! @} */
 
 /*! @name DCIVERSION - Device Controller Interface Version */
 /*! @{ */
-#define USB_DCIVERSION_DCIVERSION_MASK           (0xFFFFU)
-#define USB_DCIVERSION_DCIVERSION_SHIFT          (0U)
-#define USB_DCIVERSION_DCIVERSION(x)             (((uint16_t)(((uint16_t)(x)) << USB_DCIVERSION_DCIVERSION_SHIFT)) & USB_DCIVERSION_DCIVERSION_MASK)
+#define USB_DCIVERSION_DCIVERSION_MASK  (0xFFFFU)
+#define USB_DCIVERSION_DCIVERSION_SHIFT (0U)
+#define USB_DCIVERSION_DCIVERSION(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << USB_DCIVERSION_DCIVERSION_SHIFT)) & USB_DCIVERSION_DCIVERSION_MASK)
 /*! @} */
 
 /*! @name DCCPARAMS - Device Controller Capability Parameters */
 /*! @{ */
-#define USB_DCCPARAMS_DEN_MASK                   (0x1FU)
-#define USB_DCCPARAMS_DEN_SHIFT                  (0U)
-#define USB_DCCPARAMS_DEN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DEN_SHIFT)) & USB_DCCPARAMS_DEN_MASK)
-#define USB_DCCPARAMS_DC_MASK                    (0x80U)
-#define USB_DCCPARAMS_DC_SHIFT                   (7U)
-#define USB_DCCPARAMS_DC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DC_SHIFT)) & USB_DCCPARAMS_DC_MASK)
-#define USB_DCCPARAMS_HC_MASK                    (0x100U)
-#define USB_DCCPARAMS_HC_SHIFT                   (8U)
-#define USB_DCCPARAMS_HC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_HC_SHIFT)) & USB_DCCPARAMS_HC_MASK)
+#define USB_DCCPARAMS_DEN_MASK  (0x1FU)
+#define USB_DCCPARAMS_DEN_SHIFT (0U)
+#define USB_DCCPARAMS_DEN(x)    (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DEN_SHIFT)) & USB_DCCPARAMS_DEN_MASK)
+#define USB_DCCPARAMS_DC_MASK   (0x80U)
+#define USB_DCCPARAMS_DC_SHIFT  (7U)
+#define USB_DCCPARAMS_DC(x)     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DC_SHIFT)) & USB_DCCPARAMS_DC_MASK)
+#define USB_DCCPARAMS_HC_MASK   (0x100U)
+#define USB_DCCPARAMS_HC_SHIFT  (8U)
+#define USB_DCCPARAMS_HC(x)     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_HC_SHIFT)) & USB_DCCPARAMS_HC_MASK)
 /*! @} */
 
 /*! @name USBCMD - USB Command Register */
 /*! @{ */
-#define USB_USBCMD_RS_MASK                       (0x1U)
-#define USB_USBCMD_RS_SHIFT                      (0U)
-#define USB_USBCMD_RS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RS_SHIFT)) & USB_USBCMD_RS_MASK)
-#define USB_USBCMD_RST_MASK                      (0x2U)
-#define USB_USBCMD_RST_SHIFT                     (1U)
-#define USB_USBCMD_RST(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RST_SHIFT)) & USB_USBCMD_RST_MASK)
-#define USB_USBCMD_FS_1_MASK                     (0xCU)
-#define USB_USBCMD_FS_1_SHIFT                    (2U)
-#define USB_USBCMD_FS_1(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_1_SHIFT)) & USB_USBCMD_FS_1_MASK)
-#define USB_USBCMD_PSE_MASK                      (0x10U)
-#define USB_USBCMD_PSE_SHIFT                     (4U)
-#define USB_USBCMD_PSE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_PSE_SHIFT)) & USB_USBCMD_PSE_MASK)
-#define USB_USBCMD_ASE_MASK                      (0x20U)
-#define USB_USBCMD_ASE_SHIFT                     (5U)
-#define USB_USBCMD_ASE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASE_SHIFT)) & USB_USBCMD_ASE_MASK)
-#define USB_USBCMD_IAA_MASK                      (0x40U)
-#define USB_USBCMD_IAA_SHIFT                     (6U)
-#define USB_USBCMD_IAA(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_IAA_SHIFT)) & USB_USBCMD_IAA_MASK)
-#define USB_USBCMD_ASP_MASK                      (0x300U)
-#define USB_USBCMD_ASP_SHIFT                     (8U)
-#define USB_USBCMD_ASP(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASP_SHIFT)) & USB_USBCMD_ASP_MASK)
-#define USB_USBCMD_ASPE_MASK                     (0x800U)
-#define USB_USBCMD_ASPE_SHIFT                    (11U)
-#define USB_USBCMD_ASPE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASPE_SHIFT)) & USB_USBCMD_ASPE_MASK)
-#define USB_USBCMD_ATDTW_MASK                    (0x1000U)
-#define USB_USBCMD_ATDTW_SHIFT                   (12U)
-#define USB_USBCMD_ATDTW(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ATDTW_SHIFT)) & USB_USBCMD_ATDTW_MASK)
-#define USB_USBCMD_SUTW_MASK                     (0x2000U)
-#define USB_USBCMD_SUTW_SHIFT                    (13U)
-#define USB_USBCMD_SUTW(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_SUTW_SHIFT)) & USB_USBCMD_SUTW_MASK)
-#define USB_USBCMD_FS_2_MASK                     (0x8000U)
-#define USB_USBCMD_FS_2_SHIFT                    (15U)
-#define USB_USBCMD_FS_2(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_2_SHIFT)) & USB_USBCMD_FS_2_MASK)
-#define USB_USBCMD_ITC_MASK                      (0xFF0000U)
-#define USB_USBCMD_ITC_SHIFT                     (16U)
-#define USB_USBCMD_ITC(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ITC_SHIFT)) & USB_USBCMD_ITC_MASK)
+#define USB_USBCMD_RS_MASK     (0x1U)
+#define USB_USBCMD_RS_SHIFT    (0U)
+#define USB_USBCMD_RS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RS_SHIFT)) & USB_USBCMD_RS_MASK)
+#define USB_USBCMD_RST_MASK    (0x2U)
+#define USB_USBCMD_RST_SHIFT   (1U)
+#define USB_USBCMD_RST(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RST_SHIFT)) & USB_USBCMD_RST_MASK)
+#define USB_USBCMD_FS_1_MASK   (0xCU)
+#define USB_USBCMD_FS_1_SHIFT  (2U)
+#define USB_USBCMD_FS_1(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_1_SHIFT)) & USB_USBCMD_FS_1_MASK)
+#define USB_USBCMD_PSE_MASK    (0x10U)
+#define USB_USBCMD_PSE_SHIFT   (4U)
+#define USB_USBCMD_PSE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_PSE_SHIFT)) & USB_USBCMD_PSE_MASK)
+#define USB_USBCMD_ASE_MASK    (0x20U)
+#define USB_USBCMD_ASE_SHIFT   (5U)
+#define USB_USBCMD_ASE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASE_SHIFT)) & USB_USBCMD_ASE_MASK)
+#define USB_USBCMD_IAA_MASK    (0x40U)
+#define USB_USBCMD_IAA_SHIFT   (6U)
+#define USB_USBCMD_IAA(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_IAA_SHIFT)) & USB_USBCMD_IAA_MASK)
+#define USB_USBCMD_ASP_MASK    (0x300U)
+#define USB_USBCMD_ASP_SHIFT   (8U)
+#define USB_USBCMD_ASP(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASP_SHIFT)) & USB_USBCMD_ASP_MASK)
+#define USB_USBCMD_ASPE_MASK   (0x800U)
+#define USB_USBCMD_ASPE_SHIFT  (11U)
+#define USB_USBCMD_ASPE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASPE_SHIFT)) & USB_USBCMD_ASPE_MASK)
+#define USB_USBCMD_ATDTW_MASK  (0x1000U)
+#define USB_USBCMD_ATDTW_SHIFT (12U)
+#define USB_USBCMD_ATDTW(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ATDTW_SHIFT)) & USB_USBCMD_ATDTW_MASK)
+#define USB_USBCMD_SUTW_MASK   (0x2000U)
+#define USB_USBCMD_SUTW_SHIFT  (13U)
+#define USB_USBCMD_SUTW(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_SUTW_SHIFT)) & USB_USBCMD_SUTW_MASK)
+#define USB_USBCMD_FS_2_MASK   (0x8000U)
+#define USB_USBCMD_FS_2_SHIFT  (15U)
+#define USB_USBCMD_FS_2(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_2_SHIFT)) & USB_USBCMD_FS_2_MASK)
+#define USB_USBCMD_ITC_MASK    (0xFF0000U)
+#define USB_USBCMD_ITC_SHIFT   (16U)
+#define USB_USBCMD_ITC(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ITC_SHIFT)) & USB_USBCMD_ITC_MASK)
 /*! @} */
 
 /*! @name USBSTS - USB Status Register */
 /*! @{ */
-#define USB_USBSTS_UI_MASK                       (0x1U)
-#define USB_USBSTS_UI_SHIFT                      (0U)
-#define USB_USBSTS_UI(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UI_SHIFT)) & USB_USBSTS_UI_MASK)
-#define USB_USBSTS_UEI_MASK                      (0x2U)
-#define USB_USBSTS_UEI_SHIFT                     (1U)
-#define USB_USBSTS_UEI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UEI_SHIFT)) & USB_USBSTS_UEI_MASK)
-#define USB_USBSTS_PCI_MASK                      (0x4U)
-#define USB_USBSTS_PCI_SHIFT                     (2U)
-#define USB_USBSTS_PCI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PCI_SHIFT)) & USB_USBSTS_PCI_MASK)
-#define USB_USBSTS_FRI_MASK                      (0x8U)
-#define USB_USBSTS_FRI_SHIFT                     (3U)
-#define USB_USBSTS_FRI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_FRI_SHIFT)) & USB_USBSTS_FRI_MASK)
-#define USB_USBSTS_SEI_MASK                      (0x10U)
-#define USB_USBSTS_SEI_SHIFT                     (4U)
-#define USB_USBSTS_SEI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SEI_SHIFT)) & USB_USBSTS_SEI_MASK)
-#define USB_USBSTS_AAI_MASK                      (0x20U)
-#define USB_USBSTS_AAI_SHIFT                     (5U)
-#define USB_USBSTS_AAI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AAI_SHIFT)) & USB_USBSTS_AAI_MASK)
-#define USB_USBSTS_URI_MASK                      (0x40U)
-#define USB_USBSTS_URI_SHIFT                     (6U)
-#define USB_USBSTS_URI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_URI_SHIFT)) & USB_USBSTS_URI_MASK)
-#define USB_USBSTS_SRI_MASK                      (0x80U)
-#define USB_USBSTS_SRI_SHIFT                     (7U)
-#define USB_USBSTS_SRI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SRI_SHIFT)) & USB_USBSTS_SRI_MASK)
-#define USB_USBSTS_SLI_MASK                      (0x100U)
-#define USB_USBSTS_SLI_SHIFT                     (8U)
-#define USB_USBSTS_SLI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SLI_SHIFT)) & USB_USBSTS_SLI_MASK)
-#define USB_USBSTS_ULPII_MASK                    (0x400U)
-#define USB_USBSTS_ULPII_SHIFT                   (10U)
-#define USB_USBSTS_ULPII(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_ULPII_SHIFT)) & USB_USBSTS_ULPII_MASK)
-#define USB_USBSTS_HCH_MASK                      (0x1000U)
-#define USB_USBSTS_HCH_SHIFT                     (12U)
-#define USB_USBSTS_HCH(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_HCH_SHIFT)) & USB_USBSTS_HCH_MASK)
-#define USB_USBSTS_RCL_MASK                      (0x2000U)
-#define USB_USBSTS_RCL_SHIFT                     (13U)
-#define USB_USBSTS_RCL(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_RCL_SHIFT)) & USB_USBSTS_RCL_MASK)
-#define USB_USBSTS_PS_MASK                       (0x4000U)
-#define USB_USBSTS_PS_SHIFT                      (14U)
-#define USB_USBSTS_PS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PS_SHIFT)) & USB_USBSTS_PS_MASK)
-#define USB_USBSTS_AS_MASK                       (0x8000U)
-#define USB_USBSTS_AS_SHIFT                      (15U)
-#define USB_USBSTS_AS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AS_SHIFT)) & USB_USBSTS_AS_MASK)
-#define USB_USBSTS_NAKI_MASK                     (0x10000U)
-#define USB_USBSTS_NAKI_SHIFT                    (16U)
-#define USB_USBSTS_NAKI(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_NAKI_SHIFT)) & USB_USBSTS_NAKI_MASK)
-#define USB_USBSTS_TI0_MASK                      (0x1000000U)
-#define USB_USBSTS_TI0_SHIFT                     (24U)
-#define USB_USBSTS_TI0(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI0_SHIFT)) & USB_USBSTS_TI0_MASK)
-#define USB_USBSTS_TI1_MASK                      (0x2000000U)
-#define USB_USBSTS_TI1_SHIFT                     (25U)
-#define USB_USBSTS_TI1(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI1_SHIFT)) & USB_USBSTS_TI1_MASK)
+#define USB_USBSTS_UI_MASK     (0x1U)
+#define USB_USBSTS_UI_SHIFT    (0U)
+#define USB_USBSTS_UI(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UI_SHIFT)) & USB_USBSTS_UI_MASK)
+#define USB_USBSTS_UEI_MASK    (0x2U)
+#define USB_USBSTS_UEI_SHIFT   (1U)
+#define USB_USBSTS_UEI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UEI_SHIFT)) & USB_USBSTS_UEI_MASK)
+#define USB_USBSTS_PCI_MASK    (0x4U)
+#define USB_USBSTS_PCI_SHIFT   (2U)
+#define USB_USBSTS_PCI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PCI_SHIFT)) & USB_USBSTS_PCI_MASK)
+#define USB_USBSTS_FRI_MASK    (0x8U)
+#define USB_USBSTS_FRI_SHIFT   (3U)
+#define USB_USBSTS_FRI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_FRI_SHIFT)) & USB_USBSTS_FRI_MASK)
+#define USB_USBSTS_SEI_MASK    (0x10U)
+#define USB_USBSTS_SEI_SHIFT   (4U)
+#define USB_USBSTS_SEI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SEI_SHIFT)) & USB_USBSTS_SEI_MASK)
+#define USB_USBSTS_AAI_MASK    (0x20U)
+#define USB_USBSTS_AAI_SHIFT   (5U)
+#define USB_USBSTS_AAI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AAI_SHIFT)) & USB_USBSTS_AAI_MASK)
+#define USB_USBSTS_URI_MASK    (0x40U)
+#define USB_USBSTS_URI_SHIFT   (6U)
+#define USB_USBSTS_URI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_URI_SHIFT)) & USB_USBSTS_URI_MASK)
+#define USB_USBSTS_SRI_MASK    (0x80U)
+#define USB_USBSTS_SRI_SHIFT   (7U)
+#define USB_USBSTS_SRI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SRI_SHIFT)) & USB_USBSTS_SRI_MASK)
+#define USB_USBSTS_SLI_MASK    (0x100U)
+#define USB_USBSTS_SLI_SHIFT   (8U)
+#define USB_USBSTS_SLI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SLI_SHIFT)) & USB_USBSTS_SLI_MASK)
+#define USB_USBSTS_ULPII_MASK  (0x400U)
+#define USB_USBSTS_ULPII_SHIFT (10U)
+#define USB_USBSTS_ULPII(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_ULPII_SHIFT)) & USB_USBSTS_ULPII_MASK)
+#define USB_USBSTS_HCH_MASK    (0x1000U)
+#define USB_USBSTS_HCH_SHIFT   (12U)
+#define USB_USBSTS_HCH(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_HCH_SHIFT)) & USB_USBSTS_HCH_MASK)
+#define USB_USBSTS_RCL_MASK    (0x2000U)
+#define USB_USBSTS_RCL_SHIFT   (13U)
+#define USB_USBSTS_RCL(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_RCL_SHIFT)) & USB_USBSTS_RCL_MASK)
+#define USB_USBSTS_PS_MASK     (0x4000U)
+#define USB_USBSTS_PS_SHIFT    (14U)
+#define USB_USBSTS_PS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PS_SHIFT)) & USB_USBSTS_PS_MASK)
+#define USB_USBSTS_AS_MASK     (0x8000U)
+#define USB_USBSTS_AS_SHIFT    (15U)
+#define USB_USBSTS_AS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AS_SHIFT)) & USB_USBSTS_AS_MASK)
+#define USB_USBSTS_NAKI_MASK   (0x10000U)
+#define USB_USBSTS_NAKI_SHIFT  (16U)
+#define USB_USBSTS_NAKI(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_NAKI_SHIFT)) & USB_USBSTS_NAKI_MASK)
+#define USB_USBSTS_TI0_MASK    (0x1000000U)
+#define USB_USBSTS_TI0_SHIFT   (24U)
+#define USB_USBSTS_TI0(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI0_SHIFT)) & USB_USBSTS_TI0_MASK)
+#define USB_USBSTS_TI1_MASK    (0x2000000U)
+#define USB_USBSTS_TI1_SHIFT   (25U)
+#define USB_USBSTS_TI1(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI1_SHIFT)) & USB_USBSTS_TI1_MASK)
 /*! @} */
 
 /*! @name USBINTR - Interrupt Enable Register */
 /*! @{ */
-#define USB_USBINTR_UE_MASK                      (0x1U)
-#define USB_USBINTR_UE_SHIFT                     (0U)
-#define USB_USBINTR_UE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UE_SHIFT)) & USB_USBINTR_UE_MASK)
-#define USB_USBINTR_UEE_MASK                     (0x2U)
-#define USB_USBINTR_UEE_SHIFT                    (1U)
-#define USB_USBINTR_UEE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UEE_SHIFT)) & USB_USBINTR_UEE_MASK)
-#define USB_USBINTR_PCE_MASK                     (0x4U)
-#define USB_USBINTR_PCE_SHIFT                    (2U)
-#define USB_USBINTR_PCE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_PCE_SHIFT)) & USB_USBINTR_PCE_MASK)
-#define USB_USBINTR_FRE_MASK                     (0x8U)
-#define USB_USBINTR_FRE_SHIFT                    (3U)
-#define USB_USBINTR_FRE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_FRE_SHIFT)) & USB_USBINTR_FRE_MASK)
-#define USB_USBINTR_SEE_MASK                     (0x10U)
-#define USB_USBINTR_SEE_SHIFT                    (4U)
-#define USB_USBINTR_SEE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SEE_SHIFT)) & USB_USBINTR_SEE_MASK)
-#define USB_USBINTR_AAE_MASK                     (0x20U)
-#define USB_USBINTR_AAE_SHIFT                    (5U)
-#define USB_USBINTR_AAE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_AAE_SHIFT)) & USB_USBINTR_AAE_MASK)
-#define USB_USBINTR_URE_MASK                     (0x40U)
-#define USB_USBINTR_URE_SHIFT                    (6U)
-#define USB_USBINTR_URE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_URE_SHIFT)) & USB_USBINTR_URE_MASK)
-#define USB_USBINTR_SRE_MASK                     (0x80U)
-#define USB_USBINTR_SRE_SHIFT                    (7U)
-#define USB_USBINTR_SRE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SRE_SHIFT)) & USB_USBINTR_SRE_MASK)
-#define USB_USBINTR_SLE_MASK                     (0x100U)
-#define USB_USBINTR_SLE_SHIFT                    (8U)
-#define USB_USBINTR_SLE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SLE_SHIFT)) & USB_USBINTR_SLE_MASK)
-#define USB_USBINTR_ULPIE_MASK                   (0x400U)
-#define USB_USBINTR_ULPIE_SHIFT                  (10U)
-#define USB_USBINTR_ULPIE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_ULPIE_SHIFT)) & USB_USBINTR_ULPIE_MASK)
-#define USB_USBINTR_NAKE_MASK                    (0x10000U)
-#define USB_USBINTR_NAKE_SHIFT                   (16U)
-#define USB_USBINTR_NAKE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_NAKE_SHIFT)) & USB_USBINTR_NAKE_MASK)
-#define USB_USBINTR_UAIE_MASK                    (0x40000U)
-#define USB_USBINTR_UAIE_SHIFT                   (18U)
-#define USB_USBINTR_UAIE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UAIE_SHIFT)) & USB_USBINTR_UAIE_MASK)
-#define USB_USBINTR_UPIE_MASK                    (0x80000U)
-#define USB_USBINTR_UPIE_SHIFT                   (19U)
-#define USB_USBINTR_UPIE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UPIE_SHIFT)) & USB_USBINTR_UPIE_MASK)
-#define USB_USBINTR_TIE0_MASK                    (0x1000000U)
-#define USB_USBINTR_TIE0_SHIFT                   (24U)
-#define USB_USBINTR_TIE0(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE0_SHIFT)) & USB_USBINTR_TIE0_MASK)
-#define USB_USBINTR_TIE1_MASK                    (0x2000000U)
-#define USB_USBINTR_TIE1_SHIFT                   (25U)
-#define USB_USBINTR_TIE1(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE1_SHIFT)) & USB_USBINTR_TIE1_MASK)
+#define USB_USBINTR_UE_MASK     (0x1U)
+#define USB_USBINTR_UE_SHIFT    (0U)
+#define USB_USBINTR_UE(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UE_SHIFT)) & USB_USBINTR_UE_MASK)
+#define USB_USBINTR_UEE_MASK    (0x2U)
+#define USB_USBINTR_UEE_SHIFT   (1U)
+#define USB_USBINTR_UEE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UEE_SHIFT)) & USB_USBINTR_UEE_MASK)
+#define USB_USBINTR_PCE_MASK    (0x4U)
+#define USB_USBINTR_PCE_SHIFT   (2U)
+#define USB_USBINTR_PCE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_PCE_SHIFT)) & USB_USBINTR_PCE_MASK)
+#define USB_USBINTR_FRE_MASK    (0x8U)
+#define USB_USBINTR_FRE_SHIFT   (3U)
+#define USB_USBINTR_FRE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_FRE_SHIFT)) & USB_USBINTR_FRE_MASK)
+#define USB_USBINTR_SEE_MASK    (0x10U)
+#define USB_USBINTR_SEE_SHIFT   (4U)
+#define USB_USBINTR_SEE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SEE_SHIFT)) & USB_USBINTR_SEE_MASK)
+#define USB_USBINTR_AAE_MASK    (0x20U)
+#define USB_USBINTR_AAE_SHIFT   (5U)
+#define USB_USBINTR_AAE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_AAE_SHIFT)) & USB_USBINTR_AAE_MASK)
+#define USB_USBINTR_URE_MASK    (0x40U)
+#define USB_USBINTR_URE_SHIFT   (6U)
+#define USB_USBINTR_URE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_URE_SHIFT)) & USB_USBINTR_URE_MASK)
+#define USB_USBINTR_SRE_MASK    (0x80U)
+#define USB_USBINTR_SRE_SHIFT   (7U)
+#define USB_USBINTR_SRE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SRE_SHIFT)) & USB_USBINTR_SRE_MASK)
+#define USB_USBINTR_SLE_MASK    (0x100U)
+#define USB_USBINTR_SLE_SHIFT   (8U)
+#define USB_USBINTR_SLE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SLE_SHIFT)) & USB_USBINTR_SLE_MASK)
+#define USB_USBINTR_ULPIE_MASK  (0x400U)
+#define USB_USBINTR_ULPIE_SHIFT (10U)
+#define USB_USBINTR_ULPIE(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_ULPIE_SHIFT)) & USB_USBINTR_ULPIE_MASK)
+#define USB_USBINTR_NAKE_MASK   (0x10000U)
+#define USB_USBINTR_NAKE_SHIFT  (16U)
+#define USB_USBINTR_NAKE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_NAKE_SHIFT)) & USB_USBINTR_NAKE_MASK)
+#define USB_USBINTR_UAIE_MASK   (0x40000U)
+#define USB_USBINTR_UAIE_SHIFT  (18U)
+#define USB_USBINTR_UAIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UAIE_SHIFT)) & USB_USBINTR_UAIE_MASK)
+#define USB_USBINTR_UPIE_MASK   (0x80000U)
+#define USB_USBINTR_UPIE_SHIFT  (19U)
+#define USB_USBINTR_UPIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UPIE_SHIFT)) & USB_USBINTR_UPIE_MASK)
+#define USB_USBINTR_TIE0_MASK   (0x1000000U)
+#define USB_USBINTR_TIE0_SHIFT  (24U)
+#define USB_USBINTR_TIE0(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE0_SHIFT)) & USB_USBINTR_TIE0_MASK)
+#define USB_USBINTR_TIE1_MASK   (0x2000000U)
+#define USB_USBINTR_TIE1_SHIFT  (25U)
+#define USB_USBINTR_TIE1(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE1_SHIFT)) & USB_USBINTR_TIE1_MASK)
 /*! @} */
 
 /*! @name FRINDEX - USB Frame Index */
 /*! @{ */
-#define USB_FRINDEX_FRINDEX_MASK                 (0x3FFFU)
-#define USB_FRINDEX_FRINDEX_SHIFT                (0U)
-#define USB_FRINDEX_FRINDEX(x)                   (((uint32_t)(((uint32_t)(x)) << USB_FRINDEX_FRINDEX_SHIFT)) & USB_FRINDEX_FRINDEX_MASK)
+#define USB_FRINDEX_FRINDEX_MASK  (0x3FFFU)
+#define USB_FRINDEX_FRINDEX_SHIFT (0U)
+#define USB_FRINDEX_FRINDEX(x)    (((uint32_t)(((uint32_t)(x)) << USB_FRINDEX_FRINDEX_SHIFT)) & USB_FRINDEX_FRINDEX_MASK)
 /*! @} */
 
 /*! @name DEVICEADDR - Device Address */
 /*! @{ */
-#define USB_DEVICEADDR_USBADRA_MASK              (0x1000000U)
-#define USB_DEVICEADDR_USBADRA_SHIFT             (24U)
-#define USB_DEVICEADDR_USBADRA(x)                (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADRA_SHIFT)) & USB_DEVICEADDR_USBADRA_MASK)
-#define USB_DEVICEADDR_USBADR_MASK               (0xFE000000U)
-#define USB_DEVICEADDR_USBADR_SHIFT              (25U)
-#define USB_DEVICEADDR_USBADR(x)                 (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADR_SHIFT)) & USB_DEVICEADDR_USBADR_MASK)
+#define USB_DEVICEADDR_USBADRA_MASK  (0x1000000U)
+#define USB_DEVICEADDR_USBADRA_SHIFT (24U)
+#define USB_DEVICEADDR_USBADRA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADRA_SHIFT)) & USB_DEVICEADDR_USBADRA_MASK)
+#define USB_DEVICEADDR_USBADR_MASK  (0xFE000000U)
+#define USB_DEVICEADDR_USBADR_SHIFT (25U)
+#define USB_DEVICEADDR_USBADR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADR_SHIFT)) & USB_DEVICEADDR_USBADR_MASK)
 /*! @} */
 
 /*! @name PERIODICLISTBASE - Frame List Base Address */
 /*! @{ */
-#define USB_PERIODICLISTBASE_BASEADR_MASK        (0xFFFFF000U)
-#define USB_PERIODICLISTBASE_BASEADR_SHIFT       (12U)
-#define USB_PERIODICLISTBASE_BASEADR(x)          (((uint32_t)(((uint32_t)(x)) << USB_PERIODICLISTBASE_BASEADR_SHIFT)) & USB_PERIODICLISTBASE_BASEADR_MASK)
+#define USB_PERIODICLISTBASE_BASEADR_MASK  (0xFFFFF000U)
+#define USB_PERIODICLISTBASE_BASEADR_SHIFT (12U)
+#define USB_PERIODICLISTBASE_BASEADR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_PERIODICLISTBASE_BASEADR_SHIFT)) & USB_PERIODICLISTBASE_BASEADR_MASK)
 /*! @} */
 
 /*! @name ASYNCLISTADDR - Next Asynch. Address */
 /*! @{ */
-#define USB_ASYNCLISTADDR_ASYBASE_MASK           (0xFFFFFFE0U)
-#define USB_ASYNCLISTADDR_ASYBASE_SHIFT          (5U)
-#define USB_ASYNCLISTADDR_ASYBASE(x)             (((uint32_t)(((uint32_t)(x)) << USB_ASYNCLISTADDR_ASYBASE_SHIFT)) & USB_ASYNCLISTADDR_ASYBASE_MASK)
+#define USB_ASYNCLISTADDR_ASYBASE_MASK  (0xFFFFFFE0U)
+#define USB_ASYNCLISTADDR_ASYBASE_SHIFT (5U)
+#define USB_ASYNCLISTADDR_ASYBASE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ASYNCLISTADDR_ASYBASE_SHIFT)) & USB_ASYNCLISTADDR_ASYBASE_MASK)
 /*! @} */
 
 /*! @name ENDPTLISTADDR - Endpoint List Address */
 /*! @{ */
-#define USB_ENDPTLISTADDR_EPBASE_MASK            (0xFFFFF800U)
-#define USB_ENDPTLISTADDR_EPBASE_SHIFT           (11U)
-#define USB_ENDPTLISTADDR_EPBASE(x)              (((uint32_t)(((uint32_t)(x)) << USB_ENDPTLISTADDR_EPBASE_SHIFT)) & USB_ENDPTLISTADDR_EPBASE_MASK)
+#define USB_ENDPTLISTADDR_EPBASE_MASK  (0xFFFFF800U)
+#define USB_ENDPTLISTADDR_EPBASE_SHIFT (11U)
+#define USB_ENDPTLISTADDR_EPBASE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTLISTADDR_EPBASE_SHIFT)) & USB_ENDPTLISTADDR_EPBASE_MASK)
 /*! @} */
 
 /*! @name BURSTSIZE - Programmable Burst Size */
 /*! @{ */
-#define USB_BURSTSIZE_RXPBURST_MASK              (0xFFU)
-#define USB_BURSTSIZE_RXPBURST_SHIFT             (0U)
-#define USB_BURSTSIZE_RXPBURST(x)                (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_RXPBURST_SHIFT)) & USB_BURSTSIZE_RXPBURST_MASK)
-#define USB_BURSTSIZE_TXPBURST_MASK              (0x1FF00U)
-#define USB_BURSTSIZE_TXPBURST_SHIFT             (8U)
-#define USB_BURSTSIZE_TXPBURST(x)                (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_TXPBURST_SHIFT)) & USB_BURSTSIZE_TXPBURST_MASK)
+#define USB_BURSTSIZE_RXPBURST_MASK  (0xFFU)
+#define USB_BURSTSIZE_RXPBURST_SHIFT (0U)
+#define USB_BURSTSIZE_RXPBURST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_RXPBURST_SHIFT)) & USB_BURSTSIZE_RXPBURST_MASK)
+#define USB_BURSTSIZE_TXPBURST_MASK  (0x1FF00U)
+#define USB_BURSTSIZE_TXPBURST_SHIFT (8U)
+#define USB_BURSTSIZE_TXPBURST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_TXPBURST_SHIFT)) & USB_BURSTSIZE_TXPBURST_MASK)
 /*! @} */
 
 /*! @name TXFILLTUNING - TX FIFO Fill Tuning */
 /*! @{ */
-#define USB_TXFILLTUNING_TXSCHOH_MASK            (0xFFU)
-#define USB_TXFILLTUNING_TXSCHOH_SHIFT           (0U)
-#define USB_TXFILLTUNING_TXSCHOH(x)              (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHOH_SHIFT)) & USB_TXFILLTUNING_TXSCHOH_MASK)
-#define USB_TXFILLTUNING_TXSCHHEALTH_MASK        (0x1F00U)
-#define USB_TXFILLTUNING_TXSCHHEALTH_SHIFT       (8U)
-#define USB_TXFILLTUNING_TXSCHHEALTH(x)          (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHHEALTH_SHIFT)) & USB_TXFILLTUNING_TXSCHHEALTH_MASK)
-#define USB_TXFILLTUNING_TXFIFOTHRES_MASK        (0x3F0000U)
-#define USB_TXFILLTUNING_TXFIFOTHRES_SHIFT       (16U)
-#define USB_TXFILLTUNING_TXFIFOTHRES(x)          (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXFIFOTHRES_SHIFT)) & USB_TXFILLTUNING_TXFIFOTHRES_MASK)
+#define USB_TXFILLTUNING_TXSCHOH_MASK  (0xFFU)
+#define USB_TXFILLTUNING_TXSCHOH_SHIFT (0U)
+#define USB_TXFILLTUNING_TXSCHOH(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHOH_SHIFT)) & USB_TXFILLTUNING_TXSCHOH_MASK)
+#define USB_TXFILLTUNING_TXSCHHEALTH_MASK  (0x1F00U)
+#define USB_TXFILLTUNING_TXSCHHEALTH_SHIFT (8U)
+#define USB_TXFILLTUNING_TXSCHHEALTH(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHHEALTH_SHIFT)) & USB_TXFILLTUNING_TXSCHHEALTH_MASK)
+#define USB_TXFILLTUNING_TXFIFOTHRES_MASK  (0x3F0000U)
+#define USB_TXFILLTUNING_TXFIFOTHRES_SHIFT (16U)
+#define USB_TXFILLTUNING_TXFIFOTHRES(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXFIFOTHRES_SHIFT)) & USB_TXFILLTUNING_TXFIFOTHRES_MASK)
 /*! @} */
 
 /*! @name ENDPTNAK - Endpoint NAK */
 /*! @{ */
-#define USB_ENDPTNAK_EPRN_MASK                   (0xFFU)
-#define USB_ENDPTNAK_EPRN_SHIFT                  (0U)
-#define USB_ENDPTNAK_EPRN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPRN_SHIFT)) & USB_ENDPTNAK_EPRN_MASK)
-#define USB_ENDPTNAK_EPTN_MASK                   (0xFF0000U)
-#define USB_ENDPTNAK_EPTN_SHIFT                  (16U)
-#define USB_ENDPTNAK_EPTN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPTN_SHIFT)) & USB_ENDPTNAK_EPTN_MASK)
+#define USB_ENDPTNAK_EPRN_MASK  (0xFFU)
+#define USB_ENDPTNAK_EPRN_SHIFT (0U)
+#define USB_ENDPTNAK_EPRN(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPRN_SHIFT)) & USB_ENDPTNAK_EPRN_MASK)
+#define USB_ENDPTNAK_EPTN_MASK  (0xFF0000U)
+#define USB_ENDPTNAK_EPTN_SHIFT (16U)
+#define USB_ENDPTNAK_EPTN(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPTN_SHIFT)) & USB_ENDPTNAK_EPTN_MASK)
 /*! @} */
 
 /*! @name ENDPTNAKEN - Endpoint NAK Enable */
 /*! @{ */
-#define USB_ENDPTNAKEN_EPRNE_MASK                (0xFFU)
-#define USB_ENDPTNAKEN_EPRNE_SHIFT               (0U)
-#define USB_ENDPTNAKEN_EPRNE(x)                  (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPRNE_SHIFT)) & USB_ENDPTNAKEN_EPRNE_MASK)
-#define USB_ENDPTNAKEN_EPTNE_MASK                (0xFF0000U)
-#define USB_ENDPTNAKEN_EPTNE_SHIFT               (16U)
-#define USB_ENDPTNAKEN_EPTNE(x)                  (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPTNE_SHIFT)) & USB_ENDPTNAKEN_EPTNE_MASK)
+#define USB_ENDPTNAKEN_EPRNE_MASK  (0xFFU)
+#define USB_ENDPTNAKEN_EPRNE_SHIFT (0U)
+#define USB_ENDPTNAKEN_EPRNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPRNE_SHIFT)) & USB_ENDPTNAKEN_EPRNE_MASK)
+#define USB_ENDPTNAKEN_EPTNE_MASK  (0xFF0000U)
+#define USB_ENDPTNAKEN_EPTNE_SHIFT (16U)
+#define USB_ENDPTNAKEN_EPTNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPTNE_SHIFT)) & USB_ENDPTNAKEN_EPTNE_MASK)
 /*! @} */
 
 /*! @name CONFIGFLAG - Configure Flag Register */
 /*! @{ */
-#define USB_CONFIGFLAG_CF_MASK                   (0x1U)
-#define USB_CONFIGFLAG_CF_SHIFT                  (0U)
-#define USB_CONFIGFLAG_CF(x)                     (((uint32_t)(((uint32_t)(x)) << USB_CONFIGFLAG_CF_SHIFT)) & USB_CONFIGFLAG_CF_MASK)
+#define USB_CONFIGFLAG_CF_MASK  (0x1U)
+#define USB_CONFIGFLAG_CF_SHIFT (0U)
+#define USB_CONFIGFLAG_CF(x)    (((uint32_t)(((uint32_t)(x)) << USB_CONFIGFLAG_CF_SHIFT)) & USB_CONFIGFLAG_CF_MASK)
 /*! @} */
 
 /*! @name PORTSC1 - Port Status & Control */
 /*! @{ */
-#define USB_PORTSC1_CCS_MASK                     (0x1U)
-#define USB_PORTSC1_CCS_SHIFT                    (0U)
-#define USB_PORTSC1_CCS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CCS_SHIFT)) & USB_PORTSC1_CCS_MASK)
-#define USB_PORTSC1_CSC_MASK                     (0x2U)
-#define USB_PORTSC1_CSC_SHIFT                    (1U)
-#define USB_PORTSC1_CSC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CSC_SHIFT)) & USB_PORTSC1_CSC_MASK)
-#define USB_PORTSC1_PE_MASK                      (0x4U)
-#define USB_PORTSC1_PE_SHIFT                     (2U)
-#define USB_PORTSC1_PE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PE_SHIFT)) & USB_PORTSC1_PE_MASK)
-#define USB_PORTSC1_PEC_MASK                     (0x8U)
-#define USB_PORTSC1_PEC_SHIFT                    (3U)
-#define USB_PORTSC1_PEC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PEC_SHIFT)) & USB_PORTSC1_PEC_MASK)
-#define USB_PORTSC1_OCA_MASK                     (0x10U)
-#define USB_PORTSC1_OCA_SHIFT                    (4U)
-#define USB_PORTSC1_OCA(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCA_SHIFT)) & USB_PORTSC1_OCA_MASK)
-#define USB_PORTSC1_OCC_MASK                     (0x20U)
-#define USB_PORTSC1_OCC_SHIFT                    (5U)
-#define USB_PORTSC1_OCC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCC_SHIFT)) & USB_PORTSC1_OCC_MASK)
-#define USB_PORTSC1_FPR_MASK                     (0x40U)
-#define USB_PORTSC1_FPR_SHIFT                    (6U)
-#define USB_PORTSC1_FPR(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_FPR_SHIFT)) & USB_PORTSC1_FPR_MASK)
-#define USB_PORTSC1_SUSP_MASK                    (0x80U)
-#define USB_PORTSC1_SUSP_SHIFT                   (7U)
-#define USB_PORTSC1_SUSP(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_SUSP_SHIFT)) & USB_PORTSC1_SUSP_MASK)
-#define USB_PORTSC1_PR_MASK                      (0x100U)
-#define USB_PORTSC1_PR_SHIFT                     (8U)
-#define USB_PORTSC1_PR(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PR_SHIFT)) & USB_PORTSC1_PR_MASK)
-#define USB_PORTSC1_HSP_MASK                     (0x200U)
-#define USB_PORTSC1_HSP_SHIFT                    (9U)
-#define USB_PORTSC1_HSP(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_HSP_SHIFT)) & USB_PORTSC1_HSP_MASK)
-#define USB_PORTSC1_LS_MASK                      (0xC00U)
-#define USB_PORTSC1_LS_SHIFT                     (10U)
-#define USB_PORTSC1_LS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_LS_SHIFT)) & USB_PORTSC1_LS_MASK)
-#define USB_PORTSC1_PP_MASK                      (0x1000U)
-#define USB_PORTSC1_PP_SHIFT                     (12U)
-#define USB_PORTSC1_PP(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PP_SHIFT)) & USB_PORTSC1_PP_MASK)
-#define USB_PORTSC1_PO_MASK                      (0x2000U)
-#define USB_PORTSC1_PO_SHIFT                     (13U)
-#define USB_PORTSC1_PO(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PO_SHIFT)) & USB_PORTSC1_PO_MASK)
-#define USB_PORTSC1_PIC_MASK                     (0xC000U)
-#define USB_PORTSC1_PIC_SHIFT                    (14U)
-#define USB_PORTSC1_PIC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PIC_SHIFT)) & USB_PORTSC1_PIC_MASK)
-#define USB_PORTSC1_PTC_MASK                     (0xF0000U)
-#define USB_PORTSC1_PTC_SHIFT                    (16U)
-#define USB_PORTSC1_PTC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTC_SHIFT)) & USB_PORTSC1_PTC_MASK)
-#define USB_PORTSC1_WKCN_MASK                    (0x100000U)
-#define USB_PORTSC1_WKCN_SHIFT                   (20U)
-#define USB_PORTSC1_WKCN(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKCN_SHIFT)) & USB_PORTSC1_WKCN_MASK)
-#define USB_PORTSC1_WKDC_MASK                    (0x200000U)
-#define USB_PORTSC1_WKDC_SHIFT                   (21U)
-#define USB_PORTSC1_WKDC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKDC_SHIFT)) & USB_PORTSC1_WKDC_MASK)
-#define USB_PORTSC1_WKOC_MASK                    (0x400000U)
-#define USB_PORTSC1_WKOC_SHIFT                   (22U)
-#define USB_PORTSC1_WKOC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKOC_SHIFT)) & USB_PORTSC1_WKOC_MASK)
-#define USB_PORTSC1_PHCD_MASK                    (0x800000U)
-#define USB_PORTSC1_PHCD_SHIFT                   (23U)
-#define USB_PORTSC1_PHCD(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PHCD_SHIFT)) & USB_PORTSC1_PHCD_MASK)
-#define USB_PORTSC1_PFSC_MASK                    (0x1000000U)
-#define USB_PORTSC1_PFSC_SHIFT                   (24U)
-#define USB_PORTSC1_PFSC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PFSC_SHIFT)) & USB_PORTSC1_PFSC_MASK)
-#define USB_PORTSC1_PTS_2_MASK                   (0x2000000U)
-#define USB_PORTSC1_PTS_2_SHIFT                  (25U)
-#define USB_PORTSC1_PTS_2(x)                     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_2_SHIFT)) & USB_PORTSC1_PTS_2_MASK)
-#define USB_PORTSC1_PSPD_MASK                    (0xC000000U)
-#define USB_PORTSC1_PSPD_SHIFT                   (26U)
-#define USB_PORTSC1_PSPD(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PSPD_SHIFT)) & USB_PORTSC1_PSPD_MASK)
-#define USB_PORTSC1_PTW_MASK                     (0x10000000U)
-#define USB_PORTSC1_PTW_SHIFT                    (28U)
-#define USB_PORTSC1_PTW(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTW_SHIFT)) & USB_PORTSC1_PTW_MASK)
-#define USB_PORTSC1_STS_MASK                     (0x20000000U)
-#define USB_PORTSC1_STS_SHIFT                    (29U)
-#define USB_PORTSC1_STS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_STS_SHIFT)) & USB_PORTSC1_STS_MASK)
-#define USB_PORTSC1_PTS_1_MASK                   (0xC0000000U)
-#define USB_PORTSC1_PTS_1_SHIFT                  (30U)
-#define USB_PORTSC1_PTS_1(x)                     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_1_SHIFT)) & USB_PORTSC1_PTS_1_MASK)
+#define USB_PORTSC1_CCS_MASK    (0x1U)
+#define USB_PORTSC1_CCS_SHIFT   (0U)
+#define USB_PORTSC1_CCS(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CCS_SHIFT)) & USB_PORTSC1_CCS_MASK)
+#define USB_PORTSC1_CSC_MASK    (0x2U)
+#define USB_PORTSC1_CSC_SHIFT   (1U)
+#define USB_PORTSC1_CSC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CSC_SHIFT)) & USB_PORTSC1_CSC_MASK)
+#define USB_PORTSC1_PE_MASK     (0x4U)
+#define USB_PORTSC1_PE_SHIFT    (2U)
+#define USB_PORTSC1_PE(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PE_SHIFT)) & USB_PORTSC1_PE_MASK)
+#define USB_PORTSC1_PEC_MASK    (0x8U)
+#define USB_PORTSC1_PEC_SHIFT   (3U)
+#define USB_PORTSC1_PEC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PEC_SHIFT)) & USB_PORTSC1_PEC_MASK)
+#define USB_PORTSC1_OCA_MASK    (0x10U)
+#define USB_PORTSC1_OCA_SHIFT   (4U)
+#define USB_PORTSC1_OCA(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCA_SHIFT)) & USB_PORTSC1_OCA_MASK)
+#define USB_PORTSC1_OCC_MASK    (0x20U)
+#define USB_PORTSC1_OCC_SHIFT   (5U)
+#define USB_PORTSC1_OCC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCC_SHIFT)) & USB_PORTSC1_OCC_MASK)
+#define USB_PORTSC1_FPR_MASK    (0x40U)
+#define USB_PORTSC1_FPR_SHIFT   (6U)
+#define USB_PORTSC1_FPR(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_FPR_SHIFT)) & USB_PORTSC1_FPR_MASK)
+#define USB_PORTSC1_SUSP_MASK   (0x80U)
+#define USB_PORTSC1_SUSP_SHIFT  (7U)
+#define USB_PORTSC1_SUSP(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_SUSP_SHIFT)) & USB_PORTSC1_SUSP_MASK)
+#define USB_PORTSC1_PR_MASK     (0x100U)
+#define USB_PORTSC1_PR_SHIFT    (8U)
+#define USB_PORTSC1_PR(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PR_SHIFT)) & USB_PORTSC1_PR_MASK)
+#define USB_PORTSC1_HSP_MASK    (0x200U)
+#define USB_PORTSC1_HSP_SHIFT   (9U)
+#define USB_PORTSC1_HSP(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_HSP_SHIFT)) & USB_PORTSC1_HSP_MASK)
+#define USB_PORTSC1_LS_MASK     (0xC00U)
+#define USB_PORTSC1_LS_SHIFT    (10U)
+#define USB_PORTSC1_LS(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_LS_SHIFT)) & USB_PORTSC1_LS_MASK)
+#define USB_PORTSC1_PP_MASK     (0x1000U)
+#define USB_PORTSC1_PP_SHIFT    (12U)
+#define USB_PORTSC1_PP(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PP_SHIFT)) & USB_PORTSC1_PP_MASK)
+#define USB_PORTSC1_PO_MASK     (0x2000U)
+#define USB_PORTSC1_PO_SHIFT    (13U)
+#define USB_PORTSC1_PO(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PO_SHIFT)) & USB_PORTSC1_PO_MASK)
+#define USB_PORTSC1_PIC_MASK    (0xC000U)
+#define USB_PORTSC1_PIC_SHIFT   (14U)
+#define USB_PORTSC1_PIC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PIC_SHIFT)) & USB_PORTSC1_PIC_MASK)
+#define USB_PORTSC1_PTC_MASK    (0xF0000U)
+#define USB_PORTSC1_PTC_SHIFT   (16U)
+#define USB_PORTSC1_PTC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTC_SHIFT)) & USB_PORTSC1_PTC_MASK)
+#define USB_PORTSC1_WKCN_MASK   (0x100000U)
+#define USB_PORTSC1_WKCN_SHIFT  (20U)
+#define USB_PORTSC1_WKCN(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKCN_SHIFT)) & USB_PORTSC1_WKCN_MASK)
+#define USB_PORTSC1_WKDC_MASK   (0x200000U)
+#define USB_PORTSC1_WKDC_SHIFT  (21U)
+#define USB_PORTSC1_WKDC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKDC_SHIFT)) & USB_PORTSC1_WKDC_MASK)
+#define USB_PORTSC1_WKOC_MASK   (0x400000U)
+#define USB_PORTSC1_WKOC_SHIFT  (22U)
+#define USB_PORTSC1_WKOC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKOC_SHIFT)) & USB_PORTSC1_WKOC_MASK)
+#define USB_PORTSC1_PHCD_MASK   (0x800000U)
+#define USB_PORTSC1_PHCD_SHIFT  (23U)
+#define USB_PORTSC1_PHCD(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PHCD_SHIFT)) & USB_PORTSC1_PHCD_MASK)
+#define USB_PORTSC1_PFSC_MASK   (0x1000000U)
+#define USB_PORTSC1_PFSC_SHIFT  (24U)
+#define USB_PORTSC1_PFSC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PFSC_SHIFT)) & USB_PORTSC1_PFSC_MASK)
+#define USB_PORTSC1_PTS_2_MASK  (0x2000000U)
+#define USB_PORTSC1_PTS_2_SHIFT (25U)
+#define USB_PORTSC1_PTS_2(x)    (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_2_SHIFT)) & USB_PORTSC1_PTS_2_MASK)
+#define USB_PORTSC1_PSPD_MASK   (0xC000000U)
+#define USB_PORTSC1_PSPD_SHIFT  (26U)
+#define USB_PORTSC1_PSPD(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PSPD_SHIFT)) & USB_PORTSC1_PSPD_MASK)
+#define USB_PORTSC1_PTW_MASK    (0x10000000U)
+#define USB_PORTSC1_PTW_SHIFT   (28U)
+#define USB_PORTSC1_PTW(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTW_SHIFT)) & USB_PORTSC1_PTW_MASK)
+#define USB_PORTSC1_STS_MASK    (0x20000000U)
+#define USB_PORTSC1_STS_SHIFT   (29U)
+#define USB_PORTSC1_STS(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_STS_SHIFT)) & USB_PORTSC1_STS_MASK)
+#define USB_PORTSC1_PTS_1_MASK  (0xC0000000U)
+#define USB_PORTSC1_PTS_1_SHIFT (30U)
+#define USB_PORTSC1_PTS_1(x)    (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_1_SHIFT)) & USB_PORTSC1_PTS_1_MASK)
 /*! @} */
 
 /*! @name OTGSC - On-The-Go Status & control */
 /*! @{ */
-#define USB_OTGSC_VD_MASK                        (0x1U)
-#define USB_OTGSC_VD_SHIFT                       (0U)
-#define USB_OTGSC_VD(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VD_SHIFT)) & USB_OTGSC_VD_MASK)
-#define USB_OTGSC_VC_MASK                        (0x2U)
-#define USB_OTGSC_VC_SHIFT                       (1U)
-#define USB_OTGSC_VC(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VC_SHIFT)) & USB_OTGSC_VC_MASK)
-#define USB_OTGSC_OT_MASK                        (0x8U)
-#define USB_OTGSC_OT_SHIFT                       (3U)
-#define USB_OTGSC_OT(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_OT_SHIFT)) & USB_OTGSC_OT_MASK)
-#define USB_OTGSC_DP_MASK                        (0x10U)
-#define USB_OTGSC_DP_SHIFT                       (4U)
-#define USB_OTGSC_DP(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DP_SHIFT)) & USB_OTGSC_DP_MASK)
-#define USB_OTGSC_IDPU_MASK                      (0x20U)
-#define USB_OTGSC_IDPU_SHIFT                     (5U)
-#define USB_OTGSC_IDPU(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDPU_SHIFT)) & USB_OTGSC_IDPU_MASK)
-#define USB_OTGSC_ID_MASK                        (0x100U)
-#define USB_OTGSC_ID_SHIFT                       (8U)
-#define USB_OTGSC_ID(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ID_SHIFT)) & USB_OTGSC_ID_MASK)
-#define USB_OTGSC_AVV_MASK                       (0x200U)
-#define USB_OTGSC_AVV_SHIFT                      (9U)
-#define USB_OTGSC_AVV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVV_SHIFT)) & USB_OTGSC_AVV_MASK)
-#define USB_OTGSC_ASV_MASK                       (0x400U)
-#define USB_OTGSC_ASV_SHIFT                      (10U)
-#define USB_OTGSC_ASV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASV_SHIFT)) & USB_OTGSC_ASV_MASK)
-#define USB_OTGSC_BSV_MASK                       (0x800U)
-#define USB_OTGSC_BSV_SHIFT                      (11U)
-#define USB_OTGSC_BSV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSV_SHIFT)) & USB_OTGSC_BSV_MASK)
-#define USB_OTGSC_BSE_MASK                       (0x1000U)
-#define USB_OTGSC_BSE_SHIFT                      (12U)
-#define USB_OTGSC_BSE(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSE_SHIFT)) & USB_OTGSC_BSE_MASK)
-#define USB_OTGSC_TOG_1MS_MASK                   (0x2000U)
-#define USB_OTGSC_TOG_1MS_SHIFT                  (13U)
-#define USB_OTGSC_TOG_1MS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_TOG_1MS_SHIFT)) & USB_OTGSC_TOG_1MS_MASK)
-#define USB_OTGSC_DPS_MASK                       (0x4000U)
-#define USB_OTGSC_DPS_SHIFT                      (14U)
-#define USB_OTGSC_DPS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPS_SHIFT)) & USB_OTGSC_DPS_MASK)
-#define USB_OTGSC_IDIS_MASK                      (0x10000U)
-#define USB_OTGSC_IDIS_SHIFT                     (16U)
-#define USB_OTGSC_IDIS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIS_SHIFT)) & USB_OTGSC_IDIS_MASK)
-#define USB_OTGSC_AVVIS_MASK                     (0x20000U)
-#define USB_OTGSC_AVVIS_SHIFT                    (17U)
-#define USB_OTGSC_AVVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIS_SHIFT)) & USB_OTGSC_AVVIS_MASK)
-#define USB_OTGSC_ASVIS_MASK                     (0x40000U)
-#define USB_OTGSC_ASVIS_SHIFT                    (18U)
-#define USB_OTGSC_ASVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIS_SHIFT)) & USB_OTGSC_ASVIS_MASK)
-#define USB_OTGSC_BSVIS_MASK                     (0x80000U)
-#define USB_OTGSC_BSVIS_SHIFT                    (19U)
-#define USB_OTGSC_BSVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIS_SHIFT)) & USB_OTGSC_BSVIS_MASK)
-#define USB_OTGSC_BSEIS_MASK                     (0x100000U)
-#define USB_OTGSC_BSEIS_SHIFT                    (20U)
-#define USB_OTGSC_BSEIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIS_SHIFT)) & USB_OTGSC_BSEIS_MASK)
-#define USB_OTGSC_STATUS_1MS_MASK                (0x200000U)
-#define USB_OTGSC_STATUS_1MS_SHIFT               (21U)
-#define USB_OTGSC_STATUS_1MS(x)                  (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_STATUS_1MS_SHIFT)) & USB_OTGSC_STATUS_1MS_MASK)
-#define USB_OTGSC_DPIS_MASK                      (0x400000U)
-#define USB_OTGSC_DPIS_SHIFT                     (22U)
-#define USB_OTGSC_DPIS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIS_SHIFT)) & USB_OTGSC_DPIS_MASK)
-#define USB_OTGSC_IDIE_MASK                      (0x1000000U)
-#define USB_OTGSC_IDIE_SHIFT                     (24U)
-#define USB_OTGSC_IDIE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIE_SHIFT)) & USB_OTGSC_IDIE_MASK)
-#define USB_OTGSC_AVVIE_MASK                     (0x2000000U)
-#define USB_OTGSC_AVVIE_SHIFT                    (25U)
-#define USB_OTGSC_AVVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIE_SHIFT)) & USB_OTGSC_AVVIE_MASK)
-#define USB_OTGSC_ASVIE_MASK                     (0x4000000U)
-#define USB_OTGSC_ASVIE_SHIFT                    (26U)
-#define USB_OTGSC_ASVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIE_SHIFT)) & USB_OTGSC_ASVIE_MASK)
-#define USB_OTGSC_BSVIE_MASK                     (0x8000000U)
-#define USB_OTGSC_BSVIE_SHIFT                    (27U)
-#define USB_OTGSC_BSVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIE_SHIFT)) & USB_OTGSC_BSVIE_MASK)
-#define USB_OTGSC_BSEIE_MASK                     (0x10000000U)
-#define USB_OTGSC_BSEIE_SHIFT                    (28U)
-#define USB_OTGSC_BSEIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIE_SHIFT)) & USB_OTGSC_BSEIE_MASK)
-#define USB_OTGSC_EN_1MS_MASK                    (0x20000000U)
-#define USB_OTGSC_EN_1MS_SHIFT                   (29U)
-#define USB_OTGSC_EN_1MS(x)                      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_EN_1MS_SHIFT)) & USB_OTGSC_EN_1MS_MASK)
-#define USB_OTGSC_DPIE_MASK                      (0x40000000U)
-#define USB_OTGSC_DPIE_SHIFT                     (30U)
-#define USB_OTGSC_DPIE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIE_SHIFT)) & USB_OTGSC_DPIE_MASK)
+#define USB_OTGSC_VD_MASK          (0x1U)
+#define USB_OTGSC_VD_SHIFT         (0U)
+#define USB_OTGSC_VD(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VD_SHIFT)) & USB_OTGSC_VD_MASK)
+#define USB_OTGSC_VC_MASK          (0x2U)
+#define USB_OTGSC_VC_SHIFT         (1U)
+#define USB_OTGSC_VC(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VC_SHIFT)) & USB_OTGSC_VC_MASK)
+#define USB_OTGSC_OT_MASK          (0x8U)
+#define USB_OTGSC_OT_SHIFT         (3U)
+#define USB_OTGSC_OT(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_OT_SHIFT)) & USB_OTGSC_OT_MASK)
+#define USB_OTGSC_DP_MASK          (0x10U)
+#define USB_OTGSC_DP_SHIFT         (4U)
+#define USB_OTGSC_DP(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DP_SHIFT)) & USB_OTGSC_DP_MASK)
+#define USB_OTGSC_IDPU_MASK        (0x20U)
+#define USB_OTGSC_IDPU_SHIFT       (5U)
+#define USB_OTGSC_IDPU(x)          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDPU_SHIFT)) & USB_OTGSC_IDPU_MASK)
+#define USB_OTGSC_ID_MASK          (0x100U)
+#define USB_OTGSC_ID_SHIFT         (8U)
+#define USB_OTGSC_ID(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ID_SHIFT)) & USB_OTGSC_ID_MASK)
+#define USB_OTGSC_AVV_MASK         (0x200U)
+#define USB_OTGSC_AVV_SHIFT        (9U)
+#define USB_OTGSC_AVV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVV_SHIFT)) & USB_OTGSC_AVV_MASK)
+#define USB_OTGSC_ASV_MASK         (0x400U)
+#define USB_OTGSC_ASV_SHIFT        (10U)
+#define USB_OTGSC_ASV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASV_SHIFT)) & USB_OTGSC_ASV_MASK)
+#define USB_OTGSC_BSV_MASK         (0x800U)
+#define USB_OTGSC_BSV_SHIFT        (11U)
+#define USB_OTGSC_BSV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSV_SHIFT)) & USB_OTGSC_BSV_MASK)
+#define USB_OTGSC_BSE_MASK         (0x1000U)
+#define USB_OTGSC_BSE_SHIFT        (12U)
+#define USB_OTGSC_BSE(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSE_SHIFT)) & USB_OTGSC_BSE_MASK)
+#define USB_OTGSC_TOG_1MS_MASK     (0x2000U)
+#define USB_OTGSC_TOG_1MS_SHIFT    (13U)
+#define USB_OTGSC_TOG_1MS(x)       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_TOG_1MS_SHIFT)) & USB_OTGSC_TOG_1MS_MASK)
+#define USB_OTGSC_DPS_MASK         (0x4000U)
+#define USB_OTGSC_DPS_SHIFT        (14U)
+#define USB_OTGSC_DPS(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPS_SHIFT)) & USB_OTGSC_DPS_MASK)
+#define USB_OTGSC_IDIS_MASK        (0x10000U)
+#define USB_OTGSC_IDIS_SHIFT       (16U)
+#define USB_OTGSC_IDIS(x)          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIS_SHIFT)) & USB_OTGSC_IDIS_MASK)
+#define USB_OTGSC_AVVIS_MASK       (0x20000U)
+#define USB_OTGSC_AVVIS_SHIFT      (17U)
+#define USB_OTGSC_AVVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIS_SHIFT)) & USB_OTGSC_AVVIS_MASK)
+#define USB_OTGSC_ASVIS_MASK       (0x40000U)
+#define USB_OTGSC_ASVIS_SHIFT      (18U)
+#define USB_OTGSC_ASVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIS_SHIFT)) & USB_OTGSC_ASVIS_MASK)
+#define USB_OTGSC_BSVIS_MASK       (0x80000U)
+#define USB_OTGSC_BSVIS_SHIFT      (19U)
+#define USB_OTGSC_BSVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIS_SHIFT)) & USB_OTGSC_BSVIS_MASK)
+#define USB_OTGSC_BSEIS_MASK       (0x100000U)
+#define USB_OTGSC_BSEIS_SHIFT      (20U)
+#define USB_OTGSC_BSEIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIS_SHIFT)) & USB_OTGSC_BSEIS_MASK)
+#define USB_OTGSC_STATUS_1MS_MASK  (0x200000U)
+#define USB_OTGSC_STATUS_1MS_SHIFT (21U)
+#define USB_OTGSC_STATUS_1MS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_STATUS_1MS_SHIFT)) & USB_OTGSC_STATUS_1MS_MASK)
+#define USB_OTGSC_DPIS_MASK    (0x400000U)
+#define USB_OTGSC_DPIS_SHIFT   (22U)
+#define USB_OTGSC_DPIS(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIS_SHIFT)) & USB_OTGSC_DPIS_MASK)
+#define USB_OTGSC_IDIE_MASK    (0x1000000U)
+#define USB_OTGSC_IDIE_SHIFT   (24U)
+#define USB_OTGSC_IDIE(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIE_SHIFT)) & USB_OTGSC_IDIE_MASK)
+#define USB_OTGSC_AVVIE_MASK   (0x2000000U)
+#define USB_OTGSC_AVVIE_SHIFT  (25U)
+#define USB_OTGSC_AVVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIE_SHIFT)) & USB_OTGSC_AVVIE_MASK)
+#define USB_OTGSC_ASVIE_MASK   (0x4000000U)
+#define USB_OTGSC_ASVIE_SHIFT  (26U)
+#define USB_OTGSC_ASVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIE_SHIFT)) & USB_OTGSC_ASVIE_MASK)
+#define USB_OTGSC_BSVIE_MASK   (0x8000000U)
+#define USB_OTGSC_BSVIE_SHIFT  (27U)
+#define USB_OTGSC_BSVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIE_SHIFT)) & USB_OTGSC_BSVIE_MASK)
+#define USB_OTGSC_BSEIE_MASK   (0x10000000U)
+#define USB_OTGSC_BSEIE_SHIFT  (28U)
+#define USB_OTGSC_BSEIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIE_SHIFT)) & USB_OTGSC_BSEIE_MASK)
+#define USB_OTGSC_EN_1MS_MASK  (0x20000000U)
+#define USB_OTGSC_EN_1MS_SHIFT (29U)
+#define USB_OTGSC_EN_1MS(x)    (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_EN_1MS_SHIFT)) & USB_OTGSC_EN_1MS_MASK)
+#define USB_OTGSC_DPIE_MASK    (0x40000000U)
+#define USB_OTGSC_DPIE_SHIFT   (30U)
+#define USB_OTGSC_DPIE(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIE_SHIFT)) & USB_OTGSC_DPIE_MASK)
 /*! @} */
 
 /*! @name USBMODE - USB Device Mode */
 /*! @{ */
-#define USB_USBMODE_CM_MASK                      (0x3U)
-#define USB_USBMODE_CM_SHIFT                     (0U)
-#define USB_USBMODE_CM(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_CM_SHIFT)) & USB_USBMODE_CM_MASK)
-#define USB_USBMODE_ES_MASK                      (0x4U)
-#define USB_USBMODE_ES_SHIFT                     (2U)
-#define USB_USBMODE_ES(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_ES_SHIFT)) & USB_USBMODE_ES_MASK)
-#define USB_USBMODE_SLOM_MASK                    (0x8U)
-#define USB_USBMODE_SLOM_SHIFT                   (3U)
-#define USB_USBMODE_SLOM(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SLOM_SHIFT)) & USB_USBMODE_SLOM_MASK)
-#define USB_USBMODE_SDIS_MASK                    (0x10U)
-#define USB_USBMODE_SDIS_SHIFT                   (4U)
-#define USB_USBMODE_SDIS(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SDIS_SHIFT)) & USB_USBMODE_SDIS_MASK)
+#define USB_USBMODE_CM_MASK    (0x3U)
+#define USB_USBMODE_CM_SHIFT   (0U)
+#define USB_USBMODE_CM(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_CM_SHIFT)) & USB_USBMODE_CM_MASK)
+#define USB_USBMODE_ES_MASK    (0x4U)
+#define USB_USBMODE_ES_SHIFT   (2U)
+#define USB_USBMODE_ES(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_ES_SHIFT)) & USB_USBMODE_ES_MASK)
+#define USB_USBMODE_SLOM_MASK  (0x8U)
+#define USB_USBMODE_SLOM_SHIFT (3U)
+#define USB_USBMODE_SLOM(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SLOM_SHIFT)) & USB_USBMODE_SLOM_MASK)
+#define USB_USBMODE_SDIS_MASK  (0x10U)
+#define USB_USBMODE_SDIS_SHIFT (4U)
+#define USB_USBMODE_SDIS(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SDIS_SHIFT)) & USB_USBMODE_SDIS_MASK)
 /*! @} */
 
 /*! @name ENDPTSETUPSTAT - Endpoint Setup Status */
 /*! @{ */
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK   (0xFFFFU)
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT  (0U)
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT)) & USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK  (0xFFFFU)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT (0U)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT)) & USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK)
 /*! @} */
 
 /*! @name ENDPTPRIME - Endpoint Prime */
 /*! @{ */
-#define USB_ENDPTPRIME_PERB_MASK                 (0xFFU)
-#define USB_ENDPTPRIME_PERB_SHIFT                (0U)
-#define USB_ENDPTPRIME_PERB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PERB_SHIFT)) & USB_ENDPTPRIME_PERB_MASK)
-#define USB_ENDPTPRIME_PETB_MASK                 (0xFF0000U)
-#define USB_ENDPTPRIME_PETB_SHIFT                (16U)
-#define USB_ENDPTPRIME_PETB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PETB_SHIFT)) & USB_ENDPTPRIME_PETB_MASK)
+#define USB_ENDPTPRIME_PERB_MASK  (0xFFU)
+#define USB_ENDPTPRIME_PERB_SHIFT (0U)
+#define USB_ENDPTPRIME_PERB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PERB_SHIFT)) & USB_ENDPTPRIME_PERB_MASK)
+#define USB_ENDPTPRIME_PETB_MASK  (0xFF0000U)
+#define USB_ENDPTPRIME_PETB_SHIFT (16U)
+#define USB_ENDPTPRIME_PETB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PETB_SHIFT)) & USB_ENDPTPRIME_PETB_MASK)
 /*! @} */
 
 /*! @name ENDPTFLUSH - Endpoint Flush */
 /*! @{ */
-#define USB_ENDPTFLUSH_FERB_MASK                 (0xFFU)
-#define USB_ENDPTFLUSH_FERB_SHIFT                (0U)
-#define USB_ENDPTFLUSH_FERB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FERB_SHIFT)) & USB_ENDPTFLUSH_FERB_MASK)
-#define USB_ENDPTFLUSH_FETB_MASK                 (0xFF0000U)
-#define USB_ENDPTFLUSH_FETB_SHIFT                (16U)
-#define USB_ENDPTFLUSH_FETB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FETB_SHIFT)) & USB_ENDPTFLUSH_FETB_MASK)
+#define USB_ENDPTFLUSH_FERB_MASK  (0xFFU)
+#define USB_ENDPTFLUSH_FERB_SHIFT (0U)
+#define USB_ENDPTFLUSH_FERB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FERB_SHIFT)) & USB_ENDPTFLUSH_FERB_MASK)
+#define USB_ENDPTFLUSH_FETB_MASK  (0xFF0000U)
+#define USB_ENDPTFLUSH_FETB_SHIFT (16U)
+#define USB_ENDPTFLUSH_FETB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FETB_SHIFT)) & USB_ENDPTFLUSH_FETB_MASK)
 /*! @} */
 
 /*! @name ENDPTSTAT - Endpoint Status */
 /*! @{ */
-#define USB_ENDPTSTAT_ERBR_MASK                  (0xFFU)
-#define USB_ENDPTSTAT_ERBR_SHIFT                 (0U)
-#define USB_ENDPTSTAT_ERBR(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ERBR_SHIFT)) & USB_ENDPTSTAT_ERBR_MASK)
-#define USB_ENDPTSTAT_ETBR_MASK                  (0xFF0000U)
-#define USB_ENDPTSTAT_ETBR_SHIFT                 (16U)
-#define USB_ENDPTSTAT_ETBR(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ETBR_SHIFT)) & USB_ENDPTSTAT_ETBR_MASK)
+#define USB_ENDPTSTAT_ERBR_MASK  (0xFFU)
+#define USB_ENDPTSTAT_ERBR_SHIFT (0U)
+#define USB_ENDPTSTAT_ERBR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ERBR_SHIFT)) & USB_ENDPTSTAT_ERBR_MASK)
+#define USB_ENDPTSTAT_ETBR_MASK  (0xFF0000U)
+#define USB_ENDPTSTAT_ETBR_SHIFT (16U)
+#define USB_ENDPTSTAT_ETBR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ETBR_SHIFT)) & USB_ENDPTSTAT_ETBR_MASK)
 /*! @} */
 
 /*! @name ENDPTCOMPLETE - Endpoint Complete */
 /*! @{ */
-#define USB_ENDPTCOMPLETE_ERCE_MASK              (0xFFU)
-#define USB_ENDPTCOMPLETE_ERCE_SHIFT             (0U)
-#define USB_ENDPTCOMPLETE_ERCE(x)                (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ERCE_SHIFT)) & USB_ENDPTCOMPLETE_ERCE_MASK)
-#define USB_ENDPTCOMPLETE_ETCE_MASK              (0xFF0000U)
-#define USB_ENDPTCOMPLETE_ETCE_SHIFT             (16U)
-#define USB_ENDPTCOMPLETE_ETCE(x)                (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ETCE_SHIFT)) & USB_ENDPTCOMPLETE_ETCE_MASK)
+#define USB_ENDPTCOMPLETE_ERCE_MASK  (0xFFU)
+#define USB_ENDPTCOMPLETE_ERCE_SHIFT (0U)
+#define USB_ENDPTCOMPLETE_ERCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ERCE_SHIFT)) & USB_ENDPTCOMPLETE_ERCE_MASK)
+#define USB_ENDPTCOMPLETE_ETCE_MASK  (0xFF0000U)
+#define USB_ENDPTCOMPLETE_ETCE_SHIFT (16U)
+#define USB_ENDPTCOMPLETE_ETCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ETCE_SHIFT)) & USB_ENDPTCOMPLETE_ETCE_MASK)
 /*! @} */
 
 /*! @name ENDPTCTRL0 - Endpoint Control0 */
 /*! @{ */
-#define USB_ENDPTCTRL0_RXS_MASK                  (0x1U)
-#define USB_ENDPTCTRL0_RXS_SHIFT                 (0U)
-#define USB_ENDPTCTRL0_RXS(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXS_SHIFT)) & USB_ENDPTCTRL0_RXS_MASK)
-#define USB_ENDPTCTRL0_RXT_MASK                  (0xCU)
-#define USB_ENDPTCTRL0_RXT_SHIFT                 (2U)
-#define USB_ENDPTCTRL0_RXT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXT_SHIFT)) & USB_ENDPTCTRL0_RXT_MASK)
-#define USB_ENDPTCTRL0_RXE_MASK                  (0x80U)
-#define USB_ENDPTCTRL0_RXE_SHIFT                 (7U)
-#define USB_ENDPTCTRL0_RXE(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXE_SHIFT)) & USB_ENDPTCTRL0_RXE_MASK)
-#define USB_ENDPTCTRL0_TXS_MASK                  (0x10000U)
-#define USB_ENDPTCTRL0_TXS_SHIFT                 (16U)
-#define USB_ENDPTCTRL0_TXS(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXS_SHIFT)) & USB_ENDPTCTRL0_TXS_MASK)
-#define USB_ENDPTCTRL0_TXT_MASK                  (0xC0000U)
-#define USB_ENDPTCTRL0_TXT_SHIFT                 (18U)
-#define USB_ENDPTCTRL0_TXT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXT_SHIFT)) & USB_ENDPTCTRL0_TXT_MASK)
-#define USB_ENDPTCTRL0_TXE_MASK                  (0x800000U)
-#define USB_ENDPTCTRL0_TXE_SHIFT                 (23U)
-#define USB_ENDPTCTRL0_TXE(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXE_SHIFT)) & USB_ENDPTCTRL0_TXE_MASK)
+#define USB_ENDPTCTRL0_RXS_MASK  (0x1U)
+#define USB_ENDPTCTRL0_RXS_SHIFT (0U)
+#define USB_ENDPTCTRL0_RXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXS_SHIFT)) & USB_ENDPTCTRL0_RXS_MASK)
+#define USB_ENDPTCTRL0_RXT_MASK  (0xCU)
+#define USB_ENDPTCTRL0_RXT_SHIFT (2U)
+#define USB_ENDPTCTRL0_RXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXT_SHIFT)) & USB_ENDPTCTRL0_RXT_MASK)
+#define USB_ENDPTCTRL0_RXE_MASK  (0x80U)
+#define USB_ENDPTCTRL0_RXE_SHIFT (7U)
+#define USB_ENDPTCTRL0_RXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXE_SHIFT)) & USB_ENDPTCTRL0_RXE_MASK)
+#define USB_ENDPTCTRL0_TXS_MASK  (0x10000U)
+#define USB_ENDPTCTRL0_TXS_SHIFT (16U)
+#define USB_ENDPTCTRL0_TXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXS_SHIFT)) & USB_ENDPTCTRL0_TXS_MASK)
+#define USB_ENDPTCTRL0_TXT_MASK  (0xC0000U)
+#define USB_ENDPTCTRL0_TXT_SHIFT (18U)
+#define USB_ENDPTCTRL0_TXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXT_SHIFT)) & USB_ENDPTCTRL0_TXT_MASK)
+#define USB_ENDPTCTRL0_TXE_MASK  (0x800000U)
+#define USB_ENDPTCTRL0_TXE_SHIFT (23U)
+#define USB_ENDPTCTRL0_TXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXE_SHIFT)) & USB_ENDPTCTRL0_TXE_MASK)
 /*! @} */
 
 /*! @name ENDPTCTRL - Endpoint Control 1..Endpoint Control 7 */
 /*! @{ */
-#define USB_ENDPTCTRL_RXS_MASK                   (0x1U)
-#define USB_ENDPTCTRL_RXS_SHIFT                  (0U)
-#define USB_ENDPTCTRL_RXS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXS_SHIFT)) & USB_ENDPTCTRL_RXS_MASK)
-#define USB_ENDPTCTRL_RXD_MASK                   (0x2U)
-#define USB_ENDPTCTRL_RXD_SHIFT                  (1U)
-#define USB_ENDPTCTRL_RXD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXD_SHIFT)) & USB_ENDPTCTRL_RXD_MASK)
-#define USB_ENDPTCTRL_RXT_MASK                   (0xCU)
-#define USB_ENDPTCTRL_RXT_SHIFT                  (2U)
-#define USB_ENDPTCTRL_RXT(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXT_SHIFT)) & USB_ENDPTCTRL_RXT_MASK)
-#define USB_ENDPTCTRL_RXI_MASK                   (0x20U)
-#define USB_ENDPTCTRL_RXI_SHIFT                  (5U)
-#define USB_ENDPTCTRL_RXI(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXI_SHIFT)) & USB_ENDPTCTRL_RXI_MASK)
-#define USB_ENDPTCTRL_RXR_MASK                   (0x40U)
-#define USB_ENDPTCTRL_RXR_SHIFT                  (6U)
-#define USB_ENDPTCTRL_RXR(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXR_SHIFT)) & USB_ENDPTCTRL_RXR_MASK)
-#define USB_ENDPTCTRL_RXE_MASK                   (0x80U)
-#define USB_ENDPTCTRL_RXE_SHIFT                  (7U)
-#define USB_ENDPTCTRL_RXE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXE_SHIFT)) & USB_ENDPTCTRL_RXE_MASK)
-#define USB_ENDPTCTRL_TXS_MASK                   (0x10000U)
-#define USB_ENDPTCTRL_TXS_SHIFT                  (16U)
-#define USB_ENDPTCTRL_TXS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXS_SHIFT)) & USB_ENDPTCTRL_TXS_MASK)
-#define USB_ENDPTCTRL_TXD_MASK                   (0x20000U)
-#define USB_ENDPTCTRL_TXD_SHIFT                  (17U)
-#define USB_ENDPTCTRL_TXD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXD_SHIFT)) & USB_ENDPTCTRL_TXD_MASK)
-#define USB_ENDPTCTRL_TXT_MASK                   (0xC0000U)
-#define USB_ENDPTCTRL_TXT_SHIFT                  (18U)
-#define USB_ENDPTCTRL_TXT(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXT_SHIFT)) & USB_ENDPTCTRL_TXT_MASK)
-#define USB_ENDPTCTRL_TXI_MASK                   (0x200000U)
-#define USB_ENDPTCTRL_TXI_SHIFT                  (21U)
-#define USB_ENDPTCTRL_TXI(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXI_SHIFT)) & USB_ENDPTCTRL_TXI_MASK)
-#define USB_ENDPTCTRL_TXR_MASK                   (0x400000U)
-#define USB_ENDPTCTRL_TXR_SHIFT                  (22U)
-#define USB_ENDPTCTRL_TXR(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXR_SHIFT)) & USB_ENDPTCTRL_TXR_MASK)
-#define USB_ENDPTCTRL_TXE_MASK                   (0x800000U)
-#define USB_ENDPTCTRL_TXE_SHIFT                  (23U)
-#define USB_ENDPTCTRL_TXE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXE_SHIFT)) & USB_ENDPTCTRL_TXE_MASK)
+#define USB_ENDPTCTRL_RXS_MASK  (0x1U)
+#define USB_ENDPTCTRL_RXS_SHIFT (0U)
+#define USB_ENDPTCTRL_RXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXS_SHIFT)) & USB_ENDPTCTRL_RXS_MASK)
+#define USB_ENDPTCTRL_RXD_MASK  (0x2U)
+#define USB_ENDPTCTRL_RXD_SHIFT (1U)
+#define USB_ENDPTCTRL_RXD(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXD_SHIFT)) & USB_ENDPTCTRL_RXD_MASK)
+#define USB_ENDPTCTRL_RXT_MASK  (0xCU)
+#define USB_ENDPTCTRL_RXT_SHIFT (2U)
+#define USB_ENDPTCTRL_RXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXT_SHIFT)) & USB_ENDPTCTRL_RXT_MASK)
+#define USB_ENDPTCTRL_RXI_MASK  (0x20U)
+#define USB_ENDPTCTRL_RXI_SHIFT (5U)
+#define USB_ENDPTCTRL_RXI(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXI_SHIFT)) & USB_ENDPTCTRL_RXI_MASK)
+#define USB_ENDPTCTRL_RXR_MASK  (0x40U)
+#define USB_ENDPTCTRL_RXR_SHIFT (6U)
+#define USB_ENDPTCTRL_RXR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXR_SHIFT)) & USB_ENDPTCTRL_RXR_MASK)
+#define USB_ENDPTCTRL_RXE_MASK  (0x80U)
+#define USB_ENDPTCTRL_RXE_SHIFT (7U)
+#define USB_ENDPTCTRL_RXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXE_SHIFT)) & USB_ENDPTCTRL_RXE_MASK)
+#define USB_ENDPTCTRL_TXS_MASK  (0x10000U)
+#define USB_ENDPTCTRL_TXS_SHIFT (16U)
+#define USB_ENDPTCTRL_TXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXS_SHIFT)) & USB_ENDPTCTRL_TXS_MASK)
+#define USB_ENDPTCTRL_TXD_MASK  (0x20000U)
+#define USB_ENDPTCTRL_TXD_SHIFT (17U)
+#define USB_ENDPTCTRL_TXD(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXD_SHIFT)) & USB_ENDPTCTRL_TXD_MASK)
+#define USB_ENDPTCTRL_TXT_MASK  (0xC0000U)
+#define USB_ENDPTCTRL_TXT_SHIFT (18U)
+#define USB_ENDPTCTRL_TXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXT_SHIFT)) & USB_ENDPTCTRL_TXT_MASK)
+#define USB_ENDPTCTRL_TXI_MASK  (0x200000U)
+#define USB_ENDPTCTRL_TXI_SHIFT (21U)
+#define USB_ENDPTCTRL_TXI(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXI_SHIFT)) & USB_ENDPTCTRL_TXI_MASK)
+#define USB_ENDPTCTRL_TXR_MASK  (0x400000U)
+#define USB_ENDPTCTRL_TXR_SHIFT (22U)
+#define USB_ENDPTCTRL_TXR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXR_SHIFT)) & USB_ENDPTCTRL_TXR_MASK)
+#define USB_ENDPTCTRL_TXE_MASK  (0x800000U)
+#define USB_ENDPTCTRL_TXE_SHIFT (23U)
+#define USB_ENDPTCTRL_TXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXE_SHIFT)) & USB_ENDPTCTRL_TXE_MASK)
 /*! @} */
 
 /* The count of USB_ENDPTCTRL */
-#define USB_ENDPTCTRL_COUNT                      (7U)
-
+#define USB_ENDPTCTRL_COUNT (7U)
 
 /*!
  * @}
  */ /* end of group USB_Register_Masks */
 
-
 /* USB - Peripheral instance base addresses */
 /** Peripheral USB1 base address */
-#define USB1_BASE                                (0x402E0000u)
+#define USB1_BASE (0x402E0000u)
 /** Peripheral USB1 base pointer */
-#define USB1                                     ((USB_Type *)USB1_BASE)
+#define USB1 ((USB_Type *)USB1_BASE)
 /** Peripheral USB2 base address */
-#define USB2_BASE                                (0x402E0200u)
+#define USB2_BASE (0x402E0200u)
 /** Peripheral USB2 base pointer */
-#define USB2                                     ((USB_Type *)USB2_BASE)
+#define USB2 ((USB_Type *)USB2_BASE)
 /** Array initializer of USB peripheral base addresses */
-#define USB_BASE_ADDRS                           { 0u, USB1_BASE, USB2_BASE }
+#define USB_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, USB1_BASE, USB2_BASE                                                                                       \
+    }
 /** Array initializer of USB peripheral base pointers */
-#define USB_BASE_PTRS                            { (USB_Type *)0u, USB1, USB2 }
+#define USB_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (USB_Type *)0u, USB1, USB2                                                                                     \
+    }
 /** Interrupt vectors for the USB peripheral type */
-#define USB_IRQS                                 { NotAvail_IRQn, USB_OTG1_IRQn, USB_OTG2_IRQn }
+#define USB_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, USB_OTG1_IRQn, USB_OTG2_IRQn                                                                    \
+    }
 /* Backward compatibility */
-#define GPTIMER0CTL                              GPTIMER0CTRL
-#define GPTIMER1CTL                              GPTIMER1CTRL
-#define USB_SBUSCFG                              SBUSCFG
-#define EPLISTADDR                               ENDPTLISTADDR
-#define EPSETUPSR                                ENDPTSETUPSTAT
-#define EPPRIME                                  ENDPTPRIME
-#define EPFLUSH                                  ENDPTFLUSH
-#define EPSR                                     ENDPTSTAT
-#define EPCOMPLETE                               ENDPTCOMPLETE
-#define EPCR                                     ENDPTCTRL
-#define EPCR0                                    ENDPTCTRL0
-#define USBHS_ID_ID_MASK                         USB_ID_ID_MASK
-#define USBHS_ID_ID_SHIFT                        USB_ID_ID_SHIFT
-#define USBHS_ID_ID(x)                           USB_ID_ID(x)
-#define USBHS_ID_NID_MASK                        USB_ID_NID_MASK
-#define USBHS_ID_NID_SHIFT                       USB_ID_NID_SHIFT
-#define USBHS_ID_NID(x)                          USB_ID_NID(x)
-#define USBHS_ID_REVISION_MASK                   USB_ID_REVISION_MASK
-#define USBHS_ID_REVISION_SHIFT                  USB_ID_REVISION_SHIFT
-#define USBHS_ID_REVISION(x)                     USB_ID_REVISION(x)
-#define USBHS_HWGENERAL_PHYW_MASK                USB_HWGENERAL_PHYW_MASK
-#define USBHS_HWGENERAL_PHYW_SHIFT               USB_HWGENERAL_PHYW_SHIFT
-#define USBHS_HWGENERAL_PHYW(x)                  USB_HWGENERAL_PHYW(x)
-#define USBHS_HWGENERAL_PHYM_MASK                USB_HWGENERAL_PHYM_MASK
-#define USBHS_HWGENERAL_PHYM_SHIFT               USB_HWGENERAL_PHYM_SHIFT
-#define USBHS_HWGENERAL_PHYM(x)                  USB_HWGENERAL_PHYM(x)
-#define USBHS_HWGENERAL_SM_MASK                  USB_HWGENERAL_SM_MASK
-#define USBHS_HWGENERAL_SM_SHIFT                 USB_HWGENERAL_SM_SHIFT
-#define USBHS_HWGENERAL_SM(x)                    USB_HWGENERAL_SM(x)
-#define USBHS_HWHOST_HC_MASK                     USB_HWHOST_HC_MASK
-#define USBHS_HWHOST_HC_SHIFT                    USB_HWHOST_HC_SHIFT
-#define USBHS_HWHOST_HC(x)                       USB_HWHOST_HC(x)
-#define USBHS_HWHOST_NPORT_MASK                  USB_HWHOST_NPORT_MASK
-#define USBHS_HWHOST_NPORT_SHIFT                 USB_HWHOST_NPORT_SHIFT
-#define USBHS_HWHOST_NPORT(x)                    USB_HWHOST_NPORT(x)
-#define USBHS_HWDEVICE_DC_MASK                   USB_HWDEVICE_DC_MASK
-#define USBHS_HWDEVICE_DC_SHIFT                  USB_HWDEVICE_DC_SHIFT
-#define USBHS_HWDEVICE_DC(x)                     USB_HWDEVICE_DC(x)
-#define USBHS_HWDEVICE_DEVEP_MASK                USB_HWDEVICE_DEVEP_MASK
-#define USBHS_HWDEVICE_DEVEP_SHIFT               USB_HWDEVICE_DEVEP_SHIFT
-#define USBHS_HWDEVICE_DEVEP(x)                  USB_HWDEVICE_DEVEP(x)
-#define USBHS_HWTXBUF_TXBURST_MASK               USB_HWTXBUF_TXBURST_MASK
-#define USBHS_HWTXBUF_TXBURST_SHIFT              USB_HWTXBUF_TXBURST_SHIFT
-#define USBHS_HWTXBUF_TXBURST(x)                 USB_HWTXBUF_TXBURST(x)
-#define USBHS_HWTXBUF_TXCHANADD_MASK             USB_HWTXBUF_TXCHANADD_MASK
-#define USBHS_HWTXBUF_TXCHANADD_SHIFT            USB_HWTXBUF_TXCHANADD_SHIFT
-#define USBHS_HWTXBUF_TXCHANADD(x)               USB_HWTXBUF_TXCHANADD(x)
-#define USBHS_HWRXBUF_RXBURST_MASK               USB_HWRXBUF_RXBURST_MASK
-#define USBHS_HWRXBUF_RXBURST_SHIFT              USB_HWRXBUF_RXBURST_SHIFT
-#define USBHS_HWRXBUF_RXBURST(x)                 USB_HWRXBUF_RXBURST(x)
-#define USBHS_HWRXBUF_RXADD_MASK                 USB_HWRXBUF_RXADD_MASK
-#define USBHS_HWRXBUF_RXADD_SHIFT                USB_HWRXBUF_RXADD_SHIFT
-#define USBHS_HWRXBUF_RXADD(x)                   USB_HWRXBUF_RXADD(x)
-#define USBHS_GPTIMER0LD_GPTLD_MASK              USB_GPTIMER0LD_GPTLD_MASK
-#define USBHS_GPTIMER0LD_GPTLD_SHIFT             USB_GPTIMER0LD_GPTLD_SHIFT
-#define USBHS_GPTIMER0LD_GPTLD(x)                USB_GPTIMER0LD_GPTLD(x)
-#define USBHS_GPTIMER0CTL_GPTCNT_MASK            USB_GPTIMER0CTRL_GPTCNT_MASK
-#define USBHS_GPTIMER0CTL_GPTCNT_SHIFT           USB_GPTIMER0CTRL_GPTCNT_SHIFT
-#define USBHS_GPTIMER0CTL_GPTCNT(x)              USB_GPTIMER0CTRL_GPTCNT(x)
-#define USBHS_GPTIMER0CTL_MODE_MASK              USB_GPTIMER0CTRL_GPTMODE_MASK
-#define USBHS_GPTIMER0CTL_MODE_SHIFT             USB_GPTIMER0CTRL_GPTMODE_SHIFT
-#define USBHS_GPTIMER0CTL_MODE(x)                USB_GPTIMER0CTRL_GPTMODE(x)
-#define USBHS_GPTIMER0CTL_RST_MASK               USB_GPTIMER0CTRL_GPTRST_MASK
-#define USBHS_GPTIMER0CTL_RST_SHIFT              USB_GPTIMER0CTRL_GPTRST_SHIFT
-#define USBHS_GPTIMER0CTL_RST(x)                 USB_GPTIMER0CTRL_GPTRST(x)
-#define USBHS_GPTIMER0CTL_RUN_MASK               USB_GPTIMER0CTRL_GPTRUN_MASK
-#define USBHS_GPTIMER0CTL_RUN_SHIFT              USB_GPTIMER0CTRL_GPTRUN_SHIFT
-#define USBHS_GPTIMER0CTL_RUN(x)                 USB_GPTIMER0CTRL_GPTRUN(x)
-#define USBHS_GPTIMER1LD_GPTLD_MASK              USB_GPTIMER1LD_GPTLD_MASK
-#define USBHS_GPTIMER1LD_GPTLD_SHIFT             USB_GPTIMER1LD_GPTLD_SHIFT
-#define USBHS_GPTIMER1LD_GPTLD(x)                USB_GPTIMER1LD_GPTLD(x)
-#define USBHS_GPTIMER1CTL_GPTCNT_MASK            USB_GPTIMER1CTRL_GPTCNT_MASK
-#define USBHS_GPTIMER1CTL_GPTCNT_SHIFT           USB_GPTIMER1CTRL_GPTCNT_SHIFT
-#define USBHS_GPTIMER1CTL_GPTCNT(x)              USB_GPTIMER1CTRL_GPTCNT(x)
-#define USBHS_GPTIMER1CTL_MODE_MASK              USB_GPTIMER1CTRL_GPTMODE_MASK
-#define USBHS_GPTIMER1CTL_MODE_SHIFT             USB_GPTIMER1CTRL_GPTMODE_SHIFT
-#define USBHS_GPTIMER1CTL_MODE(x)                USB_GPTIMER1CTRL_GPTMODE(x)
-#define USBHS_GPTIMER1CTL_RST_MASK               USB_GPTIMER1CTRL_GPTRST_MASK
-#define USBHS_GPTIMER1CTL_RST_SHIFT              USB_GPTIMER1CTRL_GPTRST_SHIFT
-#define USBHS_GPTIMER1CTL_RST(x)                 USB_GPTIMER1CTRL_GPTRST(x)
-#define USBHS_GPTIMER1CTL_RUN_MASK               USB_GPTIMER1CTRL_GPTRUN_MASK
-#define USBHS_GPTIMER1CTL_RUN_SHIFT              USB_GPTIMER1CTRL_GPTRUN_SHIFT
-#define USBHS_GPTIMER1CTL_RUN(x)                 USB_GPTIMER1CTRL_GPTRUN(x)
-#define USBHS_USB_SBUSCFG_BURSTMODE_MASK         USB_SBUSCFG_AHBBRST_MASK
-#define USBHS_USB_SBUSCFG_BURSTMODE_SHIFT        USB_SBUSCFG_AHBBRST_SHIFT
-#define USBHS_USB_SBUSCFG_BURSTMODE(x)           USB_SBUSCFG_AHBBRST(x)
-#define USBHS_HCIVERSION_CAPLENGTH(x)            USB_HCIVERSION_CAPLENGTH(x)
-#define USBHS_HCIVERSION_HCIVERSION_MASK         USB_HCIVERSION_HCIVERSION_MASK
-#define USBHS_HCIVERSION_HCIVERSION_SHIFT        USB_HCIVERSION_HCIVERSION_SHIFT
-#define USBHS_HCIVERSION_HCIVERSION(x)           USB_HCIVERSION_HCIVERSION(x)
-#define USBHS_HCSPARAMS_N_PORTS_MASK             USB_HCSPARAMS_N_PORTS_MASK
-#define USBHS_HCSPARAMS_N_PORTS_SHIFT            USB_HCSPARAMS_N_PORTS_SHIFT
-#define USBHS_HCSPARAMS_N_PORTS(x)               USB_HCSPARAMS_N_PORTS(x)
-#define USBHS_HCSPARAMS_PPC_MASK                 USB_HCSPARAMS_PPC_MASK
-#define USBHS_HCSPARAMS_PPC_SHIFT                USB_HCSPARAMS_PPC_SHIFT
-#define USBHS_HCSPARAMS_PPC(x)                   USB_HCSPARAMS_PPC(x)
-#define USBHS_HCSPARAMS_N_PCC_MASK               USB_HCSPARAMS_N_PCC_MASK
-#define USBHS_HCSPARAMS_N_PCC_SHIFT              USB_HCSPARAMS_N_PCC_SHIFT
-#define USBHS_HCSPARAMS_N_PCC(x)                 USB_HCSPARAMS_N_PCC(x)
-#define USBHS_HCSPARAMS_N_CC_MASK                USB_HCSPARAMS_N_CC_MASK
-#define USBHS_HCSPARAMS_N_CC_SHIFT               USB_HCSPARAMS_N_CC_SHIFT
-#define USBHS_HCSPARAMS_N_CC(x)                  USB_HCSPARAMS_N_CC(x)
-#define USBHS_HCSPARAMS_PI_MASK                  USB_HCSPARAMS_PI_MASK
-#define USBHS_HCSPARAMS_PI_SHIFT                 USB_HCSPARAMS_PI_SHIFT
-#define USBHS_HCSPARAMS_PI(x)                    USB_HCSPARAMS_PI(x)
-#define USBHS_HCSPARAMS_N_PTT_MASK               USB_HCSPARAMS_N_PTT_MASK
-#define USBHS_HCSPARAMS_N_PTT_SHIFT              USB_HCSPARAMS_N_PTT_SHIFT
-#define USBHS_HCSPARAMS_N_PTT(x)                 USB_HCSPARAMS_N_PTT(x)
-#define USBHS_HCSPARAMS_N_TT_MASK                USB_HCSPARAMS_N_TT_MASK
-#define USBHS_HCSPARAMS_N_TT_SHIFT               USB_HCSPARAMS_N_TT_SHIFT
-#define USBHS_HCSPARAMS_N_TT(x)                  USB_HCSPARAMS_N_TT(x)
-#define USBHS_HCCPARAMS_ADC_MASK                 USB_HCCPARAMS_ADC_MASK
-#define USBHS_HCCPARAMS_ADC_SHIFT                USB_HCCPARAMS_ADC_SHIFT
-#define USBHS_HCCPARAMS_ADC(x)                   USB_HCCPARAMS_ADC(x)
-#define USBHS_HCCPARAMS_PFL_MASK                 USB_HCCPARAMS_PFL_MASK
-#define USBHS_HCCPARAMS_PFL_SHIFT                USB_HCCPARAMS_PFL_SHIFT
-#define USBHS_HCCPARAMS_PFL(x)                   USB_HCCPARAMS_PFL(x)
-#define USBHS_HCCPARAMS_ASP_MASK                 USB_HCCPARAMS_ASP_MASK
-#define USBHS_HCCPARAMS_ASP_SHIFT                USB_HCCPARAMS_ASP_SHIFT
-#define USBHS_HCCPARAMS_ASP(x)                   USB_HCCPARAMS_ASP(x)
-#define USBHS_HCCPARAMS_IST_MASK                 USB_HCCPARAMS_IST_MASK
-#define USBHS_HCCPARAMS_IST_SHIFT                USB_HCCPARAMS_IST_SHIFT
-#define USBHS_HCCPARAMS_IST(x)                   USB_HCCPARAMS_IST(x)
-#define USBHS_HCCPARAMS_EECP_MASK                USB_HCCPARAMS_EECP_MASK
-#define USBHS_HCCPARAMS_EECP_SHIFT               USB_HCCPARAMS_EECP_SHIFT
-#define USBHS_HCCPARAMS_EECP(x)                  USB_HCCPARAMS_EECP(x)
-#define USBHS_DCIVERSION_DCIVERSION_MASK         USB_DCIVERSION_DCIVERSION_MASK
-#define USBHS_DCIVERSION_DCIVERSION_SHIFT        USB_DCIVERSION_DCIVERSION_SHIFT
-#define USBHS_DCIVERSION_DCIVERSION(x)           USB_DCIVERSION_DCIVERSION(x)
-#define USBHS_DCCPARAMS_DEN_MASK                 USB_DCCPARAMS_DEN_MASK
-#define USBHS_DCCPARAMS_DEN_SHIFT                USB_DCCPARAMS_DEN_SHIFT
-#define USBHS_DCCPARAMS_DEN(x)                   USB_DCCPARAMS_DEN(x)
-#define USBHS_DCCPARAMS_DC_MASK                  USB_DCCPARAMS_DC_MASK
-#define USBHS_DCCPARAMS_DC_SHIFT                 USB_DCCPARAMS_DC_SHIFT
-#define USBHS_DCCPARAMS_DC(x)                    USB_DCCPARAMS_DC(x)
-#define USBHS_DCCPARAMS_HC_MASK                  USB_DCCPARAMS_HC_MASK
-#define USBHS_DCCPARAMS_HC_SHIFT                 USB_DCCPARAMS_HC_SHIFT
-#define USBHS_DCCPARAMS_HC(x)                    USB_DCCPARAMS_HC(x)
-#define USBHS_USBCMD_RS_MASK                     USB_USBCMD_RS_MASK
-#define USBHS_USBCMD_RS_SHIFT                    USB_USBCMD_RS_SHIFT
-#define USBHS_USBCMD_RS(x)                       USB_USBCMD_RS(x)
-#define USBHS_USBCMD_RST_MASK                    USB_USBCMD_RST_MASK
-#define USBHS_USBCMD_RST_SHIFT                   USB_USBCMD_RST_SHIFT
-#define USBHS_USBCMD_RST(x)                      USB_USBCMD_RST(x)
-#define USBHS_USBCMD_FS_MASK                     USB_USBCMD_FS_1_MASK
-#define USBHS_USBCMD_FS_SHIFT                    USB_USBCMD_FS_1_SHIFT
-#define USBHS_USBCMD_FS(x)                       USB_USBCMD_FS_1(x)
-#define USBHS_USBCMD_PSE_MASK                    USB_USBCMD_PSE_MASK
-#define USBHS_USBCMD_PSE_SHIFT                   USB_USBCMD_PSE_SHIFT
-#define USBHS_USBCMD_PSE(x)                      USB_USBCMD_PSE(x)
-#define USBHS_USBCMD_ASE_MASK                    USB_USBCMD_ASE_MASK
-#define USBHS_USBCMD_ASE_SHIFT                   USB_USBCMD_ASE_SHIFT
-#define USBHS_USBCMD_ASE(x)                      USB_USBCMD_ASE(x)
-#define USBHS_USBCMD_IAA_MASK                    USB_USBCMD_IAA_MASK
-#define USBHS_USBCMD_IAA_SHIFT                   USB_USBCMD_IAA_SHIFT
-#define USBHS_USBCMD_IAA(x)                      USB_USBCMD_IAA(x)
-#define USBHS_USBCMD_ASP_MASK                    USB_USBCMD_ASP_MASK
-#define USBHS_USBCMD_ASP_SHIFT                   USB_USBCMD_ASP_SHIFT
-#define USBHS_USBCMD_ASP(x)                      USB_USBCMD_ASP(x)
-#define USBHS_USBCMD_ASPE_MASK                   USB_USBCMD_ASPE_MASK
-#define USBHS_USBCMD_ASPE_SHIFT                  USB_USBCMD_ASPE_SHIFT
-#define USBHS_USBCMD_ASPE(x)                     USB_USBCMD_ASPE(x)
-#define USBHS_USBCMD_ATDTW_MASK                  USB_USBCMD_ATDTW_MASK
-#define USBHS_USBCMD_ATDTW_SHIFT                 USB_USBCMD_ATDTW_SHIFT
-#define USBHS_USBCMD_ATDTW(x)                    USB_USBCMD_ATDTW(x)
-#define USBHS_USBCMD_SUTW_MASK                   USB_USBCMD_SUTW_MASK
-#define USBHS_USBCMD_SUTW_SHIFT                  USB_USBCMD_SUTW_SHIFT
-#define USBHS_USBCMD_SUTW(x)                     USB_USBCMD_SUTW(x)
-#define USBHS_USBCMD_FS2_MASK                    USB_USBCMD_FS_2_MASK
-#define USBHS_USBCMD_FS2_SHIFT                   USB_USBCMD_FS_2_SHIFT
-#define USBHS_USBCMD_FS2(x)                      USB_USBCMD_FS_2(x)
-#define USBHS_USBCMD_ITC_MASK                    USB_USBCMD_ITC_MASK
-#define USBHS_USBCMD_ITC_SHIFT                   USB_USBCMD_ITC_SHIFT
-#define USBHS_USBCMD_ITC(x)                      USB_USBCMD_ITC(x)
-#define USBHS_USBSTS_UI_MASK                     USB_USBSTS_UI_MASK
-#define USBHS_USBSTS_UI_SHIFT                    USB_USBSTS_UI_SHIFT
-#define USBHS_USBSTS_UI(x)                       USB_USBSTS_UI(x)
-#define USBHS_USBSTS_UEI_MASK                    USB_USBSTS_UEI_MASK
-#define USBHS_USBSTS_UEI_SHIFT                   USB_USBSTS_UEI_SHIFT
-#define USBHS_USBSTS_UEI(x)                      USB_USBSTS_UEI(x)
-#define USBHS_USBSTS_PCI_MASK                    USB_USBSTS_PCI_MASK
-#define USBHS_USBSTS_PCI_SHIFT                   USB_USBSTS_PCI_SHIFT
-#define USBHS_USBSTS_PCI(x)                      USB_USBSTS_PCI(x)
-#define USBHS_USBSTS_FRI_MASK                    USB_USBSTS_FRI_MASK
-#define USBHS_USBSTS_FRI_SHIFT                   USB_USBSTS_FRI_SHIFT
-#define USBHS_USBSTS_FRI(x)                      USB_USBSTS_FRI(x)
-#define USBHS_USBSTS_SEI_MASK                    USB_USBSTS_SEI_MASK
-#define USBHS_USBSTS_SEI_SHIFT                   USB_USBSTS_SEI_SHIFT
-#define USBHS_USBSTS_SEI(x)                      USB_USBSTS_SEI(x)
-#define USBHS_USBSTS_AAI_MASK                    USB_USBSTS_AAI_MASK
-#define USBHS_USBSTS_AAI_SHIFT                   USB_USBSTS_AAI_SHIFT
-#define USBHS_USBSTS_AAI(x)                      USB_USBSTS_AAI(x)
-#define USBHS_USBSTS_URI_MASK                    USB_USBSTS_URI_MASK
-#define USBHS_USBSTS_URI_SHIFT                   USB_USBSTS_URI_SHIFT
-#define USBHS_USBSTS_URI(x)                      USB_USBSTS_URI(x)
-#define USBHS_USBSTS_SRI_MASK                    USB_USBSTS_SRI_MASK
-#define USBHS_USBSTS_SRI_SHIFT                   USB_USBSTS_SRI_SHIFT
-#define USBHS_USBSTS_SRI(x)                      USB_USBSTS_SRI(x)
-#define USBHS_USBSTS_SLI_MASK                    USB_USBSTS_SLI_MASK
-#define USBHS_USBSTS_SLI_SHIFT                   USB_USBSTS_SLI_SHIFT
-#define USBHS_USBSTS_SLI(x)                      USB_USBSTS_SLI(x)
-#define USBHS_USBSTS_ULPII_MASK                  USB_USBSTS_ULPII_MASK
-#define USBHS_USBSTS_ULPII_SHIFT                 USB_USBSTS_ULPII_SHIFT
-#define USBHS_USBSTS_ULPII(x)                    USB_USBSTS_ULPII(x)
-#define USBHS_USBSTS_HCH_MASK                    USB_USBSTS_HCH_MASK
-#define USBHS_USBSTS_HCH_SHIFT                   USB_USBSTS_HCH_SHIFT
-#define USBHS_USBSTS_HCH(x)                      USB_USBSTS_HCH(x)
-#define USBHS_USBSTS_RCL_MASK                    USB_USBSTS_RCL_MASK
-#define USBHS_USBSTS_RCL_SHIFT                   USB_USBSTS_RCL_SHIFT
-#define USBHS_USBSTS_RCL(x)                      USB_USBSTS_RCL(x)
-#define USBHS_USBSTS_PS_MASK                     USB_USBSTS_PS_MASK
-#define USBHS_USBSTS_PS_SHIFT                    USB_USBSTS_PS_SHIFT
-#define USBHS_USBSTS_PS(x)                       USB_USBSTS_PS(x)
-#define USBHS_USBSTS_AS_MASK                     USB_USBSTS_AS_MASK
-#define USBHS_USBSTS_AS_SHIFT                    USB_USBSTS_AS_SHIFT
-#define USBHS_USBSTS_AS(x)                       USB_USBSTS_AS(x)
-#define USBHS_USBSTS_NAKI_MASK                   USB_USBSTS_NAKI_MASK
-#define USBHS_USBSTS_NAKI_SHIFT                  USB_USBSTS_NAKI_SHIFT
-#define USBHS_USBSTS_NAKI(x)                     USB_USBSTS_NAKI(x)
-#define USBHS_USBSTS_TI0_MASK                    USB_USBSTS_TI0_MASK
-#define USBHS_USBSTS_TI0_SHIFT                   USB_USBSTS_TI0_SHIFT
-#define USBHS_USBSTS_TI0(x)                      USB_USBSTS_TI0(x)
-#define USBHS_USBSTS_TI1_MASK                    USB_USBSTS_TI1_MASK
-#define USBHS_USBSTS_TI1_SHIFT                   USB_USBSTS_TI1_SHIFT
-#define USBHS_USBSTS_TI1(x)                      USB_USBSTS_TI1(x)
-#define USBHS_USBINTR_UE_MASK                    USB_USBINTR_UE_MASK
-#define USBHS_USBINTR_UE_SHIFT                   USB_USBINTR_UE_SHIFT
-#define USBHS_USBINTR_UE(x)                      USB_USBINTR_UE(x)
-#define USBHS_USBINTR_UEE_MASK                   USB_USBINTR_UEE_MASK
-#define USBHS_USBINTR_UEE_SHIFT                  USB_USBINTR_UEE_SHIFT
-#define USBHS_USBINTR_UEE(x)                     USB_USBINTR_UEE(x)
-#define USBHS_USBINTR_PCE_MASK                   USB_USBINTR_PCE_MASK
-#define USBHS_USBINTR_PCE_SHIFT                  USB_USBINTR_PCE_SHIFT
-#define USBHS_USBINTR_PCE(x)                     USB_USBINTR_PCE(x)
-#define USBHS_USBINTR_FRE_MASK                   USB_USBINTR_FRE_MASK
-#define USBHS_USBINTR_FRE_SHIFT                  USB_USBINTR_FRE_SHIFT
-#define USBHS_USBINTR_FRE(x)                     USB_USBINTR_FRE(x)
-#define USBHS_USBINTR_SEE_MASK                   USB_USBINTR_SEE_MASK
-#define USBHS_USBINTR_SEE_SHIFT                  USB_USBINTR_SEE_SHIFT
-#define USBHS_USBINTR_SEE(x)                     USB_USBINTR_SEE(x)
-#define USBHS_USBINTR_AAE_MASK                   USB_USBINTR_AAE_MASK
-#define USBHS_USBINTR_AAE_SHIFT                  USB_USBINTR_AAE_SHIFT
-#define USBHS_USBINTR_AAE(x)                     USB_USBINTR_AAE(x)
-#define USBHS_USBINTR_URE_MASK                   USB_USBINTR_URE_MASK
-#define USBHS_USBINTR_URE_SHIFT                  USB_USBINTR_URE_SHIFT
-#define USBHS_USBINTR_URE(x)                     USB_USBINTR_URE(x)
-#define USBHS_USBINTR_SRE_MASK                   USB_USBINTR_SRE_MASK
-#define USBHS_USBINTR_SRE_SHIFT                  USB_USBINTR_SRE_SHIFT
-#define USBHS_USBINTR_SRE(x)                     USB_USBINTR_SRE(x)
-#define USBHS_USBINTR_SLE_MASK                   USB_USBINTR_SLE_MASK
-#define USBHS_USBINTR_SLE_SHIFT                  USB_USBINTR_SLE_SHIFT
-#define USBHS_USBINTR_SLE(x)                     USB_USBINTR_SLE(x)
-#define USBHS_USBINTR_ULPIE_MASK                 USB_USBINTR_ULPIE_MASK
-#define USBHS_USBINTR_ULPIE_SHIFT                USB_USBINTR_ULPIE_SHIFT
-#define USBHS_USBINTR_ULPIE(x)                   USB_USBINTR_ULPIE(x)
-#define USBHS_USBINTR_NAKE_MASK                  USB_USBINTR_NAKE_MASK
-#define USBHS_USBINTR_NAKE_SHIFT                 USB_USBINTR_NAKE_SHIFT
-#define USBHS_USBINTR_NAKE(x)                    USB_USBINTR_NAKE(x)
-#define USBHS_USBINTR_UAIE_MASK                  USB_USBINTR_UAIE_MASK
-#define USBHS_USBINTR_UAIE_SHIFT                 USB_USBINTR_UAIE_SHIFT
-#define USBHS_USBINTR_UAIE(x)                    USB_USBINTR_UAIE(x)
-#define USBHS_USBINTR_UPIE_MASK                  USB_USBINTR_UPIE_MASK
-#define USBHS_USBINTR_UPIE_SHIFT                 USB_USBINTR_UPIE_SHIFT
-#define USBHS_USBINTR_UPIE(x)                    USB_USBINTR_UPIE(x)
-#define USBHS_USBINTR_TIE0_MASK                  USB_USBINTR_TIE0_MASK
-#define USBHS_USBINTR_TIE0_SHIFT                 USB_USBINTR_TIE0_SHIFT
-#define USBHS_USBINTR_TIE0(x)                    USB_USBINTR_TIE0(x)
-#define USBHS_USBINTR_TIE1_MASK                  USB_USBINTR_TIE1_MASK
-#define USBHS_USBINTR_TIE1_SHIFT                 USB_USBINTR_TIE1_SHIFT
-#define USBHS_USBINTR_TIE1(x)                    USB_USBINTR_TIE1(x)
-#define USBHS_FRINDEX_FRINDEX_MASK               USB_FRINDEX_FRINDEX_MASK
-#define USBHS_FRINDEX_FRINDEX_SHIFT              USB_FRINDEX_FRINDEX_SHIFT
-#define USBHS_FRINDEX_FRINDEX(x)                 USB_FRINDEX_FRINDEX(x)
-#define USBHS_DEVICEADDR_USBADRA_MASK            USB_DEVICEADDR_USBADRA_MASK
-#define USBHS_DEVICEADDR_USBADRA_SHIFT           USB_DEVICEADDR_USBADRA_SHIFT
-#define USBHS_DEVICEADDR_USBADRA(x)              USB_DEVICEADDR_USBADRA(x)
-#define USBHS_DEVICEADDR_USBADR_MASK             USB_DEVICEADDR_USBADR_MASK
-#define USBHS_DEVICEADDR_USBADR_SHIFT            USB_DEVICEADDR_USBADR_SHIFT
-#define USBHS_DEVICEADDR_USBADR(x)               USB_DEVICEADDR_USBADR(x)
-#define USBHS_PERIODICLISTBASE_PERBASE_MASK      USB_PERIODICLISTBASE_BASEADR_MASK
-#define USBHS_PERIODICLISTBASE_PERBASE_SHIFT     USB_PERIODICLISTBASE_BASEADR_SHIFT
-#define USBHS_PERIODICLISTBASE_PERBASE(x)        USB_PERIODICLISTBASE_BASEADR(x)
-#define USBHS_ASYNCLISTADDR_ASYBASE_MASK         USB_ASYNCLISTADDR_ASYBASE_MASK
-#define USBHS_ASYNCLISTADDR_ASYBASE_SHIFT        USB_ASYNCLISTADDR_ASYBASE_SHIFT
-#define USBHS_ASYNCLISTADDR_ASYBASE(x)           USB_ASYNCLISTADDR_ASYBASE(x)
-#define USBHS_EPLISTADDR_EPBASE_MASK             USB_ENDPTLISTADDR_EPBASE_MASK
-#define USBHS_EPLISTADDR_EPBASE_SHIFT            USB_ENDPTLISTADDR_EPBASE_SHIFT
-#define USBHS_EPLISTADDR_EPBASE(x)               USB_ENDPTLISTADDR_EPBASE(x)
-#define USBHS_BURSTSIZE_RXPBURST_MASK            USB_BURSTSIZE_RXPBURST_MASK
-#define USBHS_BURSTSIZE_RXPBURST_SHIFT           USB_BURSTSIZE_RXPBURST_SHIFT
-#define USBHS_BURSTSIZE_RXPBURST(x)              USB_BURSTSIZE_RXPBURST(x)
-#define USBHS_BURSTSIZE_TXPBURST_MASK            USB_BURSTSIZE_TXPBURST_MASK
-#define USBHS_BURSTSIZE_TXPBURST_SHIFT           USB_BURSTSIZE_TXPBURST_SHIFT
-#define USBHS_BURSTSIZE_TXPBURST(x)              USB_BURSTSIZE_TXPBURST(x)
-#define USBHS_TXFILLTUNING_TXSCHOH_MASK          USB_TXFILLTUNING_TXSCHOH_MASK
-#define USBHS_TXFILLTUNING_TXSCHOH_SHIFT         USB_TXFILLTUNING_TXSCHOH_SHIFT
-#define USBHS_TXFILLTUNING_TXSCHOH(x)            USB_TXFILLTUNING_TXSCHOH(x)
-#define USBHS_TXFILLTUNING_TXSCHHEALTH_MASK      USB_TXFILLTUNING_TXSCHHEALTH_MASK
-#define USBHS_TXFILLTUNING_TXSCHHEALTH_SHIFT     USB_TXFILLTUNING_TXSCHHEALTH_SHIFT
-#define USBHS_TXFILLTUNING_TXSCHHEALTH(x)        USB_TXFILLTUNING_TXSCHHEALTH(x)
-#define USBHS_TXFILLTUNING_TXFIFOTHRES_MASK      USB_TXFILLTUNING_TXFIFOTHRES_MASK
-#define USBHS_TXFILLTUNING_TXFIFOTHRES_SHIFT     USB_TXFILLTUNING_TXFIFOTHRES_SHIFT
-#define USBHS_TXFILLTUNING_TXFIFOTHRES(x)        USB_TXFILLTUNING_TXFIFOTHRES(x)
-#define USBHS_ENDPTNAK_EPRN_MASK                 USB_ENDPTNAK_EPRN_MASK
-#define USBHS_ENDPTNAK_EPRN_SHIFT                USB_ENDPTNAK_EPRN_SHIFT
-#define USBHS_ENDPTNAK_EPRN(x)                   USB_ENDPTNAK_EPRN(x)
-#define USBHS_ENDPTNAK_EPTN_MASK                 USB_ENDPTNAK_EPTN_MASK
-#define USBHS_ENDPTNAK_EPTN_SHIFT                USB_ENDPTNAK_EPTN_SHIFT
-#define USBHS_ENDPTNAK_EPTN(x)                   USB_ENDPTNAK_EPTN(x)
-#define USBHS_ENDPTNAKEN_EPRNE_MASK              USB_ENDPTNAKEN_EPRNE_MASK
-#define USBHS_ENDPTNAKEN_EPRNE_SHIFT             USB_ENDPTNAKEN_EPRNE_SHIFT
-#define USBHS_ENDPTNAKEN_EPRNE(x)                USB_ENDPTNAKEN_EPRNE(x)
-#define USBHS_ENDPTNAKEN_EPTNE_MASK              USB_ENDPTNAKEN_EPTNE_MASK
-#define USBHS_ENDPTNAKEN_EPTNE_SHIFT             USB_ENDPTNAKEN_EPTNE_SHIFT
-#define USBHS_ENDPTNAKEN_EPTNE(x)                USB_ENDPTNAKEN_EPTNE(x)
-#define USBHS_CONFIGFLAG_CF_MASK                 USB_CONFIGFLAG_CF_MASK
-#define USBHS_CONFIGFLAG_CF_SHIFT                USB_CONFIGFLAG_CF_SHIFT
-#define USBHS_CONFIGFLAG_CF(x)                   USB_CONFIGFLAG_CF(x)
-#define USBHS_PORTSC1_CCS_MASK                   USB_PORTSC1_CCS_MASK
-#define USBHS_PORTSC1_CCS_SHIFT                  USB_PORTSC1_CCS_SHIFT
-#define USBHS_PORTSC1_CCS(x)                     USB_PORTSC1_CCS(x)
-#define USBHS_PORTSC1_CSC_MASK                   USB_PORTSC1_CSC_MASK
-#define USBHS_PORTSC1_CSC_SHIFT                  USB_PORTSC1_CSC_SHIFT
-#define USBHS_PORTSC1_CSC(x)                     USB_PORTSC1_CSC(x)
-#define USBHS_PORTSC1_PE_MASK                    USB_PORTSC1_PE_MASK
-#define USBHS_PORTSC1_PE_SHIFT                   USB_PORTSC1_PE_SHIFT
-#define USBHS_PORTSC1_PE(x)                      USB_PORTSC1_PE(x)
-#define USBHS_PORTSC1_PEC_MASK                   USB_PORTSC1_PEC_MASK
-#define USBHS_PORTSC1_PEC_SHIFT                  USB_PORTSC1_PEC_SHIFT
-#define USBHS_PORTSC1_PEC(x)                     USB_PORTSC1_PEC(x)
-#define USBHS_PORTSC1_OCA_MASK                   USB_PORTSC1_OCA_MASK
-#define USBHS_PORTSC1_OCA_SHIFT                  USB_PORTSC1_OCA_SHIFT
-#define USBHS_PORTSC1_OCA(x)                     USB_PORTSC1_OCA(x)
-#define USBHS_PORTSC1_OCC_MASK                   USB_PORTSC1_OCC_MASK
-#define USBHS_PORTSC1_OCC_SHIFT                  USB_PORTSC1_OCC_SHIFT
-#define USBHS_PORTSC1_OCC(x)                     USB_PORTSC1_OCC(x)
-#define USBHS_PORTSC1_FPR_MASK                   USB_PORTSC1_FPR_MASK
-#define USBHS_PORTSC1_FPR_SHIFT                  USB_PORTSC1_FPR_SHIFT
-#define USBHS_PORTSC1_FPR(x)                     USB_PORTSC1_FPR(x)
-#define USBHS_PORTSC1_SUSP_MASK                  USB_PORTSC1_SUSP_MASK
-#define USBHS_PORTSC1_SUSP_SHIFT                 USB_PORTSC1_SUSP_SHIFT
-#define USBHS_PORTSC1_SUSP(x)                    USB_PORTSC1_SUSP(x)
-#define USBHS_PORTSC1_PR_MASK                    USB_PORTSC1_PR_MASK
-#define USBHS_PORTSC1_PR_SHIFT                   USB_PORTSC1_PR_SHIFT
-#define USBHS_PORTSC1_PR(x)                      USB_PORTSC1_PR(x)
-#define USBHS_PORTSC1_HSP_MASK                   USB_PORTSC1_HSP_MASK
-#define USBHS_PORTSC1_HSP_SHIFT                  USB_PORTSC1_HSP_SHIFT
-#define USBHS_PORTSC1_HSP(x)                     USB_PORTSC1_HSP(x)
-#define USBHS_PORTSC1_LS_MASK                    USB_PORTSC1_LS_MASK
-#define USBHS_PORTSC1_LS_SHIFT                   USB_PORTSC1_LS_SHIFT
-#define USBHS_PORTSC1_LS(x)                      USB_PORTSC1_LS(x)
-#define USBHS_PORTSC1_PP_MASK                    USB_PORTSC1_PP_MASK
-#define USBHS_PORTSC1_PP_SHIFT                   USB_PORTSC1_PP_SHIFT
-#define USBHS_PORTSC1_PP(x)                      USB_PORTSC1_PP(x)
-#define USBHS_PORTSC1_PO_MASK                    USB_PORTSC1_PO_MASK
-#define USBHS_PORTSC1_PO_SHIFT                   USB_PORTSC1_PO_SHIFT
-#define USBHS_PORTSC1_PO(x)                      USB_PORTSC1_PO(x)
-#define USBHS_PORTSC1_PIC_MASK                   USB_PORTSC1_PIC_MASK
-#define USBHS_PORTSC1_PIC_SHIFT                  USB_PORTSC1_PIC_SHIFT
-#define USBHS_PORTSC1_PIC(x)                     USB_PORTSC1_PIC(x)
-#define USBHS_PORTSC1_PTC_MASK                   USB_PORTSC1_PTC_MASK
-#define USBHS_PORTSC1_PTC_SHIFT                  USB_PORTSC1_PTC_SHIFT
-#define USBHS_PORTSC1_PTC(x)                     USB_PORTSC1_PTC(x)
-#define USBHS_PORTSC1_WKCN_MASK                  USB_PORTSC1_WKCN_MASK
-#define USBHS_PORTSC1_WKCN_SHIFT                 USB_PORTSC1_WKCN_SHIFT
-#define USBHS_PORTSC1_WKCN(x)                    USB_PORTSC1_WKCN(x)
-#define USBHS_PORTSC1_WKDS_MASK                  USB_PORTSC1_WKDC_MASK
-#define USBHS_PORTSC1_WKDS_SHIFT                 USB_PORTSC1_WKDC_SHIFT
-#define USBHS_PORTSC1_WKDS(x)                    USB_PORTSC1_WKDC(x)
-#define USBHS_PORTSC1_WKOC_MASK                  USB_PORTSC1_WKOC_MASK
-#define USBHS_PORTSC1_WKOC_SHIFT                 USB_PORTSC1_WKOC_SHIFT
-#define USBHS_PORTSC1_WKOC(x)                    USB_PORTSC1_WKOC(x)
-#define USBHS_PORTSC1_PHCD_MASK                  USB_PORTSC1_PHCD_MASK
-#define USBHS_PORTSC1_PHCD_SHIFT                 USB_PORTSC1_PHCD_SHIFT
-#define USBHS_PORTSC1_PHCD(x)                    USB_PORTSC1_PHCD(x)
-#define USBHS_PORTSC1_PFSC_MASK                  USB_PORTSC1_PFSC_MASK
-#define USBHS_PORTSC1_PFSC_SHIFT                 USB_PORTSC1_PFSC_SHIFT
-#define USBHS_PORTSC1_PFSC(x)                    USB_PORTSC1_PFSC(x)
-#define USBHS_PORTSC1_PTS2_MASK                  USB_PORTSC1_PTS_2_MASK
-#define USBHS_PORTSC1_PTS2_SHIFT                 USB_PORTSC1_PTS_2_SHIFT
-#define USBHS_PORTSC1_PTS2(x)                    USB_PORTSC1_PTS_2(x)
-#define USBHS_PORTSC1_PSPD_MASK                  USB_PORTSC1_PSPD_MASK
-#define USBHS_PORTSC1_PSPD_SHIFT                 USB_PORTSC1_PSPD_SHIFT
-#define USBHS_PORTSC1_PSPD(x)                    USB_PORTSC1_PSPD(x)
-#define USBHS_PORTSC1_PTW_MASK                   USB_PORTSC1_PTW_MASK
-#define USBHS_PORTSC1_PTW_SHIFT                  USB_PORTSC1_PTW_SHIFT
-#define USBHS_PORTSC1_PTW(x)                     USB_PORTSC1_PTW(x)
-#define USBHS_PORTSC1_STS_MASK                   USB_PORTSC1_STS_MASK
-#define USBHS_PORTSC1_STS_SHIFT                  USB_PORTSC1_STS_SHIFT
-#define USBHS_PORTSC1_STS(x)                     USB_PORTSC1_STS(x)
-#define USBHS_PORTSC1_PTS_MASK                   USB_PORTSC1_PTS_1_MASK
-#define USBHS_PORTSC1_PTS_SHIFT                  USB_PORTSC1_PTS_1_SHIFT
-#define USBHS_PORTSC1_PTS(x)                     USB_PORTSC1_PTS_1(x)
-#define USBHS_OTGSC_VD_MASK                      USB_OTGSC_VD_MASK
-#define USBHS_OTGSC_VD_SHIFT                     USB_OTGSC_VD_SHIFT
-#define USBHS_OTGSC_VD(x)                        USB_OTGSC_VD(x)
-#define USBHS_OTGSC_VC_MASK                      USB_OTGSC_VC_MASK
-#define USBHS_OTGSC_VC_SHIFT                     USB_OTGSC_VC_SHIFT
-#define USBHS_OTGSC_VC(x)                        USB_OTGSC_VC(x)
-#define USBHS_OTGSC_OT_MASK                      USB_OTGSC_OT_MASK
-#define USBHS_OTGSC_OT_SHIFT                     USB_OTGSC_OT_SHIFT
-#define USBHS_OTGSC_OT(x)                        USB_OTGSC_OT(x)
-#define USBHS_OTGSC_DP_MASK                      USB_OTGSC_DP_MASK
-#define USBHS_OTGSC_DP_SHIFT                     USB_OTGSC_DP_SHIFT
-#define USBHS_OTGSC_DP(x)                        USB_OTGSC_DP(x)
-#define USBHS_OTGSC_IDPU_MASK                    USB_OTGSC_IDPU_MASK
-#define USBHS_OTGSC_IDPU_SHIFT                   USB_OTGSC_IDPU_SHIFT
-#define USBHS_OTGSC_IDPU(x)                      USB_OTGSC_IDPU(x)
-#define USBHS_OTGSC_ID_MASK                      USB_OTGSC_ID_MASK
-#define USBHS_OTGSC_ID_SHIFT                     USB_OTGSC_ID_SHIFT
-#define USBHS_OTGSC_ID(x)                        USB_OTGSC_ID(x)
-#define USBHS_OTGSC_AVV_MASK                     USB_OTGSC_AVV_MASK
-#define USBHS_OTGSC_AVV_SHIFT                    USB_OTGSC_AVV_SHIFT
-#define USBHS_OTGSC_AVV(x)                       USB_OTGSC_AVV(x)
-#define USBHS_OTGSC_ASV_MASK                     USB_OTGSC_ASV_MASK
-#define USBHS_OTGSC_ASV_SHIFT                    USB_OTGSC_ASV_SHIFT
-#define USBHS_OTGSC_ASV(x)                       USB_OTGSC_ASV(x)
-#define USBHS_OTGSC_BSV_MASK                     USB_OTGSC_BSV_MASK
-#define USBHS_OTGSC_BSV_SHIFT                    USB_OTGSC_BSV_SHIFT
-#define USBHS_OTGSC_BSV(x)                       USB_OTGSC_BSV(x)
-#define USBHS_OTGSC_BSE_MASK                     USB_OTGSC_BSE_MASK
-#define USBHS_OTGSC_BSE_SHIFT                    USB_OTGSC_BSE_SHIFT
-#define USBHS_OTGSC_BSE(x)                       USB_OTGSC_BSE(x)
-#define USBHS_OTGSC_MST_MASK                     USB_OTGSC_TOG_1MS_MASK
-#define USBHS_OTGSC_MST_SHIFT                    USB_OTGSC_TOG_1MS_SHIFT
-#define USBHS_OTGSC_MST(x)                       USB_OTGSC_TOG_1MS(x)
-#define USBHS_OTGSC_DPS_MASK                     USB_OTGSC_DPS_MASK
-#define USBHS_OTGSC_DPS_SHIFT                    USB_OTGSC_DPS_SHIFT
-#define USBHS_OTGSC_DPS(x)                       USB_OTGSC_DPS(x)
-#define USBHS_OTGSC_IDIS_MASK                    USB_OTGSC_IDIS_MASK
-#define USBHS_OTGSC_IDIS_SHIFT                   USB_OTGSC_IDIS_SHIFT
-#define USBHS_OTGSC_IDIS(x)                      USB_OTGSC_IDIS(x)
-#define USBHS_OTGSC_AVVIS_MASK                   USB_OTGSC_AVVIS_MASK
-#define USBHS_OTGSC_AVVIS_SHIFT                  USB_OTGSC_AVVIS_SHIFT
-#define USBHS_OTGSC_AVVIS(x)                     USB_OTGSC_AVVIS(x)
-#define USBHS_OTGSC_ASVIS_MASK                   USB_OTGSC_ASVIS_MASK
-#define USBHS_OTGSC_ASVIS_SHIFT                  USB_OTGSC_ASVIS_SHIFT
-#define USBHS_OTGSC_ASVIS(x)                     USB_OTGSC_ASVIS(x)
-#define USBHS_OTGSC_BSVIS_MASK                   USB_OTGSC_BSVIS_MASK
-#define USBHS_OTGSC_BSVIS_SHIFT                  USB_OTGSC_BSVIS_SHIFT
-#define USBHS_OTGSC_BSVIS(x)                     USB_OTGSC_BSVIS(x)
-#define USBHS_OTGSC_BSEIS_MASK                   USB_OTGSC_BSEIS_MASK
-#define USBHS_OTGSC_BSEIS_SHIFT                  USB_OTGSC_BSEIS_SHIFT
-#define USBHS_OTGSC_BSEIS(x)                     USB_OTGSC_BSEIS(x)
-#define USBHS_OTGSC_MSS_MASK                     USB_OTGSC_STATUS_1MS_MASK
-#define USBHS_OTGSC_MSS_SHIFT                    USB_OTGSC_STATUS_1MS_SHIFT
-#define USBHS_OTGSC_MSS(x)                       USB_OTGSC_STATUS_1MS(x)
-#define USBHS_OTGSC_DPIS_MASK                    USB_OTGSC_DPIS_MASK
-#define USBHS_OTGSC_DPIS_SHIFT                   USB_OTGSC_DPIS_SHIFT
-#define USBHS_OTGSC_DPIS(x)                      USB_OTGSC_DPIS(x)
-#define USBHS_OTGSC_IDIE_MASK                    USB_OTGSC_IDIE_MASK
-#define USBHS_OTGSC_IDIE_SHIFT                   USB_OTGSC_IDIE_SHIFT
-#define USBHS_OTGSC_IDIE(x)                      USB_OTGSC_IDIE(x)
-#define USBHS_OTGSC_AVVIE_MASK                   USB_OTGSC_AVVIE_MASK
-#define USBHS_OTGSC_AVVIE_SHIFT                  USB_OTGSC_AVVIE_SHIFT
-#define USBHS_OTGSC_AVVIE(x)                     USB_OTGSC_AVVIE(x)
-#define USBHS_OTGSC_ASVIE_MASK                   USB_OTGSC_ASVIE_MASK
-#define USBHS_OTGSC_ASVIE_SHIFT                  USB_OTGSC_ASVIE_SHIFT
-#define USBHS_OTGSC_ASVIE(x)                     USB_OTGSC_ASVIE(x)
-#define USBHS_OTGSC_BSVIE_MASK                   USB_OTGSC_BSVIE_MASK
-#define USBHS_OTGSC_BSVIE_SHIFT                  USB_OTGSC_BSVIE_SHIFT
-#define USBHS_OTGSC_BSVIE(x)                     USB_OTGSC_BSVIE(x)
-#define USBHS_OTGSC_BSEIE_MASK                   USB_OTGSC_BSEIE_MASK
-#define USBHS_OTGSC_BSEIE_SHIFT                  USB_OTGSC_BSEIE_SHIFT
-#define USBHS_OTGSC_BSEIE(x)                     USB_OTGSC_BSEIE(x)
-#define USBHS_OTGSC_MSE_MASK                     USB_OTGSC_EN_1MS_MASK
-#define USBHS_OTGSC_MSE_SHIFT                    USB_OTGSC_EN_1MS_SHIFT
-#define USBHS_OTGSC_MSE(x)                       USB_OTGSC_EN_1MS(x)
-#define USBHS_OTGSC_DPIE_MASK                    USB_OTGSC_DPIE_MASK
-#define USBHS_OTGSC_DPIE_SHIFT                   USB_OTGSC_DPIE_SHIFT
-#define USBHS_OTGSC_DPIE(x)                      USB_OTGSC_DPIE(x)
-#define USBHS_USBMODE_CM_MASK                    USB_USBMODE_CM_MASK
-#define USBHS_USBMODE_CM_SHIFT                   USB_USBMODE_CM_SHIFT
-#define USBHS_USBMODE_CM(x)                      USB_USBMODE_CM(x)
-#define USBHS_USBMODE_ES_MASK                    USB_USBMODE_ES_MASK
-#define USBHS_USBMODE_ES_SHIFT                   USB_USBMODE_ES_SHIFT
-#define USBHS_USBMODE_ES(x)                      USB_USBMODE_ES(x)
-#define USBHS_USBMODE_SLOM_MASK                  USB_USBMODE_SLOM_MASK
-#define USBHS_USBMODE_SLOM_SHIFT                 USB_USBMODE_SLOM_SHIFT
-#define USBHS_USBMODE_SLOM(x)                    USB_USBMODE_SLOM(x)
-#define USBHS_USBMODE_SDIS_MASK                  USB_USBMODE_SDIS_MASK
-#define USBHS_USBMODE_SDIS_SHIFT                 USB_USBMODE_SDIS_SHIFT
-#define USBHS_USBMODE_SDIS(x)                    USB_USBMODE_SDIS(x)
-#define USBHS_EPSETUPSR_EPSETUPSTAT_MASK         USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK
-#define USBHS_EPSETUPSR_EPSETUPSTAT_SHIFT        USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT
-#define USBHS_EPSETUPSR_EPSETUPSTAT(x)           USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)
-#define USBHS_EPPRIME_PERB_MASK                  USB_ENDPTPRIME_PERB_MASK
-#define USBHS_EPPRIME_PERB_SHIFT                 USB_ENDPTPRIME_PERB_SHIFT
-#define USBHS_EPPRIME_PERB(x)                    USB_ENDPTPRIME_PERB(x)
-#define USBHS_EPPRIME_PETB_MASK                  USB_ENDPTPRIME_PETB_MASK
-#define USBHS_EPPRIME_PETB_SHIFT                 USB_ENDPTPRIME_PETB_SHIFT
-#define USBHS_EPPRIME_PETB(x)                    USB_ENDPTPRIME_PETB(x)
-#define USBHS_EPFLUSH_FERB_MASK                  USB_ENDPTFLUSH_FERB_MASK
-#define USBHS_EPFLUSH_FERB_SHIFT                 USB_ENDPTFLUSH_FERB_SHIFT
-#define USBHS_EPFLUSH_FERB(x)                    USB_ENDPTFLUSH_FERB(x)
-#define USBHS_EPFLUSH_FETB_MASK                  USB_ENDPTFLUSH_FETB_MASK
-#define USBHS_EPFLUSH_FETB_SHIFT                 USB_ENDPTFLUSH_FETB_SHIFT
-#define USBHS_EPFLUSH_FETB(x)                    USB_ENDPTFLUSH_FETB(x)
-#define USBHS_EPSR_ERBR_MASK                     USB_ENDPTSTAT_ERBR_MASK
-#define USBHS_EPSR_ERBR_SHIFT                    USB_ENDPTSTAT_ERBR_SHIFT
-#define USBHS_EPSR_ERBR(x)                       USB_ENDPTSTAT_ERBR(x)
-#define USBHS_EPSR_ETBR_MASK                     USB_ENDPTSTAT_ETBR_MASK
-#define USBHS_EPSR_ETBR_SHIFT                    USB_ENDPTSTAT_ETBR_SHIFT
-#define USBHS_EPSR_ETBR(x)                       USB_ENDPTSTAT_ETBR(x)
-#define USBHS_EPCOMPLETE_ERCE_MASK               USB_ENDPTCOMPLETE_ERCE_MASK
-#define USBHS_EPCOMPLETE_ERCE_SHIFT              USB_ENDPTCOMPLETE_ERCE_SHIFT
-#define USBHS_EPCOMPLETE_ERCE(x)                 USB_ENDPTCOMPLETE_ERCE(x)
-#define USBHS_EPCOMPLETE_ETCE_MASK               USB_ENDPTCOMPLETE_ETCE_MASK
-#define USBHS_EPCOMPLETE_ETCE_SHIFT              USB_ENDPTCOMPLETE_ETCE_SHIFT
-#define USBHS_EPCOMPLETE_ETCE(x)                 USB_ENDPTCOMPLETE_ETCE(x)
-#define USBHS_EPCR0_RXS_MASK                     USB_ENDPTCTRL0_RXS_MASK
-#define USBHS_EPCR0_RXS_SHIFT                    USB_ENDPTCTRL0_RXS_SHIFT
-#define USBHS_EPCR0_RXS(x)                       USB_ENDPTCTRL0_RXS(x)
-#define USBHS_EPCR0_RXT_MASK                     USB_ENDPTCTRL0_RXT_MASK
-#define USBHS_EPCR0_RXT_SHIFT                    USB_ENDPTCTRL0_RXT_SHIFT
-#define USBHS_EPCR0_RXT(x)                       USB_ENDPTCTRL0_RXT(x)
-#define USBHS_EPCR0_RXE_MASK                     USB_ENDPTCTRL0_RXE_MASK
-#define USBHS_EPCR0_RXE_SHIFT                    USB_ENDPTCTRL0_RXE_SHIFT
-#define USBHS_EPCR0_RXE(x)                       USB_ENDPTCTRL0_RXE(x)
-#define USBHS_EPCR0_TXS_MASK                     USB_ENDPTCTRL0_TXS_MASK
-#define USBHS_EPCR0_TXS_SHIFT                    USB_ENDPTCTRL0_TXS_SHIFT
-#define USBHS_EPCR0_TXS(x)                       USB_ENDPTCTRL0_TXS(x)
-#define USBHS_EPCR0_TXT_MASK                     USB_ENDPTCTRL0_TXT_MASK
-#define USBHS_EPCR0_TXT_SHIFT                    USB_ENDPTCTRL0_TXT_SHIFT
-#define USBHS_EPCR0_TXT(x)                       USB_ENDPTCTRL0_TXT(x)
-#define USBHS_EPCR0_TXE_MASK                     USB_ENDPTCTRL0_TXE_MASK
-#define USBHS_EPCR0_TXE_SHIFT                    USB_ENDPTCTRL0_TXE_SHIFT
-#define USBHS_EPCR0_TXE(x)                       USB_ENDPTCTRL0_TXE(x)
-#define USBHS_EPCR_RXS_MASK                      USB_ENDPTCTRL_RXS_MASK
-#define USBHS_EPCR_RXS_SHIFT                     USB_ENDPTCTRL_RXS_SHIFT
-#define USBHS_EPCR_RXS(x)                        USB_ENDPTCTRL_RXS(x)
-#define USBHS_EPCR_RXD_MASK                      USB_ENDPTCTRL_RXD_MASK
-#define USBHS_EPCR_RXD_SHIFT                     USB_ENDPTCTRL_RXD_SHIFT
-#define USBHS_EPCR_RXD(x)                        USB_ENDPTCTRL_RXD(x)
-#define USBHS_EPCR_RXT_MASK                      USB_ENDPTCTRL_RXT_MASK
-#define USBHS_EPCR_RXT_SHIFT                     USB_ENDPTCTRL_RXT_SHIFT
-#define USBHS_EPCR_RXT(x)                        USB_ENDPTCTRL_RXT(x)
-#define USBHS_EPCR_RXI_MASK                      USB_ENDPTCTRL_RXI_MASK
-#define USBHS_EPCR_RXI_SHIFT                     USB_ENDPTCTRL_RXI_SHIFT
-#define USBHS_EPCR_RXI(x)                        USB_ENDPTCTRL_RXI(x)
-#define USBHS_EPCR_RXR_MASK                      USB_ENDPTCTRL_RXR_MASK
-#define USBHS_EPCR_RXR_SHIFT                     USB_ENDPTCTRL_RXR_SHIFT
-#define USBHS_EPCR_RXR(x)                        USB_ENDPTCTRL_RXR(x)
-#define USBHS_EPCR_RXE_MASK                      USB_ENDPTCTRL_RXE_MASK
-#define USBHS_EPCR_RXE_SHIFT                     USB_ENDPTCTRL_RXE_SHIFT
-#define USBHS_EPCR_RXE(x)                        USB_ENDPTCTRL_RXE(x)
-#define USBHS_EPCR_TXS_MASK                      USB_ENDPTCTRL_TXS_MASK
-#define USBHS_EPCR_TXS_SHIFT                     USB_ENDPTCTRL_TXS_SHIFT
-#define USBHS_EPCR_TXS(x)                        USB_ENDPTCTRL_TXS(x)
-#define USBHS_EPCR_TXD_MASK                      USB_ENDPTCTRL_TXD_MASK
-#define USBHS_EPCR_TXD_SHIFT                     USB_ENDPTCTRL_TXD_SHIFT
-#define USBHS_EPCR_TXD(x)                        USB_ENDPTCTRL_TXD(x)
-#define USBHS_EPCR_TXT_MASK                      USB_ENDPTCTRL_TXT_MASK
-#define USBHS_EPCR_TXT_SHIFT                     USB_ENDPTCTRL_TXT_SHIFT
-#define USBHS_EPCR_TXT(x)                        USB_ENDPTCTRL_TXT(x)
-#define USBHS_EPCR_TXI_MASK                      USB_ENDPTCTRL_TXI_MASK
-#define USBHS_EPCR_TXI_SHIFT                     USB_ENDPTCTRL_TXI_SHIFT
-#define USBHS_EPCR_TXI(x)                        USB_ENDPTCTRL_TXI(x)
-#define USBHS_EPCR_TXR_MASK                      USB_ENDPTCTRL_TXR_MASK
-#define USBHS_EPCR_TXR_SHIFT                     USB_ENDPTCTRL_TXR_SHIFT
-#define USBHS_EPCR_TXR(x)                        USB_ENDPTCTRL_TXR(x)
-#define USBHS_EPCR_TXE_MASK                      USB_ENDPTCTRL_TXE_MASK
-#define USBHS_EPCR_TXE_SHIFT                     USB_ENDPTCTRL_TXE_SHIFT
-#define USBHS_EPCR_TXE(x)                        USB_ENDPTCTRL_TXE(x)
-#define USBHS_EPCR_COUNT                         USB_ENDPTCTRL_COUNT
-#define USBHS_Type                               USB_Type
-#define USBHS_BASE_ADDRS                         { USB1_BASE, USB2_BASE }
-#define USBHS_IRQS                               { USB_OTG1_IRQn, USB_OTG2_IRQn }
-#define USBHS_IRQHandler                         USB_OTG1_IRQHandler
-
+#define GPTIMER0CTL                          GPTIMER0CTRL
+#define GPTIMER1CTL                          GPTIMER1CTRL
+#define USB_SBUSCFG                          SBUSCFG
+#define EPLISTADDR                           ENDPTLISTADDR
+#define EPSETUPSR                            ENDPTSETUPSTAT
+#define EPPRIME                              ENDPTPRIME
+#define EPFLUSH                              ENDPTFLUSH
+#define EPSR                                 ENDPTSTAT
+#define EPCOMPLETE                           ENDPTCOMPLETE
+#define EPCR                                 ENDPTCTRL
+#define EPCR0                                ENDPTCTRL0
+#define USBHS_ID_ID_MASK                     USB_ID_ID_MASK
+#define USBHS_ID_ID_SHIFT                    USB_ID_ID_SHIFT
+#define USBHS_ID_ID(x)                       USB_ID_ID(x)
+#define USBHS_ID_NID_MASK                    USB_ID_NID_MASK
+#define USBHS_ID_NID_SHIFT                   USB_ID_NID_SHIFT
+#define USBHS_ID_NID(x)                      USB_ID_NID(x)
+#define USBHS_ID_REVISION_MASK               USB_ID_REVISION_MASK
+#define USBHS_ID_REVISION_SHIFT              USB_ID_REVISION_SHIFT
+#define USBHS_ID_REVISION(x)                 USB_ID_REVISION(x)
+#define USBHS_HWGENERAL_PHYW_MASK            USB_HWGENERAL_PHYW_MASK
+#define USBHS_HWGENERAL_PHYW_SHIFT           USB_HWGENERAL_PHYW_SHIFT
+#define USBHS_HWGENERAL_PHYW(x)              USB_HWGENERAL_PHYW(x)
+#define USBHS_HWGENERAL_PHYM_MASK            USB_HWGENERAL_PHYM_MASK
+#define USBHS_HWGENERAL_PHYM_SHIFT           USB_HWGENERAL_PHYM_SHIFT
+#define USBHS_HWGENERAL_PHYM(x)              USB_HWGENERAL_PHYM(x)
+#define USBHS_HWGENERAL_SM_MASK              USB_HWGENERAL_SM_MASK
+#define USBHS_HWGENERAL_SM_SHIFT             USB_HWGENERAL_SM_SHIFT
+#define USBHS_HWGENERAL_SM(x)                USB_HWGENERAL_SM(x)
+#define USBHS_HWHOST_HC_MASK                 USB_HWHOST_HC_MASK
+#define USBHS_HWHOST_HC_SHIFT                USB_HWHOST_HC_SHIFT
+#define USBHS_HWHOST_HC(x)                   USB_HWHOST_HC(x)
+#define USBHS_HWHOST_NPORT_MASK              USB_HWHOST_NPORT_MASK
+#define USBHS_HWHOST_NPORT_SHIFT             USB_HWHOST_NPORT_SHIFT
+#define USBHS_HWHOST_NPORT(x)                USB_HWHOST_NPORT(x)
+#define USBHS_HWDEVICE_DC_MASK               USB_HWDEVICE_DC_MASK
+#define USBHS_HWDEVICE_DC_SHIFT              USB_HWDEVICE_DC_SHIFT
+#define USBHS_HWDEVICE_DC(x)                 USB_HWDEVICE_DC(x)
+#define USBHS_HWDEVICE_DEVEP_MASK            USB_HWDEVICE_DEVEP_MASK
+#define USBHS_HWDEVICE_DEVEP_SHIFT           USB_HWDEVICE_DEVEP_SHIFT
+#define USBHS_HWDEVICE_DEVEP(x)              USB_HWDEVICE_DEVEP(x)
+#define USBHS_HWTXBUF_TXBURST_MASK           USB_HWTXBUF_TXBURST_MASK
+#define USBHS_HWTXBUF_TXBURST_SHIFT          USB_HWTXBUF_TXBURST_SHIFT
+#define USBHS_HWTXBUF_TXBURST(x)             USB_HWTXBUF_TXBURST(x)
+#define USBHS_HWTXBUF_TXCHANADD_MASK         USB_HWTXBUF_TXCHANADD_MASK
+#define USBHS_HWTXBUF_TXCHANADD_SHIFT        USB_HWTXBUF_TXCHANADD_SHIFT
+#define USBHS_HWTXBUF_TXCHANADD(x)           USB_HWTXBUF_TXCHANADD(x)
+#define USBHS_HWRXBUF_RXBURST_MASK           USB_HWRXBUF_RXBURST_MASK
+#define USBHS_HWRXBUF_RXBURST_SHIFT          USB_HWRXBUF_RXBURST_SHIFT
+#define USBHS_HWRXBUF_RXBURST(x)             USB_HWRXBUF_RXBURST(x)
+#define USBHS_HWRXBUF_RXADD_MASK             USB_HWRXBUF_RXADD_MASK
+#define USBHS_HWRXBUF_RXADD_SHIFT            USB_HWRXBUF_RXADD_SHIFT
+#define USBHS_HWRXBUF_RXADD(x)               USB_HWRXBUF_RXADD(x)
+#define USBHS_GPTIMER0LD_GPTLD_MASK          USB_GPTIMER0LD_GPTLD_MASK
+#define USBHS_GPTIMER0LD_GPTLD_SHIFT         USB_GPTIMER0LD_GPTLD_SHIFT
+#define USBHS_GPTIMER0LD_GPTLD(x)            USB_GPTIMER0LD_GPTLD(x)
+#define USBHS_GPTIMER0CTL_GPTCNT_MASK        USB_GPTIMER0CTRL_GPTCNT_MASK
+#define USBHS_GPTIMER0CTL_GPTCNT_SHIFT       USB_GPTIMER0CTRL_GPTCNT_SHIFT
+#define USBHS_GPTIMER0CTL_GPTCNT(x)          USB_GPTIMER0CTRL_GPTCNT(x)
+#define USBHS_GPTIMER0CTL_MODE_MASK          USB_GPTIMER0CTRL_GPTMODE_MASK
+#define USBHS_GPTIMER0CTL_MODE_SHIFT         USB_GPTIMER0CTRL_GPTMODE_SHIFT
+#define USBHS_GPTIMER0CTL_MODE(x)            USB_GPTIMER0CTRL_GPTMODE(x)
+#define USBHS_GPTIMER0CTL_RST_MASK           USB_GPTIMER0CTRL_GPTRST_MASK
+#define USBHS_GPTIMER0CTL_RST_SHIFT          USB_GPTIMER0CTRL_GPTRST_SHIFT
+#define USBHS_GPTIMER0CTL_RST(x)             USB_GPTIMER0CTRL_GPTRST(x)
+#define USBHS_GPTIMER0CTL_RUN_MASK           USB_GPTIMER0CTRL_GPTRUN_MASK
+#define USBHS_GPTIMER0CTL_RUN_SHIFT          USB_GPTIMER0CTRL_GPTRUN_SHIFT
+#define USBHS_GPTIMER0CTL_RUN(x)             USB_GPTIMER0CTRL_GPTRUN(x)
+#define USBHS_GPTIMER1LD_GPTLD_MASK          USB_GPTIMER1LD_GPTLD_MASK
+#define USBHS_GPTIMER1LD_GPTLD_SHIFT         USB_GPTIMER1LD_GPTLD_SHIFT
+#define USBHS_GPTIMER1LD_GPTLD(x)            USB_GPTIMER1LD_GPTLD(x)
+#define USBHS_GPTIMER1CTL_GPTCNT_MASK        USB_GPTIMER1CTRL_GPTCNT_MASK
+#define USBHS_GPTIMER1CTL_GPTCNT_SHIFT       USB_GPTIMER1CTRL_GPTCNT_SHIFT
+#define USBHS_GPTIMER1CTL_GPTCNT(x)          USB_GPTIMER1CTRL_GPTCNT(x)
+#define USBHS_GPTIMER1CTL_MODE_MASK          USB_GPTIMER1CTRL_GPTMODE_MASK
+#define USBHS_GPTIMER1CTL_MODE_SHIFT         USB_GPTIMER1CTRL_GPTMODE_SHIFT
+#define USBHS_GPTIMER1CTL_MODE(x)            USB_GPTIMER1CTRL_GPTMODE(x)
+#define USBHS_GPTIMER1CTL_RST_MASK           USB_GPTIMER1CTRL_GPTRST_MASK
+#define USBHS_GPTIMER1CTL_RST_SHIFT          USB_GPTIMER1CTRL_GPTRST_SHIFT
+#define USBHS_GPTIMER1CTL_RST(x)             USB_GPTIMER1CTRL_GPTRST(x)
+#define USBHS_GPTIMER1CTL_RUN_MASK           USB_GPTIMER1CTRL_GPTRUN_MASK
+#define USBHS_GPTIMER1CTL_RUN_SHIFT          USB_GPTIMER1CTRL_GPTRUN_SHIFT
+#define USBHS_GPTIMER1CTL_RUN(x)             USB_GPTIMER1CTRL_GPTRUN(x)
+#define USBHS_USB_SBUSCFG_BURSTMODE_MASK     USB_SBUSCFG_AHBBRST_MASK
+#define USBHS_USB_SBUSCFG_BURSTMODE_SHIFT    USB_SBUSCFG_AHBBRST_SHIFT
+#define USBHS_USB_SBUSCFG_BURSTMODE(x)       USB_SBUSCFG_AHBBRST(x)
+#define USBHS_HCIVERSION_CAPLENGTH(x)        USB_HCIVERSION_CAPLENGTH(x)
+#define USBHS_HCIVERSION_HCIVERSION_MASK     USB_HCIVERSION_HCIVERSION_MASK
+#define USBHS_HCIVERSION_HCIVERSION_SHIFT    USB_HCIVERSION_HCIVERSION_SHIFT
+#define USBHS_HCIVERSION_HCIVERSION(x)       USB_HCIVERSION_HCIVERSION(x)
+#define USBHS_HCSPARAMS_N_PORTS_MASK         USB_HCSPARAMS_N_PORTS_MASK
+#define USBHS_HCSPARAMS_N_PORTS_SHIFT        USB_HCSPARAMS_N_PORTS_SHIFT
+#define USBHS_HCSPARAMS_N_PORTS(x)           USB_HCSPARAMS_N_PORTS(x)
+#define USBHS_HCSPARAMS_PPC_MASK             USB_HCSPARAMS_PPC_MASK
+#define USBHS_HCSPARAMS_PPC_SHIFT            USB_HCSPARAMS_PPC_SHIFT
+#define USBHS_HCSPARAMS_PPC(x)               USB_HCSPARAMS_PPC(x)
+#define USBHS_HCSPARAMS_N_PCC_MASK           USB_HCSPARAMS_N_PCC_MASK
+#define USBHS_HCSPARAMS_N_PCC_SHIFT          USB_HCSPARAMS_N_PCC_SHIFT
+#define USBHS_HCSPARAMS_N_PCC(x)             USB_HCSPARAMS_N_PCC(x)
+#define USBHS_HCSPARAMS_N_CC_MASK            USB_HCSPARAMS_N_CC_MASK
+#define USBHS_HCSPARAMS_N_CC_SHIFT           USB_HCSPARAMS_N_CC_SHIFT
+#define USBHS_HCSPARAMS_N_CC(x)              USB_HCSPARAMS_N_CC(x)
+#define USBHS_HCSPARAMS_PI_MASK              USB_HCSPARAMS_PI_MASK
+#define USBHS_HCSPARAMS_PI_SHIFT             USB_HCSPARAMS_PI_SHIFT
+#define USBHS_HCSPARAMS_PI(x)                USB_HCSPARAMS_PI(x)
+#define USBHS_HCSPARAMS_N_PTT_MASK           USB_HCSPARAMS_N_PTT_MASK
+#define USBHS_HCSPARAMS_N_PTT_SHIFT          USB_HCSPARAMS_N_PTT_SHIFT
+#define USBHS_HCSPARAMS_N_PTT(x)             USB_HCSPARAMS_N_PTT(x)
+#define USBHS_HCSPARAMS_N_TT_MASK            USB_HCSPARAMS_N_TT_MASK
+#define USBHS_HCSPARAMS_N_TT_SHIFT           USB_HCSPARAMS_N_TT_SHIFT
+#define USBHS_HCSPARAMS_N_TT(x)              USB_HCSPARAMS_N_TT(x)
+#define USBHS_HCCPARAMS_ADC_MASK             USB_HCCPARAMS_ADC_MASK
+#define USBHS_HCCPARAMS_ADC_SHIFT            USB_HCCPARAMS_ADC_SHIFT
+#define USBHS_HCCPARAMS_ADC(x)               USB_HCCPARAMS_ADC(x)
+#define USBHS_HCCPARAMS_PFL_MASK             USB_HCCPARAMS_PFL_MASK
+#define USBHS_HCCPARAMS_PFL_SHIFT            USB_HCCPARAMS_PFL_SHIFT
+#define USBHS_HCCPARAMS_PFL(x)               USB_HCCPARAMS_PFL(x)
+#define USBHS_HCCPARAMS_ASP_MASK             USB_HCCPARAMS_ASP_MASK
+#define USBHS_HCCPARAMS_ASP_SHIFT            USB_HCCPARAMS_ASP_SHIFT
+#define USBHS_HCCPARAMS_ASP(x)               USB_HCCPARAMS_ASP(x)
+#define USBHS_HCCPARAMS_IST_MASK             USB_HCCPARAMS_IST_MASK
+#define USBHS_HCCPARAMS_IST_SHIFT            USB_HCCPARAMS_IST_SHIFT
+#define USBHS_HCCPARAMS_IST(x)               USB_HCCPARAMS_IST(x)
+#define USBHS_HCCPARAMS_EECP_MASK            USB_HCCPARAMS_EECP_MASK
+#define USBHS_HCCPARAMS_EECP_SHIFT           USB_HCCPARAMS_EECP_SHIFT
+#define USBHS_HCCPARAMS_EECP(x)              USB_HCCPARAMS_EECP(x)
+#define USBHS_DCIVERSION_DCIVERSION_MASK     USB_DCIVERSION_DCIVERSION_MASK
+#define USBHS_DCIVERSION_DCIVERSION_SHIFT    USB_DCIVERSION_DCIVERSION_SHIFT
+#define USBHS_DCIVERSION_DCIVERSION(x)       USB_DCIVERSION_DCIVERSION(x)
+#define USBHS_DCCPARAMS_DEN_MASK             USB_DCCPARAMS_DEN_MASK
+#define USBHS_DCCPARAMS_DEN_SHIFT            USB_DCCPARAMS_DEN_SHIFT
+#define USBHS_DCCPARAMS_DEN(x)               USB_DCCPARAMS_DEN(x)
+#define USBHS_DCCPARAMS_DC_MASK              USB_DCCPARAMS_DC_MASK
+#define USBHS_DCCPARAMS_DC_SHIFT             USB_DCCPARAMS_DC_SHIFT
+#define USBHS_DCCPARAMS_DC(x)                USB_DCCPARAMS_DC(x)
+#define USBHS_DCCPARAMS_HC_MASK              USB_DCCPARAMS_HC_MASK
+#define USBHS_DCCPARAMS_HC_SHIFT             USB_DCCPARAMS_HC_SHIFT
+#define USBHS_DCCPARAMS_HC(x)                USB_DCCPARAMS_HC(x)
+#define USBHS_USBCMD_RS_MASK                 USB_USBCMD_RS_MASK
+#define USBHS_USBCMD_RS_SHIFT                USB_USBCMD_RS_SHIFT
+#define USBHS_USBCMD_RS(x)                   USB_USBCMD_RS(x)
+#define USBHS_USBCMD_RST_MASK                USB_USBCMD_RST_MASK
+#define USBHS_USBCMD_RST_SHIFT               USB_USBCMD_RST_SHIFT
+#define USBHS_USBCMD_RST(x)                  USB_USBCMD_RST(x)
+#define USBHS_USBCMD_FS_MASK                 USB_USBCMD_FS_1_MASK
+#define USBHS_USBCMD_FS_SHIFT                USB_USBCMD_FS_1_SHIFT
+#define USBHS_USBCMD_FS(x)                   USB_USBCMD_FS_1(x)
+#define USBHS_USBCMD_PSE_MASK                USB_USBCMD_PSE_MASK
+#define USBHS_USBCMD_PSE_SHIFT               USB_USBCMD_PSE_SHIFT
+#define USBHS_USBCMD_PSE(x)                  USB_USBCMD_PSE(x)
+#define USBHS_USBCMD_ASE_MASK                USB_USBCMD_ASE_MASK
+#define USBHS_USBCMD_ASE_SHIFT               USB_USBCMD_ASE_SHIFT
+#define USBHS_USBCMD_ASE(x)                  USB_USBCMD_ASE(x)
+#define USBHS_USBCMD_IAA_MASK                USB_USBCMD_IAA_MASK
+#define USBHS_USBCMD_IAA_SHIFT               USB_USBCMD_IAA_SHIFT
+#define USBHS_USBCMD_IAA(x)                  USB_USBCMD_IAA(x)
+#define USBHS_USBCMD_ASP_MASK                USB_USBCMD_ASP_MASK
+#define USBHS_USBCMD_ASP_SHIFT               USB_USBCMD_ASP_SHIFT
+#define USBHS_USBCMD_ASP(x)                  USB_USBCMD_ASP(x)
+#define USBHS_USBCMD_ASPE_MASK               USB_USBCMD_ASPE_MASK
+#define USBHS_USBCMD_ASPE_SHIFT              USB_USBCMD_ASPE_SHIFT
+#define USBHS_USBCMD_ASPE(x)                 USB_USBCMD_ASPE(x)
+#define USBHS_USBCMD_ATDTW_MASK              USB_USBCMD_ATDTW_MASK
+#define USBHS_USBCMD_ATDTW_SHIFT             USB_USBCMD_ATDTW_SHIFT
+#define USBHS_USBCMD_ATDTW(x)                USB_USBCMD_ATDTW(x)
+#define USBHS_USBCMD_SUTW_MASK               USB_USBCMD_SUTW_MASK
+#define USBHS_USBCMD_SUTW_SHIFT              USB_USBCMD_SUTW_SHIFT
+#define USBHS_USBCMD_SUTW(x)                 USB_USBCMD_SUTW(x)
+#define USBHS_USBCMD_FS2_MASK                USB_USBCMD_FS_2_MASK
+#define USBHS_USBCMD_FS2_SHIFT               USB_USBCMD_FS_2_SHIFT
+#define USBHS_USBCMD_FS2(x)                  USB_USBCMD_FS_2(x)
+#define USBHS_USBCMD_ITC_MASK                USB_USBCMD_ITC_MASK
+#define USBHS_USBCMD_ITC_SHIFT               USB_USBCMD_ITC_SHIFT
+#define USBHS_USBCMD_ITC(x)                  USB_USBCMD_ITC(x)
+#define USBHS_USBSTS_UI_MASK                 USB_USBSTS_UI_MASK
+#define USBHS_USBSTS_UI_SHIFT                USB_USBSTS_UI_SHIFT
+#define USBHS_USBSTS_UI(x)                   USB_USBSTS_UI(x)
+#define USBHS_USBSTS_UEI_MASK                USB_USBSTS_UEI_MASK
+#define USBHS_USBSTS_UEI_SHIFT               USB_USBSTS_UEI_SHIFT
+#define USBHS_USBSTS_UEI(x)                  USB_USBSTS_UEI(x)
+#define USBHS_USBSTS_PCI_MASK                USB_USBSTS_PCI_MASK
+#define USBHS_USBSTS_PCI_SHIFT               USB_USBSTS_PCI_SHIFT
+#define USBHS_USBSTS_PCI(x)                  USB_USBSTS_PCI(x)
+#define USBHS_USBSTS_FRI_MASK                USB_USBSTS_FRI_MASK
+#define USBHS_USBSTS_FRI_SHIFT               USB_USBSTS_FRI_SHIFT
+#define USBHS_USBSTS_FRI(x)                  USB_USBSTS_FRI(x)
+#define USBHS_USBSTS_SEI_MASK                USB_USBSTS_SEI_MASK
+#define USBHS_USBSTS_SEI_SHIFT               USB_USBSTS_SEI_SHIFT
+#define USBHS_USBSTS_SEI(x)                  USB_USBSTS_SEI(x)
+#define USBHS_USBSTS_AAI_MASK                USB_USBSTS_AAI_MASK
+#define USBHS_USBSTS_AAI_SHIFT               USB_USBSTS_AAI_SHIFT
+#define USBHS_USBSTS_AAI(x)                  USB_USBSTS_AAI(x)
+#define USBHS_USBSTS_URI_MASK                USB_USBSTS_URI_MASK
+#define USBHS_USBSTS_URI_SHIFT               USB_USBSTS_URI_SHIFT
+#define USBHS_USBSTS_URI(x)                  USB_USBSTS_URI(x)
+#define USBHS_USBSTS_SRI_MASK                USB_USBSTS_SRI_MASK
+#define USBHS_USBSTS_SRI_SHIFT               USB_USBSTS_SRI_SHIFT
+#define USBHS_USBSTS_SRI(x)                  USB_USBSTS_SRI(x)
+#define USBHS_USBSTS_SLI_MASK                USB_USBSTS_SLI_MASK
+#define USBHS_USBSTS_SLI_SHIFT               USB_USBSTS_SLI_SHIFT
+#define USBHS_USBSTS_SLI(x)                  USB_USBSTS_SLI(x)
+#define USBHS_USBSTS_ULPII_MASK              USB_USBSTS_ULPII_MASK
+#define USBHS_USBSTS_ULPII_SHIFT             USB_USBSTS_ULPII_SHIFT
+#define USBHS_USBSTS_ULPII(x)                USB_USBSTS_ULPII(x)
+#define USBHS_USBSTS_HCH_MASK                USB_USBSTS_HCH_MASK
+#define USBHS_USBSTS_HCH_SHIFT               USB_USBSTS_HCH_SHIFT
+#define USBHS_USBSTS_HCH(x)                  USB_USBSTS_HCH(x)
+#define USBHS_USBSTS_RCL_MASK                USB_USBSTS_RCL_MASK
+#define USBHS_USBSTS_RCL_SHIFT               USB_USBSTS_RCL_SHIFT
+#define USBHS_USBSTS_RCL(x)                  USB_USBSTS_RCL(x)
+#define USBHS_USBSTS_PS_MASK                 USB_USBSTS_PS_MASK
+#define USBHS_USBSTS_PS_SHIFT                USB_USBSTS_PS_SHIFT
+#define USBHS_USBSTS_PS(x)                   USB_USBSTS_PS(x)
+#define USBHS_USBSTS_AS_MASK                 USB_USBSTS_AS_MASK
+#define USBHS_USBSTS_AS_SHIFT                USB_USBSTS_AS_SHIFT
+#define USBHS_USBSTS_AS(x)                   USB_USBSTS_AS(x)
+#define USBHS_USBSTS_NAKI_MASK               USB_USBSTS_NAKI_MASK
+#define USBHS_USBSTS_NAKI_SHIFT              USB_USBSTS_NAKI_SHIFT
+#define USBHS_USBSTS_NAKI(x)                 USB_USBSTS_NAKI(x)
+#define USBHS_USBSTS_TI0_MASK                USB_USBSTS_TI0_MASK
+#define USBHS_USBSTS_TI0_SHIFT               USB_USBSTS_TI0_SHIFT
+#define USBHS_USBSTS_TI0(x)                  USB_USBSTS_TI0(x)
+#define USBHS_USBSTS_TI1_MASK                USB_USBSTS_TI1_MASK
+#define USBHS_USBSTS_TI1_SHIFT               USB_USBSTS_TI1_SHIFT
+#define USBHS_USBSTS_TI1(x)                  USB_USBSTS_TI1(x)
+#define USBHS_USBINTR_UE_MASK                USB_USBINTR_UE_MASK
+#define USBHS_USBINTR_UE_SHIFT               USB_USBINTR_UE_SHIFT
+#define USBHS_USBINTR_UE(x)                  USB_USBINTR_UE(x)
+#define USBHS_USBINTR_UEE_MASK               USB_USBINTR_UEE_MASK
+#define USBHS_USBINTR_UEE_SHIFT              USB_USBINTR_UEE_SHIFT
+#define USBHS_USBINTR_UEE(x)                 USB_USBINTR_UEE(x)
+#define USBHS_USBINTR_PCE_MASK               USB_USBINTR_PCE_MASK
+#define USBHS_USBINTR_PCE_SHIFT              USB_USBINTR_PCE_SHIFT
+#define USBHS_USBINTR_PCE(x)                 USB_USBINTR_PCE(x)
+#define USBHS_USBINTR_FRE_MASK               USB_USBINTR_FRE_MASK
+#define USBHS_USBINTR_FRE_SHIFT              USB_USBINTR_FRE_SHIFT
+#define USBHS_USBINTR_FRE(x)                 USB_USBINTR_FRE(x)
+#define USBHS_USBINTR_SEE_MASK               USB_USBINTR_SEE_MASK
+#define USBHS_USBINTR_SEE_SHIFT              USB_USBINTR_SEE_SHIFT
+#define USBHS_USBINTR_SEE(x)                 USB_USBINTR_SEE(x)
+#define USBHS_USBINTR_AAE_MASK               USB_USBINTR_AAE_MASK
+#define USBHS_USBINTR_AAE_SHIFT              USB_USBINTR_AAE_SHIFT
+#define USBHS_USBINTR_AAE(x)                 USB_USBINTR_AAE(x)
+#define USBHS_USBINTR_URE_MASK               USB_USBINTR_URE_MASK
+#define USBHS_USBINTR_URE_SHIFT              USB_USBINTR_URE_SHIFT
+#define USBHS_USBINTR_URE(x)                 USB_USBINTR_URE(x)
+#define USBHS_USBINTR_SRE_MASK               USB_USBINTR_SRE_MASK
+#define USBHS_USBINTR_SRE_SHIFT              USB_USBINTR_SRE_SHIFT
+#define USBHS_USBINTR_SRE(x)                 USB_USBINTR_SRE(x)
+#define USBHS_USBINTR_SLE_MASK               USB_USBINTR_SLE_MASK
+#define USBHS_USBINTR_SLE_SHIFT              USB_USBINTR_SLE_SHIFT
+#define USBHS_USBINTR_SLE(x)                 USB_USBINTR_SLE(x)
+#define USBHS_USBINTR_ULPIE_MASK             USB_USBINTR_ULPIE_MASK
+#define USBHS_USBINTR_ULPIE_SHIFT            USB_USBINTR_ULPIE_SHIFT
+#define USBHS_USBINTR_ULPIE(x)               USB_USBINTR_ULPIE(x)
+#define USBHS_USBINTR_NAKE_MASK              USB_USBINTR_NAKE_MASK
+#define USBHS_USBINTR_NAKE_SHIFT             USB_USBINTR_NAKE_SHIFT
+#define USBHS_USBINTR_NAKE(x)                USB_USBINTR_NAKE(x)
+#define USBHS_USBINTR_UAIE_MASK              USB_USBINTR_UAIE_MASK
+#define USBHS_USBINTR_UAIE_SHIFT             USB_USBINTR_UAIE_SHIFT
+#define USBHS_USBINTR_UAIE(x)                USB_USBINTR_UAIE(x)
+#define USBHS_USBINTR_UPIE_MASK              USB_USBINTR_UPIE_MASK
+#define USBHS_USBINTR_UPIE_SHIFT             USB_USBINTR_UPIE_SHIFT
+#define USBHS_USBINTR_UPIE(x)                USB_USBINTR_UPIE(x)
+#define USBHS_USBINTR_TIE0_MASK              USB_USBINTR_TIE0_MASK
+#define USBHS_USBINTR_TIE0_SHIFT             USB_USBINTR_TIE0_SHIFT
+#define USBHS_USBINTR_TIE0(x)                USB_USBINTR_TIE0(x)
+#define USBHS_USBINTR_TIE1_MASK              USB_USBINTR_TIE1_MASK
+#define USBHS_USBINTR_TIE1_SHIFT             USB_USBINTR_TIE1_SHIFT
+#define USBHS_USBINTR_TIE1(x)                USB_USBINTR_TIE1(x)
+#define USBHS_FRINDEX_FRINDEX_MASK           USB_FRINDEX_FRINDEX_MASK
+#define USBHS_FRINDEX_FRINDEX_SHIFT          USB_FRINDEX_FRINDEX_SHIFT
+#define USBHS_FRINDEX_FRINDEX(x)             USB_FRINDEX_FRINDEX(x)
+#define USBHS_DEVICEADDR_USBADRA_MASK        USB_DEVICEADDR_USBADRA_MASK
+#define USBHS_DEVICEADDR_USBADRA_SHIFT       USB_DEVICEADDR_USBADRA_SHIFT
+#define USBHS_DEVICEADDR_USBADRA(x)          USB_DEVICEADDR_USBADRA(x)
+#define USBHS_DEVICEADDR_USBADR_MASK         USB_DEVICEADDR_USBADR_MASK
+#define USBHS_DEVICEADDR_USBADR_SHIFT        USB_DEVICEADDR_USBADR_SHIFT
+#define USBHS_DEVICEADDR_USBADR(x)           USB_DEVICEADDR_USBADR(x)
+#define USBHS_PERIODICLISTBASE_PERBASE_MASK  USB_PERIODICLISTBASE_BASEADR_MASK
+#define USBHS_PERIODICLISTBASE_PERBASE_SHIFT USB_PERIODICLISTBASE_BASEADR_SHIFT
+#define USBHS_PERIODICLISTBASE_PERBASE(x)    USB_PERIODICLISTBASE_BASEADR(x)
+#define USBHS_ASYNCLISTADDR_ASYBASE_MASK     USB_ASYNCLISTADDR_ASYBASE_MASK
+#define USBHS_ASYNCLISTADDR_ASYBASE_SHIFT    USB_ASYNCLISTADDR_ASYBASE_SHIFT
+#define USBHS_ASYNCLISTADDR_ASYBASE(x)       USB_ASYNCLISTADDR_ASYBASE(x)
+#define USBHS_EPLISTADDR_EPBASE_MASK         USB_ENDPTLISTADDR_EPBASE_MASK
+#define USBHS_EPLISTADDR_EPBASE_SHIFT        USB_ENDPTLISTADDR_EPBASE_SHIFT
+#define USBHS_EPLISTADDR_EPBASE(x)           USB_ENDPTLISTADDR_EPBASE(x)
+#define USBHS_BURSTSIZE_RXPBURST_MASK        USB_BURSTSIZE_RXPBURST_MASK
+#define USBHS_BURSTSIZE_RXPBURST_SHIFT       USB_BURSTSIZE_RXPBURST_SHIFT
+#define USBHS_BURSTSIZE_RXPBURST(x)          USB_BURSTSIZE_RXPBURST(x)
+#define USBHS_BURSTSIZE_TXPBURST_MASK        USB_BURSTSIZE_TXPBURST_MASK
+#define USBHS_BURSTSIZE_TXPBURST_SHIFT       USB_BURSTSIZE_TXPBURST_SHIFT
+#define USBHS_BURSTSIZE_TXPBURST(x)          USB_BURSTSIZE_TXPBURST(x)
+#define USBHS_TXFILLTUNING_TXSCHOH_MASK      USB_TXFILLTUNING_TXSCHOH_MASK
+#define USBHS_TXFILLTUNING_TXSCHOH_SHIFT     USB_TXFILLTUNING_TXSCHOH_SHIFT
+#define USBHS_TXFILLTUNING_TXSCHOH(x)        USB_TXFILLTUNING_TXSCHOH(x)
+#define USBHS_TXFILLTUNING_TXSCHHEALTH_MASK  USB_TXFILLTUNING_TXSCHHEALTH_MASK
+#define USBHS_TXFILLTUNING_TXSCHHEALTH_SHIFT USB_TXFILLTUNING_TXSCHHEALTH_SHIFT
+#define USBHS_TXFILLTUNING_TXSCHHEALTH(x)    USB_TXFILLTUNING_TXSCHHEALTH(x)
+#define USBHS_TXFILLTUNING_TXFIFOTHRES_MASK  USB_TXFILLTUNING_TXFIFOTHRES_MASK
+#define USBHS_TXFILLTUNING_TXFIFOTHRES_SHIFT USB_TXFILLTUNING_TXFIFOTHRES_SHIFT
+#define USBHS_TXFILLTUNING_TXFIFOTHRES(x)    USB_TXFILLTUNING_TXFIFOTHRES(x)
+#define USBHS_ENDPTNAK_EPRN_MASK             USB_ENDPTNAK_EPRN_MASK
+#define USBHS_ENDPTNAK_EPRN_SHIFT            USB_ENDPTNAK_EPRN_SHIFT
+#define USBHS_ENDPTNAK_EPRN(x)               USB_ENDPTNAK_EPRN(x)
+#define USBHS_ENDPTNAK_EPTN_MASK             USB_ENDPTNAK_EPTN_MASK
+#define USBHS_ENDPTNAK_EPTN_SHIFT            USB_ENDPTNAK_EPTN_SHIFT
+#define USBHS_ENDPTNAK_EPTN(x)               USB_ENDPTNAK_EPTN(x)
+#define USBHS_ENDPTNAKEN_EPRNE_MASK          USB_ENDPTNAKEN_EPRNE_MASK
+#define USBHS_ENDPTNAKEN_EPRNE_SHIFT         USB_ENDPTNAKEN_EPRNE_SHIFT
+#define USBHS_ENDPTNAKEN_EPRNE(x)            USB_ENDPTNAKEN_EPRNE(x)
+#define USBHS_ENDPTNAKEN_EPTNE_MASK          USB_ENDPTNAKEN_EPTNE_MASK
+#define USBHS_ENDPTNAKEN_EPTNE_SHIFT         USB_ENDPTNAKEN_EPTNE_SHIFT
+#define USBHS_ENDPTNAKEN_EPTNE(x)            USB_ENDPTNAKEN_EPTNE(x)
+#define USBHS_CONFIGFLAG_CF_MASK             USB_CONFIGFLAG_CF_MASK
+#define USBHS_CONFIGFLAG_CF_SHIFT            USB_CONFIGFLAG_CF_SHIFT
+#define USBHS_CONFIGFLAG_CF(x)               USB_CONFIGFLAG_CF(x)
+#define USBHS_PORTSC1_CCS_MASK               USB_PORTSC1_CCS_MASK
+#define USBHS_PORTSC1_CCS_SHIFT              USB_PORTSC1_CCS_SHIFT
+#define USBHS_PORTSC1_CCS(x)                 USB_PORTSC1_CCS(x)
+#define USBHS_PORTSC1_CSC_MASK               USB_PORTSC1_CSC_MASK
+#define USBHS_PORTSC1_CSC_SHIFT              USB_PORTSC1_CSC_SHIFT
+#define USBHS_PORTSC1_CSC(x)                 USB_PORTSC1_CSC(x)
+#define USBHS_PORTSC1_PE_MASK                USB_PORTSC1_PE_MASK
+#define USBHS_PORTSC1_PE_SHIFT               USB_PORTSC1_PE_SHIFT
+#define USBHS_PORTSC1_PE(x)                  USB_PORTSC1_PE(x)
+#define USBHS_PORTSC1_PEC_MASK               USB_PORTSC1_PEC_MASK
+#define USBHS_PORTSC1_PEC_SHIFT              USB_PORTSC1_PEC_SHIFT
+#define USBHS_PORTSC1_PEC(x)                 USB_PORTSC1_PEC(x)
+#define USBHS_PORTSC1_OCA_MASK               USB_PORTSC1_OCA_MASK
+#define USBHS_PORTSC1_OCA_SHIFT              USB_PORTSC1_OCA_SHIFT
+#define USBHS_PORTSC1_OCA(x)                 USB_PORTSC1_OCA(x)
+#define USBHS_PORTSC1_OCC_MASK               USB_PORTSC1_OCC_MASK
+#define USBHS_PORTSC1_OCC_SHIFT              USB_PORTSC1_OCC_SHIFT
+#define USBHS_PORTSC1_OCC(x)                 USB_PORTSC1_OCC(x)
+#define USBHS_PORTSC1_FPR_MASK               USB_PORTSC1_FPR_MASK
+#define USBHS_PORTSC1_FPR_SHIFT              USB_PORTSC1_FPR_SHIFT
+#define USBHS_PORTSC1_FPR(x)                 USB_PORTSC1_FPR(x)
+#define USBHS_PORTSC1_SUSP_MASK              USB_PORTSC1_SUSP_MASK
+#define USBHS_PORTSC1_SUSP_SHIFT             USB_PORTSC1_SUSP_SHIFT
+#define USBHS_PORTSC1_SUSP(x)                USB_PORTSC1_SUSP(x)
+#define USBHS_PORTSC1_PR_MASK                USB_PORTSC1_PR_MASK
+#define USBHS_PORTSC1_PR_SHIFT               USB_PORTSC1_PR_SHIFT
+#define USBHS_PORTSC1_PR(x)                  USB_PORTSC1_PR(x)
+#define USBHS_PORTSC1_HSP_MASK               USB_PORTSC1_HSP_MASK
+#define USBHS_PORTSC1_HSP_SHIFT              USB_PORTSC1_HSP_SHIFT
+#define USBHS_PORTSC1_HSP(x)                 USB_PORTSC1_HSP(x)
+#define USBHS_PORTSC1_LS_MASK                USB_PORTSC1_LS_MASK
+#define USBHS_PORTSC1_LS_SHIFT               USB_PORTSC1_LS_SHIFT
+#define USBHS_PORTSC1_LS(x)                  USB_PORTSC1_LS(x)
+#define USBHS_PORTSC1_PP_MASK                USB_PORTSC1_PP_MASK
+#define USBHS_PORTSC1_PP_SHIFT               USB_PORTSC1_PP_SHIFT
+#define USBHS_PORTSC1_PP(x)                  USB_PORTSC1_PP(x)
+#define USBHS_PORTSC1_PO_MASK                USB_PORTSC1_PO_MASK
+#define USBHS_PORTSC1_PO_SHIFT               USB_PORTSC1_PO_SHIFT
+#define USBHS_PORTSC1_PO(x)                  USB_PORTSC1_PO(x)
+#define USBHS_PORTSC1_PIC_MASK               USB_PORTSC1_PIC_MASK
+#define USBHS_PORTSC1_PIC_SHIFT              USB_PORTSC1_PIC_SHIFT
+#define USBHS_PORTSC1_PIC(x)                 USB_PORTSC1_PIC(x)
+#define USBHS_PORTSC1_PTC_MASK               USB_PORTSC1_PTC_MASK
+#define USBHS_PORTSC1_PTC_SHIFT              USB_PORTSC1_PTC_SHIFT
+#define USBHS_PORTSC1_PTC(x)                 USB_PORTSC1_PTC(x)
+#define USBHS_PORTSC1_WKCN_MASK              USB_PORTSC1_WKCN_MASK
+#define USBHS_PORTSC1_WKCN_SHIFT             USB_PORTSC1_WKCN_SHIFT
+#define USBHS_PORTSC1_WKCN(x)                USB_PORTSC1_WKCN(x)
+#define USBHS_PORTSC1_WKDS_MASK              USB_PORTSC1_WKDC_MASK
+#define USBHS_PORTSC1_WKDS_SHIFT             USB_PORTSC1_WKDC_SHIFT
+#define USBHS_PORTSC1_WKDS(x)                USB_PORTSC1_WKDC(x)
+#define USBHS_PORTSC1_WKOC_MASK              USB_PORTSC1_WKOC_MASK
+#define USBHS_PORTSC1_WKOC_SHIFT             USB_PORTSC1_WKOC_SHIFT
+#define USBHS_PORTSC1_WKOC(x)                USB_PORTSC1_WKOC(x)
+#define USBHS_PORTSC1_PHCD_MASK              USB_PORTSC1_PHCD_MASK
+#define USBHS_PORTSC1_PHCD_SHIFT             USB_PORTSC1_PHCD_SHIFT
+#define USBHS_PORTSC1_PHCD(x)                USB_PORTSC1_PHCD(x)
+#define USBHS_PORTSC1_PFSC_MASK              USB_PORTSC1_PFSC_MASK
+#define USBHS_PORTSC1_PFSC_SHIFT             USB_PORTSC1_PFSC_SHIFT
+#define USBHS_PORTSC1_PFSC(x)                USB_PORTSC1_PFSC(x)
+#define USBHS_PORTSC1_PTS2_MASK              USB_PORTSC1_PTS_2_MASK
+#define USBHS_PORTSC1_PTS2_SHIFT             USB_PORTSC1_PTS_2_SHIFT
+#define USBHS_PORTSC1_PTS2(x)                USB_PORTSC1_PTS_2(x)
+#define USBHS_PORTSC1_PSPD_MASK              USB_PORTSC1_PSPD_MASK
+#define USBHS_PORTSC1_PSPD_SHIFT             USB_PORTSC1_PSPD_SHIFT
+#define USBHS_PORTSC1_PSPD(x)                USB_PORTSC1_PSPD(x)
+#define USBHS_PORTSC1_PTW_MASK               USB_PORTSC1_PTW_MASK
+#define USBHS_PORTSC1_PTW_SHIFT              USB_PORTSC1_PTW_SHIFT
+#define USBHS_PORTSC1_PTW(x)                 USB_PORTSC1_PTW(x)
+#define USBHS_PORTSC1_STS_MASK               USB_PORTSC1_STS_MASK
+#define USBHS_PORTSC1_STS_SHIFT              USB_PORTSC1_STS_SHIFT
+#define USBHS_PORTSC1_STS(x)                 USB_PORTSC1_STS(x)
+#define USBHS_PORTSC1_PTS_MASK               USB_PORTSC1_PTS_1_MASK
+#define USBHS_PORTSC1_PTS_SHIFT              USB_PORTSC1_PTS_1_SHIFT
+#define USBHS_PORTSC1_PTS(x)                 USB_PORTSC1_PTS_1(x)
+#define USBHS_OTGSC_VD_MASK                  USB_OTGSC_VD_MASK
+#define USBHS_OTGSC_VD_SHIFT                 USB_OTGSC_VD_SHIFT
+#define USBHS_OTGSC_VD(x)                    USB_OTGSC_VD(x)
+#define USBHS_OTGSC_VC_MASK                  USB_OTGSC_VC_MASK
+#define USBHS_OTGSC_VC_SHIFT                 USB_OTGSC_VC_SHIFT
+#define USBHS_OTGSC_VC(x)                    USB_OTGSC_VC(x)
+#define USBHS_OTGSC_OT_MASK                  USB_OTGSC_OT_MASK
+#define USBHS_OTGSC_OT_SHIFT                 USB_OTGSC_OT_SHIFT
+#define USBHS_OTGSC_OT(x)                    USB_OTGSC_OT(x)
+#define USBHS_OTGSC_DP_MASK                  USB_OTGSC_DP_MASK
+#define USBHS_OTGSC_DP_SHIFT                 USB_OTGSC_DP_SHIFT
+#define USBHS_OTGSC_DP(x)                    USB_OTGSC_DP(x)
+#define USBHS_OTGSC_IDPU_MASK                USB_OTGSC_IDPU_MASK
+#define USBHS_OTGSC_IDPU_SHIFT               USB_OTGSC_IDPU_SHIFT
+#define USBHS_OTGSC_IDPU(x)                  USB_OTGSC_IDPU(x)
+#define USBHS_OTGSC_ID_MASK                  USB_OTGSC_ID_MASK
+#define USBHS_OTGSC_ID_SHIFT                 USB_OTGSC_ID_SHIFT
+#define USBHS_OTGSC_ID(x)                    USB_OTGSC_ID(x)
+#define USBHS_OTGSC_AVV_MASK                 USB_OTGSC_AVV_MASK
+#define USBHS_OTGSC_AVV_SHIFT                USB_OTGSC_AVV_SHIFT
+#define USBHS_OTGSC_AVV(x)                   USB_OTGSC_AVV(x)
+#define USBHS_OTGSC_ASV_MASK                 USB_OTGSC_ASV_MASK
+#define USBHS_OTGSC_ASV_SHIFT                USB_OTGSC_ASV_SHIFT
+#define USBHS_OTGSC_ASV(x)                   USB_OTGSC_ASV(x)
+#define USBHS_OTGSC_BSV_MASK                 USB_OTGSC_BSV_MASK
+#define USBHS_OTGSC_BSV_SHIFT                USB_OTGSC_BSV_SHIFT
+#define USBHS_OTGSC_BSV(x)                   USB_OTGSC_BSV(x)
+#define USBHS_OTGSC_BSE_MASK                 USB_OTGSC_BSE_MASK
+#define USBHS_OTGSC_BSE_SHIFT                USB_OTGSC_BSE_SHIFT
+#define USBHS_OTGSC_BSE(x)                   USB_OTGSC_BSE(x)
+#define USBHS_OTGSC_MST_MASK                 USB_OTGSC_TOG_1MS_MASK
+#define USBHS_OTGSC_MST_SHIFT                USB_OTGSC_TOG_1MS_SHIFT
+#define USBHS_OTGSC_MST(x)                   USB_OTGSC_TOG_1MS(x)
+#define USBHS_OTGSC_DPS_MASK                 USB_OTGSC_DPS_MASK
+#define USBHS_OTGSC_DPS_SHIFT                USB_OTGSC_DPS_SHIFT
+#define USBHS_OTGSC_DPS(x)                   USB_OTGSC_DPS(x)
+#define USBHS_OTGSC_IDIS_MASK                USB_OTGSC_IDIS_MASK
+#define USBHS_OTGSC_IDIS_SHIFT               USB_OTGSC_IDIS_SHIFT
+#define USBHS_OTGSC_IDIS(x)                  USB_OTGSC_IDIS(x)
+#define USBHS_OTGSC_AVVIS_MASK               USB_OTGSC_AVVIS_MASK
+#define USBHS_OTGSC_AVVIS_SHIFT              USB_OTGSC_AVVIS_SHIFT
+#define USBHS_OTGSC_AVVIS(x)                 USB_OTGSC_AVVIS(x)
+#define USBHS_OTGSC_ASVIS_MASK               USB_OTGSC_ASVIS_MASK
+#define USBHS_OTGSC_ASVIS_SHIFT              USB_OTGSC_ASVIS_SHIFT
+#define USBHS_OTGSC_ASVIS(x)                 USB_OTGSC_ASVIS(x)
+#define USBHS_OTGSC_BSVIS_MASK               USB_OTGSC_BSVIS_MASK
+#define USBHS_OTGSC_BSVIS_SHIFT              USB_OTGSC_BSVIS_SHIFT
+#define USBHS_OTGSC_BSVIS(x)                 USB_OTGSC_BSVIS(x)
+#define USBHS_OTGSC_BSEIS_MASK               USB_OTGSC_BSEIS_MASK
+#define USBHS_OTGSC_BSEIS_SHIFT              USB_OTGSC_BSEIS_SHIFT
+#define USBHS_OTGSC_BSEIS(x)                 USB_OTGSC_BSEIS(x)
+#define USBHS_OTGSC_MSS_MASK                 USB_OTGSC_STATUS_1MS_MASK
+#define USBHS_OTGSC_MSS_SHIFT                USB_OTGSC_STATUS_1MS_SHIFT
+#define USBHS_OTGSC_MSS(x)                   USB_OTGSC_STATUS_1MS(x)
+#define USBHS_OTGSC_DPIS_MASK                USB_OTGSC_DPIS_MASK
+#define USBHS_OTGSC_DPIS_SHIFT               USB_OTGSC_DPIS_SHIFT
+#define USBHS_OTGSC_DPIS(x)                  USB_OTGSC_DPIS(x)
+#define USBHS_OTGSC_IDIE_MASK                USB_OTGSC_IDIE_MASK
+#define USBHS_OTGSC_IDIE_SHIFT               USB_OTGSC_IDIE_SHIFT
+#define USBHS_OTGSC_IDIE(x)                  USB_OTGSC_IDIE(x)
+#define USBHS_OTGSC_AVVIE_MASK               USB_OTGSC_AVVIE_MASK
+#define USBHS_OTGSC_AVVIE_SHIFT              USB_OTGSC_AVVIE_SHIFT
+#define USBHS_OTGSC_AVVIE(x)                 USB_OTGSC_AVVIE(x)
+#define USBHS_OTGSC_ASVIE_MASK               USB_OTGSC_ASVIE_MASK
+#define USBHS_OTGSC_ASVIE_SHIFT              USB_OTGSC_ASVIE_SHIFT
+#define USBHS_OTGSC_ASVIE(x)                 USB_OTGSC_ASVIE(x)
+#define USBHS_OTGSC_BSVIE_MASK               USB_OTGSC_BSVIE_MASK
+#define USBHS_OTGSC_BSVIE_SHIFT              USB_OTGSC_BSVIE_SHIFT
+#define USBHS_OTGSC_BSVIE(x)                 USB_OTGSC_BSVIE(x)
+#define USBHS_OTGSC_BSEIE_MASK               USB_OTGSC_BSEIE_MASK
+#define USBHS_OTGSC_BSEIE_SHIFT              USB_OTGSC_BSEIE_SHIFT
+#define USBHS_OTGSC_BSEIE(x)                 USB_OTGSC_BSEIE(x)
+#define USBHS_OTGSC_MSE_MASK                 USB_OTGSC_EN_1MS_MASK
+#define USBHS_OTGSC_MSE_SHIFT                USB_OTGSC_EN_1MS_SHIFT
+#define USBHS_OTGSC_MSE(x)                   USB_OTGSC_EN_1MS(x)
+#define USBHS_OTGSC_DPIE_MASK                USB_OTGSC_DPIE_MASK
+#define USBHS_OTGSC_DPIE_SHIFT               USB_OTGSC_DPIE_SHIFT
+#define USBHS_OTGSC_DPIE(x)                  USB_OTGSC_DPIE(x)
+#define USBHS_USBMODE_CM_MASK                USB_USBMODE_CM_MASK
+#define USBHS_USBMODE_CM_SHIFT               USB_USBMODE_CM_SHIFT
+#define USBHS_USBMODE_CM(x)                  USB_USBMODE_CM(x)
+#define USBHS_USBMODE_ES_MASK                USB_USBMODE_ES_MASK
+#define USBHS_USBMODE_ES_SHIFT               USB_USBMODE_ES_SHIFT
+#define USBHS_USBMODE_ES(x)                  USB_USBMODE_ES(x)
+#define USBHS_USBMODE_SLOM_MASK              USB_USBMODE_SLOM_MASK
+#define USBHS_USBMODE_SLOM_SHIFT             USB_USBMODE_SLOM_SHIFT
+#define USBHS_USBMODE_SLOM(x)                USB_USBMODE_SLOM(x)
+#define USBHS_USBMODE_SDIS_MASK              USB_USBMODE_SDIS_MASK
+#define USBHS_USBMODE_SDIS_SHIFT             USB_USBMODE_SDIS_SHIFT
+#define USBHS_USBMODE_SDIS(x)                USB_USBMODE_SDIS(x)
+#define USBHS_EPSETUPSR_EPSETUPSTAT_MASK     USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK
+#define USBHS_EPSETUPSR_EPSETUPSTAT_SHIFT    USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT
+#define USBHS_EPSETUPSR_EPSETUPSTAT(x)       USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)
+#define USBHS_EPPRIME_PERB_MASK              USB_ENDPTPRIME_PERB_MASK
+#define USBHS_EPPRIME_PERB_SHIFT             USB_ENDPTPRIME_PERB_SHIFT
+#define USBHS_EPPRIME_PERB(x)                USB_ENDPTPRIME_PERB(x)
+#define USBHS_EPPRIME_PETB_MASK              USB_ENDPTPRIME_PETB_MASK
+#define USBHS_EPPRIME_PETB_SHIFT             USB_ENDPTPRIME_PETB_SHIFT
+#define USBHS_EPPRIME_PETB(x)                USB_ENDPTPRIME_PETB(x)
+#define USBHS_EPFLUSH_FERB_MASK              USB_ENDPTFLUSH_FERB_MASK
+#define USBHS_EPFLUSH_FERB_SHIFT             USB_ENDPTFLUSH_FERB_SHIFT
+#define USBHS_EPFLUSH_FERB(x)                USB_ENDPTFLUSH_FERB(x)
+#define USBHS_EPFLUSH_FETB_MASK              USB_ENDPTFLUSH_FETB_MASK
+#define USBHS_EPFLUSH_FETB_SHIFT             USB_ENDPTFLUSH_FETB_SHIFT
+#define USBHS_EPFLUSH_FETB(x)                USB_ENDPTFLUSH_FETB(x)
+#define USBHS_EPSR_ERBR_MASK                 USB_ENDPTSTAT_ERBR_MASK
+#define USBHS_EPSR_ERBR_SHIFT                USB_ENDPTSTAT_ERBR_SHIFT
+#define USBHS_EPSR_ERBR(x)                   USB_ENDPTSTAT_ERBR(x)
+#define USBHS_EPSR_ETBR_MASK                 USB_ENDPTSTAT_ETBR_MASK
+#define USBHS_EPSR_ETBR_SHIFT                USB_ENDPTSTAT_ETBR_SHIFT
+#define USBHS_EPSR_ETBR(x)                   USB_ENDPTSTAT_ETBR(x)
+#define USBHS_EPCOMPLETE_ERCE_MASK           USB_ENDPTCOMPLETE_ERCE_MASK
+#define USBHS_EPCOMPLETE_ERCE_SHIFT          USB_ENDPTCOMPLETE_ERCE_SHIFT
+#define USBHS_EPCOMPLETE_ERCE(x)             USB_ENDPTCOMPLETE_ERCE(x)
+#define USBHS_EPCOMPLETE_ETCE_MASK           USB_ENDPTCOMPLETE_ETCE_MASK
+#define USBHS_EPCOMPLETE_ETCE_SHIFT          USB_ENDPTCOMPLETE_ETCE_SHIFT
+#define USBHS_EPCOMPLETE_ETCE(x)             USB_ENDPTCOMPLETE_ETCE(x)
+#define USBHS_EPCR0_RXS_MASK                 USB_ENDPTCTRL0_RXS_MASK
+#define USBHS_EPCR0_RXS_SHIFT                USB_ENDPTCTRL0_RXS_SHIFT
+#define USBHS_EPCR0_RXS(x)                   USB_ENDPTCTRL0_RXS(x)
+#define USBHS_EPCR0_RXT_MASK                 USB_ENDPTCTRL0_RXT_MASK
+#define USBHS_EPCR0_RXT_SHIFT                USB_ENDPTCTRL0_RXT_SHIFT
+#define USBHS_EPCR0_RXT(x)                   USB_ENDPTCTRL0_RXT(x)
+#define USBHS_EPCR0_RXE_MASK                 USB_ENDPTCTRL0_RXE_MASK
+#define USBHS_EPCR0_RXE_SHIFT                USB_ENDPTCTRL0_RXE_SHIFT
+#define USBHS_EPCR0_RXE(x)                   USB_ENDPTCTRL0_RXE(x)
+#define USBHS_EPCR0_TXS_MASK                 USB_ENDPTCTRL0_TXS_MASK
+#define USBHS_EPCR0_TXS_SHIFT                USB_ENDPTCTRL0_TXS_SHIFT
+#define USBHS_EPCR0_TXS(x)                   USB_ENDPTCTRL0_TXS(x)
+#define USBHS_EPCR0_TXT_MASK                 USB_ENDPTCTRL0_TXT_MASK
+#define USBHS_EPCR0_TXT_SHIFT                USB_ENDPTCTRL0_TXT_SHIFT
+#define USBHS_EPCR0_TXT(x)                   USB_ENDPTCTRL0_TXT(x)
+#define USBHS_EPCR0_TXE_MASK                 USB_ENDPTCTRL0_TXE_MASK
+#define USBHS_EPCR0_TXE_SHIFT                USB_ENDPTCTRL0_TXE_SHIFT
+#define USBHS_EPCR0_TXE(x)                   USB_ENDPTCTRL0_TXE(x)
+#define USBHS_EPCR_RXS_MASK                  USB_ENDPTCTRL_RXS_MASK
+#define USBHS_EPCR_RXS_SHIFT                 USB_ENDPTCTRL_RXS_SHIFT
+#define USBHS_EPCR_RXS(x)                    USB_ENDPTCTRL_RXS(x)
+#define USBHS_EPCR_RXD_MASK                  USB_ENDPTCTRL_RXD_MASK
+#define USBHS_EPCR_RXD_SHIFT                 USB_ENDPTCTRL_RXD_SHIFT
+#define USBHS_EPCR_RXD(x)                    USB_ENDPTCTRL_RXD(x)
+#define USBHS_EPCR_RXT_MASK                  USB_ENDPTCTRL_RXT_MASK
+#define USBHS_EPCR_RXT_SHIFT                 USB_ENDPTCTRL_RXT_SHIFT
+#define USBHS_EPCR_RXT(x)                    USB_ENDPTCTRL_RXT(x)
+#define USBHS_EPCR_RXI_MASK                  USB_ENDPTCTRL_RXI_MASK
+#define USBHS_EPCR_RXI_SHIFT                 USB_ENDPTCTRL_RXI_SHIFT
+#define USBHS_EPCR_RXI(x)                    USB_ENDPTCTRL_RXI(x)
+#define USBHS_EPCR_RXR_MASK                  USB_ENDPTCTRL_RXR_MASK
+#define USBHS_EPCR_RXR_SHIFT                 USB_ENDPTCTRL_RXR_SHIFT
+#define USBHS_EPCR_RXR(x)                    USB_ENDPTCTRL_RXR(x)
+#define USBHS_EPCR_RXE_MASK                  USB_ENDPTCTRL_RXE_MASK
+#define USBHS_EPCR_RXE_SHIFT                 USB_ENDPTCTRL_RXE_SHIFT
+#define USBHS_EPCR_RXE(x)                    USB_ENDPTCTRL_RXE(x)
+#define USBHS_EPCR_TXS_MASK                  USB_ENDPTCTRL_TXS_MASK
+#define USBHS_EPCR_TXS_SHIFT                 USB_ENDPTCTRL_TXS_SHIFT
+#define USBHS_EPCR_TXS(x)                    USB_ENDPTCTRL_TXS(x)
+#define USBHS_EPCR_TXD_MASK                  USB_ENDPTCTRL_TXD_MASK
+#define USBHS_EPCR_TXD_SHIFT                 USB_ENDPTCTRL_TXD_SHIFT
+#define USBHS_EPCR_TXD(x)                    USB_ENDPTCTRL_TXD(x)
+#define USBHS_EPCR_TXT_MASK                  USB_ENDPTCTRL_TXT_MASK
+#define USBHS_EPCR_TXT_SHIFT                 USB_ENDPTCTRL_TXT_SHIFT
+#define USBHS_EPCR_TXT(x)                    USB_ENDPTCTRL_TXT(x)
+#define USBHS_EPCR_TXI_MASK                  USB_ENDPTCTRL_TXI_MASK
+#define USBHS_EPCR_TXI_SHIFT                 USB_ENDPTCTRL_TXI_SHIFT
+#define USBHS_EPCR_TXI(x)                    USB_ENDPTCTRL_TXI(x)
+#define USBHS_EPCR_TXR_MASK                  USB_ENDPTCTRL_TXR_MASK
+#define USBHS_EPCR_TXR_SHIFT                 USB_ENDPTCTRL_TXR_SHIFT
+#define USBHS_EPCR_TXR(x)                    USB_ENDPTCTRL_TXR(x)
+#define USBHS_EPCR_TXE_MASK                  USB_ENDPTCTRL_TXE_MASK
+#define USBHS_EPCR_TXE_SHIFT                 USB_ENDPTCTRL_TXE_SHIFT
+#define USBHS_EPCR_TXE(x)                    USB_ENDPTCTRL_TXE(x)
+#define USBHS_EPCR_COUNT                     USB_ENDPTCTRL_COUNT
+#define USBHS_Type                           USB_Type
+#define USBHS_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        USB1_BASE, USB2_BASE                                                                                           \
+    }
+#define USBHS_IRQS                                                                                                     \
+    {                                                                                                                  \
+        USB_OTG1_IRQn, USB_OTG2_IRQn                                                                                   \
+    }
+#define USBHS_IRQHandler USB_OTG1_IRQHandler
 
 /*!
  * @}
  */ /* end of group USB_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USBNC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -23060,11 +26131,13 @@ typedef struct {
  */
 
 /** USBNC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[2048];
-  __IO uint32_t USB_OTGn_CTRL;                     /**< USB OTG1 Control Register..USB OTG2 Control Register, offset: 0x800 */
-       uint8_t RESERVED_1[20];
-  __IO uint32_t USB_OTGn_PHY_CTRL_0;               /**< OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register, offset: 0x818 */
+typedef struct
+{
+    uint8_t RESERVED_0[2048];
+    __IO uint32_t USB_OTGn_CTRL; /**< USB OTG1 Control Register..USB OTG2 Control Register, offset: 0x800 */
+    uint8_t RESERVED_1[20];
+    __IO uint32_t
+        USB_OTGn_PHY_CTRL_0; /**< OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register, offset: 0x818 */
 } USBNC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -23078,70 +26151,85 @@ typedef struct {
 
 /*! @name USB_OTGn_CTRL - USB OTG1 Control Register..USB OTG2 Control Register */
 /*! @{ */
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK    (0x80U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT   (7U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK    (0x100U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT   (8U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK)
-#define USBNC_USB_OTGn_CTRL_PWR_POL_MASK         (0x200U)
-#define USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT        (9U)
-#define USBNC_USB_OTGn_CTRL_PWR_POL(x)           (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_PWR_POL_MASK)
-#define USBNC_USB_OTGn_CTRL_WIE_MASK             (0x400U)
-#define USBNC_USB_OTGn_CTRL_WIE_SHIFT            (10U)
-#define USBNC_USB_OTGn_CTRL_WIE(x)               (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIE_SHIFT)) & USBNC_USB_OTGn_CTRL_WIE_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK      (0x4000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT     (14U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)        (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_MASK         (0x8000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT        (15U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW(x)           (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK      (0x10000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT     (16U)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)        (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK    (0x20000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT   (17U)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK    (0x20000000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT   (29U)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WIR_MASK             (0x80000000U)
-#define USBNC_USB_OTGn_CTRL_WIR_SHIFT            (31U)
-#define USBNC_USB_OTGn_CTRL_WIR(x)               (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIR_SHIFT)) & USBNC_USB_OTGn_CTRL_WIR_MASK)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK  (0x80U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT (7U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK  (0x100U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT (8U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK)
+#define USBNC_USB_OTGn_CTRL_PWR_POL_MASK  (0x200U)
+#define USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT (9U)
+#define USBNC_USB_OTGn_CTRL_PWR_POL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_PWR_POL_MASK)
+#define USBNC_USB_OTGn_CTRL_WIE_MASK  (0x400U)
+#define USBNC_USB_OTGn_CTRL_WIE_SHIFT (10U)
+#define USBNC_USB_OTGn_CTRL_WIE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIE_SHIFT)) & USBNC_USB_OTGn_CTRL_WIE_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK  (0x4000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT (14U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_MASK  (0x8000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT (15U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK  (0x10000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT (16U)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK  (0x20000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT (17U)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK  (0x20000000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT (29U)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WIR_MASK  (0x80000000U)
+#define USBNC_USB_OTGn_CTRL_WIR_SHIFT (31U)
+#define USBNC_USB_OTGn_CTRL_WIR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIR_SHIFT)) & USBNC_USB_OTGn_CTRL_WIR_MASK)
 /*! @} */
 
 /*! @name USB_OTGn_PHY_CTRL_0 - OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register */
 /*! @{ */
-#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK (0x80000000U)
+#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK  (0x80000000U)
 #define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT (31U)
-#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD(x) (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT)) & USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK)
+#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT)) &                                   \
+     USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USBNC_Register_Masks */
 
-
 /* USBNC - Peripheral instance base addresses */
 /** Peripheral USBNC1 base address */
-#define USBNC1_BASE                              (0x402E0000u)
+#define USBNC1_BASE (0x402E0000u)
 /** Peripheral USBNC1 base pointer */
-#define USBNC1                                   ((USBNC_Type *)USBNC1_BASE)
+#define USBNC1 ((USBNC_Type *)USBNC1_BASE)
 /** Peripheral USBNC2 base address */
-#define USBNC2_BASE                              (0x402E0004u)
+#define USBNC2_BASE (0x402E0004u)
 /** Peripheral USBNC2 base pointer */
-#define USBNC2                                   ((USBNC_Type *)USBNC2_BASE)
+#define USBNC2 ((USBNC_Type *)USBNC2_BASE)
 /** Array initializer of USBNC peripheral base addresses */
-#define USBNC_BASE_ADDRS                         { 0u, USBNC1_BASE, USBNC2_BASE }
+#define USBNC_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, USBNC1_BASE, USBNC2_BASE                                                                                   \
+    }
 /** Array initializer of USBNC peripheral base pointers */
-#define USBNC_BASE_PTRS                          { (USBNC_Type *)0u, USBNC1, USBNC2 }
+#define USBNC_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (USBNC_Type *)0u, USBNC1, USBNC2                                                                               \
+    }
 
 /*!
  * @}
  */ /* end of group USBNC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USBPHY Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -23152,36 +26240,37 @@ typedef struct {
  */
 
 /** USBPHY - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t PWD;                               /**< USB PHY Power-Down Register, offset: 0x0 */
-  __IO uint32_t PWD_SET;                           /**< USB PHY Power-Down Register, offset: 0x4 */
-  __IO uint32_t PWD_CLR;                           /**< USB PHY Power-Down Register, offset: 0x8 */
-  __IO uint32_t PWD_TOG;                           /**< USB PHY Power-Down Register, offset: 0xC */
-  __IO uint32_t TX;                                /**< USB PHY Transmitter Control Register, offset: 0x10 */
-  __IO uint32_t TX_SET;                            /**< USB PHY Transmitter Control Register, offset: 0x14 */
-  __IO uint32_t TX_CLR;                            /**< USB PHY Transmitter Control Register, offset: 0x18 */
-  __IO uint32_t TX_TOG;                            /**< USB PHY Transmitter Control Register, offset: 0x1C */
-  __IO uint32_t RX;                                /**< USB PHY Receiver Control Register, offset: 0x20 */
-  __IO uint32_t RX_SET;                            /**< USB PHY Receiver Control Register, offset: 0x24 */
-  __IO uint32_t RX_CLR;                            /**< USB PHY Receiver Control Register, offset: 0x28 */
-  __IO uint32_t RX_TOG;                            /**< USB PHY Receiver Control Register, offset: 0x2C */
-  __IO uint32_t CTRL;                              /**< USB PHY General Control Register, offset: 0x30 */
-  __IO uint32_t CTRL_SET;                          /**< USB PHY General Control Register, offset: 0x34 */
-  __IO uint32_t CTRL_CLR;                          /**< USB PHY General Control Register, offset: 0x38 */
-  __IO uint32_t CTRL_TOG;                          /**< USB PHY General Control Register, offset: 0x3C */
-  __IO uint32_t STATUS;                            /**< USB PHY Status Register, offset: 0x40 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t DEBUGr;                            /**< USB PHY Debug Register, offset: 0x50 */
-  __IO uint32_t DEBUG_SET;                         /**< USB PHY Debug Register, offset: 0x54 */
-  __IO uint32_t DEBUG_CLR;                         /**< USB PHY Debug Register, offset: 0x58 */
-  __IO uint32_t DEBUG_TOG;                         /**< USB PHY Debug Register, offset: 0x5C */
-  __I  uint32_t DEBUG0_STATUS;                     /**< UTMI Debug Status Register 0, offset: 0x60 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t DEBUG1;                            /**< UTMI Debug Status Register 1, offset: 0x70 */
-  __IO uint32_t DEBUG1_SET;                        /**< UTMI Debug Status Register 1, offset: 0x74 */
-  __IO uint32_t DEBUG1_CLR;                        /**< UTMI Debug Status Register 1, offset: 0x78 */
-  __IO uint32_t DEBUG1_TOG;                        /**< UTMI Debug Status Register 1, offset: 0x7C */
-  __I  uint32_t VERSION;                           /**< UTMI RTL Version, offset: 0x80 */
+typedef struct
+{
+    __IO uint32_t PWD;      /**< USB PHY Power-Down Register, offset: 0x0 */
+    __IO uint32_t PWD_SET;  /**< USB PHY Power-Down Register, offset: 0x4 */
+    __IO uint32_t PWD_CLR;  /**< USB PHY Power-Down Register, offset: 0x8 */
+    __IO uint32_t PWD_TOG;  /**< USB PHY Power-Down Register, offset: 0xC */
+    __IO uint32_t TX;       /**< USB PHY Transmitter Control Register, offset: 0x10 */
+    __IO uint32_t TX_SET;   /**< USB PHY Transmitter Control Register, offset: 0x14 */
+    __IO uint32_t TX_CLR;   /**< USB PHY Transmitter Control Register, offset: 0x18 */
+    __IO uint32_t TX_TOG;   /**< USB PHY Transmitter Control Register, offset: 0x1C */
+    __IO uint32_t RX;       /**< USB PHY Receiver Control Register, offset: 0x20 */
+    __IO uint32_t RX_SET;   /**< USB PHY Receiver Control Register, offset: 0x24 */
+    __IO uint32_t RX_CLR;   /**< USB PHY Receiver Control Register, offset: 0x28 */
+    __IO uint32_t RX_TOG;   /**< USB PHY Receiver Control Register, offset: 0x2C */
+    __IO uint32_t CTRL;     /**< USB PHY General Control Register, offset: 0x30 */
+    __IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x34 */
+    __IO uint32_t CTRL_CLR; /**< USB PHY General Control Register, offset: 0x38 */
+    __IO uint32_t CTRL_TOG; /**< USB PHY General Control Register, offset: 0x3C */
+    __IO uint32_t STATUS;   /**< USB PHY Status Register, offset: 0x40 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t DEBUGr;       /**< USB PHY Debug Register, offset: 0x50 */
+    __IO uint32_t DEBUG_SET;    /**< USB PHY Debug Register, offset: 0x54 */
+    __IO uint32_t DEBUG_CLR;    /**< USB PHY Debug Register, offset: 0x58 */
+    __IO uint32_t DEBUG_TOG;    /**< USB PHY Debug Register, offset: 0x5C */
+    __I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t DEBUG1;     /**< UTMI Debug Status Register 1, offset: 0x70 */
+    __IO uint32_t DEBUG1_SET; /**< UTMI Debug Status Register 1, offset: 0x74 */
+    __IO uint32_t DEBUG1_CLR; /**< UTMI Debug Status Register 1, offset: 0x78 */
+    __IO uint32_t DEBUG1_TOG; /**< UTMI Debug Status Register 1, offset: 0x7C */
+    __I uint32_t VERSION;     /**< UTMI RTL Version, offset: 0x80 */
 } USBPHY_Type;
 
 /* ----------------------------------------------------------------------------
@@ -23195,1068 +26284,1346 @@ typedef struct {
 
 /*! @name PWD - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_RSVD0_MASK                    (0x3FFU)
-#define USBPHY_PWD_RSVD0_SHIFT                   (0U)
-#define USBPHY_PWD_RSVD0(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD0_SHIFT)) & USBPHY_PWD_RSVD0_MASK)
-#define USBPHY_PWD_TXPWDFS_MASK                  (0x400U)
-#define USBPHY_PWD_TXPWDFS_SHIFT                 (10U)
-#define USBPHY_PWD_TXPWDFS(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
-#define USBPHY_PWD_TXPWDIBIAS_MASK               (0x800U)
-#define USBPHY_PWD_TXPWDIBIAS_SHIFT              (11U)
-#define USBPHY_PWD_TXPWDIBIAS(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_TXPWDV2I_MASK                 (0x1000U)
-#define USBPHY_PWD_TXPWDV2I_SHIFT                (12U)
-#define USBPHY_PWD_TXPWDV2I(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
-#define USBPHY_PWD_RSVD1_MASK                    (0x1E000U)
-#define USBPHY_PWD_RSVD1_SHIFT                   (13U)
-#define USBPHY_PWD_RSVD1(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD1_SHIFT)) & USBPHY_PWD_RSVD1_MASK)
-#define USBPHY_PWD_RXPWDENV_MASK                 (0x20000U)
-#define USBPHY_PWD_RXPWDENV_SHIFT                (17U)
-#define USBPHY_PWD_RXPWDENV(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
-#define USBPHY_PWD_RXPWD1PT1_MASK                (0x40000U)
-#define USBPHY_PWD_RXPWD1PT1_SHIFT               (18U)
-#define USBPHY_PWD_RXPWD1PT1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
-#define USBPHY_PWD_RXPWDDIFF_MASK                (0x80000U)
-#define USBPHY_PWD_RXPWDDIFF_SHIFT               (19U)
-#define USBPHY_PWD_RXPWDDIFF(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
-#define USBPHY_PWD_RXPWDRX_MASK                  (0x100000U)
-#define USBPHY_PWD_RXPWDRX_SHIFT                 (20U)
-#define USBPHY_PWD_RXPWDRX(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)
-#define USBPHY_PWD_RSVD2_MASK                    (0xFFE00000U)
-#define USBPHY_PWD_RSVD2_SHIFT                   (21U)
-#define USBPHY_PWD_RSVD2(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
+#define USBPHY_PWD_RSVD0_MASK       (0x3FFU)
+#define USBPHY_PWD_RSVD0_SHIFT      (0U)
+#define USBPHY_PWD_RSVD0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD0_SHIFT)) & USBPHY_PWD_RSVD0_MASK)
+#define USBPHY_PWD_TXPWDFS_MASK     (0x400U)
+#define USBPHY_PWD_TXPWDFS_SHIFT    (10U)
+#define USBPHY_PWD_TXPWDFS(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
+#define USBPHY_PWD_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_TXPWDIBIAS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_TXPWDV2I_MASK   (0x1000U)
+#define USBPHY_PWD_TXPWDV2I_SHIFT  (12U)
+#define USBPHY_PWD_TXPWDV2I(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
+#define USBPHY_PWD_RSVD1_MASK      (0x1E000U)
+#define USBPHY_PWD_RSVD1_SHIFT     (13U)
+#define USBPHY_PWD_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD1_SHIFT)) & USBPHY_PWD_RSVD1_MASK)
+#define USBPHY_PWD_RXPWDENV_MASK   (0x20000U)
+#define USBPHY_PWD_RXPWDENV_SHIFT  (17U)
+#define USBPHY_PWD_RXPWDENV(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
+#define USBPHY_PWD_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_RXPWD1PT1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
+#define USBPHY_PWD_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_RXPWDDIFF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
+#define USBPHY_PWD_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_RXPWDRX(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)
+#define USBPHY_PWD_RSVD2_MASK    (0xFFE00000U)
+#define USBPHY_PWD_RSVD2_SHIFT   (21U)
+#define USBPHY_PWD_RSVD2(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_SET - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_SET_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_SET_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_SET_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD0_SHIFT)) & USBPHY_PWD_SET_RSVD0_MASK)
-#define USBPHY_PWD_SET_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_SET_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_SET_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
-#define USBPHY_PWD_SET_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_SET_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_SET_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_SET_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_SET_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_SET_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
-#define USBPHY_PWD_SET_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_SET_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_SET_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD1_SHIFT)) & USBPHY_PWD_SET_RSVD1_MASK)
-#define USBPHY_PWD_SET_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_SET_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_SET_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
-#define USBPHY_PWD_SET_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_SET_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_SET_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
-#define USBPHY_PWD_SET_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_SET_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_SET_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
-#define USBPHY_PWD_SET_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_SET_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_SET_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)
-#define USBPHY_PWD_SET_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_SET_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_SET_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD2_SHIFT)) & USBPHY_PWD_SET_RSVD2_MASK)
+#define USBPHY_PWD_SET_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_SET_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_SET_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD0_SHIFT)) & USBPHY_PWD_SET_RSVD0_MASK)
+#define USBPHY_PWD_SET_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_SET_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_SET_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
+#define USBPHY_PWD_SET_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_SET_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_SET_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_SET_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_SET_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_SET_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
+#define USBPHY_PWD_SET_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_SET_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_SET_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD1_SHIFT)) & USBPHY_PWD_SET_RSVD1_MASK)
+#define USBPHY_PWD_SET_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_SET_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_SET_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
+#define USBPHY_PWD_SET_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_SET_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_SET_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
+#define USBPHY_PWD_SET_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_SET_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_SET_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
+#define USBPHY_PWD_SET_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_SET_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_SET_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)
+#define USBPHY_PWD_SET_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_SET_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_SET_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD2_SHIFT)) & USBPHY_PWD_SET_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_CLR - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_CLR_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_CLR_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_CLR_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
-#define USBPHY_PWD_CLR_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_CLR_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_CLR_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
-#define USBPHY_PWD_CLR_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_CLR_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_CLR_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_CLR_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_CLR_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
-#define USBPHY_PWD_CLR_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_CLR_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_CLR_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD1_SHIFT)) & USBPHY_PWD_CLR_RSVD1_MASK)
-#define USBPHY_PWD_CLR_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_CLR_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_CLR_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
-#define USBPHY_PWD_CLR_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_CLR_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_CLR_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
-#define USBPHY_PWD_CLR_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_CLR_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_CLR_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
-#define USBPHY_PWD_CLR_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_CLR_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_CLR_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)
-#define USBPHY_PWD_CLR_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_CLR_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_CLR_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD2_SHIFT)) & USBPHY_PWD_CLR_RSVD2_MASK)
+#define USBPHY_PWD_CLR_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_CLR_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_CLR_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
+#define USBPHY_PWD_CLR_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_CLR_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_CLR_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
+#define USBPHY_PWD_CLR_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_CLR_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_CLR_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_CLR_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_CLR_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
+#define USBPHY_PWD_CLR_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_CLR_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_CLR_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD1_SHIFT)) & USBPHY_PWD_CLR_RSVD1_MASK)
+#define USBPHY_PWD_CLR_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_CLR_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_CLR_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
+#define USBPHY_PWD_CLR_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_CLR_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_CLR_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
+#define USBPHY_PWD_CLR_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_CLR_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_CLR_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
+#define USBPHY_PWD_CLR_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_CLR_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_CLR_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)
+#define USBPHY_PWD_CLR_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_CLR_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_CLR_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD2_SHIFT)) & USBPHY_PWD_CLR_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_TOG - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_TOG_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_TOG_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_TOG_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD0_SHIFT)) & USBPHY_PWD_TOG_RSVD0_MASK)
-#define USBPHY_PWD_TOG_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_TOG_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_TOG_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
-#define USBPHY_PWD_TOG_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_TOG_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_TOG_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_TOG_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_TOG_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
-#define USBPHY_PWD_TOG_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_TOG_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_TOG_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD1_SHIFT)) & USBPHY_PWD_TOG_RSVD1_MASK)
-#define USBPHY_PWD_TOG_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_TOG_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_TOG_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
-#define USBPHY_PWD_TOG_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_TOG_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_TOG_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
-#define USBPHY_PWD_TOG_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_TOG_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_TOG_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
-#define USBPHY_PWD_TOG_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_TOG_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_TOG_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)
-#define USBPHY_PWD_TOG_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_TOG_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_TOG_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD2_SHIFT)) & USBPHY_PWD_TOG_RSVD2_MASK)
+#define USBPHY_PWD_TOG_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_TOG_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_TOG_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD0_SHIFT)) & USBPHY_PWD_TOG_RSVD0_MASK)
+#define USBPHY_PWD_TOG_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_TOG_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_TOG_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
+#define USBPHY_PWD_TOG_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_TOG_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_TOG_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_TOG_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_TOG_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
+#define USBPHY_PWD_TOG_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_TOG_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_TOG_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD1_SHIFT)) & USBPHY_PWD_TOG_RSVD1_MASK)
+#define USBPHY_PWD_TOG_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_TOG_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_TOG_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
+#define USBPHY_PWD_TOG_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_TOG_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_TOG_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
+#define USBPHY_PWD_TOG_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_TOG_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_TOG_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
+#define USBPHY_PWD_TOG_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_TOG_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_TOG_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)
+#define USBPHY_PWD_TOG_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_TOG_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_TOG_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD2_SHIFT)) & USBPHY_PWD_TOG_RSVD2_MASK)
 /*! @} */
 
 /*! @name TX - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_D_CAL_MASK                     (0xFU)
-#define USBPHY_TX_D_CAL_SHIFT                    (0U)
-#define USBPHY_TX_D_CAL(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
-#define USBPHY_TX_RSVD0_MASK                     (0xF0U)
-#define USBPHY_TX_RSVD0_SHIFT                    (4U)
-#define USBPHY_TX_RSVD0(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD0_SHIFT)) & USBPHY_TX_RSVD0_MASK)
-#define USBPHY_TX_TXCAL45DN_MASK                 (0xF00U)
-#define USBPHY_TX_TXCAL45DN_SHIFT                (8U)
-#define USBPHY_TX_TXCAL45DN(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DN_SHIFT)) & USBPHY_TX_TXCAL45DN_MASK)
-#define USBPHY_TX_RSVD1_MASK                     (0xF000U)
-#define USBPHY_TX_RSVD1_SHIFT                    (12U)
-#define USBPHY_TX_RSVD1(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD1_SHIFT)) & USBPHY_TX_RSVD1_MASK)
-#define USBPHY_TX_TXCAL45DP_MASK                 (0xF0000U)
-#define USBPHY_TX_TXCAL45DP_SHIFT                (16U)
-#define USBPHY_TX_TXCAL45DP(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
-#define USBPHY_TX_RSVD2_MASK                     (0x3F00000U)
-#define USBPHY_TX_RSVD2_SHIFT                    (20U)
-#define USBPHY_TX_RSVD2(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD2_SHIFT)) & USBPHY_TX_RSVD2_MASK)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL_MASK        (0x1C000000U)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT       (26U)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_RSVD5_MASK                     (0xE0000000U)
-#define USBPHY_TX_RSVD5_SHIFT                    (29U)
-#define USBPHY_TX_RSVD5(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD5_SHIFT)) & USBPHY_TX_RSVD5_MASK)
+#define USBPHY_TX_D_CAL_MASK               (0xFU)
+#define USBPHY_TX_D_CAL_SHIFT              (0U)
+#define USBPHY_TX_D_CAL(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
+#define USBPHY_TX_RSVD0_MASK               (0xF0U)
+#define USBPHY_TX_RSVD0_SHIFT              (4U)
+#define USBPHY_TX_RSVD0(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD0_SHIFT)) & USBPHY_TX_RSVD0_MASK)
+#define USBPHY_TX_TXCAL45DN_MASK           (0xF00U)
+#define USBPHY_TX_TXCAL45DN_SHIFT          (8U)
+#define USBPHY_TX_TXCAL45DN(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DN_SHIFT)) & USBPHY_TX_TXCAL45DN_MASK)
+#define USBPHY_TX_RSVD1_MASK               (0xF000U)
+#define USBPHY_TX_RSVD1_SHIFT              (12U)
+#define USBPHY_TX_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD1_SHIFT)) & USBPHY_TX_RSVD1_MASK)
+#define USBPHY_TX_TXCAL45DP_MASK           (0xF0000U)
+#define USBPHY_TX_TXCAL45DP_SHIFT          (16U)
+#define USBPHY_TX_TXCAL45DP(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
+#define USBPHY_TX_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD2_SHIFT)) & USBPHY_TX_RSVD2_MASK)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_RSVD5_SHIFT (29U)
+#define USBPHY_TX_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD5_SHIFT)) & USBPHY_TX_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_SET - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_SET_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_SET_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_SET_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
-#define USBPHY_TX_SET_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_SET_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_SET_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD0_SHIFT)) & USBPHY_TX_SET_RSVD0_MASK)
-#define USBPHY_TX_SET_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_SET_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_SET_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DN_SHIFT)) & USBPHY_TX_SET_TXCAL45DN_MASK)
-#define USBPHY_TX_SET_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_SET_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_SET_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD1_SHIFT)) & USBPHY_TX_SET_RSVD1_MASK)
-#define USBPHY_TX_SET_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_SET_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_SET_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
-#define USBPHY_TX_SET_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_SET_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_SET_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD2_SHIFT)) & USBPHY_TX_SET_RSVD2_MASK)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_SET_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_SET_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_SET_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD5_SHIFT)) & USBPHY_TX_SET_RSVD5_MASK)
+#define USBPHY_TX_SET_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_SET_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_SET_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
+#define USBPHY_TX_SET_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_SET_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_SET_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD0_SHIFT)) & USBPHY_TX_SET_RSVD0_MASK)
+#define USBPHY_TX_SET_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_SET_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_SET_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DN_SHIFT)) & USBPHY_TX_SET_TXCAL45DN_MASK)
+#define USBPHY_TX_SET_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_SET_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_SET_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD1_SHIFT)) & USBPHY_TX_SET_RSVD1_MASK)
+#define USBPHY_TX_SET_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_SET_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_SET_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
+#define USBPHY_TX_SET_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_SET_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_SET_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD2_SHIFT)) & USBPHY_TX_SET_RSVD2_MASK)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_SET_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_SET_RSVD5_SHIFT (29U)
+#define USBPHY_TX_SET_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD5_SHIFT)) & USBPHY_TX_SET_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_CLR - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_CLR_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_CLR_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_CLR_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
-#define USBPHY_TX_CLR_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_CLR_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_CLR_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD0_SHIFT)) & USBPHY_TX_CLR_RSVD0_MASK)
-#define USBPHY_TX_CLR_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_CLR_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_CLR_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DN_SHIFT)) & USBPHY_TX_CLR_TXCAL45DN_MASK)
-#define USBPHY_TX_CLR_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_CLR_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_CLR_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD1_SHIFT)) & USBPHY_TX_CLR_RSVD1_MASK)
-#define USBPHY_TX_CLR_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_CLR_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_CLR_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
-#define USBPHY_TX_CLR_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_CLR_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_CLR_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD2_SHIFT)) & USBPHY_TX_CLR_RSVD2_MASK)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_CLR_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_CLR_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_CLR_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD5_SHIFT)) & USBPHY_TX_CLR_RSVD5_MASK)
+#define USBPHY_TX_CLR_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_CLR_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_CLR_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
+#define USBPHY_TX_CLR_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_CLR_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_CLR_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD0_SHIFT)) & USBPHY_TX_CLR_RSVD0_MASK)
+#define USBPHY_TX_CLR_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_CLR_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_CLR_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DN_SHIFT)) & USBPHY_TX_CLR_TXCAL45DN_MASK)
+#define USBPHY_TX_CLR_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_CLR_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_CLR_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD1_SHIFT)) & USBPHY_TX_CLR_RSVD1_MASK)
+#define USBPHY_TX_CLR_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_CLR_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_CLR_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
+#define USBPHY_TX_CLR_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_CLR_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_CLR_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD2_SHIFT)) & USBPHY_TX_CLR_RSVD2_MASK)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_CLR_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_CLR_RSVD5_SHIFT (29U)
+#define USBPHY_TX_CLR_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD5_SHIFT)) & USBPHY_TX_CLR_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_TOG - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_TOG_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_TOG_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_TOG_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
-#define USBPHY_TX_TOG_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_TOG_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_TOG_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD0_SHIFT)) & USBPHY_TX_TOG_RSVD0_MASK)
-#define USBPHY_TX_TOG_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_TOG_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_TOG_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DN_SHIFT)) & USBPHY_TX_TOG_TXCAL45DN_MASK)
-#define USBPHY_TX_TOG_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_TOG_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_TOG_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD1_SHIFT)) & USBPHY_TX_TOG_RSVD1_MASK)
-#define USBPHY_TX_TOG_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_TOG_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_TOG_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
-#define USBPHY_TX_TOG_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_TOG_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_TOG_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD2_SHIFT)) & USBPHY_TX_TOG_RSVD2_MASK)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_TOG_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_TOG_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_TOG_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD5_SHIFT)) & USBPHY_TX_TOG_RSVD5_MASK)
+#define USBPHY_TX_TOG_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_TOG_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_TOG_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
+#define USBPHY_TX_TOG_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_TOG_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_TOG_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD0_SHIFT)) & USBPHY_TX_TOG_RSVD0_MASK)
+#define USBPHY_TX_TOG_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_TOG_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_TOG_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DN_SHIFT)) & USBPHY_TX_TOG_TXCAL45DN_MASK)
+#define USBPHY_TX_TOG_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_TOG_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_TOG_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD1_SHIFT)) & USBPHY_TX_TOG_RSVD1_MASK)
+#define USBPHY_TX_TOG_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_TOG_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_TOG_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
+#define USBPHY_TX_TOG_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_TOG_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_TOG_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD2_SHIFT)) & USBPHY_TX_TOG_RSVD2_MASK)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_TOG_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_TOG_RSVD5_SHIFT (29U)
+#define USBPHY_TX_TOG_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD5_SHIFT)) & USBPHY_TX_TOG_RSVD5_MASK)
 /*! @} */
 
 /*! @name RX - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_ENVADJ_MASK                    (0x7U)
-#define USBPHY_RX_ENVADJ_SHIFT                   (0U)
-#define USBPHY_RX_ENVADJ(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
-#define USBPHY_RX_RSVD0_MASK                     (0x8U)
-#define USBPHY_RX_RSVD0_SHIFT                    (3U)
-#define USBPHY_RX_RSVD0(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD0_SHIFT)) & USBPHY_RX_RSVD0_MASK)
-#define USBPHY_RX_DISCONADJ_MASK                 (0x70U)
-#define USBPHY_RX_DISCONADJ_SHIFT                (4U)
-#define USBPHY_RX_DISCONADJ(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
-#define USBPHY_RX_RSVD1_MASK                     (0x3FFF80U)
-#define USBPHY_RX_RSVD1_SHIFT                    (7U)
-#define USBPHY_RX_RSVD1(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD1_SHIFT)) & USBPHY_RX_RSVD1_MASK)
-#define USBPHY_RX_RXDBYPASS_MASK                 (0x400000U)
-#define USBPHY_RX_RXDBYPASS_SHIFT                (22U)
-#define USBPHY_RX_RXDBYPASS(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)
-#define USBPHY_RX_RSVD2_MASK                     (0xFF800000U)
-#define USBPHY_RX_RSVD2_SHIFT                    (23U)
-#define USBPHY_RX_RSVD2(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD2_SHIFT)) & USBPHY_RX_RSVD2_MASK)
+#define USBPHY_RX_ENVADJ_MASK     (0x7U)
+#define USBPHY_RX_ENVADJ_SHIFT    (0U)
+#define USBPHY_RX_ENVADJ(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
+#define USBPHY_RX_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD0_SHIFT)) & USBPHY_RX_RSVD0_MASK)
+#define USBPHY_RX_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_DISCONADJ(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
+#define USBPHY_RX_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD1_SHIFT)) & USBPHY_RX_RSVD1_MASK)
+#define USBPHY_RX_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_RXDBYPASS(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)
+#define USBPHY_RX_RSVD2_MASK      (0xFF800000U)
+#define USBPHY_RX_RSVD2_SHIFT     (23U)
+#define USBPHY_RX_RSVD2(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD2_SHIFT)) & USBPHY_RX_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_SET - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_SET_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_SET_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_SET_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
-#define USBPHY_RX_SET_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_SET_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_SET_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD0_SHIFT)) & USBPHY_RX_SET_RSVD0_MASK)
-#define USBPHY_RX_SET_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_SET_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_SET_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
-#define USBPHY_RX_SET_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_SET_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_SET_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD1_SHIFT)) & USBPHY_RX_SET_RSVD1_MASK)
-#define USBPHY_RX_SET_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_SET_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_SET_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)
-#define USBPHY_RX_SET_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_SET_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_SET_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD2_SHIFT)) & USBPHY_RX_SET_RSVD2_MASK)
+#define USBPHY_RX_SET_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_SET_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_SET_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
+#define USBPHY_RX_SET_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_SET_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_SET_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD0_SHIFT)) & USBPHY_RX_SET_RSVD0_MASK)
+#define USBPHY_RX_SET_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_SET_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_SET_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
+#define USBPHY_RX_SET_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_SET_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_SET_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD1_SHIFT)) & USBPHY_RX_SET_RSVD1_MASK)
+#define USBPHY_RX_SET_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_SET_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_SET_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)
+#define USBPHY_RX_SET_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_SET_RSVD2_SHIFT (23U)
+#define USBPHY_RX_SET_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD2_SHIFT)) & USBPHY_RX_SET_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_CLR - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_CLR_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_CLR_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_CLR_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
-#define USBPHY_RX_CLR_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_CLR_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_CLR_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD0_SHIFT)) & USBPHY_RX_CLR_RSVD0_MASK)
-#define USBPHY_RX_CLR_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_CLR_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_CLR_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
-#define USBPHY_RX_CLR_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_CLR_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_CLR_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD1_SHIFT)) & USBPHY_RX_CLR_RSVD1_MASK)
-#define USBPHY_RX_CLR_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_CLR_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_CLR_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)
-#define USBPHY_RX_CLR_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_CLR_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_CLR_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD2_SHIFT)) & USBPHY_RX_CLR_RSVD2_MASK)
+#define USBPHY_RX_CLR_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_CLR_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_CLR_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
+#define USBPHY_RX_CLR_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_CLR_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_CLR_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD0_SHIFT)) & USBPHY_RX_CLR_RSVD0_MASK)
+#define USBPHY_RX_CLR_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_CLR_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_CLR_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
+#define USBPHY_RX_CLR_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_CLR_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_CLR_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD1_SHIFT)) & USBPHY_RX_CLR_RSVD1_MASK)
+#define USBPHY_RX_CLR_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_CLR_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_CLR_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)
+#define USBPHY_RX_CLR_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_CLR_RSVD2_SHIFT (23U)
+#define USBPHY_RX_CLR_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD2_SHIFT)) & USBPHY_RX_CLR_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_TOG - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_TOG_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_TOG_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_TOG_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
-#define USBPHY_RX_TOG_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_TOG_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_TOG_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD0_SHIFT)) & USBPHY_RX_TOG_RSVD0_MASK)
-#define USBPHY_RX_TOG_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_TOG_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_TOG_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
-#define USBPHY_RX_TOG_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_TOG_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_TOG_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD1_SHIFT)) & USBPHY_RX_TOG_RSVD1_MASK)
-#define USBPHY_RX_TOG_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_TOG_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_TOG_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)
-#define USBPHY_RX_TOG_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_TOG_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_TOG_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD2_SHIFT)) & USBPHY_RX_TOG_RSVD2_MASK)
+#define USBPHY_RX_TOG_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_TOG_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_TOG_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
+#define USBPHY_RX_TOG_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_TOG_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_TOG_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD0_SHIFT)) & USBPHY_RX_TOG_RSVD0_MASK)
+#define USBPHY_RX_TOG_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_TOG_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_TOG_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
+#define USBPHY_RX_TOG_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_TOG_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_TOG_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD1_SHIFT)) & USBPHY_RX_TOG_RSVD1_MASK)
+#define USBPHY_RX_TOG_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_TOG_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_TOG_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)
+#define USBPHY_RX_TOG_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_TOG_RSVD2_SHIFT (23U)
+#define USBPHY_RX_TOG_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD2_SHIFT)) & USBPHY_RX_TOG_RSVD2_MASK)
 /*! @} */
 
 /*! @name CTRL - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK        (0x1U)
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT       (0U)
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT_MASK      (0x2U)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT     (1U)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_ENIRQHOSTDISCON_MASK         (0x4U)
-#define USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT        (2U)
-#define USBPHY_CTRL_ENIRQHOSTDISCON(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK    (0x8U)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT_MASK       (0x10U)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT      (4U)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK      (0x20U)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT     (5U)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK          (0x40U)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT         (6U)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_ENOTGIDDETECT_MASK           (0x80U)
-#define USBPHY_CTRL_ENOTGIDDETECT_SHIFT          (7U)
-#define USBPHY_CTRL_ENOTGIDDETECT(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_RESUMEIRQSTICKY_MASK         (0x100U)
-#define USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT        (8U)
-#define USBPHY_CTRL_RESUMEIRQSTICKY(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT_MASK       (0x200U)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT      (9U)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_RESUME_IRQ_MASK              (0x400U)
-#define USBPHY_CTRL_RESUME_IRQ_SHIFT             (10U)
-#define USBPHY_CTRL_RESUME_IRQ(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN_MASK          (0x800U)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT         (11U)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ_MASK           (0x1000U)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT          (12U)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_DATA_ON_LRADC_MASK           (0x2000U)
-#define USBPHY_CTRL_DATA_ON_LRADC_SHIFT          (13U)
-#define USBPHY_CTRL_DATA_ON_LRADC(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_ENUTMILEVEL2_MASK            (0x4000U)
-#define USBPHY_CTRL_ENUTMILEVEL2_SHIFT           (14U)
-#define USBPHY_CTRL_ENUTMILEVEL2(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_ENUTMILEVEL3_MASK            (0x8000U)
-#define USBPHY_CTRL_ENUTMILEVEL3_SHIFT           (15U)
-#define USBPHY_CTRL_ENUTMILEVEL3(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_ENIRQWAKEUP_MASK             (0x10000U)
-#define USBPHY_CTRL_ENIRQWAKEUP_SHIFT            (16U)
-#define USBPHY_CTRL_ENIRQWAKEUP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_WAKEUP_IRQ_MASK              (0x20000U)
-#define USBPHY_CTRL_WAKEUP_IRQ_SHIFT             (17U)
-#define USBPHY_CTRL_WAKEUP_IRQ(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK        (0x40000U)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT       (18U)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK       (0x80000U)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT      (19U)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK       (0x100000U)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT      (20U)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP_MASK          (0x200000U)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT         (21U)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_ENIDCHG_WKUP_MASK            (0x400000U)
-#define USBPHY_CTRL_ENIDCHG_WKUP_SHIFT           (22U)
-#define USBPHY_CTRL_ENIDCHG_WKUP(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP_MASK          (0x800000U)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT         (23U)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_FSDLL_RST_EN_MASK            (0x1000000U)
-#define USBPHY_CTRL_FSDLL_RST_EN_SHIFT           (24U)
-#define USBPHY_CTRL_FSDLL_RST_EN(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_RSVD1_MASK                   (0x6000000U)
-#define USBPHY_CTRL_RSVD1_SHIFT                  (25U)
-#define USBPHY_CTRL_RSVD1(x)                     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RSVD1_SHIFT)) & USBPHY_CTRL_RSVD1_MASK)
-#define USBPHY_CTRL_OTG_ID_VALUE_MASK            (0x8000000U)
-#define USBPHY_CTRL_OTG_ID_VALUE_SHIFT           (27U)
-#define USBPHY_CTRL_OTG_ID_VALUE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK       (0x10000000U)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT      (28U)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_UTMI_SUSPENDM_MASK           (0x20000000U)
-#define USBPHY_CTRL_UTMI_SUSPENDM_SHIFT          (29U)
-#define USBPHY_CTRL_UTMI_SUSPENDM(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_CLKGATE_MASK                 (0x40000000U)
-#define USBPHY_CTRL_CLKGATE_SHIFT                (30U)
-#define USBPHY_CTRL_CLKGATE(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
-#define USBPHY_CTRL_SFTRST_MASK                  (0x80000000U)
-#define USBPHY_CTRL_SFTRST_SHIFT                 (31U)
-#define USBPHY_CTRL_SFTRST(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT_MASK  (0x2U)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT (1U)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_ENIRQHOSTDISCON(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT (3U)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK  (0x20U)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT (5U)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_ENOTGIDDETECT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_RESUMEIRQSTICKY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_RESUME_IRQ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_DATA_ON_LRADC(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_ENUTMILEVEL2(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_ENUTMILEVEL3(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_ENIRQWAKEUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_WAKEUP_IRQ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_ENIDCHG_WKUP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_FSDLL_RST_EN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_RSVD1_MASK         (0x6000000U)
+#define USBPHY_CTRL_RSVD1_SHIFT        (25U)
+#define USBPHY_CTRL_RSVD1(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RSVD1_SHIFT)) & USBPHY_CTRL_RSVD1_MASK)
+#define USBPHY_CTRL_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_OTG_ID_VALUE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_UTMI_SUSPENDM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_CLKGATE(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
+#define USBPHY_CTRL_SFTRST_MASK   (0x80000000U)
+#define USBPHY_CTRL_SFTRST_SHIFT  (31U)
+#define USBPHY_CTRL_SFTRST(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_SET - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_SET_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_SET_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_SET_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_SET_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_SET_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_SET_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_SET_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RSVD1_SHIFT)) & USBPHY_CTRL_SET_RSVD1_MASK)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_SET_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_SET_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_SET_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
-#define USBPHY_CTRL_SET_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_SET_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_SET_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)
+#define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_SET_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_SET_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_SET_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_SET_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_SET_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_SET_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_SET_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RSVD1_SHIFT)) & USBPHY_CTRL_SET_RSVD1_MASK)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_SET_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_SET_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_SET_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
+#define USBPHY_CTRL_SET_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_SET_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_SET_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_CLR - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_CLR_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_CLR_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_CLR_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_CLR_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_CLR_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RSVD1_SHIFT)) & USBPHY_CTRL_CLR_RSVD1_MASK)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_CLR_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_CLR_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_CLR_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
-#define USBPHY_CTRL_CLR_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_CLR_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_CLR_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_CLR_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_CLR_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_CLR_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_CLR_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_CLR_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RSVD1_SHIFT)) & USBPHY_CTRL_CLR_RSVD1_MASK)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_CLR_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_CLR_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_CLR_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
+#define USBPHY_CTRL_CLR_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_CLR_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_CLR_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_TOG - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_TOG_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_TOG_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_TOG_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_TOG_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_TOG_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RSVD1_SHIFT)) & USBPHY_CTRL_TOG_RSVD1_MASK)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_TOG_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_TOG_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_TOG_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
-#define USBPHY_CTRL_TOG_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_TOG_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_TOG_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_TOG_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_TOG_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_TOG_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_TOG_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_TOG_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RSVD1_SHIFT)) & USBPHY_CTRL_TOG_RSVD1_MASK)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_TOG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_TOG_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_TOG_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
+#define USBPHY_CTRL_TOG_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_TOG_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_TOG_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)
 /*! @} */
 
 /*! @name STATUS - USB PHY Status Register */
 /*! @{ */
-#define USBPHY_STATUS_RSVD0_MASK                 (0x7U)
-#define USBPHY_STATUS_RSVD0_SHIFT                (0U)
-#define USBPHY_STATUS_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD0_SHIFT)) & USBPHY_STATUS_RSVD0_MASK)
-#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK (0x8U)
+#define USBPHY_STATUS_RSVD0_MASK                    (0x7U)
+#define USBPHY_STATUS_RSVD0_SHIFT                   (0U)
+#define USBPHY_STATUS_RSVD0(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD0_SHIFT)) & USBPHY_STATUS_RSVD0_MASK)
+#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK  (0x8U)
 #define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT (3U)
-#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
-#define USBPHY_STATUS_RSVD1_MASK                 (0x30U)
-#define USBPHY_STATUS_RSVD1_SHIFT                (4U)
-#define USBPHY_STATUS_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD1_SHIFT)) & USBPHY_STATUS_RSVD1_MASK)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS_MASK      (0x40U)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT     (6U)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
-#define USBPHY_STATUS_RSVD2_MASK                 (0x80U)
-#define USBPHY_STATUS_RSVD2_SHIFT                (7U)
-#define USBPHY_STATUS_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD2_SHIFT)) & USBPHY_STATUS_RSVD2_MASK)
-#define USBPHY_STATUS_OTGID_STATUS_MASK          (0x100U)
-#define USBPHY_STATUS_OTGID_STATUS_SHIFT         (8U)
-#define USBPHY_STATUS_OTGID_STATUS(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
-#define USBPHY_STATUS_RSVD3_MASK                 (0x200U)
-#define USBPHY_STATUS_RSVD3_SHIFT                (9U)
-#define USBPHY_STATUS_RSVD3(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD3_SHIFT)) & USBPHY_STATUS_RSVD3_MASK)
-#define USBPHY_STATUS_RESUME_STATUS_MASK         (0x400U)
-#define USBPHY_STATUS_RESUME_STATUS_SHIFT        (10U)
-#define USBPHY_STATUS_RESUME_STATUS(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)
-#define USBPHY_STATUS_RSVD4_MASK                 (0xFFFFF800U)
-#define USBPHY_STATUS_RSVD4_SHIFT                (11U)
-#define USBPHY_STATUS_RSVD4(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD4_SHIFT)) & USBPHY_STATUS_RSVD4_MASK)
+#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) &                                    \
+     USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
+#define USBPHY_STATUS_RSVD1_MASK             (0x30U)
+#define USBPHY_STATUS_RSVD1_SHIFT            (4U)
+#define USBPHY_STATUS_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD1_SHIFT)) & USBPHY_STATUS_RSVD1_MASK)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS_MASK  (0x40U)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT (6U)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
+#define USBPHY_STATUS_RSVD2_MASK         (0x80U)
+#define USBPHY_STATUS_RSVD2_SHIFT        (7U)
+#define USBPHY_STATUS_RSVD2(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD2_SHIFT)) & USBPHY_STATUS_RSVD2_MASK)
+#define USBPHY_STATUS_OTGID_STATUS_MASK  (0x100U)
+#define USBPHY_STATUS_OTGID_STATUS_SHIFT (8U)
+#define USBPHY_STATUS_OTGID_STATUS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
+#define USBPHY_STATUS_RSVD3_MASK          (0x200U)
+#define USBPHY_STATUS_RSVD3_SHIFT         (9U)
+#define USBPHY_STATUS_RSVD3(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD3_SHIFT)) & USBPHY_STATUS_RSVD3_MASK)
+#define USBPHY_STATUS_RESUME_STATUS_MASK  (0x400U)
+#define USBPHY_STATUS_RESUME_STATUS_SHIFT (10U)
+#define USBPHY_STATUS_RESUME_STATUS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)
+#define USBPHY_STATUS_RSVD4_MASK  (0xFFFFF800U)
+#define USBPHY_STATUS_RSVD4_SHIFT (11U)
+#define USBPHY_STATUS_RSVD4(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD4_SHIFT)) & USBPHY_STATUS_RSVD4_MASK)
 /*! @} */
 
 /*! @name DEBUG - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_OTGIDPIOLOCK_MASK           (0x1U)
-#define USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT          (0U)
-#define USBPHY_DEBUG_OTGIDPIOLOCK(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT  (1U)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_HSTPULLDOWN_MASK            (0xCU)
-#define USBPHY_DEBUG_HSTPULLDOWN_SHIFT           (2U)
-#define USBPHY_DEBUG_HSTPULLDOWN(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_ENHSTPULLDOWN_MASK          (0x30U)
-#define USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT         (4U)
-#define USBPHY_DEBUG_ENHSTPULLDOWN(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_RSVD0_MASK                  (0xC0U)
-#define USBPHY_DEBUG_RSVD0_SHIFT                 (6U)
-#define USBPHY_DEBUG_RSVD0(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD0_SHIFT)) & USBPHY_DEBUG_RSVD0_MASK)
-#define USBPHY_DEBUG_TX2RXCOUNT_MASK             (0xF00U)
-#define USBPHY_DEBUG_TX2RXCOUNT_SHIFT            (8U)
-#define USBPHY_DEBUG_TX2RXCOUNT(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_ENTX2RXCOUNT_MASK           (0x1000U)
-#define USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT          (12U)
-#define USBPHY_DEBUG_ENTX2RXCOUNT(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_RSVD1_MASK                  (0xE000U)
-#define USBPHY_DEBUG_RSVD1_SHIFT                 (13U)
-#define USBPHY_DEBUG_RSVD1(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD1_SHIFT)) & USBPHY_DEBUG_RSVD1_MASK)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK      (0x1F0000U)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT     (16U)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_RSVD2_MASK                  (0xE00000U)
-#define USBPHY_DEBUG_RSVD2_SHIFT                 (21U)
-#define USBPHY_DEBUG_RSVD2(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD2_SHIFT)) & USBPHY_DEBUG_RSVD2_MASK)
-#define USBPHY_DEBUG_ENSQUELCHRESET_MASK         (0x1000000U)
-#define USBPHY_DEBUG_ENSQUELCHRESET_SHIFT        (24U)
-#define USBPHY_DEBUG_ENSQUELCHRESET(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK     (0x1E000000U)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT    (25U)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK      (0x20000000U)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT     (29U)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_CLKGATE_MASK                (0x40000000U)
-#define USBPHY_DEBUG_CLKGATE_SHIFT               (30U)
-#define USBPHY_DEBUG_CLKGATE(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)
-#define USBPHY_DEBUG_RSVD3_MASK                  (0x80000000U)
-#define USBPHY_DEBUG_RSVD3_SHIFT                 (31U)
-#define USBPHY_DEBUG_RSVD3(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD3_SHIFT)) & USBPHY_DEBUG_RSVD3_MASK)
+#define USBPHY_DEBUG_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_OTGIDPIOLOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT (1U)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_HSTPULLDOWN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_ENHSTPULLDOWN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_RSVD0_MASK       (0xC0U)
+#define USBPHY_DEBUG_RSVD0_SHIFT      (6U)
+#define USBPHY_DEBUG_RSVD0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD0_SHIFT)) & USBPHY_DEBUG_RSVD0_MASK)
+#define USBPHY_DEBUG_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_TX2RXCOUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_ENTX2RXCOUNT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_RSVD1_MASK              (0xE000U)
+#define USBPHY_DEBUG_RSVD1_SHIFT             (13U)
+#define USBPHY_DEBUG_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD1_SHIFT)) & USBPHY_DEBUG_RSVD1_MASK)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT (16U)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_RSVD2_MASK           (0xE00000U)
+#define USBPHY_DEBUG_RSVD2_SHIFT          (21U)
+#define USBPHY_DEBUG_RSVD2(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD2_SHIFT)) & USBPHY_DEBUG_RSVD2_MASK)
+#define USBPHY_DEBUG_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_ENSQUELCHRESET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT (25U)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK  (0x20000000U)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT (29U)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_CLKGATE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)
+#define USBPHY_DEBUG_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_RSVD3(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD3_SHIFT)) & USBPHY_DEBUG_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_SET - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_SET_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_SET_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_SET_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD0_SHIFT)) & USBPHY_DEBUG_SET_RSVD0_MASK)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_SET_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_SET_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_SET_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD1_SHIFT)) & USBPHY_DEBUG_SET_RSVD1_MASK)
+#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_SET_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_SET_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_SET_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD0_SHIFT)) & USBPHY_DEBUG_SET_RSVD0_MASK)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_SET_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_SET_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_SET_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD1_SHIFT)) & USBPHY_DEBUG_SET_RSVD1_MASK)
 #define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_SET_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_SET_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_SET_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD2_SHIFT)) & USBPHY_DEBUG_SET_RSVD2_MASK)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_SET_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_SET_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_SET_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD2_SHIFT)) & USBPHY_DEBUG_SET_RSVD2_MASK)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_SET_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_SET_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_SET_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)
-#define USBPHY_DEBUG_SET_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_SET_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_SET_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD3_SHIFT)) & USBPHY_DEBUG_SET_RSVD3_MASK)
+#define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_SET_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_SET_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_SET_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)
+#define USBPHY_DEBUG_SET_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_SET_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_SET_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD3_SHIFT)) & USBPHY_DEBUG_SET_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_CLR - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_CLR_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_CLR_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_CLR_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG_CLR_RSVD0_MASK)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_CLR_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_CLR_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG_CLR_RSVD1_MASK)
+#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_CLR_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_CLR_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_CLR_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG_CLR_RSVD0_MASK)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_CLR_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_CLR_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG_CLR_RSVD1_MASK)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_CLR_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_CLR_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD2_SHIFT)) & USBPHY_DEBUG_CLR_RSVD2_MASK)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_CLR_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_CLR_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD2_SHIFT)) & USBPHY_DEBUG_CLR_RSVD2_MASK)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_CLR_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_CLR_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_CLR_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)
-#define USBPHY_DEBUG_CLR_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_CLR_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_CLR_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD3_SHIFT)) & USBPHY_DEBUG_CLR_RSVD3_MASK)
+#define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_CLR_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_CLR_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_CLR_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)
+#define USBPHY_DEBUG_CLR_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_CLR_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_CLR_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD3_SHIFT)) & USBPHY_DEBUG_CLR_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_TOG - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_TOG_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_TOG_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_TOG_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG_TOG_RSVD0_MASK)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_TOG_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_TOG_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG_TOG_RSVD1_MASK)
+#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_TOG_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_TOG_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_TOG_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG_TOG_RSVD0_MASK)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_TOG_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_TOG_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG_TOG_RSVD1_MASK)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_TOG_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_TOG_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD2_SHIFT)) & USBPHY_DEBUG_TOG_RSVD2_MASK)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_TOG_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_TOG_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD2_SHIFT)) & USBPHY_DEBUG_TOG_RSVD2_MASK)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_TOG_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_TOG_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_TOG_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)
-#define USBPHY_DEBUG_TOG_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_TOG_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_TOG_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD3_SHIFT)) & USBPHY_DEBUG_TOG_RSVD3_MASK)
+#define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_TOG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_TOG_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_TOG_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)
+#define USBPHY_DEBUG_TOG_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_TOG_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_TOG_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD3_SHIFT)) & USBPHY_DEBUG_TOG_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG0_STATUS - UTMI Debug Status Register 0 */
 /*! @{ */
-#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK (0xFFFFU)
+#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK  (0xFFFFU)
 #define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT (0U)
-#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
-#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK (0x3FF0000U)
+#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) &                                \
+     USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK  (0x3FF0000U)
 #define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT (16U)
-#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) &                             \
+     USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
 #define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK  (0xFC000000U)
 #define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT (26U)
-#define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)
 /*! @} */
 
 /*! @name DEBUG1 - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_RSVD0_MASK                 (0x1FFFU)
-#define USBPHY_DEBUG1_RSVD0_SHIFT                (0U)
-#define USBPHY_DEBUG1_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD0_SHIFT)) & USBPHY_DEBUG1_RSVD0_MASK)
-#define USBPHY_DEBUG1_ENTAILADJVD_MASK           (0x6000U)
-#define USBPHY_DEBUG1_ENTAILADJVD_SHIFT          (13U)
-#define USBPHY_DEBUG1_ENTAILADJVD(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_RSVD1_MASK                 (0xFFFF8000U)
-#define USBPHY_DEBUG1_RSVD1_SHIFT                (15U)
-#define USBPHY_DEBUG1_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD1_SHIFT)) & USBPHY_DEBUG1_RSVD1_MASK)
+#define USBPHY_DEBUG1_RSVD0_MASK        (0x1FFFU)
+#define USBPHY_DEBUG1_RSVD0_SHIFT       (0U)
+#define USBPHY_DEBUG1_RSVD0(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD0_SHIFT)) & USBPHY_DEBUG1_RSVD0_MASK)
+#define USBPHY_DEBUG1_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_ENTAILADJVD(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_RSVD1(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD1_SHIFT)) & USBPHY_DEBUG1_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_SET - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_SET_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_SET_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_SET_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD0_SHIFT)) & USBPHY_DEBUG1_SET_RSVD0_MASK)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_SET_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_SET_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_SET_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD1_SHIFT)) & USBPHY_DEBUG1_SET_RSVD1_MASK)
+#define USBPHY_DEBUG1_SET_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_SET_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_SET_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD0_SHIFT)) & USBPHY_DEBUG1_SET_RSVD0_MASK)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_SET_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_SET_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_SET_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD1_SHIFT)) & USBPHY_DEBUG1_SET_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_CLR - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_CLR_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_CLR_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_CLR_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD0_MASK)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_CLR_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_CLR_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_CLR_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD1_MASK)
+#define USBPHY_DEBUG1_CLR_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_CLR_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_CLR_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD0_MASK)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_CLR_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_CLR_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_CLR_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_TOG - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_TOG_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_TOG_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_TOG_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD0_MASK)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_TOG_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_TOG_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_TOG_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD1_MASK)
+#define USBPHY_DEBUG1_TOG_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_TOG_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_TOG_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD0_MASK)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_TOG_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_TOG_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_TOG_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD1_MASK)
 /*! @} */
 
 /*! @name VERSION - UTMI RTL Version */
 /*! @{ */
-#define USBPHY_VERSION_STEP_MASK                 (0xFFFFU)
-#define USBPHY_VERSION_STEP_SHIFT                (0U)
-#define USBPHY_VERSION_STEP(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
-#define USBPHY_VERSION_MINOR_MASK                (0xFF0000U)
-#define USBPHY_VERSION_MINOR_SHIFT               (16U)
-#define USBPHY_VERSION_MINOR(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
-#define USBPHY_VERSION_MAJOR_MASK                (0xFF000000U)
-#define USBPHY_VERSION_MAJOR_SHIFT               (24U)
-#define USBPHY_VERSION_MAJOR(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)
+#define USBPHY_VERSION_STEP_MASK   (0xFFFFU)
+#define USBPHY_VERSION_STEP_SHIFT  (0U)
+#define USBPHY_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
+#define USBPHY_VERSION_MINOR_MASK  (0xFF0000U)
+#define USBPHY_VERSION_MINOR_SHIFT (16U)
+#define USBPHY_VERSION_MINOR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
+#define USBPHY_VERSION_MAJOR_MASK  (0xFF000000U)
+#define USBPHY_VERSION_MAJOR_SHIFT (24U)
+#define USBPHY_VERSION_MAJOR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USBPHY_Register_Masks */
 
-
 /* USBPHY - Peripheral instance base addresses */
 /** Peripheral USBPHY1 base address */
-#define USBPHY1_BASE                             (0x400D9000u)
+#define USBPHY1_BASE (0x400D9000u)
 /** Peripheral USBPHY1 base pointer */
-#define USBPHY1                                  ((USBPHY_Type *)USBPHY1_BASE)
+#define USBPHY1 ((USBPHY_Type *)USBPHY1_BASE)
 /** Peripheral USBPHY2 base address */
-#define USBPHY2_BASE                             (0x400DA000u)
+#define USBPHY2_BASE (0x400DA000u)
 /** Peripheral USBPHY2 base pointer */
-#define USBPHY2                                  ((USBPHY_Type *)USBPHY2_BASE)
+#define USBPHY2 ((USBPHY_Type *)USBPHY2_BASE)
 /** Array initializer of USBPHY peripheral base addresses */
-#define USBPHY_BASE_ADDRS                        { 0u, USBPHY1_BASE, USBPHY2_BASE }
+#define USBPHY_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, USBPHY1_BASE, USBPHY2_BASE                                                                                 \
+    }
 /** Array initializer of USBPHY peripheral base pointers */
-#define USBPHY_BASE_PTRS                         { (USBPHY_Type *)0u, USBPHY1, USBPHY2 }
+#define USBPHY_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (USBPHY_Type *)0u, USBPHY1, USBPHY2                                                                            \
+    }
 /** Interrupt vectors for the USBPHY peripheral type */
-#define USBPHY_IRQS                              { NotAvail_IRQn, USB_PHY1_IRQn, USB_PHY2_IRQn }
+#define USBPHY_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, USB_PHY1_IRQn, USB_PHY2_IRQn                                                                    \
+    }
 /* Backward compatibility */
-#define USBPHY_CTRL_ENDEVPLUGINDET_MASK     USBPHY_CTRL_ENDEVPLUGINDETECT_MASK
-#define USBPHY_CTRL_ENDEVPLUGINDET_SHIFT    USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT
-#define USBPHY_CTRL_ENDEVPLUGINDET(x)       USBPHY_CTRL_ENDEVPLUGINDETECT(x)
-#define USBPHY_TX_TXCAL45DM_MASK            USBPHY_TX_TXCAL45DN_MASK
-#define USBPHY_TX_TXCAL45DM_SHIFT           USBPHY_TX_TXCAL45DN_SHIFT
-#define USBPHY_TX_TXCAL45DM(x)              USBPHY_TX_TXCAL45DN(x)
-
+#define USBPHY_CTRL_ENDEVPLUGINDET_MASK  USBPHY_CTRL_ENDEVPLUGINDETECT_MASK
+#define USBPHY_CTRL_ENDEVPLUGINDET_SHIFT USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT
+#define USBPHY_CTRL_ENDEVPLUGINDET(x)    USBPHY_CTRL_ENDEVPLUGINDETECT(x)
+#define USBPHY_TX_TXCAL45DM_MASK         USBPHY_TX_TXCAL45DN_MASK
+#define USBPHY_TX_TXCAL45DM_SHIFT        USBPHY_TX_TXCAL45DN_SHIFT
+#define USBPHY_TX_TXCAL45DM(x)           USBPHY_TX_TXCAL45DN(x)
 
 /*!
  * @}
  */ /* end of group USBPHY_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USB_ANALOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -24267,27 +27634,29 @@ typedef struct {
  */
 
 /** USB_ANALOG - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[416];
-  struct {                                         /* offset: 0x1A0, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT;                       /**< USB VBUS Detect Register, array offset: 0x1A0, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_SET;                   /**< USB VBUS Detect Register, array offset: 0x1A4, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_CLR;                   /**< USB VBUS Detect Register, array offset: 0x1A8, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_TOG;                   /**< USB VBUS Detect Register, array offset: 0x1AC, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT;                       /**< USB Charger Detect Register, array offset: 0x1B0, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_SET;                   /**< USB Charger Detect Register, array offset: 0x1B4, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_CLR;                   /**< USB Charger Detect Register, array offset: 0x1B8, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_TOG;                   /**< USB Charger Detect Register, array offset: 0x1BC, array step: 0x60 */
-    __I  uint32_t VBUS_DETECT_STAT;                  /**< USB VBUS Detect Status Register, array offset: 0x1C0, array step: 0x60 */
-         uint8_t RESERVED_0[12];
-    __I  uint32_t CHRG_DETECT_STAT;                  /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */
-         uint8_t RESERVED_1[28];
-    __IO uint32_t MISC;                              /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */
-    __IO uint32_t MISC_SET;                          /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */
-    __IO uint32_t MISC_CLR;                          /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */
-    __IO uint32_t MISC_TOG;                          /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */
-  } INSTANCE[2];
-  __I  uint32_t DIGPROG;                           /**< Chip Silicon Version, offset: 0x260 */
+typedef struct
+{
+    uint8_t RESERVED_0[416];
+    struct
+    {                                  /* offset: 0x1A0, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT;     /**< USB VBUS Detect Register, array offset: 0x1A0, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_SET; /**< USB VBUS Detect Register, array offset: 0x1A4, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_CLR; /**< USB VBUS Detect Register, array offset: 0x1A8, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_TOG; /**< USB VBUS Detect Register, array offset: 0x1AC, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT;     /**< USB Charger Detect Register, array offset: 0x1B0, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_SET; /**< USB Charger Detect Register, array offset: 0x1B4, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_CLR; /**< USB Charger Detect Register, array offset: 0x1B8, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_TOG; /**< USB Charger Detect Register, array offset: 0x1BC, array step: 0x60 */
+        __I uint32_t VBUS_DETECT_STAT; /**< USB VBUS Detect Status Register, array offset: 0x1C0, array step: 0x60 */
+        uint8_t RESERVED_0[12];
+        __I uint32_t CHRG_DETECT_STAT; /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */
+        uint8_t RESERVED_1[28];
+        __IO uint32_t MISC;     /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */
+        __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */
+        __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */
+        __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */
+    } INSTANCE[2];
+    __I uint32_t DIGPROG; /**< Chip Silicon Version, offset: 0x260 */
 } USB_ANALOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -24301,274 +27670,361 @@ typedef struct {
 
 /*! @name VBUS_DETECT - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) &                                  \
+     USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) &                                    \
+     USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK)
 #define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT */
-#define USB_ANALOG_VBUS_DETECT_COUNT             (2U)
+#define USB_ANALOG_VBUS_DETECT_COUNT (2U)
 
 /*! @name VBUS_DETECT_SET - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_SET */
-#define USB_ANALOG_VBUS_DETECT_SET_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_SET_COUNT (2U)
 
 /*! @name VBUS_DETECT_CLR - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_CLR */
-#define USB_ANALOG_VBUS_DETECT_CLR_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_CLR_COUNT (2U)
 
 /*! @name VBUS_DETECT_TOG - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_TOG */
-#define USB_ANALOG_VBUS_DETECT_TOG_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_TOG_COUNT (2U)
 
 /*! @name CHRG_DETECT - USB Charger Detect Register */
 /*! @{ */
 #define USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CONTACT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK   (0x80000U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT  (19U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(x)     (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_EN_B_MASK         (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_EN_B_SHIFT        (20U)
-#define USB_ANALOG_CHRG_DETECT_EN_B(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CHK_CONTACT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT)) &                                       \
+     USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK  (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT (19U)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_EN_B(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT */
-#define USB_ANALOG_CHRG_DETECT_COUNT             (2U)
+#define USB_ANALOG_CHRG_DETECT_COUNT (2U)
 
 /*! @name CHRG_DETECT_SET - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_SET */
-#define USB_ANALOG_CHRG_DETECT_SET_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_SET_COUNT (2U)
 
 /*! @name CHRG_DETECT_CLR - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_CLR */
-#define USB_ANALOG_CHRG_DETECT_CLR_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_CLR_COUNT (2U)
 
 /*! @name CHRG_DETECT_TOG - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_TOG */
-#define USB_ANALOG_CHRG_DETECT_TOG_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_TOG_COUNT (2U)
 
 /*! @name VBUS_DETECT_STAT - USB VBUS Detect Status Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK (0x1U)
+#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK  (0x1U)
 #define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND(x)   (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT)) &                                      \
+     USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK)
 #define USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK  (0x2U)
 #define USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT (1U)
-#define USB_ANALOG_VBUS_DETECT_STAT_BVALID(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_BVALID(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK)
 #define USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK  (0x4U)
 #define USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT (2U)
-#define USB_ANALOG_VBUS_DETECT_STAT_AVALID(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK)
-#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK (0x8U)
+#define USB_ANALOG_VBUS_DETECT_STAT_AVALID(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK  (0x8U)
 #define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT (3U)
-#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_STAT */
-#define USB_ANALOG_VBUS_DETECT_STAT_COUNT        (2U)
+#define USB_ANALOG_VBUS_DETECT_STAT_COUNT (2U)
 
 /*! @name CHRG_DETECT_STAT - USB Charger Detect Status Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK (0x1U)
+#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK  (0x1U)
 #define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT (0U)
-#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK (0x2U)
+#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT)) &                                 \
+     USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK  (0x2U)
 #define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT (1U)
-#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK (0x4U)
+#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT)) &                                \
+     USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK  (0x4U)
 #define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT (2U)
-#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE(x)  (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK (0x8U)
+#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT)) &                                     \
+     USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK  (0x8U)
 #define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT (3U)
-#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE(x)  (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT)) &                                     \
+     USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_STAT */
-#define USB_ANALOG_CHRG_DETECT_STAT_COUNT        (2U)
+#define USB_ANALOG_CHRG_DETECT_STAT_COUNT (2U)
 
 /*! @name MISC - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK   (0x1U)
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT  (0U)
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R(x)     (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_EN_DEGLITCH_MASK         (0x2U)
-#define USB_ANALOG_MISC_EN_DEGLITCH_SHIFT        (1U)
-#define USB_ANALOG_MISC_EN_DEGLITCH(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_EN_CLK_UTMI_MASK         (0x40000000U)
-#define USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT        (30U)
-#define USB_ANALOG_MISC_EN_CLK_UTMI(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK  (0x1U)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT (0U)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_EN_DEGLITCH(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_EN_CLK_UTMI(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC */
-#define USB_ANALOG_MISC_COUNT                    (2U)
+#define USB_ANALOG_MISC_COUNT (2U)
 
 /*! @name MISC_SET - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_SET */
-#define USB_ANALOG_MISC_SET_COUNT                (2U)
+#define USB_ANALOG_MISC_SET_COUNT (2U)
 
 /*! @name MISC_CLR - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_CLR */
-#define USB_ANALOG_MISC_CLR_COUNT                (2U)
+#define USB_ANALOG_MISC_CLR_COUNT (2U)
 
 /*! @name MISC_TOG - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_TOG */
-#define USB_ANALOG_MISC_TOG_COUNT                (2U)
+#define USB_ANALOG_MISC_TOG_COUNT (2U)
 
 /*! @name DIGPROG - Chip Silicon Version */
 /*! @{ */
-#define USB_ANALOG_DIGPROG_SILICON_REVISION_MASK (0xFFFFFFFFU)
+#define USB_ANALOG_DIGPROG_SILICON_REVISION_MASK  (0xFFFFFFFFU)
 #define USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT (0U)
-#define USB_ANALOG_DIGPROG_SILICON_REVISION(x)   (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT)) & USB_ANALOG_DIGPROG_SILICON_REVISION_MASK)
+#define USB_ANALOG_DIGPROG_SILICON_REVISION(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT)) &                                      \
+     USB_ANALOG_DIGPROG_SILICON_REVISION_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USB_ANALOG_Register_Masks */
 
-
 /* USB_ANALOG - Peripheral instance base addresses */
 /** Peripheral USB_ANALOG base address */
-#define USB_ANALOG_BASE                          (0x400D8000u)
+#define USB_ANALOG_BASE (0x400D8000u)
 /** Peripheral USB_ANALOG base pointer */
-#define USB_ANALOG                               ((USB_ANALOG_Type *)USB_ANALOG_BASE)
+#define USB_ANALOG ((USB_ANALOG_Type *)USB_ANALOG_BASE)
 /** Array initializer of USB_ANALOG peripheral base addresses */
-#define USB_ANALOG_BASE_ADDRS                    { USB_ANALOG_BASE }
+#define USB_ANALOG_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        USB_ANALOG_BASE                                                                                                \
+    }
 /** Array initializer of USB_ANALOG peripheral base pointers */
-#define USB_ANALOG_BASE_PTRS                     { USB_ANALOG }
+#define USB_ANALOG_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        USB_ANALOG                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group USB_ANALOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USDHC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -24579,39 +28035,40 @@ typedef struct {
  */
 
 /** USDHC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t DS_ADDR;                           /**< DMA System Address, offset: 0x0 */
-  __IO uint32_t BLK_ATT;                           /**< Block Attributes, offset: 0x4 */
-  __IO uint32_t CMD_ARG;                           /**< Command Argument, offset: 0x8 */
-  __IO uint32_t CMD_XFR_TYP;                       /**< Command Transfer Type, offset: 0xC */
-  __I  uint32_t CMD_RSP0;                          /**< Command Response0, offset: 0x10 */
-  __I  uint32_t CMD_RSP1;                          /**< Command Response1, offset: 0x14 */
-  __I  uint32_t CMD_RSP2;                          /**< Command Response2, offset: 0x18 */
-  __I  uint32_t CMD_RSP3;                          /**< Command Response3, offset: 0x1C */
-  __IO uint32_t DATA_BUFF_ACC_PORT;                /**< Data Buffer Access Port, offset: 0x20 */
-  __I  uint32_t PRES_STATE;                        /**< Present State, offset: 0x24 */
-  __IO uint32_t PROT_CTRL;                         /**< Protocol Control, offset: 0x28 */
-  __IO uint32_t SYS_CTRL;                          /**< System Control, offset: 0x2C */
-  __IO uint32_t INT_STATUS;                        /**< Interrupt Status, offset: 0x30 */
-  __IO uint32_t INT_STATUS_EN;                     /**< Interrupt Status Enable, offset: 0x34 */
-  __IO uint32_t INT_SIGNAL_EN;                     /**< Interrupt Signal Enable, offset: 0x38 */
-  __IO uint32_t AUTOCMD12_ERR_STATUS;              /**< Auto CMD12 Error Status, offset: 0x3C */
-  __IO uint32_t HOST_CTRL_CAP;                     /**< Host Controller Capabilities, offset: 0x40 */
-  __IO uint32_t WTMK_LVL;                          /**< Watermark Level, offset: 0x44 */
-  __IO uint32_t MIX_CTRL;                          /**< Mixer Control, offset: 0x48 */
-       uint8_t RESERVED_0[4];
-  __O  uint32_t FORCE_EVENT;                       /**< Force Event, offset: 0x50 */
-  __I  uint32_t ADMA_ERR_STATUS;                   /**< ADMA Error Status Register, offset: 0x54 */
-  __IO uint32_t ADMA_SYS_ADDR;                     /**< ADMA System Address, offset: 0x58 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t DLL_CTRL;                          /**< DLL (Delay Line) Control, offset: 0x60 */
-  __I  uint32_t DLL_STATUS;                        /**< DLL Status, offset: 0x64 */
-  __IO uint32_t CLK_TUNE_CTRL_STATUS;              /**< CLK Tuning Control and Status, offset: 0x68 */
-       uint8_t RESERVED_2[84];
-  __IO uint32_t VEND_SPEC;                         /**< Vendor Specific Register, offset: 0xC0 */
-  __IO uint32_t MMC_BOOT;                          /**< MMC Boot Register, offset: 0xC4 */
-  __IO uint32_t VEND_SPEC2;                        /**< Vendor Specific 2 Register, offset: 0xC8 */
-  __IO uint32_t TUNING_CTRL;                       /**< Tuning Control Register, offset: 0xCC */
+typedef struct
+{
+    __IO uint32_t DS_ADDR;              /**< DMA System Address, offset: 0x0 */
+    __IO uint32_t BLK_ATT;              /**< Block Attributes, offset: 0x4 */
+    __IO uint32_t CMD_ARG;              /**< Command Argument, offset: 0x8 */
+    __IO uint32_t CMD_XFR_TYP;          /**< Command Transfer Type, offset: 0xC */
+    __I uint32_t CMD_RSP0;              /**< Command Response0, offset: 0x10 */
+    __I uint32_t CMD_RSP1;              /**< Command Response1, offset: 0x14 */
+    __I uint32_t CMD_RSP2;              /**< Command Response2, offset: 0x18 */
+    __I uint32_t CMD_RSP3;              /**< Command Response3, offset: 0x1C */
+    __IO uint32_t DATA_BUFF_ACC_PORT;   /**< Data Buffer Access Port, offset: 0x20 */
+    __I uint32_t PRES_STATE;            /**< Present State, offset: 0x24 */
+    __IO uint32_t PROT_CTRL;            /**< Protocol Control, offset: 0x28 */
+    __IO uint32_t SYS_CTRL;             /**< System Control, offset: 0x2C */
+    __IO uint32_t INT_STATUS;           /**< Interrupt Status, offset: 0x30 */
+    __IO uint32_t INT_STATUS_EN;        /**< Interrupt Status Enable, offset: 0x34 */
+    __IO uint32_t INT_SIGNAL_EN;        /**< Interrupt Signal Enable, offset: 0x38 */
+    __IO uint32_t AUTOCMD12_ERR_STATUS; /**< Auto CMD12 Error Status, offset: 0x3C */
+    __IO uint32_t HOST_CTRL_CAP;        /**< Host Controller Capabilities, offset: 0x40 */
+    __IO uint32_t WTMK_LVL;             /**< Watermark Level, offset: 0x44 */
+    __IO uint32_t MIX_CTRL;             /**< Mixer Control, offset: 0x48 */
+    uint8_t RESERVED_0[4];
+    __O uint32_t FORCE_EVENT;     /**< Force Event, offset: 0x50 */
+    __I uint32_t ADMA_ERR_STATUS; /**< ADMA Error Status Register, offset: 0x54 */
+    __IO uint32_t ADMA_SYS_ADDR;  /**< ADMA System Address, offset: 0x58 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t DLL_CTRL;             /**< DLL (Delay Line) Control, offset: 0x60 */
+    __I uint32_t DLL_STATUS;            /**< DLL Status, offset: 0x64 */
+    __IO uint32_t CLK_TUNE_CTRL_STATUS; /**< CLK Tuning Control and Status, offset: 0x68 */
+    uint8_t RESERVED_2[84];
+    __IO uint32_t VEND_SPEC;   /**< Vendor Specific Register, offset: 0xC0 */
+    __IO uint32_t MMC_BOOT;    /**< MMC Boot Register, offset: 0xC4 */
+    __IO uint32_t VEND_SPEC2;  /**< Vendor Specific 2 Register, offset: 0xC8 */
+    __IO uint32_t TUNING_CTRL; /**< Tuning Control Register, offset: 0xCC */
 } USDHC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -24625,834 +28082,1085 @@ typedef struct {
 
 /*! @name DS_ADDR - DMA System Address */
 /*! @{ */
-#define USDHC_DS_ADDR_DS_ADDR_MASK               (0xFFFFFFFFU)
-#define USDHC_DS_ADDR_DS_ADDR_SHIFT              (0U)
-#define USDHC_DS_ADDR_DS_ADDR(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_DS_ADDR_DS_ADDR_SHIFT)) & USDHC_DS_ADDR_DS_ADDR_MASK)
+#define USDHC_DS_ADDR_DS_ADDR_MASK  (0xFFFFFFFFU)
+#define USDHC_DS_ADDR_DS_ADDR_SHIFT (0U)
+#define USDHC_DS_ADDR_DS_ADDR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DS_ADDR_DS_ADDR_SHIFT)) & USDHC_DS_ADDR_DS_ADDR_MASK)
 /*! @} */
 
 /*! @name BLK_ATT - Block Attributes */
 /*! @{ */
-#define USDHC_BLK_ATT_BLKSIZE_MASK               (0x1FFFU)
-#define USDHC_BLK_ATT_BLKSIZE_SHIFT              (0U)
-#define USDHC_BLK_ATT_BLKSIZE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKSIZE_SHIFT)) & USDHC_BLK_ATT_BLKSIZE_MASK)
-#define USDHC_BLK_ATT_BLKCNT_MASK                (0xFFFF0000U)
-#define USDHC_BLK_ATT_BLKCNT_SHIFT               (16U)
-#define USDHC_BLK_ATT_BLKCNT(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKCNT_SHIFT)) & USDHC_BLK_ATT_BLKCNT_MASK)
+#define USDHC_BLK_ATT_BLKSIZE_MASK  (0x1FFFU)
+#define USDHC_BLK_ATT_BLKSIZE_SHIFT (0U)
+#define USDHC_BLK_ATT_BLKSIZE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKSIZE_SHIFT)) & USDHC_BLK_ATT_BLKSIZE_MASK)
+#define USDHC_BLK_ATT_BLKCNT_MASK  (0xFFFF0000U)
+#define USDHC_BLK_ATT_BLKCNT_SHIFT (16U)
+#define USDHC_BLK_ATT_BLKCNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKCNT_SHIFT)) & USDHC_BLK_ATT_BLKCNT_MASK)
 /*! @} */
 
 /*! @name CMD_ARG - Command Argument */
 /*! @{ */
-#define USDHC_CMD_ARG_CMDARG_MASK                (0xFFFFFFFFU)
-#define USDHC_CMD_ARG_CMDARG_SHIFT               (0U)
-#define USDHC_CMD_ARG_CMDARG(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_ARG_CMDARG_SHIFT)) & USDHC_CMD_ARG_CMDARG_MASK)
+#define USDHC_CMD_ARG_CMDARG_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_ARG_CMDARG_SHIFT (0U)
+#define USDHC_CMD_ARG_CMDARG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_ARG_CMDARG_SHIFT)) & USDHC_CMD_ARG_CMDARG_MASK)
 /*! @} */
 
 /*! @name CMD_XFR_TYP - Command Transfer Type */
 /*! @{ */
-#define USDHC_CMD_XFR_TYP_RSPTYP_MASK            (0x30000U)
-#define USDHC_CMD_XFR_TYP_RSPTYP_SHIFT           (16U)
-#define USDHC_CMD_XFR_TYP_RSPTYP(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_RSPTYP_SHIFT)) & USDHC_CMD_XFR_TYP_RSPTYP_MASK)
-#define USDHC_CMD_XFR_TYP_CCCEN_MASK             (0x80000U)
-#define USDHC_CMD_XFR_TYP_CCCEN_SHIFT            (19U)
-#define USDHC_CMD_XFR_TYP_CCCEN(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CCCEN_SHIFT)) & USDHC_CMD_XFR_TYP_CCCEN_MASK)
-#define USDHC_CMD_XFR_TYP_CICEN_MASK             (0x100000U)
-#define USDHC_CMD_XFR_TYP_CICEN_SHIFT            (20U)
-#define USDHC_CMD_XFR_TYP_CICEN(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CICEN_SHIFT)) & USDHC_CMD_XFR_TYP_CICEN_MASK)
-#define USDHC_CMD_XFR_TYP_DPSEL_MASK             (0x200000U)
-#define USDHC_CMD_XFR_TYP_DPSEL_SHIFT            (21U)
-#define USDHC_CMD_XFR_TYP_DPSEL(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_DPSEL_SHIFT)) & USDHC_CMD_XFR_TYP_DPSEL_MASK)
-#define USDHC_CMD_XFR_TYP_CMDTYP_MASK            (0xC00000U)
-#define USDHC_CMD_XFR_TYP_CMDTYP_SHIFT           (22U)
-#define USDHC_CMD_XFR_TYP_CMDTYP(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDTYP_SHIFT)) & USDHC_CMD_XFR_TYP_CMDTYP_MASK)
-#define USDHC_CMD_XFR_TYP_CMDINX_MASK            (0x3F000000U)
-#define USDHC_CMD_XFR_TYP_CMDINX_SHIFT           (24U)
-#define USDHC_CMD_XFR_TYP_CMDINX(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDINX_SHIFT)) & USDHC_CMD_XFR_TYP_CMDINX_MASK)
+#define USDHC_CMD_XFR_TYP_RSPTYP_MASK  (0x30000U)
+#define USDHC_CMD_XFR_TYP_RSPTYP_SHIFT (16U)
+#define USDHC_CMD_XFR_TYP_RSPTYP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_RSPTYP_SHIFT)) & USDHC_CMD_XFR_TYP_RSPTYP_MASK)
+#define USDHC_CMD_XFR_TYP_CCCEN_MASK  (0x80000U)
+#define USDHC_CMD_XFR_TYP_CCCEN_SHIFT (19U)
+#define USDHC_CMD_XFR_TYP_CCCEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CCCEN_SHIFT)) & USDHC_CMD_XFR_TYP_CCCEN_MASK)
+#define USDHC_CMD_XFR_TYP_CICEN_MASK  (0x100000U)
+#define USDHC_CMD_XFR_TYP_CICEN_SHIFT (20U)
+#define USDHC_CMD_XFR_TYP_CICEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CICEN_SHIFT)) & USDHC_CMD_XFR_TYP_CICEN_MASK)
+#define USDHC_CMD_XFR_TYP_DPSEL_MASK  (0x200000U)
+#define USDHC_CMD_XFR_TYP_DPSEL_SHIFT (21U)
+#define USDHC_CMD_XFR_TYP_DPSEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_DPSEL_SHIFT)) & USDHC_CMD_XFR_TYP_DPSEL_MASK)
+#define USDHC_CMD_XFR_TYP_CMDTYP_MASK  (0xC00000U)
+#define USDHC_CMD_XFR_TYP_CMDTYP_SHIFT (22U)
+#define USDHC_CMD_XFR_TYP_CMDTYP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDTYP_SHIFT)) & USDHC_CMD_XFR_TYP_CMDTYP_MASK)
+#define USDHC_CMD_XFR_TYP_CMDINX_MASK  (0x3F000000U)
+#define USDHC_CMD_XFR_TYP_CMDINX_SHIFT (24U)
+#define USDHC_CMD_XFR_TYP_CMDINX(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDINX_SHIFT)) & USDHC_CMD_XFR_TYP_CMDINX_MASK)
 /*! @} */
 
 /*! @name CMD_RSP0 - Command Response0 */
 /*! @{ */
-#define USDHC_CMD_RSP0_CMDRSP0_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP0_CMDRSP0_SHIFT             (0U)
-#define USDHC_CMD_RSP0_CMDRSP0(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP0_CMDRSP0_SHIFT)) & USDHC_CMD_RSP0_CMDRSP0_MASK)
+#define USDHC_CMD_RSP0_CMDRSP0_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP0_CMDRSP0_SHIFT (0U)
+#define USDHC_CMD_RSP0_CMDRSP0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP0_CMDRSP0_SHIFT)) & USDHC_CMD_RSP0_CMDRSP0_MASK)
 /*! @} */
 
 /*! @name CMD_RSP1 - Command Response1 */
 /*! @{ */
-#define USDHC_CMD_RSP1_CMDRSP1_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP1_CMDRSP1_SHIFT             (0U)
-#define USDHC_CMD_RSP1_CMDRSP1(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP1_CMDRSP1_SHIFT)) & USDHC_CMD_RSP1_CMDRSP1_MASK)
+#define USDHC_CMD_RSP1_CMDRSP1_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP1_CMDRSP1_SHIFT (0U)
+#define USDHC_CMD_RSP1_CMDRSP1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP1_CMDRSP1_SHIFT)) & USDHC_CMD_RSP1_CMDRSP1_MASK)
 /*! @} */
 
 /*! @name CMD_RSP2 - Command Response2 */
 /*! @{ */
-#define USDHC_CMD_RSP2_CMDRSP2_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP2_CMDRSP2_SHIFT             (0U)
-#define USDHC_CMD_RSP2_CMDRSP2(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP2_CMDRSP2_SHIFT)) & USDHC_CMD_RSP2_CMDRSP2_MASK)
+#define USDHC_CMD_RSP2_CMDRSP2_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP2_CMDRSP2_SHIFT (0U)
+#define USDHC_CMD_RSP2_CMDRSP2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP2_CMDRSP2_SHIFT)) & USDHC_CMD_RSP2_CMDRSP2_MASK)
 /*! @} */
 
 /*! @name CMD_RSP3 - Command Response3 */
 /*! @{ */
-#define USDHC_CMD_RSP3_CMDRSP3_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP3_CMDRSP3_SHIFT             (0U)
-#define USDHC_CMD_RSP3_CMDRSP3(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP3_CMDRSP3_SHIFT)) & USDHC_CMD_RSP3_CMDRSP3_MASK)
+#define USDHC_CMD_RSP3_CMDRSP3_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP3_CMDRSP3_SHIFT (0U)
+#define USDHC_CMD_RSP3_CMDRSP3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP3_CMDRSP3_SHIFT)) & USDHC_CMD_RSP3_CMDRSP3_MASK)
 /*! @} */
 
 /*! @name DATA_BUFF_ACC_PORT - Data Buffer Access Port */
 /*! @{ */
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK    (0xFFFFFFFFU)
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT   (0U)
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT)) & USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK  (0xFFFFFFFFU)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT (0U)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT)) & USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK)
 /*! @} */
 
 /*! @name PRES_STATE - Present State */
 /*! @{ */
-#define USDHC_PRES_STATE_CIHB_MASK               (0x1U)
-#define USDHC_PRES_STATE_CIHB_SHIFT              (0U)
-#define USDHC_PRES_STATE_CIHB(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CIHB_SHIFT)) & USDHC_PRES_STATE_CIHB_MASK)
-#define USDHC_PRES_STATE_CDIHB_MASK              (0x2U)
-#define USDHC_PRES_STATE_CDIHB_SHIFT             (1U)
-#define USDHC_PRES_STATE_CDIHB(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDIHB_SHIFT)) & USDHC_PRES_STATE_CDIHB_MASK)
-#define USDHC_PRES_STATE_DLA_MASK                (0x4U)
-#define USDHC_PRES_STATE_DLA_SHIFT               (2U)
-#define USDHC_PRES_STATE_DLA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLA_SHIFT)) & USDHC_PRES_STATE_DLA_MASK)
-#define USDHC_PRES_STATE_SDSTB_MASK              (0x8U)
-#define USDHC_PRES_STATE_SDSTB_SHIFT             (3U)
-#define USDHC_PRES_STATE_SDSTB(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDSTB_SHIFT)) & USDHC_PRES_STATE_SDSTB_MASK)
-#define USDHC_PRES_STATE_IPGOFF_MASK             (0x10U)
-#define USDHC_PRES_STATE_IPGOFF_SHIFT            (4U)
-#define USDHC_PRES_STATE_IPGOFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_IPGOFF_SHIFT)) & USDHC_PRES_STATE_IPGOFF_MASK)
-#define USDHC_PRES_STATE_HCKOFF_MASK             (0x20U)
-#define USDHC_PRES_STATE_HCKOFF_SHIFT            (5U)
-#define USDHC_PRES_STATE_HCKOFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_HCKOFF_SHIFT)) & USDHC_PRES_STATE_HCKOFF_MASK)
-#define USDHC_PRES_STATE_PEROFF_MASK             (0x40U)
-#define USDHC_PRES_STATE_PEROFF_SHIFT            (6U)
-#define USDHC_PRES_STATE_PEROFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_PEROFF_SHIFT)) & USDHC_PRES_STATE_PEROFF_MASK)
-#define USDHC_PRES_STATE_SDOFF_MASK              (0x80U)
-#define USDHC_PRES_STATE_SDOFF_SHIFT             (7U)
-#define USDHC_PRES_STATE_SDOFF(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDOFF_SHIFT)) & USDHC_PRES_STATE_SDOFF_MASK)
-#define USDHC_PRES_STATE_WTA_MASK                (0x100U)
-#define USDHC_PRES_STATE_WTA_SHIFT               (8U)
-#define USDHC_PRES_STATE_WTA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WTA_SHIFT)) & USDHC_PRES_STATE_WTA_MASK)
-#define USDHC_PRES_STATE_RTA_MASK                (0x200U)
-#define USDHC_PRES_STATE_RTA_SHIFT               (9U)
-#define USDHC_PRES_STATE_RTA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTA_SHIFT)) & USDHC_PRES_STATE_RTA_MASK)
-#define USDHC_PRES_STATE_BWEN_MASK               (0x400U)
-#define USDHC_PRES_STATE_BWEN_SHIFT              (10U)
-#define USDHC_PRES_STATE_BWEN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BWEN_SHIFT)) & USDHC_PRES_STATE_BWEN_MASK)
-#define USDHC_PRES_STATE_BREN_MASK               (0x800U)
-#define USDHC_PRES_STATE_BREN_SHIFT              (11U)
-#define USDHC_PRES_STATE_BREN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BREN_SHIFT)) & USDHC_PRES_STATE_BREN_MASK)
-#define USDHC_PRES_STATE_RTR_MASK                (0x1000U)
-#define USDHC_PRES_STATE_RTR_SHIFT               (12U)
-#define USDHC_PRES_STATE_RTR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTR_SHIFT)) & USDHC_PRES_STATE_RTR_MASK)
-#define USDHC_PRES_STATE_TSCD_MASK               (0x8000U)
-#define USDHC_PRES_STATE_TSCD_SHIFT              (15U)
-#define USDHC_PRES_STATE_TSCD(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_TSCD_SHIFT)) & USDHC_PRES_STATE_TSCD_MASK)
-#define USDHC_PRES_STATE_CINST_MASK              (0x10000U)
-#define USDHC_PRES_STATE_CINST_SHIFT             (16U)
-#define USDHC_PRES_STATE_CINST(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CINST_SHIFT)) & USDHC_PRES_STATE_CINST_MASK)
-#define USDHC_PRES_STATE_CDPL_MASK               (0x40000U)
-#define USDHC_PRES_STATE_CDPL_SHIFT              (18U)
-#define USDHC_PRES_STATE_CDPL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDPL_SHIFT)) & USDHC_PRES_STATE_CDPL_MASK)
-#define USDHC_PRES_STATE_WPSPL_MASK              (0x80000U)
-#define USDHC_PRES_STATE_WPSPL_SHIFT             (19U)
-#define USDHC_PRES_STATE_WPSPL(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WPSPL_SHIFT)) & USDHC_PRES_STATE_WPSPL_MASK)
-#define USDHC_PRES_STATE_CLSL_MASK               (0x800000U)
-#define USDHC_PRES_STATE_CLSL_SHIFT              (23U)
-#define USDHC_PRES_STATE_CLSL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CLSL_SHIFT)) & USDHC_PRES_STATE_CLSL_MASK)
-#define USDHC_PRES_STATE_DLSL_MASK               (0xFF000000U)
-#define USDHC_PRES_STATE_DLSL_SHIFT              (24U)
-#define USDHC_PRES_STATE_DLSL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
+#define USDHC_PRES_STATE_CIHB_MASK  (0x1U)
+#define USDHC_PRES_STATE_CIHB_SHIFT (0U)
+#define USDHC_PRES_STATE_CIHB(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CIHB_SHIFT)) & USDHC_PRES_STATE_CIHB_MASK)
+#define USDHC_PRES_STATE_CDIHB_MASK  (0x2U)
+#define USDHC_PRES_STATE_CDIHB_SHIFT (1U)
+#define USDHC_PRES_STATE_CDIHB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDIHB_SHIFT)) & USDHC_PRES_STATE_CDIHB_MASK)
+#define USDHC_PRES_STATE_DLA_MASK  (0x4U)
+#define USDHC_PRES_STATE_DLA_SHIFT (2U)
+#define USDHC_PRES_STATE_DLA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLA_SHIFT)) & USDHC_PRES_STATE_DLA_MASK)
+#define USDHC_PRES_STATE_SDSTB_MASK  (0x8U)
+#define USDHC_PRES_STATE_SDSTB_SHIFT (3U)
+#define USDHC_PRES_STATE_SDSTB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDSTB_SHIFT)) & USDHC_PRES_STATE_SDSTB_MASK)
+#define USDHC_PRES_STATE_IPGOFF_MASK  (0x10U)
+#define USDHC_PRES_STATE_IPGOFF_SHIFT (4U)
+#define USDHC_PRES_STATE_IPGOFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_IPGOFF_SHIFT)) & USDHC_PRES_STATE_IPGOFF_MASK)
+#define USDHC_PRES_STATE_HCKOFF_MASK  (0x20U)
+#define USDHC_PRES_STATE_HCKOFF_SHIFT (5U)
+#define USDHC_PRES_STATE_HCKOFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_HCKOFF_SHIFT)) & USDHC_PRES_STATE_HCKOFF_MASK)
+#define USDHC_PRES_STATE_PEROFF_MASK  (0x40U)
+#define USDHC_PRES_STATE_PEROFF_SHIFT (6U)
+#define USDHC_PRES_STATE_PEROFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_PEROFF_SHIFT)) & USDHC_PRES_STATE_PEROFF_MASK)
+#define USDHC_PRES_STATE_SDOFF_MASK  (0x80U)
+#define USDHC_PRES_STATE_SDOFF_SHIFT (7U)
+#define USDHC_PRES_STATE_SDOFF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDOFF_SHIFT)) & USDHC_PRES_STATE_SDOFF_MASK)
+#define USDHC_PRES_STATE_WTA_MASK  (0x100U)
+#define USDHC_PRES_STATE_WTA_SHIFT (8U)
+#define USDHC_PRES_STATE_WTA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WTA_SHIFT)) & USDHC_PRES_STATE_WTA_MASK)
+#define USDHC_PRES_STATE_RTA_MASK  (0x200U)
+#define USDHC_PRES_STATE_RTA_SHIFT (9U)
+#define USDHC_PRES_STATE_RTA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTA_SHIFT)) & USDHC_PRES_STATE_RTA_MASK)
+#define USDHC_PRES_STATE_BWEN_MASK  (0x400U)
+#define USDHC_PRES_STATE_BWEN_SHIFT (10U)
+#define USDHC_PRES_STATE_BWEN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BWEN_SHIFT)) & USDHC_PRES_STATE_BWEN_MASK)
+#define USDHC_PRES_STATE_BREN_MASK  (0x800U)
+#define USDHC_PRES_STATE_BREN_SHIFT (11U)
+#define USDHC_PRES_STATE_BREN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BREN_SHIFT)) & USDHC_PRES_STATE_BREN_MASK)
+#define USDHC_PRES_STATE_RTR_MASK  (0x1000U)
+#define USDHC_PRES_STATE_RTR_SHIFT (12U)
+#define USDHC_PRES_STATE_RTR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTR_SHIFT)) & USDHC_PRES_STATE_RTR_MASK)
+#define USDHC_PRES_STATE_TSCD_MASK  (0x8000U)
+#define USDHC_PRES_STATE_TSCD_SHIFT (15U)
+#define USDHC_PRES_STATE_TSCD(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_TSCD_SHIFT)) & USDHC_PRES_STATE_TSCD_MASK)
+#define USDHC_PRES_STATE_CINST_MASK  (0x10000U)
+#define USDHC_PRES_STATE_CINST_SHIFT (16U)
+#define USDHC_PRES_STATE_CINST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CINST_SHIFT)) & USDHC_PRES_STATE_CINST_MASK)
+#define USDHC_PRES_STATE_CDPL_MASK  (0x40000U)
+#define USDHC_PRES_STATE_CDPL_SHIFT (18U)
+#define USDHC_PRES_STATE_CDPL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDPL_SHIFT)) & USDHC_PRES_STATE_CDPL_MASK)
+#define USDHC_PRES_STATE_WPSPL_MASK  (0x80000U)
+#define USDHC_PRES_STATE_WPSPL_SHIFT (19U)
+#define USDHC_PRES_STATE_WPSPL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WPSPL_SHIFT)) & USDHC_PRES_STATE_WPSPL_MASK)
+#define USDHC_PRES_STATE_CLSL_MASK  (0x800000U)
+#define USDHC_PRES_STATE_CLSL_SHIFT (23U)
+#define USDHC_PRES_STATE_CLSL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CLSL_SHIFT)) & USDHC_PRES_STATE_CLSL_MASK)
+#define USDHC_PRES_STATE_DLSL_MASK  (0xFF000000U)
+#define USDHC_PRES_STATE_DLSL_SHIFT (24U)
+#define USDHC_PRES_STATE_DLSL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
 /*! @} */
 
 /*! @name PROT_CTRL - Protocol Control */
 /*! @{ */
-#define USDHC_PROT_CTRL_LCTL_MASK                (0x1U)
-#define USDHC_PROT_CTRL_LCTL_SHIFT               (0U)
-#define USDHC_PROT_CTRL_LCTL(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_LCTL_SHIFT)) & USDHC_PROT_CTRL_LCTL_MASK)
-#define USDHC_PROT_CTRL_DTW_MASK                 (0x6U)
-#define USDHC_PROT_CTRL_DTW_SHIFT                (1U)
-#define USDHC_PROT_CTRL_DTW(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DTW_SHIFT)) & USDHC_PROT_CTRL_DTW_MASK)
-#define USDHC_PROT_CTRL_D3CD_MASK                (0x8U)
-#define USDHC_PROT_CTRL_D3CD_SHIFT               (3U)
-#define USDHC_PROT_CTRL_D3CD(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_D3CD_SHIFT)) & USDHC_PROT_CTRL_D3CD_MASK)
-#define USDHC_PROT_CTRL_EMODE_MASK               (0x30U)
-#define USDHC_PROT_CTRL_EMODE_SHIFT              (4U)
-#define USDHC_PROT_CTRL_EMODE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_EMODE_SHIFT)) & USDHC_PROT_CTRL_EMODE_MASK)
-#define USDHC_PROT_CTRL_CDTL_MASK                (0x40U)
-#define USDHC_PROT_CTRL_CDTL_SHIFT               (6U)
-#define USDHC_PROT_CTRL_CDTL(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDTL_SHIFT)) & USDHC_PROT_CTRL_CDTL_MASK)
-#define USDHC_PROT_CTRL_CDSS_MASK                (0x80U)
-#define USDHC_PROT_CTRL_CDSS_SHIFT               (7U)
-#define USDHC_PROT_CTRL_CDSS(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDSS_SHIFT)) & USDHC_PROT_CTRL_CDSS_MASK)
-#define USDHC_PROT_CTRL_DMASEL_MASK              (0x300U)
-#define USDHC_PROT_CTRL_DMASEL_SHIFT             (8U)
-#define USDHC_PROT_CTRL_DMASEL(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DMASEL_SHIFT)) & USDHC_PROT_CTRL_DMASEL_MASK)
-#define USDHC_PROT_CTRL_SABGREQ_MASK             (0x10000U)
-#define USDHC_PROT_CTRL_SABGREQ_SHIFT            (16U)
-#define USDHC_PROT_CTRL_SABGREQ(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_SABGREQ_SHIFT)) & USDHC_PROT_CTRL_SABGREQ_MASK)
-#define USDHC_PROT_CTRL_CREQ_MASK                (0x20000U)
-#define USDHC_PROT_CTRL_CREQ_SHIFT               (17U)
-#define USDHC_PROT_CTRL_CREQ(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CREQ_SHIFT)) & USDHC_PROT_CTRL_CREQ_MASK)
-#define USDHC_PROT_CTRL_RWCTL_MASK               (0x40000U)
-#define USDHC_PROT_CTRL_RWCTL_SHIFT              (18U)
-#define USDHC_PROT_CTRL_RWCTL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RWCTL_SHIFT)) & USDHC_PROT_CTRL_RWCTL_MASK)
-#define USDHC_PROT_CTRL_IABG_MASK                (0x80000U)
-#define USDHC_PROT_CTRL_IABG_SHIFT               (19U)
-#define USDHC_PROT_CTRL_IABG(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_IABG_SHIFT)) & USDHC_PROT_CTRL_IABG_MASK)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK     (0x100000U)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT    (20U)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT)) & USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK)
-#define USDHC_PROT_CTRL_WECINT_MASK              (0x1000000U)
-#define USDHC_PROT_CTRL_WECINT_SHIFT             (24U)
-#define USDHC_PROT_CTRL_WECINT(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINT_SHIFT)) & USDHC_PROT_CTRL_WECINT_MASK)
-#define USDHC_PROT_CTRL_WECINS_MASK              (0x2000000U)
-#define USDHC_PROT_CTRL_WECINS_SHIFT             (25U)
-#define USDHC_PROT_CTRL_WECINS(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINS_SHIFT)) & USDHC_PROT_CTRL_WECINS_MASK)
-#define USDHC_PROT_CTRL_WECRM_MASK               (0x4000000U)
-#define USDHC_PROT_CTRL_WECRM_SHIFT              (26U)
-#define USDHC_PROT_CTRL_WECRM(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECRM_SHIFT)) & USDHC_PROT_CTRL_WECRM_MASK)
-#define USDHC_PROT_CTRL_BURST_LEN_EN_MASK        (0x38000000U)
-#define USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT       (27U)
-#define USDHC_PROT_CTRL_BURST_LEN_EN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT)) & USDHC_PROT_CTRL_BURST_LEN_EN_MASK)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK    (0x40000000U)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT   (30U)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT)) & USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK)
+#define USDHC_PROT_CTRL_LCTL_MASK  (0x1U)
+#define USDHC_PROT_CTRL_LCTL_SHIFT (0U)
+#define USDHC_PROT_CTRL_LCTL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_LCTL_SHIFT)) & USDHC_PROT_CTRL_LCTL_MASK)
+#define USDHC_PROT_CTRL_DTW_MASK   (0x6U)
+#define USDHC_PROT_CTRL_DTW_SHIFT  (1U)
+#define USDHC_PROT_CTRL_DTW(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DTW_SHIFT)) & USDHC_PROT_CTRL_DTW_MASK)
+#define USDHC_PROT_CTRL_D3CD_MASK  (0x8U)
+#define USDHC_PROT_CTRL_D3CD_SHIFT (3U)
+#define USDHC_PROT_CTRL_D3CD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_D3CD_SHIFT)) & USDHC_PROT_CTRL_D3CD_MASK)
+#define USDHC_PROT_CTRL_EMODE_MASK  (0x30U)
+#define USDHC_PROT_CTRL_EMODE_SHIFT (4U)
+#define USDHC_PROT_CTRL_EMODE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_EMODE_SHIFT)) & USDHC_PROT_CTRL_EMODE_MASK)
+#define USDHC_PROT_CTRL_CDTL_MASK  (0x40U)
+#define USDHC_PROT_CTRL_CDTL_SHIFT (6U)
+#define USDHC_PROT_CTRL_CDTL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDTL_SHIFT)) & USDHC_PROT_CTRL_CDTL_MASK)
+#define USDHC_PROT_CTRL_CDSS_MASK  (0x80U)
+#define USDHC_PROT_CTRL_CDSS_SHIFT (7U)
+#define USDHC_PROT_CTRL_CDSS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDSS_SHIFT)) & USDHC_PROT_CTRL_CDSS_MASK)
+#define USDHC_PROT_CTRL_DMASEL_MASK  (0x300U)
+#define USDHC_PROT_CTRL_DMASEL_SHIFT (8U)
+#define USDHC_PROT_CTRL_DMASEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DMASEL_SHIFT)) & USDHC_PROT_CTRL_DMASEL_MASK)
+#define USDHC_PROT_CTRL_SABGREQ_MASK  (0x10000U)
+#define USDHC_PROT_CTRL_SABGREQ_SHIFT (16U)
+#define USDHC_PROT_CTRL_SABGREQ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_SABGREQ_SHIFT)) & USDHC_PROT_CTRL_SABGREQ_MASK)
+#define USDHC_PROT_CTRL_CREQ_MASK  (0x20000U)
+#define USDHC_PROT_CTRL_CREQ_SHIFT (17U)
+#define USDHC_PROT_CTRL_CREQ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CREQ_SHIFT)) & USDHC_PROT_CTRL_CREQ_MASK)
+#define USDHC_PROT_CTRL_RWCTL_MASK  (0x40000U)
+#define USDHC_PROT_CTRL_RWCTL_SHIFT (18U)
+#define USDHC_PROT_CTRL_RWCTL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RWCTL_SHIFT)) & USDHC_PROT_CTRL_RWCTL_MASK)
+#define USDHC_PROT_CTRL_IABG_MASK  (0x80000U)
+#define USDHC_PROT_CTRL_IABG_SHIFT (19U)
+#define USDHC_PROT_CTRL_IABG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_IABG_SHIFT)) & USDHC_PROT_CTRL_IABG_MASK)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK  (0x100000U)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT (20U)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT)) & USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK)
+#define USDHC_PROT_CTRL_WECINT_MASK  (0x1000000U)
+#define USDHC_PROT_CTRL_WECINT_SHIFT (24U)
+#define USDHC_PROT_CTRL_WECINT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINT_SHIFT)) & USDHC_PROT_CTRL_WECINT_MASK)
+#define USDHC_PROT_CTRL_WECINS_MASK  (0x2000000U)
+#define USDHC_PROT_CTRL_WECINS_SHIFT (25U)
+#define USDHC_PROT_CTRL_WECINS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINS_SHIFT)) & USDHC_PROT_CTRL_WECINS_MASK)
+#define USDHC_PROT_CTRL_WECRM_MASK  (0x4000000U)
+#define USDHC_PROT_CTRL_WECRM_SHIFT (26U)
+#define USDHC_PROT_CTRL_WECRM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECRM_SHIFT)) & USDHC_PROT_CTRL_WECRM_MASK)
+#define USDHC_PROT_CTRL_BURST_LEN_EN_MASK  (0x38000000U)
+#define USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT (27U)
+#define USDHC_PROT_CTRL_BURST_LEN_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT)) & USDHC_PROT_CTRL_BURST_LEN_EN_MASK)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK  (0x40000000U)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT (30U)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT)) & USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK)
 /*! @} */
 
 /*! @name SYS_CTRL - System Control */
 /*! @{ */
-#define USDHC_SYS_CTRL_DVS_MASK                  (0xF0U)
-#define USDHC_SYS_CTRL_DVS_SHIFT                 (4U)
-#define USDHC_SYS_CTRL_DVS(x)                    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DVS_SHIFT)) & USDHC_SYS_CTRL_DVS_MASK)
-#define USDHC_SYS_CTRL_SDCLKFS_MASK              (0xFF00U)
-#define USDHC_SYS_CTRL_SDCLKFS_SHIFT             (8U)
-#define USDHC_SYS_CTRL_SDCLKFS(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_SDCLKFS_SHIFT)) & USDHC_SYS_CTRL_SDCLKFS_MASK)
-#define USDHC_SYS_CTRL_DTOCV_MASK                (0xF0000U)
-#define USDHC_SYS_CTRL_DTOCV_SHIFT               (16U)
-#define USDHC_SYS_CTRL_DTOCV(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DTOCV_SHIFT)) & USDHC_SYS_CTRL_DTOCV_MASK)
-#define USDHC_SYS_CTRL_IPP_RST_N_MASK            (0x800000U)
-#define USDHC_SYS_CTRL_IPP_RST_N_SHIFT           (23U)
-#define USDHC_SYS_CTRL_IPP_RST_N(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_IPP_RST_N_SHIFT)) & USDHC_SYS_CTRL_IPP_RST_N_MASK)
-#define USDHC_SYS_CTRL_RSTA_MASK                 (0x1000000U)
-#define USDHC_SYS_CTRL_RSTA_SHIFT                (24U)
-#define USDHC_SYS_CTRL_RSTA(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTA_SHIFT)) & USDHC_SYS_CTRL_RSTA_MASK)
-#define USDHC_SYS_CTRL_RSTC_MASK                 (0x2000000U)
-#define USDHC_SYS_CTRL_RSTC_SHIFT                (25U)
-#define USDHC_SYS_CTRL_RSTC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTC_SHIFT)) & USDHC_SYS_CTRL_RSTC_MASK)
-#define USDHC_SYS_CTRL_RSTD_MASK                 (0x4000000U)
-#define USDHC_SYS_CTRL_RSTD_SHIFT                (26U)
-#define USDHC_SYS_CTRL_RSTD(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTD_SHIFT)) & USDHC_SYS_CTRL_RSTD_MASK)
-#define USDHC_SYS_CTRL_INITA_MASK                (0x8000000U)
-#define USDHC_SYS_CTRL_INITA_SHIFT               (27U)
-#define USDHC_SYS_CTRL_INITA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_INITA_SHIFT)) & USDHC_SYS_CTRL_INITA_MASK)
-#define USDHC_SYS_CTRL_RSTT_MASK                 (0x10000000U)
-#define USDHC_SYS_CTRL_RSTT_SHIFT                (28U)
-#define USDHC_SYS_CTRL_RSTT(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTT_SHIFT)) & USDHC_SYS_CTRL_RSTT_MASK)
+#define USDHC_SYS_CTRL_DVS_MASK      (0xF0U)
+#define USDHC_SYS_CTRL_DVS_SHIFT     (4U)
+#define USDHC_SYS_CTRL_DVS(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DVS_SHIFT)) & USDHC_SYS_CTRL_DVS_MASK)
+#define USDHC_SYS_CTRL_SDCLKFS_MASK  (0xFF00U)
+#define USDHC_SYS_CTRL_SDCLKFS_SHIFT (8U)
+#define USDHC_SYS_CTRL_SDCLKFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_SDCLKFS_SHIFT)) & USDHC_SYS_CTRL_SDCLKFS_MASK)
+#define USDHC_SYS_CTRL_DTOCV_MASK  (0xF0000U)
+#define USDHC_SYS_CTRL_DTOCV_SHIFT (16U)
+#define USDHC_SYS_CTRL_DTOCV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DTOCV_SHIFT)) & USDHC_SYS_CTRL_DTOCV_MASK)
+#define USDHC_SYS_CTRL_IPP_RST_N_MASK  (0x800000U)
+#define USDHC_SYS_CTRL_IPP_RST_N_SHIFT (23U)
+#define USDHC_SYS_CTRL_IPP_RST_N(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_IPP_RST_N_SHIFT)) & USDHC_SYS_CTRL_IPP_RST_N_MASK)
+#define USDHC_SYS_CTRL_RSTA_MASK   (0x1000000U)
+#define USDHC_SYS_CTRL_RSTA_SHIFT  (24U)
+#define USDHC_SYS_CTRL_RSTA(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTA_SHIFT)) & USDHC_SYS_CTRL_RSTA_MASK)
+#define USDHC_SYS_CTRL_RSTC_MASK   (0x2000000U)
+#define USDHC_SYS_CTRL_RSTC_SHIFT  (25U)
+#define USDHC_SYS_CTRL_RSTC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTC_SHIFT)) & USDHC_SYS_CTRL_RSTC_MASK)
+#define USDHC_SYS_CTRL_RSTD_MASK   (0x4000000U)
+#define USDHC_SYS_CTRL_RSTD_SHIFT  (26U)
+#define USDHC_SYS_CTRL_RSTD(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTD_SHIFT)) & USDHC_SYS_CTRL_RSTD_MASK)
+#define USDHC_SYS_CTRL_INITA_MASK  (0x8000000U)
+#define USDHC_SYS_CTRL_INITA_SHIFT (27U)
+#define USDHC_SYS_CTRL_INITA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_INITA_SHIFT)) & USDHC_SYS_CTRL_INITA_MASK)
+#define USDHC_SYS_CTRL_RSTT_MASK  (0x10000000U)
+#define USDHC_SYS_CTRL_RSTT_SHIFT (28U)
+#define USDHC_SYS_CTRL_RSTT(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTT_SHIFT)) & USDHC_SYS_CTRL_RSTT_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status */
 /*! @{ */
-#define USDHC_INT_STATUS_CC_MASK                 (0x1U)
-#define USDHC_INT_STATUS_CC_SHIFT                (0U)
-#define USDHC_INT_STATUS_CC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CC_SHIFT)) & USDHC_INT_STATUS_CC_MASK)
-#define USDHC_INT_STATUS_TC_MASK                 (0x2U)
-#define USDHC_INT_STATUS_TC_SHIFT                (1U)
-#define USDHC_INT_STATUS_TC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TC_SHIFT)) & USDHC_INT_STATUS_TC_MASK)
-#define USDHC_INT_STATUS_BGE_MASK                (0x4U)
-#define USDHC_INT_STATUS_BGE_SHIFT               (2U)
-#define USDHC_INT_STATUS_BGE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BGE_SHIFT)) & USDHC_INT_STATUS_BGE_MASK)
-#define USDHC_INT_STATUS_DINT_MASK               (0x8U)
-#define USDHC_INT_STATUS_DINT_SHIFT              (3U)
-#define USDHC_INT_STATUS_DINT(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DINT_SHIFT)) & USDHC_INT_STATUS_DINT_MASK)
-#define USDHC_INT_STATUS_BWR_MASK                (0x10U)
-#define USDHC_INT_STATUS_BWR_SHIFT               (4U)
-#define USDHC_INT_STATUS_BWR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BWR_SHIFT)) & USDHC_INT_STATUS_BWR_MASK)
-#define USDHC_INT_STATUS_BRR_MASK                (0x20U)
-#define USDHC_INT_STATUS_BRR_SHIFT               (5U)
-#define USDHC_INT_STATUS_BRR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BRR_SHIFT)) & USDHC_INT_STATUS_BRR_MASK)
-#define USDHC_INT_STATUS_CINS_MASK               (0x40U)
-#define USDHC_INT_STATUS_CINS_SHIFT              (6U)
-#define USDHC_INT_STATUS_CINS(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINS_SHIFT)) & USDHC_INT_STATUS_CINS_MASK)
-#define USDHC_INT_STATUS_CRM_MASK                (0x80U)
-#define USDHC_INT_STATUS_CRM_SHIFT               (7U)
-#define USDHC_INT_STATUS_CRM(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CRM_SHIFT)) & USDHC_INT_STATUS_CRM_MASK)
-#define USDHC_INT_STATUS_CINT_MASK               (0x100U)
-#define USDHC_INT_STATUS_CINT_SHIFT              (8U)
-#define USDHC_INT_STATUS_CINT(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINT_SHIFT)) & USDHC_INT_STATUS_CINT_MASK)
-#define USDHC_INT_STATUS_RTE_MASK                (0x1000U)
-#define USDHC_INT_STATUS_RTE_SHIFT               (12U)
-#define USDHC_INT_STATUS_RTE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_RTE_SHIFT)) & USDHC_INT_STATUS_RTE_MASK)
-#define USDHC_INT_STATUS_TP_MASK                 (0x4000U)
-#define USDHC_INT_STATUS_TP_SHIFT                (14U)
-#define USDHC_INT_STATUS_TP(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TP_SHIFT)) & USDHC_INT_STATUS_TP_MASK)
-#define USDHC_INT_STATUS_CTOE_MASK               (0x10000U)
-#define USDHC_INT_STATUS_CTOE_SHIFT              (16U)
-#define USDHC_INT_STATUS_CTOE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CTOE_SHIFT)) & USDHC_INT_STATUS_CTOE_MASK)
-#define USDHC_INT_STATUS_CCE_MASK                (0x20000U)
-#define USDHC_INT_STATUS_CCE_SHIFT               (17U)
-#define USDHC_INT_STATUS_CCE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CCE_SHIFT)) & USDHC_INT_STATUS_CCE_MASK)
-#define USDHC_INT_STATUS_CEBE_MASK               (0x40000U)
-#define USDHC_INT_STATUS_CEBE_SHIFT              (18U)
-#define USDHC_INT_STATUS_CEBE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CEBE_SHIFT)) & USDHC_INT_STATUS_CEBE_MASK)
-#define USDHC_INT_STATUS_CIE_MASK                (0x80000U)
-#define USDHC_INT_STATUS_CIE_SHIFT               (19U)
-#define USDHC_INT_STATUS_CIE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CIE_SHIFT)) & USDHC_INT_STATUS_CIE_MASK)
-#define USDHC_INT_STATUS_DTOE_MASK               (0x100000U)
-#define USDHC_INT_STATUS_DTOE_SHIFT              (20U)
-#define USDHC_INT_STATUS_DTOE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DTOE_SHIFT)) & USDHC_INT_STATUS_DTOE_MASK)
-#define USDHC_INT_STATUS_DCE_MASK                (0x200000U)
-#define USDHC_INT_STATUS_DCE_SHIFT               (21U)
-#define USDHC_INT_STATUS_DCE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DCE_SHIFT)) & USDHC_INT_STATUS_DCE_MASK)
-#define USDHC_INT_STATUS_DEBE_MASK               (0x400000U)
-#define USDHC_INT_STATUS_DEBE_SHIFT              (22U)
-#define USDHC_INT_STATUS_DEBE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DEBE_SHIFT)) & USDHC_INT_STATUS_DEBE_MASK)
-#define USDHC_INT_STATUS_AC12E_MASK              (0x1000000U)
-#define USDHC_INT_STATUS_AC12E_SHIFT             (24U)
-#define USDHC_INT_STATUS_AC12E(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_AC12E_SHIFT)) & USDHC_INT_STATUS_AC12E_MASK)
-#define USDHC_INT_STATUS_TNE_MASK                (0x4000000U)
-#define USDHC_INT_STATUS_TNE_SHIFT               (26U)
-#define USDHC_INT_STATUS_TNE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TNE_SHIFT)) & USDHC_INT_STATUS_TNE_MASK)
-#define USDHC_INT_STATUS_DMAE_MASK               (0x10000000U)
-#define USDHC_INT_STATUS_DMAE_SHIFT              (28U)
-#define USDHC_INT_STATUS_DMAE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DMAE_SHIFT)) & USDHC_INT_STATUS_DMAE_MASK)
+#define USDHC_INT_STATUS_CC_MASK   (0x1U)
+#define USDHC_INT_STATUS_CC_SHIFT  (0U)
+#define USDHC_INT_STATUS_CC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CC_SHIFT)) & USDHC_INT_STATUS_CC_MASK)
+#define USDHC_INT_STATUS_TC_MASK   (0x2U)
+#define USDHC_INT_STATUS_TC_SHIFT  (1U)
+#define USDHC_INT_STATUS_TC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TC_SHIFT)) & USDHC_INT_STATUS_TC_MASK)
+#define USDHC_INT_STATUS_BGE_MASK  (0x4U)
+#define USDHC_INT_STATUS_BGE_SHIFT (2U)
+#define USDHC_INT_STATUS_BGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BGE_SHIFT)) & USDHC_INT_STATUS_BGE_MASK)
+#define USDHC_INT_STATUS_DINT_MASK  (0x8U)
+#define USDHC_INT_STATUS_DINT_SHIFT (3U)
+#define USDHC_INT_STATUS_DINT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DINT_SHIFT)) & USDHC_INT_STATUS_DINT_MASK)
+#define USDHC_INT_STATUS_BWR_MASK  (0x10U)
+#define USDHC_INT_STATUS_BWR_SHIFT (4U)
+#define USDHC_INT_STATUS_BWR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BWR_SHIFT)) & USDHC_INT_STATUS_BWR_MASK)
+#define USDHC_INT_STATUS_BRR_MASK  (0x20U)
+#define USDHC_INT_STATUS_BRR_SHIFT (5U)
+#define USDHC_INT_STATUS_BRR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BRR_SHIFT)) & USDHC_INT_STATUS_BRR_MASK)
+#define USDHC_INT_STATUS_CINS_MASK  (0x40U)
+#define USDHC_INT_STATUS_CINS_SHIFT (6U)
+#define USDHC_INT_STATUS_CINS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINS_SHIFT)) & USDHC_INT_STATUS_CINS_MASK)
+#define USDHC_INT_STATUS_CRM_MASK  (0x80U)
+#define USDHC_INT_STATUS_CRM_SHIFT (7U)
+#define USDHC_INT_STATUS_CRM(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CRM_SHIFT)) & USDHC_INT_STATUS_CRM_MASK)
+#define USDHC_INT_STATUS_CINT_MASK  (0x100U)
+#define USDHC_INT_STATUS_CINT_SHIFT (8U)
+#define USDHC_INT_STATUS_CINT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINT_SHIFT)) & USDHC_INT_STATUS_CINT_MASK)
+#define USDHC_INT_STATUS_RTE_MASK  (0x1000U)
+#define USDHC_INT_STATUS_RTE_SHIFT (12U)
+#define USDHC_INT_STATUS_RTE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_RTE_SHIFT)) & USDHC_INT_STATUS_RTE_MASK)
+#define USDHC_INT_STATUS_TP_MASK    (0x4000U)
+#define USDHC_INT_STATUS_TP_SHIFT   (14U)
+#define USDHC_INT_STATUS_TP(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TP_SHIFT)) & USDHC_INT_STATUS_TP_MASK)
+#define USDHC_INT_STATUS_CTOE_MASK  (0x10000U)
+#define USDHC_INT_STATUS_CTOE_SHIFT (16U)
+#define USDHC_INT_STATUS_CTOE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CTOE_SHIFT)) & USDHC_INT_STATUS_CTOE_MASK)
+#define USDHC_INT_STATUS_CCE_MASK  (0x20000U)
+#define USDHC_INT_STATUS_CCE_SHIFT (17U)
+#define USDHC_INT_STATUS_CCE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CCE_SHIFT)) & USDHC_INT_STATUS_CCE_MASK)
+#define USDHC_INT_STATUS_CEBE_MASK  (0x40000U)
+#define USDHC_INT_STATUS_CEBE_SHIFT (18U)
+#define USDHC_INT_STATUS_CEBE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CEBE_SHIFT)) & USDHC_INT_STATUS_CEBE_MASK)
+#define USDHC_INT_STATUS_CIE_MASK  (0x80000U)
+#define USDHC_INT_STATUS_CIE_SHIFT (19U)
+#define USDHC_INT_STATUS_CIE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CIE_SHIFT)) & USDHC_INT_STATUS_CIE_MASK)
+#define USDHC_INT_STATUS_DTOE_MASK  (0x100000U)
+#define USDHC_INT_STATUS_DTOE_SHIFT (20U)
+#define USDHC_INT_STATUS_DTOE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DTOE_SHIFT)) & USDHC_INT_STATUS_DTOE_MASK)
+#define USDHC_INT_STATUS_DCE_MASK  (0x200000U)
+#define USDHC_INT_STATUS_DCE_SHIFT (21U)
+#define USDHC_INT_STATUS_DCE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DCE_SHIFT)) & USDHC_INT_STATUS_DCE_MASK)
+#define USDHC_INT_STATUS_DEBE_MASK  (0x400000U)
+#define USDHC_INT_STATUS_DEBE_SHIFT (22U)
+#define USDHC_INT_STATUS_DEBE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DEBE_SHIFT)) & USDHC_INT_STATUS_DEBE_MASK)
+#define USDHC_INT_STATUS_AC12E_MASK  (0x1000000U)
+#define USDHC_INT_STATUS_AC12E_SHIFT (24U)
+#define USDHC_INT_STATUS_AC12E(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_AC12E_SHIFT)) & USDHC_INT_STATUS_AC12E_MASK)
+#define USDHC_INT_STATUS_TNE_MASK  (0x4000000U)
+#define USDHC_INT_STATUS_TNE_SHIFT (26U)
+#define USDHC_INT_STATUS_TNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TNE_SHIFT)) & USDHC_INT_STATUS_TNE_MASK)
+#define USDHC_INT_STATUS_DMAE_MASK  (0x10000000U)
+#define USDHC_INT_STATUS_DMAE_SHIFT (28U)
+#define USDHC_INT_STATUS_DMAE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DMAE_SHIFT)) & USDHC_INT_STATUS_DMAE_MASK)
 /*! @} */
 
 /*! @name INT_STATUS_EN - Interrupt Status Enable */
 /*! @{ */
-#define USDHC_INT_STATUS_EN_CCSEN_MASK           (0x1U)
-#define USDHC_INT_STATUS_EN_CCSEN_SHIFT          (0U)
-#define USDHC_INT_STATUS_EN_CCSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCSEN_SHIFT)) & USDHC_INT_STATUS_EN_CCSEN_MASK)
-#define USDHC_INT_STATUS_EN_TCSEN_MASK           (0x2U)
-#define USDHC_INT_STATUS_EN_TCSEN_SHIFT          (1U)
-#define USDHC_INT_STATUS_EN_TCSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TCSEN_SHIFT)) & USDHC_INT_STATUS_EN_TCSEN_MASK)
-#define USDHC_INT_STATUS_EN_BGESEN_MASK          (0x4U)
-#define USDHC_INT_STATUS_EN_BGESEN_SHIFT         (2U)
-#define USDHC_INT_STATUS_EN_BGESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BGESEN_SHIFT)) & USDHC_INT_STATUS_EN_BGESEN_MASK)
-#define USDHC_INT_STATUS_EN_DINTSEN_MASK         (0x8U)
-#define USDHC_INT_STATUS_EN_DINTSEN_SHIFT        (3U)
-#define USDHC_INT_STATUS_EN_DINTSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_DINTSEN_MASK)
-#define USDHC_INT_STATUS_EN_BWRSEN_MASK          (0x10U)
-#define USDHC_INT_STATUS_EN_BWRSEN_SHIFT         (4U)
-#define USDHC_INT_STATUS_EN_BWRSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BWRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BWRSEN_MASK)
-#define USDHC_INT_STATUS_EN_BRRSEN_MASK          (0x20U)
-#define USDHC_INT_STATUS_EN_BRRSEN_SHIFT         (5U)
-#define USDHC_INT_STATUS_EN_BRRSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BRRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BRRSEN_MASK)
-#define USDHC_INT_STATUS_EN_CINSSEN_MASK         (0x40U)
-#define USDHC_INT_STATUS_EN_CINSSEN_SHIFT        (6U)
-#define USDHC_INT_STATUS_EN_CINSSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINSSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINSSEN_MASK)
-#define USDHC_INT_STATUS_EN_CRMSEN_MASK          (0x80U)
-#define USDHC_INT_STATUS_EN_CRMSEN_SHIFT         (7U)
-#define USDHC_INT_STATUS_EN_CRMSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CRMSEN_SHIFT)) & USDHC_INT_STATUS_EN_CRMSEN_MASK)
-#define USDHC_INT_STATUS_EN_CINTSEN_MASK         (0x100U)
-#define USDHC_INT_STATUS_EN_CINTSEN_SHIFT        (8U)
-#define USDHC_INT_STATUS_EN_CINTSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINTSEN_MASK)
-#define USDHC_INT_STATUS_EN_RTESEN_MASK          (0x1000U)
-#define USDHC_INT_STATUS_EN_RTESEN_SHIFT         (12U)
-#define USDHC_INT_STATUS_EN_RTESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_RTESEN_SHIFT)) & USDHC_INT_STATUS_EN_RTESEN_MASK)
-#define USDHC_INT_STATUS_EN_TPSEN_MASK           (0x4000U)
-#define USDHC_INT_STATUS_EN_TPSEN_SHIFT          (14U)
-#define USDHC_INT_STATUS_EN_TPSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TPSEN_SHIFT)) & USDHC_INT_STATUS_EN_TPSEN_MASK)
-#define USDHC_INT_STATUS_EN_CTOESEN_MASK         (0x10000U)
-#define USDHC_INT_STATUS_EN_CTOESEN_SHIFT        (16U)
-#define USDHC_INT_STATUS_EN_CTOESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_CTOESEN_MASK)
-#define USDHC_INT_STATUS_EN_CCESEN_MASK          (0x20000U)
-#define USDHC_INT_STATUS_EN_CCESEN_SHIFT         (17U)
-#define USDHC_INT_STATUS_EN_CCESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCESEN_SHIFT)) & USDHC_INT_STATUS_EN_CCESEN_MASK)
-#define USDHC_INT_STATUS_EN_CEBESEN_MASK         (0x40000U)
-#define USDHC_INT_STATUS_EN_CEBESEN_SHIFT        (18U)
-#define USDHC_INT_STATUS_EN_CEBESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_CEBESEN_MASK)
-#define USDHC_INT_STATUS_EN_CIESEN_MASK          (0x80000U)
-#define USDHC_INT_STATUS_EN_CIESEN_SHIFT         (19U)
-#define USDHC_INT_STATUS_EN_CIESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CIESEN_SHIFT)) & USDHC_INT_STATUS_EN_CIESEN_MASK)
-#define USDHC_INT_STATUS_EN_DTOESEN_MASK         (0x100000U)
-#define USDHC_INT_STATUS_EN_DTOESEN_SHIFT        (20U)
-#define USDHC_INT_STATUS_EN_DTOESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_DTOESEN_MASK)
-#define USDHC_INT_STATUS_EN_DCESEN_MASK          (0x200000U)
-#define USDHC_INT_STATUS_EN_DCESEN_SHIFT         (21U)
-#define USDHC_INT_STATUS_EN_DCESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DCESEN_SHIFT)) & USDHC_INT_STATUS_EN_DCESEN_MASK)
-#define USDHC_INT_STATUS_EN_DEBESEN_MASK         (0x400000U)
-#define USDHC_INT_STATUS_EN_DEBESEN_SHIFT        (22U)
-#define USDHC_INT_STATUS_EN_DEBESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_DEBESEN_MASK)
-#define USDHC_INT_STATUS_EN_AC12ESEN_MASK        (0x1000000U)
-#define USDHC_INT_STATUS_EN_AC12ESEN_SHIFT       (24U)
-#define USDHC_INT_STATUS_EN_AC12ESEN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_AC12ESEN_SHIFT)) & USDHC_INT_STATUS_EN_AC12ESEN_MASK)
-#define USDHC_INT_STATUS_EN_TNESEN_MASK          (0x4000000U)
-#define USDHC_INT_STATUS_EN_TNESEN_SHIFT         (26U)
-#define USDHC_INT_STATUS_EN_TNESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TNESEN_SHIFT)) & USDHC_INT_STATUS_EN_TNESEN_MASK)
-#define USDHC_INT_STATUS_EN_DMAESEN_MASK         (0x10000000U)
-#define USDHC_INT_STATUS_EN_DMAESEN_SHIFT        (28U)
-#define USDHC_INT_STATUS_EN_DMAESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DMAESEN_SHIFT)) & USDHC_INT_STATUS_EN_DMAESEN_MASK)
+#define USDHC_INT_STATUS_EN_CCSEN_MASK  (0x1U)
+#define USDHC_INT_STATUS_EN_CCSEN_SHIFT (0U)
+#define USDHC_INT_STATUS_EN_CCSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCSEN_SHIFT)) & USDHC_INT_STATUS_EN_CCSEN_MASK)
+#define USDHC_INT_STATUS_EN_TCSEN_MASK  (0x2U)
+#define USDHC_INT_STATUS_EN_TCSEN_SHIFT (1U)
+#define USDHC_INT_STATUS_EN_TCSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TCSEN_SHIFT)) & USDHC_INT_STATUS_EN_TCSEN_MASK)
+#define USDHC_INT_STATUS_EN_BGESEN_MASK  (0x4U)
+#define USDHC_INT_STATUS_EN_BGESEN_SHIFT (2U)
+#define USDHC_INT_STATUS_EN_BGESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BGESEN_SHIFT)) & USDHC_INT_STATUS_EN_BGESEN_MASK)
+#define USDHC_INT_STATUS_EN_DINTSEN_MASK  (0x8U)
+#define USDHC_INT_STATUS_EN_DINTSEN_SHIFT (3U)
+#define USDHC_INT_STATUS_EN_DINTSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_DINTSEN_MASK)
+#define USDHC_INT_STATUS_EN_BWRSEN_MASK  (0x10U)
+#define USDHC_INT_STATUS_EN_BWRSEN_SHIFT (4U)
+#define USDHC_INT_STATUS_EN_BWRSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BWRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BWRSEN_MASK)
+#define USDHC_INT_STATUS_EN_BRRSEN_MASK  (0x20U)
+#define USDHC_INT_STATUS_EN_BRRSEN_SHIFT (5U)
+#define USDHC_INT_STATUS_EN_BRRSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BRRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BRRSEN_MASK)
+#define USDHC_INT_STATUS_EN_CINSSEN_MASK  (0x40U)
+#define USDHC_INT_STATUS_EN_CINSSEN_SHIFT (6U)
+#define USDHC_INT_STATUS_EN_CINSSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINSSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINSSEN_MASK)
+#define USDHC_INT_STATUS_EN_CRMSEN_MASK  (0x80U)
+#define USDHC_INT_STATUS_EN_CRMSEN_SHIFT (7U)
+#define USDHC_INT_STATUS_EN_CRMSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CRMSEN_SHIFT)) & USDHC_INT_STATUS_EN_CRMSEN_MASK)
+#define USDHC_INT_STATUS_EN_CINTSEN_MASK  (0x100U)
+#define USDHC_INT_STATUS_EN_CINTSEN_SHIFT (8U)
+#define USDHC_INT_STATUS_EN_CINTSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINTSEN_MASK)
+#define USDHC_INT_STATUS_EN_RTESEN_MASK  (0x1000U)
+#define USDHC_INT_STATUS_EN_RTESEN_SHIFT (12U)
+#define USDHC_INT_STATUS_EN_RTESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_RTESEN_SHIFT)) & USDHC_INT_STATUS_EN_RTESEN_MASK)
+#define USDHC_INT_STATUS_EN_TPSEN_MASK  (0x4000U)
+#define USDHC_INT_STATUS_EN_TPSEN_SHIFT (14U)
+#define USDHC_INT_STATUS_EN_TPSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TPSEN_SHIFT)) & USDHC_INT_STATUS_EN_TPSEN_MASK)
+#define USDHC_INT_STATUS_EN_CTOESEN_MASK  (0x10000U)
+#define USDHC_INT_STATUS_EN_CTOESEN_SHIFT (16U)
+#define USDHC_INT_STATUS_EN_CTOESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_CTOESEN_MASK)
+#define USDHC_INT_STATUS_EN_CCESEN_MASK  (0x20000U)
+#define USDHC_INT_STATUS_EN_CCESEN_SHIFT (17U)
+#define USDHC_INT_STATUS_EN_CCESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCESEN_SHIFT)) & USDHC_INT_STATUS_EN_CCESEN_MASK)
+#define USDHC_INT_STATUS_EN_CEBESEN_MASK  (0x40000U)
+#define USDHC_INT_STATUS_EN_CEBESEN_SHIFT (18U)
+#define USDHC_INT_STATUS_EN_CEBESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_CEBESEN_MASK)
+#define USDHC_INT_STATUS_EN_CIESEN_MASK  (0x80000U)
+#define USDHC_INT_STATUS_EN_CIESEN_SHIFT (19U)
+#define USDHC_INT_STATUS_EN_CIESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CIESEN_SHIFT)) & USDHC_INT_STATUS_EN_CIESEN_MASK)
+#define USDHC_INT_STATUS_EN_DTOESEN_MASK  (0x100000U)
+#define USDHC_INT_STATUS_EN_DTOESEN_SHIFT (20U)
+#define USDHC_INT_STATUS_EN_DTOESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_DTOESEN_MASK)
+#define USDHC_INT_STATUS_EN_DCESEN_MASK  (0x200000U)
+#define USDHC_INT_STATUS_EN_DCESEN_SHIFT (21U)
+#define USDHC_INT_STATUS_EN_DCESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DCESEN_SHIFT)) & USDHC_INT_STATUS_EN_DCESEN_MASK)
+#define USDHC_INT_STATUS_EN_DEBESEN_MASK  (0x400000U)
+#define USDHC_INT_STATUS_EN_DEBESEN_SHIFT (22U)
+#define USDHC_INT_STATUS_EN_DEBESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_DEBESEN_MASK)
+#define USDHC_INT_STATUS_EN_AC12ESEN_MASK  (0x1000000U)
+#define USDHC_INT_STATUS_EN_AC12ESEN_SHIFT (24U)
+#define USDHC_INT_STATUS_EN_AC12ESEN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_AC12ESEN_SHIFT)) & USDHC_INT_STATUS_EN_AC12ESEN_MASK)
+#define USDHC_INT_STATUS_EN_TNESEN_MASK  (0x4000000U)
+#define USDHC_INT_STATUS_EN_TNESEN_SHIFT (26U)
+#define USDHC_INT_STATUS_EN_TNESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TNESEN_SHIFT)) & USDHC_INT_STATUS_EN_TNESEN_MASK)
+#define USDHC_INT_STATUS_EN_DMAESEN_MASK  (0x10000000U)
+#define USDHC_INT_STATUS_EN_DMAESEN_SHIFT (28U)
+#define USDHC_INT_STATUS_EN_DMAESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DMAESEN_SHIFT)) & USDHC_INT_STATUS_EN_DMAESEN_MASK)
 /*! @} */
 
 /*! @name INT_SIGNAL_EN - Interrupt Signal Enable */
 /*! @{ */
-#define USDHC_INT_SIGNAL_EN_CCIEN_MASK           (0x1U)
-#define USDHC_INT_SIGNAL_EN_CCIEN_SHIFT          (0U)
-#define USDHC_INT_SIGNAL_EN_CCIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TCIEN_MASK           (0x2U)
-#define USDHC_INT_SIGNAL_EN_TCIEN_SHIFT          (1U)
-#define USDHC_INT_SIGNAL_EN_TCIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TCIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BGEIEN_MASK          (0x4U)
-#define USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT         (2U)
-#define USDHC_INT_SIGNAL_EN_BGEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BGEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DINTIEN_MASK         (0x8U)
-#define USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT        (3U)
-#define USDHC_INT_SIGNAL_EN_DINTIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DINTIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BWRIEN_MASK          (0x10U)
-#define USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT         (4U)
-#define USDHC_INT_SIGNAL_EN_BWRIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BWRIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BRRIEN_MASK          (0x20U)
-#define USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT         (5U)
-#define USDHC_INT_SIGNAL_EN_BRRIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BRRIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CINSIEN_MASK         (0x40U)
-#define USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT        (6U)
-#define USDHC_INT_SIGNAL_EN_CINSIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINSIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CRMIEN_MASK          (0x80U)
-#define USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT         (7U)
-#define USDHC_INT_SIGNAL_EN_CRMIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CRMIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CINTIEN_MASK         (0x100U)
-#define USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT        (8U)
-#define USDHC_INT_SIGNAL_EN_CINTIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINTIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_RTEIEN_MASK          (0x1000U)
-#define USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT         (12U)
-#define USDHC_INT_SIGNAL_EN_RTEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_RTEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TPIEN_MASK           (0x4000U)
-#define USDHC_INT_SIGNAL_EN_TPIEN_SHIFT          (14U)
-#define USDHC_INT_SIGNAL_EN_TPIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TPIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TPIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN_MASK         (0x10000U)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT        (16U)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CTOEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CCEIEN_MASK          (0x20000U)
-#define USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT         (17U)
-#define USDHC_INT_SIGNAL_EN_CCEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN_MASK         (0x40000U)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT        (18U)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CEBEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CIEIEN_MASK          (0x80000U)
-#define USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT         (19U)
-#define USDHC_INT_SIGNAL_EN_CIEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CIEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN_MASK         (0x100000U)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT        (20U)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DTOEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DCEIEN_MASK          (0x200000U)
-#define USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT         (21U)
-#define USDHC_INT_SIGNAL_EN_DCEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DCEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN_MASK         (0x400000U)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT        (22U)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DEBEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN_MASK        (0x1000000U)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT       (24U)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_AC12EIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TNEIEN_MASK          (0x4000000U)
-#define USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT         (26U)
-#define USDHC_INT_SIGNAL_EN_TNEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TNEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN_MASK         (0x10000000U)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT        (28U)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DMAEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CCIEN_MASK  (0x1U)
+#define USDHC_INT_SIGNAL_EN_CCIEN_SHIFT (0U)
+#define USDHC_INT_SIGNAL_EN_CCIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TCIEN_MASK  (0x2U)
+#define USDHC_INT_SIGNAL_EN_TCIEN_SHIFT (1U)
+#define USDHC_INT_SIGNAL_EN_TCIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TCIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BGEIEN_MASK  (0x4U)
+#define USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT (2U)
+#define USDHC_INT_SIGNAL_EN_BGEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BGEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DINTIEN_MASK  (0x8U)
+#define USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT (3U)
+#define USDHC_INT_SIGNAL_EN_DINTIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DINTIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BWRIEN_MASK  (0x10U)
+#define USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT (4U)
+#define USDHC_INT_SIGNAL_EN_BWRIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BWRIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BRRIEN_MASK  (0x20U)
+#define USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT (5U)
+#define USDHC_INT_SIGNAL_EN_BRRIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BRRIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CINSIEN_MASK  (0x40U)
+#define USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT (6U)
+#define USDHC_INT_SIGNAL_EN_CINSIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINSIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CRMIEN_MASK  (0x80U)
+#define USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT (7U)
+#define USDHC_INT_SIGNAL_EN_CRMIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CRMIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CINTIEN_MASK  (0x100U)
+#define USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT (8U)
+#define USDHC_INT_SIGNAL_EN_CINTIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINTIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_RTEIEN_MASK  (0x1000U)
+#define USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT (12U)
+#define USDHC_INT_SIGNAL_EN_RTEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_RTEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TPIEN_MASK  (0x4000U)
+#define USDHC_INT_SIGNAL_EN_TPIEN_SHIFT (14U)
+#define USDHC_INT_SIGNAL_EN_TPIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TPIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TPIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN_MASK  (0x10000U)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT (16U)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CTOEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CCEIEN_MASK  (0x20000U)
+#define USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT (17U)
+#define USDHC_INT_SIGNAL_EN_CCEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN_MASK  (0x40000U)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT (18U)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CEBEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CIEIEN_MASK  (0x80000U)
+#define USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT (19U)
+#define USDHC_INT_SIGNAL_EN_CIEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CIEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN_MASK  (0x100000U)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT (20U)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DTOEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DCEIEN_MASK  (0x200000U)
+#define USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT (21U)
+#define USDHC_INT_SIGNAL_EN_DCEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DCEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN_MASK  (0x400000U)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT (22U)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DEBEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN_MASK  (0x1000000U)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT (24U)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_AC12EIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TNEIEN_MASK  (0x4000000U)
+#define USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT (26U)
+#define USDHC_INT_SIGNAL_EN_TNEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TNEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN_MASK  (0x10000000U)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT (28U)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DMAEIEN_MASK)
 /*! @} */
 
 /*! @name AUTOCMD12_ERR_STATUS - Auto CMD12 Error Status */
 /*! @{ */
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK   (0x1U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT  (0U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK  (0x1U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT (0U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK  (0x2U)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT (1U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT)) &                                       \
+     USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK  (0x4U)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT (2U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK   (0x8U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT  (3U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK   (0x10U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT  (4U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK (0x80U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT)) &                                       \
+     USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK  (0x8U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT (3U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK  (0x10U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT (4U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK  (0x80U)
 #define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT (7U)
-#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK (0x400000U)
+#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT)) &                                     \
+     USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK  (0x400000U)
 #define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT (22U)
-#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING(x) (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK (0x800000U)
+#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT)) &                                \
+     USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK  (0x800000U)
 #define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT (23U)
-#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT)) &                                   \
+     USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name HOST_CTRL_CAP - Host Controller Capabilities */
 /*! @{ */
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK   (0x1U)
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT  (0U)
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK  (0x1U)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT (0U)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK)
 #define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK  (0x2U)
 #define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT (1U)
-#define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK   (0x4U)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT  (2U)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK)
-#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK (0xF00U)
+#define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT)) &                                       \
+     USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK  (0x4U)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT (2U)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK  (0xF00U)
 #define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT (8U)
-#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(x) (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT)) & USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK)
-#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK (0x2000U)
+#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT)) &                                  \
+     USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK)
+#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK  (0x2000U)
 #define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT (13U)
-#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT)) & USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK   (0xC000U)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT  (14U)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT)) & USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK)
-#define USDHC_HOST_CTRL_CAP_MBL_MASK             (0x70000U)
-#define USDHC_HOST_CTRL_CAP_MBL_SHIFT            (16U)
-#define USDHC_HOST_CTRL_CAP_MBL(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_MBL_SHIFT)) & USDHC_HOST_CTRL_CAP_MBL_MASK)
-#define USDHC_HOST_CTRL_CAP_ADMAS_MASK           (0x100000U)
-#define USDHC_HOST_CTRL_CAP_ADMAS_SHIFT          (20U)
-#define USDHC_HOST_CTRL_CAP_ADMAS(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_ADMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_ADMAS_MASK)
-#define USDHC_HOST_CTRL_CAP_HSS_MASK             (0x200000U)
-#define USDHC_HOST_CTRL_CAP_HSS_SHIFT            (21U)
-#define USDHC_HOST_CTRL_CAP_HSS(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_HSS_SHIFT)) & USDHC_HOST_CTRL_CAP_HSS_MASK)
-#define USDHC_HOST_CTRL_CAP_DMAS_MASK            (0x400000U)
-#define USDHC_HOST_CTRL_CAP_DMAS_SHIFT           (22U)
-#define USDHC_HOST_CTRL_CAP_DMAS(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_DMAS_MASK)
-#define USDHC_HOST_CTRL_CAP_SRS_MASK             (0x800000U)
-#define USDHC_HOST_CTRL_CAP_SRS_SHIFT            (23U)
-#define USDHC_HOST_CTRL_CAP_SRS(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SRS_SHIFT)) & USDHC_HOST_CTRL_CAP_SRS_MASK)
-#define USDHC_HOST_CTRL_CAP_VS33_MASK            (0x1000000U)
-#define USDHC_HOST_CTRL_CAP_VS33_SHIFT           (24U)
-#define USDHC_HOST_CTRL_CAP_VS33(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS33_SHIFT)) & USDHC_HOST_CTRL_CAP_VS33_MASK)
-#define USDHC_HOST_CTRL_CAP_VS30_MASK            (0x2000000U)
-#define USDHC_HOST_CTRL_CAP_VS30_SHIFT           (25U)
-#define USDHC_HOST_CTRL_CAP_VS30(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS30_SHIFT)) & USDHC_HOST_CTRL_CAP_VS30_MASK)
-#define USDHC_HOST_CTRL_CAP_VS18_MASK            (0x4000000U)
-#define USDHC_HOST_CTRL_CAP_VS18_SHIFT           (26U)
-#define USDHC_HOST_CTRL_CAP_VS18(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS18_SHIFT)) & USDHC_HOST_CTRL_CAP_VS18_MASK)
+#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT)) &                                     \
+     USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK  (0xC000U)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT (14U)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT)) & USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK)
+#define USDHC_HOST_CTRL_CAP_MBL_MASK  (0x70000U)
+#define USDHC_HOST_CTRL_CAP_MBL_SHIFT (16U)
+#define USDHC_HOST_CTRL_CAP_MBL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_MBL_SHIFT)) & USDHC_HOST_CTRL_CAP_MBL_MASK)
+#define USDHC_HOST_CTRL_CAP_ADMAS_MASK  (0x100000U)
+#define USDHC_HOST_CTRL_CAP_ADMAS_SHIFT (20U)
+#define USDHC_HOST_CTRL_CAP_ADMAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_ADMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_ADMAS_MASK)
+#define USDHC_HOST_CTRL_CAP_HSS_MASK  (0x200000U)
+#define USDHC_HOST_CTRL_CAP_HSS_SHIFT (21U)
+#define USDHC_HOST_CTRL_CAP_HSS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_HSS_SHIFT)) & USDHC_HOST_CTRL_CAP_HSS_MASK)
+#define USDHC_HOST_CTRL_CAP_DMAS_MASK  (0x400000U)
+#define USDHC_HOST_CTRL_CAP_DMAS_SHIFT (22U)
+#define USDHC_HOST_CTRL_CAP_DMAS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_DMAS_MASK)
+#define USDHC_HOST_CTRL_CAP_SRS_MASK  (0x800000U)
+#define USDHC_HOST_CTRL_CAP_SRS_SHIFT (23U)
+#define USDHC_HOST_CTRL_CAP_SRS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SRS_SHIFT)) & USDHC_HOST_CTRL_CAP_SRS_MASK)
+#define USDHC_HOST_CTRL_CAP_VS33_MASK  (0x1000000U)
+#define USDHC_HOST_CTRL_CAP_VS33_SHIFT (24U)
+#define USDHC_HOST_CTRL_CAP_VS33(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS33_SHIFT)) & USDHC_HOST_CTRL_CAP_VS33_MASK)
+#define USDHC_HOST_CTRL_CAP_VS30_MASK  (0x2000000U)
+#define USDHC_HOST_CTRL_CAP_VS30_SHIFT (25U)
+#define USDHC_HOST_CTRL_CAP_VS30(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS30_SHIFT)) & USDHC_HOST_CTRL_CAP_VS30_MASK)
+#define USDHC_HOST_CTRL_CAP_VS18_MASK  (0x4000000U)
+#define USDHC_HOST_CTRL_CAP_VS18_SHIFT (26U)
+#define USDHC_HOST_CTRL_CAP_VS18(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS18_SHIFT)) & USDHC_HOST_CTRL_CAP_VS18_MASK)
 /*! @} */
 
 /*! @name WTMK_LVL - Watermark Level */
 /*! @{ */
-#define USDHC_WTMK_LVL_RD_WML_MASK               (0xFFU)
-#define USDHC_WTMK_LVL_RD_WML_SHIFT              (0U)
-#define USDHC_WTMK_LVL_RD_WML(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_WML_SHIFT)) & USDHC_WTMK_LVL_RD_WML_MASK)
-#define USDHC_WTMK_LVL_RD_BRST_LEN_MASK          (0x1F00U)
-#define USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT         (8U)
-#define USDHC_WTMK_LVL_RD_BRST_LEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_RD_BRST_LEN_MASK)
-#define USDHC_WTMK_LVL_WR_WML_MASK               (0xFF0000U)
-#define USDHC_WTMK_LVL_WR_WML_SHIFT              (16U)
-#define USDHC_WTMK_LVL_WR_WML(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_WML_SHIFT)) & USDHC_WTMK_LVL_WR_WML_MASK)
-#define USDHC_WTMK_LVL_WR_BRST_LEN_MASK          (0x1F000000U)
-#define USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT         (24U)
-#define USDHC_WTMK_LVL_WR_BRST_LEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_WR_BRST_LEN_MASK)
+#define USDHC_WTMK_LVL_RD_WML_MASK  (0xFFU)
+#define USDHC_WTMK_LVL_RD_WML_SHIFT (0U)
+#define USDHC_WTMK_LVL_RD_WML(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_WML_SHIFT)) & USDHC_WTMK_LVL_RD_WML_MASK)
+#define USDHC_WTMK_LVL_RD_BRST_LEN_MASK  (0x1F00U)
+#define USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT (8U)
+#define USDHC_WTMK_LVL_RD_BRST_LEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_RD_BRST_LEN_MASK)
+#define USDHC_WTMK_LVL_WR_WML_MASK  (0xFF0000U)
+#define USDHC_WTMK_LVL_WR_WML_SHIFT (16U)
+#define USDHC_WTMK_LVL_WR_WML(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_WML_SHIFT)) & USDHC_WTMK_LVL_WR_WML_MASK)
+#define USDHC_WTMK_LVL_WR_BRST_LEN_MASK  (0x1F000000U)
+#define USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT (24U)
+#define USDHC_WTMK_LVL_WR_BRST_LEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_WR_BRST_LEN_MASK)
 /*! @} */
 
 /*! @name MIX_CTRL - Mixer Control */
 /*! @{ */
-#define USDHC_MIX_CTRL_DMAEN_MASK                (0x1U)
-#define USDHC_MIX_CTRL_DMAEN_SHIFT               (0U)
-#define USDHC_MIX_CTRL_DMAEN(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DMAEN_SHIFT)) & USDHC_MIX_CTRL_DMAEN_MASK)
-#define USDHC_MIX_CTRL_BCEN_MASK                 (0x2U)
-#define USDHC_MIX_CTRL_BCEN_SHIFT                (1U)
-#define USDHC_MIX_CTRL_BCEN(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_BCEN_SHIFT)) & USDHC_MIX_CTRL_BCEN_MASK)
-#define USDHC_MIX_CTRL_AC12EN_MASK               (0x4U)
-#define USDHC_MIX_CTRL_AC12EN_SHIFT              (2U)
-#define USDHC_MIX_CTRL_AC12EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC12EN_SHIFT)) & USDHC_MIX_CTRL_AC12EN_MASK)
-#define USDHC_MIX_CTRL_DDR_EN_MASK               (0x8U)
-#define USDHC_MIX_CTRL_DDR_EN_SHIFT              (3U)
-#define USDHC_MIX_CTRL_DDR_EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DDR_EN_SHIFT)) & USDHC_MIX_CTRL_DDR_EN_MASK)
-#define USDHC_MIX_CTRL_DTDSEL_MASK               (0x10U)
-#define USDHC_MIX_CTRL_DTDSEL_SHIFT              (4U)
-#define USDHC_MIX_CTRL_DTDSEL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DTDSEL_SHIFT)) & USDHC_MIX_CTRL_DTDSEL_MASK)
-#define USDHC_MIX_CTRL_MSBSEL_MASK               (0x20U)
-#define USDHC_MIX_CTRL_MSBSEL_SHIFT              (5U)
-#define USDHC_MIX_CTRL_MSBSEL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_MSBSEL_SHIFT)) & USDHC_MIX_CTRL_MSBSEL_MASK)
-#define USDHC_MIX_CTRL_NIBBLE_POS_MASK           (0x40U)
-#define USDHC_MIX_CTRL_NIBBLE_POS_SHIFT          (6U)
-#define USDHC_MIX_CTRL_NIBBLE_POS(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_NIBBLE_POS_SHIFT)) & USDHC_MIX_CTRL_NIBBLE_POS_MASK)
-#define USDHC_MIX_CTRL_AC23EN_MASK               (0x80U)
-#define USDHC_MIX_CTRL_AC23EN_SHIFT              (7U)
-#define USDHC_MIX_CTRL_AC23EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC23EN_SHIFT)) & USDHC_MIX_CTRL_AC23EN_MASK)
-#define USDHC_MIX_CTRL_EXE_TUNE_MASK             (0x400000U)
-#define USDHC_MIX_CTRL_EXE_TUNE_SHIFT            (22U)
-#define USDHC_MIX_CTRL_EXE_TUNE(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_EXE_TUNE_SHIFT)) & USDHC_MIX_CTRL_EXE_TUNE_MASK)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL_MASK          (0x800000U)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT         (23U)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT)) & USDHC_MIX_CTRL_SMP_CLK_SEL_MASK)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK         (0x1000000U)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT        (24U)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT)) & USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK)
-#define USDHC_MIX_CTRL_FBCLK_SEL_MASK            (0x2000000U)
-#define USDHC_MIX_CTRL_FBCLK_SEL_SHIFT           (25U)
-#define USDHC_MIX_CTRL_FBCLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_FBCLK_SEL_SHIFT)) & USDHC_MIX_CTRL_FBCLK_SEL_MASK)
+#define USDHC_MIX_CTRL_DMAEN_MASK  (0x1U)
+#define USDHC_MIX_CTRL_DMAEN_SHIFT (0U)
+#define USDHC_MIX_CTRL_DMAEN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DMAEN_SHIFT)) & USDHC_MIX_CTRL_DMAEN_MASK)
+#define USDHC_MIX_CTRL_BCEN_MASK    (0x2U)
+#define USDHC_MIX_CTRL_BCEN_SHIFT   (1U)
+#define USDHC_MIX_CTRL_BCEN(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_BCEN_SHIFT)) & USDHC_MIX_CTRL_BCEN_MASK)
+#define USDHC_MIX_CTRL_AC12EN_MASK  (0x4U)
+#define USDHC_MIX_CTRL_AC12EN_SHIFT (2U)
+#define USDHC_MIX_CTRL_AC12EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC12EN_SHIFT)) & USDHC_MIX_CTRL_AC12EN_MASK)
+#define USDHC_MIX_CTRL_DDR_EN_MASK  (0x8U)
+#define USDHC_MIX_CTRL_DDR_EN_SHIFT (3U)
+#define USDHC_MIX_CTRL_DDR_EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DDR_EN_SHIFT)) & USDHC_MIX_CTRL_DDR_EN_MASK)
+#define USDHC_MIX_CTRL_DTDSEL_MASK  (0x10U)
+#define USDHC_MIX_CTRL_DTDSEL_SHIFT (4U)
+#define USDHC_MIX_CTRL_DTDSEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DTDSEL_SHIFT)) & USDHC_MIX_CTRL_DTDSEL_MASK)
+#define USDHC_MIX_CTRL_MSBSEL_MASK  (0x20U)
+#define USDHC_MIX_CTRL_MSBSEL_SHIFT (5U)
+#define USDHC_MIX_CTRL_MSBSEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_MSBSEL_SHIFT)) & USDHC_MIX_CTRL_MSBSEL_MASK)
+#define USDHC_MIX_CTRL_NIBBLE_POS_MASK  (0x40U)
+#define USDHC_MIX_CTRL_NIBBLE_POS_SHIFT (6U)
+#define USDHC_MIX_CTRL_NIBBLE_POS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_NIBBLE_POS_SHIFT)) & USDHC_MIX_CTRL_NIBBLE_POS_MASK)
+#define USDHC_MIX_CTRL_AC23EN_MASK  (0x80U)
+#define USDHC_MIX_CTRL_AC23EN_SHIFT (7U)
+#define USDHC_MIX_CTRL_AC23EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC23EN_SHIFT)) & USDHC_MIX_CTRL_AC23EN_MASK)
+#define USDHC_MIX_CTRL_EXE_TUNE_MASK  (0x400000U)
+#define USDHC_MIX_CTRL_EXE_TUNE_SHIFT (22U)
+#define USDHC_MIX_CTRL_EXE_TUNE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_EXE_TUNE_SHIFT)) & USDHC_MIX_CTRL_EXE_TUNE_MASK)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL_MASK  (0x800000U)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT (23U)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT)) & USDHC_MIX_CTRL_SMP_CLK_SEL_MASK)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK  (0x1000000U)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT (24U)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT)) & USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK)
+#define USDHC_MIX_CTRL_FBCLK_SEL_MASK  (0x2000000U)
+#define USDHC_MIX_CTRL_FBCLK_SEL_SHIFT (25U)
+#define USDHC_MIX_CTRL_FBCLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_FBCLK_SEL_SHIFT)) & USDHC_MIX_CTRL_FBCLK_SEL_MASK)
 /*! @} */
 
 /*! @name FORCE_EVENT - Force Event */
 /*! @{ */
-#define USDHC_FORCE_EVENT_FEVTAC12NE_MASK        (0x1U)
-#define USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT       (0U)
-#define USDHC_FORCE_EVENT_FEVTAC12NE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12NE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE_MASK       (0x2U)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT      (1U)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12TOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12CE_MASK        (0x4U)
-#define USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT       (2U)
-#define USDHC_FORCE_EVENT_FEVTAC12CE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12CE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE_MASK       (0x8U)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT      (3U)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12EBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12IE_MASK        (0x10U)
-#define USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT       (4U)
-#define USDHC_FORCE_EVENT_FEVTAC12IE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12IE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK     (0x80U)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT    (7U)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK)
-#define USDHC_FORCE_EVENT_FEVTCTOE_MASK          (0x10000U)
-#define USDHC_FORCE_EVENT_FEVTCTOE_SHIFT         (16U)
-#define USDHC_FORCE_EVENT_FEVTCTOE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCTOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCCE_MASK           (0x20000U)
-#define USDHC_FORCE_EVENT_FEVTCCE_SHIFT          (17U)
-#define USDHC_FORCE_EVENT_FEVTCCE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCCE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCEBE_MASK          (0x40000U)
-#define USDHC_FORCE_EVENT_FEVTCEBE_SHIFT         (18U)
-#define USDHC_FORCE_EVENT_FEVTCEBE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCEBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCIE_MASK           (0x80000U)
-#define USDHC_FORCE_EVENT_FEVTCIE_SHIFT          (19U)
-#define USDHC_FORCE_EVENT_FEVTCIE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCIE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCIE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDTOE_MASK          (0x100000U)
-#define USDHC_FORCE_EVENT_FEVTDTOE_SHIFT         (20U)
-#define USDHC_FORCE_EVENT_FEVTDTOE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDTOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDCE_MASK           (0x200000U)
-#define USDHC_FORCE_EVENT_FEVTDCE_SHIFT          (21U)
-#define USDHC_FORCE_EVENT_FEVTDCE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDCE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDEBE_MASK          (0x400000U)
-#define USDHC_FORCE_EVENT_FEVTDEBE_SHIFT         (22U)
-#define USDHC_FORCE_EVENT_FEVTDEBE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDEBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12E_MASK         (0x1000000U)
-#define USDHC_FORCE_EVENT_FEVTAC12E_SHIFT        (24U)
-#define USDHC_FORCE_EVENT_FEVTAC12E(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12E_MASK)
-#define USDHC_FORCE_EVENT_FEVTTNE_MASK           (0x4000000U)
-#define USDHC_FORCE_EVENT_FEVTTNE_SHIFT          (26U)
-#define USDHC_FORCE_EVENT_FEVTTNE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTTNE_SHIFT)) & USDHC_FORCE_EVENT_FEVTTNE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDMAE_MASK          (0x10000000U)
-#define USDHC_FORCE_EVENT_FEVTDMAE_SHIFT         (28U)
-#define USDHC_FORCE_EVENT_FEVTDMAE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDMAE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDMAE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCINT_MASK          (0x80000000U)
-#define USDHC_FORCE_EVENT_FEVTCINT_SHIFT         (31U)
-#define USDHC_FORCE_EVENT_FEVTCINT(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCINT_SHIFT)) & USDHC_FORCE_EVENT_FEVTCINT_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12NE_MASK  (0x1U)
+#define USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT (0U)
+#define USDHC_FORCE_EVENT_FEVTAC12NE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12NE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE_MASK  (0x2U)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT (1U)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12TOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12CE_MASK  (0x4U)
+#define USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT (2U)
+#define USDHC_FORCE_EVENT_FEVTAC12CE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12CE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE_MASK  (0x8U)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT (3U)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12EBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12IE_MASK  (0x10U)
+#define USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT (4U)
+#define USDHC_FORCE_EVENT_FEVTAC12IE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12IE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK  (0x80U)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT (7U)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK)
+#define USDHC_FORCE_EVENT_FEVTCTOE_MASK  (0x10000U)
+#define USDHC_FORCE_EVENT_FEVTCTOE_SHIFT (16U)
+#define USDHC_FORCE_EVENT_FEVTCTOE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCTOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCCE_MASK  (0x20000U)
+#define USDHC_FORCE_EVENT_FEVTCCE_SHIFT (17U)
+#define USDHC_FORCE_EVENT_FEVTCCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCCE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCEBE_MASK  (0x40000U)
+#define USDHC_FORCE_EVENT_FEVTCEBE_SHIFT (18U)
+#define USDHC_FORCE_EVENT_FEVTCEBE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCEBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCIE_MASK  (0x80000U)
+#define USDHC_FORCE_EVENT_FEVTCIE_SHIFT (19U)
+#define USDHC_FORCE_EVENT_FEVTCIE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCIE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCIE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDTOE_MASK  (0x100000U)
+#define USDHC_FORCE_EVENT_FEVTDTOE_SHIFT (20U)
+#define USDHC_FORCE_EVENT_FEVTDTOE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDTOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDCE_MASK  (0x200000U)
+#define USDHC_FORCE_EVENT_FEVTDCE_SHIFT (21U)
+#define USDHC_FORCE_EVENT_FEVTDCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDCE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDEBE_MASK  (0x400000U)
+#define USDHC_FORCE_EVENT_FEVTDEBE_SHIFT (22U)
+#define USDHC_FORCE_EVENT_FEVTDEBE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDEBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12E_MASK  (0x1000000U)
+#define USDHC_FORCE_EVENT_FEVTAC12E_SHIFT (24U)
+#define USDHC_FORCE_EVENT_FEVTAC12E(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12E_MASK)
+#define USDHC_FORCE_EVENT_FEVTTNE_MASK  (0x4000000U)
+#define USDHC_FORCE_EVENT_FEVTTNE_SHIFT (26U)
+#define USDHC_FORCE_EVENT_FEVTTNE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTTNE_SHIFT)) & USDHC_FORCE_EVENT_FEVTTNE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDMAE_MASK  (0x10000000U)
+#define USDHC_FORCE_EVENT_FEVTDMAE_SHIFT (28U)
+#define USDHC_FORCE_EVENT_FEVTDMAE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDMAE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDMAE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCINT_MASK  (0x80000000U)
+#define USDHC_FORCE_EVENT_FEVTCINT_SHIFT (31U)
+#define USDHC_FORCE_EVENT_FEVTCINT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCINT_SHIFT)) & USDHC_FORCE_EVENT_FEVTCINT_MASK)
 /*! @} */
 
 /*! @name ADMA_ERR_STATUS - ADMA Error Status Register */
 /*! @{ */
-#define USDHC_ADMA_ERR_STATUS_ADMAES_MASK        (0x3U)
-#define USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT       (0U)
-#define USDHC_ADMA_ERR_STATUS_ADMAES(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMAES_MASK)
-#define USDHC_ADMA_ERR_STATUS_ADMALME_MASK       (0x4U)
-#define USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT      (2U)
-#define USDHC_ADMA_ERR_STATUS_ADMALME(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMALME_MASK)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE_MASK       (0x8U)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT      (3U)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMADCE_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMAES_MASK  (0x3U)
+#define USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT (0U)
+#define USDHC_ADMA_ERR_STATUS_ADMAES(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMAES_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMALME_MASK  (0x4U)
+#define USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT (2U)
+#define USDHC_ADMA_ERR_STATUS_ADMALME(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMALME_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE_MASK  (0x8U)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT (3U)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMADCE_MASK)
 /*! @} */
 
 /*! @name ADMA_SYS_ADDR - ADMA System Address */
 /*! @{ */
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK        (0xFFFFFFFCU)
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT       (2U)
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT)) & USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK  (0xFFFFFFFCU)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT (2U)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT)) & USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK)
 /*! @} */
 
 /*! @name DLL_CTRL - DLL (Delay Line) Control */
 /*! @{ */
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK      (0x1U)
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT     (0U)
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK       (0x2U)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT      (1U)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK (0x4U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK  (0x1U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT (0U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK  (0x2U)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT (1U)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK  (0x4U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT (2U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK (0x78U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT)) &                                    \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK  (0x78U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT (3U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK (0x80U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT)) &                                  \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK  (0x80U)
 #define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT (7U)
-#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE(x)   (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK (0x100U)
+#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT)) &                                      \
+     USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK  (0x100U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT (8U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK (0xFE00U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT)) &                                     \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK  (0xFE00U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT (9U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK (0x70000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT)) &                                 \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK  (0x70000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT (16U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK (0xFF00000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT)) &                                  \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK  (0xFF00000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT (20U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK (0xF0000000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT)) &                                   \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK  (0xF0000000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT (28U)
-#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT)) &                                   \
+     USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK)
 /*! @} */
 
 /*! @name DLL_STATUS - DLL Status */
 /*! @{ */
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK   (0x1U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT  (0U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK   (0x2U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT  (1U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK    (0x1FCU)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT   (2U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK    (0xFE00U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT   (9U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK  (0x1U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT (0U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK  (0x2U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT (1U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK  (0x1FCU)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT (2U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK  (0xFE00U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT (9U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK)
 /*! @} */
 
 /*! @name CLK_TUNE_CTRL_STATUS - CLK Tuning Control and Status */
 /*! @{ */
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK (0xFU)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK  (0xFU)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT (0U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK (0xF0U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT)) &                             \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK  (0xF0U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT (4U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK (0x7F00U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT)) &                              \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK  (0x7F00U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT (8U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT)) &                              \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK)
 #define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK  (0x8000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT (15U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK (0xF0000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT)) &                                       \
+     USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK  (0xF0000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT (16U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK (0xF00000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT)) &                                  \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK  (0xF00000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT (20U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK (0x7F000000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT)) &                                   \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK  (0x7F000000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT (24U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT)) &                                   \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK)
 #define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK  (0x80000000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT (31U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT)) &                                       \
+     USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK)
 /*! @} */
 
 /*! @name VEND_SPEC - Vendor Specific Register */
 /*! @{ */
-#define USDHC_VEND_SPEC_VSELECT_MASK             (0x2U)
-#define USDHC_VEND_SPEC_VSELECT_SHIFT            (1U)
-#define USDHC_VEND_SPEC_VSELECT(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_VSELECT_SHIFT)) & USDHC_VEND_SPEC_VSELECT_MASK)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK     (0x4U)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT    (2U)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT)) & USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK)
+#define USDHC_VEND_SPEC_VSELECT_MASK  (0x2U)
+#define USDHC_VEND_SPEC_VSELECT_SHIFT (1U)
+#define USDHC_VEND_SPEC_VSELECT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_VSELECT_SHIFT)) & USDHC_VEND_SPEC_VSELECT_MASK)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK  (0x4U)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT (2U)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT)) & USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK)
 #define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK  (0x8U)
 #define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT (3U)
-#define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT)) & USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK        (0x100U)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT       (8U)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS_MASK         (0x8000U)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT        (15U)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT)) & USDHC_VEND_SPEC_CRC_CHK_DIS_MASK)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN_MASK         (0x80000000U)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT        (31U)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT)) & USDHC_VEND_SPEC_CMD_BYTE_EN_MASK)
+#define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT)) &                                       \
+     USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK  (0x100U)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT (8U)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS_MASK  (0x8000U)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT (15U)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT)) & USDHC_VEND_SPEC_CRC_CHK_DIS_MASK)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN_MASK  (0x80000000U)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT (31U)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT)) & USDHC_VEND_SPEC_CMD_BYTE_EN_MASK)
 /*! @} */
 
 /*! @name MMC_BOOT - MMC Boot Register */
 /*! @{ */
-#define USDHC_MMC_BOOT_DTOCV_ACK_MASK            (0xFU)
-#define USDHC_MMC_BOOT_DTOCV_ACK_SHIFT           (0U)
-#define USDHC_MMC_BOOT_DTOCV_ACK(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DTOCV_ACK_SHIFT)) & USDHC_MMC_BOOT_DTOCV_ACK_MASK)
-#define USDHC_MMC_BOOT_BOOT_ACK_MASK             (0x10U)
-#define USDHC_MMC_BOOT_BOOT_ACK_SHIFT            (4U)
-#define USDHC_MMC_BOOT_BOOT_ACK(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_ACK_SHIFT)) & USDHC_MMC_BOOT_BOOT_ACK_MASK)
-#define USDHC_MMC_BOOT_BOOT_MODE_MASK            (0x20U)
-#define USDHC_MMC_BOOT_BOOT_MODE_SHIFT           (5U)
-#define USDHC_MMC_BOOT_BOOT_MODE(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_MODE_SHIFT)) & USDHC_MMC_BOOT_BOOT_MODE_MASK)
-#define USDHC_MMC_BOOT_BOOT_EN_MASK              (0x40U)
-#define USDHC_MMC_BOOT_BOOT_EN_SHIFT             (6U)
-#define USDHC_MMC_BOOT_BOOT_EN(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_EN_SHIFT)) & USDHC_MMC_BOOT_BOOT_EN_MASK)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN_MASK         (0x80U)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT        (7U)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT)) & USDHC_MMC_BOOT_AUTO_SABG_EN_MASK)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK     (0x100U)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT    (8U)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT)) & USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK         (0xFFFF0000U)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT        (16U)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT)) & USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK)
+#define USDHC_MMC_BOOT_DTOCV_ACK_MASK  (0xFU)
+#define USDHC_MMC_BOOT_DTOCV_ACK_SHIFT (0U)
+#define USDHC_MMC_BOOT_DTOCV_ACK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DTOCV_ACK_SHIFT)) & USDHC_MMC_BOOT_DTOCV_ACK_MASK)
+#define USDHC_MMC_BOOT_BOOT_ACK_MASK  (0x10U)
+#define USDHC_MMC_BOOT_BOOT_ACK_SHIFT (4U)
+#define USDHC_MMC_BOOT_BOOT_ACK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_ACK_SHIFT)) & USDHC_MMC_BOOT_BOOT_ACK_MASK)
+#define USDHC_MMC_BOOT_BOOT_MODE_MASK  (0x20U)
+#define USDHC_MMC_BOOT_BOOT_MODE_SHIFT (5U)
+#define USDHC_MMC_BOOT_BOOT_MODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_MODE_SHIFT)) & USDHC_MMC_BOOT_BOOT_MODE_MASK)
+#define USDHC_MMC_BOOT_BOOT_EN_MASK  (0x40U)
+#define USDHC_MMC_BOOT_BOOT_EN_SHIFT (6U)
+#define USDHC_MMC_BOOT_BOOT_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_EN_SHIFT)) & USDHC_MMC_BOOT_BOOT_EN_MASK)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN_MASK  (0x80U)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT (7U)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT)) & USDHC_MMC_BOOT_AUTO_SABG_EN_MASK)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK  (0x100U)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT (8U)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT)) & USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK  (0xFFFF0000U)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT (16U)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT)) & USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK)
 /*! @} */
 
 /*! @name VEND_SPEC2 - Vendor Specific 2 Register */
 /*! @{ */
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK   (0x8U)
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT  (3U)
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT)) & USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK     (0x10U)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT    (4U)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK     (0x20U)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT    (5U)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK      (0x40U)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT     (6U)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK    (0x1000U)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT   (12U)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT)) & USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK     (0x2000U)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT    (13U)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT)) & USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK)
-#define USDHC_VEND_SPEC2_BUS_RST_MASK            (0x4000U)
-#define USDHC_VEND_SPEC2_BUS_RST_SHIFT           (14U)
-#define USDHC_VEND_SPEC2_BUS_RST(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_BUS_RST_SHIFT)) & USDHC_VEND_SPEC2_BUS_RST_MASK)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK  (0x8U)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT (3U)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT)) & USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK  (0x10U)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT (4U)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK  (0x20U)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT (5U)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK  (0x40U)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT (6U)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK  (0x1000U)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT (12U)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT)) & USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK  (0x2000U)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT (13U)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT)) & USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK)
+#define USDHC_VEND_SPEC2_BUS_RST_MASK  (0x4000U)
+#define USDHC_VEND_SPEC2_BUS_RST_SHIFT (14U)
+#define USDHC_VEND_SPEC2_BUS_RST(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_BUS_RST_SHIFT)) & USDHC_VEND_SPEC2_BUS_RST_MASK)
 /*! @} */
 
 /*! @name TUNING_CTRL - Tuning Control Register */
 /*! @{ */
 #define USDHC_TUNING_CTRL_TUNING_START_TAP_MASK  (0xFFU)
 #define USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT (0U)
-#define USDHC_TUNING_CTRL_TUNING_START_TAP(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_START_TAP_MASK)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER_MASK    (0xFF00U)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT   (8U)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT)) & USDHC_TUNING_CTRL_TUNING_COUNTER_MASK)
-#define USDHC_TUNING_CTRL_TUNING_STEP_MASK       (0x70000U)
-#define USDHC_TUNING_CTRL_TUNING_STEP_SHIFT      (16U)
-#define USDHC_TUNING_CTRL_TUNING_STEP(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_STEP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_STEP_MASK)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW_MASK     (0x700000U)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT    (20U)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT)) & USDHC_TUNING_CTRL_TUNING_WINDOW_MASK)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN_MASK     (0x1000000U)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT    (24U)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT)) & USDHC_TUNING_CTRL_STD_TUNING_EN_MASK)
+#define USDHC_TUNING_CTRL_TUNING_START_TAP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT)) &                                       \
+     USDHC_TUNING_CTRL_TUNING_START_TAP_MASK)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER_MASK  (0xFF00U)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT (8U)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT)) & USDHC_TUNING_CTRL_TUNING_COUNTER_MASK)
+#define USDHC_TUNING_CTRL_TUNING_STEP_MASK  (0x70000U)
+#define USDHC_TUNING_CTRL_TUNING_STEP_SHIFT (16U)
+#define USDHC_TUNING_CTRL_TUNING_STEP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_STEP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_STEP_MASK)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW_MASK  (0x700000U)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT (20U)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT)) & USDHC_TUNING_CTRL_TUNING_WINDOW_MASK)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN_MASK  (0x1000000U)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT (24U)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT)) & USDHC_TUNING_CTRL_STD_TUNING_EN_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USDHC_Register_Masks */
 
-
 /* USDHC - Peripheral instance base addresses */
 /** Peripheral USDHC1 base address */
-#define USDHC1_BASE                              (0x402C0000u)
+#define USDHC1_BASE (0x402C0000u)
 /** Peripheral USDHC1 base pointer */
-#define USDHC1                                   ((USDHC_Type *)USDHC1_BASE)
+#define USDHC1 ((USDHC_Type *)USDHC1_BASE)
 /** Peripheral USDHC2 base address */
-#define USDHC2_BASE                              (0x402C4000u)
+#define USDHC2_BASE (0x402C4000u)
 /** Peripheral USDHC2 base pointer */
-#define USDHC2                                   ((USDHC_Type *)USDHC2_BASE)
+#define USDHC2 ((USDHC_Type *)USDHC2_BASE)
 /** Array initializer of USDHC peripheral base addresses */
-#define USDHC_BASE_ADDRS                         { 0u, USDHC1_BASE, USDHC2_BASE }
+#define USDHC_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, USDHC1_BASE, USDHC2_BASE                                                                                   \
+    }
 /** Array initializer of USDHC peripheral base pointers */
-#define USDHC_BASE_PTRS                          { (USDHC_Type *)0u, USDHC1, USDHC2 }
+#define USDHC_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (USDHC_Type *)0u, USDHC1, USDHC2                                                                               \
+    }
 /** Interrupt vectors for the USDHC peripheral type */
-#define USDHC_IRQS                               { NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn }
+#define USDHC_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group USDHC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- WDOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -25463,12 +29171,13 @@ typedef struct {
  */
 
 /** WDOG - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t WCR;                               /**< Watchdog Control Register, offset: 0x0 */
-  __IO uint16_t WSR;                               /**< Watchdog Service Register, offset: 0x2 */
-  __I  uint16_t WRSR;                              /**< Watchdog Reset Status Register, offset: 0x4 */
-  __IO uint16_t WICR;                              /**< Watchdog Interrupt Control Register, offset: 0x6 */
-  __IO uint16_t WMCR;                              /**< Watchdog Miscellaneous Control Register, offset: 0x8 */
+typedef struct
+{
+    __IO uint16_t WCR;  /**< Watchdog Control Register, offset: 0x0 */
+    __IO uint16_t WSR;  /**< Watchdog Service Register, offset: 0x2 */
+    __I uint16_t WRSR;  /**< Watchdog Reset Status Register, offset: 0x4 */
+    __IO uint16_t WICR; /**< Watchdog Interrupt Control Register, offset: 0x6 */
+    __IO uint16_t WMCR; /**< Watchdog Miscellaneous Control Register, offset: 0x8 */
 } WDOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -25482,102 +29191,108 @@ typedef struct {
 
 /*! @name WCR - Watchdog Control Register */
 /*! @{ */
-#define WDOG_WCR_WDZST_MASK                      (0x1U)
-#define WDOG_WCR_WDZST_SHIFT                     (0U)
-#define WDOG_WCR_WDZST(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDZST_SHIFT)) & WDOG_WCR_WDZST_MASK)
-#define WDOG_WCR_WDBG_MASK                       (0x2U)
-#define WDOG_WCR_WDBG_SHIFT                      (1U)
-#define WDOG_WCR_WDBG(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDBG_SHIFT)) & WDOG_WCR_WDBG_MASK)
-#define WDOG_WCR_WDE_MASK                        (0x4U)
-#define WDOG_WCR_WDE_SHIFT                       (2U)
-#define WDOG_WCR_WDE(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDE_SHIFT)) & WDOG_WCR_WDE_MASK)
-#define WDOG_WCR_WDT_MASK                        (0x8U)
-#define WDOG_WCR_WDT_SHIFT                       (3U)
-#define WDOG_WCR_WDT(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDT_SHIFT)) & WDOG_WCR_WDT_MASK)
-#define WDOG_WCR_SRS_MASK                        (0x10U)
-#define WDOG_WCR_SRS_SHIFT                       (4U)
-#define WDOG_WCR_SRS(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRS_SHIFT)) & WDOG_WCR_SRS_MASK)
-#define WDOG_WCR_WDA_MASK                        (0x20U)
-#define WDOG_WCR_WDA_SHIFT                       (5U)
-#define WDOG_WCR_WDA(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDA_SHIFT)) & WDOG_WCR_WDA_MASK)
-#define WDOG_WCR_SRE_MASK                        (0x40U)
-#define WDOG_WCR_SRE_SHIFT                       (6U)
-#define WDOG_WCR_SRE(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRE_SHIFT)) & WDOG_WCR_SRE_MASK)
-#define WDOG_WCR_WDW_MASK                        (0x80U)
-#define WDOG_WCR_WDW_SHIFT                       (7U)
-#define WDOG_WCR_WDW(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDW_SHIFT)) & WDOG_WCR_WDW_MASK)
-#define WDOG_WCR_WT_MASK                         (0xFF00U)
-#define WDOG_WCR_WT_SHIFT                        (8U)
-#define WDOG_WCR_WT(x)                           (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WT_SHIFT)) & WDOG_WCR_WT_MASK)
+#define WDOG_WCR_WDZST_MASK  (0x1U)
+#define WDOG_WCR_WDZST_SHIFT (0U)
+#define WDOG_WCR_WDZST(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDZST_SHIFT)) & WDOG_WCR_WDZST_MASK)
+#define WDOG_WCR_WDBG_MASK   (0x2U)
+#define WDOG_WCR_WDBG_SHIFT  (1U)
+#define WDOG_WCR_WDBG(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDBG_SHIFT)) & WDOG_WCR_WDBG_MASK)
+#define WDOG_WCR_WDE_MASK    (0x4U)
+#define WDOG_WCR_WDE_SHIFT   (2U)
+#define WDOG_WCR_WDE(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDE_SHIFT)) & WDOG_WCR_WDE_MASK)
+#define WDOG_WCR_WDT_MASK    (0x8U)
+#define WDOG_WCR_WDT_SHIFT   (3U)
+#define WDOG_WCR_WDT(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDT_SHIFT)) & WDOG_WCR_WDT_MASK)
+#define WDOG_WCR_SRS_MASK    (0x10U)
+#define WDOG_WCR_SRS_SHIFT   (4U)
+#define WDOG_WCR_SRS(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRS_SHIFT)) & WDOG_WCR_SRS_MASK)
+#define WDOG_WCR_WDA_MASK    (0x20U)
+#define WDOG_WCR_WDA_SHIFT   (5U)
+#define WDOG_WCR_WDA(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDA_SHIFT)) & WDOG_WCR_WDA_MASK)
+#define WDOG_WCR_SRE_MASK    (0x40U)
+#define WDOG_WCR_SRE_SHIFT   (6U)
+#define WDOG_WCR_SRE(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRE_SHIFT)) & WDOG_WCR_SRE_MASK)
+#define WDOG_WCR_WDW_MASK    (0x80U)
+#define WDOG_WCR_WDW_SHIFT   (7U)
+#define WDOG_WCR_WDW(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDW_SHIFT)) & WDOG_WCR_WDW_MASK)
+#define WDOG_WCR_WT_MASK     (0xFF00U)
+#define WDOG_WCR_WT_SHIFT    (8U)
+#define WDOG_WCR_WT(x)       (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WT_SHIFT)) & WDOG_WCR_WT_MASK)
 /*! @} */
 
 /*! @name WSR - Watchdog Service Register */
 /*! @{ */
-#define WDOG_WSR_WSR_MASK                        (0xFFFFU)
-#define WDOG_WSR_WSR_SHIFT                       (0U)
-#define WDOG_WSR_WSR(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WSR_WSR_SHIFT)) & WDOG_WSR_WSR_MASK)
+#define WDOG_WSR_WSR_MASK  (0xFFFFU)
+#define WDOG_WSR_WSR_SHIFT (0U)
+#define WDOG_WSR_WSR(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WSR_WSR_SHIFT)) & WDOG_WSR_WSR_MASK)
 /*! @} */
 
 /*! @name WRSR - Watchdog Reset Status Register */
 /*! @{ */
-#define WDOG_WRSR_SFTW_MASK                      (0x1U)
-#define WDOG_WRSR_SFTW_SHIFT                     (0U)
-#define WDOG_WRSR_SFTW(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_SFTW_SHIFT)) & WDOG_WRSR_SFTW_MASK)
-#define WDOG_WRSR_TOUT_MASK                      (0x2U)
-#define WDOG_WRSR_TOUT_SHIFT                     (1U)
-#define WDOG_WRSR_TOUT(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_TOUT_SHIFT)) & WDOG_WRSR_TOUT_MASK)
-#define WDOG_WRSR_POR_MASK                       (0x10U)
-#define WDOG_WRSR_POR_SHIFT                      (4U)
-#define WDOG_WRSR_POR(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_POR_SHIFT)) & WDOG_WRSR_POR_MASK)
+#define WDOG_WRSR_SFTW_MASK  (0x1U)
+#define WDOG_WRSR_SFTW_SHIFT (0U)
+#define WDOG_WRSR_SFTW(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_SFTW_SHIFT)) & WDOG_WRSR_SFTW_MASK)
+#define WDOG_WRSR_TOUT_MASK  (0x2U)
+#define WDOG_WRSR_TOUT_SHIFT (1U)
+#define WDOG_WRSR_TOUT(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_TOUT_SHIFT)) & WDOG_WRSR_TOUT_MASK)
+#define WDOG_WRSR_POR_MASK   (0x10U)
+#define WDOG_WRSR_POR_SHIFT  (4U)
+#define WDOG_WRSR_POR(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_POR_SHIFT)) & WDOG_WRSR_POR_MASK)
 /*! @} */
 
 /*! @name WICR - Watchdog Interrupt Control Register */
 /*! @{ */
-#define WDOG_WICR_WICT_MASK                      (0xFFU)
-#define WDOG_WICR_WICT_SHIFT                     (0U)
-#define WDOG_WICR_WICT(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WICT_SHIFT)) & WDOG_WICR_WICT_MASK)
-#define WDOG_WICR_WTIS_MASK                      (0x4000U)
-#define WDOG_WICR_WTIS_SHIFT                     (14U)
-#define WDOG_WICR_WTIS(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WTIS_SHIFT)) & WDOG_WICR_WTIS_MASK)
-#define WDOG_WICR_WIE_MASK                       (0x8000U)
-#define WDOG_WICR_WIE_SHIFT                      (15U)
-#define WDOG_WICR_WIE(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WIE_SHIFT)) & WDOG_WICR_WIE_MASK)
+#define WDOG_WICR_WICT_MASK  (0xFFU)
+#define WDOG_WICR_WICT_SHIFT (0U)
+#define WDOG_WICR_WICT(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WICT_SHIFT)) & WDOG_WICR_WICT_MASK)
+#define WDOG_WICR_WTIS_MASK  (0x4000U)
+#define WDOG_WICR_WTIS_SHIFT (14U)
+#define WDOG_WICR_WTIS(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WTIS_SHIFT)) & WDOG_WICR_WTIS_MASK)
+#define WDOG_WICR_WIE_MASK   (0x8000U)
+#define WDOG_WICR_WIE_SHIFT  (15U)
+#define WDOG_WICR_WIE(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WIE_SHIFT)) & WDOG_WICR_WIE_MASK)
 /*! @} */
 
 /*! @name WMCR - Watchdog Miscellaneous Control Register */
 /*! @{ */
-#define WDOG_WMCR_PDE_MASK                       (0x1U)
-#define WDOG_WMCR_PDE_SHIFT                      (0U)
-#define WDOG_WMCR_PDE(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WMCR_PDE_SHIFT)) & WDOG_WMCR_PDE_MASK)
+#define WDOG_WMCR_PDE_MASK  (0x1U)
+#define WDOG_WMCR_PDE_SHIFT (0U)
+#define WDOG_WMCR_PDE(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WMCR_PDE_SHIFT)) & WDOG_WMCR_PDE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group WDOG_Register_Masks */
 
-
 /* WDOG - Peripheral instance base addresses */
 /** Peripheral WDOG1 base address */
-#define WDOG1_BASE                               (0x400B8000u)
+#define WDOG1_BASE (0x400B8000u)
 /** Peripheral WDOG1 base pointer */
-#define WDOG1                                    ((WDOG_Type *)WDOG1_BASE)
+#define WDOG1 ((WDOG_Type *)WDOG1_BASE)
 /** Peripheral WDOG2 base address */
-#define WDOG2_BASE                               (0x400D0000u)
+#define WDOG2_BASE (0x400D0000u)
 /** Peripheral WDOG2 base pointer */
-#define WDOG2                                    ((WDOG_Type *)WDOG2_BASE)
+#define WDOG2 ((WDOG_Type *)WDOG2_BASE)
 /** Array initializer of WDOG peripheral base addresses */
-#define WDOG_BASE_ADDRS                          { 0u, WDOG1_BASE, WDOG2_BASE }
+#define WDOG_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        0u, WDOG1_BASE, WDOG2_BASE                                                                                     \
+    }
 /** Array initializer of WDOG peripheral base pointers */
-#define WDOG_BASE_PTRS                           { (WDOG_Type *)0u, WDOG1, WDOG2 }
+#define WDOG_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        (WDOG_Type *)0u, WDOG1, WDOG2                                                                                  \
+    }
 /** Interrupt vectors for the WDOG peripheral type */
-#define WDOG_IRQS                                { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
+#define WDOG_IRQS                                                                                                      \
+    {                                                                                                                  \
+        NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn                                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group WDOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XBARA Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -25588,75 +29303,76 @@ typedef struct {
  */
 
 /** XBARA - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t SEL0;                              /**< Crossbar A Select Register 0, offset: 0x0 */
-  __IO uint16_t SEL1;                              /**< Crossbar A Select Register 1, offset: 0x2 */
-  __IO uint16_t SEL2;                              /**< Crossbar A Select Register 2, offset: 0x4 */
-  __IO uint16_t SEL3;                              /**< Crossbar A Select Register 3, offset: 0x6 */
-  __IO uint16_t SEL4;                              /**< Crossbar A Select Register 4, offset: 0x8 */
-  __IO uint16_t SEL5;                              /**< Crossbar A Select Register 5, offset: 0xA */
-  __IO uint16_t SEL6;                              /**< Crossbar A Select Register 6, offset: 0xC */
-  __IO uint16_t SEL7;                              /**< Crossbar A Select Register 7, offset: 0xE */
-  __IO uint16_t SEL8;                              /**< Crossbar A Select Register 8, offset: 0x10 */
-  __IO uint16_t SEL9;                              /**< Crossbar A Select Register 9, offset: 0x12 */
-  __IO uint16_t SEL10;                             /**< Crossbar A Select Register 10, offset: 0x14 */
-  __IO uint16_t SEL11;                             /**< Crossbar A Select Register 11, offset: 0x16 */
-  __IO uint16_t SEL12;                             /**< Crossbar A Select Register 12, offset: 0x18 */
-  __IO uint16_t SEL13;                             /**< Crossbar A Select Register 13, offset: 0x1A */
-  __IO uint16_t SEL14;                             /**< Crossbar A Select Register 14, offset: 0x1C */
-  __IO uint16_t SEL15;                             /**< Crossbar A Select Register 15, offset: 0x1E */
-  __IO uint16_t SEL16;                             /**< Crossbar A Select Register 16, offset: 0x20 */
-  __IO uint16_t SEL17;                             /**< Crossbar A Select Register 17, offset: 0x22 */
-  __IO uint16_t SEL18;                             /**< Crossbar A Select Register 18, offset: 0x24 */
-  __IO uint16_t SEL19;                             /**< Crossbar A Select Register 19, offset: 0x26 */
-  __IO uint16_t SEL20;                             /**< Crossbar A Select Register 20, offset: 0x28 */
-  __IO uint16_t SEL21;                             /**< Crossbar A Select Register 21, offset: 0x2A */
-  __IO uint16_t SEL22;                             /**< Crossbar A Select Register 22, offset: 0x2C */
-  __IO uint16_t SEL23;                             /**< Crossbar A Select Register 23, offset: 0x2E */
-  __IO uint16_t SEL24;                             /**< Crossbar A Select Register 24, offset: 0x30 */
-  __IO uint16_t SEL25;                             /**< Crossbar A Select Register 25, offset: 0x32 */
-  __IO uint16_t SEL26;                             /**< Crossbar A Select Register 26, offset: 0x34 */
-  __IO uint16_t SEL27;                             /**< Crossbar A Select Register 27, offset: 0x36 */
-  __IO uint16_t SEL28;                             /**< Crossbar A Select Register 28, offset: 0x38 */
-  __IO uint16_t SEL29;                             /**< Crossbar A Select Register 29, offset: 0x3A */
-  __IO uint16_t SEL30;                             /**< Crossbar A Select Register 30, offset: 0x3C */
-  __IO uint16_t SEL31;                             /**< Crossbar A Select Register 31, offset: 0x3E */
-  __IO uint16_t SEL32;                             /**< Crossbar A Select Register 32, offset: 0x40 */
-  __IO uint16_t SEL33;                             /**< Crossbar A Select Register 33, offset: 0x42 */
-  __IO uint16_t SEL34;                             /**< Crossbar A Select Register 34, offset: 0x44 */
-  __IO uint16_t SEL35;                             /**< Crossbar A Select Register 35, offset: 0x46 */
-  __IO uint16_t SEL36;                             /**< Crossbar A Select Register 36, offset: 0x48 */
-  __IO uint16_t SEL37;                             /**< Crossbar A Select Register 37, offset: 0x4A */
-  __IO uint16_t SEL38;                             /**< Crossbar A Select Register 38, offset: 0x4C */
-  __IO uint16_t SEL39;                             /**< Crossbar A Select Register 39, offset: 0x4E */
-  __IO uint16_t SEL40;                             /**< Crossbar A Select Register 40, offset: 0x50 */
-  __IO uint16_t SEL41;                             /**< Crossbar A Select Register 41, offset: 0x52 */
-  __IO uint16_t SEL42;                             /**< Crossbar A Select Register 42, offset: 0x54 */
-  __IO uint16_t SEL43;                             /**< Crossbar A Select Register 43, offset: 0x56 */
-  __IO uint16_t SEL44;                             /**< Crossbar A Select Register 44, offset: 0x58 */
-  __IO uint16_t SEL45;                             /**< Crossbar A Select Register 45, offset: 0x5A */
-  __IO uint16_t SEL46;                             /**< Crossbar A Select Register 46, offset: 0x5C */
-  __IO uint16_t SEL47;                             /**< Crossbar A Select Register 47, offset: 0x5E */
-  __IO uint16_t SEL48;                             /**< Crossbar A Select Register 48, offset: 0x60 */
-  __IO uint16_t SEL49;                             /**< Crossbar A Select Register 49, offset: 0x62 */
-  __IO uint16_t SEL50;                             /**< Crossbar A Select Register 50, offset: 0x64 */
-  __IO uint16_t SEL51;                             /**< Crossbar A Select Register 51, offset: 0x66 */
-  __IO uint16_t SEL52;                             /**< Crossbar A Select Register 52, offset: 0x68 */
-  __IO uint16_t SEL53;                             /**< Crossbar A Select Register 53, offset: 0x6A */
-  __IO uint16_t SEL54;                             /**< Crossbar A Select Register 54, offset: 0x6C */
-  __IO uint16_t SEL55;                             /**< Crossbar A Select Register 55, offset: 0x6E */
-  __IO uint16_t SEL56;                             /**< Crossbar A Select Register 56, offset: 0x70 */
-  __IO uint16_t SEL57;                             /**< Crossbar A Select Register 57, offset: 0x72 */
-  __IO uint16_t SEL58;                             /**< Crossbar A Select Register 58, offset: 0x74 */
-  __IO uint16_t SEL59;                             /**< Crossbar A Select Register 59, offset: 0x76 */
-  __IO uint16_t SEL60;                             /**< Crossbar A Select Register 60, offset: 0x78 */
-  __IO uint16_t SEL61;                             /**< Crossbar A Select Register 61, offset: 0x7A */
-  __IO uint16_t SEL62;                             /**< Crossbar A Select Register 62, offset: 0x7C */
-  __IO uint16_t SEL63;                             /**< Crossbar A Select Register 63, offset: 0x7E */
-  __IO uint16_t SEL64;                             /**< Crossbar A Select Register 64, offset: 0x80 */
-  __IO uint16_t SEL65;                             /**< Crossbar A Select Register 65, offset: 0x82 */
-  __IO uint16_t CTRL0;                             /**< Crossbar A Control Register 0, offset: 0x84 */
-  __IO uint16_t CTRL1;                             /**< Crossbar A Control Register 1, offset: 0x86 */
+typedef struct
+{
+    __IO uint16_t SEL0;  /**< Crossbar A Select Register 0, offset: 0x0 */
+    __IO uint16_t SEL1;  /**< Crossbar A Select Register 1, offset: 0x2 */
+    __IO uint16_t SEL2;  /**< Crossbar A Select Register 2, offset: 0x4 */
+    __IO uint16_t SEL3;  /**< Crossbar A Select Register 3, offset: 0x6 */
+    __IO uint16_t SEL4;  /**< Crossbar A Select Register 4, offset: 0x8 */
+    __IO uint16_t SEL5;  /**< Crossbar A Select Register 5, offset: 0xA */
+    __IO uint16_t SEL6;  /**< Crossbar A Select Register 6, offset: 0xC */
+    __IO uint16_t SEL7;  /**< Crossbar A Select Register 7, offset: 0xE */
+    __IO uint16_t SEL8;  /**< Crossbar A Select Register 8, offset: 0x10 */
+    __IO uint16_t SEL9;  /**< Crossbar A Select Register 9, offset: 0x12 */
+    __IO uint16_t SEL10; /**< Crossbar A Select Register 10, offset: 0x14 */
+    __IO uint16_t SEL11; /**< Crossbar A Select Register 11, offset: 0x16 */
+    __IO uint16_t SEL12; /**< Crossbar A Select Register 12, offset: 0x18 */
+    __IO uint16_t SEL13; /**< Crossbar A Select Register 13, offset: 0x1A */
+    __IO uint16_t SEL14; /**< Crossbar A Select Register 14, offset: 0x1C */
+    __IO uint16_t SEL15; /**< Crossbar A Select Register 15, offset: 0x1E */
+    __IO uint16_t SEL16; /**< Crossbar A Select Register 16, offset: 0x20 */
+    __IO uint16_t SEL17; /**< Crossbar A Select Register 17, offset: 0x22 */
+    __IO uint16_t SEL18; /**< Crossbar A Select Register 18, offset: 0x24 */
+    __IO uint16_t SEL19; /**< Crossbar A Select Register 19, offset: 0x26 */
+    __IO uint16_t SEL20; /**< Crossbar A Select Register 20, offset: 0x28 */
+    __IO uint16_t SEL21; /**< Crossbar A Select Register 21, offset: 0x2A */
+    __IO uint16_t SEL22; /**< Crossbar A Select Register 22, offset: 0x2C */
+    __IO uint16_t SEL23; /**< Crossbar A Select Register 23, offset: 0x2E */
+    __IO uint16_t SEL24; /**< Crossbar A Select Register 24, offset: 0x30 */
+    __IO uint16_t SEL25; /**< Crossbar A Select Register 25, offset: 0x32 */
+    __IO uint16_t SEL26; /**< Crossbar A Select Register 26, offset: 0x34 */
+    __IO uint16_t SEL27; /**< Crossbar A Select Register 27, offset: 0x36 */
+    __IO uint16_t SEL28; /**< Crossbar A Select Register 28, offset: 0x38 */
+    __IO uint16_t SEL29; /**< Crossbar A Select Register 29, offset: 0x3A */
+    __IO uint16_t SEL30; /**< Crossbar A Select Register 30, offset: 0x3C */
+    __IO uint16_t SEL31; /**< Crossbar A Select Register 31, offset: 0x3E */
+    __IO uint16_t SEL32; /**< Crossbar A Select Register 32, offset: 0x40 */
+    __IO uint16_t SEL33; /**< Crossbar A Select Register 33, offset: 0x42 */
+    __IO uint16_t SEL34; /**< Crossbar A Select Register 34, offset: 0x44 */
+    __IO uint16_t SEL35; /**< Crossbar A Select Register 35, offset: 0x46 */
+    __IO uint16_t SEL36; /**< Crossbar A Select Register 36, offset: 0x48 */
+    __IO uint16_t SEL37; /**< Crossbar A Select Register 37, offset: 0x4A */
+    __IO uint16_t SEL38; /**< Crossbar A Select Register 38, offset: 0x4C */
+    __IO uint16_t SEL39; /**< Crossbar A Select Register 39, offset: 0x4E */
+    __IO uint16_t SEL40; /**< Crossbar A Select Register 40, offset: 0x50 */
+    __IO uint16_t SEL41; /**< Crossbar A Select Register 41, offset: 0x52 */
+    __IO uint16_t SEL42; /**< Crossbar A Select Register 42, offset: 0x54 */
+    __IO uint16_t SEL43; /**< Crossbar A Select Register 43, offset: 0x56 */
+    __IO uint16_t SEL44; /**< Crossbar A Select Register 44, offset: 0x58 */
+    __IO uint16_t SEL45; /**< Crossbar A Select Register 45, offset: 0x5A */
+    __IO uint16_t SEL46; /**< Crossbar A Select Register 46, offset: 0x5C */
+    __IO uint16_t SEL47; /**< Crossbar A Select Register 47, offset: 0x5E */
+    __IO uint16_t SEL48; /**< Crossbar A Select Register 48, offset: 0x60 */
+    __IO uint16_t SEL49; /**< Crossbar A Select Register 49, offset: 0x62 */
+    __IO uint16_t SEL50; /**< Crossbar A Select Register 50, offset: 0x64 */
+    __IO uint16_t SEL51; /**< Crossbar A Select Register 51, offset: 0x66 */
+    __IO uint16_t SEL52; /**< Crossbar A Select Register 52, offset: 0x68 */
+    __IO uint16_t SEL53; /**< Crossbar A Select Register 53, offset: 0x6A */
+    __IO uint16_t SEL54; /**< Crossbar A Select Register 54, offset: 0x6C */
+    __IO uint16_t SEL55; /**< Crossbar A Select Register 55, offset: 0x6E */
+    __IO uint16_t SEL56; /**< Crossbar A Select Register 56, offset: 0x70 */
+    __IO uint16_t SEL57; /**< Crossbar A Select Register 57, offset: 0x72 */
+    __IO uint16_t SEL58; /**< Crossbar A Select Register 58, offset: 0x74 */
+    __IO uint16_t SEL59; /**< Crossbar A Select Register 59, offset: 0x76 */
+    __IO uint16_t SEL60; /**< Crossbar A Select Register 60, offset: 0x78 */
+    __IO uint16_t SEL61; /**< Crossbar A Select Register 61, offset: 0x7A */
+    __IO uint16_t SEL62; /**< Crossbar A Select Register 62, offset: 0x7C */
+    __IO uint16_t SEL63; /**< Crossbar A Select Register 63, offset: 0x7E */
+    __IO uint16_t SEL64; /**< Crossbar A Select Register 64, offset: 0x80 */
+    __IO uint16_t SEL65; /**< Crossbar A Select Register 65, offset: 0x82 */
+    __IO uint16_t CTRL0; /**< Crossbar A Control Register 0, offset: 0x84 */
+    __IO uint16_t CTRL1; /**< Crossbar A Control Register 1, offset: 0x86 */
 } XBARA_Type;
 
 /* ----------------------------------------------------------------------------
@@ -25670,741 +29386,744 @@ typedef struct {
 
 /*! @name SEL0 - Crossbar A Select Register 0 */
 /*! @{ */
-#define XBARA_SEL0_SEL0_MASK                     (0x7FU)
-#define XBARA_SEL0_SEL0_SHIFT                    (0U)
-#define XBARA_SEL0_SEL0(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL0_SHIFT)) & XBARA_SEL0_SEL0_MASK)
-#define XBARA_SEL0_SEL1_MASK                     (0x7F00U)
-#define XBARA_SEL0_SEL1_SHIFT                    (8U)
-#define XBARA_SEL0_SEL1(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL1_SHIFT)) & XBARA_SEL0_SEL1_MASK)
+#define XBARA_SEL0_SEL0_MASK  (0x7FU)
+#define XBARA_SEL0_SEL0_SHIFT (0U)
+#define XBARA_SEL0_SEL0(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL0_SHIFT)) & XBARA_SEL0_SEL0_MASK)
+#define XBARA_SEL0_SEL1_MASK  (0x7F00U)
+#define XBARA_SEL0_SEL1_SHIFT (8U)
+#define XBARA_SEL0_SEL1(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL1_SHIFT)) & XBARA_SEL0_SEL1_MASK)
 /*! @} */
 
 /*! @name SEL1 - Crossbar A Select Register 1 */
 /*! @{ */
-#define XBARA_SEL1_SEL2_MASK                     (0x7FU)
-#define XBARA_SEL1_SEL2_SHIFT                    (0U)
-#define XBARA_SEL1_SEL2(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL2_SHIFT)) & XBARA_SEL1_SEL2_MASK)
-#define XBARA_SEL1_SEL3_MASK                     (0x7F00U)
-#define XBARA_SEL1_SEL3_SHIFT                    (8U)
-#define XBARA_SEL1_SEL3(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL3_SHIFT)) & XBARA_SEL1_SEL3_MASK)
+#define XBARA_SEL1_SEL2_MASK  (0x7FU)
+#define XBARA_SEL1_SEL2_SHIFT (0U)
+#define XBARA_SEL1_SEL2(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL2_SHIFT)) & XBARA_SEL1_SEL2_MASK)
+#define XBARA_SEL1_SEL3_MASK  (0x7F00U)
+#define XBARA_SEL1_SEL3_SHIFT (8U)
+#define XBARA_SEL1_SEL3(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL3_SHIFT)) & XBARA_SEL1_SEL3_MASK)
 /*! @} */
 
 /*! @name SEL2 - Crossbar A Select Register 2 */
 /*! @{ */
-#define XBARA_SEL2_SEL4_MASK                     (0x7FU)
-#define XBARA_SEL2_SEL4_SHIFT                    (0U)
-#define XBARA_SEL2_SEL4(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL4_SHIFT)) & XBARA_SEL2_SEL4_MASK)
-#define XBARA_SEL2_SEL5_MASK                     (0x7F00U)
-#define XBARA_SEL2_SEL5_SHIFT                    (8U)
-#define XBARA_SEL2_SEL5(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL5_SHIFT)) & XBARA_SEL2_SEL5_MASK)
+#define XBARA_SEL2_SEL4_MASK  (0x7FU)
+#define XBARA_SEL2_SEL4_SHIFT (0U)
+#define XBARA_SEL2_SEL4(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL4_SHIFT)) & XBARA_SEL2_SEL4_MASK)
+#define XBARA_SEL2_SEL5_MASK  (0x7F00U)
+#define XBARA_SEL2_SEL5_SHIFT (8U)
+#define XBARA_SEL2_SEL5(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL5_SHIFT)) & XBARA_SEL2_SEL5_MASK)
 /*! @} */
 
 /*! @name SEL3 - Crossbar A Select Register 3 */
 /*! @{ */
-#define XBARA_SEL3_SEL6_MASK                     (0x7FU)
-#define XBARA_SEL3_SEL6_SHIFT                    (0U)
-#define XBARA_SEL3_SEL6(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL6_SHIFT)) & XBARA_SEL3_SEL6_MASK)
-#define XBARA_SEL3_SEL7_MASK                     (0x7F00U)
-#define XBARA_SEL3_SEL7_SHIFT                    (8U)
-#define XBARA_SEL3_SEL7(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL7_SHIFT)) & XBARA_SEL3_SEL7_MASK)
+#define XBARA_SEL3_SEL6_MASK  (0x7FU)
+#define XBARA_SEL3_SEL6_SHIFT (0U)
+#define XBARA_SEL3_SEL6(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL6_SHIFT)) & XBARA_SEL3_SEL6_MASK)
+#define XBARA_SEL3_SEL7_MASK  (0x7F00U)
+#define XBARA_SEL3_SEL7_SHIFT (8U)
+#define XBARA_SEL3_SEL7(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL7_SHIFT)) & XBARA_SEL3_SEL7_MASK)
 /*! @} */
 
 /*! @name SEL4 - Crossbar A Select Register 4 */
 /*! @{ */
-#define XBARA_SEL4_SEL8_MASK                     (0x7FU)
-#define XBARA_SEL4_SEL8_SHIFT                    (0U)
-#define XBARA_SEL4_SEL8(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL8_SHIFT)) & XBARA_SEL4_SEL8_MASK)
-#define XBARA_SEL4_SEL9_MASK                     (0x7F00U)
-#define XBARA_SEL4_SEL9_SHIFT                    (8U)
-#define XBARA_SEL4_SEL9(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL9_SHIFT)) & XBARA_SEL4_SEL9_MASK)
+#define XBARA_SEL4_SEL8_MASK  (0x7FU)
+#define XBARA_SEL4_SEL8_SHIFT (0U)
+#define XBARA_SEL4_SEL8(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL8_SHIFT)) & XBARA_SEL4_SEL8_MASK)
+#define XBARA_SEL4_SEL9_MASK  (0x7F00U)
+#define XBARA_SEL4_SEL9_SHIFT (8U)
+#define XBARA_SEL4_SEL9(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL9_SHIFT)) & XBARA_SEL4_SEL9_MASK)
 /*! @} */
 
 /*! @name SEL5 - Crossbar A Select Register 5 */
 /*! @{ */
-#define XBARA_SEL5_SEL10_MASK                    (0x7FU)
-#define XBARA_SEL5_SEL10_SHIFT                   (0U)
-#define XBARA_SEL5_SEL10(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL10_SHIFT)) & XBARA_SEL5_SEL10_MASK)
-#define XBARA_SEL5_SEL11_MASK                    (0x7F00U)
-#define XBARA_SEL5_SEL11_SHIFT                   (8U)
-#define XBARA_SEL5_SEL11(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL11_SHIFT)) & XBARA_SEL5_SEL11_MASK)
+#define XBARA_SEL5_SEL10_MASK  (0x7FU)
+#define XBARA_SEL5_SEL10_SHIFT (0U)
+#define XBARA_SEL5_SEL10(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL10_SHIFT)) & XBARA_SEL5_SEL10_MASK)
+#define XBARA_SEL5_SEL11_MASK  (0x7F00U)
+#define XBARA_SEL5_SEL11_SHIFT (8U)
+#define XBARA_SEL5_SEL11(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL11_SHIFT)) & XBARA_SEL5_SEL11_MASK)
 /*! @} */
 
 /*! @name SEL6 - Crossbar A Select Register 6 */
 /*! @{ */
-#define XBARA_SEL6_SEL12_MASK                    (0x7FU)
-#define XBARA_SEL6_SEL12_SHIFT                   (0U)
-#define XBARA_SEL6_SEL12(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL12_SHIFT)) & XBARA_SEL6_SEL12_MASK)
-#define XBARA_SEL6_SEL13_MASK                    (0x7F00U)
-#define XBARA_SEL6_SEL13_SHIFT                   (8U)
-#define XBARA_SEL6_SEL13(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL13_SHIFT)) & XBARA_SEL6_SEL13_MASK)
+#define XBARA_SEL6_SEL12_MASK  (0x7FU)
+#define XBARA_SEL6_SEL12_SHIFT (0U)
+#define XBARA_SEL6_SEL12(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL12_SHIFT)) & XBARA_SEL6_SEL12_MASK)
+#define XBARA_SEL6_SEL13_MASK  (0x7F00U)
+#define XBARA_SEL6_SEL13_SHIFT (8U)
+#define XBARA_SEL6_SEL13(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL13_SHIFT)) & XBARA_SEL6_SEL13_MASK)
 /*! @} */
 
 /*! @name SEL7 - Crossbar A Select Register 7 */
 /*! @{ */
-#define XBARA_SEL7_SEL14_MASK                    (0x7FU)
-#define XBARA_SEL7_SEL14_SHIFT                   (0U)
-#define XBARA_SEL7_SEL14(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL14_SHIFT)) & XBARA_SEL7_SEL14_MASK)
-#define XBARA_SEL7_SEL15_MASK                    (0x7F00U)
-#define XBARA_SEL7_SEL15_SHIFT                   (8U)
-#define XBARA_SEL7_SEL15(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL15_SHIFT)) & XBARA_SEL7_SEL15_MASK)
+#define XBARA_SEL7_SEL14_MASK  (0x7FU)
+#define XBARA_SEL7_SEL14_SHIFT (0U)
+#define XBARA_SEL7_SEL14(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL14_SHIFT)) & XBARA_SEL7_SEL14_MASK)
+#define XBARA_SEL7_SEL15_MASK  (0x7F00U)
+#define XBARA_SEL7_SEL15_SHIFT (8U)
+#define XBARA_SEL7_SEL15(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL15_SHIFT)) & XBARA_SEL7_SEL15_MASK)
 /*! @} */
 
 /*! @name SEL8 - Crossbar A Select Register 8 */
 /*! @{ */
-#define XBARA_SEL8_SEL16_MASK                    (0x7FU)
-#define XBARA_SEL8_SEL16_SHIFT                   (0U)
-#define XBARA_SEL8_SEL16(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL16_SHIFT)) & XBARA_SEL8_SEL16_MASK)
-#define XBARA_SEL8_SEL17_MASK                    (0x7F00U)
-#define XBARA_SEL8_SEL17_SHIFT                   (8U)
-#define XBARA_SEL8_SEL17(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL17_SHIFT)) & XBARA_SEL8_SEL17_MASK)
+#define XBARA_SEL8_SEL16_MASK  (0x7FU)
+#define XBARA_SEL8_SEL16_SHIFT (0U)
+#define XBARA_SEL8_SEL16(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL16_SHIFT)) & XBARA_SEL8_SEL16_MASK)
+#define XBARA_SEL8_SEL17_MASK  (0x7F00U)
+#define XBARA_SEL8_SEL17_SHIFT (8U)
+#define XBARA_SEL8_SEL17(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL17_SHIFT)) & XBARA_SEL8_SEL17_MASK)
 /*! @} */
 
 /*! @name SEL9 - Crossbar A Select Register 9 */
 /*! @{ */
-#define XBARA_SEL9_SEL18_MASK                    (0x7FU)
-#define XBARA_SEL9_SEL18_SHIFT                   (0U)
-#define XBARA_SEL9_SEL18(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL18_SHIFT)) & XBARA_SEL9_SEL18_MASK)
-#define XBARA_SEL9_SEL19_MASK                    (0x7F00U)
-#define XBARA_SEL9_SEL19_SHIFT                   (8U)
-#define XBARA_SEL9_SEL19(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL19_SHIFT)) & XBARA_SEL9_SEL19_MASK)
+#define XBARA_SEL9_SEL18_MASK  (0x7FU)
+#define XBARA_SEL9_SEL18_SHIFT (0U)
+#define XBARA_SEL9_SEL18(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL18_SHIFT)) & XBARA_SEL9_SEL18_MASK)
+#define XBARA_SEL9_SEL19_MASK  (0x7F00U)
+#define XBARA_SEL9_SEL19_SHIFT (8U)
+#define XBARA_SEL9_SEL19(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL19_SHIFT)) & XBARA_SEL9_SEL19_MASK)
 /*! @} */
 
 /*! @name SEL10 - Crossbar A Select Register 10 */
 /*! @{ */
-#define XBARA_SEL10_SEL20_MASK                   (0x7FU)
-#define XBARA_SEL10_SEL20_SHIFT                  (0U)
-#define XBARA_SEL10_SEL20(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL20_SHIFT)) & XBARA_SEL10_SEL20_MASK)
-#define XBARA_SEL10_SEL21_MASK                   (0x7F00U)
-#define XBARA_SEL10_SEL21_SHIFT                  (8U)
-#define XBARA_SEL10_SEL21(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL21_SHIFT)) & XBARA_SEL10_SEL21_MASK)
+#define XBARA_SEL10_SEL20_MASK  (0x7FU)
+#define XBARA_SEL10_SEL20_SHIFT (0U)
+#define XBARA_SEL10_SEL20(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL20_SHIFT)) & XBARA_SEL10_SEL20_MASK)
+#define XBARA_SEL10_SEL21_MASK  (0x7F00U)
+#define XBARA_SEL10_SEL21_SHIFT (8U)
+#define XBARA_SEL10_SEL21(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL21_SHIFT)) & XBARA_SEL10_SEL21_MASK)
 /*! @} */
 
 /*! @name SEL11 - Crossbar A Select Register 11 */
 /*! @{ */
-#define XBARA_SEL11_SEL22_MASK                   (0x7FU)
-#define XBARA_SEL11_SEL22_SHIFT                  (0U)
-#define XBARA_SEL11_SEL22(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL22_SHIFT)) & XBARA_SEL11_SEL22_MASK)
-#define XBARA_SEL11_SEL23_MASK                   (0x7F00U)
-#define XBARA_SEL11_SEL23_SHIFT                  (8U)
-#define XBARA_SEL11_SEL23(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL23_SHIFT)) & XBARA_SEL11_SEL23_MASK)
+#define XBARA_SEL11_SEL22_MASK  (0x7FU)
+#define XBARA_SEL11_SEL22_SHIFT (0U)
+#define XBARA_SEL11_SEL22(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL22_SHIFT)) & XBARA_SEL11_SEL22_MASK)
+#define XBARA_SEL11_SEL23_MASK  (0x7F00U)
+#define XBARA_SEL11_SEL23_SHIFT (8U)
+#define XBARA_SEL11_SEL23(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL23_SHIFT)) & XBARA_SEL11_SEL23_MASK)
 /*! @} */
 
 /*! @name SEL12 - Crossbar A Select Register 12 */
 /*! @{ */
-#define XBARA_SEL12_SEL24_MASK                   (0x7FU)
-#define XBARA_SEL12_SEL24_SHIFT                  (0U)
-#define XBARA_SEL12_SEL24(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL24_SHIFT)) & XBARA_SEL12_SEL24_MASK)
-#define XBARA_SEL12_SEL25_MASK                   (0x7F00U)
-#define XBARA_SEL12_SEL25_SHIFT                  (8U)
-#define XBARA_SEL12_SEL25(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL25_SHIFT)) & XBARA_SEL12_SEL25_MASK)
+#define XBARA_SEL12_SEL24_MASK  (0x7FU)
+#define XBARA_SEL12_SEL24_SHIFT (0U)
+#define XBARA_SEL12_SEL24(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL24_SHIFT)) & XBARA_SEL12_SEL24_MASK)
+#define XBARA_SEL12_SEL25_MASK  (0x7F00U)
+#define XBARA_SEL12_SEL25_SHIFT (8U)
+#define XBARA_SEL12_SEL25(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL25_SHIFT)) & XBARA_SEL12_SEL25_MASK)
 /*! @} */
 
 /*! @name SEL13 - Crossbar A Select Register 13 */
 /*! @{ */
-#define XBARA_SEL13_SEL26_MASK                   (0x7FU)
-#define XBARA_SEL13_SEL26_SHIFT                  (0U)
-#define XBARA_SEL13_SEL26(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL26_SHIFT)) & XBARA_SEL13_SEL26_MASK)
-#define XBARA_SEL13_SEL27_MASK                   (0x7F00U)
-#define XBARA_SEL13_SEL27_SHIFT                  (8U)
-#define XBARA_SEL13_SEL27(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL27_SHIFT)) & XBARA_SEL13_SEL27_MASK)
+#define XBARA_SEL13_SEL26_MASK  (0x7FU)
+#define XBARA_SEL13_SEL26_SHIFT (0U)
+#define XBARA_SEL13_SEL26(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL26_SHIFT)) & XBARA_SEL13_SEL26_MASK)
+#define XBARA_SEL13_SEL27_MASK  (0x7F00U)
+#define XBARA_SEL13_SEL27_SHIFT (8U)
+#define XBARA_SEL13_SEL27(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL27_SHIFT)) & XBARA_SEL13_SEL27_MASK)
 /*! @} */
 
 /*! @name SEL14 - Crossbar A Select Register 14 */
 /*! @{ */
-#define XBARA_SEL14_SEL28_MASK                   (0x7FU)
-#define XBARA_SEL14_SEL28_SHIFT                  (0U)
-#define XBARA_SEL14_SEL28(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL28_SHIFT)) & XBARA_SEL14_SEL28_MASK)
-#define XBARA_SEL14_SEL29_MASK                   (0x7F00U)
-#define XBARA_SEL14_SEL29_SHIFT                  (8U)
-#define XBARA_SEL14_SEL29(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL29_SHIFT)) & XBARA_SEL14_SEL29_MASK)
+#define XBARA_SEL14_SEL28_MASK  (0x7FU)
+#define XBARA_SEL14_SEL28_SHIFT (0U)
+#define XBARA_SEL14_SEL28(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL28_SHIFT)) & XBARA_SEL14_SEL28_MASK)
+#define XBARA_SEL14_SEL29_MASK  (0x7F00U)
+#define XBARA_SEL14_SEL29_SHIFT (8U)
+#define XBARA_SEL14_SEL29(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL29_SHIFT)) & XBARA_SEL14_SEL29_MASK)
 /*! @} */
 
 /*! @name SEL15 - Crossbar A Select Register 15 */
 /*! @{ */
-#define XBARA_SEL15_SEL30_MASK                   (0x7FU)
-#define XBARA_SEL15_SEL30_SHIFT                  (0U)
-#define XBARA_SEL15_SEL30(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL30_SHIFT)) & XBARA_SEL15_SEL30_MASK)
-#define XBARA_SEL15_SEL31_MASK                   (0x7F00U)
-#define XBARA_SEL15_SEL31_SHIFT                  (8U)
-#define XBARA_SEL15_SEL31(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL31_SHIFT)) & XBARA_SEL15_SEL31_MASK)
+#define XBARA_SEL15_SEL30_MASK  (0x7FU)
+#define XBARA_SEL15_SEL30_SHIFT (0U)
+#define XBARA_SEL15_SEL30(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL30_SHIFT)) & XBARA_SEL15_SEL30_MASK)
+#define XBARA_SEL15_SEL31_MASK  (0x7F00U)
+#define XBARA_SEL15_SEL31_SHIFT (8U)
+#define XBARA_SEL15_SEL31(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL31_SHIFT)) & XBARA_SEL15_SEL31_MASK)
 /*! @} */
 
 /*! @name SEL16 - Crossbar A Select Register 16 */
 /*! @{ */
-#define XBARA_SEL16_SEL32_MASK                   (0x7FU)
-#define XBARA_SEL16_SEL32_SHIFT                  (0U)
-#define XBARA_SEL16_SEL32(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL32_SHIFT)) & XBARA_SEL16_SEL32_MASK)
-#define XBARA_SEL16_SEL33_MASK                   (0x7F00U)
-#define XBARA_SEL16_SEL33_SHIFT                  (8U)
-#define XBARA_SEL16_SEL33(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL33_SHIFT)) & XBARA_SEL16_SEL33_MASK)
+#define XBARA_SEL16_SEL32_MASK  (0x7FU)
+#define XBARA_SEL16_SEL32_SHIFT (0U)
+#define XBARA_SEL16_SEL32(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL32_SHIFT)) & XBARA_SEL16_SEL32_MASK)
+#define XBARA_SEL16_SEL33_MASK  (0x7F00U)
+#define XBARA_SEL16_SEL33_SHIFT (8U)
+#define XBARA_SEL16_SEL33(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL33_SHIFT)) & XBARA_SEL16_SEL33_MASK)
 /*! @} */
 
 /*! @name SEL17 - Crossbar A Select Register 17 */
 /*! @{ */
-#define XBARA_SEL17_SEL34_MASK                   (0x7FU)
-#define XBARA_SEL17_SEL34_SHIFT                  (0U)
-#define XBARA_SEL17_SEL34(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL34_SHIFT)) & XBARA_SEL17_SEL34_MASK)
-#define XBARA_SEL17_SEL35_MASK                   (0x7F00U)
-#define XBARA_SEL17_SEL35_SHIFT                  (8U)
-#define XBARA_SEL17_SEL35(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL35_SHIFT)) & XBARA_SEL17_SEL35_MASK)
+#define XBARA_SEL17_SEL34_MASK  (0x7FU)
+#define XBARA_SEL17_SEL34_SHIFT (0U)
+#define XBARA_SEL17_SEL34(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL34_SHIFT)) & XBARA_SEL17_SEL34_MASK)
+#define XBARA_SEL17_SEL35_MASK  (0x7F00U)
+#define XBARA_SEL17_SEL35_SHIFT (8U)
+#define XBARA_SEL17_SEL35(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL35_SHIFT)) & XBARA_SEL17_SEL35_MASK)
 /*! @} */
 
 /*! @name SEL18 - Crossbar A Select Register 18 */
 /*! @{ */
-#define XBARA_SEL18_SEL36_MASK                   (0x7FU)
-#define XBARA_SEL18_SEL36_SHIFT                  (0U)
-#define XBARA_SEL18_SEL36(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL36_SHIFT)) & XBARA_SEL18_SEL36_MASK)
-#define XBARA_SEL18_SEL37_MASK                   (0x7F00U)
-#define XBARA_SEL18_SEL37_SHIFT                  (8U)
-#define XBARA_SEL18_SEL37(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL37_SHIFT)) & XBARA_SEL18_SEL37_MASK)
+#define XBARA_SEL18_SEL36_MASK  (0x7FU)
+#define XBARA_SEL18_SEL36_SHIFT (0U)
+#define XBARA_SEL18_SEL36(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL36_SHIFT)) & XBARA_SEL18_SEL36_MASK)
+#define XBARA_SEL18_SEL37_MASK  (0x7F00U)
+#define XBARA_SEL18_SEL37_SHIFT (8U)
+#define XBARA_SEL18_SEL37(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL37_SHIFT)) & XBARA_SEL18_SEL37_MASK)
 /*! @} */
 
 /*! @name SEL19 - Crossbar A Select Register 19 */
 /*! @{ */
-#define XBARA_SEL19_SEL38_MASK                   (0x7FU)
-#define XBARA_SEL19_SEL38_SHIFT                  (0U)
-#define XBARA_SEL19_SEL38(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL38_SHIFT)) & XBARA_SEL19_SEL38_MASK)
-#define XBARA_SEL19_SEL39_MASK                   (0x7F00U)
-#define XBARA_SEL19_SEL39_SHIFT                  (8U)
-#define XBARA_SEL19_SEL39(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL39_SHIFT)) & XBARA_SEL19_SEL39_MASK)
+#define XBARA_SEL19_SEL38_MASK  (0x7FU)
+#define XBARA_SEL19_SEL38_SHIFT (0U)
+#define XBARA_SEL19_SEL38(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL38_SHIFT)) & XBARA_SEL19_SEL38_MASK)
+#define XBARA_SEL19_SEL39_MASK  (0x7F00U)
+#define XBARA_SEL19_SEL39_SHIFT (8U)
+#define XBARA_SEL19_SEL39(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL39_SHIFT)) & XBARA_SEL19_SEL39_MASK)
 /*! @} */
 
 /*! @name SEL20 - Crossbar A Select Register 20 */
 /*! @{ */
-#define XBARA_SEL20_SEL40_MASK                   (0x7FU)
-#define XBARA_SEL20_SEL40_SHIFT                  (0U)
-#define XBARA_SEL20_SEL40(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL40_SHIFT)) & XBARA_SEL20_SEL40_MASK)
-#define XBARA_SEL20_SEL41_MASK                   (0x7F00U)
-#define XBARA_SEL20_SEL41_SHIFT                  (8U)
-#define XBARA_SEL20_SEL41(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL41_SHIFT)) & XBARA_SEL20_SEL41_MASK)
+#define XBARA_SEL20_SEL40_MASK  (0x7FU)
+#define XBARA_SEL20_SEL40_SHIFT (0U)
+#define XBARA_SEL20_SEL40(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL40_SHIFT)) & XBARA_SEL20_SEL40_MASK)
+#define XBARA_SEL20_SEL41_MASK  (0x7F00U)
+#define XBARA_SEL20_SEL41_SHIFT (8U)
+#define XBARA_SEL20_SEL41(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL41_SHIFT)) & XBARA_SEL20_SEL41_MASK)
 /*! @} */
 
 /*! @name SEL21 - Crossbar A Select Register 21 */
 /*! @{ */
-#define XBARA_SEL21_SEL42_MASK                   (0x7FU)
-#define XBARA_SEL21_SEL42_SHIFT                  (0U)
-#define XBARA_SEL21_SEL42(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL42_SHIFT)) & XBARA_SEL21_SEL42_MASK)
-#define XBARA_SEL21_SEL43_MASK                   (0x7F00U)
-#define XBARA_SEL21_SEL43_SHIFT                  (8U)
-#define XBARA_SEL21_SEL43(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL43_SHIFT)) & XBARA_SEL21_SEL43_MASK)
+#define XBARA_SEL21_SEL42_MASK  (0x7FU)
+#define XBARA_SEL21_SEL42_SHIFT (0U)
+#define XBARA_SEL21_SEL42(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL42_SHIFT)) & XBARA_SEL21_SEL42_MASK)
+#define XBARA_SEL21_SEL43_MASK  (0x7F00U)
+#define XBARA_SEL21_SEL43_SHIFT (8U)
+#define XBARA_SEL21_SEL43(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL43_SHIFT)) & XBARA_SEL21_SEL43_MASK)
 /*! @} */
 
 /*! @name SEL22 - Crossbar A Select Register 22 */
 /*! @{ */
-#define XBARA_SEL22_SEL44_MASK                   (0x7FU)
-#define XBARA_SEL22_SEL44_SHIFT                  (0U)
-#define XBARA_SEL22_SEL44(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL44_SHIFT)) & XBARA_SEL22_SEL44_MASK)
-#define XBARA_SEL22_SEL45_MASK                   (0x7F00U)
-#define XBARA_SEL22_SEL45_SHIFT                  (8U)
-#define XBARA_SEL22_SEL45(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL45_SHIFT)) & XBARA_SEL22_SEL45_MASK)
+#define XBARA_SEL22_SEL44_MASK  (0x7FU)
+#define XBARA_SEL22_SEL44_SHIFT (0U)
+#define XBARA_SEL22_SEL44(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL44_SHIFT)) & XBARA_SEL22_SEL44_MASK)
+#define XBARA_SEL22_SEL45_MASK  (0x7F00U)
+#define XBARA_SEL22_SEL45_SHIFT (8U)
+#define XBARA_SEL22_SEL45(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL45_SHIFT)) & XBARA_SEL22_SEL45_MASK)
 /*! @} */
 
 /*! @name SEL23 - Crossbar A Select Register 23 */
 /*! @{ */
-#define XBARA_SEL23_SEL46_MASK                   (0x7FU)
-#define XBARA_SEL23_SEL46_SHIFT                  (0U)
-#define XBARA_SEL23_SEL46(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL46_SHIFT)) & XBARA_SEL23_SEL46_MASK)
-#define XBARA_SEL23_SEL47_MASK                   (0x7F00U)
-#define XBARA_SEL23_SEL47_SHIFT                  (8U)
-#define XBARA_SEL23_SEL47(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL47_SHIFT)) & XBARA_SEL23_SEL47_MASK)
+#define XBARA_SEL23_SEL46_MASK  (0x7FU)
+#define XBARA_SEL23_SEL46_SHIFT (0U)
+#define XBARA_SEL23_SEL46(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL46_SHIFT)) & XBARA_SEL23_SEL46_MASK)
+#define XBARA_SEL23_SEL47_MASK  (0x7F00U)
+#define XBARA_SEL23_SEL47_SHIFT (8U)
+#define XBARA_SEL23_SEL47(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL47_SHIFT)) & XBARA_SEL23_SEL47_MASK)
 /*! @} */
 
 /*! @name SEL24 - Crossbar A Select Register 24 */
 /*! @{ */
-#define XBARA_SEL24_SEL48_MASK                   (0x7FU)
-#define XBARA_SEL24_SEL48_SHIFT                  (0U)
-#define XBARA_SEL24_SEL48(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL48_SHIFT)) & XBARA_SEL24_SEL48_MASK)
-#define XBARA_SEL24_SEL49_MASK                   (0x7F00U)
-#define XBARA_SEL24_SEL49_SHIFT                  (8U)
-#define XBARA_SEL24_SEL49(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL49_SHIFT)) & XBARA_SEL24_SEL49_MASK)
+#define XBARA_SEL24_SEL48_MASK  (0x7FU)
+#define XBARA_SEL24_SEL48_SHIFT (0U)
+#define XBARA_SEL24_SEL48(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL48_SHIFT)) & XBARA_SEL24_SEL48_MASK)
+#define XBARA_SEL24_SEL49_MASK  (0x7F00U)
+#define XBARA_SEL24_SEL49_SHIFT (8U)
+#define XBARA_SEL24_SEL49(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL49_SHIFT)) & XBARA_SEL24_SEL49_MASK)
 /*! @} */
 
 /*! @name SEL25 - Crossbar A Select Register 25 */
 /*! @{ */
-#define XBARA_SEL25_SEL50_MASK                   (0x7FU)
-#define XBARA_SEL25_SEL50_SHIFT                  (0U)
-#define XBARA_SEL25_SEL50(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL50_SHIFT)) & XBARA_SEL25_SEL50_MASK)
-#define XBARA_SEL25_SEL51_MASK                   (0x7F00U)
-#define XBARA_SEL25_SEL51_SHIFT                  (8U)
-#define XBARA_SEL25_SEL51(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL51_SHIFT)) & XBARA_SEL25_SEL51_MASK)
+#define XBARA_SEL25_SEL50_MASK  (0x7FU)
+#define XBARA_SEL25_SEL50_SHIFT (0U)
+#define XBARA_SEL25_SEL50(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL50_SHIFT)) & XBARA_SEL25_SEL50_MASK)
+#define XBARA_SEL25_SEL51_MASK  (0x7F00U)
+#define XBARA_SEL25_SEL51_SHIFT (8U)
+#define XBARA_SEL25_SEL51(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL51_SHIFT)) & XBARA_SEL25_SEL51_MASK)
 /*! @} */
 
 /*! @name SEL26 - Crossbar A Select Register 26 */
 /*! @{ */
-#define XBARA_SEL26_SEL52_MASK                   (0x7FU)
-#define XBARA_SEL26_SEL52_SHIFT                  (0U)
-#define XBARA_SEL26_SEL52(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL52_SHIFT)) & XBARA_SEL26_SEL52_MASK)
-#define XBARA_SEL26_SEL53_MASK                   (0x7F00U)
-#define XBARA_SEL26_SEL53_SHIFT                  (8U)
-#define XBARA_SEL26_SEL53(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL53_SHIFT)) & XBARA_SEL26_SEL53_MASK)
+#define XBARA_SEL26_SEL52_MASK  (0x7FU)
+#define XBARA_SEL26_SEL52_SHIFT (0U)
+#define XBARA_SEL26_SEL52(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL52_SHIFT)) & XBARA_SEL26_SEL52_MASK)
+#define XBARA_SEL26_SEL53_MASK  (0x7F00U)
+#define XBARA_SEL26_SEL53_SHIFT (8U)
+#define XBARA_SEL26_SEL53(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL53_SHIFT)) & XBARA_SEL26_SEL53_MASK)
 /*! @} */
 
 /*! @name SEL27 - Crossbar A Select Register 27 */
 /*! @{ */
-#define XBARA_SEL27_SEL54_MASK                   (0x7FU)
-#define XBARA_SEL27_SEL54_SHIFT                  (0U)
-#define XBARA_SEL27_SEL54(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL54_SHIFT)) & XBARA_SEL27_SEL54_MASK)
-#define XBARA_SEL27_SEL55_MASK                   (0x7F00U)
-#define XBARA_SEL27_SEL55_SHIFT                  (8U)
-#define XBARA_SEL27_SEL55(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL55_SHIFT)) & XBARA_SEL27_SEL55_MASK)
+#define XBARA_SEL27_SEL54_MASK  (0x7FU)
+#define XBARA_SEL27_SEL54_SHIFT (0U)
+#define XBARA_SEL27_SEL54(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL54_SHIFT)) & XBARA_SEL27_SEL54_MASK)
+#define XBARA_SEL27_SEL55_MASK  (0x7F00U)
+#define XBARA_SEL27_SEL55_SHIFT (8U)
+#define XBARA_SEL27_SEL55(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL55_SHIFT)) & XBARA_SEL27_SEL55_MASK)
 /*! @} */
 
 /*! @name SEL28 - Crossbar A Select Register 28 */
 /*! @{ */
-#define XBARA_SEL28_SEL56_MASK                   (0x7FU)
-#define XBARA_SEL28_SEL56_SHIFT                  (0U)
-#define XBARA_SEL28_SEL56(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL56_SHIFT)) & XBARA_SEL28_SEL56_MASK)
-#define XBARA_SEL28_SEL57_MASK                   (0x7F00U)
-#define XBARA_SEL28_SEL57_SHIFT                  (8U)
-#define XBARA_SEL28_SEL57(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL57_SHIFT)) & XBARA_SEL28_SEL57_MASK)
+#define XBARA_SEL28_SEL56_MASK  (0x7FU)
+#define XBARA_SEL28_SEL56_SHIFT (0U)
+#define XBARA_SEL28_SEL56(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL56_SHIFT)) & XBARA_SEL28_SEL56_MASK)
+#define XBARA_SEL28_SEL57_MASK  (0x7F00U)
+#define XBARA_SEL28_SEL57_SHIFT (8U)
+#define XBARA_SEL28_SEL57(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL57_SHIFT)) & XBARA_SEL28_SEL57_MASK)
 /*! @} */
 
 /*! @name SEL29 - Crossbar A Select Register 29 */
 /*! @{ */
-#define XBARA_SEL29_SEL58_MASK                   (0x7FU)
-#define XBARA_SEL29_SEL58_SHIFT                  (0U)
-#define XBARA_SEL29_SEL58(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL58_SHIFT)) & XBARA_SEL29_SEL58_MASK)
-#define XBARA_SEL29_SEL59_MASK                   (0x7F00U)
-#define XBARA_SEL29_SEL59_SHIFT                  (8U)
-#define XBARA_SEL29_SEL59(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL59_SHIFT)) & XBARA_SEL29_SEL59_MASK)
+#define XBARA_SEL29_SEL58_MASK  (0x7FU)
+#define XBARA_SEL29_SEL58_SHIFT (0U)
+#define XBARA_SEL29_SEL58(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL58_SHIFT)) & XBARA_SEL29_SEL58_MASK)
+#define XBARA_SEL29_SEL59_MASK  (0x7F00U)
+#define XBARA_SEL29_SEL59_SHIFT (8U)
+#define XBARA_SEL29_SEL59(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL59_SHIFT)) & XBARA_SEL29_SEL59_MASK)
 /*! @} */
 
 /*! @name SEL30 - Crossbar A Select Register 30 */
 /*! @{ */
-#define XBARA_SEL30_SEL60_MASK                   (0x7FU)
-#define XBARA_SEL30_SEL60_SHIFT                  (0U)
-#define XBARA_SEL30_SEL60(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL60_SHIFT)) & XBARA_SEL30_SEL60_MASK)
-#define XBARA_SEL30_SEL61_MASK                   (0x7F00U)
-#define XBARA_SEL30_SEL61_SHIFT                  (8U)
-#define XBARA_SEL30_SEL61(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL61_SHIFT)) & XBARA_SEL30_SEL61_MASK)
+#define XBARA_SEL30_SEL60_MASK  (0x7FU)
+#define XBARA_SEL30_SEL60_SHIFT (0U)
+#define XBARA_SEL30_SEL60(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL60_SHIFT)) & XBARA_SEL30_SEL60_MASK)
+#define XBARA_SEL30_SEL61_MASK  (0x7F00U)
+#define XBARA_SEL30_SEL61_SHIFT (8U)
+#define XBARA_SEL30_SEL61(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL61_SHIFT)) & XBARA_SEL30_SEL61_MASK)
 /*! @} */
 
 /*! @name SEL31 - Crossbar A Select Register 31 */
 /*! @{ */
-#define XBARA_SEL31_SEL62_MASK                   (0x7FU)
-#define XBARA_SEL31_SEL62_SHIFT                  (0U)
-#define XBARA_SEL31_SEL62(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL62_SHIFT)) & XBARA_SEL31_SEL62_MASK)
-#define XBARA_SEL31_SEL63_MASK                   (0x7F00U)
-#define XBARA_SEL31_SEL63_SHIFT                  (8U)
-#define XBARA_SEL31_SEL63(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL63_SHIFT)) & XBARA_SEL31_SEL63_MASK)
+#define XBARA_SEL31_SEL62_MASK  (0x7FU)
+#define XBARA_SEL31_SEL62_SHIFT (0U)
+#define XBARA_SEL31_SEL62(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL62_SHIFT)) & XBARA_SEL31_SEL62_MASK)
+#define XBARA_SEL31_SEL63_MASK  (0x7F00U)
+#define XBARA_SEL31_SEL63_SHIFT (8U)
+#define XBARA_SEL31_SEL63(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL63_SHIFT)) & XBARA_SEL31_SEL63_MASK)
 /*! @} */
 
 /*! @name SEL32 - Crossbar A Select Register 32 */
 /*! @{ */
-#define XBARA_SEL32_SEL64_MASK                   (0x7FU)
-#define XBARA_SEL32_SEL64_SHIFT                  (0U)
-#define XBARA_SEL32_SEL64(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL64_SHIFT)) & XBARA_SEL32_SEL64_MASK)
-#define XBARA_SEL32_SEL65_MASK                   (0x7F00U)
-#define XBARA_SEL32_SEL65_SHIFT                  (8U)
-#define XBARA_SEL32_SEL65(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL65_SHIFT)) & XBARA_SEL32_SEL65_MASK)
+#define XBARA_SEL32_SEL64_MASK  (0x7FU)
+#define XBARA_SEL32_SEL64_SHIFT (0U)
+#define XBARA_SEL32_SEL64(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL64_SHIFT)) & XBARA_SEL32_SEL64_MASK)
+#define XBARA_SEL32_SEL65_MASK  (0x7F00U)
+#define XBARA_SEL32_SEL65_SHIFT (8U)
+#define XBARA_SEL32_SEL65(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL65_SHIFT)) & XBARA_SEL32_SEL65_MASK)
 /*! @} */
 
 /*! @name SEL33 - Crossbar A Select Register 33 */
 /*! @{ */
-#define XBARA_SEL33_SEL66_MASK                   (0x7FU)
-#define XBARA_SEL33_SEL66_SHIFT                  (0U)
-#define XBARA_SEL33_SEL66(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL66_SHIFT)) & XBARA_SEL33_SEL66_MASK)
-#define XBARA_SEL33_SEL67_MASK                   (0x7F00U)
-#define XBARA_SEL33_SEL67_SHIFT                  (8U)
-#define XBARA_SEL33_SEL67(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL67_SHIFT)) & XBARA_SEL33_SEL67_MASK)
+#define XBARA_SEL33_SEL66_MASK  (0x7FU)
+#define XBARA_SEL33_SEL66_SHIFT (0U)
+#define XBARA_SEL33_SEL66(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL66_SHIFT)) & XBARA_SEL33_SEL66_MASK)
+#define XBARA_SEL33_SEL67_MASK  (0x7F00U)
+#define XBARA_SEL33_SEL67_SHIFT (8U)
+#define XBARA_SEL33_SEL67(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL67_SHIFT)) & XBARA_SEL33_SEL67_MASK)
 /*! @} */
 
 /*! @name SEL34 - Crossbar A Select Register 34 */
 /*! @{ */
-#define XBARA_SEL34_SEL68_MASK                   (0x7FU)
-#define XBARA_SEL34_SEL68_SHIFT                  (0U)
-#define XBARA_SEL34_SEL68(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL68_SHIFT)) & XBARA_SEL34_SEL68_MASK)
-#define XBARA_SEL34_SEL69_MASK                   (0x7F00U)
-#define XBARA_SEL34_SEL69_SHIFT                  (8U)
-#define XBARA_SEL34_SEL69(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL69_SHIFT)) & XBARA_SEL34_SEL69_MASK)
+#define XBARA_SEL34_SEL68_MASK  (0x7FU)
+#define XBARA_SEL34_SEL68_SHIFT (0U)
+#define XBARA_SEL34_SEL68(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL68_SHIFT)) & XBARA_SEL34_SEL68_MASK)
+#define XBARA_SEL34_SEL69_MASK  (0x7F00U)
+#define XBARA_SEL34_SEL69_SHIFT (8U)
+#define XBARA_SEL34_SEL69(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL69_SHIFT)) & XBARA_SEL34_SEL69_MASK)
 /*! @} */
 
 /*! @name SEL35 - Crossbar A Select Register 35 */
 /*! @{ */
-#define XBARA_SEL35_SEL70_MASK                   (0x7FU)
-#define XBARA_SEL35_SEL70_SHIFT                  (0U)
-#define XBARA_SEL35_SEL70(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL70_SHIFT)) & XBARA_SEL35_SEL70_MASK)
-#define XBARA_SEL35_SEL71_MASK                   (0x7F00U)
-#define XBARA_SEL35_SEL71_SHIFT                  (8U)
-#define XBARA_SEL35_SEL71(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL71_SHIFT)) & XBARA_SEL35_SEL71_MASK)
+#define XBARA_SEL35_SEL70_MASK  (0x7FU)
+#define XBARA_SEL35_SEL70_SHIFT (0U)
+#define XBARA_SEL35_SEL70(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL70_SHIFT)) & XBARA_SEL35_SEL70_MASK)
+#define XBARA_SEL35_SEL71_MASK  (0x7F00U)
+#define XBARA_SEL35_SEL71_SHIFT (8U)
+#define XBARA_SEL35_SEL71(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL71_SHIFT)) & XBARA_SEL35_SEL71_MASK)
 /*! @} */
 
 /*! @name SEL36 - Crossbar A Select Register 36 */
 /*! @{ */
-#define XBARA_SEL36_SEL72_MASK                   (0x7FU)
-#define XBARA_SEL36_SEL72_SHIFT                  (0U)
-#define XBARA_SEL36_SEL72(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL72_SHIFT)) & XBARA_SEL36_SEL72_MASK)
-#define XBARA_SEL36_SEL73_MASK                   (0x7F00U)
-#define XBARA_SEL36_SEL73_SHIFT                  (8U)
-#define XBARA_SEL36_SEL73(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL73_SHIFT)) & XBARA_SEL36_SEL73_MASK)
+#define XBARA_SEL36_SEL72_MASK  (0x7FU)
+#define XBARA_SEL36_SEL72_SHIFT (0U)
+#define XBARA_SEL36_SEL72(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL72_SHIFT)) & XBARA_SEL36_SEL72_MASK)
+#define XBARA_SEL36_SEL73_MASK  (0x7F00U)
+#define XBARA_SEL36_SEL73_SHIFT (8U)
+#define XBARA_SEL36_SEL73(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL73_SHIFT)) & XBARA_SEL36_SEL73_MASK)
 /*! @} */
 
 /*! @name SEL37 - Crossbar A Select Register 37 */
 /*! @{ */
-#define XBARA_SEL37_SEL74_MASK                   (0x7FU)
-#define XBARA_SEL37_SEL74_SHIFT                  (0U)
-#define XBARA_SEL37_SEL74(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL74_SHIFT)) & XBARA_SEL37_SEL74_MASK)
-#define XBARA_SEL37_SEL75_MASK                   (0x7F00U)
-#define XBARA_SEL37_SEL75_SHIFT                  (8U)
-#define XBARA_SEL37_SEL75(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL75_SHIFT)) & XBARA_SEL37_SEL75_MASK)
+#define XBARA_SEL37_SEL74_MASK  (0x7FU)
+#define XBARA_SEL37_SEL74_SHIFT (0U)
+#define XBARA_SEL37_SEL74(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL74_SHIFT)) & XBARA_SEL37_SEL74_MASK)
+#define XBARA_SEL37_SEL75_MASK  (0x7F00U)
+#define XBARA_SEL37_SEL75_SHIFT (8U)
+#define XBARA_SEL37_SEL75(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL75_SHIFT)) & XBARA_SEL37_SEL75_MASK)
 /*! @} */
 
 /*! @name SEL38 - Crossbar A Select Register 38 */
 /*! @{ */
-#define XBARA_SEL38_SEL76_MASK                   (0x7FU)
-#define XBARA_SEL38_SEL76_SHIFT                  (0U)
-#define XBARA_SEL38_SEL76(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL76_SHIFT)) & XBARA_SEL38_SEL76_MASK)
-#define XBARA_SEL38_SEL77_MASK                   (0x7F00U)
-#define XBARA_SEL38_SEL77_SHIFT                  (8U)
-#define XBARA_SEL38_SEL77(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL77_SHIFT)) & XBARA_SEL38_SEL77_MASK)
+#define XBARA_SEL38_SEL76_MASK  (0x7FU)
+#define XBARA_SEL38_SEL76_SHIFT (0U)
+#define XBARA_SEL38_SEL76(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL76_SHIFT)) & XBARA_SEL38_SEL76_MASK)
+#define XBARA_SEL38_SEL77_MASK  (0x7F00U)
+#define XBARA_SEL38_SEL77_SHIFT (8U)
+#define XBARA_SEL38_SEL77(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL77_SHIFT)) & XBARA_SEL38_SEL77_MASK)
 /*! @} */
 
 /*! @name SEL39 - Crossbar A Select Register 39 */
 /*! @{ */
-#define XBARA_SEL39_SEL78_MASK                   (0x7FU)
-#define XBARA_SEL39_SEL78_SHIFT                  (0U)
-#define XBARA_SEL39_SEL78(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL78_SHIFT)) & XBARA_SEL39_SEL78_MASK)
-#define XBARA_SEL39_SEL79_MASK                   (0x7F00U)
-#define XBARA_SEL39_SEL79_SHIFT                  (8U)
-#define XBARA_SEL39_SEL79(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL79_SHIFT)) & XBARA_SEL39_SEL79_MASK)
+#define XBARA_SEL39_SEL78_MASK  (0x7FU)
+#define XBARA_SEL39_SEL78_SHIFT (0U)
+#define XBARA_SEL39_SEL78(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL78_SHIFT)) & XBARA_SEL39_SEL78_MASK)
+#define XBARA_SEL39_SEL79_MASK  (0x7F00U)
+#define XBARA_SEL39_SEL79_SHIFT (8U)
+#define XBARA_SEL39_SEL79(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL79_SHIFT)) & XBARA_SEL39_SEL79_MASK)
 /*! @} */
 
 /*! @name SEL40 - Crossbar A Select Register 40 */
 /*! @{ */
-#define XBARA_SEL40_SEL80_MASK                   (0x7FU)
-#define XBARA_SEL40_SEL80_SHIFT                  (0U)
-#define XBARA_SEL40_SEL80(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL80_SHIFT)) & XBARA_SEL40_SEL80_MASK)
-#define XBARA_SEL40_SEL81_MASK                   (0x7F00U)
-#define XBARA_SEL40_SEL81_SHIFT                  (8U)
-#define XBARA_SEL40_SEL81(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL81_SHIFT)) & XBARA_SEL40_SEL81_MASK)
+#define XBARA_SEL40_SEL80_MASK  (0x7FU)
+#define XBARA_SEL40_SEL80_SHIFT (0U)
+#define XBARA_SEL40_SEL80(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL80_SHIFT)) & XBARA_SEL40_SEL80_MASK)
+#define XBARA_SEL40_SEL81_MASK  (0x7F00U)
+#define XBARA_SEL40_SEL81_SHIFT (8U)
+#define XBARA_SEL40_SEL81(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL81_SHIFT)) & XBARA_SEL40_SEL81_MASK)
 /*! @} */
 
 /*! @name SEL41 - Crossbar A Select Register 41 */
 /*! @{ */
-#define XBARA_SEL41_SEL82_MASK                   (0x7FU)
-#define XBARA_SEL41_SEL82_SHIFT                  (0U)
-#define XBARA_SEL41_SEL82(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL82_SHIFT)) & XBARA_SEL41_SEL82_MASK)
-#define XBARA_SEL41_SEL83_MASK                   (0x7F00U)
-#define XBARA_SEL41_SEL83_SHIFT                  (8U)
-#define XBARA_SEL41_SEL83(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL83_SHIFT)) & XBARA_SEL41_SEL83_MASK)
+#define XBARA_SEL41_SEL82_MASK  (0x7FU)
+#define XBARA_SEL41_SEL82_SHIFT (0U)
+#define XBARA_SEL41_SEL82(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL82_SHIFT)) & XBARA_SEL41_SEL82_MASK)
+#define XBARA_SEL41_SEL83_MASK  (0x7F00U)
+#define XBARA_SEL41_SEL83_SHIFT (8U)
+#define XBARA_SEL41_SEL83(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL83_SHIFT)) & XBARA_SEL41_SEL83_MASK)
 /*! @} */
 
 /*! @name SEL42 - Crossbar A Select Register 42 */
 /*! @{ */
-#define XBARA_SEL42_SEL84_MASK                   (0x7FU)
-#define XBARA_SEL42_SEL84_SHIFT                  (0U)
-#define XBARA_SEL42_SEL84(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL84_SHIFT)) & XBARA_SEL42_SEL84_MASK)
-#define XBARA_SEL42_SEL85_MASK                   (0x7F00U)
-#define XBARA_SEL42_SEL85_SHIFT                  (8U)
-#define XBARA_SEL42_SEL85(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL85_SHIFT)) & XBARA_SEL42_SEL85_MASK)
+#define XBARA_SEL42_SEL84_MASK  (0x7FU)
+#define XBARA_SEL42_SEL84_SHIFT (0U)
+#define XBARA_SEL42_SEL84(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL84_SHIFT)) & XBARA_SEL42_SEL84_MASK)
+#define XBARA_SEL42_SEL85_MASK  (0x7F00U)
+#define XBARA_SEL42_SEL85_SHIFT (8U)
+#define XBARA_SEL42_SEL85(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL85_SHIFT)) & XBARA_SEL42_SEL85_MASK)
 /*! @} */
 
 /*! @name SEL43 - Crossbar A Select Register 43 */
 /*! @{ */
-#define XBARA_SEL43_SEL86_MASK                   (0x7FU)
-#define XBARA_SEL43_SEL86_SHIFT                  (0U)
-#define XBARA_SEL43_SEL86(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL86_SHIFT)) & XBARA_SEL43_SEL86_MASK)
-#define XBARA_SEL43_SEL87_MASK                   (0x7F00U)
-#define XBARA_SEL43_SEL87_SHIFT                  (8U)
-#define XBARA_SEL43_SEL87(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL87_SHIFT)) & XBARA_SEL43_SEL87_MASK)
+#define XBARA_SEL43_SEL86_MASK  (0x7FU)
+#define XBARA_SEL43_SEL86_SHIFT (0U)
+#define XBARA_SEL43_SEL86(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL86_SHIFT)) & XBARA_SEL43_SEL86_MASK)
+#define XBARA_SEL43_SEL87_MASK  (0x7F00U)
+#define XBARA_SEL43_SEL87_SHIFT (8U)
+#define XBARA_SEL43_SEL87(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL87_SHIFT)) & XBARA_SEL43_SEL87_MASK)
 /*! @} */
 
 /*! @name SEL44 - Crossbar A Select Register 44 */
 /*! @{ */
-#define XBARA_SEL44_SEL88_MASK                   (0x7FU)
-#define XBARA_SEL44_SEL88_SHIFT                  (0U)
-#define XBARA_SEL44_SEL88(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL88_SHIFT)) & XBARA_SEL44_SEL88_MASK)
-#define XBARA_SEL44_SEL89_MASK                   (0x7F00U)
-#define XBARA_SEL44_SEL89_SHIFT                  (8U)
-#define XBARA_SEL44_SEL89(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL89_SHIFT)) & XBARA_SEL44_SEL89_MASK)
+#define XBARA_SEL44_SEL88_MASK  (0x7FU)
+#define XBARA_SEL44_SEL88_SHIFT (0U)
+#define XBARA_SEL44_SEL88(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL88_SHIFT)) & XBARA_SEL44_SEL88_MASK)
+#define XBARA_SEL44_SEL89_MASK  (0x7F00U)
+#define XBARA_SEL44_SEL89_SHIFT (8U)
+#define XBARA_SEL44_SEL89(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL89_SHIFT)) & XBARA_SEL44_SEL89_MASK)
 /*! @} */
 
 /*! @name SEL45 - Crossbar A Select Register 45 */
 /*! @{ */
-#define XBARA_SEL45_SEL90_MASK                   (0x7FU)
-#define XBARA_SEL45_SEL90_SHIFT                  (0U)
-#define XBARA_SEL45_SEL90(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL90_SHIFT)) & XBARA_SEL45_SEL90_MASK)
-#define XBARA_SEL45_SEL91_MASK                   (0x7F00U)
-#define XBARA_SEL45_SEL91_SHIFT                  (8U)
-#define XBARA_SEL45_SEL91(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL91_SHIFT)) & XBARA_SEL45_SEL91_MASK)
+#define XBARA_SEL45_SEL90_MASK  (0x7FU)
+#define XBARA_SEL45_SEL90_SHIFT (0U)
+#define XBARA_SEL45_SEL90(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL90_SHIFT)) & XBARA_SEL45_SEL90_MASK)
+#define XBARA_SEL45_SEL91_MASK  (0x7F00U)
+#define XBARA_SEL45_SEL91_SHIFT (8U)
+#define XBARA_SEL45_SEL91(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL91_SHIFT)) & XBARA_SEL45_SEL91_MASK)
 /*! @} */
 
 /*! @name SEL46 - Crossbar A Select Register 46 */
 /*! @{ */
-#define XBARA_SEL46_SEL92_MASK                   (0x7FU)
-#define XBARA_SEL46_SEL92_SHIFT                  (0U)
-#define XBARA_SEL46_SEL92(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL92_SHIFT)) & XBARA_SEL46_SEL92_MASK)
-#define XBARA_SEL46_SEL93_MASK                   (0x7F00U)
-#define XBARA_SEL46_SEL93_SHIFT                  (8U)
-#define XBARA_SEL46_SEL93(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL93_SHIFT)) & XBARA_SEL46_SEL93_MASK)
+#define XBARA_SEL46_SEL92_MASK  (0x7FU)
+#define XBARA_SEL46_SEL92_SHIFT (0U)
+#define XBARA_SEL46_SEL92(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL92_SHIFT)) & XBARA_SEL46_SEL92_MASK)
+#define XBARA_SEL46_SEL93_MASK  (0x7F00U)
+#define XBARA_SEL46_SEL93_SHIFT (8U)
+#define XBARA_SEL46_SEL93(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL93_SHIFT)) & XBARA_SEL46_SEL93_MASK)
 /*! @} */
 
 /*! @name SEL47 - Crossbar A Select Register 47 */
 /*! @{ */
-#define XBARA_SEL47_SEL94_MASK                   (0x7FU)
-#define XBARA_SEL47_SEL94_SHIFT                  (0U)
-#define XBARA_SEL47_SEL94(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL94_SHIFT)) & XBARA_SEL47_SEL94_MASK)
-#define XBARA_SEL47_SEL95_MASK                   (0x7F00U)
-#define XBARA_SEL47_SEL95_SHIFT                  (8U)
-#define XBARA_SEL47_SEL95(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL95_SHIFT)) & XBARA_SEL47_SEL95_MASK)
+#define XBARA_SEL47_SEL94_MASK  (0x7FU)
+#define XBARA_SEL47_SEL94_SHIFT (0U)
+#define XBARA_SEL47_SEL94(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL94_SHIFT)) & XBARA_SEL47_SEL94_MASK)
+#define XBARA_SEL47_SEL95_MASK  (0x7F00U)
+#define XBARA_SEL47_SEL95_SHIFT (8U)
+#define XBARA_SEL47_SEL95(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL95_SHIFT)) & XBARA_SEL47_SEL95_MASK)
 /*! @} */
 
 /*! @name SEL48 - Crossbar A Select Register 48 */
 /*! @{ */
-#define XBARA_SEL48_SEL96_MASK                   (0x7FU)
-#define XBARA_SEL48_SEL96_SHIFT                  (0U)
-#define XBARA_SEL48_SEL96(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL96_SHIFT)) & XBARA_SEL48_SEL96_MASK)
-#define XBARA_SEL48_SEL97_MASK                   (0x7F00U)
-#define XBARA_SEL48_SEL97_SHIFT                  (8U)
-#define XBARA_SEL48_SEL97(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL97_SHIFT)) & XBARA_SEL48_SEL97_MASK)
+#define XBARA_SEL48_SEL96_MASK  (0x7FU)
+#define XBARA_SEL48_SEL96_SHIFT (0U)
+#define XBARA_SEL48_SEL96(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL96_SHIFT)) & XBARA_SEL48_SEL96_MASK)
+#define XBARA_SEL48_SEL97_MASK  (0x7F00U)
+#define XBARA_SEL48_SEL97_SHIFT (8U)
+#define XBARA_SEL48_SEL97(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL97_SHIFT)) & XBARA_SEL48_SEL97_MASK)
 /*! @} */
 
 /*! @name SEL49 - Crossbar A Select Register 49 */
 /*! @{ */
-#define XBARA_SEL49_SEL98_MASK                   (0x7FU)
-#define XBARA_SEL49_SEL98_SHIFT                  (0U)
-#define XBARA_SEL49_SEL98(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL98_SHIFT)) & XBARA_SEL49_SEL98_MASK)
-#define XBARA_SEL49_SEL99_MASK                   (0x7F00U)
-#define XBARA_SEL49_SEL99_SHIFT                  (8U)
-#define XBARA_SEL49_SEL99(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL99_SHIFT)) & XBARA_SEL49_SEL99_MASK)
+#define XBARA_SEL49_SEL98_MASK  (0x7FU)
+#define XBARA_SEL49_SEL98_SHIFT (0U)
+#define XBARA_SEL49_SEL98(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL98_SHIFT)) & XBARA_SEL49_SEL98_MASK)
+#define XBARA_SEL49_SEL99_MASK  (0x7F00U)
+#define XBARA_SEL49_SEL99_SHIFT (8U)
+#define XBARA_SEL49_SEL99(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL99_SHIFT)) & XBARA_SEL49_SEL99_MASK)
 /*! @} */
 
 /*! @name SEL50 - Crossbar A Select Register 50 */
 /*! @{ */
-#define XBARA_SEL50_SEL100_MASK                  (0x7FU)
-#define XBARA_SEL50_SEL100_SHIFT                 (0U)
-#define XBARA_SEL50_SEL100(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL100_SHIFT)) & XBARA_SEL50_SEL100_MASK)
-#define XBARA_SEL50_SEL101_MASK                  (0x7F00U)
-#define XBARA_SEL50_SEL101_SHIFT                 (8U)
-#define XBARA_SEL50_SEL101(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL101_SHIFT)) & XBARA_SEL50_SEL101_MASK)
+#define XBARA_SEL50_SEL100_MASK  (0x7FU)
+#define XBARA_SEL50_SEL100_SHIFT (0U)
+#define XBARA_SEL50_SEL100(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL100_SHIFT)) & XBARA_SEL50_SEL100_MASK)
+#define XBARA_SEL50_SEL101_MASK  (0x7F00U)
+#define XBARA_SEL50_SEL101_SHIFT (8U)
+#define XBARA_SEL50_SEL101(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL101_SHIFT)) & XBARA_SEL50_SEL101_MASK)
 /*! @} */
 
 /*! @name SEL51 - Crossbar A Select Register 51 */
 /*! @{ */
-#define XBARA_SEL51_SEL102_MASK                  (0x7FU)
-#define XBARA_SEL51_SEL102_SHIFT                 (0U)
-#define XBARA_SEL51_SEL102(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL102_SHIFT)) & XBARA_SEL51_SEL102_MASK)
-#define XBARA_SEL51_SEL103_MASK                  (0x7F00U)
-#define XBARA_SEL51_SEL103_SHIFT                 (8U)
-#define XBARA_SEL51_SEL103(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL103_SHIFT)) & XBARA_SEL51_SEL103_MASK)
+#define XBARA_SEL51_SEL102_MASK  (0x7FU)
+#define XBARA_SEL51_SEL102_SHIFT (0U)
+#define XBARA_SEL51_SEL102(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL102_SHIFT)) & XBARA_SEL51_SEL102_MASK)
+#define XBARA_SEL51_SEL103_MASK  (0x7F00U)
+#define XBARA_SEL51_SEL103_SHIFT (8U)
+#define XBARA_SEL51_SEL103(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL103_SHIFT)) & XBARA_SEL51_SEL103_MASK)
 /*! @} */
 
 /*! @name SEL52 - Crossbar A Select Register 52 */
 /*! @{ */
-#define XBARA_SEL52_SEL104_MASK                  (0x7FU)
-#define XBARA_SEL52_SEL104_SHIFT                 (0U)
-#define XBARA_SEL52_SEL104(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL104_SHIFT)) & XBARA_SEL52_SEL104_MASK)
-#define XBARA_SEL52_SEL105_MASK                  (0x7F00U)
-#define XBARA_SEL52_SEL105_SHIFT                 (8U)
-#define XBARA_SEL52_SEL105(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL105_SHIFT)) & XBARA_SEL52_SEL105_MASK)
+#define XBARA_SEL52_SEL104_MASK  (0x7FU)
+#define XBARA_SEL52_SEL104_SHIFT (0U)
+#define XBARA_SEL52_SEL104(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL104_SHIFT)) & XBARA_SEL52_SEL104_MASK)
+#define XBARA_SEL52_SEL105_MASK  (0x7F00U)
+#define XBARA_SEL52_SEL105_SHIFT (8U)
+#define XBARA_SEL52_SEL105(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL105_SHIFT)) & XBARA_SEL52_SEL105_MASK)
 /*! @} */
 
 /*! @name SEL53 - Crossbar A Select Register 53 */
 /*! @{ */
-#define XBARA_SEL53_SEL106_MASK                  (0x7FU)
-#define XBARA_SEL53_SEL106_SHIFT                 (0U)
-#define XBARA_SEL53_SEL106(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL106_SHIFT)) & XBARA_SEL53_SEL106_MASK)
-#define XBARA_SEL53_SEL107_MASK                  (0x7F00U)
-#define XBARA_SEL53_SEL107_SHIFT                 (8U)
-#define XBARA_SEL53_SEL107(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL107_SHIFT)) & XBARA_SEL53_SEL107_MASK)
+#define XBARA_SEL53_SEL106_MASK  (0x7FU)
+#define XBARA_SEL53_SEL106_SHIFT (0U)
+#define XBARA_SEL53_SEL106(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL106_SHIFT)) & XBARA_SEL53_SEL106_MASK)
+#define XBARA_SEL53_SEL107_MASK  (0x7F00U)
+#define XBARA_SEL53_SEL107_SHIFT (8U)
+#define XBARA_SEL53_SEL107(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL107_SHIFT)) & XBARA_SEL53_SEL107_MASK)
 /*! @} */
 
 /*! @name SEL54 - Crossbar A Select Register 54 */
 /*! @{ */
-#define XBARA_SEL54_SEL108_MASK                  (0x7FU)
-#define XBARA_SEL54_SEL108_SHIFT                 (0U)
-#define XBARA_SEL54_SEL108(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL108_SHIFT)) & XBARA_SEL54_SEL108_MASK)
-#define XBARA_SEL54_SEL109_MASK                  (0x7F00U)
-#define XBARA_SEL54_SEL109_SHIFT                 (8U)
-#define XBARA_SEL54_SEL109(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL109_SHIFT)) & XBARA_SEL54_SEL109_MASK)
+#define XBARA_SEL54_SEL108_MASK  (0x7FU)
+#define XBARA_SEL54_SEL108_SHIFT (0U)
+#define XBARA_SEL54_SEL108(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL108_SHIFT)) & XBARA_SEL54_SEL108_MASK)
+#define XBARA_SEL54_SEL109_MASK  (0x7F00U)
+#define XBARA_SEL54_SEL109_SHIFT (8U)
+#define XBARA_SEL54_SEL109(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL109_SHIFT)) & XBARA_SEL54_SEL109_MASK)
 /*! @} */
 
 /*! @name SEL55 - Crossbar A Select Register 55 */
 /*! @{ */
-#define XBARA_SEL55_SEL110_MASK                  (0x7FU)
-#define XBARA_SEL55_SEL110_SHIFT                 (0U)
-#define XBARA_SEL55_SEL110(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL110_SHIFT)) & XBARA_SEL55_SEL110_MASK)
-#define XBARA_SEL55_SEL111_MASK                  (0x7F00U)
-#define XBARA_SEL55_SEL111_SHIFT                 (8U)
-#define XBARA_SEL55_SEL111(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL111_SHIFT)) & XBARA_SEL55_SEL111_MASK)
+#define XBARA_SEL55_SEL110_MASK  (0x7FU)
+#define XBARA_SEL55_SEL110_SHIFT (0U)
+#define XBARA_SEL55_SEL110(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL110_SHIFT)) & XBARA_SEL55_SEL110_MASK)
+#define XBARA_SEL55_SEL111_MASK  (0x7F00U)
+#define XBARA_SEL55_SEL111_SHIFT (8U)
+#define XBARA_SEL55_SEL111(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL111_SHIFT)) & XBARA_SEL55_SEL111_MASK)
 /*! @} */
 
 /*! @name SEL56 - Crossbar A Select Register 56 */
 /*! @{ */
-#define XBARA_SEL56_SEL112_MASK                  (0x7FU)
-#define XBARA_SEL56_SEL112_SHIFT                 (0U)
-#define XBARA_SEL56_SEL112(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL112_SHIFT)) & XBARA_SEL56_SEL112_MASK)
-#define XBARA_SEL56_SEL113_MASK                  (0x7F00U)
-#define XBARA_SEL56_SEL113_SHIFT                 (8U)
-#define XBARA_SEL56_SEL113(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL113_SHIFT)) & XBARA_SEL56_SEL113_MASK)
+#define XBARA_SEL56_SEL112_MASK  (0x7FU)
+#define XBARA_SEL56_SEL112_SHIFT (0U)
+#define XBARA_SEL56_SEL112(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL112_SHIFT)) & XBARA_SEL56_SEL112_MASK)
+#define XBARA_SEL56_SEL113_MASK  (0x7F00U)
+#define XBARA_SEL56_SEL113_SHIFT (8U)
+#define XBARA_SEL56_SEL113(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL113_SHIFT)) & XBARA_SEL56_SEL113_MASK)
 /*! @} */
 
 /*! @name SEL57 - Crossbar A Select Register 57 */
 /*! @{ */
-#define XBARA_SEL57_SEL114_MASK                  (0x7FU)
-#define XBARA_SEL57_SEL114_SHIFT                 (0U)
-#define XBARA_SEL57_SEL114(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL114_SHIFT)) & XBARA_SEL57_SEL114_MASK)
-#define XBARA_SEL57_SEL115_MASK                  (0x7F00U)
-#define XBARA_SEL57_SEL115_SHIFT                 (8U)
-#define XBARA_SEL57_SEL115(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL115_SHIFT)) & XBARA_SEL57_SEL115_MASK)
+#define XBARA_SEL57_SEL114_MASK  (0x7FU)
+#define XBARA_SEL57_SEL114_SHIFT (0U)
+#define XBARA_SEL57_SEL114(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL114_SHIFT)) & XBARA_SEL57_SEL114_MASK)
+#define XBARA_SEL57_SEL115_MASK  (0x7F00U)
+#define XBARA_SEL57_SEL115_SHIFT (8U)
+#define XBARA_SEL57_SEL115(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL115_SHIFT)) & XBARA_SEL57_SEL115_MASK)
 /*! @} */
 
 /*! @name SEL58 - Crossbar A Select Register 58 */
 /*! @{ */
-#define XBARA_SEL58_SEL116_MASK                  (0x7FU)
-#define XBARA_SEL58_SEL116_SHIFT                 (0U)
-#define XBARA_SEL58_SEL116(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL116_SHIFT)) & XBARA_SEL58_SEL116_MASK)
-#define XBARA_SEL58_SEL117_MASK                  (0x7F00U)
-#define XBARA_SEL58_SEL117_SHIFT                 (8U)
-#define XBARA_SEL58_SEL117(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL117_SHIFT)) & XBARA_SEL58_SEL117_MASK)
+#define XBARA_SEL58_SEL116_MASK  (0x7FU)
+#define XBARA_SEL58_SEL116_SHIFT (0U)
+#define XBARA_SEL58_SEL116(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL116_SHIFT)) & XBARA_SEL58_SEL116_MASK)
+#define XBARA_SEL58_SEL117_MASK  (0x7F00U)
+#define XBARA_SEL58_SEL117_SHIFT (8U)
+#define XBARA_SEL58_SEL117(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL117_SHIFT)) & XBARA_SEL58_SEL117_MASK)
 /*! @} */
 
 /*! @name SEL59 - Crossbar A Select Register 59 */
 /*! @{ */
-#define XBARA_SEL59_SEL118_MASK                  (0x7FU)
-#define XBARA_SEL59_SEL118_SHIFT                 (0U)
-#define XBARA_SEL59_SEL118(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL118_SHIFT)) & XBARA_SEL59_SEL118_MASK)
-#define XBARA_SEL59_SEL119_MASK                  (0x7F00U)
-#define XBARA_SEL59_SEL119_SHIFT                 (8U)
-#define XBARA_SEL59_SEL119(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL119_SHIFT)) & XBARA_SEL59_SEL119_MASK)
+#define XBARA_SEL59_SEL118_MASK  (0x7FU)
+#define XBARA_SEL59_SEL118_SHIFT (0U)
+#define XBARA_SEL59_SEL118(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL118_SHIFT)) & XBARA_SEL59_SEL118_MASK)
+#define XBARA_SEL59_SEL119_MASK  (0x7F00U)
+#define XBARA_SEL59_SEL119_SHIFT (8U)
+#define XBARA_SEL59_SEL119(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL119_SHIFT)) & XBARA_SEL59_SEL119_MASK)
 /*! @} */
 
 /*! @name SEL60 - Crossbar A Select Register 60 */
 /*! @{ */
-#define XBARA_SEL60_SEL120_MASK                  (0x7FU)
-#define XBARA_SEL60_SEL120_SHIFT                 (0U)
-#define XBARA_SEL60_SEL120(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL120_SHIFT)) & XBARA_SEL60_SEL120_MASK)
-#define XBARA_SEL60_SEL121_MASK                  (0x7F00U)
-#define XBARA_SEL60_SEL121_SHIFT                 (8U)
-#define XBARA_SEL60_SEL121(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL121_SHIFT)) & XBARA_SEL60_SEL121_MASK)
+#define XBARA_SEL60_SEL120_MASK  (0x7FU)
+#define XBARA_SEL60_SEL120_SHIFT (0U)
+#define XBARA_SEL60_SEL120(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL120_SHIFT)) & XBARA_SEL60_SEL120_MASK)
+#define XBARA_SEL60_SEL121_MASK  (0x7F00U)
+#define XBARA_SEL60_SEL121_SHIFT (8U)
+#define XBARA_SEL60_SEL121(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL121_SHIFT)) & XBARA_SEL60_SEL121_MASK)
 /*! @} */
 
 /*! @name SEL61 - Crossbar A Select Register 61 */
 /*! @{ */
-#define XBARA_SEL61_SEL122_MASK                  (0x7FU)
-#define XBARA_SEL61_SEL122_SHIFT                 (0U)
-#define XBARA_SEL61_SEL122(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL122_SHIFT)) & XBARA_SEL61_SEL122_MASK)
-#define XBARA_SEL61_SEL123_MASK                  (0x7F00U)
-#define XBARA_SEL61_SEL123_SHIFT                 (8U)
-#define XBARA_SEL61_SEL123(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL123_SHIFT)) & XBARA_SEL61_SEL123_MASK)
+#define XBARA_SEL61_SEL122_MASK  (0x7FU)
+#define XBARA_SEL61_SEL122_SHIFT (0U)
+#define XBARA_SEL61_SEL122(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL122_SHIFT)) & XBARA_SEL61_SEL122_MASK)
+#define XBARA_SEL61_SEL123_MASK  (0x7F00U)
+#define XBARA_SEL61_SEL123_SHIFT (8U)
+#define XBARA_SEL61_SEL123(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL123_SHIFT)) & XBARA_SEL61_SEL123_MASK)
 /*! @} */
 
 /*! @name SEL62 - Crossbar A Select Register 62 */
 /*! @{ */
-#define XBARA_SEL62_SEL124_MASK                  (0x7FU)
-#define XBARA_SEL62_SEL124_SHIFT                 (0U)
-#define XBARA_SEL62_SEL124(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL124_SHIFT)) & XBARA_SEL62_SEL124_MASK)
-#define XBARA_SEL62_SEL125_MASK                  (0x7F00U)
-#define XBARA_SEL62_SEL125_SHIFT                 (8U)
-#define XBARA_SEL62_SEL125(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL125_SHIFT)) & XBARA_SEL62_SEL125_MASK)
+#define XBARA_SEL62_SEL124_MASK  (0x7FU)
+#define XBARA_SEL62_SEL124_SHIFT (0U)
+#define XBARA_SEL62_SEL124(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL124_SHIFT)) & XBARA_SEL62_SEL124_MASK)
+#define XBARA_SEL62_SEL125_MASK  (0x7F00U)
+#define XBARA_SEL62_SEL125_SHIFT (8U)
+#define XBARA_SEL62_SEL125(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL125_SHIFT)) & XBARA_SEL62_SEL125_MASK)
 /*! @} */
 
 /*! @name SEL63 - Crossbar A Select Register 63 */
 /*! @{ */
-#define XBARA_SEL63_SEL126_MASK                  (0x7FU)
-#define XBARA_SEL63_SEL126_SHIFT                 (0U)
-#define XBARA_SEL63_SEL126(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL126_SHIFT)) & XBARA_SEL63_SEL126_MASK)
-#define XBARA_SEL63_SEL127_MASK                  (0x7F00U)
-#define XBARA_SEL63_SEL127_SHIFT                 (8U)
-#define XBARA_SEL63_SEL127(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL127_SHIFT)) & XBARA_SEL63_SEL127_MASK)
+#define XBARA_SEL63_SEL126_MASK  (0x7FU)
+#define XBARA_SEL63_SEL126_SHIFT (0U)
+#define XBARA_SEL63_SEL126(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL126_SHIFT)) & XBARA_SEL63_SEL126_MASK)
+#define XBARA_SEL63_SEL127_MASK  (0x7F00U)
+#define XBARA_SEL63_SEL127_SHIFT (8U)
+#define XBARA_SEL63_SEL127(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL127_SHIFT)) & XBARA_SEL63_SEL127_MASK)
 /*! @} */
 
 /*! @name SEL64 - Crossbar A Select Register 64 */
 /*! @{ */
-#define XBARA_SEL64_SEL128_MASK                  (0x7FU)
-#define XBARA_SEL64_SEL128_SHIFT                 (0U)
-#define XBARA_SEL64_SEL128(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL128_SHIFT)) & XBARA_SEL64_SEL128_MASK)
-#define XBARA_SEL64_SEL129_MASK                  (0x7F00U)
-#define XBARA_SEL64_SEL129_SHIFT                 (8U)
-#define XBARA_SEL64_SEL129(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL129_SHIFT)) & XBARA_SEL64_SEL129_MASK)
+#define XBARA_SEL64_SEL128_MASK  (0x7FU)
+#define XBARA_SEL64_SEL128_SHIFT (0U)
+#define XBARA_SEL64_SEL128(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL128_SHIFT)) & XBARA_SEL64_SEL128_MASK)
+#define XBARA_SEL64_SEL129_MASK  (0x7F00U)
+#define XBARA_SEL64_SEL129_SHIFT (8U)
+#define XBARA_SEL64_SEL129(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL129_SHIFT)) & XBARA_SEL64_SEL129_MASK)
 /*! @} */
 
 /*! @name SEL65 - Crossbar A Select Register 65 */
 /*! @{ */
-#define XBARA_SEL65_SEL130_MASK                  (0x7FU)
-#define XBARA_SEL65_SEL130_SHIFT                 (0U)
-#define XBARA_SEL65_SEL130(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL130_SHIFT)) & XBARA_SEL65_SEL130_MASK)
-#define XBARA_SEL65_SEL131_MASK                  (0x7F00U)
-#define XBARA_SEL65_SEL131_SHIFT                 (8U)
-#define XBARA_SEL65_SEL131(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL131_SHIFT)) & XBARA_SEL65_SEL131_MASK)
+#define XBARA_SEL65_SEL130_MASK  (0x7FU)
+#define XBARA_SEL65_SEL130_SHIFT (0U)
+#define XBARA_SEL65_SEL130(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL130_SHIFT)) & XBARA_SEL65_SEL130_MASK)
+#define XBARA_SEL65_SEL131_MASK  (0x7F00U)
+#define XBARA_SEL65_SEL131_SHIFT (8U)
+#define XBARA_SEL65_SEL131(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL131_SHIFT)) & XBARA_SEL65_SEL131_MASK)
 /*! @} */
 
 /*! @name CTRL0 - Crossbar A Control Register 0 */
 /*! @{ */
-#define XBARA_CTRL0_DEN0_MASK                    (0x1U)
-#define XBARA_CTRL0_DEN0_SHIFT                   (0U)
-#define XBARA_CTRL0_DEN0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN0_SHIFT)) & XBARA_CTRL0_DEN0_MASK)
-#define XBARA_CTRL0_IEN0_MASK                    (0x2U)
-#define XBARA_CTRL0_IEN0_SHIFT                   (1U)
-#define XBARA_CTRL0_IEN0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN0_SHIFT)) & XBARA_CTRL0_IEN0_MASK)
-#define XBARA_CTRL0_EDGE0_MASK                   (0xCU)
-#define XBARA_CTRL0_EDGE0_SHIFT                  (2U)
-#define XBARA_CTRL0_EDGE0(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE0_SHIFT)) & XBARA_CTRL0_EDGE0_MASK)
-#define XBARA_CTRL0_STS0_MASK                    (0x10U)
-#define XBARA_CTRL0_STS0_SHIFT                   (4U)
-#define XBARA_CTRL0_STS0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS0_SHIFT)) & XBARA_CTRL0_STS0_MASK)
-#define XBARA_CTRL0_DEN1_MASK                    (0x100U)
-#define XBARA_CTRL0_DEN1_SHIFT                   (8U)
-#define XBARA_CTRL0_DEN1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN1_SHIFT)) & XBARA_CTRL0_DEN1_MASK)
-#define XBARA_CTRL0_IEN1_MASK                    (0x200U)
-#define XBARA_CTRL0_IEN1_SHIFT                   (9U)
-#define XBARA_CTRL0_IEN1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN1_SHIFT)) & XBARA_CTRL0_IEN1_MASK)
-#define XBARA_CTRL0_EDGE1_MASK                   (0xC00U)
-#define XBARA_CTRL0_EDGE1_SHIFT                  (10U)
-#define XBARA_CTRL0_EDGE1(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE1_SHIFT)) & XBARA_CTRL0_EDGE1_MASK)
-#define XBARA_CTRL0_STS1_MASK                    (0x1000U)
-#define XBARA_CTRL0_STS1_SHIFT                   (12U)
-#define XBARA_CTRL0_STS1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS1_SHIFT)) & XBARA_CTRL0_STS1_MASK)
+#define XBARA_CTRL0_DEN0_MASK   (0x1U)
+#define XBARA_CTRL0_DEN0_SHIFT  (0U)
+#define XBARA_CTRL0_DEN0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN0_SHIFT)) & XBARA_CTRL0_DEN0_MASK)
+#define XBARA_CTRL0_IEN0_MASK   (0x2U)
+#define XBARA_CTRL0_IEN0_SHIFT  (1U)
+#define XBARA_CTRL0_IEN0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN0_SHIFT)) & XBARA_CTRL0_IEN0_MASK)
+#define XBARA_CTRL0_EDGE0_MASK  (0xCU)
+#define XBARA_CTRL0_EDGE0_SHIFT (2U)
+#define XBARA_CTRL0_EDGE0(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE0_SHIFT)) & XBARA_CTRL0_EDGE0_MASK)
+#define XBARA_CTRL0_STS0_MASK   (0x10U)
+#define XBARA_CTRL0_STS0_SHIFT  (4U)
+#define XBARA_CTRL0_STS0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS0_SHIFT)) & XBARA_CTRL0_STS0_MASK)
+#define XBARA_CTRL0_DEN1_MASK   (0x100U)
+#define XBARA_CTRL0_DEN1_SHIFT  (8U)
+#define XBARA_CTRL0_DEN1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN1_SHIFT)) & XBARA_CTRL0_DEN1_MASK)
+#define XBARA_CTRL0_IEN1_MASK   (0x200U)
+#define XBARA_CTRL0_IEN1_SHIFT  (9U)
+#define XBARA_CTRL0_IEN1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN1_SHIFT)) & XBARA_CTRL0_IEN1_MASK)
+#define XBARA_CTRL0_EDGE1_MASK  (0xC00U)
+#define XBARA_CTRL0_EDGE1_SHIFT (10U)
+#define XBARA_CTRL0_EDGE1(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE1_SHIFT)) & XBARA_CTRL0_EDGE1_MASK)
+#define XBARA_CTRL0_STS1_MASK   (0x1000U)
+#define XBARA_CTRL0_STS1_SHIFT  (12U)
+#define XBARA_CTRL0_STS1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS1_SHIFT)) & XBARA_CTRL0_STS1_MASK)
 /*! @} */
 
 /*! @name CTRL1 - Crossbar A Control Register 1 */
 /*! @{ */
-#define XBARA_CTRL1_DEN2_MASK                    (0x1U)
-#define XBARA_CTRL1_DEN2_SHIFT                   (0U)
-#define XBARA_CTRL1_DEN2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN2_SHIFT)) & XBARA_CTRL1_DEN2_MASK)
-#define XBARA_CTRL1_IEN2_MASK                    (0x2U)
-#define XBARA_CTRL1_IEN2_SHIFT                   (1U)
-#define XBARA_CTRL1_IEN2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN2_SHIFT)) & XBARA_CTRL1_IEN2_MASK)
-#define XBARA_CTRL1_EDGE2_MASK                   (0xCU)
-#define XBARA_CTRL1_EDGE2_SHIFT                  (2U)
-#define XBARA_CTRL1_EDGE2(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE2_SHIFT)) & XBARA_CTRL1_EDGE2_MASK)
-#define XBARA_CTRL1_STS2_MASK                    (0x10U)
-#define XBARA_CTRL1_STS2_SHIFT                   (4U)
-#define XBARA_CTRL1_STS2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS2_SHIFT)) & XBARA_CTRL1_STS2_MASK)
-#define XBARA_CTRL1_DEN3_MASK                    (0x100U)
-#define XBARA_CTRL1_DEN3_SHIFT                   (8U)
-#define XBARA_CTRL1_DEN3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN3_SHIFT)) & XBARA_CTRL1_DEN3_MASK)
-#define XBARA_CTRL1_IEN3_MASK                    (0x200U)
-#define XBARA_CTRL1_IEN3_SHIFT                   (9U)
-#define XBARA_CTRL1_IEN3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN3_SHIFT)) & XBARA_CTRL1_IEN3_MASK)
-#define XBARA_CTRL1_EDGE3_MASK                   (0xC00U)
-#define XBARA_CTRL1_EDGE3_SHIFT                  (10U)
-#define XBARA_CTRL1_EDGE3(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE3_SHIFT)) & XBARA_CTRL1_EDGE3_MASK)
-#define XBARA_CTRL1_STS3_MASK                    (0x1000U)
-#define XBARA_CTRL1_STS3_SHIFT                   (12U)
-#define XBARA_CTRL1_STS3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS3_SHIFT)) & XBARA_CTRL1_STS3_MASK)
+#define XBARA_CTRL1_DEN2_MASK   (0x1U)
+#define XBARA_CTRL1_DEN2_SHIFT  (0U)
+#define XBARA_CTRL1_DEN2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN2_SHIFT)) & XBARA_CTRL1_DEN2_MASK)
+#define XBARA_CTRL1_IEN2_MASK   (0x2U)
+#define XBARA_CTRL1_IEN2_SHIFT  (1U)
+#define XBARA_CTRL1_IEN2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN2_SHIFT)) & XBARA_CTRL1_IEN2_MASK)
+#define XBARA_CTRL1_EDGE2_MASK  (0xCU)
+#define XBARA_CTRL1_EDGE2_SHIFT (2U)
+#define XBARA_CTRL1_EDGE2(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE2_SHIFT)) & XBARA_CTRL1_EDGE2_MASK)
+#define XBARA_CTRL1_STS2_MASK   (0x10U)
+#define XBARA_CTRL1_STS2_SHIFT  (4U)
+#define XBARA_CTRL1_STS2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS2_SHIFT)) & XBARA_CTRL1_STS2_MASK)
+#define XBARA_CTRL1_DEN3_MASK   (0x100U)
+#define XBARA_CTRL1_DEN3_SHIFT  (8U)
+#define XBARA_CTRL1_DEN3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN3_SHIFT)) & XBARA_CTRL1_DEN3_MASK)
+#define XBARA_CTRL1_IEN3_MASK   (0x200U)
+#define XBARA_CTRL1_IEN3_SHIFT  (9U)
+#define XBARA_CTRL1_IEN3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN3_SHIFT)) & XBARA_CTRL1_IEN3_MASK)
+#define XBARA_CTRL1_EDGE3_MASK  (0xC00U)
+#define XBARA_CTRL1_EDGE3_SHIFT (10U)
+#define XBARA_CTRL1_EDGE3(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE3_SHIFT)) & XBARA_CTRL1_EDGE3_MASK)
+#define XBARA_CTRL1_STS3_MASK   (0x1000U)
+#define XBARA_CTRL1_STS3_SHIFT  (12U)
+#define XBARA_CTRL1_STS3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS3_SHIFT)) & XBARA_CTRL1_STS3_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XBARA_Register_Masks */
 
-
 /* XBARA - Peripheral instance base addresses */
 /** Peripheral XBARA1 base address */
-#define XBARA1_BASE                              (0x403BC000u)
+#define XBARA1_BASE (0x403BC000u)
 /** Peripheral XBARA1 base pointer */
-#define XBARA1                                   ((XBARA_Type *)XBARA1_BASE)
+#define XBARA1 ((XBARA_Type *)XBARA1_BASE)
 /** Array initializer of XBARA peripheral base addresses */
-#define XBARA_BASE_ADDRS                         { XBARA1_BASE }
+#define XBARA_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        XBARA1_BASE                                                                                                    \
+    }
 /** Array initializer of XBARA peripheral base pointers */
-#define XBARA_BASE_PTRS                          { XBARA1 }
+#define XBARA_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        XBARA1                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group XBARA_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XBARB Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -26415,15 +30134,16 @@ typedef struct {
  */
 
 /** XBARB - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t SEL0;                              /**< Crossbar B Select Register 0, offset: 0x0 */
-  __IO uint16_t SEL1;                              /**< Crossbar B Select Register 1, offset: 0x2 */
-  __IO uint16_t SEL2;                              /**< Crossbar B Select Register 2, offset: 0x4 */
-  __IO uint16_t SEL3;                              /**< Crossbar B Select Register 3, offset: 0x6 */
-  __IO uint16_t SEL4;                              /**< Crossbar B Select Register 4, offset: 0x8 */
-  __IO uint16_t SEL5;                              /**< Crossbar B Select Register 5, offset: 0xA */
-  __IO uint16_t SEL6;                              /**< Crossbar B Select Register 6, offset: 0xC */
-  __IO uint16_t SEL7;                              /**< Crossbar B Select Register 7, offset: 0xE */
+typedef struct
+{
+    __IO uint16_t SEL0; /**< Crossbar B Select Register 0, offset: 0x0 */
+    __IO uint16_t SEL1; /**< Crossbar B Select Register 1, offset: 0x2 */
+    __IO uint16_t SEL2; /**< Crossbar B Select Register 2, offset: 0x4 */
+    __IO uint16_t SEL3; /**< Crossbar B Select Register 3, offset: 0x6 */
+    __IO uint16_t SEL4; /**< Crossbar B Select Register 4, offset: 0x8 */
+    __IO uint16_t SEL5; /**< Crossbar B Select Register 5, offset: 0xA */
+    __IO uint16_t SEL6; /**< Crossbar B Select Register 6, offset: 0xC */
+    __IO uint16_t SEL7; /**< Crossbar B Select Register 7, offset: 0xE */
 } XBARB_Type;
 
 /* ----------------------------------------------------------------------------
@@ -26437,109 +30157,112 @@ typedef struct {
 
 /*! @name SEL0 - Crossbar B Select Register 0 */
 /*! @{ */
-#define XBARB_SEL0_SEL0_MASK                     (0x3FU)
-#define XBARB_SEL0_SEL0_SHIFT                    (0U)
-#define XBARB_SEL0_SEL0(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK)
-#define XBARB_SEL0_SEL1_MASK                     (0x3F00U)
-#define XBARB_SEL0_SEL1_SHIFT                    (8U)
-#define XBARB_SEL0_SEL1(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK)
+#define XBARB_SEL0_SEL0_MASK  (0x3FU)
+#define XBARB_SEL0_SEL0_SHIFT (0U)
+#define XBARB_SEL0_SEL0(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK)
+#define XBARB_SEL0_SEL1_MASK  (0x3F00U)
+#define XBARB_SEL0_SEL1_SHIFT (8U)
+#define XBARB_SEL0_SEL1(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK)
 /*! @} */
 
 /*! @name SEL1 - Crossbar B Select Register 1 */
 /*! @{ */
-#define XBARB_SEL1_SEL2_MASK                     (0x3FU)
-#define XBARB_SEL1_SEL2_SHIFT                    (0U)
-#define XBARB_SEL1_SEL2(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK)
-#define XBARB_SEL1_SEL3_MASK                     (0x3F00U)
-#define XBARB_SEL1_SEL3_SHIFT                    (8U)
-#define XBARB_SEL1_SEL3(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK)
+#define XBARB_SEL1_SEL2_MASK  (0x3FU)
+#define XBARB_SEL1_SEL2_SHIFT (0U)
+#define XBARB_SEL1_SEL2(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK)
+#define XBARB_SEL1_SEL3_MASK  (0x3F00U)
+#define XBARB_SEL1_SEL3_SHIFT (8U)
+#define XBARB_SEL1_SEL3(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK)
 /*! @} */
 
 /*! @name SEL2 - Crossbar B Select Register 2 */
 /*! @{ */
-#define XBARB_SEL2_SEL4_MASK                     (0x3FU)
-#define XBARB_SEL2_SEL4_SHIFT                    (0U)
-#define XBARB_SEL2_SEL4(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK)
-#define XBARB_SEL2_SEL5_MASK                     (0x3F00U)
-#define XBARB_SEL2_SEL5_SHIFT                    (8U)
-#define XBARB_SEL2_SEL5(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK)
+#define XBARB_SEL2_SEL4_MASK  (0x3FU)
+#define XBARB_SEL2_SEL4_SHIFT (0U)
+#define XBARB_SEL2_SEL4(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK)
+#define XBARB_SEL2_SEL5_MASK  (0x3F00U)
+#define XBARB_SEL2_SEL5_SHIFT (8U)
+#define XBARB_SEL2_SEL5(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK)
 /*! @} */
 
 /*! @name SEL3 - Crossbar B Select Register 3 */
 /*! @{ */
-#define XBARB_SEL3_SEL6_MASK                     (0x3FU)
-#define XBARB_SEL3_SEL6_SHIFT                    (0U)
-#define XBARB_SEL3_SEL6(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK)
-#define XBARB_SEL3_SEL7_MASK                     (0x3F00U)
-#define XBARB_SEL3_SEL7_SHIFT                    (8U)
-#define XBARB_SEL3_SEL7(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK)
+#define XBARB_SEL3_SEL6_MASK  (0x3FU)
+#define XBARB_SEL3_SEL6_SHIFT (0U)
+#define XBARB_SEL3_SEL6(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK)
+#define XBARB_SEL3_SEL7_MASK  (0x3F00U)
+#define XBARB_SEL3_SEL7_SHIFT (8U)
+#define XBARB_SEL3_SEL7(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK)
 /*! @} */
 
 /*! @name SEL4 - Crossbar B Select Register 4 */
 /*! @{ */
-#define XBARB_SEL4_SEL8_MASK                     (0x3FU)
-#define XBARB_SEL4_SEL8_SHIFT                    (0U)
-#define XBARB_SEL4_SEL8(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK)
-#define XBARB_SEL4_SEL9_MASK                     (0x3F00U)
-#define XBARB_SEL4_SEL9_SHIFT                    (8U)
-#define XBARB_SEL4_SEL9(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK)
+#define XBARB_SEL4_SEL8_MASK  (0x3FU)
+#define XBARB_SEL4_SEL8_SHIFT (0U)
+#define XBARB_SEL4_SEL8(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK)
+#define XBARB_SEL4_SEL9_MASK  (0x3F00U)
+#define XBARB_SEL4_SEL9_SHIFT (8U)
+#define XBARB_SEL4_SEL9(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK)
 /*! @} */
 
 /*! @name SEL5 - Crossbar B Select Register 5 */
 /*! @{ */
-#define XBARB_SEL5_SEL10_MASK                    (0x3FU)
-#define XBARB_SEL5_SEL10_SHIFT                   (0U)
-#define XBARB_SEL5_SEL10(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK)
-#define XBARB_SEL5_SEL11_MASK                    (0x3F00U)
-#define XBARB_SEL5_SEL11_SHIFT                   (8U)
-#define XBARB_SEL5_SEL11(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK)
+#define XBARB_SEL5_SEL10_MASK  (0x3FU)
+#define XBARB_SEL5_SEL10_SHIFT (0U)
+#define XBARB_SEL5_SEL10(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK)
+#define XBARB_SEL5_SEL11_MASK  (0x3F00U)
+#define XBARB_SEL5_SEL11_SHIFT (8U)
+#define XBARB_SEL5_SEL11(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK)
 /*! @} */
 
 /*! @name SEL6 - Crossbar B Select Register 6 */
 /*! @{ */
-#define XBARB_SEL6_SEL12_MASK                    (0x3FU)
-#define XBARB_SEL6_SEL12_SHIFT                   (0U)
-#define XBARB_SEL6_SEL12(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK)
-#define XBARB_SEL6_SEL13_MASK                    (0x3F00U)
-#define XBARB_SEL6_SEL13_SHIFT                   (8U)
-#define XBARB_SEL6_SEL13(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK)
+#define XBARB_SEL6_SEL12_MASK  (0x3FU)
+#define XBARB_SEL6_SEL12_SHIFT (0U)
+#define XBARB_SEL6_SEL12(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK)
+#define XBARB_SEL6_SEL13_MASK  (0x3F00U)
+#define XBARB_SEL6_SEL13_SHIFT (8U)
+#define XBARB_SEL6_SEL13(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK)
 /*! @} */
 
 /*! @name SEL7 - Crossbar B Select Register 7 */
 /*! @{ */
-#define XBARB_SEL7_SEL14_MASK                    (0x3FU)
-#define XBARB_SEL7_SEL14_SHIFT                   (0U)
-#define XBARB_SEL7_SEL14(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK)
-#define XBARB_SEL7_SEL15_MASK                    (0x3F00U)
-#define XBARB_SEL7_SEL15_SHIFT                   (8U)
-#define XBARB_SEL7_SEL15(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK)
+#define XBARB_SEL7_SEL14_MASK  (0x3FU)
+#define XBARB_SEL7_SEL14_SHIFT (0U)
+#define XBARB_SEL7_SEL14(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK)
+#define XBARB_SEL7_SEL15_MASK  (0x3F00U)
+#define XBARB_SEL7_SEL15_SHIFT (8U)
+#define XBARB_SEL7_SEL15(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XBARB_Register_Masks */
 
-
 /* XBARB - Peripheral instance base addresses */
 /** Peripheral XBARB2 base address */
-#define XBARB2_BASE                              (0x403C0000u)
+#define XBARB2_BASE (0x403C0000u)
 /** Peripheral XBARB2 base pointer */
-#define XBARB2                                   ((XBARB_Type *)XBARB2_BASE)
+#define XBARB2 ((XBARB_Type *)XBARB2_BASE)
 /** Peripheral XBARB3 base address */
-#define XBARB3_BASE                              (0x403C4000u)
+#define XBARB3_BASE (0x403C4000u)
 /** Peripheral XBARB3 base pointer */
-#define XBARB3                                   ((XBARB_Type *)XBARB3_BASE)
+#define XBARB3 ((XBARB_Type *)XBARB3_BASE)
 /** Array initializer of XBARB peripheral base addresses */
-#define XBARB_BASE_ADDRS                         { 0u, 0u, XBARB2_BASE, XBARB3_BASE }
+#define XBARB_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, 0u, XBARB2_BASE, XBARB3_BASE                                                                               \
+    }
 /** Array initializer of XBARB peripheral base pointers */
-#define XBARB_BASE_PTRS                          { (XBARB_Type *)0u, (XBARB_Type *)0u, XBARB2, XBARB3 }
+#define XBARB_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (XBARB_Type *)0u, (XBARB_Type *)0u, XBARB2, XBARB3                                                             \
+    }
 
 /*!
  * @}
  */ /* end of group XBARB_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XTALOSC24M Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -26550,30 +30273,31 @@ typedef struct {
  */
 
 /** XTALOSC24M - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[336];
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-       uint8_t RESERVED_1[272];
-  __IO uint32_t LOWPWR_CTRL;                       /**< XTAL OSC (LP) Control Register, offset: 0x270 */
-  __IO uint32_t LOWPWR_CTRL_SET;                   /**< XTAL OSC (LP) Control Register, offset: 0x274 */
-  __IO uint32_t LOWPWR_CTRL_CLR;                   /**< XTAL OSC (LP) Control Register, offset: 0x278 */
-  __IO uint32_t LOWPWR_CTRL_TOG;                   /**< XTAL OSC (LP) Control Register, offset: 0x27C */
-       uint8_t RESERVED_2[32];
-  __IO uint32_t OSC_CONFIG0;                       /**< XTAL OSC Configuration 0 Register, offset: 0x2A0 */
-  __IO uint32_t OSC_CONFIG0_SET;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2A4 */
-  __IO uint32_t OSC_CONFIG0_CLR;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2A8 */
-  __IO uint32_t OSC_CONFIG0_TOG;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2AC */
-  __IO uint32_t OSC_CONFIG1;                       /**< XTAL OSC Configuration 1 Register, offset: 0x2B0 */
-  __IO uint32_t OSC_CONFIG1_SET;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2B4 */
-  __IO uint32_t OSC_CONFIG1_CLR;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2B8 */
-  __IO uint32_t OSC_CONFIG1_TOG;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2BC */
-  __IO uint32_t OSC_CONFIG2;                       /**< XTAL OSC Configuration 2 Register, offset: 0x2C0 */
-  __IO uint32_t OSC_CONFIG2_SET;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2C4 */
-  __IO uint32_t OSC_CONFIG2_CLR;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2C8 */
-  __IO uint32_t OSC_CONFIG2_TOG;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2CC */
+typedef struct
+{
+    uint8_t RESERVED_0[336];
+    __IO uint32_t MISC0;     /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET; /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR; /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG; /**< Miscellaneous Register 0, offset: 0x15C */
+    uint8_t RESERVED_1[272];
+    __IO uint32_t LOWPWR_CTRL;     /**< XTAL OSC (LP) Control Register, offset: 0x270 */
+    __IO uint32_t LOWPWR_CTRL_SET; /**< XTAL OSC (LP) Control Register, offset: 0x274 */
+    __IO uint32_t LOWPWR_CTRL_CLR; /**< XTAL OSC (LP) Control Register, offset: 0x278 */
+    __IO uint32_t LOWPWR_CTRL_TOG; /**< XTAL OSC (LP) Control Register, offset: 0x27C */
+    uint8_t RESERVED_2[32];
+    __IO uint32_t OSC_CONFIG0;     /**< XTAL OSC Configuration 0 Register, offset: 0x2A0 */
+    __IO uint32_t OSC_CONFIG0_SET; /**< XTAL OSC Configuration 0 Register, offset: 0x2A4 */
+    __IO uint32_t OSC_CONFIG0_CLR; /**< XTAL OSC Configuration 0 Register, offset: 0x2A8 */
+    __IO uint32_t OSC_CONFIG0_TOG; /**< XTAL OSC Configuration 0 Register, offset: 0x2AC */
+    __IO uint32_t OSC_CONFIG1;     /**< XTAL OSC Configuration 1 Register, offset: 0x2B0 */
+    __IO uint32_t OSC_CONFIG1_SET; /**< XTAL OSC Configuration 1 Register, offset: 0x2B4 */
+    __IO uint32_t OSC_CONFIG1_CLR; /**< XTAL OSC Configuration 1 Register, offset: 0x2B8 */
+    __IO uint32_t OSC_CONFIG1_TOG; /**< XTAL OSC Configuration 1 Register, offset: 0x2BC */
+    __IO uint32_t OSC_CONFIG2;     /**< XTAL OSC Configuration 2 Register, offset: 0x2C0 */
+    __IO uint32_t OSC_CONFIG2_SET; /**< XTAL OSC Configuration 2 Register, offset: 0x2C4 */
+    __IO uint32_t OSC_CONFIG2_CLR; /**< XTAL OSC Configuration 2 Register, offset: 0x2C8 */
+    __IO uint32_t OSC_CONFIG2_TOG; /**< XTAL OSC Configuration 2 Register, offset: 0x2CC */
 } XTALOSC24M_Type;
 
 /* ----------------------------------------------------------------------------
@@ -26587,634 +30311,912 @@ typedef struct {
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_REFTOP_PWD_MASK         (0x1U)
-#define XTALOSC24M_MISC0_REFTOP_PWD_SHIFT        (0U)
-#define XTALOSC24M_MISC0_REFTOP_PWD(x)           (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_REFTOP_PWD(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK      (0x70U)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT     (4U)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP_MASK       (0x80U)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT      (7U)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK   (0xC00U)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT  (10U)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK   (0x1000U)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT  (12U)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_OSC_I_MASK              (0x6000U)
-#define XTALOSC24M_MISC0_OSC_I_SHIFT             (13U)
-#define XTALOSC24M_MISC0_OSC_I(x)                (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_I_SHIFT)) & XTALOSC24M_MISC0_OSC_I_MASK)
-#define XTALOSC24M_MISC0_OSC_XTALOK_MASK         (0x8000U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_SHIFT        (15U)
-#define XTALOSC24M_MISC0_OSC_XTALOK(x)           (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_MASK)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK      (0x10000U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT     (16U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL_MASK       (0x2000000U)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT      (25U)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_CTRL_MASK)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY_MASK      (0x1C000000U)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT     (26U)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK    (0x20000000U)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT   (29U)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD_MASK       (0x40000000U)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT      (30U)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK     (0x80000000U)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT    (31U)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_OSC_I(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_I_SHIFT)) & XTALOSC24M_MISC0_OSC_I_MASK)
+#define XTALOSC24M_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_OSC_XTALOK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT (31U)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_SET_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_SET_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_SET_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_I_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_I_MASK)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_SET_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_SET_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_I_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_I_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_CLR_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_CLR_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_CLR_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_I_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_I_MASK)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_CLR_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_CLR_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_I_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_I_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_TOG_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_TOG_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_TOG_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_I_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_I_MASK)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_TOG_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_TOG_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_I_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_I_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK    (0x1U)
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT   (0U)
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK      (0x10U)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT     (4U)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK     (0x20U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT    (5U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK    (0x40U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT   (6U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK  (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT (0U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK  (0x10U)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT (4U)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK  (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT (5U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK  (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT (6U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK   (0x100U)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT  (8U)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK   (0x200U)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT  (9U)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT)) &                                  \
+     XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK  (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT (8U)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK  (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT (9U)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT)) &                                 \
+     XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) &                                \
+     XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_SET - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_CLR - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_TOG - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0 - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_START_MASK        (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_START_SHIFT       (0U)
-#define XTALOSC24M_OSC_CONFIG0_START(x)          (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE_MASK       (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT      (1U)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS_MASK       (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT      (2U)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_INVERT_MASK       (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT      (3U)
-#define XTALOSC24M_OSC_CONFIG0_INVERT(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_START(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_INVERT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_INVERT_MASK)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK    (0xF000U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT   (12U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK   (0xF0000U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT  (16U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT)) &                                       \
+     XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK  (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT (12U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK  (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT (16U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_SET - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_SET_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_SET_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_CLR - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_CLR_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_TOG - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_TOG_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1 - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_SET - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_CLR - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_TOG - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2 - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK    (0x10000U)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT   (16U)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK       (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT      (17U)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK  (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT (16U)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_SET - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_CLR - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_TOG - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XTALOSC24M_Register_Masks */
 
-
 /* XTALOSC24M - Peripheral instance base addresses */
 /** Peripheral XTALOSC24M base address */
-#define XTALOSC24M_BASE                          (0x400D8000u)
+#define XTALOSC24M_BASE (0x400D8000u)
 /** Peripheral XTALOSC24M base pointer */
-#define XTALOSC24M                               ((XTALOSC24M_Type *)XTALOSC24M_BASE)
+#define XTALOSC24M ((XTALOSC24M_Type *)XTALOSC24M_BASE)
 /** Array initializer of XTALOSC24M peripheral base addresses */
-#define XTALOSC24M_BASE_ADDRS                    { XTALOSC24M_BASE }
+#define XTALOSC24M_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        XTALOSC24M_BASE                                                                                                \
+    }
 /** Array initializer of XTALOSC24M peripheral base pointers */
-#define XTALOSC24M_BASE_PTRS                     { XTALOSC24M }
+#define XTALOSC24M_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        XTALOSC24M                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group XTALOSC24M_Peripheral_Access_Layer */
 
-
 /*
 ** End of section using anonymous unions
 */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang diagnostic pop
-  #else
-    #pragma pop
-  #endif
-#elif defined(__CWCC__)
-  #pragma pop
-#elif defined(__GNUC__)
-  /* leave anonymous unions enabled */
-#elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma language=default
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang diagnostic pop
 #else
-  #error Not supported compiler type
+#pragma pop
+#endif
+#elif defined(__CWCC__)
+#pragma pop
+#elif defined(__GNUC__)
+/* leave anonymous unions enabled */
+#elif defined(__IAR_SYSTEMS_ICC__)
+#pragma language = default
+#else
+#error Not supported compiler type
 #endif
 
 /*!
  * @}
  */ /* end of group Peripheral_access_layer */
 
-
 /* ----------------------------------------------------------------------------
    -- Macros for use with bit field definitions (xxx_SHIFT, xxx_MASK).
    ---------------------------------------------------------------------------- */
@@ -27225,11 +31227,11 @@ typedef struct {
  */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang system_header
-  #endif
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang system_header
+#endif
 #elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma system_include
+#pragma system_include
 #endif
 
 /**
@@ -27238,20 +31240,19 @@ typedef struct {
  * @param value Value of the bit field.
  * @return Masked and shifted value.
  */
-#define NXP_VAL2FLD(field, value)    (((value) << (field ## _SHIFT)) & (field ## _MASK))
+#define NXP_VAL2FLD(field, value) (((value) << (field##_SHIFT)) & (field##_MASK))
 /**
  * @brief Mask and right-shift a register value to extract a bit field value.
  * @param field Name of the register bit field.
  * @param value Value of the register.
  * @return Masked and shifted bit field value.
  */
-#define NXP_FLD2VAL(field, value)    (((value) & (field ## _MASK)) >> (field ## _SHIFT))
+#define NXP_FLD2VAL(field, value) (((value) & (field##_MASK)) >> (field##_SHIFT))
 
 /*!
  * @}
  */ /* end of group Bit_Field_Generic_Macros */
 
-
 /* ----------------------------------------------------------------------------
    -- SDK Compatibility
    ---------------------------------------------------------------------------- */
@@ -27267,6 +31268,4 @@ typedef struct {
  * @}
  */ /* end of group SDK_Compatibility_Symbols */
 
-
-#endif  /* _MIMXRT1051_H_ */
-
+#endif /* _MIMXRT1051_H_ */
diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h b/module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h
index 5b92bf59b..43fcf47a8 100644
--- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h
+++ b/module-bsp/board/rt1051/common/cmsis/MIMXRT1051_features.h
@@ -189,7 +189,8 @@
 #define FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA (0)
 /* @brief Remove CAN Engine Clock Source Selection from unsupported part. */
 #define FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE (1)
-/* @brief Is affected by errata with ID 5641 (Module does not transmit a message that is enabled to be transmitted at a specific moment during the arbitration process). */
+/* @brief Is affected by errata with ID 5641 (Module does not transmit a message that is enabled to be transmitted at a
+ * specific moment during the arbitration process). */
 #define FSL_FEATURE_FLEXCAN_HAS_ERRATA_5641 (0)
 /* @brief Has CAN with Flexible Data rate (CAN FD) protocol. */
 #define FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE (0)
@@ -213,11 +214,15 @@
 
 /* EDMA module features */
 
-/* @brief Number of DMA channels (related to number of registers TCD, DCHPRI, bit fields ERQ[ERQn], EEI[EEIn], INT[INTn], ERR[ERRn], HRS[HRSn] and bit field widths ES[ERRCHN], CEEI[CEEI], SEEI[SEEI], CERQ[CERQ], SERQ[SERQ], CDNE[CDNE], SSRT[SSRT], CERR[CERR], CINT[CINT], TCDn_CITER_ELINKYES[LINKCH], TCDn_CSR[MAJORLINKCH], TCDn_BITER_ELINKYES[LINKCH]). (Valid only for eDMA modules.) */
+/* @brief Number of DMA channels (related to number of registers TCD, DCHPRI, bit fields ERQ[ERQn], EEI[EEIn],
+ * INT[INTn], ERR[ERRn], HRS[HRSn] and bit field widths ES[ERRCHN], CEEI[CEEI], SEEI[SEEI], CERQ[CERQ], SERQ[SERQ],
+ * CDNE[CDNE], SSRT[SSRT], CERR[CERR], CINT[CINT], TCDn_CITER_ELINKYES[LINKCH], TCDn_CSR[MAJORLINKCH],
+ * TCDn_BITER_ELINKYES[LINKCH]). (Valid only for eDMA modules.) */
 #define FSL_FEATURE_EDMA_MODULE_CHANNEL (32)
 /* @brief Total number of DMA channels on all modules. */
 #define FSL_FEATURE_EDMA_DMAMUX_CHANNELS (32)
-/* @brief Number of DMA channel groups (register bit fields CR[ERGA], CR[GRPnPRI], ES[GPE], DCHPRIn[GRPPRI]). (Valid only for eDMA modules.) */
+/* @brief Number of DMA channel groups (register bit fields CR[ERGA], CR[GRPnPRI], ES[GPE], DCHPRIn[GRPPRI]). (Valid
+ * only for eDMA modules.) */
 #define FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT (1)
 /* @brief Has DMA_Error interrupt vector. */
 #define FSL_FEATURE_EDMA_HAS_ERROR_IRQ (1)
@@ -331,7 +336,8 @@
 
 /* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
 #define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
-/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
+/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the
+ * registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
 /* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
@@ -351,7 +357,8 @@
 #define FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT (1)
 /* @brief Baud rate fine adjustment is available. */
 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
-/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
+/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR],
+ * BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
 /* @brief Baud rate oversampling is available. */
 #define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
@@ -367,11 +374,13 @@
 #define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
 /* @brief Supports two match addresses to filter incoming frames. */
 #define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
-/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
+/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are
+ * 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
 /* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
 #define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
-/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
+/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit
+ * wide). */
 #define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
 #define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
@@ -459,21 +468,28 @@
 
 /* SAI module features */
 
-/* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW], RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
+/* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW],
+ * RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
 #define FSL_FEATURE_SAI_FIFO_COUNT (32)
 /* @brief Receive/transmit channel number (register bit fields TCR3[TCE], RCR3[RCE], registers TDRn and RDRn). */
 #define FSL_FEATURE_SAI_CHANNEL_COUNT (4)
-/* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ], RMR[RWM]). */
+/* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ],
+ * RMR[RWM]). */
 #define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (32)
-/* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR], TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
+/* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR],
+ * TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (1)
-/* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK], RCR4[FPACK]). */
+/* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK],
+ * RCR4[FPACK]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_PACKING (1)
-/* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields TCR4[FCONT], RCR4[FCONT]). */
+/* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields
+ * TCR4[FCONT], RCR4[FCONT]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR (1)
-/* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
+/* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning
+ * flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
 #define FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE (1)
-/* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE], RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
+/* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE],
+ * RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
 #define FSL_FEATURE_SAI_HAS_CLOCKING_MODE (0)
 /* @brief Has register for configuration of the MCLK divide ratio (register bit fields MDR[FRACT], MDR[DIVIDE]). */
 #define FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER (0)
@@ -586,4 +602,3 @@
 #define FSL_FEATURE_XBARA_OUTPUT_DMA_CH_MUX_REQ_95 (1)
 
 #endif /* _MIMXRT1051_FEATURES_H_ */
-
diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h b/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h
index af465b4aa..3a21ea4d9 100644
--- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h
+++ b/module-bsp/board/rt1051/common/cmsis/MIMXRT1052.h
@@ -71,7 +71,7 @@
  */
 
 #ifndef _MIMXRT1051_H_
-#define _MIMXRT1051_H_                           /**< Symbol preventing repeated inclusion */
+#define _MIMXRT1051_H_ /**< Symbol preventing repeated inclusion */
 
 /** Memory map major version (memory maps with equal major version number are
  * compatible) */
@@ -79,7 +79,6 @@
 /** Memory map minor version */
 #define MCU_MEM_MAP_VERSION_MINOR 0x0001U
 
-
 /* ----------------------------------------------------------------------------
    -- Interrupt vector numbers
    ---------------------------------------------------------------------------- */
@@ -90,191 +89,191 @@
  */
 
 /** Interrupt Number Definitions */
-#define NUMBER_OF_INT_VECTORS 176                /**< Number of interrupts in the Vector table */
+#define NUMBER_OF_INT_VECTORS 176 /**< Number of interrupts in the Vector table */
 
-typedef enum IRQn {
-  /* Auxiliary constants */
-  NotAvail_IRQn                = -128,             /**< Not available device specific interrupt */
+typedef enum IRQn
+{
+    /* Auxiliary constants */
+    NotAvail_IRQn = -128, /**< Not available device specific interrupt */
 
-  /* Core interrupts */
-  NonMaskableInt_IRQn          = -14,              /**< Non Maskable Interrupt */
-  HardFault_IRQn               = -13,              /**< Cortex-M7 SV Hard Fault Interrupt */
-  MemoryManagement_IRQn        = -12,              /**< Cortex-M7 Memory Management Interrupt */
-  BusFault_IRQn                = -11,              /**< Cortex-M7 Bus Fault Interrupt */
-  UsageFault_IRQn              = -10,              /**< Cortex-M7 Usage Fault Interrupt */
-  SVCall_IRQn                  = -5,               /**< Cortex-M7 SV Call Interrupt */
-  DebugMonitor_IRQn            = -4,               /**< Cortex-M7 Debug Monitor Interrupt */
-  PendSV_IRQn                  = -2,               /**< Cortex-M7 Pend SV Interrupt */
-  SysTick_IRQn                 = -1,               /**< Cortex-M7 System Tick Interrupt */
+    /* Core interrupts */
+    NonMaskableInt_IRQn   = -14, /**< Non Maskable Interrupt */
+    HardFault_IRQn        = -13, /**< Cortex-M7 SV Hard Fault Interrupt */
+    MemoryManagement_IRQn = -12, /**< Cortex-M7 Memory Management Interrupt */
+    BusFault_IRQn         = -11, /**< Cortex-M7 Bus Fault Interrupt */
+    UsageFault_IRQn       = -10, /**< Cortex-M7 Usage Fault Interrupt */
+    SVCall_IRQn           = -5,  /**< Cortex-M7 SV Call Interrupt */
+    DebugMonitor_IRQn     = -4,  /**< Cortex-M7 Debug Monitor Interrupt */
+    PendSV_IRQn           = -2,  /**< Cortex-M7 Pend SV Interrupt */
+    SysTick_IRQn          = -1,  /**< Cortex-M7 System Tick Interrupt */
 
-  /* Device specific interrupts */
-  DMA0_DMA16_IRQn              = 0,                /**< DMA channel 0/16 transfer complete */
-  DMA1_DMA17_IRQn              = 1,                /**< DMA channel 1/17 transfer complete */
-  DMA2_DMA18_IRQn              = 2,                /**< DMA channel 2/18 transfer complete */
-  DMA3_DMA19_IRQn              = 3,                /**< DMA channel 3/19 transfer complete */
-  DMA4_DMA20_IRQn              = 4,                /**< DMA channel 4/20 transfer complete */
-  DMA5_DMA21_IRQn              = 5,                /**< DMA channel 5/21 transfer complete */
-  DMA6_DMA22_IRQn              = 6,                /**< DMA channel 6/22 transfer complete */
-  DMA7_DMA23_IRQn              = 7,                /**< DMA channel 7/23 transfer complete */
-  DMA8_DMA24_IRQn              = 8,                /**< DMA channel 8/24 transfer complete */
-  DMA9_DMA25_IRQn              = 9,                /**< DMA channel 9/25 transfer complete */
-  DMA10_DMA26_IRQn             = 10,               /**< DMA channel 10/26 transfer complete */
-  DMA11_DMA27_IRQn             = 11,               /**< DMA channel 11/27 transfer complete */
-  DMA12_DMA28_IRQn             = 12,               /**< DMA channel 12/28 transfer complete */
-  DMA13_DMA29_IRQn             = 13,               /**< DMA channel 13/29 transfer complete */
-  DMA14_DMA30_IRQn             = 14,               /**< DMA channel 14/30 transfer complete */
-  DMA15_DMA31_IRQn             = 15,               /**< DMA channel 15/31 transfer complete */
-  DMA_ERROR_IRQn               = 16,               /**< DMA error interrupt channels 0-15 / 16-31 */
-  CTI0_ERROR_IRQn              = 17,               /**< CTI0_Error */
-  CTI1_ERROR_IRQn              = 18,               /**< CTI1_Error */
-  CORE_IRQn                    = 19,               /**< CorePlatform exception IRQ */
-  LPUART1_IRQn                 = 20,               /**< LPUART1 TX interrupt and RX interrupt */
-  LPUART2_IRQn                 = 21,               /**< LPUART2 TX interrupt and RX interrupt */
-  LPUART3_IRQn                 = 22,               /**< LPUART3 TX interrupt and RX interrupt */
-  LPUART4_IRQn                 = 23,               /**< LPUART4 TX interrupt and RX interrupt */
-  LPUART5_IRQn                 = 24,               /**< LPUART5 TX interrupt and RX interrupt */
-  LPUART6_IRQn                 = 25,               /**< LPUART6 TX interrupt and RX interrupt */
-  LPUART7_IRQn                 = 26,               /**< LPUART7 TX interrupt and RX interrupt */
-  LPUART8_IRQn                 = 27,               /**< LPUART8 TX interrupt and RX interrupt */
-  LPI2C1_IRQn                  = 28,               /**< LPI2C1 interrupt */
-  LPI2C2_IRQn                  = 29,               /**< LPI2C2 interrupt */
-  LPI2C3_IRQn                  = 30,               /**< LPI2C3 interrupt */
-  LPI2C4_IRQn                  = 31,               /**< LPI2C4 interrupt */
-  LPSPI1_IRQn                  = 32,               /**< LPSPI1 single interrupt vector for all sources */
-  LPSPI2_IRQn                  = 33,               /**< LPSPI2 single interrupt vector for all sources */
-  LPSPI3_IRQn                  = 34,               /**< LPSPI3 single interrupt vector for all sources */
-  LPSPI4_IRQn                  = 35,               /**< LPSPI4  single interrupt vector for all sources */
-  CAN1_IRQn                    = 36,               /**< CAN1 interrupt */
-  CAN2_IRQn                    = 37,               /**< CAN2 interrupt */
-  FLEXRAM_IRQn                 = 38,               /**< FlexRAM address out of range Or access hit IRQ */
-  KPP_IRQn                     = 39,               /**< Keypad nterrupt */
-  TSC_DIG_IRQn                 = 40,               /**< TSC interrupt */
-  GPR_IRQ_IRQn                 = 41,               /**< GPR interrupt */
-  Reserved58_IRQn              = 42,               /**< Reserved interrupt */
-  Reserved59_IRQn              = 43,               /**< Reserved interrupt */
-  Reserved60_IRQn              = 44,               /**< Reserved interrupt */
-  WDOG2_IRQn                   = 45,               /**< WDOG2 interrupt */
-  SNVS_HP_WRAPPER_IRQn         = 46,               /**< SRTC Consolidated Interrupt. Non TZ */
-  SNVS_HP_WRAPPER_TZ_IRQn      = 47,               /**< SRTC Security Interrupt. TZ */
-  SNVS_LP_WRAPPER_IRQn         = 48,               /**< ON-OFF button press shorter than 5 secs (pulse event) */
-  CSU_IRQn                     = 49,               /**< CSU interrupt */
-  DCP_IRQn                     = 50,               /**< DCP_IRQ interrupt */
-  DCP_VMI_IRQn                 = 51,               /**< DCP_VMI_IRQ interrupt */
-  Reserved68_IRQn              = 52,               /**< Reserved interrupt */
-  TRNG_IRQn                    = 53,               /**< TRNG interrupt */
-  SJC_IRQn                     = 54,               /**< SJC interrupt */
-  BEE_IRQn                     = 55,               /**< BEE interrupt */
-  SAI1_IRQn                    = 56,               /**< SAI1 interrupt */
-  SAI2_IRQn                    = 57,               /**< SAI1 interrupt */
-  SAI3_RX_IRQn                 = 58,               /**< SAI3 interrupt */
-  SAI3_TX_IRQn                 = 59,               /**< SAI3 interrupt */
-  SPDIF_IRQn                   = 60,               /**< SPDIF interrupt */
-  ANATOP_EVENT0_IRQn           = 61,               /**< ANATOP interrupt */
-  ANATOP_EVENT1_IRQn           = 62,               /**< ANATOP interrupt */
-  ANATOP_TAMP_LOW_HIGH_IRQn    = 63,               /**< ANATOP interrupt */
-  ANATOP_TEMP_PANIC_IRQn       = 64,               /**< ANATOP interrupt */
-  USB_PHY1_IRQn                = 65,               /**< USBPHY (UTMI0), Interrupt */
-  USB_PHY2_IRQn                = 66,               /**< USBPHY (UTMI0), Interrupt */
-  ADC1_IRQn                    = 67,               /**< ADC1 interrupt */
-  ADC2_IRQn                    = 68,               /**< ADC2 interrupt */
-  DCDC_IRQn                    = 69,               /**< DCDC interrupt */
-  Reserved86_IRQn              = 70,               /**< Reserved interrupt */
-  Reserved87_IRQn              = 71,               /**< Reserved interrupt */
-  GPIO1_INT0_IRQn              = 72,               /**< Active HIGH Interrupt from INT0 from GPIO */
-  GPIO1_INT1_IRQn              = 73,               /**< Active HIGH Interrupt from INT1 from GPIO */
-  GPIO1_INT2_IRQn              = 74,               /**< Active HIGH Interrupt from INT2 from GPIO */
-  GPIO1_INT3_IRQn              = 75,               /**< Active HIGH Interrupt from INT3 from GPIO */
-  GPIO1_INT4_IRQn              = 76,               /**< Active HIGH Interrupt from INT4 from GPIO */
-  GPIO1_INT5_IRQn              = 77,               /**< Active HIGH Interrupt from INT5 from GPIO */
-  GPIO1_INT6_IRQn              = 78,               /**< Active HIGH Interrupt from INT6 from GPIO */
-  GPIO1_INT7_IRQn              = 79,               /**< Active HIGH Interrupt from INT7 from GPIO */
-  GPIO1_Combined_0_15_IRQn     = 80,               /**< Combined interrupt indication for GPIO1 signal 0 throughout 15 */
-  GPIO1_Combined_16_31_IRQn    = 81,               /**< Combined interrupt indication for GPIO1 signal 16 throughout 31 */
-  GPIO2_Combined_0_15_IRQn     = 82,               /**< Combined interrupt indication for GPIO2 signal 0 throughout 15 */
-  GPIO2_Combined_16_31_IRQn    = 83,               /**< Combined interrupt indication for GPIO2 signal 16 throughout 31 */
-  GPIO3_Combined_0_15_IRQn     = 84,               /**< Combined interrupt indication for GPIO3 signal 0 throughout 15 */
-  GPIO3_Combined_16_31_IRQn    = 85,               /**< Combined interrupt indication for GPIO3 signal 16 throughout 31 */
-  GPIO4_Combined_0_15_IRQn     = 86,               /**< Combined interrupt indication for GPIO4 signal 0 throughout 15 */
-  GPIO4_Combined_16_31_IRQn    = 87,               /**< Combined interrupt indication for GPIO4 signal 16 throughout 31 */
-  GPIO5_Combined_0_15_IRQn     = 88,               /**< Combined interrupt indication for GPIO5 signal 0 throughout 15 */
-  GPIO5_Combined_16_31_IRQn    = 89,               /**< Combined interrupt indication for GPIO5 signal 16 throughout 31 */
-  FLEXIO1_IRQn                 = 90,               /**< FLEXIO1 interrupt */
-  FLEXIO2_IRQn                 = 91,               /**< FLEXIO2 interrupt */
-  WDOG1_IRQn                   = 92,               /**< WDOG1 interrupt */
-  RTWDOG_IRQn                  = 93,               /**< RTWDOG interrupt */
-  EWM_IRQn                     = 94,               /**< EWM interrupt */
-  CCM_1_IRQn                   = 95,               /**< CCM IRQ1 interrupt */
-  CCM_2_IRQn                   = 96,               /**< CCM IRQ2 interrupt */
-  GPC_IRQn                     = 97,               /**< GPC interrupt */
-  SRC_IRQn                     = 98,               /**< SRC interrupt */
-  Reserved115_IRQn             = 99,               /**< Reserved interrupt */
-  GPT1_IRQn                    = 100,              /**< GPT1 interrupt */
-  GPT2_IRQn                    = 101,              /**< GPT2 interrupt */
-  PWM1_0_IRQn                  = 102,              /**< PWM1 capture 0, compare 0, or reload 0 interrupt */
-  PWM1_1_IRQn                  = 103,              /**< PWM1 capture 1, compare 1, or reload 0 interrupt */
-  PWM1_2_IRQn                  = 104,              /**< PWM1 capture 2, compare 2, or reload 0 interrupt */
-  PWM1_3_IRQn                  = 105,              /**< PWM1 capture 3, compare 3, or reload 0 interrupt */
-  PWM1_FAULT_IRQn              = 106,              /**< PWM1 fault or reload error interrupt */
-  Reserved123_IRQn             = 107,              /**< Reserved interrupt */
-  FLEXSPI_IRQn                 = 108,              /**< FlexSPI0 interrupt */
-  SEMC_IRQn                    = 109,              /**< Reserved interrupt */
-  USDHC1_IRQn                  = 110,              /**< USDHC1 interrupt */
-  USDHC2_IRQn                  = 111,              /**< USDHC2 interrupt */
-  USB_OTG2_IRQn                = 112,              /**< USBO2 USB OTG2 */
-  USB_OTG1_IRQn                = 113,              /**< USBO2 USB OTG1 */
-  ENET_IRQn                    = 114,              /**< ENET interrupt */
-  ENET_1588_Timer_IRQn         = 115,              /**< ENET_1588_Timer interrupt */
-  XBAR1_IRQ_0_1_IRQn           = 116,              /**< XBAR1 interrupt */
-  XBAR1_IRQ_2_3_IRQn           = 117,              /**< XBAR1 interrupt */
-  ADC_ETC_IRQ0_IRQn            = 118,              /**< ADCETC IRQ0 interrupt */
-  ADC_ETC_IRQ1_IRQn            = 119,              /**< ADCETC IRQ1 interrupt */
-  ADC_ETC_IRQ2_IRQn            = 120,              /**< ADCETC IRQ2 interrupt */
-  ADC_ETC_ERROR_IRQ_IRQn       = 121,              /**< ADCETC Error IRQ interrupt */
-  PIT_IRQn                     = 122,              /**< PIT interrupt */
-  ACMP1_IRQn                   = 123,              /**< ACMP interrupt */
-  ACMP2_IRQn                   = 124,              /**< ACMP interrupt */
-  ACMP3_IRQn                   = 125,              /**< ACMP interrupt */
-  ACMP4_IRQn                   = 126,              /**< ACMP interrupt */
-  Reserved143_IRQn             = 127,              /**< Reserved interrupt */
-  Reserved144_IRQn             = 128,              /**< Reserved interrupt */
-  ENC1_IRQn                    = 129,              /**< ENC1 interrupt */
-  ENC2_IRQn                    = 130,              /**< ENC2 interrupt */
-  ENC3_IRQn                    = 131,              /**< ENC3 interrupt */
-  ENC4_IRQn                    = 132,              /**< ENC4 interrupt */
-  TMR1_IRQn                    = 133,              /**< TMR1 interrupt */
-  TMR2_IRQn                    = 134,              /**< TMR2 interrupt */
-  TMR3_IRQn                    = 135,              /**< TMR3 interrupt */
-  TMR4_IRQn                    = 136,              /**< TMR4 interrupt */
-  PWM2_0_IRQn                  = 137,              /**< PWM2 capture 0, compare 0, or reload 0 interrupt */
-  PWM2_1_IRQn                  = 138,              /**< PWM2 capture 1, compare 1, or reload 0 interrupt */
-  PWM2_2_IRQn                  = 139,              /**< PWM2 capture 2, compare 2, or reload 0 interrupt */
-  PWM2_3_IRQn                  = 140,              /**< PWM2 capture 3, compare 3, or reload 0 interrupt */
-  PWM2_FAULT_IRQn              = 141,              /**< PWM2 fault or reload error interrupt */
-  PWM3_0_IRQn                  = 142,              /**< PWM3 capture 0, compare 0, or reload 0 interrupt */
-  PWM3_1_IRQn                  = 143,              /**< PWM3 capture 1, compare 1, or reload 0 interrupt */
-  PWM3_2_IRQn                  = 144,              /**< PWM3 capture 2, compare 2, or reload 0 interrupt */
-  PWM3_3_IRQn                  = 145,              /**< PWM3 capture 3, compare 3, or reload 0 interrupt */
-  PWM3_FAULT_IRQn              = 146,              /**< PWM3 fault or reload error interrupt */
-  PWM4_0_IRQn                  = 147,              /**< PWM4 capture 0, compare 0, or reload 0 interrupt */
-  PWM4_1_IRQn                  = 148,              /**< PWM4 capture 1, compare 1, or reload 0 interrupt */
-  PWM4_2_IRQn                  = 149,              /**< PWM4 capture 2, compare 2, or reload 0 interrupt */
-  PWM4_3_IRQn                  = 150,              /**< PWM4 capture 3, compare 3, or reload 0 interrupt */
-  PWM4_FAULT_IRQn              = 151,              /**< PWM4 fault or reload error interrupt */
-  Reserved168_IRQn             = 152,              /**< Reserved interrupt */
-  Reserved169_IRQn             = 153,              /**< Reserved interrupt */
-  Reserved170_IRQn             = 154,              /**< Reserved interrupt */
-  Reserved171_IRQn             = 155,              /**< Reserved interrupt */
-  Reserved172_IRQn             = 156,              /**< Reserved interrupt */
-  Reserved173_IRQn             = 157,              /**< Reserved interrupt */
-  SJC_ARM_DEBUG_IRQn           = 158,              /**< SJC ARM debug interrupt */
-  NMI_WAKEUP_IRQn              = 159               /**< NMI wake up */
+    /* Device specific interrupts */
+    DMA0_DMA16_IRQn           = 0,   /**< DMA channel 0/16 transfer complete */
+    DMA1_DMA17_IRQn           = 1,   /**< DMA channel 1/17 transfer complete */
+    DMA2_DMA18_IRQn           = 2,   /**< DMA channel 2/18 transfer complete */
+    DMA3_DMA19_IRQn           = 3,   /**< DMA channel 3/19 transfer complete */
+    DMA4_DMA20_IRQn           = 4,   /**< DMA channel 4/20 transfer complete */
+    DMA5_DMA21_IRQn           = 5,   /**< DMA channel 5/21 transfer complete */
+    DMA6_DMA22_IRQn           = 6,   /**< DMA channel 6/22 transfer complete */
+    DMA7_DMA23_IRQn           = 7,   /**< DMA channel 7/23 transfer complete */
+    DMA8_DMA24_IRQn           = 8,   /**< DMA channel 8/24 transfer complete */
+    DMA9_DMA25_IRQn           = 9,   /**< DMA channel 9/25 transfer complete */
+    DMA10_DMA26_IRQn          = 10,  /**< DMA channel 10/26 transfer complete */
+    DMA11_DMA27_IRQn          = 11,  /**< DMA channel 11/27 transfer complete */
+    DMA12_DMA28_IRQn          = 12,  /**< DMA channel 12/28 transfer complete */
+    DMA13_DMA29_IRQn          = 13,  /**< DMA channel 13/29 transfer complete */
+    DMA14_DMA30_IRQn          = 14,  /**< DMA channel 14/30 transfer complete */
+    DMA15_DMA31_IRQn          = 15,  /**< DMA channel 15/31 transfer complete */
+    DMA_ERROR_IRQn            = 16,  /**< DMA error interrupt channels 0-15 / 16-31 */
+    CTI0_ERROR_IRQn           = 17,  /**< CTI0_Error */
+    CTI1_ERROR_IRQn           = 18,  /**< CTI1_Error */
+    CORE_IRQn                 = 19,  /**< CorePlatform exception IRQ */
+    LPUART1_IRQn              = 20,  /**< LPUART1 TX interrupt and RX interrupt */
+    LPUART2_IRQn              = 21,  /**< LPUART2 TX interrupt and RX interrupt */
+    LPUART3_IRQn              = 22,  /**< LPUART3 TX interrupt and RX interrupt */
+    LPUART4_IRQn              = 23,  /**< LPUART4 TX interrupt and RX interrupt */
+    LPUART5_IRQn              = 24,  /**< LPUART5 TX interrupt and RX interrupt */
+    LPUART6_IRQn              = 25,  /**< LPUART6 TX interrupt and RX interrupt */
+    LPUART7_IRQn              = 26,  /**< LPUART7 TX interrupt and RX interrupt */
+    LPUART8_IRQn              = 27,  /**< LPUART8 TX interrupt and RX interrupt */
+    LPI2C1_IRQn               = 28,  /**< LPI2C1 interrupt */
+    LPI2C2_IRQn               = 29,  /**< LPI2C2 interrupt */
+    LPI2C3_IRQn               = 30,  /**< LPI2C3 interrupt */
+    LPI2C4_IRQn               = 31,  /**< LPI2C4 interrupt */
+    LPSPI1_IRQn               = 32,  /**< LPSPI1 single interrupt vector for all sources */
+    LPSPI2_IRQn               = 33,  /**< LPSPI2 single interrupt vector for all sources */
+    LPSPI3_IRQn               = 34,  /**< LPSPI3 single interrupt vector for all sources */
+    LPSPI4_IRQn               = 35,  /**< LPSPI4  single interrupt vector for all sources */
+    CAN1_IRQn                 = 36,  /**< CAN1 interrupt */
+    CAN2_IRQn                 = 37,  /**< CAN2 interrupt */
+    FLEXRAM_IRQn              = 38,  /**< FlexRAM address out of range Or access hit IRQ */
+    KPP_IRQn                  = 39,  /**< Keypad nterrupt */
+    TSC_DIG_IRQn              = 40,  /**< TSC interrupt */
+    GPR_IRQ_IRQn              = 41,  /**< GPR interrupt */
+    Reserved58_IRQn           = 42,  /**< Reserved interrupt */
+    Reserved59_IRQn           = 43,  /**< Reserved interrupt */
+    Reserved60_IRQn           = 44,  /**< Reserved interrupt */
+    WDOG2_IRQn                = 45,  /**< WDOG2 interrupt */
+    SNVS_HP_WRAPPER_IRQn      = 46,  /**< SRTC Consolidated Interrupt. Non TZ */
+    SNVS_HP_WRAPPER_TZ_IRQn   = 47,  /**< SRTC Security Interrupt. TZ */
+    SNVS_LP_WRAPPER_IRQn      = 48,  /**< ON-OFF button press shorter than 5 secs (pulse event) */
+    CSU_IRQn                  = 49,  /**< CSU interrupt */
+    DCP_IRQn                  = 50,  /**< DCP_IRQ interrupt */
+    DCP_VMI_IRQn              = 51,  /**< DCP_VMI_IRQ interrupt */
+    Reserved68_IRQn           = 52,  /**< Reserved interrupt */
+    TRNG_IRQn                 = 53,  /**< TRNG interrupt */
+    SJC_IRQn                  = 54,  /**< SJC interrupt */
+    BEE_IRQn                  = 55,  /**< BEE interrupt */
+    SAI1_IRQn                 = 56,  /**< SAI1 interrupt */
+    SAI2_IRQn                 = 57,  /**< SAI1 interrupt */
+    SAI3_RX_IRQn              = 58,  /**< SAI3 interrupt */
+    SAI3_TX_IRQn              = 59,  /**< SAI3 interrupt */
+    SPDIF_IRQn                = 60,  /**< SPDIF interrupt */
+    ANATOP_EVENT0_IRQn        = 61,  /**< ANATOP interrupt */
+    ANATOP_EVENT1_IRQn        = 62,  /**< ANATOP interrupt */
+    ANATOP_TAMP_LOW_HIGH_IRQn = 63,  /**< ANATOP interrupt */
+    ANATOP_TEMP_PANIC_IRQn    = 64,  /**< ANATOP interrupt */
+    USB_PHY1_IRQn             = 65,  /**< USBPHY (UTMI0), Interrupt */
+    USB_PHY2_IRQn             = 66,  /**< USBPHY (UTMI0), Interrupt */
+    ADC1_IRQn                 = 67,  /**< ADC1 interrupt */
+    ADC2_IRQn                 = 68,  /**< ADC2 interrupt */
+    DCDC_IRQn                 = 69,  /**< DCDC interrupt */
+    Reserved86_IRQn           = 70,  /**< Reserved interrupt */
+    Reserved87_IRQn           = 71,  /**< Reserved interrupt */
+    GPIO1_INT0_IRQn           = 72,  /**< Active HIGH Interrupt from INT0 from GPIO */
+    GPIO1_INT1_IRQn           = 73,  /**< Active HIGH Interrupt from INT1 from GPIO */
+    GPIO1_INT2_IRQn           = 74,  /**< Active HIGH Interrupt from INT2 from GPIO */
+    GPIO1_INT3_IRQn           = 75,  /**< Active HIGH Interrupt from INT3 from GPIO */
+    GPIO1_INT4_IRQn           = 76,  /**< Active HIGH Interrupt from INT4 from GPIO */
+    GPIO1_INT5_IRQn           = 77,  /**< Active HIGH Interrupt from INT5 from GPIO */
+    GPIO1_INT6_IRQn           = 78,  /**< Active HIGH Interrupt from INT6 from GPIO */
+    GPIO1_INT7_IRQn           = 79,  /**< Active HIGH Interrupt from INT7 from GPIO */
+    GPIO1_Combined_0_15_IRQn  = 80,  /**< Combined interrupt indication for GPIO1 signal 0 throughout 15 */
+    GPIO1_Combined_16_31_IRQn = 81,  /**< Combined interrupt indication for GPIO1 signal 16 throughout 31 */
+    GPIO2_Combined_0_15_IRQn  = 82,  /**< Combined interrupt indication for GPIO2 signal 0 throughout 15 */
+    GPIO2_Combined_16_31_IRQn = 83,  /**< Combined interrupt indication for GPIO2 signal 16 throughout 31 */
+    GPIO3_Combined_0_15_IRQn  = 84,  /**< Combined interrupt indication for GPIO3 signal 0 throughout 15 */
+    GPIO3_Combined_16_31_IRQn = 85,  /**< Combined interrupt indication for GPIO3 signal 16 throughout 31 */
+    GPIO4_Combined_0_15_IRQn  = 86,  /**< Combined interrupt indication for GPIO4 signal 0 throughout 15 */
+    GPIO4_Combined_16_31_IRQn = 87,  /**< Combined interrupt indication for GPIO4 signal 16 throughout 31 */
+    GPIO5_Combined_0_15_IRQn  = 88,  /**< Combined interrupt indication for GPIO5 signal 0 throughout 15 */
+    GPIO5_Combined_16_31_IRQn = 89,  /**< Combined interrupt indication for GPIO5 signal 16 throughout 31 */
+    FLEXIO1_IRQn              = 90,  /**< FLEXIO1 interrupt */
+    FLEXIO2_IRQn              = 91,  /**< FLEXIO2 interrupt */
+    WDOG1_IRQn                = 92,  /**< WDOG1 interrupt */
+    RTWDOG_IRQn               = 93,  /**< RTWDOG interrupt */
+    EWM_IRQn                  = 94,  /**< EWM interrupt */
+    CCM_1_IRQn                = 95,  /**< CCM IRQ1 interrupt */
+    CCM_2_IRQn                = 96,  /**< CCM IRQ2 interrupt */
+    GPC_IRQn                  = 97,  /**< GPC interrupt */
+    SRC_IRQn                  = 98,  /**< SRC interrupt */
+    Reserved115_IRQn          = 99,  /**< Reserved interrupt */
+    GPT1_IRQn                 = 100, /**< GPT1 interrupt */
+    GPT2_IRQn                 = 101, /**< GPT2 interrupt */
+    PWM1_0_IRQn               = 102, /**< PWM1 capture 0, compare 0, or reload 0 interrupt */
+    PWM1_1_IRQn               = 103, /**< PWM1 capture 1, compare 1, or reload 0 interrupt */
+    PWM1_2_IRQn               = 104, /**< PWM1 capture 2, compare 2, or reload 0 interrupt */
+    PWM1_3_IRQn               = 105, /**< PWM1 capture 3, compare 3, or reload 0 interrupt */
+    PWM1_FAULT_IRQn           = 106, /**< PWM1 fault or reload error interrupt */
+    Reserved123_IRQn          = 107, /**< Reserved interrupt */
+    FLEXSPI_IRQn              = 108, /**< FlexSPI0 interrupt */
+    SEMC_IRQn                 = 109, /**< Reserved interrupt */
+    USDHC1_IRQn               = 110, /**< USDHC1 interrupt */
+    USDHC2_IRQn               = 111, /**< USDHC2 interrupt */
+    USB_OTG2_IRQn             = 112, /**< USBO2 USB OTG2 */
+    USB_OTG1_IRQn             = 113, /**< USBO2 USB OTG1 */
+    ENET_IRQn                 = 114, /**< ENET interrupt */
+    ENET_1588_Timer_IRQn      = 115, /**< ENET_1588_Timer interrupt */
+    XBAR1_IRQ_0_1_IRQn        = 116, /**< XBAR1 interrupt */
+    XBAR1_IRQ_2_3_IRQn        = 117, /**< XBAR1 interrupt */
+    ADC_ETC_IRQ0_IRQn         = 118, /**< ADCETC IRQ0 interrupt */
+    ADC_ETC_IRQ1_IRQn         = 119, /**< ADCETC IRQ1 interrupt */
+    ADC_ETC_IRQ2_IRQn         = 120, /**< ADCETC IRQ2 interrupt */
+    ADC_ETC_ERROR_IRQ_IRQn    = 121, /**< ADCETC Error IRQ interrupt */
+    PIT_IRQn                  = 122, /**< PIT interrupt */
+    ACMP1_IRQn                = 123, /**< ACMP interrupt */
+    ACMP2_IRQn                = 124, /**< ACMP interrupt */
+    ACMP3_IRQn                = 125, /**< ACMP interrupt */
+    ACMP4_IRQn                = 126, /**< ACMP interrupt */
+    Reserved143_IRQn          = 127, /**< Reserved interrupt */
+    Reserved144_IRQn          = 128, /**< Reserved interrupt */
+    ENC1_IRQn                 = 129, /**< ENC1 interrupt */
+    ENC2_IRQn                 = 130, /**< ENC2 interrupt */
+    ENC3_IRQn                 = 131, /**< ENC3 interrupt */
+    ENC4_IRQn                 = 132, /**< ENC4 interrupt */
+    TMR1_IRQn                 = 133, /**< TMR1 interrupt */
+    TMR2_IRQn                 = 134, /**< TMR2 interrupt */
+    TMR3_IRQn                 = 135, /**< TMR3 interrupt */
+    TMR4_IRQn                 = 136, /**< TMR4 interrupt */
+    PWM2_0_IRQn               = 137, /**< PWM2 capture 0, compare 0, or reload 0 interrupt */
+    PWM2_1_IRQn               = 138, /**< PWM2 capture 1, compare 1, or reload 0 interrupt */
+    PWM2_2_IRQn               = 139, /**< PWM2 capture 2, compare 2, or reload 0 interrupt */
+    PWM2_3_IRQn               = 140, /**< PWM2 capture 3, compare 3, or reload 0 interrupt */
+    PWM2_FAULT_IRQn           = 141, /**< PWM2 fault or reload error interrupt */
+    PWM3_0_IRQn               = 142, /**< PWM3 capture 0, compare 0, or reload 0 interrupt */
+    PWM3_1_IRQn               = 143, /**< PWM3 capture 1, compare 1, or reload 0 interrupt */
+    PWM3_2_IRQn               = 144, /**< PWM3 capture 2, compare 2, or reload 0 interrupt */
+    PWM3_3_IRQn               = 145, /**< PWM3 capture 3, compare 3, or reload 0 interrupt */
+    PWM3_FAULT_IRQn           = 146, /**< PWM3 fault or reload error interrupt */
+    PWM4_0_IRQn               = 147, /**< PWM4 capture 0, compare 0, or reload 0 interrupt */
+    PWM4_1_IRQn               = 148, /**< PWM4 capture 1, compare 1, or reload 0 interrupt */
+    PWM4_2_IRQn               = 149, /**< PWM4 capture 2, compare 2, or reload 0 interrupt */
+    PWM4_3_IRQn               = 150, /**< PWM4 capture 3, compare 3, or reload 0 interrupt */
+    PWM4_FAULT_IRQn           = 151, /**< PWM4 fault or reload error interrupt */
+    Reserved168_IRQn          = 152, /**< Reserved interrupt */
+    Reserved169_IRQn          = 153, /**< Reserved interrupt */
+    Reserved170_IRQn          = 154, /**< Reserved interrupt */
+    Reserved171_IRQn          = 155, /**< Reserved interrupt */
+    Reserved172_IRQn          = 156, /**< Reserved interrupt */
+    Reserved173_IRQn          = 157, /**< Reserved interrupt */
+    SJC_ARM_DEBUG_IRQn        = 158, /**< SJC ARM debug interrupt */
+    NMI_WAKEUP_IRQn           = 159  /**< NMI wake up */
 } IRQn_Type;
 
 /*!
  * @}
  */ /* end of group Interrupt_vector_numbers */
 
-
 /* ----------------------------------------------------------------------------
    -- Cortex M7 Core Configuration
    ---------------------------------------------------------------------------- */
@@ -284,22 +283,21 @@ typedef enum IRQn {
  * @{
  */
 
-#define __MPU_PRESENT                  1         /**< Defines if an MPU is present or not */
-#define __ICACHE_PRESENT               1         /**< Defines if an ICACHE is present or not */
-#define __DCACHE_PRESENT               1         /**< Defines if an DCACHE is present or not */
-#define __DTCM_PRESENT                 1         /**< Defines if an DTCM is present or not */
-#define __NVIC_PRIO_BITS               4         /**< Number of priority bits implemented in the NVIC */
-#define __Vendor_SysTickConfig         0         /**< Vendor specific implementation of SysTickConfig is defined */
-#define __FPU_PRESENT                  1         /**< Defines if an FPU is present or not */
+#define __MPU_PRESENT          1 /**< Defines if an MPU is present or not */
+#define __ICACHE_PRESENT       1 /**< Defines if an ICACHE is present or not */
+#define __DCACHE_PRESENT       1 /**< Defines if an DCACHE is present or not */
+#define __DTCM_PRESENT         1 /**< Defines if an DTCM is present or not */
+#define __NVIC_PRIO_BITS       4 /**< Number of priority bits implemented in the NVIC */
+#define __Vendor_SysTickConfig 0 /**< Vendor specific implementation of SysTickConfig is defined */
+#define __FPU_PRESENT          1 /**< Defines if an FPU is present or not */
 
-#include "core_cm7.h"                  /* Core Peripheral Access Layer */
-#include "system_MIMXRT1051.h"         /* Device specific configuration file */
+#include "core_cm7.h"          /* Core Peripheral Access Layer */
+#include "system_MIMXRT1051.h" /* Device specific configuration file */
 
 /*!
  * @}
  */ /* end of group Cortex_Core_Configuration */
 
-
 /* ----------------------------------------------------------------------------
    -- Mapping Information
    ---------------------------------------------------------------------------- */
@@ -316,7 +314,7 @@ typedef enum IRQn {
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the DMA0 hardware request
@@ -325,117 +323,125 @@ typedef enum IRQn {
  */
 typedef enum _dma_request_source
 {
-    kDmaRequestMuxFlexIO1Request0Request1 = 0|0x100U, /**< FlexIO1 */
-    kDmaRequestMuxFlexIO2Request0Request1 = 1|0x100U, /**< FlexIO2 */
-    kDmaRequestMuxLPUART1Tx         = 2|0x100U,    /**< LPUART1 Transmit */
-    kDmaRequestMuxLPUART1Rx         = 3|0x100U,    /**< LPUART1 Receive */
-    kDmaRequestMuxLPUART3Tx         = 4|0x100U,    /**< LPUART3 Transmit */
-    kDmaRequestMuxLPUART3Rx         = 5|0x100U,    /**< LPUART3 Receive */
-    kDmaRequestMuxLPUART5Tx         = 6|0x100U,    /**< LPUART5 Transmit */
-    kDmaRequestMuxLPUART5Rx         = 7|0x100U,    /**< LPUART5 Receive */
-    kDmaRequestMuxLPUART7Tx         = 8|0x100U,    /**< LPUART7 Transmit */
-    kDmaRequestMuxLPUART7Rx         = 9|0x100U,    /**< LPUART7 Receive */
-    kDmaRequestMuxLPSPI1Rx          = 13|0x100U,   /**< LPSPI1 Receive */
-    kDmaRequestMuxLPSPI1Tx          = 14|0x100U,   /**< LPSPI1 Transmit */
-    kDmaRequestMuxLPSPI3Rx          = 15|0x100U,   /**< LPSPI3 Receive */
-    kDmaRequestMuxLPSPI3Tx          = 16|0x100U,   /**< LPSPI3 Transmit */
-    kDmaRequestMuxLPI2C1            = 17|0x100U,   /**< LPI2C1 */
-    kDmaRequestMuxLPI2C3            = 18|0x100U,   /**< LPI2C3 */
-    kDmaRequestMuxSai1Rx            = 19|0x100U,   /**< Sai1 Receive */
-    kDmaRequestMuxSai1Tx            = 20|0x100U,   /**< Sai1 Transmit */
-    kDmaRequestMuxSai2Rx            = 21|0x100U,   /**< Sai2 Receive */
-    kDmaRequestMuxSai2Tx            = 22|0x100U,   /**< Sai2 Transmit */
-    kDmaRequestMuxADC_ETC           = 23|0x100U,   /**< ADC_ETC */
-    kDmaRequestMuxADC1              = 24|0x100U,   /**< ADC1 */
-    kDmaRequestMuxACMP1             = 25|0x100U,   /**< ACMP1 */
-    kDmaRequestMuxACMP2             = 26|0x100U,   /**< ACMP2 */
-    kDmaRequestMuxFlexSPIRx         = 28|0x100U,   /**< FlexSPI Receive */
-    kDmaRequestMuxFlexSPITx         = 29|0x100U,   /**< FlexSPI Transmit */
-    kDmaRequestMuxXBAR1Request0     = 30|0x100U,   /**< XBAR1 Request 0 */
-    kDmaRequestMuxXBAR1Request1     = 31|0x100U,   /**< XBAR1 Request 1 */
-    kDmaRequestMuxFlexPWM1CaptureSub0 = 32|0x100U, /**< FlexPWM1 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM1CaptureSub1 = 33|0x100U, /**< FlexPWM1 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM1CaptureSub2 = 34|0x100U, /**< FlexPWM1 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM1CaptureSub3 = 35|0x100U, /**< FlexPWM1 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM1ValueSub0 = 36|0x100U,   /**< FlexPWM1 Value sub-module0 */
-    kDmaRequestMuxFlexPWM1ValueSub1 = 37|0x100U,   /**< FlexPWM1 Value sub-module1 */
-    kDmaRequestMuxFlexPWM1ValueSub2 = 38|0x100U,   /**< FlexPWM1 Value sub-module2 */
-    kDmaRequestMuxFlexPWM1ValueSub3 = 39|0x100U,   /**< FlexPWM1 Value sub-module3 */
-    kDmaRequestMuxFlexPWM3CaptureSub0 = 40|0x100U, /**< FlexPWM3 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM3CaptureSub1 = 41|0x100U, /**< FlexPWM3 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM3CaptureSub2 = 42|0x100U, /**< FlexPWM3 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM3CaptureSub3 = 43|0x100U, /**< FlexPWM3 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM3ValueSub0 = 44|0x100U,   /**< FlexPWM3 Value sub-module0 */
-    kDmaRequestMuxFlexPWM3ValueSub1 = 45|0x100U,   /**< FlexPWM3 Value sub-module1 */
-    kDmaRequestMuxFlexPWM3ValueSub2 = 46|0x100U,   /**< FlexPWM3 Value sub-module2 */
-    kDmaRequestMuxFlexPWM3ValueSub3 = 47|0x100U,   /**< FlexPWM3 Value sub-module3 */
-    kDmaRequestMuxQTIMER1CaptTimer0 = 48|0x100U,   /**< QTIMER1 Capture timer 0 */
-    kDmaRequestMuxQTIMER1CaptTimer1 = 49|0x100U,   /**< QTIMER1 Capture timer 1 */
-    kDmaRequestMuxQTIMER1CaptTimer2 = 50|0x100U,   /**< QTIMER1 Capture timer 2 */
-    kDmaRequestMuxQTIMER1CaptTimer3 = 51|0x100U,   /**< QTIMER1 Capture timer 3 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer0Cmpld2Timer1 = 52|0x100U, /**< QTIMER1 cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer1Cmpld2Timer0 = 53|0x100U, /**< QTIMER1 cmpld1 in timer 1 or cmpld2 in timer 0 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer2Cmpld2Timer3 = 54|0x100U, /**< QTIMER1 cmpld1 in timer 2 or cmpld2 in timer 3 */
-    kDmaRequestMuxQTIMER1Cmpld1Timer3Cmpld2Timer2 = 55|0x100U, /**< QTIMER1 cmpld1 in timer 3 or cmpld2 in timer 2 */
-    kDmaRequestMuxQTIMER3CaptTimer0Cmpld1Timer0Cmpld2Timer1 = 56|0x100U, /**< QTIMER3 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer1Cmpld1Timer0Cmpld2Timer1 = 57|0x100U, /**< QTIMER3 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer2Cmpld1Timer0Cmpld2Timer1 = 58|0x100U, /**< QTIMER3 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER3CaptTimer3Cmpld1Timer0Cmpld2Timer1 = 59|0x100U, /**< QTIMER3 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxFlexIO1Request2Request3 = 64|0x100U, /**< FlexIO1 */
-    kDmaRequestMuxFlexIO2Request2Request3 = 65|0x100U, /**< FlexIO2 */
-    kDmaRequestMuxLPUART2Tx         = 66|0x100U,   /**< LPUART2 Transmit */
-    kDmaRequestMuxLPUART2Rx         = 67|0x100U,   /**< LPUART2 Receive */
-    kDmaRequestMuxLPUART4Tx         = 68|0x100U,   /**< LPUART4 Transmit */
-    kDmaRequestMuxLPUART4Rx         = 69|0x100U,   /**< LPUART4 Receive */
-    kDmaRequestMuxLPUART6Tx         = 70|0x100U,   /**< LPUART6 Transmit */
-    kDmaRequestMuxLPUART6Rx         = 71|0x100U,   /**< LPUART6 Receive */
-    kDmaRequestMuxLPUART8Tx         = 72|0x100U,   /**< LPUART8 Transmit */
-    kDmaRequestMuxLPUART8Rx         = 73|0x100U,   /**< LPUART8 Receive */
-    kDmaRequestMuxLPSPI2Rx          = 77|0x100U,   /**< LPSPI2 Receive */
-    kDmaRequestMuxLPSPI2Tx          = 78|0x100U,   /**< LPSPI2 Transmit */
-    kDmaRequestMuxLPSPI4Rx          = 79|0x100U,   /**< LPSPI4 Receive */
-    kDmaRequestMuxLPSPI4Tx          = 80|0x100U,   /**< LPSPI4 Transmit */
-    kDmaRequestMuxLPI2C2            = 81|0x100U,   /**< LPI2C2 */
-    kDmaRequestMuxLPI2C4            = 82|0x100U,   /**< LPI2C4 */
-    kDmaRequestMuxSai3Rx            = 83|0x100U,   /**< Sai3 Receive */
-    kDmaRequestMuxSai3Tx            = 84|0x100U,   /**< Sai3 Transmit */
-    kDmaRequestMuxSpdifRx           = 85|0x100U,   /**< Spdif Receive */
-    kDmaRequestMuxSpdifTx           = 86|0x100U,   /**< Spdif Transmit */
-    kDmaRequestMuxADC2              = 88|0x100U,   /**< ADC2 */
-    kDmaRequestMuxACMP3             = 89|0x100U,   /**< ACMP3 */
-    kDmaRequestMuxACMP4             = 90|0x100U,   /**< ACMP4 */
-    kDmaRequestMuxEnetTimer0        = 92|0x100U,   /**< Enet Timer0 */
-    kDmaRequestMuxEnetTimer1        = 93|0x100U,   /**< Enet Timer1 */
-    kDmaRequestMuxXBAR1Request2     = 94|0x100U,   /**< XBAR1 Request 2 */
-    kDmaRequestMuxXBAR1Request3     = 95|0x100U,   /**< XBAR1 Request 3 */
-    kDmaRequestMuxFlexPWM2CaptureSub0 = 96|0x100U, /**< FlexPWM2 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM2CaptureSub1 = 97|0x100U, /**< FlexPWM2 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM2CaptureSub2 = 98|0x100U, /**< FlexPWM2 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM2CaptureSub3 = 99|0x100U, /**< FlexPWM2 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM2ValueSub0 = 100|0x100U,  /**< FlexPWM2 Value sub-module0 */
-    kDmaRequestMuxFlexPWM2ValueSub1 = 101|0x100U,  /**< FlexPWM2 Value sub-module1 */
-    kDmaRequestMuxFlexPWM2ValueSub2 = 102|0x100U,  /**< FlexPWM2 Value sub-module2 */
-    kDmaRequestMuxFlexPWM2ValueSub3 = 103|0x100U,  /**< FlexPWM2 Value sub-module3 */
-    kDmaRequestMuxFlexPWM4CaptureSub0 = 104|0x100U, /**< FlexPWM4 Capture sub-module0 */
-    kDmaRequestMuxFlexPWM4CaptureSub1 = 105|0x100U, /**< FlexPWM4 Capture sub-module1 */
-    kDmaRequestMuxFlexPWM4CaptureSub2 = 106|0x100U, /**< FlexPWM4 Capture sub-module2 */
-    kDmaRequestMuxFlexPWM4CaptureSub3 = 107|0x100U, /**< FlexPWM4 Capture sub-module3 */
-    kDmaRequestMuxFlexPWM4ValueSub0 = 108|0x100U,  /**< FlexPWM4 Value sub-module0 */
-    kDmaRequestMuxFlexPWM4ValueSub1 = 109|0x100U,  /**< FlexPWM4 Value sub-module1 */
-    kDmaRequestMuxFlexPWM4ValueSub2 = 110|0x100U,  /**< FlexPWM4 Value sub-module2 */
-    kDmaRequestMuxFlexPWM4ValueSub3 = 111|0x100U,  /**< FlexPWM4 Value sub-module3 */
-    kDmaRequestMuxQTIMER2CaptTimer0 = 112|0x100U,  /**< QTIMER2 Capture timer 0 */
-    kDmaRequestMuxQTIMER2CaptTimer1 = 113|0x100U,  /**< QTIMER2 Capture timer 1 */
-    kDmaRequestMuxQTIMER2CaptTimer2 = 114|0x100U,  /**< QTIMER2 Capture timer 2 */
-    kDmaRequestMuxQTIMER2CaptTimer3 = 115|0x100U,  /**< QTIMER2 Capture timer 3 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer0Cmpld2Timer1 = 116|0x100U, /**< QTIMER2 cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer1Cmpld2Timer0 = 117|0x100U, /**< QTIMER2 cmpld1 in timer 1 or cmpld2 in timer 0 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer2Cmpld2Timer3 = 118|0x100U, /**< QTIMER2 cmpld1 in timer 2 or cmpld2 in timer 3 */
-    kDmaRequestMuxQTIMER2Cmpld1Timer3Cmpld2Timer2 = 119|0x100U, /**< QTIMER2 cmpld1 in timer 3 or cmpld2 in timer 2 */
-    kDmaRequestMuxQTIMER4CaptTimer0Cmpld1Timer0Cmpld2Timer1 = 120|0x100U, /**< QTIMER4 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer1Cmpld1Timer0Cmpld2Timer1 = 121|0x100U, /**< QTIMER4 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer2Cmpld1Timer0Cmpld2Timer1 = 122|0x100U, /**< QTIMER4 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
-    kDmaRequestMuxQTIMER4CaptTimer3Cmpld1Timer0Cmpld2Timer1 = 123|0x100U, /**< QTIMER4 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxFlexIO1Request0Request1         = 0 | 0x100U,  /**< FlexIO1 */
+    kDmaRequestMuxFlexIO2Request0Request1         = 1 | 0x100U,  /**< FlexIO2 */
+    kDmaRequestMuxLPUART1Tx                       = 2 | 0x100U,  /**< LPUART1 Transmit */
+    kDmaRequestMuxLPUART1Rx                       = 3 | 0x100U,  /**< LPUART1 Receive */
+    kDmaRequestMuxLPUART3Tx                       = 4 | 0x100U,  /**< LPUART3 Transmit */
+    kDmaRequestMuxLPUART3Rx                       = 5 | 0x100U,  /**< LPUART3 Receive */
+    kDmaRequestMuxLPUART5Tx                       = 6 | 0x100U,  /**< LPUART5 Transmit */
+    kDmaRequestMuxLPUART5Rx                       = 7 | 0x100U,  /**< LPUART5 Receive */
+    kDmaRequestMuxLPUART7Tx                       = 8 | 0x100U,  /**< LPUART7 Transmit */
+    kDmaRequestMuxLPUART7Rx                       = 9 | 0x100U,  /**< LPUART7 Receive */
+    kDmaRequestMuxLPSPI1Rx                        = 13 | 0x100U, /**< LPSPI1 Receive */
+    kDmaRequestMuxLPSPI1Tx                        = 14 | 0x100U, /**< LPSPI1 Transmit */
+    kDmaRequestMuxLPSPI3Rx                        = 15 | 0x100U, /**< LPSPI3 Receive */
+    kDmaRequestMuxLPSPI3Tx                        = 16 | 0x100U, /**< LPSPI3 Transmit */
+    kDmaRequestMuxLPI2C1                          = 17 | 0x100U, /**< LPI2C1 */
+    kDmaRequestMuxLPI2C3                          = 18 | 0x100U, /**< LPI2C3 */
+    kDmaRequestMuxSai1Rx                          = 19 | 0x100U, /**< Sai1 Receive */
+    kDmaRequestMuxSai1Tx                          = 20 | 0x100U, /**< Sai1 Transmit */
+    kDmaRequestMuxSai2Rx                          = 21 | 0x100U, /**< Sai2 Receive */
+    kDmaRequestMuxSai2Tx                          = 22 | 0x100U, /**< Sai2 Transmit */
+    kDmaRequestMuxADC_ETC                         = 23 | 0x100U, /**< ADC_ETC */
+    kDmaRequestMuxADC1                            = 24 | 0x100U, /**< ADC1 */
+    kDmaRequestMuxACMP1                           = 25 | 0x100U, /**< ACMP1 */
+    kDmaRequestMuxACMP2                           = 26 | 0x100U, /**< ACMP2 */
+    kDmaRequestMuxFlexSPIRx                       = 28 | 0x100U, /**< FlexSPI Receive */
+    kDmaRequestMuxFlexSPITx                       = 29 | 0x100U, /**< FlexSPI Transmit */
+    kDmaRequestMuxXBAR1Request0                   = 30 | 0x100U, /**< XBAR1 Request 0 */
+    kDmaRequestMuxXBAR1Request1                   = 31 | 0x100U, /**< XBAR1 Request 1 */
+    kDmaRequestMuxFlexPWM1CaptureSub0             = 32 | 0x100U, /**< FlexPWM1 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM1CaptureSub1             = 33 | 0x100U, /**< FlexPWM1 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM1CaptureSub2             = 34 | 0x100U, /**< FlexPWM1 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM1CaptureSub3             = 35 | 0x100U, /**< FlexPWM1 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM1ValueSub0               = 36 | 0x100U, /**< FlexPWM1 Value sub-module0 */
+    kDmaRequestMuxFlexPWM1ValueSub1               = 37 | 0x100U, /**< FlexPWM1 Value sub-module1 */
+    kDmaRequestMuxFlexPWM1ValueSub2               = 38 | 0x100U, /**< FlexPWM1 Value sub-module2 */
+    kDmaRequestMuxFlexPWM1ValueSub3               = 39 | 0x100U, /**< FlexPWM1 Value sub-module3 */
+    kDmaRequestMuxFlexPWM3CaptureSub0             = 40 | 0x100U, /**< FlexPWM3 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM3CaptureSub1             = 41 | 0x100U, /**< FlexPWM3 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM3CaptureSub2             = 42 | 0x100U, /**< FlexPWM3 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM3CaptureSub3             = 43 | 0x100U, /**< FlexPWM3 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM3ValueSub0               = 44 | 0x100U, /**< FlexPWM3 Value sub-module0 */
+    kDmaRequestMuxFlexPWM3ValueSub1               = 45 | 0x100U, /**< FlexPWM3 Value sub-module1 */
+    kDmaRequestMuxFlexPWM3ValueSub2               = 46 | 0x100U, /**< FlexPWM3 Value sub-module2 */
+    kDmaRequestMuxFlexPWM3ValueSub3               = 47 | 0x100U, /**< FlexPWM3 Value sub-module3 */
+    kDmaRequestMuxQTIMER1CaptTimer0               = 48 | 0x100U, /**< QTIMER1 Capture timer 0 */
+    kDmaRequestMuxQTIMER1CaptTimer1               = 49 | 0x100U, /**< QTIMER1 Capture timer 1 */
+    kDmaRequestMuxQTIMER1CaptTimer2               = 50 | 0x100U, /**< QTIMER1 Capture timer 2 */
+    kDmaRequestMuxQTIMER1CaptTimer3               = 51 | 0x100U, /**< QTIMER1 Capture timer 3 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer0Cmpld2Timer1 = 52 | 0x100U, /**< QTIMER1 cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer1Cmpld2Timer0 = 53 | 0x100U, /**< QTIMER1 cmpld1 in timer 1 or cmpld2 in timer 0 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer2Cmpld2Timer3 = 54 | 0x100U, /**< QTIMER1 cmpld1 in timer 2 or cmpld2 in timer 3 */
+    kDmaRequestMuxQTIMER1Cmpld1Timer3Cmpld2Timer2 = 55 | 0x100U, /**< QTIMER1 cmpld1 in timer 3 or cmpld2 in timer 2 */
+    kDmaRequestMuxQTIMER3CaptTimer0Cmpld1Timer0Cmpld2Timer1 =
+        56 | 0x100U, /**< QTIMER3 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer1Cmpld1Timer0Cmpld2Timer1 =
+        57 | 0x100U, /**< QTIMER3 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer2Cmpld1Timer0Cmpld2Timer1 =
+        58 | 0x100U, /**< QTIMER3 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER3CaptTimer3Cmpld1Timer0Cmpld2Timer1 =
+        59 | 0x100U, /**< QTIMER3 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxFlexIO1Request2Request3         = 64 | 0x100U,  /**< FlexIO1 */
+    kDmaRequestMuxFlexIO2Request2Request3         = 65 | 0x100U,  /**< FlexIO2 */
+    kDmaRequestMuxLPUART2Tx                       = 66 | 0x100U,  /**< LPUART2 Transmit */
+    kDmaRequestMuxLPUART2Rx                       = 67 | 0x100U,  /**< LPUART2 Receive */
+    kDmaRequestMuxLPUART4Tx                       = 68 | 0x100U,  /**< LPUART4 Transmit */
+    kDmaRequestMuxLPUART4Rx                       = 69 | 0x100U,  /**< LPUART4 Receive */
+    kDmaRequestMuxLPUART6Tx                       = 70 | 0x100U,  /**< LPUART6 Transmit */
+    kDmaRequestMuxLPUART6Rx                       = 71 | 0x100U,  /**< LPUART6 Receive */
+    kDmaRequestMuxLPUART8Tx                       = 72 | 0x100U,  /**< LPUART8 Transmit */
+    kDmaRequestMuxLPUART8Rx                       = 73 | 0x100U,  /**< LPUART8 Receive */
+    kDmaRequestMuxLPSPI2Rx                        = 77 | 0x100U,  /**< LPSPI2 Receive */
+    kDmaRequestMuxLPSPI2Tx                        = 78 | 0x100U,  /**< LPSPI2 Transmit */
+    kDmaRequestMuxLPSPI4Rx                        = 79 | 0x100U,  /**< LPSPI4 Receive */
+    kDmaRequestMuxLPSPI4Tx                        = 80 | 0x100U,  /**< LPSPI4 Transmit */
+    kDmaRequestMuxLPI2C2                          = 81 | 0x100U,  /**< LPI2C2 */
+    kDmaRequestMuxLPI2C4                          = 82 | 0x100U,  /**< LPI2C4 */
+    kDmaRequestMuxSai3Rx                          = 83 | 0x100U,  /**< Sai3 Receive */
+    kDmaRequestMuxSai3Tx                          = 84 | 0x100U,  /**< Sai3 Transmit */
+    kDmaRequestMuxSpdifRx                         = 85 | 0x100U,  /**< Spdif Receive */
+    kDmaRequestMuxSpdifTx                         = 86 | 0x100U,  /**< Spdif Transmit */
+    kDmaRequestMuxADC2                            = 88 | 0x100U,  /**< ADC2 */
+    kDmaRequestMuxACMP3                           = 89 | 0x100U,  /**< ACMP3 */
+    kDmaRequestMuxACMP4                           = 90 | 0x100U,  /**< ACMP4 */
+    kDmaRequestMuxEnetTimer0                      = 92 | 0x100U,  /**< Enet Timer0 */
+    kDmaRequestMuxEnetTimer1                      = 93 | 0x100U,  /**< Enet Timer1 */
+    kDmaRequestMuxXBAR1Request2                   = 94 | 0x100U,  /**< XBAR1 Request 2 */
+    kDmaRequestMuxXBAR1Request3                   = 95 | 0x100U,  /**< XBAR1 Request 3 */
+    kDmaRequestMuxFlexPWM2CaptureSub0             = 96 | 0x100U,  /**< FlexPWM2 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM2CaptureSub1             = 97 | 0x100U,  /**< FlexPWM2 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM2CaptureSub2             = 98 | 0x100U,  /**< FlexPWM2 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM2CaptureSub3             = 99 | 0x100U,  /**< FlexPWM2 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM2ValueSub0               = 100 | 0x100U, /**< FlexPWM2 Value sub-module0 */
+    kDmaRequestMuxFlexPWM2ValueSub1               = 101 | 0x100U, /**< FlexPWM2 Value sub-module1 */
+    kDmaRequestMuxFlexPWM2ValueSub2               = 102 | 0x100U, /**< FlexPWM2 Value sub-module2 */
+    kDmaRequestMuxFlexPWM2ValueSub3               = 103 | 0x100U, /**< FlexPWM2 Value sub-module3 */
+    kDmaRequestMuxFlexPWM4CaptureSub0             = 104 | 0x100U, /**< FlexPWM4 Capture sub-module0 */
+    kDmaRequestMuxFlexPWM4CaptureSub1             = 105 | 0x100U, /**< FlexPWM4 Capture sub-module1 */
+    kDmaRequestMuxFlexPWM4CaptureSub2             = 106 | 0x100U, /**< FlexPWM4 Capture sub-module2 */
+    kDmaRequestMuxFlexPWM4CaptureSub3             = 107 | 0x100U, /**< FlexPWM4 Capture sub-module3 */
+    kDmaRequestMuxFlexPWM4ValueSub0               = 108 | 0x100U, /**< FlexPWM4 Value sub-module0 */
+    kDmaRequestMuxFlexPWM4ValueSub1               = 109 | 0x100U, /**< FlexPWM4 Value sub-module1 */
+    kDmaRequestMuxFlexPWM4ValueSub2               = 110 | 0x100U, /**< FlexPWM4 Value sub-module2 */
+    kDmaRequestMuxFlexPWM4ValueSub3               = 111 | 0x100U, /**< FlexPWM4 Value sub-module3 */
+    kDmaRequestMuxQTIMER2CaptTimer0               = 112 | 0x100U, /**< QTIMER2 Capture timer 0 */
+    kDmaRequestMuxQTIMER2CaptTimer1               = 113 | 0x100U, /**< QTIMER2 Capture timer 1 */
+    kDmaRequestMuxQTIMER2CaptTimer2               = 114 | 0x100U, /**< QTIMER2 Capture timer 2 */
+    kDmaRequestMuxQTIMER2CaptTimer3               = 115 | 0x100U, /**< QTIMER2 Capture timer 3 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer0Cmpld2Timer1 = 116 | 0x100U, /**< QTIMER2 cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer1Cmpld2Timer0 = 117 | 0x100U, /**< QTIMER2 cmpld1 in timer 1 or cmpld2 in timer 0 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer2Cmpld2Timer3 = 118 | 0x100U, /**< QTIMER2 cmpld1 in timer 2 or cmpld2 in timer 3 */
+    kDmaRequestMuxQTIMER2Cmpld1Timer3Cmpld2Timer2 = 119 | 0x100U, /**< QTIMER2 cmpld1 in timer 3 or cmpld2 in timer 2 */
+    kDmaRequestMuxQTIMER4CaptTimer0Cmpld1Timer0Cmpld2Timer1 =
+        120 | 0x100U, /**< QTIMER4 capture timer 0, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer1Cmpld1Timer0Cmpld2Timer1 =
+        121 | 0x100U, /**< QTIMER4 capture timer 1, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer2Cmpld1Timer0Cmpld2Timer1 =
+        122 | 0x100U, /**< QTIMER4 capture timer 2, cmpld1 in timer 0 or cmpld2 in timer 1 */
+    kDmaRequestMuxQTIMER4CaptTimer3Cmpld1Timer0Cmpld2Timer1 =
+        123 | 0x100U, /**< QTIMER4 capture timer 3, cmpld1 in timer 0 or cmpld2 in timer 1 */
 } dma_request_source_t;
 
 /* @} */
@@ -446,7 +452,7 @@ typedef enum _dma_request_source
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the IOMUXC SW_MUX_CTL_PAD
@@ -455,130 +461,130 @@ typedef enum _dma_request_source
  */
 typedef enum _iomuxc_sw_mux_ctl_pad
 {
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00 = 0U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01 = 1U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02 = 2U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03 = 3U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04 = 4U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05 = 5U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06 = 6U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07 = 7U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08 = 8U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09 = 9U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10 = 10U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11 = 11U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12 = 12U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13 = 13U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14 = 14U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15 = 15U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16 = 16U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17 = 17U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18 = 18U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19 = 19U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20 = 20U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21 = 21U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22 = 22U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23 = 23U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24 = 24U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25 = 25U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26 = 26U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27 = 27U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28 = 28U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29 = 29U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30 = 30U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31 = 31U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32 = 32U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33 = 33U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34 = 34U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35 = 35U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36 = 36U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37 = 37U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38 = 38U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39 = 39U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40 = 40U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_41 = 41U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_00 = 42U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_01 = 43U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02 = 44U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 45U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_04 = 46U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_05 = 47U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_06 = 48U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_07 = 49U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_08 = 50U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_09 = 51U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_10 = 52U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_11 = 53U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_12 = 54U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_13 = 55U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_14 = 56U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_15 = 57U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_00 = 58U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_01 = 59U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_02 = 60U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_03 = 61U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_04 = 62U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_05 = 63U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_06 = 64U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_07 = 65U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 66U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_09 = 67U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_10 = 68U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_11 = 69U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_12 = 70U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_13 = 71U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_14 = 72U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_15 = 73U,    /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_00 = 74U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_01 = 75U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_02 = 76U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 77U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_04 = 78U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_05 = 79U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_06 = 80U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_07 = 81U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_08 = 82U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_09 = 83U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_10 = 84U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_11 = 85U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12 = 86U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_13 = 87U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_14 = 88U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_15 = 89U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00 = 90U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01 = 91U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_02 = 92U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_03 = 93U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_04 = 94U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_05 = 95U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_06 = 96U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_07 = 97U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_08 = 98U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_09 = 99U,       /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_10 = 100U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11 = 101U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_12 = 102U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_13 = 103U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_14 = 104U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_15 = 105U,      /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_00 = 106U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_01 = 107U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_02 = 108U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_03 = 109U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 = 110U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 = 111U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_00 = 112U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_01 = 113U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_02 = 114U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_03 = 115U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_04 = 116U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_05 = 117U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_06 = 118U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_07 = 119U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_08 = 120U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_09 = 121U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_10 = 122U,   /**< IOMUXC SW_MUX_CTL_PAD index */
-    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_11 = 123U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00   = 0U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01   = 1U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02   = 2U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03   = 3U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04   = 4U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05   = 5U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06   = 6U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07   = 7U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08   = 8U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09   = 9U,   /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10   = 10U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11   = 11U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12   = 12U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13   = 13U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14   = 14U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15   = 15U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16   = 16U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17   = 17U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18   = 18U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19   = 19U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20   = 20U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21   = 21U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22   = 22U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23   = 23U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24   = 24U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25   = 25U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26   = 26U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27   = 27U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28   = 28U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29   = 29U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30   = 30U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31   = 31U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32   = 32U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33   = 33U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34   = 34U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35   = 35U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36   = 36U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37   = 37U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38   = 38U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39   = 39U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40   = 40U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_41   = 41U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_00 = 42U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_01 = 43U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_02 = 44U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_03 = 45U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_04 = 46U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_05 = 47U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_06 = 48U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_07 = 49U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_08 = 50U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_09 = 51U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_10 = 52U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_11 = 53U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_12 = 54U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_13 = 55U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_14 = 56U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B0_15 = 57U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_00 = 58U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_01 = 59U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_02 = 60U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_03 = 61U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_04 = 62U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_05 = 63U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_06 = 64U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_07 = 65U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_08 = 66U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_09 = 67U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_10 = 68U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_11 = 69U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_12 = 70U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_13 = 71U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_14 = 72U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_15 = 73U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_00    = 74U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_01    = 75U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_02    = 76U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03    = 77U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_04    = 78U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_05    = 79U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_06    = 80U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_07    = 81U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_08    = 82U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_09    = 83U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_10    = 84U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_11    = 85U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_12    = 86U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_13    = 87U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_14    = 88U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B0_15    = 89U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_00    = 90U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_01    = 91U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_02    = 92U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_03    = 93U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_04    = 94U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_05    = 95U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_06    = 96U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_07    = 97U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_08    = 98U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_09    = 99U,  /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_10    = 100U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11    = 101U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_12    = 102U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_13    = 103U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_14    = 104U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_15    = 105U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_00 = 106U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_01 = 107U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_02 = 108U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_03 = 109U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_04 = 110U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B0_05 = 111U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_00 = 112U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_01 = 113U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_02 = 114U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_03 = 115U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_04 = 116U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_05 = 117U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_06 = 118U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_07 = 119U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_08 = 120U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_09 = 121U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_10 = 122U, /**< IOMUXC SW_MUX_CTL_PAD index */
+    kIOMUXC_SW_MUX_CTL_PAD_GPIO_SD_B1_11 = 123U, /**< IOMUXC SW_MUX_CTL_PAD index */
 } iomuxc_sw_mux_ctl_pad_t;
 
 /* @} */
@@ -589,7 +595,7 @@ typedef enum _iomuxc_sw_mux_ctl_pad
 
 /*******************************************************************************
  * Definitions
-*******************************************************************************/
+ *******************************************************************************/
 
 /*!
  * @brief Enumeration for the IOMUXC SW_PAD_CTL_PAD
@@ -598,130 +604,130 @@ typedef enum _iomuxc_sw_mux_ctl_pad
  */
 typedef enum _iomuxc_sw_pad_ctl_pad
 {
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00 = 0U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01 = 1U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02 = 2U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03 = 3U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04 = 4U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05 = 5U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06 = 6U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07 = 7U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08 = 8U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09 = 9U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10 = 10U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11 = 11U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12 = 12U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13 = 13U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14 = 14U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15 = 15U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16 = 16U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17 = 17U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18 = 18U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19 = 19U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20 = 20U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21 = 21U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22 = 22U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23 = 23U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24 = 24U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25 = 25U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26 = 26U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27 = 27U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28 = 28U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29 = 29U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30 = 30U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31 = 31U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32 = 32U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33 = 33U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34 = 34U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35 = 35U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36 = 36U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37 = 37U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38 = 38U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39 = 39U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_40 = 40U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_41 = 41U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_00 = 42U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_01 = 43U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_02 = 44U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 = 45U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_04 = 46U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_05 = 47U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_06 = 48U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_07 = 49U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_08 = 50U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_09 = 51U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_10 = 52U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_11 = 53U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_12 = 54U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_13 = 55U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_14 = 56U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_15 = 57U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_00 = 58U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_01 = 59U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_02 = 60U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_03 = 61U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_04 = 62U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_05 = 63U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_06 = 64U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_07 = 65U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_08 = 66U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_09 = 67U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_10 = 68U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_11 = 69U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_12 = 70U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_13 = 71U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_14 = 72U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_15 = 73U,    /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_00 = 74U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_01 = 75U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_02 = 76U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03 = 77U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_04 = 78U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_05 = 79U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_06 = 80U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_07 = 81U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_08 = 82U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_09 = 83U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_10 = 84U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_11 = 85U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12 = 86U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_13 = 87U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_14 = 88U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_15 = 89U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_00 = 90U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_01 = 91U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_02 = 92U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_03 = 93U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_04 = 94U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_05 = 95U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_06 = 96U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_07 = 97U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_08 = 98U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_09 = 99U,       /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_10 = 100U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11 = 101U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_12 = 102U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_13 = 103U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_14 = 104U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_15 = 105U,      /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_00 = 106U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_01 = 107U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_02 = 108U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_03 = 109U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 = 110U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 = 111U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_00 = 112U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_01 = 113U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_02 = 114U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_03 = 115U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_04 = 116U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_05 = 117U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_06 = 118U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_07 = 119U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_08 = 120U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_09 = 121U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_10 = 122U,   /**< IOMUXC SW_PAD_CTL_PAD index */
-    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_11 = 123U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00   = 0U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01   = 1U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02   = 2U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03   = 3U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04   = 4U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05   = 5U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06   = 6U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07   = 7U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08   = 8U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09   = 9U,   /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10   = 10U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11   = 11U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12   = 12U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13   = 13U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14   = 14U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15   = 15U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16   = 16U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17   = 17U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18   = 18U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19   = 19U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20   = 20U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21   = 21U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22   = 22U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23   = 23U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24   = 24U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25   = 25U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26   = 26U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27   = 27U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28   = 28U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29   = 29U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30   = 30U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31   = 31U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32   = 32U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33   = 33U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34   = 34U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35   = 35U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36   = 36U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37   = 37U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38   = 38U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39   = 39U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_40   = 40U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_41   = 41U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_00 = 42U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_01 = 43U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_02 = 44U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 = 45U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_04 = 46U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_05 = 47U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_06 = 48U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_07 = 49U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_08 = 50U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_09 = 51U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_10 = 52U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_11 = 53U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_12 = 54U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_13 = 55U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_14 = 56U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_15 = 57U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_00 = 58U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_01 = 59U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_02 = 60U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_03 = 61U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_04 = 62U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_05 = 63U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_06 = 64U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_07 = 65U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_08 = 66U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_09 = 67U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_10 = 68U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_11 = 69U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_12 = 70U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_13 = 71U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_14 = 72U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_15 = 73U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_00    = 74U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_01    = 75U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_02    = 76U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03    = 77U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_04    = 78U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_05    = 79U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_06    = 80U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_07    = 81U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_08    = 82U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_09    = 83U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_10    = 84U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_11    = 85U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_12    = 86U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_13    = 87U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_14    = 88U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B0_15    = 89U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_00    = 90U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_01    = 91U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_02    = 92U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_03    = 93U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_04    = 94U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_05    = 95U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_06    = 96U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_07    = 97U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_08    = 98U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_09    = 99U,  /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_10    = 100U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11    = 101U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_12    = 102U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_13    = 103U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_14    = 104U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_15    = 105U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_00 = 106U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_01 = 107U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_02 = 108U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_03 = 109U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_04 = 110U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B0_05 = 111U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_00 = 112U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_01 = 113U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_02 = 114U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_03 = 115U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_04 = 116U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_05 = 117U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_06 = 118U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_07 = 119U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_08 = 120U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_09 = 121U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_10 = 122U, /**< IOMUXC SW_PAD_CTL_PAD index */
+    kIOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B1_11 = 123U, /**< IOMUXC SW_PAD_CTL_PAD index */
 } iomuxc_sw_pad_ctl_pad_t;
 
 /* @} */
@@ -733,543 +739,589 @@ typedef enum _iomuxc_sw_pad_ctl_pad
  */
 typedef enum _iomuxc_select_input
 {
-    kIOMUXC_ANATOP_USB_OTG1_ID_SELECT_INPUT = 0U,  /**< IOMUXC select input index */
-    kIOMUXC_ANATOP_USB_OTG2_ID_SELECT_INPUT = 1U,  /**< IOMUXC select input index */
-    kIOMUXC_CCM_PMIC_READY_SELECT_INPUT = 2U,      /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA02_SELECT_INPUT = 3U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA03_SELECT_INPUT = 4U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA04_SELECT_INPUT = 5U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA05_SELECT_INPUT = 6U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA06_SELECT_INPUT = 7U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA07_SELECT_INPUT = 8U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA08_SELECT_INPUT = 9U,          /**< IOMUXC select input index */
-    kIOMUXC_CSI_DATA09_SELECT_INPUT = 10U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_HSYNC_SELECT_INPUT  = 11U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_PIXCLK_SELECT_INPUT = 12U,         /**< IOMUXC select input index */
-    kIOMUXC_CSI_VSYNC_SELECT_INPUT  = 13U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET_IPG_CLK_RMII_SELECT_INPUT = 14U,  /**< IOMUXC select input index */
-    kIOMUXC_ENET_MDIO_SELECT_INPUT  = 15U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET0_RXDATA_SELECT_INPUT = 16U,       /**< IOMUXC select input index */
-    kIOMUXC_ENET1_RXDATA_SELECT_INPUT = 17U,       /**< IOMUXC select input index */
-    kIOMUXC_ENET_RXEN_SELECT_INPUT  = 18U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET_RXERR_SELECT_INPUT = 19U,         /**< IOMUXC select input index */
-    kIOMUXC_ENET0_TIMER_SELECT_INPUT = 20U,        /**< IOMUXC select input index */
-    kIOMUXC_ENET_TXCLK_SELECT_INPUT = 21U,         /**< IOMUXC select input index */
-    kIOMUXC_FLEXCAN1_RX_SELECT_INPUT = 22U,        /**< IOMUXC select input index */
-    kIOMUXC_FLEXCAN2_RX_SELECT_INPUT = 23U,        /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA3_SELECT_INPUT = 24U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA0_SELECT_INPUT = 25U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA1_SELECT_INPUT = 26U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMA2_SELECT_INPUT = 27U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB3_SELECT_INPUT = 28U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB0_SELECT_INPUT = 29U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB1_SELECT_INPUT = 30U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM1_PWMB2_SELECT_INPUT = 31U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA3_SELECT_INPUT = 32U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA0_SELECT_INPUT = 33U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA1_SELECT_INPUT = 34U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMA2_SELECT_INPUT = 35U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB3_SELECT_INPUT = 36U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB0_SELECT_INPUT = 37U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB1_SELECT_INPUT = 38U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM2_PWMB2_SELECT_INPUT = 39U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA0_SELECT_INPUT = 40U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT = 41U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA2_SELECT_INPUT = 42U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXPWM4_PWMA3_SELECT_INPUT = 43U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DQS_SELECT_INPUT = 44U,       /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA0_SELECT_INPUT = 45U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA1_SELECT_INPUT = 46U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA2_SELECT_INPUT = 47U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_DATA3_SELECT_INPUT = 48U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA0_SELECT_INPUT = 49U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA1_SELECT_INPUT = 50U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA2_SELECT_INPUT = 51U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIB_DATA3_SELECT_INPUT = 52U,     /**< IOMUXC select input index */
-    kIOMUXC_FLEXSPIA_SCK_SELECT_INPUT = 53U,       /**< IOMUXC select input index */
-    kIOMUXC_LPI2C1_SCL_SELECT_INPUT = 54U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C1_SDA_SELECT_INPUT = 55U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C2_SCL_SELECT_INPUT = 56U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C2_SDA_SELECT_INPUT = 57U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C3_SCL_SELECT_INPUT = 58U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C3_SDA_SELECT_INPUT = 59U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C4_SCL_SELECT_INPUT = 60U,         /**< IOMUXC select input index */
-    kIOMUXC_LPI2C4_SDA_SELECT_INPUT = 61U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_PCS0_SELECT_INPUT = 62U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SCK_SELECT_INPUT = 63U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SDI_SELECT_INPUT = 64U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI1_SDO_SELECT_INPUT = 65U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_PCS0_SELECT_INPUT = 66U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SCK_SELECT_INPUT = 67U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SDI_SELECT_INPUT = 68U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI2_SDO_SELECT_INPUT = 69U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_PCS0_SELECT_INPUT = 70U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SCK_SELECT_INPUT = 71U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SDI_SELECT_INPUT = 72U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI3_SDO_SELECT_INPUT = 73U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_PCS0_SELECT_INPUT = 74U,        /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SCK_SELECT_INPUT = 75U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SDI_SELECT_INPUT = 76U,         /**< IOMUXC select input index */
-    kIOMUXC_LPSPI4_SDO_SELECT_INPUT = 77U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART2_RX_SELECT_INPUT = 78U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART2_TX_SELECT_INPUT = 79U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_CTS_B_SELECT_INPUT = 80U,      /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_RX_SELECT_INPUT = 81U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART3_TX_SELECT_INPUT = 82U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART4_RX_SELECT_INPUT = 83U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART4_TX_SELECT_INPUT = 84U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART5_RX_SELECT_INPUT = 85U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART5_TX_SELECT_INPUT = 86U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART6_RX_SELECT_INPUT = 87U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART6_TX_SELECT_INPUT = 88U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART7_RX_SELECT_INPUT = 89U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART7_TX_SELECT_INPUT = 90U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART8_RX_SELECT_INPUT = 91U,         /**< IOMUXC select input index */
-    kIOMUXC_LPUART8_TX_SELECT_INPUT = 92U,         /**< IOMUXC select input index */
-    kIOMUXC_NMI_SELECT_INPUT        = 93U,         /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER0_SELECT_INPUT = 94U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER1_SELECT_INPUT = 95U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER2_SELECT_INPUT = 96U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER2_TIMER3_SELECT_INPUT = 97U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER0_SELECT_INPUT = 98U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER1_SELECT_INPUT = 99U,     /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER2_SELECT_INPUT = 100U,    /**< IOMUXC select input index */
-    kIOMUXC_QTIMER3_TIMER3_SELECT_INPUT = 101U,    /**< IOMUXC select input index */
-    kIOMUXC_SAI1_MCLK2_SELECT_INPUT = 102U,        /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_BCLK_SELECT_INPUT = 103U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA0_SELECT_INPUT = 104U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA1_SELECT_INPUT = 105U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA2_SELECT_INPUT = 106U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_DATA3_SELECT_INPUT = 107U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI1_RX_SYNC_SELECT_INPUT = 108U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_TX_BCLK_SELECT_INPUT = 109U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI1_TX_SYNC_SELECT_INPUT = 110U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_MCLK2_SELECT_INPUT = 111U,        /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_BCLK_SELECT_INPUT = 112U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_DATA0_SELECT_INPUT = 113U,     /**< IOMUXC select input index */
-    kIOMUXC_SAI2_RX_SYNC_SELECT_INPUT = 114U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_TX_BCLK_SELECT_INPUT = 115U,      /**< IOMUXC select input index */
-    kIOMUXC_SAI2_TX_SYNC_SELECT_INPUT = 116U,      /**< IOMUXC select input index */
-    kIOMUXC_SPDIF_IN_SELECT_INPUT   = 117U,        /**< IOMUXC select input index */
-    kIOMUXC_USB_OTG2_OC_SELECT_INPUT = 118U,       /**< IOMUXC select input index */
-    kIOMUXC_USB_OTG1_OC_SELECT_INPUT = 119U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC1_CD_B_SELECT_INPUT = 120U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC1_WP_SELECT_INPUT  = 121U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CLK_SELECT_INPUT = 122U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CD_B_SELECT_INPUT = 123U,       /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_CMD_SELECT_INPUT = 124U,        /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA0_SELECT_INPUT = 125U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA1_SELECT_INPUT = 126U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA2_SELECT_INPUT = 127U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA3_SELECT_INPUT = 128U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA4_SELECT_INPUT = 129U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA5_SELECT_INPUT = 130U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA6_SELECT_INPUT = 131U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_DATA7_SELECT_INPUT = 132U,      /**< IOMUXC select input index */
-    kIOMUXC_USDHC2_WP_SELECT_INPUT  = 133U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN02_SELECT_INPUT = 134U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN03_SELECT_INPUT = 135U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN04_SELECT_INPUT = 136U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN05_SELECT_INPUT = 137U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN06_SELECT_INPUT = 138U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN07_SELECT_INPUT = 139U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN08_SELECT_INPUT = 140U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN09_SELECT_INPUT = 141U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN17_SELECT_INPUT = 142U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN18_SELECT_INPUT = 143U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN20_SELECT_INPUT = 144U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN22_SELECT_INPUT = 145U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN23_SELECT_INPUT = 146U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN24_SELECT_INPUT = 147U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN14_SELECT_INPUT = 148U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN15_SELECT_INPUT = 149U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN16_SELECT_INPUT = 150U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN25_SELECT_INPUT = 151U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN19_SELECT_INPUT = 152U,        /**< IOMUXC select input index */
-    kIOMUXC_XBAR1_IN21_SELECT_INPUT = 153U,        /**< IOMUXC select input index */
+    kIOMUXC_ANATOP_USB_OTG1_ID_SELECT_INPUT = 0U,   /**< IOMUXC select input index */
+    kIOMUXC_ANATOP_USB_OTG2_ID_SELECT_INPUT = 1U,   /**< IOMUXC select input index */
+    kIOMUXC_CCM_PMIC_READY_SELECT_INPUT     = 2U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA02_SELECT_INPUT         = 3U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA03_SELECT_INPUT         = 4U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA04_SELECT_INPUT         = 5U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA05_SELECT_INPUT         = 6U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA06_SELECT_INPUT         = 7U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA07_SELECT_INPUT         = 8U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA08_SELECT_INPUT         = 9U,   /**< IOMUXC select input index */
+    kIOMUXC_CSI_DATA09_SELECT_INPUT         = 10U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_HSYNC_SELECT_INPUT          = 11U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_PIXCLK_SELECT_INPUT         = 12U,  /**< IOMUXC select input index */
+    kIOMUXC_CSI_VSYNC_SELECT_INPUT          = 13U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_IPG_CLK_RMII_SELECT_INPUT  = 14U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_MDIO_SELECT_INPUT          = 15U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET0_RXDATA_SELECT_INPUT       = 16U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET1_RXDATA_SELECT_INPUT       = 17U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_RXEN_SELECT_INPUT          = 18U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_RXERR_SELECT_INPUT         = 19U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET0_TIMER_SELECT_INPUT        = 20U,  /**< IOMUXC select input index */
+    kIOMUXC_ENET_TXCLK_SELECT_INPUT         = 21U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXCAN1_RX_SELECT_INPUT        = 22U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXCAN2_RX_SELECT_INPUT        = 23U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA3_SELECT_INPUT     = 24U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA0_SELECT_INPUT     = 25U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA1_SELECT_INPUT     = 26U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMA2_SELECT_INPUT     = 27U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB3_SELECT_INPUT     = 28U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB0_SELECT_INPUT     = 29U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB1_SELECT_INPUT     = 30U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM1_PWMB2_SELECT_INPUT     = 31U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA3_SELECT_INPUT     = 32U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA0_SELECT_INPUT     = 33U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA1_SELECT_INPUT     = 34U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMA2_SELECT_INPUT     = 35U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB3_SELECT_INPUT     = 36U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB0_SELECT_INPUT     = 37U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB1_SELECT_INPUT     = 38U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM2_PWMB2_SELECT_INPUT     = 39U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA0_SELECT_INPUT     = 40U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT     = 41U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA2_SELECT_INPUT     = 42U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXPWM4_PWMA3_SELECT_INPUT     = 43U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DQS_SELECT_INPUT       = 44U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA0_SELECT_INPUT     = 45U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA1_SELECT_INPUT     = 46U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA2_SELECT_INPUT     = 47U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_DATA3_SELECT_INPUT     = 48U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA0_SELECT_INPUT     = 49U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA1_SELECT_INPUT     = 50U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA2_SELECT_INPUT     = 51U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIB_DATA3_SELECT_INPUT     = 52U,  /**< IOMUXC select input index */
+    kIOMUXC_FLEXSPIA_SCK_SELECT_INPUT       = 53U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C1_SCL_SELECT_INPUT         = 54U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C1_SDA_SELECT_INPUT         = 55U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C2_SCL_SELECT_INPUT         = 56U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C2_SDA_SELECT_INPUT         = 57U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C3_SCL_SELECT_INPUT         = 58U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C3_SDA_SELECT_INPUT         = 59U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C4_SCL_SELECT_INPUT         = 60U,  /**< IOMUXC select input index */
+    kIOMUXC_LPI2C4_SDA_SELECT_INPUT         = 61U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_PCS0_SELECT_INPUT        = 62U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SCK_SELECT_INPUT         = 63U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SDI_SELECT_INPUT         = 64U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI1_SDO_SELECT_INPUT         = 65U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_PCS0_SELECT_INPUT        = 66U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SCK_SELECT_INPUT         = 67U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SDI_SELECT_INPUT         = 68U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI2_SDO_SELECT_INPUT         = 69U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_PCS0_SELECT_INPUT        = 70U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SCK_SELECT_INPUT         = 71U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SDI_SELECT_INPUT         = 72U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI3_SDO_SELECT_INPUT         = 73U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_PCS0_SELECT_INPUT        = 74U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SCK_SELECT_INPUT         = 75U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SDI_SELECT_INPUT         = 76U,  /**< IOMUXC select input index */
+    kIOMUXC_LPSPI4_SDO_SELECT_INPUT         = 77U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART2_RX_SELECT_INPUT         = 78U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART2_TX_SELECT_INPUT         = 79U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_CTS_B_SELECT_INPUT      = 80U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_RX_SELECT_INPUT         = 81U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART3_TX_SELECT_INPUT         = 82U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART4_RX_SELECT_INPUT         = 83U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART4_TX_SELECT_INPUT         = 84U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART5_RX_SELECT_INPUT         = 85U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART5_TX_SELECT_INPUT         = 86U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART6_RX_SELECT_INPUT         = 87U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART6_TX_SELECT_INPUT         = 88U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART7_RX_SELECT_INPUT         = 89U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART7_TX_SELECT_INPUT         = 90U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART8_RX_SELECT_INPUT         = 91U,  /**< IOMUXC select input index */
+    kIOMUXC_LPUART8_TX_SELECT_INPUT         = 92U,  /**< IOMUXC select input index */
+    kIOMUXC_NMI_SELECT_INPUT                = 93U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER0_SELECT_INPUT     = 94U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER1_SELECT_INPUT     = 95U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER2_SELECT_INPUT     = 96U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER2_TIMER3_SELECT_INPUT     = 97U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER0_SELECT_INPUT     = 98U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER1_SELECT_INPUT     = 99U,  /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER2_SELECT_INPUT     = 100U, /**< IOMUXC select input index */
+    kIOMUXC_QTIMER3_TIMER3_SELECT_INPUT     = 101U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_MCLK2_SELECT_INPUT         = 102U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_BCLK_SELECT_INPUT       = 103U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA0_SELECT_INPUT      = 104U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA1_SELECT_INPUT      = 105U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA2_SELECT_INPUT      = 106U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_DATA3_SELECT_INPUT      = 107U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_RX_SYNC_SELECT_INPUT       = 108U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_TX_BCLK_SELECT_INPUT       = 109U, /**< IOMUXC select input index */
+    kIOMUXC_SAI1_TX_SYNC_SELECT_INPUT       = 110U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_MCLK2_SELECT_INPUT         = 111U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_BCLK_SELECT_INPUT       = 112U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_DATA0_SELECT_INPUT      = 113U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_RX_SYNC_SELECT_INPUT       = 114U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_TX_BCLK_SELECT_INPUT       = 115U, /**< IOMUXC select input index */
+    kIOMUXC_SAI2_TX_SYNC_SELECT_INPUT       = 116U, /**< IOMUXC select input index */
+    kIOMUXC_SPDIF_IN_SELECT_INPUT           = 117U, /**< IOMUXC select input index */
+    kIOMUXC_USB_OTG2_OC_SELECT_INPUT        = 118U, /**< IOMUXC select input index */
+    kIOMUXC_USB_OTG1_OC_SELECT_INPUT        = 119U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC1_CD_B_SELECT_INPUT        = 120U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC1_WP_SELECT_INPUT          = 121U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CLK_SELECT_INPUT         = 122U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CD_B_SELECT_INPUT        = 123U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_CMD_SELECT_INPUT         = 124U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA0_SELECT_INPUT       = 125U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA1_SELECT_INPUT       = 126U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA2_SELECT_INPUT       = 127U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA3_SELECT_INPUT       = 128U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA4_SELECT_INPUT       = 129U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA5_SELECT_INPUT       = 130U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA6_SELECT_INPUT       = 131U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_DATA7_SELECT_INPUT       = 132U, /**< IOMUXC select input index */
+    kIOMUXC_USDHC2_WP_SELECT_INPUT          = 133U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN02_SELECT_INPUT         = 134U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN03_SELECT_INPUT         = 135U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN04_SELECT_INPUT         = 136U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN05_SELECT_INPUT         = 137U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN06_SELECT_INPUT         = 138U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN07_SELECT_INPUT         = 139U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN08_SELECT_INPUT         = 140U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN09_SELECT_INPUT         = 141U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN17_SELECT_INPUT         = 142U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN18_SELECT_INPUT         = 143U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN20_SELECT_INPUT         = 144U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN22_SELECT_INPUT         = 145U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN23_SELECT_INPUT         = 146U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN24_SELECT_INPUT         = 147U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN14_SELECT_INPUT         = 148U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN15_SELECT_INPUT         = 149U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN16_SELECT_INPUT         = 150U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN25_SELECT_INPUT         = 151U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN19_SELECT_INPUT         = 152U, /**< IOMUXC select input index */
+    kIOMUXC_XBAR1_IN21_SELECT_INPUT         = 153U, /**< IOMUXC select input index */
 } iomuxc_select_input_t;
 
 typedef enum _xbar_input_signal
 {
-    kXBARA1_InputLogicLow           = 0|0x100U,    /**< LOGIC_LOW output assigned to XBARA1_IN0 input. */
-    kXBARA1_InputLogicHigh          = 1|0x100U,    /**< LOGIC_HIGH output assigned to XBARA1_IN1 input. */
-    kXBARA1_InputIomuxXbarIn02      = 2|0x100U,    /**< IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input. */
-    kXBARA1_InputIomuxXbarIn03      = 3|0x100U,    /**< IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input. */
-    kXBARA1_InputIomuxXbarInout04   = 4|0x100U,    /**< IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input. */
-    kXBARA1_InputIomuxXbarInout05   = 5|0x100U,    /**< IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input. */
-    kXBARA1_InputIomuxXbarInout06   = 6|0x100U,    /**< IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input. */
-    kXBARA1_InputIomuxXbarInout07   = 7|0x100U,    /**< IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input. */
-    kXBARA1_InputIomuxXbarInout08   = 8|0x100U,    /**< IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input. */
-    kXBARA1_InputIomuxXbarInout09   = 9|0x100U,    /**< IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input. */
-    kXBARA1_InputIomuxXbarInout10   = 10|0x100U,   /**< IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input. */
-    kXBARA1_InputIomuxXbarInout11   = 11|0x100U,   /**< IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input. */
-    kXBARA1_InputIomuxXbarInout12   = 12|0x100U,   /**< IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input. */
-    kXBARA1_InputIomuxXbarInout13   = 13|0x100U,   /**< IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input. */
-    kXBARA1_InputIomuxXbarInout14   = 14|0x100U,   /**< IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input. */
-    kXBARA1_InputIomuxXbarInout15   = 15|0x100U,   /**< IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input. */
-    kXBARA1_InputIomuxXbarInout16   = 16|0x100U,   /**< IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input. */
-    kXBARA1_InputIomuxXbarInout17   = 17|0x100U,   /**< IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input. */
-    kXBARA1_InputIomuxXbarInout18   = 18|0x100U,   /**< IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input. */
-    kXBARA1_InputIomuxXbarInout19   = 19|0x100U,   /**< IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input. */
-    kXBARA1_InputIomuxXbarIn20      = 20|0x100U,   /**< IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input. */
-    kXBARA1_InputIomuxXbarIn21      = 21|0x100U,   /**< IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input. */
-    kXBARA1_InputIomuxXbarIn22      = 22|0x100U,   /**< IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input. */
-    kXBARA1_InputIomuxXbarIn23      = 23|0x100U,   /**< IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input. */
-    kXBARA1_InputIomuxXbarIn24      = 24|0x100U,   /**< IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input. */
-    kXBARA1_InputIomuxXbarIn25      = 25|0x100U,   /**< IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input. */
-    kXBARA1_InputAcmp1Out           = 26|0x100U,   /**< ACMP1_OUT output assigned to XBARA1_IN26 input. */
-    kXBARA1_InputAcmp2Out           = 27|0x100U,   /**< ACMP2_OUT output assigned to XBARA1_IN27 input. */
-    kXBARA1_InputAcmp3Out           = 28|0x100U,   /**< ACMP3_OUT output assigned to XBARA1_IN28 input. */
-    kXBARA1_InputAcmp4Out           = 29|0x100U,   /**< ACMP4_OUT output assigned to XBARA1_IN29 input. */
-    kXBARA1_InputRESERVED30         = 30|0x100U,   /**< XBARA1_IN30 input is reserved. */
-    kXBARA1_InputRESERVED31         = 31|0x100U,   /**< XBARA1_IN31 input is reserved. */
-    kXBARA1_InputQtimer3Tmr0Output  = 32|0x100U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input. */
-    kXBARA1_InputQtimer3Tmr1Output  = 33|0x100U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input. */
-    kXBARA1_InputQtimer3Tmr2Output  = 34|0x100U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input. */
-    kXBARA1_InputQtimer3Tmr3Output  = 35|0x100U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input. */
-    kXBARA1_InputQtimer4Tmr0Output  = 36|0x100U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input. */
-    kXBARA1_InputQtimer4Tmr1Output  = 37|0x100U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input. */
-    kXBARA1_InputQtimer4Tmr2Output  = 38|0x100U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input. */
-    kXBARA1_InputQtimer4Tmr3Output  = 39|0x100U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input. */
-    kXBARA1_InputFlexpwm1Pwm1OutTrig01 = 40|0x100U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input. */
-    kXBARA1_InputFlexpwm1Pwm2OutTrig01 = 41|0x100U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input. */
-    kXBARA1_InputFlexpwm1Pwm3OutTrig01 = 42|0x100U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input. */
-    kXBARA1_InputFlexpwm1Pwm4OutTrig01 = 43|0x100U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input. */
-    kXBARA1_InputFlexpwm2Pwm1OutTrig01 = 44|0x100U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input. */
-    kXBARA1_InputFlexpwm2Pwm2OutTrig01 = 45|0x100U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input. */
-    kXBARA1_InputFlexpwm2Pwm3OutTrig01 = 46|0x100U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input. */
-    kXBARA1_InputFlexpwm2Pwm4OutTrig01 = 47|0x100U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input. */
-    kXBARA1_InputFlexpwm3Pwm1OutTrig01 = 48|0x100U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input. */
-    kXBARA1_InputFlexpwm3Pwm2OutTrig01 = 49|0x100U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input. */
-    kXBARA1_InputFlexpwm3Pwm3OutTrig01 = 50|0x100U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input. */
-    kXBARA1_InputFlexpwm3Pwm4OutTrig01 = 51|0x100U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input. */
-    kXBARA1_InputFlexpwm4Pwm1OutTrig01 = 52|0x100U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input. */
-    kXBARA1_InputFlexpwm4Pwm2OutTrig01 = 53|0x100U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input. */
-    kXBARA1_InputFlexpwm4Pwm3OutTrig01 = 54|0x100U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input. */
-    kXBARA1_InputFlexpwm4Pwm4OutTrig01 = 55|0x100U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input. */
-    kXBARA1_InputPitTrigger0        = 56|0x100U,   /**< PIT_TRIGGER0 output assigned to XBARA1_IN56 input. */
-    kXBARA1_InputPitTrigger1        = 57|0x100U,   /**< PIT_TRIGGER1 output assigned to XBARA1_IN57 input. */
-    kXBARA1_InputPitTrigger2        = 58|0x100U,   /**< PIT_TRIGGER2 output assigned to XBARA1_IN58 input. */
-    kXBARA1_InputPitTrigger3        = 59|0x100U,   /**< PIT_TRIGGER3 output assigned to XBARA1_IN59 input. */
-    kXBARA1_InputEnc1PosMatch       = 60|0x100U,   /**< ENC1_POS_MATCH output assigned to XBARA1_IN60 input. */
-    kXBARA1_InputEnc2PosMatch       = 61|0x100U,   /**< ENC2_POS_MATCH output assigned to XBARA1_IN61 input. */
-    kXBARA1_InputEnc3PosMatch       = 62|0x100U,   /**< ENC3_POS_MATCH output assigned to XBARA1_IN62 input. */
-    kXBARA1_InputEnc4PosMatch       = 63|0x100U,   /**< ENC4_POS_MATCH output assigned to XBARA1_IN63 input. */
-    kXBARA1_InputDmaDone0           = 64|0x100U,   /**< DMA_DONE0 output assigned to XBARA1_IN64 input. */
-    kXBARA1_InputDmaDone1           = 65|0x100U,   /**< DMA_DONE1 output assigned to XBARA1_IN65 input. */
-    kXBARA1_InputDmaDone2           = 66|0x100U,   /**< DMA_DONE2 output assigned to XBARA1_IN66 input. */
-    kXBARA1_InputDmaDone3           = 67|0x100U,   /**< DMA_DONE3 output assigned to XBARA1_IN67 input. */
-    kXBARA1_InputDmaDone4           = 68|0x100U,   /**< DMA_DONE4 output assigned to XBARA1_IN68 input. */
-    kXBARA1_InputDmaDone5           = 69|0x100U,   /**< DMA_DONE5 output assigned to XBARA1_IN69 input. */
-    kXBARA1_InputDmaDone6           = 70|0x100U,   /**< DMA_DONE6 output assigned to XBARA1_IN70 input. */
-    kXBARA1_InputDmaDone7           = 71|0x100U,   /**< DMA_DONE7 output assigned to XBARA1_IN71 input. */
-    kXBARA1_InputAoi1Out0           = 72|0x100U,   /**< AOI1_OUT0 output assigned to XBARA1_IN72 input. */
-    kXBARA1_InputAoi1Out1           = 73|0x100U,   /**< AOI1_OUT1 output assigned to XBARA1_IN73 input. */
-    kXBARA1_InputAoi1Out2           = 74|0x100U,   /**< AOI1_OUT2 output assigned to XBARA1_IN74 input. */
-    kXBARA1_InputAoi1Out3           = 75|0x100U,   /**< AOI1_OUT3 output assigned to XBARA1_IN75 input. */
-    kXBARA1_InputAoi2Out0           = 76|0x100U,   /**< AOI2_OUT0 output assigned to XBARA1_IN76 input. */
-    kXBARA1_InputAoi2Out1           = 77|0x100U,   /**< AOI2_OUT1 output assigned to XBARA1_IN77 input. */
-    kXBARA1_InputAoi2Out2           = 78|0x100U,   /**< AOI2_OUT2 output assigned to XBARA1_IN78 input. */
-    kXBARA1_InputAoi2Out3           = 79|0x100U,   /**< AOI2_OUT3 output assigned to XBARA1_IN79 input. */
-    kXBARA1_InputAdcEtcXbar0Coco0   = 80|0x100U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input. */
-    kXBARA1_InputAdcEtcXbar0Coco1   = 81|0x100U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input. */
-    kXBARA1_InputAdcEtcXbar0Coco2   = 82|0x100U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input. */
-    kXBARA1_InputAdcEtcXbar0Coco3   = 83|0x100U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input. */
-    kXBARA1_InputAdcEtcXbar1Coco0   = 84|0x100U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input. */
-    kXBARA1_InputAdcEtcXbar1Coco1   = 85|0x100U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input. */
-    kXBARA1_InputAdcEtcXbar1Coco2   = 86|0x100U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input. */
-    kXBARA1_InputAdcEtcXbar1Coco3   = 87|0x100U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input. */
-    kXBARB2_InputLogicLow           = 0|0x200U,    /**< LOGIC_LOW output assigned to XBARB2_IN0 input. */
-    kXBARB2_InputLogicHigh          = 1|0x200U,    /**< LOGIC_HIGH output assigned to XBARB2_IN1 input. */
-    kXBARB2_InputRESERVED2          = 2|0x200U,    /**< XBARB2_IN2 input is reserved. */
-    kXBARB2_InputRESERVED3          = 3|0x200U,    /**< XBARB2_IN3 input is reserved. */
-    kXBARB2_InputRESERVED4          = 4|0x200U,    /**< XBARB2_IN4 input is reserved. */
-    kXBARB2_InputRESERVED5          = 5|0x200U,    /**< XBARB2_IN5 input is reserved. */
-    kXBARB2_InputAcmp1Out           = 6|0x200U,    /**< ACMP1_OUT output assigned to XBARB2_IN6 input. */
-    kXBARB2_InputAcmp2Out           = 7|0x200U,    /**< ACMP2_OUT output assigned to XBARB2_IN7 input. */
-    kXBARB2_InputAcmp3Out           = 8|0x200U,    /**< ACMP3_OUT output assigned to XBARB2_IN8 input. */
-    kXBARB2_InputAcmp4Out           = 9|0x200U,    /**< ACMP4_OUT output assigned to XBARB2_IN9 input. */
-    kXBARB2_InputRESERVED10         = 10|0x200U,   /**< XBARB2_IN10 input is reserved. */
-    kXBARB2_InputRESERVED11         = 11|0x200U,   /**< XBARB2_IN11 input is reserved. */
-    kXBARB2_InputQtimer3Tmr0Output  = 12|0x200U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input. */
-    kXBARB2_InputQtimer3Tmr1Output  = 13|0x200U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input. */
-    kXBARB2_InputQtimer3Tmr2Output  = 14|0x200U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input. */
-    kXBARB2_InputQtimer3Tmr3Output  = 15|0x200U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input. */
-    kXBARB2_InputQtimer4Tmr0Output  = 16|0x200U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input. */
-    kXBARB2_InputQtimer4Tmr1Output  = 17|0x200U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input. */
-    kXBARB2_InputQtimer4Tmr2Output  = 18|0x200U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input. */
-    kXBARB2_InputQtimer4Tmr3Output  = 19|0x200U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input. */
-    kXBARB2_InputFlexpwm1Pwm1OutTrig01 = 20|0x200U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input. */
-    kXBARB2_InputFlexpwm1Pwm2OutTrig01 = 21|0x200U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input. */
-    kXBARB2_InputFlexpwm1Pwm3OutTrig01 = 22|0x200U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input. */
-    kXBARB2_InputFlexpwm1Pwm4OutTrig01 = 23|0x200U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input. */
-    kXBARB2_InputFlexpwm2Pwm1OutTrig01 = 24|0x200U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input. */
-    kXBARB2_InputFlexpwm2Pwm2OutTrig01 = 25|0x200U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input. */
-    kXBARB2_InputFlexpwm2Pwm3OutTrig01 = 26|0x200U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input. */
-    kXBARB2_InputFlexpwm2Pwm4OutTrig01 = 27|0x200U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input. */
-    kXBARB2_InputFlexpwm3Pwm1OutTrig01 = 28|0x200U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input. */
-    kXBARB2_InputFlexpwm3Pwm2OutTrig01 = 29|0x200U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input. */
-    kXBARB2_InputFlexpwm3Pwm3OutTrig01 = 30|0x200U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input. */
-    kXBARB2_InputFlexpwm3Pwm4OutTrig01 = 31|0x200U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input. */
-    kXBARB2_InputFlexpwm4Pwm1OutTrig01 = 32|0x200U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input. */
-    kXBARB2_InputFlexpwm4Pwm2OutTrig01 = 33|0x200U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input. */
-    kXBARB2_InputFlexpwm4Pwm3OutTrig01 = 34|0x200U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input. */
-    kXBARB2_InputFlexpwm4Pwm4OutTrig01 = 35|0x200U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input. */
-    kXBARB2_InputPitTrigger0        = 36|0x200U,   /**< PIT_TRIGGER0 output assigned to XBARB2_IN36 input. */
-    kXBARB2_InputPitTrigger1        = 37|0x200U,   /**< PIT_TRIGGER1 output assigned to XBARB2_IN37 input. */
-    kXBARB2_InputAdcEtcXbar0Coco0   = 38|0x200U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input. */
-    kXBARB2_InputAdcEtcXbar0Coco1   = 39|0x200U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input. */
-    kXBARB2_InputAdcEtcXbar0Coco2   = 40|0x200U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input. */
-    kXBARB2_InputAdcEtcXbar0Coco3   = 41|0x200U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input. */
-    kXBARB2_InputAdcEtcXbar1Coco0   = 42|0x200U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input. */
-    kXBARB2_InputAdcEtcXbar1Coco1   = 43|0x200U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input. */
-    kXBARB2_InputAdcEtcXbar1Coco2   = 44|0x200U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input. */
-    kXBARB2_InputAdcEtcXbar1Coco3   = 45|0x200U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input. */
-    kXBARB2_InputEnc1PosMatch       = 46|0x200U,   /**< ENC1_POS_MATCH output assigned to XBARB2_IN46 input. */
-    kXBARB2_InputEnc2PosMatch       = 47|0x200U,   /**< ENC2_POS_MATCH output assigned to XBARB2_IN47 input. */
-    kXBARB2_InputEnc3PosMatch       = 48|0x200U,   /**< ENC3_POS_MATCH output assigned to XBARB2_IN48 input. */
-    kXBARB2_InputEnc4PosMatch       = 49|0x200U,   /**< ENC4_POS_MATCH output assigned to XBARB2_IN49 input. */
-    kXBARB2_InputDmaDone0           = 50|0x200U,   /**< DMA_DONE0 output assigned to XBARB2_IN50 input. */
-    kXBARB2_InputDmaDone1           = 51|0x200U,   /**< DMA_DONE1 output assigned to XBARB2_IN51 input. */
-    kXBARB2_InputDmaDone2           = 52|0x200U,   /**< DMA_DONE2 output assigned to XBARB2_IN52 input. */
-    kXBARB2_InputDmaDone3           = 53|0x200U,   /**< DMA_DONE3 output assigned to XBARB2_IN53 input. */
-    kXBARB2_InputDmaDone4           = 54|0x200U,   /**< DMA_DONE4 output assigned to XBARB2_IN54 input. */
-    kXBARB2_InputDmaDone5           = 55|0x200U,   /**< DMA_DONE5 output assigned to XBARB2_IN55 input. */
-    kXBARB2_InputDmaDone6           = 56|0x200U,   /**< DMA_DONE6 output assigned to XBARB2_IN56 input. */
-    kXBARB2_InputDmaDone7           = 57|0x200U,   /**< DMA_DONE7 output assigned to XBARB2_IN57 input. */
-    kXBARB3_InputLogicLow           = 0|0x300U,    /**< LOGIC_LOW output assigned to XBARB3_IN0 input. */
-    kXBARB3_InputLogicHigh          = 1|0x300U,    /**< LOGIC_HIGH output assigned to XBARB3_IN1 input. */
-    kXBARB3_InputRESERVED2          = 2|0x300U,    /**< XBARB3_IN2 input is reserved. */
-    kXBARB3_InputRESERVED3          = 3|0x300U,    /**< XBARB3_IN3 input is reserved. */
-    kXBARB3_InputRESERVED4          = 4|0x300U,    /**< XBARB3_IN4 input is reserved. */
-    kXBARB3_InputRESERVED5          = 5|0x300U,    /**< XBARB3_IN5 input is reserved. */
-    kXBARB3_InputAcmp1Out           = 6|0x300U,    /**< ACMP1_OUT output assigned to XBARB3_IN6 input. */
-    kXBARB3_InputAcmp2Out           = 7|0x300U,    /**< ACMP2_OUT output assigned to XBARB3_IN7 input. */
-    kXBARB3_InputAcmp3Out           = 8|0x300U,    /**< ACMP3_OUT output assigned to XBARB3_IN8 input. */
-    kXBARB3_InputAcmp4Out           = 9|0x300U,    /**< ACMP4_OUT output assigned to XBARB3_IN9 input. */
-    kXBARB3_InputRESERVED10         = 10|0x300U,   /**< XBARB3_IN10 input is reserved. */
-    kXBARB3_InputRESERVED11         = 11|0x300U,   /**< XBARB3_IN11 input is reserved. */
-    kXBARB3_InputQtimer3Tmr0Output  = 12|0x300U,   /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input. */
-    kXBARB3_InputQtimer3Tmr1Output  = 13|0x300U,   /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input. */
-    kXBARB3_InputQtimer3Tmr2Output  = 14|0x300U,   /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input. */
-    kXBARB3_InputQtimer3Tmr3Output  = 15|0x300U,   /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input. */
-    kXBARB3_InputQtimer4Tmr0Output  = 16|0x300U,   /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input. */
-    kXBARB3_InputQtimer4Tmr1Output  = 17|0x300U,   /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input. */
-    kXBARB3_InputQtimer4Tmr2Output  = 18|0x300U,   /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input. */
-    kXBARB3_InputQtimer4Tmr3Output  = 19|0x300U,   /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input. */
-    kXBARB3_InputFlexpwm1Pwm1OutTrig01 = 20|0x300U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input. */
-    kXBARB3_InputFlexpwm1Pwm2OutTrig01 = 21|0x300U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input. */
-    kXBARB3_InputFlexpwm1Pwm3OutTrig01 = 22|0x300U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input. */
-    kXBARB3_InputFlexpwm1Pwm4OutTrig01 = 23|0x300U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input. */
-    kXBARB3_InputFlexpwm2Pwm1OutTrig01 = 24|0x300U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input. */
-    kXBARB3_InputFlexpwm2Pwm2OutTrig01 = 25|0x300U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input. */
-    kXBARB3_InputFlexpwm2Pwm3OutTrig01 = 26|0x300U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input. */
-    kXBARB3_InputFlexpwm2Pwm4OutTrig01 = 27|0x300U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input. */
-    kXBARB3_InputFlexpwm3Pwm1OutTrig01 = 28|0x300U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input. */
-    kXBARB3_InputFlexpwm3Pwm2OutTrig01 = 29|0x300U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input. */
-    kXBARB3_InputFlexpwm3Pwm3OutTrig01 = 30|0x300U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input. */
-    kXBARB3_InputFlexpwm3Pwm4OutTrig01 = 31|0x300U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input. */
-    kXBARB3_InputFlexpwm4Pwm1OutTrig01 = 32|0x300U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input. */
-    kXBARB3_InputFlexpwm4Pwm2OutTrig01 = 33|0x300U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input. */
-    kXBARB3_InputFlexpwm4Pwm3OutTrig01 = 34|0x300U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input. */
-    kXBARB3_InputFlexpwm4Pwm4OutTrig01 = 35|0x300U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input. */
-    kXBARB3_InputPitTrigger0        = 36|0x300U,   /**< PIT_TRIGGER0 output assigned to XBARB3_IN36 input. */
-    kXBARB3_InputPitTrigger1        = 37|0x300U,   /**< PIT_TRIGGER1 output assigned to XBARB3_IN37 input. */
-    kXBARB3_InputAdcEtcXbar0Coco0   = 38|0x300U,   /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input. */
-    kXBARB3_InputAdcEtcXbar0Coco1   = 39|0x300U,   /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input. */
-    kXBARB3_InputAdcEtcXbar0Coco2   = 40|0x300U,   /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input. */
-    kXBARB3_InputAdcEtcXbar0Coco3   = 41|0x300U,   /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input. */
-    kXBARB3_InputAdcEtcXbar1Coco0   = 42|0x300U,   /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input. */
-    kXBARB3_InputAdcEtcXbar1Coco1   = 43|0x300U,   /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input. */
-    kXBARB3_InputAdcEtcXbar1Coco2   = 44|0x300U,   /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input. */
-    kXBARB3_InputAdcEtcXbar1Coco3   = 45|0x300U,   /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input. */
-    kXBARB3_InputEnc1PosMatch       = 46|0x300U,   /**< ENC1_POS_MATCH output assigned to XBARB3_IN46 input. */
-    kXBARB3_InputEnc2PosMatch       = 47|0x300U,   /**< ENC2_POS_MATCH output assigned to XBARB3_IN47 input. */
-    kXBARB3_InputEnc3PosMatch       = 48|0x300U,   /**< ENC3_POS_MATCH output assigned to XBARB3_IN48 input. */
-    kXBARB3_InputEnc4PosMatch       = 49|0x300U,   /**< ENC4_POS_MATCH output assigned to XBARB3_IN49 input. */
-    kXBARB3_InputDmaDone0           = 50|0x300U,   /**< DMA_DONE0 output assigned to XBARB3_IN50 input. */
-    kXBARB3_InputDmaDone1           = 51|0x300U,   /**< DMA_DONE1 output assigned to XBARB3_IN51 input. */
-    kXBARB3_InputDmaDone2           = 52|0x300U,   /**< DMA_DONE2 output assigned to XBARB3_IN52 input. */
-    kXBARB3_InputDmaDone3           = 53|0x300U,   /**< DMA_DONE3 output assigned to XBARB3_IN53 input. */
-    kXBARB3_InputDmaDone4           = 54|0x300U,   /**< DMA_DONE4 output assigned to XBARB3_IN54 input. */
-    kXBARB3_InputDmaDone5           = 55|0x300U,   /**< DMA_DONE5 output assigned to XBARB3_IN55 input. */
-    kXBARB3_InputDmaDone6           = 56|0x300U,   /**< DMA_DONE6 output assigned to XBARB3_IN56 input. */
-    kXBARB3_InputDmaDone7           = 57|0x300U,   /**< DMA_DONE7 output assigned to XBARB3_IN57 input. */
+    kXBARA1_InputLogicLow          = 0 | 0x100U,  /**< LOGIC_LOW output assigned to XBARA1_IN0 input. */
+    kXBARA1_InputLogicHigh         = 1 | 0x100U,  /**< LOGIC_HIGH output assigned to XBARA1_IN1 input. */
+    kXBARA1_InputIomuxXbarIn02     = 2 | 0x100U,  /**< IOMUX_XBAR_IN02 output assigned to XBARA1_IN2 input. */
+    kXBARA1_InputIomuxXbarIn03     = 3 | 0x100U,  /**< IOMUX_XBAR_IN03 output assigned to XBARA1_IN3 input. */
+    kXBARA1_InputIomuxXbarInout04  = 4 | 0x100U,  /**< IOMUX_XBAR_INOUT04 output assigned to XBARA1_IN4 input. */
+    kXBARA1_InputIomuxXbarInout05  = 5 | 0x100U,  /**< IOMUX_XBAR_INOUT05 output assigned to XBARA1_IN5 input. */
+    kXBARA1_InputIomuxXbarInout06  = 6 | 0x100U,  /**< IOMUX_XBAR_INOUT06 output assigned to XBARA1_IN6 input. */
+    kXBARA1_InputIomuxXbarInout07  = 7 | 0x100U,  /**< IOMUX_XBAR_INOUT07 output assigned to XBARA1_IN7 input. */
+    kXBARA1_InputIomuxXbarInout08  = 8 | 0x100U,  /**< IOMUX_XBAR_INOUT08 output assigned to XBARA1_IN8 input. */
+    kXBARA1_InputIomuxXbarInout09  = 9 | 0x100U,  /**< IOMUX_XBAR_INOUT09 output assigned to XBARA1_IN9 input. */
+    kXBARA1_InputIomuxXbarInout10  = 10 | 0x100U, /**< IOMUX_XBAR_INOUT10 output assigned to XBARA1_IN10 input. */
+    kXBARA1_InputIomuxXbarInout11  = 11 | 0x100U, /**< IOMUX_XBAR_INOUT11 output assigned to XBARA1_IN11 input. */
+    kXBARA1_InputIomuxXbarInout12  = 12 | 0x100U, /**< IOMUX_XBAR_INOUT12 output assigned to XBARA1_IN12 input. */
+    kXBARA1_InputIomuxXbarInout13  = 13 | 0x100U, /**< IOMUX_XBAR_INOUT13 output assigned to XBARA1_IN13 input. */
+    kXBARA1_InputIomuxXbarInout14  = 14 | 0x100U, /**< IOMUX_XBAR_INOUT14 output assigned to XBARA1_IN14 input. */
+    kXBARA1_InputIomuxXbarInout15  = 15 | 0x100U, /**< IOMUX_XBAR_INOUT15 output assigned to XBARA1_IN15 input. */
+    kXBARA1_InputIomuxXbarInout16  = 16 | 0x100U, /**< IOMUX_XBAR_INOUT16 output assigned to XBARA1_IN16 input. */
+    kXBARA1_InputIomuxXbarInout17  = 17 | 0x100U, /**< IOMUX_XBAR_INOUT17 output assigned to XBARA1_IN17 input. */
+    kXBARA1_InputIomuxXbarInout18  = 18 | 0x100U, /**< IOMUX_XBAR_INOUT18 output assigned to XBARA1_IN18 input. */
+    kXBARA1_InputIomuxXbarInout19  = 19 | 0x100U, /**< IOMUX_XBAR_INOUT19 output assigned to XBARA1_IN19 input. */
+    kXBARA1_InputIomuxXbarIn20     = 20 | 0x100U, /**< IOMUX_XBAR_IN20 output assigned to XBARA1_IN20 input. */
+    kXBARA1_InputIomuxXbarIn21     = 21 | 0x100U, /**< IOMUX_XBAR_IN21 output assigned to XBARA1_IN21 input. */
+    kXBARA1_InputIomuxXbarIn22     = 22 | 0x100U, /**< IOMUX_XBAR_IN22 output assigned to XBARA1_IN22 input. */
+    kXBARA1_InputIomuxXbarIn23     = 23 | 0x100U, /**< IOMUX_XBAR_IN23 output assigned to XBARA1_IN23 input. */
+    kXBARA1_InputIomuxXbarIn24     = 24 | 0x100U, /**< IOMUX_XBAR_IN24 output assigned to XBARA1_IN24 input. */
+    kXBARA1_InputIomuxXbarIn25     = 25 | 0x100U, /**< IOMUX_XBAR_IN25 output assigned to XBARA1_IN25 input. */
+    kXBARA1_InputAcmp1Out          = 26 | 0x100U, /**< ACMP1_OUT output assigned to XBARA1_IN26 input. */
+    kXBARA1_InputAcmp2Out          = 27 | 0x100U, /**< ACMP2_OUT output assigned to XBARA1_IN27 input. */
+    kXBARA1_InputAcmp3Out          = 28 | 0x100U, /**< ACMP3_OUT output assigned to XBARA1_IN28 input. */
+    kXBARA1_InputAcmp4Out          = 29 | 0x100U, /**< ACMP4_OUT output assigned to XBARA1_IN29 input. */
+    kXBARA1_InputRESERVED30        = 30 | 0x100U, /**< XBARA1_IN30 input is reserved. */
+    kXBARA1_InputRESERVED31        = 31 | 0x100U, /**< XBARA1_IN31 input is reserved. */
+    kXBARA1_InputQtimer3Tmr0Output = 32 | 0x100U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARA1_IN32 input. */
+    kXBARA1_InputQtimer3Tmr1Output = 33 | 0x100U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARA1_IN33 input. */
+    kXBARA1_InputQtimer3Tmr2Output = 34 | 0x100U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARA1_IN34 input. */
+    kXBARA1_InputQtimer3Tmr3Output = 35 | 0x100U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARA1_IN35 input. */
+    kXBARA1_InputQtimer4Tmr0Output = 36 | 0x100U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARA1_IN36 input. */
+    kXBARA1_InputQtimer4Tmr1Output = 37 | 0x100U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARA1_IN37 input. */
+    kXBARA1_InputQtimer4Tmr2Output = 38 | 0x100U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARA1_IN38 input. */
+    kXBARA1_InputQtimer4Tmr3Output = 39 | 0x100U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARA1_IN39 input. */
+    kXBARA1_InputFlexpwm1Pwm1OutTrig01 =
+        40 | 0x100U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN40 input. */
+    kXBARA1_InputFlexpwm1Pwm2OutTrig01 =
+        41 | 0x100U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN41 input. */
+    kXBARA1_InputFlexpwm1Pwm3OutTrig01 =
+        42 | 0x100U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN42 input. */
+    kXBARA1_InputFlexpwm1Pwm4OutTrig01 =
+        43 | 0x100U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN43 input. */
+    kXBARA1_InputFlexpwm2Pwm1OutTrig01 =
+        44 | 0x100U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN44 input. */
+    kXBARA1_InputFlexpwm2Pwm2OutTrig01 =
+        45 | 0x100U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN45 input. */
+    kXBARA1_InputFlexpwm2Pwm3OutTrig01 =
+        46 | 0x100U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN46 input. */
+    kXBARA1_InputFlexpwm2Pwm4OutTrig01 =
+        47 | 0x100U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN47 input. */
+    kXBARA1_InputFlexpwm3Pwm1OutTrig01 =
+        48 | 0x100U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN48 input. */
+    kXBARA1_InputFlexpwm3Pwm2OutTrig01 =
+        49 | 0x100U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN49 input. */
+    kXBARA1_InputFlexpwm3Pwm3OutTrig01 =
+        50 | 0x100U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN50 input. */
+    kXBARA1_InputFlexpwm3Pwm4OutTrig01 =
+        51 | 0x100U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN51 input. */
+    kXBARA1_InputFlexpwm4Pwm1OutTrig01 =
+        52 | 0x100U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARA1_IN52 input. */
+    kXBARA1_InputFlexpwm4Pwm2OutTrig01 =
+        53 | 0x100U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARA1_IN53 input. */
+    kXBARA1_InputFlexpwm4Pwm3OutTrig01 =
+        54 | 0x100U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARA1_IN54 input. */
+    kXBARA1_InputFlexpwm4Pwm4OutTrig01 =
+        55 | 0x100U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARA1_IN55 input. */
+    kXBARA1_InputPitTrigger0       = 56 | 0x100U, /**< PIT_TRIGGER0 output assigned to XBARA1_IN56 input. */
+    kXBARA1_InputPitTrigger1       = 57 | 0x100U, /**< PIT_TRIGGER1 output assigned to XBARA1_IN57 input. */
+    kXBARA1_InputPitTrigger2       = 58 | 0x100U, /**< PIT_TRIGGER2 output assigned to XBARA1_IN58 input. */
+    kXBARA1_InputPitTrigger3       = 59 | 0x100U, /**< PIT_TRIGGER3 output assigned to XBARA1_IN59 input. */
+    kXBARA1_InputEnc1PosMatch      = 60 | 0x100U, /**< ENC1_POS_MATCH output assigned to XBARA1_IN60 input. */
+    kXBARA1_InputEnc2PosMatch      = 61 | 0x100U, /**< ENC2_POS_MATCH output assigned to XBARA1_IN61 input. */
+    kXBARA1_InputEnc3PosMatch      = 62 | 0x100U, /**< ENC3_POS_MATCH output assigned to XBARA1_IN62 input. */
+    kXBARA1_InputEnc4PosMatch      = 63 | 0x100U, /**< ENC4_POS_MATCH output assigned to XBARA1_IN63 input. */
+    kXBARA1_InputDmaDone0          = 64 | 0x100U, /**< DMA_DONE0 output assigned to XBARA1_IN64 input. */
+    kXBARA1_InputDmaDone1          = 65 | 0x100U, /**< DMA_DONE1 output assigned to XBARA1_IN65 input. */
+    kXBARA1_InputDmaDone2          = 66 | 0x100U, /**< DMA_DONE2 output assigned to XBARA1_IN66 input. */
+    kXBARA1_InputDmaDone3          = 67 | 0x100U, /**< DMA_DONE3 output assigned to XBARA1_IN67 input. */
+    kXBARA1_InputDmaDone4          = 68 | 0x100U, /**< DMA_DONE4 output assigned to XBARA1_IN68 input. */
+    kXBARA1_InputDmaDone5          = 69 | 0x100U, /**< DMA_DONE5 output assigned to XBARA1_IN69 input. */
+    kXBARA1_InputDmaDone6          = 70 | 0x100U, /**< DMA_DONE6 output assigned to XBARA1_IN70 input. */
+    kXBARA1_InputDmaDone7          = 71 | 0x100U, /**< DMA_DONE7 output assigned to XBARA1_IN71 input. */
+    kXBARA1_InputAoi1Out0          = 72 | 0x100U, /**< AOI1_OUT0 output assigned to XBARA1_IN72 input. */
+    kXBARA1_InputAoi1Out1          = 73 | 0x100U, /**< AOI1_OUT1 output assigned to XBARA1_IN73 input. */
+    kXBARA1_InputAoi1Out2          = 74 | 0x100U, /**< AOI1_OUT2 output assigned to XBARA1_IN74 input. */
+    kXBARA1_InputAoi1Out3          = 75 | 0x100U, /**< AOI1_OUT3 output assigned to XBARA1_IN75 input. */
+    kXBARA1_InputAoi2Out0          = 76 | 0x100U, /**< AOI2_OUT0 output assigned to XBARA1_IN76 input. */
+    kXBARA1_InputAoi2Out1          = 77 | 0x100U, /**< AOI2_OUT1 output assigned to XBARA1_IN77 input. */
+    kXBARA1_InputAoi2Out2          = 78 | 0x100U, /**< AOI2_OUT2 output assigned to XBARA1_IN78 input. */
+    kXBARA1_InputAoi2Out3          = 79 | 0x100U, /**< AOI2_OUT3 output assigned to XBARA1_IN79 input. */
+    kXBARA1_InputAdcEtcXbar0Coco0  = 80 | 0x100U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARA1_IN80 input. */
+    kXBARA1_InputAdcEtcXbar0Coco1  = 81 | 0x100U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARA1_IN81 input. */
+    kXBARA1_InputAdcEtcXbar0Coco2  = 82 | 0x100U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARA1_IN82 input. */
+    kXBARA1_InputAdcEtcXbar0Coco3  = 83 | 0x100U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARA1_IN83 input. */
+    kXBARA1_InputAdcEtcXbar1Coco0  = 84 | 0x100U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARA1_IN84 input. */
+    kXBARA1_InputAdcEtcXbar1Coco1  = 85 | 0x100U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARA1_IN85 input. */
+    kXBARA1_InputAdcEtcXbar1Coco2  = 86 | 0x100U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARA1_IN86 input. */
+    kXBARA1_InputAdcEtcXbar1Coco3  = 87 | 0x100U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARA1_IN87 input. */
+    kXBARB2_InputLogicLow          = 0 | 0x200U,  /**< LOGIC_LOW output assigned to XBARB2_IN0 input. */
+    kXBARB2_InputLogicHigh         = 1 | 0x200U,  /**< LOGIC_HIGH output assigned to XBARB2_IN1 input. */
+    kXBARB2_InputRESERVED2         = 2 | 0x200U,  /**< XBARB2_IN2 input is reserved. */
+    kXBARB2_InputRESERVED3         = 3 | 0x200U,  /**< XBARB2_IN3 input is reserved. */
+    kXBARB2_InputRESERVED4         = 4 | 0x200U,  /**< XBARB2_IN4 input is reserved. */
+    kXBARB2_InputRESERVED5         = 5 | 0x200U,  /**< XBARB2_IN5 input is reserved. */
+    kXBARB2_InputAcmp1Out          = 6 | 0x200U,  /**< ACMP1_OUT output assigned to XBARB2_IN6 input. */
+    kXBARB2_InputAcmp2Out          = 7 | 0x200U,  /**< ACMP2_OUT output assigned to XBARB2_IN7 input. */
+    kXBARB2_InputAcmp3Out          = 8 | 0x200U,  /**< ACMP3_OUT output assigned to XBARB2_IN8 input. */
+    kXBARB2_InputAcmp4Out          = 9 | 0x200U,  /**< ACMP4_OUT output assigned to XBARB2_IN9 input. */
+    kXBARB2_InputRESERVED10        = 10 | 0x200U, /**< XBARB2_IN10 input is reserved. */
+    kXBARB2_InputRESERVED11        = 11 | 0x200U, /**< XBARB2_IN11 input is reserved. */
+    kXBARB2_InputQtimer3Tmr0Output = 12 | 0x200U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB2_IN12 input. */
+    kXBARB2_InputQtimer3Tmr1Output = 13 | 0x200U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB2_IN13 input. */
+    kXBARB2_InputQtimer3Tmr2Output = 14 | 0x200U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB2_IN14 input. */
+    kXBARB2_InputQtimer3Tmr3Output = 15 | 0x200U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB2_IN15 input. */
+    kXBARB2_InputQtimer4Tmr0Output = 16 | 0x200U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB2_IN16 input. */
+    kXBARB2_InputQtimer4Tmr1Output = 17 | 0x200U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB2_IN17 input. */
+    kXBARB2_InputQtimer4Tmr2Output = 18 | 0x200U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB2_IN18 input. */
+    kXBARB2_InputQtimer4Tmr3Output = 19 | 0x200U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB2_IN19 input. */
+    kXBARB2_InputFlexpwm1Pwm1OutTrig01 =
+        20 | 0x200U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN20 input. */
+    kXBARB2_InputFlexpwm1Pwm2OutTrig01 =
+        21 | 0x200U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN21 input. */
+    kXBARB2_InputFlexpwm1Pwm3OutTrig01 =
+        22 | 0x200U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN22 input. */
+    kXBARB2_InputFlexpwm1Pwm4OutTrig01 =
+        23 | 0x200U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN23 input. */
+    kXBARB2_InputFlexpwm2Pwm1OutTrig01 =
+        24 | 0x200U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN24 input. */
+    kXBARB2_InputFlexpwm2Pwm2OutTrig01 =
+        25 | 0x200U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN25 input. */
+    kXBARB2_InputFlexpwm2Pwm3OutTrig01 =
+        26 | 0x200U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN26 input. */
+    kXBARB2_InputFlexpwm2Pwm4OutTrig01 =
+        27 | 0x200U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN27 input. */
+    kXBARB2_InputFlexpwm3Pwm1OutTrig01 =
+        28 | 0x200U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN28 input. */
+    kXBARB2_InputFlexpwm3Pwm2OutTrig01 =
+        29 | 0x200U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN29 input. */
+    kXBARB2_InputFlexpwm3Pwm3OutTrig01 =
+        30 | 0x200U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN30 input. */
+    kXBARB2_InputFlexpwm3Pwm4OutTrig01 =
+        31 | 0x200U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN31 input. */
+    kXBARB2_InputFlexpwm4Pwm1OutTrig01 =
+        32 | 0x200U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB2_IN32 input. */
+    kXBARB2_InputFlexpwm4Pwm2OutTrig01 =
+        33 | 0x200U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB2_IN33 input. */
+    kXBARB2_InputFlexpwm4Pwm3OutTrig01 =
+        34 | 0x200U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB2_IN34 input. */
+    kXBARB2_InputFlexpwm4Pwm4OutTrig01 =
+        35 | 0x200U, /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB2_IN35 input. */
+    kXBARB2_InputPitTrigger0       = 36 | 0x200U, /**< PIT_TRIGGER0 output assigned to XBARB2_IN36 input. */
+    kXBARB2_InputPitTrigger1       = 37 | 0x200U, /**< PIT_TRIGGER1 output assigned to XBARB2_IN37 input. */
+    kXBARB2_InputAdcEtcXbar0Coco0  = 38 | 0x200U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB2_IN38 input. */
+    kXBARB2_InputAdcEtcXbar0Coco1  = 39 | 0x200U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB2_IN39 input. */
+    kXBARB2_InputAdcEtcXbar0Coco2  = 40 | 0x200U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB2_IN40 input. */
+    kXBARB2_InputAdcEtcXbar0Coco3  = 41 | 0x200U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB2_IN41 input. */
+    kXBARB2_InputAdcEtcXbar1Coco0  = 42 | 0x200U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB2_IN42 input. */
+    kXBARB2_InputAdcEtcXbar1Coco1  = 43 | 0x200U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB2_IN43 input. */
+    kXBARB2_InputAdcEtcXbar1Coco2  = 44 | 0x200U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB2_IN44 input. */
+    kXBARB2_InputAdcEtcXbar1Coco3  = 45 | 0x200U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB2_IN45 input. */
+    kXBARB2_InputEnc1PosMatch      = 46 | 0x200U, /**< ENC1_POS_MATCH output assigned to XBARB2_IN46 input. */
+    kXBARB2_InputEnc2PosMatch      = 47 | 0x200U, /**< ENC2_POS_MATCH output assigned to XBARB2_IN47 input. */
+    kXBARB2_InputEnc3PosMatch      = 48 | 0x200U, /**< ENC3_POS_MATCH output assigned to XBARB2_IN48 input. */
+    kXBARB2_InputEnc4PosMatch      = 49 | 0x200U, /**< ENC4_POS_MATCH output assigned to XBARB2_IN49 input. */
+    kXBARB2_InputDmaDone0          = 50 | 0x200U, /**< DMA_DONE0 output assigned to XBARB2_IN50 input. */
+    kXBARB2_InputDmaDone1          = 51 | 0x200U, /**< DMA_DONE1 output assigned to XBARB2_IN51 input. */
+    kXBARB2_InputDmaDone2          = 52 | 0x200U, /**< DMA_DONE2 output assigned to XBARB2_IN52 input. */
+    kXBARB2_InputDmaDone3          = 53 | 0x200U, /**< DMA_DONE3 output assigned to XBARB2_IN53 input. */
+    kXBARB2_InputDmaDone4          = 54 | 0x200U, /**< DMA_DONE4 output assigned to XBARB2_IN54 input. */
+    kXBARB2_InputDmaDone5          = 55 | 0x200U, /**< DMA_DONE5 output assigned to XBARB2_IN55 input. */
+    kXBARB2_InputDmaDone6          = 56 | 0x200U, /**< DMA_DONE6 output assigned to XBARB2_IN56 input. */
+    kXBARB2_InputDmaDone7          = 57 | 0x200U, /**< DMA_DONE7 output assigned to XBARB2_IN57 input. */
+    kXBARB3_InputLogicLow          = 0 | 0x300U,  /**< LOGIC_LOW output assigned to XBARB3_IN0 input. */
+    kXBARB3_InputLogicHigh         = 1 | 0x300U,  /**< LOGIC_HIGH output assigned to XBARB3_IN1 input. */
+    kXBARB3_InputRESERVED2         = 2 | 0x300U,  /**< XBARB3_IN2 input is reserved. */
+    kXBARB3_InputRESERVED3         = 3 | 0x300U,  /**< XBARB3_IN3 input is reserved. */
+    kXBARB3_InputRESERVED4         = 4 | 0x300U,  /**< XBARB3_IN4 input is reserved. */
+    kXBARB3_InputRESERVED5         = 5 | 0x300U,  /**< XBARB3_IN5 input is reserved. */
+    kXBARB3_InputAcmp1Out          = 6 | 0x300U,  /**< ACMP1_OUT output assigned to XBARB3_IN6 input. */
+    kXBARB3_InputAcmp2Out          = 7 | 0x300U,  /**< ACMP2_OUT output assigned to XBARB3_IN7 input. */
+    kXBARB3_InputAcmp3Out          = 8 | 0x300U,  /**< ACMP3_OUT output assigned to XBARB3_IN8 input. */
+    kXBARB3_InputAcmp4Out          = 9 | 0x300U,  /**< ACMP4_OUT output assigned to XBARB3_IN9 input. */
+    kXBARB3_InputRESERVED10        = 10 | 0x300U, /**< XBARB3_IN10 input is reserved. */
+    kXBARB3_InputRESERVED11        = 11 | 0x300U, /**< XBARB3_IN11 input is reserved. */
+    kXBARB3_InputQtimer3Tmr0Output = 12 | 0x300U, /**< QTIMER3_TMR0_OUTPUT output assigned to XBARB3_IN12 input. */
+    kXBARB3_InputQtimer3Tmr1Output = 13 | 0x300U, /**< QTIMER3_TMR1_OUTPUT output assigned to XBARB3_IN13 input. */
+    kXBARB3_InputQtimer3Tmr2Output = 14 | 0x300U, /**< QTIMER3_TMR2_OUTPUT output assigned to XBARB3_IN14 input. */
+    kXBARB3_InputQtimer3Tmr3Output = 15 | 0x300U, /**< QTIMER3_TMR3_OUTPUT output assigned to XBARB3_IN15 input. */
+    kXBARB3_InputQtimer4Tmr0Output = 16 | 0x300U, /**< QTIMER4_TMR0_OUTPUT output assigned to XBARB3_IN16 input. */
+    kXBARB3_InputQtimer4Tmr1Output = 17 | 0x300U, /**< QTIMER4_TMR1_OUTPUT output assigned to XBARB3_IN17 input. */
+    kXBARB3_InputQtimer4Tmr2Output = 18 | 0x300U, /**< QTIMER4_TMR2_OUTPUT output assigned to XBARB3_IN18 input. */
+    kXBARB3_InputQtimer4Tmr3Output = 19 | 0x300U, /**< QTIMER4_TMR3_OUTPUT output assigned to XBARB3_IN19 input. */
+    kXBARB3_InputFlexpwm1Pwm1OutTrig01 =
+        20 | 0x300U, /**< FLEXPWM1_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN20 input. */
+    kXBARB3_InputFlexpwm1Pwm2OutTrig01 =
+        21 | 0x300U, /**< FLEXPWM1_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN21 input. */
+    kXBARB3_InputFlexpwm1Pwm3OutTrig01 =
+        22 | 0x300U, /**< FLEXPWM1_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN22 input. */
+    kXBARB3_InputFlexpwm1Pwm4OutTrig01 =
+        23 | 0x300U, /**< FLEXPWM1_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN23 input. */
+    kXBARB3_InputFlexpwm2Pwm1OutTrig01 =
+        24 | 0x300U, /**< FLEXPWM2_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN24 input. */
+    kXBARB3_InputFlexpwm2Pwm2OutTrig01 =
+        25 | 0x300U, /**< FLEXPWM2_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN25 input. */
+    kXBARB3_InputFlexpwm2Pwm3OutTrig01 =
+        26 | 0x300U, /**< FLEXPWM2_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN26 input. */
+    kXBARB3_InputFlexpwm2Pwm4OutTrig01 =
+        27 | 0x300U, /**< FLEXPWM2_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN27 input. */
+    kXBARB3_InputFlexpwm3Pwm1OutTrig01 =
+        28 | 0x300U, /**< FLEXPWM3_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN28 input. */
+    kXBARB3_InputFlexpwm3Pwm2OutTrig01 =
+        29 | 0x300U, /**< FLEXPWM3_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN29 input. */
+    kXBARB3_InputFlexpwm3Pwm3OutTrig01 =
+        30 | 0x300U, /**< FLEXPWM3_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN30 input. */
+    kXBARB3_InputFlexpwm3Pwm4OutTrig01 =
+        31 | 0x300U, /**< FLEXPWM3_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN31 input. */
+    kXBARB3_InputFlexpwm4Pwm1OutTrig01 =
+        32 | 0x300U, /**< FLEXPWM4_PWM1_OUT_TRIG0_1 output assigned to XBARB3_IN32 input. */
+    kXBARB3_InputFlexpwm4Pwm2OutTrig01 =
+        33 | 0x300U, /**< FLEXPWM4_PWM2_OUT_TRIG0_1 output assigned to XBARB3_IN33 input. */
+    kXBARB3_InputFlexpwm4Pwm3OutTrig01 =
+        34 | 0x300U, /**< FLEXPWM4_PWM3_OUT_TRIG0_1 output assigned to XBARB3_IN34 input. */
+    kXBARB3_InputFlexpwm4Pwm4OutTrig01 =
+        35 | 0x300U,                             /**< FLEXPWM4_PWM4_OUT_TRIG0_1 output assigned to XBARB3_IN35 input. */
+    kXBARB3_InputPitTrigger0      = 36 | 0x300U, /**< PIT_TRIGGER0 output assigned to XBARB3_IN36 input. */
+    kXBARB3_InputPitTrigger1      = 37 | 0x300U, /**< PIT_TRIGGER1 output assigned to XBARB3_IN37 input. */
+    kXBARB3_InputAdcEtcXbar0Coco0 = 38 | 0x300U, /**< ADC_ETC_XBAR0_COCO0 output assigned to XBARB3_IN38 input. */
+    kXBARB3_InputAdcEtcXbar0Coco1 = 39 | 0x300U, /**< ADC_ETC_XBAR0_COCO1 output assigned to XBARB3_IN39 input. */
+    kXBARB3_InputAdcEtcXbar0Coco2 = 40 | 0x300U, /**< ADC_ETC_XBAR0_COCO2 output assigned to XBARB3_IN40 input. */
+    kXBARB3_InputAdcEtcXbar0Coco3 = 41 | 0x300U, /**< ADC_ETC_XBAR0_COCO3 output assigned to XBARB3_IN41 input. */
+    kXBARB3_InputAdcEtcXbar1Coco0 = 42 | 0x300U, /**< ADC_ETC_XBAR1_COCO0 output assigned to XBARB3_IN42 input. */
+    kXBARB3_InputAdcEtcXbar1Coco1 = 43 | 0x300U, /**< ADC_ETC_XBAR1_COCO1 output assigned to XBARB3_IN43 input. */
+    kXBARB3_InputAdcEtcXbar1Coco2 = 44 | 0x300U, /**< ADC_ETC_XBAR1_COCO2 output assigned to XBARB3_IN44 input. */
+    kXBARB3_InputAdcEtcXbar1Coco3 = 45 | 0x300U, /**< ADC_ETC_XBAR1_COCO3 output assigned to XBARB3_IN45 input. */
+    kXBARB3_InputEnc1PosMatch     = 46 | 0x300U, /**< ENC1_POS_MATCH output assigned to XBARB3_IN46 input. */
+    kXBARB3_InputEnc2PosMatch     = 47 | 0x300U, /**< ENC2_POS_MATCH output assigned to XBARB3_IN47 input. */
+    kXBARB3_InputEnc3PosMatch     = 48 | 0x300U, /**< ENC3_POS_MATCH output assigned to XBARB3_IN48 input. */
+    kXBARB3_InputEnc4PosMatch     = 49 | 0x300U, /**< ENC4_POS_MATCH output assigned to XBARB3_IN49 input. */
+    kXBARB3_InputDmaDone0         = 50 | 0x300U, /**< DMA_DONE0 output assigned to XBARB3_IN50 input. */
+    kXBARB3_InputDmaDone1         = 51 | 0x300U, /**< DMA_DONE1 output assigned to XBARB3_IN51 input. */
+    kXBARB3_InputDmaDone2         = 52 | 0x300U, /**< DMA_DONE2 output assigned to XBARB3_IN52 input. */
+    kXBARB3_InputDmaDone3         = 53 | 0x300U, /**< DMA_DONE3 output assigned to XBARB3_IN53 input. */
+    kXBARB3_InputDmaDone4         = 54 | 0x300U, /**< DMA_DONE4 output assigned to XBARB3_IN54 input. */
+    kXBARB3_InputDmaDone5         = 55 | 0x300U, /**< DMA_DONE5 output assigned to XBARB3_IN55 input. */
+    kXBARB3_InputDmaDone6         = 56 | 0x300U, /**< DMA_DONE6 output assigned to XBARB3_IN56 input. */
+    kXBARB3_InputDmaDone7         = 57 | 0x300U, /**< DMA_DONE7 output assigned to XBARB3_IN57 input. */
 } xbar_input_signal_t;
 
 typedef enum _xbar_output_signal
 {
-    kXBARA1_OutputDmaChMuxReq30     = 0|0x100U,    /**< XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30 */
-    kXBARA1_OutputDmaChMuxReq31     = 1|0x100U,    /**< XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31 */
-    kXBARA1_OutputDmaChMuxReq94     = 2|0x100U,    /**< XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94 */
-    kXBARA1_OutputDmaChMuxReq95     = 3|0x100U,    /**< XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95 */
-    kXBARA1_OutputIomuxXbarInout04  = 4|0x100U,    /**< XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04 */
-    kXBARA1_OutputIomuxXbarInout05  = 5|0x100U,    /**< XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05 */
-    kXBARA1_OutputIomuxXbarInout06  = 6|0x100U,    /**< XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06 */
-    kXBARA1_OutputIomuxXbarInout07  = 7|0x100U,    /**< XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07 */
-    kXBARA1_OutputIomuxXbarInout08  = 8|0x100U,    /**< XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08 */
-    kXBARA1_OutputIomuxXbarInout09  = 9|0x100U,    /**< XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09 */
-    kXBARA1_OutputIomuxXbarInout10  = 10|0x100U,   /**< XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10 */
-    kXBARA1_OutputIomuxXbarInout11  = 11|0x100U,   /**< XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11 */
-    kXBARA1_OutputIomuxXbarInout12  = 12|0x100U,   /**< XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12 */
-    kXBARA1_OutputIomuxXbarInout13  = 13|0x100U,   /**< XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13 */
-    kXBARA1_OutputIomuxXbarInout14  = 14|0x100U,   /**< XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14 */
-    kXBARA1_OutputIomuxXbarInout15  = 15|0x100U,   /**< XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15 */
-    kXBARA1_OutputIomuxXbarInout16  = 16|0x100U,   /**< XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16 */
-    kXBARA1_OutputIomuxXbarInout17  = 17|0x100U,   /**< XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17 */
-    kXBARA1_OutputIomuxXbarInout18  = 18|0x100U,   /**< XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18 */
-    kXBARA1_OutputIomuxXbarInout19  = 19|0x100U,   /**< XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19 */
-    kXBARA1_OutputAcmp1Sample       = 20|0x100U,   /**< XBARA1_OUT20 output assigned to ACMP1_SAMPLE */
-    kXBARA1_OutputAcmp2Sample       = 21|0x100U,   /**< XBARA1_OUT21 output assigned to ACMP2_SAMPLE */
-    kXBARA1_OutputAcmp3Sample       = 22|0x100U,   /**< XBARA1_OUT22 output assigned to ACMP3_SAMPLE */
-    kXBARA1_OutputAcmp4Sample       = 23|0x100U,   /**< XBARA1_OUT23 output assigned to ACMP4_SAMPLE */
-    kXBARA1_OutputRESERVED24        = 24|0x100U,   /**< XBARA1_OUT24 output is reserved. */
-    kXBARA1_OutputRESERVED25        = 25|0x100U,   /**< XBARA1_OUT25 output is reserved. */
-    kXBARA1_OutputFlexpwm1Exta0     = 26|0x100U,   /**< XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0 */
-    kXBARA1_OutputFlexpwm1Exta1     = 27|0x100U,   /**< XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1 */
-    kXBARA1_OutputFlexpwm1Exta2     = 28|0x100U,   /**< XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2 */
-    kXBARA1_OutputFlexpwm1Exta3     = 29|0x100U,   /**< XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3 */
-    kXBARA1_OutputFlexpwm1ExtSync0  = 30|0x100U,   /**< XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm1ExtSync1  = 31|0x100U,   /**< XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm1ExtSync2  = 32|0x100U,   /**< XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm1ExtSync3  = 33|0x100U,   /**< XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm1ExtClk    = 34|0x100U,   /**< XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK */
-    kXBARA1_OutputFlexpwm1Fault0    = 35|0x100U,   /**< XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0 */
-    kXBARA1_OutputFlexpwm1Fault1    = 36|0x100U,   /**< XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1 */
-    kXBARA1_OutputFlexpwm1234Fault2 = 37|0x100U,   /**< XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2 */
-    kXBARA1_OutputFlexpwm1234Fault3 = 38|0x100U,   /**< XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3 */
-    kXBARA1_OutputFlexpwm1ExtForce  = 39|0x100U,   /**< XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE */
-    kXBARA1_OutputFlexpwm234Exta0   = 40|0x100U,   /**< XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0 */
-    kXBARA1_OutputFlexpwm234Exta1   = 41|0x100U,   /**< XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1 */
-    kXBARA1_OutputFlexpwm234Exta2   = 42|0x100U,   /**< XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2 */
-    kXBARA1_OutputFlexpwm234Exta3   = 43|0x100U,   /**< XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3 */
-    kXBARA1_OutputFlexpwm2ExtSync0  = 44|0x100U,   /**< XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm2ExtSync1  = 45|0x100U,   /**< XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm2ExtSync2  = 46|0x100U,   /**< XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm2ExtSync3  = 47|0x100U,   /**< XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm234ExtClk  = 48|0x100U,   /**< XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK */
-    kXBARA1_OutputFlexpwm2Fault0    = 49|0x100U,   /**< XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0 */
-    kXBARA1_OutputFlexpwm2Fault1    = 50|0x100U,   /**< XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1 */
-    kXBARA1_OutputFlexpwm2ExtForce  = 51|0x100U,   /**< XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE */
-    kXBARA1_OutputFlexpwm3ExtSync0  = 52|0x100U,   /**< XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm3ExtSync1  = 53|0x100U,   /**< XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm3ExtSync2  = 54|0x100U,   /**< XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm3ExtSync3  = 55|0x100U,   /**< XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm3Fault0    = 56|0x100U,   /**< XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0 */
-    kXBARA1_OutputFlexpwm3Fault1    = 57|0x100U,   /**< XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1 */
-    kXBARA1_OutputFlexpwm3ExtForce  = 58|0x100U,   /**< XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE */
-    kXBARA1_OutputFlexpwm4ExtSync0  = 59|0x100U,   /**< XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0 */
-    kXBARA1_OutputFlexpwm4ExtSync1  = 60|0x100U,   /**< XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1 */
-    kXBARA1_OutputFlexpwm4ExtSync2  = 61|0x100U,   /**< XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2 */
-    kXBARA1_OutputFlexpwm4ExtSync3  = 62|0x100U,   /**< XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3 */
-    kXBARA1_OutputFlexpwm4Fault0    = 63|0x100U,   /**< XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0 */
-    kXBARA1_OutputFlexpwm4Fault1    = 64|0x100U,   /**< XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1 */
-    kXBARA1_OutputFlexpwm4ExtForce  = 65|0x100U,   /**< XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE */
-    kXBARA1_OutputEnc1PhaseAInput   = 66|0x100U,   /**< XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT */
-    kXBARA1_OutputEnc1PhaseBInput   = 67|0x100U,   /**< XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT */
-    kXBARA1_OutputEnc1Index         = 68|0x100U,   /**< XBARA1_OUT68 output assigned to ENC1_INDEX */
-    kXBARA1_OutputEnc1Home          = 69|0x100U,   /**< XBARA1_OUT69 output assigned to ENC1_HOME */
-    kXBARA1_OutputEnc1Trigger       = 70|0x100U,   /**< XBARA1_OUT70 output assigned to ENC1_TRIGGER */
-    kXBARA1_OutputEnc2PhaseAInput   = 71|0x100U,   /**< XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT */
-    kXBARA1_OutputEnc2PhaseBInput   = 72|0x100U,   /**< XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT */
-    kXBARA1_OutputEnc2Index         = 73|0x100U,   /**< XBARA1_OUT73 output assigned to ENC2_INDEX */
-    kXBARA1_OutputEnc2Home          = 74|0x100U,   /**< XBARA1_OUT74 output assigned to ENC2_HOME */
-    kXBARA1_OutputEnc2Trigger       = 75|0x100U,   /**< XBARA1_OUT75 output assigned to ENC2_TRIGGER */
-    kXBARA1_OutputEnc3PhaseAInput   = 76|0x100U,   /**< XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT */
-    kXBARA1_OutputEnc3PhaseBInput   = 77|0x100U,   /**< XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT */
-    kXBARA1_OutputEnc3Index         = 78|0x100U,   /**< XBARA1_OUT78 output assigned to ENC3_INDEX */
-    kXBARA1_OutputEnc3Home          = 79|0x100U,   /**< XBARA1_OUT79 output assigned to ENC3_HOME */
-    kXBARA1_OutputEnc3Trigger       = 80|0x100U,   /**< XBARA1_OUT80 output assigned to ENC3_TRIGGER */
-    kXBARA1_OutputEnc4PhaseAInput   = 81|0x100U,   /**< XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT */
-    kXBARA1_OutputEnc4PhaseBInput   = 82|0x100U,   /**< XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT */
-    kXBARA1_OutputEnc4Index         = 83|0x100U,   /**< XBARA1_OUT83 output assigned to ENC4_INDEX */
-    kXBARA1_OutputEnc4Home          = 84|0x100U,   /**< XBARA1_OUT84 output assigned to ENC4_HOME */
-    kXBARA1_OutputEnc4Trigger       = 85|0x100U,   /**< XBARA1_OUT85 output assigned to ENC4_TRIGGER */
-    kXBARA1_OutputQtimer1Tmr0Input  = 86|0x100U,   /**< XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT */
-    kXBARA1_OutputQtimer1Tmr1Input  = 87|0x100U,   /**< XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT */
-    kXBARA1_OutputQtimer1Tmr2Input  = 88|0x100U,   /**< XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT */
-    kXBARA1_OutputQtimer1Tmr3Input  = 89|0x100U,   /**< XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT */
-    kXBARA1_OutputQtimer2Tmr0Input  = 90|0x100U,   /**< XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT */
-    kXBARA1_OutputQtimer2Tmr1Input  = 91|0x100U,   /**< XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT */
-    kXBARA1_OutputQtimer2Tmr2Input  = 92|0x100U,   /**< XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT */
-    kXBARA1_OutputQtimer2Tmr3Input  = 93|0x100U,   /**< XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT */
-    kXBARA1_OutputQtimer3Tmr0Input  = 94|0x100U,   /**< XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT */
-    kXBARA1_OutputQtimer3Tmr1Input  = 95|0x100U,   /**< XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT */
-    kXBARA1_OutputQtimer3Tmr2Input  = 96|0x100U,   /**< XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT */
-    kXBARA1_OutputQtimer3Tmr3Input  = 97|0x100U,   /**< XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT */
-    kXBARA1_OutputQtimer4Tmr0Input  = 98|0x100U,   /**< XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT */
-    kXBARA1_OutputQtimer4Tmr1Input  = 99|0x100U,   /**< XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT */
-    kXBARA1_OutputQtimer4Tmr2Input  = 100|0x100U,  /**< XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT */
-    kXBARA1_OutputQtimer4Tmr3Input  = 101|0x100U,  /**< XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT */
-    kXBARA1_OutputEwmEwmIn          = 102|0x100U,  /**< XBARA1_OUT102 output assigned to EWM_EWM_IN */
-    kXBARA1_OutputAdcEtcXbar0Trig0  = 103|0x100U,  /**< XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0 */
-    kXBARA1_OutputAdcEtcXbar0Trig1  = 104|0x100U,  /**< XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1 */
-    kXBARA1_OutputAdcEtcXbar0Trig2  = 105|0x100U,  /**< XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2 */
-    kXBARA1_OutputAdcEtcXbar0Trig3  = 106|0x100U,  /**< XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3 */
-    kXBARA1_OutputAdcEtcXbar1Trig0  = 107|0x100U,  /**< XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0 */
-    kXBARA1_OutputAdcEtcXbar1Trig1  = 108|0x100U,  /**< XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1 */
-    kXBARA1_OutputAdcEtcXbar1Trig2  = 109|0x100U,  /**< XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2 */
-    kXBARA1_OutputAdcEtcXbar1Trig3  = 110|0x100U,  /**< XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3 */
-    kXBARA1_OutputLpi2c1TrgInput    = 111|0x100U,  /**< XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT */
-    kXBARA1_OutputLpi2c2TrgInput    = 112|0x100U,  /**< XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT */
-    kXBARA1_OutputLpi2c3TrgInput    = 113|0x100U,  /**< XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT */
-    kXBARA1_OutputLpi2c4TrgInput    = 114|0x100U,  /**< XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT */
-    kXBARA1_OutputLpspi1TrgInput    = 115|0x100U,  /**< XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT */
-    kXBARA1_OutputLpspi2TrgInput    = 116|0x100U,  /**< XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT */
-    kXBARA1_OutputLpspi3TrgInput    = 117|0x100U,  /**< XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT */
-    kXBARA1_OutputLpspi4TrgInput    = 118|0x100U,  /**< XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT */
-    kXBARA1_OutputLpuart1TrgInput   = 119|0x100U,  /**< XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT */
-    kXBARA1_OutputLpuart2TrgInput   = 120|0x100U,  /**< XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT */
-    kXBARA1_OutputLpuart3TrgInput   = 121|0x100U,  /**< XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT */
-    kXBARA1_OutputLpuart4TrgInput   = 122|0x100U,  /**< XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT */
-    kXBARA1_OutputLpuart5TrgInput   = 123|0x100U,  /**< XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT */
-    kXBARA1_OutputLpuart6TrgInput   = 124|0x100U,  /**< XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT */
-    kXBARA1_OutputLpuart7TrgInput   = 125|0x100U,  /**< XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT */
-    kXBARA1_OutputLpuart8TrgInput   = 126|0x100U,  /**< XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT */
-    kXBARA1_OutputFlexio1TriggerIn0 = 127|0x100U,  /**< XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0 */
-    kXBARA1_OutputFlexio1TriggerIn1 = 128|0x100U,  /**< XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1 */
-    kXBARA1_OutputFlexio2TriggerIn0 = 129|0x100U,  /**< XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0 */
-    kXBARA1_OutputFlexio2TriggerIn1 = 130|0x100U,  /**< XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1 */
-    kXBARB2_OutputAoi1In00          = 0|0x200U,    /**< XBARB2_OUT0 output assigned to AOI1_IN00 */
-    kXBARB2_OutputAoi1In01          = 1|0x200U,    /**< XBARB2_OUT1 output assigned to AOI1_IN01 */
-    kXBARB2_OutputAoi1In02          = 2|0x200U,    /**< XBARB2_OUT2 output assigned to AOI1_IN02 */
-    kXBARB2_OutputAoi1In03          = 3|0x200U,    /**< XBARB2_OUT3 output assigned to AOI1_IN03 */
-    kXBARB2_OutputAoi1In04          = 4|0x200U,    /**< XBARB2_OUT4 output assigned to AOI1_IN04 */
-    kXBARB2_OutputAoi1In05          = 5|0x200U,    /**< XBARB2_OUT5 output assigned to AOI1_IN05 */
-    kXBARB2_OutputAoi1In06          = 6|0x200U,    /**< XBARB2_OUT6 output assigned to AOI1_IN06 */
-    kXBARB2_OutputAoi1In07          = 7|0x200U,    /**< XBARB2_OUT7 output assigned to AOI1_IN07 */
-    kXBARB2_OutputAoi1In08          = 8|0x200U,    /**< XBARB2_OUT8 output assigned to AOI1_IN08 */
-    kXBARB2_OutputAoi1In09          = 9|0x200U,    /**< XBARB2_OUT9 output assigned to AOI1_IN09 */
-    kXBARB2_OutputAoi1In10          = 10|0x200U,   /**< XBARB2_OUT10 output assigned to AOI1_IN10 */
-    kXBARB2_OutputAoi1In11          = 11|0x200U,   /**< XBARB2_OUT11 output assigned to AOI1_IN11 */
-    kXBARB2_OutputAoi1In12          = 12|0x200U,   /**< XBARB2_OUT12 output assigned to AOI1_IN12 */
-    kXBARB2_OutputAoi1In13          = 13|0x200U,   /**< XBARB2_OUT13 output assigned to AOI1_IN13 */
-    kXBARB2_OutputAoi1In14          = 14|0x200U,   /**< XBARB2_OUT14 output assigned to AOI1_IN14 */
-    kXBARB2_OutputAoi1In15          = 15|0x200U,   /**< XBARB2_OUT15 output assigned to AOI1_IN15 */
-    kXBARB3_OutputAoi2In00          = 0|0x300U,    /**< XBARB3_OUT0 output assigned to AOI2_IN00 */
-    kXBARB3_OutputAoi2In01          = 1|0x300U,    /**< XBARB3_OUT1 output assigned to AOI2_IN01 */
-    kXBARB3_OutputAoi2In02          = 2|0x300U,    /**< XBARB3_OUT2 output assigned to AOI2_IN02 */
-    kXBARB3_OutputAoi2In03          = 3|0x300U,    /**< XBARB3_OUT3 output assigned to AOI2_IN03 */
-    kXBARB3_OutputAoi2In04          = 4|0x300U,    /**< XBARB3_OUT4 output assigned to AOI2_IN04 */
-    kXBARB3_OutputAoi2In05          = 5|0x300U,    /**< XBARB3_OUT5 output assigned to AOI2_IN05 */
-    kXBARB3_OutputAoi2In06          = 6|0x300U,    /**< XBARB3_OUT6 output assigned to AOI2_IN06 */
-    kXBARB3_OutputAoi2In07          = 7|0x300U,    /**< XBARB3_OUT7 output assigned to AOI2_IN07 */
-    kXBARB3_OutputAoi2In08          = 8|0x300U,    /**< XBARB3_OUT8 output assigned to AOI2_IN08 */
-    kXBARB3_OutputAoi2In09          = 9|0x300U,    /**< XBARB3_OUT9 output assigned to AOI2_IN09 */
-    kXBARB3_OutputAoi2In10          = 10|0x300U,   /**< XBARB3_OUT10 output assigned to AOI2_IN10 */
-    kXBARB3_OutputAoi2In11          = 11|0x300U,   /**< XBARB3_OUT11 output assigned to AOI2_IN11 */
-    kXBARB3_OutputAoi2In12          = 12|0x300U,   /**< XBARB3_OUT12 output assigned to AOI2_IN12 */
-    kXBARB3_OutputAoi2In13          = 13|0x300U,   /**< XBARB3_OUT13 output assigned to AOI2_IN13 */
-    kXBARB3_OutputAoi2In14          = 14|0x300U,   /**< XBARB3_OUT14 output assigned to AOI2_IN14 */
-    kXBARB3_OutputAoi2In15          = 15|0x300U,   /**< XBARB3_OUT15 output assigned to AOI2_IN15 */
+    kXBARA1_OutputDmaChMuxReq30     = 0 | 0x100U,   /**< XBARA1_OUT0 output assigned to DMA_CH_MUX_REQ30 */
+    kXBARA1_OutputDmaChMuxReq31     = 1 | 0x100U,   /**< XBARA1_OUT1 output assigned to DMA_CH_MUX_REQ31 */
+    kXBARA1_OutputDmaChMuxReq94     = 2 | 0x100U,   /**< XBARA1_OUT2 output assigned to DMA_CH_MUX_REQ94 */
+    kXBARA1_OutputDmaChMuxReq95     = 3 | 0x100U,   /**< XBARA1_OUT3 output assigned to DMA_CH_MUX_REQ95 */
+    kXBARA1_OutputIomuxXbarInout04  = 4 | 0x100U,   /**< XBARA1_OUT4 output assigned to IOMUX_XBAR_INOUT04 */
+    kXBARA1_OutputIomuxXbarInout05  = 5 | 0x100U,   /**< XBARA1_OUT5 output assigned to IOMUX_XBAR_INOUT05 */
+    kXBARA1_OutputIomuxXbarInout06  = 6 | 0x100U,   /**< XBARA1_OUT6 output assigned to IOMUX_XBAR_INOUT06 */
+    kXBARA1_OutputIomuxXbarInout07  = 7 | 0x100U,   /**< XBARA1_OUT7 output assigned to IOMUX_XBAR_INOUT07 */
+    kXBARA1_OutputIomuxXbarInout08  = 8 | 0x100U,   /**< XBARA1_OUT8 output assigned to IOMUX_XBAR_INOUT08 */
+    kXBARA1_OutputIomuxXbarInout09  = 9 | 0x100U,   /**< XBARA1_OUT9 output assigned to IOMUX_XBAR_INOUT09 */
+    kXBARA1_OutputIomuxXbarInout10  = 10 | 0x100U,  /**< XBARA1_OUT10 output assigned to IOMUX_XBAR_INOUT10 */
+    kXBARA1_OutputIomuxXbarInout11  = 11 | 0x100U,  /**< XBARA1_OUT11 output assigned to IOMUX_XBAR_INOUT11 */
+    kXBARA1_OutputIomuxXbarInout12  = 12 | 0x100U,  /**< XBARA1_OUT12 output assigned to IOMUX_XBAR_INOUT12 */
+    kXBARA1_OutputIomuxXbarInout13  = 13 | 0x100U,  /**< XBARA1_OUT13 output assigned to IOMUX_XBAR_INOUT13 */
+    kXBARA1_OutputIomuxXbarInout14  = 14 | 0x100U,  /**< XBARA1_OUT14 output assigned to IOMUX_XBAR_INOUT14 */
+    kXBARA1_OutputIomuxXbarInout15  = 15 | 0x100U,  /**< XBARA1_OUT15 output assigned to IOMUX_XBAR_INOUT15 */
+    kXBARA1_OutputIomuxXbarInout16  = 16 | 0x100U,  /**< XBARA1_OUT16 output assigned to IOMUX_XBAR_INOUT16 */
+    kXBARA1_OutputIomuxXbarInout17  = 17 | 0x100U,  /**< XBARA1_OUT17 output assigned to IOMUX_XBAR_INOUT17 */
+    kXBARA1_OutputIomuxXbarInout18  = 18 | 0x100U,  /**< XBARA1_OUT18 output assigned to IOMUX_XBAR_INOUT18 */
+    kXBARA1_OutputIomuxXbarInout19  = 19 | 0x100U,  /**< XBARA1_OUT19 output assigned to IOMUX_XBAR_INOUT19 */
+    kXBARA1_OutputAcmp1Sample       = 20 | 0x100U,  /**< XBARA1_OUT20 output assigned to ACMP1_SAMPLE */
+    kXBARA1_OutputAcmp2Sample       = 21 | 0x100U,  /**< XBARA1_OUT21 output assigned to ACMP2_SAMPLE */
+    kXBARA1_OutputAcmp3Sample       = 22 | 0x100U,  /**< XBARA1_OUT22 output assigned to ACMP3_SAMPLE */
+    kXBARA1_OutputAcmp4Sample       = 23 | 0x100U,  /**< XBARA1_OUT23 output assigned to ACMP4_SAMPLE */
+    kXBARA1_OutputRESERVED24        = 24 | 0x100U,  /**< XBARA1_OUT24 output is reserved. */
+    kXBARA1_OutputRESERVED25        = 25 | 0x100U,  /**< XBARA1_OUT25 output is reserved. */
+    kXBARA1_OutputFlexpwm1Exta0     = 26 | 0x100U,  /**< XBARA1_OUT26 output assigned to FLEXPWM1_EXTA0 */
+    kXBARA1_OutputFlexpwm1Exta1     = 27 | 0x100U,  /**< XBARA1_OUT27 output assigned to FLEXPWM1_EXTA1 */
+    kXBARA1_OutputFlexpwm1Exta2     = 28 | 0x100U,  /**< XBARA1_OUT28 output assigned to FLEXPWM1_EXTA2 */
+    kXBARA1_OutputFlexpwm1Exta3     = 29 | 0x100U,  /**< XBARA1_OUT29 output assigned to FLEXPWM1_EXTA3 */
+    kXBARA1_OutputFlexpwm1ExtSync0  = 30 | 0x100U,  /**< XBARA1_OUT30 output assigned to FLEXPWM1_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm1ExtSync1  = 31 | 0x100U,  /**< XBARA1_OUT31 output assigned to FLEXPWM1_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm1ExtSync2  = 32 | 0x100U,  /**< XBARA1_OUT32 output assigned to FLEXPWM1_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm1ExtSync3  = 33 | 0x100U,  /**< XBARA1_OUT33 output assigned to FLEXPWM1_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm1ExtClk    = 34 | 0x100U,  /**< XBARA1_OUT34 output assigned to FLEXPWM1_EXT_CLK */
+    kXBARA1_OutputFlexpwm1Fault0    = 35 | 0x100U,  /**< XBARA1_OUT35 output assigned to FLEXPWM1_FAULT0 */
+    kXBARA1_OutputFlexpwm1Fault1    = 36 | 0x100U,  /**< XBARA1_OUT36 output assigned to FLEXPWM1_FAULT1 */
+    kXBARA1_OutputFlexpwm1234Fault2 = 37 | 0x100U,  /**< XBARA1_OUT37 output assigned to FLEXPWM1_2_3_4_FAULT2 */
+    kXBARA1_OutputFlexpwm1234Fault3 = 38 | 0x100U,  /**< XBARA1_OUT38 output assigned to FLEXPWM1_2_3_4_FAULT3 */
+    kXBARA1_OutputFlexpwm1ExtForce  = 39 | 0x100U,  /**< XBARA1_OUT39 output assigned to FLEXPWM1_EXT_FORCE */
+    kXBARA1_OutputFlexpwm234Exta0   = 40 | 0x100U,  /**< XBARA1_OUT40 output assigned to FLEXPWM2_3_4_EXTA0 */
+    kXBARA1_OutputFlexpwm234Exta1   = 41 | 0x100U,  /**< XBARA1_OUT41 output assigned to FLEXPWM2_3_4_EXTA1 */
+    kXBARA1_OutputFlexpwm234Exta2   = 42 | 0x100U,  /**< XBARA1_OUT42 output assigned to FLEXPWM2_3_4_EXTA2 */
+    kXBARA1_OutputFlexpwm234Exta3   = 43 | 0x100U,  /**< XBARA1_OUT43 output assigned to FLEXPWM2_3_4_EXTA3 */
+    kXBARA1_OutputFlexpwm2ExtSync0  = 44 | 0x100U,  /**< XBARA1_OUT44 output assigned to FLEXPWM2_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm2ExtSync1  = 45 | 0x100U,  /**< XBARA1_OUT45 output assigned to FLEXPWM2_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm2ExtSync2  = 46 | 0x100U,  /**< XBARA1_OUT46 output assigned to FLEXPWM2_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm2ExtSync3  = 47 | 0x100U,  /**< XBARA1_OUT47 output assigned to FLEXPWM2_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm234ExtClk  = 48 | 0x100U,  /**< XBARA1_OUT48 output assigned to FLEXPWM2_3_4_EXT_CLK */
+    kXBARA1_OutputFlexpwm2Fault0    = 49 | 0x100U,  /**< XBARA1_OUT49 output assigned to FLEXPWM2_FAULT0 */
+    kXBARA1_OutputFlexpwm2Fault1    = 50 | 0x100U,  /**< XBARA1_OUT50 output assigned to FLEXPWM2_FAULT1 */
+    kXBARA1_OutputFlexpwm2ExtForce  = 51 | 0x100U,  /**< XBARA1_OUT51 output assigned to FLEXPWM2_EXT_FORCE */
+    kXBARA1_OutputFlexpwm3ExtSync0  = 52 | 0x100U,  /**< XBARA1_OUT52 output assigned to FLEXPWM3_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm3ExtSync1  = 53 | 0x100U,  /**< XBARA1_OUT53 output assigned to FLEXPWM3_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm3ExtSync2  = 54 | 0x100U,  /**< XBARA1_OUT54 output assigned to FLEXPWM3_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm3ExtSync3  = 55 | 0x100U,  /**< XBARA1_OUT55 output assigned to FLEXPWM3_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm3Fault0    = 56 | 0x100U,  /**< XBARA1_OUT56 output assigned to FLEXPWM3_FAULT0 */
+    kXBARA1_OutputFlexpwm3Fault1    = 57 | 0x100U,  /**< XBARA1_OUT57 output assigned to FLEXPWM3_FAULT1 */
+    kXBARA1_OutputFlexpwm3ExtForce  = 58 | 0x100U,  /**< XBARA1_OUT58 output assigned to FLEXPWM3_EXT_FORCE */
+    kXBARA1_OutputFlexpwm4ExtSync0  = 59 | 0x100U,  /**< XBARA1_OUT59 output assigned to FLEXPWM4_EXT_SYNC0 */
+    kXBARA1_OutputFlexpwm4ExtSync1  = 60 | 0x100U,  /**< XBARA1_OUT60 output assigned to FLEXPWM4_EXT_SYNC1 */
+    kXBARA1_OutputFlexpwm4ExtSync2  = 61 | 0x100U,  /**< XBARA1_OUT61 output assigned to FLEXPWM4_EXT_SYNC2 */
+    kXBARA1_OutputFlexpwm4ExtSync3  = 62 | 0x100U,  /**< XBARA1_OUT62 output assigned to FLEXPWM4_EXT_SYNC3 */
+    kXBARA1_OutputFlexpwm4Fault0    = 63 | 0x100U,  /**< XBARA1_OUT63 output assigned to FLEXPWM4_FAULT0 */
+    kXBARA1_OutputFlexpwm4Fault1    = 64 | 0x100U,  /**< XBARA1_OUT64 output assigned to FLEXPWM4_FAULT1 */
+    kXBARA1_OutputFlexpwm4ExtForce  = 65 | 0x100U,  /**< XBARA1_OUT65 output assigned to FLEXPWM4_EXT_FORCE */
+    kXBARA1_OutputEnc1PhaseAInput   = 66 | 0x100U,  /**< XBARA1_OUT66 output assigned to ENC1_PHASE_A_INPUT */
+    kXBARA1_OutputEnc1PhaseBInput   = 67 | 0x100U,  /**< XBARA1_OUT67 output assigned to ENC1_PHASE_B_INPUT */
+    kXBARA1_OutputEnc1Index         = 68 | 0x100U,  /**< XBARA1_OUT68 output assigned to ENC1_INDEX */
+    kXBARA1_OutputEnc1Home          = 69 | 0x100U,  /**< XBARA1_OUT69 output assigned to ENC1_HOME */
+    kXBARA1_OutputEnc1Trigger       = 70 | 0x100U,  /**< XBARA1_OUT70 output assigned to ENC1_TRIGGER */
+    kXBARA1_OutputEnc2PhaseAInput   = 71 | 0x100U,  /**< XBARA1_OUT71 output assigned to ENC2_PHASE_A_INPUT */
+    kXBARA1_OutputEnc2PhaseBInput   = 72 | 0x100U,  /**< XBARA1_OUT72 output assigned to ENC2_PHASE_B_INPUT */
+    kXBARA1_OutputEnc2Index         = 73 | 0x100U,  /**< XBARA1_OUT73 output assigned to ENC2_INDEX */
+    kXBARA1_OutputEnc2Home          = 74 | 0x100U,  /**< XBARA1_OUT74 output assigned to ENC2_HOME */
+    kXBARA1_OutputEnc2Trigger       = 75 | 0x100U,  /**< XBARA1_OUT75 output assigned to ENC2_TRIGGER */
+    kXBARA1_OutputEnc3PhaseAInput   = 76 | 0x100U,  /**< XBARA1_OUT76 output assigned to ENC3_PHASE_A_INPUT */
+    kXBARA1_OutputEnc3PhaseBInput   = 77 | 0x100U,  /**< XBARA1_OUT77 output assigned to ENC3_PHASE_B_INPUT */
+    kXBARA1_OutputEnc3Index         = 78 | 0x100U,  /**< XBARA1_OUT78 output assigned to ENC3_INDEX */
+    kXBARA1_OutputEnc3Home          = 79 | 0x100U,  /**< XBARA1_OUT79 output assigned to ENC3_HOME */
+    kXBARA1_OutputEnc3Trigger       = 80 | 0x100U,  /**< XBARA1_OUT80 output assigned to ENC3_TRIGGER */
+    kXBARA1_OutputEnc4PhaseAInput   = 81 | 0x100U,  /**< XBARA1_OUT81 output assigned to ENC4_PHASE_A_INPUT */
+    kXBARA1_OutputEnc4PhaseBInput   = 82 | 0x100U,  /**< XBARA1_OUT82 output assigned to ENC4_PHASE_B_INPUT */
+    kXBARA1_OutputEnc4Index         = 83 | 0x100U,  /**< XBARA1_OUT83 output assigned to ENC4_INDEX */
+    kXBARA1_OutputEnc4Home          = 84 | 0x100U,  /**< XBARA1_OUT84 output assigned to ENC4_HOME */
+    kXBARA1_OutputEnc4Trigger       = 85 | 0x100U,  /**< XBARA1_OUT85 output assigned to ENC4_TRIGGER */
+    kXBARA1_OutputQtimer1Tmr0Input  = 86 | 0x100U,  /**< XBARA1_OUT86 output assigned to QTIMER1_TMR0_INPUT */
+    kXBARA1_OutputQtimer1Tmr1Input  = 87 | 0x100U,  /**< XBARA1_OUT87 output assigned to QTIMER1_TMR1_INPUT */
+    kXBARA1_OutputQtimer1Tmr2Input  = 88 | 0x100U,  /**< XBARA1_OUT88 output assigned to QTIMER1_TMR2_INPUT */
+    kXBARA1_OutputQtimer1Tmr3Input  = 89 | 0x100U,  /**< XBARA1_OUT89 output assigned to QTIMER1_TMR3_INPUT */
+    kXBARA1_OutputQtimer2Tmr0Input  = 90 | 0x100U,  /**< XBARA1_OUT90 output assigned to QTIMER2_TMR0_INPUT */
+    kXBARA1_OutputQtimer2Tmr1Input  = 91 | 0x100U,  /**< XBARA1_OUT91 output assigned to QTIMER2_TMR1_INPUT */
+    kXBARA1_OutputQtimer2Tmr2Input  = 92 | 0x100U,  /**< XBARA1_OUT92 output assigned to QTIMER2_TMR2_INPUT */
+    kXBARA1_OutputQtimer2Tmr3Input  = 93 | 0x100U,  /**< XBARA1_OUT93 output assigned to QTIMER2_TMR3_INPUT */
+    kXBARA1_OutputQtimer3Tmr0Input  = 94 | 0x100U,  /**< XBARA1_OUT94 output assigned to QTIMER3_TMR0_INPUT */
+    kXBARA1_OutputQtimer3Tmr1Input  = 95 | 0x100U,  /**< XBARA1_OUT95 output assigned to QTIMER3_TMR1_INPUT */
+    kXBARA1_OutputQtimer3Tmr2Input  = 96 | 0x100U,  /**< XBARA1_OUT96 output assigned to QTIMER3_TMR2_INPUT */
+    kXBARA1_OutputQtimer3Tmr3Input  = 97 | 0x100U,  /**< XBARA1_OUT97 output assigned to QTIMER3_TMR3_INPUT */
+    kXBARA1_OutputQtimer4Tmr0Input  = 98 | 0x100U,  /**< XBARA1_OUT98 output assigned to QTIMER4_TMR0_INPUT */
+    kXBARA1_OutputQtimer4Tmr1Input  = 99 | 0x100U,  /**< XBARA1_OUT99 output assigned to QTIMER4_TMR1_INPUT */
+    kXBARA1_OutputQtimer4Tmr2Input  = 100 | 0x100U, /**< XBARA1_OUT100 output assigned to QTIMER4_TMR2_INPUT */
+    kXBARA1_OutputQtimer4Tmr3Input  = 101 | 0x100U, /**< XBARA1_OUT101 output assigned to QTIMER4_TMR3_INPUT */
+    kXBARA1_OutputEwmEwmIn          = 102 | 0x100U, /**< XBARA1_OUT102 output assigned to EWM_EWM_IN */
+    kXBARA1_OutputAdcEtcXbar0Trig0  = 103 | 0x100U, /**< XBARA1_OUT103 output assigned to ADC_ETC_XBAR0_TRIG0 */
+    kXBARA1_OutputAdcEtcXbar0Trig1  = 104 | 0x100U, /**< XBARA1_OUT104 output assigned to ADC_ETC_XBAR0_TRIG1 */
+    kXBARA1_OutputAdcEtcXbar0Trig2  = 105 | 0x100U, /**< XBARA1_OUT105 output assigned to ADC_ETC_XBAR0_TRIG2 */
+    kXBARA1_OutputAdcEtcXbar0Trig3  = 106 | 0x100U, /**< XBARA1_OUT106 output assigned to ADC_ETC_XBAR0_TRIG3 */
+    kXBARA1_OutputAdcEtcXbar1Trig0  = 107 | 0x100U, /**< XBARA1_OUT107 output assigned to ADC_ETC_XBAR1_TRIG0 */
+    kXBARA1_OutputAdcEtcXbar1Trig1  = 108 | 0x100U, /**< XBARA1_OUT108 output assigned to ADC_ETC_XBAR1_TRIG1 */
+    kXBARA1_OutputAdcEtcXbar1Trig2  = 109 | 0x100U, /**< XBARA1_OUT109 output assigned to ADC_ETC_XBAR1_TRIG2 */
+    kXBARA1_OutputAdcEtcXbar1Trig3  = 110 | 0x100U, /**< XBARA1_OUT110 output assigned to ADC_ETC_XBAR1_TRIG3 */
+    kXBARA1_OutputLpi2c1TrgInput    = 111 | 0x100U, /**< XBARA1_OUT111 output assigned to LPI2C1_TRG_INPUT */
+    kXBARA1_OutputLpi2c2TrgInput    = 112 | 0x100U, /**< XBARA1_OUT112 output assigned to LPI2C2_TRG_INPUT */
+    kXBARA1_OutputLpi2c3TrgInput    = 113 | 0x100U, /**< XBARA1_OUT113 output assigned to LPI2C3_TRG_INPUT */
+    kXBARA1_OutputLpi2c4TrgInput    = 114 | 0x100U, /**< XBARA1_OUT114 output assigned to LPI2C4_TRG_INPUT */
+    kXBARA1_OutputLpspi1TrgInput    = 115 | 0x100U, /**< XBARA1_OUT115 output assigned to LPSPI1_TRG_INPUT */
+    kXBARA1_OutputLpspi2TrgInput    = 116 | 0x100U, /**< XBARA1_OUT116 output assigned to LPSPI2_TRG_INPUT */
+    kXBARA1_OutputLpspi3TrgInput    = 117 | 0x100U, /**< XBARA1_OUT117 output assigned to LPSPI3_TRG_INPUT */
+    kXBARA1_OutputLpspi4TrgInput    = 118 | 0x100U, /**< XBARA1_OUT118 output assigned to LPSPI4_TRG_INPUT */
+    kXBARA1_OutputLpuart1TrgInput   = 119 | 0x100U, /**< XBARA1_OUT119 output assigned to LPUART1_TRG_INPUT */
+    kXBARA1_OutputLpuart2TrgInput   = 120 | 0x100U, /**< XBARA1_OUT120 output assigned to LPUART2_TRG_INPUT */
+    kXBARA1_OutputLpuart3TrgInput   = 121 | 0x100U, /**< XBARA1_OUT121 output assigned to LPUART3_TRG_INPUT */
+    kXBARA1_OutputLpuart4TrgInput   = 122 | 0x100U, /**< XBARA1_OUT122 output assigned to LPUART4_TRG_INPUT */
+    kXBARA1_OutputLpuart5TrgInput   = 123 | 0x100U, /**< XBARA1_OUT123 output assigned to LPUART5_TRG_INPUT */
+    kXBARA1_OutputLpuart6TrgInput   = 124 | 0x100U, /**< XBARA1_OUT124 output assigned to LPUART6_TRG_INPUT */
+    kXBARA1_OutputLpuart7TrgInput   = 125 | 0x100U, /**< XBARA1_OUT125 output assigned to LPUART7_TRG_INPUT */
+    kXBARA1_OutputLpuart8TrgInput   = 126 | 0x100U, /**< XBARA1_OUT126 output assigned to LPUART8_TRG_INPUT */
+    kXBARA1_OutputFlexio1TriggerIn0 = 127 | 0x100U, /**< XBARA1_OUT127 output assigned to FLEXIO1_TRIGGER_IN0 */
+    kXBARA1_OutputFlexio1TriggerIn1 = 128 | 0x100U, /**< XBARA1_OUT128 output assigned to FLEXIO1_TRIGGER_IN1 */
+    kXBARA1_OutputFlexio2TriggerIn0 = 129 | 0x100U, /**< XBARA1_OUT129 output assigned to FLEXIO2_TRIGGER_IN0 */
+    kXBARA1_OutputFlexio2TriggerIn1 = 130 | 0x100U, /**< XBARA1_OUT130 output assigned to FLEXIO2_TRIGGER_IN1 */
+    kXBARB2_OutputAoi1In00          = 0 | 0x200U,   /**< XBARB2_OUT0 output assigned to AOI1_IN00 */
+    kXBARB2_OutputAoi1In01          = 1 | 0x200U,   /**< XBARB2_OUT1 output assigned to AOI1_IN01 */
+    kXBARB2_OutputAoi1In02          = 2 | 0x200U,   /**< XBARB2_OUT2 output assigned to AOI1_IN02 */
+    kXBARB2_OutputAoi1In03          = 3 | 0x200U,   /**< XBARB2_OUT3 output assigned to AOI1_IN03 */
+    kXBARB2_OutputAoi1In04          = 4 | 0x200U,   /**< XBARB2_OUT4 output assigned to AOI1_IN04 */
+    kXBARB2_OutputAoi1In05          = 5 | 0x200U,   /**< XBARB2_OUT5 output assigned to AOI1_IN05 */
+    kXBARB2_OutputAoi1In06          = 6 | 0x200U,   /**< XBARB2_OUT6 output assigned to AOI1_IN06 */
+    kXBARB2_OutputAoi1In07          = 7 | 0x200U,   /**< XBARB2_OUT7 output assigned to AOI1_IN07 */
+    kXBARB2_OutputAoi1In08          = 8 | 0x200U,   /**< XBARB2_OUT8 output assigned to AOI1_IN08 */
+    kXBARB2_OutputAoi1In09          = 9 | 0x200U,   /**< XBARB2_OUT9 output assigned to AOI1_IN09 */
+    kXBARB2_OutputAoi1In10          = 10 | 0x200U,  /**< XBARB2_OUT10 output assigned to AOI1_IN10 */
+    kXBARB2_OutputAoi1In11          = 11 | 0x200U,  /**< XBARB2_OUT11 output assigned to AOI1_IN11 */
+    kXBARB2_OutputAoi1In12          = 12 | 0x200U,  /**< XBARB2_OUT12 output assigned to AOI1_IN12 */
+    kXBARB2_OutputAoi1In13          = 13 | 0x200U,  /**< XBARB2_OUT13 output assigned to AOI1_IN13 */
+    kXBARB2_OutputAoi1In14          = 14 | 0x200U,  /**< XBARB2_OUT14 output assigned to AOI1_IN14 */
+    kXBARB2_OutputAoi1In15          = 15 | 0x200U,  /**< XBARB2_OUT15 output assigned to AOI1_IN15 */
+    kXBARB3_OutputAoi2In00          = 0 | 0x300U,   /**< XBARB3_OUT0 output assigned to AOI2_IN00 */
+    kXBARB3_OutputAoi2In01          = 1 | 0x300U,   /**< XBARB3_OUT1 output assigned to AOI2_IN01 */
+    kXBARB3_OutputAoi2In02          = 2 | 0x300U,   /**< XBARB3_OUT2 output assigned to AOI2_IN02 */
+    kXBARB3_OutputAoi2In03          = 3 | 0x300U,   /**< XBARB3_OUT3 output assigned to AOI2_IN03 */
+    kXBARB3_OutputAoi2In04          = 4 | 0x300U,   /**< XBARB3_OUT4 output assigned to AOI2_IN04 */
+    kXBARB3_OutputAoi2In05          = 5 | 0x300U,   /**< XBARB3_OUT5 output assigned to AOI2_IN05 */
+    kXBARB3_OutputAoi2In06          = 6 | 0x300U,   /**< XBARB3_OUT6 output assigned to AOI2_IN06 */
+    kXBARB3_OutputAoi2In07          = 7 | 0x300U,   /**< XBARB3_OUT7 output assigned to AOI2_IN07 */
+    kXBARB3_OutputAoi2In08          = 8 | 0x300U,   /**< XBARB3_OUT8 output assigned to AOI2_IN08 */
+    kXBARB3_OutputAoi2In09          = 9 | 0x300U,   /**< XBARB3_OUT9 output assigned to AOI2_IN09 */
+    kXBARB3_OutputAoi2In10          = 10 | 0x300U,  /**< XBARB3_OUT10 output assigned to AOI2_IN10 */
+    kXBARB3_OutputAoi2In11          = 11 | 0x300U,  /**< XBARB3_OUT11 output assigned to AOI2_IN11 */
+    kXBARB3_OutputAoi2In12          = 12 | 0x300U,  /**< XBARB3_OUT12 output assigned to AOI2_IN12 */
+    kXBARB3_OutputAoi2In13          = 13 | 0x300U,  /**< XBARB3_OUT13 output assigned to AOI2_IN13 */
+    kXBARB3_OutputAoi2In14          = 14 | 0x300U,  /**< XBARB3_OUT14 output assigned to AOI2_IN14 */
+    kXBARB3_OutputAoi2In15          = 15 | 0x300U,  /**< XBARB3_OUT15 output assigned to AOI2_IN15 */
 } xbar_output_signal_t;
 
-
 /*!
  * @}
  */ /* end of group Mapping_Information */
 
-
 /* ----------------------------------------------------------------------------
    -- Device Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1279,27 +1331,26 @@ typedef enum _xbar_output_signal
  * @{
  */
 
-
 /*
 ** Start of section using anonymous unions
 */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang diagnostic push
-  #else
-    #pragma push
-    #pragma anon_unions
-  #endif
-#elif defined(__CWCC__)
-  #pragma push
-  #pragma cpp_extensions on
-#elif defined(__GNUC__)
-  /* anonymous unions are enabled by default */
-#elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma language=extended
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang diagnostic push
 #else
-  #error Not supported compiler type
+#pragma push
+#pragma anon_unions
+#endif
+#elif defined(__CWCC__)
+#pragma push
+#pragma cpp_extensions on
+#elif defined(__GNUC__)
+/* anonymous unions are enabled by default */
+#elif defined(__IAR_SYSTEMS_ICC__)
+#pragma language = extended
+#else
+#error Not supported compiler type
 #endif
 
 /* ----------------------------------------------------------------------------
@@ -1312,16 +1363,17 @@ typedef enum _xbar_output_signal
  */
 
 /** ADC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t HC[8];                             /**< Control register for hardware triggers, array offset: 0x0, array step: 0x4 */
-  __I  uint32_t HS;                                /**< Status register for HW triggers, offset: 0x20 */
-  __I  uint32_t R[8];                              /**< Data result register for HW triggers, array offset: 0x24, array step: 0x4 */
-  __IO uint32_t CFG;                               /**< Configuration register, offset: 0x44 */
-  __IO uint32_t GC;                                /**< General control register, offset: 0x48 */
-  __IO uint32_t GS;                                /**< General status register, offset: 0x4C */
-  __IO uint32_t CV;                                /**< Compare value register, offset: 0x50 */
-  __IO uint32_t OFS;                               /**< Offset correction value register, offset: 0x54 */
-  __IO uint32_t CAL;                               /**< Calibration value register, offset: 0x58 */
+typedef struct
+{
+    __IO uint32_t HC[8]; /**< Control register for hardware triggers, array offset: 0x0, array step: 0x4 */
+    __I uint32_t HS;     /**< Status register for HW triggers, offset: 0x20 */
+    __I uint32_t R[8];   /**< Data result register for HW triggers, array offset: 0x24, array step: 0x4 */
+    __IO uint32_t CFG;   /**< Configuration register, offset: 0x44 */
+    __IO uint32_t GC;    /**< General control register, offset: 0x48 */
+    __IO uint32_t GS;    /**< General status register, offset: 0x4C */
+    __IO uint32_t CV;    /**< Compare value register, offset: 0x50 */
+    __IO uint32_t OFS;   /**< Offset correction value register, offset: 0x54 */
+    __IO uint32_t CAL;   /**< Calibration value register, offset: 0x58 */
 } ADC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1335,166 +1387,172 @@ typedef struct {
 
 /*! @name HC - Control register for hardware triggers */
 /*! @{ */
-#define ADC_HC_ADCH_MASK                         (0x1FU)
-#define ADC_HC_ADCH_SHIFT                        (0U)
-#define ADC_HC_ADCH(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_HC_ADCH_SHIFT)) & ADC_HC_ADCH_MASK)
-#define ADC_HC_AIEN_MASK                         (0x80U)
-#define ADC_HC_AIEN_SHIFT                        (7U)
-#define ADC_HC_AIEN(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_HC_AIEN_SHIFT)) & ADC_HC_AIEN_MASK)
+#define ADC_HC_ADCH_MASK  (0x1FU)
+#define ADC_HC_ADCH_SHIFT (0U)
+#define ADC_HC_ADCH(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HC_ADCH_SHIFT)) & ADC_HC_ADCH_MASK)
+#define ADC_HC_AIEN_MASK  (0x80U)
+#define ADC_HC_AIEN_SHIFT (7U)
+#define ADC_HC_AIEN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HC_AIEN_SHIFT)) & ADC_HC_AIEN_MASK)
 /*! @} */
 
 /* The count of ADC_HC */
-#define ADC_HC_COUNT                             (8U)
+#define ADC_HC_COUNT (8U)
 
 /*! @name HS - Status register for HW triggers */
 /*! @{ */
-#define ADC_HS_COCO0_MASK                        (0x1U)
-#define ADC_HS_COCO0_SHIFT                       (0U)
-#define ADC_HS_COCO0(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_HS_COCO0_SHIFT)) & ADC_HS_COCO0_MASK)
+#define ADC_HS_COCO0_MASK  (0x1U)
+#define ADC_HS_COCO0_SHIFT (0U)
+#define ADC_HS_COCO0(x)    (((uint32_t)(((uint32_t)(x)) << ADC_HS_COCO0_SHIFT)) & ADC_HS_COCO0_MASK)
 /*! @} */
 
 /*! @name R - Data result register for HW triggers */
 /*! @{ */
-#define ADC_R_CDATA_MASK                         (0xFFFU)
-#define ADC_R_CDATA_SHIFT                        (0U)
-#define ADC_R_CDATA(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_R_CDATA_SHIFT)) & ADC_R_CDATA_MASK)
+#define ADC_R_CDATA_MASK  (0xFFFU)
+#define ADC_R_CDATA_SHIFT (0U)
+#define ADC_R_CDATA(x)    (((uint32_t)(((uint32_t)(x)) << ADC_R_CDATA_SHIFT)) & ADC_R_CDATA_MASK)
 /*! @} */
 
 /* The count of ADC_R */
-#define ADC_R_COUNT                              (8U)
+#define ADC_R_COUNT (8U)
 
 /*! @name CFG - Configuration register */
 /*! @{ */
-#define ADC_CFG_ADICLK_MASK                      (0x3U)
-#define ADC_CFG_ADICLK_SHIFT                     (0U)
-#define ADC_CFG_ADICLK(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADICLK_SHIFT)) & ADC_CFG_ADICLK_MASK)
-#define ADC_CFG_MODE_MASK                        (0xCU)
-#define ADC_CFG_MODE_SHIFT                       (2U)
-#define ADC_CFG_MODE(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_MODE_SHIFT)) & ADC_CFG_MODE_MASK)
-#define ADC_CFG_ADLSMP_MASK                      (0x10U)
-#define ADC_CFG_ADLSMP_SHIFT                     (4U)
-#define ADC_CFG_ADLSMP(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
-#define ADC_CFG_ADIV_MASK                        (0x60U)
-#define ADC_CFG_ADIV_SHIFT                       (5U)
-#define ADC_CFG_ADIV(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADIV_SHIFT)) & ADC_CFG_ADIV_MASK)
-#define ADC_CFG_ADLPC_MASK                       (0x80U)
-#define ADC_CFG_ADLPC_SHIFT                      (7U)
-#define ADC_CFG_ADLPC(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLPC_SHIFT)) & ADC_CFG_ADLPC_MASK)
-#define ADC_CFG_ADSTS_MASK                       (0x300U)
-#define ADC_CFG_ADSTS_SHIFT                      (8U)
-#define ADC_CFG_ADSTS(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADSTS_SHIFT)) & ADC_CFG_ADSTS_MASK)
-#define ADC_CFG_ADHSC_MASK                       (0x400U)
-#define ADC_CFG_ADHSC_SHIFT                      (10U)
-#define ADC_CFG_ADHSC(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADHSC_SHIFT)) & ADC_CFG_ADHSC_MASK)
-#define ADC_CFG_REFSEL_MASK                      (0x1800U)
-#define ADC_CFG_REFSEL_SHIFT                     (11U)
-#define ADC_CFG_REFSEL(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_REFSEL_SHIFT)) & ADC_CFG_REFSEL_MASK)
-#define ADC_CFG_ADTRG_MASK                       (0x2000U)
-#define ADC_CFG_ADTRG_SHIFT                      (13U)
-#define ADC_CFG_ADTRG(x)                         (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADTRG_SHIFT)) & ADC_CFG_ADTRG_MASK)
-#define ADC_CFG_AVGS_MASK                        (0xC000U)
-#define ADC_CFG_AVGS_SHIFT                       (14U)
-#define ADC_CFG_AVGS(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
-#define ADC_CFG_OVWREN_MASK                      (0x10000U)
-#define ADC_CFG_OVWREN_SHIFT                     (16U)
-#define ADC_CFG_OVWREN(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_CFG_OVWREN_SHIFT)) & ADC_CFG_OVWREN_MASK)
+#define ADC_CFG_ADICLK_MASK  (0x3U)
+#define ADC_CFG_ADICLK_SHIFT (0U)
+#define ADC_CFG_ADICLK(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADICLK_SHIFT)) & ADC_CFG_ADICLK_MASK)
+#define ADC_CFG_MODE_MASK    (0xCU)
+#define ADC_CFG_MODE_SHIFT   (2U)
+#define ADC_CFG_MODE(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_MODE_SHIFT)) & ADC_CFG_MODE_MASK)
+#define ADC_CFG_ADLSMP_MASK  (0x10U)
+#define ADC_CFG_ADLSMP_SHIFT (4U)
+#define ADC_CFG_ADLSMP(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLSMP_SHIFT)) & ADC_CFG_ADLSMP_MASK)
+#define ADC_CFG_ADIV_MASK    (0x60U)
+#define ADC_CFG_ADIV_SHIFT   (5U)
+#define ADC_CFG_ADIV(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADIV_SHIFT)) & ADC_CFG_ADIV_MASK)
+#define ADC_CFG_ADLPC_MASK   (0x80U)
+#define ADC_CFG_ADLPC_SHIFT  (7U)
+#define ADC_CFG_ADLPC(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADLPC_SHIFT)) & ADC_CFG_ADLPC_MASK)
+#define ADC_CFG_ADSTS_MASK   (0x300U)
+#define ADC_CFG_ADSTS_SHIFT  (8U)
+#define ADC_CFG_ADSTS(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADSTS_SHIFT)) & ADC_CFG_ADSTS_MASK)
+#define ADC_CFG_ADHSC_MASK   (0x400U)
+#define ADC_CFG_ADHSC_SHIFT  (10U)
+#define ADC_CFG_ADHSC(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADHSC_SHIFT)) & ADC_CFG_ADHSC_MASK)
+#define ADC_CFG_REFSEL_MASK  (0x1800U)
+#define ADC_CFG_REFSEL_SHIFT (11U)
+#define ADC_CFG_REFSEL(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_REFSEL_SHIFT)) & ADC_CFG_REFSEL_MASK)
+#define ADC_CFG_ADTRG_MASK   (0x2000U)
+#define ADC_CFG_ADTRG_SHIFT  (13U)
+#define ADC_CFG_ADTRG(x)     (((uint32_t)(((uint32_t)(x)) << ADC_CFG_ADTRG_SHIFT)) & ADC_CFG_ADTRG_MASK)
+#define ADC_CFG_AVGS_MASK    (0xC000U)
+#define ADC_CFG_AVGS_SHIFT   (14U)
+#define ADC_CFG_AVGS(x)      (((uint32_t)(((uint32_t)(x)) << ADC_CFG_AVGS_SHIFT)) & ADC_CFG_AVGS_MASK)
+#define ADC_CFG_OVWREN_MASK  (0x10000U)
+#define ADC_CFG_OVWREN_SHIFT (16U)
+#define ADC_CFG_OVWREN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CFG_OVWREN_SHIFT)) & ADC_CFG_OVWREN_MASK)
 /*! @} */
 
 /*! @name GC - General control register */
 /*! @{ */
-#define ADC_GC_ADACKEN_MASK                      (0x1U)
-#define ADC_GC_ADACKEN_SHIFT                     (0U)
-#define ADC_GC_ADACKEN(x)                        (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
-#define ADC_GC_DMAEN_MASK                        (0x2U)
-#define ADC_GC_DMAEN_SHIFT                       (1U)
-#define ADC_GC_DMAEN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_DMAEN_SHIFT)) & ADC_GC_DMAEN_MASK)
-#define ADC_GC_ACREN_MASK                        (0x4U)
-#define ADC_GC_ACREN_SHIFT                       (2U)
-#define ADC_GC_ACREN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACREN_SHIFT)) & ADC_GC_ACREN_MASK)
-#define ADC_GC_ACFGT_MASK                        (0x8U)
-#define ADC_GC_ACFGT_SHIFT                       (3U)
-#define ADC_GC_ACFGT(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFGT_SHIFT)) & ADC_GC_ACFGT_MASK)
-#define ADC_GC_ACFE_MASK                         (0x10U)
-#define ADC_GC_ACFE_SHIFT                        (4U)
-#define ADC_GC_ACFE(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFE_SHIFT)) & ADC_GC_ACFE_MASK)
-#define ADC_GC_AVGE_MASK                         (0x20U)
-#define ADC_GC_AVGE_SHIFT                        (5U)
-#define ADC_GC_AVGE(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_AVGE_SHIFT)) & ADC_GC_AVGE_MASK)
-#define ADC_GC_ADCO_MASK                         (0x40U)
-#define ADC_GC_ADCO_SHIFT                        (6U)
-#define ADC_GC_ADCO(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADCO_SHIFT)) & ADC_GC_ADCO_MASK)
-#define ADC_GC_CAL_MASK                          (0x80U)
-#define ADC_GC_CAL_SHIFT                         (7U)
-#define ADC_GC_CAL(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_GC_CAL_SHIFT)) & ADC_GC_CAL_MASK)
+#define ADC_GC_ADACKEN_MASK  (0x1U)
+#define ADC_GC_ADACKEN_SHIFT (0U)
+#define ADC_GC_ADACKEN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADACKEN_SHIFT)) & ADC_GC_ADACKEN_MASK)
+#define ADC_GC_DMAEN_MASK    (0x2U)
+#define ADC_GC_DMAEN_SHIFT   (1U)
+#define ADC_GC_DMAEN(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_DMAEN_SHIFT)) & ADC_GC_DMAEN_MASK)
+#define ADC_GC_ACREN_MASK    (0x4U)
+#define ADC_GC_ACREN_SHIFT   (2U)
+#define ADC_GC_ACREN(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACREN_SHIFT)) & ADC_GC_ACREN_MASK)
+#define ADC_GC_ACFGT_MASK    (0x8U)
+#define ADC_GC_ACFGT_SHIFT   (3U)
+#define ADC_GC_ACFGT(x)      (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFGT_SHIFT)) & ADC_GC_ACFGT_MASK)
+#define ADC_GC_ACFE_MASK     (0x10U)
+#define ADC_GC_ACFE_SHIFT    (4U)
+#define ADC_GC_ACFE(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_ACFE_SHIFT)) & ADC_GC_ACFE_MASK)
+#define ADC_GC_AVGE_MASK     (0x20U)
+#define ADC_GC_AVGE_SHIFT    (5U)
+#define ADC_GC_AVGE(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_AVGE_SHIFT)) & ADC_GC_AVGE_MASK)
+#define ADC_GC_ADCO_MASK     (0x40U)
+#define ADC_GC_ADCO_SHIFT    (6U)
+#define ADC_GC_ADCO(x)       (((uint32_t)(((uint32_t)(x)) << ADC_GC_ADCO_SHIFT)) & ADC_GC_ADCO_MASK)
+#define ADC_GC_CAL_MASK      (0x80U)
+#define ADC_GC_CAL_SHIFT     (7U)
+#define ADC_GC_CAL(x)        (((uint32_t)(((uint32_t)(x)) << ADC_GC_CAL_SHIFT)) & ADC_GC_CAL_MASK)
 /*! @} */
 
 /*! @name GS - General status register */
 /*! @{ */
-#define ADC_GS_ADACT_MASK                        (0x1U)
-#define ADC_GS_ADACT_SHIFT                       (0U)
-#define ADC_GS_ADACT(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GS_ADACT_SHIFT)) & ADC_GS_ADACT_MASK)
-#define ADC_GS_CALF_MASK                         (0x2U)
-#define ADC_GS_CALF_SHIFT                        (1U)
-#define ADC_GS_CALF(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_GS_CALF_SHIFT)) & ADC_GS_CALF_MASK)
-#define ADC_GS_AWKST_MASK                        (0x4U)
-#define ADC_GS_AWKST_SHIFT                       (2U)
-#define ADC_GS_AWKST(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_GS_AWKST_SHIFT)) & ADC_GS_AWKST_MASK)
+#define ADC_GS_ADACT_MASK  (0x1U)
+#define ADC_GS_ADACT_SHIFT (0U)
+#define ADC_GS_ADACT(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GS_ADACT_SHIFT)) & ADC_GS_ADACT_MASK)
+#define ADC_GS_CALF_MASK   (0x2U)
+#define ADC_GS_CALF_SHIFT  (1U)
+#define ADC_GS_CALF(x)     (((uint32_t)(((uint32_t)(x)) << ADC_GS_CALF_SHIFT)) & ADC_GS_CALF_MASK)
+#define ADC_GS_AWKST_MASK  (0x4U)
+#define ADC_GS_AWKST_SHIFT (2U)
+#define ADC_GS_AWKST(x)    (((uint32_t)(((uint32_t)(x)) << ADC_GS_AWKST_SHIFT)) & ADC_GS_AWKST_MASK)
 /*! @} */
 
 /*! @name CV - Compare value register */
 /*! @{ */
-#define ADC_CV_CV1_MASK                          (0xFFFU)
-#define ADC_CV_CV1_SHIFT                         (0U)
-#define ADC_CV_CV1(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV1_SHIFT)) & ADC_CV_CV1_MASK)
-#define ADC_CV_CV2_MASK                          (0xFFF0000U)
-#define ADC_CV_CV2_SHIFT                         (16U)
-#define ADC_CV_CV2(x)                            (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV2_SHIFT)) & ADC_CV_CV2_MASK)
+#define ADC_CV_CV1_MASK  (0xFFFU)
+#define ADC_CV_CV1_SHIFT (0U)
+#define ADC_CV_CV1(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV1_SHIFT)) & ADC_CV_CV1_MASK)
+#define ADC_CV_CV2_MASK  (0xFFF0000U)
+#define ADC_CV_CV2_SHIFT (16U)
+#define ADC_CV_CV2(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CV_CV2_SHIFT)) & ADC_CV_CV2_MASK)
 /*! @} */
 
 /*! @name OFS - Offset correction value register */
 /*! @{ */
-#define ADC_OFS_OFS_MASK                         (0xFFFU)
-#define ADC_OFS_OFS_SHIFT                        (0U)
-#define ADC_OFS_OFS(x)                           (((uint32_t)(((uint32_t)(x)) << ADC_OFS_OFS_SHIFT)) & ADC_OFS_OFS_MASK)
-#define ADC_OFS_SIGN_MASK                        (0x1000U)
-#define ADC_OFS_SIGN_SHIFT                       (12U)
-#define ADC_OFS_SIGN(x)                          (((uint32_t)(((uint32_t)(x)) << ADC_OFS_SIGN_SHIFT)) & ADC_OFS_SIGN_MASK)
+#define ADC_OFS_OFS_MASK   (0xFFFU)
+#define ADC_OFS_OFS_SHIFT  (0U)
+#define ADC_OFS_OFS(x)     (((uint32_t)(((uint32_t)(x)) << ADC_OFS_OFS_SHIFT)) & ADC_OFS_OFS_MASK)
+#define ADC_OFS_SIGN_MASK  (0x1000U)
+#define ADC_OFS_SIGN_SHIFT (12U)
+#define ADC_OFS_SIGN(x)    (((uint32_t)(((uint32_t)(x)) << ADC_OFS_SIGN_SHIFT)) & ADC_OFS_SIGN_MASK)
 /*! @} */
 
 /*! @name CAL - Calibration value register */
 /*! @{ */
-#define ADC_CAL_CAL_CODE_MASK                    (0xFU)
-#define ADC_CAL_CAL_CODE_SHIFT                   (0U)
-#define ADC_CAL_CAL_CODE(x)                      (((uint32_t)(((uint32_t)(x)) << ADC_CAL_CAL_CODE_SHIFT)) & ADC_CAL_CAL_CODE_MASK)
+#define ADC_CAL_CAL_CODE_MASK  (0xFU)
+#define ADC_CAL_CAL_CODE_SHIFT (0U)
+#define ADC_CAL_CAL_CODE(x)    (((uint32_t)(((uint32_t)(x)) << ADC_CAL_CAL_CODE_SHIFT)) & ADC_CAL_CAL_CODE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ADC_Register_Masks */
 
-
 /* ADC - Peripheral instance base addresses */
 /** Peripheral ADC1 base address */
-#define ADC1_BASE                                (0x400C4000u)
+#define ADC1_BASE (0x400C4000u)
 /** Peripheral ADC1 base pointer */
-#define ADC1                                     ((ADC_Type *)ADC1_BASE)
+#define ADC1 ((ADC_Type *)ADC1_BASE)
 /** Peripheral ADC2 base address */
-#define ADC2_BASE                                (0x400C8000u)
+#define ADC2_BASE (0x400C8000u)
 /** Peripheral ADC2 base pointer */
-#define ADC2                                     ((ADC_Type *)ADC2_BASE)
+#define ADC2 ((ADC_Type *)ADC2_BASE)
 /** Array initializer of ADC peripheral base addresses */
-#define ADC_BASE_ADDRS                           { 0u, ADC1_BASE, ADC2_BASE }
+#define ADC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, ADC1_BASE, ADC2_BASE                                                                                       \
+    }
 /** Array initializer of ADC peripheral base pointers */
-#define ADC_BASE_PTRS                            { (ADC_Type *)0u, ADC1, ADC2 }
+#define ADC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (ADC_Type *)0u, ADC1, ADC2                                                                                     \
+    }
 /** Interrupt vectors for the ADC peripheral type */
-#define ADC_IRQS                                 { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn }
+#define ADC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group ADC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ADC_ETC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1505,23 +1563,27 @@ typedef struct {
  */
 
 /** ADC_ETC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< ADC_ETC Global Control Register, offset: 0x0 */
-  __IO uint32_t DONE0_1_IRQ;                       /**< ETC DONE0 and DONE1 IRQ State Register, offset: 0x4 */
-  __IO uint32_t DONE2_ERR_IRQ;                     /**< ETC DONE_2 and DONE_ERR IRQ State Register, offset: 0x8 */
-  __IO uint32_t DMA_CTRL;                          /**< ETC DMA control Register, offset: 0xC */
-  struct {                                         /* offset: 0x10, array step: 0x28 */
-    __IO uint32_t TRIGn_CTRL;                        /**< ETC_TRIG0 Control Register..ETC_TRIG7 Control Register, array offset: 0x10, array step: 0x28 */
-    __IO uint32_t TRIGn_COUNTER;                     /**< ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register, array offset: 0x14, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_1_0;                   /**< ETC_TRIG Chain 0/1 Register, array offset: 0x18, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_3_2;                   /**< ETC_TRIG Chain 2/3 Register, array offset: 0x1C, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_5_4;                   /**< ETC_TRIG Chain 4/5 Register, array offset: 0x20, array step: 0x28 */
-    __IO uint32_t TRIGn_CHAIN_7_6;                   /**< ETC_TRIG Chain 6/7 Register, array offset: 0x24, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_1_0;                  /**< ETC_TRIG Result Data 1/0 Register, array offset: 0x28, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_3_2;                  /**< ETC_TRIG Result Data 3/2 Register, array offset: 0x2C, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_5_4;                  /**< ETC_TRIG Result Data 5/4 Register, array offset: 0x30, array step: 0x28 */
-    __I  uint32_t TRIGn_RESULT_7_6;                  /**< ETC_TRIG Result Data 7/6 Register, array offset: 0x34, array step: 0x28 */
-  } TRIG[8];
+typedef struct
+{
+    __IO uint32_t CTRL;          /**< ADC_ETC Global Control Register, offset: 0x0 */
+    __IO uint32_t DONE0_1_IRQ;   /**< ETC DONE0 and DONE1 IRQ State Register, offset: 0x4 */
+    __IO uint32_t DONE2_ERR_IRQ; /**< ETC DONE_2 and DONE_ERR IRQ State Register, offset: 0x8 */
+    __IO uint32_t DMA_CTRL;      /**< ETC DMA control Register, offset: 0xC */
+    struct
+    {                             /* offset: 0x10, array step: 0x28 */
+        __IO uint32_t TRIGn_CTRL; /**< ETC_TRIG0 Control Register..ETC_TRIG7 Control Register, array offset: 0x10, array
+                                     step: 0x28 */
+        __IO uint32_t TRIGn_COUNTER;   /**< ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register, array offset: 0x14,
+                                          array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_1_0; /**< ETC_TRIG Chain 0/1 Register, array offset: 0x18, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_3_2; /**< ETC_TRIG Chain 2/3 Register, array offset: 0x1C, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_5_4; /**< ETC_TRIG Chain 4/5 Register, array offset: 0x20, array step: 0x28 */
+        __IO uint32_t TRIGn_CHAIN_7_6; /**< ETC_TRIG Chain 6/7 Register, array offset: 0x24, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_1_0; /**< ETC_TRIG Result Data 1/0 Register, array offset: 0x28, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_3_2; /**< ETC_TRIG Result Data 3/2 Register, array offset: 0x2C, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_5_4; /**< ETC_TRIG Result Data 5/4 Register, array offset: 0x30, array step: 0x28 */
+        __I uint32_t TRIGn_RESULT_7_6; /**< ETC_TRIG Result Data 7/6 Register, array offset: 0x34, array step: 0x28 */
+    } TRIG[8];
 } ADC_ETC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1535,426 +1597,542 @@ typedef struct {
 
 /*! @name CTRL - ADC_ETC Global Control Register */
 /*! @{ */
-#define ADC_ETC_CTRL_TRIG_ENABLE_MASK            (0xFFU)
-#define ADC_ETC_CTRL_TRIG_ENABLE_SHIFT           (0U)
-#define ADC_ETC_CTRL_TRIG_ENABLE(x)              (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK       (0x100U)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT      (8U)
-#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK     (0xE00U)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT    (9U)
-#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK       (0x1000U)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT      (12U)
-#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK     (0xE000U)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT    (13U)
-#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK)
-#define ADC_ETC_CTRL_PRE_DIVIDER_MASK            (0xFF0000U)
-#define ADC_ETC_CTRL_PRE_DIVIDER_SHIFT           (16U)
-#define ADC_ETC_CTRL_PRE_DIVIDER(x)              (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_PRE_DIVIDER_SHIFT)) & ADC_ETC_CTRL_PRE_DIVIDER_MASK)
-#define ADC_ETC_CTRL_DMA_MODE_SEL_MASK           (0x20000000U)
-#define ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT          (29U)
-#define ADC_ETC_CTRL_DMA_MODE_SEL(x)             (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT)) & ADC_ETC_CTRL_DMA_MODE_SEL_MASK)
-#define ADC_ETC_CTRL_TSC_BYPASS_MASK             (0x40000000U)
-#define ADC_ETC_CTRL_TSC_BYPASS_SHIFT            (30U)
-#define ADC_ETC_CTRL_TSC_BYPASS(x)               (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TSC_BYPASS_SHIFT)) & ADC_ETC_CTRL_TSC_BYPASS_MASK)
-#define ADC_ETC_CTRL_SOFTRST_MASK                (0x80000000U)
-#define ADC_ETC_CTRL_SOFTRST_SHIFT               (31U)
-#define ADC_ETC_CTRL_SOFTRST(x)                  (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_SOFTRST_SHIFT)) & ADC_ETC_CTRL_SOFTRST_MASK)
+#define ADC_ETC_CTRL_TRIG_ENABLE_MASK  (0xFFU)
+#define ADC_ETC_CTRL_TRIG_ENABLE_SHIFT (0U)
+#define ADC_ETC_CTRL_TRIG_ENABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK  (0x100U)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT (8U)
+#define ADC_ETC_CTRL_EXT0_TRIG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK  (0xE00U)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT (9U)
+#define ADC_ETC_CTRL_EXT0_TRIG_PRIORITY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT0_TRIG_PRIORITY_MASK)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK  (0x1000U)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT (12U)
+#define ADC_ETC_CTRL_EXT1_TRIG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_ENABLE_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_ENABLE_MASK)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK  (0xE000U)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT (13U)
+#define ADC_ETC_CTRL_EXT1_TRIG_PRIORITY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_SHIFT)) & ADC_ETC_CTRL_EXT1_TRIG_PRIORITY_MASK)
+#define ADC_ETC_CTRL_PRE_DIVIDER_MASK  (0xFF0000U)
+#define ADC_ETC_CTRL_PRE_DIVIDER_SHIFT (16U)
+#define ADC_ETC_CTRL_PRE_DIVIDER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_PRE_DIVIDER_SHIFT)) & ADC_ETC_CTRL_PRE_DIVIDER_MASK)
+#define ADC_ETC_CTRL_DMA_MODE_SEL_MASK  (0x20000000U)
+#define ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT (29U)
+#define ADC_ETC_CTRL_DMA_MODE_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_DMA_MODE_SEL_SHIFT)) & ADC_ETC_CTRL_DMA_MODE_SEL_MASK)
+#define ADC_ETC_CTRL_TSC_BYPASS_MASK  (0x40000000U)
+#define ADC_ETC_CTRL_TSC_BYPASS_SHIFT (30U)
+#define ADC_ETC_CTRL_TSC_BYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_TSC_BYPASS_SHIFT)) & ADC_ETC_CTRL_TSC_BYPASS_MASK)
+#define ADC_ETC_CTRL_SOFTRST_MASK  (0x80000000U)
+#define ADC_ETC_CTRL_SOFTRST_SHIFT (31U)
+#define ADC_ETC_CTRL_SOFTRST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_CTRL_SOFTRST_SHIFT)) & ADC_ETC_CTRL_SOFTRST_MASK)
 /*! @} */
 
 /*! @name DONE0_1_IRQ - ETC DONE0 and DONE1 IRQ State Register */
 /*! @{ */
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK     (0x1U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT    (0U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK     (0x2U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT    (1U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK     (0x4U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT    (2U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK     (0x8U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT    (3U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK     (0x10U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT    (4U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK     (0x20U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT    (5U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK     (0x40U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT    (6U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK     (0x80U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT    (7U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK     (0x10000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT    (16U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK     (0x20000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT    (17U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK     (0x40000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT    (18U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK     (0x80000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT    (19U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK     (0x100000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT    (20U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK     (0x200000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT    (21U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK     (0x400000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT    (22U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK     (0x800000U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT    (23U)
-#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK  (0x1U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT (0U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK  (0x2U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT (1U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK  (0x4U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT (2U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK  (0x8U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT (3U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK  (0x10U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT (4U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK  (0x20U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT (5U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK  (0x40U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT (6U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK  (0x80U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT (7U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE0_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK  (0x10000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT (16U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG0_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK  (0x20000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT (17U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG1_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK  (0x40000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT (18U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG2_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK  (0x80000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT (19U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG3_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK  (0x100000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT (20U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG4_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK  (0x200000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT (21U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG5_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK  (0x400000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT (22U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG6_DONE1_MASK)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK  (0x800000U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT (23U)
+#define ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_SHIFT)) & ADC_ETC_DONE0_1_IRQ_TRIG7_DONE1_MASK)
 /*! @} */
 
 /*! @name DONE2_ERR_IRQ - ETC DONE_2 and DONE_ERR IRQ State Register */
 /*! @{ */
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK   (0x1U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT  (0U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK   (0x2U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT  (1U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK   (0x4U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT  (2U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK   (0x8U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT  (3U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK   (0x10U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT  (4U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK   (0x20U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT  (5U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK   (0x40U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT  (6U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK   (0x80U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT  (7U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2(x)     (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK     (0x10000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT    (16U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK     (0x20000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT    (17U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK     (0x40000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT    (18U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK     (0x80000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT    (19U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK     (0x100000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT    (20U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK     (0x200000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT    (21U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK     (0x400000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT    (22U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK     (0x800000U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT    (23U)
-#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR(x)       (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK  (0x1U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT (0U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK  (0x2U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT (1U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK  (0x4U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT (2U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK  (0x8U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT (3U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK  (0x10U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT (4U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK  (0x20U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT (5U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK  (0x40U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT (6U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK  (0x80U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT (7U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_DONE2_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK  (0x10000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT (16U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG0_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK  (0x20000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT (17U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG1_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK  (0x40000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT (18U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG2_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK  (0x80000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT (19U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG3_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK  (0x100000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT (20U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG4_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK  (0x200000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT (21U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG5_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK  (0x400000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT (22U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG6_ERR_MASK)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK  (0x800000U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT (23U)
+#define ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_SHIFT)) & ADC_ETC_DONE2_ERR_IRQ_TRIG7_ERR_MASK)
 /*! @} */
 
 /*! @name DMA_CTRL - ETC DMA control Register */
 /*! @{ */
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK       (0x1U)
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT      (0U)
-#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK       (0x2U)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT      (1U)
-#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK       (0x4U)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT      (2U)
-#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK       (0x8U)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT      (3U)
-#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK       (0x10U)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT      (4U)
-#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK       (0x20U)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT      (5U)
-#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK       (0x40U)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT      (6U)
-#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK       (0x80U)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT      (7U)
-#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK          (0x10000U)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT         (16U)
-#define ADC_ETC_DMA_CTRL_TRIG0_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK          (0x20000U)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT         (17U)
-#define ADC_ETC_DMA_CTRL_TRIG1_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK          (0x40000U)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT         (18U)
-#define ADC_ETC_DMA_CTRL_TRIG2_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK          (0x80000U)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT         (19U)
-#define ADC_ETC_DMA_CTRL_TRIG3_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK          (0x100000U)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT         (20U)
-#define ADC_ETC_DMA_CTRL_TRIG4_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK          (0x200000U)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT         (21U)
-#define ADC_ETC_DMA_CTRL_TRIG5_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK          (0x400000U)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT         (22U)
-#define ADC_ETC_DMA_CTRL_TRIG6_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK          (0x800000U)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT         (23U)
-#define ADC_ETC_DMA_CTRL_TRIG7_REQ(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK  (0x1U)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT (0U)
+#define ADC_ETC_DMA_CTRL_TRIG0_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK  (0x2U)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT (1U)
+#define ADC_ETC_DMA_CTRL_TRIG1_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK  (0x4U)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT (2U)
+#define ADC_ETC_DMA_CTRL_TRIG2_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK  (0x8U)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT (3U)
+#define ADC_ETC_DMA_CTRL_TRIG3_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK  (0x10U)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT (4U)
+#define ADC_ETC_DMA_CTRL_TRIG4_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK  (0x20U)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT (5U)
+#define ADC_ETC_DMA_CTRL_TRIG5_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK  (0x40U)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT (6U)
+#define ADC_ETC_DMA_CTRL_TRIG6_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK  (0x80U)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT (7U)
+#define ADC_ETC_DMA_CTRL_TRIG7_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_ENABLE_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_ENABLE_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK  (0x10000U)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT (16U)
+#define ADC_ETC_DMA_CTRL_TRIG0_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG0_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK  (0x20000U)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT (17U)
+#define ADC_ETC_DMA_CTRL_TRIG1_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG1_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG1_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK  (0x40000U)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT (18U)
+#define ADC_ETC_DMA_CTRL_TRIG2_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG2_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG2_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK  (0x80000U)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT (19U)
+#define ADC_ETC_DMA_CTRL_TRIG3_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG3_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG3_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK  (0x100000U)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT (20U)
+#define ADC_ETC_DMA_CTRL_TRIG4_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG4_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG4_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK  (0x200000U)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT (21U)
+#define ADC_ETC_DMA_CTRL_TRIG5_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG5_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG5_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK  (0x400000U)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT (22U)
+#define ADC_ETC_DMA_CTRL_TRIG6_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG6_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG6_REQ_MASK)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK  (0x800000U)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT (23U)
+#define ADC_ETC_DMA_CTRL_TRIG7_REQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_DMA_CTRL_TRIG7_REQ_SHIFT)) & ADC_ETC_DMA_CTRL_TRIG7_REQ_MASK)
 /*! @} */
 
 /*! @name TRIGn_CTRL - ETC_TRIG0 Control Register..ETC_TRIG7 Control Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK          (0x1U)
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT         (0U)
-#define ADC_ETC_TRIGn_CTRL_SW_TRIG(x)            (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT)) & ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK        (0x10U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT       (4U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_MODE(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK       (0x700U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT      (8U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK    (0x7000U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT   (12U)
-#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY(x)      (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK        (0x10000U)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT       (16U)
-#define ADC_ETC_TRIGn_CTRL_SYNC_MODE(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK  (0x1U)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT (0U)
+#define ADC_ETC_TRIGn_CTRL_SW_TRIG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SW_TRIG_SHIFT)) & ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK  (0x10U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT (4U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK  (0x700U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT (8U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_CHAIN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_CHAIN_MASK)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK  (0x7000U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT (12U)
+#define ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_SHIFT)) & ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY_MASK)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK  (0x10000U)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT (16U)
+#define ADC_ETC_TRIGn_CTRL_SYNC_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CTRL_SYNC_MODE_SHIFT)) & ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CTRL */
-#define ADC_ETC_TRIGn_CTRL_COUNT                 (8U)
+#define ADC_ETC_TRIGn_CTRL_COUNT (8U)
 
 /*! @name TRIGn_COUNTER - ETC_TRIG0 Counter Register..ETC_TRIG7 Counter Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK    (0xFFFFU)
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT   (0U)
-#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY(x)      (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT)) & ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK)
-#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK (0xFFFF0000U)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK  (0xFFFFU)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT (0U)
+#define ADC_ETC_TRIGn_COUNTER_INIT_DELAY(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_INIT_DELAY_SHIFT)) & ADC_ETC_TRIGn_COUNTER_INIT_DELAY_MASK)
+#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK  (0xFFFF0000U)
 #define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT (16U)
-#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL(x) (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT)) & ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK)
+#define ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_SHIFT)) &                                    \
+     ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_COUNTER */
-#define ADC_ETC_TRIGn_COUNTER_COUNT              (8U)
+#define ADC_ETC_TRIGn_COUNTER_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_1_0 - ETC_TRIG Chain 0/1 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE0(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_1_0_IE1(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B0(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE0(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE0_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE0_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_CSEL1(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_HWTS1(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_B2B1(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_B2B1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_B2B1_MASK)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_IE1(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_1_0_IE1_SHIFT)) & ADC_ETC_TRIGn_CHAIN_1_0_IE1_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_1_0 */
-#define ADC_ETC_TRIGn_CHAIN_1_0_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_1_0_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_3_2 - ETC_TRIG Chain 2/3 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE2(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_3_2_IE3(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL2(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS2(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE2(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE2_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE2_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_CSEL3(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_CSEL3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_HWTS3(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_HWTS3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_B2B3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_B2B3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_B2B3_MASK)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_IE3(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_3_2_IE3_SHIFT)) & ADC_ETC_TRIGn_CHAIN_3_2_IE3_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_3_2 */
-#define ADC_ETC_TRIGn_CHAIN_3_2_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_3_2_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_5_4 - ETC_TRIG Chain 4/5 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE4(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_5_4_IE5(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL4(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS4(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B4(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE4(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE4_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE4_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_CSEL5(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_CSEL5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_HWTS5(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_HWTS5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_B2B5(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_B2B5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_B2B5_MASK)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_IE5(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_5_4_IE5_SHIFT)) & ADC_ETC_TRIGn_CHAIN_5_4_IE5_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_5_4 */
-#define ADC_ETC_TRIGn_CHAIN_5_4_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_5_4_COUNT (8U)
 
 /*! @name TRIGn_CHAIN_7_6 - ETC_TRIG Chain 6/7 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK       (0xFU)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT      (0U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK       (0xFF0U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT      (4U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK        (0x1000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT       (12U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK         (0x6000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT        (13U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE6(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK       (0xF0000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT      (16U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK       (0xFF00000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT      (20U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7(x)         (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK        (0x10000000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT       (28U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7(x)          (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK         (0x60000000U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT        (29U)
-#define ADC_ETC_TRIGn_CHAIN_7_6_IE7(x)           (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK  (0xFU)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT (0U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL6(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK  (0xFF0U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT (4U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS6(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK  (0x1000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT (12U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B6(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK  (0x6000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT (13U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE6(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE6_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE6_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK  (0xF0000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT (16U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_CSEL7(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_CSEL7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK  (0xFF00000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT (20U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_HWTS7(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_HWTS7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK  (0x10000000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT (28U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_B2B7(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_B2B7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_B2B7_MASK)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK  (0x60000000U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT (29U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_IE7(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_CHAIN_7_6_IE7_SHIFT)) & ADC_ETC_TRIGn_CHAIN_7_6_IE7_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_CHAIN_7_6 */
-#define ADC_ETC_TRIGn_CHAIN_7_6_COUNT            (8U)
+#define ADC_ETC_TRIGn_CHAIN_7_6_COUNT (8U)
 
 /*! @name TRIGn_RESULT_1_0 - ETC_TRIG Result Data 1/0 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA0(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_1_0_DATA1(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA0(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA0_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA0_MASK)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_1_0_DATA1(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_1_0_DATA1_SHIFT)) & ADC_ETC_TRIGn_RESULT_1_0_DATA1_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_1_0 */
-#define ADC_ETC_TRIGn_RESULT_1_0_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_1_0_COUNT (8U)
 
 /*! @name TRIGn_RESULT_3_2 - ETC_TRIG Result Data 3/2 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA2(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_3_2_DATA3(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA2(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA2_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA2_MASK)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_3_2_DATA3(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_3_2_DATA3_SHIFT)) & ADC_ETC_TRIGn_RESULT_3_2_DATA3_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_3_2 */
-#define ADC_ETC_TRIGn_RESULT_3_2_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_3_2_COUNT (8U)
 
 /*! @name TRIGn_RESULT_5_4 - ETC_TRIG Result Data 5/4 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA4(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_5_4_DATA5(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA4(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA4_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA4_MASK)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_5_4_DATA5(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_5_4_DATA5_SHIFT)) & ADC_ETC_TRIGn_RESULT_5_4_DATA5_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_5_4 */
-#define ADC_ETC_TRIGn_RESULT_5_4_COUNT           (8U)
+#define ADC_ETC_TRIGn_RESULT_5_4_COUNT (8U)
 
 /*! @name TRIGn_RESULT_7_6 - ETC_TRIG Result Data 7/6 Register */
 /*! @{ */
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK      (0xFFFU)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT     (0U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA6(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK      (0xFFF0000U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT     (16U)
-#define ADC_ETC_TRIGn_RESULT_7_6_DATA7(x)        (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK  (0xFFFU)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT (0U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA6(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA6_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA6_MASK)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK  (0xFFF0000U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT (16U)
+#define ADC_ETC_TRIGn_RESULT_7_6_DATA7(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ADC_ETC_TRIGn_RESULT_7_6_DATA7_SHIFT)) & ADC_ETC_TRIGn_RESULT_7_6_DATA7_MASK)
 /*! @} */
 
 /* The count of ADC_ETC_TRIGn_RESULT_7_6 */
-#define ADC_ETC_TRIGn_RESULT_7_6_COUNT           (8U)
-
+#define ADC_ETC_TRIGn_RESULT_7_6_COUNT (8U)
 
 /*!
  * @}
  */ /* end of group ADC_ETC_Register_Masks */
 
-
 /* ADC_ETC - Peripheral instance base addresses */
 /** Peripheral ADC_ETC base address */
-#define ADC_ETC_BASE                             (0x403B0000u)
+#define ADC_ETC_BASE (0x403B0000u)
 /** Peripheral ADC_ETC base pointer */
-#define ADC_ETC                                  ((ADC_ETC_Type *)ADC_ETC_BASE)
+#define ADC_ETC ((ADC_ETC_Type *)ADC_ETC_BASE)
 /** Array initializer of ADC_ETC peripheral base addresses */
-#define ADC_ETC_BASE_ADDRS                       { ADC_ETC_BASE }
+#define ADC_ETC_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        ADC_ETC_BASE                                                                                                   \
+    }
 /** Array initializer of ADC_ETC peripheral base pointers */
-#define ADC_ETC_BASE_PTRS                        { ADC_ETC }
+#define ADC_ETC_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        ADC_ETC                                                                                                        \
+    }
 /** Interrupt vectors for the ADC_ETC peripheral type */
-#define ADC_ETC_IRQS                             { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }
-#define ADC_ETC_FAULT_IRQS                       { ADC_ETC_ERROR_IRQ_IRQn }
+#define ADC_ETC_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {                                                                                                              \
+            ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn                                                    \
+        }                                                                                                              \
+    }
+#define ADC_ETC_FAULT_IRQS                                                                                             \
+    {                                                                                                                  \
+        ADC_ETC_ERROR_IRQ_IRQn                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group ADC_ETC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- AIPSTZ Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -1965,14 +2143,15 @@ typedef struct {
  */
 
 /** AIPSTZ - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MPR;                               /**< Master Priviledge Registers, offset: 0x0 */
-       uint8_t RESERVED_0[60];
-  __IO uint32_t OPACR;                             /**< Off-Platform Peripheral Access Control Registers, offset: 0x40 */
-  __IO uint32_t OPACR1;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x44 */
-  __IO uint32_t OPACR2;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x48 */
-  __IO uint32_t OPACR3;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x4C */
-  __IO uint32_t OPACR4;                            /**< Off-Platform Peripheral Access Control Registers, offset: 0x50 */
+typedef struct
+{
+    __IO uint32_t MPR; /**< Master Priviledge Registers, offset: 0x0 */
+    uint8_t RESERVED_0[60];
+    __IO uint32_t OPACR;  /**< Off-Platform Peripheral Access Control Registers, offset: 0x40 */
+    __IO uint32_t OPACR1; /**< Off-Platform Peripheral Access Control Registers, offset: 0x44 */
+    __IO uint32_t OPACR2; /**< Off-Platform Peripheral Access Control Registers, offset: 0x48 */
+    __IO uint32_t OPACR3; /**< Off-Platform Peripheral Access Control Registers, offset: 0x4C */
+    __IO uint32_t OPACR4; /**< Off-Platform Peripheral Access Control Registers, offset: 0x50 */
 } AIPSTZ_Type;
 
 /* ----------------------------------------------------------------------------
@@ -1986,178 +2165,205 @@ typedef struct {
 
 /*! @name MPR - Master Priviledge Registers */
 /*! @{ */
-#define AIPSTZ_MPR_MPROT5_MASK                   (0xF00U)
-#define AIPSTZ_MPR_MPROT5_SHIFT                  (8U)
-#define AIPSTZ_MPR_MPROT5(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT5_SHIFT)) & AIPSTZ_MPR_MPROT5_MASK)
-#define AIPSTZ_MPR_MPROT3_MASK                   (0xF0000U)
-#define AIPSTZ_MPR_MPROT3_SHIFT                  (16U)
-#define AIPSTZ_MPR_MPROT3(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT3_SHIFT)) & AIPSTZ_MPR_MPROT3_MASK)
-#define AIPSTZ_MPR_MPROT2_MASK                   (0xF00000U)
-#define AIPSTZ_MPR_MPROT2_SHIFT                  (20U)
-#define AIPSTZ_MPR_MPROT2(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT2_SHIFT)) & AIPSTZ_MPR_MPROT2_MASK)
-#define AIPSTZ_MPR_MPROT1_MASK                   (0xF000000U)
-#define AIPSTZ_MPR_MPROT1_SHIFT                  (24U)
-#define AIPSTZ_MPR_MPROT1(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT1_SHIFT)) & AIPSTZ_MPR_MPROT1_MASK)
-#define AIPSTZ_MPR_MPROT0_MASK                   (0xF0000000U)
-#define AIPSTZ_MPR_MPROT0_SHIFT                  (28U)
-#define AIPSTZ_MPR_MPROT0(x)                     (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT0_SHIFT)) & AIPSTZ_MPR_MPROT0_MASK)
+#define AIPSTZ_MPR_MPROT5_MASK  (0xF00U)
+#define AIPSTZ_MPR_MPROT5_SHIFT (8U)
+#define AIPSTZ_MPR_MPROT5(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT5_SHIFT)) & AIPSTZ_MPR_MPROT5_MASK)
+#define AIPSTZ_MPR_MPROT3_MASK  (0xF0000U)
+#define AIPSTZ_MPR_MPROT3_SHIFT (16U)
+#define AIPSTZ_MPR_MPROT3(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT3_SHIFT)) & AIPSTZ_MPR_MPROT3_MASK)
+#define AIPSTZ_MPR_MPROT2_MASK  (0xF00000U)
+#define AIPSTZ_MPR_MPROT2_SHIFT (20U)
+#define AIPSTZ_MPR_MPROT2(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT2_SHIFT)) & AIPSTZ_MPR_MPROT2_MASK)
+#define AIPSTZ_MPR_MPROT1_MASK  (0xF000000U)
+#define AIPSTZ_MPR_MPROT1_SHIFT (24U)
+#define AIPSTZ_MPR_MPROT1(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT1_SHIFT)) & AIPSTZ_MPR_MPROT1_MASK)
+#define AIPSTZ_MPR_MPROT0_MASK  (0xF0000000U)
+#define AIPSTZ_MPR_MPROT0_SHIFT (28U)
+#define AIPSTZ_MPR_MPROT0(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_MPR_MPROT0_SHIFT)) & AIPSTZ_MPR_MPROT0_MASK)
 /*! @} */
 
 /*! @name OPACR - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR_OPAC7_MASK                  (0xFU)
-#define AIPSTZ_OPACR_OPAC7_SHIFT                 (0U)
-#define AIPSTZ_OPACR_OPAC7(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC7_SHIFT)) & AIPSTZ_OPACR_OPAC7_MASK)
-#define AIPSTZ_OPACR_OPAC6_MASK                  (0xF0U)
-#define AIPSTZ_OPACR_OPAC6_SHIFT                 (4U)
-#define AIPSTZ_OPACR_OPAC6(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC6_SHIFT)) & AIPSTZ_OPACR_OPAC6_MASK)
-#define AIPSTZ_OPACR_OPAC5_MASK                  (0xF00U)
-#define AIPSTZ_OPACR_OPAC5_SHIFT                 (8U)
-#define AIPSTZ_OPACR_OPAC5(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC5_SHIFT)) & AIPSTZ_OPACR_OPAC5_MASK)
-#define AIPSTZ_OPACR_OPAC4_MASK                  (0xF000U)
-#define AIPSTZ_OPACR_OPAC4_SHIFT                 (12U)
-#define AIPSTZ_OPACR_OPAC4(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC4_SHIFT)) & AIPSTZ_OPACR_OPAC4_MASK)
-#define AIPSTZ_OPACR_OPAC3_MASK                  (0xF0000U)
-#define AIPSTZ_OPACR_OPAC3_SHIFT                 (16U)
-#define AIPSTZ_OPACR_OPAC3(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC3_SHIFT)) & AIPSTZ_OPACR_OPAC3_MASK)
-#define AIPSTZ_OPACR_OPAC2_MASK                  (0xF00000U)
-#define AIPSTZ_OPACR_OPAC2_SHIFT                 (20U)
-#define AIPSTZ_OPACR_OPAC2(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC2_SHIFT)) & AIPSTZ_OPACR_OPAC2_MASK)
-#define AIPSTZ_OPACR_OPAC1_MASK                  (0xF000000U)
-#define AIPSTZ_OPACR_OPAC1_SHIFT                 (24U)
-#define AIPSTZ_OPACR_OPAC1(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC1_SHIFT)) & AIPSTZ_OPACR_OPAC1_MASK)
-#define AIPSTZ_OPACR_OPAC0_MASK                  (0xF0000000U)
-#define AIPSTZ_OPACR_OPAC0_SHIFT                 (28U)
-#define AIPSTZ_OPACR_OPAC0(x)                    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC0_SHIFT)) & AIPSTZ_OPACR_OPAC0_MASK)
+#define AIPSTZ_OPACR_OPAC7_MASK  (0xFU)
+#define AIPSTZ_OPACR_OPAC7_SHIFT (0U)
+#define AIPSTZ_OPACR_OPAC7(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC7_SHIFT)) & AIPSTZ_OPACR_OPAC7_MASK)
+#define AIPSTZ_OPACR_OPAC6_MASK  (0xF0U)
+#define AIPSTZ_OPACR_OPAC6_SHIFT (4U)
+#define AIPSTZ_OPACR_OPAC6(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC6_SHIFT)) & AIPSTZ_OPACR_OPAC6_MASK)
+#define AIPSTZ_OPACR_OPAC5_MASK  (0xF00U)
+#define AIPSTZ_OPACR_OPAC5_SHIFT (8U)
+#define AIPSTZ_OPACR_OPAC5(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC5_SHIFT)) & AIPSTZ_OPACR_OPAC5_MASK)
+#define AIPSTZ_OPACR_OPAC4_MASK  (0xF000U)
+#define AIPSTZ_OPACR_OPAC4_SHIFT (12U)
+#define AIPSTZ_OPACR_OPAC4(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC4_SHIFT)) & AIPSTZ_OPACR_OPAC4_MASK)
+#define AIPSTZ_OPACR_OPAC3_MASK  (0xF0000U)
+#define AIPSTZ_OPACR_OPAC3_SHIFT (16U)
+#define AIPSTZ_OPACR_OPAC3(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC3_SHIFT)) & AIPSTZ_OPACR_OPAC3_MASK)
+#define AIPSTZ_OPACR_OPAC2_MASK  (0xF00000U)
+#define AIPSTZ_OPACR_OPAC2_SHIFT (20U)
+#define AIPSTZ_OPACR_OPAC2(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC2_SHIFT)) & AIPSTZ_OPACR_OPAC2_MASK)
+#define AIPSTZ_OPACR_OPAC1_MASK  (0xF000000U)
+#define AIPSTZ_OPACR_OPAC1_SHIFT (24U)
+#define AIPSTZ_OPACR_OPAC1(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC1_SHIFT)) & AIPSTZ_OPACR_OPAC1_MASK)
+#define AIPSTZ_OPACR_OPAC0_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR_OPAC0_SHIFT (28U)
+#define AIPSTZ_OPACR_OPAC0(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR_OPAC0_SHIFT)) & AIPSTZ_OPACR_OPAC0_MASK)
 /*! @} */
 
 /*! @name OPACR1 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR1_OPAC15_MASK                (0xFU)
-#define AIPSTZ_OPACR1_OPAC15_SHIFT               (0U)
-#define AIPSTZ_OPACR1_OPAC15(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC15_SHIFT)) & AIPSTZ_OPACR1_OPAC15_MASK)
-#define AIPSTZ_OPACR1_OPAC14_MASK                (0xF0U)
-#define AIPSTZ_OPACR1_OPAC14_SHIFT               (4U)
-#define AIPSTZ_OPACR1_OPAC14(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC14_SHIFT)) & AIPSTZ_OPACR1_OPAC14_MASK)
-#define AIPSTZ_OPACR1_OPAC13_MASK                (0xF00U)
-#define AIPSTZ_OPACR1_OPAC13_SHIFT               (8U)
-#define AIPSTZ_OPACR1_OPAC13(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC13_SHIFT)) & AIPSTZ_OPACR1_OPAC13_MASK)
-#define AIPSTZ_OPACR1_OPAC12_MASK                (0xF000U)
-#define AIPSTZ_OPACR1_OPAC12_SHIFT               (12U)
-#define AIPSTZ_OPACR1_OPAC12(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC12_SHIFT)) & AIPSTZ_OPACR1_OPAC12_MASK)
-#define AIPSTZ_OPACR1_OPAC11_MASK                (0xF0000U)
-#define AIPSTZ_OPACR1_OPAC11_SHIFT               (16U)
-#define AIPSTZ_OPACR1_OPAC11(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC11_SHIFT)) & AIPSTZ_OPACR1_OPAC11_MASK)
-#define AIPSTZ_OPACR1_OPAC10_MASK                (0xF00000U)
-#define AIPSTZ_OPACR1_OPAC10_SHIFT               (20U)
-#define AIPSTZ_OPACR1_OPAC10(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC10_SHIFT)) & AIPSTZ_OPACR1_OPAC10_MASK)
-#define AIPSTZ_OPACR1_OPAC9_MASK                 (0xF000000U)
-#define AIPSTZ_OPACR1_OPAC9_SHIFT                (24U)
-#define AIPSTZ_OPACR1_OPAC9(x)                   (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC9_SHIFT)) & AIPSTZ_OPACR1_OPAC9_MASK)
-#define AIPSTZ_OPACR1_OPAC8_MASK                 (0xF0000000U)
-#define AIPSTZ_OPACR1_OPAC8_SHIFT                (28U)
-#define AIPSTZ_OPACR1_OPAC8(x)                   (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC8_SHIFT)) & AIPSTZ_OPACR1_OPAC8_MASK)
+#define AIPSTZ_OPACR1_OPAC15_MASK  (0xFU)
+#define AIPSTZ_OPACR1_OPAC15_SHIFT (0U)
+#define AIPSTZ_OPACR1_OPAC15(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC15_SHIFT)) & AIPSTZ_OPACR1_OPAC15_MASK)
+#define AIPSTZ_OPACR1_OPAC14_MASK  (0xF0U)
+#define AIPSTZ_OPACR1_OPAC14_SHIFT (4U)
+#define AIPSTZ_OPACR1_OPAC14(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC14_SHIFT)) & AIPSTZ_OPACR1_OPAC14_MASK)
+#define AIPSTZ_OPACR1_OPAC13_MASK  (0xF00U)
+#define AIPSTZ_OPACR1_OPAC13_SHIFT (8U)
+#define AIPSTZ_OPACR1_OPAC13(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC13_SHIFT)) & AIPSTZ_OPACR1_OPAC13_MASK)
+#define AIPSTZ_OPACR1_OPAC12_MASK  (0xF000U)
+#define AIPSTZ_OPACR1_OPAC12_SHIFT (12U)
+#define AIPSTZ_OPACR1_OPAC12(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC12_SHIFT)) & AIPSTZ_OPACR1_OPAC12_MASK)
+#define AIPSTZ_OPACR1_OPAC11_MASK  (0xF0000U)
+#define AIPSTZ_OPACR1_OPAC11_SHIFT (16U)
+#define AIPSTZ_OPACR1_OPAC11(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC11_SHIFT)) & AIPSTZ_OPACR1_OPAC11_MASK)
+#define AIPSTZ_OPACR1_OPAC10_MASK  (0xF00000U)
+#define AIPSTZ_OPACR1_OPAC10_SHIFT (20U)
+#define AIPSTZ_OPACR1_OPAC10(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC10_SHIFT)) & AIPSTZ_OPACR1_OPAC10_MASK)
+#define AIPSTZ_OPACR1_OPAC9_MASK  (0xF000000U)
+#define AIPSTZ_OPACR1_OPAC9_SHIFT (24U)
+#define AIPSTZ_OPACR1_OPAC9(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC9_SHIFT)) & AIPSTZ_OPACR1_OPAC9_MASK)
+#define AIPSTZ_OPACR1_OPAC8_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR1_OPAC8_SHIFT (28U)
+#define AIPSTZ_OPACR1_OPAC8(x)    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR1_OPAC8_SHIFT)) & AIPSTZ_OPACR1_OPAC8_MASK)
 /*! @} */
 
 /*! @name OPACR2 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR2_OPAC23_MASK                (0xFU)
-#define AIPSTZ_OPACR2_OPAC23_SHIFT               (0U)
-#define AIPSTZ_OPACR2_OPAC23(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC23_SHIFT)) & AIPSTZ_OPACR2_OPAC23_MASK)
-#define AIPSTZ_OPACR2_OPAC22_MASK                (0xF0U)
-#define AIPSTZ_OPACR2_OPAC22_SHIFT               (4U)
-#define AIPSTZ_OPACR2_OPAC22(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC22_SHIFT)) & AIPSTZ_OPACR2_OPAC22_MASK)
-#define AIPSTZ_OPACR2_OPAC21_MASK                (0xF00U)
-#define AIPSTZ_OPACR2_OPAC21_SHIFT               (8U)
-#define AIPSTZ_OPACR2_OPAC21(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC21_SHIFT)) & AIPSTZ_OPACR2_OPAC21_MASK)
-#define AIPSTZ_OPACR2_OPAC20_MASK                (0xF000U)
-#define AIPSTZ_OPACR2_OPAC20_SHIFT               (12U)
-#define AIPSTZ_OPACR2_OPAC20(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC20_SHIFT)) & AIPSTZ_OPACR2_OPAC20_MASK)
-#define AIPSTZ_OPACR2_OPAC19_MASK                (0xF0000U)
-#define AIPSTZ_OPACR2_OPAC19_SHIFT               (16U)
-#define AIPSTZ_OPACR2_OPAC19(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC19_SHIFT)) & AIPSTZ_OPACR2_OPAC19_MASK)
-#define AIPSTZ_OPACR2_OPAC18_MASK                (0xF00000U)
-#define AIPSTZ_OPACR2_OPAC18_SHIFT               (20U)
-#define AIPSTZ_OPACR2_OPAC18(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC18_SHIFT)) & AIPSTZ_OPACR2_OPAC18_MASK)
-#define AIPSTZ_OPACR2_OPAC17_MASK                (0xF000000U)
-#define AIPSTZ_OPACR2_OPAC17_SHIFT               (24U)
-#define AIPSTZ_OPACR2_OPAC17(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC17_SHIFT)) & AIPSTZ_OPACR2_OPAC17_MASK)
-#define AIPSTZ_OPACR2_OPAC16_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR2_OPAC16_SHIFT               (28U)
-#define AIPSTZ_OPACR2_OPAC16(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC16_SHIFT)) & AIPSTZ_OPACR2_OPAC16_MASK)
+#define AIPSTZ_OPACR2_OPAC23_MASK  (0xFU)
+#define AIPSTZ_OPACR2_OPAC23_SHIFT (0U)
+#define AIPSTZ_OPACR2_OPAC23(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC23_SHIFT)) & AIPSTZ_OPACR2_OPAC23_MASK)
+#define AIPSTZ_OPACR2_OPAC22_MASK  (0xF0U)
+#define AIPSTZ_OPACR2_OPAC22_SHIFT (4U)
+#define AIPSTZ_OPACR2_OPAC22(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC22_SHIFT)) & AIPSTZ_OPACR2_OPAC22_MASK)
+#define AIPSTZ_OPACR2_OPAC21_MASK  (0xF00U)
+#define AIPSTZ_OPACR2_OPAC21_SHIFT (8U)
+#define AIPSTZ_OPACR2_OPAC21(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC21_SHIFT)) & AIPSTZ_OPACR2_OPAC21_MASK)
+#define AIPSTZ_OPACR2_OPAC20_MASK  (0xF000U)
+#define AIPSTZ_OPACR2_OPAC20_SHIFT (12U)
+#define AIPSTZ_OPACR2_OPAC20(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC20_SHIFT)) & AIPSTZ_OPACR2_OPAC20_MASK)
+#define AIPSTZ_OPACR2_OPAC19_MASK  (0xF0000U)
+#define AIPSTZ_OPACR2_OPAC19_SHIFT (16U)
+#define AIPSTZ_OPACR2_OPAC19(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC19_SHIFT)) & AIPSTZ_OPACR2_OPAC19_MASK)
+#define AIPSTZ_OPACR2_OPAC18_MASK  (0xF00000U)
+#define AIPSTZ_OPACR2_OPAC18_SHIFT (20U)
+#define AIPSTZ_OPACR2_OPAC18(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC18_SHIFT)) & AIPSTZ_OPACR2_OPAC18_MASK)
+#define AIPSTZ_OPACR2_OPAC17_MASK  (0xF000000U)
+#define AIPSTZ_OPACR2_OPAC17_SHIFT (24U)
+#define AIPSTZ_OPACR2_OPAC17(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC17_SHIFT)) & AIPSTZ_OPACR2_OPAC17_MASK)
+#define AIPSTZ_OPACR2_OPAC16_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR2_OPAC16_SHIFT (28U)
+#define AIPSTZ_OPACR2_OPAC16(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR2_OPAC16_SHIFT)) & AIPSTZ_OPACR2_OPAC16_MASK)
 /*! @} */
 
 /*! @name OPACR3 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR3_OPAC31_MASK                (0xFU)
-#define AIPSTZ_OPACR3_OPAC31_SHIFT               (0U)
-#define AIPSTZ_OPACR3_OPAC31(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC31_SHIFT)) & AIPSTZ_OPACR3_OPAC31_MASK)
-#define AIPSTZ_OPACR3_OPAC30_MASK                (0xF0U)
-#define AIPSTZ_OPACR3_OPAC30_SHIFT               (4U)
-#define AIPSTZ_OPACR3_OPAC30(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC30_SHIFT)) & AIPSTZ_OPACR3_OPAC30_MASK)
-#define AIPSTZ_OPACR3_OPAC29_MASK                (0xF00U)
-#define AIPSTZ_OPACR3_OPAC29_SHIFT               (8U)
-#define AIPSTZ_OPACR3_OPAC29(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC29_SHIFT)) & AIPSTZ_OPACR3_OPAC29_MASK)
-#define AIPSTZ_OPACR3_OPAC28_MASK                (0xF000U)
-#define AIPSTZ_OPACR3_OPAC28_SHIFT               (12U)
-#define AIPSTZ_OPACR3_OPAC28(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC28_SHIFT)) & AIPSTZ_OPACR3_OPAC28_MASK)
-#define AIPSTZ_OPACR3_OPAC27_MASK                (0xF0000U)
-#define AIPSTZ_OPACR3_OPAC27_SHIFT               (16U)
-#define AIPSTZ_OPACR3_OPAC27(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC27_SHIFT)) & AIPSTZ_OPACR3_OPAC27_MASK)
-#define AIPSTZ_OPACR3_OPAC26_MASK                (0xF00000U)
-#define AIPSTZ_OPACR3_OPAC26_SHIFT               (20U)
-#define AIPSTZ_OPACR3_OPAC26(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC26_SHIFT)) & AIPSTZ_OPACR3_OPAC26_MASK)
-#define AIPSTZ_OPACR3_OPAC25_MASK                (0xF000000U)
-#define AIPSTZ_OPACR3_OPAC25_SHIFT               (24U)
-#define AIPSTZ_OPACR3_OPAC25(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC25_SHIFT)) & AIPSTZ_OPACR3_OPAC25_MASK)
-#define AIPSTZ_OPACR3_OPAC24_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR3_OPAC24_SHIFT               (28U)
-#define AIPSTZ_OPACR3_OPAC24(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC24_SHIFT)) & AIPSTZ_OPACR3_OPAC24_MASK)
+#define AIPSTZ_OPACR3_OPAC31_MASK  (0xFU)
+#define AIPSTZ_OPACR3_OPAC31_SHIFT (0U)
+#define AIPSTZ_OPACR3_OPAC31(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC31_SHIFT)) & AIPSTZ_OPACR3_OPAC31_MASK)
+#define AIPSTZ_OPACR3_OPAC30_MASK  (0xF0U)
+#define AIPSTZ_OPACR3_OPAC30_SHIFT (4U)
+#define AIPSTZ_OPACR3_OPAC30(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC30_SHIFT)) & AIPSTZ_OPACR3_OPAC30_MASK)
+#define AIPSTZ_OPACR3_OPAC29_MASK  (0xF00U)
+#define AIPSTZ_OPACR3_OPAC29_SHIFT (8U)
+#define AIPSTZ_OPACR3_OPAC29(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC29_SHIFT)) & AIPSTZ_OPACR3_OPAC29_MASK)
+#define AIPSTZ_OPACR3_OPAC28_MASK  (0xF000U)
+#define AIPSTZ_OPACR3_OPAC28_SHIFT (12U)
+#define AIPSTZ_OPACR3_OPAC28(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC28_SHIFT)) & AIPSTZ_OPACR3_OPAC28_MASK)
+#define AIPSTZ_OPACR3_OPAC27_MASK  (0xF0000U)
+#define AIPSTZ_OPACR3_OPAC27_SHIFT (16U)
+#define AIPSTZ_OPACR3_OPAC27(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC27_SHIFT)) & AIPSTZ_OPACR3_OPAC27_MASK)
+#define AIPSTZ_OPACR3_OPAC26_MASK  (0xF00000U)
+#define AIPSTZ_OPACR3_OPAC26_SHIFT (20U)
+#define AIPSTZ_OPACR3_OPAC26(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC26_SHIFT)) & AIPSTZ_OPACR3_OPAC26_MASK)
+#define AIPSTZ_OPACR3_OPAC25_MASK  (0xF000000U)
+#define AIPSTZ_OPACR3_OPAC25_SHIFT (24U)
+#define AIPSTZ_OPACR3_OPAC25(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC25_SHIFT)) & AIPSTZ_OPACR3_OPAC25_MASK)
+#define AIPSTZ_OPACR3_OPAC24_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR3_OPAC24_SHIFT (28U)
+#define AIPSTZ_OPACR3_OPAC24(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR3_OPAC24_SHIFT)) & AIPSTZ_OPACR3_OPAC24_MASK)
 /*! @} */
 
 /*! @name OPACR4 - Off-Platform Peripheral Access Control Registers */
 /*! @{ */
-#define AIPSTZ_OPACR4_OPAC33_MASK                (0xF000000U)
-#define AIPSTZ_OPACR4_OPAC33_SHIFT               (24U)
-#define AIPSTZ_OPACR4_OPAC33(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC33_SHIFT)) & AIPSTZ_OPACR4_OPAC33_MASK)
-#define AIPSTZ_OPACR4_OPAC32_MASK                (0xF0000000U)
-#define AIPSTZ_OPACR4_OPAC32_SHIFT               (28U)
-#define AIPSTZ_OPACR4_OPAC32(x)                  (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC32_SHIFT)) & AIPSTZ_OPACR4_OPAC32_MASK)
+#define AIPSTZ_OPACR4_OPAC33_MASK  (0xF000000U)
+#define AIPSTZ_OPACR4_OPAC33_SHIFT (24U)
+#define AIPSTZ_OPACR4_OPAC33(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC33_SHIFT)) & AIPSTZ_OPACR4_OPAC33_MASK)
+#define AIPSTZ_OPACR4_OPAC32_MASK  (0xF0000000U)
+#define AIPSTZ_OPACR4_OPAC32_SHIFT (28U)
+#define AIPSTZ_OPACR4_OPAC32(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << AIPSTZ_OPACR4_OPAC32_SHIFT)) & AIPSTZ_OPACR4_OPAC32_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group AIPSTZ_Register_Masks */
 
-
 /* AIPSTZ - Peripheral instance base addresses */
 /** Peripheral AIPSTZ1 base address */
-#define AIPSTZ1_BASE                             (0x4007C000u)
+#define AIPSTZ1_BASE (0x4007C000u)
 /** Peripheral AIPSTZ1 base pointer */
-#define AIPSTZ1                                  ((AIPSTZ_Type *)AIPSTZ1_BASE)
+#define AIPSTZ1 ((AIPSTZ_Type *)AIPSTZ1_BASE)
 /** Peripheral AIPSTZ2 base address */
-#define AIPSTZ2_BASE                             (0x4017C000u)
+#define AIPSTZ2_BASE (0x4017C000u)
 /** Peripheral AIPSTZ2 base pointer */
-#define AIPSTZ2                                  ((AIPSTZ_Type *)AIPSTZ2_BASE)
+#define AIPSTZ2 ((AIPSTZ_Type *)AIPSTZ2_BASE)
 /** Peripheral AIPSTZ3 base address */
-#define AIPSTZ3_BASE                             (0x4027C000u)
+#define AIPSTZ3_BASE (0x4027C000u)
 /** Peripheral AIPSTZ3 base pointer */
-#define AIPSTZ3                                  ((AIPSTZ_Type *)AIPSTZ3_BASE)
+#define AIPSTZ3 ((AIPSTZ_Type *)AIPSTZ3_BASE)
 /** Peripheral AIPSTZ4 base address */
-#define AIPSTZ4_BASE                             (0x4037C000u)
+#define AIPSTZ4_BASE (0x4037C000u)
 /** Peripheral AIPSTZ4 base pointer */
-#define AIPSTZ4                                  ((AIPSTZ_Type *)AIPSTZ4_BASE)
+#define AIPSTZ4 ((AIPSTZ_Type *)AIPSTZ4_BASE)
 /** Array initializer of AIPSTZ peripheral base addresses */
-#define AIPSTZ_BASE_ADDRS                        { 0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE }
+#define AIPSTZ_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, AIPSTZ1_BASE, AIPSTZ2_BASE, AIPSTZ3_BASE, AIPSTZ4_BASE                                                     \
+    }
 /** Array initializer of AIPSTZ peripheral base pointers */
-#define AIPSTZ_BASE_PTRS                         { (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4 }
+#define AIPSTZ_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (AIPSTZ_Type *)0u, AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group AIPSTZ_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- AOI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2168,11 +2374,15 @@ typedef struct {
  */
 
 /** AOI - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x4 */
-    __IO uint16_t BFCRT01;                           /**< Boolean Function Term 0 and 1 Configuration Register for EVENTn, array offset: 0x0, array step: 0x4 */
-    __IO uint16_t BFCRT23;                           /**< Boolean Function Term 2 and 3 Configuration Register for EVENTn, array offset: 0x2, array step: 0x4 */
-  } BFCRT[4];
+typedef struct
+{
+    struct
+    {                          /* offset: 0x0, array step: 0x4 */
+        __IO uint16_t BFCRT01; /**< Boolean Function Term 0 and 1 Configuration Register for EVENTn, array offset: 0x0,
+                                  array step: 0x4 */
+        __IO uint16_t BFCRT23; /**< Boolean Function Term 2 and 3 Configuration Register for EVENTn, array offset: 0x2,
+                                  array step: 0x4 */
+    } BFCRT[4];
 } AOI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2186,91 +2396,94 @@ typedef struct {
 
 /*! @name BFCRT01 - Boolean Function Term 0 and 1 Configuration Register for EVENTn */
 /*! @{ */
-#define AOI_BFCRT01_PT1_DC_MASK                  (0x3U)
-#define AOI_BFCRT01_PT1_DC_SHIFT                 (0U)
-#define AOI_BFCRT01_PT1_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_DC_SHIFT)) & AOI_BFCRT01_PT1_DC_MASK)
-#define AOI_BFCRT01_PT1_CC_MASK                  (0xCU)
-#define AOI_BFCRT01_PT1_CC_SHIFT                 (2U)
-#define AOI_BFCRT01_PT1_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_CC_SHIFT)) & AOI_BFCRT01_PT1_CC_MASK)
-#define AOI_BFCRT01_PT1_BC_MASK                  (0x30U)
-#define AOI_BFCRT01_PT1_BC_SHIFT                 (4U)
-#define AOI_BFCRT01_PT1_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_BC_SHIFT)) & AOI_BFCRT01_PT1_BC_MASK)
-#define AOI_BFCRT01_PT1_AC_MASK                  (0xC0U)
-#define AOI_BFCRT01_PT1_AC_SHIFT                 (6U)
-#define AOI_BFCRT01_PT1_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_AC_SHIFT)) & AOI_BFCRT01_PT1_AC_MASK)
-#define AOI_BFCRT01_PT0_DC_MASK                  (0x300U)
-#define AOI_BFCRT01_PT0_DC_SHIFT                 (8U)
-#define AOI_BFCRT01_PT0_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_DC_SHIFT)) & AOI_BFCRT01_PT0_DC_MASK)
-#define AOI_BFCRT01_PT0_CC_MASK                  (0xC00U)
-#define AOI_BFCRT01_PT0_CC_SHIFT                 (10U)
-#define AOI_BFCRT01_PT0_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_CC_SHIFT)) & AOI_BFCRT01_PT0_CC_MASK)
-#define AOI_BFCRT01_PT0_BC_MASK                  (0x3000U)
-#define AOI_BFCRT01_PT0_BC_SHIFT                 (12U)
-#define AOI_BFCRT01_PT0_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_BC_SHIFT)) & AOI_BFCRT01_PT0_BC_MASK)
-#define AOI_BFCRT01_PT0_AC_MASK                  (0xC000U)
-#define AOI_BFCRT01_PT0_AC_SHIFT                 (14U)
-#define AOI_BFCRT01_PT0_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_AC_SHIFT)) & AOI_BFCRT01_PT0_AC_MASK)
+#define AOI_BFCRT01_PT1_DC_MASK  (0x3U)
+#define AOI_BFCRT01_PT1_DC_SHIFT (0U)
+#define AOI_BFCRT01_PT1_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_DC_SHIFT)) & AOI_BFCRT01_PT1_DC_MASK)
+#define AOI_BFCRT01_PT1_CC_MASK  (0xCU)
+#define AOI_BFCRT01_PT1_CC_SHIFT (2U)
+#define AOI_BFCRT01_PT1_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_CC_SHIFT)) & AOI_BFCRT01_PT1_CC_MASK)
+#define AOI_BFCRT01_PT1_BC_MASK  (0x30U)
+#define AOI_BFCRT01_PT1_BC_SHIFT (4U)
+#define AOI_BFCRT01_PT1_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_BC_SHIFT)) & AOI_BFCRT01_PT1_BC_MASK)
+#define AOI_BFCRT01_PT1_AC_MASK  (0xC0U)
+#define AOI_BFCRT01_PT1_AC_SHIFT (6U)
+#define AOI_BFCRT01_PT1_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT1_AC_SHIFT)) & AOI_BFCRT01_PT1_AC_MASK)
+#define AOI_BFCRT01_PT0_DC_MASK  (0x300U)
+#define AOI_BFCRT01_PT0_DC_SHIFT (8U)
+#define AOI_BFCRT01_PT0_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_DC_SHIFT)) & AOI_BFCRT01_PT0_DC_MASK)
+#define AOI_BFCRT01_PT0_CC_MASK  (0xC00U)
+#define AOI_BFCRT01_PT0_CC_SHIFT (10U)
+#define AOI_BFCRT01_PT0_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_CC_SHIFT)) & AOI_BFCRT01_PT0_CC_MASK)
+#define AOI_BFCRT01_PT0_BC_MASK  (0x3000U)
+#define AOI_BFCRT01_PT0_BC_SHIFT (12U)
+#define AOI_BFCRT01_PT0_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_BC_SHIFT)) & AOI_BFCRT01_PT0_BC_MASK)
+#define AOI_BFCRT01_PT0_AC_MASK  (0xC000U)
+#define AOI_BFCRT01_PT0_AC_SHIFT (14U)
+#define AOI_BFCRT01_PT0_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT01_PT0_AC_SHIFT)) & AOI_BFCRT01_PT0_AC_MASK)
 /*! @} */
 
 /* The count of AOI_BFCRT01 */
-#define AOI_BFCRT01_COUNT                        (4U)
+#define AOI_BFCRT01_COUNT (4U)
 
 /*! @name BFCRT23 - Boolean Function Term 2 and 3 Configuration Register for EVENTn */
 /*! @{ */
-#define AOI_BFCRT23_PT3_DC_MASK                  (0x3U)
-#define AOI_BFCRT23_PT3_DC_SHIFT                 (0U)
-#define AOI_BFCRT23_PT3_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_DC_SHIFT)) & AOI_BFCRT23_PT3_DC_MASK)
-#define AOI_BFCRT23_PT3_CC_MASK                  (0xCU)
-#define AOI_BFCRT23_PT3_CC_SHIFT                 (2U)
-#define AOI_BFCRT23_PT3_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_CC_SHIFT)) & AOI_BFCRT23_PT3_CC_MASK)
-#define AOI_BFCRT23_PT3_BC_MASK                  (0x30U)
-#define AOI_BFCRT23_PT3_BC_SHIFT                 (4U)
-#define AOI_BFCRT23_PT3_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_BC_SHIFT)) & AOI_BFCRT23_PT3_BC_MASK)
-#define AOI_BFCRT23_PT3_AC_MASK                  (0xC0U)
-#define AOI_BFCRT23_PT3_AC_SHIFT                 (6U)
-#define AOI_BFCRT23_PT3_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_AC_SHIFT)) & AOI_BFCRT23_PT3_AC_MASK)
-#define AOI_BFCRT23_PT2_DC_MASK                  (0x300U)
-#define AOI_BFCRT23_PT2_DC_SHIFT                 (8U)
-#define AOI_BFCRT23_PT2_DC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_DC_SHIFT)) & AOI_BFCRT23_PT2_DC_MASK)
-#define AOI_BFCRT23_PT2_CC_MASK                  (0xC00U)
-#define AOI_BFCRT23_PT2_CC_SHIFT                 (10U)
-#define AOI_BFCRT23_PT2_CC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_CC_SHIFT)) & AOI_BFCRT23_PT2_CC_MASK)
-#define AOI_BFCRT23_PT2_BC_MASK                  (0x3000U)
-#define AOI_BFCRT23_PT2_BC_SHIFT                 (12U)
-#define AOI_BFCRT23_PT2_BC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_BC_SHIFT)) & AOI_BFCRT23_PT2_BC_MASK)
-#define AOI_BFCRT23_PT2_AC_MASK                  (0xC000U)
-#define AOI_BFCRT23_PT2_AC_SHIFT                 (14U)
-#define AOI_BFCRT23_PT2_AC(x)                    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_AC_SHIFT)) & AOI_BFCRT23_PT2_AC_MASK)
+#define AOI_BFCRT23_PT3_DC_MASK  (0x3U)
+#define AOI_BFCRT23_PT3_DC_SHIFT (0U)
+#define AOI_BFCRT23_PT3_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_DC_SHIFT)) & AOI_BFCRT23_PT3_DC_MASK)
+#define AOI_BFCRT23_PT3_CC_MASK  (0xCU)
+#define AOI_BFCRT23_PT3_CC_SHIFT (2U)
+#define AOI_BFCRT23_PT3_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_CC_SHIFT)) & AOI_BFCRT23_PT3_CC_MASK)
+#define AOI_BFCRT23_PT3_BC_MASK  (0x30U)
+#define AOI_BFCRT23_PT3_BC_SHIFT (4U)
+#define AOI_BFCRT23_PT3_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_BC_SHIFT)) & AOI_BFCRT23_PT3_BC_MASK)
+#define AOI_BFCRT23_PT3_AC_MASK  (0xC0U)
+#define AOI_BFCRT23_PT3_AC_SHIFT (6U)
+#define AOI_BFCRT23_PT3_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT3_AC_SHIFT)) & AOI_BFCRT23_PT3_AC_MASK)
+#define AOI_BFCRT23_PT2_DC_MASK  (0x300U)
+#define AOI_BFCRT23_PT2_DC_SHIFT (8U)
+#define AOI_BFCRT23_PT2_DC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_DC_SHIFT)) & AOI_BFCRT23_PT2_DC_MASK)
+#define AOI_BFCRT23_PT2_CC_MASK  (0xC00U)
+#define AOI_BFCRT23_PT2_CC_SHIFT (10U)
+#define AOI_BFCRT23_PT2_CC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_CC_SHIFT)) & AOI_BFCRT23_PT2_CC_MASK)
+#define AOI_BFCRT23_PT2_BC_MASK  (0x3000U)
+#define AOI_BFCRT23_PT2_BC_SHIFT (12U)
+#define AOI_BFCRT23_PT2_BC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_BC_SHIFT)) & AOI_BFCRT23_PT2_BC_MASK)
+#define AOI_BFCRT23_PT2_AC_MASK  (0xC000U)
+#define AOI_BFCRT23_PT2_AC_SHIFT (14U)
+#define AOI_BFCRT23_PT2_AC(x)    (((uint16_t)(((uint16_t)(x)) << AOI_BFCRT23_PT2_AC_SHIFT)) & AOI_BFCRT23_PT2_AC_MASK)
 /*! @} */
 
 /* The count of AOI_BFCRT23 */
-#define AOI_BFCRT23_COUNT                        (4U)
-
+#define AOI_BFCRT23_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group AOI_Register_Masks */
 
-
 /* AOI - Peripheral instance base addresses */
 /** Peripheral AOI1 base address */
-#define AOI1_BASE                                (0x403B4000u)
+#define AOI1_BASE (0x403B4000u)
 /** Peripheral AOI1 base pointer */
-#define AOI1                                     ((AOI_Type *)AOI1_BASE)
+#define AOI1 ((AOI_Type *)AOI1_BASE)
 /** Peripheral AOI2 base address */
-#define AOI2_BASE                                (0x403B8000u)
+#define AOI2_BASE (0x403B8000u)
 /** Peripheral AOI2 base pointer */
-#define AOI2                                     ((AOI_Type *)AOI2_BASE)
+#define AOI2 ((AOI_Type *)AOI2_BASE)
 /** Array initializer of AOI peripheral base addresses */
-#define AOI_BASE_ADDRS                           { 0u, AOI1_BASE, AOI2_BASE }
+#define AOI_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, AOI1_BASE, AOI2_BASE                                                                                       \
+    }
 /** Array initializer of AOI peripheral base pointers */
-#define AOI_BASE_PTRS                            { (AOI_Type *)0u, AOI1, AOI2 }
+#define AOI_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (AOI_Type *)0u, AOI1, AOI2                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group AOI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- BEE Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2281,25 +2494,26 @@ typedef struct {
  */
 
 /** BEE - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< BEE Control Register, offset: 0x0 */
-  __IO uint32_t ADDR_OFFSET0;                      /**< , offset: 0x4 */
-  __IO uint32_t ADDR_OFFSET1;                      /**< , offset: 0x8 */
-  __IO uint32_t AES_KEY0_W0;                       /**< , offset: 0xC */
-  __IO uint32_t AES_KEY0_W1;                       /**< , offset: 0x10 */
-  __IO uint32_t AES_KEY0_W2;                       /**< , offset: 0x14 */
-  __IO uint32_t AES_KEY0_W3;                       /**< , offset: 0x18 */
-  __IO uint32_t STATUS;                            /**< , offset: 0x1C */
-  __O  uint32_t CTR_NONCE0_W0;                     /**< , offset: 0x20 */
-  __O  uint32_t CTR_NONCE0_W1;                     /**< , offset: 0x24 */
-  __O  uint32_t CTR_NONCE0_W2;                     /**< , offset: 0x28 */
-  __O  uint32_t CTR_NONCE0_W3;                     /**< , offset: 0x2C */
-  __O  uint32_t CTR_NONCE1_W0;                     /**< , offset: 0x30 */
-  __O  uint32_t CTR_NONCE1_W1;                     /**< , offset: 0x34 */
-  __O  uint32_t CTR_NONCE1_W2;                     /**< , offset: 0x38 */
-  __O  uint32_t CTR_NONCE1_W3;                     /**< , offset: 0x3C */
-  __IO uint32_t REGION1_TOP;                       /**< , offset: 0x40 */
-  __IO uint32_t REGION1_BOT;                       /**< , offset: 0x44 */
+typedef struct
+{
+    __IO uint32_t CTRL;         /**< BEE Control Register, offset: 0x0 */
+    __IO uint32_t ADDR_OFFSET0; /**< , offset: 0x4 */
+    __IO uint32_t ADDR_OFFSET1; /**< , offset: 0x8 */
+    __IO uint32_t AES_KEY0_W0;  /**< , offset: 0xC */
+    __IO uint32_t AES_KEY0_W1;  /**< , offset: 0x10 */
+    __IO uint32_t AES_KEY0_W2;  /**< , offset: 0x14 */
+    __IO uint32_t AES_KEY0_W3;  /**< , offset: 0x18 */
+    __IO uint32_t STATUS;       /**< , offset: 0x1C */
+    __O uint32_t CTR_NONCE0_W0; /**< , offset: 0x20 */
+    __O uint32_t CTR_NONCE0_W1; /**< , offset: 0x24 */
+    __O uint32_t CTR_NONCE0_W2; /**< , offset: 0x28 */
+    __O uint32_t CTR_NONCE0_W3; /**< , offset: 0x2C */
+    __O uint32_t CTR_NONCE1_W0; /**< , offset: 0x30 */
+    __O uint32_t CTR_NONCE1_W1; /**< , offset: 0x34 */
+    __O uint32_t CTR_NONCE1_W2; /**< , offset: 0x38 */
+    __O uint32_t CTR_NONCE1_W3; /**< , offset: 0x3C */
+    __IO uint32_t REGION1_TOP;  /**< , offset: 0x40 */
+    __IO uint32_t REGION1_BOT;  /**< , offset: 0x44 */
 } BEE_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2313,232 +2527,277 @@ typedef struct {
 
 /*! @name CTRL - BEE Control Register */
 /*! @{ */
-#define BEE_CTRL_BEE_ENABLE_MASK                 (0x1U)
-#define BEE_CTRL_BEE_ENABLE_SHIFT                (0U)
-#define BEE_CTRL_BEE_ENABLE(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_SHIFT)) & BEE_CTRL_BEE_ENABLE_MASK)
-#define BEE_CTRL_CTRL_CLK_EN_MASK                (0x2U)
-#define BEE_CTRL_CTRL_CLK_EN_SHIFT               (1U)
-#define BEE_CTRL_CTRL_CLK_EN(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_MASK)
-#define BEE_CTRL_CTRL_SFTRST_N_MASK              (0x4U)
-#define BEE_CTRL_CTRL_SFTRST_N_SHIFT             (2U)
-#define BEE_CTRL_CTRL_SFTRST_N(x)                (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_MASK)
-#define BEE_CTRL_KEY_VALID_MASK                  (0x10U)
-#define BEE_CTRL_KEY_VALID_SHIFT                 (4U)
-#define BEE_CTRL_KEY_VALID(x)                    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_SHIFT)) & BEE_CTRL_KEY_VALID_MASK)
-#define BEE_CTRL_KEY_REGION_SEL_MASK             (0x20U)
-#define BEE_CTRL_KEY_REGION_SEL_SHIFT            (5U)
-#define BEE_CTRL_KEY_REGION_SEL(x)               (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_MASK)
-#define BEE_CTRL_AC_PROT_EN_MASK                 (0x40U)
-#define BEE_CTRL_AC_PROT_EN_SHIFT                (6U)
-#define BEE_CTRL_AC_PROT_EN(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_SHIFT)) & BEE_CTRL_AC_PROT_EN_MASK)
-#define BEE_CTRL_LITTLE_ENDIAN_MASK              (0x80U)
-#define BEE_CTRL_LITTLE_ENDIAN_SHIFT             (7U)
-#define BEE_CTRL_LITTLE_ENDIAN(x)                (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R0_MASK          (0x300U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_SHIFT         (8U)
-#define BEE_CTRL_SECURITY_LEVEL_R0(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R0_MASK           (0x400U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_SHIFT          (10U)
-#define BEE_CTRL_CTRL_AES_MODE_R0(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R1_MASK          (0x3000U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_SHIFT         (12U)
-#define BEE_CTRL_SECURITY_LEVEL_R1(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R1_MASK           (0x4000U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_SHIFT          (14U)
-#define BEE_CTRL_CTRL_AES_MODE_R1(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_MASK)
-#define BEE_CTRL_BEE_ENABLE_LOCK_MASK            (0x10000U)
-#define BEE_CTRL_BEE_ENABLE_LOCK_SHIFT           (16U)
-#define BEE_CTRL_BEE_ENABLE_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_LOCK_SHIFT)) & BEE_CTRL_BEE_ENABLE_LOCK_MASK)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK_MASK           (0x20000U)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT          (17U)
-#define BEE_CTRL_CTRL_CLK_EN_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_LOCK_MASK)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK         (0x40000U)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT        (18U)
-#define BEE_CTRL_CTRL_SFTRST_N_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK)
-#define BEE_CTRL_REGION1_ADDR_LOCK_MASK          (0x80000U)
-#define BEE_CTRL_REGION1_ADDR_LOCK_SHIFT         (19U)
-#define BEE_CTRL_REGION1_ADDR_LOCK(x)            (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_ADDR_LOCK_SHIFT)) & BEE_CTRL_REGION1_ADDR_LOCK_MASK)
-#define BEE_CTRL_KEY_VALID_LOCK_MASK             (0x100000U)
-#define BEE_CTRL_KEY_VALID_LOCK_SHIFT            (20U)
-#define BEE_CTRL_KEY_VALID_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_LOCK_SHIFT)) & BEE_CTRL_KEY_VALID_LOCK_MASK)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK_MASK        (0x200000U)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT       (21U)
-#define BEE_CTRL_KEY_REGION_SEL_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_LOCK_MASK)
-#define BEE_CTRL_AC_PROT_EN_LOCK_MASK            (0x400000U)
-#define BEE_CTRL_AC_PROT_EN_LOCK_SHIFT           (22U)
-#define BEE_CTRL_AC_PROT_EN_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_LOCK_SHIFT)) & BEE_CTRL_AC_PROT_EN_LOCK_MASK)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK         (0x800000U)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT        (23U)
-#define BEE_CTRL_LITTLE_ENDIAN_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK     (0x3000000U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT    (24U)
-#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK      (0x4000000U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT     (26U)
-#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK(x)        (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK)
-#define BEE_CTRL_REGION0_KEY_LOCK_MASK           (0x8000000U)
-#define BEE_CTRL_REGION0_KEY_LOCK_SHIFT          (27U)
-#define BEE_CTRL_REGION0_KEY_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION0_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION0_KEY_LOCK_MASK)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK     (0x30000000U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT    (28U)
-#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK      (0x40000000U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT     (30U)
-#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK(x)        (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK)
-#define BEE_CTRL_REGION1_KEY_LOCK_MASK           (0x80000000U)
-#define BEE_CTRL_REGION1_KEY_LOCK_SHIFT          (31U)
-#define BEE_CTRL_REGION1_KEY_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION1_KEY_LOCK_MASK)
+#define BEE_CTRL_BEE_ENABLE_MASK   (0x1U)
+#define BEE_CTRL_BEE_ENABLE_SHIFT  (0U)
+#define BEE_CTRL_BEE_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_SHIFT)) & BEE_CTRL_BEE_ENABLE_MASK)
+#define BEE_CTRL_CTRL_CLK_EN_MASK  (0x2U)
+#define BEE_CTRL_CTRL_CLK_EN_SHIFT (1U)
+#define BEE_CTRL_CTRL_CLK_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_MASK)
+#define BEE_CTRL_CTRL_SFTRST_N_MASK  (0x4U)
+#define BEE_CTRL_CTRL_SFTRST_N_SHIFT (2U)
+#define BEE_CTRL_CTRL_SFTRST_N(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_MASK)
+#define BEE_CTRL_KEY_VALID_MASK       (0x10U)
+#define BEE_CTRL_KEY_VALID_SHIFT      (4U)
+#define BEE_CTRL_KEY_VALID(x)         (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_SHIFT)) & BEE_CTRL_KEY_VALID_MASK)
+#define BEE_CTRL_KEY_REGION_SEL_MASK  (0x20U)
+#define BEE_CTRL_KEY_REGION_SEL_SHIFT (5U)
+#define BEE_CTRL_KEY_REGION_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_MASK)
+#define BEE_CTRL_AC_PROT_EN_MASK     (0x40U)
+#define BEE_CTRL_AC_PROT_EN_SHIFT    (6U)
+#define BEE_CTRL_AC_PROT_EN(x)       (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_SHIFT)) & BEE_CTRL_AC_PROT_EN_MASK)
+#define BEE_CTRL_LITTLE_ENDIAN_MASK  (0x80U)
+#define BEE_CTRL_LITTLE_ENDIAN_SHIFT (7U)
+#define BEE_CTRL_LITTLE_ENDIAN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R0_MASK  (0x300U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_SHIFT (8U)
+#define BEE_CTRL_SECURITY_LEVEL_R0(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R0_MASK  (0x400U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_SHIFT (10U)
+#define BEE_CTRL_CTRL_AES_MODE_R0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R1_MASK  (0x3000U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_SHIFT (12U)
+#define BEE_CTRL_SECURITY_LEVEL_R1(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R1_MASK  (0x4000U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_SHIFT (14U)
+#define BEE_CTRL_CTRL_AES_MODE_R1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_MASK)
+#define BEE_CTRL_BEE_ENABLE_LOCK_MASK  (0x10000U)
+#define BEE_CTRL_BEE_ENABLE_LOCK_SHIFT (16U)
+#define BEE_CTRL_BEE_ENABLE_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_LOCK_SHIFT)) & BEE_CTRL_BEE_ENABLE_LOCK_MASK)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK_MASK  (0x20000U)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT (17U)
+#define BEE_CTRL_CTRL_CLK_EN_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_LOCK_MASK)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK  (0x40000U)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT (18U)
+#define BEE_CTRL_CTRL_SFTRST_N_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK)
+#define BEE_CTRL_REGION1_ADDR_LOCK_MASK  (0x80000U)
+#define BEE_CTRL_REGION1_ADDR_LOCK_SHIFT (19U)
+#define BEE_CTRL_REGION1_ADDR_LOCK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_ADDR_LOCK_SHIFT)) & BEE_CTRL_REGION1_ADDR_LOCK_MASK)
+#define BEE_CTRL_KEY_VALID_LOCK_MASK  (0x100000U)
+#define BEE_CTRL_KEY_VALID_LOCK_SHIFT (20U)
+#define BEE_CTRL_KEY_VALID_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_LOCK_SHIFT)) & BEE_CTRL_KEY_VALID_LOCK_MASK)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK_MASK  (0x200000U)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT (21U)
+#define BEE_CTRL_KEY_REGION_SEL_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_LOCK_MASK)
+#define BEE_CTRL_AC_PROT_EN_LOCK_MASK  (0x400000U)
+#define BEE_CTRL_AC_PROT_EN_LOCK_SHIFT (22U)
+#define BEE_CTRL_AC_PROT_EN_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_LOCK_SHIFT)) & BEE_CTRL_AC_PROT_EN_LOCK_MASK)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK  (0x800000U)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT (23U)
+#define BEE_CTRL_LITTLE_ENDIAN_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK  (0x3000000U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT (24U)
+#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK  (0x4000000U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT (26U)
+#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK)
+#define BEE_CTRL_REGION0_KEY_LOCK_MASK  (0x8000000U)
+#define BEE_CTRL_REGION0_KEY_LOCK_SHIFT (27U)
+#define BEE_CTRL_REGION0_KEY_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION0_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION0_KEY_LOCK_MASK)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK  (0x30000000U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT (28U)
+#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK  (0x40000000U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT (30U)
+#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK)
+#define BEE_CTRL_REGION1_KEY_LOCK_MASK  (0x80000000U)
+#define BEE_CTRL_REGION1_KEY_LOCK_SHIFT (31U)
+#define BEE_CTRL_REGION1_KEY_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION1_KEY_LOCK_MASK)
 /*! @} */
 
 /*! @name ADDR_OFFSET0 -  */
 /*! @{ */
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK       (0xFFFFU)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT      (0U)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0(x)         (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK  (0xFFFFU)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT (0U)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK)
 #define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK  (0xFFFF0000U)
 #define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT (16U)
-#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK(x)    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK)
+#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT)) &                                       \
+     BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK)
 /*! @} */
 
 /*! @name ADDR_OFFSET1 -  */
 /*! @{ */
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK       (0xFFFFU)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT      (0U)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0(x)         (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK  (0xFFFFU)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT (0U)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_MASK)
 #define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK  (0xFFFF0000U)
 #define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT (16U)
-#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK(x)    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK)
+#define BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_SHIFT)) &                                       \
+     BEE_ADDR_OFFSET1_ADDR_OFFSET0_LOCK_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W0 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W0_KEY0_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W0_KEY0_SHIFT               (0U)
-#define BEE_AES_KEY0_W0_KEY0(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W0_KEY0_SHIFT)) & BEE_AES_KEY0_W0_KEY0_MASK)
+#define BEE_AES_KEY0_W0_KEY0_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W0_KEY0_SHIFT (0U)
+#define BEE_AES_KEY0_W0_KEY0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W0_KEY0_SHIFT)) & BEE_AES_KEY0_W0_KEY0_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W1 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W1_KEY1_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W1_KEY1_SHIFT               (0U)
-#define BEE_AES_KEY0_W1_KEY1(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W1_KEY1_SHIFT)) & BEE_AES_KEY0_W1_KEY1_MASK)
+#define BEE_AES_KEY0_W1_KEY1_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W1_KEY1_SHIFT (0U)
+#define BEE_AES_KEY0_W1_KEY1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W1_KEY1_SHIFT)) & BEE_AES_KEY0_W1_KEY1_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W2 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W2_KEY2_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W2_KEY2_SHIFT               (0U)
-#define BEE_AES_KEY0_W2_KEY2(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W2_KEY2_SHIFT)) & BEE_AES_KEY0_W2_KEY2_MASK)
+#define BEE_AES_KEY0_W2_KEY2_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W2_KEY2_SHIFT (0U)
+#define BEE_AES_KEY0_W2_KEY2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W2_KEY2_SHIFT)) & BEE_AES_KEY0_W2_KEY2_MASK)
 /*! @} */
 
 /*! @name AES_KEY0_W3 -  */
 /*! @{ */
-#define BEE_AES_KEY0_W3_KEY3_MASK                (0xFFFFFFFFU)
-#define BEE_AES_KEY0_W3_KEY3_SHIFT               (0U)
-#define BEE_AES_KEY0_W3_KEY3(x)                  (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W3_KEY3_SHIFT)) & BEE_AES_KEY0_W3_KEY3_MASK)
+#define BEE_AES_KEY0_W3_KEY3_MASK  (0xFFFFFFFFU)
+#define BEE_AES_KEY0_W3_KEY3_SHIFT (0U)
+#define BEE_AES_KEY0_W3_KEY3(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W3_KEY3_SHIFT)) & BEE_AES_KEY0_W3_KEY3_MASK)
 /*! @} */
 
 /*! @name STATUS -  */
 /*! @{ */
-#define BEE_STATUS_IRQ_VEC_MASK                  (0xFFU)
-#define BEE_STATUS_IRQ_VEC_SHIFT                 (0U)
-#define BEE_STATUS_IRQ_VEC(x)                    (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_IRQ_VEC_SHIFT)) & BEE_STATUS_IRQ_VEC_MASK)
-#define BEE_STATUS_BEE_IDLE_MASK                 (0x100U)
-#define BEE_STATUS_BEE_IDLE_SHIFT                (8U)
-#define BEE_STATUS_BEE_IDLE(x)                   (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_BEE_IDLE_SHIFT)) & BEE_STATUS_BEE_IDLE_MASK)
+#define BEE_STATUS_IRQ_VEC_MASK   (0xFFU)
+#define BEE_STATUS_IRQ_VEC_SHIFT  (0U)
+#define BEE_STATUS_IRQ_VEC(x)     (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_IRQ_VEC_SHIFT)) & BEE_STATUS_IRQ_VEC_MASK)
+#define BEE_STATUS_BEE_IDLE_MASK  (0x100U)
+#define BEE_STATUS_BEE_IDLE_SHIFT (8U)
+#define BEE_STATUS_BEE_IDLE(x)    (((uint32_t)(((uint32_t)(x)) << BEE_STATUS_BEE_IDLE_SHIFT)) & BEE_STATUS_BEE_IDLE_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W0 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W0_NONCE00_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W0_NONCE00_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W0_NONCE00(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W0_NONCE00_SHIFT)) & BEE_CTR_NONCE0_W0_NONCE00_MASK)
+#define BEE_CTR_NONCE0_W0_NONCE00_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W0_NONCE00_SHIFT (0U)
+#define BEE_CTR_NONCE0_W0_NONCE00(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W0_NONCE00_SHIFT)) & BEE_CTR_NONCE0_W0_NONCE00_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W1 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W1_NONCE01_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W1_NONCE01_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W1_NONCE01(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W1_NONCE01_SHIFT)) & BEE_CTR_NONCE0_W1_NONCE01_MASK)
+#define BEE_CTR_NONCE0_W1_NONCE01_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W1_NONCE01_SHIFT (0U)
+#define BEE_CTR_NONCE0_W1_NONCE01(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W1_NONCE01_SHIFT)) & BEE_CTR_NONCE0_W1_NONCE01_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W2 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W2_NONCE02_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W2_NONCE02_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W2_NONCE02(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W2_NONCE02_SHIFT)) & BEE_CTR_NONCE0_W2_NONCE02_MASK)
+#define BEE_CTR_NONCE0_W2_NONCE02_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W2_NONCE02_SHIFT (0U)
+#define BEE_CTR_NONCE0_W2_NONCE02(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W2_NONCE02_SHIFT)) & BEE_CTR_NONCE0_W2_NONCE02_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE0_W3 -  */
 /*! @{ */
-#define BEE_CTR_NONCE0_W3_NONCE03_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE0_W3_NONCE03_SHIFT          (0U)
-#define BEE_CTR_NONCE0_W3_NONCE03(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W3_NONCE03_SHIFT)) & BEE_CTR_NONCE0_W3_NONCE03_MASK)
+#define BEE_CTR_NONCE0_W3_NONCE03_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE0_W3_NONCE03_SHIFT (0U)
+#define BEE_CTR_NONCE0_W3_NONCE03(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W3_NONCE03_SHIFT)) & BEE_CTR_NONCE0_W3_NONCE03_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W0 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W0_NONCE10_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W0_NONCE10_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W0_NONCE10(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W0_NONCE10_SHIFT)) & BEE_CTR_NONCE1_W0_NONCE10_MASK)
+#define BEE_CTR_NONCE1_W0_NONCE10_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W0_NONCE10_SHIFT (0U)
+#define BEE_CTR_NONCE1_W0_NONCE10(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W0_NONCE10_SHIFT)) & BEE_CTR_NONCE1_W0_NONCE10_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W1 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W1_NONCE11_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W1_NONCE11_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W1_NONCE11(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W1_NONCE11_SHIFT)) & BEE_CTR_NONCE1_W1_NONCE11_MASK)
+#define BEE_CTR_NONCE1_W1_NONCE11_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W1_NONCE11_SHIFT (0U)
+#define BEE_CTR_NONCE1_W1_NONCE11(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W1_NONCE11_SHIFT)) & BEE_CTR_NONCE1_W1_NONCE11_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W2 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W2_NONCE12_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W2_NONCE12_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W2_NONCE12(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W2_NONCE12_SHIFT)) & BEE_CTR_NONCE1_W2_NONCE12_MASK)
+#define BEE_CTR_NONCE1_W2_NONCE12_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W2_NONCE12_SHIFT (0U)
+#define BEE_CTR_NONCE1_W2_NONCE12(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W2_NONCE12_SHIFT)) & BEE_CTR_NONCE1_W2_NONCE12_MASK)
 /*! @} */
 
 /*! @name CTR_NONCE1_W3 -  */
 /*! @{ */
-#define BEE_CTR_NONCE1_W3_NONCE13_MASK           (0xFFFFFFFFU)
-#define BEE_CTR_NONCE1_W3_NONCE13_SHIFT          (0U)
-#define BEE_CTR_NONCE1_W3_NONCE13(x)             (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W3_NONCE13_SHIFT)) & BEE_CTR_NONCE1_W3_NONCE13_MASK)
+#define BEE_CTR_NONCE1_W3_NONCE13_MASK  (0xFFFFFFFFU)
+#define BEE_CTR_NONCE1_W3_NONCE13_SHIFT (0U)
+#define BEE_CTR_NONCE1_W3_NONCE13(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W3_NONCE13_SHIFT)) & BEE_CTR_NONCE1_W3_NONCE13_MASK)
 /*! @} */
 
 /*! @name REGION1_TOP -  */
 /*! @{ */
-#define BEE_REGION1_TOP_REGION1_TOP_MASK         (0xFFFFFFFFU)
-#define BEE_REGION1_TOP_REGION1_TOP_SHIFT        (0U)
-#define BEE_REGION1_TOP_REGION1_TOP(x)           (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_TOP_REGION1_TOP_SHIFT)) & BEE_REGION1_TOP_REGION1_TOP_MASK)
+#define BEE_REGION1_TOP_REGION1_TOP_MASK  (0xFFFFFFFFU)
+#define BEE_REGION1_TOP_REGION1_TOP_SHIFT (0U)
+#define BEE_REGION1_TOP_REGION1_TOP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_TOP_REGION1_TOP_SHIFT)) & BEE_REGION1_TOP_REGION1_TOP_MASK)
 /*! @} */
 
 /*! @name REGION1_BOT -  */
 /*! @{ */
-#define BEE_REGION1_BOT_REGION1_BOT_MASK         (0xFFFFFFFFU)
-#define BEE_REGION1_BOT_REGION1_BOT_SHIFT        (0U)
-#define BEE_REGION1_BOT_REGION1_BOT(x)           (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_BOT_REGION1_BOT_SHIFT)) & BEE_REGION1_BOT_REGION1_BOT_MASK)
+#define BEE_REGION1_BOT_REGION1_BOT_MASK  (0xFFFFFFFFU)
+#define BEE_REGION1_BOT_REGION1_BOT_SHIFT (0U)
+#define BEE_REGION1_BOT_REGION1_BOT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << BEE_REGION1_BOT_REGION1_BOT_SHIFT)) & BEE_REGION1_BOT_REGION1_BOT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group BEE_Register_Masks */
 
-
 /* BEE - Peripheral instance base addresses */
 /** Peripheral BEE base address */
-#define BEE_BASE                                 (0x403EC000u)
+#define BEE_BASE (0x403EC000u)
 /** Peripheral BEE base pointer */
-#define BEE                                      ((BEE_Type *)BEE_BASE)
+#define BEE ((BEE_Type *)BEE_BASE)
 /** Array initializer of BEE peripheral base addresses */
-#define BEE_BASE_ADDRS                           { BEE_BASE }
+#define BEE_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        BEE_BASE                                                                                                       \
+    }
 /** Array initializer of BEE peripheral base pointers */
-#define BEE_BASE_PTRS                            { BEE }
+#define BEE_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        BEE                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group BEE_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CAN Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -2549,37 +2808,43 @@ typedef struct {
  */
 
 /** CAN - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< Module Configuration Register, offset: 0x0 */
-  __IO uint32_t CTRL1;                             /**< Control 1 Register, offset: 0x4 */
-  __IO uint32_t TIMER;                             /**< Free Running Timer Register, offset: 0x8 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t RXMGMASK;                          /**< Rx Mailboxes Global Mask Register, offset: 0x10 */
-  __IO uint32_t RX14MASK;                          /**< Rx Buffer 14 Mask Register, offset: 0x14 */
-  __IO uint32_t RX15MASK;                          /**< Rx Buffer 15 Mask Register, offset: 0x18 */
-  __IO uint32_t ECR;                               /**< Error Counter Register, offset: 0x1C */
-  __IO uint32_t ESR1;                              /**< Error and Status 1 Register, offset: 0x20 */
-  __IO uint32_t IMASK2;                            /**< Interrupt Masks 2 Register, offset: 0x24 */
-  __IO uint32_t IMASK1;                            /**< Interrupt Masks 1 Register, offset: 0x28 */
-  __IO uint32_t IFLAG2;                            /**< Interrupt Flags 2 Register, offset: 0x2C */
-  __IO uint32_t IFLAG1;                            /**< Interrupt Flags 1 Register, offset: 0x30 */
-  __IO uint32_t CTRL2;                             /**< Control 2 Register, offset: 0x34 */
-  __I  uint32_t ESR2;                              /**< Error and Status 2 Register, offset: 0x38 */
-       uint8_t RESERVED_1[8];
-  __I  uint32_t CRCR;                              /**< CRC Register, offset: 0x44 */
-  __IO uint32_t RXFGMASK;                          /**< Rx FIFO Global Mask Register, offset: 0x48 */
-  __I  uint32_t RXFIR;                             /**< Rx FIFO Information Register, offset: 0x4C */
-       uint8_t RESERVED_2[48];
-  struct {                                         /* offset: 0x80, array step: 0x10 */
-    __IO uint32_t CS;                                /**< Message Buffer 0 CS Register..Message Buffer 63 CS Register, array offset: 0x80, array step: 0x10 */
-    __IO uint32_t ID;                                /**< Message Buffer 0 ID Register..Message Buffer 63 ID Register, array offset: 0x84, array step: 0x10 */
-    __IO uint32_t WORD0;                             /**< Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register, array offset: 0x88, array step: 0x10 */
-    __IO uint32_t WORD1;                             /**< Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register, array offset: 0x8C, array step: 0x10 */
-  } MB[64];
-       uint8_t RESERVED_3[1024];
-  __IO uint32_t RXIMR[64];                         /**< Rx Individual Mask Registers, array offset: 0x880, array step: 0x4 */
-       uint8_t RESERVED_4[96];
-  __IO uint32_t GFWR;                              /**< Glitch Filter Width Registers, offset: 0x9E0 */
+typedef struct
+{
+    __IO uint32_t MCR;   /**< Module Configuration Register, offset: 0x0 */
+    __IO uint32_t CTRL1; /**< Control 1 Register, offset: 0x4 */
+    __IO uint32_t TIMER; /**< Free Running Timer Register, offset: 0x8 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t RXMGMASK; /**< Rx Mailboxes Global Mask Register, offset: 0x10 */
+    __IO uint32_t RX14MASK; /**< Rx Buffer 14 Mask Register, offset: 0x14 */
+    __IO uint32_t RX15MASK; /**< Rx Buffer 15 Mask Register, offset: 0x18 */
+    __IO uint32_t ECR;      /**< Error Counter Register, offset: 0x1C */
+    __IO uint32_t ESR1;     /**< Error and Status 1 Register, offset: 0x20 */
+    __IO uint32_t IMASK2;   /**< Interrupt Masks 2 Register, offset: 0x24 */
+    __IO uint32_t IMASK1;   /**< Interrupt Masks 1 Register, offset: 0x28 */
+    __IO uint32_t IFLAG2;   /**< Interrupt Flags 2 Register, offset: 0x2C */
+    __IO uint32_t IFLAG1;   /**< Interrupt Flags 1 Register, offset: 0x30 */
+    __IO uint32_t CTRL2;    /**< Control 2 Register, offset: 0x34 */
+    __I uint32_t ESR2;      /**< Error and Status 2 Register, offset: 0x38 */
+    uint8_t RESERVED_1[8];
+    __I uint32_t CRCR;      /**< CRC Register, offset: 0x44 */
+    __IO uint32_t RXFGMASK; /**< Rx FIFO Global Mask Register, offset: 0x48 */
+    __I uint32_t RXFIR;     /**< Rx FIFO Information Register, offset: 0x4C */
+    uint8_t RESERVED_2[48];
+    struct
+    {                        /* offset: 0x80, array step: 0x10 */
+        __IO uint32_t CS;    /**< Message Buffer 0 CS Register..Message Buffer 63 CS Register, array offset: 0x80, array
+                                step: 0x10 */
+        __IO uint32_t ID;    /**< Message Buffer 0 ID Register..Message Buffer 63 ID Register, array offset: 0x84, array
+                                step: 0x10 */
+        __IO uint32_t WORD0; /**< Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register, array offset: 0x88,
+                                array step: 0x10 */
+        __IO uint32_t WORD1; /**< Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register, array offset: 0x8C,
+                                array step: 0x10 */
+    } MB[64];
+    uint8_t RESERVED_3[1024];
+    __IO uint32_t RXIMR[64]; /**< Rx Individual Mask Registers, array offset: 0x880, array step: 0x4 */
+    uint8_t RESERVED_4[96];
+    __IO uint32_t GFWR; /**< Glitch Filter Width Registers, offset: 0x9E0 */
 } CAN_Type;
 
 /* ----------------------------------------------------------------------------
@@ -2593,445 +2858,476 @@ typedef struct {
 
 /*! @name MCR - Module Configuration Register */
 /*! @{ */
-#define CAN_MCR_MAXMB_MASK                       (0x7FU)
-#define CAN_MCR_MAXMB_SHIFT                      (0U)
-#define CAN_MCR_MAXMB(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)
-#define CAN_MCR_IDAM_MASK                        (0x300U)
-#define CAN_MCR_IDAM_SHIFT                       (8U)
-#define CAN_MCR_IDAM(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)
-#define CAN_MCR_AEN_MASK                         (0x1000U)
-#define CAN_MCR_AEN_SHIFT                        (12U)
-#define CAN_MCR_AEN(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)
-#define CAN_MCR_LPRIOEN_MASK                     (0x2000U)
-#define CAN_MCR_LPRIOEN_SHIFT                    (13U)
-#define CAN_MCR_LPRIOEN(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)
-#define CAN_MCR_IRMQ_MASK                        (0x10000U)
-#define CAN_MCR_IRMQ_SHIFT                       (16U)
-#define CAN_MCR_IRMQ(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)
-#define CAN_MCR_SRXDIS_MASK                      (0x20000U)
-#define CAN_MCR_SRXDIS_SHIFT                     (17U)
-#define CAN_MCR_SRXDIS(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)
-#define CAN_MCR_WAKSRC_MASK                      (0x80000U)
-#define CAN_MCR_WAKSRC_SHIFT                     (19U)
-#define CAN_MCR_WAKSRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)
-#define CAN_MCR_LPMACK_MASK                      (0x100000U)
-#define CAN_MCR_LPMACK_SHIFT                     (20U)
-#define CAN_MCR_LPMACK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)
-#define CAN_MCR_WRNEN_MASK                       (0x200000U)
-#define CAN_MCR_WRNEN_SHIFT                      (21U)
-#define CAN_MCR_WRNEN(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)
-#define CAN_MCR_SLFWAK_MASK                      (0x400000U)
-#define CAN_MCR_SLFWAK_SHIFT                     (22U)
-#define CAN_MCR_SLFWAK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)
-#define CAN_MCR_SUPV_MASK                        (0x800000U)
-#define CAN_MCR_SUPV_SHIFT                       (23U)
-#define CAN_MCR_SUPV(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)
-#define CAN_MCR_FRZACK_MASK                      (0x1000000U)
-#define CAN_MCR_FRZACK_SHIFT                     (24U)
-#define CAN_MCR_FRZACK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)
-#define CAN_MCR_SOFTRST_MASK                     (0x2000000U)
-#define CAN_MCR_SOFTRST_SHIFT                    (25U)
-#define CAN_MCR_SOFTRST(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)
-#define CAN_MCR_WAKMSK_MASK                      (0x4000000U)
-#define CAN_MCR_WAKMSK_SHIFT                     (26U)
-#define CAN_MCR_WAKMSK(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)
-#define CAN_MCR_NOTRDY_MASK                      (0x8000000U)
-#define CAN_MCR_NOTRDY_SHIFT                     (27U)
-#define CAN_MCR_NOTRDY(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)
-#define CAN_MCR_HALT_MASK                        (0x10000000U)
-#define CAN_MCR_HALT_SHIFT                       (28U)
-#define CAN_MCR_HALT(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)
-#define CAN_MCR_RFEN_MASK                        (0x20000000U)
-#define CAN_MCR_RFEN_SHIFT                       (29U)
-#define CAN_MCR_RFEN(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)
-#define CAN_MCR_FRZ_MASK                         (0x40000000U)
-#define CAN_MCR_FRZ_SHIFT                        (30U)
-#define CAN_MCR_FRZ(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)
-#define CAN_MCR_MDIS_MASK                        (0x80000000U)
-#define CAN_MCR_MDIS_SHIFT                       (31U)
-#define CAN_MCR_MDIS(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)
+#define CAN_MCR_MAXMB_MASK    (0x7FU)
+#define CAN_MCR_MAXMB_SHIFT   (0U)
+#define CAN_MCR_MAXMB(x)      (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)
+#define CAN_MCR_IDAM_MASK     (0x300U)
+#define CAN_MCR_IDAM_SHIFT    (8U)
+#define CAN_MCR_IDAM(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)
+#define CAN_MCR_AEN_MASK      (0x1000U)
+#define CAN_MCR_AEN_SHIFT     (12U)
+#define CAN_MCR_AEN(x)        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)
+#define CAN_MCR_LPRIOEN_MASK  (0x2000U)
+#define CAN_MCR_LPRIOEN_SHIFT (13U)
+#define CAN_MCR_LPRIOEN(x)    (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)
+#define CAN_MCR_IRMQ_MASK     (0x10000U)
+#define CAN_MCR_IRMQ_SHIFT    (16U)
+#define CAN_MCR_IRMQ(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)
+#define CAN_MCR_SRXDIS_MASK   (0x20000U)
+#define CAN_MCR_SRXDIS_SHIFT  (17U)
+#define CAN_MCR_SRXDIS(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)
+#define CAN_MCR_WAKSRC_MASK   (0x80000U)
+#define CAN_MCR_WAKSRC_SHIFT  (19U)
+#define CAN_MCR_WAKSRC(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)
+#define CAN_MCR_LPMACK_MASK   (0x100000U)
+#define CAN_MCR_LPMACK_SHIFT  (20U)
+#define CAN_MCR_LPMACK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)
+#define CAN_MCR_WRNEN_MASK    (0x200000U)
+#define CAN_MCR_WRNEN_SHIFT   (21U)
+#define CAN_MCR_WRNEN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)
+#define CAN_MCR_SLFWAK_MASK   (0x400000U)
+#define CAN_MCR_SLFWAK_SHIFT  (22U)
+#define CAN_MCR_SLFWAK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)
+#define CAN_MCR_SUPV_MASK     (0x800000U)
+#define CAN_MCR_SUPV_SHIFT    (23U)
+#define CAN_MCR_SUPV(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)
+#define CAN_MCR_FRZACK_MASK   (0x1000000U)
+#define CAN_MCR_FRZACK_SHIFT  (24U)
+#define CAN_MCR_FRZACK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)
+#define CAN_MCR_SOFTRST_MASK  (0x2000000U)
+#define CAN_MCR_SOFTRST_SHIFT (25U)
+#define CAN_MCR_SOFTRST(x)    (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)
+#define CAN_MCR_WAKMSK_MASK   (0x4000000U)
+#define CAN_MCR_WAKMSK_SHIFT  (26U)
+#define CAN_MCR_WAKMSK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)
+#define CAN_MCR_NOTRDY_MASK   (0x8000000U)
+#define CAN_MCR_NOTRDY_SHIFT  (27U)
+#define CAN_MCR_NOTRDY(x)     (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)
+#define CAN_MCR_HALT_MASK     (0x10000000U)
+#define CAN_MCR_HALT_SHIFT    (28U)
+#define CAN_MCR_HALT(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)
+#define CAN_MCR_RFEN_MASK     (0x20000000U)
+#define CAN_MCR_RFEN_SHIFT    (29U)
+#define CAN_MCR_RFEN(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)
+#define CAN_MCR_FRZ_MASK      (0x40000000U)
+#define CAN_MCR_FRZ_SHIFT     (30U)
+#define CAN_MCR_FRZ(x)        (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)
+#define CAN_MCR_MDIS_MASK     (0x80000000U)
+#define CAN_MCR_MDIS_SHIFT    (31U)
+#define CAN_MCR_MDIS(x)       (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)
 /*! @} */
 
 /*! @name CTRL1 - Control 1 Register */
 /*! @{ */
-#define CAN_CTRL1_PROPSEG_MASK                   (0x7U)
-#define CAN_CTRL1_PROPSEG_SHIFT                  (0U)
-#define CAN_CTRL1_PROPSEG(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
-#define CAN_CTRL1_LOM_MASK                       (0x8U)
-#define CAN_CTRL1_LOM_SHIFT                      (3U)
-#define CAN_CTRL1_LOM(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)
-#define CAN_CTRL1_LBUF_MASK                      (0x10U)
-#define CAN_CTRL1_LBUF_SHIFT                     (4U)
-#define CAN_CTRL1_LBUF(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)
-#define CAN_CTRL1_TSYN_MASK                      (0x20U)
-#define CAN_CTRL1_TSYN_SHIFT                     (5U)
-#define CAN_CTRL1_TSYN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)
-#define CAN_CTRL1_BOFFREC_MASK                   (0x40U)
-#define CAN_CTRL1_BOFFREC_SHIFT                  (6U)
-#define CAN_CTRL1_BOFFREC(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)
-#define CAN_CTRL1_SMP_MASK                       (0x80U)
-#define CAN_CTRL1_SMP_SHIFT                      (7U)
-#define CAN_CTRL1_SMP(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)
-#define CAN_CTRL1_RWRNMSK_MASK                   (0x400U)
-#define CAN_CTRL1_RWRNMSK_SHIFT                  (10U)
-#define CAN_CTRL1_RWRNMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)
-#define CAN_CTRL1_TWRNMSK_MASK                   (0x800U)
-#define CAN_CTRL1_TWRNMSK_SHIFT                  (11U)
-#define CAN_CTRL1_TWRNMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)
-#define CAN_CTRL1_LPB_MASK                       (0x1000U)
-#define CAN_CTRL1_LPB_SHIFT                      (12U)
-#define CAN_CTRL1_LPB(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)
-#define CAN_CTRL1_ERRMSK_MASK                    (0x4000U)
-#define CAN_CTRL1_ERRMSK_SHIFT                   (14U)
-#define CAN_CTRL1_ERRMSK(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)
-#define CAN_CTRL1_BOFFMSK_MASK                   (0x8000U)
-#define CAN_CTRL1_BOFFMSK_SHIFT                  (15U)
-#define CAN_CTRL1_BOFFMSK(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)
-#define CAN_CTRL1_PSEG2_MASK                     (0x70000U)
-#define CAN_CTRL1_PSEG2_SHIFT                    (16U)
-#define CAN_CTRL1_PSEG2(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)
-#define CAN_CTRL1_PSEG1_MASK                     (0x380000U)
-#define CAN_CTRL1_PSEG1_SHIFT                    (19U)
-#define CAN_CTRL1_PSEG1(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)
-#define CAN_CTRL1_RJW_MASK                       (0xC00000U)
-#define CAN_CTRL1_RJW_SHIFT                      (22U)
-#define CAN_CTRL1_RJW(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)
-#define CAN_CTRL1_PRESDIV_MASK                   (0xFF000000U)
-#define CAN_CTRL1_PRESDIV_SHIFT                  (24U)
-#define CAN_CTRL1_PRESDIV(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)
+#define CAN_CTRL1_PROPSEG_MASK  (0x7U)
+#define CAN_CTRL1_PROPSEG_SHIFT (0U)
+#define CAN_CTRL1_PROPSEG(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
+#define CAN_CTRL1_LOM_MASK      (0x8U)
+#define CAN_CTRL1_LOM_SHIFT     (3U)
+#define CAN_CTRL1_LOM(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)
+#define CAN_CTRL1_LBUF_MASK     (0x10U)
+#define CAN_CTRL1_LBUF_SHIFT    (4U)
+#define CAN_CTRL1_LBUF(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)
+#define CAN_CTRL1_TSYN_MASK     (0x20U)
+#define CAN_CTRL1_TSYN_SHIFT    (5U)
+#define CAN_CTRL1_TSYN(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)
+#define CAN_CTRL1_BOFFREC_MASK  (0x40U)
+#define CAN_CTRL1_BOFFREC_SHIFT (6U)
+#define CAN_CTRL1_BOFFREC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)
+#define CAN_CTRL1_SMP_MASK      (0x80U)
+#define CAN_CTRL1_SMP_SHIFT     (7U)
+#define CAN_CTRL1_SMP(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)
+#define CAN_CTRL1_RWRNMSK_MASK  (0x400U)
+#define CAN_CTRL1_RWRNMSK_SHIFT (10U)
+#define CAN_CTRL1_RWRNMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)
+#define CAN_CTRL1_TWRNMSK_MASK  (0x800U)
+#define CAN_CTRL1_TWRNMSK_SHIFT (11U)
+#define CAN_CTRL1_TWRNMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)
+#define CAN_CTRL1_LPB_MASK      (0x1000U)
+#define CAN_CTRL1_LPB_SHIFT     (12U)
+#define CAN_CTRL1_LPB(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)
+#define CAN_CTRL1_ERRMSK_MASK   (0x4000U)
+#define CAN_CTRL1_ERRMSK_SHIFT  (14U)
+#define CAN_CTRL1_ERRMSK(x)     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)
+#define CAN_CTRL1_BOFFMSK_MASK  (0x8000U)
+#define CAN_CTRL1_BOFFMSK_SHIFT (15U)
+#define CAN_CTRL1_BOFFMSK(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)
+#define CAN_CTRL1_PSEG2_MASK    (0x70000U)
+#define CAN_CTRL1_PSEG2_SHIFT   (16U)
+#define CAN_CTRL1_PSEG2(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)
+#define CAN_CTRL1_PSEG1_MASK    (0x380000U)
+#define CAN_CTRL1_PSEG1_SHIFT   (19U)
+#define CAN_CTRL1_PSEG1(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)
+#define CAN_CTRL1_RJW_MASK      (0xC00000U)
+#define CAN_CTRL1_RJW_SHIFT     (22U)
+#define CAN_CTRL1_RJW(x)        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)
+#define CAN_CTRL1_PRESDIV_MASK  (0xFF000000U)
+#define CAN_CTRL1_PRESDIV_SHIFT (24U)
+#define CAN_CTRL1_PRESDIV(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)
 /*! @} */
 
 /*! @name TIMER - Free Running Timer Register */
 /*! @{ */
-#define CAN_TIMER_TIMER_MASK                     (0xFFFFU)
-#define CAN_TIMER_TIMER_SHIFT                    (0U)
-#define CAN_TIMER_TIMER(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)
+#define CAN_TIMER_TIMER_MASK  (0xFFFFU)
+#define CAN_TIMER_TIMER_SHIFT (0U)
+#define CAN_TIMER_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)
 /*! @} */
 
 /*! @name RXMGMASK - Rx Mailboxes Global Mask Register */
 /*! @{ */
-#define CAN_RXMGMASK_MG_MASK                     (0xFFFFFFFFU)
-#define CAN_RXMGMASK_MG_SHIFT                    (0U)
-#define CAN_RXMGMASK_MG(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)
+#define CAN_RXMGMASK_MG_MASK  (0xFFFFFFFFU)
+#define CAN_RXMGMASK_MG_SHIFT (0U)
+#define CAN_RXMGMASK_MG(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)
 /*! @} */
 
 /*! @name RX14MASK - Rx Buffer 14 Mask Register */
 /*! @{ */
-#define CAN_RX14MASK_RX14M_MASK                  (0xFFFFFFFFU)
-#define CAN_RX14MASK_RX14M_SHIFT                 (0U)
-#define CAN_RX14MASK_RX14M(x)                    (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)
+#define CAN_RX14MASK_RX14M_MASK  (0xFFFFFFFFU)
+#define CAN_RX14MASK_RX14M_SHIFT (0U)
+#define CAN_RX14MASK_RX14M(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)
 /*! @} */
 
 /*! @name RX15MASK - Rx Buffer 15 Mask Register */
 /*! @{ */
-#define CAN_RX15MASK_RX15M_MASK                  (0xFFFFFFFFU)
-#define CAN_RX15MASK_RX15M_SHIFT                 (0U)
-#define CAN_RX15MASK_RX15M(x)                    (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)
+#define CAN_RX15MASK_RX15M_MASK  (0xFFFFFFFFU)
+#define CAN_RX15MASK_RX15M_SHIFT (0U)
+#define CAN_RX15MASK_RX15M(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)
 /*! @} */
 
 /*! @name ECR - Error Counter Register */
 /*! @{ */
-#define CAN_ECR_TX_ERR_COUNTER_MASK              (0xFFU)
-#define CAN_ECR_TX_ERR_COUNTER_SHIFT             (0U)
-#define CAN_ECR_TX_ERR_COUNTER(x)                (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)
-#define CAN_ECR_RX_ERR_COUNTER_MASK              (0xFF00U)
-#define CAN_ECR_RX_ERR_COUNTER_SHIFT             (8U)
-#define CAN_ECR_RX_ERR_COUNTER(x)                (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)
+#define CAN_ECR_TX_ERR_COUNTER_MASK  (0xFFU)
+#define CAN_ECR_TX_ERR_COUNTER_SHIFT (0U)
+#define CAN_ECR_TX_ERR_COUNTER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)
+#define CAN_ECR_RX_ERR_COUNTER_MASK  (0xFF00U)
+#define CAN_ECR_RX_ERR_COUNTER_SHIFT (8U)
+#define CAN_ECR_RX_ERR_COUNTER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)
 /*! @} */
 
 /*! @name ESR1 - Error and Status 1 Register */
 /*! @{ */
-#define CAN_ESR1_WAKINT_MASK                     (0x1U)
-#define CAN_ESR1_WAKINT_SHIFT                    (0U)
-#define CAN_ESR1_WAKINT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)
-#define CAN_ESR1_ERRINT_MASK                     (0x2U)
-#define CAN_ESR1_ERRINT_SHIFT                    (1U)
-#define CAN_ESR1_ERRINT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)
-#define CAN_ESR1_BOFFINT_MASK                    (0x4U)
-#define CAN_ESR1_BOFFINT_SHIFT                   (2U)
-#define CAN_ESR1_BOFFINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)
-#define CAN_ESR1_RX_MASK                         (0x8U)
-#define CAN_ESR1_RX_SHIFT                        (3U)
-#define CAN_ESR1_RX(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)
-#define CAN_ESR1_FLTCONF_MASK                    (0x30U)
-#define CAN_ESR1_FLTCONF_SHIFT                   (4U)
-#define CAN_ESR1_FLTCONF(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)
-#define CAN_ESR1_TX_MASK                         (0x40U)
-#define CAN_ESR1_TX_SHIFT                        (6U)
-#define CAN_ESR1_TX(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)
-#define CAN_ESR1_IDLE_MASK                       (0x80U)
-#define CAN_ESR1_IDLE_SHIFT                      (7U)
-#define CAN_ESR1_IDLE(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)
-#define CAN_ESR1_RXWRN_MASK                      (0x100U)
-#define CAN_ESR1_RXWRN_SHIFT                     (8U)
-#define CAN_ESR1_RXWRN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)
-#define CAN_ESR1_TXWRN_MASK                      (0x200U)
-#define CAN_ESR1_TXWRN_SHIFT                     (9U)
-#define CAN_ESR1_TXWRN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)
-#define CAN_ESR1_STFERR_MASK                     (0x400U)
-#define CAN_ESR1_STFERR_SHIFT                    (10U)
-#define CAN_ESR1_STFERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)
-#define CAN_ESR1_FRMERR_MASK                     (0x800U)
-#define CAN_ESR1_FRMERR_SHIFT                    (11U)
-#define CAN_ESR1_FRMERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
-#define CAN_ESR1_CRCERR_MASK                     (0x1000U)
-#define CAN_ESR1_CRCERR_SHIFT                    (12U)
-#define CAN_ESR1_CRCERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)
-#define CAN_ESR1_ACKERR_MASK                     (0x2000U)
-#define CAN_ESR1_ACKERR_SHIFT                    (13U)
-#define CAN_ESR1_ACKERR(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)
-#define CAN_ESR1_BIT0ERR_MASK                    (0x4000U)
-#define CAN_ESR1_BIT0ERR_SHIFT                   (14U)
-#define CAN_ESR1_BIT0ERR(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)
-#define CAN_ESR1_BIT1ERR_MASK                    (0x8000U)
-#define CAN_ESR1_BIT1ERR_SHIFT                   (15U)
-#define CAN_ESR1_BIT1ERR(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)
-#define CAN_ESR1_RWRNINT_MASK                    (0x10000U)
-#define CAN_ESR1_RWRNINT_SHIFT                   (16U)
-#define CAN_ESR1_RWRNINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)
-#define CAN_ESR1_TWRNINT_MASK                    (0x20000U)
-#define CAN_ESR1_TWRNINT_SHIFT                   (17U)
-#define CAN_ESR1_TWRNINT(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)
-#define CAN_ESR1_SYNCH_MASK                      (0x40000U)
-#define CAN_ESR1_SYNCH_SHIFT                     (18U)
-#define CAN_ESR1_SYNCH(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)
+#define CAN_ESR1_WAKINT_MASK   (0x1U)
+#define CAN_ESR1_WAKINT_SHIFT  (0U)
+#define CAN_ESR1_WAKINT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)
+#define CAN_ESR1_ERRINT_MASK   (0x2U)
+#define CAN_ESR1_ERRINT_SHIFT  (1U)
+#define CAN_ESR1_ERRINT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)
+#define CAN_ESR1_BOFFINT_MASK  (0x4U)
+#define CAN_ESR1_BOFFINT_SHIFT (2U)
+#define CAN_ESR1_BOFFINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)
+#define CAN_ESR1_RX_MASK       (0x8U)
+#define CAN_ESR1_RX_SHIFT      (3U)
+#define CAN_ESR1_RX(x)         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)
+#define CAN_ESR1_FLTCONF_MASK  (0x30U)
+#define CAN_ESR1_FLTCONF_SHIFT (4U)
+#define CAN_ESR1_FLTCONF(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)
+#define CAN_ESR1_TX_MASK       (0x40U)
+#define CAN_ESR1_TX_SHIFT      (6U)
+#define CAN_ESR1_TX(x)         (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)
+#define CAN_ESR1_IDLE_MASK     (0x80U)
+#define CAN_ESR1_IDLE_SHIFT    (7U)
+#define CAN_ESR1_IDLE(x)       (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)
+#define CAN_ESR1_RXWRN_MASK    (0x100U)
+#define CAN_ESR1_RXWRN_SHIFT   (8U)
+#define CAN_ESR1_RXWRN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)
+#define CAN_ESR1_TXWRN_MASK    (0x200U)
+#define CAN_ESR1_TXWRN_SHIFT   (9U)
+#define CAN_ESR1_TXWRN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)
+#define CAN_ESR1_STFERR_MASK   (0x400U)
+#define CAN_ESR1_STFERR_SHIFT  (10U)
+#define CAN_ESR1_STFERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)
+#define CAN_ESR1_FRMERR_MASK   (0x800U)
+#define CAN_ESR1_FRMERR_SHIFT  (11U)
+#define CAN_ESR1_FRMERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
+#define CAN_ESR1_CRCERR_MASK   (0x1000U)
+#define CAN_ESR1_CRCERR_SHIFT  (12U)
+#define CAN_ESR1_CRCERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)
+#define CAN_ESR1_ACKERR_MASK   (0x2000U)
+#define CAN_ESR1_ACKERR_SHIFT  (13U)
+#define CAN_ESR1_ACKERR(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)
+#define CAN_ESR1_BIT0ERR_MASK  (0x4000U)
+#define CAN_ESR1_BIT0ERR_SHIFT (14U)
+#define CAN_ESR1_BIT0ERR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)
+#define CAN_ESR1_BIT1ERR_MASK  (0x8000U)
+#define CAN_ESR1_BIT1ERR_SHIFT (15U)
+#define CAN_ESR1_BIT1ERR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)
+#define CAN_ESR1_RWRNINT_MASK  (0x10000U)
+#define CAN_ESR1_RWRNINT_SHIFT (16U)
+#define CAN_ESR1_RWRNINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)
+#define CAN_ESR1_TWRNINT_MASK  (0x20000U)
+#define CAN_ESR1_TWRNINT_SHIFT (17U)
+#define CAN_ESR1_TWRNINT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)
+#define CAN_ESR1_SYNCH_MASK    (0x40000U)
+#define CAN_ESR1_SYNCH_SHIFT   (18U)
+#define CAN_ESR1_SYNCH(x)      (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)
 /*! @} */
 
 /*! @name IMASK2 - Interrupt Masks 2 Register */
 /*! @{ */
-#define CAN_IMASK2_BUFHM_MASK                    (0xFFFFFFFFU)
-#define CAN_IMASK2_BUFHM_SHIFT                   (0U)
-#define CAN_IMASK2_BUFHM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)
+#define CAN_IMASK2_BUFHM_MASK  (0xFFFFFFFFU)
+#define CAN_IMASK2_BUFHM_SHIFT (0U)
+#define CAN_IMASK2_BUFHM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)
 /*! @} */
 
 /*! @name IMASK1 - Interrupt Masks 1 Register */
 /*! @{ */
-#define CAN_IMASK1_BUFLM_MASK                    (0xFFFFFFFFU)
-#define CAN_IMASK1_BUFLM_SHIFT                   (0U)
-#define CAN_IMASK1_BUFLM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)
+#define CAN_IMASK1_BUFLM_MASK  (0xFFFFFFFFU)
+#define CAN_IMASK1_BUFLM_SHIFT (0U)
+#define CAN_IMASK1_BUFLM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)
 /*! @} */
 
 /*! @name IFLAG2 - Interrupt Flags 2 Register */
 /*! @{ */
-#define CAN_IFLAG2_BUFHI_MASK                    (0xFFFFFFFFU)
-#define CAN_IFLAG2_BUFHI_SHIFT                   (0U)
-#define CAN_IFLAG2_BUFHI(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)
+#define CAN_IFLAG2_BUFHI_MASK  (0xFFFFFFFFU)
+#define CAN_IFLAG2_BUFHI_SHIFT (0U)
+#define CAN_IFLAG2_BUFHI(x)    (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)
 /*! @} */
 
 /*! @name IFLAG1 - Interrupt Flags 1 Register */
 /*! @{ */
-#define CAN_IFLAG1_BUF4TO0I_MASK                 (0x1FU)
-#define CAN_IFLAG1_BUF4TO0I_SHIFT                (0U)
-#define CAN_IFLAG1_BUF4TO0I(x)                   (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)
-#define CAN_IFLAG1_BUF5I_MASK                    (0x20U)
-#define CAN_IFLAG1_BUF5I_SHIFT                   (5U)
-#define CAN_IFLAG1_BUF5I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)
-#define CAN_IFLAG1_BUF6I_MASK                    (0x40U)
-#define CAN_IFLAG1_BUF6I_SHIFT                   (6U)
-#define CAN_IFLAG1_BUF6I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)
-#define CAN_IFLAG1_BUF7I_MASK                    (0x80U)
-#define CAN_IFLAG1_BUF7I_SHIFT                   (7U)
-#define CAN_IFLAG1_BUF7I(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)
-#define CAN_IFLAG1_BUF31TO8I_MASK                (0xFFFFFF00U)
-#define CAN_IFLAG1_BUF31TO8I_SHIFT               (8U)
-#define CAN_IFLAG1_BUF31TO8I(x)                  (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)
+#define CAN_IFLAG1_BUF4TO0I_MASK   (0x1FU)
+#define CAN_IFLAG1_BUF4TO0I_SHIFT  (0U)
+#define CAN_IFLAG1_BUF4TO0I(x)     (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)
+#define CAN_IFLAG1_BUF5I_MASK      (0x20U)
+#define CAN_IFLAG1_BUF5I_SHIFT     (5U)
+#define CAN_IFLAG1_BUF5I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)
+#define CAN_IFLAG1_BUF6I_MASK      (0x40U)
+#define CAN_IFLAG1_BUF6I_SHIFT     (6U)
+#define CAN_IFLAG1_BUF6I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)
+#define CAN_IFLAG1_BUF7I_MASK      (0x80U)
+#define CAN_IFLAG1_BUF7I_SHIFT     (7U)
+#define CAN_IFLAG1_BUF7I(x)        (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)
+#define CAN_IFLAG1_BUF31TO8I_MASK  (0xFFFFFF00U)
+#define CAN_IFLAG1_BUF31TO8I_SHIFT (8U)
+#define CAN_IFLAG1_BUF31TO8I(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)
 /*! @} */
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define CAN_CTRL2_EACEN_MASK                     (0x10000U)
-#define CAN_CTRL2_EACEN_SHIFT                    (16U)
-#define CAN_CTRL2_EACEN(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)
-#define CAN_CTRL2_RRS_MASK                       (0x20000U)
-#define CAN_CTRL2_RRS_SHIFT                      (17U)
-#define CAN_CTRL2_RRS(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)
-#define CAN_CTRL2_MRP_MASK                       (0x40000U)
-#define CAN_CTRL2_MRP_SHIFT                      (18U)
-#define CAN_CTRL2_MRP(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
-#define CAN_CTRL2_TASD_MASK                      (0xF80000U)
-#define CAN_CTRL2_TASD_SHIFT                     (19U)
-#define CAN_CTRL2_TASD(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)
-#define CAN_CTRL2_RFFN_MASK                      (0xF000000U)
-#define CAN_CTRL2_RFFN_SHIFT                     (24U)
-#define CAN_CTRL2_RFFN(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)
-#define CAN_CTRL2_WRMFRZ_MASK                    (0x10000000U)
-#define CAN_CTRL2_WRMFRZ_SHIFT                   (28U)
-#define CAN_CTRL2_WRMFRZ(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)
+#define CAN_CTRL2_EACEN_MASK   (0x10000U)
+#define CAN_CTRL2_EACEN_SHIFT  (16U)
+#define CAN_CTRL2_EACEN(x)     (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)
+#define CAN_CTRL2_RRS_MASK     (0x20000U)
+#define CAN_CTRL2_RRS_SHIFT    (17U)
+#define CAN_CTRL2_RRS(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)
+#define CAN_CTRL2_MRP_MASK     (0x40000U)
+#define CAN_CTRL2_MRP_SHIFT    (18U)
+#define CAN_CTRL2_MRP(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
+#define CAN_CTRL2_TASD_MASK    (0xF80000U)
+#define CAN_CTRL2_TASD_SHIFT   (19U)
+#define CAN_CTRL2_TASD(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)
+#define CAN_CTRL2_RFFN_MASK    (0xF000000U)
+#define CAN_CTRL2_RFFN_SHIFT   (24U)
+#define CAN_CTRL2_RFFN(x)      (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)
+#define CAN_CTRL2_WRMFRZ_MASK  (0x10000000U)
+#define CAN_CTRL2_WRMFRZ_SHIFT (28U)
+#define CAN_CTRL2_WRMFRZ(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)
 /*! @} */
 
 /*! @name ESR2 - Error and Status 2 Register */
 /*! @{ */
-#define CAN_ESR2_IMB_MASK                        (0x2000U)
-#define CAN_ESR2_IMB_SHIFT                       (13U)
-#define CAN_ESR2_IMB(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)
-#define CAN_ESR2_VPS_MASK                        (0x4000U)
-#define CAN_ESR2_VPS_SHIFT                       (14U)
-#define CAN_ESR2_VPS(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
-#define CAN_ESR2_LPTM_MASK                       (0x7F0000U)
-#define CAN_ESR2_LPTM_SHIFT                      (16U)
-#define CAN_ESR2_LPTM(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)
+#define CAN_ESR2_IMB_MASK   (0x2000U)
+#define CAN_ESR2_IMB_SHIFT  (13U)
+#define CAN_ESR2_IMB(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)
+#define CAN_ESR2_VPS_MASK   (0x4000U)
+#define CAN_ESR2_VPS_SHIFT  (14U)
+#define CAN_ESR2_VPS(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
+#define CAN_ESR2_LPTM_MASK  (0x7F0000U)
+#define CAN_ESR2_LPTM_SHIFT (16U)
+#define CAN_ESR2_LPTM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)
 /*! @} */
 
 /*! @name CRCR - CRC Register */
 /*! @{ */
-#define CAN_CRCR_TXCRC_MASK                      (0x7FFFU)
-#define CAN_CRCR_TXCRC_SHIFT                     (0U)
-#define CAN_CRCR_TXCRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)
-#define CAN_CRCR_MBCRC_MASK                      (0x7F0000U)
-#define CAN_CRCR_MBCRC_SHIFT                     (16U)
-#define CAN_CRCR_MBCRC(x)                        (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)
+#define CAN_CRCR_TXCRC_MASK  (0x7FFFU)
+#define CAN_CRCR_TXCRC_SHIFT (0U)
+#define CAN_CRCR_TXCRC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)
+#define CAN_CRCR_MBCRC_MASK  (0x7F0000U)
+#define CAN_CRCR_MBCRC_SHIFT (16U)
+#define CAN_CRCR_MBCRC(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)
 /*! @} */
 
 /*! @name RXFGMASK - Rx FIFO Global Mask Register */
 /*! @{ */
-#define CAN_RXFGMASK_FGM_MASK                    (0xFFFFFFFFU)
-#define CAN_RXFGMASK_FGM_SHIFT                   (0U)
-#define CAN_RXFGMASK_FGM(x)                      (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)
+#define CAN_RXFGMASK_FGM_MASK  (0xFFFFFFFFU)
+#define CAN_RXFGMASK_FGM_SHIFT (0U)
+#define CAN_RXFGMASK_FGM(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)
 /*! @} */
 
 /*! @name RXFIR - Rx FIFO Information Register */
 /*! @{ */
-#define CAN_RXFIR_IDHIT_MASK                     (0x1FFU)
-#define CAN_RXFIR_IDHIT_SHIFT                    (0U)
-#define CAN_RXFIR_IDHIT(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)
+#define CAN_RXFIR_IDHIT_MASK  (0x1FFU)
+#define CAN_RXFIR_IDHIT_SHIFT (0U)
+#define CAN_RXFIR_IDHIT(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)
 /*! @} */
 
 /*! @name CS - Message Buffer 0 CS Register..Message Buffer 63 CS Register */
 /*! @{ */
-#define CAN_CS_TIME_STAMP_MASK                   (0xFFFFU)
-#define CAN_CS_TIME_STAMP_SHIFT                  (0U)
-#define CAN_CS_TIME_STAMP(x)                     (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)
-#define CAN_CS_DLC_MASK                          (0xF0000U)
-#define CAN_CS_DLC_SHIFT                         (16U)
-#define CAN_CS_DLC(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)
-#define CAN_CS_RTR_MASK                          (0x100000U)
-#define CAN_CS_RTR_SHIFT                         (20U)
-#define CAN_CS_RTR(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)
-#define CAN_CS_IDE_MASK                          (0x200000U)
-#define CAN_CS_IDE_SHIFT                         (21U)
-#define CAN_CS_IDE(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)
-#define CAN_CS_SRR_MASK                          (0x400000U)
-#define CAN_CS_SRR_SHIFT                         (22U)
-#define CAN_CS_SRR(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)
-#define CAN_CS_CODE_MASK                         (0xF000000U)
-#define CAN_CS_CODE_SHIFT                        (24U)
-#define CAN_CS_CODE(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)
+#define CAN_CS_TIME_STAMP_MASK  (0xFFFFU)
+#define CAN_CS_TIME_STAMP_SHIFT (0U)
+#define CAN_CS_TIME_STAMP(x)    (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)
+#define CAN_CS_DLC_MASK         (0xF0000U)
+#define CAN_CS_DLC_SHIFT        (16U)
+#define CAN_CS_DLC(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)
+#define CAN_CS_RTR_MASK         (0x100000U)
+#define CAN_CS_RTR_SHIFT        (20U)
+#define CAN_CS_RTR(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)
+#define CAN_CS_IDE_MASK         (0x200000U)
+#define CAN_CS_IDE_SHIFT        (21U)
+#define CAN_CS_IDE(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)
+#define CAN_CS_SRR_MASK         (0x400000U)
+#define CAN_CS_SRR_SHIFT        (22U)
+#define CAN_CS_SRR(x)           (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)
+#define CAN_CS_CODE_MASK        (0xF000000U)
+#define CAN_CS_CODE_SHIFT       (24U)
+#define CAN_CS_CODE(x)          (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)
 /*! @} */
 
 /* The count of CAN_CS */
-#define CAN_CS_COUNT                             (64U)
+#define CAN_CS_COUNT (64U)
 
 /*! @name ID - Message Buffer 0 ID Register..Message Buffer 63 ID Register */
 /*! @{ */
-#define CAN_ID_EXT_MASK                          (0x3FFFFU)
-#define CAN_ID_EXT_SHIFT                         (0U)
-#define CAN_ID_EXT(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)
-#define CAN_ID_STD_MASK                          (0x1FFC0000U)
-#define CAN_ID_STD_SHIFT                         (18U)
-#define CAN_ID_STD(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
-#define CAN_ID_PRIO_MASK                         (0xE0000000U)
-#define CAN_ID_PRIO_SHIFT                        (29U)
-#define CAN_ID_PRIO(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)
+#define CAN_ID_EXT_MASK   (0x3FFFFU)
+#define CAN_ID_EXT_SHIFT  (0U)
+#define CAN_ID_EXT(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)
+#define CAN_ID_STD_MASK   (0x1FFC0000U)
+#define CAN_ID_STD_SHIFT  (18U)
+#define CAN_ID_STD(x)     (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
+#define CAN_ID_PRIO_MASK  (0xE0000000U)
+#define CAN_ID_PRIO_SHIFT (29U)
+#define CAN_ID_PRIO(x)    (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)
 /*! @} */
 
 /* The count of CAN_ID */
-#define CAN_ID_COUNT                             (64U)
+#define CAN_ID_COUNT (64U)
 
 /*! @name WORD0 - Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register */
 /*! @{ */
-#define CAN_WORD0_DATA_BYTE_3_MASK               (0xFFU)
-#define CAN_WORD0_DATA_BYTE_3_SHIFT              (0U)
-#define CAN_WORD0_DATA_BYTE_3(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)
-#define CAN_WORD0_DATA_BYTE_2_MASK               (0xFF00U)
-#define CAN_WORD0_DATA_BYTE_2_SHIFT              (8U)
-#define CAN_WORD0_DATA_BYTE_2(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)
-#define CAN_WORD0_DATA_BYTE_1_MASK               (0xFF0000U)
-#define CAN_WORD0_DATA_BYTE_1_SHIFT              (16U)
-#define CAN_WORD0_DATA_BYTE_1(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)
-#define CAN_WORD0_DATA_BYTE_0_MASK               (0xFF000000U)
-#define CAN_WORD0_DATA_BYTE_0_SHIFT              (24U)
-#define CAN_WORD0_DATA_BYTE_0(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)
+#define CAN_WORD0_DATA_BYTE_3_MASK  (0xFFU)
+#define CAN_WORD0_DATA_BYTE_3_SHIFT (0U)
+#define CAN_WORD0_DATA_BYTE_3(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)
+#define CAN_WORD0_DATA_BYTE_2_MASK  (0xFF00U)
+#define CAN_WORD0_DATA_BYTE_2_SHIFT (8U)
+#define CAN_WORD0_DATA_BYTE_2(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)
+#define CAN_WORD0_DATA_BYTE_1_MASK  (0xFF0000U)
+#define CAN_WORD0_DATA_BYTE_1_SHIFT (16U)
+#define CAN_WORD0_DATA_BYTE_1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)
+#define CAN_WORD0_DATA_BYTE_0_MASK  (0xFF000000U)
+#define CAN_WORD0_DATA_BYTE_0_SHIFT (24U)
+#define CAN_WORD0_DATA_BYTE_0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)
 /*! @} */
 
 /* The count of CAN_WORD0 */
-#define CAN_WORD0_COUNT                          (64U)
+#define CAN_WORD0_COUNT (64U)
 
 /*! @name WORD1 - Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register */
 /*! @{ */
-#define CAN_WORD1_DATA_BYTE_7_MASK               (0xFFU)
-#define CAN_WORD1_DATA_BYTE_7_SHIFT              (0U)
-#define CAN_WORD1_DATA_BYTE_7(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)
-#define CAN_WORD1_DATA_BYTE_6_MASK               (0xFF00U)
-#define CAN_WORD1_DATA_BYTE_6_SHIFT              (8U)
-#define CAN_WORD1_DATA_BYTE_6(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)
-#define CAN_WORD1_DATA_BYTE_5_MASK               (0xFF0000U)
-#define CAN_WORD1_DATA_BYTE_5_SHIFT              (16U)
-#define CAN_WORD1_DATA_BYTE_5(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)
-#define CAN_WORD1_DATA_BYTE_4_MASK               (0xFF000000U)
-#define CAN_WORD1_DATA_BYTE_4_SHIFT              (24U)
-#define CAN_WORD1_DATA_BYTE_4(x)                 (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)
+#define CAN_WORD1_DATA_BYTE_7_MASK  (0xFFU)
+#define CAN_WORD1_DATA_BYTE_7_SHIFT (0U)
+#define CAN_WORD1_DATA_BYTE_7(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)
+#define CAN_WORD1_DATA_BYTE_6_MASK  (0xFF00U)
+#define CAN_WORD1_DATA_BYTE_6_SHIFT (8U)
+#define CAN_WORD1_DATA_BYTE_6(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)
+#define CAN_WORD1_DATA_BYTE_5_MASK  (0xFF0000U)
+#define CAN_WORD1_DATA_BYTE_5_SHIFT (16U)
+#define CAN_WORD1_DATA_BYTE_5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)
+#define CAN_WORD1_DATA_BYTE_4_MASK  (0xFF000000U)
+#define CAN_WORD1_DATA_BYTE_4_SHIFT (24U)
+#define CAN_WORD1_DATA_BYTE_4(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)
 /*! @} */
 
 /* The count of CAN_WORD1 */
-#define CAN_WORD1_COUNT                          (64U)
+#define CAN_WORD1_COUNT (64U)
 
 /*! @name RXIMR - Rx Individual Mask Registers */
 /*! @{ */
-#define CAN_RXIMR_MI_MASK                        (0xFFFFFFFFU)
-#define CAN_RXIMR_MI_SHIFT                       (0U)
-#define CAN_RXIMR_MI(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)
+#define CAN_RXIMR_MI_MASK  (0xFFFFFFFFU)
+#define CAN_RXIMR_MI_SHIFT (0U)
+#define CAN_RXIMR_MI(x)    (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)
 /*! @} */
 
 /* The count of CAN_RXIMR */
-#define CAN_RXIMR_COUNT                          (64U)
+#define CAN_RXIMR_COUNT (64U)
 
 /*! @name GFWR - Glitch Filter Width Registers */
 /*! @{ */
-#define CAN_GFWR_GFWR_MASK                       (0xFFU)
-#define CAN_GFWR_GFWR_SHIFT                      (0U)
-#define CAN_GFWR_GFWR(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)
+#define CAN_GFWR_GFWR_MASK  (0xFFU)
+#define CAN_GFWR_GFWR_SHIFT (0U)
+#define CAN_GFWR_GFWR(x)    (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CAN_Register_Masks */
 
-
 /* CAN - Peripheral instance base addresses */
 /** Peripheral CAN1 base address */
-#define CAN1_BASE                                (0x401D0000u)
+#define CAN1_BASE (0x401D0000u)
 /** Peripheral CAN1 base pointer */
-#define CAN1                                     ((CAN_Type *)CAN1_BASE)
+#define CAN1 ((CAN_Type *)CAN1_BASE)
 /** Peripheral CAN2 base address */
-#define CAN2_BASE                                (0x401D4000u)
+#define CAN2_BASE (0x401D4000u)
 /** Peripheral CAN2 base pointer */
-#define CAN2                                     ((CAN_Type *)CAN2_BASE)
+#define CAN2 ((CAN_Type *)CAN2_BASE)
 /** Array initializer of CAN peripheral base addresses */
-#define CAN_BASE_ADDRS                           { 0u, CAN1_BASE, CAN2_BASE }
+#define CAN_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, CAN1_BASE, CAN2_BASE                                                                                       \
+    }
 /** Array initializer of CAN peripheral base pointers */
-#define CAN_BASE_PTRS                            { (CAN_Type *)0u, CAN1, CAN2 }
+#define CAN_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (CAN_Type *)0u, CAN1, CAN2                                                                                     \
+    }
 /** Interrupt vectors for the CAN peripheral type */
-#define CAN_Rx_Warning_IRQS                      { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Tx_Warning_IRQS                      { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Wake_Up_IRQS                         { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Error_IRQS                           { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_Bus_Off_IRQS                         { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
-#define CAN_ORed_Message_buffer_IRQS             { NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn }
+#define CAN_Rx_Warning_IRQS                                                                                            \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Tx_Warning_IRQS                                                                                            \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Wake_Up_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Error_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_Bus_Off_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
+#define CAN_ORed_Message_buffer_IRQS                                                                                   \
+    {                                                                                                                  \
+        NotAvail_IRQn, CAN1_IRQn, CAN2_IRQn                                                                            \
+    }
 /* Backward compatibility */
-#define CAN_ECR_TXERRCNT_MASK         CAN_ECR_TX_ERR_COUNTER_MASK
-#define CAN_ECR_TXERRCNT_SHIFT        CAN_ECR_TX_ERR_COUNTER_SHIFT
-#define CAN_ECR_TXERRCNT(x)           CAN_ECR_TX_ERR_COUNTER(x)
-#define CAN_ECR_RXERRCNT_MASK         CAN_ECR_RX_ERR_COUNTER_MASK
-#define CAN_ECR_RXERRCNT_SHIFT        CAN_ECR_RX_ERR_COUNTER_SHIFT
-#define CAN_ECR_RXERRCNT(x)           CAN_ECR_RX_ERR_COUNTER(x)
-
+#define CAN_ECR_TXERRCNT_MASK  CAN_ECR_TX_ERR_COUNTER_MASK
+#define CAN_ECR_TXERRCNT_SHIFT CAN_ECR_TX_ERR_COUNTER_SHIFT
+#define CAN_ECR_TXERRCNT(x)    CAN_ECR_TX_ERR_COUNTER(x)
+#define CAN_ECR_RXERRCNT_MASK  CAN_ECR_RX_ERR_COUNTER_MASK
+#define CAN_ECR_RXERRCNT_SHIFT CAN_ECR_RX_ERR_COUNTER_SHIFT
+#define CAN_ECR_RXERRCNT(x)    CAN_ECR_RX_ERR_COUNTER(x)
 
 /*!
  * @}
  */ /* end of group CAN_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CCM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -3042,40 +3338,41 @@ typedef struct {
  */
 
 /** CCM - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CCR;                               /**< CCM Control Register, offset: 0x0 */
-       uint8_t RESERVED_0[4];
-  __I  uint32_t CSR;                               /**< CCM Status Register, offset: 0x8 */
-  __IO uint32_t CCSR;                              /**< CCM Clock Switcher Register, offset: 0xC */
-  __IO uint32_t CACRR;                             /**< CCM Arm Clock Root Register, offset: 0x10 */
-  __IO uint32_t CBCDR;                             /**< CCM Bus Clock Divider Register, offset: 0x14 */
-  __IO uint32_t CBCMR;                             /**< CCM Bus Clock Multiplexer Register, offset: 0x18 */
-  __IO uint32_t CSCMR1;                            /**< CCM Serial Clock Multiplexer Register 1, offset: 0x1C */
-  __IO uint32_t CSCMR2;                            /**< CCM Serial Clock Multiplexer Register 2, offset: 0x20 */
-  __IO uint32_t CSCDR1;                            /**< CCM Serial Clock Divider Register 1, offset: 0x24 */
-  __IO uint32_t CS1CDR;                            /**< CCM Clock Divider Register, offset: 0x28 */
-  __IO uint32_t CS2CDR;                            /**< CCM Clock Divider Register, offset: 0x2C */
-  __IO uint32_t CDCDR;                             /**< CCM D1 Clock Divider Register, offset: 0x30 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t CSCDR2;                            /**< CCM Serial Clock Divider Register 2, offset: 0x38 */
-  __IO uint32_t CSCDR3;                            /**< CCM Serial Clock Divider Register 3, offset: 0x3C */
-       uint8_t RESERVED_2[8];
-  __I  uint32_t CDHIPR;                            /**< CCM Divider Handshake In-Process Register, offset: 0x48 */
-       uint8_t RESERVED_3[8];
-  __IO uint32_t CLPCR;                             /**< CCM Low Power Control Register, offset: 0x54 */
-  __IO uint32_t CISR;                              /**< CCM Interrupt Status Register, offset: 0x58 */
-  __IO uint32_t CIMR;                              /**< CCM Interrupt Mask Register, offset: 0x5C */
-  __IO uint32_t CCOSR;                             /**< CCM Clock Output Source Register, offset: 0x60 */
-  __IO uint32_t CGPR;                              /**< CCM General Purpose Register, offset: 0x64 */
-  __IO uint32_t CCGR0;                             /**< CCM Clock Gating Register 0, offset: 0x68 */
-  __IO uint32_t CCGR1;                             /**< CCM Clock Gating Register 1, offset: 0x6C */
-  __IO uint32_t CCGR2;                             /**< CCM Clock Gating Register 2, offset: 0x70 */
-  __IO uint32_t CCGR3;                             /**< CCM Clock Gating Register 3, offset: 0x74 */
-  __IO uint32_t CCGR4;                             /**< CCM Clock Gating Register 4, offset: 0x78 */
-  __IO uint32_t CCGR5;                             /**< CCM Clock Gating Register 5, offset: 0x7C */
-  __IO uint32_t CCGR6;                             /**< CCM Clock Gating Register 6, offset: 0x80 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t CMEOR;                             /**< CCM Module Enable Overide Register, offset: 0x88 */
+typedef struct
+{
+    __IO uint32_t CCR; /**< CCM Control Register, offset: 0x0 */
+    uint8_t RESERVED_0[4];
+    __I uint32_t CSR;     /**< CCM Status Register, offset: 0x8 */
+    __IO uint32_t CCSR;   /**< CCM Clock Switcher Register, offset: 0xC */
+    __IO uint32_t CACRR;  /**< CCM Arm Clock Root Register, offset: 0x10 */
+    __IO uint32_t CBCDR;  /**< CCM Bus Clock Divider Register, offset: 0x14 */
+    __IO uint32_t CBCMR;  /**< CCM Bus Clock Multiplexer Register, offset: 0x18 */
+    __IO uint32_t CSCMR1; /**< CCM Serial Clock Multiplexer Register 1, offset: 0x1C */
+    __IO uint32_t CSCMR2; /**< CCM Serial Clock Multiplexer Register 2, offset: 0x20 */
+    __IO uint32_t CSCDR1; /**< CCM Serial Clock Divider Register 1, offset: 0x24 */
+    __IO uint32_t CS1CDR; /**< CCM Clock Divider Register, offset: 0x28 */
+    __IO uint32_t CS2CDR; /**< CCM Clock Divider Register, offset: 0x2C */
+    __IO uint32_t CDCDR;  /**< CCM D1 Clock Divider Register, offset: 0x30 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t CSCDR2; /**< CCM Serial Clock Divider Register 2, offset: 0x38 */
+    __IO uint32_t CSCDR3; /**< CCM Serial Clock Divider Register 3, offset: 0x3C */
+    uint8_t RESERVED_2[8];
+    __I uint32_t CDHIPR; /**< CCM Divider Handshake In-Process Register, offset: 0x48 */
+    uint8_t RESERVED_3[8];
+    __IO uint32_t CLPCR; /**< CCM Low Power Control Register, offset: 0x54 */
+    __IO uint32_t CISR;  /**< CCM Interrupt Status Register, offset: 0x58 */
+    __IO uint32_t CIMR;  /**< CCM Interrupt Mask Register, offset: 0x5C */
+    __IO uint32_t CCOSR; /**< CCM Clock Output Source Register, offset: 0x60 */
+    __IO uint32_t CGPR;  /**< CCM General Purpose Register, offset: 0x64 */
+    __IO uint32_t CCGR0; /**< CCM Clock Gating Register 0, offset: 0x68 */
+    __IO uint32_t CCGR1; /**< CCM Clock Gating Register 1, offset: 0x6C */
+    __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */
+    __IO uint32_t CCGR3; /**< CCM Clock Gating Register 3, offset: 0x74 */
+    __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */
+    __IO uint32_t CCGR5; /**< CCM Clock Gating Register 5, offset: 0x7C */
+    __IO uint32_t CCGR6; /**< CCM Clock Gating Register 6, offset: 0x80 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t CMEOR; /**< CCM Module Enable Overide Register, offset: 0x88 */
 } CCM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -3089,799 +3386,892 @@ typedef struct {
 
 /*! @name CCR - CCM Control Register */
 /*! @{ */
-#define CCM_CCR_OSCNT_MASK                       (0xFFU)
-#define CCM_CCR_OSCNT_SHIFT                      (0U)
-#define CCM_CCR_OSCNT(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)
-#define CCM_CCR_COSC_EN_MASK                     (0x1000U)
-#define CCM_CCR_COSC_EN_SHIFT                    (12U)
-#define CCM_CCR_COSC_EN(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)
-#define CCM_CCR_REG_BYPASS_COUNT_MASK            (0x7E00000U)
-#define CCM_CCR_REG_BYPASS_COUNT_SHIFT           (21U)
-#define CCM_CCR_REG_BYPASS_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)
-#define CCM_CCR_RBC_EN_MASK                      (0x8000000U)
-#define CCM_CCR_RBC_EN_SHIFT                     (27U)
-#define CCM_CCR_RBC_EN(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)
+#define CCM_CCR_OSCNT_MASK             (0xFFU)
+#define CCM_CCR_OSCNT_SHIFT            (0U)
+#define CCM_CCR_OSCNT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CCR_OSCNT_SHIFT)) & CCM_CCR_OSCNT_MASK)
+#define CCM_CCR_COSC_EN_MASK           (0x1000U)
+#define CCM_CCR_COSC_EN_SHIFT          (12U)
+#define CCM_CCR_COSC_EN(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CCR_COSC_EN_SHIFT)) & CCM_CCR_COSC_EN_MASK)
+#define CCM_CCR_REG_BYPASS_COUNT_MASK  (0x7E00000U)
+#define CCM_CCR_REG_BYPASS_COUNT_SHIFT (21U)
+#define CCM_CCR_REG_BYPASS_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCR_REG_BYPASS_COUNT_SHIFT)) & CCM_CCR_REG_BYPASS_COUNT_MASK)
+#define CCM_CCR_RBC_EN_MASK  (0x8000000U)
+#define CCM_CCR_RBC_EN_SHIFT (27U)
+#define CCM_CCR_RBC_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCR_RBC_EN_SHIFT)) & CCM_CCR_RBC_EN_MASK)
 /*! @} */
 
 /*! @name CSR - CCM Status Register */
 /*! @{ */
-#define CCM_CSR_REF_EN_B_MASK                    (0x1U)
-#define CCM_CSR_REF_EN_B_SHIFT                   (0U)
-#define CCM_CSR_REF_EN_B(x)                      (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)
-#define CCM_CSR_CAMP2_READY_MASK                 (0x8U)
-#define CCM_CSR_CAMP2_READY_SHIFT                (3U)
-#define CCM_CSR_CAMP2_READY(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)
-#define CCM_CSR_COSC_READY_MASK                  (0x20U)
-#define CCM_CSR_COSC_READY_SHIFT                 (5U)
-#define CCM_CSR_COSC_READY(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)
+#define CCM_CSR_REF_EN_B_MASK     (0x1U)
+#define CCM_CSR_REF_EN_B_SHIFT    (0U)
+#define CCM_CSR_REF_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CSR_REF_EN_B_SHIFT)) & CCM_CSR_REF_EN_B_MASK)
+#define CCM_CSR_CAMP2_READY_MASK  (0x8U)
+#define CCM_CSR_CAMP2_READY_SHIFT (3U)
+#define CCM_CSR_CAMP2_READY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CSR_CAMP2_READY_SHIFT)) & CCM_CSR_CAMP2_READY_MASK)
+#define CCM_CSR_COSC_READY_MASK   (0x20U)
+#define CCM_CSR_COSC_READY_SHIFT  (5U)
+#define CCM_CSR_COSC_READY(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CSR_COSC_READY_SHIFT)) & CCM_CSR_COSC_READY_MASK)
 /*! @} */
 
 /*! @name CCSR - CCM Clock Switcher Register */
 /*! @{ */
-#define CCM_CCSR_PLL3_SW_CLK_SEL_MASK            (0x1U)
-#define CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT           (0U)
-#define CCM_CCSR_PLL3_SW_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)
+#define CCM_CCSR_PLL3_SW_CLK_SEL_MASK  (0x1U)
+#define CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT (0U)
+#define CCM_CCSR_PLL3_SW_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT)) & CCM_CCSR_PLL3_SW_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CACRR - CCM Arm Clock Root Register */
 /*! @{ */
-#define CCM_CACRR_ARM_PODF_MASK                  (0x7U)
-#define CCM_CACRR_ARM_PODF_SHIFT                 (0U)
-#define CCM_CACRR_ARM_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)
+#define CCM_CACRR_ARM_PODF_MASK  (0x7U)
+#define CCM_CACRR_ARM_PODF_SHIFT (0U)
+#define CCM_CACRR_ARM_PODF(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CACRR_ARM_PODF_SHIFT)) & CCM_CACRR_ARM_PODF_MASK)
 /*! @} */
 
 /*! @name CBCDR - CCM Bus Clock Divider Register */
 /*! @{ */
-#define CCM_CBCDR_SEMC_CLK_SEL_MASK              (0x40U)
-#define CCM_CBCDR_SEMC_CLK_SEL_SHIFT             (6U)
-#define CCM_CBCDR_SEMC_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK          (0x80U)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT         (7U)
-#define CCM_CBCDR_SEMC_ALT_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)
-#define CCM_CBCDR_IPG_PODF_MASK                  (0x300U)
-#define CCM_CBCDR_IPG_PODF_SHIFT                 (8U)
-#define CCM_CBCDR_IPG_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)
-#define CCM_CBCDR_AHB_PODF_MASK                  (0x1C00U)
-#define CCM_CBCDR_AHB_PODF_SHIFT                 (10U)
-#define CCM_CBCDR_AHB_PODF(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)
-#define CCM_CBCDR_SEMC_PODF_MASK                 (0x70000U)
-#define CCM_CBCDR_SEMC_PODF_SHIFT                (16U)
-#define CCM_CBCDR_SEMC_PODF(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)
-#define CCM_CBCDR_PERIPH_CLK_SEL_MASK            (0x2000000U)
-#define CCM_CBCDR_PERIPH_CLK_SEL_SHIFT           (25U)
-#define CCM_CBCDR_PERIPH_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
-#define CCM_CBCDR_PERIPH_CLK2_PODF_MASK          (0x38000000U)
-#define CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT         (27U)
-#define CCM_CBCDR_PERIPH_CLK2_PODF(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)
+#define CCM_CBCDR_SEMC_CLK_SEL_MASK  (0x40U)
+#define CCM_CBCDR_SEMC_CLK_SEL_SHIFT (6U)
+#define CCM_CBCDR_SEMC_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_CLK_SEL_MASK)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK  (0x80U)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT (7U)
+#define CCM_CBCDR_SEMC_ALT_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT)) & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)
+#define CCM_CBCDR_IPG_PODF_MASK        (0x300U)
+#define CCM_CBCDR_IPG_PODF_SHIFT       (8U)
+#define CCM_CBCDR_IPG_PODF(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_IPG_PODF_SHIFT)) & CCM_CBCDR_IPG_PODF_MASK)
+#define CCM_CBCDR_AHB_PODF_MASK        (0x1C00U)
+#define CCM_CBCDR_AHB_PODF_SHIFT       (10U)
+#define CCM_CBCDR_AHB_PODF(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_AHB_PODF_SHIFT)) & CCM_CBCDR_AHB_PODF_MASK)
+#define CCM_CBCDR_SEMC_PODF_MASK       (0x70000U)
+#define CCM_CBCDR_SEMC_PODF_SHIFT      (16U)
+#define CCM_CBCDR_SEMC_PODF(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_SEMC_PODF_SHIFT)) & CCM_CBCDR_SEMC_PODF_MASK)
+#define CCM_CBCDR_PERIPH_CLK_SEL_MASK  (0x2000000U)
+#define CCM_CBCDR_PERIPH_CLK_SEL_SHIFT (25U)
+#define CCM_CBCDR_PERIPH_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
+#define CCM_CBCDR_PERIPH_CLK2_PODF_MASK  (0x38000000U)
+#define CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT (27U)
+#define CCM_CBCDR_PERIPH_CLK2_PODF(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT)) & CCM_CBCDR_PERIPH_CLK2_PODF_MASK)
 /*! @} */
 
 /*! @name CBCMR - CCM Bus Clock Multiplexer Register */
 /*! @{ */
-#define CCM_CBCMR_LPSPI_CLK_SEL_MASK             (0x30U)
-#define CCM_CBCMR_LPSPI_CLK_SEL_SHIFT            (4U)
-#define CCM_CBCMR_LPSPI_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)
-#define CCM_CBCMR_PERIPH_CLK2_SEL_MASK           (0x3000U)
-#define CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT          (12U)
-#define CCM_CBCMR_PERIPH_CLK2_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
-#define CCM_CBCMR_TRACE_CLK_SEL_MASK             (0xC000U)
-#define CCM_CBCMR_TRACE_CLK_SEL_SHIFT            (14U)
-#define CCM_CBCMR_TRACE_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK        (0xC0000U)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT       (18U)
-#define CCM_CBCMR_PRE_PERIPH_CLK_SEL(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
-#define CCM_CBCMR_LCDIF_PODF_MASK                (0x3800000U)
-#define CCM_CBCMR_LCDIF_PODF_SHIFT               (23U)
-#define CCM_CBCMR_LCDIF_PODF(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)
-#define CCM_CBCMR_LPSPI_PODF_MASK                (0x1C000000U)
-#define CCM_CBCMR_LPSPI_PODF_SHIFT               (26U)
-#define CCM_CBCMR_LPSPI_PODF(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)
+#define CCM_CBCMR_LPSPI_CLK_SEL_MASK  (0x30U)
+#define CCM_CBCMR_LPSPI_CLK_SEL_SHIFT (4U)
+#define CCM_CBCMR_LPSPI_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_CLK_SEL_SHIFT)) & CCM_CBCMR_LPSPI_CLK_SEL_MASK)
+#define CCM_CBCMR_PERIPH_CLK2_SEL_MASK  (0x3000U)
+#define CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT (12U)
+#define CCM_CBCMR_PERIPH_CLK2_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT)) & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
+#define CCM_CBCMR_TRACE_CLK_SEL_MASK  (0xC000U)
+#define CCM_CBCMR_TRACE_CLK_SEL_SHIFT (14U)
+#define CCM_CBCMR_TRACE_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_TRACE_CLK_SEL_SHIFT)) & CCM_CBCMR_TRACE_CLK_SEL_MASK)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK  (0xC0000U)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT (18U)
+#define CCM_CBCMR_PRE_PERIPH_CLK_SEL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT)) & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
+#define CCM_CBCMR_LCDIF_PODF_MASK  (0x3800000U)
+#define CCM_CBCMR_LCDIF_PODF_SHIFT (23U)
+#define CCM_CBCMR_LCDIF_PODF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LCDIF_PODF_SHIFT)) & CCM_CBCMR_LCDIF_PODF_MASK)
+#define CCM_CBCMR_LPSPI_PODF_MASK  (0x1C000000U)
+#define CCM_CBCMR_LPSPI_PODF_SHIFT (26U)
+#define CCM_CBCMR_LPSPI_PODF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CBCMR_LPSPI_PODF_SHIFT)) & CCM_CBCMR_LPSPI_PODF_MASK)
 /*! @} */
 
 /*! @name CSCMR1 - CCM Serial Clock Multiplexer Register 1 */
 /*! @{ */
-#define CCM_CSCMR1_PERCLK_PODF_MASK              (0x3FU)
-#define CCM_CSCMR1_PERCLK_PODF_SHIFT             (0U)
-#define CCM_CSCMR1_PERCLK_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)
-#define CCM_CSCMR1_PERCLK_CLK_SEL_MASK           (0x40U)
-#define CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT          (6U)
-#define CCM_CSCMR1_PERCLK_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI1_CLK_SEL_MASK             (0xC00U)
-#define CCM_CSCMR1_SAI1_CLK_SEL_SHIFT            (10U)
-#define CCM_CSCMR1_SAI1_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI2_CLK_SEL_MASK             (0x3000U)
-#define CCM_CSCMR1_SAI2_CLK_SEL_SHIFT            (12U)
-#define CCM_CSCMR1_SAI2_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)
-#define CCM_CSCMR1_SAI3_CLK_SEL_MASK             (0xC000U)
-#define CCM_CSCMR1_SAI3_CLK_SEL_SHIFT            (14U)
-#define CCM_CSCMR1_SAI3_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)
-#define CCM_CSCMR1_USDHC1_CLK_SEL_MASK           (0x10000U)
-#define CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT          (16U)
-#define CCM_CSCMR1_USDHC1_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)
-#define CCM_CSCMR1_USDHC2_CLK_SEL_MASK           (0x20000U)
-#define CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT          (17U)
-#define CCM_CSCMR1_USDHC2_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)
-#define CCM_CSCMR1_FLEXSPI_PODF_MASK             (0x3800000U)
-#define CCM_CSCMR1_FLEXSPI_PODF_SHIFT            (23U)
-#define CCM_CSCMR1_FLEXSPI_PODF(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK          (0x60000000U)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT         (29U)
-#define CCM_CSCMR1_FLEXSPI_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)
+#define CCM_CSCMR1_PERCLK_PODF_MASK  (0x3FU)
+#define CCM_CSCMR1_PERCLK_PODF_SHIFT (0U)
+#define CCM_CSCMR1_PERCLK_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_PODF_SHIFT)) & CCM_CSCMR1_PERCLK_PODF_MASK)
+#define CCM_CSCMR1_PERCLK_CLK_SEL_MASK  (0x40U)
+#define CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT (6U)
+#define CCM_CSCMR1_PERCLK_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_PERCLK_CLK_SEL_SHIFT)) & CCM_CSCMR1_PERCLK_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI1_CLK_SEL_MASK  (0xC00U)
+#define CCM_CSCMR1_SAI1_CLK_SEL_SHIFT (10U)
+#define CCM_CSCMR1_SAI1_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI1_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI1_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI2_CLK_SEL_MASK  (0x3000U)
+#define CCM_CSCMR1_SAI2_CLK_SEL_SHIFT (12U)
+#define CCM_CSCMR1_SAI2_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI2_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI2_CLK_SEL_MASK)
+#define CCM_CSCMR1_SAI3_CLK_SEL_MASK  (0xC000U)
+#define CCM_CSCMR1_SAI3_CLK_SEL_SHIFT (14U)
+#define CCM_CSCMR1_SAI3_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_SAI3_CLK_SEL_SHIFT)) & CCM_CSCMR1_SAI3_CLK_SEL_MASK)
+#define CCM_CSCMR1_USDHC1_CLK_SEL_MASK  (0x10000U)
+#define CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT (16U)
+#define CCM_CSCMR1_USDHC1_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC1_CLK_SEL_MASK)
+#define CCM_CSCMR1_USDHC2_CLK_SEL_MASK  (0x20000U)
+#define CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT (17U)
+#define CCM_CSCMR1_USDHC2_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT)) & CCM_CSCMR1_USDHC2_CLK_SEL_MASK)
+#define CCM_CSCMR1_FLEXSPI_PODF_MASK  (0x3800000U)
+#define CCM_CSCMR1_FLEXSPI_PODF_SHIFT (23U)
+#define CCM_CSCMR1_FLEXSPI_PODF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_PODF_SHIFT)) & CCM_CSCMR1_FLEXSPI_PODF_MASK)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK  (0x60000000U)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT (29U)
+#define CCM_CSCMR1_FLEXSPI_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT)) & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CSCMR2 - CCM Serial Clock Multiplexer Register 2 */
 /*! @{ */
-#define CCM_CSCMR2_CAN_CLK_PODF_MASK             (0xFCU)
-#define CCM_CSCMR2_CAN_CLK_PODF_SHIFT            (2U)
-#define CCM_CSCMR2_CAN_CLK_PODF(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)
-#define CCM_CSCMR2_CAN_CLK_SEL_MASK              (0x300U)
-#define CCM_CSCMR2_CAN_CLK_SEL_SHIFT             (8U)
-#define CCM_CSCMR2_CAN_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK          (0x180000U)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT         (19U)
-#define CCM_CSCMR2_FLEXIO2_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)
+#define CCM_CSCMR2_CAN_CLK_PODF_MASK  (0xFCU)
+#define CCM_CSCMR2_CAN_CLK_PODF_SHIFT (2U)
+#define CCM_CSCMR2_CAN_CLK_PODF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_PODF_SHIFT)) & CCM_CSCMR2_CAN_CLK_PODF_MASK)
+#define CCM_CSCMR2_CAN_CLK_SEL_MASK  (0x300U)
+#define CCM_CSCMR2_CAN_CLK_SEL_SHIFT (8U)
+#define CCM_CSCMR2_CAN_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_CAN_CLK_SEL_SHIFT)) & CCM_CSCMR2_CAN_CLK_SEL_MASK)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK  (0x180000U)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT (19U)
+#define CCM_CSCMR2_FLEXIO2_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT)) & CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name CSCDR1 - CCM Serial Clock Divider Register 1 */
 /*! @{ */
-#define CCM_CSCDR1_UART_CLK_PODF_MASK            (0x3FU)
-#define CCM_CSCDR1_UART_CLK_PODF_SHIFT           (0U)
-#define CCM_CSCDR1_UART_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)
-#define CCM_CSCDR1_UART_CLK_SEL_MASK             (0x40U)
-#define CCM_CSCDR1_UART_CLK_SEL_SHIFT            (6U)
-#define CCM_CSCDR1_UART_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)
-#define CCM_CSCDR1_USDHC1_PODF_MASK              (0x3800U)
-#define CCM_CSCDR1_USDHC1_PODF_SHIFT             (11U)
-#define CCM_CSCDR1_USDHC1_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)
-#define CCM_CSCDR1_USDHC2_PODF_MASK              (0x70000U)
-#define CCM_CSCDR1_USDHC2_PODF_SHIFT             (16U)
-#define CCM_CSCDR1_USDHC2_PODF(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)
-#define CCM_CSCDR1_TRACE_PODF_MASK               (0x6000000U)
-#define CCM_CSCDR1_TRACE_PODF_SHIFT              (25U)
-#define CCM_CSCDR1_TRACE_PODF(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)
+#define CCM_CSCDR1_UART_CLK_PODF_MASK  (0x3FU)
+#define CCM_CSCDR1_UART_CLK_PODF_SHIFT (0U)
+#define CCM_CSCDR1_UART_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_PODF_SHIFT)) & CCM_CSCDR1_UART_CLK_PODF_MASK)
+#define CCM_CSCDR1_UART_CLK_SEL_MASK  (0x40U)
+#define CCM_CSCDR1_UART_CLK_SEL_SHIFT (6U)
+#define CCM_CSCDR1_UART_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_UART_CLK_SEL_SHIFT)) & CCM_CSCDR1_UART_CLK_SEL_MASK)
+#define CCM_CSCDR1_USDHC1_PODF_MASK  (0x3800U)
+#define CCM_CSCDR1_USDHC1_PODF_SHIFT (11U)
+#define CCM_CSCDR1_USDHC1_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC1_PODF_SHIFT)) & CCM_CSCDR1_USDHC1_PODF_MASK)
+#define CCM_CSCDR1_USDHC2_PODF_MASK  (0x70000U)
+#define CCM_CSCDR1_USDHC2_PODF_SHIFT (16U)
+#define CCM_CSCDR1_USDHC2_PODF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_USDHC2_PODF_SHIFT)) & CCM_CSCDR1_USDHC2_PODF_MASK)
+#define CCM_CSCDR1_TRACE_PODF_MASK  (0x6000000U)
+#define CCM_CSCDR1_TRACE_PODF_SHIFT (25U)
+#define CCM_CSCDR1_TRACE_PODF(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR1_TRACE_PODF_SHIFT)) & CCM_CSCDR1_TRACE_PODF_MASK)
 /*! @} */
 
 /*! @name CS1CDR - CCM Clock Divider Register */
 /*! @{ */
-#define CCM_CS1CDR_SAI1_CLK_PODF_MASK            (0x3FU)
-#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT           (0U)
-#define CCM_CS1CDR_SAI1_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)
-#define CCM_CS1CDR_SAI1_CLK_PRED_MASK            (0x1C0U)
-#define CCM_CS1CDR_SAI1_CLK_PRED_SHIFT           (6U)
-#define CCM_CS1CDR_SAI1_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK         (0xE00U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT        (9U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PRED(x)           (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)
-#define CCM_CS1CDR_SAI3_CLK_PODF_MASK            (0x3F0000U)
-#define CCM_CS1CDR_SAI3_CLK_PODF_SHIFT           (16U)
-#define CCM_CS1CDR_SAI3_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)
-#define CCM_CS1CDR_SAI3_CLK_PRED_MASK            (0x1C00000U)
-#define CCM_CS1CDR_SAI3_CLK_PRED_SHIFT           (22U)
-#define CCM_CS1CDR_SAI3_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK         (0xE000000U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT        (25U)
-#define CCM_CS1CDR_FLEXIO2_CLK_PODF(x)           (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI1_CLK_PODF_MASK  (0x3FU)
+#define CCM_CS1CDR_SAI1_CLK_PODF_SHIFT (0U)
+#define CCM_CS1CDR_SAI1_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI1_CLK_PRED_MASK  (0x1C0U)
+#define CCM_CS1CDR_SAI1_CLK_PRED_SHIFT (6U)
+#define CCM_CS1CDR_SAI1_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI1_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI1_CLK_PRED_MASK)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK  (0xE00U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT (9U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PRED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK)
+#define CCM_CS1CDR_SAI3_CLK_PODF_MASK  (0x3F0000U)
+#define CCM_CS1CDR_SAI3_CLK_PODF_SHIFT (16U)
+#define CCM_CS1CDR_SAI3_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PODF_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PODF_MASK)
+#define CCM_CS1CDR_SAI3_CLK_PRED_MASK  (0x1C00000U)
+#define CCM_CS1CDR_SAI3_CLK_PRED_SHIFT (22U)
+#define CCM_CS1CDR_SAI3_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_SAI3_CLK_PRED_SHIFT)) & CCM_CS1CDR_SAI3_CLK_PRED_MASK)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK  (0xE000000U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT (25U)
+#define CCM_CS1CDR_FLEXIO2_CLK_PODF(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS1CDR_FLEXIO2_CLK_PODF_SHIFT)) & CCM_CS1CDR_FLEXIO2_CLK_PODF_MASK)
 /*! @} */
 
 /*! @name CS2CDR - CCM Clock Divider Register */
 /*! @{ */
-#define CCM_CS2CDR_SAI2_CLK_PODF_MASK            (0x3FU)
-#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT           (0U)
-#define CCM_CS2CDR_SAI2_CLK_PODF(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)
-#define CCM_CS2CDR_SAI2_CLK_PRED_MASK            (0x1C0U)
-#define CCM_CS2CDR_SAI2_CLK_PRED_SHIFT           (6U)
-#define CCM_CS2CDR_SAI2_CLK_PRED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)
+#define CCM_CS2CDR_SAI2_CLK_PODF_MASK  (0x3FU)
+#define CCM_CS2CDR_SAI2_CLK_PODF_SHIFT (0U)
+#define CCM_CS2CDR_SAI2_CLK_PODF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PODF_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PODF_MASK)
+#define CCM_CS2CDR_SAI2_CLK_PRED_MASK  (0x1C0U)
+#define CCM_CS2CDR_SAI2_CLK_PRED_SHIFT (6U)
+#define CCM_CS2CDR_SAI2_CLK_PRED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CS2CDR_SAI2_CLK_PRED_SHIFT)) & CCM_CS2CDR_SAI2_CLK_PRED_MASK)
 /*! @} */
 
 /*! @name CDCDR - CCM D1 Clock Divider Register */
 /*! @{ */
-#define CCM_CDCDR_FLEXIO1_CLK_SEL_MASK           (0x180U)
-#define CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT          (7U)
-#define CCM_CDCDR_FLEXIO1_CLK_SEL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF_MASK          (0xE00U)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT         (9U)
-#define CCM_CDCDR_FLEXIO1_CLK_PODF(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED_MASK          (0x7000U)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT         (12U)
-#define CCM_CDCDR_FLEXIO1_CLK_PRED(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_SEL_MASK            (0x300000U)
-#define CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT           (20U)
-#define CCM_CDCDR_SPDIF0_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_PODF_MASK           (0x1C00000U)
-#define CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT          (22U)
-#define CCM_CDCDR_SPDIF0_CLK_PODF(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)
-#define CCM_CDCDR_SPDIF0_CLK_PRED_MASK           (0xE000000U)
-#define CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT          (25U)
-#define CCM_CDCDR_SPDIF0_CLK_PRED(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL_MASK  (0x180U)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT (7U)
+#define CCM_CDCDR_FLEXIO1_CLK_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_SEL_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_SEL_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF_MASK  (0xE00U)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT (9U)
+#define CCM_CDCDR_FLEXIO1_CLK_PODF(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PODF_MASK)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED_MASK  (0x7000U)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT (12U)
+#define CCM_CDCDR_FLEXIO1_CLK_PRED(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT)) & CCM_CDCDR_FLEXIO1_CLK_PRED_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_SEL_MASK  (0x300000U)
+#define CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT (20U)
+#define CCM_CDCDR_SPDIF0_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_SEL_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_SEL_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_PODF_MASK  (0x1C00000U)
+#define CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT (22U)
+#define CCM_CDCDR_SPDIF0_CLK_PODF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PODF_MASK)
+#define CCM_CDCDR_SPDIF0_CLK_PRED_MASK  (0xE000000U)
+#define CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT (25U)
+#define CCM_CDCDR_SPDIF0_CLK_PRED(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT)) & CCM_CDCDR_SPDIF0_CLK_PRED_MASK)
 /*! @} */
 
 /*! @name CSCDR2 - CCM Serial Clock Divider Register 2 */
 /*! @{ */
-#define CCM_CSCDR2_LCDIF_PRED_MASK               (0x7000U)
-#define CCM_CSCDR2_LCDIF_PRED_SHIFT              (12U)
-#define CCM_CSCDR2_LCDIF_PRED(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK        (0x38000U)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT       (15U)
-#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)
-#define CCM_CSCDR2_LPI2C_CLK_SEL_MASK            (0x40000U)
-#define CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT           (18U)
-#define CCM_CSCDR2_LPI2C_CLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)
-#define CCM_CSCDR2_LPI2C_CLK_PODF_MASK           (0x1F80000U)
-#define CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT          (19U)
-#define CCM_CSCDR2_LPI2C_CLK_PODF(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)
+#define CCM_CSCDR2_LCDIF_PRED_MASK  (0x7000U)
+#define CCM_CSCDR2_LCDIF_PRED_SHIFT (12U)
+#define CCM_CSCDR2_LCDIF_PRED(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRED_SHIFT)) & CCM_CSCDR2_LCDIF_PRED_MASK)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK  (0x38000U)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT (15U)
+#define CCM_CSCDR2_LCDIF_PRE_CLK_SEL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LCDIF_PRE_CLK_SEL_SHIFT)) & CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK)
+#define CCM_CSCDR2_LPI2C_CLK_SEL_MASK  (0x40000U)
+#define CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT (18U)
+#define CCM_CSCDR2_LPI2C_CLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_SEL_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_SEL_MASK)
+#define CCM_CSCDR2_LPI2C_CLK_PODF_MASK  (0x1F80000U)
+#define CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT (19U)
+#define CCM_CSCDR2_LPI2C_CLK_PODF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT)) & CCM_CSCDR2_LPI2C_CLK_PODF_MASK)
 /*! @} */
 
 /*! @name CSCDR3 - CCM Serial Clock Divider Register 3 */
 /*! @{ */
-#define CCM_CSCDR3_CSI_CLK_SEL_MASK              (0x600U)
-#define CCM_CSCDR3_CSI_CLK_SEL_SHIFT             (9U)
-#define CCM_CSCDR3_CSI_CLK_SEL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)
-#define CCM_CSCDR3_CSI_PODF_MASK                 (0x3800U)
-#define CCM_CSCDR3_CSI_PODF_SHIFT                (11U)
-#define CCM_CSCDR3_CSI_PODF(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)
+#define CCM_CSCDR3_CSI_CLK_SEL_MASK  (0x600U)
+#define CCM_CSCDR3_CSI_CLK_SEL_SHIFT (9U)
+#define CCM_CSCDR3_CSI_CLK_SEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_CLK_SEL_SHIFT)) & CCM_CSCDR3_CSI_CLK_SEL_MASK)
+#define CCM_CSCDR3_CSI_PODF_MASK  (0x3800U)
+#define CCM_CSCDR3_CSI_PODF_SHIFT (11U)
+#define CCM_CSCDR3_CSI_PODF(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CSCDR3_CSI_PODF_SHIFT)) & CCM_CSCDR3_CSI_PODF_MASK)
 /*! @} */
 
 /*! @name CDHIPR - CCM Divider Handshake In-Process Register */
 /*! @{ */
-#define CCM_CDHIPR_SEMC_PODF_BUSY_MASK           (0x1U)
-#define CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT          (0U)
-#define CCM_CDHIPR_SEMC_PODF_BUSY(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)
-#define CCM_CDHIPR_AHB_PODF_BUSY_MASK            (0x2U)
-#define CCM_CDHIPR_AHB_PODF_BUSY_SHIFT           (1U)
-#define CCM_CDHIPR_AHB_PODF_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK     (0x8U)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT    (3U)
-#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK      (0x20U)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT     (5U)
-#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)
-#define CCM_CDHIPR_ARM_PODF_BUSY_MASK            (0x10000U)
-#define CCM_CDHIPR_ARM_PODF_BUSY_SHIFT           (16U)
-#define CCM_CDHIPR_ARM_PODF_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)
+#define CCM_CDHIPR_SEMC_PODF_BUSY_MASK  (0x1U)
+#define CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT (0U)
+#define CCM_CDHIPR_SEMC_PODF_BUSY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT)) & CCM_CDHIPR_SEMC_PODF_BUSY_MASK)
+#define CCM_CDHIPR_AHB_PODF_BUSY_MASK  (0x2U)
+#define CCM_CDHIPR_AHB_PODF_BUSY_SHIFT (1U)
+#define CCM_CDHIPR_AHB_PODF_BUSY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_AHB_PODF_BUSY_SHIFT)) & CCM_CDHIPR_AHB_PODF_BUSY_MASK)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK  (0x8U)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT (3U)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY_MASK)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK  (0x20U)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT (5U)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT)) & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_MASK)
+#define CCM_CDHIPR_ARM_PODF_BUSY_MASK  (0x10000U)
+#define CCM_CDHIPR_ARM_PODF_BUSY_SHIFT (16U)
+#define CCM_CDHIPR_ARM_PODF_BUSY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CDHIPR_ARM_PODF_BUSY_SHIFT)) & CCM_CDHIPR_ARM_PODF_BUSY_MASK)
 /*! @} */
 
 /*! @name CLPCR - CCM Low Power Control Register */
 /*! @{ */
-#define CCM_CLPCR_LPM_MASK                       (0x3U)
-#define CCM_CLPCR_LPM_SHIFT                      (0U)
-#define CCM_CLPCR_LPM(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK        (0x20U)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT       (5U)
-#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)
-#define CCM_CLPCR_SBYOS_MASK                     (0x40U)
-#define CCM_CLPCR_SBYOS_SHIFT                    (6U)
-#define CCM_CLPCR_SBYOS(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)
-#define CCM_CLPCR_DIS_REF_OSC_MASK               (0x80U)
-#define CCM_CLPCR_DIS_REF_OSC_SHIFT              (7U)
-#define CCM_CLPCR_DIS_REF_OSC(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)
-#define CCM_CLPCR_VSTBY_MASK                     (0x100U)
-#define CCM_CLPCR_VSTBY_SHIFT                    (8U)
-#define CCM_CLPCR_VSTBY(x)                       (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)
-#define CCM_CLPCR_STBY_COUNT_MASK                (0x600U)
-#define CCM_CLPCR_STBY_COUNT_SHIFT               (9U)
-#define CCM_CLPCR_STBY_COUNT(x)                  (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)
-#define CCM_CLPCR_COSC_PWRDOWN_MASK              (0x800U)
-#define CCM_CLPCR_COSC_PWRDOWN_SHIFT             (11U)
-#define CCM_CLPCR_COSC_PWRDOWN(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)
-#define CCM_CLPCR_BYPASS_LPM_HS1_MASK            (0x80000U)
-#define CCM_CLPCR_BYPASS_LPM_HS1_SHIFT           (19U)
-#define CCM_CLPCR_BYPASS_LPM_HS1(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS1_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS1_MASK)
-#define CCM_CLPCR_BYPASS_LPM_HS0_MASK            (0x200000U)
-#define CCM_CLPCR_BYPASS_LPM_HS0_SHIFT           (21U)
-#define CCM_CLPCR_BYPASS_LPM_HS0(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS0_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS0_MASK)
-#define CCM_CLPCR_MASK_CORE0_WFI_MASK            (0x400000U)
-#define CCM_CLPCR_MASK_CORE0_WFI_SHIFT           (22U)
-#define CCM_CLPCR_MASK_CORE0_WFI(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)
-#define CCM_CLPCR_MASK_SCU_IDLE_MASK             (0x4000000U)
-#define CCM_CLPCR_MASK_SCU_IDLE_SHIFT            (26U)
-#define CCM_CLPCR_MASK_SCU_IDLE(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)
-#define CCM_CLPCR_MASK_L2CC_IDLE_MASK            (0x8000000U)
-#define CCM_CLPCR_MASK_L2CC_IDLE_SHIFT           (27U)
-#define CCM_CLPCR_MASK_L2CC_IDLE(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)
+#define CCM_CLPCR_LPM_MASK                 (0x3U)
+#define CCM_CLPCR_LPM_SHIFT                (0U)
+#define CCM_CLPCR_LPM(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_LPM_SHIFT)) & CCM_CLPCR_LPM_MASK)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK  (0x20U)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT (5U)
+#define CCM_CLPCR_ARM_CLK_DIS_ON_LPM(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_ARM_CLK_DIS_ON_LPM_SHIFT)) & CCM_CLPCR_ARM_CLK_DIS_ON_LPM_MASK)
+#define CCM_CLPCR_SBYOS_MASK        (0x40U)
+#define CCM_CLPCR_SBYOS_SHIFT       (6U)
+#define CCM_CLPCR_SBYOS(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_SBYOS_SHIFT)) & CCM_CLPCR_SBYOS_MASK)
+#define CCM_CLPCR_DIS_REF_OSC_MASK  (0x80U)
+#define CCM_CLPCR_DIS_REF_OSC_SHIFT (7U)
+#define CCM_CLPCR_DIS_REF_OSC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_DIS_REF_OSC_SHIFT)) & CCM_CLPCR_DIS_REF_OSC_MASK)
+#define CCM_CLPCR_VSTBY_MASK       (0x100U)
+#define CCM_CLPCR_VSTBY_SHIFT      (8U)
+#define CCM_CLPCR_VSTBY(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_VSTBY_SHIFT)) & CCM_CLPCR_VSTBY_MASK)
+#define CCM_CLPCR_STBY_COUNT_MASK  (0x600U)
+#define CCM_CLPCR_STBY_COUNT_SHIFT (9U)
+#define CCM_CLPCR_STBY_COUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_STBY_COUNT_SHIFT)) & CCM_CLPCR_STBY_COUNT_MASK)
+#define CCM_CLPCR_COSC_PWRDOWN_MASK  (0x800U)
+#define CCM_CLPCR_COSC_PWRDOWN_SHIFT (11U)
+#define CCM_CLPCR_COSC_PWRDOWN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_COSC_PWRDOWN_SHIFT)) & CCM_CLPCR_COSC_PWRDOWN_MASK)
+#define CCM_CLPCR_BYPASS_LPM_HS1_MASK  (0x80000U)
+#define CCM_CLPCR_BYPASS_LPM_HS1_SHIFT (19U)
+#define CCM_CLPCR_BYPASS_LPM_HS1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS1_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS1_MASK)
+#define CCM_CLPCR_BYPASS_LPM_HS0_MASK  (0x200000U)
+#define CCM_CLPCR_BYPASS_LPM_HS0_SHIFT (21U)
+#define CCM_CLPCR_BYPASS_LPM_HS0(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_BYPASS_LPM_HS0_SHIFT)) & CCM_CLPCR_BYPASS_LPM_HS0_MASK)
+#define CCM_CLPCR_MASK_CORE0_WFI_MASK  (0x400000U)
+#define CCM_CLPCR_MASK_CORE0_WFI_SHIFT (22U)
+#define CCM_CLPCR_MASK_CORE0_WFI(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_CORE0_WFI_SHIFT)) & CCM_CLPCR_MASK_CORE0_WFI_MASK)
+#define CCM_CLPCR_MASK_SCU_IDLE_MASK  (0x4000000U)
+#define CCM_CLPCR_MASK_SCU_IDLE_SHIFT (26U)
+#define CCM_CLPCR_MASK_SCU_IDLE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_SCU_IDLE_SHIFT)) & CCM_CLPCR_MASK_SCU_IDLE_MASK)
+#define CCM_CLPCR_MASK_L2CC_IDLE_MASK  (0x8000000U)
+#define CCM_CLPCR_MASK_L2CC_IDLE_SHIFT (27U)
+#define CCM_CLPCR_MASK_L2CC_IDLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CLPCR_MASK_L2CC_IDLE_SHIFT)) & CCM_CLPCR_MASK_L2CC_IDLE_MASK)
 /*! @} */
 
 /*! @name CISR - CCM Interrupt Status Register */
 /*! @{ */
-#define CCM_CISR_LRF_PLL_MASK                    (0x1U)
-#define CCM_CISR_LRF_PLL_SHIFT                   (0U)
-#define CCM_CISR_LRF_PLL(x)                      (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)
-#define CCM_CISR_COSC_READY_MASK                 (0x40U)
-#define CCM_CISR_COSC_READY_SHIFT                (6U)
-#define CCM_CISR_COSC_READY(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)
-#define CCM_CISR_SEMC_PODF_LOADED_MASK           (0x20000U)
-#define CCM_CISR_SEMC_PODF_LOADED_SHIFT          (17U)
-#define CCM_CISR_SEMC_PODF_LOADED(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK     (0x80000U)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT    (19U)
-#define CCM_CISR_PERIPH2_CLK_SEL_LOADED(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)
-#define CCM_CISR_AHB_PODF_LOADED_MASK            (0x100000U)
-#define CCM_CISR_AHB_PODF_LOADED_SHIFT           (20U)
-#define CCM_CISR_AHB_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK      (0x400000U)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT     (22U)
-#define CCM_CISR_PERIPH_CLK_SEL_LOADED(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)
-#define CCM_CISR_ARM_PODF_LOADED_MASK            (0x4000000U)
-#define CCM_CISR_ARM_PODF_LOADED_SHIFT           (26U)
-#define CCM_CISR_ARM_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)
+#define CCM_CISR_LRF_PLL_MASK           (0x1U)
+#define CCM_CISR_LRF_PLL_SHIFT          (0U)
+#define CCM_CISR_LRF_PLL(x)             (((uint32_t)(((uint32_t)(x)) << CCM_CISR_LRF_PLL_SHIFT)) & CCM_CISR_LRF_PLL_MASK)
+#define CCM_CISR_COSC_READY_MASK        (0x40U)
+#define CCM_CISR_COSC_READY_SHIFT       (6U)
+#define CCM_CISR_COSC_READY(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CISR_COSC_READY_SHIFT)) & CCM_CISR_COSC_READY_MASK)
+#define CCM_CISR_SEMC_PODF_LOADED_MASK  (0x20000U)
+#define CCM_CISR_SEMC_PODF_LOADED_SHIFT (17U)
+#define CCM_CISR_SEMC_PODF_LOADED(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_SEMC_PODF_LOADED_SHIFT)) & CCM_CISR_SEMC_PODF_LOADED_MASK)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK  (0x80000U)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)
+#define CCM_CISR_PERIPH2_CLK_SEL_LOADED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH2_CLK_SEL_LOADED_MASK)
+#define CCM_CISR_AHB_PODF_LOADED_MASK  (0x100000U)
+#define CCM_CISR_AHB_PODF_LOADED_SHIFT (20U)
+#define CCM_CISR_AHB_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_AHB_PODF_LOADED_SHIFT)) & CCM_CISR_AHB_PODF_LOADED_MASK)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK  (0x400000U)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT (22U)
+#define CCM_CISR_PERIPH_CLK_SEL_LOADED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CISR_PERIPH_CLK_SEL_LOADED_MASK)
+#define CCM_CISR_ARM_PODF_LOADED_MASK  (0x4000000U)
+#define CCM_CISR_ARM_PODF_LOADED_SHIFT (26U)
+#define CCM_CISR_ARM_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CISR_ARM_PODF_LOADED_SHIFT)) & CCM_CISR_ARM_PODF_LOADED_MASK)
 /*! @} */
 
 /*! @name CIMR - CCM Interrupt Mask Register */
 /*! @{ */
-#define CCM_CIMR_MASK_LRF_PLL_MASK               (0x1U)
-#define CCM_CIMR_MASK_LRF_PLL_SHIFT              (0U)
-#define CCM_CIMR_MASK_LRF_PLL(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)
-#define CCM_CIMR_MASK_COSC_READY_MASK            (0x40U)
-#define CCM_CIMR_MASK_COSC_READY_SHIFT           (6U)
-#define CCM_CIMR_MASK_COSC_READY(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK      (0x20000U)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT     (17U)
-#define CCM_CIMR_MASK_SEMC_PODF_LOADED(x)        (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)
-#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK (0x80000U)
+#define CCM_CIMR_MASK_LRF_PLL_MASK  (0x1U)
+#define CCM_CIMR_MASK_LRF_PLL_SHIFT (0U)
+#define CCM_CIMR_MASK_LRF_PLL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_LRF_PLL_SHIFT)) & CCM_CIMR_MASK_LRF_PLL_MASK)
+#define CCM_CIMR_MASK_COSC_READY_MASK  (0x40U)
+#define CCM_CIMR_MASK_COSC_READY_SHIFT (6U)
+#define CCM_CIMR_MASK_COSC_READY(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_COSC_READY_SHIFT)) & CCM_CIMR_MASK_COSC_READY_MASK)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK  (0x20000U)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT (17U)
+#define CCM_CIMR_MASK_SEMC_PODF_LOADED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_SEMC_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_SEMC_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK  (0x80000U)
 #define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT (19U)
-#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED(x)  (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED_MASK       (0x100000U)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT      (20U)
-#define CCM_CIMR_MASK_AHB_PODF_LOADED(x)         (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)
-#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK (0x400000U)
+#define CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_SHIFT)) &                                     \
+     CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED_MASK)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED_MASK  (0x100000U)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT (20U)
+#define CCM_CIMR_MASK_AHB_PODF_LOADED(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_AHB_PODF_LOADED_SHIFT)) & CCM_CIMR_MASK_AHB_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK  (0x400000U)
 #define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT (22U)
-#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED(x)   (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) & CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)
-#define CCM_CIMR_ARM_PODF_LOADED_MASK            (0x4000000U)
-#define CCM_CIMR_ARM_PODF_LOADED_SHIFT           (26U)
-#define CCM_CIMR_ARM_PODF_LOADED(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)
+#define CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_SHIFT)) &                                      \
+     CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED_MASK)
+#define CCM_CIMR_ARM_PODF_LOADED_MASK  (0x4000000U)
+#define CCM_CIMR_ARM_PODF_LOADED_SHIFT (26U)
+#define CCM_CIMR_ARM_PODF_LOADED(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CIMR_ARM_PODF_LOADED_SHIFT)) & CCM_CIMR_ARM_PODF_LOADED_MASK)
 /*! @} */
 
 /*! @name CCOSR - CCM Clock Output Source Register */
 /*! @{ */
-#define CCM_CCOSR_CLKO1_SEL_MASK                 (0xFU)
-#define CCM_CCOSR_CLKO1_SEL_SHIFT                (0U)
-#define CCM_CCOSR_CLKO1_SEL(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)
-#define CCM_CCOSR_CLKO1_DIV_MASK                 (0x70U)
-#define CCM_CCOSR_CLKO1_DIV_SHIFT                (4U)
-#define CCM_CCOSR_CLKO1_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)
-#define CCM_CCOSR_CLKO1_EN_MASK                  (0x80U)
-#define CCM_CCOSR_CLKO1_EN_SHIFT                 (7U)
-#define CCM_CCOSR_CLKO1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
-#define CCM_CCOSR_CLK_OUT_SEL_MASK               (0x100U)
-#define CCM_CCOSR_CLK_OUT_SEL_SHIFT              (8U)
-#define CCM_CCOSR_CLK_OUT_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)
-#define CCM_CCOSR_CLKO2_SEL_MASK                 (0x1F0000U)
-#define CCM_CCOSR_CLKO2_SEL_SHIFT                (16U)
-#define CCM_CCOSR_CLKO2_SEL(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)
-#define CCM_CCOSR_CLKO2_DIV_MASK                 (0xE00000U)
-#define CCM_CCOSR_CLKO2_DIV_SHIFT                (21U)
-#define CCM_CCOSR_CLKO2_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
-#define CCM_CCOSR_CLKO2_EN_MASK                  (0x1000000U)
-#define CCM_CCOSR_CLKO2_EN_SHIFT                 (24U)
-#define CCM_CCOSR_CLKO2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)
+#define CCM_CCOSR_CLKO1_SEL_MASK    (0xFU)
+#define CCM_CCOSR_CLKO1_SEL_SHIFT   (0U)
+#define CCM_CCOSR_CLKO1_SEL(x)      (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_SEL_SHIFT)) & CCM_CCOSR_CLKO1_SEL_MASK)
+#define CCM_CCOSR_CLKO1_DIV_MASK    (0x70U)
+#define CCM_CCOSR_CLKO1_DIV_SHIFT   (4U)
+#define CCM_CCOSR_CLKO1_DIV(x)      (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_DIV_SHIFT)) & CCM_CCOSR_CLKO1_DIV_MASK)
+#define CCM_CCOSR_CLKO1_EN_MASK     (0x80U)
+#define CCM_CCOSR_CLKO1_EN_SHIFT    (7U)
+#define CCM_CCOSR_CLKO1_EN(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
+#define CCM_CCOSR_CLK_OUT_SEL_MASK  (0x100U)
+#define CCM_CCOSR_CLK_OUT_SEL_SHIFT (8U)
+#define CCM_CCOSR_CLK_OUT_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLK_OUT_SEL_SHIFT)) & CCM_CCOSR_CLK_OUT_SEL_MASK)
+#define CCM_CCOSR_CLKO2_SEL_MASK  (0x1F0000U)
+#define CCM_CCOSR_CLKO2_SEL_SHIFT (16U)
+#define CCM_CCOSR_CLKO2_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_SEL_SHIFT)) & CCM_CCOSR_CLKO2_SEL_MASK)
+#define CCM_CCOSR_CLKO2_DIV_MASK  (0xE00000U)
+#define CCM_CCOSR_CLKO2_DIV_SHIFT (21U)
+#define CCM_CCOSR_CLKO2_DIV(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
+#define CCM_CCOSR_CLKO2_EN_MASK   (0x1000000U)
+#define CCM_CCOSR_CLKO2_EN_SHIFT  (24U)
+#define CCM_CCOSR_CLKO2_EN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_EN_SHIFT)) & CCM_CCOSR_CLKO2_EN_MASK)
 /*! @} */
 
 /*! @name CGPR - CCM General Purpose Register */
 /*! @{ */
-#define CCM_CGPR_PMIC_DELAY_SCALER_MASK          (0x1U)
-#define CCM_CGPR_PMIC_DELAY_SCALER_SHIFT         (0U)
-#define CCM_CGPR_PMIC_DELAY_SCALER(x)            (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK     (0x10U)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT    (4U)
-#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)
-#define CCM_CGPR_SYS_MEM_DS_CTRL_MASK            (0xC000U)
-#define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT           (14U)
-#define CCM_CGPR_SYS_MEM_DS_CTRL(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)
-#define CCM_CGPR_FPL_MASK                        (0x10000U)
-#define CCM_CGPR_FPL_SHIFT                       (16U)
-#define CCM_CGPR_FPL(x)                          (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)
-#define CCM_CGPR_INT_MEM_CLK_LPM_MASK            (0x20000U)
-#define CCM_CGPR_INT_MEM_CLK_LPM_SHIFT           (17U)
-#define CCM_CGPR_INT_MEM_CLK_LPM(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)
+#define CCM_CGPR_PMIC_DELAY_SCALER_MASK  (0x1U)
+#define CCM_CGPR_PMIC_DELAY_SCALER_SHIFT (0U)
+#define CCM_CGPR_PMIC_DELAY_SCALER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_PMIC_DELAY_SCALER_SHIFT)) & CCM_CGPR_PMIC_DELAY_SCALER_MASK)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK  (0x10U)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT (4U)
+#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_SHIFT)) & CCM_CGPR_EFUSE_PROG_SUPPLY_GATE_MASK)
+#define CCM_CGPR_SYS_MEM_DS_CTRL_MASK  (0xC000U)
+#define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14U)
+#define CCM_CGPR_SYS_MEM_DS_CTRL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT)) & CCM_CGPR_SYS_MEM_DS_CTRL_MASK)
+#define CCM_CGPR_FPL_MASK              (0x10000U)
+#define CCM_CGPR_FPL_SHIFT             (16U)
+#define CCM_CGPR_FPL(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_FPL_SHIFT)) & CCM_CGPR_FPL_MASK)
+#define CCM_CGPR_INT_MEM_CLK_LPM_MASK  (0x20000U)
+#define CCM_CGPR_INT_MEM_CLK_LPM_SHIFT (17U)
+#define CCM_CGPR_INT_MEM_CLK_LPM(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CGPR_INT_MEM_CLK_LPM_SHIFT)) & CCM_CGPR_INT_MEM_CLK_LPM_MASK)
 /*! @} */
 
 /*! @name CCGR0 - CCM Clock Gating Register 0 */
 /*! @{ */
-#define CCM_CCGR0_CG0_MASK                       (0x3U)
-#define CCM_CCGR0_CG0_SHIFT                      (0U)
-#define CCM_CCGR0_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG0_SHIFT)) & CCM_CCGR0_CG0_MASK)
-#define CCM_CCGR0_CG1_MASK                       (0xCU)
-#define CCM_CCGR0_CG1_SHIFT                      (2U)
-#define CCM_CCGR0_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG1_SHIFT)) & CCM_CCGR0_CG1_MASK)
-#define CCM_CCGR0_CG2_MASK                       (0x30U)
-#define CCM_CCGR0_CG2_SHIFT                      (4U)
-#define CCM_CCGR0_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG2_SHIFT)) & CCM_CCGR0_CG2_MASK)
-#define CCM_CCGR0_CG3_MASK                       (0xC0U)
-#define CCM_CCGR0_CG3_SHIFT                      (6U)
-#define CCM_CCGR0_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG3_SHIFT)) & CCM_CCGR0_CG3_MASK)
-#define CCM_CCGR0_CG4_MASK                       (0x300U)
-#define CCM_CCGR0_CG4_SHIFT                      (8U)
-#define CCM_CCGR0_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG4_SHIFT)) & CCM_CCGR0_CG4_MASK)
-#define CCM_CCGR0_CG5_MASK                       (0xC00U)
-#define CCM_CCGR0_CG5_SHIFT                      (10U)
-#define CCM_CCGR0_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG5_SHIFT)) & CCM_CCGR0_CG5_MASK)
-#define CCM_CCGR0_CG6_MASK                       (0x3000U)
-#define CCM_CCGR0_CG6_SHIFT                      (12U)
-#define CCM_CCGR0_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG6_SHIFT)) & CCM_CCGR0_CG6_MASK)
-#define CCM_CCGR0_CG7_MASK                       (0xC000U)
-#define CCM_CCGR0_CG7_SHIFT                      (14U)
-#define CCM_CCGR0_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG7_SHIFT)) & CCM_CCGR0_CG7_MASK)
-#define CCM_CCGR0_CG8_MASK                       (0x30000U)
-#define CCM_CCGR0_CG8_SHIFT                      (16U)
-#define CCM_CCGR0_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG8_SHIFT)) & CCM_CCGR0_CG8_MASK)
-#define CCM_CCGR0_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR0_CG9_SHIFT                      (18U)
-#define CCM_CCGR0_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG9_SHIFT)) & CCM_CCGR0_CG9_MASK)
-#define CCM_CCGR0_CG10_MASK                      (0x300000U)
-#define CCM_CCGR0_CG10_SHIFT                     (20U)
-#define CCM_CCGR0_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG10_SHIFT)) & CCM_CCGR0_CG10_MASK)
-#define CCM_CCGR0_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR0_CG11_SHIFT                     (22U)
-#define CCM_CCGR0_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG11_SHIFT)) & CCM_CCGR0_CG11_MASK)
-#define CCM_CCGR0_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR0_CG12_SHIFT                     (24U)
-#define CCM_CCGR0_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG12_SHIFT)) & CCM_CCGR0_CG12_MASK)
-#define CCM_CCGR0_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR0_CG13_SHIFT                     (26U)
-#define CCM_CCGR0_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG13_SHIFT)) & CCM_CCGR0_CG13_MASK)
-#define CCM_CCGR0_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR0_CG14_SHIFT                     (28U)
-#define CCM_CCGR0_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG14_SHIFT)) & CCM_CCGR0_CG14_MASK)
-#define CCM_CCGR0_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR0_CG15_SHIFT                     (30U)
-#define CCM_CCGR0_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG15_SHIFT)) & CCM_CCGR0_CG15_MASK)
+#define CCM_CCGR0_CG0_MASK   (0x3U)
+#define CCM_CCGR0_CG0_SHIFT  (0U)
+#define CCM_CCGR0_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG0_SHIFT)) & CCM_CCGR0_CG0_MASK)
+#define CCM_CCGR0_CG1_MASK   (0xCU)
+#define CCM_CCGR0_CG1_SHIFT  (2U)
+#define CCM_CCGR0_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG1_SHIFT)) & CCM_CCGR0_CG1_MASK)
+#define CCM_CCGR0_CG2_MASK   (0x30U)
+#define CCM_CCGR0_CG2_SHIFT  (4U)
+#define CCM_CCGR0_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG2_SHIFT)) & CCM_CCGR0_CG2_MASK)
+#define CCM_CCGR0_CG3_MASK   (0xC0U)
+#define CCM_CCGR0_CG3_SHIFT  (6U)
+#define CCM_CCGR0_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG3_SHIFT)) & CCM_CCGR0_CG3_MASK)
+#define CCM_CCGR0_CG4_MASK   (0x300U)
+#define CCM_CCGR0_CG4_SHIFT  (8U)
+#define CCM_CCGR0_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG4_SHIFT)) & CCM_CCGR0_CG4_MASK)
+#define CCM_CCGR0_CG5_MASK   (0xC00U)
+#define CCM_CCGR0_CG5_SHIFT  (10U)
+#define CCM_CCGR0_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG5_SHIFT)) & CCM_CCGR0_CG5_MASK)
+#define CCM_CCGR0_CG6_MASK   (0x3000U)
+#define CCM_CCGR0_CG6_SHIFT  (12U)
+#define CCM_CCGR0_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG6_SHIFT)) & CCM_CCGR0_CG6_MASK)
+#define CCM_CCGR0_CG7_MASK   (0xC000U)
+#define CCM_CCGR0_CG7_SHIFT  (14U)
+#define CCM_CCGR0_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG7_SHIFT)) & CCM_CCGR0_CG7_MASK)
+#define CCM_CCGR0_CG8_MASK   (0x30000U)
+#define CCM_CCGR0_CG8_SHIFT  (16U)
+#define CCM_CCGR0_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG8_SHIFT)) & CCM_CCGR0_CG8_MASK)
+#define CCM_CCGR0_CG9_MASK   (0xC0000U)
+#define CCM_CCGR0_CG9_SHIFT  (18U)
+#define CCM_CCGR0_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG9_SHIFT)) & CCM_CCGR0_CG9_MASK)
+#define CCM_CCGR0_CG10_MASK  (0x300000U)
+#define CCM_CCGR0_CG10_SHIFT (20U)
+#define CCM_CCGR0_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG10_SHIFT)) & CCM_CCGR0_CG10_MASK)
+#define CCM_CCGR0_CG11_MASK  (0xC00000U)
+#define CCM_CCGR0_CG11_SHIFT (22U)
+#define CCM_CCGR0_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG11_SHIFT)) & CCM_CCGR0_CG11_MASK)
+#define CCM_CCGR0_CG12_MASK  (0x3000000U)
+#define CCM_CCGR0_CG12_SHIFT (24U)
+#define CCM_CCGR0_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG12_SHIFT)) & CCM_CCGR0_CG12_MASK)
+#define CCM_CCGR0_CG13_MASK  (0xC000000U)
+#define CCM_CCGR0_CG13_SHIFT (26U)
+#define CCM_CCGR0_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG13_SHIFT)) & CCM_CCGR0_CG13_MASK)
+#define CCM_CCGR0_CG14_MASK  (0x30000000U)
+#define CCM_CCGR0_CG14_SHIFT (28U)
+#define CCM_CCGR0_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG14_SHIFT)) & CCM_CCGR0_CG14_MASK)
+#define CCM_CCGR0_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR0_CG15_SHIFT (30U)
+#define CCM_CCGR0_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR0_CG15_SHIFT)) & CCM_CCGR0_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR1 - CCM Clock Gating Register 1 */
 /*! @{ */
-#define CCM_CCGR1_CG0_MASK                       (0x3U)
-#define CCM_CCGR1_CG0_SHIFT                      (0U)
-#define CCM_CCGR1_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG0_SHIFT)) & CCM_CCGR1_CG0_MASK)
-#define CCM_CCGR1_CG1_MASK                       (0xCU)
-#define CCM_CCGR1_CG1_SHIFT                      (2U)
-#define CCM_CCGR1_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG1_SHIFT)) & CCM_CCGR1_CG1_MASK)
-#define CCM_CCGR1_CG2_MASK                       (0x30U)
-#define CCM_CCGR1_CG2_SHIFT                      (4U)
-#define CCM_CCGR1_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG2_SHIFT)) & CCM_CCGR1_CG2_MASK)
-#define CCM_CCGR1_CG3_MASK                       (0xC0U)
-#define CCM_CCGR1_CG3_SHIFT                      (6U)
-#define CCM_CCGR1_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG3_SHIFT)) & CCM_CCGR1_CG3_MASK)
-#define CCM_CCGR1_CG4_MASK                       (0x300U)
-#define CCM_CCGR1_CG4_SHIFT                      (8U)
-#define CCM_CCGR1_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG4_SHIFT)) & CCM_CCGR1_CG4_MASK)
-#define CCM_CCGR1_CG5_MASK                       (0xC00U)
-#define CCM_CCGR1_CG5_SHIFT                      (10U)
-#define CCM_CCGR1_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG5_SHIFT)) & CCM_CCGR1_CG5_MASK)
-#define CCM_CCGR1_CG6_MASK                       (0x3000U)
-#define CCM_CCGR1_CG6_SHIFT                      (12U)
-#define CCM_CCGR1_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG6_SHIFT)) & CCM_CCGR1_CG6_MASK)
-#define CCM_CCGR1_CG7_MASK                       (0xC000U)
-#define CCM_CCGR1_CG7_SHIFT                      (14U)
-#define CCM_CCGR1_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG7_SHIFT)) & CCM_CCGR1_CG7_MASK)
-#define CCM_CCGR1_CG8_MASK                       (0x30000U)
-#define CCM_CCGR1_CG8_SHIFT                      (16U)
-#define CCM_CCGR1_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG8_SHIFT)) & CCM_CCGR1_CG8_MASK)
-#define CCM_CCGR1_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR1_CG9_SHIFT                      (18U)
-#define CCM_CCGR1_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG9_SHIFT)) & CCM_CCGR1_CG9_MASK)
-#define CCM_CCGR1_CG10_MASK                      (0x300000U)
-#define CCM_CCGR1_CG10_SHIFT                     (20U)
-#define CCM_CCGR1_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG10_SHIFT)) & CCM_CCGR1_CG10_MASK)
-#define CCM_CCGR1_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR1_CG11_SHIFT                     (22U)
-#define CCM_CCGR1_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG11_SHIFT)) & CCM_CCGR1_CG11_MASK)
-#define CCM_CCGR1_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR1_CG12_SHIFT                     (24U)
-#define CCM_CCGR1_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG12_SHIFT)) & CCM_CCGR1_CG12_MASK)
-#define CCM_CCGR1_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR1_CG13_SHIFT                     (26U)
-#define CCM_CCGR1_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG13_SHIFT)) & CCM_CCGR1_CG13_MASK)
-#define CCM_CCGR1_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR1_CG14_SHIFT                     (28U)
-#define CCM_CCGR1_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG14_SHIFT)) & CCM_CCGR1_CG14_MASK)
-#define CCM_CCGR1_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR1_CG15_SHIFT                     (30U)
-#define CCM_CCGR1_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG15_SHIFT)) & CCM_CCGR1_CG15_MASK)
+#define CCM_CCGR1_CG0_MASK   (0x3U)
+#define CCM_CCGR1_CG0_SHIFT  (0U)
+#define CCM_CCGR1_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG0_SHIFT)) & CCM_CCGR1_CG0_MASK)
+#define CCM_CCGR1_CG1_MASK   (0xCU)
+#define CCM_CCGR1_CG1_SHIFT  (2U)
+#define CCM_CCGR1_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG1_SHIFT)) & CCM_CCGR1_CG1_MASK)
+#define CCM_CCGR1_CG2_MASK   (0x30U)
+#define CCM_CCGR1_CG2_SHIFT  (4U)
+#define CCM_CCGR1_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG2_SHIFT)) & CCM_CCGR1_CG2_MASK)
+#define CCM_CCGR1_CG3_MASK   (0xC0U)
+#define CCM_CCGR1_CG3_SHIFT  (6U)
+#define CCM_CCGR1_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG3_SHIFT)) & CCM_CCGR1_CG3_MASK)
+#define CCM_CCGR1_CG4_MASK   (0x300U)
+#define CCM_CCGR1_CG4_SHIFT  (8U)
+#define CCM_CCGR1_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG4_SHIFT)) & CCM_CCGR1_CG4_MASK)
+#define CCM_CCGR1_CG5_MASK   (0xC00U)
+#define CCM_CCGR1_CG5_SHIFT  (10U)
+#define CCM_CCGR1_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG5_SHIFT)) & CCM_CCGR1_CG5_MASK)
+#define CCM_CCGR1_CG6_MASK   (0x3000U)
+#define CCM_CCGR1_CG6_SHIFT  (12U)
+#define CCM_CCGR1_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG6_SHIFT)) & CCM_CCGR1_CG6_MASK)
+#define CCM_CCGR1_CG7_MASK   (0xC000U)
+#define CCM_CCGR1_CG7_SHIFT  (14U)
+#define CCM_CCGR1_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG7_SHIFT)) & CCM_CCGR1_CG7_MASK)
+#define CCM_CCGR1_CG8_MASK   (0x30000U)
+#define CCM_CCGR1_CG8_SHIFT  (16U)
+#define CCM_CCGR1_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG8_SHIFT)) & CCM_CCGR1_CG8_MASK)
+#define CCM_CCGR1_CG9_MASK   (0xC0000U)
+#define CCM_CCGR1_CG9_SHIFT  (18U)
+#define CCM_CCGR1_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG9_SHIFT)) & CCM_CCGR1_CG9_MASK)
+#define CCM_CCGR1_CG10_MASK  (0x300000U)
+#define CCM_CCGR1_CG10_SHIFT (20U)
+#define CCM_CCGR1_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG10_SHIFT)) & CCM_CCGR1_CG10_MASK)
+#define CCM_CCGR1_CG11_MASK  (0xC00000U)
+#define CCM_CCGR1_CG11_SHIFT (22U)
+#define CCM_CCGR1_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG11_SHIFT)) & CCM_CCGR1_CG11_MASK)
+#define CCM_CCGR1_CG12_MASK  (0x3000000U)
+#define CCM_CCGR1_CG12_SHIFT (24U)
+#define CCM_CCGR1_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG12_SHIFT)) & CCM_CCGR1_CG12_MASK)
+#define CCM_CCGR1_CG13_MASK  (0xC000000U)
+#define CCM_CCGR1_CG13_SHIFT (26U)
+#define CCM_CCGR1_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG13_SHIFT)) & CCM_CCGR1_CG13_MASK)
+#define CCM_CCGR1_CG14_MASK  (0x30000000U)
+#define CCM_CCGR1_CG14_SHIFT (28U)
+#define CCM_CCGR1_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG14_SHIFT)) & CCM_CCGR1_CG14_MASK)
+#define CCM_CCGR1_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR1_CG15_SHIFT (30U)
+#define CCM_CCGR1_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR1_CG15_SHIFT)) & CCM_CCGR1_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR2 - CCM Clock Gating Register 2 */
 /*! @{ */
-#define CCM_CCGR2_CG0_MASK                       (0x3U)
-#define CCM_CCGR2_CG0_SHIFT                      (0U)
-#define CCM_CCGR2_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG0_SHIFT)) & CCM_CCGR2_CG0_MASK)
-#define CCM_CCGR2_CG1_MASK                       (0xCU)
-#define CCM_CCGR2_CG1_SHIFT                      (2U)
-#define CCM_CCGR2_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG1_SHIFT)) & CCM_CCGR2_CG1_MASK)
-#define CCM_CCGR2_CG2_MASK                       (0x30U)
-#define CCM_CCGR2_CG2_SHIFT                      (4U)
-#define CCM_CCGR2_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG2_SHIFT)) & CCM_CCGR2_CG2_MASK)
-#define CCM_CCGR2_CG3_MASK                       (0xC0U)
-#define CCM_CCGR2_CG3_SHIFT                      (6U)
-#define CCM_CCGR2_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG3_SHIFT)) & CCM_CCGR2_CG3_MASK)
-#define CCM_CCGR2_CG4_MASK                       (0x300U)
-#define CCM_CCGR2_CG4_SHIFT                      (8U)
-#define CCM_CCGR2_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG4_SHIFT)) & CCM_CCGR2_CG4_MASK)
-#define CCM_CCGR2_CG5_MASK                       (0xC00U)
-#define CCM_CCGR2_CG5_SHIFT                      (10U)
-#define CCM_CCGR2_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG5_SHIFT)) & CCM_CCGR2_CG5_MASK)
-#define CCM_CCGR2_CG6_MASK                       (0x3000U)
-#define CCM_CCGR2_CG6_SHIFT                      (12U)
-#define CCM_CCGR2_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG6_SHIFT)) & CCM_CCGR2_CG6_MASK)
-#define CCM_CCGR2_CG7_MASK                       (0xC000U)
-#define CCM_CCGR2_CG7_SHIFT                      (14U)
-#define CCM_CCGR2_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG7_SHIFT)) & CCM_CCGR2_CG7_MASK)
-#define CCM_CCGR2_CG8_MASK                       (0x30000U)
-#define CCM_CCGR2_CG8_SHIFT                      (16U)
-#define CCM_CCGR2_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG8_SHIFT)) & CCM_CCGR2_CG8_MASK)
-#define CCM_CCGR2_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR2_CG9_SHIFT                      (18U)
-#define CCM_CCGR2_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG9_SHIFT)) & CCM_CCGR2_CG9_MASK)
-#define CCM_CCGR2_CG10_MASK                      (0x300000U)
-#define CCM_CCGR2_CG10_SHIFT                     (20U)
-#define CCM_CCGR2_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG10_SHIFT)) & CCM_CCGR2_CG10_MASK)
-#define CCM_CCGR2_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR2_CG11_SHIFT                     (22U)
-#define CCM_CCGR2_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG11_SHIFT)) & CCM_CCGR2_CG11_MASK)
-#define CCM_CCGR2_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR2_CG12_SHIFT                     (24U)
-#define CCM_CCGR2_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG12_SHIFT)) & CCM_CCGR2_CG12_MASK)
-#define CCM_CCGR2_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR2_CG13_SHIFT                     (26U)
-#define CCM_CCGR2_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG13_SHIFT)) & CCM_CCGR2_CG13_MASK)
-#define CCM_CCGR2_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR2_CG14_SHIFT                     (28U)
-#define CCM_CCGR2_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG14_SHIFT)) & CCM_CCGR2_CG14_MASK)
-#define CCM_CCGR2_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR2_CG15_SHIFT                     (30U)
-#define CCM_CCGR2_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG15_SHIFT)) & CCM_CCGR2_CG15_MASK)
+#define CCM_CCGR2_CG0_MASK   (0x3U)
+#define CCM_CCGR2_CG0_SHIFT  (0U)
+#define CCM_CCGR2_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG0_SHIFT)) & CCM_CCGR2_CG0_MASK)
+#define CCM_CCGR2_CG1_MASK   (0xCU)
+#define CCM_CCGR2_CG1_SHIFT  (2U)
+#define CCM_CCGR2_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG1_SHIFT)) & CCM_CCGR2_CG1_MASK)
+#define CCM_CCGR2_CG2_MASK   (0x30U)
+#define CCM_CCGR2_CG2_SHIFT  (4U)
+#define CCM_CCGR2_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG2_SHIFT)) & CCM_CCGR2_CG2_MASK)
+#define CCM_CCGR2_CG3_MASK   (0xC0U)
+#define CCM_CCGR2_CG3_SHIFT  (6U)
+#define CCM_CCGR2_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG3_SHIFT)) & CCM_CCGR2_CG3_MASK)
+#define CCM_CCGR2_CG4_MASK   (0x300U)
+#define CCM_CCGR2_CG4_SHIFT  (8U)
+#define CCM_CCGR2_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG4_SHIFT)) & CCM_CCGR2_CG4_MASK)
+#define CCM_CCGR2_CG5_MASK   (0xC00U)
+#define CCM_CCGR2_CG5_SHIFT  (10U)
+#define CCM_CCGR2_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG5_SHIFT)) & CCM_CCGR2_CG5_MASK)
+#define CCM_CCGR2_CG6_MASK   (0x3000U)
+#define CCM_CCGR2_CG6_SHIFT  (12U)
+#define CCM_CCGR2_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG6_SHIFT)) & CCM_CCGR2_CG6_MASK)
+#define CCM_CCGR2_CG7_MASK   (0xC000U)
+#define CCM_CCGR2_CG7_SHIFT  (14U)
+#define CCM_CCGR2_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG7_SHIFT)) & CCM_CCGR2_CG7_MASK)
+#define CCM_CCGR2_CG8_MASK   (0x30000U)
+#define CCM_CCGR2_CG8_SHIFT  (16U)
+#define CCM_CCGR2_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG8_SHIFT)) & CCM_CCGR2_CG8_MASK)
+#define CCM_CCGR2_CG9_MASK   (0xC0000U)
+#define CCM_CCGR2_CG9_SHIFT  (18U)
+#define CCM_CCGR2_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG9_SHIFT)) & CCM_CCGR2_CG9_MASK)
+#define CCM_CCGR2_CG10_MASK  (0x300000U)
+#define CCM_CCGR2_CG10_SHIFT (20U)
+#define CCM_CCGR2_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG10_SHIFT)) & CCM_CCGR2_CG10_MASK)
+#define CCM_CCGR2_CG11_MASK  (0xC00000U)
+#define CCM_CCGR2_CG11_SHIFT (22U)
+#define CCM_CCGR2_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG11_SHIFT)) & CCM_CCGR2_CG11_MASK)
+#define CCM_CCGR2_CG12_MASK  (0x3000000U)
+#define CCM_CCGR2_CG12_SHIFT (24U)
+#define CCM_CCGR2_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG12_SHIFT)) & CCM_CCGR2_CG12_MASK)
+#define CCM_CCGR2_CG13_MASK  (0xC000000U)
+#define CCM_CCGR2_CG13_SHIFT (26U)
+#define CCM_CCGR2_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG13_SHIFT)) & CCM_CCGR2_CG13_MASK)
+#define CCM_CCGR2_CG14_MASK  (0x30000000U)
+#define CCM_CCGR2_CG14_SHIFT (28U)
+#define CCM_CCGR2_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG14_SHIFT)) & CCM_CCGR2_CG14_MASK)
+#define CCM_CCGR2_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR2_CG15_SHIFT (30U)
+#define CCM_CCGR2_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR2_CG15_SHIFT)) & CCM_CCGR2_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR3 - CCM Clock Gating Register 3 */
 /*! @{ */
-#define CCM_CCGR3_CG0_MASK                       (0x3U)
-#define CCM_CCGR3_CG0_SHIFT                      (0U)
-#define CCM_CCGR3_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG0_SHIFT)) & CCM_CCGR3_CG0_MASK)
-#define CCM_CCGR3_CG1_MASK                       (0xCU)
-#define CCM_CCGR3_CG1_SHIFT                      (2U)
-#define CCM_CCGR3_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG1_SHIFT)) & CCM_CCGR3_CG1_MASK)
-#define CCM_CCGR3_CG2_MASK                       (0x30U)
-#define CCM_CCGR3_CG2_SHIFT                      (4U)
-#define CCM_CCGR3_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG2_SHIFT)) & CCM_CCGR3_CG2_MASK)
-#define CCM_CCGR3_CG3_MASK                       (0xC0U)
-#define CCM_CCGR3_CG3_SHIFT                      (6U)
-#define CCM_CCGR3_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG3_SHIFT)) & CCM_CCGR3_CG3_MASK)
-#define CCM_CCGR3_CG4_MASK                       (0x300U)
-#define CCM_CCGR3_CG4_SHIFT                      (8U)
-#define CCM_CCGR3_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG4_SHIFT)) & CCM_CCGR3_CG4_MASK)
-#define CCM_CCGR3_CG5_MASK                       (0xC00U)
-#define CCM_CCGR3_CG5_SHIFT                      (10U)
-#define CCM_CCGR3_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG5_SHIFT)) & CCM_CCGR3_CG5_MASK)
-#define CCM_CCGR3_CG6_MASK                       (0x3000U)
-#define CCM_CCGR3_CG6_SHIFT                      (12U)
-#define CCM_CCGR3_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG6_SHIFT)) & CCM_CCGR3_CG6_MASK)
-#define CCM_CCGR3_CG7_MASK                       (0xC000U)
-#define CCM_CCGR3_CG7_SHIFT                      (14U)
-#define CCM_CCGR3_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG7_SHIFT)) & CCM_CCGR3_CG7_MASK)
-#define CCM_CCGR3_CG8_MASK                       (0x30000U)
-#define CCM_CCGR3_CG8_SHIFT                      (16U)
-#define CCM_CCGR3_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG8_SHIFT)) & CCM_CCGR3_CG8_MASK)
-#define CCM_CCGR3_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR3_CG9_SHIFT                      (18U)
-#define CCM_CCGR3_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG9_SHIFT)) & CCM_CCGR3_CG9_MASK)
-#define CCM_CCGR3_CG10_MASK                      (0x300000U)
-#define CCM_CCGR3_CG10_SHIFT                     (20U)
-#define CCM_CCGR3_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG10_SHIFT)) & CCM_CCGR3_CG10_MASK)
-#define CCM_CCGR3_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR3_CG11_SHIFT                     (22U)
-#define CCM_CCGR3_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG11_SHIFT)) & CCM_CCGR3_CG11_MASK)
-#define CCM_CCGR3_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR3_CG12_SHIFT                     (24U)
-#define CCM_CCGR3_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG12_SHIFT)) & CCM_CCGR3_CG12_MASK)
-#define CCM_CCGR3_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR3_CG13_SHIFT                     (26U)
-#define CCM_CCGR3_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG13_SHIFT)) & CCM_CCGR3_CG13_MASK)
-#define CCM_CCGR3_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR3_CG14_SHIFT                     (28U)
-#define CCM_CCGR3_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)
-#define CCM_CCGR3_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR3_CG15_SHIFT                     (30U)
-#define CCM_CCGR3_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG15_SHIFT)) & CCM_CCGR3_CG15_MASK)
+#define CCM_CCGR3_CG0_MASK   (0x3U)
+#define CCM_CCGR3_CG0_SHIFT  (0U)
+#define CCM_CCGR3_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG0_SHIFT)) & CCM_CCGR3_CG0_MASK)
+#define CCM_CCGR3_CG1_MASK   (0xCU)
+#define CCM_CCGR3_CG1_SHIFT  (2U)
+#define CCM_CCGR3_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG1_SHIFT)) & CCM_CCGR3_CG1_MASK)
+#define CCM_CCGR3_CG2_MASK   (0x30U)
+#define CCM_CCGR3_CG2_SHIFT  (4U)
+#define CCM_CCGR3_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG2_SHIFT)) & CCM_CCGR3_CG2_MASK)
+#define CCM_CCGR3_CG3_MASK   (0xC0U)
+#define CCM_CCGR3_CG3_SHIFT  (6U)
+#define CCM_CCGR3_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG3_SHIFT)) & CCM_CCGR3_CG3_MASK)
+#define CCM_CCGR3_CG4_MASK   (0x300U)
+#define CCM_CCGR3_CG4_SHIFT  (8U)
+#define CCM_CCGR3_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG4_SHIFT)) & CCM_CCGR3_CG4_MASK)
+#define CCM_CCGR3_CG5_MASK   (0xC00U)
+#define CCM_CCGR3_CG5_SHIFT  (10U)
+#define CCM_CCGR3_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG5_SHIFT)) & CCM_CCGR3_CG5_MASK)
+#define CCM_CCGR3_CG6_MASK   (0x3000U)
+#define CCM_CCGR3_CG6_SHIFT  (12U)
+#define CCM_CCGR3_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG6_SHIFT)) & CCM_CCGR3_CG6_MASK)
+#define CCM_CCGR3_CG7_MASK   (0xC000U)
+#define CCM_CCGR3_CG7_SHIFT  (14U)
+#define CCM_CCGR3_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG7_SHIFT)) & CCM_CCGR3_CG7_MASK)
+#define CCM_CCGR3_CG8_MASK   (0x30000U)
+#define CCM_CCGR3_CG8_SHIFT  (16U)
+#define CCM_CCGR3_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG8_SHIFT)) & CCM_CCGR3_CG8_MASK)
+#define CCM_CCGR3_CG9_MASK   (0xC0000U)
+#define CCM_CCGR3_CG9_SHIFT  (18U)
+#define CCM_CCGR3_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG9_SHIFT)) & CCM_CCGR3_CG9_MASK)
+#define CCM_CCGR3_CG10_MASK  (0x300000U)
+#define CCM_CCGR3_CG10_SHIFT (20U)
+#define CCM_CCGR3_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG10_SHIFT)) & CCM_CCGR3_CG10_MASK)
+#define CCM_CCGR3_CG11_MASK  (0xC00000U)
+#define CCM_CCGR3_CG11_SHIFT (22U)
+#define CCM_CCGR3_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG11_SHIFT)) & CCM_CCGR3_CG11_MASK)
+#define CCM_CCGR3_CG12_MASK  (0x3000000U)
+#define CCM_CCGR3_CG12_SHIFT (24U)
+#define CCM_CCGR3_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG12_SHIFT)) & CCM_CCGR3_CG12_MASK)
+#define CCM_CCGR3_CG13_MASK  (0xC000000U)
+#define CCM_CCGR3_CG13_SHIFT (26U)
+#define CCM_CCGR3_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG13_SHIFT)) & CCM_CCGR3_CG13_MASK)
+#define CCM_CCGR3_CG14_MASK  (0x30000000U)
+#define CCM_CCGR3_CG14_SHIFT (28U)
+#define CCM_CCGR3_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG14_SHIFT)) & CCM_CCGR3_CG14_MASK)
+#define CCM_CCGR3_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR3_CG15_SHIFT (30U)
+#define CCM_CCGR3_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR3_CG15_SHIFT)) & CCM_CCGR3_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR4 - CCM Clock Gating Register 4 */
 /*! @{ */
-#define CCM_CCGR4_CG0_MASK                       (0x3U)
-#define CCM_CCGR4_CG0_SHIFT                      (0U)
-#define CCM_CCGR4_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG0_SHIFT)) & CCM_CCGR4_CG0_MASK)
-#define CCM_CCGR4_CG1_MASK                       (0xCU)
-#define CCM_CCGR4_CG1_SHIFT                      (2U)
-#define CCM_CCGR4_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG1_SHIFT)) & CCM_CCGR4_CG1_MASK)
-#define CCM_CCGR4_CG2_MASK                       (0x30U)
-#define CCM_CCGR4_CG2_SHIFT                      (4U)
-#define CCM_CCGR4_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG2_SHIFT)) & CCM_CCGR4_CG2_MASK)
-#define CCM_CCGR4_CG3_MASK                       (0xC0U)
-#define CCM_CCGR4_CG3_SHIFT                      (6U)
-#define CCM_CCGR4_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG3_SHIFT)) & CCM_CCGR4_CG3_MASK)
-#define CCM_CCGR4_CG4_MASK                       (0x300U)
-#define CCM_CCGR4_CG4_SHIFT                      (8U)
-#define CCM_CCGR4_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG4_SHIFT)) & CCM_CCGR4_CG4_MASK)
-#define CCM_CCGR4_CG5_MASK                       (0xC00U)
-#define CCM_CCGR4_CG5_SHIFT                      (10U)
-#define CCM_CCGR4_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG5_SHIFT)) & CCM_CCGR4_CG5_MASK)
-#define CCM_CCGR4_CG6_MASK                       (0x3000U)
-#define CCM_CCGR4_CG6_SHIFT                      (12U)
-#define CCM_CCGR4_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG6_SHIFT)) & CCM_CCGR4_CG6_MASK)
-#define CCM_CCGR4_CG7_MASK                       (0xC000U)
-#define CCM_CCGR4_CG7_SHIFT                      (14U)
-#define CCM_CCGR4_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG7_SHIFT)) & CCM_CCGR4_CG7_MASK)
-#define CCM_CCGR4_CG8_MASK                       (0x30000U)
-#define CCM_CCGR4_CG8_SHIFT                      (16U)
-#define CCM_CCGR4_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG8_SHIFT)) & CCM_CCGR4_CG8_MASK)
-#define CCM_CCGR4_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR4_CG9_SHIFT                      (18U)
-#define CCM_CCGR4_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG9_SHIFT)) & CCM_CCGR4_CG9_MASK)
-#define CCM_CCGR4_CG10_MASK                      (0x300000U)
-#define CCM_CCGR4_CG10_SHIFT                     (20U)
-#define CCM_CCGR4_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG10_SHIFT)) & CCM_CCGR4_CG10_MASK)
-#define CCM_CCGR4_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR4_CG11_SHIFT                     (22U)
-#define CCM_CCGR4_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG11_SHIFT)) & CCM_CCGR4_CG11_MASK)
-#define CCM_CCGR4_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR4_CG12_SHIFT                     (24U)
-#define CCM_CCGR4_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG12_SHIFT)) & CCM_CCGR4_CG12_MASK)
-#define CCM_CCGR4_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR4_CG13_SHIFT                     (26U)
-#define CCM_CCGR4_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG13_SHIFT)) & CCM_CCGR4_CG13_MASK)
-#define CCM_CCGR4_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR4_CG14_SHIFT                     (28U)
-#define CCM_CCGR4_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG14_SHIFT)) & CCM_CCGR4_CG14_MASK)
-#define CCM_CCGR4_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR4_CG15_SHIFT                     (30U)
-#define CCM_CCGR4_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG15_SHIFT)) & CCM_CCGR4_CG15_MASK)
+#define CCM_CCGR4_CG0_MASK   (0x3U)
+#define CCM_CCGR4_CG0_SHIFT  (0U)
+#define CCM_CCGR4_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG0_SHIFT)) & CCM_CCGR4_CG0_MASK)
+#define CCM_CCGR4_CG1_MASK   (0xCU)
+#define CCM_CCGR4_CG1_SHIFT  (2U)
+#define CCM_CCGR4_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG1_SHIFT)) & CCM_CCGR4_CG1_MASK)
+#define CCM_CCGR4_CG2_MASK   (0x30U)
+#define CCM_CCGR4_CG2_SHIFT  (4U)
+#define CCM_CCGR4_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG2_SHIFT)) & CCM_CCGR4_CG2_MASK)
+#define CCM_CCGR4_CG3_MASK   (0xC0U)
+#define CCM_CCGR4_CG3_SHIFT  (6U)
+#define CCM_CCGR4_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG3_SHIFT)) & CCM_CCGR4_CG3_MASK)
+#define CCM_CCGR4_CG4_MASK   (0x300U)
+#define CCM_CCGR4_CG4_SHIFT  (8U)
+#define CCM_CCGR4_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG4_SHIFT)) & CCM_CCGR4_CG4_MASK)
+#define CCM_CCGR4_CG5_MASK   (0xC00U)
+#define CCM_CCGR4_CG5_SHIFT  (10U)
+#define CCM_CCGR4_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG5_SHIFT)) & CCM_CCGR4_CG5_MASK)
+#define CCM_CCGR4_CG6_MASK   (0x3000U)
+#define CCM_CCGR4_CG6_SHIFT  (12U)
+#define CCM_CCGR4_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG6_SHIFT)) & CCM_CCGR4_CG6_MASK)
+#define CCM_CCGR4_CG7_MASK   (0xC000U)
+#define CCM_CCGR4_CG7_SHIFT  (14U)
+#define CCM_CCGR4_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG7_SHIFT)) & CCM_CCGR4_CG7_MASK)
+#define CCM_CCGR4_CG8_MASK   (0x30000U)
+#define CCM_CCGR4_CG8_SHIFT  (16U)
+#define CCM_CCGR4_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG8_SHIFT)) & CCM_CCGR4_CG8_MASK)
+#define CCM_CCGR4_CG9_MASK   (0xC0000U)
+#define CCM_CCGR4_CG9_SHIFT  (18U)
+#define CCM_CCGR4_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG9_SHIFT)) & CCM_CCGR4_CG9_MASK)
+#define CCM_CCGR4_CG10_MASK  (0x300000U)
+#define CCM_CCGR4_CG10_SHIFT (20U)
+#define CCM_CCGR4_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG10_SHIFT)) & CCM_CCGR4_CG10_MASK)
+#define CCM_CCGR4_CG11_MASK  (0xC00000U)
+#define CCM_CCGR4_CG11_SHIFT (22U)
+#define CCM_CCGR4_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG11_SHIFT)) & CCM_CCGR4_CG11_MASK)
+#define CCM_CCGR4_CG12_MASK  (0x3000000U)
+#define CCM_CCGR4_CG12_SHIFT (24U)
+#define CCM_CCGR4_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG12_SHIFT)) & CCM_CCGR4_CG12_MASK)
+#define CCM_CCGR4_CG13_MASK  (0xC000000U)
+#define CCM_CCGR4_CG13_SHIFT (26U)
+#define CCM_CCGR4_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG13_SHIFT)) & CCM_CCGR4_CG13_MASK)
+#define CCM_CCGR4_CG14_MASK  (0x30000000U)
+#define CCM_CCGR4_CG14_SHIFT (28U)
+#define CCM_CCGR4_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG14_SHIFT)) & CCM_CCGR4_CG14_MASK)
+#define CCM_CCGR4_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR4_CG15_SHIFT (30U)
+#define CCM_CCGR4_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR4_CG15_SHIFT)) & CCM_CCGR4_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR5 - CCM Clock Gating Register 5 */
 /*! @{ */
-#define CCM_CCGR5_CG0_MASK                       (0x3U)
-#define CCM_CCGR5_CG0_SHIFT                      (0U)
-#define CCM_CCGR5_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG0_SHIFT)) & CCM_CCGR5_CG0_MASK)
-#define CCM_CCGR5_CG1_MASK                       (0xCU)
-#define CCM_CCGR5_CG1_SHIFT                      (2U)
-#define CCM_CCGR5_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG1_SHIFT)) & CCM_CCGR5_CG1_MASK)
-#define CCM_CCGR5_CG2_MASK                       (0x30U)
-#define CCM_CCGR5_CG2_SHIFT                      (4U)
-#define CCM_CCGR5_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG2_SHIFT)) & CCM_CCGR5_CG2_MASK)
-#define CCM_CCGR5_CG3_MASK                       (0xC0U)
-#define CCM_CCGR5_CG3_SHIFT                      (6U)
-#define CCM_CCGR5_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG3_SHIFT)) & CCM_CCGR5_CG3_MASK)
-#define CCM_CCGR5_CG4_MASK                       (0x300U)
-#define CCM_CCGR5_CG4_SHIFT                      (8U)
-#define CCM_CCGR5_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG4_SHIFT)) & CCM_CCGR5_CG4_MASK)
-#define CCM_CCGR5_CG5_MASK                       (0xC00U)
-#define CCM_CCGR5_CG5_SHIFT                      (10U)
-#define CCM_CCGR5_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG5_SHIFT)) & CCM_CCGR5_CG5_MASK)
-#define CCM_CCGR5_CG6_MASK                       (0x3000U)
-#define CCM_CCGR5_CG6_SHIFT                      (12U)
-#define CCM_CCGR5_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG6_SHIFT)) & CCM_CCGR5_CG6_MASK)
-#define CCM_CCGR5_CG7_MASK                       (0xC000U)
-#define CCM_CCGR5_CG7_SHIFT                      (14U)
-#define CCM_CCGR5_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG7_SHIFT)) & CCM_CCGR5_CG7_MASK)
-#define CCM_CCGR5_CG8_MASK                       (0x30000U)
-#define CCM_CCGR5_CG8_SHIFT                      (16U)
-#define CCM_CCGR5_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG8_SHIFT)) & CCM_CCGR5_CG8_MASK)
-#define CCM_CCGR5_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR5_CG9_SHIFT                      (18U)
-#define CCM_CCGR5_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG9_SHIFT)) & CCM_CCGR5_CG9_MASK)
-#define CCM_CCGR5_CG10_MASK                      (0x300000U)
-#define CCM_CCGR5_CG10_SHIFT                     (20U)
-#define CCM_CCGR5_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG10_SHIFT)) & CCM_CCGR5_CG10_MASK)
-#define CCM_CCGR5_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR5_CG11_SHIFT                     (22U)
-#define CCM_CCGR5_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG11_SHIFT)) & CCM_CCGR5_CG11_MASK)
-#define CCM_CCGR5_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR5_CG12_SHIFT                     (24U)
-#define CCM_CCGR5_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG12_SHIFT)) & CCM_CCGR5_CG12_MASK)
-#define CCM_CCGR5_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR5_CG13_SHIFT                     (26U)
-#define CCM_CCGR5_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG13_SHIFT)) & CCM_CCGR5_CG13_MASK)
-#define CCM_CCGR5_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR5_CG14_SHIFT                     (28U)
-#define CCM_CCGR5_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG14_SHIFT)) & CCM_CCGR5_CG14_MASK)
-#define CCM_CCGR5_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR5_CG15_SHIFT                     (30U)
-#define CCM_CCGR5_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG15_SHIFT)) & CCM_CCGR5_CG15_MASK)
+#define CCM_CCGR5_CG0_MASK   (0x3U)
+#define CCM_CCGR5_CG0_SHIFT  (0U)
+#define CCM_CCGR5_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG0_SHIFT)) & CCM_CCGR5_CG0_MASK)
+#define CCM_CCGR5_CG1_MASK   (0xCU)
+#define CCM_CCGR5_CG1_SHIFT  (2U)
+#define CCM_CCGR5_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG1_SHIFT)) & CCM_CCGR5_CG1_MASK)
+#define CCM_CCGR5_CG2_MASK   (0x30U)
+#define CCM_CCGR5_CG2_SHIFT  (4U)
+#define CCM_CCGR5_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG2_SHIFT)) & CCM_CCGR5_CG2_MASK)
+#define CCM_CCGR5_CG3_MASK   (0xC0U)
+#define CCM_CCGR5_CG3_SHIFT  (6U)
+#define CCM_CCGR5_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG3_SHIFT)) & CCM_CCGR5_CG3_MASK)
+#define CCM_CCGR5_CG4_MASK   (0x300U)
+#define CCM_CCGR5_CG4_SHIFT  (8U)
+#define CCM_CCGR5_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG4_SHIFT)) & CCM_CCGR5_CG4_MASK)
+#define CCM_CCGR5_CG5_MASK   (0xC00U)
+#define CCM_CCGR5_CG5_SHIFT  (10U)
+#define CCM_CCGR5_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG5_SHIFT)) & CCM_CCGR5_CG5_MASK)
+#define CCM_CCGR5_CG6_MASK   (0x3000U)
+#define CCM_CCGR5_CG6_SHIFT  (12U)
+#define CCM_CCGR5_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG6_SHIFT)) & CCM_CCGR5_CG6_MASK)
+#define CCM_CCGR5_CG7_MASK   (0xC000U)
+#define CCM_CCGR5_CG7_SHIFT  (14U)
+#define CCM_CCGR5_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG7_SHIFT)) & CCM_CCGR5_CG7_MASK)
+#define CCM_CCGR5_CG8_MASK   (0x30000U)
+#define CCM_CCGR5_CG8_SHIFT  (16U)
+#define CCM_CCGR5_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG8_SHIFT)) & CCM_CCGR5_CG8_MASK)
+#define CCM_CCGR5_CG9_MASK   (0xC0000U)
+#define CCM_CCGR5_CG9_SHIFT  (18U)
+#define CCM_CCGR5_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG9_SHIFT)) & CCM_CCGR5_CG9_MASK)
+#define CCM_CCGR5_CG10_MASK  (0x300000U)
+#define CCM_CCGR5_CG10_SHIFT (20U)
+#define CCM_CCGR5_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG10_SHIFT)) & CCM_CCGR5_CG10_MASK)
+#define CCM_CCGR5_CG11_MASK  (0xC00000U)
+#define CCM_CCGR5_CG11_SHIFT (22U)
+#define CCM_CCGR5_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG11_SHIFT)) & CCM_CCGR5_CG11_MASK)
+#define CCM_CCGR5_CG12_MASK  (0x3000000U)
+#define CCM_CCGR5_CG12_SHIFT (24U)
+#define CCM_CCGR5_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG12_SHIFT)) & CCM_CCGR5_CG12_MASK)
+#define CCM_CCGR5_CG13_MASK  (0xC000000U)
+#define CCM_CCGR5_CG13_SHIFT (26U)
+#define CCM_CCGR5_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG13_SHIFT)) & CCM_CCGR5_CG13_MASK)
+#define CCM_CCGR5_CG14_MASK  (0x30000000U)
+#define CCM_CCGR5_CG14_SHIFT (28U)
+#define CCM_CCGR5_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG14_SHIFT)) & CCM_CCGR5_CG14_MASK)
+#define CCM_CCGR5_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR5_CG15_SHIFT (30U)
+#define CCM_CCGR5_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR5_CG15_SHIFT)) & CCM_CCGR5_CG15_MASK)
 /*! @} */
 
 /*! @name CCGR6 - CCM Clock Gating Register 6 */
 /*! @{ */
-#define CCM_CCGR6_CG0_MASK                       (0x3U)
-#define CCM_CCGR6_CG0_SHIFT                      (0U)
-#define CCM_CCGR6_CG0(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG0_SHIFT)) & CCM_CCGR6_CG0_MASK)
-#define CCM_CCGR6_CG1_MASK                       (0xCU)
-#define CCM_CCGR6_CG1_SHIFT                      (2U)
-#define CCM_CCGR6_CG1(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG1_SHIFT)) & CCM_CCGR6_CG1_MASK)
-#define CCM_CCGR6_CG2_MASK                       (0x30U)
-#define CCM_CCGR6_CG2_SHIFT                      (4U)
-#define CCM_CCGR6_CG2(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG2_SHIFT)) & CCM_CCGR6_CG2_MASK)
-#define CCM_CCGR6_CG3_MASK                       (0xC0U)
-#define CCM_CCGR6_CG3_SHIFT                      (6U)
-#define CCM_CCGR6_CG3(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG3_SHIFT)) & CCM_CCGR6_CG3_MASK)
-#define CCM_CCGR6_CG4_MASK                       (0x300U)
-#define CCM_CCGR6_CG4_SHIFT                      (8U)
-#define CCM_CCGR6_CG4(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG4_SHIFT)) & CCM_CCGR6_CG4_MASK)
-#define CCM_CCGR6_CG5_MASK                       (0xC00U)
-#define CCM_CCGR6_CG5_SHIFT                      (10U)
-#define CCM_CCGR6_CG5(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG5_SHIFT)) & CCM_CCGR6_CG5_MASK)
-#define CCM_CCGR6_CG6_MASK                       (0x3000U)
-#define CCM_CCGR6_CG6_SHIFT                      (12U)
-#define CCM_CCGR6_CG6(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG6_SHIFT)) & CCM_CCGR6_CG6_MASK)
-#define CCM_CCGR6_CG7_MASK                       (0xC000U)
-#define CCM_CCGR6_CG7_SHIFT                      (14U)
-#define CCM_CCGR6_CG7(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG7_SHIFT)) & CCM_CCGR6_CG7_MASK)
-#define CCM_CCGR6_CG8_MASK                       (0x30000U)
-#define CCM_CCGR6_CG8_SHIFT                      (16U)
-#define CCM_CCGR6_CG8(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG8_SHIFT)) & CCM_CCGR6_CG8_MASK)
-#define CCM_CCGR6_CG9_MASK                       (0xC0000U)
-#define CCM_CCGR6_CG9_SHIFT                      (18U)
-#define CCM_CCGR6_CG9(x)                         (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG9_SHIFT)) & CCM_CCGR6_CG9_MASK)
-#define CCM_CCGR6_CG10_MASK                      (0x300000U)
-#define CCM_CCGR6_CG10_SHIFT                     (20U)
-#define CCM_CCGR6_CG10(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG10_SHIFT)) & CCM_CCGR6_CG10_MASK)
-#define CCM_CCGR6_CG11_MASK                      (0xC00000U)
-#define CCM_CCGR6_CG11_SHIFT                     (22U)
-#define CCM_CCGR6_CG11(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG11_SHIFT)) & CCM_CCGR6_CG11_MASK)
-#define CCM_CCGR6_CG12_MASK                      (0x3000000U)
-#define CCM_CCGR6_CG12_SHIFT                     (24U)
-#define CCM_CCGR6_CG12(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG12_SHIFT)) & CCM_CCGR6_CG12_MASK)
-#define CCM_CCGR6_CG13_MASK                      (0xC000000U)
-#define CCM_CCGR6_CG13_SHIFT                     (26U)
-#define CCM_CCGR6_CG13(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG13_SHIFT)) & CCM_CCGR6_CG13_MASK)
-#define CCM_CCGR6_CG14_MASK                      (0x30000000U)
-#define CCM_CCGR6_CG14_SHIFT                     (28U)
-#define CCM_CCGR6_CG14(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG14_SHIFT)) & CCM_CCGR6_CG14_MASK)
-#define CCM_CCGR6_CG15_MASK                      (0xC0000000U)
-#define CCM_CCGR6_CG15_SHIFT                     (30U)
-#define CCM_CCGR6_CG15(x)                        (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG15_SHIFT)) & CCM_CCGR6_CG15_MASK)
+#define CCM_CCGR6_CG0_MASK   (0x3U)
+#define CCM_CCGR6_CG0_SHIFT  (0U)
+#define CCM_CCGR6_CG0(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG0_SHIFT)) & CCM_CCGR6_CG0_MASK)
+#define CCM_CCGR6_CG1_MASK   (0xCU)
+#define CCM_CCGR6_CG1_SHIFT  (2U)
+#define CCM_CCGR6_CG1(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG1_SHIFT)) & CCM_CCGR6_CG1_MASK)
+#define CCM_CCGR6_CG2_MASK   (0x30U)
+#define CCM_CCGR6_CG2_SHIFT  (4U)
+#define CCM_CCGR6_CG2(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG2_SHIFT)) & CCM_CCGR6_CG2_MASK)
+#define CCM_CCGR6_CG3_MASK   (0xC0U)
+#define CCM_CCGR6_CG3_SHIFT  (6U)
+#define CCM_CCGR6_CG3(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG3_SHIFT)) & CCM_CCGR6_CG3_MASK)
+#define CCM_CCGR6_CG4_MASK   (0x300U)
+#define CCM_CCGR6_CG4_SHIFT  (8U)
+#define CCM_CCGR6_CG4(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG4_SHIFT)) & CCM_CCGR6_CG4_MASK)
+#define CCM_CCGR6_CG5_MASK   (0xC00U)
+#define CCM_CCGR6_CG5_SHIFT  (10U)
+#define CCM_CCGR6_CG5(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG5_SHIFT)) & CCM_CCGR6_CG5_MASK)
+#define CCM_CCGR6_CG6_MASK   (0x3000U)
+#define CCM_CCGR6_CG6_SHIFT  (12U)
+#define CCM_CCGR6_CG6(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG6_SHIFT)) & CCM_CCGR6_CG6_MASK)
+#define CCM_CCGR6_CG7_MASK   (0xC000U)
+#define CCM_CCGR6_CG7_SHIFT  (14U)
+#define CCM_CCGR6_CG7(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG7_SHIFT)) & CCM_CCGR6_CG7_MASK)
+#define CCM_CCGR6_CG8_MASK   (0x30000U)
+#define CCM_CCGR6_CG8_SHIFT  (16U)
+#define CCM_CCGR6_CG8(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG8_SHIFT)) & CCM_CCGR6_CG8_MASK)
+#define CCM_CCGR6_CG9_MASK   (0xC0000U)
+#define CCM_CCGR6_CG9_SHIFT  (18U)
+#define CCM_CCGR6_CG9(x)     (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG9_SHIFT)) & CCM_CCGR6_CG9_MASK)
+#define CCM_CCGR6_CG10_MASK  (0x300000U)
+#define CCM_CCGR6_CG10_SHIFT (20U)
+#define CCM_CCGR6_CG10(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG10_SHIFT)) & CCM_CCGR6_CG10_MASK)
+#define CCM_CCGR6_CG11_MASK  (0xC00000U)
+#define CCM_CCGR6_CG11_SHIFT (22U)
+#define CCM_CCGR6_CG11(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG11_SHIFT)) & CCM_CCGR6_CG11_MASK)
+#define CCM_CCGR6_CG12_MASK  (0x3000000U)
+#define CCM_CCGR6_CG12_SHIFT (24U)
+#define CCM_CCGR6_CG12(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG12_SHIFT)) & CCM_CCGR6_CG12_MASK)
+#define CCM_CCGR6_CG13_MASK  (0xC000000U)
+#define CCM_CCGR6_CG13_SHIFT (26U)
+#define CCM_CCGR6_CG13(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG13_SHIFT)) & CCM_CCGR6_CG13_MASK)
+#define CCM_CCGR6_CG14_MASK  (0x30000000U)
+#define CCM_CCGR6_CG14_SHIFT (28U)
+#define CCM_CCGR6_CG14(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG14_SHIFT)) & CCM_CCGR6_CG14_MASK)
+#define CCM_CCGR6_CG15_MASK  (0xC0000000U)
+#define CCM_CCGR6_CG15_SHIFT (30U)
+#define CCM_CCGR6_CG15(x)    (((uint32_t)(((uint32_t)(x)) << CCM_CCGR6_CG15_SHIFT)) & CCM_CCGR6_CG15_MASK)
 /*! @} */
 
 /*! @name CMEOR - CCM Module Enable Overide Register */
 /*! @{ */
-#define CCM_CMEOR_MOD_EN_OV_GPT_MASK             (0x20U)
-#define CCM_CMEOR_MOD_EN_OV_GPT_SHIFT            (5U)
-#define CCM_CMEOR_MOD_EN_OV_GPT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)
-#define CCM_CMEOR_MOD_EN_OV_PIT_MASK             (0x40U)
-#define CCM_CMEOR_MOD_EN_OV_PIT_SHIFT            (6U)
-#define CCM_CMEOR_MOD_EN_OV_PIT(x)               (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)
-#define CCM_CMEOR_MOD_EN_USDHC_MASK              (0x80U)
-#define CCM_CMEOR_MOD_EN_USDHC_SHIFT             (7U)
-#define CCM_CMEOR_MOD_EN_USDHC(x)                (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)
-#define CCM_CMEOR_MOD_EN_OV_TRNG_MASK            (0x200U)
-#define CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT           (9U)
-#define CCM_CMEOR_MOD_EN_OV_TRNG(x)              (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK        (0x10000000U)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT       (28U)
-#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK        (0x40000000U)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT       (30U)
-#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI(x)          (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)
+#define CCM_CMEOR_MOD_EN_OV_GPT_MASK  (0x20U)
+#define CCM_CMEOR_MOD_EN_OV_GPT_SHIFT (5U)
+#define CCM_CMEOR_MOD_EN_OV_GPT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_GPT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_GPT_MASK)
+#define CCM_CMEOR_MOD_EN_OV_PIT_MASK  (0x40U)
+#define CCM_CMEOR_MOD_EN_OV_PIT_SHIFT (6U)
+#define CCM_CMEOR_MOD_EN_OV_PIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_PIT_SHIFT)) & CCM_CMEOR_MOD_EN_OV_PIT_MASK)
+#define CCM_CMEOR_MOD_EN_USDHC_MASK  (0x80U)
+#define CCM_CMEOR_MOD_EN_USDHC_SHIFT (7U)
+#define CCM_CMEOR_MOD_EN_USDHC(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_USDHC_SHIFT)) & CCM_CMEOR_MOD_EN_USDHC_MASK)
+#define CCM_CMEOR_MOD_EN_OV_TRNG_MASK  (0x200U)
+#define CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT (9U)
+#define CCM_CMEOR_MOD_EN_OV_TRNG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_TRNG_SHIFT)) & CCM_CMEOR_MOD_EN_OV_TRNG_MASK)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK  (0x10000000U)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT (28U)
+#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN2_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN2_CPI_MASK)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK  (0x40000000U)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT (30U)
+#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_CMEOR_MOD_EN_OV_CAN1_CPI_SHIFT)) & CCM_CMEOR_MOD_EN_OV_CAN1_CPI_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CCM_Register_Masks */
 
-
 /* CCM - Peripheral instance base addresses */
 /** Peripheral CCM base address */
-#define CCM_BASE                                 (0x400FC000u)
+#define CCM_BASE (0x400FC000u)
 /** Peripheral CCM base pointer */
-#define CCM                                      ((CCM_Type *)CCM_BASE)
+#define CCM ((CCM_Type *)CCM_BASE)
 /** Array initializer of CCM peripheral base addresses */
-#define CCM_BASE_ADDRS                           { CCM_BASE }
+#define CCM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        CCM_BASE                                                                                                       \
+    }
 /** Array initializer of CCM peripheral base pointers */
-#define CCM_BASE_PTRS                            { CCM }
+#define CCM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        CCM                                                                                                            \
+    }
 /** Interrupt vectors for the CCM peripheral type */
-#define CCM_IRQS                                 { CCM_1_IRQn, CCM_2_IRQn }
+#define CCM_IRQS                                                                                                       \
+    {                                                                                                                  \
+        CCM_1_IRQn, CCM_2_IRQn                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group CCM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CCM_ANALOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -3892,70 +4282,71 @@ typedef struct {
  */
 
 /** CCM_ANALOG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t PLL_ARM;                           /**< Analog ARM PLL control Register, offset: 0x0 */
-  __IO uint32_t PLL_ARM_SET;                       /**< Analog ARM PLL control Register, offset: 0x4 */
-  __IO uint32_t PLL_ARM_CLR;                       /**< Analog ARM PLL control Register, offset: 0x8 */
-  __IO uint32_t PLL_ARM_TOG;                       /**< Analog ARM PLL control Register, offset: 0xC */
-  __IO uint32_t PLL_USB1;                          /**< Analog USB1 480MHz PLL Control Register, offset: 0x10 */
-  __IO uint32_t PLL_USB1_SET;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x14 */
-  __IO uint32_t PLL_USB1_CLR;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x18 */
-  __IO uint32_t PLL_USB1_TOG;                      /**< Analog USB1 480MHz PLL Control Register, offset: 0x1C */
-  __IO uint32_t PLL_USB2;                          /**< Analog USB2 480MHz PLL Control Register, offset: 0x20 */
-  __IO uint32_t PLL_USB2_SET;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x24 */
-  __IO uint32_t PLL_USB2_CLR;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x28 */
-  __IO uint32_t PLL_USB2_TOG;                      /**< Analog USB2 480MHz PLL Control Register, offset: 0x2C */
-  __IO uint32_t PLL_SYS;                           /**< Analog System PLL Control Register, offset: 0x30 */
-  __IO uint32_t PLL_SYS_SET;                       /**< Analog System PLL Control Register, offset: 0x34 */
-  __IO uint32_t PLL_SYS_CLR;                       /**< Analog System PLL Control Register, offset: 0x38 */
-  __IO uint32_t PLL_SYS_TOG;                       /**< Analog System PLL Control Register, offset: 0x3C */
-  __IO uint32_t PLL_SYS_SS;                        /**< 528MHz System PLL Spread Spectrum Register, offset: 0x40 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t PLL_SYS_NUM;                       /**< Numerator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x50 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t PLL_SYS_DENOM;                     /**< Denominator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x60 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t PLL_AUDIO;                         /**< Analog Audio PLL control Register, offset: 0x70 */
-  __IO uint32_t PLL_AUDIO_SET;                     /**< Analog Audio PLL control Register, offset: 0x74 */
-  __IO uint32_t PLL_AUDIO_CLR;                     /**< Analog Audio PLL control Register, offset: 0x78 */
-  __IO uint32_t PLL_AUDIO_TOG;                     /**< Analog Audio PLL control Register, offset: 0x7C */
-  __IO uint32_t PLL_AUDIO_NUM;                     /**< Numerator of Audio PLL Fractional Loop Divider Register, offset: 0x80 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t PLL_AUDIO_DENOM;                   /**< Denominator of Audio PLL Fractional Loop Divider Register, offset: 0x90 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t PLL_VIDEO;                         /**< Analog Video PLL control Register, offset: 0xA0 */
-  __IO uint32_t PLL_VIDEO_SET;                     /**< Analog Video PLL control Register, offset: 0xA4 */
-  __IO uint32_t PLL_VIDEO_CLR;                     /**< Analog Video PLL control Register, offset: 0xA8 */
-  __IO uint32_t PLL_VIDEO_TOG;                     /**< Analog Video PLL control Register, offset: 0xAC */
-  __IO uint32_t PLL_VIDEO_NUM;                     /**< Numerator of Video PLL Fractional Loop Divider Register, offset: 0xB0 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t PLL_VIDEO_DENOM;                   /**< Denominator of Video PLL Fractional Loop Divider Register, offset: 0xC0 */
-       uint8_t RESERVED_6[28];
-  __IO uint32_t PLL_ENET;                          /**< Analog ENET PLL Control Register, offset: 0xE0 */
-  __IO uint32_t PLL_ENET_SET;                      /**< Analog ENET PLL Control Register, offset: 0xE4 */
-  __IO uint32_t PLL_ENET_CLR;                      /**< Analog ENET PLL Control Register, offset: 0xE8 */
-  __IO uint32_t PLL_ENET_TOG;                      /**< Analog ENET PLL Control Register, offset: 0xEC */
-  __IO uint32_t PFD_480;                           /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF0 */
-  __IO uint32_t PFD_480_SET;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF4 */
-  __IO uint32_t PFD_480_CLR;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF8 */
-  __IO uint32_t PFD_480_TOG;                       /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xFC */
-  __IO uint32_t PFD_528;                           /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x100 */
-  __IO uint32_t PFD_528_SET;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x104 */
-  __IO uint32_t PFD_528_CLR;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x108 */
-  __IO uint32_t PFD_528_TOG;                       /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x10C */
-       uint8_t RESERVED_7[64];
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-  __IO uint32_t MISC1;                             /**< Miscellaneous Register 1, offset: 0x160 */
-  __IO uint32_t MISC1_SET;                         /**< Miscellaneous Register 1, offset: 0x164 */
-  __IO uint32_t MISC1_CLR;                         /**< Miscellaneous Register 1, offset: 0x168 */
-  __IO uint32_t MISC1_TOG;                         /**< Miscellaneous Register 1, offset: 0x16C */
-  __IO uint32_t MISC2;                             /**< Miscellaneous Register 2, offset: 0x170 */
-  __IO uint32_t MISC2_SET;                         /**< Miscellaneous Register 2, offset: 0x174 */
-  __IO uint32_t MISC2_CLR;                         /**< Miscellaneous Register 2, offset: 0x178 */
-  __IO uint32_t MISC2_TOG;                         /**< Miscellaneous Register 2, offset: 0x17C */
+typedef struct
+{
+    __IO uint32_t PLL_ARM;      /**< Analog ARM PLL control Register, offset: 0x0 */
+    __IO uint32_t PLL_ARM_SET;  /**< Analog ARM PLL control Register, offset: 0x4 */
+    __IO uint32_t PLL_ARM_CLR;  /**< Analog ARM PLL control Register, offset: 0x8 */
+    __IO uint32_t PLL_ARM_TOG;  /**< Analog ARM PLL control Register, offset: 0xC */
+    __IO uint32_t PLL_USB1;     /**< Analog USB1 480MHz PLL Control Register, offset: 0x10 */
+    __IO uint32_t PLL_USB1_SET; /**< Analog USB1 480MHz PLL Control Register, offset: 0x14 */
+    __IO uint32_t PLL_USB1_CLR; /**< Analog USB1 480MHz PLL Control Register, offset: 0x18 */
+    __IO uint32_t PLL_USB1_TOG; /**< Analog USB1 480MHz PLL Control Register, offset: 0x1C */
+    __IO uint32_t PLL_USB2;     /**< Analog USB2 480MHz PLL Control Register, offset: 0x20 */
+    __IO uint32_t PLL_USB2_SET; /**< Analog USB2 480MHz PLL Control Register, offset: 0x24 */
+    __IO uint32_t PLL_USB2_CLR; /**< Analog USB2 480MHz PLL Control Register, offset: 0x28 */
+    __IO uint32_t PLL_USB2_TOG; /**< Analog USB2 480MHz PLL Control Register, offset: 0x2C */
+    __IO uint32_t PLL_SYS;      /**< Analog System PLL Control Register, offset: 0x30 */
+    __IO uint32_t PLL_SYS_SET;  /**< Analog System PLL Control Register, offset: 0x34 */
+    __IO uint32_t PLL_SYS_CLR;  /**< Analog System PLL Control Register, offset: 0x38 */
+    __IO uint32_t PLL_SYS_TOG;  /**< Analog System PLL Control Register, offset: 0x3C */
+    __IO uint32_t PLL_SYS_SS;   /**< 528MHz System PLL Spread Spectrum Register, offset: 0x40 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t PLL_SYS_NUM; /**< Numerator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x50 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t PLL_SYS_DENOM; /**< Denominator of 528MHz System PLL Fractional Loop Divider Register, offset: 0x60 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t PLL_AUDIO;     /**< Analog Audio PLL control Register, offset: 0x70 */
+    __IO uint32_t PLL_AUDIO_SET; /**< Analog Audio PLL control Register, offset: 0x74 */
+    __IO uint32_t PLL_AUDIO_CLR; /**< Analog Audio PLL control Register, offset: 0x78 */
+    __IO uint32_t PLL_AUDIO_TOG; /**< Analog Audio PLL control Register, offset: 0x7C */
+    __IO uint32_t PLL_AUDIO_NUM; /**< Numerator of Audio PLL Fractional Loop Divider Register, offset: 0x80 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t PLL_AUDIO_DENOM; /**< Denominator of Audio PLL Fractional Loop Divider Register, offset: 0x90 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t PLL_VIDEO;     /**< Analog Video PLL control Register, offset: 0xA0 */
+    __IO uint32_t PLL_VIDEO_SET; /**< Analog Video PLL control Register, offset: 0xA4 */
+    __IO uint32_t PLL_VIDEO_CLR; /**< Analog Video PLL control Register, offset: 0xA8 */
+    __IO uint32_t PLL_VIDEO_TOG; /**< Analog Video PLL control Register, offset: 0xAC */
+    __IO uint32_t PLL_VIDEO_NUM; /**< Numerator of Video PLL Fractional Loop Divider Register, offset: 0xB0 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t PLL_VIDEO_DENOM; /**< Denominator of Video PLL Fractional Loop Divider Register, offset: 0xC0 */
+    uint8_t RESERVED_6[28];
+    __IO uint32_t PLL_ENET;     /**< Analog ENET PLL Control Register, offset: 0xE0 */
+    __IO uint32_t PLL_ENET_SET; /**< Analog ENET PLL Control Register, offset: 0xE4 */
+    __IO uint32_t PLL_ENET_CLR; /**< Analog ENET PLL Control Register, offset: 0xE8 */
+    __IO uint32_t PLL_ENET_TOG; /**< Analog ENET PLL Control Register, offset: 0xEC */
+    __IO uint32_t PFD_480;      /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF0 */
+    __IO uint32_t PFD_480_SET;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF4 */
+    __IO uint32_t PFD_480_CLR;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xF8 */
+    __IO uint32_t PFD_480_TOG;  /**< 480MHz Clock (PLL3) Phase Fractional Divider Control Register, offset: 0xFC */
+    __IO uint32_t PFD_528;      /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x100 */
+    __IO uint32_t PFD_528_SET;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x104 */
+    __IO uint32_t PFD_528_CLR;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x108 */
+    __IO uint32_t PFD_528_TOG;  /**< 528MHz Clock (PLL2) Phase Fractional Divider Control Register, offset: 0x10C */
+    uint8_t RESERVED_7[64];
+    __IO uint32_t MISC0;     /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET; /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR; /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG; /**< Miscellaneous Register 0, offset: 0x15C */
+    __IO uint32_t MISC1;     /**< Miscellaneous Register 1, offset: 0x160 */
+    __IO uint32_t MISC1_SET; /**< Miscellaneous Register 1, offset: 0x164 */
+    __IO uint32_t MISC1_CLR; /**< Miscellaneous Register 1, offset: 0x168 */
+    __IO uint32_t MISC1_TOG; /**< Miscellaneous Register 1, offset: 0x16C */
+    __IO uint32_t MISC2;     /**< Miscellaneous Register 2, offset: 0x170 */
+    __IO uint32_t MISC2_SET; /**< Miscellaneous Register 2, offset: 0x174 */
+    __IO uint32_t MISC2_CLR; /**< Miscellaneous Register 2, offset: 0x178 */
+    __IO uint32_t MISC2_TOG; /**< Miscellaneous Register 2, offset: 0x17C */
 } CCM_ANALOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -3969,1688 +4360,2383 @@ typedef struct {
 
 /*! @name PLL_ARM - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK       (0x7FU)
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT      (0U)
-#define CCM_ANALOG_PLL_ARM_DIV_SELECT(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN_MASK        (0x1000U)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT       (12U)
-#define CCM_ANALOG_PLL_ARM_POWERDOWN(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_ENABLE_MASK           (0x2000U)
-#define CCM_ANALOG_PLL_ARM_ENABLE_SHIFT          (13U)
-#define CCM_ANALOG_PLL_ARM_ENABLE(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK   (0xC000U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT  (14U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_BYPASS_MASK           (0x10000U)
-#define CCM_ANALOG_PLL_ARM_BYPASS_SHIFT          (16U)
-#define CCM_ANALOG_PLL_ARM_BYPASS(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL_MASK          (0x80000U)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT         (19U)
-#define CCM_ANALOG_PLL_ARM_PLL_SEL(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_LOCK_MASK             (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_LOCK_SHIFT            (31U)
-#define CCM_ANALOG_PLL_ARM_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_ENABLE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK  (0xC000U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT (14U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_BYPASS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_SET - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_SET_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_SET_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_SET_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_SET_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_SET_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_SET_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_SET_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_SET_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_SET_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_CLR - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_CLR_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_CLR_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_CLR_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_CLR_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_CLR_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_CLR_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_CLR_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_CLR_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ARM_TOG - Analog ARM PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK   (0x7FU)
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_ARM_TOG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ARM_TOG_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ARM_TOG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_ARM_TOG_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK      (0x80000U)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT     (19U)
-#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_ARM_TOG_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ARM_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ARM_TOG_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK  (0x80000U)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT (19U)
+#define CCM_ANALOG_PLL_ARM_TOG_PLL_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_PLL_SEL_MASK)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ARM_TOG_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ARM_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ARM_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1 - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK      (0x2U)
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT     (1U)
-#define CCM_ANALOG_PLL_USB1_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK     (0x40U)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT    (6U)
-#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_POWER_MASK           (0x1000U)
-#define CCM_ANALOG_PLL_USB1_POWER_SHIFT          (12U)
-#define CCM_ANALOG_PLL_USB1_POWER(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_USB1_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_USB1_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK  (0x2U)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT (1U)
+#define CCM_ANALOG_PLL_USB1_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK  (0x40U)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT (6U)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_POWER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_ENABLE_MASK)
 #define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_USB1_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_USB1_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_USB1_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_SET - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_SET_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_SET_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_SET_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_CLR - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_CLR_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_CLR_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_CLR_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB1_TOG - Analog USB1 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB1_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB1_TOG_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_POWER_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB1_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB1_TOG_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB1_TOG_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_POWER_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB1_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB1_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB1_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB1_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB1_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB1_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB1_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB1_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2 - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK      (0x2U)
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT     (1U)
-#define CCM_ANALOG_PLL_USB2_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK     (0x40U)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT    (6U)
-#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_POWER_MASK           (0x1000U)
-#define CCM_ANALOG_PLL_USB2_POWER_SHIFT          (12U)
-#define CCM_ANALOG_PLL_USB2_POWER(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_USB2_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_USB2_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK  (0x2U)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT (1U)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK  (0x40U)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT (6U)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLKS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_POWER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_ENABLE_MASK)
 #define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_USB2_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_USB2_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_USB2_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_SET - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_SET_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_SET_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_SET_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_CLR - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_CLR_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_CLR_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_CLR_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_USB2_TOG - Analog USB2 480MHz PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK  (0x2U)
 #define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT (1U)
-#define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK (0x40U)
+#define CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_USB2_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK  (0x40U)
 #define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT (6U)
-#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT      (12U)
-#define CCM_ANALOG_PLL_USB2_TOG_POWER(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_POWER_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_USB2_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_USB2_TOG_EN_USB_CLKS_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT (12U)
+#define CCM_ANALOG_PLL_USB2_TOG_POWER(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_POWER_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_POWER_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_USB2_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_USB2_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_USB2_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_USB2_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_USB2_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_USB2_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_USB2_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_USB2_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK       (0x1U)
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT      (0U)
-#define CCM_ANALOG_PLL_SYS_DIV_SELECT(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN_MASK        (0x1000U)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT       (12U)
-#define CCM_ANALOG_PLL_SYS_POWERDOWN(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_ENABLE_MASK           (0x2000U)
-#define CCM_ANALOG_PLL_SYS_ENABLE_SHIFT          (13U)
-#define CCM_ANALOG_PLL_SYS_ENABLE(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK   (0xC000U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT  (14U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_BYPASS_MASK           (0x10000U)
-#define CCM_ANALOG_PLL_SYS_BYPASS_SHIFT          (16U)
-#define CCM_ANALOG_PLL_SYS_BYPASS(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK    (0x40000U)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT   (18U)
-#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_LOCK_MASK             (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_LOCK_SHIFT            (31U)
-#define CCM_ANALOG_PLL_SYS_LOCK(x)               (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_DIV_SELECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_POWERDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_ENABLE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK  (0xC000U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT (14U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_BYPASS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK  (0x40000U)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT (18U)
+#define CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_LOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_SET - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_SET_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_SET_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_SET_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_SET_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_SET_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_SET_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_SET_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_SET_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_CLR - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_CLR_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_CLR_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_CLR_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_CLR_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_CLR_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_CLR_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_CLR_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_TOG - Analog System PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK   (0x1U)
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT  (0U)
-#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK    (0x1000U)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT   (12U)
-#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK       (0x2000U)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT      (13U)
-#define CCM_ANALOG_PLL_SYS_TOG_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK  (0x1U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_SYS_TOG_POWERDOWN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_SYS_TOG_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK       (0x10000U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT      (16U)
-#define CCM_ANALOG_PLL_SYS_TOG_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_SYS_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_TOG_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK         (0x80000000U)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT        (31U)
-#define CCM_ANALOG_PLL_SYS_TOG_LOCK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_SYS_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_SYS_TOG_LOCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_SYS_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_SS - 528MHz System PLL Spread Spectrum Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_SS_STEP_MASK          (0x7FFFU)
-#define CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT         (0U)
-#define CCM_ANALOG_PLL_SYS_SS_STEP(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STEP_MASK)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK        (0x8000U)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT       (15U)
-#define CCM_ANALOG_PLL_SYS_SS_ENABLE(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK)
-#define CCM_ANALOG_PLL_SYS_SS_STOP_MASK          (0xFFFF0000U)
-#define CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT         (16U)
-#define CCM_ANALOG_PLL_SYS_SS_STOP(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STOP_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_STEP_MASK  (0x7FFFU)
+#define CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_SS_STEP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STEP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STEP_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK  (0x8000U)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT (15U)
+#define CCM_ANALOG_PLL_SYS_SS_ENABLE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_ENABLE_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_ENABLE_MASK)
+#define CCM_ANALOG_PLL_SYS_SS_STOP_MASK  (0xFFFF0000U)
+#define CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT (16U)
+#define CCM_ANALOG_PLL_SYS_SS_STOP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_SS_STOP_SHIFT)) & CCM_ANALOG_PLL_SYS_SS_STOP_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_NUM - Numerator of 528MHz System PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_NUM_A_MASK            (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_SYS_NUM_A_SHIFT           (0U)
-#define CCM_ANALOG_PLL_SYS_NUM_A(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_NUM_A_SHIFT)) & CCM_ANALOG_PLL_SYS_NUM_A_MASK)
+#define CCM_ANALOG_PLL_SYS_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_SYS_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_NUM_A(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_NUM_A_SHIFT)) & CCM_ANALOG_PLL_SYS_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_SYS_DENOM - Denominator of 528MHz System PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_SYS_DENOM_B_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT         (0U)
-#define CCM_ANALOG_PLL_SYS_DENOM_B(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_SYS_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_SYS_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_SYS_DENOM_B(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_SYS_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_SYS_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK     (0x7FU)
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT    (0U)
-#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK      (0x1000U)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT     (12U)
-#define CCM_ANALOG_PLL_AUDIO_POWERDOWN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE_MASK         (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT        (13U)
-#define CCM_ANALOG_PLL_AUDIO_ENABLE(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_AUDIO_POWERDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_MASK         (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT        (16U)
-#define CCM_ANALOG_PLL_AUDIO_BYPASS(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_BYPASS_MASK)
 #define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_LOCK_MASK           (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT          (31U)
-#define CCM_ANALOG_PLL_AUDIO_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_SET - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_SET_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_SET_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_SET_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_SET_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_SET_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_SET_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_CLR - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_CLR_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_CLR_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_CLR_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_TOG - Analog Audio PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_AUDIO_TOG_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_AUDIO_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_AUDIO_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_AUDIO_TOG_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_AUDIO_TOG_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_AUDIO_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_NUM - Numerator of Audio PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_NUM_A_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT         (0U)
-#define CCM_ANALOG_PLL_AUDIO_NUM_A(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_AUDIO_NUM_A_MASK)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_NUM_A(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_AUDIO_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_AUDIO_DENOM - Denominator of Audio PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK        (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT       (0U)
-#define CCM_ANALOG_PLL_AUDIO_DENOM_B(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_AUDIO_DENOM_B(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_AUDIO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_AUDIO_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK     (0x7FU)
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT    (0U)
-#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK      (0x1000U)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT     (12U)
-#define CCM_ANALOG_PLL_VIDEO_POWERDOWN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK         (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT        (13U)
-#define CCM_ANALOG_PLL_VIDEO_ENABLE(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK  (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_VIDEO_POWERDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_MASK         (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT        (16U)
-#define CCM_ANALOG_PLL_VIDEO_BYPASS(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_BYPASS_MASK)
 #define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_LOCK_MASK           (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT          (31U)
-#define CCM_ANALOG_PLL_VIDEO_LOCK(x)             (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_SHIFT)) &                                     \
+     CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_LOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_SET - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_SET_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_SET_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_SET_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_SET_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_SET_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_SET_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_CLR - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_CLR_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_CLR_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_CLR_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_TOG - Analog Video PLL control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK (0x7FU)
+#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK  (0x7FU)
 #define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_VIDEO_TOG_DIV_SELECT_MASK)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK  (0x1000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT (12U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK     (0x2000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT    (13U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_VIDEO_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_ENABLE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK     (0x10000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT    (16U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_BYPASS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK (0x180000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_VIDEO_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK  (0x180000U)
 #define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT (19U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK       (0x80000000U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT      (31U)
-#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_SHIFT)) &                                 \
+     CCM_ANALOG_PLL_VIDEO_TOG_POST_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_VIDEO_TOG_LOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_VIDEO_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_NUM - Numerator of Video PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_NUM_A_MASK          (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT         (0U)
-#define CCM_ANALOG_PLL_VIDEO_NUM_A(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_VIDEO_NUM_A_MASK)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_NUM_A(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_NUM_A_SHIFT)) & CCM_ANALOG_PLL_VIDEO_NUM_A_MASK)
 /*! @} */
 
 /*! @name PLL_VIDEO_DENOM - Denominator of Video PLL Fractional Loop Divider Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK        (0x3FFFFFFFU)
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT       (0U)
-#define CCM_ANALOG_PLL_VIDEO_DENOM_B(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK  (0x3FFFFFFFU)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT (0U)
+#define CCM_ANALOG_PLL_VIDEO_DENOM_B(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_DENOM_B_SHIFT)) & CCM_ANALOG_PLL_VIDEO_DENOM_B_MASK)
 /*! @} */
 
 /*! @name PLL_ENET - Analog ENET PLL Control Register */
 /*! @{ */
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK      (0x3U)
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT     (0U)
-#define CCM_ANALOG_PLL_ENET_DIV_SELECT(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN_MASK       (0x1000U)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT      (12U)
-#define CCM_ANALOG_PLL_ENET_POWERDOWN(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_ENABLE_MASK          (0x2000U)
-#define CCM_ANALOG_PLL_ENET_ENABLE_SHIFT         (13U)
-#define CCM_ANALOG_PLL_ENET_ENABLE(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK  (0x3U)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT (0U)
+#define CCM_ANALOG_PLL_ENET_DIV_SELECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_POWERDOWN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_ENABLE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_ENABLE_MASK)
 #define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_BYPASS_MASK          (0x10000U)
-#define CCM_ANALOG_PLL_ENET_BYPASS_SHIFT         (16U)
-#define CCM_ANALOG_PLL_ENET_BYPASS(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK   (0x40000U)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT  (18U)
-#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_BYPASS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK  (0x40000U)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT (18U)
+#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_LOCK_MASK            (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_LOCK_SHIFT           (31U)
-#define CCM_ANALOG_PLL_ENET_LOCK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT)) &                                      \
+     CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_LOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_SET - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_SET_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_SET_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_SET_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_SET_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_SET_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_SET_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_SET_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_SET_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_SET_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_SET_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_SET_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_SET_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_SET_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_CLR - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_CLR_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_CLR_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_CLR_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_CLR_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_CLR_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_CLR_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_CLR_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_CLR_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_CLR_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_CLR_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_CLR_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name PLL_ENET_TOG - Analog ENET PLL Control Register */
 /*! @{ */
 #define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK  (0x3U)
 #define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT (0U)
-#define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK   (0x1000U)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT  (12U)
-#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK      (0x2000U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT     (13U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_SHIFT)) &                                       \
+     CCM_ANALOG_PLL_ENET_TOG_DIV_SELECT_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK  (0x1000U)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT (12U)
+#define CCM_ANALOG_PLL_ENET_TOG_POWERDOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_POWERDOWN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK  (0x2000U)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT (13U)
+#define CCM_ANALOG_PLL_ENET_TOG_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENABLE_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENABLE_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT (14U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK      (0x10000U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT     (16U)
-#define CCM_ANALOG_PLL_ENET_TOG_BYPASS(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK (0x40000U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_SHIFT)) &                                   \
+     CCM_ANALOG_PLL_ENET_TOG_BYPASS_CLK_SRC_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK  (0x10000U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT (16U)
+#define CCM_ANALOG_PLL_ENET_TOG_BYPASS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_BYPASS_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_BYPASS_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK  (0x40000U)
 #define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT (18U)
-#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK (0x200000U)
+#define CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_SHIFT)) &                                    \
+     CCM_ANALOG_PLL_ENET_TOG_PFD_OFFSET_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK  (0x200000U)
 #define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT (21U)
-#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK        (0x80000000U)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT       (31U)
-#define CCM_ANALOG_PLL_ENET_TOG_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_SHIFT)) &                                  \
+     CCM_ANALOG_PLL_ENET_TOG_ENET_25M_REF_EN_MASK)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK  (0x80000000U)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT (31U)
+#define CCM_ANALOG_PLL_ENET_TOG_LOCK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_ENET_TOG_LOCK_SHIFT)) & CCM_ANALOG_PLL_ENET_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name PFD_480 - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_PFD0_FRAC_MASK        (0x3FU)
-#define CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT       (0U)
-#define CCM_ANALOG_PFD_480_PFD0_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE_MASK      (0x40U)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT     (6U)
-#define CCM_ANALOG_PFD_480_PFD0_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK     (0x80U)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT    (7U)
-#define CCM_ANALOG_PFD_480_PFD0_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC_MASK        (0x3F00U)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT       (8U)
-#define CCM_ANALOG_PFD_480_PFD1_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE_MASK      (0x4000U)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT     (14U)
-#define CCM_ANALOG_PFD_480_PFD1_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK     (0x8000U)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT    (15U)
-#define CCM_ANALOG_PFD_480_PFD1_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC_MASK        (0x3F0000U)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT       (16U)
-#define CCM_ANALOG_PFD_480_PFD2_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE_MASK      (0x400000U)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT     (22U)
-#define CCM_ANALOG_PFD_480_PFD2_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK     (0x800000U)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT    (23U)
-#define CCM_ANALOG_PFD_480_PFD2_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC_MASK        (0x3F000000U)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT       (24U)
-#define CCM_ANALOG_PFD_480_PFD3_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE_MASK      (0x40000000U)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT     (30U)
-#define CCM_ANALOG_PFD_480_PFD3_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK     (0x80000000U)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT    (31U)
-#define CCM_ANALOG_PFD_480_PFD3_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_PFD0_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE_MASK  (0x40U)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT (6U)
+#define CCM_ANALOG_PFD_480_PFD0_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK  (0x80U)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT (7U)
+#define CCM_ANALOG_PFD_480_PFD0_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_PFD1_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE_MASK  (0x4000U)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT (14U)
+#define CCM_ANALOG_PFD_480_PFD1_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK  (0x8000U)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT (15U)
+#define CCM_ANALOG_PFD_480_PFD1_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_PFD2_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE_MASK  (0x400000U)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT (22U)
+#define CCM_ANALOG_PFD_480_PFD2_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK  (0x800000U)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT (23U)
+#define CCM_ANALOG_PFD_480_PFD2_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_PFD3_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE_MASK  (0x40000000U)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT (30U)
+#define CCM_ANALOG_PFD_480_PFD3_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK  (0x80000000U)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT (31U)
+#define CCM_ANALOG_PFD_480_PFD3_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_SET - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_SET_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_SET_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_SET_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_SET_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_SET_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_SET_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_SET_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_CLR - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_CLR_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_CLR_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_480_TOG - 480MHz Clock (PLL3) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_480_TOG_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_480_TOG_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528 - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_PFD0_FRAC_MASK        (0x3FU)
-#define CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT       (0U)
-#define CCM_ANALOG_PFD_528_PFD0_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE_MASK      (0x40U)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT     (6U)
-#define CCM_ANALOG_PFD_528_PFD0_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK     (0x80U)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT    (7U)
-#define CCM_ANALOG_PFD_528_PFD0_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC_MASK        (0x3F00U)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT       (8U)
-#define CCM_ANALOG_PFD_528_PFD1_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE_MASK      (0x4000U)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT     (14U)
-#define CCM_ANALOG_PFD_528_PFD1_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK     (0x8000U)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT    (15U)
-#define CCM_ANALOG_PFD_528_PFD1_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC_MASK        (0x3F0000U)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT       (16U)
-#define CCM_ANALOG_PFD_528_PFD2_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE_MASK      (0x400000U)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT     (22U)
-#define CCM_ANALOG_PFD_528_PFD2_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK     (0x800000U)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT    (23U)
-#define CCM_ANALOG_PFD_528_PFD2_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC_MASK        (0x3F000000U)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT       (24U)
-#define CCM_ANALOG_PFD_528_PFD3_FRAC(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE_MASK      (0x40000000U)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT     (30U)
-#define CCM_ANALOG_PFD_528_PFD3_STABLE(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK     (0x80000000U)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT    (31U)
-#define CCM_ANALOG_PFD_528_PFD3_CLKGATE(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_PFD0_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE_MASK  (0x40U)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT (6U)
+#define CCM_ANALOG_PFD_528_PFD0_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK  (0x80U)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT (7U)
+#define CCM_ANALOG_PFD_528_PFD0_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_PFD1_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE_MASK  (0x4000U)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT (14U)
+#define CCM_ANALOG_PFD_528_PFD1_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK  (0x8000U)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT (15U)
+#define CCM_ANALOG_PFD_528_PFD1_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_PFD2_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE_MASK  (0x400000U)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT (22U)
+#define CCM_ANALOG_PFD_528_PFD2_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK  (0x800000U)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT (23U)
+#define CCM_ANALOG_PFD_528_PFD2_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_PFD3_FRAC(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE_MASK  (0x40000000U)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT (30U)
+#define CCM_ANALOG_PFD_528_PFD3_STABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK  (0x80000000U)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT (31U)
+#define CCM_ANALOG_PFD_528_PFD3_CLKGATE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_SET - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_SET_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_SET_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_SET_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_SET_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_SET_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_SET_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_SET_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_CLR - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_CLR_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_CLR_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name PFD_528_TOG - 528MHz Clock (PLL2) Phase Fractional Divider Control Register */
 /*! @{ */
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK    (0x3FU)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT   (0U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK  (0x3FU)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT (0U)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK  (0x40U)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT (6U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK (0x80U)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD0_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK  (0x80U)
 #define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT (7U)
-#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK    (0x3F00U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT   (8U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD0_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK  (0x3F00U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT (8U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK  (0x4000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT (14U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK (0x8000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD1_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK  (0x8000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT (15U)
-#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK    (0x3F0000U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT   (16U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD1_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK  (0x3F0000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT (16U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK  (0x400000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT (22U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK (0x800000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD2_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK  (0x800000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT (23U)
-#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK    (0x3F000000U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT   (24U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD2_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK  (0x3F000000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT (24U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_FRAC(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_FRAC_MASK)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK  (0x40000000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT (30U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK (0x80000000U)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_STABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_SHIFT)) &                                       \
+     CCM_ANALOG_PFD_528_TOG_PFD3_STABLE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK  (0x80000000U)
 #define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT (31U)
-#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT)) & CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK)
+#define CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_SHIFT)) &                                      \
+     CCM_ANALOG_PFD_528_TOG_PFD3_CLKGATE_MASK)
 /*! @} */
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_REFTOP_PWD_MASK         (0x1U)
-#define CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT        (0U)
-#define CCM_ANALOG_MISC0_REFTOP_PWD(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_REFTOP_PWD(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK      (0x70U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT     (4U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGADJ(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK       (0x80U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT      (7U)
-#define CCM_ANALOG_MISC0_REFTOP_VBGUP(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK   (0xC00U)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT  (10U)
-#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK   (0x1000U)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT  (12U)
-#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_OSC_I_MASK              (0x6000U)
-#define CCM_ANALOG_MISC0_OSC_I_SHIFT             (13U)
-#define CCM_ANALOG_MISC0_OSC_I(x)                (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_MASK         (0x8000U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT        (15U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_MASK)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK      (0x10000U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT     (16U)
-#define CCM_ANALOG_MISC0_OSC_XTALOK_EN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK       (0x2000000U)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT      (25U)
-#define CCM_ANALOG_MISC0_CLKGATE_CTRL(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK      (0x1C000000U)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT     (26U)
-#define CCM_ANALOG_MISC0_CLKGATE_DELAY(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK    (0x20000000U)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT   (29U)
-#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK       (0x40000000U)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT      (30U)
-#define CCM_ANALOG_MISC0_XTAL_24M_PWD(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_SHIFT)) &                                      \
+     CCM_ANALOG_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGADJ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_REFTOP_VBGUP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define CCM_ANALOG_MISC0_STOP_MODE_CONFIG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define CCM_ANALOG_MISC0_DISCON_HIGH_SNVS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_OSC_I(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define CCM_ANALOG_MISC0_OSC_XTALOK_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_CLKGATE_CTRL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define CCM_ANALOG_MISC0_CLKGATE_DELAY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define CCM_ANALOG_MISC0_RTC_XTAL_SOURCE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_XTAL_24M_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_SET_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_SET_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_SET_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_SET_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_SET_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_SET_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_SET_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_SET_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_SET_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_SET_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_SET_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_CLR_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_CLR_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_CLR_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_CLR_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK     (0x1U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT    (0U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_PWD_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     CCM_ANALOG_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
 #define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK   (0x80U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT  (7U)
-#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK (0xC00U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & CCM_ANALOG_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
-#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
-#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define CCM_ANALOG_MISC0_TOG_OSC_I_MASK          (0x6000U)
-#define CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT         (13U)
-#define CCM_ANALOG_MISC0_TOG_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_I_MASK)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK     (0x8000U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT    (15U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK)
+#define CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     CCM_ANALOG_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_I_MASK  (0x6000U)
+#define CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT (13U)
+#define CCM_ANALOG_MISC0_TOG_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_I_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_I_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_MASK)
 #define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK   (0x2000000U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT  (25U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_CTRL_MASK)
 #define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
-#define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_SHIFT)) &                                       \
+     CCM_ANALOG_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
-#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK   (0x40000000U)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT  (30U)
-#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     CCM_ANALOG_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & CCM_ANALOG_MISC0_TOG_XTAL_24M_PWD_MASK)
 /*! @} */
 
 /*! @name MISC1 - Miscellaneous Register 1 */
 /*! @{ */
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK      (0x1FU)
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT     (0U)
-#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK      (0x400U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT     (10U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK      (0x1000U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT     (12U)
-#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT (0U)
+#define CCM_ANALOG_MISC1_LVDS1_CLK_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK  (0x400U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT (10U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_OBEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT (12U)
+#define CCM_ANALOG_MISC1_LVDSCLK1_IBEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) &                                     \
+     CCM_ANALOG_MISC1_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN(x)  (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK      (0x8000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT     (27U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK        (0x10000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT       (28U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPLOW(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK       (0x20000000U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT      (29U)
-#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK         (0x40000000U)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT        (30U)
-#define CCM_ANALOG_MISC1_IRQ_ANA_BO(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK         (0x80000000U)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT        (31U)
-#define CCM_ANALOG_MISC1_IRQ_DIG_BO(x)           (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) &                                     \
+     CCM_ANALOG_MISC1_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT (27U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPPANIC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPLOW(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_IRQ_TEMPHIGH(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_IRQ_ANA_BO(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_IRQ_DIG_BO(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_SET - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_SET_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_SET_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_SET_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_SET_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_CLR - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_CLR_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_TOG - Miscellaneous Register 1 */
 /*! @{ */
 #define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK  (0x1FU)
 #define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT (0U)
-#define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK)
+#define CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDS1_CLK_SEL_MASK)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK  (0x400U)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT (10U)
-#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK)
+#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDSCLK1_OBEN_MASK)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK  (0x1000U)
 #define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT (12U)
-#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK)
-#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK (0x10000U)
+#define CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_LVDSCLK1_IBEN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
 #define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT (16U)
-#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
-#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK (0x20000U)
+#define CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
 #define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT (17U)
-#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN(x) (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
+#define CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) &                                 \
+     CCM_ANALOG_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
 #define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK  (0x8000000U)
 #define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT (27U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK    (0x10000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT   (28U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW(x)      (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK   (0x20000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT  (29U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK     (0x40000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT    (30U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK     (0x80000000U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT    (31U)
-#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) &                                       \
+     CCM_ANALOG_MISC1_TOG_IRQ_TEMPPANIC_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT (28U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPLOW_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT (29U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_TEMPHIGH_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK  (0x40000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT (30U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_ANA_BO_MASK)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK  (0x80000000U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT (31U)
+#define CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & CCM_ANALOG_MISC1_TOG_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC2 - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK     (0x7U)
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT    (0U)
-#define CCM_ANALOG_MISC2_REG0_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK     (0x8U)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT    (3U)
-#define CCM_ANALOG_MISC2_REG0_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK     (0x20U)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT    (5U)
-#define CCM_ANALOG_MISC2_REG0_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG0_OK_MASK            (0x40U)
-#define CCM_ANALOG_MISC2_REG0_OK_SHIFT           (6U)
-#define CCM_ANALOG_MISC2_REG0_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_PLL3_disable_MASK       (0x80U)
-#define CCM_ANALOG_MISC2_PLL3_disable_SHIFT      (7U)
-#define CCM_ANALOG_MISC2_PLL3_disable(x)         (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK     (0x700U)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT    (8U)
-#define CCM_ANALOG_MISC2_REG1_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK     (0x800U)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT    (11U)
-#define CCM_ANALOG_MISC2_REG1_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK     (0x2000U)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT    (13U)
-#define CCM_ANALOG_MISC2_REG1_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG1_OK_MASK            (0x4000U)
-#define CCM_ANALOG_MISC2_REG1_OK_SHIFT           (14U)
-#define CCM_ANALOG_MISC2_REG1_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_REG1_OK_MASK)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK      (0x8000U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT     (15U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK     (0x70000U)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT    (16U)
-#define CCM_ANALOG_MISC2_REG2_BO_OFFSET(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK     (0x80000U)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT    (19U)
-#define CCM_ANALOG_MISC2_REG2_BO_STATUS(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK     (0x200000U)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT    (21U)
-#define CCM_ANALOG_MISC2_REG2_ENABLE_BO(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_REG2_OK_MASK            (0x400000U)
-#define CCM_ANALOG_MISC2_REG2_OK_SHIFT           (22U)
-#define CCM_ANALOG_MISC2_REG2_OK(x)              (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_REG2_OK_MASK)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK      (0x800000U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT     (23U)
-#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK     (0x3000000U)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT    (24U)
-#define CCM_ANALOG_MISC2_REG0_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK     (0xC000000U)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT    (26U)
-#define CCM_ANALOG_MISC2_REG1_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK     (0x30000000U)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT    (28U)
-#define CCM_ANALOG_MISC2_REG2_STEP_TIME(x)       (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_VIDEO_DIV_MASK          (0xC0000000U)
-#define CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT         (30U)
-#define CCM_ANALOG_MISC2_VIDEO_DIV(x)            (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK  (0x7U)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT (0U)
+#define CCM_ANALOG_MISC2_REG0_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK  (0x8U)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT (3U)
+#define CCM_ANALOG_MISC2_REG0_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK  (0x20U)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT (5U)
+#define CCM_ANALOG_MISC2_REG0_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_REG0_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_PLL3_disable(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK  (0x700U)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT (8U)
+#define CCM_ANALOG_MISC2_REG1_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK  (0x800U)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT (11U)
+#define CCM_ANALOG_MISC2_REG1_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK  (0x2000U)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT (13U)
+#define CCM_ANALOG_MISC2_REG1_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_REG1_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT (15U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_LSB(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK  (0x70000U)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT (16U)
+#define CCM_ANALOG_MISC2_REG2_BO_OFFSET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK  (0x80000U)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT (19U)
+#define CCM_ANALOG_MISC2_REG2_BO_STATUS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK  (0x200000U)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT (21U)
+#define CCM_ANALOG_MISC2_REG2_ENABLE_BO(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_REG2_OK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT (23U)
+#define CCM_ANALOG_MISC2_AUDIO_DIV_MSB(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK  (0x3000000U)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT (24U)
+#define CCM_ANALOG_MISC2_REG0_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK  (0xC000000U)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT (26U)
+#define CCM_ANALOG_MISC2_REG1_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK  (0x30000000U)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT (28U)
+#define CCM_ANALOG_MISC2_REG2_STEP_TIME(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_VIDEO_DIV(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_SET - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_SET_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_SET_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_SET_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_SET_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_SET_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_SET_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_SET_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_SET_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_SET_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_SET_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_SET_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_SET_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_SET_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_SET_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_SET_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_SET_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_SET_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_SET_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_SET_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_SET_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_SET_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_SET_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_SET_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_CLR - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_CLR_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_CLR_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_CLR_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_CLR_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_CLR_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_CLR_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_CLR_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_CLR_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_CLR_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_CLR_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_CLR_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_CLR_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_CLR_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_CLR_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_CLR_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_TOG - Miscellaneous Register 2 */
 /*! @{ */
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK (0x7U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK  (0x7U)
 #define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT (0U)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK (0x8U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK  (0x8U)
 #define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT (3U)
-#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK (0x20U)
+#define CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK  (0x20U)
 #define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT (5U)
-#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK_MASK        (0x40U)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT       (6U)
-#define CCM_ANALOG_MISC2_TOG_REG0_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_OK_MASK)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK   (0x80U)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT  (7U)
-#define CCM_ANALOG_MISC2_TOG_PLL3_disable(x)     (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK (0x700U)
+#define CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK_MASK  (0x40U)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT (6U)
+#define CCM_ANALOG_MISC2_TOG_REG0_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK  (0x80U)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT (7U)
+#define CCM_ANALOG_MISC2_TOG_PLL3_disable(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_PLL3_disable_SHIFT)) & CCM_ANALOG_MISC2_TOG_PLL3_disable_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK  (0x700U)
 #define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT (8U)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK (0x800U)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK  (0x800U)
 #define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT (11U)
-#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK (0x2000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK  (0x2000U)
 #define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT (13U)
-#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK_MASK        (0x4000U)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT       (14U)
-#define CCM_ANALOG_MISC2_TOG_REG1_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK_MASK  (0x4000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT (14U)
+#define CCM_ANALOG_MISC2_TOG_REG1_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_OK_MASK)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK  (0x8000U)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT (15U)
-#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK (0x70000U)
+#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_TOG_AUDIO_DIV_LSB_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK  (0x70000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT (16U)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK (0x80000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_BO_OFFSET_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK  (0x80000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT (19U)
-#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK (0x200000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_BO_STATUS_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK  (0x200000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT (21U)
-#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK_MASK        (0x400000U)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT       (22U)
-#define CCM_ANALOG_MISC2_TOG_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_OK_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_ENABLE_BO_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK_MASK  (0x400000U)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT (22U)
+#define CCM_ANALOG_MISC2_TOG_REG2_OK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_OK_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_OK_MASK)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK  (0x800000U)
 #define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT (23U)
-#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB(x)    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK (0x3000000U)
+#define CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) &                                       \
+     CCM_ANALOG_MISC2_TOG_AUDIO_DIV_MSB_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK  (0x3000000U)
 #define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT (24U)
-#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK (0xC000000U)
+#define CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG0_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK  (0xC000000U)
 #define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT (26U)
-#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK (0x30000000U)
+#define CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG1_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK  (0x30000000U)
 #define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT (28U)
-#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME(x)   (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK      (0xC0000000U)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT     (30U)
-#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV(x)        (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK)
+#define CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_SHIFT)) &                                      \
+     CCM_ANALOG_MISC2_TOG_REG2_STEP_TIME_MASK)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK  (0xC0000000U)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT (30U)
+#define CCM_ANALOG_MISC2_TOG_VIDEO_DIV(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << CCM_ANALOG_MISC2_TOG_VIDEO_DIV_SHIFT)) & CCM_ANALOG_MISC2_TOG_VIDEO_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CCM_ANALOG_Register_Masks */
 
-
 /* CCM_ANALOG - Peripheral instance base addresses */
 /** Peripheral CCM_ANALOG base address */
-#define CCM_ANALOG_BASE                          (0x400D8000u)
+#define CCM_ANALOG_BASE (0x400D8000u)
 /** Peripheral CCM_ANALOG base pointer */
-#define CCM_ANALOG                               ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
+#define CCM_ANALOG ((CCM_ANALOG_Type *)CCM_ANALOG_BASE)
 /** Array initializer of CCM_ANALOG peripheral base addresses */
-#define CCM_ANALOG_BASE_ADDRS                    { CCM_ANALOG_BASE }
+#define CCM_ANALOG_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        CCM_ANALOG_BASE                                                                                                \
+    }
 /** Array initializer of CCM_ANALOG peripheral base pointers */
-#define CCM_ANALOG_BASE_PTRS                     { CCM_ANALOG }
+#define CCM_ANALOG_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        CCM_ANALOG                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group CCM_ANALOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CMP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -5661,13 +6747,14 @@ typedef struct {
  */
 
 /** CMP - Register Layout Typedef */
-typedef struct {
-  __IO uint8_t CR0;                                /**< CMP Control Register 0, offset: 0x0 */
-  __IO uint8_t CR1;                                /**< CMP Control Register 1, offset: 0x1 */
-  __IO uint8_t FPR;                                /**< CMP Filter Period Register, offset: 0x2 */
-  __IO uint8_t SCR;                                /**< CMP Status and Control Register, offset: 0x3 */
-  __IO uint8_t DACCR;                              /**< DAC Control Register, offset: 0x4 */
-  __IO uint8_t MUXCR;                              /**< MUX Control Register, offset: 0x5 */
+typedef struct
+{
+    __IO uint8_t CR0;   /**< CMP Control Register 0, offset: 0x0 */
+    __IO uint8_t CR1;   /**< CMP Control Register 1, offset: 0x1 */
+    __IO uint8_t FPR;   /**< CMP Filter Period Register, offset: 0x2 */
+    __IO uint8_t SCR;   /**< CMP Status and Control Register, offset: 0x3 */
+    __IO uint8_t DACCR; /**< DAC Control Register, offset: 0x4 */
+    __IO uint8_t MUXCR; /**< MUX Control Register, offset: 0x5 */
 } CMP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -5681,126 +6768,132 @@ typedef struct {
 
 /*! @name CR0 - CMP Control Register 0 */
 /*! @{ */
-#define CMP_CR0_HYSTCTR_MASK                     (0x3U)
-#define CMP_CR0_HYSTCTR_SHIFT                    (0U)
-#define CMP_CR0_HYSTCTR(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)
-#define CMP_CR0_FILTER_CNT_MASK                  (0x70U)
-#define CMP_CR0_FILTER_CNT_SHIFT                 (4U)
-#define CMP_CR0_FILTER_CNT(x)                    (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)
+#define CMP_CR0_HYSTCTR_MASK     (0x3U)
+#define CMP_CR0_HYSTCTR_SHIFT    (0U)
+#define CMP_CR0_HYSTCTR(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)
+#define CMP_CR0_FILTER_CNT_MASK  (0x70U)
+#define CMP_CR0_FILTER_CNT_SHIFT (4U)
+#define CMP_CR0_FILTER_CNT(x)    (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)
 /*! @} */
 
 /*! @name CR1 - CMP Control Register 1 */
 /*! @{ */
-#define CMP_CR1_EN_MASK                          (0x1U)
-#define CMP_CR1_EN_SHIFT                         (0U)
-#define CMP_CR1_EN(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)
-#define CMP_CR1_OPE_MASK                         (0x2U)
-#define CMP_CR1_OPE_SHIFT                        (1U)
-#define CMP_CR1_OPE(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)
-#define CMP_CR1_COS_MASK                         (0x4U)
-#define CMP_CR1_COS_SHIFT                        (2U)
-#define CMP_CR1_COS(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)
-#define CMP_CR1_INV_MASK                         (0x8U)
-#define CMP_CR1_INV_SHIFT                        (3U)
-#define CMP_CR1_INV(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)
-#define CMP_CR1_PMODE_MASK                       (0x10U)
-#define CMP_CR1_PMODE_SHIFT                      (4U)
-#define CMP_CR1_PMODE(x)                         (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)
-#define CMP_CR1_WE_MASK                          (0x40U)
-#define CMP_CR1_WE_SHIFT                         (6U)
-#define CMP_CR1_WE(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
-#define CMP_CR1_SE_MASK                          (0x80U)
-#define CMP_CR1_SE_SHIFT                         (7U)
-#define CMP_CR1_SE(x)                            (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)
+#define CMP_CR1_EN_MASK     (0x1U)
+#define CMP_CR1_EN_SHIFT    (0U)
+#define CMP_CR1_EN(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)
+#define CMP_CR1_OPE_MASK    (0x2U)
+#define CMP_CR1_OPE_SHIFT   (1U)
+#define CMP_CR1_OPE(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)
+#define CMP_CR1_COS_MASK    (0x4U)
+#define CMP_CR1_COS_SHIFT   (2U)
+#define CMP_CR1_COS(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)
+#define CMP_CR1_INV_MASK    (0x8U)
+#define CMP_CR1_INV_SHIFT   (3U)
+#define CMP_CR1_INV(x)      (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)
+#define CMP_CR1_PMODE_MASK  (0x10U)
+#define CMP_CR1_PMODE_SHIFT (4U)
+#define CMP_CR1_PMODE(x)    (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)
+#define CMP_CR1_WE_MASK     (0x40U)
+#define CMP_CR1_WE_SHIFT    (6U)
+#define CMP_CR1_WE(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
+#define CMP_CR1_SE_MASK     (0x80U)
+#define CMP_CR1_SE_SHIFT    (7U)
+#define CMP_CR1_SE(x)       (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)
 /*! @} */
 
 /*! @name FPR - CMP Filter Period Register */
 /*! @{ */
-#define CMP_FPR_FILT_PER_MASK                    (0xFFU)
-#define CMP_FPR_FILT_PER_SHIFT                   (0U)
-#define CMP_FPR_FILT_PER(x)                      (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)
+#define CMP_FPR_FILT_PER_MASK  (0xFFU)
+#define CMP_FPR_FILT_PER_SHIFT (0U)
+#define CMP_FPR_FILT_PER(x)    (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)
 /*! @} */
 
 /*! @name SCR - CMP Status and Control Register */
 /*! @{ */
-#define CMP_SCR_COUT_MASK                        (0x1U)
-#define CMP_SCR_COUT_SHIFT                       (0U)
-#define CMP_SCR_COUT(x)                          (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)
-#define CMP_SCR_CFF_MASK                         (0x2U)
-#define CMP_SCR_CFF_SHIFT                        (1U)
-#define CMP_SCR_CFF(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
-#define CMP_SCR_CFR_MASK                         (0x4U)
-#define CMP_SCR_CFR_SHIFT                        (2U)
-#define CMP_SCR_CFR(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)
-#define CMP_SCR_IEF_MASK                         (0x8U)
-#define CMP_SCR_IEF_SHIFT                        (3U)
-#define CMP_SCR_IEF(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)
-#define CMP_SCR_IER_MASK                         (0x10U)
-#define CMP_SCR_IER_SHIFT                        (4U)
-#define CMP_SCR_IER(x)                           (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)
-#define CMP_SCR_DMAEN_MASK                       (0x40U)
-#define CMP_SCR_DMAEN_SHIFT                      (6U)
-#define CMP_SCR_DMAEN(x)                         (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)
+#define CMP_SCR_COUT_MASK   (0x1U)
+#define CMP_SCR_COUT_SHIFT  (0U)
+#define CMP_SCR_COUT(x)     (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)
+#define CMP_SCR_CFF_MASK    (0x2U)
+#define CMP_SCR_CFF_SHIFT   (1U)
+#define CMP_SCR_CFF(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
+#define CMP_SCR_CFR_MASK    (0x4U)
+#define CMP_SCR_CFR_SHIFT   (2U)
+#define CMP_SCR_CFR(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)
+#define CMP_SCR_IEF_MASK    (0x8U)
+#define CMP_SCR_IEF_SHIFT   (3U)
+#define CMP_SCR_IEF(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)
+#define CMP_SCR_IER_MASK    (0x10U)
+#define CMP_SCR_IER_SHIFT   (4U)
+#define CMP_SCR_IER(x)      (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)
+#define CMP_SCR_DMAEN_MASK  (0x40U)
+#define CMP_SCR_DMAEN_SHIFT (6U)
+#define CMP_SCR_DMAEN(x)    (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)
 /*! @} */
 
 /*! @name DACCR - DAC Control Register */
 /*! @{ */
-#define CMP_DACCR_VOSEL_MASK                     (0x3FU)
-#define CMP_DACCR_VOSEL_SHIFT                    (0U)
-#define CMP_DACCR_VOSEL(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
-#define CMP_DACCR_VRSEL_MASK                     (0x40U)
-#define CMP_DACCR_VRSEL_SHIFT                    (6U)
-#define CMP_DACCR_VRSEL(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)
-#define CMP_DACCR_DACEN_MASK                     (0x80U)
-#define CMP_DACCR_DACEN_SHIFT                    (7U)
-#define CMP_DACCR_DACEN(x)                       (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)
+#define CMP_DACCR_VOSEL_MASK  (0x3FU)
+#define CMP_DACCR_VOSEL_SHIFT (0U)
+#define CMP_DACCR_VOSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
+#define CMP_DACCR_VRSEL_MASK  (0x40U)
+#define CMP_DACCR_VRSEL_SHIFT (6U)
+#define CMP_DACCR_VRSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)
+#define CMP_DACCR_DACEN_MASK  (0x80U)
+#define CMP_DACCR_DACEN_SHIFT (7U)
+#define CMP_DACCR_DACEN(x)    (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)
 /*! @} */
 
 /*! @name MUXCR - MUX Control Register */
 /*! @{ */
-#define CMP_MUXCR_MSEL_MASK                      (0x7U)
-#define CMP_MUXCR_MSEL_SHIFT                     (0U)
-#define CMP_MUXCR_MSEL(x)                        (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)
-#define CMP_MUXCR_PSEL_MASK                      (0x38U)
-#define CMP_MUXCR_PSEL_SHIFT                     (3U)
-#define CMP_MUXCR_PSEL(x)                        (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)
+#define CMP_MUXCR_MSEL_MASK  (0x7U)
+#define CMP_MUXCR_MSEL_SHIFT (0U)
+#define CMP_MUXCR_MSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)
+#define CMP_MUXCR_PSEL_MASK  (0x38U)
+#define CMP_MUXCR_PSEL_SHIFT (3U)
+#define CMP_MUXCR_PSEL(x)    (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CMP_Register_Masks */
 
-
 /* CMP - Peripheral instance base addresses */
 /** Peripheral CMP1 base address */
-#define CMP1_BASE                                (0x40094000u)
+#define CMP1_BASE (0x40094000u)
 /** Peripheral CMP1 base pointer */
-#define CMP1                                     ((CMP_Type *)CMP1_BASE)
+#define CMP1 ((CMP_Type *)CMP1_BASE)
 /** Peripheral CMP2 base address */
-#define CMP2_BASE                                (0x40094008u)
+#define CMP2_BASE (0x40094008u)
 /** Peripheral CMP2 base pointer */
-#define CMP2                                     ((CMP_Type *)CMP2_BASE)
+#define CMP2 ((CMP_Type *)CMP2_BASE)
 /** Peripheral CMP3 base address */
-#define CMP3_BASE                                (0x40094010u)
+#define CMP3_BASE (0x40094010u)
 /** Peripheral CMP3 base pointer */
-#define CMP3                                     ((CMP_Type *)CMP3_BASE)
+#define CMP3 ((CMP_Type *)CMP3_BASE)
 /** Peripheral CMP4 base address */
-#define CMP4_BASE                                (0x40094018u)
+#define CMP4_BASE (0x40094018u)
 /** Peripheral CMP4 base pointer */
-#define CMP4                                     ((CMP_Type *)CMP4_BASE)
+#define CMP4 ((CMP_Type *)CMP4_BASE)
 /** Array initializer of CMP peripheral base addresses */
-#define CMP_BASE_ADDRS                           { 0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE }
+#define CMP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, CMP1_BASE, CMP2_BASE, CMP3_BASE, CMP4_BASE                                                                 \
+    }
 /** Array initializer of CMP peripheral base pointers */
-#define CMP_BASE_PTRS                            { (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4 }
+#define CMP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (CMP_Type *)0u, CMP1, CMP2, CMP3, CMP4                                                                         \
+    }
 /** Interrupt vectors for the CMP peripheral type */
-#define CMP_IRQS                                 { NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn }
+#define CMP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, ACMP1_IRQn, ACMP2_IRQn, ACMP3_IRQn, ACMP4_IRQn                                                  \
+    }
 
 /*!
  * @}
  */ /* end of group CMP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- CSU Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -5811,14 +6904,15 @@ typedef struct {
  */
 
 /** CSU - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CSL[32];                           /**< Config security level register, array offset: 0x0, array step: 0x4 */
-       uint8_t RESERVED_0[384];
-  __IO uint32_t HP0;                               /**< HP0 register, offset: 0x200 */
-       uint8_t RESERVED_1[20];
-  __IO uint32_t SA;                                /**< Secure access register, offset: 0x218 */
-       uint8_t RESERVED_2[316];
-  __IO uint32_t HPCONTROL0;                        /**< HPCONTROL0 register, offset: 0x358 */
+typedef struct
+{
+    __IO uint32_t CSL[32]; /**< Config security level register, array offset: 0x0, array step: 0x4 */
+    uint8_t RESERVED_0[384];
+    __IO uint32_t HP0; /**< HP0 register, offset: 0x200 */
+    uint8_t RESERVED_1[20];
+    __IO uint32_t SA; /**< Secure access register, offset: 0x218 */
+    uint8_t RESERVED_2[316];
+    __IO uint32_t HPCONTROL0; /**< HPCONTROL0 register, offset: 0x358 */
 } CSU_Type;
 
 /* ----------------------------------------------------------------------------
@@ -5832,278 +6926,301 @@ typedef struct {
 
 /*! @name CSL - Config security level register */
 /*! @{ */
-#define CSU_CSL_SUR_S2_MASK                      (0x1U)
-#define CSU_CSL_SUR_S2_SHIFT                     (0U)
-#define CSU_CSL_SUR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S2_SHIFT)) & CSU_CSL_SUR_S2_MASK)
-#define CSU_CSL_SSR_S2_MASK                      (0x2U)
-#define CSU_CSL_SSR_S2_SHIFT                     (1U)
-#define CSU_CSL_SSR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S2_SHIFT)) & CSU_CSL_SSR_S2_MASK)
-#define CSU_CSL_NUR_S2_MASK                      (0x4U)
-#define CSU_CSL_NUR_S2_SHIFT                     (2U)
-#define CSU_CSL_NUR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S2_SHIFT)) & CSU_CSL_NUR_S2_MASK)
-#define CSU_CSL_NSR_S2_MASK                      (0x8U)
-#define CSU_CSL_NSR_S2_SHIFT                     (3U)
-#define CSU_CSL_NSR_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S2_SHIFT)) & CSU_CSL_NSR_S2_MASK)
-#define CSU_CSL_SUW_S2_MASK                      (0x10U)
-#define CSU_CSL_SUW_S2_SHIFT                     (4U)
-#define CSU_CSL_SUW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S2_SHIFT)) & CSU_CSL_SUW_S2_MASK)
-#define CSU_CSL_SSW_S2_MASK                      (0x20U)
-#define CSU_CSL_SSW_S2_SHIFT                     (5U)
-#define CSU_CSL_SSW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S2_SHIFT)) & CSU_CSL_SSW_S2_MASK)
-#define CSU_CSL_NUW_S2_MASK                      (0x40U)
-#define CSU_CSL_NUW_S2_SHIFT                     (6U)
-#define CSU_CSL_NUW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S2_SHIFT)) & CSU_CSL_NUW_S2_MASK)
-#define CSU_CSL_NSW_S2_MASK                      (0x80U)
-#define CSU_CSL_NSW_S2_SHIFT                     (7U)
-#define CSU_CSL_NSW_S2(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S2_SHIFT)) & CSU_CSL_NSW_S2_MASK)
-#define CSU_CSL_LOCK_S2_MASK                     (0x100U)
-#define CSU_CSL_LOCK_S2_SHIFT                    (8U)
-#define CSU_CSL_LOCK_S2(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S2_SHIFT)) & CSU_CSL_LOCK_S2_MASK)
-#define CSU_CSL_SUR_S1_MASK                      (0x10000U)
-#define CSU_CSL_SUR_S1_SHIFT                     (16U)
-#define CSU_CSL_SUR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S1_SHIFT)) & CSU_CSL_SUR_S1_MASK)
-#define CSU_CSL_SSR_S1_MASK                      (0x20000U)
-#define CSU_CSL_SSR_S1_SHIFT                     (17U)
-#define CSU_CSL_SSR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S1_SHIFT)) & CSU_CSL_SSR_S1_MASK)
-#define CSU_CSL_NUR_S1_MASK                      (0x40000U)
-#define CSU_CSL_NUR_S1_SHIFT                     (18U)
-#define CSU_CSL_NUR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S1_SHIFT)) & CSU_CSL_NUR_S1_MASK)
-#define CSU_CSL_NSR_S1_MASK                      (0x80000U)
-#define CSU_CSL_NSR_S1_SHIFT                     (19U)
-#define CSU_CSL_NSR_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S1_SHIFT)) & CSU_CSL_NSR_S1_MASK)
-#define CSU_CSL_SUW_S1_MASK                      (0x100000U)
-#define CSU_CSL_SUW_S1_SHIFT                     (20U)
-#define CSU_CSL_SUW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S1_SHIFT)) & CSU_CSL_SUW_S1_MASK)
-#define CSU_CSL_SSW_S1_MASK                      (0x200000U)
-#define CSU_CSL_SSW_S1_SHIFT                     (21U)
-#define CSU_CSL_SSW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S1_SHIFT)) & CSU_CSL_SSW_S1_MASK)
-#define CSU_CSL_NUW_S1_MASK                      (0x400000U)
-#define CSU_CSL_NUW_S1_SHIFT                     (22U)
-#define CSU_CSL_NUW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S1_SHIFT)) & CSU_CSL_NUW_S1_MASK)
-#define CSU_CSL_NSW_S1_MASK                      (0x800000U)
-#define CSU_CSL_NSW_S1_SHIFT                     (23U)
-#define CSU_CSL_NSW_S1(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S1_SHIFT)) & CSU_CSL_NSW_S1_MASK)
-#define CSU_CSL_LOCK_S1_MASK                     (0x1000000U)
-#define CSU_CSL_LOCK_S1_SHIFT                    (24U)
-#define CSU_CSL_LOCK_S1(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S1_SHIFT)) & CSU_CSL_LOCK_S1_MASK)
+#define CSU_CSL_SUR_S2_MASK   (0x1U)
+#define CSU_CSL_SUR_S2_SHIFT  (0U)
+#define CSU_CSL_SUR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S2_SHIFT)) & CSU_CSL_SUR_S2_MASK)
+#define CSU_CSL_SSR_S2_MASK   (0x2U)
+#define CSU_CSL_SSR_S2_SHIFT  (1U)
+#define CSU_CSL_SSR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S2_SHIFT)) & CSU_CSL_SSR_S2_MASK)
+#define CSU_CSL_NUR_S2_MASK   (0x4U)
+#define CSU_CSL_NUR_S2_SHIFT  (2U)
+#define CSU_CSL_NUR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S2_SHIFT)) & CSU_CSL_NUR_S2_MASK)
+#define CSU_CSL_NSR_S2_MASK   (0x8U)
+#define CSU_CSL_NSR_S2_SHIFT  (3U)
+#define CSU_CSL_NSR_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S2_SHIFT)) & CSU_CSL_NSR_S2_MASK)
+#define CSU_CSL_SUW_S2_MASK   (0x10U)
+#define CSU_CSL_SUW_S2_SHIFT  (4U)
+#define CSU_CSL_SUW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S2_SHIFT)) & CSU_CSL_SUW_S2_MASK)
+#define CSU_CSL_SSW_S2_MASK   (0x20U)
+#define CSU_CSL_SSW_S2_SHIFT  (5U)
+#define CSU_CSL_SSW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S2_SHIFT)) & CSU_CSL_SSW_S2_MASK)
+#define CSU_CSL_NUW_S2_MASK   (0x40U)
+#define CSU_CSL_NUW_S2_SHIFT  (6U)
+#define CSU_CSL_NUW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S2_SHIFT)) & CSU_CSL_NUW_S2_MASK)
+#define CSU_CSL_NSW_S2_MASK   (0x80U)
+#define CSU_CSL_NSW_S2_SHIFT  (7U)
+#define CSU_CSL_NSW_S2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S2_SHIFT)) & CSU_CSL_NSW_S2_MASK)
+#define CSU_CSL_LOCK_S2_MASK  (0x100U)
+#define CSU_CSL_LOCK_S2_SHIFT (8U)
+#define CSU_CSL_LOCK_S2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S2_SHIFT)) & CSU_CSL_LOCK_S2_MASK)
+#define CSU_CSL_SUR_S1_MASK   (0x10000U)
+#define CSU_CSL_SUR_S1_SHIFT  (16U)
+#define CSU_CSL_SUR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUR_S1_SHIFT)) & CSU_CSL_SUR_S1_MASK)
+#define CSU_CSL_SSR_S1_MASK   (0x20000U)
+#define CSU_CSL_SSR_S1_SHIFT  (17U)
+#define CSU_CSL_SSR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSR_S1_SHIFT)) & CSU_CSL_SSR_S1_MASK)
+#define CSU_CSL_NUR_S1_MASK   (0x40000U)
+#define CSU_CSL_NUR_S1_SHIFT  (18U)
+#define CSU_CSL_NUR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUR_S1_SHIFT)) & CSU_CSL_NUR_S1_MASK)
+#define CSU_CSL_NSR_S1_MASK   (0x80000U)
+#define CSU_CSL_NSR_S1_SHIFT  (19U)
+#define CSU_CSL_NSR_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSR_S1_SHIFT)) & CSU_CSL_NSR_S1_MASK)
+#define CSU_CSL_SUW_S1_MASK   (0x100000U)
+#define CSU_CSL_SUW_S1_SHIFT  (20U)
+#define CSU_CSL_SUW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SUW_S1_SHIFT)) & CSU_CSL_SUW_S1_MASK)
+#define CSU_CSL_SSW_S1_MASK   (0x200000U)
+#define CSU_CSL_SSW_S1_SHIFT  (21U)
+#define CSU_CSL_SSW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_SSW_S1_SHIFT)) & CSU_CSL_SSW_S1_MASK)
+#define CSU_CSL_NUW_S1_MASK   (0x400000U)
+#define CSU_CSL_NUW_S1_SHIFT  (22U)
+#define CSU_CSL_NUW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NUW_S1_SHIFT)) & CSU_CSL_NUW_S1_MASK)
+#define CSU_CSL_NSW_S1_MASK   (0x800000U)
+#define CSU_CSL_NSW_S1_SHIFT  (23U)
+#define CSU_CSL_NSW_S1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_CSL_NSW_S1_SHIFT)) & CSU_CSL_NSW_S1_MASK)
+#define CSU_CSL_LOCK_S1_MASK  (0x1000000U)
+#define CSU_CSL_LOCK_S1_SHIFT (24U)
+#define CSU_CSL_LOCK_S1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_CSL_LOCK_S1_SHIFT)) & CSU_CSL_LOCK_S1_MASK)
 /*! @} */
 
 /* The count of CSU_CSL */
-#define CSU_CSL_COUNT                            (32U)
+#define CSU_CSL_COUNT (32U)
 
 /*! @name HP0 - HP0 register */
 /*! @{ */
-#define CSU_HP0_HP_DMA_MASK                      (0x4U)
-#define CSU_HP0_HP_DMA_SHIFT                     (2U)
-#define CSU_HP0_HP_DMA(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DMA_SHIFT)) & CSU_HP0_HP_DMA_MASK)
-#define CSU_HP0_L_DMA_MASK                       (0x8U)
-#define CSU_HP0_L_DMA_SHIFT                      (3U)
-#define CSU_HP0_L_DMA(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DMA_SHIFT)) & CSU_HP0_L_DMA_MASK)
-#define CSU_HP0_HP_LCDIF_MASK                    (0x10U)
-#define CSU_HP0_HP_LCDIF_SHIFT                   (4U)
-#define CSU_HP0_HP_LCDIF(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_LCDIF_SHIFT)) & CSU_HP0_HP_LCDIF_MASK)
-#define CSU_HP0_L_LCDIF_MASK                     (0x20U)
-#define CSU_HP0_L_LCDIF_SHIFT                    (5U)
-#define CSU_HP0_L_LCDIF(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_LCDIF_SHIFT)) & CSU_HP0_L_LCDIF_MASK)
-#define CSU_HP0_HP_CSI_MASK                      (0x40U)
-#define CSU_HP0_HP_CSI_SHIFT                     (6U)
-#define CSU_HP0_HP_CSI(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_CSI_SHIFT)) & CSU_HP0_HP_CSI_MASK)
-#define CSU_HP0_L_CSI_MASK                       (0x80U)
-#define CSU_HP0_L_CSI_SHIFT                      (7U)
-#define CSU_HP0_L_CSI(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_CSI_SHIFT)) & CSU_HP0_L_CSI_MASK)
-#define CSU_HP0_HP_PXP_MASK                      (0x100U)
-#define CSU_HP0_HP_PXP_SHIFT                     (8U)
-#define CSU_HP0_HP_PXP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_PXP_SHIFT)) & CSU_HP0_HP_PXP_MASK)
-#define CSU_HP0_L_PXP_MASK                       (0x200U)
-#define CSU_HP0_L_PXP_SHIFT                      (9U)
-#define CSU_HP0_L_PXP(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_PXP_SHIFT)) & CSU_HP0_L_PXP_MASK)
-#define CSU_HP0_HP_DCP_MASK                      (0x400U)
-#define CSU_HP0_HP_DCP_SHIFT                     (10U)
-#define CSU_HP0_HP_DCP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DCP_SHIFT)) & CSU_HP0_HP_DCP_MASK)
-#define CSU_HP0_L_DCP_MASK                       (0x800U)
-#define CSU_HP0_L_DCP_SHIFT                      (11U)
-#define CSU_HP0_L_DCP(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DCP_SHIFT)) & CSU_HP0_L_DCP_MASK)
-#define CSU_HP0_HP_ENET_MASK                     (0x4000U)
-#define CSU_HP0_HP_ENET_SHIFT                    (14U)
-#define CSU_HP0_HP_ENET(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_ENET_SHIFT)) & CSU_HP0_HP_ENET_MASK)
-#define CSU_HP0_L_ENET_MASK                      (0x8000U)
-#define CSU_HP0_L_ENET_SHIFT                     (15U)
-#define CSU_HP0_L_ENET(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_ENET_SHIFT)) & CSU_HP0_L_ENET_MASK)
-#define CSU_HP0_HP_USDHC1_MASK                   (0x10000U)
-#define CSU_HP0_HP_USDHC1_SHIFT                  (16U)
-#define CSU_HP0_HP_USDHC1(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC1_SHIFT)) & CSU_HP0_HP_USDHC1_MASK)
-#define CSU_HP0_L_USDHC1_MASK                    (0x20000U)
-#define CSU_HP0_L_USDHC1_SHIFT                   (17U)
-#define CSU_HP0_L_USDHC1(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC1_SHIFT)) & CSU_HP0_L_USDHC1_MASK)
-#define CSU_HP0_HP_USDHC2_MASK                   (0x40000U)
-#define CSU_HP0_HP_USDHC2_SHIFT                  (18U)
-#define CSU_HP0_HP_USDHC2(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC2_SHIFT)) & CSU_HP0_HP_USDHC2_MASK)
-#define CSU_HP0_L_USDHC2_MASK                    (0x80000U)
-#define CSU_HP0_L_USDHC2_SHIFT                   (19U)
-#define CSU_HP0_L_USDHC2(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC2_SHIFT)) & CSU_HP0_L_USDHC2_MASK)
-#define CSU_HP0_HP_TPSMP_MASK                    (0x100000U)
-#define CSU_HP0_HP_TPSMP_SHIFT                   (20U)
-#define CSU_HP0_HP_TPSMP(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_TPSMP_SHIFT)) & CSU_HP0_HP_TPSMP_MASK)
-#define CSU_HP0_L_TPSMP_MASK                     (0x200000U)
-#define CSU_HP0_L_TPSMP_SHIFT                    (21U)
-#define CSU_HP0_L_TPSMP(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_TPSMP_SHIFT)) & CSU_HP0_L_TPSMP_MASK)
-#define CSU_HP0_HP_USB_MASK                      (0x400000U)
-#define CSU_HP0_HP_USB_SHIFT                     (22U)
-#define CSU_HP0_HP_USB(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USB_SHIFT)) & CSU_HP0_HP_USB_MASK)
-#define CSU_HP0_L_USB_MASK                       (0x800000U)
-#define CSU_HP0_L_USB_SHIFT                      (23U)
-#define CSU_HP0_L_USB(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USB_SHIFT)) & CSU_HP0_L_USB_MASK)
+#define CSU_HP0_HP_DMA_MASK     (0x4U)
+#define CSU_HP0_HP_DMA_SHIFT    (2U)
+#define CSU_HP0_HP_DMA(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DMA_SHIFT)) & CSU_HP0_HP_DMA_MASK)
+#define CSU_HP0_L_DMA_MASK      (0x8U)
+#define CSU_HP0_L_DMA_SHIFT     (3U)
+#define CSU_HP0_L_DMA(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DMA_SHIFT)) & CSU_HP0_L_DMA_MASK)
+#define CSU_HP0_HP_LCDIF_MASK   (0x10U)
+#define CSU_HP0_HP_LCDIF_SHIFT  (4U)
+#define CSU_HP0_HP_LCDIF(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_LCDIF_SHIFT)) & CSU_HP0_HP_LCDIF_MASK)
+#define CSU_HP0_L_LCDIF_MASK    (0x20U)
+#define CSU_HP0_L_LCDIF_SHIFT   (5U)
+#define CSU_HP0_L_LCDIF(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_LCDIF_SHIFT)) & CSU_HP0_L_LCDIF_MASK)
+#define CSU_HP0_HP_CSI_MASK     (0x40U)
+#define CSU_HP0_HP_CSI_SHIFT    (6U)
+#define CSU_HP0_HP_CSI(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_CSI_SHIFT)) & CSU_HP0_HP_CSI_MASK)
+#define CSU_HP0_L_CSI_MASK      (0x80U)
+#define CSU_HP0_L_CSI_SHIFT     (7U)
+#define CSU_HP0_L_CSI(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_CSI_SHIFT)) & CSU_HP0_L_CSI_MASK)
+#define CSU_HP0_HP_PXP_MASK     (0x100U)
+#define CSU_HP0_HP_PXP_SHIFT    (8U)
+#define CSU_HP0_HP_PXP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_PXP_SHIFT)) & CSU_HP0_HP_PXP_MASK)
+#define CSU_HP0_L_PXP_MASK      (0x200U)
+#define CSU_HP0_L_PXP_SHIFT     (9U)
+#define CSU_HP0_L_PXP(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_PXP_SHIFT)) & CSU_HP0_L_PXP_MASK)
+#define CSU_HP0_HP_DCP_MASK     (0x400U)
+#define CSU_HP0_HP_DCP_SHIFT    (10U)
+#define CSU_HP0_HP_DCP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_DCP_SHIFT)) & CSU_HP0_HP_DCP_MASK)
+#define CSU_HP0_L_DCP_MASK      (0x800U)
+#define CSU_HP0_L_DCP_SHIFT     (11U)
+#define CSU_HP0_L_DCP(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_DCP_SHIFT)) & CSU_HP0_L_DCP_MASK)
+#define CSU_HP0_HP_ENET_MASK    (0x4000U)
+#define CSU_HP0_HP_ENET_SHIFT   (14U)
+#define CSU_HP0_HP_ENET(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_ENET_SHIFT)) & CSU_HP0_HP_ENET_MASK)
+#define CSU_HP0_L_ENET_MASK     (0x8000U)
+#define CSU_HP0_L_ENET_SHIFT    (15U)
+#define CSU_HP0_L_ENET(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_ENET_SHIFT)) & CSU_HP0_L_ENET_MASK)
+#define CSU_HP0_HP_USDHC1_MASK  (0x10000U)
+#define CSU_HP0_HP_USDHC1_SHIFT (16U)
+#define CSU_HP0_HP_USDHC1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC1_SHIFT)) & CSU_HP0_HP_USDHC1_MASK)
+#define CSU_HP0_L_USDHC1_MASK   (0x20000U)
+#define CSU_HP0_L_USDHC1_SHIFT  (17U)
+#define CSU_HP0_L_USDHC1(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC1_SHIFT)) & CSU_HP0_L_USDHC1_MASK)
+#define CSU_HP0_HP_USDHC2_MASK  (0x40000U)
+#define CSU_HP0_HP_USDHC2_SHIFT (18U)
+#define CSU_HP0_HP_USDHC2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USDHC2_SHIFT)) & CSU_HP0_HP_USDHC2_MASK)
+#define CSU_HP0_L_USDHC2_MASK   (0x80000U)
+#define CSU_HP0_L_USDHC2_SHIFT  (19U)
+#define CSU_HP0_L_USDHC2(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USDHC2_SHIFT)) & CSU_HP0_L_USDHC2_MASK)
+#define CSU_HP0_HP_TPSMP_MASK   (0x100000U)
+#define CSU_HP0_HP_TPSMP_SHIFT  (20U)
+#define CSU_HP0_HP_TPSMP(x)     (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_TPSMP_SHIFT)) & CSU_HP0_HP_TPSMP_MASK)
+#define CSU_HP0_L_TPSMP_MASK    (0x200000U)
+#define CSU_HP0_L_TPSMP_SHIFT   (21U)
+#define CSU_HP0_L_TPSMP(x)      (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_TPSMP_SHIFT)) & CSU_HP0_L_TPSMP_MASK)
+#define CSU_HP0_HP_USB_MASK     (0x400000U)
+#define CSU_HP0_HP_USB_SHIFT    (22U)
+#define CSU_HP0_HP_USB(x)       (((uint32_t)(((uint32_t)(x)) << CSU_HP0_HP_USB_SHIFT)) & CSU_HP0_HP_USB_MASK)
+#define CSU_HP0_L_USB_MASK      (0x800000U)
+#define CSU_HP0_L_USB_SHIFT     (23U)
+#define CSU_HP0_L_USB(x)        (((uint32_t)(((uint32_t)(x)) << CSU_HP0_L_USB_SHIFT)) & CSU_HP0_L_USB_MASK)
 /*! @} */
 
 /*! @name SA - Secure access register */
 /*! @{ */
-#define CSU_SA_NSA_DMA_MASK                      (0x4U)
-#define CSU_SA_NSA_DMA_SHIFT                     (2U)
-#define CSU_SA_NSA_DMA(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DMA_SHIFT)) & CSU_SA_NSA_DMA_MASK)
-#define CSU_SA_L_DMA_MASK                        (0x8U)
-#define CSU_SA_L_DMA_SHIFT                       (3U)
-#define CSU_SA_L_DMA(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DMA_SHIFT)) & CSU_SA_L_DMA_MASK)
-#define CSU_SA_NSA_LCDIF_MASK                    (0x10U)
-#define CSU_SA_NSA_LCDIF_SHIFT                   (4U)
-#define CSU_SA_NSA_LCDIF(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_LCDIF_SHIFT)) & CSU_SA_NSA_LCDIF_MASK)
-#define CSU_SA_L_LCDIF_MASK                      (0x20U)
-#define CSU_SA_L_LCDIF_SHIFT                     (5U)
-#define CSU_SA_L_LCDIF(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_LCDIF_SHIFT)) & CSU_SA_L_LCDIF_MASK)
-#define CSU_SA_NSA_CSI_MASK                      (0x40U)
-#define CSU_SA_NSA_CSI_SHIFT                     (6U)
-#define CSU_SA_NSA_CSI(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_CSI_SHIFT)) & CSU_SA_NSA_CSI_MASK)
-#define CSU_SA_L_CSI_MASK                        (0x80U)
-#define CSU_SA_L_CSI_SHIFT                       (7U)
-#define CSU_SA_L_CSI(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_CSI_SHIFT)) & CSU_SA_L_CSI_MASK)
-#define CSU_SA_NSA_PXP_MASK                      (0x100U)
-#define CSU_SA_NSA_PXP_SHIFT                     (8U)
-#define CSU_SA_NSA_PXP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_PXP_SHIFT)) & CSU_SA_NSA_PXP_MASK)
-#define CSU_SA_L_PXP_MASK                        (0x200U)
-#define CSU_SA_L_PXP_SHIFT                       (9U)
-#define CSU_SA_L_PXP(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_PXP_SHIFT)) & CSU_SA_L_PXP_MASK)
-#define CSU_SA_NSA_DCP_MASK                      (0x400U)
-#define CSU_SA_NSA_DCP_SHIFT                     (10U)
-#define CSU_SA_NSA_DCP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DCP_SHIFT)) & CSU_SA_NSA_DCP_MASK)
-#define CSU_SA_L_DCP_MASK                        (0x800U)
-#define CSU_SA_L_DCP_SHIFT                       (11U)
-#define CSU_SA_L_DCP(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DCP_SHIFT)) & CSU_SA_L_DCP_MASK)
-#define CSU_SA_NSA_ENET_MASK                     (0x4000U)
-#define CSU_SA_NSA_ENET_SHIFT                    (14U)
-#define CSU_SA_NSA_ENET(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_ENET_SHIFT)) & CSU_SA_NSA_ENET_MASK)
-#define CSU_SA_L_ENET_MASK                       (0x8000U)
-#define CSU_SA_L_ENET_SHIFT                      (15U)
-#define CSU_SA_L_ENET(x)                         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_ENET_SHIFT)) & CSU_SA_L_ENET_MASK)
-#define CSU_SA_NSA_USDHC1_MASK                   (0x10000U)
-#define CSU_SA_NSA_USDHC1_SHIFT                  (16U)
-#define CSU_SA_NSA_USDHC1(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC1_SHIFT)) & CSU_SA_NSA_USDHC1_MASK)
-#define CSU_SA_L_USDHC1_MASK                     (0x20000U)
-#define CSU_SA_L_USDHC1_SHIFT                    (17U)
-#define CSU_SA_L_USDHC1(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC1_SHIFT)) & CSU_SA_L_USDHC1_MASK)
-#define CSU_SA_NSA_USDHC2_MASK                   (0x40000U)
-#define CSU_SA_NSA_USDHC2_SHIFT                  (18U)
-#define CSU_SA_NSA_USDHC2(x)                     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC2_SHIFT)) & CSU_SA_NSA_USDHC2_MASK)
-#define CSU_SA_L_USDHC2_MASK                     (0x80000U)
-#define CSU_SA_L_USDHC2_SHIFT                    (19U)
-#define CSU_SA_L_USDHC2(x)                       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC2_SHIFT)) & CSU_SA_L_USDHC2_MASK)
-#define CSU_SA_NSA_TPSMP_MASK                    (0x100000U)
-#define CSU_SA_NSA_TPSMP_SHIFT                   (20U)
-#define CSU_SA_NSA_TPSMP(x)                      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_TPSMP_SHIFT)) & CSU_SA_NSA_TPSMP_MASK)
-#define CSU_SA_L_TPSMP_MASK                      (0x200000U)
-#define CSU_SA_L_TPSMP_SHIFT                     (21U)
-#define CSU_SA_L_TPSMP(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_TPSMP_SHIFT)) & CSU_SA_L_TPSMP_MASK)
-#define CSU_SA_NSA_USB_MASK                      (0x400000U)
-#define CSU_SA_NSA_USB_SHIFT                     (22U)
-#define CSU_SA_NSA_USB(x)                        (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USB_SHIFT)) & CSU_SA_NSA_USB_MASK)
-#define CSU_SA_L_USB_MASK                        (0x800000U)
-#define CSU_SA_L_USB_SHIFT                       (23U)
-#define CSU_SA_L_USB(x)                          (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USB_SHIFT)) & CSU_SA_L_USB_MASK)
+#define CSU_SA_NSA_DMA_MASK     (0x4U)
+#define CSU_SA_NSA_DMA_SHIFT    (2U)
+#define CSU_SA_NSA_DMA(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DMA_SHIFT)) & CSU_SA_NSA_DMA_MASK)
+#define CSU_SA_L_DMA_MASK       (0x8U)
+#define CSU_SA_L_DMA_SHIFT      (3U)
+#define CSU_SA_L_DMA(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DMA_SHIFT)) & CSU_SA_L_DMA_MASK)
+#define CSU_SA_NSA_LCDIF_MASK   (0x10U)
+#define CSU_SA_NSA_LCDIF_SHIFT  (4U)
+#define CSU_SA_NSA_LCDIF(x)     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_LCDIF_SHIFT)) & CSU_SA_NSA_LCDIF_MASK)
+#define CSU_SA_L_LCDIF_MASK     (0x20U)
+#define CSU_SA_L_LCDIF_SHIFT    (5U)
+#define CSU_SA_L_LCDIF(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_LCDIF_SHIFT)) & CSU_SA_L_LCDIF_MASK)
+#define CSU_SA_NSA_CSI_MASK     (0x40U)
+#define CSU_SA_NSA_CSI_SHIFT    (6U)
+#define CSU_SA_NSA_CSI(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_CSI_SHIFT)) & CSU_SA_NSA_CSI_MASK)
+#define CSU_SA_L_CSI_MASK       (0x80U)
+#define CSU_SA_L_CSI_SHIFT      (7U)
+#define CSU_SA_L_CSI(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_CSI_SHIFT)) & CSU_SA_L_CSI_MASK)
+#define CSU_SA_NSA_PXP_MASK     (0x100U)
+#define CSU_SA_NSA_PXP_SHIFT    (8U)
+#define CSU_SA_NSA_PXP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_PXP_SHIFT)) & CSU_SA_NSA_PXP_MASK)
+#define CSU_SA_L_PXP_MASK       (0x200U)
+#define CSU_SA_L_PXP_SHIFT      (9U)
+#define CSU_SA_L_PXP(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_PXP_SHIFT)) & CSU_SA_L_PXP_MASK)
+#define CSU_SA_NSA_DCP_MASK     (0x400U)
+#define CSU_SA_NSA_DCP_SHIFT    (10U)
+#define CSU_SA_NSA_DCP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_DCP_SHIFT)) & CSU_SA_NSA_DCP_MASK)
+#define CSU_SA_L_DCP_MASK       (0x800U)
+#define CSU_SA_L_DCP_SHIFT      (11U)
+#define CSU_SA_L_DCP(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_DCP_SHIFT)) & CSU_SA_L_DCP_MASK)
+#define CSU_SA_NSA_ENET_MASK    (0x4000U)
+#define CSU_SA_NSA_ENET_SHIFT   (14U)
+#define CSU_SA_NSA_ENET(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_ENET_SHIFT)) & CSU_SA_NSA_ENET_MASK)
+#define CSU_SA_L_ENET_MASK      (0x8000U)
+#define CSU_SA_L_ENET_SHIFT     (15U)
+#define CSU_SA_L_ENET(x)        (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_ENET_SHIFT)) & CSU_SA_L_ENET_MASK)
+#define CSU_SA_NSA_USDHC1_MASK  (0x10000U)
+#define CSU_SA_NSA_USDHC1_SHIFT (16U)
+#define CSU_SA_NSA_USDHC1(x)    (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC1_SHIFT)) & CSU_SA_NSA_USDHC1_MASK)
+#define CSU_SA_L_USDHC1_MASK    (0x20000U)
+#define CSU_SA_L_USDHC1_SHIFT   (17U)
+#define CSU_SA_L_USDHC1(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC1_SHIFT)) & CSU_SA_L_USDHC1_MASK)
+#define CSU_SA_NSA_USDHC2_MASK  (0x40000U)
+#define CSU_SA_NSA_USDHC2_SHIFT (18U)
+#define CSU_SA_NSA_USDHC2(x)    (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USDHC2_SHIFT)) & CSU_SA_NSA_USDHC2_MASK)
+#define CSU_SA_L_USDHC2_MASK    (0x80000U)
+#define CSU_SA_L_USDHC2_SHIFT   (19U)
+#define CSU_SA_L_USDHC2(x)      (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USDHC2_SHIFT)) & CSU_SA_L_USDHC2_MASK)
+#define CSU_SA_NSA_TPSMP_MASK   (0x100000U)
+#define CSU_SA_NSA_TPSMP_SHIFT  (20U)
+#define CSU_SA_NSA_TPSMP(x)     (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_TPSMP_SHIFT)) & CSU_SA_NSA_TPSMP_MASK)
+#define CSU_SA_L_TPSMP_MASK     (0x200000U)
+#define CSU_SA_L_TPSMP_SHIFT    (21U)
+#define CSU_SA_L_TPSMP(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_TPSMP_SHIFT)) & CSU_SA_L_TPSMP_MASK)
+#define CSU_SA_NSA_USB_MASK     (0x400000U)
+#define CSU_SA_NSA_USB_SHIFT    (22U)
+#define CSU_SA_NSA_USB(x)       (((uint32_t)(((uint32_t)(x)) << CSU_SA_NSA_USB_SHIFT)) & CSU_SA_NSA_USB_MASK)
+#define CSU_SA_L_USB_MASK       (0x800000U)
+#define CSU_SA_L_USB_SHIFT      (23U)
+#define CSU_SA_L_USB(x)         (((uint32_t)(((uint32_t)(x)) << CSU_SA_L_USB_SHIFT)) & CSU_SA_L_USB_MASK)
 /*! @} */
 
 /*! @name HPCONTROL0 - HPCONTROL0 register */
 /*! @{ */
-#define CSU_HPCONTROL0_HPC_DMA_MASK              (0x4U)
-#define CSU_HPCONTROL0_HPC_DMA_SHIFT             (2U)
-#define CSU_HPCONTROL0_HPC_DMA(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DMA_SHIFT)) & CSU_HPCONTROL0_HPC_DMA_MASK)
-#define CSU_HPCONTROL0_L_DMA_MASK                (0x8U)
-#define CSU_HPCONTROL0_L_DMA_SHIFT               (3U)
-#define CSU_HPCONTROL0_L_DMA(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DMA_SHIFT)) & CSU_HPCONTROL0_L_DMA_MASK)
-#define CSU_HPCONTROL0_HPC_LCDIF_MASK            (0x10U)
-#define CSU_HPCONTROL0_HPC_LCDIF_SHIFT           (4U)
-#define CSU_HPCONTROL0_HPC_LCDIF(x)              (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_LCDIF_SHIFT)) & CSU_HPCONTROL0_HPC_LCDIF_MASK)
-#define CSU_HPCONTROL0_L_LCDIF_MASK              (0x20U)
-#define CSU_HPCONTROL0_L_LCDIF_SHIFT             (5U)
-#define CSU_HPCONTROL0_L_LCDIF(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_LCDIF_SHIFT)) & CSU_HPCONTROL0_L_LCDIF_MASK)
-#define CSU_HPCONTROL0_HPC_CSI_MASK              (0x40U)
-#define CSU_HPCONTROL0_HPC_CSI_SHIFT             (6U)
-#define CSU_HPCONTROL0_HPC_CSI(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_CSI_SHIFT)) & CSU_HPCONTROL0_HPC_CSI_MASK)
-#define CSU_HPCONTROL0_L_CSI_MASK                (0x80U)
-#define CSU_HPCONTROL0_L_CSI_SHIFT               (7U)
-#define CSU_HPCONTROL0_L_CSI(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_CSI_SHIFT)) & CSU_HPCONTROL0_L_CSI_MASK)
-#define CSU_HPCONTROL0_HPC_PXP_MASK              (0x100U)
-#define CSU_HPCONTROL0_HPC_PXP_SHIFT             (8U)
-#define CSU_HPCONTROL0_HPC_PXP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_PXP_SHIFT)) & CSU_HPCONTROL0_HPC_PXP_MASK)
-#define CSU_HPCONTROL0_L_PXP_MASK                (0x200U)
-#define CSU_HPCONTROL0_L_PXP_SHIFT               (9U)
-#define CSU_HPCONTROL0_L_PXP(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_PXP_SHIFT)) & CSU_HPCONTROL0_L_PXP_MASK)
-#define CSU_HPCONTROL0_HPC_DCP_MASK              (0x400U)
-#define CSU_HPCONTROL0_HPC_DCP_SHIFT             (10U)
-#define CSU_HPCONTROL0_HPC_DCP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DCP_SHIFT)) & CSU_HPCONTROL0_HPC_DCP_MASK)
-#define CSU_HPCONTROL0_L_DCP_MASK                (0x800U)
-#define CSU_HPCONTROL0_L_DCP_SHIFT               (11U)
-#define CSU_HPCONTROL0_L_DCP(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DCP_SHIFT)) & CSU_HPCONTROL0_L_DCP_MASK)
-#define CSU_HPCONTROL0_HPC_ENET_MASK             (0x4000U)
-#define CSU_HPCONTROL0_HPC_ENET_SHIFT            (14U)
-#define CSU_HPCONTROL0_HPC_ENET(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_ENET_SHIFT)) & CSU_HPCONTROL0_HPC_ENET_MASK)
-#define CSU_HPCONTROL0_L_ENET_MASK               (0x8000U)
-#define CSU_HPCONTROL0_L_ENET_SHIFT              (15U)
-#define CSU_HPCONTROL0_L_ENET(x)                 (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_ENET_SHIFT)) & CSU_HPCONTROL0_L_ENET_MASK)
-#define CSU_HPCONTROL0_HPC_USDHC1_MASK           (0x10000U)
-#define CSU_HPCONTROL0_HPC_USDHC1_SHIFT          (16U)
-#define CSU_HPCONTROL0_HPC_USDHC1(x)             (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC1_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC1_MASK)
-#define CSU_HPCONTROL0_L_USDHC1_MASK             (0x20000U)
-#define CSU_HPCONTROL0_L_USDHC1_SHIFT            (17U)
-#define CSU_HPCONTROL0_L_USDHC1(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC1_SHIFT)) & CSU_HPCONTROL0_L_USDHC1_MASK)
-#define CSU_HPCONTROL0_HPC_USDHC2_MASK           (0x40000U)
-#define CSU_HPCONTROL0_HPC_USDHC2_SHIFT          (18U)
-#define CSU_HPCONTROL0_HPC_USDHC2(x)             (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC2_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC2_MASK)
-#define CSU_HPCONTROL0_L_USDHC2_MASK             (0x80000U)
-#define CSU_HPCONTROL0_L_USDHC2_SHIFT            (19U)
-#define CSU_HPCONTROL0_L_USDHC2(x)               (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC2_SHIFT)) & CSU_HPCONTROL0_L_USDHC2_MASK)
-#define CSU_HPCONTROL0_HPC_TPSMP_MASK            (0x100000U)
-#define CSU_HPCONTROL0_HPC_TPSMP_SHIFT           (20U)
-#define CSU_HPCONTROL0_HPC_TPSMP(x)              (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_TPSMP_SHIFT)) & CSU_HPCONTROL0_HPC_TPSMP_MASK)
-#define CSU_HPCONTROL0_L_TPSMP_MASK              (0x200000U)
-#define CSU_HPCONTROL0_L_TPSMP_SHIFT             (21U)
-#define CSU_HPCONTROL0_L_TPSMP(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_TPSMP_SHIFT)) & CSU_HPCONTROL0_L_TPSMP_MASK)
-#define CSU_HPCONTROL0_HPC_USB_MASK              (0x400000U)
-#define CSU_HPCONTROL0_HPC_USB_SHIFT             (22U)
-#define CSU_HPCONTROL0_HPC_USB(x)                (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USB_SHIFT)) & CSU_HPCONTROL0_HPC_USB_MASK)
-#define CSU_HPCONTROL0_L_USB_MASK                (0x800000U)
-#define CSU_HPCONTROL0_L_USB_SHIFT               (23U)
-#define CSU_HPCONTROL0_L_USB(x)                  (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USB_SHIFT)) & CSU_HPCONTROL0_L_USB_MASK)
+#define CSU_HPCONTROL0_HPC_DMA_MASK  (0x4U)
+#define CSU_HPCONTROL0_HPC_DMA_SHIFT (2U)
+#define CSU_HPCONTROL0_HPC_DMA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DMA_SHIFT)) & CSU_HPCONTROL0_HPC_DMA_MASK)
+#define CSU_HPCONTROL0_L_DMA_MASK  (0x8U)
+#define CSU_HPCONTROL0_L_DMA_SHIFT (3U)
+#define CSU_HPCONTROL0_L_DMA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DMA_SHIFT)) & CSU_HPCONTROL0_L_DMA_MASK)
+#define CSU_HPCONTROL0_HPC_LCDIF_MASK  (0x10U)
+#define CSU_HPCONTROL0_HPC_LCDIF_SHIFT (4U)
+#define CSU_HPCONTROL0_HPC_LCDIF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_LCDIF_SHIFT)) & CSU_HPCONTROL0_HPC_LCDIF_MASK)
+#define CSU_HPCONTROL0_L_LCDIF_MASK  (0x20U)
+#define CSU_HPCONTROL0_L_LCDIF_SHIFT (5U)
+#define CSU_HPCONTROL0_L_LCDIF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_LCDIF_SHIFT)) & CSU_HPCONTROL0_L_LCDIF_MASK)
+#define CSU_HPCONTROL0_HPC_CSI_MASK  (0x40U)
+#define CSU_HPCONTROL0_HPC_CSI_SHIFT (6U)
+#define CSU_HPCONTROL0_HPC_CSI(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_CSI_SHIFT)) & CSU_HPCONTROL0_HPC_CSI_MASK)
+#define CSU_HPCONTROL0_L_CSI_MASK  (0x80U)
+#define CSU_HPCONTROL0_L_CSI_SHIFT (7U)
+#define CSU_HPCONTROL0_L_CSI(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_CSI_SHIFT)) & CSU_HPCONTROL0_L_CSI_MASK)
+#define CSU_HPCONTROL0_HPC_PXP_MASK  (0x100U)
+#define CSU_HPCONTROL0_HPC_PXP_SHIFT (8U)
+#define CSU_HPCONTROL0_HPC_PXP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_PXP_SHIFT)) & CSU_HPCONTROL0_HPC_PXP_MASK)
+#define CSU_HPCONTROL0_L_PXP_MASK  (0x200U)
+#define CSU_HPCONTROL0_L_PXP_SHIFT (9U)
+#define CSU_HPCONTROL0_L_PXP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_PXP_SHIFT)) & CSU_HPCONTROL0_L_PXP_MASK)
+#define CSU_HPCONTROL0_HPC_DCP_MASK  (0x400U)
+#define CSU_HPCONTROL0_HPC_DCP_SHIFT (10U)
+#define CSU_HPCONTROL0_HPC_DCP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_DCP_SHIFT)) & CSU_HPCONTROL0_HPC_DCP_MASK)
+#define CSU_HPCONTROL0_L_DCP_MASK  (0x800U)
+#define CSU_HPCONTROL0_L_DCP_SHIFT (11U)
+#define CSU_HPCONTROL0_L_DCP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_DCP_SHIFT)) & CSU_HPCONTROL0_L_DCP_MASK)
+#define CSU_HPCONTROL0_HPC_ENET_MASK  (0x4000U)
+#define CSU_HPCONTROL0_HPC_ENET_SHIFT (14U)
+#define CSU_HPCONTROL0_HPC_ENET(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_ENET_SHIFT)) & CSU_HPCONTROL0_HPC_ENET_MASK)
+#define CSU_HPCONTROL0_L_ENET_MASK  (0x8000U)
+#define CSU_HPCONTROL0_L_ENET_SHIFT (15U)
+#define CSU_HPCONTROL0_L_ENET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_ENET_SHIFT)) & CSU_HPCONTROL0_L_ENET_MASK)
+#define CSU_HPCONTROL0_HPC_USDHC1_MASK  (0x10000U)
+#define CSU_HPCONTROL0_HPC_USDHC1_SHIFT (16U)
+#define CSU_HPCONTROL0_HPC_USDHC1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC1_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC1_MASK)
+#define CSU_HPCONTROL0_L_USDHC1_MASK  (0x20000U)
+#define CSU_HPCONTROL0_L_USDHC1_SHIFT (17U)
+#define CSU_HPCONTROL0_L_USDHC1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC1_SHIFT)) & CSU_HPCONTROL0_L_USDHC1_MASK)
+#define CSU_HPCONTROL0_HPC_USDHC2_MASK  (0x40000U)
+#define CSU_HPCONTROL0_HPC_USDHC2_SHIFT (18U)
+#define CSU_HPCONTROL0_HPC_USDHC2(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USDHC2_SHIFT)) & CSU_HPCONTROL0_HPC_USDHC2_MASK)
+#define CSU_HPCONTROL0_L_USDHC2_MASK  (0x80000U)
+#define CSU_HPCONTROL0_L_USDHC2_SHIFT (19U)
+#define CSU_HPCONTROL0_L_USDHC2(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USDHC2_SHIFT)) & CSU_HPCONTROL0_L_USDHC2_MASK)
+#define CSU_HPCONTROL0_HPC_TPSMP_MASK  (0x100000U)
+#define CSU_HPCONTROL0_HPC_TPSMP_SHIFT (20U)
+#define CSU_HPCONTROL0_HPC_TPSMP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_TPSMP_SHIFT)) & CSU_HPCONTROL0_HPC_TPSMP_MASK)
+#define CSU_HPCONTROL0_L_TPSMP_MASK  (0x200000U)
+#define CSU_HPCONTROL0_L_TPSMP_SHIFT (21U)
+#define CSU_HPCONTROL0_L_TPSMP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_TPSMP_SHIFT)) & CSU_HPCONTROL0_L_TPSMP_MASK)
+#define CSU_HPCONTROL0_HPC_USB_MASK  (0x400000U)
+#define CSU_HPCONTROL0_HPC_USB_SHIFT (22U)
+#define CSU_HPCONTROL0_HPC_USB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_HPC_USB_SHIFT)) & CSU_HPCONTROL0_HPC_USB_MASK)
+#define CSU_HPCONTROL0_L_USB_MASK  (0x800000U)
+#define CSU_HPCONTROL0_L_USB_SHIFT (23U)
+#define CSU_HPCONTROL0_L_USB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << CSU_HPCONTROL0_L_USB_SHIFT)) & CSU_HPCONTROL0_L_USB_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group CSU_Register_Masks */
 
-
 /* CSU - Peripheral instance base addresses */
 /** Peripheral CSU base address */
-#define CSU_BASE                                 (0x400DC000u)
+#define CSU_BASE (0x400DC000u)
 /** Peripheral CSU base pointer */
-#define CSU                                      ((CSU_Type *)CSU_BASE)
+#define CSU ((CSU_Type *)CSU_BASE)
 /** Array initializer of CSU peripheral base addresses */
-#define CSU_BASE_ADDRS                           { CSU_BASE }
+#define CSU_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        CSU_BASE                                                                                                       \
+    }
 /** Array initializer of CSU peripheral base pointers */
-#define CSU_BASE_PTRS                            { CSU }
+#define CSU_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        CSU                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group CSU_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DCDC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6114,11 +7231,12 @@ typedef struct {
  */
 
 /** DCDC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t REG0;                              /**< DCDC Register 0, offset: 0x0 */
-  __IO uint32_t REG1;                              /**< DCDC Register 1, offset: 0x4 */
-  __IO uint32_t REG2;                              /**< DCDC Register 2, offset: 0x8 */
-  __IO uint32_t REG3;                              /**< DCDC Register 3, offset: 0xC */
+typedef struct
+{
+    __IO uint32_t REG0; /**< DCDC Register 0, offset: 0x0 */
+    __IO uint32_t REG1; /**< DCDC Register 1, offset: 0x4 */
+    __IO uint32_t REG2; /**< DCDC Register 2, offset: 0x8 */
+    __IO uint32_t REG3; /**< DCDC Register 3, offset: 0xC */
 } DCDC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -6132,163 +7250,203 @@ typedef struct {
 
 /*! @name REG0 - DCDC Register 0 */
 /*! @{ */
-#define DCDC_REG0_PWD_ZCD_MASK                   (0x1U)
-#define DCDC_REG0_PWD_ZCD_SHIFT                  (0U)
-#define DCDC_REG0_PWD_ZCD(x)                     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_ZCD_SHIFT)) & DCDC_REG0_PWD_ZCD_MASK)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK   (0x2U)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT  (1U)
-#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH(x)     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT)) & DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK)
-#define DCDC_REG0_SEL_CLK_MASK                   (0x4U)
-#define DCDC_REG0_SEL_CLK_SHIFT                  (2U)
-#define DCDC_REG0_SEL_CLK(x)                     (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_SEL_CLK_SHIFT)) & DCDC_REG0_SEL_CLK_MASK)
-#define DCDC_REG0_PWD_OSC_INT_MASK               (0x8U)
-#define DCDC_REG0_PWD_OSC_INT_SHIFT              (3U)
-#define DCDC_REG0_PWD_OSC_INT(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OSC_INT_SHIFT)) & DCDC_REG0_PWD_OSC_INT_MASK)
-#define DCDC_REG0_PWD_CUR_SNS_CMP_MASK           (0x10U)
-#define DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT          (4U)
-#define DCDC_REG0_PWD_CUR_SNS_CMP(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT)) & DCDC_REG0_PWD_CUR_SNS_CMP_MASK)
-#define DCDC_REG0_CUR_SNS_THRSH_MASK             (0xE0U)
-#define DCDC_REG0_CUR_SNS_THRSH_SHIFT            (5U)
-#define DCDC_REG0_CUR_SNS_THRSH(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CUR_SNS_THRSH_SHIFT)) & DCDC_REG0_CUR_SNS_THRSH_MASK)
-#define DCDC_REG0_PWD_OVERCUR_DET_MASK           (0x100U)
-#define DCDC_REG0_PWD_OVERCUR_DET_SHIFT          (8U)
-#define DCDC_REG0_PWD_OVERCUR_DET(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OVERCUR_DET_SHIFT)) & DCDC_REG0_PWD_OVERCUR_DET_MASK)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ_MASK          (0x600U)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT         (9U)
-#define DCDC_REG0_OVERCUR_TRIG_ADJ(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT)) & DCDC_REG0_OVERCUR_TRIG_ADJ_MASK)
-#define DCDC_REG0_PWD_CMP_BATT_DET_MASK          (0x800U)
-#define DCDC_REG0_PWD_CMP_BATT_DET_SHIFT         (11U)
-#define DCDC_REG0_PWD_CMP_BATT_DET(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_BATT_DET_SHIFT)) & DCDC_REG0_PWD_CMP_BATT_DET_MASK)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK         (0xF000U)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT        (12U)
-#define DCDC_REG0_ADJ_POSLIMIT_BUCK(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT)) & DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK        (0x10000U)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT       (16U)
-#define DCDC_REG0_EN_LP_OVERLOAD_SNS(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT)) & DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET_MASK         (0x20000U)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT        (17U)
-#define DCDC_REG0_PWD_HIGH_VOLT_DET(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT)) & DCDC_REG0_PWD_HIGH_VOLT_DET_MASK)
-#define DCDC_REG0_LP_OVERLOAD_THRSH_MASK         (0xC0000U)
-#define DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT        (18U)
-#define DCDC_REG0_LP_OVERLOAD_THRSH(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT)) & DCDC_REG0_LP_OVERLOAD_THRSH_MASK)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK      (0x100000U)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT     (20U)
-#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL(x)        (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT)) & DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK)
-#define DCDC_REG0_LP_HIGH_HYS_MASK               (0x200000U)
-#define DCDC_REG0_LP_HIGH_HYS_SHIFT              (21U)
-#define DCDC_REG0_LP_HIGH_HYS(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_HIGH_HYS_SHIFT)) & DCDC_REG0_LP_HIGH_HYS_MASK)
-#define DCDC_REG0_PWD_CMP_OFFSET_MASK            (0x4000000U)
-#define DCDC_REG0_PWD_CMP_OFFSET_SHIFT           (26U)
-#define DCDC_REG0_PWD_CMP_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_OFFSET_SHIFT)) & DCDC_REG0_PWD_CMP_OFFSET_MASK)
-#define DCDC_REG0_XTALOK_DISABLE_MASK            (0x8000000U)
-#define DCDC_REG0_XTALOK_DISABLE_SHIFT           (27U)
-#define DCDC_REG0_XTALOK_DISABLE(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTALOK_DISABLE_SHIFT)) & DCDC_REG0_XTALOK_DISABLE_MASK)
-#define DCDC_REG0_CURRENT_ALERT_RESET_MASK       (0x10000000U)
-#define DCDC_REG0_CURRENT_ALERT_RESET_SHIFT      (28U)
-#define DCDC_REG0_CURRENT_ALERT_RESET(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CURRENT_ALERT_RESET_SHIFT)) & DCDC_REG0_CURRENT_ALERT_RESET_MASK)
-#define DCDC_REG0_XTAL_24M_OK_MASK               (0x20000000U)
-#define DCDC_REG0_XTAL_24M_OK_SHIFT              (29U)
-#define DCDC_REG0_XTAL_24M_OK(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTAL_24M_OK_SHIFT)) & DCDC_REG0_XTAL_24M_OK_MASK)
-#define DCDC_REG0_STS_DC_OK_MASK                 (0x80000000U)
-#define DCDC_REG0_STS_DC_OK_SHIFT                (31U)
-#define DCDC_REG0_STS_DC_OK(x)                   (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_STS_DC_OK_SHIFT)) & DCDC_REG0_STS_DC_OK_MASK)
+#define DCDC_REG0_PWD_ZCD_MASK                  (0x1U)
+#define DCDC_REG0_PWD_ZCD_SHIFT                 (0U)
+#define DCDC_REG0_PWD_ZCD(x)                    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_ZCD_SHIFT)) & DCDC_REG0_PWD_ZCD_MASK)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK  (0x2U)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT (1U)
+#define DCDC_REG0_DISABLE_AUTO_CLK_SWITCH(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_SHIFT)) & DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK)
+#define DCDC_REG0_SEL_CLK_MASK      (0x4U)
+#define DCDC_REG0_SEL_CLK_SHIFT     (2U)
+#define DCDC_REG0_SEL_CLK(x)        (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_SEL_CLK_SHIFT)) & DCDC_REG0_SEL_CLK_MASK)
+#define DCDC_REG0_PWD_OSC_INT_MASK  (0x8U)
+#define DCDC_REG0_PWD_OSC_INT_SHIFT (3U)
+#define DCDC_REG0_PWD_OSC_INT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OSC_INT_SHIFT)) & DCDC_REG0_PWD_OSC_INT_MASK)
+#define DCDC_REG0_PWD_CUR_SNS_CMP_MASK  (0x10U)
+#define DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT (4U)
+#define DCDC_REG0_PWD_CUR_SNS_CMP(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CUR_SNS_CMP_SHIFT)) & DCDC_REG0_PWD_CUR_SNS_CMP_MASK)
+#define DCDC_REG0_CUR_SNS_THRSH_MASK  (0xE0U)
+#define DCDC_REG0_CUR_SNS_THRSH_SHIFT (5U)
+#define DCDC_REG0_CUR_SNS_THRSH(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CUR_SNS_THRSH_SHIFT)) & DCDC_REG0_CUR_SNS_THRSH_MASK)
+#define DCDC_REG0_PWD_OVERCUR_DET_MASK  (0x100U)
+#define DCDC_REG0_PWD_OVERCUR_DET_SHIFT (8U)
+#define DCDC_REG0_PWD_OVERCUR_DET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_OVERCUR_DET_SHIFT)) & DCDC_REG0_PWD_OVERCUR_DET_MASK)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ_MASK  (0x600U)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT (9U)
+#define DCDC_REG0_OVERCUR_TRIG_ADJ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_OVERCUR_TRIG_ADJ_SHIFT)) & DCDC_REG0_OVERCUR_TRIG_ADJ_MASK)
+#define DCDC_REG0_PWD_CMP_BATT_DET_MASK  (0x800U)
+#define DCDC_REG0_PWD_CMP_BATT_DET_SHIFT (11U)
+#define DCDC_REG0_PWD_CMP_BATT_DET(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_BATT_DET_SHIFT)) & DCDC_REG0_PWD_CMP_BATT_DET_MASK)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK  (0xF000U)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT (12U)
+#define DCDC_REG0_ADJ_POSLIMIT_BUCK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_ADJ_POSLIMIT_BUCK_SHIFT)) & DCDC_REG0_ADJ_POSLIMIT_BUCK_MASK)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK  (0x10000U)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT (16U)
+#define DCDC_REG0_EN_LP_OVERLOAD_SNS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_EN_LP_OVERLOAD_SNS_SHIFT)) & DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET_MASK  (0x20000U)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT (17U)
+#define DCDC_REG0_PWD_HIGH_VOLT_DET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_HIGH_VOLT_DET_SHIFT)) & DCDC_REG0_PWD_HIGH_VOLT_DET_MASK)
+#define DCDC_REG0_LP_OVERLOAD_THRSH_MASK  (0xC0000U)
+#define DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT (18U)
+#define DCDC_REG0_LP_OVERLOAD_THRSH(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_THRSH_SHIFT)) & DCDC_REG0_LP_OVERLOAD_THRSH_MASK)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK  (0x100000U)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT (20U)
+#define DCDC_REG0_LP_OVERLOAD_FREQ_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_OVERLOAD_FREQ_SEL_SHIFT)) & DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK)
+#define DCDC_REG0_LP_HIGH_HYS_MASK  (0x200000U)
+#define DCDC_REG0_LP_HIGH_HYS_SHIFT (21U)
+#define DCDC_REG0_LP_HIGH_HYS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_LP_HIGH_HYS_SHIFT)) & DCDC_REG0_LP_HIGH_HYS_MASK)
+#define DCDC_REG0_PWD_CMP_OFFSET_MASK  (0x4000000U)
+#define DCDC_REG0_PWD_CMP_OFFSET_SHIFT (26U)
+#define DCDC_REG0_PWD_CMP_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_PWD_CMP_OFFSET_SHIFT)) & DCDC_REG0_PWD_CMP_OFFSET_MASK)
+#define DCDC_REG0_XTALOK_DISABLE_MASK  (0x8000000U)
+#define DCDC_REG0_XTALOK_DISABLE_SHIFT (27U)
+#define DCDC_REG0_XTALOK_DISABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTALOK_DISABLE_SHIFT)) & DCDC_REG0_XTALOK_DISABLE_MASK)
+#define DCDC_REG0_CURRENT_ALERT_RESET_MASK  (0x10000000U)
+#define DCDC_REG0_CURRENT_ALERT_RESET_SHIFT (28U)
+#define DCDC_REG0_CURRENT_ALERT_RESET(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_CURRENT_ALERT_RESET_SHIFT)) & DCDC_REG0_CURRENT_ALERT_RESET_MASK)
+#define DCDC_REG0_XTAL_24M_OK_MASK  (0x20000000U)
+#define DCDC_REG0_XTAL_24M_OK_SHIFT (29U)
+#define DCDC_REG0_XTAL_24M_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_XTAL_24M_OK_SHIFT)) & DCDC_REG0_XTAL_24M_OK_MASK)
+#define DCDC_REG0_STS_DC_OK_MASK  (0x80000000U)
+#define DCDC_REG0_STS_DC_OK_SHIFT (31U)
+#define DCDC_REG0_STS_DC_OK(x)    (((uint32_t)(((uint32_t)(x)) << DCDC_REG0_STS_DC_OK_SHIFT)) & DCDC_REG0_STS_DC_OK_MASK)
 /*! @} */
 
 /*! @name REG1 - DCDC Register 1 */
 /*! @{ */
-#define DCDC_REG1_REG_FBK_SEL_MASK               (0x180U)
-#define DCDC_REG1_REG_FBK_SEL_SHIFT              (7U)
-#define DCDC_REG1_REG_FBK_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_FBK_SEL_SHIFT)) & DCDC_REG1_REG_FBK_SEL_MASK)
-#define DCDC_REG1_REG_RLOAD_SW_MASK              (0x200U)
-#define DCDC_REG1_REG_RLOAD_SW_SHIFT             (9U)
-#define DCDC_REG1_REG_RLOAD_SW(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_RLOAD_SW_SHIFT)) & DCDC_REG1_REG_RLOAD_SW_MASK)
-#define DCDC_REG1_LP_CMP_ISRC_SEL_MASK           (0x3000U)
-#define DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT          (12U)
-#define DCDC_REG1_LP_CMP_ISRC_SEL(x)             (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT)) & DCDC_REG1_LP_CMP_ISRC_SEL_MASK)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH_MASK       (0x200000U)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT      (21U)
-#define DCDC_REG1_LOOPCTRL_HST_THRESH(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT)) & DCDC_REG1_LOOPCTRL_HST_THRESH_MASK)
-#define DCDC_REG1_LOOPCTRL_EN_HYST_MASK          (0x800000U)
-#define DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT         (23U)
-#define DCDC_REG1_LOOPCTRL_EN_HYST(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT)) & DCDC_REG1_LOOPCTRL_EN_HYST_MASK)
-#define DCDC_REG1_VBG_TRIM_MASK                  (0x1F000000U)
-#define DCDC_REG1_VBG_TRIM_SHIFT                 (24U)
-#define DCDC_REG1_VBG_TRIM(x)                    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_VBG_TRIM_SHIFT)) & DCDC_REG1_VBG_TRIM_MASK)
+#define DCDC_REG1_REG_FBK_SEL_MASK  (0x180U)
+#define DCDC_REG1_REG_FBK_SEL_SHIFT (7U)
+#define DCDC_REG1_REG_FBK_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_FBK_SEL_SHIFT)) & DCDC_REG1_REG_FBK_SEL_MASK)
+#define DCDC_REG1_REG_RLOAD_SW_MASK  (0x200U)
+#define DCDC_REG1_REG_RLOAD_SW_SHIFT (9U)
+#define DCDC_REG1_REG_RLOAD_SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_REG_RLOAD_SW_SHIFT)) & DCDC_REG1_REG_RLOAD_SW_MASK)
+#define DCDC_REG1_LP_CMP_ISRC_SEL_MASK  (0x3000U)
+#define DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT (12U)
+#define DCDC_REG1_LP_CMP_ISRC_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_ISRC_SEL_SHIFT)) & DCDC_REG1_LP_CMP_ISRC_SEL_MASK)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH_MASK  (0x200000U)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT (21U)
+#define DCDC_REG1_LOOPCTRL_HST_THRESH(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_HST_THRESH_SHIFT)) & DCDC_REG1_LOOPCTRL_HST_THRESH_MASK)
+#define DCDC_REG1_LOOPCTRL_EN_HYST_MASK  (0x800000U)
+#define DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT (23U)
+#define DCDC_REG1_LOOPCTRL_EN_HYST(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LOOPCTRL_EN_HYST_SHIFT)) & DCDC_REG1_LOOPCTRL_EN_HYST_MASK)
+#define DCDC_REG1_VBG_TRIM_MASK  (0x1F000000U)
+#define DCDC_REG1_VBG_TRIM_SHIFT (24U)
+#define DCDC_REG1_VBG_TRIM(x)    (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_VBG_TRIM_SHIFT)) & DCDC_REG1_VBG_TRIM_MASK)
 /*! @} */
 
 /*! @name REG2 - DCDC Register 2 */
 /*! @{ */
-#define DCDC_REG2_LOOPCTRL_DC_C_MASK             (0x3U)
-#define DCDC_REG2_LOOPCTRL_DC_C_SHIFT            (0U)
-#define DCDC_REG2_LOOPCTRL_DC_C(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_C_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_C_MASK)
-#define DCDC_REG2_LOOPCTRL_DC_R_MASK             (0x3CU)
-#define DCDC_REG2_LOOPCTRL_DC_R_SHIFT            (2U)
-#define DCDC_REG2_LOOPCTRL_DC_R(x)               (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_R_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_R_MASK)
-#define DCDC_REG2_LOOPCTRL_DC_FF_MASK            (0x1C0U)
-#define DCDC_REG2_LOOPCTRL_DC_FF_SHIFT           (6U)
-#define DCDC_REG2_LOOPCTRL_DC_FF(x)              (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_FF_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_FF_MASK)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK       (0xE00U)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT      (9U)
-#define DCDC_REG2_LOOPCTRL_EN_RCSCALE(x)         (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT)) & DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK    (0x1000U)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT   (12U)
-#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH(x)      (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT)) & DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK        (0x2000U)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT       (13U)
-#define DCDC_REG2_LOOPCTRL_HYST_SIGN(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT)) & DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK)
-#define DCDC_REG2_DISABLE_PULSE_SKIP_MASK        (0x8000000U)
-#define DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT       (27U)
-#define DCDC_REG2_DISABLE_PULSE_SKIP(x)          (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT)) & DCDC_REG2_DISABLE_PULSE_SKIP_MASK)
-#define DCDC_REG2_DCM_SET_CTRL_MASK              (0x10000000U)
-#define DCDC_REG2_DCM_SET_CTRL_SHIFT             (28U)
-#define DCDC_REG2_DCM_SET_CTRL(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DCM_SET_CTRL_SHIFT)) & DCDC_REG2_DCM_SET_CTRL_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_C_MASK  (0x3U)
+#define DCDC_REG2_LOOPCTRL_DC_C_SHIFT (0U)
+#define DCDC_REG2_LOOPCTRL_DC_C(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_C_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_C_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_R_MASK  (0x3CU)
+#define DCDC_REG2_LOOPCTRL_DC_R_SHIFT (2U)
+#define DCDC_REG2_LOOPCTRL_DC_R(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_R_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_R_MASK)
+#define DCDC_REG2_LOOPCTRL_DC_FF_MASK  (0x1C0U)
+#define DCDC_REG2_LOOPCTRL_DC_FF_SHIFT (6U)
+#define DCDC_REG2_LOOPCTRL_DC_FF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_DC_FF_SHIFT)) & DCDC_REG2_LOOPCTRL_DC_FF_MASK)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK  (0xE00U)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT (9U)
+#define DCDC_REG2_LOOPCTRL_EN_RCSCALE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_EN_RCSCALE_SHIFT)) & DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK  (0x1000U)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT (12U)
+#define DCDC_REG2_LOOPCTRL_RCSCALE_THRSH(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_SHIFT)) & DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK  (0x2000U)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT (13U)
+#define DCDC_REG2_LOOPCTRL_HYST_SIGN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_LOOPCTRL_HYST_SIGN_SHIFT)) & DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK)
+#define DCDC_REG2_DISABLE_PULSE_SKIP_MASK  (0x8000000U)
+#define DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT (27U)
+#define DCDC_REG2_DISABLE_PULSE_SKIP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DISABLE_PULSE_SKIP_SHIFT)) & DCDC_REG2_DISABLE_PULSE_SKIP_MASK)
+#define DCDC_REG2_DCM_SET_CTRL_MASK  (0x10000000U)
+#define DCDC_REG2_DCM_SET_CTRL_SHIFT (28U)
+#define DCDC_REG2_DCM_SET_CTRL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG2_DCM_SET_CTRL_SHIFT)) & DCDC_REG2_DCM_SET_CTRL_MASK)
 /*! @} */
 
 /*! @name REG3 - DCDC Register 3 */
 /*! @{ */
-#define DCDC_REG3_TRG_MASK                       (0x1FU)
-#define DCDC_REG3_TRG_SHIFT                      (0U)
-#define DCDC_REG3_TRG(x)                         (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TRG_SHIFT)) & DCDC_REG3_TRG_MASK)
-#define DCDC_REG3_TARGET_LP_MASK                 (0x700U)
-#define DCDC_REG3_TARGET_LP_SHIFT                (8U)
-#define DCDC_REG3_TARGET_LP(x)                   (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TARGET_LP_SHIFT)) & DCDC_REG3_TARGET_LP_MASK)
-#define DCDC_REG3_MINPWR_DC_HALFCLK_MASK         (0x1000000U)
-#define DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT        (24U)
-#define DCDC_REG3_MINPWR_DC_HALFCLK(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT)) & DCDC_REG3_MINPWR_DC_HALFCLK_MASK)
-#define DCDC_REG3_MISC_DELAY_TIMING_MASK         (0x8000000U)
-#define DCDC_REG3_MISC_DELAY_TIMING_SHIFT        (27U)
-#define DCDC_REG3_MISC_DELAY_TIMING(x)           (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DELAY_TIMING_SHIFT)) & DCDC_REG3_MISC_DELAY_TIMING_MASK)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK     (0x10000000U)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT    (28U)
-#define DCDC_REG3_MISC_DISABLEFET_LOGIC(x)       (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT)) & DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK)
-#define DCDC_REG3_DISABLE_STEP_MASK              (0x40000000U)
-#define DCDC_REG3_DISABLE_STEP_SHIFT             (30U)
-#define DCDC_REG3_DISABLE_STEP(x)                (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_DISABLE_STEP_SHIFT)) & DCDC_REG3_DISABLE_STEP_MASK)
+#define DCDC_REG3_TRG_MASK                (0x1FU)
+#define DCDC_REG3_TRG_SHIFT               (0U)
+#define DCDC_REG3_TRG(x)                  (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TRG_SHIFT)) & DCDC_REG3_TRG_MASK)
+#define DCDC_REG3_TARGET_LP_MASK          (0x700U)
+#define DCDC_REG3_TARGET_LP_SHIFT         (8U)
+#define DCDC_REG3_TARGET_LP(x)            (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_TARGET_LP_SHIFT)) & DCDC_REG3_TARGET_LP_MASK)
+#define DCDC_REG3_MINPWR_DC_HALFCLK_MASK  (0x1000000U)
+#define DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT (24U)
+#define DCDC_REG3_MINPWR_DC_HALFCLK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MINPWR_DC_HALFCLK_SHIFT)) & DCDC_REG3_MINPWR_DC_HALFCLK_MASK)
+#define DCDC_REG3_MISC_DELAY_TIMING_MASK  (0x8000000U)
+#define DCDC_REG3_MISC_DELAY_TIMING_SHIFT (27U)
+#define DCDC_REG3_MISC_DELAY_TIMING(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DELAY_TIMING_SHIFT)) & DCDC_REG3_MISC_DELAY_TIMING_MASK)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK  (0x10000000U)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT (28U)
+#define DCDC_REG3_MISC_DISABLEFET_LOGIC(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_MISC_DISABLEFET_LOGIC_SHIFT)) & DCDC_REG3_MISC_DISABLEFET_LOGIC_MASK)
+#define DCDC_REG3_DISABLE_STEP_MASK  (0x40000000U)
+#define DCDC_REG3_DISABLE_STEP_SHIFT (30U)
+#define DCDC_REG3_DISABLE_STEP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_DISABLE_STEP_SHIFT)) & DCDC_REG3_DISABLE_STEP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group DCDC_Register_Masks */
 
-
 /* DCDC - Peripheral instance base addresses */
 /** Peripheral DCDC base address */
-#define DCDC_BASE                                (0x40080000u)
+#define DCDC_BASE (0x40080000u)
 /** Peripheral DCDC base pointer */
-#define DCDC                                     ((DCDC_Type *)DCDC_BASE)
+#define DCDC ((DCDC_Type *)DCDC_BASE)
 /** Array initializer of DCDC peripheral base addresses */
-#define DCDC_BASE_ADDRS                          { DCDC_BASE }
+#define DCDC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        DCDC_BASE                                                                                                      \
+    }
 /** Array initializer of DCDC peripheral base pointers */
-#define DCDC_BASE_PTRS                           { DCDC }
+#define DCDC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        DCDC                                                                                                           \
+    }
 /** Interrupt vectors for the DCDC peripheral type */
-#define DCDC_IRQS                                { DCDC_IRQn }
+#define DCDC_IRQS                                                                                                      \
+    {                                                                                                                  \
+        DCDC_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group DCDC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DCP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6299,76 +7457,77 @@ typedef struct {
  */
 
 /** DCP - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< DCP control register 0, offset: 0x0 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t STAT;                              /**< DCP status register, offset: 0x10 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t CHANNELCTRL;                       /**< DCP channel control register, offset: 0x20 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t CAPABILITY0;                       /**< DCP capability 0 register, offset: 0x30 */
-       uint8_t RESERVED_3[12];
-  __I  uint32_t CAPABILITY1;                       /**< DCP capability 1 register, offset: 0x40 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t CONTEXT;                           /**< DCP context buffer pointer, offset: 0x50 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t KEY;                               /**< DCP key index, offset: 0x60 */
-       uint8_t RESERVED_6[12];
-  __IO uint32_t KEYDATA;                           /**< DCP key data, offset: 0x70 */
-       uint8_t RESERVED_7[12];
-  __I  uint32_t PACKET0;                           /**< DCP work packet 0 status register, offset: 0x80 */
-       uint8_t RESERVED_8[12];
-  __I  uint32_t PACKET1;                           /**< DCP work packet 1 status register, offset: 0x90 */
-       uint8_t RESERVED_9[12];
-  __I  uint32_t PACKET2;                           /**< DCP work packet 2 status register, offset: 0xA0 */
-       uint8_t RESERVED_10[12];
-  __I  uint32_t PACKET3;                           /**< DCP work packet 3 status register, offset: 0xB0 */
-       uint8_t RESERVED_11[12];
-  __I  uint32_t PACKET4;                           /**< DCP work packet 4 status register, offset: 0xC0 */
-       uint8_t RESERVED_12[12];
-  __I  uint32_t PACKET5;                           /**< DCP work packet 5 status register, offset: 0xD0 */
-       uint8_t RESERVED_13[12];
-  __I  uint32_t PACKET6;                           /**< DCP work packet 6 status register, offset: 0xE0 */
-       uint8_t RESERVED_14[28];
-  __IO uint32_t CH0CMDPTR;                         /**< DCP channel 0 command pointer address register, offset: 0x100 */
-       uint8_t RESERVED_15[12];
-  __IO uint32_t CH0SEMA;                           /**< DCP channel 0 semaphore register, offset: 0x110 */
-       uint8_t RESERVED_16[12];
-  __IO uint32_t CH0STAT;                           /**< DCP channel 0 status register, offset: 0x120 */
-       uint8_t RESERVED_17[12];
-  __IO uint32_t CH0OPTS;                           /**< DCP channel 0 options register, offset: 0x130 */
-       uint8_t RESERVED_18[12];
-  __IO uint32_t CH1CMDPTR;                         /**< DCP channel 1 command pointer address register, offset: 0x140 */
-       uint8_t RESERVED_19[12];
-  __IO uint32_t CH1SEMA;                           /**< DCP channel 1 semaphore register, offset: 0x150 */
-       uint8_t RESERVED_20[12];
-  __IO uint32_t CH1STAT;                           /**< DCP channel 1 status register, offset: 0x160 */
-       uint8_t RESERVED_21[12];
-  __IO uint32_t CH1OPTS;                           /**< DCP channel 1 options register, offset: 0x170 */
-       uint8_t RESERVED_22[12];
-  __IO uint32_t CH2CMDPTR;                         /**< DCP channel 2 command pointer address register, offset: 0x180 */
-       uint8_t RESERVED_23[12];
-  __IO uint32_t CH2SEMA;                           /**< DCP channel 2 semaphore register, offset: 0x190 */
-       uint8_t RESERVED_24[12];
-  __IO uint32_t CH2STAT;                           /**< DCP channel 2 status register, offset: 0x1A0 */
-       uint8_t RESERVED_25[12];
-  __IO uint32_t CH2OPTS;                           /**< DCP channel 2 options register, offset: 0x1B0 */
-       uint8_t RESERVED_26[12];
-  __IO uint32_t CH3CMDPTR;                         /**< DCP channel 3 command pointer address register, offset: 0x1C0 */
-       uint8_t RESERVED_27[12];
-  __IO uint32_t CH3SEMA;                           /**< DCP channel 3 semaphore register, offset: 0x1D0 */
-       uint8_t RESERVED_28[12];
-  __IO uint32_t CH3STAT;                           /**< DCP channel 3 status register, offset: 0x1E0 */
-       uint8_t RESERVED_29[12];
-  __IO uint32_t CH3OPTS;                           /**< DCP channel 3 options register, offset: 0x1F0 */
-       uint8_t RESERVED_30[524];
-  __IO uint32_t DBGSELECT;                         /**< DCP debug select register, offset: 0x400 */
-       uint8_t RESERVED_31[12];
-  __I  uint32_t DBGDATA;                           /**< DCP debug data register, offset: 0x410 */
-       uint8_t RESERVED_32[12];
-  __IO uint32_t PAGETABLE;                         /**< DCP page table register, offset: 0x420 */
-       uint8_t RESERVED_33[12];
-  __I  uint32_t VERSION;                           /**< DCP version register, offset: 0x430 */
+typedef struct
+{
+    __IO uint32_t CTRL; /**< DCP control register 0, offset: 0x0 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t STAT; /**< DCP status register, offset: 0x10 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t CHANNELCTRL; /**< DCP channel control register, offset: 0x20 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t CAPABILITY0; /**< DCP capability 0 register, offset: 0x30 */
+    uint8_t RESERVED_3[12];
+    __I uint32_t CAPABILITY1; /**< DCP capability 1 register, offset: 0x40 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t CONTEXT; /**< DCP context buffer pointer, offset: 0x50 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t KEY; /**< DCP key index, offset: 0x60 */
+    uint8_t RESERVED_6[12];
+    __IO uint32_t KEYDATA; /**< DCP key data, offset: 0x70 */
+    uint8_t RESERVED_7[12];
+    __I uint32_t PACKET0; /**< DCP work packet 0 status register, offset: 0x80 */
+    uint8_t RESERVED_8[12];
+    __I uint32_t PACKET1; /**< DCP work packet 1 status register, offset: 0x90 */
+    uint8_t RESERVED_9[12];
+    __I uint32_t PACKET2; /**< DCP work packet 2 status register, offset: 0xA0 */
+    uint8_t RESERVED_10[12];
+    __I uint32_t PACKET3; /**< DCP work packet 3 status register, offset: 0xB0 */
+    uint8_t RESERVED_11[12];
+    __I uint32_t PACKET4; /**< DCP work packet 4 status register, offset: 0xC0 */
+    uint8_t RESERVED_12[12];
+    __I uint32_t PACKET5; /**< DCP work packet 5 status register, offset: 0xD0 */
+    uint8_t RESERVED_13[12];
+    __I uint32_t PACKET6; /**< DCP work packet 6 status register, offset: 0xE0 */
+    uint8_t RESERVED_14[28];
+    __IO uint32_t CH0CMDPTR; /**< DCP channel 0 command pointer address register, offset: 0x100 */
+    uint8_t RESERVED_15[12];
+    __IO uint32_t CH0SEMA; /**< DCP channel 0 semaphore register, offset: 0x110 */
+    uint8_t RESERVED_16[12];
+    __IO uint32_t CH0STAT; /**< DCP channel 0 status register, offset: 0x120 */
+    uint8_t RESERVED_17[12];
+    __IO uint32_t CH0OPTS; /**< DCP channel 0 options register, offset: 0x130 */
+    uint8_t RESERVED_18[12];
+    __IO uint32_t CH1CMDPTR; /**< DCP channel 1 command pointer address register, offset: 0x140 */
+    uint8_t RESERVED_19[12];
+    __IO uint32_t CH1SEMA; /**< DCP channel 1 semaphore register, offset: 0x150 */
+    uint8_t RESERVED_20[12];
+    __IO uint32_t CH1STAT; /**< DCP channel 1 status register, offset: 0x160 */
+    uint8_t RESERVED_21[12];
+    __IO uint32_t CH1OPTS; /**< DCP channel 1 options register, offset: 0x170 */
+    uint8_t RESERVED_22[12];
+    __IO uint32_t CH2CMDPTR; /**< DCP channel 2 command pointer address register, offset: 0x180 */
+    uint8_t RESERVED_23[12];
+    __IO uint32_t CH2SEMA; /**< DCP channel 2 semaphore register, offset: 0x190 */
+    uint8_t RESERVED_24[12];
+    __IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0 */
+    uint8_t RESERVED_25[12];
+    __IO uint32_t CH2OPTS; /**< DCP channel 2 options register, offset: 0x1B0 */
+    uint8_t RESERVED_26[12];
+    __IO uint32_t CH3CMDPTR; /**< DCP channel 3 command pointer address register, offset: 0x1C0 */
+    uint8_t RESERVED_27[12];
+    __IO uint32_t CH3SEMA; /**< DCP channel 3 semaphore register, offset: 0x1D0 */
+    uint8_t RESERVED_28[12];
+    __IO uint32_t CH3STAT; /**< DCP channel 3 status register, offset: 0x1E0 */
+    uint8_t RESERVED_29[12];
+    __IO uint32_t CH3OPTS; /**< DCP channel 3 options register, offset: 0x1F0 */
+    uint8_t RESERVED_30[524];
+    __IO uint32_t DBGSELECT; /**< DCP debug select register, offset: 0x400 */
+    uint8_t RESERVED_31[12];
+    __I uint32_t DBGDATA; /**< DCP debug data register, offset: 0x410 */
+    uint8_t RESERVED_32[12];
+    __IO uint32_t PAGETABLE; /**< DCP page table register, offset: 0x420 */
+    uint8_t RESERVED_33[12];
+    __I uint32_t VERSION; /**< DCP version register, offset: 0x430 */
 } DCP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -6382,567 +7541,669 @@ typedef struct {
 
 /*! @name CTRL - DCP control register 0 */
 /*! @{ */
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK   (0xFFU)
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT  (0U)
-#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK  (0xFFU)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
+#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)
 #define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK  (0x100U)
 #define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
-#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK   (0x200000U)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT  (21U)
-#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK     (0x400000U)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT    (22U)
-#define DCP_CTRL_ENABLE_CONTEXT_CACHING(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK     (0x800000U)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT    (23U)
-#define DCP_CTRL_GATHER_RESIDUAL_WRITES(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)
-#define DCP_CTRL_PRESENT_SHA_MASK                (0x10000000U)
-#define DCP_CTRL_PRESENT_SHA_SHIFT               (28U)
-#define DCP_CTRL_PRESENT_SHA(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)
-#define DCP_CTRL_PRESENT_CRYPTO_MASK             (0x20000000U)
-#define DCP_CTRL_PRESENT_CRYPTO_SHIFT            (29U)
-#define DCP_CTRL_PRESENT_CRYPTO(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)
-#define DCP_CTRL_CLKGATE_MASK                    (0x40000000U)
-#define DCP_CTRL_CLKGATE_SHIFT                   (30U)
-#define DCP_CTRL_CLKGATE(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)
-#define DCP_CTRL_SFTRST_MASK                     (0x80000000U)
-#define DCP_CTRL_SFTRST_SHIFT                    (31U)
-#define DCP_CTRL_SFTRST(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)
+#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) &                                       \
+     DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK  (0x200000U)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
+#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK  (0x400000U)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT (22U)
+#define DCP_CTRL_ENABLE_CONTEXT_CACHING(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK  (0x800000U)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT (23U)
+#define DCP_CTRL_GATHER_RESIDUAL_WRITES(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)
+#define DCP_CTRL_PRESENT_SHA_MASK  (0x10000000U)
+#define DCP_CTRL_PRESENT_SHA_SHIFT (28U)
+#define DCP_CTRL_PRESENT_SHA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)
+#define DCP_CTRL_PRESENT_CRYPTO_MASK  (0x20000000U)
+#define DCP_CTRL_PRESENT_CRYPTO_SHIFT (29U)
+#define DCP_CTRL_PRESENT_CRYPTO(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)
+#define DCP_CTRL_CLKGATE_MASK  (0x40000000U)
+#define DCP_CTRL_CLKGATE_SHIFT (30U)
+#define DCP_CTRL_CLKGATE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)
+#define DCP_CTRL_SFTRST_MASK   (0x80000000U)
+#define DCP_CTRL_SFTRST_SHIFT  (31U)
+#define DCP_CTRL_SFTRST(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)
 /*! @} */
 
 /*! @name STAT - DCP status register */
 /*! @{ */
-#define DCP_STAT_IRQ_MASK                        (0xFU)
-#define DCP_STAT_IRQ_SHIFT                       (0U)
-#define DCP_STAT_IRQ(x)                          (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)
-#define DCP_STAT_RSVD_IRQ_MASK                   (0x100U)
-#define DCP_STAT_RSVD_IRQ_SHIFT                  (8U)
-#define DCP_STAT_RSVD_IRQ(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)
-#define DCP_STAT_READY_CHANNELS_MASK             (0xFF0000U)
-#define DCP_STAT_READY_CHANNELS_SHIFT            (16U)
-#define DCP_STAT_READY_CHANNELS(x)               (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)
-#define DCP_STAT_CUR_CHANNEL_MASK                (0xF000000U)
-#define DCP_STAT_CUR_CHANNEL_SHIFT               (24U)
-#define DCP_STAT_CUR_CHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)
-#define DCP_STAT_OTP_KEY_READY_MASK              (0x10000000U)
-#define DCP_STAT_OTP_KEY_READY_SHIFT             (28U)
-#define DCP_STAT_OTP_KEY_READY(x)                (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)
+#define DCP_STAT_IRQ_MASK             (0xFU)
+#define DCP_STAT_IRQ_SHIFT            (0U)
+#define DCP_STAT_IRQ(x)               (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)
+#define DCP_STAT_RSVD_IRQ_MASK        (0x100U)
+#define DCP_STAT_RSVD_IRQ_SHIFT       (8U)
+#define DCP_STAT_RSVD_IRQ(x)          (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)
+#define DCP_STAT_READY_CHANNELS_MASK  (0xFF0000U)
+#define DCP_STAT_READY_CHANNELS_SHIFT (16U)
+#define DCP_STAT_READY_CHANNELS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)
+#define DCP_STAT_CUR_CHANNEL_MASK  (0xF000000U)
+#define DCP_STAT_CUR_CHANNEL_SHIFT (24U)
+#define DCP_STAT_CUR_CHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)
+#define DCP_STAT_OTP_KEY_READY_MASK  (0x10000000U)
+#define DCP_STAT_OTP_KEY_READY_SHIFT (28U)
+#define DCP_STAT_OTP_KEY_READY(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)
 /*! @} */
 
 /*! @name CHANNELCTRL - DCP channel control register */
 /*! @{ */
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK      (0xFFU)
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT     (0U)
-#define DCP_CHANNELCTRL_ENABLE_CHANNEL(x)        (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)
-#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK  (0xFFU)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT (0U)
+#define DCP_CHANNELCTRL_ENABLE_CHANNEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)
+#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK  (0xFF00U)
 #define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
-#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK      (0x10000U)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT     (16U)
-#define DCP_CHANNELCTRL_CH0_IRQ_MERGED(x)        (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)
-#define DCP_CHANNELCTRL_RSVD_MASK                (0xFFFE0000U)
-#define DCP_CHANNELCTRL_RSVD_SHIFT               (17U)
-#define DCP_CHANNELCTRL_RSVD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)
+#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) &                                    \
+     DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK  (0x10000U)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT (16U)
+#define DCP_CHANNELCTRL_CH0_IRQ_MERGED(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)
+#define DCP_CHANNELCTRL_RSVD_MASK  (0xFFFE0000U)
+#define DCP_CHANNELCTRL_RSVD_SHIFT (17U)
+#define DCP_CHANNELCTRL_RSVD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)
 /*! @} */
 
 /*! @name CAPABILITY0 - DCP capability 0 register */
 /*! @{ */
-#define DCP_CAPABILITY0_NUM_KEYS_MASK            (0xFFU)
-#define DCP_CAPABILITY0_NUM_KEYS_SHIFT           (0U)
-#define DCP_CAPABILITY0_NUM_KEYS(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)
-#define DCP_CAPABILITY0_NUM_CHANNELS_MASK        (0xF00U)
-#define DCP_CAPABILITY0_NUM_CHANNELS_SHIFT       (8U)
-#define DCP_CAPABILITY0_NUM_CHANNELS(x)          (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)
-#define DCP_CAPABILITY0_RSVD_MASK                (0x1FFFF000U)
-#define DCP_CAPABILITY0_RSVD_SHIFT               (12U)
-#define DCP_CAPABILITY0_RSVD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)
+#define DCP_CAPABILITY0_NUM_KEYS_MASK  (0xFFU)
+#define DCP_CAPABILITY0_NUM_KEYS_SHIFT (0U)
+#define DCP_CAPABILITY0_NUM_KEYS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)
+#define DCP_CAPABILITY0_NUM_CHANNELS_MASK  (0xF00U)
+#define DCP_CAPABILITY0_NUM_CHANNELS_SHIFT (8U)
+#define DCP_CAPABILITY0_NUM_CHANNELS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)
+#define DCP_CAPABILITY0_RSVD_MASK  (0x1FFFF000U)
+#define DCP_CAPABILITY0_RSVD_SHIFT (12U)
+#define DCP_CAPABILITY0_RSVD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)
 #define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK  (0x20000000U)
 #define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT (29U)
-#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) & DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT_MASK     (0x80000000U)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT    (31U)
-#define DCP_CAPABILITY0_DISABLE_DECRYPT(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)
+#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) &                                       \
+     DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT_MASK  (0x80000000U)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT (31U)
+#define DCP_CAPABILITY0_DISABLE_DECRYPT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)
 /*! @} */
 
 /*! @name CAPABILITY1 - DCP capability 1 register */
 /*! @{ */
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK   (0xFFFFU)
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT  (0U)
-#define DCP_CAPABILITY1_CIPHER_ALGORITHMS(x)     (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS_MASK     (0xFFFF0000U)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT    (16U)
-#define DCP_CAPABILITY1_HASH_ALGORITHMS(x)       (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK  (0xFFFFU)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT (0U)
+#define DCP_CAPABILITY1_CIPHER_ALGORITHMS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS_MASK  (0xFFFF0000U)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT (16U)
+#define DCP_CAPABILITY1_HASH_ALGORITHMS(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)
 /*! @} */
 
 /*! @name CONTEXT - DCP context buffer pointer */
 /*! @{ */
-#define DCP_CONTEXT_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_CONTEXT_ADDR_SHIFT                   (0U)
-#define DCP_CONTEXT_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)
+#define DCP_CONTEXT_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CONTEXT_ADDR_SHIFT (0U)
+#define DCP_CONTEXT_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)
 /*! @} */
 
 /*! @name KEY - DCP key index */
 /*! @{ */
-#define DCP_KEY_SUBWORD_MASK                     (0x3U)
-#define DCP_KEY_SUBWORD_SHIFT                    (0U)
-#define DCP_KEY_SUBWORD(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)
-#define DCP_KEY_RSVD_SUBWORD_MASK                (0xCU)
-#define DCP_KEY_RSVD_SUBWORD_SHIFT               (2U)
-#define DCP_KEY_RSVD_SUBWORD(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)
-#define DCP_KEY_INDEX_MASK                       (0x30U)
-#define DCP_KEY_INDEX_SHIFT                      (4U)
-#define DCP_KEY_INDEX(x)                         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)
-#define DCP_KEY_RSVD_INDEX_MASK                  (0xC0U)
-#define DCP_KEY_RSVD_INDEX_SHIFT                 (6U)
-#define DCP_KEY_RSVD_INDEX(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)
-#define DCP_KEY_RSVD_MASK                        (0xFFFFFF00U)
-#define DCP_KEY_RSVD_SHIFT                       (8U)
-#define DCP_KEY_RSVD(x)                          (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)
+#define DCP_KEY_SUBWORD_MASK       (0x3U)
+#define DCP_KEY_SUBWORD_SHIFT      (0U)
+#define DCP_KEY_SUBWORD(x)         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)
+#define DCP_KEY_RSVD_SUBWORD_MASK  (0xCU)
+#define DCP_KEY_RSVD_SUBWORD_SHIFT (2U)
+#define DCP_KEY_RSVD_SUBWORD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)
+#define DCP_KEY_INDEX_MASK       (0x30U)
+#define DCP_KEY_INDEX_SHIFT      (4U)
+#define DCP_KEY_INDEX(x)         (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)
+#define DCP_KEY_RSVD_INDEX_MASK  (0xC0U)
+#define DCP_KEY_RSVD_INDEX_SHIFT (6U)
+#define DCP_KEY_RSVD_INDEX(x)    (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)
+#define DCP_KEY_RSVD_MASK        (0xFFFFFF00U)
+#define DCP_KEY_RSVD_SHIFT       (8U)
+#define DCP_KEY_RSVD(x)          (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)
 /*! @} */
 
 /*! @name KEYDATA - DCP key data */
 /*! @{ */
-#define DCP_KEYDATA_DATA_MASK                    (0xFFFFFFFFU)
-#define DCP_KEYDATA_DATA_SHIFT                   (0U)
-#define DCP_KEYDATA_DATA(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)
+#define DCP_KEYDATA_DATA_MASK  (0xFFFFFFFFU)
+#define DCP_KEYDATA_DATA_SHIFT (0U)
+#define DCP_KEYDATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)
 /*! @} */
 
 /*! @name PACKET0 - DCP work packet 0 status register */
 /*! @{ */
-#define DCP_PACKET0_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET0_ADDR_SHIFT                   (0U)
-#define DCP_PACKET0_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)
+#define DCP_PACKET0_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET0_ADDR_SHIFT (0U)
+#define DCP_PACKET0_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET1 - DCP work packet 1 status register */
 /*! @{ */
-#define DCP_PACKET1_INTERRUPT_MASK               (0x1U)
-#define DCP_PACKET1_INTERRUPT_SHIFT              (0U)
-#define DCP_PACKET1_INTERRUPT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)
-#define DCP_PACKET1_DECR_SEMAPHORE_MASK          (0x2U)
-#define DCP_PACKET1_DECR_SEMAPHORE_SHIFT         (1U)
-#define DCP_PACKET1_DECR_SEMAPHORE(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)
-#define DCP_PACKET1_CHAIN_MASK                   (0x4U)
-#define DCP_PACKET1_CHAIN_SHIFT                  (2U)
-#define DCP_PACKET1_CHAIN(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS_MASK        (0x8U)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT       (3U)
-#define DCP_PACKET1_CHAIN_CONTIGUOUS(x)          (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)
-#define DCP_PACKET1_ENABLE_MEMCOPY_MASK          (0x10U)
-#define DCP_PACKET1_ENABLE_MEMCOPY_SHIFT         (4U)
-#define DCP_PACKET1_ENABLE_MEMCOPY(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)
-#define DCP_PACKET1_ENABLE_CIPHER_MASK           (0x20U)
-#define DCP_PACKET1_ENABLE_CIPHER_SHIFT          (5U)
-#define DCP_PACKET1_ENABLE_CIPHER(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)
-#define DCP_PACKET1_ENABLE_HASH_MASK             (0x40U)
-#define DCP_PACKET1_ENABLE_HASH_SHIFT            (6U)
-#define DCP_PACKET1_ENABLE_HASH(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)
-#define DCP_PACKET1_ENABLE_BLIT_MASK             (0x80U)
-#define DCP_PACKET1_ENABLE_BLIT_SHIFT            (7U)
-#define DCP_PACKET1_ENABLE_BLIT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)
-#define DCP_PACKET1_CIPHER_ENCRYPT_MASK          (0x100U)
-#define DCP_PACKET1_CIPHER_ENCRYPT_SHIFT         (8U)
-#define DCP_PACKET1_CIPHER_ENCRYPT(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)
-#define DCP_PACKET1_CIPHER_INIT_MASK             (0x200U)
-#define DCP_PACKET1_CIPHER_INIT_SHIFT            (9U)
-#define DCP_PACKET1_CIPHER_INIT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)
-#define DCP_PACKET1_OTP_KEY_MASK                 (0x400U)
-#define DCP_PACKET1_OTP_KEY_SHIFT                (10U)
-#define DCP_PACKET1_OTP_KEY(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)
-#define DCP_PACKET1_PAYLOAD_KEY_MASK             (0x800U)
-#define DCP_PACKET1_PAYLOAD_KEY_SHIFT            (11U)
-#define DCP_PACKET1_PAYLOAD_KEY(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)
-#define DCP_PACKET1_HASH_INIT_MASK               (0x1000U)
-#define DCP_PACKET1_HASH_INIT_SHIFT              (12U)
-#define DCP_PACKET1_HASH_INIT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)
-#define DCP_PACKET1_HASH_TERM_MASK               (0x2000U)
-#define DCP_PACKET1_HASH_TERM_SHIFT              (13U)
-#define DCP_PACKET1_HASH_TERM(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)
-#define DCP_PACKET1_CHECK_HASH_MASK              (0x4000U)
-#define DCP_PACKET1_CHECK_HASH_SHIFT             (14U)
-#define DCP_PACKET1_CHECK_HASH(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)
-#define DCP_PACKET1_HASH_OUTPUT_MASK             (0x8000U)
-#define DCP_PACKET1_HASH_OUTPUT_SHIFT            (15U)
-#define DCP_PACKET1_HASH_OUTPUT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)
-#define DCP_PACKET1_CONSTANT_FILL_MASK           (0x10000U)
-#define DCP_PACKET1_CONSTANT_FILL_SHIFT          (16U)
-#define DCP_PACKET1_CONSTANT_FILL(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)
-#define DCP_PACKET1_TEST_SEMA_IRQ_MASK           (0x20000U)
-#define DCP_PACKET1_TEST_SEMA_IRQ_SHIFT          (17U)
-#define DCP_PACKET1_TEST_SEMA_IRQ(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)
-#define DCP_PACKET1_KEY_BYTESWAP_MASK            (0x40000U)
-#define DCP_PACKET1_KEY_BYTESWAP_SHIFT           (18U)
-#define DCP_PACKET1_KEY_BYTESWAP(x)              (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)
-#define DCP_PACKET1_KEY_WORDSWAP_MASK            (0x80000U)
-#define DCP_PACKET1_KEY_WORDSWAP_SHIFT           (19U)
-#define DCP_PACKET1_KEY_WORDSWAP(x)              (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)
-#define DCP_PACKET1_INPUT_BYTESWAP_MASK          (0x100000U)
-#define DCP_PACKET1_INPUT_BYTESWAP_SHIFT         (20U)
-#define DCP_PACKET1_INPUT_BYTESWAP(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)
-#define DCP_PACKET1_INPUT_WORDSWAP_MASK          (0x200000U)
-#define DCP_PACKET1_INPUT_WORDSWAP_SHIFT         (21U)
-#define DCP_PACKET1_INPUT_WORDSWAP(x)            (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)
-#define DCP_PACKET1_OUTPUT_BYTESWAP_MASK         (0x400000U)
-#define DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT        (22U)
-#define DCP_PACKET1_OUTPUT_BYTESWAP(x)           (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)
-#define DCP_PACKET1_OUTPUT_WORDSWAP_MASK         (0x800000U)
-#define DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT        (23U)
-#define DCP_PACKET1_OUTPUT_WORDSWAP(x)           (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)
-#define DCP_PACKET1_TAG_MASK                     (0xFF000000U)
-#define DCP_PACKET1_TAG_SHIFT                    (24U)
-#define DCP_PACKET1_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)
+#define DCP_PACKET1_INTERRUPT_MASK  (0x1U)
+#define DCP_PACKET1_INTERRUPT_SHIFT (0U)
+#define DCP_PACKET1_INTERRUPT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)
+#define DCP_PACKET1_DECR_SEMAPHORE_MASK  (0x2U)
+#define DCP_PACKET1_DECR_SEMAPHORE_SHIFT (1U)
+#define DCP_PACKET1_DECR_SEMAPHORE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)
+#define DCP_PACKET1_CHAIN_MASK             (0x4U)
+#define DCP_PACKET1_CHAIN_SHIFT            (2U)
+#define DCP_PACKET1_CHAIN(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS_MASK  (0x8U)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT (3U)
+#define DCP_PACKET1_CHAIN_CONTIGUOUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)
+#define DCP_PACKET1_ENABLE_MEMCOPY_MASK  (0x10U)
+#define DCP_PACKET1_ENABLE_MEMCOPY_SHIFT (4U)
+#define DCP_PACKET1_ENABLE_MEMCOPY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)
+#define DCP_PACKET1_ENABLE_CIPHER_MASK  (0x20U)
+#define DCP_PACKET1_ENABLE_CIPHER_SHIFT (5U)
+#define DCP_PACKET1_ENABLE_CIPHER(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)
+#define DCP_PACKET1_ENABLE_HASH_MASK  (0x40U)
+#define DCP_PACKET1_ENABLE_HASH_SHIFT (6U)
+#define DCP_PACKET1_ENABLE_HASH(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)
+#define DCP_PACKET1_ENABLE_BLIT_MASK  (0x80U)
+#define DCP_PACKET1_ENABLE_BLIT_SHIFT (7U)
+#define DCP_PACKET1_ENABLE_BLIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)
+#define DCP_PACKET1_CIPHER_ENCRYPT_MASK  (0x100U)
+#define DCP_PACKET1_CIPHER_ENCRYPT_SHIFT (8U)
+#define DCP_PACKET1_CIPHER_ENCRYPT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)
+#define DCP_PACKET1_CIPHER_INIT_MASK  (0x200U)
+#define DCP_PACKET1_CIPHER_INIT_SHIFT (9U)
+#define DCP_PACKET1_CIPHER_INIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)
+#define DCP_PACKET1_OTP_KEY_MASK      (0x400U)
+#define DCP_PACKET1_OTP_KEY_SHIFT     (10U)
+#define DCP_PACKET1_OTP_KEY(x)        (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)
+#define DCP_PACKET1_PAYLOAD_KEY_MASK  (0x800U)
+#define DCP_PACKET1_PAYLOAD_KEY_SHIFT (11U)
+#define DCP_PACKET1_PAYLOAD_KEY(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)
+#define DCP_PACKET1_HASH_INIT_MASK  (0x1000U)
+#define DCP_PACKET1_HASH_INIT_SHIFT (12U)
+#define DCP_PACKET1_HASH_INIT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)
+#define DCP_PACKET1_HASH_TERM_MASK  (0x2000U)
+#define DCP_PACKET1_HASH_TERM_SHIFT (13U)
+#define DCP_PACKET1_HASH_TERM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)
+#define DCP_PACKET1_CHECK_HASH_MASK  (0x4000U)
+#define DCP_PACKET1_CHECK_HASH_SHIFT (14U)
+#define DCP_PACKET1_CHECK_HASH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)
+#define DCP_PACKET1_HASH_OUTPUT_MASK  (0x8000U)
+#define DCP_PACKET1_HASH_OUTPUT_SHIFT (15U)
+#define DCP_PACKET1_HASH_OUTPUT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)
+#define DCP_PACKET1_CONSTANT_FILL_MASK  (0x10000U)
+#define DCP_PACKET1_CONSTANT_FILL_SHIFT (16U)
+#define DCP_PACKET1_CONSTANT_FILL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)
+#define DCP_PACKET1_TEST_SEMA_IRQ_MASK  (0x20000U)
+#define DCP_PACKET1_TEST_SEMA_IRQ_SHIFT (17U)
+#define DCP_PACKET1_TEST_SEMA_IRQ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)
+#define DCP_PACKET1_KEY_BYTESWAP_MASK  (0x40000U)
+#define DCP_PACKET1_KEY_BYTESWAP_SHIFT (18U)
+#define DCP_PACKET1_KEY_BYTESWAP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)
+#define DCP_PACKET1_KEY_WORDSWAP_MASK  (0x80000U)
+#define DCP_PACKET1_KEY_WORDSWAP_SHIFT (19U)
+#define DCP_PACKET1_KEY_WORDSWAP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)
+#define DCP_PACKET1_INPUT_BYTESWAP_MASK  (0x100000U)
+#define DCP_PACKET1_INPUT_BYTESWAP_SHIFT (20U)
+#define DCP_PACKET1_INPUT_BYTESWAP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)
+#define DCP_PACKET1_INPUT_WORDSWAP_MASK  (0x200000U)
+#define DCP_PACKET1_INPUT_WORDSWAP_SHIFT (21U)
+#define DCP_PACKET1_INPUT_WORDSWAP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)
+#define DCP_PACKET1_OUTPUT_BYTESWAP_MASK  (0x400000U)
+#define DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT (22U)
+#define DCP_PACKET1_OUTPUT_BYTESWAP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)
+#define DCP_PACKET1_OUTPUT_WORDSWAP_MASK  (0x800000U)
+#define DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT (23U)
+#define DCP_PACKET1_OUTPUT_WORDSWAP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)
+#define DCP_PACKET1_TAG_MASK  (0xFF000000U)
+#define DCP_PACKET1_TAG_SHIFT (24U)
+#define DCP_PACKET1_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)
 /*! @} */
 
 /*! @name PACKET2 - DCP work packet 2 status register */
 /*! @{ */
-#define DCP_PACKET2_CIPHER_SELECT_MASK           (0xFU)
-#define DCP_PACKET2_CIPHER_SELECT_SHIFT          (0U)
-#define DCP_PACKET2_CIPHER_SELECT(x)             (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)
-#define DCP_PACKET2_CIPHER_MODE_MASK             (0xF0U)
-#define DCP_PACKET2_CIPHER_MODE_SHIFT            (4U)
-#define DCP_PACKET2_CIPHER_MODE(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)
-#define DCP_PACKET2_KEY_SELECT_MASK              (0xFF00U)
-#define DCP_PACKET2_KEY_SELECT_SHIFT             (8U)
-#define DCP_PACKET2_KEY_SELECT(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)
-#define DCP_PACKET2_HASH_SELECT_MASK             (0xF0000U)
-#define DCP_PACKET2_HASH_SELECT_SHIFT            (16U)
-#define DCP_PACKET2_HASH_SELECT(x)               (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)
-#define DCP_PACKET2_RSVD_MASK                    (0xF00000U)
-#define DCP_PACKET2_RSVD_SHIFT                   (20U)
-#define DCP_PACKET2_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)
-#define DCP_PACKET2_CIPHER_CFG_MASK              (0xFF000000U)
-#define DCP_PACKET2_CIPHER_CFG_SHIFT             (24U)
-#define DCP_PACKET2_CIPHER_CFG(x)                (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)
+#define DCP_PACKET2_CIPHER_SELECT_MASK  (0xFU)
+#define DCP_PACKET2_CIPHER_SELECT_SHIFT (0U)
+#define DCP_PACKET2_CIPHER_SELECT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)
+#define DCP_PACKET2_CIPHER_MODE_MASK  (0xF0U)
+#define DCP_PACKET2_CIPHER_MODE_SHIFT (4U)
+#define DCP_PACKET2_CIPHER_MODE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)
+#define DCP_PACKET2_KEY_SELECT_MASK  (0xFF00U)
+#define DCP_PACKET2_KEY_SELECT_SHIFT (8U)
+#define DCP_PACKET2_KEY_SELECT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)
+#define DCP_PACKET2_HASH_SELECT_MASK  (0xF0000U)
+#define DCP_PACKET2_HASH_SELECT_SHIFT (16U)
+#define DCP_PACKET2_HASH_SELECT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)
+#define DCP_PACKET2_RSVD_MASK        (0xF00000U)
+#define DCP_PACKET2_RSVD_SHIFT       (20U)
+#define DCP_PACKET2_RSVD(x)          (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)
+#define DCP_PACKET2_CIPHER_CFG_MASK  (0xFF000000U)
+#define DCP_PACKET2_CIPHER_CFG_SHIFT (24U)
+#define DCP_PACKET2_CIPHER_CFG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)
 /*! @} */
 
 /*! @name PACKET3 - DCP work packet 3 status register */
 /*! @{ */
-#define DCP_PACKET3_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET3_ADDR_SHIFT                   (0U)
-#define DCP_PACKET3_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)
+#define DCP_PACKET3_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET3_ADDR_SHIFT (0U)
+#define DCP_PACKET3_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET4 - DCP work packet 4 status register */
 /*! @{ */
-#define DCP_PACKET4_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET4_ADDR_SHIFT                   (0U)
-#define DCP_PACKET4_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)
+#define DCP_PACKET4_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET4_ADDR_SHIFT (0U)
+#define DCP_PACKET4_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)
 /*! @} */
 
 /*! @name PACKET5 - DCP work packet 5 status register */
 /*! @{ */
-#define DCP_PACKET5_COUNT_MASK                   (0xFFFFFFFFU)
-#define DCP_PACKET5_COUNT_SHIFT                  (0U)
-#define DCP_PACKET5_COUNT(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)
+#define DCP_PACKET5_COUNT_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET5_COUNT_SHIFT (0U)
+#define DCP_PACKET5_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)
 /*! @} */
 
 /*! @name PACKET6 - DCP work packet 6 status register */
 /*! @{ */
-#define DCP_PACKET6_ADDR_MASK                    (0xFFFFFFFFU)
-#define DCP_PACKET6_ADDR_SHIFT                   (0U)
-#define DCP_PACKET6_ADDR(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)
+#define DCP_PACKET6_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_PACKET6_ADDR_SHIFT (0U)
+#define DCP_PACKET6_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)
 /*! @} */
 
 /*! @name CH0CMDPTR - DCP channel 0 command pointer address register */
 /*! @{ */
-#define DCP_CH0CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH0CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH0CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)
+#define DCP_CH0CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH0CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH0CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH0SEMA - DCP channel 0 semaphore register */
 /*! @{ */
-#define DCP_CH0SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH0SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH0SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)
-#define DCP_CH0SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH0SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH0SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)
+#define DCP_CH0SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH0SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH0SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)
+#define DCP_CH0SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH0SEMA_VALUE_SHIFT (16U)
+#define DCP_CH0SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH0STAT - DCP channel 0 status register */
 /*! @{ */
-#define DCP_CH0STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH0STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH0STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH0STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH0STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH0STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)
-#define DCP_CH0STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH0STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH0STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)
-#define DCP_CH0STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH0STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH0STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)
-#define DCP_CH0STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH0STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH0STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)
-#define DCP_CH0STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH0STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH0STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)
-#define DCP_CH0STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH0STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH0STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH0STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH0STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)
-#define DCP_CH0STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH0STAT_TAG_SHIFT                    (24U)
-#define DCP_CH0STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)
+#define DCP_CH0STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH0STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH0STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH0STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH0STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH0STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)
+#define DCP_CH0STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH0STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH0STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)
+#define DCP_CH0STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH0STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH0STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)
+#define DCP_CH0STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH0STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH0STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)
+#define DCP_CH0STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH0STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH0STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)
+#define DCP_CH0STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH0STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH0STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH0STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH0STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)
+#define DCP_CH0STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH0STAT_TAG_SHIFT (24U)
+#define DCP_CH0STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH0OPTS - DCP channel 0 options register */
 /*! @{ */
-#define DCP_CH0OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH0OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH0OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH0OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH0OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH0OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)
+#define DCP_CH0OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH0OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH0OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH0OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH0OPTS_RSVD_SHIFT (16U)
+#define DCP_CH0OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH1CMDPTR - DCP channel 1 command pointer address register */
 /*! @{ */
-#define DCP_CH1CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH1CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH1CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)
+#define DCP_CH1CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH1CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH1CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH1SEMA - DCP channel 1 semaphore register */
 /*! @{ */
-#define DCP_CH1SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH1SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH1SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)
-#define DCP_CH1SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH1SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH1SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)
+#define DCP_CH1SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH1SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH1SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)
+#define DCP_CH1SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH1SEMA_VALUE_SHIFT (16U)
+#define DCP_CH1SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH1STAT - DCP channel 1 status register */
 /*! @{ */
-#define DCP_CH1STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH1STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH1STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH1STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH1STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH1STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)
-#define DCP_CH1STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH1STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH1STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)
-#define DCP_CH1STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH1STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH1STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)
-#define DCP_CH1STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH1STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH1STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)
-#define DCP_CH1STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH1STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH1STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)
-#define DCP_CH1STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH1STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH1STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH1STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH1STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)
-#define DCP_CH1STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH1STAT_TAG_SHIFT                    (24U)
-#define DCP_CH1STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)
+#define DCP_CH1STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH1STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH1STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH1STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH1STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH1STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)
+#define DCP_CH1STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH1STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH1STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)
+#define DCP_CH1STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH1STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH1STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)
+#define DCP_CH1STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH1STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH1STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)
+#define DCP_CH1STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH1STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH1STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)
+#define DCP_CH1STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH1STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH1STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH1STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH1STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)
+#define DCP_CH1STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH1STAT_TAG_SHIFT (24U)
+#define DCP_CH1STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH1OPTS - DCP channel 1 options register */
 /*! @{ */
-#define DCP_CH1OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH1OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH1OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH1OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH1OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH1OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)
+#define DCP_CH1OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH1OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH1OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH1OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH1OPTS_RSVD_SHIFT (16U)
+#define DCP_CH1OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH2CMDPTR - DCP channel 2 command pointer address register */
 /*! @{ */
-#define DCP_CH2CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH2CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH2CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)
+#define DCP_CH2CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH2CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH2CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH2SEMA - DCP channel 2 semaphore register */
 /*! @{ */
-#define DCP_CH2SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH2SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH2SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)
-#define DCP_CH2SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH2SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH2SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)
+#define DCP_CH2SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH2SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH2SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)
+#define DCP_CH2SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH2SEMA_VALUE_SHIFT (16U)
+#define DCP_CH2SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH2STAT - DCP channel 2 status register */
 /*! @{ */
-#define DCP_CH2STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH2STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH2STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH2STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH2STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH2STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)
-#define DCP_CH2STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH2STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH2STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)
-#define DCP_CH2STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH2STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH2STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)
-#define DCP_CH2STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH2STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH2STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)
-#define DCP_CH2STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH2STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH2STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)
-#define DCP_CH2STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH2STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH2STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH2STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH2STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)
-#define DCP_CH2STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH2STAT_TAG_SHIFT                    (24U)
-#define DCP_CH2STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)
+#define DCP_CH2STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH2STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH2STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH2STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH2STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH2STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)
+#define DCP_CH2STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH2STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH2STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)
+#define DCP_CH2STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH2STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH2STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)
+#define DCP_CH2STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH2STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH2STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)
+#define DCP_CH2STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH2STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH2STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)
+#define DCP_CH2STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH2STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH2STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH2STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH2STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)
+#define DCP_CH2STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH2STAT_TAG_SHIFT (24U)
+#define DCP_CH2STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH2OPTS - DCP channel 2 options register */
 /*! @{ */
-#define DCP_CH2OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH2OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH2OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH2OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH2OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH2OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)
+#define DCP_CH2OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH2OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH2OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH2OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH2OPTS_RSVD_SHIFT (16U)
+#define DCP_CH2OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name CH3CMDPTR - DCP channel 3 command pointer address register */
 /*! @{ */
-#define DCP_CH3CMDPTR_ADDR_MASK                  (0xFFFFFFFFU)
-#define DCP_CH3CMDPTR_ADDR_SHIFT                 (0U)
-#define DCP_CH3CMDPTR_ADDR(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)
+#define DCP_CH3CMDPTR_ADDR_MASK  (0xFFFFFFFFU)
+#define DCP_CH3CMDPTR_ADDR_SHIFT (0U)
+#define DCP_CH3CMDPTR_ADDR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)
 /*! @} */
 
 /*! @name CH3SEMA - DCP channel 3 semaphore register */
 /*! @{ */
-#define DCP_CH3SEMA_INCREMENT_MASK               (0xFFU)
-#define DCP_CH3SEMA_INCREMENT_SHIFT              (0U)
-#define DCP_CH3SEMA_INCREMENT(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)
-#define DCP_CH3SEMA_VALUE_MASK                   (0xFF0000U)
-#define DCP_CH3SEMA_VALUE_SHIFT                  (16U)
-#define DCP_CH3SEMA_VALUE(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)
+#define DCP_CH3SEMA_INCREMENT_MASK  (0xFFU)
+#define DCP_CH3SEMA_INCREMENT_SHIFT (0U)
+#define DCP_CH3SEMA_INCREMENT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)
+#define DCP_CH3SEMA_VALUE_MASK  (0xFF0000U)
+#define DCP_CH3SEMA_VALUE_SHIFT (16U)
+#define DCP_CH3SEMA_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)
 /*! @} */
 
 /*! @name CH3STAT - DCP channel 3 status register */
 /*! @{ */
-#define DCP_CH3STAT_RSVD_COMPLETE_MASK           (0x1U)
-#define DCP_CH3STAT_RSVD_COMPLETE_SHIFT          (0U)
-#define DCP_CH3STAT_RSVD_COMPLETE(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)
-#define DCP_CH3STAT_HASH_MISMATCH_MASK           (0x2U)
-#define DCP_CH3STAT_HASH_MISMATCH_SHIFT          (1U)
-#define DCP_CH3STAT_HASH_MISMATCH(x)             (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)
-#define DCP_CH3STAT_ERROR_SETUP_MASK             (0x4U)
-#define DCP_CH3STAT_ERROR_SETUP_SHIFT            (2U)
-#define DCP_CH3STAT_ERROR_SETUP(x)               (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)
-#define DCP_CH3STAT_ERROR_PACKET_MASK            (0x8U)
-#define DCP_CH3STAT_ERROR_PACKET_SHIFT           (3U)
-#define DCP_CH3STAT_ERROR_PACKET(x)              (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)
-#define DCP_CH3STAT_ERROR_SRC_MASK               (0x10U)
-#define DCP_CH3STAT_ERROR_SRC_SHIFT              (4U)
-#define DCP_CH3STAT_ERROR_SRC(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)
-#define DCP_CH3STAT_ERROR_DST_MASK               (0x20U)
-#define DCP_CH3STAT_ERROR_DST_SHIFT              (5U)
-#define DCP_CH3STAT_ERROR_DST(x)                 (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)
-#define DCP_CH3STAT_ERROR_PAGEFAULT_MASK         (0x40U)
-#define DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT        (6U)
-#define DCP_CH3STAT_ERROR_PAGEFAULT(x)           (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)
-#define DCP_CH3STAT_ERROR_CODE_MASK              (0xFF0000U)
-#define DCP_CH3STAT_ERROR_CODE_SHIFT             (16U)
-#define DCP_CH3STAT_ERROR_CODE(x)                (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)
-#define DCP_CH3STAT_TAG_MASK                     (0xFF000000U)
-#define DCP_CH3STAT_TAG_SHIFT                    (24U)
-#define DCP_CH3STAT_TAG(x)                       (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)
+#define DCP_CH3STAT_RSVD_COMPLETE_MASK  (0x1U)
+#define DCP_CH3STAT_RSVD_COMPLETE_SHIFT (0U)
+#define DCP_CH3STAT_RSVD_COMPLETE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)
+#define DCP_CH3STAT_HASH_MISMATCH_MASK  (0x2U)
+#define DCP_CH3STAT_HASH_MISMATCH_SHIFT (1U)
+#define DCP_CH3STAT_HASH_MISMATCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)
+#define DCP_CH3STAT_ERROR_SETUP_MASK  (0x4U)
+#define DCP_CH3STAT_ERROR_SETUP_SHIFT (2U)
+#define DCP_CH3STAT_ERROR_SETUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)
+#define DCP_CH3STAT_ERROR_PACKET_MASK  (0x8U)
+#define DCP_CH3STAT_ERROR_PACKET_SHIFT (3U)
+#define DCP_CH3STAT_ERROR_PACKET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)
+#define DCP_CH3STAT_ERROR_SRC_MASK  (0x10U)
+#define DCP_CH3STAT_ERROR_SRC_SHIFT (4U)
+#define DCP_CH3STAT_ERROR_SRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)
+#define DCP_CH3STAT_ERROR_DST_MASK  (0x20U)
+#define DCP_CH3STAT_ERROR_DST_SHIFT (5U)
+#define DCP_CH3STAT_ERROR_DST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)
+#define DCP_CH3STAT_ERROR_PAGEFAULT_MASK  (0x40U)
+#define DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT (6U)
+#define DCP_CH3STAT_ERROR_PAGEFAULT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)
+#define DCP_CH3STAT_ERROR_CODE_MASK  (0xFF0000U)
+#define DCP_CH3STAT_ERROR_CODE_SHIFT (16U)
+#define DCP_CH3STAT_ERROR_CODE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)
+#define DCP_CH3STAT_TAG_MASK  (0xFF000000U)
+#define DCP_CH3STAT_TAG_SHIFT (24U)
+#define DCP_CH3STAT_TAG(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)
 /*! @} */
 
 /*! @name CH3OPTS - DCP channel 3 options register */
 /*! @{ */
-#define DCP_CH3OPTS_RECOVERY_TIMER_MASK          (0xFFFFU)
-#define DCP_CH3OPTS_RECOVERY_TIMER_SHIFT         (0U)
-#define DCP_CH3OPTS_RECOVERY_TIMER(x)            (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)
-#define DCP_CH3OPTS_RSVD_MASK                    (0xFFFF0000U)
-#define DCP_CH3OPTS_RSVD_SHIFT                   (16U)
-#define DCP_CH3OPTS_RSVD(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)
+#define DCP_CH3OPTS_RECOVERY_TIMER_MASK  (0xFFFFU)
+#define DCP_CH3OPTS_RECOVERY_TIMER_SHIFT (0U)
+#define DCP_CH3OPTS_RECOVERY_TIMER(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)
+#define DCP_CH3OPTS_RSVD_MASK  (0xFFFF0000U)
+#define DCP_CH3OPTS_RSVD_SHIFT (16U)
+#define DCP_CH3OPTS_RSVD(x)    (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)
 /*! @} */
 
 /*! @name DBGSELECT - DCP debug select register */
 /*! @{ */
-#define DCP_DBGSELECT_INDEX_MASK                 (0xFFU)
-#define DCP_DBGSELECT_INDEX_SHIFT                (0U)
-#define DCP_DBGSELECT_INDEX(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)
-#define DCP_DBGSELECT_RSVD_MASK                  (0xFFFFFF00U)
-#define DCP_DBGSELECT_RSVD_SHIFT                 (8U)
-#define DCP_DBGSELECT_RSVD(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)
+#define DCP_DBGSELECT_INDEX_MASK  (0xFFU)
+#define DCP_DBGSELECT_INDEX_SHIFT (0U)
+#define DCP_DBGSELECT_INDEX(x)    (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)
+#define DCP_DBGSELECT_RSVD_MASK   (0xFFFFFF00U)
+#define DCP_DBGSELECT_RSVD_SHIFT  (8U)
+#define DCP_DBGSELECT_RSVD(x)     (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)
 /*! @} */
 
 /*! @name DBGDATA - DCP debug data register */
 /*! @{ */
-#define DCP_DBGDATA_DATA_MASK                    (0xFFFFFFFFU)
-#define DCP_DBGDATA_DATA_SHIFT                   (0U)
-#define DCP_DBGDATA_DATA(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)
+#define DCP_DBGDATA_DATA_MASK  (0xFFFFFFFFU)
+#define DCP_DBGDATA_DATA_SHIFT (0U)
+#define DCP_DBGDATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)
 /*! @} */
 
 /*! @name PAGETABLE - DCP page table register */
 /*! @{ */
-#define DCP_PAGETABLE_ENABLE_MASK                (0x1U)
-#define DCP_PAGETABLE_ENABLE_SHIFT               (0U)
-#define DCP_PAGETABLE_ENABLE(x)                  (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)
-#define DCP_PAGETABLE_FLUSH_MASK                 (0x2U)
-#define DCP_PAGETABLE_FLUSH_SHIFT                (1U)
-#define DCP_PAGETABLE_FLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)
-#define DCP_PAGETABLE_BASE_MASK                  (0xFFFFFFFCU)
-#define DCP_PAGETABLE_BASE_SHIFT                 (2U)
-#define DCP_PAGETABLE_BASE(x)                    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)
+#define DCP_PAGETABLE_ENABLE_MASK  (0x1U)
+#define DCP_PAGETABLE_ENABLE_SHIFT (0U)
+#define DCP_PAGETABLE_ENABLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)
+#define DCP_PAGETABLE_FLUSH_MASK  (0x2U)
+#define DCP_PAGETABLE_FLUSH_SHIFT (1U)
+#define DCP_PAGETABLE_FLUSH(x)    (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)
+#define DCP_PAGETABLE_BASE_MASK   (0xFFFFFFFCU)
+#define DCP_PAGETABLE_BASE_SHIFT  (2U)
+#define DCP_PAGETABLE_BASE(x)     (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)
 /*! @} */
 
 /*! @name VERSION - DCP version register */
 /*! @{ */
-#define DCP_VERSION_STEP_MASK                    (0xFFFFU)
-#define DCP_VERSION_STEP_SHIFT                   (0U)
-#define DCP_VERSION_STEP(x)                      (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)
-#define DCP_VERSION_MINOR_MASK                   (0xFF0000U)
-#define DCP_VERSION_MINOR_SHIFT                  (16U)
-#define DCP_VERSION_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)
-#define DCP_VERSION_MAJOR_MASK                   (0xFF000000U)
-#define DCP_VERSION_MAJOR_SHIFT                  (24U)
-#define DCP_VERSION_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)
+#define DCP_VERSION_STEP_MASK   (0xFFFFU)
+#define DCP_VERSION_STEP_SHIFT  (0U)
+#define DCP_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)
+#define DCP_VERSION_MINOR_MASK  (0xFF0000U)
+#define DCP_VERSION_MINOR_SHIFT (16U)
+#define DCP_VERSION_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)
+#define DCP_VERSION_MAJOR_MASK  (0xFF000000U)
+#define DCP_VERSION_MAJOR_SHIFT (24U)
+#define DCP_VERSION_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group DCP_Register_Masks */
 
-
 /* DCP - Peripheral instance base addresses */
 /** Peripheral DCP base address */
-#define DCP_BASE                                 (0x402FC000u)
+#define DCP_BASE (0x402FC000u)
 /** Peripheral DCP base pointer */
-#define DCP                                      ((DCP_Type *)DCP_BASE)
+#define DCP ((DCP_Type *)DCP_BASE)
 /** Array initializer of DCP peripheral base addresses */
-#define DCP_BASE_ADDRS                           { DCP_BASE }
+#define DCP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        DCP_BASE                                                                                                       \
+    }
 /** Array initializer of DCP peripheral base pointers */
-#define DCP_BASE_PTRS                            { DCP }
+#define DCP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        DCP                                                                                                            \
+    }
 /** Interrupt vectors for the DCP peripheral type */
-#define DCP_IRQS                                 { DCP_IRQn }
-#define DCP_VMI_IRQS                             { DCP_VMI_IRQn }
+#define DCP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        DCP_IRQn                                                                                                       \
+    }
+#define DCP_VMI_IRQS                                                                                                   \
+    {                                                                                                                  \
+        DCP_VMI_IRQn                                                                                                   \
+    }
 
 /*!
  * @}
  */ /* end of group DCP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DMA Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -6953,86 +8214,99 @@ typedef struct {
  */
 
 /** DMA - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CR;                                /**< Control Register, offset: 0x0 */
-  __I  uint32_t ES;                                /**< Error Status Register, offset: 0x4 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t ERQ;                               /**< Enable Request Register, offset: 0xC */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t EEI;                               /**< Enable Error Interrupt Register, offset: 0x14 */
-  __O  uint8_t CEEI;                               /**< Clear Enable Error Interrupt Register, offset: 0x18 */
-  __O  uint8_t SEEI;                               /**< Set Enable Error Interrupt Register, offset: 0x19 */
-  __O  uint8_t CERQ;                               /**< Clear Enable Request Register, offset: 0x1A */
-  __O  uint8_t SERQ;                               /**< Set Enable Request Register, offset: 0x1B */
-  __O  uint8_t CDNE;                               /**< Clear DONE Status Bit Register, offset: 0x1C */
-  __O  uint8_t SSRT;                               /**< Set START Bit Register, offset: 0x1D */
-  __O  uint8_t CERR;                               /**< Clear Error Register, offset: 0x1E */
-  __O  uint8_t CINT;                               /**< Clear Interrupt Request Register, offset: 0x1F */
-       uint8_t RESERVED_2[4];
-  __IO uint32_t INT;                               /**< Interrupt Request Register, offset: 0x24 */
-       uint8_t RESERVED_3[4];
-  __IO uint32_t ERR;                               /**< Error Register, offset: 0x2C */
-       uint8_t RESERVED_4[4];
-  __I  uint32_t HRS;                               /**< Hardware Request Status Register, offset: 0x34 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t EARS;                              /**< Enable Asynchronous Request in Stop Register, offset: 0x44 */
-       uint8_t RESERVED_6[184];
-  __IO uint8_t DCHPRI3;                            /**< Channel n Priority Register, offset: 0x100 */
-  __IO uint8_t DCHPRI2;                            /**< Channel n Priority Register, offset: 0x101 */
-  __IO uint8_t DCHPRI1;                            /**< Channel n Priority Register, offset: 0x102 */
-  __IO uint8_t DCHPRI0;                            /**< Channel n Priority Register, offset: 0x103 */
-  __IO uint8_t DCHPRI7;                            /**< Channel n Priority Register, offset: 0x104 */
-  __IO uint8_t DCHPRI6;                            /**< Channel n Priority Register, offset: 0x105 */
-  __IO uint8_t DCHPRI5;                            /**< Channel n Priority Register, offset: 0x106 */
-  __IO uint8_t DCHPRI4;                            /**< Channel n Priority Register, offset: 0x107 */
-  __IO uint8_t DCHPRI11;                           /**< Channel n Priority Register, offset: 0x108 */
-  __IO uint8_t DCHPRI10;                           /**< Channel n Priority Register, offset: 0x109 */
-  __IO uint8_t DCHPRI9;                            /**< Channel n Priority Register, offset: 0x10A */
-  __IO uint8_t DCHPRI8;                            /**< Channel n Priority Register, offset: 0x10B */
-  __IO uint8_t DCHPRI15;                           /**< Channel n Priority Register, offset: 0x10C */
-  __IO uint8_t DCHPRI14;                           /**< Channel n Priority Register, offset: 0x10D */
-  __IO uint8_t DCHPRI13;                           /**< Channel n Priority Register, offset: 0x10E */
-  __IO uint8_t DCHPRI12;                           /**< Channel n Priority Register, offset: 0x10F */
-  __IO uint8_t DCHPRI19;                           /**< Channel n Priority Register, offset: 0x110 */
-  __IO uint8_t DCHPRI18;                           /**< Channel n Priority Register, offset: 0x111 */
-  __IO uint8_t DCHPRI17;                           /**< Channel n Priority Register, offset: 0x112 */
-  __IO uint8_t DCHPRI16;                           /**< Channel n Priority Register, offset: 0x113 */
-  __IO uint8_t DCHPRI23;                           /**< Channel n Priority Register, offset: 0x114 */
-  __IO uint8_t DCHPRI22;                           /**< Channel n Priority Register, offset: 0x115 */
-  __IO uint8_t DCHPRI21;                           /**< Channel n Priority Register, offset: 0x116 */
-  __IO uint8_t DCHPRI20;                           /**< Channel n Priority Register, offset: 0x117 */
-  __IO uint8_t DCHPRI27;                           /**< Channel n Priority Register, offset: 0x118 */
-  __IO uint8_t DCHPRI26;                           /**< Channel n Priority Register, offset: 0x119 */
-  __IO uint8_t DCHPRI25;                           /**< Channel n Priority Register, offset: 0x11A */
-  __IO uint8_t DCHPRI24;                           /**< Channel n Priority Register, offset: 0x11B */
-  __IO uint8_t DCHPRI31;                           /**< Channel n Priority Register, offset: 0x11C */
-  __IO uint8_t DCHPRI30;                           /**< Channel n Priority Register, offset: 0x11D */
-  __IO uint8_t DCHPRI29;                           /**< Channel n Priority Register, offset: 0x11E */
-  __IO uint8_t DCHPRI28;                           /**< Channel n Priority Register, offset: 0x11F */
-       uint8_t RESERVED_7[3808];
-  struct {                                         /* offset: 0x1000, array step: 0x20 */
-    __IO uint32_t SADDR;                             /**< TCD Source Address, array offset: 0x1000, array step: 0x20 */
-    __IO uint16_t SOFF;                              /**< TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20 */
-    __IO uint16_t ATTR;                              /**< TCD Transfer Attributes, array offset: 0x1006, array step: 0x20 */
-    union {                                          /* offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLNO;                       /**< TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLOFFNO;                    /**< TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled), array offset: 0x1008, array step: 0x20 */
-      __IO uint32_t NBYTES_MLOFFYES;                   /**< TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled), array offset: 0x1008, array step: 0x20 */
-    };
-    __IO uint32_t SLAST;                             /**< TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20 */
-    __IO uint32_t DADDR;                             /**< TCD Destination Address, array offset: 0x1010, array step: 0x20 */
-    __IO uint16_t DOFF;                              /**< TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20 */
-    union {                                          /* offset: 0x1016, array step: 0x20 */
-      __IO uint16_t CITER_ELINKNO;                     /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x1016, array step: 0x20 */
-      __IO uint16_t CITER_ELINKYES;                    /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x1016, array step: 0x20 */
-    };
-    __IO uint32_t DLAST_SGA;                         /**< TCD Last Destination Address Adjustment/Scatter Gather Address, array offset: 0x1018, array step: 0x20 */
-    __IO uint16_t CSR;                               /**< TCD Control and Status, array offset: 0x101C, array step: 0x20 */
-    union {                                          /* offset: 0x101E, array step: 0x20 */
-      __IO uint16_t BITER_ELINKNO;                     /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x101E, array step: 0x20 */
-      __IO uint16_t BITER_ELINKYES;                    /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x101E, array step: 0x20 */
-    };
-  } TCD[32];
+typedef struct
+{
+    __IO uint32_t CR; /**< Control Register, offset: 0x0 */
+    __I uint32_t ES;  /**< Error Status Register, offset: 0x4 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t ERQ; /**< Enable Request Register, offset: 0xC */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t EEI; /**< Enable Error Interrupt Register, offset: 0x14 */
+    __O uint8_t CEEI;  /**< Clear Enable Error Interrupt Register, offset: 0x18 */
+    __O uint8_t SEEI;  /**< Set Enable Error Interrupt Register, offset: 0x19 */
+    __O uint8_t CERQ;  /**< Clear Enable Request Register, offset: 0x1A */
+    __O uint8_t SERQ;  /**< Set Enable Request Register, offset: 0x1B */
+    __O uint8_t CDNE;  /**< Clear DONE Status Bit Register, offset: 0x1C */
+    __O uint8_t SSRT;  /**< Set START Bit Register, offset: 0x1D */
+    __O uint8_t CERR;  /**< Clear Error Register, offset: 0x1E */
+    __O uint8_t CINT;  /**< Clear Interrupt Request Register, offset: 0x1F */
+    uint8_t RESERVED_2[4];
+    __IO uint32_t INT; /**< Interrupt Request Register, offset: 0x24 */
+    uint8_t RESERVED_3[4];
+    __IO uint32_t ERR; /**< Error Register, offset: 0x2C */
+    uint8_t RESERVED_4[4];
+    __I uint32_t HRS; /**< Hardware Request Status Register, offset: 0x34 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t EARS; /**< Enable Asynchronous Request in Stop Register, offset: 0x44 */
+    uint8_t RESERVED_6[184];
+    __IO uint8_t DCHPRI3;  /**< Channel n Priority Register, offset: 0x100 */
+    __IO uint8_t DCHPRI2;  /**< Channel n Priority Register, offset: 0x101 */
+    __IO uint8_t DCHPRI1;  /**< Channel n Priority Register, offset: 0x102 */
+    __IO uint8_t DCHPRI0;  /**< Channel n Priority Register, offset: 0x103 */
+    __IO uint8_t DCHPRI7;  /**< Channel n Priority Register, offset: 0x104 */
+    __IO uint8_t DCHPRI6;  /**< Channel n Priority Register, offset: 0x105 */
+    __IO uint8_t DCHPRI5;  /**< Channel n Priority Register, offset: 0x106 */
+    __IO uint8_t DCHPRI4;  /**< Channel n Priority Register, offset: 0x107 */
+    __IO uint8_t DCHPRI11; /**< Channel n Priority Register, offset: 0x108 */
+    __IO uint8_t DCHPRI10; /**< Channel n Priority Register, offset: 0x109 */
+    __IO uint8_t DCHPRI9;  /**< Channel n Priority Register, offset: 0x10A */
+    __IO uint8_t DCHPRI8;  /**< Channel n Priority Register, offset: 0x10B */
+    __IO uint8_t DCHPRI15; /**< Channel n Priority Register, offset: 0x10C */
+    __IO uint8_t DCHPRI14; /**< Channel n Priority Register, offset: 0x10D */
+    __IO uint8_t DCHPRI13; /**< Channel n Priority Register, offset: 0x10E */
+    __IO uint8_t DCHPRI12; /**< Channel n Priority Register, offset: 0x10F */
+    __IO uint8_t DCHPRI19; /**< Channel n Priority Register, offset: 0x110 */
+    __IO uint8_t DCHPRI18; /**< Channel n Priority Register, offset: 0x111 */
+    __IO uint8_t DCHPRI17; /**< Channel n Priority Register, offset: 0x112 */
+    __IO uint8_t DCHPRI16; /**< Channel n Priority Register, offset: 0x113 */
+    __IO uint8_t DCHPRI23; /**< Channel n Priority Register, offset: 0x114 */
+    __IO uint8_t DCHPRI22; /**< Channel n Priority Register, offset: 0x115 */
+    __IO uint8_t DCHPRI21; /**< Channel n Priority Register, offset: 0x116 */
+    __IO uint8_t DCHPRI20; /**< Channel n Priority Register, offset: 0x117 */
+    __IO uint8_t DCHPRI27; /**< Channel n Priority Register, offset: 0x118 */
+    __IO uint8_t DCHPRI26; /**< Channel n Priority Register, offset: 0x119 */
+    __IO uint8_t DCHPRI25; /**< Channel n Priority Register, offset: 0x11A */
+    __IO uint8_t DCHPRI24; /**< Channel n Priority Register, offset: 0x11B */
+    __IO uint8_t DCHPRI31; /**< Channel n Priority Register, offset: 0x11C */
+    __IO uint8_t DCHPRI30; /**< Channel n Priority Register, offset: 0x11D */
+    __IO uint8_t DCHPRI29; /**< Channel n Priority Register, offset: 0x11E */
+    __IO uint8_t DCHPRI28; /**< Channel n Priority Register, offset: 0x11F */
+    uint8_t RESERVED_7[3808];
+    struct
+    {                        /* offset: 0x1000, array step: 0x20 */
+        __IO uint32_t SADDR; /**< TCD Source Address, array offset: 0x1000, array step: 0x20 */
+        __IO uint16_t SOFF;  /**< TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20 */
+        __IO uint16_t ATTR;  /**< TCD Transfer Attributes, array offset: 0x1006, array step: 0x20 */
+        union
+        {                                 /* offset: 0x1008, array step: 0x20 */
+            __IO uint32_t NBYTES_MLNO;    /**< TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008,
+                                             array step: 0x20 */
+            __IO uint32_t NBYTES_MLOFFNO; /**< TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset
+                                             Disabled), array offset: 0x1008, array step: 0x20 */
+            __IO uint32_t NBYTES_MLOFFYES; /**< TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled),
+                                              array offset: 0x1008, array step: 0x20 */
+        };
+        __IO uint32_t SLAST; /**< TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20 */
+        __IO uint32_t DADDR; /**< TCD Destination Address, array offset: 0x1010, array step: 0x20 */
+        __IO uint16_t DOFF;  /**< TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20 */
+        union
+        {                                 /* offset: 0x1016, array step: 0x20 */
+            __IO uint16_t CITER_ELINKNO;  /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled),
+                                             array offset: 0x1016, array step: 0x20 */
+            __IO uint16_t CITER_ELINKYES; /**< TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled),
+                                             array offset: 0x1016, array step: 0x20 */
+        };
+        __IO uint32_t DLAST_SGA; /**< TCD Last Destination Address Adjustment/Scatter Gather Address, array offset:
+                                    0x1018, array step: 0x20 */
+        __IO uint16_t CSR;       /**< TCD Control and Status, array offset: 0x101C, array step: 0x20 */
+        union
+        {                                 /* offset: 0x101E, array step: 0x20 */
+            __IO uint16_t BITER_ELINKNO;  /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking
+                                             Disabled), array offset: 0x101E, array step: 0x20 */
+            __IO uint16_t BITER_ELINKYES; /**< TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking
+                                             Enabled), array offset: 0x101E, array step: 0x20 */
+        };
+    } TCD[32];
 } DMA_Type;
 
 /* ----------------------------------------------------------------------------
@@ -7046,1546 +8320,1581 @@ typedef struct {
 
 /*! @name CR - Control Register */
 /*! @{ */
-#define DMA_CR_EDBG_MASK                         (0x2U)
-#define DMA_CR_EDBG_SHIFT                        (1U)
-#define DMA_CR_EDBG(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_EDBG_SHIFT)) & DMA_CR_EDBG_MASK)
-#define DMA_CR_ERCA_MASK                         (0x4U)
-#define DMA_CR_ERCA_SHIFT                        (2U)
-#define DMA_CR_ERCA(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERCA_SHIFT)) & DMA_CR_ERCA_MASK)
-#define DMA_CR_ERGA_MASK                         (0x8U)
-#define DMA_CR_ERGA_SHIFT                        (3U)
-#define DMA_CR_ERGA(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERGA_SHIFT)) & DMA_CR_ERGA_MASK)
-#define DMA_CR_HOE_MASK                          (0x10U)
-#define DMA_CR_HOE_SHIFT                         (4U)
-#define DMA_CR_HOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_HOE_SHIFT)) & DMA_CR_HOE_MASK)
-#define DMA_CR_HALT_MASK                         (0x20U)
-#define DMA_CR_HALT_SHIFT                        (5U)
-#define DMA_CR_HALT(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_HALT_SHIFT)) & DMA_CR_HALT_MASK)
-#define DMA_CR_CLM_MASK                          (0x40U)
-#define DMA_CR_CLM_SHIFT                         (6U)
-#define DMA_CR_CLM(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_CLM_SHIFT)) & DMA_CR_CLM_MASK)
-#define DMA_CR_EMLM_MASK                         (0x80U)
-#define DMA_CR_EMLM_SHIFT                        (7U)
-#define DMA_CR_EMLM(x)                           (((uint32_t)(((uint32_t)(x)) << DMA_CR_EMLM_SHIFT)) & DMA_CR_EMLM_MASK)
-#define DMA_CR_GRP0PRI_MASK                      (0x100U)
-#define DMA_CR_GRP0PRI_SHIFT                     (8U)
-#define DMA_CR_GRP0PRI(x)                        (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP0PRI_SHIFT)) & DMA_CR_GRP0PRI_MASK)
-#define DMA_CR_GRP1PRI_MASK                      (0x400U)
-#define DMA_CR_GRP1PRI_SHIFT                     (10U)
-#define DMA_CR_GRP1PRI(x)                        (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP1PRI_SHIFT)) & DMA_CR_GRP1PRI_MASK)
-#define DMA_CR_ECX_MASK                          (0x10000U)
-#define DMA_CR_ECX_SHIFT                         (16U)
-#define DMA_CR_ECX(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_CR_ECX_SHIFT)) & DMA_CR_ECX_MASK)
-#define DMA_CR_CX_MASK                           (0x20000U)
-#define DMA_CR_CX_SHIFT                          (17U)
-#define DMA_CR_CX(x)                             (((uint32_t)(((uint32_t)(x)) << DMA_CR_CX_SHIFT)) & DMA_CR_CX_MASK)
-#define DMA_CR_ACTIVE_MASK                       (0x80000000U)
-#define DMA_CR_ACTIVE_SHIFT                      (31U)
-#define DMA_CR_ACTIVE(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_CR_ACTIVE_SHIFT)) & DMA_CR_ACTIVE_MASK)
+#define DMA_CR_EDBG_MASK     (0x2U)
+#define DMA_CR_EDBG_SHIFT    (1U)
+#define DMA_CR_EDBG(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_EDBG_SHIFT)) & DMA_CR_EDBG_MASK)
+#define DMA_CR_ERCA_MASK     (0x4U)
+#define DMA_CR_ERCA_SHIFT    (2U)
+#define DMA_CR_ERCA(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERCA_SHIFT)) & DMA_CR_ERCA_MASK)
+#define DMA_CR_ERGA_MASK     (0x8U)
+#define DMA_CR_ERGA_SHIFT    (3U)
+#define DMA_CR_ERGA(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_ERGA_SHIFT)) & DMA_CR_ERGA_MASK)
+#define DMA_CR_HOE_MASK      (0x10U)
+#define DMA_CR_HOE_SHIFT     (4U)
+#define DMA_CR_HOE(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_HOE_SHIFT)) & DMA_CR_HOE_MASK)
+#define DMA_CR_HALT_MASK     (0x20U)
+#define DMA_CR_HALT_SHIFT    (5U)
+#define DMA_CR_HALT(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_HALT_SHIFT)) & DMA_CR_HALT_MASK)
+#define DMA_CR_CLM_MASK      (0x40U)
+#define DMA_CR_CLM_SHIFT     (6U)
+#define DMA_CR_CLM(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_CLM_SHIFT)) & DMA_CR_CLM_MASK)
+#define DMA_CR_EMLM_MASK     (0x80U)
+#define DMA_CR_EMLM_SHIFT    (7U)
+#define DMA_CR_EMLM(x)       (((uint32_t)(((uint32_t)(x)) << DMA_CR_EMLM_SHIFT)) & DMA_CR_EMLM_MASK)
+#define DMA_CR_GRP0PRI_MASK  (0x100U)
+#define DMA_CR_GRP0PRI_SHIFT (8U)
+#define DMA_CR_GRP0PRI(x)    (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP0PRI_SHIFT)) & DMA_CR_GRP0PRI_MASK)
+#define DMA_CR_GRP1PRI_MASK  (0x400U)
+#define DMA_CR_GRP1PRI_SHIFT (10U)
+#define DMA_CR_GRP1PRI(x)    (((uint32_t)(((uint32_t)(x)) << DMA_CR_GRP1PRI_SHIFT)) & DMA_CR_GRP1PRI_MASK)
+#define DMA_CR_ECX_MASK      (0x10000U)
+#define DMA_CR_ECX_SHIFT     (16U)
+#define DMA_CR_ECX(x)        (((uint32_t)(((uint32_t)(x)) << DMA_CR_ECX_SHIFT)) & DMA_CR_ECX_MASK)
+#define DMA_CR_CX_MASK       (0x20000U)
+#define DMA_CR_CX_SHIFT      (17U)
+#define DMA_CR_CX(x)         (((uint32_t)(((uint32_t)(x)) << DMA_CR_CX_SHIFT)) & DMA_CR_CX_MASK)
+#define DMA_CR_ACTIVE_MASK   (0x80000000U)
+#define DMA_CR_ACTIVE_SHIFT  (31U)
+#define DMA_CR_ACTIVE(x)     (((uint32_t)(((uint32_t)(x)) << DMA_CR_ACTIVE_SHIFT)) & DMA_CR_ACTIVE_MASK)
 /*! @} */
 
 /*! @name ES - Error Status Register */
 /*! @{ */
-#define DMA_ES_DBE_MASK                          (0x1U)
-#define DMA_ES_DBE_SHIFT                         (0U)
-#define DMA_ES_DBE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DBE_SHIFT)) & DMA_ES_DBE_MASK)
-#define DMA_ES_SBE_MASK                          (0x2U)
-#define DMA_ES_SBE_SHIFT                         (1U)
-#define DMA_ES_SBE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SBE_SHIFT)) & DMA_ES_SBE_MASK)
-#define DMA_ES_SGE_MASK                          (0x4U)
-#define DMA_ES_SGE_SHIFT                         (2U)
-#define DMA_ES_SGE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SGE_SHIFT)) & DMA_ES_SGE_MASK)
-#define DMA_ES_NCE_MASK                          (0x8U)
-#define DMA_ES_NCE_SHIFT                         (3U)
-#define DMA_ES_NCE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_NCE_SHIFT)) & DMA_ES_NCE_MASK)
-#define DMA_ES_DOE_MASK                          (0x10U)
-#define DMA_ES_DOE_SHIFT                         (4U)
-#define DMA_ES_DOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DOE_SHIFT)) & DMA_ES_DOE_MASK)
-#define DMA_ES_DAE_MASK                          (0x20U)
-#define DMA_ES_DAE_SHIFT                         (5U)
-#define DMA_ES_DAE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_DAE_SHIFT)) & DMA_ES_DAE_MASK)
-#define DMA_ES_SOE_MASK                          (0x40U)
-#define DMA_ES_SOE_SHIFT                         (6U)
-#define DMA_ES_SOE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SOE_SHIFT)) & DMA_ES_SOE_MASK)
-#define DMA_ES_SAE_MASK                          (0x80U)
-#define DMA_ES_SAE_SHIFT                         (7U)
-#define DMA_ES_SAE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_SAE_SHIFT)) & DMA_ES_SAE_MASK)
-#define DMA_ES_ERRCHN_MASK                       (0x1F00U)
-#define DMA_ES_ERRCHN_SHIFT                      (8U)
-#define DMA_ES_ERRCHN(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ES_ERRCHN_SHIFT)) & DMA_ES_ERRCHN_MASK)
-#define DMA_ES_CPE_MASK                          (0x4000U)
-#define DMA_ES_CPE_SHIFT                         (14U)
-#define DMA_ES_CPE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_CPE_SHIFT)) & DMA_ES_CPE_MASK)
-#define DMA_ES_GPE_MASK                          (0x8000U)
-#define DMA_ES_GPE_SHIFT                         (15U)
-#define DMA_ES_GPE(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_GPE_SHIFT)) & DMA_ES_GPE_MASK)
-#define DMA_ES_ECX_MASK                          (0x10000U)
-#define DMA_ES_ECX_SHIFT                         (16U)
-#define DMA_ES_ECX(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_ECX_SHIFT)) & DMA_ES_ECX_MASK)
-#define DMA_ES_VLD_MASK                          (0x80000000U)
-#define DMA_ES_VLD_SHIFT                         (31U)
-#define DMA_ES_VLD(x)                            (((uint32_t)(((uint32_t)(x)) << DMA_ES_VLD_SHIFT)) & DMA_ES_VLD_MASK)
+#define DMA_ES_DBE_MASK     (0x1U)
+#define DMA_ES_DBE_SHIFT    (0U)
+#define DMA_ES_DBE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DBE_SHIFT)) & DMA_ES_DBE_MASK)
+#define DMA_ES_SBE_MASK     (0x2U)
+#define DMA_ES_SBE_SHIFT    (1U)
+#define DMA_ES_SBE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SBE_SHIFT)) & DMA_ES_SBE_MASK)
+#define DMA_ES_SGE_MASK     (0x4U)
+#define DMA_ES_SGE_SHIFT    (2U)
+#define DMA_ES_SGE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SGE_SHIFT)) & DMA_ES_SGE_MASK)
+#define DMA_ES_NCE_MASK     (0x8U)
+#define DMA_ES_NCE_SHIFT    (3U)
+#define DMA_ES_NCE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_NCE_SHIFT)) & DMA_ES_NCE_MASK)
+#define DMA_ES_DOE_MASK     (0x10U)
+#define DMA_ES_DOE_SHIFT    (4U)
+#define DMA_ES_DOE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DOE_SHIFT)) & DMA_ES_DOE_MASK)
+#define DMA_ES_DAE_MASK     (0x20U)
+#define DMA_ES_DAE_SHIFT    (5U)
+#define DMA_ES_DAE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_DAE_SHIFT)) & DMA_ES_DAE_MASK)
+#define DMA_ES_SOE_MASK     (0x40U)
+#define DMA_ES_SOE_SHIFT    (6U)
+#define DMA_ES_SOE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SOE_SHIFT)) & DMA_ES_SOE_MASK)
+#define DMA_ES_SAE_MASK     (0x80U)
+#define DMA_ES_SAE_SHIFT    (7U)
+#define DMA_ES_SAE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_SAE_SHIFT)) & DMA_ES_SAE_MASK)
+#define DMA_ES_ERRCHN_MASK  (0x1F00U)
+#define DMA_ES_ERRCHN_SHIFT (8U)
+#define DMA_ES_ERRCHN(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ES_ERRCHN_SHIFT)) & DMA_ES_ERRCHN_MASK)
+#define DMA_ES_CPE_MASK     (0x4000U)
+#define DMA_ES_CPE_SHIFT    (14U)
+#define DMA_ES_CPE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_CPE_SHIFT)) & DMA_ES_CPE_MASK)
+#define DMA_ES_GPE_MASK     (0x8000U)
+#define DMA_ES_GPE_SHIFT    (15U)
+#define DMA_ES_GPE(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_GPE_SHIFT)) & DMA_ES_GPE_MASK)
+#define DMA_ES_ECX_MASK     (0x10000U)
+#define DMA_ES_ECX_SHIFT    (16U)
+#define DMA_ES_ECX(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_ECX_SHIFT)) & DMA_ES_ECX_MASK)
+#define DMA_ES_VLD_MASK     (0x80000000U)
+#define DMA_ES_VLD_SHIFT    (31U)
+#define DMA_ES_VLD(x)       (((uint32_t)(((uint32_t)(x)) << DMA_ES_VLD_SHIFT)) & DMA_ES_VLD_MASK)
 /*! @} */
 
 /*! @name ERQ - Enable Request Register */
 /*! @{ */
-#define DMA_ERQ_ERQ0_MASK                        (0x1U)
-#define DMA_ERQ_ERQ0_SHIFT                       (0U)
-#define DMA_ERQ_ERQ0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ0_SHIFT)) & DMA_ERQ_ERQ0_MASK)
-#define DMA_ERQ_ERQ1_MASK                        (0x2U)
-#define DMA_ERQ_ERQ1_SHIFT                       (1U)
-#define DMA_ERQ_ERQ1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ1_SHIFT)) & DMA_ERQ_ERQ1_MASK)
-#define DMA_ERQ_ERQ2_MASK                        (0x4U)
-#define DMA_ERQ_ERQ2_SHIFT                       (2U)
-#define DMA_ERQ_ERQ2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ2_SHIFT)) & DMA_ERQ_ERQ2_MASK)
-#define DMA_ERQ_ERQ3_MASK                        (0x8U)
-#define DMA_ERQ_ERQ3_SHIFT                       (3U)
-#define DMA_ERQ_ERQ3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ3_SHIFT)) & DMA_ERQ_ERQ3_MASK)
-#define DMA_ERQ_ERQ4_MASK                        (0x10U)
-#define DMA_ERQ_ERQ4_SHIFT                       (4U)
-#define DMA_ERQ_ERQ4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ4_SHIFT)) & DMA_ERQ_ERQ4_MASK)
-#define DMA_ERQ_ERQ5_MASK                        (0x20U)
-#define DMA_ERQ_ERQ5_SHIFT                       (5U)
-#define DMA_ERQ_ERQ5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ5_SHIFT)) & DMA_ERQ_ERQ5_MASK)
-#define DMA_ERQ_ERQ6_MASK                        (0x40U)
-#define DMA_ERQ_ERQ6_SHIFT                       (6U)
-#define DMA_ERQ_ERQ6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ6_SHIFT)) & DMA_ERQ_ERQ6_MASK)
-#define DMA_ERQ_ERQ7_MASK                        (0x80U)
-#define DMA_ERQ_ERQ7_SHIFT                       (7U)
-#define DMA_ERQ_ERQ7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ7_SHIFT)) & DMA_ERQ_ERQ7_MASK)
-#define DMA_ERQ_ERQ8_MASK                        (0x100U)
-#define DMA_ERQ_ERQ8_SHIFT                       (8U)
-#define DMA_ERQ_ERQ8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ8_SHIFT)) & DMA_ERQ_ERQ8_MASK)
-#define DMA_ERQ_ERQ9_MASK                        (0x200U)
-#define DMA_ERQ_ERQ9_SHIFT                       (9U)
-#define DMA_ERQ_ERQ9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ9_SHIFT)) & DMA_ERQ_ERQ9_MASK)
-#define DMA_ERQ_ERQ10_MASK                       (0x400U)
-#define DMA_ERQ_ERQ10_SHIFT                      (10U)
-#define DMA_ERQ_ERQ10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ10_SHIFT)) & DMA_ERQ_ERQ10_MASK)
-#define DMA_ERQ_ERQ11_MASK                       (0x800U)
-#define DMA_ERQ_ERQ11_SHIFT                      (11U)
-#define DMA_ERQ_ERQ11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ11_SHIFT)) & DMA_ERQ_ERQ11_MASK)
-#define DMA_ERQ_ERQ12_MASK                       (0x1000U)
-#define DMA_ERQ_ERQ12_SHIFT                      (12U)
-#define DMA_ERQ_ERQ12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ12_SHIFT)) & DMA_ERQ_ERQ12_MASK)
-#define DMA_ERQ_ERQ13_MASK                       (0x2000U)
-#define DMA_ERQ_ERQ13_SHIFT                      (13U)
-#define DMA_ERQ_ERQ13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ13_SHIFT)) & DMA_ERQ_ERQ13_MASK)
-#define DMA_ERQ_ERQ14_MASK                       (0x4000U)
-#define DMA_ERQ_ERQ14_SHIFT                      (14U)
-#define DMA_ERQ_ERQ14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ14_SHIFT)) & DMA_ERQ_ERQ14_MASK)
-#define DMA_ERQ_ERQ15_MASK                       (0x8000U)
-#define DMA_ERQ_ERQ15_SHIFT                      (15U)
-#define DMA_ERQ_ERQ15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ15_SHIFT)) & DMA_ERQ_ERQ15_MASK)
-#define DMA_ERQ_ERQ16_MASK                       (0x10000U)
-#define DMA_ERQ_ERQ16_SHIFT                      (16U)
-#define DMA_ERQ_ERQ16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ16_SHIFT)) & DMA_ERQ_ERQ16_MASK)
-#define DMA_ERQ_ERQ17_MASK                       (0x20000U)
-#define DMA_ERQ_ERQ17_SHIFT                      (17U)
-#define DMA_ERQ_ERQ17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ17_SHIFT)) & DMA_ERQ_ERQ17_MASK)
-#define DMA_ERQ_ERQ18_MASK                       (0x40000U)
-#define DMA_ERQ_ERQ18_SHIFT                      (18U)
-#define DMA_ERQ_ERQ18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ18_SHIFT)) & DMA_ERQ_ERQ18_MASK)
-#define DMA_ERQ_ERQ19_MASK                       (0x80000U)
-#define DMA_ERQ_ERQ19_SHIFT                      (19U)
-#define DMA_ERQ_ERQ19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ19_SHIFT)) & DMA_ERQ_ERQ19_MASK)
-#define DMA_ERQ_ERQ20_MASK                       (0x100000U)
-#define DMA_ERQ_ERQ20_SHIFT                      (20U)
-#define DMA_ERQ_ERQ20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ20_SHIFT)) & DMA_ERQ_ERQ20_MASK)
-#define DMA_ERQ_ERQ21_MASK                       (0x200000U)
-#define DMA_ERQ_ERQ21_SHIFT                      (21U)
-#define DMA_ERQ_ERQ21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ21_SHIFT)) & DMA_ERQ_ERQ21_MASK)
-#define DMA_ERQ_ERQ22_MASK                       (0x400000U)
-#define DMA_ERQ_ERQ22_SHIFT                      (22U)
-#define DMA_ERQ_ERQ22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ22_SHIFT)) & DMA_ERQ_ERQ22_MASK)
-#define DMA_ERQ_ERQ23_MASK                       (0x800000U)
-#define DMA_ERQ_ERQ23_SHIFT                      (23U)
-#define DMA_ERQ_ERQ23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ23_SHIFT)) & DMA_ERQ_ERQ23_MASK)
-#define DMA_ERQ_ERQ24_MASK                       (0x1000000U)
-#define DMA_ERQ_ERQ24_SHIFT                      (24U)
-#define DMA_ERQ_ERQ24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ24_SHIFT)) & DMA_ERQ_ERQ24_MASK)
-#define DMA_ERQ_ERQ25_MASK                       (0x2000000U)
-#define DMA_ERQ_ERQ25_SHIFT                      (25U)
-#define DMA_ERQ_ERQ25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ25_SHIFT)) & DMA_ERQ_ERQ25_MASK)
-#define DMA_ERQ_ERQ26_MASK                       (0x4000000U)
-#define DMA_ERQ_ERQ26_SHIFT                      (26U)
-#define DMA_ERQ_ERQ26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ26_SHIFT)) & DMA_ERQ_ERQ26_MASK)
-#define DMA_ERQ_ERQ27_MASK                       (0x8000000U)
-#define DMA_ERQ_ERQ27_SHIFT                      (27U)
-#define DMA_ERQ_ERQ27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ27_SHIFT)) & DMA_ERQ_ERQ27_MASK)
-#define DMA_ERQ_ERQ28_MASK                       (0x10000000U)
-#define DMA_ERQ_ERQ28_SHIFT                      (28U)
-#define DMA_ERQ_ERQ28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ28_SHIFT)) & DMA_ERQ_ERQ28_MASK)
-#define DMA_ERQ_ERQ29_MASK                       (0x20000000U)
-#define DMA_ERQ_ERQ29_SHIFT                      (29U)
-#define DMA_ERQ_ERQ29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ29_SHIFT)) & DMA_ERQ_ERQ29_MASK)
-#define DMA_ERQ_ERQ30_MASK                       (0x40000000U)
-#define DMA_ERQ_ERQ30_SHIFT                      (30U)
-#define DMA_ERQ_ERQ30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ30_SHIFT)) & DMA_ERQ_ERQ30_MASK)
-#define DMA_ERQ_ERQ31_MASK                       (0x80000000U)
-#define DMA_ERQ_ERQ31_SHIFT                      (31U)
-#define DMA_ERQ_ERQ31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ31_SHIFT)) & DMA_ERQ_ERQ31_MASK)
+#define DMA_ERQ_ERQ0_MASK   (0x1U)
+#define DMA_ERQ_ERQ0_SHIFT  (0U)
+#define DMA_ERQ_ERQ0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ0_SHIFT)) & DMA_ERQ_ERQ0_MASK)
+#define DMA_ERQ_ERQ1_MASK   (0x2U)
+#define DMA_ERQ_ERQ1_SHIFT  (1U)
+#define DMA_ERQ_ERQ1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ1_SHIFT)) & DMA_ERQ_ERQ1_MASK)
+#define DMA_ERQ_ERQ2_MASK   (0x4U)
+#define DMA_ERQ_ERQ2_SHIFT  (2U)
+#define DMA_ERQ_ERQ2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ2_SHIFT)) & DMA_ERQ_ERQ2_MASK)
+#define DMA_ERQ_ERQ3_MASK   (0x8U)
+#define DMA_ERQ_ERQ3_SHIFT  (3U)
+#define DMA_ERQ_ERQ3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ3_SHIFT)) & DMA_ERQ_ERQ3_MASK)
+#define DMA_ERQ_ERQ4_MASK   (0x10U)
+#define DMA_ERQ_ERQ4_SHIFT  (4U)
+#define DMA_ERQ_ERQ4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ4_SHIFT)) & DMA_ERQ_ERQ4_MASK)
+#define DMA_ERQ_ERQ5_MASK   (0x20U)
+#define DMA_ERQ_ERQ5_SHIFT  (5U)
+#define DMA_ERQ_ERQ5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ5_SHIFT)) & DMA_ERQ_ERQ5_MASK)
+#define DMA_ERQ_ERQ6_MASK   (0x40U)
+#define DMA_ERQ_ERQ6_SHIFT  (6U)
+#define DMA_ERQ_ERQ6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ6_SHIFT)) & DMA_ERQ_ERQ6_MASK)
+#define DMA_ERQ_ERQ7_MASK   (0x80U)
+#define DMA_ERQ_ERQ7_SHIFT  (7U)
+#define DMA_ERQ_ERQ7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ7_SHIFT)) & DMA_ERQ_ERQ7_MASK)
+#define DMA_ERQ_ERQ8_MASK   (0x100U)
+#define DMA_ERQ_ERQ8_SHIFT  (8U)
+#define DMA_ERQ_ERQ8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ8_SHIFT)) & DMA_ERQ_ERQ8_MASK)
+#define DMA_ERQ_ERQ9_MASK   (0x200U)
+#define DMA_ERQ_ERQ9_SHIFT  (9U)
+#define DMA_ERQ_ERQ9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ9_SHIFT)) & DMA_ERQ_ERQ9_MASK)
+#define DMA_ERQ_ERQ10_MASK  (0x400U)
+#define DMA_ERQ_ERQ10_SHIFT (10U)
+#define DMA_ERQ_ERQ10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ10_SHIFT)) & DMA_ERQ_ERQ10_MASK)
+#define DMA_ERQ_ERQ11_MASK  (0x800U)
+#define DMA_ERQ_ERQ11_SHIFT (11U)
+#define DMA_ERQ_ERQ11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ11_SHIFT)) & DMA_ERQ_ERQ11_MASK)
+#define DMA_ERQ_ERQ12_MASK  (0x1000U)
+#define DMA_ERQ_ERQ12_SHIFT (12U)
+#define DMA_ERQ_ERQ12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ12_SHIFT)) & DMA_ERQ_ERQ12_MASK)
+#define DMA_ERQ_ERQ13_MASK  (0x2000U)
+#define DMA_ERQ_ERQ13_SHIFT (13U)
+#define DMA_ERQ_ERQ13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ13_SHIFT)) & DMA_ERQ_ERQ13_MASK)
+#define DMA_ERQ_ERQ14_MASK  (0x4000U)
+#define DMA_ERQ_ERQ14_SHIFT (14U)
+#define DMA_ERQ_ERQ14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ14_SHIFT)) & DMA_ERQ_ERQ14_MASK)
+#define DMA_ERQ_ERQ15_MASK  (0x8000U)
+#define DMA_ERQ_ERQ15_SHIFT (15U)
+#define DMA_ERQ_ERQ15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ15_SHIFT)) & DMA_ERQ_ERQ15_MASK)
+#define DMA_ERQ_ERQ16_MASK  (0x10000U)
+#define DMA_ERQ_ERQ16_SHIFT (16U)
+#define DMA_ERQ_ERQ16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ16_SHIFT)) & DMA_ERQ_ERQ16_MASK)
+#define DMA_ERQ_ERQ17_MASK  (0x20000U)
+#define DMA_ERQ_ERQ17_SHIFT (17U)
+#define DMA_ERQ_ERQ17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ17_SHIFT)) & DMA_ERQ_ERQ17_MASK)
+#define DMA_ERQ_ERQ18_MASK  (0x40000U)
+#define DMA_ERQ_ERQ18_SHIFT (18U)
+#define DMA_ERQ_ERQ18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ18_SHIFT)) & DMA_ERQ_ERQ18_MASK)
+#define DMA_ERQ_ERQ19_MASK  (0x80000U)
+#define DMA_ERQ_ERQ19_SHIFT (19U)
+#define DMA_ERQ_ERQ19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ19_SHIFT)) & DMA_ERQ_ERQ19_MASK)
+#define DMA_ERQ_ERQ20_MASK  (0x100000U)
+#define DMA_ERQ_ERQ20_SHIFT (20U)
+#define DMA_ERQ_ERQ20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ20_SHIFT)) & DMA_ERQ_ERQ20_MASK)
+#define DMA_ERQ_ERQ21_MASK  (0x200000U)
+#define DMA_ERQ_ERQ21_SHIFT (21U)
+#define DMA_ERQ_ERQ21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ21_SHIFT)) & DMA_ERQ_ERQ21_MASK)
+#define DMA_ERQ_ERQ22_MASK  (0x400000U)
+#define DMA_ERQ_ERQ22_SHIFT (22U)
+#define DMA_ERQ_ERQ22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ22_SHIFT)) & DMA_ERQ_ERQ22_MASK)
+#define DMA_ERQ_ERQ23_MASK  (0x800000U)
+#define DMA_ERQ_ERQ23_SHIFT (23U)
+#define DMA_ERQ_ERQ23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ23_SHIFT)) & DMA_ERQ_ERQ23_MASK)
+#define DMA_ERQ_ERQ24_MASK  (0x1000000U)
+#define DMA_ERQ_ERQ24_SHIFT (24U)
+#define DMA_ERQ_ERQ24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ24_SHIFT)) & DMA_ERQ_ERQ24_MASK)
+#define DMA_ERQ_ERQ25_MASK  (0x2000000U)
+#define DMA_ERQ_ERQ25_SHIFT (25U)
+#define DMA_ERQ_ERQ25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ25_SHIFT)) & DMA_ERQ_ERQ25_MASK)
+#define DMA_ERQ_ERQ26_MASK  (0x4000000U)
+#define DMA_ERQ_ERQ26_SHIFT (26U)
+#define DMA_ERQ_ERQ26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ26_SHIFT)) & DMA_ERQ_ERQ26_MASK)
+#define DMA_ERQ_ERQ27_MASK  (0x8000000U)
+#define DMA_ERQ_ERQ27_SHIFT (27U)
+#define DMA_ERQ_ERQ27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ27_SHIFT)) & DMA_ERQ_ERQ27_MASK)
+#define DMA_ERQ_ERQ28_MASK  (0x10000000U)
+#define DMA_ERQ_ERQ28_SHIFT (28U)
+#define DMA_ERQ_ERQ28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ28_SHIFT)) & DMA_ERQ_ERQ28_MASK)
+#define DMA_ERQ_ERQ29_MASK  (0x20000000U)
+#define DMA_ERQ_ERQ29_SHIFT (29U)
+#define DMA_ERQ_ERQ29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ29_SHIFT)) & DMA_ERQ_ERQ29_MASK)
+#define DMA_ERQ_ERQ30_MASK  (0x40000000U)
+#define DMA_ERQ_ERQ30_SHIFT (30U)
+#define DMA_ERQ_ERQ30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ30_SHIFT)) & DMA_ERQ_ERQ30_MASK)
+#define DMA_ERQ_ERQ31_MASK  (0x80000000U)
+#define DMA_ERQ_ERQ31_SHIFT (31U)
+#define DMA_ERQ_ERQ31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERQ_ERQ31_SHIFT)) & DMA_ERQ_ERQ31_MASK)
 /*! @} */
 
 /*! @name EEI - Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_EEI_EEI0_MASK                        (0x1U)
-#define DMA_EEI_EEI0_SHIFT                       (0U)
-#define DMA_EEI_EEI0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI0_SHIFT)) & DMA_EEI_EEI0_MASK)
-#define DMA_EEI_EEI1_MASK                        (0x2U)
-#define DMA_EEI_EEI1_SHIFT                       (1U)
-#define DMA_EEI_EEI1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI1_SHIFT)) & DMA_EEI_EEI1_MASK)
-#define DMA_EEI_EEI2_MASK                        (0x4U)
-#define DMA_EEI_EEI2_SHIFT                       (2U)
-#define DMA_EEI_EEI2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI2_SHIFT)) & DMA_EEI_EEI2_MASK)
-#define DMA_EEI_EEI3_MASK                        (0x8U)
-#define DMA_EEI_EEI3_SHIFT                       (3U)
-#define DMA_EEI_EEI3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI3_SHIFT)) & DMA_EEI_EEI3_MASK)
-#define DMA_EEI_EEI4_MASK                        (0x10U)
-#define DMA_EEI_EEI4_SHIFT                       (4U)
-#define DMA_EEI_EEI4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI4_SHIFT)) & DMA_EEI_EEI4_MASK)
-#define DMA_EEI_EEI5_MASK                        (0x20U)
-#define DMA_EEI_EEI5_SHIFT                       (5U)
-#define DMA_EEI_EEI5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI5_SHIFT)) & DMA_EEI_EEI5_MASK)
-#define DMA_EEI_EEI6_MASK                        (0x40U)
-#define DMA_EEI_EEI6_SHIFT                       (6U)
-#define DMA_EEI_EEI6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI6_SHIFT)) & DMA_EEI_EEI6_MASK)
-#define DMA_EEI_EEI7_MASK                        (0x80U)
-#define DMA_EEI_EEI7_SHIFT                       (7U)
-#define DMA_EEI_EEI7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI7_SHIFT)) & DMA_EEI_EEI7_MASK)
-#define DMA_EEI_EEI8_MASK                        (0x100U)
-#define DMA_EEI_EEI8_SHIFT                       (8U)
-#define DMA_EEI_EEI8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI8_SHIFT)) & DMA_EEI_EEI8_MASK)
-#define DMA_EEI_EEI9_MASK                        (0x200U)
-#define DMA_EEI_EEI9_SHIFT                       (9U)
-#define DMA_EEI_EEI9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI9_SHIFT)) & DMA_EEI_EEI9_MASK)
-#define DMA_EEI_EEI10_MASK                       (0x400U)
-#define DMA_EEI_EEI10_SHIFT                      (10U)
-#define DMA_EEI_EEI10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI10_SHIFT)) & DMA_EEI_EEI10_MASK)
-#define DMA_EEI_EEI11_MASK                       (0x800U)
-#define DMA_EEI_EEI11_SHIFT                      (11U)
-#define DMA_EEI_EEI11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI11_SHIFT)) & DMA_EEI_EEI11_MASK)
-#define DMA_EEI_EEI12_MASK                       (0x1000U)
-#define DMA_EEI_EEI12_SHIFT                      (12U)
-#define DMA_EEI_EEI12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI12_SHIFT)) & DMA_EEI_EEI12_MASK)
-#define DMA_EEI_EEI13_MASK                       (0x2000U)
-#define DMA_EEI_EEI13_SHIFT                      (13U)
-#define DMA_EEI_EEI13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI13_SHIFT)) & DMA_EEI_EEI13_MASK)
-#define DMA_EEI_EEI14_MASK                       (0x4000U)
-#define DMA_EEI_EEI14_SHIFT                      (14U)
-#define DMA_EEI_EEI14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI14_SHIFT)) & DMA_EEI_EEI14_MASK)
-#define DMA_EEI_EEI15_MASK                       (0x8000U)
-#define DMA_EEI_EEI15_SHIFT                      (15U)
-#define DMA_EEI_EEI15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI15_SHIFT)) & DMA_EEI_EEI15_MASK)
-#define DMA_EEI_EEI16_MASK                       (0x10000U)
-#define DMA_EEI_EEI16_SHIFT                      (16U)
-#define DMA_EEI_EEI16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI16_SHIFT)) & DMA_EEI_EEI16_MASK)
-#define DMA_EEI_EEI17_MASK                       (0x20000U)
-#define DMA_EEI_EEI17_SHIFT                      (17U)
-#define DMA_EEI_EEI17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI17_SHIFT)) & DMA_EEI_EEI17_MASK)
-#define DMA_EEI_EEI18_MASK                       (0x40000U)
-#define DMA_EEI_EEI18_SHIFT                      (18U)
-#define DMA_EEI_EEI18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI18_SHIFT)) & DMA_EEI_EEI18_MASK)
-#define DMA_EEI_EEI19_MASK                       (0x80000U)
-#define DMA_EEI_EEI19_SHIFT                      (19U)
-#define DMA_EEI_EEI19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI19_SHIFT)) & DMA_EEI_EEI19_MASK)
-#define DMA_EEI_EEI20_MASK                       (0x100000U)
-#define DMA_EEI_EEI20_SHIFT                      (20U)
-#define DMA_EEI_EEI20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI20_SHIFT)) & DMA_EEI_EEI20_MASK)
-#define DMA_EEI_EEI21_MASK                       (0x200000U)
-#define DMA_EEI_EEI21_SHIFT                      (21U)
-#define DMA_EEI_EEI21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI21_SHIFT)) & DMA_EEI_EEI21_MASK)
-#define DMA_EEI_EEI22_MASK                       (0x400000U)
-#define DMA_EEI_EEI22_SHIFT                      (22U)
-#define DMA_EEI_EEI22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI22_SHIFT)) & DMA_EEI_EEI22_MASK)
-#define DMA_EEI_EEI23_MASK                       (0x800000U)
-#define DMA_EEI_EEI23_SHIFT                      (23U)
-#define DMA_EEI_EEI23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI23_SHIFT)) & DMA_EEI_EEI23_MASK)
-#define DMA_EEI_EEI24_MASK                       (0x1000000U)
-#define DMA_EEI_EEI24_SHIFT                      (24U)
-#define DMA_EEI_EEI24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI24_SHIFT)) & DMA_EEI_EEI24_MASK)
-#define DMA_EEI_EEI25_MASK                       (0x2000000U)
-#define DMA_EEI_EEI25_SHIFT                      (25U)
-#define DMA_EEI_EEI25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI25_SHIFT)) & DMA_EEI_EEI25_MASK)
-#define DMA_EEI_EEI26_MASK                       (0x4000000U)
-#define DMA_EEI_EEI26_SHIFT                      (26U)
-#define DMA_EEI_EEI26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI26_SHIFT)) & DMA_EEI_EEI26_MASK)
-#define DMA_EEI_EEI27_MASK                       (0x8000000U)
-#define DMA_EEI_EEI27_SHIFT                      (27U)
-#define DMA_EEI_EEI27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI27_SHIFT)) & DMA_EEI_EEI27_MASK)
-#define DMA_EEI_EEI28_MASK                       (0x10000000U)
-#define DMA_EEI_EEI28_SHIFT                      (28U)
-#define DMA_EEI_EEI28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI28_SHIFT)) & DMA_EEI_EEI28_MASK)
-#define DMA_EEI_EEI29_MASK                       (0x20000000U)
-#define DMA_EEI_EEI29_SHIFT                      (29U)
-#define DMA_EEI_EEI29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI29_SHIFT)) & DMA_EEI_EEI29_MASK)
-#define DMA_EEI_EEI30_MASK                       (0x40000000U)
-#define DMA_EEI_EEI30_SHIFT                      (30U)
-#define DMA_EEI_EEI30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI30_SHIFT)) & DMA_EEI_EEI30_MASK)
-#define DMA_EEI_EEI31_MASK                       (0x80000000U)
-#define DMA_EEI_EEI31_SHIFT                      (31U)
-#define DMA_EEI_EEI31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI31_SHIFT)) & DMA_EEI_EEI31_MASK)
+#define DMA_EEI_EEI0_MASK   (0x1U)
+#define DMA_EEI_EEI0_SHIFT  (0U)
+#define DMA_EEI_EEI0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI0_SHIFT)) & DMA_EEI_EEI0_MASK)
+#define DMA_EEI_EEI1_MASK   (0x2U)
+#define DMA_EEI_EEI1_SHIFT  (1U)
+#define DMA_EEI_EEI1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI1_SHIFT)) & DMA_EEI_EEI1_MASK)
+#define DMA_EEI_EEI2_MASK   (0x4U)
+#define DMA_EEI_EEI2_SHIFT  (2U)
+#define DMA_EEI_EEI2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI2_SHIFT)) & DMA_EEI_EEI2_MASK)
+#define DMA_EEI_EEI3_MASK   (0x8U)
+#define DMA_EEI_EEI3_SHIFT  (3U)
+#define DMA_EEI_EEI3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI3_SHIFT)) & DMA_EEI_EEI3_MASK)
+#define DMA_EEI_EEI4_MASK   (0x10U)
+#define DMA_EEI_EEI4_SHIFT  (4U)
+#define DMA_EEI_EEI4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI4_SHIFT)) & DMA_EEI_EEI4_MASK)
+#define DMA_EEI_EEI5_MASK   (0x20U)
+#define DMA_EEI_EEI5_SHIFT  (5U)
+#define DMA_EEI_EEI5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI5_SHIFT)) & DMA_EEI_EEI5_MASK)
+#define DMA_EEI_EEI6_MASK   (0x40U)
+#define DMA_EEI_EEI6_SHIFT  (6U)
+#define DMA_EEI_EEI6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI6_SHIFT)) & DMA_EEI_EEI6_MASK)
+#define DMA_EEI_EEI7_MASK   (0x80U)
+#define DMA_EEI_EEI7_SHIFT  (7U)
+#define DMA_EEI_EEI7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI7_SHIFT)) & DMA_EEI_EEI7_MASK)
+#define DMA_EEI_EEI8_MASK   (0x100U)
+#define DMA_EEI_EEI8_SHIFT  (8U)
+#define DMA_EEI_EEI8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI8_SHIFT)) & DMA_EEI_EEI8_MASK)
+#define DMA_EEI_EEI9_MASK   (0x200U)
+#define DMA_EEI_EEI9_SHIFT  (9U)
+#define DMA_EEI_EEI9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI9_SHIFT)) & DMA_EEI_EEI9_MASK)
+#define DMA_EEI_EEI10_MASK  (0x400U)
+#define DMA_EEI_EEI10_SHIFT (10U)
+#define DMA_EEI_EEI10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI10_SHIFT)) & DMA_EEI_EEI10_MASK)
+#define DMA_EEI_EEI11_MASK  (0x800U)
+#define DMA_EEI_EEI11_SHIFT (11U)
+#define DMA_EEI_EEI11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI11_SHIFT)) & DMA_EEI_EEI11_MASK)
+#define DMA_EEI_EEI12_MASK  (0x1000U)
+#define DMA_EEI_EEI12_SHIFT (12U)
+#define DMA_EEI_EEI12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI12_SHIFT)) & DMA_EEI_EEI12_MASK)
+#define DMA_EEI_EEI13_MASK  (0x2000U)
+#define DMA_EEI_EEI13_SHIFT (13U)
+#define DMA_EEI_EEI13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI13_SHIFT)) & DMA_EEI_EEI13_MASK)
+#define DMA_EEI_EEI14_MASK  (0x4000U)
+#define DMA_EEI_EEI14_SHIFT (14U)
+#define DMA_EEI_EEI14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI14_SHIFT)) & DMA_EEI_EEI14_MASK)
+#define DMA_EEI_EEI15_MASK  (0x8000U)
+#define DMA_EEI_EEI15_SHIFT (15U)
+#define DMA_EEI_EEI15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI15_SHIFT)) & DMA_EEI_EEI15_MASK)
+#define DMA_EEI_EEI16_MASK  (0x10000U)
+#define DMA_EEI_EEI16_SHIFT (16U)
+#define DMA_EEI_EEI16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI16_SHIFT)) & DMA_EEI_EEI16_MASK)
+#define DMA_EEI_EEI17_MASK  (0x20000U)
+#define DMA_EEI_EEI17_SHIFT (17U)
+#define DMA_EEI_EEI17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI17_SHIFT)) & DMA_EEI_EEI17_MASK)
+#define DMA_EEI_EEI18_MASK  (0x40000U)
+#define DMA_EEI_EEI18_SHIFT (18U)
+#define DMA_EEI_EEI18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI18_SHIFT)) & DMA_EEI_EEI18_MASK)
+#define DMA_EEI_EEI19_MASK  (0x80000U)
+#define DMA_EEI_EEI19_SHIFT (19U)
+#define DMA_EEI_EEI19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI19_SHIFT)) & DMA_EEI_EEI19_MASK)
+#define DMA_EEI_EEI20_MASK  (0x100000U)
+#define DMA_EEI_EEI20_SHIFT (20U)
+#define DMA_EEI_EEI20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI20_SHIFT)) & DMA_EEI_EEI20_MASK)
+#define DMA_EEI_EEI21_MASK  (0x200000U)
+#define DMA_EEI_EEI21_SHIFT (21U)
+#define DMA_EEI_EEI21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI21_SHIFT)) & DMA_EEI_EEI21_MASK)
+#define DMA_EEI_EEI22_MASK  (0x400000U)
+#define DMA_EEI_EEI22_SHIFT (22U)
+#define DMA_EEI_EEI22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI22_SHIFT)) & DMA_EEI_EEI22_MASK)
+#define DMA_EEI_EEI23_MASK  (0x800000U)
+#define DMA_EEI_EEI23_SHIFT (23U)
+#define DMA_EEI_EEI23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI23_SHIFT)) & DMA_EEI_EEI23_MASK)
+#define DMA_EEI_EEI24_MASK  (0x1000000U)
+#define DMA_EEI_EEI24_SHIFT (24U)
+#define DMA_EEI_EEI24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI24_SHIFT)) & DMA_EEI_EEI24_MASK)
+#define DMA_EEI_EEI25_MASK  (0x2000000U)
+#define DMA_EEI_EEI25_SHIFT (25U)
+#define DMA_EEI_EEI25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI25_SHIFT)) & DMA_EEI_EEI25_MASK)
+#define DMA_EEI_EEI26_MASK  (0x4000000U)
+#define DMA_EEI_EEI26_SHIFT (26U)
+#define DMA_EEI_EEI26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI26_SHIFT)) & DMA_EEI_EEI26_MASK)
+#define DMA_EEI_EEI27_MASK  (0x8000000U)
+#define DMA_EEI_EEI27_SHIFT (27U)
+#define DMA_EEI_EEI27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI27_SHIFT)) & DMA_EEI_EEI27_MASK)
+#define DMA_EEI_EEI28_MASK  (0x10000000U)
+#define DMA_EEI_EEI28_SHIFT (28U)
+#define DMA_EEI_EEI28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI28_SHIFT)) & DMA_EEI_EEI28_MASK)
+#define DMA_EEI_EEI29_MASK  (0x20000000U)
+#define DMA_EEI_EEI29_SHIFT (29U)
+#define DMA_EEI_EEI29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI29_SHIFT)) & DMA_EEI_EEI29_MASK)
+#define DMA_EEI_EEI30_MASK  (0x40000000U)
+#define DMA_EEI_EEI30_SHIFT (30U)
+#define DMA_EEI_EEI30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI30_SHIFT)) & DMA_EEI_EEI30_MASK)
+#define DMA_EEI_EEI31_MASK  (0x80000000U)
+#define DMA_EEI_EEI31_SHIFT (31U)
+#define DMA_EEI_EEI31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EEI_EEI31_SHIFT)) & DMA_EEI_EEI31_MASK)
 /*! @} */
 
 /*! @name CEEI - Clear Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_CEEI_CEEI_MASK                       (0x1FU)
-#define DMA_CEEI_CEEI_SHIFT                      (0U)
-#define DMA_CEEI_CEEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CEEI_SHIFT)) & DMA_CEEI_CEEI_MASK)
-#define DMA_CEEI_CAEE_MASK                       (0x40U)
-#define DMA_CEEI_CAEE_SHIFT                      (6U)
-#define DMA_CEEI_CAEE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CAEE_SHIFT)) & DMA_CEEI_CAEE_MASK)
-#define DMA_CEEI_NOP_MASK                        (0x80U)
-#define DMA_CEEI_NOP_SHIFT                       (7U)
-#define DMA_CEEI_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_NOP_SHIFT)) & DMA_CEEI_NOP_MASK)
+#define DMA_CEEI_CEEI_MASK  (0x1FU)
+#define DMA_CEEI_CEEI_SHIFT (0U)
+#define DMA_CEEI_CEEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CEEI_SHIFT)) & DMA_CEEI_CEEI_MASK)
+#define DMA_CEEI_CAEE_MASK  (0x40U)
+#define DMA_CEEI_CAEE_SHIFT (6U)
+#define DMA_CEEI_CAEE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_CAEE_SHIFT)) & DMA_CEEI_CAEE_MASK)
+#define DMA_CEEI_NOP_MASK   (0x80U)
+#define DMA_CEEI_NOP_SHIFT  (7U)
+#define DMA_CEEI_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CEEI_NOP_SHIFT)) & DMA_CEEI_NOP_MASK)
 /*! @} */
 
 /*! @name SEEI - Set Enable Error Interrupt Register */
 /*! @{ */
-#define DMA_SEEI_SEEI_MASK                       (0x1FU)
-#define DMA_SEEI_SEEI_SHIFT                      (0U)
-#define DMA_SEEI_SEEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SEEI_SHIFT)) & DMA_SEEI_SEEI_MASK)
-#define DMA_SEEI_SAEE_MASK                       (0x40U)
-#define DMA_SEEI_SAEE_SHIFT                      (6U)
-#define DMA_SEEI_SAEE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SAEE_SHIFT)) & DMA_SEEI_SAEE_MASK)
-#define DMA_SEEI_NOP_MASK                        (0x80U)
-#define DMA_SEEI_NOP_SHIFT                       (7U)
-#define DMA_SEEI_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_NOP_SHIFT)) & DMA_SEEI_NOP_MASK)
+#define DMA_SEEI_SEEI_MASK  (0x1FU)
+#define DMA_SEEI_SEEI_SHIFT (0U)
+#define DMA_SEEI_SEEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SEEI_SHIFT)) & DMA_SEEI_SEEI_MASK)
+#define DMA_SEEI_SAEE_MASK  (0x40U)
+#define DMA_SEEI_SAEE_SHIFT (6U)
+#define DMA_SEEI_SAEE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_SAEE_SHIFT)) & DMA_SEEI_SAEE_MASK)
+#define DMA_SEEI_NOP_MASK   (0x80U)
+#define DMA_SEEI_NOP_SHIFT  (7U)
+#define DMA_SEEI_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SEEI_NOP_SHIFT)) & DMA_SEEI_NOP_MASK)
 /*! @} */
 
 /*! @name CERQ - Clear Enable Request Register */
 /*! @{ */
-#define DMA_CERQ_CERQ_MASK                       (0x1FU)
-#define DMA_CERQ_CERQ_SHIFT                      (0U)
-#define DMA_CERQ_CERQ(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CERQ_SHIFT)) & DMA_CERQ_CERQ_MASK)
-#define DMA_CERQ_CAER_MASK                       (0x40U)
-#define DMA_CERQ_CAER_SHIFT                      (6U)
-#define DMA_CERQ_CAER(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CAER_SHIFT)) & DMA_CERQ_CAER_MASK)
-#define DMA_CERQ_NOP_MASK                        (0x80U)
-#define DMA_CERQ_NOP_SHIFT                       (7U)
-#define DMA_CERQ_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_NOP_SHIFT)) & DMA_CERQ_NOP_MASK)
+#define DMA_CERQ_CERQ_MASK  (0x1FU)
+#define DMA_CERQ_CERQ_SHIFT (0U)
+#define DMA_CERQ_CERQ(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CERQ_SHIFT)) & DMA_CERQ_CERQ_MASK)
+#define DMA_CERQ_CAER_MASK  (0x40U)
+#define DMA_CERQ_CAER_SHIFT (6U)
+#define DMA_CERQ_CAER(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_CAER_SHIFT)) & DMA_CERQ_CAER_MASK)
+#define DMA_CERQ_NOP_MASK   (0x80U)
+#define DMA_CERQ_NOP_SHIFT  (7U)
+#define DMA_CERQ_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CERQ_NOP_SHIFT)) & DMA_CERQ_NOP_MASK)
 /*! @} */
 
 /*! @name SERQ - Set Enable Request Register */
 /*! @{ */
-#define DMA_SERQ_SERQ_MASK                       (0x1FU)
-#define DMA_SERQ_SERQ_SHIFT                      (0U)
-#define DMA_SERQ_SERQ(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SERQ_SHIFT)) & DMA_SERQ_SERQ_MASK)
-#define DMA_SERQ_SAER_MASK                       (0x40U)
-#define DMA_SERQ_SAER_SHIFT                      (6U)
-#define DMA_SERQ_SAER(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SAER_SHIFT)) & DMA_SERQ_SAER_MASK)
-#define DMA_SERQ_NOP_MASK                        (0x80U)
-#define DMA_SERQ_NOP_SHIFT                       (7U)
-#define DMA_SERQ_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_NOP_SHIFT)) & DMA_SERQ_NOP_MASK)
+#define DMA_SERQ_SERQ_MASK  (0x1FU)
+#define DMA_SERQ_SERQ_SHIFT (0U)
+#define DMA_SERQ_SERQ(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SERQ_SHIFT)) & DMA_SERQ_SERQ_MASK)
+#define DMA_SERQ_SAER_MASK  (0x40U)
+#define DMA_SERQ_SAER_SHIFT (6U)
+#define DMA_SERQ_SAER(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_SAER_SHIFT)) & DMA_SERQ_SAER_MASK)
+#define DMA_SERQ_NOP_MASK   (0x80U)
+#define DMA_SERQ_NOP_SHIFT  (7U)
+#define DMA_SERQ_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SERQ_NOP_SHIFT)) & DMA_SERQ_NOP_MASK)
 /*! @} */
 
 /*! @name CDNE - Clear DONE Status Bit Register */
 /*! @{ */
-#define DMA_CDNE_CDNE_MASK                       (0x1FU)
-#define DMA_CDNE_CDNE_SHIFT                      (0U)
-#define DMA_CDNE_CDNE(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CDNE_SHIFT)) & DMA_CDNE_CDNE_MASK)
-#define DMA_CDNE_CADN_MASK                       (0x40U)
-#define DMA_CDNE_CADN_SHIFT                      (6U)
-#define DMA_CDNE_CADN(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CADN_SHIFT)) & DMA_CDNE_CADN_MASK)
-#define DMA_CDNE_NOP_MASK                        (0x80U)
-#define DMA_CDNE_NOP_SHIFT                       (7U)
-#define DMA_CDNE_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_NOP_SHIFT)) & DMA_CDNE_NOP_MASK)
+#define DMA_CDNE_CDNE_MASK  (0x1FU)
+#define DMA_CDNE_CDNE_SHIFT (0U)
+#define DMA_CDNE_CDNE(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CDNE_SHIFT)) & DMA_CDNE_CDNE_MASK)
+#define DMA_CDNE_CADN_MASK  (0x40U)
+#define DMA_CDNE_CADN_SHIFT (6U)
+#define DMA_CDNE_CADN(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_CADN_SHIFT)) & DMA_CDNE_CADN_MASK)
+#define DMA_CDNE_NOP_MASK   (0x80U)
+#define DMA_CDNE_NOP_SHIFT  (7U)
+#define DMA_CDNE_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CDNE_NOP_SHIFT)) & DMA_CDNE_NOP_MASK)
 /*! @} */
 
 /*! @name SSRT - Set START Bit Register */
 /*! @{ */
-#define DMA_SSRT_SSRT_MASK                       (0x1FU)
-#define DMA_SSRT_SSRT_SHIFT                      (0U)
-#define DMA_SSRT_SSRT(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SSRT_SHIFT)) & DMA_SSRT_SSRT_MASK)
-#define DMA_SSRT_SAST_MASK                       (0x40U)
-#define DMA_SSRT_SAST_SHIFT                      (6U)
-#define DMA_SSRT_SAST(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SAST_SHIFT)) & DMA_SSRT_SAST_MASK)
-#define DMA_SSRT_NOP_MASK                        (0x80U)
-#define DMA_SSRT_NOP_SHIFT                       (7U)
-#define DMA_SSRT_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_NOP_SHIFT)) & DMA_SSRT_NOP_MASK)
+#define DMA_SSRT_SSRT_MASK  (0x1FU)
+#define DMA_SSRT_SSRT_SHIFT (0U)
+#define DMA_SSRT_SSRT(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SSRT_SHIFT)) & DMA_SSRT_SSRT_MASK)
+#define DMA_SSRT_SAST_MASK  (0x40U)
+#define DMA_SSRT_SAST_SHIFT (6U)
+#define DMA_SSRT_SAST(x)    (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_SAST_SHIFT)) & DMA_SSRT_SAST_MASK)
+#define DMA_SSRT_NOP_MASK   (0x80U)
+#define DMA_SSRT_NOP_SHIFT  (7U)
+#define DMA_SSRT_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_SSRT_NOP_SHIFT)) & DMA_SSRT_NOP_MASK)
 /*! @} */
 
 /*! @name CERR - Clear Error Register */
 /*! @{ */
-#define DMA_CERR_CERR_MASK                       (0x1FU)
-#define DMA_CERR_CERR_SHIFT                      (0U)
-#define DMA_CERR_CERR(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CERR_SHIFT)) & DMA_CERR_CERR_MASK)
-#define DMA_CERR_CAEI_MASK                       (0x40U)
-#define DMA_CERR_CAEI_SHIFT                      (6U)
-#define DMA_CERR_CAEI(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CAEI_SHIFT)) & DMA_CERR_CAEI_MASK)
-#define DMA_CERR_NOP_MASK                        (0x80U)
-#define DMA_CERR_NOP_SHIFT                       (7U)
-#define DMA_CERR_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CERR_NOP_SHIFT)) & DMA_CERR_NOP_MASK)
+#define DMA_CERR_CERR_MASK  (0x1FU)
+#define DMA_CERR_CERR_SHIFT (0U)
+#define DMA_CERR_CERR(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CERR_SHIFT)) & DMA_CERR_CERR_MASK)
+#define DMA_CERR_CAEI_MASK  (0x40U)
+#define DMA_CERR_CAEI_SHIFT (6U)
+#define DMA_CERR_CAEI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CERR_CAEI_SHIFT)) & DMA_CERR_CAEI_MASK)
+#define DMA_CERR_NOP_MASK   (0x80U)
+#define DMA_CERR_NOP_SHIFT  (7U)
+#define DMA_CERR_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CERR_NOP_SHIFT)) & DMA_CERR_NOP_MASK)
 /*! @} */
 
 /*! @name CINT - Clear Interrupt Request Register */
 /*! @{ */
-#define DMA_CINT_CINT_MASK                       (0x1FU)
-#define DMA_CINT_CINT_SHIFT                      (0U)
-#define DMA_CINT_CINT(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CINT_SHIFT)) & DMA_CINT_CINT_MASK)
-#define DMA_CINT_CAIR_MASK                       (0x40U)
-#define DMA_CINT_CAIR_SHIFT                      (6U)
-#define DMA_CINT_CAIR(x)                         (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CAIR_SHIFT)) & DMA_CINT_CAIR_MASK)
-#define DMA_CINT_NOP_MASK                        (0x80U)
-#define DMA_CINT_NOP_SHIFT                       (7U)
-#define DMA_CINT_NOP(x)                          (((uint8_t)(((uint8_t)(x)) << DMA_CINT_NOP_SHIFT)) & DMA_CINT_NOP_MASK)
+#define DMA_CINT_CINT_MASK  (0x1FU)
+#define DMA_CINT_CINT_SHIFT (0U)
+#define DMA_CINT_CINT(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CINT_SHIFT)) & DMA_CINT_CINT_MASK)
+#define DMA_CINT_CAIR_MASK  (0x40U)
+#define DMA_CINT_CAIR_SHIFT (6U)
+#define DMA_CINT_CAIR(x)    (((uint8_t)(((uint8_t)(x)) << DMA_CINT_CAIR_SHIFT)) & DMA_CINT_CAIR_MASK)
+#define DMA_CINT_NOP_MASK   (0x80U)
+#define DMA_CINT_NOP_SHIFT  (7U)
+#define DMA_CINT_NOP(x)     (((uint8_t)(((uint8_t)(x)) << DMA_CINT_NOP_SHIFT)) & DMA_CINT_NOP_MASK)
 /*! @} */
 
 /*! @name INT - Interrupt Request Register */
 /*! @{ */
-#define DMA_INT_INT0_MASK                        (0x1U)
-#define DMA_INT_INT0_SHIFT                       (0U)
-#define DMA_INT_INT0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT0_SHIFT)) & DMA_INT_INT0_MASK)
-#define DMA_INT_INT1_MASK                        (0x2U)
-#define DMA_INT_INT1_SHIFT                       (1U)
-#define DMA_INT_INT1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT1_SHIFT)) & DMA_INT_INT1_MASK)
-#define DMA_INT_INT2_MASK                        (0x4U)
-#define DMA_INT_INT2_SHIFT                       (2U)
-#define DMA_INT_INT2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT2_SHIFT)) & DMA_INT_INT2_MASK)
-#define DMA_INT_INT3_MASK                        (0x8U)
-#define DMA_INT_INT3_SHIFT                       (3U)
-#define DMA_INT_INT3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT3_SHIFT)) & DMA_INT_INT3_MASK)
-#define DMA_INT_INT4_MASK                        (0x10U)
-#define DMA_INT_INT4_SHIFT                       (4U)
-#define DMA_INT_INT4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT4_SHIFT)) & DMA_INT_INT4_MASK)
-#define DMA_INT_INT5_MASK                        (0x20U)
-#define DMA_INT_INT5_SHIFT                       (5U)
-#define DMA_INT_INT5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT5_SHIFT)) & DMA_INT_INT5_MASK)
-#define DMA_INT_INT6_MASK                        (0x40U)
-#define DMA_INT_INT6_SHIFT                       (6U)
-#define DMA_INT_INT6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT6_SHIFT)) & DMA_INT_INT6_MASK)
-#define DMA_INT_INT7_MASK                        (0x80U)
-#define DMA_INT_INT7_SHIFT                       (7U)
-#define DMA_INT_INT7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT7_SHIFT)) & DMA_INT_INT7_MASK)
-#define DMA_INT_INT8_MASK                        (0x100U)
-#define DMA_INT_INT8_SHIFT                       (8U)
-#define DMA_INT_INT8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT8_SHIFT)) & DMA_INT_INT8_MASK)
-#define DMA_INT_INT9_MASK                        (0x200U)
-#define DMA_INT_INT9_SHIFT                       (9U)
-#define DMA_INT_INT9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT9_SHIFT)) & DMA_INT_INT9_MASK)
-#define DMA_INT_INT10_MASK                       (0x400U)
-#define DMA_INT_INT10_SHIFT                      (10U)
-#define DMA_INT_INT10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT10_SHIFT)) & DMA_INT_INT10_MASK)
-#define DMA_INT_INT11_MASK                       (0x800U)
-#define DMA_INT_INT11_SHIFT                      (11U)
-#define DMA_INT_INT11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT11_SHIFT)) & DMA_INT_INT11_MASK)
-#define DMA_INT_INT12_MASK                       (0x1000U)
-#define DMA_INT_INT12_SHIFT                      (12U)
-#define DMA_INT_INT12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT12_SHIFT)) & DMA_INT_INT12_MASK)
-#define DMA_INT_INT13_MASK                       (0x2000U)
-#define DMA_INT_INT13_SHIFT                      (13U)
-#define DMA_INT_INT13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT13_SHIFT)) & DMA_INT_INT13_MASK)
-#define DMA_INT_INT14_MASK                       (0x4000U)
-#define DMA_INT_INT14_SHIFT                      (14U)
-#define DMA_INT_INT14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT14_SHIFT)) & DMA_INT_INT14_MASK)
-#define DMA_INT_INT15_MASK                       (0x8000U)
-#define DMA_INT_INT15_SHIFT                      (15U)
-#define DMA_INT_INT15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT15_SHIFT)) & DMA_INT_INT15_MASK)
-#define DMA_INT_INT16_MASK                       (0x10000U)
-#define DMA_INT_INT16_SHIFT                      (16U)
-#define DMA_INT_INT16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT16_SHIFT)) & DMA_INT_INT16_MASK)
-#define DMA_INT_INT17_MASK                       (0x20000U)
-#define DMA_INT_INT17_SHIFT                      (17U)
-#define DMA_INT_INT17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT17_SHIFT)) & DMA_INT_INT17_MASK)
-#define DMA_INT_INT18_MASK                       (0x40000U)
-#define DMA_INT_INT18_SHIFT                      (18U)
-#define DMA_INT_INT18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT18_SHIFT)) & DMA_INT_INT18_MASK)
-#define DMA_INT_INT19_MASK                       (0x80000U)
-#define DMA_INT_INT19_SHIFT                      (19U)
-#define DMA_INT_INT19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
-#define DMA_INT_INT20_MASK                       (0x100000U)
-#define DMA_INT_INT20_SHIFT                      (20U)
-#define DMA_INT_INT20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
-#define DMA_INT_INT21_MASK                       (0x200000U)
-#define DMA_INT_INT21_SHIFT                      (21U)
-#define DMA_INT_INT21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT21_SHIFT)) & DMA_INT_INT21_MASK)
-#define DMA_INT_INT22_MASK                       (0x400000U)
-#define DMA_INT_INT22_SHIFT                      (22U)
-#define DMA_INT_INT22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT22_SHIFT)) & DMA_INT_INT22_MASK)
-#define DMA_INT_INT23_MASK                       (0x800000U)
-#define DMA_INT_INT23_SHIFT                      (23U)
-#define DMA_INT_INT23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT23_SHIFT)) & DMA_INT_INT23_MASK)
-#define DMA_INT_INT24_MASK                       (0x1000000U)
-#define DMA_INT_INT24_SHIFT                      (24U)
-#define DMA_INT_INT24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
-#define DMA_INT_INT25_MASK                       (0x2000000U)
-#define DMA_INT_INT25_SHIFT                      (25U)
-#define DMA_INT_INT25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT25_SHIFT)) & DMA_INT_INT25_MASK)
-#define DMA_INT_INT26_MASK                       (0x4000000U)
-#define DMA_INT_INT26_SHIFT                      (26U)
-#define DMA_INT_INT26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT26_SHIFT)) & DMA_INT_INT26_MASK)
-#define DMA_INT_INT27_MASK                       (0x8000000U)
-#define DMA_INT_INT27_SHIFT                      (27U)
-#define DMA_INT_INT27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT27_SHIFT)) & DMA_INT_INT27_MASK)
-#define DMA_INT_INT28_MASK                       (0x10000000U)
-#define DMA_INT_INT28_SHIFT                      (28U)
-#define DMA_INT_INT28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT28_SHIFT)) & DMA_INT_INT28_MASK)
-#define DMA_INT_INT29_MASK                       (0x20000000U)
-#define DMA_INT_INT29_SHIFT                      (29U)
-#define DMA_INT_INT29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT29_SHIFT)) & DMA_INT_INT29_MASK)
-#define DMA_INT_INT30_MASK                       (0x40000000U)
-#define DMA_INT_INT30_SHIFT                      (30U)
-#define DMA_INT_INT30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT30_SHIFT)) & DMA_INT_INT30_MASK)
-#define DMA_INT_INT31_MASK                       (0x80000000U)
-#define DMA_INT_INT31_SHIFT                      (31U)
-#define DMA_INT_INT31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT31_SHIFT)) & DMA_INT_INT31_MASK)
+#define DMA_INT_INT0_MASK   (0x1U)
+#define DMA_INT_INT0_SHIFT  (0U)
+#define DMA_INT_INT0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT0_SHIFT)) & DMA_INT_INT0_MASK)
+#define DMA_INT_INT1_MASK   (0x2U)
+#define DMA_INT_INT1_SHIFT  (1U)
+#define DMA_INT_INT1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT1_SHIFT)) & DMA_INT_INT1_MASK)
+#define DMA_INT_INT2_MASK   (0x4U)
+#define DMA_INT_INT2_SHIFT  (2U)
+#define DMA_INT_INT2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT2_SHIFT)) & DMA_INT_INT2_MASK)
+#define DMA_INT_INT3_MASK   (0x8U)
+#define DMA_INT_INT3_SHIFT  (3U)
+#define DMA_INT_INT3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT3_SHIFT)) & DMA_INT_INT3_MASK)
+#define DMA_INT_INT4_MASK   (0x10U)
+#define DMA_INT_INT4_SHIFT  (4U)
+#define DMA_INT_INT4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT4_SHIFT)) & DMA_INT_INT4_MASK)
+#define DMA_INT_INT5_MASK   (0x20U)
+#define DMA_INT_INT5_SHIFT  (5U)
+#define DMA_INT_INT5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT5_SHIFT)) & DMA_INT_INT5_MASK)
+#define DMA_INT_INT6_MASK   (0x40U)
+#define DMA_INT_INT6_SHIFT  (6U)
+#define DMA_INT_INT6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT6_SHIFT)) & DMA_INT_INT6_MASK)
+#define DMA_INT_INT7_MASK   (0x80U)
+#define DMA_INT_INT7_SHIFT  (7U)
+#define DMA_INT_INT7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT7_SHIFT)) & DMA_INT_INT7_MASK)
+#define DMA_INT_INT8_MASK   (0x100U)
+#define DMA_INT_INT8_SHIFT  (8U)
+#define DMA_INT_INT8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT8_SHIFT)) & DMA_INT_INT8_MASK)
+#define DMA_INT_INT9_MASK   (0x200U)
+#define DMA_INT_INT9_SHIFT  (9U)
+#define DMA_INT_INT9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT9_SHIFT)) & DMA_INT_INT9_MASK)
+#define DMA_INT_INT10_MASK  (0x400U)
+#define DMA_INT_INT10_SHIFT (10U)
+#define DMA_INT_INT10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT10_SHIFT)) & DMA_INT_INT10_MASK)
+#define DMA_INT_INT11_MASK  (0x800U)
+#define DMA_INT_INT11_SHIFT (11U)
+#define DMA_INT_INT11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT11_SHIFT)) & DMA_INT_INT11_MASK)
+#define DMA_INT_INT12_MASK  (0x1000U)
+#define DMA_INT_INT12_SHIFT (12U)
+#define DMA_INT_INT12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT12_SHIFT)) & DMA_INT_INT12_MASK)
+#define DMA_INT_INT13_MASK  (0x2000U)
+#define DMA_INT_INT13_SHIFT (13U)
+#define DMA_INT_INT13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT13_SHIFT)) & DMA_INT_INT13_MASK)
+#define DMA_INT_INT14_MASK  (0x4000U)
+#define DMA_INT_INT14_SHIFT (14U)
+#define DMA_INT_INT14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT14_SHIFT)) & DMA_INT_INT14_MASK)
+#define DMA_INT_INT15_MASK  (0x8000U)
+#define DMA_INT_INT15_SHIFT (15U)
+#define DMA_INT_INT15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT15_SHIFT)) & DMA_INT_INT15_MASK)
+#define DMA_INT_INT16_MASK  (0x10000U)
+#define DMA_INT_INT16_SHIFT (16U)
+#define DMA_INT_INT16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT16_SHIFT)) & DMA_INT_INT16_MASK)
+#define DMA_INT_INT17_MASK  (0x20000U)
+#define DMA_INT_INT17_SHIFT (17U)
+#define DMA_INT_INT17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT17_SHIFT)) & DMA_INT_INT17_MASK)
+#define DMA_INT_INT18_MASK  (0x40000U)
+#define DMA_INT_INT18_SHIFT (18U)
+#define DMA_INT_INT18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT18_SHIFT)) & DMA_INT_INT18_MASK)
+#define DMA_INT_INT19_MASK  (0x80000U)
+#define DMA_INT_INT19_SHIFT (19U)
+#define DMA_INT_INT19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
+#define DMA_INT_INT20_MASK  (0x100000U)
+#define DMA_INT_INT20_SHIFT (20U)
+#define DMA_INT_INT20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT20_SHIFT)) & DMA_INT_INT20_MASK)
+#define DMA_INT_INT21_MASK  (0x200000U)
+#define DMA_INT_INT21_SHIFT (21U)
+#define DMA_INT_INT21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT21_SHIFT)) & DMA_INT_INT21_MASK)
+#define DMA_INT_INT22_MASK  (0x400000U)
+#define DMA_INT_INT22_SHIFT (22U)
+#define DMA_INT_INT22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT22_SHIFT)) & DMA_INT_INT22_MASK)
+#define DMA_INT_INT23_MASK  (0x800000U)
+#define DMA_INT_INT23_SHIFT (23U)
+#define DMA_INT_INT23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT23_SHIFT)) & DMA_INT_INT23_MASK)
+#define DMA_INT_INT24_MASK  (0x1000000U)
+#define DMA_INT_INT24_SHIFT (24U)
+#define DMA_INT_INT24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT24_SHIFT)) & DMA_INT_INT24_MASK)
+#define DMA_INT_INT25_MASK  (0x2000000U)
+#define DMA_INT_INT25_SHIFT (25U)
+#define DMA_INT_INT25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT25_SHIFT)) & DMA_INT_INT25_MASK)
+#define DMA_INT_INT26_MASK  (0x4000000U)
+#define DMA_INT_INT26_SHIFT (26U)
+#define DMA_INT_INT26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT26_SHIFT)) & DMA_INT_INT26_MASK)
+#define DMA_INT_INT27_MASK  (0x8000000U)
+#define DMA_INT_INT27_SHIFT (27U)
+#define DMA_INT_INT27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT27_SHIFT)) & DMA_INT_INT27_MASK)
+#define DMA_INT_INT28_MASK  (0x10000000U)
+#define DMA_INT_INT28_SHIFT (28U)
+#define DMA_INT_INT28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT28_SHIFT)) & DMA_INT_INT28_MASK)
+#define DMA_INT_INT29_MASK  (0x20000000U)
+#define DMA_INT_INT29_SHIFT (29U)
+#define DMA_INT_INT29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT29_SHIFT)) & DMA_INT_INT29_MASK)
+#define DMA_INT_INT30_MASK  (0x40000000U)
+#define DMA_INT_INT30_SHIFT (30U)
+#define DMA_INT_INT30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT30_SHIFT)) & DMA_INT_INT30_MASK)
+#define DMA_INT_INT31_MASK  (0x80000000U)
+#define DMA_INT_INT31_SHIFT (31U)
+#define DMA_INT_INT31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT31_SHIFT)) & DMA_INT_INT31_MASK)
 /*! @} */
 
 /*! @name ERR - Error Register */
 /*! @{ */
-#define DMA_ERR_ERR0_MASK                        (0x1U)
-#define DMA_ERR_ERR0_SHIFT                       (0U)
-#define DMA_ERR_ERR0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR0_SHIFT)) & DMA_ERR_ERR0_MASK)
-#define DMA_ERR_ERR1_MASK                        (0x2U)
-#define DMA_ERR_ERR1_SHIFT                       (1U)
-#define DMA_ERR_ERR1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR1_SHIFT)) & DMA_ERR_ERR1_MASK)
-#define DMA_ERR_ERR2_MASK                        (0x4U)
-#define DMA_ERR_ERR2_SHIFT                       (2U)
-#define DMA_ERR_ERR2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR2_SHIFT)) & DMA_ERR_ERR2_MASK)
-#define DMA_ERR_ERR3_MASK                        (0x8U)
-#define DMA_ERR_ERR3_SHIFT                       (3U)
-#define DMA_ERR_ERR3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR3_SHIFT)) & DMA_ERR_ERR3_MASK)
-#define DMA_ERR_ERR4_MASK                        (0x10U)
-#define DMA_ERR_ERR4_SHIFT                       (4U)
-#define DMA_ERR_ERR4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR4_SHIFT)) & DMA_ERR_ERR4_MASK)
-#define DMA_ERR_ERR5_MASK                        (0x20U)
-#define DMA_ERR_ERR5_SHIFT                       (5U)
-#define DMA_ERR_ERR5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR5_SHIFT)) & DMA_ERR_ERR5_MASK)
-#define DMA_ERR_ERR6_MASK                        (0x40U)
-#define DMA_ERR_ERR6_SHIFT                       (6U)
-#define DMA_ERR_ERR6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR6_SHIFT)) & DMA_ERR_ERR6_MASK)
-#define DMA_ERR_ERR7_MASK                        (0x80U)
-#define DMA_ERR_ERR7_SHIFT                       (7U)
-#define DMA_ERR_ERR7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR7_SHIFT)) & DMA_ERR_ERR7_MASK)
-#define DMA_ERR_ERR8_MASK                        (0x100U)
-#define DMA_ERR_ERR8_SHIFT                       (8U)
-#define DMA_ERR_ERR8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR8_SHIFT)) & DMA_ERR_ERR8_MASK)
-#define DMA_ERR_ERR9_MASK                        (0x200U)
-#define DMA_ERR_ERR9_SHIFT                       (9U)
-#define DMA_ERR_ERR9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR9_SHIFT)) & DMA_ERR_ERR9_MASK)
-#define DMA_ERR_ERR10_MASK                       (0x400U)
-#define DMA_ERR_ERR10_SHIFT                      (10U)
-#define DMA_ERR_ERR10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR10_SHIFT)) & DMA_ERR_ERR10_MASK)
-#define DMA_ERR_ERR11_MASK                       (0x800U)
-#define DMA_ERR_ERR11_SHIFT                      (11U)
-#define DMA_ERR_ERR11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR11_SHIFT)) & DMA_ERR_ERR11_MASK)
-#define DMA_ERR_ERR12_MASK                       (0x1000U)
-#define DMA_ERR_ERR12_SHIFT                      (12U)
-#define DMA_ERR_ERR12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR12_SHIFT)) & DMA_ERR_ERR12_MASK)
-#define DMA_ERR_ERR13_MASK                       (0x2000U)
-#define DMA_ERR_ERR13_SHIFT                      (13U)
-#define DMA_ERR_ERR13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR13_SHIFT)) & DMA_ERR_ERR13_MASK)
-#define DMA_ERR_ERR14_MASK                       (0x4000U)
-#define DMA_ERR_ERR14_SHIFT                      (14U)
-#define DMA_ERR_ERR14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR14_SHIFT)) & DMA_ERR_ERR14_MASK)
-#define DMA_ERR_ERR15_MASK                       (0x8000U)
-#define DMA_ERR_ERR15_SHIFT                      (15U)
-#define DMA_ERR_ERR15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR15_SHIFT)) & DMA_ERR_ERR15_MASK)
-#define DMA_ERR_ERR16_MASK                       (0x10000U)
-#define DMA_ERR_ERR16_SHIFT                      (16U)
-#define DMA_ERR_ERR16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR16_SHIFT)) & DMA_ERR_ERR16_MASK)
-#define DMA_ERR_ERR17_MASK                       (0x20000U)
-#define DMA_ERR_ERR17_SHIFT                      (17U)
-#define DMA_ERR_ERR17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR17_SHIFT)) & DMA_ERR_ERR17_MASK)
-#define DMA_ERR_ERR18_MASK                       (0x40000U)
-#define DMA_ERR_ERR18_SHIFT                      (18U)
-#define DMA_ERR_ERR18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR18_SHIFT)) & DMA_ERR_ERR18_MASK)
-#define DMA_ERR_ERR19_MASK                       (0x80000U)
-#define DMA_ERR_ERR19_SHIFT                      (19U)
-#define DMA_ERR_ERR19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR19_SHIFT)) & DMA_ERR_ERR19_MASK)
-#define DMA_ERR_ERR20_MASK                       (0x100000U)
-#define DMA_ERR_ERR20_SHIFT                      (20U)
-#define DMA_ERR_ERR20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR20_SHIFT)) & DMA_ERR_ERR20_MASK)
-#define DMA_ERR_ERR21_MASK                       (0x200000U)
-#define DMA_ERR_ERR21_SHIFT                      (21U)
-#define DMA_ERR_ERR21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR21_SHIFT)) & DMA_ERR_ERR21_MASK)
-#define DMA_ERR_ERR22_MASK                       (0x400000U)
-#define DMA_ERR_ERR22_SHIFT                      (22U)
-#define DMA_ERR_ERR22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR22_SHIFT)) & DMA_ERR_ERR22_MASK)
-#define DMA_ERR_ERR23_MASK                       (0x800000U)
-#define DMA_ERR_ERR23_SHIFT                      (23U)
-#define DMA_ERR_ERR23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR23_SHIFT)) & DMA_ERR_ERR23_MASK)
-#define DMA_ERR_ERR24_MASK                       (0x1000000U)
-#define DMA_ERR_ERR24_SHIFT                      (24U)
-#define DMA_ERR_ERR24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR24_SHIFT)) & DMA_ERR_ERR24_MASK)
-#define DMA_ERR_ERR25_MASK                       (0x2000000U)
-#define DMA_ERR_ERR25_SHIFT                      (25U)
-#define DMA_ERR_ERR25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR25_SHIFT)) & DMA_ERR_ERR25_MASK)
-#define DMA_ERR_ERR26_MASK                       (0x4000000U)
-#define DMA_ERR_ERR26_SHIFT                      (26U)
-#define DMA_ERR_ERR26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR26_SHIFT)) & DMA_ERR_ERR26_MASK)
-#define DMA_ERR_ERR27_MASK                       (0x8000000U)
-#define DMA_ERR_ERR27_SHIFT                      (27U)
-#define DMA_ERR_ERR27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR27_SHIFT)) & DMA_ERR_ERR27_MASK)
-#define DMA_ERR_ERR28_MASK                       (0x10000000U)
-#define DMA_ERR_ERR28_SHIFT                      (28U)
-#define DMA_ERR_ERR28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR28_SHIFT)) & DMA_ERR_ERR28_MASK)
-#define DMA_ERR_ERR29_MASK                       (0x20000000U)
-#define DMA_ERR_ERR29_SHIFT                      (29U)
-#define DMA_ERR_ERR29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR29_SHIFT)) & DMA_ERR_ERR29_MASK)
-#define DMA_ERR_ERR30_MASK                       (0x40000000U)
-#define DMA_ERR_ERR30_SHIFT                      (30U)
-#define DMA_ERR_ERR30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR30_SHIFT)) & DMA_ERR_ERR30_MASK)
-#define DMA_ERR_ERR31_MASK                       (0x80000000U)
-#define DMA_ERR_ERR31_SHIFT                      (31U)
-#define DMA_ERR_ERR31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR31_SHIFT)) & DMA_ERR_ERR31_MASK)
+#define DMA_ERR_ERR0_MASK   (0x1U)
+#define DMA_ERR_ERR0_SHIFT  (0U)
+#define DMA_ERR_ERR0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR0_SHIFT)) & DMA_ERR_ERR0_MASK)
+#define DMA_ERR_ERR1_MASK   (0x2U)
+#define DMA_ERR_ERR1_SHIFT  (1U)
+#define DMA_ERR_ERR1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR1_SHIFT)) & DMA_ERR_ERR1_MASK)
+#define DMA_ERR_ERR2_MASK   (0x4U)
+#define DMA_ERR_ERR2_SHIFT  (2U)
+#define DMA_ERR_ERR2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR2_SHIFT)) & DMA_ERR_ERR2_MASK)
+#define DMA_ERR_ERR3_MASK   (0x8U)
+#define DMA_ERR_ERR3_SHIFT  (3U)
+#define DMA_ERR_ERR3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR3_SHIFT)) & DMA_ERR_ERR3_MASK)
+#define DMA_ERR_ERR4_MASK   (0x10U)
+#define DMA_ERR_ERR4_SHIFT  (4U)
+#define DMA_ERR_ERR4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR4_SHIFT)) & DMA_ERR_ERR4_MASK)
+#define DMA_ERR_ERR5_MASK   (0x20U)
+#define DMA_ERR_ERR5_SHIFT  (5U)
+#define DMA_ERR_ERR5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR5_SHIFT)) & DMA_ERR_ERR5_MASK)
+#define DMA_ERR_ERR6_MASK   (0x40U)
+#define DMA_ERR_ERR6_SHIFT  (6U)
+#define DMA_ERR_ERR6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR6_SHIFT)) & DMA_ERR_ERR6_MASK)
+#define DMA_ERR_ERR7_MASK   (0x80U)
+#define DMA_ERR_ERR7_SHIFT  (7U)
+#define DMA_ERR_ERR7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR7_SHIFT)) & DMA_ERR_ERR7_MASK)
+#define DMA_ERR_ERR8_MASK   (0x100U)
+#define DMA_ERR_ERR8_SHIFT  (8U)
+#define DMA_ERR_ERR8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR8_SHIFT)) & DMA_ERR_ERR8_MASK)
+#define DMA_ERR_ERR9_MASK   (0x200U)
+#define DMA_ERR_ERR9_SHIFT  (9U)
+#define DMA_ERR_ERR9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR9_SHIFT)) & DMA_ERR_ERR9_MASK)
+#define DMA_ERR_ERR10_MASK  (0x400U)
+#define DMA_ERR_ERR10_SHIFT (10U)
+#define DMA_ERR_ERR10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR10_SHIFT)) & DMA_ERR_ERR10_MASK)
+#define DMA_ERR_ERR11_MASK  (0x800U)
+#define DMA_ERR_ERR11_SHIFT (11U)
+#define DMA_ERR_ERR11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR11_SHIFT)) & DMA_ERR_ERR11_MASK)
+#define DMA_ERR_ERR12_MASK  (0x1000U)
+#define DMA_ERR_ERR12_SHIFT (12U)
+#define DMA_ERR_ERR12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR12_SHIFT)) & DMA_ERR_ERR12_MASK)
+#define DMA_ERR_ERR13_MASK  (0x2000U)
+#define DMA_ERR_ERR13_SHIFT (13U)
+#define DMA_ERR_ERR13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR13_SHIFT)) & DMA_ERR_ERR13_MASK)
+#define DMA_ERR_ERR14_MASK  (0x4000U)
+#define DMA_ERR_ERR14_SHIFT (14U)
+#define DMA_ERR_ERR14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR14_SHIFT)) & DMA_ERR_ERR14_MASK)
+#define DMA_ERR_ERR15_MASK  (0x8000U)
+#define DMA_ERR_ERR15_SHIFT (15U)
+#define DMA_ERR_ERR15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR15_SHIFT)) & DMA_ERR_ERR15_MASK)
+#define DMA_ERR_ERR16_MASK  (0x10000U)
+#define DMA_ERR_ERR16_SHIFT (16U)
+#define DMA_ERR_ERR16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR16_SHIFT)) & DMA_ERR_ERR16_MASK)
+#define DMA_ERR_ERR17_MASK  (0x20000U)
+#define DMA_ERR_ERR17_SHIFT (17U)
+#define DMA_ERR_ERR17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR17_SHIFT)) & DMA_ERR_ERR17_MASK)
+#define DMA_ERR_ERR18_MASK  (0x40000U)
+#define DMA_ERR_ERR18_SHIFT (18U)
+#define DMA_ERR_ERR18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR18_SHIFT)) & DMA_ERR_ERR18_MASK)
+#define DMA_ERR_ERR19_MASK  (0x80000U)
+#define DMA_ERR_ERR19_SHIFT (19U)
+#define DMA_ERR_ERR19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR19_SHIFT)) & DMA_ERR_ERR19_MASK)
+#define DMA_ERR_ERR20_MASK  (0x100000U)
+#define DMA_ERR_ERR20_SHIFT (20U)
+#define DMA_ERR_ERR20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR20_SHIFT)) & DMA_ERR_ERR20_MASK)
+#define DMA_ERR_ERR21_MASK  (0x200000U)
+#define DMA_ERR_ERR21_SHIFT (21U)
+#define DMA_ERR_ERR21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR21_SHIFT)) & DMA_ERR_ERR21_MASK)
+#define DMA_ERR_ERR22_MASK  (0x400000U)
+#define DMA_ERR_ERR22_SHIFT (22U)
+#define DMA_ERR_ERR22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR22_SHIFT)) & DMA_ERR_ERR22_MASK)
+#define DMA_ERR_ERR23_MASK  (0x800000U)
+#define DMA_ERR_ERR23_SHIFT (23U)
+#define DMA_ERR_ERR23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR23_SHIFT)) & DMA_ERR_ERR23_MASK)
+#define DMA_ERR_ERR24_MASK  (0x1000000U)
+#define DMA_ERR_ERR24_SHIFT (24U)
+#define DMA_ERR_ERR24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR24_SHIFT)) & DMA_ERR_ERR24_MASK)
+#define DMA_ERR_ERR25_MASK  (0x2000000U)
+#define DMA_ERR_ERR25_SHIFT (25U)
+#define DMA_ERR_ERR25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR25_SHIFT)) & DMA_ERR_ERR25_MASK)
+#define DMA_ERR_ERR26_MASK  (0x4000000U)
+#define DMA_ERR_ERR26_SHIFT (26U)
+#define DMA_ERR_ERR26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR26_SHIFT)) & DMA_ERR_ERR26_MASK)
+#define DMA_ERR_ERR27_MASK  (0x8000000U)
+#define DMA_ERR_ERR27_SHIFT (27U)
+#define DMA_ERR_ERR27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR27_SHIFT)) & DMA_ERR_ERR27_MASK)
+#define DMA_ERR_ERR28_MASK  (0x10000000U)
+#define DMA_ERR_ERR28_SHIFT (28U)
+#define DMA_ERR_ERR28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR28_SHIFT)) & DMA_ERR_ERR28_MASK)
+#define DMA_ERR_ERR29_MASK  (0x20000000U)
+#define DMA_ERR_ERR29_SHIFT (29U)
+#define DMA_ERR_ERR29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR29_SHIFT)) & DMA_ERR_ERR29_MASK)
+#define DMA_ERR_ERR30_MASK  (0x40000000U)
+#define DMA_ERR_ERR30_SHIFT (30U)
+#define DMA_ERR_ERR30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR30_SHIFT)) & DMA_ERR_ERR30_MASK)
+#define DMA_ERR_ERR31_MASK  (0x80000000U)
+#define DMA_ERR_ERR31_SHIFT (31U)
+#define DMA_ERR_ERR31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_ERR_ERR31_SHIFT)) & DMA_ERR_ERR31_MASK)
 /*! @} */
 
 /*! @name HRS - Hardware Request Status Register */
 /*! @{ */
-#define DMA_HRS_HRS0_MASK                        (0x1U)
-#define DMA_HRS_HRS0_SHIFT                       (0U)
-#define DMA_HRS_HRS0(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS0_SHIFT)) & DMA_HRS_HRS0_MASK)
-#define DMA_HRS_HRS1_MASK                        (0x2U)
-#define DMA_HRS_HRS1_SHIFT                       (1U)
-#define DMA_HRS_HRS1(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS1_SHIFT)) & DMA_HRS_HRS1_MASK)
-#define DMA_HRS_HRS2_MASK                        (0x4U)
-#define DMA_HRS_HRS2_SHIFT                       (2U)
-#define DMA_HRS_HRS2(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS2_SHIFT)) & DMA_HRS_HRS2_MASK)
-#define DMA_HRS_HRS3_MASK                        (0x8U)
-#define DMA_HRS_HRS3_SHIFT                       (3U)
-#define DMA_HRS_HRS3(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS3_SHIFT)) & DMA_HRS_HRS3_MASK)
-#define DMA_HRS_HRS4_MASK                        (0x10U)
-#define DMA_HRS_HRS4_SHIFT                       (4U)
-#define DMA_HRS_HRS4(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS4_SHIFT)) & DMA_HRS_HRS4_MASK)
-#define DMA_HRS_HRS5_MASK                        (0x20U)
-#define DMA_HRS_HRS5_SHIFT                       (5U)
-#define DMA_HRS_HRS5(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS5_SHIFT)) & DMA_HRS_HRS5_MASK)
-#define DMA_HRS_HRS6_MASK                        (0x40U)
-#define DMA_HRS_HRS6_SHIFT                       (6U)
-#define DMA_HRS_HRS6(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS6_SHIFT)) & DMA_HRS_HRS6_MASK)
-#define DMA_HRS_HRS7_MASK                        (0x80U)
-#define DMA_HRS_HRS7_SHIFT                       (7U)
-#define DMA_HRS_HRS7(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS7_SHIFT)) & DMA_HRS_HRS7_MASK)
-#define DMA_HRS_HRS8_MASK                        (0x100U)
-#define DMA_HRS_HRS8_SHIFT                       (8U)
-#define DMA_HRS_HRS8(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS8_SHIFT)) & DMA_HRS_HRS8_MASK)
-#define DMA_HRS_HRS9_MASK                        (0x200U)
-#define DMA_HRS_HRS9_SHIFT                       (9U)
-#define DMA_HRS_HRS9(x)                          (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS9_SHIFT)) & DMA_HRS_HRS9_MASK)
-#define DMA_HRS_HRS10_MASK                       (0x400U)
-#define DMA_HRS_HRS10_SHIFT                      (10U)
-#define DMA_HRS_HRS10(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS10_SHIFT)) & DMA_HRS_HRS10_MASK)
-#define DMA_HRS_HRS11_MASK                       (0x800U)
-#define DMA_HRS_HRS11_SHIFT                      (11U)
-#define DMA_HRS_HRS11(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS11_SHIFT)) & DMA_HRS_HRS11_MASK)
-#define DMA_HRS_HRS12_MASK                       (0x1000U)
-#define DMA_HRS_HRS12_SHIFT                      (12U)
-#define DMA_HRS_HRS12(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS12_SHIFT)) & DMA_HRS_HRS12_MASK)
-#define DMA_HRS_HRS13_MASK                       (0x2000U)
-#define DMA_HRS_HRS13_SHIFT                      (13U)
-#define DMA_HRS_HRS13(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS13_SHIFT)) & DMA_HRS_HRS13_MASK)
-#define DMA_HRS_HRS14_MASK                       (0x4000U)
-#define DMA_HRS_HRS14_SHIFT                      (14U)
-#define DMA_HRS_HRS14(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS14_SHIFT)) & DMA_HRS_HRS14_MASK)
-#define DMA_HRS_HRS15_MASK                       (0x8000U)
-#define DMA_HRS_HRS15_SHIFT                      (15U)
-#define DMA_HRS_HRS15(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS15_SHIFT)) & DMA_HRS_HRS15_MASK)
-#define DMA_HRS_HRS16_MASK                       (0x10000U)
-#define DMA_HRS_HRS16_SHIFT                      (16U)
-#define DMA_HRS_HRS16(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS16_SHIFT)) & DMA_HRS_HRS16_MASK)
-#define DMA_HRS_HRS17_MASK                       (0x20000U)
-#define DMA_HRS_HRS17_SHIFT                      (17U)
-#define DMA_HRS_HRS17(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS17_SHIFT)) & DMA_HRS_HRS17_MASK)
-#define DMA_HRS_HRS18_MASK                       (0x40000U)
-#define DMA_HRS_HRS18_SHIFT                      (18U)
-#define DMA_HRS_HRS18(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS18_SHIFT)) & DMA_HRS_HRS18_MASK)
-#define DMA_HRS_HRS19_MASK                       (0x80000U)
-#define DMA_HRS_HRS19_SHIFT                      (19U)
-#define DMA_HRS_HRS19(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS19_SHIFT)) & DMA_HRS_HRS19_MASK)
-#define DMA_HRS_HRS20_MASK                       (0x100000U)
-#define DMA_HRS_HRS20_SHIFT                      (20U)
-#define DMA_HRS_HRS20(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS20_SHIFT)) & DMA_HRS_HRS20_MASK)
-#define DMA_HRS_HRS21_MASK                       (0x200000U)
-#define DMA_HRS_HRS21_SHIFT                      (21U)
-#define DMA_HRS_HRS21(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS21_SHIFT)) & DMA_HRS_HRS21_MASK)
-#define DMA_HRS_HRS22_MASK                       (0x400000U)
-#define DMA_HRS_HRS22_SHIFT                      (22U)
-#define DMA_HRS_HRS22(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS22_SHIFT)) & DMA_HRS_HRS22_MASK)
-#define DMA_HRS_HRS23_MASK                       (0x800000U)
-#define DMA_HRS_HRS23_SHIFT                      (23U)
-#define DMA_HRS_HRS23(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS23_SHIFT)) & DMA_HRS_HRS23_MASK)
-#define DMA_HRS_HRS24_MASK                       (0x1000000U)
-#define DMA_HRS_HRS24_SHIFT                      (24U)
-#define DMA_HRS_HRS24(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS24_SHIFT)) & DMA_HRS_HRS24_MASK)
-#define DMA_HRS_HRS25_MASK                       (0x2000000U)
-#define DMA_HRS_HRS25_SHIFT                      (25U)
-#define DMA_HRS_HRS25(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS25_SHIFT)) & DMA_HRS_HRS25_MASK)
-#define DMA_HRS_HRS26_MASK                       (0x4000000U)
-#define DMA_HRS_HRS26_SHIFT                      (26U)
-#define DMA_HRS_HRS26(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS26_SHIFT)) & DMA_HRS_HRS26_MASK)
-#define DMA_HRS_HRS27_MASK                       (0x8000000U)
-#define DMA_HRS_HRS27_SHIFT                      (27U)
-#define DMA_HRS_HRS27(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS27_SHIFT)) & DMA_HRS_HRS27_MASK)
-#define DMA_HRS_HRS28_MASK                       (0x10000000U)
-#define DMA_HRS_HRS28_SHIFT                      (28U)
-#define DMA_HRS_HRS28(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS28_SHIFT)) & DMA_HRS_HRS28_MASK)
-#define DMA_HRS_HRS29_MASK                       (0x20000000U)
-#define DMA_HRS_HRS29_SHIFT                      (29U)
-#define DMA_HRS_HRS29(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS29_SHIFT)) & DMA_HRS_HRS29_MASK)
-#define DMA_HRS_HRS30_MASK                       (0x40000000U)
-#define DMA_HRS_HRS30_SHIFT                      (30U)
-#define DMA_HRS_HRS30(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS30_SHIFT)) & DMA_HRS_HRS30_MASK)
-#define DMA_HRS_HRS31_MASK                       (0x80000000U)
-#define DMA_HRS_HRS31_SHIFT                      (31U)
-#define DMA_HRS_HRS31(x)                         (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS31_SHIFT)) & DMA_HRS_HRS31_MASK)
+#define DMA_HRS_HRS0_MASK   (0x1U)
+#define DMA_HRS_HRS0_SHIFT  (0U)
+#define DMA_HRS_HRS0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS0_SHIFT)) & DMA_HRS_HRS0_MASK)
+#define DMA_HRS_HRS1_MASK   (0x2U)
+#define DMA_HRS_HRS1_SHIFT  (1U)
+#define DMA_HRS_HRS1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS1_SHIFT)) & DMA_HRS_HRS1_MASK)
+#define DMA_HRS_HRS2_MASK   (0x4U)
+#define DMA_HRS_HRS2_SHIFT  (2U)
+#define DMA_HRS_HRS2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS2_SHIFT)) & DMA_HRS_HRS2_MASK)
+#define DMA_HRS_HRS3_MASK   (0x8U)
+#define DMA_HRS_HRS3_SHIFT  (3U)
+#define DMA_HRS_HRS3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS3_SHIFT)) & DMA_HRS_HRS3_MASK)
+#define DMA_HRS_HRS4_MASK   (0x10U)
+#define DMA_HRS_HRS4_SHIFT  (4U)
+#define DMA_HRS_HRS4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS4_SHIFT)) & DMA_HRS_HRS4_MASK)
+#define DMA_HRS_HRS5_MASK   (0x20U)
+#define DMA_HRS_HRS5_SHIFT  (5U)
+#define DMA_HRS_HRS5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS5_SHIFT)) & DMA_HRS_HRS5_MASK)
+#define DMA_HRS_HRS6_MASK   (0x40U)
+#define DMA_HRS_HRS6_SHIFT  (6U)
+#define DMA_HRS_HRS6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS6_SHIFT)) & DMA_HRS_HRS6_MASK)
+#define DMA_HRS_HRS7_MASK   (0x80U)
+#define DMA_HRS_HRS7_SHIFT  (7U)
+#define DMA_HRS_HRS7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS7_SHIFT)) & DMA_HRS_HRS7_MASK)
+#define DMA_HRS_HRS8_MASK   (0x100U)
+#define DMA_HRS_HRS8_SHIFT  (8U)
+#define DMA_HRS_HRS8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS8_SHIFT)) & DMA_HRS_HRS8_MASK)
+#define DMA_HRS_HRS9_MASK   (0x200U)
+#define DMA_HRS_HRS9_SHIFT  (9U)
+#define DMA_HRS_HRS9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS9_SHIFT)) & DMA_HRS_HRS9_MASK)
+#define DMA_HRS_HRS10_MASK  (0x400U)
+#define DMA_HRS_HRS10_SHIFT (10U)
+#define DMA_HRS_HRS10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS10_SHIFT)) & DMA_HRS_HRS10_MASK)
+#define DMA_HRS_HRS11_MASK  (0x800U)
+#define DMA_HRS_HRS11_SHIFT (11U)
+#define DMA_HRS_HRS11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS11_SHIFT)) & DMA_HRS_HRS11_MASK)
+#define DMA_HRS_HRS12_MASK  (0x1000U)
+#define DMA_HRS_HRS12_SHIFT (12U)
+#define DMA_HRS_HRS12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS12_SHIFT)) & DMA_HRS_HRS12_MASK)
+#define DMA_HRS_HRS13_MASK  (0x2000U)
+#define DMA_HRS_HRS13_SHIFT (13U)
+#define DMA_HRS_HRS13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS13_SHIFT)) & DMA_HRS_HRS13_MASK)
+#define DMA_HRS_HRS14_MASK  (0x4000U)
+#define DMA_HRS_HRS14_SHIFT (14U)
+#define DMA_HRS_HRS14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS14_SHIFT)) & DMA_HRS_HRS14_MASK)
+#define DMA_HRS_HRS15_MASK  (0x8000U)
+#define DMA_HRS_HRS15_SHIFT (15U)
+#define DMA_HRS_HRS15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS15_SHIFT)) & DMA_HRS_HRS15_MASK)
+#define DMA_HRS_HRS16_MASK  (0x10000U)
+#define DMA_HRS_HRS16_SHIFT (16U)
+#define DMA_HRS_HRS16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS16_SHIFT)) & DMA_HRS_HRS16_MASK)
+#define DMA_HRS_HRS17_MASK  (0x20000U)
+#define DMA_HRS_HRS17_SHIFT (17U)
+#define DMA_HRS_HRS17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS17_SHIFT)) & DMA_HRS_HRS17_MASK)
+#define DMA_HRS_HRS18_MASK  (0x40000U)
+#define DMA_HRS_HRS18_SHIFT (18U)
+#define DMA_HRS_HRS18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS18_SHIFT)) & DMA_HRS_HRS18_MASK)
+#define DMA_HRS_HRS19_MASK  (0x80000U)
+#define DMA_HRS_HRS19_SHIFT (19U)
+#define DMA_HRS_HRS19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS19_SHIFT)) & DMA_HRS_HRS19_MASK)
+#define DMA_HRS_HRS20_MASK  (0x100000U)
+#define DMA_HRS_HRS20_SHIFT (20U)
+#define DMA_HRS_HRS20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS20_SHIFT)) & DMA_HRS_HRS20_MASK)
+#define DMA_HRS_HRS21_MASK  (0x200000U)
+#define DMA_HRS_HRS21_SHIFT (21U)
+#define DMA_HRS_HRS21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS21_SHIFT)) & DMA_HRS_HRS21_MASK)
+#define DMA_HRS_HRS22_MASK  (0x400000U)
+#define DMA_HRS_HRS22_SHIFT (22U)
+#define DMA_HRS_HRS22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS22_SHIFT)) & DMA_HRS_HRS22_MASK)
+#define DMA_HRS_HRS23_MASK  (0x800000U)
+#define DMA_HRS_HRS23_SHIFT (23U)
+#define DMA_HRS_HRS23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS23_SHIFT)) & DMA_HRS_HRS23_MASK)
+#define DMA_HRS_HRS24_MASK  (0x1000000U)
+#define DMA_HRS_HRS24_SHIFT (24U)
+#define DMA_HRS_HRS24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS24_SHIFT)) & DMA_HRS_HRS24_MASK)
+#define DMA_HRS_HRS25_MASK  (0x2000000U)
+#define DMA_HRS_HRS25_SHIFT (25U)
+#define DMA_HRS_HRS25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS25_SHIFT)) & DMA_HRS_HRS25_MASK)
+#define DMA_HRS_HRS26_MASK  (0x4000000U)
+#define DMA_HRS_HRS26_SHIFT (26U)
+#define DMA_HRS_HRS26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS26_SHIFT)) & DMA_HRS_HRS26_MASK)
+#define DMA_HRS_HRS27_MASK  (0x8000000U)
+#define DMA_HRS_HRS27_SHIFT (27U)
+#define DMA_HRS_HRS27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS27_SHIFT)) & DMA_HRS_HRS27_MASK)
+#define DMA_HRS_HRS28_MASK  (0x10000000U)
+#define DMA_HRS_HRS28_SHIFT (28U)
+#define DMA_HRS_HRS28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS28_SHIFT)) & DMA_HRS_HRS28_MASK)
+#define DMA_HRS_HRS29_MASK  (0x20000000U)
+#define DMA_HRS_HRS29_SHIFT (29U)
+#define DMA_HRS_HRS29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS29_SHIFT)) & DMA_HRS_HRS29_MASK)
+#define DMA_HRS_HRS30_MASK  (0x40000000U)
+#define DMA_HRS_HRS30_SHIFT (30U)
+#define DMA_HRS_HRS30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS30_SHIFT)) & DMA_HRS_HRS30_MASK)
+#define DMA_HRS_HRS31_MASK  (0x80000000U)
+#define DMA_HRS_HRS31_SHIFT (31U)
+#define DMA_HRS_HRS31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_HRS_HRS31_SHIFT)) & DMA_HRS_HRS31_MASK)
 /*! @} */
 
 /*! @name EARS - Enable Asynchronous Request in Stop Register */
 /*! @{ */
-#define DMA_EARS_EDREQ_0_MASK                    (0x1U)
-#define DMA_EARS_EDREQ_0_SHIFT                   (0U)
-#define DMA_EARS_EDREQ_0(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_0_SHIFT)) & DMA_EARS_EDREQ_0_MASK)
-#define DMA_EARS_EDREQ_1_MASK                    (0x2U)
-#define DMA_EARS_EDREQ_1_SHIFT                   (1U)
-#define DMA_EARS_EDREQ_1(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_1_SHIFT)) & DMA_EARS_EDREQ_1_MASK)
-#define DMA_EARS_EDREQ_2_MASK                    (0x4U)
-#define DMA_EARS_EDREQ_2_SHIFT                   (2U)
-#define DMA_EARS_EDREQ_2(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_2_SHIFT)) & DMA_EARS_EDREQ_2_MASK)
-#define DMA_EARS_EDREQ_3_MASK                    (0x8U)
-#define DMA_EARS_EDREQ_3_SHIFT                   (3U)
-#define DMA_EARS_EDREQ_3(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_3_SHIFT)) & DMA_EARS_EDREQ_3_MASK)
-#define DMA_EARS_EDREQ_4_MASK                    (0x10U)
-#define DMA_EARS_EDREQ_4_SHIFT                   (4U)
-#define DMA_EARS_EDREQ_4(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_4_SHIFT)) & DMA_EARS_EDREQ_4_MASK)
-#define DMA_EARS_EDREQ_5_MASK                    (0x20U)
-#define DMA_EARS_EDREQ_5_SHIFT                   (5U)
-#define DMA_EARS_EDREQ_5(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_5_SHIFT)) & DMA_EARS_EDREQ_5_MASK)
-#define DMA_EARS_EDREQ_6_MASK                    (0x40U)
-#define DMA_EARS_EDREQ_6_SHIFT                   (6U)
-#define DMA_EARS_EDREQ_6(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_6_SHIFT)) & DMA_EARS_EDREQ_6_MASK)
-#define DMA_EARS_EDREQ_7_MASK                    (0x80U)
-#define DMA_EARS_EDREQ_7_SHIFT                   (7U)
-#define DMA_EARS_EDREQ_7(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_7_SHIFT)) & DMA_EARS_EDREQ_7_MASK)
-#define DMA_EARS_EDREQ_8_MASK                    (0x100U)
-#define DMA_EARS_EDREQ_8_SHIFT                   (8U)
-#define DMA_EARS_EDREQ_8(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_8_SHIFT)) & DMA_EARS_EDREQ_8_MASK)
-#define DMA_EARS_EDREQ_9_MASK                    (0x200U)
-#define DMA_EARS_EDREQ_9_SHIFT                   (9U)
-#define DMA_EARS_EDREQ_9(x)                      (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_9_SHIFT)) & DMA_EARS_EDREQ_9_MASK)
-#define DMA_EARS_EDREQ_10_MASK                   (0x400U)
-#define DMA_EARS_EDREQ_10_SHIFT                  (10U)
-#define DMA_EARS_EDREQ_10(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_10_SHIFT)) & DMA_EARS_EDREQ_10_MASK)
-#define DMA_EARS_EDREQ_11_MASK                   (0x800U)
-#define DMA_EARS_EDREQ_11_SHIFT                  (11U)
-#define DMA_EARS_EDREQ_11(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_11_SHIFT)) & DMA_EARS_EDREQ_11_MASK)
-#define DMA_EARS_EDREQ_12_MASK                   (0x1000U)
-#define DMA_EARS_EDREQ_12_SHIFT                  (12U)
-#define DMA_EARS_EDREQ_12(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_12_SHIFT)) & DMA_EARS_EDREQ_12_MASK)
-#define DMA_EARS_EDREQ_13_MASK                   (0x2000U)
-#define DMA_EARS_EDREQ_13_SHIFT                  (13U)
-#define DMA_EARS_EDREQ_13(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_13_SHIFT)) & DMA_EARS_EDREQ_13_MASK)
-#define DMA_EARS_EDREQ_14_MASK                   (0x4000U)
-#define DMA_EARS_EDREQ_14_SHIFT                  (14U)
-#define DMA_EARS_EDREQ_14(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_14_SHIFT)) & DMA_EARS_EDREQ_14_MASK)
-#define DMA_EARS_EDREQ_15_MASK                   (0x8000U)
-#define DMA_EARS_EDREQ_15_SHIFT                  (15U)
-#define DMA_EARS_EDREQ_15(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_15_SHIFT)) & DMA_EARS_EDREQ_15_MASK)
-#define DMA_EARS_EDREQ_16_MASK                   (0x10000U)
-#define DMA_EARS_EDREQ_16_SHIFT                  (16U)
-#define DMA_EARS_EDREQ_16(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_16_SHIFT)) & DMA_EARS_EDREQ_16_MASK)
-#define DMA_EARS_EDREQ_17_MASK                   (0x20000U)
-#define DMA_EARS_EDREQ_17_SHIFT                  (17U)
-#define DMA_EARS_EDREQ_17(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_17_SHIFT)) & DMA_EARS_EDREQ_17_MASK)
-#define DMA_EARS_EDREQ_18_MASK                   (0x40000U)
-#define DMA_EARS_EDREQ_18_SHIFT                  (18U)
-#define DMA_EARS_EDREQ_18(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_18_SHIFT)) & DMA_EARS_EDREQ_18_MASK)
-#define DMA_EARS_EDREQ_19_MASK                   (0x80000U)
-#define DMA_EARS_EDREQ_19_SHIFT                  (19U)
-#define DMA_EARS_EDREQ_19(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_19_SHIFT)) & DMA_EARS_EDREQ_19_MASK)
-#define DMA_EARS_EDREQ_20_MASK                   (0x100000U)
-#define DMA_EARS_EDREQ_20_SHIFT                  (20U)
-#define DMA_EARS_EDREQ_20(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_20_SHIFT)) & DMA_EARS_EDREQ_20_MASK)
-#define DMA_EARS_EDREQ_21_MASK                   (0x200000U)
-#define DMA_EARS_EDREQ_21_SHIFT                  (21U)
-#define DMA_EARS_EDREQ_21(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_21_SHIFT)) & DMA_EARS_EDREQ_21_MASK)
-#define DMA_EARS_EDREQ_22_MASK                   (0x400000U)
-#define DMA_EARS_EDREQ_22_SHIFT                  (22U)
-#define DMA_EARS_EDREQ_22(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_22_SHIFT)) & DMA_EARS_EDREQ_22_MASK)
-#define DMA_EARS_EDREQ_23_MASK                   (0x800000U)
-#define DMA_EARS_EDREQ_23_SHIFT                  (23U)
-#define DMA_EARS_EDREQ_23(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_23_SHIFT)) & DMA_EARS_EDREQ_23_MASK)
-#define DMA_EARS_EDREQ_24_MASK                   (0x1000000U)
-#define DMA_EARS_EDREQ_24_SHIFT                  (24U)
-#define DMA_EARS_EDREQ_24(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_24_SHIFT)) & DMA_EARS_EDREQ_24_MASK)
-#define DMA_EARS_EDREQ_25_MASK                   (0x2000000U)
-#define DMA_EARS_EDREQ_25_SHIFT                  (25U)
-#define DMA_EARS_EDREQ_25(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_25_SHIFT)) & DMA_EARS_EDREQ_25_MASK)
-#define DMA_EARS_EDREQ_26_MASK                   (0x4000000U)
-#define DMA_EARS_EDREQ_26_SHIFT                  (26U)
-#define DMA_EARS_EDREQ_26(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_26_SHIFT)) & DMA_EARS_EDREQ_26_MASK)
-#define DMA_EARS_EDREQ_27_MASK                   (0x8000000U)
-#define DMA_EARS_EDREQ_27_SHIFT                  (27U)
-#define DMA_EARS_EDREQ_27(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_27_SHIFT)) & DMA_EARS_EDREQ_27_MASK)
-#define DMA_EARS_EDREQ_28_MASK                   (0x10000000U)
-#define DMA_EARS_EDREQ_28_SHIFT                  (28U)
-#define DMA_EARS_EDREQ_28(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_28_SHIFT)) & DMA_EARS_EDREQ_28_MASK)
-#define DMA_EARS_EDREQ_29_MASK                   (0x20000000U)
-#define DMA_EARS_EDREQ_29_SHIFT                  (29U)
-#define DMA_EARS_EDREQ_29(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_29_SHIFT)) & DMA_EARS_EDREQ_29_MASK)
-#define DMA_EARS_EDREQ_30_MASK                   (0x40000000U)
-#define DMA_EARS_EDREQ_30_SHIFT                  (30U)
-#define DMA_EARS_EDREQ_30(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_30_SHIFT)) & DMA_EARS_EDREQ_30_MASK)
-#define DMA_EARS_EDREQ_31_MASK                   (0x80000000U)
-#define DMA_EARS_EDREQ_31_SHIFT                  (31U)
-#define DMA_EARS_EDREQ_31(x)                     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_31_SHIFT)) & DMA_EARS_EDREQ_31_MASK)
+#define DMA_EARS_EDREQ_0_MASK   (0x1U)
+#define DMA_EARS_EDREQ_0_SHIFT  (0U)
+#define DMA_EARS_EDREQ_0(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_0_SHIFT)) & DMA_EARS_EDREQ_0_MASK)
+#define DMA_EARS_EDREQ_1_MASK   (0x2U)
+#define DMA_EARS_EDREQ_1_SHIFT  (1U)
+#define DMA_EARS_EDREQ_1(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_1_SHIFT)) & DMA_EARS_EDREQ_1_MASK)
+#define DMA_EARS_EDREQ_2_MASK   (0x4U)
+#define DMA_EARS_EDREQ_2_SHIFT  (2U)
+#define DMA_EARS_EDREQ_2(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_2_SHIFT)) & DMA_EARS_EDREQ_2_MASK)
+#define DMA_EARS_EDREQ_3_MASK   (0x8U)
+#define DMA_EARS_EDREQ_3_SHIFT  (3U)
+#define DMA_EARS_EDREQ_3(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_3_SHIFT)) & DMA_EARS_EDREQ_3_MASK)
+#define DMA_EARS_EDREQ_4_MASK   (0x10U)
+#define DMA_EARS_EDREQ_4_SHIFT  (4U)
+#define DMA_EARS_EDREQ_4(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_4_SHIFT)) & DMA_EARS_EDREQ_4_MASK)
+#define DMA_EARS_EDREQ_5_MASK   (0x20U)
+#define DMA_EARS_EDREQ_5_SHIFT  (5U)
+#define DMA_EARS_EDREQ_5(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_5_SHIFT)) & DMA_EARS_EDREQ_5_MASK)
+#define DMA_EARS_EDREQ_6_MASK   (0x40U)
+#define DMA_EARS_EDREQ_6_SHIFT  (6U)
+#define DMA_EARS_EDREQ_6(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_6_SHIFT)) & DMA_EARS_EDREQ_6_MASK)
+#define DMA_EARS_EDREQ_7_MASK   (0x80U)
+#define DMA_EARS_EDREQ_7_SHIFT  (7U)
+#define DMA_EARS_EDREQ_7(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_7_SHIFT)) & DMA_EARS_EDREQ_7_MASK)
+#define DMA_EARS_EDREQ_8_MASK   (0x100U)
+#define DMA_EARS_EDREQ_8_SHIFT  (8U)
+#define DMA_EARS_EDREQ_8(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_8_SHIFT)) & DMA_EARS_EDREQ_8_MASK)
+#define DMA_EARS_EDREQ_9_MASK   (0x200U)
+#define DMA_EARS_EDREQ_9_SHIFT  (9U)
+#define DMA_EARS_EDREQ_9(x)     (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_9_SHIFT)) & DMA_EARS_EDREQ_9_MASK)
+#define DMA_EARS_EDREQ_10_MASK  (0x400U)
+#define DMA_EARS_EDREQ_10_SHIFT (10U)
+#define DMA_EARS_EDREQ_10(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_10_SHIFT)) & DMA_EARS_EDREQ_10_MASK)
+#define DMA_EARS_EDREQ_11_MASK  (0x800U)
+#define DMA_EARS_EDREQ_11_SHIFT (11U)
+#define DMA_EARS_EDREQ_11(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_11_SHIFT)) & DMA_EARS_EDREQ_11_MASK)
+#define DMA_EARS_EDREQ_12_MASK  (0x1000U)
+#define DMA_EARS_EDREQ_12_SHIFT (12U)
+#define DMA_EARS_EDREQ_12(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_12_SHIFT)) & DMA_EARS_EDREQ_12_MASK)
+#define DMA_EARS_EDREQ_13_MASK  (0x2000U)
+#define DMA_EARS_EDREQ_13_SHIFT (13U)
+#define DMA_EARS_EDREQ_13(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_13_SHIFT)) & DMA_EARS_EDREQ_13_MASK)
+#define DMA_EARS_EDREQ_14_MASK  (0x4000U)
+#define DMA_EARS_EDREQ_14_SHIFT (14U)
+#define DMA_EARS_EDREQ_14(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_14_SHIFT)) & DMA_EARS_EDREQ_14_MASK)
+#define DMA_EARS_EDREQ_15_MASK  (0x8000U)
+#define DMA_EARS_EDREQ_15_SHIFT (15U)
+#define DMA_EARS_EDREQ_15(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_15_SHIFT)) & DMA_EARS_EDREQ_15_MASK)
+#define DMA_EARS_EDREQ_16_MASK  (0x10000U)
+#define DMA_EARS_EDREQ_16_SHIFT (16U)
+#define DMA_EARS_EDREQ_16(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_16_SHIFT)) & DMA_EARS_EDREQ_16_MASK)
+#define DMA_EARS_EDREQ_17_MASK  (0x20000U)
+#define DMA_EARS_EDREQ_17_SHIFT (17U)
+#define DMA_EARS_EDREQ_17(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_17_SHIFT)) & DMA_EARS_EDREQ_17_MASK)
+#define DMA_EARS_EDREQ_18_MASK  (0x40000U)
+#define DMA_EARS_EDREQ_18_SHIFT (18U)
+#define DMA_EARS_EDREQ_18(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_18_SHIFT)) & DMA_EARS_EDREQ_18_MASK)
+#define DMA_EARS_EDREQ_19_MASK  (0x80000U)
+#define DMA_EARS_EDREQ_19_SHIFT (19U)
+#define DMA_EARS_EDREQ_19(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_19_SHIFT)) & DMA_EARS_EDREQ_19_MASK)
+#define DMA_EARS_EDREQ_20_MASK  (0x100000U)
+#define DMA_EARS_EDREQ_20_SHIFT (20U)
+#define DMA_EARS_EDREQ_20(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_20_SHIFT)) & DMA_EARS_EDREQ_20_MASK)
+#define DMA_EARS_EDREQ_21_MASK  (0x200000U)
+#define DMA_EARS_EDREQ_21_SHIFT (21U)
+#define DMA_EARS_EDREQ_21(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_21_SHIFT)) & DMA_EARS_EDREQ_21_MASK)
+#define DMA_EARS_EDREQ_22_MASK  (0x400000U)
+#define DMA_EARS_EDREQ_22_SHIFT (22U)
+#define DMA_EARS_EDREQ_22(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_22_SHIFT)) & DMA_EARS_EDREQ_22_MASK)
+#define DMA_EARS_EDREQ_23_MASK  (0x800000U)
+#define DMA_EARS_EDREQ_23_SHIFT (23U)
+#define DMA_EARS_EDREQ_23(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_23_SHIFT)) & DMA_EARS_EDREQ_23_MASK)
+#define DMA_EARS_EDREQ_24_MASK  (0x1000000U)
+#define DMA_EARS_EDREQ_24_SHIFT (24U)
+#define DMA_EARS_EDREQ_24(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_24_SHIFT)) & DMA_EARS_EDREQ_24_MASK)
+#define DMA_EARS_EDREQ_25_MASK  (0x2000000U)
+#define DMA_EARS_EDREQ_25_SHIFT (25U)
+#define DMA_EARS_EDREQ_25(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_25_SHIFT)) & DMA_EARS_EDREQ_25_MASK)
+#define DMA_EARS_EDREQ_26_MASK  (0x4000000U)
+#define DMA_EARS_EDREQ_26_SHIFT (26U)
+#define DMA_EARS_EDREQ_26(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_26_SHIFT)) & DMA_EARS_EDREQ_26_MASK)
+#define DMA_EARS_EDREQ_27_MASK  (0x8000000U)
+#define DMA_EARS_EDREQ_27_SHIFT (27U)
+#define DMA_EARS_EDREQ_27(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_27_SHIFT)) & DMA_EARS_EDREQ_27_MASK)
+#define DMA_EARS_EDREQ_28_MASK  (0x10000000U)
+#define DMA_EARS_EDREQ_28_SHIFT (28U)
+#define DMA_EARS_EDREQ_28(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_28_SHIFT)) & DMA_EARS_EDREQ_28_MASK)
+#define DMA_EARS_EDREQ_29_MASK  (0x20000000U)
+#define DMA_EARS_EDREQ_29_SHIFT (29U)
+#define DMA_EARS_EDREQ_29(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_29_SHIFT)) & DMA_EARS_EDREQ_29_MASK)
+#define DMA_EARS_EDREQ_30_MASK  (0x40000000U)
+#define DMA_EARS_EDREQ_30_SHIFT (30U)
+#define DMA_EARS_EDREQ_30(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_30_SHIFT)) & DMA_EARS_EDREQ_30_MASK)
+#define DMA_EARS_EDREQ_31_MASK  (0x80000000U)
+#define DMA_EARS_EDREQ_31_SHIFT (31U)
+#define DMA_EARS_EDREQ_31(x)    (((uint32_t)(((uint32_t)(x)) << DMA_EARS_EDREQ_31_SHIFT)) & DMA_EARS_EDREQ_31_MASK)
 /*! @} */
 
 /*! @name DCHPRI3 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI3_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI3_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI3_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_CHPRI_SHIFT)) & DMA_DCHPRI3_CHPRI_MASK)
-#define DMA_DCHPRI3_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI3_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI3_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_GRPPRI_SHIFT)) & DMA_DCHPRI3_GRPPRI_MASK)
-#define DMA_DCHPRI3_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI3_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI3_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_DPA_SHIFT)) & DMA_DCHPRI3_DPA_MASK)
-#define DMA_DCHPRI3_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI3_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI3_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_ECP_SHIFT)) & DMA_DCHPRI3_ECP_MASK)
+#define DMA_DCHPRI3_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI3_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI3_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_CHPRI_SHIFT)) & DMA_DCHPRI3_CHPRI_MASK)
+#define DMA_DCHPRI3_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI3_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI3_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_GRPPRI_SHIFT)) & DMA_DCHPRI3_GRPPRI_MASK)
+#define DMA_DCHPRI3_DPA_MASK     (0x40U)
+#define DMA_DCHPRI3_DPA_SHIFT    (6U)
+#define DMA_DCHPRI3_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_DPA_SHIFT)) & DMA_DCHPRI3_DPA_MASK)
+#define DMA_DCHPRI3_ECP_MASK     (0x80U)
+#define DMA_DCHPRI3_ECP_SHIFT    (7U)
+#define DMA_DCHPRI3_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI3_ECP_SHIFT)) & DMA_DCHPRI3_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI2 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI2_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI2_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI2_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_CHPRI_SHIFT)) & DMA_DCHPRI2_CHPRI_MASK)
-#define DMA_DCHPRI2_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI2_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI2_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_GRPPRI_SHIFT)) & DMA_DCHPRI2_GRPPRI_MASK)
-#define DMA_DCHPRI2_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI2_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI2_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_DPA_SHIFT)) & DMA_DCHPRI2_DPA_MASK)
-#define DMA_DCHPRI2_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI2_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI2_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_ECP_SHIFT)) & DMA_DCHPRI2_ECP_MASK)
+#define DMA_DCHPRI2_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI2_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI2_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_CHPRI_SHIFT)) & DMA_DCHPRI2_CHPRI_MASK)
+#define DMA_DCHPRI2_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI2_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI2_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_GRPPRI_SHIFT)) & DMA_DCHPRI2_GRPPRI_MASK)
+#define DMA_DCHPRI2_DPA_MASK     (0x40U)
+#define DMA_DCHPRI2_DPA_SHIFT    (6U)
+#define DMA_DCHPRI2_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_DPA_SHIFT)) & DMA_DCHPRI2_DPA_MASK)
+#define DMA_DCHPRI2_ECP_MASK     (0x80U)
+#define DMA_DCHPRI2_ECP_SHIFT    (7U)
+#define DMA_DCHPRI2_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI2_ECP_SHIFT)) & DMA_DCHPRI2_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI1 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI1_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI1_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI1_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_CHPRI_SHIFT)) & DMA_DCHPRI1_CHPRI_MASK)
-#define DMA_DCHPRI1_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI1_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI1_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_GRPPRI_SHIFT)) & DMA_DCHPRI1_GRPPRI_MASK)
-#define DMA_DCHPRI1_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI1_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI1_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_DPA_SHIFT)) & DMA_DCHPRI1_DPA_MASK)
-#define DMA_DCHPRI1_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI1_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI1_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_ECP_SHIFT)) & DMA_DCHPRI1_ECP_MASK)
+#define DMA_DCHPRI1_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI1_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI1_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_CHPRI_SHIFT)) & DMA_DCHPRI1_CHPRI_MASK)
+#define DMA_DCHPRI1_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI1_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI1_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_GRPPRI_SHIFT)) & DMA_DCHPRI1_GRPPRI_MASK)
+#define DMA_DCHPRI1_DPA_MASK     (0x40U)
+#define DMA_DCHPRI1_DPA_SHIFT    (6U)
+#define DMA_DCHPRI1_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_DPA_SHIFT)) & DMA_DCHPRI1_DPA_MASK)
+#define DMA_DCHPRI1_ECP_MASK     (0x80U)
+#define DMA_DCHPRI1_ECP_SHIFT    (7U)
+#define DMA_DCHPRI1_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI1_ECP_SHIFT)) & DMA_DCHPRI1_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI0 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI0_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI0_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI0_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_CHPRI_SHIFT)) & DMA_DCHPRI0_CHPRI_MASK)
-#define DMA_DCHPRI0_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI0_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI0_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_GRPPRI_SHIFT)) & DMA_DCHPRI0_GRPPRI_MASK)
-#define DMA_DCHPRI0_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI0_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI0_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_DPA_SHIFT)) & DMA_DCHPRI0_DPA_MASK)
-#define DMA_DCHPRI0_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI0_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI0_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_ECP_SHIFT)) & DMA_DCHPRI0_ECP_MASK)
+#define DMA_DCHPRI0_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI0_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI0_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_CHPRI_SHIFT)) & DMA_DCHPRI0_CHPRI_MASK)
+#define DMA_DCHPRI0_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI0_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI0_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_GRPPRI_SHIFT)) & DMA_DCHPRI0_GRPPRI_MASK)
+#define DMA_DCHPRI0_DPA_MASK     (0x40U)
+#define DMA_DCHPRI0_DPA_SHIFT    (6U)
+#define DMA_DCHPRI0_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_DPA_SHIFT)) & DMA_DCHPRI0_DPA_MASK)
+#define DMA_DCHPRI0_ECP_MASK     (0x80U)
+#define DMA_DCHPRI0_ECP_SHIFT    (7U)
+#define DMA_DCHPRI0_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI0_ECP_SHIFT)) & DMA_DCHPRI0_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI7 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI7_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI7_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI7_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_CHPRI_SHIFT)) & DMA_DCHPRI7_CHPRI_MASK)
-#define DMA_DCHPRI7_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI7_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI7_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_GRPPRI_SHIFT)) & DMA_DCHPRI7_GRPPRI_MASK)
-#define DMA_DCHPRI7_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI7_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI7_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_DPA_SHIFT)) & DMA_DCHPRI7_DPA_MASK)
-#define DMA_DCHPRI7_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI7_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI7_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_ECP_SHIFT)) & DMA_DCHPRI7_ECP_MASK)
+#define DMA_DCHPRI7_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI7_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI7_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_CHPRI_SHIFT)) & DMA_DCHPRI7_CHPRI_MASK)
+#define DMA_DCHPRI7_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI7_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI7_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_GRPPRI_SHIFT)) & DMA_DCHPRI7_GRPPRI_MASK)
+#define DMA_DCHPRI7_DPA_MASK     (0x40U)
+#define DMA_DCHPRI7_DPA_SHIFT    (6U)
+#define DMA_DCHPRI7_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_DPA_SHIFT)) & DMA_DCHPRI7_DPA_MASK)
+#define DMA_DCHPRI7_ECP_MASK     (0x80U)
+#define DMA_DCHPRI7_ECP_SHIFT    (7U)
+#define DMA_DCHPRI7_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI7_ECP_SHIFT)) & DMA_DCHPRI7_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI6 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI6_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI6_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI6_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_CHPRI_SHIFT)) & DMA_DCHPRI6_CHPRI_MASK)
-#define DMA_DCHPRI6_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI6_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI6_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_GRPPRI_SHIFT)) & DMA_DCHPRI6_GRPPRI_MASK)
-#define DMA_DCHPRI6_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI6_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI6_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_DPA_SHIFT)) & DMA_DCHPRI6_DPA_MASK)
-#define DMA_DCHPRI6_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI6_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI6_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_ECP_SHIFT)) & DMA_DCHPRI6_ECP_MASK)
+#define DMA_DCHPRI6_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI6_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI6_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_CHPRI_SHIFT)) & DMA_DCHPRI6_CHPRI_MASK)
+#define DMA_DCHPRI6_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI6_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI6_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_GRPPRI_SHIFT)) & DMA_DCHPRI6_GRPPRI_MASK)
+#define DMA_DCHPRI6_DPA_MASK     (0x40U)
+#define DMA_DCHPRI6_DPA_SHIFT    (6U)
+#define DMA_DCHPRI6_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_DPA_SHIFT)) & DMA_DCHPRI6_DPA_MASK)
+#define DMA_DCHPRI6_ECP_MASK     (0x80U)
+#define DMA_DCHPRI6_ECP_SHIFT    (7U)
+#define DMA_DCHPRI6_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI6_ECP_SHIFT)) & DMA_DCHPRI6_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI5 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI5_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI5_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI5_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_CHPRI_SHIFT)) & DMA_DCHPRI5_CHPRI_MASK)
-#define DMA_DCHPRI5_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI5_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI5_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_GRPPRI_SHIFT)) & DMA_DCHPRI5_GRPPRI_MASK)
-#define DMA_DCHPRI5_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI5_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI5_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_DPA_SHIFT)) & DMA_DCHPRI5_DPA_MASK)
-#define DMA_DCHPRI5_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI5_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI5_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
+#define DMA_DCHPRI5_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI5_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI5_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_CHPRI_SHIFT)) & DMA_DCHPRI5_CHPRI_MASK)
+#define DMA_DCHPRI5_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI5_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI5_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_GRPPRI_SHIFT)) & DMA_DCHPRI5_GRPPRI_MASK)
+#define DMA_DCHPRI5_DPA_MASK     (0x40U)
+#define DMA_DCHPRI5_DPA_SHIFT    (6U)
+#define DMA_DCHPRI5_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_DPA_SHIFT)) & DMA_DCHPRI5_DPA_MASK)
+#define DMA_DCHPRI5_ECP_MASK     (0x80U)
+#define DMA_DCHPRI5_ECP_SHIFT    (7U)
+#define DMA_DCHPRI5_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI4 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI4_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI4_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI4_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_CHPRI_SHIFT)) & DMA_DCHPRI4_CHPRI_MASK)
-#define DMA_DCHPRI4_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI4_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI4_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_GRPPRI_SHIFT)) & DMA_DCHPRI4_GRPPRI_MASK)
-#define DMA_DCHPRI4_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI4_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI4_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_DPA_SHIFT)) & DMA_DCHPRI4_DPA_MASK)
-#define DMA_DCHPRI4_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI4_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI4_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_ECP_SHIFT)) & DMA_DCHPRI4_ECP_MASK)
+#define DMA_DCHPRI4_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI4_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI4_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_CHPRI_SHIFT)) & DMA_DCHPRI4_CHPRI_MASK)
+#define DMA_DCHPRI4_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI4_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI4_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_GRPPRI_SHIFT)) & DMA_DCHPRI4_GRPPRI_MASK)
+#define DMA_DCHPRI4_DPA_MASK     (0x40U)
+#define DMA_DCHPRI4_DPA_SHIFT    (6U)
+#define DMA_DCHPRI4_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_DPA_SHIFT)) & DMA_DCHPRI4_DPA_MASK)
+#define DMA_DCHPRI4_ECP_MASK     (0x80U)
+#define DMA_DCHPRI4_ECP_SHIFT    (7U)
+#define DMA_DCHPRI4_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI4_ECP_SHIFT)) & DMA_DCHPRI4_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI11 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI11_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI11_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI11_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_CHPRI_SHIFT)) & DMA_DCHPRI11_CHPRI_MASK)
-#define DMA_DCHPRI11_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI11_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI11_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_GRPPRI_SHIFT)) & DMA_DCHPRI11_GRPPRI_MASK)
-#define DMA_DCHPRI11_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI11_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI11_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_DPA_SHIFT)) & DMA_DCHPRI11_DPA_MASK)
-#define DMA_DCHPRI11_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI11_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI11_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_ECP_SHIFT)) & DMA_DCHPRI11_ECP_MASK)
+#define DMA_DCHPRI11_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI11_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI11_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_CHPRI_SHIFT)) & DMA_DCHPRI11_CHPRI_MASK)
+#define DMA_DCHPRI11_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI11_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI11_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_GRPPRI_SHIFT)) & DMA_DCHPRI11_GRPPRI_MASK)
+#define DMA_DCHPRI11_DPA_MASK     (0x40U)
+#define DMA_DCHPRI11_DPA_SHIFT    (6U)
+#define DMA_DCHPRI11_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_DPA_SHIFT)) & DMA_DCHPRI11_DPA_MASK)
+#define DMA_DCHPRI11_ECP_MASK     (0x80U)
+#define DMA_DCHPRI11_ECP_SHIFT    (7U)
+#define DMA_DCHPRI11_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI11_ECP_SHIFT)) & DMA_DCHPRI11_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI10 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI10_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI10_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI10_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_CHPRI_SHIFT)) & DMA_DCHPRI10_CHPRI_MASK)
-#define DMA_DCHPRI10_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI10_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI10_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_GRPPRI_SHIFT)) & DMA_DCHPRI10_GRPPRI_MASK)
-#define DMA_DCHPRI10_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI10_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI10_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_DPA_SHIFT)) & DMA_DCHPRI10_DPA_MASK)
-#define DMA_DCHPRI10_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI10_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI10_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_ECP_SHIFT)) & DMA_DCHPRI10_ECP_MASK)
+#define DMA_DCHPRI10_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI10_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI10_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_CHPRI_SHIFT)) & DMA_DCHPRI10_CHPRI_MASK)
+#define DMA_DCHPRI10_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI10_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI10_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_GRPPRI_SHIFT)) & DMA_DCHPRI10_GRPPRI_MASK)
+#define DMA_DCHPRI10_DPA_MASK     (0x40U)
+#define DMA_DCHPRI10_DPA_SHIFT    (6U)
+#define DMA_DCHPRI10_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_DPA_SHIFT)) & DMA_DCHPRI10_DPA_MASK)
+#define DMA_DCHPRI10_ECP_MASK     (0x80U)
+#define DMA_DCHPRI10_ECP_SHIFT    (7U)
+#define DMA_DCHPRI10_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI10_ECP_SHIFT)) & DMA_DCHPRI10_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI9 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI9_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI9_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI9_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_CHPRI_SHIFT)) & DMA_DCHPRI9_CHPRI_MASK)
-#define DMA_DCHPRI9_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI9_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI9_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_GRPPRI_SHIFT)) & DMA_DCHPRI9_GRPPRI_MASK)
-#define DMA_DCHPRI9_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI9_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI9_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_DPA_SHIFT)) & DMA_DCHPRI9_DPA_MASK)
-#define DMA_DCHPRI9_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI9_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI9_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_ECP_SHIFT)) & DMA_DCHPRI9_ECP_MASK)
+#define DMA_DCHPRI9_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI9_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI9_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_CHPRI_SHIFT)) & DMA_DCHPRI9_CHPRI_MASK)
+#define DMA_DCHPRI9_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI9_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI9_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_GRPPRI_SHIFT)) & DMA_DCHPRI9_GRPPRI_MASK)
+#define DMA_DCHPRI9_DPA_MASK     (0x40U)
+#define DMA_DCHPRI9_DPA_SHIFT    (6U)
+#define DMA_DCHPRI9_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_DPA_SHIFT)) & DMA_DCHPRI9_DPA_MASK)
+#define DMA_DCHPRI9_ECP_MASK     (0x80U)
+#define DMA_DCHPRI9_ECP_SHIFT    (7U)
+#define DMA_DCHPRI9_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI9_ECP_SHIFT)) & DMA_DCHPRI9_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI8 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI8_CHPRI_MASK                   (0xFU)
-#define DMA_DCHPRI8_CHPRI_SHIFT                  (0U)
-#define DMA_DCHPRI8_CHPRI(x)                     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_CHPRI_SHIFT)) & DMA_DCHPRI8_CHPRI_MASK)
-#define DMA_DCHPRI8_GRPPRI_MASK                  (0x30U)
-#define DMA_DCHPRI8_GRPPRI_SHIFT                 (4U)
-#define DMA_DCHPRI8_GRPPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_GRPPRI_SHIFT)) & DMA_DCHPRI8_GRPPRI_MASK)
-#define DMA_DCHPRI8_DPA_MASK                     (0x40U)
-#define DMA_DCHPRI8_DPA_SHIFT                    (6U)
-#define DMA_DCHPRI8_DPA(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_DPA_SHIFT)) & DMA_DCHPRI8_DPA_MASK)
-#define DMA_DCHPRI8_ECP_MASK                     (0x80U)
-#define DMA_DCHPRI8_ECP_SHIFT                    (7U)
-#define DMA_DCHPRI8_ECP(x)                       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_ECP_SHIFT)) & DMA_DCHPRI8_ECP_MASK)
+#define DMA_DCHPRI8_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI8_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI8_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_CHPRI_SHIFT)) & DMA_DCHPRI8_CHPRI_MASK)
+#define DMA_DCHPRI8_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI8_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI8_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_GRPPRI_SHIFT)) & DMA_DCHPRI8_GRPPRI_MASK)
+#define DMA_DCHPRI8_DPA_MASK     (0x40U)
+#define DMA_DCHPRI8_DPA_SHIFT    (6U)
+#define DMA_DCHPRI8_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_DPA_SHIFT)) & DMA_DCHPRI8_DPA_MASK)
+#define DMA_DCHPRI8_ECP_MASK     (0x80U)
+#define DMA_DCHPRI8_ECP_SHIFT    (7U)
+#define DMA_DCHPRI8_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI8_ECP_SHIFT)) & DMA_DCHPRI8_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI15 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI15_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI15_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI15_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_CHPRI_SHIFT)) & DMA_DCHPRI15_CHPRI_MASK)
-#define DMA_DCHPRI15_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI15_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI15_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_GRPPRI_SHIFT)) & DMA_DCHPRI15_GRPPRI_MASK)
-#define DMA_DCHPRI15_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI15_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI15_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_DPA_SHIFT)) & DMA_DCHPRI15_DPA_MASK)
-#define DMA_DCHPRI15_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI15_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI15_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_ECP_SHIFT)) & DMA_DCHPRI15_ECP_MASK)
+#define DMA_DCHPRI15_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI15_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI15_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_CHPRI_SHIFT)) & DMA_DCHPRI15_CHPRI_MASK)
+#define DMA_DCHPRI15_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI15_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI15_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_GRPPRI_SHIFT)) & DMA_DCHPRI15_GRPPRI_MASK)
+#define DMA_DCHPRI15_DPA_MASK     (0x40U)
+#define DMA_DCHPRI15_DPA_SHIFT    (6U)
+#define DMA_DCHPRI15_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_DPA_SHIFT)) & DMA_DCHPRI15_DPA_MASK)
+#define DMA_DCHPRI15_ECP_MASK     (0x80U)
+#define DMA_DCHPRI15_ECP_SHIFT    (7U)
+#define DMA_DCHPRI15_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI15_ECP_SHIFT)) & DMA_DCHPRI15_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI14 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI14_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI14_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI14_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_CHPRI_SHIFT)) & DMA_DCHPRI14_CHPRI_MASK)
-#define DMA_DCHPRI14_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI14_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI14_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_GRPPRI_SHIFT)) & DMA_DCHPRI14_GRPPRI_MASK)
-#define DMA_DCHPRI14_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI14_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI14_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_DPA_SHIFT)) & DMA_DCHPRI14_DPA_MASK)
-#define DMA_DCHPRI14_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI14_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI14_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_ECP_SHIFT)) & DMA_DCHPRI14_ECP_MASK)
+#define DMA_DCHPRI14_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI14_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI14_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_CHPRI_SHIFT)) & DMA_DCHPRI14_CHPRI_MASK)
+#define DMA_DCHPRI14_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI14_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI14_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_GRPPRI_SHIFT)) & DMA_DCHPRI14_GRPPRI_MASK)
+#define DMA_DCHPRI14_DPA_MASK     (0x40U)
+#define DMA_DCHPRI14_DPA_SHIFT    (6U)
+#define DMA_DCHPRI14_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_DPA_SHIFT)) & DMA_DCHPRI14_DPA_MASK)
+#define DMA_DCHPRI14_ECP_MASK     (0x80U)
+#define DMA_DCHPRI14_ECP_SHIFT    (7U)
+#define DMA_DCHPRI14_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI14_ECP_SHIFT)) & DMA_DCHPRI14_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI13 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI13_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI13_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI13_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_CHPRI_SHIFT)) & DMA_DCHPRI13_CHPRI_MASK)
-#define DMA_DCHPRI13_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI13_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI13_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_GRPPRI_SHIFT)) & DMA_DCHPRI13_GRPPRI_MASK)
-#define DMA_DCHPRI13_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI13_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI13_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_DPA_SHIFT)) & DMA_DCHPRI13_DPA_MASK)
-#define DMA_DCHPRI13_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI13_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI13_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_ECP_SHIFT)) & DMA_DCHPRI13_ECP_MASK)
+#define DMA_DCHPRI13_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI13_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI13_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_CHPRI_SHIFT)) & DMA_DCHPRI13_CHPRI_MASK)
+#define DMA_DCHPRI13_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI13_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI13_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_GRPPRI_SHIFT)) & DMA_DCHPRI13_GRPPRI_MASK)
+#define DMA_DCHPRI13_DPA_MASK     (0x40U)
+#define DMA_DCHPRI13_DPA_SHIFT    (6U)
+#define DMA_DCHPRI13_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_DPA_SHIFT)) & DMA_DCHPRI13_DPA_MASK)
+#define DMA_DCHPRI13_ECP_MASK     (0x80U)
+#define DMA_DCHPRI13_ECP_SHIFT    (7U)
+#define DMA_DCHPRI13_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI13_ECP_SHIFT)) & DMA_DCHPRI13_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI12 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI12_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI12_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI12_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_CHPRI_SHIFT)) & DMA_DCHPRI12_CHPRI_MASK)
-#define DMA_DCHPRI12_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI12_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI12_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_GRPPRI_SHIFT)) & DMA_DCHPRI12_GRPPRI_MASK)
-#define DMA_DCHPRI12_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI12_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI12_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_DPA_SHIFT)) & DMA_DCHPRI12_DPA_MASK)
-#define DMA_DCHPRI12_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI12_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI12_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_ECP_SHIFT)) & DMA_DCHPRI12_ECP_MASK)
+#define DMA_DCHPRI12_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI12_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI12_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_CHPRI_SHIFT)) & DMA_DCHPRI12_CHPRI_MASK)
+#define DMA_DCHPRI12_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI12_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI12_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_GRPPRI_SHIFT)) & DMA_DCHPRI12_GRPPRI_MASK)
+#define DMA_DCHPRI12_DPA_MASK     (0x40U)
+#define DMA_DCHPRI12_DPA_SHIFT    (6U)
+#define DMA_DCHPRI12_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_DPA_SHIFT)) & DMA_DCHPRI12_DPA_MASK)
+#define DMA_DCHPRI12_ECP_MASK     (0x80U)
+#define DMA_DCHPRI12_ECP_SHIFT    (7U)
+#define DMA_DCHPRI12_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI12_ECP_SHIFT)) & DMA_DCHPRI12_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI19 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI19_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI19_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI19_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_CHPRI_SHIFT)) & DMA_DCHPRI19_CHPRI_MASK)
-#define DMA_DCHPRI19_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI19_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI19_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_GRPPRI_SHIFT)) & DMA_DCHPRI19_GRPPRI_MASK)
-#define DMA_DCHPRI19_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI19_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI19_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_DPA_SHIFT)) & DMA_DCHPRI19_DPA_MASK)
-#define DMA_DCHPRI19_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI19_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI19_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_ECP_SHIFT)) & DMA_DCHPRI19_ECP_MASK)
+#define DMA_DCHPRI19_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI19_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI19_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_CHPRI_SHIFT)) & DMA_DCHPRI19_CHPRI_MASK)
+#define DMA_DCHPRI19_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI19_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI19_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_GRPPRI_SHIFT)) & DMA_DCHPRI19_GRPPRI_MASK)
+#define DMA_DCHPRI19_DPA_MASK     (0x40U)
+#define DMA_DCHPRI19_DPA_SHIFT    (6U)
+#define DMA_DCHPRI19_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_DPA_SHIFT)) & DMA_DCHPRI19_DPA_MASK)
+#define DMA_DCHPRI19_ECP_MASK     (0x80U)
+#define DMA_DCHPRI19_ECP_SHIFT    (7U)
+#define DMA_DCHPRI19_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI19_ECP_SHIFT)) & DMA_DCHPRI19_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI18 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI18_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI18_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI18_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_CHPRI_SHIFT)) & DMA_DCHPRI18_CHPRI_MASK)
-#define DMA_DCHPRI18_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI18_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI18_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_GRPPRI_SHIFT)) & DMA_DCHPRI18_GRPPRI_MASK)
-#define DMA_DCHPRI18_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI18_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI18_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_DPA_SHIFT)) & DMA_DCHPRI18_DPA_MASK)
-#define DMA_DCHPRI18_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI18_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI18_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_ECP_SHIFT)) & DMA_DCHPRI18_ECP_MASK)
+#define DMA_DCHPRI18_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI18_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI18_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_CHPRI_SHIFT)) & DMA_DCHPRI18_CHPRI_MASK)
+#define DMA_DCHPRI18_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI18_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI18_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_GRPPRI_SHIFT)) & DMA_DCHPRI18_GRPPRI_MASK)
+#define DMA_DCHPRI18_DPA_MASK     (0x40U)
+#define DMA_DCHPRI18_DPA_SHIFT    (6U)
+#define DMA_DCHPRI18_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_DPA_SHIFT)) & DMA_DCHPRI18_DPA_MASK)
+#define DMA_DCHPRI18_ECP_MASK     (0x80U)
+#define DMA_DCHPRI18_ECP_SHIFT    (7U)
+#define DMA_DCHPRI18_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI18_ECP_SHIFT)) & DMA_DCHPRI18_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI17 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI17_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI17_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI17_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_CHPRI_SHIFT)) & DMA_DCHPRI17_CHPRI_MASK)
-#define DMA_DCHPRI17_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI17_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI17_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_GRPPRI_SHIFT)) & DMA_DCHPRI17_GRPPRI_MASK)
-#define DMA_DCHPRI17_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI17_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI17_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_DPA_SHIFT)) & DMA_DCHPRI17_DPA_MASK)
-#define DMA_DCHPRI17_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI17_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI17_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_ECP_SHIFT)) & DMA_DCHPRI17_ECP_MASK)
+#define DMA_DCHPRI17_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI17_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI17_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_CHPRI_SHIFT)) & DMA_DCHPRI17_CHPRI_MASK)
+#define DMA_DCHPRI17_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI17_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI17_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_GRPPRI_SHIFT)) & DMA_DCHPRI17_GRPPRI_MASK)
+#define DMA_DCHPRI17_DPA_MASK     (0x40U)
+#define DMA_DCHPRI17_DPA_SHIFT    (6U)
+#define DMA_DCHPRI17_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_DPA_SHIFT)) & DMA_DCHPRI17_DPA_MASK)
+#define DMA_DCHPRI17_ECP_MASK     (0x80U)
+#define DMA_DCHPRI17_ECP_SHIFT    (7U)
+#define DMA_DCHPRI17_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI17_ECP_SHIFT)) & DMA_DCHPRI17_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI16 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI16_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI16_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI16_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_CHPRI_SHIFT)) & DMA_DCHPRI16_CHPRI_MASK)
-#define DMA_DCHPRI16_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI16_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI16_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_GRPPRI_SHIFT)) & DMA_DCHPRI16_GRPPRI_MASK)
-#define DMA_DCHPRI16_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI16_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI16_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_DPA_SHIFT)) & DMA_DCHPRI16_DPA_MASK)
-#define DMA_DCHPRI16_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI16_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI16_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_ECP_SHIFT)) & DMA_DCHPRI16_ECP_MASK)
+#define DMA_DCHPRI16_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI16_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI16_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_CHPRI_SHIFT)) & DMA_DCHPRI16_CHPRI_MASK)
+#define DMA_DCHPRI16_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI16_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI16_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_GRPPRI_SHIFT)) & DMA_DCHPRI16_GRPPRI_MASK)
+#define DMA_DCHPRI16_DPA_MASK     (0x40U)
+#define DMA_DCHPRI16_DPA_SHIFT    (6U)
+#define DMA_DCHPRI16_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_DPA_SHIFT)) & DMA_DCHPRI16_DPA_MASK)
+#define DMA_DCHPRI16_ECP_MASK     (0x80U)
+#define DMA_DCHPRI16_ECP_SHIFT    (7U)
+#define DMA_DCHPRI16_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI16_ECP_SHIFT)) & DMA_DCHPRI16_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI23 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI23_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI23_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI23_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_CHPRI_SHIFT)) & DMA_DCHPRI23_CHPRI_MASK)
-#define DMA_DCHPRI23_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI23_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI23_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_GRPPRI_SHIFT)) & DMA_DCHPRI23_GRPPRI_MASK)
-#define DMA_DCHPRI23_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI23_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI23_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_DPA_SHIFT)) & DMA_DCHPRI23_DPA_MASK)
-#define DMA_DCHPRI23_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI23_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI23_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_ECP_SHIFT)) & DMA_DCHPRI23_ECP_MASK)
+#define DMA_DCHPRI23_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI23_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI23_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_CHPRI_SHIFT)) & DMA_DCHPRI23_CHPRI_MASK)
+#define DMA_DCHPRI23_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI23_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI23_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_GRPPRI_SHIFT)) & DMA_DCHPRI23_GRPPRI_MASK)
+#define DMA_DCHPRI23_DPA_MASK     (0x40U)
+#define DMA_DCHPRI23_DPA_SHIFT    (6U)
+#define DMA_DCHPRI23_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_DPA_SHIFT)) & DMA_DCHPRI23_DPA_MASK)
+#define DMA_DCHPRI23_ECP_MASK     (0x80U)
+#define DMA_DCHPRI23_ECP_SHIFT    (7U)
+#define DMA_DCHPRI23_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI23_ECP_SHIFT)) & DMA_DCHPRI23_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI22 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI22_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI22_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI22_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_CHPRI_SHIFT)) & DMA_DCHPRI22_CHPRI_MASK)
-#define DMA_DCHPRI22_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI22_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI22_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_GRPPRI_SHIFT)) & DMA_DCHPRI22_GRPPRI_MASK)
-#define DMA_DCHPRI22_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI22_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI22_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_DPA_SHIFT)) & DMA_DCHPRI22_DPA_MASK)
-#define DMA_DCHPRI22_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI22_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI22_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_ECP_SHIFT)) & DMA_DCHPRI22_ECP_MASK)
+#define DMA_DCHPRI22_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI22_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI22_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_CHPRI_SHIFT)) & DMA_DCHPRI22_CHPRI_MASK)
+#define DMA_DCHPRI22_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI22_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI22_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_GRPPRI_SHIFT)) & DMA_DCHPRI22_GRPPRI_MASK)
+#define DMA_DCHPRI22_DPA_MASK     (0x40U)
+#define DMA_DCHPRI22_DPA_SHIFT    (6U)
+#define DMA_DCHPRI22_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_DPA_SHIFT)) & DMA_DCHPRI22_DPA_MASK)
+#define DMA_DCHPRI22_ECP_MASK     (0x80U)
+#define DMA_DCHPRI22_ECP_SHIFT    (7U)
+#define DMA_DCHPRI22_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI22_ECP_SHIFT)) & DMA_DCHPRI22_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI21 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI21_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI21_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI21_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_CHPRI_SHIFT)) & DMA_DCHPRI21_CHPRI_MASK)
-#define DMA_DCHPRI21_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI21_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI21_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_GRPPRI_SHIFT)) & DMA_DCHPRI21_GRPPRI_MASK)
-#define DMA_DCHPRI21_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI21_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI21_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_DPA_SHIFT)) & DMA_DCHPRI21_DPA_MASK)
-#define DMA_DCHPRI21_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI21_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI21_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_ECP_SHIFT)) & DMA_DCHPRI21_ECP_MASK)
+#define DMA_DCHPRI21_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI21_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI21_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_CHPRI_SHIFT)) & DMA_DCHPRI21_CHPRI_MASK)
+#define DMA_DCHPRI21_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI21_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI21_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_GRPPRI_SHIFT)) & DMA_DCHPRI21_GRPPRI_MASK)
+#define DMA_DCHPRI21_DPA_MASK     (0x40U)
+#define DMA_DCHPRI21_DPA_SHIFT    (6U)
+#define DMA_DCHPRI21_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_DPA_SHIFT)) & DMA_DCHPRI21_DPA_MASK)
+#define DMA_DCHPRI21_ECP_MASK     (0x80U)
+#define DMA_DCHPRI21_ECP_SHIFT    (7U)
+#define DMA_DCHPRI21_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI21_ECP_SHIFT)) & DMA_DCHPRI21_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI20 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI20_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI20_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI20_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_CHPRI_SHIFT)) & DMA_DCHPRI20_CHPRI_MASK)
-#define DMA_DCHPRI20_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI20_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI20_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_GRPPRI_SHIFT)) & DMA_DCHPRI20_GRPPRI_MASK)
-#define DMA_DCHPRI20_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI20_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI20_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_DPA_SHIFT)) & DMA_DCHPRI20_DPA_MASK)
-#define DMA_DCHPRI20_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI20_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI20_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_ECP_SHIFT)) & DMA_DCHPRI20_ECP_MASK)
+#define DMA_DCHPRI20_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI20_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI20_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_CHPRI_SHIFT)) & DMA_DCHPRI20_CHPRI_MASK)
+#define DMA_DCHPRI20_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI20_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI20_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_GRPPRI_SHIFT)) & DMA_DCHPRI20_GRPPRI_MASK)
+#define DMA_DCHPRI20_DPA_MASK     (0x40U)
+#define DMA_DCHPRI20_DPA_SHIFT    (6U)
+#define DMA_DCHPRI20_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_DPA_SHIFT)) & DMA_DCHPRI20_DPA_MASK)
+#define DMA_DCHPRI20_ECP_MASK     (0x80U)
+#define DMA_DCHPRI20_ECP_SHIFT    (7U)
+#define DMA_DCHPRI20_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI20_ECP_SHIFT)) & DMA_DCHPRI20_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI27 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI27_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI27_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI27_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_CHPRI_SHIFT)) & DMA_DCHPRI27_CHPRI_MASK)
-#define DMA_DCHPRI27_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI27_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI27_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_GRPPRI_SHIFT)) & DMA_DCHPRI27_GRPPRI_MASK)
-#define DMA_DCHPRI27_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI27_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI27_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_DPA_SHIFT)) & DMA_DCHPRI27_DPA_MASK)
-#define DMA_DCHPRI27_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI27_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI27_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_ECP_SHIFT)) & DMA_DCHPRI27_ECP_MASK)
+#define DMA_DCHPRI27_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI27_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI27_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_CHPRI_SHIFT)) & DMA_DCHPRI27_CHPRI_MASK)
+#define DMA_DCHPRI27_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI27_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI27_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_GRPPRI_SHIFT)) & DMA_DCHPRI27_GRPPRI_MASK)
+#define DMA_DCHPRI27_DPA_MASK     (0x40U)
+#define DMA_DCHPRI27_DPA_SHIFT    (6U)
+#define DMA_DCHPRI27_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_DPA_SHIFT)) & DMA_DCHPRI27_DPA_MASK)
+#define DMA_DCHPRI27_ECP_MASK     (0x80U)
+#define DMA_DCHPRI27_ECP_SHIFT    (7U)
+#define DMA_DCHPRI27_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI27_ECP_SHIFT)) & DMA_DCHPRI27_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI26 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI26_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI26_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI26_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_CHPRI_SHIFT)) & DMA_DCHPRI26_CHPRI_MASK)
-#define DMA_DCHPRI26_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI26_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI26_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_GRPPRI_SHIFT)) & DMA_DCHPRI26_GRPPRI_MASK)
-#define DMA_DCHPRI26_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI26_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI26_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_DPA_SHIFT)) & DMA_DCHPRI26_DPA_MASK)
-#define DMA_DCHPRI26_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI26_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI26_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_ECP_SHIFT)) & DMA_DCHPRI26_ECP_MASK)
+#define DMA_DCHPRI26_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI26_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI26_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_CHPRI_SHIFT)) & DMA_DCHPRI26_CHPRI_MASK)
+#define DMA_DCHPRI26_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI26_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI26_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_GRPPRI_SHIFT)) & DMA_DCHPRI26_GRPPRI_MASK)
+#define DMA_DCHPRI26_DPA_MASK     (0x40U)
+#define DMA_DCHPRI26_DPA_SHIFT    (6U)
+#define DMA_DCHPRI26_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_DPA_SHIFT)) & DMA_DCHPRI26_DPA_MASK)
+#define DMA_DCHPRI26_ECP_MASK     (0x80U)
+#define DMA_DCHPRI26_ECP_SHIFT    (7U)
+#define DMA_DCHPRI26_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI26_ECP_SHIFT)) & DMA_DCHPRI26_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI25 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI25_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI25_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI25_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_CHPRI_SHIFT)) & DMA_DCHPRI25_CHPRI_MASK)
-#define DMA_DCHPRI25_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI25_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI25_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_GRPPRI_SHIFT)) & DMA_DCHPRI25_GRPPRI_MASK)
-#define DMA_DCHPRI25_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI25_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI25_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_DPA_SHIFT)) & DMA_DCHPRI25_DPA_MASK)
-#define DMA_DCHPRI25_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI25_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI25_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_ECP_SHIFT)) & DMA_DCHPRI25_ECP_MASK)
+#define DMA_DCHPRI25_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI25_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI25_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_CHPRI_SHIFT)) & DMA_DCHPRI25_CHPRI_MASK)
+#define DMA_DCHPRI25_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI25_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI25_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_GRPPRI_SHIFT)) & DMA_DCHPRI25_GRPPRI_MASK)
+#define DMA_DCHPRI25_DPA_MASK     (0x40U)
+#define DMA_DCHPRI25_DPA_SHIFT    (6U)
+#define DMA_DCHPRI25_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_DPA_SHIFT)) & DMA_DCHPRI25_DPA_MASK)
+#define DMA_DCHPRI25_ECP_MASK     (0x80U)
+#define DMA_DCHPRI25_ECP_SHIFT    (7U)
+#define DMA_DCHPRI25_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI25_ECP_SHIFT)) & DMA_DCHPRI25_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI24 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI24_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI24_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI24_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_CHPRI_SHIFT)) & DMA_DCHPRI24_CHPRI_MASK)
-#define DMA_DCHPRI24_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI24_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI24_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_GRPPRI_SHIFT)) & DMA_DCHPRI24_GRPPRI_MASK)
-#define DMA_DCHPRI24_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI24_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI24_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_DPA_SHIFT)) & DMA_DCHPRI24_DPA_MASK)
-#define DMA_DCHPRI24_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI24_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI24_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_ECP_SHIFT)) & DMA_DCHPRI24_ECP_MASK)
+#define DMA_DCHPRI24_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI24_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI24_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_CHPRI_SHIFT)) & DMA_DCHPRI24_CHPRI_MASK)
+#define DMA_DCHPRI24_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI24_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI24_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_GRPPRI_SHIFT)) & DMA_DCHPRI24_GRPPRI_MASK)
+#define DMA_DCHPRI24_DPA_MASK     (0x40U)
+#define DMA_DCHPRI24_DPA_SHIFT    (6U)
+#define DMA_DCHPRI24_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_DPA_SHIFT)) & DMA_DCHPRI24_DPA_MASK)
+#define DMA_DCHPRI24_ECP_MASK     (0x80U)
+#define DMA_DCHPRI24_ECP_SHIFT    (7U)
+#define DMA_DCHPRI24_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI24_ECP_SHIFT)) & DMA_DCHPRI24_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI31 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI31_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI31_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI31_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_CHPRI_SHIFT)) & DMA_DCHPRI31_CHPRI_MASK)
-#define DMA_DCHPRI31_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI31_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI31_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_GRPPRI_SHIFT)) & DMA_DCHPRI31_GRPPRI_MASK)
-#define DMA_DCHPRI31_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI31_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI31_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_DPA_SHIFT)) & DMA_DCHPRI31_DPA_MASK)
-#define DMA_DCHPRI31_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI31_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI31_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_ECP_SHIFT)) & DMA_DCHPRI31_ECP_MASK)
+#define DMA_DCHPRI31_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI31_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI31_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_CHPRI_SHIFT)) & DMA_DCHPRI31_CHPRI_MASK)
+#define DMA_DCHPRI31_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI31_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI31_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_GRPPRI_SHIFT)) & DMA_DCHPRI31_GRPPRI_MASK)
+#define DMA_DCHPRI31_DPA_MASK     (0x40U)
+#define DMA_DCHPRI31_DPA_SHIFT    (6U)
+#define DMA_DCHPRI31_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_DPA_SHIFT)) & DMA_DCHPRI31_DPA_MASK)
+#define DMA_DCHPRI31_ECP_MASK     (0x80U)
+#define DMA_DCHPRI31_ECP_SHIFT    (7U)
+#define DMA_DCHPRI31_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI31_ECP_SHIFT)) & DMA_DCHPRI31_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI30 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI30_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI30_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI30_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_CHPRI_SHIFT)) & DMA_DCHPRI30_CHPRI_MASK)
-#define DMA_DCHPRI30_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI30_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI30_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_GRPPRI_SHIFT)) & DMA_DCHPRI30_GRPPRI_MASK)
-#define DMA_DCHPRI30_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI30_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI30_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_DPA_SHIFT)) & DMA_DCHPRI30_DPA_MASK)
-#define DMA_DCHPRI30_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI30_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI30_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_ECP_SHIFT)) & DMA_DCHPRI30_ECP_MASK)
+#define DMA_DCHPRI30_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI30_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI30_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_CHPRI_SHIFT)) & DMA_DCHPRI30_CHPRI_MASK)
+#define DMA_DCHPRI30_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI30_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI30_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_GRPPRI_SHIFT)) & DMA_DCHPRI30_GRPPRI_MASK)
+#define DMA_DCHPRI30_DPA_MASK     (0x40U)
+#define DMA_DCHPRI30_DPA_SHIFT    (6U)
+#define DMA_DCHPRI30_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_DPA_SHIFT)) & DMA_DCHPRI30_DPA_MASK)
+#define DMA_DCHPRI30_ECP_MASK     (0x80U)
+#define DMA_DCHPRI30_ECP_SHIFT    (7U)
+#define DMA_DCHPRI30_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI30_ECP_SHIFT)) & DMA_DCHPRI30_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI29 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI29_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI29_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI29_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_CHPRI_SHIFT)) & DMA_DCHPRI29_CHPRI_MASK)
-#define DMA_DCHPRI29_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI29_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI29_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_GRPPRI_SHIFT)) & DMA_DCHPRI29_GRPPRI_MASK)
-#define DMA_DCHPRI29_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI29_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI29_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_DPA_SHIFT)) & DMA_DCHPRI29_DPA_MASK)
-#define DMA_DCHPRI29_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI29_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI29_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_ECP_SHIFT)) & DMA_DCHPRI29_ECP_MASK)
+#define DMA_DCHPRI29_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI29_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI29_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_CHPRI_SHIFT)) & DMA_DCHPRI29_CHPRI_MASK)
+#define DMA_DCHPRI29_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI29_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI29_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_GRPPRI_SHIFT)) & DMA_DCHPRI29_GRPPRI_MASK)
+#define DMA_DCHPRI29_DPA_MASK     (0x40U)
+#define DMA_DCHPRI29_DPA_SHIFT    (6U)
+#define DMA_DCHPRI29_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_DPA_SHIFT)) & DMA_DCHPRI29_DPA_MASK)
+#define DMA_DCHPRI29_ECP_MASK     (0x80U)
+#define DMA_DCHPRI29_ECP_SHIFT    (7U)
+#define DMA_DCHPRI29_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI29_ECP_SHIFT)) & DMA_DCHPRI29_ECP_MASK)
 /*! @} */
 
 /*! @name DCHPRI28 - Channel n Priority Register */
 /*! @{ */
-#define DMA_DCHPRI28_CHPRI_MASK                  (0xFU)
-#define DMA_DCHPRI28_CHPRI_SHIFT                 (0U)
-#define DMA_DCHPRI28_CHPRI(x)                    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_CHPRI_SHIFT)) & DMA_DCHPRI28_CHPRI_MASK)
-#define DMA_DCHPRI28_GRPPRI_MASK                 (0x30U)
-#define DMA_DCHPRI28_GRPPRI_SHIFT                (4U)
-#define DMA_DCHPRI28_GRPPRI(x)                   (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_GRPPRI_SHIFT)) & DMA_DCHPRI28_GRPPRI_MASK)
-#define DMA_DCHPRI28_DPA_MASK                    (0x40U)
-#define DMA_DCHPRI28_DPA_SHIFT                   (6U)
-#define DMA_DCHPRI28_DPA(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_DPA_SHIFT)) & DMA_DCHPRI28_DPA_MASK)
-#define DMA_DCHPRI28_ECP_MASK                    (0x80U)
-#define DMA_DCHPRI28_ECP_SHIFT                   (7U)
-#define DMA_DCHPRI28_ECP(x)                      (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_ECP_SHIFT)) & DMA_DCHPRI28_ECP_MASK)
+#define DMA_DCHPRI28_CHPRI_MASK   (0xFU)
+#define DMA_DCHPRI28_CHPRI_SHIFT  (0U)
+#define DMA_DCHPRI28_CHPRI(x)     (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_CHPRI_SHIFT)) & DMA_DCHPRI28_CHPRI_MASK)
+#define DMA_DCHPRI28_GRPPRI_MASK  (0x30U)
+#define DMA_DCHPRI28_GRPPRI_SHIFT (4U)
+#define DMA_DCHPRI28_GRPPRI(x)    (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_GRPPRI_SHIFT)) & DMA_DCHPRI28_GRPPRI_MASK)
+#define DMA_DCHPRI28_DPA_MASK     (0x40U)
+#define DMA_DCHPRI28_DPA_SHIFT    (6U)
+#define DMA_DCHPRI28_DPA(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_DPA_SHIFT)) & DMA_DCHPRI28_DPA_MASK)
+#define DMA_DCHPRI28_ECP_MASK     (0x80U)
+#define DMA_DCHPRI28_ECP_SHIFT    (7U)
+#define DMA_DCHPRI28_ECP(x)       (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI28_ECP_SHIFT)) & DMA_DCHPRI28_ECP_MASK)
 /*! @} */
 
 /*! @name SADDR - TCD Source Address */
 /*! @{ */
-#define DMA_SADDR_SADDR_MASK                     (0xFFFFFFFFU)
-#define DMA_SADDR_SADDR_SHIFT                    (0U)
-#define DMA_SADDR_SADDR(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_SADDR_SADDR_SHIFT)) & DMA_SADDR_SADDR_MASK)
+#define DMA_SADDR_SADDR_MASK  (0xFFFFFFFFU)
+#define DMA_SADDR_SADDR_SHIFT (0U)
+#define DMA_SADDR_SADDR(x)    (((uint32_t)(((uint32_t)(x)) << DMA_SADDR_SADDR_SHIFT)) & DMA_SADDR_SADDR_MASK)
 /*! @} */
 
 /* The count of DMA_SADDR */
-#define DMA_SADDR_COUNT                          (32U)
+#define DMA_SADDR_COUNT (32U)
 
 /*! @name SOFF - TCD Signed Source Address Offset */
 /*! @{ */
-#define DMA_SOFF_SOFF_MASK                       (0xFFFFU)
-#define DMA_SOFF_SOFF_SHIFT                      (0U)
-#define DMA_SOFF_SOFF(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_SOFF_SOFF_SHIFT)) & DMA_SOFF_SOFF_MASK)
+#define DMA_SOFF_SOFF_MASK  (0xFFFFU)
+#define DMA_SOFF_SOFF_SHIFT (0U)
+#define DMA_SOFF_SOFF(x)    (((uint16_t)(((uint16_t)(x)) << DMA_SOFF_SOFF_SHIFT)) & DMA_SOFF_SOFF_MASK)
 /*! @} */
 
 /* The count of DMA_SOFF */
-#define DMA_SOFF_COUNT                           (32U)
+#define DMA_SOFF_COUNT (32U)
 
 /*! @name ATTR - TCD Transfer Attributes */
 /*! @{ */
-#define DMA_ATTR_DSIZE_MASK                      (0x7U)
-#define DMA_ATTR_DSIZE_SHIFT                     (0U)
-#define DMA_ATTR_DSIZE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DSIZE_SHIFT)) & DMA_ATTR_DSIZE_MASK)
-#define DMA_ATTR_DMOD_MASK                       (0xF8U)
-#define DMA_ATTR_DMOD_SHIFT                      (3U)
-#define DMA_ATTR_DMOD(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DMOD_SHIFT)) & DMA_ATTR_DMOD_MASK)
-#define DMA_ATTR_SSIZE_MASK                      (0x700U)
-#define DMA_ATTR_SSIZE_SHIFT                     (8U)
-#define DMA_ATTR_SSIZE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SSIZE_SHIFT)) & DMA_ATTR_SSIZE_MASK)
-#define DMA_ATTR_SMOD_MASK                       (0xF800U)
-#define DMA_ATTR_SMOD_SHIFT                      (11U)
-#define DMA_ATTR_SMOD(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SMOD_SHIFT)) & DMA_ATTR_SMOD_MASK)
+#define DMA_ATTR_DSIZE_MASK  (0x7U)
+#define DMA_ATTR_DSIZE_SHIFT (0U)
+#define DMA_ATTR_DSIZE(x)    (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DSIZE_SHIFT)) & DMA_ATTR_DSIZE_MASK)
+#define DMA_ATTR_DMOD_MASK   (0xF8U)
+#define DMA_ATTR_DMOD_SHIFT  (3U)
+#define DMA_ATTR_DMOD(x)     (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_DMOD_SHIFT)) & DMA_ATTR_DMOD_MASK)
+#define DMA_ATTR_SSIZE_MASK  (0x700U)
+#define DMA_ATTR_SSIZE_SHIFT (8U)
+#define DMA_ATTR_SSIZE(x)    (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SSIZE_SHIFT)) & DMA_ATTR_SSIZE_MASK)
+#define DMA_ATTR_SMOD_MASK   (0xF800U)
+#define DMA_ATTR_SMOD_SHIFT  (11U)
+#define DMA_ATTR_SMOD(x)     (((uint16_t)(((uint16_t)(x)) << DMA_ATTR_SMOD_SHIFT)) & DMA_ATTR_SMOD_MASK)
 /*! @} */
 
 /* The count of DMA_ATTR */
-#define DMA_ATTR_COUNT                           (32U)
+#define DMA_ATTR_COUNT (32U)
 
 /*! @name NBYTES_MLNO - TCD Minor Byte Count (Minor Loop Mapping Disabled) */
 /*! @{ */
-#define DMA_NBYTES_MLNO_NBYTES_MASK              (0xFFFFFFFFU)
-#define DMA_NBYTES_MLNO_NBYTES_SHIFT             (0U)
-#define DMA_NBYTES_MLNO_NBYTES(x)                (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLNO_NBYTES_SHIFT)) & DMA_NBYTES_MLNO_NBYTES_MASK)
+#define DMA_NBYTES_MLNO_NBYTES_MASK  (0xFFFFFFFFU)
+#define DMA_NBYTES_MLNO_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLNO_NBYTES(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLNO_NBYTES_SHIFT)) & DMA_NBYTES_MLNO_NBYTES_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLNO */
-#define DMA_NBYTES_MLNO_COUNT                    (32U)
+#define DMA_NBYTES_MLNO_COUNT (32U)
 
 /*! @name NBYTES_MLOFFNO - TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled) */
 /*! @{ */
-#define DMA_NBYTES_MLOFFNO_NBYTES_MASK           (0x3FFFFFFFU)
-#define DMA_NBYTES_MLOFFNO_NBYTES_SHIFT          (0U)
-#define DMA_NBYTES_MLOFFNO_NBYTES(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFNO_NBYTES_MASK)
-#define DMA_NBYTES_MLOFFNO_DMLOE_MASK            (0x40000000U)
-#define DMA_NBYTES_MLOFFNO_DMLOE_SHIFT           (30U)
-#define DMA_NBYTES_MLOFFNO_DMLOE(x)              (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_DMLOE_MASK)
-#define DMA_NBYTES_MLOFFNO_SMLOE_MASK            (0x80000000U)
-#define DMA_NBYTES_MLOFFNO_SMLOE_SHIFT           (31U)
-#define DMA_NBYTES_MLOFFNO_SMLOE(x)              (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_SMLOE_MASK)
+#define DMA_NBYTES_MLOFFNO_NBYTES_MASK  (0x3FFFFFFFU)
+#define DMA_NBYTES_MLOFFNO_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLOFFNO_NBYTES(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFNO_NBYTES_MASK)
+#define DMA_NBYTES_MLOFFNO_DMLOE_MASK  (0x40000000U)
+#define DMA_NBYTES_MLOFFNO_DMLOE_SHIFT (30U)
+#define DMA_NBYTES_MLOFFNO_DMLOE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_DMLOE_MASK)
+#define DMA_NBYTES_MLOFFNO_SMLOE_MASK  (0x80000000U)
+#define DMA_NBYTES_MLOFFNO_SMLOE_SHIFT (31U)
+#define DMA_NBYTES_MLOFFNO_SMLOE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFNO_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFNO_SMLOE_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLOFFNO */
-#define DMA_NBYTES_MLOFFNO_COUNT                 (32U)
+#define DMA_NBYTES_MLOFFNO_COUNT (32U)
 
 /*! @name NBYTES_MLOFFYES - TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled) */
 /*! @{ */
-#define DMA_NBYTES_MLOFFYES_NBYTES_MASK          (0x3FFU)
-#define DMA_NBYTES_MLOFFYES_NBYTES_SHIFT         (0U)
-#define DMA_NBYTES_MLOFFYES_NBYTES(x)            (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFYES_NBYTES_MASK)
-#define DMA_NBYTES_MLOFFYES_MLOFF_MASK           (0x3FFFFC00U)
-#define DMA_NBYTES_MLOFFYES_MLOFF_SHIFT          (10U)
-#define DMA_NBYTES_MLOFFYES_MLOFF(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_MLOFF_SHIFT)) & DMA_NBYTES_MLOFFYES_MLOFF_MASK)
-#define DMA_NBYTES_MLOFFYES_DMLOE_MASK           (0x40000000U)
-#define DMA_NBYTES_MLOFFYES_DMLOE_SHIFT          (30U)
-#define DMA_NBYTES_MLOFFYES_DMLOE(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_DMLOE_MASK)
-#define DMA_NBYTES_MLOFFYES_SMLOE_MASK           (0x80000000U)
-#define DMA_NBYTES_MLOFFYES_SMLOE_SHIFT          (31U)
-#define DMA_NBYTES_MLOFFYES_SMLOE(x)             (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_SMLOE_MASK)
+#define DMA_NBYTES_MLOFFYES_NBYTES_MASK  (0x3FFU)
+#define DMA_NBYTES_MLOFFYES_NBYTES_SHIFT (0U)
+#define DMA_NBYTES_MLOFFYES_NBYTES(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_NBYTES_SHIFT)) & DMA_NBYTES_MLOFFYES_NBYTES_MASK)
+#define DMA_NBYTES_MLOFFYES_MLOFF_MASK  (0x3FFFFC00U)
+#define DMA_NBYTES_MLOFFYES_MLOFF_SHIFT (10U)
+#define DMA_NBYTES_MLOFFYES_MLOFF(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_MLOFF_SHIFT)) & DMA_NBYTES_MLOFFYES_MLOFF_MASK)
+#define DMA_NBYTES_MLOFFYES_DMLOE_MASK  (0x40000000U)
+#define DMA_NBYTES_MLOFFYES_DMLOE_SHIFT (30U)
+#define DMA_NBYTES_MLOFFYES_DMLOE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_DMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_DMLOE_MASK)
+#define DMA_NBYTES_MLOFFYES_SMLOE_MASK  (0x80000000U)
+#define DMA_NBYTES_MLOFFYES_SMLOE_SHIFT (31U)
+#define DMA_NBYTES_MLOFFYES_SMLOE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << DMA_NBYTES_MLOFFYES_SMLOE_SHIFT)) & DMA_NBYTES_MLOFFYES_SMLOE_MASK)
 /*! @} */
 
 /* The count of DMA_NBYTES_MLOFFYES */
-#define DMA_NBYTES_MLOFFYES_COUNT                (32U)
+#define DMA_NBYTES_MLOFFYES_COUNT (32U)
 
 /*! @name SLAST - TCD Last Source Address Adjustment */
 /*! @{ */
-#define DMA_SLAST_SLAST_MASK                     (0xFFFFFFFFU)
-#define DMA_SLAST_SLAST_SHIFT                    (0U)
-#define DMA_SLAST_SLAST(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_SLAST_SLAST_SHIFT)) & DMA_SLAST_SLAST_MASK)
+#define DMA_SLAST_SLAST_MASK  (0xFFFFFFFFU)
+#define DMA_SLAST_SLAST_SHIFT (0U)
+#define DMA_SLAST_SLAST(x)    (((uint32_t)(((uint32_t)(x)) << DMA_SLAST_SLAST_SHIFT)) & DMA_SLAST_SLAST_MASK)
 /*! @} */
 
 /* The count of DMA_SLAST */
-#define DMA_SLAST_COUNT                          (32U)
+#define DMA_SLAST_COUNT (32U)
 
 /*! @name DADDR - TCD Destination Address */
 /*! @{ */
-#define DMA_DADDR_DADDR_MASK                     (0xFFFFFFFFU)
-#define DMA_DADDR_DADDR_SHIFT                    (0U)
-#define DMA_DADDR_DADDR(x)                       (((uint32_t)(((uint32_t)(x)) << DMA_DADDR_DADDR_SHIFT)) & DMA_DADDR_DADDR_MASK)
+#define DMA_DADDR_DADDR_MASK  (0xFFFFFFFFU)
+#define DMA_DADDR_DADDR_SHIFT (0U)
+#define DMA_DADDR_DADDR(x)    (((uint32_t)(((uint32_t)(x)) << DMA_DADDR_DADDR_SHIFT)) & DMA_DADDR_DADDR_MASK)
 /*! @} */
 
 /* The count of DMA_DADDR */
-#define DMA_DADDR_COUNT                          (32U)
+#define DMA_DADDR_COUNT (32U)
 
 /*! @name DOFF - TCD Signed Destination Address Offset */
 /*! @{ */
-#define DMA_DOFF_DOFF_MASK                       (0xFFFFU)
-#define DMA_DOFF_DOFF_SHIFT                      (0U)
-#define DMA_DOFF_DOFF(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_DOFF_DOFF_SHIFT)) & DMA_DOFF_DOFF_MASK)
+#define DMA_DOFF_DOFF_MASK  (0xFFFFU)
+#define DMA_DOFF_DOFF_SHIFT (0U)
+#define DMA_DOFF_DOFF(x)    (((uint16_t)(((uint16_t)(x)) << DMA_DOFF_DOFF_SHIFT)) & DMA_DOFF_DOFF_MASK)
 /*! @} */
 
 /* The count of DMA_DOFF */
-#define DMA_DOFF_COUNT                           (32U)
+#define DMA_DOFF_COUNT (32U)
 
 /*! @name CITER_ELINKNO - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled) */
 /*! @{ */
-#define DMA_CITER_ELINKNO_CITER_MASK             (0x7FFFU)
-#define DMA_CITER_ELINKNO_CITER_SHIFT            (0U)
-#define DMA_CITER_ELINKNO_CITER(x)               (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_CITER_SHIFT)) & DMA_CITER_ELINKNO_CITER_MASK)
-#define DMA_CITER_ELINKNO_ELINK_MASK             (0x8000U)
-#define DMA_CITER_ELINKNO_ELINK_SHIFT            (15U)
-#define DMA_CITER_ELINKNO_ELINK(x)               (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_ELINK_SHIFT)) & DMA_CITER_ELINKNO_ELINK_MASK)
+#define DMA_CITER_ELINKNO_CITER_MASK  (0x7FFFU)
+#define DMA_CITER_ELINKNO_CITER_SHIFT (0U)
+#define DMA_CITER_ELINKNO_CITER(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_CITER_SHIFT)) & DMA_CITER_ELINKNO_CITER_MASK)
+#define DMA_CITER_ELINKNO_ELINK_MASK  (0x8000U)
+#define DMA_CITER_ELINKNO_ELINK_SHIFT (15U)
+#define DMA_CITER_ELINKNO_ELINK(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKNO_ELINK_SHIFT)) & DMA_CITER_ELINKNO_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_CITER_ELINKNO */
-#define DMA_CITER_ELINKNO_COUNT                  (32U)
+#define DMA_CITER_ELINKNO_COUNT (32U)
 
 /*! @name CITER_ELINKYES - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled) */
 /*! @{ */
-#define DMA_CITER_ELINKYES_CITER_MASK            (0x1FFU)
-#define DMA_CITER_ELINKYES_CITER_SHIFT           (0U)
-#define DMA_CITER_ELINKYES_CITER(x)              (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_CITER_SHIFT)) & DMA_CITER_ELINKYES_CITER_MASK)
-#define DMA_CITER_ELINKYES_LINKCH_MASK           (0x3E00U)
-#define DMA_CITER_ELINKYES_LINKCH_SHIFT          (9U)
-#define DMA_CITER_ELINKYES_LINKCH(x)             (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_LINKCH_SHIFT)) & DMA_CITER_ELINKYES_LINKCH_MASK)
-#define DMA_CITER_ELINKYES_ELINK_MASK            (0x8000U)
-#define DMA_CITER_ELINKYES_ELINK_SHIFT           (15U)
-#define DMA_CITER_ELINKYES_ELINK(x)              (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_ELINK_SHIFT)) & DMA_CITER_ELINKYES_ELINK_MASK)
+#define DMA_CITER_ELINKYES_CITER_MASK  (0x1FFU)
+#define DMA_CITER_ELINKYES_CITER_SHIFT (0U)
+#define DMA_CITER_ELINKYES_CITER(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_CITER_SHIFT)) & DMA_CITER_ELINKYES_CITER_MASK)
+#define DMA_CITER_ELINKYES_LINKCH_MASK  (0x3E00U)
+#define DMA_CITER_ELINKYES_LINKCH_SHIFT (9U)
+#define DMA_CITER_ELINKYES_LINKCH(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_LINKCH_SHIFT)) & DMA_CITER_ELINKYES_LINKCH_MASK)
+#define DMA_CITER_ELINKYES_ELINK_MASK  (0x8000U)
+#define DMA_CITER_ELINKYES_ELINK_SHIFT (15U)
+#define DMA_CITER_ELINKYES_ELINK(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_CITER_ELINKYES_ELINK_SHIFT)) & DMA_CITER_ELINKYES_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_CITER_ELINKYES */
-#define DMA_CITER_ELINKYES_COUNT                 (32U)
+#define DMA_CITER_ELINKYES_COUNT (32U)
 
 /*! @name DLAST_SGA - TCD Last Destination Address Adjustment/Scatter Gather Address */
 /*! @{ */
-#define DMA_DLAST_SGA_DLASTSGA_MASK              (0xFFFFFFFFU)
-#define DMA_DLAST_SGA_DLASTSGA_SHIFT             (0U)
-#define DMA_DLAST_SGA_DLASTSGA(x)                (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
+#define DMA_DLAST_SGA_DLASTSGA_MASK  (0xFFFFFFFFU)
+#define DMA_DLAST_SGA_DLASTSGA_SHIFT (0U)
+#define DMA_DLAST_SGA_DLASTSGA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
 /*! @} */
 
 /* The count of DMA_DLAST_SGA */
-#define DMA_DLAST_SGA_COUNT                      (32U)
+#define DMA_DLAST_SGA_COUNT (32U)
 
 /*! @name CSR - TCD Control and Status */
 /*! @{ */
-#define DMA_CSR_START_MASK                       (0x1U)
-#define DMA_CSR_START_SHIFT                      (0U)
-#define DMA_CSR_START(x)                         (((uint16_t)(((uint16_t)(x)) << DMA_CSR_START_SHIFT)) & DMA_CSR_START_MASK)
-#define DMA_CSR_INTMAJOR_MASK                    (0x2U)
-#define DMA_CSR_INTMAJOR_SHIFT                   (1U)
-#define DMA_CSR_INTMAJOR(x)                      (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTMAJOR_SHIFT)) & DMA_CSR_INTMAJOR_MASK)
-#define DMA_CSR_INTHALF_MASK                     (0x4U)
-#define DMA_CSR_INTHALF_SHIFT                    (2U)
-#define DMA_CSR_INTHALF(x)                       (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTHALF_SHIFT)) & DMA_CSR_INTHALF_MASK)
-#define DMA_CSR_DREQ_MASK                        (0x8U)
-#define DMA_CSR_DREQ_SHIFT                       (3U)
-#define DMA_CSR_DREQ(x)                          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DREQ_SHIFT)) & DMA_CSR_DREQ_MASK)
-#define DMA_CSR_ESG_MASK                         (0x10U)
-#define DMA_CSR_ESG_SHIFT                        (4U)
-#define DMA_CSR_ESG(x)                           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ESG_SHIFT)) & DMA_CSR_ESG_MASK)
-#define DMA_CSR_MAJORELINK_MASK                  (0x20U)
-#define DMA_CSR_MAJORELINK_SHIFT                 (5U)
-#define DMA_CSR_MAJORELINK(x)                    (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORELINK_SHIFT)) & DMA_CSR_MAJORELINK_MASK)
-#define DMA_CSR_ACTIVE_MASK                      (0x40U)
-#define DMA_CSR_ACTIVE_SHIFT                     (6U)
-#define DMA_CSR_ACTIVE(x)                        (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ACTIVE_SHIFT)) & DMA_CSR_ACTIVE_MASK)
-#define DMA_CSR_DONE_MASK                        (0x80U)
-#define DMA_CSR_DONE_SHIFT                       (7U)
-#define DMA_CSR_DONE(x)                          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)
-#define DMA_CSR_MAJORLINKCH_MASK                 (0x1F00U)
-#define DMA_CSR_MAJORLINKCH_SHIFT                (8U)
-#define DMA_CSR_MAJORLINKCH(x)                   (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORLINKCH_SHIFT)) & DMA_CSR_MAJORLINKCH_MASK)
-#define DMA_CSR_BWC_MASK                         (0xC000U)
-#define DMA_CSR_BWC_SHIFT                        (14U)
-#define DMA_CSR_BWC(x)                           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_BWC_SHIFT)) & DMA_CSR_BWC_MASK)
+#define DMA_CSR_START_MASK        (0x1U)
+#define DMA_CSR_START_SHIFT       (0U)
+#define DMA_CSR_START(x)          (((uint16_t)(((uint16_t)(x)) << DMA_CSR_START_SHIFT)) & DMA_CSR_START_MASK)
+#define DMA_CSR_INTMAJOR_MASK     (0x2U)
+#define DMA_CSR_INTMAJOR_SHIFT    (1U)
+#define DMA_CSR_INTMAJOR(x)       (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTMAJOR_SHIFT)) & DMA_CSR_INTMAJOR_MASK)
+#define DMA_CSR_INTHALF_MASK      (0x4U)
+#define DMA_CSR_INTHALF_SHIFT     (2U)
+#define DMA_CSR_INTHALF(x)        (((uint16_t)(((uint16_t)(x)) << DMA_CSR_INTHALF_SHIFT)) & DMA_CSR_INTHALF_MASK)
+#define DMA_CSR_DREQ_MASK         (0x8U)
+#define DMA_CSR_DREQ_SHIFT        (3U)
+#define DMA_CSR_DREQ(x)           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DREQ_SHIFT)) & DMA_CSR_DREQ_MASK)
+#define DMA_CSR_ESG_MASK          (0x10U)
+#define DMA_CSR_ESG_SHIFT         (4U)
+#define DMA_CSR_ESG(x)            (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ESG_SHIFT)) & DMA_CSR_ESG_MASK)
+#define DMA_CSR_MAJORELINK_MASK   (0x20U)
+#define DMA_CSR_MAJORELINK_SHIFT  (5U)
+#define DMA_CSR_MAJORELINK(x)     (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORELINK_SHIFT)) & DMA_CSR_MAJORELINK_MASK)
+#define DMA_CSR_ACTIVE_MASK       (0x40U)
+#define DMA_CSR_ACTIVE_SHIFT      (6U)
+#define DMA_CSR_ACTIVE(x)         (((uint16_t)(((uint16_t)(x)) << DMA_CSR_ACTIVE_SHIFT)) & DMA_CSR_ACTIVE_MASK)
+#define DMA_CSR_DONE_MASK         (0x80U)
+#define DMA_CSR_DONE_SHIFT        (7U)
+#define DMA_CSR_DONE(x)           (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)
+#define DMA_CSR_MAJORLINKCH_MASK  (0x1F00U)
+#define DMA_CSR_MAJORLINKCH_SHIFT (8U)
+#define DMA_CSR_MAJORLINKCH(x)    (((uint16_t)(((uint16_t)(x)) << DMA_CSR_MAJORLINKCH_SHIFT)) & DMA_CSR_MAJORLINKCH_MASK)
+#define DMA_CSR_BWC_MASK          (0xC000U)
+#define DMA_CSR_BWC_SHIFT         (14U)
+#define DMA_CSR_BWC(x)            (((uint16_t)(((uint16_t)(x)) << DMA_CSR_BWC_SHIFT)) & DMA_CSR_BWC_MASK)
 /*! @} */
 
 /* The count of DMA_CSR */
-#define DMA_CSR_COUNT                            (32U)
+#define DMA_CSR_COUNT (32U)
 
 /*! @name BITER_ELINKNO - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled) */
 /*! @{ */
-#define DMA_BITER_ELINKNO_BITER_MASK             (0x7FFFU)
-#define DMA_BITER_ELINKNO_BITER_SHIFT            (0U)
-#define DMA_BITER_ELINKNO_BITER(x)               (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_BITER_SHIFT)) & DMA_BITER_ELINKNO_BITER_MASK)
-#define DMA_BITER_ELINKNO_ELINK_MASK             (0x8000U)
-#define DMA_BITER_ELINKNO_ELINK_SHIFT            (15U)
-#define DMA_BITER_ELINKNO_ELINK(x)               (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_ELINK_SHIFT)) & DMA_BITER_ELINKNO_ELINK_MASK)
+#define DMA_BITER_ELINKNO_BITER_MASK  (0x7FFFU)
+#define DMA_BITER_ELINKNO_BITER_SHIFT (0U)
+#define DMA_BITER_ELINKNO_BITER(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_BITER_SHIFT)) & DMA_BITER_ELINKNO_BITER_MASK)
+#define DMA_BITER_ELINKNO_ELINK_MASK  (0x8000U)
+#define DMA_BITER_ELINKNO_ELINK_SHIFT (15U)
+#define DMA_BITER_ELINKNO_ELINK(x)                                                                                     \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKNO_ELINK_SHIFT)) & DMA_BITER_ELINKNO_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_BITER_ELINKNO */
-#define DMA_BITER_ELINKNO_COUNT                  (32U)
+#define DMA_BITER_ELINKNO_COUNT (32U)
 
 /*! @name BITER_ELINKYES - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled) */
 /*! @{ */
-#define DMA_BITER_ELINKYES_BITER_MASK            (0x1FFU)
-#define DMA_BITER_ELINKYES_BITER_SHIFT           (0U)
-#define DMA_BITER_ELINKYES_BITER(x)              (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_BITER_SHIFT)) & DMA_BITER_ELINKYES_BITER_MASK)
-#define DMA_BITER_ELINKYES_LINKCH_MASK           (0x3E00U)
-#define DMA_BITER_ELINKYES_LINKCH_SHIFT          (9U)
-#define DMA_BITER_ELINKYES_LINKCH(x)             (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_LINKCH_SHIFT)) & DMA_BITER_ELINKYES_LINKCH_MASK)
-#define DMA_BITER_ELINKYES_ELINK_MASK            (0x8000U)
-#define DMA_BITER_ELINKYES_ELINK_SHIFT           (15U)
-#define DMA_BITER_ELINKYES_ELINK(x)              (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_ELINK_SHIFT)) & DMA_BITER_ELINKYES_ELINK_MASK)
+#define DMA_BITER_ELINKYES_BITER_MASK  (0x1FFU)
+#define DMA_BITER_ELINKYES_BITER_SHIFT (0U)
+#define DMA_BITER_ELINKYES_BITER(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_BITER_SHIFT)) & DMA_BITER_ELINKYES_BITER_MASK)
+#define DMA_BITER_ELINKYES_LINKCH_MASK  (0x3E00U)
+#define DMA_BITER_ELINKYES_LINKCH_SHIFT (9U)
+#define DMA_BITER_ELINKYES_LINKCH(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_LINKCH_SHIFT)) & DMA_BITER_ELINKYES_LINKCH_MASK)
+#define DMA_BITER_ELINKYES_ELINK_MASK  (0x8000U)
+#define DMA_BITER_ELINKYES_ELINK_SHIFT (15U)
+#define DMA_BITER_ELINKYES_ELINK(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << DMA_BITER_ELINKYES_ELINK_SHIFT)) & DMA_BITER_ELINKYES_ELINK_MASK)
 /*! @} */
 
 /* The count of DMA_BITER_ELINKYES */
-#define DMA_BITER_ELINKYES_COUNT                 (32U)
-
+#define DMA_BITER_ELINKYES_COUNT (32U)
 
 /*!
  * @}
  */ /* end of group DMA_Register_Masks */
 
-
 /* DMA - Peripheral instance base addresses */
 /** Peripheral DMA0 base address */
-#define DMA0_BASE                                (0x400E8000u)
+#define DMA0_BASE (0x400E8000u)
 /** Peripheral DMA0 base pointer */
-#define DMA0                                     ((DMA_Type *)DMA0_BASE)
+#define DMA0 ((DMA_Type *)DMA0_BASE)
 /** Array initializer of DMA peripheral base addresses */
-#define DMA_BASE_ADDRS                           { DMA0_BASE }
+#define DMA_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        DMA0_BASE                                                                                                      \
+    }
 /** Array initializer of DMA peripheral base pointers */
-#define DMA_BASE_PTRS                            { DMA0 }
+#define DMA_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        DMA0                                                                                                           \
+    }
 /** Interrupt vectors for the DMA peripheral type */
-#define DMA_CHN_IRQS                             { { DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn, DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn, DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn, DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn } }
-#define DMA_ERROR_IRQS                           { DMA_ERROR_IRQn }
+#define DMA_CHN_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {                                                                                                              \
+            DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn,      \
+                DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn,                  \
+                DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn,              \
+                DMA0_DMA16_IRQn, DMA1_DMA17_IRQn, DMA2_DMA18_IRQn, DMA3_DMA19_IRQn, DMA4_DMA20_IRQn, DMA5_DMA21_IRQn,  \
+                DMA6_DMA22_IRQn, DMA7_DMA23_IRQn, DMA8_DMA24_IRQn, DMA9_DMA25_IRQn, DMA10_DMA26_IRQn,                  \
+                DMA11_DMA27_IRQn, DMA12_DMA28_IRQn, DMA13_DMA29_IRQn, DMA14_DMA30_IRQn, DMA15_DMA31_IRQn               \
+        }                                                                                                              \
+    }
+#define DMA_ERROR_IRQS                                                                                                 \
+    {                                                                                                                  \
+        DMA_ERROR_IRQn                                                                                                 \
+    }
 
 /*!
  * @}
  */ /* end of group DMA_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- DMAMUX Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8596,8 +9905,10 @@ typedef struct {
  */
 
 /** DMAMUX - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CHCFG[32];                         /**< Channel 0 Configuration Register..Channel 31 Configuration Register, array offset: 0x0, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t CHCFG[32]; /**< Channel 0 Configuration Register..Channel 31 Configuration Register, array offset:
+                                0x0, array step: 0x4 */
 } DMAMUX_Type;
 
 /* ----------------------------------------------------------------------------
@@ -8611,44 +9922,47 @@ typedef struct {
 
 /*! @name CHCFG - Channel 0 Configuration Register..Channel 31 Configuration Register */
 /*! @{ */
-#define DMAMUX_CHCFG_SOURCE_MASK                 (0x7FU)
-#define DMAMUX_CHCFG_SOURCE_SHIFT                (0U)
-#define DMAMUX_CHCFG_SOURCE(x)                   (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
-#define DMAMUX_CHCFG_A_ON_MASK                   (0x20000000U)
-#define DMAMUX_CHCFG_A_ON_SHIFT                  (29U)
-#define DMAMUX_CHCFG_A_ON(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_A_ON_SHIFT)) & DMAMUX_CHCFG_A_ON_MASK)
-#define DMAMUX_CHCFG_TRIG_MASK                   (0x40000000U)
-#define DMAMUX_CHCFG_TRIG_SHIFT                  (30U)
-#define DMAMUX_CHCFG_TRIG(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
-#define DMAMUX_CHCFG_ENBL_MASK                   (0x80000000U)
-#define DMAMUX_CHCFG_ENBL_SHIFT                  (31U)
-#define DMAMUX_CHCFG_ENBL(x)                     (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
+#define DMAMUX_CHCFG_SOURCE_MASK  (0x7FU)
+#define DMAMUX_CHCFG_SOURCE_SHIFT (0U)
+#define DMAMUX_CHCFG_SOURCE(x)    (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_SOURCE_SHIFT)) & DMAMUX_CHCFG_SOURCE_MASK)
+#define DMAMUX_CHCFG_A_ON_MASK    (0x20000000U)
+#define DMAMUX_CHCFG_A_ON_SHIFT   (29U)
+#define DMAMUX_CHCFG_A_ON(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_A_ON_SHIFT)) & DMAMUX_CHCFG_A_ON_MASK)
+#define DMAMUX_CHCFG_TRIG_MASK    (0x40000000U)
+#define DMAMUX_CHCFG_TRIG_SHIFT   (30U)
+#define DMAMUX_CHCFG_TRIG(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
+#define DMAMUX_CHCFG_ENBL_MASK    (0x80000000U)
+#define DMAMUX_CHCFG_ENBL_SHIFT   (31U)
+#define DMAMUX_CHCFG_ENBL(x)      (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
 /*! @} */
 
 /* The count of DMAMUX_CHCFG */
-#define DMAMUX_CHCFG_COUNT                       (32U)
-
+#define DMAMUX_CHCFG_COUNT (32U)
 
 /*!
  * @}
  */ /* end of group DMAMUX_Register_Masks */
 
-
 /* DMAMUX - Peripheral instance base addresses */
 /** Peripheral DMAMUX base address */
-#define DMAMUX_BASE                              (0x400EC000u)
+#define DMAMUX_BASE (0x400EC000u)
 /** Peripheral DMAMUX base pointer */
-#define DMAMUX                                   ((DMAMUX_Type *)DMAMUX_BASE)
+#define DMAMUX ((DMAMUX_Type *)DMAMUX_BASE)
 /** Array initializer of DMAMUX peripheral base addresses */
-#define DMAMUX_BASE_ADDRS                        { DMAMUX_BASE }
+#define DMAMUX_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        DMAMUX_BASE                                                                                                    \
+    }
 /** Array initializer of DMAMUX peripheral base pointers */
-#define DMAMUX_BASE_PTRS                         { DMAMUX }
+#define DMAMUX_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        DMAMUX                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group DMAMUX_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ENC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8659,27 +9973,28 @@ typedef struct {
  */
 
 /** ENC - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t CTRL;                              /**< Control Register, offset: 0x0 */
-  __IO uint16_t FILT;                              /**< Input Filter Register, offset: 0x2 */
-  __IO uint16_t WTR;                               /**< Watchdog Timeout Register, offset: 0x4 */
-  __IO uint16_t POSD;                              /**< Position Difference Counter Register, offset: 0x6 */
-  __I  uint16_t POSDH;                             /**< Position Difference Hold Register, offset: 0x8 */
-  __IO uint16_t REV;                               /**< Revolution Counter Register, offset: 0xA */
-  __I  uint16_t REVH;                              /**< Revolution Hold Register, offset: 0xC */
-  __IO uint16_t UPOS;                              /**< Upper Position Counter Register, offset: 0xE */
-  __IO uint16_t LPOS;                              /**< Lower Position Counter Register, offset: 0x10 */
-  __I  uint16_t UPOSH;                             /**< Upper Position Hold Register, offset: 0x12 */
-  __I  uint16_t LPOSH;                             /**< Lower Position Hold Register, offset: 0x14 */
-  __IO uint16_t UINIT;                             /**< Upper Initialization Register, offset: 0x16 */
-  __IO uint16_t LINIT;                             /**< Lower Initialization Register, offset: 0x18 */
-  __I  uint16_t IMR;                               /**< Input Monitor Register, offset: 0x1A */
-  __IO uint16_t TST;                               /**< Test Register, offset: 0x1C */
-  __IO uint16_t CTRL2;                             /**< Control 2 Register, offset: 0x1E */
-  __IO uint16_t UMOD;                              /**< Upper Modulus Register, offset: 0x20 */
-  __IO uint16_t LMOD;                              /**< Lower Modulus Register, offset: 0x22 */
-  __IO uint16_t UCOMP;                             /**< Upper Position Compare Register, offset: 0x24 */
-  __IO uint16_t LCOMP;                             /**< Lower Position Compare Register, offset: 0x26 */
+typedef struct
+{
+    __IO uint16_t CTRL;  /**< Control Register, offset: 0x0 */
+    __IO uint16_t FILT;  /**< Input Filter Register, offset: 0x2 */
+    __IO uint16_t WTR;   /**< Watchdog Timeout Register, offset: 0x4 */
+    __IO uint16_t POSD;  /**< Position Difference Counter Register, offset: 0x6 */
+    __I uint16_t POSDH;  /**< Position Difference Hold Register, offset: 0x8 */
+    __IO uint16_t REV;   /**< Revolution Counter Register, offset: 0xA */
+    __I uint16_t REVH;   /**< Revolution Hold Register, offset: 0xC */
+    __IO uint16_t UPOS;  /**< Upper Position Counter Register, offset: 0xE */
+    __IO uint16_t LPOS;  /**< Lower Position Counter Register, offset: 0x10 */
+    __I uint16_t UPOSH;  /**< Upper Position Hold Register, offset: 0x12 */
+    __I uint16_t LPOSH;  /**< Lower Position Hold Register, offset: 0x14 */
+    __IO uint16_t UINIT; /**< Upper Initialization Register, offset: 0x16 */
+    __IO uint16_t LINIT; /**< Lower Initialization Register, offset: 0x18 */
+    __I uint16_t IMR;    /**< Input Monitor Register, offset: 0x1A */
+    __IO uint16_t TST;   /**< Test Register, offset: 0x1C */
+    __IO uint16_t CTRL2; /**< Control 2 Register, offset: 0x1E */
+    __IO uint16_t UMOD;  /**< Upper Modulus Register, offset: 0x20 */
+    __IO uint16_t LMOD;  /**< Lower Modulus Register, offset: 0x22 */
+    __IO uint16_t UCOMP; /**< Upper Position Compare Register, offset: 0x24 */
+    __IO uint16_t LCOMP; /**< Lower Position Compare Register, offset: 0x26 */
 } ENC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -8693,297 +10008,315 @@ typedef struct {
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define ENC_CTRL_CMPIE_MASK                      (0x1U)
-#define ENC_CTRL_CMPIE_SHIFT                     (0U)
-#define ENC_CTRL_CMPIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)
-#define ENC_CTRL_CMPIRQ_MASK                     (0x2U)
-#define ENC_CTRL_CMPIRQ_SHIFT                    (1U)
-#define ENC_CTRL_CMPIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)
-#define ENC_CTRL_WDE_MASK                        (0x4U)
-#define ENC_CTRL_WDE_SHIFT                       (2U)
-#define ENC_CTRL_WDE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)
-#define ENC_CTRL_DIE_MASK                        (0x8U)
-#define ENC_CTRL_DIE_SHIFT                       (3U)
-#define ENC_CTRL_DIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)
-#define ENC_CTRL_DIRQ_MASK                       (0x10U)
-#define ENC_CTRL_DIRQ_SHIFT                      (4U)
-#define ENC_CTRL_DIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)
-#define ENC_CTRL_XNE_MASK                        (0x20U)
-#define ENC_CTRL_XNE_SHIFT                       (5U)
-#define ENC_CTRL_XNE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)
-#define ENC_CTRL_XIP_MASK                        (0x40U)
-#define ENC_CTRL_XIP_SHIFT                       (6U)
-#define ENC_CTRL_XIP(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)
-#define ENC_CTRL_XIE_MASK                        (0x80U)
-#define ENC_CTRL_XIE_SHIFT                       (7U)
-#define ENC_CTRL_XIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)
-#define ENC_CTRL_XIRQ_MASK                       (0x100U)
-#define ENC_CTRL_XIRQ_SHIFT                      (8U)
-#define ENC_CTRL_XIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)
-#define ENC_CTRL_PH1_MASK                        (0x200U)
-#define ENC_CTRL_PH1_SHIFT                       (9U)
-#define ENC_CTRL_PH1(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)
-#define ENC_CTRL_REV_MASK                        (0x400U)
-#define ENC_CTRL_REV_SHIFT                       (10U)
-#define ENC_CTRL_REV(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)
-#define ENC_CTRL_SWIP_MASK                       (0x800U)
-#define ENC_CTRL_SWIP_SHIFT                      (11U)
-#define ENC_CTRL_SWIP(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)
-#define ENC_CTRL_HNE_MASK                        (0x1000U)
-#define ENC_CTRL_HNE_SHIFT                       (12U)
-#define ENC_CTRL_HNE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)
-#define ENC_CTRL_HIP_MASK                        (0x2000U)
-#define ENC_CTRL_HIP_SHIFT                       (13U)
-#define ENC_CTRL_HIP(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)
-#define ENC_CTRL_HIE_MASK                        (0x4000U)
-#define ENC_CTRL_HIE_SHIFT                       (14U)
-#define ENC_CTRL_HIE(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)
-#define ENC_CTRL_HIRQ_MASK                       (0x8000U)
-#define ENC_CTRL_HIRQ_SHIFT                      (15U)
-#define ENC_CTRL_HIRQ(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)
+#define ENC_CTRL_CMPIE_MASK   (0x1U)
+#define ENC_CTRL_CMPIE_SHIFT  (0U)
+#define ENC_CTRL_CMPIE(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)
+#define ENC_CTRL_CMPIRQ_MASK  (0x2U)
+#define ENC_CTRL_CMPIRQ_SHIFT (1U)
+#define ENC_CTRL_CMPIRQ(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)
+#define ENC_CTRL_WDE_MASK     (0x4U)
+#define ENC_CTRL_WDE_SHIFT    (2U)
+#define ENC_CTRL_WDE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)
+#define ENC_CTRL_DIE_MASK     (0x8U)
+#define ENC_CTRL_DIE_SHIFT    (3U)
+#define ENC_CTRL_DIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)
+#define ENC_CTRL_DIRQ_MASK    (0x10U)
+#define ENC_CTRL_DIRQ_SHIFT   (4U)
+#define ENC_CTRL_DIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)
+#define ENC_CTRL_XNE_MASK     (0x20U)
+#define ENC_CTRL_XNE_SHIFT    (5U)
+#define ENC_CTRL_XNE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)
+#define ENC_CTRL_XIP_MASK     (0x40U)
+#define ENC_CTRL_XIP_SHIFT    (6U)
+#define ENC_CTRL_XIP(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)
+#define ENC_CTRL_XIE_MASK     (0x80U)
+#define ENC_CTRL_XIE_SHIFT    (7U)
+#define ENC_CTRL_XIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)
+#define ENC_CTRL_XIRQ_MASK    (0x100U)
+#define ENC_CTRL_XIRQ_SHIFT   (8U)
+#define ENC_CTRL_XIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)
+#define ENC_CTRL_PH1_MASK     (0x200U)
+#define ENC_CTRL_PH1_SHIFT    (9U)
+#define ENC_CTRL_PH1(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)
+#define ENC_CTRL_REV_MASK     (0x400U)
+#define ENC_CTRL_REV_SHIFT    (10U)
+#define ENC_CTRL_REV(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)
+#define ENC_CTRL_SWIP_MASK    (0x800U)
+#define ENC_CTRL_SWIP_SHIFT   (11U)
+#define ENC_CTRL_SWIP(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)
+#define ENC_CTRL_HNE_MASK     (0x1000U)
+#define ENC_CTRL_HNE_SHIFT    (12U)
+#define ENC_CTRL_HNE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)
+#define ENC_CTRL_HIP_MASK     (0x2000U)
+#define ENC_CTRL_HIP_SHIFT    (13U)
+#define ENC_CTRL_HIP(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)
+#define ENC_CTRL_HIE_MASK     (0x4000U)
+#define ENC_CTRL_HIE_SHIFT    (14U)
+#define ENC_CTRL_HIE(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)
+#define ENC_CTRL_HIRQ_MASK    (0x8000U)
+#define ENC_CTRL_HIRQ_SHIFT   (15U)
+#define ENC_CTRL_HIRQ(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)
 /*! @} */
 
 /*! @name FILT - Input Filter Register */
 /*! @{ */
-#define ENC_FILT_FILT_PER_MASK                   (0xFFU)
-#define ENC_FILT_FILT_PER_SHIFT                  (0U)
-#define ENC_FILT_FILT_PER(x)                     (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)
-#define ENC_FILT_FILT_CNT_MASK                   (0x700U)
-#define ENC_FILT_FILT_CNT_SHIFT                  (8U)
-#define ENC_FILT_FILT_CNT(x)                     (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)
+#define ENC_FILT_FILT_PER_MASK  (0xFFU)
+#define ENC_FILT_FILT_PER_SHIFT (0U)
+#define ENC_FILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)
+#define ENC_FILT_FILT_CNT_MASK  (0x700U)
+#define ENC_FILT_FILT_CNT_SHIFT (8U)
+#define ENC_FILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)
 /*! @} */
 
 /*! @name WTR - Watchdog Timeout Register */
 /*! @{ */
-#define ENC_WTR_WDOG_MASK                        (0xFFFFU)
-#define ENC_WTR_WDOG_SHIFT                       (0U)
-#define ENC_WTR_WDOG(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)
+#define ENC_WTR_WDOG_MASK  (0xFFFFU)
+#define ENC_WTR_WDOG_SHIFT (0U)
+#define ENC_WTR_WDOG(x)    (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)
 /*! @} */
 
 /*! @name POSD - Position Difference Counter Register */
 /*! @{ */
-#define ENC_POSD_POSD_MASK                       (0xFFFFU)
-#define ENC_POSD_POSD_SHIFT                      (0U)
-#define ENC_POSD_POSD(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)
+#define ENC_POSD_POSD_MASK  (0xFFFFU)
+#define ENC_POSD_POSD_SHIFT (0U)
+#define ENC_POSD_POSD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)
 /*! @} */
 
 /*! @name POSDH - Position Difference Hold Register */
 /*! @{ */
-#define ENC_POSDH_POSDH_MASK                     (0xFFFFU)
-#define ENC_POSDH_POSDH_SHIFT                    (0U)
-#define ENC_POSDH_POSDH(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)
+#define ENC_POSDH_POSDH_MASK  (0xFFFFU)
+#define ENC_POSDH_POSDH_SHIFT (0U)
+#define ENC_POSDH_POSDH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)
 /*! @} */
 
 /*! @name REV - Revolution Counter Register */
 /*! @{ */
-#define ENC_REV_REV_MASK                         (0xFFFFU)
-#define ENC_REV_REV_SHIFT                        (0U)
-#define ENC_REV_REV(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)
+#define ENC_REV_REV_MASK  (0xFFFFU)
+#define ENC_REV_REV_SHIFT (0U)
+#define ENC_REV_REV(x)    (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)
 /*! @} */
 
 /*! @name REVH - Revolution Hold Register */
 /*! @{ */
-#define ENC_REVH_REVH_MASK                       (0xFFFFU)
-#define ENC_REVH_REVH_SHIFT                      (0U)
-#define ENC_REVH_REVH(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)
+#define ENC_REVH_REVH_MASK  (0xFFFFU)
+#define ENC_REVH_REVH_SHIFT (0U)
+#define ENC_REVH_REVH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)
 /*! @} */
 
 /*! @name UPOS - Upper Position Counter Register */
 /*! @{ */
-#define ENC_UPOS_POS_MASK                        (0xFFFFU)
-#define ENC_UPOS_POS_SHIFT                       (0U)
-#define ENC_UPOS_POS(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)
+#define ENC_UPOS_POS_MASK  (0xFFFFU)
+#define ENC_UPOS_POS_SHIFT (0U)
+#define ENC_UPOS_POS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)
 /*! @} */
 
 /*! @name LPOS - Lower Position Counter Register */
 /*! @{ */
-#define ENC_LPOS_POS_MASK                        (0xFFFFU)
-#define ENC_LPOS_POS_SHIFT                       (0U)
-#define ENC_LPOS_POS(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)
+#define ENC_LPOS_POS_MASK  (0xFFFFU)
+#define ENC_LPOS_POS_SHIFT (0U)
+#define ENC_LPOS_POS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)
 /*! @} */
 
 /*! @name UPOSH - Upper Position Hold Register */
 /*! @{ */
-#define ENC_UPOSH_POSH_MASK                      (0xFFFFU)
-#define ENC_UPOSH_POSH_SHIFT                     (0U)
-#define ENC_UPOSH_POSH(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)
+#define ENC_UPOSH_POSH_MASK  (0xFFFFU)
+#define ENC_UPOSH_POSH_SHIFT (0U)
+#define ENC_UPOSH_POSH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)
 /*! @} */
 
 /*! @name LPOSH - Lower Position Hold Register */
 /*! @{ */
-#define ENC_LPOSH_POSH_MASK                      (0xFFFFU)
-#define ENC_LPOSH_POSH_SHIFT                     (0U)
-#define ENC_LPOSH_POSH(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)
+#define ENC_LPOSH_POSH_MASK  (0xFFFFU)
+#define ENC_LPOSH_POSH_SHIFT (0U)
+#define ENC_LPOSH_POSH(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)
 /*! @} */
 
 /*! @name UINIT - Upper Initialization Register */
 /*! @{ */
-#define ENC_UINIT_INIT_MASK                      (0xFFFFU)
-#define ENC_UINIT_INIT_SHIFT                     (0U)
-#define ENC_UINIT_INIT(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)
+#define ENC_UINIT_INIT_MASK  (0xFFFFU)
+#define ENC_UINIT_INIT_SHIFT (0U)
+#define ENC_UINIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)
 /*! @} */
 
 /*! @name LINIT - Lower Initialization Register */
 /*! @{ */
-#define ENC_LINIT_INIT_MASK                      (0xFFFFU)
-#define ENC_LINIT_INIT_SHIFT                     (0U)
-#define ENC_LINIT_INIT(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)
+#define ENC_LINIT_INIT_MASK  (0xFFFFU)
+#define ENC_LINIT_INIT_SHIFT (0U)
+#define ENC_LINIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)
 /*! @} */
 
 /*! @name IMR - Input Monitor Register */
 /*! @{ */
-#define ENC_IMR_HOME_MASK                        (0x1U)
-#define ENC_IMR_HOME_SHIFT                       (0U)
-#define ENC_IMR_HOME(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)
-#define ENC_IMR_INDEX_MASK                       (0x2U)
-#define ENC_IMR_INDEX_SHIFT                      (1U)
-#define ENC_IMR_INDEX(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)
-#define ENC_IMR_PHB_MASK                         (0x4U)
-#define ENC_IMR_PHB_SHIFT                        (2U)
-#define ENC_IMR_PHB(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)
-#define ENC_IMR_PHA_MASK                         (0x8U)
-#define ENC_IMR_PHA_SHIFT                        (3U)
-#define ENC_IMR_PHA(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)
-#define ENC_IMR_FHOM_MASK                        (0x10U)
-#define ENC_IMR_FHOM_SHIFT                       (4U)
-#define ENC_IMR_FHOM(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)
-#define ENC_IMR_FIND_MASK                        (0x20U)
-#define ENC_IMR_FIND_SHIFT                       (5U)
-#define ENC_IMR_FIND(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)
-#define ENC_IMR_FPHB_MASK                        (0x40U)
-#define ENC_IMR_FPHB_SHIFT                       (6U)
-#define ENC_IMR_FPHB(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)
-#define ENC_IMR_FPHA_MASK                        (0x80U)
-#define ENC_IMR_FPHA_SHIFT                       (7U)
-#define ENC_IMR_FPHA(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)
+#define ENC_IMR_HOME_MASK   (0x1U)
+#define ENC_IMR_HOME_SHIFT  (0U)
+#define ENC_IMR_HOME(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)
+#define ENC_IMR_INDEX_MASK  (0x2U)
+#define ENC_IMR_INDEX_SHIFT (1U)
+#define ENC_IMR_INDEX(x)    (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)
+#define ENC_IMR_PHB_MASK    (0x4U)
+#define ENC_IMR_PHB_SHIFT   (2U)
+#define ENC_IMR_PHB(x)      (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)
+#define ENC_IMR_PHA_MASK    (0x8U)
+#define ENC_IMR_PHA_SHIFT   (3U)
+#define ENC_IMR_PHA(x)      (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)
+#define ENC_IMR_FHOM_MASK   (0x10U)
+#define ENC_IMR_FHOM_SHIFT  (4U)
+#define ENC_IMR_FHOM(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)
+#define ENC_IMR_FIND_MASK   (0x20U)
+#define ENC_IMR_FIND_SHIFT  (5U)
+#define ENC_IMR_FIND(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)
+#define ENC_IMR_FPHB_MASK   (0x40U)
+#define ENC_IMR_FPHB_SHIFT  (6U)
+#define ENC_IMR_FPHB(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)
+#define ENC_IMR_FPHA_MASK   (0x80U)
+#define ENC_IMR_FPHA_SHIFT  (7U)
+#define ENC_IMR_FPHA(x)     (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)
 /*! @} */
 
 /*! @name TST - Test Register */
 /*! @{ */
-#define ENC_TST_TEST_COUNT_MASK                  (0xFFU)
-#define ENC_TST_TEST_COUNT_SHIFT                 (0U)
-#define ENC_TST_TEST_COUNT(x)                    (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)
-#define ENC_TST_TEST_PERIOD_MASK                 (0x1F00U)
-#define ENC_TST_TEST_PERIOD_SHIFT                (8U)
-#define ENC_TST_TEST_PERIOD(x)                   (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)
-#define ENC_TST_QDN_MASK                         (0x2000U)
-#define ENC_TST_QDN_SHIFT                        (13U)
-#define ENC_TST_QDN(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)
-#define ENC_TST_TCE_MASK                         (0x4000U)
-#define ENC_TST_TCE_SHIFT                        (14U)
-#define ENC_TST_TCE(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)
-#define ENC_TST_TEN_MASK                         (0x8000U)
-#define ENC_TST_TEN_SHIFT                        (15U)
-#define ENC_TST_TEN(x)                           (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)
+#define ENC_TST_TEST_COUNT_MASK   (0xFFU)
+#define ENC_TST_TEST_COUNT_SHIFT  (0U)
+#define ENC_TST_TEST_COUNT(x)     (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)
+#define ENC_TST_TEST_PERIOD_MASK  (0x1F00U)
+#define ENC_TST_TEST_PERIOD_SHIFT (8U)
+#define ENC_TST_TEST_PERIOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)
+#define ENC_TST_QDN_MASK          (0x2000U)
+#define ENC_TST_QDN_SHIFT         (13U)
+#define ENC_TST_QDN(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)
+#define ENC_TST_TCE_MASK          (0x4000U)
+#define ENC_TST_TCE_SHIFT         (14U)
+#define ENC_TST_TCE(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)
+#define ENC_TST_TEN_MASK          (0x8000U)
+#define ENC_TST_TEN_SHIFT         (15U)
+#define ENC_TST_TEN(x)            (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)
 /*! @} */
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define ENC_CTRL2_UPDHLD_MASK                    (0x1U)
-#define ENC_CTRL2_UPDHLD_SHIFT                   (0U)
-#define ENC_CTRL2_UPDHLD(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)
-#define ENC_CTRL2_UPDPOS_MASK                    (0x2U)
-#define ENC_CTRL2_UPDPOS_SHIFT                   (1U)
-#define ENC_CTRL2_UPDPOS(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)
-#define ENC_CTRL2_MOD_MASK                       (0x4U)
-#define ENC_CTRL2_MOD_SHIFT                      (2U)
-#define ENC_CTRL2_MOD(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)
-#define ENC_CTRL2_DIR_MASK                       (0x8U)
-#define ENC_CTRL2_DIR_SHIFT                      (3U)
-#define ENC_CTRL2_DIR(x)                         (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)
-#define ENC_CTRL2_RUIE_MASK                      (0x10U)
-#define ENC_CTRL2_RUIE_SHIFT                     (4U)
-#define ENC_CTRL2_RUIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)
-#define ENC_CTRL2_RUIRQ_MASK                     (0x20U)
-#define ENC_CTRL2_RUIRQ_SHIFT                    (5U)
-#define ENC_CTRL2_RUIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)
-#define ENC_CTRL2_ROIE_MASK                      (0x40U)
-#define ENC_CTRL2_ROIE_SHIFT                     (6U)
-#define ENC_CTRL2_ROIE(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)
-#define ENC_CTRL2_ROIRQ_MASK                     (0x80U)
-#define ENC_CTRL2_ROIRQ_SHIFT                    (7U)
-#define ENC_CTRL2_ROIRQ(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)
-#define ENC_CTRL2_REVMOD_MASK                    (0x100U)
-#define ENC_CTRL2_REVMOD_SHIFT                   (8U)
-#define ENC_CTRL2_REVMOD(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)
-#define ENC_CTRL2_OUTCTL_MASK                    (0x200U)
-#define ENC_CTRL2_OUTCTL_SHIFT                   (9U)
-#define ENC_CTRL2_OUTCTL(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)
-#define ENC_CTRL2_SABIE_MASK                     (0x400U)
-#define ENC_CTRL2_SABIE_SHIFT                    (10U)
-#define ENC_CTRL2_SABIE(x)                       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)
-#define ENC_CTRL2_SABIRQ_MASK                    (0x800U)
-#define ENC_CTRL2_SABIRQ_SHIFT                   (11U)
-#define ENC_CTRL2_SABIRQ(x)                      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)
+#define ENC_CTRL2_UPDHLD_MASK  (0x1U)
+#define ENC_CTRL2_UPDHLD_SHIFT (0U)
+#define ENC_CTRL2_UPDHLD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)
+#define ENC_CTRL2_UPDPOS_MASK  (0x2U)
+#define ENC_CTRL2_UPDPOS_SHIFT (1U)
+#define ENC_CTRL2_UPDPOS(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)
+#define ENC_CTRL2_MOD_MASK     (0x4U)
+#define ENC_CTRL2_MOD_SHIFT    (2U)
+#define ENC_CTRL2_MOD(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)
+#define ENC_CTRL2_DIR_MASK     (0x8U)
+#define ENC_CTRL2_DIR_SHIFT    (3U)
+#define ENC_CTRL2_DIR(x)       (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)
+#define ENC_CTRL2_RUIE_MASK    (0x10U)
+#define ENC_CTRL2_RUIE_SHIFT   (4U)
+#define ENC_CTRL2_RUIE(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)
+#define ENC_CTRL2_RUIRQ_MASK   (0x20U)
+#define ENC_CTRL2_RUIRQ_SHIFT  (5U)
+#define ENC_CTRL2_RUIRQ(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)
+#define ENC_CTRL2_ROIE_MASK    (0x40U)
+#define ENC_CTRL2_ROIE_SHIFT   (6U)
+#define ENC_CTRL2_ROIE(x)      (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)
+#define ENC_CTRL2_ROIRQ_MASK   (0x80U)
+#define ENC_CTRL2_ROIRQ_SHIFT  (7U)
+#define ENC_CTRL2_ROIRQ(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)
+#define ENC_CTRL2_REVMOD_MASK  (0x100U)
+#define ENC_CTRL2_REVMOD_SHIFT (8U)
+#define ENC_CTRL2_REVMOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)
+#define ENC_CTRL2_OUTCTL_MASK  (0x200U)
+#define ENC_CTRL2_OUTCTL_SHIFT (9U)
+#define ENC_CTRL2_OUTCTL(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)
+#define ENC_CTRL2_SABIE_MASK   (0x400U)
+#define ENC_CTRL2_SABIE_SHIFT  (10U)
+#define ENC_CTRL2_SABIE(x)     (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)
+#define ENC_CTRL2_SABIRQ_MASK  (0x800U)
+#define ENC_CTRL2_SABIRQ_SHIFT (11U)
+#define ENC_CTRL2_SABIRQ(x)    (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)
 /*! @} */
 
 /*! @name UMOD - Upper Modulus Register */
 /*! @{ */
-#define ENC_UMOD_MOD_MASK                        (0xFFFFU)
-#define ENC_UMOD_MOD_SHIFT                       (0U)
-#define ENC_UMOD_MOD(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)
+#define ENC_UMOD_MOD_MASK  (0xFFFFU)
+#define ENC_UMOD_MOD_SHIFT (0U)
+#define ENC_UMOD_MOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)
 /*! @} */
 
 /*! @name LMOD - Lower Modulus Register */
 /*! @{ */
-#define ENC_LMOD_MOD_MASK                        (0xFFFFU)
-#define ENC_LMOD_MOD_SHIFT                       (0U)
-#define ENC_LMOD_MOD(x)                          (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)
+#define ENC_LMOD_MOD_MASK  (0xFFFFU)
+#define ENC_LMOD_MOD_SHIFT (0U)
+#define ENC_LMOD_MOD(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)
 /*! @} */
 
 /*! @name UCOMP - Upper Position Compare Register */
 /*! @{ */
-#define ENC_UCOMP_COMP_MASK                      (0xFFFFU)
-#define ENC_UCOMP_COMP_SHIFT                     (0U)
-#define ENC_UCOMP_COMP(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)
+#define ENC_UCOMP_COMP_MASK  (0xFFFFU)
+#define ENC_UCOMP_COMP_SHIFT (0U)
+#define ENC_UCOMP_COMP(x)    (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)
 /*! @} */
 
 /*! @name LCOMP - Lower Position Compare Register */
 /*! @{ */
-#define ENC_LCOMP_COMP_MASK                      (0xFFFFU)
-#define ENC_LCOMP_COMP_SHIFT                     (0U)
-#define ENC_LCOMP_COMP(x)                        (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)
+#define ENC_LCOMP_COMP_MASK  (0xFFFFU)
+#define ENC_LCOMP_COMP_SHIFT (0U)
+#define ENC_LCOMP_COMP(x)    (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ENC_Register_Masks */
 
-
 /* ENC - Peripheral instance base addresses */
 /** Peripheral ENC1 base address */
-#define ENC1_BASE                                (0x403C8000u)
+#define ENC1_BASE (0x403C8000u)
 /** Peripheral ENC1 base pointer */
-#define ENC1                                     ((ENC_Type *)ENC1_BASE)
+#define ENC1 ((ENC_Type *)ENC1_BASE)
 /** Peripheral ENC2 base address */
-#define ENC2_BASE                                (0x403CC000u)
+#define ENC2_BASE (0x403CC000u)
 /** Peripheral ENC2 base pointer */
-#define ENC2                                     ((ENC_Type *)ENC2_BASE)
+#define ENC2 ((ENC_Type *)ENC2_BASE)
 /** Peripheral ENC3 base address */
-#define ENC3_BASE                                (0x403D0000u)
+#define ENC3_BASE (0x403D0000u)
 /** Peripheral ENC3 base pointer */
-#define ENC3                                     ((ENC_Type *)ENC3_BASE)
+#define ENC3 ((ENC_Type *)ENC3_BASE)
 /** Peripheral ENC4 base address */
-#define ENC4_BASE                                (0x403D4000u)
+#define ENC4_BASE (0x403D4000u)
 /** Peripheral ENC4 base pointer */
-#define ENC4                                     ((ENC_Type *)ENC4_BASE)
+#define ENC4 ((ENC_Type *)ENC4_BASE)
 /** Array initializer of ENC peripheral base addresses */
-#define ENC_BASE_ADDRS                           { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
+#define ENC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE                                                                 \
+    }
 /** Array initializer of ENC peripheral base pointers */
-#define ENC_BASE_PTRS                            { (ENC_Type *)0u, ENC1, ENC2, ENC3, ENC4 }
+#define ENC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (ENC_Type *)0u, ENC1, ENC2, ENC3, ENC4                                                                         \
+    }
 /** Interrupt vectors for the ENC peripheral type */
-#define ENC_COMPARE_IRQS                         { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_HOME_IRQS                            { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_WDOG_IRQS                            { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_INDEX_IRQS                           { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
-#define ENC_INPUT_SWITCH_IRQS                    { NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn }
+#define ENC_COMPARE_IRQS                                                                                               \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_HOME_IRQS                                                                                                  \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_WDOG_IRQS                                                                                                  \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_INDEX_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
+#define ENC_INPUT_SWITCH_IRQS                                                                                          \
+    {                                                                                                                  \
+        NotAvail_IRQn, ENC1_IRQn, ENC2_IRQn, ENC3_IRQn, ENC4_IRQn                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group ENC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ENET Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -8994,125 +10327,130 @@ typedef struct {
  */
 
 /** ENET - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[4];
-  __IO uint32_t EIR;                               /**< Interrupt Event Register, offset: 0x4 */
-  __IO uint32_t EIMR;                              /**< Interrupt Mask Register, offset: 0x8 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t RDAR;                              /**< Receive Descriptor Active Register, offset: 0x10 */
-  __IO uint32_t TDAR;                              /**< Transmit Descriptor Active Register, offset: 0x14 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t ECR;                               /**< Ethernet Control Register, offset: 0x24 */
-       uint8_t RESERVED_3[24];
-  __IO uint32_t MMFR;                              /**< MII Management Frame Register, offset: 0x40 */
-  __IO uint32_t MSCR;                              /**< MII Speed Control Register, offset: 0x44 */
-       uint8_t RESERVED_4[28];
-  __IO uint32_t MIBC;                              /**< MIB Control Register, offset: 0x64 */
-       uint8_t RESERVED_5[28];
-  __IO uint32_t RCR;                               /**< Receive Control Register, offset: 0x84 */
-       uint8_t RESERVED_6[60];
-  __IO uint32_t TCR;                               /**< Transmit Control Register, offset: 0xC4 */
-       uint8_t RESERVED_7[28];
-  __IO uint32_t PALR;                              /**< Physical Address Lower Register, offset: 0xE4 */
-  __IO uint32_t PAUR;                              /**< Physical Address Upper Register, offset: 0xE8 */
-  __IO uint32_t OPD;                               /**< Opcode/Pause Duration Register, offset: 0xEC */
-  __IO uint32_t TXIC;                              /**< Transmit Interrupt Coalescing Register, offset: 0xF0 */
-       uint8_t RESERVED_8[12];
-  __IO uint32_t RXIC;                              /**< Receive Interrupt Coalescing Register, offset: 0x100 */
-       uint8_t RESERVED_9[20];
-  __IO uint32_t IAUR;                              /**< Descriptor Individual Upper Address Register, offset: 0x118 */
-  __IO uint32_t IALR;                              /**< Descriptor Individual Lower Address Register, offset: 0x11C */
-  __IO uint32_t GAUR;                              /**< Descriptor Group Upper Address Register, offset: 0x120 */
-  __IO uint32_t GALR;                              /**< Descriptor Group Lower Address Register, offset: 0x124 */
-       uint8_t RESERVED_10[28];
-  __IO uint32_t TFWR;                              /**< Transmit FIFO Watermark Register, offset: 0x144 */
-       uint8_t RESERVED_11[56];
-  __IO uint32_t RDSR;                              /**< Receive Descriptor Ring Start Register, offset: 0x180 */
-  __IO uint32_t TDSR;                              /**< Transmit Buffer Descriptor Ring Start Register, offset: 0x184 */
-  __IO uint32_t MRBR;                              /**< Maximum Receive Buffer Size Register, offset: 0x188 */
-       uint8_t RESERVED_12[4];
-  __IO uint32_t RSFL;                              /**< Receive FIFO Section Full Threshold, offset: 0x190 */
-  __IO uint32_t RSEM;                              /**< Receive FIFO Section Empty Threshold, offset: 0x194 */
-  __IO uint32_t RAEM;                              /**< Receive FIFO Almost Empty Threshold, offset: 0x198 */
-  __IO uint32_t RAFL;                              /**< Receive FIFO Almost Full Threshold, offset: 0x19C */
-  __IO uint32_t TSEM;                              /**< Transmit FIFO Section Empty Threshold, offset: 0x1A0 */
-  __IO uint32_t TAEM;                              /**< Transmit FIFO Almost Empty Threshold, offset: 0x1A4 */
-  __IO uint32_t TAFL;                              /**< Transmit FIFO Almost Full Threshold, offset: 0x1A8 */
-  __IO uint32_t TIPG;                              /**< Transmit Inter-Packet Gap, offset: 0x1AC */
-  __IO uint32_t FTRL;                              /**< Frame Truncation Length, offset: 0x1B0 */
-       uint8_t RESERVED_13[12];
-  __IO uint32_t TACC;                              /**< Transmit Accelerator Function Configuration, offset: 0x1C0 */
-  __IO uint32_t RACC;                              /**< Receive Accelerator Function Configuration, offset: 0x1C4 */
-       uint8_t RESERVED_14[56];
-       uint32_t RMON_T_DROP;                       /**< Reserved Statistic Register, offset: 0x200 */
-  __I  uint32_t RMON_T_PACKETS;                    /**< Tx Packet Count Statistic Register, offset: 0x204 */
-  __I  uint32_t RMON_T_BC_PKT;                     /**< Tx Broadcast Packets Statistic Register, offset: 0x208 */
-  __I  uint32_t RMON_T_MC_PKT;                     /**< Tx Multicast Packets Statistic Register, offset: 0x20C */
-  __I  uint32_t RMON_T_CRC_ALIGN;                  /**< Tx Packets with CRC/Align Error Statistic Register, offset: 0x210 */
-  __I  uint32_t RMON_T_UNDERSIZE;                  /**< Tx Packets Less Than Bytes and Good CRC Statistic Register, offset: 0x214 */
-  __I  uint32_t RMON_T_OVERSIZE;                   /**< Tx Packets GT MAX_FL bytes and Good CRC Statistic Register, offset: 0x218 */
-  __I  uint32_t RMON_T_FRAG;                       /**< Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x21C */
-  __I  uint32_t RMON_T_JAB;                        /**< Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register, offset: 0x220 */
-  __I  uint32_t RMON_T_COL;                        /**< Tx Collision Count Statistic Register, offset: 0x224 */
-  __I  uint32_t RMON_T_P64;                        /**< Tx 64-Byte Packets Statistic Register, offset: 0x228 */
-  __I  uint32_t RMON_T_P65TO127;                   /**< Tx 65- to 127-byte Packets Statistic Register, offset: 0x22C */
-  __I  uint32_t RMON_T_P128TO255;                  /**< Tx 128- to 255-byte Packets Statistic Register, offset: 0x230 */
-  __I  uint32_t RMON_T_P256TO511;                  /**< Tx 256- to 511-byte Packets Statistic Register, offset: 0x234 */
-  __I  uint32_t RMON_T_P512TO1023;                 /**< Tx 512- to 1023-byte Packets Statistic Register, offset: 0x238 */
-  __I  uint32_t RMON_T_P1024TO2047;                /**< Tx 1024- to 2047-byte Packets Statistic Register, offset: 0x23C */
-  __I  uint32_t RMON_T_P_GTE2048;                  /**< Tx Packets Greater Than 2048 Bytes Statistic Register, offset: 0x240 */
-  __I  uint32_t RMON_T_OCTETS;                     /**< Tx Octets Statistic Register, offset: 0x244 */
-       uint32_t IEEE_T_DROP;                       /**< Reserved Statistic Register, offset: 0x248 */
-  __I  uint32_t IEEE_T_FRAME_OK;                   /**< Frames Transmitted OK Statistic Register, offset: 0x24C */
-  __I  uint32_t IEEE_T_1COL;                       /**< Frames Transmitted with Single Collision Statistic Register, offset: 0x250 */
-  __I  uint32_t IEEE_T_MCOL;                       /**< Frames Transmitted with Multiple Collisions Statistic Register, offset: 0x254 */
-  __I  uint32_t IEEE_T_DEF;                        /**< Frames Transmitted after Deferral Delay Statistic Register, offset: 0x258 */
-  __I  uint32_t IEEE_T_LCOL;                       /**< Frames Transmitted with Late Collision Statistic Register, offset: 0x25C */
-  __I  uint32_t IEEE_T_EXCOL;                      /**< Frames Transmitted with Excessive Collisions Statistic Register, offset: 0x260 */
-  __I  uint32_t IEEE_T_MACERR;                     /**< Frames Transmitted with Tx FIFO Underrun Statistic Register, offset: 0x264 */
-  __I  uint32_t IEEE_T_CSERR;                      /**< Frames Transmitted with Carrier Sense Error Statistic Register, offset: 0x268 */
-  __I  uint32_t IEEE_T_SQE;                        /**< Reserved Statistic Register, offset: 0x26C */
-  __I  uint32_t IEEE_T_FDXFC;                      /**< Flow Control Pause Frames Transmitted Statistic Register, offset: 0x270 */
-  __I  uint32_t IEEE_T_OCTETS_OK;                  /**< Octet Count for Frames Transmitted w/o Error Statistic Register, offset: 0x274 */
-       uint8_t RESERVED_15[12];
-  __I  uint32_t RMON_R_PACKETS;                    /**< Rx Packet Count Statistic Register, offset: 0x284 */
-  __I  uint32_t RMON_R_BC_PKT;                     /**< Rx Broadcast Packets Statistic Register, offset: 0x288 */
-  __I  uint32_t RMON_R_MC_PKT;                     /**< Rx Multicast Packets Statistic Register, offset: 0x28C */
-  __I  uint32_t RMON_R_CRC_ALIGN;                  /**< Rx Packets with CRC/Align Error Statistic Register, offset: 0x290 */
-  __I  uint32_t RMON_R_UNDERSIZE;                  /**< Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register, offset: 0x294 */
-  __I  uint32_t RMON_R_OVERSIZE;                   /**< Rx Packets Greater Than MAX_FL and Good CRC Statistic Register, offset: 0x298 */
-  __I  uint32_t RMON_R_FRAG;                       /**< Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x29C */
-  __I  uint32_t RMON_R_JAB;                        /**< Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register, offset: 0x2A0 */
-       uint32_t RMON_R_RESVD_0;                    /**< Reserved Statistic Register, offset: 0x2A4 */
-  __I  uint32_t RMON_R_P64;                        /**< Rx 64-Byte Packets Statistic Register, offset: 0x2A8 */
-  __I  uint32_t RMON_R_P65TO127;                   /**< Rx 65- to 127-Byte Packets Statistic Register, offset: 0x2AC */
-  __I  uint32_t RMON_R_P128TO255;                  /**< Rx 128- to 255-Byte Packets Statistic Register, offset: 0x2B0 */
-  __I  uint32_t RMON_R_P256TO511;                  /**< Rx 256- to 511-Byte Packets Statistic Register, offset: 0x2B4 */
-  __I  uint32_t RMON_R_P512TO1023;                 /**< Rx 512- to 1023-Byte Packets Statistic Register, offset: 0x2B8 */
-  __I  uint32_t RMON_R_P1024TO2047;                /**< Rx 1024- to 2047-Byte Packets Statistic Register, offset: 0x2BC */
-  __I  uint32_t RMON_R_P_GTE2048;                  /**< Rx Packets Greater than 2048 Bytes Statistic Register, offset: 0x2C0 */
-  __I  uint32_t RMON_R_OCTETS;                     /**< Rx Octets Statistic Register, offset: 0x2C4 */
-  __I  uint32_t IEEE_R_DROP;                       /**< Frames not Counted Correctly Statistic Register, offset: 0x2C8 */
-  __I  uint32_t IEEE_R_FRAME_OK;                   /**< Frames Received OK Statistic Register, offset: 0x2CC */
-  __I  uint32_t IEEE_R_CRC;                        /**< Frames Received with CRC Error Statistic Register, offset: 0x2D0 */
-  __I  uint32_t IEEE_R_ALIGN;                      /**< Frames Received with Alignment Error Statistic Register, offset: 0x2D4 */
-  __I  uint32_t IEEE_R_MACERR;                     /**< Receive FIFO Overflow Count Statistic Register, offset: 0x2D8 */
-  __I  uint32_t IEEE_R_FDXFC;                      /**< Flow Control Pause Frames Received Statistic Register, offset: 0x2DC */
-  __I  uint32_t IEEE_R_OCTETS_OK;                  /**< Octet Count for Frames Received without Error Statistic Register, offset: 0x2E0 */
-       uint8_t RESERVED_16[284];
-  __IO uint32_t ATCR;                              /**< Adjustable Timer Control Register, offset: 0x400 */
-  __IO uint32_t ATVR;                              /**< Timer Value Register, offset: 0x404 */
-  __IO uint32_t ATOFF;                             /**< Timer Offset Register, offset: 0x408 */
-  __IO uint32_t ATPER;                             /**< Timer Period Register, offset: 0x40C */
-  __IO uint32_t ATCOR;                             /**< Timer Correction Register, offset: 0x410 */
-  __IO uint32_t ATINC;                             /**< Time-Stamping Clock Period Register, offset: 0x414 */
-  __I  uint32_t ATSTMP;                            /**< Timestamp of Last Transmitted Frame, offset: 0x418 */
-       uint8_t RESERVED_17[488];
-  __IO uint32_t TGSR;                              /**< Timer Global Status Register, offset: 0x604 */
-  struct {                                         /* offset: 0x608, array step: 0x8 */
-    __IO uint32_t TCSR;                              /**< Timer Control Status Register, array offset: 0x608, array step: 0x8 */
-    __IO uint32_t TCCR;                              /**< Timer Compare Capture Register, array offset: 0x60C, array step: 0x8 */
-  } CHANNEL[4];
+typedef struct
+{
+    uint8_t RESERVED_0[4];
+    __IO uint32_t EIR;  /**< Interrupt Event Register, offset: 0x4 */
+    __IO uint32_t EIMR; /**< Interrupt Mask Register, offset: 0x8 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t RDAR; /**< Receive Descriptor Active Register, offset: 0x10 */
+    __IO uint32_t TDAR; /**< Transmit Descriptor Active Register, offset: 0x14 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t ECR; /**< Ethernet Control Register, offset: 0x24 */
+    uint8_t RESERVED_3[24];
+    __IO uint32_t MMFR; /**< MII Management Frame Register, offset: 0x40 */
+    __IO uint32_t MSCR; /**< MII Speed Control Register, offset: 0x44 */
+    uint8_t RESERVED_4[28];
+    __IO uint32_t MIBC; /**< MIB Control Register, offset: 0x64 */
+    uint8_t RESERVED_5[28];
+    __IO uint32_t RCR; /**< Receive Control Register, offset: 0x84 */
+    uint8_t RESERVED_6[60];
+    __IO uint32_t TCR; /**< Transmit Control Register, offset: 0xC4 */
+    uint8_t RESERVED_7[28];
+    __IO uint32_t PALR; /**< Physical Address Lower Register, offset: 0xE4 */
+    __IO uint32_t PAUR; /**< Physical Address Upper Register, offset: 0xE8 */
+    __IO uint32_t OPD;  /**< Opcode/Pause Duration Register, offset: 0xEC */
+    __IO uint32_t TXIC; /**< Transmit Interrupt Coalescing Register, offset: 0xF0 */
+    uint8_t RESERVED_8[12];
+    __IO uint32_t RXIC; /**< Receive Interrupt Coalescing Register, offset: 0x100 */
+    uint8_t RESERVED_9[20];
+    __IO uint32_t IAUR; /**< Descriptor Individual Upper Address Register, offset: 0x118 */
+    __IO uint32_t IALR; /**< Descriptor Individual Lower Address Register, offset: 0x11C */
+    __IO uint32_t GAUR; /**< Descriptor Group Upper Address Register, offset: 0x120 */
+    __IO uint32_t GALR; /**< Descriptor Group Lower Address Register, offset: 0x124 */
+    uint8_t RESERVED_10[28];
+    __IO uint32_t TFWR; /**< Transmit FIFO Watermark Register, offset: 0x144 */
+    uint8_t RESERVED_11[56];
+    __IO uint32_t RDSR; /**< Receive Descriptor Ring Start Register, offset: 0x180 */
+    __IO uint32_t TDSR; /**< Transmit Buffer Descriptor Ring Start Register, offset: 0x184 */
+    __IO uint32_t MRBR; /**< Maximum Receive Buffer Size Register, offset: 0x188 */
+    uint8_t RESERVED_12[4];
+    __IO uint32_t RSFL; /**< Receive FIFO Section Full Threshold, offset: 0x190 */
+    __IO uint32_t RSEM; /**< Receive FIFO Section Empty Threshold, offset: 0x194 */
+    __IO uint32_t RAEM; /**< Receive FIFO Almost Empty Threshold, offset: 0x198 */
+    __IO uint32_t RAFL; /**< Receive FIFO Almost Full Threshold, offset: 0x19C */
+    __IO uint32_t TSEM; /**< Transmit FIFO Section Empty Threshold, offset: 0x1A0 */
+    __IO uint32_t TAEM; /**< Transmit FIFO Almost Empty Threshold, offset: 0x1A4 */
+    __IO uint32_t TAFL; /**< Transmit FIFO Almost Full Threshold, offset: 0x1A8 */
+    __IO uint32_t TIPG; /**< Transmit Inter-Packet Gap, offset: 0x1AC */
+    __IO uint32_t FTRL; /**< Frame Truncation Length, offset: 0x1B0 */
+    uint8_t RESERVED_13[12];
+    __IO uint32_t TACC; /**< Transmit Accelerator Function Configuration, offset: 0x1C0 */
+    __IO uint32_t RACC; /**< Receive Accelerator Function Configuration, offset: 0x1C4 */
+    uint8_t RESERVED_14[56];
+    uint32_t RMON_T_DROP;          /**< Reserved Statistic Register, offset: 0x200 */
+    __I uint32_t RMON_T_PACKETS;   /**< Tx Packet Count Statistic Register, offset: 0x204 */
+    __I uint32_t RMON_T_BC_PKT;    /**< Tx Broadcast Packets Statistic Register, offset: 0x208 */
+    __I uint32_t RMON_T_MC_PKT;    /**< Tx Multicast Packets Statistic Register, offset: 0x20C */
+    __I uint32_t RMON_T_CRC_ALIGN; /**< Tx Packets with CRC/Align Error Statistic Register, offset: 0x210 */
+    __I uint32_t RMON_T_UNDERSIZE; /**< Tx Packets Less Than Bytes and Good CRC Statistic Register, offset: 0x214 */
+    __I uint32_t RMON_T_OVERSIZE;  /**< Tx Packets GT MAX_FL bytes and Good CRC Statistic Register, offset: 0x218 */
+    __I uint32_t RMON_T_FRAG;      /**< Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x21C */
+    __I uint32_t RMON_T_JAB; /**< Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register, offset: 0x220 */
+    __I uint32_t RMON_T_COL; /**< Tx Collision Count Statistic Register, offset: 0x224 */
+    __I uint32_t RMON_T_P64; /**< Tx 64-Byte Packets Statistic Register, offset: 0x228 */
+    __I uint32_t RMON_T_P65TO127;    /**< Tx 65- to 127-byte Packets Statistic Register, offset: 0x22C */
+    __I uint32_t RMON_T_P128TO255;   /**< Tx 128- to 255-byte Packets Statistic Register, offset: 0x230 */
+    __I uint32_t RMON_T_P256TO511;   /**< Tx 256- to 511-byte Packets Statistic Register, offset: 0x234 */
+    __I uint32_t RMON_T_P512TO1023;  /**< Tx 512- to 1023-byte Packets Statistic Register, offset: 0x238 */
+    __I uint32_t RMON_T_P1024TO2047; /**< Tx 1024- to 2047-byte Packets Statistic Register, offset: 0x23C */
+    __I uint32_t RMON_T_P_GTE2048;   /**< Tx Packets Greater Than 2048 Bytes Statistic Register, offset: 0x240 */
+    __I uint32_t RMON_T_OCTETS;      /**< Tx Octets Statistic Register, offset: 0x244 */
+    uint32_t IEEE_T_DROP;            /**< Reserved Statistic Register, offset: 0x248 */
+    __I uint32_t IEEE_T_FRAME_OK;    /**< Frames Transmitted OK Statistic Register, offset: 0x24C */
+    __I uint32_t IEEE_T_1COL;        /**< Frames Transmitted with Single Collision Statistic Register, offset: 0x250 */
+    __I uint32_t IEEE_T_MCOL;   /**< Frames Transmitted with Multiple Collisions Statistic Register, offset: 0x254 */
+    __I uint32_t IEEE_T_DEF;    /**< Frames Transmitted after Deferral Delay Statistic Register, offset: 0x258 */
+    __I uint32_t IEEE_T_LCOL;   /**< Frames Transmitted with Late Collision Statistic Register, offset: 0x25C */
+    __I uint32_t IEEE_T_EXCOL;  /**< Frames Transmitted with Excessive Collisions Statistic Register, offset: 0x260 */
+    __I uint32_t IEEE_T_MACERR; /**< Frames Transmitted with Tx FIFO Underrun Statistic Register, offset: 0x264 */
+    __I uint32_t IEEE_T_CSERR;  /**< Frames Transmitted with Carrier Sense Error Statistic Register, offset: 0x268 */
+    __I uint32_t IEEE_T_SQE;    /**< Reserved Statistic Register, offset: 0x26C */
+    __I uint32_t IEEE_T_FDXFC;  /**< Flow Control Pause Frames Transmitted Statistic Register, offset: 0x270 */
+    __I uint32_t
+        IEEE_T_OCTETS_OK; /**< Octet Count for Frames Transmitted w/o Error Statistic Register, offset: 0x274 */
+    uint8_t RESERVED_15[12];
+    __I uint32_t RMON_R_PACKETS;   /**< Rx Packet Count Statistic Register, offset: 0x284 */
+    __I uint32_t RMON_R_BC_PKT;    /**< Rx Broadcast Packets Statistic Register, offset: 0x288 */
+    __I uint32_t RMON_R_MC_PKT;    /**< Rx Multicast Packets Statistic Register, offset: 0x28C */
+    __I uint32_t RMON_R_CRC_ALIGN; /**< Rx Packets with CRC/Align Error Statistic Register, offset: 0x290 */
+    __I uint32_t
+        RMON_R_UNDERSIZE; /**< Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register, offset: 0x294 */
+    __I uint32_t RMON_R_OVERSIZE; /**< Rx Packets Greater Than MAX_FL and Good CRC Statistic Register, offset: 0x298 */
+    __I uint32_t RMON_R_FRAG;     /**< Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register, offset: 0x29C */
+    __I uint32_t RMON_R_JAB; /**< Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register, offset: 0x2A0 */
+    uint32_t RMON_R_RESVD_0; /**< Reserved Statistic Register, offset: 0x2A4 */
+    __I uint32_t RMON_R_P64; /**< Rx 64-Byte Packets Statistic Register, offset: 0x2A8 */
+    __I uint32_t RMON_R_P65TO127;    /**< Rx 65- to 127-Byte Packets Statistic Register, offset: 0x2AC */
+    __I uint32_t RMON_R_P128TO255;   /**< Rx 128- to 255-Byte Packets Statistic Register, offset: 0x2B0 */
+    __I uint32_t RMON_R_P256TO511;   /**< Rx 256- to 511-Byte Packets Statistic Register, offset: 0x2B4 */
+    __I uint32_t RMON_R_P512TO1023;  /**< Rx 512- to 1023-Byte Packets Statistic Register, offset: 0x2B8 */
+    __I uint32_t RMON_R_P1024TO2047; /**< Rx 1024- to 2047-Byte Packets Statistic Register, offset: 0x2BC */
+    __I uint32_t RMON_R_P_GTE2048;   /**< Rx Packets Greater than 2048 Bytes Statistic Register, offset: 0x2C0 */
+    __I uint32_t RMON_R_OCTETS;      /**< Rx Octets Statistic Register, offset: 0x2C4 */
+    __I uint32_t IEEE_R_DROP;        /**< Frames not Counted Correctly Statistic Register, offset: 0x2C8 */
+    __I uint32_t IEEE_R_FRAME_OK;    /**< Frames Received OK Statistic Register, offset: 0x2CC */
+    __I uint32_t IEEE_R_CRC;         /**< Frames Received with CRC Error Statistic Register, offset: 0x2D0 */
+    __I uint32_t IEEE_R_ALIGN;       /**< Frames Received with Alignment Error Statistic Register, offset: 0x2D4 */
+    __I uint32_t IEEE_R_MACERR;      /**< Receive FIFO Overflow Count Statistic Register, offset: 0x2D8 */
+    __I uint32_t IEEE_R_FDXFC;       /**< Flow Control Pause Frames Received Statistic Register, offset: 0x2DC */
+    __I uint32_t
+        IEEE_R_OCTETS_OK; /**< Octet Count for Frames Received without Error Statistic Register, offset: 0x2E0 */
+    uint8_t RESERVED_16[284];
+    __IO uint32_t ATCR;  /**< Adjustable Timer Control Register, offset: 0x400 */
+    __IO uint32_t ATVR;  /**< Timer Value Register, offset: 0x404 */
+    __IO uint32_t ATOFF; /**< Timer Offset Register, offset: 0x408 */
+    __IO uint32_t ATPER; /**< Timer Period Register, offset: 0x40C */
+    __IO uint32_t ATCOR; /**< Timer Correction Register, offset: 0x410 */
+    __IO uint32_t ATINC; /**< Time-Stamping Clock Period Register, offset: 0x414 */
+    __I uint32_t ATSTMP; /**< Timestamp of Last Transmitted Frame, offset: 0x418 */
+    uint8_t RESERVED_17[488];
+    __IO uint32_t TGSR; /**< Timer Global Status Register, offset: 0x604 */
+    struct
+    {                       /* offset: 0x608, array step: 0x8 */
+        __IO uint32_t TCSR; /**< Timer Control Status Register, array offset: 0x608, array step: 0x8 */
+        __IO uint32_t TCCR; /**< Timer Compare Capture Register, array offset: 0x60C, array step: 0x8 */
+    } CHANNEL[4];
 } ENET_Type;
 
 /* ----------------------------------------------------------------------------
@@ -9126,992 +10464,1069 @@ typedef struct {
 
 /*! @name EIR - Interrupt Event Register */
 /*! @{ */
-#define ENET_EIR_TS_TIMER_MASK                   (0x8000U)
-#define ENET_EIR_TS_TIMER_SHIFT                  (15U)
-#define ENET_EIR_TS_TIMER(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_TIMER_SHIFT)) & ENET_EIR_TS_TIMER_MASK)
-#define ENET_EIR_TS_AVAIL_MASK                   (0x10000U)
-#define ENET_EIR_TS_AVAIL_SHIFT                  (16U)
-#define ENET_EIR_TS_AVAIL(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_AVAIL_SHIFT)) & ENET_EIR_TS_AVAIL_MASK)
-#define ENET_EIR_WAKEUP_MASK                     (0x20000U)
-#define ENET_EIR_WAKEUP_SHIFT                    (17U)
-#define ENET_EIR_WAKEUP(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_EIR_WAKEUP_SHIFT)) & ENET_EIR_WAKEUP_MASK)
-#define ENET_EIR_PLR_MASK                        (0x40000U)
-#define ENET_EIR_PLR_SHIFT                       (18U)
-#define ENET_EIR_PLR(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_PLR_SHIFT)) & ENET_EIR_PLR_MASK)
-#define ENET_EIR_UN_MASK                         (0x80000U)
-#define ENET_EIR_UN_SHIFT                        (19U)
-#define ENET_EIR_UN(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_UN_SHIFT)) & ENET_EIR_UN_MASK)
-#define ENET_EIR_RL_MASK                         (0x100000U)
-#define ENET_EIR_RL_SHIFT                        (20U)
-#define ENET_EIR_RL(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RL_SHIFT)) & ENET_EIR_RL_MASK)
-#define ENET_EIR_LC_MASK                         (0x200000U)
-#define ENET_EIR_LC_SHIFT                        (21U)
-#define ENET_EIR_LC(x)                           (((uint32_t)(((uint32_t)(x)) << ENET_EIR_LC_SHIFT)) & ENET_EIR_LC_MASK)
-#define ENET_EIR_EBERR_MASK                      (0x400000U)
-#define ENET_EIR_EBERR_SHIFT                     (22U)
-#define ENET_EIR_EBERR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_EBERR_SHIFT)) & ENET_EIR_EBERR_MASK)
-#define ENET_EIR_MII_MASK                        (0x800000U)
-#define ENET_EIR_MII_SHIFT                       (23U)
-#define ENET_EIR_MII(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_MII_SHIFT)) & ENET_EIR_MII_MASK)
-#define ENET_EIR_RXB_MASK                        (0x1000000U)
-#define ENET_EIR_RXB_SHIFT                       (24U)
-#define ENET_EIR_RXB(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXB_SHIFT)) & ENET_EIR_RXB_MASK)
-#define ENET_EIR_RXF_MASK                        (0x2000000U)
-#define ENET_EIR_RXF_SHIFT                       (25U)
-#define ENET_EIR_RXF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXF_SHIFT)) & ENET_EIR_RXF_MASK)
-#define ENET_EIR_TXB_MASK                        (0x4000000U)
-#define ENET_EIR_TXB_SHIFT                       (26U)
-#define ENET_EIR_TXB(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXB_SHIFT)) & ENET_EIR_TXB_MASK)
-#define ENET_EIR_TXF_MASK                        (0x8000000U)
-#define ENET_EIR_TXF_SHIFT                       (27U)
-#define ENET_EIR_TXF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXF_SHIFT)) & ENET_EIR_TXF_MASK)
-#define ENET_EIR_GRA_MASK                        (0x10000000U)
-#define ENET_EIR_GRA_SHIFT                       (28U)
-#define ENET_EIR_GRA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_GRA_SHIFT)) & ENET_EIR_GRA_MASK)
-#define ENET_EIR_BABT_MASK                       (0x20000000U)
-#define ENET_EIR_BABT_SHIFT                      (29U)
-#define ENET_EIR_BABT(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABT_SHIFT)) & ENET_EIR_BABT_MASK)
-#define ENET_EIR_BABR_MASK                       (0x40000000U)
-#define ENET_EIR_BABR_SHIFT                      (30U)
-#define ENET_EIR_BABR(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABR_SHIFT)) & ENET_EIR_BABR_MASK)
+#define ENET_EIR_TS_TIMER_MASK  (0x8000U)
+#define ENET_EIR_TS_TIMER_SHIFT (15U)
+#define ENET_EIR_TS_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_TIMER_SHIFT)) & ENET_EIR_TS_TIMER_MASK)
+#define ENET_EIR_TS_AVAIL_MASK  (0x10000U)
+#define ENET_EIR_TS_AVAIL_SHIFT (16U)
+#define ENET_EIR_TS_AVAIL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TS_AVAIL_SHIFT)) & ENET_EIR_TS_AVAIL_MASK)
+#define ENET_EIR_WAKEUP_MASK    (0x20000U)
+#define ENET_EIR_WAKEUP_SHIFT   (17U)
+#define ENET_EIR_WAKEUP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_EIR_WAKEUP_SHIFT)) & ENET_EIR_WAKEUP_MASK)
+#define ENET_EIR_PLR_MASK       (0x40000U)
+#define ENET_EIR_PLR_SHIFT      (18U)
+#define ENET_EIR_PLR(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_PLR_SHIFT)) & ENET_EIR_PLR_MASK)
+#define ENET_EIR_UN_MASK        (0x80000U)
+#define ENET_EIR_UN_SHIFT       (19U)
+#define ENET_EIR_UN(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_UN_SHIFT)) & ENET_EIR_UN_MASK)
+#define ENET_EIR_RL_MASK        (0x100000U)
+#define ENET_EIR_RL_SHIFT       (20U)
+#define ENET_EIR_RL(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RL_SHIFT)) & ENET_EIR_RL_MASK)
+#define ENET_EIR_LC_MASK        (0x200000U)
+#define ENET_EIR_LC_SHIFT       (21U)
+#define ENET_EIR_LC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIR_LC_SHIFT)) & ENET_EIR_LC_MASK)
+#define ENET_EIR_EBERR_MASK     (0x400000U)
+#define ENET_EIR_EBERR_SHIFT    (22U)
+#define ENET_EIR_EBERR(x)       (((uint32_t)(((uint32_t)(x)) << ENET_EIR_EBERR_SHIFT)) & ENET_EIR_EBERR_MASK)
+#define ENET_EIR_MII_MASK       (0x800000U)
+#define ENET_EIR_MII_SHIFT      (23U)
+#define ENET_EIR_MII(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_MII_SHIFT)) & ENET_EIR_MII_MASK)
+#define ENET_EIR_RXB_MASK       (0x1000000U)
+#define ENET_EIR_RXB_SHIFT      (24U)
+#define ENET_EIR_RXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXB_SHIFT)) & ENET_EIR_RXB_MASK)
+#define ENET_EIR_RXF_MASK       (0x2000000U)
+#define ENET_EIR_RXF_SHIFT      (25U)
+#define ENET_EIR_RXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_RXF_SHIFT)) & ENET_EIR_RXF_MASK)
+#define ENET_EIR_TXB_MASK       (0x4000000U)
+#define ENET_EIR_TXB_SHIFT      (26U)
+#define ENET_EIR_TXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXB_SHIFT)) & ENET_EIR_TXB_MASK)
+#define ENET_EIR_TXF_MASK       (0x8000000U)
+#define ENET_EIR_TXF_SHIFT      (27U)
+#define ENET_EIR_TXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_TXF_SHIFT)) & ENET_EIR_TXF_MASK)
+#define ENET_EIR_GRA_MASK       (0x10000000U)
+#define ENET_EIR_GRA_SHIFT      (28U)
+#define ENET_EIR_GRA(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIR_GRA_SHIFT)) & ENET_EIR_GRA_MASK)
+#define ENET_EIR_BABT_MASK      (0x20000000U)
+#define ENET_EIR_BABT_SHIFT     (29U)
+#define ENET_EIR_BABT(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABT_SHIFT)) & ENET_EIR_BABT_MASK)
+#define ENET_EIR_BABR_MASK      (0x40000000U)
+#define ENET_EIR_BABR_SHIFT     (30U)
+#define ENET_EIR_BABR(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIR_BABR_SHIFT)) & ENET_EIR_BABR_MASK)
 /*! @} */
 
 /*! @name EIMR - Interrupt Mask Register */
 /*! @{ */
-#define ENET_EIMR_TS_TIMER_MASK                  (0x8000U)
-#define ENET_EIMR_TS_TIMER_SHIFT                 (15U)
-#define ENET_EIMR_TS_TIMER(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_TIMER_SHIFT)) & ENET_EIMR_TS_TIMER_MASK)
-#define ENET_EIMR_TS_AVAIL_MASK                  (0x10000U)
-#define ENET_EIMR_TS_AVAIL_SHIFT                 (16U)
-#define ENET_EIMR_TS_AVAIL(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_AVAIL_SHIFT)) & ENET_EIMR_TS_AVAIL_MASK)
-#define ENET_EIMR_WAKEUP_MASK                    (0x20000U)
-#define ENET_EIMR_WAKEUP_SHIFT                   (17U)
-#define ENET_EIMR_WAKEUP(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_WAKEUP_SHIFT)) & ENET_EIMR_WAKEUP_MASK)
-#define ENET_EIMR_PLR_MASK                       (0x40000U)
-#define ENET_EIMR_PLR_SHIFT                      (18U)
-#define ENET_EIMR_PLR(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_PLR_SHIFT)) & ENET_EIMR_PLR_MASK)
-#define ENET_EIMR_UN_MASK                        (0x80000U)
-#define ENET_EIMR_UN_SHIFT                       (19U)
-#define ENET_EIMR_UN(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_UN_SHIFT)) & ENET_EIMR_UN_MASK)
-#define ENET_EIMR_RL_MASK                        (0x100000U)
-#define ENET_EIMR_RL_SHIFT                       (20U)
-#define ENET_EIMR_RL(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RL_SHIFT)) & ENET_EIMR_RL_MASK)
-#define ENET_EIMR_LC_MASK                        (0x200000U)
-#define ENET_EIMR_LC_SHIFT                       (21U)
-#define ENET_EIMR_LC(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_LC_SHIFT)) & ENET_EIMR_LC_MASK)
-#define ENET_EIMR_EBERR_MASK                     (0x400000U)
-#define ENET_EIMR_EBERR_SHIFT                    (22U)
-#define ENET_EIMR_EBERR(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_EBERR_SHIFT)) & ENET_EIMR_EBERR_MASK)
-#define ENET_EIMR_MII_MASK                       (0x800000U)
-#define ENET_EIMR_MII_SHIFT                      (23U)
-#define ENET_EIMR_MII(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_MII_SHIFT)) & ENET_EIMR_MII_MASK)
-#define ENET_EIMR_RXB_MASK                       (0x1000000U)
-#define ENET_EIMR_RXB_SHIFT                      (24U)
-#define ENET_EIMR_RXB(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXB_SHIFT)) & ENET_EIMR_RXB_MASK)
-#define ENET_EIMR_RXF_MASK                       (0x2000000U)
-#define ENET_EIMR_RXF_SHIFT                      (25U)
-#define ENET_EIMR_RXF(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXF_SHIFT)) & ENET_EIMR_RXF_MASK)
-#define ENET_EIMR_TXB_MASK                       (0x4000000U)
-#define ENET_EIMR_TXB_SHIFT                      (26U)
-#define ENET_EIMR_TXB(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXB_SHIFT)) & ENET_EIMR_TXB_MASK)
-#define ENET_EIMR_TXF_MASK                       (0x8000000U)
-#define ENET_EIMR_TXF_SHIFT                      (27U)
-#define ENET_EIMR_TXF(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXF_SHIFT)) & ENET_EIMR_TXF_MASK)
-#define ENET_EIMR_GRA_MASK                       (0x10000000U)
-#define ENET_EIMR_GRA_SHIFT                      (28U)
-#define ENET_EIMR_GRA(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_GRA_SHIFT)) & ENET_EIMR_GRA_MASK)
-#define ENET_EIMR_BABT_MASK                      (0x20000000U)
-#define ENET_EIMR_BABT_SHIFT                     (29U)
-#define ENET_EIMR_BABT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABT_SHIFT)) & ENET_EIMR_BABT_MASK)
-#define ENET_EIMR_BABR_MASK                      (0x40000000U)
-#define ENET_EIMR_BABR_SHIFT                     (30U)
-#define ENET_EIMR_BABR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABR_SHIFT)) & ENET_EIMR_BABR_MASK)
+#define ENET_EIMR_TS_TIMER_MASK  (0x8000U)
+#define ENET_EIMR_TS_TIMER_SHIFT (15U)
+#define ENET_EIMR_TS_TIMER(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_TIMER_SHIFT)) & ENET_EIMR_TS_TIMER_MASK)
+#define ENET_EIMR_TS_AVAIL_MASK  (0x10000U)
+#define ENET_EIMR_TS_AVAIL_SHIFT (16U)
+#define ENET_EIMR_TS_AVAIL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TS_AVAIL_SHIFT)) & ENET_EIMR_TS_AVAIL_MASK)
+#define ENET_EIMR_WAKEUP_MASK    (0x20000U)
+#define ENET_EIMR_WAKEUP_SHIFT   (17U)
+#define ENET_EIMR_WAKEUP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_WAKEUP_SHIFT)) & ENET_EIMR_WAKEUP_MASK)
+#define ENET_EIMR_PLR_MASK       (0x40000U)
+#define ENET_EIMR_PLR_SHIFT      (18U)
+#define ENET_EIMR_PLR(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_PLR_SHIFT)) & ENET_EIMR_PLR_MASK)
+#define ENET_EIMR_UN_MASK        (0x80000U)
+#define ENET_EIMR_UN_SHIFT       (19U)
+#define ENET_EIMR_UN(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_UN_SHIFT)) & ENET_EIMR_UN_MASK)
+#define ENET_EIMR_RL_MASK        (0x100000U)
+#define ENET_EIMR_RL_SHIFT       (20U)
+#define ENET_EIMR_RL(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RL_SHIFT)) & ENET_EIMR_RL_MASK)
+#define ENET_EIMR_LC_MASK        (0x200000U)
+#define ENET_EIMR_LC_SHIFT       (21U)
+#define ENET_EIMR_LC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_LC_SHIFT)) & ENET_EIMR_LC_MASK)
+#define ENET_EIMR_EBERR_MASK     (0x400000U)
+#define ENET_EIMR_EBERR_SHIFT    (22U)
+#define ENET_EIMR_EBERR(x)       (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_EBERR_SHIFT)) & ENET_EIMR_EBERR_MASK)
+#define ENET_EIMR_MII_MASK       (0x800000U)
+#define ENET_EIMR_MII_SHIFT      (23U)
+#define ENET_EIMR_MII(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_MII_SHIFT)) & ENET_EIMR_MII_MASK)
+#define ENET_EIMR_RXB_MASK       (0x1000000U)
+#define ENET_EIMR_RXB_SHIFT      (24U)
+#define ENET_EIMR_RXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXB_SHIFT)) & ENET_EIMR_RXB_MASK)
+#define ENET_EIMR_RXF_MASK       (0x2000000U)
+#define ENET_EIMR_RXF_SHIFT      (25U)
+#define ENET_EIMR_RXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_RXF_SHIFT)) & ENET_EIMR_RXF_MASK)
+#define ENET_EIMR_TXB_MASK       (0x4000000U)
+#define ENET_EIMR_TXB_SHIFT      (26U)
+#define ENET_EIMR_TXB(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXB_SHIFT)) & ENET_EIMR_TXB_MASK)
+#define ENET_EIMR_TXF_MASK       (0x8000000U)
+#define ENET_EIMR_TXF_SHIFT      (27U)
+#define ENET_EIMR_TXF(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_TXF_SHIFT)) & ENET_EIMR_TXF_MASK)
+#define ENET_EIMR_GRA_MASK       (0x10000000U)
+#define ENET_EIMR_GRA_SHIFT      (28U)
+#define ENET_EIMR_GRA(x)         (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_GRA_SHIFT)) & ENET_EIMR_GRA_MASK)
+#define ENET_EIMR_BABT_MASK      (0x20000000U)
+#define ENET_EIMR_BABT_SHIFT     (29U)
+#define ENET_EIMR_BABT(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABT_SHIFT)) & ENET_EIMR_BABT_MASK)
+#define ENET_EIMR_BABR_MASK      (0x40000000U)
+#define ENET_EIMR_BABR_SHIFT     (30U)
+#define ENET_EIMR_BABR(x)        (((uint32_t)(((uint32_t)(x)) << ENET_EIMR_BABR_SHIFT)) & ENET_EIMR_BABR_MASK)
 /*! @} */
 
 /*! @name RDAR - Receive Descriptor Active Register */
 /*! @{ */
-#define ENET_RDAR_RDAR_MASK                      (0x1000000U)
-#define ENET_RDAR_RDAR_SHIFT                     (24U)
-#define ENET_RDAR_RDAR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RDAR_RDAR_SHIFT)) & ENET_RDAR_RDAR_MASK)
+#define ENET_RDAR_RDAR_MASK  (0x1000000U)
+#define ENET_RDAR_RDAR_SHIFT (24U)
+#define ENET_RDAR_RDAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RDAR_RDAR_SHIFT)) & ENET_RDAR_RDAR_MASK)
 /*! @} */
 
 /*! @name TDAR - Transmit Descriptor Active Register */
 /*! @{ */
-#define ENET_TDAR_TDAR_MASK                      (0x1000000U)
-#define ENET_TDAR_TDAR_SHIFT                     (24U)
-#define ENET_TDAR_TDAR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TDAR_TDAR_SHIFT)) & ENET_TDAR_TDAR_MASK)
+#define ENET_TDAR_TDAR_MASK  (0x1000000U)
+#define ENET_TDAR_TDAR_SHIFT (24U)
+#define ENET_TDAR_TDAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TDAR_TDAR_SHIFT)) & ENET_TDAR_TDAR_MASK)
 /*! @} */
 
 /*! @name ECR - Ethernet Control Register */
 /*! @{ */
-#define ENET_ECR_RESET_MASK                      (0x1U)
-#define ENET_ECR_RESET_SHIFT                     (0U)
-#define ENET_ECR_RESET(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_RESET_SHIFT)) & ENET_ECR_RESET_MASK)
-#define ENET_ECR_ETHEREN_MASK                    (0x2U)
-#define ENET_ECR_ETHEREN_SHIFT                   (1U)
-#define ENET_ECR_ETHEREN(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_ETHEREN_SHIFT)) & ENET_ECR_ETHEREN_MASK)
-#define ENET_ECR_MAGICEN_MASK                    (0x4U)
-#define ENET_ECR_MAGICEN_SHIFT                   (2U)
-#define ENET_ECR_MAGICEN(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_MAGICEN_SHIFT)) & ENET_ECR_MAGICEN_MASK)
-#define ENET_ECR_SLEEP_MASK                      (0x8U)
-#define ENET_ECR_SLEEP_SHIFT                     (3U)
-#define ENET_ECR_SLEEP(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_SLEEP_SHIFT)) & ENET_ECR_SLEEP_MASK)
-#define ENET_ECR_EN1588_MASK                     (0x10U)
-#define ENET_ECR_EN1588_SHIFT                    (4U)
-#define ENET_ECR_EN1588(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ECR_EN1588_SHIFT)) & ENET_ECR_EN1588_MASK)
-#define ENET_ECR_DBGEN_MASK                      (0x40U)
-#define ENET_ECR_DBGEN_SHIFT                     (6U)
-#define ENET_ECR_DBGEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBGEN_SHIFT)) & ENET_ECR_DBGEN_MASK)
-#define ENET_ECR_DBSWP_MASK                      (0x100U)
-#define ENET_ECR_DBSWP_SHIFT                     (8U)
-#define ENET_ECR_DBSWP(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBSWP_SHIFT)) & ENET_ECR_DBSWP_MASK)
+#define ENET_ECR_RESET_MASK    (0x1U)
+#define ENET_ECR_RESET_SHIFT   (0U)
+#define ENET_ECR_RESET(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_RESET_SHIFT)) & ENET_ECR_RESET_MASK)
+#define ENET_ECR_ETHEREN_MASK  (0x2U)
+#define ENET_ECR_ETHEREN_SHIFT (1U)
+#define ENET_ECR_ETHEREN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ECR_ETHEREN_SHIFT)) & ENET_ECR_ETHEREN_MASK)
+#define ENET_ECR_MAGICEN_MASK  (0x4U)
+#define ENET_ECR_MAGICEN_SHIFT (2U)
+#define ENET_ECR_MAGICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ECR_MAGICEN_SHIFT)) & ENET_ECR_MAGICEN_MASK)
+#define ENET_ECR_SLEEP_MASK    (0x8U)
+#define ENET_ECR_SLEEP_SHIFT   (3U)
+#define ENET_ECR_SLEEP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_SLEEP_SHIFT)) & ENET_ECR_SLEEP_MASK)
+#define ENET_ECR_EN1588_MASK   (0x10U)
+#define ENET_ECR_EN1588_SHIFT  (4U)
+#define ENET_ECR_EN1588(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ECR_EN1588_SHIFT)) & ENET_ECR_EN1588_MASK)
+#define ENET_ECR_DBGEN_MASK    (0x40U)
+#define ENET_ECR_DBGEN_SHIFT   (6U)
+#define ENET_ECR_DBGEN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBGEN_SHIFT)) & ENET_ECR_DBGEN_MASK)
+#define ENET_ECR_DBSWP_MASK    (0x100U)
+#define ENET_ECR_DBSWP_SHIFT   (8U)
+#define ENET_ECR_DBSWP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ECR_DBSWP_SHIFT)) & ENET_ECR_DBSWP_MASK)
 /*! @} */
 
 /*! @name MMFR - MII Management Frame Register */
 /*! @{ */
-#define ENET_MMFR_DATA_MASK                      (0xFFFFU)
-#define ENET_MMFR_DATA_SHIFT                     (0U)
-#define ENET_MMFR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_DATA_SHIFT)) & ENET_MMFR_DATA_MASK)
-#define ENET_MMFR_TA_MASK                        (0x30000U)
-#define ENET_MMFR_TA_SHIFT                       (16U)
-#define ENET_MMFR_TA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_TA_SHIFT)) & ENET_MMFR_TA_MASK)
-#define ENET_MMFR_RA_MASK                        (0x7C0000U)
-#define ENET_MMFR_RA_SHIFT                       (18U)
-#define ENET_MMFR_RA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_RA_SHIFT)) & ENET_MMFR_RA_MASK)
-#define ENET_MMFR_PA_MASK                        (0xF800000U)
-#define ENET_MMFR_PA_SHIFT                       (23U)
-#define ENET_MMFR_PA(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_PA_SHIFT)) & ENET_MMFR_PA_MASK)
-#define ENET_MMFR_OP_MASK                        (0x30000000U)
-#define ENET_MMFR_OP_SHIFT                       (28U)
-#define ENET_MMFR_OP(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_OP_SHIFT)) & ENET_MMFR_OP_MASK)
-#define ENET_MMFR_ST_MASK                        (0xC0000000U)
-#define ENET_MMFR_ST_SHIFT                       (30U)
-#define ENET_MMFR_ST(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_ST_SHIFT)) & ENET_MMFR_ST_MASK)
+#define ENET_MMFR_DATA_MASK  (0xFFFFU)
+#define ENET_MMFR_DATA_SHIFT (0U)
+#define ENET_MMFR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_DATA_SHIFT)) & ENET_MMFR_DATA_MASK)
+#define ENET_MMFR_TA_MASK    (0x30000U)
+#define ENET_MMFR_TA_SHIFT   (16U)
+#define ENET_MMFR_TA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_TA_SHIFT)) & ENET_MMFR_TA_MASK)
+#define ENET_MMFR_RA_MASK    (0x7C0000U)
+#define ENET_MMFR_RA_SHIFT   (18U)
+#define ENET_MMFR_RA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_RA_SHIFT)) & ENET_MMFR_RA_MASK)
+#define ENET_MMFR_PA_MASK    (0xF800000U)
+#define ENET_MMFR_PA_SHIFT   (23U)
+#define ENET_MMFR_PA(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_PA_SHIFT)) & ENET_MMFR_PA_MASK)
+#define ENET_MMFR_OP_MASK    (0x30000000U)
+#define ENET_MMFR_OP_SHIFT   (28U)
+#define ENET_MMFR_OP(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_OP_SHIFT)) & ENET_MMFR_OP_MASK)
+#define ENET_MMFR_ST_MASK    (0xC0000000U)
+#define ENET_MMFR_ST_SHIFT   (30U)
+#define ENET_MMFR_ST(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MMFR_ST_SHIFT)) & ENET_MMFR_ST_MASK)
 /*! @} */
 
 /*! @name MSCR - MII Speed Control Register */
 /*! @{ */
-#define ENET_MSCR_MII_SPEED_MASK                 (0x7EU)
-#define ENET_MSCR_MII_SPEED_SHIFT                (1U)
-#define ENET_MSCR_MII_SPEED(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_MII_SPEED_SHIFT)) & ENET_MSCR_MII_SPEED_MASK)
-#define ENET_MSCR_DIS_PRE_MASK                   (0x80U)
-#define ENET_MSCR_DIS_PRE_SHIFT                  (7U)
-#define ENET_MSCR_DIS_PRE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_DIS_PRE_SHIFT)) & ENET_MSCR_DIS_PRE_MASK)
-#define ENET_MSCR_HOLDTIME_MASK                  (0x700U)
-#define ENET_MSCR_HOLDTIME_SHIFT                 (8U)
-#define ENET_MSCR_HOLDTIME(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_HOLDTIME_SHIFT)) & ENET_MSCR_HOLDTIME_MASK)
+#define ENET_MSCR_MII_SPEED_MASK  (0x7EU)
+#define ENET_MSCR_MII_SPEED_SHIFT (1U)
+#define ENET_MSCR_MII_SPEED(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_MII_SPEED_SHIFT)) & ENET_MSCR_MII_SPEED_MASK)
+#define ENET_MSCR_DIS_PRE_MASK    (0x80U)
+#define ENET_MSCR_DIS_PRE_SHIFT   (7U)
+#define ENET_MSCR_DIS_PRE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_DIS_PRE_SHIFT)) & ENET_MSCR_DIS_PRE_MASK)
+#define ENET_MSCR_HOLDTIME_MASK   (0x700U)
+#define ENET_MSCR_HOLDTIME_SHIFT  (8U)
+#define ENET_MSCR_HOLDTIME(x)     (((uint32_t)(((uint32_t)(x)) << ENET_MSCR_HOLDTIME_SHIFT)) & ENET_MSCR_HOLDTIME_MASK)
 /*! @} */
 
 /*! @name MIBC - MIB Control Register */
 /*! @{ */
-#define ENET_MIBC_MIB_CLEAR_MASK                 (0x20000000U)
-#define ENET_MIBC_MIB_CLEAR_SHIFT                (29U)
-#define ENET_MIBC_MIB_CLEAR(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_CLEAR_SHIFT)) & ENET_MIBC_MIB_CLEAR_MASK)
-#define ENET_MIBC_MIB_IDLE_MASK                  (0x40000000U)
-#define ENET_MIBC_MIB_IDLE_SHIFT                 (30U)
-#define ENET_MIBC_MIB_IDLE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_IDLE_SHIFT)) & ENET_MIBC_MIB_IDLE_MASK)
-#define ENET_MIBC_MIB_DIS_MASK                   (0x80000000U)
-#define ENET_MIBC_MIB_DIS_SHIFT                  (31U)
-#define ENET_MIBC_MIB_DIS(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_DIS_SHIFT)) & ENET_MIBC_MIB_DIS_MASK)
+#define ENET_MIBC_MIB_CLEAR_MASK  (0x20000000U)
+#define ENET_MIBC_MIB_CLEAR_SHIFT (29U)
+#define ENET_MIBC_MIB_CLEAR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_CLEAR_SHIFT)) & ENET_MIBC_MIB_CLEAR_MASK)
+#define ENET_MIBC_MIB_IDLE_MASK   (0x40000000U)
+#define ENET_MIBC_MIB_IDLE_SHIFT  (30U)
+#define ENET_MIBC_MIB_IDLE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_IDLE_SHIFT)) & ENET_MIBC_MIB_IDLE_MASK)
+#define ENET_MIBC_MIB_DIS_MASK    (0x80000000U)
+#define ENET_MIBC_MIB_DIS_SHIFT   (31U)
+#define ENET_MIBC_MIB_DIS(x)      (((uint32_t)(((uint32_t)(x)) << ENET_MIBC_MIB_DIS_SHIFT)) & ENET_MIBC_MIB_DIS_MASK)
 /*! @} */
 
 /*! @name RCR - Receive Control Register */
 /*! @{ */
-#define ENET_RCR_LOOP_MASK                       (0x1U)
-#define ENET_RCR_LOOP_SHIFT                      (0U)
-#define ENET_RCR_LOOP(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_LOOP_SHIFT)) & ENET_RCR_LOOP_MASK)
-#define ENET_RCR_DRT_MASK                        (0x2U)
-#define ENET_RCR_DRT_SHIFT                       (1U)
-#define ENET_RCR_DRT(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
-#define ENET_RCR_MII_MODE_MASK                   (0x4U)
-#define ENET_RCR_MII_MODE_SHIFT                  (2U)
-#define ENET_RCR_MII_MODE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MII_MODE_SHIFT)) & ENET_RCR_MII_MODE_MASK)
-#define ENET_RCR_PROM_MASK                       (0x8U)
-#define ENET_RCR_PROM_SHIFT                      (3U)
-#define ENET_RCR_PROM(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PROM_SHIFT)) & ENET_RCR_PROM_MASK)
-#define ENET_RCR_BC_REJ_MASK                     (0x10U)
-#define ENET_RCR_BC_REJ_SHIFT                    (4U)
-#define ENET_RCR_BC_REJ(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_BC_REJ_SHIFT)) & ENET_RCR_BC_REJ_MASK)
-#define ENET_RCR_FCE_MASK                        (0x20U)
-#define ENET_RCR_FCE_SHIFT                       (5U)
-#define ENET_RCR_FCE(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_FCE_SHIFT)) & ENET_RCR_FCE_MASK)
-#define ENET_RCR_RMII_MODE_MASK                  (0x100U)
-#define ENET_RCR_RMII_MODE_SHIFT                 (8U)
-#define ENET_RCR_RMII_MODE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_MODE_SHIFT)) & ENET_RCR_RMII_MODE_MASK)
-#define ENET_RCR_RMII_10T_MASK                   (0x200U)
-#define ENET_RCR_RMII_10T_SHIFT                  (9U)
-#define ENET_RCR_RMII_10T(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_10T_SHIFT)) & ENET_RCR_RMII_10T_MASK)
-#define ENET_RCR_PADEN_MASK                      (0x1000U)
-#define ENET_RCR_PADEN_SHIFT                     (12U)
-#define ENET_RCR_PADEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PADEN_SHIFT)) & ENET_RCR_PADEN_MASK)
-#define ENET_RCR_PAUFWD_MASK                     (0x2000U)
-#define ENET_RCR_PAUFWD_SHIFT                    (13U)
-#define ENET_RCR_PAUFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PAUFWD_SHIFT)) & ENET_RCR_PAUFWD_MASK)
-#define ENET_RCR_CRCFWD_MASK                     (0x4000U)
-#define ENET_RCR_CRCFWD_SHIFT                    (14U)
-#define ENET_RCR_CRCFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CRCFWD_SHIFT)) & ENET_RCR_CRCFWD_MASK)
-#define ENET_RCR_CFEN_MASK                       (0x8000U)
-#define ENET_RCR_CFEN_SHIFT                      (15U)
-#define ENET_RCR_CFEN(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CFEN_SHIFT)) & ENET_RCR_CFEN_MASK)
-#define ENET_RCR_MAX_FL_MASK                     (0x3FFF0000U)
-#define ENET_RCR_MAX_FL_SHIFT                    (16U)
-#define ENET_RCR_MAX_FL(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MAX_FL_SHIFT)) & ENET_RCR_MAX_FL_MASK)
-#define ENET_RCR_NLC_MASK                        (0x40000000U)
-#define ENET_RCR_NLC_SHIFT                       (30U)
-#define ENET_RCR_NLC(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_NLC_SHIFT)) & ENET_RCR_NLC_MASK)
-#define ENET_RCR_GRS_MASK                        (0x80000000U)
-#define ENET_RCR_GRS_SHIFT                       (31U)
-#define ENET_RCR_GRS(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_GRS_SHIFT)) & ENET_RCR_GRS_MASK)
+#define ENET_RCR_LOOP_MASK       (0x1U)
+#define ENET_RCR_LOOP_SHIFT      (0U)
+#define ENET_RCR_LOOP(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_LOOP_SHIFT)) & ENET_RCR_LOOP_MASK)
+#define ENET_RCR_DRT_MASK        (0x2U)
+#define ENET_RCR_DRT_SHIFT       (1U)
+#define ENET_RCR_DRT(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
+#define ENET_RCR_MII_MODE_MASK   (0x4U)
+#define ENET_RCR_MII_MODE_SHIFT  (2U)
+#define ENET_RCR_MII_MODE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MII_MODE_SHIFT)) & ENET_RCR_MII_MODE_MASK)
+#define ENET_RCR_PROM_MASK       (0x8U)
+#define ENET_RCR_PROM_SHIFT      (3U)
+#define ENET_RCR_PROM(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PROM_SHIFT)) & ENET_RCR_PROM_MASK)
+#define ENET_RCR_BC_REJ_MASK     (0x10U)
+#define ENET_RCR_BC_REJ_SHIFT    (4U)
+#define ENET_RCR_BC_REJ(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_BC_REJ_SHIFT)) & ENET_RCR_BC_REJ_MASK)
+#define ENET_RCR_FCE_MASK        (0x20U)
+#define ENET_RCR_FCE_SHIFT       (5U)
+#define ENET_RCR_FCE(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_FCE_SHIFT)) & ENET_RCR_FCE_MASK)
+#define ENET_RCR_RMII_MODE_MASK  (0x100U)
+#define ENET_RCR_RMII_MODE_SHIFT (8U)
+#define ENET_RCR_RMII_MODE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_MODE_SHIFT)) & ENET_RCR_RMII_MODE_MASK)
+#define ENET_RCR_RMII_10T_MASK   (0x200U)
+#define ENET_RCR_RMII_10T_SHIFT  (9U)
+#define ENET_RCR_RMII_10T(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RCR_RMII_10T_SHIFT)) & ENET_RCR_RMII_10T_MASK)
+#define ENET_RCR_PADEN_MASK      (0x1000U)
+#define ENET_RCR_PADEN_SHIFT     (12U)
+#define ENET_RCR_PADEN(x)        (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PADEN_SHIFT)) & ENET_RCR_PADEN_MASK)
+#define ENET_RCR_PAUFWD_MASK     (0x2000U)
+#define ENET_RCR_PAUFWD_SHIFT    (13U)
+#define ENET_RCR_PAUFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_PAUFWD_SHIFT)) & ENET_RCR_PAUFWD_MASK)
+#define ENET_RCR_CRCFWD_MASK     (0x4000U)
+#define ENET_RCR_CRCFWD_SHIFT    (14U)
+#define ENET_RCR_CRCFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CRCFWD_SHIFT)) & ENET_RCR_CRCFWD_MASK)
+#define ENET_RCR_CFEN_MASK       (0x8000U)
+#define ENET_RCR_CFEN_SHIFT      (15U)
+#define ENET_RCR_CFEN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RCR_CFEN_SHIFT)) & ENET_RCR_CFEN_MASK)
+#define ENET_RCR_MAX_FL_MASK     (0x3FFF0000U)
+#define ENET_RCR_MAX_FL_SHIFT    (16U)
+#define ENET_RCR_MAX_FL(x)       (((uint32_t)(((uint32_t)(x)) << ENET_RCR_MAX_FL_SHIFT)) & ENET_RCR_MAX_FL_MASK)
+#define ENET_RCR_NLC_MASK        (0x40000000U)
+#define ENET_RCR_NLC_SHIFT       (30U)
+#define ENET_RCR_NLC(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_NLC_SHIFT)) & ENET_RCR_NLC_MASK)
+#define ENET_RCR_GRS_MASK        (0x80000000U)
+#define ENET_RCR_GRS_SHIFT       (31U)
+#define ENET_RCR_GRS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RCR_GRS_SHIFT)) & ENET_RCR_GRS_MASK)
 /*! @} */
 
 /*! @name TCR - Transmit Control Register */
 /*! @{ */
-#define ENET_TCR_GTS_MASK                        (0x1U)
-#define ENET_TCR_GTS_SHIFT                       (0U)
-#define ENET_TCR_GTS(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_TCR_GTS_SHIFT)) & ENET_TCR_GTS_MASK)
-#define ENET_TCR_FDEN_MASK                       (0x4U)
-#define ENET_TCR_FDEN_SHIFT                      (2U)
-#define ENET_TCR_FDEN(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCR_FDEN_SHIFT)) & ENET_TCR_FDEN_MASK)
-#define ENET_TCR_TFC_PAUSE_MASK                  (0x8U)
-#define ENET_TCR_TFC_PAUSE_SHIFT                 (3U)
-#define ENET_TCR_TFC_PAUSE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_TFC_PAUSE_SHIFT)) & ENET_TCR_TFC_PAUSE_MASK)
-#define ENET_TCR_RFC_PAUSE_MASK                  (0x10U)
-#define ENET_TCR_RFC_PAUSE_SHIFT                 (4U)
-#define ENET_TCR_RFC_PAUSE(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
-#define ENET_TCR_ADDSEL_MASK                     (0xE0U)
-#define ENET_TCR_ADDSEL_SHIFT                    (5U)
-#define ENET_TCR_ADDSEL(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDSEL_SHIFT)) & ENET_TCR_ADDSEL_MASK)
-#define ENET_TCR_ADDINS_MASK                     (0x100U)
-#define ENET_TCR_ADDINS_SHIFT                    (8U)
-#define ENET_TCR_ADDINS(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDINS_SHIFT)) & ENET_TCR_ADDINS_MASK)
-#define ENET_TCR_CRCFWD_MASK                     (0x200U)
-#define ENET_TCR_CRCFWD_SHIFT                    (9U)
-#define ENET_TCR_CRCFWD(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_CRCFWD_SHIFT)) & ENET_TCR_CRCFWD_MASK)
+#define ENET_TCR_GTS_MASK        (0x1U)
+#define ENET_TCR_GTS_SHIFT       (0U)
+#define ENET_TCR_GTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_TCR_GTS_SHIFT)) & ENET_TCR_GTS_MASK)
+#define ENET_TCR_FDEN_MASK       (0x4U)
+#define ENET_TCR_FDEN_SHIFT      (2U)
+#define ENET_TCR_FDEN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_TCR_FDEN_SHIFT)) & ENET_TCR_FDEN_MASK)
+#define ENET_TCR_TFC_PAUSE_MASK  (0x8U)
+#define ENET_TCR_TFC_PAUSE_SHIFT (3U)
+#define ENET_TCR_TFC_PAUSE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_TFC_PAUSE_SHIFT)) & ENET_TCR_TFC_PAUSE_MASK)
+#define ENET_TCR_RFC_PAUSE_MASK  (0x10U)
+#define ENET_TCR_RFC_PAUSE_SHIFT (4U)
+#define ENET_TCR_RFC_PAUSE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
+#define ENET_TCR_ADDSEL_MASK     (0xE0U)
+#define ENET_TCR_ADDSEL_SHIFT    (5U)
+#define ENET_TCR_ADDSEL(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDSEL_SHIFT)) & ENET_TCR_ADDSEL_MASK)
+#define ENET_TCR_ADDINS_MASK     (0x100U)
+#define ENET_TCR_ADDINS_SHIFT    (8U)
+#define ENET_TCR_ADDINS(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_ADDINS_SHIFT)) & ENET_TCR_ADDINS_MASK)
+#define ENET_TCR_CRCFWD_MASK     (0x200U)
+#define ENET_TCR_CRCFWD_SHIFT    (9U)
+#define ENET_TCR_CRCFWD(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCR_CRCFWD_SHIFT)) & ENET_TCR_CRCFWD_MASK)
 /*! @} */
 
 /*! @name PALR - Physical Address Lower Register */
 /*! @{ */
-#define ENET_PALR_PADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_PALR_PADDR1_SHIFT                   (0U)
-#define ENET_PALR_PADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_PALR_PADDR1_SHIFT)) & ENET_PALR_PADDR1_MASK)
+#define ENET_PALR_PADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_PALR_PADDR1_SHIFT (0U)
+#define ENET_PALR_PADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_PALR_PADDR1_SHIFT)) & ENET_PALR_PADDR1_MASK)
 /*! @} */
 
 /*! @name PAUR - Physical Address Upper Register */
 /*! @{ */
-#define ENET_PAUR_TYPE_MASK                      (0xFFFFU)
-#define ENET_PAUR_TYPE_SHIFT                     (0U)
-#define ENET_PAUR_TYPE(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_TYPE_SHIFT)) & ENET_PAUR_TYPE_MASK)
-#define ENET_PAUR_PADDR2_MASK                    (0xFFFF0000U)
-#define ENET_PAUR_PADDR2_SHIFT                   (16U)
-#define ENET_PAUR_PADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_PADDR2_SHIFT)) & ENET_PAUR_PADDR2_MASK)
+#define ENET_PAUR_TYPE_MASK    (0xFFFFU)
+#define ENET_PAUR_TYPE_SHIFT   (0U)
+#define ENET_PAUR_TYPE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_TYPE_SHIFT)) & ENET_PAUR_TYPE_MASK)
+#define ENET_PAUR_PADDR2_MASK  (0xFFFF0000U)
+#define ENET_PAUR_PADDR2_SHIFT (16U)
+#define ENET_PAUR_PADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_PAUR_PADDR2_SHIFT)) & ENET_PAUR_PADDR2_MASK)
 /*! @} */
 
 /*! @name OPD - Opcode/Pause Duration Register */
 /*! @{ */
-#define ENET_OPD_PAUSE_DUR_MASK                  (0xFFFFU)
-#define ENET_OPD_PAUSE_DUR_SHIFT                 (0U)
-#define ENET_OPD_PAUSE_DUR(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_OPD_PAUSE_DUR_SHIFT)) & ENET_OPD_PAUSE_DUR_MASK)
-#define ENET_OPD_OPCODE_MASK                     (0xFFFF0000U)
-#define ENET_OPD_OPCODE_SHIFT                    (16U)
-#define ENET_OPD_OPCODE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_OPD_OPCODE_SHIFT)) & ENET_OPD_OPCODE_MASK)
+#define ENET_OPD_PAUSE_DUR_MASK  (0xFFFFU)
+#define ENET_OPD_PAUSE_DUR_SHIFT (0U)
+#define ENET_OPD_PAUSE_DUR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_OPD_PAUSE_DUR_SHIFT)) & ENET_OPD_PAUSE_DUR_MASK)
+#define ENET_OPD_OPCODE_MASK     (0xFFFF0000U)
+#define ENET_OPD_OPCODE_SHIFT    (16U)
+#define ENET_OPD_OPCODE(x)       (((uint32_t)(((uint32_t)(x)) << ENET_OPD_OPCODE_SHIFT)) & ENET_OPD_OPCODE_MASK)
 /*! @} */
 
 /*! @name TXIC - Transmit Interrupt Coalescing Register */
 /*! @{ */
-#define ENET_TXIC_ICTT_MASK                      (0xFFFFU)
-#define ENET_TXIC_ICTT_SHIFT                     (0U)
-#define ENET_TXIC_ICTT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICTT_SHIFT)) & ENET_TXIC_ICTT_MASK)
-#define ENET_TXIC_ICFT_MASK                      (0xFF00000U)
-#define ENET_TXIC_ICFT_SHIFT                     (20U)
-#define ENET_TXIC_ICFT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICFT_SHIFT)) & ENET_TXIC_ICFT_MASK)
-#define ENET_TXIC_ICCS_MASK                      (0x40000000U)
-#define ENET_TXIC_ICCS_SHIFT                     (30U)
-#define ENET_TXIC_ICCS(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICCS_SHIFT)) & ENET_TXIC_ICCS_MASK)
-#define ENET_TXIC_ICEN_MASK                      (0x80000000U)
-#define ENET_TXIC_ICEN_SHIFT                     (31U)
-#define ENET_TXIC_ICEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICEN_SHIFT)) & ENET_TXIC_ICEN_MASK)
+#define ENET_TXIC_ICTT_MASK  (0xFFFFU)
+#define ENET_TXIC_ICTT_SHIFT (0U)
+#define ENET_TXIC_ICTT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICTT_SHIFT)) & ENET_TXIC_ICTT_MASK)
+#define ENET_TXIC_ICFT_MASK  (0xFF00000U)
+#define ENET_TXIC_ICFT_SHIFT (20U)
+#define ENET_TXIC_ICFT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICFT_SHIFT)) & ENET_TXIC_ICFT_MASK)
+#define ENET_TXIC_ICCS_MASK  (0x40000000U)
+#define ENET_TXIC_ICCS_SHIFT (30U)
+#define ENET_TXIC_ICCS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICCS_SHIFT)) & ENET_TXIC_ICCS_MASK)
+#define ENET_TXIC_ICEN_MASK  (0x80000000U)
+#define ENET_TXIC_ICEN_SHIFT (31U)
+#define ENET_TXIC_ICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TXIC_ICEN_SHIFT)) & ENET_TXIC_ICEN_MASK)
 /*! @} */
 
 /*! @name RXIC - Receive Interrupt Coalescing Register */
 /*! @{ */
-#define ENET_RXIC_ICTT_MASK                      (0xFFFFU)
-#define ENET_RXIC_ICTT_SHIFT                     (0U)
-#define ENET_RXIC_ICTT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICTT_SHIFT)) & ENET_RXIC_ICTT_MASK)
-#define ENET_RXIC_ICFT_MASK                      (0xFF00000U)
-#define ENET_RXIC_ICFT_SHIFT                     (20U)
-#define ENET_RXIC_ICFT(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICFT_SHIFT)) & ENET_RXIC_ICFT_MASK)
-#define ENET_RXIC_ICCS_MASK                      (0x40000000U)
-#define ENET_RXIC_ICCS_SHIFT                     (30U)
-#define ENET_RXIC_ICCS(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICCS_SHIFT)) & ENET_RXIC_ICCS_MASK)
-#define ENET_RXIC_ICEN_MASK                      (0x80000000U)
-#define ENET_RXIC_ICEN_SHIFT                     (31U)
-#define ENET_RXIC_ICEN(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICEN_SHIFT)) & ENET_RXIC_ICEN_MASK)
+#define ENET_RXIC_ICTT_MASK  (0xFFFFU)
+#define ENET_RXIC_ICTT_SHIFT (0U)
+#define ENET_RXIC_ICTT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICTT_SHIFT)) & ENET_RXIC_ICTT_MASK)
+#define ENET_RXIC_ICFT_MASK  (0xFF00000U)
+#define ENET_RXIC_ICFT_SHIFT (20U)
+#define ENET_RXIC_ICFT(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICFT_SHIFT)) & ENET_RXIC_ICFT_MASK)
+#define ENET_RXIC_ICCS_MASK  (0x40000000U)
+#define ENET_RXIC_ICCS_SHIFT (30U)
+#define ENET_RXIC_ICCS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICCS_SHIFT)) & ENET_RXIC_ICCS_MASK)
+#define ENET_RXIC_ICEN_MASK  (0x80000000U)
+#define ENET_RXIC_ICEN_SHIFT (31U)
+#define ENET_RXIC_ICEN(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RXIC_ICEN_SHIFT)) & ENET_RXIC_ICEN_MASK)
 /*! @} */
 
 /*! @name IAUR - Descriptor Individual Upper Address Register */
 /*! @{ */
-#define ENET_IAUR_IADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_IAUR_IADDR1_SHIFT                   (0U)
-#define ENET_IAUR_IADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_IAUR_IADDR1_SHIFT)) & ENET_IAUR_IADDR1_MASK)
+#define ENET_IAUR_IADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_IAUR_IADDR1_SHIFT (0U)
+#define ENET_IAUR_IADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_IAUR_IADDR1_SHIFT)) & ENET_IAUR_IADDR1_MASK)
 /*! @} */
 
 /*! @name IALR - Descriptor Individual Lower Address Register */
 /*! @{ */
-#define ENET_IALR_IADDR2_MASK                    (0xFFFFFFFFU)
-#define ENET_IALR_IADDR2_SHIFT                   (0U)
-#define ENET_IALR_IADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_IALR_IADDR2_SHIFT)) & ENET_IALR_IADDR2_MASK)
+#define ENET_IALR_IADDR2_MASK  (0xFFFFFFFFU)
+#define ENET_IALR_IADDR2_SHIFT (0U)
+#define ENET_IALR_IADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_IALR_IADDR2_SHIFT)) & ENET_IALR_IADDR2_MASK)
 /*! @} */
 
 /*! @name GAUR - Descriptor Group Upper Address Register */
 /*! @{ */
-#define ENET_GAUR_GADDR1_MASK                    (0xFFFFFFFFU)
-#define ENET_GAUR_GADDR1_SHIFT                   (0U)
-#define ENET_GAUR_GADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_GAUR_GADDR1_SHIFT)) & ENET_GAUR_GADDR1_MASK)
+#define ENET_GAUR_GADDR1_MASK  (0xFFFFFFFFU)
+#define ENET_GAUR_GADDR1_SHIFT (0U)
+#define ENET_GAUR_GADDR1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_GAUR_GADDR1_SHIFT)) & ENET_GAUR_GADDR1_MASK)
 /*! @} */
 
 /*! @name GALR - Descriptor Group Lower Address Register */
 /*! @{ */
-#define ENET_GALR_GADDR2_MASK                    (0xFFFFFFFFU)
-#define ENET_GALR_GADDR2_SHIFT                   (0U)
-#define ENET_GALR_GADDR2(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_GALR_GADDR2_SHIFT)) & ENET_GALR_GADDR2_MASK)
+#define ENET_GALR_GADDR2_MASK  (0xFFFFFFFFU)
+#define ENET_GALR_GADDR2_SHIFT (0U)
+#define ENET_GALR_GADDR2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_GALR_GADDR2_SHIFT)) & ENET_GALR_GADDR2_MASK)
 /*! @} */
 
 /*! @name TFWR - Transmit FIFO Watermark Register */
 /*! @{ */
-#define ENET_TFWR_TFWR_MASK                      (0x3FU)
-#define ENET_TFWR_TFWR_SHIFT                     (0U)
-#define ENET_TFWR_TFWR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_TFWR_SHIFT)) & ENET_TFWR_TFWR_MASK)
-#define ENET_TFWR_STRFWD_MASK                    (0x100U)
-#define ENET_TFWR_STRFWD_SHIFT                   (8U)
-#define ENET_TFWR_STRFWD(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_STRFWD_SHIFT)) & ENET_TFWR_STRFWD_MASK)
+#define ENET_TFWR_TFWR_MASK    (0x3FU)
+#define ENET_TFWR_TFWR_SHIFT   (0U)
+#define ENET_TFWR_TFWR(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_TFWR_SHIFT)) & ENET_TFWR_TFWR_MASK)
+#define ENET_TFWR_STRFWD_MASK  (0x100U)
+#define ENET_TFWR_STRFWD_SHIFT (8U)
+#define ENET_TFWR_STRFWD(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TFWR_STRFWD_SHIFT)) & ENET_TFWR_STRFWD_MASK)
 /*! @} */
 
 /*! @name RDSR - Receive Descriptor Ring Start Register */
 /*! @{ */
-#define ENET_RDSR_R_DES_START_MASK               (0xFFFFFFF8U)
-#define ENET_RDSR_R_DES_START_SHIFT              (3U)
-#define ENET_RDSR_R_DES_START(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RDSR_R_DES_START_SHIFT)) & ENET_RDSR_R_DES_START_MASK)
+#define ENET_RDSR_R_DES_START_MASK  (0xFFFFFFF8U)
+#define ENET_RDSR_R_DES_START_SHIFT (3U)
+#define ENET_RDSR_R_DES_START(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RDSR_R_DES_START_SHIFT)) & ENET_RDSR_R_DES_START_MASK)
 /*! @} */
 
 /*! @name TDSR - Transmit Buffer Descriptor Ring Start Register */
 /*! @{ */
-#define ENET_TDSR_X_DES_START_MASK               (0xFFFFFFF8U)
-#define ENET_TDSR_X_DES_START_SHIFT              (3U)
-#define ENET_TDSR_X_DES_START(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_TDSR_X_DES_START_SHIFT)) & ENET_TDSR_X_DES_START_MASK)
+#define ENET_TDSR_X_DES_START_MASK  (0xFFFFFFF8U)
+#define ENET_TDSR_X_DES_START_SHIFT (3U)
+#define ENET_TDSR_X_DES_START(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TDSR_X_DES_START_SHIFT)) & ENET_TDSR_X_DES_START_MASK)
 /*! @} */
 
 /*! @name MRBR - Maximum Receive Buffer Size Register */
 /*! @{ */
-#define ENET_MRBR_R_BUF_SIZE_MASK                (0x3FF0U)
-#define ENET_MRBR_R_BUF_SIZE_SHIFT               (4U)
-#define ENET_MRBR_R_BUF_SIZE(x)                  (((uint32_t)(((uint32_t)(x)) << ENET_MRBR_R_BUF_SIZE_SHIFT)) & ENET_MRBR_R_BUF_SIZE_MASK)
+#define ENET_MRBR_R_BUF_SIZE_MASK  (0x3FF0U)
+#define ENET_MRBR_R_BUF_SIZE_SHIFT (4U)
+#define ENET_MRBR_R_BUF_SIZE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ENET_MRBR_R_BUF_SIZE_SHIFT)) & ENET_MRBR_R_BUF_SIZE_MASK)
 /*! @} */
 
 /*! @name RSFL - Receive FIFO Section Full Threshold */
 /*! @{ */
-#define ENET_RSFL_RX_SECTION_FULL_MASK           (0xFFU)
-#define ENET_RSFL_RX_SECTION_FULL_SHIFT          (0U)
-#define ENET_RSFL_RX_SECTION_FULL(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RSFL_RX_SECTION_FULL_SHIFT)) & ENET_RSFL_RX_SECTION_FULL_MASK)
+#define ENET_RSFL_RX_SECTION_FULL_MASK  (0xFFU)
+#define ENET_RSFL_RX_SECTION_FULL_SHIFT (0U)
+#define ENET_RSFL_RX_SECTION_FULL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSFL_RX_SECTION_FULL_SHIFT)) & ENET_RSFL_RX_SECTION_FULL_MASK)
 /*! @} */
 
 /*! @name RSEM - Receive FIFO Section Empty Threshold */
 /*! @{ */
-#define ENET_RSEM_RX_SECTION_EMPTY_MASK          (0xFFU)
-#define ENET_RSEM_RX_SECTION_EMPTY_SHIFT         (0U)
-#define ENET_RSEM_RX_SECTION_EMPTY(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_RX_SECTION_EMPTY_SHIFT)) & ENET_RSEM_RX_SECTION_EMPTY_MASK)
-#define ENET_RSEM_STAT_SECTION_EMPTY_MASK        (0x1F0000U)
-#define ENET_RSEM_STAT_SECTION_EMPTY_SHIFT       (16U)
-#define ENET_RSEM_STAT_SECTION_EMPTY(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_STAT_SECTION_EMPTY_SHIFT)) & ENET_RSEM_STAT_SECTION_EMPTY_MASK)
+#define ENET_RSEM_RX_SECTION_EMPTY_MASK  (0xFFU)
+#define ENET_RSEM_RX_SECTION_EMPTY_SHIFT (0U)
+#define ENET_RSEM_RX_SECTION_EMPTY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_RX_SECTION_EMPTY_SHIFT)) & ENET_RSEM_RX_SECTION_EMPTY_MASK)
+#define ENET_RSEM_STAT_SECTION_EMPTY_MASK  (0x1F0000U)
+#define ENET_RSEM_STAT_SECTION_EMPTY_SHIFT (16U)
+#define ENET_RSEM_STAT_SECTION_EMPTY(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RSEM_STAT_SECTION_EMPTY_SHIFT)) & ENET_RSEM_STAT_SECTION_EMPTY_MASK)
 /*! @} */
 
 /*! @name RAEM - Receive FIFO Almost Empty Threshold */
 /*! @{ */
-#define ENET_RAEM_RX_ALMOST_EMPTY_MASK           (0xFFU)
-#define ENET_RAEM_RX_ALMOST_EMPTY_SHIFT          (0U)
-#define ENET_RAEM_RX_ALMOST_EMPTY(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RAEM_RX_ALMOST_EMPTY_SHIFT)) & ENET_RAEM_RX_ALMOST_EMPTY_MASK)
+#define ENET_RAEM_RX_ALMOST_EMPTY_MASK  (0xFFU)
+#define ENET_RAEM_RX_ALMOST_EMPTY_SHIFT (0U)
+#define ENET_RAEM_RX_ALMOST_EMPTY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RAEM_RX_ALMOST_EMPTY_SHIFT)) & ENET_RAEM_RX_ALMOST_EMPTY_MASK)
 /*! @} */
 
 /*! @name RAFL - Receive FIFO Almost Full Threshold */
 /*! @{ */
-#define ENET_RAFL_RX_ALMOST_FULL_MASK            (0xFFU)
-#define ENET_RAFL_RX_ALMOST_FULL_SHIFT           (0U)
-#define ENET_RAFL_RX_ALMOST_FULL(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RAFL_RX_ALMOST_FULL_SHIFT)) & ENET_RAFL_RX_ALMOST_FULL_MASK)
+#define ENET_RAFL_RX_ALMOST_FULL_MASK  (0xFFU)
+#define ENET_RAFL_RX_ALMOST_FULL_SHIFT (0U)
+#define ENET_RAFL_RX_ALMOST_FULL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RAFL_RX_ALMOST_FULL_SHIFT)) & ENET_RAFL_RX_ALMOST_FULL_MASK)
 /*! @} */
 
 /*! @name TSEM - Transmit FIFO Section Empty Threshold */
 /*! @{ */
-#define ENET_TSEM_TX_SECTION_EMPTY_MASK          (0xFFU)
-#define ENET_TSEM_TX_SECTION_EMPTY_SHIFT         (0U)
-#define ENET_TSEM_TX_SECTION_EMPTY(x)            (((uint32_t)(((uint32_t)(x)) << ENET_TSEM_TX_SECTION_EMPTY_SHIFT)) & ENET_TSEM_TX_SECTION_EMPTY_MASK)
+#define ENET_TSEM_TX_SECTION_EMPTY_MASK  (0xFFU)
+#define ENET_TSEM_TX_SECTION_EMPTY_SHIFT (0U)
+#define ENET_TSEM_TX_SECTION_EMPTY(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TSEM_TX_SECTION_EMPTY_SHIFT)) & ENET_TSEM_TX_SECTION_EMPTY_MASK)
 /*! @} */
 
 /*! @name TAEM - Transmit FIFO Almost Empty Threshold */
 /*! @{ */
-#define ENET_TAEM_TX_ALMOST_EMPTY_MASK           (0xFFU)
-#define ENET_TAEM_TX_ALMOST_EMPTY_SHIFT          (0U)
-#define ENET_TAEM_TX_ALMOST_EMPTY(x)             (((uint32_t)(((uint32_t)(x)) << ENET_TAEM_TX_ALMOST_EMPTY_SHIFT)) & ENET_TAEM_TX_ALMOST_EMPTY_MASK)
+#define ENET_TAEM_TX_ALMOST_EMPTY_MASK  (0xFFU)
+#define ENET_TAEM_TX_ALMOST_EMPTY_SHIFT (0U)
+#define ENET_TAEM_TX_ALMOST_EMPTY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TAEM_TX_ALMOST_EMPTY_SHIFT)) & ENET_TAEM_TX_ALMOST_EMPTY_MASK)
 /*! @} */
 
 /*! @name TAFL - Transmit FIFO Almost Full Threshold */
 /*! @{ */
-#define ENET_TAFL_TX_ALMOST_FULL_MASK            (0xFFU)
-#define ENET_TAFL_TX_ALMOST_FULL_SHIFT           (0U)
-#define ENET_TAFL_TX_ALMOST_FULL(x)              (((uint32_t)(((uint32_t)(x)) << ENET_TAFL_TX_ALMOST_FULL_SHIFT)) & ENET_TAFL_TX_ALMOST_FULL_MASK)
+#define ENET_TAFL_TX_ALMOST_FULL_MASK  (0xFFU)
+#define ENET_TAFL_TX_ALMOST_FULL_SHIFT (0U)
+#define ENET_TAFL_TX_ALMOST_FULL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_TAFL_TX_ALMOST_FULL_SHIFT)) & ENET_TAFL_TX_ALMOST_FULL_MASK)
 /*! @} */
 
 /*! @name TIPG - Transmit Inter-Packet Gap */
 /*! @{ */
-#define ENET_TIPG_IPG_MASK                       (0x1FU)
-#define ENET_TIPG_IPG_SHIFT                      (0U)
-#define ENET_TIPG_IPG(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TIPG_IPG_SHIFT)) & ENET_TIPG_IPG_MASK)
+#define ENET_TIPG_IPG_MASK  (0x1FU)
+#define ENET_TIPG_IPG_SHIFT (0U)
+#define ENET_TIPG_IPG(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TIPG_IPG_SHIFT)) & ENET_TIPG_IPG_MASK)
 /*! @} */
 
 /*! @name FTRL - Frame Truncation Length */
 /*! @{ */
-#define ENET_FTRL_TRUNC_FL_MASK                  (0x3FFFU)
-#define ENET_FTRL_TRUNC_FL_SHIFT                 (0U)
-#define ENET_FTRL_TRUNC_FL(x)                    (((uint32_t)(((uint32_t)(x)) << ENET_FTRL_TRUNC_FL_SHIFT)) & ENET_FTRL_TRUNC_FL_MASK)
+#define ENET_FTRL_TRUNC_FL_MASK  (0x3FFFU)
+#define ENET_FTRL_TRUNC_FL_SHIFT (0U)
+#define ENET_FTRL_TRUNC_FL(x)    (((uint32_t)(((uint32_t)(x)) << ENET_FTRL_TRUNC_FL_SHIFT)) & ENET_FTRL_TRUNC_FL_MASK)
 /*! @} */
 
 /*! @name TACC - Transmit Accelerator Function Configuration */
 /*! @{ */
-#define ENET_TACC_SHIFT16_MASK                   (0x1U)
-#define ENET_TACC_SHIFT16_SHIFT                  (0U)
-#define ENET_TACC_SHIFT16(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_TACC_SHIFT16_SHIFT)) & ENET_TACC_SHIFT16_MASK)
-#define ENET_TACC_IPCHK_MASK                     (0x8U)
-#define ENET_TACC_IPCHK_SHIFT                    (3U)
-#define ENET_TACC_IPCHK(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
-#define ENET_TACC_PROCHK_MASK                    (0x10U)
-#define ENET_TACC_PROCHK_SHIFT                   (4U)
-#define ENET_TACC_PROCHK(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_TACC_PROCHK_SHIFT)) & ENET_TACC_PROCHK_MASK)
+#define ENET_TACC_SHIFT16_MASK  (0x1U)
+#define ENET_TACC_SHIFT16_SHIFT (0U)
+#define ENET_TACC_SHIFT16(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TACC_SHIFT16_SHIFT)) & ENET_TACC_SHIFT16_MASK)
+#define ENET_TACC_IPCHK_MASK    (0x8U)
+#define ENET_TACC_IPCHK_SHIFT   (3U)
+#define ENET_TACC_IPCHK(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
+#define ENET_TACC_PROCHK_MASK   (0x10U)
+#define ENET_TACC_PROCHK_SHIFT  (4U)
+#define ENET_TACC_PROCHK(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TACC_PROCHK_SHIFT)) & ENET_TACC_PROCHK_MASK)
 /*! @} */
 
 /*! @name RACC - Receive Accelerator Function Configuration */
 /*! @{ */
-#define ENET_RACC_PADREM_MASK                    (0x1U)
-#define ENET_RACC_PADREM_SHIFT                   (0U)
-#define ENET_RACC_PADREM(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PADREM_SHIFT)) & ENET_RACC_PADREM_MASK)
-#define ENET_RACC_IPDIS_MASK                     (0x2U)
-#define ENET_RACC_IPDIS_SHIFT                    (1U)
-#define ENET_RACC_IPDIS(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_RACC_IPDIS_SHIFT)) & ENET_RACC_IPDIS_MASK)
-#define ENET_RACC_PRODIS_MASK                    (0x4U)
-#define ENET_RACC_PRODIS_SHIFT                   (2U)
-#define ENET_RACC_PRODIS(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PRODIS_SHIFT)) & ENET_RACC_PRODIS_MASK)
-#define ENET_RACC_LINEDIS_MASK                   (0x40U)
-#define ENET_RACC_LINEDIS_SHIFT                  (6U)
-#define ENET_RACC_LINEDIS(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_LINEDIS_SHIFT)) & ENET_RACC_LINEDIS_MASK)
-#define ENET_RACC_SHIFT16_MASK                   (0x80U)
-#define ENET_RACC_SHIFT16_SHIFT                  (7U)
-#define ENET_RACC_SHIFT16(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_SHIFT16_SHIFT)) & ENET_RACC_SHIFT16_MASK)
+#define ENET_RACC_PADREM_MASK   (0x1U)
+#define ENET_RACC_PADREM_SHIFT  (0U)
+#define ENET_RACC_PADREM(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PADREM_SHIFT)) & ENET_RACC_PADREM_MASK)
+#define ENET_RACC_IPDIS_MASK    (0x2U)
+#define ENET_RACC_IPDIS_SHIFT   (1U)
+#define ENET_RACC_IPDIS(x)      (((uint32_t)(((uint32_t)(x)) << ENET_RACC_IPDIS_SHIFT)) & ENET_RACC_IPDIS_MASK)
+#define ENET_RACC_PRODIS_MASK   (0x4U)
+#define ENET_RACC_PRODIS_SHIFT  (2U)
+#define ENET_RACC_PRODIS(x)     (((uint32_t)(((uint32_t)(x)) << ENET_RACC_PRODIS_SHIFT)) & ENET_RACC_PRODIS_MASK)
+#define ENET_RACC_LINEDIS_MASK  (0x40U)
+#define ENET_RACC_LINEDIS_SHIFT (6U)
+#define ENET_RACC_LINEDIS(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RACC_LINEDIS_SHIFT)) & ENET_RACC_LINEDIS_MASK)
+#define ENET_RACC_SHIFT16_MASK  (0x80U)
+#define ENET_RACC_SHIFT16_SHIFT (7U)
+#define ENET_RACC_SHIFT16(x)    (((uint32_t)(((uint32_t)(x)) << ENET_RACC_SHIFT16_SHIFT)) & ENET_RACC_SHIFT16_MASK)
 /*! @} */
 
 /*! @name RMON_T_PACKETS - Tx Packet Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_PACKETS_TXPKTS_MASK          (0xFFFFU)
-#define ENET_RMON_T_PACKETS_TXPKTS_SHIFT         (0U)
-#define ENET_RMON_T_PACKETS_TXPKTS(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_PACKETS_TXPKTS_SHIFT)) & ENET_RMON_T_PACKETS_TXPKTS_MASK)
+#define ENET_RMON_T_PACKETS_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_PACKETS_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_PACKETS_TXPKTS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_PACKETS_TXPKTS_SHIFT)) & ENET_RMON_T_PACKETS_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_BC_PKT - Tx Broadcast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_BC_PKT_TXPKTS_MASK           (0xFFFFU)
-#define ENET_RMON_T_BC_PKT_TXPKTS_SHIFT          (0U)
-#define ENET_RMON_T_BC_PKT_TXPKTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_BC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_BC_PKT_TXPKTS_MASK)
+#define ENET_RMON_T_BC_PKT_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_BC_PKT_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_BC_PKT_TXPKTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_BC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_BC_PKT_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_MC_PKT - Tx Multicast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_MC_PKT_TXPKTS_MASK           (0xFFFFU)
-#define ENET_RMON_T_MC_PKT_TXPKTS_SHIFT          (0U)
-#define ENET_RMON_T_MC_PKT_TXPKTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_MC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_MC_PKT_TXPKTS_MASK)
+#define ENET_RMON_T_MC_PKT_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_MC_PKT_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_MC_PKT_TXPKTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_MC_PKT_TXPKTS_SHIFT)) & ENET_RMON_T_MC_PKT_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_CRC_ALIGN - Tx Packets with CRC/Align Error Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_CRC_ALIGN_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT)) & ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_CRC_ALIGN_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_CRC_ALIGN_TXPKTS_SHIFT)) & ENET_RMON_T_CRC_ALIGN_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_UNDERSIZE - Tx Packets Less Than Bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_UNDERSIZE_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_UNDERSIZE_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_UNDERSIZE_TXPKTS_MASK)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_UNDERSIZE_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_UNDERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_UNDERSIZE_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_OVERSIZE - Tx Packets GT MAX_FL bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_OVERSIZE_TXPKTS_MASK         (0xFFFFU)
-#define ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT        (0U)
-#define ENET_RMON_T_OVERSIZE_TXPKTS(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_OVERSIZE_TXPKTS_MASK)
+#define ENET_RMON_T_OVERSIZE_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_OVERSIZE_TXPKTS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OVERSIZE_TXPKTS_SHIFT)) & ENET_RMON_T_OVERSIZE_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_FRAG - Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_FRAG_TXPKTS_MASK             (0xFFFFU)
-#define ENET_RMON_T_FRAG_TXPKTS_SHIFT            (0U)
-#define ENET_RMON_T_FRAG_TXPKTS(x)               (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_FRAG_TXPKTS_SHIFT)) & ENET_RMON_T_FRAG_TXPKTS_MASK)
+#define ENET_RMON_T_FRAG_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_FRAG_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_FRAG_TXPKTS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_FRAG_TXPKTS_SHIFT)) & ENET_RMON_T_FRAG_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_JAB - Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_JAB_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_JAB_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_JAB_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_JAB_TXPKTS_SHIFT)) & ENET_RMON_T_JAB_TXPKTS_MASK)
+#define ENET_RMON_T_JAB_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_JAB_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_JAB_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_JAB_TXPKTS_SHIFT)) & ENET_RMON_T_JAB_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_COL - Tx Collision Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_COL_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_COL_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_COL_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_COL_TXPKTS_SHIFT)) & ENET_RMON_T_COL_TXPKTS_MASK)
+#define ENET_RMON_T_COL_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_COL_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_COL_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_COL_TXPKTS_SHIFT)) & ENET_RMON_T_COL_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P64 - Tx 64-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P64_TXPKTS_MASK              (0xFFFFU)
-#define ENET_RMON_T_P64_TXPKTS_SHIFT             (0U)
-#define ENET_RMON_T_P64_TXPKTS(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P64_TXPKTS_SHIFT)) & ENET_RMON_T_P64_TXPKTS_MASK)
+#define ENET_RMON_T_P64_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P64_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P64_TXPKTS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P64_TXPKTS_SHIFT)) & ENET_RMON_T_P64_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P65TO127 - Tx 65- to 127-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P65TO127_TXPKTS_MASK         (0xFFFFU)
-#define ENET_RMON_T_P65TO127_TXPKTS_SHIFT        (0U)
-#define ENET_RMON_T_P65TO127_TXPKTS(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P65TO127_TXPKTS_SHIFT)) & ENET_RMON_T_P65TO127_TXPKTS_MASK)
+#define ENET_RMON_T_P65TO127_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P65TO127_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P65TO127_TXPKTS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P65TO127_TXPKTS_SHIFT)) & ENET_RMON_T_P65TO127_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P128TO255 - Tx 128- to 255-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P128TO255_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P128TO255_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P128TO255_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P128TO255_TXPKTS_SHIFT)) & ENET_RMON_T_P128TO255_TXPKTS_MASK)
+#define ENET_RMON_T_P128TO255_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P128TO255_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P128TO255_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P128TO255_TXPKTS_SHIFT)) & ENET_RMON_T_P128TO255_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P256TO511 - Tx 256- to 511-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P256TO511_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P256TO511_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P256TO511_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P256TO511_TXPKTS_SHIFT)) & ENET_RMON_T_P256TO511_TXPKTS_MASK)
+#define ENET_RMON_T_P256TO511_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P256TO511_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P256TO511_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P256TO511_TXPKTS_SHIFT)) & ENET_RMON_T_P256TO511_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P512TO1023 - Tx 512- to 1023-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P512TO1023_TXPKTS_MASK       (0xFFFFU)
-#define ENET_RMON_T_P512TO1023_TXPKTS_SHIFT      (0U)
-#define ENET_RMON_T_P512TO1023_TXPKTS(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P512TO1023_TXPKTS_SHIFT)) & ENET_RMON_T_P512TO1023_TXPKTS_MASK)
+#define ENET_RMON_T_P512TO1023_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P512TO1023_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P512TO1023_TXPKTS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P512TO1023_TXPKTS_SHIFT)) & ENET_RMON_T_P512TO1023_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P1024TO2047 - Tx 1024- to 2047-byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P1024TO2047_TXPKTS_MASK      (0xFFFFU)
-#define ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT     (0U)
-#define ENET_RMON_T_P1024TO2047_TXPKTS(x)        (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT)) & ENET_RMON_T_P1024TO2047_TXPKTS_MASK)
+#define ENET_RMON_T_P1024TO2047_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P1024TO2047_TXPKTS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P1024TO2047_TXPKTS_SHIFT)) & ENET_RMON_T_P1024TO2047_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_P_GTE2048 - Tx Packets Greater Than 2048 Bytes Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_P_GTE2048_TXPKTS_MASK        (0xFFFFU)
-#define ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT       (0U)
-#define ENET_RMON_T_P_GTE2048_TXPKTS(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT)) & ENET_RMON_T_P_GTE2048_TXPKTS_MASK)
+#define ENET_RMON_T_P_GTE2048_TXPKTS_MASK  (0xFFFFU)
+#define ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT (0U)
+#define ENET_RMON_T_P_GTE2048_TXPKTS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_P_GTE2048_TXPKTS_SHIFT)) & ENET_RMON_T_P_GTE2048_TXPKTS_MASK)
 /*! @} */
 
 /*! @name RMON_T_OCTETS - Tx Octets Statistic Register */
 /*! @{ */
-#define ENET_RMON_T_OCTETS_TXOCTS_MASK           (0xFFFFFFFFU)
-#define ENET_RMON_T_OCTETS_TXOCTS_SHIFT          (0U)
-#define ENET_RMON_T_OCTETS_TXOCTS(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OCTETS_TXOCTS_SHIFT)) & ENET_RMON_T_OCTETS_TXOCTS_MASK)
+#define ENET_RMON_T_OCTETS_TXOCTS_MASK  (0xFFFFFFFFU)
+#define ENET_RMON_T_OCTETS_TXOCTS_SHIFT (0U)
+#define ENET_RMON_T_OCTETS_TXOCTS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_T_OCTETS_TXOCTS_SHIFT)) & ENET_RMON_T_OCTETS_TXOCTS_MASK)
 /*! @} */
 
 /*! @name IEEE_T_FRAME_OK - Frames Transmitted OK Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_FRAME_OK_COUNT_MASK          (0xFFFFU)
-#define ENET_IEEE_T_FRAME_OK_COUNT_SHIFT         (0U)
-#define ENET_IEEE_T_FRAME_OK_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_T_FRAME_OK_COUNT_MASK)
+#define ENET_IEEE_T_FRAME_OK_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_FRAME_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_FRAME_OK_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_T_FRAME_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_1COL - Frames Transmitted with Single Collision Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_1COL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_1COL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_1COL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_1COL_COUNT_SHIFT)) & ENET_IEEE_T_1COL_COUNT_MASK)
+#define ENET_IEEE_T_1COL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_1COL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_1COL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_1COL_COUNT_SHIFT)) & ENET_IEEE_T_1COL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_MCOL - Frames Transmitted with Multiple Collisions Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_MCOL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_MCOL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_MCOL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MCOL_COUNT_SHIFT)) & ENET_IEEE_T_MCOL_COUNT_MASK)
+#define ENET_IEEE_T_MCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_MCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_MCOL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MCOL_COUNT_SHIFT)) & ENET_IEEE_T_MCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_DEF - Frames Transmitted after Deferral Delay Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_DEF_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_T_DEF_COUNT_SHIFT              (0U)
-#define ENET_IEEE_T_DEF_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_DEF_COUNT_SHIFT)) & ENET_IEEE_T_DEF_COUNT_MASK)
+#define ENET_IEEE_T_DEF_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_DEF_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_DEF_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_DEF_COUNT_SHIFT)) & ENET_IEEE_T_DEF_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_LCOL - Frames Transmitted with Late Collision Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_LCOL_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_T_LCOL_COUNT_SHIFT             (0U)
-#define ENET_IEEE_T_LCOL_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_LCOL_COUNT_SHIFT)) & ENET_IEEE_T_LCOL_COUNT_MASK)
+#define ENET_IEEE_T_LCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_LCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_LCOL_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_LCOL_COUNT_SHIFT)) & ENET_IEEE_T_LCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_EXCOL - Frames Transmitted with Excessive Collisions Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_EXCOL_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_EXCOL_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_EXCOL_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_EXCOL_COUNT_SHIFT)) & ENET_IEEE_T_EXCOL_COUNT_MASK)
+#define ENET_IEEE_T_EXCOL_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_EXCOL_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_EXCOL_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_EXCOL_COUNT_SHIFT)) & ENET_IEEE_T_EXCOL_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_MACERR - Frames Transmitted with Tx FIFO Underrun Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_MACERR_COUNT_MASK            (0xFFFFU)
-#define ENET_IEEE_T_MACERR_COUNT_SHIFT           (0U)
-#define ENET_IEEE_T_MACERR_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MACERR_COUNT_SHIFT)) & ENET_IEEE_T_MACERR_COUNT_MASK)
+#define ENET_IEEE_T_MACERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_MACERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_MACERR_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_MACERR_COUNT_SHIFT)) & ENET_IEEE_T_MACERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_CSERR - Frames Transmitted with Carrier Sense Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_CSERR_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_CSERR_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_CSERR_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_CSERR_COUNT_SHIFT)) & ENET_IEEE_T_CSERR_COUNT_MASK)
+#define ENET_IEEE_T_CSERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_CSERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_CSERR_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_CSERR_COUNT_SHIFT)) & ENET_IEEE_T_CSERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_SQE - Reserved Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_SQE_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_T_SQE_COUNT_SHIFT              (0U)
-#define ENET_IEEE_T_SQE_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_SQE_COUNT_SHIFT)) & ENET_IEEE_T_SQE_COUNT_MASK)
+#define ENET_IEEE_T_SQE_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_SQE_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_SQE_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_SQE_COUNT_SHIFT)) & ENET_IEEE_T_SQE_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_FDXFC - Flow Control Pause Frames Transmitted Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_FDXFC_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_T_FDXFC_COUNT_SHIFT            (0U)
-#define ENET_IEEE_T_FDXFC_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FDXFC_COUNT_SHIFT)) & ENET_IEEE_T_FDXFC_COUNT_MASK)
+#define ENET_IEEE_T_FDXFC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_T_FDXFC_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_FDXFC_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_FDXFC_COUNT_SHIFT)) & ENET_IEEE_T_FDXFC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_T_OCTETS_OK - Octet Count for Frames Transmitted w/o Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_T_OCTETS_OK_COUNT_MASK         (0xFFFFFFFFU)
-#define ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT        (0U)
-#define ENET_IEEE_T_OCTETS_OK_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_T_OCTETS_OK_COUNT_MASK)
+#define ENET_IEEE_T_OCTETS_OK_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_T_OCTETS_OK_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_T_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_T_OCTETS_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_PACKETS - Rx Packet Count Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_PACKETS_COUNT_MASK           (0xFFFFU)
-#define ENET_RMON_R_PACKETS_COUNT_SHIFT          (0U)
-#define ENET_RMON_R_PACKETS_COUNT(x)             (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_PACKETS_COUNT_SHIFT)) & ENET_RMON_R_PACKETS_COUNT_MASK)
+#define ENET_RMON_R_PACKETS_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_PACKETS_COUNT_SHIFT (0U)
+#define ENET_RMON_R_PACKETS_COUNT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_PACKETS_COUNT_SHIFT)) & ENET_RMON_R_PACKETS_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_BC_PKT - Rx Broadcast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_BC_PKT_COUNT_MASK            (0xFFFFU)
-#define ENET_RMON_R_BC_PKT_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_BC_PKT_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_BC_PKT_COUNT_SHIFT)) & ENET_RMON_R_BC_PKT_COUNT_MASK)
+#define ENET_RMON_R_BC_PKT_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_BC_PKT_COUNT_SHIFT (0U)
+#define ENET_RMON_R_BC_PKT_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_BC_PKT_COUNT_SHIFT)) & ENET_RMON_R_BC_PKT_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_MC_PKT - Rx Multicast Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_MC_PKT_COUNT_MASK            (0xFFFFU)
-#define ENET_RMON_R_MC_PKT_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_MC_PKT_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_MC_PKT_COUNT_SHIFT)) & ENET_RMON_R_MC_PKT_COUNT_MASK)
+#define ENET_RMON_R_MC_PKT_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_MC_PKT_COUNT_SHIFT (0U)
+#define ENET_RMON_R_MC_PKT_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_MC_PKT_COUNT_SHIFT)) & ENET_RMON_R_MC_PKT_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_CRC_ALIGN - Rx Packets with CRC/Align Error Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_CRC_ALIGN_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_CRC_ALIGN_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT)) & ENET_RMON_R_CRC_ALIGN_COUNT_MASK)
+#define ENET_RMON_R_CRC_ALIGN_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT (0U)
+#define ENET_RMON_R_CRC_ALIGN_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_CRC_ALIGN_COUNT_SHIFT)) & ENET_RMON_R_CRC_ALIGN_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_UNDERSIZE - Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_UNDERSIZE_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_UNDERSIZE_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_UNDERSIZE_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_UNDERSIZE_COUNT_SHIFT)) & ENET_RMON_R_UNDERSIZE_COUNT_MASK)
+#define ENET_RMON_R_UNDERSIZE_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_UNDERSIZE_COUNT_SHIFT (0U)
+#define ENET_RMON_R_UNDERSIZE_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_UNDERSIZE_COUNT_SHIFT)) & ENET_RMON_R_UNDERSIZE_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_OVERSIZE - Rx Packets Greater Than MAX_FL and Good CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_OVERSIZE_COUNT_MASK          (0xFFFFU)
-#define ENET_RMON_R_OVERSIZE_COUNT_SHIFT         (0U)
-#define ENET_RMON_R_OVERSIZE_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OVERSIZE_COUNT_SHIFT)) & ENET_RMON_R_OVERSIZE_COUNT_MASK)
+#define ENET_RMON_R_OVERSIZE_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_OVERSIZE_COUNT_SHIFT (0U)
+#define ENET_RMON_R_OVERSIZE_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OVERSIZE_COUNT_SHIFT)) & ENET_RMON_R_OVERSIZE_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_FRAG - Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_FRAG_COUNT_MASK              (0xFFFFU)
-#define ENET_RMON_R_FRAG_COUNT_SHIFT             (0U)
-#define ENET_RMON_R_FRAG_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_FRAG_COUNT_SHIFT)) & ENET_RMON_R_FRAG_COUNT_MASK)
+#define ENET_RMON_R_FRAG_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_FRAG_COUNT_SHIFT (0U)
+#define ENET_RMON_R_FRAG_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_FRAG_COUNT_SHIFT)) & ENET_RMON_R_FRAG_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_JAB - Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_JAB_COUNT_MASK               (0xFFFFU)
-#define ENET_RMON_R_JAB_COUNT_SHIFT              (0U)
-#define ENET_RMON_R_JAB_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_JAB_COUNT_SHIFT)) & ENET_RMON_R_JAB_COUNT_MASK)
+#define ENET_RMON_R_JAB_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_JAB_COUNT_SHIFT (0U)
+#define ENET_RMON_R_JAB_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_JAB_COUNT_SHIFT)) & ENET_RMON_R_JAB_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P64 - Rx 64-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P64_COUNT_MASK               (0xFFFFU)
-#define ENET_RMON_R_P64_COUNT_SHIFT              (0U)
-#define ENET_RMON_R_P64_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P64_COUNT_SHIFT)) & ENET_RMON_R_P64_COUNT_MASK)
+#define ENET_RMON_R_P64_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P64_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P64_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P64_COUNT_SHIFT)) & ENET_RMON_R_P64_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P65TO127 - Rx 65- to 127-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P65TO127_COUNT_MASK          (0xFFFFU)
-#define ENET_RMON_R_P65TO127_COUNT_SHIFT         (0U)
-#define ENET_RMON_R_P65TO127_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P65TO127_COUNT_SHIFT)) & ENET_RMON_R_P65TO127_COUNT_MASK)
+#define ENET_RMON_R_P65TO127_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P65TO127_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P65TO127_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P65TO127_COUNT_SHIFT)) & ENET_RMON_R_P65TO127_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P128TO255 - Rx 128- to 255-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P128TO255_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P128TO255_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P128TO255_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P128TO255_COUNT_SHIFT)) & ENET_RMON_R_P128TO255_COUNT_MASK)
+#define ENET_RMON_R_P128TO255_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P128TO255_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P128TO255_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P128TO255_COUNT_SHIFT)) & ENET_RMON_R_P128TO255_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P256TO511 - Rx 256- to 511-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P256TO511_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P256TO511_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P256TO511_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P256TO511_COUNT_SHIFT)) & ENET_RMON_R_P256TO511_COUNT_MASK)
+#define ENET_RMON_R_P256TO511_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P256TO511_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P256TO511_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P256TO511_COUNT_SHIFT)) & ENET_RMON_R_P256TO511_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P512TO1023 - Rx 512- to 1023-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P512TO1023_COUNT_MASK        (0xFFFFU)
-#define ENET_RMON_R_P512TO1023_COUNT_SHIFT       (0U)
-#define ENET_RMON_R_P512TO1023_COUNT(x)          (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P512TO1023_COUNT_SHIFT)) & ENET_RMON_R_P512TO1023_COUNT_MASK)
+#define ENET_RMON_R_P512TO1023_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P512TO1023_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P512TO1023_COUNT(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P512TO1023_COUNT_SHIFT)) & ENET_RMON_R_P512TO1023_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P1024TO2047 - Rx 1024- to 2047-Byte Packets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P1024TO2047_COUNT_MASK       (0xFFFFU)
-#define ENET_RMON_R_P1024TO2047_COUNT_SHIFT      (0U)
-#define ENET_RMON_R_P1024TO2047_COUNT(x)         (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P1024TO2047_COUNT_SHIFT)) & ENET_RMON_R_P1024TO2047_COUNT_MASK)
+#define ENET_RMON_R_P1024TO2047_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P1024TO2047_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P1024TO2047_COUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P1024TO2047_COUNT_SHIFT)) & ENET_RMON_R_P1024TO2047_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_P_GTE2048 - Rx Packets Greater than 2048 Bytes Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_P_GTE2048_COUNT_MASK         (0xFFFFU)
-#define ENET_RMON_R_P_GTE2048_COUNT_SHIFT        (0U)
-#define ENET_RMON_R_P_GTE2048_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P_GTE2048_COUNT_SHIFT)) & ENET_RMON_R_P_GTE2048_COUNT_MASK)
+#define ENET_RMON_R_P_GTE2048_COUNT_MASK  (0xFFFFU)
+#define ENET_RMON_R_P_GTE2048_COUNT_SHIFT (0U)
+#define ENET_RMON_R_P_GTE2048_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_P_GTE2048_COUNT_SHIFT)) & ENET_RMON_R_P_GTE2048_COUNT_MASK)
 /*! @} */
 
 /*! @name RMON_R_OCTETS - Rx Octets Statistic Register */
 /*! @{ */
-#define ENET_RMON_R_OCTETS_COUNT_MASK            (0xFFFFFFFFU)
-#define ENET_RMON_R_OCTETS_COUNT_SHIFT           (0U)
-#define ENET_RMON_R_OCTETS_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OCTETS_COUNT_SHIFT)) & ENET_RMON_R_OCTETS_COUNT_MASK)
+#define ENET_RMON_R_OCTETS_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_RMON_R_OCTETS_COUNT_SHIFT (0U)
+#define ENET_RMON_R_OCTETS_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_RMON_R_OCTETS_COUNT_SHIFT)) & ENET_RMON_R_OCTETS_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_DROP - Frames not Counted Correctly Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_DROP_COUNT_MASK              (0xFFFFU)
-#define ENET_IEEE_R_DROP_COUNT_SHIFT             (0U)
-#define ENET_IEEE_R_DROP_COUNT(x)                (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_DROP_COUNT_SHIFT)) & ENET_IEEE_R_DROP_COUNT_MASK)
+#define ENET_IEEE_R_DROP_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_DROP_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_DROP_COUNT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_DROP_COUNT_SHIFT)) & ENET_IEEE_R_DROP_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_FRAME_OK - Frames Received OK Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_FRAME_OK_COUNT_MASK          (0xFFFFU)
-#define ENET_IEEE_R_FRAME_OK_COUNT_SHIFT         (0U)
-#define ENET_IEEE_R_FRAME_OK_COUNT(x)            (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_R_FRAME_OK_COUNT_MASK)
+#define ENET_IEEE_R_FRAME_OK_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_FRAME_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_FRAME_OK_COUNT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FRAME_OK_COUNT_SHIFT)) & ENET_IEEE_R_FRAME_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_CRC - Frames Received with CRC Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_CRC_COUNT_MASK               (0xFFFFU)
-#define ENET_IEEE_R_CRC_COUNT_SHIFT              (0U)
-#define ENET_IEEE_R_CRC_COUNT(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_CRC_COUNT_SHIFT)) & ENET_IEEE_R_CRC_COUNT_MASK)
+#define ENET_IEEE_R_CRC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_CRC_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_CRC_COUNT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_CRC_COUNT_SHIFT)) & ENET_IEEE_R_CRC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_ALIGN - Frames Received with Alignment Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_ALIGN_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_R_ALIGN_COUNT_SHIFT            (0U)
-#define ENET_IEEE_R_ALIGN_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_ALIGN_COUNT_SHIFT)) & ENET_IEEE_R_ALIGN_COUNT_MASK)
+#define ENET_IEEE_R_ALIGN_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_ALIGN_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_ALIGN_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_ALIGN_COUNT_SHIFT)) & ENET_IEEE_R_ALIGN_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_MACERR - Receive FIFO Overflow Count Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_MACERR_COUNT_MASK            (0xFFFFU)
-#define ENET_IEEE_R_MACERR_COUNT_SHIFT           (0U)
-#define ENET_IEEE_R_MACERR_COUNT(x)              (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_MACERR_COUNT_SHIFT)) & ENET_IEEE_R_MACERR_COUNT_MASK)
+#define ENET_IEEE_R_MACERR_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_MACERR_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_MACERR_COUNT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_MACERR_COUNT_SHIFT)) & ENET_IEEE_R_MACERR_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_FDXFC - Flow Control Pause Frames Received Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_FDXFC_COUNT_MASK             (0xFFFFU)
-#define ENET_IEEE_R_FDXFC_COUNT_SHIFT            (0U)
-#define ENET_IEEE_R_FDXFC_COUNT(x)               (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FDXFC_COUNT_SHIFT)) & ENET_IEEE_R_FDXFC_COUNT_MASK)
+#define ENET_IEEE_R_FDXFC_COUNT_MASK  (0xFFFFU)
+#define ENET_IEEE_R_FDXFC_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_FDXFC_COUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_FDXFC_COUNT_SHIFT)) & ENET_IEEE_R_FDXFC_COUNT_MASK)
 /*! @} */
 
 /*! @name IEEE_R_OCTETS_OK - Octet Count for Frames Received without Error Statistic Register */
 /*! @{ */
-#define ENET_IEEE_R_OCTETS_OK_COUNT_MASK         (0xFFFFFFFFU)
-#define ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT        (0U)
-#define ENET_IEEE_R_OCTETS_OK_COUNT(x)           (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_R_OCTETS_OK_COUNT_MASK)
+#define ENET_IEEE_R_OCTETS_OK_COUNT_MASK  (0xFFFFFFFFU)
+#define ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT (0U)
+#define ENET_IEEE_R_OCTETS_OK_COUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << ENET_IEEE_R_OCTETS_OK_COUNT_SHIFT)) & ENET_IEEE_R_OCTETS_OK_COUNT_MASK)
 /*! @} */
 
 /*! @name ATCR - Adjustable Timer Control Register */
 /*! @{ */
-#define ENET_ATCR_EN_MASK                        (0x1U)
-#define ENET_ATCR_EN_SHIFT                       (0U)
-#define ENET_ATCR_EN(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_EN_SHIFT)) & ENET_ATCR_EN_MASK)
-#define ENET_ATCR_OFFEN_MASK                     (0x4U)
-#define ENET_ATCR_OFFEN_SHIFT                    (2U)
-#define ENET_ATCR_OFFEN(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFEN_SHIFT)) & ENET_ATCR_OFFEN_MASK)
-#define ENET_ATCR_OFFRST_MASK                    (0x8U)
-#define ENET_ATCR_OFFRST_SHIFT                   (3U)
-#define ENET_ATCR_OFFRST(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFRST_SHIFT)) & ENET_ATCR_OFFRST_MASK)
-#define ENET_ATCR_PEREN_MASK                     (0x10U)
-#define ENET_ATCR_PEREN_SHIFT                    (4U)
-#define ENET_ATCR_PEREN(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PEREN_SHIFT)) & ENET_ATCR_PEREN_MASK)
-#define ENET_ATCR_PINPER_MASK                    (0x80U)
-#define ENET_ATCR_PINPER_SHIFT                   (7U)
-#define ENET_ATCR_PINPER(x)                      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PINPER_SHIFT)) & ENET_ATCR_PINPER_MASK)
-#define ENET_ATCR_RESTART_MASK                   (0x200U)
-#define ENET_ATCR_RESTART_SHIFT                  (9U)
-#define ENET_ATCR_RESTART(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_RESTART_SHIFT)) & ENET_ATCR_RESTART_MASK)
-#define ENET_ATCR_CAPTURE_MASK                   (0x800U)
-#define ENET_ATCR_CAPTURE_SHIFT                  (11U)
-#define ENET_ATCR_CAPTURE(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_CAPTURE_SHIFT)) & ENET_ATCR_CAPTURE_MASK)
-#define ENET_ATCR_SLAVE_MASK                     (0x2000U)
-#define ENET_ATCR_SLAVE_SHIFT                    (13U)
-#define ENET_ATCR_SLAVE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_SLAVE_SHIFT)) & ENET_ATCR_SLAVE_MASK)
+#define ENET_ATCR_EN_MASK       (0x1U)
+#define ENET_ATCR_EN_SHIFT      (0U)
+#define ENET_ATCR_EN(x)         (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_EN_SHIFT)) & ENET_ATCR_EN_MASK)
+#define ENET_ATCR_OFFEN_MASK    (0x4U)
+#define ENET_ATCR_OFFEN_SHIFT   (2U)
+#define ENET_ATCR_OFFEN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFEN_SHIFT)) & ENET_ATCR_OFFEN_MASK)
+#define ENET_ATCR_OFFRST_MASK   (0x8U)
+#define ENET_ATCR_OFFRST_SHIFT  (3U)
+#define ENET_ATCR_OFFRST(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_OFFRST_SHIFT)) & ENET_ATCR_OFFRST_MASK)
+#define ENET_ATCR_PEREN_MASK    (0x10U)
+#define ENET_ATCR_PEREN_SHIFT   (4U)
+#define ENET_ATCR_PEREN(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PEREN_SHIFT)) & ENET_ATCR_PEREN_MASK)
+#define ENET_ATCR_PINPER_MASK   (0x80U)
+#define ENET_ATCR_PINPER_SHIFT  (7U)
+#define ENET_ATCR_PINPER(x)     (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_PINPER_SHIFT)) & ENET_ATCR_PINPER_MASK)
+#define ENET_ATCR_RESTART_MASK  (0x200U)
+#define ENET_ATCR_RESTART_SHIFT (9U)
+#define ENET_ATCR_RESTART(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_RESTART_SHIFT)) & ENET_ATCR_RESTART_MASK)
+#define ENET_ATCR_CAPTURE_MASK  (0x800U)
+#define ENET_ATCR_CAPTURE_SHIFT (11U)
+#define ENET_ATCR_CAPTURE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_CAPTURE_SHIFT)) & ENET_ATCR_CAPTURE_MASK)
+#define ENET_ATCR_SLAVE_MASK    (0x2000U)
+#define ENET_ATCR_SLAVE_SHIFT   (13U)
+#define ENET_ATCR_SLAVE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_ATCR_SLAVE_SHIFT)) & ENET_ATCR_SLAVE_MASK)
 /*! @} */
 
 /*! @name ATVR - Timer Value Register */
 /*! @{ */
-#define ENET_ATVR_ATIME_MASK                     (0xFFFFFFFFU)
-#define ENET_ATVR_ATIME_SHIFT                    (0U)
-#define ENET_ATVR_ATIME(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_ATVR_ATIME_SHIFT)) & ENET_ATVR_ATIME_MASK)
+#define ENET_ATVR_ATIME_MASK  (0xFFFFFFFFU)
+#define ENET_ATVR_ATIME_SHIFT (0U)
+#define ENET_ATVR_ATIME(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATVR_ATIME_SHIFT)) & ENET_ATVR_ATIME_MASK)
 /*! @} */
 
 /*! @name ATOFF - Timer Offset Register */
 /*! @{ */
-#define ENET_ATOFF_OFFSET_MASK                   (0xFFFFFFFFU)
-#define ENET_ATOFF_OFFSET_SHIFT                  (0U)
-#define ENET_ATOFF_OFFSET(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATOFF_OFFSET_SHIFT)) & ENET_ATOFF_OFFSET_MASK)
+#define ENET_ATOFF_OFFSET_MASK  (0xFFFFFFFFU)
+#define ENET_ATOFF_OFFSET_SHIFT (0U)
+#define ENET_ATOFF_OFFSET(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATOFF_OFFSET_SHIFT)) & ENET_ATOFF_OFFSET_MASK)
 /*! @} */
 
 /*! @name ATPER - Timer Period Register */
 /*! @{ */
-#define ENET_ATPER_PERIOD_MASK                   (0xFFFFFFFFU)
-#define ENET_ATPER_PERIOD_SHIFT                  (0U)
-#define ENET_ATPER_PERIOD(x)                     (((uint32_t)(((uint32_t)(x)) << ENET_ATPER_PERIOD_SHIFT)) & ENET_ATPER_PERIOD_MASK)
+#define ENET_ATPER_PERIOD_MASK  (0xFFFFFFFFU)
+#define ENET_ATPER_PERIOD_SHIFT (0U)
+#define ENET_ATPER_PERIOD(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATPER_PERIOD_SHIFT)) & ENET_ATPER_PERIOD_MASK)
 /*! @} */
 
 /*! @name ATCOR - Timer Correction Register */
 /*! @{ */
-#define ENET_ATCOR_COR_MASK                      (0x7FFFFFFFU)
-#define ENET_ATCOR_COR_SHIFT                     (0U)
-#define ENET_ATCOR_COR(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ATCOR_COR_SHIFT)) & ENET_ATCOR_COR_MASK)
+#define ENET_ATCOR_COR_MASK  (0x7FFFFFFFU)
+#define ENET_ATCOR_COR_SHIFT (0U)
+#define ENET_ATCOR_COR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATCOR_COR_SHIFT)) & ENET_ATCOR_COR_MASK)
 /*! @} */
 
 /*! @name ATINC - Time-Stamping Clock Period Register */
 /*! @{ */
-#define ENET_ATINC_INC_MASK                      (0x7FU)
-#define ENET_ATINC_INC_SHIFT                     (0U)
-#define ENET_ATINC_INC(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_SHIFT)) & ENET_ATINC_INC_MASK)
-#define ENET_ATINC_INC_CORR_MASK                 (0x7F00U)
-#define ENET_ATINC_INC_CORR_SHIFT                (8U)
-#define ENET_ATINC_INC_CORR(x)                   (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_CORR_SHIFT)) & ENET_ATINC_INC_CORR_MASK)
+#define ENET_ATINC_INC_MASK       (0x7FU)
+#define ENET_ATINC_INC_SHIFT      (0U)
+#define ENET_ATINC_INC(x)         (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_SHIFT)) & ENET_ATINC_INC_MASK)
+#define ENET_ATINC_INC_CORR_MASK  (0x7F00U)
+#define ENET_ATINC_INC_CORR_SHIFT (8U)
+#define ENET_ATINC_INC_CORR(x)    (((uint32_t)(((uint32_t)(x)) << ENET_ATINC_INC_CORR_SHIFT)) & ENET_ATINC_INC_CORR_MASK)
 /*! @} */
 
 /*! @name ATSTMP - Timestamp of Last Transmitted Frame */
 /*! @{ */
-#define ENET_ATSTMP_TIMESTAMP_MASK               (0xFFFFFFFFU)
-#define ENET_ATSTMP_TIMESTAMP_SHIFT              (0U)
-#define ENET_ATSTMP_TIMESTAMP(x)                 (((uint32_t)(((uint32_t)(x)) << ENET_ATSTMP_TIMESTAMP_SHIFT)) & ENET_ATSTMP_TIMESTAMP_MASK)
+#define ENET_ATSTMP_TIMESTAMP_MASK  (0xFFFFFFFFU)
+#define ENET_ATSTMP_TIMESTAMP_SHIFT (0U)
+#define ENET_ATSTMP_TIMESTAMP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ENET_ATSTMP_TIMESTAMP_SHIFT)) & ENET_ATSTMP_TIMESTAMP_MASK)
 /*! @} */
 
 /*! @name TGSR - Timer Global Status Register */
 /*! @{ */
-#define ENET_TGSR_TF0_MASK                       (0x1U)
-#define ENET_TGSR_TF0_SHIFT                      (0U)
-#define ENET_TGSR_TF0(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF0_SHIFT)) & ENET_TGSR_TF0_MASK)
-#define ENET_TGSR_TF1_MASK                       (0x2U)
-#define ENET_TGSR_TF1_SHIFT                      (1U)
-#define ENET_TGSR_TF1(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF1_SHIFT)) & ENET_TGSR_TF1_MASK)
-#define ENET_TGSR_TF2_MASK                       (0x4U)
-#define ENET_TGSR_TF2_SHIFT                      (2U)
-#define ENET_TGSR_TF2(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF2_SHIFT)) & ENET_TGSR_TF2_MASK)
-#define ENET_TGSR_TF3_MASK                       (0x8U)
-#define ENET_TGSR_TF3_SHIFT                      (3U)
-#define ENET_TGSR_TF3(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF3_SHIFT)) & ENET_TGSR_TF3_MASK)
+#define ENET_TGSR_TF0_MASK  (0x1U)
+#define ENET_TGSR_TF0_SHIFT (0U)
+#define ENET_TGSR_TF0(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF0_SHIFT)) & ENET_TGSR_TF0_MASK)
+#define ENET_TGSR_TF1_MASK  (0x2U)
+#define ENET_TGSR_TF1_SHIFT (1U)
+#define ENET_TGSR_TF1(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF1_SHIFT)) & ENET_TGSR_TF1_MASK)
+#define ENET_TGSR_TF2_MASK  (0x4U)
+#define ENET_TGSR_TF2_SHIFT (2U)
+#define ENET_TGSR_TF2(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF2_SHIFT)) & ENET_TGSR_TF2_MASK)
+#define ENET_TGSR_TF3_MASK  (0x8U)
+#define ENET_TGSR_TF3_SHIFT (3U)
+#define ENET_TGSR_TF3(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TGSR_TF3_SHIFT)) & ENET_TGSR_TF3_MASK)
 /*! @} */
 
 /*! @name TCSR - Timer Control Status Register */
 /*! @{ */
-#define ENET_TCSR_TDRE_MASK                      (0x1U)
-#define ENET_TCSR_TDRE_SHIFT                     (0U)
-#define ENET_TCSR_TDRE(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TDRE_SHIFT)) & ENET_TCSR_TDRE_MASK)
-#define ENET_TCSR_TMODE_MASK                     (0x3CU)
-#define ENET_TCSR_TMODE_SHIFT                    (2U)
-#define ENET_TCSR_TMODE(x)                       (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TMODE_SHIFT)) & ENET_TCSR_TMODE_MASK)
-#define ENET_TCSR_TIE_MASK                       (0x40U)
-#define ENET_TCSR_TIE_SHIFT                      (6U)
-#define ENET_TCSR_TIE(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TIE_SHIFT)) & ENET_TCSR_TIE_MASK)
-#define ENET_TCSR_TF_MASK                        (0x80U)
-#define ENET_TCSR_TF_SHIFT                       (7U)
-#define ENET_TCSR_TF(x)                          (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TF_SHIFT)) & ENET_TCSR_TF_MASK)
-#define ENET_TCSR_TPWC_MASK                      (0xF800U)
-#define ENET_TCSR_TPWC_SHIFT                     (11U)
-#define ENET_TCSR_TPWC(x)                        (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TPWC_SHIFT)) & ENET_TCSR_TPWC_MASK)
+#define ENET_TCSR_TDRE_MASK   (0x1U)
+#define ENET_TCSR_TDRE_SHIFT  (0U)
+#define ENET_TCSR_TDRE(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TDRE_SHIFT)) & ENET_TCSR_TDRE_MASK)
+#define ENET_TCSR_TMODE_MASK  (0x3CU)
+#define ENET_TCSR_TMODE_SHIFT (2U)
+#define ENET_TCSR_TMODE(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TMODE_SHIFT)) & ENET_TCSR_TMODE_MASK)
+#define ENET_TCSR_TIE_MASK    (0x40U)
+#define ENET_TCSR_TIE_SHIFT   (6U)
+#define ENET_TCSR_TIE(x)      (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TIE_SHIFT)) & ENET_TCSR_TIE_MASK)
+#define ENET_TCSR_TF_MASK     (0x80U)
+#define ENET_TCSR_TF_SHIFT    (7U)
+#define ENET_TCSR_TF(x)       (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TF_SHIFT)) & ENET_TCSR_TF_MASK)
+#define ENET_TCSR_TPWC_MASK   (0xF800U)
+#define ENET_TCSR_TPWC_SHIFT  (11U)
+#define ENET_TCSR_TPWC(x)     (((uint32_t)(((uint32_t)(x)) << ENET_TCSR_TPWC_SHIFT)) & ENET_TCSR_TPWC_MASK)
 /*! @} */
 
 /* The count of ENET_TCSR */
-#define ENET_TCSR_COUNT                          (4U)
+#define ENET_TCSR_COUNT (4U)
 
 /*! @name TCCR - Timer Compare Capture Register */
 /*! @{ */
-#define ENET_TCCR_TCC_MASK                       (0xFFFFFFFFU)
-#define ENET_TCCR_TCC_SHIFT                      (0U)
-#define ENET_TCCR_TCC(x)                         (((uint32_t)(((uint32_t)(x)) << ENET_TCCR_TCC_SHIFT)) & ENET_TCCR_TCC_MASK)
+#define ENET_TCCR_TCC_MASK  (0xFFFFFFFFU)
+#define ENET_TCCR_TCC_SHIFT (0U)
+#define ENET_TCCR_TCC(x)    (((uint32_t)(((uint32_t)(x)) << ENET_TCCR_TCC_SHIFT)) & ENET_TCCR_TCC_MASK)
 /*! @} */
 
 /* The count of ENET_TCCR */
-#define ENET_TCCR_COUNT                          (4U)
-
+#define ENET_TCCR_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group ENET_Register_Masks */
 
-
 /* ENET - Peripheral instance base addresses */
 /** Peripheral ENET base address */
-#define ENET_BASE                                (0x402D8000u)
+#define ENET_BASE (0x402D8000u)
 /** Peripheral ENET base pointer */
-#define ENET                                     ((ENET_Type *)ENET_BASE)
+#define ENET ((ENET_Type *)ENET_BASE)
 /** Array initializer of ENET peripheral base addresses */
-#define ENET_BASE_ADDRS                          { ENET_BASE }
+#define ENET_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        ENET_BASE                                                                                                      \
+    }
 /** Array initializer of ENET peripheral base pointers */
-#define ENET_BASE_PTRS                           { ENET }
+#define ENET_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        ENET                                                                                                           \
+    }
 /** Interrupt vectors for the ENET peripheral type */
-#define ENET_Transmit_IRQS                       { ENET_IRQn }
-#define ENET_Receive_IRQS                        { ENET_IRQn }
-#define ENET_Error_IRQS                          { ENET_IRQn }
-#define ENET_1588_Timer_IRQS                     { ENET_1588_Timer_IRQn }
+#define ENET_Transmit_IRQS                                                                                             \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_Receive_IRQS                                                                                              \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_Error_IRQS                                                                                                \
+    {                                                                                                                  \
+        ENET_IRQn                                                                                                      \
+    }
+#define ENET_1588_Timer_IRQS                                                                                           \
+    {                                                                                                                  \
+        ENET_1588_Timer_IRQn                                                                                           \
+    }
 /* ENET Buffer Descriptor and Buffer Address Alignment. */
-#define ENET_BUFF_ALIGNMENT                      (64U)
-
+#define ENET_BUFF_ALIGNMENT (64U)
 
 /*!
  * @}
  */ /* end of group ENET_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- EWM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10122,13 +11537,14 @@ typedef struct {
  */
 
 /** EWM - Register Layout Typedef */
-typedef struct {
-  __IO uint8_t CTRL;                               /**< Control Register, offset: 0x0 */
-  __O  uint8_t SERV;                               /**< Service Register, offset: 0x1 */
-  __IO uint8_t CMPL;                               /**< Compare Low Register, offset: 0x2 */
-  __IO uint8_t CMPH;                               /**< Compare High Register, offset: 0x3 */
-  __IO uint8_t CLKCTRL;                            /**< Clock Control Register, offset: 0x4 */
-  __IO uint8_t CLKPRESCALER;                       /**< Clock Prescaler Register, offset: 0x5 */
+typedef struct
+{
+    __IO uint8_t CTRL;         /**< Control Register, offset: 0x0 */
+    __O uint8_t SERV;          /**< Service Register, offset: 0x1 */
+    __IO uint8_t CMPL;         /**< Compare Low Register, offset: 0x2 */
+    __IO uint8_t CMPH;         /**< Compare High Register, offset: 0x3 */
+    __IO uint8_t CLKCTRL;      /**< Clock Control Register, offset: 0x4 */
+    __IO uint8_t CLKPRESCALER; /**< Clock Prescaler Register, offset: 0x5 */
 } EWM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10142,78 +11558,85 @@ typedef struct {
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define EWM_CTRL_EWMEN_MASK                      (0x1U)
-#define EWM_CTRL_EWMEN_SHIFT                     (0U)
-#define EWM_CTRL_EWMEN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
-#define EWM_CTRL_ASSIN_MASK                      (0x2U)
-#define EWM_CTRL_ASSIN_SHIFT                     (1U)
-#define EWM_CTRL_ASSIN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
-#define EWM_CTRL_INEN_MASK                       (0x4U)
-#define EWM_CTRL_INEN_SHIFT                      (2U)
-#define EWM_CTRL_INEN(x)                         (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
-#define EWM_CTRL_INTEN_MASK                      (0x8U)
-#define EWM_CTRL_INTEN_SHIFT                     (3U)
-#define EWM_CTRL_INTEN(x)                        (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
+#define EWM_CTRL_EWMEN_MASK  (0x1U)
+#define EWM_CTRL_EWMEN_SHIFT (0U)
+#define EWM_CTRL_EWMEN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
+#define EWM_CTRL_ASSIN_MASK  (0x2U)
+#define EWM_CTRL_ASSIN_SHIFT (1U)
+#define EWM_CTRL_ASSIN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
+#define EWM_CTRL_INEN_MASK   (0x4U)
+#define EWM_CTRL_INEN_SHIFT  (2U)
+#define EWM_CTRL_INEN(x)     (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
+#define EWM_CTRL_INTEN_MASK  (0x8U)
+#define EWM_CTRL_INTEN_SHIFT (3U)
+#define EWM_CTRL_INTEN(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 /*! @} */
 
 /*! @name SERV - Service Register */
 /*! @{ */
-#define EWM_SERV_SERVICE_MASK                    (0xFFU)
-#define EWM_SERV_SERVICE_SHIFT                   (0U)
-#define EWM_SERV_SERVICE(x)                      (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
+#define EWM_SERV_SERVICE_MASK  (0xFFU)
+#define EWM_SERV_SERVICE_SHIFT (0U)
+#define EWM_SERV_SERVICE(x)    (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 /*! @} */
 
 /*! @name CMPL - Compare Low Register */
 /*! @{ */
-#define EWM_CMPL_COMPAREL_MASK                   (0xFFU)
-#define EWM_CMPL_COMPAREL_SHIFT                  (0U)
-#define EWM_CMPL_COMPAREL(x)                     (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
+#define EWM_CMPL_COMPAREL_MASK  (0xFFU)
+#define EWM_CMPL_COMPAREL_SHIFT (0U)
+#define EWM_CMPL_COMPAREL(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 /*! @} */
 
 /*! @name CMPH - Compare High Register */
 /*! @{ */
-#define EWM_CMPH_COMPAREH_MASK                   (0xFFU)
-#define EWM_CMPH_COMPAREH_SHIFT                  (0U)
-#define EWM_CMPH_COMPAREH(x)                     (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
+#define EWM_CMPH_COMPAREH_MASK  (0xFFU)
+#define EWM_CMPH_COMPAREH_SHIFT (0U)
+#define EWM_CMPH_COMPAREH(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 /*! @} */
 
 /*! @name CLKCTRL - Clock Control Register */
 /*! @{ */
-#define EWM_CLKCTRL_CLKSEL_MASK                  (0x3U)
-#define EWM_CLKCTRL_CLKSEL_SHIFT                 (0U)
-#define EWM_CLKCTRL_CLKSEL(x)                    (((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)
+#define EWM_CLKCTRL_CLKSEL_MASK  (0x3U)
+#define EWM_CLKCTRL_CLKSEL_SHIFT (0U)
+#define EWM_CLKCTRL_CLKSEL(x)    (((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)
 /*! @} */
 
 /*! @name CLKPRESCALER - Clock Prescaler Register */
 /*! @{ */
-#define EWM_CLKPRESCALER_CLK_DIV_MASK            (0xFFU)
-#define EWM_CLKPRESCALER_CLK_DIV_SHIFT           (0U)
-#define EWM_CLKPRESCALER_CLK_DIV(x)              (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
+#define EWM_CLKPRESCALER_CLK_DIV_MASK  (0xFFU)
+#define EWM_CLKPRESCALER_CLK_DIV_SHIFT (0U)
+#define EWM_CLKPRESCALER_CLK_DIV(x)                                                                                    \
+    (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group EWM_Register_Masks */
 
-
 /* EWM - Peripheral instance base addresses */
 /** Peripheral EWM base address */
-#define EWM_BASE                                 (0x400B4000u)
+#define EWM_BASE (0x400B4000u)
 /** Peripheral EWM base pointer */
-#define EWM                                      ((EWM_Type *)EWM_BASE)
+#define EWM ((EWM_Type *)EWM_BASE)
 /** Array initializer of EWM peripheral base addresses */
-#define EWM_BASE_ADDRS                           { EWM_BASE }
+#define EWM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        EWM_BASE                                                                                                       \
+    }
 /** Array initializer of EWM peripheral base pointers */
-#define EWM_BASE_PTRS                            { EWM }
+#define EWM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        EWM                                                                                                            \
+    }
 /** Interrupt vectors for the EWM peripheral type */
-#define EWM_IRQS                                 { EWM_IRQn }
+#define EWM_IRQS                                                                                                       \
+    {                                                                                                                  \
+        EWM_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group EWM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXIO Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10224,46 +11647,50 @@ typedef struct {
  */
 
 /** FLEXIO - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t CTRL;                              /**< FlexIO Control Register, offset: 0x8 */
-  __I  uint32_t PIN;                               /**< Pin State Register, offset: 0xC */
-  __IO uint32_t SHIFTSTAT;                         /**< Shifter Status Register, offset: 0x10 */
-  __IO uint32_t SHIFTERR;                          /**< Shifter Error Register, offset: 0x14 */
-  __IO uint32_t TIMSTAT;                           /**< Timer Status Register, offset: 0x18 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t SHIFTSIEN;                         /**< Shifter Status Interrupt Enable, offset: 0x20 */
-  __IO uint32_t SHIFTEIEN;                         /**< Shifter Error Interrupt Enable, offset: 0x24 */
-  __IO uint32_t TIMIEN;                            /**< Timer Interrupt Enable Register, offset: 0x28 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t SHIFTSDEN;                         /**< Shifter Status DMA Enable, offset: 0x30 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t SHIFTSTATE;                        /**< Shifter State Register, offset: 0x40 */
-       uint8_t RESERVED_3[60];
-  __IO uint32_t SHIFTCTL[4];                       /**< Shifter Control N Register, array offset: 0x80, array step: 0x4 */
-       uint8_t RESERVED_4[112];
-  __IO uint32_t SHIFTCFG[4];                       /**< Shifter Configuration N Register, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_5[240];
-  __IO uint32_t SHIFTBUF[4];                       /**< Shifter Buffer N Register, array offset: 0x200, array step: 0x4 */
-       uint8_t RESERVED_6[112];
-  __IO uint32_t SHIFTBUFBIS[4];                    /**< Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4 */
-       uint8_t RESERVED_7[112];
-  __IO uint32_t SHIFTBUFBYS[4];                    /**< Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4 */
-       uint8_t RESERVED_8[112];
-  __IO uint32_t SHIFTBUFBBS[4];                    /**< Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4 */
-       uint8_t RESERVED_9[112];
-  __IO uint32_t TIMCTL[4];                         /**< Timer Control N Register, array offset: 0x400, array step: 0x4 */
-       uint8_t RESERVED_10[112];
-  __IO uint32_t TIMCFG[4];                         /**< Timer Configuration N Register, array offset: 0x480, array step: 0x4 */
-       uint8_t RESERVED_11[112];
-  __IO uint32_t TIMCMP[4];                         /**< Timer Compare N Register, array offset: 0x500, array step: 0x4 */
-       uint8_t RESERVED_12[368];
-  __IO uint32_t SHIFTBUFNBS[4];                    /**< Shifter Buffer N Nibble Byte Swapped Register, array offset: 0x680, array step: 0x4 */
-       uint8_t RESERVED_13[112];
-  __IO uint32_t SHIFTBUFHWS[4];                    /**< Shifter Buffer N Half Word Swapped Register, array offset: 0x700, array step: 0x4 */
-       uint8_t RESERVED_14[112];
-  __IO uint32_t SHIFTBUFNIS[4];                    /**< Shifter Buffer N Nibble Swapped Register, array offset: 0x780, array step: 0x4 */
+typedef struct
+{
+    __I uint32_t VERID;      /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;      /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t CTRL;      /**< FlexIO Control Register, offset: 0x8 */
+    __I uint32_t PIN;        /**< Pin State Register, offset: 0xC */
+    __IO uint32_t SHIFTSTAT; /**< Shifter Status Register, offset: 0x10 */
+    __IO uint32_t SHIFTERR;  /**< Shifter Error Register, offset: 0x14 */
+    __IO uint32_t TIMSTAT;   /**< Timer Status Register, offset: 0x18 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t SHIFTSIEN; /**< Shifter Status Interrupt Enable, offset: 0x20 */
+    __IO uint32_t SHIFTEIEN; /**< Shifter Error Interrupt Enable, offset: 0x24 */
+    __IO uint32_t TIMIEN;    /**< Timer Interrupt Enable Register, offset: 0x28 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t SHIFTSDEN; /**< Shifter Status DMA Enable, offset: 0x30 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t SHIFTSTATE; /**< Shifter State Register, offset: 0x40 */
+    uint8_t RESERVED_3[60];
+    __IO uint32_t SHIFTCTL[4]; /**< Shifter Control N Register, array offset: 0x80, array step: 0x4 */
+    uint8_t RESERVED_4[112];
+    __IO uint32_t SHIFTCFG[4]; /**< Shifter Configuration N Register, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_5[240];
+    __IO uint32_t SHIFTBUF[4]; /**< Shifter Buffer N Register, array offset: 0x200, array step: 0x4 */
+    uint8_t RESERVED_6[112];
+    __IO uint32_t SHIFTBUFBIS[4]; /**< Shifter Buffer N Bit Swapped Register, array offset: 0x280, array step: 0x4 */
+    uint8_t RESERVED_7[112];
+    __IO uint32_t SHIFTBUFBYS[4]; /**< Shifter Buffer N Byte Swapped Register, array offset: 0x300, array step: 0x4 */
+    uint8_t RESERVED_8[112];
+    __IO uint32_t
+        SHIFTBUFBBS[4]; /**< Shifter Buffer N Bit Byte Swapped Register, array offset: 0x380, array step: 0x4 */
+    uint8_t RESERVED_9[112];
+    __IO uint32_t TIMCTL[4]; /**< Timer Control N Register, array offset: 0x400, array step: 0x4 */
+    uint8_t RESERVED_10[112];
+    __IO uint32_t TIMCFG[4]; /**< Timer Configuration N Register, array offset: 0x480, array step: 0x4 */
+    uint8_t RESERVED_11[112];
+    __IO uint32_t TIMCMP[4]; /**< Timer Compare N Register, array offset: 0x500, array step: 0x4 */
+    uint8_t RESERVED_12[368];
+    __IO uint32_t
+        SHIFTBUFNBS[4]; /**< Shifter Buffer N Nibble Byte Swapped Register, array offset: 0x680, array step: 0x4 */
+    uint8_t RESERVED_13[112];
+    __IO uint32_t
+        SHIFTBUFHWS[4]; /**< Shifter Buffer N Half Word Swapped Register, array offset: 0x700, array step: 0x4 */
+    uint8_t RESERVED_14[112];
+    __IO uint32_t SHIFTBUFNIS[4]; /**< Shifter Buffer N Nibble Swapped Register, array offset: 0x780, array step: 0x4 */
 } FLEXIO_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10277,322 +11704,365 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define FLEXIO_VERID_FEATURE_MASK                (0xFFFFU)
-#define FLEXIO_VERID_FEATURE_SHIFT               (0U)
-#define FLEXIO_VERID_FEATURE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_FEATURE_SHIFT)) & FLEXIO_VERID_FEATURE_MASK)
-#define FLEXIO_VERID_MINOR_MASK                  (0xFF0000U)
-#define FLEXIO_VERID_MINOR_SHIFT                 (16U)
-#define FLEXIO_VERID_MINOR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MINOR_SHIFT)) & FLEXIO_VERID_MINOR_MASK)
-#define FLEXIO_VERID_MAJOR_MASK                  (0xFF000000U)
-#define FLEXIO_VERID_MAJOR_SHIFT                 (24U)
-#define FLEXIO_VERID_MAJOR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MAJOR_SHIFT)) & FLEXIO_VERID_MAJOR_MASK)
+#define FLEXIO_VERID_FEATURE_MASK  (0xFFFFU)
+#define FLEXIO_VERID_FEATURE_SHIFT (0U)
+#define FLEXIO_VERID_FEATURE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_FEATURE_SHIFT)) & FLEXIO_VERID_FEATURE_MASK)
+#define FLEXIO_VERID_MINOR_MASK  (0xFF0000U)
+#define FLEXIO_VERID_MINOR_SHIFT (16U)
+#define FLEXIO_VERID_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MINOR_SHIFT)) & FLEXIO_VERID_MINOR_MASK)
+#define FLEXIO_VERID_MAJOR_MASK  (0xFF000000U)
+#define FLEXIO_VERID_MAJOR_SHIFT (24U)
+#define FLEXIO_VERID_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_VERID_MAJOR_SHIFT)) & FLEXIO_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define FLEXIO_PARAM_SHIFTER_MASK                (0xFFU)
-#define FLEXIO_PARAM_SHIFTER_SHIFT               (0U)
-#define FLEXIO_PARAM_SHIFTER(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_SHIFTER_SHIFT)) & FLEXIO_PARAM_SHIFTER_MASK)
-#define FLEXIO_PARAM_TIMER_MASK                  (0xFF00U)
-#define FLEXIO_PARAM_TIMER_SHIFT                 (8U)
-#define FLEXIO_PARAM_TIMER(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TIMER_SHIFT)) & FLEXIO_PARAM_TIMER_MASK)
-#define FLEXIO_PARAM_PIN_MASK                    (0xFF0000U)
-#define FLEXIO_PARAM_PIN_SHIFT                   (16U)
-#define FLEXIO_PARAM_PIN(x)                      (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_PIN_SHIFT)) & FLEXIO_PARAM_PIN_MASK)
-#define FLEXIO_PARAM_TRIGGER_MASK                (0xFF000000U)
-#define FLEXIO_PARAM_TRIGGER_SHIFT               (24U)
-#define FLEXIO_PARAM_TRIGGER(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TRIGGER_SHIFT)) & FLEXIO_PARAM_TRIGGER_MASK)
+#define FLEXIO_PARAM_SHIFTER_MASK  (0xFFU)
+#define FLEXIO_PARAM_SHIFTER_SHIFT (0U)
+#define FLEXIO_PARAM_SHIFTER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_SHIFTER_SHIFT)) & FLEXIO_PARAM_SHIFTER_MASK)
+#define FLEXIO_PARAM_TIMER_MASK    (0xFF00U)
+#define FLEXIO_PARAM_TIMER_SHIFT   (8U)
+#define FLEXIO_PARAM_TIMER(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TIMER_SHIFT)) & FLEXIO_PARAM_TIMER_MASK)
+#define FLEXIO_PARAM_PIN_MASK      (0xFF0000U)
+#define FLEXIO_PARAM_PIN_SHIFT     (16U)
+#define FLEXIO_PARAM_PIN(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_PIN_SHIFT)) & FLEXIO_PARAM_PIN_MASK)
+#define FLEXIO_PARAM_TRIGGER_MASK  (0xFF000000U)
+#define FLEXIO_PARAM_TRIGGER_SHIFT (24U)
+#define FLEXIO_PARAM_TRIGGER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PARAM_TRIGGER_SHIFT)) & FLEXIO_PARAM_TRIGGER_MASK)
 /*! @} */
 
 /*! @name CTRL - FlexIO Control Register */
 /*! @{ */
-#define FLEXIO_CTRL_FLEXEN_MASK                  (0x1U)
-#define FLEXIO_CTRL_FLEXEN_SHIFT                 (0U)
-#define FLEXIO_CTRL_FLEXEN(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FLEXEN_SHIFT)) & FLEXIO_CTRL_FLEXEN_MASK)
-#define FLEXIO_CTRL_SWRST_MASK                   (0x2U)
-#define FLEXIO_CTRL_SWRST_SHIFT                  (1U)
-#define FLEXIO_CTRL_SWRST(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_SWRST_SHIFT)) & FLEXIO_CTRL_SWRST_MASK)
-#define FLEXIO_CTRL_FASTACC_MASK                 (0x4U)
-#define FLEXIO_CTRL_FASTACC_SHIFT                (2U)
-#define FLEXIO_CTRL_FASTACC(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FASTACC_SHIFT)) & FLEXIO_CTRL_FASTACC_MASK)
-#define FLEXIO_CTRL_DBGE_MASK                    (0x40000000U)
-#define FLEXIO_CTRL_DBGE_SHIFT                   (30U)
-#define FLEXIO_CTRL_DBGE(x)                      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)
-#define FLEXIO_CTRL_DOZEN_MASK                   (0x80000000U)
-#define FLEXIO_CTRL_DOZEN_SHIFT                  (31U)
-#define FLEXIO_CTRL_DOZEN(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DOZEN_SHIFT)) & FLEXIO_CTRL_DOZEN_MASK)
+#define FLEXIO_CTRL_FLEXEN_MASK   (0x1U)
+#define FLEXIO_CTRL_FLEXEN_SHIFT  (0U)
+#define FLEXIO_CTRL_FLEXEN(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FLEXEN_SHIFT)) & FLEXIO_CTRL_FLEXEN_MASK)
+#define FLEXIO_CTRL_SWRST_MASK    (0x2U)
+#define FLEXIO_CTRL_SWRST_SHIFT   (1U)
+#define FLEXIO_CTRL_SWRST(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_SWRST_SHIFT)) & FLEXIO_CTRL_SWRST_MASK)
+#define FLEXIO_CTRL_FASTACC_MASK  (0x4U)
+#define FLEXIO_CTRL_FASTACC_SHIFT (2U)
+#define FLEXIO_CTRL_FASTACC(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_FASTACC_SHIFT)) & FLEXIO_CTRL_FASTACC_MASK)
+#define FLEXIO_CTRL_DBGE_MASK     (0x40000000U)
+#define FLEXIO_CTRL_DBGE_SHIFT    (30U)
+#define FLEXIO_CTRL_DBGE(x)       (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)
+#define FLEXIO_CTRL_DOZEN_MASK    (0x80000000U)
+#define FLEXIO_CTRL_DOZEN_SHIFT   (31U)
+#define FLEXIO_CTRL_DOZEN(x)      (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DOZEN_SHIFT)) & FLEXIO_CTRL_DOZEN_MASK)
 /*! @} */
 
 /*! @name PIN - Pin State Register */
 /*! @{ */
-#define FLEXIO_PIN_PDI_MASK                      (0xFFFFFFFFU)
-#define FLEXIO_PIN_PDI_SHIFT                     (0U)
-#define FLEXIO_PIN_PDI(x)                        (((uint32_t)(((uint32_t)(x)) << FLEXIO_PIN_PDI_SHIFT)) & FLEXIO_PIN_PDI_MASK)
+#define FLEXIO_PIN_PDI_MASK  (0xFFFFFFFFU)
+#define FLEXIO_PIN_PDI_SHIFT (0U)
+#define FLEXIO_PIN_PDI(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_PIN_PDI_SHIFT)) & FLEXIO_PIN_PDI_MASK)
 /*! @} */
 
 /*! @name SHIFTSTAT - Shifter Status Register */
 /*! @{ */
-#define FLEXIO_SHIFTSTAT_SSF_MASK                (0xFU)
-#define FLEXIO_SHIFTSTAT_SSF_SHIFT               (0U)
-#define FLEXIO_SHIFTSTAT_SSF(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTAT_SSF_SHIFT)) & FLEXIO_SHIFTSTAT_SSF_MASK)
+#define FLEXIO_SHIFTSTAT_SSF_MASK  (0xFU)
+#define FLEXIO_SHIFTSTAT_SSF_SHIFT (0U)
+#define FLEXIO_SHIFTSTAT_SSF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTAT_SSF_SHIFT)) & FLEXIO_SHIFTSTAT_SSF_MASK)
 /*! @} */
 
 /*! @name SHIFTERR - Shifter Error Register */
 /*! @{ */
-#define FLEXIO_SHIFTERR_SEF_MASK                 (0xFU)
-#define FLEXIO_SHIFTERR_SEF_SHIFT                (0U)
-#define FLEXIO_SHIFTERR_SEF(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTERR_SEF_SHIFT)) & FLEXIO_SHIFTERR_SEF_MASK)
+#define FLEXIO_SHIFTERR_SEF_MASK  (0xFU)
+#define FLEXIO_SHIFTERR_SEF_SHIFT (0U)
+#define FLEXIO_SHIFTERR_SEF(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTERR_SEF_SHIFT)) & FLEXIO_SHIFTERR_SEF_MASK)
 /*! @} */
 
 /*! @name TIMSTAT - Timer Status Register */
 /*! @{ */
-#define FLEXIO_TIMSTAT_TSF_MASK                  (0xFU)
-#define FLEXIO_TIMSTAT_TSF_SHIFT                 (0U)
-#define FLEXIO_TIMSTAT_TSF(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMSTAT_TSF_SHIFT)) & FLEXIO_TIMSTAT_TSF_MASK)
+#define FLEXIO_TIMSTAT_TSF_MASK  (0xFU)
+#define FLEXIO_TIMSTAT_TSF_SHIFT (0U)
+#define FLEXIO_TIMSTAT_TSF(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMSTAT_TSF_SHIFT)) & FLEXIO_TIMSTAT_TSF_MASK)
 /*! @} */
 
 /*! @name SHIFTSIEN - Shifter Status Interrupt Enable */
 /*! @{ */
-#define FLEXIO_SHIFTSIEN_SSIE_MASK               (0xFU)
-#define FLEXIO_SHIFTSIEN_SSIE_SHIFT              (0U)
-#define FLEXIO_SHIFTSIEN_SSIE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSIEN_SSIE_SHIFT)) & FLEXIO_SHIFTSIEN_SSIE_MASK)
+#define FLEXIO_SHIFTSIEN_SSIE_MASK  (0xFU)
+#define FLEXIO_SHIFTSIEN_SSIE_SHIFT (0U)
+#define FLEXIO_SHIFTSIEN_SSIE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSIEN_SSIE_SHIFT)) & FLEXIO_SHIFTSIEN_SSIE_MASK)
 /*! @} */
 
 /*! @name SHIFTEIEN - Shifter Error Interrupt Enable */
 /*! @{ */
-#define FLEXIO_SHIFTEIEN_SEIE_MASK               (0xFU)
-#define FLEXIO_SHIFTEIEN_SEIE_SHIFT              (0U)
-#define FLEXIO_SHIFTEIEN_SEIE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTEIEN_SEIE_SHIFT)) & FLEXIO_SHIFTEIEN_SEIE_MASK)
+#define FLEXIO_SHIFTEIEN_SEIE_MASK  (0xFU)
+#define FLEXIO_SHIFTEIEN_SEIE_SHIFT (0U)
+#define FLEXIO_SHIFTEIEN_SEIE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTEIEN_SEIE_SHIFT)) & FLEXIO_SHIFTEIEN_SEIE_MASK)
 /*! @} */
 
 /*! @name TIMIEN - Timer Interrupt Enable Register */
 /*! @{ */
-#define FLEXIO_TIMIEN_TEIE_MASK                  (0xFU)
-#define FLEXIO_TIMIEN_TEIE_SHIFT                 (0U)
-#define FLEXIO_TIMIEN_TEIE(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMIEN_TEIE_SHIFT)) & FLEXIO_TIMIEN_TEIE_MASK)
+#define FLEXIO_TIMIEN_TEIE_MASK  (0xFU)
+#define FLEXIO_TIMIEN_TEIE_SHIFT (0U)
+#define FLEXIO_TIMIEN_TEIE(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMIEN_TEIE_SHIFT)) & FLEXIO_TIMIEN_TEIE_MASK)
 /*! @} */
 
 /*! @name SHIFTSDEN - Shifter Status DMA Enable */
 /*! @{ */
-#define FLEXIO_SHIFTSDEN_SSDE_MASK               (0xFU)
-#define FLEXIO_SHIFTSDEN_SSDE_SHIFT              (0U)
-#define FLEXIO_SHIFTSDEN_SSDE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSDEN_SSDE_SHIFT)) & FLEXIO_SHIFTSDEN_SSDE_MASK)
+#define FLEXIO_SHIFTSDEN_SSDE_MASK  (0xFU)
+#define FLEXIO_SHIFTSDEN_SSDE_SHIFT (0U)
+#define FLEXIO_SHIFTSDEN_SSDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSDEN_SSDE_SHIFT)) & FLEXIO_SHIFTSDEN_SSDE_MASK)
 /*! @} */
 
 /*! @name SHIFTSTATE - Shifter State Register */
 /*! @{ */
-#define FLEXIO_SHIFTSTATE_STATE_MASK             (0x7U)
-#define FLEXIO_SHIFTSTATE_STATE_SHIFT            (0U)
-#define FLEXIO_SHIFTSTATE_STATE(x)               (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTATE_STATE_SHIFT)) & FLEXIO_SHIFTSTATE_STATE_MASK)
+#define FLEXIO_SHIFTSTATE_STATE_MASK  (0x7U)
+#define FLEXIO_SHIFTSTATE_STATE_SHIFT (0U)
+#define FLEXIO_SHIFTSTATE_STATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTSTATE_STATE_SHIFT)) & FLEXIO_SHIFTSTATE_STATE_MASK)
 /*! @} */
 
 /*! @name SHIFTCTL - Shifter Control N Register */
 /*! @{ */
-#define FLEXIO_SHIFTCTL_SMOD_MASK                (0x7U)
-#define FLEXIO_SHIFTCTL_SMOD_SHIFT               (0U)
-#define FLEXIO_SHIFTCTL_SMOD(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_SMOD_SHIFT)) & FLEXIO_SHIFTCTL_SMOD_MASK)
-#define FLEXIO_SHIFTCTL_PINPOL_MASK              (0x80U)
-#define FLEXIO_SHIFTCTL_PINPOL_SHIFT             (7U)
-#define FLEXIO_SHIFTCTL_PINPOL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINPOL_SHIFT)) & FLEXIO_SHIFTCTL_PINPOL_MASK)
-#define FLEXIO_SHIFTCTL_PINSEL_MASK              (0x1F00U)
-#define FLEXIO_SHIFTCTL_PINSEL_SHIFT             (8U)
-#define FLEXIO_SHIFTCTL_PINSEL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINSEL_SHIFT)) & FLEXIO_SHIFTCTL_PINSEL_MASK)
-#define FLEXIO_SHIFTCTL_PINCFG_MASK              (0x30000U)
-#define FLEXIO_SHIFTCTL_PINCFG_SHIFT             (16U)
-#define FLEXIO_SHIFTCTL_PINCFG(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINCFG_SHIFT)) & FLEXIO_SHIFTCTL_PINCFG_MASK)
-#define FLEXIO_SHIFTCTL_TIMPOL_MASK              (0x800000U)
-#define FLEXIO_SHIFTCTL_TIMPOL_SHIFT             (23U)
-#define FLEXIO_SHIFTCTL_TIMPOL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMPOL_SHIFT)) & FLEXIO_SHIFTCTL_TIMPOL_MASK)
-#define FLEXIO_SHIFTCTL_TIMSEL_MASK              (0x3000000U)
-#define FLEXIO_SHIFTCTL_TIMSEL_SHIFT             (24U)
-#define FLEXIO_SHIFTCTL_TIMSEL(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMSEL_SHIFT)) & FLEXIO_SHIFTCTL_TIMSEL_MASK)
+#define FLEXIO_SHIFTCTL_SMOD_MASK  (0x7U)
+#define FLEXIO_SHIFTCTL_SMOD_SHIFT (0U)
+#define FLEXIO_SHIFTCTL_SMOD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_SMOD_SHIFT)) & FLEXIO_SHIFTCTL_SMOD_MASK)
+#define FLEXIO_SHIFTCTL_PINPOL_MASK  (0x80U)
+#define FLEXIO_SHIFTCTL_PINPOL_SHIFT (7U)
+#define FLEXIO_SHIFTCTL_PINPOL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINPOL_SHIFT)) & FLEXIO_SHIFTCTL_PINPOL_MASK)
+#define FLEXIO_SHIFTCTL_PINSEL_MASK  (0x1F00U)
+#define FLEXIO_SHIFTCTL_PINSEL_SHIFT (8U)
+#define FLEXIO_SHIFTCTL_PINSEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINSEL_SHIFT)) & FLEXIO_SHIFTCTL_PINSEL_MASK)
+#define FLEXIO_SHIFTCTL_PINCFG_MASK  (0x30000U)
+#define FLEXIO_SHIFTCTL_PINCFG_SHIFT (16U)
+#define FLEXIO_SHIFTCTL_PINCFG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_PINCFG_SHIFT)) & FLEXIO_SHIFTCTL_PINCFG_MASK)
+#define FLEXIO_SHIFTCTL_TIMPOL_MASK  (0x800000U)
+#define FLEXIO_SHIFTCTL_TIMPOL_SHIFT (23U)
+#define FLEXIO_SHIFTCTL_TIMPOL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMPOL_SHIFT)) & FLEXIO_SHIFTCTL_TIMPOL_MASK)
+#define FLEXIO_SHIFTCTL_TIMSEL_MASK  (0x3000000U)
+#define FLEXIO_SHIFTCTL_TIMSEL_SHIFT (24U)
+#define FLEXIO_SHIFTCTL_TIMSEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCTL_TIMSEL_SHIFT)) & FLEXIO_SHIFTCTL_TIMSEL_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTCTL */
-#define FLEXIO_SHIFTCTL_COUNT                    (4U)
+#define FLEXIO_SHIFTCTL_COUNT (4U)
 
 /*! @name SHIFTCFG - Shifter Configuration N Register */
 /*! @{ */
-#define FLEXIO_SHIFTCFG_SSTART_MASK              (0x3U)
-#define FLEXIO_SHIFTCFG_SSTART_SHIFT             (0U)
-#define FLEXIO_SHIFTCFG_SSTART(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTART_SHIFT)) & FLEXIO_SHIFTCFG_SSTART_MASK)
-#define FLEXIO_SHIFTCFG_SSTOP_MASK               (0x30U)
-#define FLEXIO_SHIFTCFG_SSTOP_SHIFT              (4U)
-#define FLEXIO_SHIFTCFG_SSTOP(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTOP_SHIFT)) & FLEXIO_SHIFTCFG_SSTOP_MASK)
-#define FLEXIO_SHIFTCFG_INSRC_MASK               (0x100U)
-#define FLEXIO_SHIFTCFG_INSRC_SHIFT              (8U)
-#define FLEXIO_SHIFTCFG_INSRC(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_INSRC_SHIFT)) & FLEXIO_SHIFTCFG_INSRC_MASK)
-#define FLEXIO_SHIFTCFG_PWIDTH_MASK              (0x1F0000U)
-#define FLEXIO_SHIFTCFG_PWIDTH_SHIFT             (16U)
-#define FLEXIO_SHIFTCFG_PWIDTH(x)                (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_PWIDTH_SHIFT)) & FLEXIO_SHIFTCFG_PWIDTH_MASK)
+#define FLEXIO_SHIFTCFG_SSTART_MASK  (0x3U)
+#define FLEXIO_SHIFTCFG_SSTART_SHIFT (0U)
+#define FLEXIO_SHIFTCFG_SSTART(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTART_SHIFT)) & FLEXIO_SHIFTCFG_SSTART_MASK)
+#define FLEXIO_SHIFTCFG_SSTOP_MASK  (0x30U)
+#define FLEXIO_SHIFTCFG_SSTOP_SHIFT (4U)
+#define FLEXIO_SHIFTCFG_SSTOP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_SSTOP_SHIFT)) & FLEXIO_SHIFTCFG_SSTOP_MASK)
+#define FLEXIO_SHIFTCFG_INSRC_MASK  (0x100U)
+#define FLEXIO_SHIFTCFG_INSRC_SHIFT (8U)
+#define FLEXIO_SHIFTCFG_INSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_INSRC_SHIFT)) & FLEXIO_SHIFTCFG_INSRC_MASK)
+#define FLEXIO_SHIFTCFG_PWIDTH_MASK  (0x1F0000U)
+#define FLEXIO_SHIFTCFG_PWIDTH_SHIFT (16U)
+#define FLEXIO_SHIFTCFG_PWIDTH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTCFG_PWIDTH_SHIFT)) & FLEXIO_SHIFTCFG_PWIDTH_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTCFG */
-#define FLEXIO_SHIFTCFG_COUNT                    (4U)
+#define FLEXIO_SHIFTCFG_COUNT (4U)
 
 /*! @name SHIFTBUF - Shifter Buffer N Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUF_SHIFTBUF_MASK            (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT           (0U)
-#define FLEXIO_SHIFTBUF_SHIFTBUF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT)) & FLEXIO_SHIFTBUF_SHIFTBUF_MASK)
+#define FLEXIO_SHIFTBUF_SHIFTBUF_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT (0U)
+#define FLEXIO_SHIFTBUF_SHIFTBUF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUF_SHIFTBUF_SHIFT)) & FLEXIO_SHIFTBUF_SHIFTBUF_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUF */
-#define FLEXIO_SHIFTBUF_COUNT                    (4U)
+#define FLEXIO_SHIFTBUF_COUNT (4U)
 
 /*! @name SHIFTBUFBIS - Shifter Buffer N Bit Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT)) & FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_SHIFT)) & FLEXIO_SHIFTBUFBIS_SHIFTBUFBIS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBIS */
-#define FLEXIO_SHIFTBUFBIS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBIS_COUNT (4U)
 
 /*! @name SHIFTBUFBYS - Shifter Buffer N Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT)) & FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_SHIFT)) & FLEXIO_SHIFTBUFBYS_SHIFTBUFBYS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBYS */
-#define FLEXIO_SHIFTBUFBYS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBYS_COUNT (4U)
 
 /*! @name SHIFTBUFBBS - Shifter Buffer N Bit Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT)) & FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_SHIFT)) & FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFBBS */
-#define FLEXIO_SHIFTBUFBBS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFBBS_COUNT (4U)
 
 /*! @name TIMCTL - Timer Control N Register */
 /*! @{ */
-#define FLEXIO_TIMCTL_TIMOD_MASK                 (0x3U)
-#define FLEXIO_TIMCTL_TIMOD_SHIFT                (0U)
-#define FLEXIO_TIMCTL_TIMOD(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TIMOD_SHIFT)) & FLEXIO_TIMCTL_TIMOD_MASK)
-#define FLEXIO_TIMCTL_PINPOL_MASK                (0x80U)
-#define FLEXIO_TIMCTL_PINPOL_SHIFT               (7U)
-#define FLEXIO_TIMCTL_PINPOL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINPOL_SHIFT)) & FLEXIO_TIMCTL_PINPOL_MASK)
-#define FLEXIO_TIMCTL_PINSEL_MASK                (0x1F00U)
-#define FLEXIO_TIMCTL_PINSEL_SHIFT               (8U)
-#define FLEXIO_TIMCTL_PINSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINSEL_SHIFT)) & FLEXIO_TIMCTL_PINSEL_MASK)
-#define FLEXIO_TIMCTL_PINCFG_MASK                (0x30000U)
-#define FLEXIO_TIMCTL_PINCFG_SHIFT               (16U)
-#define FLEXIO_TIMCTL_PINCFG(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINCFG_SHIFT)) & FLEXIO_TIMCTL_PINCFG_MASK)
-#define FLEXIO_TIMCTL_TRGSRC_MASK                (0x400000U)
-#define FLEXIO_TIMCTL_TRGSRC_SHIFT               (22U)
-#define FLEXIO_TIMCTL_TRGSRC(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)
-#define FLEXIO_TIMCTL_TRGPOL_MASK                (0x800000U)
-#define FLEXIO_TIMCTL_TRGPOL_SHIFT               (23U)
-#define FLEXIO_TIMCTL_TRGPOL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGPOL_SHIFT)) & FLEXIO_TIMCTL_TRGPOL_MASK)
-#define FLEXIO_TIMCTL_TRGSEL_MASK                (0x3F000000U)
-#define FLEXIO_TIMCTL_TRGSEL_SHIFT               (24U)
-#define FLEXIO_TIMCTL_TRGSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSEL_SHIFT)) & FLEXIO_TIMCTL_TRGSEL_MASK)
+#define FLEXIO_TIMCTL_TIMOD_MASK   (0x3U)
+#define FLEXIO_TIMCTL_TIMOD_SHIFT  (0U)
+#define FLEXIO_TIMCTL_TIMOD(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TIMOD_SHIFT)) & FLEXIO_TIMCTL_TIMOD_MASK)
+#define FLEXIO_TIMCTL_PINPOL_MASK  (0x80U)
+#define FLEXIO_TIMCTL_PINPOL_SHIFT (7U)
+#define FLEXIO_TIMCTL_PINPOL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINPOL_SHIFT)) & FLEXIO_TIMCTL_PINPOL_MASK)
+#define FLEXIO_TIMCTL_PINSEL_MASK  (0x1F00U)
+#define FLEXIO_TIMCTL_PINSEL_SHIFT (8U)
+#define FLEXIO_TIMCTL_PINSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINSEL_SHIFT)) & FLEXIO_TIMCTL_PINSEL_MASK)
+#define FLEXIO_TIMCTL_PINCFG_MASK  (0x30000U)
+#define FLEXIO_TIMCTL_PINCFG_SHIFT (16U)
+#define FLEXIO_TIMCTL_PINCFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_PINCFG_SHIFT)) & FLEXIO_TIMCTL_PINCFG_MASK)
+#define FLEXIO_TIMCTL_TRGSRC_MASK  (0x400000U)
+#define FLEXIO_TIMCTL_TRGSRC_SHIFT (22U)
+#define FLEXIO_TIMCTL_TRGSRC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)
+#define FLEXIO_TIMCTL_TRGPOL_MASK  (0x800000U)
+#define FLEXIO_TIMCTL_TRGPOL_SHIFT (23U)
+#define FLEXIO_TIMCTL_TRGPOL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGPOL_SHIFT)) & FLEXIO_TIMCTL_TRGPOL_MASK)
+#define FLEXIO_TIMCTL_TRGSEL_MASK  (0x3F000000U)
+#define FLEXIO_TIMCTL_TRGSEL_SHIFT (24U)
+#define FLEXIO_TIMCTL_TRGSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSEL_SHIFT)) & FLEXIO_TIMCTL_TRGSEL_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCTL */
-#define FLEXIO_TIMCTL_COUNT                      (4U)
+#define FLEXIO_TIMCTL_COUNT (4U)
 
 /*! @name TIMCFG - Timer Configuration N Register */
 /*! @{ */
-#define FLEXIO_TIMCFG_TSTART_MASK                (0x2U)
-#define FLEXIO_TIMCFG_TSTART_SHIFT               (1U)
-#define FLEXIO_TIMCFG_TSTART(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTART_SHIFT)) & FLEXIO_TIMCFG_TSTART_MASK)
-#define FLEXIO_TIMCFG_TSTOP_MASK                 (0x30U)
-#define FLEXIO_TIMCFG_TSTOP_SHIFT                (4U)
-#define FLEXIO_TIMCFG_TSTOP(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTOP_SHIFT)) & FLEXIO_TIMCFG_TSTOP_MASK)
-#define FLEXIO_TIMCFG_TIMENA_MASK                (0x700U)
-#define FLEXIO_TIMCFG_TIMENA_SHIFT               (8U)
-#define FLEXIO_TIMCFG_TIMENA(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMENA_SHIFT)) & FLEXIO_TIMCFG_TIMENA_MASK)
-#define FLEXIO_TIMCFG_TIMDIS_MASK                (0x7000U)
-#define FLEXIO_TIMCFG_TIMDIS_SHIFT               (12U)
-#define FLEXIO_TIMCFG_TIMDIS(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDIS_SHIFT)) & FLEXIO_TIMCFG_TIMDIS_MASK)
-#define FLEXIO_TIMCFG_TIMRST_MASK                (0x70000U)
-#define FLEXIO_TIMCFG_TIMRST_SHIFT               (16U)
-#define FLEXIO_TIMCFG_TIMRST(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMRST_SHIFT)) & FLEXIO_TIMCFG_TIMRST_MASK)
-#define FLEXIO_TIMCFG_TIMDEC_MASK                (0x300000U)
-#define FLEXIO_TIMCFG_TIMDEC_SHIFT               (20U)
-#define FLEXIO_TIMCFG_TIMDEC(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDEC_SHIFT)) & FLEXIO_TIMCFG_TIMDEC_MASK)
-#define FLEXIO_TIMCFG_TIMOUT_MASK                (0x3000000U)
-#define FLEXIO_TIMCFG_TIMOUT_SHIFT               (24U)
-#define FLEXIO_TIMCFG_TIMOUT(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMOUT_SHIFT)) & FLEXIO_TIMCFG_TIMOUT_MASK)
+#define FLEXIO_TIMCFG_TSTART_MASK  (0x2U)
+#define FLEXIO_TIMCFG_TSTART_SHIFT (1U)
+#define FLEXIO_TIMCFG_TSTART(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTART_SHIFT)) & FLEXIO_TIMCFG_TSTART_MASK)
+#define FLEXIO_TIMCFG_TSTOP_MASK   (0x30U)
+#define FLEXIO_TIMCFG_TSTOP_SHIFT  (4U)
+#define FLEXIO_TIMCFG_TSTOP(x)     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TSTOP_SHIFT)) & FLEXIO_TIMCFG_TSTOP_MASK)
+#define FLEXIO_TIMCFG_TIMENA_MASK  (0x700U)
+#define FLEXIO_TIMCFG_TIMENA_SHIFT (8U)
+#define FLEXIO_TIMCFG_TIMENA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMENA_SHIFT)) & FLEXIO_TIMCFG_TIMENA_MASK)
+#define FLEXIO_TIMCFG_TIMDIS_MASK  (0x7000U)
+#define FLEXIO_TIMCFG_TIMDIS_SHIFT (12U)
+#define FLEXIO_TIMCFG_TIMDIS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDIS_SHIFT)) & FLEXIO_TIMCFG_TIMDIS_MASK)
+#define FLEXIO_TIMCFG_TIMRST_MASK  (0x70000U)
+#define FLEXIO_TIMCFG_TIMRST_SHIFT (16U)
+#define FLEXIO_TIMCFG_TIMRST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMRST_SHIFT)) & FLEXIO_TIMCFG_TIMRST_MASK)
+#define FLEXIO_TIMCFG_TIMDEC_MASK  (0x300000U)
+#define FLEXIO_TIMCFG_TIMDEC_SHIFT (20U)
+#define FLEXIO_TIMCFG_TIMDEC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMDEC_SHIFT)) & FLEXIO_TIMCFG_TIMDEC_MASK)
+#define FLEXIO_TIMCFG_TIMOUT_MASK  (0x3000000U)
+#define FLEXIO_TIMCFG_TIMOUT_SHIFT (24U)
+#define FLEXIO_TIMCFG_TIMOUT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCFG_TIMOUT_SHIFT)) & FLEXIO_TIMCFG_TIMOUT_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCFG */
-#define FLEXIO_TIMCFG_COUNT                      (4U)
+#define FLEXIO_TIMCFG_COUNT (4U)
 
 /*! @name TIMCMP - Timer Compare N Register */
 /*! @{ */
-#define FLEXIO_TIMCMP_CMP_MASK                   (0xFFFFU)
-#define FLEXIO_TIMCMP_CMP_SHIFT                  (0U)
-#define FLEXIO_TIMCMP_CMP(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCMP_CMP_SHIFT)) & FLEXIO_TIMCMP_CMP_MASK)
+#define FLEXIO_TIMCMP_CMP_MASK  (0xFFFFU)
+#define FLEXIO_TIMCMP_CMP_SHIFT (0U)
+#define FLEXIO_TIMCMP_CMP(x)    (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCMP_CMP_SHIFT)) & FLEXIO_TIMCMP_CMP_MASK)
 /*! @} */
 
 /* The count of FLEXIO_TIMCMP */
-#define FLEXIO_TIMCMP_COUNT                      (4U)
+#define FLEXIO_TIMCMP_COUNT (4U)
 
 /*! @name SHIFTBUFNBS - Shifter Buffer N Nibble Byte Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT)) & FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_SHIFT)) & FLEXIO_SHIFTBUFNBS_SHIFTBUFNBS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFNBS */
-#define FLEXIO_SHIFTBUFNBS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFNBS_COUNT (4U)
 
 /*! @name SHIFTBUFHWS - Shifter Buffer N Half Word Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT)) & FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_SHIFT)) & FLEXIO_SHIFTBUFHWS_SHIFTBUFHWS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFHWS */
-#define FLEXIO_SHIFTBUFHWS_COUNT                 (4U)
+#define FLEXIO_SHIFTBUFHWS_COUNT (4U)
 
 /*! @name SHIFTBUFNIS - Shifter Buffer N Nibble Swapped Register */
 /*! @{ */
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK      (0xFFFFFFFFU)
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT     (0U)
-#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT)) & FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK  (0xFFFFFFFFU)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT (0U)
+#define FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_SHIFT)) & FLEXIO_SHIFTBUFNIS_SHIFTBUFNIS_MASK)
 /*! @} */
 
 /* The count of FLEXIO_SHIFTBUFNIS */
-#define FLEXIO_SHIFTBUFNIS_COUNT                 (4U)
-
+#define FLEXIO_SHIFTBUFNIS_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group FLEXIO_Register_Masks */
 
-
 /* FLEXIO - Peripheral instance base addresses */
 /** Peripheral FLEXIO1 base address */
-#define FLEXIO1_BASE                             (0x401AC000u)
+#define FLEXIO1_BASE (0x401AC000u)
 /** Peripheral FLEXIO1 base pointer */
-#define FLEXIO1                                  ((FLEXIO_Type *)FLEXIO1_BASE)
+#define FLEXIO1 ((FLEXIO_Type *)FLEXIO1_BASE)
 /** Peripheral FLEXIO2 base address */
-#define FLEXIO2_BASE                             (0x401B0000u)
+#define FLEXIO2_BASE (0x401B0000u)
 /** Peripheral FLEXIO2 base pointer */
-#define FLEXIO2                                  ((FLEXIO_Type *)FLEXIO2_BASE)
+#define FLEXIO2 ((FLEXIO_Type *)FLEXIO2_BASE)
 /** Array initializer of FLEXIO peripheral base addresses */
-#define FLEXIO_BASE_ADDRS                        { 0u, FLEXIO1_BASE, FLEXIO2_BASE }
+#define FLEXIO_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, FLEXIO1_BASE, FLEXIO2_BASE                                                                                 \
+    }
 /** Array initializer of FLEXIO peripheral base pointers */
-#define FLEXIO_BASE_PTRS                         { (FLEXIO_Type *)0u, FLEXIO1, FLEXIO2 }
+#define FLEXIO_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (FLEXIO_Type *)0u, FLEXIO1, FLEXIO2                                                                            \
+    }
 /** Interrupt vectors for the FLEXIO peripheral type */
-#define FLEXIO_IRQS                              { NotAvail_IRQn, FLEXIO1_IRQn, FLEXIO2_IRQn }
+#define FLEXIO_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, FLEXIO1_IRQn, FLEXIO2_IRQn                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group FLEXIO_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXRAM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10603,14 +12073,15 @@ typedef struct {
  */
 
 /** FLEXRAM - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t TCM_CTRL;                          /**< TCM CRTL Register, offset: 0x0 */
-  __IO uint32_t OCRAM_MAGIC_ADDR;                  /**< OCRAM Magic Address Register, offset: 0x4 */
-  __IO uint32_t DTCM_MAGIC_ADDR;                   /**< DTCM Magic Address Register, offset: 0x8 */
-  __IO uint32_t ITCM_MAGIC_ADDR;                   /**< ITCM Magic Address Register, offset: 0xC */
-  __IO uint32_t INT_STATUS;                        /**< Interrupt Status Register, offset: 0x10 */
-  __IO uint32_t INT_STAT_EN;                       /**< Interrupt Status Enable Register, offset: 0x14 */
-  __IO uint32_t INT_SIG_EN;                        /**< Interrupt Enable Register, offset: 0x18 */
+typedef struct
+{
+    __IO uint32_t TCM_CTRL;         /**< TCM CRTL Register, offset: 0x0 */
+    __IO uint32_t OCRAM_MAGIC_ADDR; /**< OCRAM Magic Address Register, offset: 0x4 */
+    __IO uint32_t DTCM_MAGIC_ADDR;  /**< DTCM Magic Address Register, offset: 0x8 */
+    __IO uint32_t ITCM_MAGIC_ADDR;  /**< ITCM Magic Address Register, offset: 0xC */
+    __IO uint32_t INT_STATUS;       /**< Interrupt Status Register, offset: 0x10 */
+    __IO uint32_t INT_STAT_EN;      /**< Interrupt Status Enable Register, offset: 0x14 */
+    __IO uint32_t INT_SIG_EN;       /**< Interrupt Enable Register, offset: 0x18 */
 } FLEXRAM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10624,157 +12095,221 @@ typedef struct {
 
 /*! @name TCM_CTRL - TCM CRTL Register */
 /*! @{ */
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK       (0x1U)
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT      (0U)
-#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK       (0x2U)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT      (1U)
-#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK       (0x4U)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT      (2U)
-#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON(x)         (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT)) & FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK)
-#define FLEXRAM_TCM_CTRL_Reserved_MASK           (0xFFFFFFF8U)
-#define FLEXRAM_TCM_CTRL_Reserved_SHIFT          (3U)
-#define FLEXRAM_TCM_CTRL_Reserved(x)             (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_Reserved_SHIFT)) & FLEXRAM_TCM_CTRL_Reserved_MASK)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK  (0x1U)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT (0U)
+#define FLEXRAM_TCM_CTRL_TCM_WWAIT_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_WWAIT_EN_MASK)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK  (0x2U)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT (1U)
+#define FLEXRAM_TCM_CTRL_TCM_RWAIT_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_SHIFT)) & FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK  (0x4U)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT (2U)
+#define FLEXRAM_TCM_CTRL_FORCE_CLK_ON(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_FORCE_CLK_ON_SHIFT)) & FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK)
+#define FLEXRAM_TCM_CTRL_Reserved_MASK  (0xFFFFFFF8U)
+#define FLEXRAM_TCM_CTRL_Reserved_SHIFT (3U)
+#define FLEXRAM_TCM_CTRL_Reserved(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_TCM_CTRL_Reserved_SHIFT)) & FLEXRAM_TCM_CTRL_Reserved_MASK)
 /*! @} */
 
 /*! @name OCRAM_MAGIC_ADDR - OCRAM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_SHIFT)) &                                 \
+     FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_WR_RD_SEL_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK   (0xFFFE0000U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT  (17U)
-#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved(x)     (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_SHIFT)) &                                \
+     FLEXRAM_OCRAM_MAGIC_ADDR_OCRAM_MAGIC_ADDR_MASK)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_OCRAM_MAGIC_ADDR_Reserved(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_OCRAM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name DTCM_MAGIC_ADDR - DTCM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_SHIFT)) &                                   \
+     FLEXRAM_DTCM_MAGIC_ADDR_DTCM_WR_RD_SEL_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK    (0xFFFE0000U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT   (17U)
-#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved(x)      (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_SHIFT)) &                                  \
+     FLEXRAM_DTCM_MAGIC_ADDR_DTCM_MAGIC_ADDR_MASK)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_DTCM_MAGIC_ADDR_Reserved(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_DTCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_DTCM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name ITCM_MAGIC_ADDR - ITCM Magic Address Register */
 /*! @{ */
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK (0x1U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK  (0x1U)
 #define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT (0U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK (0x1FFFEU)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_SHIFT)) &                                   \
+     FLEXRAM_ITCM_MAGIC_ADDR_ITCM_WR_RD_SEL_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK  (0x1FFFEU)
 #define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT (1U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK    (0xFFFE0000U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT   (17U)
-#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved(x)      (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_SHIFT)) &                                  \
+     FLEXRAM_ITCM_MAGIC_ADDR_ITCM_MAGIC_ADDR_MASK)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK  (0xFFFE0000U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT (17U)
+#define FLEXRAM_ITCM_MAGIC_ADDR_Reserved(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_ITCM_MAGIC_ADDR_Reserved_SHIFT)) & FLEXRAM_ITCM_MAGIC_ADDR_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status Register */
 /*! @{ */
 #define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK  (0x1U)
 #define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT (0U)
-#define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_ITCM_MAM_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK  (0x2U)
 #define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT (1U)
-#define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK (0x4U)
+#define FLEXRAM_INT_STATUS_DTCM_MAM_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK  (0x4U)
 #define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT (2U)
-#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_SHIFT)) &                                      \
+     FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK  (0x8U)
 #define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT (3U)
-#define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_ITCM_ERR_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK)
 #define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK  (0x10U)
 #define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT (4U)
-#define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK (0x20U)
+#define FLEXRAM_INT_STATUS_DTCM_ERR_STATUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_SHIFT)) &                                       \
+     FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK  (0x20U)
 #define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT (5U)
-#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT)) & FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK)
-#define FLEXRAM_INT_STATUS_Reserved_MASK         (0xFFFFFFC0U)
-#define FLEXRAM_INT_STATUS_Reserved_SHIFT        (6U)
-#define FLEXRAM_INT_STATUS_Reserved(x)           (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_Reserved_SHIFT)) & FLEXRAM_INT_STATUS_Reserved_MASK)
+#define FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_SHIFT)) &                                      \
+     FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK)
+#define FLEXRAM_INT_STATUS_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_STATUS_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_STATUS_Reserved(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STATUS_Reserved_SHIFT)) & FLEXRAM_INT_STATUS_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_STAT_EN - Interrupt Status Enable Register */
 /*! @{ */
-#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK (0x1U)
+#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK  (0x1U)
 #define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT (0U)
-#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK (0x2U)
+#define FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_ITCM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK  (0x2U)
 #define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT (1U)
-#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK (0x4U)
+#define FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_DTCM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK  (0x4U)
 #define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT (2U)
-#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK (0x8U)
+#define FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_SHIFT)) &                                    \
+     FLEXRAM_INT_STAT_EN_OCRAM_MAM_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK  (0x8U)
 #define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT (3U)
-#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK (0x10U)
+#define FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK  (0x10U)
 #define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT (4U)
-#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN(x)  (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK (0x20U)
+#define FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_SHIFT)) &                                     \
+     FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK  (0x20U)
 #define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT (5U)
-#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN(x) (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT)) & FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK)
-#define FLEXRAM_INT_STAT_EN_Reserved_MASK        (0xFFFFFFC0U)
-#define FLEXRAM_INT_STAT_EN_Reserved_SHIFT       (6U)
-#define FLEXRAM_INT_STAT_EN_Reserved(x)          (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_Reserved_SHIFT)) & FLEXRAM_INT_STAT_EN_Reserved_MASK)
+#define FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_SHIFT)) &                                    \
+     FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK)
+#define FLEXRAM_INT_STAT_EN_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_STAT_EN_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_STAT_EN_Reserved(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_STAT_EN_Reserved_SHIFT)) & FLEXRAM_INT_STAT_EN_Reserved_MASK)
 /*! @} */
 
 /*! @name INT_SIG_EN - Interrupt Enable Register */
 /*! @{ */
 #define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK  (0x1U)
 #define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT (0U)
-#define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK  (0x2U)
 #define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT (1U)
-#define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK (0x4U)
+#define FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK  (0x4U)
 #define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT (2U)
-#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_SHIFT)) &                                      \
+     FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK  (0x8U)
 #define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT (3U)
-#define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK)
 #define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK  (0x10U)
 #define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT (4U)
-#define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN(x)    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK (0x20U)
+#define FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_SHIFT)) &                                       \
+     FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK  (0x20U)
 #define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT (5U)
-#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN(x)   (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT)) & FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK)
-#define FLEXRAM_INT_SIG_EN_Reserved_MASK         (0xFFFFFFC0U)
-#define FLEXRAM_INT_SIG_EN_Reserved_SHIFT        (6U)
-#define FLEXRAM_INT_SIG_EN_Reserved(x)           (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_Reserved_SHIFT)) & FLEXRAM_INT_SIG_EN_Reserved_MASK)
+#define FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_SHIFT)) &                                      \
+     FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK)
+#define FLEXRAM_INT_SIG_EN_Reserved_MASK  (0xFFFFFFC0U)
+#define FLEXRAM_INT_SIG_EN_Reserved_SHIFT (6U)
+#define FLEXRAM_INT_SIG_EN_Reserved(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXRAM_INT_SIG_EN_Reserved_SHIFT)) & FLEXRAM_INT_SIG_EN_Reserved_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group FLEXRAM_Register_Masks */
 
-
 /* FLEXRAM - Peripheral instance base addresses */
 /** Peripheral FLEXRAM base address */
-#define FLEXRAM_BASE                             (0x400B0000u)
+#define FLEXRAM_BASE (0x400B0000u)
 /** Peripheral FLEXRAM base pointer */
-#define FLEXRAM                                  ((FLEXRAM_Type *)FLEXRAM_BASE)
+#define FLEXRAM ((FLEXRAM_Type *)FLEXRAM_BASE)
 /** Array initializer of FLEXRAM peripheral base addresses */
-#define FLEXRAM_BASE_ADDRS                       { FLEXRAM_BASE }
+#define FLEXRAM_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        FLEXRAM_BASE                                                                                                   \
+    }
 /** Array initializer of FLEXRAM peripheral base pointers */
-#define FLEXRAM_BASE_PTRS                        { FLEXRAM }
+#define FLEXRAM_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        FLEXRAM                                                                                                        \
+    }
 /** Interrupt vectors for the FLEXRAM peripheral type */
-#define FLEXRAM_IRQS                             { FLEXRAM_IRQn }
+#define FLEXRAM_IRQS                                                                                                   \
+    {                                                                                                                  \
+        FLEXRAM_IRQn                                                                                                   \
+    }
 
 /*!
  * @}
  */ /* end of group FLEXRAM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- FLEXSPI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -10785,42 +12320,49 @@ typedef struct {
  */
 
 /** FLEXSPI - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR0;                              /**< Module Control Register 0, offset: 0x0 */
-  __IO uint32_t MCR1;                              /**< Module Control Register 1, offset: 0x4 */
-  __IO uint32_t MCR2;                              /**< Module Control Register 2, offset: 0x8 */
-  __IO uint32_t AHBCR;                             /**< AHB Bus Control Register, offset: 0xC */
-  __IO uint32_t INTEN;                             /**< Interrupt Enable Register, offset: 0x10 */
-  __IO uint32_t INTR;                              /**< Interrupt Register, offset: 0x14 */
-  __IO uint32_t LUTKEY;                            /**< LUT Key Register, offset: 0x18 */
-  __IO uint32_t LUTCR;                             /**< LUT Control Register, offset: 0x1C */
-  __IO uint32_t AHBRXBUFCR0[4];                    /**< AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0, array offset: 0x20, array step: 0x4 */
-       uint8_t RESERVED_0[48];
-  __IO uint32_t FLSHCR0[4];                        /**< Flash A1 Control Register 0..Flash B2 Control Register 0, array offset: 0x60, array step: 0x4 */
-  __IO uint32_t FLSHCR1[4];                        /**< Flash A1 Control Register 1..Flash B2 Control Register 1, array offset: 0x70, array step: 0x4 */
-  __IO uint32_t FLSHCR2[4];                        /**< Flash A1 Control Register 2..Flash B2 Control Register 2, array offset: 0x80, array step: 0x4 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t FLSHCR4;                           /**< Flash Control Register 4, offset: 0x94 */
-       uint8_t RESERVED_2[8];
-  __IO uint32_t IPCR0;                             /**< IP Control Register 0, offset: 0xA0 */
-  __IO uint32_t IPCR1;                             /**< IP Control Register 1, offset: 0xA4 */
-       uint8_t RESERVED_3[8];
-  __IO uint32_t IPCMD;                             /**< IP Command Register, offset: 0xB0 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t IPRXFCR;                           /**< IP RX FIFO Control Register, offset: 0xB8 */
-  __IO uint32_t IPTXFCR;                           /**< IP TX FIFO Control Register, offset: 0xBC */
-  __IO uint32_t DLLCR[2];                          /**< DLL Control Register 0, array offset: 0xC0, array step: 0x4 */
-       uint8_t RESERVED_5[24];
-  __I  uint32_t STS0;                              /**< Status Register 0, offset: 0xE0 */
-  __I  uint32_t STS1;                              /**< Status Register 1, offset: 0xE4 */
-  __I  uint32_t STS2;                              /**< Status Register 2, offset: 0xE8 */
-  __I  uint32_t AHBSPNDSTS;                        /**< AHB Suspend Status Register, offset: 0xEC */
-  __I  uint32_t IPRXFSTS;                          /**< IP RX FIFO Status Register, offset: 0xF0 */
-  __I  uint32_t IPTXFSTS;                          /**< IP TX FIFO Status Register, offset: 0xF4 */
-       uint8_t RESERVED_6[8];
-  __I  uint32_t RFDR[32];                          /**< IP RX FIFO Data Register 0..IP RX FIFO Data Register 31, array offset: 0x100, array step: 0x4 */
-  __O  uint32_t TFDR[32];                          /**< IP TX FIFO Data Register 0..IP TX FIFO Data Register 31, array offset: 0x180, array step: 0x4 */
-  __IO uint32_t LUT[64];                           /**< LUT 0..LUT 63, array offset: 0x200, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t MCR0;           /**< Module Control Register 0, offset: 0x0 */
+    __IO uint32_t MCR1;           /**< Module Control Register 1, offset: 0x4 */
+    __IO uint32_t MCR2;           /**< Module Control Register 2, offset: 0x8 */
+    __IO uint32_t AHBCR;          /**< AHB Bus Control Register, offset: 0xC */
+    __IO uint32_t INTEN;          /**< Interrupt Enable Register, offset: 0x10 */
+    __IO uint32_t INTR;           /**< Interrupt Register, offset: 0x14 */
+    __IO uint32_t LUTKEY;         /**< LUT Key Register, offset: 0x18 */
+    __IO uint32_t LUTCR;          /**< LUT Control Register, offset: 0x1C */
+    __IO uint32_t AHBRXBUFCR0[4]; /**< AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0, array
+                                     offset: 0x20, array step: 0x4 */
+    uint8_t RESERVED_0[48];
+    __IO uint32_t FLSHCR0[4]; /**< Flash A1 Control Register 0..Flash B2 Control Register 0, array offset: 0x60, array
+                                 step: 0x4 */
+    __IO uint32_t FLSHCR1[4]; /**< Flash A1 Control Register 1..Flash B2 Control Register 1, array offset: 0x70, array
+                                 step: 0x4 */
+    __IO uint32_t FLSHCR2[4]; /**< Flash A1 Control Register 2..Flash B2 Control Register 2, array offset: 0x80, array
+                                 step: 0x4 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t FLSHCR4; /**< Flash Control Register 4, offset: 0x94 */
+    uint8_t RESERVED_2[8];
+    __IO uint32_t IPCR0; /**< IP Control Register 0, offset: 0xA0 */
+    __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */
+    uint8_t RESERVED_3[8];
+    __IO uint32_t IPCMD; /**< IP Command Register, offset: 0xB0 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t IPRXFCR;  /**< IP RX FIFO Control Register, offset: 0xB8 */
+    __IO uint32_t IPTXFCR;  /**< IP TX FIFO Control Register, offset: 0xBC */
+    __IO uint32_t DLLCR[2]; /**< DLL Control Register 0, array offset: 0xC0, array step: 0x4 */
+    uint8_t RESERVED_5[24];
+    __I uint32_t STS0;       /**< Status Register 0, offset: 0xE0 */
+    __I uint32_t STS1;       /**< Status Register 1, offset: 0xE4 */
+    __I uint32_t STS2;       /**< Status Register 2, offset: 0xE8 */
+    __I uint32_t AHBSPNDSTS; /**< AHB Suspend Status Register, offset: 0xEC */
+    __I uint32_t IPRXFSTS;   /**< IP RX FIFO Status Register, offset: 0xF0 */
+    __I uint32_t IPTXFSTS;   /**< IP TX FIFO Status Register, offset: 0xF4 */
+    uint8_t RESERVED_6[8];
+    __I uint32_t
+        RFDR[32]; /**< IP RX FIFO Data Register 0..IP RX FIFO Data Register 31, array offset: 0x100, array step: 0x4 */
+    __O uint32_t
+        TFDR[32]; /**< IP TX FIFO Data Register 0..IP TX FIFO Data Register 31, array offset: 0x180, array step: 0x4 */
+    __IO uint32_t LUT[64]; /**< LUT 0..LUT 63, array offset: 0x200, array step: 0x4 */
 } FLEXSPI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -10834,520 +12376,623 @@ typedef struct {
 
 /*! @name MCR0 - Module Control Register 0 */
 /*! @{ */
-#define FLEXSPI_MCR0_SWRESET_MASK                (0x1U)
-#define FLEXSPI_MCR0_SWRESET_SHIFT               (0U)
-#define FLEXSPI_MCR0_SWRESET(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SWRESET_SHIFT)) & FLEXSPI_MCR0_SWRESET_MASK)
-#define FLEXSPI_MCR0_MDIS_MASK                   (0x2U)
-#define FLEXSPI_MCR0_MDIS_SHIFT                  (1U)
-#define FLEXSPI_MCR0_MDIS(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_MDIS_SHIFT)) & FLEXSPI_MCR0_MDIS_MASK)
-#define FLEXSPI_MCR0_RXCLKSRC_MASK               (0x30U)
-#define FLEXSPI_MCR0_RXCLKSRC_SHIFT              (4U)
-#define FLEXSPI_MCR0_RXCLKSRC(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_RXCLKSRC_SHIFT)) & FLEXSPI_MCR0_RXCLKSRC_MASK)
-#define FLEXSPI_MCR0_ARDFEN_MASK                 (0x40U)
-#define FLEXSPI_MCR0_ARDFEN_SHIFT                (6U)
-#define FLEXSPI_MCR0_ARDFEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ARDFEN_SHIFT)) & FLEXSPI_MCR0_ARDFEN_MASK)
-#define FLEXSPI_MCR0_ATDFEN_MASK                 (0x80U)
-#define FLEXSPI_MCR0_ATDFEN_SHIFT                (7U)
-#define FLEXSPI_MCR0_ATDFEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ATDFEN_SHIFT)) & FLEXSPI_MCR0_ATDFEN_MASK)
-#define FLEXSPI_MCR0_HSEN_MASK                   (0x800U)
-#define FLEXSPI_MCR0_HSEN_SHIFT                  (11U)
-#define FLEXSPI_MCR0_HSEN(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_HSEN_SHIFT)) & FLEXSPI_MCR0_HSEN_MASK)
-#define FLEXSPI_MCR0_DOZEEN_MASK                 (0x1000U)
-#define FLEXSPI_MCR0_DOZEEN_SHIFT                (12U)
-#define FLEXSPI_MCR0_DOZEEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_DOZEEN_SHIFT)) & FLEXSPI_MCR0_DOZEEN_MASK)
-#define FLEXSPI_MCR0_COMBINATIONEN_MASK          (0x2000U)
-#define FLEXSPI_MCR0_COMBINATIONEN_SHIFT         (13U)
-#define FLEXSPI_MCR0_COMBINATIONEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_COMBINATIONEN_SHIFT)) & FLEXSPI_MCR0_COMBINATIONEN_MASK)
-#define FLEXSPI_MCR0_SCKFREERUNEN_MASK           (0x4000U)
-#define FLEXSPI_MCR0_SCKFREERUNEN_SHIFT          (14U)
-#define FLEXSPI_MCR0_SCKFREERUNEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SCKFREERUNEN_SHIFT)) & FLEXSPI_MCR0_SCKFREERUNEN_MASK)
-#define FLEXSPI_MCR0_IPGRANTWAIT_MASK            (0xFF0000U)
-#define FLEXSPI_MCR0_IPGRANTWAIT_SHIFT           (16U)
-#define FLEXSPI_MCR0_IPGRANTWAIT(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_IPGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_IPGRANTWAIT_MASK)
-#define FLEXSPI_MCR0_AHBGRANTWAIT_MASK           (0xFF000000U)
-#define FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT          (24U)
-#define FLEXSPI_MCR0_AHBGRANTWAIT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_AHBGRANTWAIT_MASK)
+#define FLEXSPI_MCR0_SWRESET_MASK  (0x1U)
+#define FLEXSPI_MCR0_SWRESET_SHIFT (0U)
+#define FLEXSPI_MCR0_SWRESET(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SWRESET_SHIFT)) & FLEXSPI_MCR0_SWRESET_MASK)
+#define FLEXSPI_MCR0_MDIS_MASK      (0x2U)
+#define FLEXSPI_MCR0_MDIS_SHIFT     (1U)
+#define FLEXSPI_MCR0_MDIS(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_MDIS_SHIFT)) & FLEXSPI_MCR0_MDIS_MASK)
+#define FLEXSPI_MCR0_RXCLKSRC_MASK  (0x30U)
+#define FLEXSPI_MCR0_RXCLKSRC_SHIFT (4U)
+#define FLEXSPI_MCR0_RXCLKSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_RXCLKSRC_SHIFT)) & FLEXSPI_MCR0_RXCLKSRC_MASK)
+#define FLEXSPI_MCR0_ARDFEN_MASK         (0x40U)
+#define FLEXSPI_MCR0_ARDFEN_SHIFT        (6U)
+#define FLEXSPI_MCR0_ARDFEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ARDFEN_SHIFT)) & FLEXSPI_MCR0_ARDFEN_MASK)
+#define FLEXSPI_MCR0_ATDFEN_MASK         (0x80U)
+#define FLEXSPI_MCR0_ATDFEN_SHIFT        (7U)
+#define FLEXSPI_MCR0_ATDFEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_ATDFEN_SHIFT)) & FLEXSPI_MCR0_ATDFEN_MASK)
+#define FLEXSPI_MCR0_HSEN_MASK           (0x800U)
+#define FLEXSPI_MCR0_HSEN_SHIFT          (11U)
+#define FLEXSPI_MCR0_HSEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_HSEN_SHIFT)) & FLEXSPI_MCR0_HSEN_MASK)
+#define FLEXSPI_MCR0_DOZEEN_MASK         (0x1000U)
+#define FLEXSPI_MCR0_DOZEEN_SHIFT        (12U)
+#define FLEXSPI_MCR0_DOZEEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_DOZEEN_SHIFT)) & FLEXSPI_MCR0_DOZEEN_MASK)
+#define FLEXSPI_MCR0_COMBINATIONEN_MASK  (0x2000U)
+#define FLEXSPI_MCR0_COMBINATIONEN_SHIFT (13U)
+#define FLEXSPI_MCR0_COMBINATIONEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_COMBINATIONEN_SHIFT)) & FLEXSPI_MCR0_COMBINATIONEN_MASK)
+#define FLEXSPI_MCR0_SCKFREERUNEN_MASK  (0x4000U)
+#define FLEXSPI_MCR0_SCKFREERUNEN_SHIFT (14U)
+#define FLEXSPI_MCR0_SCKFREERUNEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_SCKFREERUNEN_SHIFT)) & FLEXSPI_MCR0_SCKFREERUNEN_MASK)
+#define FLEXSPI_MCR0_IPGRANTWAIT_MASK  (0xFF0000U)
+#define FLEXSPI_MCR0_IPGRANTWAIT_SHIFT (16U)
+#define FLEXSPI_MCR0_IPGRANTWAIT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_IPGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_IPGRANTWAIT_MASK)
+#define FLEXSPI_MCR0_AHBGRANTWAIT_MASK  (0xFF000000U)
+#define FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT (24U)
+#define FLEXSPI_MCR0_AHBGRANTWAIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR0_AHBGRANTWAIT_SHIFT)) & FLEXSPI_MCR0_AHBGRANTWAIT_MASK)
 /*! @} */
 
 /*! @name MCR1 - Module Control Register 1 */
 /*! @{ */
-#define FLEXSPI_MCR1_AHBBUSWAIT_MASK             (0xFFFFU)
-#define FLEXSPI_MCR1_AHBBUSWAIT_SHIFT            (0U)
-#define FLEXSPI_MCR1_AHBBUSWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_AHBBUSWAIT_SHIFT)) & FLEXSPI_MCR1_AHBBUSWAIT_MASK)
-#define FLEXSPI_MCR1_SEQWAIT_MASK                (0xFFFF0000U)
-#define FLEXSPI_MCR1_SEQWAIT_SHIFT               (16U)
-#define FLEXSPI_MCR1_SEQWAIT(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_SEQWAIT_SHIFT)) & FLEXSPI_MCR1_SEQWAIT_MASK)
+#define FLEXSPI_MCR1_AHBBUSWAIT_MASK  (0xFFFFU)
+#define FLEXSPI_MCR1_AHBBUSWAIT_SHIFT (0U)
+#define FLEXSPI_MCR1_AHBBUSWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_AHBBUSWAIT_SHIFT)) & FLEXSPI_MCR1_AHBBUSWAIT_MASK)
+#define FLEXSPI_MCR1_SEQWAIT_MASK  (0xFFFF0000U)
+#define FLEXSPI_MCR1_SEQWAIT_SHIFT (16U)
+#define FLEXSPI_MCR1_SEQWAIT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR1_SEQWAIT_SHIFT)) & FLEXSPI_MCR1_SEQWAIT_MASK)
 /*! @} */
 
 /*! @name MCR2 - Module Control Register 2 */
 /*! @{ */
-#define FLEXSPI_MCR2_CLRAHBBUFOPT_MASK           (0x800U)
-#define FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT          (11U)
-#define FLEXSPI_MCR2_CLRAHBBUFOPT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT)) & FLEXSPI_MCR2_CLRAHBBUFOPT_MASK)
-#define FLEXSPI_MCR2_CLRLEARNPHASE_MASK          (0x4000U)
-#define FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT         (14U)
-#define FLEXSPI_MCR2_CLRLEARNPHASE(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT)) & FLEXSPI_MCR2_CLRLEARNPHASE_MASK)
-#define FLEXSPI_MCR2_SAMEDEVICEEN_MASK           (0x8000U)
-#define FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT          (15U)
-#define FLEXSPI_MCR2_SAMEDEVICEEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT)) & FLEXSPI_MCR2_SAMEDEVICEEN_MASK)
-#define FLEXSPI_MCR2_SCKBDIFFOPT_MASK            (0x80000U)
-#define FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT           (19U)
-#define FLEXSPI_MCR2_SCKBDIFFOPT(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT)) & FLEXSPI_MCR2_SCKBDIFFOPT_MASK)
-#define FLEXSPI_MCR2_RESUMEWAIT_MASK             (0xFF000000U)
-#define FLEXSPI_MCR2_RESUMEWAIT_SHIFT            (24U)
-#define FLEXSPI_MCR2_RESUMEWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_RESUMEWAIT_SHIFT)) & FLEXSPI_MCR2_RESUMEWAIT_MASK)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT_MASK  (0x800U)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT (11U)
+#define FLEXSPI_MCR2_CLRAHBBUFOPT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRAHBBUFOPT_SHIFT)) & FLEXSPI_MCR2_CLRAHBBUFOPT_MASK)
+#define FLEXSPI_MCR2_CLRLEARNPHASE_MASK  (0x4000U)
+#define FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT (14U)
+#define FLEXSPI_MCR2_CLRLEARNPHASE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_CLRLEARNPHASE_SHIFT)) & FLEXSPI_MCR2_CLRLEARNPHASE_MASK)
+#define FLEXSPI_MCR2_SAMEDEVICEEN_MASK  (0x8000U)
+#define FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT (15U)
+#define FLEXSPI_MCR2_SAMEDEVICEEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SAMEDEVICEEN_SHIFT)) & FLEXSPI_MCR2_SAMEDEVICEEN_MASK)
+#define FLEXSPI_MCR2_SCKBDIFFOPT_MASK  (0x80000U)
+#define FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT (19U)
+#define FLEXSPI_MCR2_SCKBDIFFOPT(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_SCKBDIFFOPT_SHIFT)) & FLEXSPI_MCR2_SCKBDIFFOPT_MASK)
+#define FLEXSPI_MCR2_RESUMEWAIT_MASK  (0xFF000000U)
+#define FLEXSPI_MCR2_RESUMEWAIT_SHIFT (24U)
+#define FLEXSPI_MCR2_RESUMEWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_MCR2_RESUMEWAIT_SHIFT)) & FLEXSPI_MCR2_RESUMEWAIT_MASK)
 /*! @} */
 
 /*! @name AHBCR - AHB Bus Control Register */
 /*! @{ */
-#define FLEXSPI_AHBCR_APAREN_MASK                (0x1U)
-#define FLEXSPI_AHBCR_APAREN_SHIFT               (0U)
-#define FLEXSPI_AHBCR_APAREN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_APAREN_SHIFT)) & FLEXSPI_AHBCR_APAREN_MASK)
-#define FLEXSPI_AHBCR_CACHABLEEN_MASK            (0x8U)
-#define FLEXSPI_AHBCR_CACHABLEEN_SHIFT           (3U)
-#define FLEXSPI_AHBCR_CACHABLEEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_CACHABLEEN_SHIFT)) & FLEXSPI_AHBCR_CACHABLEEN_MASK)
-#define FLEXSPI_AHBCR_BUFFERABLEEN_MASK          (0x10U)
-#define FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT         (4U)
-#define FLEXSPI_AHBCR_BUFFERABLEEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT)) & FLEXSPI_AHBCR_BUFFERABLEEN_MASK)
-#define FLEXSPI_AHBCR_PREFETCHEN_MASK            (0x20U)
-#define FLEXSPI_AHBCR_PREFETCHEN_SHIFT           (5U)
-#define FLEXSPI_AHBCR_PREFETCHEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_PREFETCHEN_SHIFT)) & FLEXSPI_AHBCR_PREFETCHEN_MASK)
-#define FLEXSPI_AHBCR_READADDROPT_MASK           (0x40U)
-#define FLEXSPI_AHBCR_READADDROPT_SHIFT          (6U)
-#define FLEXSPI_AHBCR_READADDROPT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_READADDROPT_SHIFT)) & FLEXSPI_AHBCR_READADDROPT_MASK)
+#define FLEXSPI_AHBCR_APAREN_MASK  (0x1U)
+#define FLEXSPI_AHBCR_APAREN_SHIFT (0U)
+#define FLEXSPI_AHBCR_APAREN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_APAREN_SHIFT)) & FLEXSPI_AHBCR_APAREN_MASK)
+#define FLEXSPI_AHBCR_CACHABLEEN_MASK  (0x8U)
+#define FLEXSPI_AHBCR_CACHABLEEN_SHIFT (3U)
+#define FLEXSPI_AHBCR_CACHABLEEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_CACHABLEEN_SHIFT)) & FLEXSPI_AHBCR_CACHABLEEN_MASK)
+#define FLEXSPI_AHBCR_BUFFERABLEEN_MASK  (0x10U)
+#define FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT (4U)
+#define FLEXSPI_AHBCR_BUFFERABLEEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_BUFFERABLEEN_SHIFT)) & FLEXSPI_AHBCR_BUFFERABLEEN_MASK)
+#define FLEXSPI_AHBCR_PREFETCHEN_MASK  (0x20U)
+#define FLEXSPI_AHBCR_PREFETCHEN_SHIFT (5U)
+#define FLEXSPI_AHBCR_PREFETCHEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_PREFETCHEN_SHIFT)) & FLEXSPI_AHBCR_PREFETCHEN_MASK)
+#define FLEXSPI_AHBCR_READADDROPT_MASK  (0x40U)
+#define FLEXSPI_AHBCR_READADDROPT_SHIFT (6U)
+#define FLEXSPI_AHBCR_READADDROPT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBCR_READADDROPT_SHIFT)) & FLEXSPI_AHBCR_READADDROPT_MASK)
 /*! @} */
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define FLEXSPI_INTEN_IPCMDDONEEN_MASK           (0x1U)
-#define FLEXSPI_INTEN_IPCMDDONEEN_SHIFT          (0U)
-#define FLEXSPI_INTEN_IPCMDDONEEN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDDONEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDDONEEN_MASK)
-#define FLEXSPI_INTEN_IPCMDGEEN_MASK             (0x2U)
-#define FLEXSPI_INTEN_IPCMDGEEN_SHIFT            (1U)
-#define FLEXSPI_INTEN_IPCMDGEEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDGEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDGEEN_MASK)
-#define FLEXSPI_INTEN_AHBCMDGEEN_MASK            (0x4U)
-#define FLEXSPI_INTEN_AHBCMDGEEN_SHIFT           (2U)
-#define FLEXSPI_INTEN_AHBCMDGEEN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDGEEN_SHIFT)) & FLEXSPI_INTEN_AHBCMDGEEN_MASK)
-#define FLEXSPI_INTEN_IPCMDERREN_MASK            (0x8U)
-#define FLEXSPI_INTEN_IPCMDERREN_SHIFT           (3U)
-#define FLEXSPI_INTEN_IPCMDERREN(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDERREN_SHIFT)) & FLEXSPI_INTEN_IPCMDERREN_MASK)
-#define FLEXSPI_INTEN_AHBCMDERREN_MASK           (0x10U)
-#define FLEXSPI_INTEN_AHBCMDERREN_SHIFT          (4U)
-#define FLEXSPI_INTEN_AHBCMDERREN(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDERREN_SHIFT)) & FLEXSPI_INTEN_AHBCMDERREN_MASK)
-#define FLEXSPI_INTEN_IPRXWAEN_MASK              (0x20U)
-#define FLEXSPI_INTEN_IPRXWAEN_SHIFT             (5U)
-#define FLEXSPI_INTEN_IPRXWAEN(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPRXWAEN_SHIFT)) & FLEXSPI_INTEN_IPRXWAEN_MASK)
-#define FLEXSPI_INTEN_IPTXWEEN_MASK              (0x40U)
-#define FLEXSPI_INTEN_IPTXWEEN_SHIFT             (6U)
-#define FLEXSPI_INTEN_IPTXWEEN(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPTXWEEN_SHIFT)) & FLEXSPI_INTEN_IPTXWEEN_MASK)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK         (0x100U)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT        (8U)
-#define FLEXSPI_INTEN_SCKSTOPBYRDEN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN_MASK         (0x200U)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT        (9U)
-#define FLEXSPI_INTEN_SCKSTOPBYWREN(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYWREN_MASK)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK       (0x400U)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT      (10U)
-#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN_MASK          (0x800U)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT         (11U)
-#define FLEXSPI_INTEN_SEQTIMEOUTEN(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_SEQTIMEOUTEN_MASK)
+#define FLEXSPI_INTEN_IPCMDDONEEN_MASK  (0x1U)
+#define FLEXSPI_INTEN_IPCMDDONEEN_SHIFT (0U)
+#define FLEXSPI_INTEN_IPCMDDONEEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDDONEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDDONEEN_MASK)
+#define FLEXSPI_INTEN_IPCMDGEEN_MASK  (0x2U)
+#define FLEXSPI_INTEN_IPCMDGEEN_SHIFT (1U)
+#define FLEXSPI_INTEN_IPCMDGEEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDGEEN_SHIFT)) & FLEXSPI_INTEN_IPCMDGEEN_MASK)
+#define FLEXSPI_INTEN_AHBCMDGEEN_MASK  (0x4U)
+#define FLEXSPI_INTEN_AHBCMDGEEN_SHIFT (2U)
+#define FLEXSPI_INTEN_AHBCMDGEEN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDGEEN_SHIFT)) & FLEXSPI_INTEN_AHBCMDGEEN_MASK)
+#define FLEXSPI_INTEN_IPCMDERREN_MASK  (0x8U)
+#define FLEXSPI_INTEN_IPCMDERREN_SHIFT (3U)
+#define FLEXSPI_INTEN_IPCMDERREN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPCMDERREN_SHIFT)) & FLEXSPI_INTEN_IPCMDERREN_MASK)
+#define FLEXSPI_INTEN_AHBCMDERREN_MASK  (0x10U)
+#define FLEXSPI_INTEN_AHBCMDERREN_SHIFT (4U)
+#define FLEXSPI_INTEN_AHBCMDERREN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBCMDERREN_SHIFT)) & FLEXSPI_INTEN_AHBCMDERREN_MASK)
+#define FLEXSPI_INTEN_IPRXWAEN_MASK  (0x20U)
+#define FLEXSPI_INTEN_IPRXWAEN_SHIFT (5U)
+#define FLEXSPI_INTEN_IPRXWAEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPRXWAEN_SHIFT)) & FLEXSPI_INTEN_IPRXWAEN_MASK)
+#define FLEXSPI_INTEN_IPTXWEEN_MASK  (0x40U)
+#define FLEXSPI_INTEN_IPTXWEEN_SHIFT (6U)
+#define FLEXSPI_INTEN_IPTXWEEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_IPTXWEEN_SHIFT)) & FLEXSPI_INTEN_IPTXWEEN_MASK)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK  (0x100U)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT (8U)
+#define FLEXSPI_INTEN_SCKSTOPBYRDEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYRDEN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYRDEN_MASK)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN_MASK  (0x200U)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT (9U)
+#define FLEXSPI_INTEN_SCKSTOPBYWREN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SCKSTOPBYWREN_SHIFT)) & FLEXSPI_INTEN_SCKSTOPBYWREN_MASK)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK  (0x400U)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT (10U)
+#define FLEXSPI_INTEN_AHBBUSTIMEOUTEN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_AHBBUSTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_AHBBUSTIMEOUTEN_MASK)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN_MASK  (0x800U)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT (11U)
+#define FLEXSPI_INTEN_SEQTIMEOUTEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTEN_SEQTIMEOUTEN_SHIFT)) & FLEXSPI_INTEN_SEQTIMEOUTEN_MASK)
 /*! @} */
 
 /*! @name INTR - Interrupt Register */
 /*! @{ */
-#define FLEXSPI_INTR_IPCMDDONE_MASK              (0x1U)
-#define FLEXSPI_INTR_IPCMDDONE_SHIFT             (0U)
-#define FLEXSPI_INTR_IPCMDDONE(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDDONE_SHIFT)) & FLEXSPI_INTR_IPCMDDONE_MASK)
-#define FLEXSPI_INTR_IPCMDGE_MASK                (0x2U)
-#define FLEXSPI_INTR_IPCMDGE_SHIFT               (1U)
-#define FLEXSPI_INTR_IPCMDGE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDGE_SHIFT)) & FLEXSPI_INTR_IPCMDGE_MASK)
-#define FLEXSPI_INTR_AHBCMDGE_MASK               (0x4U)
-#define FLEXSPI_INTR_AHBCMDGE_SHIFT              (2U)
-#define FLEXSPI_INTR_AHBCMDGE(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDGE_SHIFT)) & FLEXSPI_INTR_AHBCMDGE_MASK)
-#define FLEXSPI_INTR_IPCMDERR_MASK               (0x8U)
-#define FLEXSPI_INTR_IPCMDERR_SHIFT              (3U)
-#define FLEXSPI_INTR_IPCMDERR(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDERR_SHIFT)) & FLEXSPI_INTR_IPCMDERR_MASK)
-#define FLEXSPI_INTR_AHBCMDERR_MASK              (0x10U)
-#define FLEXSPI_INTR_AHBCMDERR_SHIFT             (4U)
-#define FLEXSPI_INTR_AHBCMDERR(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDERR_SHIFT)) & FLEXSPI_INTR_AHBCMDERR_MASK)
-#define FLEXSPI_INTR_IPRXWA_MASK                 (0x20U)
-#define FLEXSPI_INTR_IPRXWA_SHIFT                (5U)
-#define FLEXSPI_INTR_IPRXWA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPRXWA_SHIFT)) & FLEXSPI_INTR_IPRXWA_MASK)
-#define FLEXSPI_INTR_IPTXWE_MASK                 (0x40U)
-#define FLEXSPI_INTR_IPTXWE_SHIFT                (6U)
-#define FLEXSPI_INTR_IPTXWE(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPTXWE_SHIFT)) & FLEXSPI_INTR_IPTXWE_MASK)
-#define FLEXSPI_INTR_SCKSTOPBYRD_MASK            (0x100U)
-#define FLEXSPI_INTR_SCKSTOPBYRD_SHIFT           (8U)
-#define FLEXSPI_INTR_SCKSTOPBYRD(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYRD_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYRD_MASK)
-#define FLEXSPI_INTR_SCKSTOPBYWR_MASK            (0x200U)
-#define FLEXSPI_INTR_SCKSTOPBYWR_SHIFT           (9U)
-#define FLEXSPI_INTR_SCKSTOPBYWR(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYWR_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYWR_MASK)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT_MASK          (0x400U)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT         (10U)
-#define FLEXSPI_INTR_AHBBUSTIMEOUT(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT)) & FLEXSPI_INTR_AHBBUSTIMEOUT_MASK)
-#define FLEXSPI_INTR_SEQTIMEOUT_MASK             (0x800U)
-#define FLEXSPI_INTR_SEQTIMEOUT_SHIFT            (11U)
-#define FLEXSPI_INTR_SEQTIMEOUT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SEQTIMEOUT_SHIFT)) & FLEXSPI_INTR_SEQTIMEOUT_MASK)
+#define FLEXSPI_INTR_IPCMDDONE_MASK  (0x1U)
+#define FLEXSPI_INTR_IPCMDDONE_SHIFT (0U)
+#define FLEXSPI_INTR_IPCMDDONE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDDONE_SHIFT)) & FLEXSPI_INTR_IPCMDDONE_MASK)
+#define FLEXSPI_INTR_IPCMDGE_MASK  (0x2U)
+#define FLEXSPI_INTR_IPCMDGE_SHIFT (1U)
+#define FLEXSPI_INTR_IPCMDGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDGE_SHIFT)) & FLEXSPI_INTR_IPCMDGE_MASK)
+#define FLEXSPI_INTR_AHBCMDGE_MASK  (0x4U)
+#define FLEXSPI_INTR_AHBCMDGE_SHIFT (2U)
+#define FLEXSPI_INTR_AHBCMDGE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDGE_SHIFT)) & FLEXSPI_INTR_AHBCMDGE_MASK)
+#define FLEXSPI_INTR_IPCMDERR_MASK  (0x8U)
+#define FLEXSPI_INTR_IPCMDERR_SHIFT (3U)
+#define FLEXSPI_INTR_IPCMDERR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPCMDERR_SHIFT)) & FLEXSPI_INTR_IPCMDERR_MASK)
+#define FLEXSPI_INTR_AHBCMDERR_MASK  (0x10U)
+#define FLEXSPI_INTR_AHBCMDERR_SHIFT (4U)
+#define FLEXSPI_INTR_AHBCMDERR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBCMDERR_SHIFT)) & FLEXSPI_INTR_AHBCMDERR_MASK)
+#define FLEXSPI_INTR_IPRXWA_MASK       (0x20U)
+#define FLEXSPI_INTR_IPRXWA_SHIFT      (5U)
+#define FLEXSPI_INTR_IPRXWA(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPRXWA_SHIFT)) & FLEXSPI_INTR_IPRXWA_MASK)
+#define FLEXSPI_INTR_IPTXWE_MASK       (0x40U)
+#define FLEXSPI_INTR_IPTXWE_SHIFT      (6U)
+#define FLEXSPI_INTR_IPTXWE(x)         (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_IPTXWE_SHIFT)) & FLEXSPI_INTR_IPTXWE_MASK)
+#define FLEXSPI_INTR_SCKSTOPBYRD_MASK  (0x100U)
+#define FLEXSPI_INTR_SCKSTOPBYRD_SHIFT (8U)
+#define FLEXSPI_INTR_SCKSTOPBYRD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYRD_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYRD_MASK)
+#define FLEXSPI_INTR_SCKSTOPBYWR_MASK  (0x200U)
+#define FLEXSPI_INTR_SCKSTOPBYWR_SHIFT (9U)
+#define FLEXSPI_INTR_SCKSTOPBYWR(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SCKSTOPBYWR_SHIFT)) & FLEXSPI_INTR_SCKSTOPBYWR_MASK)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT_MASK  (0x400U)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT (10U)
+#define FLEXSPI_INTR_AHBBUSTIMEOUT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_AHBBUSTIMEOUT_SHIFT)) & FLEXSPI_INTR_AHBBUSTIMEOUT_MASK)
+#define FLEXSPI_INTR_SEQTIMEOUT_MASK  (0x800U)
+#define FLEXSPI_INTR_SEQTIMEOUT_SHIFT (11U)
+#define FLEXSPI_INTR_SEQTIMEOUT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_INTR_SEQTIMEOUT_SHIFT)) & FLEXSPI_INTR_SEQTIMEOUT_MASK)
 /*! @} */
 
 /*! @name LUTKEY - LUT Key Register */
 /*! @{ */
-#define FLEXSPI_LUTKEY_KEY_MASK                  (0xFFFFFFFFU)
-#define FLEXSPI_LUTKEY_KEY_SHIFT                 (0U)
-#define FLEXSPI_LUTKEY_KEY(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTKEY_KEY_SHIFT)) & FLEXSPI_LUTKEY_KEY_MASK)
+#define FLEXSPI_LUTKEY_KEY_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_LUTKEY_KEY_SHIFT (0U)
+#define FLEXSPI_LUTKEY_KEY(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTKEY_KEY_SHIFT)) & FLEXSPI_LUTKEY_KEY_MASK)
 /*! @} */
 
 /*! @name LUTCR - LUT Control Register */
 /*! @{ */
-#define FLEXSPI_LUTCR_LOCK_MASK                  (0x1U)
-#define FLEXSPI_LUTCR_LOCK_SHIFT                 (0U)
-#define FLEXSPI_LUTCR_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_LOCK_SHIFT)) & FLEXSPI_LUTCR_LOCK_MASK)
-#define FLEXSPI_LUTCR_UNLOCK_MASK                (0x2U)
-#define FLEXSPI_LUTCR_UNLOCK_SHIFT               (1U)
-#define FLEXSPI_LUTCR_UNLOCK(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_UNLOCK_SHIFT)) & FLEXSPI_LUTCR_UNLOCK_MASK)
+#define FLEXSPI_LUTCR_LOCK_MASK    (0x1U)
+#define FLEXSPI_LUTCR_LOCK_SHIFT   (0U)
+#define FLEXSPI_LUTCR_LOCK(x)      (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_LOCK_SHIFT)) & FLEXSPI_LUTCR_LOCK_MASK)
+#define FLEXSPI_LUTCR_UNLOCK_MASK  (0x2U)
+#define FLEXSPI_LUTCR_UNLOCK_SHIFT (1U)
+#define FLEXSPI_LUTCR_UNLOCK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUTCR_UNLOCK_SHIFT)) & FLEXSPI_LUTCR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name AHBRXBUFCR0 - AHB RX Buffer 0 Control Register 0..AHB RX Buffer 3 Control Register 0 */
 /*! @{ */
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK           (0xFFU)
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT          (0U)
-#define FLEXSPI_AHBRXBUFCR0_BUFSZ(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT)) & FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID_MASK          (0xF0000U)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT         (16U)
-#define FLEXSPI_AHBRXBUFCR0_MSTRID(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT)) & FLEXSPI_AHBRXBUFCR0_MSTRID_MASK)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK        (0x3000000U)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT       (24U)
-#define FLEXSPI_AHBRXBUFCR0_PRIORITY(x)          (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK      (0x80000000U)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT     (31U)
-#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK  (0xFFU)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT (0U)
+#define FLEXSPI_AHBRXBUFCR0_BUFSZ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_BUFSZ_SHIFT)) & FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID_MASK  (0xF0000U)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT (16U)
+#define FLEXSPI_AHBRXBUFCR0_MSTRID(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_MSTRID_SHIFT)) & FLEXSPI_AHBRXBUFCR0_MSTRID_MASK)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK  (0x3000000U)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT (24U)
+#define FLEXSPI_AHBRXBUFCR0_PRIORITY(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PRIORITY_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK  (0x80000000U)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT (31U)
+#define FLEXSPI_AHBRXBUFCR0_PREFETCHEN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBRXBUFCR0_PREFETCHEN_SHIFT)) & FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_AHBRXBUFCR0 */
-#define FLEXSPI_AHBRXBUFCR0_COUNT                (4U)
+#define FLEXSPI_AHBRXBUFCR0_COUNT (4U)
 
 /*! @name FLSHCR0 - Flash A1 Control Register 0..Flash B2 Control Register 0 */
 /*! @{ */
-#define FLEXSPI_FLSHCR0_FLSHSZ_MASK              (0x7FFFFFU)
-#define FLEXSPI_FLSHCR0_FLSHSZ_SHIFT             (0U)
-#define FLEXSPI_FLSHCR0_FLSHSZ(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR0_FLSHSZ_SHIFT)) & FLEXSPI_FLSHCR0_FLSHSZ_MASK)
+#define FLEXSPI_FLSHCR0_FLSHSZ_MASK  (0x7FFFFFU)
+#define FLEXSPI_FLSHCR0_FLSHSZ_SHIFT (0U)
+#define FLEXSPI_FLSHCR0_FLSHSZ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR0_FLSHSZ_SHIFT)) & FLEXSPI_FLSHCR0_FLSHSZ_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR0 */
-#define FLEXSPI_FLSHCR0_COUNT                    (4U)
+#define FLEXSPI_FLSHCR0_COUNT (4U)
 
 /*! @name FLSHCR1 - Flash A1 Control Register 1..Flash B2 Control Register 1 */
 /*! @{ */
-#define FLEXSPI_FLSHCR1_TCSS_MASK                (0x1FU)
-#define FLEXSPI_FLSHCR1_TCSS_SHIFT               (0U)
-#define FLEXSPI_FLSHCR1_TCSS(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSS_SHIFT)) & FLEXSPI_FLSHCR1_TCSS_MASK)
-#define FLEXSPI_FLSHCR1_TCSH_MASK                (0x3E0U)
-#define FLEXSPI_FLSHCR1_TCSH_SHIFT               (5U)
-#define FLEXSPI_FLSHCR1_TCSH(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSH_SHIFT)) & FLEXSPI_FLSHCR1_TCSH_MASK)
-#define FLEXSPI_FLSHCR1_WA_MASK                  (0x400U)
-#define FLEXSPI_FLSHCR1_WA_SHIFT                 (10U)
-#define FLEXSPI_FLSHCR1_WA(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_WA_SHIFT)) & FLEXSPI_FLSHCR1_WA_MASK)
-#define FLEXSPI_FLSHCR1_CAS_MASK                 (0x7800U)
-#define FLEXSPI_FLSHCR1_CAS_SHIFT                (11U)
-#define FLEXSPI_FLSHCR1_CAS(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CAS_SHIFT)) & FLEXSPI_FLSHCR1_CAS_MASK)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK      (0x8000U)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT     (15U)
-#define FLEXSPI_FLSHCR1_CSINTERVALUNIT(x)        (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK)
-#define FLEXSPI_FLSHCR1_CSINTERVAL_MASK          (0xFFFF0000U)
-#define FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT         (16U)
-#define FLEXSPI_FLSHCR1_CSINTERVAL(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVAL_MASK)
+#define FLEXSPI_FLSHCR1_TCSS_MASK  (0x1FU)
+#define FLEXSPI_FLSHCR1_TCSS_SHIFT (0U)
+#define FLEXSPI_FLSHCR1_TCSS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSS_SHIFT)) & FLEXSPI_FLSHCR1_TCSS_MASK)
+#define FLEXSPI_FLSHCR1_TCSH_MASK  (0x3E0U)
+#define FLEXSPI_FLSHCR1_TCSH_SHIFT (5U)
+#define FLEXSPI_FLSHCR1_TCSH(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_TCSH_SHIFT)) & FLEXSPI_FLSHCR1_TCSH_MASK)
+#define FLEXSPI_FLSHCR1_WA_MASK              (0x400U)
+#define FLEXSPI_FLSHCR1_WA_SHIFT             (10U)
+#define FLEXSPI_FLSHCR1_WA(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_WA_SHIFT)) & FLEXSPI_FLSHCR1_WA_MASK)
+#define FLEXSPI_FLSHCR1_CAS_MASK             (0x7800U)
+#define FLEXSPI_FLSHCR1_CAS_SHIFT            (11U)
+#define FLEXSPI_FLSHCR1_CAS(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CAS_SHIFT)) & FLEXSPI_FLSHCR1_CAS_MASK)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK  (0x8000U)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT (15U)
+#define FLEXSPI_FLSHCR1_CSINTERVALUNIT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVALUNIT_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVALUNIT_MASK)
+#define FLEXSPI_FLSHCR1_CSINTERVAL_MASK  (0xFFFF0000U)
+#define FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT (16U)
+#define FLEXSPI_FLSHCR1_CSINTERVAL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR1_CSINTERVAL_SHIFT)) & FLEXSPI_FLSHCR1_CSINTERVAL_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR1 */
-#define FLEXSPI_FLSHCR1_COUNT                    (4U)
+#define FLEXSPI_FLSHCR1_COUNT (4U)
 
 /*! @name FLSHCR2 - Flash A1 Control Register 2..Flash B2 Control Register 2 */
 /*! @{ */
-#define FLEXSPI_FLSHCR2_ARDSEQID_MASK            (0xFU)
-#define FLEXSPI_FLSHCR2_ARDSEQID_SHIFT           (0U)
-#define FLEXSPI_FLSHCR2_ARDSEQID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQID_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQID_MASK)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM_MASK           (0xE0U)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT          (5U)
-#define FLEXSPI_FLSHCR2_ARDSEQNUM(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQNUM_MASK)
-#define FLEXSPI_FLSHCR2_AWRSEQID_MASK            (0xF00U)
-#define FLEXSPI_FLSHCR2_AWRSEQID_SHIFT           (8U)
-#define FLEXSPI_FLSHCR2_AWRSEQID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQID_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQID_MASK)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM_MASK           (0xE000U)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT          (13U)
-#define FLEXSPI_FLSHCR2_AWRSEQNUM(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQNUM_MASK)
-#define FLEXSPI_FLSHCR2_AWRWAIT_MASK             (0xFFF0000U)
-#define FLEXSPI_FLSHCR2_AWRWAIT_SHIFT            (16U)
-#define FLEXSPI_FLSHCR2_AWRWAIT(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAIT_MASK)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK         (0x70000000U)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT        (28U)
-#define FLEXSPI_FLSHCR2_AWRWAITUNIT(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK         (0x80000000U)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT        (31U)
-#define FLEXSPI_FLSHCR2_CLRINSTRPTR(x)           (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT)) & FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK)
+#define FLEXSPI_FLSHCR2_ARDSEQID_MASK  (0xFU)
+#define FLEXSPI_FLSHCR2_ARDSEQID_SHIFT (0U)
+#define FLEXSPI_FLSHCR2_ARDSEQID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQID_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQID_MASK)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM_MASK  (0xE0U)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT (5U)
+#define FLEXSPI_FLSHCR2_ARDSEQNUM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_ARDSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_ARDSEQNUM_MASK)
+#define FLEXSPI_FLSHCR2_AWRSEQID_MASK  (0xF00U)
+#define FLEXSPI_FLSHCR2_AWRSEQID_SHIFT (8U)
+#define FLEXSPI_FLSHCR2_AWRSEQID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQID_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQID_MASK)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM_MASK  (0xE000U)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT (13U)
+#define FLEXSPI_FLSHCR2_AWRSEQNUM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRSEQNUM_SHIFT)) & FLEXSPI_FLSHCR2_AWRSEQNUM_MASK)
+#define FLEXSPI_FLSHCR2_AWRWAIT_MASK  (0xFFF0000U)
+#define FLEXSPI_FLSHCR2_AWRWAIT_SHIFT (16U)
+#define FLEXSPI_FLSHCR2_AWRWAIT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAIT_MASK)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK  (0x70000000U)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT (28U)
+#define FLEXSPI_FLSHCR2_AWRWAITUNIT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_AWRWAITUNIT_SHIFT)) & FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK  (0x80000000U)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT (31U)
+#define FLEXSPI_FLSHCR2_CLRINSTRPTR(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR2_CLRINSTRPTR_SHIFT)) & FLEXSPI_FLSHCR2_CLRINSTRPTR_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_FLSHCR2 */
-#define FLEXSPI_FLSHCR2_COUNT                    (4U)
+#define FLEXSPI_FLSHCR2_COUNT (4U)
 
 /*! @name FLSHCR4 - Flash Control Register 4 */
 /*! @{ */
-#define FLEXSPI_FLSHCR4_WMOPT1_MASK              (0x1U)
-#define FLEXSPI_FLSHCR4_WMOPT1_SHIFT             (0U)
-#define FLEXSPI_FLSHCR4_WMOPT1(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMOPT1_SHIFT)) & FLEXSPI_FLSHCR4_WMOPT1_MASK)
-#define FLEXSPI_FLSHCR4_WMENA_MASK               (0x4U)
-#define FLEXSPI_FLSHCR4_WMENA_SHIFT              (2U)
-#define FLEXSPI_FLSHCR4_WMENA(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENA_SHIFT)) & FLEXSPI_FLSHCR4_WMENA_MASK)
-#define FLEXSPI_FLSHCR4_WMENB_MASK               (0x8U)
-#define FLEXSPI_FLSHCR4_WMENB_SHIFT              (3U)
-#define FLEXSPI_FLSHCR4_WMENB(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENB_SHIFT)) & FLEXSPI_FLSHCR4_WMENB_MASK)
+#define FLEXSPI_FLSHCR4_WMOPT1_MASK  (0x1U)
+#define FLEXSPI_FLSHCR4_WMOPT1_SHIFT (0U)
+#define FLEXSPI_FLSHCR4_WMOPT1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMOPT1_SHIFT)) & FLEXSPI_FLSHCR4_WMOPT1_MASK)
+#define FLEXSPI_FLSHCR4_WMENA_MASK  (0x4U)
+#define FLEXSPI_FLSHCR4_WMENA_SHIFT (2U)
+#define FLEXSPI_FLSHCR4_WMENA(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENA_SHIFT)) & FLEXSPI_FLSHCR4_WMENA_MASK)
+#define FLEXSPI_FLSHCR4_WMENB_MASK  (0x8U)
+#define FLEXSPI_FLSHCR4_WMENB_SHIFT (3U)
+#define FLEXSPI_FLSHCR4_WMENB(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_WMENB_SHIFT)) & FLEXSPI_FLSHCR4_WMENB_MASK)
 /*! @} */
 
 /*! @name IPCR0 - IP Control Register 0 */
 /*! @{ */
-#define FLEXSPI_IPCR0_SFAR_MASK                  (0xFFFFFFFFU)
-#define FLEXSPI_IPCR0_SFAR_SHIFT                 (0U)
-#define FLEXSPI_IPCR0_SFAR(x)                    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR0_SFAR_SHIFT)) & FLEXSPI_IPCR0_SFAR_MASK)
+#define FLEXSPI_IPCR0_SFAR_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_IPCR0_SFAR_SHIFT (0U)
+#define FLEXSPI_IPCR0_SFAR(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR0_SFAR_SHIFT)) & FLEXSPI_IPCR0_SFAR_MASK)
 /*! @} */
 
 /*! @name IPCR1 - IP Control Register 1 */
 /*! @{ */
-#define FLEXSPI_IPCR1_IDATSZ_MASK                (0xFFFFU)
-#define FLEXSPI_IPCR1_IDATSZ_SHIFT               (0U)
-#define FLEXSPI_IPCR1_IDATSZ(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IDATSZ_SHIFT)) & FLEXSPI_IPCR1_IDATSZ_MASK)
-#define FLEXSPI_IPCR1_ISEQID_MASK                (0xF0000U)
-#define FLEXSPI_IPCR1_ISEQID_SHIFT               (16U)
-#define FLEXSPI_IPCR1_ISEQID(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQID_SHIFT)) & FLEXSPI_IPCR1_ISEQID_MASK)
-#define FLEXSPI_IPCR1_ISEQNUM_MASK               (0x7000000U)
-#define FLEXSPI_IPCR1_ISEQNUM_SHIFT              (24U)
-#define FLEXSPI_IPCR1_ISEQNUM(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQNUM_SHIFT)) & FLEXSPI_IPCR1_ISEQNUM_MASK)
-#define FLEXSPI_IPCR1_IPAREN_MASK                (0x80000000U)
-#define FLEXSPI_IPCR1_IPAREN_SHIFT               (31U)
-#define FLEXSPI_IPCR1_IPAREN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IPAREN_SHIFT)) & FLEXSPI_IPCR1_IPAREN_MASK)
+#define FLEXSPI_IPCR1_IDATSZ_MASK  (0xFFFFU)
+#define FLEXSPI_IPCR1_IDATSZ_SHIFT (0U)
+#define FLEXSPI_IPCR1_IDATSZ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IDATSZ_SHIFT)) & FLEXSPI_IPCR1_IDATSZ_MASK)
+#define FLEXSPI_IPCR1_ISEQID_MASK  (0xF0000U)
+#define FLEXSPI_IPCR1_ISEQID_SHIFT (16U)
+#define FLEXSPI_IPCR1_ISEQID(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQID_SHIFT)) & FLEXSPI_IPCR1_ISEQID_MASK)
+#define FLEXSPI_IPCR1_ISEQNUM_MASK  (0x7000000U)
+#define FLEXSPI_IPCR1_ISEQNUM_SHIFT (24U)
+#define FLEXSPI_IPCR1_ISEQNUM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_ISEQNUM_SHIFT)) & FLEXSPI_IPCR1_ISEQNUM_MASK)
+#define FLEXSPI_IPCR1_IPAREN_MASK  (0x80000000U)
+#define FLEXSPI_IPCR1_IPAREN_SHIFT (31U)
+#define FLEXSPI_IPCR1_IPAREN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCR1_IPAREN_SHIFT)) & FLEXSPI_IPCR1_IPAREN_MASK)
 /*! @} */
 
 /*! @name IPCMD - IP Command Register */
 /*! @{ */
-#define FLEXSPI_IPCMD_TRG_MASK                   (0x1U)
-#define FLEXSPI_IPCMD_TRG_SHIFT                  (0U)
-#define FLEXSPI_IPCMD_TRG(x)                     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCMD_TRG_SHIFT)) & FLEXSPI_IPCMD_TRG_MASK)
+#define FLEXSPI_IPCMD_TRG_MASK  (0x1U)
+#define FLEXSPI_IPCMD_TRG_SHIFT (0U)
+#define FLEXSPI_IPCMD_TRG(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPCMD_TRG_SHIFT)) & FLEXSPI_IPCMD_TRG_MASK)
 /*! @} */
 
 /*! @name IPRXFCR - IP RX FIFO Control Register */
 /*! @{ */
-#define FLEXSPI_IPRXFCR_CLRIPRXF_MASK            (0x1U)
-#define FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT           (0U)
-#define FLEXSPI_IPRXFCR_CLRIPRXF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT)) & FLEXSPI_IPRXFCR_CLRIPRXF_MASK)
-#define FLEXSPI_IPRXFCR_RXDMAEN_MASK             (0x2U)
-#define FLEXSPI_IPRXFCR_RXDMAEN_SHIFT            (1U)
-#define FLEXSPI_IPRXFCR_RXDMAEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXDMAEN_SHIFT)) & FLEXSPI_IPRXFCR_RXDMAEN_MASK)
-#define FLEXSPI_IPRXFCR_RXWMRK_MASK              (0x3CU)
-#define FLEXSPI_IPRXFCR_RXWMRK_SHIFT             (2U)
-#define FLEXSPI_IPRXFCR_RXWMRK(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXWMRK_SHIFT)) & FLEXSPI_IPRXFCR_RXWMRK_MASK)
+#define FLEXSPI_IPRXFCR_CLRIPRXF_MASK  (0x1U)
+#define FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT (0U)
+#define FLEXSPI_IPRXFCR_CLRIPRXF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_CLRIPRXF_SHIFT)) & FLEXSPI_IPRXFCR_CLRIPRXF_MASK)
+#define FLEXSPI_IPRXFCR_RXDMAEN_MASK  (0x2U)
+#define FLEXSPI_IPRXFCR_RXDMAEN_SHIFT (1U)
+#define FLEXSPI_IPRXFCR_RXDMAEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXDMAEN_SHIFT)) & FLEXSPI_IPRXFCR_RXDMAEN_MASK)
+#define FLEXSPI_IPRXFCR_RXWMRK_MASK  (0x3CU)
+#define FLEXSPI_IPRXFCR_RXWMRK_SHIFT (2U)
+#define FLEXSPI_IPRXFCR_RXWMRK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFCR_RXWMRK_SHIFT)) & FLEXSPI_IPRXFCR_RXWMRK_MASK)
 /*! @} */
 
 /*! @name IPTXFCR - IP TX FIFO Control Register */
 /*! @{ */
-#define FLEXSPI_IPTXFCR_CLRIPTXF_MASK            (0x1U)
-#define FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT           (0U)
-#define FLEXSPI_IPTXFCR_CLRIPTXF(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
-#define FLEXSPI_IPTXFCR_TXDMAEN_MASK             (0x2U)
-#define FLEXSPI_IPTXFCR_TXDMAEN_SHIFT            (1U)
-#define FLEXSPI_IPTXFCR_TXDMAEN(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXDMAEN_SHIFT)) & FLEXSPI_IPTXFCR_TXDMAEN_MASK)
-#define FLEXSPI_IPTXFCR_TXWMRK_MASK              (0x3CU)
-#define FLEXSPI_IPTXFCR_TXWMRK_SHIFT             (2U)
-#define FLEXSPI_IPTXFCR_TXWMRK(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXWMRK_SHIFT)) & FLEXSPI_IPTXFCR_TXWMRK_MASK)
+#define FLEXSPI_IPTXFCR_CLRIPTXF_MASK  (0x1U)
+#define FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT (0U)
+#define FLEXSPI_IPTXFCR_CLRIPTXF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
+#define FLEXSPI_IPTXFCR_TXDMAEN_MASK  (0x2U)
+#define FLEXSPI_IPTXFCR_TXDMAEN_SHIFT (1U)
+#define FLEXSPI_IPTXFCR_TXDMAEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXDMAEN_SHIFT)) & FLEXSPI_IPTXFCR_TXDMAEN_MASK)
+#define FLEXSPI_IPTXFCR_TXWMRK_MASK  (0x3CU)
+#define FLEXSPI_IPTXFCR_TXWMRK_SHIFT (2U)
+#define FLEXSPI_IPTXFCR_TXWMRK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_TXWMRK_SHIFT)) & FLEXSPI_IPTXFCR_TXWMRK_MASK)
 /*! @} */
 
 /*! @name DLLCR - DLL Control Register 0 */
 /*! @{ */
-#define FLEXSPI_DLLCR_DLLEN_MASK                 (0x1U)
-#define FLEXSPI_DLLCR_DLLEN_SHIFT                (0U)
-#define FLEXSPI_DLLCR_DLLEN(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLEN_SHIFT)) & FLEXSPI_DLLCR_DLLEN_MASK)
-#define FLEXSPI_DLLCR_DLLRESET_MASK              (0x2U)
-#define FLEXSPI_DLLCR_DLLRESET_SHIFT             (1U)
-#define FLEXSPI_DLLCR_DLLRESET(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLRESET_SHIFT)) & FLEXSPI_DLLCR_DLLRESET_MASK)
-#define FLEXSPI_DLLCR_SLVDLYTARGET_MASK          (0x78U)
-#define FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT         (3U)
-#define FLEXSPI_DLLCR_SLVDLYTARGET(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT)) & FLEXSPI_DLLCR_SLVDLYTARGET_MASK)
-#define FLEXSPI_DLLCR_OVRDEN_MASK                (0x100U)
-#define FLEXSPI_DLLCR_OVRDEN_SHIFT               (8U)
-#define FLEXSPI_DLLCR_OVRDEN(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDEN_SHIFT)) & FLEXSPI_DLLCR_OVRDEN_MASK)
-#define FLEXSPI_DLLCR_OVRDVAL_MASK               (0x7E00U)
-#define FLEXSPI_DLLCR_OVRDVAL_SHIFT              (9U)
-#define FLEXSPI_DLLCR_OVRDVAL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDVAL_SHIFT)) & FLEXSPI_DLLCR_OVRDVAL_MASK)
+#define FLEXSPI_DLLCR_DLLEN_MASK     (0x1U)
+#define FLEXSPI_DLLCR_DLLEN_SHIFT    (0U)
+#define FLEXSPI_DLLCR_DLLEN(x)       (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLEN_SHIFT)) & FLEXSPI_DLLCR_DLLEN_MASK)
+#define FLEXSPI_DLLCR_DLLRESET_MASK  (0x2U)
+#define FLEXSPI_DLLCR_DLLRESET_SHIFT (1U)
+#define FLEXSPI_DLLCR_DLLRESET(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_DLLRESET_SHIFT)) & FLEXSPI_DLLCR_DLLRESET_MASK)
+#define FLEXSPI_DLLCR_SLVDLYTARGET_MASK  (0x78U)
+#define FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT (3U)
+#define FLEXSPI_DLLCR_SLVDLYTARGET(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_SLVDLYTARGET_SHIFT)) & FLEXSPI_DLLCR_SLVDLYTARGET_MASK)
+#define FLEXSPI_DLLCR_OVRDEN_MASK  (0x100U)
+#define FLEXSPI_DLLCR_OVRDEN_SHIFT (8U)
+#define FLEXSPI_DLLCR_OVRDEN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDEN_SHIFT)) & FLEXSPI_DLLCR_OVRDEN_MASK)
+#define FLEXSPI_DLLCR_OVRDVAL_MASK  (0x7E00U)
+#define FLEXSPI_DLLCR_OVRDVAL_SHIFT (9U)
+#define FLEXSPI_DLLCR_OVRDVAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_DLLCR_OVRDVAL_SHIFT)) & FLEXSPI_DLLCR_OVRDVAL_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_DLLCR */
-#define FLEXSPI_DLLCR_COUNT                      (2U)
+#define FLEXSPI_DLLCR_COUNT (2U)
 
 /*! @name STS0 - Status Register 0 */
 /*! @{ */
-#define FLEXSPI_STS0_SEQIDLE_MASK                (0x1U)
-#define FLEXSPI_STS0_SEQIDLE_SHIFT               (0U)
-#define FLEXSPI_STS0_SEQIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_SEQIDLE_SHIFT)) & FLEXSPI_STS0_SEQIDLE_MASK)
-#define FLEXSPI_STS0_ARBIDLE_MASK                (0x2U)
-#define FLEXSPI_STS0_ARBIDLE_SHIFT               (1U)
-#define FLEXSPI_STS0_ARBIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBIDLE_SHIFT)) & FLEXSPI_STS0_ARBIDLE_MASK)
-#define FLEXSPI_STS0_ARBCMDSRC_MASK              (0xCU)
-#define FLEXSPI_STS0_ARBCMDSRC_SHIFT             (2U)
-#define FLEXSPI_STS0_ARBCMDSRC(x)                (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBCMDSRC_SHIFT)) & FLEXSPI_STS0_ARBCMDSRC_MASK)
+#define FLEXSPI_STS0_SEQIDLE_MASK  (0x1U)
+#define FLEXSPI_STS0_SEQIDLE_SHIFT (0U)
+#define FLEXSPI_STS0_SEQIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_SEQIDLE_SHIFT)) & FLEXSPI_STS0_SEQIDLE_MASK)
+#define FLEXSPI_STS0_ARBIDLE_MASK  (0x2U)
+#define FLEXSPI_STS0_ARBIDLE_SHIFT (1U)
+#define FLEXSPI_STS0_ARBIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBIDLE_SHIFT)) & FLEXSPI_STS0_ARBIDLE_MASK)
+#define FLEXSPI_STS0_ARBCMDSRC_MASK  (0xCU)
+#define FLEXSPI_STS0_ARBCMDSRC_SHIFT (2U)
+#define FLEXSPI_STS0_ARBCMDSRC(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS0_ARBCMDSRC_SHIFT)) & FLEXSPI_STS0_ARBCMDSRC_MASK)
 /*! @} */
 
 /*! @name STS1 - Status Register 1 */
 /*! @{ */
-#define FLEXSPI_STS1_AHBCMDERRID_MASK            (0xFU)
-#define FLEXSPI_STS1_AHBCMDERRID_SHIFT           (0U)
-#define FLEXSPI_STS1_AHBCMDERRID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRID_SHIFT)) & FLEXSPI_STS1_AHBCMDERRID_MASK)
-#define FLEXSPI_STS1_AHBCMDERRCODE_MASK          (0xF00U)
-#define FLEXSPI_STS1_AHBCMDERRCODE_SHIFT         (8U)
-#define FLEXSPI_STS1_AHBCMDERRCODE(x)            (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRCODE_SHIFT)) & FLEXSPI_STS1_AHBCMDERRCODE_MASK)
-#define FLEXSPI_STS1_IPCMDERRID_MASK             (0xF0000U)
-#define FLEXSPI_STS1_IPCMDERRID_SHIFT            (16U)
-#define FLEXSPI_STS1_IPCMDERRID(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRID_SHIFT)) & FLEXSPI_STS1_IPCMDERRID_MASK)
-#define FLEXSPI_STS1_IPCMDERRCODE_MASK           (0xF000000U)
-#define FLEXSPI_STS1_IPCMDERRCODE_SHIFT          (24U)
-#define FLEXSPI_STS1_IPCMDERRCODE(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRCODE_SHIFT)) & FLEXSPI_STS1_IPCMDERRCODE_MASK)
+#define FLEXSPI_STS1_AHBCMDERRID_MASK  (0xFU)
+#define FLEXSPI_STS1_AHBCMDERRID_SHIFT (0U)
+#define FLEXSPI_STS1_AHBCMDERRID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRID_SHIFT)) & FLEXSPI_STS1_AHBCMDERRID_MASK)
+#define FLEXSPI_STS1_AHBCMDERRCODE_MASK  (0xF00U)
+#define FLEXSPI_STS1_AHBCMDERRCODE_SHIFT (8U)
+#define FLEXSPI_STS1_AHBCMDERRCODE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_AHBCMDERRCODE_SHIFT)) & FLEXSPI_STS1_AHBCMDERRCODE_MASK)
+#define FLEXSPI_STS1_IPCMDERRID_MASK  (0xF0000U)
+#define FLEXSPI_STS1_IPCMDERRID_SHIFT (16U)
+#define FLEXSPI_STS1_IPCMDERRID(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRID_SHIFT)) & FLEXSPI_STS1_IPCMDERRID_MASK)
+#define FLEXSPI_STS1_IPCMDERRCODE_MASK  (0xF000000U)
+#define FLEXSPI_STS1_IPCMDERRCODE_SHIFT (24U)
+#define FLEXSPI_STS1_IPCMDERRCODE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS1_IPCMDERRCODE_SHIFT)) & FLEXSPI_STS1_IPCMDERRCODE_MASK)
 /*! @} */
 
 /*! @name STS2 - Status Register 2 */
 /*! @{ */
-#define FLEXSPI_STS2_ASLVLOCK_MASK               (0x1U)
-#define FLEXSPI_STS2_ASLVLOCK_SHIFT              (0U)
-#define FLEXSPI_STS2_ASLVLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVLOCK_SHIFT)) & FLEXSPI_STS2_ASLVLOCK_MASK)
-#define FLEXSPI_STS2_AREFLOCK_MASK               (0x2U)
-#define FLEXSPI_STS2_AREFLOCK_SHIFT              (1U)
-#define FLEXSPI_STS2_AREFLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFLOCK_SHIFT)) & FLEXSPI_STS2_AREFLOCK_MASK)
-#define FLEXSPI_STS2_ASLVSEL_MASK                (0xFCU)
-#define FLEXSPI_STS2_ASLVSEL_SHIFT               (2U)
-#define FLEXSPI_STS2_ASLVSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVSEL_SHIFT)) & FLEXSPI_STS2_ASLVSEL_MASK)
-#define FLEXSPI_STS2_AREFSEL_MASK                (0x3F00U)
-#define FLEXSPI_STS2_AREFSEL_SHIFT               (8U)
-#define FLEXSPI_STS2_AREFSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFSEL_SHIFT)) & FLEXSPI_STS2_AREFSEL_MASK)
-#define FLEXSPI_STS2_BSLVLOCK_MASK               (0x10000U)
-#define FLEXSPI_STS2_BSLVLOCK_SHIFT              (16U)
-#define FLEXSPI_STS2_BSLVLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVLOCK_SHIFT)) & FLEXSPI_STS2_BSLVLOCK_MASK)
-#define FLEXSPI_STS2_BREFLOCK_MASK               (0x20000U)
-#define FLEXSPI_STS2_BREFLOCK_SHIFT              (17U)
-#define FLEXSPI_STS2_BREFLOCK(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFLOCK_SHIFT)) & FLEXSPI_STS2_BREFLOCK_MASK)
-#define FLEXSPI_STS2_BSLVSEL_MASK                (0xFC0000U)
-#define FLEXSPI_STS2_BSLVSEL_SHIFT               (18U)
-#define FLEXSPI_STS2_BSLVSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVSEL_SHIFT)) & FLEXSPI_STS2_BSLVSEL_MASK)
-#define FLEXSPI_STS2_BREFSEL_MASK                (0x3F000000U)
-#define FLEXSPI_STS2_BREFSEL_SHIFT               (24U)
-#define FLEXSPI_STS2_BREFSEL(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFSEL_SHIFT)) & FLEXSPI_STS2_BREFSEL_MASK)
+#define FLEXSPI_STS2_ASLVLOCK_MASK  (0x1U)
+#define FLEXSPI_STS2_ASLVLOCK_SHIFT (0U)
+#define FLEXSPI_STS2_ASLVLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVLOCK_SHIFT)) & FLEXSPI_STS2_ASLVLOCK_MASK)
+#define FLEXSPI_STS2_AREFLOCK_MASK  (0x2U)
+#define FLEXSPI_STS2_AREFLOCK_SHIFT (1U)
+#define FLEXSPI_STS2_AREFLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFLOCK_SHIFT)) & FLEXSPI_STS2_AREFLOCK_MASK)
+#define FLEXSPI_STS2_ASLVSEL_MASK  (0xFCU)
+#define FLEXSPI_STS2_ASLVSEL_SHIFT (2U)
+#define FLEXSPI_STS2_ASLVSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_ASLVSEL_SHIFT)) & FLEXSPI_STS2_ASLVSEL_MASK)
+#define FLEXSPI_STS2_AREFSEL_MASK  (0x3F00U)
+#define FLEXSPI_STS2_AREFSEL_SHIFT (8U)
+#define FLEXSPI_STS2_AREFSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_AREFSEL_SHIFT)) & FLEXSPI_STS2_AREFSEL_MASK)
+#define FLEXSPI_STS2_BSLVLOCK_MASK  (0x10000U)
+#define FLEXSPI_STS2_BSLVLOCK_SHIFT (16U)
+#define FLEXSPI_STS2_BSLVLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVLOCK_SHIFT)) & FLEXSPI_STS2_BSLVLOCK_MASK)
+#define FLEXSPI_STS2_BREFLOCK_MASK  (0x20000U)
+#define FLEXSPI_STS2_BREFLOCK_SHIFT (17U)
+#define FLEXSPI_STS2_BREFLOCK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFLOCK_SHIFT)) & FLEXSPI_STS2_BREFLOCK_MASK)
+#define FLEXSPI_STS2_BSLVSEL_MASK  (0xFC0000U)
+#define FLEXSPI_STS2_BSLVSEL_SHIFT (18U)
+#define FLEXSPI_STS2_BSLVSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BSLVSEL_SHIFT)) & FLEXSPI_STS2_BSLVSEL_MASK)
+#define FLEXSPI_STS2_BREFSEL_MASK  (0x3F000000U)
+#define FLEXSPI_STS2_BREFSEL_SHIFT (24U)
+#define FLEXSPI_STS2_BREFSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_STS2_BREFSEL_SHIFT)) & FLEXSPI_STS2_BREFSEL_MASK)
 /*! @} */
 
 /*! @name AHBSPNDSTS - AHB Suspend Status Register */
 /*! @{ */
-#define FLEXSPI_AHBSPNDSTS_ACTIVE_MASK           (0x1U)
-#define FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT          (0U)
-#define FLEXSPI_AHBSPNDSTS_ACTIVE(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT)) & FLEXSPI_AHBSPNDSTS_ACTIVE_MASK)
-#define FLEXSPI_AHBSPNDSTS_BUFID_MASK            (0xEU)
-#define FLEXSPI_AHBSPNDSTS_BUFID_SHIFT           (1U)
-#define FLEXSPI_AHBSPNDSTS_BUFID(x)              (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_BUFID_SHIFT)) & FLEXSPI_AHBSPNDSTS_BUFID_MASK)
-#define FLEXSPI_AHBSPNDSTS_DATLFT_MASK           (0xFFFF0000U)
-#define FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT          (16U)
-#define FLEXSPI_AHBSPNDSTS_DATLFT(x)             (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT)) & FLEXSPI_AHBSPNDSTS_DATLFT_MASK)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE_MASK  (0x1U)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT (0U)
+#define FLEXSPI_AHBSPNDSTS_ACTIVE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_ACTIVE_SHIFT)) & FLEXSPI_AHBSPNDSTS_ACTIVE_MASK)
+#define FLEXSPI_AHBSPNDSTS_BUFID_MASK  (0xEU)
+#define FLEXSPI_AHBSPNDSTS_BUFID_SHIFT (1U)
+#define FLEXSPI_AHBSPNDSTS_BUFID(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_BUFID_SHIFT)) & FLEXSPI_AHBSPNDSTS_BUFID_MASK)
+#define FLEXSPI_AHBSPNDSTS_DATLFT_MASK  (0xFFFF0000U)
+#define FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT (16U)
+#define FLEXSPI_AHBSPNDSTS_DATLFT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_AHBSPNDSTS_DATLFT_SHIFT)) & FLEXSPI_AHBSPNDSTS_DATLFT_MASK)
 /*! @} */
 
 /*! @name IPRXFSTS - IP RX FIFO Status Register */
 /*! @{ */
-#define FLEXSPI_IPRXFSTS_FILL_MASK               (0xFFU)
-#define FLEXSPI_IPRXFSTS_FILL_SHIFT              (0U)
-#define FLEXSPI_IPRXFSTS_FILL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_FILL_SHIFT)) & FLEXSPI_IPRXFSTS_FILL_MASK)
-#define FLEXSPI_IPRXFSTS_RDCNTR_MASK             (0xFFFF0000U)
-#define FLEXSPI_IPRXFSTS_RDCNTR_SHIFT            (16U)
-#define FLEXSPI_IPRXFSTS_RDCNTR(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_RDCNTR_SHIFT)) & FLEXSPI_IPRXFSTS_RDCNTR_MASK)
+#define FLEXSPI_IPRXFSTS_FILL_MASK  (0xFFU)
+#define FLEXSPI_IPRXFSTS_FILL_SHIFT (0U)
+#define FLEXSPI_IPRXFSTS_FILL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_FILL_SHIFT)) & FLEXSPI_IPRXFSTS_FILL_MASK)
+#define FLEXSPI_IPRXFSTS_RDCNTR_MASK  (0xFFFF0000U)
+#define FLEXSPI_IPRXFSTS_RDCNTR_SHIFT (16U)
+#define FLEXSPI_IPRXFSTS_RDCNTR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPRXFSTS_RDCNTR_SHIFT)) & FLEXSPI_IPRXFSTS_RDCNTR_MASK)
 /*! @} */
 
 /*! @name IPTXFSTS - IP TX FIFO Status Register */
 /*! @{ */
-#define FLEXSPI_IPTXFSTS_FILL_MASK               (0xFFU)
-#define FLEXSPI_IPTXFSTS_FILL_SHIFT              (0U)
-#define FLEXSPI_IPTXFSTS_FILL(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_FILL_SHIFT)) & FLEXSPI_IPTXFSTS_FILL_MASK)
-#define FLEXSPI_IPTXFSTS_WRCNTR_MASK             (0xFFFF0000U)
-#define FLEXSPI_IPTXFSTS_WRCNTR_SHIFT            (16U)
-#define FLEXSPI_IPTXFSTS_WRCNTR(x)               (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_WRCNTR_SHIFT)) & FLEXSPI_IPTXFSTS_WRCNTR_MASK)
+#define FLEXSPI_IPTXFSTS_FILL_MASK  (0xFFU)
+#define FLEXSPI_IPTXFSTS_FILL_SHIFT (0U)
+#define FLEXSPI_IPTXFSTS_FILL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_FILL_SHIFT)) & FLEXSPI_IPTXFSTS_FILL_MASK)
+#define FLEXSPI_IPTXFSTS_WRCNTR_MASK  (0xFFFF0000U)
+#define FLEXSPI_IPTXFSTS_WRCNTR_SHIFT (16U)
+#define FLEXSPI_IPTXFSTS_WRCNTR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFSTS_WRCNTR_SHIFT)) & FLEXSPI_IPTXFSTS_WRCNTR_MASK)
 /*! @} */
 
 /*! @name RFDR - IP RX FIFO Data Register 0..IP RX FIFO Data Register 31 */
 /*! @{ */
-#define FLEXSPI_RFDR_RXDATA_MASK                 (0xFFFFFFFFU)
-#define FLEXSPI_RFDR_RXDATA_SHIFT                (0U)
-#define FLEXSPI_RFDR_RXDATA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_RFDR_RXDATA_SHIFT)) & FLEXSPI_RFDR_RXDATA_MASK)
+#define FLEXSPI_RFDR_RXDATA_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_RFDR_RXDATA_SHIFT (0U)
+#define FLEXSPI_RFDR_RXDATA(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_RFDR_RXDATA_SHIFT)) & FLEXSPI_RFDR_RXDATA_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_RFDR */
-#define FLEXSPI_RFDR_COUNT                       (32U)
+#define FLEXSPI_RFDR_COUNT (32U)
 
 /*! @name TFDR - IP TX FIFO Data Register 0..IP TX FIFO Data Register 31 */
 /*! @{ */
-#define FLEXSPI_TFDR_TXDATA_MASK                 (0xFFFFFFFFU)
-#define FLEXSPI_TFDR_TXDATA_SHIFT                (0U)
-#define FLEXSPI_TFDR_TXDATA(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_TFDR_TXDATA_SHIFT)) & FLEXSPI_TFDR_TXDATA_MASK)
+#define FLEXSPI_TFDR_TXDATA_MASK  (0xFFFFFFFFU)
+#define FLEXSPI_TFDR_TXDATA_SHIFT (0U)
+#define FLEXSPI_TFDR_TXDATA(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_TFDR_TXDATA_SHIFT)) & FLEXSPI_TFDR_TXDATA_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_TFDR */
-#define FLEXSPI_TFDR_COUNT                       (32U)
+#define FLEXSPI_TFDR_COUNT (32U)
 
 /*! @name LUT - LUT 0..LUT 63 */
 /*! @{ */
-#define FLEXSPI_LUT_OPERAND0_MASK                (0xFFU)
-#define FLEXSPI_LUT_OPERAND0_SHIFT               (0U)
-#define FLEXSPI_LUT_OPERAND0(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & FLEXSPI_LUT_OPERAND0_MASK)
-#define FLEXSPI_LUT_NUM_PADS0_MASK               (0x300U)
-#define FLEXSPI_LUT_NUM_PADS0_SHIFT              (8U)
-#define FLEXSPI_LUT_NUM_PADS0(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & FLEXSPI_LUT_NUM_PADS0_MASK)
-#define FLEXSPI_LUT_OPCODE0_MASK                 (0xFC00U)
-#define FLEXSPI_LUT_OPCODE0_SHIFT                (10U)
-#define FLEXSPI_LUT_OPCODE0(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & FLEXSPI_LUT_OPCODE0_MASK)
-#define FLEXSPI_LUT_OPERAND1_MASK                (0xFF0000U)
-#define FLEXSPI_LUT_OPERAND1_SHIFT               (16U)
-#define FLEXSPI_LUT_OPERAND1(x)                  (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & FLEXSPI_LUT_OPERAND1_MASK)
-#define FLEXSPI_LUT_NUM_PADS1_MASK               (0x3000000U)
-#define FLEXSPI_LUT_NUM_PADS1_SHIFT              (24U)
-#define FLEXSPI_LUT_NUM_PADS1(x)                 (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & FLEXSPI_LUT_NUM_PADS1_MASK)
-#define FLEXSPI_LUT_OPCODE1_MASK                 (0xFC000000U)
-#define FLEXSPI_LUT_OPCODE1_SHIFT                (26U)
-#define FLEXSPI_LUT_OPCODE1(x)                   (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & FLEXSPI_LUT_OPCODE1_MASK)
+#define FLEXSPI_LUT_OPERAND0_MASK  (0xFFU)
+#define FLEXSPI_LUT_OPERAND0_SHIFT (0U)
+#define FLEXSPI_LUT_OPERAND0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & FLEXSPI_LUT_OPERAND0_MASK)
+#define FLEXSPI_LUT_NUM_PADS0_MASK  (0x300U)
+#define FLEXSPI_LUT_NUM_PADS0_SHIFT (8U)
+#define FLEXSPI_LUT_NUM_PADS0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & FLEXSPI_LUT_NUM_PADS0_MASK)
+#define FLEXSPI_LUT_OPCODE0_MASK   (0xFC00U)
+#define FLEXSPI_LUT_OPCODE0_SHIFT  (10U)
+#define FLEXSPI_LUT_OPCODE0(x)     (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & FLEXSPI_LUT_OPCODE0_MASK)
+#define FLEXSPI_LUT_OPERAND1_MASK  (0xFF0000U)
+#define FLEXSPI_LUT_OPERAND1_SHIFT (16U)
+#define FLEXSPI_LUT_OPERAND1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & FLEXSPI_LUT_OPERAND1_MASK)
+#define FLEXSPI_LUT_NUM_PADS1_MASK  (0x3000000U)
+#define FLEXSPI_LUT_NUM_PADS1_SHIFT (24U)
+#define FLEXSPI_LUT_NUM_PADS1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & FLEXSPI_LUT_NUM_PADS1_MASK)
+#define FLEXSPI_LUT_OPCODE1_MASK  (0xFC000000U)
+#define FLEXSPI_LUT_OPCODE1_SHIFT (26U)
+#define FLEXSPI_LUT_OPCODE1(x)    (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & FLEXSPI_LUT_OPCODE1_MASK)
 /*! @} */
 
 /* The count of FLEXSPI_LUT */
-#define FLEXSPI_LUT_COUNT                        (64U)
-
+#define FLEXSPI_LUT_COUNT (64U)
 
 /*!
  * @}
  */ /* end of group FLEXSPI_Register_Masks */
 
-
 /* FLEXSPI - Peripheral instance base addresses */
 /** Peripheral FLEXSPI base address */
-#define FLEXSPI_BASE                             (0x402A8000u)
+#define FLEXSPI_BASE (0x402A8000u)
 /** Peripheral FLEXSPI base pointer */
-#define FLEXSPI                                  ((FLEXSPI_Type *)FLEXSPI_BASE)
+#define FLEXSPI ((FLEXSPI_Type *)FLEXSPI_BASE)
 /** Array initializer of FLEXSPI peripheral base addresses */
-#define FLEXSPI_BASE_ADDRS                       { FLEXSPI_BASE }
+#define FLEXSPI_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        FLEXSPI_BASE                                                                                                   \
+    }
 /** Array initializer of FLEXSPI peripheral base pointers */
-#define FLEXSPI_BASE_PTRS                        { FLEXSPI }
+#define FLEXSPI_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        FLEXSPI                                                                                                        \
+    }
 /** Interrupt vectors for the FLEXSPI peripheral type */
-#define FLEXSPI_IRQS                             { FLEXSPI_IRQn }
+#define FLEXSPI_IRQS                                                                                                   \
+    {                                                                                                                  \
+        FLEXSPI_IRQn                                                                                                   \
+    }
 /* FlexSPI AMBA address. */
-#define FlexSPI_AMBA_BASE                       (0x60000000U)
+#define FlexSPI_AMBA_BASE (0x60000000U)
 /* FlexSPI ASFM address. */
-#define FlexSPI_ASFM_BASE                        (0x00000000U)
+#define FlexSPI_ASFM_BASE (0x00000000U)
 /* Base Address of AHB address space mapped to IP RX FIFO. */
-#define FlexSPI_ARDF_BASE                        (0x7FC00000U)
+#define FlexSPI_ARDF_BASE (0x7FC00000U)
 /* Base Address of AHB address space mapped to IP TX FIFO. */
-#define FlexSPI_ATDF_BASE                        (0x7F800000U)
-
+#define FlexSPI_ATDF_BASE (0x7F800000U)
 
 /*!
  * @}
  */ /* end of group FLEXSPI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11358,14 +13003,15 @@ typedef struct {
  */
 
 /** GPC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CNTR;                              /**< GPC Interface control register, offset: 0x0 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t IMR[4];                            /**< IRQ masking register 1..IRQ masking register 4, array offset: 0x8, array step: 0x4 */
-  __I  uint32_t ISR[4];                            /**< IRQ status resister 1..IRQ status resister 4, array offset: 0x18, array step: 0x4 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t IMR5;                              /**< IRQ masking register 5, offset: 0x34 */
-  __I  uint32_t ISR5;                              /**< IRQ status resister 5, offset: 0x38 */
+typedef struct
+{
+    __IO uint32_t CNTR; /**< GPC Interface control register, offset: 0x0 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t IMR[4]; /**< IRQ masking register 1..IRQ masking register 4, array offset: 0x8, array step: 0x4 */
+    __I uint32_t ISR[4];  /**< IRQ status resister 1..IRQ status resister 4, array offset: 0x18, array step: 0x4 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t IMR5; /**< IRQ masking register 5, offset: 0x34 */
+    __I uint32_t ISR5;  /**< IRQ status resister 5, offset: 0x38 */
 } GPC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11379,92 +13025,100 @@ typedef struct {
 
 /*! @name CNTR - GPC Interface control register */
 /*! @{ */
-#define GPC_CNTR_MEGA_PDN_REQ_MASK               (0x4U)
-#define GPC_CNTR_MEGA_PDN_REQ_SHIFT              (2U)
-#define GPC_CNTR_MEGA_PDN_REQ(x)                 (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PDN_REQ_SHIFT)) & GPC_CNTR_MEGA_PDN_REQ_MASK)
-#define GPC_CNTR_MEGA_PUP_REQ_MASK               (0x8U)
-#define GPC_CNTR_MEGA_PUP_REQ_SHIFT              (3U)
-#define GPC_CNTR_MEGA_PUP_REQ(x)                 (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PUP_REQ_SHIFT)) & GPC_CNTR_MEGA_PUP_REQ_MASK)
-#define GPC_CNTR_PDRAM0_PGE_MASK                 (0x400000U)
-#define GPC_CNTR_PDRAM0_PGE_SHIFT                (22U)
-#define GPC_CNTR_PDRAM0_PGE(x)                   (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_PDRAM0_PGE_SHIFT)) & GPC_CNTR_PDRAM0_PGE_MASK)
+#define GPC_CNTR_MEGA_PDN_REQ_MASK  (0x4U)
+#define GPC_CNTR_MEGA_PDN_REQ_SHIFT (2U)
+#define GPC_CNTR_MEGA_PDN_REQ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PDN_REQ_SHIFT)) & GPC_CNTR_MEGA_PDN_REQ_MASK)
+#define GPC_CNTR_MEGA_PUP_REQ_MASK  (0x8U)
+#define GPC_CNTR_MEGA_PUP_REQ_SHIFT (3U)
+#define GPC_CNTR_MEGA_PUP_REQ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_MEGA_PUP_REQ_SHIFT)) & GPC_CNTR_MEGA_PUP_REQ_MASK)
+#define GPC_CNTR_PDRAM0_PGE_MASK  (0x400000U)
+#define GPC_CNTR_PDRAM0_PGE_SHIFT (22U)
+#define GPC_CNTR_PDRAM0_PGE(x)    (((uint32_t)(((uint32_t)(x)) << GPC_CNTR_PDRAM0_PGE_SHIFT)) & GPC_CNTR_PDRAM0_PGE_MASK)
 /*! @} */
 
 /*! @name IMR - IRQ masking register 1..IRQ masking register 4 */
 /*! @{ */
-#define GPC_IMR_IMR1_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR1_SHIFT                       (0U)
-#define GPC_IMR_IMR1(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR1_SHIFT)) & GPC_IMR_IMR1_MASK)
-#define GPC_IMR_IMR2_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR2_SHIFT                       (0U)
-#define GPC_IMR_IMR2(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
-#define GPC_IMR_IMR3_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR3_SHIFT                       (0U)
-#define GPC_IMR_IMR3(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
-#define GPC_IMR_IMR4_MASK                        (0xFFFFFFFFU)
-#define GPC_IMR_IMR4_SHIFT                       (0U)
-#define GPC_IMR_IMR4(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR4_SHIFT)) & GPC_IMR_IMR4_MASK)
+#define GPC_IMR_IMR1_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR1_SHIFT (0U)
+#define GPC_IMR_IMR1(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR1_SHIFT)) & GPC_IMR_IMR1_MASK)
+#define GPC_IMR_IMR2_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR2_SHIFT (0U)
+#define GPC_IMR_IMR2(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
+#define GPC_IMR_IMR3_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR3_SHIFT (0U)
+#define GPC_IMR_IMR3(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
+#define GPC_IMR_IMR4_MASK  (0xFFFFFFFFU)
+#define GPC_IMR_IMR4_SHIFT (0U)
+#define GPC_IMR_IMR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR4_SHIFT)) & GPC_IMR_IMR4_MASK)
 /*! @} */
 
 /* The count of GPC_IMR */
-#define GPC_IMR_COUNT                            (4U)
+#define GPC_IMR_COUNT (4U)
 
 /*! @name ISR - IRQ status resister 1..IRQ status resister 4 */
 /*! @{ */
-#define GPC_ISR_ISR1_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR1_SHIFT                       (0U)
-#define GPC_ISR_ISR1(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR1_SHIFT)) & GPC_ISR_ISR1_MASK)
-#define GPC_ISR_ISR2_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR2_SHIFT                       (0U)
-#define GPC_ISR_ISR2(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR2_SHIFT)) & GPC_ISR_ISR2_MASK)
-#define GPC_ISR_ISR3_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR3_SHIFT                       (0U)
-#define GPC_ISR_ISR3(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR3_SHIFT)) & GPC_ISR_ISR3_MASK)
-#define GPC_ISR_ISR4_MASK                        (0xFFFFFFFFU)
-#define GPC_ISR_ISR4_SHIFT                       (0U)
-#define GPC_ISR_ISR4(x)                          (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR4_SHIFT)) & GPC_ISR_ISR4_MASK)
+#define GPC_ISR_ISR1_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR1_SHIFT (0U)
+#define GPC_ISR_ISR1(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR1_SHIFT)) & GPC_ISR_ISR1_MASK)
+#define GPC_ISR_ISR2_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR2_SHIFT (0U)
+#define GPC_ISR_ISR2(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR2_SHIFT)) & GPC_ISR_ISR2_MASK)
+#define GPC_ISR_ISR3_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR3_SHIFT (0U)
+#define GPC_ISR_ISR3(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR3_SHIFT)) & GPC_ISR_ISR3_MASK)
+#define GPC_ISR_ISR4_MASK  (0xFFFFFFFFU)
+#define GPC_ISR_ISR4_SHIFT (0U)
+#define GPC_ISR_ISR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR_ISR4_SHIFT)) & GPC_ISR_ISR4_MASK)
 /*! @} */
 
 /* The count of GPC_ISR */
-#define GPC_ISR_COUNT                            (4U)
+#define GPC_ISR_COUNT (4U)
 
 /*! @name IMR5 - IRQ masking register 5 */
 /*! @{ */
-#define GPC_IMR5_IMR5_MASK                       (0xFFFFFFFFU)
-#define GPC_IMR5_IMR5_SHIFT                      (0U)
-#define GPC_IMR5_IMR5(x)                         (((uint32_t)(((uint32_t)(x)) << GPC_IMR5_IMR5_SHIFT)) & GPC_IMR5_IMR5_MASK)
+#define GPC_IMR5_IMR5_MASK  (0xFFFFFFFFU)
+#define GPC_IMR5_IMR5_SHIFT (0U)
+#define GPC_IMR5_IMR5(x)    (((uint32_t)(((uint32_t)(x)) << GPC_IMR5_IMR5_SHIFT)) & GPC_IMR5_IMR5_MASK)
 /*! @} */
 
 /*! @name ISR5 - IRQ status resister 5 */
 /*! @{ */
-#define GPC_ISR5_ISR4_MASK                       (0xFFFFFFFFU)
-#define GPC_ISR5_ISR4_SHIFT                      (0U)
-#define GPC_ISR5_ISR4(x)                         (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR4_SHIFT)) & GPC_ISR5_ISR4_MASK)
+#define GPC_ISR5_ISR4_MASK  (0xFFFFFFFFU)
+#define GPC_ISR5_ISR4_SHIFT (0U)
+#define GPC_ISR5_ISR4(x)    (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR4_SHIFT)) & GPC_ISR5_ISR4_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPC_Register_Masks */
 
-
 /* GPC - Peripheral instance base addresses */
 /** Peripheral GPC base address */
-#define GPC_BASE                                 (0x400F4000u)
+#define GPC_BASE (0x400F4000u)
 /** Peripheral GPC base pointer */
-#define GPC                                      ((GPC_Type *)GPC_BASE)
+#define GPC ((GPC_Type *)GPC_BASE)
 /** Array initializer of GPC peripheral base addresses */
-#define GPC_BASE_ADDRS                           { GPC_BASE }
+#define GPC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        GPC_BASE                                                                                                       \
+    }
 /** Array initializer of GPC peripheral base pointers */
-#define GPC_BASE_PTRS                            { GPC }
+#define GPC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        GPC                                                                                                            \
+    }
 /** Interrupt vectors for the GPC peripheral type */
-#define GPC_IRQS                                 { GPC_IRQn }
+#define GPC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        GPC_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group GPC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPIO Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11475,19 +13129,20 @@ typedef struct {
  */
 
 /** GPIO - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t DR;                                /**< GPIO data register, offset: 0x0 */
-  __IO uint32_t GDIR;                              /**< GPIO direction register, offset: 0x4 */
-  __I  uint32_t PSR;                               /**< GPIO pad status register, offset: 0x8 */
-  __IO uint32_t ICR1;                              /**< GPIO interrupt configuration register1, offset: 0xC */
-  __IO uint32_t ICR2;                              /**< GPIO interrupt configuration register2, offset: 0x10 */
-  __IO uint32_t IMR;                               /**< GPIO interrupt mask register, offset: 0x14 */
-  __IO uint32_t ISR;                               /**< GPIO interrupt status register, offset: 0x18 */
-  __IO uint32_t EDGE_SEL;                          /**< GPIO edge select register, offset: 0x1C */
-       uint8_t RESERVED_0[100];
-  __O  uint32_t DR_SET;                            /**< GPIO data register SET, offset: 0x84 */
-  __O  uint32_t DR_CLEAR;                          /**< GPIO data register CLEAR, offset: 0x88 */
-  __O  uint32_t DR_TOGGLE;                         /**< GPIO data register TOGGLE, offset: 0x8C */
+typedef struct
+{
+    __IO uint32_t DR;       /**< GPIO data register, offset: 0x0 */
+    __IO uint32_t GDIR;     /**< GPIO direction register, offset: 0x4 */
+    __I uint32_t PSR;       /**< GPIO pad status register, offset: 0x8 */
+    __IO uint32_t ICR1;     /**< GPIO interrupt configuration register1, offset: 0xC */
+    __IO uint32_t ICR2;     /**< GPIO interrupt configuration register2, offset: 0x10 */
+    __IO uint32_t IMR;      /**< GPIO interrupt mask register, offset: 0x14 */
+    __IO uint32_t ISR;      /**< GPIO interrupt status register, offset: 0x18 */
+    __IO uint32_t EDGE_SEL; /**< GPIO edge select register, offset: 0x1C */
+    uint8_t RESERVED_0[100];
+    __O uint32_t DR_SET;    /**< GPIO data register SET, offset: 0x84 */
+    __O uint32_t DR_CLEAR;  /**< GPIO data register CLEAR, offset: 0x88 */
+    __O uint32_t DR_TOGGLE; /**< GPIO data register TOGGLE, offset: 0x8C */
 } GPIO_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11501,211 +13156,227 @@ typedef struct {
 
 /*! @name DR - GPIO data register */
 /*! @{ */
-#define GPIO_DR_DR_MASK                          (0xFFFFFFFFU)
-#define GPIO_DR_DR_SHIFT                         (0U)
-#define GPIO_DR_DR(x)                            (((uint32_t)(((uint32_t)(x)) << GPIO_DR_DR_SHIFT)) & GPIO_DR_DR_MASK)
+#define GPIO_DR_DR_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_DR_SHIFT (0U)
+#define GPIO_DR_DR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_DR_SHIFT)) & GPIO_DR_DR_MASK)
 /*! @} */
 
 /*! @name GDIR - GPIO direction register */
 /*! @{ */
-#define GPIO_GDIR_GDIR_MASK                      (0xFFFFFFFFU)
-#define GPIO_GDIR_GDIR_SHIFT                     (0U)
-#define GPIO_GDIR_GDIR(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_GDIR_GDIR_SHIFT)) & GPIO_GDIR_GDIR_MASK)
+#define GPIO_GDIR_GDIR_MASK  (0xFFFFFFFFU)
+#define GPIO_GDIR_GDIR_SHIFT (0U)
+#define GPIO_GDIR_GDIR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_GDIR_GDIR_SHIFT)) & GPIO_GDIR_GDIR_MASK)
 /*! @} */
 
 /*! @name PSR - GPIO pad status register */
 /*! @{ */
-#define GPIO_PSR_PSR_MASK                        (0xFFFFFFFFU)
-#define GPIO_PSR_PSR_SHIFT                       (0U)
-#define GPIO_PSR_PSR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_PSR_PSR_SHIFT)) & GPIO_PSR_PSR_MASK)
+#define GPIO_PSR_PSR_MASK  (0xFFFFFFFFU)
+#define GPIO_PSR_PSR_SHIFT (0U)
+#define GPIO_PSR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_PSR_PSR_SHIFT)) & GPIO_PSR_PSR_MASK)
 /*! @} */
 
 /*! @name ICR1 - GPIO interrupt configuration register1 */
 /*! @{ */
-#define GPIO_ICR1_ICR0_MASK                      (0x3U)
-#define GPIO_ICR1_ICR0_SHIFT                     (0U)
-#define GPIO_ICR1_ICR0(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR0_SHIFT)) & GPIO_ICR1_ICR0_MASK)
-#define GPIO_ICR1_ICR1_MASK                      (0xCU)
-#define GPIO_ICR1_ICR1_SHIFT                     (2U)
-#define GPIO_ICR1_ICR1(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR1_SHIFT)) & GPIO_ICR1_ICR1_MASK)
-#define GPIO_ICR1_ICR2_MASK                      (0x30U)
-#define GPIO_ICR1_ICR2_SHIFT                     (4U)
-#define GPIO_ICR1_ICR2(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR2_SHIFT)) & GPIO_ICR1_ICR2_MASK)
-#define GPIO_ICR1_ICR3_MASK                      (0xC0U)
-#define GPIO_ICR1_ICR3_SHIFT                     (6U)
-#define GPIO_ICR1_ICR3(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR3_SHIFT)) & GPIO_ICR1_ICR3_MASK)
-#define GPIO_ICR1_ICR4_MASK                      (0x300U)
-#define GPIO_ICR1_ICR4_SHIFT                     (8U)
-#define GPIO_ICR1_ICR4(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR4_SHIFT)) & GPIO_ICR1_ICR4_MASK)
-#define GPIO_ICR1_ICR5_MASK                      (0xC00U)
-#define GPIO_ICR1_ICR5_SHIFT                     (10U)
-#define GPIO_ICR1_ICR5(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR5_SHIFT)) & GPIO_ICR1_ICR5_MASK)
-#define GPIO_ICR1_ICR6_MASK                      (0x3000U)
-#define GPIO_ICR1_ICR6_SHIFT                     (12U)
-#define GPIO_ICR1_ICR6(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR6_SHIFT)) & GPIO_ICR1_ICR6_MASK)
-#define GPIO_ICR1_ICR7_MASK                      (0xC000U)
-#define GPIO_ICR1_ICR7_SHIFT                     (14U)
-#define GPIO_ICR1_ICR7(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR7_SHIFT)) & GPIO_ICR1_ICR7_MASK)
-#define GPIO_ICR1_ICR8_MASK                      (0x30000U)
-#define GPIO_ICR1_ICR8_SHIFT                     (16U)
-#define GPIO_ICR1_ICR8(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR8_SHIFT)) & GPIO_ICR1_ICR8_MASK)
-#define GPIO_ICR1_ICR9_MASK                      (0xC0000U)
-#define GPIO_ICR1_ICR9_SHIFT                     (18U)
-#define GPIO_ICR1_ICR9(x)                        (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR9_SHIFT)) & GPIO_ICR1_ICR9_MASK)
-#define GPIO_ICR1_ICR10_MASK                     (0x300000U)
-#define GPIO_ICR1_ICR10_SHIFT                    (20U)
-#define GPIO_ICR1_ICR10(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR10_SHIFT)) & GPIO_ICR1_ICR10_MASK)
-#define GPIO_ICR1_ICR11_MASK                     (0xC00000U)
-#define GPIO_ICR1_ICR11_SHIFT                    (22U)
-#define GPIO_ICR1_ICR11(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR11_SHIFT)) & GPIO_ICR1_ICR11_MASK)
-#define GPIO_ICR1_ICR12_MASK                     (0x3000000U)
-#define GPIO_ICR1_ICR12_SHIFT                    (24U)
-#define GPIO_ICR1_ICR12(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR12_SHIFT)) & GPIO_ICR1_ICR12_MASK)
-#define GPIO_ICR1_ICR13_MASK                     (0xC000000U)
-#define GPIO_ICR1_ICR13_SHIFT                    (26U)
-#define GPIO_ICR1_ICR13(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR13_SHIFT)) & GPIO_ICR1_ICR13_MASK)
-#define GPIO_ICR1_ICR14_MASK                     (0x30000000U)
-#define GPIO_ICR1_ICR14_SHIFT                    (28U)
-#define GPIO_ICR1_ICR14(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR14_SHIFT)) & GPIO_ICR1_ICR14_MASK)
-#define GPIO_ICR1_ICR15_MASK                     (0xC0000000U)
-#define GPIO_ICR1_ICR15_SHIFT                    (30U)
-#define GPIO_ICR1_ICR15(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR15_SHIFT)) & GPIO_ICR1_ICR15_MASK)
+#define GPIO_ICR1_ICR0_MASK   (0x3U)
+#define GPIO_ICR1_ICR0_SHIFT  (0U)
+#define GPIO_ICR1_ICR0(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR0_SHIFT)) & GPIO_ICR1_ICR0_MASK)
+#define GPIO_ICR1_ICR1_MASK   (0xCU)
+#define GPIO_ICR1_ICR1_SHIFT  (2U)
+#define GPIO_ICR1_ICR1(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR1_SHIFT)) & GPIO_ICR1_ICR1_MASK)
+#define GPIO_ICR1_ICR2_MASK   (0x30U)
+#define GPIO_ICR1_ICR2_SHIFT  (4U)
+#define GPIO_ICR1_ICR2(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR2_SHIFT)) & GPIO_ICR1_ICR2_MASK)
+#define GPIO_ICR1_ICR3_MASK   (0xC0U)
+#define GPIO_ICR1_ICR3_SHIFT  (6U)
+#define GPIO_ICR1_ICR3(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR3_SHIFT)) & GPIO_ICR1_ICR3_MASK)
+#define GPIO_ICR1_ICR4_MASK   (0x300U)
+#define GPIO_ICR1_ICR4_SHIFT  (8U)
+#define GPIO_ICR1_ICR4(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR4_SHIFT)) & GPIO_ICR1_ICR4_MASK)
+#define GPIO_ICR1_ICR5_MASK   (0xC00U)
+#define GPIO_ICR1_ICR5_SHIFT  (10U)
+#define GPIO_ICR1_ICR5(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR5_SHIFT)) & GPIO_ICR1_ICR5_MASK)
+#define GPIO_ICR1_ICR6_MASK   (0x3000U)
+#define GPIO_ICR1_ICR6_SHIFT  (12U)
+#define GPIO_ICR1_ICR6(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR6_SHIFT)) & GPIO_ICR1_ICR6_MASK)
+#define GPIO_ICR1_ICR7_MASK   (0xC000U)
+#define GPIO_ICR1_ICR7_SHIFT  (14U)
+#define GPIO_ICR1_ICR7(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR7_SHIFT)) & GPIO_ICR1_ICR7_MASK)
+#define GPIO_ICR1_ICR8_MASK   (0x30000U)
+#define GPIO_ICR1_ICR8_SHIFT  (16U)
+#define GPIO_ICR1_ICR8(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR8_SHIFT)) & GPIO_ICR1_ICR8_MASK)
+#define GPIO_ICR1_ICR9_MASK   (0xC0000U)
+#define GPIO_ICR1_ICR9_SHIFT  (18U)
+#define GPIO_ICR1_ICR9(x)     (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR9_SHIFT)) & GPIO_ICR1_ICR9_MASK)
+#define GPIO_ICR1_ICR10_MASK  (0x300000U)
+#define GPIO_ICR1_ICR10_SHIFT (20U)
+#define GPIO_ICR1_ICR10(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR10_SHIFT)) & GPIO_ICR1_ICR10_MASK)
+#define GPIO_ICR1_ICR11_MASK  (0xC00000U)
+#define GPIO_ICR1_ICR11_SHIFT (22U)
+#define GPIO_ICR1_ICR11(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR11_SHIFT)) & GPIO_ICR1_ICR11_MASK)
+#define GPIO_ICR1_ICR12_MASK  (0x3000000U)
+#define GPIO_ICR1_ICR12_SHIFT (24U)
+#define GPIO_ICR1_ICR12(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR12_SHIFT)) & GPIO_ICR1_ICR12_MASK)
+#define GPIO_ICR1_ICR13_MASK  (0xC000000U)
+#define GPIO_ICR1_ICR13_SHIFT (26U)
+#define GPIO_ICR1_ICR13(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR13_SHIFT)) & GPIO_ICR1_ICR13_MASK)
+#define GPIO_ICR1_ICR14_MASK  (0x30000000U)
+#define GPIO_ICR1_ICR14_SHIFT (28U)
+#define GPIO_ICR1_ICR14(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR14_SHIFT)) & GPIO_ICR1_ICR14_MASK)
+#define GPIO_ICR1_ICR15_MASK  (0xC0000000U)
+#define GPIO_ICR1_ICR15_SHIFT (30U)
+#define GPIO_ICR1_ICR15(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR1_ICR15_SHIFT)) & GPIO_ICR1_ICR15_MASK)
 /*! @} */
 
 /*! @name ICR2 - GPIO interrupt configuration register2 */
 /*! @{ */
-#define GPIO_ICR2_ICR16_MASK                     (0x3U)
-#define GPIO_ICR2_ICR16_SHIFT                    (0U)
-#define GPIO_ICR2_ICR16(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR16_SHIFT)) & GPIO_ICR2_ICR16_MASK)
-#define GPIO_ICR2_ICR17_MASK                     (0xCU)
-#define GPIO_ICR2_ICR17_SHIFT                    (2U)
-#define GPIO_ICR2_ICR17(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR17_SHIFT)) & GPIO_ICR2_ICR17_MASK)
-#define GPIO_ICR2_ICR18_MASK                     (0x30U)
-#define GPIO_ICR2_ICR18_SHIFT                    (4U)
-#define GPIO_ICR2_ICR18(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR18_SHIFT)) & GPIO_ICR2_ICR18_MASK)
-#define GPIO_ICR2_ICR19_MASK                     (0xC0U)
-#define GPIO_ICR2_ICR19_SHIFT                    (6U)
-#define GPIO_ICR2_ICR19(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR19_SHIFT)) & GPIO_ICR2_ICR19_MASK)
-#define GPIO_ICR2_ICR20_MASK                     (0x300U)
-#define GPIO_ICR2_ICR20_SHIFT                    (8U)
-#define GPIO_ICR2_ICR20(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR20_SHIFT)) & GPIO_ICR2_ICR20_MASK)
-#define GPIO_ICR2_ICR21_MASK                     (0xC00U)
-#define GPIO_ICR2_ICR21_SHIFT                    (10U)
-#define GPIO_ICR2_ICR21(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR21_SHIFT)) & GPIO_ICR2_ICR21_MASK)
-#define GPIO_ICR2_ICR22_MASK                     (0x3000U)
-#define GPIO_ICR2_ICR22_SHIFT                    (12U)
-#define GPIO_ICR2_ICR22(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR22_SHIFT)) & GPIO_ICR2_ICR22_MASK)
-#define GPIO_ICR2_ICR23_MASK                     (0xC000U)
-#define GPIO_ICR2_ICR23_SHIFT                    (14U)
-#define GPIO_ICR2_ICR23(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR23_SHIFT)) & GPIO_ICR2_ICR23_MASK)
-#define GPIO_ICR2_ICR24_MASK                     (0x30000U)
-#define GPIO_ICR2_ICR24_SHIFT                    (16U)
-#define GPIO_ICR2_ICR24(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR24_SHIFT)) & GPIO_ICR2_ICR24_MASK)
-#define GPIO_ICR2_ICR25_MASK                     (0xC0000U)
-#define GPIO_ICR2_ICR25_SHIFT                    (18U)
-#define GPIO_ICR2_ICR25(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR25_SHIFT)) & GPIO_ICR2_ICR25_MASK)
-#define GPIO_ICR2_ICR26_MASK                     (0x300000U)
-#define GPIO_ICR2_ICR26_SHIFT                    (20U)
-#define GPIO_ICR2_ICR26(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR26_SHIFT)) & GPIO_ICR2_ICR26_MASK)
-#define GPIO_ICR2_ICR27_MASK                     (0xC00000U)
-#define GPIO_ICR2_ICR27_SHIFT                    (22U)
-#define GPIO_ICR2_ICR27(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR27_SHIFT)) & GPIO_ICR2_ICR27_MASK)
-#define GPIO_ICR2_ICR28_MASK                     (0x3000000U)
-#define GPIO_ICR2_ICR28_SHIFT                    (24U)
-#define GPIO_ICR2_ICR28(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR28_SHIFT)) & GPIO_ICR2_ICR28_MASK)
-#define GPIO_ICR2_ICR29_MASK                     (0xC000000U)
-#define GPIO_ICR2_ICR29_SHIFT                    (26U)
-#define GPIO_ICR2_ICR29(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR29_SHIFT)) & GPIO_ICR2_ICR29_MASK)
-#define GPIO_ICR2_ICR30_MASK                     (0x30000000U)
-#define GPIO_ICR2_ICR30_SHIFT                    (28U)
-#define GPIO_ICR2_ICR30(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR30_SHIFT)) & GPIO_ICR2_ICR30_MASK)
-#define GPIO_ICR2_ICR31_MASK                     (0xC0000000U)
-#define GPIO_ICR2_ICR31_SHIFT                    (30U)
-#define GPIO_ICR2_ICR31(x)                       (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR31_SHIFT)) & GPIO_ICR2_ICR31_MASK)
+#define GPIO_ICR2_ICR16_MASK  (0x3U)
+#define GPIO_ICR2_ICR16_SHIFT (0U)
+#define GPIO_ICR2_ICR16(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR16_SHIFT)) & GPIO_ICR2_ICR16_MASK)
+#define GPIO_ICR2_ICR17_MASK  (0xCU)
+#define GPIO_ICR2_ICR17_SHIFT (2U)
+#define GPIO_ICR2_ICR17(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR17_SHIFT)) & GPIO_ICR2_ICR17_MASK)
+#define GPIO_ICR2_ICR18_MASK  (0x30U)
+#define GPIO_ICR2_ICR18_SHIFT (4U)
+#define GPIO_ICR2_ICR18(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR18_SHIFT)) & GPIO_ICR2_ICR18_MASK)
+#define GPIO_ICR2_ICR19_MASK  (0xC0U)
+#define GPIO_ICR2_ICR19_SHIFT (6U)
+#define GPIO_ICR2_ICR19(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR19_SHIFT)) & GPIO_ICR2_ICR19_MASK)
+#define GPIO_ICR2_ICR20_MASK  (0x300U)
+#define GPIO_ICR2_ICR20_SHIFT (8U)
+#define GPIO_ICR2_ICR20(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR20_SHIFT)) & GPIO_ICR2_ICR20_MASK)
+#define GPIO_ICR2_ICR21_MASK  (0xC00U)
+#define GPIO_ICR2_ICR21_SHIFT (10U)
+#define GPIO_ICR2_ICR21(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR21_SHIFT)) & GPIO_ICR2_ICR21_MASK)
+#define GPIO_ICR2_ICR22_MASK  (0x3000U)
+#define GPIO_ICR2_ICR22_SHIFT (12U)
+#define GPIO_ICR2_ICR22(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR22_SHIFT)) & GPIO_ICR2_ICR22_MASK)
+#define GPIO_ICR2_ICR23_MASK  (0xC000U)
+#define GPIO_ICR2_ICR23_SHIFT (14U)
+#define GPIO_ICR2_ICR23(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR23_SHIFT)) & GPIO_ICR2_ICR23_MASK)
+#define GPIO_ICR2_ICR24_MASK  (0x30000U)
+#define GPIO_ICR2_ICR24_SHIFT (16U)
+#define GPIO_ICR2_ICR24(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR24_SHIFT)) & GPIO_ICR2_ICR24_MASK)
+#define GPIO_ICR2_ICR25_MASK  (0xC0000U)
+#define GPIO_ICR2_ICR25_SHIFT (18U)
+#define GPIO_ICR2_ICR25(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR25_SHIFT)) & GPIO_ICR2_ICR25_MASK)
+#define GPIO_ICR2_ICR26_MASK  (0x300000U)
+#define GPIO_ICR2_ICR26_SHIFT (20U)
+#define GPIO_ICR2_ICR26(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR26_SHIFT)) & GPIO_ICR2_ICR26_MASK)
+#define GPIO_ICR2_ICR27_MASK  (0xC00000U)
+#define GPIO_ICR2_ICR27_SHIFT (22U)
+#define GPIO_ICR2_ICR27(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR27_SHIFT)) & GPIO_ICR2_ICR27_MASK)
+#define GPIO_ICR2_ICR28_MASK  (0x3000000U)
+#define GPIO_ICR2_ICR28_SHIFT (24U)
+#define GPIO_ICR2_ICR28(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR28_SHIFT)) & GPIO_ICR2_ICR28_MASK)
+#define GPIO_ICR2_ICR29_MASK  (0xC000000U)
+#define GPIO_ICR2_ICR29_SHIFT (26U)
+#define GPIO_ICR2_ICR29(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR29_SHIFT)) & GPIO_ICR2_ICR29_MASK)
+#define GPIO_ICR2_ICR30_MASK  (0x30000000U)
+#define GPIO_ICR2_ICR30_SHIFT (28U)
+#define GPIO_ICR2_ICR30(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR30_SHIFT)) & GPIO_ICR2_ICR30_MASK)
+#define GPIO_ICR2_ICR31_MASK  (0xC0000000U)
+#define GPIO_ICR2_ICR31_SHIFT (30U)
+#define GPIO_ICR2_ICR31(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ICR2_ICR31_SHIFT)) & GPIO_ICR2_ICR31_MASK)
 /*! @} */
 
 /*! @name IMR - GPIO interrupt mask register */
 /*! @{ */
-#define GPIO_IMR_IMR_MASK                        (0xFFFFFFFFU)
-#define GPIO_IMR_IMR_SHIFT                       (0U)
-#define GPIO_IMR_IMR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_IMR_IMR_SHIFT)) & GPIO_IMR_IMR_MASK)
+#define GPIO_IMR_IMR_MASK  (0xFFFFFFFFU)
+#define GPIO_IMR_IMR_SHIFT (0U)
+#define GPIO_IMR_IMR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_IMR_IMR_SHIFT)) & GPIO_IMR_IMR_MASK)
 /*! @} */
 
 /*! @name ISR - GPIO interrupt status register */
 /*! @{ */
-#define GPIO_ISR_ISR_MASK                        (0xFFFFFFFFU)
-#define GPIO_ISR_ISR_SHIFT                       (0U)
-#define GPIO_ISR_ISR(x)                          (((uint32_t)(((uint32_t)(x)) << GPIO_ISR_ISR_SHIFT)) & GPIO_ISR_ISR_MASK)
+#define GPIO_ISR_ISR_MASK  (0xFFFFFFFFU)
+#define GPIO_ISR_ISR_SHIFT (0U)
+#define GPIO_ISR_ISR(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_ISR_ISR_SHIFT)) & GPIO_ISR_ISR_MASK)
 /*! @} */
 
 /*! @name EDGE_SEL - GPIO edge select register */
 /*! @{ */
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK         (0xFFFFFFFFU)
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT        (0U)
-#define GPIO_EDGE_SEL_GPIO_EDGE_SEL(x)           (((uint32_t)(((uint32_t)(x)) << GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT)) & GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK  (0xFFFFFFFFU)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT (0U)
+#define GPIO_EDGE_SEL_GPIO_EDGE_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_EDGE_SEL_GPIO_EDGE_SEL_SHIFT)) & GPIO_EDGE_SEL_GPIO_EDGE_SEL_MASK)
 /*! @} */
 
 /*! @name DR_SET - GPIO data register SET */
 /*! @{ */
-#define GPIO_DR_SET_DR_SET_MASK                  (0xFFFFFFFFU)
-#define GPIO_DR_SET_DR_SET_SHIFT                 (0U)
-#define GPIO_DR_SET_DR_SET(x)                    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_SET_DR_SET_SHIFT)) & GPIO_DR_SET_DR_SET_MASK)
+#define GPIO_DR_SET_DR_SET_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_SET_DR_SET_SHIFT (0U)
+#define GPIO_DR_SET_DR_SET(x)    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_SET_DR_SET_SHIFT)) & GPIO_DR_SET_DR_SET_MASK)
 /*! @} */
 
 /*! @name DR_CLEAR - GPIO data register CLEAR */
 /*! @{ */
-#define GPIO_DR_CLEAR_DR_CLEAR_MASK              (0xFFFFFFFFU)
-#define GPIO_DR_CLEAR_DR_CLEAR_SHIFT             (0U)
-#define GPIO_DR_CLEAR_DR_CLEAR(x)                (((uint32_t)(((uint32_t)(x)) << GPIO_DR_CLEAR_DR_CLEAR_SHIFT)) & GPIO_DR_CLEAR_DR_CLEAR_MASK)
+#define GPIO_DR_CLEAR_DR_CLEAR_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_CLEAR_DR_CLEAR_SHIFT (0U)
+#define GPIO_DR_CLEAR_DR_CLEAR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_CLEAR_DR_CLEAR_SHIFT)) & GPIO_DR_CLEAR_DR_CLEAR_MASK)
 /*! @} */
 
 /*! @name DR_TOGGLE - GPIO data register TOGGLE */
 /*! @{ */
-#define GPIO_DR_TOGGLE_DR_TOGGLE_MASK            (0xFFFFFFFFU)
-#define GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT           (0U)
-#define GPIO_DR_TOGGLE_DR_TOGGLE(x)              (((uint32_t)(((uint32_t)(x)) << GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT)) & GPIO_DR_TOGGLE_DR_TOGGLE_MASK)
+#define GPIO_DR_TOGGLE_DR_TOGGLE_MASK  (0xFFFFFFFFU)
+#define GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT (0U)
+#define GPIO_DR_TOGGLE_DR_TOGGLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << GPIO_DR_TOGGLE_DR_TOGGLE_SHIFT)) & GPIO_DR_TOGGLE_DR_TOGGLE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPIO_Register_Masks */
 
-
 /* GPIO - Peripheral instance base addresses */
 /** Peripheral GPIO1 base address */
-#define GPIO1_BASE                               (0x401B8000u)
+#define GPIO1_BASE (0x401B8000u)
 /** Peripheral GPIO1 base pointer */
-#define GPIO1                                    ((GPIO_Type *)GPIO1_BASE)
+#define GPIO1 ((GPIO_Type *)GPIO1_BASE)
 /** Peripheral GPIO2 base address */
-#define GPIO2_BASE                               (0x401BC000u)
+#define GPIO2_BASE (0x401BC000u)
 /** Peripheral GPIO2 base pointer */
-#define GPIO2                                    ((GPIO_Type *)GPIO2_BASE)
+#define GPIO2 ((GPIO_Type *)GPIO2_BASE)
 /** Peripheral GPIO3 base address */
-#define GPIO3_BASE                               (0x401C0000u)
+#define GPIO3_BASE (0x401C0000u)
 /** Peripheral GPIO3 base pointer */
-#define GPIO3                                    ((GPIO_Type *)GPIO3_BASE)
+#define GPIO3 ((GPIO_Type *)GPIO3_BASE)
 /** Peripheral GPIO4 base address */
-#define GPIO4_BASE                               (0x401C4000u)
+#define GPIO4_BASE (0x401C4000u)
 /** Peripheral GPIO4 base pointer */
-#define GPIO4                                    ((GPIO_Type *)GPIO4_BASE)
+#define GPIO4 ((GPIO_Type *)GPIO4_BASE)
 /** Peripheral GPIO5 base address */
-#define GPIO5_BASE                               (0x400C0000u)
+#define GPIO5_BASE (0x400C0000u)
 /** Peripheral GPIO5 base pointer */
-#define GPIO5                                    ((GPIO_Type *)GPIO5_BASE)
+#define GPIO5 ((GPIO_Type *)GPIO5_BASE)
 /** Array initializer of GPIO peripheral base addresses */
-#define GPIO_BASE_ADDRS                          { 0u, GPIO1_BASE, GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE }
+#define GPIO_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        0u, GPIO1_BASE, GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE                                                 \
+    }
 /** Array initializer of GPIO peripheral base pointers */
-#define GPIO_BASE_PTRS                           { (GPIO_Type *)0u, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5 }
+#define GPIO_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        (GPIO_Type *)0u, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5                                                             \
+    }
 /** Interrupt vectors for the GPIO peripheral type */
-#define GPIO_IRQS                                { NotAvail_IRQn, GPIO1_INT0_IRQn, GPIO1_INT1_IRQn, GPIO1_INT2_IRQn, GPIO1_INT3_IRQn, GPIO1_INT4_IRQn, GPIO1_INT5_IRQn, GPIO1_INT6_IRQn, GPIO1_INT7_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }
-#define GPIO_COMBINED_IRQS                       { NotAvail_IRQn, GPIO1_Combined_16_31_IRQn, GPIO2_Combined_16_31_IRQn, GPIO2_Combined_0_15_IRQn, GPIO3_Combined_16_31_IRQn, GPIO3_Combined_0_15_IRQn, GPIO4_Combined_16_31_IRQn, GPIO4_Combined_0_15_IRQn, GPIO5_Combined_16_31_IRQn, GPIO5_Combined_0_15_IRQn }
+#define GPIO_IRQS                                                                                                      \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPIO1_INT0_IRQn, GPIO1_INT1_IRQn, GPIO1_INT2_IRQn, GPIO1_INT3_IRQn, GPIO1_INT4_IRQn,            \
+            GPIO1_INT5_IRQn, GPIO1_INT6_IRQn, GPIO1_INT7_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn,            \
+            NotAvail_IRQn                                                                                              \
+    }
+#define GPIO_COMBINED_IRQS                                                                                             \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPIO1_Combined_16_31_IRQn, GPIO2_Combined_16_31_IRQn, GPIO2_Combined_0_15_IRQn,                 \
+            GPIO3_Combined_16_31_IRQn, GPIO3_Combined_0_15_IRQn, GPIO4_Combined_16_31_IRQn, GPIO4_Combined_0_15_IRQn,  \
+            GPIO5_Combined_16_31_IRQn, GPIO5_Combined_0_15_IRQn                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group GPIO_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- GPT Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11716,14 +13387,17 @@ typedef struct {
  */
 
 /** GPT - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CR;                                /**< GPT Control Register, offset: 0x0 */
-  __IO uint32_t PR;                                /**< GPT Prescaler Register, offset: 0x4 */
-  __IO uint32_t SR;                                /**< GPT Status Register, offset: 0x8 */
-  __IO uint32_t IR;                                /**< GPT Interrupt Register, offset: 0xC */
-  __IO uint32_t OCR[3];                            /**< GPT Output Compare Register 1..GPT Output Compare Register 3, array offset: 0x10, array step: 0x4 */
-  __I  uint32_t ICR[2];                            /**< GPT Input Capture Register 1..GPT Input Capture Register 2, array offset: 0x1C, array step: 0x4 */
-  __I  uint32_t CNT;                               /**< GPT Counter Register, offset: 0x24 */
+typedef struct
+{
+    __IO uint32_t CR;     /**< GPT Control Register, offset: 0x0 */
+    __IO uint32_t PR;     /**< GPT Prescaler Register, offset: 0x4 */
+    __IO uint32_t SR;     /**< GPT Status Register, offset: 0x8 */
+    __IO uint32_t IR;     /**< GPT Interrupt Register, offset: 0xC */
+    __IO uint32_t OCR[3]; /**< GPT Output Compare Register 1..GPT Output Compare Register 3, array offset: 0x10, array
+                             step: 0x4 */
+    __I uint32_t
+        ICR[2]; /**< GPT Input Capture Register 1..GPT Input Capture Register 2, array offset: 0x1C, array step: 0x4 */
+    __I uint32_t CNT; /**< GPT Counter Register, offset: 0x24 */
 } GPT_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11737,170 +13411,176 @@ typedef struct {
 
 /*! @name CR - GPT Control Register */
 /*! @{ */
-#define GPT_CR_EN_MASK                           (0x1U)
-#define GPT_CR_EN_SHIFT                          (0U)
-#define GPT_CR_EN(x)                             (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_SHIFT)) & GPT_CR_EN_MASK)
-#define GPT_CR_ENMOD_MASK                        (0x2U)
-#define GPT_CR_ENMOD_SHIFT                       (1U)
-#define GPT_CR_ENMOD(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_CR_ENMOD_SHIFT)) & GPT_CR_ENMOD_MASK)
-#define GPT_CR_DBGEN_MASK                        (0x4U)
-#define GPT_CR_DBGEN_SHIFT                       (2U)
-#define GPT_CR_DBGEN(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_CR_DBGEN_SHIFT)) & GPT_CR_DBGEN_MASK)
-#define GPT_CR_WAITEN_MASK                       (0x8U)
-#define GPT_CR_WAITEN_SHIFT                      (3U)
-#define GPT_CR_WAITEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_WAITEN_SHIFT)) & GPT_CR_WAITEN_MASK)
-#define GPT_CR_DOZEEN_MASK                       (0x10U)
-#define GPT_CR_DOZEEN_SHIFT                      (4U)
-#define GPT_CR_DOZEEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_DOZEEN_SHIFT)) & GPT_CR_DOZEEN_MASK)
-#define GPT_CR_STOPEN_MASK                       (0x20U)
-#define GPT_CR_STOPEN_SHIFT                      (5U)
-#define GPT_CR_STOPEN(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_STOPEN_SHIFT)) & GPT_CR_STOPEN_MASK)
-#define GPT_CR_CLKSRC_MASK                       (0x1C0U)
-#define GPT_CR_CLKSRC_SHIFT                      (6U)
-#define GPT_CR_CLKSRC(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_CLKSRC_SHIFT)) & GPT_CR_CLKSRC_MASK)
-#define GPT_CR_FRR_MASK                          (0x200U)
-#define GPT_CR_FRR_SHIFT                         (9U)
-#define GPT_CR_FRR(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FRR_SHIFT)) & GPT_CR_FRR_MASK)
-#define GPT_CR_EN_24M_MASK                       (0x400U)
-#define GPT_CR_EN_24M_SHIFT                      (10U)
-#define GPT_CR_EN_24M(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_24M_SHIFT)) & GPT_CR_EN_24M_MASK)
-#define GPT_CR_SWR_MASK                          (0x8000U)
-#define GPT_CR_SWR_SHIFT                         (15U)
-#define GPT_CR_SWR(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_SWR_SHIFT)) & GPT_CR_SWR_MASK)
-#define GPT_CR_IM1_MASK                          (0x30000U)
-#define GPT_CR_IM1_SHIFT                         (16U)
-#define GPT_CR_IM1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM1_SHIFT)) & GPT_CR_IM1_MASK)
-#define GPT_CR_IM2_MASK                          (0xC0000U)
-#define GPT_CR_IM2_SHIFT                         (18U)
-#define GPT_CR_IM2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM2_SHIFT)) & GPT_CR_IM2_MASK)
-#define GPT_CR_OM1_MASK                          (0x700000U)
-#define GPT_CR_OM1_SHIFT                         (20U)
-#define GPT_CR_OM1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM1_SHIFT)) & GPT_CR_OM1_MASK)
-#define GPT_CR_OM2_MASK                          (0x3800000U)
-#define GPT_CR_OM2_SHIFT                         (23U)
-#define GPT_CR_OM2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM2_SHIFT)) & GPT_CR_OM2_MASK)
-#define GPT_CR_OM3_MASK                          (0x1C000000U)
-#define GPT_CR_OM3_SHIFT                         (26U)
-#define GPT_CR_OM3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM3_SHIFT)) & GPT_CR_OM3_MASK)
-#define GPT_CR_FO1_MASK                          (0x20000000U)
-#define GPT_CR_FO1_SHIFT                         (29U)
-#define GPT_CR_FO1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO1_SHIFT)) & GPT_CR_FO1_MASK)
-#define GPT_CR_FO2_MASK                          (0x40000000U)
-#define GPT_CR_FO2_SHIFT                         (30U)
-#define GPT_CR_FO2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO2_SHIFT)) & GPT_CR_FO2_MASK)
-#define GPT_CR_FO3_MASK                          (0x80000000U)
-#define GPT_CR_FO3_SHIFT                         (31U)
-#define GPT_CR_FO3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO3_SHIFT)) & GPT_CR_FO3_MASK)
+#define GPT_CR_EN_MASK      (0x1U)
+#define GPT_CR_EN_SHIFT     (0U)
+#define GPT_CR_EN(x)        (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_SHIFT)) & GPT_CR_EN_MASK)
+#define GPT_CR_ENMOD_MASK   (0x2U)
+#define GPT_CR_ENMOD_SHIFT  (1U)
+#define GPT_CR_ENMOD(x)     (((uint32_t)(((uint32_t)(x)) << GPT_CR_ENMOD_SHIFT)) & GPT_CR_ENMOD_MASK)
+#define GPT_CR_DBGEN_MASK   (0x4U)
+#define GPT_CR_DBGEN_SHIFT  (2U)
+#define GPT_CR_DBGEN(x)     (((uint32_t)(((uint32_t)(x)) << GPT_CR_DBGEN_SHIFT)) & GPT_CR_DBGEN_MASK)
+#define GPT_CR_WAITEN_MASK  (0x8U)
+#define GPT_CR_WAITEN_SHIFT (3U)
+#define GPT_CR_WAITEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_WAITEN_SHIFT)) & GPT_CR_WAITEN_MASK)
+#define GPT_CR_DOZEEN_MASK  (0x10U)
+#define GPT_CR_DOZEEN_SHIFT (4U)
+#define GPT_CR_DOZEEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_DOZEEN_SHIFT)) & GPT_CR_DOZEEN_MASK)
+#define GPT_CR_STOPEN_MASK  (0x20U)
+#define GPT_CR_STOPEN_SHIFT (5U)
+#define GPT_CR_STOPEN(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_STOPEN_SHIFT)) & GPT_CR_STOPEN_MASK)
+#define GPT_CR_CLKSRC_MASK  (0x1C0U)
+#define GPT_CR_CLKSRC_SHIFT (6U)
+#define GPT_CR_CLKSRC(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_CLKSRC_SHIFT)) & GPT_CR_CLKSRC_MASK)
+#define GPT_CR_FRR_MASK     (0x200U)
+#define GPT_CR_FRR_SHIFT    (9U)
+#define GPT_CR_FRR(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FRR_SHIFT)) & GPT_CR_FRR_MASK)
+#define GPT_CR_EN_24M_MASK  (0x400U)
+#define GPT_CR_EN_24M_SHIFT (10U)
+#define GPT_CR_EN_24M(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CR_EN_24M_SHIFT)) & GPT_CR_EN_24M_MASK)
+#define GPT_CR_SWR_MASK     (0x8000U)
+#define GPT_CR_SWR_SHIFT    (15U)
+#define GPT_CR_SWR(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_SWR_SHIFT)) & GPT_CR_SWR_MASK)
+#define GPT_CR_IM1_MASK     (0x30000U)
+#define GPT_CR_IM1_SHIFT    (16U)
+#define GPT_CR_IM1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM1_SHIFT)) & GPT_CR_IM1_MASK)
+#define GPT_CR_IM2_MASK     (0xC0000U)
+#define GPT_CR_IM2_SHIFT    (18U)
+#define GPT_CR_IM2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_IM2_SHIFT)) & GPT_CR_IM2_MASK)
+#define GPT_CR_OM1_MASK     (0x700000U)
+#define GPT_CR_OM1_SHIFT    (20U)
+#define GPT_CR_OM1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM1_SHIFT)) & GPT_CR_OM1_MASK)
+#define GPT_CR_OM2_MASK     (0x3800000U)
+#define GPT_CR_OM2_SHIFT    (23U)
+#define GPT_CR_OM2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM2_SHIFT)) & GPT_CR_OM2_MASK)
+#define GPT_CR_OM3_MASK     (0x1C000000U)
+#define GPT_CR_OM3_SHIFT    (26U)
+#define GPT_CR_OM3(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_OM3_SHIFT)) & GPT_CR_OM3_MASK)
+#define GPT_CR_FO1_MASK     (0x20000000U)
+#define GPT_CR_FO1_SHIFT    (29U)
+#define GPT_CR_FO1(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO1_SHIFT)) & GPT_CR_FO1_MASK)
+#define GPT_CR_FO2_MASK     (0x40000000U)
+#define GPT_CR_FO2_SHIFT    (30U)
+#define GPT_CR_FO2(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO2_SHIFT)) & GPT_CR_FO2_MASK)
+#define GPT_CR_FO3_MASK     (0x80000000U)
+#define GPT_CR_FO3_SHIFT    (31U)
+#define GPT_CR_FO3(x)       (((uint32_t)(((uint32_t)(x)) << GPT_CR_FO3_SHIFT)) & GPT_CR_FO3_MASK)
 /*! @} */
 
 /*! @name PR - GPT Prescaler Register */
 /*! @{ */
-#define GPT_PR_PRESCALER_MASK                    (0xFFFU)
-#define GPT_PR_PRESCALER_SHIFT                   (0U)
-#define GPT_PR_PRESCALER(x)                      (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER_SHIFT)) & GPT_PR_PRESCALER_MASK)
-#define GPT_PR_PRESCALER24M_MASK                 (0xF000U)
-#define GPT_PR_PRESCALER24M_SHIFT                (12U)
-#define GPT_PR_PRESCALER24M(x)                   (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER24M_SHIFT)) & GPT_PR_PRESCALER24M_MASK)
+#define GPT_PR_PRESCALER_MASK     (0xFFFU)
+#define GPT_PR_PRESCALER_SHIFT    (0U)
+#define GPT_PR_PRESCALER(x)       (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER_SHIFT)) & GPT_PR_PRESCALER_MASK)
+#define GPT_PR_PRESCALER24M_MASK  (0xF000U)
+#define GPT_PR_PRESCALER24M_SHIFT (12U)
+#define GPT_PR_PRESCALER24M(x)    (((uint32_t)(((uint32_t)(x)) << GPT_PR_PRESCALER24M_SHIFT)) & GPT_PR_PRESCALER24M_MASK)
 /*! @} */
 
 /*! @name SR - GPT Status Register */
 /*! @{ */
-#define GPT_SR_OF1_MASK                          (0x1U)
-#define GPT_SR_OF1_SHIFT                         (0U)
-#define GPT_SR_OF1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF1_SHIFT)) & GPT_SR_OF1_MASK)
-#define GPT_SR_OF2_MASK                          (0x2U)
-#define GPT_SR_OF2_SHIFT                         (1U)
-#define GPT_SR_OF2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF2_SHIFT)) & GPT_SR_OF2_MASK)
-#define GPT_SR_OF3_MASK                          (0x4U)
-#define GPT_SR_OF3_SHIFT                         (2U)
-#define GPT_SR_OF3(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF3_SHIFT)) & GPT_SR_OF3_MASK)
-#define GPT_SR_IF1_MASK                          (0x8U)
-#define GPT_SR_IF1_SHIFT                         (3U)
-#define GPT_SR_IF1(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF1_SHIFT)) & GPT_SR_IF1_MASK)
-#define GPT_SR_IF2_MASK                          (0x10U)
-#define GPT_SR_IF2_SHIFT                         (4U)
-#define GPT_SR_IF2(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF2_SHIFT)) & GPT_SR_IF2_MASK)
-#define GPT_SR_ROV_MASK                          (0x20U)
-#define GPT_SR_ROV_SHIFT                         (5U)
-#define GPT_SR_ROV(x)                            (((uint32_t)(((uint32_t)(x)) << GPT_SR_ROV_SHIFT)) & GPT_SR_ROV_MASK)
+#define GPT_SR_OF1_MASK  (0x1U)
+#define GPT_SR_OF1_SHIFT (0U)
+#define GPT_SR_OF1(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF1_SHIFT)) & GPT_SR_OF1_MASK)
+#define GPT_SR_OF2_MASK  (0x2U)
+#define GPT_SR_OF2_SHIFT (1U)
+#define GPT_SR_OF2(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF2_SHIFT)) & GPT_SR_OF2_MASK)
+#define GPT_SR_OF3_MASK  (0x4U)
+#define GPT_SR_OF3_SHIFT (2U)
+#define GPT_SR_OF3(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_OF3_SHIFT)) & GPT_SR_OF3_MASK)
+#define GPT_SR_IF1_MASK  (0x8U)
+#define GPT_SR_IF1_SHIFT (3U)
+#define GPT_SR_IF1(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF1_SHIFT)) & GPT_SR_IF1_MASK)
+#define GPT_SR_IF2_MASK  (0x10U)
+#define GPT_SR_IF2_SHIFT (4U)
+#define GPT_SR_IF2(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_IF2_SHIFT)) & GPT_SR_IF2_MASK)
+#define GPT_SR_ROV_MASK  (0x20U)
+#define GPT_SR_ROV_SHIFT (5U)
+#define GPT_SR_ROV(x)    (((uint32_t)(((uint32_t)(x)) << GPT_SR_ROV_SHIFT)) & GPT_SR_ROV_MASK)
 /*! @} */
 
 /*! @name IR - GPT Interrupt Register */
 /*! @{ */
-#define GPT_IR_OF1IE_MASK                        (0x1U)
-#define GPT_IR_OF1IE_SHIFT                       (0U)
-#define GPT_IR_OF1IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF1IE_SHIFT)) & GPT_IR_OF1IE_MASK)
-#define GPT_IR_OF2IE_MASK                        (0x2U)
-#define GPT_IR_OF2IE_SHIFT                       (1U)
-#define GPT_IR_OF2IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF2IE_SHIFT)) & GPT_IR_OF2IE_MASK)
-#define GPT_IR_OF3IE_MASK                        (0x4U)
-#define GPT_IR_OF3IE_SHIFT                       (2U)
-#define GPT_IR_OF3IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF3IE_SHIFT)) & GPT_IR_OF3IE_MASK)
-#define GPT_IR_IF1IE_MASK                        (0x8U)
-#define GPT_IR_IF1IE_SHIFT                       (3U)
-#define GPT_IR_IF1IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF1IE_SHIFT)) & GPT_IR_IF1IE_MASK)
-#define GPT_IR_IF2IE_MASK                        (0x10U)
-#define GPT_IR_IF2IE_SHIFT                       (4U)
-#define GPT_IR_IF2IE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF2IE_SHIFT)) & GPT_IR_IF2IE_MASK)
-#define GPT_IR_ROVIE_MASK                        (0x20U)
-#define GPT_IR_ROVIE_SHIFT                       (5U)
-#define GPT_IR_ROVIE(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_IR_ROVIE_SHIFT)) & GPT_IR_ROVIE_MASK)
+#define GPT_IR_OF1IE_MASK  (0x1U)
+#define GPT_IR_OF1IE_SHIFT (0U)
+#define GPT_IR_OF1IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF1IE_SHIFT)) & GPT_IR_OF1IE_MASK)
+#define GPT_IR_OF2IE_MASK  (0x2U)
+#define GPT_IR_OF2IE_SHIFT (1U)
+#define GPT_IR_OF2IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF2IE_SHIFT)) & GPT_IR_OF2IE_MASK)
+#define GPT_IR_OF3IE_MASK  (0x4U)
+#define GPT_IR_OF3IE_SHIFT (2U)
+#define GPT_IR_OF3IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_OF3IE_SHIFT)) & GPT_IR_OF3IE_MASK)
+#define GPT_IR_IF1IE_MASK  (0x8U)
+#define GPT_IR_IF1IE_SHIFT (3U)
+#define GPT_IR_IF1IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF1IE_SHIFT)) & GPT_IR_IF1IE_MASK)
+#define GPT_IR_IF2IE_MASK  (0x10U)
+#define GPT_IR_IF2IE_SHIFT (4U)
+#define GPT_IR_IF2IE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_IF2IE_SHIFT)) & GPT_IR_IF2IE_MASK)
+#define GPT_IR_ROVIE_MASK  (0x20U)
+#define GPT_IR_ROVIE_SHIFT (5U)
+#define GPT_IR_ROVIE(x)    (((uint32_t)(((uint32_t)(x)) << GPT_IR_ROVIE_SHIFT)) & GPT_IR_ROVIE_MASK)
 /*! @} */
 
 /*! @name OCR - GPT Output Compare Register 1..GPT Output Compare Register 3 */
 /*! @{ */
-#define GPT_OCR_COMP_MASK                        (0xFFFFFFFFU)
-#define GPT_OCR_COMP_SHIFT                       (0U)
-#define GPT_OCR_COMP(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_OCR_COMP_SHIFT)) & GPT_OCR_COMP_MASK)
+#define GPT_OCR_COMP_MASK  (0xFFFFFFFFU)
+#define GPT_OCR_COMP_SHIFT (0U)
+#define GPT_OCR_COMP(x)    (((uint32_t)(((uint32_t)(x)) << GPT_OCR_COMP_SHIFT)) & GPT_OCR_COMP_MASK)
 /*! @} */
 
 /* The count of GPT_OCR */
-#define GPT_OCR_COUNT                            (3U)
+#define GPT_OCR_COUNT (3U)
 
 /*! @name ICR - GPT Input Capture Register 1..GPT Input Capture Register 2 */
 /*! @{ */
-#define GPT_ICR_CAPT_MASK                        (0xFFFFFFFFU)
-#define GPT_ICR_CAPT_SHIFT                       (0U)
-#define GPT_ICR_CAPT(x)                          (((uint32_t)(((uint32_t)(x)) << GPT_ICR_CAPT_SHIFT)) & GPT_ICR_CAPT_MASK)
+#define GPT_ICR_CAPT_MASK  (0xFFFFFFFFU)
+#define GPT_ICR_CAPT_SHIFT (0U)
+#define GPT_ICR_CAPT(x)    (((uint32_t)(((uint32_t)(x)) << GPT_ICR_CAPT_SHIFT)) & GPT_ICR_CAPT_MASK)
 /*! @} */
 
 /* The count of GPT_ICR */
-#define GPT_ICR_COUNT                            (2U)
+#define GPT_ICR_COUNT (2U)
 
 /*! @name CNT - GPT Counter Register */
 /*! @{ */
-#define GPT_CNT_COUNT_MASK                       (0xFFFFFFFFU)
-#define GPT_CNT_COUNT_SHIFT                      (0U)
-#define GPT_CNT_COUNT(x)                         (((uint32_t)(((uint32_t)(x)) << GPT_CNT_COUNT_SHIFT)) & GPT_CNT_COUNT_MASK)
+#define GPT_CNT_COUNT_MASK  (0xFFFFFFFFU)
+#define GPT_CNT_COUNT_SHIFT (0U)
+#define GPT_CNT_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << GPT_CNT_COUNT_SHIFT)) & GPT_CNT_COUNT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group GPT_Register_Masks */
 
-
 /* GPT - Peripheral instance base addresses */
 /** Peripheral GPT1 base address */
-#define GPT1_BASE                                (0x401EC000u)
+#define GPT1_BASE (0x401EC000u)
 /** Peripheral GPT1 base pointer */
-#define GPT1                                     ((GPT_Type *)GPT1_BASE)
+#define GPT1 ((GPT_Type *)GPT1_BASE)
 /** Peripheral GPT2 base address */
-#define GPT2_BASE                                (0x401F0000u)
+#define GPT2_BASE (0x401F0000u)
 /** Peripheral GPT2 base pointer */
-#define GPT2                                     ((GPT_Type *)GPT2_BASE)
+#define GPT2 ((GPT_Type *)GPT2_BASE)
 /** Array initializer of GPT peripheral base addresses */
-#define GPT_BASE_ADDRS                           { 0u, GPT1_BASE, GPT2_BASE }
+#define GPT_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, GPT1_BASE, GPT2_BASE                                                                                       \
+    }
 /** Array initializer of GPT peripheral base pointers */
-#define GPT_BASE_PTRS                            { (GPT_Type *)0u, GPT1, GPT2 }
+#define GPT_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (GPT_Type *)0u, GPT1, GPT2                                                                                     \
+    }
 /** Interrupt vectors for the GPT peripheral type */
-#define GPT_IRQS                                 { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
+#define GPT_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group GPT_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- I2S Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -11911,32 +13591,33 @@ typedef struct {
  */
 
 /** I2S - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t TCSR;                              /**< SAI Transmit Control Register, offset: 0x8 */
-  __IO uint32_t TCR1;                              /**< SAI Transmit Configuration 1 Register, offset: 0xC */
-  __IO uint32_t TCR2;                              /**< SAI Transmit Configuration 2 Register, offset: 0x10 */
-  __IO uint32_t TCR3;                              /**< SAI Transmit Configuration 3 Register, offset: 0x14 */
-  __IO uint32_t TCR4;                              /**< SAI Transmit Configuration 4 Register, offset: 0x18 */
-  __IO uint32_t TCR5;                              /**< SAI Transmit Configuration 5 Register, offset: 0x1C */
-  __O  uint32_t TDR[4];                            /**< SAI Transmit Data Register, array offset: 0x20, array step: 0x4 */
-       uint8_t RESERVED_0[16];
-  __I  uint32_t TFR[4];                            /**< SAI Transmit FIFO Register, array offset: 0x40, array step: 0x4 */
-       uint8_t RESERVED_1[16];
-  __IO uint32_t TMR;                               /**< SAI Transmit Mask Register, offset: 0x60 */
-       uint8_t RESERVED_2[36];
-  __IO uint32_t RCSR;                              /**< SAI Receive Control Register, offset: 0x88 */
-  __IO uint32_t RCR1;                              /**< SAI Receive Configuration 1 Register, offset: 0x8C */
-  __IO uint32_t RCR2;                              /**< SAI Receive Configuration 2 Register, offset: 0x90 */
-  __IO uint32_t RCR3;                              /**< SAI Receive Configuration 3 Register, offset: 0x94 */
-  __IO uint32_t RCR4;                              /**< SAI Receive Configuration 4 Register, offset: 0x98 */
-  __IO uint32_t RCR5;                              /**< SAI Receive Configuration 5 Register, offset: 0x9C */
-  __I  uint32_t RDR[4];                            /**< SAI Receive Data Register, array offset: 0xA0, array step: 0x4 */
-       uint8_t RESERVED_3[16];
-  __I  uint32_t RFR[4];                            /**< SAI Receive FIFO Register, array offset: 0xC0, array step: 0x4 */
-       uint8_t RESERVED_4[16];
-  __IO uint32_t RMR;                               /**< SAI Receive Mask Register, offset: 0xE0 */
+typedef struct
+{
+    __I uint32_t VERID;  /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;  /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t TCSR;  /**< SAI Transmit Control Register, offset: 0x8 */
+    __IO uint32_t TCR1;  /**< SAI Transmit Configuration 1 Register, offset: 0xC */
+    __IO uint32_t TCR2;  /**< SAI Transmit Configuration 2 Register, offset: 0x10 */
+    __IO uint32_t TCR3;  /**< SAI Transmit Configuration 3 Register, offset: 0x14 */
+    __IO uint32_t TCR4;  /**< SAI Transmit Configuration 4 Register, offset: 0x18 */
+    __IO uint32_t TCR5;  /**< SAI Transmit Configuration 5 Register, offset: 0x1C */
+    __O uint32_t TDR[4]; /**< SAI Transmit Data Register, array offset: 0x20, array step: 0x4 */
+    uint8_t RESERVED_0[16];
+    __I uint32_t TFR[4]; /**< SAI Transmit FIFO Register, array offset: 0x40, array step: 0x4 */
+    uint8_t RESERVED_1[16];
+    __IO uint32_t TMR; /**< SAI Transmit Mask Register, offset: 0x60 */
+    uint8_t RESERVED_2[36];
+    __IO uint32_t RCSR;  /**< SAI Receive Control Register, offset: 0x88 */
+    __IO uint32_t RCR1;  /**< SAI Receive Configuration 1 Register, offset: 0x8C */
+    __IO uint32_t RCR2;  /**< SAI Receive Configuration 2 Register, offset: 0x90 */
+    __IO uint32_t RCR3;  /**< SAI Receive Configuration 3 Register, offset: 0x94 */
+    __IO uint32_t RCR4;  /**< SAI Receive Configuration 4 Register, offset: 0x98 */
+    __IO uint32_t RCR5;  /**< SAI Receive Configuration 5 Register, offset: 0x9C */
+    __I uint32_t RDR[4]; /**< SAI Receive Data Register, array offset: 0xA0, array step: 0x4 */
+    uint8_t RESERVED_3[16];
+    __I uint32_t RFR[4]; /**< SAI Receive FIFO Register, array offset: 0xC0, array step: 0x4 */
+    uint8_t RESERVED_4[16];
+    __IO uint32_t RMR; /**< SAI Receive Mask Register, offset: 0xE0 */
 } I2S_Type;
 
 /* ----------------------------------------------------------------------------
@@ -11950,431 +13631,440 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define I2S_VERID_FEATURE_MASK                   (0xFFFFU)
-#define I2S_VERID_FEATURE_SHIFT                  (0U)
-#define I2S_VERID_FEATURE(x)                     (((uint32_t)(((uint32_t)(x)) << I2S_VERID_FEATURE_SHIFT)) & I2S_VERID_FEATURE_MASK)
-#define I2S_VERID_MINOR_MASK                     (0xFF0000U)
-#define I2S_VERID_MINOR_SHIFT                    (16U)
-#define I2S_VERID_MINOR(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MINOR_SHIFT)) & I2S_VERID_MINOR_MASK)
-#define I2S_VERID_MAJOR_MASK                     (0xFF000000U)
-#define I2S_VERID_MAJOR_SHIFT                    (24U)
-#define I2S_VERID_MAJOR(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MAJOR_SHIFT)) & I2S_VERID_MAJOR_MASK)
+#define I2S_VERID_FEATURE_MASK  (0xFFFFU)
+#define I2S_VERID_FEATURE_SHIFT (0U)
+#define I2S_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_VERID_FEATURE_SHIFT)) & I2S_VERID_FEATURE_MASK)
+#define I2S_VERID_MINOR_MASK    (0xFF0000U)
+#define I2S_VERID_MINOR_SHIFT   (16U)
+#define I2S_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MINOR_SHIFT)) & I2S_VERID_MINOR_MASK)
+#define I2S_VERID_MAJOR_MASK    (0xFF000000U)
+#define I2S_VERID_MAJOR_SHIFT   (24U)
+#define I2S_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << I2S_VERID_MAJOR_SHIFT)) & I2S_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define I2S_PARAM_DATALINE_MASK                  (0xFU)
-#define I2S_PARAM_DATALINE_SHIFT                 (0U)
-#define I2S_PARAM_DATALINE(x)                    (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_DATALINE_SHIFT)) & I2S_PARAM_DATALINE_MASK)
-#define I2S_PARAM_FIFO_MASK                      (0xF00U)
-#define I2S_PARAM_FIFO_SHIFT                     (8U)
-#define I2S_PARAM_FIFO(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FIFO_SHIFT)) & I2S_PARAM_FIFO_MASK)
-#define I2S_PARAM_FRAME_MASK                     (0xF0000U)
-#define I2S_PARAM_FRAME_SHIFT                    (16U)
-#define I2S_PARAM_FRAME(x)                       (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FRAME_SHIFT)) & I2S_PARAM_FRAME_MASK)
+#define I2S_PARAM_DATALINE_MASK  (0xFU)
+#define I2S_PARAM_DATALINE_SHIFT (0U)
+#define I2S_PARAM_DATALINE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_DATALINE_SHIFT)) & I2S_PARAM_DATALINE_MASK)
+#define I2S_PARAM_FIFO_MASK      (0xF00U)
+#define I2S_PARAM_FIFO_SHIFT     (8U)
+#define I2S_PARAM_FIFO(x)        (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FIFO_SHIFT)) & I2S_PARAM_FIFO_MASK)
+#define I2S_PARAM_FRAME_MASK     (0xF0000U)
+#define I2S_PARAM_FRAME_SHIFT    (16U)
+#define I2S_PARAM_FRAME(x)       (((uint32_t)(((uint32_t)(x)) << I2S_PARAM_FRAME_SHIFT)) & I2S_PARAM_FRAME_MASK)
 /*! @} */
 
 /*! @name TCSR - SAI Transmit Control Register */
 /*! @{ */
-#define I2S_TCSR_FRDE_MASK                       (0x1U)
-#define I2S_TCSR_FRDE_SHIFT                      (0U)
-#define I2S_TCSR_FRDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRDE_SHIFT)) & I2S_TCSR_FRDE_MASK)
-#define I2S_TCSR_FWDE_MASK                       (0x2U)
-#define I2S_TCSR_FWDE_SHIFT                      (1U)
-#define I2S_TCSR_FWDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWDE_SHIFT)) & I2S_TCSR_FWDE_MASK)
-#define I2S_TCSR_FRIE_MASK                       (0x100U)
-#define I2S_TCSR_FRIE_SHIFT                      (8U)
-#define I2S_TCSR_FRIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRIE_SHIFT)) & I2S_TCSR_FRIE_MASK)
-#define I2S_TCSR_FWIE_MASK                       (0x200U)
-#define I2S_TCSR_FWIE_SHIFT                      (9U)
-#define I2S_TCSR_FWIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWIE_SHIFT)) & I2S_TCSR_FWIE_MASK)
-#define I2S_TCSR_FEIE_MASK                       (0x400U)
-#define I2S_TCSR_FEIE_SHIFT                      (10U)
-#define I2S_TCSR_FEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEIE_SHIFT)) & I2S_TCSR_FEIE_MASK)
-#define I2S_TCSR_SEIE_MASK                       (0x800U)
-#define I2S_TCSR_SEIE_SHIFT                      (11U)
-#define I2S_TCSR_SEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEIE_SHIFT)) & I2S_TCSR_SEIE_MASK)
-#define I2S_TCSR_WSIE_MASK                       (0x1000U)
-#define I2S_TCSR_WSIE_SHIFT                      (12U)
-#define I2S_TCSR_WSIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSIE_SHIFT)) & I2S_TCSR_WSIE_MASK)
-#define I2S_TCSR_FRF_MASK                        (0x10000U)
-#define I2S_TCSR_FRF_SHIFT                       (16U)
-#define I2S_TCSR_FRF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRF_SHIFT)) & I2S_TCSR_FRF_MASK)
-#define I2S_TCSR_FWF_MASK                        (0x20000U)
-#define I2S_TCSR_FWF_SHIFT                       (17U)
-#define I2S_TCSR_FWF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWF_SHIFT)) & I2S_TCSR_FWF_MASK)
-#define I2S_TCSR_FEF_MASK                        (0x40000U)
-#define I2S_TCSR_FEF_SHIFT                       (18U)
-#define I2S_TCSR_FEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEF_SHIFT)) & I2S_TCSR_FEF_MASK)
-#define I2S_TCSR_SEF_MASK                        (0x80000U)
-#define I2S_TCSR_SEF_SHIFT                       (19U)
-#define I2S_TCSR_SEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEF_SHIFT)) & I2S_TCSR_SEF_MASK)
-#define I2S_TCSR_WSF_MASK                        (0x100000U)
-#define I2S_TCSR_WSF_SHIFT                       (20U)
-#define I2S_TCSR_WSF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSF_SHIFT)) & I2S_TCSR_WSF_MASK)
-#define I2S_TCSR_SR_MASK                         (0x1000000U)
-#define I2S_TCSR_SR_SHIFT                        (24U)
-#define I2S_TCSR_SR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SR_SHIFT)) & I2S_TCSR_SR_MASK)
-#define I2S_TCSR_FR_MASK                         (0x2000000U)
-#define I2S_TCSR_FR_SHIFT                        (25U)
-#define I2S_TCSR_FR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
-#define I2S_TCSR_BCE_MASK                        (0x10000000U)
-#define I2S_TCSR_BCE_SHIFT                       (28U)
-#define I2S_TCSR_BCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_BCE_SHIFT)) & I2S_TCSR_BCE_MASK)
-#define I2S_TCSR_DBGE_MASK                       (0x20000000U)
-#define I2S_TCSR_DBGE_SHIFT                      (29U)
-#define I2S_TCSR_DBGE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_DBGE_SHIFT)) & I2S_TCSR_DBGE_MASK)
-#define I2S_TCSR_STOPE_MASK                      (0x40000000U)
-#define I2S_TCSR_STOPE_SHIFT                     (30U)
-#define I2S_TCSR_STOPE(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_STOPE_SHIFT)) & I2S_TCSR_STOPE_MASK)
-#define I2S_TCSR_TE_MASK                         (0x80000000U)
-#define I2S_TCSR_TE_SHIFT                        (31U)
-#define I2S_TCSR_TE(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_TE_SHIFT)) & I2S_TCSR_TE_MASK)
+#define I2S_TCSR_FRDE_MASK   (0x1U)
+#define I2S_TCSR_FRDE_SHIFT  (0U)
+#define I2S_TCSR_FRDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRDE_SHIFT)) & I2S_TCSR_FRDE_MASK)
+#define I2S_TCSR_FWDE_MASK   (0x2U)
+#define I2S_TCSR_FWDE_SHIFT  (1U)
+#define I2S_TCSR_FWDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWDE_SHIFT)) & I2S_TCSR_FWDE_MASK)
+#define I2S_TCSR_FRIE_MASK   (0x100U)
+#define I2S_TCSR_FRIE_SHIFT  (8U)
+#define I2S_TCSR_FRIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRIE_SHIFT)) & I2S_TCSR_FRIE_MASK)
+#define I2S_TCSR_FWIE_MASK   (0x200U)
+#define I2S_TCSR_FWIE_SHIFT  (9U)
+#define I2S_TCSR_FWIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWIE_SHIFT)) & I2S_TCSR_FWIE_MASK)
+#define I2S_TCSR_FEIE_MASK   (0x400U)
+#define I2S_TCSR_FEIE_SHIFT  (10U)
+#define I2S_TCSR_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEIE_SHIFT)) & I2S_TCSR_FEIE_MASK)
+#define I2S_TCSR_SEIE_MASK   (0x800U)
+#define I2S_TCSR_SEIE_SHIFT  (11U)
+#define I2S_TCSR_SEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEIE_SHIFT)) & I2S_TCSR_SEIE_MASK)
+#define I2S_TCSR_WSIE_MASK   (0x1000U)
+#define I2S_TCSR_WSIE_SHIFT  (12U)
+#define I2S_TCSR_WSIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSIE_SHIFT)) & I2S_TCSR_WSIE_MASK)
+#define I2S_TCSR_FRF_MASK    (0x10000U)
+#define I2S_TCSR_FRF_SHIFT   (16U)
+#define I2S_TCSR_FRF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FRF_SHIFT)) & I2S_TCSR_FRF_MASK)
+#define I2S_TCSR_FWF_MASK    (0x20000U)
+#define I2S_TCSR_FWF_SHIFT   (17U)
+#define I2S_TCSR_FWF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FWF_SHIFT)) & I2S_TCSR_FWF_MASK)
+#define I2S_TCSR_FEF_MASK    (0x40000U)
+#define I2S_TCSR_FEF_SHIFT   (18U)
+#define I2S_TCSR_FEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FEF_SHIFT)) & I2S_TCSR_FEF_MASK)
+#define I2S_TCSR_SEF_MASK    (0x80000U)
+#define I2S_TCSR_SEF_SHIFT   (19U)
+#define I2S_TCSR_SEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SEF_SHIFT)) & I2S_TCSR_SEF_MASK)
+#define I2S_TCSR_WSF_MASK    (0x100000U)
+#define I2S_TCSR_WSF_SHIFT   (20U)
+#define I2S_TCSR_WSF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_WSF_SHIFT)) & I2S_TCSR_WSF_MASK)
+#define I2S_TCSR_SR_MASK     (0x1000000U)
+#define I2S_TCSR_SR_SHIFT    (24U)
+#define I2S_TCSR_SR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_SR_SHIFT)) & I2S_TCSR_SR_MASK)
+#define I2S_TCSR_FR_MASK     (0x2000000U)
+#define I2S_TCSR_FR_SHIFT    (25U)
+#define I2S_TCSR_FR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
+#define I2S_TCSR_BCE_MASK    (0x10000000U)
+#define I2S_TCSR_BCE_SHIFT   (28U)
+#define I2S_TCSR_BCE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_BCE_SHIFT)) & I2S_TCSR_BCE_MASK)
+#define I2S_TCSR_DBGE_MASK   (0x20000000U)
+#define I2S_TCSR_DBGE_SHIFT  (29U)
+#define I2S_TCSR_DBGE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_DBGE_SHIFT)) & I2S_TCSR_DBGE_MASK)
+#define I2S_TCSR_STOPE_MASK  (0x40000000U)
+#define I2S_TCSR_STOPE_SHIFT (30U)
+#define I2S_TCSR_STOPE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_STOPE_SHIFT)) & I2S_TCSR_STOPE_MASK)
+#define I2S_TCSR_TE_MASK     (0x80000000U)
+#define I2S_TCSR_TE_SHIFT    (31U)
+#define I2S_TCSR_TE(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_TE_SHIFT)) & I2S_TCSR_TE_MASK)
 /*! @} */
 
 /*! @name TCR1 - SAI Transmit Configuration 1 Register */
 /*! @{ */
-#define I2S_TCR1_TFW_MASK                        (0x1FU)
-#define I2S_TCR1_TFW_SHIFT                       (0U)
-#define I2S_TCR1_TFW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR1_TFW_SHIFT)) & I2S_TCR1_TFW_MASK)
+#define I2S_TCR1_TFW_MASK  (0x1FU)
+#define I2S_TCR1_TFW_SHIFT (0U)
+#define I2S_TCR1_TFW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR1_TFW_SHIFT)) & I2S_TCR1_TFW_MASK)
 /*! @} */
 
 /*! @name TCR2 - SAI Transmit Configuration 2 Register */
 /*! @{ */
-#define I2S_TCR2_DIV_MASK                        (0xFFU)
-#define I2S_TCR2_DIV_SHIFT                       (0U)
-#define I2S_TCR2_DIV(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)
-#define I2S_TCR2_BCD_MASK                        (0x1000000U)
-#define I2S_TCR2_BCD_SHIFT                       (24U)
-#define I2S_TCR2_BCD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCD_SHIFT)) & I2S_TCR2_BCD_MASK)
-#define I2S_TCR2_BCP_MASK                        (0x2000000U)
-#define I2S_TCR2_BCP_SHIFT                       (25U)
-#define I2S_TCR2_BCP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCP_SHIFT)) & I2S_TCR2_BCP_MASK)
-#define I2S_TCR2_MSEL_MASK                       (0xC000000U)
-#define I2S_TCR2_MSEL_SHIFT                      (26U)
-#define I2S_TCR2_MSEL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_MSEL_SHIFT)) & I2S_TCR2_MSEL_MASK)
-#define I2S_TCR2_BCI_MASK                        (0x10000000U)
-#define I2S_TCR2_BCI_SHIFT                       (28U)
-#define I2S_TCR2_BCI(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCI_SHIFT)) & I2S_TCR2_BCI_MASK)
-#define I2S_TCR2_BCS_MASK                        (0x20000000U)
-#define I2S_TCR2_BCS_SHIFT                       (29U)
-#define I2S_TCR2_BCS(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCS_SHIFT)) & I2S_TCR2_BCS_MASK)
-#define I2S_TCR2_SYNC_MASK                       (0xC0000000U)
-#define I2S_TCR2_SYNC_SHIFT                      (30U)
-#define I2S_TCR2_SYNC(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_SYNC_SHIFT)) & I2S_TCR2_SYNC_MASK)
+#define I2S_TCR2_DIV_MASK   (0xFFU)
+#define I2S_TCR2_DIV_SHIFT  (0U)
+#define I2S_TCR2_DIV(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)
+#define I2S_TCR2_BCD_MASK   (0x1000000U)
+#define I2S_TCR2_BCD_SHIFT  (24U)
+#define I2S_TCR2_BCD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCD_SHIFT)) & I2S_TCR2_BCD_MASK)
+#define I2S_TCR2_BCP_MASK   (0x2000000U)
+#define I2S_TCR2_BCP_SHIFT  (25U)
+#define I2S_TCR2_BCP(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCP_SHIFT)) & I2S_TCR2_BCP_MASK)
+#define I2S_TCR2_MSEL_MASK  (0xC000000U)
+#define I2S_TCR2_MSEL_SHIFT (26U)
+#define I2S_TCR2_MSEL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_MSEL_SHIFT)) & I2S_TCR2_MSEL_MASK)
+#define I2S_TCR2_BCI_MASK   (0x10000000U)
+#define I2S_TCR2_BCI_SHIFT  (28U)
+#define I2S_TCR2_BCI(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCI_SHIFT)) & I2S_TCR2_BCI_MASK)
+#define I2S_TCR2_BCS_MASK   (0x20000000U)
+#define I2S_TCR2_BCS_SHIFT  (29U)
+#define I2S_TCR2_BCS(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_BCS_SHIFT)) & I2S_TCR2_BCS_MASK)
+#define I2S_TCR2_SYNC_MASK  (0xC0000000U)
+#define I2S_TCR2_SYNC_SHIFT (30U)
+#define I2S_TCR2_SYNC(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_SYNC_SHIFT)) & I2S_TCR2_SYNC_MASK)
 /*! @} */
 
 /*! @name TCR3 - SAI Transmit Configuration 3 Register */
 /*! @{ */
-#define I2S_TCR3_WDFL_MASK                       (0x1FU)
-#define I2S_TCR3_WDFL_SHIFT                      (0U)
-#define I2S_TCR3_WDFL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_WDFL_SHIFT)) & I2S_TCR3_WDFL_MASK)
-#define I2S_TCR3_TCE_MASK                        (0xF0000U)
-#define I2S_TCR3_TCE_SHIFT                       (16U)
-#define I2S_TCR3_TCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_TCE_SHIFT)) & I2S_TCR3_TCE_MASK)
-#define I2S_TCR3_CFR_MASK                        (0xF000000U)
-#define I2S_TCR3_CFR_SHIFT                       (24U)
-#define I2S_TCR3_CFR(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_CFR_SHIFT)) & I2S_TCR3_CFR_MASK)
+#define I2S_TCR3_WDFL_MASK  (0x1FU)
+#define I2S_TCR3_WDFL_SHIFT (0U)
+#define I2S_TCR3_WDFL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_WDFL_SHIFT)) & I2S_TCR3_WDFL_MASK)
+#define I2S_TCR3_TCE_MASK   (0xF0000U)
+#define I2S_TCR3_TCE_SHIFT  (16U)
+#define I2S_TCR3_TCE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_TCE_SHIFT)) & I2S_TCR3_TCE_MASK)
+#define I2S_TCR3_CFR_MASK   (0xF000000U)
+#define I2S_TCR3_CFR_SHIFT  (24U)
+#define I2S_TCR3_CFR(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR3_CFR_SHIFT)) & I2S_TCR3_CFR_MASK)
 /*! @} */
 
 /*! @name TCR4 - SAI Transmit Configuration 4 Register */
 /*! @{ */
-#define I2S_TCR4_FSD_MASK                        (0x1U)
-#define I2S_TCR4_FSD_SHIFT                       (0U)
-#define I2S_TCR4_FSD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
-#define I2S_TCR4_FSP_MASK                        (0x2U)
-#define I2S_TCR4_FSP_SHIFT                       (1U)
-#define I2S_TCR4_FSP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSP_SHIFT)) & I2S_TCR4_FSP_MASK)
-#define I2S_TCR4_ONDEM_MASK                      (0x4U)
-#define I2S_TCR4_ONDEM_SHIFT                     (2U)
-#define I2S_TCR4_ONDEM(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_ONDEM_SHIFT)) & I2S_TCR4_ONDEM_MASK)
-#define I2S_TCR4_FSE_MASK                        (0x8U)
-#define I2S_TCR4_FSE_SHIFT                       (3U)
-#define I2S_TCR4_FSE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSE_SHIFT)) & I2S_TCR4_FSE_MASK)
-#define I2S_TCR4_MF_MASK                         (0x10U)
-#define I2S_TCR4_MF_SHIFT                        (4U)
-#define I2S_TCR4_MF(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_MF_SHIFT)) & I2S_TCR4_MF_MASK)
-#define I2S_TCR4_CHMOD_MASK                      (0x20U)
-#define I2S_TCR4_CHMOD_SHIFT                     (5U)
-#define I2S_TCR4_CHMOD(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_CHMOD_SHIFT)) & I2S_TCR4_CHMOD_MASK)
-#define I2S_TCR4_SYWD_MASK                       (0x1F00U)
-#define I2S_TCR4_SYWD_SHIFT                      (8U)
-#define I2S_TCR4_SYWD(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_SYWD_SHIFT)) & I2S_TCR4_SYWD_MASK)
-#define I2S_TCR4_FRSZ_MASK                       (0x1F0000U)
-#define I2S_TCR4_FRSZ_SHIFT                      (16U)
-#define I2S_TCR4_FRSZ(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FRSZ_SHIFT)) & I2S_TCR4_FRSZ_MASK)
-#define I2S_TCR4_FPACK_MASK                      (0x3000000U)
-#define I2S_TCR4_FPACK_SHIFT                     (24U)
-#define I2S_TCR4_FPACK(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FPACK_SHIFT)) & I2S_TCR4_FPACK_MASK)
-#define I2S_TCR4_FCOMB_MASK                      (0xC000000U)
-#define I2S_TCR4_FCOMB_SHIFT                     (26U)
-#define I2S_TCR4_FCOMB(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCOMB_SHIFT)) & I2S_TCR4_FCOMB_MASK)
-#define I2S_TCR4_FCONT_MASK                      (0x10000000U)
-#define I2S_TCR4_FCONT_SHIFT                     (28U)
-#define I2S_TCR4_FCONT(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCONT_SHIFT)) & I2S_TCR4_FCONT_MASK)
+#define I2S_TCR4_FSD_MASK    (0x1U)
+#define I2S_TCR4_FSD_SHIFT   (0U)
+#define I2S_TCR4_FSD(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
+#define I2S_TCR4_FSP_MASK    (0x2U)
+#define I2S_TCR4_FSP_SHIFT   (1U)
+#define I2S_TCR4_FSP(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSP_SHIFT)) & I2S_TCR4_FSP_MASK)
+#define I2S_TCR4_ONDEM_MASK  (0x4U)
+#define I2S_TCR4_ONDEM_SHIFT (2U)
+#define I2S_TCR4_ONDEM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_ONDEM_SHIFT)) & I2S_TCR4_ONDEM_MASK)
+#define I2S_TCR4_FSE_MASK    (0x8U)
+#define I2S_TCR4_FSE_SHIFT   (3U)
+#define I2S_TCR4_FSE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSE_SHIFT)) & I2S_TCR4_FSE_MASK)
+#define I2S_TCR4_MF_MASK     (0x10U)
+#define I2S_TCR4_MF_SHIFT    (4U)
+#define I2S_TCR4_MF(x)       (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_MF_SHIFT)) & I2S_TCR4_MF_MASK)
+#define I2S_TCR4_CHMOD_MASK  (0x20U)
+#define I2S_TCR4_CHMOD_SHIFT (5U)
+#define I2S_TCR4_CHMOD(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_CHMOD_SHIFT)) & I2S_TCR4_CHMOD_MASK)
+#define I2S_TCR4_SYWD_MASK   (0x1F00U)
+#define I2S_TCR4_SYWD_SHIFT  (8U)
+#define I2S_TCR4_SYWD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_SYWD_SHIFT)) & I2S_TCR4_SYWD_MASK)
+#define I2S_TCR4_FRSZ_MASK   (0x1F0000U)
+#define I2S_TCR4_FRSZ_SHIFT  (16U)
+#define I2S_TCR4_FRSZ(x)     (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FRSZ_SHIFT)) & I2S_TCR4_FRSZ_MASK)
+#define I2S_TCR4_FPACK_MASK  (0x3000000U)
+#define I2S_TCR4_FPACK_SHIFT (24U)
+#define I2S_TCR4_FPACK(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FPACK_SHIFT)) & I2S_TCR4_FPACK_MASK)
+#define I2S_TCR4_FCOMB_MASK  (0xC000000U)
+#define I2S_TCR4_FCOMB_SHIFT (26U)
+#define I2S_TCR4_FCOMB(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCOMB_SHIFT)) & I2S_TCR4_FCOMB_MASK)
+#define I2S_TCR4_FCONT_MASK  (0x10000000U)
+#define I2S_TCR4_FCONT_SHIFT (28U)
+#define I2S_TCR4_FCONT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FCONT_SHIFT)) & I2S_TCR4_FCONT_MASK)
 /*! @} */
 
 /*! @name TCR5 - SAI Transmit Configuration 5 Register */
 /*! @{ */
-#define I2S_TCR5_FBT_MASK                        (0x1F00U)
-#define I2S_TCR5_FBT_SHIFT                       (8U)
-#define I2S_TCR5_FBT(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_FBT_SHIFT)) & I2S_TCR5_FBT_MASK)
-#define I2S_TCR5_W0W_MASK                        (0x1F0000U)
-#define I2S_TCR5_W0W_SHIFT                       (16U)
-#define I2S_TCR5_W0W(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_W0W_SHIFT)) & I2S_TCR5_W0W_MASK)
-#define I2S_TCR5_WNW_MASK                        (0x1F000000U)
-#define I2S_TCR5_WNW_SHIFT                       (24U)
-#define I2S_TCR5_WNW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_WNW_SHIFT)) & I2S_TCR5_WNW_MASK)
+#define I2S_TCR5_FBT_MASK  (0x1F00U)
+#define I2S_TCR5_FBT_SHIFT (8U)
+#define I2S_TCR5_FBT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_FBT_SHIFT)) & I2S_TCR5_FBT_MASK)
+#define I2S_TCR5_W0W_MASK  (0x1F0000U)
+#define I2S_TCR5_W0W_SHIFT (16U)
+#define I2S_TCR5_W0W(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_W0W_SHIFT)) & I2S_TCR5_W0W_MASK)
+#define I2S_TCR5_WNW_MASK  (0x1F000000U)
+#define I2S_TCR5_WNW_SHIFT (24U)
+#define I2S_TCR5_WNW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TCR5_WNW_SHIFT)) & I2S_TCR5_WNW_MASK)
 /*! @} */
 
 /*! @name TDR - SAI Transmit Data Register */
 /*! @{ */
-#define I2S_TDR_TDR_MASK                         (0xFFFFFFFFU)
-#define I2S_TDR_TDR_SHIFT                        (0U)
-#define I2S_TDR_TDR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TDR_TDR_SHIFT)) & I2S_TDR_TDR_MASK)
+#define I2S_TDR_TDR_MASK  (0xFFFFFFFFU)
+#define I2S_TDR_TDR_SHIFT (0U)
+#define I2S_TDR_TDR(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TDR_TDR_SHIFT)) & I2S_TDR_TDR_MASK)
 /*! @} */
 
 /* The count of I2S_TDR */
-#define I2S_TDR_COUNT                            (4U)
+#define I2S_TDR_COUNT (4U)
 
 /*! @name TFR - SAI Transmit FIFO Register */
 /*! @{ */
-#define I2S_TFR_RFP_MASK                         (0x3FU)
-#define I2S_TFR_RFP_SHIFT                        (0U)
-#define I2S_TFR_RFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_RFP_SHIFT)) & I2S_TFR_RFP_MASK)
-#define I2S_TFR_WFP_MASK                         (0x3F0000U)
-#define I2S_TFR_WFP_SHIFT                        (16U)
-#define I2S_TFR_WFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WFP_SHIFT)) & I2S_TFR_WFP_MASK)
-#define I2S_TFR_WCP_MASK                         (0x80000000U)
-#define I2S_TFR_WCP_SHIFT                        (31U)
-#define I2S_TFR_WCP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WCP_SHIFT)) & I2S_TFR_WCP_MASK)
+#define I2S_TFR_RFP_MASK  (0x3FU)
+#define I2S_TFR_RFP_SHIFT (0U)
+#define I2S_TFR_RFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_RFP_SHIFT)) & I2S_TFR_RFP_MASK)
+#define I2S_TFR_WFP_MASK  (0x3F0000U)
+#define I2S_TFR_WFP_SHIFT (16U)
+#define I2S_TFR_WFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WFP_SHIFT)) & I2S_TFR_WFP_MASK)
+#define I2S_TFR_WCP_MASK  (0x80000000U)
+#define I2S_TFR_WCP_SHIFT (31U)
+#define I2S_TFR_WCP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TFR_WCP_SHIFT)) & I2S_TFR_WCP_MASK)
 /*! @} */
 
 /* The count of I2S_TFR */
-#define I2S_TFR_COUNT                            (4U)
+#define I2S_TFR_COUNT (4U)
 
 /*! @name TMR - SAI Transmit Mask Register */
 /*! @{ */
-#define I2S_TMR_TWM_MASK                         (0xFFFFFFFFU)
-#define I2S_TMR_TWM_SHIFT                        (0U)
-#define I2S_TMR_TWM(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_TMR_TWM_SHIFT)) & I2S_TMR_TWM_MASK)
+#define I2S_TMR_TWM_MASK  (0xFFFFFFFFU)
+#define I2S_TMR_TWM_SHIFT (0U)
+#define I2S_TMR_TWM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_TMR_TWM_SHIFT)) & I2S_TMR_TWM_MASK)
 /*! @} */
 
 /*! @name RCSR - SAI Receive Control Register */
 /*! @{ */
-#define I2S_RCSR_FRDE_MASK                       (0x1U)
-#define I2S_RCSR_FRDE_SHIFT                      (0U)
-#define I2S_RCSR_FRDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRDE_SHIFT)) & I2S_RCSR_FRDE_MASK)
-#define I2S_RCSR_FWDE_MASK                       (0x2U)
-#define I2S_RCSR_FWDE_SHIFT                      (1U)
-#define I2S_RCSR_FWDE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWDE_SHIFT)) & I2S_RCSR_FWDE_MASK)
-#define I2S_RCSR_FRIE_MASK                       (0x100U)
-#define I2S_RCSR_FRIE_SHIFT                      (8U)
-#define I2S_RCSR_FRIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRIE_SHIFT)) & I2S_RCSR_FRIE_MASK)
-#define I2S_RCSR_FWIE_MASK                       (0x200U)
-#define I2S_RCSR_FWIE_SHIFT                      (9U)
-#define I2S_RCSR_FWIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWIE_SHIFT)) & I2S_RCSR_FWIE_MASK)
-#define I2S_RCSR_FEIE_MASK                       (0x400U)
-#define I2S_RCSR_FEIE_SHIFT                      (10U)
-#define I2S_RCSR_FEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEIE_SHIFT)) & I2S_RCSR_FEIE_MASK)
-#define I2S_RCSR_SEIE_MASK                       (0x800U)
-#define I2S_RCSR_SEIE_SHIFT                      (11U)
-#define I2S_RCSR_SEIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEIE_SHIFT)) & I2S_RCSR_SEIE_MASK)
-#define I2S_RCSR_WSIE_MASK                       (0x1000U)
-#define I2S_RCSR_WSIE_SHIFT                      (12U)
-#define I2S_RCSR_WSIE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSIE_SHIFT)) & I2S_RCSR_WSIE_MASK)
-#define I2S_RCSR_FRF_MASK                        (0x10000U)
-#define I2S_RCSR_FRF_SHIFT                       (16U)
-#define I2S_RCSR_FRF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRF_SHIFT)) & I2S_RCSR_FRF_MASK)
-#define I2S_RCSR_FWF_MASK                        (0x20000U)
-#define I2S_RCSR_FWF_SHIFT                       (17U)
-#define I2S_RCSR_FWF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWF_SHIFT)) & I2S_RCSR_FWF_MASK)
-#define I2S_RCSR_FEF_MASK                        (0x40000U)
-#define I2S_RCSR_FEF_SHIFT                       (18U)
-#define I2S_RCSR_FEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEF_SHIFT)) & I2S_RCSR_FEF_MASK)
-#define I2S_RCSR_SEF_MASK                        (0x80000U)
-#define I2S_RCSR_SEF_SHIFT                       (19U)
-#define I2S_RCSR_SEF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEF_SHIFT)) & I2S_RCSR_SEF_MASK)
-#define I2S_RCSR_WSF_MASK                        (0x100000U)
-#define I2S_RCSR_WSF_SHIFT                       (20U)
-#define I2S_RCSR_WSF(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSF_SHIFT)) & I2S_RCSR_WSF_MASK)
-#define I2S_RCSR_SR_MASK                         (0x1000000U)
-#define I2S_RCSR_SR_SHIFT                        (24U)
-#define I2S_RCSR_SR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SR_SHIFT)) & I2S_RCSR_SR_MASK)
-#define I2S_RCSR_FR_MASK                         (0x2000000U)
-#define I2S_RCSR_FR_SHIFT                        (25U)
-#define I2S_RCSR_FR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FR_SHIFT)) & I2S_RCSR_FR_MASK)
-#define I2S_RCSR_BCE_MASK                        (0x10000000U)
-#define I2S_RCSR_BCE_SHIFT                       (28U)
-#define I2S_RCSR_BCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_BCE_SHIFT)) & I2S_RCSR_BCE_MASK)
-#define I2S_RCSR_DBGE_MASK                       (0x20000000U)
-#define I2S_RCSR_DBGE_SHIFT                      (29U)
-#define I2S_RCSR_DBGE(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_DBGE_SHIFT)) & I2S_RCSR_DBGE_MASK)
-#define I2S_RCSR_STOPE_MASK                      (0x40000000U)
-#define I2S_RCSR_STOPE_SHIFT                     (30U)
-#define I2S_RCSR_STOPE(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_STOPE_SHIFT)) & I2S_RCSR_STOPE_MASK)
-#define I2S_RCSR_RE_MASK                         (0x80000000U)
-#define I2S_RCSR_RE_SHIFT                        (31U)
-#define I2S_RCSR_RE(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_RE_SHIFT)) & I2S_RCSR_RE_MASK)
+#define I2S_RCSR_FRDE_MASK   (0x1U)
+#define I2S_RCSR_FRDE_SHIFT  (0U)
+#define I2S_RCSR_FRDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRDE_SHIFT)) & I2S_RCSR_FRDE_MASK)
+#define I2S_RCSR_FWDE_MASK   (0x2U)
+#define I2S_RCSR_FWDE_SHIFT  (1U)
+#define I2S_RCSR_FWDE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWDE_SHIFT)) & I2S_RCSR_FWDE_MASK)
+#define I2S_RCSR_FRIE_MASK   (0x100U)
+#define I2S_RCSR_FRIE_SHIFT  (8U)
+#define I2S_RCSR_FRIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRIE_SHIFT)) & I2S_RCSR_FRIE_MASK)
+#define I2S_RCSR_FWIE_MASK   (0x200U)
+#define I2S_RCSR_FWIE_SHIFT  (9U)
+#define I2S_RCSR_FWIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWIE_SHIFT)) & I2S_RCSR_FWIE_MASK)
+#define I2S_RCSR_FEIE_MASK   (0x400U)
+#define I2S_RCSR_FEIE_SHIFT  (10U)
+#define I2S_RCSR_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEIE_SHIFT)) & I2S_RCSR_FEIE_MASK)
+#define I2S_RCSR_SEIE_MASK   (0x800U)
+#define I2S_RCSR_SEIE_SHIFT  (11U)
+#define I2S_RCSR_SEIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEIE_SHIFT)) & I2S_RCSR_SEIE_MASK)
+#define I2S_RCSR_WSIE_MASK   (0x1000U)
+#define I2S_RCSR_WSIE_SHIFT  (12U)
+#define I2S_RCSR_WSIE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSIE_SHIFT)) & I2S_RCSR_WSIE_MASK)
+#define I2S_RCSR_FRF_MASK    (0x10000U)
+#define I2S_RCSR_FRF_SHIFT   (16U)
+#define I2S_RCSR_FRF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FRF_SHIFT)) & I2S_RCSR_FRF_MASK)
+#define I2S_RCSR_FWF_MASK    (0x20000U)
+#define I2S_RCSR_FWF_SHIFT   (17U)
+#define I2S_RCSR_FWF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FWF_SHIFT)) & I2S_RCSR_FWF_MASK)
+#define I2S_RCSR_FEF_MASK    (0x40000U)
+#define I2S_RCSR_FEF_SHIFT   (18U)
+#define I2S_RCSR_FEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FEF_SHIFT)) & I2S_RCSR_FEF_MASK)
+#define I2S_RCSR_SEF_MASK    (0x80000U)
+#define I2S_RCSR_SEF_SHIFT   (19U)
+#define I2S_RCSR_SEF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SEF_SHIFT)) & I2S_RCSR_SEF_MASK)
+#define I2S_RCSR_WSF_MASK    (0x100000U)
+#define I2S_RCSR_WSF_SHIFT   (20U)
+#define I2S_RCSR_WSF(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_WSF_SHIFT)) & I2S_RCSR_WSF_MASK)
+#define I2S_RCSR_SR_MASK     (0x1000000U)
+#define I2S_RCSR_SR_SHIFT    (24U)
+#define I2S_RCSR_SR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_SR_SHIFT)) & I2S_RCSR_SR_MASK)
+#define I2S_RCSR_FR_MASK     (0x2000000U)
+#define I2S_RCSR_FR_SHIFT    (25U)
+#define I2S_RCSR_FR(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_FR_SHIFT)) & I2S_RCSR_FR_MASK)
+#define I2S_RCSR_BCE_MASK    (0x10000000U)
+#define I2S_RCSR_BCE_SHIFT   (28U)
+#define I2S_RCSR_BCE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_BCE_SHIFT)) & I2S_RCSR_BCE_MASK)
+#define I2S_RCSR_DBGE_MASK   (0x20000000U)
+#define I2S_RCSR_DBGE_SHIFT  (29U)
+#define I2S_RCSR_DBGE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_DBGE_SHIFT)) & I2S_RCSR_DBGE_MASK)
+#define I2S_RCSR_STOPE_MASK  (0x40000000U)
+#define I2S_RCSR_STOPE_SHIFT (30U)
+#define I2S_RCSR_STOPE(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_STOPE_SHIFT)) & I2S_RCSR_STOPE_MASK)
+#define I2S_RCSR_RE_MASK     (0x80000000U)
+#define I2S_RCSR_RE_SHIFT    (31U)
+#define I2S_RCSR_RE(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCSR_RE_SHIFT)) & I2S_RCSR_RE_MASK)
 /*! @} */
 
 /*! @name RCR1 - SAI Receive Configuration 1 Register */
 /*! @{ */
-#define I2S_RCR1_RFW_MASK                        (0x1FU)
-#define I2S_RCR1_RFW_SHIFT                       (0U)
-#define I2S_RCR1_RFW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR1_RFW_SHIFT)) & I2S_RCR1_RFW_MASK)
+#define I2S_RCR1_RFW_MASK  (0x1FU)
+#define I2S_RCR1_RFW_SHIFT (0U)
+#define I2S_RCR1_RFW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR1_RFW_SHIFT)) & I2S_RCR1_RFW_MASK)
 /*! @} */
 
 /*! @name RCR2 - SAI Receive Configuration 2 Register */
 /*! @{ */
-#define I2S_RCR2_DIV_MASK                        (0xFFU)
-#define I2S_RCR2_DIV_SHIFT                       (0U)
-#define I2S_RCR2_DIV(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_DIV_SHIFT)) & I2S_RCR2_DIV_MASK)
-#define I2S_RCR2_BCD_MASK                        (0x1000000U)
-#define I2S_RCR2_BCD_SHIFT                       (24U)
-#define I2S_RCR2_BCD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCD_SHIFT)) & I2S_RCR2_BCD_MASK)
-#define I2S_RCR2_BCP_MASK                        (0x2000000U)
-#define I2S_RCR2_BCP_SHIFT                       (25U)
-#define I2S_RCR2_BCP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCP_SHIFT)) & I2S_RCR2_BCP_MASK)
-#define I2S_RCR2_MSEL_MASK                       (0xC000000U)
-#define I2S_RCR2_MSEL_SHIFT                      (26U)
-#define I2S_RCR2_MSEL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_MSEL_SHIFT)) & I2S_RCR2_MSEL_MASK)
-#define I2S_RCR2_BCI_MASK                        (0x10000000U)
-#define I2S_RCR2_BCI_SHIFT                       (28U)
-#define I2S_RCR2_BCI(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCI_SHIFT)) & I2S_RCR2_BCI_MASK)
-#define I2S_RCR2_BCS_MASK                        (0x20000000U)
-#define I2S_RCR2_BCS_SHIFT                       (29U)
-#define I2S_RCR2_BCS(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCS_SHIFT)) & I2S_RCR2_BCS_MASK)
-#define I2S_RCR2_SYNC_MASK                       (0xC0000000U)
-#define I2S_RCR2_SYNC_SHIFT                      (30U)
-#define I2S_RCR2_SYNC(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_SYNC_SHIFT)) & I2S_RCR2_SYNC_MASK)
+#define I2S_RCR2_DIV_MASK   (0xFFU)
+#define I2S_RCR2_DIV_SHIFT  (0U)
+#define I2S_RCR2_DIV(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_DIV_SHIFT)) & I2S_RCR2_DIV_MASK)
+#define I2S_RCR2_BCD_MASK   (0x1000000U)
+#define I2S_RCR2_BCD_SHIFT  (24U)
+#define I2S_RCR2_BCD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCD_SHIFT)) & I2S_RCR2_BCD_MASK)
+#define I2S_RCR2_BCP_MASK   (0x2000000U)
+#define I2S_RCR2_BCP_SHIFT  (25U)
+#define I2S_RCR2_BCP(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCP_SHIFT)) & I2S_RCR2_BCP_MASK)
+#define I2S_RCR2_MSEL_MASK  (0xC000000U)
+#define I2S_RCR2_MSEL_SHIFT (26U)
+#define I2S_RCR2_MSEL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_MSEL_SHIFT)) & I2S_RCR2_MSEL_MASK)
+#define I2S_RCR2_BCI_MASK   (0x10000000U)
+#define I2S_RCR2_BCI_SHIFT  (28U)
+#define I2S_RCR2_BCI(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCI_SHIFT)) & I2S_RCR2_BCI_MASK)
+#define I2S_RCR2_BCS_MASK   (0x20000000U)
+#define I2S_RCR2_BCS_SHIFT  (29U)
+#define I2S_RCR2_BCS(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_BCS_SHIFT)) & I2S_RCR2_BCS_MASK)
+#define I2S_RCR2_SYNC_MASK  (0xC0000000U)
+#define I2S_RCR2_SYNC_SHIFT (30U)
+#define I2S_RCR2_SYNC(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR2_SYNC_SHIFT)) & I2S_RCR2_SYNC_MASK)
 /*! @} */
 
 /*! @name RCR3 - SAI Receive Configuration 3 Register */
 /*! @{ */
-#define I2S_RCR3_WDFL_MASK                       (0x1FU)
-#define I2S_RCR3_WDFL_SHIFT                      (0U)
-#define I2S_RCR3_WDFL(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_WDFL_SHIFT)) & I2S_RCR3_WDFL_MASK)
-#define I2S_RCR3_RCE_MASK                        (0xF0000U)
-#define I2S_RCR3_RCE_SHIFT                       (16U)
-#define I2S_RCR3_RCE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_RCE_SHIFT)) & I2S_RCR3_RCE_MASK)
-#define I2S_RCR3_CFR_MASK                        (0xF000000U)
-#define I2S_RCR3_CFR_SHIFT                       (24U)
-#define I2S_RCR3_CFR(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_CFR_SHIFT)) & I2S_RCR3_CFR_MASK)
+#define I2S_RCR3_WDFL_MASK  (0x1FU)
+#define I2S_RCR3_WDFL_SHIFT (0U)
+#define I2S_RCR3_WDFL(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_WDFL_SHIFT)) & I2S_RCR3_WDFL_MASK)
+#define I2S_RCR3_RCE_MASK   (0xF0000U)
+#define I2S_RCR3_RCE_SHIFT  (16U)
+#define I2S_RCR3_RCE(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_RCE_SHIFT)) & I2S_RCR3_RCE_MASK)
+#define I2S_RCR3_CFR_MASK   (0xF000000U)
+#define I2S_RCR3_CFR_SHIFT  (24U)
+#define I2S_RCR3_CFR(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR3_CFR_SHIFT)) & I2S_RCR3_CFR_MASK)
 /*! @} */
 
 /*! @name RCR4 - SAI Receive Configuration 4 Register */
 /*! @{ */
-#define I2S_RCR4_FSD_MASK                        (0x1U)
-#define I2S_RCR4_FSD_SHIFT                       (0U)
-#define I2S_RCR4_FSD(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSD_SHIFT)) & I2S_RCR4_FSD_MASK)
-#define I2S_RCR4_FSP_MASK                        (0x2U)
-#define I2S_RCR4_FSP_SHIFT                       (1U)
-#define I2S_RCR4_FSP(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSP_SHIFT)) & I2S_RCR4_FSP_MASK)
-#define I2S_RCR4_ONDEM_MASK                      (0x4U)
-#define I2S_RCR4_ONDEM_SHIFT                     (2U)
-#define I2S_RCR4_ONDEM(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_ONDEM_SHIFT)) & I2S_RCR4_ONDEM_MASK)
-#define I2S_RCR4_FSE_MASK                        (0x8U)
-#define I2S_RCR4_FSE_SHIFT                       (3U)
-#define I2S_RCR4_FSE(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSE_SHIFT)) & I2S_RCR4_FSE_MASK)
-#define I2S_RCR4_MF_MASK                         (0x10U)
-#define I2S_RCR4_MF_SHIFT                        (4U)
-#define I2S_RCR4_MF(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_MF_SHIFT)) & I2S_RCR4_MF_MASK)
-#define I2S_RCR4_SYWD_MASK                       (0x1F00U)
-#define I2S_RCR4_SYWD_SHIFT                      (8U)
-#define I2S_RCR4_SYWD(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_SYWD_SHIFT)) & I2S_RCR4_SYWD_MASK)
-#define I2S_RCR4_FRSZ_MASK                       (0x1F0000U)
-#define I2S_RCR4_FRSZ_SHIFT                      (16U)
-#define I2S_RCR4_FRSZ(x)                         (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FRSZ_SHIFT)) & I2S_RCR4_FRSZ_MASK)
-#define I2S_RCR4_FPACK_MASK                      (0x3000000U)
-#define I2S_RCR4_FPACK_SHIFT                     (24U)
-#define I2S_RCR4_FPACK(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FPACK_SHIFT)) & I2S_RCR4_FPACK_MASK)
-#define I2S_RCR4_FCOMB_MASK                      (0xC000000U)
-#define I2S_RCR4_FCOMB_SHIFT                     (26U)
-#define I2S_RCR4_FCOMB(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCOMB_SHIFT)) & I2S_RCR4_FCOMB_MASK)
-#define I2S_RCR4_FCONT_MASK                      (0x10000000U)
-#define I2S_RCR4_FCONT_SHIFT                     (28U)
-#define I2S_RCR4_FCONT(x)                        (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
+#define I2S_RCR4_FSD_MASK    (0x1U)
+#define I2S_RCR4_FSD_SHIFT   (0U)
+#define I2S_RCR4_FSD(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSD_SHIFT)) & I2S_RCR4_FSD_MASK)
+#define I2S_RCR4_FSP_MASK    (0x2U)
+#define I2S_RCR4_FSP_SHIFT   (1U)
+#define I2S_RCR4_FSP(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSP_SHIFT)) & I2S_RCR4_FSP_MASK)
+#define I2S_RCR4_ONDEM_MASK  (0x4U)
+#define I2S_RCR4_ONDEM_SHIFT (2U)
+#define I2S_RCR4_ONDEM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_ONDEM_SHIFT)) & I2S_RCR4_ONDEM_MASK)
+#define I2S_RCR4_FSE_MASK    (0x8U)
+#define I2S_RCR4_FSE_SHIFT   (3U)
+#define I2S_RCR4_FSE(x)      (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FSE_SHIFT)) & I2S_RCR4_FSE_MASK)
+#define I2S_RCR4_MF_MASK     (0x10U)
+#define I2S_RCR4_MF_SHIFT    (4U)
+#define I2S_RCR4_MF(x)       (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_MF_SHIFT)) & I2S_RCR4_MF_MASK)
+#define I2S_RCR4_SYWD_MASK   (0x1F00U)
+#define I2S_RCR4_SYWD_SHIFT  (8U)
+#define I2S_RCR4_SYWD(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_SYWD_SHIFT)) & I2S_RCR4_SYWD_MASK)
+#define I2S_RCR4_FRSZ_MASK   (0x1F0000U)
+#define I2S_RCR4_FRSZ_SHIFT  (16U)
+#define I2S_RCR4_FRSZ(x)     (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FRSZ_SHIFT)) & I2S_RCR4_FRSZ_MASK)
+#define I2S_RCR4_FPACK_MASK  (0x3000000U)
+#define I2S_RCR4_FPACK_SHIFT (24U)
+#define I2S_RCR4_FPACK(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FPACK_SHIFT)) & I2S_RCR4_FPACK_MASK)
+#define I2S_RCR4_FCOMB_MASK  (0xC000000U)
+#define I2S_RCR4_FCOMB_SHIFT (26U)
+#define I2S_RCR4_FCOMB(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCOMB_SHIFT)) & I2S_RCR4_FCOMB_MASK)
+#define I2S_RCR4_FCONT_MASK  (0x10000000U)
+#define I2S_RCR4_FCONT_SHIFT (28U)
+#define I2S_RCR4_FCONT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
 /*! @} */
 
 /*! @name RCR5 - SAI Receive Configuration 5 Register */
 /*! @{ */
-#define I2S_RCR5_FBT_MASK                        (0x1F00U)
-#define I2S_RCR5_FBT_SHIFT                       (8U)
-#define I2S_RCR5_FBT(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_FBT_SHIFT)) & I2S_RCR5_FBT_MASK)
-#define I2S_RCR5_W0W_MASK                        (0x1F0000U)
-#define I2S_RCR5_W0W_SHIFT                       (16U)
-#define I2S_RCR5_W0W(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_W0W_SHIFT)) & I2S_RCR5_W0W_MASK)
-#define I2S_RCR5_WNW_MASK                        (0x1F000000U)
-#define I2S_RCR5_WNW_SHIFT                       (24U)
-#define I2S_RCR5_WNW(x)                          (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_WNW_SHIFT)) & I2S_RCR5_WNW_MASK)
+#define I2S_RCR5_FBT_MASK  (0x1F00U)
+#define I2S_RCR5_FBT_SHIFT (8U)
+#define I2S_RCR5_FBT(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_FBT_SHIFT)) & I2S_RCR5_FBT_MASK)
+#define I2S_RCR5_W0W_MASK  (0x1F0000U)
+#define I2S_RCR5_W0W_SHIFT (16U)
+#define I2S_RCR5_W0W(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_W0W_SHIFT)) & I2S_RCR5_W0W_MASK)
+#define I2S_RCR5_WNW_MASK  (0x1F000000U)
+#define I2S_RCR5_WNW_SHIFT (24U)
+#define I2S_RCR5_WNW(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RCR5_WNW_SHIFT)) & I2S_RCR5_WNW_MASK)
 /*! @} */
 
 /*! @name RDR - SAI Receive Data Register */
 /*! @{ */
-#define I2S_RDR_RDR_MASK                         (0xFFFFFFFFU)
-#define I2S_RDR_RDR_SHIFT                        (0U)
-#define I2S_RDR_RDR(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RDR_RDR_SHIFT)) & I2S_RDR_RDR_MASK)
+#define I2S_RDR_RDR_MASK  (0xFFFFFFFFU)
+#define I2S_RDR_RDR_SHIFT (0U)
+#define I2S_RDR_RDR(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RDR_RDR_SHIFT)) & I2S_RDR_RDR_MASK)
 /*! @} */
 
 /* The count of I2S_RDR */
-#define I2S_RDR_COUNT                            (4U)
+#define I2S_RDR_COUNT (4U)
 
 /*! @name RFR - SAI Receive FIFO Register */
 /*! @{ */
-#define I2S_RFR_RFP_MASK                         (0x3FU)
-#define I2S_RFR_RFP_SHIFT                        (0U)
-#define I2S_RFR_RFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RFP_SHIFT)) & I2S_RFR_RFP_MASK)
-#define I2S_RFR_RCP_MASK                         (0x8000U)
-#define I2S_RFR_RCP_SHIFT                        (15U)
-#define I2S_RFR_RCP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RCP_SHIFT)) & I2S_RFR_RCP_MASK)
-#define I2S_RFR_WFP_MASK                         (0x3F0000U)
-#define I2S_RFR_WFP_SHIFT                        (16U)
-#define I2S_RFR_WFP(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RFR_WFP_SHIFT)) & I2S_RFR_WFP_MASK)
+#define I2S_RFR_RFP_MASK  (0x3FU)
+#define I2S_RFR_RFP_SHIFT (0U)
+#define I2S_RFR_RFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RFP_SHIFT)) & I2S_RFR_RFP_MASK)
+#define I2S_RFR_RCP_MASK  (0x8000U)
+#define I2S_RFR_RCP_SHIFT (15U)
+#define I2S_RFR_RCP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_RCP_SHIFT)) & I2S_RFR_RCP_MASK)
+#define I2S_RFR_WFP_MASK  (0x3F0000U)
+#define I2S_RFR_WFP_SHIFT (16U)
+#define I2S_RFR_WFP(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RFR_WFP_SHIFT)) & I2S_RFR_WFP_MASK)
 /*! @} */
 
 /* The count of I2S_RFR */
-#define I2S_RFR_COUNT                            (4U)
+#define I2S_RFR_COUNT (4U)
 
 /*! @name RMR - SAI Receive Mask Register */
 /*! @{ */
-#define I2S_RMR_RWM_MASK                         (0xFFFFFFFFU)
-#define I2S_RMR_RWM_SHIFT                        (0U)
-#define I2S_RMR_RWM(x)                           (((uint32_t)(((uint32_t)(x)) << I2S_RMR_RWM_SHIFT)) & I2S_RMR_RWM_MASK)
+#define I2S_RMR_RWM_MASK  (0xFFFFFFFFU)
+#define I2S_RMR_RWM_SHIFT (0U)
+#define I2S_RMR_RWM(x)    (((uint32_t)(((uint32_t)(x)) << I2S_RMR_RWM_SHIFT)) & I2S_RMR_RWM_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group I2S_Register_Masks */
 
-
 /* I2S - Peripheral instance base addresses */
 /** Peripheral SAI1 base address */
-#define SAI1_BASE                                (0x40384000u)
+#define SAI1_BASE (0x40384000u)
 /** Peripheral SAI1 base pointer */
-#define SAI1                                     ((I2S_Type *)SAI1_BASE)
+#define SAI1 ((I2S_Type *)SAI1_BASE)
 /** Peripheral SAI2 base address */
-#define SAI2_BASE                                (0x40388000u)
+#define SAI2_BASE (0x40388000u)
 /** Peripheral SAI2 base pointer */
-#define SAI2                                     ((I2S_Type *)SAI2_BASE)
+#define SAI2 ((I2S_Type *)SAI2_BASE)
 /** Peripheral SAI3 base address */
-#define SAI3_BASE                                (0x4038C000u)
+#define SAI3_BASE (0x4038C000u)
 /** Peripheral SAI3 base pointer */
-#define SAI3                                     ((I2S_Type *)SAI3_BASE)
+#define SAI3 ((I2S_Type *)SAI3_BASE)
 /** Array initializer of I2S peripheral base addresses */
-#define I2S_BASE_ADDRS                           { 0u, SAI1_BASE, SAI2_BASE, SAI3_BASE }
+#define I2S_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, SAI1_BASE, SAI2_BASE, SAI3_BASE                                                                            \
+    }
 /** Array initializer of I2S peripheral base pointers */
-#define I2S_BASE_PTRS                            { (I2S_Type *)0u, SAI1, SAI2, SAI3 }
+#define I2S_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (I2S_Type *)0u, SAI1, SAI2, SAI3                                                                               \
+    }
 /** Interrupt vectors for the I2S peripheral type */
-#define I2S_RX_IRQS                              { NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_RX_IRQn }
-#define I2S_TX_IRQS                              { NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_TX_IRQn }
+#define I2S_RX_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_RX_IRQn                                                              \
+    }
+#define I2S_TX_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, SAI1_IRQn, SAI2_IRQn, SAI3_TX_IRQn                                                              \
+    }
 
 /*!
  * @}
  */ /* end of group I2S_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -12385,11 +14075,17 @@ typedef struct {
  */
 
 /** IOMUXC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[20];
-  __IO uint32_t SW_MUX_CTL_PAD[124];               /**< SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register, array offset: 0x14, array step: 0x4 */
-  __IO uint32_t SW_PAD_CTL_PAD[124];               /**< SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register, array offset: 0x204, array step: 0x4 */
-  __IO uint32_t SELECT_INPUT[154];                 /**< ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY Register, array offset: 0x3F4, array step: 0x4 */
+typedef struct
+{
+    uint8_t RESERVED_0[20];
+    __IO uint32_t
+        SW_MUX_CTL_PAD[124]; /**< SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW
+                                MUX Control Register, array offset: 0x14, array step: 0x4 */
+    __IO uint32_t
+        SW_PAD_CTL_PAD[124]; /**< SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW
+                                PAD Control Register, array offset: 0x204, array step: 0x4 */
+    __IO uint32_t SELECT_INPUT[154]; /**< ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY
+                                        Register, array offset: 0x3F4, array step: 0x4 */
 } IOMUXC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -12401,81 +14097,100 @@ typedef struct {
  * @{
  */
 
-/*! @name SW_MUX_CTL_PAD - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register */
+/*! @name SW_MUX_CTL_PAD - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX
+ * Control Register */
 /*! @{ */
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK      (0x7U)
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT     (0U)
-#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK)
-#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK          (0x10U)
-#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT         (4U)
-#define IOMUXC_SW_MUX_CTL_PAD_SION(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK  (0x7U)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U)
+#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK)
+#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK  (0x10U)
+#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U)
+#define IOMUXC_SW_MUX_CTL_PAD_SION(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK)
 /*! @} */
 
 /* The count of IOMUXC_SW_MUX_CTL_PAD */
-#define IOMUXC_SW_MUX_CTL_PAD_COUNT              (124U)
+#define IOMUXC_SW_MUX_CTL_PAD_COUNT (124U)
 
-/*! @name SW_PAD_CTL_PAD - SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register */
+/*! @name SW_PAD_CTL_PAD - SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register..SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD
+ * Control Register */
 /*! @{ */
-#define IOMUXC_SW_PAD_CTL_PAD_SRE_MASK           (0x1U)
-#define IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT          (0U)
-#define IOMUXC_SW_PAD_CTL_PAD_SRE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SRE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE_MASK           (0x38U)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT          (3U)
-#define IOMUXC_SW_PAD_CTL_PAD_DSE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_DSE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK         (0xC0U)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT        (6U)
-#define IOMUXC_SW_PAD_CTL_PAD_SPEED(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE_MASK           (0x800U)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT          (11U)
-#define IOMUXC_SW_PAD_CTL_PAD_ODE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_ODE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE_MASK           (0x1000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT          (12U)
-#define IOMUXC_SW_PAD_CTL_PAD_PKE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PKE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK           (0x2000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT          (13U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUE(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUE_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS_MASK           (0xC000U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT          (14U)
-#define IOMUXC_SW_PAD_CTL_PAD_PUS(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUS_MASK)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS_MASK           (0x10000U)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT          (16U)
-#define IOMUXC_SW_PAD_CTL_PAD_HYS(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_HYS_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE_MASK  (0x1U)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT (0U)
+#define IOMUXC_SW_PAD_CTL_PAD_SRE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SRE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE_MASK  (0x38U)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT (3U)
+#define IOMUXC_SW_PAD_CTL_PAD_DSE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_DSE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK  (0xC0U)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT (6U)
+#define IOMUXC_SW_PAD_CTL_PAD_SPEED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE_MASK  (0x800U)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT (11U)
+#define IOMUXC_SW_PAD_CTL_PAD_ODE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_ODE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE_MASK  (0x1000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT (12U)
+#define IOMUXC_SW_PAD_CTL_PAD_PKE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PKE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK  (0x2000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT (13U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUE_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS_MASK  (0xC000U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT (14U)
+#define IOMUXC_SW_PAD_CTL_PAD_PUS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUS_MASK)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS_MASK  (0x10000U)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT (16U)
+#define IOMUXC_SW_PAD_CTL_PAD_HYS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_HYS_MASK)
 /*! @} */
 
 /* The count of IOMUXC_SW_PAD_CTL_PAD */
-#define IOMUXC_SW_PAD_CTL_PAD_COUNT              (124U)
+#define IOMUXC_SW_PAD_CTL_PAD_COUNT (124U)
 
 /*! @name SELECT_INPUT - ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY Register */
 /*! @{ */
-#define IOMUXC_SELECT_INPUT_DAISY_MASK           (0x7U)  /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
-#define IOMUXC_SELECT_INPUT_DAISY_SHIFT          (0U)
-#define IOMUXC_SELECT_INPUT_DAISY(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) & IOMUXC_SELECT_INPUT_DAISY_MASK)  /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
+#define IOMUXC_SELECT_INPUT_DAISY_MASK                                                                                 \
+    (0x7U) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */
+#define IOMUXC_SELECT_INPUT_DAISY_SHIFT (0U)
+#define IOMUXC_SELECT_INPUT_DAISY(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) &                                                \
+     IOMUXC_SELECT_INPUT_DAISY_MASK) /* Merged from fields with different position or width, of widths (1, 2, 3),      \
+                                        largest definition used */
 /*! @} */
 
 /* The count of IOMUXC_SELECT_INPUT */
-#define IOMUXC_SELECT_INPUT_COUNT                (154U)
-
+#define IOMUXC_SELECT_INPUT_COUNT (154U)
 
 /*!
  * @}
  */ /* end of group IOMUXC_Register_Masks */
 
-
 /* IOMUXC - Peripheral instance base addresses */
 /** Peripheral IOMUXC base address */
-#define IOMUXC_BASE                              (0x401F8000u)
+#define IOMUXC_BASE (0x401F8000u)
 /** Peripheral IOMUXC base pointer */
-#define IOMUXC                                   ((IOMUXC_Type *)IOMUXC_BASE)
+#define IOMUXC ((IOMUXC_Type *)IOMUXC_BASE)
 /** Array initializer of IOMUXC peripheral base addresses */
-#define IOMUXC_BASE_ADDRS                        { IOMUXC_BASE }
+#define IOMUXC_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        IOMUXC_BASE                                                                                                    \
+    }
 /** Array initializer of IOMUXC peripheral base pointers */
-#define IOMUXC_BASE_PTRS                         { IOMUXC }
+#define IOMUXC_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        IOMUXC                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_GPR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -12486,33 +14201,34 @@ typedef struct {
  */
 
 /** IOMUXC_GPR - Register Layout Typedef */
-typedef struct {
-       uint32_t GPR0;                              /**< GPR0 General Purpose Register, offset: 0x0 */
-  __IO uint32_t GPR1;                              /**< GPR1 General Purpose Register, offset: 0x4 */
-  __IO uint32_t GPR2;                              /**< GPR2 General Purpose Register, offset: 0x8 */
-  __IO uint32_t GPR3;                              /**< GPR3 General Purpose Register, offset: 0xC */
-  __IO uint32_t GPR4;                              /**< GPR4 General Purpose Register, offset: 0x10 */
-  __IO uint32_t GPR5;                              /**< GPR5 General Purpose Register, offset: 0x14 */
-  __IO uint32_t GPR6;                              /**< GPR6 General Purpose Register, offset: 0x18 */
-  __IO uint32_t GPR7;                              /**< GPR7 General Purpose Register, offset: 0x1C */
-  __IO uint32_t GPR8;                              /**< GPR8 General Purpose Register, offset: 0x20 */
-       uint32_t GPR9;                              /**< GPR9 General Purpose Register, offset: 0x24 */
-  __IO uint32_t GPR10;                             /**< GPR10 General Purpose Register, offset: 0x28 */
-  __IO uint32_t GPR11;                             /**< GPR11 General Purpose Register, offset: 0x2C */
-  __IO uint32_t GPR12;                             /**< GPR12 General Purpose Register, offset: 0x30 */
-  __IO uint32_t GPR13;                             /**< GPR13 General Purpose Register, offset: 0x34 */
-  __IO uint32_t GPR14;                             /**< GPR14 General Purpose Register, offset: 0x38 */
-       uint32_t GPR15;                             /**< GPR15 General Purpose Register, offset: 0x3C */
-  __IO uint32_t GPR16;                             /**< GPR16 General Purpose Register, offset: 0x40 */
-  __IO uint32_t GPR17;                             /**< GPR17 General Purpose Register, offset: 0x44 */
-  __IO uint32_t GPR18;                             /**< GPR18 General Purpose Register, offset: 0x48 */
-  __IO uint32_t GPR19;                             /**< GPR19 General Purpose Register, offset: 0x4C */
-  __IO uint32_t GPR20;                             /**< GPR20 General Purpose Register, offset: 0x50 */
-  __IO uint32_t GPR21;                             /**< GPR21 General Purpose Register, offset: 0x54 */
-  __IO uint32_t GPR22;                             /**< GPR22 General Purpose Register, offset: 0x58 */
-  __IO uint32_t GPR23;                             /**< GPR23 General Purpose Register, offset: 0x5C */
-  __IO uint32_t GPR24;                             /**< GPR24 General Purpose Register, offset: 0x60 */
-  __IO uint32_t GPR25;                             /**< GPR25 General Purpose Register, offset: 0x64 */
+typedef struct
+{
+    uint32_t GPR0;       /**< GPR0 General Purpose Register, offset: 0x0 */
+    __IO uint32_t GPR1;  /**< GPR1 General Purpose Register, offset: 0x4 */
+    __IO uint32_t GPR2;  /**< GPR2 General Purpose Register, offset: 0x8 */
+    __IO uint32_t GPR3;  /**< GPR3 General Purpose Register, offset: 0xC */
+    __IO uint32_t GPR4;  /**< GPR4 General Purpose Register, offset: 0x10 */
+    __IO uint32_t GPR5;  /**< GPR5 General Purpose Register, offset: 0x14 */
+    __IO uint32_t GPR6;  /**< GPR6 General Purpose Register, offset: 0x18 */
+    __IO uint32_t GPR7;  /**< GPR7 General Purpose Register, offset: 0x1C */
+    __IO uint32_t GPR8;  /**< GPR8 General Purpose Register, offset: 0x20 */
+    uint32_t GPR9;       /**< GPR9 General Purpose Register, offset: 0x24 */
+    __IO uint32_t GPR10; /**< GPR10 General Purpose Register, offset: 0x28 */
+    __IO uint32_t GPR11; /**< GPR11 General Purpose Register, offset: 0x2C */
+    __IO uint32_t GPR12; /**< GPR12 General Purpose Register, offset: 0x30 */
+    __IO uint32_t GPR13; /**< GPR13 General Purpose Register, offset: 0x34 */
+    __IO uint32_t GPR14; /**< GPR14 General Purpose Register, offset: 0x38 */
+    uint32_t GPR15;      /**< GPR15 General Purpose Register, offset: 0x3C */
+    __IO uint32_t GPR16; /**< GPR16 General Purpose Register, offset: 0x40 */
+    __IO uint32_t GPR17; /**< GPR17 General Purpose Register, offset: 0x44 */
+    __IO uint32_t GPR18; /**< GPR18 General Purpose Register, offset: 0x48 */
+    __IO uint32_t GPR19; /**< GPR19 General Purpose Register, offset: 0x4C */
+    __IO uint32_t GPR20; /**< GPR20 General Purpose Register, offset: 0x50 */
+    __IO uint32_t GPR21; /**< GPR21 General Purpose Register, offset: 0x54 */
+    __IO uint32_t GPR22; /**< GPR22 General Purpose Register, offset: 0x58 */
+    __IO uint32_t GPR23; /**< GPR23 General Purpose Register, offset: 0x5C */
+    __IO uint32_t GPR24; /**< GPR24 General Purpose Register, offset: 0x60 */
+    __IO uint32_t GPR25; /**< GPR25 General Purpose Register, offset: 0x64 */
 } IOMUXC_GPR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -12526,783 +14242,1098 @@ typedef struct {
 
 /*! @name GPR1 - GPR1 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK      (0x7U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT     (0U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK      (0x38U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT     (3U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK      (0xC0U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT     (6U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK      (0x300U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT     (8U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK      (0xC00U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT     (10U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK)
-#define IOMUXC_GPR_GPR1_GINT_MASK                (0x1000U)
-#define IOMUXC_GPR_GPR1_GINT_SHIFT               (12U)
-#define IOMUXC_GPR_GPR1_GINT(x)                  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_GINT_SHIFT)) & IOMUXC_GPR_GPR1_GINT_MASK)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK       (0x2000U)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT      (13U)
-#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK        (0x8000U)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT       (15U)
-#define IOMUXC_GPR_GPR1_USB_EXP_MODE(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT)) & IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK    (0x20000U)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT   (17U)
-#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK       (0x80000U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT      (19U)
-#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK       (0x100000U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT      (20U)
-#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK       (0x200000U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT      (21U)
-#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK)
-#define IOMUXC_GPR_GPR1_EXC_MON_MASK             (0x400000U)
-#define IOMUXC_GPR_GPR1_EXC_MON_SHIFT            (22U)
-#define IOMUXC_GPR_GPR1_EXC_MON(x)               (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_EXC_MON_SHIFT)) & IOMUXC_GPR_GPR1_EXC_MON_MASK)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK   (0x800000U)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT  (23U)
-#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT)) & IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK   (0x80000000U)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT  (31U)
-#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT)) & IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK  (0x7U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT (0U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK  (0x38U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT (3U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK  (0xC0U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT (6U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK  (0x300U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT (8U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK  (0xC00U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT (10U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK)
+#define IOMUXC_GPR_GPR1_GINT_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR1_GINT_SHIFT (12U)
+#define IOMUXC_GPR_GPR1_GINT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_GINT_SHIFT)) & IOMUXC_GPR_GPR1_GINT_MASK)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT (13U)
+#define IOMUXC_GPR_GPR1_ENET1_CLK_SEL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_CLK_SEL_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT (15U)
+#define IOMUXC_GPR_GPR1_USB_EXP_MODE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_USB_EXP_MODE_SHIFT)) & IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT (17U)
+#define IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT (19U)
+#define IOMUXC_GPR_GPR1_SAI1_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT (20U)
+#define IOMUXC_GPR_GPR1_SAI2_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT (21U)
+#define IOMUXC_GPR_GPR1_SAI3_MCLK_DIR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_SHIFT)) & IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK)
+#define IOMUXC_GPR_GPR1_EXC_MON_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR1_EXC_MON_SHIFT (22U)
+#define IOMUXC_GPR_GPR1_EXC_MON(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_EXC_MON_SHIFT)) & IOMUXC_GPR_GPR1_EXC_MON_MASK)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT (23U)
+#define IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_SHIFT)) & IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT (31U)
+#define IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_SHIFT)) & IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK)
 /*! @} */
 
 /*! @name GPR2 - GPR2 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK (0x1000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT (12U)
-#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK    (0x4000U)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT   (14U)
-#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK         (0xFF0000U)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT        (16U)
-#define IOMUXC_GPR_GPR2_MQS_CLK_DIV(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT)) & IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST_MASK          (0x1000000U)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT         (24U)
-#define IOMUXC_GPR_GPR2_MQS_SW_RST(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT)) & IOMUXC_GPR_GPR2_MQS_SW_RST_MASK)
-#define IOMUXC_GPR_GPR2_MQS_EN_MASK              (0x2000000U)
-#define IOMUXC_GPR_GPR2_MQS_EN_SHIFT             (25U)
-#define IOMUXC_GPR_GPR2_MQS_EN(x)                (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_EN_SHIFT)) & IOMUXC_GPR_GPR2_MQS_EN_MASK)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK      (0x4000000U)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT     (26U)
-#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT)) & IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR2_L2_MEM_EN_POWERSAVING_MASK)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK  (0x4000U)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT (14U)
+#define IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_SHIFT)) & IOMUXC_GPR_GPR2_L2_MEM_DEEPSLEEP_MASK)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK  (0xFF0000U)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT (16U)
+#define IOMUXC_GPR_GPR2_MQS_CLK_DIV(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_CLK_DIV_SHIFT)) & IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT (24U)
+#define IOMUXC_GPR_GPR2_MQS_SW_RST(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_SW_RST_SHIFT)) & IOMUXC_GPR_GPR2_MQS_SW_RST_MASK)
+#define IOMUXC_GPR_GPR2_MQS_EN_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR2_MQS_EN_SHIFT (25U)
+#define IOMUXC_GPR_GPR2_MQS_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_EN_SHIFT)) & IOMUXC_GPR_GPR2_MQS_EN_MASK)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT (26U)
+#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_SHIFT)) & IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT (28U)
-#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK (0x20000000U)
+#define IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER1_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK  (0x20000000U)
 #define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT (29U)
-#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER2_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT (30U)
-#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK)
-#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK (0x80000000U)
+#define IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER3_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK  (0x80000000U)
 #define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT (31U)
-#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT)) & IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK)
+#define IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR2_QTIMER4_TMR_CNTS_FREEZE_MASK)
 /*! @} */
 
 /*! @name GPR3 - GPR3 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR3_OCRAM_CTL_MASK           (0xFU)
-#define IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT          (0U)
-#define IOMUXC_GPR_GPR3_OCRAM_CTL(x)             (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_CTL_MASK)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK         (0x10U)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT        (4U)
-#define IOMUXC_GPR_GPR3_DCP_KEY_SEL(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT)) & IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK        (0xF0000U)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT       (16U)
-#define IOMUXC_GPR_GPR3_OCRAM_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL_MASK  (0xFU)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT (0U)
+#define IOMUXC_GPR_GPR3_OCRAM_CTL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_CTL_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_CTL_MASK)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK  (0x10U)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT (4U)
+#define IOMUXC_GPR_GPR3_DCP_KEY_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_DCP_KEY_SEL_SHIFT)) & IOMUXC_GPR_GPR3_DCP_KEY_SEL_MASK)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK  (0xF0000U)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT (16U)
+#define IOMUXC_GPR_GPR3_OCRAM_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR3_OCRAM_STATUS_SHIFT)) & IOMUXC_GPR_GPR3_OCRAM_STATUS_MASK)
 /*! @} */
 
 /*! @name GPR4 - GPR4 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK       (0x1U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT      (0U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK       (0x2U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT      (1U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK       (0x4U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT      (2U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK       (0x8U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT      (3U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK       (0x10U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT      (4U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK       (0x20U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT      (5U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK       (0x40U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT      (6U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK       (0x80U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT      (7U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK       (0x200U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT      (9U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK        (0x400U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT       (10U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_REQ(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK    (0x800U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT   (11U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK    (0x1000U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT   (12U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK    (0x2000U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT   (13U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK       (0x10000U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT      (16U)
-#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK       (0x20000U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT      (17U)
-#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK       (0x40000U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT      (18U)
-#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK       (0x80000U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT      (19U)
-#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK       (0x100000U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT      (20U)
-#define IOMUXC_GPR_GPR4_ENET_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK       (0x200000U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT      (21U)
-#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK       (0x400000U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT      (22U)
-#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK       (0x800000U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT      (23U)
-#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK       (0x2000000U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT      (25U)
-#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK        (0x4000000U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT       (26U)
-#define IOMUXC_GPR_GPR4_PIT_STOP_ACK(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT   (27U)
-#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT   (28U)
-#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT   (29U)
-#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK  (0x1U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT (0U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK  (0x2U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT (1U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK  (0x4U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT (2U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK  (0x8U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT (3U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK  (0x10U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT (4U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK  (0x20U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT (5U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK  (0x40U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT (6U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK  (0x80U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT (7U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK  (0x200U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT (9U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_REQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK  (0x400U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT (10U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_REQ(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK  (0x800U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT (11U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT (12U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT (13U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT (16U)
+#define IOMUXC_GPR_GPR4_EDMA_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_EDMA_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_EDMA_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT (17U)
+#define IOMUXC_GPR_GPR4_CAN1_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK  (0x40000U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT (18U)
+#define IOMUXC_GPR_GPR4_CAN2_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_CAN2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_CAN2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT (19U)
+#define IOMUXC_GPR_GPR4_TRNG_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_TRNG_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_TRNG_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT (20U)
+#define IOMUXC_GPR_GPR4_ENET_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_ENET_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_ENET_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT (21U)
+#define IOMUXC_GPR_GPR4_SAI1_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT (22U)
+#define IOMUXC_GPR_GPR4_SAI2_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT (23U)
+#define IOMUXC_GPR_GPR4_SAI3_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SAI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SAI3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT (25U)
+#define IOMUXC_GPR_GPR4_SEMC_STOP_ACK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_SEMC_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_SEMC_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT (26U)
+#define IOMUXC_GPR_GPR4_PIT_STOP_ACK(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_PIT_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_PIT_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT (27U)
+#define IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXSPI_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT (28U)
+#define IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT (29U)
+#define IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR4_FLEXIO2_STOP_ACK_MASK)
 /*! @} */
 
 /*! @name GPR5 - GPR5 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR5_WDOG1_MASK_MASK          (0x40U)
-#define IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT         (6U)
-#define IOMUXC_GPR_GPR5_WDOG1_MASK(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG1_MASK_MASK)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK_MASK          (0x80U)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT         (7U)
-#define IOMUXC_GPR_GPR5_WDOG2_MASK(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG2_MASK_MASK)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK     (0x800000U)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT    (23U)
-#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT)) & IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK   (0x2000000U)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT  (25U)
-#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT)) & IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT   (28U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT   (29U)
-#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK_MASK  (0x40U)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT (6U)
+#define IOMUXC_GPR_GPR5_WDOG1_MASK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG1_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG1_MASK_MASK)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK_MASK  (0x80U)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT (7U)
+#define IOMUXC_GPR_GPR5_WDOG2_MASK(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_WDOG2_MASK_SHIFT)) & IOMUXC_GPR_GPR5_WDOG2_MASK_MASK)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT (23U)
+#define IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_SHIFT)) & IOMUXC_GPR_GPR5_GPT2_CAPIN1_SEL_MASK)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT (25U)
+#define IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_SHIFT)) & IOMUXC_GPR_GPR5_ENET_EVENT3IN_SEL_MASK)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT (28U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT (29U)
+#define IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_SHIFT)) & IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK)
 /*! @} */
 
 /*! @name GPR6 - GPR6 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK (0x1U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK  (0x1U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT (0U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK (0x2U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK  (0x2U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT (1U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK (0x4U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK  (0x4U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT (2U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK (0x8U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK  (0x8U)
 #define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT (3U)
-#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK (0x10U)
+#define IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK  (0x10U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT (4U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK (0x20U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK  (0x20U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT (5U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK (0x40U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK  (0x40U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT (6U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK (0x80U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK  (0x80U)
 #define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT (7U)
-#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK (0x100U)
+#define IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER2_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK  (0x100U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT (8U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK (0x200U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK  (0x200U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT (9U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK (0x400U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK  (0x400U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT (10U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK (0x800U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK  (0x800U)
 #define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT (11U)
-#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK (0x1000U)
+#define IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER3_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT (12U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK (0x2000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK  (0x2000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT (13U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK (0x4000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK  (0x4000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT (14U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK (0x8000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK  (0x8000U)
 #define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT (15U)
-#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT)) & IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK (0x10000U)
+#define IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK  (0x10000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT (16U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK (0x20000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK  (0x20000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT (17U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK (0x40000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT (18U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK (0x80000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK  (0x80000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT (19U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK (0x100000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT (20U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK (0x200000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK  (0x200000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT (21U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK (0x400000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK  (0x400000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT (22U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK (0x800000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK  (0x800000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT (23U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK (0x1000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK  (0x1000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT (24U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK (0x2000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK  (0x2000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT (25U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK (0x4000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_13_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK  (0x4000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT (26U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK (0x8000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK  (0x8000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT (27U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT (28U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK (0x20000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK  (0x20000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT (29U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT (30U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK (0x80000000U)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK  (0x80000000U)
 #define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT (31U)
-#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT)) & IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK)
+#define IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK)
 /*! @} */
 
 /*! @name GPR7 - GPR7 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK     (0x1U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT    (0U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK     (0x2U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT    (1U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK     (0x4U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT    (2U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK     (0x8U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT    (3U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK     (0x10U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT    (4U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK     (0x20U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT    (5U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK     (0x40U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT    (6U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK     (0x80U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT    (7U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK    (0x100U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT   (8U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK    (0x200U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT   (9U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK    (0x400U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT   (10U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK    (0x800U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT   (11U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK    (0x1000U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT   (12U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK    (0x2000U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT   (13U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK    (0x4000U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT   (14U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK    (0x8000U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT   (15U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK     (0x10000U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT    (16U)
-#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK     (0x20000U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT    (17U)
-#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK     (0x40000U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT    (18U)
-#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK     (0x80000U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT    (19U)
-#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK     (0x100000U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT    (20U)
-#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK     (0x200000U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT    (21U)
-#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK     (0x400000U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT    (22U)
-#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK     (0x800000U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT    (23U)
-#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK    (0x1000000U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT   (24U)
-#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK    (0x2000000U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT   (25U)
-#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK    (0x4000000U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT   (26U)
-#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT   (27U)
-#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK    (0x10000000U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT   (28U)
-#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT   (29U)
-#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK    (0x40000000U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT   (30U)
-#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK    (0x80000000U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT   (31U)
-#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK  (0x1U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT (0U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK  (0x2U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT (1U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK  (0x4U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT (2U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK  (0x8U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT (3U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK  (0x10U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT (4U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK  (0x20U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT (5U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK  (0x40U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT (6U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK  (0x80U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT (7U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK  (0x100U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT (8U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK  (0x200U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT (9U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK  (0x400U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT (10U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK  (0x800U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT (11U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK  (0x1000U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT (12U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT (13U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK  (0x4000U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT (14U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT (15U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_REQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_REQ_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT (16U)
+#define IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT (17U)
+#define IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK  (0x40000U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT (18U)
+#define IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT (19U)
+#define IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPI2C4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK  (0x100000U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT (20U)
+#define IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT (21U)
+#define IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK  (0x400000U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT (22U)
+#define IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT (23U)
+#define IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPSPI4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT (24U)
+#define IOMUXC_GPR_GPR7_LPUART1_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART1_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT (25U)
+#define IOMUXC_GPR_GPR7_LPUART2_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART2_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK  (0x4000000U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT (26U)
+#define IOMUXC_GPR_GPR7_LPUART3_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART3_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT (27U)
+#define IOMUXC_GPR_GPR7_LPUART4_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART4_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK  (0x10000000U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT (28U)
+#define IOMUXC_GPR_GPR7_LPUART5_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART5_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT (29U)
+#define IOMUXC_GPR_GPR7_LPUART6_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART6_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK  (0x40000000U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT (30U)
+#define IOMUXC_GPR_GPR7_LPUART7_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART7_STOP_ACK_MASK)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT (31U)
+#define IOMUXC_GPR_GPR7_LPUART8_STOP_ACK(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_SHIFT)) & IOMUXC_GPR_GPR7_LPUART8_STOP_ACK_MASK)
 /*! @} */
 
 /*! @name GPR8 - GPR8 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK (0x1U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK  (0x1U)
 #define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT (0U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK     (0x2U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT    (1U)
-#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK (0x4U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK  (0x2U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT (1U)
+#define IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK  (0x4U)
 #define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT (2U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK     (0x8U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT    (3U)
-#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK (0x10U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK  (0x8U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT (3U)
+#define IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK  (0x10U)
 #define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT (4U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK     (0x20U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT    (5U)
-#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK (0x40U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK  (0x20U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT (5U)
+#define IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK  (0x40U)
 #define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT (6U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK     (0x80U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT    (7U)
-#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK (0x100U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPI2C4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK  (0x80U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT (7U)
+#define IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPI2C4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK  (0x100U)
 #define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT (8U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK     (0x200U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT    (9U)
-#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK (0x400U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK  (0x200U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT (9U)
+#define IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK  (0x400U)
 #define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT (10U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK     (0x800U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT    (11U)
-#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK (0x1000U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK  (0x800U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT (11U)
+#define IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK  (0x1000U)
 #define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT (12U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK     (0x2000U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT    (13U)
-#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK (0x4000U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT (13U)
+#define IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK  (0x4000U)
 #define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT (14U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK     (0x8000U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT    (15U)
-#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE(x)       (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK (0x10000U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_SHIFT)) &                                     \
+     IOMUXC_GPR_GPR8_LPSPI4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK  (0x8000U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT (15U)
+#define IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPSPI4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK  (0x10000U)
 #define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT (16U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK    (0x20000U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT   (17U)
-#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK (0x40000U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT (17U)
+#define IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT (18U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK    (0x80000U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT   (19U)
-#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK (0x100000U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK  (0x80000U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT (19U)
+#define IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT (20U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK    (0x200000U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT   (21U)
-#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK (0x400000U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART3_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK  (0x200000U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT (21U)
+#define IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART3_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK  (0x400000U)
 #define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT (22U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK    (0x800000U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT   (23U)
-#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK (0x1000000U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART4_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK  (0x800000U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT (23U)
+#define IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART4_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK  (0x1000000U)
 #define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT (24U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK    (0x2000000U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT   (25U)
-#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK (0x4000000U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART5_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK  (0x2000000U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT (25U)
+#define IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART5_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK  (0x4000000U)
 #define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT (26U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK    (0x8000000U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT   (27U)
-#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK (0x10000000U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART6_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK  (0x8000000U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT (27U)
+#define IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART6_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK  (0x10000000U)
 #define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT (28U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK    (0x20000000U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT   (29U)
-#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK (0x40000000U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART7_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK  (0x20000000U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT (29U)
+#define IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART7_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK  (0x40000000U)
 #define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT (30U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK    (0x80000000U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT   (31U)
-#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE(x)      (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR8_LPUART8_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK  (0x80000000U)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT (31U)
+#define IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR8_LPUART8_IPG_DOZE_MASK)
 /*! @} */
 
 /*! @name GPR10 - GPR10 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR10_NIDEN_MASK              (0x1U)
-#define IOMUXC_GPR_GPR10_NIDEN_SHIFT             (0U)
-#define IOMUXC_GPR_GPR10_NIDEN(x)                (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_NIDEN_MASK)
-#define IOMUXC_GPR_GPR10_DBG_EN_MASK             (0x2U)
-#define IOMUXC_GPR_GPR10_DBG_EN_SHIFT            (1U)
-#define IOMUXC_GPR_GPR10_DBG_EN(x)               (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_DBG_EN_MASK)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK       (0x4U)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT      (2U)
-#define IOMUXC_GPR_GPR10_SEC_ERR_RESP(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK)
-#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK (0x10U)
+#define IOMUXC_GPR_GPR10_NIDEN_MASK  (0x1U)
+#define IOMUXC_GPR_GPR10_NIDEN_SHIFT (0U)
+#define IOMUXC_GPR_GPR10_NIDEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_NIDEN_MASK)
+#define IOMUXC_GPR_GPR10_DBG_EN_MASK  (0x2U)
+#define IOMUXC_GPR_GPR10_DBG_EN_SHIFT (1U)
+#define IOMUXC_GPR_GPR10_DBG_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_DBG_EN_MASK)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK  (0x4U)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT (2U)
+#define IOMUXC_GPR_GPR10_SEC_ERR_RESP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_SEC_ERR_RESP_MASK)
+#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK  (0x10U)
 #define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT (4U)
-#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) & IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK        (0x100U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT       (8U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK      (0xFE00U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT     (9U)
-#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK         (0x10000U)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT        (16U)
-#define IOMUXC_GPR_GPR10_LOCK_NIDEN(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK        (0x20000U)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT       (17U)
-#define IOMUXC_GPR_GPR10_LOCK_DBG_EN(x)          (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK)
+#define IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR10_DCPKEY_OCOTP_OR_KEYMUX_MASK)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK  (0x100U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT (8U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_EN_MASK)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK  (0xFE00U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT (9U)
+#define IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_OCRAM_TZ_ADDR_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK  (0x10000U)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT (16U)
+#define IOMUXC_GPR_GPR10_LOCK_NIDEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_NIDEN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_NIDEN_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK  (0x20000U)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT (17U)
+#define IOMUXC_GPR_GPR10_LOCK_DBG_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DBG_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DBG_EN_MASK)
 #define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK  (0x40000U)
 #define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT (18U)
-#define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK (0x100000U)
+#define IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR10_LOCK_SEC_ERR_RESP_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK  (0x100000U)
 #define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT (20U)
-#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK   (0x1000000U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT  (24U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK (0xFE000000U)
+#define IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_SHIFT)) &                             \
+     IOMUXC_GPR_GPR10_LOCK_DCPKEY_OCOTP_OR_KEYMUX_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK  (0x1000000U)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT (24U)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_EN_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK  (0xFE000000U)
 #define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT (25U)
-#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT)) & IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK)
+#define IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_SHIFT)) &                                      \
+     IOMUXC_GPR_GPR10_LOCK_OCRAM_TZ_ADDR_MASK)
 /*! @} */
 
 /*! @name GPR11 - GPR11 General Purpose Register */
 /*! @{ */
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK  (0x3U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT (0U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R0_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK  (0xCU)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT (2U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R1_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK  (0x30U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT (4U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R2_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK  (0xC0U)
 #define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT (6U)
-#define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK       (0xF00U)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT      (8U)
-#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK (0x30000U)
+#define IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_M7_APC_AC_R3_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK  (0xF00U)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT (8U)
+#define IOMUXC_GPR_GPR11_BEE_DE_RX_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_BEE_DE_RX_EN_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK  (0x30000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT (16U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK (0xC0000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R0_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK  (0xC0000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT (18U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK (0x300000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R1_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK  (0x300000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT (20U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK (0xC00000U)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R2_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK  (0xC00000U)
 #define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT (22U)
-#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR11_LOCK_M7_APC_AC_R3_CTRL_MASK)
 #define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK  (0xF000000U)
 #define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT (24U)
-#define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT)) & IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK)
+#define IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_SHIFT)) &                                       \
+     IOMUXC_GPR_GPR11_LOCK_BEE_DE_RX_EN_MASK)
 /*! @} */
 
 /*! @name GPR12 - GPR12 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK (0x1U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK  (0x1U)
 #define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT (0U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK   (0x2U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT  (1U)
-#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK (0x4U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR12_FLEXIO1_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK  (0x2U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT (1U)
+#define IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO1_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK  (0x4U)
 #define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT (2U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK   (0x8U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT  (3U)
-#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK)
-#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK (0x10U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR12_FLEXIO2_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK  (0x8U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT (3U)
+#define IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_SHIFT)) & IOMUXC_GPR_GPR12_FLEXIO2_IPG_DOZE_MASK)
+#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK  (0x10U)
 #define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT (4U)
-#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT)) & IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK)
+#define IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_SHIFT)) &                                      \
+     IOMUXC_GPR_GPR12_ACMP_IPG_STOP_MODE_MASK)
 /*! @} */
 
 /*! @name GPR13 - GPR13 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK      (0x1U)
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT     (0U)
-#define IOMUXC_GPR_GPR13_ARCACHE_USDHC(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK      (0x2U)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT     (1U)
-#define IOMUXC_GPR_GPR13_AWCACHE_USDHC(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK)
-#define IOMUXC_GPR_GPR13_CACHE_ENET_MASK         (0x80U)
-#define IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT        (7U)
-#define IOMUXC_GPR_GPR13_CACHE_ENET(x)           (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_ENET_MASK)
-#define IOMUXC_GPR_GPR13_CACHE_USB_MASK          (0x2000U)
-#define IOMUXC_GPR_GPR13_CACHE_USB_SHIFT         (13U)
-#define IOMUXC_GPR_GPR13_CACHE_USB(x)            (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_USB_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_USB_MASK)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK  (0x1U)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT (0U)
+#define IOMUXC_GPR_GPR13_ARCACHE_USDHC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_ARCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_ARCACHE_USDHC_MASK)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK  (0x2U)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT (1U)
+#define IOMUXC_GPR_GPR13_AWCACHE_USDHC(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_AWCACHE_USDHC_SHIFT)) & IOMUXC_GPR_GPR13_AWCACHE_USDHC_MASK)
+#define IOMUXC_GPR_GPR13_CACHE_ENET_MASK  (0x80U)
+#define IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT (7U)
+#define IOMUXC_GPR_GPR13_CACHE_ENET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_ENET_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_ENET_MASK)
+#define IOMUXC_GPR_GPR13_CACHE_USB_MASK  (0x2000U)
+#define IOMUXC_GPR_GPR13_CACHE_USB_SHIFT (13U)
+#define IOMUXC_GPR_GPR13_CACHE_USB(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR13_CACHE_USB_SHIFT)) & IOMUXC_GPR_GPR13_CACHE_USB_MASK)
 /*! @} */
 
 /*! @name GPR14 - GPR14 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK (0x1U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK  (0x1U)
 #define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT (0U)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK (0x2U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK  (0x2U)
 #define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT (1U)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK (0x4U)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK  (0x4U)
 #define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT (2U)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK (0x8U)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK  (0x8U)
 #define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT (3U)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK (0x10U)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_DN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK  (0x10U)
 #define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT (4U)
-#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK (0x20U)
+#define IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP1_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK  (0x20U)
 #define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT (5U)
-#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK (0x40U)
+#define IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP2_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK  (0x40U)
 #define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT (6U)
-#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK (0x80U)
+#define IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP3_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK  (0x80U)
 #define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT (7U)
-#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK)
-#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK (0x100U)
+#define IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_SHIFT)) &                                  \
+     IOMUXC_GPR_GPR14_ACMP4_CMP_IGEN_TRIM_UP_MASK)
+#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK  (0x100U)
 #define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT (8U)
-#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK (0x200U)
+#define IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP1_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK  (0x200U)
 #define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT (9U)
-#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK (0x400U)
+#define IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP2_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK  (0x400U)
 #define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT (10U)
-#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK (0x800U)
+#define IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP3_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK  (0x800U)
 #define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT (11U)
-#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT)) & IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK      (0xF0000U)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT     (16U)
-#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK      (0xF00000U)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT     (20U)
-#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK)
+#define IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR14_ACMP4_SAMPLE_SYNC_EN_MASK)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK  (0xF0000U)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT (16U)
+#define IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK  (0xF00000U)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT (20U)
+#define IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_SHIFT)) & IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK)
 /*! @} */
 
 /*! @name GPR16 - GPR16 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK       (0x1U)
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT      (0U)
-#define IOMUXC_GPR_GPR16_INIT_ITCM_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK       (0x2U)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT      (1U)
-#define IOMUXC_GPR_GPR16_INIT_DTCM_EN(x)         (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK)
-#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK (0x4U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK  (0x1U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT (0U)
+#define IOMUXC_GPR_GPR16_INIT_ITCM_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_ITCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK  (0x2U)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT (1U)
+#define IOMUXC_GPR_GPR16_INIT_DTCM_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_INIT_DTCM_EN_SHIFT)) & IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK)
+#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK  (0x4U)
 #define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT (2U)
-#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT)) & IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK      (0xFFFFFF80U)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT     (7U)
-#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR(x)        (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT)) & IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK)
+#define IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_SHIFT)) &                                    \
+     IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK  (0xFFFFFF80U)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT (7U)
+#define IOMUXC_GPR_GPR16_CM7_INIT_VTOR(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR16_CM7_INIT_VTOR_SHIFT)) & IOMUXC_GPR_GPR16_CM7_INIT_VTOR_MASK)
 /*! @} */
 
 /*! @name GPR17 - GPR17 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK   (0xFFFFFFFFU)
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT  (0U)
-#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT)) & IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK  (0xFFFFFFFFU)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT (0U)
+#define IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_SHIFT)) & IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_MASK)
 /*! @} */
 
 /*! @name GPR18 - GPR18 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK)
+#define IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR18_LOCK_M7_APC_AC_R0_BOT_MASK)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_SHIFT)) & IOMUXC_GPR_GPR18_M7_APC_AC_R0_BOT_MASK)
 /*! @} */
 
 /*! @name GPR19 - GPR19 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK)
+#define IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR19_LOCK_M7_APC_AC_R0_TOP_MASK)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_SHIFT)) & IOMUXC_GPR_GPR19_M7_APC_AC_R0_TOP_MASK)
 /*! @} */
 
 /*! @name GPR20 - GPR20 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK)
+#define IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR20_LOCK_M7_APC_AC_R1_BOT_MASK)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_SHIFT)) & IOMUXC_GPR_GPR20_M7_APC_AC_R1_BOT_MASK)
 /*! @} */
 
 /*! @name GPR21 - GPR21 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR21_LOCK_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR21_M7_APC_AC_R1_TOP_MASK)
 /*! @} */
 
 /*! @name GPR22 - GPR22 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR22_LOCK_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR22_M7_APC_AC_R2_BOT_MASK)
 /*! @} */
 
 /*! @name GPR23 - GPR23 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT)) & IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT)) & IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK)
+#define IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR23_LOCK_M7_APC_AC_R1_TOP_MASK)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_SHIFT)) & IOMUXC_GPR_GPR23_M7_APC_AC_R2_TOP_MASK)
 /*! @} */
 
 /*! @name GPR24 - GPR24 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK (0x1U)
+#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK  (0x1U)
 #define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT (0U)
-#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT)) & IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT  (3U)
-#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK)
+#define IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR24_LOCK_M7_APC_AC_R3_BOT_MASK)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT (3U)
+#define IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_SHIFT)) & IOMUXC_GPR_GPR24_M7_APC_AC_R2_BOT_MASK)
 /*! @} */
 
 /*! @name GPR25 - GPR25 General Purpose Register */
 /*! @{ */
-#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK (0x1U)
+#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK  (0x1U)
 #define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT (0U)
-#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK   (0xFFFFFFF8U)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT  (3U)
-#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP(x)     (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK)
+#define IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_SHIFT)) &                                   \
+     IOMUXC_GPR_GPR25_LOCK_M7_APC_AC_R3_TOP_MASK)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK  (0xFFFFFFF8U)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT (3U)
+#define IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_SHIFT)) & IOMUXC_GPR_GPR25_M7_APC_AC_R3_TOP_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_GPR_Register_Masks */
 
-
 /* IOMUXC_GPR - Peripheral instance base addresses */
 /** Peripheral IOMUXC_GPR base address */
-#define IOMUXC_GPR_BASE                          (0x400AC000u)
+#define IOMUXC_GPR_BASE (0x400AC000u)
 /** Peripheral IOMUXC_GPR base pointer */
-#define IOMUXC_GPR                               ((IOMUXC_GPR_Type *)IOMUXC_GPR_BASE)
+#define IOMUXC_GPR ((IOMUXC_GPR_Type *)IOMUXC_GPR_BASE)
 /** Array initializer of IOMUXC_GPR peripheral base addresses */
-#define IOMUXC_GPR_BASE_ADDRS                    { IOMUXC_GPR_BASE }
+#define IOMUXC_GPR_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        IOMUXC_GPR_BASE                                                                                                \
+    }
 /** Array initializer of IOMUXC_GPR peripheral base pointers */
-#define IOMUXC_GPR_BASE_PTRS                     { IOMUXC_GPR }
+#define IOMUXC_GPR_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        IOMUXC_GPR                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_GPR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_SNVS Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13313,16 +15344,19 @@ typedef struct {
  */
 
 /** IOMUXC_SNVS - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SW_MUX_CTL_PAD_WAKEUP;             /**< SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register, offset: 0x0 */
-  __IO uint32_t SW_MUX_CTL_PAD_PMIC_ON_REQ;        /**< SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register, offset: 0x4 */
-  __IO uint32_t SW_MUX_CTL_PAD_PMIC_STBY_REQ;      /**< SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register, offset: 0x8 */
-  __IO uint32_t SW_PAD_CTL_PAD_TEST_MODE;          /**< SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register, offset: 0xC */
-  __IO uint32_t SW_PAD_CTL_PAD_POR_B;              /**< SW_PAD_CTL_PAD_POR_B SW PAD Control Register, offset: 0x10 */
-  __IO uint32_t SW_PAD_CTL_PAD_ONOFF;              /**< SW_PAD_CTL_PAD_ONOFF SW PAD Control Register, offset: 0x14 */
-  __IO uint32_t SW_PAD_CTL_PAD_WAKEUP;             /**< SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register, offset: 0x18 */
-  __IO uint32_t SW_PAD_CTL_PAD_PMIC_ON_REQ;        /**< SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register, offset: 0x1C */
-  __IO uint32_t SW_PAD_CTL_PAD_PMIC_STBY_REQ;      /**< SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register, offset: 0x20 */
+typedef struct
+{
+    __IO uint32_t SW_MUX_CTL_PAD_WAKEUP;      /**< SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register, offset: 0x0 */
+    __IO uint32_t SW_MUX_CTL_PAD_PMIC_ON_REQ; /**< SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register, offset: 0x4 */
+    __IO uint32_t
+        SW_MUX_CTL_PAD_PMIC_STBY_REQ;         /**< SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register, offset: 0x8 */
+    __IO uint32_t SW_PAD_CTL_PAD_TEST_MODE;   /**< SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register, offset: 0xC */
+    __IO uint32_t SW_PAD_CTL_PAD_POR_B;       /**< SW_PAD_CTL_PAD_POR_B SW PAD Control Register, offset: 0x10 */
+    __IO uint32_t SW_PAD_CTL_PAD_ONOFF;       /**< SW_PAD_CTL_PAD_ONOFF SW PAD Control Register, offset: 0x14 */
+    __IO uint32_t SW_PAD_CTL_PAD_WAKEUP;      /**< SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register, offset: 0x18 */
+    __IO uint32_t SW_PAD_CTL_PAD_PMIC_ON_REQ; /**< SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register, offset: 0x1C */
+    __IO uint32_t
+        SW_PAD_CTL_PAD_PMIC_STBY_REQ; /**< SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register, offset: 0x20 */
 } IOMUXC_SNVS_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13336,223 +15370,334 @@ typedef struct {
 
 /*! @name SW_MUX_CTL_PAD_WAKEUP - SW_MUX_CTL_PAD_WAKEUP SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_WAKEUP_SION_MASK)
 /*! @} */
 
 /*! @name SW_MUX_CTL_PAD_PMIC_ON_REQ - SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_SHIFT)) &                          \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_SHIFT)) &                              \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_ON_REQ_SION_MASK)
 /*! @} */
 
 /*! @name SW_MUX_CTL_PAD_PMIC_STBY_REQ - SW_MUX_CTL_PAD_PMIC_STBY_REQ SW MUX Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK (0x7U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK  (0x7U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK (0x10U)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE(x)                                                           \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_SHIFT)) &                        \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_MUX_MODE_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK  (0x10U)
 #define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT (4U)
-#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT)) & IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK)
+#define IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_SHIFT)) &                            \
+     IOMUXC_SNVS_SW_MUX_CTL_PAD_PMIC_STBY_REQ_SION_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_TEST_MODE - SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_SHIFT)) &                                 \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_TEST_MODE_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_POR_B - SW_PAD_CTL_PAD_POR_B SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_POR_B_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_ONOFF - SW_PAD_CTL_PAD_ONOFF SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_SHIFT)) &                                   \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_SHIFT)) &                                     \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_ONOFF_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_WAKEUP - SW_PAD_CTL_PAD_WAKEUP SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_SHIFT)) &                                  \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_SHIFT)) &                                    \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_WAKEUP_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_PMIC_ON_REQ - SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_SHIFT)) &                               \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_ON_REQ_HYS_MASK)
 /*! @} */
 
 /*! @name SW_PAD_CTL_PAD_PMIC_STBY_REQ - SW_PAD_CTL_PAD_PMIC_STBY_REQ SW PAD Control Register */
 /*! @{ */
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK (0x1U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK  (0x1U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT (0U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK (0x38U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SRE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK  (0x38U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT (3U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK (0xC0U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_DSE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK  (0xC0U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT (6U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK (0x800U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_SHIFT)) &                           \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_SPEED_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK  (0x800U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT (11U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK (0x1000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_ODE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK  (0x1000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT (12U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK (0x2000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PKE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK  (0x2000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT (13U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK (0xC000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUE_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK  (0xC000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT (14U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK (0x10000U)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_PUS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK  (0x10000U)
 #define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT (16U)
-#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT)) & IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK)
+#define IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_SHIFT)) &                             \
+     IOMUXC_SNVS_SW_PAD_CTL_PAD_PMIC_STBY_REQ_HYS_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_Register_Masks */
 
-
 /* IOMUXC_SNVS - Peripheral instance base addresses */
 /** Peripheral IOMUXC_SNVS base address */
-#define IOMUXC_SNVS_BASE                         (0x400A8000u)
+#define IOMUXC_SNVS_BASE (0x400A8000u)
 /** Peripheral IOMUXC_SNVS base pointer */
-#define IOMUXC_SNVS                              ((IOMUXC_SNVS_Type *)IOMUXC_SNVS_BASE)
+#define IOMUXC_SNVS ((IOMUXC_SNVS_Type *)IOMUXC_SNVS_BASE)
 /** Array initializer of IOMUXC_SNVS peripheral base addresses */
-#define IOMUXC_SNVS_BASE_ADDRS                   { IOMUXC_SNVS_BASE }
+#define IOMUXC_SNVS_BASE_ADDRS                                                                                         \
+    {                                                                                                                  \
+        IOMUXC_SNVS_BASE                                                                                               \
+    }
 /** Array initializer of IOMUXC_SNVS peripheral base pointers */
-#define IOMUXC_SNVS_BASE_PTRS                    { IOMUXC_SNVS }
+#define IOMUXC_SNVS_BASE_PTRS                                                                                          \
+    {                                                                                                                  \
+        IOMUXC_SNVS                                                                                                    \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- IOMUXC_SNVS_GPR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13563,11 +15708,12 @@ typedef struct {
  */
 
 /** IOMUXC_SNVS_GPR - Register Layout Typedef */
-typedef struct {
-       uint32_t GPR0;                              /**< GPR0 General Purpose Register, offset: 0x0 */
-       uint32_t GPR1;                              /**< GPR1 General Purpose Register, offset: 0x4 */
-       uint32_t GPR2;                              /**< GPR2 General Purpose Register, offset: 0x8 */
-  __IO uint32_t GPR3;                              /**< GPR3 General Purpose Register, offset: 0xC */
+typedef struct
+{
+    uint32_t GPR0;      /**< GPR0 General Purpose Register, offset: 0x0 */
+    uint32_t GPR1;      /**< GPR1 General Purpose Register, offset: 0x4 */
+    uint32_t GPR2;      /**< GPR2 General Purpose Register, offset: 0x8 */
+    __IO uint32_t GPR3; /**< GPR3 General Purpose Register, offset: 0xC */
 } IOMUXC_SNVS_GPR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13581,50 +15727,67 @@ typedef struct {
 
 /*! @name GPR3 - GPR3 General Purpose Register */
 /*! @{ */
-#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK (0x1U)
+#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK  (0x1U)
 #define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT (0U)
-#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK (0x2U)
+#define IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_SHIFT)) &                                    \
+     IOMUXC_SNVS_GPR_GPR3_LPSR_MODE_ENABLE_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK  (0x2U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT (1U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_SHIFT)) &                                \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_STATUS_CAPT_CLR_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK  (0xCU)
 #define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT (2U)
-#define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK (0x10000U)
+#define IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_POR_PULL_TYPE_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK  (0x10000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT (16U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL(x)  (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_SHIFT)) &                                     \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_IN_LOW_VOL_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK  (0x20000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT (17U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_CUR_MASK)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK  (0x40000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT (18U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL(x)    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK (0x80000U)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_SHIFT)) &                                       \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_OVER_VOL_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK  (0x80000U)
 #define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT (19U)
-#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT)) & IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK)
+#define IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_SHIFT)) &                                      \
+     IOMUXC_SNVS_GPR_GPR3_DCDC_STS_DC_OK_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_GPR_Register_Masks */
 
-
 /* IOMUXC_SNVS_GPR - Peripheral instance base addresses */
 /** Peripheral IOMUXC_SNVS_GPR base address */
-#define IOMUXC_SNVS_GPR_BASE                     (0x400A4000u)
+#define IOMUXC_SNVS_GPR_BASE (0x400A4000u)
 /** Peripheral IOMUXC_SNVS_GPR base pointer */
-#define IOMUXC_SNVS_GPR                          ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)
+#define IOMUXC_SNVS_GPR ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)
 /** Array initializer of IOMUXC_SNVS_GPR peripheral base addresses */
-#define IOMUXC_SNVS_GPR_BASE_ADDRS               { IOMUXC_SNVS_GPR_BASE }
+#define IOMUXC_SNVS_GPR_BASE_ADDRS                                                                                     \
+    {                                                                                                                  \
+        IOMUXC_SNVS_GPR_BASE                                                                                           \
+    }
 /** Array initializer of IOMUXC_SNVS_GPR peripheral base pointers */
-#define IOMUXC_SNVS_GPR_BASE_PTRS                { IOMUXC_SNVS_GPR }
+#define IOMUXC_SNVS_GPR_BASE_PTRS                                                                                      \
+    {                                                                                                                  \
+        IOMUXC_SNVS_GPR                                                                                                \
+    }
 
 /*!
  * @}
  */ /* end of group IOMUXC_SNVS_GPR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- KPP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13635,11 +15798,12 @@ typedef struct {
  */
 
 /** KPP - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t KPCR;                              /**< Keypad Control Register, offset: 0x0 */
-  __IO uint16_t KPSR;                              /**< Keypad Status Register, offset: 0x2 */
-  __IO uint16_t KDDR;                              /**< Keypad Data Direction Register, offset: 0x4 */
-  __IO uint16_t KPDR;                              /**< Keypad Data Register, offset: 0x6 */
+typedef struct
+{
+    __IO uint16_t KPCR; /**< Keypad Control Register, offset: 0x0 */
+    __IO uint16_t KPSR; /**< Keypad Status Register, offset: 0x2 */
+    __IO uint16_t KDDR; /**< Keypad Data Direction Register, offset: 0x4 */
+    __IO uint16_t KPDR; /**< Keypad Data Register, offset: 0x6 */
 } KPP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13653,79 +15817,85 @@ typedef struct {
 
 /*! @name KPCR - Keypad Control Register */
 /*! @{ */
-#define KPP_KPCR_KRE_MASK                        (0xFFU)
-#define KPP_KPCR_KRE_SHIFT                       (0U)
-#define KPP_KPCR_KRE(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KRE_SHIFT)) & KPP_KPCR_KRE_MASK)
-#define KPP_KPCR_KCO_MASK                        (0xFF00U)
-#define KPP_KPCR_KCO_SHIFT                       (8U)
-#define KPP_KPCR_KCO(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KCO_SHIFT)) & KPP_KPCR_KCO_MASK)
+#define KPP_KPCR_KRE_MASK  (0xFFU)
+#define KPP_KPCR_KRE_SHIFT (0U)
+#define KPP_KPCR_KRE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KRE_SHIFT)) & KPP_KPCR_KRE_MASK)
+#define KPP_KPCR_KCO_MASK  (0xFF00U)
+#define KPP_KPCR_KCO_SHIFT (8U)
+#define KPP_KPCR_KCO(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPCR_KCO_SHIFT)) & KPP_KPCR_KCO_MASK)
 /*! @} */
 
 /*! @name KPSR - Keypad Status Register */
 /*! @{ */
-#define KPP_KPSR_KPKD_MASK                       (0x1U)
-#define KPP_KPSR_KPKD_SHIFT                      (0U)
-#define KPP_KPSR_KPKD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKD_SHIFT)) & KPP_KPSR_KPKD_MASK)
-#define KPP_KPSR_KPKR_MASK                       (0x2U)
-#define KPP_KPSR_KPKR_SHIFT                      (1U)
-#define KPP_KPSR_KPKR(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKR_SHIFT)) & KPP_KPSR_KPKR_MASK)
-#define KPP_KPSR_KDSC_MASK                       (0x4U)
-#define KPP_KPSR_KDSC_SHIFT                      (2U)
-#define KPP_KPSR_KDSC(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDSC_SHIFT)) & KPP_KPSR_KDSC_MASK)
-#define KPP_KPSR_KRSS_MASK                       (0x8U)
-#define KPP_KPSR_KRSS_SHIFT                      (3U)
-#define KPP_KPSR_KRSS(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRSS_SHIFT)) & KPP_KPSR_KRSS_MASK)
-#define KPP_KPSR_KDIE_MASK                       (0x100U)
-#define KPP_KPSR_KDIE_SHIFT                      (8U)
-#define KPP_KPSR_KDIE(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDIE_SHIFT)) & KPP_KPSR_KDIE_MASK)
-#define KPP_KPSR_KRIE_MASK                       (0x200U)
-#define KPP_KPSR_KRIE_SHIFT                      (9U)
-#define KPP_KPSR_KRIE(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRIE_SHIFT)) & KPP_KPSR_KRIE_MASK)
+#define KPP_KPSR_KPKD_MASK  (0x1U)
+#define KPP_KPSR_KPKD_SHIFT (0U)
+#define KPP_KPSR_KPKD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKD_SHIFT)) & KPP_KPSR_KPKD_MASK)
+#define KPP_KPSR_KPKR_MASK  (0x2U)
+#define KPP_KPSR_KPKR_SHIFT (1U)
+#define KPP_KPSR_KPKR(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KPKR_SHIFT)) & KPP_KPSR_KPKR_MASK)
+#define KPP_KPSR_KDSC_MASK  (0x4U)
+#define KPP_KPSR_KDSC_SHIFT (2U)
+#define KPP_KPSR_KDSC(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDSC_SHIFT)) & KPP_KPSR_KDSC_MASK)
+#define KPP_KPSR_KRSS_MASK  (0x8U)
+#define KPP_KPSR_KRSS_SHIFT (3U)
+#define KPP_KPSR_KRSS(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRSS_SHIFT)) & KPP_KPSR_KRSS_MASK)
+#define KPP_KPSR_KDIE_MASK  (0x100U)
+#define KPP_KPSR_KDIE_SHIFT (8U)
+#define KPP_KPSR_KDIE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KDIE_SHIFT)) & KPP_KPSR_KDIE_MASK)
+#define KPP_KPSR_KRIE_MASK  (0x200U)
+#define KPP_KPSR_KRIE_SHIFT (9U)
+#define KPP_KPSR_KRIE(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPSR_KRIE_SHIFT)) & KPP_KPSR_KRIE_MASK)
 /*! @} */
 
 /*! @name KDDR - Keypad Data Direction Register */
 /*! @{ */
-#define KPP_KDDR_KRDD_MASK                       (0xFFU)
-#define KPP_KDDR_KRDD_SHIFT                      (0U)
-#define KPP_KDDR_KRDD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KRDD_SHIFT)) & KPP_KDDR_KRDD_MASK)
-#define KPP_KDDR_KCDD_MASK                       (0xFF00U)
-#define KPP_KDDR_KCDD_SHIFT                      (8U)
-#define KPP_KDDR_KCDD(x)                         (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KCDD_SHIFT)) & KPP_KDDR_KCDD_MASK)
+#define KPP_KDDR_KRDD_MASK  (0xFFU)
+#define KPP_KDDR_KRDD_SHIFT (0U)
+#define KPP_KDDR_KRDD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KRDD_SHIFT)) & KPP_KDDR_KRDD_MASK)
+#define KPP_KDDR_KCDD_MASK  (0xFF00U)
+#define KPP_KDDR_KCDD_SHIFT (8U)
+#define KPP_KDDR_KCDD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KDDR_KCDD_SHIFT)) & KPP_KDDR_KCDD_MASK)
 /*! @} */
 
 /*! @name KPDR - Keypad Data Register */
 /*! @{ */
-#define KPP_KPDR_KRD_MASK                        (0xFFU)
-#define KPP_KPDR_KRD_SHIFT                       (0U)
-#define KPP_KPDR_KRD(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KRD_SHIFT)) & KPP_KPDR_KRD_MASK)
-#define KPP_KPDR_KCD_MASK                        (0xFF00U)
-#define KPP_KPDR_KCD_SHIFT                       (8U)
-#define KPP_KPDR_KCD(x)                          (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KCD_SHIFT)) & KPP_KPDR_KCD_MASK)
+#define KPP_KPDR_KRD_MASK  (0xFFU)
+#define KPP_KPDR_KRD_SHIFT (0U)
+#define KPP_KPDR_KRD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KRD_SHIFT)) & KPP_KPDR_KRD_MASK)
+#define KPP_KPDR_KCD_MASK  (0xFF00U)
+#define KPP_KPDR_KCD_SHIFT (8U)
+#define KPP_KPDR_KCD(x)    (((uint16_t)(((uint16_t)(x)) << KPP_KPDR_KCD_SHIFT)) & KPP_KPDR_KCD_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group KPP_Register_Masks */
 
-
 /* KPP - Peripheral instance base addresses */
 /** Peripheral KPP base address */
-#define KPP_BASE                                 (0x401FC000u)
+#define KPP_BASE (0x401FC000u)
 /** Peripheral KPP base pointer */
-#define KPP                                      ((KPP_Type *)KPP_BASE)
+#define KPP ((KPP_Type *)KPP_BASE)
 /** Array initializer of KPP peripheral base addresses */
-#define KPP_BASE_ADDRS                           { KPP_BASE }
+#define KPP_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        KPP_BASE                                                                                                       \
+    }
 /** Array initializer of KPP peripheral base pointers */
-#define KPP_BASE_PTRS                            { KPP }
+#define KPP_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        KPP                                                                                                            \
+    }
 /** Interrupt vectors for the KPP peripheral type */
-#define KPP_IRQS                                 { KPP_IRQn }
+#define KPP_IRQS                                                                                                       \
+    {                                                                                                                  \
+        KPP_IRQn                                                                                                       \
+    }
 
 /*!
  * @}
  */ /* end of group KPP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPI2C Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -13736,47 +15906,48 @@ typedef struct {
  */
 
 /** LPI2C - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-       uint8_t RESERVED_0[8];
-  __IO uint32_t MCR;                               /**< Master Control Register, offset: 0x10 */
-  __IO uint32_t MSR;                               /**< Master Status Register, offset: 0x14 */
-  __IO uint32_t MIER;                              /**< Master Interrupt Enable Register, offset: 0x18 */
-  __IO uint32_t MDER;                              /**< Master DMA Enable Register, offset: 0x1C */
-  __IO uint32_t MCFGR0;                            /**< Master Configuration Register 0, offset: 0x20 */
-  __IO uint32_t MCFGR1;                            /**< Master Configuration Register 1, offset: 0x24 */
-  __IO uint32_t MCFGR2;                            /**< Master Configuration Register 2, offset: 0x28 */
-  __IO uint32_t MCFGR3;                            /**< Master Configuration Register 3, offset: 0x2C */
-       uint8_t RESERVED_1[16];
-  __IO uint32_t MDMR;                              /**< Master Data Match Register, offset: 0x40 */
-       uint8_t RESERVED_2[4];
-  __IO uint32_t MCCR0;                             /**< Master Clock Configuration Register 0, offset: 0x48 */
-       uint8_t RESERVED_3[4];
-  __IO uint32_t MCCR1;                             /**< Master Clock Configuration Register 1, offset: 0x50 */
-       uint8_t RESERVED_4[4];
-  __IO uint32_t MFCR;                              /**< Master FIFO Control Register, offset: 0x58 */
-  __I  uint32_t MFSR;                              /**< Master FIFO Status Register, offset: 0x5C */
-  __O  uint32_t MTDR;                              /**< Master Transmit Data Register, offset: 0x60 */
-       uint8_t RESERVED_5[12];
-  __I  uint32_t MRDR;                              /**< Master Receive Data Register, offset: 0x70 */
-       uint8_t RESERVED_6[156];
-  __IO uint32_t SCR;                               /**< Slave Control Register, offset: 0x110 */
-  __IO uint32_t SSR;                               /**< Slave Status Register, offset: 0x114 */
-  __IO uint32_t SIER;                              /**< Slave Interrupt Enable Register, offset: 0x118 */
-  __IO uint32_t SDER;                              /**< Slave DMA Enable Register, offset: 0x11C */
-       uint8_t RESERVED_7[4];
-  __IO uint32_t SCFGR1;                            /**< Slave Configuration Register 1, offset: 0x124 */
-  __IO uint32_t SCFGR2;                            /**< Slave Configuration Register 2, offset: 0x128 */
-       uint8_t RESERVED_8[20];
-  __IO uint32_t SAMR;                              /**< Slave Address Match Register, offset: 0x140 */
-       uint8_t RESERVED_9[12];
-  __I  uint32_t SASR;                              /**< Slave Address Status Register, offset: 0x150 */
-  __IO uint32_t STAR;                              /**< Slave Transmit ACK Register, offset: 0x154 */
-       uint8_t RESERVED_10[8];
-  __O  uint32_t STDR;                              /**< Slave Transmit Data Register, offset: 0x160 */
-       uint8_t RESERVED_11[12];
-  __I  uint32_t SRDR;                              /**< Slave Receive Data Register, offset: 0x170 */
+typedef struct
+{
+    __I uint32_t VERID; /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM; /**< Parameter Register, offset: 0x4 */
+    uint8_t RESERVED_0[8];
+    __IO uint32_t MCR;    /**< Master Control Register, offset: 0x10 */
+    __IO uint32_t MSR;    /**< Master Status Register, offset: 0x14 */
+    __IO uint32_t MIER;   /**< Master Interrupt Enable Register, offset: 0x18 */
+    __IO uint32_t MDER;   /**< Master DMA Enable Register, offset: 0x1C */
+    __IO uint32_t MCFGR0; /**< Master Configuration Register 0, offset: 0x20 */
+    __IO uint32_t MCFGR1; /**< Master Configuration Register 1, offset: 0x24 */
+    __IO uint32_t MCFGR2; /**< Master Configuration Register 2, offset: 0x28 */
+    __IO uint32_t MCFGR3; /**< Master Configuration Register 3, offset: 0x2C */
+    uint8_t RESERVED_1[16];
+    __IO uint32_t MDMR; /**< Master Data Match Register, offset: 0x40 */
+    uint8_t RESERVED_2[4];
+    __IO uint32_t MCCR0; /**< Master Clock Configuration Register 0, offset: 0x48 */
+    uint8_t RESERVED_3[4];
+    __IO uint32_t MCCR1; /**< Master Clock Configuration Register 1, offset: 0x50 */
+    uint8_t RESERVED_4[4];
+    __IO uint32_t MFCR; /**< Master FIFO Control Register, offset: 0x58 */
+    __I uint32_t MFSR;  /**< Master FIFO Status Register, offset: 0x5C */
+    __O uint32_t MTDR;  /**< Master Transmit Data Register, offset: 0x60 */
+    uint8_t RESERVED_5[12];
+    __I uint32_t MRDR; /**< Master Receive Data Register, offset: 0x70 */
+    uint8_t RESERVED_6[156];
+    __IO uint32_t SCR;  /**< Slave Control Register, offset: 0x110 */
+    __IO uint32_t SSR;  /**< Slave Status Register, offset: 0x114 */
+    __IO uint32_t SIER; /**< Slave Interrupt Enable Register, offset: 0x118 */
+    __IO uint32_t SDER; /**< Slave DMA Enable Register, offset: 0x11C */
+    uint8_t RESERVED_7[4];
+    __IO uint32_t SCFGR1; /**< Slave Configuration Register 1, offset: 0x124 */
+    __IO uint32_t SCFGR2; /**< Slave Configuration Register 2, offset: 0x128 */
+    uint8_t RESERVED_8[20];
+    __IO uint32_t SAMR; /**< Slave Address Match Register, offset: 0x140 */
+    uint8_t RESERVED_9[12];
+    __I uint32_t SASR;  /**< Slave Address Status Register, offset: 0x150 */
+    __IO uint32_t STAR; /**< Slave Transmit ACK Register, offset: 0x154 */
+    uint8_t RESERVED_10[8];
+    __O uint32_t STDR; /**< Slave Transmit Data Register, offset: 0x160 */
+    uint8_t RESERVED_11[12];
+    __I uint32_t SRDR; /**< Slave Receive Data Register, offset: 0x170 */
 } LPI2C_Type;
 
 /* ----------------------------------------------------------------------------
@@ -13790,526 +15961,547 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPI2C_VERID_FEATURE_MASK                 (0xFFFFU)
-#define LPI2C_VERID_FEATURE_SHIFT                (0U)
-#define LPI2C_VERID_FEATURE(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
-#define LPI2C_VERID_MINOR_MASK                   (0xFF0000U)
-#define LPI2C_VERID_MINOR_SHIFT                  (16U)
-#define LPI2C_VERID_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
-#define LPI2C_VERID_MAJOR_MASK                   (0xFF000000U)
-#define LPI2C_VERID_MAJOR_SHIFT                  (24U)
-#define LPI2C_VERID_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
+#define LPI2C_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPI2C_VERID_FEATURE_SHIFT (0U)
+#define LPI2C_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
+#define LPI2C_VERID_MINOR_MASK    (0xFF0000U)
+#define LPI2C_VERID_MINOR_SHIFT   (16U)
+#define LPI2C_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
+#define LPI2C_VERID_MAJOR_MASK    (0xFF000000U)
+#define LPI2C_VERID_MAJOR_SHIFT   (24U)
+#define LPI2C_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPI2C_PARAM_MTXFIFO_MASK                 (0xFU)
-#define LPI2C_PARAM_MTXFIFO_SHIFT                (0U)
-#define LPI2C_PARAM_MTXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
-#define LPI2C_PARAM_MRXFIFO_MASK                 (0xF00U)
-#define LPI2C_PARAM_MRXFIFO_SHIFT                (8U)
-#define LPI2C_PARAM_MRXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
+#define LPI2C_PARAM_MTXFIFO_MASK  (0xFU)
+#define LPI2C_PARAM_MTXFIFO_SHIFT (0U)
+#define LPI2C_PARAM_MTXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
+#define LPI2C_PARAM_MRXFIFO_MASK  (0xF00U)
+#define LPI2C_PARAM_MRXFIFO_SHIFT (8U)
+#define LPI2C_PARAM_MRXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
 /*! @} */
 
 /*! @name MCR - Master Control Register */
 /*! @{ */
-#define LPI2C_MCR_MEN_MASK                       (0x1U)
-#define LPI2C_MCR_MEN_SHIFT                      (0U)
-#define LPI2C_MCR_MEN(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
-#define LPI2C_MCR_RST_MASK                       (0x2U)
-#define LPI2C_MCR_RST_SHIFT                      (1U)
-#define LPI2C_MCR_RST(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
-#define LPI2C_MCR_DOZEN_MASK                     (0x4U)
-#define LPI2C_MCR_DOZEN_SHIFT                    (2U)
-#define LPI2C_MCR_DOZEN(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)
-#define LPI2C_MCR_DBGEN_MASK                     (0x8U)
-#define LPI2C_MCR_DBGEN_SHIFT                    (3U)
-#define LPI2C_MCR_DBGEN(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)
-#define LPI2C_MCR_RTF_MASK                       (0x100U)
-#define LPI2C_MCR_RTF_SHIFT                      (8U)
-#define LPI2C_MCR_RTF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)
-#define LPI2C_MCR_RRF_MASK                       (0x200U)
-#define LPI2C_MCR_RRF_SHIFT                      (9U)
-#define LPI2C_MCR_RRF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)
+#define LPI2C_MCR_MEN_MASK    (0x1U)
+#define LPI2C_MCR_MEN_SHIFT   (0U)
+#define LPI2C_MCR_MEN(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
+#define LPI2C_MCR_RST_MASK    (0x2U)
+#define LPI2C_MCR_RST_SHIFT   (1U)
+#define LPI2C_MCR_RST(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
+#define LPI2C_MCR_DOZEN_MASK  (0x4U)
+#define LPI2C_MCR_DOZEN_SHIFT (2U)
+#define LPI2C_MCR_DOZEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)
+#define LPI2C_MCR_DBGEN_MASK  (0x8U)
+#define LPI2C_MCR_DBGEN_SHIFT (3U)
+#define LPI2C_MCR_DBGEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)
+#define LPI2C_MCR_RTF_MASK    (0x100U)
+#define LPI2C_MCR_RTF_SHIFT   (8U)
+#define LPI2C_MCR_RTF(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)
+#define LPI2C_MCR_RRF_MASK    (0x200U)
+#define LPI2C_MCR_RRF_SHIFT   (9U)
+#define LPI2C_MCR_RRF(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)
 /*! @} */
 
 /*! @name MSR - Master Status Register */
 /*! @{ */
-#define LPI2C_MSR_TDF_MASK                       (0x1U)
-#define LPI2C_MSR_TDF_SHIFT                      (0U)
-#define LPI2C_MSR_TDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)
-#define LPI2C_MSR_RDF_MASK                       (0x2U)
-#define LPI2C_MSR_RDF_SHIFT                      (1U)
-#define LPI2C_MSR_RDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)
-#define LPI2C_MSR_EPF_MASK                       (0x100U)
-#define LPI2C_MSR_EPF_SHIFT                      (8U)
-#define LPI2C_MSR_EPF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)
-#define LPI2C_MSR_SDF_MASK                       (0x200U)
-#define LPI2C_MSR_SDF_SHIFT                      (9U)
-#define LPI2C_MSR_SDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)
-#define LPI2C_MSR_NDF_MASK                       (0x400U)
-#define LPI2C_MSR_NDF_SHIFT                      (10U)
-#define LPI2C_MSR_NDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)
-#define LPI2C_MSR_ALF_MASK                       (0x800U)
-#define LPI2C_MSR_ALF_SHIFT                      (11U)
-#define LPI2C_MSR_ALF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)
-#define LPI2C_MSR_FEF_MASK                       (0x1000U)
-#define LPI2C_MSR_FEF_SHIFT                      (12U)
-#define LPI2C_MSR_FEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)
-#define LPI2C_MSR_PLTF_MASK                      (0x2000U)
-#define LPI2C_MSR_PLTF_SHIFT                     (13U)
-#define LPI2C_MSR_PLTF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)
-#define LPI2C_MSR_DMF_MASK                       (0x4000U)
-#define LPI2C_MSR_DMF_SHIFT                      (14U)
-#define LPI2C_MSR_DMF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)
-#define LPI2C_MSR_MBF_MASK                       (0x1000000U)
-#define LPI2C_MSR_MBF_SHIFT                      (24U)
-#define LPI2C_MSR_MBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)
-#define LPI2C_MSR_BBF_MASK                       (0x2000000U)
-#define LPI2C_MSR_BBF_SHIFT                      (25U)
-#define LPI2C_MSR_BBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)
+#define LPI2C_MSR_TDF_MASK   (0x1U)
+#define LPI2C_MSR_TDF_SHIFT  (0U)
+#define LPI2C_MSR_TDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)
+#define LPI2C_MSR_RDF_MASK   (0x2U)
+#define LPI2C_MSR_RDF_SHIFT  (1U)
+#define LPI2C_MSR_RDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)
+#define LPI2C_MSR_EPF_MASK   (0x100U)
+#define LPI2C_MSR_EPF_SHIFT  (8U)
+#define LPI2C_MSR_EPF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)
+#define LPI2C_MSR_SDF_MASK   (0x200U)
+#define LPI2C_MSR_SDF_SHIFT  (9U)
+#define LPI2C_MSR_SDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)
+#define LPI2C_MSR_NDF_MASK   (0x400U)
+#define LPI2C_MSR_NDF_SHIFT  (10U)
+#define LPI2C_MSR_NDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)
+#define LPI2C_MSR_ALF_MASK   (0x800U)
+#define LPI2C_MSR_ALF_SHIFT  (11U)
+#define LPI2C_MSR_ALF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)
+#define LPI2C_MSR_FEF_MASK   (0x1000U)
+#define LPI2C_MSR_FEF_SHIFT  (12U)
+#define LPI2C_MSR_FEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)
+#define LPI2C_MSR_PLTF_MASK  (0x2000U)
+#define LPI2C_MSR_PLTF_SHIFT (13U)
+#define LPI2C_MSR_PLTF(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)
+#define LPI2C_MSR_DMF_MASK   (0x4000U)
+#define LPI2C_MSR_DMF_SHIFT  (14U)
+#define LPI2C_MSR_DMF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)
+#define LPI2C_MSR_MBF_MASK   (0x1000000U)
+#define LPI2C_MSR_MBF_SHIFT  (24U)
+#define LPI2C_MSR_MBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)
+#define LPI2C_MSR_BBF_MASK   (0x2000000U)
+#define LPI2C_MSR_BBF_SHIFT  (25U)
+#define LPI2C_MSR_BBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)
 /*! @} */
 
 /*! @name MIER - Master Interrupt Enable Register */
 /*! @{ */
-#define LPI2C_MIER_TDIE_MASK                     (0x1U)
-#define LPI2C_MIER_TDIE_SHIFT                    (0U)
-#define LPI2C_MIER_TDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)
-#define LPI2C_MIER_RDIE_MASK                     (0x2U)
-#define LPI2C_MIER_RDIE_SHIFT                    (1U)
-#define LPI2C_MIER_RDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)
-#define LPI2C_MIER_EPIE_MASK                     (0x100U)
-#define LPI2C_MIER_EPIE_SHIFT                    (8U)
-#define LPI2C_MIER_EPIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)
-#define LPI2C_MIER_SDIE_MASK                     (0x200U)
-#define LPI2C_MIER_SDIE_SHIFT                    (9U)
-#define LPI2C_MIER_SDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)
-#define LPI2C_MIER_NDIE_MASK                     (0x400U)
-#define LPI2C_MIER_NDIE_SHIFT                    (10U)
-#define LPI2C_MIER_NDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)
-#define LPI2C_MIER_ALIE_MASK                     (0x800U)
-#define LPI2C_MIER_ALIE_SHIFT                    (11U)
-#define LPI2C_MIER_ALIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)
-#define LPI2C_MIER_FEIE_MASK                     (0x1000U)
-#define LPI2C_MIER_FEIE_SHIFT                    (12U)
-#define LPI2C_MIER_FEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)
-#define LPI2C_MIER_PLTIE_MASK                    (0x2000U)
-#define LPI2C_MIER_PLTIE_SHIFT                   (13U)
-#define LPI2C_MIER_PLTIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)
-#define LPI2C_MIER_DMIE_MASK                     (0x4000U)
-#define LPI2C_MIER_DMIE_SHIFT                    (14U)
-#define LPI2C_MIER_DMIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)
+#define LPI2C_MIER_TDIE_MASK   (0x1U)
+#define LPI2C_MIER_TDIE_SHIFT  (0U)
+#define LPI2C_MIER_TDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)
+#define LPI2C_MIER_RDIE_MASK   (0x2U)
+#define LPI2C_MIER_RDIE_SHIFT  (1U)
+#define LPI2C_MIER_RDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)
+#define LPI2C_MIER_EPIE_MASK   (0x100U)
+#define LPI2C_MIER_EPIE_SHIFT  (8U)
+#define LPI2C_MIER_EPIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)
+#define LPI2C_MIER_SDIE_MASK   (0x200U)
+#define LPI2C_MIER_SDIE_SHIFT  (9U)
+#define LPI2C_MIER_SDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)
+#define LPI2C_MIER_NDIE_MASK   (0x400U)
+#define LPI2C_MIER_NDIE_SHIFT  (10U)
+#define LPI2C_MIER_NDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)
+#define LPI2C_MIER_ALIE_MASK   (0x800U)
+#define LPI2C_MIER_ALIE_SHIFT  (11U)
+#define LPI2C_MIER_ALIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)
+#define LPI2C_MIER_FEIE_MASK   (0x1000U)
+#define LPI2C_MIER_FEIE_SHIFT  (12U)
+#define LPI2C_MIER_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)
+#define LPI2C_MIER_PLTIE_MASK  (0x2000U)
+#define LPI2C_MIER_PLTIE_SHIFT (13U)
+#define LPI2C_MIER_PLTIE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)
+#define LPI2C_MIER_DMIE_MASK   (0x4000U)
+#define LPI2C_MIER_DMIE_SHIFT  (14U)
+#define LPI2C_MIER_DMIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)
 /*! @} */
 
 /*! @name MDER - Master DMA Enable Register */
 /*! @{ */
-#define LPI2C_MDER_TDDE_MASK                     (0x1U)
-#define LPI2C_MDER_TDDE_SHIFT                    (0U)
-#define LPI2C_MDER_TDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)
-#define LPI2C_MDER_RDDE_MASK                     (0x2U)
-#define LPI2C_MDER_RDDE_SHIFT                    (1U)
-#define LPI2C_MDER_RDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)
+#define LPI2C_MDER_TDDE_MASK  (0x1U)
+#define LPI2C_MDER_TDDE_SHIFT (0U)
+#define LPI2C_MDER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)
+#define LPI2C_MDER_RDDE_MASK  (0x2U)
+#define LPI2C_MDER_RDDE_SHIFT (1U)
+#define LPI2C_MDER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)
 /*! @} */
 
 /*! @name MCFGR0 - Master Configuration Register 0 */
 /*! @{ */
-#define LPI2C_MCFGR0_HREN_MASK                   (0x1U)
-#define LPI2C_MCFGR0_HREN_SHIFT                  (0U)
-#define LPI2C_MCFGR0_HREN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)
-#define LPI2C_MCFGR0_HRPOL_MASK                  (0x2U)
-#define LPI2C_MCFGR0_HRPOL_SHIFT                 (1U)
-#define LPI2C_MCFGR0_HRPOL(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)
-#define LPI2C_MCFGR0_HRSEL_MASK                  (0x4U)
-#define LPI2C_MCFGR0_HRSEL_SHIFT                 (2U)
-#define LPI2C_MCFGR0_HRSEL(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)
-#define LPI2C_MCFGR0_CIRFIFO_MASK                (0x100U)
-#define LPI2C_MCFGR0_CIRFIFO_SHIFT               (8U)
-#define LPI2C_MCFGR0_CIRFIFO(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)
-#define LPI2C_MCFGR0_RDMO_MASK                   (0x200U)
-#define LPI2C_MCFGR0_RDMO_SHIFT                  (9U)
-#define LPI2C_MCFGR0_RDMO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)
+#define LPI2C_MCFGR0_HREN_MASK     (0x1U)
+#define LPI2C_MCFGR0_HREN_SHIFT    (0U)
+#define LPI2C_MCFGR0_HREN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)
+#define LPI2C_MCFGR0_HRPOL_MASK    (0x2U)
+#define LPI2C_MCFGR0_HRPOL_SHIFT   (1U)
+#define LPI2C_MCFGR0_HRPOL(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)
+#define LPI2C_MCFGR0_HRSEL_MASK    (0x4U)
+#define LPI2C_MCFGR0_HRSEL_SHIFT   (2U)
+#define LPI2C_MCFGR0_HRSEL(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)
+#define LPI2C_MCFGR0_CIRFIFO_MASK  (0x100U)
+#define LPI2C_MCFGR0_CIRFIFO_SHIFT (8U)
+#define LPI2C_MCFGR0_CIRFIFO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)
+#define LPI2C_MCFGR0_RDMO_MASK  (0x200U)
+#define LPI2C_MCFGR0_RDMO_SHIFT (9U)
+#define LPI2C_MCFGR0_RDMO(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)
 /*! @} */
 
 /*! @name MCFGR1 - Master Configuration Register 1 */
 /*! @{ */
-#define LPI2C_MCFGR1_PRESCALE_MASK               (0x7U)
-#define LPI2C_MCFGR1_PRESCALE_SHIFT              (0U)
-#define LPI2C_MCFGR1_PRESCALE(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)
-#define LPI2C_MCFGR1_AUTOSTOP_MASK               (0x100U)
-#define LPI2C_MCFGR1_AUTOSTOP_SHIFT              (8U)
-#define LPI2C_MCFGR1_AUTOSTOP(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)
-#define LPI2C_MCFGR1_IGNACK_MASK                 (0x200U)
-#define LPI2C_MCFGR1_IGNACK_SHIFT                (9U)
-#define LPI2C_MCFGR1_IGNACK(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)
-#define LPI2C_MCFGR1_TIMECFG_MASK                (0x400U)
-#define LPI2C_MCFGR1_TIMECFG_SHIFT               (10U)
-#define LPI2C_MCFGR1_TIMECFG(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)
-#define LPI2C_MCFGR1_MATCFG_MASK                 (0x70000U)
-#define LPI2C_MCFGR1_MATCFG_SHIFT                (16U)
-#define LPI2C_MCFGR1_MATCFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)
-#define LPI2C_MCFGR1_PINCFG_MASK                 (0x7000000U)
-#define LPI2C_MCFGR1_PINCFG_SHIFT                (24U)
-#define LPI2C_MCFGR1_PINCFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)
+#define LPI2C_MCFGR1_PRESCALE_MASK  (0x7U)
+#define LPI2C_MCFGR1_PRESCALE_SHIFT (0U)
+#define LPI2C_MCFGR1_PRESCALE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)
+#define LPI2C_MCFGR1_AUTOSTOP_MASK  (0x100U)
+#define LPI2C_MCFGR1_AUTOSTOP_SHIFT (8U)
+#define LPI2C_MCFGR1_AUTOSTOP(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)
+#define LPI2C_MCFGR1_IGNACK_MASK   (0x200U)
+#define LPI2C_MCFGR1_IGNACK_SHIFT  (9U)
+#define LPI2C_MCFGR1_IGNACK(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)
+#define LPI2C_MCFGR1_TIMECFG_MASK  (0x400U)
+#define LPI2C_MCFGR1_TIMECFG_SHIFT (10U)
+#define LPI2C_MCFGR1_TIMECFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)
+#define LPI2C_MCFGR1_MATCFG_MASK  (0x70000U)
+#define LPI2C_MCFGR1_MATCFG_SHIFT (16U)
+#define LPI2C_MCFGR1_MATCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)
+#define LPI2C_MCFGR1_PINCFG_MASK  (0x7000000U)
+#define LPI2C_MCFGR1_PINCFG_SHIFT (24U)
+#define LPI2C_MCFGR1_PINCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)
 /*! @} */
 
 /*! @name MCFGR2 - Master Configuration Register 2 */
 /*! @{ */
-#define LPI2C_MCFGR2_BUSIDLE_MASK                (0xFFFU)
-#define LPI2C_MCFGR2_BUSIDLE_SHIFT               (0U)
-#define LPI2C_MCFGR2_BUSIDLE(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)
-#define LPI2C_MCFGR2_FILTSCL_MASK                (0xF0000U)
-#define LPI2C_MCFGR2_FILTSCL_SHIFT               (16U)
-#define LPI2C_MCFGR2_FILTSCL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)
-#define LPI2C_MCFGR2_FILTSDA_MASK                (0xF000000U)
-#define LPI2C_MCFGR2_FILTSDA_SHIFT               (24U)
-#define LPI2C_MCFGR2_FILTSDA(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)
+#define LPI2C_MCFGR2_BUSIDLE_MASK  (0xFFFU)
+#define LPI2C_MCFGR2_BUSIDLE_SHIFT (0U)
+#define LPI2C_MCFGR2_BUSIDLE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)
+#define LPI2C_MCFGR2_FILTSCL_MASK  (0xF0000U)
+#define LPI2C_MCFGR2_FILTSCL_SHIFT (16U)
+#define LPI2C_MCFGR2_FILTSCL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)
+#define LPI2C_MCFGR2_FILTSDA_MASK  (0xF000000U)
+#define LPI2C_MCFGR2_FILTSDA_SHIFT (24U)
+#define LPI2C_MCFGR2_FILTSDA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)
 /*! @} */
 
 /*! @name MCFGR3 - Master Configuration Register 3 */
 /*! @{ */
-#define LPI2C_MCFGR3_PINLOW_MASK                 (0xFFF00U)
-#define LPI2C_MCFGR3_PINLOW_SHIFT                (8U)
-#define LPI2C_MCFGR3_PINLOW(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)
+#define LPI2C_MCFGR3_PINLOW_MASK  (0xFFF00U)
+#define LPI2C_MCFGR3_PINLOW_SHIFT (8U)
+#define LPI2C_MCFGR3_PINLOW(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)
 /*! @} */
 
 /*! @name MDMR - Master Data Match Register */
 /*! @{ */
-#define LPI2C_MDMR_MATCH0_MASK                   (0xFFU)
-#define LPI2C_MDMR_MATCH0_SHIFT                  (0U)
-#define LPI2C_MDMR_MATCH0(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)
-#define LPI2C_MDMR_MATCH1_MASK                   (0xFF0000U)
-#define LPI2C_MDMR_MATCH1_SHIFT                  (16U)
-#define LPI2C_MDMR_MATCH1(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)
+#define LPI2C_MDMR_MATCH0_MASK  (0xFFU)
+#define LPI2C_MDMR_MATCH0_SHIFT (0U)
+#define LPI2C_MDMR_MATCH0(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)
+#define LPI2C_MDMR_MATCH1_MASK  (0xFF0000U)
+#define LPI2C_MDMR_MATCH1_SHIFT (16U)
+#define LPI2C_MDMR_MATCH1(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)
 /*! @} */
 
 /*! @name MCCR0 - Master Clock Configuration Register 0 */
 /*! @{ */
-#define LPI2C_MCCR0_CLKLO_MASK                   (0x3FU)
-#define LPI2C_MCCR0_CLKLO_SHIFT                  (0U)
-#define LPI2C_MCCR0_CLKLO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)
-#define LPI2C_MCCR0_CLKHI_MASK                   (0x3F00U)
-#define LPI2C_MCCR0_CLKHI_SHIFT                  (8U)
-#define LPI2C_MCCR0_CLKHI(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)
-#define LPI2C_MCCR0_SETHOLD_MASK                 (0x3F0000U)
-#define LPI2C_MCCR0_SETHOLD_SHIFT                (16U)
-#define LPI2C_MCCR0_SETHOLD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)
-#define LPI2C_MCCR0_DATAVD_MASK                  (0x3F000000U)
-#define LPI2C_MCCR0_DATAVD_SHIFT                 (24U)
-#define LPI2C_MCCR0_DATAVD(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)
+#define LPI2C_MCCR0_CLKLO_MASK    (0x3FU)
+#define LPI2C_MCCR0_CLKLO_SHIFT   (0U)
+#define LPI2C_MCCR0_CLKLO(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)
+#define LPI2C_MCCR0_CLKHI_MASK    (0x3F00U)
+#define LPI2C_MCCR0_CLKHI_SHIFT   (8U)
+#define LPI2C_MCCR0_CLKHI(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)
+#define LPI2C_MCCR0_SETHOLD_MASK  (0x3F0000U)
+#define LPI2C_MCCR0_SETHOLD_SHIFT (16U)
+#define LPI2C_MCCR0_SETHOLD(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)
+#define LPI2C_MCCR0_DATAVD_MASK   (0x3F000000U)
+#define LPI2C_MCCR0_DATAVD_SHIFT  (24U)
+#define LPI2C_MCCR0_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)
 /*! @} */
 
 /*! @name MCCR1 - Master Clock Configuration Register 1 */
 /*! @{ */
-#define LPI2C_MCCR1_CLKLO_MASK                   (0x3FU)
-#define LPI2C_MCCR1_CLKLO_SHIFT                  (0U)
-#define LPI2C_MCCR1_CLKLO(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)
-#define LPI2C_MCCR1_CLKHI_MASK                   (0x3F00U)
-#define LPI2C_MCCR1_CLKHI_SHIFT                  (8U)
-#define LPI2C_MCCR1_CLKHI(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)
-#define LPI2C_MCCR1_SETHOLD_MASK                 (0x3F0000U)
-#define LPI2C_MCCR1_SETHOLD_SHIFT                (16U)
-#define LPI2C_MCCR1_SETHOLD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
-#define LPI2C_MCCR1_DATAVD_MASK                  (0x3F000000U)
-#define LPI2C_MCCR1_DATAVD_SHIFT                 (24U)
-#define LPI2C_MCCR1_DATAVD(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)
+#define LPI2C_MCCR1_CLKLO_MASK    (0x3FU)
+#define LPI2C_MCCR1_CLKLO_SHIFT   (0U)
+#define LPI2C_MCCR1_CLKLO(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)
+#define LPI2C_MCCR1_CLKHI_MASK    (0x3F00U)
+#define LPI2C_MCCR1_CLKHI_SHIFT   (8U)
+#define LPI2C_MCCR1_CLKHI(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)
+#define LPI2C_MCCR1_SETHOLD_MASK  (0x3F0000U)
+#define LPI2C_MCCR1_SETHOLD_SHIFT (16U)
+#define LPI2C_MCCR1_SETHOLD(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
+#define LPI2C_MCCR1_DATAVD_MASK   (0x3F000000U)
+#define LPI2C_MCCR1_DATAVD_SHIFT  (24U)
+#define LPI2C_MCCR1_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)
 /*! @} */
 
 /*! @name MFCR - Master FIFO Control Register */
 /*! @{ */
-#define LPI2C_MFCR_TXWATER_MASK                  (0x3U)
-#define LPI2C_MFCR_TXWATER_SHIFT                 (0U)
-#define LPI2C_MFCR_TXWATER(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)
-#define LPI2C_MFCR_RXWATER_MASK                  (0x30000U)
-#define LPI2C_MFCR_RXWATER_SHIFT                 (16U)
-#define LPI2C_MFCR_RXWATER(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)
+#define LPI2C_MFCR_TXWATER_MASK  (0x3U)
+#define LPI2C_MFCR_TXWATER_SHIFT (0U)
+#define LPI2C_MFCR_TXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)
+#define LPI2C_MFCR_RXWATER_MASK  (0x30000U)
+#define LPI2C_MFCR_RXWATER_SHIFT (16U)
+#define LPI2C_MFCR_RXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)
 /*! @} */
 
 /*! @name MFSR - Master FIFO Status Register */
 /*! @{ */
-#define LPI2C_MFSR_TXCOUNT_MASK                  (0x7U)
-#define LPI2C_MFSR_TXCOUNT_SHIFT                 (0U)
-#define LPI2C_MFSR_TXCOUNT(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)
-#define LPI2C_MFSR_RXCOUNT_MASK                  (0x70000U)
-#define LPI2C_MFSR_RXCOUNT_SHIFT                 (16U)
-#define LPI2C_MFSR_RXCOUNT(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)
+#define LPI2C_MFSR_TXCOUNT_MASK  (0x7U)
+#define LPI2C_MFSR_TXCOUNT_SHIFT (0U)
+#define LPI2C_MFSR_TXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)
+#define LPI2C_MFSR_RXCOUNT_MASK  (0x70000U)
+#define LPI2C_MFSR_RXCOUNT_SHIFT (16U)
+#define LPI2C_MFSR_RXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)
 /*! @} */
 
 /*! @name MTDR - Master Transmit Data Register */
 /*! @{ */
-#define LPI2C_MTDR_DATA_MASK                     (0xFFU)
-#define LPI2C_MTDR_DATA_SHIFT                    (0U)
-#define LPI2C_MTDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)
-#define LPI2C_MTDR_CMD_MASK                      (0x700U)
-#define LPI2C_MTDR_CMD_SHIFT                     (8U)
-#define LPI2C_MTDR_CMD(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)
+#define LPI2C_MTDR_DATA_MASK  (0xFFU)
+#define LPI2C_MTDR_DATA_SHIFT (0U)
+#define LPI2C_MTDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)
+#define LPI2C_MTDR_CMD_MASK   (0x700U)
+#define LPI2C_MTDR_CMD_SHIFT  (8U)
+#define LPI2C_MTDR_CMD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)
 /*! @} */
 
 /*! @name MRDR - Master Receive Data Register */
 /*! @{ */
-#define LPI2C_MRDR_DATA_MASK                     (0xFFU)
-#define LPI2C_MRDR_DATA_SHIFT                    (0U)
-#define LPI2C_MRDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)
-#define LPI2C_MRDR_RXEMPTY_MASK                  (0x4000U)
-#define LPI2C_MRDR_RXEMPTY_SHIFT                 (14U)
-#define LPI2C_MRDR_RXEMPTY(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)
+#define LPI2C_MRDR_DATA_MASK     (0xFFU)
+#define LPI2C_MRDR_DATA_SHIFT    (0U)
+#define LPI2C_MRDR_DATA(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)
+#define LPI2C_MRDR_RXEMPTY_MASK  (0x4000U)
+#define LPI2C_MRDR_RXEMPTY_SHIFT (14U)
+#define LPI2C_MRDR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)
 /*! @} */
 
 /*! @name SCR - Slave Control Register */
 /*! @{ */
-#define LPI2C_SCR_SEN_MASK                       (0x1U)
-#define LPI2C_SCR_SEN_SHIFT                      (0U)
-#define LPI2C_SCR_SEN(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)
-#define LPI2C_SCR_RST_MASK                       (0x2U)
-#define LPI2C_SCR_RST_SHIFT                      (1U)
-#define LPI2C_SCR_RST(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)
-#define LPI2C_SCR_FILTEN_MASK                    (0x10U)
-#define LPI2C_SCR_FILTEN_SHIFT                   (4U)
-#define LPI2C_SCR_FILTEN(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)
-#define LPI2C_SCR_FILTDZ_MASK                    (0x20U)
-#define LPI2C_SCR_FILTDZ_SHIFT                   (5U)
-#define LPI2C_SCR_FILTDZ(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)
-#define LPI2C_SCR_RTF_MASK                       (0x100U)
-#define LPI2C_SCR_RTF_SHIFT                      (8U)
-#define LPI2C_SCR_RTF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)
-#define LPI2C_SCR_RRF_MASK                       (0x200U)
-#define LPI2C_SCR_RRF_SHIFT                      (9U)
-#define LPI2C_SCR_RRF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)
+#define LPI2C_SCR_SEN_MASK     (0x1U)
+#define LPI2C_SCR_SEN_SHIFT    (0U)
+#define LPI2C_SCR_SEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)
+#define LPI2C_SCR_RST_MASK     (0x2U)
+#define LPI2C_SCR_RST_SHIFT    (1U)
+#define LPI2C_SCR_RST(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)
+#define LPI2C_SCR_FILTEN_MASK  (0x10U)
+#define LPI2C_SCR_FILTEN_SHIFT (4U)
+#define LPI2C_SCR_FILTEN(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)
+#define LPI2C_SCR_FILTDZ_MASK  (0x20U)
+#define LPI2C_SCR_FILTDZ_SHIFT (5U)
+#define LPI2C_SCR_FILTDZ(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)
+#define LPI2C_SCR_RTF_MASK     (0x100U)
+#define LPI2C_SCR_RTF_SHIFT    (8U)
+#define LPI2C_SCR_RTF(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)
+#define LPI2C_SCR_RRF_MASK     (0x200U)
+#define LPI2C_SCR_RRF_SHIFT    (9U)
+#define LPI2C_SCR_RRF(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)
 /*! @} */
 
 /*! @name SSR - Slave Status Register */
 /*! @{ */
-#define LPI2C_SSR_TDF_MASK                       (0x1U)
-#define LPI2C_SSR_TDF_SHIFT                      (0U)
-#define LPI2C_SSR_TDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)
-#define LPI2C_SSR_RDF_MASK                       (0x2U)
-#define LPI2C_SSR_RDF_SHIFT                      (1U)
-#define LPI2C_SSR_RDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)
-#define LPI2C_SSR_AVF_MASK                       (0x4U)
-#define LPI2C_SSR_AVF_SHIFT                      (2U)
-#define LPI2C_SSR_AVF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)
-#define LPI2C_SSR_TAF_MASK                       (0x8U)
-#define LPI2C_SSR_TAF_SHIFT                      (3U)
-#define LPI2C_SSR_TAF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)
-#define LPI2C_SSR_RSF_MASK                       (0x100U)
-#define LPI2C_SSR_RSF_SHIFT                      (8U)
-#define LPI2C_SSR_RSF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)
-#define LPI2C_SSR_SDF_MASK                       (0x200U)
-#define LPI2C_SSR_SDF_SHIFT                      (9U)
-#define LPI2C_SSR_SDF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)
-#define LPI2C_SSR_BEF_MASK                       (0x400U)
-#define LPI2C_SSR_BEF_SHIFT                      (10U)
-#define LPI2C_SSR_BEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)
-#define LPI2C_SSR_FEF_MASK                       (0x800U)
-#define LPI2C_SSR_FEF_SHIFT                      (11U)
-#define LPI2C_SSR_FEF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)
-#define LPI2C_SSR_AM0F_MASK                      (0x1000U)
-#define LPI2C_SSR_AM0F_SHIFT                     (12U)
-#define LPI2C_SSR_AM0F(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)
-#define LPI2C_SSR_AM1F_MASK                      (0x2000U)
-#define LPI2C_SSR_AM1F_SHIFT                     (13U)
-#define LPI2C_SSR_AM1F(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)
-#define LPI2C_SSR_GCF_MASK                       (0x4000U)
-#define LPI2C_SSR_GCF_SHIFT                      (14U)
-#define LPI2C_SSR_GCF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)
-#define LPI2C_SSR_SARF_MASK                      (0x8000U)
-#define LPI2C_SSR_SARF_SHIFT                     (15U)
-#define LPI2C_SSR_SARF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)
-#define LPI2C_SSR_SBF_MASK                       (0x1000000U)
-#define LPI2C_SSR_SBF_SHIFT                      (24U)
-#define LPI2C_SSR_SBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)
-#define LPI2C_SSR_BBF_MASK                       (0x2000000U)
-#define LPI2C_SSR_BBF_SHIFT                      (25U)
-#define LPI2C_SSR_BBF(x)                         (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)
+#define LPI2C_SSR_TDF_MASK   (0x1U)
+#define LPI2C_SSR_TDF_SHIFT  (0U)
+#define LPI2C_SSR_TDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)
+#define LPI2C_SSR_RDF_MASK   (0x2U)
+#define LPI2C_SSR_RDF_SHIFT  (1U)
+#define LPI2C_SSR_RDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)
+#define LPI2C_SSR_AVF_MASK   (0x4U)
+#define LPI2C_SSR_AVF_SHIFT  (2U)
+#define LPI2C_SSR_AVF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)
+#define LPI2C_SSR_TAF_MASK   (0x8U)
+#define LPI2C_SSR_TAF_SHIFT  (3U)
+#define LPI2C_SSR_TAF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)
+#define LPI2C_SSR_RSF_MASK   (0x100U)
+#define LPI2C_SSR_RSF_SHIFT  (8U)
+#define LPI2C_SSR_RSF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)
+#define LPI2C_SSR_SDF_MASK   (0x200U)
+#define LPI2C_SSR_SDF_SHIFT  (9U)
+#define LPI2C_SSR_SDF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)
+#define LPI2C_SSR_BEF_MASK   (0x400U)
+#define LPI2C_SSR_BEF_SHIFT  (10U)
+#define LPI2C_SSR_BEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)
+#define LPI2C_SSR_FEF_MASK   (0x800U)
+#define LPI2C_SSR_FEF_SHIFT  (11U)
+#define LPI2C_SSR_FEF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)
+#define LPI2C_SSR_AM0F_MASK  (0x1000U)
+#define LPI2C_SSR_AM0F_SHIFT (12U)
+#define LPI2C_SSR_AM0F(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)
+#define LPI2C_SSR_AM1F_MASK  (0x2000U)
+#define LPI2C_SSR_AM1F_SHIFT (13U)
+#define LPI2C_SSR_AM1F(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)
+#define LPI2C_SSR_GCF_MASK   (0x4000U)
+#define LPI2C_SSR_GCF_SHIFT  (14U)
+#define LPI2C_SSR_GCF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)
+#define LPI2C_SSR_SARF_MASK  (0x8000U)
+#define LPI2C_SSR_SARF_SHIFT (15U)
+#define LPI2C_SSR_SARF(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)
+#define LPI2C_SSR_SBF_MASK   (0x1000000U)
+#define LPI2C_SSR_SBF_SHIFT  (24U)
+#define LPI2C_SSR_SBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)
+#define LPI2C_SSR_BBF_MASK   (0x2000000U)
+#define LPI2C_SSR_BBF_SHIFT  (25U)
+#define LPI2C_SSR_BBF(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)
 /*! @} */
 
 /*! @name SIER - Slave Interrupt Enable Register */
 /*! @{ */
-#define LPI2C_SIER_TDIE_MASK                     (0x1U)
-#define LPI2C_SIER_TDIE_SHIFT                    (0U)
-#define LPI2C_SIER_TDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)
-#define LPI2C_SIER_RDIE_MASK                     (0x2U)
-#define LPI2C_SIER_RDIE_SHIFT                    (1U)
-#define LPI2C_SIER_RDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)
-#define LPI2C_SIER_AVIE_MASK                     (0x4U)
-#define LPI2C_SIER_AVIE_SHIFT                    (2U)
-#define LPI2C_SIER_AVIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)
-#define LPI2C_SIER_TAIE_MASK                     (0x8U)
-#define LPI2C_SIER_TAIE_SHIFT                    (3U)
-#define LPI2C_SIER_TAIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)
-#define LPI2C_SIER_RSIE_MASK                     (0x100U)
-#define LPI2C_SIER_RSIE_SHIFT                    (8U)
-#define LPI2C_SIER_RSIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)
-#define LPI2C_SIER_SDIE_MASK                     (0x200U)
-#define LPI2C_SIER_SDIE_SHIFT                    (9U)
-#define LPI2C_SIER_SDIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)
-#define LPI2C_SIER_BEIE_MASK                     (0x400U)
-#define LPI2C_SIER_BEIE_SHIFT                    (10U)
-#define LPI2C_SIER_BEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)
-#define LPI2C_SIER_FEIE_MASK                     (0x800U)
-#define LPI2C_SIER_FEIE_SHIFT                    (11U)
-#define LPI2C_SIER_FEIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)
-#define LPI2C_SIER_AM0IE_MASK                    (0x1000U)
-#define LPI2C_SIER_AM0IE_SHIFT                   (12U)
-#define LPI2C_SIER_AM0IE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)
-#define LPI2C_SIER_AM1F_MASK                     (0x2000U)
-#define LPI2C_SIER_AM1F_SHIFT                    (13U)
-#define LPI2C_SIER_AM1F(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)
-#define LPI2C_SIER_GCIE_MASK                     (0x4000U)
-#define LPI2C_SIER_GCIE_SHIFT                    (14U)
-#define LPI2C_SIER_GCIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)
-#define LPI2C_SIER_SARIE_MASK                    (0x8000U)
-#define LPI2C_SIER_SARIE_SHIFT                   (15U)
-#define LPI2C_SIER_SARIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)
+#define LPI2C_SIER_TDIE_MASK   (0x1U)
+#define LPI2C_SIER_TDIE_SHIFT  (0U)
+#define LPI2C_SIER_TDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)
+#define LPI2C_SIER_RDIE_MASK   (0x2U)
+#define LPI2C_SIER_RDIE_SHIFT  (1U)
+#define LPI2C_SIER_RDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)
+#define LPI2C_SIER_AVIE_MASK   (0x4U)
+#define LPI2C_SIER_AVIE_SHIFT  (2U)
+#define LPI2C_SIER_AVIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)
+#define LPI2C_SIER_TAIE_MASK   (0x8U)
+#define LPI2C_SIER_TAIE_SHIFT  (3U)
+#define LPI2C_SIER_TAIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)
+#define LPI2C_SIER_RSIE_MASK   (0x100U)
+#define LPI2C_SIER_RSIE_SHIFT  (8U)
+#define LPI2C_SIER_RSIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)
+#define LPI2C_SIER_SDIE_MASK   (0x200U)
+#define LPI2C_SIER_SDIE_SHIFT  (9U)
+#define LPI2C_SIER_SDIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)
+#define LPI2C_SIER_BEIE_MASK   (0x400U)
+#define LPI2C_SIER_BEIE_SHIFT  (10U)
+#define LPI2C_SIER_BEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)
+#define LPI2C_SIER_FEIE_MASK   (0x800U)
+#define LPI2C_SIER_FEIE_SHIFT  (11U)
+#define LPI2C_SIER_FEIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)
+#define LPI2C_SIER_AM0IE_MASK  (0x1000U)
+#define LPI2C_SIER_AM0IE_SHIFT (12U)
+#define LPI2C_SIER_AM0IE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)
+#define LPI2C_SIER_AM1F_MASK   (0x2000U)
+#define LPI2C_SIER_AM1F_SHIFT  (13U)
+#define LPI2C_SIER_AM1F(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)
+#define LPI2C_SIER_GCIE_MASK   (0x4000U)
+#define LPI2C_SIER_GCIE_SHIFT  (14U)
+#define LPI2C_SIER_GCIE(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)
+#define LPI2C_SIER_SARIE_MASK  (0x8000U)
+#define LPI2C_SIER_SARIE_SHIFT (15U)
+#define LPI2C_SIER_SARIE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)
 /*! @} */
 
 /*! @name SDER - Slave DMA Enable Register */
 /*! @{ */
-#define LPI2C_SDER_TDDE_MASK                     (0x1U)
-#define LPI2C_SDER_TDDE_SHIFT                    (0U)
-#define LPI2C_SDER_TDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)
-#define LPI2C_SDER_RDDE_MASK                     (0x2U)
-#define LPI2C_SDER_RDDE_SHIFT                    (1U)
-#define LPI2C_SDER_RDDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)
-#define LPI2C_SDER_AVDE_MASK                     (0x4U)
-#define LPI2C_SDER_AVDE_SHIFT                    (2U)
-#define LPI2C_SDER_AVDE(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)
+#define LPI2C_SDER_TDDE_MASK  (0x1U)
+#define LPI2C_SDER_TDDE_SHIFT (0U)
+#define LPI2C_SDER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)
+#define LPI2C_SDER_RDDE_MASK  (0x2U)
+#define LPI2C_SDER_RDDE_SHIFT (1U)
+#define LPI2C_SDER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)
+#define LPI2C_SDER_AVDE_MASK  (0x4U)
+#define LPI2C_SDER_AVDE_SHIFT (2U)
+#define LPI2C_SDER_AVDE(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)
 /*! @} */
 
 /*! @name SCFGR1 - Slave Configuration Register 1 */
 /*! @{ */
-#define LPI2C_SCFGR1_ADRSTALL_MASK               (0x1U)
-#define LPI2C_SCFGR1_ADRSTALL_SHIFT              (0U)
-#define LPI2C_SCFGR1_ADRSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)
-#define LPI2C_SCFGR1_RXSTALL_MASK                (0x2U)
-#define LPI2C_SCFGR1_RXSTALL_SHIFT               (1U)
-#define LPI2C_SCFGR1_RXSTALL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)
-#define LPI2C_SCFGR1_TXDSTALL_MASK               (0x4U)
-#define LPI2C_SCFGR1_TXDSTALL_SHIFT              (2U)
-#define LPI2C_SCFGR1_TXDSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)
-#define LPI2C_SCFGR1_ACKSTALL_MASK               (0x8U)
-#define LPI2C_SCFGR1_ACKSTALL_SHIFT              (3U)
-#define LPI2C_SCFGR1_ACKSTALL(x)                 (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)
-#define LPI2C_SCFGR1_GCEN_MASK                   (0x100U)
-#define LPI2C_SCFGR1_GCEN_SHIFT                  (8U)
-#define LPI2C_SCFGR1_GCEN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)
-#define LPI2C_SCFGR1_SAEN_MASK                   (0x200U)
-#define LPI2C_SCFGR1_SAEN_SHIFT                  (9U)
-#define LPI2C_SCFGR1_SAEN(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)
-#define LPI2C_SCFGR1_TXCFG_MASK                  (0x400U)
-#define LPI2C_SCFGR1_TXCFG_SHIFT                 (10U)
-#define LPI2C_SCFGR1_TXCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)
-#define LPI2C_SCFGR1_RXCFG_MASK                  (0x800U)
-#define LPI2C_SCFGR1_RXCFG_SHIFT                 (11U)
-#define LPI2C_SCFGR1_RXCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)
-#define LPI2C_SCFGR1_IGNACK_MASK                 (0x1000U)
-#define LPI2C_SCFGR1_IGNACK_SHIFT                (12U)
-#define LPI2C_SCFGR1_IGNACK(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)
-#define LPI2C_SCFGR1_HSMEN_MASK                  (0x2000U)
-#define LPI2C_SCFGR1_HSMEN_SHIFT                 (13U)
-#define LPI2C_SCFGR1_HSMEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)
-#define LPI2C_SCFGR1_ADDRCFG_MASK                (0x70000U)
-#define LPI2C_SCFGR1_ADDRCFG_SHIFT               (16U)
-#define LPI2C_SCFGR1_ADDRCFG(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)
+#define LPI2C_SCFGR1_ADRSTALL_MASK  (0x1U)
+#define LPI2C_SCFGR1_ADRSTALL_SHIFT (0U)
+#define LPI2C_SCFGR1_ADRSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)
+#define LPI2C_SCFGR1_RXSTALL_MASK  (0x2U)
+#define LPI2C_SCFGR1_RXSTALL_SHIFT (1U)
+#define LPI2C_SCFGR1_RXSTALL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)
+#define LPI2C_SCFGR1_TXDSTALL_MASK  (0x4U)
+#define LPI2C_SCFGR1_TXDSTALL_SHIFT (2U)
+#define LPI2C_SCFGR1_TXDSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)
+#define LPI2C_SCFGR1_ACKSTALL_MASK  (0x8U)
+#define LPI2C_SCFGR1_ACKSTALL_SHIFT (3U)
+#define LPI2C_SCFGR1_ACKSTALL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)
+#define LPI2C_SCFGR1_GCEN_MASK     (0x100U)
+#define LPI2C_SCFGR1_GCEN_SHIFT    (8U)
+#define LPI2C_SCFGR1_GCEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)
+#define LPI2C_SCFGR1_SAEN_MASK     (0x200U)
+#define LPI2C_SCFGR1_SAEN_SHIFT    (9U)
+#define LPI2C_SCFGR1_SAEN(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)
+#define LPI2C_SCFGR1_TXCFG_MASK    (0x400U)
+#define LPI2C_SCFGR1_TXCFG_SHIFT   (10U)
+#define LPI2C_SCFGR1_TXCFG(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)
+#define LPI2C_SCFGR1_RXCFG_MASK    (0x800U)
+#define LPI2C_SCFGR1_RXCFG_SHIFT   (11U)
+#define LPI2C_SCFGR1_RXCFG(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)
+#define LPI2C_SCFGR1_IGNACK_MASK   (0x1000U)
+#define LPI2C_SCFGR1_IGNACK_SHIFT  (12U)
+#define LPI2C_SCFGR1_IGNACK(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)
+#define LPI2C_SCFGR1_HSMEN_MASK    (0x2000U)
+#define LPI2C_SCFGR1_HSMEN_SHIFT   (13U)
+#define LPI2C_SCFGR1_HSMEN(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)
+#define LPI2C_SCFGR1_ADDRCFG_MASK  (0x70000U)
+#define LPI2C_SCFGR1_ADDRCFG_SHIFT (16U)
+#define LPI2C_SCFGR1_ADDRCFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)
 /*! @} */
 
 /*! @name SCFGR2 - Slave Configuration Register 2 */
 /*! @{ */
-#define LPI2C_SCFGR2_CLKHOLD_MASK                (0xFU)
-#define LPI2C_SCFGR2_CLKHOLD_SHIFT               (0U)
-#define LPI2C_SCFGR2_CLKHOLD(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)
-#define LPI2C_SCFGR2_DATAVD_MASK                 (0x3F00U)
-#define LPI2C_SCFGR2_DATAVD_SHIFT                (8U)
-#define LPI2C_SCFGR2_DATAVD(x)                   (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)
-#define LPI2C_SCFGR2_FILTSCL_MASK                (0xF0000U)
-#define LPI2C_SCFGR2_FILTSCL_SHIFT               (16U)
-#define LPI2C_SCFGR2_FILTSCL(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)
-#define LPI2C_SCFGR2_FILTSDA_MASK                (0xF000000U)
-#define LPI2C_SCFGR2_FILTSDA_SHIFT               (24U)
-#define LPI2C_SCFGR2_FILTSDA(x)                  (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)
+#define LPI2C_SCFGR2_CLKHOLD_MASK  (0xFU)
+#define LPI2C_SCFGR2_CLKHOLD_SHIFT (0U)
+#define LPI2C_SCFGR2_CLKHOLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)
+#define LPI2C_SCFGR2_DATAVD_MASK   (0x3F00U)
+#define LPI2C_SCFGR2_DATAVD_SHIFT  (8U)
+#define LPI2C_SCFGR2_DATAVD(x)     (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)
+#define LPI2C_SCFGR2_FILTSCL_MASK  (0xF0000U)
+#define LPI2C_SCFGR2_FILTSCL_SHIFT (16U)
+#define LPI2C_SCFGR2_FILTSCL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)
+#define LPI2C_SCFGR2_FILTSDA_MASK  (0xF000000U)
+#define LPI2C_SCFGR2_FILTSDA_SHIFT (24U)
+#define LPI2C_SCFGR2_FILTSDA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)
 /*! @} */
 
 /*! @name SAMR - Slave Address Match Register */
 /*! @{ */
-#define LPI2C_SAMR_ADDR0_MASK                    (0x7FEU)
-#define LPI2C_SAMR_ADDR0_SHIFT                   (1U)
-#define LPI2C_SAMR_ADDR0(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
-#define LPI2C_SAMR_ADDR1_MASK                    (0x7FE0000U)
-#define LPI2C_SAMR_ADDR1_SHIFT                   (17U)
-#define LPI2C_SAMR_ADDR1(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)
+#define LPI2C_SAMR_ADDR0_MASK  (0x7FEU)
+#define LPI2C_SAMR_ADDR0_SHIFT (1U)
+#define LPI2C_SAMR_ADDR0(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
+#define LPI2C_SAMR_ADDR1_MASK  (0x7FE0000U)
+#define LPI2C_SAMR_ADDR1_SHIFT (17U)
+#define LPI2C_SAMR_ADDR1(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)
 /*! @} */
 
 /*! @name SASR - Slave Address Status Register */
 /*! @{ */
-#define LPI2C_SASR_RADDR_MASK                    (0x7FFU)
-#define LPI2C_SASR_RADDR_SHIFT                   (0U)
-#define LPI2C_SASR_RADDR(x)                      (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)
-#define LPI2C_SASR_ANV_MASK                      (0x4000U)
-#define LPI2C_SASR_ANV_SHIFT                     (14U)
-#define LPI2C_SASR_ANV(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)
+#define LPI2C_SASR_RADDR_MASK  (0x7FFU)
+#define LPI2C_SASR_RADDR_SHIFT (0U)
+#define LPI2C_SASR_RADDR(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)
+#define LPI2C_SASR_ANV_MASK    (0x4000U)
+#define LPI2C_SASR_ANV_SHIFT   (14U)
+#define LPI2C_SASR_ANV(x)      (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)
 /*! @} */
 
 /*! @name STAR - Slave Transmit ACK Register */
 /*! @{ */
-#define LPI2C_STAR_TXNACK_MASK                   (0x1U)
-#define LPI2C_STAR_TXNACK_SHIFT                  (0U)
-#define LPI2C_STAR_TXNACK(x)                     (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)
+#define LPI2C_STAR_TXNACK_MASK  (0x1U)
+#define LPI2C_STAR_TXNACK_SHIFT (0U)
+#define LPI2C_STAR_TXNACK(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)
 /*! @} */
 
 /*! @name STDR - Slave Transmit Data Register */
 /*! @{ */
-#define LPI2C_STDR_DATA_MASK                     (0xFFU)
-#define LPI2C_STDR_DATA_SHIFT                    (0U)
-#define LPI2C_STDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)
+#define LPI2C_STDR_DATA_MASK  (0xFFU)
+#define LPI2C_STDR_DATA_SHIFT (0U)
+#define LPI2C_STDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)
 /*! @} */
 
 /*! @name SRDR - Slave Receive Data Register */
 /*! @{ */
-#define LPI2C_SRDR_DATA_MASK                     (0xFFU)
-#define LPI2C_SRDR_DATA_SHIFT                    (0U)
-#define LPI2C_SRDR_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)
-#define LPI2C_SRDR_RXEMPTY_MASK                  (0x4000U)
-#define LPI2C_SRDR_RXEMPTY_SHIFT                 (14U)
-#define LPI2C_SRDR_RXEMPTY(x)                    (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)
-#define LPI2C_SRDR_SOF_MASK                      (0x8000U)
-#define LPI2C_SRDR_SOF_SHIFT                     (15U)
-#define LPI2C_SRDR_SOF(x)                        (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)
+#define LPI2C_SRDR_DATA_MASK     (0xFFU)
+#define LPI2C_SRDR_DATA_SHIFT    (0U)
+#define LPI2C_SRDR_DATA(x)       (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)
+#define LPI2C_SRDR_RXEMPTY_MASK  (0x4000U)
+#define LPI2C_SRDR_RXEMPTY_SHIFT (14U)
+#define LPI2C_SRDR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)
+#define LPI2C_SRDR_SOF_MASK      (0x8000U)
+#define LPI2C_SRDR_SOF_SHIFT     (15U)
+#define LPI2C_SRDR_SOF(x)        (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPI2C_Register_Masks */
 
-
 /* LPI2C - Peripheral instance base addresses */
 /** Peripheral LPI2C1 base address */
-#define LPI2C1_BASE                              (0x403F0000u)
+#define LPI2C1_BASE (0x403F0000u)
 /** Peripheral LPI2C1 base pointer */
-#define LPI2C1                                   ((LPI2C_Type *)LPI2C1_BASE)
+#define LPI2C1 ((LPI2C_Type *)LPI2C1_BASE)
 /** Peripheral LPI2C2 base address */
-#define LPI2C2_BASE                              (0x403F4000u)
+#define LPI2C2_BASE (0x403F4000u)
 /** Peripheral LPI2C2 base pointer */
-#define LPI2C2                                   ((LPI2C_Type *)LPI2C2_BASE)
+#define LPI2C2 ((LPI2C_Type *)LPI2C2_BASE)
 /** Peripheral LPI2C3 base address */
-#define LPI2C3_BASE                              (0x403F8000u)
+#define LPI2C3_BASE (0x403F8000u)
 /** Peripheral LPI2C3 base pointer */
-#define LPI2C3                                   ((LPI2C_Type *)LPI2C3_BASE)
+#define LPI2C3 ((LPI2C_Type *)LPI2C3_BASE)
 /** Peripheral LPI2C4 base address */
-#define LPI2C4_BASE                              (0x403FC000u)
+#define LPI2C4_BASE (0x403FC000u)
 /** Peripheral LPI2C4 base pointer */
-#define LPI2C4                                   ((LPI2C_Type *)LPI2C4_BASE)
+#define LPI2C4 ((LPI2C_Type *)LPI2C4_BASE)
 /** Array initializer of LPI2C peripheral base addresses */
-#define LPI2C_BASE_ADDRS                         { 0u, LPI2C1_BASE, LPI2C2_BASE, LPI2C3_BASE, LPI2C4_BASE }
+#define LPI2C_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, LPI2C1_BASE, LPI2C2_BASE, LPI2C3_BASE, LPI2C4_BASE                                                         \
+    }
 /** Array initializer of LPI2C peripheral base pointers */
-#define LPI2C_BASE_PTRS                          { (LPI2C_Type *)0u, LPI2C1, LPI2C2, LPI2C3, LPI2C4 }
+#define LPI2C_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (LPI2C_Type *)0u, LPI2C1, LPI2C2, LPI2C3, LPI2C4                                                               \
+    }
 /** Interrupt vectors for the LPI2C peripheral type */
-#define LPI2C_IRQS                               { NotAvail_IRQn, LPI2C1_IRQn, LPI2C2_IRQn, LPI2C3_IRQn, LPI2C4_IRQn }
+#define LPI2C_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPI2C1_IRQn, LPI2C2_IRQn, LPI2C3_IRQn, LPI2C4_IRQn                                              \
+    }
 
 /*!
  * @}
  */ /* end of group LPI2C_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPSPI Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -14320,29 +16512,30 @@ typedef struct {
  */
 
 /** LPSPI - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-       uint8_t RESERVED_0[8];
-  __IO uint32_t CR;                                /**< Control Register, offset: 0x10 */
-  __IO uint32_t SR;                                /**< Status Register, offset: 0x14 */
-  __IO uint32_t IER;                               /**< Interrupt Enable Register, offset: 0x18 */
-  __IO uint32_t DER;                               /**< DMA Enable Register, offset: 0x1C */
-  __IO uint32_t CFGR0;                             /**< Configuration Register 0, offset: 0x20 */
-  __IO uint32_t CFGR1;                             /**< Configuration Register 1, offset: 0x24 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t DMR0;                              /**< Data Match Register 0, offset: 0x30 */
-  __IO uint32_t DMR1;                              /**< Data Match Register 1, offset: 0x34 */
-       uint8_t RESERVED_2[8];
-  __IO uint32_t CCR;                               /**< Clock Configuration Register, offset: 0x40 */
-       uint8_t RESERVED_3[20];
-  __IO uint32_t FCR;                               /**< FIFO Control Register, offset: 0x58 */
-  __I  uint32_t FSR;                               /**< FIFO Status Register, offset: 0x5C */
-  __IO uint32_t TCR;                               /**< Transmit Command Register, offset: 0x60 */
-  __O  uint32_t TDR;                               /**< Transmit Data Register, offset: 0x64 */
-       uint8_t RESERVED_4[8];
-  __I  uint32_t RSR;                               /**< Receive Status Register, offset: 0x70 */
-  __I  uint32_t RDR;                               /**< Receive Data Register, offset: 0x74 */
+typedef struct
+{
+    __I uint32_t VERID; /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM; /**< Parameter Register, offset: 0x4 */
+    uint8_t RESERVED_0[8];
+    __IO uint32_t CR;    /**< Control Register, offset: 0x10 */
+    __IO uint32_t SR;    /**< Status Register, offset: 0x14 */
+    __IO uint32_t IER;   /**< Interrupt Enable Register, offset: 0x18 */
+    __IO uint32_t DER;   /**< DMA Enable Register, offset: 0x1C */
+    __IO uint32_t CFGR0; /**< Configuration Register 0, offset: 0x20 */
+    __IO uint32_t CFGR1; /**< Configuration Register 1, offset: 0x24 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t DMR0; /**< Data Match Register 0, offset: 0x30 */
+    __IO uint32_t DMR1; /**< Data Match Register 1, offset: 0x34 */
+    uint8_t RESERVED_2[8];
+    __IO uint32_t CCR; /**< Clock Configuration Register, offset: 0x40 */
+    uint8_t RESERVED_3[20];
+    __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */
+    __I uint32_t FSR;  /**< FIFO Status Register, offset: 0x5C */
+    __IO uint32_t TCR; /**< Transmit Command Register, offset: 0x60 */
+    __O uint32_t TDR;  /**< Transmit Data Register, offset: 0x64 */
+    uint8_t RESERVED_4[8];
+    __I uint32_t RSR; /**< Receive Status Register, offset: 0x70 */
+    __I uint32_t RDR; /**< Receive Data Register, offset: 0x74 */
 } LPSPI_Type;
 
 /* ----------------------------------------------------------------------------
@@ -14356,320 +16549,326 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPSPI_VERID_FEATURE_MASK                 (0xFFFFU)
-#define LPSPI_VERID_FEATURE_SHIFT                (0U)
-#define LPSPI_VERID_FEATURE(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_FEATURE_SHIFT)) & LPSPI_VERID_FEATURE_MASK)
-#define LPSPI_VERID_MINOR_MASK                   (0xFF0000U)
-#define LPSPI_VERID_MINOR_SHIFT                  (16U)
-#define LPSPI_VERID_MINOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MINOR_SHIFT)) & LPSPI_VERID_MINOR_MASK)
-#define LPSPI_VERID_MAJOR_MASK                   (0xFF000000U)
-#define LPSPI_VERID_MAJOR_SHIFT                  (24U)
-#define LPSPI_VERID_MAJOR(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MAJOR_SHIFT)) & LPSPI_VERID_MAJOR_MASK)
+#define LPSPI_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPSPI_VERID_FEATURE_SHIFT (0U)
+#define LPSPI_VERID_FEATURE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_FEATURE_SHIFT)) & LPSPI_VERID_FEATURE_MASK)
+#define LPSPI_VERID_MINOR_MASK    (0xFF0000U)
+#define LPSPI_VERID_MINOR_SHIFT   (16U)
+#define LPSPI_VERID_MINOR(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MINOR_SHIFT)) & LPSPI_VERID_MINOR_MASK)
+#define LPSPI_VERID_MAJOR_MASK    (0xFF000000U)
+#define LPSPI_VERID_MAJOR_SHIFT   (24U)
+#define LPSPI_VERID_MAJOR(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_VERID_MAJOR_SHIFT)) & LPSPI_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPSPI_PARAM_TXFIFO_MASK                  (0xFFU)
-#define LPSPI_PARAM_TXFIFO_SHIFT                 (0U)
-#define LPSPI_PARAM_TXFIFO(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_TXFIFO_SHIFT)) & LPSPI_PARAM_TXFIFO_MASK)
-#define LPSPI_PARAM_RXFIFO_MASK                  (0xFF00U)
-#define LPSPI_PARAM_RXFIFO_SHIFT                 (8U)
-#define LPSPI_PARAM_RXFIFO(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_RXFIFO_SHIFT)) & LPSPI_PARAM_RXFIFO_MASK)
-#define LPSPI_PARAM_PCSNUM_MASK                  (0xFF0000U)
-#define LPSPI_PARAM_PCSNUM_SHIFT                 (16U)
-#define LPSPI_PARAM_PCSNUM(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_PCSNUM_SHIFT)) & LPSPI_PARAM_PCSNUM_MASK)
+#define LPSPI_PARAM_TXFIFO_MASK  (0xFFU)
+#define LPSPI_PARAM_TXFIFO_SHIFT (0U)
+#define LPSPI_PARAM_TXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_TXFIFO_SHIFT)) & LPSPI_PARAM_TXFIFO_MASK)
+#define LPSPI_PARAM_RXFIFO_MASK  (0xFF00U)
+#define LPSPI_PARAM_RXFIFO_SHIFT (8U)
+#define LPSPI_PARAM_RXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_RXFIFO_SHIFT)) & LPSPI_PARAM_RXFIFO_MASK)
+#define LPSPI_PARAM_PCSNUM_MASK  (0xFF0000U)
+#define LPSPI_PARAM_PCSNUM_SHIFT (16U)
+#define LPSPI_PARAM_PCSNUM(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_PARAM_PCSNUM_SHIFT)) & LPSPI_PARAM_PCSNUM_MASK)
 /*! @} */
 
 /*! @name CR - Control Register */
 /*! @{ */
-#define LPSPI_CR_MEN_MASK                        (0x1U)
-#define LPSPI_CR_MEN_SHIFT                       (0U)
-#define LPSPI_CR_MEN(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_MEN_SHIFT)) & LPSPI_CR_MEN_MASK)
-#define LPSPI_CR_RST_MASK                        (0x2U)
-#define LPSPI_CR_RST_SHIFT                       (1U)
-#define LPSPI_CR_RST(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RST_SHIFT)) & LPSPI_CR_RST_MASK)
-#define LPSPI_CR_DOZEN_MASK                      (0x4U)
-#define LPSPI_CR_DOZEN_SHIFT                     (2U)
-#define LPSPI_CR_DOZEN(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DOZEN_SHIFT)) & LPSPI_CR_DOZEN_MASK)
-#define LPSPI_CR_DBGEN_MASK                      (0x8U)
-#define LPSPI_CR_DBGEN_SHIFT                     (3U)
-#define LPSPI_CR_DBGEN(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DBGEN_SHIFT)) & LPSPI_CR_DBGEN_MASK)
-#define LPSPI_CR_RTF_MASK                        (0x100U)
-#define LPSPI_CR_RTF_SHIFT                       (8U)
-#define LPSPI_CR_RTF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RTF_SHIFT)) & LPSPI_CR_RTF_MASK)
-#define LPSPI_CR_RRF_MASK                        (0x200U)
-#define LPSPI_CR_RRF_SHIFT                       (9U)
-#define LPSPI_CR_RRF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RRF_SHIFT)) & LPSPI_CR_RRF_MASK)
+#define LPSPI_CR_MEN_MASK    (0x1U)
+#define LPSPI_CR_MEN_SHIFT   (0U)
+#define LPSPI_CR_MEN(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_MEN_SHIFT)) & LPSPI_CR_MEN_MASK)
+#define LPSPI_CR_RST_MASK    (0x2U)
+#define LPSPI_CR_RST_SHIFT   (1U)
+#define LPSPI_CR_RST(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RST_SHIFT)) & LPSPI_CR_RST_MASK)
+#define LPSPI_CR_DOZEN_MASK  (0x4U)
+#define LPSPI_CR_DOZEN_SHIFT (2U)
+#define LPSPI_CR_DOZEN(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DOZEN_SHIFT)) & LPSPI_CR_DOZEN_MASK)
+#define LPSPI_CR_DBGEN_MASK  (0x8U)
+#define LPSPI_CR_DBGEN_SHIFT (3U)
+#define LPSPI_CR_DBGEN(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_DBGEN_SHIFT)) & LPSPI_CR_DBGEN_MASK)
+#define LPSPI_CR_RTF_MASK    (0x100U)
+#define LPSPI_CR_RTF_SHIFT   (8U)
+#define LPSPI_CR_RTF(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RTF_SHIFT)) & LPSPI_CR_RTF_MASK)
+#define LPSPI_CR_RRF_MASK    (0x200U)
+#define LPSPI_CR_RRF_SHIFT   (9U)
+#define LPSPI_CR_RRF(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CR_RRF_SHIFT)) & LPSPI_CR_RRF_MASK)
 /*! @} */
 
 /*! @name SR - Status Register */
 /*! @{ */
-#define LPSPI_SR_TDF_MASK                        (0x1U)
-#define LPSPI_SR_TDF_SHIFT                       (0U)
-#define LPSPI_SR_TDF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TDF_SHIFT)) & LPSPI_SR_TDF_MASK)
-#define LPSPI_SR_RDF_MASK                        (0x2U)
-#define LPSPI_SR_RDF_SHIFT                       (1U)
-#define LPSPI_SR_RDF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_RDF_SHIFT)) & LPSPI_SR_RDF_MASK)
-#define LPSPI_SR_WCF_MASK                        (0x100U)
-#define LPSPI_SR_WCF_SHIFT                       (8U)
-#define LPSPI_SR_WCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_WCF_SHIFT)) & LPSPI_SR_WCF_MASK)
-#define LPSPI_SR_FCF_MASK                        (0x200U)
-#define LPSPI_SR_FCF_SHIFT                       (9U)
-#define LPSPI_SR_FCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_FCF_SHIFT)) & LPSPI_SR_FCF_MASK)
-#define LPSPI_SR_TCF_MASK                        (0x400U)
-#define LPSPI_SR_TCF_SHIFT                       (10U)
-#define LPSPI_SR_TCF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TCF_SHIFT)) & LPSPI_SR_TCF_MASK)
-#define LPSPI_SR_TEF_MASK                        (0x800U)
-#define LPSPI_SR_TEF_SHIFT                       (11U)
-#define LPSPI_SR_TEF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TEF_SHIFT)) & LPSPI_SR_TEF_MASK)
-#define LPSPI_SR_REF_MASK                        (0x1000U)
-#define LPSPI_SR_REF_SHIFT                       (12U)
-#define LPSPI_SR_REF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_REF_SHIFT)) & LPSPI_SR_REF_MASK)
-#define LPSPI_SR_DMF_MASK                        (0x2000U)
-#define LPSPI_SR_DMF_SHIFT                       (13U)
-#define LPSPI_SR_DMF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_DMF_SHIFT)) & LPSPI_SR_DMF_MASK)
-#define LPSPI_SR_MBF_MASK                        (0x1000000U)
-#define LPSPI_SR_MBF_SHIFT                       (24U)
-#define LPSPI_SR_MBF(x)                          (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_MBF_SHIFT)) & LPSPI_SR_MBF_MASK)
+#define LPSPI_SR_TDF_MASK  (0x1U)
+#define LPSPI_SR_TDF_SHIFT (0U)
+#define LPSPI_SR_TDF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TDF_SHIFT)) & LPSPI_SR_TDF_MASK)
+#define LPSPI_SR_RDF_MASK  (0x2U)
+#define LPSPI_SR_RDF_SHIFT (1U)
+#define LPSPI_SR_RDF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_RDF_SHIFT)) & LPSPI_SR_RDF_MASK)
+#define LPSPI_SR_WCF_MASK  (0x100U)
+#define LPSPI_SR_WCF_SHIFT (8U)
+#define LPSPI_SR_WCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_WCF_SHIFT)) & LPSPI_SR_WCF_MASK)
+#define LPSPI_SR_FCF_MASK  (0x200U)
+#define LPSPI_SR_FCF_SHIFT (9U)
+#define LPSPI_SR_FCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_FCF_SHIFT)) & LPSPI_SR_FCF_MASK)
+#define LPSPI_SR_TCF_MASK  (0x400U)
+#define LPSPI_SR_TCF_SHIFT (10U)
+#define LPSPI_SR_TCF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TCF_SHIFT)) & LPSPI_SR_TCF_MASK)
+#define LPSPI_SR_TEF_MASK  (0x800U)
+#define LPSPI_SR_TEF_SHIFT (11U)
+#define LPSPI_SR_TEF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_TEF_SHIFT)) & LPSPI_SR_TEF_MASK)
+#define LPSPI_SR_REF_MASK  (0x1000U)
+#define LPSPI_SR_REF_SHIFT (12U)
+#define LPSPI_SR_REF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_REF_SHIFT)) & LPSPI_SR_REF_MASK)
+#define LPSPI_SR_DMF_MASK  (0x2000U)
+#define LPSPI_SR_DMF_SHIFT (13U)
+#define LPSPI_SR_DMF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_DMF_SHIFT)) & LPSPI_SR_DMF_MASK)
+#define LPSPI_SR_MBF_MASK  (0x1000000U)
+#define LPSPI_SR_MBF_SHIFT (24U)
+#define LPSPI_SR_MBF(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_SR_MBF_SHIFT)) & LPSPI_SR_MBF_MASK)
 /*! @} */
 
 /*! @name IER - Interrupt Enable Register */
 /*! @{ */
-#define LPSPI_IER_TDIE_MASK                      (0x1U)
-#define LPSPI_IER_TDIE_SHIFT                     (0U)
-#define LPSPI_IER_TDIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TDIE_SHIFT)) & LPSPI_IER_TDIE_MASK)
-#define LPSPI_IER_RDIE_MASK                      (0x2U)
-#define LPSPI_IER_RDIE_SHIFT                     (1U)
-#define LPSPI_IER_RDIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_RDIE_SHIFT)) & LPSPI_IER_RDIE_MASK)
-#define LPSPI_IER_WCIE_MASK                      (0x100U)
-#define LPSPI_IER_WCIE_SHIFT                     (8U)
-#define LPSPI_IER_WCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_WCIE_SHIFT)) & LPSPI_IER_WCIE_MASK)
-#define LPSPI_IER_FCIE_MASK                      (0x200U)
-#define LPSPI_IER_FCIE_SHIFT                     (9U)
-#define LPSPI_IER_FCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_FCIE_SHIFT)) & LPSPI_IER_FCIE_MASK)
-#define LPSPI_IER_TCIE_MASK                      (0x400U)
-#define LPSPI_IER_TCIE_SHIFT                     (10U)
-#define LPSPI_IER_TCIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TCIE_SHIFT)) & LPSPI_IER_TCIE_MASK)
-#define LPSPI_IER_TEIE_MASK                      (0x800U)
-#define LPSPI_IER_TEIE_SHIFT                     (11U)
-#define LPSPI_IER_TEIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TEIE_SHIFT)) & LPSPI_IER_TEIE_MASK)
-#define LPSPI_IER_REIE_MASK                      (0x1000U)
-#define LPSPI_IER_REIE_SHIFT                     (12U)
-#define LPSPI_IER_REIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_REIE_SHIFT)) & LPSPI_IER_REIE_MASK)
-#define LPSPI_IER_DMIE_MASK                      (0x2000U)
-#define LPSPI_IER_DMIE_SHIFT                     (13U)
-#define LPSPI_IER_DMIE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_DMIE_SHIFT)) & LPSPI_IER_DMIE_MASK)
+#define LPSPI_IER_TDIE_MASK  (0x1U)
+#define LPSPI_IER_TDIE_SHIFT (0U)
+#define LPSPI_IER_TDIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TDIE_SHIFT)) & LPSPI_IER_TDIE_MASK)
+#define LPSPI_IER_RDIE_MASK  (0x2U)
+#define LPSPI_IER_RDIE_SHIFT (1U)
+#define LPSPI_IER_RDIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_RDIE_SHIFT)) & LPSPI_IER_RDIE_MASK)
+#define LPSPI_IER_WCIE_MASK  (0x100U)
+#define LPSPI_IER_WCIE_SHIFT (8U)
+#define LPSPI_IER_WCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_WCIE_SHIFT)) & LPSPI_IER_WCIE_MASK)
+#define LPSPI_IER_FCIE_MASK  (0x200U)
+#define LPSPI_IER_FCIE_SHIFT (9U)
+#define LPSPI_IER_FCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_FCIE_SHIFT)) & LPSPI_IER_FCIE_MASK)
+#define LPSPI_IER_TCIE_MASK  (0x400U)
+#define LPSPI_IER_TCIE_SHIFT (10U)
+#define LPSPI_IER_TCIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TCIE_SHIFT)) & LPSPI_IER_TCIE_MASK)
+#define LPSPI_IER_TEIE_MASK  (0x800U)
+#define LPSPI_IER_TEIE_SHIFT (11U)
+#define LPSPI_IER_TEIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_TEIE_SHIFT)) & LPSPI_IER_TEIE_MASK)
+#define LPSPI_IER_REIE_MASK  (0x1000U)
+#define LPSPI_IER_REIE_SHIFT (12U)
+#define LPSPI_IER_REIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_REIE_SHIFT)) & LPSPI_IER_REIE_MASK)
+#define LPSPI_IER_DMIE_MASK  (0x2000U)
+#define LPSPI_IER_DMIE_SHIFT (13U)
+#define LPSPI_IER_DMIE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_IER_DMIE_SHIFT)) & LPSPI_IER_DMIE_MASK)
 /*! @} */
 
 /*! @name DER - DMA Enable Register */
 /*! @{ */
-#define LPSPI_DER_TDDE_MASK                      (0x1U)
-#define LPSPI_DER_TDDE_SHIFT                     (0U)
-#define LPSPI_DER_TDDE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_TDDE_SHIFT)) & LPSPI_DER_TDDE_MASK)
-#define LPSPI_DER_RDDE_MASK                      (0x2U)
-#define LPSPI_DER_RDDE_SHIFT                     (1U)
-#define LPSPI_DER_RDDE(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_RDDE_SHIFT)) & LPSPI_DER_RDDE_MASK)
+#define LPSPI_DER_TDDE_MASK  (0x1U)
+#define LPSPI_DER_TDDE_SHIFT (0U)
+#define LPSPI_DER_TDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_TDDE_SHIFT)) & LPSPI_DER_TDDE_MASK)
+#define LPSPI_DER_RDDE_MASK  (0x2U)
+#define LPSPI_DER_RDDE_SHIFT (1U)
+#define LPSPI_DER_RDDE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DER_RDDE_SHIFT)) & LPSPI_DER_RDDE_MASK)
 /*! @} */
 
 /*! @name CFGR0 - Configuration Register 0 */
 /*! @{ */
-#define LPSPI_CFGR0_HREN_MASK                    (0x1U)
-#define LPSPI_CFGR0_HREN_SHIFT                   (0U)
-#define LPSPI_CFGR0_HREN(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HREN_SHIFT)) & LPSPI_CFGR0_HREN_MASK)
-#define LPSPI_CFGR0_HRPOL_MASK                   (0x2U)
-#define LPSPI_CFGR0_HRPOL_SHIFT                  (1U)
-#define LPSPI_CFGR0_HRPOL(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRPOL_SHIFT)) & LPSPI_CFGR0_HRPOL_MASK)
-#define LPSPI_CFGR0_HRSEL_MASK                   (0x4U)
-#define LPSPI_CFGR0_HRSEL_SHIFT                  (2U)
-#define LPSPI_CFGR0_HRSEL(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRSEL_SHIFT)) & LPSPI_CFGR0_HRSEL_MASK)
-#define LPSPI_CFGR0_CIRFIFO_MASK                 (0x100U)
-#define LPSPI_CFGR0_CIRFIFO_SHIFT                (8U)
-#define LPSPI_CFGR0_CIRFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_CIRFIFO_SHIFT)) & LPSPI_CFGR0_CIRFIFO_MASK)
-#define LPSPI_CFGR0_RDMO_MASK                    (0x200U)
-#define LPSPI_CFGR0_RDMO_SHIFT                   (9U)
-#define LPSPI_CFGR0_RDMO(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_RDMO_SHIFT)) & LPSPI_CFGR0_RDMO_MASK)
+#define LPSPI_CFGR0_HREN_MASK     (0x1U)
+#define LPSPI_CFGR0_HREN_SHIFT    (0U)
+#define LPSPI_CFGR0_HREN(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HREN_SHIFT)) & LPSPI_CFGR0_HREN_MASK)
+#define LPSPI_CFGR0_HRPOL_MASK    (0x2U)
+#define LPSPI_CFGR0_HRPOL_SHIFT   (1U)
+#define LPSPI_CFGR0_HRPOL(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRPOL_SHIFT)) & LPSPI_CFGR0_HRPOL_MASK)
+#define LPSPI_CFGR0_HRSEL_MASK    (0x4U)
+#define LPSPI_CFGR0_HRSEL_SHIFT   (2U)
+#define LPSPI_CFGR0_HRSEL(x)      (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_HRSEL_SHIFT)) & LPSPI_CFGR0_HRSEL_MASK)
+#define LPSPI_CFGR0_CIRFIFO_MASK  (0x100U)
+#define LPSPI_CFGR0_CIRFIFO_SHIFT (8U)
+#define LPSPI_CFGR0_CIRFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_CIRFIFO_SHIFT)) & LPSPI_CFGR0_CIRFIFO_MASK)
+#define LPSPI_CFGR0_RDMO_MASK     (0x200U)
+#define LPSPI_CFGR0_RDMO_SHIFT    (9U)
+#define LPSPI_CFGR0_RDMO(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR0_RDMO_SHIFT)) & LPSPI_CFGR0_RDMO_MASK)
 /*! @} */
 
 /*! @name CFGR1 - Configuration Register 1 */
 /*! @{ */
-#define LPSPI_CFGR1_MASTER_MASK                  (0x1U)
-#define LPSPI_CFGR1_MASTER_SHIFT                 (0U)
-#define LPSPI_CFGR1_MASTER(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MASTER_SHIFT)) & LPSPI_CFGR1_MASTER_MASK)
-#define LPSPI_CFGR1_SAMPLE_MASK                  (0x2U)
-#define LPSPI_CFGR1_SAMPLE_SHIFT                 (1U)
-#define LPSPI_CFGR1_SAMPLE(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_SAMPLE_SHIFT)) & LPSPI_CFGR1_SAMPLE_MASK)
-#define LPSPI_CFGR1_AUTOPCS_MASK                 (0x4U)
-#define LPSPI_CFGR1_AUTOPCS_SHIFT                (2U)
-#define LPSPI_CFGR1_AUTOPCS(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_AUTOPCS_SHIFT)) & LPSPI_CFGR1_AUTOPCS_MASK)
-#define LPSPI_CFGR1_NOSTALL_MASK                 (0x8U)
-#define LPSPI_CFGR1_NOSTALL_SHIFT                (3U)
-#define LPSPI_CFGR1_NOSTALL(x)                   (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_NOSTALL_SHIFT)) & LPSPI_CFGR1_NOSTALL_MASK)
-#define LPSPI_CFGR1_PCSPOL_MASK                  (0xF00U)
-#define LPSPI_CFGR1_PCSPOL_SHIFT                 (8U)
-#define LPSPI_CFGR1_PCSPOL(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSPOL_SHIFT)) & LPSPI_CFGR1_PCSPOL_MASK)
-#define LPSPI_CFGR1_MATCFG_MASK                  (0x70000U)
-#define LPSPI_CFGR1_MATCFG_SHIFT                 (16U)
-#define LPSPI_CFGR1_MATCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MATCFG_SHIFT)) & LPSPI_CFGR1_MATCFG_MASK)
-#define LPSPI_CFGR1_PINCFG_MASK                  (0x3000000U)
-#define LPSPI_CFGR1_PINCFG_SHIFT                 (24U)
-#define LPSPI_CFGR1_PINCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
-#define LPSPI_CFGR1_OUTCFG_MASK                  (0x4000000U)
-#define LPSPI_CFGR1_OUTCFG_SHIFT                 (26U)
-#define LPSPI_CFGR1_OUTCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_OUTCFG_SHIFT)) & LPSPI_CFGR1_OUTCFG_MASK)
-#define LPSPI_CFGR1_PCSCFG_MASK                  (0x8000000U)
-#define LPSPI_CFGR1_PCSCFG_SHIFT                 (27U)
-#define LPSPI_CFGR1_PCSCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSCFG_SHIFT)) & LPSPI_CFGR1_PCSCFG_MASK)
+#define LPSPI_CFGR1_MASTER_MASK   (0x1U)
+#define LPSPI_CFGR1_MASTER_SHIFT  (0U)
+#define LPSPI_CFGR1_MASTER(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MASTER_SHIFT)) & LPSPI_CFGR1_MASTER_MASK)
+#define LPSPI_CFGR1_SAMPLE_MASK   (0x2U)
+#define LPSPI_CFGR1_SAMPLE_SHIFT  (1U)
+#define LPSPI_CFGR1_SAMPLE(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_SAMPLE_SHIFT)) & LPSPI_CFGR1_SAMPLE_MASK)
+#define LPSPI_CFGR1_AUTOPCS_MASK  (0x4U)
+#define LPSPI_CFGR1_AUTOPCS_SHIFT (2U)
+#define LPSPI_CFGR1_AUTOPCS(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_AUTOPCS_SHIFT)) & LPSPI_CFGR1_AUTOPCS_MASK)
+#define LPSPI_CFGR1_NOSTALL_MASK  (0x8U)
+#define LPSPI_CFGR1_NOSTALL_SHIFT (3U)
+#define LPSPI_CFGR1_NOSTALL(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_NOSTALL_SHIFT)) & LPSPI_CFGR1_NOSTALL_MASK)
+#define LPSPI_CFGR1_PCSPOL_MASK   (0xF00U)
+#define LPSPI_CFGR1_PCSPOL_SHIFT  (8U)
+#define LPSPI_CFGR1_PCSPOL(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSPOL_SHIFT)) & LPSPI_CFGR1_PCSPOL_MASK)
+#define LPSPI_CFGR1_MATCFG_MASK   (0x70000U)
+#define LPSPI_CFGR1_MATCFG_SHIFT  (16U)
+#define LPSPI_CFGR1_MATCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_MATCFG_SHIFT)) & LPSPI_CFGR1_MATCFG_MASK)
+#define LPSPI_CFGR1_PINCFG_MASK   (0x3000000U)
+#define LPSPI_CFGR1_PINCFG_SHIFT  (24U)
+#define LPSPI_CFGR1_PINCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
+#define LPSPI_CFGR1_OUTCFG_MASK   (0x4000000U)
+#define LPSPI_CFGR1_OUTCFG_SHIFT  (26U)
+#define LPSPI_CFGR1_OUTCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_OUTCFG_SHIFT)) & LPSPI_CFGR1_OUTCFG_MASK)
+#define LPSPI_CFGR1_PCSCFG_MASK   (0x8000000U)
+#define LPSPI_CFGR1_PCSCFG_SHIFT  (27U)
+#define LPSPI_CFGR1_PCSCFG(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PCSCFG_SHIFT)) & LPSPI_CFGR1_PCSCFG_MASK)
 /*! @} */
 
 /*! @name DMR0 - Data Match Register 0 */
 /*! @{ */
-#define LPSPI_DMR0_MATCH0_MASK                   (0xFFFFFFFFU)
-#define LPSPI_DMR0_MATCH0_SHIFT                  (0U)
-#define LPSPI_DMR0_MATCH0(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
+#define LPSPI_DMR0_MATCH0_MASK  (0xFFFFFFFFU)
+#define LPSPI_DMR0_MATCH0_SHIFT (0U)
+#define LPSPI_DMR0_MATCH0(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
 /*! @} */
 
 /*! @name DMR1 - Data Match Register 1 */
 /*! @{ */
-#define LPSPI_DMR1_MATCH1_MASK                   (0xFFFFFFFFU)
-#define LPSPI_DMR1_MATCH1_SHIFT                  (0U)
-#define LPSPI_DMR1_MATCH1(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR1_MATCH1_SHIFT)) & LPSPI_DMR1_MATCH1_MASK)
+#define LPSPI_DMR1_MATCH1_MASK  (0xFFFFFFFFU)
+#define LPSPI_DMR1_MATCH1_SHIFT (0U)
+#define LPSPI_DMR1_MATCH1(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR1_MATCH1_SHIFT)) & LPSPI_DMR1_MATCH1_MASK)
 /*! @} */
 
 /*! @name CCR - Clock Configuration Register */
 /*! @{ */
-#define LPSPI_CCR_SCKDIV_MASK                    (0xFFU)
-#define LPSPI_CCR_SCKDIV_SHIFT                   (0U)
-#define LPSPI_CCR_SCKDIV(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKDIV_SHIFT)) & LPSPI_CCR_SCKDIV_MASK)
-#define LPSPI_CCR_DBT_MASK                       (0xFF00U)
-#define LPSPI_CCR_DBT_SHIFT                      (8U)
-#define LPSPI_CCR_DBT(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_DBT_SHIFT)) & LPSPI_CCR_DBT_MASK)
-#define LPSPI_CCR_PCSSCK_MASK                    (0xFF0000U)
-#define LPSPI_CCR_PCSSCK_SHIFT                   (16U)
-#define LPSPI_CCR_PCSSCK(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_PCSSCK_SHIFT)) & LPSPI_CCR_PCSSCK_MASK)
-#define LPSPI_CCR_SCKPCS_MASK                    (0xFF000000U)
-#define LPSPI_CCR_SCKPCS_SHIFT                   (24U)
-#define LPSPI_CCR_SCKPCS(x)                      (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKPCS_SHIFT)) & LPSPI_CCR_SCKPCS_MASK)
+#define LPSPI_CCR_SCKDIV_MASK  (0xFFU)
+#define LPSPI_CCR_SCKDIV_SHIFT (0U)
+#define LPSPI_CCR_SCKDIV(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKDIV_SHIFT)) & LPSPI_CCR_SCKDIV_MASK)
+#define LPSPI_CCR_DBT_MASK     (0xFF00U)
+#define LPSPI_CCR_DBT_SHIFT    (8U)
+#define LPSPI_CCR_DBT(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_DBT_SHIFT)) & LPSPI_CCR_DBT_MASK)
+#define LPSPI_CCR_PCSSCK_MASK  (0xFF0000U)
+#define LPSPI_CCR_PCSSCK_SHIFT (16U)
+#define LPSPI_CCR_PCSSCK(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_PCSSCK_SHIFT)) & LPSPI_CCR_PCSSCK_MASK)
+#define LPSPI_CCR_SCKPCS_MASK  (0xFF000000U)
+#define LPSPI_CCR_SCKPCS_SHIFT (24U)
+#define LPSPI_CCR_SCKPCS(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_CCR_SCKPCS_SHIFT)) & LPSPI_CCR_SCKPCS_MASK)
 /*! @} */
 
 /*! @name FCR - FIFO Control Register */
 /*! @{ */
-#define LPSPI_FCR_TXWATER_MASK                   (0xFU)
-#define LPSPI_FCR_TXWATER_SHIFT                  (0U)
-#define LPSPI_FCR_TXWATER(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_TXWATER_SHIFT)) & LPSPI_FCR_TXWATER_MASK)
-#define LPSPI_FCR_RXWATER_MASK                   (0xF0000U)
-#define LPSPI_FCR_RXWATER_SHIFT                  (16U)
-#define LPSPI_FCR_RXWATER(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_RXWATER_SHIFT)) & LPSPI_FCR_RXWATER_MASK)
+#define LPSPI_FCR_TXWATER_MASK  (0xFU)
+#define LPSPI_FCR_TXWATER_SHIFT (0U)
+#define LPSPI_FCR_TXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_TXWATER_SHIFT)) & LPSPI_FCR_TXWATER_MASK)
+#define LPSPI_FCR_RXWATER_MASK  (0xF0000U)
+#define LPSPI_FCR_RXWATER_SHIFT (16U)
+#define LPSPI_FCR_RXWATER(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FCR_RXWATER_SHIFT)) & LPSPI_FCR_RXWATER_MASK)
 /*! @} */
 
 /*! @name FSR - FIFO Status Register */
 /*! @{ */
-#define LPSPI_FSR_TXCOUNT_MASK                   (0x1FU)
-#define LPSPI_FSR_TXCOUNT_SHIFT                  (0U)
-#define LPSPI_FSR_TXCOUNT(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_TXCOUNT_SHIFT)) & LPSPI_FSR_TXCOUNT_MASK)
-#define LPSPI_FSR_RXCOUNT_MASK                   (0x1F0000U)
-#define LPSPI_FSR_RXCOUNT_SHIFT                  (16U)
-#define LPSPI_FSR_RXCOUNT(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_RXCOUNT_SHIFT)) & LPSPI_FSR_RXCOUNT_MASK)
+#define LPSPI_FSR_TXCOUNT_MASK  (0x1FU)
+#define LPSPI_FSR_TXCOUNT_SHIFT (0U)
+#define LPSPI_FSR_TXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_TXCOUNT_SHIFT)) & LPSPI_FSR_TXCOUNT_MASK)
+#define LPSPI_FSR_RXCOUNT_MASK  (0x1F0000U)
+#define LPSPI_FSR_RXCOUNT_SHIFT (16U)
+#define LPSPI_FSR_RXCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_FSR_RXCOUNT_SHIFT)) & LPSPI_FSR_RXCOUNT_MASK)
 /*! @} */
 
 /*! @name TCR - Transmit Command Register */
 /*! @{ */
-#define LPSPI_TCR_FRAMESZ_MASK                   (0xFFFU)
-#define LPSPI_TCR_FRAMESZ_SHIFT                  (0U)
-#define LPSPI_TCR_FRAMESZ(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_FRAMESZ_SHIFT)) & LPSPI_TCR_FRAMESZ_MASK)
-#define LPSPI_TCR_WIDTH_MASK                     (0x30000U)
-#define LPSPI_TCR_WIDTH_SHIFT                    (16U)
-#define LPSPI_TCR_WIDTH(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_WIDTH_SHIFT)) & LPSPI_TCR_WIDTH_MASK)
-#define LPSPI_TCR_TXMSK_MASK                     (0x40000U)
-#define LPSPI_TCR_TXMSK_SHIFT                    (18U)
-#define LPSPI_TCR_TXMSK(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_TXMSK_SHIFT)) & LPSPI_TCR_TXMSK_MASK)
-#define LPSPI_TCR_RXMSK_MASK                     (0x80000U)
-#define LPSPI_TCR_RXMSK_SHIFT                    (19U)
-#define LPSPI_TCR_RXMSK(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_RXMSK_SHIFT)) & LPSPI_TCR_RXMSK_MASK)
-#define LPSPI_TCR_CONTC_MASK                     (0x100000U)
-#define LPSPI_TCR_CONTC_SHIFT                    (20U)
-#define LPSPI_TCR_CONTC(x)                       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONTC_SHIFT)) & LPSPI_TCR_CONTC_MASK)
-#define LPSPI_TCR_CONT_MASK                      (0x200000U)
-#define LPSPI_TCR_CONT_SHIFT                     (21U)
-#define LPSPI_TCR_CONT(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONT_SHIFT)) & LPSPI_TCR_CONT_MASK)
-#define LPSPI_TCR_BYSW_MASK                      (0x400000U)
-#define LPSPI_TCR_BYSW_SHIFT                     (22U)
-#define LPSPI_TCR_BYSW(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_BYSW_SHIFT)) & LPSPI_TCR_BYSW_MASK)
-#define LPSPI_TCR_LSBF_MASK                      (0x800000U)
-#define LPSPI_TCR_LSBF_SHIFT                     (23U)
-#define LPSPI_TCR_LSBF(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_LSBF_SHIFT)) & LPSPI_TCR_LSBF_MASK)
-#define LPSPI_TCR_PCS_MASK                       (0x3000000U)
-#define LPSPI_TCR_PCS_SHIFT                      (24U)
-#define LPSPI_TCR_PCS(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PCS_SHIFT)) & LPSPI_TCR_PCS_MASK)
-#define LPSPI_TCR_PRESCALE_MASK                  (0x38000000U)
-#define LPSPI_TCR_PRESCALE_SHIFT                 (27U)
-#define LPSPI_TCR_PRESCALE(x)                    (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PRESCALE_SHIFT)) & LPSPI_TCR_PRESCALE_MASK)
-#define LPSPI_TCR_CPHA_MASK                      (0x40000000U)
-#define LPSPI_TCR_CPHA_SHIFT                     (30U)
-#define LPSPI_TCR_CPHA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPHA_SHIFT)) & LPSPI_TCR_CPHA_MASK)
-#define LPSPI_TCR_CPOL_MASK                      (0x80000000U)
-#define LPSPI_TCR_CPOL_SHIFT                     (31U)
-#define LPSPI_TCR_CPOL(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPOL_SHIFT)) & LPSPI_TCR_CPOL_MASK)
+#define LPSPI_TCR_FRAMESZ_MASK   (0xFFFU)
+#define LPSPI_TCR_FRAMESZ_SHIFT  (0U)
+#define LPSPI_TCR_FRAMESZ(x)     (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_FRAMESZ_SHIFT)) & LPSPI_TCR_FRAMESZ_MASK)
+#define LPSPI_TCR_WIDTH_MASK     (0x30000U)
+#define LPSPI_TCR_WIDTH_SHIFT    (16U)
+#define LPSPI_TCR_WIDTH(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_WIDTH_SHIFT)) & LPSPI_TCR_WIDTH_MASK)
+#define LPSPI_TCR_TXMSK_MASK     (0x40000U)
+#define LPSPI_TCR_TXMSK_SHIFT    (18U)
+#define LPSPI_TCR_TXMSK(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_TXMSK_SHIFT)) & LPSPI_TCR_TXMSK_MASK)
+#define LPSPI_TCR_RXMSK_MASK     (0x80000U)
+#define LPSPI_TCR_RXMSK_SHIFT    (19U)
+#define LPSPI_TCR_RXMSK(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_RXMSK_SHIFT)) & LPSPI_TCR_RXMSK_MASK)
+#define LPSPI_TCR_CONTC_MASK     (0x100000U)
+#define LPSPI_TCR_CONTC_SHIFT    (20U)
+#define LPSPI_TCR_CONTC(x)       (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONTC_SHIFT)) & LPSPI_TCR_CONTC_MASK)
+#define LPSPI_TCR_CONT_MASK      (0x200000U)
+#define LPSPI_TCR_CONT_SHIFT     (21U)
+#define LPSPI_TCR_CONT(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CONT_SHIFT)) & LPSPI_TCR_CONT_MASK)
+#define LPSPI_TCR_BYSW_MASK      (0x400000U)
+#define LPSPI_TCR_BYSW_SHIFT     (22U)
+#define LPSPI_TCR_BYSW(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_BYSW_SHIFT)) & LPSPI_TCR_BYSW_MASK)
+#define LPSPI_TCR_LSBF_MASK      (0x800000U)
+#define LPSPI_TCR_LSBF_SHIFT     (23U)
+#define LPSPI_TCR_LSBF(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_LSBF_SHIFT)) & LPSPI_TCR_LSBF_MASK)
+#define LPSPI_TCR_PCS_MASK       (0x3000000U)
+#define LPSPI_TCR_PCS_SHIFT      (24U)
+#define LPSPI_TCR_PCS(x)         (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PCS_SHIFT)) & LPSPI_TCR_PCS_MASK)
+#define LPSPI_TCR_PRESCALE_MASK  (0x38000000U)
+#define LPSPI_TCR_PRESCALE_SHIFT (27U)
+#define LPSPI_TCR_PRESCALE(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_PRESCALE_SHIFT)) & LPSPI_TCR_PRESCALE_MASK)
+#define LPSPI_TCR_CPHA_MASK      (0x40000000U)
+#define LPSPI_TCR_CPHA_SHIFT     (30U)
+#define LPSPI_TCR_CPHA(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPHA_SHIFT)) & LPSPI_TCR_CPHA_MASK)
+#define LPSPI_TCR_CPOL_MASK      (0x80000000U)
+#define LPSPI_TCR_CPOL_SHIFT     (31U)
+#define LPSPI_TCR_CPOL(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_TCR_CPOL_SHIFT)) & LPSPI_TCR_CPOL_MASK)
 /*! @} */
 
 /*! @name TDR - Transmit Data Register */
 /*! @{ */
-#define LPSPI_TDR_DATA_MASK                      (0xFFFFFFFFU)
-#define LPSPI_TDR_DATA_SHIFT                     (0U)
-#define LPSPI_TDR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_TDR_DATA_SHIFT)) & LPSPI_TDR_DATA_MASK)
+#define LPSPI_TDR_DATA_MASK  (0xFFFFFFFFU)
+#define LPSPI_TDR_DATA_SHIFT (0U)
+#define LPSPI_TDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_TDR_DATA_SHIFT)) & LPSPI_TDR_DATA_MASK)
 /*! @} */
 
 /*! @name RSR - Receive Status Register */
 /*! @{ */
-#define LPSPI_RSR_SOF_MASK                       (0x1U)
-#define LPSPI_RSR_SOF_SHIFT                      (0U)
-#define LPSPI_RSR_SOF(x)                         (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_SOF_SHIFT)) & LPSPI_RSR_SOF_MASK)
-#define LPSPI_RSR_RXEMPTY_MASK                   (0x2U)
-#define LPSPI_RSR_RXEMPTY_SHIFT                  (1U)
-#define LPSPI_RSR_RXEMPTY(x)                     (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_RXEMPTY_SHIFT)) & LPSPI_RSR_RXEMPTY_MASK)
+#define LPSPI_RSR_SOF_MASK      (0x1U)
+#define LPSPI_RSR_SOF_SHIFT     (0U)
+#define LPSPI_RSR_SOF(x)        (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_SOF_SHIFT)) & LPSPI_RSR_SOF_MASK)
+#define LPSPI_RSR_RXEMPTY_MASK  (0x2U)
+#define LPSPI_RSR_RXEMPTY_SHIFT (1U)
+#define LPSPI_RSR_RXEMPTY(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_RSR_RXEMPTY_SHIFT)) & LPSPI_RSR_RXEMPTY_MASK)
 /*! @} */
 
 /*! @name RDR - Receive Data Register */
 /*! @{ */
-#define LPSPI_RDR_DATA_MASK                      (0xFFFFFFFFU)
-#define LPSPI_RDR_DATA_SHIFT                     (0U)
-#define LPSPI_RDR_DATA(x)                        (((uint32_t)(((uint32_t)(x)) << LPSPI_RDR_DATA_SHIFT)) & LPSPI_RDR_DATA_MASK)
+#define LPSPI_RDR_DATA_MASK  (0xFFFFFFFFU)
+#define LPSPI_RDR_DATA_SHIFT (0U)
+#define LPSPI_RDR_DATA(x)    (((uint32_t)(((uint32_t)(x)) << LPSPI_RDR_DATA_SHIFT)) & LPSPI_RDR_DATA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPSPI_Register_Masks */
 
-
 /* LPSPI - Peripheral instance base addresses */
 /** Peripheral LPSPI1 base address */
-#define LPSPI1_BASE                              (0x40394000u)
+#define LPSPI1_BASE (0x40394000u)
 /** Peripheral LPSPI1 base pointer */
-#define LPSPI1                                   ((LPSPI_Type *)LPSPI1_BASE)
+#define LPSPI1 ((LPSPI_Type *)LPSPI1_BASE)
 /** Peripheral LPSPI2 base address */
-#define LPSPI2_BASE                              (0x40398000u)
+#define LPSPI2_BASE (0x40398000u)
 /** Peripheral LPSPI2 base pointer */
-#define LPSPI2                                   ((LPSPI_Type *)LPSPI2_BASE)
+#define LPSPI2 ((LPSPI_Type *)LPSPI2_BASE)
 /** Peripheral LPSPI3 base address */
-#define LPSPI3_BASE                              (0x4039C000u)
+#define LPSPI3_BASE (0x4039C000u)
 /** Peripheral LPSPI3 base pointer */
-#define LPSPI3                                   ((LPSPI_Type *)LPSPI3_BASE)
+#define LPSPI3 ((LPSPI_Type *)LPSPI3_BASE)
 /** Peripheral LPSPI4 base address */
-#define LPSPI4_BASE                              (0x403A0000u)
+#define LPSPI4_BASE (0x403A0000u)
 /** Peripheral LPSPI4 base pointer */
-#define LPSPI4                                   ((LPSPI_Type *)LPSPI4_BASE)
+#define LPSPI4 ((LPSPI_Type *)LPSPI4_BASE)
 /** Array initializer of LPSPI peripheral base addresses */
-#define LPSPI_BASE_ADDRS                         { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }
+#define LPSPI_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE                                                         \
+    }
 /** Array initializer of LPSPI peripheral base pointers */
-#define LPSPI_BASE_PTRS                          { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }
+#define LPSPI_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4                                                               \
+    }
 /** Interrupt vectors for the LPSPI peripheral type */
-#define LPSPI_IRQS                               { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }
+#define LPSPI_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn                                              \
+    }
 
 /*!
  * @}
  */ /* end of group LPSPI_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- LPUART Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -14680,19 +16879,20 @@ typedef struct {
  */
 
 /** LPUART - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t VERID;                             /**< Version ID Register, offset: 0x0 */
-  __I  uint32_t PARAM;                             /**< Parameter Register, offset: 0x4 */
-  __IO uint32_t GLOBAL;                            /**< LPUART Global Register, offset: 0x8 */
-  __IO uint32_t PINCFG;                            /**< LPUART Pin Configuration Register, offset: 0xC */
-  __IO uint32_t BAUD;                              /**< LPUART Baud Rate Register, offset: 0x10 */
-  __IO uint32_t STAT;                              /**< LPUART Status Register, offset: 0x14 */
-  __IO uint32_t CTRL;                              /**< LPUART Control Register, offset: 0x18 */
-  __IO uint32_t DATA;                              /**< LPUART Data Register, offset: 0x1C */
-  __IO uint32_t MATCH;                             /**< LPUART Match Address Register, offset: 0x20 */
-  __IO uint32_t MODIR;                             /**< LPUART Modem IrDA Register, offset: 0x24 */
-  __IO uint32_t FIFO;                              /**< LPUART FIFO Register, offset: 0x28 */
-  __IO uint32_t WATER;                             /**< LPUART Watermark Register, offset: 0x2C */
+typedef struct
+{
+    __I uint32_t VERID;   /**< Version ID Register, offset: 0x0 */
+    __I uint32_t PARAM;   /**< Parameter Register, offset: 0x4 */
+    __IO uint32_t GLOBAL; /**< LPUART Global Register, offset: 0x8 */
+    __IO uint32_t PINCFG; /**< LPUART Pin Configuration Register, offset: 0xC */
+    __IO uint32_t BAUD;   /**< LPUART Baud Rate Register, offset: 0x10 */
+    __IO uint32_t STAT;   /**< LPUART Status Register, offset: 0x14 */
+    __IO uint32_t CTRL;   /**< LPUART Control Register, offset: 0x18 */
+    __IO uint32_t DATA;   /**< LPUART Data Register, offset: 0x1C */
+    __IO uint32_t MATCH;  /**< LPUART Match Address Register, offset: 0x20 */
+    __IO uint32_t MODIR;  /**< LPUART Modem IrDA Register, offset: 0x24 */
+    __IO uint32_t FIFO;   /**< LPUART FIFO Register, offset: 0x28 */
+    __IO uint32_t WATER;  /**< LPUART Watermark Register, offset: 0x2C */
 } LPUART_Type;
 
 /* ----------------------------------------------------------------------------
@@ -14706,433 +16906,454 @@ typedef struct {
 
 /*! @name VERID - Version ID Register */
 /*! @{ */
-#define LPUART_VERID_FEATURE_MASK                (0xFFFFU)
-#define LPUART_VERID_FEATURE_SHIFT               (0U)
-#define LPUART_VERID_FEATURE(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)
-#define LPUART_VERID_MINOR_MASK                  (0xFF0000U)
-#define LPUART_VERID_MINOR_SHIFT                 (16U)
-#define LPUART_VERID_MINOR(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)
-#define LPUART_VERID_MAJOR_MASK                  (0xFF000000U)
-#define LPUART_VERID_MAJOR_SHIFT                 (24U)
-#define LPUART_VERID_MAJOR(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)
+#define LPUART_VERID_FEATURE_MASK  (0xFFFFU)
+#define LPUART_VERID_FEATURE_SHIFT (0U)
+#define LPUART_VERID_FEATURE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)
+#define LPUART_VERID_MINOR_MASK  (0xFF0000U)
+#define LPUART_VERID_MINOR_SHIFT (16U)
+#define LPUART_VERID_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)
+#define LPUART_VERID_MAJOR_MASK  (0xFF000000U)
+#define LPUART_VERID_MAJOR_SHIFT (24U)
+#define LPUART_VERID_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)
 /*! @} */
 
 /*! @name PARAM - Parameter Register */
 /*! @{ */
-#define LPUART_PARAM_TXFIFO_MASK                 (0xFFU)
-#define LPUART_PARAM_TXFIFO_SHIFT                (0U)
-#define LPUART_PARAM_TXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)
-#define LPUART_PARAM_RXFIFO_MASK                 (0xFF00U)
-#define LPUART_PARAM_RXFIFO_SHIFT                (8U)
-#define LPUART_PARAM_RXFIFO(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)
+#define LPUART_PARAM_TXFIFO_MASK  (0xFFU)
+#define LPUART_PARAM_TXFIFO_SHIFT (0U)
+#define LPUART_PARAM_TXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)
+#define LPUART_PARAM_RXFIFO_MASK  (0xFF00U)
+#define LPUART_PARAM_RXFIFO_SHIFT (8U)
+#define LPUART_PARAM_RXFIFO(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)
 /*! @} */
 
 /*! @name GLOBAL - LPUART Global Register */
 /*! @{ */
-#define LPUART_GLOBAL_RST_MASK                   (0x2U)
-#define LPUART_GLOBAL_RST_SHIFT                  (1U)
-#define LPUART_GLOBAL_RST(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)
+#define LPUART_GLOBAL_RST_MASK  (0x2U)
+#define LPUART_GLOBAL_RST_SHIFT (1U)
+#define LPUART_GLOBAL_RST(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)
 /*! @} */
 
 /*! @name PINCFG - LPUART Pin Configuration Register */
 /*! @{ */
-#define LPUART_PINCFG_TRGSEL_MASK                (0x3U)
-#define LPUART_PINCFG_TRGSEL_SHIFT               (0U)
-#define LPUART_PINCFG_TRGSEL(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)
+#define LPUART_PINCFG_TRGSEL_MASK  (0x3U)
+#define LPUART_PINCFG_TRGSEL_SHIFT (0U)
+#define LPUART_PINCFG_TRGSEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)
 /*! @} */
 
 /*! @name BAUD - LPUART Baud Rate Register */
 /*! @{ */
-#define LPUART_BAUD_SBR_MASK                     (0x1FFFU)
-#define LPUART_BAUD_SBR_SHIFT                    (0U)
-#define LPUART_BAUD_SBR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
-#define LPUART_BAUD_SBNS_MASK                    (0x2000U)
-#define LPUART_BAUD_SBNS_SHIFT                   (13U)
-#define LPUART_BAUD_SBNS(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)
-#define LPUART_BAUD_RXEDGIE_MASK                 (0x4000U)
-#define LPUART_BAUD_RXEDGIE_SHIFT                (14U)
-#define LPUART_BAUD_RXEDGIE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)
-#define LPUART_BAUD_LBKDIE_MASK                  (0x8000U)
-#define LPUART_BAUD_LBKDIE_SHIFT                 (15U)
-#define LPUART_BAUD_LBKDIE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)
-#define LPUART_BAUD_RESYNCDIS_MASK               (0x10000U)
-#define LPUART_BAUD_RESYNCDIS_SHIFT              (16U)
-#define LPUART_BAUD_RESYNCDIS(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)
-#define LPUART_BAUD_BOTHEDGE_MASK                (0x20000U)
-#define LPUART_BAUD_BOTHEDGE_SHIFT               (17U)
-#define LPUART_BAUD_BOTHEDGE(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)
-#define LPUART_BAUD_MATCFG_MASK                  (0xC0000U)
-#define LPUART_BAUD_MATCFG_SHIFT                 (18U)
-#define LPUART_BAUD_MATCFG(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)
-#define LPUART_BAUD_RIDMAE_MASK                  (0x100000U)
-#define LPUART_BAUD_RIDMAE_SHIFT                 (20U)
-#define LPUART_BAUD_RIDMAE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)
-#define LPUART_BAUD_RDMAE_MASK                   (0x200000U)
-#define LPUART_BAUD_RDMAE_SHIFT                  (21U)
-#define LPUART_BAUD_RDMAE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)
-#define LPUART_BAUD_TDMAE_MASK                   (0x800000U)
-#define LPUART_BAUD_TDMAE_SHIFT                  (23U)
-#define LPUART_BAUD_TDMAE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)
-#define LPUART_BAUD_OSR_MASK                     (0x1F000000U)
-#define LPUART_BAUD_OSR_SHIFT                    (24U)
-#define LPUART_BAUD_OSR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
-#define LPUART_BAUD_M10_MASK                     (0x20000000U)
-#define LPUART_BAUD_M10_SHIFT                    (29U)
-#define LPUART_BAUD_M10(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)
-#define LPUART_BAUD_MAEN2_MASK                   (0x40000000U)
-#define LPUART_BAUD_MAEN2_SHIFT                  (30U)
-#define LPUART_BAUD_MAEN2(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)
-#define LPUART_BAUD_MAEN1_MASK                   (0x80000000U)
-#define LPUART_BAUD_MAEN1_SHIFT                  (31U)
-#define LPUART_BAUD_MAEN1(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)
+#define LPUART_BAUD_SBR_MASK        (0x1FFFU)
+#define LPUART_BAUD_SBR_SHIFT       (0U)
+#define LPUART_BAUD_SBR(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
+#define LPUART_BAUD_SBNS_MASK       (0x2000U)
+#define LPUART_BAUD_SBNS_SHIFT      (13U)
+#define LPUART_BAUD_SBNS(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)
+#define LPUART_BAUD_RXEDGIE_MASK    (0x4000U)
+#define LPUART_BAUD_RXEDGIE_SHIFT   (14U)
+#define LPUART_BAUD_RXEDGIE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)
+#define LPUART_BAUD_LBKDIE_MASK     (0x8000U)
+#define LPUART_BAUD_LBKDIE_SHIFT    (15U)
+#define LPUART_BAUD_LBKDIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)
+#define LPUART_BAUD_RESYNCDIS_MASK  (0x10000U)
+#define LPUART_BAUD_RESYNCDIS_SHIFT (16U)
+#define LPUART_BAUD_RESYNCDIS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)
+#define LPUART_BAUD_BOTHEDGE_MASK  (0x20000U)
+#define LPUART_BAUD_BOTHEDGE_SHIFT (17U)
+#define LPUART_BAUD_BOTHEDGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)
+#define LPUART_BAUD_MATCFG_MASK  (0xC0000U)
+#define LPUART_BAUD_MATCFG_SHIFT (18U)
+#define LPUART_BAUD_MATCFG(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)
+#define LPUART_BAUD_RIDMAE_MASK  (0x100000U)
+#define LPUART_BAUD_RIDMAE_SHIFT (20U)
+#define LPUART_BAUD_RIDMAE(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)
+#define LPUART_BAUD_RDMAE_MASK   (0x200000U)
+#define LPUART_BAUD_RDMAE_SHIFT  (21U)
+#define LPUART_BAUD_RDMAE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)
+#define LPUART_BAUD_TDMAE_MASK   (0x800000U)
+#define LPUART_BAUD_TDMAE_SHIFT  (23U)
+#define LPUART_BAUD_TDMAE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)
+#define LPUART_BAUD_OSR_MASK     (0x1F000000U)
+#define LPUART_BAUD_OSR_SHIFT    (24U)
+#define LPUART_BAUD_OSR(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
+#define LPUART_BAUD_M10_MASK     (0x20000000U)
+#define LPUART_BAUD_M10_SHIFT    (29U)
+#define LPUART_BAUD_M10(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)
+#define LPUART_BAUD_MAEN2_MASK   (0x40000000U)
+#define LPUART_BAUD_MAEN2_SHIFT  (30U)
+#define LPUART_BAUD_MAEN2(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)
+#define LPUART_BAUD_MAEN1_MASK   (0x80000000U)
+#define LPUART_BAUD_MAEN1_SHIFT  (31U)
+#define LPUART_BAUD_MAEN1(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)
 /*! @} */
 
 /*! @name STAT - LPUART Status Register */
 /*! @{ */
-#define LPUART_STAT_MA2F_MASK                    (0x4000U)
-#define LPUART_STAT_MA2F_SHIFT                   (14U)
-#define LPUART_STAT_MA2F(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)
-#define LPUART_STAT_MA1F_MASK                    (0x8000U)
-#define LPUART_STAT_MA1F_SHIFT                   (15U)
-#define LPUART_STAT_MA1F(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)
-#define LPUART_STAT_PF_MASK                      (0x10000U)
-#define LPUART_STAT_PF_SHIFT                     (16U)
-#define LPUART_STAT_PF(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)
-#define LPUART_STAT_FE_MASK                      (0x20000U)
-#define LPUART_STAT_FE_SHIFT                     (17U)
-#define LPUART_STAT_FE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)
-#define LPUART_STAT_NF_MASK                      (0x40000U)
-#define LPUART_STAT_NF_SHIFT                     (18U)
-#define LPUART_STAT_NF(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)
-#define LPUART_STAT_OR_MASK                      (0x80000U)
-#define LPUART_STAT_OR_SHIFT                     (19U)
-#define LPUART_STAT_OR(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)
-#define LPUART_STAT_IDLE_MASK                    (0x100000U)
-#define LPUART_STAT_IDLE_SHIFT                   (20U)
-#define LPUART_STAT_IDLE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)
-#define LPUART_STAT_RDRF_MASK                    (0x200000U)
-#define LPUART_STAT_RDRF_SHIFT                   (21U)
-#define LPUART_STAT_RDRF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)
-#define LPUART_STAT_TC_MASK                      (0x400000U)
-#define LPUART_STAT_TC_SHIFT                     (22U)
-#define LPUART_STAT_TC(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)
-#define LPUART_STAT_TDRE_MASK                    (0x800000U)
-#define LPUART_STAT_TDRE_SHIFT                   (23U)
-#define LPUART_STAT_TDRE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)
-#define LPUART_STAT_RAF_MASK                     (0x1000000U)
-#define LPUART_STAT_RAF_SHIFT                    (24U)
-#define LPUART_STAT_RAF(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)
-#define LPUART_STAT_LBKDE_MASK                   (0x2000000U)
-#define LPUART_STAT_LBKDE_SHIFT                  (25U)
-#define LPUART_STAT_LBKDE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)
-#define LPUART_STAT_BRK13_MASK                   (0x4000000U)
-#define LPUART_STAT_BRK13_SHIFT                  (26U)
-#define LPUART_STAT_BRK13(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)
-#define LPUART_STAT_RWUID_MASK                   (0x8000000U)
-#define LPUART_STAT_RWUID_SHIFT                  (27U)
-#define LPUART_STAT_RWUID(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)
-#define LPUART_STAT_RXINV_MASK                   (0x10000000U)
-#define LPUART_STAT_RXINV_SHIFT                  (28U)
-#define LPUART_STAT_RXINV(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)
-#define LPUART_STAT_MSBF_MASK                    (0x20000000U)
-#define LPUART_STAT_MSBF_SHIFT                   (29U)
-#define LPUART_STAT_MSBF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)
-#define LPUART_STAT_RXEDGIF_MASK                 (0x40000000U)
-#define LPUART_STAT_RXEDGIF_SHIFT                (30U)
-#define LPUART_STAT_RXEDGIF(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)
-#define LPUART_STAT_LBKDIF_MASK                  (0x80000000U)
-#define LPUART_STAT_LBKDIF_SHIFT                 (31U)
-#define LPUART_STAT_LBKDIF(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)
+#define LPUART_STAT_MA2F_MASK     (0x4000U)
+#define LPUART_STAT_MA2F_SHIFT    (14U)
+#define LPUART_STAT_MA2F(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)
+#define LPUART_STAT_MA1F_MASK     (0x8000U)
+#define LPUART_STAT_MA1F_SHIFT    (15U)
+#define LPUART_STAT_MA1F(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)
+#define LPUART_STAT_PF_MASK       (0x10000U)
+#define LPUART_STAT_PF_SHIFT      (16U)
+#define LPUART_STAT_PF(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)
+#define LPUART_STAT_FE_MASK       (0x20000U)
+#define LPUART_STAT_FE_SHIFT      (17U)
+#define LPUART_STAT_FE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)
+#define LPUART_STAT_NF_MASK       (0x40000U)
+#define LPUART_STAT_NF_SHIFT      (18U)
+#define LPUART_STAT_NF(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)
+#define LPUART_STAT_OR_MASK       (0x80000U)
+#define LPUART_STAT_OR_SHIFT      (19U)
+#define LPUART_STAT_OR(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)
+#define LPUART_STAT_IDLE_MASK     (0x100000U)
+#define LPUART_STAT_IDLE_SHIFT    (20U)
+#define LPUART_STAT_IDLE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)
+#define LPUART_STAT_RDRF_MASK     (0x200000U)
+#define LPUART_STAT_RDRF_SHIFT    (21U)
+#define LPUART_STAT_RDRF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)
+#define LPUART_STAT_TC_MASK       (0x400000U)
+#define LPUART_STAT_TC_SHIFT      (22U)
+#define LPUART_STAT_TC(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)
+#define LPUART_STAT_TDRE_MASK     (0x800000U)
+#define LPUART_STAT_TDRE_SHIFT    (23U)
+#define LPUART_STAT_TDRE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)
+#define LPUART_STAT_RAF_MASK      (0x1000000U)
+#define LPUART_STAT_RAF_SHIFT     (24U)
+#define LPUART_STAT_RAF(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)
+#define LPUART_STAT_LBKDE_MASK    (0x2000000U)
+#define LPUART_STAT_LBKDE_SHIFT   (25U)
+#define LPUART_STAT_LBKDE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)
+#define LPUART_STAT_BRK13_MASK    (0x4000000U)
+#define LPUART_STAT_BRK13_SHIFT   (26U)
+#define LPUART_STAT_BRK13(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)
+#define LPUART_STAT_RWUID_MASK    (0x8000000U)
+#define LPUART_STAT_RWUID_SHIFT   (27U)
+#define LPUART_STAT_RWUID(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)
+#define LPUART_STAT_RXINV_MASK    (0x10000000U)
+#define LPUART_STAT_RXINV_SHIFT   (28U)
+#define LPUART_STAT_RXINV(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)
+#define LPUART_STAT_MSBF_MASK     (0x20000000U)
+#define LPUART_STAT_MSBF_SHIFT    (29U)
+#define LPUART_STAT_MSBF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)
+#define LPUART_STAT_RXEDGIF_MASK  (0x40000000U)
+#define LPUART_STAT_RXEDGIF_SHIFT (30U)
+#define LPUART_STAT_RXEDGIF(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)
+#define LPUART_STAT_LBKDIF_MASK   (0x80000000U)
+#define LPUART_STAT_LBKDIF_SHIFT  (31U)
+#define LPUART_STAT_LBKDIF(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)
 /*! @} */
 
 /*! @name CTRL - LPUART Control Register */
 /*! @{ */
-#define LPUART_CTRL_PT_MASK                      (0x1U)
-#define LPUART_CTRL_PT_SHIFT                     (0U)
-#define LPUART_CTRL_PT(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)
-#define LPUART_CTRL_PE_MASK                      (0x2U)
-#define LPUART_CTRL_PE_SHIFT                     (1U)
-#define LPUART_CTRL_PE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)
-#define LPUART_CTRL_ILT_MASK                     (0x4U)
-#define LPUART_CTRL_ILT_SHIFT                    (2U)
-#define LPUART_CTRL_ILT(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)
-#define LPUART_CTRL_WAKE_MASK                    (0x8U)
-#define LPUART_CTRL_WAKE_SHIFT                   (3U)
-#define LPUART_CTRL_WAKE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)
-#define LPUART_CTRL_M_MASK                       (0x10U)
-#define LPUART_CTRL_M_SHIFT                      (4U)
-#define LPUART_CTRL_M(x)                         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)
-#define LPUART_CTRL_RSRC_MASK                    (0x20U)
-#define LPUART_CTRL_RSRC_SHIFT                   (5U)
-#define LPUART_CTRL_RSRC(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)
-#define LPUART_CTRL_DOZEEN_MASK                  (0x40U)
-#define LPUART_CTRL_DOZEEN_SHIFT                 (6U)
-#define LPUART_CTRL_DOZEEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)
-#define LPUART_CTRL_LOOPS_MASK                   (0x80U)
-#define LPUART_CTRL_LOOPS_SHIFT                  (7U)
-#define LPUART_CTRL_LOOPS(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)
-#define LPUART_CTRL_IDLECFG_MASK                 (0x700U)
-#define LPUART_CTRL_IDLECFG_SHIFT                (8U)
-#define LPUART_CTRL_IDLECFG(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)
-#define LPUART_CTRL_M7_MASK                      (0x800U)
-#define LPUART_CTRL_M7_SHIFT                     (11U)
-#define LPUART_CTRL_M7(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)
-#define LPUART_CTRL_MA2IE_MASK                   (0x4000U)
-#define LPUART_CTRL_MA2IE_SHIFT                  (14U)
-#define LPUART_CTRL_MA2IE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)
-#define LPUART_CTRL_MA1IE_MASK                   (0x8000U)
-#define LPUART_CTRL_MA1IE_SHIFT                  (15U)
-#define LPUART_CTRL_MA1IE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)
-#define LPUART_CTRL_SBK_MASK                     (0x10000U)
-#define LPUART_CTRL_SBK_SHIFT                    (16U)
-#define LPUART_CTRL_SBK(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)
-#define LPUART_CTRL_RWU_MASK                     (0x20000U)
-#define LPUART_CTRL_RWU_SHIFT                    (17U)
-#define LPUART_CTRL_RWU(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)
-#define LPUART_CTRL_RE_MASK                      (0x40000U)
-#define LPUART_CTRL_RE_SHIFT                     (18U)
-#define LPUART_CTRL_RE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)
-#define LPUART_CTRL_TE_MASK                      (0x80000U)
-#define LPUART_CTRL_TE_SHIFT                     (19U)
-#define LPUART_CTRL_TE(x)                        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)
-#define LPUART_CTRL_ILIE_MASK                    (0x100000U)
-#define LPUART_CTRL_ILIE_SHIFT                   (20U)
-#define LPUART_CTRL_ILIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)
-#define LPUART_CTRL_RIE_MASK                     (0x200000U)
-#define LPUART_CTRL_RIE_SHIFT                    (21U)
-#define LPUART_CTRL_RIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)
-#define LPUART_CTRL_TCIE_MASK                    (0x400000U)
-#define LPUART_CTRL_TCIE_SHIFT                   (22U)
-#define LPUART_CTRL_TCIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)
-#define LPUART_CTRL_TIE_MASK                     (0x800000U)
-#define LPUART_CTRL_TIE_SHIFT                    (23U)
-#define LPUART_CTRL_TIE(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)
-#define LPUART_CTRL_PEIE_MASK                    (0x1000000U)
-#define LPUART_CTRL_PEIE_SHIFT                   (24U)
-#define LPUART_CTRL_PEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)
-#define LPUART_CTRL_FEIE_MASK                    (0x2000000U)
-#define LPUART_CTRL_FEIE_SHIFT                   (25U)
-#define LPUART_CTRL_FEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)
-#define LPUART_CTRL_NEIE_MASK                    (0x4000000U)
-#define LPUART_CTRL_NEIE_SHIFT                   (26U)
-#define LPUART_CTRL_NEIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)
-#define LPUART_CTRL_ORIE_MASK                    (0x8000000U)
-#define LPUART_CTRL_ORIE_SHIFT                   (27U)
-#define LPUART_CTRL_ORIE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)
-#define LPUART_CTRL_TXINV_MASK                   (0x10000000U)
-#define LPUART_CTRL_TXINV_SHIFT                  (28U)
-#define LPUART_CTRL_TXINV(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)
-#define LPUART_CTRL_TXDIR_MASK                   (0x20000000U)
-#define LPUART_CTRL_TXDIR_SHIFT                  (29U)
-#define LPUART_CTRL_TXDIR(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)
-#define LPUART_CTRL_R9T8_MASK                    (0x40000000U)
-#define LPUART_CTRL_R9T8_SHIFT                   (30U)
-#define LPUART_CTRL_R9T8(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)
-#define LPUART_CTRL_R8T9_MASK                    (0x80000000U)
-#define LPUART_CTRL_R8T9_SHIFT                   (31U)
-#define LPUART_CTRL_R8T9(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)
+#define LPUART_CTRL_PT_MASK       (0x1U)
+#define LPUART_CTRL_PT_SHIFT      (0U)
+#define LPUART_CTRL_PT(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)
+#define LPUART_CTRL_PE_MASK       (0x2U)
+#define LPUART_CTRL_PE_SHIFT      (1U)
+#define LPUART_CTRL_PE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)
+#define LPUART_CTRL_ILT_MASK      (0x4U)
+#define LPUART_CTRL_ILT_SHIFT     (2U)
+#define LPUART_CTRL_ILT(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)
+#define LPUART_CTRL_WAKE_MASK     (0x8U)
+#define LPUART_CTRL_WAKE_SHIFT    (3U)
+#define LPUART_CTRL_WAKE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)
+#define LPUART_CTRL_M_MASK        (0x10U)
+#define LPUART_CTRL_M_SHIFT       (4U)
+#define LPUART_CTRL_M(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)
+#define LPUART_CTRL_RSRC_MASK     (0x20U)
+#define LPUART_CTRL_RSRC_SHIFT    (5U)
+#define LPUART_CTRL_RSRC(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)
+#define LPUART_CTRL_DOZEEN_MASK   (0x40U)
+#define LPUART_CTRL_DOZEEN_SHIFT  (6U)
+#define LPUART_CTRL_DOZEEN(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)
+#define LPUART_CTRL_LOOPS_MASK    (0x80U)
+#define LPUART_CTRL_LOOPS_SHIFT   (7U)
+#define LPUART_CTRL_LOOPS(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)
+#define LPUART_CTRL_IDLECFG_MASK  (0x700U)
+#define LPUART_CTRL_IDLECFG_SHIFT (8U)
+#define LPUART_CTRL_IDLECFG(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)
+#define LPUART_CTRL_M7_MASK       (0x800U)
+#define LPUART_CTRL_M7_SHIFT      (11U)
+#define LPUART_CTRL_M7(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)
+#define LPUART_CTRL_MA2IE_MASK    (0x4000U)
+#define LPUART_CTRL_MA2IE_SHIFT   (14U)
+#define LPUART_CTRL_MA2IE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)
+#define LPUART_CTRL_MA1IE_MASK    (0x8000U)
+#define LPUART_CTRL_MA1IE_SHIFT   (15U)
+#define LPUART_CTRL_MA1IE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)
+#define LPUART_CTRL_SBK_MASK      (0x10000U)
+#define LPUART_CTRL_SBK_SHIFT     (16U)
+#define LPUART_CTRL_SBK(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)
+#define LPUART_CTRL_RWU_MASK      (0x20000U)
+#define LPUART_CTRL_RWU_SHIFT     (17U)
+#define LPUART_CTRL_RWU(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)
+#define LPUART_CTRL_RE_MASK       (0x40000U)
+#define LPUART_CTRL_RE_SHIFT      (18U)
+#define LPUART_CTRL_RE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)
+#define LPUART_CTRL_TE_MASK       (0x80000U)
+#define LPUART_CTRL_TE_SHIFT      (19U)
+#define LPUART_CTRL_TE(x)         (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)
+#define LPUART_CTRL_ILIE_MASK     (0x100000U)
+#define LPUART_CTRL_ILIE_SHIFT    (20U)
+#define LPUART_CTRL_ILIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)
+#define LPUART_CTRL_RIE_MASK      (0x200000U)
+#define LPUART_CTRL_RIE_SHIFT     (21U)
+#define LPUART_CTRL_RIE(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)
+#define LPUART_CTRL_TCIE_MASK     (0x400000U)
+#define LPUART_CTRL_TCIE_SHIFT    (22U)
+#define LPUART_CTRL_TCIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)
+#define LPUART_CTRL_TIE_MASK      (0x800000U)
+#define LPUART_CTRL_TIE_SHIFT     (23U)
+#define LPUART_CTRL_TIE(x)        (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)
+#define LPUART_CTRL_PEIE_MASK     (0x1000000U)
+#define LPUART_CTRL_PEIE_SHIFT    (24U)
+#define LPUART_CTRL_PEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)
+#define LPUART_CTRL_FEIE_MASK     (0x2000000U)
+#define LPUART_CTRL_FEIE_SHIFT    (25U)
+#define LPUART_CTRL_FEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)
+#define LPUART_CTRL_NEIE_MASK     (0x4000000U)
+#define LPUART_CTRL_NEIE_SHIFT    (26U)
+#define LPUART_CTRL_NEIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)
+#define LPUART_CTRL_ORIE_MASK     (0x8000000U)
+#define LPUART_CTRL_ORIE_SHIFT    (27U)
+#define LPUART_CTRL_ORIE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)
+#define LPUART_CTRL_TXINV_MASK    (0x10000000U)
+#define LPUART_CTRL_TXINV_SHIFT   (28U)
+#define LPUART_CTRL_TXINV(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)
+#define LPUART_CTRL_TXDIR_MASK    (0x20000000U)
+#define LPUART_CTRL_TXDIR_SHIFT   (29U)
+#define LPUART_CTRL_TXDIR(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)
+#define LPUART_CTRL_R9T8_MASK     (0x40000000U)
+#define LPUART_CTRL_R9T8_SHIFT    (30U)
+#define LPUART_CTRL_R9T8(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)
+#define LPUART_CTRL_R8T9_MASK     (0x80000000U)
+#define LPUART_CTRL_R8T9_SHIFT    (31U)
+#define LPUART_CTRL_R8T9(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)
 /*! @} */
 
 /*! @name DATA - LPUART Data Register */
 /*! @{ */
-#define LPUART_DATA_R0T0_MASK                    (0x1U)
-#define LPUART_DATA_R0T0_SHIFT                   (0U)
-#define LPUART_DATA_R0T0(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)
-#define LPUART_DATA_R1T1_MASK                    (0x2U)
-#define LPUART_DATA_R1T1_SHIFT                   (1U)
-#define LPUART_DATA_R1T1(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)
-#define LPUART_DATA_R2T2_MASK                    (0x4U)
-#define LPUART_DATA_R2T2_SHIFT                   (2U)
-#define LPUART_DATA_R2T2(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)
-#define LPUART_DATA_R3T3_MASK                    (0x8U)
-#define LPUART_DATA_R3T3_SHIFT                   (3U)
-#define LPUART_DATA_R3T3(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)
-#define LPUART_DATA_R4T4_MASK                    (0x10U)
-#define LPUART_DATA_R4T4_SHIFT                   (4U)
-#define LPUART_DATA_R4T4(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)
-#define LPUART_DATA_R5T5_MASK                    (0x20U)
-#define LPUART_DATA_R5T5_SHIFT                   (5U)
-#define LPUART_DATA_R5T5(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)
-#define LPUART_DATA_R6T6_MASK                    (0x40U)
-#define LPUART_DATA_R6T6_SHIFT                   (6U)
-#define LPUART_DATA_R6T6(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)
-#define LPUART_DATA_R7T7_MASK                    (0x80U)
-#define LPUART_DATA_R7T7_SHIFT                   (7U)
-#define LPUART_DATA_R7T7(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)
-#define LPUART_DATA_R8T8_MASK                    (0x100U)
-#define LPUART_DATA_R8T8_SHIFT                   (8U)
-#define LPUART_DATA_R8T8(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)
-#define LPUART_DATA_R9T9_MASK                    (0x200U)
-#define LPUART_DATA_R9T9_SHIFT                   (9U)
-#define LPUART_DATA_R9T9(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)
-#define LPUART_DATA_IDLINE_MASK                  (0x800U)
-#define LPUART_DATA_IDLINE_SHIFT                 (11U)
-#define LPUART_DATA_IDLINE(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)
-#define LPUART_DATA_RXEMPT_MASK                  (0x1000U)
-#define LPUART_DATA_RXEMPT_SHIFT                 (12U)
-#define LPUART_DATA_RXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)
-#define LPUART_DATA_FRETSC_MASK                  (0x2000U)
-#define LPUART_DATA_FRETSC_SHIFT                 (13U)
-#define LPUART_DATA_FRETSC(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)
-#define LPUART_DATA_PARITYE_MASK                 (0x4000U)
-#define LPUART_DATA_PARITYE_SHIFT                (14U)
-#define LPUART_DATA_PARITYE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)
-#define LPUART_DATA_NOISY_MASK                   (0x8000U)
-#define LPUART_DATA_NOISY_SHIFT                  (15U)
-#define LPUART_DATA_NOISY(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)
+#define LPUART_DATA_R0T0_MASK     (0x1U)
+#define LPUART_DATA_R0T0_SHIFT    (0U)
+#define LPUART_DATA_R0T0(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)
+#define LPUART_DATA_R1T1_MASK     (0x2U)
+#define LPUART_DATA_R1T1_SHIFT    (1U)
+#define LPUART_DATA_R1T1(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)
+#define LPUART_DATA_R2T2_MASK     (0x4U)
+#define LPUART_DATA_R2T2_SHIFT    (2U)
+#define LPUART_DATA_R2T2(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)
+#define LPUART_DATA_R3T3_MASK     (0x8U)
+#define LPUART_DATA_R3T3_SHIFT    (3U)
+#define LPUART_DATA_R3T3(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)
+#define LPUART_DATA_R4T4_MASK     (0x10U)
+#define LPUART_DATA_R4T4_SHIFT    (4U)
+#define LPUART_DATA_R4T4(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)
+#define LPUART_DATA_R5T5_MASK     (0x20U)
+#define LPUART_DATA_R5T5_SHIFT    (5U)
+#define LPUART_DATA_R5T5(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)
+#define LPUART_DATA_R6T6_MASK     (0x40U)
+#define LPUART_DATA_R6T6_SHIFT    (6U)
+#define LPUART_DATA_R6T6(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)
+#define LPUART_DATA_R7T7_MASK     (0x80U)
+#define LPUART_DATA_R7T7_SHIFT    (7U)
+#define LPUART_DATA_R7T7(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)
+#define LPUART_DATA_R8T8_MASK     (0x100U)
+#define LPUART_DATA_R8T8_SHIFT    (8U)
+#define LPUART_DATA_R8T8(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)
+#define LPUART_DATA_R9T9_MASK     (0x200U)
+#define LPUART_DATA_R9T9_SHIFT    (9U)
+#define LPUART_DATA_R9T9(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)
+#define LPUART_DATA_IDLINE_MASK   (0x800U)
+#define LPUART_DATA_IDLINE_SHIFT  (11U)
+#define LPUART_DATA_IDLINE(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)
+#define LPUART_DATA_RXEMPT_MASK   (0x1000U)
+#define LPUART_DATA_RXEMPT_SHIFT  (12U)
+#define LPUART_DATA_RXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)
+#define LPUART_DATA_FRETSC_MASK   (0x2000U)
+#define LPUART_DATA_FRETSC_SHIFT  (13U)
+#define LPUART_DATA_FRETSC(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)
+#define LPUART_DATA_PARITYE_MASK  (0x4000U)
+#define LPUART_DATA_PARITYE_SHIFT (14U)
+#define LPUART_DATA_PARITYE(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)
+#define LPUART_DATA_NOISY_MASK    (0x8000U)
+#define LPUART_DATA_NOISY_SHIFT   (15U)
+#define LPUART_DATA_NOISY(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)
 /*! @} */
 
 /*! @name MATCH - LPUART Match Address Register */
 /*! @{ */
-#define LPUART_MATCH_MA1_MASK                    (0x3FFU)
-#define LPUART_MATCH_MA1_SHIFT                   (0U)
-#define LPUART_MATCH_MA1(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)
-#define LPUART_MATCH_MA2_MASK                    (0x3FF0000U)
-#define LPUART_MATCH_MA2_SHIFT                   (16U)
-#define LPUART_MATCH_MA2(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)
+#define LPUART_MATCH_MA1_MASK  (0x3FFU)
+#define LPUART_MATCH_MA1_SHIFT (0U)
+#define LPUART_MATCH_MA1(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)
+#define LPUART_MATCH_MA2_MASK  (0x3FF0000U)
+#define LPUART_MATCH_MA2_SHIFT (16U)
+#define LPUART_MATCH_MA2(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)
 /*! @} */
 
 /*! @name MODIR - LPUART Modem IrDA Register */
 /*! @{ */
-#define LPUART_MODIR_TXCTSE_MASK                 (0x1U)
-#define LPUART_MODIR_TXCTSE_SHIFT                (0U)
-#define LPUART_MODIR_TXCTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)
-#define LPUART_MODIR_TXRTSE_MASK                 (0x2U)
-#define LPUART_MODIR_TXRTSE_SHIFT                (1U)
-#define LPUART_MODIR_TXRTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)
-#define LPUART_MODIR_TXRTSPOL_MASK               (0x4U)
-#define LPUART_MODIR_TXRTSPOL_SHIFT              (2U)
-#define LPUART_MODIR_TXRTSPOL(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)
-#define LPUART_MODIR_RXRTSE_MASK                 (0x8U)
-#define LPUART_MODIR_RXRTSE_SHIFT                (3U)
-#define LPUART_MODIR_RXRTSE(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)
-#define LPUART_MODIR_TXCTSC_MASK                 (0x10U)
-#define LPUART_MODIR_TXCTSC_SHIFT                (4U)
-#define LPUART_MODIR_TXCTSC(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)
-#define LPUART_MODIR_TXCTSSRC_MASK               (0x20U)
-#define LPUART_MODIR_TXCTSSRC_SHIFT              (5U)
-#define LPUART_MODIR_TXCTSSRC(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)
-#define LPUART_MODIR_RTSWATER_MASK               (0x300U)
-#define LPUART_MODIR_RTSWATER_SHIFT              (8U)
-#define LPUART_MODIR_RTSWATER(x)                 (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)
-#define LPUART_MODIR_TNP_MASK                    (0x30000U)
-#define LPUART_MODIR_TNP_SHIFT                   (16U)
-#define LPUART_MODIR_TNP(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)
-#define LPUART_MODIR_IREN_MASK                   (0x40000U)
-#define LPUART_MODIR_IREN_SHIFT                  (18U)
-#define LPUART_MODIR_IREN(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)
+#define LPUART_MODIR_TXCTSE_MASK    (0x1U)
+#define LPUART_MODIR_TXCTSE_SHIFT   (0U)
+#define LPUART_MODIR_TXCTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)
+#define LPUART_MODIR_TXRTSE_MASK    (0x2U)
+#define LPUART_MODIR_TXRTSE_SHIFT   (1U)
+#define LPUART_MODIR_TXRTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)
+#define LPUART_MODIR_TXRTSPOL_MASK  (0x4U)
+#define LPUART_MODIR_TXRTSPOL_SHIFT (2U)
+#define LPUART_MODIR_TXRTSPOL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)
+#define LPUART_MODIR_RXRTSE_MASK    (0x8U)
+#define LPUART_MODIR_RXRTSE_SHIFT   (3U)
+#define LPUART_MODIR_RXRTSE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)
+#define LPUART_MODIR_TXCTSC_MASK    (0x10U)
+#define LPUART_MODIR_TXCTSC_SHIFT   (4U)
+#define LPUART_MODIR_TXCTSC(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)
+#define LPUART_MODIR_TXCTSSRC_MASK  (0x20U)
+#define LPUART_MODIR_TXCTSSRC_SHIFT (5U)
+#define LPUART_MODIR_TXCTSSRC(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)
+#define LPUART_MODIR_RTSWATER_MASK  (0x300U)
+#define LPUART_MODIR_RTSWATER_SHIFT (8U)
+#define LPUART_MODIR_RTSWATER(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)
+#define LPUART_MODIR_TNP_MASK   (0x30000U)
+#define LPUART_MODIR_TNP_SHIFT  (16U)
+#define LPUART_MODIR_TNP(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)
+#define LPUART_MODIR_IREN_MASK  (0x40000U)
+#define LPUART_MODIR_IREN_SHIFT (18U)
+#define LPUART_MODIR_IREN(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)
 /*! @} */
 
 /*! @name FIFO - LPUART FIFO Register */
 /*! @{ */
-#define LPUART_FIFO_RXFIFOSIZE_MASK              (0x7U)
-#define LPUART_FIFO_RXFIFOSIZE_SHIFT             (0U)
-#define LPUART_FIFO_RXFIFOSIZE(x)                (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)
-#define LPUART_FIFO_RXFE_MASK                    (0x8U)
-#define LPUART_FIFO_RXFE_SHIFT                   (3U)
-#define LPUART_FIFO_RXFE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)
-#define LPUART_FIFO_TXFIFOSIZE_MASK              (0x70U)
-#define LPUART_FIFO_TXFIFOSIZE_SHIFT             (4U)
-#define LPUART_FIFO_TXFIFOSIZE(x)                (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)
-#define LPUART_FIFO_TXFE_MASK                    (0x80U)
-#define LPUART_FIFO_TXFE_SHIFT                   (7U)
-#define LPUART_FIFO_TXFE(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)
-#define LPUART_FIFO_RXUFE_MASK                   (0x100U)
-#define LPUART_FIFO_RXUFE_SHIFT                  (8U)
-#define LPUART_FIFO_RXUFE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)
-#define LPUART_FIFO_TXOFE_MASK                   (0x200U)
-#define LPUART_FIFO_TXOFE_SHIFT                  (9U)
-#define LPUART_FIFO_TXOFE(x)                     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)
-#define LPUART_FIFO_RXIDEN_MASK                  (0x1C00U)
-#define LPUART_FIFO_RXIDEN_SHIFT                 (10U)
-#define LPUART_FIFO_RXIDEN(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)
-#define LPUART_FIFO_RXFLUSH_MASK                 (0x4000U)
-#define LPUART_FIFO_RXFLUSH_SHIFT                (14U)
-#define LPUART_FIFO_RXFLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)
-#define LPUART_FIFO_TXFLUSH_MASK                 (0x8000U)
-#define LPUART_FIFO_TXFLUSH_SHIFT                (15U)
-#define LPUART_FIFO_TXFLUSH(x)                   (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)
-#define LPUART_FIFO_RXUF_MASK                    (0x10000U)
-#define LPUART_FIFO_RXUF_SHIFT                   (16U)
-#define LPUART_FIFO_RXUF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)
-#define LPUART_FIFO_TXOF_MASK                    (0x20000U)
-#define LPUART_FIFO_TXOF_SHIFT                   (17U)
-#define LPUART_FIFO_TXOF(x)                      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)
-#define LPUART_FIFO_RXEMPT_MASK                  (0x400000U)
-#define LPUART_FIFO_RXEMPT_SHIFT                 (22U)
-#define LPUART_FIFO_RXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)
-#define LPUART_FIFO_TXEMPT_MASK                  (0x800000U)
-#define LPUART_FIFO_TXEMPT_SHIFT                 (23U)
-#define LPUART_FIFO_TXEMPT(x)                    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)
+#define LPUART_FIFO_RXFIFOSIZE_MASK  (0x7U)
+#define LPUART_FIFO_RXFIFOSIZE_SHIFT (0U)
+#define LPUART_FIFO_RXFIFOSIZE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)
+#define LPUART_FIFO_RXFE_MASK        (0x8U)
+#define LPUART_FIFO_RXFE_SHIFT       (3U)
+#define LPUART_FIFO_RXFE(x)          (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)
+#define LPUART_FIFO_TXFIFOSIZE_MASK  (0x70U)
+#define LPUART_FIFO_TXFIFOSIZE_SHIFT (4U)
+#define LPUART_FIFO_TXFIFOSIZE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)
+#define LPUART_FIFO_TXFE_MASK     (0x80U)
+#define LPUART_FIFO_TXFE_SHIFT    (7U)
+#define LPUART_FIFO_TXFE(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)
+#define LPUART_FIFO_RXUFE_MASK    (0x100U)
+#define LPUART_FIFO_RXUFE_SHIFT   (8U)
+#define LPUART_FIFO_RXUFE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)
+#define LPUART_FIFO_TXOFE_MASK    (0x200U)
+#define LPUART_FIFO_TXOFE_SHIFT   (9U)
+#define LPUART_FIFO_TXOFE(x)      (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)
+#define LPUART_FIFO_RXIDEN_MASK   (0x1C00U)
+#define LPUART_FIFO_RXIDEN_SHIFT  (10U)
+#define LPUART_FIFO_RXIDEN(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)
+#define LPUART_FIFO_RXFLUSH_MASK  (0x4000U)
+#define LPUART_FIFO_RXFLUSH_SHIFT (14U)
+#define LPUART_FIFO_RXFLUSH(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)
+#define LPUART_FIFO_TXFLUSH_MASK  (0x8000U)
+#define LPUART_FIFO_TXFLUSH_SHIFT (15U)
+#define LPUART_FIFO_TXFLUSH(x)    (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)
+#define LPUART_FIFO_RXUF_MASK     (0x10000U)
+#define LPUART_FIFO_RXUF_SHIFT    (16U)
+#define LPUART_FIFO_RXUF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)
+#define LPUART_FIFO_TXOF_MASK     (0x20000U)
+#define LPUART_FIFO_TXOF_SHIFT    (17U)
+#define LPUART_FIFO_TXOF(x)       (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)
+#define LPUART_FIFO_RXEMPT_MASK   (0x400000U)
+#define LPUART_FIFO_RXEMPT_SHIFT  (22U)
+#define LPUART_FIFO_RXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)
+#define LPUART_FIFO_TXEMPT_MASK   (0x800000U)
+#define LPUART_FIFO_TXEMPT_SHIFT  (23U)
+#define LPUART_FIFO_TXEMPT(x)     (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)
 /*! @} */
 
 /*! @name WATER - LPUART Watermark Register */
 /*! @{ */
-#define LPUART_WATER_TXWATER_MASK                (0x3U)
-#define LPUART_WATER_TXWATER_SHIFT               (0U)
-#define LPUART_WATER_TXWATER(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)
-#define LPUART_WATER_TXCOUNT_MASK                (0x700U)
-#define LPUART_WATER_TXCOUNT_SHIFT               (8U)
-#define LPUART_WATER_TXCOUNT(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)
-#define LPUART_WATER_RXWATER_MASK                (0x30000U)
-#define LPUART_WATER_RXWATER_SHIFT               (16U)
-#define LPUART_WATER_RXWATER(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)
-#define LPUART_WATER_RXCOUNT_MASK                (0x7000000U)
-#define LPUART_WATER_RXCOUNT_SHIFT               (24U)
-#define LPUART_WATER_RXCOUNT(x)                  (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)
+#define LPUART_WATER_TXWATER_MASK  (0x3U)
+#define LPUART_WATER_TXWATER_SHIFT (0U)
+#define LPUART_WATER_TXWATER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)
+#define LPUART_WATER_TXCOUNT_MASK  (0x700U)
+#define LPUART_WATER_TXCOUNT_SHIFT (8U)
+#define LPUART_WATER_TXCOUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)
+#define LPUART_WATER_RXWATER_MASK  (0x30000U)
+#define LPUART_WATER_RXWATER_SHIFT (16U)
+#define LPUART_WATER_RXWATER(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)
+#define LPUART_WATER_RXCOUNT_MASK  (0x7000000U)
+#define LPUART_WATER_RXCOUNT_SHIFT (24U)
+#define LPUART_WATER_RXCOUNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group LPUART_Register_Masks */
 
-
 /* LPUART - Peripheral instance base addresses */
 /** Peripheral LPUART1 base address */
-#define LPUART1_BASE                             (0x40184000u)
+#define LPUART1_BASE (0x40184000u)
 /** Peripheral LPUART1 base pointer */
-#define LPUART1                                  ((LPUART_Type *)LPUART1_BASE)
+#define LPUART1 ((LPUART_Type *)LPUART1_BASE)
 /** Peripheral LPUART2 base address */
-#define LPUART2_BASE                             (0x40188000u)
+#define LPUART2_BASE (0x40188000u)
 /** Peripheral LPUART2 base pointer */
-#define LPUART2                                  ((LPUART_Type *)LPUART2_BASE)
+#define LPUART2 ((LPUART_Type *)LPUART2_BASE)
 /** Peripheral LPUART3 base address */
-#define LPUART3_BASE                             (0x4018C000u)
+#define LPUART3_BASE (0x4018C000u)
 /** Peripheral LPUART3 base pointer */
-#define LPUART3                                  ((LPUART_Type *)LPUART3_BASE)
+#define LPUART3 ((LPUART_Type *)LPUART3_BASE)
 /** Peripheral LPUART4 base address */
-#define LPUART4_BASE                             (0x40190000u)
+#define LPUART4_BASE (0x40190000u)
 /** Peripheral LPUART4 base pointer */
-#define LPUART4                                  ((LPUART_Type *)LPUART4_BASE)
+#define LPUART4 ((LPUART_Type *)LPUART4_BASE)
 /** Peripheral LPUART5 base address */
-#define LPUART5_BASE                             (0x40194000u)
+#define LPUART5_BASE (0x40194000u)
 /** Peripheral LPUART5 base pointer */
-#define LPUART5                                  ((LPUART_Type *)LPUART5_BASE)
+#define LPUART5 ((LPUART_Type *)LPUART5_BASE)
 /** Peripheral LPUART6 base address */
-#define LPUART6_BASE                             (0x40198000u)
+#define LPUART6_BASE (0x40198000u)
 /** Peripheral LPUART6 base pointer */
-#define LPUART6                                  ((LPUART_Type *)LPUART6_BASE)
+#define LPUART6 ((LPUART_Type *)LPUART6_BASE)
 /** Peripheral LPUART7 base address */
-#define LPUART7_BASE                             (0x4019C000u)
+#define LPUART7_BASE (0x4019C000u)
 /** Peripheral LPUART7 base pointer */
-#define LPUART7                                  ((LPUART_Type *)LPUART7_BASE)
+#define LPUART7 ((LPUART_Type *)LPUART7_BASE)
 /** Peripheral LPUART8 base address */
-#define LPUART8_BASE                             (0x401A0000u)
+#define LPUART8_BASE (0x401A0000u)
 /** Peripheral LPUART8 base pointer */
-#define LPUART8                                  ((LPUART_Type *)LPUART8_BASE)
+#define LPUART8 ((LPUART_Type *)LPUART8_BASE)
 /** Array initializer of LPUART peripheral base addresses */
-#define LPUART_BASE_ADDRS                        { 0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE, LPUART8_BASE }
+#define LPUART_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, LPUART1_BASE, LPUART2_BASE, LPUART3_BASE, LPUART4_BASE, LPUART5_BASE, LPUART6_BASE, LPUART7_BASE,          \
+            LPUART8_BASE                                                                                               \
+    }
 /** Array initializer of LPUART peripheral base pointers */
-#define LPUART_BASE_PTRS                         { (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }
+#define LPUART_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (LPUART_Type *)0u, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8                      \
+    }
 /** Interrupt vectors for the LPUART peripheral type */
-#define LPUART_RX_TX_IRQS                        { NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn, LPUART7_IRQn, LPUART8_IRQn }
+#define LPUART_RX_TX_IRQS                                                                                              \
+    {                                                                                                                  \
+        NotAvail_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IRQn, LPUART4_IRQn, LPUART5_IRQn, LPUART6_IRQn,             \
+            LPUART7_IRQn, LPUART8_IRQn                                                                                 \
+    }
 
 /*!
  * @}
  */ /* end of group LPUART_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- OCOTP Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15143,107 +17364,108 @@ typedef struct {
  */
 
 /** OCOTP - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CTRL;                              /**< OTP Controller Control Register, offset: 0x0 */
-  __IO uint32_t CTRL_SET;                          /**< OTP Controller Control Register, offset: 0x4 */
-  __IO uint32_t CTRL_CLR;                          /**< OTP Controller Control Register, offset: 0x8 */
-  __IO uint32_t CTRL_TOG;                          /**< OTP Controller Control Register, offset: 0xC */
-  __IO uint32_t TIMING;                            /**< OTP Controller Timing Register, offset: 0x10 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t DATA;                              /**< OTP Controller Write Data Register, offset: 0x20 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t READ_CTRL;                         /**< OTP Controller Write Data Register, offset: 0x30 */
-       uint8_t RESERVED_2[12];
-  __IO uint32_t READ_FUSE_DATA;                    /**< OTP Controller Read Data Register, offset: 0x40 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t SW_STICKY;                         /**< Sticky bit Register, offset: 0x50 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t SCS;                               /**< Software Controllable Signals Register, offset: 0x60 */
-  __IO uint32_t SCS_SET;                           /**< Software Controllable Signals Register, offset: 0x64 */
-  __IO uint32_t SCS_CLR;                           /**< Software Controllable Signals Register, offset: 0x68 */
-  __IO uint32_t SCS_TOG;                           /**< Software Controllable Signals Register, offset: 0x6C */
-       uint8_t RESERVED_5[32];
-  __I  uint32_t VERSION;                           /**< OTP Controller Version Register, offset: 0x90 */
-       uint8_t RESERVED_6[108];
-  __IO uint32_t TIMING2;                           /**< OTP Controller Timing Register 2, offset: 0x100 */
-       uint8_t RESERVED_7[764];
-  __IO uint32_t LOCK;                              /**< Value of OTP Bank0 Word0 (Lock controls), offset: 0x400 */
-       uint8_t RESERVED_8[12];
-  __IO uint32_t CFG0;                              /**< Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.), offset: 0x410 */
-       uint8_t RESERVED_9[12];
-  __IO uint32_t CFG1;                              /**< Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.), offset: 0x420 */
-       uint8_t RESERVED_10[12];
-  __IO uint32_t CFG2;                              /**< Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.), offset: 0x430 */
-       uint8_t RESERVED_11[12];
-  __IO uint32_t CFG3;                              /**< Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.), offset: 0x440 */
-       uint8_t RESERVED_12[12];
-  __IO uint32_t CFG4;                              /**< Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.), offset: 0x450 */
-       uint8_t RESERVED_13[12];
-  __IO uint32_t CFG5;                              /**< Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.), offset: 0x460 */
-       uint8_t RESERVED_14[12];
-  __IO uint32_t CFG6;                              /**< Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.), offset: 0x470 */
-       uint8_t RESERVED_15[12];
-  __IO uint32_t MEM0;                              /**< Value of OTP Bank1 Word0 (Memory Related Info.), offset: 0x480 */
-       uint8_t RESERVED_16[12];
-  __IO uint32_t MEM1;                              /**< Value of OTP Bank1 Word1 (Memory Related Info.), offset: 0x490 */
-       uint8_t RESERVED_17[12];
-  __IO uint32_t MEM2;                              /**< Value of OTP Bank1 Word2 (Memory Related Info.), offset: 0x4A0 */
-       uint8_t RESERVED_18[12];
-  __IO uint32_t MEM3;                              /**< Value of OTP Bank1 Word3 (Memory Related Info.), offset: 0x4B0 */
-       uint8_t RESERVED_19[12];
-  __IO uint32_t MEM4;                              /**< Value of OTP Bank1 Word4 (Memory Related Info.), offset: 0x4C0 */
-       uint8_t RESERVED_20[12];
-  __IO uint32_t ANA0;                              /**< Value of OTP Bank1 Word5 (Analog Info.), offset: 0x4D0 */
-       uint8_t RESERVED_21[12];
-  __IO uint32_t ANA1;                              /**< Value of OTP Bank1 Word6 (Analog Info.), offset: 0x4E0 */
-       uint8_t RESERVED_22[12];
-  __IO uint32_t ANA2;                              /**< Value of OTP Bank1 Word7 (Analog Info.), offset: 0x4F0 */
-       uint8_t RESERVED_23[140];
-  __IO uint32_t SRK0;                              /**< Shadow Register for OTP Bank3 Word0 (SRK Hash), offset: 0x580 */
-       uint8_t RESERVED_24[12];
-  __IO uint32_t SRK1;                              /**< Shadow Register for OTP Bank3 Word1 (SRK Hash), offset: 0x590 */
-       uint8_t RESERVED_25[12];
-  __IO uint32_t SRK2;                              /**< Shadow Register for OTP Bank3 Word2 (SRK Hash), offset: 0x5A0 */
-       uint8_t RESERVED_26[12];
-  __IO uint32_t SRK3;                              /**< Shadow Register for OTP Bank3 Word3 (SRK Hash), offset: 0x5B0 */
-       uint8_t RESERVED_27[12];
-  __IO uint32_t SRK4;                              /**< Shadow Register for OTP Bank3 Word4 (SRK Hash), offset: 0x5C0 */
-       uint8_t RESERVED_28[12];
-  __IO uint32_t SRK5;                              /**< Shadow Register for OTP Bank3 Word5 (SRK Hash), offset: 0x5D0 */
-       uint8_t RESERVED_29[12];
-  __IO uint32_t SRK6;                              /**< Shadow Register for OTP Bank3 Word6 (SRK Hash), offset: 0x5E0 */
-       uint8_t RESERVED_30[12];
-  __IO uint32_t SRK7;                              /**< Shadow Register for OTP Bank3 Word7 (SRK Hash), offset: 0x5F0 */
-       uint8_t RESERVED_31[12];
-  __IO uint32_t SJC_RESP0;                         /**< Value of OTP Bank4 Word0 (Secure JTAG Response Field), offset: 0x600 */
-       uint8_t RESERVED_32[12];
-  __IO uint32_t SJC_RESP1;                         /**< Value of OTP Bank4 Word1 (Secure JTAG Response Field), offset: 0x610 */
-       uint8_t RESERVED_33[12];
-  __IO uint32_t MAC0;                              /**< Value of OTP Bank4 Word2 (MAC Address), offset: 0x620 */
-       uint8_t RESERVED_34[12];
-  __IO uint32_t MAC1;                              /**< Value of OTP Bank4 Word3 (MAC Address), offset: 0x630 */
-       uint8_t RESERVED_35[12];
-  __IO uint32_t GP3;                               /**< Value of OTP Bank4 Word4 (MAC Address), offset: 0x640 */
-       uint8_t RESERVED_36[28];
-  __IO uint32_t GP1;                               /**< Value of OTP Bank4 Word6 (General Purpose Customer Defined Info), offset: 0x660 */
-       uint8_t RESERVED_37[12];
-  __IO uint32_t GP2;                               /**< Value of OTP Bank4 Word7 (General Purpose Customer Defined Info), offset: 0x670 */
-       uint8_t RESERVED_38[12];
-  __IO uint32_t SW_GP1;                            /**< Value of OTP Bank5 Word0 (SW GP1), offset: 0x680 */
-       uint8_t RESERVED_39[12];
-  __IO uint32_t SW_GP20;                           /**< Value of OTP Bank5 Word1 (SW GP2), offset: 0x690 */
-       uint8_t RESERVED_40[12];
-  __IO uint32_t SW_GP21;                           /**< Value of OTP Bank5 Word2 (SW GP2), offset: 0x6A0 */
-       uint8_t RESERVED_41[12];
-  __IO uint32_t SW_GP22;                           /**< Value of OTP Bank5 Word3 (SW GP2), offset: 0x6B0 */
-       uint8_t RESERVED_42[12];
-  __IO uint32_t SW_GP23;                           /**< Value of OTP Bank5 Word4 (SW GP2), offset: 0x6C0 */
-       uint8_t RESERVED_43[12];
-  __IO uint32_t MISC_CONF0;                        /**< Value of OTP Bank5 Word5 (Misc Conf), offset: 0x6D0 */
-       uint8_t RESERVED_44[12];
-  __IO uint32_t MISC_CONF1;                        /**< Value of OTP Bank5 Word6 (Misc Conf), offset: 0x6E0 */
-       uint8_t RESERVED_45[12];
-  __IO uint32_t SRK_REVOKE;                        /**< Value of OTP Bank5 Word7 (SRK Revoke), offset: 0x6F0 */
+typedef struct
+{
+    __IO uint32_t CTRL;     /**< OTP Controller Control Register, offset: 0x0 */
+    __IO uint32_t CTRL_SET; /**< OTP Controller Control Register, offset: 0x4 */
+    __IO uint32_t CTRL_CLR; /**< OTP Controller Control Register, offset: 0x8 */
+    __IO uint32_t CTRL_TOG; /**< OTP Controller Control Register, offset: 0xC */
+    __IO uint32_t TIMING;   /**< OTP Controller Timing Register, offset: 0x10 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t DATA; /**< OTP Controller Write Data Register, offset: 0x20 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t READ_CTRL; /**< OTP Controller Write Data Register, offset: 0x30 */
+    uint8_t RESERVED_2[12];
+    __IO uint32_t READ_FUSE_DATA; /**< OTP Controller Read Data Register, offset: 0x40 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t SW_STICKY; /**< Sticky bit Register, offset: 0x50 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t SCS;     /**< Software Controllable Signals Register, offset: 0x60 */
+    __IO uint32_t SCS_SET; /**< Software Controllable Signals Register, offset: 0x64 */
+    __IO uint32_t SCS_CLR; /**< Software Controllable Signals Register, offset: 0x68 */
+    __IO uint32_t SCS_TOG; /**< Software Controllable Signals Register, offset: 0x6C */
+    uint8_t RESERVED_5[32];
+    __I uint32_t VERSION; /**< OTP Controller Version Register, offset: 0x90 */
+    uint8_t RESERVED_6[108];
+    __IO uint32_t TIMING2; /**< OTP Controller Timing Register 2, offset: 0x100 */
+    uint8_t RESERVED_7[764];
+    __IO uint32_t LOCK; /**< Value of OTP Bank0 Word0 (Lock controls), offset: 0x400 */
+    uint8_t RESERVED_8[12];
+    __IO uint32_t CFG0; /**< Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.), offset: 0x410 */
+    uint8_t RESERVED_9[12];
+    __IO uint32_t CFG1; /**< Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.), offset: 0x420 */
+    uint8_t RESERVED_10[12];
+    __IO uint32_t CFG2; /**< Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.), offset: 0x430 */
+    uint8_t RESERVED_11[12];
+    __IO uint32_t CFG3; /**< Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.), offset: 0x440 */
+    uint8_t RESERVED_12[12];
+    __IO uint32_t CFG4; /**< Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.), offset: 0x450 */
+    uint8_t RESERVED_13[12];
+    __IO uint32_t CFG5; /**< Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.), offset: 0x460 */
+    uint8_t RESERVED_14[12];
+    __IO uint32_t CFG6; /**< Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.), offset: 0x470 */
+    uint8_t RESERVED_15[12];
+    __IO uint32_t MEM0; /**< Value of OTP Bank1 Word0 (Memory Related Info.), offset: 0x480 */
+    uint8_t RESERVED_16[12];
+    __IO uint32_t MEM1; /**< Value of OTP Bank1 Word1 (Memory Related Info.), offset: 0x490 */
+    uint8_t RESERVED_17[12];
+    __IO uint32_t MEM2; /**< Value of OTP Bank1 Word2 (Memory Related Info.), offset: 0x4A0 */
+    uint8_t RESERVED_18[12];
+    __IO uint32_t MEM3; /**< Value of OTP Bank1 Word3 (Memory Related Info.), offset: 0x4B0 */
+    uint8_t RESERVED_19[12];
+    __IO uint32_t MEM4; /**< Value of OTP Bank1 Word4 (Memory Related Info.), offset: 0x4C0 */
+    uint8_t RESERVED_20[12];
+    __IO uint32_t ANA0; /**< Value of OTP Bank1 Word5 (Analog Info.), offset: 0x4D0 */
+    uint8_t RESERVED_21[12];
+    __IO uint32_t ANA1; /**< Value of OTP Bank1 Word6 (Analog Info.), offset: 0x4E0 */
+    uint8_t RESERVED_22[12];
+    __IO uint32_t ANA2; /**< Value of OTP Bank1 Word7 (Analog Info.), offset: 0x4F0 */
+    uint8_t RESERVED_23[140];
+    __IO uint32_t SRK0; /**< Shadow Register for OTP Bank3 Word0 (SRK Hash), offset: 0x580 */
+    uint8_t RESERVED_24[12];
+    __IO uint32_t SRK1; /**< Shadow Register for OTP Bank3 Word1 (SRK Hash), offset: 0x590 */
+    uint8_t RESERVED_25[12];
+    __IO uint32_t SRK2; /**< Shadow Register for OTP Bank3 Word2 (SRK Hash), offset: 0x5A0 */
+    uint8_t RESERVED_26[12];
+    __IO uint32_t SRK3; /**< Shadow Register for OTP Bank3 Word3 (SRK Hash), offset: 0x5B0 */
+    uint8_t RESERVED_27[12];
+    __IO uint32_t SRK4; /**< Shadow Register for OTP Bank3 Word4 (SRK Hash), offset: 0x5C0 */
+    uint8_t RESERVED_28[12];
+    __IO uint32_t SRK5; /**< Shadow Register for OTP Bank3 Word5 (SRK Hash), offset: 0x5D0 */
+    uint8_t RESERVED_29[12];
+    __IO uint32_t SRK6; /**< Shadow Register for OTP Bank3 Word6 (SRK Hash), offset: 0x5E0 */
+    uint8_t RESERVED_30[12];
+    __IO uint32_t SRK7; /**< Shadow Register for OTP Bank3 Word7 (SRK Hash), offset: 0x5F0 */
+    uint8_t RESERVED_31[12];
+    __IO uint32_t SJC_RESP0; /**< Value of OTP Bank4 Word0 (Secure JTAG Response Field), offset: 0x600 */
+    uint8_t RESERVED_32[12];
+    __IO uint32_t SJC_RESP1; /**< Value of OTP Bank4 Word1 (Secure JTAG Response Field), offset: 0x610 */
+    uint8_t RESERVED_33[12];
+    __IO uint32_t MAC0; /**< Value of OTP Bank4 Word2 (MAC Address), offset: 0x620 */
+    uint8_t RESERVED_34[12];
+    __IO uint32_t MAC1; /**< Value of OTP Bank4 Word3 (MAC Address), offset: 0x630 */
+    uint8_t RESERVED_35[12];
+    __IO uint32_t GP3; /**< Value of OTP Bank4 Word4 (MAC Address), offset: 0x640 */
+    uint8_t RESERVED_36[28];
+    __IO uint32_t GP1; /**< Value of OTP Bank4 Word6 (General Purpose Customer Defined Info), offset: 0x660 */
+    uint8_t RESERVED_37[12];
+    __IO uint32_t GP2; /**< Value of OTP Bank4 Word7 (General Purpose Customer Defined Info), offset: 0x670 */
+    uint8_t RESERVED_38[12];
+    __IO uint32_t SW_GP1; /**< Value of OTP Bank5 Word0 (SW GP1), offset: 0x680 */
+    uint8_t RESERVED_39[12];
+    __IO uint32_t SW_GP20; /**< Value of OTP Bank5 Word1 (SW GP2), offset: 0x690 */
+    uint8_t RESERVED_40[12];
+    __IO uint32_t SW_GP21; /**< Value of OTP Bank5 Word2 (SW GP2), offset: 0x6A0 */
+    uint8_t RESERVED_41[12];
+    __IO uint32_t SW_GP22; /**< Value of OTP Bank5 Word3 (SW GP2), offset: 0x6B0 */
+    uint8_t RESERVED_42[12];
+    __IO uint32_t SW_GP23; /**< Value of OTP Bank5 Word4 (SW GP2), offset: 0x6C0 */
+    uint8_t RESERVED_43[12];
+    __IO uint32_t MISC_CONF0; /**< Value of OTP Bank5 Word5 (Misc Conf), offset: 0x6D0 */
+    uint8_t RESERVED_44[12];
+    __IO uint32_t MISC_CONF1; /**< Value of OTP Bank5 Word6 (Misc Conf), offset: 0x6E0 */
+    uint8_t RESERVED_45[12];
+    __IO uint32_t SRK_REVOKE; /**< Value of OTP Bank5 Word7 (SRK Revoke), offset: 0x6F0 */
 } OCOTP_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15257,559 +17479,601 @@ typedef struct {
 
 /*! @name CTRL - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_ADDR_MASK                     (0x3FU)
-#define OCOTP_CTRL_ADDR_SHIFT                    (0U)
-#define OCOTP_CTRL_ADDR(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ADDR_SHIFT)) & OCOTP_CTRL_ADDR_MASK)
-#define OCOTP_CTRL_BUSY_MASK                     (0x100U)
-#define OCOTP_CTRL_BUSY_SHIFT                    (8U)
-#define OCOTP_CTRL_BUSY(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_BUSY_SHIFT)) & OCOTP_CTRL_BUSY_MASK)
-#define OCOTP_CTRL_ERROR_MASK                    (0x200U)
-#define OCOTP_CTRL_ERROR_SHIFT                   (9U)
-#define OCOTP_CTRL_ERROR(x)                      (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ERROR_SHIFT)) & OCOTP_CTRL_ERROR_MASK)
-#define OCOTP_CTRL_RELOAD_SHADOWS_MASK           (0x400U)
-#define OCOTP_CTRL_RELOAD_SHADOWS_SHIFT          (10U)
-#define OCOTP_CTRL_RELOAD_SHADOWS(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_WR_UNLOCK_MASK                (0xFFFF0000U)
-#define OCOTP_CTRL_WR_UNLOCK_SHIFT               (16U)
-#define OCOTP_CTRL_WR_UNLOCK(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_ADDR_MASK            (0x3FU)
+#define OCOTP_CTRL_ADDR_SHIFT           (0U)
+#define OCOTP_CTRL_ADDR(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ADDR_SHIFT)) & OCOTP_CTRL_ADDR_MASK)
+#define OCOTP_CTRL_BUSY_MASK            (0x100U)
+#define OCOTP_CTRL_BUSY_SHIFT           (8U)
+#define OCOTP_CTRL_BUSY(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_BUSY_SHIFT)) & OCOTP_CTRL_BUSY_MASK)
+#define OCOTP_CTRL_ERROR_MASK           (0x200U)
+#define OCOTP_CTRL_ERROR_SHIFT          (9U)
+#define OCOTP_CTRL_ERROR(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_ERROR_SHIFT)) & OCOTP_CTRL_ERROR_MASK)
+#define OCOTP_CTRL_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_RELOAD_SHADOWS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_WR_UNLOCK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_SET - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_SET_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_SET_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_SET_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ADDR_SHIFT)) & OCOTP_CTRL_SET_ADDR_MASK)
-#define OCOTP_CTRL_SET_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_SET_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_SET_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_BUSY_SHIFT)) & OCOTP_CTRL_SET_BUSY_MASK)
-#define OCOTP_CTRL_SET_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_SET_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_SET_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ERROR_SHIFT)) & OCOTP_CTRL_SET_ERROR_MASK)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_SET_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_SET_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_SET_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_SET_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_SET_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_SET_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_SET_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_SET_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ADDR_SHIFT)) & OCOTP_CTRL_SET_ADDR_MASK)
+#define OCOTP_CTRL_SET_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_SET_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_SET_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_BUSY_SHIFT)) & OCOTP_CTRL_SET_BUSY_MASK)
+#define OCOTP_CTRL_SET_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_SET_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_SET_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_ERROR_SHIFT)) & OCOTP_CTRL_SET_ERROR_MASK)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_SET_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_SET_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_SET_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_SET_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_SET_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_SET_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_SET_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_CLR - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_CLR_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_CLR_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_CLR_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ADDR_SHIFT)) & OCOTP_CTRL_CLR_ADDR_MASK)
-#define OCOTP_CTRL_CLR_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_CLR_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_CLR_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_BUSY_SHIFT)) & OCOTP_CTRL_CLR_BUSY_MASK)
-#define OCOTP_CTRL_CLR_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_CLR_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_CLR_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ERROR_SHIFT)) & OCOTP_CTRL_CLR_ERROR_MASK)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_CLR_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_CLR_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_CLR_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_CLR_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_CLR_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_CLR_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_CLR_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ADDR_SHIFT)) & OCOTP_CTRL_CLR_ADDR_MASK)
+#define OCOTP_CTRL_CLR_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_CLR_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_CLR_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_BUSY_SHIFT)) & OCOTP_CTRL_CLR_BUSY_MASK)
+#define OCOTP_CTRL_CLR_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_CLR_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_CLR_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_ERROR_SHIFT)) & OCOTP_CTRL_CLR_ERROR_MASK)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_CLR_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_CLR_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_CLR_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_CLR_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_CLR_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_CLR_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name CTRL_TOG - OTP Controller Control Register */
 /*! @{ */
-#define OCOTP_CTRL_TOG_ADDR_MASK                 (0x3FU)
-#define OCOTP_CTRL_TOG_ADDR_SHIFT                (0U)
-#define OCOTP_CTRL_TOG_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ADDR_SHIFT)) & OCOTP_CTRL_TOG_ADDR_MASK)
-#define OCOTP_CTRL_TOG_BUSY_MASK                 (0x100U)
-#define OCOTP_CTRL_TOG_BUSY_SHIFT                (8U)
-#define OCOTP_CTRL_TOG_BUSY(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_BUSY_SHIFT)) & OCOTP_CTRL_TOG_BUSY_MASK)
-#define OCOTP_CTRL_TOG_ERROR_MASK                (0x200U)
-#define OCOTP_CTRL_TOG_ERROR_SHIFT               (9U)
-#define OCOTP_CTRL_TOG_ERROR(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ERROR_SHIFT)) & OCOTP_CTRL_TOG_ERROR_MASK)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK       (0x400U)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT      (10U)
-#define OCOTP_CTRL_TOG_RELOAD_SHADOWS(x)         (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK)
-#define OCOTP_CTRL_TOG_WR_UNLOCK_MASK            (0xFFFF0000U)
-#define OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT           (16U)
-#define OCOTP_CTRL_TOG_WR_UNLOCK(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_TOG_WR_UNLOCK_MASK)
+#define OCOTP_CTRL_TOG_ADDR_MASK   (0x3FU)
+#define OCOTP_CTRL_TOG_ADDR_SHIFT  (0U)
+#define OCOTP_CTRL_TOG_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ADDR_SHIFT)) & OCOTP_CTRL_TOG_ADDR_MASK)
+#define OCOTP_CTRL_TOG_BUSY_MASK   (0x100U)
+#define OCOTP_CTRL_TOG_BUSY_SHIFT  (8U)
+#define OCOTP_CTRL_TOG_BUSY(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_BUSY_SHIFT)) & OCOTP_CTRL_TOG_BUSY_MASK)
+#define OCOTP_CTRL_TOG_ERROR_MASK  (0x200U)
+#define OCOTP_CTRL_TOG_ERROR_SHIFT (9U)
+#define OCOTP_CTRL_TOG_ERROR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_ERROR_SHIFT)) & OCOTP_CTRL_TOG_ERROR_MASK)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK  (0x400U)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT (10U)
+#define OCOTP_CTRL_TOG_RELOAD_SHADOWS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_RELOAD_SHADOWS_SHIFT)) & OCOTP_CTRL_TOG_RELOAD_SHADOWS_MASK)
+#define OCOTP_CTRL_TOG_WR_UNLOCK_MASK  (0xFFFF0000U)
+#define OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT (16U)
+#define OCOTP_CTRL_TOG_WR_UNLOCK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_CTRL_TOG_WR_UNLOCK_SHIFT)) & OCOTP_CTRL_TOG_WR_UNLOCK_MASK)
 /*! @} */
 
 /*! @name TIMING - OTP Controller Timing Register */
 /*! @{ */
-#define OCOTP_TIMING_STROBE_PROG_MASK            (0xFFFU)
-#define OCOTP_TIMING_STROBE_PROG_SHIFT           (0U)
-#define OCOTP_TIMING_STROBE_PROG(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_PROG_SHIFT)) & OCOTP_TIMING_STROBE_PROG_MASK)
-#define OCOTP_TIMING_RELAX_MASK                  (0xF000U)
-#define OCOTP_TIMING_RELAX_SHIFT                 (12U)
-#define OCOTP_TIMING_RELAX(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_RELAX_SHIFT)) & OCOTP_TIMING_RELAX_MASK)
-#define OCOTP_TIMING_STROBE_READ_MASK            (0x3F0000U)
-#define OCOTP_TIMING_STROBE_READ_SHIFT           (16U)
-#define OCOTP_TIMING_STROBE_READ(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_READ_SHIFT)) & OCOTP_TIMING_STROBE_READ_MASK)
-#define OCOTP_TIMING_WAIT_MASK                   (0xFC00000U)
-#define OCOTP_TIMING_WAIT_SHIFT                  (22U)
-#define OCOTP_TIMING_WAIT(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_WAIT_SHIFT)) & OCOTP_TIMING_WAIT_MASK)
+#define OCOTP_TIMING_STROBE_PROG_MASK  (0xFFFU)
+#define OCOTP_TIMING_STROBE_PROG_SHIFT (0U)
+#define OCOTP_TIMING_STROBE_PROG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_PROG_SHIFT)) & OCOTP_TIMING_STROBE_PROG_MASK)
+#define OCOTP_TIMING_RELAX_MASK        (0xF000U)
+#define OCOTP_TIMING_RELAX_SHIFT       (12U)
+#define OCOTP_TIMING_RELAX(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_RELAX_SHIFT)) & OCOTP_TIMING_RELAX_MASK)
+#define OCOTP_TIMING_STROBE_READ_MASK  (0x3F0000U)
+#define OCOTP_TIMING_STROBE_READ_SHIFT (16U)
+#define OCOTP_TIMING_STROBE_READ(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_STROBE_READ_SHIFT)) & OCOTP_TIMING_STROBE_READ_MASK)
+#define OCOTP_TIMING_WAIT_MASK  (0xFC00000U)
+#define OCOTP_TIMING_WAIT_SHIFT (22U)
+#define OCOTP_TIMING_WAIT(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING_WAIT_SHIFT)) & OCOTP_TIMING_WAIT_MASK)
 /*! @} */
 
 /*! @name DATA - OTP Controller Write Data Register */
 /*! @{ */
-#define OCOTP_DATA_DATA_MASK                     (0xFFFFFFFFU)
-#define OCOTP_DATA_DATA_SHIFT                    (0U)
-#define OCOTP_DATA_DATA(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_DATA_DATA_SHIFT)) & OCOTP_DATA_DATA_MASK)
+#define OCOTP_DATA_DATA_MASK  (0xFFFFFFFFU)
+#define OCOTP_DATA_DATA_SHIFT (0U)
+#define OCOTP_DATA_DATA(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_DATA_DATA_SHIFT)) & OCOTP_DATA_DATA_MASK)
 /*! @} */
 
 /*! @name READ_CTRL - OTP Controller Write Data Register */
 /*! @{ */
-#define OCOTP_READ_CTRL_READ_FUSE_MASK           (0x1U)
-#define OCOTP_READ_CTRL_READ_FUSE_SHIFT          (0U)
-#define OCOTP_READ_CTRL_READ_FUSE(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_CTRL_READ_FUSE_SHIFT)) & OCOTP_READ_CTRL_READ_FUSE_MASK)
+#define OCOTP_READ_CTRL_READ_FUSE_MASK  (0x1U)
+#define OCOTP_READ_CTRL_READ_FUSE_SHIFT (0U)
+#define OCOTP_READ_CTRL_READ_FUSE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_CTRL_READ_FUSE_SHIFT)) & OCOTP_READ_CTRL_READ_FUSE_MASK)
 /*! @} */
 
 /*! @name READ_FUSE_DATA - OTP Controller Read Data Register */
 /*! @{ */
-#define OCOTP_READ_FUSE_DATA_DATA_MASK           (0xFFFFFFFFU)
-#define OCOTP_READ_FUSE_DATA_DATA_SHIFT          (0U)
-#define OCOTP_READ_FUSE_DATA_DATA(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_FUSE_DATA_DATA_SHIFT)) & OCOTP_READ_FUSE_DATA_DATA_MASK)
+#define OCOTP_READ_FUSE_DATA_DATA_MASK  (0xFFFFFFFFU)
+#define OCOTP_READ_FUSE_DATA_DATA_SHIFT (0U)
+#define OCOTP_READ_FUSE_DATA_DATA(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_READ_FUSE_DATA_DATA_SHIFT)) & OCOTP_READ_FUSE_DATA_DATA_MASK)
 /*! @} */
 
 /*! @name SW_STICKY - Sticky bit Register */
 /*! @{ */
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK      (0x1U)
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT     (0U)
-#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY(x)        (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT)) & OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK     (0x2U)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT    (1U)
-#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT)) & OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK   (0x4U)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT  (2U)
-#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT)) & OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK      (0x8U)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT     (3U)
-#define OCOTP_SW_STICKY_BLOCK_ROM_PART(x)        (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT)) & OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK  (0x1U)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT (0U)
+#define OCOTP_SW_STICKY_BLOCK_DTCP_KEY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_DTCP_KEY_SHIFT)) & OCOTP_SW_STICKY_BLOCK_DTCP_KEY_MASK)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK  (0x2U)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT (1U)
+#define OCOTP_SW_STICKY_SRK_REVOKE_LOCK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_SRK_REVOKE_LOCK_SHIFT)) & OCOTP_SW_STICKY_SRK_REVOKE_LOCK_MASK)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK  (0x4U)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT (2U)
+#define OCOTP_SW_STICKY_FIELD_RETURN_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_FIELD_RETURN_LOCK_SHIFT)) & OCOTP_SW_STICKY_FIELD_RETURN_LOCK_MASK)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK  (0x8U)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT (3U)
+#define OCOTP_SW_STICKY_BLOCK_ROM_PART(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_BLOCK_ROM_PART_SHIFT)) & OCOTP_SW_STICKY_BLOCK_ROM_PART_MASK)
 #define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK  (0x10U)
 #define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT (4U)
-#define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT)) & OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK)
+#define OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_SHIFT)) &                                       \
+     OCOTP_SW_STICKY_JTAG_BLOCK_RELEASE_MASK)
 /*! @} */
 
 /*! @name SCS - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_HAB_JDE_MASK                   (0x1U)
-#define OCOTP_SCS_HAB_JDE_SHIFT                  (0U)
-#define OCOTP_SCS_HAB_JDE(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_HAB_JDE_SHIFT)) & OCOTP_SCS_HAB_JDE_MASK)
-#define OCOTP_SCS_SPARE_MASK                     (0x7FFFFFFEU)
-#define OCOTP_SCS_SPARE_SHIFT                    (1U)
-#define OCOTP_SCS_SPARE(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SPARE_SHIFT)) & OCOTP_SCS_SPARE_MASK)
-#define OCOTP_SCS_LOCK_MASK                      (0x80000000U)
-#define OCOTP_SCS_LOCK_SHIFT                     (31U)
-#define OCOTP_SCS_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_LOCK_SHIFT)) & OCOTP_SCS_LOCK_MASK)
+#define OCOTP_SCS_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_HAB_JDE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_HAB_JDE_SHIFT)) & OCOTP_SCS_HAB_JDE_MASK)
+#define OCOTP_SCS_SPARE_MASK    (0x7FFFFFFEU)
+#define OCOTP_SCS_SPARE_SHIFT   (1U)
+#define OCOTP_SCS_SPARE(x)      (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SPARE_SHIFT)) & OCOTP_SCS_SPARE_MASK)
+#define OCOTP_SCS_LOCK_MASK     (0x80000000U)
+#define OCOTP_SCS_LOCK_SHIFT    (31U)
+#define OCOTP_SCS_LOCK(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_LOCK_SHIFT)) & OCOTP_SCS_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_SET - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_SET_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_SET_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_SET_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_HAB_JDE_SHIFT)) & OCOTP_SCS_SET_HAB_JDE_MASK)
-#define OCOTP_SCS_SET_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_SET_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_SET_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
-#define OCOTP_SCS_SET_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_SET_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_SET_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_LOCK_SHIFT)) & OCOTP_SCS_SET_LOCK_MASK)
+#define OCOTP_SCS_SET_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_SET_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_SET_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_HAB_JDE_SHIFT)) & OCOTP_SCS_SET_HAB_JDE_MASK)
+#define OCOTP_SCS_SET_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_SET_SPARE_SHIFT (1U)
+#define OCOTP_SCS_SET_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
+#define OCOTP_SCS_SET_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_SET_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_SET_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_LOCK_SHIFT)) & OCOTP_SCS_SET_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_CLR - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_CLR_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_CLR_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_CLR_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_HAB_JDE_SHIFT)) & OCOTP_SCS_CLR_HAB_JDE_MASK)
-#define OCOTP_SCS_CLR_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_CLR_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_CLR_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_SPARE_SHIFT)) & OCOTP_SCS_CLR_SPARE_MASK)
-#define OCOTP_SCS_CLR_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_CLR_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_CLR_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_LOCK_SHIFT)) & OCOTP_SCS_CLR_LOCK_MASK)
+#define OCOTP_SCS_CLR_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_CLR_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_CLR_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_HAB_JDE_SHIFT)) & OCOTP_SCS_CLR_HAB_JDE_MASK)
+#define OCOTP_SCS_CLR_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_CLR_SPARE_SHIFT (1U)
+#define OCOTP_SCS_CLR_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_SPARE_SHIFT)) & OCOTP_SCS_CLR_SPARE_MASK)
+#define OCOTP_SCS_CLR_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_CLR_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_CLR_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_CLR_LOCK_SHIFT)) & OCOTP_SCS_CLR_LOCK_MASK)
 /*! @} */
 
 /*! @name SCS_TOG - Software Controllable Signals Register */
 /*! @{ */
-#define OCOTP_SCS_TOG_HAB_JDE_MASK               (0x1U)
-#define OCOTP_SCS_TOG_HAB_JDE_SHIFT              (0U)
-#define OCOTP_SCS_TOG_HAB_JDE(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_HAB_JDE_SHIFT)) & OCOTP_SCS_TOG_HAB_JDE_MASK)
-#define OCOTP_SCS_TOG_SPARE_MASK                 (0x7FFFFFFEU)
-#define OCOTP_SCS_TOG_SPARE_SHIFT                (1U)
-#define OCOTP_SCS_TOG_SPARE(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_SPARE_SHIFT)) & OCOTP_SCS_TOG_SPARE_MASK)
-#define OCOTP_SCS_TOG_LOCK_MASK                  (0x80000000U)
-#define OCOTP_SCS_TOG_LOCK_SHIFT                 (31U)
-#define OCOTP_SCS_TOG_LOCK(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_LOCK_SHIFT)) & OCOTP_SCS_TOG_LOCK_MASK)
+#define OCOTP_SCS_TOG_HAB_JDE_MASK  (0x1U)
+#define OCOTP_SCS_TOG_HAB_JDE_SHIFT (0U)
+#define OCOTP_SCS_TOG_HAB_JDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_HAB_JDE_SHIFT)) & OCOTP_SCS_TOG_HAB_JDE_MASK)
+#define OCOTP_SCS_TOG_SPARE_MASK  (0x7FFFFFFEU)
+#define OCOTP_SCS_TOG_SPARE_SHIFT (1U)
+#define OCOTP_SCS_TOG_SPARE(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_SPARE_SHIFT)) & OCOTP_SCS_TOG_SPARE_MASK)
+#define OCOTP_SCS_TOG_LOCK_MASK   (0x80000000U)
+#define OCOTP_SCS_TOG_LOCK_SHIFT  (31U)
+#define OCOTP_SCS_TOG_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_TOG_LOCK_SHIFT)) & OCOTP_SCS_TOG_LOCK_MASK)
 /*! @} */
 
 /*! @name VERSION - OTP Controller Version Register */
 /*! @{ */
-#define OCOTP_VERSION_STEP_MASK                  (0xFFFFU)
-#define OCOTP_VERSION_STEP_SHIFT                 (0U)
-#define OCOTP_VERSION_STEP(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_STEP_SHIFT)) & OCOTP_VERSION_STEP_MASK)
-#define OCOTP_VERSION_MINOR_MASK                 (0xFF0000U)
-#define OCOTP_VERSION_MINOR_SHIFT                (16U)
-#define OCOTP_VERSION_MINOR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MINOR_SHIFT)) & OCOTP_VERSION_MINOR_MASK)
-#define OCOTP_VERSION_MAJOR_MASK                 (0xFF000000U)
-#define OCOTP_VERSION_MAJOR_SHIFT                (24U)
-#define OCOTP_VERSION_MAJOR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MAJOR_SHIFT)) & OCOTP_VERSION_MAJOR_MASK)
+#define OCOTP_VERSION_STEP_MASK   (0xFFFFU)
+#define OCOTP_VERSION_STEP_SHIFT  (0U)
+#define OCOTP_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_STEP_SHIFT)) & OCOTP_VERSION_STEP_MASK)
+#define OCOTP_VERSION_MINOR_MASK  (0xFF0000U)
+#define OCOTP_VERSION_MINOR_SHIFT (16U)
+#define OCOTP_VERSION_MINOR(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MINOR_SHIFT)) & OCOTP_VERSION_MINOR_MASK)
+#define OCOTP_VERSION_MAJOR_MASK  (0xFF000000U)
+#define OCOTP_VERSION_MAJOR_SHIFT (24U)
+#define OCOTP_VERSION_MAJOR(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_VERSION_MAJOR_SHIFT)) & OCOTP_VERSION_MAJOR_MASK)
 /*! @} */
 
 /*! @name TIMING2 - OTP Controller Timing Register 2 */
 /*! @{ */
-#define OCOTP_TIMING2_RELAX_PROG_MASK            (0xFFFU)
-#define OCOTP_TIMING2_RELAX_PROG_SHIFT           (0U)
-#define OCOTP_TIMING2_RELAX_PROG(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_PROG_SHIFT)) & OCOTP_TIMING2_RELAX_PROG_MASK)
-#define OCOTP_TIMING2_RELAX_READ_MASK            (0x3F0000U)
-#define OCOTP_TIMING2_RELAX_READ_SHIFT           (16U)
-#define OCOTP_TIMING2_RELAX_READ(x)              (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_READ_SHIFT)) & OCOTP_TIMING2_RELAX_READ_MASK)
-#define OCOTP_TIMING2_RELAX1_MASK                (0x1FC00000U)
-#define OCOTP_TIMING2_RELAX1_SHIFT               (22U)
-#define OCOTP_TIMING2_RELAX1(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX1_SHIFT)) & OCOTP_TIMING2_RELAX1_MASK)
+#define OCOTP_TIMING2_RELAX_PROG_MASK  (0xFFFU)
+#define OCOTP_TIMING2_RELAX_PROG_SHIFT (0U)
+#define OCOTP_TIMING2_RELAX_PROG(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_PROG_SHIFT)) & OCOTP_TIMING2_RELAX_PROG_MASK)
+#define OCOTP_TIMING2_RELAX_READ_MASK  (0x3F0000U)
+#define OCOTP_TIMING2_RELAX_READ_SHIFT (16U)
+#define OCOTP_TIMING2_RELAX_READ(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX_READ_SHIFT)) & OCOTP_TIMING2_RELAX_READ_MASK)
+#define OCOTP_TIMING2_RELAX1_MASK  (0x1FC00000U)
+#define OCOTP_TIMING2_RELAX1_SHIFT (22U)
+#define OCOTP_TIMING2_RELAX1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_TIMING2_RELAX1_SHIFT)) & OCOTP_TIMING2_RELAX1_MASK)
 /*! @} */
 
 /*! @name LOCK - Value of OTP Bank0 Word0 (Lock controls) */
 /*! @{ */
-#define OCOTP_LOCK_TESTER_MASK                   (0x3U)
-#define OCOTP_LOCK_TESTER_SHIFT                  (0U)
-#define OCOTP_LOCK_TESTER(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_TESTER_SHIFT)) & OCOTP_LOCK_TESTER_MASK)
-#define OCOTP_LOCK_BOOT_CFG_MASK                 (0xCU)
-#define OCOTP_LOCK_BOOT_CFG_SHIFT                (2U)
-#define OCOTP_LOCK_BOOT_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_BOOT_CFG_SHIFT)) & OCOTP_LOCK_BOOT_CFG_MASK)
-#define OCOTP_LOCK_MEM_TRIM_MASK                 (0x30U)
-#define OCOTP_LOCK_MEM_TRIM_SHIFT                (4U)
-#define OCOTP_LOCK_MEM_TRIM(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MEM_TRIM_SHIFT)) & OCOTP_LOCK_MEM_TRIM_MASK)
-#define OCOTP_LOCK_SJC_RESP_MASK                 (0x40U)
-#define OCOTP_LOCK_SJC_RESP_SHIFT                (6U)
-#define OCOTP_LOCK_SJC_RESP(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SJC_RESP_SHIFT)) & OCOTP_LOCK_SJC_RESP_MASK)
-#define OCOTP_LOCK_MAC_ADDR_MASK                 (0x300U)
-#define OCOTP_LOCK_MAC_ADDR_SHIFT                (8U)
-#define OCOTP_LOCK_MAC_ADDR(x)                   (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MAC_ADDR_SHIFT)) & OCOTP_LOCK_MAC_ADDR_MASK)
-#define OCOTP_LOCK_GP1_MASK                      (0xC00U)
-#define OCOTP_LOCK_GP1_SHIFT                     (10U)
-#define OCOTP_LOCK_GP1(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP1_SHIFT)) & OCOTP_LOCK_GP1_MASK)
-#define OCOTP_LOCK_GP2_MASK                      (0x3000U)
-#define OCOTP_LOCK_GP2_SHIFT                     (12U)
-#define OCOTP_LOCK_GP2(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP2_SHIFT)) & OCOTP_LOCK_GP2_MASK)
-#define OCOTP_LOCK_SRK_MASK                      (0x4000U)
-#define OCOTP_LOCK_SRK_SHIFT                     (14U)
-#define OCOTP_LOCK_SRK(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SRK_SHIFT)) & OCOTP_LOCK_SRK_MASK)
-#define OCOTP_LOCK_OTPMK_MSB_MASK                (0x8000U)
-#define OCOTP_LOCK_OTPMK_MSB_SHIFT               (15U)
-#define OCOTP_LOCK_OTPMK_MSB(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_MSB_SHIFT)) & OCOTP_LOCK_OTPMK_MSB_MASK)
-#define OCOTP_LOCK_SW_GP1_MASK                   (0x10000U)
-#define OCOTP_LOCK_SW_GP1_SHIFT                  (16U)
-#define OCOTP_LOCK_SW_GP1(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP1_SHIFT)) & OCOTP_LOCK_SW_GP1_MASK)
-#define OCOTP_LOCK_OTPMK_LSB_MASK                (0x20000U)
-#define OCOTP_LOCK_OTPMK_LSB_SHIFT               (17U)
-#define OCOTP_LOCK_OTPMK_LSB(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_LSB_SHIFT)) & OCOTP_LOCK_OTPMK_LSB_MASK)
-#define OCOTP_LOCK_ANALOG_MASK                   (0xC0000U)
-#define OCOTP_LOCK_ANALOG_SHIFT                  (18U)
-#define OCOTP_LOCK_ANALOG(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_ANALOG_SHIFT)) & OCOTP_LOCK_ANALOG_MASK)
-#define OCOTP_LOCK_OTPMK_CRC_MASK                (0x100000U)
-#define OCOTP_LOCK_OTPMK_CRC_SHIFT               (20U)
-#define OCOTP_LOCK_OTPMK_CRC(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_CRC_SHIFT)) & OCOTP_LOCK_OTPMK_CRC_MASK)
-#define OCOTP_LOCK_SW_GP2_LOCK_MASK              (0x200000U)
-#define OCOTP_LOCK_SW_GP2_LOCK_SHIFT             (21U)
-#define OCOTP_LOCK_SW_GP2_LOCK(x)                (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_LOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_LOCK_MASK)
-#define OCOTP_LOCK_MISC_CONF_MASK                (0x400000U)
-#define OCOTP_LOCK_MISC_CONF_SHIFT               (22U)
-#define OCOTP_LOCK_MISC_CONF(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MISC_CONF_SHIFT)) & OCOTP_LOCK_MISC_CONF_MASK)
-#define OCOTP_LOCK_SW_GP2_RLOCK_MASK             (0x800000U)
-#define OCOTP_LOCK_SW_GP2_RLOCK_SHIFT            (23U)
-#define OCOTP_LOCK_SW_GP2_RLOCK(x)               (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_RLOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_RLOCK_MASK)
-#define OCOTP_LOCK_GP3_MASK                      (0xC000000U)
-#define OCOTP_LOCK_GP3_SHIFT                     (26U)
-#define OCOTP_LOCK_GP3(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP3_SHIFT)) & OCOTP_LOCK_GP3_MASK)
-#define OCOTP_LOCK_FIELD_RETURN_MASK             (0xF0000000U)
-#define OCOTP_LOCK_FIELD_RETURN_SHIFT            (28U)
-#define OCOTP_LOCK_FIELD_RETURN(x)               (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_FIELD_RETURN_SHIFT)) & OCOTP_LOCK_FIELD_RETURN_MASK)
+#define OCOTP_LOCK_TESTER_MASK     (0x3U)
+#define OCOTP_LOCK_TESTER_SHIFT    (0U)
+#define OCOTP_LOCK_TESTER(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_TESTER_SHIFT)) & OCOTP_LOCK_TESTER_MASK)
+#define OCOTP_LOCK_BOOT_CFG_MASK   (0xCU)
+#define OCOTP_LOCK_BOOT_CFG_SHIFT  (2U)
+#define OCOTP_LOCK_BOOT_CFG(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_BOOT_CFG_SHIFT)) & OCOTP_LOCK_BOOT_CFG_MASK)
+#define OCOTP_LOCK_MEM_TRIM_MASK   (0x30U)
+#define OCOTP_LOCK_MEM_TRIM_SHIFT  (4U)
+#define OCOTP_LOCK_MEM_TRIM(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MEM_TRIM_SHIFT)) & OCOTP_LOCK_MEM_TRIM_MASK)
+#define OCOTP_LOCK_SJC_RESP_MASK   (0x40U)
+#define OCOTP_LOCK_SJC_RESP_SHIFT  (6U)
+#define OCOTP_LOCK_SJC_RESP(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SJC_RESP_SHIFT)) & OCOTP_LOCK_SJC_RESP_MASK)
+#define OCOTP_LOCK_MAC_ADDR_MASK   (0x300U)
+#define OCOTP_LOCK_MAC_ADDR_SHIFT  (8U)
+#define OCOTP_LOCK_MAC_ADDR(x)     (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MAC_ADDR_SHIFT)) & OCOTP_LOCK_MAC_ADDR_MASK)
+#define OCOTP_LOCK_GP1_MASK        (0xC00U)
+#define OCOTP_LOCK_GP1_SHIFT       (10U)
+#define OCOTP_LOCK_GP1(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP1_SHIFT)) & OCOTP_LOCK_GP1_MASK)
+#define OCOTP_LOCK_GP2_MASK        (0x3000U)
+#define OCOTP_LOCK_GP2_SHIFT       (12U)
+#define OCOTP_LOCK_GP2(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP2_SHIFT)) & OCOTP_LOCK_GP2_MASK)
+#define OCOTP_LOCK_SRK_MASK        (0x4000U)
+#define OCOTP_LOCK_SRK_SHIFT       (14U)
+#define OCOTP_LOCK_SRK(x)          (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SRK_SHIFT)) & OCOTP_LOCK_SRK_MASK)
+#define OCOTP_LOCK_OTPMK_MSB_MASK  (0x8000U)
+#define OCOTP_LOCK_OTPMK_MSB_SHIFT (15U)
+#define OCOTP_LOCK_OTPMK_MSB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_MSB_SHIFT)) & OCOTP_LOCK_OTPMK_MSB_MASK)
+#define OCOTP_LOCK_SW_GP1_MASK     (0x10000U)
+#define OCOTP_LOCK_SW_GP1_SHIFT    (16U)
+#define OCOTP_LOCK_SW_GP1(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP1_SHIFT)) & OCOTP_LOCK_SW_GP1_MASK)
+#define OCOTP_LOCK_OTPMK_LSB_MASK  (0x20000U)
+#define OCOTP_LOCK_OTPMK_LSB_SHIFT (17U)
+#define OCOTP_LOCK_OTPMK_LSB(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_LSB_SHIFT)) & OCOTP_LOCK_OTPMK_LSB_MASK)
+#define OCOTP_LOCK_ANALOG_MASK     (0xC0000U)
+#define OCOTP_LOCK_ANALOG_SHIFT    (18U)
+#define OCOTP_LOCK_ANALOG(x)       (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_ANALOG_SHIFT)) & OCOTP_LOCK_ANALOG_MASK)
+#define OCOTP_LOCK_OTPMK_CRC_MASK  (0x100000U)
+#define OCOTP_LOCK_OTPMK_CRC_SHIFT (20U)
+#define OCOTP_LOCK_OTPMK_CRC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_OTPMK_CRC_SHIFT)) & OCOTP_LOCK_OTPMK_CRC_MASK)
+#define OCOTP_LOCK_SW_GP2_LOCK_MASK  (0x200000U)
+#define OCOTP_LOCK_SW_GP2_LOCK_SHIFT (21U)
+#define OCOTP_LOCK_SW_GP2_LOCK(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_LOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_LOCK_MASK)
+#define OCOTP_LOCK_MISC_CONF_MASK  (0x400000U)
+#define OCOTP_LOCK_MISC_CONF_SHIFT (22U)
+#define OCOTP_LOCK_MISC_CONF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_MISC_CONF_SHIFT)) & OCOTP_LOCK_MISC_CONF_MASK)
+#define OCOTP_LOCK_SW_GP2_RLOCK_MASK  (0x800000U)
+#define OCOTP_LOCK_SW_GP2_RLOCK_SHIFT (23U)
+#define OCOTP_LOCK_SW_GP2_RLOCK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_SW_GP2_RLOCK_SHIFT)) & OCOTP_LOCK_SW_GP2_RLOCK_MASK)
+#define OCOTP_LOCK_GP3_MASK           (0xC000000U)
+#define OCOTP_LOCK_GP3_SHIFT          (26U)
+#define OCOTP_LOCK_GP3(x)             (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_GP3_SHIFT)) & OCOTP_LOCK_GP3_MASK)
+#define OCOTP_LOCK_FIELD_RETURN_MASK  (0xF0000000U)
+#define OCOTP_LOCK_FIELD_RETURN_SHIFT (28U)
+#define OCOTP_LOCK_FIELD_RETURN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_LOCK_FIELD_RETURN_SHIFT)) & OCOTP_LOCK_FIELD_RETURN_MASK)
 /*! @} */
 
 /*! @name CFG0 - Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG0_BITS_SHIFT                    (0U)
-#define OCOTP_CFG0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG0_BITS_SHIFT)) & OCOTP_CFG0_BITS_MASK)
+#define OCOTP_CFG0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG0_BITS_SHIFT (0U)
+#define OCOTP_CFG0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG0_BITS_SHIFT)) & OCOTP_CFG0_BITS_MASK)
 /*! @} */
 
 /*! @name CFG1 - Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG1_BITS_SHIFT                    (0U)
-#define OCOTP_CFG1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG1_BITS_SHIFT)) & OCOTP_CFG1_BITS_MASK)
+#define OCOTP_CFG1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG1_BITS_SHIFT (0U)
+#define OCOTP_CFG1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG1_BITS_SHIFT)) & OCOTP_CFG1_BITS_MASK)
 /*! @} */
 
 /*! @name CFG2 - Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG2_BITS_SHIFT                    (0U)
-#define OCOTP_CFG2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG2_BITS_SHIFT)) & OCOTP_CFG2_BITS_MASK)
+#define OCOTP_CFG2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG2_BITS_SHIFT (0U)
+#define OCOTP_CFG2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG2_BITS_SHIFT)) & OCOTP_CFG2_BITS_MASK)
 /*! @} */
 
 /*! @name CFG3 - Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG3_BITS_SHIFT                    (0U)
-#define OCOTP_CFG3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG3_BITS_SHIFT)) & OCOTP_CFG3_BITS_MASK)
+#define OCOTP_CFG3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG3_BITS_SHIFT (0U)
+#define OCOTP_CFG3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG3_BITS_SHIFT)) & OCOTP_CFG3_BITS_MASK)
 /*! @} */
 
 /*! @name CFG4 - Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG4_BITS_SHIFT                    (0U)
-#define OCOTP_CFG4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG4_BITS_SHIFT)) & OCOTP_CFG4_BITS_MASK)
+#define OCOTP_CFG4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG4_BITS_SHIFT (0U)
+#define OCOTP_CFG4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG4_BITS_SHIFT)) & OCOTP_CFG4_BITS_MASK)
 /*! @} */
 
 /*! @name CFG5 - Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG5_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG5_BITS_SHIFT                    (0U)
-#define OCOTP_CFG5_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG5_BITS_SHIFT)) & OCOTP_CFG5_BITS_MASK)
+#define OCOTP_CFG5_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG5_BITS_SHIFT (0U)
+#define OCOTP_CFG5_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG5_BITS_SHIFT)) & OCOTP_CFG5_BITS_MASK)
 /*! @} */
 
 /*! @name CFG6 - Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.) */
 /*! @{ */
-#define OCOTP_CFG6_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_CFG6_BITS_SHIFT                    (0U)
-#define OCOTP_CFG6_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG6_BITS_SHIFT)) & OCOTP_CFG6_BITS_MASK)
+#define OCOTP_CFG6_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_CFG6_BITS_SHIFT (0U)
+#define OCOTP_CFG6_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_CFG6_BITS_SHIFT)) & OCOTP_CFG6_BITS_MASK)
 /*! @} */
 
 /*! @name MEM0 - Value of OTP Bank1 Word0 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM0_BITS_SHIFT                    (0U)
-#define OCOTP_MEM0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM0_BITS_SHIFT)) & OCOTP_MEM0_BITS_MASK)
+#define OCOTP_MEM0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM0_BITS_SHIFT (0U)
+#define OCOTP_MEM0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM0_BITS_SHIFT)) & OCOTP_MEM0_BITS_MASK)
 /*! @} */
 
 /*! @name MEM1 - Value of OTP Bank1 Word1 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM1_BITS_SHIFT                    (0U)
-#define OCOTP_MEM1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM1_BITS_SHIFT)) & OCOTP_MEM1_BITS_MASK)
+#define OCOTP_MEM1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM1_BITS_SHIFT (0U)
+#define OCOTP_MEM1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM1_BITS_SHIFT)) & OCOTP_MEM1_BITS_MASK)
 /*! @} */
 
 /*! @name MEM2 - Value of OTP Bank1 Word2 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM2_BITS_SHIFT                    (0U)
-#define OCOTP_MEM2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM2_BITS_SHIFT)) & OCOTP_MEM2_BITS_MASK)
+#define OCOTP_MEM2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM2_BITS_SHIFT (0U)
+#define OCOTP_MEM2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM2_BITS_SHIFT)) & OCOTP_MEM2_BITS_MASK)
 /*! @} */
 
 /*! @name MEM3 - Value of OTP Bank1 Word3 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM3_BITS_SHIFT                    (0U)
-#define OCOTP_MEM3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM3_BITS_SHIFT)) & OCOTP_MEM3_BITS_MASK)
+#define OCOTP_MEM3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM3_BITS_SHIFT (0U)
+#define OCOTP_MEM3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM3_BITS_SHIFT)) & OCOTP_MEM3_BITS_MASK)
 /*! @} */
 
 /*! @name MEM4 - Value of OTP Bank1 Word4 (Memory Related Info.) */
 /*! @{ */
-#define OCOTP_MEM4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MEM4_BITS_SHIFT                    (0U)
-#define OCOTP_MEM4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM4_BITS_SHIFT)) & OCOTP_MEM4_BITS_MASK)
+#define OCOTP_MEM4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MEM4_BITS_SHIFT (0U)
+#define OCOTP_MEM4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MEM4_BITS_SHIFT)) & OCOTP_MEM4_BITS_MASK)
 /*! @} */
 
 /*! @name ANA0 - Value of OTP Bank1 Word5 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA0_BITS_SHIFT                    (0U)
-#define OCOTP_ANA0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA0_BITS_SHIFT)) & OCOTP_ANA0_BITS_MASK)
+#define OCOTP_ANA0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA0_BITS_SHIFT (0U)
+#define OCOTP_ANA0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA0_BITS_SHIFT)) & OCOTP_ANA0_BITS_MASK)
 /*! @} */
 
 /*! @name ANA1 - Value of OTP Bank1 Word6 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA1_BITS_SHIFT                    (0U)
-#define OCOTP_ANA1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA1_BITS_SHIFT)) & OCOTP_ANA1_BITS_MASK)
+#define OCOTP_ANA1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA1_BITS_SHIFT (0U)
+#define OCOTP_ANA1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA1_BITS_SHIFT)) & OCOTP_ANA1_BITS_MASK)
 /*! @} */
 
 /*! @name ANA2 - Value of OTP Bank1 Word7 (Analog Info.) */
 /*! @{ */
-#define OCOTP_ANA2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_ANA2_BITS_SHIFT                    (0U)
-#define OCOTP_ANA2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA2_BITS_SHIFT)) & OCOTP_ANA2_BITS_MASK)
+#define OCOTP_ANA2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_ANA2_BITS_SHIFT (0U)
+#define OCOTP_ANA2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_ANA2_BITS_SHIFT)) & OCOTP_ANA2_BITS_MASK)
 /*! @} */
 
 /*! @name SRK0 - Shadow Register for OTP Bank3 Word0 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK0_BITS_SHIFT                    (0U)
-#define OCOTP_SRK0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK0_BITS_SHIFT)) & OCOTP_SRK0_BITS_MASK)
+#define OCOTP_SRK0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK0_BITS_SHIFT (0U)
+#define OCOTP_SRK0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK0_BITS_SHIFT)) & OCOTP_SRK0_BITS_MASK)
 /*! @} */
 
 /*! @name SRK1 - Shadow Register for OTP Bank3 Word1 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK1_BITS_SHIFT                    (0U)
-#define OCOTP_SRK1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK1_BITS_SHIFT)) & OCOTP_SRK1_BITS_MASK)
+#define OCOTP_SRK1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK1_BITS_SHIFT (0U)
+#define OCOTP_SRK1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK1_BITS_SHIFT)) & OCOTP_SRK1_BITS_MASK)
 /*! @} */
 
 /*! @name SRK2 - Shadow Register for OTP Bank3 Word2 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK2_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK2_BITS_SHIFT                    (0U)
-#define OCOTP_SRK2_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK2_BITS_SHIFT)) & OCOTP_SRK2_BITS_MASK)
+#define OCOTP_SRK2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK2_BITS_SHIFT (0U)
+#define OCOTP_SRK2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK2_BITS_SHIFT)) & OCOTP_SRK2_BITS_MASK)
 /*! @} */
 
 /*! @name SRK3 - Shadow Register for OTP Bank3 Word3 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK3_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK3_BITS_SHIFT                    (0U)
-#define OCOTP_SRK3_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK3_BITS_SHIFT)) & OCOTP_SRK3_BITS_MASK)
+#define OCOTP_SRK3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK3_BITS_SHIFT (0U)
+#define OCOTP_SRK3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK3_BITS_SHIFT)) & OCOTP_SRK3_BITS_MASK)
 /*! @} */
 
 /*! @name SRK4 - Shadow Register for OTP Bank3 Word4 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK4_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK4_BITS_SHIFT                    (0U)
-#define OCOTP_SRK4_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK4_BITS_SHIFT)) & OCOTP_SRK4_BITS_MASK)
+#define OCOTP_SRK4_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK4_BITS_SHIFT (0U)
+#define OCOTP_SRK4_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK4_BITS_SHIFT)) & OCOTP_SRK4_BITS_MASK)
 /*! @} */
 
 /*! @name SRK5 - Shadow Register for OTP Bank3 Word5 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK5_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK5_BITS_SHIFT                    (0U)
-#define OCOTP_SRK5_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK5_BITS_SHIFT)) & OCOTP_SRK5_BITS_MASK)
+#define OCOTP_SRK5_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK5_BITS_SHIFT (0U)
+#define OCOTP_SRK5_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK5_BITS_SHIFT)) & OCOTP_SRK5_BITS_MASK)
 /*! @} */
 
 /*! @name SRK6 - Shadow Register for OTP Bank3 Word6 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK6_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK6_BITS_SHIFT                    (0U)
-#define OCOTP_SRK6_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK6_BITS_SHIFT)) & OCOTP_SRK6_BITS_MASK)
+#define OCOTP_SRK6_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK6_BITS_SHIFT (0U)
+#define OCOTP_SRK6_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK6_BITS_SHIFT)) & OCOTP_SRK6_BITS_MASK)
 /*! @} */
 
 /*! @name SRK7 - Shadow Register for OTP Bank3 Word7 (SRK Hash) */
 /*! @{ */
-#define OCOTP_SRK7_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_SRK7_BITS_SHIFT                    (0U)
-#define OCOTP_SRK7_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK7_BITS_SHIFT)) & OCOTP_SRK7_BITS_MASK)
+#define OCOTP_SRK7_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK7_BITS_SHIFT (0U)
+#define OCOTP_SRK7_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK7_BITS_SHIFT)) & OCOTP_SRK7_BITS_MASK)
 /*! @} */
 
 /*! @name SJC_RESP0 - Value of OTP Bank4 Word0 (Secure JTAG Response Field) */
 /*! @{ */
-#define OCOTP_SJC_RESP0_BITS_MASK                (0xFFFFFFFFU)
-#define OCOTP_SJC_RESP0_BITS_SHIFT               (0U)
-#define OCOTP_SJC_RESP0_BITS(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP0_BITS_SHIFT)) & OCOTP_SJC_RESP0_BITS_MASK)
+#define OCOTP_SJC_RESP0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SJC_RESP0_BITS_SHIFT (0U)
+#define OCOTP_SJC_RESP0_BITS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP0_BITS_SHIFT)) & OCOTP_SJC_RESP0_BITS_MASK)
 /*! @} */
 
 /*! @name SJC_RESP1 - Value of OTP Bank4 Word1 (Secure JTAG Response Field) */
 /*! @{ */
-#define OCOTP_SJC_RESP1_BITS_MASK                (0xFFFFFFFFU)
-#define OCOTP_SJC_RESP1_BITS_SHIFT               (0U)
-#define OCOTP_SJC_RESP1_BITS(x)                  (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP1_BITS_SHIFT)) & OCOTP_SJC_RESP1_BITS_MASK)
+#define OCOTP_SJC_RESP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SJC_RESP1_BITS_SHIFT (0U)
+#define OCOTP_SJC_RESP1_BITS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SJC_RESP1_BITS_SHIFT)) & OCOTP_SJC_RESP1_BITS_MASK)
 /*! @} */
 
 /*! @name MAC0 - Value of OTP Bank4 Word2 (MAC Address) */
 /*! @{ */
-#define OCOTP_MAC0_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MAC0_BITS_SHIFT                    (0U)
-#define OCOTP_MAC0_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC0_BITS_SHIFT)) & OCOTP_MAC0_BITS_MASK)
+#define OCOTP_MAC0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MAC0_BITS_SHIFT (0U)
+#define OCOTP_MAC0_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC0_BITS_SHIFT)) & OCOTP_MAC0_BITS_MASK)
 /*! @} */
 
 /*! @name MAC1 - Value of OTP Bank4 Word3 (MAC Address) */
 /*! @{ */
-#define OCOTP_MAC1_BITS_MASK                     (0xFFFFFFFFU)
-#define OCOTP_MAC1_BITS_SHIFT                    (0U)
-#define OCOTP_MAC1_BITS(x)                       (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC1_BITS_SHIFT)) & OCOTP_MAC1_BITS_MASK)
+#define OCOTP_MAC1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MAC1_BITS_SHIFT (0U)
+#define OCOTP_MAC1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_MAC1_BITS_SHIFT)) & OCOTP_MAC1_BITS_MASK)
 /*! @} */
 
 /*! @name GP3 - Value of OTP Bank4 Word4 (MAC Address) */
 /*! @{ */
-#define OCOTP_GP3_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP3_BITS_SHIFT                     (0U)
-#define OCOTP_GP3_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP3_BITS_SHIFT)) & OCOTP_GP3_BITS_MASK)
+#define OCOTP_GP3_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP3_BITS_SHIFT (0U)
+#define OCOTP_GP3_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP3_BITS_SHIFT)) & OCOTP_GP3_BITS_MASK)
 /*! @} */
 
 /*! @name GP1 - Value of OTP Bank4 Word6 (General Purpose Customer Defined Info) */
 /*! @{ */
-#define OCOTP_GP1_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP1_BITS_SHIFT                     (0U)
-#define OCOTP_GP1_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP1_BITS_SHIFT)) & OCOTP_GP1_BITS_MASK)
+#define OCOTP_GP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP1_BITS_SHIFT (0U)
+#define OCOTP_GP1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP1_BITS_SHIFT)) & OCOTP_GP1_BITS_MASK)
 /*! @} */
 
 /*! @name GP2 - Value of OTP Bank4 Word7 (General Purpose Customer Defined Info) */
 /*! @{ */
-#define OCOTP_GP2_BITS_MASK                      (0xFFFFFFFFU)
-#define OCOTP_GP2_BITS_SHIFT                     (0U)
-#define OCOTP_GP2_BITS(x)                        (((uint32_t)(((uint32_t)(x)) << OCOTP_GP2_BITS_SHIFT)) & OCOTP_GP2_BITS_MASK)
+#define OCOTP_GP2_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_GP2_BITS_SHIFT (0U)
+#define OCOTP_GP2_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_GP2_BITS_SHIFT)) & OCOTP_GP2_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP1 - Value of OTP Bank5 Word0 (SW GP1) */
 /*! @{ */
-#define OCOTP_SW_GP1_BITS_MASK                   (0xFFFFFFFFU)
-#define OCOTP_SW_GP1_BITS_SHIFT                  (0U)
-#define OCOTP_SW_GP1_BITS(x)                     (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP1_BITS_SHIFT)) & OCOTP_SW_GP1_BITS_MASK)
+#define OCOTP_SW_GP1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP1_BITS_SHIFT (0U)
+#define OCOTP_SW_GP1_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP1_BITS_SHIFT)) & OCOTP_SW_GP1_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP20 - Value of OTP Bank5 Word1 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP20_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP20_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP20_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP20_BITS_SHIFT)) & OCOTP_SW_GP20_BITS_MASK)
+#define OCOTP_SW_GP20_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP20_BITS_SHIFT (0U)
+#define OCOTP_SW_GP20_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP20_BITS_SHIFT)) & OCOTP_SW_GP20_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP21 - Value of OTP Bank5 Word2 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP21_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP21_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP21_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP21_BITS_SHIFT)) & OCOTP_SW_GP21_BITS_MASK)
+#define OCOTP_SW_GP21_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP21_BITS_SHIFT (0U)
+#define OCOTP_SW_GP21_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP21_BITS_SHIFT)) & OCOTP_SW_GP21_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP22 - Value of OTP Bank5 Word3 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP22_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP22_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP22_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP22_BITS_SHIFT)) & OCOTP_SW_GP22_BITS_MASK)
+#define OCOTP_SW_GP22_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP22_BITS_SHIFT (0U)
+#define OCOTP_SW_GP22_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP22_BITS_SHIFT)) & OCOTP_SW_GP22_BITS_MASK)
 /*! @} */
 
 /*! @name SW_GP23 - Value of OTP Bank5 Word4 (SW GP2) */
 /*! @{ */
-#define OCOTP_SW_GP23_BITS_MASK                  (0xFFFFFFFFU)
-#define OCOTP_SW_GP23_BITS_SHIFT                 (0U)
-#define OCOTP_SW_GP23_BITS(x)                    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP23_BITS_SHIFT)) & OCOTP_SW_GP23_BITS_MASK)
+#define OCOTP_SW_GP23_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SW_GP23_BITS_SHIFT (0U)
+#define OCOTP_SW_GP23_BITS(x)    (((uint32_t)(((uint32_t)(x)) << OCOTP_SW_GP23_BITS_SHIFT)) & OCOTP_SW_GP23_BITS_MASK)
 /*! @} */
 
 /*! @name MISC_CONF0 - Value of OTP Bank5 Word5 (Misc Conf) */
 /*! @{ */
-#define OCOTP_MISC_CONF0_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_MISC_CONF0_BITS_SHIFT              (0U)
-#define OCOTP_MISC_CONF0_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF0_BITS_SHIFT)) & OCOTP_MISC_CONF0_BITS_MASK)
+#define OCOTP_MISC_CONF0_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MISC_CONF0_BITS_SHIFT (0U)
+#define OCOTP_MISC_CONF0_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF0_BITS_SHIFT)) & OCOTP_MISC_CONF0_BITS_MASK)
 /*! @} */
 
 /*! @name MISC_CONF1 - Value of OTP Bank5 Word6 (Misc Conf) */
 /*! @{ */
-#define OCOTP_MISC_CONF1_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_MISC_CONF1_BITS_SHIFT              (0U)
-#define OCOTP_MISC_CONF1_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF1_BITS_SHIFT)) & OCOTP_MISC_CONF1_BITS_MASK)
+#define OCOTP_MISC_CONF1_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_MISC_CONF1_BITS_SHIFT (0U)
+#define OCOTP_MISC_CONF1_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_MISC_CONF1_BITS_SHIFT)) & OCOTP_MISC_CONF1_BITS_MASK)
 /*! @} */
 
 /*! @name SRK_REVOKE - Value of OTP Bank5 Word7 (SRK Revoke) */
 /*! @{ */
-#define OCOTP_SRK_REVOKE_BITS_MASK               (0xFFFFFFFFU)
-#define OCOTP_SRK_REVOKE_BITS_SHIFT              (0U)
-#define OCOTP_SRK_REVOKE_BITS(x)                 (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK_REVOKE_BITS_SHIFT)) & OCOTP_SRK_REVOKE_BITS_MASK)
+#define OCOTP_SRK_REVOKE_BITS_MASK  (0xFFFFFFFFU)
+#define OCOTP_SRK_REVOKE_BITS_SHIFT (0U)
+#define OCOTP_SRK_REVOKE_BITS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << OCOTP_SRK_REVOKE_BITS_SHIFT)) & OCOTP_SRK_REVOKE_BITS_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group OCOTP_Register_Masks */
 
-
 /* OCOTP - Peripheral instance base addresses */
 /** Peripheral OCOTP base address */
-#define OCOTP_BASE                               (0x401F4000u)
+#define OCOTP_BASE (0x401F4000u)
 /** Peripheral OCOTP base pointer */
-#define OCOTP                                    ((OCOTP_Type *)OCOTP_BASE)
+#define OCOTP ((OCOTP_Type *)OCOTP_BASE)
 /** Array initializer of OCOTP peripheral base addresses */
-#define OCOTP_BASE_ADDRS                         { OCOTP_BASE }
+#define OCOTP_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        OCOTP_BASE                                                                                                     \
+    }
 /** Array initializer of OCOTP peripheral base pointers */
-#define OCOTP_BASE_PTRS                          { OCOTP }
+#define OCOTP_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        OCOTP                                                                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group OCOTP_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PGC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15820,17 +18084,18 @@ typedef struct {
  */
 
 /** PGC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[544];
-  __IO uint32_t MEGA_CTRL;                         /**< PGC Mega Control Register, offset: 0x220 */
-  __IO uint32_t MEGA_PUPSCR;                       /**< PGC Mega Power Up Sequence Control Register, offset: 0x224 */
-  __IO uint32_t MEGA_PDNSCR;                       /**< PGC Mega Pull Down Sequence Control Register, offset: 0x228 */
-  __IO uint32_t MEGA_SR;                           /**< PGC Mega Power Gating Controller Status Register, offset: 0x22C */
-       uint8_t RESERVED_1[112];
-  __IO uint32_t CPU_CTRL;                          /**< PGC CPU Control Register, offset: 0x2A0 */
-  __IO uint32_t CPU_PUPSCR;                        /**< PGC CPU Power Up Sequence Control Register, offset: 0x2A4 */
-  __IO uint32_t CPU_PDNSCR;                        /**< PGC CPU Pull Down Sequence Control Register, offset: 0x2A8 */
-  __IO uint32_t CPU_SR;                            /**< PGC CPU Power Gating Controller Status Register, offset: 0x2AC */
+typedef struct
+{
+    uint8_t RESERVED_0[544];
+    __IO uint32_t MEGA_CTRL;   /**< PGC Mega Control Register, offset: 0x220 */
+    __IO uint32_t MEGA_PUPSCR; /**< PGC Mega Power Up Sequence Control Register, offset: 0x224 */
+    __IO uint32_t MEGA_PDNSCR; /**< PGC Mega Pull Down Sequence Control Register, offset: 0x228 */
+    __IO uint32_t MEGA_SR;     /**< PGC Mega Power Gating Controller Status Register, offset: 0x22C */
+    uint8_t RESERVED_1[112];
+    __IO uint32_t CPU_CTRL;   /**< PGC CPU Control Register, offset: 0x2A0 */
+    __IO uint32_t CPU_PUPSCR; /**< PGC CPU Power Up Sequence Control Register, offset: 0x2A4 */
+    __IO uint32_t CPU_PDNSCR; /**< PGC CPU Pull Down Sequence Control Register, offset: 0x2A8 */
+    __IO uint32_t CPU_SR;     /**< PGC CPU Power Gating Controller Status Register, offset: 0x2AC */
 } PGC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15844,93 +18109,100 @@ typedef struct {
 
 /*! @name MEGA_CTRL - PGC Mega Control Register */
 /*! @{ */
-#define PGC_MEGA_CTRL_PCR_MASK                   (0x1U)
-#define PGC_MEGA_CTRL_PCR_SHIFT                  (0U)
-#define PGC_MEGA_CTRL_PCR(x)                     (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)
+#define PGC_MEGA_CTRL_PCR_MASK  (0x1U)
+#define PGC_MEGA_CTRL_PCR_SHIFT (0U)
+#define PGC_MEGA_CTRL_PCR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)
 /*! @} */
 
 /*! @name MEGA_PUPSCR - PGC Mega Power Up Sequence Control Register */
 /*! @{ */
-#define PGC_MEGA_PUPSCR_SW_MASK                  (0x3FU)
-#define PGC_MEGA_PUPSCR_SW_SHIFT                 (0U)
-#define PGC_MEGA_PUPSCR_SW(x)                    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)
-#define PGC_MEGA_PUPSCR_SW2ISO_MASK              (0x3F00U)
-#define PGC_MEGA_PUPSCR_SW2ISO_SHIFT             (8U)
-#define PGC_MEGA_PUPSCR_SW2ISO(x)                (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)
+#define PGC_MEGA_PUPSCR_SW_MASK      (0x3FU)
+#define PGC_MEGA_PUPSCR_SW_SHIFT     (0U)
+#define PGC_MEGA_PUPSCR_SW(x)        (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)
+#define PGC_MEGA_PUPSCR_SW2ISO_MASK  (0x3F00U)
+#define PGC_MEGA_PUPSCR_SW2ISO_SHIFT (8U)
+#define PGC_MEGA_PUPSCR_SW2ISO(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)
 /*! @} */
 
 /*! @name MEGA_PDNSCR - PGC Mega Pull Down Sequence Control Register */
 /*! @{ */
-#define PGC_MEGA_PDNSCR_ISO_MASK                 (0x3FU)
-#define PGC_MEGA_PDNSCR_ISO_SHIFT                (0U)
-#define PGC_MEGA_PDNSCR_ISO(x)                   (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)
-#define PGC_MEGA_PDNSCR_ISO2SW_MASK              (0x3F00U)
-#define PGC_MEGA_PDNSCR_ISO2SW_SHIFT             (8U)
-#define PGC_MEGA_PDNSCR_ISO2SW(x)                (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)
+#define PGC_MEGA_PDNSCR_ISO_MASK     (0x3FU)
+#define PGC_MEGA_PDNSCR_ISO_SHIFT    (0U)
+#define PGC_MEGA_PDNSCR_ISO(x)       (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)
+#define PGC_MEGA_PDNSCR_ISO2SW_MASK  (0x3F00U)
+#define PGC_MEGA_PDNSCR_ISO2SW_SHIFT (8U)
+#define PGC_MEGA_PDNSCR_ISO2SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)
 /*! @} */
 
 /*! @name MEGA_SR - PGC Mega Power Gating Controller Status Register */
 /*! @{ */
-#define PGC_MEGA_SR_PSR_MASK                     (0x1U)
-#define PGC_MEGA_SR_PSR_SHIFT                    (0U)
-#define PGC_MEGA_SR_PSR(x)                       (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)
+#define PGC_MEGA_SR_PSR_MASK  (0x1U)
+#define PGC_MEGA_SR_PSR_SHIFT (0U)
+#define PGC_MEGA_SR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)
 /*! @} */
 
 /*! @name CPU_CTRL - PGC CPU Control Register */
 /*! @{ */
-#define PGC_CPU_CTRL_PCR_MASK                    (0x1U)
-#define PGC_CPU_CTRL_PCR_SHIFT                   (0U)
-#define PGC_CPU_CTRL_PCR(x)                      (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)
+#define PGC_CPU_CTRL_PCR_MASK  (0x1U)
+#define PGC_CPU_CTRL_PCR_SHIFT (0U)
+#define PGC_CPU_CTRL_PCR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)
 /*! @} */
 
 /*! @name CPU_PUPSCR - PGC CPU Power Up Sequence Control Register */
 /*! @{ */
-#define PGC_CPU_PUPSCR_SW_MASK                   (0x3FU)
-#define PGC_CPU_PUPSCR_SW_SHIFT                  (0U)
-#define PGC_CPU_PUPSCR_SW(x)                     (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)
-#define PGC_CPU_PUPSCR_SW2ISO_MASK               (0x3F00U)
-#define PGC_CPU_PUPSCR_SW2ISO_SHIFT              (8U)
-#define PGC_CPU_PUPSCR_SW2ISO(x)                 (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)
+#define PGC_CPU_PUPSCR_SW_MASK      (0x3FU)
+#define PGC_CPU_PUPSCR_SW_SHIFT     (0U)
+#define PGC_CPU_PUPSCR_SW(x)        (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)
+#define PGC_CPU_PUPSCR_SW2ISO_MASK  (0x3F00U)
+#define PGC_CPU_PUPSCR_SW2ISO_SHIFT (8U)
+#define PGC_CPU_PUPSCR_SW2ISO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)
 /*! @} */
 
 /*! @name CPU_PDNSCR - PGC CPU Pull Down Sequence Control Register */
 /*! @{ */
-#define PGC_CPU_PDNSCR_ISO_MASK                  (0x3FU)
-#define PGC_CPU_PDNSCR_ISO_SHIFT                 (0U)
-#define PGC_CPU_PDNSCR_ISO(x)                    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)
-#define PGC_CPU_PDNSCR_ISO2SW_MASK               (0x3F00U)
-#define PGC_CPU_PDNSCR_ISO2SW_SHIFT              (8U)
-#define PGC_CPU_PDNSCR_ISO2SW(x)                 (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)
+#define PGC_CPU_PDNSCR_ISO_MASK     (0x3FU)
+#define PGC_CPU_PDNSCR_ISO_SHIFT    (0U)
+#define PGC_CPU_PDNSCR_ISO(x)       (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)
+#define PGC_CPU_PDNSCR_ISO2SW_MASK  (0x3F00U)
+#define PGC_CPU_PDNSCR_ISO2SW_SHIFT (8U)
+#define PGC_CPU_PDNSCR_ISO2SW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)
 /*! @} */
 
 /*! @name CPU_SR - PGC CPU Power Gating Controller Status Register */
 /*! @{ */
-#define PGC_CPU_SR_PSR_MASK                      (0x1U)
-#define PGC_CPU_SR_PSR_SHIFT                     (0U)
-#define PGC_CPU_SR_PSR(x)                        (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)
+#define PGC_CPU_SR_PSR_MASK  (0x1U)
+#define PGC_CPU_SR_PSR_SHIFT (0U)
+#define PGC_CPU_SR_PSR(x)    (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PGC_Register_Masks */
 
-
 /* PGC - Peripheral instance base addresses */
 /** Peripheral PGC base address */
-#define PGC_BASE                                 (0x400F4000u)
+#define PGC_BASE (0x400F4000u)
 /** Peripheral PGC base pointer */
-#define PGC                                      ((PGC_Type *)PGC_BASE)
+#define PGC ((PGC_Type *)PGC_BASE)
 /** Array initializer of PGC peripheral base addresses */
-#define PGC_BASE_ADDRS                           { PGC_BASE }
+#define PGC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PGC_BASE                                                                                                       \
+    }
 /** Array initializer of PGC peripheral base pointers */
-#define PGC_BASE_PTRS                            { PGC }
+#define PGC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PGC                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group PGC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PIT Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -15941,18 +18213,20 @@ typedef struct {
  */
 
 /** PIT - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< PIT Module Control Register, offset: 0x0 */
-       uint8_t RESERVED_0[220];
-  __I  uint32_t LTMR64H;                           /**< PIT Upper Lifetime Timer Register, offset: 0xE0 */
-  __I  uint32_t LTMR64L;                           /**< PIT Lower Lifetime Timer Register, offset: 0xE4 */
-       uint8_t RESERVED_1[24];
-  struct {                                         /* offset: 0x100, array step: 0x10 */
-    __IO uint32_t LDVAL;                             /**< Timer Load Value Register, array offset: 0x100, array step: 0x10 */
-    __I  uint32_t CVAL;                              /**< Current Timer Value Register, array offset: 0x104, array step: 0x10 */
-    __IO uint32_t TCTRL;                             /**< Timer Control Register, array offset: 0x108, array step: 0x10 */
-    __IO uint32_t TFLG;                              /**< Timer Flag Register, array offset: 0x10C, array step: 0x10 */
-  } CHANNEL[4];
+typedef struct
+{
+    __IO uint32_t MCR; /**< PIT Module Control Register, offset: 0x0 */
+    uint8_t RESERVED_0[220];
+    __I uint32_t LTMR64H; /**< PIT Upper Lifetime Timer Register, offset: 0xE0 */
+    __I uint32_t LTMR64L; /**< PIT Lower Lifetime Timer Register, offset: 0xE4 */
+    uint8_t RESERVED_1[24];
+    struct
+    {                        /* offset: 0x100, array step: 0x10 */
+        __IO uint32_t LDVAL; /**< Timer Load Value Register, array offset: 0x100, array step: 0x10 */
+        __I uint32_t CVAL;   /**< Current Timer Value Register, array offset: 0x104, array step: 0x10 */
+        __IO uint32_t TCTRL; /**< Timer Control Register, array offset: 0x108, array step: 0x10 */
+        __IO uint32_t TFLG;  /**< Timer Flag Register, array offset: 0x10C, array step: 0x10 */
+    } CHANNEL[4];
 } PIT_Type;
 
 /* ----------------------------------------------------------------------------
@@ -15966,97 +18240,105 @@ typedef struct {
 
 /*! @name MCR - PIT Module Control Register */
 /*! @{ */
-#define PIT_MCR_FRZ_MASK                         (0x1U)
-#define PIT_MCR_FRZ_SHIFT                        (0U)
-#define PIT_MCR_FRZ(x)                           (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)
-#define PIT_MCR_MDIS_MASK                        (0x2U)
-#define PIT_MCR_MDIS_SHIFT                       (1U)
-#define PIT_MCR_MDIS(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)
+#define PIT_MCR_FRZ_MASK   (0x1U)
+#define PIT_MCR_FRZ_SHIFT  (0U)
+#define PIT_MCR_FRZ(x)     (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)
+#define PIT_MCR_MDIS_MASK  (0x2U)
+#define PIT_MCR_MDIS_SHIFT (1U)
+#define PIT_MCR_MDIS(x)    (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)
 /*! @} */
 
 /*! @name LTMR64H - PIT Upper Lifetime Timer Register */
 /*! @{ */
-#define PIT_LTMR64H_LTH_MASK                     (0xFFFFFFFFU)
-#define PIT_LTMR64H_LTH_SHIFT                    (0U)
-#define PIT_LTMR64H_LTH(x)                       (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)
+#define PIT_LTMR64H_LTH_MASK  (0xFFFFFFFFU)
+#define PIT_LTMR64H_LTH_SHIFT (0U)
+#define PIT_LTMR64H_LTH(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)
 /*! @} */
 
 /*! @name LTMR64L - PIT Lower Lifetime Timer Register */
 /*! @{ */
-#define PIT_LTMR64L_LTL_MASK                     (0xFFFFFFFFU)
-#define PIT_LTMR64L_LTL_SHIFT                    (0U)
-#define PIT_LTMR64L_LTL(x)                       (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)
+#define PIT_LTMR64L_LTL_MASK  (0xFFFFFFFFU)
+#define PIT_LTMR64L_LTL_SHIFT (0U)
+#define PIT_LTMR64L_LTL(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)
 /*! @} */
 
 /*! @name LDVAL - Timer Load Value Register */
 /*! @{ */
-#define PIT_LDVAL_TSV_MASK                       (0xFFFFFFFFU)
-#define PIT_LDVAL_TSV_SHIFT                      (0U)
-#define PIT_LDVAL_TSV(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)
+#define PIT_LDVAL_TSV_MASK  (0xFFFFFFFFU)
+#define PIT_LDVAL_TSV_SHIFT (0U)
+#define PIT_LDVAL_TSV(x)    (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)
 /*! @} */
 
 /* The count of PIT_LDVAL */
-#define PIT_LDVAL_COUNT                          (4U)
+#define PIT_LDVAL_COUNT (4U)
 
 /*! @name CVAL - Current Timer Value Register */
 /*! @{ */
-#define PIT_CVAL_TVL_MASK                        (0xFFFFFFFFU)
-#define PIT_CVAL_TVL_SHIFT                       (0U)
-#define PIT_CVAL_TVL(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
+#define PIT_CVAL_TVL_MASK  (0xFFFFFFFFU)
+#define PIT_CVAL_TVL_SHIFT (0U)
+#define PIT_CVAL_TVL(x)    (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
 /*! @} */
 
 /* The count of PIT_CVAL */
-#define PIT_CVAL_COUNT                           (4U)
+#define PIT_CVAL_COUNT (4U)
 
 /*! @name TCTRL - Timer Control Register */
 /*! @{ */
-#define PIT_TCTRL_TEN_MASK                       (0x1U)
-#define PIT_TCTRL_TEN_SHIFT                      (0U)
-#define PIT_TCTRL_TEN(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)
-#define PIT_TCTRL_TIE_MASK                       (0x2U)
-#define PIT_TCTRL_TIE_SHIFT                      (1U)
-#define PIT_TCTRL_TIE(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)
-#define PIT_TCTRL_CHN_MASK                       (0x4U)
-#define PIT_TCTRL_CHN_SHIFT                      (2U)
-#define PIT_TCTRL_CHN(x)                         (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
+#define PIT_TCTRL_TEN_MASK  (0x1U)
+#define PIT_TCTRL_TEN_SHIFT (0U)
+#define PIT_TCTRL_TEN(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)
+#define PIT_TCTRL_TIE_MASK  (0x2U)
+#define PIT_TCTRL_TIE_SHIFT (1U)
+#define PIT_TCTRL_TIE(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)
+#define PIT_TCTRL_CHN_MASK  (0x4U)
+#define PIT_TCTRL_CHN_SHIFT (2U)
+#define PIT_TCTRL_CHN(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)
 /*! @} */
 
 /* The count of PIT_TCTRL */
-#define PIT_TCTRL_COUNT                          (4U)
+#define PIT_TCTRL_COUNT (4U)
 
 /*! @name TFLG - Timer Flag Register */
 /*! @{ */
-#define PIT_TFLG_TIF_MASK                        (0x1U)
-#define PIT_TFLG_TIF_SHIFT                       (0U)
-#define PIT_TFLG_TIF(x)                          (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)
+#define PIT_TFLG_TIF_MASK  (0x1U)
+#define PIT_TFLG_TIF_SHIFT (0U)
+#define PIT_TFLG_TIF(x)    (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)
 /*! @} */
 
 /* The count of PIT_TFLG */
-#define PIT_TFLG_COUNT                           (4U)
-
+#define PIT_TFLG_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group PIT_Register_Masks */
 
-
 /* PIT - Peripheral instance base addresses */
 /** Peripheral PIT base address */
-#define PIT_BASE                                 (0x40084000u)
+#define PIT_BASE (0x40084000u)
 /** Peripheral PIT base pointer */
-#define PIT                                      ((PIT_Type *)PIT_BASE)
+#define PIT ((PIT_Type *)PIT_BASE)
 /** Array initializer of PIT peripheral base addresses */
-#define PIT_BASE_ADDRS                           { PIT_BASE }
+#define PIT_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PIT_BASE                                                                                                       \
+    }
 /** Array initializer of PIT peripheral base pointers */
-#define PIT_BASE_PTRS                            { PIT }
+#define PIT_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PIT                                                                                                            \
+    }
 /** Interrupt vectors for the PIT peripheral type */
-#define PIT_IRQS                                 { { PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn } }
+#define PIT_IRQS                                                                                                       \
+    {                                                                                                                  \
+        {                                                                                                              \
+            PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn                                                                     \
+        }                                                                                                              \
+    }
 
 /*!
  * @}
  */ /* end of group PIT_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PMU Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -16067,36 +18349,37 @@ typedef struct {
  */
 
 /** PMU - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[272];
-  __IO uint32_t REG_1P1;                           /**< Regulator 1P1 Register, offset: 0x110 */
-  __IO uint32_t REG_1P1_SET;                       /**< Regulator 1P1 Register, offset: 0x114 */
-  __IO uint32_t REG_1P1_CLR;                       /**< Regulator 1P1 Register, offset: 0x118 */
-  __IO uint32_t REG_1P1_TOG;                       /**< Regulator 1P1 Register, offset: 0x11C */
-  __IO uint32_t REG_3P0;                           /**< Regulator 3P0 Register, offset: 0x120 */
-  __IO uint32_t REG_3P0_SET;                       /**< Regulator 3P0 Register, offset: 0x124 */
-  __IO uint32_t REG_3P0_CLR;                       /**< Regulator 3P0 Register, offset: 0x128 */
-  __IO uint32_t REG_3P0_TOG;                       /**< Regulator 3P0 Register, offset: 0x12C */
-  __IO uint32_t REG_2P5;                           /**< Regulator 2P5 Register, offset: 0x130 */
-  __IO uint32_t REG_2P5_SET;                       /**< Regulator 2P5 Register, offset: 0x134 */
-  __IO uint32_t REG_2P5_CLR;                       /**< Regulator 2P5 Register, offset: 0x138 */
-  __IO uint32_t REG_2P5_TOG;                       /**< Regulator 2P5 Register, offset: 0x13C */
-  __IO uint32_t REG_CORE;                          /**< Digital Regulator Core Register, offset: 0x140 */
-  __IO uint32_t REG_CORE_SET;                      /**< Digital Regulator Core Register, offset: 0x144 */
-  __IO uint32_t REG_CORE_CLR;                      /**< Digital Regulator Core Register, offset: 0x148 */
-  __IO uint32_t REG_CORE_TOG;                      /**< Digital Regulator Core Register, offset: 0x14C */
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-  __IO uint32_t MISC1;                             /**< Miscellaneous Register 1, offset: 0x160 */
-  __IO uint32_t MISC1_SET;                         /**< Miscellaneous Register 1, offset: 0x164 */
-  __IO uint32_t MISC1_CLR;                         /**< Miscellaneous Register 1, offset: 0x168 */
-  __IO uint32_t MISC1_TOG;                         /**< Miscellaneous Register 1, offset: 0x16C */
-  __IO uint32_t MISC2;                             /**< Miscellaneous Control Register, offset: 0x170 */
-  __IO uint32_t MISC2_SET;                         /**< Miscellaneous Control Register, offset: 0x174 */
-  __IO uint32_t MISC2_CLR;                         /**< Miscellaneous Control Register, offset: 0x178 */
-  __IO uint32_t MISC2_TOG;                         /**< Miscellaneous Control Register, offset: 0x17C */
+typedef struct
+{
+    uint8_t RESERVED_0[272];
+    __IO uint32_t REG_1P1;      /**< Regulator 1P1 Register, offset: 0x110 */
+    __IO uint32_t REG_1P1_SET;  /**< Regulator 1P1 Register, offset: 0x114 */
+    __IO uint32_t REG_1P1_CLR;  /**< Regulator 1P1 Register, offset: 0x118 */
+    __IO uint32_t REG_1P1_TOG;  /**< Regulator 1P1 Register, offset: 0x11C */
+    __IO uint32_t REG_3P0;      /**< Regulator 3P0 Register, offset: 0x120 */
+    __IO uint32_t REG_3P0_SET;  /**< Regulator 3P0 Register, offset: 0x124 */
+    __IO uint32_t REG_3P0_CLR;  /**< Regulator 3P0 Register, offset: 0x128 */
+    __IO uint32_t REG_3P0_TOG;  /**< Regulator 3P0 Register, offset: 0x12C */
+    __IO uint32_t REG_2P5;      /**< Regulator 2P5 Register, offset: 0x130 */
+    __IO uint32_t REG_2P5_SET;  /**< Regulator 2P5 Register, offset: 0x134 */
+    __IO uint32_t REG_2P5_CLR;  /**< Regulator 2P5 Register, offset: 0x138 */
+    __IO uint32_t REG_2P5_TOG;  /**< Regulator 2P5 Register, offset: 0x13C */
+    __IO uint32_t REG_CORE;     /**< Digital Regulator Core Register, offset: 0x140 */
+    __IO uint32_t REG_CORE_SET; /**< Digital Regulator Core Register, offset: 0x144 */
+    __IO uint32_t REG_CORE_CLR; /**< Digital Regulator Core Register, offset: 0x148 */
+    __IO uint32_t REG_CORE_TOG; /**< Digital Regulator Core Register, offset: 0x14C */
+    __IO uint32_t MISC0;        /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET;    /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR;    /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG;    /**< Miscellaneous Register 0, offset: 0x15C */
+    __IO uint32_t MISC1;        /**< Miscellaneous Register 1, offset: 0x160 */
+    __IO uint32_t MISC1_SET;    /**< Miscellaneous Register 1, offset: 0x164 */
+    __IO uint32_t MISC1_CLR;    /**< Miscellaneous Register 1, offset: 0x168 */
+    __IO uint32_t MISC1_TOG;    /**< Miscellaneous Register 1, offset: 0x16C */
+    __IO uint32_t MISC2;        /**< Miscellaneous Control Register, offset: 0x170 */
+    __IO uint32_t MISC2_SET;    /**< Miscellaneous Control Register, offset: 0x174 */
+    __IO uint32_t MISC2_CLR;    /**< Miscellaneous Control Register, offset: 0x178 */
+    __IO uint32_t MISC2_TOG;    /**< Miscellaneous Control Register, offset: 0x17C */
 } PMU_Type;
 
 /* ----------------------------------------------------------------------------
@@ -16110,1085 +18393,1407 @@ typedef struct {
 
 /*! @name REG_1P1 - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_1P1_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_1P1_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_1P1_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_1P1_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
-#define PMU_REG_1P1_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_1P1_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_1P1_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_ENABLE_PULLDOWN_MASK         (0x8U)
-#define PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT        (3U)
-#define PMU_REG_1P1_ENABLE_PULLDOWN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_1P1_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_1P1_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_OFFSET_SHIFT)) & PMU_REG_1P1_BO_OFFSET_MASK)
-#define PMU_REG_1P1_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_1P1_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_1P1_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_BO_VDD1P1_MASK               (0x10000U)
-#define PMU_REG_1P1_BO_VDD1P1_SHIFT              (16U)
-#define PMU_REG_1P1_BO_VDD1P1(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_OK_VDD1P1_MASK               (0x20000U)
-#define PMU_REG_1P1_OK_VDD1P1_SHIFT              (17U)
-#define PMU_REG_1P1_OK_VDD1P1(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_OK_VDD1P1_MASK)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK      (0x40000U)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT     (18U)
-#define PMU_REG_1P1_ENABLE_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG_MASK      (0x80000U)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT     (19U)
-#define PMU_REG_1P1_SELREF_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_BO_SHIFT)) & PMU_REG_1P1_ENABLE_BO_MASK)
+#define PMU_REG_1P1_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_ENABLE_PULLDOWN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_OFFSET_SHIFT)) & PMU_REG_1P1_BO_OFFSET_MASK)
+#define PMU_REG_1P1_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_BO_VDD1P1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_OK_VDD1P1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK  (0x40000U)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT (18U)
+#define PMU_REG_1P1_ENABLE_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG_MASK  (0x80000U)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT (19U)
+#define PMU_REG_1P1_SELREF_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_SET - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_BO_SHIFT)) & PMU_REG_1P1_SET_ENABLE_BO_MASK)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_SET_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_OFFSET_SHIFT)) & PMU_REG_1P1_SET_BO_OFFSET_MASK)
-#define PMU_REG_1P1_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_SET_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_SET_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_SET_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_SET_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_SET_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_SET_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_BO_SHIFT)) & PMU_REG_1P1_SET_ENABLE_BO_MASK)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_SET_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_SET_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_OFFSET_SHIFT)) & PMU_REG_1P1_SET_BO_OFFSET_MASK)
+#define PMU_REG_1P1_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_SET_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_SET_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_SET_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_SET_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_SET_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_SET_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_SET_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SET_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_SET_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_SET_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_SET_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_SET_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_SET_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_CLR - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_BO_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_BO_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_OFFSET_SHIFT)) & PMU_REG_1P1_CLR_BO_OFFSET_MASK)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_CLR_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_CLR_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_CLR_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_CLR_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_BO_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_BO_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_CLR_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_OFFSET_SHIFT)) & PMU_REG_1P1_CLR_BO_OFFSET_MASK)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_CLR_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_CLR_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_CLR_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_CLR_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_CLR_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_CLR_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_CLR_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_CLR_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_1P1_TOG - Regulator 1P1 Register */
 /*! @{ */
-#define PMU_REG_1P1_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_1P1_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_1P1_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_1P1_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_BO_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_BO_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_1P1_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_1P1_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_1P1_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_1P1_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_OFFSET_SHIFT)) & PMU_REG_1P1_TOG_BO_OFFSET_MASK)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_1P1_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_1P1_TOG_BO_VDD1P1_MASK           (0x10000U)
-#define PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT          (16U)
-#define PMU_REG_1P1_TOG_BO_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_BO_VDD1P1_MASK)
-#define PMU_REG_1P1_TOG_OK_VDD1P1_MASK           (0x20000U)
-#define PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT          (17U)
-#define PMU_REG_1P1_TOG_OK_VDD1P1(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_OK_VDD1P1_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_1P1_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_1P1_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_1P1_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_BO_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_BO_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_1P1_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_1P1_TOG_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_1P1_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_1P1_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_1P1_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_OFFSET_SHIFT)) & PMU_REG_1P1_TOG_BO_OFFSET_MASK)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_1P1_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_1P1_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_1P1_TOG_BO_VDD1P1_MASK  (0x10000U)
+#define PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT (16U)
+#define PMU_REG_1P1_TOG_BO_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_BO_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_BO_VDD1P1_MASK)
+#define PMU_REG_1P1_TOG_OK_VDD1P1_MASK  (0x20000U)
+#define PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT (17U)
+#define PMU_REG_1P1_TOG_OK_VDD1P1(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_OK_VDD1P1_SHIFT)) & PMU_REG_1P1_TOG_OK_VDD1P1_MASK)
 #define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_TOG_ENABLE_WEAK_LINREG_MASK)
 #define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK  (0x80000U)
 #define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT (19U)
-#define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT)) & PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK)
+#define PMU_REG_1P1_TOG_SELREF_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_1P1_TOG_SELREF_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_3P0 - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_3P0_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_3P0_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_3P0_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_3P0_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_BO_SHIFT)) & PMU_REG_3P0_ENABLE_BO_MASK)
-#define PMU_REG_3P0_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_3P0_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_3P0_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_3P0_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_3P0_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_OFFSET_SHIFT)) & PMU_REG_3P0_BO_OFFSET_MASK)
-#define PMU_REG_3P0_VBUS_SEL_MASK                (0x80U)
-#define PMU_REG_3P0_VBUS_SEL_SHIFT               (7U)
-#define PMU_REG_3P0_VBUS_SEL(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_VBUS_SEL_SHIFT)) & PMU_REG_3P0_VBUS_SEL_MASK)
-#define PMU_REG_3P0_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_3P0_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_3P0_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_BO_VDD3P0_MASK               (0x10000U)
-#define PMU_REG_3P0_BO_VDD3P0_SHIFT              (16U)
-#define PMU_REG_3P0_BO_VDD3P0(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_OK_VDD3P0_MASK               (0x20000U)
-#define PMU_REG_3P0_OK_VDD3P0_SHIFT              (17U)
-#define PMU_REG_3P0_OK_VDD3P0(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_BO_SHIFT)) & PMU_REG_3P0_ENABLE_BO_MASK)
+#define PMU_REG_3P0_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_OFFSET_SHIFT)) & PMU_REG_3P0_BO_OFFSET_MASK)
+#define PMU_REG_3P0_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_VBUS_SEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_VBUS_SEL_SHIFT)) & PMU_REG_3P0_VBUS_SEL_MASK)
+#define PMU_REG_3P0_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_BO_VDD3P0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_OK_VDD3P0(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_SET - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_BO_SHIFT)) & PMU_REG_3P0_SET_ENABLE_BO_MASK)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_OFFSET_SHIFT)) & PMU_REG_3P0_SET_BO_OFFSET_MASK)
-#define PMU_REG_3P0_SET_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_SET_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_SET_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_VBUS_SEL_SHIFT)) & PMU_REG_3P0_SET_VBUS_SEL_MASK)
-#define PMU_REG_3P0_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_SET_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_SET_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_SET_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_SET_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_SET_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_SET_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_BO_SHIFT)) & PMU_REG_3P0_SET_ENABLE_BO_MASK)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_OFFSET_SHIFT)) & PMU_REG_3P0_SET_BO_OFFSET_MASK)
+#define PMU_REG_3P0_SET_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_SET_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_SET_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_VBUS_SEL_SHIFT)) & PMU_REG_3P0_SET_VBUS_SEL_MASK)
+#define PMU_REG_3P0_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_SET_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_SET_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_SET_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_SET_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_SET_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_SET_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_SET_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_SET_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_CLR - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_BO_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_BO_MASK)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_OFFSET_SHIFT)) & PMU_REG_3P0_CLR_BO_OFFSET_MASK)
-#define PMU_REG_3P0_CLR_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_CLR_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_CLR_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_VBUS_SEL_SHIFT)) & PMU_REG_3P0_CLR_VBUS_SEL_MASK)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_CLR_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_CLR_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_CLR_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_CLR_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_BO_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_BO_MASK)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_OFFSET_SHIFT)) & PMU_REG_3P0_CLR_BO_OFFSET_MASK)
+#define PMU_REG_3P0_CLR_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_CLR_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_CLR_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_VBUS_SEL_SHIFT)) & PMU_REG_3P0_CLR_VBUS_SEL_MASK)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_CLR_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_CLR_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_CLR_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_CLR_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_CLR_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_CLR_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_3P0_TOG - Regulator 3P0 Register */
 /*! @{ */
-#define PMU_REG_3P0_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_3P0_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_3P0_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_3P0_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_3P0_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_BO_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_BO_MASK)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_3P0_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_3P0_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_3P0_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_3P0_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_OFFSET_SHIFT)) & PMU_REG_3P0_TOG_BO_OFFSET_MASK)
-#define PMU_REG_3P0_TOG_VBUS_SEL_MASK            (0x80U)
-#define PMU_REG_3P0_TOG_VBUS_SEL_SHIFT           (7U)
-#define PMU_REG_3P0_TOG_VBUS_SEL(x)              (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_VBUS_SEL_SHIFT)) & PMU_REG_3P0_TOG_VBUS_SEL_MASK)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_3P0_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_3P0_TOG_BO_VDD3P0_MASK           (0x10000U)
-#define PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT          (16U)
-#define PMU_REG_3P0_TOG_BO_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_BO_VDD3P0_MASK)
-#define PMU_REG_3P0_TOG_OK_VDD3P0_MASK           (0x20000U)
-#define PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT          (17U)
-#define PMU_REG_3P0_TOG_OK_VDD3P0(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_OK_VDD3P0_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_3P0_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_3P0_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_3P0_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_BO_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_BO_MASK)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_3P0_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_3P0_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_3P0_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_3P0_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_3P0_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_OFFSET_SHIFT)) & PMU_REG_3P0_TOG_BO_OFFSET_MASK)
+#define PMU_REG_3P0_TOG_VBUS_SEL_MASK  (0x80U)
+#define PMU_REG_3P0_TOG_VBUS_SEL_SHIFT (7U)
+#define PMU_REG_3P0_TOG_VBUS_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_VBUS_SEL_SHIFT)) & PMU_REG_3P0_TOG_VBUS_SEL_MASK)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_3P0_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_3P0_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_3P0_TOG_BO_VDD3P0_MASK  (0x10000U)
+#define PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT (16U)
+#define PMU_REG_3P0_TOG_BO_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_BO_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_BO_VDD3P0_MASK)
+#define PMU_REG_3P0_TOG_OK_VDD3P0_MASK  (0x20000U)
+#define PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT (17U)
+#define PMU_REG_3P0_TOG_OK_VDD3P0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_3P0_TOG_OK_VDD3P0_SHIFT)) & PMU_REG_3P0_TOG_OK_VDD3P0_MASK)
 /*! @} */
 
 /*! @name REG_2P5 - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_ENABLE_LINREG_MASK           (0x1U)
-#define PMU_REG_2P5_ENABLE_LINREG_SHIFT          (0U)
-#define PMU_REG_2P5_ENABLE_LINREG(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_ENABLE_BO_MASK               (0x2U)
-#define PMU_REG_2P5_ENABLE_BO_SHIFT              (1U)
-#define PMU_REG_2P5_ENABLE_BO(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_BO_SHIFT)) & PMU_REG_2P5_ENABLE_BO_MASK)
-#define PMU_REG_2P5_ENABLE_ILIMIT_MASK           (0x4U)
-#define PMU_REG_2P5_ENABLE_ILIMIT_SHIFT          (2U)
-#define PMU_REG_2P5_ENABLE_ILIMIT(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_ENABLE_PULLDOWN_MASK         (0x8U)
-#define PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT        (3U)
-#define PMU_REG_2P5_ENABLE_PULLDOWN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_BO_OFFSET_MASK               (0x70U)
-#define PMU_REG_2P5_BO_OFFSET_SHIFT              (4U)
-#define PMU_REG_2P5_BO_OFFSET(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_OFFSET_SHIFT)) & PMU_REG_2P5_BO_OFFSET_MASK)
-#define PMU_REG_2P5_OUTPUT_TRG_MASK              (0x1F00U)
-#define PMU_REG_2P5_OUTPUT_TRG_SHIFT             (8U)
-#define PMU_REG_2P5_OUTPUT_TRG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_BO_VDD2P5_MASK               (0x10000U)
-#define PMU_REG_2P5_BO_VDD2P5_SHIFT              (16U)
-#define PMU_REG_2P5_BO_VDD2P5(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_OK_VDD2P5_MASK               (0x20000U)
-#define PMU_REG_2P5_OK_VDD2P5_SHIFT              (17U)
-#define PMU_REG_2P5_OK_VDD2P5(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_OK_VDD2P5_MASK)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK      (0x40000U)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT     (18U)
-#define PMU_REG_2P5_ENABLE_WEAK_LINREG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_ENABLE_LINREG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_ENABLE_BO(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_BO_SHIFT)) & PMU_REG_2P5_ENABLE_BO_MASK)
+#define PMU_REG_2P5_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_ENABLE_ILIMIT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_ENABLE_PULLDOWN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_BO_OFFSET(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_OFFSET_SHIFT)) & PMU_REG_2P5_BO_OFFSET_MASK)
+#define PMU_REG_2P5_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_OUTPUT_TRG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_BO_VDD2P5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_OK_VDD2P5(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK  (0x40000U)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT (18U)
+#define PMU_REG_2P5_ENABLE_WEAK_LINREG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_SET - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_SET_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_SET_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_SET_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_SET_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_SET_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_BO_SHIFT)) & PMU_REG_2P5_SET_ENABLE_BO_MASK)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_SET_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_SET_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_SET_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_SET_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_SET_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_OFFSET_SHIFT)) & PMU_REG_2P5_SET_BO_OFFSET_MASK)
-#define PMU_REG_2P5_SET_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_SET_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_SET_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_SET_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_SET_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_SET_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_SET_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_SET_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_SET_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_SET_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_SET_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_SET_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_SET_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_SET_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_BO_SHIFT)) & PMU_REG_2P5_SET_ENABLE_BO_MASK)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_SET_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_SET_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_SET_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_SET_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_SET_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_SET_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_SET_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_OFFSET_SHIFT)) & PMU_REG_2P5_SET_BO_OFFSET_MASK)
+#define PMU_REG_2P5_SET_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_SET_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_SET_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_SET_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_SET_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_SET_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_SET_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_SET_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_SET_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_SET_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_SET_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_SET_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_CLR - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_CLR_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_CLR_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_CLR_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_CLR_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_BO_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_BO_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_CLR_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_CLR_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_CLR_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_CLR_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_OFFSET_SHIFT)) & PMU_REG_2P5_CLR_BO_OFFSET_MASK)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_CLR_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_CLR_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_CLR_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_CLR_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_CLR_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_CLR_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_CLR_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_CLR_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_CLR_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_BO_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_BO_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_CLR_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_CLR_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_CLR_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_CLR_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_CLR_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_OFFSET_SHIFT)) & PMU_REG_2P5_CLR_BO_OFFSET_MASK)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_CLR_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_CLR_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_CLR_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_CLR_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_CLR_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_CLR_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_CLR_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_CLR_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_2P5_TOG - Regulator 2P5 Register */
 /*! @{ */
-#define PMU_REG_2P5_TOG_ENABLE_LINREG_MASK       (0x1U)
-#define PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT      (0U)
-#define PMU_REG_2P5_TOG_ENABLE_LINREG(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_LINREG_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_BO_MASK           (0x2U)
-#define PMU_REG_2P5_TOG_ENABLE_BO_SHIFT          (1U)
-#define PMU_REG_2P5_TOG_ENABLE_BO(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_BO_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_BO_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK       (0x4U)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT      (2U)
-#define PMU_REG_2P5_TOG_ENABLE_ILIMIT(x)         (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK     (0x8U)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT    (3U)
-#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN(x)       (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK)
-#define PMU_REG_2P5_TOG_BO_OFFSET_MASK           (0x70U)
-#define PMU_REG_2P5_TOG_BO_OFFSET_SHIFT          (4U)
-#define PMU_REG_2P5_TOG_BO_OFFSET(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_OFFSET_SHIFT)) & PMU_REG_2P5_TOG_BO_OFFSET_MASK)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG_MASK          (0x1F00U)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT         (8U)
-#define PMU_REG_2P5_TOG_OUTPUT_TRG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_TOG_OUTPUT_TRG_MASK)
-#define PMU_REG_2P5_TOG_BO_VDD2P5_MASK           (0x10000U)
-#define PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT          (16U)
-#define PMU_REG_2P5_TOG_BO_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_BO_VDD2P5_MASK)
-#define PMU_REG_2P5_TOG_OK_VDD2P5_MASK           (0x20000U)
-#define PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT          (17U)
-#define PMU_REG_2P5_TOG_OK_VDD2P5(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_OK_VDD2P5_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG_MASK  (0x1U)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT (0U)
+#define PMU_REG_2P5_TOG_ENABLE_LINREG(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_LINREG_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_BO_MASK  (0x2U)
+#define PMU_REG_2P5_TOG_ENABLE_BO_SHIFT (1U)
+#define PMU_REG_2P5_TOG_ENABLE_BO(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_BO_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_BO_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK  (0x4U)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT (2U)
+#define PMU_REG_2P5_TOG_ENABLE_ILIMIT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_ILIMIT_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_ILIMIT_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK  (0x8U)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT (3U)
+#define PMU_REG_2P5_TOG_ENABLE_PULLDOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_PULLDOWN_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_PULLDOWN_MASK)
+#define PMU_REG_2P5_TOG_BO_OFFSET_MASK  (0x70U)
+#define PMU_REG_2P5_TOG_BO_OFFSET_SHIFT (4U)
+#define PMU_REG_2P5_TOG_BO_OFFSET(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_OFFSET_SHIFT)) & PMU_REG_2P5_TOG_BO_OFFSET_MASK)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG_MASK  (0x1F00U)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT (8U)
+#define PMU_REG_2P5_TOG_OUTPUT_TRG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OUTPUT_TRG_SHIFT)) & PMU_REG_2P5_TOG_OUTPUT_TRG_MASK)
+#define PMU_REG_2P5_TOG_BO_VDD2P5_MASK  (0x10000U)
+#define PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT (16U)
+#define PMU_REG_2P5_TOG_BO_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_BO_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_BO_VDD2P5_MASK)
+#define PMU_REG_2P5_TOG_OK_VDD2P5_MASK  (0x20000U)
+#define PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT (17U)
+#define PMU_REG_2P5_TOG_OK_VDD2P5(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_OK_VDD2P5_SHIFT)) & PMU_REG_2P5_TOG_OK_VDD2P5_MASK)
 #define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK  (0x40000U)
 #define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT (18U)
-#define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG(x)    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT)) & PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK)
+#define PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_SHIFT)) &                                       \
+     PMU_REG_2P5_TOG_ENABLE_WEAK_LINREG_MASK)
 /*! @} */
 
 /*! @name REG_CORE - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_REG0_TARG_MASK              (0x1FU)
-#define PMU_REG_CORE_REG0_TARG_SHIFT             (0U)
-#define PMU_REG_CORE_REG0_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_TARG_SHIFT)) & PMU_REG_CORE_REG0_TARG_MASK)
-#define PMU_REG_CORE_REG0_ADJ_MASK               (0x1E0U)
-#define PMU_REG_CORE_REG0_ADJ_SHIFT              (5U)
-#define PMU_REG_CORE_REG0_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_ADJ_SHIFT)) & PMU_REG_CORE_REG0_ADJ_MASK)
-#define PMU_REG_CORE_REG1_TARG_MASK              (0x3E00U)
-#define PMU_REG_CORE_REG1_TARG_SHIFT             (9U)
-#define PMU_REG_CORE_REG1_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_TARG_SHIFT)) & PMU_REG_CORE_REG1_TARG_MASK)
-#define PMU_REG_CORE_REG1_ADJ_MASK               (0x3C000U)
-#define PMU_REG_CORE_REG1_ADJ_SHIFT              (14U)
-#define PMU_REG_CORE_REG1_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_ADJ_SHIFT)) & PMU_REG_CORE_REG1_ADJ_MASK)
-#define PMU_REG_CORE_REG2_TARG_MASK              (0x7C0000U)
-#define PMU_REG_CORE_REG2_TARG_SHIFT             (18U)
-#define PMU_REG_CORE_REG2_TARG(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_TARG_SHIFT)) & PMU_REG_CORE_REG2_TARG_MASK)
-#define PMU_REG_CORE_REG2_ADJ_MASK               (0x7800000U)
-#define PMU_REG_CORE_REG2_ADJ_SHIFT              (23U)
-#define PMU_REG_CORE_REG2_ADJ(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_ADJ_SHIFT)) & PMU_REG_CORE_REG2_ADJ_MASK)
-#define PMU_REG_CORE_RAMP_RATE_MASK              (0x18000000U)
-#define PMU_REG_CORE_RAMP_RATE_SHIFT             (27U)
-#define PMU_REG_CORE_RAMP_RATE(x)                (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_RAMP_RATE_SHIFT)) & PMU_REG_CORE_RAMP_RATE_MASK)
-#define PMU_REG_CORE_FET_ODRIVE_MASK             (0x20000000U)
-#define PMU_REG_CORE_FET_ODRIVE_SHIFT            (29U)
-#define PMU_REG_CORE_FET_ODRIVE(x)               (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_REG0_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_TARG_SHIFT)) & PMU_REG_CORE_REG0_TARG_MASK)
+#define PMU_REG_CORE_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_REG0_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG0_ADJ_SHIFT)) & PMU_REG_CORE_REG0_ADJ_MASK)
+#define PMU_REG_CORE_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_REG1_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_TARG_SHIFT)) & PMU_REG_CORE_REG1_TARG_MASK)
+#define PMU_REG_CORE_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_REG1_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG1_ADJ_SHIFT)) & PMU_REG_CORE_REG1_ADJ_MASK)
+#define PMU_REG_CORE_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_REG2_TARG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_TARG_SHIFT)) & PMU_REG_CORE_REG2_TARG_MASK)
+#define PMU_REG_CORE_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_REG2_ADJ(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_REG2_ADJ_SHIFT)) & PMU_REG_CORE_REG2_ADJ_MASK)
+#define PMU_REG_CORE_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_RAMP_RATE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_RAMP_RATE_SHIFT)) & PMU_REG_CORE_RAMP_RATE_MASK)
+#define PMU_REG_CORE_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_FET_ODRIVE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_SET - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_SET_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_SET_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_SET_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_TARG_SHIFT)) & PMU_REG_CORE_SET_REG0_TARG_MASK)
-#define PMU_REG_CORE_SET_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_SET_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_SET_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG0_ADJ_MASK)
-#define PMU_REG_CORE_SET_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_SET_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_SET_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_TARG_SHIFT)) & PMU_REG_CORE_SET_REG1_TARG_MASK)
-#define PMU_REG_CORE_SET_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_SET_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_SET_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG1_ADJ_MASK)
-#define PMU_REG_CORE_SET_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_SET_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_SET_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_TARG_SHIFT)) & PMU_REG_CORE_SET_REG2_TARG_MASK)
-#define PMU_REG_CORE_SET_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_SET_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_SET_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG2_ADJ_MASK)
-#define PMU_REG_CORE_SET_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_SET_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_SET_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_RAMP_RATE_SHIFT)) & PMU_REG_CORE_SET_RAMP_RATE_MASK)
-#define PMU_REG_CORE_SET_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_SET_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_SET_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_SET_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_SET_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_SET_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_SET_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_TARG_SHIFT)) & PMU_REG_CORE_SET_REG0_TARG_MASK)
+#define PMU_REG_CORE_SET_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_SET_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_SET_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG0_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG0_ADJ_MASK)
+#define PMU_REG_CORE_SET_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_SET_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_SET_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_TARG_SHIFT)) & PMU_REG_CORE_SET_REG1_TARG_MASK)
+#define PMU_REG_CORE_SET_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_SET_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_SET_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG1_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG1_ADJ_MASK)
+#define PMU_REG_CORE_SET_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_SET_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_SET_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_TARG_SHIFT)) & PMU_REG_CORE_SET_REG2_TARG_MASK)
+#define PMU_REG_CORE_SET_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_SET_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_SET_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_REG2_ADJ_SHIFT)) & PMU_REG_CORE_SET_REG2_ADJ_MASK)
+#define PMU_REG_CORE_SET_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_SET_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_SET_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_RAMP_RATE_SHIFT)) & PMU_REG_CORE_SET_RAMP_RATE_MASK)
+#define PMU_REG_CORE_SET_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_SET_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_SET_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_SET_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_SET_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_CLR - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_CLR_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_CLR_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_CLR_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG0_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_CLR_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_CLR_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG0_ADJ_MASK)
-#define PMU_REG_CORE_CLR_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_CLR_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_CLR_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG1_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_CLR_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_CLR_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG1_ADJ_MASK)
-#define PMU_REG_CORE_CLR_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_CLR_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_CLR_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG2_TARG_MASK)
-#define PMU_REG_CORE_CLR_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_CLR_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_CLR_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG2_ADJ_MASK)
-#define PMU_REG_CORE_CLR_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_CLR_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_CLR_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_RAMP_RATE_SHIFT)) & PMU_REG_CORE_CLR_RAMP_RATE_MASK)
-#define PMU_REG_CORE_CLR_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_CLR_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_CLR_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_CLR_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_CLR_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_CLR_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG0_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_CLR_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_CLR_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG0_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG0_ADJ_MASK)
+#define PMU_REG_CORE_CLR_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_CLR_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_CLR_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG1_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_CLR_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_CLR_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG1_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG1_ADJ_MASK)
+#define PMU_REG_CORE_CLR_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_CLR_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_CLR_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_TARG_SHIFT)) & PMU_REG_CORE_CLR_REG2_TARG_MASK)
+#define PMU_REG_CORE_CLR_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_CLR_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_CLR_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_REG2_ADJ_SHIFT)) & PMU_REG_CORE_CLR_REG2_ADJ_MASK)
+#define PMU_REG_CORE_CLR_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_CLR_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_CLR_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_RAMP_RATE_SHIFT)) & PMU_REG_CORE_CLR_RAMP_RATE_MASK)
+#define PMU_REG_CORE_CLR_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_CLR_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_CLR_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_CLR_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name REG_CORE_TOG - Digital Regulator Core Register */
 /*! @{ */
-#define PMU_REG_CORE_TOG_REG0_TARG_MASK          (0x1FU)
-#define PMU_REG_CORE_TOG_REG0_TARG_SHIFT         (0U)
-#define PMU_REG_CORE_TOG_REG0_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG0_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG0_ADJ_MASK           (0x1E0U)
-#define PMU_REG_CORE_TOG_REG0_ADJ_SHIFT          (5U)
-#define PMU_REG_CORE_TOG_REG0_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG0_ADJ_MASK)
-#define PMU_REG_CORE_TOG_REG1_TARG_MASK          (0x3E00U)
-#define PMU_REG_CORE_TOG_REG1_TARG_SHIFT         (9U)
-#define PMU_REG_CORE_TOG_REG1_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG1_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG1_ADJ_MASK           (0x3C000U)
-#define PMU_REG_CORE_TOG_REG1_ADJ_SHIFT          (14U)
-#define PMU_REG_CORE_TOG_REG1_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG1_ADJ_MASK)
-#define PMU_REG_CORE_TOG_REG2_TARG_MASK          (0x7C0000U)
-#define PMU_REG_CORE_TOG_REG2_TARG_SHIFT         (18U)
-#define PMU_REG_CORE_TOG_REG2_TARG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG2_TARG_MASK)
-#define PMU_REG_CORE_TOG_REG2_ADJ_MASK           (0x7800000U)
-#define PMU_REG_CORE_TOG_REG2_ADJ_SHIFT          (23U)
-#define PMU_REG_CORE_TOG_REG2_ADJ(x)             (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG2_ADJ_MASK)
-#define PMU_REG_CORE_TOG_RAMP_RATE_MASK          (0x18000000U)
-#define PMU_REG_CORE_TOG_RAMP_RATE_SHIFT         (27U)
-#define PMU_REG_CORE_TOG_RAMP_RATE(x)            (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_RAMP_RATE_SHIFT)) & PMU_REG_CORE_TOG_RAMP_RATE_MASK)
-#define PMU_REG_CORE_TOG_FET_ODRIVE_MASK         (0x20000000U)
-#define PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT        (29U)
-#define PMU_REG_CORE_TOG_FET_ODRIVE(x)           (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_TOG_FET_ODRIVE_MASK)
+#define PMU_REG_CORE_TOG_REG0_TARG_MASK  (0x1FU)
+#define PMU_REG_CORE_TOG_REG0_TARG_SHIFT (0U)
+#define PMU_REG_CORE_TOG_REG0_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG0_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG0_ADJ_MASK  (0x1E0U)
+#define PMU_REG_CORE_TOG_REG0_ADJ_SHIFT (5U)
+#define PMU_REG_CORE_TOG_REG0_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG0_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG0_ADJ_MASK)
+#define PMU_REG_CORE_TOG_REG1_TARG_MASK  (0x3E00U)
+#define PMU_REG_CORE_TOG_REG1_TARG_SHIFT (9U)
+#define PMU_REG_CORE_TOG_REG1_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG1_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG1_ADJ_MASK  (0x3C000U)
+#define PMU_REG_CORE_TOG_REG1_ADJ_SHIFT (14U)
+#define PMU_REG_CORE_TOG_REG1_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG1_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG1_ADJ_MASK)
+#define PMU_REG_CORE_TOG_REG2_TARG_MASK  (0x7C0000U)
+#define PMU_REG_CORE_TOG_REG2_TARG_SHIFT (18U)
+#define PMU_REG_CORE_TOG_REG2_TARG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_TARG_SHIFT)) & PMU_REG_CORE_TOG_REG2_TARG_MASK)
+#define PMU_REG_CORE_TOG_REG2_ADJ_MASK  (0x7800000U)
+#define PMU_REG_CORE_TOG_REG2_ADJ_SHIFT (23U)
+#define PMU_REG_CORE_TOG_REG2_ADJ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_REG2_ADJ_SHIFT)) & PMU_REG_CORE_TOG_REG2_ADJ_MASK)
+#define PMU_REG_CORE_TOG_RAMP_RATE_MASK  (0x18000000U)
+#define PMU_REG_CORE_TOG_RAMP_RATE_SHIFT (27U)
+#define PMU_REG_CORE_TOG_RAMP_RATE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_RAMP_RATE_SHIFT)) & PMU_REG_CORE_TOG_RAMP_RATE_MASK)
+#define PMU_REG_CORE_TOG_FET_ODRIVE_MASK  (0x20000000U)
+#define PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT (29U)
+#define PMU_REG_CORE_TOG_FET_ODRIVE(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_REG_CORE_TOG_FET_ODRIVE_SHIFT)) & PMU_REG_CORE_TOG_FET_ODRIVE_MASK)
 /*! @} */
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_REFTOP_PWD_MASK                (0x1U)
-#define PMU_MISC0_REFTOP_PWD_SHIFT               (0U)
-#define PMU_MISC0_REFTOP_PWD(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_PWD_SHIFT)) & PMU_MISC0_REFTOP_PWD_MASK)
-#define PMU_MISC0_REFTOP_SELFBIASOFF_MASK        (0x8U)
-#define PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT       (3U)
-#define PMU_MISC0_REFTOP_SELFBIASOFF(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_REFTOP_VBGADJ_MASK             (0x70U)
-#define PMU_MISC0_REFTOP_VBGADJ_SHIFT            (4U)
-#define PMU_MISC0_REFTOP_VBGADJ(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_REFTOP_VBGUP_MASK              (0x80U)
-#define PMU_MISC0_REFTOP_VBGUP_SHIFT             (7U)
-#define PMU_MISC0_REFTOP_VBGUP(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_STOP_MODE_CONFIG_MASK          (0xC00U)
-#define PMU_MISC0_STOP_MODE_CONFIG_SHIFT         (10U)
-#define PMU_MISC0_STOP_MODE_CONFIG(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_DISCON_HIGH_SNVS_MASK          (0x1000U)
-#define PMU_MISC0_DISCON_HIGH_SNVS_SHIFT         (12U)
-#define PMU_MISC0_DISCON_HIGH_SNVS(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_OSC_I_MASK                     (0x6000U)
-#define PMU_MISC0_OSC_I_SHIFT                    (13U)
-#define PMU_MISC0_OSC_I(x)                       (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_I_SHIFT)) & PMU_MISC0_OSC_I_MASK)
-#define PMU_MISC0_OSC_XTALOK_MASK                (0x8000U)
-#define PMU_MISC0_OSC_XTALOK_SHIFT               (15U)
-#define PMU_MISC0_OSC_XTALOK(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_SHIFT)) & PMU_MISC0_OSC_XTALOK_MASK)
-#define PMU_MISC0_OSC_XTALOK_EN_MASK             (0x10000U)
-#define PMU_MISC0_OSC_XTALOK_EN_SHIFT            (16U)
-#define PMU_MISC0_OSC_XTALOK_EN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_CLKGATE_CTRL_MASK              (0x2000000U)
-#define PMU_MISC0_CLKGATE_CTRL_SHIFT             (25U)
-#define PMU_MISC0_CLKGATE_CTRL(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_CLKGATE_DELAY_MASK             (0x1C000000U)
-#define PMU_MISC0_CLKGATE_DELAY_SHIFT            (26U)
-#define PMU_MISC0_CLKGATE_DELAY(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_RTC_XTAL_SOURCE_MASK           (0x20000000U)
-#define PMU_MISC0_RTC_XTAL_SOURCE_SHIFT          (29U)
-#define PMU_MISC0_RTC_XTAL_SOURCE(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_XTAL_24M_PWD_MASK              (0x40000000U)
-#define PMU_MISC0_XTAL_24M_PWD_SHIFT             (30U)
-#define PMU_MISC0_XTAL_24M_PWD(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_VID_PLL_PREDIV_MASK            (0x80000000U)
-#define PMU_MISC0_VID_PLL_PREDIV_SHIFT           (31U)
-#define PMU_MISC0_VID_PLL_PREDIV(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_REFTOP_PWD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_PWD_SHIFT)) & PMU_MISC0_REFTOP_PWD_MASK)
+#define PMU_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_REFTOP_SELFBIASOFF(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_REFTOP_VBGADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_REFTOP_VBGUP(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_STOP_MODE_CONFIG(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_DISCON_HIGH_SNVS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_I_SHIFT)) & PMU_MISC0_OSC_I_MASK)
+#define PMU_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_OSC_XTALOK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_SHIFT)) & PMU_MISC0_OSC_XTALOK_MASK)
+#define PMU_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_OSC_XTALOK_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_CLKGATE_CTRL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_CLKGATE_DELAY(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_RTC_XTAL_SOURCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_XTAL_24M_PWD(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_VID_PLL_PREDIV(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_SET_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_SET_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_SET_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_PWD_SHIFT)) & PMU_MISC0_SET_REFTOP_PWD_MASK)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_SET_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_SET_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_SET_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_SET_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_SET_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_SET_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_SET_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_SET_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_SET_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_SET_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_SET_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_I_SHIFT)) & PMU_MISC0_SET_OSC_I_MASK)
-#define PMU_MISC0_SET_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_SET_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_SET_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_MASK)
-#define PMU_MISC0_SET_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_SET_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_SET_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_SET_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_SET_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_SET_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_SET_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_SET_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_SET_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_SET_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_SET_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_SET_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_SET_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_SET_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_SET_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_SET_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_SET_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_SET_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_SET_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_PWD_SHIFT)) & PMU_MISC0_SET_REFTOP_PWD_MASK)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_SET_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_SET_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_SET_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_SET_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_SET_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_SET_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_SET_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_I_SHIFT)) & PMU_MISC0_SET_OSC_I_MASK)
+#define PMU_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_SET_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_MASK)
+#define PMU_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_SET_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_SET_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_SET_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_SET_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_SET_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_SET_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_SET_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_SET_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_SET_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_SET_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_CLR_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_CLR_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_CLR_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_PWD_SHIFT)) & PMU_MISC0_CLR_REFTOP_PWD_MASK)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_CLR_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_CLR_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_CLR_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_CLR_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_CLR_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_CLR_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_CLR_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_CLR_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_I_SHIFT)) & PMU_MISC0_CLR_OSC_I_MASK)
-#define PMU_MISC0_CLR_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_CLR_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_CLR_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_MASK)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_CLR_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_CLR_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_CLR_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLR_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_CLR_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_CLR_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_CLR_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_CLR_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_CLR_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_CLR_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_CLR_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_CLR_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_CLR_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_PWD_SHIFT)) & PMU_MISC0_CLR_REFTOP_PWD_MASK)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_CLR_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_CLR_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_CLR_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_CLR_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_CLR_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_I_SHIFT)) & PMU_MISC0_CLR_OSC_I_MASK)
+#define PMU_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_CLR_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_MASK)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_CLR_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_CLR_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_CLR_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_CLR_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_CLR_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_CLR_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define PMU_MISC0_TOG_REFTOP_PWD_MASK            (0x1U)
-#define PMU_MISC0_TOG_REFTOP_PWD_SHIFT           (0U)
-#define PMU_MISC0_TOG_REFTOP_PWD(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_PWD_SHIFT)) & PMU_MISC0_TOG_REFTOP_PWD_MASK)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK    (0x8U)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT   (3U)
-#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF(x)      (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ_MASK         (0x70U)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT        (4U)
-#define PMU_MISC0_TOG_REFTOP_VBGADJ(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define PMU_MISC0_TOG_REFTOP_VBGUP_MASK          (0x80U)
-#define PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT         (7U)
-#define PMU_MISC0_TOG_REFTOP_VBGUP(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK      (0xC00U)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT     (10U)
-#define PMU_MISC0_TOG_STOP_MODE_CONFIG(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK      (0x1000U)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT     (12U)
-#define PMU_MISC0_TOG_DISCON_HIGH_SNVS(x)        (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define PMU_MISC0_TOG_OSC_I_MASK                 (0x6000U)
-#define PMU_MISC0_TOG_OSC_I_SHIFT                (13U)
-#define PMU_MISC0_TOG_OSC_I(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_I_SHIFT)) & PMU_MISC0_TOG_OSC_I_MASK)
-#define PMU_MISC0_TOG_OSC_XTALOK_MASK            (0x8000U)
-#define PMU_MISC0_TOG_OSC_XTALOK_SHIFT           (15U)
-#define PMU_MISC0_TOG_OSC_XTALOK(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_MASK)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN_MASK         (0x10000U)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT        (16U)
-#define PMU_MISC0_TOG_OSC_XTALOK_EN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define PMU_MISC0_TOG_CLKGATE_CTRL_MASK          (0x2000000U)
-#define PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT         (25U)
-#define PMU_MISC0_TOG_CLKGATE_CTRL(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_TOG_CLKGATE_CTRL_MASK)
-#define PMU_MISC0_TOG_CLKGATE_DELAY_MASK         (0x1C000000U)
-#define PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT        (26U)
-#define PMU_MISC0_TOG_CLKGATE_DELAY(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK       (0x20000000U)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT      (29U)
-#define PMU_MISC0_TOG_RTC_XTAL_SOURCE(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define PMU_MISC0_TOG_XTAL_24M_PWD_MASK          (0x40000000U)
-#define PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT         (30U)
-#define PMU_MISC0_TOG_XTAL_24M_PWD(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_TOG_XTAL_24M_PWD_MASK)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV_MASK        (0x80000000U)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT       (31U)
-#define PMU_MISC0_TOG_VID_PLL_PREDIV(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_TOG_VID_PLL_PREDIV_MASK)
+#define PMU_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define PMU_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define PMU_MISC0_TOG_REFTOP_PWD(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_PWD_SHIFT)) & PMU_MISC0_TOG_REFTOP_PWD_MASK)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
+#define PMU_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & PMU_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
+#define PMU_MISC0_TOG_REFTOP_VBGADJ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define PMU_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define PMU_MISC0_TOG_REFTOP_VBGUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & PMU_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
+#define PMU_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & PMU_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
+#define PMU_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & PMU_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define PMU_MISC0_TOG_OSC_I_MASK       (0x6000U)
+#define PMU_MISC0_TOG_OSC_I_SHIFT      (13U)
+#define PMU_MISC0_TOG_OSC_I(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_I_SHIFT)) & PMU_MISC0_TOG_OSC_I_MASK)
+#define PMU_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define PMU_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define PMU_MISC0_TOG_OSC_XTALOK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_MASK)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
+#define PMU_MISC0_TOG_OSC_XTALOK_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & PMU_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define PMU_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define PMU_MISC0_TOG_CLKGATE_CTRL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & PMU_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define PMU_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
+#define PMU_MISC0_TOG_CLKGATE_DELAY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & PMU_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
+#define PMU_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & PMU_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define PMU_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define PMU_MISC0_TOG_XTAL_24M_PWD(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & PMU_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT (31U)
+#define PMU_MISC0_TOG_VID_PLL_PREDIV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & PMU_MISC0_TOG_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC1 - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_LVDS1_CLK_SEL_MASK             (0x1FU)
-#define PMU_MISC1_LVDS1_CLK_SEL_SHIFT            (0U)
-#define PMU_MISC1_LVDS1_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_LVDS2_CLK_SEL_MASK             (0x3E0U)
-#define PMU_MISC1_LVDS2_CLK_SEL_SHIFT            (5U)
-#define PMU_MISC1_LVDS2_CLK_SEL(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_LVDSCLK1_OBEN_MASK             (0x400U)
-#define PMU_MISC1_LVDSCLK1_OBEN_SHIFT            (10U)
-#define PMU_MISC1_LVDSCLK1_OBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_LVDSCLK2_OBEN_MASK             (0x800U)
-#define PMU_MISC1_LVDSCLK2_OBEN_SHIFT            (11U)
-#define PMU_MISC1_LVDSCLK2_OBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_LVDSCLK1_IBEN_MASK             (0x1000U)
-#define PMU_MISC1_LVDSCLK1_IBEN_SHIFT            (12U)
-#define PMU_MISC1_LVDSCLK1_IBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_LVDSCLK2_IBEN_MASK             (0x2000U)
-#define PMU_MISC1_LVDSCLK2_IBEN_SHIFT            (13U)
-#define PMU_MISC1_LVDSCLK2_IBEN(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN_MASK       (0x10000U)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT      (16U)
-#define PMU_MISC1_PFD_480_AUTOGATE_EN(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN_MASK       (0x20000U)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT      (17U)
-#define PMU_MISC1_PFD_528_AUTOGATE_EN(x)         (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_IRQ_TEMPPANIC_MASK             (0x8000000U)
-#define PMU_MISC1_IRQ_TEMPPANIC_SHIFT            (27U)
-#define PMU_MISC1_IRQ_TEMPPANIC(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_IRQ_TEMPLOW_MASK               (0x10000000U)
-#define PMU_MISC1_IRQ_TEMPLOW_SHIFT              (28U)
-#define PMU_MISC1_IRQ_TEMPLOW(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_IRQ_TEMPHIGH_MASK              (0x20000000U)
-#define PMU_MISC1_IRQ_TEMPHIGH_SHIFT             (29U)
-#define PMU_MISC1_IRQ_TEMPHIGH(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_IRQ_ANA_BO_MASK                (0x40000000U)
-#define PMU_MISC1_IRQ_ANA_BO_SHIFT               (30U)
-#define PMU_MISC1_IRQ_ANA_BO(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_IRQ_DIG_BO_MASK                (0x80000000U)
-#define PMU_MISC1_IRQ_DIG_BO_SHIFT               (31U)
-#define PMU_MISC1_IRQ_DIG_BO(x)                  (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_LVDS1_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_LVDS2_CLK_SEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_LVDSCLK1_OBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_LVDSCLK2_OBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_LVDSCLK1_IBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_LVDSCLK2_IBEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_PFD_480_AUTOGATE_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_PFD_528_AUTOGATE_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_IRQ_TEMPPANIC(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_IRQ_TEMPLOW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_IRQ_TEMPHIGH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_IRQ_ANA_BO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_IRQ_DIG_BO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_SET - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_SET_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_SET_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_SET_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_SET_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_SET_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_SET_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_SET_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_SET_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_SET_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_SET_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_SET_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_SET_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_SET_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_SET_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_SET_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_SET_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_SET_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_SET_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_SET_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_SET_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_SET_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_SET_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_SET_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_SET_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_SET_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_SET_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_SET_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_SET_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_SET_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_SET_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_SET_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_SET_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_SET_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_SET_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_SET_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_SET_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_SET_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_SET_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_SET_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_SET_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_SET_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_SET_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_CLR - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_CLR_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_CLR_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_CLR_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_CLR_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_CLR_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_CLR_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_CLR_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_CLR_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_CLR_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_CLR_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_CLR_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_CLR_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_CLR_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_CLR_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_CLR_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_CLR_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_CLR_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_CLR_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_CLR_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_CLR_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_CLR_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_CLR_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_CLR_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_CLR_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_CLR_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_CLR_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_CLR_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_CLR_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_CLR_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_CLR_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_CLR_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_CLR_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_CLR_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_CLR_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC1_TOG - Miscellaneous Register 1 */
 /*! @{ */
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK         (0x1FU)
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT        (0U)
-#define PMU_MISC1_TOG_LVDS1_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK         (0x3E0U)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT        (5U)
-#define PMU_MISC1_TOG_LVDS2_CLK_SEL(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK         (0x400U)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT        (10U)
-#define PMU_MISC1_TOG_LVDSCLK1_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK         (0x800U)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT        (11U)
-#define PMU_MISC1_TOG_LVDSCLK2_OBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK         (0x1000U)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT        (12U)
-#define PMU_MISC1_TOG_LVDSCLK1_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK         (0x2000U)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT        (13U)
-#define PMU_MISC1_TOG_LVDSCLK2_IBEN(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK   (0x10000U)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT  (16U)
-#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK   (0x20000U)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT  (17U)
-#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN(x)     (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK         (0x8000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT        (27U)
-#define PMU_MISC1_TOG_IRQ_TEMPPANIC(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW_MASK           (0x10000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT          (28U)
-#define PMU_MISC1_TOG_IRQ_TEMPLOW(x)             (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPLOW_MASK)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK          (0x20000000U)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT         (29U)
-#define PMU_MISC1_TOG_IRQ_TEMPHIGH(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK)
-#define PMU_MISC1_TOG_IRQ_ANA_BO_MASK            (0x40000000U)
-#define PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT           (30U)
-#define PMU_MISC1_TOG_IRQ_ANA_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_ANA_BO_MASK)
-#define PMU_MISC1_TOG_IRQ_DIG_BO_MASK            (0x80000000U)
-#define PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT           (31U)
-#define PMU_MISC1_TOG_IRQ_DIG_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_DIG_BO_MASK)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK  (0x1FU)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT (0U)
+#define PMU_MISC1_TOG_LVDS1_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS1_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS1_CLK_SEL_MASK)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK  (0x3E0U)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT (5U)
+#define PMU_MISC1_TOG_LVDS2_CLK_SEL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDS2_CLK_SEL_SHIFT)) & PMU_MISC1_TOG_LVDS2_CLK_SEL_MASK)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK  (0x400U)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT (10U)
+#define PMU_MISC1_TOG_LVDSCLK1_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_OBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK  (0x800U)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT (11U)
+#define PMU_MISC1_TOG_LVDSCLK2_OBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_OBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_OBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK  (0x1000U)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT (12U)
+#define PMU_MISC1_TOG_LVDSCLK1_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK1_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK1_IBEN_MASK)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK  (0x2000U)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT (13U)
+#define PMU_MISC1_TOG_LVDSCLK2_IBEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_LVDSCLK2_IBEN_SHIFT)) & PMU_MISC1_TOG_LVDSCLK2_IBEN_MASK)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK  (0x10000U)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT (16U)
+#define PMU_MISC1_TOG_PFD_480_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_480_AUTOGATE_EN_MASK)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK  (0x20000U)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT (17U)
+#define PMU_MISC1_TOG_PFD_528_AUTOGATE_EN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_SHIFT)) & PMU_MISC1_TOG_PFD_528_AUTOGATE_EN_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK  (0x8000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT (27U)
+#define PMU_MISC1_TOG_IRQ_TEMPPANIC(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPPANIC_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPPANIC_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW_MASK  (0x10000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT (28U)
+#define PMU_MISC1_TOG_IRQ_TEMPLOW(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPLOW_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPLOW_MASK)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK  (0x20000000U)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT (29U)
+#define PMU_MISC1_TOG_IRQ_TEMPHIGH(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_TEMPHIGH_SHIFT)) & PMU_MISC1_TOG_IRQ_TEMPHIGH_MASK)
+#define PMU_MISC1_TOG_IRQ_ANA_BO_MASK  (0x40000000U)
+#define PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT (30U)
+#define PMU_MISC1_TOG_IRQ_ANA_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_ANA_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_ANA_BO_MASK)
+#define PMU_MISC1_TOG_IRQ_DIG_BO_MASK  (0x80000000U)
+#define PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT (31U)
+#define PMU_MISC1_TOG_IRQ_DIG_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC1_TOG_IRQ_DIG_BO_SHIFT)) & PMU_MISC1_TOG_IRQ_DIG_BO_MASK)
 /*! @} */
 
 /*! @name MISC2 - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_REG0_BO_OFFSET_MASK            (0x7U)
-#define PMU_MISC2_REG0_BO_OFFSET_SHIFT           (0U)
-#define PMU_MISC2_REG0_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_REG0_BO_STATUS_MASK            (0x8U)
-#define PMU_MISC2_REG0_BO_STATUS_SHIFT           (3U)
-#define PMU_MISC2_REG0_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_REG0_ENABLE_BO_MASK            (0x20U)
-#define PMU_MISC2_REG0_ENABLE_BO_SHIFT           (5U)
-#define PMU_MISC2_REG0_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_PLL3_disable_MASK              (0x80U)
-#define PMU_MISC2_PLL3_disable_SHIFT             (7U)
-#define PMU_MISC2_PLL3_disable(x)                (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_PLL3_disable_SHIFT)) & PMU_MISC2_PLL3_disable_MASK)
-#define PMU_MISC2_REG1_BO_OFFSET_MASK            (0x700U)
-#define PMU_MISC2_REG1_BO_OFFSET_SHIFT           (8U)
-#define PMU_MISC2_REG1_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_REG1_BO_STATUS_MASK            (0x800U)
-#define PMU_MISC2_REG1_BO_STATUS_SHIFT           (11U)
-#define PMU_MISC2_REG1_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_REG1_ENABLE_BO_MASK            (0x2000U)
-#define PMU_MISC2_REG1_ENABLE_BO_SHIFT           (13U)
-#define PMU_MISC2_REG1_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_AUDIO_DIV_LSB_MASK             (0x8000U)
-#define PMU_MISC2_AUDIO_DIV_LSB_SHIFT            (15U)
-#define PMU_MISC2_AUDIO_DIV_LSB(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_REG2_BO_OFFSET_MASK            (0x70000U)
-#define PMU_MISC2_REG2_BO_OFFSET_SHIFT           (16U)
-#define PMU_MISC2_REG2_BO_OFFSET(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_REG2_BO_STATUS_MASK            (0x80000U)
-#define PMU_MISC2_REG2_BO_STATUS_SHIFT           (19U)
-#define PMU_MISC2_REG2_BO_STATUS(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_REG2_ENABLE_BO_MASK            (0x200000U)
-#define PMU_MISC2_REG2_ENABLE_BO_SHIFT           (21U)
-#define PMU_MISC2_REG2_ENABLE_BO(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_REG2_OK_MASK                   (0x400000U)
-#define PMU_MISC2_REG2_OK_SHIFT                  (22U)
-#define PMU_MISC2_REG2_OK(x)                     (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_OK_SHIFT)) & PMU_MISC2_REG2_OK_MASK)
-#define PMU_MISC2_AUDIO_DIV_MSB_MASK             (0x800000U)
-#define PMU_MISC2_AUDIO_DIV_MSB_SHIFT            (23U)
-#define PMU_MISC2_AUDIO_DIV_MSB(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_REG0_STEP_TIME_MASK            (0x3000000U)
-#define PMU_MISC2_REG0_STEP_TIME_SHIFT           (24U)
-#define PMU_MISC2_REG0_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_REG1_STEP_TIME_MASK            (0xC000000U)
-#define PMU_MISC2_REG1_STEP_TIME_SHIFT           (26U)
-#define PMU_MISC2_REG1_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_REG2_STEP_TIME_MASK            (0x30000000U)
-#define PMU_MISC2_REG2_STEP_TIME_SHIFT           (28U)
-#define PMU_MISC2_REG2_STEP_TIME(x)              (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_VIDEO_DIV_MASK                 (0xC0000000U)
-#define PMU_MISC2_VIDEO_DIV_SHIFT                (30U)
-#define PMU_MISC2_VIDEO_DIV(x)                   (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_VIDEO_DIV_SHIFT)) & PMU_MISC2_VIDEO_DIV_MASK)
+#define PMU_MISC2_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_REG0_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_REG0_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_REG0_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_PLL3_disable(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_PLL3_disable_SHIFT)) & PMU_MISC2_PLL3_disable_MASK)
+#define PMU_MISC2_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_REG1_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_REG1_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_REG1_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_AUDIO_DIV_LSB(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_REG2_BO_OFFSET(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_REG2_BO_STATUS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_REG2_ENABLE_BO(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_REG2_OK_MASK        (0x400000U)
+#define PMU_MISC2_REG2_OK_SHIFT       (22U)
+#define PMU_MISC2_REG2_OK(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_OK_SHIFT)) & PMU_MISC2_REG2_OK_MASK)
+#define PMU_MISC2_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_AUDIO_DIV_MSB(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_REG0_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_REG1_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_REG2_STEP_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_VIDEO_DIV(x)    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_VIDEO_DIV_SHIFT)) & PMU_MISC2_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_SET - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_SET_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_SET_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_SET_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_SET_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_SET_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_SET_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_SET_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_PLL3_disable_SHIFT)) & PMU_MISC2_SET_PLL3_disable_MASK)
-#define PMU_MISC2_SET_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_SET_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_SET_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_SET_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_SET_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_SET_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_SET_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_SET_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_SET_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_SET_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_SET_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_SET_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_SET_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_SET_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_SET_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_SET_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_OK_SHIFT)) & PMU_MISC2_SET_REG2_OK_MASK)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_SET_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_SET_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_SET_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_SET_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_SET_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_SET_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_SET_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_SET_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_SET_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_SET_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_SET_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_SET_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_SET_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_VIDEO_DIV_SHIFT)) & PMU_MISC2_SET_VIDEO_DIV_MASK)
+#define PMU_MISC2_SET_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_SET_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_SET_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_SET_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_SET_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_SET_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_SET_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_PLL3_disable_SHIFT)) & PMU_MISC2_SET_PLL3_disable_MASK)
+#define PMU_MISC2_SET_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_SET_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_SET_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_SET_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_SET_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_SET_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_SET_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_SET_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_SET_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_SET_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_SET_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_SET_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_SET_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_SET_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_SET_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_SET_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_SET_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_SET_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_SET_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_OK_SHIFT)) & PMU_MISC2_SET_REG2_OK_MASK)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_SET_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_SET_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_SET_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_SET_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_SET_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_SET_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_SET_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_SET_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_SET_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_SET_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_SET_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_SET_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_SET_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_SET_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_SET_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_SET_VIDEO_DIV_SHIFT)) & PMU_MISC2_SET_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_CLR - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_CLR_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_CLR_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_CLR_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_CLR_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_CLR_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_CLR_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_PLL3_disable_SHIFT)) & PMU_MISC2_CLR_PLL3_disable_MASK)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_CLR_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_CLR_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_CLR_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_CLR_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_CLR_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_CLR_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_CLR_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_CLR_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_CLR_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_CLR_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_CLR_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_OK_SHIFT)) & PMU_MISC2_CLR_REG2_OK_MASK)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_CLR_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_CLR_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_CLR_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_CLR_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_CLR_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_CLR_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_CLR_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_CLR_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_VIDEO_DIV_SHIFT)) & PMU_MISC2_CLR_VIDEO_DIV_MASK)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_CLR_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_CLR_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_CLR_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_CLR_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_CLR_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_PLL3_disable_SHIFT)) & PMU_MISC2_CLR_PLL3_disable_MASK)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_CLR_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_CLR_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_CLR_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_CLR_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_CLR_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_CLR_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_CLR_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_CLR_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_CLR_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_CLR_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_CLR_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_CLR_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_CLR_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_CLR_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_OK_SHIFT)) & PMU_MISC2_CLR_REG2_OK_MASK)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_CLR_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_CLR_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_CLR_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_CLR_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_CLR_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_CLR_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_CLR_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_CLR_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_CLR_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_CLR_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_CLR_VIDEO_DIV_SHIFT)) & PMU_MISC2_CLR_VIDEO_DIV_MASK)
 /*! @} */
 
 /*! @name MISC2_TOG - Miscellaneous Control Register */
 /*! @{ */
-#define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK        (0x7U)
-#define PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT       (0U)
-#define PMU_MISC2_TOG_REG0_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG0_BO_STATUS_MASK        (0x8U)
-#define PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT       (3U)
-#define PMU_MISC2_TOG_REG0_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG0_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO_MASK        (0x20U)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT       (5U)
-#define PMU_MISC2_TOG_REG0_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG0_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_PLL3_disable_MASK          (0x80U)
-#define PMU_MISC2_TOG_PLL3_disable_SHIFT         (7U)
-#define PMU_MISC2_TOG_PLL3_disable(x)            (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_PLL3_disable_SHIFT)) & PMU_MISC2_TOG_PLL3_disable_MASK)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET_MASK        (0x700U)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT       (8U)
-#define PMU_MISC2_TOG_REG1_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG1_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG1_BO_STATUS_MASK        (0x800U)
-#define PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT       (11U)
-#define PMU_MISC2_TOG_REG1_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG1_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO_MASK        (0x2000U)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT       (13U)
-#define PMU_MISC2_TOG_REG1_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG1_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK         (0x8000U)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT        (15U)
-#define PMU_MISC2_TOG_AUDIO_DIV_LSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK        (0x70000U)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT       (16U)
-#define PMU_MISC2_TOG_REG2_BO_OFFSET(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
-#define PMU_MISC2_TOG_REG2_BO_STATUS_MASK        (0x80000U)
-#define PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT       (19U)
-#define PMU_MISC2_TOG_REG2_BO_STATUS(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK        (0x200000U)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT       (21U)
-#define PMU_MISC2_TOG_REG2_ENABLE_BO(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
-#define PMU_MISC2_TOG_REG2_OK_MASK               (0x400000U)
-#define PMU_MISC2_TOG_REG2_OK_SHIFT              (22U)
-#define PMU_MISC2_TOG_REG2_OK(x)                 (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_OK_SHIFT)) & PMU_MISC2_TOG_REG2_OK_MASK)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK         (0x800000U)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT        (23U)
-#define PMU_MISC2_TOG_AUDIO_DIV_MSB(x)           (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK)
-#define PMU_MISC2_TOG_REG0_STEP_TIME_MASK        (0x3000000U)
-#define PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT       (24U)
-#define PMU_MISC2_TOG_REG0_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG0_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_REG1_STEP_TIME_MASK        (0xC000000U)
-#define PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT       (26U)
-#define PMU_MISC2_TOG_REG1_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG1_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_REG2_STEP_TIME_MASK        (0x30000000U)
-#define PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT       (28U)
-#define PMU_MISC2_TOG_REG2_STEP_TIME(x)          (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG2_STEP_TIME_MASK)
-#define PMU_MISC2_TOG_VIDEO_DIV_MASK             (0xC0000000U)
-#define PMU_MISC2_TOG_VIDEO_DIV_SHIFT            (30U)
-#define PMU_MISC2_TOG_VIDEO_DIV(x)               (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_VIDEO_DIV_SHIFT)) & PMU_MISC2_TOG_VIDEO_DIV_MASK)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET_MASK  (0x7U)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT (0U)
+#define PMU_MISC2_TOG_REG0_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG0_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG0_BO_STATUS_MASK  (0x8U)
+#define PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT (3U)
+#define PMU_MISC2_TOG_REG0_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG0_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO_MASK  (0x20U)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT (5U)
+#define PMU_MISC2_TOG_REG0_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG0_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_PLL3_disable_MASK  (0x80U)
+#define PMU_MISC2_TOG_PLL3_disable_SHIFT (7U)
+#define PMU_MISC2_TOG_PLL3_disable(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_PLL3_disable_SHIFT)) & PMU_MISC2_TOG_PLL3_disable_MASK)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET_MASK  (0x700U)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT (8U)
+#define PMU_MISC2_TOG_REG1_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG1_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG1_BO_STATUS_MASK  (0x800U)
+#define PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT (11U)
+#define PMU_MISC2_TOG_REG1_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG1_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO_MASK  (0x2000U)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT (13U)
+#define PMU_MISC2_TOG_REG1_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG1_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK  (0x8000U)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT (15U)
+#define PMU_MISC2_TOG_AUDIO_DIV_LSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_LSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_LSB_MASK)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET_MASK  (0x70000U)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT (16U)
+#define PMU_MISC2_TOG_REG2_BO_OFFSET(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_OFFSET_SHIFT)) & PMU_MISC2_TOG_REG2_BO_OFFSET_MASK)
+#define PMU_MISC2_TOG_REG2_BO_STATUS_MASK  (0x80000U)
+#define PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT (19U)
+#define PMU_MISC2_TOG_REG2_BO_STATUS(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_BO_STATUS_SHIFT)) & PMU_MISC2_TOG_REG2_BO_STATUS_MASK)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO_MASK  (0x200000U)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT (21U)
+#define PMU_MISC2_TOG_REG2_ENABLE_BO(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_ENABLE_BO_SHIFT)) & PMU_MISC2_TOG_REG2_ENABLE_BO_MASK)
+#define PMU_MISC2_TOG_REG2_OK_MASK  (0x400000U)
+#define PMU_MISC2_TOG_REG2_OK_SHIFT (22U)
+#define PMU_MISC2_TOG_REG2_OK(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_OK_SHIFT)) & PMU_MISC2_TOG_REG2_OK_MASK)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK  (0x800000U)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT (23U)
+#define PMU_MISC2_TOG_AUDIO_DIV_MSB(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_AUDIO_DIV_MSB_SHIFT)) & PMU_MISC2_TOG_AUDIO_DIV_MSB_MASK)
+#define PMU_MISC2_TOG_REG0_STEP_TIME_MASK  (0x3000000U)
+#define PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT (24U)
+#define PMU_MISC2_TOG_REG0_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG0_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG0_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_REG1_STEP_TIME_MASK  (0xC000000U)
+#define PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT (26U)
+#define PMU_MISC2_TOG_REG1_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG1_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG1_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_REG2_STEP_TIME_MASK  (0x30000000U)
+#define PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT (28U)
+#define PMU_MISC2_TOG_REG2_STEP_TIME(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_REG2_STEP_TIME_SHIFT)) & PMU_MISC2_TOG_REG2_STEP_TIME_MASK)
+#define PMU_MISC2_TOG_VIDEO_DIV_MASK  (0xC0000000U)
+#define PMU_MISC2_TOG_VIDEO_DIV_SHIFT (30U)
+#define PMU_MISC2_TOG_VIDEO_DIV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << PMU_MISC2_TOG_VIDEO_DIV_SHIFT)) & PMU_MISC2_TOG_VIDEO_DIV_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PMU_Register_Masks */
 
-
 /* PMU - Peripheral instance base addresses */
 /** Peripheral PMU base address */
-#define PMU_BASE                                 (0x400D8000u)
+#define PMU_BASE (0x400D8000u)
 /** Peripheral PMU base pointer */
-#define PMU                                      ((PMU_Type *)PMU_BASE)
+#define PMU ((PMU_Type *)PMU_BASE)
 /** Array initializer of PMU peripheral base addresses */
-#define PMU_BASE_ADDRS                           { PMU_BASE }
+#define PMU_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        PMU_BASE                                                                                                       \
+    }
 /** Array initializer of PMU peripheral base pointers */
-#define PMU_BASE_PTRS                            { PMU }
+#define PMU_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        PMU                                                                                                            \
+    }
 
 /*!
  * @}
  */ /* end of group PMU_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- PWM Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -17199,64 +19804,67 @@ typedef struct {
  */
 
 /** PWM - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x60 */
-    __I  uint16_t CNT;                               /**< Counter Register, array offset: 0x0, array step: 0x60 */
-    __IO uint16_t INIT;                              /**< Initial Count Register, array offset: 0x2, array step: 0x60 */
-    __IO uint16_t CTRL2;                             /**< Control 2 Register, array offset: 0x4, array step: 0x60 */
-    __IO uint16_t CTRL;                              /**< Control Register, array offset: 0x6, array step: 0x60 */
-         uint8_t RESERVED_0[2];
-    __IO uint16_t VAL0;                              /**< Value Register 0, array offset: 0xA, array step: 0x60 */
-    __IO uint16_t FRACVAL1;                          /**< Fractional Value Register 1, array offset: 0xC, array step: 0x60 */
-    __IO uint16_t VAL1;                              /**< Value Register 1, array offset: 0xE, array step: 0x60 */
-    __IO uint16_t FRACVAL2;                          /**< Fractional Value Register 2, array offset: 0x10, array step: 0x60 */
-    __IO uint16_t VAL2;                              /**< Value Register 2, array offset: 0x12, array step: 0x60 */
-    __IO uint16_t FRACVAL3;                          /**< Fractional Value Register 3, array offset: 0x14, array step: 0x60 */
-    __IO uint16_t VAL3;                              /**< Value Register 3, array offset: 0x16, array step: 0x60 */
-    __IO uint16_t FRACVAL4;                          /**< Fractional Value Register 4, array offset: 0x18, array step: 0x60 */
-    __IO uint16_t VAL4;                              /**< Value Register 4, array offset: 0x1A, array step: 0x60 */
-    __IO uint16_t FRACVAL5;                          /**< Fractional Value Register 5, array offset: 0x1C, array step: 0x60 */
-    __IO uint16_t VAL5;                              /**< Value Register 5, array offset: 0x1E, array step: 0x60 */
-    __IO uint16_t FRCTRL;                            /**< Fractional Control Register, array offset: 0x20, array step: 0x60 */
-    __IO uint16_t OCTRL;                             /**< Output Control Register, array offset: 0x22, array step: 0x60 */
-    __IO uint16_t STS;                               /**< Status Register, array offset: 0x24, array step: 0x60 */
-    __IO uint16_t INTEN;                             /**< Interrupt Enable Register, array offset: 0x26, array step: 0x60 */
-    __IO uint16_t DMAEN;                             /**< DMA Enable Register, array offset: 0x28, array step: 0x60 */
-    __IO uint16_t TCTRL;                             /**< Output Trigger Control Register, array offset: 0x2A, array step: 0x60 */
-    __IO uint16_t DISMAP[2];                         /**< Fault Disable Mapping Register 0..Fault Disable Mapping Register 1, array offset: 0x2C, array step: index*0x60, index2*0x2 */
-    __IO uint16_t DTCNT0;                            /**< Deadtime Count Register 0, array offset: 0x30, array step: 0x60 */
-    __IO uint16_t DTCNT1;                            /**< Deadtime Count Register 1, array offset: 0x32, array step: 0x60 */
-    __IO uint16_t CAPTCTRLA;                         /**< Capture Control A Register, array offset: 0x34, array step: 0x60 */
-    __IO uint16_t CAPTCOMPA;                         /**< Capture Compare A Register, array offset: 0x36, array step: 0x60 */
-    __IO uint16_t CAPTCTRLB;                         /**< Capture Control B Register, array offset: 0x38, array step: 0x60 */
-    __IO uint16_t CAPTCOMPB;                         /**< Capture Compare B Register, array offset: 0x3A, array step: 0x60 */
-    __IO uint16_t CAPTCTRLX;                         /**< Capture Control X Register, array offset: 0x3C, array step: 0x60 */
-    __IO uint16_t CAPTCOMPX;                         /**< Capture Compare X Register, array offset: 0x3E, array step: 0x60 */
-    __I  uint16_t CVAL0;                             /**< Capture Value 0 Register, array offset: 0x40, array step: 0x60 */
-    __I  uint16_t CVAL0CYC;                          /**< Capture Value 0 Cycle Register, array offset: 0x42, array step: 0x60 */
-    __I  uint16_t CVAL1;                             /**< Capture Value 1 Register, array offset: 0x44, array step: 0x60 */
-    __I  uint16_t CVAL1CYC;                          /**< Capture Value 1 Cycle Register, array offset: 0x46, array step: 0x60 */
-    __I  uint16_t CVAL2;                             /**< Capture Value 2 Register, array offset: 0x48, array step: 0x60 */
-    __I  uint16_t CVAL2CYC;                          /**< Capture Value 2 Cycle Register, array offset: 0x4A, array step: 0x60 */
-    __I  uint16_t CVAL3;                             /**< Capture Value 3 Register, array offset: 0x4C, array step: 0x60 */
-    __I  uint16_t CVAL3CYC;                          /**< Capture Value 3 Cycle Register, array offset: 0x4E, array step: 0x60 */
-    __I  uint16_t CVAL4;                             /**< Capture Value 4 Register, array offset: 0x50, array step: 0x60 */
-    __I  uint16_t CVAL4CYC;                          /**< Capture Value 4 Cycle Register, array offset: 0x52, array step: 0x60 */
-    __I  uint16_t CVAL5;                             /**< Capture Value 5 Register, array offset: 0x54, array step: 0x60 */
-    __I  uint16_t CVAL5CYC;                          /**< Capture Value 5 Cycle Register, array offset: 0x56, array step: 0x60 */
-         uint8_t RESERVED_1[8];
-  } SM[4];
-  __IO uint16_t OUTEN;                             /**< Output Enable Register, offset: 0x180 */
-  __IO uint16_t MASK;                              /**< Mask Register, offset: 0x182 */
-  __IO uint16_t SWCOUT;                            /**< Software Controlled Output Register, offset: 0x184 */
-  __IO uint16_t DTSRCSEL;                          /**< PWM Source Select Register, offset: 0x186 */
-  __IO uint16_t MCTRL;                             /**< Master Control Register, offset: 0x188 */
-  __IO uint16_t MCTRL2;                            /**< Master Control 2 Register, offset: 0x18A */
-  __IO uint16_t FCTRL;                             /**< Fault Control Register, offset: 0x18C */
-  __IO uint16_t FSTS;                              /**< Fault Status Register, offset: 0x18E */
-  __IO uint16_t FFILT;                             /**< Fault Filter Register, offset: 0x190 */
-  __IO uint16_t FTST;                              /**< Fault Test Register, offset: 0x192 */
-  __IO uint16_t FCTRL2;                            /**< Fault Control 2 Register, offset: 0x194 */
+typedef struct
+{
+    struct
+    {                        /* offset: 0x0, array step: 0x60 */
+        __I uint16_t CNT;    /**< Counter Register, array offset: 0x0, array step: 0x60 */
+        __IO uint16_t INIT;  /**< Initial Count Register, array offset: 0x2, array step: 0x60 */
+        __IO uint16_t CTRL2; /**< Control 2 Register, array offset: 0x4, array step: 0x60 */
+        __IO uint16_t CTRL;  /**< Control Register, array offset: 0x6, array step: 0x60 */
+        uint8_t RESERVED_0[2];
+        __IO uint16_t VAL0;      /**< Value Register 0, array offset: 0xA, array step: 0x60 */
+        __IO uint16_t FRACVAL1;  /**< Fractional Value Register 1, array offset: 0xC, array step: 0x60 */
+        __IO uint16_t VAL1;      /**< Value Register 1, array offset: 0xE, array step: 0x60 */
+        __IO uint16_t FRACVAL2;  /**< Fractional Value Register 2, array offset: 0x10, array step: 0x60 */
+        __IO uint16_t VAL2;      /**< Value Register 2, array offset: 0x12, array step: 0x60 */
+        __IO uint16_t FRACVAL3;  /**< Fractional Value Register 3, array offset: 0x14, array step: 0x60 */
+        __IO uint16_t VAL3;      /**< Value Register 3, array offset: 0x16, array step: 0x60 */
+        __IO uint16_t FRACVAL4;  /**< Fractional Value Register 4, array offset: 0x18, array step: 0x60 */
+        __IO uint16_t VAL4;      /**< Value Register 4, array offset: 0x1A, array step: 0x60 */
+        __IO uint16_t FRACVAL5;  /**< Fractional Value Register 5, array offset: 0x1C, array step: 0x60 */
+        __IO uint16_t VAL5;      /**< Value Register 5, array offset: 0x1E, array step: 0x60 */
+        __IO uint16_t FRCTRL;    /**< Fractional Control Register, array offset: 0x20, array step: 0x60 */
+        __IO uint16_t OCTRL;     /**< Output Control Register, array offset: 0x22, array step: 0x60 */
+        __IO uint16_t STS;       /**< Status Register, array offset: 0x24, array step: 0x60 */
+        __IO uint16_t INTEN;     /**< Interrupt Enable Register, array offset: 0x26, array step: 0x60 */
+        __IO uint16_t DMAEN;     /**< DMA Enable Register, array offset: 0x28, array step: 0x60 */
+        __IO uint16_t TCTRL;     /**< Output Trigger Control Register, array offset: 0x2A, array step: 0x60 */
+        __IO uint16_t DISMAP[2]; /**< Fault Disable Mapping Register 0..Fault Disable Mapping Register 1, array offset:
+                                    0x2C, array step: index*0x60, index2*0x2 */
+        __IO uint16_t DTCNT0;    /**< Deadtime Count Register 0, array offset: 0x30, array step: 0x60 */
+        __IO uint16_t DTCNT1;    /**< Deadtime Count Register 1, array offset: 0x32, array step: 0x60 */
+        __IO uint16_t CAPTCTRLA; /**< Capture Control A Register, array offset: 0x34, array step: 0x60 */
+        __IO uint16_t CAPTCOMPA; /**< Capture Compare A Register, array offset: 0x36, array step: 0x60 */
+        __IO uint16_t CAPTCTRLB; /**< Capture Control B Register, array offset: 0x38, array step: 0x60 */
+        __IO uint16_t CAPTCOMPB; /**< Capture Compare B Register, array offset: 0x3A, array step: 0x60 */
+        __IO uint16_t CAPTCTRLX; /**< Capture Control X Register, array offset: 0x3C, array step: 0x60 */
+        __IO uint16_t CAPTCOMPX; /**< Capture Compare X Register, array offset: 0x3E, array step: 0x60 */
+        __I uint16_t CVAL0;      /**< Capture Value 0 Register, array offset: 0x40, array step: 0x60 */
+        __I uint16_t CVAL0CYC;   /**< Capture Value 0 Cycle Register, array offset: 0x42, array step: 0x60 */
+        __I uint16_t CVAL1;      /**< Capture Value 1 Register, array offset: 0x44, array step: 0x60 */
+        __I uint16_t CVAL1CYC;   /**< Capture Value 1 Cycle Register, array offset: 0x46, array step: 0x60 */
+        __I uint16_t CVAL2;      /**< Capture Value 2 Register, array offset: 0x48, array step: 0x60 */
+        __I uint16_t CVAL2CYC;   /**< Capture Value 2 Cycle Register, array offset: 0x4A, array step: 0x60 */
+        __I uint16_t CVAL3;      /**< Capture Value 3 Register, array offset: 0x4C, array step: 0x60 */
+        __I uint16_t CVAL3CYC;   /**< Capture Value 3 Cycle Register, array offset: 0x4E, array step: 0x60 */
+        __I uint16_t CVAL4;      /**< Capture Value 4 Register, array offset: 0x50, array step: 0x60 */
+        __I uint16_t CVAL4CYC;   /**< Capture Value 4 Cycle Register, array offset: 0x52, array step: 0x60 */
+        __I uint16_t CVAL5;      /**< Capture Value 5 Register, array offset: 0x54, array step: 0x60 */
+        __I uint16_t CVAL5CYC;   /**< Capture Value 5 Cycle Register, array offset: 0x56, array step: 0x60 */
+        uint8_t RESERVED_1[8];
+    } SM[4];
+    __IO uint16_t OUTEN;    /**< Output Enable Register, offset: 0x180 */
+    __IO uint16_t MASK;     /**< Mask Register, offset: 0x182 */
+    __IO uint16_t SWCOUT;   /**< Software Controlled Output Register, offset: 0x184 */
+    __IO uint16_t DTSRCSEL; /**< PWM Source Select Register, offset: 0x186 */
+    __IO uint16_t MCTRL;    /**< Master Control Register, offset: 0x188 */
+    __IO uint16_t MCTRL2;   /**< Master Control 2 Register, offset: 0x18A */
+    __IO uint16_t FCTRL;    /**< Fault Control Register, offset: 0x18C */
+    __IO uint16_t FSTS;     /**< Fault Status Register, offset: 0x18E */
+    __IO uint16_t FFILT;    /**< Fault Filter Register, offset: 0x190 */
+    __IO uint16_t FTST;     /**< Fault Test Register, offset: 0x192 */
+    __IO uint16_t FCTRL2;   /**< Fault Control 2 Register, offset: 0x194 */
 } PWM_Type;
 
 /* ----------------------------------------------------------------------------
@@ -17270,909 +19878,992 @@ typedef struct {
 
 /*! @name CNT - Counter Register */
 /*! @{ */
-#define PWM_CNT_CNT_MASK                         (0xFFFFU)
-#define PWM_CNT_CNT_SHIFT                        (0U)
-#define PWM_CNT_CNT(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_CNT_CNT_SHIFT)) & PWM_CNT_CNT_MASK)
+#define PWM_CNT_CNT_MASK  (0xFFFFU)
+#define PWM_CNT_CNT_SHIFT (0U)
+#define PWM_CNT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CNT_CNT_SHIFT)) & PWM_CNT_CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CNT */
-#define PWM_CNT_COUNT                            (4U)
+#define PWM_CNT_COUNT (4U)
 
 /*! @name INIT - Initial Count Register */
 /*! @{ */
-#define PWM_INIT_INIT_MASK                       (0xFFFFU)
-#define PWM_INIT_INIT_SHIFT                      (0U)
-#define PWM_INIT_INIT(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_INIT_INIT_SHIFT)) & PWM_INIT_INIT_MASK)
+#define PWM_INIT_INIT_MASK  (0xFFFFU)
+#define PWM_INIT_INIT_SHIFT (0U)
+#define PWM_INIT_INIT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INIT_INIT_SHIFT)) & PWM_INIT_INIT_MASK)
 /*! @} */
 
 /* The count of PWM_INIT */
-#define PWM_INIT_COUNT                           (4U)
+#define PWM_INIT_COUNT (4U)
 
 /*! @name CTRL2 - Control 2 Register */
 /*! @{ */
-#define PWM_CTRL2_CLK_SEL_MASK                   (0x3U)
-#define PWM_CTRL2_CLK_SEL_SHIFT                  (0U)
-#define PWM_CTRL2_CLK_SEL(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)
-#define PWM_CTRL2_RELOAD_SEL_MASK                (0x4U)
-#define PWM_CTRL2_RELOAD_SEL_SHIFT               (2U)
-#define PWM_CTRL2_RELOAD_SEL(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)
-#define PWM_CTRL2_FORCE_SEL_MASK                 (0x38U)
-#define PWM_CTRL2_FORCE_SEL_SHIFT                (3U)
-#define PWM_CTRL2_FORCE_SEL(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)
-#define PWM_CTRL2_FORCE_MASK                     (0x40U)
-#define PWM_CTRL2_FORCE_SHIFT                    (6U)
-#define PWM_CTRL2_FORCE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)
-#define PWM_CTRL2_FRCEN_MASK                     (0x80U)
-#define PWM_CTRL2_FRCEN_SHIFT                    (7U)
-#define PWM_CTRL2_FRCEN(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)
-#define PWM_CTRL2_INIT_SEL_MASK                  (0x300U)
-#define PWM_CTRL2_INIT_SEL_SHIFT                 (8U)
-#define PWM_CTRL2_INIT_SEL(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)
-#define PWM_CTRL2_PWMX_INIT_MASK                 (0x400U)
-#define PWM_CTRL2_PWMX_INIT_SHIFT                (10U)
-#define PWM_CTRL2_PWMX_INIT(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)
-#define PWM_CTRL2_PWM45_INIT_MASK                (0x800U)
-#define PWM_CTRL2_PWM45_INIT_SHIFT               (11U)
-#define PWM_CTRL2_PWM45_INIT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)
-#define PWM_CTRL2_PWM23_INIT_MASK                (0x1000U)
-#define PWM_CTRL2_PWM23_INIT_SHIFT               (12U)
-#define PWM_CTRL2_PWM23_INIT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)
-#define PWM_CTRL2_INDEP_MASK                     (0x2000U)
-#define PWM_CTRL2_INDEP_SHIFT                    (13U)
-#define PWM_CTRL2_INDEP(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)
-#define PWM_CTRL2_WAITEN_MASK                    (0x4000U)
-#define PWM_CTRL2_WAITEN_SHIFT                   (14U)
-#define PWM_CTRL2_WAITEN(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)
-#define PWM_CTRL2_DBGEN_MASK                     (0x8000U)
-#define PWM_CTRL2_DBGEN_SHIFT                    (15U)
-#define PWM_CTRL2_DBGEN(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)
+#define PWM_CTRL2_CLK_SEL_MASK     (0x3U)
+#define PWM_CTRL2_CLK_SEL_SHIFT    (0U)
+#define PWM_CTRL2_CLK_SEL(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)
+#define PWM_CTRL2_RELOAD_SEL_MASK  (0x4U)
+#define PWM_CTRL2_RELOAD_SEL_SHIFT (2U)
+#define PWM_CTRL2_RELOAD_SEL(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)
+#define PWM_CTRL2_FORCE_SEL_MASK   (0x38U)
+#define PWM_CTRL2_FORCE_SEL_SHIFT  (3U)
+#define PWM_CTRL2_FORCE_SEL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)
+#define PWM_CTRL2_FORCE_MASK       (0x40U)
+#define PWM_CTRL2_FORCE_SHIFT      (6U)
+#define PWM_CTRL2_FORCE(x)         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)
+#define PWM_CTRL2_FRCEN_MASK       (0x80U)
+#define PWM_CTRL2_FRCEN_SHIFT      (7U)
+#define PWM_CTRL2_FRCEN(x)         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)
+#define PWM_CTRL2_INIT_SEL_MASK    (0x300U)
+#define PWM_CTRL2_INIT_SEL_SHIFT   (8U)
+#define PWM_CTRL2_INIT_SEL(x)      (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)
+#define PWM_CTRL2_PWMX_INIT_MASK   (0x400U)
+#define PWM_CTRL2_PWMX_INIT_SHIFT  (10U)
+#define PWM_CTRL2_PWMX_INIT(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)
+#define PWM_CTRL2_PWM45_INIT_MASK  (0x800U)
+#define PWM_CTRL2_PWM45_INIT_SHIFT (11U)
+#define PWM_CTRL2_PWM45_INIT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)
+#define PWM_CTRL2_PWM23_INIT_MASK  (0x1000U)
+#define PWM_CTRL2_PWM23_INIT_SHIFT (12U)
+#define PWM_CTRL2_PWM23_INIT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)
+#define PWM_CTRL2_INDEP_MASK   (0x2000U)
+#define PWM_CTRL2_INDEP_SHIFT  (13U)
+#define PWM_CTRL2_INDEP(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)
+#define PWM_CTRL2_WAITEN_MASK  (0x4000U)
+#define PWM_CTRL2_WAITEN_SHIFT (14U)
+#define PWM_CTRL2_WAITEN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)
+#define PWM_CTRL2_DBGEN_MASK   (0x8000U)
+#define PWM_CTRL2_DBGEN_SHIFT  (15U)
+#define PWM_CTRL2_DBGEN(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)
 /*! @} */
 
 /* The count of PWM_CTRL2 */
-#define PWM_CTRL2_COUNT                          (4U)
+#define PWM_CTRL2_COUNT (4U)
 
 /*! @name CTRL - Control Register */
 /*! @{ */
-#define PWM_CTRL_DBLEN_MASK                      (0x1U)
-#define PWM_CTRL_DBLEN_SHIFT                     (0U)
-#define PWM_CTRL_DBLEN(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLEN_SHIFT)) & PWM_CTRL_DBLEN_MASK)
-#define PWM_CTRL_DBLX_MASK                       (0x2U)
-#define PWM_CTRL_DBLX_SHIFT                      (1U)
-#define PWM_CTRL_DBLX(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLX_SHIFT)) & PWM_CTRL_DBLX_MASK)
-#define PWM_CTRL_LDMOD_MASK                      (0x4U)
-#define PWM_CTRL_LDMOD_SHIFT                     (2U)
-#define PWM_CTRL_LDMOD(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDMOD_SHIFT)) & PWM_CTRL_LDMOD_MASK)
-#define PWM_CTRL_SPLIT_MASK                      (0x8U)
-#define PWM_CTRL_SPLIT_SHIFT                     (3U)
-#define PWM_CTRL_SPLIT(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_SPLIT_SHIFT)) & PWM_CTRL_SPLIT_MASK)
-#define PWM_CTRL_PRSC_MASK                       (0x70U)
-#define PWM_CTRL_PRSC_SHIFT                      (4U)
-#define PWM_CTRL_PRSC(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_PRSC_SHIFT)) & PWM_CTRL_PRSC_MASK)
-#define PWM_CTRL_COMPMODE_MASK                   (0x80U)
-#define PWM_CTRL_COMPMODE_SHIFT                  (7U)
-#define PWM_CTRL_COMPMODE(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_COMPMODE_SHIFT)) & PWM_CTRL_COMPMODE_MASK)
-#define PWM_CTRL_DT_MASK                         (0x300U)
-#define PWM_CTRL_DT_SHIFT                        (8U)
-#define PWM_CTRL_DT(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DT_SHIFT)) & PWM_CTRL_DT_MASK)
-#define PWM_CTRL_FULL_MASK                       (0x400U)
-#define PWM_CTRL_FULL_SHIFT                      (10U)
-#define PWM_CTRL_FULL(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_FULL_SHIFT)) & PWM_CTRL_FULL_MASK)
-#define PWM_CTRL_HALF_MASK                       (0x800U)
-#define PWM_CTRL_HALF_SHIFT                      (11U)
-#define PWM_CTRL_HALF(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_HALF_SHIFT)) & PWM_CTRL_HALF_MASK)
-#define PWM_CTRL_LDFQ_MASK                       (0xF000U)
-#define PWM_CTRL_LDFQ_SHIFT                      (12U)
-#define PWM_CTRL_LDFQ(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDFQ_SHIFT)) & PWM_CTRL_LDFQ_MASK)
+#define PWM_CTRL_DBLEN_MASK     (0x1U)
+#define PWM_CTRL_DBLEN_SHIFT    (0U)
+#define PWM_CTRL_DBLEN(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLEN_SHIFT)) & PWM_CTRL_DBLEN_MASK)
+#define PWM_CTRL_DBLX_MASK      (0x2U)
+#define PWM_CTRL_DBLX_SHIFT     (1U)
+#define PWM_CTRL_DBLX(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DBLX_SHIFT)) & PWM_CTRL_DBLX_MASK)
+#define PWM_CTRL_LDMOD_MASK     (0x4U)
+#define PWM_CTRL_LDMOD_SHIFT    (2U)
+#define PWM_CTRL_LDMOD(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDMOD_SHIFT)) & PWM_CTRL_LDMOD_MASK)
+#define PWM_CTRL_SPLIT_MASK     (0x8U)
+#define PWM_CTRL_SPLIT_SHIFT    (3U)
+#define PWM_CTRL_SPLIT(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_SPLIT_SHIFT)) & PWM_CTRL_SPLIT_MASK)
+#define PWM_CTRL_PRSC_MASK      (0x70U)
+#define PWM_CTRL_PRSC_SHIFT     (4U)
+#define PWM_CTRL_PRSC(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_PRSC_SHIFT)) & PWM_CTRL_PRSC_MASK)
+#define PWM_CTRL_COMPMODE_MASK  (0x80U)
+#define PWM_CTRL_COMPMODE_SHIFT (7U)
+#define PWM_CTRL_COMPMODE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_COMPMODE_SHIFT)) & PWM_CTRL_COMPMODE_MASK)
+#define PWM_CTRL_DT_MASK        (0x300U)
+#define PWM_CTRL_DT_SHIFT       (8U)
+#define PWM_CTRL_DT(x)          (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_DT_SHIFT)) & PWM_CTRL_DT_MASK)
+#define PWM_CTRL_FULL_MASK      (0x400U)
+#define PWM_CTRL_FULL_SHIFT     (10U)
+#define PWM_CTRL_FULL(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_FULL_SHIFT)) & PWM_CTRL_FULL_MASK)
+#define PWM_CTRL_HALF_MASK      (0x800U)
+#define PWM_CTRL_HALF_SHIFT     (11U)
+#define PWM_CTRL_HALF(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_HALF_SHIFT)) & PWM_CTRL_HALF_MASK)
+#define PWM_CTRL_LDFQ_MASK      (0xF000U)
+#define PWM_CTRL_LDFQ_SHIFT     (12U)
+#define PWM_CTRL_LDFQ(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CTRL_LDFQ_SHIFT)) & PWM_CTRL_LDFQ_MASK)
 /*! @} */
 
 /* The count of PWM_CTRL */
-#define PWM_CTRL_COUNT                           (4U)
+#define PWM_CTRL_COUNT (4U)
 
 /*! @name VAL0 - Value Register 0 */
 /*! @{ */
-#define PWM_VAL0_VAL0_MASK                       (0xFFFFU)
-#define PWM_VAL0_VAL0_SHIFT                      (0U)
-#define PWM_VAL0_VAL0(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL0_VAL0_SHIFT)) & PWM_VAL0_VAL0_MASK)
+#define PWM_VAL0_VAL0_MASK  (0xFFFFU)
+#define PWM_VAL0_VAL0_SHIFT (0U)
+#define PWM_VAL0_VAL0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL0_VAL0_SHIFT)) & PWM_VAL0_VAL0_MASK)
 /*! @} */
 
 /* The count of PWM_VAL0 */
-#define PWM_VAL0_COUNT                           (4U)
+#define PWM_VAL0_COUNT (4U)
 
 /*! @name FRACVAL1 - Fractional Value Register 1 */
 /*! @{ */
-#define PWM_FRACVAL1_FRACVAL1_MASK               (0xF800U)
-#define PWM_FRACVAL1_FRACVAL1_SHIFT              (11U)
-#define PWM_FRACVAL1_FRACVAL1(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL1_FRACVAL1_SHIFT)) & PWM_FRACVAL1_FRACVAL1_MASK)
+#define PWM_FRACVAL1_FRACVAL1_MASK  (0xF800U)
+#define PWM_FRACVAL1_FRACVAL1_SHIFT (11U)
+#define PWM_FRACVAL1_FRACVAL1(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL1_FRACVAL1_SHIFT)) & PWM_FRACVAL1_FRACVAL1_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL1 */
-#define PWM_FRACVAL1_COUNT                       (4U)
+#define PWM_FRACVAL1_COUNT (4U)
 
 /*! @name VAL1 - Value Register 1 */
 /*! @{ */
-#define PWM_VAL1_VAL1_MASK                       (0xFFFFU)
-#define PWM_VAL1_VAL1_SHIFT                      (0U)
-#define PWM_VAL1_VAL1(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL1_VAL1_SHIFT)) & PWM_VAL1_VAL1_MASK)
+#define PWM_VAL1_VAL1_MASK  (0xFFFFU)
+#define PWM_VAL1_VAL1_SHIFT (0U)
+#define PWM_VAL1_VAL1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL1_VAL1_SHIFT)) & PWM_VAL1_VAL1_MASK)
 /*! @} */
 
 /* The count of PWM_VAL1 */
-#define PWM_VAL1_COUNT                           (4U)
+#define PWM_VAL1_COUNT (4U)
 
 /*! @name FRACVAL2 - Fractional Value Register 2 */
 /*! @{ */
-#define PWM_FRACVAL2_FRACVAL2_MASK               (0xF800U)
-#define PWM_FRACVAL2_FRACVAL2_SHIFT              (11U)
-#define PWM_FRACVAL2_FRACVAL2(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL2_FRACVAL2_SHIFT)) & PWM_FRACVAL2_FRACVAL2_MASK)
+#define PWM_FRACVAL2_FRACVAL2_MASK  (0xF800U)
+#define PWM_FRACVAL2_FRACVAL2_SHIFT (11U)
+#define PWM_FRACVAL2_FRACVAL2(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL2_FRACVAL2_SHIFT)) & PWM_FRACVAL2_FRACVAL2_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL2 */
-#define PWM_FRACVAL2_COUNT                       (4U)
+#define PWM_FRACVAL2_COUNT (4U)
 
 /*! @name VAL2 - Value Register 2 */
 /*! @{ */
-#define PWM_VAL2_VAL2_MASK                       (0xFFFFU)
-#define PWM_VAL2_VAL2_SHIFT                      (0U)
-#define PWM_VAL2_VAL2(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL2_VAL2_SHIFT)) & PWM_VAL2_VAL2_MASK)
+#define PWM_VAL2_VAL2_MASK  (0xFFFFU)
+#define PWM_VAL2_VAL2_SHIFT (0U)
+#define PWM_VAL2_VAL2(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL2_VAL2_SHIFT)) & PWM_VAL2_VAL2_MASK)
 /*! @} */
 
 /* The count of PWM_VAL2 */
-#define PWM_VAL2_COUNT                           (4U)
+#define PWM_VAL2_COUNT (4U)
 
 /*! @name FRACVAL3 - Fractional Value Register 3 */
 /*! @{ */
-#define PWM_FRACVAL3_FRACVAL3_MASK               (0xF800U)
-#define PWM_FRACVAL3_FRACVAL3_SHIFT              (11U)
-#define PWM_FRACVAL3_FRACVAL3(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL3_FRACVAL3_SHIFT)) & PWM_FRACVAL3_FRACVAL3_MASK)
+#define PWM_FRACVAL3_FRACVAL3_MASK  (0xF800U)
+#define PWM_FRACVAL3_FRACVAL3_SHIFT (11U)
+#define PWM_FRACVAL3_FRACVAL3(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL3_FRACVAL3_SHIFT)) & PWM_FRACVAL3_FRACVAL3_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL3 */
-#define PWM_FRACVAL3_COUNT                       (4U)
+#define PWM_FRACVAL3_COUNT (4U)
 
 /*! @name VAL3 - Value Register 3 */
 /*! @{ */
-#define PWM_VAL3_VAL3_MASK                       (0xFFFFU)
-#define PWM_VAL3_VAL3_SHIFT                      (0U)
-#define PWM_VAL3_VAL3(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL3_VAL3_SHIFT)) & PWM_VAL3_VAL3_MASK)
+#define PWM_VAL3_VAL3_MASK  (0xFFFFU)
+#define PWM_VAL3_VAL3_SHIFT (0U)
+#define PWM_VAL3_VAL3(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL3_VAL3_SHIFT)) & PWM_VAL3_VAL3_MASK)
 /*! @} */
 
 /* The count of PWM_VAL3 */
-#define PWM_VAL3_COUNT                           (4U)
+#define PWM_VAL3_COUNT (4U)
 
 /*! @name FRACVAL4 - Fractional Value Register 4 */
 /*! @{ */
-#define PWM_FRACVAL4_FRACVAL4_MASK               (0xF800U)
-#define PWM_FRACVAL4_FRACVAL4_SHIFT              (11U)
-#define PWM_FRACVAL4_FRACVAL4(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL4_FRACVAL4_SHIFT)) & PWM_FRACVAL4_FRACVAL4_MASK)
+#define PWM_FRACVAL4_FRACVAL4_MASK  (0xF800U)
+#define PWM_FRACVAL4_FRACVAL4_SHIFT (11U)
+#define PWM_FRACVAL4_FRACVAL4(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL4_FRACVAL4_SHIFT)) & PWM_FRACVAL4_FRACVAL4_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL4 */
-#define PWM_FRACVAL4_COUNT                       (4U)
+#define PWM_FRACVAL4_COUNT (4U)
 
 /*! @name VAL4 - Value Register 4 */
 /*! @{ */
-#define PWM_VAL4_VAL4_MASK                       (0xFFFFU)
-#define PWM_VAL4_VAL4_SHIFT                      (0U)
-#define PWM_VAL4_VAL4(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL4_VAL4_SHIFT)) & PWM_VAL4_VAL4_MASK)
+#define PWM_VAL4_VAL4_MASK  (0xFFFFU)
+#define PWM_VAL4_VAL4_SHIFT (0U)
+#define PWM_VAL4_VAL4(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL4_VAL4_SHIFT)) & PWM_VAL4_VAL4_MASK)
 /*! @} */
 
 /* The count of PWM_VAL4 */
-#define PWM_VAL4_COUNT                           (4U)
+#define PWM_VAL4_COUNT (4U)
 
 /*! @name FRACVAL5 - Fractional Value Register 5 */
 /*! @{ */
-#define PWM_FRACVAL5_FRACVAL5_MASK               (0xF800U)
-#define PWM_FRACVAL5_FRACVAL5_SHIFT              (11U)
-#define PWM_FRACVAL5_FRACVAL5(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL5_FRACVAL5_SHIFT)) & PWM_FRACVAL5_FRACVAL5_MASK)
+#define PWM_FRACVAL5_FRACVAL5_MASK  (0xF800U)
+#define PWM_FRACVAL5_FRACVAL5_SHIFT (11U)
+#define PWM_FRACVAL5_FRACVAL5(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRACVAL5_FRACVAL5_SHIFT)) & PWM_FRACVAL5_FRACVAL5_MASK)
 /*! @} */
 
 /* The count of PWM_FRACVAL5 */
-#define PWM_FRACVAL5_COUNT                       (4U)
+#define PWM_FRACVAL5_COUNT (4U)
 
 /*! @name VAL5 - Value Register 5 */
 /*! @{ */
-#define PWM_VAL5_VAL5_MASK                       (0xFFFFU)
-#define PWM_VAL5_VAL5_SHIFT                      (0U)
-#define PWM_VAL5_VAL5(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_VAL5_VAL5_SHIFT)) & PWM_VAL5_VAL5_MASK)
+#define PWM_VAL5_VAL5_MASK  (0xFFFFU)
+#define PWM_VAL5_VAL5_SHIFT (0U)
+#define PWM_VAL5_VAL5(x)    (((uint16_t)(((uint16_t)(x)) << PWM_VAL5_VAL5_SHIFT)) & PWM_VAL5_VAL5_MASK)
 /*! @} */
 
 /* The count of PWM_VAL5 */
-#define PWM_VAL5_COUNT                           (4U)
+#define PWM_VAL5_COUNT (4U)
 
 /*! @name FRCTRL - Fractional Control Register */
 /*! @{ */
-#define PWM_FRCTRL_FRAC1_EN_MASK                 (0x2U)
-#define PWM_FRCTRL_FRAC1_EN_SHIFT                (1U)
-#define PWM_FRCTRL_FRAC1_EN(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC1_EN_SHIFT)) & PWM_FRCTRL_FRAC1_EN_MASK)
-#define PWM_FRCTRL_FRAC23_EN_MASK                (0x4U)
-#define PWM_FRCTRL_FRAC23_EN_SHIFT               (2U)
-#define PWM_FRCTRL_FRAC23_EN(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC23_EN_SHIFT)) & PWM_FRCTRL_FRAC23_EN_MASK)
-#define PWM_FRCTRL_FRAC45_EN_MASK                (0x10U)
-#define PWM_FRCTRL_FRAC45_EN_SHIFT               (4U)
-#define PWM_FRCTRL_FRAC45_EN(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC45_EN_SHIFT)) & PWM_FRCTRL_FRAC45_EN_MASK)
-#define PWM_FRCTRL_FRAC_PU_MASK                  (0x100U)
-#define PWM_FRCTRL_FRAC_PU_SHIFT                 (8U)
-#define PWM_FRCTRL_FRAC_PU(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC_PU_SHIFT)) & PWM_FRCTRL_FRAC_PU_MASK)
-#define PWM_FRCTRL_TEST_MASK                     (0x8000U)
-#define PWM_FRCTRL_TEST_SHIFT                    (15U)
-#define PWM_FRCTRL_TEST(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_TEST_SHIFT)) & PWM_FRCTRL_TEST_MASK)
+#define PWM_FRCTRL_FRAC1_EN_MASK   (0x2U)
+#define PWM_FRCTRL_FRAC1_EN_SHIFT  (1U)
+#define PWM_FRCTRL_FRAC1_EN(x)     (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC1_EN_SHIFT)) & PWM_FRCTRL_FRAC1_EN_MASK)
+#define PWM_FRCTRL_FRAC23_EN_MASK  (0x4U)
+#define PWM_FRCTRL_FRAC23_EN_SHIFT (2U)
+#define PWM_FRCTRL_FRAC23_EN(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC23_EN_SHIFT)) & PWM_FRCTRL_FRAC23_EN_MASK)
+#define PWM_FRCTRL_FRAC45_EN_MASK  (0x10U)
+#define PWM_FRCTRL_FRAC45_EN_SHIFT (4U)
+#define PWM_FRCTRL_FRAC45_EN(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC45_EN_SHIFT)) & PWM_FRCTRL_FRAC45_EN_MASK)
+#define PWM_FRCTRL_FRAC_PU_MASK  (0x100U)
+#define PWM_FRCTRL_FRAC_PU_SHIFT (8U)
+#define PWM_FRCTRL_FRAC_PU(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_FRAC_PU_SHIFT)) & PWM_FRCTRL_FRAC_PU_MASK)
+#define PWM_FRCTRL_TEST_MASK     (0x8000U)
+#define PWM_FRCTRL_TEST_SHIFT    (15U)
+#define PWM_FRCTRL_TEST(x)       (((uint16_t)(((uint16_t)(x)) << PWM_FRCTRL_TEST_SHIFT)) & PWM_FRCTRL_TEST_MASK)
 /*! @} */
 
 /* The count of PWM_FRCTRL */
-#define PWM_FRCTRL_COUNT                         (4U)
+#define PWM_FRCTRL_COUNT (4U)
 
 /*! @name OCTRL - Output Control Register */
 /*! @{ */
-#define PWM_OCTRL_PWMXFS_MASK                    (0x3U)
-#define PWM_OCTRL_PWMXFS_SHIFT                   (0U)
-#define PWM_OCTRL_PWMXFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMXFS_SHIFT)) & PWM_OCTRL_PWMXFS_MASK)
-#define PWM_OCTRL_PWMBFS_MASK                    (0xCU)
-#define PWM_OCTRL_PWMBFS_SHIFT                   (2U)
-#define PWM_OCTRL_PWMBFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMBFS_SHIFT)) & PWM_OCTRL_PWMBFS_MASK)
-#define PWM_OCTRL_PWMAFS_MASK                    (0x30U)
-#define PWM_OCTRL_PWMAFS_SHIFT                   (4U)
-#define PWM_OCTRL_PWMAFS(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMAFS_SHIFT)) & PWM_OCTRL_PWMAFS_MASK)
-#define PWM_OCTRL_POLX_MASK                      (0x100U)
-#define PWM_OCTRL_POLX_SHIFT                     (8U)
-#define PWM_OCTRL_POLX(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLX_SHIFT)) & PWM_OCTRL_POLX_MASK)
-#define PWM_OCTRL_POLB_MASK                      (0x200U)
-#define PWM_OCTRL_POLB_SHIFT                     (9U)
-#define PWM_OCTRL_POLB(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLB_SHIFT)) & PWM_OCTRL_POLB_MASK)
-#define PWM_OCTRL_POLA_MASK                      (0x400U)
-#define PWM_OCTRL_POLA_SHIFT                     (10U)
-#define PWM_OCTRL_POLA(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLA_SHIFT)) & PWM_OCTRL_POLA_MASK)
-#define PWM_OCTRL_PWMX_IN_MASK                   (0x2000U)
-#define PWM_OCTRL_PWMX_IN_SHIFT                  (13U)
-#define PWM_OCTRL_PWMX_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMX_IN_SHIFT)) & PWM_OCTRL_PWMX_IN_MASK)
-#define PWM_OCTRL_PWMB_IN_MASK                   (0x4000U)
-#define PWM_OCTRL_PWMB_IN_SHIFT                  (14U)
-#define PWM_OCTRL_PWMB_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMB_IN_SHIFT)) & PWM_OCTRL_PWMB_IN_MASK)
-#define PWM_OCTRL_PWMA_IN_MASK                   (0x8000U)
-#define PWM_OCTRL_PWMA_IN_SHIFT                  (15U)
-#define PWM_OCTRL_PWMA_IN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMA_IN_SHIFT)) & PWM_OCTRL_PWMA_IN_MASK)
+#define PWM_OCTRL_PWMXFS_MASK   (0x3U)
+#define PWM_OCTRL_PWMXFS_SHIFT  (0U)
+#define PWM_OCTRL_PWMXFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMXFS_SHIFT)) & PWM_OCTRL_PWMXFS_MASK)
+#define PWM_OCTRL_PWMBFS_MASK   (0xCU)
+#define PWM_OCTRL_PWMBFS_SHIFT  (2U)
+#define PWM_OCTRL_PWMBFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMBFS_SHIFT)) & PWM_OCTRL_PWMBFS_MASK)
+#define PWM_OCTRL_PWMAFS_MASK   (0x30U)
+#define PWM_OCTRL_PWMAFS_SHIFT  (4U)
+#define PWM_OCTRL_PWMAFS(x)     (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMAFS_SHIFT)) & PWM_OCTRL_PWMAFS_MASK)
+#define PWM_OCTRL_POLX_MASK     (0x100U)
+#define PWM_OCTRL_POLX_SHIFT    (8U)
+#define PWM_OCTRL_POLX(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLX_SHIFT)) & PWM_OCTRL_POLX_MASK)
+#define PWM_OCTRL_POLB_MASK     (0x200U)
+#define PWM_OCTRL_POLB_SHIFT    (9U)
+#define PWM_OCTRL_POLB(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLB_SHIFT)) & PWM_OCTRL_POLB_MASK)
+#define PWM_OCTRL_POLA_MASK     (0x400U)
+#define PWM_OCTRL_POLA_SHIFT    (10U)
+#define PWM_OCTRL_POLA(x)       (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_POLA_SHIFT)) & PWM_OCTRL_POLA_MASK)
+#define PWM_OCTRL_PWMX_IN_MASK  (0x2000U)
+#define PWM_OCTRL_PWMX_IN_SHIFT (13U)
+#define PWM_OCTRL_PWMX_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMX_IN_SHIFT)) & PWM_OCTRL_PWMX_IN_MASK)
+#define PWM_OCTRL_PWMB_IN_MASK  (0x4000U)
+#define PWM_OCTRL_PWMB_IN_SHIFT (14U)
+#define PWM_OCTRL_PWMB_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMB_IN_SHIFT)) & PWM_OCTRL_PWMB_IN_MASK)
+#define PWM_OCTRL_PWMA_IN_MASK  (0x8000U)
+#define PWM_OCTRL_PWMA_IN_SHIFT (15U)
+#define PWM_OCTRL_PWMA_IN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OCTRL_PWMA_IN_SHIFT)) & PWM_OCTRL_PWMA_IN_MASK)
 /*! @} */
 
 /* The count of PWM_OCTRL */
-#define PWM_OCTRL_COUNT                          (4U)
+#define PWM_OCTRL_COUNT (4U)
 
 /*! @name STS - Status Register */
 /*! @{ */
-#define PWM_STS_CMPF_MASK                        (0x3FU)
-#define PWM_STS_CMPF_SHIFT                       (0U)
-#define PWM_STS_CMPF(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CMPF_SHIFT)) & PWM_STS_CMPF_MASK)
-#define PWM_STS_CFX0_MASK                        (0x40U)
-#define PWM_STS_CFX0_SHIFT                       (6U)
-#define PWM_STS_CFX0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX0_SHIFT)) & PWM_STS_CFX0_MASK)
-#define PWM_STS_CFX1_MASK                        (0x80U)
-#define PWM_STS_CFX1_SHIFT                       (7U)
-#define PWM_STS_CFX1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX1_SHIFT)) & PWM_STS_CFX1_MASK)
-#define PWM_STS_CFB0_MASK                        (0x100U)
-#define PWM_STS_CFB0_SHIFT                       (8U)
-#define PWM_STS_CFB0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB0_SHIFT)) & PWM_STS_CFB0_MASK)
-#define PWM_STS_CFB1_MASK                        (0x200U)
-#define PWM_STS_CFB1_SHIFT                       (9U)
-#define PWM_STS_CFB1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB1_SHIFT)) & PWM_STS_CFB1_MASK)
-#define PWM_STS_CFA0_MASK                        (0x400U)
-#define PWM_STS_CFA0_SHIFT                       (10U)
-#define PWM_STS_CFA0(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA0_SHIFT)) & PWM_STS_CFA0_MASK)
-#define PWM_STS_CFA1_MASK                        (0x800U)
-#define PWM_STS_CFA1_SHIFT                       (11U)
-#define PWM_STS_CFA1(x)                          (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA1_SHIFT)) & PWM_STS_CFA1_MASK)
-#define PWM_STS_RF_MASK                          (0x1000U)
-#define PWM_STS_RF_SHIFT                         (12U)
-#define PWM_STS_RF(x)                            (((uint16_t)(((uint16_t)(x)) << PWM_STS_RF_SHIFT)) & PWM_STS_RF_MASK)
-#define PWM_STS_REF_MASK                         (0x2000U)
-#define PWM_STS_REF_SHIFT                        (13U)
-#define PWM_STS_REF(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_STS_REF_SHIFT)) & PWM_STS_REF_MASK)
-#define PWM_STS_RUF_MASK                         (0x4000U)
-#define PWM_STS_RUF_SHIFT                        (14U)
-#define PWM_STS_RUF(x)                           (((uint16_t)(((uint16_t)(x)) << PWM_STS_RUF_SHIFT)) & PWM_STS_RUF_MASK)
+#define PWM_STS_CMPF_MASK  (0x3FU)
+#define PWM_STS_CMPF_SHIFT (0U)
+#define PWM_STS_CMPF(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CMPF_SHIFT)) & PWM_STS_CMPF_MASK)
+#define PWM_STS_CFX0_MASK  (0x40U)
+#define PWM_STS_CFX0_SHIFT (6U)
+#define PWM_STS_CFX0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX0_SHIFT)) & PWM_STS_CFX0_MASK)
+#define PWM_STS_CFX1_MASK  (0x80U)
+#define PWM_STS_CFX1_SHIFT (7U)
+#define PWM_STS_CFX1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFX1_SHIFT)) & PWM_STS_CFX1_MASK)
+#define PWM_STS_CFB0_MASK  (0x100U)
+#define PWM_STS_CFB0_SHIFT (8U)
+#define PWM_STS_CFB0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB0_SHIFT)) & PWM_STS_CFB0_MASK)
+#define PWM_STS_CFB1_MASK  (0x200U)
+#define PWM_STS_CFB1_SHIFT (9U)
+#define PWM_STS_CFB1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFB1_SHIFT)) & PWM_STS_CFB1_MASK)
+#define PWM_STS_CFA0_MASK  (0x400U)
+#define PWM_STS_CFA0_SHIFT (10U)
+#define PWM_STS_CFA0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA0_SHIFT)) & PWM_STS_CFA0_MASK)
+#define PWM_STS_CFA1_MASK  (0x800U)
+#define PWM_STS_CFA1_SHIFT (11U)
+#define PWM_STS_CFA1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_STS_CFA1_SHIFT)) & PWM_STS_CFA1_MASK)
+#define PWM_STS_RF_MASK    (0x1000U)
+#define PWM_STS_RF_SHIFT   (12U)
+#define PWM_STS_RF(x)      (((uint16_t)(((uint16_t)(x)) << PWM_STS_RF_SHIFT)) & PWM_STS_RF_MASK)
+#define PWM_STS_REF_MASK   (0x2000U)
+#define PWM_STS_REF_SHIFT  (13U)
+#define PWM_STS_REF(x)     (((uint16_t)(((uint16_t)(x)) << PWM_STS_REF_SHIFT)) & PWM_STS_REF_MASK)
+#define PWM_STS_RUF_MASK   (0x4000U)
+#define PWM_STS_RUF_SHIFT  (14U)
+#define PWM_STS_RUF(x)     (((uint16_t)(((uint16_t)(x)) << PWM_STS_RUF_SHIFT)) & PWM_STS_RUF_MASK)
 /*! @} */
 
 /* The count of PWM_STS */
-#define PWM_STS_COUNT                            (4U)
+#define PWM_STS_COUNT (4U)
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define PWM_INTEN_CMPIE_MASK                     (0x3FU)
-#define PWM_INTEN_CMPIE_SHIFT                    (0U)
-#define PWM_INTEN_CMPIE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CMPIE_SHIFT)) & PWM_INTEN_CMPIE_MASK)
-#define PWM_INTEN_CX0IE_MASK                     (0x40U)
-#define PWM_INTEN_CX0IE_SHIFT                    (6U)
-#define PWM_INTEN_CX0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX0IE_SHIFT)) & PWM_INTEN_CX0IE_MASK)
-#define PWM_INTEN_CX1IE_MASK                     (0x80U)
-#define PWM_INTEN_CX1IE_SHIFT                    (7U)
-#define PWM_INTEN_CX1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX1IE_SHIFT)) & PWM_INTEN_CX1IE_MASK)
-#define PWM_INTEN_CB0IE_MASK                     (0x100U)
-#define PWM_INTEN_CB0IE_SHIFT                    (8U)
-#define PWM_INTEN_CB0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB0IE_SHIFT)) & PWM_INTEN_CB0IE_MASK)
-#define PWM_INTEN_CB1IE_MASK                     (0x200U)
-#define PWM_INTEN_CB1IE_SHIFT                    (9U)
-#define PWM_INTEN_CB1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB1IE_SHIFT)) & PWM_INTEN_CB1IE_MASK)
-#define PWM_INTEN_CA0IE_MASK                     (0x400U)
-#define PWM_INTEN_CA0IE_SHIFT                    (10U)
-#define PWM_INTEN_CA0IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA0IE_SHIFT)) & PWM_INTEN_CA0IE_MASK)
-#define PWM_INTEN_CA1IE_MASK                     (0x800U)
-#define PWM_INTEN_CA1IE_SHIFT                    (11U)
-#define PWM_INTEN_CA1IE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA1IE_SHIFT)) & PWM_INTEN_CA1IE_MASK)
-#define PWM_INTEN_RIE_MASK                       (0x1000U)
-#define PWM_INTEN_RIE_SHIFT                      (12U)
-#define PWM_INTEN_RIE(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_RIE_SHIFT)) & PWM_INTEN_RIE_MASK)
-#define PWM_INTEN_REIE_MASK                      (0x2000U)
-#define PWM_INTEN_REIE_SHIFT                     (13U)
-#define PWM_INTEN_REIE(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_REIE_SHIFT)) & PWM_INTEN_REIE_MASK)
+#define PWM_INTEN_CMPIE_MASK  (0x3FU)
+#define PWM_INTEN_CMPIE_SHIFT (0U)
+#define PWM_INTEN_CMPIE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CMPIE_SHIFT)) & PWM_INTEN_CMPIE_MASK)
+#define PWM_INTEN_CX0IE_MASK  (0x40U)
+#define PWM_INTEN_CX0IE_SHIFT (6U)
+#define PWM_INTEN_CX0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX0IE_SHIFT)) & PWM_INTEN_CX0IE_MASK)
+#define PWM_INTEN_CX1IE_MASK  (0x80U)
+#define PWM_INTEN_CX1IE_SHIFT (7U)
+#define PWM_INTEN_CX1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CX1IE_SHIFT)) & PWM_INTEN_CX1IE_MASK)
+#define PWM_INTEN_CB0IE_MASK  (0x100U)
+#define PWM_INTEN_CB0IE_SHIFT (8U)
+#define PWM_INTEN_CB0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB0IE_SHIFT)) & PWM_INTEN_CB0IE_MASK)
+#define PWM_INTEN_CB1IE_MASK  (0x200U)
+#define PWM_INTEN_CB1IE_SHIFT (9U)
+#define PWM_INTEN_CB1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CB1IE_SHIFT)) & PWM_INTEN_CB1IE_MASK)
+#define PWM_INTEN_CA0IE_MASK  (0x400U)
+#define PWM_INTEN_CA0IE_SHIFT (10U)
+#define PWM_INTEN_CA0IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA0IE_SHIFT)) & PWM_INTEN_CA0IE_MASK)
+#define PWM_INTEN_CA1IE_MASK  (0x800U)
+#define PWM_INTEN_CA1IE_SHIFT (11U)
+#define PWM_INTEN_CA1IE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_CA1IE_SHIFT)) & PWM_INTEN_CA1IE_MASK)
+#define PWM_INTEN_RIE_MASK    (0x1000U)
+#define PWM_INTEN_RIE_SHIFT   (12U)
+#define PWM_INTEN_RIE(x)      (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_RIE_SHIFT)) & PWM_INTEN_RIE_MASK)
+#define PWM_INTEN_REIE_MASK   (0x2000U)
+#define PWM_INTEN_REIE_SHIFT  (13U)
+#define PWM_INTEN_REIE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_INTEN_REIE_SHIFT)) & PWM_INTEN_REIE_MASK)
 /*! @} */
 
 /* The count of PWM_INTEN */
-#define PWM_INTEN_COUNT                          (4U)
+#define PWM_INTEN_COUNT (4U)
 
 /*! @name DMAEN - DMA Enable Register */
 /*! @{ */
-#define PWM_DMAEN_CX0DE_MASK                     (0x1U)
-#define PWM_DMAEN_CX0DE_SHIFT                    (0U)
-#define PWM_DMAEN_CX0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX0DE_SHIFT)) & PWM_DMAEN_CX0DE_MASK)
-#define PWM_DMAEN_CX1DE_MASK                     (0x2U)
-#define PWM_DMAEN_CX1DE_SHIFT                    (1U)
-#define PWM_DMAEN_CX1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX1DE_SHIFT)) & PWM_DMAEN_CX1DE_MASK)
-#define PWM_DMAEN_CB0DE_MASK                     (0x4U)
-#define PWM_DMAEN_CB0DE_SHIFT                    (2U)
-#define PWM_DMAEN_CB0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB0DE_SHIFT)) & PWM_DMAEN_CB0DE_MASK)
-#define PWM_DMAEN_CB1DE_MASK                     (0x8U)
-#define PWM_DMAEN_CB1DE_SHIFT                    (3U)
-#define PWM_DMAEN_CB1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB1DE_SHIFT)) & PWM_DMAEN_CB1DE_MASK)
-#define PWM_DMAEN_CA0DE_MASK                     (0x10U)
-#define PWM_DMAEN_CA0DE_SHIFT                    (4U)
-#define PWM_DMAEN_CA0DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA0DE_SHIFT)) & PWM_DMAEN_CA0DE_MASK)
-#define PWM_DMAEN_CA1DE_MASK                     (0x20U)
-#define PWM_DMAEN_CA1DE_SHIFT                    (5U)
-#define PWM_DMAEN_CA1DE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA1DE_SHIFT)) & PWM_DMAEN_CA1DE_MASK)
-#define PWM_DMAEN_CAPTDE_MASK                    (0xC0U)
-#define PWM_DMAEN_CAPTDE_SHIFT                   (6U)
-#define PWM_DMAEN_CAPTDE(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CAPTDE_SHIFT)) & PWM_DMAEN_CAPTDE_MASK)
-#define PWM_DMAEN_FAND_MASK                      (0x100U)
-#define PWM_DMAEN_FAND_SHIFT                     (8U)
-#define PWM_DMAEN_FAND(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_FAND_SHIFT)) & PWM_DMAEN_FAND_MASK)
-#define PWM_DMAEN_VALDE_MASK                     (0x200U)
-#define PWM_DMAEN_VALDE_SHIFT                    (9U)
-#define PWM_DMAEN_VALDE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_VALDE_SHIFT)) & PWM_DMAEN_VALDE_MASK)
+#define PWM_DMAEN_CX0DE_MASK   (0x1U)
+#define PWM_DMAEN_CX0DE_SHIFT  (0U)
+#define PWM_DMAEN_CX0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX0DE_SHIFT)) & PWM_DMAEN_CX0DE_MASK)
+#define PWM_DMAEN_CX1DE_MASK   (0x2U)
+#define PWM_DMAEN_CX1DE_SHIFT  (1U)
+#define PWM_DMAEN_CX1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CX1DE_SHIFT)) & PWM_DMAEN_CX1DE_MASK)
+#define PWM_DMAEN_CB0DE_MASK   (0x4U)
+#define PWM_DMAEN_CB0DE_SHIFT  (2U)
+#define PWM_DMAEN_CB0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB0DE_SHIFT)) & PWM_DMAEN_CB0DE_MASK)
+#define PWM_DMAEN_CB1DE_MASK   (0x8U)
+#define PWM_DMAEN_CB1DE_SHIFT  (3U)
+#define PWM_DMAEN_CB1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CB1DE_SHIFT)) & PWM_DMAEN_CB1DE_MASK)
+#define PWM_DMAEN_CA0DE_MASK   (0x10U)
+#define PWM_DMAEN_CA0DE_SHIFT  (4U)
+#define PWM_DMAEN_CA0DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA0DE_SHIFT)) & PWM_DMAEN_CA0DE_MASK)
+#define PWM_DMAEN_CA1DE_MASK   (0x20U)
+#define PWM_DMAEN_CA1DE_SHIFT  (5U)
+#define PWM_DMAEN_CA1DE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CA1DE_SHIFT)) & PWM_DMAEN_CA1DE_MASK)
+#define PWM_DMAEN_CAPTDE_MASK  (0xC0U)
+#define PWM_DMAEN_CAPTDE_SHIFT (6U)
+#define PWM_DMAEN_CAPTDE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_CAPTDE_SHIFT)) & PWM_DMAEN_CAPTDE_MASK)
+#define PWM_DMAEN_FAND_MASK    (0x100U)
+#define PWM_DMAEN_FAND_SHIFT   (8U)
+#define PWM_DMAEN_FAND(x)      (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_FAND_SHIFT)) & PWM_DMAEN_FAND_MASK)
+#define PWM_DMAEN_VALDE_MASK   (0x200U)
+#define PWM_DMAEN_VALDE_SHIFT  (9U)
+#define PWM_DMAEN_VALDE(x)     (((uint16_t)(((uint16_t)(x)) << PWM_DMAEN_VALDE_SHIFT)) & PWM_DMAEN_VALDE_MASK)
 /*! @} */
 
 /* The count of PWM_DMAEN */
-#define PWM_DMAEN_COUNT                          (4U)
+#define PWM_DMAEN_COUNT (4U)
 
 /*! @name TCTRL - Output Trigger Control Register */
 /*! @{ */
-#define PWM_TCTRL_OUT_TRIG_EN_MASK               (0x3FU)
-#define PWM_TCTRL_OUT_TRIG_EN_SHIFT              (0U)
-#define PWM_TCTRL_OUT_TRIG_EN(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_OUT_TRIG_EN_SHIFT)) & PWM_TCTRL_OUT_TRIG_EN_MASK)
-#define PWM_TCTRL_TRGFRQ_MASK                    (0x1000U)
-#define PWM_TCTRL_TRGFRQ_SHIFT                   (12U)
-#define PWM_TCTRL_TRGFRQ(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_TRGFRQ_SHIFT)) & PWM_TCTRL_TRGFRQ_MASK)
-#define PWM_TCTRL_PWBOT1_MASK                    (0x4000U)
-#define PWM_TCTRL_PWBOT1_SHIFT                   (14U)
-#define PWM_TCTRL_PWBOT1(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWBOT1_SHIFT)) & PWM_TCTRL_PWBOT1_MASK)
-#define PWM_TCTRL_PWAOT0_MASK                    (0x8000U)
-#define PWM_TCTRL_PWAOT0_SHIFT                   (15U)
-#define PWM_TCTRL_PWAOT0(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWAOT0_SHIFT)) & PWM_TCTRL_PWAOT0_MASK)
+#define PWM_TCTRL_OUT_TRIG_EN_MASK  (0x3FU)
+#define PWM_TCTRL_OUT_TRIG_EN_SHIFT (0U)
+#define PWM_TCTRL_OUT_TRIG_EN(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_OUT_TRIG_EN_SHIFT)) & PWM_TCTRL_OUT_TRIG_EN_MASK)
+#define PWM_TCTRL_TRGFRQ_MASK  (0x1000U)
+#define PWM_TCTRL_TRGFRQ_SHIFT (12U)
+#define PWM_TCTRL_TRGFRQ(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_TRGFRQ_SHIFT)) & PWM_TCTRL_TRGFRQ_MASK)
+#define PWM_TCTRL_PWBOT1_MASK  (0x4000U)
+#define PWM_TCTRL_PWBOT1_SHIFT (14U)
+#define PWM_TCTRL_PWBOT1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWBOT1_SHIFT)) & PWM_TCTRL_PWBOT1_MASK)
+#define PWM_TCTRL_PWAOT0_MASK  (0x8000U)
+#define PWM_TCTRL_PWAOT0_SHIFT (15U)
+#define PWM_TCTRL_PWAOT0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_TCTRL_PWAOT0_SHIFT)) & PWM_TCTRL_PWAOT0_MASK)
 /*! @} */
 
 /* The count of PWM_TCTRL */
-#define PWM_TCTRL_COUNT                          (4U)
+#define PWM_TCTRL_COUNT (4U)
 
 /*! @name DISMAP - Fault Disable Mapping Register 0..Fault Disable Mapping Register 1 */
 /*! @{ */
-#define PWM_DISMAP_DIS0A_MASK                    (0xFU)
-#define PWM_DISMAP_DIS0A_SHIFT                   (0U)
-#define PWM_DISMAP_DIS0A(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0A_SHIFT)) & PWM_DISMAP_DIS0A_MASK)
-#define PWM_DISMAP_DIS1A_MASK                    (0xFU)
-#define PWM_DISMAP_DIS1A_SHIFT                   (0U)
-#define PWM_DISMAP_DIS1A(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1A_SHIFT)) & PWM_DISMAP_DIS1A_MASK)
-#define PWM_DISMAP_DIS0B_MASK                    (0xF0U)
-#define PWM_DISMAP_DIS0B_SHIFT                   (4U)
-#define PWM_DISMAP_DIS0B(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0B_SHIFT)) & PWM_DISMAP_DIS0B_MASK)
-#define PWM_DISMAP_DIS1B_MASK                    (0xF0U)
-#define PWM_DISMAP_DIS1B_SHIFT                   (4U)
-#define PWM_DISMAP_DIS1B(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1B_SHIFT)) & PWM_DISMAP_DIS1B_MASK)
-#define PWM_DISMAP_DIS0X_MASK                    (0xF00U)
-#define PWM_DISMAP_DIS0X_SHIFT                   (8U)
-#define PWM_DISMAP_DIS0X(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0X_SHIFT)) & PWM_DISMAP_DIS0X_MASK)
-#define PWM_DISMAP_DIS1X_MASK                    (0xF00U)
-#define PWM_DISMAP_DIS1X_SHIFT                   (8U)
-#define PWM_DISMAP_DIS1X(x)                      (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1X_SHIFT)) & PWM_DISMAP_DIS1X_MASK)
+#define PWM_DISMAP_DIS0A_MASK  (0xFU)
+#define PWM_DISMAP_DIS0A_SHIFT (0U)
+#define PWM_DISMAP_DIS0A(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0A_SHIFT)) & PWM_DISMAP_DIS0A_MASK)
+#define PWM_DISMAP_DIS1A_MASK  (0xFU)
+#define PWM_DISMAP_DIS1A_SHIFT (0U)
+#define PWM_DISMAP_DIS1A(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1A_SHIFT)) & PWM_DISMAP_DIS1A_MASK)
+#define PWM_DISMAP_DIS0B_MASK  (0xF0U)
+#define PWM_DISMAP_DIS0B_SHIFT (4U)
+#define PWM_DISMAP_DIS0B(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0B_SHIFT)) & PWM_DISMAP_DIS0B_MASK)
+#define PWM_DISMAP_DIS1B_MASK  (0xF0U)
+#define PWM_DISMAP_DIS1B_SHIFT (4U)
+#define PWM_DISMAP_DIS1B(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1B_SHIFT)) & PWM_DISMAP_DIS1B_MASK)
+#define PWM_DISMAP_DIS0X_MASK  (0xF00U)
+#define PWM_DISMAP_DIS0X_SHIFT (8U)
+#define PWM_DISMAP_DIS0X(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS0X_SHIFT)) & PWM_DISMAP_DIS0X_MASK)
+#define PWM_DISMAP_DIS1X_MASK  (0xF00U)
+#define PWM_DISMAP_DIS1X_SHIFT (8U)
+#define PWM_DISMAP_DIS1X(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DISMAP_DIS1X_SHIFT)) & PWM_DISMAP_DIS1X_MASK)
 /*! @} */
 
 /* The count of PWM_DISMAP */
-#define PWM_DISMAP_COUNT                         (4U)
+#define PWM_DISMAP_COUNT (4U)
 
 /* The count of PWM_DISMAP */
-#define PWM_DISMAP_COUNT2                        (2U)
+#define PWM_DISMAP_COUNT2 (2U)
 
 /*! @name DTCNT0 - Deadtime Count Register 0 */
 /*! @{ */
-#define PWM_DTCNT0_DTCNT0_MASK                   (0xFFFFU)
-#define PWM_DTCNT0_DTCNT0_SHIFT                  (0U)
-#define PWM_DTCNT0_DTCNT0(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT0_DTCNT0_SHIFT)) & PWM_DTCNT0_DTCNT0_MASK)
+#define PWM_DTCNT0_DTCNT0_MASK  (0xFFFFU)
+#define PWM_DTCNT0_DTCNT0_SHIFT (0U)
+#define PWM_DTCNT0_DTCNT0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT0_DTCNT0_SHIFT)) & PWM_DTCNT0_DTCNT0_MASK)
 /*! @} */
 
 /* The count of PWM_DTCNT0 */
-#define PWM_DTCNT0_COUNT                         (4U)
+#define PWM_DTCNT0_COUNT (4U)
 
 /*! @name DTCNT1 - Deadtime Count Register 1 */
 /*! @{ */
-#define PWM_DTCNT1_DTCNT1_MASK                   (0xFFFFU)
-#define PWM_DTCNT1_DTCNT1_SHIFT                  (0U)
-#define PWM_DTCNT1_DTCNT1(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT1_DTCNT1_SHIFT)) & PWM_DTCNT1_DTCNT1_MASK)
+#define PWM_DTCNT1_DTCNT1_MASK  (0xFFFFU)
+#define PWM_DTCNT1_DTCNT1_SHIFT (0U)
+#define PWM_DTCNT1_DTCNT1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_DTCNT1_DTCNT1_SHIFT)) & PWM_DTCNT1_DTCNT1_MASK)
 /*! @} */
 
 /* The count of PWM_DTCNT1 */
-#define PWM_DTCNT1_COUNT                         (4U)
+#define PWM_DTCNT1_COUNT (4U)
 
 /*! @name CAPTCTRLA - Capture Control A Register */
 /*! @{ */
-#define PWM_CAPTCTRLA_ARMA_MASK                  (0x1U)
-#define PWM_CAPTCTRLA_ARMA_SHIFT                 (0U)
-#define PWM_CAPTCTRLA_ARMA(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ARMA_SHIFT)) & PWM_CAPTCTRLA_ARMA_MASK)
-#define PWM_CAPTCTRLA_ONESHOTA_MASK              (0x2U)
-#define PWM_CAPTCTRLA_ONESHOTA_SHIFT             (1U)
-#define PWM_CAPTCTRLA_ONESHOTA(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ONESHOTA_SHIFT)) & PWM_CAPTCTRLA_ONESHOTA_MASK)
-#define PWM_CAPTCTRLA_EDGA0_MASK                 (0xCU)
-#define PWM_CAPTCTRLA_EDGA0_SHIFT                (2U)
-#define PWM_CAPTCTRLA_EDGA0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA0_SHIFT)) & PWM_CAPTCTRLA_EDGA0_MASK)
-#define PWM_CAPTCTRLA_EDGA1_MASK                 (0x30U)
-#define PWM_CAPTCTRLA_EDGA1_SHIFT                (4U)
-#define PWM_CAPTCTRLA_EDGA1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA1_SHIFT)) & PWM_CAPTCTRLA_EDGA1_MASK)
-#define PWM_CAPTCTRLA_INP_SELA_MASK              (0x40U)
-#define PWM_CAPTCTRLA_INP_SELA_SHIFT             (6U)
-#define PWM_CAPTCTRLA_INP_SELA(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_INP_SELA_SHIFT)) & PWM_CAPTCTRLA_INP_SELA_MASK)
-#define PWM_CAPTCTRLA_EDGCNTA_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLA_EDGCNTA_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT)) & PWM_CAPTCTRLA_EDGCNTA_EN_MASK)
-#define PWM_CAPTCTRLA_CFAWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLA_CFAWM_SHIFT                (8U)
-#define PWM_CAPTCTRLA_CFAWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CFAWM_SHIFT)) & PWM_CAPTCTRLA_CFAWM_MASK)
-#define PWM_CAPTCTRLA_CA0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLA_CA0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLA_CA0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA0CNT_SHIFT)) & PWM_CAPTCTRLA_CA0CNT_MASK)
-#define PWM_CAPTCTRLA_CA1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLA_CA1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLA_CA1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA1CNT_SHIFT)) & PWM_CAPTCTRLA_CA1CNT_MASK)
+#define PWM_CAPTCTRLA_ARMA_MASK      (0x1U)
+#define PWM_CAPTCTRLA_ARMA_SHIFT     (0U)
+#define PWM_CAPTCTRLA_ARMA(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ARMA_SHIFT)) & PWM_CAPTCTRLA_ARMA_MASK)
+#define PWM_CAPTCTRLA_ONESHOTA_MASK  (0x2U)
+#define PWM_CAPTCTRLA_ONESHOTA_SHIFT (1U)
+#define PWM_CAPTCTRLA_ONESHOTA(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_ONESHOTA_SHIFT)) & PWM_CAPTCTRLA_ONESHOTA_MASK)
+#define PWM_CAPTCTRLA_EDGA0_MASK     (0xCU)
+#define PWM_CAPTCTRLA_EDGA0_SHIFT    (2U)
+#define PWM_CAPTCTRLA_EDGA0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA0_SHIFT)) & PWM_CAPTCTRLA_EDGA0_MASK)
+#define PWM_CAPTCTRLA_EDGA1_MASK     (0x30U)
+#define PWM_CAPTCTRLA_EDGA1_SHIFT    (4U)
+#define PWM_CAPTCTRLA_EDGA1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGA1_SHIFT)) & PWM_CAPTCTRLA_EDGA1_MASK)
+#define PWM_CAPTCTRLA_INP_SELA_MASK  (0x40U)
+#define PWM_CAPTCTRLA_INP_SELA_SHIFT (6U)
+#define PWM_CAPTCTRLA_INP_SELA(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_INP_SELA_SHIFT)) & PWM_CAPTCTRLA_INP_SELA_MASK)
+#define PWM_CAPTCTRLA_EDGCNTA_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT (7U)
+#define PWM_CAPTCTRLA_EDGCNTA_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_EDGCNTA_EN_SHIFT)) & PWM_CAPTCTRLA_EDGCNTA_EN_MASK)
+#define PWM_CAPTCTRLA_CFAWM_MASK   (0x300U)
+#define PWM_CAPTCTRLA_CFAWM_SHIFT  (8U)
+#define PWM_CAPTCTRLA_CFAWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CFAWM_SHIFT)) & PWM_CAPTCTRLA_CFAWM_MASK)
+#define PWM_CAPTCTRLA_CA0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLA_CA0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLA_CA0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA0CNT_SHIFT)) & PWM_CAPTCTRLA_CA0CNT_MASK)
+#define PWM_CAPTCTRLA_CA1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLA_CA1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLA_CA1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLA_CA1CNT_SHIFT)) & PWM_CAPTCTRLA_CA1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLA */
-#define PWM_CAPTCTRLA_COUNT                      (4U)
+#define PWM_CAPTCTRLA_COUNT (4U)
 
 /*! @name CAPTCOMPA - Capture Compare A Register */
 /*! @{ */
-#define PWM_CAPTCOMPA_EDGCMPA_MASK               (0xFFU)
-#define PWM_CAPTCOMPA_EDGCMPA_SHIFT              (0U)
-#define PWM_CAPTCOMPA_EDGCMPA(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCMPA_SHIFT)) & PWM_CAPTCOMPA_EDGCMPA_MASK)
-#define PWM_CAPTCOMPA_EDGCNTA_MASK               (0xFF00U)
-#define PWM_CAPTCOMPA_EDGCNTA_SHIFT              (8U)
-#define PWM_CAPTCOMPA_EDGCNTA(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCNTA_SHIFT)) & PWM_CAPTCOMPA_EDGCNTA_MASK)
+#define PWM_CAPTCOMPA_EDGCMPA_MASK  (0xFFU)
+#define PWM_CAPTCOMPA_EDGCMPA_SHIFT (0U)
+#define PWM_CAPTCOMPA_EDGCMPA(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCMPA_SHIFT)) & PWM_CAPTCOMPA_EDGCMPA_MASK)
+#define PWM_CAPTCOMPA_EDGCNTA_MASK  (0xFF00U)
+#define PWM_CAPTCOMPA_EDGCNTA_SHIFT (8U)
+#define PWM_CAPTCOMPA_EDGCNTA(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPA_EDGCNTA_SHIFT)) & PWM_CAPTCOMPA_EDGCNTA_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPA */
-#define PWM_CAPTCOMPA_COUNT                      (4U)
+#define PWM_CAPTCOMPA_COUNT (4U)
 
 /*! @name CAPTCTRLB - Capture Control B Register */
 /*! @{ */
-#define PWM_CAPTCTRLB_ARMB_MASK                  (0x1U)
-#define PWM_CAPTCTRLB_ARMB_SHIFT                 (0U)
-#define PWM_CAPTCTRLB_ARMB(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ARMB_SHIFT)) & PWM_CAPTCTRLB_ARMB_MASK)
-#define PWM_CAPTCTRLB_ONESHOTB_MASK              (0x2U)
-#define PWM_CAPTCTRLB_ONESHOTB_SHIFT             (1U)
-#define PWM_CAPTCTRLB_ONESHOTB(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ONESHOTB_SHIFT)) & PWM_CAPTCTRLB_ONESHOTB_MASK)
-#define PWM_CAPTCTRLB_EDGB0_MASK                 (0xCU)
-#define PWM_CAPTCTRLB_EDGB0_SHIFT                (2U)
-#define PWM_CAPTCTRLB_EDGB0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB0_SHIFT)) & PWM_CAPTCTRLB_EDGB0_MASK)
-#define PWM_CAPTCTRLB_EDGB1_MASK                 (0x30U)
-#define PWM_CAPTCTRLB_EDGB1_SHIFT                (4U)
-#define PWM_CAPTCTRLB_EDGB1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB1_SHIFT)) & PWM_CAPTCTRLB_EDGB1_MASK)
-#define PWM_CAPTCTRLB_INP_SELB_MASK              (0x40U)
-#define PWM_CAPTCTRLB_INP_SELB_SHIFT             (6U)
-#define PWM_CAPTCTRLB_INP_SELB(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_INP_SELB_SHIFT)) & PWM_CAPTCTRLB_INP_SELB_MASK)
-#define PWM_CAPTCTRLB_EDGCNTB_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLB_EDGCNTB_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT)) & PWM_CAPTCTRLB_EDGCNTB_EN_MASK)
-#define PWM_CAPTCTRLB_CFBWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLB_CFBWM_SHIFT                (8U)
-#define PWM_CAPTCTRLB_CFBWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CFBWM_SHIFT)) & PWM_CAPTCTRLB_CFBWM_MASK)
-#define PWM_CAPTCTRLB_CB0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLB_CB0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLB_CB0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB0CNT_SHIFT)) & PWM_CAPTCTRLB_CB0CNT_MASK)
-#define PWM_CAPTCTRLB_CB1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLB_CB1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLB_CB1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB1CNT_SHIFT)) & PWM_CAPTCTRLB_CB1CNT_MASK)
+#define PWM_CAPTCTRLB_ARMB_MASK      (0x1U)
+#define PWM_CAPTCTRLB_ARMB_SHIFT     (0U)
+#define PWM_CAPTCTRLB_ARMB(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ARMB_SHIFT)) & PWM_CAPTCTRLB_ARMB_MASK)
+#define PWM_CAPTCTRLB_ONESHOTB_MASK  (0x2U)
+#define PWM_CAPTCTRLB_ONESHOTB_SHIFT (1U)
+#define PWM_CAPTCTRLB_ONESHOTB(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_ONESHOTB_SHIFT)) & PWM_CAPTCTRLB_ONESHOTB_MASK)
+#define PWM_CAPTCTRLB_EDGB0_MASK     (0xCU)
+#define PWM_CAPTCTRLB_EDGB0_SHIFT    (2U)
+#define PWM_CAPTCTRLB_EDGB0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB0_SHIFT)) & PWM_CAPTCTRLB_EDGB0_MASK)
+#define PWM_CAPTCTRLB_EDGB1_MASK     (0x30U)
+#define PWM_CAPTCTRLB_EDGB1_SHIFT    (4U)
+#define PWM_CAPTCTRLB_EDGB1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGB1_SHIFT)) & PWM_CAPTCTRLB_EDGB1_MASK)
+#define PWM_CAPTCTRLB_INP_SELB_MASK  (0x40U)
+#define PWM_CAPTCTRLB_INP_SELB_SHIFT (6U)
+#define PWM_CAPTCTRLB_INP_SELB(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_INP_SELB_SHIFT)) & PWM_CAPTCTRLB_INP_SELB_MASK)
+#define PWM_CAPTCTRLB_EDGCNTB_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT (7U)
+#define PWM_CAPTCTRLB_EDGCNTB_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_EDGCNTB_EN_SHIFT)) & PWM_CAPTCTRLB_EDGCNTB_EN_MASK)
+#define PWM_CAPTCTRLB_CFBWM_MASK   (0x300U)
+#define PWM_CAPTCTRLB_CFBWM_SHIFT  (8U)
+#define PWM_CAPTCTRLB_CFBWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CFBWM_SHIFT)) & PWM_CAPTCTRLB_CFBWM_MASK)
+#define PWM_CAPTCTRLB_CB0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLB_CB0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLB_CB0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB0CNT_SHIFT)) & PWM_CAPTCTRLB_CB0CNT_MASK)
+#define PWM_CAPTCTRLB_CB1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLB_CB1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLB_CB1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLB_CB1CNT_SHIFT)) & PWM_CAPTCTRLB_CB1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLB */
-#define PWM_CAPTCTRLB_COUNT                      (4U)
+#define PWM_CAPTCTRLB_COUNT (4U)
 
 /*! @name CAPTCOMPB - Capture Compare B Register */
 /*! @{ */
-#define PWM_CAPTCOMPB_EDGCMPB_MASK               (0xFFU)
-#define PWM_CAPTCOMPB_EDGCMPB_SHIFT              (0U)
-#define PWM_CAPTCOMPB_EDGCMPB(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCMPB_SHIFT)) & PWM_CAPTCOMPB_EDGCMPB_MASK)
-#define PWM_CAPTCOMPB_EDGCNTB_MASK               (0xFF00U)
-#define PWM_CAPTCOMPB_EDGCNTB_SHIFT              (8U)
-#define PWM_CAPTCOMPB_EDGCNTB(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCNTB_SHIFT)) & PWM_CAPTCOMPB_EDGCNTB_MASK)
+#define PWM_CAPTCOMPB_EDGCMPB_MASK  (0xFFU)
+#define PWM_CAPTCOMPB_EDGCMPB_SHIFT (0U)
+#define PWM_CAPTCOMPB_EDGCMPB(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCMPB_SHIFT)) & PWM_CAPTCOMPB_EDGCMPB_MASK)
+#define PWM_CAPTCOMPB_EDGCNTB_MASK  (0xFF00U)
+#define PWM_CAPTCOMPB_EDGCNTB_SHIFT (8U)
+#define PWM_CAPTCOMPB_EDGCNTB(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPB_EDGCNTB_SHIFT)) & PWM_CAPTCOMPB_EDGCNTB_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPB */
-#define PWM_CAPTCOMPB_COUNT                      (4U)
+#define PWM_CAPTCOMPB_COUNT (4U)
 
 /*! @name CAPTCTRLX - Capture Control X Register */
 /*! @{ */
-#define PWM_CAPTCTRLX_ARMX_MASK                  (0x1U)
-#define PWM_CAPTCTRLX_ARMX_SHIFT                 (0U)
-#define PWM_CAPTCTRLX_ARMX(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ARMX_SHIFT)) & PWM_CAPTCTRLX_ARMX_MASK)
-#define PWM_CAPTCTRLX_ONESHOTX_MASK              (0x2U)
-#define PWM_CAPTCTRLX_ONESHOTX_SHIFT             (1U)
-#define PWM_CAPTCTRLX_ONESHOTX(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ONESHOTX_SHIFT)) & PWM_CAPTCTRLX_ONESHOTX_MASK)
-#define PWM_CAPTCTRLX_EDGX0_MASK                 (0xCU)
-#define PWM_CAPTCTRLX_EDGX0_SHIFT                (2U)
-#define PWM_CAPTCTRLX_EDGX0(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX0_SHIFT)) & PWM_CAPTCTRLX_EDGX0_MASK)
-#define PWM_CAPTCTRLX_EDGX1_MASK                 (0x30U)
-#define PWM_CAPTCTRLX_EDGX1_SHIFT                (4U)
-#define PWM_CAPTCTRLX_EDGX1(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX1_SHIFT)) & PWM_CAPTCTRLX_EDGX1_MASK)
-#define PWM_CAPTCTRLX_INP_SELX_MASK              (0x40U)
-#define PWM_CAPTCTRLX_INP_SELX_SHIFT             (6U)
-#define PWM_CAPTCTRLX_INP_SELX(x)                (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_INP_SELX_SHIFT)) & PWM_CAPTCTRLX_INP_SELX_MASK)
-#define PWM_CAPTCTRLX_EDGCNTX_EN_MASK            (0x80U)
-#define PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT           (7U)
-#define PWM_CAPTCTRLX_EDGCNTX_EN(x)              (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT)) & PWM_CAPTCTRLX_EDGCNTX_EN_MASK)
-#define PWM_CAPTCTRLX_CFXWM_MASK                 (0x300U)
-#define PWM_CAPTCTRLX_CFXWM_SHIFT                (8U)
-#define PWM_CAPTCTRLX_CFXWM(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CFXWM_SHIFT)) & PWM_CAPTCTRLX_CFXWM_MASK)
-#define PWM_CAPTCTRLX_CX0CNT_MASK                (0x1C00U)
-#define PWM_CAPTCTRLX_CX0CNT_SHIFT               (10U)
-#define PWM_CAPTCTRLX_CX0CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX0CNT_SHIFT)) & PWM_CAPTCTRLX_CX0CNT_MASK)
-#define PWM_CAPTCTRLX_CX1CNT_MASK                (0xE000U)
-#define PWM_CAPTCTRLX_CX1CNT_SHIFT               (13U)
-#define PWM_CAPTCTRLX_CX1CNT(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX1CNT_SHIFT)) & PWM_CAPTCTRLX_CX1CNT_MASK)
+#define PWM_CAPTCTRLX_ARMX_MASK      (0x1U)
+#define PWM_CAPTCTRLX_ARMX_SHIFT     (0U)
+#define PWM_CAPTCTRLX_ARMX(x)        (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ARMX_SHIFT)) & PWM_CAPTCTRLX_ARMX_MASK)
+#define PWM_CAPTCTRLX_ONESHOTX_MASK  (0x2U)
+#define PWM_CAPTCTRLX_ONESHOTX_SHIFT (1U)
+#define PWM_CAPTCTRLX_ONESHOTX(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_ONESHOTX_SHIFT)) & PWM_CAPTCTRLX_ONESHOTX_MASK)
+#define PWM_CAPTCTRLX_EDGX0_MASK     (0xCU)
+#define PWM_CAPTCTRLX_EDGX0_SHIFT    (2U)
+#define PWM_CAPTCTRLX_EDGX0(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX0_SHIFT)) & PWM_CAPTCTRLX_EDGX0_MASK)
+#define PWM_CAPTCTRLX_EDGX1_MASK     (0x30U)
+#define PWM_CAPTCTRLX_EDGX1_SHIFT    (4U)
+#define PWM_CAPTCTRLX_EDGX1(x)       (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGX1_SHIFT)) & PWM_CAPTCTRLX_EDGX1_MASK)
+#define PWM_CAPTCTRLX_INP_SELX_MASK  (0x40U)
+#define PWM_CAPTCTRLX_INP_SELX_SHIFT (6U)
+#define PWM_CAPTCTRLX_INP_SELX(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_INP_SELX_SHIFT)) & PWM_CAPTCTRLX_INP_SELX_MASK)
+#define PWM_CAPTCTRLX_EDGCNTX_EN_MASK  (0x80U)
+#define PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT (7U)
+#define PWM_CAPTCTRLX_EDGCNTX_EN(x)                                                                                    \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_EDGCNTX_EN_SHIFT)) & PWM_CAPTCTRLX_EDGCNTX_EN_MASK)
+#define PWM_CAPTCTRLX_CFXWM_MASK   (0x300U)
+#define PWM_CAPTCTRLX_CFXWM_SHIFT  (8U)
+#define PWM_CAPTCTRLX_CFXWM(x)     (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CFXWM_SHIFT)) & PWM_CAPTCTRLX_CFXWM_MASK)
+#define PWM_CAPTCTRLX_CX0CNT_MASK  (0x1C00U)
+#define PWM_CAPTCTRLX_CX0CNT_SHIFT (10U)
+#define PWM_CAPTCTRLX_CX0CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX0CNT_SHIFT)) & PWM_CAPTCTRLX_CX0CNT_MASK)
+#define PWM_CAPTCTRLX_CX1CNT_MASK  (0xE000U)
+#define PWM_CAPTCTRLX_CX1CNT_SHIFT (13U)
+#define PWM_CAPTCTRLX_CX1CNT(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCTRLX_CX1CNT_SHIFT)) & PWM_CAPTCTRLX_CX1CNT_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCTRLX */
-#define PWM_CAPTCTRLX_COUNT                      (4U)
+#define PWM_CAPTCTRLX_COUNT (4U)
 
 /*! @name CAPTCOMPX - Capture Compare X Register */
 /*! @{ */
-#define PWM_CAPTCOMPX_EDGCMPX_MASK               (0xFFU)
-#define PWM_CAPTCOMPX_EDGCMPX_SHIFT              (0U)
-#define PWM_CAPTCOMPX_EDGCMPX(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCMPX_SHIFT)) & PWM_CAPTCOMPX_EDGCMPX_MASK)
-#define PWM_CAPTCOMPX_EDGCNTX_MASK               (0xFF00U)
-#define PWM_CAPTCOMPX_EDGCNTX_SHIFT              (8U)
-#define PWM_CAPTCOMPX_EDGCNTX(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCNTX_SHIFT)) & PWM_CAPTCOMPX_EDGCNTX_MASK)
+#define PWM_CAPTCOMPX_EDGCMPX_MASK  (0xFFU)
+#define PWM_CAPTCOMPX_EDGCMPX_SHIFT (0U)
+#define PWM_CAPTCOMPX_EDGCMPX(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCMPX_SHIFT)) & PWM_CAPTCOMPX_EDGCMPX_MASK)
+#define PWM_CAPTCOMPX_EDGCNTX_MASK  (0xFF00U)
+#define PWM_CAPTCOMPX_EDGCNTX_SHIFT (8U)
+#define PWM_CAPTCOMPX_EDGCNTX(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CAPTCOMPX_EDGCNTX_SHIFT)) & PWM_CAPTCOMPX_EDGCNTX_MASK)
 /*! @} */
 
 /* The count of PWM_CAPTCOMPX */
-#define PWM_CAPTCOMPX_COUNT                      (4U)
+#define PWM_CAPTCOMPX_COUNT (4U)
 
 /*! @name CVAL0 - Capture Value 0 Register */
 /*! @{ */
-#define PWM_CVAL0_CAPTVAL0_MASK                  (0xFFFFU)
-#define PWM_CVAL0_CAPTVAL0_SHIFT                 (0U)
-#define PWM_CVAL0_CAPTVAL0(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0_CAPTVAL0_SHIFT)) & PWM_CVAL0_CAPTVAL0_MASK)
+#define PWM_CVAL0_CAPTVAL0_MASK  (0xFFFFU)
+#define PWM_CVAL0_CAPTVAL0_SHIFT (0U)
+#define PWM_CVAL0_CAPTVAL0(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0_CAPTVAL0_SHIFT)) & PWM_CVAL0_CAPTVAL0_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL0 */
-#define PWM_CVAL0_COUNT                          (4U)
+#define PWM_CVAL0_COUNT (4U)
 
 /*! @name CVAL0CYC - Capture Value 0 Cycle Register */
 /*! @{ */
-#define PWM_CVAL0CYC_CVAL0CYC_MASK               (0xFU)
-#define PWM_CVAL0CYC_CVAL0CYC_SHIFT              (0U)
-#define PWM_CVAL0CYC_CVAL0CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0CYC_CVAL0CYC_SHIFT)) & PWM_CVAL0CYC_CVAL0CYC_MASK)
+#define PWM_CVAL0CYC_CVAL0CYC_MASK  (0xFU)
+#define PWM_CVAL0CYC_CVAL0CYC_SHIFT (0U)
+#define PWM_CVAL0CYC_CVAL0CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL0CYC_CVAL0CYC_SHIFT)) & PWM_CVAL0CYC_CVAL0CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL0CYC */
-#define PWM_CVAL0CYC_COUNT                       (4U)
+#define PWM_CVAL0CYC_COUNT (4U)
 
 /*! @name CVAL1 - Capture Value 1 Register */
 /*! @{ */
-#define PWM_CVAL1_CAPTVAL1_MASK                  (0xFFFFU)
-#define PWM_CVAL1_CAPTVAL1_SHIFT                 (0U)
-#define PWM_CVAL1_CAPTVAL1(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1_CAPTVAL1_SHIFT)) & PWM_CVAL1_CAPTVAL1_MASK)
+#define PWM_CVAL1_CAPTVAL1_MASK  (0xFFFFU)
+#define PWM_CVAL1_CAPTVAL1_SHIFT (0U)
+#define PWM_CVAL1_CAPTVAL1(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1_CAPTVAL1_SHIFT)) & PWM_CVAL1_CAPTVAL1_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL1 */
-#define PWM_CVAL1_COUNT                          (4U)
+#define PWM_CVAL1_COUNT (4U)
 
 /*! @name CVAL1CYC - Capture Value 1 Cycle Register */
 /*! @{ */
-#define PWM_CVAL1CYC_CVAL1CYC_MASK               (0xFU)
-#define PWM_CVAL1CYC_CVAL1CYC_SHIFT              (0U)
-#define PWM_CVAL1CYC_CVAL1CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1CYC_CVAL1CYC_SHIFT)) & PWM_CVAL1CYC_CVAL1CYC_MASK)
+#define PWM_CVAL1CYC_CVAL1CYC_MASK  (0xFU)
+#define PWM_CVAL1CYC_CVAL1CYC_SHIFT (0U)
+#define PWM_CVAL1CYC_CVAL1CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL1CYC_CVAL1CYC_SHIFT)) & PWM_CVAL1CYC_CVAL1CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL1CYC */
-#define PWM_CVAL1CYC_COUNT                       (4U)
+#define PWM_CVAL1CYC_COUNT (4U)
 
 /*! @name CVAL2 - Capture Value 2 Register */
 /*! @{ */
-#define PWM_CVAL2_CAPTVAL2_MASK                  (0xFFFFU)
-#define PWM_CVAL2_CAPTVAL2_SHIFT                 (0U)
-#define PWM_CVAL2_CAPTVAL2(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2_CAPTVAL2_SHIFT)) & PWM_CVAL2_CAPTVAL2_MASK)
+#define PWM_CVAL2_CAPTVAL2_MASK  (0xFFFFU)
+#define PWM_CVAL2_CAPTVAL2_SHIFT (0U)
+#define PWM_CVAL2_CAPTVAL2(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2_CAPTVAL2_SHIFT)) & PWM_CVAL2_CAPTVAL2_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL2 */
-#define PWM_CVAL2_COUNT                          (4U)
+#define PWM_CVAL2_COUNT (4U)
 
 /*! @name CVAL2CYC - Capture Value 2 Cycle Register */
 /*! @{ */
-#define PWM_CVAL2CYC_CVAL2CYC_MASK               (0xFU)
-#define PWM_CVAL2CYC_CVAL2CYC_SHIFT              (0U)
-#define PWM_CVAL2CYC_CVAL2CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2CYC_CVAL2CYC_SHIFT)) & PWM_CVAL2CYC_CVAL2CYC_MASK)
+#define PWM_CVAL2CYC_CVAL2CYC_MASK  (0xFU)
+#define PWM_CVAL2CYC_CVAL2CYC_SHIFT (0U)
+#define PWM_CVAL2CYC_CVAL2CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL2CYC_CVAL2CYC_SHIFT)) & PWM_CVAL2CYC_CVAL2CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL2CYC */
-#define PWM_CVAL2CYC_COUNT                       (4U)
+#define PWM_CVAL2CYC_COUNT (4U)
 
 /*! @name CVAL3 - Capture Value 3 Register */
 /*! @{ */
-#define PWM_CVAL3_CAPTVAL3_MASK                  (0xFFFFU)
-#define PWM_CVAL3_CAPTVAL3_SHIFT                 (0U)
-#define PWM_CVAL3_CAPTVAL3(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3_CAPTVAL3_SHIFT)) & PWM_CVAL3_CAPTVAL3_MASK)
+#define PWM_CVAL3_CAPTVAL3_MASK  (0xFFFFU)
+#define PWM_CVAL3_CAPTVAL3_SHIFT (0U)
+#define PWM_CVAL3_CAPTVAL3(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3_CAPTVAL3_SHIFT)) & PWM_CVAL3_CAPTVAL3_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL3 */
-#define PWM_CVAL3_COUNT                          (4U)
+#define PWM_CVAL3_COUNT (4U)
 
 /*! @name CVAL3CYC - Capture Value 3 Cycle Register */
 /*! @{ */
-#define PWM_CVAL3CYC_CVAL3CYC_MASK               (0xFU)
-#define PWM_CVAL3CYC_CVAL3CYC_SHIFT              (0U)
-#define PWM_CVAL3CYC_CVAL3CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3CYC_CVAL3CYC_SHIFT)) & PWM_CVAL3CYC_CVAL3CYC_MASK)
+#define PWM_CVAL3CYC_CVAL3CYC_MASK  (0xFU)
+#define PWM_CVAL3CYC_CVAL3CYC_SHIFT (0U)
+#define PWM_CVAL3CYC_CVAL3CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL3CYC_CVAL3CYC_SHIFT)) & PWM_CVAL3CYC_CVAL3CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL3CYC */
-#define PWM_CVAL3CYC_COUNT                       (4U)
+#define PWM_CVAL3CYC_COUNT (4U)
 
 /*! @name CVAL4 - Capture Value 4 Register */
 /*! @{ */
-#define PWM_CVAL4_CAPTVAL4_MASK                  (0xFFFFU)
-#define PWM_CVAL4_CAPTVAL4_SHIFT                 (0U)
-#define PWM_CVAL4_CAPTVAL4(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4_CAPTVAL4_SHIFT)) & PWM_CVAL4_CAPTVAL4_MASK)
+#define PWM_CVAL4_CAPTVAL4_MASK  (0xFFFFU)
+#define PWM_CVAL4_CAPTVAL4_SHIFT (0U)
+#define PWM_CVAL4_CAPTVAL4(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4_CAPTVAL4_SHIFT)) & PWM_CVAL4_CAPTVAL4_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL4 */
-#define PWM_CVAL4_COUNT                          (4U)
+#define PWM_CVAL4_COUNT (4U)
 
 /*! @name CVAL4CYC - Capture Value 4 Cycle Register */
 /*! @{ */
-#define PWM_CVAL4CYC_CVAL4CYC_MASK               (0xFU)
-#define PWM_CVAL4CYC_CVAL4CYC_SHIFT              (0U)
-#define PWM_CVAL4CYC_CVAL4CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4CYC_CVAL4CYC_SHIFT)) & PWM_CVAL4CYC_CVAL4CYC_MASK)
+#define PWM_CVAL4CYC_CVAL4CYC_MASK  (0xFU)
+#define PWM_CVAL4CYC_CVAL4CYC_SHIFT (0U)
+#define PWM_CVAL4CYC_CVAL4CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL4CYC_CVAL4CYC_SHIFT)) & PWM_CVAL4CYC_CVAL4CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL4CYC */
-#define PWM_CVAL4CYC_COUNT                       (4U)
+#define PWM_CVAL4CYC_COUNT (4U)
 
 /*! @name CVAL5 - Capture Value 5 Register */
 /*! @{ */
-#define PWM_CVAL5_CAPTVAL5_MASK                  (0xFFFFU)
-#define PWM_CVAL5_CAPTVAL5_SHIFT                 (0U)
-#define PWM_CVAL5_CAPTVAL5(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5_CAPTVAL5_SHIFT)) & PWM_CVAL5_CAPTVAL5_MASK)
+#define PWM_CVAL5_CAPTVAL5_MASK  (0xFFFFU)
+#define PWM_CVAL5_CAPTVAL5_SHIFT (0U)
+#define PWM_CVAL5_CAPTVAL5(x)    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5_CAPTVAL5_SHIFT)) & PWM_CVAL5_CAPTVAL5_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL5 */
-#define PWM_CVAL5_COUNT                          (4U)
+#define PWM_CVAL5_COUNT (4U)
 
 /*! @name CVAL5CYC - Capture Value 5 Cycle Register */
 /*! @{ */
-#define PWM_CVAL5CYC_CVAL5CYC_MASK               (0xFU)
-#define PWM_CVAL5CYC_CVAL5CYC_SHIFT              (0U)
-#define PWM_CVAL5CYC_CVAL5CYC(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5CYC_CVAL5CYC_SHIFT)) & PWM_CVAL5CYC_CVAL5CYC_MASK)
+#define PWM_CVAL5CYC_CVAL5CYC_MASK  (0xFU)
+#define PWM_CVAL5CYC_CVAL5CYC_SHIFT (0U)
+#define PWM_CVAL5CYC_CVAL5CYC(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_CVAL5CYC_CVAL5CYC_SHIFT)) & PWM_CVAL5CYC_CVAL5CYC_MASK)
 /*! @} */
 
 /* The count of PWM_CVAL5CYC */
-#define PWM_CVAL5CYC_COUNT                       (4U)
+#define PWM_CVAL5CYC_COUNT (4U)
 
 /*! @name OUTEN - Output Enable Register */
 /*! @{ */
-#define PWM_OUTEN_PWMX_EN_MASK                   (0xFU)
-#define PWM_OUTEN_PWMX_EN_SHIFT                  (0U)
-#define PWM_OUTEN_PWMX_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMX_EN_SHIFT)) & PWM_OUTEN_PWMX_EN_MASK)
-#define PWM_OUTEN_PWMB_EN_MASK                   (0xF0U)
-#define PWM_OUTEN_PWMB_EN_SHIFT                  (4U)
-#define PWM_OUTEN_PWMB_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMB_EN_SHIFT)) & PWM_OUTEN_PWMB_EN_MASK)
-#define PWM_OUTEN_PWMA_EN_MASK                   (0xF00U)
-#define PWM_OUTEN_PWMA_EN_SHIFT                  (8U)
-#define PWM_OUTEN_PWMA_EN(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMA_EN_SHIFT)) & PWM_OUTEN_PWMA_EN_MASK)
+#define PWM_OUTEN_PWMX_EN_MASK  (0xFU)
+#define PWM_OUTEN_PWMX_EN_SHIFT (0U)
+#define PWM_OUTEN_PWMX_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMX_EN_SHIFT)) & PWM_OUTEN_PWMX_EN_MASK)
+#define PWM_OUTEN_PWMB_EN_MASK  (0xF0U)
+#define PWM_OUTEN_PWMB_EN_SHIFT (4U)
+#define PWM_OUTEN_PWMB_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMB_EN_SHIFT)) & PWM_OUTEN_PWMB_EN_MASK)
+#define PWM_OUTEN_PWMA_EN_MASK  (0xF00U)
+#define PWM_OUTEN_PWMA_EN_SHIFT (8U)
+#define PWM_OUTEN_PWMA_EN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_OUTEN_PWMA_EN_SHIFT)) & PWM_OUTEN_PWMA_EN_MASK)
 /*! @} */
 
 /*! @name MASK - Mask Register */
 /*! @{ */
-#define PWM_MASK_MASKX_MASK                      (0xFU)
-#define PWM_MASK_MASKX_SHIFT                     (0U)
-#define PWM_MASK_MASKX(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKX_SHIFT)) & PWM_MASK_MASKX_MASK)
-#define PWM_MASK_MASKB_MASK                      (0xF0U)
-#define PWM_MASK_MASKB_SHIFT                     (4U)
-#define PWM_MASK_MASKB(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKB_SHIFT)) & PWM_MASK_MASKB_MASK)
-#define PWM_MASK_MASKA_MASK                      (0xF00U)
-#define PWM_MASK_MASKA_SHIFT                     (8U)
-#define PWM_MASK_MASKA(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKA_SHIFT)) & PWM_MASK_MASKA_MASK)
-#define PWM_MASK_UPDATE_MASK_MASK                (0xF000U)
-#define PWM_MASK_UPDATE_MASK_SHIFT               (12U)
-#define PWM_MASK_UPDATE_MASK(x)                  (((uint16_t)(((uint16_t)(x)) << PWM_MASK_UPDATE_MASK_SHIFT)) & PWM_MASK_UPDATE_MASK_MASK)
+#define PWM_MASK_MASKX_MASK        (0xFU)
+#define PWM_MASK_MASKX_SHIFT       (0U)
+#define PWM_MASK_MASKX(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKX_SHIFT)) & PWM_MASK_MASKX_MASK)
+#define PWM_MASK_MASKB_MASK        (0xF0U)
+#define PWM_MASK_MASKB_SHIFT       (4U)
+#define PWM_MASK_MASKB(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKB_SHIFT)) & PWM_MASK_MASKB_MASK)
+#define PWM_MASK_MASKA_MASK        (0xF00U)
+#define PWM_MASK_MASKA_SHIFT       (8U)
+#define PWM_MASK_MASKA(x)          (((uint16_t)(((uint16_t)(x)) << PWM_MASK_MASKA_SHIFT)) & PWM_MASK_MASKA_MASK)
+#define PWM_MASK_UPDATE_MASK_MASK  (0xF000U)
+#define PWM_MASK_UPDATE_MASK_SHIFT (12U)
+#define PWM_MASK_UPDATE_MASK(x)                                                                                        \
+    (((uint16_t)(((uint16_t)(x)) << PWM_MASK_UPDATE_MASK_SHIFT)) & PWM_MASK_UPDATE_MASK_MASK)
 /*! @} */
 
 /*! @name SWCOUT - Software Controlled Output Register */
 /*! @{ */
-#define PWM_SWCOUT_SM0OUT45_MASK                 (0x1U)
-#define PWM_SWCOUT_SM0OUT45_SHIFT                (0U)
-#define PWM_SWCOUT_SM0OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT45_SHIFT)) & PWM_SWCOUT_SM0OUT45_MASK)
-#define PWM_SWCOUT_SM0OUT23_MASK                 (0x2U)
-#define PWM_SWCOUT_SM0OUT23_SHIFT                (1U)
-#define PWM_SWCOUT_SM0OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT23_SHIFT)) & PWM_SWCOUT_SM0OUT23_MASK)
-#define PWM_SWCOUT_SM1OUT45_MASK                 (0x4U)
-#define PWM_SWCOUT_SM1OUT45_SHIFT                (2U)
-#define PWM_SWCOUT_SM1OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT45_SHIFT)) & PWM_SWCOUT_SM1OUT45_MASK)
-#define PWM_SWCOUT_SM1OUT23_MASK                 (0x8U)
-#define PWM_SWCOUT_SM1OUT23_SHIFT                (3U)
-#define PWM_SWCOUT_SM1OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT23_SHIFT)) & PWM_SWCOUT_SM1OUT23_MASK)
-#define PWM_SWCOUT_SM2OUT45_MASK                 (0x10U)
-#define PWM_SWCOUT_SM2OUT45_SHIFT                (4U)
-#define PWM_SWCOUT_SM2OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT45_SHIFT)) & PWM_SWCOUT_SM2OUT45_MASK)
-#define PWM_SWCOUT_SM2OUT23_MASK                 (0x20U)
-#define PWM_SWCOUT_SM2OUT23_SHIFT                (5U)
-#define PWM_SWCOUT_SM2OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT23_SHIFT)) & PWM_SWCOUT_SM2OUT23_MASK)
-#define PWM_SWCOUT_SM3OUT45_MASK                 (0x40U)
-#define PWM_SWCOUT_SM3OUT45_SHIFT                (6U)
-#define PWM_SWCOUT_SM3OUT45(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT45_SHIFT)) & PWM_SWCOUT_SM3OUT45_MASK)
-#define PWM_SWCOUT_SM3OUT23_MASK                 (0x80U)
-#define PWM_SWCOUT_SM3OUT23_SHIFT                (7U)
-#define PWM_SWCOUT_SM3OUT23(x)                   (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT23_SHIFT)) & PWM_SWCOUT_SM3OUT23_MASK)
+#define PWM_SWCOUT_SM0OUT45_MASK  (0x1U)
+#define PWM_SWCOUT_SM0OUT45_SHIFT (0U)
+#define PWM_SWCOUT_SM0OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT45_SHIFT)) & PWM_SWCOUT_SM0OUT45_MASK)
+#define PWM_SWCOUT_SM0OUT23_MASK  (0x2U)
+#define PWM_SWCOUT_SM0OUT23_SHIFT (1U)
+#define PWM_SWCOUT_SM0OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM0OUT23_SHIFT)) & PWM_SWCOUT_SM0OUT23_MASK)
+#define PWM_SWCOUT_SM1OUT45_MASK  (0x4U)
+#define PWM_SWCOUT_SM1OUT45_SHIFT (2U)
+#define PWM_SWCOUT_SM1OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT45_SHIFT)) & PWM_SWCOUT_SM1OUT45_MASK)
+#define PWM_SWCOUT_SM1OUT23_MASK  (0x8U)
+#define PWM_SWCOUT_SM1OUT23_SHIFT (3U)
+#define PWM_SWCOUT_SM1OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM1OUT23_SHIFT)) & PWM_SWCOUT_SM1OUT23_MASK)
+#define PWM_SWCOUT_SM2OUT45_MASK  (0x10U)
+#define PWM_SWCOUT_SM2OUT45_SHIFT (4U)
+#define PWM_SWCOUT_SM2OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT45_SHIFT)) & PWM_SWCOUT_SM2OUT45_MASK)
+#define PWM_SWCOUT_SM2OUT23_MASK  (0x20U)
+#define PWM_SWCOUT_SM2OUT23_SHIFT (5U)
+#define PWM_SWCOUT_SM2OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM2OUT23_SHIFT)) & PWM_SWCOUT_SM2OUT23_MASK)
+#define PWM_SWCOUT_SM3OUT45_MASK  (0x40U)
+#define PWM_SWCOUT_SM3OUT45_SHIFT (6U)
+#define PWM_SWCOUT_SM3OUT45(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT45_SHIFT)) & PWM_SWCOUT_SM3OUT45_MASK)
+#define PWM_SWCOUT_SM3OUT23_MASK  (0x80U)
+#define PWM_SWCOUT_SM3OUT23_SHIFT (7U)
+#define PWM_SWCOUT_SM3OUT23(x)    (((uint16_t)(((uint16_t)(x)) << PWM_SWCOUT_SM3OUT23_SHIFT)) & PWM_SWCOUT_SM3OUT23_MASK)
 /*! @} */
 
 /*! @name DTSRCSEL - PWM Source Select Register */
 /*! @{ */
-#define PWM_DTSRCSEL_SM0SEL45_MASK               (0x3U)
-#define PWM_DTSRCSEL_SM0SEL45_SHIFT              (0U)
-#define PWM_DTSRCSEL_SM0SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL45_SHIFT)) & PWM_DTSRCSEL_SM0SEL45_MASK)
-#define PWM_DTSRCSEL_SM0SEL23_MASK               (0xCU)
-#define PWM_DTSRCSEL_SM0SEL23_SHIFT              (2U)
-#define PWM_DTSRCSEL_SM0SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL23_SHIFT)) & PWM_DTSRCSEL_SM0SEL23_MASK)
-#define PWM_DTSRCSEL_SM1SEL45_MASK               (0x30U)
-#define PWM_DTSRCSEL_SM1SEL45_SHIFT              (4U)
-#define PWM_DTSRCSEL_SM1SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL45_SHIFT)) & PWM_DTSRCSEL_SM1SEL45_MASK)
-#define PWM_DTSRCSEL_SM1SEL23_MASK               (0xC0U)
-#define PWM_DTSRCSEL_SM1SEL23_SHIFT              (6U)
-#define PWM_DTSRCSEL_SM1SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL23_SHIFT)) & PWM_DTSRCSEL_SM1SEL23_MASK)
-#define PWM_DTSRCSEL_SM2SEL45_MASK               (0x300U)
-#define PWM_DTSRCSEL_SM2SEL45_SHIFT              (8U)
-#define PWM_DTSRCSEL_SM2SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL45_SHIFT)) & PWM_DTSRCSEL_SM2SEL45_MASK)
-#define PWM_DTSRCSEL_SM2SEL23_MASK               (0xC00U)
-#define PWM_DTSRCSEL_SM2SEL23_SHIFT              (10U)
-#define PWM_DTSRCSEL_SM2SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL23_SHIFT)) & PWM_DTSRCSEL_SM2SEL23_MASK)
-#define PWM_DTSRCSEL_SM3SEL45_MASK               (0x3000U)
-#define PWM_DTSRCSEL_SM3SEL45_SHIFT              (12U)
-#define PWM_DTSRCSEL_SM3SEL45(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL45_SHIFT)) & PWM_DTSRCSEL_SM3SEL45_MASK)
-#define PWM_DTSRCSEL_SM3SEL23_MASK               (0xC000U)
-#define PWM_DTSRCSEL_SM3SEL23_SHIFT              (14U)
-#define PWM_DTSRCSEL_SM3SEL23(x)                 (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL23_SHIFT)) & PWM_DTSRCSEL_SM3SEL23_MASK)
+#define PWM_DTSRCSEL_SM0SEL45_MASK  (0x3U)
+#define PWM_DTSRCSEL_SM0SEL45_SHIFT (0U)
+#define PWM_DTSRCSEL_SM0SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL45_SHIFT)) & PWM_DTSRCSEL_SM0SEL45_MASK)
+#define PWM_DTSRCSEL_SM0SEL23_MASK  (0xCU)
+#define PWM_DTSRCSEL_SM0SEL23_SHIFT (2U)
+#define PWM_DTSRCSEL_SM0SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM0SEL23_SHIFT)) & PWM_DTSRCSEL_SM0SEL23_MASK)
+#define PWM_DTSRCSEL_SM1SEL45_MASK  (0x30U)
+#define PWM_DTSRCSEL_SM1SEL45_SHIFT (4U)
+#define PWM_DTSRCSEL_SM1SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL45_SHIFT)) & PWM_DTSRCSEL_SM1SEL45_MASK)
+#define PWM_DTSRCSEL_SM1SEL23_MASK  (0xC0U)
+#define PWM_DTSRCSEL_SM1SEL23_SHIFT (6U)
+#define PWM_DTSRCSEL_SM1SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM1SEL23_SHIFT)) & PWM_DTSRCSEL_SM1SEL23_MASK)
+#define PWM_DTSRCSEL_SM2SEL45_MASK  (0x300U)
+#define PWM_DTSRCSEL_SM2SEL45_SHIFT (8U)
+#define PWM_DTSRCSEL_SM2SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL45_SHIFT)) & PWM_DTSRCSEL_SM2SEL45_MASK)
+#define PWM_DTSRCSEL_SM2SEL23_MASK  (0xC00U)
+#define PWM_DTSRCSEL_SM2SEL23_SHIFT (10U)
+#define PWM_DTSRCSEL_SM2SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM2SEL23_SHIFT)) & PWM_DTSRCSEL_SM2SEL23_MASK)
+#define PWM_DTSRCSEL_SM3SEL45_MASK  (0x3000U)
+#define PWM_DTSRCSEL_SM3SEL45_SHIFT (12U)
+#define PWM_DTSRCSEL_SM3SEL45(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL45_SHIFT)) & PWM_DTSRCSEL_SM3SEL45_MASK)
+#define PWM_DTSRCSEL_SM3SEL23_MASK  (0xC000U)
+#define PWM_DTSRCSEL_SM3SEL23_SHIFT (14U)
+#define PWM_DTSRCSEL_SM3SEL23(x)                                                                                       \
+    (((uint16_t)(((uint16_t)(x)) << PWM_DTSRCSEL_SM3SEL23_SHIFT)) & PWM_DTSRCSEL_SM3SEL23_MASK)
 /*! @} */
 
 /*! @name MCTRL - Master Control Register */
 /*! @{ */
-#define PWM_MCTRL_LDOK_MASK                      (0xFU)
-#define PWM_MCTRL_LDOK_SHIFT                     (0U)
-#define PWM_MCTRL_LDOK(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_LDOK_SHIFT)) & PWM_MCTRL_LDOK_MASK)
-#define PWM_MCTRL_CLDOK_MASK                     (0xF0U)
-#define PWM_MCTRL_CLDOK_SHIFT                    (4U)
-#define PWM_MCTRL_CLDOK(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_CLDOK_SHIFT)) & PWM_MCTRL_CLDOK_MASK)
-#define PWM_MCTRL_RUN_MASK                       (0xF00U)
-#define PWM_MCTRL_RUN_SHIFT                      (8U)
-#define PWM_MCTRL_RUN(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_RUN_SHIFT)) & PWM_MCTRL_RUN_MASK)
-#define PWM_MCTRL_IPOL_MASK                      (0xF000U)
-#define PWM_MCTRL_IPOL_SHIFT                     (12U)
-#define PWM_MCTRL_IPOL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_IPOL_SHIFT)) & PWM_MCTRL_IPOL_MASK)
+#define PWM_MCTRL_LDOK_MASK   (0xFU)
+#define PWM_MCTRL_LDOK_SHIFT  (0U)
+#define PWM_MCTRL_LDOK(x)     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_LDOK_SHIFT)) & PWM_MCTRL_LDOK_MASK)
+#define PWM_MCTRL_CLDOK_MASK  (0xF0U)
+#define PWM_MCTRL_CLDOK_SHIFT (4U)
+#define PWM_MCTRL_CLDOK(x)    (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_CLDOK_SHIFT)) & PWM_MCTRL_CLDOK_MASK)
+#define PWM_MCTRL_RUN_MASK    (0xF00U)
+#define PWM_MCTRL_RUN_SHIFT   (8U)
+#define PWM_MCTRL_RUN(x)      (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_RUN_SHIFT)) & PWM_MCTRL_RUN_MASK)
+#define PWM_MCTRL_IPOL_MASK   (0xF000U)
+#define PWM_MCTRL_IPOL_SHIFT  (12U)
+#define PWM_MCTRL_IPOL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL_IPOL_SHIFT)) & PWM_MCTRL_IPOL_MASK)
 /*! @} */
 
 /*! @name MCTRL2 - Master Control 2 Register */
 /*! @{ */
-#define PWM_MCTRL2_MONPLL_MASK                   (0x3U)
-#define PWM_MCTRL2_MONPLL_SHIFT                  (0U)
-#define PWM_MCTRL2_MONPLL(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL2_MONPLL_SHIFT)) & PWM_MCTRL2_MONPLL_MASK)
+#define PWM_MCTRL2_MONPLL_MASK  (0x3U)
+#define PWM_MCTRL2_MONPLL_SHIFT (0U)
+#define PWM_MCTRL2_MONPLL(x)    (((uint16_t)(((uint16_t)(x)) << PWM_MCTRL2_MONPLL_SHIFT)) & PWM_MCTRL2_MONPLL_MASK)
 /*! @} */
 
 /*! @name FCTRL - Fault Control Register */
 /*! @{ */
-#define PWM_FCTRL_FIE_MASK                       (0xFU)
-#define PWM_FCTRL_FIE_SHIFT                      (0U)
-#define PWM_FCTRL_FIE(x)                         (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FIE_SHIFT)) & PWM_FCTRL_FIE_MASK)
-#define PWM_FCTRL_FSAFE_MASK                     (0xF0U)
-#define PWM_FCTRL_FSAFE_SHIFT                    (4U)
-#define PWM_FCTRL_FSAFE(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FSAFE_SHIFT)) & PWM_FCTRL_FSAFE_MASK)
-#define PWM_FCTRL_FAUTO_MASK                     (0xF00U)
-#define PWM_FCTRL_FAUTO_SHIFT                    (8U)
-#define PWM_FCTRL_FAUTO(x)                       (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FAUTO_SHIFT)) & PWM_FCTRL_FAUTO_MASK)
-#define PWM_FCTRL_FLVL_MASK                      (0xF000U)
-#define PWM_FCTRL_FLVL_SHIFT                     (12U)
-#define PWM_FCTRL_FLVL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FLVL_SHIFT)) & PWM_FCTRL_FLVL_MASK)
+#define PWM_FCTRL_FIE_MASK    (0xFU)
+#define PWM_FCTRL_FIE_SHIFT   (0U)
+#define PWM_FCTRL_FIE(x)      (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FIE_SHIFT)) & PWM_FCTRL_FIE_MASK)
+#define PWM_FCTRL_FSAFE_MASK  (0xF0U)
+#define PWM_FCTRL_FSAFE_SHIFT (4U)
+#define PWM_FCTRL_FSAFE(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FSAFE_SHIFT)) & PWM_FCTRL_FSAFE_MASK)
+#define PWM_FCTRL_FAUTO_MASK  (0xF00U)
+#define PWM_FCTRL_FAUTO_SHIFT (8U)
+#define PWM_FCTRL_FAUTO(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FAUTO_SHIFT)) & PWM_FCTRL_FAUTO_MASK)
+#define PWM_FCTRL_FLVL_MASK   (0xF000U)
+#define PWM_FCTRL_FLVL_SHIFT  (12U)
+#define PWM_FCTRL_FLVL(x)     (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL_FLVL_SHIFT)) & PWM_FCTRL_FLVL_MASK)
 /*! @} */
 
 /*! @name FSTS - Fault Status Register */
 /*! @{ */
-#define PWM_FSTS_FFLAG_MASK                      (0xFU)
-#define PWM_FSTS_FFLAG_SHIFT                     (0U)
-#define PWM_FSTS_FFLAG(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFLAG_SHIFT)) & PWM_FSTS_FFLAG_MASK)
-#define PWM_FSTS_FFULL_MASK                      (0xF0U)
-#define PWM_FSTS_FFULL_SHIFT                     (4U)
-#define PWM_FSTS_FFULL(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFULL_SHIFT)) & PWM_FSTS_FFULL_MASK)
-#define PWM_FSTS_FFPIN_MASK                      (0xF00U)
-#define PWM_FSTS_FFPIN_SHIFT                     (8U)
-#define PWM_FSTS_FFPIN(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFPIN_SHIFT)) & PWM_FSTS_FFPIN_MASK)
-#define PWM_FSTS_FHALF_MASK                      (0xF000U)
-#define PWM_FSTS_FHALF_SHIFT                     (12U)
-#define PWM_FSTS_FHALF(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FHALF_SHIFT)) & PWM_FSTS_FHALF_MASK)
+#define PWM_FSTS_FFLAG_MASK  (0xFU)
+#define PWM_FSTS_FFLAG_SHIFT (0U)
+#define PWM_FSTS_FFLAG(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFLAG_SHIFT)) & PWM_FSTS_FFLAG_MASK)
+#define PWM_FSTS_FFULL_MASK  (0xF0U)
+#define PWM_FSTS_FFULL_SHIFT (4U)
+#define PWM_FSTS_FFULL(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFULL_SHIFT)) & PWM_FSTS_FFULL_MASK)
+#define PWM_FSTS_FFPIN_MASK  (0xF00U)
+#define PWM_FSTS_FFPIN_SHIFT (8U)
+#define PWM_FSTS_FFPIN(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FFPIN_SHIFT)) & PWM_FSTS_FFPIN_MASK)
+#define PWM_FSTS_FHALF_MASK  (0xF000U)
+#define PWM_FSTS_FHALF_SHIFT (12U)
+#define PWM_FSTS_FHALF(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FSTS_FHALF_SHIFT)) & PWM_FSTS_FHALF_MASK)
 /*! @} */
 
 /*! @name FFILT - Fault Filter Register */
 /*! @{ */
-#define PWM_FFILT_FILT_PER_MASK                  (0xFFU)
-#define PWM_FFILT_FILT_PER_SHIFT                 (0U)
-#define PWM_FFILT_FILT_PER(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_PER_SHIFT)) & PWM_FFILT_FILT_PER_MASK)
-#define PWM_FFILT_FILT_CNT_MASK                  (0x700U)
-#define PWM_FFILT_FILT_CNT_SHIFT                 (8U)
-#define PWM_FFILT_FILT_CNT(x)                    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_CNT_SHIFT)) & PWM_FFILT_FILT_CNT_MASK)
-#define PWM_FFILT_GSTR_MASK                      (0x8000U)
-#define PWM_FFILT_GSTR_SHIFT                     (15U)
-#define PWM_FFILT_GSTR(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_GSTR_SHIFT)) & PWM_FFILT_GSTR_MASK)
+#define PWM_FFILT_FILT_PER_MASK  (0xFFU)
+#define PWM_FFILT_FILT_PER_SHIFT (0U)
+#define PWM_FFILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_PER_SHIFT)) & PWM_FFILT_FILT_PER_MASK)
+#define PWM_FFILT_FILT_CNT_MASK  (0x700U)
+#define PWM_FFILT_FILT_CNT_SHIFT (8U)
+#define PWM_FFILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_FILT_CNT_SHIFT)) & PWM_FFILT_FILT_CNT_MASK)
+#define PWM_FFILT_GSTR_MASK      (0x8000U)
+#define PWM_FFILT_GSTR_SHIFT     (15U)
+#define PWM_FFILT_GSTR(x)        (((uint16_t)(((uint16_t)(x)) << PWM_FFILT_GSTR_SHIFT)) & PWM_FFILT_GSTR_MASK)
 /*! @} */
 
 /*! @name FTST - Fault Test Register */
 /*! @{ */
-#define PWM_FTST_FTEST_MASK                      (0x1U)
-#define PWM_FTST_FTEST_SHIFT                     (0U)
-#define PWM_FTST_FTEST(x)                        (((uint16_t)(((uint16_t)(x)) << PWM_FTST_FTEST_SHIFT)) & PWM_FTST_FTEST_MASK)
+#define PWM_FTST_FTEST_MASK  (0x1U)
+#define PWM_FTST_FTEST_SHIFT (0U)
+#define PWM_FTST_FTEST(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FTST_FTEST_SHIFT)) & PWM_FTST_FTEST_MASK)
 /*! @} */
 
 /*! @name FCTRL2 - Fault Control 2 Register */
 /*! @{ */
-#define PWM_FCTRL2_NOCOMB_MASK                   (0xFU)
-#define PWM_FCTRL2_NOCOMB_SHIFT                  (0U)
-#define PWM_FCTRL2_NOCOMB(x)                     (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL2_NOCOMB_SHIFT)) & PWM_FCTRL2_NOCOMB_MASK)
+#define PWM_FCTRL2_NOCOMB_MASK  (0xFU)
+#define PWM_FCTRL2_NOCOMB_SHIFT (0U)
+#define PWM_FCTRL2_NOCOMB(x)    (((uint16_t)(((uint16_t)(x)) << PWM_FCTRL2_NOCOMB_SHIFT)) & PWM_FCTRL2_NOCOMB_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group PWM_Register_Masks */
 
-
 /* PWM - Peripheral instance base addresses */
 /** Peripheral PWM1 base address */
-#define PWM1_BASE                                (0x403DC000u)
+#define PWM1_BASE (0x403DC000u)
 /** Peripheral PWM1 base pointer */
-#define PWM1                                     ((PWM_Type *)PWM1_BASE)
+#define PWM1 ((PWM_Type *)PWM1_BASE)
 /** Peripheral PWM2 base address */
-#define PWM2_BASE                                (0x403E0000u)
+#define PWM2_BASE (0x403E0000u)
 /** Peripheral PWM2 base pointer */
-#define PWM2                                     ((PWM_Type *)PWM2_BASE)
+#define PWM2 ((PWM_Type *)PWM2_BASE)
 /** Peripheral PWM3 base address */
-#define PWM3_BASE                                (0x403E4000u)
+#define PWM3_BASE (0x403E4000u)
 /** Peripheral PWM3 base pointer */
-#define PWM3                                     ((PWM_Type *)PWM3_BASE)
+#define PWM3 ((PWM_Type *)PWM3_BASE)
 /** Peripheral PWM4 base address */
-#define PWM4_BASE                                (0x403E8000u)
+#define PWM4_BASE (0x403E8000u)
 /** Peripheral PWM4 base pointer */
-#define PWM4                                     ((PWM_Type *)PWM4_BASE)
+#define PWM4 ((PWM_Type *)PWM4_BASE)
 /** Array initializer of PWM peripheral base addresses */
-#define PWM_BASE_ADDRS                           { 0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE }
+#define PWM_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, PWM1_BASE, PWM2_BASE, PWM3_BASE, PWM4_BASE                                                                 \
+    }
 /** Array initializer of PWM peripheral base pointers */
-#define PWM_BASE_PTRS                            { (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4 }
+#define PWM_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (PWM_Type *)0u, PWM1, PWM2, PWM3, PWM4                                                                         \
+    }
 /** Interrupt vectors for the PWM peripheral type */
-#define PWM_CMP_IRQS                             { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_RELOAD_IRQS                          { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_CAPTURE_IRQS                         { { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }, { PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn }, { PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn }, { PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn }, { PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn } }
-#define PWM_FAULT_IRQS                           { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
-#define PWM_RELOAD_ERROR_IRQS                    { NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn }
+#define PWM_CMP_IRQS                                                                                                   \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_RELOAD_IRQS                                                                                                \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_CAPTURE_IRQS                                                                                               \
+    {                                                                                                                  \
+        {NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn},                                                  \
+            {PWM1_0_IRQn, PWM1_1_IRQn, PWM1_2_IRQn, PWM1_3_IRQn},                                                      \
+            {PWM2_0_IRQn, PWM2_1_IRQn, PWM2_2_IRQn, PWM2_3_IRQn},                                                      \
+            {PWM3_0_IRQn, PWM3_1_IRQn, PWM3_2_IRQn, PWM3_3_IRQn},                                                      \
+        {                                                                                                              \
+            PWM4_0_IRQn, PWM4_1_IRQn, PWM4_2_IRQn, PWM4_3_IRQn                                                         \
+        }                                                                                                              \
+    }
+#define PWM_FAULT_IRQS                                                                                                 \
+    {                                                                                                                  \
+        NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn                              \
+    }
+#define PWM_RELOAD_ERROR_IRQS                                                                                          \
+    {                                                                                                                  \
+        NotAvail_IRQn, PWM1_FAULT_IRQn, PWM2_FAULT_IRQn, PWM3_FAULT_IRQn, PWM4_FAULT_IRQn                              \
+    }
 
 /*!
  * @}
  */ /* end of group PWM_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- ROMC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18183,15 +20874,16 @@ typedef struct {
  */
 
 /** ROMC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[212];
-  __IO uint32_t ROMPATCHD[8];                      /**< ROMC Data Registers, array offset: 0xD4, array step: 0x4 */
-  __IO uint32_t ROMPATCHCNTL;                      /**< ROMC Control Register, offset: 0xF4 */
-       uint32_t ROMPATCHENH;                       /**< ROMC Enable Register High, offset: 0xF8 */
-  __IO uint32_t ROMPATCHENL;                       /**< ROMC Enable Register Low, offset: 0xFC */
-  __IO uint32_t ROMPATCHA[16];                     /**< ROMC Address Registers, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_1[200];
-  __IO uint32_t ROMPATCHSR;                        /**< ROMC Status Register, offset: 0x208 */
+typedef struct
+{
+    uint8_t RESERVED_0[212];
+    __IO uint32_t ROMPATCHD[8];  /**< ROMC Data Registers, array offset: 0xD4, array step: 0x4 */
+    __IO uint32_t ROMPATCHCNTL;  /**< ROMC Control Register, offset: 0xF4 */
+    uint32_t ROMPATCHENH;        /**< ROMC Enable Register High, offset: 0xF8 */
+    __IO uint32_t ROMPATCHENL;   /**< ROMC Enable Register Low, offset: 0xFC */
+    __IO uint32_t ROMPATCHA[16]; /**< ROMC Address Registers, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_1[200];
+    __IO uint32_t ROMPATCHSR; /**< ROMC Status Register, offset: 0x208 */
 } ROMC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18205,75 +20897,85 @@ typedef struct {
 
 /*! @name ROMPATCHD - ROMC Data Registers */
 /*! @{ */
-#define ROMC_ROMPATCHD_DATAX_MASK                (0xFFFFFFFFU)
-#define ROMC_ROMPATCHD_DATAX_SHIFT               (0U)
-#define ROMC_ROMPATCHD_DATAX(x)                  (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHD_DATAX_SHIFT)) & ROMC_ROMPATCHD_DATAX_MASK)
+#define ROMC_ROMPATCHD_DATAX_MASK  (0xFFFFFFFFU)
+#define ROMC_ROMPATCHD_DATAX_SHIFT (0U)
+#define ROMC_ROMPATCHD_DATAX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHD_DATAX_SHIFT)) & ROMC_ROMPATCHD_DATAX_MASK)
 /*! @} */
 
 /* The count of ROMC_ROMPATCHD */
-#define ROMC_ROMPATCHD_COUNT                     (8U)
+#define ROMC_ROMPATCHD_COUNT (8U)
 
 /*! @name ROMPATCHCNTL - ROMC Control Register */
 /*! @{ */
-#define ROMC_ROMPATCHCNTL_DATAFIX_MASK           (0xFFU)
-#define ROMC_ROMPATCHCNTL_DATAFIX_SHIFT          (0U)
-#define ROMC_ROMPATCHCNTL_DATAFIX(x)             (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DATAFIX_SHIFT)) & ROMC_ROMPATCHCNTL_DATAFIX_MASK)
-#define ROMC_ROMPATCHCNTL_DIS_MASK               (0x20000000U)
-#define ROMC_ROMPATCHCNTL_DIS_SHIFT              (29U)
-#define ROMC_ROMPATCHCNTL_DIS(x)                 (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DIS_SHIFT)) & ROMC_ROMPATCHCNTL_DIS_MASK)
+#define ROMC_ROMPATCHCNTL_DATAFIX_MASK  (0xFFU)
+#define ROMC_ROMPATCHCNTL_DATAFIX_SHIFT (0U)
+#define ROMC_ROMPATCHCNTL_DATAFIX(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DATAFIX_SHIFT)) & ROMC_ROMPATCHCNTL_DATAFIX_MASK)
+#define ROMC_ROMPATCHCNTL_DIS_MASK  (0x20000000U)
+#define ROMC_ROMPATCHCNTL_DIS_SHIFT (29U)
+#define ROMC_ROMPATCHCNTL_DIS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHCNTL_DIS_SHIFT)) & ROMC_ROMPATCHCNTL_DIS_MASK)
 /*! @} */
 
 /*! @name ROMPATCHENL - ROMC Enable Register Low */
 /*! @{ */
-#define ROMC_ROMPATCHENL_ENABLE_MASK             (0xFFFFU)
-#define ROMC_ROMPATCHENL_ENABLE_SHIFT            (0U)
-#define ROMC_ROMPATCHENL_ENABLE(x)               (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHENL_ENABLE_SHIFT)) & ROMC_ROMPATCHENL_ENABLE_MASK)
+#define ROMC_ROMPATCHENL_ENABLE_MASK  (0xFFFFU)
+#define ROMC_ROMPATCHENL_ENABLE_SHIFT (0U)
+#define ROMC_ROMPATCHENL_ENABLE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHENL_ENABLE_SHIFT)) & ROMC_ROMPATCHENL_ENABLE_MASK)
 /*! @} */
 
 /*! @name ROMPATCHA - ROMC Address Registers */
 /*! @{ */
-#define ROMC_ROMPATCHA_THUMBX_MASK               (0x1U)
-#define ROMC_ROMPATCHA_THUMBX_SHIFT              (0U)
-#define ROMC_ROMPATCHA_THUMBX(x)                 (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_THUMBX_SHIFT)) & ROMC_ROMPATCHA_THUMBX_MASK)
-#define ROMC_ROMPATCHA_ADDRX_MASK                (0x7FFFFEU)
-#define ROMC_ROMPATCHA_ADDRX_SHIFT               (1U)
-#define ROMC_ROMPATCHA_ADDRX(x)                  (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_ADDRX_SHIFT)) & ROMC_ROMPATCHA_ADDRX_MASK)
+#define ROMC_ROMPATCHA_THUMBX_MASK  (0x1U)
+#define ROMC_ROMPATCHA_THUMBX_SHIFT (0U)
+#define ROMC_ROMPATCHA_THUMBX(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_THUMBX_SHIFT)) & ROMC_ROMPATCHA_THUMBX_MASK)
+#define ROMC_ROMPATCHA_ADDRX_MASK  (0x7FFFFEU)
+#define ROMC_ROMPATCHA_ADDRX_SHIFT (1U)
+#define ROMC_ROMPATCHA_ADDRX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHA_ADDRX_SHIFT)) & ROMC_ROMPATCHA_ADDRX_MASK)
 /*! @} */
 
 /* The count of ROMC_ROMPATCHA */
-#define ROMC_ROMPATCHA_COUNT                     (16U)
+#define ROMC_ROMPATCHA_COUNT (16U)
 
 /*! @name ROMPATCHSR - ROMC Status Register */
 /*! @{ */
-#define ROMC_ROMPATCHSR_SOURCE_MASK              (0x3FU)
-#define ROMC_ROMPATCHSR_SOURCE_SHIFT             (0U)
-#define ROMC_ROMPATCHSR_SOURCE(x)                (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SOURCE_SHIFT)) & ROMC_ROMPATCHSR_SOURCE_MASK)
-#define ROMC_ROMPATCHSR_SW_MASK                  (0x20000U)
-#define ROMC_ROMPATCHSR_SW_SHIFT                 (17U)
-#define ROMC_ROMPATCHSR_SW(x)                    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SW_SHIFT)) & ROMC_ROMPATCHSR_SW_MASK)
+#define ROMC_ROMPATCHSR_SOURCE_MASK  (0x3FU)
+#define ROMC_ROMPATCHSR_SOURCE_SHIFT (0U)
+#define ROMC_ROMPATCHSR_SOURCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SOURCE_SHIFT)) & ROMC_ROMPATCHSR_SOURCE_MASK)
+#define ROMC_ROMPATCHSR_SW_MASK  (0x20000U)
+#define ROMC_ROMPATCHSR_SW_SHIFT (17U)
+#define ROMC_ROMPATCHSR_SW(x)    (((uint32_t)(((uint32_t)(x)) << ROMC_ROMPATCHSR_SW_SHIFT)) & ROMC_ROMPATCHSR_SW_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group ROMC_Register_Masks */
 
-
 /* ROMC - Peripheral instance base addresses */
 /** Peripheral ROMC base address */
-#define ROMC_BASE                                (0x40180000u)
+#define ROMC_BASE (0x40180000u)
 /** Peripheral ROMC base pointer */
-#define ROMC                                     ((ROMC_Type *)ROMC_BASE)
+#define ROMC ((ROMC_Type *)ROMC_BASE)
 /** Array initializer of ROMC peripheral base addresses */
-#define ROMC_BASE_ADDRS                          { ROMC_BASE }
+#define ROMC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        ROMC_BASE                                                                                                      \
+    }
 /** Array initializer of ROMC peripheral base pointers */
-#define ROMC_BASE_PTRS                           { ROMC }
+#define ROMC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        ROMC                                                                                                           \
+    }
 
 /*!
  * @}
  */ /* end of group ROMC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- RTWDOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18284,11 +20986,12 @@ typedef struct {
  */
 
 /** RTWDOG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t CS;                                /**< Watchdog Control and Status Register, offset: 0x0 */
-  __IO uint32_t CNT;                               /**< Watchdog Counter Register, offset: 0x4 */
-  __IO uint32_t TOVAL;                             /**< Watchdog Timeout Value Register, offset: 0x8 */
-  __IO uint32_t WIN;                               /**< Watchdog Window Register, offset: 0xC */
+typedef struct
+{
+    __IO uint32_t CS;    /**< Watchdog Control and Status Register, offset: 0x0 */
+    __IO uint32_t CNT;   /**< Watchdog Counter Register, offset: 0x4 */
+    __IO uint32_t TOVAL; /**< Watchdog Timeout Value Register, offset: 0x8 */
+    __IO uint32_t WIN;   /**< Watchdog Window Register, offset: 0xC */
 } RTWDOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18302,107 +21005,114 @@ typedef struct {
 
 /*! @name CS - Watchdog Control and Status Register */
 /*! @{ */
-#define RTWDOG_CS_STOP_MASK                      (0x1U)
-#define RTWDOG_CS_STOP_SHIFT                     (0U)
-#define RTWDOG_CS_STOP(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)
-#define RTWDOG_CS_WAIT_MASK                      (0x2U)
-#define RTWDOG_CS_WAIT_SHIFT                     (1U)
-#define RTWDOG_CS_WAIT(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)
-#define RTWDOG_CS_DBG_MASK                       (0x4U)
-#define RTWDOG_CS_DBG_SHIFT                      (2U)
-#define RTWDOG_CS_DBG(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)
-#define RTWDOG_CS_TST_MASK                       (0x18U)
-#define RTWDOG_CS_TST_SHIFT                      (3U)
-#define RTWDOG_CS_TST(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)
-#define RTWDOG_CS_UPDATE_MASK                    (0x20U)
-#define RTWDOG_CS_UPDATE_SHIFT                   (5U)
-#define RTWDOG_CS_UPDATE(x)                      (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)
-#define RTWDOG_CS_INT_MASK                       (0x40U)
-#define RTWDOG_CS_INT_SHIFT                      (6U)
-#define RTWDOG_CS_INT(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)
-#define RTWDOG_CS_EN_MASK                        (0x80U)
-#define RTWDOG_CS_EN_SHIFT                       (7U)
-#define RTWDOG_CS_EN(x)                          (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)
-#define RTWDOG_CS_CLK_MASK                       (0x300U)
-#define RTWDOG_CS_CLK_SHIFT                      (8U)
-#define RTWDOG_CS_CLK(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)
-#define RTWDOG_CS_RCS_MASK                       (0x400U)
-#define RTWDOG_CS_RCS_SHIFT                      (10U)
-#define RTWDOG_CS_RCS(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)
-#define RTWDOG_CS_ULK_MASK                       (0x800U)
-#define RTWDOG_CS_ULK_SHIFT                      (11U)
-#define RTWDOG_CS_ULK(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)
-#define RTWDOG_CS_PRES_MASK                      (0x1000U)
-#define RTWDOG_CS_PRES_SHIFT                     (12U)
-#define RTWDOG_CS_PRES(x)                        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)
-#define RTWDOG_CS_CMD32EN_MASK                   (0x2000U)
-#define RTWDOG_CS_CMD32EN_SHIFT                  (13U)
-#define RTWDOG_CS_CMD32EN(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)
-#define RTWDOG_CS_FLG_MASK                       (0x4000U)
-#define RTWDOG_CS_FLG_SHIFT                      (14U)
-#define RTWDOG_CS_FLG(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)
-#define RTWDOG_CS_WIN_MASK                       (0x8000U)
-#define RTWDOG_CS_WIN_SHIFT                      (15U)
-#define RTWDOG_CS_WIN(x)                         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)
+#define RTWDOG_CS_STOP_MASK     (0x1U)
+#define RTWDOG_CS_STOP_SHIFT    (0U)
+#define RTWDOG_CS_STOP(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_STOP_SHIFT)) & RTWDOG_CS_STOP_MASK)
+#define RTWDOG_CS_WAIT_MASK     (0x2U)
+#define RTWDOG_CS_WAIT_SHIFT    (1U)
+#define RTWDOG_CS_WAIT(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WAIT_SHIFT)) & RTWDOG_CS_WAIT_MASK)
+#define RTWDOG_CS_DBG_MASK      (0x4U)
+#define RTWDOG_CS_DBG_SHIFT     (2U)
+#define RTWDOG_CS_DBG(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_DBG_SHIFT)) & RTWDOG_CS_DBG_MASK)
+#define RTWDOG_CS_TST_MASK      (0x18U)
+#define RTWDOG_CS_TST_SHIFT     (3U)
+#define RTWDOG_CS_TST(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_TST_SHIFT)) & RTWDOG_CS_TST_MASK)
+#define RTWDOG_CS_UPDATE_MASK   (0x20U)
+#define RTWDOG_CS_UPDATE_SHIFT  (5U)
+#define RTWDOG_CS_UPDATE(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_UPDATE_SHIFT)) & RTWDOG_CS_UPDATE_MASK)
+#define RTWDOG_CS_INT_MASK      (0x40U)
+#define RTWDOG_CS_INT_SHIFT     (6U)
+#define RTWDOG_CS_INT(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_INT_SHIFT)) & RTWDOG_CS_INT_MASK)
+#define RTWDOG_CS_EN_MASK       (0x80U)
+#define RTWDOG_CS_EN_SHIFT      (7U)
+#define RTWDOG_CS_EN(x)         (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_EN_SHIFT)) & RTWDOG_CS_EN_MASK)
+#define RTWDOG_CS_CLK_MASK      (0x300U)
+#define RTWDOG_CS_CLK_SHIFT     (8U)
+#define RTWDOG_CS_CLK(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CLK_SHIFT)) & RTWDOG_CS_CLK_MASK)
+#define RTWDOG_CS_RCS_MASK      (0x400U)
+#define RTWDOG_CS_RCS_SHIFT     (10U)
+#define RTWDOG_CS_RCS(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_RCS_SHIFT)) & RTWDOG_CS_RCS_MASK)
+#define RTWDOG_CS_ULK_MASK      (0x800U)
+#define RTWDOG_CS_ULK_SHIFT     (11U)
+#define RTWDOG_CS_ULK(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_ULK_SHIFT)) & RTWDOG_CS_ULK_MASK)
+#define RTWDOG_CS_PRES_MASK     (0x1000U)
+#define RTWDOG_CS_PRES_SHIFT    (12U)
+#define RTWDOG_CS_PRES(x)       (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_PRES_SHIFT)) & RTWDOG_CS_PRES_MASK)
+#define RTWDOG_CS_CMD32EN_MASK  (0x2000U)
+#define RTWDOG_CS_CMD32EN_SHIFT (13U)
+#define RTWDOG_CS_CMD32EN(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_CMD32EN_SHIFT)) & RTWDOG_CS_CMD32EN_MASK)
+#define RTWDOG_CS_FLG_MASK      (0x4000U)
+#define RTWDOG_CS_FLG_SHIFT     (14U)
+#define RTWDOG_CS_FLG(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_FLG_SHIFT)) & RTWDOG_CS_FLG_MASK)
+#define RTWDOG_CS_WIN_MASK      (0x8000U)
+#define RTWDOG_CS_WIN_SHIFT     (15U)
+#define RTWDOG_CS_WIN(x)        (((uint32_t)(((uint32_t)(x)) << RTWDOG_CS_WIN_SHIFT)) & RTWDOG_CS_WIN_MASK)
 /*! @} */
 
 /*! @name CNT - Watchdog Counter Register */
 /*! @{ */
-#define RTWDOG_CNT_CNTLOW_MASK                   (0xFFU)
-#define RTWDOG_CNT_CNTLOW_SHIFT                  (0U)
-#define RTWDOG_CNT_CNTLOW(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)
-#define RTWDOG_CNT_CNTHIGH_MASK                  (0xFF00U)
-#define RTWDOG_CNT_CNTHIGH_SHIFT                 (8U)
-#define RTWDOG_CNT_CNTHIGH(x)                    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)
+#define RTWDOG_CNT_CNTLOW_MASK   (0xFFU)
+#define RTWDOG_CNT_CNTLOW_SHIFT  (0U)
+#define RTWDOG_CNT_CNTLOW(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTLOW_SHIFT)) & RTWDOG_CNT_CNTLOW_MASK)
+#define RTWDOG_CNT_CNTHIGH_MASK  (0xFF00U)
+#define RTWDOG_CNT_CNTHIGH_SHIFT (8U)
+#define RTWDOG_CNT_CNTHIGH(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_CNT_CNTHIGH_SHIFT)) & RTWDOG_CNT_CNTHIGH_MASK)
 /*! @} */
 
 /*! @name TOVAL - Watchdog Timeout Value Register */
 /*! @{ */
-#define RTWDOG_TOVAL_TOVALLOW_MASK               (0xFFU)
-#define RTWDOG_TOVAL_TOVALLOW_SHIFT              (0U)
-#define RTWDOG_TOVAL_TOVALLOW(x)                 (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)
-#define RTWDOG_TOVAL_TOVALHIGH_MASK              (0xFF00U)
-#define RTWDOG_TOVAL_TOVALHIGH_SHIFT             (8U)
-#define RTWDOG_TOVAL_TOVALHIGH(x)                (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)
+#define RTWDOG_TOVAL_TOVALLOW_MASK  (0xFFU)
+#define RTWDOG_TOVAL_TOVALLOW_SHIFT (0U)
+#define RTWDOG_TOVAL_TOVALLOW(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALLOW_SHIFT)) & RTWDOG_TOVAL_TOVALLOW_MASK)
+#define RTWDOG_TOVAL_TOVALHIGH_MASK  (0xFF00U)
+#define RTWDOG_TOVAL_TOVALHIGH_SHIFT (8U)
+#define RTWDOG_TOVAL_TOVALHIGH(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << RTWDOG_TOVAL_TOVALHIGH_SHIFT)) & RTWDOG_TOVAL_TOVALHIGH_MASK)
 /*! @} */
 
 /*! @name WIN - Watchdog Window Register */
 /*! @{ */
-#define RTWDOG_WIN_WINLOW_MASK                   (0xFFU)
-#define RTWDOG_WIN_WINLOW_SHIFT                  (0U)
-#define RTWDOG_WIN_WINLOW(x)                     (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)
-#define RTWDOG_WIN_WINHIGH_MASK                  (0xFF00U)
-#define RTWDOG_WIN_WINHIGH_SHIFT                 (8U)
-#define RTWDOG_WIN_WINHIGH(x)                    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)
+#define RTWDOG_WIN_WINLOW_MASK   (0xFFU)
+#define RTWDOG_WIN_WINLOW_SHIFT  (0U)
+#define RTWDOG_WIN_WINLOW(x)     (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINLOW_SHIFT)) & RTWDOG_WIN_WINLOW_MASK)
+#define RTWDOG_WIN_WINHIGH_MASK  (0xFF00U)
+#define RTWDOG_WIN_WINHIGH_SHIFT (8U)
+#define RTWDOG_WIN_WINHIGH(x)    (((uint32_t)(((uint32_t)(x)) << RTWDOG_WIN_WINHIGH_SHIFT)) & RTWDOG_WIN_WINHIGH_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group RTWDOG_Register_Masks */
 
-
 /* RTWDOG - Peripheral instance base addresses */
 /** Peripheral RTWDOG base address */
-#define RTWDOG_BASE                              (0x400BC000u)
+#define RTWDOG_BASE (0x400BC000u)
 /** Peripheral RTWDOG base pointer */
-#define RTWDOG                                   ((RTWDOG_Type *)RTWDOG_BASE)
+#define RTWDOG ((RTWDOG_Type *)RTWDOG_BASE)
 /** Array initializer of RTWDOG peripheral base addresses */
-#define RTWDOG_BASE_ADDRS                        { RTWDOG_BASE }
+#define RTWDOG_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        RTWDOG_BASE                                                                                                    \
+    }
 /** Array initializer of RTWDOG peripheral base pointers */
-#define RTWDOG_BASE_PTRS                         { RTWDOG }
+#define RTWDOG_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        RTWDOG                                                                                                         \
+    }
 /** Interrupt vectors for the RTWDOG peripheral type */
-#define RTWDOG_IRQS                              { RTWDOG_IRQn }
+#define RTWDOG_IRQS                                                                                                    \
+    {                                                                                                                  \
+        RTWDOG_IRQn                                                                                                    \
+    }
 /* Extra definition */
-#define RTWDOG_UPDATE_KEY                        (0xD928C520U)
-#define RTWDOG_REFRESH_KEY                       (0xB480A602U)
-
+#define RTWDOG_UPDATE_KEY  (0xD928C520U)
+#define RTWDOG_REFRESH_KEY (0xB480A602U)
 
 /*!
  * @}
  */ /* end of group RTWDOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SEMC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -18413,58 +21123,60 @@ typedef struct {
  */
 
 /** SEMC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCR;                               /**< Module Control Register, offset: 0x0 */
-  __IO uint32_t IOCR;                              /**< IO Mux Control Register, offset: 0x4 */
-  __IO uint32_t BMCR0;                             /**< Master Bus (AXI) Control Register 0, offset: 0x8 */
-  __IO uint32_t BMCR1;                             /**< Master Bus (AXI) Control Register 1, offset: 0xC */
-  __IO uint32_t BR[9];                             /**< Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device), array offset: 0x10, array step: 0x4 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t INTEN;                             /**< Interrupt Enable Register, offset: 0x38 */
-  __IO uint32_t INTR;                              /**< Interrupt Enable Register, offset: 0x3C */
-  __IO uint32_t SDRAMCR0;                          /**< SDRAM control register 0, offset: 0x40 */
-  __IO uint32_t SDRAMCR1;                          /**< SDRAM control register 1, offset: 0x44 */
-  __IO uint32_t SDRAMCR2;                          /**< SDRAM control register 2, offset: 0x48 */
-  __IO uint32_t SDRAMCR3;                          /**< SDRAM control register 3, offset: 0x4C */
-  __IO uint32_t NANDCR0;                           /**< NAND control register 0, offset: 0x50 */
-  __IO uint32_t NANDCR1;                           /**< NAND control register 1, offset: 0x54 */
-  __IO uint32_t NANDCR2;                           /**< NAND control register 2, offset: 0x58 */
-  __IO uint32_t NANDCR3;                           /**< NAND control register 3, offset: 0x5C */
-  __IO uint32_t NORCR0;                            /**< NOR control register 0, offset: 0x60 */
-  __IO uint32_t NORCR1;                            /**< NOR control register 1, offset: 0x64 */
-  __IO uint32_t NORCR2;                            /**< NOR control register 2, offset: 0x68 */
-       uint32_t NORCR3;                            /**< NOR control register 3, offset: 0x6C */
-  __IO uint32_t SRAMCR0;                           /**< SRAM control register 0, offset: 0x70 */
-  __IO uint32_t SRAMCR1;                           /**< SRAM control register 1, offset: 0x74 */
-  __IO uint32_t SRAMCR2;                           /**< SRAM control register 2, offset: 0x78 */
-       uint32_t SRAMCR3;                           /**< SRAM control register 3, offset: 0x7C */
-  __IO uint32_t DBICR0;                            /**< DBI-B control register 0, offset: 0x80 */
-  __IO uint32_t DBICR1;                            /**< DBI-B control register 1, offset: 0x84 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t IPCR0;                             /**< IP Command control register 0, offset: 0x90 */
-  __IO uint32_t IPCR1;                             /**< IP Command control register 1, offset: 0x94 */
-  __IO uint32_t IPCR2;                             /**< IP Command control register 2, offset: 0x98 */
-  __IO uint32_t IPCMD;                             /**< IP Command register, offset: 0x9C */
-  __IO uint32_t IPTXDAT;                           /**< TX DATA register (for IP Command), offset: 0xA0 */
-       uint8_t RESERVED_2[12];
-  __I  uint32_t IPRXDAT;                           /**< RX DATA register (for IP Command), offset: 0xB0 */
-       uint8_t RESERVED_3[12];
-  __I  uint32_t STS0;                              /**< Status register 0, offset: 0xC0 */
-       uint32_t STS1;                              /**< Status register 1, offset: 0xC4 */
-  __I  uint32_t STS2;                              /**< Status register 2, offset: 0xC8 */
-       uint32_t STS3;                              /**< Status register 3, offset: 0xCC */
-       uint32_t STS4;                              /**< Status register 4, offset: 0xD0 */
-       uint32_t STS5;                              /**< Status register 5, offset: 0xD4 */
-       uint32_t STS6;                              /**< Status register 6, offset: 0xD8 */
-       uint32_t STS7;                              /**< Status register 7, offset: 0xDC */
-       uint32_t STS8;                              /**< Status register 8, offset: 0xE0 */
-       uint32_t STS9;                              /**< Status register 9, offset: 0xE4 */
-       uint32_t STS10;                             /**< Status register 10, offset: 0xE8 */
-       uint32_t STS11;                             /**< Status register 11, offset: 0xEC */
-  __I  uint32_t STS12;                             /**< Status register 12, offset: 0xF0 */
-       uint32_t STS13;                             /**< Status register 13, offset: 0xF4 */
-       uint32_t STS14;                             /**< Status register 14, offset: 0xF8 */
-       uint32_t STS15;                             /**< Status register 15, offset: 0xFC */
+typedef struct
+{
+    __IO uint32_t MCR;   /**< Module Control Register, offset: 0x0 */
+    __IO uint32_t IOCR;  /**< IO Mux Control Register, offset: 0x4 */
+    __IO uint32_t BMCR0; /**< Master Bus (AXI) Control Register 0, offset: 0x8 */
+    __IO uint32_t BMCR1; /**< Master Bus (AXI) Control Register 1, offset: 0xC */
+    __IO uint32_t BR[9]; /**< Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device), array offset:
+                            0x10, array step: 0x4 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t INTEN;    /**< Interrupt Enable Register, offset: 0x38 */
+    __IO uint32_t INTR;     /**< Interrupt Enable Register, offset: 0x3C */
+    __IO uint32_t SDRAMCR0; /**< SDRAM control register 0, offset: 0x40 */
+    __IO uint32_t SDRAMCR1; /**< SDRAM control register 1, offset: 0x44 */
+    __IO uint32_t SDRAMCR2; /**< SDRAM control register 2, offset: 0x48 */
+    __IO uint32_t SDRAMCR3; /**< SDRAM control register 3, offset: 0x4C */
+    __IO uint32_t NANDCR0;  /**< NAND control register 0, offset: 0x50 */
+    __IO uint32_t NANDCR1;  /**< NAND control register 1, offset: 0x54 */
+    __IO uint32_t NANDCR2;  /**< NAND control register 2, offset: 0x58 */
+    __IO uint32_t NANDCR3;  /**< NAND control register 3, offset: 0x5C */
+    __IO uint32_t NORCR0;   /**< NOR control register 0, offset: 0x60 */
+    __IO uint32_t NORCR1;   /**< NOR control register 1, offset: 0x64 */
+    __IO uint32_t NORCR2;   /**< NOR control register 2, offset: 0x68 */
+    uint32_t NORCR3;        /**< NOR control register 3, offset: 0x6C */
+    __IO uint32_t SRAMCR0;  /**< SRAM control register 0, offset: 0x70 */
+    __IO uint32_t SRAMCR1;  /**< SRAM control register 1, offset: 0x74 */
+    __IO uint32_t SRAMCR2;  /**< SRAM control register 2, offset: 0x78 */
+    uint32_t SRAMCR3;       /**< SRAM control register 3, offset: 0x7C */
+    __IO uint32_t DBICR0;   /**< DBI-B control register 0, offset: 0x80 */
+    __IO uint32_t DBICR1;   /**< DBI-B control register 1, offset: 0x84 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t IPCR0;   /**< IP Command control register 0, offset: 0x90 */
+    __IO uint32_t IPCR1;   /**< IP Command control register 1, offset: 0x94 */
+    __IO uint32_t IPCR2;   /**< IP Command control register 2, offset: 0x98 */
+    __IO uint32_t IPCMD;   /**< IP Command register, offset: 0x9C */
+    __IO uint32_t IPTXDAT; /**< TX DATA register (for IP Command), offset: 0xA0 */
+    uint8_t RESERVED_2[12];
+    __I uint32_t IPRXDAT; /**< RX DATA register (for IP Command), offset: 0xB0 */
+    uint8_t RESERVED_3[12];
+    __I uint32_t STS0;  /**< Status register 0, offset: 0xC0 */
+    uint32_t STS1;      /**< Status register 1, offset: 0xC4 */
+    __I uint32_t STS2;  /**< Status register 2, offset: 0xC8 */
+    uint32_t STS3;      /**< Status register 3, offset: 0xCC */
+    uint32_t STS4;      /**< Status register 4, offset: 0xD0 */
+    uint32_t STS5;      /**< Status register 5, offset: 0xD4 */
+    uint32_t STS6;      /**< Status register 6, offset: 0xD8 */
+    uint32_t STS7;      /**< Status register 7, offset: 0xDC */
+    uint32_t STS8;      /**< Status register 8, offset: 0xE0 */
+    uint32_t STS9;      /**< Status register 9, offset: 0xE4 */
+    uint32_t STS10;     /**< Status register 10, offset: 0xE8 */
+    uint32_t STS11;     /**< Status register 11, offset: 0xEC */
+    __I uint32_t STS12; /**< Status register 12, offset: 0xF0 */
+    uint32_t STS13;     /**< Status register 13, offset: 0xF4 */
+    uint32_t STS14;     /**< Status register 14, offset: 0xF8 */
+    uint32_t STS15;     /**< Status register 15, offset: 0xFC */
 } SEMC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -18478,584 +21190,603 @@ typedef struct {
 
 /*! @name MCR - Module Control Register */
 /*! @{ */
-#define SEMC_MCR_SWRST_MASK                      (0x1U)
-#define SEMC_MCR_SWRST_SHIFT                     (0U)
-#define SEMC_MCR_SWRST(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_SWRST_SHIFT)) & SEMC_MCR_SWRST_MASK)
-#define SEMC_MCR_MDIS_MASK                       (0x2U)
-#define SEMC_MCR_MDIS_SHIFT                      (1U)
-#define SEMC_MCR_MDIS(x)                         (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_MDIS_SHIFT)) & SEMC_MCR_MDIS_MASK)
-#define SEMC_MCR_DQSMD_MASK                      (0x4U)
-#define SEMC_MCR_DQSMD_SHIFT                     (2U)
-#define SEMC_MCR_DQSMD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_DQSMD_SHIFT)) & SEMC_MCR_DQSMD_MASK)
-#define SEMC_MCR_WPOL0_MASK                      (0x40U)
-#define SEMC_MCR_WPOL0_SHIFT                     (6U)
-#define SEMC_MCR_WPOL0(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL0_SHIFT)) & SEMC_MCR_WPOL0_MASK)
-#define SEMC_MCR_WPOL1_MASK                      (0x80U)
-#define SEMC_MCR_WPOL1_SHIFT                     (7U)
-#define SEMC_MCR_WPOL1(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL1_SHIFT)) & SEMC_MCR_WPOL1_MASK)
-#define SEMC_MCR_CTO_MASK                        (0xFF0000U)
-#define SEMC_MCR_CTO_SHIFT                       (16U)
-#define SEMC_MCR_CTO(x)                          (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_CTO_SHIFT)) & SEMC_MCR_CTO_MASK)
-#define SEMC_MCR_BTO_MASK                        (0x1F000000U)
-#define SEMC_MCR_BTO_SHIFT                       (24U)
-#define SEMC_MCR_BTO(x)                          (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_BTO_SHIFT)) & SEMC_MCR_BTO_MASK)
+#define SEMC_MCR_SWRST_MASK  (0x1U)
+#define SEMC_MCR_SWRST_SHIFT (0U)
+#define SEMC_MCR_SWRST(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_SWRST_SHIFT)) & SEMC_MCR_SWRST_MASK)
+#define SEMC_MCR_MDIS_MASK   (0x2U)
+#define SEMC_MCR_MDIS_SHIFT  (1U)
+#define SEMC_MCR_MDIS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_MDIS_SHIFT)) & SEMC_MCR_MDIS_MASK)
+#define SEMC_MCR_DQSMD_MASK  (0x4U)
+#define SEMC_MCR_DQSMD_SHIFT (2U)
+#define SEMC_MCR_DQSMD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_DQSMD_SHIFT)) & SEMC_MCR_DQSMD_MASK)
+#define SEMC_MCR_WPOL0_MASK  (0x40U)
+#define SEMC_MCR_WPOL0_SHIFT (6U)
+#define SEMC_MCR_WPOL0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL0_SHIFT)) & SEMC_MCR_WPOL0_MASK)
+#define SEMC_MCR_WPOL1_MASK  (0x80U)
+#define SEMC_MCR_WPOL1_SHIFT (7U)
+#define SEMC_MCR_WPOL1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_WPOL1_SHIFT)) & SEMC_MCR_WPOL1_MASK)
+#define SEMC_MCR_CTO_MASK    (0xFF0000U)
+#define SEMC_MCR_CTO_SHIFT   (16U)
+#define SEMC_MCR_CTO(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_CTO_SHIFT)) & SEMC_MCR_CTO_MASK)
+#define SEMC_MCR_BTO_MASK    (0x1F000000U)
+#define SEMC_MCR_BTO_SHIFT   (24U)
+#define SEMC_MCR_BTO(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_MCR_BTO_SHIFT)) & SEMC_MCR_BTO_MASK)
 /*! @} */
 
 /*! @name IOCR - IO Mux Control Register */
 /*! @{ */
-#define SEMC_IOCR_MUX_A8_MASK                    (0x7U)
-#define SEMC_IOCR_MUX_A8_SHIFT                   (0U)
-#define SEMC_IOCR_MUX_A8(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_A8_SHIFT)) & SEMC_IOCR_MUX_A8_MASK)
-#define SEMC_IOCR_MUX_CSX0_MASK                  (0x38U)
-#define SEMC_IOCR_MUX_CSX0_SHIFT                 (3U)
-#define SEMC_IOCR_MUX_CSX0(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX0_SHIFT)) & SEMC_IOCR_MUX_CSX0_MASK)
-#define SEMC_IOCR_MUX_CSX1_MASK                  (0x1C0U)
-#define SEMC_IOCR_MUX_CSX1_SHIFT                 (6U)
-#define SEMC_IOCR_MUX_CSX1(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX1_SHIFT)) & SEMC_IOCR_MUX_CSX1_MASK)
-#define SEMC_IOCR_MUX_CSX2_MASK                  (0xE00U)
-#define SEMC_IOCR_MUX_CSX2_SHIFT                 (9U)
-#define SEMC_IOCR_MUX_CSX2(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX2_SHIFT)) & SEMC_IOCR_MUX_CSX2_MASK)
-#define SEMC_IOCR_MUX_CSX3_MASK                  (0x7000U)
-#define SEMC_IOCR_MUX_CSX3_SHIFT                 (12U)
-#define SEMC_IOCR_MUX_CSX3(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX3_SHIFT)) & SEMC_IOCR_MUX_CSX3_MASK)
-#define SEMC_IOCR_MUX_RDY_MASK                   (0x38000U)
-#define SEMC_IOCR_MUX_RDY_SHIFT                  (15U)
-#define SEMC_IOCR_MUX_RDY(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_RDY_SHIFT)) & SEMC_IOCR_MUX_RDY_MASK)
+#define SEMC_IOCR_MUX_A8_MASK    (0x7U)
+#define SEMC_IOCR_MUX_A8_SHIFT   (0U)
+#define SEMC_IOCR_MUX_A8(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_A8_SHIFT)) & SEMC_IOCR_MUX_A8_MASK)
+#define SEMC_IOCR_MUX_CSX0_MASK  (0x38U)
+#define SEMC_IOCR_MUX_CSX0_SHIFT (3U)
+#define SEMC_IOCR_MUX_CSX0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX0_SHIFT)) & SEMC_IOCR_MUX_CSX0_MASK)
+#define SEMC_IOCR_MUX_CSX1_MASK  (0x1C0U)
+#define SEMC_IOCR_MUX_CSX1_SHIFT (6U)
+#define SEMC_IOCR_MUX_CSX1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX1_SHIFT)) & SEMC_IOCR_MUX_CSX1_MASK)
+#define SEMC_IOCR_MUX_CSX2_MASK  (0xE00U)
+#define SEMC_IOCR_MUX_CSX2_SHIFT (9U)
+#define SEMC_IOCR_MUX_CSX2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX2_SHIFT)) & SEMC_IOCR_MUX_CSX2_MASK)
+#define SEMC_IOCR_MUX_CSX3_MASK  (0x7000U)
+#define SEMC_IOCR_MUX_CSX3_SHIFT (12U)
+#define SEMC_IOCR_MUX_CSX3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_CSX3_SHIFT)) & SEMC_IOCR_MUX_CSX3_MASK)
+#define SEMC_IOCR_MUX_RDY_MASK   (0x38000U)
+#define SEMC_IOCR_MUX_RDY_SHIFT  (15U)
+#define SEMC_IOCR_MUX_RDY(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_IOCR_MUX_RDY_SHIFT)) & SEMC_IOCR_MUX_RDY_MASK)
 /*! @} */
 
 /*! @name BMCR0 - Master Bus (AXI) Control Register 0 */
 /*! @{ */
-#define SEMC_BMCR0_WQOS_MASK                     (0xFU)
-#define SEMC_BMCR0_WQOS_SHIFT                    (0U)
-#define SEMC_BMCR0_WQOS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WQOS_SHIFT)) & SEMC_BMCR0_WQOS_MASK)
-#define SEMC_BMCR0_WAGE_MASK                     (0xF0U)
-#define SEMC_BMCR0_WAGE_SHIFT                    (4U)
-#define SEMC_BMCR0_WAGE(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WAGE_SHIFT)) & SEMC_BMCR0_WAGE_MASK)
-#define SEMC_BMCR0_WSH_MASK                      (0xFF00U)
-#define SEMC_BMCR0_WSH_SHIFT                     (8U)
-#define SEMC_BMCR0_WSH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WSH_SHIFT)) & SEMC_BMCR0_WSH_MASK)
-#define SEMC_BMCR0_WRWS_MASK                     (0xFF0000U)
-#define SEMC_BMCR0_WRWS_SHIFT                    (16U)
-#define SEMC_BMCR0_WRWS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WRWS_SHIFT)) & SEMC_BMCR0_WRWS_MASK)
+#define SEMC_BMCR0_WQOS_MASK  (0xFU)
+#define SEMC_BMCR0_WQOS_SHIFT (0U)
+#define SEMC_BMCR0_WQOS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WQOS_SHIFT)) & SEMC_BMCR0_WQOS_MASK)
+#define SEMC_BMCR0_WAGE_MASK  (0xF0U)
+#define SEMC_BMCR0_WAGE_SHIFT (4U)
+#define SEMC_BMCR0_WAGE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WAGE_SHIFT)) & SEMC_BMCR0_WAGE_MASK)
+#define SEMC_BMCR0_WSH_MASK   (0xFF00U)
+#define SEMC_BMCR0_WSH_SHIFT  (8U)
+#define SEMC_BMCR0_WSH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WSH_SHIFT)) & SEMC_BMCR0_WSH_MASK)
+#define SEMC_BMCR0_WRWS_MASK  (0xFF0000U)
+#define SEMC_BMCR0_WRWS_SHIFT (16U)
+#define SEMC_BMCR0_WRWS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR0_WRWS_SHIFT)) & SEMC_BMCR0_WRWS_MASK)
 /*! @} */
 
 /*! @name BMCR1 - Master Bus (AXI) Control Register 1 */
 /*! @{ */
-#define SEMC_BMCR1_WQOS_MASK                     (0xFU)
-#define SEMC_BMCR1_WQOS_SHIFT                    (0U)
-#define SEMC_BMCR1_WQOS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WQOS_SHIFT)) & SEMC_BMCR1_WQOS_MASK)
-#define SEMC_BMCR1_WAGE_MASK                     (0xF0U)
-#define SEMC_BMCR1_WAGE_SHIFT                    (4U)
-#define SEMC_BMCR1_WAGE(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WAGE_SHIFT)) & SEMC_BMCR1_WAGE_MASK)
-#define SEMC_BMCR1_WPH_MASK                      (0xFF00U)
-#define SEMC_BMCR1_WPH_SHIFT                     (8U)
-#define SEMC_BMCR1_WPH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WPH_SHIFT)) & SEMC_BMCR1_WPH_MASK)
-#define SEMC_BMCR1_WRWS_MASK                     (0xFF0000U)
-#define SEMC_BMCR1_WRWS_SHIFT                    (16U)
-#define SEMC_BMCR1_WRWS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WRWS_SHIFT)) & SEMC_BMCR1_WRWS_MASK)
-#define SEMC_BMCR1_WBR_MASK                      (0xFF000000U)
-#define SEMC_BMCR1_WBR_SHIFT                     (24U)
-#define SEMC_BMCR1_WBR(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WBR_SHIFT)) & SEMC_BMCR1_WBR_MASK)
+#define SEMC_BMCR1_WQOS_MASK  (0xFU)
+#define SEMC_BMCR1_WQOS_SHIFT (0U)
+#define SEMC_BMCR1_WQOS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WQOS_SHIFT)) & SEMC_BMCR1_WQOS_MASK)
+#define SEMC_BMCR1_WAGE_MASK  (0xF0U)
+#define SEMC_BMCR1_WAGE_SHIFT (4U)
+#define SEMC_BMCR1_WAGE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WAGE_SHIFT)) & SEMC_BMCR1_WAGE_MASK)
+#define SEMC_BMCR1_WPH_MASK   (0xFF00U)
+#define SEMC_BMCR1_WPH_SHIFT  (8U)
+#define SEMC_BMCR1_WPH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WPH_SHIFT)) & SEMC_BMCR1_WPH_MASK)
+#define SEMC_BMCR1_WRWS_MASK  (0xFF0000U)
+#define SEMC_BMCR1_WRWS_SHIFT (16U)
+#define SEMC_BMCR1_WRWS(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WRWS_SHIFT)) & SEMC_BMCR1_WRWS_MASK)
+#define SEMC_BMCR1_WBR_MASK   (0xFF000000U)
+#define SEMC_BMCR1_WBR_SHIFT  (24U)
+#define SEMC_BMCR1_WBR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BMCR1_WBR_SHIFT)) & SEMC_BMCR1_WBR_MASK)
 /*! @} */
 
 /*! @name BR - Base Register 0 (For SDRAM CS0 device)..Base Register 8 (For NAND device) */
 /*! @{ */
-#define SEMC_BR_VLD_MASK                         (0x1U)
-#define SEMC_BR_VLD_SHIFT                        (0U)
-#define SEMC_BR_VLD(x)                           (((uint32_t)(((uint32_t)(x)) << SEMC_BR_VLD_SHIFT)) & SEMC_BR_VLD_MASK)
-#define SEMC_BR_MS_MASK                          (0x3EU)
-#define SEMC_BR_MS_SHIFT                         (1U)
-#define SEMC_BR_MS(x)                            (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
-#define SEMC_BR_BA_MASK                          (0xFFFFF000U)
-#define SEMC_BR_BA_SHIFT                         (12U)
-#define SEMC_BR_BA(x)                            (((uint32_t)(((uint32_t)(x)) << SEMC_BR_BA_SHIFT)) & SEMC_BR_BA_MASK)
+#define SEMC_BR_VLD_MASK  (0x1U)
+#define SEMC_BR_VLD_SHIFT (0U)
+#define SEMC_BR_VLD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_BR_VLD_SHIFT)) & SEMC_BR_VLD_MASK)
+#define SEMC_BR_MS_MASK   (0x3EU)
+#define SEMC_BR_MS_SHIFT  (1U)
+#define SEMC_BR_MS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BR_MS_SHIFT)) & SEMC_BR_MS_MASK)
+#define SEMC_BR_BA_MASK   (0xFFFFF000U)
+#define SEMC_BR_BA_SHIFT  (12U)
+#define SEMC_BR_BA(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_BR_BA_SHIFT)) & SEMC_BR_BA_MASK)
 /*! @} */
 
 /* The count of SEMC_BR */
-#define SEMC_BR_COUNT                            (9U)
+#define SEMC_BR_COUNT (9U)
 
 /*! @name INTEN - Interrupt Enable Register */
 /*! @{ */
-#define SEMC_INTEN_IPCMDDONEEN_MASK              (0x1U)
-#define SEMC_INTEN_IPCMDDONEEN_SHIFT             (0U)
-#define SEMC_INTEN_IPCMDDONEEN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDDONEEN_SHIFT)) & SEMC_INTEN_IPCMDDONEEN_MASK)
-#define SEMC_INTEN_IPCMDERREN_MASK               (0x2U)
-#define SEMC_INTEN_IPCMDERREN_SHIFT              (1U)
-#define SEMC_INTEN_IPCMDERREN(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDERREN_SHIFT)) & SEMC_INTEN_IPCMDERREN_MASK)
-#define SEMC_INTEN_AXICMDERREN_MASK              (0x4U)
-#define SEMC_INTEN_AXICMDERREN_SHIFT             (2U)
-#define SEMC_INTEN_AXICMDERREN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXICMDERREN_SHIFT)) & SEMC_INTEN_AXICMDERREN_MASK)
-#define SEMC_INTEN_AXIBUSERREN_MASK              (0x8U)
-#define SEMC_INTEN_AXIBUSERREN_SHIFT             (3U)
-#define SEMC_INTEN_AXIBUSERREN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXIBUSERREN_SHIFT)) & SEMC_INTEN_AXIBUSERREN_MASK)
-#define SEMC_INTEN_NDPAGEENDEN_MASK              (0x10U)
-#define SEMC_INTEN_NDPAGEENDEN_SHIFT             (4U)
-#define SEMC_INTEN_NDPAGEENDEN(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDPAGEENDEN_SHIFT)) & SEMC_INTEN_NDPAGEENDEN_MASK)
-#define SEMC_INTEN_NDNOPENDEN_MASK               (0x20U)
-#define SEMC_INTEN_NDNOPENDEN_SHIFT              (5U)
-#define SEMC_INTEN_NDNOPENDEN(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDNOPENDEN_SHIFT)) & SEMC_INTEN_NDNOPENDEN_MASK)
+#define SEMC_INTEN_IPCMDDONEEN_MASK  (0x1U)
+#define SEMC_INTEN_IPCMDDONEEN_SHIFT (0U)
+#define SEMC_INTEN_IPCMDDONEEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDDONEEN_SHIFT)) & SEMC_INTEN_IPCMDDONEEN_MASK)
+#define SEMC_INTEN_IPCMDERREN_MASK  (0x2U)
+#define SEMC_INTEN_IPCMDERREN_SHIFT (1U)
+#define SEMC_INTEN_IPCMDERREN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_IPCMDERREN_SHIFT)) & SEMC_INTEN_IPCMDERREN_MASK)
+#define SEMC_INTEN_AXICMDERREN_MASK  (0x4U)
+#define SEMC_INTEN_AXICMDERREN_SHIFT (2U)
+#define SEMC_INTEN_AXICMDERREN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXICMDERREN_SHIFT)) & SEMC_INTEN_AXICMDERREN_MASK)
+#define SEMC_INTEN_AXIBUSERREN_MASK  (0x8U)
+#define SEMC_INTEN_AXIBUSERREN_SHIFT (3U)
+#define SEMC_INTEN_AXIBUSERREN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_AXIBUSERREN_SHIFT)) & SEMC_INTEN_AXIBUSERREN_MASK)
+#define SEMC_INTEN_NDPAGEENDEN_MASK  (0x10U)
+#define SEMC_INTEN_NDPAGEENDEN_SHIFT (4U)
+#define SEMC_INTEN_NDPAGEENDEN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDPAGEENDEN_SHIFT)) & SEMC_INTEN_NDPAGEENDEN_MASK)
+#define SEMC_INTEN_NDNOPENDEN_MASK  (0x20U)
+#define SEMC_INTEN_NDNOPENDEN_SHIFT (5U)
+#define SEMC_INTEN_NDNOPENDEN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_INTEN_NDNOPENDEN_SHIFT)) & SEMC_INTEN_NDNOPENDEN_MASK)
 /*! @} */
 
 /*! @name INTR - Interrupt Enable Register */
 /*! @{ */
-#define SEMC_INTR_IPCMDDONE_MASK                 (0x1U)
-#define SEMC_INTR_IPCMDDONE_SHIFT                (0U)
-#define SEMC_INTR_IPCMDDONE(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDDONE_SHIFT)) & SEMC_INTR_IPCMDDONE_MASK)
-#define SEMC_INTR_IPCMDERR_MASK                  (0x2U)
-#define SEMC_INTR_IPCMDERR_SHIFT                 (1U)
-#define SEMC_INTR_IPCMDERR(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDERR_SHIFT)) & SEMC_INTR_IPCMDERR_MASK)
-#define SEMC_INTR_AXICMDERR_MASK                 (0x4U)
-#define SEMC_INTR_AXICMDERR_SHIFT                (2U)
-#define SEMC_INTR_AXICMDERR(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXICMDERR_SHIFT)) & SEMC_INTR_AXICMDERR_MASK)
-#define SEMC_INTR_AXIBUSERR_MASK                 (0x8U)
-#define SEMC_INTR_AXIBUSERR_SHIFT                (3U)
-#define SEMC_INTR_AXIBUSERR(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXIBUSERR_SHIFT)) & SEMC_INTR_AXIBUSERR_MASK)
-#define SEMC_INTR_NDPAGEEND_MASK                 (0x10U)
-#define SEMC_INTR_NDPAGEEND_SHIFT                (4U)
-#define SEMC_INTR_NDPAGEEND(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDPAGEEND_SHIFT)) & SEMC_INTR_NDPAGEEND_MASK)
-#define SEMC_INTR_NDNOPEND_MASK                  (0x20U)
-#define SEMC_INTR_NDNOPEND_SHIFT                 (5U)
-#define SEMC_INTR_NDNOPEND(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDNOPEND_SHIFT)) & SEMC_INTR_NDNOPEND_MASK)
+#define SEMC_INTR_IPCMDDONE_MASK  (0x1U)
+#define SEMC_INTR_IPCMDDONE_SHIFT (0U)
+#define SEMC_INTR_IPCMDDONE(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDDONE_SHIFT)) & SEMC_INTR_IPCMDDONE_MASK)
+#define SEMC_INTR_IPCMDERR_MASK   (0x2U)
+#define SEMC_INTR_IPCMDERR_SHIFT  (1U)
+#define SEMC_INTR_IPCMDERR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_IPCMDERR_SHIFT)) & SEMC_INTR_IPCMDERR_MASK)
+#define SEMC_INTR_AXICMDERR_MASK  (0x4U)
+#define SEMC_INTR_AXICMDERR_SHIFT (2U)
+#define SEMC_INTR_AXICMDERR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXICMDERR_SHIFT)) & SEMC_INTR_AXICMDERR_MASK)
+#define SEMC_INTR_AXIBUSERR_MASK  (0x8U)
+#define SEMC_INTR_AXIBUSERR_SHIFT (3U)
+#define SEMC_INTR_AXIBUSERR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_AXIBUSERR_SHIFT)) & SEMC_INTR_AXIBUSERR_MASK)
+#define SEMC_INTR_NDPAGEEND_MASK  (0x10U)
+#define SEMC_INTR_NDPAGEEND_SHIFT (4U)
+#define SEMC_INTR_NDPAGEEND(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDPAGEEND_SHIFT)) & SEMC_INTR_NDPAGEEND_MASK)
+#define SEMC_INTR_NDNOPEND_MASK   (0x20U)
+#define SEMC_INTR_NDNOPEND_SHIFT  (5U)
+#define SEMC_INTR_NDNOPEND(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_INTR_NDNOPEND_SHIFT)) & SEMC_INTR_NDNOPEND_MASK)
 /*! @} */
 
 /*! @name SDRAMCR0 - SDRAM control register 0 */
 /*! @{ */
-#define SEMC_SDRAMCR0_PS_MASK                    (0x1U)
-#define SEMC_SDRAMCR0_PS_SHIFT                   (0U)
-#define SEMC_SDRAMCR0_PS(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_PS_SHIFT)) & SEMC_SDRAMCR0_PS_MASK)
-#define SEMC_SDRAMCR0_BL_MASK                    (0x70U)
-#define SEMC_SDRAMCR0_BL_SHIFT                   (4U)
-#define SEMC_SDRAMCR0_BL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_BL_SHIFT)) & SEMC_SDRAMCR0_BL_MASK)
-#define SEMC_SDRAMCR0_COL_MASK                   (0x300U)
-#define SEMC_SDRAMCR0_COL_SHIFT                  (8U)
-#define SEMC_SDRAMCR0_COL(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_COL_SHIFT)) & SEMC_SDRAMCR0_COL_MASK)
-#define SEMC_SDRAMCR0_CL_MASK                    (0xC00U)
-#define SEMC_SDRAMCR0_CL_SHIFT                   (10U)
-#define SEMC_SDRAMCR0_CL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_CL_SHIFT)) & SEMC_SDRAMCR0_CL_MASK)
+#define SEMC_SDRAMCR0_PS_MASK   (0x1U)
+#define SEMC_SDRAMCR0_PS_SHIFT  (0U)
+#define SEMC_SDRAMCR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_PS_SHIFT)) & SEMC_SDRAMCR0_PS_MASK)
+#define SEMC_SDRAMCR0_BL_MASK   (0x70U)
+#define SEMC_SDRAMCR0_BL_SHIFT  (4U)
+#define SEMC_SDRAMCR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_BL_SHIFT)) & SEMC_SDRAMCR0_BL_MASK)
+#define SEMC_SDRAMCR0_COL_MASK  (0x300U)
+#define SEMC_SDRAMCR0_COL_SHIFT (8U)
+#define SEMC_SDRAMCR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_COL_SHIFT)) & SEMC_SDRAMCR0_COL_MASK)
+#define SEMC_SDRAMCR0_CL_MASK   (0xC00U)
+#define SEMC_SDRAMCR0_CL_SHIFT  (10U)
+#define SEMC_SDRAMCR0_CL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR0_CL_SHIFT)) & SEMC_SDRAMCR0_CL_MASK)
 /*! @} */
 
 /*! @name SDRAMCR1 - SDRAM control register 1 */
 /*! @{ */
-#define SEMC_SDRAMCR1_PRE2ACT_MASK               (0xFU)
-#define SEMC_SDRAMCR1_PRE2ACT_SHIFT              (0U)
-#define SEMC_SDRAMCR1_PRE2ACT(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_PRE2ACT_SHIFT)) & SEMC_SDRAMCR1_PRE2ACT_MASK)
-#define SEMC_SDRAMCR1_ACT2RW_MASK                (0xF0U)
-#define SEMC_SDRAMCR1_ACT2RW_SHIFT               (4U)
-#define SEMC_SDRAMCR1_ACT2RW(x)                  (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2RW_SHIFT)) & SEMC_SDRAMCR1_ACT2RW_MASK)
-#define SEMC_SDRAMCR1_RFRC_MASK                  (0x1F00U)
-#define SEMC_SDRAMCR1_RFRC_SHIFT                 (8U)
-#define SEMC_SDRAMCR1_RFRC(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_RFRC_SHIFT)) & SEMC_SDRAMCR1_RFRC_MASK)
-#define SEMC_SDRAMCR1_WRC_MASK                   (0xE000U)
-#define SEMC_SDRAMCR1_WRC_SHIFT                  (13U)
-#define SEMC_SDRAMCR1_WRC(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_WRC_SHIFT)) & SEMC_SDRAMCR1_WRC_MASK)
-#define SEMC_SDRAMCR1_CKEOFF_MASK                (0xF0000U)
-#define SEMC_SDRAMCR1_CKEOFF_SHIFT               (16U)
-#define SEMC_SDRAMCR1_CKEOFF(x)                  (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_CKEOFF_SHIFT)) & SEMC_SDRAMCR1_CKEOFF_MASK)
-#define SEMC_SDRAMCR1_ACT2PRE_MASK               (0xF00000U)
-#define SEMC_SDRAMCR1_ACT2PRE_SHIFT              (20U)
-#define SEMC_SDRAMCR1_ACT2PRE(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2PRE_SHIFT)) & SEMC_SDRAMCR1_ACT2PRE_MASK)
+#define SEMC_SDRAMCR1_PRE2ACT_MASK  (0xFU)
+#define SEMC_SDRAMCR1_PRE2ACT_SHIFT (0U)
+#define SEMC_SDRAMCR1_PRE2ACT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_PRE2ACT_SHIFT)) & SEMC_SDRAMCR1_PRE2ACT_MASK)
+#define SEMC_SDRAMCR1_ACT2RW_MASK  (0xF0U)
+#define SEMC_SDRAMCR1_ACT2RW_SHIFT (4U)
+#define SEMC_SDRAMCR1_ACT2RW(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2RW_SHIFT)) & SEMC_SDRAMCR1_ACT2RW_MASK)
+#define SEMC_SDRAMCR1_RFRC_MASK    (0x1F00U)
+#define SEMC_SDRAMCR1_RFRC_SHIFT   (8U)
+#define SEMC_SDRAMCR1_RFRC(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_RFRC_SHIFT)) & SEMC_SDRAMCR1_RFRC_MASK)
+#define SEMC_SDRAMCR1_WRC_MASK     (0xE000U)
+#define SEMC_SDRAMCR1_WRC_SHIFT    (13U)
+#define SEMC_SDRAMCR1_WRC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_WRC_SHIFT)) & SEMC_SDRAMCR1_WRC_MASK)
+#define SEMC_SDRAMCR1_CKEOFF_MASK  (0xF0000U)
+#define SEMC_SDRAMCR1_CKEOFF_SHIFT (16U)
+#define SEMC_SDRAMCR1_CKEOFF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_CKEOFF_SHIFT)) & SEMC_SDRAMCR1_CKEOFF_MASK)
+#define SEMC_SDRAMCR1_ACT2PRE_MASK  (0xF00000U)
+#define SEMC_SDRAMCR1_ACT2PRE_SHIFT (20U)
+#define SEMC_SDRAMCR1_ACT2PRE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR1_ACT2PRE_SHIFT)) & SEMC_SDRAMCR1_ACT2PRE_MASK)
 /*! @} */
 
 /*! @name SDRAMCR2 - SDRAM control register 2 */
 /*! @{ */
-#define SEMC_SDRAMCR2_SRRC_MASK                  (0xFFU)
-#define SEMC_SDRAMCR2_SRRC_SHIFT                 (0U)
-#define SEMC_SDRAMCR2_SRRC(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_SRRC_SHIFT)) & SEMC_SDRAMCR2_SRRC_MASK)
-#define SEMC_SDRAMCR2_REF2REF_MASK               (0xFF00U)
-#define SEMC_SDRAMCR2_REF2REF_SHIFT              (8U)
-#define SEMC_SDRAMCR2_REF2REF(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_REF2REF_SHIFT)) & SEMC_SDRAMCR2_REF2REF_MASK)
-#define SEMC_SDRAMCR2_ACT2ACT_MASK               (0xFF0000U)
-#define SEMC_SDRAMCR2_ACT2ACT_SHIFT              (16U)
-#define SEMC_SDRAMCR2_ACT2ACT(x)                 (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ACT2ACT_SHIFT)) & SEMC_SDRAMCR2_ACT2ACT_MASK)
-#define SEMC_SDRAMCR2_ITO_MASK                   (0xFF000000U)
-#define SEMC_SDRAMCR2_ITO_SHIFT                  (24U)
-#define SEMC_SDRAMCR2_ITO(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ITO_SHIFT)) & SEMC_SDRAMCR2_ITO_MASK)
+#define SEMC_SDRAMCR2_SRRC_MASK     (0xFFU)
+#define SEMC_SDRAMCR2_SRRC_SHIFT    (0U)
+#define SEMC_SDRAMCR2_SRRC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_SRRC_SHIFT)) & SEMC_SDRAMCR2_SRRC_MASK)
+#define SEMC_SDRAMCR2_REF2REF_MASK  (0xFF00U)
+#define SEMC_SDRAMCR2_REF2REF_SHIFT (8U)
+#define SEMC_SDRAMCR2_REF2REF(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_REF2REF_SHIFT)) & SEMC_SDRAMCR2_REF2REF_MASK)
+#define SEMC_SDRAMCR2_ACT2ACT_MASK  (0xFF0000U)
+#define SEMC_SDRAMCR2_ACT2ACT_SHIFT (16U)
+#define SEMC_SDRAMCR2_ACT2ACT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ACT2ACT_SHIFT)) & SEMC_SDRAMCR2_ACT2ACT_MASK)
+#define SEMC_SDRAMCR2_ITO_MASK  (0xFF000000U)
+#define SEMC_SDRAMCR2_ITO_SHIFT (24U)
+#define SEMC_SDRAMCR2_ITO(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR2_ITO_SHIFT)) & SEMC_SDRAMCR2_ITO_MASK)
 /*! @} */
 
 /*! @name SDRAMCR3 - SDRAM control register 3 */
 /*! @{ */
-#define SEMC_SDRAMCR3_REN_MASK                   (0x1U)
-#define SEMC_SDRAMCR3_REN_SHIFT                  (0U)
-#define SEMC_SDRAMCR3_REN(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REN_SHIFT)) & SEMC_SDRAMCR3_REN_MASK)
-#define SEMC_SDRAMCR3_REBL_MASK                  (0xEU)
-#define SEMC_SDRAMCR3_REBL_SHIFT                 (1U)
-#define SEMC_SDRAMCR3_REBL(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REBL_SHIFT)) & SEMC_SDRAMCR3_REBL_MASK)
-#define SEMC_SDRAMCR3_PRESCALE_MASK              (0xFF00U)
-#define SEMC_SDRAMCR3_PRESCALE_SHIFT             (8U)
-#define SEMC_SDRAMCR3_PRESCALE(x)                (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_PRESCALE_SHIFT)) & SEMC_SDRAMCR3_PRESCALE_MASK)
-#define SEMC_SDRAMCR3_RT_MASK                    (0xFF0000U)
-#define SEMC_SDRAMCR3_RT_SHIFT                   (16U)
-#define SEMC_SDRAMCR3_RT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_RT_SHIFT)) & SEMC_SDRAMCR3_RT_MASK)
-#define SEMC_SDRAMCR3_UT_MASK                    (0xFF000000U)
-#define SEMC_SDRAMCR3_UT_SHIFT                   (24U)
-#define SEMC_SDRAMCR3_UT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_UT_SHIFT)) & SEMC_SDRAMCR3_UT_MASK)
+#define SEMC_SDRAMCR3_REN_MASK       (0x1U)
+#define SEMC_SDRAMCR3_REN_SHIFT      (0U)
+#define SEMC_SDRAMCR3_REN(x)         (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REN_SHIFT)) & SEMC_SDRAMCR3_REN_MASK)
+#define SEMC_SDRAMCR3_REBL_MASK      (0xEU)
+#define SEMC_SDRAMCR3_REBL_SHIFT     (1U)
+#define SEMC_SDRAMCR3_REBL(x)        (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_REBL_SHIFT)) & SEMC_SDRAMCR3_REBL_MASK)
+#define SEMC_SDRAMCR3_PRESCALE_MASK  (0xFF00U)
+#define SEMC_SDRAMCR3_PRESCALE_SHIFT (8U)
+#define SEMC_SDRAMCR3_PRESCALE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_PRESCALE_SHIFT)) & SEMC_SDRAMCR3_PRESCALE_MASK)
+#define SEMC_SDRAMCR3_RT_MASK  (0xFF0000U)
+#define SEMC_SDRAMCR3_RT_SHIFT (16U)
+#define SEMC_SDRAMCR3_RT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_RT_SHIFT)) & SEMC_SDRAMCR3_RT_MASK)
+#define SEMC_SDRAMCR3_UT_MASK  (0xFF000000U)
+#define SEMC_SDRAMCR3_UT_SHIFT (24U)
+#define SEMC_SDRAMCR3_UT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SDRAMCR3_UT_SHIFT)) & SEMC_SDRAMCR3_UT_MASK)
 /*! @} */
 
 /*! @name NANDCR0 - NAND control register 0 */
 /*! @{ */
-#define SEMC_NANDCR0_PS_MASK                     (0x1U)
-#define SEMC_NANDCR0_PS_SHIFT                    (0U)
-#define SEMC_NANDCR0_PS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_PS_SHIFT)) & SEMC_NANDCR0_PS_MASK)
-#define SEMC_NANDCR0_BL_MASK                     (0x70U)
-#define SEMC_NANDCR0_BL_SHIFT                    (4U)
-#define SEMC_NANDCR0_BL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_BL_SHIFT)) & SEMC_NANDCR0_BL_MASK)
-#define SEMC_NANDCR0_EDO_MASK                    (0x80U)
-#define SEMC_NANDCR0_EDO_SHIFT                   (7U)
-#define SEMC_NANDCR0_EDO(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_EDO_SHIFT)) & SEMC_NANDCR0_EDO_MASK)
-#define SEMC_NANDCR0_COL_MASK                    (0x700U)
-#define SEMC_NANDCR0_COL_SHIFT                   (8U)
-#define SEMC_NANDCR0_COL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_COL_SHIFT)) & SEMC_NANDCR0_COL_MASK)
+#define SEMC_NANDCR0_PS_MASK   (0x1U)
+#define SEMC_NANDCR0_PS_SHIFT  (0U)
+#define SEMC_NANDCR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_PS_SHIFT)) & SEMC_NANDCR0_PS_MASK)
+#define SEMC_NANDCR0_BL_MASK   (0x70U)
+#define SEMC_NANDCR0_BL_SHIFT  (4U)
+#define SEMC_NANDCR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_BL_SHIFT)) & SEMC_NANDCR0_BL_MASK)
+#define SEMC_NANDCR0_EDO_MASK  (0x80U)
+#define SEMC_NANDCR0_EDO_SHIFT (7U)
+#define SEMC_NANDCR0_EDO(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_EDO_SHIFT)) & SEMC_NANDCR0_EDO_MASK)
+#define SEMC_NANDCR0_COL_MASK  (0x700U)
+#define SEMC_NANDCR0_COL_SHIFT (8U)
+#define SEMC_NANDCR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR0_COL_SHIFT)) & SEMC_NANDCR0_COL_MASK)
 /*! @} */
 
 /*! @name NANDCR1 - NAND control register 1 */
 /*! @{ */
-#define SEMC_NANDCR1_CES_MASK                    (0xFU)
-#define SEMC_NANDCR1_CES_SHIFT                   (0U)
-#define SEMC_NANDCR1_CES(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CES_SHIFT)) & SEMC_NANDCR1_CES_MASK)
-#define SEMC_NANDCR1_CEH_MASK                    (0xF0U)
-#define SEMC_NANDCR1_CEH_SHIFT                   (4U)
-#define SEMC_NANDCR1_CEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEH_SHIFT)) & SEMC_NANDCR1_CEH_MASK)
-#define SEMC_NANDCR1_WEL_MASK                    (0xF00U)
-#define SEMC_NANDCR1_WEL_SHIFT                   (8U)
-#define SEMC_NANDCR1_WEL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEL_SHIFT)) & SEMC_NANDCR1_WEL_MASK)
-#define SEMC_NANDCR1_WEH_MASK                    (0xF000U)
-#define SEMC_NANDCR1_WEH_SHIFT                   (12U)
-#define SEMC_NANDCR1_WEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEH_SHIFT)) & SEMC_NANDCR1_WEH_MASK)
-#define SEMC_NANDCR1_REL_MASK                    (0xF0000U)
-#define SEMC_NANDCR1_REL_SHIFT                   (16U)
-#define SEMC_NANDCR1_REL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REL_SHIFT)) & SEMC_NANDCR1_REL_MASK)
-#define SEMC_NANDCR1_REH_MASK                    (0xF00000U)
-#define SEMC_NANDCR1_REH_SHIFT                   (20U)
-#define SEMC_NANDCR1_REH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REH_SHIFT)) & SEMC_NANDCR1_REH_MASK)
-#define SEMC_NANDCR1_TA_MASK                     (0xF000000U)
-#define SEMC_NANDCR1_TA_SHIFT                    (24U)
-#define SEMC_NANDCR1_TA(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_TA_SHIFT)) & SEMC_NANDCR1_TA_MASK)
-#define SEMC_NANDCR1_CEITV_MASK                  (0xF0000000U)
-#define SEMC_NANDCR1_CEITV_SHIFT                 (28U)
-#define SEMC_NANDCR1_CEITV(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEITV_SHIFT)) & SEMC_NANDCR1_CEITV_MASK)
+#define SEMC_NANDCR1_CES_MASK    (0xFU)
+#define SEMC_NANDCR1_CES_SHIFT   (0U)
+#define SEMC_NANDCR1_CES(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CES_SHIFT)) & SEMC_NANDCR1_CES_MASK)
+#define SEMC_NANDCR1_CEH_MASK    (0xF0U)
+#define SEMC_NANDCR1_CEH_SHIFT   (4U)
+#define SEMC_NANDCR1_CEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEH_SHIFT)) & SEMC_NANDCR1_CEH_MASK)
+#define SEMC_NANDCR1_WEL_MASK    (0xF00U)
+#define SEMC_NANDCR1_WEL_SHIFT   (8U)
+#define SEMC_NANDCR1_WEL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEL_SHIFT)) & SEMC_NANDCR1_WEL_MASK)
+#define SEMC_NANDCR1_WEH_MASK    (0xF000U)
+#define SEMC_NANDCR1_WEH_SHIFT   (12U)
+#define SEMC_NANDCR1_WEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_WEH_SHIFT)) & SEMC_NANDCR1_WEH_MASK)
+#define SEMC_NANDCR1_REL_MASK    (0xF0000U)
+#define SEMC_NANDCR1_REL_SHIFT   (16U)
+#define SEMC_NANDCR1_REL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REL_SHIFT)) & SEMC_NANDCR1_REL_MASK)
+#define SEMC_NANDCR1_REH_MASK    (0xF00000U)
+#define SEMC_NANDCR1_REH_SHIFT   (20U)
+#define SEMC_NANDCR1_REH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_REH_SHIFT)) & SEMC_NANDCR1_REH_MASK)
+#define SEMC_NANDCR1_TA_MASK     (0xF000000U)
+#define SEMC_NANDCR1_TA_SHIFT    (24U)
+#define SEMC_NANDCR1_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_TA_SHIFT)) & SEMC_NANDCR1_TA_MASK)
+#define SEMC_NANDCR1_CEITV_MASK  (0xF0000000U)
+#define SEMC_NANDCR1_CEITV_SHIFT (28U)
+#define SEMC_NANDCR1_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR1_CEITV_SHIFT)) & SEMC_NANDCR1_CEITV_MASK)
 /*! @} */
 
 /*! @name NANDCR2 - NAND control register 2 */
 /*! @{ */
-#define SEMC_NANDCR2_TWHR_MASK                   (0x3FU)
-#define SEMC_NANDCR2_TWHR_SHIFT                  (0U)
-#define SEMC_NANDCR2_TWHR(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWHR_SHIFT)) & SEMC_NANDCR2_TWHR_MASK)
-#define SEMC_NANDCR2_TRHW_MASK                   (0xFC0U)
-#define SEMC_NANDCR2_TRHW_SHIFT                  (6U)
-#define SEMC_NANDCR2_TRHW(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRHW_SHIFT)) & SEMC_NANDCR2_TRHW_MASK)
-#define SEMC_NANDCR2_TADL_MASK                   (0x3F000U)
-#define SEMC_NANDCR2_TADL_SHIFT                  (12U)
-#define SEMC_NANDCR2_TADL(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TADL_SHIFT)) & SEMC_NANDCR2_TADL_MASK)
-#define SEMC_NANDCR2_TRR_MASK                    (0xFC0000U)
-#define SEMC_NANDCR2_TRR_SHIFT                   (18U)
-#define SEMC_NANDCR2_TRR(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRR_SHIFT)) & SEMC_NANDCR2_TRR_MASK)
-#define SEMC_NANDCR2_TWB_MASK                    (0x3F000000U)
-#define SEMC_NANDCR2_TWB_SHIFT                   (24U)
-#define SEMC_NANDCR2_TWB(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWB_SHIFT)) & SEMC_NANDCR2_TWB_MASK)
+#define SEMC_NANDCR2_TWHR_MASK  (0x3FU)
+#define SEMC_NANDCR2_TWHR_SHIFT (0U)
+#define SEMC_NANDCR2_TWHR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWHR_SHIFT)) & SEMC_NANDCR2_TWHR_MASK)
+#define SEMC_NANDCR2_TRHW_MASK  (0xFC0U)
+#define SEMC_NANDCR2_TRHW_SHIFT (6U)
+#define SEMC_NANDCR2_TRHW(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRHW_SHIFT)) & SEMC_NANDCR2_TRHW_MASK)
+#define SEMC_NANDCR2_TADL_MASK  (0x3F000U)
+#define SEMC_NANDCR2_TADL_SHIFT (12U)
+#define SEMC_NANDCR2_TADL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TADL_SHIFT)) & SEMC_NANDCR2_TADL_MASK)
+#define SEMC_NANDCR2_TRR_MASK   (0xFC0000U)
+#define SEMC_NANDCR2_TRR_SHIFT  (18U)
+#define SEMC_NANDCR2_TRR(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TRR_SHIFT)) & SEMC_NANDCR2_TRR_MASK)
+#define SEMC_NANDCR2_TWB_MASK   (0x3F000000U)
+#define SEMC_NANDCR2_TWB_SHIFT  (24U)
+#define SEMC_NANDCR2_TWB(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR2_TWB_SHIFT)) & SEMC_NANDCR2_TWB_MASK)
 /*! @} */
 
 /*! @name NANDCR3 - NAND control register 3 */
 /*! @{ */
-#define SEMC_NANDCR3_NDOPT1_MASK                 (0x1U)
-#define SEMC_NANDCR3_NDOPT1_SHIFT                (0U)
-#define SEMC_NANDCR3_NDOPT1(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT1_SHIFT)) & SEMC_NANDCR3_NDOPT1_MASK)
-#define SEMC_NANDCR3_NDOPT2_MASK                 (0x2U)
-#define SEMC_NANDCR3_NDOPT2_SHIFT                (1U)
-#define SEMC_NANDCR3_NDOPT2(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT2_SHIFT)) & SEMC_NANDCR3_NDOPT2_MASK)
-#define SEMC_NANDCR3_NDOPT3_MASK                 (0x4U)
-#define SEMC_NANDCR3_NDOPT3_SHIFT                (2U)
-#define SEMC_NANDCR3_NDOPT3(x)                   (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT3_SHIFT)) & SEMC_NANDCR3_NDOPT3_MASK)
+#define SEMC_NANDCR3_NDOPT1_MASK  (0x1U)
+#define SEMC_NANDCR3_NDOPT1_SHIFT (0U)
+#define SEMC_NANDCR3_NDOPT1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT1_SHIFT)) & SEMC_NANDCR3_NDOPT1_MASK)
+#define SEMC_NANDCR3_NDOPT2_MASK  (0x2U)
+#define SEMC_NANDCR3_NDOPT2_SHIFT (1U)
+#define SEMC_NANDCR3_NDOPT2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT2_SHIFT)) & SEMC_NANDCR3_NDOPT2_MASK)
+#define SEMC_NANDCR3_NDOPT3_MASK  (0x4U)
+#define SEMC_NANDCR3_NDOPT3_SHIFT (2U)
+#define SEMC_NANDCR3_NDOPT3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NANDCR3_NDOPT3_SHIFT)) & SEMC_NANDCR3_NDOPT3_MASK)
 /*! @} */
 
 /*! @name NORCR0 - NOR control register 0 */
 /*! @{ */
-#define SEMC_NORCR0_PS_MASK                      (0x1U)
-#define SEMC_NORCR0_PS_SHIFT                     (0U)
-#define SEMC_NORCR0_PS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_PS_SHIFT)) & SEMC_NORCR0_PS_MASK)
-#define SEMC_NORCR0_BL_MASK                      (0x70U)
-#define SEMC_NORCR0_BL_SHIFT                     (4U)
-#define SEMC_NORCR0_BL(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_BL_SHIFT)) & SEMC_NORCR0_BL_MASK)
-#define SEMC_NORCR0_AM_MASK                      (0x300U)
-#define SEMC_NORCR0_AM_SHIFT                     (8U)
-#define SEMC_NORCR0_AM(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_AM_SHIFT)) & SEMC_NORCR0_AM_MASK)
-#define SEMC_NORCR0_ADVP_MASK                    (0x400U)
-#define SEMC_NORCR0_ADVP_SHIFT                   (10U)
-#define SEMC_NORCR0_ADVP(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_ADVP_SHIFT)) & SEMC_NORCR0_ADVP_MASK)
-#define SEMC_NORCR0_COL_MASK                     (0xF000U)
-#define SEMC_NORCR0_COL_SHIFT                    (12U)
-#define SEMC_NORCR0_COL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_COL_SHIFT)) & SEMC_NORCR0_COL_MASK)
+#define SEMC_NORCR0_PS_MASK    (0x1U)
+#define SEMC_NORCR0_PS_SHIFT   (0U)
+#define SEMC_NORCR0_PS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_PS_SHIFT)) & SEMC_NORCR0_PS_MASK)
+#define SEMC_NORCR0_BL_MASK    (0x70U)
+#define SEMC_NORCR0_BL_SHIFT   (4U)
+#define SEMC_NORCR0_BL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_BL_SHIFT)) & SEMC_NORCR0_BL_MASK)
+#define SEMC_NORCR0_AM_MASK    (0x300U)
+#define SEMC_NORCR0_AM_SHIFT   (8U)
+#define SEMC_NORCR0_AM(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_AM_SHIFT)) & SEMC_NORCR0_AM_MASK)
+#define SEMC_NORCR0_ADVP_MASK  (0x400U)
+#define SEMC_NORCR0_ADVP_SHIFT (10U)
+#define SEMC_NORCR0_ADVP(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_ADVP_SHIFT)) & SEMC_NORCR0_ADVP_MASK)
+#define SEMC_NORCR0_COL_MASK   (0xF000U)
+#define SEMC_NORCR0_COL_SHIFT  (12U)
+#define SEMC_NORCR0_COL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR0_COL_SHIFT)) & SEMC_NORCR0_COL_MASK)
 /*! @} */
 
 /*! @name NORCR1 - NOR control register 1 */
 /*! @{ */
-#define SEMC_NORCR1_CES_MASK                     (0xFU)
-#define SEMC_NORCR1_CES_SHIFT                    (0U)
-#define SEMC_NORCR1_CES(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CES_SHIFT)) & SEMC_NORCR1_CES_MASK)
-#define SEMC_NORCR1_CEH_MASK                     (0xF0U)
-#define SEMC_NORCR1_CEH_SHIFT                    (4U)
-#define SEMC_NORCR1_CEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CEH_SHIFT)) & SEMC_NORCR1_CEH_MASK)
-#define SEMC_NORCR1_AS_MASK                      (0xF00U)
-#define SEMC_NORCR1_AS_SHIFT                     (8U)
-#define SEMC_NORCR1_AS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AS_SHIFT)) & SEMC_NORCR1_AS_MASK)
-#define SEMC_NORCR1_AH_MASK                      (0xF000U)
-#define SEMC_NORCR1_AH_SHIFT                     (12U)
-#define SEMC_NORCR1_AH(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AH_SHIFT)) & SEMC_NORCR1_AH_MASK)
-#define SEMC_NORCR1_WEL_MASK                     (0xF0000U)
-#define SEMC_NORCR1_WEL_SHIFT                    (16U)
-#define SEMC_NORCR1_WEL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEL_SHIFT)) & SEMC_NORCR1_WEL_MASK)
-#define SEMC_NORCR1_WEH_MASK                     (0xF00000U)
-#define SEMC_NORCR1_WEH_SHIFT                    (20U)
-#define SEMC_NORCR1_WEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEH_SHIFT)) & SEMC_NORCR1_WEH_MASK)
-#define SEMC_NORCR1_REL_MASK                     (0xF000000U)
-#define SEMC_NORCR1_REL_SHIFT                    (24U)
-#define SEMC_NORCR1_REL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REL_SHIFT)) & SEMC_NORCR1_REL_MASK)
-#define SEMC_NORCR1_REH_MASK                     (0xF0000000U)
-#define SEMC_NORCR1_REH_SHIFT                    (28U)
-#define SEMC_NORCR1_REH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REH_SHIFT)) & SEMC_NORCR1_REH_MASK)
+#define SEMC_NORCR1_CES_MASK  (0xFU)
+#define SEMC_NORCR1_CES_SHIFT (0U)
+#define SEMC_NORCR1_CES(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CES_SHIFT)) & SEMC_NORCR1_CES_MASK)
+#define SEMC_NORCR1_CEH_MASK  (0xF0U)
+#define SEMC_NORCR1_CEH_SHIFT (4U)
+#define SEMC_NORCR1_CEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_CEH_SHIFT)) & SEMC_NORCR1_CEH_MASK)
+#define SEMC_NORCR1_AS_MASK   (0xF00U)
+#define SEMC_NORCR1_AS_SHIFT  (8U)
+#define SEMC_NORCR1_AS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AS_SHIFT)) & SEMC_NORCR1_AS_MASK)
+#define SEMC_NORCR1_AH_MASK   (0xF000U)
+#define SEMC_NORCR1_AH_SHIFT  (12U)
+#define SEMC_NORCR1_AH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_AH_SHIFT)) & SEMC_NORCR1_AH_MASK)
+#define SEMC_NORCR1_WEL_MASK  (0xF0000U)
+#define SEMC_NORCR1_WEL_SHIFT (16U)
+#define SEMC_NORCR1_WEL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEL_SHIFT)) & SEMC_NORCR1_WEL_MASK)
+#define SEMC_NORCR1_WEH_MASK  (0xF00000U)
+#define SEMC_NORCR1_WEH_SHIFT (20U)
+#define SEMC_NORCR1_WEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_WEH_SHIFT)) & SEMC_NORCR1_WEH_MASK)
+#define SEMC_NORCR1_REL_MASK  (0xF000000U)
+#define SEMC_NORCR1_REL_SHIFT (24U)
+#define SEMC_NORCR1_REL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REL_SHIFT)) & SEMC_NORCR1_REL_MASK)
+#define SEMC_NORCR1_REH_MASK  (0xF0000000U)
+#define SEMC_NORCR1_REH_SHIFT (28U)
+#define SEMC_NORCR1_REH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR1_REH_SHIFT)) & SEMC_NORCR1_REH_MASK)
 /*! @} */
 
 /*! @name NORCR2 - NOR control register 2 */
 /*! @{ */
-#define SEMC_NORCR2_WDS_MASK                     (0xFU)
-#define SEMC_NORCR2_WDS_SHIFT                    (0U)
-#define SEMC_NORCR2_WDS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDS_SHIFT)) & SEMC_NORCR2_WDS_MASK)
-#define SEMC_NORCR2_WDH_MASK                     (0xF0U)
-#define SEMC_NORCR2_WDH_SHIFT                    (4U)
-#define SEMC_NORCR2_WDH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDH_SHIFT)) & SEMC_NORCR2_WDH_MASK)
-#define SEMC_NORCR2_TA_MASK                      (0xF00U)
-#define SEMC_NORCR2_TA_SHIFT                     (8U)
-#define SEMC_NORCR2_TA(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_TA_SHIFT)) & SEMC_NORCR2_TA_MASK)
-#define SEMC_NORCR2_AWDH_MASK                    (0xF000U)
-#define SEMC_NORCR2_AWDH_SHIFT                   (12U)
-#define SEMC_NORCR2_AWDH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_AWDH_SHIFT)) & SEMC_NORCR2_AWDH_MASK)
-#define SEMC_NORCR2_LC_MASK                      (0xF0000U)
-#define SEMC_NORCR2_LC_SHIFT                     (16U)
-#define SEMC_NORCR2_LC(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_LC_SHIFT)) & SEMC_NORCR2_LC_MASK)
-#define SEMC_NORCR2_RD_MASK                      (0xF00000U)
-#define SEMC_NORCR2_RD_SHIFT                     (20U)
-#define SEMC_NORCR2_RD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_RD_SHIFT)) & SEMC_NORCR2_RD_MASK)
-#define SEMC_NORCR2_CEITV_MASK                   (0xF000000U)
-#define SEMC_NORCR2_CEITV_SHIFT                  (24U)
-#define SEMC_NORCR2_CEITV(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_CEITV_SHIFT)) & SEMC_NORCR2_CEITV_MASK)
+#define SEMC_NORCR2_WDS_MASK    (0xFU)
+#define SEMC_NORCR2_WDS_SHIFT   (0U)
+#define SEMC_NORCR2_WDS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDS_SHIFT)) & SEMC_NORCR2_WDS_MASK)
+#define SEMC_NORCR2_WDH_MASK    (0xF0U)
+#define SEMC_NORCR2_WDH_SHIFT   (4U)
+#define SEMC_NORCR2_WDH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_WDH_SHIFT)) & SEMC_NORCR2_WDH_MASK)
+#define SEMC_NORCR2_TA_MASK     (0xF00U)
+#define SEMC_NORCR2_TA_SHIFT    (8U)
+#define SEMC_NORCR2_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_TA_SHIFT)) & SEMC_NORCR2_TA_MASK)
+#define SEMC_NORCR2_AWDH_MASK   (0xF000U)
+#define SEMC_NORCR2_AWDH_SHIFT  (12U)
+#define SEMC_NORCR2_AWDH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_AWDH_SHIFT)) & SEMC_NORCR2_AWDH_MASK)
+#define SEMC_NORCR2_LC_MASK     (0xF0000U)
+#define SEMC_NORCR2_LC_SHIFT    (16U)
+#define SEMC_NORCR2_LC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_LC_SHIFT)) & SEMC_NORCR2_LC_MASK)
+#define SEMC_NORCR2_RD_MASK     (0xF00000U)
+#define SEMC_NORCR2_RD_SHIFT    (20U)
+#define SEMC_NORCR2_RD(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_RD_SHIFT)) & SEMC_NORCR2_RD_MASK)
+#define SEMC_NORCR2_CEITV_MASK  (0xF000000U)
+#define SEMC_NORCR2_CEITV_SHIFT (24U)
+#define SEMC_NORCR2_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_NORCR2_CEITV_SHIFT)) & SEMC_NORCR2_CEITV_MASK)
 /*! @} */
 
 /*! @name SRAMCR0 - SRAM control register 0 */
 /*! @{ */
-#define SEMC_SRAMCR0_PS_MASK                     (0x1U)
-#define SEMC_SRAMCR0_PS_SHIFT                    (0U)
-#define SEMC_SRAMCR0_PS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_PS_SHIFT)) & SEMC_SRAMCR0_PS_MASK)
-#define SEMC_SRAMCR0_BL_MASK                     (0x70U)
-#define SEMC_SRAMCR0_BL_SHIFT                    (4U)
-#define SEMC_SRAMCR0_BL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_BL_SHIFT)) & SEMC_SRAMCR0_BL_MASK)
-#define SEMC_SRAMCR0_AM_MASK                     (0x300U)
-#define SEMC_SRAMCR0_AM_SHIFT                    (8U)
-#define SEMC_SRAMCR0_AM(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_AM_SHIFT)) & SEMC_SRAMCR0_AM_MASK)
-#define SEMC_SRAMCR0_ADVP_MASK                   (0x400U)
-#define SEMC_SRAMCR0_ADVP_SHIFT                  (10U)
-#define SEMC_SRAMCR0_ADVP(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_ADVP_SHIFT)) & SEMC_SRAMCR0_ADVP_MASK)
-#define SEMC_SRAMCR0_COL_MASK                    (0xF000U)
-#define SEMC_SRAMCR0_COL_SHIFT                   (12U)
-#define SEMC_SRAMCR0_COL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_COL_SHIFT)) & SEMC_SRAMCR0_COL_MASK)
+#define SEMC_SRAMCR0_PS_MASK    (0x1U)
+#define SEMC_SRAMCR0_PS_SHIFT   (0U)
+#define SEMC_SRAMCR0_PS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_PS_SHIFT)) & SEMC_SRAMCR0_PS_MASK)
+#define SEMC_SRAMCR0_BL_MASK    (0x70U)
+#define SEMC_SRAMCR0_BL_SHIFT   (4U)
+#define SEMC_SRAMCR0_BL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_BL_SHIFT)) & SEMC_SRAMCR0_BL_MASK)
+#define SEMC_SRAMCR0_AM_MASK    (0x300U)
+#define SEMC_SRAMCR0_AM_SHIFT   (8U)
+#define SEMC_SRAMCR0_AM(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_AM_SHIFT)) & SEMC_SRAMCR0_AM_MASK)
+#define SEMC_SRAMCR0_ADVP_MASK  (0x400U)
+#define SEMC_SRAMCR0_ADVP_SHIFT (10U)
+#define SEMC_SRAMCR0_ADVP(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_ADVP_SHIFT)) & SEMC_SRAMCR0_ADVP_MASK)
+#define SEMC_SRAMCR0_COL_MASK   (0xF000U)
+#define SEMC_SRAMCR0_COL_SHIFT  (12U)
+#define SEMC_SRAMCR0_COL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR0_COL_SHIFT)) & SEMC_SRAMCR0_COL_MASK)
 /*! @} */
 
 /*! @name SRAMCR1 - SRAM control register 1 */
 /*! @{ */
-#define SEMC_SRAMCR1_CES_MASK                    (0xFU)
-#define SEMC_SRAMCR1_CES_SHIFT                   (0U)
-#define SEMC_SRAMCR1_CES(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CES_SHIFT)) & SEMC_SRAMCR1_CES_MASK)
-#define SEMC_SRAMCR1_CEH_MASK                    (0xF0U)
-#define SEMC_SRAMCR1_CEH_SHIFT                   (4U)
-#define SEMC_SRAMCR1_CEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CEH_SHIFT)) & SEMC_SRAMCR1_CEH_MASK)
-#define SEMC_SRAMCR1_AS_MASK                     (0xF00U)
-#define SEMC_SRAMCR1_AS_SHIFT                    (8U)
-#define SEMC_SRAMCR1_AS(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AS_SHIFT)) & SEMC_SRAMCR1_AS_MASK)
-#define SEMC_SRAMCR1_AH_MASK                     (0xF000U)
-#define SEMC_SRAMCR1_AH_SHIFT                    (12U)
-#define SEMC_SRAMCR1_AH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AH_SHIFT)) & SEMC_SRAMCR1_AH_MASK)
-#define SEMC_SRAMCR1_WEL_MASK                    (0xF0000U)
-#define SEMC_SRAMCR1_WEL_SHIFT                   (16U)
-#define SEMC_SRAMCR1_WEL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEL_SHIFT)) & SEMC_SRAMCR1_WEL_MASK)
-#define SEMC_SRAMCR1_WEH_MASK                    (0xF00000U)
-#define SEMC_SRAMCR1_WEH_SHIFT                   (20U)
-#define SEMC_SRAMCR1_WEH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEH_SHIFT)) & SEMC_SRAMCR1_WEH_MASK)
-#define SEMC_SRAMCR1_REL_MASK                    (0xF000000U)
-#define SEMC_SRAMCR1_REL_SHIFT                   (24U)
-#define SEMC_SRAMCR1_REL(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REL_SHIFT)) & SEMC_SRAMCR1_REL_MASK)
-#define SEMC_SRAMCR1_REH_MASK                    (0xF0000000U)
-#define SEMC_SRAMCR1_REH_SHIFT                   (28U)
-#define SEMC_SRAMCR1_REH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REH_SHIFT)) & SEMC_SRAMCR1_REH_MASK)
+#define SEMC_SRAMCR1_CES_MASK  (0xFU)
+#define SEMC_SRAMCR1_CES_SHIFT (0U)
+#define SEMC_SRAMCR1_CES(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CES_SHIFT)) & SEMC_SRAMCR1_CES_MASK)
+#define SEMC_SRAMCR1_CEH_MASK  (0xF0U)
+#define SEMC_SRAMCR1_CEH_SHIFT (4U)
+#define SEMC_SRAMCR1_CEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_CEH_SHIFT)) & SEMC_SRAMCR1_CEH_MASK)
+#define SEMC_SRAMCR1_AS_MASK   (0xF00U)
+#define SEMC_SRAMCR1_AS_SHIFT  (8U)
+#define SEMC_SRAMCR1_AS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AS_SHIFT)) & SEMC_SRAMCR1_AS_MASK)
+#define SEMC_SRAMCR1_AH_MASK   (0xF000U)
+#define SEMC_SRAMCR1_AH_SHIFT  (12U)
+#define SEMC_SRAMCR1_AH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_AH_SHIFT)) & SEMC_SRAMCR1_AH_MASK)
+#define SEMC_SRAMCR1_WEL_MASK  (0xF0000U)
+#define SEMC_SRAMCR1_WEL_SHIFT (16U)
+#define SEMC_SRAMCR1_WEL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEL_SHIFT)) & SEMC_SRAMCR1_WEL_MASK)
+#define SEMC_SRAMCR1_WEH_MASK  (0xF00000U)
+#define SEMC_SRAMCR1_WEH_SHIFT (20U)
+#define SEMC_SRAMCR1_WEH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_WEH_SHIFT)) & SEMC_SRAMCR1_WEH_MASK)
+#define SEMC_SRAMCR1_REL_MASK  (0xF000000U)
+#define SEMC_SRAMCR1_REL_SHIFT (24U)
+#define SEMC_SRAMCR1_REL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REL_SHIFT)) & SEMC_SRAMCR1_REL_MASK)
+#define SEMC_SRAMCR1_REH_MASK  (0xF0000000U)
+#define SEMC_SRAMCR1_REH_SHIFT (28U)
+#define SEMC_SRAMCR1_REH(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR1_REH_SHIFT)) & SEMC_SRAMCR1_REH_MASK)
 /*! @} */
 
 /*! @name SRAMCR2 - SRAM control register 2 */
 /*! @{ */
-#define SEMC_SRAMCR2_WDS_MASK                    (0xFU)
-#define SEMC_SRAMCR2_WDS_SHIFT                   (0U)
-#define SEMC_SRAMCR2_WDS(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDS_SHIFT)) & SEMC_SRAMCR2_WDS_MASK)
-#define SEMC_SRAMCR2_WDH_MASK                    (0xF0U)
-#define SEMC_SRAMCR2_WDH_SHIFT                   (4U)
-#define SEMC_SRAMCR2_WDH(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDH_SHIFT)) & SEMC_SRAMCR2_WDH_MASK)
-#define SEMC_SRAMCR2_TA_MASK                     (0xF00U)
-#define SEMC_SRAMCR2_TA_SHIFT                    (8U)
-#define SEMC_SRAMCR2_TA(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_TA_SHIFT)) & SEMC_SRAMCR2_TA_MASK)
-#define SEMC_SRAMCR2_AWDH_MASK                   (0xF000U)
-#define SEMC_SRAMCR2_AWDH_SHIFT                  (12U)
-#define SEMC_SRAMCR2_AWDH(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_AWDH_SHIFT)) & SEMC_SRAMCR2_AWDH_MASK)
-#define SEMC_SRAMCR2_LC_MASK                     (0xF0000U)
-#define SEMC_SRAMCR2_LC_SHIFT                    (16U)
-#define SEMC_SRAMCR2_LC(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_LC_SHIFT)) & SEMC_SRAMCR2_LC_MASK)
-#define SEMC_SRAMCR2_RD_MASK                     (0xF00000U)
-#define SEMC_SRAMCR2_RD_SHIFT                    (20U)
-#define SEMC_SRAMCR2_RD(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_RD_SHIFT)) & SEMC_SRAMCR2_RD_MASK)
-#define SEMC_SRAMCR2_CEITV_MASK                  (0xF000000U)
-#define SEMC_SRAMCR2_CEITV_SHIFT                 (24U)
-#define SEMC_SRAMCR2_CEITV(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_CEITV_SHIFT)) & SEMC_SRAMCR2_CEITV_MASK)
+#define SEMC_SRAMCR2_WDS_MASK    (0xFU)
+#define SEMC_SRAMCR2_WDS_SHIFT   (0U)
+#define SEMC_SRAMCR2_WDS(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDS_SHIFT)) & SEMC_SRAMCR2_WDS_MASK)
+#define SEMC_SRAMCR2_WDH_MASK    (0xF0U)
+#define SEMC_SRAMCR2_WDH_SHIFT   (4U)
+#define SEMC_SRAMCR2_WDH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_WDH_SHIFT)) & SEMC_SRAMCR2_WDH_MASK)
+#define SEMC_SRAMCR2_TA_MASK     (0xF00U)
+#define SEMC_SRAMCR2_TA_SHIFT    (8U)
+#define SEMC_SRAMCR2_TA(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_TA_SHIFT)) & SEMC_SRAMCR2_TA_MASK)
+#define SEMC_SRAMCR2_AWDH_MASK   (0xF000U)
+#define SEMC_SRAMCR2_AWDH_SHIFT  (12U)
+#define SEMC_SRAMCR2_AWDH(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_AWDH_SHIFT)) & SEMC_SRAMCR2_AWDH_MASK)
+#define SEMC_SRAMCR2_LC_MASK     (0xF0000U)
+#define SEMC_SRAMCR2_LC_SHIFT    (16U)
+#define SEMC_SRAMCR2_LC(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_LC_SHIFT)) & SEMC_SRAMCR2_LC_MASK)
+#define SEMC_SRAMCR2_RD_MASK     (0xF00000U)
+#define SEMC_SRAMCR2_RD_SHIFT    (20U)
+#define SEMC_SRAMCR2_RD(x)       (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_RD_SHIFT)) & SEMC_SRAMCR2_RD_MASK)
+#define SEMC_SRAMCR2_CEITV_MASK  (0xF000000U)
+#define SEMC_SRAMCR2_CEITV_SHIFT (24U)
+#define SEMC_SRAMCR2_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR2_CEITV_SHIFT)) & SEMC_SRAMCR2_CEITV_MASK)
 /*! @} */
 
 /*! @name DBICR0 - DBI-B control register 0 */
 /*! @{ */
-#define SEMC_DBICR0_PS_MASK                      (0x1U)
-#define SEMC_DBICR0_PS_SHIFT                     (0U)
-#define SEMC_DBICR0_PS(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_PS_SHIFT)) & SEMC_DBICR0_PS_MASK)
-#define SEMC_DBICR0_BL_MASK                      (0x70U)
-#define SEMC_DBICR0_BL_SHIFT                     (4U)
-#define SEMC_DBICR0_BL(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_BL_SHIFT)) & SEMC_DBICR0_BL_MASK)
-#define SEMC_DBICR0_COL_MASK                     (0xF000U)
-#define SEMC_DBICR0_COL_SHIFT                    (12U)
-#define SEMC_DBICR0_COL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_COL_SHIFT)) & SEMC_DBICR0_COL_MASK)
+#define SEMC_DBICR0_PS_MASK   (0x1U)
+#define SEMC_DBICR0_PS_SHIFT  (0U)
+#define SEMC_DBICR0_PS(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_PS_SHIFT)) & SEMC_DBICR0_PS_MASK)
+#define SEMC_DBICR0_BL_MASK   (0x70U)
+#define SEMC_DBICR0_BL_SHIFT  (4U)
+#define SEMC_DBICR0_BL(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_BL_SHIFT)) & SEMC_DBICR0_BL_MASK)
+#define SEMC_DBICR0_COL_MASK  (0xF000U)
+#define SEMC_DBICR0_COL_SHIFT (12U)
+#define SEMC_DBICR0_COL(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR0_COL_SHIFT)) & SEMC_DBICR0_COL_MASK)
 /*! @} */
 
 /*! @name DBICR1 - DBI-B control register 1 */
 /*! @{ */
-#define SEMC_DBICR1_CES_MASK                     (0xFU)
-#define SEMC_DBICR1_CES_SHIFT                    (0U)
-#define SEMC_DBICR1_CES(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CES_SHIFT)) & SEMC_DBICR1_CES_MASK)
-#define SEMC_DBICR1_CEH_MASK                     (0xF0U)
-#define SEMC_DBICR1_CEH_SHIFT                    (4U)
-#define SEMC_DBICR1_CEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEH_SHIFT)) & SEMC_DBICR1_CEH_MASK)
-#define SEMC_DBICR1_WEL_MASK                     (0xF00U)
-#define SEMC_DBICR1_WEL_SHIFT                    (8U)
-#define SEMC_DBICR1_WEL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEL_SHIFT)) & SEMC_DBICR1_WEL_MASK)
-#define SEMC_DBICR1_WEH_MASK                     (0xF000U)
-#define SEMC_DBICR1_WEH_SHIFT                    (12U)
-#define SEMC_DBICR1_WEH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEH_SHIFT)) & SEMC_DBICR1_WEH_MASK)
-#define SEMC_DBICR1_REL_MASK                     (0xF0000U)
-#define SEMC_DBICR1_REL_SHIFT                    (16U)
-#define SEMC_DBICR1_REL(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL_SHIFT)) & SEMC_DBICR1_REL_MASK)
-#define SEMC_DBICR1_REH_MASK                     (0xF00000U)
-#define SEMC_DBICR1_REH_SHIFT                    (20U)
-#define SEMC_DBICR1_REH(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH_SHIFT)) & SEMC_DBICR1_REH_MASK)
-#define SEMC_DBICR1_CEITV_MASK                   (0xF000000U)
-#define SEMC_DBICR1_CEITV_SHIFT                  (24U)
-#define SEMC_DBICR1_CEITV(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEITV_SHIFT)) & SEMC_DBICR1_CEITV_MASK)
-#define SEMC_DBICR1_REL2_MASK                    (0x30000000U)
-#define SEMC_DBICR1_REL2_SHIFT                   (28U)
-#define SEMC_DBICR1_REL2(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL2_SHIFT)) & SEMC_DBICR1_REL2_MASK)
-#define SEMC_DBICR1_REH2_MASK                    (0xC0000000U)
-#define SEMC_DBICR1_REH2_SHIFT                   (30U)
-#define SEMC_DBICR1_REH2(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH2_SHIFT)) & SEMC_DBICR1_REH2_MASK)
+#define SEMC_DBICR1_CES_MASK    (0xFU)
+#define SEMC_DBICR1_CES_SHIFT   (0U)
+#define SEMC_DBICR1_CES(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CES_SHIFT)) & SEMC_DBICR1_CES_MASK)
+#define SEMC_DBICR1_CEH_MASK    (0xF0U)
+#define SEMC_DBICR1_CEH_SHIFT   (4U)
+#define SEMC_DBICR1_CEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEH_SHIFT)) & SEMC_DBICR1_CEH_MASK)
+#define SEMC_DBICR1_WEL_MASK    (0xF00U)
+#define SEMC_DBICR1_WEL_SHIFT   (8U)
+#define SEMC_DBICR1_WEL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEL_SHIFT)) & SEMC_DBICR1_WEL_MASK)
+#define SEMC_DBICR1_WEH_MASK    (0xF000U)
+#define SEMC_DBICR1_WEH_SHIFT   (12U)
+#define SEMC_DBICR1_WEH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_WEH_SHIFT)) & SEMC_DBICR1_WEH_MASK)
+#define SEMC_DBICR1_REL_MASK    (0xF0000U)
+#define SEMC_DBICR1_REL_SHIFT   (16U)
+#define SEMC_DBICR1_REL(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL_SHIFT)) & SEMC_DBICR1_REL_MASK)
+#define SEMC_DBICR1_REH_MASK    (0xF00000U)
+#define SEMC_DBICR1_REH_SHIFT   (20U)
+#define SEMC_DBICR1_REH(x)      (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH_SHIFT)) & SEMC_DBICR1_REH_MASK)
+#define SEMC_DBICR1_CEITV_MASK  (0xF000000U)
+#define SEMC_DBICR1_CEITV_SHIFT (24U)
+#define SEMC_DBICR1_CEITV(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_CEITV_SHIFT)) & SEMC_DBICR1_CEITV_MASK)
+#define SEMC_DBICR1_REL2_MASK   (0x30000000U)
+#define SEMC_DBICR1_REL2_SHIFT  (28U)
+#define SEMC_DBICR1_REL2(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REL2_SHIFT)) & SEMC_DBICR1_REL2_MASK)
+#define SEMC_DBICR1_REH2_MASK   (0xC0000000U)
+#define SEMC_DBICR1_REH2_SHIFT  (30U)
+#define SEMC_DBICR1_REH2(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_DBICR1_REH2_SHIFT)) & SEMC_DBICR1_REH2_MASK)
 /*! @} */
 
 /*! @name IPCR0 - IP Command control register 0 */
 /*! @{ */
-#define SEMC_IPCR0_SA_MASK                       (0xFFFFFFFFU)
-#define SEMC_IPCR0_SA_SHIFT                      (0U)
-#define SEMC_IPCR0_SA(x)                         (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR0_SA_SHIFT)) & SEMC_IPCR0_SA_MASK)
+#define SEMC_IPCR0_SA_MASK  (0xFFFFFFFFU)
+#define SEMC_IPCR0_SA_SHIFT (0U)
+#define SEMC_IPCR0_SA(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR0_SA_SHIFT)) & SEMC_IPCR0_SA_MASK)
 /*! @} */
 
 /*! @name IPCR1 - IP Command control register 1 */
 /*! @{ */
-#define SEMC_IPCR1_DATSZ_MASK                    (0x7U)
-#define SEMC_IPCR1_DATSZ_SHIFT                   (0U)
-#define SEMC_IPCR1_DATSZ(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR1_DATSZ_SHIFT)) & SEMC_IPCR1_DATSZ_MASK)
+#define SEMC_IPCR1_DATSZ_MASK  (0x7U)
+#define SEMC_IPCR1_DATSZ_SHIFT (0U)
+#define SEMC_IPCR1_DATSZ(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR1_DATSZ_SHIFT)) & SEMC_IPCR1_DATSZ_MASK)
 /*! @} */
 
 /*! @name IPCR2 - IP Command control register 2 */
 /*! @{ */
-#define SEMC_IPCR2_BM0_MASK                      (0x1U)
-#define SEMC_IPCR2_BM0_SHIFT                     (0U)
-#define SEMC_IPCR2_BM0(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM0_SHIFT)) & SEMC_IPCR2_BM0_MASK)
-#define SEMC_IPCR2_BM1_MASK                      (0x2U)
-#define SEMC_IPCR2_BM1_SHIFT                     (1U)
-#define SEMC_IPCR2_BM1(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM1_SHIFT)) & SEMC_IPCR2_BM1_MASK)
-#define SEMC_IPCR2_BM2_MASK                      (0x4U)
-#define SEMC_IPCR2_BM2_SHIFT                     (2U)
-#define SEMC_IPCR2_BM2(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM2_SHIFT)) & SEMC_IPCR2_BM2_MASK)
-#define SEMC_IPCR2_BM3_MASK                      (0x8U)
-#define SEMC_IPCR2_BM3_SHIFT                     (3U)
-#define SEMC_IPCR2_BM3(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM3_SHIFT)) & SEMC_IPCR2_BM3_MASK)
+#define SEMC_IPCR2_BM0_MASK  (0x1U)
+#define SEMC_IPCR2_BM0_SHIFT (0U)
+#define SEMC_IPCR2_BM0(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM0_SHIFT)) & SEMC_IPCR2_BM0_MASK)
+#define SEMC_IPCR2_BM1_MASK  (0x2U)
+#define SEMC_IPCR2_BM1_SHIFT (1U)
+#define SEMC_IPCR2_BM1(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM1_SHIFT)) & SEMC_IPCR2_BM1_MASK)
+#define SEMC_IPCR2_BM2_MASK  (0x4U)
+#define SEMC_IPCR2_BM2_SHIFT (2U)
+#define SEMC_IPCR2_BM2(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM2_SHIFT)) & SEMC_IPCR2_BM2_MASK)
+#define SEMC_IPCR2_BM3_MASK  (0x8U)
+#define SEMC_IPCR2_BM3_SHIFT (3U)
+#define SEMC_IPCR2_BM3(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCR2_BM3_SHIFT)) & SEMC_IPCR2_BM3_MASK)
 /*! @} */
 
 /*! @name IPCMD - IP Command register */
 /*! @{ */
-#define SEMC_IPCMD_CMD_MASK                      (0xFFFFU)
-#define SEMC_IPCMD_CMD_SHIFT                     (0U)
-#define SEMC_IPCMD_CMD(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_CMD_SHIFT)) & SEMC_IPCMD_CMD_MASK)
-#define SEMC_IPCMD_KEY_MASK                      (0xFFFF0000U)
-#define SEMC_IPCMD_KEY_SHIFT                     (16U)
-#define SEMC_IPCMD_KEY(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_KEY_SHIFT)) & SEMC_IPCMD_KEY_MASK)
+#define SEMC_IPCMD_CMD_MASK  (0xFFFFU)
+#define SEMC_IPCMD_CMD_SHIFT (0U)
+#define SEMC_IPCMD_CMD(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_CMD_SHIFT)) & SEMC_IPCMD_CMD_MASK)
+#define SEMC_IPCMD_KEY_MASK  (0xFFFF0000U)
+#define SEMC_IPCMD_KEY_SHIFT (16U)
+#define SEMC_IPCMD_KEY(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPCMD_KEY_SHIFT)) & SEMC_IPCMD_KEY_MASK)
 /*! @} */
 
 /*! @name IPTXDAT - TX DATA register (for IP Command) */
 /*! @{ */
-#define SEMC_IPTXDAT_DAT_MASK                    (0xFFFFFFFFU)
-#define SEMC_IPTXDAT_DAT_SHIFT                   (0U)
-#define SEMC_IPTXDAT_DAT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPTXDAT_DAT_SHIFT)) & SEMC_IPTXDAT_DAT_MASK)
+#define SEMC_IPTXDAT_DAT_MASK  (0xFFFFFFFFU)
+#define SEMC_IPTXDAT_DAT_SHIFT (0U)
+#define SEMC_IPTXDAT_DAT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPTXDAT_DAT_SHIFT)) & SEMC_IPTXDAT_DAT_MASK)
 /*! @} */
 
 /*! @name IPRXDAT - RX DATA register (for IP Command) */
 /*! @{ */
-#define SEMC_IPRXDAT_DAT_MASK                    (0xFFFFFFFFU)
-#define SEMC_IPRXDAT_DAT_SHIFT                   (0U)
-#define SEMC_IPRXDAT_DAT(x)                      (((uint32_t)(((uint32_t)(x)) << SEMC_IPRXDAT_DAT_SHIFT)) & SEMC_IPRXDAT_DAT_MASK)
+#define SEMC_IPRXDAT_DAT_MASK  (0xFFFFFFFFU)
+#define SEMC_IPRXDAT_DAT_SHIFT (0U)
+#define SEMC_IPRXDAT_DAT(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_IPRXDAT_DAT_SHIFT)) & SEMC_IPRXDAT_DAT_MASK)
 /*! @} */
 
 /*! @name STS0 - Status register 0 */
 /*! @{ */
-#define SEMC_STS0_IDLE_MASK                      (0x1U)
-#define SEMC_STS0_IDLE_SHIFT                     (0U)
-#define SEMC_STS0_IDLE(x)                        (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_IDLE_SHIFT)) & SEMC_STS0_IDLE_MASK)
-#define SEMC_STS0_NARDY_MASK                     (0x2U)
-#define SEMC_STS0_NARDY_SHIFT                    (1U)
-#define SEMC_STS0_NARDY(x)                       (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_NARDY_SHIFT)) & SEMC_STS0_NARDY_MASK)
+#define SEMC_STS0_IDLE_MASK   (0x1U)
+#define SEMC_STS0_IDLE_SHIFT  (0U)
+#define SEMC_STS0_IDLE(x)     (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_IDLE_SHIFT)) & SEMC_STS0_IDLE_MASK)
+#define SEMC_STS0_NARDY_MASK  (0x2U)
+#define SEMC_STS0_NARDY_SHIFT (1U)
+#define SEMC_STS0_NARDY(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS0_NARDY_SHIFT)) & SEMC_STS0_NARDY_MASK)
 /*! @} */
 
 /*! @name STS2 - Status register 2 */
 /*! @{ */
-#define SEMC_STS2_NDWRPEND_MASK                  (0x8U)
-#define SEMC_STS2_NDWRPEND_SHIFT                 (3U)
-#define SEMC_STS2_NDWRPEND(x)                    (((uint32_t)(((uint32_t)(x)) << SEMC_STS2_NDWRPEND_SHIFT)) & SEMC_STS2_NDWRPEND_MASK)
+#define SEMC_STS2_NDWRPEND_MASK  (0x8U)
+#define SEMC_STS2_NDWRPEND_SHIFT (3U)
+#define SEMC_STS2_NDWRPEND(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS2_NDWRPEND_SHIFT)) & SEMC_STS2_NDWRPEND_MASK)
 /*! @} */
 
 /*! @name STS12 - Status register 12 */
 /*! @{ */
-#define SEMC_STS12_NDADDR_MASK                   (0xFFFFFFFFU)
-#define SEMC_STS12_NDADDR_SHIFT                  (0U)
-#define SEMC_STS12_NDADDR(x)                     (((uint32_t)(((uint32_t)(x)) << SEMC_STS12_NDADDR_SHIFT)) & SEMC_STS12_NDADDR_MASK)
+#define SEMC_STS12_NDADDR_MASK  (0xFFFFFFFFU)
+#define SEMC_STS12_NDADDR_SHIFT (0U)
+#define SEMC_STS12_NDADDR(x)    (((uint32_t)(((uint32_t)(x)) << SEMC_STS12_NDADDR_SHIFT)) & SEMC_STS12_NDADDR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SEMC_Register_Masks */
 
-
 /* SEMC - Peripheral instance base addresses */
 /** Peripheral SEMC base address */
-#define SEMC_BASE                                (0x402F0000u)
+#define SEMC_BASE (0x402F0000u)
 /** Peripheral SEMC base pointer */
-#define SEMC                                     ((SEMC_Type *)SEMC_BASE)
+#define SEMC ((SEMC_Type *)SEMC_BASE)
 /** Array initializer of SEMC peripheral base addresses */
-#define SEMC_BASE_ADDRS                          { SEMC_BASE }
+#define SEMC_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        SEMC_BASE                                                                                                      \
+    }
 /** Array initializer of SEMC peripheral base pointers */
-#define SEMC_BASE_PTRS                           { SEMC }
+#define SEMC_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        SEMC                                                                                                           \
+    }
 /** Interrupt vectors for the SEMC peripheral type */
-#define SEMC_IRQS                                { SEMC_IRQn }
+#define SEMC_IRQS                                                                                                      \
+    {                                                                                                                  \
+        SEMC_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group SEMC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SNVS Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -19066,42 +21797,43 @@ typedef struct {
  */
 
 /** SNVS - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t HPLR;                              /**< SNVS_HP Lock Register, offset: 0x0 */
-  __IO uint32_t HPCOMR;                            /**< SNVS_HP Command Register, offset: 0x4 */
-  __IO uint32_t HPCR;                              /**< SNVS_HP Control Register, offset: 0x8 */
-  __IO uint32_t HPSICR;                            /**< SNVS_HP Security Interrupt Control Register, offset: 0xC */
-  __IO uint32_t HPSVCR;                            /**< SNVS_HP Security Violation Control Register, offset: 0x10 */
-  __IO uint32_t HPSR;                              /**< SNVS_HP Status Register, offset: 0x14 */
-  __IO uint32_t HPSVSR;                            /**< SNVS_HP Security Violation Status Register, offset: 0x18 */
-  __IO uint32_t HPHACIVR;                          /**< SNVS_HP High Assurance Counter IV Register, offset: 0x1C */
-  __I  uint32_t HPHACR;                            /**< SNVS_HP High Assurance Counter Register, offset: 0x20 */
-  __IO uint32_t HPRTCMR;                           /**< SNVS_HP Real Time Counter MSB Register, offset: 0x24 */
-  __IO uint32_t HPRTCLR;                           /**< SNVS_HP Real Time Counter LSB Register, offset: 0x28 */
-  __IO uint32_t HPTAMR;                            /**< SNVS_HP Time Alarm MSB Register, offset: 0x2C */
-  __IO uint32_t HPTALR;                            /**< SNVS_HP Time Alarm LSB Register, offset: 0x30 */
-  __IO uint32_t LPLR;                              /**< SNVS_LP Lock Register, offset: 0x34 */
-  __IO uint32_t LPCR;                              /**< SNVS_LP Control Register, offset: 0x38 */
-  __IO uint32_t LPMKCR;                            /**< SNVS_LP Master Key Control Register, offset: 0x3C */
-  __IO uint32_t LPSVCR;                            /**< SNVS_LP Security Violation Control Register, offset: 0x40 */
-       uint8_t RESERVED_0[4];
-  __IO uint32_t LPTDCR;                            /**< SNVS_LP Tamper Detectors Configuration Register, offset: 0x48 */
-  __IO uint32_t LPSR;                              /**< SNVS_LP Status Register, offset: 0x4C */
-  __IO uint32_t LPSRTCMR;                          /**< SNVS_LP Secure Real Time Counter MSB Register, offset: 0x50 */
-  __IO uint32_t LPSRTCLR;                          /**< SNVS_LP Secure Real Time Counter LSB Register, offset: 0x54 */
-  __IO uint32_t LPTAR;                             /**< SNVS_LP Time Alarm Register, offset: 0x58 */
-  __I  uint32_t LPSMCMR;                           /**< SNVS_LP Secure Monotonic Counter MSB Register, offset: 0x5C */
-  __I  uint32_t LPSMCLR;                           /**< SNVS_LP Secure Monotonic Counter LSB Register, offset: 0x60 */
-  __IO uint32_t LPPGDR;                            /**< SNVS_LP Power Glitch Detector Register, offset: 0x64 */
-  __IO uint32_t LPGPR0_LEGACY_ALIAS;               /**< SNVS_LP General Purpose Register 0 (legacy alias), offset: 0x68 */
-  __IO uint32_t LPZMKR[8];                         /**< SNVS_LP Zeroizable Master Key Register, array offset: 0x6C, array step: 0x4 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t LPGPR_ALIAS[4];                    /**< SNVS_LP General Purpose Registers 0 .. 3, array offset: 0x90, array step: 0x4 */
-       uint8_t RESERVED_2[96];
-  __IO uint32_t LPGPR[8];                          /**< SNVS_LP General Purpose Registers 0 .. 7, array offset: 0x100, array step: 0x4 */
-       uint8_t RESERVED_3[2776];
-  __I  uint32_t HPVIDR1;                           /**< SNVS_HP Version ID Register 1, offset: 0xBF8 */
-  __I  uint32_t HPVIDR2;                           /**< SNVS_HP Version ID Register 2, offset: 0xBFC */
+typedef struct
+{
+    __IO uint32_t HPLR;     /**< SNVS_HP Lock Register, offset: 0x0 */
+    __IO uint32_t HPCOMR;   /**< SNVS_HP Command Register, offset: 0x4 */
+    __IO uint32_t HPCR;     /**< SNVS_HP Control Register, offset: 0x8 */
+    __IO uint32_t HPSICR;   /**< SNVS_HP Security Interrupt Control Register, offset: 0xC */
+    __IO uint32_t HPSVCR;   /**< SNVS_HP Security Violation Control Register, offset: 0x10 */
+    __IO uint32_t HPSR;     /**< SNVS_HP Status Register, offset: 0x14 */
+    __IO uint32_t HPSVSR;   /**< SNVS_HP Security Violation Status Register, offset: 0x18 */
+    __IO uint32_t HPHACIVR; /**< SNVS_HP High Assurance Counter IV Register, offset: 0x1C */
+    __I uint32_t HPHACR;    /**< SNVS_HP High Assurance Counter Register, offset: 0x20 */
+    __IO uint32_t HPRTCMR;  /**< SNVS_HP Real Time Counter MSB Register, offset: 0x24 */
+    __IO uint32_t HPRTCLR;  /**< SNVS_HP Real Time Counter LSB Register, offset: 0x28 */
+    __IO uint32_t HPTAMR;   /**< SNVS_HP Time Alarm MSB Register, offset: 0x2C */
+    __IO uint32_t HPTALR;   /**< SNVS_HP Time Alarm LSB Register, offset: 0x30 */
+    __IO uint32_t LPLR;     /**< SNVS_LP Lock Register, offset: 0x34 */
+    __IO uint32_t LPCR;     /**< SNVS_LP Control Register, offset: 0x38 */
+    __IO uint32_t LPMKCR;   /**< SNVS_LP Master Key Control Register, offset: 0x3C */
+    __IO uint32_t LPSVCR;   /**< SNVS_LP Security Violation Control Register, offset: 0x40 */
+    uint8_t RESERVED_0[4];
+    __IO uint32_t LPTDCR;              /**< SNVS_LP Tamper Detectors Configuration Register, offset: 0x48 */
+    __IO uint32_t LPSR;                /**< SNVS_LP Status Register, offset: 0x4C */
+    __IO uint32_t LPSRTCMR;            /**< SNVS_LP Secure Real Time Counter MSB Register, offset: 0x50 */
+    __IO uint32_t LPSRTCLR;            /**< SNVS_LP Secure Real Time Counter LSB Register, offset: 0x54 */
+    __IO uint32_t LPTAR;               /**< SNVS_LP Time Alarm Register, offset: 0x58 */
+    __I uint32_t LPSMCMR;              /**< SNVS_LP Secure Monotonic Counter MSB Register, offset: 0x5C */
+    __I uint32_t LPSMCLR;              /**< SNVS_LP Secure Monotonic Counter LSB Register, offset: 0x60 */
+    __IO uint32_t LPPGDR;              /**< SNVS_LP Power Glitch Detector Register, offset: 0x64 */
+    __IO uint32_t LPGPR0_LEGACY_ALIAS; /**< SNVS_LP General Purpose Register 0 (legacy alias), offset: 0x68 */
+    __IO uint32_t LPZMKR[8]; /**< SNVS_LP Zeroizable Master Key Register, array offset: 0x6C, array step: 0x4 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t LPGPR_ALIAS[4]; /**< SNVS_LP General Purpose Registers 0 .. 3, array offset: 0x90, array step: 0x4 */
+    uint8_t RESERVED_2[96];
+    __IO uint32_t LPGPR[8]; /**< SNVS_LP General Purpose Registers 0 .. 7, array offset: 0x100, array step: 0x4 */
+    uint8_t RESERVED_3[2776];
+    __I uint32_t HPVIDR1; /**< SNVS_HP Version ID Register 1, offset: 0xBF8 */
+    __I uint32_t HPVIDR2; /**< SNVS_HP Version ID Register 2, offset: 0xBFC */
 } SNVS_Type;
 
 /* ----------------------------------------------------------------------------
@@ -19115,615 +21847,668 @@ typedef struct {
 
 /*! @name HPLR - SNVS_HP Lock Register */
 /*! @{ */
-#define SNVS_HPLR_ZMK_WSL_MASK                   (0x1U)
-#define SNVS_HPLR_ZMK_WSL_SHIFT                  (0U)
-#define SNVS_HPLR_ZMK_WSL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_WSL_SHIFT)) & SNVS_HPLR_ZMK_WSL_MASK)
-#define SNVS_HPLR_ZMK_RSL_MASK                   (0x2U)
-#define SNVS_HPLR_ZMK_RSL_SHIFT                  (1U)
-#define SNVS_HPLR_ZMK_RSL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_RSL_SHIFT)) & SNVS_HPLR_ZMK_RSL_MASK)
-#define SNVS_HPLR_SRTC_SL_MASK                   (0x4U)
-#define SNVS_HPLR_SRTC_SL_SHIFT                  (2U)
-#define SNVS_HPLR_SRTC_SL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_SRTC_SL_SHIFT)) & SNVS_HPLR_SRTC_SL_MASK)
-#define SNVS_HPLR_LPCALB_SL_MASK                 (0x8U)
-#define SNVS_HPLR_LPCALB_SL_SHIFT                (3U)
-#define SNVS_HPLR_LPCALB_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPCALB_SL_SHIFT)) & SNVS_HPLR_LPCALB_SL_MASK)
-#define SNVS_HPLR_MC_SL_MASK                     (0x10U)
-#define SNVS_HPLR_MC_SL_SHIFT                    (4U)
-#define SNVS_HPLR_MC_SL(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MC_SL_SHIFT)) & SNVS_HPLR_MC_SL_MASK)
-#define SNVS_HPLR_GPR_SL_MASK                    (0x20U)
-#define SNVS_HPLR_GPR_SL_SHIFT                   (5U)
-#define SNVS_HPLR_GPR_SL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_GPR_SL_SHIFT)) & SNVS_HPLR_GPR_SL_MASK)
-#define SNVS_HPLR_LPSVCR_SL_MASK                 (0x40U)
-#define SNVS_HPLR_LPSVCR_SL_SHIFT                (6U)
-#define SNVS_HPLR_LPSVCR_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPSVCR_SL_SHIFT)) & SNVS_HPLR_LPSVCR_SL_MASK)
-#define SNVS_HPLR_LPTDCR_SL_MASK                 (0x100U)
-#define SNVS_HPLR_LPTDCR_SL_SHIFT                (8U)
-#define SNVS_HPLR_LPTDCR_SL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPTDCR_SL_SHIFT)) & SNVS_HPLR_LPTDCR_SL_MASK)
-#define SNVS_HPLR_MKS_SL_MASK                    (0x200U)
-#define SNVS_HPLR_MKS_SL_SHIFT                   (9U)
-#define SNVS_HPLR_MKS_SL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MKS_SL_SHIFT)) & SNVS_HPLR_MKS_SL_MASK)
-#define SNVS_HPLR_HPSVCR_L_MASK                  (0x10000U)
-#define SNVS_HPLR_HPSVCR_L_SHIFT                 (16U)
-#define SNVS_HPLR_HPSVCR_L(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSVCR_L_SHIFT)) & SNVS_HPLR_HPSVCR_L_MASK)
-#define SNVS_HPLR_HPSICR_L_MASK                  (0x20000U)
-#define SNVS_HPLR_HPSICR_L_SHIFT                 (17U)
-#define SNVS_HPLR_HPSICR_L(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSICR_L_SHIFT)) & SNVS_HPLR_HPSICR_L_MASK)
-#define SNVS_HPLR_HAC_L_MASK                     (0x40000U)
-#define SNVS_HPLR_HAC_L_SHIFT                    (18U)
-#define SNVS_HPLR_HAC_L(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HAC_L_SHIFT)) & SNVS_HPLR_HAC_L_MASK)
+#define SNVS_HPLR_ZMK_WSL_MASK    (0x1U)
+#define SNVS_HPLR_ZMK_WSL_SHIFT   (0U)
+#define SNVS_HPLR_ZMK_WSL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_WSL_SHIFT)) & SNVS_HPLR_ZMK_WSL_MASK)
+#define SNVS_HPLR_ZMK_RSL_MASK    (0x2U)
+#define SNVS_HPLR_ZMK_RSL_SHIFT   (1U)
+#define SNVS_HPLR_ZMK_RSL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_ZMK_RSL_SHIFT)) & SNVS_HPLR_ZMK_RSL_MASK)
+#define SNVS_HPLR_SRTC_SL_MASK    (0x4U)
+#define SNVS_HPLR_SRTC_SL_SHIFT   (2U)
+#define SNVS_HPLR_SRTC_SL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_SRTC_SL_SHIFT)) & SNVS_HPLR_SRTC_SL_MASK)
+#define SNVS_HPLR_LPCALB_SL_MASK  (0x8U)
+#define SNVS_HPLR_LPCALB_SL_SHIFT (3U)
+#define SNVS_HPLR_LPCALB_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPCALB_SL_SHIFT)) & SNVS_HPLR_LPCALB_SL_MASK)
+#define SNVS_HPLR_MC_SL_MASK      (0x10U)
+#define SNVS_HPLR_MC_SL_SHIFT     (4U)
+#define SNVS_HPLR_MC_SL(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MC_SL_SHIFT)) & SNVS_HPLR_MC_SL_MASK)
+#define SNVS_HPLR_GPR_SL_MASK     (0x20U)
+#define SNVS_HPLR_GPR_SL_SHIFT    (5U)
+#define SNVS_HPLR_GPR_SL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_GPR_SL_SHIFT)) & SNVS_HPLR_GPR_SL_MASK)
+#define SNVS_HPLR_LPSVCR_SL_MASK  (0x40U)
+#define SNVS_HPLR_LPSVCR_SL_SHIFT (6U)
+#define SNVS_HPLR_LPSVCR_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPSVCR_SL_SHIFT)) & SNVS_HPLR_LPSVCR_SL_MASK)
+#define SNVS_HPLR_LPTDCR_SL_MASK  (0x100U)
+#define SNVS_HPLR_LPTDCR_SL_SHIFT (8U)
+#define SNVS_HPLR_LPTDCR_SL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_LPTDCR_SL_SHIFT)) & SNVS_HPLR_LPTDCR_SL_MASK)
+#define SNVS_HPLR_MKS_SL_MASK     (0x200U)
+#define SNVS_HPLR_MKS_SL_SHIFT    (9U)
+#define SNVS_HPLR_MKS_SL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_MKS_SL_SHIFT)) & SNVS_HPLR_MKS_SL_MASK)
+#define SNVS_HPLR_HPSVCR_L_MASK   (0x10000U)
+#define SNVS_HPLR_HPSVCR_L_SHIFT  (16U)
+#define SNVS_HPLR_HPSVCR_L(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSVCR_L_SHIFT)) & SNVS_HPLR_HPSVCR_L_MASK)
+#define SNVS_HPLR_HPSICR_L_MASK   (0x20000U)
+#define SNVS_HPLR_HPSICR_L_SHIFT  (17U)
+#define SNVS_HPLR_HPSICR_L(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HPSICR_L_SHIFT)) & SNVS_HPLR_HPSICR_L_MASK)
+#define SNVS_HPLR_HAC_L_MASK      (0x40000U)
+#define SNVS_HPLR_HAC_L_SHIFT     (18U)
+#define SNVS_HPLR_HAC_L(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_HAC_L_SHIFT)) & SNVS_HPLR_HAC_L_MASK)
 /*! @} */
 
 /*! @name HPCOMR - SNVS_HP Command Register */
 /*! @{ */
-#define SNVS_HPCOMR_SSM_ST_MASK                  (0x1U)
-#define SNVS_HPCOMR_SSM_ST_SHIFT                 (0U)
-#define SNVS_HPCOMR_SSM_ST(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_SHIFT)) & SNVS_HPCOMR_SSM_ST_MASK)
-#define SNVS_HPCOMR_SSM_ST_DIS_MASK              (0x2U)
-#define SNVS_HPCOMR_SSM_ST_DIS_SHIFT             (1U)
-#define SNVS_HPCOMR_SSM_ST_DIS(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_DIS_SHIFT)) & SNVS_HPCOMR_SSM_ST_DIS_MASK)
-#define SNVS_HPCOMR_SSM_SFNS_DIS_MASK            (0x4U)
-#define SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT           (2U)
-#define SNVS_HPCOMR_SSM_SFNS_DIS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT)) & SNVS_HPCOMR_SSM_SFNS_DIS_MASK)
-#define SNVS_HPCOMR_LP_SWR_MASK                  (0x10U)
-#define SNVS_HPCOMR_LP_SWR_SHIFT                 (4U)
-#define SNVS_HPCOMR_LP_SWR(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_SHIFT)) & SNVS_HPCOMR_LP_SWR_MASK)
-#define SNVS_HPCOMR_LP_SWR_DIS_MASK              (0x20U)
-#define SNVS_HPCOMR_LP_SWR_DIS_SHIFT             (5U)
-#define SNVS_HPCOMR_LP_SWR_DIS(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_DIS_SHIFT)) & SNVS_HPCOMR_LP_SWR_DIS_MASK)
-#define SNVS_HPCOMR_SW_SV_MASK                   (0x100U)
-#define SNVS_HPCOMR_SW_SV_SHIFT                  (8U)
-#define SNVS_HPCOMR_SW_SV(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_SV_SHIFT)) & SNVS_HPCOMR_SW_SV_MASK)
-#define SNVS_HPCOMR_SW_FSV_MASK                  (0x200U)
-#define SNVS_HPCOMR_SW_FSV_SHIFT                 (9U)
-#define SNVS_HPCOMR_SW_FSV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_FSV_SHIFT)) & SNVS_HPCOMR_SW_FSV_MASK)
-#define SNVS_HPCOMR_SW_LPSV_MASK                 (0x400U)
-#define SNVS_HPCOMR_SW_LPSV_SHIFT                (10U)
-#define SNVS_HPCOMR_SW_LPSV(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_LPSV_SHIFT)) & SNVS_HPCOMR_SW_LPSV_MASK)
-#define SNVS_HPCOMR_PROG_ZMK_MASK                (0x1000U)
-#define SNVS_HPCOMR_PROG_ZMK_SHIFT               (12U)
-#define SNVS_HPCOMR_PROG_ZMK(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_PROG_ZMK_SHIFT)) & SNVS_HPCOMR_PROG_ZMK_MASK)
-#define SNVS_HPCOMR_MKS_EN_MASK                  (0x2000U)
-#define SNVS_HPCOMR_MKS_EN_SHIFT                 (13U)
-#define SNVS_HPCOMR_MKS_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_MKS_EN_SHIFT)) & SNVS_HPCOMR_MKS_EN_MASK)
-#define SNVS_HPCOMR_HAC_EN_MASK                  (0x10000U)
-#define SNVS_HPCOMR_HAC_EN_SHIFT                 (16U)
-#define SNVS_HPCOMR_HAC_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_EN_SHIFT)) & SNVS_HPCOMR_HAC_EN_MASK)
-#define SNVS_HPCOMR_HAC_LOAD_MASK                (0x20000U)
-#define SNVS_HPCOMR_HAC_LOAD_SHIFT               (17U)
-#define SNVS_HPCOMR_HAC_LOAD(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_LOAD_SHIFT)) & SNVS_HPCOMR_HAC_LOAD_MASK)
-#define SNVS_HPCOMR_HAC_CLEAR_MASK               (0x40000U)
-#define SNVS_HPCOMR_HAC_CLEAR_SHIFT              (18U)
-#define SNVS_HPCOMR_HAC_CLEAR(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_CLEAR_SHIFT)) & SNVS_HPCOMR_HAC_CLEAR_MASK)
-#define SNVS_HPCOMR_HAC_STOP_MASK                (0x80000U)
-#define SNVS_HPCOMR_HAC_STOP_SHIFT               (19U)
-#define SNVS_HPCOMR_HAC_STOP(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_STOP_SHIFT)) & SNVS_HPCOMR_HAC_STOP_MASK)
-#define SNVS_HPCOMR_NPSWA_EN_MASK                (0x80000000U)
-#define SNVS_HPCOMR_NPSWA_EN_SHIFT               (31U)
-#define SNVS_HPCOMR_NPSWA_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_NPSWA_EN_SHIFT)) & SNVS_HPCOMR_NPSWA_EN_MASK)
+#define SNVS_HPCOMR_SSM_ST_MASK      (0x1U)
+#define SNVS_HPCOMR_SSM_ST_SHIFT     (0U)
+#define SNVS_HPCOMR_SSM_ST(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_SHIFT)) & SNVS_HPCOMR_SSM_ST_MASK)
+#define SNVS_HPCOMR_SSM_ST_DIS_MASK  (0x2U)
+#define SNVS_HPCOMR_SSM_ST_DIS_SHIFT (1U)
+#define SNVS_HPCOMR_SSM_ST_DIS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_ST_DIS_SHIFT)) & SNVS_HPCOMR_SSM_ST_DIS_MASK)
+#define SNVS_HPCOMR_SSM_SFNS_DIS_MASK  (0x4U)
+#define SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT (2U)
+#define SNVS_HPCOMR_SSM_SFNS_DIS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SSM_SFNS_DIS_SHIFT)) & SNVS_HPCOMR_SSM_SFNS_DIS_MASK)
+#define SNVS_HPCOMR_LP_SWR_MASK      (0x10U)
+#define SNVS_HPCOMR_LP_SWR_SHIFT     (4U)
+#define SNVS_HPCOMR_LP_SWR(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_SHIFT)) & SNVS_HPCOMR_LP_SWR_MASK)
+#define SNVS_HPCOMR_LP_SWR_DIS_MASK  (0x20U)
+#define SNVS_HPCOMR_LP_SWR_DIS_SHIFT (5U)
+#define SNVS_HPCOMR_LP_SWR_DIS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_LP_SWR_DIS_SHIFT)) & SNVS_HPCOMR_LP_SWR_DIS_MASK)
+#define SNVS_HPCOMR_SW_SV_MASK     (0x100U)
+#define SNVS_HPCOMR_SW_SV_SHIFT    (8U)
+#define SNVS_HPCOMR_SW_SV(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_SV_SHIFT)) & SNVS_HPCOMR_SW_SV_MASK)
+#define SNVS_HPCOMR_SW_FSV_MASK    (0x200U)
+#define SNVS_HPCOMR_SW_FSV_SHIFT   (9U)
+#define SNVS_HPCOMR_SW_FSV(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_FSV_SHIFT)) & SNVS_HPCOMR_SW_FSV_MASK)
+#define SNVS_HPCOMR_SW_LPSV_MASK   (0x400U)
+#define SNVS_HPCOMR_SW_LPSV_SHIFT  (10U)
+#define SNVS_HPCOMR_SW_LPSV(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_SW_LPSV_SHIFT)) & SNVS_HPCOMR_SW_LPSV_MASK)
+#define SNVS_HPCOMR_PROG_ZMK_MASK  (0x1000U)
+#define SNVS_HPCOMR_PROG_ZMK_SHIFT (12U)
+#define SNVS_HPCOMR_PROG_ZMK(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_PROG_ZMK_SHIFT)) & SNVS_HPCOMR_PROG_ZMK_MASK)
+#define SNVS_HPCOMR_MKS_EN_MASK    (0x2000U)
+#define SNVS_HPCOMR_MKS_EN_SHIFT   (13U)
+#define SNVS_HPCOMR_MKS_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_MKS_EN_SHIFT)) & SNVS_HPCOMR_MKS_EN_MASK)
+#define SNVS_HPCOMR_HAC_EN_MASK    (0x10000U)
+#define SNVS_HPCOMR_HAC_EN_SHIFT   (16U)
+#define SNVS_HPCOMR_HAC_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_EN_SHIFT)) & SNVS_HPCOMR_HAC_EN_MASK)
+#define SNVS_HPCOMR_HAC_LOAD_MASK  (0x20000U)
+#define SNVS_HPCOMR_HAC_LOAD_SHIFT (17U)
+#define SNVS_HPCOMR_HAC_LOAD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_LOAD_SHIFT)) & SNVS_HPCOMR_HAC_LOAD_MASK)
+#define SNVS_HPCOMR_HAC_CLEAR_MASK  (0x40000U)
+#define SNVS_HPCOMR_HAC_CLEAR_SHIFT (18U)
+#define SNVS_HPCOMR_HAC_CLEAR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_CLEAR_SHIFT)) & SNVS_HPCOMR_HAC_CLEAR_MASK)
+#define SNVS_HPCOMR_HAC_STOP_MASK  (0x80000U)
+#define SNVS_HPCOMR_HAC_STOP_SHIFT (19U)
+#define SNVS_HPCOMR_HAC_STOP(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_HAC_STOP_SHIFT)) & SNVS_HPCOMR_HAC_STOP_MASK)
+#define SNVS_HPCOMR_NPSWA_EN_MASK  (0x80000000U)
+#define SNVS_HPCOMR_NPSWA_EN_SHIFT (31U)
+#define SNVS_HPCOMR_NPSWA_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCOMR_NPSWA_EN_SHIFT)) & SNVS_HPCOMR_NPSWA_EN_MASK)
 /*! @} */
 
 /*! @name HPCR - SNVS_HP Control Register */
 /*! @{ */
-#define SNVS_HPCR_RTC_EN_MASK                    (0x1U)
-#define SNVS_HPCR_RTC_EN_SHIFT                   (0U)
-#define SNVS_HPCR_RTC_EN(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_RTC_EN_SHIFT)) & SNVS_HPCR_RTC_EN_MASK)
-#define SNVS_HPCR_HPTA_EN_MASK                   (0x2U)
-#define SNVS_HPCR_HPTA_EN_SHIFT                  (1U)
-#define SNVS_HPCR_HPTA_EN(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPTA_EN_SHIFT)) & SNVS_HPCR_HPTA_EN_MASK)
-#define SNVS_HPCR_DIS_PI_MASK                    (0x4U)
-#define SNVS_HPCR_DIS_PI_SHIFT                   (2U)
-#define SNVS_HPCR_DIS_PI(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_DIS_PI_SHIFT)) & SNVS_HPCR_DIS_PI_MASK)
-#define SNVS_HPCR_PI_EN_MASK                     (0x8U)
-#define SNVS_HPCR_PI_EN_SHIFT                    (3U)
-#define SNVS_HPCR_PI_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_EN_SHIFT)) & SNVS_HPCR_PI_EN_MASK)
-#define SNVS_HPCR_PI_FREQ_MASK                   (0xF0U)
-#define SNVS_HPCR_PI_FREQ_SHIFT                  (4U)
-#define SNVS_HPCR_PI_FREQ(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_FREQ_SHIFT)) & SNVS_HPCR_PI_FREQ_MASK)
-#define SNVS_HPCR_HPCALB_EN_MASK                 (0x100U)
-#define SNVS_HPCR_HPCALB_EN_SHIFT                (8U)
-#define SNVS_HPCR_HPCALB_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_EN_SHIFT)) & SNVS_HPCR_HPCALB_EN_MASK)
-#define SNVS_HPCR_HPCALB_VAL_MASK                (0x7C00U)
-#define SNVS_HPCR_HPCALB_VAL_SHIFT               (10U)
-#define SNVS_HPCR_HPCALB_VAL(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_VAL_SHIFT)) & SNVS_HPCR_HPCALB_VAL_MASK)
-#define SNVS_HPCR_HP_TS_MASK                     (0x10000U)
-#define SNVS_HPCR_HP_TS_SHIFT                    (16U)
-#define SNVS_HPCR_HP_TS(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HP_TS_SHIFT)) & SNVS_HPCR_HP_TS_MASK)
-#define SNVS_HPCR_BTN_CONFIG_MASK                (0x7000000U)
-#define SNVS_HPCR_BTN_CONFIG_SHIFT               (24U)
-#define SNVS_HPCR_BTN_CONFIG(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_CONFIG_SHIFT)) & SNVS_HPCR_BTN_CONFIG_MASK)
-#define SNVS_HPCR_BTN_MASK_MASK                  (0x8000000U)
-#define SNVS_HPCR_BTN_MASK_SHIFT                 (27U)
-#define SNVS_HPCR_BTN_MASK(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_MASK_SHIFT)) & SNVS_HPCR_BTN_MASK_MASK)
+#define SNVS_HPCR_RTC_EN_MASK      (0x1U)
+#define SNVS_HPCR_RTC_EN_SHIFT     (0U)
+#define SNVS_HPCR_RTC_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_RTC_EN_SHIFT)) & SNVS_HPCR_RTC_EN_MASK)
+#define SNVS_HPCR_HPTA_EN_MASK     (0x2U)
+#define SNVS_HPCR_HPTA_EN_SHIFT    (1U)
+#define SNVS_HPCR_HPTA_EN(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPTA_EN_SHIFT)) & SNVS_HPCR_HPTA_EN_MASK)
+#define SNVS_HPCR_DIS_PI_MASK      (0x4U)
+#define SNVS_HPCR_DIS_PI_SHIFT     (2U)
+#define SNVS_HPCR_DIS_PI(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_DIS_PI_SHIFT)) & SNVS_HPCR_DIS_PI_MASK)
+#define SNVS_HPCR_PI_EN_MASK       (0x8U)
+#define SNVS_HPCR_PI_EN_SHIFT      (3U)
+#define SNVS_HPCR_PI_EN(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_EN_SHIFT)) & SNVS_HPCR_PI_EN_MASK)
+#define SNVS_HPCR_PI_FREQ_MASK     (0xF0U)
+#define SNVS_HPCR_PI_FREQ_SHIFT    (4U)
+#define SNVS_HPCR_PI_FREQ(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_PI_FREQ_SHIFT)) & SNVS_HPCR_PI_FREQ_MASK)
+#define SNVS_HPCR_HPCALB_EN_MASK   (0x100U)
+#define SNVS_HPCR_HPCALB_EN_SHIFT  (8U)
+#define SNVS_HPCR_HPCALB_EN(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_EN_SHIFT)) & SNVS_HPCR_HPCALB_EN_MASK)
+#define SNVS_HPCR_HPCALB_VAL_MASK  (0x7C00U)
+#define SNVS_HPCR_HPCALB_VAL_SHIFT (10U)
+#define SNVS_HPCR_HPCALB_VAL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HPCALB_VAL_SHIFT)) & SNVS_HPCR_HPCALB_VAL_MASK)
+#define SNVS_HPCR_HP_TS_MASK       (0x10000U)
+#define SNVS_HPCR_HP_TS_SHIFT      (16U)
+#define SNVS_HPCR_HP_TS(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_HP_TS_SHIFT)) & SNVS_HPCR_HP_TS_MASK)
+#define SNVS_HPCR_BTN_CONFIG_MASK  (0x7000000U)
+#define SNVS_HPCR_BTN_CONFIG_SHIFT (24U)
+#define SNVS_HPCR_BTN_CONFIG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_CONFIG_SHIFT)) & SNVS_HPCR_BTN_CONFIG_MASK)
+#define SNVS_HPCR_BTN_MASK_MASK  (0x8000000U)
+#define SNVS_HPCR_BTN_MASK_SHIFT (27U)
+#define SNVS_HPCR_BTN_MASK(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPCR_BTN_MASK_SHIFT)) & SNVS_HPCR_BTN_MASK_MASK)
 /*! @} */
 
 /*! @name HPSICR - SNVS_HP Security Interrupt Control Register */
 /*! @{ */
-#define SNVS_HPSICR_SV0_EN_MASK                  (0x1U)
-#define SNVS_HPSICR_SV0_EN_SHIFT                 (0U)
-#define SNVS_HPSICR_SV0_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV0_EN_SHIFT)) & SNVS_HPSICR_SV0_EN_MASK)
-#define SNVS_HPSICR_SV1_EN_MASK                  (0x2U)
-#define SNVS_HPSICR_SV1_EN_SHIFT                 (1U)
-#define SNVS_HPSICR_SV1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV1_EN_SHIFT)) & SNVS_HPSICR_SV1_EN_MASK)
-#define SNVS_HPSICR_SV2_EN_MASK                  (0x4U)
-#define SNVS_HPSICR_SV2_EN_SHIFT                 (2U)
-#define SNVS_HPSICR_SV2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV2_EN_SHIFT)) & SNVS_HPSICR_SV2_EN_MASK)
-#define SNVS_HPSICR_SV3_EN_MASK                  (0x8U)
-#define SNVS_HPSICR_SV3_EN_SHIFT                 (3U)
-#define SNVS_HPSICR_SV3_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV3_EN_SHIFT)) & SNVS_HPSICR_SV3_EN_MASK)
-#define SNVS_HPSICR_SV4_EN_MASK                  (0x10U)
-#define SNVS_HPSICR_SV4_EN_SHIFT                 (4U)
-#define SNVS_HPSICR_SV4_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV4_EN_SHIFT)) & SNVS_HPSICR_SV4_EN_MASK)
-#define SNVS_HPSICR_SV5_EN_MASK                  (0x20U)
-#define SNVS_HPSICR_SV5_EN_SHIFT                 (5U)
-#define SNVS_HPSICR_SV5_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV5_EN_SHIFT)) & SNVS_HPSICR_SV5_EN_MASK)
-#define SNVS_HPSICR_LPSVI_EN_MASK                (0x80000000U)
-#define SNVS_HPSICR_LPSVI_EN_SHIFT               (31U)
-#define SNVS_HPSICR_LPSVI_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_LPSVI_EN_SHIFT)) & SNVS_HPSICR_LPSVI_EN_MASK)
+#define SNVS_HPSICR_SV0_EN_MASK    (0x1U)
+#define SNVS_HPSICR_SV0_EN_SHIFT   (0U)
+#define SNVS_HPSICR_SV0_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV0_EN_SHIFT)) & SNVS_HPSICR_SV0_EN_MASK)
+#define SNVS_HPSICR_SV1_EN_MASK    (0x2U)
+#define SNVS_HPSICR_SV1_EN_SHIFT   (1U)
+#define SNVS_HPSICR_SV1_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV1_EN_SHIFT)) & SNVS_HPSICR_SV1_EN_MASK)
+#define SNVS_HPSICR_SV2_EN_MASK    (0x4U)
+#define SNVS_HPSICR_SV2_EN_SHIFT   (2U)
+#define SNVS_HPSICR_SV2_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV2_EN_SHIFT)) & SNVS_HPSICR_SV2_EN_MASK)
+#define SNVS_HPSICR_SV3_EN_MASK    (0x8U)
+#define SNVS_HPSICR_SV3_EN_SHIFT   (3U)
+#define SNVS_HPSICR_SV3_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV3_EN_SHIFT)) & SNVS_HPSICR_SV3_EN_MASK)
+#define SNVS_HPSICR_SV4_EN_MASK    (0x10U)
+#define SNVS_HPSICR_SV4_EN_SHIFT   (4U)
+#define SNVS_HPSICR_SV4_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV4_EN_SHIFT)) & SNVS_HPSICR_SV4_EN_MASK)
+#define SNVS_HPSICR_SV5_EN_MASK    (0x20U)
+#define SNVS_HPSICR_SV5_EN_SHIFT   (5U)
+#define SNVS_HPSICR_SV5_EN(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_SV5_EN_SHIFT)) & SNVS_HPSICR_SV5_EN_MASK)
+#define SNVS_HPSICR_LPSVI_EN_MASK  (0x80000000U)
+#define SNVS_HPSICR_LPSVI_EN_SHIFT (31U)
+#define SNVS_HPSICR_LPSVI_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSICR_LPSVI_EN_SHIFT)) & SNVS_HPSICR_LPSVI_EN_MASK)
 /*! @} */
 
 /*! @name HPSVCR - SNVS_HP Security Violation Control Register */
 /*! @{ */
-#define SNVS_HPSVCR_SV0_CFG_MASK                 (0x1U)
-#define SNVS_HPSVCR_SV0_CFG_SHIFT                (0U)
-#define SNVS_HPSVCR_SV0_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV0_CFG_SHIFT)) & SNVS_HPSVCR_SV0_CFG_MASK)
-#define SNVS_HPSVCR_SV1_CFG_MASK                 (0x2U)
-#define SNVS_HPSVCR_SV1_CFG_SHIFT                (1U)
-#define SNVS_HPSVCR_SV1_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV1_CFG_SHIFT)) & SNVS_HPSVCR_SV1_CFG_MASK)
-#define SNVS_HPSVCR_SV2_CFG_MASK                 (0x4U)
-#define SNVS_HPSVCR_SV2_CFG_SHIFT                (2U)
-#define SNVS_HPSVCR_SV2_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV2_CFG_SHIFT)) & SNVS_HPSVCR_SV2_CFG_MASK)
-#define SNVS_HPSVCR_SV3_CFG_MASK                 (0x8U)
-#define SNVS_HPSVCR_SV3_CFG_SHIFT                (3U)
-#define SNVS_HPSVCR_SV3_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV3_CFG_SHIFT)) & SNVS_HPSVCR_SV3_CFG_MASK)
-#define SNVS_HPSVCR_SV4_CFG_MASK                 (0x10U)
-#define SNVS_HPSVCR_SV4_CFG_SHIFT                (4U)
-#define SNVS_HPSVCR_SV4_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV4_CFG_SHIFT)) & SNVS_HPSVCR_SV4_CFG_MASK)
-#define SNVS_HPSVCR_SV5_CFG_MASK                 (0x60U)
-#define SNVS_HPSVCR_SV5_CFG_SHIFT                (5U)
-#define SNVS_HPSVCR_SV5_CFG(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV5_CFG_SHIFT)) & SNVS_HPSVCR_SV5_CFG_MASK)
-#define SNVS_HPSVCR_LPSV_CFG_MASK                (0xC0000000U)
-#define SNVS_HPSVCR_LPSV_CFG_SHIFT               (30U)
-#define SNVS_HPSVCR_LPSV_CFG(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_LPSV_CFG_SHIFT)) & SNVS_HPSVCR_LPSV_CFG_MASK)
+#define SNVS_HPSVCR_SV0_CFG_MASK   (0x1U)
+#define SNVS_HPSVCR_SV0_CFG_SHIFT  (0U)
+#define SNVS_HPSVCR_SV0_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV0_CFG_SHIFT)) & SNVS_HPSVCR_SV0_CFG_MASK)
+#define SNVS_HPSVCR_SV1_CFG_MASK   (0x2U)
+#define SNVS_HPSVCR_SV1_CFG_SHIFT  (1U)
+#define SNVS_HPSVCR_SV1_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV1_CFG_SHIFT)) & SNVS_HPSVCR_SV1_CFG_MASK)
+#define SNVS_HPSVCR_SV2_CFG_MASK   (0x4U)
+#define SNVS_HPSVCR_SV2_CFG_SHIFT  (2U)
+#define SNVS_HPSVCR_SV2_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV2_CFG_SHIFT)) & SNVS_HPSVCR_SV2_CFG_MASK)
+#define SNVS_HPSVCR_SV3_CFG_MASK   (0x8U)
+#define SNVS_HPSVCR_SV3_CFG_SHIFT  (3U)
+#define SNVS_HPSVCR_SV3_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV3_CFG_SHIFT)) & SNVS_HPSVCR_SV3_CFG_MASK)
+#define SNVS_HPSVCR_SV4_CFG_MASK   (0x10U)
+#define SNVS_HPSVCR_SV4_CFG_SHIFT  (4U)
+#define SNVS_HPSVCR_SV4_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV4_CFG_SHIFT)) & SNVS_HPSVCR_SV4_CFG_MASK)
+#define SNVS_HPSVCR_SV5_CFG_MASK   (0x60U)
+#define SNVS_HPSVCR_SV5_CFG_SHIFT  (5U)
+#define SNVS_HPSVCR_SV5_CFG(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_SV5_CFG_SHIFT)) & SNVS_HPSVCR_SV5_CFG_MASK)
+#define SNVS_HPSVCR_LPSV_CFG_MASK  (0xC0000000U)
+#define SNVS_HPSVCR_LPSV_CFG_SHIFT (30U)
+#define SNVS_HPSVCR_LPSV_CFG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVCR_LPSV_CFG_SHIFT)) & SNVS_HPSVCR_LPSV_CFG_MASK)
 /*! @} */
 
 /*! @name HPSR - SNVS_HP Status Register */
 /*! @{ */
-#define SNVS_HPSR_HPTA_MASK                      (0x1U)
-#define SNVS_HPSR_HPTA_SHIFT                     (0U)
-#define SNVS_HPSR_HPTA(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
-#define SNVS_HPSR_PI_MASK                        (0x2U)
-#define SNVS_HPSR_PI_SHIFT                       (1U)
-#define SNVS_HPSR_PI(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
-#define SNVS_HPSR_LPDIS_MASK                     (0x10U)
-#define SNVS_HPSR_LPDIS_SHIFT                    (4U)
-#define SNVS_HPSR_LPDIS(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_LPDIS_SHIFT)) & SNVS_HPSR_LPDIS_MASK)
-#define SNVS_HPSR_BTN_MASK                       (0x40U)
-#define SNVS_HPSR_BTN_SHIFT                      (6U)
-#define SNVS_HPSR_BTN(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BTN_SHIFT)) & SNVS_HPSR_BTN_MASK)
-#define SNVS_HPSR_BI_MASK                        (0x80U)
-#define SNVS_HPSR_BI_SHIFT                       (7U)
-#define SNVS_HPSR_BI(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BI_SHIFT)) & SNVS_HPSR_BI_MASK)
-#define SNVS_HPSR_SSM_STATE_MASK                 (0xF00U)
-#define SNVS_HPSR_SSM_STATE_SHIFT                (8U)
-#define SNVS_HPSR_SSM_STATE(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SSM_STATE_SHIFT)) & SNVS_HPSR_SSM_STATE_MASK)
-#define SNVS_HPSR_SECURITY_CONFIG_MASK           (0xF000U)
-#define SNVS_HPSR_SECURITY_CONFIG_SHIFT          (12U)
-#define SNVS_HPSR_SECURITY_CONFIG(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SECURITY_CONFIG_SHIFT)) & SNVS_HPSR_SECURITY_CONFIG_MASK)
-#define SNVS_HPSR_OTPMK_SYNDROME_MASK            (0x1FF0000U)
-#define SNVS_HPSR_OTPMK_SYNDROME_SHIFT           (16U)
-#define SNVS_HPSR_OTPMK_SYNDROME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_SYNDROME_SHIFT)) & SNVS_HPSR_OTPMK_SYNDROME_MASK)
-#define SNVS_HPSR_OTPMK_ZERO_MASK                (0x8000000U)
-#define SNVS_HPSR_OTPMK_ZERO_SHIFT               (27U)
-#define SNVS_HPSR_OTPMK_ZERO(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_ZERO_SHIFT)) & SNVS_HPSR_OTPMK_ZERO_MASK)
-#define SNVS_HPSR_ZMK_ZERO_MASK                  (0x80000000U)
-#define SNVS_HPSR_ZMK_ZERO_SHIFT                 (31U)
-#define SNVS_HPSR_ZMK_ZERO(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_ZMK_ZERO_SHIFT)) & SNVS_HPSR_ZMK_ZERO_MASK)
+#define SNVS_HPSR_HPTA_MASK             (0x1U)
+#define SNVS_HPSR_HPTA_SHIFT            (0U)
+#define SNVS_HPSR_HPTA(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
+#define SNVS_HPSR_PI_MASK               (0x2U)
+#define SNVS_HPSR_PI_SHIFT              (1U)
+#define SNVS_HPSR_PI(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
+#define SNVS_HPSR_LPDIS_MASK            (0x10U)
+#define SNVS_HPSR_LPDIS_SHIFT           (4U)
+#define SNVS_HPSR_LPDIS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_LPDIS_SHIFT)) & SNVS_HPSR_LPDIS_MASK)
+#define SNVS_HPSR_BTN_MASK              (0x40U)
+#define SNVS_HPSR_BTN_SHIFT             (6U)
+#define SNVS_HPSR_BTN(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BTN_SHIFT)) & SNVS_HPSR_BTN_MASK)
+#define SNVS_HPSR_BI_MASK               (0x80U)
+#define SNVS_HPSR_BI_SHIFT              (7U)
+#define SNVS_HPSR_BI(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_BI_SHIFT)) & SNVS_HPSR_BI_MASK)
+#define SNVS_HPSR_SSM_STATE_MASK        (0xF00U)
+#define SNVS_HPSR_SSM_STATE_SHIFT       (8U)
+#define SNVS_HPSR_SSM_STATE(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SSM_STATE_SHIFT)) & SNVS_HPSR_SSM_STATE_MASK)
+#define SNVS_HPSR_SECURITY_CONFIG_MASK  (0xF000U)
+#define SNVS_HPSR_SECURITY_CONFIG_SHIFT (12U)
+#define SNVS_HPSR_SECURITY_CONFIG(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_SECURITY_CONFIG_SHIFT)) & SNVS_HPSR_SECURITY_CONFIG_MASK)
+#define SNVS_HPSR_OTPMK_SYNDROME_MASK  (0x1FF0000U)
+#define SNVS_HPSR_OTPMK_SYNDROME_SHIFT (16U)
+#define SNVS_HPSR_OTPMK_SYNDROME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_SYNDROME_SHIFT)) & SNVS_HPSR_OTPMK_SYNDROME_MASK)
+#define SNVS_HPSR_OTPMK_ZERO_MASK  (0x8000000U)
+#define SNVS_HPSR_OTPMK_ZERO_SHIFT (27U)
+#define SNVS_HPSR_OTPMK_ZERO(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_OTPMK_ZERO_SHIFT)) & SNVS_HPSR_OTPMK_ZERO_MASK)
+#define SNVS_HPSR_ZMK_ZERO_MASK  (0x80000000U)
+#define SNVS_HPSR_ZMK_ZERO_SHIFT (31U)
+#define SNVS_HPSR_ZMK_ZERO(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_ZMK_ZERO_SHIFT)) & SNVS_HPSR_ZMK_ZERO_MASK)
 /*! @} */
 
 /*! @name HPSVSR - SNVS_HP Security Violation Status Register */
 /*! @{ */
-#define SNVS_HPSVSR_SV0_MASK                     (0x1U)
-#define SNVS_HPSVSR_SV0_SHIFT                    (0U)
-#define SNVS_HPSVSR_SV0(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
-#define SNVS_HPSVSR_SV1_MASK                     (0x2U)
-#define SNVS_HPSVSR_SV1_SHIFT                    (1U)
-#define SNVS_HPSVSR_SV1(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV1_SHIFT)) & SNVS_HPSVSR_SV1_MASK)
-#define SNVS_HPSVSR_SV2_MASK                     (0x4U)
-#define SNVS_HPSVSR_SV2_SHIFT                    (2U)
-#define SNVS_HPSVSR_SV2(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
-#define SNVS_HPSVSR_SV3_MASK                     (0x8U)
-#define SNVS_HPSVSR_SV3_SHIFT                    (3U)
-#define SNVS_HPSVSR_SV3(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV3_SHIFT)) & SNVS_HPSVSR_SV3_MASK)
-#define SNVS_HPSVSR_SV4_MASK                     (0x10U)
-#define SNVS_HPSVSR_SV4_SHIFT                    (4U)
-#define SNVS_HPSVSR_SV4(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV4_SHIFT)) & SNVS_HPSVSR_SV4_MASK)
-#define SNVS_HPSVSR_SV5_MASK                     (0x20U)
-#define SNVS_HPSVSR_SV5_SHIFT                    (5U)
-#define SNVS_HPSVSR_SV5(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV5_SHIFT)) & SNVS_HPSVSR_SV5_MASK)
-#define SNVS_HPSVSR_SW_SV_MASK                   (0x2000U)
-#define SNVS_HPSVSR_SW_SV_SHIFT                  (13U)
-#define SNVS_HPSVSR_SW_SV(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_SV_SHIFT)) & SNVS_HPSVSR_SW_SV_MASK)
-#define SNVS_HPSVSR_SW_FSV_MASK                  (0x4000U)
-#define SNVS_HPSVSR_SW_FSV_SHIFT                 (14U)
-#define SNVS_HPSVSR_SW_FSV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_FSV_SHIFT)) & SNVS_HPSVSR_SW_FSV_MASK)
-#define SNVS_HPSVSR_SW_LPSV_MASK                 (0x8000U)
-#define SNVS_HPSVSR_SW_LPSV_SHIFT                (15U)
-#define SNVS_HPSVSR_SW_LPSV(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_LPSV_SHIFT)) & SNVS_HPSVSR_SW_LPSV_MASK)
-#define SNVS_HPSVSR_ZMK_SYNDROME_MASK            (0x1FF0000U)
-#define SNVS_HPSVSR_ZMK_SYNDROME_SHIFT           (16U)
-#define SNVS_HPSVSR_ZMK_SYNDROME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_SYNDROME_SHIFT)) & SNVS_HPSVSR_ZMK_SYNDROME_MASK)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL_MASK            (0x8000000U)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT           (27U)
-#define SNVS_HPSVSR_ZMK_ECC_FAIL(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT)) & SNVS_HPSVSR_ZMK_ECC_FAIL_MASK)
-#define SNVS_HPSVSR_LP_SEC_VIO_MASK              (0x80000000U)
-#define SNVS_HPSVSR_LP_SEC_VIO_SHIFT             (31U)
-#define SNVS_HPSVSR_LP_SEC_VIO(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_LP_SEC_VIO_SHIFT)) & SNVS_HPSVSR_LP_SEC_VIO_MASK)
+#define SNVS_HPSVSR_SV0_MASK           (0x1U)
+#define SNVS_HPSVSR_SV0_SHIFT          (0U)
+#define SNVS_HPSVSR_SV0(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
+#define SNVS_HPSVSR_SV1_MASK           (0x2U)
+#define SNVS_HPSVSR_SV1_SHIFT          (1U)
+#define SNVS_HPSVSR_SV1(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV1_SHIFT)) & SNVS_HPSVSR_SV1_MASK)
+#define SNVS_HPSVSR_SV2_MASK           (0x4U)
+#define SNVS_HPSVSR_SV2_SHIFT          (2U)
+#define SNVS_HPSVSR_SV2(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
+#define SNVS_HPSVSR_SV3_MASK           (0x8U)
+#define SNVS_HPSVSR_SV3_SHIFT          (3U)
+#define SNVS_HPSVSR_SV3(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV3_SHIFT)) & SNVS_HPSVSR_SV3_MASK)
+#define SNVS_HPSVSR_SV4_MASK           (0x10U)
+#define SNVS_HPSVSR_SV4_SHIFT          (4U)
+#define SNVS_HPSVSR_SV4(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV4_SHIFT)) & SNVS_HPSVSR_SV4_MASK)
+#define SNVS_HPSVSR_SV5_MASK           (0x20U)
+#define SNVS_HPSVSR_SV5_SHIFT          (5U)
+#define SNVS_HPSVSR_SV5(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV5_SHIFT)) & SNVS_HPSVSR_SV5_MASK)
+#define SNVS_HPSVSR_SW_SV_MASK         (0x2000U)
+#define SNVS_HPSVSR_SW_SV_SHIFT        (13U)
+#define SNVS_HPSVSR_SW_SV(x)           (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_SV_SHIFT)) & SNVS_HPSVSR_SW_SV_MASK)
+#define SNVS_HPSVSR_SW_FSV_MASK        (0x4000U)
+#define SNVS_HPSVSR_SW_FSV_SHIFT       (14U)
+#define SNVS_HPSVSR_SW_FSV(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_FSV_SHIFT)) & SNVS_HPSVSR_SW_FSV_MASK)
+#define SNVS_HPSVSR_SW_LPSV_MASK       (0x8000U)
+#define SNVS_HPSVSR_SW_LPSV_SHIFT      (15U)
+#define SNVS_HPSVSR_SW_LPSV(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SW_LPSV_SHIFT)) & SNVS_HPSVSR_SW_LPSV_MASK)
+#define SNVS_HPSVSR_ZMK_SYNDROME_MASK  (0x1FF0000U)
+#define SNVS_HPSVSR_ZMK_SYNDROME_SHIFT (16U)
+#define SNVS_HPSVSR_ZMK_SYNDROME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_SYNDROME_SHIFT)) & SNVS_HPSVSR_ZMK_SYNDROME_MASK)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL_MASK  (0x8000000U)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT (27U)
+#define SNVS_HPSVSR_ZMK_ECC_FAIL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_ZMK_ECC_FAIL_SHIFT)) & SNVS_HPSVSR_ZMK_ECC_FAIL_MASK)
+#define SNVS_HPSVSR_LP_SEC_VIO_MASK  (0x80000000U)
+#define SNVS_HPSVSR_LP_SEC_VIO_SHIFT (31U)
+#define SNVS_HPSVSR_LP_SEC_VIO(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_LP_SEC_VIO_SHIFT)) & SNVS_HPSVSR_LP_SEC_VIO_MASK)
 /*! @} */
 
 /*! @name HPHACIVR - SNVS_HP High Assurance Counter IV Register */
 /*! @{ */
-#define SNVS_HPHACIVR_HAC_COUNTER_IV_MASK        (0xFFFFFFFFU)
-#define SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT       (0U)
-#define SNVS_HPHACIVR_HAC_COUNTER_IV(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT)) & SNVS_HPHACIVR_HAC_COUNTER_IV_MASK)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV_MASK  (0xFFFFFFFFU)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT (0U)
+#define SNVS_HPHACIVR_HAC_COUNTER_IV(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACIVR_HAC_COUNTER_IV_SHIFT)) & SNVS_HPHACIVR_HAC_COUNTER_IV_MASK)
 /*! @} */
 
 /*! @name HPHACR - SNVS_HP High Assurance Counter Register */
 /*! @{ */
-#define SNVS_HPHACR_HAC_COUNTER_MASK             (0xFFFFFFFFU)
-#define SNVS_HPHACR_HAC_COUNTER_SHIFT            (0U)
-#define SNVS_HPHACR_HAC_COUNTER(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACR_HAC_COUNTER_SHIFT)) & SNVS_HPHACR_HAC_COUNTER_MASK)
+#define SNVS_HPHACR_HAC_COUNTER_MASK  (0xFFFFFFFFU)
+#define SNVS_HPHACR_HAC_COUNTER_SHIFT (0U)
+#define SNVS_HPHACR_HAC_COUNTER(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPHACR_HAC_COUNTER_SHIFT)) & SNVS_HPHACR_HAC_COUNTER_MASK)
 /*! @} */
 
 /*! @name HPRTCMR - SNVS_HP Real Time Counter MSB Register */
 /*! @{ */
-#define SNVS_HPRTCMR_RTC_MASK                    (0x7FFFU)
-#define SNVS_HPRTCMR_RTC_SHIFT                   (0U)
-#define SNVS_HPRTCMR_RTC(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCMR_RTC_SHIFT)) & SNVS_HPRTCMR_RTC_MASK)
+#define SNVS_HPRTCMR_RTC_MASK  (0x7FFFU)
+#define SNVS_HPRTCMR_RTC_SHIFT (0U)
+#define SNVS_HPRTCMR_RTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCMR_RTC_SHIFT)) & SNVS_HPRTCMR_RTC_MASK)
 /*! @} */
 
 /*! @name HPRTCLR - SNVS_HP Real Time Counter LSB Register */
 /*! @{ */
-#define SNVS_HPRTCLR_RTC_MASK                    (0xFFFFFFFFU)
-#define SNVS_HPRTCLR_RTC_SHIFT                   (0U)
-#define SNVS_HPRTCLR_RTC(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCLR_RTC_SHIFT)) & SNVS_HPRTCLR_RTC_MASK)
+#define SNVS_HPRTCLR_RTC_MASK  (0xFFFFFFFFU)
+#define SNVS_HPRTCLR_RTC_SHIFT (0U)
+#define SNVS_HPRTCLR_RTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPRTCLR_RTC_SHIFT)) & SNVS_HPRTCLR_RTC_MASK)
 /*! @} */
 
 /*! @name HPTAMR - SNVS_HP Time Alarm MSB Register */
 /*! @{ */
-#define SNVS_HPTAMR_HPTA_MS_MASK                 (0x7FFFU)
-#define SNVS_HPTAMR_HPTA_MS_SHIFT                (0U)
-#define SNVS_HPTAMR_HPTA_MS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPTAMR_HPTA_MS_SHIFT)) & SNVS_HPTAMR_HPTA_MS_MASK)
+#define SNVS_HPTAMR_HPTA_MS_MASK  (0x7FFFU)
+#define SNVS_HPTAMR_HPTA_MS_SHIFT (0U)
+#define SNVS_HPTAMR_HPTA_MS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPTAMR_HPTA_MS_SHIFT)) & SNVS_HPTAMR_HPTA_MS_MASK)
 /*! @} */
 
 /*! @name HPTALR - SNVS_HP Time Alarm LSB Register */
 /*! @{ */
-#define SNVS_HPTALR_HPTA_LS_MASK                 (0xFFFFFFFFU)
-#define SNVS_HPTALR_HPTA_LS_SHIFT                (0U)
-#define SNVS_HPTALR_HPTA_LS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPTALR_HPTA_LS_SHIFT)) & SNVS_HPTALR_HPTA_LS_MASK)
+#define SNVS_HPTALR_HPTA_LS_MASK  (0xFFFFFFFFU)
+#define SNVS_HPTALR_HPTA_LS_SHIFT (0U)
+#define SNVS_HPTALR_HPTA_LS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPTALR_HPTA_LS_SHIFT)) & SNVS_HPTALR_HPTA_LS_MASK)
 /*! @} */
 
 /*! @name LPLR - SNVS_LP Lock Register */
 /*! @{ */
-#define SNVS_LPLR_ZMK_WHL_MASK                   (0x1U)
-#define SNVS_LPLR_ZMK_WHL_SHIFT                  (0U)
-#define SNVS_LPLR_ZMK_WHL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_WHL_SHIFT)) & SNVS_LPLR_ZMK_WHL_MASK)
-#define SNVS_LPLR_ZMK_RHL_MASK                   (0x2U)
-#define SNVS_LPLR_ZMK_RHL_SHIFT                  (1U)
-#define SNVS_LPLR_ZMK_RHL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_RHL_SHIFT)) & SNVS_LPLR_ZMK_RHL_MASK)
-#define SNVS_LPLR_SRTC_HL_MASK                   (0x4U)
-#define SNVS_LPLR_SRTC_HL_SHIFT                  (2U)
-#define SNVS_LPLR_SRTC_HL(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_SRTC_HL_SHIFT)) & SNVS_LPLR_SRTC_HL_MASK)
-#define SNVS_LPLR_LPCALB_HL_MASK                 (0x8U)
-#define SNVS_LPLR_LPCALB_HL_SHIFT                (3U)
-#define SNVS_LPLR_LPCALB_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPCALB_HL_SHIFT)) & SNVS_LPLR_LPCALB_HL_MASK)
-#define SNVS_LPLR_MC_HL_MASK                     (0x10U)
-#define SNVS_LPLR_MC_HL_SHIFT                    (4U)
-#define SNVS_LPLR_MC_HL(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MC_HL_SHIFT)) & SNVS_LPLR_MC_HL_MASK)
-#define SNVS_LPLR_GPR_HL_MASK                    (0x20U)
-#define SNVS_LPLR_GPR_HL_SHIFT                   (5U)
-#define SNVS_LPLR_GPR_HL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_GPR_HL_SHIFT)) & SNVS_LPLR_GPR_HL_MASK)
-#define SNVS_LPLR_LPSVCR_HL_MASK                 (0x40U)
-#define SNVS_LPLR_LPSVCR_HL_SHIFT                (6U)
-#define SNVS_LPLR_LPSVCR_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPSVCR_HL_SHIFT)) & SNVS_LPLR_LPSVCR_HL_MASK)
-#define SNVS_LPLR_LPTDCR_HL_MASK                 (0x100U)
-#define SNVS_LPLR_LPTDCR_HL_SHIFT                (8U)
-#define SNVS_LPLR_LPTDCR_HL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPTDCR_HL_SHIFT)) & SNVS_LPLR_LPTDCR_HL_MASK)
-#define SNVS_LPLR_MKS_HL_MASK                    (0x200U)
-#define SNVS_LPLR_MKS_HL_SHIFT                   (9U)
-#define SNVS_LPLR_MKS_HL(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MKS_HL_SHIFT)) & SNVS_LPLR_MKS_HL_MASK)
+#define SNVS_LPLR_ZMK_WHL_MASK    (0x1U)
+#define SNVS_LPLR_ZMK_WHL_SHIFT   (0U)
+#define SNVS_LPLR_ZMK_WHL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_WHL_SHIFT)) & SNVS_LPLR_ZMK_WHL_MASK)
+#define SNVS_LPLR_ZMK_RHL_MASK    (0x2U)
+#define SNVS_LPLR_ZMK_RHL_SHIFT   (1U)
+#define SNVS_LPLR_ZMK_RHL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_ZMK_RHL_SHIFT)) & SNVS_LPLR_ZMK_RHL_MASK)
+#define SNVS_LPLR_SRTC_HL_MASK    (0x4U)
+#define SNVS_LPLR_SRTC_HL_SHIFT   (2U)
+#define SNVS_LPLR_SRTC_HL(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_SRTC_HL_SHIFT)) & SNVS_LPLR_SRTC_HL_MASK)
+#define SNVS_LPLR_LPCALB_HL_MASK  (0x8U)
+#define SNVS_LPLR_LPCALB_HL_SHIFT (3U)
+#define SNVS_LPLR_LPCALB_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPCALB_HL_SHIFT)) & SNVS_LPLR_LPCALB_HL_MASK)
+#define SNVS_LPLR_MC_HL_MASK      (0x10U)
+#define SNVS_LPLR_MC_HL_SHIFT     (4U)
+#define SNVS_LPLR_MC_HL(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MC_HL_SHIFT)) & SNVS_LPLR_MC_HL_MASK)
+#define SNVS_LPLR_GPR_HL_MASK     (0x20U)
+#define SNVS_LPLR_GPR_HL_SHIFT    (5U)
+#define SNVS_LPLR_GPR_HL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_GPR_HL_SHIFT)) & SNVS_LPLR_GPR_HL_MASK)
+#define SNVS_LPLR_LPSVCR_HL_MASK  (0x40U)
+#define SNVS_LPLR_LPSVCR_HL_SHIFT (6U)
+#define SNVS_LPLR_LPSVCR_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPSVCR_HL_SHIFT)) & SNVS_LPLR_LPSVCR_HL_MASK)
+#define SNVS_LPLR_LPTDCR_HL_MASK  (0x100U)
+#define SNVS_LPLR_LPTDCR_HL_SHIFT (8U)
+#define SNVS_LPLR_LPTDCR_HL(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_LPTDCR_HL_SHIFT)) & SNVS_LPLR_LPTDCR_HL_MASK)
+#define SNVS_LPLR_MKS_HL_MASK     (0x200U)
+#define SNVS_LPLR_MKS_HL_SHIFT    (9U)
+#define SNVS_LPLR_MKS_HL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPLR_MKS_HL_SHIFT)) & SNVS_LPLR_MKS_HL_MASK)
 /*! @} */
 
 /*! @name LPCR - SNVS_LP Control Register */
 /*! @{ */
-#define SNVS_LPCR_SRTC_ENV_MASK                  (0x1U)
-#define SNVS_LPCR_SRTC_ENV_SHIFT                 (0U)
-#define SNVS_LPCR_SRTC_ENV(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_ENV_SHIFT)) & SNVS_LPCR_SRTC_ENV_MASK)
-#define SNVS_LPCR_LPTA_EN_MASK                   (0x2U)
-#define SNVS_LPCR_LPTA_EN_SHIFT                  (1U)
-#define SNVS_LPCR_LPTA_EN(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPTA_EN_SHIFT)) & SNVS_LPCR_LPTA_EN_MASK)
-#define SNVS_LPCR_MC_ENV_MASK                    (0x4U)
-#define SNVS_LPCR_MC_ENV_SHIFT                   (2U)
-#define SNVS_LPCR_MC_ENV(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_MC_ENV_SHIFT)) & SNVS_LPCR_MC_ENV_MASK)
-#define SNVS_LPCR_LPWUI_EN_MASK                  (0x8U)
-#define SNVS_LPCR_LPWUI_EN_SHIFT                 (3U)
-#define SNVS_LPCR_LPWUI_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPWUI_EN_SHIFT)) & SNVS_LPCR_LPWUI_EN_MASK)
-#define SNVS_LPCR_SRTC_INV_EN_MASK               (0x10U)
-#define SNVS_LPCR_SRTC_INV_EN_SHIFT              (4U)
-#define SNVS_LPCR_SRTC_INV_EN(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_INV_EN_SHIFT)) & SNVS_LPCR_SRTC_INV_EN_MASK)
-#define SNVS_LPCR_DP_EN_MASK                     (0x20U)
-#define SNVS_LPCR_DP_EN_SHIFT                    (5U)
-#define SNVS_LPCR_DP_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DP_EN_SHIFT)) & SNVS_LPCR_DP_EN_MASK)
-#define SNVS_LPCR_TOP_MASK                       (0x40U)
-#define SNVS_LPCR_TOP_SHIFT                      (6U)
-#define SNVS_LPCR_TOP(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_TOP_SHIFT)) & SNVS_LPCR_TOP_MASK)
-#define SNVS_LPCR_PWR_GLITCH_EN_MASK             (0x80U)
-#define SNVS_LPCR_PWR_GLITCH_EN_SHIFT            (7U)
-#define SNVS_LPCR_PWR_GLITCH_EN(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PWR_GLITCH_EN_SHIFT)) & SNVS_LPCR_PWR_GLITCH_EN_MASK)
-#define SNVS_LPCR_LPCALB_EN_MASK                 (0x100U)
-#define SNVS_LPCR_LPCALB_EN_SHIFT                (8U)
-#define SNVS_LPCR_LPCALB_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_EN_SHIFT)) & SNVS_LPCR_LPCALB_EN_MASK)
-#define SNVS_LPCR_LPCALB_VAL_MASK                (0x7C00U)
-#define SNVS_LPCR_LPCALB_VAL_SHIFT               (10U)
-#define SNVS_LPCR_LPCALB_VAL(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_VAL_SHIFT)) & SNVS_LPCR_LPCALB_VAL_MASK)
-#define SNVS_LPCR_BTN_PRESS_TIME_MASK            (0x30000U)
-#define SNVS_LPCR_BTN_PRESS_TIME_SHIFT           (16U)
-#define SNVS_LPCR_BTN_PRESS_TIME(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_BTN_PRESS_TIME_SHIFT)) & SNVS_LPCR_BTN_PRESS_TIME_MASK)
-#define SNVS_LPCR_DEBOUNCE_MASK                  (0xC0000U)
-#define SNVS_LPCR_DEBOUNCE_SHIFT                 (18U)
-#define SNVS_LPCR_DEBOUNCE(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DEBOUNCE_SHIFT)) & SNVS_LPCR_DEBOUNCE_MASK)
-#define SNVS_LPCR_ON_TIME_MASK                   (0x300000U)
-#define SNVS_LPCR_ON_TIME_SHIFT                  (20U)
-#define SNVS_LPCR_ON_TIME(x)                     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_ON_TIME_SHIFT)) & SNVS_LPCR_ON_TIME_MASK)
-#define SNVS_LPCR_PK_EN_MASK                     (0x400000U)
-#define SNVS_LPCR_PK_EN_SHIFT                    (22U)
-#define SNVS_LPCR_PK_EN(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_EN_SHIFT)) & SNVS_LPCR_PK_EN_MASK)
-#define SNVS_LPCR_PK_OVERRIDE_MASK               (0x800000U)
-#define SNVS_LPCR_PK_OVERRIDE_SHIFT              (23U)
-#define SNVS_LPCR_PK_OVERRIDE(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_OVERRIDE_SHIFT)) & SNVS_LPCR_PK_OVERRIDE_MASK)
-#define SNVS_LPCR_GPR_Z_DIS_MASK                 (0x1000000U)
-#define SNVS_LPCR_GPR_Z_DIS_SHIFT                (24U)
-#define SNVS_LPCR_GPR_Z_DIS(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_GPR_Z_DIS_SHIFT)) & SNVS_LPCR_GPR_Z_DIS_MASK)
+#define SNVS_LPCR_SRTC_ENV_MASK     (0x1U)
+#define SNVS_LPCR_SRTC_ENV_SHIFT    (0U)
+#define SNVS_LPCR_SRTC_ENV(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_ENV_SHIFT)) & SNVS_LPCR_SRTC_ENV_MASK)
+#define SNVS_LPCR_LPTA_EN_MASK      (0x2U)
+#define SNVS_LPCR_LPTA_EN_SHIFT     (1U)
+#define SNVS_LPCR_LPTA_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPTA_EN_SHIFT)) & SNVS_LPCR_LPTA_EN_MASK)
+#define SNVS_LPCR_MC_ENV_MASK       (0x4U)
+#define SNVS_LPCR_MC_ENV_SHIFT      (2U)
+#define SNVS_LPCR_MC_ENV(x)         (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_MC_ENV_SHIFT)) & SNVS_LPCR_MC_ENV_MASK)
+#define SNVS_LPCR_LPWUI_EN_MASK     (0x8U)
+#define SNVS_LPCR_LPWUI_EN_SHIFT    (3U)
+#define SNVS_LPCR_LPWUI_EN(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPWUI_EN_SHIFT)) & SNVS_LPCR_LPWUI_EN_MASK)
+#define SNVS_LPCR_SRTC_INV_EN_MASK  (0x10U)
+#define SNVS_LPCR_SRTC_INV_EN_SHIFT (4U)
+#define SNVS_LPCR_SRTC_INV_EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_SRTC_INV_EN_SHIFT)) & SNVS_LPCR_SRTC_INV_EN_MASK)
+#define SNVS_LPCR_DP_EN_MASK          (0x20U)
+#define SNVS_LPCR_DP_EN_SHIFT         (5U)
+#define SNVS_LPCR_DP_EN(x)            (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DP_EN_SHIFT)) & SNVS_LPCR_DP_EN_MASK)
+#define SNVS_LPCR_TOP_MASK            (0x40U)
+#define SNVS_LPCR_TOP_SHIFT           (6U)
+#define SNVS_LPCR_TOP(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_TOP_SHIFT)) & SNVS_LPCR_TOP_MASK)
+#define SNVS_LPCR_PWR_GLITCH_EN_MASK  (0x80U)
+#define SNVS_LPCR_PWR_GLITCH_EN_SHIFT (7U)
+#define SNVS_LPCR_PWR_GLITCH_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PWR_GLITCH_EN_SHIFT)) & SNVS_LPCR_PWR_GLITCH_EN_MASK)
+#define SNVS_LPCR_LPCALB_EN_MASK   (0x100U)
+#define SNVS_LPCR_LPCALB_EN_SHIFT  (8U)
+#define SNVS_LPCR_LPCALB_EN(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_EN_SHIFT)) & SNVS_LPCR_LPCALB_EN_MASK)
+#define SNVS_LPCR_LPCALB_VAL_MASK  (0x7C00U)
+#define SNVS_LPCR_LPCALB_VAL_SHIFT (10U)
+#define SNVS_LPCR_LPCALB_VAL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_LPCALB_VAL_SHIFT)) & SNVS_LPCR_LPCALB_VAL_MASK)
+#define SNVS_LPCR_BTN_PRESS_TIME_MASK  (0x30000U)
+#define SNVS_LPCR_BTN_PRESS_TIME_SHIFT (16U)
+#define SNVS_LPCR_BTN_PRESS_TIME(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_BTN_PRESS_TIME_SHIFT)) & SNVS_LPCR_BTN_PRESS_TIME_MASK)
+#define SNVS_LPCR_DEBOUNCE_MASK     (0xC0000U)
+#define SNVS_LPCR_DEBOUNCE_SHIFT    (18U)
+#define SNVS_LPCR_DEBOUNCE(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_DEBOUNCE_SHIFT)) & SNVS_LPCR_DEBOUNCE_MASK)
+#define SNVS_LPCR_ON_TIME_MASK      (0x300000U)
+#define SNVS_LPCR_ON_TIME_SHIFT     (20U)
+#define SNVS_LPCR_ON_TIME(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_ON_TIME_SHIFT)) & SNVS_LPCR_ON_TIME_MASK)
+#define SNVS_LPCR_PK_EN_MASK        (0x400000U)
+#define SNVS_LPCR_PK_EN_SHIFT       (22U)
+#define SNVS_LPCR_PK_EN(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_EN_SHIFT)) & SNVS_LPCR_PK_EN_MASK)
+#define SNVS_LPCR_PK_OVERRIDE_MASK  (0x800000U)
+#define SNVS_LPCR_PK_OVERRIDE_SHIFT (23U)
+#define SNVS_LPCR_PK_OVERRIDE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_PK_OVERRIDE_SHIFT)) & SNVS_LPCR_PK_OVERRIDE_MASK)
+#define SNVS_LPCR_GPR_Z_DIS_MASK  (0x1000000U)
+#define SNVS_LPCR_GPR_Z_DIS_SHIFT (24U)
+#define SNVS_LPCR_GPR_Z_DIS(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPCR_GPR_Z_DIS_SHIFT)) & SNVS_LPCR_GPR_Z_DIS_MASK)
 /*! @} */
 
 /*! @name LPMKCR - SNVS_LP Master Key Control Register */
 /*! @{ */
-#define SNVS_LPMKCR_MASTER_KEY_SEL_MASK          (0x3U)
-#define SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT         (0U)
-#define SNVS_LPMKCR_MASTER_KEY_SEL(x)            (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT)) & SNVS_LPMKCR_MASTER_KEY_SEL_MASK)
-#define SNVS_LPMKCR_ZMK_HWP_MASK                 (0x4U)
-#define SNVS_LPMKCR_ZMK_HWP_SHIFT                (2U)
-#define SNVS_LPMKCR_ZMK_HWP(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_HWP_SHIFT)) & SNVS_LPMKCR_ZMK_HWP_MASK)
-#define SNVS_LPMKCR_ZMK_VAL_MASK                 (0x8U)
-#define SNVS_LPMKCR_ZMK_VAL_SHIFT                (3U)
-#define SNVS_LPMKCR_ZMK_VAL(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_VAL_SHIFT)) & SNVS_LPMKCR_ZMK_VAL_MASK)
-#define SNVS_LPMKCR_ZMK_ECC_EN_MASK              (0x10U)
-#define SNVS_LPMKCR_ZMK_ECC_EN_SHIFT             (4U)
-#define SNVS_LPMKCR_ZMK_ECC_EN(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_EN_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_EN_MASK)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE_MASK           (0xFF80U)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT          (7U)
-#define SNVS_LPMKCR_ZMK_ECC_VALUE(x)             (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_VALUE_MASK)
+#define SNVS_LPMKCR_MASTER_KEY_SEL_MASK  (0x3U)
+#define SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT (0U)
+#define SNVS_LPMKCR_MASTER_KEY_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_MASTER_KEY_SEL_SHIFT)) & SNVS_LPMKCR_MASTER_KEY_SEL_MASK)
+#define SNVS_LPMKCR_ZMK_HWP_MASK     (0x4U)
+#define SNVS_LPMKCR_ZMK_HWP_SHIFT    (2U)
+#define SNVS_LPMKCR_ZMK_HWP(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_HWP_SHIFT)) & SNVS_LPMKCR_ZMK_HWP_MASK)
+#define SNVS_LPMKCR_ZMK_VAL_MASK     (0x8U)
+#define SNVS_LPMKCR_ZMK_VAL_SHIFT    (3U)
+#define SNVS_LPMKCR_ZMK_VAL(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_VAL_SHIFT)) & SNVS_LPMKCR_ZMK_VAL_MASK)
+#define SNVS_LPMKCR_ZMK_ECC_EN_MASK  (0x10U)
+#define SNVS_LPMKCR_ZMK_ECC_EN_SHIFT (4U)
+#define SNVS_LPMKCR_ZMK_ECC_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_EN_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_EN_MASK)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE_MASK  (0xFF80U)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT (7U)
+#define SNVS_LPMKCR_ZMK_ECC_VALUE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPMKCR_ZMK_ECC_VALUE_SHIFT)) & SNVS_LPMKCR_ZMK_ECC_VALUE_MASK)
 /*! @} */
 
 /*! @name LPSVCR - SNVS_LP Security Violation Control Register */
 /*! @{ */
-#define SNVS_LPSVCR_SV0_EN_MASK                  (0x1U)
-#define SNVS_LPSVCR_SV0_EN_SHIFT                 (0U)
-#define SNVS_LPSVCR_SV0_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV0_EN_SHIFT)) & SNVS_LPSVCR_SV0_EN_MASK)
-#define SNVS_LPSVCR_SV1_EN_MASK                  (0x2U)
-#define SNVS_LPSVCR_SV1_EN_SHIFT                 (1U)
-#define SNVS_LPSVCR_SV1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV1_EN_SHIFT)) & SNVS_LPSVCR_SV1_EN_MASK)
-#define SNVS_LPSVCR_SV2_EN_MASK                  (0x4U)
-#define SNVS_LPSVCR_SV2_EN_SHIFT                 (2U)
-#define SNVS_LPSVCR_SV2_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV2_EN_SHIFT)) & SNVS_LPSVCR_SV2_EN_MASK)
-#define SNVS_LPSVCR_SV3_EN_MASK                  (0x8U)
-#define SNVS_LPSVCR_SV3_EN_SHIFT                 (3U)
-#define SNVS_LPSVCR_SV3_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV3_EN_SHIFT)) & SNVS_LPSVCR_SV3_EN_MASK)
-#define SNVS_LPSVCR_SV4_EN_MASK                  (0x10U)
-#define SNVS_LPSVCR_SV4_EN_SHIFT                 (4U)
-#define SNVS_LPSVCR_SV4_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV4_EN_SHIFT)) & SNVS_LPSVCR_SV4_EN_MASK)
-#define SNVS_LPSVCR_SV5_EN_MASK                  (0x20U)
-#define SNVS_LPSVCR_SV5_EN_SHIFT                 (5U)
-#define SNVS_LPSVCR_SV5_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV5_EN_SHIFT)) & SNVS_LPSVCR_SV5_EN_MASK)
+#define SNVS_LPSVCR_SV0_EN_MASK  (0x1U)
+#define SNVS_LPSVCR_SV0_EN_SHIFT (0U)
+#define SNVS_LPSVCR_SV0_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV0_EN_SHIFT)) & SNVS_LPSVCR_SV0_EN_MASK)
+#define SNVS_LPSVCR_SV1_EN_MASK  (0x2U)
+#define SNVS_LPSVCR_SV1_EN_SHIFT (1U)
+#define SNVS_LPSVCR_SV1_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV1_EN_SHIFT)) & SNVS_LPSVCR_SV1_EN_MASK)
+#define SNVS_LPSVCR_SV2_EN_MASK  (0x4U)
+#define SNVS_LPSVCR_SV2_EN_SHIFT (2U)
+#define SNVS_LPSVCR_SV2_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV2_EN_SHIFT)) & SNVS_LPSVCR_SV2_EN_MASK)
+#define SNVS_LPSVCR_SV3_EN_MASK  (0x8U)
+#define SNVS_LPSVCR_SV3_EN_SHIFT (3U)
+#define SNVS_LPSVCR_SV3_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV3_EN_SHIFT)) & SNVS_LPSVCR_SV3_EN_MASK)
+#define SNVS_LPSVCR_SV4_EN_MASK  (0x10U)
+#define SNVS_LPSVCR_SV4_EN_SHIFT (4U)
+#define SNVS_LPSVCR_SV4_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV4_EN_SHIFT)) & SNVS_LPSVCR_SV4_EN_MASK)
+#define SNVS_LPSVCR_SV5_EN_MASK  (0x20U)
+#define SNVS_LPSVCR_SV5_EN_SHIFT (5U)
+#define SNVS_LPSVCR_SV5_EN(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSVCR_SV5_EN_SHIFT)) & SNVS_LPSVCR_SV5_EN_MASK)
 /*! @} */
 
 /*! @name LPTDCR - SNVS_LP Tamper Detectors Configuration Register */
 /*! @{ */
-#define SNVS_LPTDCR_SRTCR_EN_MASK                (0x2U)
-#define SNVS_LPTDCR_SRTCR_EN_SHIFT               (1U)
-#define SNVS_LPTDCR_SRTCR_EN(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_SRTCR_EN_SHIFT)) & SNVS_LPTDCR_SRTCR_EN_MASK)
-#define SNVS_LPTDCR_MCR_EN_MASK                  (0x4U)
-#define SNVS_LPTDCR_MCR_EN_SHIFT                 (2U)
-#define SNVS_LPTDCR_MCR_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_MCR_EN_SHIFT)) & SNVS_LPTDCR_MCR_EN_MASK)
-#define SNVS_LPTDCR_ET1_EN_MASK                  (0x200U)
-#define SNVS_LPTDCR_ET1_EN_SHIFT                 (9U)
-#define SNVS_LPTDCR_ET1_EN(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1_EN_SHIFT)) & SNVS_LPTDCR_ET1_EN_MASK)
-#define SNVS_LPTDCR_ET1P_MASK                    (0x800U)
-#define SNVS_LPTDCR_ET1P_SHIFT                   (11U)
-#define SNVS_LPTDCR_ET1P(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1P_SHIFT)) & SNVS_LPTDCR_ET1P_MASK)
-#define SNVS_LPTDCR_PFD_OBSERV_MASK              (0x4000U)
-#define SNVS_LPTDCR_PFD_OBSERV_SHIFT             (14U)
-#define SNVS_LPTDCR_PFD_OBSERV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_PFD_OBSERV_SHIFT)) & SNVS_LPTDCR_PFD_OBSERV_MASK)
-#define SNVS_LPTDCR_POR_OBSERV_MASK              (0x8000U)
-#define SNVS_LPTDCR_POR_OBSERV_SHIFT             (15U)
-#define SNVS_LPTDCR_POR_OBSERV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_POR_OBSERV_SHIFT)) & SNVS_LPTDCR_POR_OBSERV_MASK)
-#define SNVS_LPTDCR_OSCB_MASK                    (0x10000000U)
-#define SNVS_LPTDCR_OSCB_SHIFT                   (28U)
-#define SNVS_LPTDCR_OSCB(x)                      (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_OSCB_SHIFT)) & SNVS_LPTDCR_OSCB_MASK)
+#define SNVS_LPTDCR_SRTCR_EN_MASK  (0x2U)
+#define SNVS_LPTDCR_SRTCR_EN_SHIFT (1U)
+#define SNVS_LPTDCR_SRTCR_EN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_SRTCR_EN_SHIFT)) & SNVS_LPTDCR_SRTCR_EN_MASK)
+#define SNVS_LPTDCR_MCR_EN_MASK      (0x4U)
+#define SNVS_LPTDCR_MCR_EN_SHIFT     (2U)
+#define SNVS_LPTDCR_MCR_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_MCR_EN_SHIFT)) & SNVS_LPTDCR_MCR_EN_MASK)
+#define SNVS_LPTDCR_ET1_EN_MASK      (0x200U)
+#define SNVS_LPTDCR_ET1_EN_SHIFT     (9U)
+#define SNVS_LPTDCR_ET1_EN(x)        (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1_EN_SHIFT)) & SNVS_LPTDCR_ET1_EN_MASK)
+#define SNVS_LPTDCR_ET1P_MASK        (0x800U)
+#define SNVS_LPTDCR_ET1P_SHIFT       (11U)
+#define SNVS_LPTDCR_ET1P(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_ET1P_SHIFT)) & SNVS_LPTDCR_ET1P_MASK)
+#define SNVS_LPTDCR_PFD_OBSERV_MASK  (0x4000U)
+#define SNVS_LPTDCR_PFD_OBSERV_SHIFT (14U)
+#define SNVS_LPTDCR_PFD_OBSERV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_PFD_OBSERV_SHIFT)) & SNVS_LPTDCR_PFD_OBSERV_MASK)
+#define SNVS_LPTDCR_POR_OBSERV_MASK  (0x8000U)
+#define SNVS_LPTDCR_POR_OBSERV_SHIFT (15U)
+#define SNVS_LPTDCR_POR_OBSERV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_POR_OBSERV_SHIFT)) & SNVS_LPTDCR_POR_OBSERV_MASK)
+#define SNVS_LPTDCR_OSCB_MASK  (0x10000000U)
+#define SNVS_LPTDCR_OSCB_SHIFT (28U)
+#define SNVS_LPTDCR_OSCB(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTDCR_OSCB_SHIFT)) & SNVS_LPTDCR_OSCB_MASK)
 /*! @} */
 
 /*! @name LPSR - SNVS_LP Status Register */
 /*! @{ */
-#define SNVS_LPSR_LPTA_MASK                      (0x1U)
-#define SNVS_LPSR_LPTA_SHIFT                     (0U)
-#define SNVS_LPSR_LPTA(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPTA_SHIFT)) & SNVS_LPSR_LPTA_MASK)
-#define SNVS_LPSR_SRTCR_MASK                     (0x2U)
-#define SNVS_LPSR_SRTCR_SHIFT                    (1U)
-#define SNVS_LPSR_SRTCR(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SRTCR_SHIFT)) & SNVS_LPSR_SRTCR_MASK)
-#define SNVS_LPSR_MCR_MASK                       (0x4U)
-#define SNVS_LPSR_MCR_SHIFT                      (2U)
-#define SNVS_LPSR_MCR(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_MCR_SHIFT)) & SNVS_LPSR_MCR_MASK)
-#define SNVS_LPSR_PGD_MASK                       (0x8U)
-#define SNVS_LPSR_PGD_SHIFT                      (3U)
-#define SNVS_LPSR_PGD(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_PGD_SHIFT)) & SNVS_LPSR_PGD_MASK)
-#define SNVS_LPSR_ET1D_MASK                      (0x200U)
-#define SNVS_LPSR_ET1D_SHIFT                     (9U)
-#define SNVS_LPSR_ET1D(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ET1D_SHIFT)) & SNVS_LPSR_ET1D_MASK)
-#define SNVS_LPSR_ESVD_MASK                      (0x10000U)
-#define SNVS_LPSR_ESVD_SHIFT                     (16U)
-#define SNVS_LPSR_ESVD(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ESVD_SHIFT)) & SNVS_LPSR_ESVD_MASK)
-#define SNVS_LPSR_EO_MASK                        (0x20000U)
-#define SNVS_LPSR_EO_SHIFT                       (17U)
-#define SNVS_LPSR_EO(x)                          (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_EO_SHIFT)) & SNVS_LPSR_EO_MASK)
-#define SNVS_LPSR_SPO_MASK                       (0x40000U)
-#define SNVS_LPSR_SPO_SHIFT                      (18U)
-#define SNVS_LPSR_SPO(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SPO_SHIFT)) & SNVS_LPSR_SPO_MASK)
-#define SNVS_LPSR_SED_MASK                       (0x100000U)
-#define SNVS_LPSR_SED_SHIFT                      (20U)
-#define SNVS_LPSR_SED(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SED_SHIFT)) & SNVS_LPSR_SED_MASK)
-#define SNVS_LPSR_LPNS_MASK                      (0x40000000U)
-#define SNVS_LPSR_LPNS_SHIFT                     (30U)
-#define SNVS_LPSR_LPNS(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPNS_SHIFT)) & SNVS_LPSR_LPNS_MASK)
-#define SNVS_LPSR_LPS_MASK                       (0x80000000U)
-#define SNVS_LPSR_LPS_SHIFT                      (31U)
-#define SNVS_LPSR_LPS(x)                         (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPS_SHIFT)) & SNVS_LPSR_LPS_MASK)
+#define SNVS_LPSR_LPTA_MASK   (0x1U)
+#define SNVS_LPSR_LPTA_SHIFT  (0U)
+#define SNVS_LPSR_LPTA(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPTA_SHIFT)) & SNVS_LPSR_LPTA_MASK)
+#define SNVS_LPSR_SRTCR_MASK  (0x2U)
+#define SNVS_LPSR_SRTCR_SHIFT (1U)
+#define SNVS_LPSR_SRTCR(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SRTCR_SHIFT)) & SNVS_LPSR_SRTCR_MASK)
+#define SNVS_LPSR_MCR_MASK    (0x4U)
+#define SNVS_LPSR_MCR_SHIFT   (2U)
+#define SNVS_LPSR_MCR(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_MCR_SHIFT)) & SNVS_LPSR_MCR_MASK)
+#define SNVS_LPSR_PGD_MASK    (0x8U)
+#define SNVS_LPSR_PGD_SHIFT   (3U)
+#define SNVS_LPSR_PGD(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_PGD_SHIFT)) & SNVS_LPSR_PGD_MASK)
+#define SNVS_LPSR_ET1D_MASK   (0x200U)
+#define SNVS_LPSR_ET1D_SHIFT  (9U)
+#define SNVS_LPSR_ET1D(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ET1D_SHIFT)) & SNVS_LPSR_ET1D_MASK)
+#define SNVS_LPSR_ESVD_MASK   (0x10000U)
+#define SNVS_LPSR_ESVD_SHIFT  (16U)
+#define SNVS_LPSR_ESVD(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_ESVD_SHIFT)) & SNVS_LPSR_ESVD_MASK)
+#define SNVS_LPSR_EO_MASK     (0x20000U)
+#define SNVS_LPSR_EO_SHIFT    (17U)
+#define SNVS_LPSR_EO(x)       (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_EO_SHIFT)) & SNVS_LPSR_EO_MASK)
+#define SNVS_LPSR_SPO_MASK    (0x40000U)
+#define SNVS_LPSR_SPO_SHIFT   (18U)
+#define SNVS_LPSR_SPO(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SPO_SHIFT)) & SNVS_LPSR_SPO_MASK)
+#define SNVS_LPSR_SED_MASK    (0x100000U)
+#define SNVS_LPSR_SED_SHIFT   (20U)
+#define SNVS_LPSR_SED(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_SED_SHIFT)) & SNVS_LPSR_SED_MASK)
+#define SNVS_LPSR_LPNS_MASK   (0x40000000U)
+#define SNVS_LPSR_LPNS_SHIFT  (30U)
+#define SNVS_LPSR_LPNS(x)     (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPNS_SHIFT)) & SNVS_LPSR_LPNS_MASK)
+#define SNVS_LPSR_LPS_MASK    (0x80000000U)
+#define SNVS_LPSR_LPS_SHIFT   (31U)
+#define SNVS_LPSR_LPS(x)      (((uint32_t)(((uint32_t)(x)) << SNVS_LPSR_LPS_SHIFT)) & SNVS_LPSR_LPS_MASK)
 /*! @} */
 
 /*! @name LPSRTCMR - SNVS_LP Secure Real Time Counter MSB Register */
 /*! @{ */
-#define SNVS_LPSRTCMR_SRTC_MASK                  (0x7FFFU)
-#define SNVS_LPSRTCMR_SRTC_SHIFT                 (0U)
-#define SNVS_LPSRTCMR_SRTC(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCMR_SRTC_SHIFT)) & SNVS_LPSRTCMR_SRTC_MASK)
+#define SNVS_LPSRTCMR_SRTC_MASK  (0x7FFFU)
+#define SNVS_LPSRTCMR_SRTC_SHIFT (0U)
+#define SNVS_LPSRTCMR_SRTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCMR_SRTC_SHIFT)) & SNVS_LPSRTCMR_SRTC_MASK)
 /*! @} */
 
 /*! @name LPSRTCLR - SNVS_LP Secure Real Time Counter LSB Register */
 /*! @{ */
-#define SNVS_LPSRTCLR_SRTC_MASK                  (0xFFFFFFFFU)
-#define SNVS_LPSRTCLR_SRTC_SHIFT                 (0U)
-#define SNVS_LPSRTCLR_SRTC(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCLR_SRTC_SHIFT)) & SNVS_LPSRTCLR_SRTC_MASK)
+#define SNVS_LPSRTCLR_SRTC_MASK  (0xFFFFFFFFU)
+#define SNVS_LPSRTCLR_SRTC_SHIFT (0U)
+#define SNVS_LPSRTCLR_SRTC(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSRTCLR_SRTC_SHIFT)) & SNVS_LPSRTCLR_SRTC_MASK)
 /*! @} */
 
 /*! @name LPTAR - SNVS_LP Time Alarm Register */
 /*! @{ */
-#define SNVS_LPTAR_LPTA_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPTAR_LPTA_SHIFT                    (0U)
-#define SNVS_LPTAR_LPTA(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPTAR_LPTA_SHIFT)) & SNVS_LPTAR_LPTA_MASK)
+#define SNVS_LPTAR_LPTA_MASK  (0xFFFFFFFFU)
+#define SNVS_LPTAR_LPTA_SHIFT (0U)
+#define SNVS_LPTAR_LPTA(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPTAR_LPTA_SHIFT)) & SNVS_LPTAR_LPTA_MASK)
 /*! @} */
 
 /*! @name LPSMCMR - SNVS_LP Secure Monotonic Counter MSB Register */
 /*! @{ */
-#define SNVS_LPSMCMR_MON_COUNTER_MASK            (0xFFFFU)
-#define SNVS_LPSMCMR_MON_COUNTER_SHIFT           (0U)
-#define SNVS_LPSMCMR_MON_COUNTER(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MON_COUNTER_SHIFT)) & SNVS_LPSMCMR_MON_COUNTER_MASK)
-#define SNVS_LPSMCMR_MC_ERA_BITS_MASK            (0xFFFF0000U)
-#define SNVS_LPSMCMR_MC_ERA_BITS_SHIFT           (16U)
-#define SNVS_LPSMCMR_MC_ERA_BITS(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MC_ERA_BITS_SHIFT)) & SNVS_LPSMCMR_MC_ERA_BITS_MASK)
+#define SNVS_LPSMCMR_MON_COUNTER_MASK  (0xFFFFU)
+#define SNVS_LPSMCMR_MON_COUNTER_SHIFT (0U)
+#define SNVS_LPSMCMR_MON_COUNTER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MON_COUNTER_SHIFT)) & SNVS_LPSMCMR_MON_COUNTER_MASK)
+#define SNVS_LPSMCMR_MC_ERA_BITS_MASK  (0xFFFF0000U)
+#define SNVS_LPSMCMR_MC_ERA_BITS_SHIFT (16U)
+#define SNVS_LPSMCMR_MC_ERA_BITS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCMR_MC_ERA_BITS_SHIFT)) & SNVS_LPSMCMR_MC_ERA_BITS_MASK)
 /*! @} */
 
 /*! @name LPSMCLR - SNVS_LP Secure Monotonic Counter LSB Register */
 /*! @{ */
-#define SNVS_LPSMCLR_MON_COUNTER_MASK            (0xFFFFFFFFU)
-#define SNVS_LPSMCLR_MON_COUNTER_SHIFT           (0U)
-#define SNVS_LPSMCLR_MON_COUNTER(x)              (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCLR_MON_COUNTER_SHIFT)) & SNVS_LPSMCLR_MON_COUNTER_MASK)
+#define SNVS_LPSMCLR_MON_COUNTER_MASK  (0xFFFFFFFFU)
+#define SNVS_LPSMCLR_MON_COUNTER_SHIFT (0U)
+#define SNVS_LPSMCLR_MON_COUNTER(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPSMCLR_MON_COUNTER_SHIFT)) & SNVS_LPSMCLR_MON_COUNTER_MASK)
 /*! @} */
 
 /*! @name LPPGDR - SNVS_LP Power Glitch Detector Register */
 /*! @{ */
-#define SNVS_LPPGDR_PGD_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPPGDR_PGD_SHIFT                    (0U)
-#define SNVS_LPPGDR_PGD(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPPGDR_PGD_SHIFT)) & SNVS_LPPGDR_PGD_MASK)
+#define SNVS_LPPGDR_PGD_MASK  (0xFFFFFFFFU)
+#define SNVS_LPPGDR_PGD_SHIFT (0U)
+#define SNVS_LPPGDR_PGD(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPPGDR_PGD_SHIFT)) & SNVS_LPPGDR_PGD_MASK)
 /*! @} */
 
 /*! @name LPGPR0_LEGACY_ALIAS - SNVS_LP General Purpose Register 0 (legacy alias) */
 /*! @{ */
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK        (0xFFFFFFFFU)
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT       (0U)
-#define SNVS_LPGPR0_LEGACY_ALIAS_GPR(x)          (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT)) & SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT (0U)
+#define SNVS_LPGPR0_LEGACY_ALIAS_GPR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR0_LEGACY_ALIAS_GPR_SHIFT)) & SNVS_LPGPR0_LEGACY_ALIAS_GPR_MASK)
 /*! @} */
 
 /*! @name LPZMKR - SNVS_LP Zeroizable Master Key Register */
 /*! @{ */
-#define SNVS_LPZMKR_ZMK_MASK                     (0xFFFFFFFFU)
-#define SNVS_LPZMKR_ZMK_SHIFT                    (0U)
-#define SNVS_LPZMKR_ZMK(x)                       (((uint32_t)(((uint32_t)(x)) << SNVS_LPZMKR_ZMK_SHIFT)) & SNVS_LPZMKR_ZMK_MASK)
+#define SNVS_LPZMKR_ZMK_MASK  (0xFFFFFFFFU)
+#define SNVS_LPZMKR_ZMK_SHIFT (0U)
+#define SNVS_LPZMKR_ZMK(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPZMKR_ZMK_SHIFT)) & SNVS_LPZMKR_ZMK_MASK)
 /*! @} */
 
 /* The count of SNVS_LPZMKR */
-#define SNVS_LPZMKR_COUNT                        (8U)
+#define SNVS_LPZMKR_COUNT (8U)
 
 /*! @name LPGPR_ALIAS - SNVS_LP General Purpose Registers 0 .. 3 */
 /*! @{ */
-#define SNVS_LPGPR_ALIAS_GPR_MASK                (0xFFFFFFFFU)
-#define SNVS_LPGPR_ALIAS_GPR_SHIFT               (0U)
-#define SNVS_LPGPR_ALIAS_GPR(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_ALIAS_GPR_SHIFT)) & SNVS_LPGPR_ALIAS_GPR_MASK)
+#define SNVS_LPGPR_ALIAS_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR_ALIAS_GPR_SHIFT (0U)
+#define SNVS_LPGPR_ALIAS_GPR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_ALIAS_GPR_SHIFT)) & SNVS_LPGPR_ALIAS_GPR_MASK)
 /*! @} */
 
 /* The count of SNVS_LPGPR_ALIAS */
-#define SNVS_LPGPR_ALIAS_COUNT                   (4U)
+#define SNVS_LPGPR_ALIAS_COUNT (4U)
 
 /*! @name LPGPR - SNVS_LP General Purpose Registers 0 .. 7 */
 /*! @{ */
-#define SNVS_LPGPR_GPR_MASK                      (0xFFFFFFFFU)
-#define SNVS_LPGPR_GPR_SHIFT                     (0U)
-#define SNVS_LPGPR_GPR(x)                        (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_GPR_SHIFT)) & SNVS_LPGPR_GPR_MASK)
+#define SNVS_LPGPR_GPR_MASK  (0xFFFFFFFFU)
+#define SNVS_LPGPR_GPR_SHIFT (0U)
+#define SNVS_LPGPR_GPR(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_LPGPR_GPR_SHIFT)) & SNVS_LPGPR_GPR_MASK)
 /*! @} */
 
 /* The count of SNVS_LPGPR */
-#define SNVS_LPGPR_COUNT                         (8U)
+#define SNVS_LPGPR_COUNT (8U)
 
 /*! @name HPVIDR1 - SNVS_HP Version ID Register 1 */
 /*! @{ */
-#define SNVS_HPVIDR1_MINOR_REV_MASK              (0xFFU)
-#define SNVS_HPVIDR1_MINOR_REV_SHIFT             (0U)
-#define SNVS_HPVIDR1_MINOR_REV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MINOR_REV_SHIFT)) & SNVS_HPVIDR1_MINOR_REV_MASK)
-#define SNVS_HPVIDR1_MAJOR_REV_MASK              (0xFF00U)
-#define SNVS_HPVIDR1_MAJOR_REV_SHIFT             (8U)
-#define SNVS_HPVIDR1_MAJOR_REV(x)                (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MAJOR_REV_SHIFT)) & SNVS_HPVIDR1_MAJOR_REV_MASK)
-#define SNVS_HPVIDR1_IP_ID_MASK                  (0xFFFF0000U)
-#define SNVS_HPVIDR1_IP_ID_SHIFT                 (16U)
-#define SNVS_HPVIDR1_IP_ID(x)                    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_IP_ID_SHIFT)) & SNVS_HPVIDR1_IP_ID_MASK)
+#define SNVS_HPVIDR1_MINOR_REV_MASK  (0xFFU)
+#define SNVS_HPVIDR1_MINOR_REV_SHIFT (0U)
+#define SNVS_HPVIDR1_MINOR_REV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MINOR_REV_SHIFT)) & SNVS_HPVIDR1_MINOR_REV_MASK)
+#define SNVS_HPVIDR1_MAJOR_REV_MASK  (0xFF00U)
+#define SNVS_HPVIDR1_MAJOR_REV_SHIFT (8U)
+#define SNVS_HPVIDR1_MAJOR_REV(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_MAJOR_REV_SHIFT)) & SNVS_HPVIDR1_MAJOR_REV_MASK)
+#define SNVS_HPVIDR1_IP_ID_MASK  (0xFFFF0000U)
+#define SNVS_HPVIDR1_IP_ID_SHIFT (16U)
+#define SNVS_HPVIDR1_IP_ID(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR1_IP_ID_SHIFT)) & SNVS_HPVIDR1_IP_ID_MASK)
 /*! @} */
 
 /*! @name HPVIDR2 - SNVS_HP Version ID Register 2 */
 /*! @{ */
-#define SNVS_HPVIDR2_CONFIG_OPT_MASK             (0xFFU)
-#define SNVS_HPVIDR2_CONFIG_OPT_SHIFT            (0U)
-#define SNVS_HPVIDR2_CONFIG_OPT(x)               (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_CONFIG_OPT_SHIFT)) & SNVS_HPVIDR2_CONFIG_OPT_MASK)
-#define SNVS_HPVIDR2_ECO_REV_MASK                (0xFF00U)
-#define SNVS_HPVIDR2_ECO_REV_SHIFT               (8U)
-#define SNVS_HPVIDR2_ECO_REV(x)                  (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_ECO_REV_SHIFT)) & SNVS_HPVIDR2_ECO_REV_MASK)
-#define SNVS_HPVIDR2_INTG_OPT_MASK               (0xFF0000U)
-#define SNVS_HPVIDR2_INTG_OPT_SHIFT              (16U)
-#define SNVS_HPVIDR2_INTG_OPT(x)                 (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_INTG_OPT_SHIFT)) & SNVS_HPVIDR2_INTG_OPT_MASK)
-#define SNVS_HPVIDR2_IP_ERA_MASK                 (0xFF000000U)
-#define SNVS_HPVIDR2_IP_ERA_SHIFT                (24U)
-#define SNVS_HPVIDR2_IP_ERA(x)                   (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_IP_ERA_SHIFT)) & SNVS_HPVIDR2_IP_ERA_MASK)
+#define SNVS_HPVIDR2_CONFIG_OPT_MASK  (0xFFU)
+#define SNVS_HPVIDR2_CONFIG_OPT_SHIFT (0U)
+#define SNVS_HPVIDR2_CONFIG_OPT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_CONFIG_OPT_SHIFT)) & SNVS_HPVIDR2_CONFIG_OPT_MASK)
+#define SNVS_HPVIDR2_ECO_REV_MASK  (0xFF00U)
+#define SNVS_HPVIDR2_ECO_REV_SHIFT (8U)
+#define SNVS_HPVIDR2_ECO_REV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_ECO_REV_SHIFT)) & SNVS_HPVIDR2_ECO_REV_MASK)
+#define SNVS_HPVIDR2_INTG_OPT_MASK  (0xFF0000U)
+#define SNVS_HPVIDR2_INTG_OPT_SHIFT (16U)
+#define SNVS_HPVIDR2_INTG_OPT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_INTG_OPT_SHIFT)) & SNVS_HPVIDR2_INTG_OPT_MASK)
+#define SNVS_HPVIDR2_IP_ERA_MASK  (0xFF000000U)
+#define SNVS_HPVIDR2_IP_ERA_SHIFT (24U)
+#define SNVS_HPVIDR2_IP_ERA(x)    (((uint32_t)(((uint32_t)(x)) << SNVS_HPVIDR2_IP_ERA_SHIFT)) & SNVS_HPVIDR2_IP_ERA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SNVS_Register_Masks */
 
-
 /* SNVS - Peripheral instance base addresses */
 /** Peripheral SNVS base address */
-#define SNVS_BASE                                (0x400D4000u)
+#define SNVS_BASE (0x400D4000u)
 /** Peripheral SNVS base pointer */
-#define SNVS                                     ((SNVS_Type *)SNVS_BASE)
+#define SNVS ((SNVS_Type *)SNVS_BASE)
 /** Array initializer of SNVS peripheral base addresses */
-#define SNVS_BASE_ADDRS                          { SNVS_BASE }
+#define SNVS_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        SNVS_BASE                                                                                                      \
+    }
 /** Array initializer of SNVS peripheral base pointers */
-#define SNVS_BASE_PTRS                           { SNVS }
+#define SNVS_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        SNVS                                                                                                           \
+    }
 /** Interrupt vectors for the SNVS peripheral type */
-#define SNVS_IRQS                                { SNVS_LP_WRAPPER_IRQn }
-#define SNVS_CONSOLIDATED_IRQS                   { SNVS_HP_WRAPPER_IRQn }
-#define SNVS_SECURITY_IRQS                       { SNVS_HP_WRAPPER_TZ_IRQn }
+#define SNVS_IRQS                                                                                                      \
+    {                                                                                                                  \
+        SNVS_LP_WRAPPER_IRQn                                                                                           \
+    }
+#define SNVS_CONSOLIDATED_IRQS                                                                                         \
+    {                                                                                                                  \
+        SNVS_HP_WRAPPER_IRQn                                                                                           \
+    }
+#define SNVS_SECURITY_IRQS                                                                                             \
+    {                                                                                                                  \
+        SNVS_HP_WRAPPER_TZ_IRQn                                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group SNVS_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SPDIF Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -19734,29 +22519,31 @@ typedef struct {
  */
 
 /** SPDIF - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SCR;                               /**< SPDIF Configuration Register, offset: 0x0 */
-  __IO uint32_t SRCD;                              /**< CDText Control Register, offset: 0x4 */
-  __IO uint32_t SRPC;                              /**< PhaseConfig Register, offset: 0x8 */
-  __IO uint32_t SIE;                               /**< InterruptEn Register, offset: 0xC */
-  union {                                          /* offset: 0x10 */
-    __O  uint32_t SIC;                               /**< InterruptClear Register, offset: 0x10 */
-    __I  uint32_t SIS;                               /**< InterruptStat Register, offset: 0x10 */
-  };
-  __I  uint32_t SRL;                               /**< SPDIFRxLeft Register, offset: 0x14 */
-  __I  uint32_t SRR;                               /**< SPDIFRxRight Register, offset: 0x18 */
-  __I  uint32_t SRCSH;                             /**< SPDIFRxCChannel_h Register, offset: 0x1C */
-  __I  uint32_t SRCSL;                             /**< SPDIFRxCChannel_l Register, offset: 0x20 */
-  __I  uint32_t SRU;                               /**< UchannelRx Register, offset: 0x24 */
-  __I  uint32_t SRQ;                               /**< QchannelRx Register, offset: 0x28 */
-  __O  uint32_t STL;                               /**< SPDIFTxLeft Register, offset: 0x2C */
-  __O  uint32_t STR;                               /**< SPDIFTxRight Register, offset: 0x30 */
-  __IO uint32_t STCSCH;                            /**< SPDIFTxCChannelCons_h Register, offset: 0x34 */
-  __IO uint32_t STCSCL;                            /**< SPDIFTxCChannelCons_l Register, offset: 0x38 */
-       uint8_t RESERVED_0[8];
-  __I  uint32_t SRFM;                              /**< FreqMeas Register, offset: 0x44 */
-       uint8_t RESERVED_1[8];
-  __IO uint32_t STC;                               /**< SPDIFTxClk Register, offset: 0x50 */
+typedef struct
+{
+    __IO uint32_t SCR;  /**< SPDIF Configuration Register, offset: 0x0 */
+    __IO uint32_t SRCD; /**< CDText Control Register, offset: 0x4 */
+    __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */
+    __IO uint32_t SIE;  /**< InterruptEn Register, offset: 0xC */
+    union
+    {                     /* offset: 0x10 */
+        __O uint32_t SIC; /**< InterruptClear Register, offset: 0x10 */
+        __I uint32_t SIS; /**< InterruptStat Register, offset: 0x10 */
+    };
+    __I uint32_t SRL;     /**< SPDIFRxLeft Register, offset: 0x14 */
+    __I uint32_t SRR;     /**< SPDIFRxRight Register, offset: 0x18 */
+    __I uint32_t SRCSH;   /**< SPDIFRxCChannel_h Register, offset: 0x1C */
+    __I uint32_t SRCSL;   /**< SPDIFRxCChannel_l Register, offset: 0x20 */
+    __I uint32_t SRU;     /**< UchannelRx Register, offset: 0x24 */
+    __I uint32_t SRQ;     /**< QchannelRx Register, offset: 0x28 */
+    __O uint32_t STL;     /**< SPDIFTxLeft Register, offset: 0x2C */
+    __O uint32_t STR;     /**< SPDIFTxRight Register, offset: 0x30 */
+    __IO uint32_t STCSCH; /**< SPDIFTxCChannelCons_h Register, offset: 0x34 */
+    __IO uint32_t STCSCL; /**< SPDIFTxCChannelCons_l Register, offset: 0x38 */
+    uint8_t RESERVED_0[8];
+    __I uint32_t SRFM; /**< FreqMeas Register, offset: 0x44 */
+    uint8_t RESERVED_1[8];
+    __IO uint32_t STC; /**< SPDIFTxClk Register, offset: 0x50 */
 } SPDIF_Type;
 
 /* ----------------------------------------------------------------------------
@@ -19770,351 +22557,386 @@ typedef struct {
 
 /*! @name SCR - SPDIF Configuration Register */
 /*! @{ */
-#define SPDIF_SCR_USRC_SEL_MASK                  (0x3U)
-#define SPDIF_SCR_USRC_SEL_SHIFT                 (0U)
-#define SPDIF_SCR_USRC_SEL(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_USRC_SEL_SHIFT)) & SPDIF_SCR_USRC_SEL_MASK)
-#define SPDIF_SCR_TXSEL_MASK                     (0x1CU)
-#define SPDIF_SCR_TXSEL_SHIFT                    (2U)
-#define SPDIF_SCR_TXSEL(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXSEL_SHIFT)) & SPDIF_SCR_TXSEL_MASK)
-#define SPDIF_SCR_VALCTRL_MASK                   (0x20U)
-#define SPDIF_SCR_VALCTRL_SHIFT                  (5U)
-#define SPDIF_SCR_VALCTRL(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_VALCTRL_SHIFT)) & SPDIF_SCR_VALCTRL_MASK)
-#define SPDIF_SCR_DMA_TX_EN_MASK                 (0x100U)
-#define SPDIF_SCR_DMA_TX_EN_SHIFT                (8U)
-#define SPDIF_SCR_DMA_TX_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_TX_EN_SHIFT)) & SPDIF_SCR_DMA_TX_EN_MASK)
-#define SPDIF_SCR_DMA_RX_EN_MASK                 (0x200U)
-#define SPDIF_SCR_DMA_RX_EN_SHIFT                (9U)
-#define SPDIF_SCR_DMA_RX_EN(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_RX_EN_SHIFT)) & SPDIF_SCR_DMA_RX_EN_MASK)
-#define SPDIF_SCR_TXFIFO_CTRL_MASK               (0xC00U)
-#define SPDIF_SCR_TXFIFO_CTRL_SHIFT              (10U)
-#define SPDIF_SCR_TXFIFO_CTRL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFO_CTRL_SHIFT)) & SPDIF_SCR_TXFIFO_CTRL_MASK)
-#define SPDIF_SCR_SOFT_RESET_MASK                (0x1000U)
-#define SPDIF_SCR_SOFT_RESET_SHIFT               (12U)
-#define SPDIF_SCR_SOFT_RESET(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_SOFT_RESET_SHIFT)) & SPDIF_SCR_SOFT_RESET_MASK)
-#define SPDIF_SCR_LOW_POWER_MASK                 (0x2000U)
-#define SPDIF_SCR_LOW_POWER_SHIFT                (13U)
-#define SPDIF_SCR_LOW_POWER(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_LOW_POWER_SHIFT)) & SPDIF_SCR_LOW_POWER_MASK)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL_MASK           (0x18000U)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT          (15U)
-#define SPDIF_SCR_TXFIFOEMPTY_SEL(x)             (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT)) & SPDIF_SCR_TXFIFOEMPTY_SEL_MASK)
-#define SPDIF_SCR_TXAUTOSYNC_MASK                (0x20000U)
-#define SPDIF_SCR_TXAUTOSYNC_SHIFT               (17U)
-#define SPDIF_SCR_TXAUTOSYNC(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXAUTOSYNC_SHIFT)) & SPDIF_SCR_TXAUTOSYNC_MASK)
-#define SPDIF_SCR_RXAUTOSYNC_MASK                (0x40000U)
-#define SPDIF_SCR_RXAUTOSYNC_SHIFT               (18U)
-#define SPDIF_SCR_RXAUTOSYNC(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXAUTOSYNC_SHIFT)) & SPDIF_SCR_RXAUTOSYNC_MASK)
-#define SPDIF_SCR_RXFIFOFULL_SEL_MASK            (0x180000U)
-#define SPDIF_SCR_RXFIFOFULL_SEL_SHIFT           (19U)
-#define SPDIF_SCR_RXFIFOFULL_SEL(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFOFULL_SEL_SHIFT)) & SPDIF_SCR_RXFIFOFULL_SEL_MASK)
-#define SPDIF_SCR_RXFIFO_RST_MASK                (0x200000U)
-#define SPDIF_SCR_RXFIFO_RST_SHIFT               (21U)
-#define SPDIF_SCR_RXFIFO_RST(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_RST_SHIFT)) & SPDIF_SCR_RXFIFO_RST_MASK)
-#define SPDIF_SCR_RXFIFO_OFF_ON_MASK             (0x400000U)
-#define SPDIF_SCR_RXFIFO_OFF_ON_SHIFT            (22U)
-#define SPDIF_SCR_RXFIFO_OFF_ON(x)               (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_OFF_ON_SHIFT)) & SPDIF_SCR_RXFIFO_OFF_ON_MASK)
-#define SPDIF_SCR_RXFIFO_CTRL_MASK               (0x800000U)
-#define SPDIF_SCR_RXFIFO_CTRL_SHIFT              (23U)
-#define SPDIF_SCR_RXFIFO_CTRL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_CTRL_SHIFT)) & SPDIF_SCR_RXFIFO_CTRL_MASK)
+#define SPDIF_SCR_USRC_SEL_MASK     (0x3U)
+#define SPDIF_SCR_USRC_SEL_SHIFT    (0U)
+#define SPDIF_SCR_USRC_SEL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_USRC_SEL_SHIFT)) & SPDIF_SCR_USRC_SEL_MASK)
+#define SPDIF_SCR_TXSEL_MASK        (0x1CU)
+#define SPDIF_SCR_TXSEL_SHIFT       (2U)
+#define SPDIF_SCR_TXSEL(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXSEL_SHIFT)) & SPDIF_SCR_TXSEL_MASK)
+#define SPDIF_SCR_VALCTRL_MASK      (0x20U)
+#define SPDIF_SCR_VALCTRL_SHIFT     (5U)
+#define SPDIF_SCR_VALCTRL(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_VALCTRL_SHIFT)) & SPDIF_SCR_VALCTRL_MASK)
+#define SPDIF_SCR_DMA_TX_EN_MASK    (0x100U)
+#define SPDIF_SCR_DMA_TX_EN_SHIFT   (8U)
+#define SPDIF_SCR_DMA_TX_EN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_TX_EN_SHIFT)) & SPDIF_SCR_DMA_TX_EN_MASK)
+#define SPDIF_SCR_DMA_RX_EN_MASK    (0x200U)
+#define SPDIF_SCR_DMA_RX_EN_SHIFT   (9U)
+#define SPDIF_SCR_DMA_RX_EN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_DMA_RX_EN_SHIFT)) & SPDIF_SCR_DMA_RX_EN_MASK)
+#define SPDIF_SCR_TXFIFO_CTRL_MASK  (0xC00U)
+#define SPDIF_SCR_TXFIFO_CTRL_SHIFT (10U)
+#define SPDIF_SCR_TXFIFO_CTRL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFO_CTRL_SHIFT)) & SPDIF_SCR_TXFIFO_CTRL_MASK)
+#define SPDIF_SCR_SOFT_RESET_MASK  (0x1000U)
+#define SPDIF_SCR_SOFT_RESET_SHIFT (12U)
+#define SPDIF_SCR_SOFT_RESET(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_SOFT_RESET_SHIFT)) & SPDIF_SCR_SOFT_RESET_MASK)
+#define SPDIF_SCR_LOW_POWER_MASK        (0x2000U)
+#define SPDIF_SCR_LOW_POWER_SHIFT       (13U)
+#define SPDIF_SCR_LOW_POWER(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_LOW_POWER_SHIFT)) & SPDIF_SCR_LOW_POWER_MASK)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL_MASK  (0x18000U)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT (15U)
+#define SPDIF_SCR_TXFIFOEMPTY_SEL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT)) & SPDIF_SCR_TXFIFOEMPTY_SEL_MASK)
+#define SPDIF_SCR_TXAUTOSYNC_MASK  (0x20000U)
+#define SPDIF_SCR_TXAUTOSYNC_SHIFT (17U)
+#define SPDIF_SCR_TXAUTOSYNC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_TXAUTOSYNC_SHIFT)) & SPDIF_SCR_TXAUTOSYNC_MASK)
+#define SPDIF_SCR_RXAUTOSYNC_MASK  (0x40000U)
+#define SPDIF_SCR_RXAUTOSYNC_SHIFT (18U)
+#define SPDIF_SCR_RXAUTOSYNC(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXAUTOSYNC_SHIFT)) & SPDIF_SCR_RXAUTOSYNC_MASK)
+#define SPDIF_SCR_RXFIFOFULL_SEL_MASK  (0x180000U)
+#define SPDIF_SCR_RXFIFOFULL_SEL_SHIFT (19U)
+#define SPDIF_SCR_RXFIFOFULL_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFOFULL_SEL_SHIFT)) & SPDIF_SCR_RXFIFOFULL_SEL_MASK)
+#define SPDIF_SCR_RXFIFO_RST_MASK  (0x200000U)
+#define SPDIF_SCR_RXFIFO_RST_SHIFT (21U)
+#define SPDIF_SCR_RXFIFO_RST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_RST_SHIFT)) & SPDIF_SCR_RXFIFO_RST_MASK)
+#define SPDIF_SCR_RXFIFO_OFF_ON_MASK  (0x400000U)
+#define SPDIF_SCR_RXFIFO_OFF_ON_SHIFT (22U)
+#define SPDIF_SCR_RXFIFO_OFF_ON(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_OFF_ON_SHIFT)) & SPDIF_SCR_RXFIFO_OFF_ON_MASK)
+#define SPDIF_SCR_RXFIFO_CTRL_MASK  (0x800000U)
+#define SPDIF_SCR_RXFIFO_CTRL_SHIFT (23U)
+#define SPDIF_SCR_RXFIFO_CTRL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SCR_RXFIFO_CTRL_SHIFT)) & SPDIF_SCR_RXFIFO_CTRL_MASK)
 /*! @} */
 
 /*! @name SRCD - CDText Control Register */
 /*! @{ */
-#define SPDIF_SRCD_USYNCMODE_MASK                (0x2U)
-#define SPDIF_SRCD_USYNCMODE_SHIFT               (1U)
-#define SPDIF_SRCD_USYNCMODE(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCD_USYNCMODE_SHIFT)) & SPDIF_SRCD_USYNCMODE_MASK)
+#define SPDIF_SRCD_USYNCMODE_MASK  (0x2U)
+#define SPDIF_SRCD_USYNCMODE_SHIFT (1U)
+#define SPDIF_SRCD_USYNCMODE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCD_USYNCMODE_SHIFT)) & SPDIF_SRCD_USYNCMODE_MASK)
 /*! @} */
 
 /*! @name SRPC - PhaseConfig Register */
 /*! @{ */
-#define SPDIF_SRPC_GAINSEL_MASK                  (0x38U)
-#define SPDIF_SRPC_GAINSEL_SHIFT                 (3U)
-#define SPDIF_SRPC_GAINSEL(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_GAINSEL_SHIFT)) & SPDIF_SRPC_GAINSEL_MASK)
-#define SPDIF_SRPC_LOCK_MASK                     (0x40U)
-#define SPDIF_SRPC_LOCK_SHIFT                    (6U)
-#define SPDIF_SRPC_LOCK(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_LOCK_SHIFT)) & SPDIF_SRPC_LOCK_MASK)
-#define SPDIF_SRPC_CLKSRC_SEL_MASK               (0x780U)
-#define SPDIF_SRPC_CLKSRC_SEL_SHIFT              (7U)
-#define SPDIF_SRPC_CLKSRC_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_CLKSRC_SEL_SHIFT)) & SPDIF_SRPC_CLKSRC_SEL_MASK)
+#define SPDIF_SRPC_GAINSEL_MASK     (0x38U)
+#define SPDIF_SRPC_GAINSEL_SHIFT    (3U)
+#define SPDIF_SRPC_GAINSEL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_GAINSEL_SHIFT)) & SPDIF_SRPC_GAINSEL_MASK)
+#define SPDIF_SRPC_LOCK_MASK        (0x40U)
+#define SPDIF_SRPC_LOCK_SHIFT       (6U)
+#define SPDIF_SRPC_LOCK(x)          (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_LOCK_SHIFT)) & SPDIF_SRPC_LOCK_MASK)
+#define SPDIF_SRPC_CLKSRC_SEL_MASK  (0x780U)
+#define SPDIF_SRPC_CLKSRC_SEL_SHIFT (7U)
+#define SPDIF_SRPC_CLKSRC_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRPC_CLKSRC_SEL_SHIFT)) & SPDIF_SRPC_CLKSRC_SEL_MASK)
 /*! @} */
 
 /*! @name SIE - InterruptEn Register */
 /*! @{ */
-#define SPDIF_SIE_RXFIFOFUL_MASK                 (0x1U)
-#define SPDIF_SIE_RXFIFOFUL_SHIFT                (0U)
-#define SPDIF_SIE_RXFIFOFUL(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOFUL_SHIFT)) & SPDIF_SIE_RXFIFOFUL_MASK)
-#define SPDIF_SIE_TXEM_MASK                      (0x2U)
-#define SPDIF_SIE_TXEM_SHIFT                     (1U)
-#define SPDIF_SIE_TXEM(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXEM_SHIFT)) & SPDIF_SIE_TXEM_MASK)
-#define SPDIF_SIE_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIE_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIE_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCKLOSS_SHIFT)) & SPDIF_SIE_LOCKLOSS_MASK)
-#define SPDIF_SIE_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIE_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIE_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFORESYN_SHIFT)) & SPDIF_SIE_RXFIFORESYN_MASK)
-#define SPDIF_SIE_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIE_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIE_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOUNOV_SHIFT)) & SPDIF_SIE_RXFIFOUNOV_MASK)
-#define SPDIF_SIE_UQERR_MASK                     (0x20U)
-#define SPDIF_SIE_UQERR_SHIFT                    (5U)
-#define SPDIF_SIE_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQERR_SHIFT)) & SPDIF_SIE_UQERR_MASK)
-#define SPDIF_SIE_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIE_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIE_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQSYNC_SHIFT)) & SPDIF_SIE_UQSYNC_MASK)
-#define SPDIF_SIE_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIE_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIE_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXOV_SHIFT)) & SPDIF_SIE_QRXOV_MASK)
-#define SPDIF_SIE_QRXFUL_MASK                    (0x100U)
-#define SPDIF_SIE_QRXFUL_SHIFT                   (8U)
-#define SPDIF_SIE_QRXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXFUL_SHIFT)) & SPDIF_SIE_QRXFUL_MASK)
-#define SPDIF_SIE_URXOV_MASK                     (0x200U)
-#define SPDIF_SIE_URXOV_SHIFT                    (9U)
-#define SPDIF_SIE_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXOV_SHIFT)) & SPDIF_SIE_URXOV_MASK)
-#define SPDIF_SIE_URXFUL_MASK                    (0x400U)
-#define SPDIF_SIE_URXFUL_SHIFT                   (10U)
-#define SPDIF_SIE_URXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXFUL_SHIFT)) & SPDIF_SIE_URXFUL_MASK)
-#define SPDIF_SIE_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIE_BITERR_SHIFT                   (14U)
-#define SPDIF_SIE_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_BITERR_SHIFT)) & SPDIF_SIE_BITERR_MASK)
-#define SPDIF_SIE_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIE_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIE_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_SYMERR_SHIFT)) & SPDIF_SIE_SYMERR_MASK)
-#define SPDIF_SIE_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIE_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIE_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_VALNOGOOD_SHIFT)) & SPDIF_SIE_VALNOGOOD_MASK)
-#define SPDIF_SIE_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIE_CNEW_SHIFT                     (17U)
-#define SPDIF_SIE_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_CNEW_SHIFT)) & SPDIF_SIE_CNEW_MASK)
-#define SPDIF_SIE_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIE_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIE_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXRESYN_SHIFT)) & SPDIF_SIE_TXRESYN_MASK)
-#define SPDIF_SIE_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIE_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIE_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXUNOV_SHIFT)) & SPDIF_SIE_TXUNOV_MASK)
-#define SPDIF_SIE_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIE_LOCK_SHIFT                     (20U)
-#define SPDIF_SIE_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCK_SHIFT)) & SPDIF_SIE_LOCK_MASK)
+#define SPDIF_SIE_RXFIFOFUL_MASK    (0x1U)
+#define SPDIF_SIE_RXFIFOFUL_SHIFT   (0U)
+#define SPDIF_SIE_RXFIFOFUL(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOFUL_SHIFT)) & SPDIF_SIE_RXFIFOFUL_MASK)
+#define SPDIF_SIE_TXEM_MASK         (0x2U)
+#define SPDIF_SIE_TXEM_SHIFT        (1U)
+#define SPDIF_SIE_TXEM(x)           (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXEM_SHIFT)) & SPDIF_SIE_TXEM_MASK)
+#define SPDIF_SIE_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIE_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIE_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCKLOSS_SHIFT)) & SPDIF_SIE_LOCKLOSS_MASK)
+#define SPDIF_SIE_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIE_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIE_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFORESYN_SHIFT)) & SPDIF_SIE_RXFIFORESYN_MASK)
+#define SPDIF_SIE_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIE_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIE_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_RXFIFOUNOV_SHIFT)) & SPDIF_SIE_RXFIFOUNOV_MASK)
+#define SPDIF_SIE_UQERR_MASK      (0x20U)
+#define SPDIF_SIE_UQERR_SHIFT     (5U)
+#define SPDIF_SIE_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQERR_SHIFT)) & SPDIF_SIE_UQERR_MASK)
+#define SPDIF_SIE_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIE_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIE_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_UQSYNC_SHIFT)) & SPDIF_SIE_UQSYNC_MASK)
+#define SPDIF_SIE_QRXOV_MASK      (0x80U)
+#define SPDIF_SIE_QRXOV_SHIFT     (7U)
+#define SPDIF_SIE_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXOV_SHIFT)) & SPDIF_SIE_QRXOV_MASK)
+#define SPDIF_SIE_QRXFUL_MASK     (0x100U)
+#define SPDIF_SIE_QRXFUL_SHIFT    (8U)
+#define SPDIF_SIE_QRXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_QRXFUL_SHIFT)) & SPDIF_SIE_QRXFUL_MASK)
+#define SPDIF_SIE_URXOV_MASK      (0x200U)
+#define SPDIF_SIE_URXOV_SHIFT     (9U)
+#define SPDIF_SIE_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXOV_SHIFT)) & SPDIF_SIE_URXOV_MASK)
+#define SPDIF_SIE_URXFUL_MASK     (0x400U)
+#define SPDIF_SIE_URXFUL_SHIFT    (10U)
+#define SPDIF_SIE_URXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_URXFUL_SHIFT)) & SPDIF_SIE_URXFUL_MASK)
+#define SPDIF_SIE_BITERR_MASK     (0x4000U)
+#define SPDIF_SIE_BITERR_SHIFT    (14U)
+#define SPDIF_SIE_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_BITERR_SHIFT)) & SPDIF_SIE_BITERR_MASK)
+#define SPDIF_SIE_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIE_SYMERR_SHIFT    (15U)
+#define SPDIF_SIE_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_SYMERR_SHIFT)) & SPDIF_SIE_SYMERR_MASK)
+#define SPDIF_SIE_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIE_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIE_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_VALNOGOOD_SHIFT)) & SPDIF_SIE_VALNOGOOD_MASK)
+#define SPDIF_SIE_CNEW_MASK       (0x20000U)
+#define SPDIF_SIE_CNEW_SHIFT      (17U)
+#define SPDIF_SIE_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_CNEW_SHIFT)) & SPDIF_SIE_CNEW_MASK)
+#define SPDIF_SIE_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIE_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIE_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXRESYN_SHIFT)) & SPDIF_SIE_TXRESYN_MASK)
+#define SPDIF_SIE_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIE_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIE_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_TXUNOV_SHIFT)) & SPDIF_SIE_TXUNOV_MASK)
+#define SPDIF_SIE_LOCK_MASK       (0x100000U)
+#define SPDIF_SIE_LOCK_SHIFT      (20U)
+#define SPDIF_SIE_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIE_LOCK_SHIFT)) & SPDIF_SIE_LOCK_MASK)
 /*! @} */
 
 /*! @name SIC - InterruptClear Register */
 /*! @{ */
-#define SPDIF_SIC_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIC_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIC_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCKLOSS_SHIFT)) & SPDIF_SIC_LOCKLOSS_MASK)
-#define SPDIF_SIC_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIC_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIC_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFORESYN_SHIFT)) & SPDIF_SIC_RXFIFORESYN_MASK)
-#define SPDIF_SIC_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIC_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIC_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFOUNOV_SHIFT)) & SPDIF_SIC_RXFIFOUNOV_MASK)
-#define SPDIF_SIC_UQERR_MASK                     (0x20U)
-#define SPDIF_SIC_UQERR_SHIFT                    (5U)
-#define SPDIF_SIC_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQERR_SHIFT)) & SPDIF_SIC_UQERR_MASK)
-#define SPDIF_SIC_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIC_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIC_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQSYNC_SHIFT)) & SPDIF_SIC_UQSYNC_MASK)
-#define SPDIF_SIC_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIC_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIC_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_QRXOV_SHIFT)) & SPDIF_SIC_QRXOV_MASK)
-#define SPDIF_SIC_URXOV_MASK                     (0x200U)
-#define SPDIF_SIC_URXOV_SHIFT                    (9U)
-#define SPDIF_SIC_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_URXOV_SHIFT)) & SPDIF_SIC_URXOV_MASK)
-#define SPDIF_SIC_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIC_BITERR_SHIFT                   (14U)
-#define SPDIF_SIC_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_BITERR_SHIFT)) & SPDIF_SIC_BITERR_MASK)
-#define SPDIF_SIC_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIC_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIC_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_SYMERR_SHIFT)) & SPDIF_SIC_SYMERR_MASK)
-#define SPDIF_SIC_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIC_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIC_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_VALNOGOOD_SHIFT)) & SPDIF_SIC_VALNOGOOD_MASK)
-#define SPDIF_SIC_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIC_CNEW_SHIFT                     (17U)
-#define SPDIF_SIC_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_CNEW_SHIFT)) & SPDIF_SIC_CNEW_MASK)
-#define SPDIF_SIC_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIC_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIC_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXRESYN_SHIFT)) & SPDIF_SIC_TXRESYN_MASK)
-#define SPDIF_SIC_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIC_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIC_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXUNOV_SHIFT)) & SPDIF_SIC_TXUNOV_MASK)
-#define SPDIF_SIC_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIC_LOCK_SHIFT                     (20U)
-#define SPDIF_SIC_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCK_SHIFT)) & SPDIF_SIC_LOCK_MASK)
+#define SPDIF_SIC_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIC_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIC_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCKLOSS_SHIFT)) & SPDIF_SIC_LOCKLOSS_MASK)
+#define SPDIF_SIC_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIC_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIC_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFORESYN_SHIFT)) & SPDIF_SIC_RXFIFORESYN_MASK)
+#define SPDIF_SIC_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIC_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIC_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_RXFIFOUNOV_SHIFT)) & SPDIF_SIC_RXFIFOUNOV_MASK)
+#define SPDIF_SIC_UQERR_MASK      (0x20U)
+#define SPDIF_SIC_UQERR_SHIFT     (5U)
+#define SPDIF_SIC_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQERR_SHIFT)) & SPDIF_SIC_UQERR_MASK)
+#define SPDIF_SIC_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIC_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIC_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_UQSYNC_SHIFT)) & SPDIF_SIC_UQSYNC_MASK)
+#define SPDIF_SIC_QRXOV_MASK      (0x80U)
+#define SPDIF_SIC_QRXOV_SHIFT     (7U)
+#define SPDIF_SIC_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_QRXOV_SHIFT)) & SPDIF_SIC_QRXOV_MASK)
+#define SPDIF_SIC_URXOV_MASK      (0x200U)
+#define SPDIF_SIC_URXOV_SHIFT     (9U)
+#define SPDIF_SIC_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_URXOV_SHIFT)) & SPDIF_SIC_URXOV_MASK)
+#define SPDIF_SIC_BITERR_MASK     (0x4000U)
+#define SPDIF_SIC_BITERR_SHIFT    (14U)
+#define SPDIF_SIC_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_BITERR_SHIFT)) & SPDIF_SIC_BITERR_MASK)
+#define SPDIF_SIC_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIC_SYMERR_SHIFT    (15U)
+#define SPDIF_SIC_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_SYMERR_SHIFT)) & SPDIF_SIC_SYMERR_MASK)
+#define SPDIF_SIC_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIC_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIC_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_VALNOGOOD_SHIFT)) & SPDIF_SIC_VALNOGOOD_MASK)
+#define SPDIF_SIC_CNEW_MASK       (0x20000U)
+#define SPDIF_SIC_CNEW_SHIFT      (17U)
+#define SPDIF_SIC_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_CNEW_SHIFT)) & SPDIF_SIC_CNEW_MASK)
+#define SPDIF_SIC_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIC_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIC_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXRESYN_SHIFT)) & SPDIF_SIC_TXRESYN_MASK)
+#define SPDIF_SIC_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIC_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIC_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_TXUNOV_SHIFT)) & SPDIF_SIC_TXUNOV_MASK)
+#define SPDIF_SIC_LOCK_MASK       (0x100000U)
+#define SPDIF_SIC_LOCK_SHIFT      (20U)
+#define SPDIF_SIC_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIC_LOCK_SHIFT)) & SPDIF_SIC_LOCK_MASK)
 /*! @} */
 
 /*! @name SIS - InterruptStat Register */
 /*! @{ */
-#define SPDIF_SIS_RXFIFOFUL_MASK                 (0x1U)
-#define SPDIF_SIS_RXFIFOFUL_SHIFT                (0U)
-#define SPDIF_SIS_RXFIFOFUL(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOFUL_SHIFT)) & SPDIF_SIS_RXFIFOFUL_MASK)
-#define SPDIF_SIS_TXEM_MASK                      (0x2U)
-#define SPDIF_SIS_TXEM_SHIFT                     (1U)
-#define SPDIF_SIS_TXEM(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXEM_SHIFT)) & SPDIF_SIS_TXEM_MASK)
-#define SPDIF_SIS_LOCKLOSS_MASK                  (0x4U)
-#define SPDIF_SIS_LOCKLOSS_SHIFT                 (2U)
-#define SPDIF_SIS_LOCKLOSS(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCKLOSS_SHIFT)) & SPDIF_SIS_LOCKLOSS_MASK)
-#define SPDIF_SIS_RXFIFORESYN_MASK               (0x8U)
-#define SPDIF_SIS_RXFIFORESYN_SHIFT              (3U)
-#define SPDIF_SIS_RXFIFORESYN(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFORESYN_SHIFT)) & SPDIF_SIS_RXFIFORESYN_MASK)
-#define SPDIF_SIS_RXFIFOUNOV_MASK                (0x10U)
-#define SPDIF_SIS_RXFIFOUNOV_SHIFT               (4U)
-#define SPDIF_SIS_RXFIFOUNOV(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOUNOV_SHIFT)) & SPDIF_SIS_RXFIFOUNOV_MASK)
-#define SPDIF_SIS_UQERR_MASK                     (0x20U)
-#define SPDIF_SIS_UQERR_SHIFT                    (5U)
-#define SPDIF_SIS_UQERR(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQERR_SHIFT)) & SPDIF_SIS_UQERR_MASK)
-#define SPDIF_SIS_UQSYNC_MASK                    (0x40U)
-#define SPDIF_SIS_UQSYNC_SHIFT                   (6U)
-#define SPDIF_SIS_UQSYNC(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQSYNC_SHIFT)) & SPDIF_SIS_UQSYNC_MASK)
-#define SPDIF_SIS_QRXOV_MASK                     (0x80U)
-#define SPDIF_SIS_QRXOV_SHIFT                    (7U)
-#define SPDIF_SIS_QRXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXOV_SHIFT)) & SPDIF_SIS_QRXOV_MASK)
-#define SPDIF_SIS_QRXFUL_MASK                    (0x100U)
-#define SPDIF_SIS_QRXFUL_SHIFT                   (8U)
-#define SPDIF_SIS_QRXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXFUL_SHIFT)) & SPDIF_SIS_QRXFUL_MASK)
-#define SPDIF_SIS_URXOV_MASK                     (0x200U)
-#define SPDIF_SIS_URXOV_SHIFT                    (9U)
-#define SPDIF_SIS_URXOV(x)                       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXOV_SHIFT)) & SPDIF_SIS_URXOV_MASK)
-#define SPDIF_SIS_URXFUL_MASK                    (0x400U)
-#define SPDIF_SIS_URXFUL_SHIFT                   (10U)
-#define SPDIF_SIS_URXFUL(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXFUL_SHIFT)) & SPDIF_SIS_URXFUL_MASK)
-#define SPDIF_SIS_BITERR_MASK                    (0x4000U)
-#define SPDIF_SIS_BITERR_SHIFT                   (14U)
-#define SPDIF_SIS_BITERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_BITERR_SHIFT)) & SPDIF_SIS_BITERR_MASK)
-#define SPDIF_SIS_SYMERR_MASK                    (0x8000U)
-#define SPDIF_SIS_SYMERR_SHIFT                   (15U)
-#define SPDIF_SIS_SYMERR(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_SYMERR_SHIFT)) & SPDIF_SIS_SYMERR_MASK)
-#define SPDIF_SIS_VALNOGOOD_MASK                 (0x10000U)
-#define SPDIF_SIS_VALNOGOOD_SHIFT                (16U)
-#define SPDIF_SIS_VALNOGOOD(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_VALNOGOOD_SHIFT)) & SPDIF_SIS_VALNOGOOD_MASK)
-#define SPDIF_SIS_CNEW_MASK                      (0x20000U)
-#define SPDIF_SIS_CNEW_SHIFT                     (17U)
-#define SPDIF_SIS_CNEW(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_CNEW_SHIFT)) & SPDIF_SIS_CNEW_MASK)
-#define SPDIF_SIS_TXRESYN_MASK                   (0x40000U)
-#define SPDIF_SIS_TXRESYN_SHIFT                  (18U)
-#define SPDIF_SIS_TXRESYN(x)                     (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXRESYN_SHIFT)) & SPDIF_SIS_TXRESYN_MASK)
-#define SPDIF_SIS_TXUNOV_MASK                    (0x80000U)
-#define SPDIF_SIS_TXUNOV_SHIFT                   (19U)
-#define SPDIF_SIS_TXUNOV(x)                      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXUNOV_SHIFT)) & SPDIF_SIS_TXUNOV_MASK)
-#define SPDIF_SIS_LOCK_MASK                      (0x100000U)
-#define SPDIF_SIS_LOCK_SHIFT                     (20U)
-#define SPDIF_SIS_LOCK(x)                        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCK_SHIFT)) & SPDIF_SIS_LOCK_MASK)
+#define SPDIF_SIS_RXFIFOFUL_MASK    (0x1U)
+#define SPDIF_SIS_RXFIFOFUL_SHIFT   (0U)
+#define SPDIF_SIS_RXFIFOFUL(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOFUL_SHIFT)) & SPDIF_SIS_RXFIFOFUL_MASK)
+#define SPDIF_SIS_TXEM_MASK         (0x2U)
+#define SPDIF_SIS_TXEM_SHIFT        (1U)
+#define SPDIF_SIS_TXEM(x)           (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXEM_SHIFT)) & SPDIF_SIS_TXEM_MASK)
+#define SPDIF_SIS_LOCKLOSS_MASK     (0x4U)
+#define SPDIF_SIS_LOCKLOSS_SHIFT    (2U)
+#define SPDIF_SIS_LOCKLOSS(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCKLOSS_SHIFT)) & SPDIF_SIS_LOCKLOSS_MASK)
+#define SPDIF_SIS_RXFIFORESYN_MASK  (0x8U)
+#define SPDIF_SIS_RXFIFORESYN_SHIFT (3U)
+#define SPDIF_SIS_RXFIFORESYN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFORESYN_SHIFT)) & SPDIF_SIS_RXFIFORESYN_MASK)
+#define SPDIF_SIS_RXFIFOUNOV_MASK  (0x10U)
+#define SPDIF_SIS_RXFIFOUNOV_SHIFT (4U)
+#define SPDIF_SIS_RXFIFOUNOV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_RXFIFOUNOV_SHIFT)) & SPDIF_SIS_RXFIFOUNOV_MASK)
+#define SPDIF_SIS_UQERR_MASK      (0x20U)
+#define SPDIF_SIS_UQERR_SHIFT     (5U)
+#define SPDIF_SIS_UQERR(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQERR_SHIFT)) & SPDIF_SIS_UQERR_MASK)
+#define SPDIF_SIS_UQSYNC_MASK     (0x40U)
+#define SPDIF_SIS_UQSYNC_SHIFT    (6U)
+#define SPDIF_SIS_UQSYNC(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_UQSYNC_SHIFT)) & SPDIF_SIS_UQSYNC_MASK)
+#define SPDIF_SIS_QRXOV_MASK      (0x80U)
+#define SPDIF_SIS_QRXOV_SHIFT     (7U)
+#define SPDIF_SIS_QRXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXOV_SHIFT)) & SPDIF_SIS_QRXOV_MASK)
+#define SPDIF_SIS_QRXFUL_MASK     (0x100U)
+#define SPDIF_SIS_QRXFUL_SHIFT    (8U)
+#define SPDIF_SIS_QRXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_QRXFUL_SHIFT)) & SPDIF_SIS_QRXFUL_MASK)
+#define SPDIF_SIS_URXOV_MASK      (0x200U)
+#define SPDIF_SIS_URXOV_SHIFT     (9U)
+#define SPDIF_SIS_URXOV(x)        (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXOV_SHIFT)) & SPDIF_SIS_URXOV_MASK)
+#define SPDIF_SIS_URXFUL_MASK     (0x400U)
+#define SPDIF_SIS_URXFUL_SHIFT    (10U)
+#define SPDIF_SIS_URXFUL(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_URXFUL_SHIFT)) & SPDIF_SIS_URXFUL_MASK)
+#define SPDIF_SIS_BITERR_MASK     (0x4000U)
+#define SPDIF_SIS_BITERR_SHIFT    (14U)
+#define SPDIF_SIS_BITERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_BITERR_SHIFT)) & SPDIF_SIS_BITERR_MASK)
+#define SPDIF_SIS_SYMERR_MASK     (0x8000U)
+#define SPDIF_SIS_SYMERR_SHIFT    (15U)
+#define SPDIF_SIS_SYMERR(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_SYMERR_SHIFT)) & SPDIF_SIS_SYMERR_MASK)
+#define SPDIF_SIS_VALNOGOOD_MASK  (0x10000U)
+#define SPDIF_SIS_VALNOGOOD_SHIFT (16U)
+#define SPDIF_SIS_VALNOGOOD(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_VALNOGOOD_SHIFT)) & SPDIF_SIS_VALNOGOOD_MASK)
+#define SPDIF_SIS_CNEW_MASK       (0x20000U)
+#define SPDIF_SIS_CNEW_SHIFT      (17U)
+#define SPDIF_SIS_CNEW(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_CNEW_SHIFT)) & SPDIF_SIS_CNEW_MASK)
+#define SPDIF_SIS_TXRESYN_MASK    (0x40000U)
+#define SPDIF_SIS_TXRESYN_SHIFT   (18U)
+#define SPDIF_SIS_TXRESYN(x)      (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXRESYN_SHIFT)) & SPDIF_SIS_TXRESYN_MASK)
+#define SPDIF_SIS_TXUNOV_MASK     (0x80000U)
+#define SPDIF_SIS_TXUNOV_SHIFT    (19U)
+#define SPDIF_SIS_TXUNOV(x)       (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_TXUNOV_SHIFT)) & SPDIF_SIS_TXUNOV_MASK)
+#define SPDIF_SIS_LOCK_MASK       (0x100000U)
+#define SPDIF_SIS_LOCK_SHIFT      (20U)
+#define SPDIF_SIS_LOCK(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_SIS_LOCK_SHIFT)) & SPDIF_SIS_LOCK_MASK)
 /*! @} */
 
 /*! @name SRL - SPDIFRxLeft Register */
 /*! @{ */
-#define SPDIF_SRL_RXDATALEFT_MASK                (0xFFFFFFU)
-#define SPDIF_SRL_RXDATALEFT_SHIFT               (0U)
-#define SPDIF_SRL_RXDATALEFT(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRL_RXDATALEFT_SHIFT)) & SPDIF_SRL_RXDATALEFT_MASK)
+#define SPDIF_SRL_RXDATALEFT_MASK  (0xFFFFFFU)
+#define SPDIF_SRL_RXDATALEFT_SHIFT (0U)
+#define SPDIF_SRL_RXDATALEFT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRL_RXDATALEFT_SHIFT)) & SPDIF_SRL_RXDATALEFT_MASK)
 /*! @} */
 
 /*! @name SRR - SPDIFRxRight Register */
 /*! @{ */
-#define SPDIF_SRR_RXDATARIGHT_MASK               (0xFFFFFFU)
-#define SPDIF_SRR_RXDATARIGHT_SHIFT              (0U)
-#define SPDIF_SRR_RXDATARIGHT(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_SRR_RXDATARIGHT_SHIFT)) & SPDIF_SRR_RXDATARIGHT_MASK)
+#define SPDIF_SRR_RXDATARIGHT_MASK  (0xFFFFFFU)
+#define SPDIF_SRR_RXDATARIGHT_SHIFT (0U)
+#define SPDIF_SRR_RXDATARIGHT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRR_RXDATARIGHT_SHIFT)) & SPDIF_SRR_RXDATARIGHT_MASK)
 /*! @} */
 
 /*! @name SRCSH - SPDIFRxCChannel_h Register */
 /*! @{ */
-#define SPDIF_SRCSH_RXCCHANNEL_H_MASK            (0xFFFFFFU)
-#define SPDIF_SRCSH_RXCCHANNEL_H_SHIFT           (0U)
-#define SPDIF_SRCSH_RXCCHANNEL_H(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSH_RXCCHANNEL_H_SHIFT)) & SPDIF_SRCSH_RXCCHANNEL_H_MASK)
+#define SPDIF_SRCSH_RXCCHANNEL_H_MASK  (0xFFFFFFU)
+#define SPDIF_SRCSH_RXCCHANNEL_H_SHIFT (0U)
+#define SPDIF_SRCSH_RXCCHANNEL_H(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSH_RXCCHANNEL_H_SHIFT)) & SPDIF_SRCSH_RXCCHANNEL_H_MASK)
 /*! @} */
 
 /*! @name SRCSL - SPDIFRxCChannel_l Register */
 /*! @{ */
-#define SPDIF_SRCSL_RXCCHANNEL_L_MASK            (0xFFFFFFU)
-#define SPDIF_SRCSL_RXCCHANNEL_L_SHIFT           (0U)
-#define SPDIF_SRCSL_RXCCHANNEL_L(x)              (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSL_RXCCHANNEL_L_SHIFT)) & SPDIF_SRCSL_RXCCHANNEL_L_MASK)
+#define SPDIF_SRCSL_RXCCHANNEL_L_MASK  (0xFFFFFFU)
+#define SPDIF_SRCSL_RXCCHANNEL_L_SHIFT (0U)
+#define SPDIF_SRCSL_RXCCHANNEL_L(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRCSL_RXCCHANNEL_L_SHIFT)) & SPDIF_SRCSL_RXCCHANNEL_L_MASK)
 /*! @} */
 
 /*! @name SRU - UchannelRx Register */
 /*! @{ */
-#define SPDIF_SRU_RXUCHANNEL_MASK                (0xFFFFFFU)
-#define SPDIF_SRU_RXUCHANNEL_SHIFT               (0U)
-#define SPDIF_SRU_RXUCHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRU_RXUCHANNEL_SHIFT)) & SPDIF_SRU_RXUCHANNEL_MASK)
+#define SPDIF_SRU_RXUCHANNEL_MASK  (0xFFFFFFU)
+#define SPDIF_SRU_RXUCHANNEL_SHIFT (0U)
+#define SPDIF_SRU_RXUCHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRU_RXUCHANNEL_SHIFT)) & SPDIF_SRU_RXUCHANNEL_MASK)
 /*! @} */
 
 /*! @name SRQ - QchannelRx Register */
 /*! @{ */
-#define SPDIF_SRQ_RXQCHANNEL_MASK                (0xFFFFFFU)
-#define SPDIF_SRQ_RXQCHANNEL_SHIFT               (0U)
-#define SPDIF_SRQ_RXQCHANNEL(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_SRQ_RXQCHANNEL_SHIFT)) & SPDIF_SRQ_RXQCHANNEL_MASK)
+#define SPDIF_SRQ_RXQCHANNEL_MASK  (0xFFFFFFU)
+#define SPDIF_SRQ_RXQCHANNEL_SHIFT (0U)
+#define SPDIF_SRQ_RXQCHANNEL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRQ_RXQCHANNEL_SHIFT)) & SPDIF_SRQ_RXQCHANNEL_MASK)
 /*! @} */
 
 /*! @name STL - SPDIFTxLeft Register */
 /*! @{ */
-#define SPDIF_STL_TXDATALEFT_MASK                (0xFFFFFFU)
-#define SPDIF_STL_TXDATALEFT_SHIFT               (0U)
-#define SPDIF_STL_TXDATALEFT(x)                  (((uint32_t)(((uint32_t)(x)) << SPDIF_STL_TXDATALEFT_SHIFT)) & SPDIF_STL_TXDATALEFT_MASK)
+#define SPDIF_STL_TXDATALEFT_MASK  (0xFFFFFFU)
+#define SPDIF_STL_TXDATALEFT_SHIFT (0U)
+#define SPDIF_STL_TXDATALEFT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STL_TXDATALEFT_SHIFT)) & SPDIF_STL_TXDATALEFT_MASK)
 /*! @} */
 
 /*! @name STR - SPDIFTxRight Register */
 /*! @{ */
-#define SPDIF_STR_TXDATARIGHT_MASK               (0xFFFFFFU)
-#define SPDIF_STR_TXDATARIGHT_SHIFT              (0U)
-#define SPDIF_STR_TXDATARIGHT(x)                 (((uint32_t)(((uint32_t)(x)) << SPDIF_STR_TXDATARIGHT_SHIFT)) & SPDIF_STR_TXDATARIGHT_MASK)
+#define SPDIF_STR_TXDATARIGHT_MASK  (0xFFFFFFU)
+#define SPDIF_STR_TXDATARIGHT_SHIFT (0U)
+#define SPDIF_STR_TXDATARIGHT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STR_TXDATARIGHT_SHIFT)) & SPDIF_STR_TXDATARIGHT_MASK)
 /*! @} */
 
 /*! @name STCSCH - SPDIFTxCChannelCons_h Register */
 /*! @{ */
-#define SPDIF_STCSCH_TXCCHANNELCONS_H_MASK       (0xFFFFFFU)
-#define SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT      (0U)
-#define SPDIF_STCSCH_TXCCHANNELCONS_H(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT)) & SPDIF_STCSCH_TXCCHANNELCONS_H_MASK)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H_MASK  (0xFFFFFFU)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT (0U)
+#define SPDIF_STCSCH_TXCCHANNELCONS_H(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCH_TXCCHANNELCONS_H_SHIFT)) & SPDIF_STCSCH_TXCCHANNELCONS_H_MASK)
 /*! @} */
 
 /*! @name STCSCL - SPDIFTxCChannelCons_l Register */
 /*! @{ */
-#define SPDIF_STCSCL_TXCCHANNELCONS_L_MASK       (0xFFFFFFU)
-#define SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT      (0U)
-#define SPDIF_STCSCL_TXCCHANNELCONS_L(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT)) & SPDIF_STCSCL_TXCCHANNELCONS_L_MASK)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L_MASK  (0xFFFFFFU)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT (0U)
+#define SPDIF_STCSCL_TXCCHANNELCONS_L(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STCSCL_TXCCHANNELCONS_L_SHIFT)) & SPDIF_STCSCL_TXCCHANNELCONS_L_MASK)
 /*! @} */
 
 /*! @name SRFM - FreqMeas Register */
 /*! @{ */
-#define SPDIF_SRFM_FREQMEAS_MASK                 (0xFFFFFFU)
-#define SPDIF_SRFM_FREQMEAS_SHIFT                (0U)
-#define SPDIF_SRFM_FREQMEAS(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_SRFM_FREQMEAS_SHIFT)) & SPDIF_SRFM_FREQMEAS_MASK)
+#define SPDIF_SRFM_FREQMEAS_MASK  (0xFFFFFFU)
+#define SPDIF_SRFM_FREQMEAS_SHIFT (0U)
+#define SPDIF_SRFM_FREQMEAS(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_SRFM_FREQMEAS_SHIFT)) & SPDIF_SRFM_FREQMEAS_MASK)
 /*! @} */
 
 /*! @name STC - SPDIFTxClk Register */
 /*! @{ */
-#define SPDIF_STC_TXCLK_DF_MASK                  (0x7FU)
-#define SPDIF_STC_TXCLK_DF_SHIFT                 (0U)
-#define SPDIF_STC_TXCLK_DF(x)                    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_DF_SHIFT)) & SPDIF_STC_TXCLK_DF_MASK)
-#define SPDIF_STC_TX_ALL_CLK_EN_MASK             (0x80U)
-#define SPDIF_STC_TX_ALL_CLK_EN_SHIFT            (7U)
-#define SPDIF_STC_TX_ALL_CLK_EN(x)               (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TX_ALL_CLK_EN_SHIFT)) & SPDIF_STC_TX_ALL_CLK_EN_MASK)
-#define SPDIF_STC_TXCLK_SOURCE_MASK              (0x700U)
-#define SPDIF_STC_TXCLK_SOURCE_SHIFT             (8U)
-#define SPDIF_STC_TXCLK_SOURCE(x)                (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_SOURCE_SHIFT)) & SPDIF_STC_TXCLK_SOURCE_MASK)
-#define SPDIF_STC_SYSCLK_DF_MASK                 (0xFF800U)
-#define SPDIF_STC_SYSCLK_DF_SHIFT                (11U)
-#define SPDIF_STC_SYSCLK_DF(x)                   (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_SYSCLK_DF_SHIFT)) & SPDIF_STC_SYSCLK_DF_MASK)
+#define SPDIF_STC_TXCLK_DF_MASK       (0x7FU)
+#define SPDIF_STC_TXCLK_DF_SHIFT      (0U)
+#define SPDIF_STC_TXCLK_DF(x)         (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_DF_SHIFT)) & SPDIF_STC_TXCLK_DF_MASK)
+#define SPDIF_STC_TX_ALL_CLK_EN_MASK  (0x80U)
+#define SPDIF_STC_TX_ALL_CLK_EN_SHIFT (7U)
+#define SPDIF_STC_TX_ALL_CLK_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TX_ALL_CLK_EN_SHIFT)) & SPDIF_STC_TX_ALL_CLK_EN_MASK)
+#define SPDIF_STC_TXCLK_SOURCE_MASK  (0x700U)
+#define SPDIF_STC_TXCLK_SOURCE_SHIFT (8U)
+#define SPDIF_STC_TXCLK_SOURCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_TXCLK_SOURCE_SHIFT)) & SPDIF_STC_TXCLK_SOURCE_MASK)
+#define SPDIF_STC_SYSCLK_DF_MASK  (0xFF800U)
+#define SPDIF_STC_SYSCLK_DF_SHIFT (11U)
+#define SPDIF_STC_SYSCLK_DF(x)    (((uint32_t)(((uint32_t)(x)) << SPDIF_STC_SYSCLK_DF_SHIFT)) & SPDIF_STC_SYSCLK_DF_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group SPDIF_Register_Masks */
 
-
 /* SPDIF - Peripheral instance base addresses */
 /** Peripheral SPDIF base address */
-#define SPDIF_BASE                               (0x40380000u)
+#define SPDIF_BASE (0x40380000u)
 /** Peripheral SPDIF base pointer */
-#define SPDIF                                    ((SPDIF_Type *)SPDIF_BASE)
+#define SPDIF ((SPDIF_Type *)SPDIF_BASE)
 /** Array initializer of SPDIF peripheral base addresses */
-#define SPDIF_BASE_ADDRS                         { SPDIF_BASE }
+#define SPDIF_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        SPDIF_BASE                                                                                                     \
+    }
 /** Array initializer of SPDIF peripheral base pointers */
-#define SPDIF_BASE_PTRS                          { SPDIF }
+#define SPDIF_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        SPDIF                                                                                                          \
+    }
 /** Interrupt vectors for the SPDIF peripheral type */
-#define SPDIF_IRQS                               { SPDIF_IRQn }
+#define SPDIF_IRQS                                                                                                     \
+    {                                                                                                                  \
+        SPDIF_IRQn                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group SPDIF_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- SRC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20125,13 +22947,15 @@ typedef struct {
  */
 
 /** SRC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t SCR;                               /**< SRC Control Register, offset: 0x0 */
-  __I  uint32_t SBMR1;                             /**< SRC Boot Mode Register 1, offset: 0x4 */
-  __IO uint32_t SRSR;                              /**< SRC Reset Status Register, offset: 0x8 */
-       uint8_t RESERVED_0[16];
-  __I  uint32_t SBMR2;                             /**< SRC Boot Mode Register 2, offset: 0x1C */
-  __IO uint32_t GPR[10];                           /**< SRC General Purpose Register 1..SRC General Purpose Register 10, array offset: 0x20, array step: 0x4 */
+typedef struct
+{
+    __IO uint32_t SCR;  /**< SRC Control Register, offset: 0x0 */
+    __I uint32_t SBMR1; /**< SRC Boot Mode Register 1, offset: 0x4 */
+    __IO uint32_t SRSR; /**< SRC Reset Status Register, offset: 0x8 */
+    uint8_t RESERVED_0[16];
+    __I uint32_t SBMR2;    /**< SRC Boot Mode Register 2, offset: 0x1C */
+    __IO uint32_t GPR[10]; /**< SRC General Purpose Register 1..SRC General Purpose Register 10, array offset: 0x20,
+                              array step: 0x4 */
 } SRC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20145,148 +22969,165 @@ typedef struct {
 
 /*! @name SCR - SRC Control Register */
 /*! @{ */
-#define SRC_SCR_MASK_WDOG_RST_MASK               (0x780U)
-#define SRC_SCR_MASK_WDOG_RST_SHIFT              (7U)
-#define SRC_SCR_MASK_WDOG_RST(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG_RST_SHIFT)) & SRC_SCR_MASK_WDOG_RST_MASK)
-#define SRC_SCR_CORE0_RST_MASK                   (0x2000U)
-#define SRC_SCR_CORE0_RST_SHIFT                  (13U)
-#define SRC_SCR_CORE0_RST(x)                     (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_RST_SHIFT)) & SRC_SCR_CORE0_RST_MASK)
-#define SRC_SCR_CORE0_DBG_RST_MASK               (0x20000U)
-#define SRC_SCR_CORE0_DBG_RST_SHIFT              (17U)
-#define SRC_SCR_CORE0_DBG_RST(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_DBG_RST_SHIFT)) & SRC_SCR_CORE0_DBG_RST_MASK)
-#define SRC_SCR_DBG_RST_MSK_PG_MASK              (0x2000000U)
-#define SRC_SCR_DBG_RST_MSK_PG_SHIFT             (25U)
-#define SRC_SCR_DBG_RST_MSK_PG(x)                (((uint32_t)(((uint32_t)(x)) << SRC_SCR_DBG_RST_MSK_PG_SHIFT)) & SRC_SCR_DBG_RST_MSK_PG_MASK)
-#define SRC_SCR_MASK_WDOG3_RST_MASK              (0xF0000000U)
-#define SRC_SCR_MASK_WDOG3_RST_SHIFT             (28U)
-#define SRC_SCR_MASK_WDOG3_RST(x)                (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG3_RST_SHIFT)) & SRC_SCR_MASK_WDOG3_RST_MASK)
+#define SRC_SCR_MASK_WDOG_RST_MASK  (0x780U)
+#define SRC_SCR_MASK_WDOG_RST_SHIFT (7U)
+#define SRC_SCR_MASK_WDOG_RST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG_RST_SHIFT)) & SRC_SCR_MASK_WDOG_RST_MASK)
+#define SRC_SCR_CORE0_RST_MASK      (0x2000U)
+#define SRC_SCR_CORE0_RST_SHIFT     (13U)
+#define SRC_SCR_CORE0_RST(x)        (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_RST_SHIFT)) & SRC_SCR_CORE0_RST_MASK)
+#define SRC_SCR_CORE0_DBG_RST_MASK  (0x20000U)
+#define SRC_SCR_CORE0_DBG_RST_SHIFT (17U)
+#define SRC_SCR_CORE0_DBG_RST(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_CORE0_DBG_RST_SHIFT)) & SRC_SCR_CORE0_DBG_RST_MASK)
+#define SRC_SCR_DBG_RST_MSK_PG_MASK  (0x2000000U)
+#define SRC_SCR_DBG_RST_MSK_PG_SHIFT (25U)
+#define SRC_SCR_DBG_RST_MSK_PG(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_DBG_RST_MSK_PG_SHIFT)) & SRC_SCR_DBG_RST_MSK_PG_MASK)
+#define SRC_SCR_MASK_WDOG3_RST_MASK  (0xF0000000U)
+#define SRC_SCR_MASK_WDOG3_RST_SHIFT (28U)
+#define SRC_SCR_MASK_WDOG3_RST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SCR_MASK_WDOG3_RST_SHIFT)) & SRC_SCR_MASK_WDOG3_RST_MASK)
 /*! @} */
 
 /*! @name SBMR1 - SRC Boot Mode Register 1 */
 /*! @{ */
-#define SRC_SBMR1_BOOT_CFG1_MASK                 (0xFFU)
-#define SRC_SBMR1_BOOT_CFG1_SHIFT                (0U)
-#define SRC_SBMR1_BOOT_CFG1(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG1_SHIFT)) & SRC_SBMR1_BOOT_CFG1_MASK)
-#define SRC_SBMR1_BOOT_CFG2_MASK                 (0xFF00U)
-#define SRC_SBMR1_BOOT_CFG2_SHIFT                (8U)
-#define SRC_SBMR1_BOOT_CFG2(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG2_SHIFT)) & SRC_SBMR1_BOOT_CFG2_MASK)
-#define SRC_SBMR1_BOOT_CFG3_MASK                 (0xFF0000U)
-#define SRC_SBMR1_BOOT_CFG3_SHIFT                (16U)
-#define SRC_SBMR1_BOOT_CFG3(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG3_SHIFT)) & SRC_SBMR1_BOOT_CFG3_MASK)
-#define SRC_SBMR1_BOOT_CFG4_MASK                 (0xFF000000U)
-#define SRC_SBMR1_BOOT_CFG4_SHIFT                (24U)
-#define SRC_SBMR1_BOOT_CFG4(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG4_SHIFT)) & SRC_SBMR1_BOOT_CFG4_MASK)
+#define SRC_SBMR1_BOOT_CFG1_MASK  (0xFFU)
+#define SRC_SBMR1_BOOT_CFG1_SHIFT (0U)
+#define SRC_SBMR1_BOOT_CFG1(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG1_SHIFT)) & SRC_SBMR1_BOOT_CFG1_MASK)
+#define SRC_SBMR1_BOOT_CFG2_MASK  (0xFF00U)
+#define SRC_SBMR1_BOOT_CFG2_SHIFT (8U)
+#define SRC_SBMR1_BOOT_CFG2(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG2_SHIFT)) & SRC_SBMR1_BOOT_CFG2_MASK)
+#define SRC_SBMR1_BOOT_CFG3_MASK  (0xFF0000U)
+#define SRC_SBMR1_BOOT_CFG3_SHIFT (16U)
+#define SRC_SBMR1_BOOT_CFG3(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG3_SHIFT)) & SRC_SBMR1_BOOT_CFG3_MASK)
+#define SRC_SBMR1_BOOT_CFG4_MASK  (0xFF000000U)
+#define SRC_SBMR1_BOOT_CFG4_SHIFT (24U)
+#define SRC_SBMR1_BOOT_CFG4(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR1_BOOT_CFG4_SHIFT)) & SRC_SBMR1_BOOT_CFG4_MASK)
 /*! @} */
 
 /*! @name SRSR - SRC Reset Status Register */
 /*! @{ */
-#define SRC_SRSR_IPP_RESET_B_MASK                (0x1U)
-#define SRC_SRSR_IPP_RESET_B_SHIFT               (0U)
-#define SRC_SRSR_IPP_RESET_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_RESET_B_SHIFT)) & SRC_SRSR_IPP_RESET_B_MASK)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ_MASK         (0x2U)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT        (1U)
-#define SRC_SRSR_LOCKUP_SYSRESETREQ(x)           (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT)) & SRC_SRSR_LOCKUP_SYSRESETREQ_MASK)
-#define SRC_SRSR_CSU_RESET_B_MASK                (0x4U)
-#define SRC_SRSR_CSU_RESET_B_SHIFT               (2U)
-#define SRC_SRSR_CSU_RESET_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_CSU_RESET_B_SHIFT)) & SRC_SRSR_CSU_RESET_B_MASK)
-#define SRC_SRSR_IPP_USER_RESET_B_MASK           (0x8U)
-#define SRC_SRSR_IPP_USER_RESET_B_SHIFT          (3U)
-#define SRC_SRSR_IPP_USER_RESET_B(x)             (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_USER_RESET_B_SHIFT)) & SRC_SRSR_IPP_USER_RESET_B_MASK)
-#define SRC_SRSR_WDOG_RST_B_MASK                 (0x10U)
-#define SRC_SRSR_WDOG_RST_B_SHIFT                (4U)
-#define SRC_SRSR_WDOG_RST_B(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG_RST_B_SHIFT)) & SRC_SRSR_WDOG_RST_B_MASK)
-#define SRC_SRSR_JTAG_RST_B_MASK                 (0x20U)
-#define SRC_SRSR_JTAG_RST_B_SHIFT                (5U)
-#define SRC_SRSR_JTAG_RST_B(x)                   (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_RST_B_SHIFT)) & SRC_SRSR_JTAG_RST_B_MASK)
-#define SRC_SRSR_JTAG_SW_RST_MASK                (0x40U)
-#define SRC_SRSR_JTAG_SW_RST_SHIFT               (6U)
-#define SRC_SRSR_JTAG_SW_RST(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_SW_RST_SHIFT)) & SRC_SRSR_JTAG_SW_RST_MASK)
-#define SRC_SRSR_WDOG3_RST_B_MASK                (0x80U)
-#define SRC_SRSR_WDOG3_RST_B_SHIFT               (7U)
-#define SRC_SRSR_WDOG3_RST_B(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG3_RST_B_SHIFT)) & SRC_SRSR_WDOG3_RST_B_MASK)
-#define SRC_SRSR_TEMPSENSE_RST_B_MASK            (0x100U)
-#define SRC_SRSR_TEMPSENSE_RST_B_SHIFT           (8U)
-#define SRC_SRSR_TEMPSENSE_RST_B(x)              (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_TEMPSENSE_RST_B_SHIFT)) & SRC_SRSR_TEMPSENSE_RST_B_MASK)
+#define SRC_SRSR_IPP_RESET_B_MASK  (0x1U)
+#define SRC_SRSR_IPP_RESET_B_SHIFT (0U)
+#define SRC_SRSR_IPP_RESET_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_RESET_B_SHIFT)) & SRC_SRSR_IPP_RESET_B_MASK)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ_MASK  (0x2U)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT (1U)
+#define SRC_SRSR_LOCKUP_SYSRESETREQ(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_LOCKUP_SYSRESETREQ_SHIFT)) & SRC_SRSR_LOCKUP_SYSRESETREQ_MASK)
+#define SRC_SRSR_CSU_RESET_B_MASK  (0x4U)
+#define SRC_SRSR_CSU_RESET_B_SHIFT (2U)
+#define SRC_SRSR_CSU_RESET_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_CSU_RESET_B_SHIFT)) & SRC_SRSR_CSU_RESET_B_MASK)
+#define SRC_SRSR_IPP_USER_RESET_B_MASK  (0x8U)
+#define SRC_SRSR_IPP_USER_RESET_B_SHIFT (3U)
+#define SRC_SRSR_IPP_USER_RESET_B(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_IPP_USER_RESET_B_SHIFT)) & SRC_SRSR_IPP_USER_RESET_B_MASK)
+#define SRC_SRSR_WDOG_RST_B_MASK   (0x10U)
+#define SRC_SRSR_WDOG_RST_B_SHIFT  (4U)
+#define SRC_SRSR_WDOG_RST_B(x)     (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG_RST_B_SHIFT)) & SRC_SRSR_WDOG_RST_B_MASK)
+#define SRC_SRSR_JTAG_RST_B_MASK   (0x20U)
+#define SRC_SRSR_JTAG_RST_B_SHIFT  (5U)
+#define SRC_SRSR_JTAG_RST_B(x)     (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_RST_B_SHIFT)) & SRC_SRSR_JTAG_RST_B_MASK)
+#define SRC_SRSR_JTAG_SW_RST_MASK  (0x40U)
+#define SRC_SRSR_JTAG_SW_RST_SHIFT (6U)
+#define SRC_SRSR_JTAG_SW_RST(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_JTAG_SW_RST_SHIFT)) & SRC_SRSR_JTAG_SW_RST_MASK)
+#define SRC_SRSR_WDOG3_RST_B_MASK  (0x80U)
+#define SRC_SRSR_WDOG3_RST_B_SHIFT (7U)
+#define SRC_SRSR_WDOG3_RST_B(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_WDOG3_RST_B_SHIFT)) & SRC_SRSR_WDOG3_RST_B_MASK)
+#define SRC_SRSR_TEMPSENSE_RST_B_MASK  (0x100U)
+#define SRC_SRSR_TEMPSENSE_RST_B_SHIFT (8U)
+#define SRC_SRSR_TEMPSENSE_RST_B(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SRSR_TEMPSENSE_RST_B_SHIFT)) & SRC_SRSR_TEMPSENSE_RST_B_MASK)
 /*! @} */
 
 /*! @name SBMR2 - SRC Boot Mode Register 2 */
 /*! @{ */
-#define SRC_SBMR2_SEC_CONFIG_MASK                (0x3U)
-#define SRC_SBMR2_SEC_CONFIG_SHIFT               (0U)
-#define SRC_SBMR2_SEC_CONFIG(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_SEC_CONFIG_SHIFT)) & SRC_SBMR2_SEC_CONFIG_MASK)
-#define SRC_SBMR2_DIR_BT_DIS_MASK                (0x8U)
-#define SRC_SBMR2_DIR_BT_DIS_SHIFT               (3U)
-#define SRC_SBMR2_DIR_BT_DIS(x)                  (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_DIR_BT_DIS_SHIFT)) & SRC_SBMR2_DIR_BT_DIS_MASK)
-#define SRC_SBMR2_BT_FUSE_SEL_MASK               (0x10U)
-#define SRC_SBMR2_BT_FUSE_SEL_SHIFT              (4U)
-#define SRC_SBMR2_BT_FUSE_SEL(x)                 (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BT_FUSE_SEL_SHIFT)) & SRC_SBMR2_BT_FUSE_SEL_MASK)
-#define SRC_SBMR2_BMOD_MASK                      (0x3000000U)
-#define SRC_SBMR2_BMOD_SHIFT                     (24U)
-#define SRC_SBMR2_BMOD(x)                        (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BMOD_SHIFT)) & SRC_SBMR2_BMOD_MASK)
+#define SRC_SBMR2_SEC_CONFIG_MASK  (0x3U)
+#define SRC_SBMR2_SEC_CONFIG_SHIFT (0U)
+#define SRC_SBMR2_SEC_CONFIG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_SEC_CONFIG_SHIFT)) & SRC_SBMR2_SEC_CONFIG_MASK)
+#define SRC_SBMR2_DIR_BT_DIS_MASK  (0x8U)
+#define SRC_SBMR2_DIR_BT_DIS_SHIFT (3U)
+#define SRC_SBMR2_DIR_BT_DIS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_DIR_BT_DIS_SHIFT)) & SRC_SBMR2_DIR_BT_DIS_MASK)
+#define SRC_SBMR2_BT_FUSE_SEL_MASK  (0x10U)
+#define SRC_SBMR2_BT_FUSE_SEL_SHIFT (4U)
+#define SRC_SBMR2_BT_FUSE_SEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BT_FUSE_SEL_SHIFT)) & SRC_SBMR2_BT_FUSE_SEL_MASK)
+#define SRC_SBMR2_BMOD_MASK  (0x3000000U)
+#define SRC_SBMR2_BMOD_SHIFT (24U)
+#define SRC_SBMR2_BMOD(x)    (((uint32_t)(((uint32_t)(x)) << SRC_SBMR2_BMOD_SHIFT)) & SRC_SBMR2_BMOD_MASK)
 /*! @} */
 
 /*! @name GPR - SRC General Purpose Register 1..SRC General Purpose Register 10 */
 /*! @{ */
-#define SRC_GPR_PERSISTENT_ARG0_MASK             (0xFFFFFFFFU)
-#define SRC_GPR_PERSISTENT_ARG0_SHIFT            (0U)
-#define SRC_GPR_PERSISTENT_ARG0(x)               (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ARG0_SHIFT)) & SRC_GPR_PERSISTENT_ARG0_MASK)
-#define SRC_GPR_PERSISTENT_ENTRY0_MASK           (0xFFFFFFFFU)
-#define SRC_GPR_PERSISTENT_ENTRY0_SHIFT          (0U)
-#define SRC_GPR_PERSISTENT_ENTRY0(x)             (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ENTRY0_SHIFT)) & SRC_GPR_PERSISTENT_ENTRY0_MASK)
+#define SRC_GPR_PERSISTENT_ARG0_MASK  (0xFFFFFFFFU)
+#define SRC_GPR_PERSISTENT_ARG0_SHIFT (0U)
+#define SRC_GPR_PERSISTENT_ARG0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ARG0_SHIFT)) & SRC_GPR_PERSISTENT_ARG0_MASK)
+#define SRC_GPR_PERSISTENT_ENTRY0_MASK  (0xFFFFFFFFU)
+#define SRC_GPR_PERSISTENT_ENTRY0_SHIFT (0U)
+#define SRC_GPR_PERSISTENT_ENTRY0(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << SRC_GPR_PERSISTENT_ENTRY0_SHIFT)) & SRC_GPR_PERSISTENT_ENTRY0_MASK)
 /*! @} */
 
 /* The count of SRC_GPR */
-#define SRC_GPR_COUNT                            (10U)
-
+#define SRC_GPR_COUNT (10U)
 
 /*!
  * @}
  */ /* end of group SRC_Register_Masks */
 
-
 /* SRC - Peripheral instance base addresses */
 /** Peripheral SRC base address */
-#define SRC_BASE                                 (0x400F8000u)
+#define SRC_BASE (0x400F8000u)
 /** Peripheral SRC base pointer */
-#define SRC                                      ((SRC_Type *)SRC_BASE)
+#define SRC ((SRC_Type *)SRC_BASE)
 /** Array initializer of SRC peripheral base addresses */
-#define SRC_BASE_ADDRS                           { SRC_BASE }
+#define SRC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        SRC_BASE                                                                                                       \
+    }
 /** Array initializer of SRC peripheral base pointers */
-#define SRC_BASE_PTRS                            { SRC }
+#define SRC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        SRC                                                                                                            \
+    }
 /** Interrupt vectors for the SRC peripheral type */
-#define SRC_IRQS                                 { SRC_IRQn }
+#define SRC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        SRC_IRQn                                                                                                       \
+    }
 /* Backward compatibility */
-#define SRC_SCR_MWDR_MASK                      SRC_SCR_MASK_WDOG_RST_MASK
-#define SRC_SCR_MWDR_SHIFT                     SRC_SCR_MASK_WDOG_RST_SHIFT
-#define SRC_SCR_MWDR(x)                        SRC_SCR_MASK_WDOG_RST(x)
-#define SRC_SRSR_WDOG_MASK                     SRC_SRSR_WDOG_RST_B_MASK
-#define SRC_SRSR_WDOG_SHIFT                    SRC_SRSR_WDOG_RST_B_SHIFT
-#define SRC_SRSR_WDOG(x)                       SRC_SRSR_WDOG_RST_B(x)
-#define SRC_SRSR_JTAG_MASK                     SRC_SRSR_JTAG_RST_B_MASK
-#define SRC_SRSR_JTAG_SHIFT                    SRC_SRSR_JTAG_RST_B_SHIFT
-#define SRC_SRSR_JTAG(x)                       SRC_SRSR_JTAG_RST_B(x)
-#define SRC_SRSR_SJC_MASK                      SRC_SRSR_JTAG_SW_RST_MASK
-#define SRC_SRSR_SJC_SHIFT                     SRC_SRSR_JTAG_SW_RST_SHIFT
-#define SRC_SRSR_SJC(x)                        SRC_SRSR_JTAG_SW_RST(x)
-#define SRC_SRSR_TSR_MASK                      SRC_SRSR_TEMPSENSE_RST_B_MASK
-#define SRC_SRSR_TSR_SHIFT                     SRC_SRSR_TEMPSENSE_RST_B_SHIFT
-#define SRC_SRSR_TSR(x)                        SRC_SRSR_TEMPSENSE_RST_B(x)
+#define SRC_SCR_MWDR_MASK   SRC_SCR_MASK_WDOG_RST_MASK
+#define SRC_SCR_MWDR_SHIFT  SRC_SCR_MASK_WDOG_RST_SHIFT
+#define SRC_SCR_MWDR(x)     SRC_SCR_MASK_WDOG_RST(x)
+#define SRC_SRSR_WDOG_MASK  SRC_SRSR_WDOG_RST_B_MASK
+#define SRC_SRSR_WDOG_SHIFT SRC_SRSR_WDOG_RST_B_SHIFT
+#define SRC_SRSR_WDOG(x)    SRC_SRSR_WDOG_RST_B(x)
+#define SRC_SRSR_JTAG_MASK  SRC_SRSR_JTAG_RST_B_MASK
+#define SRC_SRSR_JTAG_SHIFT SRC_SRSR_JTAG_RST_B_SHIFT
+#define SRC_SRSR_JTAG(x)    SRC_SRSR_JTAG_RST_B(x)
+#define SRC_SRSR_SJC_MASK   SRC_SRSR_JTAG_SW_RST_MASK
+#define SRC_SRSR_SJC_SHIFT  SRC_SRSR_JTAG_SW_RST_SHIFT
+#define SRC_SRSR_SJC(x)     SRC_SRSR_JTAG_SW_RST(x)
+#define SRC_SRSR_TSR_MASK   SRC_SRSR_TEMPSENSE_RST_B_MASK
+#define SRC_SRSR_TSR_SHIFT  SRC_SRSR_TEMPSENSE_RST_B_SHIFT
+#define SRC_SRSR_TSR(x)     SRC_SRSR_TEMPSENSE_RST_B(x)
 /* Extra definition */
-#define SRC_SRSR_W1C_BITS_MASK  ( SRC_SRSR_WDOG3_RST_B_MASK \
-                                | SRC_SRSR_JTAG_SW_RST_MASK \
-                                | SRC_SRSR_JTAG_RST_B_MASK \
-                                | SRC_SRSR_WDOG_RST_B_MASK \
-                                | SRC_SRSR_IPP_USER_RESET_B_MASK \
-                                | SRC_SRSR_CSU_RESET_B_MASK \
-                                | SRC_SRSR_LOCKUP_SYSRESETREQ_MASK \
-                                | SRC_SRSR_IPP_RESET_B_MASK)
-
+#define SRC_SRSR_W1C_BITS_MASK                                                                                         \
+    (SRC_SRSR_WDOG3_RST_B_MASK | SRC_SRSR_JTAG_SW_RST_MASK | SRC_SRSR_JTAG_RST_B_MASK | SRC_SRSR_WDOG_RST_B_MASK |     \
+     SRC_SRSR_IPP_USER_RESET_B_MASK | SRC_SRSR_CSU_RESET_B_MASK | SRC_SRSR_LOCKUP_SYSRESETREQ_MASK |                   \
+     SRC_SRSR_IPP_RESET_B_MASK)
 
 /*!
  * @}
  */ /* end of group SRC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TEMPMON Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20297,21 +23138,22 @@ typedef struct {
  */
 
 /** TEMPMON - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[384];
-  __IO uint32_t TEMPSENSE0;                        /**< Tempsensor Control Register 0, offset: 0x180 */
-  __IO uint32_t TEMPSENSE0_SET;                    /**< Tempsensor Control Register 0, offset: 0x184 */
-  __IO uint32_t TEMPSENSE0_CLR;                    /**< Tempsensor Control Register 0, offset: 0x188 */
-  __IO uint32_t TEMPSENSE0_TOG;                    /**< Tempsensor Control Register 0, offset: 0x18C */
-  __IO uint32_t TEMPSENSE1;                        /**< Tempsensor Control Register 1, offset: 0x190 */
-  __IO uint32_t TEMPSENSE1_SET;                    /**< Tempsensor Control Register 1, offset: 0x194 */
-  __IO uint32_t TEMPSENSE1_CLR;                    /**< Tempsensor Control Register 1, offset: 0x198 */
-  __IO uint32_t TEMPSENSE1_TOG;                    /**< Tempsensor Control Register 1, offset: 0x19C */
-       uint8_t RESERVED_1[240];
-  __IO uint32_t TEMPSENSE2;                        /**< Tempsensor Control Register 2, offset: 0x290 */
-  __IO uint32_t TEMPSENSE2_SET;                    /**< Tempsensor Control Register 2, offset: 0x294 */
-  __IO uint32_t TEMPSENSE2_CLR;                    /**< Tempsensor Control Register 2, offset: 0x298 */
-  __IO uint32_t TEMPSENSE2_TOG;                    /**< Tempsensor Control Register 2, offset: 0x29C */
+typedef struct
+{
+    uint8_t RESERVED_0[384];
+    __IO uint32_t TEMPSENSE0;     /**< Tempsensor Control Register 0, offset: 0x180 */
+    __IO uint32_t TEMPSENSE0_SET; /**< Tempsensor Control Register 0, offset: 0x184 */
+    __IO uint32_t TEMPSENSE0_CLR; /**< Tempsensor Control Register 0, offset: 0x188 */
+    __IO uint32_t TEMPSENSE0_TOG; /**< Tempsensor Control Register 0, offset: 0x18C */
+    __IO uint32_t TEMPSENSE1;     /**< Tempsensor Control Register 1, offset: 0x190 */
+    __IO uint32_t TEMPSENSE1_SET; /**< Tempsensor Control Register 1, offset: 0x194 */
+    __IO uint32_t TEMPSENSE1_CLR; /**< Tempsensor Control Register 1, offset: 0x198 */
+    __IO uint32_t TEMPSENSE1_TOG; /**< Tempsensor Control Register 1, offset: 0x19C */
+    uint8_t RESERVED_1[240];
+    __IO uint32_t TEMPSENSE2;     /**< Tempsensor Control Register 2, offset: 0x290 */
+    __IO uint32_t TEMPSENSE2_SET; /**< Tempsensor Control Register 2, offset: 0x294 */
+    __IO uint32_t TEMPSENSE2_CLR; /**< Tempsensor Control Register 2, offset: 0x298 */
+    __IO uint32_t TEMPSENSE2_TOG; /**< Tempsensor Control Register 2, offset: 0x29C */
 } TEMPMON_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20325,169 +23167,221 @@ typedef struct {
 
 /*! @name TEMPSENSE0 - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK       (0x1U)
-#define TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT      (0U)
-#define TEMPMON_TEMPSENSE0_POWER_DOWN(x)         (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK     (0x2U)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT    (1U)
-#define TEMPMON_TEMPSENSE0_MEASURE_TEMP(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_FINISHED_MASK         (0x4U)
-#define TEMPMON_TEMPSENSE0_FINISHED_SHIFT        (2U)
-#define TEMPMON_TEMPSENSE0_FINISHED(x)           (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT_MASK         (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT        (8U)
-#define TEMPMON_TEMPSENSE0_TEMP_CNT(x)           (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK      (0xFFF00000U)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT     (20U)
-#define TEMPMON_TEMPSENSE0_ALARM_VALUE(x)        (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_POWER_DOWN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK  (0x2U)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT (1U)
+#define TEMPMON_TEMPSENSE0_MEASURE_TEMP(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_FINISHED(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_TEMP_CNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK  (0xFFF00000U)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT (20U)
+#define TEMPMON_TEMPSENSE0_ALARM_VALUE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_SET - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_SET_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_SET_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_SET_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_SET_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_SET_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_SET_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_SET_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_SET_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_SET_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_SET_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_CLR - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_CLR_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_CLR_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_CLR_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_CLR_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_CLR_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_CLR_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE0_TOG - Tempsensor Control Register 0 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK   (0x1U)
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT  (0U)
-#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN(x)     (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK (0x2U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK  (0x1U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT (0U)
+#define TEMPMON_TEMPSENSE0_TOG_POWER_DOWN(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_POWER_DOWN_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK  (0x2U)
 #define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT (1U)
-#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK     (0x4U)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT    (2U)
-#define TEMPMON_TEMPSENSE0_TOG_FINISHED(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK     (0xFFF00U)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT    (8U)
-#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE0_TOG_MEASURE_TEMP_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK  (0x4U)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT (2U)
+#define TEMPMON_TEMPSENSE0_TOG_FINISHED(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_FINISHED_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_FINISHED_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK  (0xFFF00U)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT (8U)
+#define TEMPMON_TEMPSENSE0_TOG_TEMP_CNT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_TEMP_CNT_MASK)
 #define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK  (0xFFF00000U)
 #define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT (20U)
-#define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE0_TOG_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1 - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK     (0xFFFFU)
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT    (0U)
-#define TEMPMON_TEMPSENSE1_MEASURE_FREQ(x)       (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK  (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT (0U)
+#define TEMPMON_TEMPSENSE1_MEASURE_FREQ(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_SET - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_SET_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_CLR - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_CLR_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE1_TOG - Tempsensor Control Register 1 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK (0xFFFFU)
+#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK  (0xFFFFU)
 #define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT (0U)
-#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ(x)   (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) & TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK)
+#define TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_SHIFT)) &                                      \
+     TEMPMON_TEMPSENSE1_TOG_MEASURE_FREQ_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2 - Tempsensor Control Register 2 */
 /*! @{ */
 #define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE(x)    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_SHIFT)) &                                       \
+     TEMPMON_TEMPSENSE2_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE(x)  (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_SHIFT)) &                                     \
+     TEMPMON_TEMPSENSE2_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_SET - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_SET_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_SET_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_CLR - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_CLR_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_CLR_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
 /*! @name TEMPSENSE2_TOG - Tempsensor Control Register 2 */
 /*! @{ */
-#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK (0xFFFU)
+#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK  (0xFFFU)
 #define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT (0U)
-#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK)
-#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK (0xFFF0000U)
+#define TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_SHIFT)) &                                   \
+     TEMPMON_TEMPSENSE2_TOG_LOW_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK  (0xFFF0000U)
 #define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT (16U)
-#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE(x) (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT)) & TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK)
+#define TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_SHIFT)) &                                 \
+     TEMPMON_TEMPSENSE2_TOG_PANIC_ALARM_VALUE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TEMPMON_Register_Masks */
 
-
 /* TEMPMON - Peripheral instance base addresses */
 /** Peripheral TEMPMON base address */
-#define TEMPMON_BASE                             (0x400D8000u)
+#define TEMPMON_BASE (0x400D8000u)
 /** Peripheral TEMPMON base pointer */
-#define TEMPMON                                  ((TEMPMON_Type *)TEMPMON_BASE)
+#define TEMPMON ((TEMPMON_Type *)TEMPMON_BASE)
 /** Array initializer of TEMPMON peripheral base addresses */
-#define TEMPMON_BASE_ADDRS                       { TEMPMON_BASE }
+#define TEMPMON_BASE_ADDRS                                                                                             \
+    {                                                                                                                  \
+        TEMPMON_BASE                                                                                                   \
+    }
 /** Array initializer of TEMPMON peripheral base pointers */
-#define TEMPMON_BASE_PTRS                        { TEMPMON }
+#define TEMPMON_BASE_PTRS                                                                                              \
+    {                                                                                                                  \
+        TEMPMON                                                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group TEMPMON_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TMR Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20498,24 +23392,28 @@ typedef struct {
  */
 
 /** TMR - Register Layout Typedef */
-typedef struct {
-  struct {                                         /* offset: 0x0, array step: 0x20 */
-    __IO uint16_t COMP1;                             /**< Timer Channel Compare Register 1, array offset: 0x0, array step: 0x20 */
-    __IO uint16_t COMP2;                             /**< Timer Channel Compare Register 2, array offset: 0x2, array step: 0x20 */
-    __IO uint16_t CAPT;                              /**< Timer Channel Capture Register, array offset: 0x4, array step: 0x20 */
-    __IO uint16_t LOAD;                              /**< Timer Channel Load Register, array offset: 0x6, array step: 0x20 */
-    __IO uint16_t HOLD;                              /**< Timer Channel Hold Register, array offset: 0x8, array step: 0x20 */
-    __IO uint16_t CNTR;                              /**< Timer Channel Counter Register, array offset: 0xA, array step: 0x20 */
-    __IO uint16_t CTRL;                              /**< Timer Channel Control Register, array offset: 0xC, array step: 0x20 */
-    __IO uint16_t SCTRL;                             /**< Timer Channel Status and Control Register, array offset: 0xE, array step: 0x20 */
-    __IO uint16_t CMPLD1;                            /**< Timer Channel Comparator Load Register 1, array offset: 0x10, array step: 0x20 */
-    __IO uint16_t CMPLD2;                            /**< Timer Channel Comparator Load Register 2, array offset: 0x12, array step: 0x20 */
-    __IO uint16_t CSCTRL;                            /**< Timer Channel Comparator Status and Control Register, array offset: 0x14, array step: 0x20 */
-    __IO uint16_t FILT;                              /**< Timer Channel Input Filter Register, array offset: 0x16, array step: 0x20 */
-    __IO uint16_t DMA;                               /**< Timer Channel DMA Enable Register, array offset: 0x18, array step: 0x20 */
-         uint8_t RESERVED_0[4];
-    __IO uint16_t ENBL;                              /**< Timer Channel Enable Register, array offset: 0x1E, array step: 0x20, this item is not available for all array instances */
-  } CHANNEL[4];
+typedef struct
+{
+    struct
+    {                         /* offset: 0x0, array step: 0x20 */
+        __IO uint16_t COMP1;  /**< Timer Channel Compare Register 1, array offset: 0x0, array step: 0x20 */
+        __IO uint16_t COMP2;  /**< Timer Channel Compare Register 2, array offset: 0x2, array step: 0x20 */
+        __IO uint16_t CAPT;   /**< Timer Channel Capture Register, array offset: 0x4, array step: 0x20 */
+        __IO uint16_t LOAD;   /**< Timer Channel Load Register, array offset: 0x6, array step: 0x20 */
+        __IO uint16_t HOLD;   /**< Timer Channel Hold Register, array offset: 0x8, array step: 0x20 */
+        __IO uint16_t CNTR;   /**< Timer Channel Counter Register, array offset: 0xA, array step: 0x20 */
+        __IO uint16_t CTRL;   /**< Timer Channel Control Register, array offset: 0xC, array step: 0x20 */
+        __IO uint16_t SCTRL;  /**< Timer Channel Status and Control Register, array offset: 0xE, array step: 0x20 */
+        __IO uint16_t CMPLD1; /**< Timer Channel Comparator Load Register 1, array offset: 0x10, array step: 0x20 */
+        __IO uint16_t CMPLD2; /**< Timer Channel Comparator Load Register 2, array offset: 0x12, array step: 0x20 */
+        __IO uint16_t
+            CSCTRL; /**< Timer Channel Comparator Status and Control Register, array offset: 0x14, array step: 0x20 */
+        __IO uint16_t FILT; /**< Timer Channel Input Filter Register, array offset: 0x16, array step: 0x20 */
+        __IO uint16_t DMA;  /**< Timer Channel DMA Enable Register, array offset: 0x18, array step: 0x20 */
+        uint8_t RESERVED_0[4];
+        __IO uint16_t ENBL; /**< Timer Channel Enable Register, array offset: 0x1E, array step: 0x20, this item is not
+                               available for all array instances */
+    } CHANNEL[4];
 } TMR_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20529,284 +23427,295 @@ typedef struct {
 
 /*! @name COMP1 - Timer Channel Compare Register 1 */
 /*! @{ */
-#define TMR_COMP1_COMPARISON_1_MASK              (0xFFFFU)
-#define TMR_COMP1_COMPARISON_1_SHIFT             (0U)
-#define TMR_COMP1_COMPARISON_1(x)                (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK)
+#define TMR_COMP1_COMPARISON_1_MASK  (0xFFFFU)
+#define TMR_COMP1_COMPARISON_1_SHIFT (0U)
+#define TMR_COMP1_COMPARISON_1(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_COMP1_COMPARISON_1_SHIFT)) & TMR_COMP1_COMPARISON_1_MASK)
 /*! @} */
 
 /* The count of TMR_COMP1 */
-#define TMR_COMP1_COUNT                          (4U)
+#define TMR_COMP1_COUNT (4U)
 
 /*! @name COMP2 - Timer Channel Compare Register 2 */
 /*! @{ */
-#define TMR_COMP2_COMPARISON_2_MASK              (0xFFFFU)
-#define TMR_COMP2_COMPARISON_2_SHIFT             (0U)
-#define TMR_COMP2_COMPARISON_2(x)                (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK)
+#define TMR_COMP2_COMPARISON_2_MASK  (0xFFFFU)
+#define TMR_COMP2_COMPARISON_2_SHIFT (0U)
+#define TMR_COMP2_COMPARISON_2(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_COMP2_COMPARISON_2_SHIFT)) & TMR_COMP2_COMPARISON_2_MASK)
 /*! @} */
 
 /* The count of TMR_COMP2 */
-#define TMR_COMP2_COUNT                          (4U)
+#define TMR_COMP2_COUNT (4U)
 
 /*! @name CAPT - Timer Channel Capture Register */
 /*! @{ */
-#define TMR_CAPT_CAPTURE_MASK                    (0xFFFFU)
-#define TMR_CAPT_CAPTURE_SHIFT                   (0U)
-#define TMR_CAPT_CAPTURE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK)
+#define TMR_CAPT_CAPTURE_MASK  (0xFFFFU)
+#define TMR_CAPT_CAPTURE_SHIFT (0U)
+#define TMR_CAPT_CAPTURE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CAPT_CAPTURE_SHIFT)) & TMR_CAPT_CAPTURE_MASK)
 /*! @} */
 
 /* The count of TMR_CAPT */
-#define TMR_CAPT_COUNT                           (4U)
+#define TMR_CAPT_COUNT (4U)
 
 /*! @name LOAD - Timer Channel Load Register */
 /*! @{ */
-#define TMR_LOAD_LOAD_MASK                       (0xFFFFU)
-#define TMR_LOAD_LOAD_SHIFT                      (0U)
-#define TMR_LOAD_LOAD(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK)
+#define TMR_LOAD_LOAD_MASK  (0xFFFFU)
+#define TMR_LOAD_LOAD_SHIFT (0U)
+#define TMR_LOAD_LOAD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_LOAD_LOAD_SHIFT)) & TMR_LOAD_LOAD_MASK)
 /*! @} */
 
 /* The count of TMR_LOAD */
-#define TMR_LOAD_COUNT                           (4U)
+#define TMR_LOAD_COUNT (4U)
 
 /*! @name HOLD - Timer Channel Hold Register */
 /*! @{ */
-#define TMR_HOLD_HOLD_MASK                       (0xFFFFU)
-#define TMR_HOLD_HOLD_SHIFT                      (0U)
-#define TMR_HOLD_HOLD(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK)
+#define TMR_HOLD_HOLD_MASK  (0xFFFFU)
+#define TMR_HOLD_HOLD_SHIFT (0U)
+#define TMR_HOLD_HOLD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_HOLD_HOLD_SHIFT)) & TMR_HOLD_HOLD_MASK)
 /*! @} */
 
 /* The count of TMR_HOLD */
-#define TMR_HOLD_COUNT                           (4U)
+#define TMR_HOLD_COUNT (4U)
 
 /*! @name CNTR - Timer Channel Counter Register */
 /*! @{ */
-#define TMR_CNTR_COUNTER_MASK                    (0xFFFFU)
-#define TMR_CNTR_COUNTER_SHIFT                   (0U)
-#define TMR_CNTR_COUNTER(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK)
+#define TMR_CNTR_COUNTER_MASK  (0xFFFFU)
+#define TMR_CNTR_COUNTER_SHIFT (0U)
+#define TMR_CNTR_COUNTER(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CNTR_COUNTER_SHIFT)) & TMR_CNTR_COUNTER_MASK)
 /*! @} */
 
 /* The count of TMR_CNTR */
-#define TMR_CNTR_COUNT                           (4U)
+#define TMR_CNTR_COUNT (4U)
 
 /*! @name CTRL - Timer Channel Control Register */
 /*! @{ */
-#define TMR_CTRL_OUTMODE_MASK                    (0x7U)
-#define TMR_CTRL_OUTMODE_SHIFT                   (0U)
-#define TMR_CTRL_OUTMODE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_OUTMODE_SHIFT)) & TMR_CTRL_OUTMODE_MASK)
-#define TMR_CTRL_COINIT_MASK                     (0x8U)
-#define TMR_CTRL_COINIT_SHIFT                    (3U)
-#define TMR_CTRL_COINIT(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_COINIT_SHIFT)) & TMR_CTRL_COINIT_MASK)
-#define TMR_CTRL_DIR_MASK                        (0x10U)
-#define TMR_CTRL_DIR_SHIFT                       (4U)
-#define TMR_CTRL_DIR(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_DIR_SHIFT)) & TMR_CTRL_DIR_MASK)
-#define TMR_CTRL_LENGTH_MASK                     (0x20U)
-#define TMR_CTRL_LENGTH_SHIFT                    (5U)
-#define TMR_CTRL_LENGTH(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_LENGTH_SHIFT)) & TMR_CTRL_LENGTH_MASK)
-#define TMR_CTRL_ONCE_MASK                       (0x40U)
-#define TMR_CTRL_ONCE_SHIFT                      (6U)
-#define TMR_CTRL_ONCE(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_ONCE_SHIFT)) & TMR_CTRL_ONCE_MASK)
-#define TMR_CTRL_SCS_MASK                        (0x180U)
-#define TMR_CTRL_SCS_SHIFT                       (7U)
-#define TMR_CTRL_SCS(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_SCS_SHIFT)) & TMR_CTRL_SCS_MASK)
-#define TMR_CTRL_PCS_MASK                        (0x1E00U)
-#define TMR_CTRL_PCS_SHIFT                       (9U)
-#define TMR_CTRL_PCS(x)                          (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_PCS_SHIFT)) & TMR_CTRL_PCS_MASK)
-#define TMR_CTRL_CM_MASK                         (0xE000U)
-#define TMR_CTRL_CM_SHIFT                        (13U)
-#define TMR_CTRL_CM(x)                           (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_CM_SHIFT)) & TMR_CTRL_CM_MASK)
+#define TMR_CTRL_OUTMODE_MASK  (0x7U)
+#define TMR_CTRL_OUTMODE_SHIFT (0U)
+#define TMR_CTRL_OUTMODE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_OUTMODE_SHIFT)) & TMR_CTRL_OUTMODE_MASK)
+#define TMR_CTRL_COINIT_MASK   (0x8U)
+#define TMR_CTRL_COINIT_SHIFT  (3U)
+#define TMR_CTRL_COINIT(x)     (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_COINIT_SHIFT)) & TMR_CTRL_COINIT_MASK)
+#define TMR_CTRL_DIR_MASK      (0x10U)
+#define TMR_CTRL_DIR_SHIFT     (4U)
+#define TMR_CTRL_DIR(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_DIR_SHIFT)) & TMR_CTRL_DIR_MASK)
+#define TMR_CTRL_LENGTH_MASK   (0x20U)
+#define TMR_CTRL_LENGTH_SHIFT  (5U)
+#define TMR_CTRL_LENGTH(x)     (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_LENGTH_SHIFT)) & TMR_CTRL_LENGTH_MASK)
+#define TMR_CTRL_ONCE_MASK     (0x40U)
+#define TMR_CTRL_ONCE_SHIFT    (6U)
+#define TMR_CTRL_ONCE(x)       (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_ONCE_SHIFT)) & TMR_CTRL_ONCE_MASK)
+#define TMR_CTRL_SCS_MASK      (0x180U)
+#define TMR_CTRL_SCS_SHIFT     (7U)
+#define TMR_CTRL_SCS(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_SCS_SHIFT)) & TMR_CTRL_SCS_MASK)
+#define TMR_CTRL_PCS_MASK      (0x1E00U)
+#define TMR_CTRL_PCS_SHIFT     (9U)
+#define TMR_CTRL_PCS(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_PCS_SHIFT)) & TMR_CTRL_PCS_MASK)
+#define TMR_CTRL_CM_MASK       (0xE000U)
+#define TMR_CTRL_CM_SHIFT      (13U)
+#define TMR_CTRL_CM(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CTRL_CM_SHIFT)) & TMR_CTRL_CM_MASK)
 /*! @} */
 
 /* The count of TMR_CTRL */
-#define TMR_CTRL_COUNT                           (4U)
+#define TMR_CTRL_COUNT (4U)
 
 /*! @name SCTRL - Timer Channel Status and Control Register */
 /*! @{ */
-#define TMR_SCTRL_OEN_MASK                       (0x1U)
-#define TMR_SCTRL_OEN_SHIFT                      (0U)
-#define TMR_SCTRL_OEN(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OEN_SHIFT)) & TMR_SCTRL_OEN_MASK)
-#define TMR_SCTRL_OPS_MASK                       (0x2U)
-#define TMR_SCTRL_OPS_SHIFT                      (1U)
-#define TMR_SCTRL_OPS(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OPS_SHIFT)) & TMR_SCTRL_OPS_MASK)
-#define TMR_SCTRL_FORCE_MASK                     (0x4U)
-#define TMR_SCTRL_FORCE_SHIFT                    (2U)
-#define TMR_SCTRL_FORCE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_FORCE_SHIFT)) & TMR_SCTRL_FORCE_MASK)
-#define TMR_SCTRL_VAL_MASK                       (0x8U)
-#define TMR_SCTRL_VAL_SHIFT                      (3U)
-#define TMR_SCTRL_VAL(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_VAL_SHIFT)) & TMR_SCTRL_VAL_MASK)
-#define TMR_SCTRL_EEOF_MASK                      (0x10U)
-#define TMR_SCTRL_EEOF_SHIFT                     (4U)
-#define TMR_SCTRL_EEOF(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_EEOF_SHIFT)) & TMR_SCTRL_EEOF_MASK)
-#define TMR_SCTRL_MSTR_MASK                      (0x20U)
-#define TMR_SCTRL_MSTR_SHIFT                     (5U)
-#define TMR_SCTRL_MSTR(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_MSTR_SHIFT)) & TMR_SCTRL_MSTR_MASK)
-#define TMR_SCTRL_CAPTURE_MODE_MASK              (0xC0U)
-#define TMR_SCTRL_CAPTURE_MODE_SHIFT             (6U)
-#define TMR_SCTRL_CAPTURE_MODE(x)                (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_CAPTURE_MODE_SHIFT)) & TMR_SCTRL_CAPTURE_MODE_MASK)
-#define TMR_SCTRL_INPUT_MASK                     (0x100U)
-#define TMR_SCTRL_INPUT_SHIFT                    (8U)
-#define TMR_SCTRL_INPUT(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_INPUT_SHIFT)) & TMR_SCTRL_INPUT_MASK)
-#define TMR_SCTRL_IPS_MASK                       (0x200U)
-#define TMR_SCTRL_IPS_SHIFT                      (9U)
-#define TMR_SCTRL_IPS(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IPS_SHIFT)) & TMR_SCTRL_IPS_MASK)
-#define TMR_SCTRL_IEFIE_MASK                     (0x400U)
-#define TMR_SCTRL_IEFIE_SHIFT                    (10U)
-#define TMR_SCTRL_IEFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEFIE_SHIFT)) & TMR_SCTRL_IEFIE_MASK)
-#define TMR_SCTRL_IEF_MASK                       (0x800U)
-#define TMR_SCTRL_IEF_SHIFT                      (11U)
-#define TMR_SCTRL_IEF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEF_SHIFT)) & TMR_SCTRL_IEF_MASK)
-#define TMR_SCTRL_TOFIE_MASK                     (0x1000U)
-#define TMR_SCTRL_TOFIE_SHIFT                    (12U)
-#define TMR_SCTRL_TOFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOFIE_SHIFT)) & TMR_SCTRL_TOFIE_MASK)
-#define TMR_SCTRL_TOF_MASK                       (0x2000U)
-#define TMR_SCTRL_TOF_SHIFT                      (13U)
-#define TMR_SCTRL_TOF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOF_SHIFT)) & TMR_SCTRL_TOF_MASK)
-#define TMR_SCTRL_TCFIE_MASK                     (0x4000U)
-#define TMR_SCTRL_TCFIE_SHIFT                    (14U)
-#define TMR_SCTRL_TCFIE(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCFIE_SHIFT)) & TMR_SCTRL_TCFIE_MASK)
-#define TMR_SCTRL_TCF_MASK                       (0x8000U)
-#define TMR_SCTRL_TCF_SHIFT                      (15U)
-#define TMR_SCTRL_TCF(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCF_SHIFT)) & TMR_SCTRL_TCF_MASK)
+#define TMR_SCTRL_OEN_MASK           (0x1U)
+#define TMR_SCTRL_OEN_SHIFT          (0U)
+#define TMR_SCTRL_OEN(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OEN_SHIFT)) & TMR_SCTRL_OEN_MASK)
+#define TMR_SCTRL_OPS_MASK           (0x2U)
+#define TMR_SCTRL_OPS_SHIFT          (1U)
+#define TMR_SCTRL_OPS(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_OPS_SHIFT)) & TMR_SCTRL_OPS_MASK)
+#define TMR_SCTRL_FORCE_MASK         (0x4U)
+#define TMR_SCTRL_FORCE_SHIFT        (2U)
+#define TMR_SCTRL_FORCE(x)           (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_FORCE_SHIFT)) & TMR_SCTRL_FORCE_MASK)
+#define TMR_SCTRL_VAL_MASK           (0x8U)
+#define TMR_SCTRL_VAL_SHIFT          (3U)
+#define TMR_SCTRL_VAL(x)             (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_VAL_SHIFT)) & TMR_SCTRL_VAL_MASK)
+#define TMR_SCTRL_EEOF_MASK          (0x10U)
+#define TMR_SCTRL_EEOF_SHIFT         (4U)
+#define TMR_SCTRL_EEOF(x)            (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_EEOF_SHIFT)) & TMR_SCTRL_EEOF_MASK)
+#define TMR_SCTRL_MSTR_MASK          (0x20U)
+#define TMR_SCTRL_MSTR_SHIFT         (5U)
+#define TMR_SCTRL_MSTR(x)            (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_MSTR_SHIFT)) & TMR_SCTRL_MSTR_MASK)
+#define TMR_SCTRL_CAPTURE_MODE_MASK  (0xC0U)
+#define TMR_SCTRL_CAPTURE_MODE_SHIFT (6U)
+#define TMR_SCTRL_CAPTURE_MODE(x)                                                                                      \
+    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_CAPTURE_MODE_SHIFT)) & TMR_SCTRL_CAPTURE_MODE_MASK)
+#define TMR_SCTRL_INPUT_MASK  (0x100U)
+#define TMR_SCTRL_INPUT_SHIFT (8U)
+#define TMR_SCTRL_INPUT(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_INPUT_SHIFT)) & TMR_SCTRL_INPUT_MASK)
+#define TMR_SCTRL_IPS_MASK    (0x200U)
+#define TMR_SCTRL_IPS_SHIFT   (9U)
+#define TMR_SCTRL_IPS(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IPS_SHIFT)) & TMR_SCTRL_IPS_MASK)
+#define TMR_SCTRL_IEFIE_MASK  (0x400U)
+#define TMR_SCTRL_IEFIE_SHIFT (10U)
+#define TMR_SCTRL_IEFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEFIE_SHIFT)) & TMR_SCTRL_IEFIE_MASK)
+#define TMR_SCTRL_IEF_MASK    (0x800U)
+#define TMR_SCTRL_IEF_SHIFT   (11U)
+#define TMR_SCTRL_IEF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_IEF_SHIFT)) & TMR_SCTRL_IEF_MASK)
+#define TMR_SCTRL_TOFIE_MASK  (0x1000U)
+#define TMR_SCTRL_TOFIE_SHIFT (12U)
+#define TMR_SCTRL_TOFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOFIE_SHIFT)) & TMR_SCTRL_TOFIE_MASK)
+#define TMR_SCTRL_TOF_MASK    (0x2000U)
+#define TMR_SCTRL_TOF_SHIFT   (13U)
+#define TMR_SCTRL_TOF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TOF_SHIFT)) & TMR_SCTRL_TOF_MASK)
+#define TMR_SCTRL_TCFIE_MASK  (0x4000U)
+#define TMR_SCTRL_TCFIE_SHIFT (14U)
+#define TMR_SCTRL_TCFIE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCFIE_SHIFT)) & TMR_SCTRL_TCFIE_MASK)
+#define TMR_SCTRL_TCF_MASK    (0x8000U)
+#define TMR_SCTRL_TCF_SHIFT   (15U)
+#define TMR_SCTRL_TCF(x)      (((uint16_t)(((uint16_t)(x)) << TMR_SCTRL_TCF_SHIFT)) & TMR_SCTRL_TCF_MASK)
 /*! @} */
 
 /* The count of TMR_SCTRL */
-#define TMR_SCTRL_COUNT                          (4U)
+#define TMR_SCTRL_COUNT (4U)
 
 /*! @name CMPLD1 - Timer Channel Comparator Load Register 1 */
 /*! @{ */
-#define TMR_CMPLD1_COMPARATOR_LOAD_1_MASK        (0xFFFFU)
-#define TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT       (0U)
-#define TMR_CMPLD1_COMPARATOR_LOAD_1(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1_MASK  (0xFFFFU)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT (0U)
+#define TMR_CMPLD1_COMPARATOR_LOAD_1(x)                                                                                \
+    (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD1_COMPARATOR_LOAD_1_SHIFT)) & TMR_CMPLD1_COMPARATOR_LOAD_1_MASK)
 /*! @} */
 
 /* The count of TMR_CMPLD1 */
-#define TMR_CMPLD1_COUNT                         (4U)
+#define TMR_CMPLD1_COUNT (4U)
 
 /*! @name CMPLD2 - Timer Channel Comparator Load Register 2 */
 /*! @{ */
-#define TMR_CMPLD2_COMPARATOR_LOAD_2_MASK        (0xFFFFU)
-#define TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT       (0U)
-#define TMR_CMPLD2_COMPARATOR_LOAD_2(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2_MASK  (0xFFFFU)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT (0U)
+#define TMR_CMPLD2_COMPARATOR_LOAD_2(x)                                                                                \
+    (((uint16_t)(((uint16_t)(x)) << TMR_CMPLD2_COMPARATOR_LOAD_2_SHIFT)) & TMR_CMPLD2_COMPARATOR_LOAD_2_MASK)
 /*! @} */
 
 /* The count of TMR_CMPLD2 */
-#define TMR_CMPLD2_COUNT                         (4U)
+#define TMR_CMPLD2_COUNT (4U)
 
 /*! @name CSCTRL - Timer Channel Comparator Status and Control Register */
 /*! @{ */
-#define TMR_CSCTRL_CL1_MASK                      (0x3U)
-#define TMR_CSCTRL_CL1_SHIFT                     (0U)
-#define TMR_CSCTRL_CL1(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL1_SHIFT)) & TMR_CSCTRL_CL1_MASK)
-#define TMR_CSCTRL_CL2_MASK                      (0xCU)
-#define TMR_CSCTRL_CL2_SHIFT                     (2U)
-#define TMR_CSCTRL_CL2(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL2_SHIFT)) & TMR_CSCTRL_CL2_MASK)
-#define TMR_CSCTRL_TCF1_MASK                     (0x10U)
-#define TMR_CSCTRL_TCF1_SHIFT                    (4U)
-#define TMR_CSCTRL_TCF1(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1_SHIFT)) & TMR_CSCTRL_TCF1_MASK)
-#define TMR_CSCTRL_TCF2_MASK                     (0x20U)
-#define TMR_CSCTRL_TCF2_SHIFT                    (5U)
-#define TMR_CSCTRL_TCF2(x)                       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2_SHIFT)) & TMR_CSCTRL_TCF2_MASK)
-#define TMR_CSCTRL_TCF1EN_MASK                   (0x40U)
-#define TMR_CSCTRL_TCF1EN_SHIFT                  (6U)
-#define TMR_CSCTRL_TCF1EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1EN_SHIFT)) & TMR_CSCTRL_TCF1EN_MASK)
-#define TMR_CSCTRL_TCF2EN_MASK                   (0x80U)
-#define TMR_CSCTRL_TCF2EN_SHIFT                  (7U)
-#define TMR_CSCTRL_TCF2EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2EN_SHIFT)) & TMR_CSCTRL_TCF2EN_MASK)
-#define TMR_CSCTRL_UP_MASK                       (0x200U)
-#define TMR_CSCTRL_UP_SHIFT                      (9U)
-#define TMR_CSCTRL_UP(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_UP_SHIFT)) & TMR_CSCTRL_UP_MASK)
-#define TMR_CSCTRL_TCI_MASK                      (0x400U)
-#define TMR_CSCTRL_TCI_SHIFT                     (10U)
-#define TMR_CSCTRL_TCI(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCI_SHIFT)) & TMR_CSCTRL_TCI_MASK)
-#define TMR_CSCTRL_ROC_MASK                      (0x800U)
-#define TMR_CSCTRL_ROC_SHIFT                     (11U)
-#define TMR_CSCTRL_ROC(x)                        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ROC_SHIFT)) & TMR_CSCTRL_ROC_MASK)
-#define TMR_CSCTRL_ALT_LOAD_MASK                 (0x1000U)
-#define TMR_CSCTRL_ALT_LOAD_SHIFT                (12U)
-#define TMR_CSCTRL_ALT_LOAD(x)                   (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ALT_LOAD_SHIFT)) & TMR_CSCTRL_ALT_LOAD_MASK)
-#define TMR_CSCTRL_FAULT_MASK                    (0x2000U)
-#define TMR_CSCTRL_FAULT_SHIFT                   (13U)
-#define TMR_CSCTRL_FAULT(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_FAULT_SHIFT)) & TMR_CSCTRL_FAULT_MASK)
-#define TMR_CSCTRL_DBG_EN_MASK                   (0xC000U)
-#define TMR_CSCTRL_DBG_EN_SHIFT                  (14U)
-#define TMR_CSCTRL_DBG_EN(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_DBG_EN_SHIFT)) & TMR_CSCTRL_DBG_EN_MASK)
+#define TMR_CSCTRL_CL1_MASK       (0x3U)
+#define TMR_CSCTRL_CL1_SHIFT      (0U)
+#define TMR_CSCTRL_CL1(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL1_SHIFT)) & TMR_CSCTRL_CL1_MASK)
+#define TMR_CSCTRL_CL2_MASK       (0xCU)
+#define TMR_CSCTRL_CL2_SHIFT      (2U)
+#define TMR_CSCTRL_CL2(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_CL2_SHIFT)) & TMR_CSCTRL_CL2_MASK)
+#define TMR_CSCTRL_TCF1_MASK      (0x10U)
+#define TMR_CSCTRL_TCF1_SHIFT     (4U)
+#define TMR_CSCTRL_TCF1(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1_SHIFT)) & TMR_CSCTRL_TCF1_MASK)
+#define TMR_CSCTRL_TCF2_MASK      (0x20U)
+#define TMR_CSCTRL_TCF2_SHIFT     (5U)
+#define TMR_CSCTRL_TCF2(x)        (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2_SHIFT)) & TMR_CSCTRL_TCF2_MASK)
+#define TMR_CSCTRL_TCF1EN_MASK    (0x40U)
+#define TMR_CSCTRL_TCF1EN_SHIFT   (6U)
+#define TMR_CSCTRL_TCF1EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF1EN_SHIFT)) & TMR_CSCTRL_TCF1EN_MASK)
+#define TMR_CSCTRL_TCF2EN_MASK    (0x80U)
+#define TMR_CSCTRL_TCF2EN_SHIFT   (7U)
+#define TMR_CSCTRL_TCF2EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCF2EN_SHIFT)) & TMR_CSCTRL_TCF2EN_MASK)
+#define TMR_CSCTRL_UP_MASK        (0x200U)
+#define TMR_CSCTRL_UP_SHIFT       (9U)
+#define TMR_CSCTRL_UP(x)          (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_UP_SHIFT)) & TMR_CSCTRL_UP_MASK)
+#define TMR_CSCTRL_TCI_MASK       (0x400U)
+#define TMR_CSCTRL_TCI_SHIFT      (10U)
+#define TMR_CSCTRL_TCI(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_TCI_SHIFT)) & TMR_CSCTRL_TCI_MASK)
+#define TMR_CSCTRL_ROC_MASK       (0x800U)
+#define TMR_CSCTRL_ROC_SHIFT      (11U)
+#define TMR_CSCTRL_ROC(x)         (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ROC_SHIFT)) & TMR_CSCTRL_ROC_MASK)
+#define TMR_CSCTRL_ALT_LOAD_MASK  (0x1000U)
+#define TMR_CSCTRL_ALT_LOAD_SHIFT (12U)
+#define TMR_CSCTRL_ALT_LOAD(x)    (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_ALT_LOAD_SHIFT)) & TMR_CSCTRL_ALT_LOAD_MASK)
+#define TMR_CSCTRL_FAULT_MASK     (0x2000U)
+#define TMR_CSCTRL_FAULT_SHIFT    (13U)
+#define TMR_CSCTRL_FAULT(x)       (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_FAULT_SHIFT)) & TMR_CSCTRL_FAULT_MASK)
+#define TMR_CSCTRL_DBG_EN_MASK    (0xC000U)
+#define TMR_CSCTRL_DBG_EN_SHIFT   (14U)
+#define TMR_CSCTRL_DBG_EN(x)      (((uint16_t)(((uint16_t)(x)) << TMR_CSCTRL_DBG_EN_SHIFT)) & TMR_CSCTRL_DBG_EN_MASK)
 /*! @} */
 
 /* The count of TMR_CSCTRL */
-#define TMR_CSCTRL_COUNT                         (4U)
+#define TMR_CSCTRL_COUNT (4U)
 
 /*! @name FILT - Timer Channel Input Filter Register */
 /*! @{ */
-#define TMR_FILT_FILT_PER_MASK                   (0xFFU)
-#define TMR_FILT_FILT_PER_SHIFT                  (0U)
-#define TMR_FILT_FILT_PER(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK)
-#define TMR_FILT_FILT_CNT_MASK                   (0x700U)
-#define TMR_FILT_FILT_CNT_SHIFT                  (8U)
-#define TMR_FILT_FILT_CNT(x)                     (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK)
+#define TMR_FILT_FILT_PER_MASK  (0xFFU)
+#define TMR_FILT_FILT_PER_SHIFT (0U)
+#define TMR_FILT_FILT_PER(x)    (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_PER_SHIFT)) & TMR_FILT_FILT_PER_MASK)
+#define TMR_FILT_FILT_CNT_MASK  (0x700U)
+#define TMR_FILT_FILT_CNT_SHIFT (8U)
+#define TMR_FILT_FILT_CNT(x)    (((uint16_t)(((uint16_t)(x)) << TMR_FILT_FILT_CNT_SHIFT)) & TMR_FILT_FILT_CNT_MASK)
 /*! @} */
 
 /* The count of TMR_FILT */
-#define TMR_FILT_COUNT                           (4U)
+#define TMR_FILT_COUNT (4U)
 
 /*! @name DMA - Timer Channel DMA Enable Register */
 /*! @{ */
-#define TMR_DMA_IEFDE_MASK                       (0x1U)
-#define TMR_DMA_IEFDE_SHIFT                      (0U)
-#define TMR_DMA_IEFDE(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK)
-#define TMR_DMA_CMPLD1DE_MASK                    (0x2U)
-#define TMR_DMA_CMPLD1DE_SHIFT                   (1U)
-#define TMR_DMA_CMPLD1DE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK)
-#define TMR_DMA_CMPLD2DE_MASK                    (0x4U)
-#define TMR_DMA_CMPLD2DE_SHIFT                   (2U)
-#define TMR_DMA_CMPLD2DE(x)                      (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK)
+#define TMR_DMA_IEFDE_MASK     (0x1U)
+#define TMR_DMA_IEFDE_SHIFT    (0U)
+#define TMR_DMA_IEFDE(x)       (((uint16_t)(((uint16_t)(x)) << TMR_DMA_IEFDE_SHIFT)) & TMR_DMA_IEFDE_MASK)
+#define TMR_DMA_CMPLD1DE_MASK  (0x2U)
+#define TMR_DMA_CMPLD1DE_SHIFT (1U)
+#define TMR_DMA_CMPLD1DE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD1DE_SHIFT)) & TMR_DMA_CMPLD1DE_MASK)
+#define TMR_DMA_CMPLD2DE_MASK  (0x4U)
+#define TMR_DMA_CMPLD2DE_SHIFT (2U)
+#define TMR_DMA_CMPLD2DE(x)    (((uint16_t)(((uint16_t)(x)) << TMR_DMA_CMPLD2DE_SHIFT)) & TMR_DMA_CMPLD2DE_MASK)
 /*! @} */
 
 /* The count of TMR_DMA */
-#define TMR_DMA_COUNT                            (4U)
+#define TMR_DMA_COUNT (4U)
 
 /*! @name ENBL - Timer Channel Enable Register */
 /*! @{ */
-#define TMR_ENBL_ENBL_MASK                       (0xFU)
-#define TMR_ENBL_ENBL_SHIFT                      (0U)
-#define TMR_ENBL_ENBL(x)                         (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK)
+#define TMR_ENBL_ENBL_MASK  (0xFU)
+#define TMR_ENBL_ENBL_SHIFT (0U)
+#define TMR_ENBL_ENBL(x)    (((uint16_t)(((uint16_t)(x)) << TMR_ENBL_ENBL_SHIFT)) & TMR_ENBL_ENBL_MASK)
 /*! @} */
 
 /* The count of TMR_ENBL */
-#define TMR_ENBL_COUNT                           (4U)
-
+#define TMR_ENBL_COUNT (4U)
 
 /*!
  * @}
  */ /* end of group TMR_Register_Masks */
 
-
 /* TMR - Peripheral instance base addresses */
 /** Peripheral TMR1 base address */
-#define TMR1_BASE                                (0x401DC000u)
+#define TMR1_BASE (0x401DC000u)
 /** Peripheral TMR1 base pointer */
-#define TMR1                                     ((TMR_Type *)TMR1_BASE)
+#define TMR1 ((TMR_Type *)TMR1_BASE)
 /** Peripheral TMR2 base address */
-#define TMR2_BASE                                (0x401E0000u)
+#define TMR2_BASE (0x401E0000u)
 /** Peripheral TMR2 base pointer */
-#define TMR2                                     ((TMR_Type *)TMR2_BASE)
+#define TMR2 ((TMR_Type *)TMR2_BASE)
 /** Peripheral TMR3 base address */
-#define TMR3_BASE                                (0x401E4000u)
+#define TMR3_BASE (0x401E4000u)
 /** Peripheral TMR3 base pointer */
-#define TMR3                                     ((TMR_Type *)TMR3_BASE)
+#define TMR3 ((TMR_Type *)TMR3_BASE)
 /** Peripheral TMR4 base address */
-#define TMR4_BASE                                (0x401E8000u)
+#define TMR4_BASE (0x401E8000u)
 /** Peripheral TMR4 base pointer */
-#define TMR4                                     ((TMR_Type *)TMR4_BASE)
+#define TMR4 ((TMR_Type *)TMR4_BASE)
 /** Array initializer of TMR peripheral base addresses */
-#define TMR_BASE_ADDRS                           { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
+#define TMR_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE                                                                 \
+    }
 /** Array initializer of TMR peripheral base pointers */
-#define TMR_BASE_PTRS                            { (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4 }
+#define TMR_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4                                                                         \
+    }
 /** Interrupt vectors for the TMR peripheral type */
-#define TMR_IRQS                                 { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn }
+#define TMR_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group TMR_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TRNG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -20817,69 +23726,80 @@ typedef struct {
  */
 
 /** TRNG - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t MCTL;                              /**< Miscellaneous Control Register, offset: 0x0 */
-  __IO uint32_t SCMISC;                            /**< Statistical Check Miscellaneous Register, offset: 0x4 */
-  __IO uint32_t PKRRNG;                            /**< Poker Range Register, offset: 0x8 */
-  union {                                          /* offset: 0xC */
-    __IO uint32_t PKRMAX;                            /**< Poker Maximum Limit Register, offset: 0xC */
-    __I  uint32_t PKRSQ;                             /**< Poker Square Calculation Result Register, offset: 0xC */
-  };
-  __IO uint32_t SDCTL;                             /**< Seed Control Register, offset: 0x10 */
-  union {                                          /* offset: 0x14 */
-    __IO uint32_t SBLIM;                             /**< Sparse Bit Limit Register, offset: 0x14 */
-    __I  uint32_t TOTSAM;                            /**< Total Samples Register, offset: 0x14 */
-  };
-  __IO uint32_t FRQMIN;                            /**< Frequency Count Minimum Limit Register, offset: 0x18 */
-  union {                                          /* offset: 0x1C */
-    __I  uint32_t FRQCNT;                            /**< Frequency Count Register, offset: 0x1C */
-    __IO uint32_t FRQMAX;                            /**< Frequency Count Maximum Limit Register, offset: 0x1C */
-  };
-  union {                                          /* offset: 0x20 */
-    __I  uint32_t SCMC;                              /**< Statistical Check Monobit Count Register, offset: 0x20 */
-    __IO uint32_t SCML;                              /**< Statistical Check Monobit Limit Register, offset: 0x20 */
-  };
-  union {                                          /* offset: 0x24 */
-    __I  uint32_t SCR1C;                             /**< Statistical Check Run Length 1 Count Register, offset: 0x24 */
-    __IO uint32_t SCR1L;                             /**< Statistical Check Run Length 1 Limit Register, offset: 0x24 */
-  };
-  union {                                          /* offset: 0x28 */
-    __I  uint32_t SCR2C;                             /**< Statistical Check Run Length 2 Count Register, offset: 0x28 */
-    __IO uint32_t SCR2L;                             /**< Statistical Check Run Length 2 Limit Register, offset: 0x28 */
-  };
-  union {                                          /* offset: 0x2C */
-    __I  uint32_t SCR3C;                             /**< Statistical Check Run Length 3 Count Register, offset: 0x2C */
-    __IO uint32_t SCR3L;                             /**< Statistical Check Run Length 3 Limit Register, offset: 0x2C */
-  };
-  union {                                          /* offset: 0x30 */
-    __I  uint32_t SCR4C;                             /**< Statistical Check Run Length 4 Count Register, offset: 0x30 */
-    __IO uint32_t SCR4L;                             /**< Statistical Check Run Length 4 Limit Register, offset: 0x30 */
-  };
-  union {                                          /* offset: 0x34 */
-    __I  uint32_t SCR5C;                             /**< Statistical Check Run Length 5 Count Register, offset: 0x34 */
-    __IO uint32_t SCR5L;                             /**< Statistical Check Run Length 5 Limit Register, offset: 0x34 */
-  };
-  union {                                          /* offset: 0x38 */
-    __I  uint32_t SCR6PC;                            /**< Statistical Check Run Length 6+ Count Register, offset: 0x38 */
-    __IO uint32_t SCR6PL;                            /**< Statistical Check Run Length 6+ Limit Register, offset: 0x38 */
-  };
-  __I  uint32_t STATUS;                            /**< Status Register, offset: 0x3C */
-  __I  uint32_t ENT[16];                           /**< Entropy Read Register, array offset: 0x40, array step: 0x4 */
-  __I  uint32_t PKRCNT10;                          /**< Statistical Check Poker Count 1 and 0 Register, offset: 0x80 */
-  __I  uint32_t PKRCNT32;                          /**< Statistical Check Poker Count 3 and 2 Register, offset: 0x84 */
-  __I  uint32_t PKRCNT54;                          /**< Statistical Check Poker Count 5 and 4 Register, offset: 0x88 */
-  __I  uint32_t PKRCNT76;                          /**< Statistical Check Poker Count 7 and 6 Register, offset: 0x8C */
-  __I  uint32_t PKRCNT98;                          /**< Statistical Check Poker Count 9 and 8 Register, offset: 0x90 */
-  __I  uint32_t PKRCNTBA;                          /**< Statistical Check Poker Count B and A Register, offset: 0x94 */
-  __I  uint32_t PKRCNTDC;                          /**< Statistical Check Poker Count D and C Register, offset: 0x98 */
-  __I  uint32_t PKRCNTFE;                          /**< Statistical Check Poker Count F and E Register, offset: 0x9C */
-  __IO uint32_t SEC_CFG;                           /**< Security Configuration Register, offset: 0xA0 */
-  __IO uint32_t INT_CTRL;                          /**< Interrupt Control Register, offset: 0xA4 */
-  __IO uint32_t INT_MASK;                          /**< Mask Register, offset: 0xA8 */
-  __I  uint32_t INT_STATUS;                        /**< Interrupt Status Register, offset: 0xAC */
-       uint8_t RESERVED_0[64];
-  __I  uint32_t VID1;                              /**< Version ID Register (MS), offset: 0xF0 */
-  __I  uint32_t VID2;                              /**< Version ID Register (LS), offset: 0xF4 */
+typedef struct
+{
+    __IO uint32_t MCTL;   /**< Miscellaneous Control Register, offset: 0x0 */
+    __IO uint32_t SCMISC; /**< Statistical Check Miscellaneous Register, offset: 0x4 */
+    __IO uint32_t PKRRNG; /**< Poker Range Register, offset: 0x8 */
+    union
+    {                         /* offset: 0xC */
+        __IO uint32_t PKRMAX; /**< Poker Maximum Limit Register, offset: 0xC */
+        __I uint32_t PKRSQ;   /**< Poker Square Calculation Result Register, offset: 0xC */
+    };
+    __IO uint32_t SDCTL; /**< Seed Control Register, offset: 0x10 */
+    union
+    {                        /* offset: 0x14 */
+        __IO uint32_t SBLIM; /**< Sparse Bit Limit Register, offset: 0x14 */
+        __I uint32_t TOTSAM; /**< Total Samples Register, offset: 0x14 */
+    };
+    __IO uint32_t FRQMIN; /**< Frequency Count Minimum Limit Register, offset: 0x18 */
+    union
+    {                         /* offset: 0x1C */
+        __I uint32_t FRQCNT;  /**< Frequency Count Register, offset: 0x1C */
+        __IO uint32_t FRQMAX; /**< Frequency Count Maximum Limit Register, offset: 0x1C */
+    };
+    union
+    {                       /* offset: 0x20 */
+        __I uint32_t SCMC;  /**< Statistical Check Monobit Count Register, offset: 0x20 */
+        __IO uint32_t SCML; /**< Statistical Check Monobit Limit Register, offset: 0x20 */
+    };
+    union
+    {                        /* offset: 0x24 */
+        __I uint32_t SCR1C;  /**< Statistical Check Run Length 1 Count Register, offset: 0x24 */
+        __IO uint32_t SCR1L; /**< Statistical Check Run Length 1 Limit Register, offset: 0x24 */
+    };
+    union
+    {                        /* offset: 0x28 */
+        __I uint32_t SCR2C;  /**< Statistical Check Run Length 2 Count Register, offset: 0x28 */
+        __IO uint32_t SCR2L; /**< Statistical Check Run Length 2 Limit Register, offset: 0x28 */
+    };
+    union
+    {                        /* offset: 0x2C */
+        __I uint32_t SCR3C;  /**< Statistical Check Run Length 3 Count Register, offset: 0x2C */
+        __IO uint32_t SCR3L; /**< Statistical Check Run Length 3 Limit Register, offset: 0x2C */
+    };
+    union
+    {                        /* offset: 0x30 */
+        __I uint32_t SCR4C;  /**< Statistical Check Run Length 4 Count Register, offset: 0x30 */
+        __IO uint32_t SCR4L; /**< Statistical Check Run Length 4 Limit Register, offset: 0x30 */
+    };
+    union
+    {                        /* offset: 0x34 */
+        __I uint32_t SCR5C;  /**< Statistical Check Run Length 5 Count Register, offset: 0x34 */
+        __IO uint32_t SCR5L; /**< Statistical Check Run Length 5 Limit Register, offset: 0x34 */
+    };
+    union
+    {                         /* offset: 0x38 */
+        __I uint32_t SCR6PC;  /**< Statistical Check Run Length 6+ Count Register, offset: 0x38 */
+        __IO uint32_t SCR6PL; /**< Statistical Check Run Length 6+ Limit Register, offset: 0x38 */
+    };
+    __I uint32_t STATUS;     /**< Status Register, offset: 0x3C */
+    __I uint32_t ENT[16];    /**< Entropy Read Register, array offset: 0x40, array step: 0x4 */
+    __I uint32_t PKRCNT10;   /**< Statistical Check Poker Count 1 and 0 Register, offset: 0x80 */
+    __I uint32_t PKRCNT32;   /**< Statistical Check Poker Count 3 and 2 Register, offset: 0x84 */
+    __I uint32_t PKRCNT54;   /**< Statistical Check Poker Count 5 and 4 Register, offset: 0x88 */
+    __I uint32_t PKRCNT76;   /**< Statistical Check Poker Count 7 and 6 Register, offset: 0x8C */
+    __I uint32_t PKRCNT98;   /**< Statistical Check Poker Count 9 and 8 Register, offset: 0x90 */
+    __I uint32_t PKRCNTBA;   /**< Statistical Check Poker Count B and A Register, offset: 0x94 */
+    __I uint32_t PKRCNTDC;   /**< Statistical Check Poker Count D and C Register, offset: 0x98 */
+    __I uint32_t PKRCNTFE;   /**< Statistical Check Poker Count F and E Register, offset: 0x9C */
+    __IO uint32_t SEC_CFG;   /**< Security Configuration Register, offset: 0xA0 */
+    __IO uint32_t INT_CTRL;  /**< Interrupt Control Register, offset: 0xA4 */
+    __IO uint32_t INT_MASK;  /**< Mask Register, offset: 0xA8 */
+    __I uint32_t INT_STATUS; /**< Interrupt Status Register, offset: 0xAC */
+    uint8_t RESERVED_0[64];
+    __I uint32_t VID1; /**< Version ID Register (MS), offset: 0xF0 */
+    __I uint32_t VID2; /**< Version ID Register (LS), offset: 0xF4 */
 } TRNG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -20893,515 +23813,558 @@ typedef struct {
 
 /*! @name MCTL - Miscellaneous Control Register */
 /*! @{ */
-#define TRNG_MCTL_SAMP_MODE_MASK                 (0x3U)
-#define TRNG_MCTL_SAMP_MODE_SHIFT                (0U)
-#define TRNG_MCTL_SAMP_MODE(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_SAMP_MODE_SHIFT)) & TRNG_MCTL_SAMP_MODE_MASK)
-#define TRNG_MCTL_OSC_DIV_MASK                   (0xCU)
-#define TRNG_MCTL_OSC_DIV_SHIFT                  (2U)
-#define TRNG_MCTL_OSC_DIV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_OSC_DIV_SHIFT)) & TRNG_MCTL_OSC_DIV_MASK)
-#define TRNG_MCTL_UNUSED4_MASK                   (0x10U)
-#define TRNG_MCTL_UNUSED4_SHIFT                  (4U)
-#define TRNG_MCTL_UNUSED4(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED4_SHIFT)) & TRNG_MCTL_UNUSED4_MASK)
-#define TRNG_MCTL_UNUSED5_MASK                   (0x20U)
-#define TRNG_MCTL_UNUSED5_SHIFT                  (5U)
-#define TRNG_MCTL_UNUSED5(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED5_SHIFT)) & TRNG_MCTL_UNUSED5_MASK)
-#define TRNG_MCTL_RST_DEF_MASK                   (0x40U)
-#define TRNG_MCTL_RST_DEF_SHIFT                  (6U)
-#define TRNG_MCTL_RST_DEF(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_RST_DEF_SHIFT)) & TRNG_MCTL_RST_DEF_MASK)
-#define TRNG_MCTL_FOR_SCLK_MASK                  (0x80U)
-#define TRNG_MCTL_FOR_SCLK_SHIFT                 (7U)
-#define TRNG_MCTL_FOR_SCLK(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FOR_SCLK_SHIFT)) & TRNG_MCTL_FOR_SCLK_MASK)
-#define TRNG_MCTL_FCT_FAIL_MASK                  (0x100U)
-#define TRNG_MCTL_FCT_FAIL_SHIFT                 (8U)
-#define TRNG_MCTL_FCT_FAIL(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_FAIL_SHIFT)) & TRNG_MCTL_FCT_FAIL_MASK)
-#define TRNG_MCTL_FCT_VAL_MASK                   (0x200U)
-#define TRNG_MCTL_FCT_VAL_SHIFT                  (9U)
-#define TRNG_MCTL_FCT_VAL(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_VAL_SHIFT)) & TRNG_MCTL_FCT_VAL_MASK)
-#define TRNG_MCTL_ENT_VAL_MASK                   (0x400U)
-#define TRNG_MCTL_ENT_VAL_SHIFT                  (10U)
-#define TRNG_MCTL_ENT_VAL(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ENT_VAL_SHIFT)) & TRNG_MCTL_ENT_VAL_MASK)
-#define TRNG_MCTL_TST_OUT_MASK                   (0x800U)
-#define TRNG_MCTL_TST_OUT_SHIFT                  (11U)
-#define TRNG_MCTL_TST_OUT(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TST_OUT_SHIFT)) & TRNG_MCTL_TST_OUT_MASK)
-#define TRNG_MCTL_ERR_MASK                       (0x1000U)
-#define TRNG_MCTL_ERR_SHIFT                      (12U)
-#define TRNG_MCTL_ERR(x)                         (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ERR_SHIFT)) & TRNG_MCTL_ERR_MASK)
-#define TRNG_MCTL_TSTOP_OK_MASK                  (0x2000U)
-#define TRNG_MCTL_TSTOP_OK_SHIFT                 (13U)
-#define TRNG_MCTL_TSTOP_OK(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TSTOP_OK_SHIFT)) & TRNG_MCTL_TSTOP_OK_MASK)
-#define TRNG_MCTL_LRUN_CONT_MASK                 (0x4000U)
-#define TRNG_MCTL_LRUN_CONT_SHIFT                (14U)
-#define TRNG_MCTL_LRUN_CONT(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_LRUN_CONT_SHIFT)) & TRNG_MCTL_LRUN_CONT_MASK)
-#define TRNG_MCTL_PRGM_MASK                      (0x10000U)
-#define TRNG_MCTL_PRGM_SHIFT                     (16U)
-#define TRNG_MCTL_PRGM(x)                        (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_PRGM_SHIFT)) & TRNG_MCTL_PRGM_MASK)
+#define TRNG_MCTL_SAMP_MODE_MASK  (0x3U)
+#define TRNG_MCTL_SAMP_MODE_SHIFT (0U)
+#define TRNG_MCTL_SAMP_MODE(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_SAMP_MODE_SHIFT)) & TRNG_MCTL_SAMP_MODE_MASK)
+#define TRNG_MCTL_OSC_DIV_MASK    (0xCU)
+#define TRNG_MCTL_OSC_DIV_SHIFT   (2U)
+#define TRNG_MCTL_OSC_DIV(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_OSC_DIV_SHIFT)) & TRNG_MCTL_OSC_DIV_MASK)
+#define TRNG_MCTL_UNUSED4_MASK    (0x10U)
+#define TRNG_MCTL_UNUSED4_SHIFT   (4U)
+#define TRNG_MCTL_UNUSED4(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED4_SHIFT)) & TRNG_MCTL_UNUSED4_MASK)
+#define TRNG_MCTL_UNUSED5_MASK    (0x20U)
+#define TRNG_MCTL_UNUSED5_SHIFT   (5U)
+#define TRNG_MCTL_UNUSED5(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_UNUSED5_SHIFT)) & TRNG_MCTL_UNUSED5_MASK)
+#define TRNG_MCTL_RST_DEF_MASK    (0x40U)
+#define TRNG_MCTL_RST_DEF_SHIFT   (6U)
+#define TRNG_MCTL_RST_DEF(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_RST_DEF_SHIFT)) & TRNG_MCTL_RST_DEF_MASK)
+#define TRNG_MCTL_FOR_SCLK_MASK   (0x80U)
+#define TRNG_MCTL_FOR_SCLK_SHIFT  (7U)
+#define TRNG_MCTL_FOR_SCLK(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FOR_SCLK_SHIFT)) & TRNG_MCTL_FOR_SCLK_MASK)
+#define TRNG_MCTL_FCT_FAIL_MASK   (0x100U)
+#define TRNG_MCTL_FCT_FAIL_SHIFT  (8U)
+#define TRNG_MCTL_FCT_FAIL(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_FAIL_SHIFT)) & TRNG_MCTL_FCT_FAIL_MASK)
+#define TRNG_MCTL_FCT_VAL_MASK    (0x200U)
+#define TRNG_MCTL_FCT_VAL_SHIFT   (9U)
+#define TRNG_MCTL_FCT_VAL(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_FCT_VAL_SHIFT)) & TRNG_MCTL_FCT_VAL_MASK)
+#define TRNG_MCTL_ENT_VAL_MASK    (0x400U)
+#define TRNG_MCTL_ENT_VAL_SHIFT   (10U)
+#define TRNG_MCTL_ENT_VAL(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ENT_VAL_SHIFT)) & TRNG_MCTL_ENT_VAL_MASK)
+#define TRNG_MCTL_TST_OUT_MASK    (0x800U)
+#define TRNG_MCTL_TST_OUT_SHIFT   (11U)
+#define TRNG_MCTL_TST_OUT(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TST_OUT_SHIFT)) & TRNG_MCTL_TST_OUT_MASK)
+#define TRNG_MCTL_ERR_MASK        (0x1000U)
+#define TRNG_MCTL_ERR_SHIFT       (12U)
+#define TRNG_MCTL_ERR(x)          (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_ERR_SHIFT)) & TRNG_MCTL_ERR_MASK)
+#define TRNG_MCTL_TSTOP_OK_MASK   (0x2000U)
+#define TRNG_MCTL_TSTOP_OK_SHIFT  (13U)
+#define TRNG_MCTL_TSTOP_OK(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_TSTOP_OK_SHIFT)) & TRNG_MCTL_TSTOP_OK_MASK)
+#define TRNG_MCTL_LRUN_CONT_MASK  (0x4000U)
+#define TRNG_MCTL_LRUN_CONT_SHIFT (14U)
+#define TRNG_MCTL_LRUN_CONT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_LRUN_CONT_SHIFT)) & TRNG_MCTL_LRUN_CONT_MASK)
+#define TRNG_MCTL_PRGM_MASK       (0x10000U)
+#define TRNG_MCTL_PRGM_SHIFT      (16U)
+#define TRNG_MCTL_PRGM(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_MCTL_PRGM_SHIFT)) & TRNG_MCTL_PRGM_MASK)
 /*! @} */
 
 /*! @name SCMISC - Statistical Check Miscellaneous Register */
 /*! @{ */
-#define TRNG_SCMISC_LRUN_MAX_MASK                (0xFFU)
-#define TRNG_SCMISC_LRUN_MAX_SHIFT               (0U)
-#define TRNG_SCMISC_LRUN_MAX(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_LRUN_MAX_SHIFT)) & TRNG_SCMISC_LRUN_MAX_MASK)
-#define TRNG_SCMISC_RTY_CT_MASK                  (0xF0000U)
-#define TRNG_SCMISC_RTY_CT_SHIFT                 (16U)
-#define TRNG_SCMISC_RTY_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_RTY_CT_SHIFT)) & TRNG_SCMISC_RTY_CT_MASK)
+#define TRNG_SCMISC_LRUN_MAX_MASK  (0xFFU)
+#define TRNG_SCMISC_LRUN_MAX_SHIFT (0U)
+#define TRNG_SCMISC_LRUN_MAX(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_LRUN_MAX_SHIFT)) & TRNG_SCMISC_LRUN_MAX_MASK)
+#define TRNG_SCMISC_RTY_CT_MASK  (0xF0000U)
+#define TRNG_SCMISC_RTY_CT_SHIFT (16U)
+#define TRNG_SCMISC_RTY_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMISC_RTY_CT_SHIFT)) & TRNG_SCMISC_RTY_CT_MASK)
 /*! @} */
 
 /*! @name PKRRNG - Poker Range Register */
 /*! @{ */
-#define TRNG_PKRRNG_PKR_RNG_MASK                 (0xFFFFU)
-#define TRNG_PKRRNG_PKR_RNG_SHIFT                (0U)
-#define TRNG_PKRRNG_PKR_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_PKRRNG_PKR_RNG_SHIFT)) & TRNG_PKRRNG_PKR_RNG_MASK)
+#define TRNG_PKRRNG_PKR_RNG_MASK  (0xFFFFU)
+#define TRNG_PKRRNG_PKR_RNG_SHIFT (0U)
+#define TRNG_PKRRNG_PKR_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRRNG_PKR_RNG_SHIFT)) & TRNG_PKRRNG_PKR_RNG_MASK)
 /*! @} */
 
 /*! @name PKRMAX - Poker Maximum Limit Register */
 /*! @{ */
-#define TRNG_PKRMAX_PKR_MAX_MASK                 (0xFFFFFFU)
-#define TRNG_PKRMAX_PKR_MAX_SHIFT                (0U)
-#define TRNG_PKRMAX_PKR_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_PKRMAX_PKR_MAX_SHIFT)) & TRNG_PKRMAX_PKR_MAX_MASK)
+#define TRNG_PKRMAX_PKR_MAX_MASK  (0xFFFFFFU)
+#define TRNG_PKRMAX_PKR_MAX_SHIFT (0U)
+#define TRNG_PKRMAX_PKR_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRMAX_PKR_MAX_SHIFT)) & TRNG_PKRMAX_PKR_MAX_MASK)
 /*! @} */
 
 /*! @name PKRSQ - Poker Square Calculation Result Register */
 /*! @{ */
-#define TRNG_PKRSQ_PKR_SQ_MASK                   (0xFFFFFFU)
-#define TRNG_PKRSQ_PKR_SQ_SHIFT                  (0U)
-#define TRNG_PKRSQ_PKR_SQ(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_PKRSQ_PKR_SQ_SHIFT)) & TRNG_PKRSQ_PKR_SQ_MASK)
+#define TRNG_PKRSQ_PKR_SQ_MASK  (0xFFFFFFU)
+#define TRNG_PKRSQ_PKR_SQ_SHIFT (0U)
+#define TRNG_PKRSQ_PKR_SQ(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRSQ_PKR_SQ_SHIFT)) & TRNG_PKRSQ_PKR_SQ_MASK)
 /*! @} */
 
 /*! @name SDCTL - Seed Control Register */
 /*! @{ */
-#define TRNG_SDCTL_SAMP_SIZE_MASK                (0xFFFFU)
-#define TRNG_SDCTL_SAMP_SIZE_SHIFT               (0U)
-#define TRNG_SDCTL_SAMP_SIZE(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_SAMP_SIZE_SHIFT)) & TRNG_SDCTL_SAMP_SIZE_MASK)
-#define TRNG_SDCTL_ENT_DLY_MASK                  (0xFFFF0000U)
-#define TRNG_SDCTL_ENT_DLY_SHIFT                 (16U)
-#define TRNG_SDCTL_ENT_DLY(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_ENT_DLY_SHIFT)) & TRNG_SDCTL_ENT_DLY_MASK)
+#define TRNG_SDCTL_SAMP_SIZE_MASK  (0xFFFFU)
+#define TRNG_SDCTL_SAMP_SIZE_SHIFT (0U)
+#define TRNG_SDCTL_SAMP_SIZE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_SAMP_SIZE_SHIFT)) & TRNG_SDCTL_SAMP_SIZE_MASK)
+#define TRNG_SDCTL_ENT_DLY_MASK  (0xFFFF0000U)
+#define TRNG_SDCTL_ENT_DLY_SHIFT (16U)
+#define TRNG_SDCTL_ENT_DLY(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SDCTL_ENT_DLY_SHIFT)) & TRNG_SDCTL_ENT_DLY_MASK)
 /*! @} */
 
 /*! @name SBLIM - Sparse Bit Limit Register */
 /*! @{ */
-#define TRNG_SBLIM_SB_LIM_MASK                   (0x3FFU)
-#define TRNG_SBLIM_SB_LIM_SHIFT                  (0U)
-#define TRNG_SBLIM_SB_LIM(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_SBLIM_SB_LIM_SHIFT)) & TRNG_SBLIM_SB_LIM_MASK)
+#define TRNG_SBLIM_SB_LIM_MASK  (0x3FFU)
+#define TRNG_SBLIM_SB_LIM_SHIFT (0U)
+#define TRNG_SBLIM_SB_LIM(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SBLIM_SB_LIM_SHIFT)) & TRNG_SBLIM_SB_LIM_MASK)
 /*! @} */
 
 /*! @name TOTSAM - Total Samples Register */
 /*! @{ */
-#define TRNG_TOTSAM_TOT_SAM_MASK                 (0xFFFFFU)
-#define TRNG_TOTSAM_TOT_SAM_SHIFT                (0U)
-#define TRNG_TOTSAM_TOT_SAM(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_TOTSAM_TOT_SAM_SHIFT)) & TRNG_TOTSAM_TOT_SAM_MASK)
+#define TRNG_TOTSAM_TOT_SAM_MASK  (0xFFFFFU)
+#define TRNG_TOTSAM_TOT_SAM_SHIFT (0U)
+#define TRNG_TOTSAM_TOT_SAM(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_TOTSAM_TOT_SAM_SHIFT)) & TRNG_TOTSAM_TOT_SAM_MASK)
 /*! @} */
 
 /*! @name FRQMIN - Frequency Count Minimum Limit Register */
 /*! @{ */
-#define TRNG_FRQMIN_FRQ_MIN_MASK                 (0x3FFFFFU)
-#define TRNG_FRQMIN_FRQ_MIN_SHIFT                (0U)
-#define TRNG_FRQMIN_FRQ_MIN(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMIN_FRQ_MIN_SHIFT)) & TRNG_FRQMIN_FRQ_MIN_MASK)
+#define TRNG_FRQMIN_FRQ_MIN_MASK  (0x3FFFFFU)
+#define TRNG_FRQMIN_FRQ_MIN_SHIFT (0U)
+#define TRNG_FRQMIN_FRQ_MIN(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMIN_FRQ_MIN_SHIFT)) & TRNG_FRQMIN_FRQ_MIN_MASK)
 /*! @} */
 
 /*! @name FRQCNT - Frequency Count Register */
 /*! @{ */
-#define TRNG_FRQCNT_FRQ_CT_MASK                  (0x3FFFFFU)
-#define TRNG_FRQCNT_FRQ_CT_SHIFT                 (0U)
-#define TRNG_FRQCNT_FRQ_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQCNT_FRQ_CT_SHIFT)) & TRNG_FRQCNT_FRQ_CT_MASK)
+#define TRNG_FRQCNT_FRQ_CT_MASK  (0x3FFFFFU)
+#define TRNG_FRQCNT_FRQ_CT_SHIFT (0U)
+#define TRNG_FRQCNT_FRQ_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQCNT_FRQ_CT_SHIFT)) & TRNG_FRQCNT_FRQ_CT_MASK)
 /*! @} */
 
 /*! @name FRQMAX - Frequency Count Maximum Limit Register */
 /*! @{ */
-#define TRNG_FRQMAX_FRQ_MAX_MASK                 (0x3FFFFFU)
-#define TRNG_FRQMAX_FRQ_MAX_SHIFT                (0U)
-#define TRNG_FRQMAX_FRQ_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMAX_FRQ_MAX_SHIFT)) & TRNG_FRQMAX_FRQ_MAX_MASK)
+#define TRNG_FRQMAX_FRQ_MAX_MASK  (0x3FFFFFU)
+#define TRNG_FRQMAX_FRQ_MAX_SHIFT (0U)
+#define TRNG_FRQMAX_FRQ_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_FRQMAX_FRQ_MAX_SHIFT)) & TRNG_FRQMAX_FRQ_MAX_MASK)
 /*! @} */
 
 /*! @name SCMC - Statistical Check Monobit Count Register */
 /*! @{ */
-#define TRNG_SCMC_MONO_CT_MASK                   (0xFFFFU)
-#define TRNG_SCMC_MONO_CT_SHIFT                  (0U)
-#define TRNG_SCMC_MONO_CT(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_SCMC_MONO_CT_SHIFT)) & TRNG_SCMC_MONO_CT_MASK)
+#define TRNG_SCMC_MONO_CT_MASK  (0xFFFFU)
+#define TRNG_SCMC_MONO_CT_SHIFT (0U)
+#define TRNG_SCMC_MONO_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCMC_MONO_CT_SHIFT)) & TRNG_SCMC_MONO_CT_MASK)
 /*! @} */
 
 /*! @name SCML - Statistical Check Monobit Limit Register */
 /*! @{ */
-#define TRNG_SCML_MONO_MAX_MASK                  (0xFFFFU)
-#define TRNG_SCML_MONO_MAX_SHIFT                 (0U)
-#define TRNG_SCML_MONO_MAX(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_MAX_SHIFT)) & TRNG_SCML_MONO_MAX_MASK)
-#define TRNG_SCML_MONO_RNG_MASK                  (0xFFFF0000U)
-#define TRNG_SCML_MONO_RNG_SHIFT                 (16U)
-#define TRNG_SCML_MONO_RNG(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_RNG_SHIFT)) & TRNG_SCML_MONO_RNG_MASK)
+#define TRNG_SCML_MONO_MAX_MASK  (0xFFFFU)
+#define TRNG_SCML_MONO_MAX_SHIFT (0U)
+#define TRNG_SCML_MONO_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_MAX_SHIFT)) & TRNG_SCML_MONO_MAX_MASK)
+#define TRNG_SCML_MONO_RNG_MASK  (0xFFFF0000U)
+#define TRNG_SCML_MONO_RNG_SHIFT (16U)
+#define TRNG_SCML_MONO_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCML_MONO_RNG_SHIFT)) & TRNG_SCML_MONO_RNG_MASK)
 /*! @} */
 
 /*! @name SCR1C - Statistical Check Run Length 1 Count Register */
 /*! @{ */
-#define TRNG_SCR1C_R1_0_CT_MASK                  (0x7FFFU)
-#define TRNG_SCR1C_R1_0_CT_SHIFT                 (0U)
-#define TRNG_SCR1C_R1_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_0_CT_SHIFT)) & TRNG_SCR1C_R1_0_CT_MASK)
-#define TRNG_SCR1C_R1_1_CT_MASK                  (0x7FFF0000U)
-#define TRNG_SCR1C_R1_1_CT_SHIFT                 (16U)
-#define TRNG_SCR1C_R1_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_1_CT_SHIFT)) & TRNG_SCR1C_R1_1_CT_MASK)
+#define TRNG_SCR1C_R1_0_CT_MASK  (0x7FFFU)
+#define TRNG_SCR1C_R1_0_CT_SHIFT (0U)
+#define TRNG_SCR1C_R1_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_0_CT_SHIFT)) & TRNG_SCR1C_R1_0_CT_MASK)
+#define TRNG_SCR1C_R1_1_CT_MASK  (0x7FFF0000U)
+#define TRNG_SCR1C_R1_1_CT_SHIFT (16U)
+#define TRNG_SCR1C_R1_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1C_R1_1_CT_SHIFT)) & TRNG_SCR1C_R1_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR1L - Statistical Check Run Length 1 Limit Register */
 /*! @{ */
-#define TRNG_SCR1L_RUN1_MAX_MASK                 (0x7FFFU)
-#define TRNG_SCR1L_RUN1_MAX_SHIFT                (0U)
-#define TRNG_SCR1L_RUN1_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_MAX_SHIFT)) & TRNG_SCR1L_RUN1_MAX_MASK)
-#define TRNG_SCR1L_RUN1_RNG_MASK                 (0x7FFF0000U)
-#define TRNG_SCR1L_RUN1_RNG_SHIFT                (16U)
-#define TRNG_SCR1L_RUN1_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_RNG_SHIFT)) & TRNG_SCR1L_RUN1_RNG_MASK)
+#define TRNG_SCR1L_RUN1_MAX_MASK  (0x7FFFU)
+#define TRNG_SCR1L_RUN1_MAX_SHIFT (0U)
+#define TRNG_SCR1L_RUN1_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_MAX_SHIFT)) & TRNG_SCR1L_RUN1_MAX_MASK)
+#define TRNG_SCR1L_RUN1_RNG_MASK  (0x7FFF0000U)
+#define TRNG_SCR1L_RUN1_RNG_SHIFT (16U)
+#define TRNG_SCR1L_RUN1_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR1L_RUN1_RNG_SHIFT)) & TRNG_SCR1L_RUN1_RNG_MASK)
 /*! @} */
 
 /*! @name SCR2C - Statistical Check Run Length 2 Count Register */
 /*! @{ */
-#define TRNG_SCR2C_R2_0_CT_MASK                  (0x3FFFU)
-#define TRNG_SCR2C_R2_0_CT_SHIFT                 (0U)
-#define TRNG_SCR2C_R2_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_0_CT_SHIFT)) & TRNG_SCR2C_R2_0_CT_MASK)
-#define TRNG_SCR2C_R2_1_CT_MASK                  (0x3FFF0000U)
-#define TRNG_SCR2C_R2_1_CT_SHIFT                 (16U)
-#define TRNG_SCR2C_R2_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_1_CT_SHIFT)) & TRNG_SCR2C_R2_1_CT_MASK)
+#define TRNG_SCR2C_R2_0_CT_MASK  (0x3FFFU)
+#define TRNG_SCR2C_R2_0_CT_SHIFT (0U)
+#define TRNG_SCR2C_R2_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_0_CT_SHIFT)) & TRNG_SCR2C_R2_0_CT_MASK)
+#define TRNG_SCR2C_R2_1_CT_MASK  (0x3FFF0000U)
+#define TRNG_SCR2C_R2_1_CT_SHIFT (16U)
+#define TRNG_SCR2C_R2_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2C_R2_1_CT_SHIFT)) & TRNG_SCR2C_R2_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR2L - Statistical Check Run Length 2 Limit Register */
 /*! @{ */
-#define TRNG_SCR2L_RUN2_MAX_MASK                 (0x3FFFU)
-#define TRNG_SCR2L_RUN2_MAX_SHIFT                (0U)
-#define TRNG_SCR2L_RUN2_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_MAX_SHIFT)) & TRNG_SCR2L_RUN2_MAX_MASK)
-#define TRNG_SCR2L_RUN2_RNG_MASK                 (0x3FFF0000U)
-#define TRNG_SCR2L_RUN2_RNG_SHIFT                (16U)
-#define TRNG_SCR2L_RUN2_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_RNG_SHIFT)) & TRNG_SCR2L_RUN2_RNG_MASK)
+#define TRNG_SCR2L_RUN2_MAX_MASK  (0x3FFFU)
+#define TRNG_SCR2L_RUN2_MAX_SHIFT (0U)
+#define TRNG_SCR2L_RUN2_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_MAX_SHIFT)) & TRNG_SCR2L_RUN2_MAX_MASK)
+#define TRNG_SCR2L_RUN2_RNG_MASK  (0x3FFF0000U)
+#define TRNG_SCR2L_RUN2_RNG_SHIFT (16U)
+#define TRNG_SCR2L_RUN2_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR2L_RUN2_RNG_SHIFT)) & TRNG_SCR2L_RUN2_RNG_MASK)
 /*! @} */
 
 /*! @name SCR3C - Statistical Check Run Length 3 Count Register */
 /*! @{ */
-#define TRNG_SCR3C_R3_0_CT_MASK                  (0x1FFFU)
-#define TRNG_SCR3C_R3_0_CT_SHIFT                 (0U)
-#define TRNG_SCR3C_R3_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_0_CT_SHIFT)) & TRNG_SCR3C_R3_0_CT_MASK)
-#define TRNG_SCR3C_R3_1_CT_MASK                  (0x1FFF0000U)
-#define TRNG_SCR3C_R3_1_CT_SHIFT                 (16U)
-#define TRNG_SCR3C_R3_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_1_CT_SHIFT)) & TRNG_SCR3C_R3_1_CT_MASK)
+#define TRNG_SCR3C_R3_0_CT_MASK  (0x1FFFU)
+#define TRNG_SCR3C_R3_0_CT_SHIFT (0U)
+#define TRNG_SCR3C_R3_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_0_CT_SHIFT)) & TRNG_SCR3C_R3_0_CT_MASK)
+#define TRNG_SCR3C_R3_1_CT_MASK  (0x1FFF0000U)
+#define TRNG_SCR3C_R3_1_CT_SHIFT (16U)
+#define TRNG_SCR3C_R3_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3C_R3_1_CT_SHIFT)) & TRNG_SCR3C_R3_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR3L - Statistical Check Run Length 3 Limit Register */
 /*! @{ */
-#define TRNG_SCR3L_RUN3_MAX_MASK                 (0x1FFFU)
-#define TRNG_SCR3L_RUN3_MAX_SHIFT                (0U)
-#define TRNG_SCR3L_RUN3_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_MAX_SHIFT)) & TRNG_SCR3L_RUN3_MAX_MASK)
-#define TRNG_SCR3L_RUN3_RNG_MASK                 (0x1FFF0000U)
-#define TRNG_SCR3L_RUN3_RNG_SHIFT                (16U)
-#define TRNG_SCR3L_RUN3_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_RNG_SHIFT)) & TRNG_SCR3L_RUN3_RNG_MASK)
+#define TRNG_SCR3L_RUN3_MAX_MASK  (0x1FFFU)
+#define TRNG_SCR3L_RUN3_MAX_SHIFT (0U)
+#define TRNG_SCR3L_RUN3_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_MAX_SHIFT)) & TRNG_SCR3L_RUN3_MAX_MASK)
+#define TRNG_SCR3L_RUN3_RNG_MASK  (0x1FFF0000U)
+#define TRNG_SCR3L_RUN3_RNG_SHIFT (16U)
+#define TRNG_SCR3L_RUN3_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR3L_RUN3_RNG_SHIFT)) & TRNG_SCR3L_RUN3_RNG_MASK)
 /*! @} */
 
 /*! @name SCR4C - Statistical Check Run Length 4 Count Register */
 /*! @{ */
-#define TRNG_SCR4C_R4_0_CT_MASK                  (0xFFFU)
-#define TRNG_SCR4C_R4_0_CT_SHIFT                 (0U)
-#define TRNG_SCR4C_R4_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_0_CT_SHIFT)) & TRNG_SCR4C_R4_0_CT_MASK)
-#define TRNG_SCR4C_R4_1_CT_MASK                  (0xFFF0000U)
-#define TRNG_SCR4C_R4_1_CT_SHIFT                 (16U)
-#define TRNG_SCR4C_R4_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_1_CT_SHIFT)) & TRNG_SCR4C_R4_1_CT_MASK)
+#define TRNG_SCR4C_R4_0_CT_MASK  (0xFFFU)
+#define TRNG_SCR4C_R4_0_CT_SHIFT (0U)
+#define TRNG_SCR4C_R4_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_0_CT_SHIFT)) & TRNG_SCR4C_R4_0_CT_MASK)
+#define TRNG_SCR4C_R4_1_CT_MASK  (0xFFF0000U)
+#define TRNG_SCR4C_R4_1_CT_SHIFT (16U)
+#define TRNG_SCR4C_R4_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4C_R4_1_CT_SHIFT)) & TRNG_SCR4C_R4_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR4L - Statistical Check Run Length 4 Limit Register */
 /*! @{ */
-#define TRNG_SCR4L_RUN4_MAX_MASK                 (0xFFFU)
-#define TRNG_SCR4L_RUN4_MAX_SHIFT                (0U)
-#define TRNG_SCR4L_RUN4_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_MAX_SHIFT)) & TRNG_SCR4L_RUN4_MAX_MASK)
-#define TRNG_SCR4L_RUN4_RNG_MASK                 (0xFFF0000U)
-#define TRNG_SCR4L_RUN4_RNG_SHIFT                (16U)
-#define TRNG_SCR4L_RUN4_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_RNG_SHIFT)) & TRNG_SCR4L_RUN4_RNG_MASK)
+#define TRNG_SCR4L_RUN4_MAX_MASK  (0xFFFU)
+#define TRNG_SCR4L_RUN4_MAX_SHIFT (0U)
+#define TRNG_SCR4L_RUN4_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_MAX_SHIFT)) & TRNG_SCR4L_RUN4_MAX_MASK)
+#define TRNG_SCR4L_RUN4_RNG_MASK  (0xFFF0000U)
+#define TRNG_SCR4L_RUN4_RNG_SHIFT (16U)
+#define TRNG_SCR4L_RUN4_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR4L_RUN4_RNG_SHIFT)) & TRNG_SCR4L_RUN4_RNG_MASK)
 /*! @} */
 
 /*! @name SCR5C - Statistical Check Run Length 5 Count Register */
 /*! @{ */
-#define TRNG_SCR5C_R5_0_CT_MASK                  (0x7FFU)
-#define TRNG_SCR5C_R5_0_CT_SHIFT                 (0U)
-#define TRNG_SCR5C_R5_0_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_0_CT_SHIFT)) & TRNG_SCR5C_R5_0_CT_MASK)
-#define TRNG_SCR5C_R5_1_CT_MASK                  (0x7FF0000U)
-#define TRNG_SCR5C_R5_1_CT_SHIFT                 (16U)
-#define TRNG_SCR5C_R5_1_CT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_1_CT_SHIFT)) & TRNG_SCR5C_R5_1_CT_MASK)
+#define TRNG_SCR5C_R5_0_CT_MASK  (0x7FFU)
+#define TRNG_SCR5C_R5_0_CT_SHIFT (0U)
+#define TRNG_SCR5C_R5_0_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_0_CT_SHIFT)) & TRNG_SCR5C_R5_0_CT_MASK)
+#define TRNG_SCR5C_R5_1_CT_MASK  (0x7FF0000U)
+#define TRNG_SCR5C_R5_1_CT_SHIFT (16U)
+#define TRNG_SCR5C_R5_1_CT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5C_R5_1_CT_SHIFT)) & TRNG_SCR5C_R5_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR5L - Statistical Check Run Length 5 Limit Register */
 /*! @{ */
-#define TRNG_SCR5L_RUN5_MAX_MASK                 (0x7FFU)
-#define TRNG_SCR5L_RUN5_MAX_SHIFT                (0U)
-#define TRNG_SCR5L_RUN5_MAX(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_MAX_SHIFT)) & TRNG_SCR5L_RUN5_MAX_MASK)
-#define TRNG_SCR5L_RUN5_RNG_MASK                 (0x7FF0000U)
-#define TRNG_SCR5L_RUN5_RNG_SHIFT                (16U)
-#define TRNG_SCR5L_RUN5_RNG(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_RNG_SHIFT)) & TRNG_SCR5L_RUN5_RNG_MASK)
+#define TRNG_SCR5L_RUN5_MAX_MASK  (0x7FFU)
+#define TRNG_SCR5L_RUN5_MAX_SHIFT (0U)
+#define TRNG_SCR5L_RUN5_MAX(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_MAX_SHIFT)) & TRNG_SCR5L_RUN5_MAX_MASK)
+#define TRNG_SCR5L_RUN5_RNG_MASK  (0x7FF0000U)
+#define TRNG_SCR5L_RUN5_RNG_SHIFT (16U)
+#define TRNG_SCR5L_RUN5_RNG(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR5L_RUN5_RNG_SHIFT)) & TRNG_SCR5L_RUN5_RNG_MASK)
 /*! @} */
 
 /*! @name SCR6PC - Statistical Check Run Length 6+ Count Register */
 /*! @{ */
-#define TRNG_SCR6PC_R6P_0_CT_MASK                (0x7FFU)
-#define TRNG_SCR6PC_R6P_0_CT_SHIFT               (0U)
-#define TRNG_SCR6PC_R6P_0_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_0_CT_SHIFT)) & TRNG_SCR6PC_R6P_0_CT_MASK)
-#define TRNG_SCR6PC_R6P_1_CT_MASK                (0x7FF0000U)
-#define TRNG_SCR6PC_R6P_1_CT_SHIFT               (16U)
-#define TRNG_SCR6PC_R6P_1_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_1_CT_SHIFT)) & TRNG_SCR6PC_R6P_1_CT_MASK)
+#define TRNG_SCR6PC_R6P_0_CT_MASK  (0x7FFU)
+#define TRNG_SCR6PC_R6P_0_CT_SHIFT (0U)
+#define TRNG_SCR6PC_R6P_0_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_0_CT_SHIFT)) & TRNG_SCR6PC_R6P_0_CT_MASK)
+#define TRNG_SCR6PC_R6P_1_CT_MASK  (0x7FF0000U)
+#define TRNG_SCR6PC_R6P_1_CT_SHIFT (16U)
+#define TRNG_SCR6PC_R6P_1_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PC_R6P_1_CT_SHIFT)) & TRNG_SCR6PC_R6P_1_CT_MASK)
 /*! @} */
 
 /*! @name SCR6PL - Statistical Check Run Length 6+ Limit Register */
 /*! @{ */
-#define TRNG_SCR6PL_RUN6P_MAX_MASK               (0x7FFU)
-#define TRNG_SCR6PL_RUN6P_MAX_SHIFT              (0U)
-#define TRNG_SCR6PL_RUN6P_MAX(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_MAX_SHIFT)) & TRNG_SCR6PL_RUN6P_MAX_MASK)
-#define TRNG_SCR6PL_RUN6P_RNG_MASK               (0x7FF0000U)
-#define TRNG_SCR6PL_RUN6P_RNG_SHIFT              (16U)
-#define TRNG_SCR6PL_RUN6P_RNG(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_RNG_SHIFT)) & TRNG_SCR6PL_RUN6P_RNG_MASK)
+#define TRNG_SCR6PL_RUN6P_MAX_MASK  (0x7FFU)
+#define TRNG_SCR6PL_RUN6P_MAX_SHIFT (0U)
+#define TRNG_SCR6PL_RUN6P_MAX(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_MAX_SHIFT)) & TRNG_SCR6PL_RUN6P_MAX_MASK)
+#define TRNG_SCR6PL_RUN6P_RNG_MASK  (0x7FF0000U)
+#define TRNG_SCR6PL_RUN6P_RNG_SHIFT (16U)
+#define TRNG_SCR6PL_RUN6P_RNG(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SCR6PL_RUN6P_RNG_SHIFT)) & TRNG_SCR6PL_RUN6P_RNG_MASK)
 /*! @} */
 
 /*! @name STATUS - Status Register */
 /*! @{ */
-#define TRNG_STATUS_TF1BR0_MASK                  (0x1U)
-#define TRNG_STATUS_TF1BR0_SHIFT                 (0U)
-#define TRNG_STATUS_TF1BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR0_SHIFT)) & TRNG_STATUS_TF1BR0_MASK)
-#define TRNG_STATUS_TF1BR1_MASK                  (0x2U)
-#define TRNG_STATUS_TF1BR1_SHIFT                 (1U)
-#define TRNG_STATUS_TF1BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR1_SHIFT)) & TRNG_STATUS_TF1BR1_MASK)
-#define TRNG_STATUS_TF2BR0_MASK                  (0x4U)
-#define TRNG_STATUS_TF2BR0_SHIFT                 (2U)
-#define TRNG_STATUS_TF2BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR0_SHIFT)) & TRNG_STATUS_TF2BR0_MASK)
-#define TRNG_STATUS_TF2BR1_MASK                  (0x8U)
-#define TRNG_STATUS_TF2BR1_SHIFT                 (3U)
-#define TRNG_STATUS_TF2BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR1_SHIFT)) & TRNG_STATUS_TF2BR1_MASK)
-#define TRNG_STATUS_TF3BR0_MASK                  (0x10U)
-#define TRNG_STATUS_TF3BR0_SHIFT                 (4U)
-#define TRNG_STATUS_TF3BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR0_SHIFT)) & TRNG_STATUS_TF3BR0_MASK)
-#define TRNG_STATUS_TF3BR1_MASK                  (0x20U)
-#define TRNG_STATUS_TF3BR1_SHIFT                 (5U)
-#define TRNG_STATUS_TF3BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR1_SHIFT)) & TRNG_STATUS_TF3BR1_MASK)
-#define TRNG_STATUS_TF4BR0_MASK                  (0x40U)
-#define TRNG_STATUS_TF4BR0_SHIFT                 (6U)
-#define TRNG_STATUS_TF4BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR0_SHIFT)) & TRNG_STATUS_TF4BR0_MASK)
-#define TRNG_STATUS_TF4BR1_MASK                  (0x80U)
-#define TRNG_STATUS_TF4BR1_SHIFT                 (7U)
-#define TRNG_STATUS_TF4BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
-#define TRNG_STATUS_TF5BR0_MASK                  (0x100U)
-#define TRNG_STATUS_TF5BR0_SHIFT                 (8U)
-#define TRNG_STATUS_TF5BR0(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR0_SHIFT)) & TRNG_STATUS_TF5BR0_MASK)
-#define TRNG_STATUS_TF5BR1_MASK                  (0x200U)
-#define TRNG_STATUS_TF5BR1_SHIFT                 (9U)
-#define TRNG_STATUS_TF5BR1(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR1_SHIFT)) & TRNG_STATUS_TF5BR1_MASK)
-#define TRNG_STATUS_TF6PBR0_MASK                 (0x400U)
-#define TRNG_STATUS_TF6PBR0_SHIFT                (10U)
-#define TRNG_STATUS_TF6PBR0(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR0_SHIFT)) & TRNG_STATUS_TF6PBR0_MASK)
-#define TRNG_STATUS_TF6PBR1_MASK                 (0x800U)
-#define TRNG_STATUS_TF6PBR1_SHIFT                (11U)
-#define TRNG_STATUS_TF6PBR1(x)                   (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR1_SHIFT)) & TRNG_STATUS_TF6PBR1_MASK)
-#define TRNG_STATUS_TFSB_MASK                    (0x1000U)
-#define TRNG_STATUS_TFSB_SHIFT                   (12U)
-#define TRNG_STATUS_TFSB(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFSB_SHIFT)) & TRNG_STATUS_TFSB_MASK)
-#define TRNG_STATUS_TFLR_MASK                    (0x2000U)
-#define TRNG_STATUS_TFLR_SHIFT                   (13U)
-#define TRNG_STATUS_TFLR(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFLR_SHIFT)) & TRNG_STATUS_TFLR_MASK)
-#define TRNG_STATUS_TFP_MASK                     (0x4000U)
-#define TRNG_STATUS_TFP_SHIFT                    (14U)
-#define TRNG_STATUS_TFP(x)                       (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFP_SHIFT)) & TRNG_STATUS_TFP_MASK)
-#define TRNG_STATUS_TFMB_MASK                    (0x8000U)
-#define TRNG_STATUS_TFMB_SHIFT                   (15U)
-#define TRNG_STATUS_TFMB(x)                      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFMB_SHIFT)) & TRNG_STATUS_TFMB_MASK)
-#define TRNG_STATUS_RETRY_CT_MASK                (0xF0000U)
-#define TRNG_STATUS_RETRY_CT_SHIFT               (16U)
-#define TRNG_STATUS_RETRY_CT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_RETRY_CT_SHIFT)) & TRNG_STATUS_RETRY_CT_MASK)
+#define TRNG_STATUS_TF1BR0_MASK    (0x1U)
+#define TRNG_STATUS_TF1BR0_SHIFT   (0U)
+#define TRNG_STATUS_TF1BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR0_SHIFT)) & TRNG_STATUS_TF1BR0_MASK)
+#define TRNG_STATUS_TF1BR1_MASK    (0x2U)
+#define TRNG_STATUS_TF1BR1_SHIFT   (1U)
+#define TRNG_STATUS_TF1BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR1_SHIFT)) & TRNG_STATUS_TF1BR1_MASK)
+#define TRNG_STATUS_TF2BR0_MASK    (0x4U)
+#define TRNG_STATUS_TF2BR0_SHIFT   (2U)
+#define TRNG_STATUS_TF2BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR0_SHIFT)) & TRNG_STATUS_TF2BR0_MASK)
+#define TRNG_STATUS_TF2BR1_MASK    (0x8U)
+#define TRNG_STATUS_TF2BR1_SHIFT   (3U)
+#define TRNG_STATUS_TF2BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR1_SHIFT)) & TRNG_STATUS_TF2BR1_MASK)
+#define TRNG_STATUS_TF3BR0_MASK    (0x10U)
+#define TRNG_STATUS_TF3BR0_SHIFT   (4U)
+#define TRNG_STATUS_TF3BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR0_SHIFT)) & TRNG_STATUS_TF3BR0_MASK)
+#define TRNG_STATUS_TF3BR1_MASK    (0x20U)
+#define TRNG_STATUS_TF3BR1_SHIFT   (5U)
+#define TRNG_STATUS_TF3BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR1_SHIFT)) & TRNG_STATUS_TF3BR1_MASK)
+#define TRNG_STATUS_TF4BR0_MASK    (0x40U)
+#define TRNG_STATUS_TF4BR0_SHIFT   (6U)
+#define TRNG_STATUS_TF4BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR0_SHIFT)) & TRNG_STATUS_TF4BR0_MASK)
+#define TRNG_STATUS_TF4BR1_MASK    (0x80U)
+#define TRNG_STATUS_TF4BR1_SHIFT   (7U)
+#define TRNG_STATUS_TF4BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
+#define TRNG_STATUS_TF5BR0_MASK    (0x100U)
+#define TRNG_STATUS_TF5BR0_SHIFT   (8U)
+#define TRNG_STATUS_TF5BR0(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR0_SHIFT)) & TRNG_STATUS_TF5BR0_MASK)
+#define TRNG_STATUS_TF5BR1_MASK    (0x200U)
+#define TRNG_STATUS_TF5BR1_SHIFT   (9U)
+#define TRNG_STATUS_TF5BR1(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR1_SHIFT)) & TRNG_STATUS_TF5BR1_MASK)
+#define TRNG_STATUS_TF6PBR0_MASK   (0x400U)
+#define TRNG_STATUS_TF6PBR0_SHIFT  (10U)
+#define TRNG_STATUS_TF6PBR0(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR0_SHIFT)) & TRNG_STATUS_TF6PBR0_MASK)
+#define TRNG_STATUS_TF6PBR1_MASK   (0x800U)
+#define TRNG_STATUS_TF6PBR1_SHIFT  (11U)
+#define TRNG_STATUS_TF6PBR1(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR1_SHIFT)) & TRNG_STATUS_TF6PBR1_MASK)
+#define TRNG_STATUS_TFSB_MASK      (0x1000U)
+#define TRNG_STATUS_TFSB_SHIFT     (12U)
+#define TRNG_STATUS_TFSB(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFSB_SHIFT)) & TRNG_STATUS_TFSB_MASK)
+#define TRNG_STATUS_TFLR_MASK      (0x2000U)
+#define TRNG_STATUS_TFLR_SHIFT     (13U)
+#define TRNG_STATUS_TFLR(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFLR_SHIFT)) & TRNG_STATUS_TFLR_MASK)
+#define TRNG_STATUS_TFP_MASK       (0x4000U)
+#define TRNG_STATUS_TFP_SHIFT      (14U)
+#define TRNG_STATUS_TFP(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFP_SHIFT)) & TRNG_STATUS_TFP_MASK)
+#define TRNG_STATUS_TFMB_MASK      (0x8000U)
+#define TRNG_STATUS_TFMB_SHIFT     (15U)
+#define TRNG_STATUS_TFMB(x)        (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFMB_SHIFT)) & TRNG_STATUS_TFMB_MASK)
+#define TRNG_STATUS_RETRY_CT_MASK  (0xF0000U)
+#define TRNG_STATUS_RETRY_CT_SHIFT (16U)
+#define TRNG_STATUS_RETRY_CT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_RETRY_CT_SHIFT)) & TRNG_STATUS_RETRY_CT_MASK)
 /*! @} */
 
 /*! @name ENT - Entropy Read Register */
 /*! @{ */
-#define TRNG_ENT_ENT_MASK                        (0xFFFFFFFFU)
-#define TRNG_ENT_ENT_SHIFT                       (0U)
-#define TRNG_ENT_ENT(x)                          (((uint32_t)(((uint32_t)(x)) << TRNG_ENT_ENT_SHIFT)) & TRNG_ENT_ENT_MASK)
+#define TRNG_ENT_ENT_MASK  (0xFFFFFFFFU)
+#define TRNG_ENT_ENT_SHIFT (0U)
+#define TRNG_ENT_ENT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_ENT_ENT_SHIFT)) & TRNG_ENT_ENT_MASK)
 /*! @} */
 
 /* The count of TRNG_ENT */
-#define TRNG_ENT_COUNT                           (16U)
+#define TRNG_ENT_COUNT (16U)
 
 /*! @name PKRCNT10 - Statistical Check Poker Count 1 and 0 Register */
 /*! @{ */
-#define TRNG_PKRCNT10_PKR_0_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT10_PKR_0_CT_SHIFT             (0U)
-#define TRNG_PKRCNT10_PKR_0_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_0_CT_SHIFT)) & TRNG_PKRCNT10_PKR_0_CT_MASK)
-#define TRNG_PKRCNT10_PKR_1_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT10_PKR_1_CT_SHIFT             (16U)
-#define TRNG_PKRCNT10_PKR_1_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_1_CT_SHIFT)) & TRNG_PKRCNT10_PKR_1_CT_MASK)
+#define TRNG_PKRCNT10_PKR_0_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT10_PKR_0_CT_SHIFT (0U)
+#define TRNG_PKRCNT10_PKR_0_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_0_CT_SHIFT)) & TRNG_PKRCNT10_PKR_0_CT_MASK)
+#define TRNG_PKRCNT10_PKR_1_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT10_PKR_1_CT_SHIFT (16U)
+#define TRNG_PKRCNT10_PKR_1_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT10_PKR_1_CT_SHIFT)) & TRNG_PKRCNT10_PKR_1_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT32 - Statistical Check Poker Count 3 and 2 Register */
 /*! @{ */
-#define TRNG_PKRCNT32_PKR_2_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT32_PKR_2_CT_SHIFT             (0U)
-#define TRNG_PKRCNT32_PKR_2_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_2_CT_SHIFT)) & TRNG_PKRCNT32_PKR_2_CT_MASK)
-#define TRNG_PKRCNT32_PKR_3_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT32_PKR_3_CT_SHIFT             (16U)
-#define TRNG_PKRCNT32_PKR_3_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_3_CT_SHIFT)) & TRNG_PKRCNT32_PKR_3_CT_MASK)
+#define TRNG_PKRCNT32_PKR_2_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT32_PKR_2_CT_SHIFT (0U)
+#define TRNG_PKRCNT32_PKR_2_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_2_CT_SHIFT)) & TRNG_PKRCNT32_PKR_2_CT_MASK)
+#define TRNG_PKRCNT32_PKR_3_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT32_PKR_3_CT_SHIFT (16U)
+#define TRNG_PKRCNT32_PKR_3_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT32_PKR_3_CT_SHIFT)) & TRNG_PKRCNT32_PKR_3_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT54 - Statistical Check Poker Count 5 and 4 Register */
 /*! @{ */
-#define TRNG_PKRCNT54_PKR_4_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT54_PKR_4_CT_SHIFT             (0U)
-#define TRNG_PKRCNT54_PKR_4_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_4_CT_SHIFT)) & TRNG_PKRCNT54_PKR_4_CT_MASK)
-#define TRNG_PKRCNT54_PKR_5_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT54_PKR_5_CT_SHIFT             (16U)
-#define TRNG_PKRCNT54_PKR_5_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_5_CT_SHIFT)) & TRNG_PKRCNT54_PKR_5_CT_MASK)
+#define TRNG_PKRCNT54_PKR_4_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT54_PKR_4_CT_SHIFT (0U)
+#define TRNG_PKRCNT54_PKR_4_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_4_CT_SHIFT)) & TRNG_PKRCNT54_PKR_4_CT_MASK)
+#define TRNG_PKRCNT54_PKR_5_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT54_PKR_5_CT_SHIFT (16U)
+#define TRNG_PKRCNT54_PKR_5_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT54_PKR_5_CT_SHIFT)) & TRNG_PKRCNT54_PKR_5_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT76 - Statistical Check Poker Count 7 and 6 Register */
 /*! @{ */
-#define TRNG_PKRCNT76_PKR_6_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT76_PKR_6_CT_SHIFT             (0U)
-#define TRNG_PKRCNT76_PKR_6_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_6_CT_SHIFT)) & TRNG_PKRCNT76_PKR_6_CT_MASK)
-#define TRNG_PKRCNT76_PKR_7_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT76_PKR_7_CT_SHIFT             (16U)
-#define TRNG_PKRCNT76_PKR_7_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_7_CT_SHIFT)) & TRNG_PKRCNT76_PKR_7_CT_MASK)
+#define TRNG_PKRCNT76_PKR_6_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT76_PKR_6_CT_SHIFT (0U)
+#define TRNG_PKRCNT76_PKR_6_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_6_CT_SHIFT)) & TRNG_PKRCNT76_PKR_6_CT_MASK)
+#define TRNG_PKRCNT76_PKR_7_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT76_PKR_7_CT_SHIFT (16U)
+#define TRNG_PKRCNT76_PKR_7_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT76_PKR_7_CT_SHIFT)) & TRNG_PKRCNT76_PKR_7_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNT98 - Statistical Check Poker Count 9 and 8 Register */
 /*! @{ */
-#define TRNG_PKRCNT98_PKR_8_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNT98_PKR_8_CT_SHIFT             (0U)
-#define TRNG_PKRCNT98_PKR_8_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_8_CT_SHIFT)) & TRNG_PKRCNT98_PKR_8_CT_MASK)
-#define TRNG_PKRCNT98_PKR_9_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNT98_PKR_9_CT_SHIFT             (16U)
-#define TRNG_PKRCNT98_PKR_9_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_9_CT_SHIFT)) & TRNG_PKRCNT98_PKR_9_CT_MASK)
+#define TRNG_PKRCNT98_PKR_8_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNT98_PKR_8_CT_SHIFT (0U)
+#define TRNG_PKRCNT98_PKR_8_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_8_CT_SHIFT)) & TRNG_PKRCNT98_PKR_8_CT_MASK)
+#define TRNG_PKRCNT98_PKR_9_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNT98_PKR_9_CT_SHIFT (16U)
+#define TRNG_PKRCNT98_PKR_9_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNT98_PKR_9_CT_SHIFT)) & TRNG_PKRCNT98_PKR_9_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTBA - Statistical Check Poker Count B and A Register */
 /*! @{ */
-#define TRNG_PKRCNTBA_PKR_A_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTBA_PKR_A_CT_SHIFT             (0U)
-#define TRNG_PKRCNTBA_PKR_A_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_A_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_A_CT_MASK)
-#define TRNG_PKRCNTBA_PKR_B_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTBA_PKR_B_CT_SHIFT             (16U)
-#define TRNG_PKRCNTBA_PKR_B_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_B_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_B_CT_MASK)
+#define TRNG_PKRCNTBA_PKR_A_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTBA_PKR_A_CT_SHIFT (0U)
+#define TRNG_PKRCNTBA_PKR_A_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_A_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_A_CT_MASK)
+#define TRNG_PKRCNTBA_PKR_B_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTBA_PKR_B_CT_SHIFT (16U)
+#define TRNG_PKRCNTBA_PKR_B_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTBA_PKR_B_CT_SHIFT)) & TRNG_PKRCNTBA_PKR_B_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTDC - Statistical Check Poker Count D and C Register */
 /*! @{ */
-#define TRNG_PKRCNTDC_PKR_C_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTDC_PKR_C_CT_SHIFT             (0U)
-#define TRNG_PKRCNTDC_PKR_C_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_C_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_C_CT_MASK)
-#define TRNG_PKRCNTDC_PKR_D_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTDC_PKR_D_CT_SHIFT             (16U)
-#define TRNG_PKRCNTDC_PKR_D_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_D_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_D_CT_MASK)
+#define TRNG_PKRCNTDC_PKR_C_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTDC_PKR_C_CT_SHIFT (0U)
+#define TRNG_PKRCNTDC_PKR_C_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_C_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_C_CT_MASK)
+#define TRNG_PKRCNTDC_PKR_D_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTDC_PKR_D_CT_SHIFT (16U)
+#define TRNG_PKRCNTDC_PKR_D_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTDC_PKR_D_CT_SHIFT)) & TRNG_PKRCNTDC_PKR_D_CT_MASK)
 /*! @} */
 
 /*! @name PKRCNTFE - Statistical Check Poker Count F and E Register */
 /*! @{ */
-#define TRNG_PKRCNTFE_PKR_E_CT_MASK              (0xFFFFU)
-#define TRNG_PKRCNTFE_PKR_E_CT_SHIFT             (0U)
-#define TRNG_PKRCNTFE_PKR_E_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_E_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_E_CT_MASK)
-#define TRNG_PKRCNTFE_PKR_F_CT_MASK              (0xFFFF0000U)
-#define TRNG_PKRCNTFE_PKR_F_CT_SHIFT             (16U)
-#define TRNG_PKRCNTFE_PKR_F_CT(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_F_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_F_CT_MASK)
+#define TRNG_PKRCNTFE_PKR_E_CT_MASK  (0xFFFFU)
+#define TRNG_PKRCNTFE_PKR_E_CT_SHIFT (0U)
+#define TRNG_PKRCNTFE_PKR_E_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_E_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_E_CT_MASK)
+#define TRNG_PKRCNTFE_PKR_F_CT_MASK  (0xFFFF0000U)
+#define TRNG_PKRCNTFE_PKR_F_CT_SHIFT (16U)
+#define TRNG_PKRCNTFE_PKR_F_CT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_PKRCNTFE_PKR_F_CT_SHIFT)) & TRNG_PKRCNTFE_PKR_F_CT_MASK)
 /*! @} */
 
 /*! @name SEC_CFG - Security Configuration Register */
 /*! @{ */
-#define TRNG_SEC_CFG_UNUSED0_MASK                (0x1U)
-#define TRNG_SEC_CFG_UNUSED0_SHIFT               (0U)
-#define TRNG_SEC_CFG_UNUSED0(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED0_SHIFT)) & TRNG_SEC_CFG_UNUSED0_MASK)
-#define TRNG_SEC_CFG_NO_PRGM_MASK                (0x2U)
-#define TRNG_SEC_CFG_NO_PRGM_SHIFT               (1U)
-#define TRNG_SEC_CFG_NO_PRGM(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_NO_PRGM_SHIFT)) & TRNG_SEC_CFG_NO_PRGM_MASK)
-#define TRNG_SEC_CFG_UNUSED2_MASK                (0x4U)
-#define TRNG_SEC_CFG_UNUSED2_SHIFT               (2U)
-#define TRNG_SEC_CFG_UNUSED2(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED2_SHIFT)) & TRNG_SEC_CFG_UNUSED2_MASK)
+#define TRNG_SEC_CFG_UNUSED0_MASK  (0x1U)
+#define TRNG_SEC_CFG_UNUSED0_SHIFT (0U)
+#define TRNG_SEC_CFG_UNUSED0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED0_SHIFT)) & TRNG_SEC_CFG_UNUSED0_MASK)
+#define TRNG_SEC_CFG_NO_PRGM_MASK  (0x2U)
+#define TRNG_SEC_CFG_NO_PRGM_SHIFT (1U)
+#define TRNG_SEC_CFG_NO_PRGM(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_NO_PRGM_SHIFT)) & TRNG_SEC_CFG_NO_PRGM_MASK)
+#define TRNG_SEC_CFG_UNUSED2_MASK  (0x4U)
+#define TRNG_SEC_CFG_UNUSED2_SHIFT (2U)
+#define TRNG_SEC_CFG_UNUSED2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_SEC_CFG_UNUSED2_SHIFT)) & TRNG_SEC_CFG_UNUSED2_MASK)
 /*! @} */
 
 /*! @name INT_CTRL - Interrupt Control Register */
 /*! @{ */
-#define TRNG_INT_CTRL_HW_ERR_MASK                (0x1U)
-#define TRNG_INT_CTRL_HW_ERR_SHIFT               (0U)
-#define TRNG_INT_CTRL_HW_ERR(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_HW_ERR_SHIFT)) & TRNG_INT_CTRL_HW_ERR_MASK)
-#define TRNG_INT_CTRL_ENT_VAL_MASK               (0x2U)
-#define TRNG_INT_CTRL_ENT_VAL_SHIFT              (1U)
-#define TRNG_INT_CTRL_ENT_VAL(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_ENT_VAL_SHIFT)) & TRNG_INT_CTRL_ENT_VAL_MASK)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL_MASK           (0x4U)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT          (2U)
-#define TRNG_INT_CTRL_FRQ_CT_FAIL(x)             (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_CTRL_FRQ_CT_FAIL_MASK)
-#define TRNG_INT_CTRL_UNUSED_MASK                (0xFFFFFFF8U)
-#define TRNG_INT_CTRL_UNUSED_SHIFT               (3U)
-#define TRNG_INT_CTRL_UNUSED(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_UNUSED_SHIFT)) & TRNG_INT_CTRL_UNUSED_MASK)
+#define TRNG_INT_CTRL_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_CTRL_HW_ERR_SHIFT (0U)
+#define TRNG_INT_CTRL_HW_ERR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_HW_ERR_SHIFT)) & TRNG_INT_CTRL_HW_ERR_MASK)
+#define TRNG_INT_CTRL_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_CTRL_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_CTRL_ENT_VAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_ENT_VAL_SHIFT)) & TRNG_INT_CTRL_ENT_VAL_MASK)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_CTRL_FRQ_CT_FAIL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_CTRL_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_CTRL_UNUSED_MASK  (0xFFFFFFF8U)
+#define TRNG_INT_CTRL_UNUSED_SHIFT (3U)
+#define TRNG_INT_CTRL_UNUSED(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_CTRL_UNUSED_SHIFT)) & TRNG_INT_CTRL_UNUSED_MASK)
 /*! @} */
 
 /*! @name INT_MASK - Mask Register */
 /*! @{ */
-#define TRNG_INT_MASK_HW_ERR_MASK                (0x1U)
-#define TRNG_INT_MASK_HW_ERR_SHIFT               (0U)
-#define TRNG_INT_MASK_HW_ERR(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_HW_ERR_SHIFT)) & TRNG_INT_MASK_HW_ERR_MASK)
-#define TRNG_INT_MASK_ENT_VAL_MASK               (0x2U)
-#define TRNG_INT_MASK_ENT_VAL_SHIFT              (1U)
-#define TRNG_INT_MASK_ENT_VAL(x)                 (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_ENT_VAL_SHIFT)) & TRNG_INT_MASK_ENT_VAL_MASK)
-#define TRNG_INT_MASK_FRQ_CT_FAIL_MASK           (0x4U)
-#define TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT          (2U)
-#define TRNG_INT_MASK_FRQ_CT_FAIL(x)             (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_MASK_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_MASK_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_MASK_HW_ERR_SHIFT (0U)
+#define TRNG_INT_MASK_HW_ERR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_HW_ERR_SHIFT)) & TRNG_INT_MASK_HW_ERR_MASK)
+#define TRNG_INT_MASK_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_MASK_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_MASK_ENT_VAL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_ENT_VAL_SHIFT)) & TRNG_INT_MASK_ENT_VAL_MASK)
+#define TRNG_INT_MASK_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_MASK_FRQ_CT_FAIL(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_MASK_FRQ_CT_FAIL_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status Register */
 /*! @{ */
-#define TRNG_INT_STATUS_HW_ERR_MASK              (0x1U)
-#define TRNG_INT_STATUS_HW_ERR_SHIFT             (0U)
-#define TRNG_INT_STATUS_HW_ERR(x)                (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_HW_ERR_SHIFT)) & TRNG_INT_STATUS_HW_ERR_MASK)
-#define TRNG_INT_STATUS_ENT_VAL_MASK             (0x2U)
-#define TRNG_INT_STATUS_ENT_VAL_SHIFT            (1U)
-#define TRNG_INT_STATUS_ENT_VAL(x)               (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_ENT_VAL_SHIFT)) & TRNG_INT_STATUS_ENT_VAL_MASK)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL_MASK         (0x4U)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT        (2U)
-#define TRNG_INT_STATUS_FRQ_CT_FAIL(x)           (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_STATUS_FRQ_CT_FAIL_MASK)
+#define TRNG_INT_STATUS_HW_ERR_MASK  (0x1U)
+#define TRNG_INT_STATUS_HW_ERR_SHIFT (0U)
+#define TRNG_INT_STATUS_HW_ERR(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_HW_ERR_SHIFT)) & TRNG_INT_STATUS_HW_ERR_MASK)
+#define TRNG_INT_STATUS_ENT_VAL_MASK  (0x2U)
+#define TRNG_INT_STATUS_ENT_VAL_SHIFT (1U)
+#define TRNG_INT_STATUS_ENT_VAL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_ENT_VAL_SHIFT)) & TRNG_INT_STATUS_ENT_VAL_MASK)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL_MASK  (0x4U)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT (2U)
+#define TRNG_INT_STATUS_FRQ_CT_FAIL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT)) & TRNG_INT_STATUS_FRQ_CT_FAIL_MASK)
 /*! @} */
 
 /*! @name VID1 - Version ID Register (MS) */
 /*! @{ */
-#define TRNG_VID1_MIN_REV_MASK                   (0xFFU)
-#define TRNG_VID1_MIN_REV_SHIFT                  (0U)
-#define TRNG_VID1_MIN_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MIN_REV_SHIFT)) & TRNG_VID1_MIN_REV_MASK)
-#define TRNG_VID1_MAJ_REV_MASK                   (0xFF00U)
-#define TRNG_VID1_MAJ_REV_SHIFT                  (8U)
-#define TRNG_VID1_MAJ_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MAJ_REV_SHIFT)) & TRNG_VID1_MAJ_REV_MASK)
-#define TRNG_VID1_IP_ID_MASK                     (0xFFFF0000U)
-#define TRNG_VID1_IP_ID_SHIFT                    (16U)
-#define TRNG_VID1_IP_ID(x)                       (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_IP_ID_SHIFT)) & TRNG_VID1_IP_ID_MASK)
+#define TRNG_VID1_MIN_REV_MASK  (0xFFU)
+#define TRNG_VID1_MIN_REV_SHIFT (0U)
+#define TRNG_VID1_MIN_REV(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MIN_REV_SHIFT)) & TRNG_VID1_MIN_REV_MASK)
+#define TRNG_VID1_MAJ_REV_MASK  (0xFF00U)
+#define TRNG_VID1_MAJ_REV_SHIFT (8U)
+#define TRNG_VID1_MAJ_REV(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_MAJ_REV_SHIFT)) & TRNG_VID1_MAJ_REV_MASK)
+#define TRNG_VID1_IP_ID_MASK    (0xFFFF0000U)
+#define TRNG_VID1_IP_ID_SHIFT   (16U)
+#define TRNG_VID1_IP_ID(x)      (((uint32_t)(((uint32_t)(x)) << TRNG_VID1_IP_ID_SHIFT)) & TRNG_VID1_IP_ID_MASK)
 /*! @} */
 
 /*! @name VID2 - Version ID Register (LS) */
 /*! @{ */
-#define TRNG_VID2_CONFIG_OPT_MASK                (0xFFU)
-#define TRNG_VID2_CONFIG_OPT_SHIFT               (0U)
-#define TRNG_VID2_CONFIG_OPT(x)                  (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_CONFIG_OPT_SHIFT)) & TRNG_VID2_CONFIG_OPT_MASK)
-#define TRNG_VID2_ECO_REV_MASK                   (0xFF00U)
-#define TRNG_VID2_ECO_REV_SHIFT                  (8U)
-#define TRNG_VID2_ECO_REV(x)                     (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
-#define TRNG_VID2_INTG_OPT_MASK                  (0xFF0000U)
-#define TRNG_VID2_INTG_OPT_SHIFT                 (16U)
-#define TRNG_VID2_INTG_OPT(x)                    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_INTG_OPT_SHIFT)) & TRNG_VID2_INTG_OPT_MASK)
-#define TRNG_VID2_ERA_MASK                       (0xFF000000U)
-#define TRNG_VID2_ERA_SHIFT                      (24U)
-#define TRNG_VID2_ERA(x)                         (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ERA_SHIFT)) & TRNG_VID2_ERA_MASK)
+#define TRNG_VID2_CONFIG_OPT_MASK  (0xFFU)
+#define TRNG_VID2_CONFIG_OPT_SHIFT (0U)
+#define TRNG_VID2_CONFIG_OPT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_CONFIG_OPT_SHIFT)) & TRNG_VID2_CONFIG_OPT_MASK)
+#define TRNG_VID2_ECO_REV_MASK   (0xFF00U)
+#define TRNG_VID2_ECO_REV_SHIFT  (8U)
+#define TRNG_VID2_ECO_REV(x)     (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
+#define TRNG_VID2_INTG_OPT_MASK  (0xFF0000U)
+#define TRNG_VID2_INTG_OPT_SHIFT (16U)
+#define TRNG_VID2_INTG_OPT(x)    (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_INTG_OPT_SHIFT)) & TRNG_VID2_INTG_OPT_MASK)
+#define TRNG_VID2_ERA_MASK       (0xFF000000U)
+#define TRNG_VID2_ERA_SHIFT      (24U)
+#define TRNG_VID2_ERA(x)         (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ERA_SHIFT)) & TRNG_VID2_ERA_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TRNG_Register_Masks */
 
-
 /* TRNG - Peripheral instance base addresses */
 /** Peripheral TRNG base address */
-#define TRNG_BASE                                (0x400CC000u)
+#define TRNG_BASE (0x400CC000u)
 /** Peripheral TRNG base pointer */
-#define TRNG                                     ((TRNG_Type *)TRNG_BASE)
+#define TRNG ((TRNG_Type *)TRNG_BASE)
 /** Array initializer of TRNG peripheral base addresses */
-#define TRNG_BASE_ADDRS                          { TRNG_BASE }
+#define TRNG_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        TRNG_BASE                                                                                                      \
+    }
 /** Array initializer of TRNG peripheral base pointers */
-#define TRNG_BASE_PTRS                           { TRNG }
+#define TRNG_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        TRNG                                                                                                           \
+    }
 /** Interrupt vectors for the TRNG peripheral type */
-#define TRNG_IRQS                                { TRNG_IRQn }
+#define TRNG_IRQS                                                                                                      \
+    {                                                                                                                  \
+        TRNG_IRQn                                                                                                      \
+    }
 
 /*!
  * @}
  */ /* end of group TRNG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- TSC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -21412,24 +24375,25 @@ typedef struct {
  */
 
 /** TSC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t BASIC_SETTING;                     /**< , offset: 0x0 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t PRE_CHARGE_TIME;                   /**< , offset: 0x10 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t FLOW_CONTROL;                      /**< Flow Control, offset: 0x20 */
-       uint8_t RESERVED_2[12];
-  __I  uint32_t MEASEURE_VALUE;                    /**< Measure Value, offset: 0x30 */
-       uint8_t RESERVED_3[12];
-  __IO uint32_t INT_EN;                            /**< Interrupt Enable, offset: 0x40 */
-       uint8_t RESERVED_4[12];
-  __IO uint32_t INT_SIG_EN;                        /**< Interrupt Signal Enable, offset: 0x50 */
-       uint8_t RESERVED_5[12];
-  __IO uint32_t INT_STATUS;                        /**< Intterrupt Status, offset: 0x60 */
-       uint8_t RESERVED_6[12];
-  __IO uint32_t DEBUG_MODE;                        /**< , offset: 0x70 */
-       uint8_t RESERVED_7[12];
-  __IO uint32_t DEBUG_MODE2;                       /**< , offset: 0x80 */
+typedef struct
+{
+    __IO uint32_t BASIC_SETTING; /**< , offset: 0x0 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t PRE_CHARGE_TIME; /**< , offset: 0x10 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t FLOW_CONTROL; /**< Flow Control, offset: 0x20 */
+    uint8_t RESERVED_2[12];
+    __I uint32_t MEASEURE_VALUE; /**< Measure Value, offset: 0x30 */
+    uint8_t RESERVED_3[12];
+    __IO uint32_t INT_EN; /**< Interrupt Enable, offset: 0x40 */
+    uint8_t RESERVED_4[12];
+    __IO uint32_t INT_SIG_EN; /**< Interrupt Signal Enable, offset: 0x50 */
+    uint8_t RESERVED_5[12];
+    __IO uint32_t INT_STATUS; /**< Intterrupt Status, offset: 0x60 */
+    uint8_t RESERVED_6[12];
+    __IO uint32_t DEBUG_MODE; /**< , offset: 0x70 */
+    uint8_t RESERVED_7[12];
+    __IO uint32_t DEBUG_MODE2; /**< , offset: 0x80 */
 } TSC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -21443,221 +24407,283 @@ typedef struct {
 
 /*! @name BASIC_SETTING -  */
 /*! @{ */
-#define TSC_BASIC_SETTING_AUTO_MEASURE_MASK      (0x1U)
-#define TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT     (0U)
-#define TSC_BASIC_SETTING_AUTO_MEASURE(x)        (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT)) & TSC_BASIC_SETTING_AUTO_MEASURE_MASK)
-#define TSC_BASIC_SETTING_4_5_WIRE_MASK          (0x10U)
-#define TSC_BASIC_SETTING_4_5_WIRE_SHIFT         (4U)
-#define TSC_BASIC_SETTING_4_5_WIRE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_4_5_WIRE_SHIFT)) & TSC_BASIC_SETTING_4_5_WIRE_MASK)
-#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK (0xFFFFFF00U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE_MASK  (0x1U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT (0U)
+#define TSC_BASIC_SETTING_AUTO_MEASURE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_AUTO_MEASURE_SHIFT)) & TSC_BASIC_SETTING_AUTO_MEASURE_MASK)
+#define TSC_BASIC_SETTING_4_5_WIRE_MASK  (0x10U)
+#define TSC_BASIC_SETTING_4_5_WIRE_SHIFT (4U)
+#define TSC_BASIC_SETTING_4_5_WIRE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_4_5_WIRE_SHIFT)) & TSC_BASIC_SETTING_4_5_WIRE_MASK)
+#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK  (0xFFFFFF00U)
 #define TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT (8U)
-#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME(x)  (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT)) & TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK)
+#define TSC_BASIC_SETTING_MEASURE_DELAY_TIME(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TSC_BASIC_SETTING_MEASURE_DELAY_TIME_SHIFT)) &                                     \
+     TSC_BASIC_SETTING_MEASURE_DELAY_TIME_MASK)
 /*! @} */
 
 /*! @name PRE_CHARGE_TIME -  */
 /*! @{ */
-#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK (0xFFFFFFFFU)
+#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK  (0xFFFFFFFFU)
 #define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT (0U)
-#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME(x)   (((uint32_t)(((uint32_t)(x)) << TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT)) & TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK)
+#define TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_SHIFT)) &                                      \
+     TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME_MASK)
 /*! @} */
 
 /*! @name FLOW_CONTROL - Flow Control */
 /*! @{ */
-#define TSC_FLOW_CONTROL_SW_RST_MASK             (0x1U)
-#define TSC_FLOW_CONTROL_SW_RST_SHIFT            (0U)
-#define TSC_FLOW_CONTROL_SW_RST(x)               (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_SW_RST_SHIFT)) & TSC_FLOW_CONTROL_SW_RST_MASK)
-#define TSC_FLOW_CONTROL_START_MEASURE_MASK      (0x10U)
-#define TSC_FLOW_CONTROL_START_MEASURE_SHIFT     (4U)
-#define TSC_FLOW_CONTROL_START_MEASURE(x)        (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_START_MEASURE_MASK)
-#define TSC_FLOW_CONTROL_DROP_MEASURE_MASK       (0x100U)
-#define TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT      (8U)
-#define TSC_FLOW_CONTROL_DROP_MEASURE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_DROP_MEASURE_MASK)
-#define TSC_FLOW_CONTROL_START_SENSE_MASK        (0x1000U)
-#define TSC_FLOW_CONTROL_START_SENSE_SHIFT       (12U)
-#define TSC_FLOW_CONTROL_START_SENSE(x)          (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_SENSE_SHIFT)) & TSC_FLOW_CONTROL_START_SENSE_MASK)
-#define TSC_FLOW_CONTROL_DISABLE_MASK            (0x10000U)
-#define TSC_FLOW_CONTROL_DISABLE_SHIFT           (16U)
-#define TSC_FLOW_CONTROL_DISABLE(x)              (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DISABLE_SHIFT)) & TSC_FLOW_CONTROL_DISABLE_MASK)
+#define TSC_FLOW_CONTROL_SW_RST_MASK  (0x1U)
+#define TSC_FLOW_CONTROL_SW_RST_SHIFT (0U)
+#define TSC_FLOW_CONTROL_SW_RST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_SW_RST_SHIFT)) & TSC_FLOW_CONTROL_SW_RST_MASK)
+#define TSC_FLOW_CONTROL_START_MEASURE_MASK  (0x10U)
+#define TSC_FLOW_CONTROL_START_MEASURE_SHIFT (4U)
+#define TSC_FLOW_CONTROL_START_MEASURE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_START_MEASURE_MASK)
+#define TSC_FLOW_CONTROL_DROP_MEASURE_MASK  (0x100U)
+#define TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT (8U)
+#define TSC_FLOW_CONTROL_DROP_MEASURE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DROP_MEASURE_SHIFT)) & TSC_FLOW_CONTROL_DROP_MEASURE_MASK)
+#define TSC_FLOW_CONTROL_START_SENSE_MASK  (0x1000U)
+#define TSC_FLOW_CONTROL_START_SENSE_SHIFT (12U)
+#define TSC_FLOW_CONTROL_START_SENSE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_START_SENSE_SHIFT)) & TSC_FLOW_CONTROL_START_SENSE_MASK)
+#define TSC_FLOW_CONTROL_DISABLE_MASK  (0x10000U)
+#define TSC_FLOW_CONTROL_DISABLE_SHIFT (16U)
+#define TSC_FLOW_CONTROL_DISABLE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TSC_FLOW_CONTROL_DISABLE_SHIFT)) & TSC_FLOW_CONTROL_DISABLE_MASK)
 /*! @} */
 
 /*! @name MEASEURE_VALUE - Measure Value */
 /*! @{ */
-#define TSC_MEASEURE_VALUE_Y_VALUE_MASK          (0xFFFU)
-#define TSC_MEASEURE_VALUE_Y_VALUE_SHIFT         (0U)
-#define TSC_MEASEURE_VALUE_Y_VALUE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_Y_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_Y_VALUE_MASK)
-#define TSC_MEASEURE_VALUE_X_VALUE_MASK          (0xFFF0000U)
-#define TSC_MEASEURE_VALUE_X_VALUE_SHIFT         (16U)
-#define TSC_MEASEURE_VALUE_X_VALUE(x)            (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_X_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_X_VALUE_MASK)
+#define TSC_MEASEURE_VALUE_Y_VALUE_MASK  (0xFFFU)
+#define TSC_MEASEURE_VALUE_Y_VALUE_SHIFT (0U)
+#define TSC_MEASEURE_VALUE_Y_VALUE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_Y_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_Y_VALUE_MASK)
+#define TSC_MEASEURE_VALUE_X_VALUE_MASK  (0xFFF0000U)
+#define TSC_MEASEURE_VALUE_X_VALUE_SHIFT (16U)
+#define TSC_MEASEURE_VALUE_X_VALUE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << TSC_MEASEURE_VALUE_X_VALUE_SHIFT)) & TSC_MEASEURE_VALUE_X_VALUE_MASK)
 /*! @} */
 
 /*! @name INT_EN - Interrupt Enable */
 /*! @{ */
-#define TSC_INT_EN_MEASURE_INT_EN_MASK           (0x1U)
-#define TSC_INT_EN_MEASURE_INT_EN_SHIFT          (0U)
-#define TSC_INT_EN_MEASURE_INT_EN(x)             (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_MEASURE_INT_EN_SHIFT)) & TSC_INT_EN_MEASURE_INT_EN_MASK)
-#define TSC_INT_EN_DETECT_INT_EN_MASK            (0x10U)
-#define TSC_INT_EN_DETECT_INT_EN_SHIFT           (4U)
-#define TSC_INT_EN_DETECT_INT_EN(x)              (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_DETECT_INT_EN_SHIFT)) & TSC_INT_EN_DETECT_INT_EN_MASK)
-#define TSC_INT_EN_IDLE_SW_INT_EN_MASK           (0x1000U)
-#define TSC_INT_EN_IDLE_SW_INT_EN_SHIFT          (12U)
-#define TSC_INT_EN_IDLE_SW_INT_EN(x)             (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_IDLE_SW_INT_EN_SHIFT)) & TSC_INT_EN_IDLE_SW_INT_EN_MASK)
+#define TSC_INT_EN_MEASURE_INT_EN_MASK  (0x1U)
+#define TSC_INT_EN_MEASURE_INT_EN_SHIFT (0U)
+#define TSC_INT_EN_MEASURE_INT_EN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_MEASURE_INT_EN_SHIFT)) & TSC_INT_EN_MEASURE_INT_EN_MASK)
+#define TSC_INT_EN_DETECT_INT_EN_MASK  (0x10U)
+#define TSC_INT_EN_DETECT_INT_EN_SHIFT (4U)
+#define TSC_INT_EN_DETECT_INT_EN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_DETECT_INT_EN_SHIFT)) & TSC_INT_EN_DETECT_INT_EN_MASK)
+#define TSC_INT_EN_IDLE_SW_INT_EN_MASK  (0x1000U)
+#define TSC_INT_EN_IDLE_SW_INT_EN_SHIFT (12U)
+#define TSC_INT_EN_IDLE_SW_INT_EN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_EN_IDLE_SW_INT_EN_SHIFT)) & TSC_INT_EN_IDLE_SW_INT_EN_MASK)
 /*! @} */
 
 /*! @name INT_SIG_EN - Interrupt Signal Enable */
 /*! @{ */
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK       (0x1U)
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT      (0U)
-#define TSC_INT_SIG_EN_MEASURE_SIG_EN(x)         (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN_MASK        (0x10U)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT       (4U)
-#define TSC_INT_SIG_EN_DETECT_SIG_EN(x)          (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_DETECT_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_VALID_SIG_EN_MASK         (0x100U)
-#define TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT        (8U)
-#define TSC_INT_SIG_EN_VALID_SIG_EN(x)           (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_VALID_SIG_EN_MASK)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK       (0x1000U)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT      (12U)
-#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN(x)         (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK  (0x1U)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT (0U)
+#define TSC_INT_SIG_EN_MEASURE_SIG_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_MEASURE_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_MEASURE_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN_MASK  (0x10U)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT (4U)
+#define TSC_INT_SIG_EN_DETECT_SIG_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_DETECT_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_DETECT_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_VALID_SIG_EN_MASK  (0x100U)
+#define TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT (8U)
+#define TSC_INT_SIG_EN_VALID_SIG_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_VALID_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_VALID_SIG_EN_MASK)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK  (0x1000U)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT (12U)
+#define TSC_INT_SIG_EN_IDLE_SW_SIG_EN(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_SIG_EN_IDLE_SW_SIG_EN_SHIFT)) & TSC_INT_SIG_EN_IDLE_SW_SIG_EN_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Intterrupt Status */
 /*! @{ */
-#define TSC_INT_STATUS_MEASURE_MASK              (0x1U)
-#define TSC_INT_STATUS_MEASURE_SHIFT             (0U)
-#define TSC_INT_STATUS_MEASURE(x)                (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_MEASURE_SHIFT)) & TSC_INT_STATUS_MEASURE_MASK)
-#define TSC_INT_STATUS_DETECT_MASK               (0x10U)
-#define TSC_INT_STATUS_DETECT_SHIFT              (4U)
-#define TSC_INT_STATUS_DETECT(x)                 (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_DETECT_SHIFT)) & TSC_INT_STATUS_DETECT_MASK)
-#define TSC_INT_STATUS_VALID_MASK                (0x100U)
-#define TSC_INT_STATUS_VALID_SHIFT               (8U)
-#define TSC_INT_STATUS_VALID(x)                  (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_VALID_SHIFT)) & TSC_INT_STATUS_VALID_MASK)
-#define TSC_INT_STATUS_IDLE_SW_MASK              (0x1000U)
-#define TSC_INT_STATUS_IDLE_SW_SHIFT             (12U)
-#define TSC_INT_STATUS_IDLE_SW(x)                (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_IDLE_SW_SHIFT)) & TSC_INT_STATUS_IDLE_SW_MASK)
+#define TSC_INT_STATUS_MEASURE_MASK  (0x1U)
+#define TSC_INT_STATUS_MEASURE_SHIFT (0U)
+#define TSC_INT_STATUS_MEASURE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_MEASURE_SHIFT)) & TSC_INT_STATUS_MEASURE_MASK)
+#define TSC_INT_STATUS_DETECT_MASK  (0x10U)
+#define TSC_INT_STATUS_DETECT_SHIFT (4U)
+#define TSC_INT_STATUS_DETECT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_DETECT_SHIFT)) & TSC_INT_STATUS_DETECT_MASK)
+#define TSC_INT_STATUS_VALID_MASK  (0x100U)
+#define TSC_INT_STATUS_VALID_SHIFT (8U)
+#define TSC_INT_STATUS_VALID(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_VALID_SHIFT)) & TSC_INT_STATUS_VALID_MASK)
+#define TSC_INT_STATUS_IDLE_SW_MASK  (0x1000U)
+#define TSC_INT_STATUS_IDLE_SW_SHIFT (12U)
+#define TSC_INT_STATUS_IDLE_SW(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_INT_STATUS_IDLE_SW_SHIFT)) & TSC_INT_STATUS_IDLE_SW_MASK)
 /*! @} */
 
 /*! @name DEBUG_MODE -  */
 /*! @{ */
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK       (0xFFFU)
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT      (0U)
-#define TSC_DEBUG_MODE_ADC_CONV_VALUE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT)) & TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_MASK             (0x1000U)
-#define TSC_DEBUG_MODE_ADC_COCO_SHIFT            (12U)
-#define TSC_DEBUG_MODE_ADC_COCO(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_MASK)
-#define TSC_DEBUG_MODE_EXT_HWTS_MASK             (0x1F0000U)
-#define TSC_DEBUG_MODE_EXT_HWTS_SHIFT            (16U)
-#define TSC_DEBUG_MODE_EXT_HWTS(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_EXT_HWTS_SHIFT)) & TSC_DEBUG_MODE_EXT_HWTS_MASK)
-#define TSC_DEBUG_MODE_TRIGGER_MASK              (0x1000000U)
-#define TSC_DEBUG_MODE_TRIGGER_SHIFT             (24U)
-#define TSC_DEBUG_MODE_TRIGGER(x)                (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_TRIGGER_SHIFT)) & TSC_DEBUG_MODE_TRIGGER_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK       (0x2000000U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT      (25U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK (0x4000000U)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK  (0xFFFU)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT (0U)
+#define TSC_DEBUG_MODE_ADC_CONV_VALUE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_CONV_VALUE_SHIFT)) & TSC_DEBUG_MODE_ADC_CONV_VALUE_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_MASK  (0x1000U)
+#define TSC_DEBUG_MODE_ADC_COCO_SHIFT (12U)
+#define TSC_DEBUG_MODE_ADC_COCO(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_MASK)
+#define TSC_DEBUG_MODE_EXT_HWTS_MASK  (0x1F0000U)
+#define TSC_DEBUG_MODE_EXT_HWTS_SHIFT (16U)
+#define TSC_DEBUG_MODE_EXT_HWTS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_EXT_HWTS_SHIFT)) & TSC_DEBUG_MODE_EXT_HWTS_MASK)
+#define TSC_DEBUG_MODE_TRIGGER_MASK  (0x1000000U)
+#define TSC_DEBUG_MODE_TRIGGER_SHIFT (24U)
+#define TSC_DEBUG_MODE_TRIGGER(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_TRIGGER_SHIFT)) & TSC_DEBUG_MODE_TRIGGER_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK  (0x2000000U)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT (25U)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK  (0x4000000U)
 #define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT (26U)
-#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT)) & TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK)
-#define TSC_DEBUG_MODE_DEBUG_EN_MASK             (0x10000000U)
-#define TSC_DEBUG_MODE_DEBUG_EN_SHIFT            (28U)
-#define TSC_DEBUG_MODE_DEBUG_EN(x)               (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_DEBUG_EN_SHIFT)) & TSC_DEBUG_MODE_DEBUG_EN_MASK)
+#define TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_SHIFT)) &                                    \
+     TSC_DEBUG_MODE_ADC_COCO_CLEAR_DISABLE_MASK)
+#define TSC_DEBUG_MODE_DEBUG_EN_MASK  (0x10000000U)
+#define TSC_DEBUG_MODE_DEBUG_EN_SHIFT (28U)
+#define TSC_DEBUG_MODE_DEBUG_EN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE_DEBUG_EN_SHIFT)) & TSC_DEBUG_MODE_DEBUG_EN_MASK)
 /*! @} */
 
 /*! @name DEBUG_MODE2 -  */
 /*! @{ */
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK      (0x1U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT     (0U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK        (0x2U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT       (1U)
-#define TSC_DEBUG_MODE2_XPUL_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK   (0x4U)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT  (2U)
-#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK      (0x8U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT     (3U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK        (0x10U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT       (4U)
-#define TSC_DEBUG_MODE2_XNUR_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK   (0x20U)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT  (5U)
-#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK      (0x40U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT     (6U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK        (0x80U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT       (7U)
-#define TSC_DEBUG_MODE2_YPLL_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK   (0x100U)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT  (8U)
-#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK      (0x200U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT     (9U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN(x)        (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK        (0x400U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT       (10U)
-#define TSC_DEBUG_MODE2_YNLR_PULL_UP(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK   (0x800U)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT  (11U)
-#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP(x)     (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK     (0x1000U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT    (12U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN(x)       (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK       (0x2000U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT      (13U)
-#define TSC_DEBUG_MODE2_WIPER_PULL_UP(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK  (0x1U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT (0U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK  (0x2U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT (1U)
+#define TSC_DEBUG_MODE2_XPUL_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK  (0x4U)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT (2U)
+#define TSC_DEBUG_MODE2_XPUL_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK  (0x8U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT (3U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK  (0x10U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT (4U)
+#define TSC_DEBUG_MODE2_XNUR_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK  (0x20U)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT (5U)
+#define TSC_DEBUG_MODE2_XNUR_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK  (0x40U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT (6U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK  (0x80U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT (7U)
+#define TSC_DEBUG_MODE2_YPLL_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK  (0x100U)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT (8U)
+#define TSC_DEBUG_MODE2_YPLL_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK  (0x200U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT (9U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_DOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK  (0x400U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT (10U)
+#define TSC_DEBUG_MODE2_YNLR_PULL_UP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK  (0x800U)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT (11U)
+#define TSC_DEBUG_MODE2_YNLR_200K_PULL_UP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK  (0x1000U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT (12U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_DOWN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK  (0x2000U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT (13U)
+#define TSC_DEBUG_MODE2_WIPER_PULL_UP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK)
 #define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK  (0x4000U)
 #define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT (14U)
-#define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP(x)    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT)) & TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK    (0x10000U)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT   (16U)
-#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE(x)      (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK    (0x20000U)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT   (17U)
-#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE(x)      (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK)
-#define TSC_DEBUG_MODE2_STATE_MACHINE_MASK       (0x700000U)
-#define TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT      (20U)
-#define TSC_DEBUG_MODE2_STATE_MACHINE(x)         (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT)) & TSC_DEBUG_MODE2_STATE_MACHINE_MASK)
-#define TSC_DEBUG_MODE2_INTERMEDIATE_MASK        (0x800000U)
-#define TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT       (23U)
-#define TSC_DEBUG_MODE2_INTERMEDIATE(x)          (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT)) & TSC_DEBUG_MODE2_INTERMEDIATE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK (0x1000000U)
+#define TSC_DEBUG_MODE2_WIPER_200K_PULL_UP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_SHIFT)) &                                       \
+     TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK  (0x10000U)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT (16U)
+#define TSC_DEBUG_MODE2_DETECT_FOUR_WIRE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FOUR_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK  (0x20000U)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT (17U)
+#define TSC_DEBUG_MODE2_DETECT_FIVE_WIRE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_FIVE_WIRE_MASK)
+#define TSC_DEBUG_MODE2_STATE_MACHINE_MASK  (0x700000U)
+#define TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT (20U)
+#define TSC_DEBUG_MODE2_STATE_MACHINE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_STATE_MACHINE_SHIFT)) & TSC_DEBUG_MODE2_STATE_MACHINE_MASK)
+#define TSC_DEBUG_MODE2_INTERMEDIATE_MASK  (0x800000U)
+#define TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT (23U)
+#define TSC_DEBUG_MODE2_INTERMEDIATE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_INTERMEDIATE_SHIFT)) & TSC_DEBUG_MODE2_INTERMEDIATE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK  (0x1000000U)
 #define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT (24U)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK (0x10000000U)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_SHIFT)) &                                  \
+     TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK  (0x10000000U)
 #define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT (28U)
-#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE(x) (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT)) & TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK)
-#define TSC_DEBUG_MODE2_DE_GLITCH_MASK           (0x60000000U)
-#define TSC_DEBUG_MODE2_DE_GLITCH_SHIFT          (29U)
-#define TSC_DEBUG_MODE2_DE_GLITCH(x)             (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DE_GLITCH_SHIFT)) & TSC_DEBUG_MODE2_DE_GLITCH_MASK)
+#define TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_SHIFT)) &                                  \
+     TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK)
+#define TSC_DEBUG_MODE2_DE_GLITCH_MASK  (0x60000000U)
+#define TSC_DEBUG_MODE2_DE_GLITCH_SHIFT (29U)
+#define TSC_DEBUG_MODE2_DE_GLITCH(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << TSC_DEBUG_MODE2_DE_GLITCH_SHIFT)) & TSC_DEBUG_MODE2_DE_GLITCH_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group TSC_Register_Masks */
 
-
 /* TSC - Peripheral instance base addresses */
 /** Peripheral TSC base address */
-#define TSC_BASE                                 (0x400E0000u)
+#define TSC_BASE (0x400E0000u)
 /** Peripheral TSC base pointer */
-#define TSC                                      ((TSC_Type *)TSC_BASE)
+#define TSC ((TSC_Type *)TSC_BASE)
 /** Array initializer of TSC peripheral base addresses */
-#define TSC_BASE_ADDRS                           { TSC_BASE }
+#define TSC_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        TSC_BASE                                                                                                       \
+    }
 /** Array initializer of TSC peripheral base pointers */
-#define TSC_BASE_PTRS                            { TSC }
+#define TSC_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        TSC                                                                                                            \
+    }
 /** Interrupt vectors for the TSC peripheral type */
-#define TSC_IRQS                                 { TSC_DIG_IRQn }
+#define TSC_IRQS                                                                                                       \
+    {                                                                                                                  \
+        TSC_DIG_IRQn                                                                                                   \
+    }
 /* Backward compatibility */
-#define TSC_BASIC_SETTING__4_5_WIRE_MASK          TSC_BASIC_SETTING_4_5_WIRE_MASK
-#define TSC_BASIC_SETTING__4_5_WIRE_SHIFT         TSC_BASIC_SETTING_4_5_WIRE_SHIFT
-#define TSC_BASIC_SETTING__4_5_WIRE(x)            TSC_BASIC_SETTING_4_5_WIRE(x)
-
+#define TSC_BASIC_SETTING__4_5_WIRE_MASK  TSC_BASIC_SETTING_4_5_WIRE_MASK
+#define TSC_BASIC_SETTING__4_5_WIRE_SHIFT TSC_BASIC_SETTING_4_5_WIRE_SHIFT
+#define TSC_BASIC_SETTING__4_5_WIRE(x)    TSC_BASIC_SETTING_4_5_WIRE(x)
 
 /*!
  * @}
  */ /* end of group TSC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USB Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -21668,61 +24694,64 @@ typedef struct {
  */
 
 /** USB - Register Layout Typedef */
-typedef struct {
-  __I  uint32_t ID;                                /**< Identification register, offset: 0x0 */
-  __I  uint32_t HWGENERAL;                         /**< Hardware General, offset: 0x4 */
-  __I  uint32_t HWHOST;                            /**< Host Hardware Parameters, offset: 0x8 */
-  __I  uint32_t HWDEVICE;                          /**< Device Hardware Parameters, offset: 0xC */
-  __I  uint32_t HWTXBUF;                           /**< TX Buffer Hardware Parameters, offset: 0x10 */
-  __I  uint32_t HWRXBUF;                           /**< RX Buffer Hardware Parameters, offset: 0x14 */
-       uint8_t RESERVED_0[104];
-  __IO uint32_t GPTIMER0LD;                        /**< General Purpose Timer #0 Load, offset: 0x80 */
-  __IO uint32_t GPTIMER0CTRL;                      /**< General Purpose Timer #0 Controller, offset: 0x84 */
-  __IO uint32_t GPTIMER1LD;                        /**< General Purpose Timer #1 Load, offset: 0x88 */
-  __IO uint32_t GPTIMER1CTRL;                      /**< General Purpose Timer #1 Controller, offset: 0x8C */
-  __IO uint32_t SBUSCFG;                           /**< System Bus Config, offset: 0x90 */
-       uint8_t RESERVED_1[108];
-  __I  uint8_t CAPLENGTH;                          /**< Capability Registers Length, offset: 0x100 */
-       uint8_t RESERVED_2[1];
-  __I  uint16_t HCIVERSION;                        /**< Host Controller Interface Version, offset: 0x102 */
-  __I  uint32_t HCSPARAMS;                         /**< Host Controller Structural Parameters, offset: 0x104 */
-  __I  uint32_t HCCPARAMS;                         /**< Host Controller Capability Parameters, offset: 0x108 */
-       uint8_t RESERVED_3[20];
-  __I  uint16_t DCIVERSION;                        /**< Device Controller Interface Version, offset: 0x120 */
-       uint8_t RESERVED_4[2];
-  __I  uint32_t DCCPARAMS;                         /**< Device Controller Capability Parameters, offset: 0x124 */
-       uint8_t RESERVED_5[24];
-  __IO uint32_t USBCMD;                            /**< USB Command Register, offset: 0x140 */
-  __IO uint32_t USBSTS;                            /**< USB Status Register, offset: 0x144 */
-  __IO uint32_t USBINTR;                           /**< Interrupt Enable Register, offset: 0x148 */
-  __IO uint32_t FRINDEX;                           /**< USB Frame Index, offset: 0x14C */
-       uint8_t RESERVED_6[4];
-  union {                                          /* offset: 0x154 */
-    __IO uint32_t DEVICEADDR;                        /**< Device Address, offset: 0x154 */
-    __IO uint32_t PERIODICLISTBASE;                  /**< Frame List Base Address, offset: 0x154 */
-  };
-  union {                                          /* offset: 0x158 */
-    __IO uint32_t ASYNCLISTADDR;                     /**< Next Asynch. Address, offset: 0x158 */
-    __IO uint32_t ENDPTLISTADDR;                     /**< Endpoint List Address, offset: 0x158 */
-  };
-       uint8_t RESERVED_7[4];
-  __IO uint32_t BURSTSIZE;                         /**< Programmable Burst Size, offset: 0x160 */
-  __IO uint32_t TXFILLTUNING;                      /**< TX FIFO Fill Tuning, offset: 0x164 */
-       uint8_t RESERVED_8[16];
-  __IO uint32_t ENDPTNAK;                          /**< Endpoint NAK, offset: 0x178 */
-  __IO uint32_t ENDPTNAKEN;                        /**< Endpoint NAK Enable, offset: 0x17C */
-  __I  uint32_t CONFIGFLAG;                        /**< Configure Flag Register, offset: 0x180 */
-  __IO uint32_t PORTSC1;                           /**< Port Status & Control, offset: 0x184 */
-       uint8_t RESERVED_9[28];
-  __IO uint32_t OTGSC;                             /**< On-The-Go Status & control, offset: 0x1A4 */
-  __IO uint32_t USBMODE;                           /**< USB Device Mode, offset: 0x1A8 */
-  __IO uint32_t ENDPTSETUPSTAT;                    /**< Endpoint Setup Status, offset: 0x1AC */
-  __IO uint32_t ENDPTPRIME;                        /**< Endpoint Prime, offset: 0x1B0 */
-  __IO uint32_t ENDPTFLUSH;                        /**< Endpoint Flush, offset: 0x1B4 */
-  __I  uint32_t ENDPTSTAT;                         /**< Endpoint Status, offset: 0x1B8 */
-  __IO uint32_t ENDPTCOMPLETE;                     /**< Endpoint Complete, offset: 0x1BC */
-  __IO uint32_t ENDPTCTRL0;                        /**< Endpoint Control0, offset: 0x1C0 */
-  __IO uint32_t ENDPTCTRL[7];                      /**< Endpoint Control 1..Endpoint Control 7, array offset: 0x1C4, array step: 0x4 */
+typedef struct
+{
+    __I uint32_t ID;        /**< Identification register, offset: 0x0 */
+    __I uint32_t HWGENERAL; /**< Hardware General, offset: 0x4 */
+    __I uint32_t HWHOST;    /**< Host Hardware Parameters, offset: 0x8 */
+    __I uint32_t HWDEVICE;  /**< Device Hardware Parameters, offset: 0xC */
+    __I uint32_t HWTXBUF;   /**< TX Buffer Hardware Parameters, offset: 0x10 */
+    __I uint32_t HWRXBUF;   /**< RX Buffer Hardware Parameters, offset: 0x14 */
+    uint8_t RESERVED_0[104];
+    __IO uint32_t GPTIMER0LD;   /**< General Purpose Timer #0 Load, offset: 0x80 */
+    __IO uint32_t GPTIMER0CTRL; /**< General Purpose Timer #0 Controller, offset: 0x84 */
+    __IO uint32_t GPTIMER1LD;   /**< General Purpose Timer #1 Load, offset: 0x88 */
+    __IO uint32_t GPTIMER1CTRL; /**< General Purpose Timer #1 Controller, offset: 0x8C */
+    __IO uint32_t SBUSCFG;      /**< System Bus Config, offset: 0x90 */
+    uint8_t RESERVED_1[108];
+    __I uint8_t CAPLENGTH; /**< Capability Registers Length, offset: 0x100 */
+    uint8_t RESERVED_2[1];
+    __I uint16_t HCIVERSION; /**< Host Controller Interface Version, offset: 0x102 */
+    __I uint32_t HCSPARAMS;  /**< Host Controller Structural Parameters, offset: 0x104 */
+    __I uint32_t HCCPARAMS;  /**< Host Controller Capability Parameters, offset: 0x108 */
+    uint8_t RESERVED_3[20];
+    __I uint16_t DCIVERSION; /**< Device Controller Interface Version, offset: 0x120 */
+    uint8_t RESERVED_4[2];
+    __I uint32_t DCCPARAMS; /**< Device Controller Capability Parameters, offset: 0x124 */
+    uint8_t RESERVED_5[24];
+    __IO uint32_t USBCMD;  /**< USB Command Register, offset: 0x140 */
+    __IO uint32_t USBSTS;  /**< USB Status Register, offset: 0x144 */
+    __IO uint32_t USBINTR; /**< Interrupt Enable Register, offset: 0x148 */
+    __IO uint32_t FRINDEX; /**< USB Frame Index, offset: 0x14C */
+    uint8_t RESERVED_6[4];
+    union
+    {                                   /* offset: 0x154 */
+        __IO uint32_t DEVICEADDR;       /**< Device Address, offset: 0x154 */
+        __IO uint32_t PERIODICLISTBASE; /**< Frame List Base Address, offset: 0x154 */
+    };
+    union
+    {                                /* offset: 0x158 */
+        __IO uint32_t ASYNCLISTADDR; /**< Next Asynch. Address, offset: 0x158 */
+        __IO uint32_t ENDPTLISTADDR; /**< Endpoint List Address, offset: 0x158 */
+    };
+    uint8_t RESERVED_7[4];
+    __IO uint32_t BURSTSIZE;    /**< Programmable Burst Size, offset: 0x160 */
+    __IO uint32_t TXFILLTUNING; /**< TX FIFO Fill Tuning, offset: 0x164 */
+    uint8_t RESERVED_8[16];
+    __IO uint32_t ENDPTNAK;   /**< Endpoint NAK, offset: 0x178 */
+    __IO uint32_t ENDPTNAKEN; /**< Endpoint NAK Enable, offset: 0x17C */
+    __I uint32_t CONFIGFLAG;  /**< Configure Flag Register, offset: 0x180 */
+    __IO uint32_t PORTSC1;    /**< Port Status & Control, offset: 0x184 */
+    uint8_t RESERVED_9[28];
+    __IO uint32_t OTGSC;          /**< On-The-Go Status & control, offset: 0x1A4 */
+    __IO uint32_t USBMODE;        /**< USB Device Mode, offset: 0x1A8 */
+    __IO uint32_t ENDPTSETUPSTAT; /**< Endpoint Setup Status, offset: 0x1AC */
+    __IO uint32_t ENDPTPRIME;     /**< Endpoint Prime, offset: 0x1B0 */
+    __IO uint32_t ENDPTFLUSH;     /**< Endpoint Flush, offset: 0x1B4 */
+    __I uint32_t ENDPTSTAT;       /**< Endpoint Status, offset: 0x1B8 */
+    __IO uint32_t ENDPTCOMPLETE;  /**< Endpoint Complete, offset: 0x1BC */
+    __IO uint32_t ENDPTCTRL0;     /**< Endpoint Control0, offset: 0x1C0 */
+    __IO uint32_t ENDPTCTRL[7];   /**< Endpoint Control 1..Endpoint Control 7, array offset: 0x1C4, array step: 0x4 */
 } USB_Type;
 
 /* ----------------------------------------------------------------------------
@@ -21736,1320 +24765,1362 @@ typedef struct {
 
 /*! @name ID - Identification register */
 /*! @{ */
-#define USB_ID_ID_MASK                           (0x3FU)
-#define USB_ID_ID_SHIFT                          (0U)
-#define USB_ID_ID(x)                             (((uint32_t)(((uint32_t)(x)) << USB_ID_ID_SHIFT)) & USB_ID_ID_MASK)
-#define USB_ID_NID_MASK                          (0x3F00U)
-#define USB_ID_NID_SHIFT                         (8U)
-#define USB_ID_NID(x)                            (((uint32_t)(((uint32_t)(x)) << USB_ID_NID_SHIFT)) & USB_ID_NID_MASK)
-#define USB_ID_REVISION_MASK                     (0xFF0000U)
-#define USB_ID_REVISION_SHIFT                    (16U)
-#define USB_ID_REVISION(x)                       (((uint32_t)(((uint32_t)(x)) << USB_ID_REVISION_SHIFT)) & USB_ID_REVISION_MASK)
+#define USB_ID_ID_MASK        (0x3FU)
+#define USB_ID_ID_SHIFT       (0U)
+#define USB_ID_ID(x)          (((uint32_t)(((uint32_t)(x)) << USB_ID_ID_SHIFT)) & USB_ID_ID_MASK)
+#define USB_ID_NID_MASK       (0x3F00U)
+#define USB_ID_NID_SHIFT      (8U)
+#define USB_ID_NID(x)         (((uint32_t)(((uint32_t)(x)) << USB_ID_NID_SHIFT)) & USB_ID_NID_MASK)
+#define USB_ID_REVISION_MASK  (0xFF0000U)
+#define USB_ID_REVISION_SHIFT (16U)
+#define USB_ID_REVISION(x)    (((uint32_t)(((uint32_t)(x)) << USB_ID_REVISION_SHIFT)) & USB_ID_REVISION_MASK)
 /*! @} */
 
 /*! @name HWGENERAL - Hardware General */
 /*! @{ */
-#define USB_HWGENERAL_PHYW_MASK                  (0x30U)
-#define USB_HWGENERAL_PHYW_SHIFT                 (4U)
-#define USB_HWGENERAL_PHYW(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYW_SHIFT)) & USB_HWGENERAL_PHYW_MASK)
-#define USB_HWGENERAL_PHYM_MASK                  (0x1C0U)
-#define USB_HWGENERAL_PHYM_SHIFT                 (6U)
-#define USB_HWGENERAL_PHYM(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYM_SHIFT)) & USB_HWGENERAL_PHYM_MASK)
-#define USB_HWGENERAL_SM_MASK                    (0x600U)
-#define USB_HWGENERAL_SM_SHIFT                   (9U)
-#define USB_HWGENERAL_SM(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_SM_SHIFT)) & USB_HWGENERAL_SM_MASK)
+#define USB_HWGENERAL_PHYW_MASK  (0x30U)
+#define USB_HWGENERAL_PHYW_SHIFT (4U)
+#define USB_HWGENERAL_PHYW(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYW_SHIFT)) & USB_HWGENERAL_PHYW_MASK)
+#define USB_HWGENERAL_PHYM_MASK  (0x1C0U)
+#define USB_HWGENERAL_PHYM_SHIFT (6U)
+#define USB_HWGENERAL_PHYM(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_PHYM_SHIFT)) & USB_HWGENERAL_PHYM_MASK)
+#define USB_HWGENERAL_SM_MASK    (0x600U)
+#define USB_HWGENERAL_SM_SHIFT   (9U)
+#define USB_HWGENERAL_SM(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWGENERAL_SM_SHIFT)) & USB_HWGENERAL_SM_MASK)
 /*! @} */
 
 /*! @name HWHOST - Host Hardware Parameters */
 /*! @{ */
-#define USB_HWHOST_HC_MASK                       (0x1U)
-#define USB_HWHOST_HC_SHIFT                      (0U)
-#define USB_HWHOST_HC(x)                         (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_HC_SHIFT)) & USB_HWHOST_HC_MASK)
-#define USB_HWHOST_NPORT_MASK                    (0xEU)
-#define USB_HWHOST_NPORT_SHIFT                   (1U)
-#define USB_HWHOST_NPORT(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_NPORT_SHIFT)) & USB_HWHOST_NPORT_MASK)
+#define USB_HWHOST_HC_MASK     (0x1U)
+#define USB_HWHOST_HC_SHIFT    (0U)
+#define USB_HWHOST_HC(x)       (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_HC_SHIFT)) & USB_HWHOST_HC_MASK)
+#define USB_HWHOST_NPORT_MASK  (0xEU)
+#define USB_HWHOST_NPORT_SHIFT (1U)
+#define USB_HWHOST_NPORT(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWHOST_NPORT_SHIFT)) & USB_HWHOST_NPORT_MASK)
 /*! @} */
 
 /*! @name HWDEVICE - Device Hardware Parameters */
 /*! @{ */
-#define USB_HWDEVICE_DC_MASK                     (0x1U)
-#define USB_HWDEVICE_DC_SHIFT                    (0U)
-#define USB_HWDEVICE_DC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DC_SHIFT)) & USB_HWDEVICE_DC_MASK)
-#define USB_HWDEVICE_DEVEP_MASK                  (0x3EU)
-#define USB_HWDEVICE_DEVEP_SHIFT                 (1U)
-#define USB_HWDEVICE_DEVEP(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DEVEP_SHIFT)) & USB_HWDEVICE_DEVEP_MASK)
+#define USB_HWDEVICE_DC_MASK     (0x1U)
+#define USB_HWDEVICE_DC_SHIFT    (0U)
+#define USB_HWDEVICE_DC(x)       (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DC_SHIFT)) & USB_HWDEVICE_DC_MASK)
+#define USB_HWDEVICE_DEVEP_MASK  (0x3EU)
+#define USB_HWDEVICE_DEVEP_SHIFT (1U)
+#define USB_HWDEVICE_DEVEP(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWDEVICE_DEVEP_SHIFT)) & USB_HWDEVICE_DEVEP_MASK)
 /*! @} */
 
 /*! @name HWTXBUF - TX Buffer Hardware Parameters */
 /*! @{ */
-#define USB_HWTXBUF_TXBURST_MASK                 (0xFFU)
-#define USB_HWTXBUF_TXBURST_SHIFT                (0U)
-#define USB_HWTXBUF_TXBURST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXBURST_SHIFT)) & USB_HWTXBUF_TXBURST_MASK)
-#define USB_HWTXBUF_TXCHANADD_MASK               (0xFF0000U)
-#define USB_HWTXBUF_TXCHANADD_SHIFT              (16U)
-#define USB_HWTXBUF_TXCHANADD(x)                 (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXCHANADD_SHIFT)) & USB_HWTXBUF_TXCHANADD_MASK)
+#define USB_HWTXBUF_TXBURST_MASK    (0xFFU)
+#define USB_HWTXBUF_TXBURST_SHIFT   (0U)
+#define USB_HWTXBUF_TXBURST(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXBURST_SHIFT)) & USB_HWTXBUF_TXBURST_MASK)
+#define USB_HWTXBUF_TXCHANADD_MASK  (0xFF0000U)
+#define USB_HWTXBUF_TXCHANADD_SHIFT (16U)
+#define USB_HWTXBUF_TXCHANADD(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_HWTXBUF_TXCHANADD_SHIFT)) & USB_HWTXBUF_TXCHANADD_MASK)
 /*! @} */
 
 /*! @name HWRXBUF - RX Buffer Hardware Parameters */
 /*! @{ */
-#define USB_HWRXBUF_RXBURST_MASK                 (0xFFU)
-#define USB_HWRXBUF_RXBURST_SHIFT                (0U)
-#define USB_HWRXBUF_RXBURST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXBURST_SHIFT)) & USB_HWRXBUF_RXBURST_MASK)
-#define USB_HWRXBUF_RXADD_MASK                   (0xFF00U)
-#define USB_HWRXBUF_RXADD_SHIFT                  (8U)
-#define USB_HWRXBUF_RXADD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXADD_SHIFT)) & USB_HWRXBUF_RXADD_MASK)
+#define USB_HWRXBUF_RXBURST_MASK  (0xFFU)
+#define USB_HWRXBUF_RXBURST_SHIFT (0U)
+#define USB_HWRXBUF_RXBURST(x)    (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXBURST_SHIFT)) & USB_HWRXBUF_RXBURST_MASK)
+#define USB_HWRXBUF_RXADD_MASK    (0xFF00U)
+#define USB_HWRXBUF_RXADD_SHIFT   (8U)
+#define USB_HWRXBUF_RXADD(x)      (((uint32_t)(((uint32_t)(x)) << USB_HWRXBUF_RXADD_SHIFT)) & USB_HWRXBUF_RXADD_MASK)
 /*! @} */
 
 /*! @name GPTIMER0LD - General Purpose Timer #0 Load */
 /*! @{ */
-#define USB_GPTIMER0LD_GPTLD_MASK                (0xFFFFFFU)
-#define USB_GPTIMER0LD_GPTLD_SHIFT               (0U)
-#define USB_GPTIMER0LD_GPTLD(x)                  (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0LD_GPTLD_SHIFT)) & USB_GPTIMER0LD_GPTLD_MASK)
+#define USB_GPTIMER0LD_GPTLD_MASK  (0xFFFFFFU)
+#define USB_GPTIMER0LD_GPTLD_SHIFT (0U)
+#define USB_GPTIMER0LD_GPTLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0LD_GPTLD_SHIFT)) & USB_GPTIMER0LD_GPTLD_MASK)
 /*! @} */
 
 /*! @name GPTIMER0CTRL - General Purpose Timer #0 Controller */
 /*! @{ */
-#define USB_GPTIMER0CTRL_GPTCNT_MASK             (0xFFFFFFU)
-#define USB_GPTIMER0CTRL_GPTCNT_SHIFT            (0U)
-#define USB_GPTIMER0CTRL_GPTCNT(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTCNT_SHIFT)) & USB_GPTIMER0CTRL_GPTCNT_MASK)
-#define USB_GPTIMER0CTRL_GPTMODE_MASK            (0x1000000U)
-#define USB_GPTIMER0CTRL_GPTMODE_SHIFT           (24U)
-#define USB_GPTIMER0CTRL_GPTMODE(x)              (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTMODE_SHIFT)) & USB_GPTIMER0CTRL_GPTMODE_MASK)
-#define USB_GPTIMER0CTRL_GPTRST_MASK             (0x40000000U)
-#define USB_GPTIMER0CTRL_GPTRST_SHIFT            (30U)
-#define USB_GPTIMER0CTRL_GPTRST(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRST_SHIFT)) & USB_GPTIMER0CTRL_GPTRST_MASK)
-#define USB_GPTIMER0CTRL_GPTRUN_MASK             (0x80000000U)
-#define USB_GPTIMER0CTRL_GPTRUN_SHIFT            (31U)
-#define USB_GPTIMER0CTRL_GPTRUN(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRUN_SHIFT)) & USB_GPTIMER0CTRL_GPTRUN_MASK)
+#define USB_GPTIMER0CTRL_GPTCNT_MASK  (0xFFFFFFU)
+#define USB_GPTIMER0CTRL_GPTCNT_SHIFT (0U)
+#define USB_GPTIMER0CTRL_GPTCNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTCNT_SHIFT)) & USB_GPTIMER0CTRL_GPTCNT_MASK)
+#define USB_GPTIMER0CTRL_GPTMODE_MASK  (0x1000000U)
+#define USB_GPTIMER0CTRL_GPTMODE_SHIFT (24U)
+#define USB_GPTIMER0CTRL_GPTMODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTMODE_SHIFT)) & USB_GPTIMER0CTRL_GPTMODE_MASK)
+#define USB_GPTIMER0CTRL_GPTRST_MASK  (0x40000000U)
+#define USB_GPTIMER0CTRL_GPTRST_SHIFT (30U)
+#define USB_GPTIMER0CTRL_GPTRST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRST_SHIFT)) & USB_GPTIMER0CTRL_GPTRST_MASK)
+#define USB_GPTIMER0CTRL_GPTRUN_MASK  (0x80000000U)
+#define USB_GPTIMER0CTRL_GPTRUN_SHIFT (31U)
+#define USB_GPTIMER0CTRL_GPTRUN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER0CTRL_GPTRUN_SHIFT)) & USB_GPTIMER0CTRL_GPTRUN_MASK)
 /*! @} */
 
 /*! @name GPTIMER1LD - General Purpose Timer #1 Load */
 /*! @{ */
-#define USB_GPTIMER1LD_GPTLD_MASK                (0xFFFFFFU)
-#define USB_GPTIMER1LD_GPTLD_SHIFT               (0U)
-#define USB_GPTIMER1LD_GPTLD(x)                  (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1LD_GPTLD_SHIFT)) & USB_GPTIMER1LD_GPTLD_MASK)
+#define USB_GPTIMER1LD_GPTLD_MASK  (0xFFFFFFU)
+#define USB_GPTIMER1LD_GPTLD_SHIFT (0U)
+#define USB_GPTIMER1LD_GPTLD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1LD_GPTLD_SHIFT)) & USB_GPTIMER1LD_GPTLD_MASK)
 /*! @} */
 
 /*! @name GPTIMER1CTRL - General Purpose Timer #1 Controller */
 /*! @{ */
-#define USB_GPTIMER1CTRL_GPTCNT_MASK             (0xFFFFFFU)
-#define USB_GPTIMER1CTRL_GPTCNT_SHIFT            (0U)
-#define USB_GPTIMER1CTRL_GPTCNT(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTCNT_SHIFT)) & USB_GPTIMER1CTRL_GPTCNT_MASK)
-#define USB_GPTIMER1CTRL_GPTMODE_MASK            (0x1000000U)
-#define USB_GPTIMER1CTRL_GPTMODE_SHIFT           (24U)
-#define USB_GPTIMER1CTRL_GPTMODE(x)              (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTMODE_SHIFT)) & USB_GPTIMER1CTRL_GPTMODE_MASK)
-#define USB_GPTIMER1CTRL_GPTRST_MASK             (0x40000000U)
-#define USB_GPTIMER1CTRL_GPTRST_SHIFT            (30U)
-#define USB_GPTIMER1CTRL_GPTRST(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRST_SHIFT)) & USB_GPTIMER1CTRL_GPTRST_MASK)
-#define USB_GPTIMER1CTRL_GPTRUN_MASK             (0x80000000U)
-#define USB_GPTIMER1CTRL_GPTRUN_SHIFT            (31U)
-#define USB_GPTIMER1CTRL_GPTRUN(x)               (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRUN_SHIFT)) & USB_GPTIMER1CTRL_GPTRUN_MASK)
+#define USB_GPTIMER1CTRL_GPTCNT_MASK  (0xFFFFFFU)
+#define USB_GPTIMER1CTRL_GPTCNT_SHIFT (0U)
+#define USB_GPTIMER1CTRL_GPTCNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTCNT_SHIFT)) & USB_GPTIMER1CTRL_GPTCNT_MASK)
+#define USB_GPTIMER1CTRL_GPTMODE_MASK  (0x1000000U)
+#define USB_GPTIMER1CTRL_GPTMODE_SHIFT (24U)
+#define USB_GPTIMER1CTRL_GPTMODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTMODE_SHIFT)) & USB_GPTIMER1CTRL_GPTMODE_MASK)
+#define USB_GPTIMER1CTRL_GPTRST_MASK  (0x40000000U)
+#define USB_GPTIMER1CTRL_GPTRST_SHIFT (30U)
+#define USB_GPTIMER1CTRL_GPTRST(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRST_SHIFT)) & USB_GPTIMER1CTRL_GPTRST_MASK)
+#define USB_GPTIMER1CTRL_GPTRUN_MASK  (0x80000000U)
+#define USB_GPTIMER1CTRL_GPTRUN_SHIFT (31U)
+#define USB_GPTIMER1CTRL_GPTRUN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_GPTIMER1CTRL_GPTRUN_SHIFT)) & USB_GPTIMER1CTRL_GPTRUN_MASK)
 /*! @} */
 
 /*! @name SBUSCFG - System Bus Config */
 /*! @{ */
-#define USB_SBUSCFG_AHBBRST_MASK                 (0x7U)
-#define USB_SBUSCFG_AHBBRST_SHIFT                (0U)
-#define USB_SBUSCFG_AHBBRST(x)                   (((uint32_t)(((uint32_t)(x)) << USB_SBUSCFG_AHBBRST_SHIFT)) & USB_SBUSCFG_AHBBRST_MASK)
+#define USB_SBUSCFG_AHBBRST_MASK  (0x7U)
+#define USB_SBUSCFG_AHBBRST_SHIFT (0U)
+#define USB_SBUSCFG_AHBBRST(x)    (((uint32_t)(((uint32_t)(x)) << USB_SBUSCFG_AHBBRST_SHIFT)) & USB_SBUSCFG_AHBBRST_MASK)
 /*! @} */
 
 /*! @name CAPLENGTH - Capability Registers Length */
 /*! @{ */
-#define USB_CAPLENGTH_CAPLENGTH_MASK             (0xFFU)
-#define USB_CAPLENGTH_CAPLENGTH_SHIFT            (0U)
-#define USB_CAPLENGTH_CAPLENGTH(x)               (((uint8_t)(((uint8_t)(x)) << USB_CAPLENGTH_CAPLENGTH_SHIFT)) & USB_CAPLENGTH_CAPLENGTH_MASK)
+#define USB_CAPLENGTH_CAPLENGTH_MASK  (0xFFU)
+#define USB_CAPLENGTH_CAPLENGTH_SHIFT (0U)
+#define USB_CAPLENGTH_CAPLENGTH(x)                                                                                     \
+    (((uint8_t)(((uint8_t)(x)) << USB_CAPLENGTH_CAPLENGTH_SHIFT)) & USB_CAPLENGTH_CAPLENGTH_MASK)
 /*! @} */
 
 /*! @name HCIVERSION - Host Controller Interface Version */
 /*! @{ */
-#define USB_HCIVERSION_HCIVERSION_MASK           (0xFFFFU)
-#define USB_HCIVERSION_HCIVERSION_SHIFT          (0U)
-#define USB_HCIVERSION_HCIVERSION(x)             (((uint16_t)(((uint16_t)(x)) << USB_HCIVERSION_HCIVERSION_SHIFT)) & USB_HCIVERSION_HCIVERSION_MASK)
+#define USB_HCIVERSION_HCIVERSION_MASK  (0xFFFFU)
+#define USB_HCIVERSION_HCIVERSION_SHIFT (0U)
+#define USB_HCIVERSION_HCIVERSION(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << USB_HCIVERSION_HCIVERSION_SHIFT)) & USB_HCIVERSION_HCIVERSION_MASK)
 /*! @} */
 
 /*! @name HCSPARAMS - Host Controller Structural Parameters */
 /*! @{ */
-#define USB_HCSPARAMS_N_PORTS_MASK               (0xFU)
-#define USB_HCSPARAMS_N_PORTS_SHIFT              (0U)
-#define USB_HCSPARAMS_N_PORTS(x)                 (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PORTS_SHIFT)) & USB_HCSPARAMS_N_PORTS_MASK)
-#define USB_HCSPARAMS_PPC_MASK                   (0x10U)
-#define USB_HCSPARAMS_PPC_SHIFT                  (4U)
-#define USB_HCSPARAMS_PPC(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PPC_SHIFT)) & USB_HCSPARAMS_PPC_MASK)
-#define USB_HCSPARAMS_N_PCC_MASK                 (0xF00U)
-#define USB_HCSPARAMS_N_PCC_SHIFT                (8U)
-#define USB_HCSPARAMS_N_PCC(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PCC_SHIFT)) & USB_HCSPARAMS_N_PCC_MASK)
-#define USB_HCSPARAMS_N_CC_MASK                  (0xF000U)
-#define USB_HCSPARAMS_N_CC_SHIFT                 (12U)
-#define USB_HCSPARAMS_N_CC(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_CC_SHIFT)) & USB_HCSPARAMS_N_CC_MASK)
-#define USB_HCSPARAMS_PI_MASK                    (0x10000U)
-#define USB_HCSPARAMS_PI_SHIFT                   (16U)
-#define USB_HCSPARAMS_PI(x)                      (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PI_SHIFT)) & USB_HCSPARAMS_PI_MASK)
-#define USB_HCSPARAMS_N_PTT_MASK                 (0xF00000U)
-#define USB_HCSPARAMS_N_PTT_SHIFT                (20U)
-#define USB_HCSPARAMS_N_PTT(x)                   (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PTT_SHIFT)) & USB_HCSPARAMS_N_PTT_MASK)
-#define USB_HCSPARAMS_N_TT_MASK                  (0xF000000U)
-#define USB_HCSPARAMS_N_TT_SHIFT                 (24U)
-#define USB_HCSPARAMS_N_TT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_TT_SHIFT)) & USB_HCSPARAMS_N_TT_MASK)
+#define USB_HCSPARAMS_N_PORTS_MASK  (0xFU)
+#define USB_HCSPARAMS_N_PORTS_SHIFT (0U)
+#define USB_HCSPARAMS_N_PORTS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PORTS_SHIFT)) & USB_HCSPARAMS_N_PORTS_MASK)
+#define USB_HCSPARAMS_PPC_MASK    (0x10U)
+#define USB_HCSPARAMS_PPC_SHIFT   (4U)
+#define USB_HCSPARAMS_PPC(x)      (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PPC_SHIFT)) & USB_HCSPARAMS_PPC_MASK)
+#define USB_HCSPARAMS_N_PCC_MASK  (0xF00U)
+#define USB_HCSPARAMS_N_PCC_SHIFT (8U)
+#define USB_HCSPARAMS_N_PCC(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PCC_SHIFT)) & USB_HCSPARAMS_N_PCC_MASK)
+#define USB_HCSPARAMS_N_CC_MASK   (0xF000U)
+#define USB_HCSPARAMS_N_CC_SHIFT  (12U)
+#define USB_HCSPARAMS_N_CC(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_CC_SHIFT)) & USB_HCSPARAMS_N_CC_MASK)
+#define USB_HCSPARAMS_PI_MASK     (0x10000U)
+#define USB_HCSPARAMS_PI_SHIFT    (16U)
+#define USB_HCSPARAMS_PI(x)       (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_PI_SHIFT)) & USB_HCSPARAMS_PI_MASK)
+#define USB_HCSPARAMS_N_PTT_MASK  (0xF00000U)
+#define USB_HCSPARAMS_N_PTT_SHIFT (20U)
+#define USB_HCSPARAMS_N_PTT(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_PTT_SHIFT)) & USB_HCSPARAMS_N_PTT_MASK)
+#define USB_HCSPARAMS_N_TT_MASK   (0xF000000U)
+#define USB_HCSPARAMS_N_TT_SHIFT  (24U)
+#define USB_HCSPARAMS_N_TT(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCSPARAMS_N_TT_SHIFT)) & USB_HCSPARAMS_N_TT_MASK)
 /*! @} */
 
 /*! @name HCCPARAMS - Host Controller Capability Parameters */
 /*! @{ */
-#define USB_HCCPARAMS_ADC_MASK                   (0x1U)
-#define USB_HCCPARAMS_ADC_SHIFT                  (0U)
-#define USB_HCCPARAMS_ADC(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ADC_SHIFT)) & USB_HCCPARAMS_ADC_MASK)
-#define USB_HCCPARAMS_PFL_MASK                   (0x2U)
-#define USB_HCCPARAMS_PFL_SHIFT                  (1U)
-#define USB_HCCPARAMS_PFL(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_PFL_SHIFT)) & USB_HCCPARAMS_PFL_MASK)
-#define USB_HCCPARAMS_ASP_MASK                   (0x4U)
-#define USB_HCCPARAMS_ASP_SHIFT                  (2U)
-#define USB_HCCPARAMS_ASP(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ASP_SHIFT)) & USB_HCCPARAMS_ASP_MASK)
-#define USB_HCCPARAMS_IST_MASK                   (0xF0U)
-#define USB_HCCPARAMS_IST_SHIFT                  (4U)
-#define USB_HCCPARAMS_IST(x)                     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_IST_SHIFT)) & USB_HCCPARAMS_IST_MASK)
-#define USB_HCCPARAMS_EECP_MASK                  (0xFF00U)
-#define USB_HCCPARAMS_EECP_SHIFT                 (8U)
-#define USB_HCCPARAMS_EECP(x)                    (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_EECP_SHIFT)) & USB_HCCPARAMS_EECP_MASK)
+#define USB_HCCPARAMS_ADC_MASK   (0x1U)
+#define USB_HCCPARAMS_ADC_SHIFT  (0U)
+#define USB_HCCPARAMS_ADC(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ADC_SHIFT)) & USB_HCCPARAMS_ADC_MASK)
+#define USB_HCCPARAMS_PFL_MASK   (0x2U)
+#define USB_HCCPARAMS_PFL_SHIFT  (1U)
+#define USB_HCCPARAMS_PFL(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_PFL_SHIFT)) & USB_HCCPARAMS_PFL_MASK)
+#define USB_HCCPARAMS_ASP_MASK   (0x4U)
+#define USB_HCCPARAMS_ASP_SHIFT  (2U)
+#define USB_HCCPARAMS_ASP(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_ASP_SHIFT)) & USB_HCCPARAMS_ASP_MASK)
+#define USB_HCCPARAMS_IST_MASK   (0xF0U)
+#define USB_HCCPARAMS_IST_SHIFT  (4U)
+#define USB_HCCPARAMS_IST(x)     (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_IST_SHIFT)) & USB_HCCPARAMS_IST_MASK)
+#define USB_HCCPARAMS_EECP_MASK  (0xFF00U)
+#define USB_HCCPARAMS_EECP_SHIFT (8U)
+#define USB_HCCPARAMS_EECP(x)    (((uint32_t)(((uint32_t)(x)) << USB_HCCPARAMS_EECP_SHIFT)) & USB_HCCPARAMS_EECP_MASK)
 /*! @} */
 
 /*! @name DCIVERSION - Device Controller Interface Version */
 /*! @{ */
-#define USB_DCIVERSION_DCIVERSION_MASK           (0xFFFFU)
-#define USB_DCIVERSION_DCIVERSION_SHIFT          (0U)
-#define USB_DCIVERSION_DCIVERSION(x)             (((uint16_t)(((uint16_t)(x)) << USB_DCIVERSION_DCIVERSION_SHIFT)) & USB_DCIVERSION_DCIVERSION_MASK)
+#define USB_DCIVERSION_DCIVERSION_MASK  (0xFFFFU)
+#define USB_DCIVERSION_DCIVERSION_SHIFT (0U)
+#define USB_DCIVERSION_DCIVERSION(x)                                                                                   \
+    (((uint16_t)(((uint16_t)(x)) << USB_DCIVERSION_DCIVERSION_SHIFT)) & USB_DCIVERSION_DCIVERSION_MASK)
 /*! @} */
 
 /*! @name DCCPARAMS - Device Controller Capability Parameters */
 /*! @{ */
-#define USB_DCCPARAMS_DEN_MASK                   (0x1FU)
-#define USB_DCCPARAMS_DEN_SHIFT                  (0U)
-#define USB_DCCPARAMS_DEN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DEN_SHIFT)) & USB_DCCPARAMS_DEN_MASK)
-#define USB_DCCPARAMS_DC_MASK                    (0x80U)
-#define USB_DCCPARAMS_DC_SHIFT                   (7U)
-#define USB_DCCPARAMS_DC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DC_SHIFT)) & USB_DCCPARAMS_DC_MASK)
-#define USB_DCCPARAMS_HC_MASK                    (0x100U)
-#define USB_DCCPARAMS_HC_SHIFT                   (8U)
-#define USB_DCCPARAMS_HC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_HC_SHIFT)) & USB_DCCPARAMS_HC_MASK)
+#define USB_DCCPARAMS_DEN_MASK  (0x1FU)
+#define USB_DCCPARAMS_DEN_SHIFT (0U)
+#define USB_DCCPARAMS_DEN(x)    (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DEN_SHIFT)) & USB_DCCPARAMS_DEN_MASK)
+#define USB_DCCPARAMS_DC_MASK   (0x80U)
+#define USB_DCCPARAMS_DC_SHIFT  (7U)
+#define USB_DCCPARAMS_DC(x)     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_DC_SHIFT)) & USB_DCCPARAMS_DC_MASK)
+#define USB_DCCPARAMS_HC_MASK   (0x100U)
+#define USB_DCCPARAMS_HC_SHIFT  (8U)
+#define USB_DCCPARAMS_HC(x)     (((uint32_t)(((uint32_t)(x)) << USB_DCCPARAMS_HC_SHIFT)) & USB_DCCPARAMS_HC_MASK)
 /*! @} */
 
 /*! @name USBCMD - USB Command Register */
 /*! @{ */
-#define USB_USBCMD_RS_MASK                       (0x1U)
-#define USB_USBCMD_RS_SHIFT                      (0U)
-#define USB_USBCMD_RS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RS_SHIFT)) & USB_USBCMD_RS_MASK)
-#define USB_USBCMD_RST_MASK                      (0x2U)
-#define USB_USBCMD_RST_SHIFT                     (1U)
-#define USB_USBCMD_RST(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RST_SHIFT)) & USB_USBCMD_RST_MASK)
-#define USB_USBCMD_FS_1_MASK                     (0xCU)
-#define USB_USBCMD_FS_1_SHIFT                    (2U)
-#define USB_USBCMD_FS_1(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_1_SHIFT)) & USB_USBCMD_FS_1_MASK)
-#define USB_USBCMD_PSE_MASK                      (0x10U)
-#define USB_USBCMD_PSE_SHIFT                     (4U)
-#define USB_USBCMD_PSE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_PSE_SHIFT)) & USB_USBCMD_PSE_MASK)
-#define USB_USBCMD_ASE_MASK                      (0x20U)
-#define USB_USBCMD_ASE_SHIFT                     (5U)
-#define USB_USBCMD_ASE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASE_SHIFT)) & USB_USBCMD_ASE_MASK)
-#define USB_USBCMD_IAA_MASK                      (0x40U)
-#define USB_USBCMD_IAA_SHIFT                     (6U)
-#define USB_USBCMD_IAA(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_IAA_SHIFT)) & USB_USBCMD_IAA_MASK)
-#define USB_USBCMD_ASP_MASK                      (0x300U)
-#define USB_USBCMD_ASP_SHIFT                     (8U)
-#define USB_USBCMD_ASP(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASP_SHIFT)) & USB_USBCMD_ASP_MASK)
-#define USB_USBCMD_ASPE_MASK                     (0x800U)
-#define USB_USBCMD_ASPE_SHIFT                    (11U)
-#define USB_USBCMD_ASPE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASPE_SHIFT)) & USB_USBCMD_ASPE_MASK)
-#define USB_USBCMD_ATDTW_MASK                    (0x1000U)
-#define USB_USBCMD_ATDTW_SHIFT                   (12U)
-#define USB_USBCMD_ATDTW(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ATDTW_SHIFT)) & USB_USBCMD_ATDTW_MASK)
-#define USB_USBCMD_SUTW_MASK                     (0x2000U)
-#define USB_USBCMD_SUTW_SHIFT                    (13U)
-#define USB_USBCMD_SUTW(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_SUTW_SHIFT)) & USB_USBCMD_SUTW_MASK)
-#define USB_USBCMD_FS_2_MASK                     (0x8000U)
-#define USB_USBCMD_FS_2_SHIFT                    (15U)
-#define USB_USBCMD_FS_2(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_2_SHIFT)) & USB_USBCMD_FS_2_MASK)
-#define USB_USBCMD_ITC_MASK                      (0xFF0000U)
-#define USB_USBCMD_ITC_SHIFT                     (16U)
-#define USB_USBCMD_ITC(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ITC_SHIFT)) & USB_USBCMD_ITC_MASK)
+#define USB_USBCMD_RS_MASK     (0x1U)
+#define USB_USBCMD_RS_SHIFT    (0U)
+#define USB_USBCMD_RS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RS_SHIFT)) & USB_USBCMD_RS_MASK)
+#define USB_USBCMD_RST_MASK    (0x2U)
+#define USB_USBCMD_RST_SHIFT   (1U)
+#define USB_USBCMD_RST(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_RST_SHIFT)) & USB_USBCMD_RST_MASK)
+#define USB_USBCMD_FS_1_MASK   (0xCU)
+#define USB_USBCMD_FS_1_SHIFT  (2U)
+#define USB_USBCMD_FS_1(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_1_SHIFT)) & USB_USBCMD_FS_1_MASK)
+#define USB_USBCMD_PSE_MASK    (0x10U)
+#define USB_USBCMD_PSE_SHIFT   (4U)
+#define USB_USBCMD_PSE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_PSE_SHIFT)) & USB_USBCMD_PSE_MASK)
+#define USB_USBCMD_ASE_MASK    (0x20U)
+#define USB_USBCMD_ASE_SHIFT   (5U)
+#define USB_USBCMD_ASE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASE_SHIFT)) & USB_USBCMD_ASE_MASK)
+#define USB_USBCMD_IAA_MASK    (0x40U)
+#define USB_USBCMD_IAA_SHIFT   (6U)
+#define USB_USBCMD_IAA(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_IAA_SHIFT)) & USB_USBCMD_IAA_MASK)
+#define USB_USBCMD_ASP_MASK    (0x300U)
+#define USB_USBCMD_ASP_SHIFT   (8U)
+#define USB_USBCMD_ASP(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASP_SHIFT)) & USB_USBCMD_ASP_MASK)
+#define USB_USBCMD_ASPE_MASK   (0x800U)
+#define USB_USBCMD_ASPE_SHIFT  (11U)
+#define USB_USBCMD_ASPE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ASPE_SHIFT)) & USB_USBCMD_ASPE_MASK)
+#define USB_USBCMD_ATDTW_MASK  (0x1000U)
+#define USB_USBCMD_ATDTW_SHIFT (12U)
+#define USB_USBCMD_ATDTW(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ATDTW_SHIFT)) & USB_USBCMD_ATDTW_MASK)
+#define USB_USBCMD_SUTW_MASK   (0x2000U)
+#define USB_USBCMD_SUTW_SHIFT  (13U)
+#define USB_USBCMD_SUTW(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_SUTW_SHIFT)) & USB_USBCMD_SUTW_MASK)
+#define USB_USBCMD_FS_2_MASK   (0x8000U)
+#define USB_USBCMD_FS_2_SHIFT  (15U)
+#define USB_USBCMD_FS_2(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_FS_2_SHIFT)) & USB_USBCMD_FS_2_MASK)
+#define USB_USBCMD_ITC_MASK    (0xFF0000U)
+#define USB_USBCMD_ITC_SHIFT   (16U)
+#define USB_USBCMD_ITC(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBCMD_ITC_SHIFT)) & USB_USBCMD_ITC_MASK)
 /*! @} */
 
 /*! @name USBSTS - USB Status Register */
 /*! @{ */
-#define USB_USBSTS_UI_MASK                       (0x1U)
-#define USB_USBSTS_UI_SHIFT                      (0U)
-#define USB_USBSTS_UI(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UI_SHIFT)) & USB_USBSTS_UI_MASK)
-#define USB_USBSTS_UEI_MASK                      (0x2U)
-#define USB_USBSTS_UEI_SHIFT                     (1U)
-#define USB_USBSTS_UEI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UEI_SHIFT)) & USB_USBSTS_UEI_MASK)
-#define USB_USBSTS_PCI_MASK                      (0x4U)
-#define USB_USBSTS_PCI_SHIFT                     (2U)
-#define USB_USBSTS_PCI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PCI_SHIFT)) & USB_USBSTS_PCI_MASK)
-#define USB_USBSTS_FRI_MASK                      (0x8U)
-#define USB_USBSTS_FRI_SHIFT                     (3U)
-#define USB_USBSTS_FRI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_FRI_SHIFT)) & USB_USBSTS_FRI_MASK)
-#define USB_USBSTS_SEI_MASK                      (0x10U)
-#define USB_USBSTS_SEI_SHIFT                     (4U)
-#define USB_USBSTS_SEI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SEI_SHIFT)) & USB_USBSTS_SEI_MASK)
-#define USB_USBSTS_AAI_MASK                      (0x20U)
-#define USB_USBSTS_AAI_SHIFT                     (5U)
-#define USB_USBSTS_AAI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AAI_SHIFT)) & USB_USBSTS_AAI_MASK)
-#define USB_USBSTS_URI_MASK                      (0x40U)
-#define USB_USBSTS_URI_SHIFT                     (6U)
-#define USB_USBSTS_URI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_URI_SHIFT)) & USB_USBSTS_URI_MASK)
-#define USB_USBSTS_SRI_MASK                      (0x80U)
-#define USB_USBSTS_SRI_SHIFT                     (7U)
-#define USB_USBSTS_SRI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SRI_SHIFT)) & USB_USBSTS_SRI_MASK)
-#define USB_USBSTS_SLI_MASK                      (0x100U)
-#define USB_USBSTS_SLI_SHIFT                     (8U)
-#define USB_USBSTS_SLI(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SLI_SHIFT)) & USB_USBSTS_SLI_MASK)
-#define USB_USBSTS_ULPII_MASK                    (0x400U)
-#define USB_USBSTS_ULPII_SHIFT                   (10U)
-#define USB_USBSTS_ULPII(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_ULPII_SHIFT)) & USB_USBSTS_ULPII_MASK)
-#define USB_USBSTS_HCH_MASK                      (0x1000U)
-#define USB_USBSTS_HCH_SHIFT                     (12U)
-#define USB_USBSTS_HCH(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_HCH_SHIFT)) & USB_USBSTS_HCH_MASK)
-#define USB_USBSTS_RCL_MASK                      (0x2000U)
-#define USB_USBSTS_RCL_SHIFT                     (13U)
-#define USB_USBSTS_RCL(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_RCL_SHIFT)) & USB_USBSTS_RCL_MASK)
-#define USB_USBSTS_PS_MASK                       (0x4000U)
-#define USB_USBSTS_PS_SHIFT                      (14U)
-#define USB_USBSTS_PS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PS_SHIFT)) & USB_USBSTS_PS_MASK)
-#define USB_USBSTS_AS_MASK                       (0x8000U)
-#define USB_USBSTS_AS_SHIFT                      (15U)
-#define USB_USBSTS_AS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AS_SHIFT)) & USB_USBSTS_AS_MASK)
-#define USB_USBSTS_NAKI_MASK                     (0x10000U)
-#define USB_USBSTS_NAKI_SHIFT                    (16U)
-#define USB_USBSTS_NAKI(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_NAKI_SHIFT)) & USB_USBSTS_NAKI_MASK)
-#define USB_USBSTS_TI0_MASK                      (0x1000000U)
-#define USB_USBSTS_TI0_SHIFT                     (24U)
-#define USB_USBSTS_TI0(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI0_SHIFT)) & USB_USBSTS_TI0_MASK)
-#define USB_USBSTS_TI1_MASK                      (0x2000000U)
-#define USB_USBSTS_TI1_SHIFT                     (25U)
-#define USB_USBSTS_TI1(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI1_SHIFT)) & USB_USBSTS_TI1_MASK)
+#define USB_USBSTS_UI_MASK     (0x1U)
+#define USB_USBSTS_UI_SHIFT    (0U)
+#define USB_USBSTS_UI(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UI_SHIFT)) & USB_USBSTS_UI_MASK)
+#define USB_USBSTS_UEI_MASK    (0x2U)
+#define USB_USBSTS_UEI_SHIFT   (1U)
+#define USB_USBSTS_UEI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_UEI_SHIFT)) & USB_USBSTS_UEI_MASK)
+#define USB_USBSTS_PCI_MASK    (0x4U)
+#define USB_USBSTS_PCI_SHIFT   (2U)
+#define USB_USBSTS_PCI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PCI_SHIFT)) & USB_USBSTS_PCI_MASK)
+#define USB_USBSTS_FRI_MASK    (0x8U)
+#define USB_USBSTS_FRI_SHIFT   (3U)
+#define USB_USBSTS_FRI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_FRI_SHIFT)) & USB_USBSTS_FRI_MASK)
+#define USB_USBSTS_SEI_MASK    (0x10U)
+#define USB_USBSTS_SEI_SHIFT   (4U)
+#define USB_USBSTS_SEI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SEI_SHIFT)) & USB_USBSTS_SEI_MASK)
+#define USB_USBSTS_AAI_MASK    (0x20U)
+#define USB_USBSTS_AAI_SHIFT   (5U)
+#define USB_USBSTS_AAI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AAI_SHIFT)) & USB_USBSTS_AAI_MASK)
+#define USB_USBSTS_URI_MASK    (0x40U)
+#define USB_USBSTS_URI_SHIFT   (6U)
+#define USB_USBSTS_URI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_URI_SHIFT)) & USB_USBSTS_URI_MASK)
+#define USB_USBSTS_SRI_MASK    (0x80U)
+#define USB_USBSTS_SRI_SHIFT   (7U)
+#define USB_USBSTS_SRI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SRI_SHIFT)) & USB_USBSTS_SRI_MASK)
+#define USB_USBSTS_SLI_MASK    (0x100U)
+#define USB_USBSTS_SLI_SHIFT   (8U)
+#define USB_USBSTS_SLI(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_SLI_SHIFT)) & USB_USBSTS_SLI_MASK)
+#define USB_USBSTS_ULPII_MASK  (0x400U)
+#define USB_USBSTS_ULPII_SHIFT (10U)
+#define USB_USBSTS_ULPII(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_ULPII_SHIFT)) & USB_USBSTS_ULPII_MASK)
+#define USB_USBSTS_HCH_MASK    (0x1000U)
+#define USB_USBSTS_HCH_SHIFT   (12U)
+#define USB_USBSTS_HCH(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_HCH_SHIFT)) & USB_USBSTS_HCH_MASK)
+#define USB_USBSTS_RCL_MASK    (0x2000U)
+#define USB_USBSTS_RCL_SHIFT   (13U)
+#define USB_USBSTS_RCL(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_RCL_SHIFT)) & USB_USBSTS_RCL_MASK)
+#define USB_USBSTS_PS_MASK     (0x4000U)
+#define USB_USBSTS_PS_SHIFT    (14U)
+#define USB_USBSTS_PS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_PS_SHIFT)) & USB_USBSTS_PS_MASK)
+#define USB_USBSTS_AS_MASK     (0x8000U)
+#define USB_USBSTS_AS_SHIFT    (15U)
+#define USB_USBSTS_AS(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_AS_SHIFT)) & USB_USBSTS_AS_MASK)
+#define USB_USBSTS_NAKI_MASK   (0x10000U)
+#define USB_USBSTS_NAKI_SHIFT  (16U)
+#define USB_USBSTS_NAKI(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_NAKI_SHIFT)) & USB_USBSTS_NAKI_MASK)
+#define USB_USBSTS_TI0_MASK    (0x1000000U)
+#define USB_USBSTS_TI0_SHIFT   (24U)
+#define USB_USBSTS_TI0(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI0_SHIFT)) & USB_USBSTS_TI0_MASK)
+#define USB_USBSTS_TI1_MASK    (0x2000000U)
+#define USB_USBSTS_TI1_SHIFT   (25U)
+#define USB_USBSTS_TI1(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBSTS_TI1_SHIFT)) & USB_USBSTS_TI1_MASK)
 /*! @} */
 
 /*! @name USBINTR - Interrupt Enable Register */
 /*! @{ */
-#define USB_USBINTR_UE_MASK                      (0x1U)
-#define USB_USBINTR_UE_SHIFT                     (0U)
-#define USB_USBINTR_UE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UE_SHIFT)) & USB_USBINTR_UE_MASK)
-#define USB_USBINTR_UEE_MASK                     (0x2U)
-#define USB_USBINTR_UEE_SHIFT                    (1U)
-#define USB_USBINTR_UEE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UEE_SHIFT)) & USB_USBINTR_UEE_MASK)
-#define USB_USBINTR_PCE_MASK                     (0x4U)
-#define USB_USBINTR_PCE_SHIFT                    (2U)
-#define USB_USBINTR_PCE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_PCE_SHIFT)) & USB_USBINTR_PCE_MASK)
-#define USB_USBINTR_FRE_MASK                     (0x8U)
-#define USB_USBINTR_FRE_SHIFT                    (3U)
-#define USB_USBINTR_FRE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_FRE_SHIFT)) & USB_USBINTR_FRE_MASK)
-#define USB_USBINTR_SEE_MASK                     (0x10U)
-#define USB_USBINTR_SEE_SHIFT                    (4U)
-#define USB_USBINTR_SEE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SEE_SHIFT)) & USB_USBINTR_SEE_MASK)
-#define USB_USBINTR_AAE_MASK                     (0x20U)
-#define USB_USBINTR_AAE_SHIFT                    (5U)
-#define USB_USBINTR_AAE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_AAE_SHIFT)) & USB_USBINTR_AAE_MASK)
-#define USB_USBINTR_URE_MASK                     (0x40U)
-#define USB_USBINTR_URE_SHIFT                    (6U)
-#define USB_USBINTR_URE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_URE_SHIFT)) & USB_USBINTR_URE_MASK)
-#define USB_USBINTR_SRE_MASK                     (0x80U)
-#define USB_USBINTR_SRE_SHIFT                    (7U)
-#define USB_USBINTR_SRE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SRE_SHIFT)) & USB_USBINTR_SRE_MASK)
-#define USB_USBINTR_SLE_MASK                     (0x100U)
-#define USB_USBINTR_SLE_SHIFT                    (8U)
-#define USB_USBINTR_SLE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SLE_SHIFT)) & USB_USBINTR_SLE_MASK)
-#define USB_USBINTR_ULPIE_MASK                   (0x400U)
-#define USB_USBINTR_ULPIE_SHIFT                  (10U)
-#define USB_USBINTR_ULPIE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_ULPIE_SHIFT)) & USB_USBINTR_ULPIE_MASK)
-#define USB_USBINTR_NAKE_MASK                    (0x10000U)
-#define USB_USBINTR_NAKE_SHIFT                   (16U)
-#define USB_USBINTR_NAKE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_NAKE_SHIFT)) & USB_USBINTR_NAKE_MASK)
-#define USB_USBINTR_UAIE_MASK                    (0x40000U)
-#define USB_USBINTR_UAIE_SHIFT                   (18U)
-#define USB_USBINTR_UAIE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UAIE_SHIFT)) & USB_USBINTR_UAIE_MASK)
-#define USB_USBINTR_UPIE_MASK                    (0x80000U)
-#define USB_USBINTR_UPIE_SHIFT                   (19U)
-#define USB_USBINTR_UPIE(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UPIE_SHIFT)) & USB_USBINTR_UPIE_MASK)
-#define USB_USBINTR_TIE0_MASK                    (0x1000000U)
-#define USB_USBINTR_TIE0_SHIFT                   (24U)
-#define USB_USBINTR_TIE0(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE0_SHIFT)) & USB_USBINTR_TIE0_MASK)
-#define USB_USBINTR_TIE1_MASK                    (0x2000000U)
-#define USB_USBINTR_TIE1_SHIFT                   (25U)
-#define USB_USBINTR_TIE1(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE1_SHIFT)) & USB_USBINTR_TIE1_MASK)
+#define USB_USBINTR_UE_MASK     (0x1U)
+#define USB_USBINTR_UE_SHIFT    (0U)
+#define USB_USBINTR_UE(x)       (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UE_SHIFT)) & USB_USBINTR_UE_MASK)
+#define USB_USBINTR_UEE_MASK    (0x2U)
+#define USB_USBINTR_UEE_SHIFT   (1U)
+#define USB_USBINTR_UEE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UEE_SHIFT)) & USB_USBINTR_UEE_MASK)
+#define USB_USBINTR_PCE_MASK    (0x4U)
+#define USB_USBINTR_PCE_SHIFT   (2U)
+#define USB_USBINTR_PCE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_PCE_SHIFT)) & USB_USBINTR_PCE_MASK)
+#define USB_USBINTR_FRE_MASK    (0x8U)
+#define USB_USBINTR_FRE_SHIFT   (3U)
+#define USB_USBINTR_FRE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_FRE_SHIFT)) & USB_USBINTR_FRE_MASK)
+#define USB_USBINTR_SEE_MASK    (0x10U)
+#define USB_USBINTR_SEE_SHIFT   (4U)
+#define USB_USBINTR_SEE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SEE_SHIFT)) & USB_USBINTR_SEE_MASK)
+#define USB_USBINTR_AAE_MASK    (0x20U)
+#define USB_USBINTR_AAE_SHIFT   (5U)
+#define USB_USBINTR_AAE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_AAE_SHIFT)) & USB_USBINTR_AAE_MASK)
+#define USB_USBINTR_URE_MASK    (0x40U)
+#define USB_USBINTR_URE_SHIFT   (6U)
+#define USB_USBINTR_URE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_URE_SHIFT)) & USB_USBINTR_URE_MASK)
+#define USB_USBINTR_SRE_MASK    (0x80U)
+#define USB_USBINTR_SRE_SHIFT   (7U)
+#define USB_USBINTR_SRE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SRE_SHIFT)) & USB_USBINTR_SRE_MASK)
+#define USB_USBINTR_SLE_MASK    (0x100U)
+#define USB_USBINTR_SLE_SHIFT   (8U)
+#define USB_USBINTR_SLE(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_SLE_SHIFT)) & USB_USBINTR_SLE_MASK)
+#define USB_USBINTR_ULPIE_MASK  (0x400U)
+#define USB_USBINTR_ULPIE_SHIFT (10U)
+#define USB_USBINTR_ULPIE(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_ULPIE_SHIFT)) & USB_USBINTR_ULPIE_MASK)
+#define USB_USBINTR_NAKE_MASK   (0x10000U)
+#define USB_USBINTR_NAKE_SHIFT  (16U)
+#define USB_USBINTR_NAKE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_NAKE_SHIFT)) & USB_USBINTR_NAKE_MASK)
+#define USB_USBINTR_UAIE_MASK   (0x40000U)
+#define USB_USBINTR_UAIE_SHIFT  (18U)
+#define USB_USBINTR_UAIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UAIE_SHIFT)) & USB_USBINTR_UAIE_MASK)
+#define USB_USBINTR_UPIE_MASK   (0x80000U)
+#define USB_USBINTR_UPIE_SHIFT  (19U)
+#define USB_USBINTR_UPIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_UPIE_SHIFT)) & USB_USBINTR_UPIE_MASK)
+#define USB_USBINTR_TIE0_MASK   (0x1000000U)
+#define USB_USBINTR_TIE0_SHIFT  (24U)
+#define USB_USBINTR_TIE0(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE0_SHIFT)) & USB_USBINTR_TIE0_MASK)
+#define USB_USBINTR_TIE1_MASK   (0x2000000U)
+#define USB_USBINTR_TIE1_SHIFT  (25U)
+#define USB_USBINTR_TIE1(x)     (((uint32_t)(((uint32_t)(x)) << USB_USBINTR_TIE1_SHIFT)) & USB_USBINTR_TIE1_MASK)
 /*! @} */
 
 /*! @name FRINDEX - USB Frame Index */
 /*! @{ */
-#define USB_FRINDEX_FRINDEX_MASK                 (0x3FFFU)
-#define USB_FRINDEX_FRINDEX_SHIFT                (0U)
-#define USB_FRINDEX_FRINDEX(x)                   (((uint32_t)(((uint32_t)(x)) << USB_FRINDEX_FRINDEX_SHIFT)) & USB_FRINDEX_FRINDEX_MASK)
+#define USB_FRINDEX_FRINDEX_MASK  (0x3FFFU)
+#define USB_FRINDEX_FRINDEX_SHIFT (0U)
+#define USB_FRINDEX_FRINDEX(x)    (((uint32_t)(((uint32_t)(x)) << USB_FRINDEX_FRINDEX_SHIFT)) & USB_FRINDEX_FRINDEX_MASK)
 /*! @} */
 
 /*! @name DEVICEADDR - Device Address */
 /*! @{ */
-#define USB_DEVICEADDR_USBADRA_MASK              (0x1000000U)
-#define USB_DEVICEADDR_USBADRA_SHIFT             (24U)
-#define USB_DEVICEADDR_USBADRA(x)                (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADRA_SHIFT)) & USB_DEVICEADDR_USBADRA_MASK)
-#define USB_DEVICEADDR_USBADR_MASK               (0xFE000000U)
-#define USB_DEVICEADDR_USBADR_SHIFT              (25U)
-#define USB_DEVICEADDR_USBADR(x)                 (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADR_SHIFT)) & USB_DEVICEADDR_USBADR_MASK)
+#define USB_DEVICEADDR_USBADRA_MASK  (0x1000000U)
+#define USB_DEVICEADDR_USBADRA_SHIFT (24U)
+#define USB_DEVICEADDR_USBADRA(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADRA_SHIFT)) & USB_DEVICEADDR_USBADRA_MASK)
+#define USB_DEVICEADDR_USBADR_MASK  (0xFE000000U)
+#define USB_DEVICEADDR_USBADR_SHIFT (25U)
+#define USB_DEVICEADDR_USBADR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_DEVICEADDR_USBADR_SHIFT)) & USB_DEVICEADDR_USBADR_MASK)
 /*! @} */
 
 /*! @name PERIODICLISTBASE - Frame List Base Address */
 /*! @{ */
-#define USB_PERIODICLISTBASE_BASEADR_MASK        (0xFFFFF000U)
-#define USB_PERIODICLISTBASE_BASEADR_SHIFT       (12U)
-#define USB_PERIODICLISTBASE_BASEADR(x)          (((uint32_t)(((uint32_t)(x)) << USB_PERIODICLISTBASE_BASEADR_SHIFT)) & USB_PERIODICLISTBASE_BASEADR_MASK)
+#define USB_PERIODICLISTBASE_BASEADR_MASK  (0xFFFFF000U)
+#define USB_PERIODICLISTBASE_BASEADR_SHIFT (12U)
+#define USB_PERIODICLISTBASE_BASEADR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_PERIODICLISTBASE_BASEADR_SHIFT)) & USB_PERIODICLISTBASE_BASEADR_MASK)
 /*! @} */
 
 /*! @name ASYNCLISTADDR - Next Asynch. Address */
 /*! @{ */
-#define USB_ASYNCLISTADDR_ASYBASE_MASK           (0xFFFFFFE0U)
-#define USB_ASYNCLISTADDR_ASYBASE_SHIFT          (5U)
-#define USB_ASYNCLISTADDR_ASYBASE(x)             (((uint32_t)(((uint32_t)(x)) << USB_ASYNCLISTADDR_ASYBASE_SHIFT)) & USB_ASYNCLISTADDR_ASYBASE_MASK)
+#define USB_ASYNCLISTADDR_ASYBASE_MASK  (0xFFFFFFE0U)
+#define USB_ASYNCLISTADDR_ASYBASE_SHIFT (5U)
+#define USB_ASYNCLISTADDR_ASYBASE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ASYNCLISTADDR_ASYBASE_SHIFT)) & USB_ASYNCLISTADDR_ASYBASE_MASK)
 /*! @} */
 
 /*! @name ENDPTLISTADDR - Endpoint List Address */
 /*! @{ */
-#define USB_ENDPTLISTADDR_EPBASE_MASK            (0xFFFFF800U)
-#define USB_ENDPTLISTADDR_EPBASE_SHIFT           (11U)
-#define USB_ENDPTLISTADDR_EPBASE(x)              (((uint32_t)(((uint32_t)(x)) << USB_ENDPTLISTADDR_EPBASE_SHIFT)) & USB_ENDPTLISTADDR_EPBASE_MASK)
+#define USB_ENDPTLISTADDR_EPBASE_MASK  (0xFFFFF800U)
+#define USB_ENDPTLISTADDR_EPBASE_SHIFT (11U)
+#define USB_ENDPTLISTADDR_EPBASE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTLISTADDR_EPBASE_SHIFT)) & USB_ENDPTLISTADDR_EPBASE_MASK)
 /*! @} */
 
 /*! @name BURSTSIZE - Programmable Burst Size */
 /*! @{ */
-#define USB_BURSTSIZE_RXPBURST_MASK              (0xFFU)
-#define USB_BURSTSIZE_RXPBURST_SHIFT             (0U)
-#define USB_BURSTSIZE_RXPBURST(x)                (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_RXPBURST_SHIFT)) & USB_BURSTSIZE_RXPBURST_MASK)
-#define USB_BURSTSIZE_TXPBURST_MASK              (0x1FF00U)
-#define USB_BURSTSIZE_TXPBURST_SHIFT             (8U)
-#define USB_BURSTSIZE_TXPBURST(x)                (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_TXPBURST_SHIFT)) & USB_BURSTSIZE_TXPBURST_MASK)
+#define USB_BURSTSIZE_RXPBURST_MASK  (0xFFU)
+#define USB_BURSTSIZE_RXPBURST_SHIFT (0U)
+#define USB_BURSTSIZE_RXPBURST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_RXPBURST_SHIFT)) & USB_BURSTSIZE_RXPBURST_MASK)
+#define USB_BURSTSIZE_TXPBURST_MASK  (0x1FF00U)
+#define USB_BURSTSIZE_TXPBURST_SHIFT (8U)
+#define USB_BURSTSIZE_TXPBURST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_BURSTSIZE_TXPBURST_SHIFT)) & USB_BURSTSIZE_TXPBURST_MASK)
 /*! @} */
 
 /*! @name TXFILLTUNING - TX FIFO Fill Tuning */
 /*! @{ */
-#define USB_TXFILLTUNING_TXSCHOH_MASK            (0xFFU)
-#define USB_TXFILLTUNING_TXSCHOH_SHIFT           (0U)
-#define USB_TXFILLTUNING_TXSCHOH(x)              (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHOH_SHIFT)) & USB_TXFILLTUNING_TXSCHOH_MASK)
-#define USB_TXFILLTUNING_TXSCHHEALTH_MASK        (0x1F00U)
-#define USB_TXFILLTUNING_TXSCHHEALTH_SHIFT       (8U)
-#define USB_TXFILLTUNING_TXSCHHEALTH(x)          (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHHEALTH_SHIFT)) & USB_TXFILLTUNING_TXSCHHEALTH_MASK)
-#define USB_TXFILLTUNING_TXFIFOTHRES_MASK        (0x3F0000U)
-#define USB_TXFILLTUNING_TXFIFOTHRES_SHIFT       (16U)
-#define USB_TXFILLTUNING_TXFIFOTHRES(x)          (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXFIFOTHRES_SHIFT)) & USB_TXFILLTUNING_TXFIFOTHRES_MASK)
+#define USB_TXFILLTUNING_TXSCHOH_MASK  (0xFFU)
+#define USB_TXFILLTUNING_TXSCHOH_SHIFT (0U)
+#define USB_TXFILLTUNING_TXSCHOH(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHOH_SHIFT)) & USB_TXFILLTUNING_TXSCHOH_MASK)
+#define USB_TXFILLTUNING_TXSCHHEALTH_MASK  (0x1F00U)
+#define USB_TXFILLTUNING_TXSCHHEALTH_SHIFT (8U)
+#define USB_TXFILLTUNING_TXSCHHEALTH(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXSCHHEALTH_SHIFT)) & USB_TXFILLTUNING_TXSCHHEALTH_MASK)
+#define USB_TXFILLTUNING_TXFIFOTHRES_MASK  (0x3F0000U)
+#define USB_TXFILLTUNING_TXFIFOTHRES_SHIFT (16U)
+#define USB_TXFILLTUNING_TXFIFOTHRES(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USB_TXFILLTUNING_TXFIFOTHRES_SHIFT)) & USB_TXFILLTUNING_TXFIFOTHRES_MASK)
 /*! @} */
 
 /*! @name ENDPTNAK - Endpoint NAK */
 /*! @{ */
-#define USB_ENDPTNAK_EPRN_MASK                   (0xFFU)
-#define USB_ENDPTNAK_EPRN_SHIFT                  (0U)
-#define USB_ENDPTNAK_EPRN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPRN_SHIFT)) & USB_ENDPTNAK_EPRN_MASK)
-#define USB_ENDPTNAK_EPTN_MASK                   (0xFF0000U)
-#define USB_ENDPTNAK_EPTN_SHIFT                  (16U)
-#define USB_ENDPTNAK_EPTN(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPTN_SHIFT)) & USB_ENDPTNAK_EPTN_MASK)
+#define USB_ENDPTNAK_EPRN_MASK  (0xFFU)
+#define USB_ENDPTNAK_EPRN_SHIFT (0U)
+#define USB_ENDPTNAK_EPRN(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPRN_SHIFT)) & USB_ENDPTNAK_EPRN_MASK)
+#define USB_ENDPTNAK_EPTN_MASK  (0xFF0000U)
+#define USB_ENDPTNAK_EPTN_SHIFT (16U)
+#define USB_ENDPTNAK_EPTN(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAK_EPTN_SHIFT)) & USB_ENDPTNAK_EPTN_MASK)
 /*! @} */
 
 /*! @name ENDPTNAKEN - Endpoint NAK Enable */
 /*! @{ */
-#define USB_ENDPTNAKEN_EPRNE_MASK                (0xFFU)
-#define USB_ENDPTNAKEN_EPRNE_SHIFT               (0U)
-#define USB_ENDPTNAKEN_EPRNE(x)                  (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPRNE_SHIFT)) & USB_ENDPTNAKEN_EPRNE_MASK)
-#define USB_ENDPTNAKEN_EPTNE_MASK                (0xFF0000U)
-#define USB_ENDPTNAKEN_EPTNE_SHIFT               (16U)
-#define USB_ENDPTNAKEN_EPTNE(x)                  (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPTNE_SHIFT)) & USB_ENDPTNAKEN_EPTNE_MASK)
+#define USB_ENDPTNAKEN_EPRNE_MASK  (0xFFU)
+#define USB_ENDPTNAKEN_EPRNE_SHIFT (0U)
+#define USB_ENDPTNAKEN_EPRNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPRNE_SHIFT)) & USB_ENDPTNAKEN_EPRNE_MASK)
+#define USB_ENDPTNAKEN_EPTNE_MASK  (0xFF0000U)
+#define USB_ENDPTNAKEN_EPTNE_SHIFT (16U)
+#define USB_ENDPTNAKEN_EPTNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTNAKEN_EPTNE_SHIFT)) & USB_ENDPTNAKEN_EPTNE_MASK)
 /*! @} */
 
 /*! @name CONFIGFLAG - Configure Flag Register */
 /*! @{ */
-#define USB_CONFIGFLAG_CF_MASK                   (0x1U)
-#define USB_CONFIGFLAG_CF_SHIFT                  (0U)
-#define USB_CONFIGFLAG_CF(x)                     (((uint32_t)(((uint32_t)(x)) << USB_CONFIGFLAG_CF_SHIFT)) & USB_CONFIGFLAG_CF_MASK)
+#define USB_CONFIGFLAG_CF_MASK  (0x1U)
+#define USB_CONFIGFLAG_CF_SHIFT (0U)
+#define USB_CONFIGFLAG_CF(x)    (((uint32_t)(((uint32_t)(x)) << USB_CONFIGFLAG_CF_SHIFT)) & USB_CONFIGFLAG_CF_MASK)
 /*! @} */
 
 /*! @name PORTSC1 - Port Status & Control */
 /*! @{ */
-#define USB_PORTSC1_CCS_MASK                     (0x1U)
-#define USB_PORTSC1_CCS_SHIFT                    (0U)
-#define USB_PORTSC1_CCS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CCS_SHIFT)) & USB_PORTSC1_CCS_MASK)
-#define USB_PORTSC1_CSC_MASK                     (0x2U)
-#define USB_PORTSC1_CSC_SHIFT                    (1U)
-#define USB_PORTSC1_CSC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CSC_SHIFT)) & USB_PORTSC1_CSC_MASK)
-#define USB_PORTSC1_PE_MASK                      (0x4U)
-#define USB_PORTSC1_PE_SHIFT                     (2U)
-#define USB_PORTSC1_PE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PE_SHIFT)) & USB_PORTSC1_PE_MASK)
-#define USB_PORTSC1_PEC_MASK                     (0x8U)
-#define USB_PORTSC1_PEC_SHIFT                    (3U)
-#define USB_PORTSC1_PEC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PEC_SHIFT)) & USB_PORTSC1_PEC_MASK)
-#define USB_PORTSC1_OCA_MASK                     (0x10U)
-#define USB_PORTSC1_OCA_SHIFT                    (4U)
-#define USB_PORTSC1_OCA(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCA_SHIFT)) & USB_PORTSC1_OCA_MASK)
-#define USB_PORTSC1_OCC_MASK                     (0x20U)
-#define USB_PORTSC1_OCC_SHIFT                    (5U)
-#define USB_PORTSC1_OCC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCC_SHIFT)) & USB_PORTSC1_OCC_MASK)
-#define USB_PORTSC1_FPR_MASK                     (0x40U)
-#define USB_PORTSC1_FPR_SHIFT                    (6U)
-#define USB_PORTSC1_FPR(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_FPR_SHIFT)) & USB_PORTSC1_FPR_MASK)
-#define USB_PORTSC1_SUSP_MASK                    (0x80U)
-#define USB_PORTSC1_SUSP_SHIFT                   (7U)
-#define USB_PORTSC1_SUSP(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_SUSP_SHIFT)) & USB_PORTSC1_SUSP_MASK)
-#define USB_PORTSC1_PR_MASK                      (0x100U)
-#define USB_PORTSC1_PR_SHIFT                     (8U)
-#define USB_PORTSC1_PR(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PR_SHIFT)) & USB_PORTSC1_PR_MASK)
-#define USB_PORTSC1_HSP_MASK                     (0x200U)
-#define USB_PORTSC1_HSP_SHIFT                    (9U)
-#define USB_PORTSC1_HSP(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_HSP_SHIFT)) & USB_PORTSC1_HSP_MASK)
-#define USB_PORTSC1_LS_MASK                      (0xC00U)
-#define USB_PORTSC1_LS_SHIFT                     (10U)
-#define USB_PORTSC1_LS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_LS_SHIFT)) & USB_PORTSC1_LS_MASK)
-#define USB_PORTSC1_PP_MASK                      (0x1000U)
-#define USB_PORTSC1_PP_SHIFT                     (12U)
-#define USB_PORTSC1_PP(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PP_SHIFT)) & USB_PORTSC1_PP_MASK)
-#define USB_PORTSC1_PO_MASK                      (0x2000U)
-#define USB_PORTSC1_PO_SHIFT                     (13U)
-#define USB_PORTSC1_PO(x)                        (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PO_SHIFT)) & USB_PORTSC1_PO_MASK)
-#define USB_PORTSC1_PIC_MASK                     (0xC000U)
-#define USB_PORTSC1_PIC_SHIFT                    (14U)
-#define USB_PORTSC1_PIC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PIC_SHIFT)) & USB_PORTSC1_PIC_MASK)
-#define USB_PORTSC1_PTC_MASK                     (0xF0000U)
-#define USB_PORTSC1_PTC_SHIFT                    (16U)
-#define USB_PORTSC1_PTC(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTC_SHIFT)) & USB_PORTSC1_PTC_MASK)
-#define USB_PORTSC1_WKCN_MASK                    (0x100000U)
-#define USB_PORTSC1_WKCN_SHIFT                   (20U)
-#define USB_PORTSC1_WKCN(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKCN_SHIFT)) & USB_PORTSC1_WKCN_MASK)
-#define USB_PORTSC1_WKDC_MASK                    (0x200000U)
-#define USB_PORTSC1_WKDC_SHIFT                   (21U)
-#define USB_PORTSC1_WKDC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKDC_SHIFT)) & USB_PORTSC1_WKDC_MASK)
-#define USB_PORTSC1_WKOC_MASK                    (0x400000U)
-#define USB_PORTSC1_WKOC_SHIFT                   (22U)
-#define USB_PORTSC1_WKOC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKOC_SHIFT)) & USB_PORTSC1_WKOC_MASK)
-#define USB_PORTSC1_PHCD_MASK                    (0x800000U)
-#define USB_PORTSC1_PHCD_SHIFT                   (23U)
-#define USB_PORTSC1_PHCD(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PHCD_SHIFT)) & USB_PORTSC1_PHCD_MASK)
-#define USB_PORTSC1_PFSC_MASK                    (0x1000000U)
-#define USB_PORTSC1_PFSC_SHIFT                   (24U)
-#define USB_PORTSC1_PFSC(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PFSC_SHIFT)) & USB_PORTSC1_PFSC_MASK)
-#define USB_PORTSC1_PTS_2_MASK                   (0x2000000U)
-#define USB_PORTSC1_PTS_2_SHIFT                  (25U)
-#define USB_PORTSC1_PTS_2(x)                     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_2_SHIFT)) & USB_PORTSC1_PTS_2_MASK)
-#define USB_PORTSC1_PSPD_MASK                    (0xC000000U)
-#define USB_PORTSC1_PSPD_SHIFT                   (26U)
-#define USB_PORTSC1_PSPD(x)                      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PSPD_SHIFT)) & USB_PORTSC1_PSPD_MASK)
-#define USB_PORTSC1_PTW_MASK                     (0x10000000U)
-#define USB_PORTSC1_PTW_SHIFT                    (28U)
-#define USB_PORTSC1_PTW(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTW_SHIFT)) & USB_PORTSC1_PTW_MASK)
-#define USB_PORTSC1_STS_MASK                     (0x20000000U)
-#define USB_PORTSC1_STS_SHIFT                    (29U)
-#define USB_PORTSC1_STS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_STS_SHIFT)) & USB_PORTSC1_STS_MASK)
-#define USB_PORTSC1_PTS_1_MASK                   (0xC0000000U)
-#define USB_PORTSC1_PTS_1_SHIFT                  (30U)
-#define USB_PORTSC1_PTS_1(x)                     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_1_SHIFT)) & USB_PORTSC1_PTS_1_MASK)
+#define USB_PORTSC1_CCS_MASK    (0x1U)
+#define USB_PORTSC1_CCS_SHIFT   (0U)
+#define USB_PORTSC1_CCS(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CCS_SHIFT)) & USB_PORTSC1_CCS_MASK)
+#define USB_PORTSC1_CSC_MASK    (0x2U)
+#define USB_PORTSC1_CSC_SHIFT   (1U)
+#define USB_PORTSC1_CSC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_CSC_SHIFT)) & USB_PORTSC1_CSC_MASK)
+#define USB_PORTSC1_PE_MASK     (0x4U)
+#define USB_PORTSC1_PE_SHIFT    (2U)
+#define USB_PORTSC1_PE(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PE_SHIFT)) & USB_PORTSC1_PE_MASK)
+#define USB_PORTSC1_PEC_MASK    (0x8U)
+#define USB_PORTSC1_PEC_SHIFT   (3U)
+#define USB_PORTSC1_PEC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PEC_SHIFT)) & USB_PORTSC1_PEC_MASK)
+#define USB_PORTSC1_OCA_MASK    (0x10U)
+#define USB_PORTSC1_OCA_SHIFT   (4U)
+#define USB_PORTSC1_OCA(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCA_SHIFT)) & USB_PORTSC1_OCA_MASK)
+#define USB_PORTSC1_OCC_MASK    (0x20U)
+#define USB_PORTSC1_OCC_SHIFT   (5U)
+#define USB_PORTSC1_OCC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_OCC_SHIFT)) & USB_PORTSC1_OCC_MASK)
+#define USB_PORTSC1_FPR_MASK    (0x40U)
+#define USB_PORTSC1_FPR_SHIFT   (6U)
+#define USB_PORTSC1_FPR(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_FPR_SHIFT)) & USB_PORTSC1_FPR_MASK)
+#define USB_PORTSC1_SUSP_MASK   (0x80U)
+#define USB_PORTSC1_SUSP_SHIFT  (7U)
+#define USB_PORTSC1_SUSP(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_SUSP_SHIFT)) & USB_PORTSC1_SUSP_MASK)
+#define USB_PORTSC1_PR_MASK     (0x100U)
+#define USB_PORTSC1_PR_SHIFT    (8U)
+#define USB_PORTSC1_PR(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PR_SHIFT)) & USB_PORTSC1_PR_MASK)
+#define USB_PORTSC1_HSP_MASK    (0x200U)
+#define USB_PORTSC1_HSP_SHIFT   (9U)
+#define USB_PORTSC1_HSP(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_HSP_SHIFT)) & USB_PORTSC1_HSP_MASK)
+#define USB_PORTSC1_LS_MASK     (0xC00U)
+#define USB_PORTSC1_LS_SHIFT    (10U)
+#define USB_PORTSC1_LS(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_LS_SHIFT)) & USB_PORTSC1_LS_MASK)
+#define USB_PORTSC1_PP_MASK     (0x1000U)
+#define USB_PORTSC1_PP_SHIFT    (12U)
+#define USB_PORTSC1_PP(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PP_SHIFT)) & USB_PORTSC1_PP_MASK)
+#define USB_PORTSC1_PO_MASK     (0x2000U)
+#define USB_PORTSC1_PO_SHIFT    (13U)
+#define USB_PORTSC1_PO(x)       (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PO_SHIFT)) & USB_PORTSC1_PO_MASK)
+#define USB_PORTSC1_PIC_MASK    (0xC000U)
+#define USB_PORTSC1_PIC_SHIFT   (14U)
+#define USB_PORTSC1_PIC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PIC_SHIFT)) & USB_PORTSC1_PIC_MASK)
+#define USB_PORTSC1_PTC_MASK    (0xF0000U)
+#define USB_PORTSC1_PTC_SHIFT   (16U)
+#define USB_PORTSC1_PTC(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTC_SHIFT)) & USB_PORTSC1_PTC_MASK)
+#define USB_PORTSC1_WKCN_MASK   (0x100000U)
+#define USB_PORTSC1_WKCN_SHIFT  (20U)
+#define USB_PORTSC1_WKCN(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKCN_SHIFT)) & USB_PORTSC1_WKCN_MASK)
+#define USB_PORTSC1_WKDC_MASK   (0x200000U)
+#define USB_PORTSC1_WKDC_SHIFT  (21U)
+#define USB_PORTSC1_WKDC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKDC_SHIFT)) & USB_PORTSC1_WKDC_MASK)
+#define USB_PORTSC1_WKOC_MASK   (0x400000U)
+#define USB_PORTSC1_WKOC_SHIFT  (22U)
+#define USB_PORTSC1_WKOC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_WKOC_SHIFT)) & USB_PORTSC1_WKOC_MASK)
+#define USB_PORTSC1_PHCD_MASK   (0x800000U)
+#define USB_PORTSC1_PHCD_SHIFT  (23U)
+#define USB_PORTSC1_PHCD(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PHCD_SHIFT)) & USB_PORTSC1_PHCD_MASK)
+#define USB_PORTSC1_PFSC_MASK   (0x1000000U)
+#define USB_PORTSC1_PFSC_SHIFT  (24U)
+#define USB_PORTSC1_PFSC(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PFSC_SHIFT)) & USB_PORTSC1_PFSC_MASK)
+#define USB_PORTSC1_PTS_2_MASK  (0x2000000U)
+#define USB_PORTSC1_PTS_2_SHIFT (25U)
+#define USB_PORTSC1_PTS_2(x)    (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_2_SHIFT)) & USB_PORTSC1_PTS_2_MASK)
+#define USB_PORTSC1_PSPD_MASK   (0xC000000U)
+#define USB_PORTSC1_PSPD_SHIFT  (26U)
+#define USB_PORTSC1_PSPD(x)     (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PSPD_SHIFT)) & USB_PORTSC1_PSPD_MASK)
+#define USB_PORTSC1_PTW_MASK    (0x10000000U)
+#define USB_PORTSC1_PTW_SHIFT   (28U)
+#define USB_PORTSC1_PTW(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTW_SHIFT)) & USB_PORTSC1_PTW_MASK)
+#define USB_PORTSC1_STS_MASK    (0x20000000U)
+#define USB_PORTSC1_STS_SHIFT   (29U)
+#define USB_PORTSC1_STS(x)      (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_STS_SHIFT)) & USB_PORTSC1_STS_MASK)
+#define USB_PORTSC1_PTS_1_MASK  (0xC0000000U)
+#define USB_PORTSC1_PTS_1_SHIFT (30U)
+#define USB_PORTSC1_PTS_1(x)    (((uint32_t)(((uint32_t)(x)) << USB_PORTSC1_PTS_1_SHIFT)) & USB_PORTSC1_PTS_1_MASK)
 /*! @} */
 
 /*! @name OTGSC - On-The-Go Status & control */
 /*! @{ */
-#define USB_OTGSC_VD_MASK                        (0x1U)
-#define USB_OTGSC_VD_SHIFT                       (0U)
-#define USB_OTGSC_VD(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VD_SHIFT)) & USB_OTGSC_VD_MASK)
-#define USB_OTGSC_VC_MASK                        (0x2U)
-#define USB_OTGSC_VC_SHIFT                       (1U)
-#define USB_OTGSC_VC(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VC_SHIFT)) & USB_OTGSC_VC_MASK)
-#define USB_OTGSC_OT_MASK                        (0x8U)
-#define USB_OTGSC_OT_SHIFT                       (3U)
-#define USB_OTGSC_OT(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_OT_SHIFT)) & USB_OTGSC_OT_MASK)
-#define USB_OTGSC_DP_MASK                        (0x10U)
-#define USB_OTGSC_DP_SHIFT                       (4U)
-#define USB_OTGSC_DP(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DP_SHIFT)) & USB_OTGSC_DP_MASK)
-#define USB_OTGSC_IDPU_MASK                      (0x20U)
-#define USB_OTGSC_IDPU_SHIFT                     (5U)
-#define USB_OTGSC_IDPU(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDPU_SHIFT)) & USB_OTGSC_IDPU_MASK)
-#define USB_OTGSC_ID_MASK                        (0x100U)
-#define USB_OTGSC_ID_SHIFT                       (8U)
-#define USB_OTGSC_ID(x)                          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ID_SHIFT)) & USB_OTGSC_ID_MASK)
-#define USB_OTGSC_AVV_MASK                       (0x200U)
-#define USB_OTGSC_AVV_SHIFT                      (9U)
-#define USB_OTGSC_AVV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVV_SHIFT)) & USB_OTGSC_AVV_MASK)
-#define USB_OTGSC_ASV_MASK                       (0x400U)
-#define USB_OTGSC_ASV_SHIFT                      (10U)
-#define USB_OTGSC_ASV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASV_SHIFT)) & USB_OTGSC_ASV_MASK)
-#define USB_OTGSC_BSV_MASK                       (0x800U)
-#define USB_OTGSC_BSV_SHIFT                      (11U)
-#define USB_OTGSC_BSV(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSV_SHIFT)) & USB_OTGSC_BSV_MASK)
-#define USB_OTGSC_BSE_MASK                       (0x1000U)
-#define USB_OTGSC_BSE_SHIFT                      (12U)
-#define USB_OTGSC_BSE(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSE_SHIFT)) & USB_OTGSC_BSE_MASK)
-#define USB_OTGSC_TOG_1MS_MASK                   (0x2000U)
-#define USB_OTGSC_TOG_1MS_SHIFT                  (13U)
-#define USB_OTGSC_TOG_1MS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_TOG_1MS_SHIFT)) & USB_OTGSC_TOG_1MS_MASK)
-#define USB_OTGSC_DPS_MASK                       (0x4000U)
-#define USB_OTGSC_DPS_SHIFT                      (14U)
-#define USB_OTGSC_DPS(x)                         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPS_SHIFT)) & USB_OTGSC_DPS_MASK)
-#define USB_OTGSC_IDIS_MASK                      (0x10000U)
-#define USB_OTGSC_IDIS_SHIFT                     (16U)
-#define USB_OTGSC_IDIS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIS_SHIFT)) & USB_OTGSC_IDIS_MASK)
-#define USB_OTGSC_AVVIS_MASK                     (0x20000U)
-#define USB_OTGSC_AVVIS_SHIFT                    (17U)
-#define USB_OTGSC_AVVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIS_SHIFT)) & USB_OTGSC_AVVIS_MASK)
-#define USB_OTGSC_ASVIS_MASK                     (0x40000U)
-#define USB_OTGSC_ASVIS_SHIFT                    (18U)
-#define USB_OTGSC_ASVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIS_SHIFT)) & USB_OTGSC_ASVIS_MASK)
-#define USB_OTGSC_BSVIS_MASK                     (0x80000U)
-#define USB_OTGSC_BSVIS_SHIFT                    (19U)
-#define USB_OTGSC_BSVIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIS_SHIFT)) & USB_OTGSC_BSVIS_MASK)
-#define USB_OTGSC_BSEIS_MASK                     (0x100000U)
-#define USB_OTGSC_BSEIS_SHIFT                    (20U)
-#define USB_OTGSC_BSEIS(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIS_SHIFT)) & USB_OTGSC_BSEIS_MASK)
-#define USB_OTGSC_STATUS_1MS_MASK                (0x200000U)
-#define USB_OTGSC_STATUS_1MS_SHIFT               (21U)
-#define USB_OTGSC_STATUS_1MS(x)                  (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_STATUS_1MS_SHIFT)) & USB_OTGSC_STATUS_1MS_MASK)
-#define USB_OTGSC_DPIS_MASK                      (0x400000U)
-#define USB_OTGSC_DPIS_SHIFT                     (22U)
-#define USB_OTGSC_DPIS(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIS_SHIFT)) & USB_OTGSC_DPIS_MASK)
-#define USB_OTGSC_IDIE_MASK                      (0x1000000U)
-#define USB_OTGSC_IDIE_SHIFT                     (24U)
-#define USB_OTGSC_IDIE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIE_SHIFT)) & USB_OTGSC_IDIE_MASK)
-#define USB_OTGSC_AVVIE_MASK                     (0x2000000U)
-#define USB_OTGSC_AVVIE_SHIFT                    (25U)
-#define USB_OTGSC_AVVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIE_SHIFT)) & USB_OTGSC_AVVIE_MASK)
-#define USB_OTGSC_ASVIE_MASK                     (0x4000000U)
-#define USB_OTGSC_ASVIE_SHIFT                    (26U)
-#define USB_OTGSC_ASVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIE_SHIFT)) & USB_OTGSC_ASVIE_MASK)
-#define USB_OTGSC_BSVIE_MASK                     (0x8000000U)
-#define USB_OTGSC_BSVIE_SHIFT                    (27U)
-#define USB_OTGSC_BSVIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIE_SHIFT)) & USB_OTGSC_BSVIE_MASK)
-#define USB_OTGSC_BSEIE_MASK                     (0x10000000U)
-#define USB_OTGSC_BSEIE_SHIFT                    (28U)
-#define USB_OTGSC_BSEIE(x)                       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIE_SHIFT)) & USB_OTGSC_BSEIE_MASK)
-#define USB_OTGSC_EN_1MS_MASK                    (0x20000000U)
-#define USB_OTGSC_EN_1MS_SHIFT                   (29U)
-#define USB_OTGSC_EN_1MS(x)                      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_EN_1MS_SHIFT)) & USB_OTGSC_EN_1MS_MASK)
-#define USB_OTGSC_DPIE_MASK                      (0x40000000U)
-#define USB_OTGSC_DPIE_SHIFT                     (30U)
-#define USB_OTGSC_DPIE(x)                        (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIE_SHIFT)) & USB_OTGSC_DPIE_MASK)
+#define USB_OTGSC_VD_MASK          (0x1U)
+#define USB_OTGSC_VD_SHIFT         (0U)
+#define USB_OTGSC_VD(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VD_SHIFT)) & USB_OTGSC_VD_MASK)
+#define USB_OTGSC_VC_MASK          (0x2U)
+#define USB_OTGSC_VC_SHIFT         (1U)
+#define USB_OTGSC_VC(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_VC_SHIFT)) & USB_OTGSC_VC_MASK)
+#define USB_OTGSC_OT_MASK          (0x8U)
+#define USB_OTGSC_OT_SHIFT         (3U)
+#define USB_OTGSC_OT(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_OT_SHIFT)) & USB_OTGSC_OT_MASK)
+#define USB_OTGSC_DP_MASK          (0x10U)
+#define USB_OTGSC_DP_SHIFT         (4U)
+#define USB_OTGSC_DP(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DP_SHIFT)) & USB_OTGSC_DP_MASK)
+#define USB_OTGSC_IDPU_MASK        (0x20U)
+#define USB_OTGSC_IDPU_SHIFT       (5U)
+#define USB_OTGSC_IDPU(x)          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDPU_SHIFT)) & USB_OTGSC_IDPU_MASK)
+#define USB_OTGSC_ID_MASK          (0x100U)
+#define USB_OTGSC_ID_SHIFT         (8U)
+#define USB_OTGSC_ID(x)            (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ID_SHIFT)) & USB_OTGSC_ID_MASK)
+#define USB_OTGSC_AVV_MASK         (0x200U)
+#define USB_OTGSC_AVV_SHIFT        (9U)
+#define USB_OTGSC_AVV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVV_SHIFT)) & USB_OTGSC_AVV_MASK)
+#define USB_OTGSC_ASV_MASK         (0x400U)
+#define USB_OTGSC_ASV_SHIFT        (10U)
+#define USB_OTGSC_ASV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASV_SHIFT)) & USB_OTGSC_ASV_MASK)
+#define USB_OTGSC_BSV_MASK         (0x800U)
+#define USB_OTGSC_BSV_SHIFT        (11U)
+#define USB_OTGSC_BSV(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSV_SHIFT)) & USB_OTGSC_BSV_MASK)
+#define USB_OTGSC_BSE_MASK         (0x1000U)
+#define USB_OTGSC_BSE_SHIFT        (12U)
+#define USB_OTGSC_BSE(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSE_SHIFT)) & USB_OTGSC_BSE_MASK)
+#define USB_OTGSC_TOG_1MS_MASK     (0x2000U)
+#define USB_OTGSC_TOG_1MS_SHIFT    (13U)
+#define USB_OTGSC_TOG_1MS(x)       (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_TOG_1MS_SHIFT)) & USB_OTGSC_TOG_1MS_MASK)
+#define USB_OTGSC_DPS_MASK         (0x4000U)
+#define USB_OTGSC_DPS_SHIFT        (14U)
+#define USB_OTGSC_DPS(x)           (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPS_SHIFT)) & USB_OTGSC_DPS_MASK)
+#define USB_OTGSC_IDIS_MASK        (0x10000U)
+#define USB_OTGSC_IDIS_SHIFT       (16U)
+#define USB_OTGSC_IDIS(x)          (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIS_SHIFT)) & USB_OTGSC_IDIS_MASK)
+#define USB_OTGSC_AVVIS_MASK       (0x20000U)
+#define USB_OTGSC_AVVIS_SHIFT      (17U)
+#define USB_OTGSC_AVVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIS_SHIFT)) & USB_OTGSC_AVVIS_MASK)
+#define USB_OTGSC_ASVIS_MASK       (0x40000U)
+#define USB_OTGSC_ASVIS_SHIFT      (18U)
+#define USB_OTGSC_ASVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIS_SHIFT)) & USB_OTGSC_ASVIS_MASK)
+#define USB_OTGSC_BSVIS_MASK       (0x80000U)
+#define USB_OTGSC_BSVIS_SHIFT      (19U)
+#define USB_OTGSC_BSVIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIS_SHIFT)) & USB_OTGSC_BSVIS_MASK)
+#define USB_OTGSC_BSEIS_MASK       (0x100000U)
+#define USB_OTGSC_BSEIS_SHIFT      (20U)
+#define USB_OTGSC_BSEIS(x)         (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIS_SHIFT)) & USB_OTGSC_BSEIS_MASK)
+#define USB_OTGSC_STATUS_1MS_MASK  (0x200000U)
+#define USB_OTGSC_STATUS_1MS_SHIFT (21U)
+#define USB_OTGSC_STATUS_1MS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_STATUS_1MS_SHIFT)) & USB_OTGSC_STATUS_1MS_MASK)
+#define USB_OTGSC_DPIS_MASK    (0x400000U)
+#define USB_OTGSC_DPIS_SHIFT   (22U)
+#define USB_OTGSC_DPIS(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIS_SHIFT)) & USB_OTGSC_DPIS_MASK)
+#define USB_OTGSC_IDIE_MASK    (0x1000000U)
+#define USB_OTGSC_IDIE_SHIFT   (24U)
+#define USB_OTGSC_IDIE(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_IDIE_SHIFT)) & USB_OTGSC_IDIE_MASK)
+#define USB_OTGSC_AVVIE_MASK   (0x2000000U)
+#define USB_OTGSC_AVVIE_SHIFT  (25U)
+#define USB_OTGSC_AVVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_AVVIE_SHIFT)) & USB_OTGSC_AVVIE_MASK)
+#define USB_OTGSC_ASVIE_MASK   (0x4000000U)
+#define USB_OTGSC_ASVIE_SHIFT  (26U)
+#define USB_OTGSC_ASVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_ASVIE_SHIFT)) & USB_OTGSC_ASVIE_MASK)
+#define USB_OTGSC_BSVIE_MASK   (0x8000000U)
+#define USB_OTGSC_BSVIE_SHIFT  (27U)
+#define USB_OTGSC_BSVIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSVIE_SHIFT)) & USB_OTGSC_BSVIE_MASK)
+#define USB_OTGSC_BSEIE_MASK   (0x10000000U)
+#define USB_OTGSC_BSEIE_SHIFT  (28U)
+#define USB_OTGSC_BSEIE(x)     (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_BSEIE_SHIFT)) & USB_OTGSC_BSEIE_MASK)
+#define USB_OTGSC_EN_1MS_MASK  (0x20000000U)
+#define USB_OTGSC_EN_1MS_SHIFT (29U)
+#define USB_OTGSC_EN_1MS(x)    (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_EN_1MS_SHIFT)) & USB_OTGSC_EN_1MS_MASK)
+#define USB_OTGSC_DPIE_MASK    (0x40000000U)
+#define USB_OTGSC_DPIE_SHIFT   (30U)
+#define USB_OTGSC_DPIE(x)      (((uint32_t)(((uint32_t)(x)) << USB_OTGSC_DPIE_SHIFT)) & USB_OTGSC_DPIE_MASK)
 /*! @} */
 
 /*! @name USBMODE - USB Device Mode */
 /*! @{ */
-#define USB_USBMODE_CM_MASK                      (0x3U)
-#define USB_USBMODE_CM_SHIFT                     (0U)
-#define USB_USBMODE_CM(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_CM_SHIFT)) & USB_USBMODE_CM_MASK)
-#define USB_USBMODE_ES_MASK                      (0x4U)
-#define USB_USBMODE_ES_SHIFT                     (2U)
-#define USB_USBMODE_ES(x)                        (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_ES_SHIFT)) & USB_USBMODE_ES_MASK)
-#define USB_USBMODE_SLOM_MASK                    (0x8U)
-#define USB_USBMODE_SLOM_SHIFT                   (3U)
-#define USB_USBMODE_SLOM(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SLOM_SHIFT)) & USB_USBMODE_SLOM_MASK)
-#define USB_USBMODE_SDIS_MASK                    (0x10U)
-#define USB_USBMODE_SDIS_SHIFT                   (4U)
-#define USB_USBMODE_SDIS(x)                      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SDIS_SHIFT)) & USB_USBMODE_SDIS_MASK)
+#define USB_USBMODE_CM_MASK    (0x3U)
+#define USB_USBMODE_CM_SHIFT   (0U)
+#define USB_USBMODE_CM(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_CM_SHIFT)) & USB_USBMODE_CM_MASK)
+#define USB_USBMODE_ES_MASK    (0x4U)
+#define USB_USBMODE_ES_SHIFT   (2U)
+#define USB_USBMODE_ES(x)      (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_ES_SHIFT)) & USB_USBMODE_ES_MASK)
+#define USB_USBMODE_SLOM_MASK  (0x8U)
+#define USB_USBMODE_SLOM_SHIFT (3U)
+#define USB_USBMODE_SLOM(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SLOM_SHIFT)) & USB_USBMODE_SLOM_MASK)
+#define USB_USBMODE_SDIS_MASK  (0x10U)
+#define USB_USBMODE_SDIS_SHIFT (4U)
+#define USB_USBMODE_SDIS(x)    (((uint32_t)(((uint32_t)(x)) << USB_USBMODE_SDIS_SHIFT)) & USB_USBMODE_SDIS_MASK)
 /*! @} */
 
 /*! @name ENDPTSETUPSTAT - Endpoint Setup Status */
 /*! @{ */
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK   (0xFFFFU)
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT  (0U)
-#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT)) & USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK  (0xFFFFU)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT (0U)
+#define USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT)) & USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK)
 /*! @} */
 
 /*! @name ENDPTPRIME - Endpoint Prime */
 /*! @{ */
-#define USB_ENDPTPRIME_PERB_MASK                 (0xFFU)
-#define USB_ENDPTPRIME_PERB_SHIFT                (0U)
-#define USB_ENDPTPRIME_PERB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PERB_SHIFT)) & USB_ENDPTPRIME_PERB_MASK)
-#define USB_ENDPTPRIME_PETB_MASK                 (0xFF0000U)
-#define USB_ENDPTPRIME_PETB_SHIFT                (16U)
-#define USB_ENDPTPRIME_PETB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PETB_SHIFT)) & USB_ENDPTPRIME_PETB_MASK)
+#define USB_ENDPTPRIME_PERB_MASK  (0xFFU)
+#define USB_ENDPTPRIME_PERB_SHIFT (0U)
+#define USB_ENDPTPRIME_PERB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PERB_SHIFT)) & USB_ENDPTPRIME_PERB_MASK)
+#define USB_ENDPTPRIME_PETB_MASK  (0xFF0000U)
+#define USB_ENDPTPRIME_PETB_SHIFT (16U)
+#define USB_ENDPTPRIME_PETB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTPRIME_PETB_SHIFT)) & USB_ENDPTPRIME_PETB_MASK)
 /*! @} */
 
 /*! @name ENDPTFLUSH - Endpoint Flush */
 /*! @{ */
-#define USB_ENDPTFLUSH_FERB_MASK                 (0xFFU)
-#define USB_ENDPTFLUSH_FERB_SHIFT                (0U)
-#define USB_ENDPTFLUSH_FERB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FERB_SHIFT)) & USB_ENDPTFLUSH_FERB_MASK)
-#define USB_ENDPTFLUSH_FETB_MASK                 (0xFF0000U)
-#define USB_ENDPTFLUSH_FETB_SHIFT                (16U)
-#define USB_ENDPTFLUSH_FETB(x)                   (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FETB_SHIFT)) & USB_ENDPTFLUSH_FETB_MASK)
+#define USB_ENDPTFLUSH_FERB_MASK  (0xFFU)
+#define USB_ENDPTFLUSH_FERB_SHIFT (0U)
+#define USB_ENDPTFLUSH_FERB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FERB_SHIFT)) & USB_ENDPTFLUSH_FERB_MASK)
+#define USB_ENDPTFLUSH_FETB_MASK  (0xFF0000U)
+#define USB_ENDPTFLUSH_FETB_SHIFT (16U)
+#define USB_ENDPTFLUSH_FETB(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTFLUSH_FETB_SHIFT)) & USB_ENDPTFLUSH_FETB_MASK)
 /*! @} */
 
 /*! @name ENDPTSTAT - Endpoint Status */
 /*! @{ */
-#define USB_ENDPTSTAT_ERBR_MASK                  (0xFFU)
-#define USB_ENDPTSTAT_ERBR_SHIFT                 (0U)
-#define USB_ENDPTSTAT_ERBR(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ERBR_SHIFT)) & USB_ENDPTSTAT_ERBR_MASK)
-#define USB_ENDPTSTAT_ETBR_MASK                  (0xFF0000U)
-#define USB_ENDPTSTAT_ETBR_SHIFT                 (16U)
-#define USB_ENDPTSTAT_ETBR(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ETBR_SHIFT)) & USB_ENDPTSTAT_ETBR_MASK)
+#define USB_ENDPTSTAT_ERBR_MASK  (0xFFU)
+#define USB_ENDPTSTAT_ERBR_SHIFT (0U)
+#define USB_ENDPTSTAT_ERBR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ERBR_SHIFT)) & USB_ENDPTSTAT_ERBR_MASK)
+#define USB_ENDPTSTAT_ETBR_MASK  (0xFF0000U)
+#define USB_ENDPTSTAT_ETBR_SHIFT (16U)
+#define USB_ENDPTSTAT_ETBR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTSTAT_ETBR_SHIFT)) & USB_ENDPTSTAT_ETBR_MASK)
 /*! @} */
 
 /*! @name ENDPTCOMPLETE - Endpoint Complete */
 /*! @{ */
-#define USB_ENDPTCOMPLETE_ERCE_MASK              (0xFFU)
-#define USB_ENDPTCOMPLETE_ERCE_SHIFT             (0U)
-#define USB_ENDPTCOMPLETE_ERCE(x)                (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ERCE_SHIFT)) & USB_ENDPTCOMPLETE_ERCE_MASK)
-#define USB_ENDPTCOMPLETE_ETCE_MASK              (0xFF0000U)
-#define USB_ENDPTCOMPLETE_ETCE_SHIFT             (16U)
-#define USB_ENDPTCOMPLETE_ETCE(x)                (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ETCE_SHIFT)) & USB_ENDPTCOMPLETE_ETCE_MASK)
+#define USB_ENDPTCOMPLETE_ERCE_MASK  (0xFFU)
+#define USB_ENDPTCOMPLETE_ERCE_SHIFT (0U)
+#define USB_ENDPTCOMPLETE_ERCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ERCE_SHIFT)) & USB_ENDPTCOMPLETE_ERCE_MASK)
+#define USB_ENDPTCOMPLETE_ETCE_MASK  (0xFF0000U)
+#define USB_ENDPTCOMPLETE_ETCE_SHIFT (16U)
+#define USB_ENDPTCOMPLETE_ETCE(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCOMPLETE_ETCE_SHIFT)) & USB_ENDPTCOMPLETE_ETCE_MASK)
 /*! @} */
 
 /*! @name ENDPTCTRL0 - Endpoint Control0 */
 /*! @{ */
-#define USB_ENDPTCTRL0_RXS_MASK                  (0x1U)
-#define USB_ENDPTCTRL0_RXS_SHIFT                 (0U)
-#define USB_ENDPTCTRL0_RXS(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXS_SHIFT)) & USB_ENDPTCTRL0_RXS_MASK)
-#define USB_ENDPTCTRL0_RXT_MASK                  (0xCU)
-#define USB_ENDPTCTRL0_RXT_SHIFT                 (2U)
-#define USB_ENDPTCTRL0_RXT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXT_SHIFT)) & USB_ENDPTCTRL0_RXT_MASK)
-#define USB_ENDPTCTRL0_RXE_MASK                  (0x80U)
-#define USB_ENDPTCTRL0_RXE_SHIFT                 (7U)
-#define USB_ENDPTCTRL0_RXE(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXE_SHIFT)) & USB_ENDPTCTRL0_RXE_MASK)
-#define USB_ENDPTCTRL0_TXS_MASK                  (0x10000U)
-#define USB_ENDPTCTRL0_TXS_SHIFT                 (16U)
-#define USB_ENDPTCTRL0_TXS(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXS_SHIFT)) & USB_ENDPTCTRL0_TXS_MASK)
-#define USB_ENDPTCTRL0_TXT_MASK                  (0xC0000U)
-#define USB_ENDPTCTRL0_TXT_SHIFT                 (18U)
-#define USB_ENDPTCTRL0_TXT(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXT_SHIFT)) & USB_ENDPTCTRL0_TXT_MASK)
-#define USB_ENDPTCTRL0_TXE_MASK                  (0x800000U)
-#define USB_ENDPTCTRL0_TXE_SHIFT                 (23U)
-#define USB_ENDPTCTRL0_TXE(x)                    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXE_SHIFT)) & USB_ENDPTCTRL0_TXE_MASK)
+#define USB_ENDPTCTRL0_RXS_MASK  (0x1U)
+#define USB_ENDPTCTRL0_RXS_SHIFT (0U)
+#define USB_ENDPTCTRL0_RXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXS_SHIFT)) & USB_ENDPTCTRL0_RXS_MASK)
+#define USB_ENDPTCTRL0_RXT_MASK  (0xCU)
+#define USB_ENDPTCTRL0_RXT_SHIFT (2U)
+#define USB_ENDPTCTRL0_RXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXT_SHIFT)) & USB_ENDPTCTRL0_RXT_MASK)
+#define USB_ENDPTCTRL0_RXE_MASK  (0x80U)
+#define USB_ENDPTCTRL0_RXE_SHIFT (7U)
+#define USB_ENDPTCTRL0_RXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_RXE_SHIFT)) & USB_ENDPTCTRL0_RXE_MASK)
+#define USB_ENDPTCTRL0_TXS_MASK  (0x10000U)
+#define USB_ENDPTCTRL0_TXS_SHIFT (16U)
+#define USB_ENDPTCTRL0_TXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXS_SHIFT)) & USB_ENDPTCTRL0_TXS_MASK)
+#define USB_ENDPTCTRL0_TXT_MASK  (0xC0000U)
+#define USB_ENDPTCTRL0_TXT_SHIFT (18U)
+#define USB_ENDPTCTRL0_TXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXT_SHIFT)) & USB_ENDPTCTRL0_TXT_MASK)
+#define USB_ENDPTCTRL0_TXE_MASK  (0x800000U)
+#define USB_ENDPTCTRL0_TXE_SHIFT (23U)
+#define USB_ENDPTCTRL0_TXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL0_TXE_SHIFT)) & USB_ENDPTCTRL0_TXE_MASK)
 /*! @} */
 
 /*! @name ENDPTCTRL - Endpoint Control 1..Endpoint Control 7 */
 /*! @{ */
-#define USB_ENDPTCTRL_RXS_MASK                   (0x1U)
-#define USB_ENDPTCTRL_RXS_SHIFT                  (0U)
-#define USB_ENDPTCTRL_RXS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXS_SHIFT)) & USB_ENDPTCTRL_RXS_MASK)
-#define USB_ENDPTCTRL_RXD_MASK                   (0x2U)
-#define USB_ENDPTCTRL_RXD_SHIFT                  (1U)
-#define USB_ENDPTCTRL_RXD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXD_SHIFT)) & USB_ENDPTCTRL_RXD_MASK)
-#define USB_ENDPTCTRL_RXT_MASK                   (0xCU)
-#define USB_ENDPTCTRL_RXT_SHIFT                  (2U)
-#define USB_ENDPTCTRL_RXT(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXT_SHIFT)) & USB_ENDPTCTRL_RXT_MASK)
-#define USB_ENDPTCTRL_RXI_MASK                   (0x20U)
-#define USB_ENDPTCTRL_RXI_SHIFT                  (5U)
-#define USB_ENDPTCTRL_RXI(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXI_SHIFT)) & USB_ENDPTCTRL_RXI_MASK)
-#define USB_ENDPTCTRL_RXR_MASK                   (0x40U)
-#define USB_ENDPTCTRL_RXR_SHIFT                  (6U)
-#define USB_ENDPTCTRL_RXR(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXR_SHIFT)) & USB_ENDPTCTRL_RXR_MASK)
-#define USB_ENDPTCTRL_RXE_MASK                   (0x80U)
-#define USB_ENDPTCTRL_RXE_SHIFT                  (7U)
-#define USB_ENDPTCTRL_RXE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXE_SHIFT)) & USB_ENDPTCTRL_RXE_MASK)
-#define USB_ENDPTCTRL_TXS_MASK                   (0x10000U)
-#define USB_ENDPTCTRL_TXS_SHIFT                  (16U)
-#define USB_ENDPTCTRL_TXS(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXS_SHIFT)) & USB_ENDPTCTRL_TXS_MASK)
-#define USB_ENDPTCTRL_TXD_MASK                   (0x20000U)
-#define USB_ENDPTCTRL_TXD_SHIFT                  (17U)
-#define USB_ENDPTCTRL_TXD(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXD_SHIFT)) & USB_ENDPTCTRL_TXD_MASK)
-#define USB_ENDPTCTRL_TXT_MASK                   (0xC0000U)
-#define USB_ENDPTCTRL_TXT_SHIFT                  (18U)
-#define USB_ENDPTCTRL_TXT(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXT_SHIFT)) & USB_ENDPTCTRL_TXT_MASK)
-#define USB_ENDPTCTRL_TXI_MASK                   (0x200000U)
-#define USB_ENDPTCTRL_TXI_SHIFT                  (21U)
-#define USB_ENDPTCTRL_TXI(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXI_SHIFT)) & USB_ENDPTCTRL_TXI_MASK)
-#define USB_ENDPTCTRL_TXR_MASK                   (0x400000U)
-#define USB_ENDPTCTRL_TXR_SHIFT                  (22U)
-#define USB_ENDPTCTRL_TXR(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXR_SHIFT)) & USB_ENDPTCTRL_TXR_MASK)
-#define USB_ENDPTCTRL_TXE_MASK                   (0x800000U)
-#define USB_ENDPTCTRL_TXE_SHIFT                  (23U)
-#define USB_ENDPTCTRL_TXE(x)                     (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXE_SHIFT)) & USB_ENDPTCTRL_TXE_MASK)
+#define USB_ENDPTCTRL_RXS_MASK  (0x1U)
+#define USB_ENDPTCTRL_RXS_SHIFT (0U)
+#define USB_ENDPTCTRL_RXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXS_SHIFT)) & USB_ENDPTCTRL_RXS_MASK)
+#define USB_ENDPTCTRL_RXD_MASK  (0x2U)
+#define USB_ENDPTCTRL_RXD_SHIFT (1U)
+#define USB_ENDPTCTRL_RXD(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXD_SHIFT)) & USB_ENDPTCTRL_RXD_MASK)
+#define USB_ENDPTCTRL_RXT_MASK  (0xCU)
+#define USB_ENDPTCTRL_RXT_SHIFT (2U)
+#define USB_ENDPTCTRL_RXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXT_SHIFT)) & USB_ENDPTCTRL_RXT_MASK)
+#define USB_ENDPTCTRL_RXI_MASK  (0x20U)
+#define USB_ENDPTCTRL_RXI_SHIFT (5U)
+#define USB_ENDPTCTRL_RXI(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXI_SHIFT)) & USB_ENDPTCTRL_RXI_MASK)
+#define USB_ENDPTCTRL_RXR_MASK  (0x40U)
+#define USB_ENDPTCTRL_RXR_SHIFT (6U)
+#define USB_ENDPTCTRL_RXR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXR_SHIFT)) & USB_ENDPTCTRL_RXR_MASK)
+#define USB_ENDPTCTRL_RXE_MASK  (0x80U)
+#define USB_ENDPTCTRL_RXE_SHIFT (7U)
+#define USB_ENDPTCTRL_RXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_RXE_SHIFT)) & USB_ENDPTCTRL_RXE_MASK)
+#define USB_ENDPTCTRL_TXS_MASK  (0x10000U)
+#define USB_ENDPTCTRL_TXS_SHIFT (16U)
+#define USB_ENDPTCTRL_TXS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXS_SHIFT)) & USB_ENDPTCTRL_TXS_MASK)
+#define USB_ENDPTCTRL_TXD_MASK  (0x20000U)
+#define USB_ENDPTCTRL_TXD_SHIFT (17U)
+#define USB_ENDPTCTRL_TXD(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXD_SHIFT)) & USB_ENDPTCTRL_TXD_MASK)
+#define USB_ENDPTCTRL_TXT_MASK  (0xC0000U)
+#define USB_ENDPTCTRL_TXT_SHIFT (18U)
+#define USB_ENDPTCTRL_TXT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXT_SHIFT)) & USB_ENDPTCTRL_TXT_MASK)
+#define USB_ENDPTCTRL_TXI_MASK  (0x200000U)
+#define USB_ENDPTCTRL_TXI_SHIFT (21U)
+#define USB_ENDPTCTRL_TXI(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXI_SHIFT)) & USB_ENDPTCTRL_TXI_MASK)
+#define USB_ENDPTCTRL_TXR_MASK  (0x400000U)
+#define USB_ENDPTCTRL_TXR_SHIFT (22U)
+#define USB_ENDPTCTRL_TXR(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXR_SHIFT)) & USB_ENDPTCTRL_TXR_MASK)
+#define USB_ENDPTCTRL_TXE_MASK  (0x800000U)
+#define USB_ENDPTCTRL_TXE_SHIFT (23U)
+#define USB_ENDPTCTRL_TXE(x)    (((uint32_t)(((uint32_t)(x)) << USB_ENDPTCTRL_TXE_SHIFT)) & USB_ENDPTCTRL_TXE_MASK)
 /*! @} */
 
 /* The count of USB_ENDPTCTRL */
-#define USB_ENDPTCTRL_COUNT                      (7U)
-
+#define USB_ENDPTCTRL_COUNT (7U)
 
 /*!
  * @}
  */ /* end of group USB_Register_Masks */
 
-
 /* USB - Peripheral instance base addresses */
 /** Peripheral USB1 base address */
-#define USB1_BASE                                (0x402E0000u)
+#define USB1_BASE (0x402E0000u)
 /** Peripheral USB1 base pointer */
-#define USB1                                     ((USB_Type *)USB1_BASE)
+#define USB1 ((USB_Type *)USB1_BASE)
 /** Peripheral USB2 base address */
-#define USB2_BASE                                (0x402E0200u)
+#define USB2_BASE (0x402E0200u)
 /** Peripheral USB2 base pointer */
-#define USB2                                     ((USB_Type *)USB2_BASE)
+#define USB2 ((USB_Type *)USB2_BASE)
 /** Array initializer of USB peripheral base addresses */
-#define USB_BASE_ADDRS                           { 0u, USB1_BASE, USB2_BASE }
+#define USB_BASE_ADDRS                                                                                                 \
+    {                                                                                                                  \
+        0u, USB1_BASE, USB2_BASE                                                                                       \
+    }
 /** Array initializer of USB peripheral base pointers */
-#define USB_BASE_PTRS                            { (USB_Type *)0u, USB1, USB2 }
+#define USB_BASE_PTRS                                                                                                  \
+    {                                                                                                                  \
+        (USB_Type *)0u, USB1, USB2                                                                                     \
+    }
 /** Interrupt vectors for the USB peripheral type */
-#define USB_IRQS                                 { NotAvail_IRQn, USB_OTG1_IRQn, USB_OTG2_IRQn }
+#define USB_IRQS                                                                                                       \
+    {                                                                                                                  \
+        NotAvail_IRQn, USB_OTG1_IRQn, USB_OTG2_IRQn                                                                    \
+    }
 /* Backward compatibility */
-#define GPTIMER0CTL                              GPTIMER0CTRL
-#define GPTIMER1CTL                              GPTIMER1CTRL
-#define USB_SBUSCFG                              SBUSCFG
-#define EPLISTADDR                               ENDPTLISTADDR
-#define EPSETUPSR                                ENDPTSETUPSTAT
-#define EPPRIME                                  ENDPTPRIME
-#define EPFLUSH                                  ENDPTFLUSH
-#define EPSR                                     ENDPTSTAT
-#define EPCOMPLETE                               ENDPTCOMPLETE
-#define EPCR                                     ENDPTCTRL
-#define EPCR0                                    ENDPTCTRL0
-#define USBHS_ID_ID_MASK                         USB_ID_ID_MASK
-#define USBHS_ID_ID_SHIFT                        USB_ID_ID_SHIFT
-#define USBHS_ID_ID(x)                           USB_ID_ID(x)
-#define USBHS_ID_NID_MASK                        USB_ID_NID_MASK
-#define USBHS_ID_NID_SHIFT                       USB_ID_NID_SHIFT
-#define USBHS_ID_NID(x)                          USB_ID_NID(x)
-#define USBHS_ID_REVISION_MASK                   USB_ID_REVISION_MASK
-#define USBHS_ID_REVISION_SHIFT                  USB_ID_REVISION_SHIFT
-#define USBHS_ID_REVISION(x)                     USB_ID_REVISION(x)
-#define USBHS_HWGENERAL_PHYW_MASK                USB_HWGENERAL_PHYW_MASK
-#define USBHS_HWGENERAL_PHYW_SHIFT               USB_HWGENERAL_PHYW_SHIFT
-#define USBHS_HWGENERAL_PHYW(x)                  USB_HWGENERAL_PHYW(x)
-#define USBHS_HWGENERAL_PHYM_MASK                USB_HWGENERAL_PHYM_MASK
-#define USBHS_HWGENERAL_PHYM_SHIFT               USB_HWGENERAL_PHYM_SHIFT
-#define USBHS_HWGENERAL_PHYM(x)                  USB_HWGENERAL_PHYM(x)
-#define USBHS_HWGENERAL_SM_MASK                  USB_HWGENERAL_SM_MASK
-#define USBHS_HWGENERAL_SM_SHIFT                 USB_HWGENERAL_SM_SHIFT
-#define USBHS_HWGENERAL_SM(x)                    USB_HWGENERAL_SM(x)
-#define USBHS_HWHOST_HC_MASK                     USB_HWHOST_HC_MASK
-#define USBHS_HWHOST_HC_SHIFT                    USB_HWHOST_HC_SHIFT
-#define USBHS_HWHOST_HC(x)                       USB_HWHOST_HC(x)
-#define USBHS_HWHOST_NPORT_MASK                  USB_HWHOST_NPORT_MASK
-#define USBHS_HWHOST_NPORT_SHIFT                 USB_HWHOST_NPORT_SHIFT
-#define USBHS_HWHOST_NPORT(x)                    USB_HWHOST_NPORT(x)
-#define USBHS_HWDEVICE_DC_MASK                   USB_HWDEVICE_DC_MASK
-#define USBHS_HWDEVICE_DC_SHIFT                  USB_HWDEVICE_DC_SHIFT
-#define USBHS_HWDEVICE_DC(x)                     USB_HWDEVICE_DC(x)
-#define USBHS_HWDEVICE_DEVEP_MASK                USB_HWDEVICE_DEVEP_MASK
-#define USBHS_HWDEVICE_DEVEP_SHIFT               USB_HWDEVICE_DEVEP_SHIFT
-#define USBHS_HWDEVICE_DEVEP(x)                  USB_HWDEVICE_DEVEP(x)
-#define USBHS_HWTXBUF_TXBURST_MASK               USB_HWTXBUF_TXBURST_MASK
-#define USBHS_HWTXBUF_TXBURST_SHIFT              USB_HWTXBUF_TXBURST_SHIFT
-#define USBHS_HWTXBUF_TXBURST(x)                 USB_HWTXBUF_TXBURST(x)
-#define USBHS_HWTXBUF_TXCHANADD_MASK             USB_HWTXBUF_TXCHANADD_MASK
-#define USBHS_HWTXBUF_TXCHANADD_SHIFT            USB_HWTXBUF_TXCHANADD_SHIFT
-#define USBHS_HWTXBUF_TXCHANADD(x)               USB_HWTXBUF_TXCHANADD(x)
-#define USBHS_HWRXBUF_RXBURST_MASK               USB_HWRXBUF_RXBURST_MASK
-#define USBHS_HWRXBUF_RXBURST_SHIFT              USB_HWRXBUF_RXBURST_SHIFT
-#define USBHS_HWRXBUF_RXBURST(x)                 USB_HWRXBUF_RXBURST(x)
-#define USBHS_HWRXBUF_RXADD_MASK                 USB_HWRXBUF_RXADD_MASK
-#define USBHS_HWRXBUF_RXADD_SHIFT                USB_HWRXBUF_RXADD_SHIFT
-#define USBHS_HWRXBUF_RXADD(x)                   USB_HWRXBUF_RXADD(x)
-#define USBHS_GPTIMER0LD_GPTLD_MASK              USB_GPTIMER0LD_GPTLD_MASK
-#define USBHS_GPTIMER0LD_GPTLD_SHIFT             USB_GPTIMER0LD_GPTLD_SHIFT
-#define USBHS_GPTIMER0LD_GPTLD(x)                USB_GPTIMER0LD_GPTLD(x)
-#define USBHS_GPTIMER0CTL_GPTCNT_MASK            USB_GPTIMER0CTRL_GPTCNT_MASK
-#define USBHS_GPTIMER0CTL_GPTCNT_SHIFT           USB_GPTIMER0CTRL_GPTCNT_SHIFT
-#define USBHS_GPTIMER0CTL_GPTCNT(x)              USB_GPTIMER0CTRL_GPTCNT(x)
-#define USBHS_GPTIMER0CTL_MODE_MASK              USB_GPTIMER0CTRL_GPTMODE_MASK
-#define USBHS_GPTIMER0CTL_MODE_SHIFT             USB_GPTIMER0CTRL_GPTMODE_SHIFT
-#define USBHS_GPTIMER0CTL_MODE(x)                USB_GPTIMER0CTRL_GPTMODE(x)
-#define USBHS_GPTIMER0CTL_RST_MASK               USB_GPTIMER0CTRL_GPTRST_MASK
-#define USBHS_GPTIMER0CTL_RST_SHIFT              USB_GPTIMER0CTRL_GPTRST_SHIFT
-#define USBHS_GPTIMER0CTL_RST(x)                 USB_GPTIMER0CTRL_GPTRST(x)
-#define USBHS_GPTIMER0CTL_RUN_MASK               USB_GPTIMER0CTRL_GPTRUN_MASK
-#define USBHS_GPTIMER0CTL_RUN_SHIFT              USB_GPTIMER0CTRL_GPTRUN_SHIFT
-#define USBHS_GPTIMER0CTL_RUN(x)                 USB_GPTIMER0CTRL_GPTRUN(x)
-#define USBHS_GPTIMER1LD_GPTLD_MASK              USB_GPTIMER1LD_GPTLD_MASK
-#define USBHS_GPTIMER1LD_GPTLD_SHIFT             USB_GPTIMER1LD_GPTLD_SHIFT
-#define USBHS_GPTIMER1LD_GPTLD(x)                USB_GPTIMER1LD_GPTLD(x)
-#define USBHS_GPTIMER1CTL_GPTCNT_MASK            USB_GPTIMER1CTRL_GPTCNT_MASK
-#define USBHS_GPTIMER1CTL_GPTCNT_SHIFT           USB_GPTIMER1CTRL_GPTCNT_SHIFT
-#define USBHS_GPTIMER1CTL_GPTCNT(x)              USB_GPTIMER1CTRL_GPTCNT(x)
-#define USBHS_GPTIMER1CTL_MODE_MASK              USB_GPTIMER1CTRL_GPTMODE_MASK
-#define USBHS_GPTIMER1CTL_MODE_SHIFT             USB_GPTIMER1CTRL_GPTMODE_SHIFT
-#define USBHS_GPTIMER1CTL_MODE(x)                USB_GPTIMER1CTRL_GPTMODE(x)
-#define USBHS_GPTIMER1CTL_RST_MASK               USB_GPTIMER1CTRL_GPTRST_MASK
-#define USBHS_GPTIMER1CTL_RST_SHIFT              USB_GPTIMER1CTRL_GPTRST_SHIFT
-#define USBHS_GPTIMER1CTL_RST(x)                 USB_GPTIMER1CTRL_GPTRST(x)
-#define USBHS_GPTIMER1CTL_RUN_MASK               USB_GPTIMER1CTRL_GPTRUN_MASK
-#define USBHS_GPTIMER1CTL_RUN_SHIFT              USB_GPTIMER1CTRL_GPTRUN_SHIFT
-#define USBHS_GPTIMER1CTL_RUN(x)                 USB_GPTIMER1CTRL_GPTRUN(x)
-#define USBHS_USB_SBUSCFG_BURSTMODE_MASK         USB_SBUSCFG_AHBBRST_MASK
-#define USBHS_USB_SBUSCFG_BURSTMODE_SHIFT        USB_SBUSCFG_AHBBRST_SHIFT
-#define USBHS_USB_SBUSCFG_BURSTMODE(x)           USB_SBUSCFG_AHBBRST(x)
-#define USBHS_HCIVERSION_CAPLENGTH(x)            USB_HCIVERSION_CAPLENGTH(x)
-#define USBHS_HCIVERSION_HCIVERSION_MASK         USB_HCIVERSION_HCIVERSION_MASK
-#define USBHS_HCIVERSION_HCIVERSION_SHIFT        USB_HCIVERSION_HCIVERSION_SHIFT
-#define USBHS_HCIVERSION_HCIVERSION(x)           USB_HCIVERSION_HCIVERSION(x)
-#define USBHS_HCSPARAMS_N_PORTS_MASK             USB_HCSPARAMS_N_PORTS_MASK
-#define USBHS_HCSPARAMS_N_PORTS_SHIFT            USB_HCSPARAMS_N_PORTS_SHIFT
-#define USBHS_HCSPARAMS_N_PORTS(x)               USB_HCSPARAMS_N_PORTS(x)
-#define USBHS_HCSPARAMS_PPC_MASK                 USB_HCSPARAMS_PPC_MASK
-#define USBHS_HCSPARAMS_PPC_SHIFT                USB_HCSPARAMS_PPC_SHIFT
-#define USBHS_HCSPARAMS_PPC(x)                   USB_HCSPARAMS_PPC(x)
-#define USBHS_HCSPARAMS_N_PCC_MASK               USB_HCSPARAMS_N_PCC_MASK
-#define USBHS_HCSPARAMS_N_PCC_SHIFT              USB_HCSPARAMS_N_PCC_SHIFT
-#define USBHS_HCSPARAMS_N_PCC(x)                 USB_HCSPARAMS_N_PCC(x)
-#define USBHS_HCSPARAMS_N_CC_MASK                USB_HCSPARAMS_N_CC_MASK
-#define USBHS_HCSPARAMS_N_CC_SHIFT               USB_HCSPARAMS_N_CC_SHIFT
-#define USBHS_HCSPARAMS_N_CC(x)                  USB_HCSPARAMS_N_CC(x)
-#define USBHS_HCSPARAMS_PI_MASK                  USB_HCSPARAMS_PI_MASK
-#define USBHS_HCSPARAMS_PI_SHIFT                 USB_HCSPARAMS_PI_SHIFT
-#define USBHS_HCSPARAMS_PI(x)                    USB_HCSPARAMS_PI(x)
-#define USBHS_HCSPARAMS_N_PTT_MASK               USB_HCSPARAMS_N_PTT_MASK
-#define USBHS_HCSPARAMS_N_PTT_SHIFT              USB_HCSPARAMS_N_PTT_SHIFT
-#define USBHS_HCSPARAMS_N_PTT(x)                 USB_HCSPARAMS_N_PTT(x)
-#define USBHS_HCSPARAMS_N_TT_MASK                USB_HCSPARAMS_N_TT_MASK
-#define USBHS_HCSPARAMS_N_TT_SHIFT               USB_HCSPARAMS_N_TT_SHIFT
-#define USBHS_HCSPARAMS_N_TT(x)                  USB_HCSPARAMS_N_TT(x)
-#define USBHS_HCCPARAMS_ADC_MASK                 USB_HCCPARAMS_ADC_MASK
-#define USBHS_HCCPARAMS_ADC_SHIFT                USB_HCCPARAMS_ADC_SHIFT
-#define USBHS_HCCPARAMS_ADC(x)                   USB_HCCPARAMS_ADC(x)
-#define USBHS_HCCPARAMS_PFL_MASK                 USB_HCCPARAMS_PFL_MASK
-#define USBHS_HCCPARAMS_PFL_SHIFT                USB_HCCPARAMS_PFL_SHIFT
-#define USBHS_HCCPARAMS_PFL(x)                   USB_HCCPARAMS_PFL(x)
-#define USBHS_HCCPARAMS_ASP_MASK                 USB_HCCPARAMS_ASP_MASK
-#define USBHS_HCCPARAMS_ASP_SHIFT                USB_HCCPARAMS_ASP_SHIFT
-#define USBHS_HCCPARAMS_ASP(x)                   USB_HCCPARAMS_ASP(x)
-#define USBHS_HCCPARAMS_IST_MASK                 USB_HCCPARAMS_IST_MASK
-#define USBHS_HCCPARAMS_IST_SHIFT                USB_HCCPARAMS_IST_SHIFT
-#define USBHS_HCCPARAMS_IST(x)                   USB_HCCPARAMS_IST(x)
-#define USBHS_HCCPARAMS_EECP_MASK                USB_HCCPARAMS_EECP_MASK
-#define USBHS_HCCPARAMS_EECP_SHIFT               USB_HCCPARAMS_EECP_SHIFT
-#define USBHS_HCCPARAMS_EECP(x)                  USB_HCCPARAMS_EECP(x)
-#define USBHS_DCIVERSION_DCIVERSION_MASK         USB_DCIVERSION_DCIVERSION_MASK
-#define USBHS_DCIVERSION_DCIVERSION_SHIFT        USB_DCIVERSION_DCIVERSION_SHIFT
-#define USBHS_DCIVERSION_DCIVERSION(x)           USB_DCIVERSION_DCIVERSION(x)
-#define USBHS_DCCPARAMS_DEN_MASK                 USB_DCCPARAMS_DEN_MASK
-#define USBHS_DCCPARAMS_DEN_SHIFT                USB_DCCPARAMS_DEN_SHIFT
-#define USBHS_DCCPARAMS_DEN(x)                   USB_DCCPARAMS_DEN(x)
-#define USBHS_DCCPARAMS_DC_MASK                  USB_DCCPARAMS_DC_MASK
-#define USBHS_DCCPARAMS_DC_SHIFT                 USB_DCCPARAMS_DC_SHIFT
-#define USBHS_DCCPARAMS_DC(x)                    USB_DCCPARAMS_DC(x)
-#define USBHS_DCCPARAMS_HC_MASK                  USB_DCCPARAMS_HC_MASK
-#define USBHS_DCCPARAMS_HC_SHIFT                 USB_DCCPARAMS_HC_SHIFT
-#define USBHS_DCCPARAMS_HC(x)                    USB_DCCPARAMS_HC(x)
-#define USBHS_USBCMD_RS_MASK                     USB_USBCMD_RS_MASK
-#define USBHS_USBCMD_RS_SHIFT                    USB_USBCMD_RS_SHIFT
-#define USBHS_USBCMD_RS(x)                       USB_USBCMD_RS(x)
-#define USBHS_USBCMD_RST_MASK                    USB_USBCMD_RST_MASK
-#define USBHS_USBCMD_RST_SHIFT                   USB_USBCMD_RST_SHIFT
-#define USBHS_USBCMD_RST(x)                      USB_USBCMD_RST(x)
-#define USBHS_USBCMD_FS_MASK                     USB_USBCMD_FS_1_MASK
-#define USBHS_USBCMD_FS_SHIFT                    USB_USBCMD_FS_1_SHIFT
-#define USBHS_USBCMD_FS(x)                       USB_USBCMD_FS_1(x)
-#define USBHS_USBCMD_PSE_MASK                    USB_USBCMD_PSE_MASK
-#define USBHS_USBCMD_PSE_SHIFT                   USB_USBCMD_PSE_SHIFT
-#define USBHS_USBCMD_PSE(x)                      USB_USBCMD_PSE(x)
-#define USBHS_USBCMD_ASE_MASK                    USB_USBCMD_ASE_MASK
-#define USBHS_USBCMD_ASE_SHIFT                   USB_USBCMD_ASE_SHIFT
-#define USBHS_USBCMD_ASE(x)                      USB_USBCMD_ASE(x)
-#define USBHS_USBCMD_IAA_MASK                    USB_USBCMD_IAA_MASK
-#define USBHS_USBCMD_IAA_SHIFT                   USB_USBCMD_IAA_SHIFT
-#define USBHS_USBCMD_IAA(x)                      USB_USBCMD_IAA(x)
-#define USBHS_USBCMD_ASP_MASK                    USB_USBCMD_ASP_MASK
-#define USBHS_USBCMD_ASP_SHIFT                   USB_USBCMD_ASP_SHIFT
-#define USBHS_USBCMD_ASP(x)                      USB_USBCMD_ASP(x)
-#define USBHS_USBCMD_ASPE_MASK                   USB_USBCMD_ASPE_MASK
-#define USBHS_USBCMD_ASPE_SHIFT                  USB_USBCMD_ASPE_SHIFT
-#define USBHS_USBCMD_ASPE(x)                     USB_USBCMD_ASPE(x)
-#define USBHS_USBCMD_ATDTW_MASK                  USB_USBCMD_ATDTW_MASK
-#define USBHS_USBCMD_ATDTW_SHIFT                 USB_USBCMD_ATDTW_SHIFT
-#define USBHS_USBCMD_ATDTW(x)                    USB_USBCMD_ATDTW(x)
-#define USBHS_USBCMD_SUTW_MASK                   USB_USBCMD_SUTW_MASK
-#define USBHS_USBCMD_SUTW_SHIFT                  USB_USBCMD_SUTW_SHIFT
-#define USBHS_USBCMD_SUTW(x)                     USB_USBCMD_SUTW(x)
-#define USBHS_USBCMD_FS2_MASK                    USB_USBCMD_FS_2_MASK
-#define USBHS_USBCMD_FS2_SHIFT                   USB_USBCMD_FS_2_SHIFT
-#define USBHS_USBCMD_FS2(x)                      USB_USBCMD_FS_2(x)
-#define USBHS_USBCMD_ITC_MASK                    USB_USBCMD_ITC_MASK
-#define USBHS_USBCMD_ITC_SHIFT                   USB_USBCMD_ITC_SHIFT
-#define USBHS_USBCMD_ITC(x)                      USB_USBCMD_ITC(x)
-#define USBHS_USBSTS_UI_MASK                     USB_USBSTS_UI_MASK
-#define USBHS_USBSTS_UI_SHIFT                    USB_USBSTS_UI_SHIFT
-#define USBHS_USBSTS_UI(x)                       USB_USBSTS_UI(x)
-#define USBHS_USBSTS_UEI_MASK                    USB_USBSTS_UEI_MASK
-#define USBHS_USBSTS_UEI_SHIFT                   USB_USBSTS_UEI_SHIFT
-#define USBHS_USBSTS_UEI(x)                      USB_USBSTS_UEI(x)
-#define USBHS_USBSTS_PCI_MASK                    USB_USBSTS_PCI_MASK
-#define USBHS_USBSTS_PCI_SHIFT                   USB_USBSTS_PCI_SHIFT
-#define USBHS_USBSTS_PCI(x)                      USB_USBSTS_PCI(x)
-#define USBHS_USBSTS_FRI_MASK                    USB_USBSTS_FRI_MASK
-#define USBHS_USBSTS_FRI_SHIFT                   USB_USBSTS_FRI_SHIFT
-#define USBHS_USBSTS_FRI(x)                      USB_USBSTS_FRI(x)
-#define USBHS_USBSTS_SEI_MASK                    USB_USBSTS_SEI_MASK
-#define USBHS_USBSTS_SEI_SHIFT                   USB_USBSTS_SEI_SHIFT
-#define USBHS_USBSTS_SEI(x)                      USB_USBSTS_SEI(x)
-#define USBHS_USBSTS_AAI_MASK                    USB_USBSTS_AAI_MASK
-#define USBHS_USBSTS_AAI_SHIFT                   USB_USBSTS_AAI_SHIFT
-#define USBHS_USBSTS_AAI(x)                      USB_USBSTS_AAI(x)
-#define USBHS_USBSTS_URI_MASK                    USB_USBSTS_URI_MASK
-#define USBHS_USBSTS_URI_SHIFT                   USB_USBSTS_URI_SHIFT
-#define USBHS_USBSTS_URI(x)                      USB_USBSTS_URI(x)
-#define USBHS_USBSTS_SRI_MASK                    USB_USBSTS_SRI_MASK
-#define USBHS_USBSTS_SRI_SHIFT                   USB_USBSTS_SRI_SHIFT
-#define USBHS_USBSTS_SRI(x)                      USB_USBSTS_SRI(x)
-#define USBHS_USBSTS_SLI_MASK                    USB_USBSTS_SLI_MASK
-#define USBHS_USBSTS_SLI_SHIFT                   USB_USBSTS_SLI_SHIFT
-#define USBHS_USBSTS_SLI(x)                      USB_USBSTS_SLI(x)
-#define USBHS_USBSTS_ULPII_MASK                  USB_USBSTS_ULPII_MASK
-#define USBHS_USBSTS_ULPII_SHIFT                 USB_USBSTS_ULPII_SHIFT
-#define USBHS_USBSTS_ULPII(x)                    USB_USBSTS_ULPII(x)
-#define USBHS_USBSTS_HCH_MASK                    USB_USBSTS_HCH_MASK
-#define USBHS_USBSTS_HCH_SHIFT                   USB_USBSTS_HCH_SHIFT
-#define USBHS_USBSTS_HCH(x)                      USB_USBSTS_HCH(x)
-#define USBHS_USBSTS_RCL_MASK                    USB_USBSTS_RCL_MASK
-#define USBHS_USBSTS_RCL_SHIFT                   USB_USBSTS_RCL_SHIFT
-#define USBHS_USBSTS_RCL(x)                      USB_USBSTS_RCL(x)
-#define USBHS_USBSTS_PS_MASK                     USB_USBSTS_PS_MASK
-#define USBHS_USBSTS_PS_SHIFT                    USB_USBSTS_PS_SHIFT
-#define USBHS_USBSTS_PS(x)                       USB_USBSTS_PS(x)
-#define USBHS_USBSTS_AS_MASK                     USB_USBSTS_AS_MASK
-#define USBHS_USBSTS_AS_SHIFT                    USB_USBSTS_AS_SHIFT
-#define USBHS_USBSTS_AS(x)                       USB_USBSTS_AS(x)
-#define USBHS_USBSTS_NAKI_MASK                   USB_USBSTS_NAKI_MASK
-#define USBHS_USBSTS_NAKI_SHIFT                  USB_USBSTS_NAKI_SHIFT
-#define USBHS_USBSTS_NAKI(x)                     USB_USBSTS_NAKI(x)
-#define USBHS_USBSTS_TI0_MASK                    USB_USBSTS_TI0_MASK
-#define USBHS_USBSTS_TI0_SHIFT                   USB_USBSTS_TI0_SHIFT
-#define USBHS_USBSTS_TI0(x)                      USB_USBSTS_TI0(x)
-#define USBHS_USBSTS_TI1_MASK                    USB_USBSTS_TI1_MASK
-#define USBHS_USBSTS_TI1_SHIFT                   USB_USBSTS_TI1_SHIFT
-#define USBHS_USBSTS_TI1(x)                      USB_USBSTS_TI1(x)
-#define USBHS_USBINTR_UE_MASK                    USB_USBINTR_UE_MASK
-#define USBHS_USBINTR_UE_SHIFT                   USB_USBINTR_UE_SHIFT
-#define USBHS_USBINTR_UE(x)                      USB_USBINTR_UE(x)
-#define USBHS_USBINTR_UEE_MASK                   USB_USBINTR_UEE_MASK
-#define USBHS_USBINTR_UEE_SHIFT                  USB_USBINTR_UEE_SHIFT
-#define USBHS_USBINTR_UEE(x)                     USB_USBINTR_UEE(x)
-#define USBHS_USBINTR_PCE_MASK                   USB_USBINTR_PCE_MASK
-#define USBHS_USBINTR_PCE_SHIFT                  USB_USBINTR_PCE_SHIFT
-#define USBHS_USBINTR_PCE(x)                     USB_USBINTR_PCE(x)
-#define USBHS_USBINTR_FRE_MASK                   USB_USBINTR_FRE_MASK
-#define USBHS_USBINTR_FRE_SHIFT                  USB_USBINTR_FRE_SHIFT
-#define USBHS_USBINTR_FRE(x)                     USB_USBINTR_FRE(x)
-#define USBHS_USBINTR_SEE_MASK                   USB_USBINTR_SEE_MASK
-#define USBHS_USBINTR_SEE_SHIFT                  USB_USBINTR_SEE_SHIFT
-#define USBHS_USBINTR_SEE(x)                     USB_USBINTR_SEE(x)
-#define USBHS_USBINTR_AAE_MASK                   USB_USBINTR_AAE_MASK
-#define USBHS_USBINTR_AAE_SHIFT                  USB_USBINTR_AAE_SHIFT
-#define USBHS_USBINTR_AAE(x)                     USB_USBINTR_AAE(x)
-#define USBHS_USBINTR_URE_MASK                   USB_USBINTR_URE_MASK
-#define USBHS_USBINTR_URE_SHIFT                  USB_USBINTR_URE_SHIFT
-#define USBHS_USBINTR_URE(x)                     USB_USBINTR_URE(x)
-#define USBHS_USBINTR_SRE_MASK                   USB_USBINTR_SRE_MASK
-#define USBHS_USBINTR_SRE_SHIFT                  USB_USBINTR_SRE_SHIFT
-#define USBHS_USBINTR_SRE(x)                     USB_USBINTR_SRE(x)
-#define USBHS_USBINTR_SLE_MASK                   USB_USBINTR_SLE_MASK
-#define USBHS_USBINTR_SLE_SHIFT                  USB_USBINTR_SLE_SHIFT
-#define USBHS_USBINTR_SLE(x)                     USB_USBINTR_SLE(x)
-#define USBHS_USBINTR_ULPIE_MASK                 USB_USBINTR_ULPIE_MASK
-#define USBHS_USBINTR_ULPIE_SHIFT                USB_USBINTR_ULPIE_SHIFT
-#define USBHS_USBINTR_ULPIE(x)                   USB_USBINTR_ULPIE(x)
-#define USBHS_USBINTR_NAKE_MASK                  USB_USBINTR_NAKE_MASK
-#define USBHS_USBINTR_NAKE_SHIFT                 USB_USBINTR_NAKE_SHIFT
-#define USBHS_USBINTR_NAKE(x)                    USB_USBINTR_NAKE(x)
-#define USBHS_USBINTR_UAIE_MASK                  USB_USBINTR_UAIE_MASK
-#define USBHS_USBINTR_UAIE_SHIFT                 USB_USBINTR_UAIE_SHIFT
-#define USBHS_USBINTR_UAIE(x)                    USB_USBINTR_UAIE(x)
-#define USBHS_USBINTR_UPIE_MASK                  USB_USBINTR_UPIE_MASK
-#define USBHS_USBINTR_UPIE_SHIFT                 USB_USBINTR_UPIE_SHIFT
-#define USBHS_USBINTR_UPIE(x)                    USB_USBINTR_UPIE(x)
-#define USBHS_USBINTR_TIE0_MASK                  USB_USBINTR_TIE0_MASK
-#define USBHS_USBINTR_TIE0_SHIFT                 USB_USBINTR_TIE0_SHIFT
-#define USBHS_USBINTR_TIE0(x)                    USB_USBINTR_TIE0(x)
-#define USBHS_USBINTR_TIE1_MASK                  USB_USBINTR_TIE1_MASK
-#define USBHS_USBINTR_TIE1_SHIFT                 USB_USBINTR_TIE1_SHIFT
-#define USBHS_USBINTR_TIE1(x)                    USB_USBINTR_TIE1(x)
-#define USBHS_FRINDEX_FRINDEX_MASK               USB_FRINDEX_FRINDEX_MASK
-#define USBHS_FRINDEX_FRINDEX_SHIFT              USB_FRINDEX_FRINDEX_SHIFT
-#define USBHS_FRINDEX_FRINDEX(x)                 USB_FRINDEX_FRINDEX(x)
-#define USBHS_DEVICEADDR_USBADRA_MASK            USB_DEVICEADDR_USBADRA_MASK
-#define USBHS_DEVICEADDR_USBADRA_SHIFT           USB_DEVICEADDR_USBADRA_SHIFT
-#define USBHS_DEVICEADDR_USBADRA(x)              USB_DEVICEADDR_USBADRA(x)
-#define USBHS_DEVICEADDR_USBADR_MASK             USB_DEVICEADDR_USBADR_MASK
-#define USBHS_DEVICEADDR_USBADR_SHIFT            USB_DEVICEADDR_USBADR_SHIFT
-#define USBHS_DEVICEADDR_USBADR(x)               USB_DEVICEADDR_USBADR(x)
-#define USBHS_PERIODICLISTBASE_PERBASE_MASK      USB_PERIODICLISTBASE_BASEADR_MASK
-#define USBHS_PERIODICLISTBASE_PERBASE_SHIFT     USB_PERIODICLISTBASE_BASEADR_SHIFT
-#define USBHS_PERIODICLISTBASE_PERBASE(x)        USB_PERIODICLISTBASE_BASEADR(x)
-#define USBHS_ASYNCLISTADDR_ASYBASE_MASK         USB_ASYNCLISTADDR_ASYBASE_MASK
-#define USBHS_ASYNCLISTADDR_ASYBASE_SHIFT        USB_ASYNCLISTADDR_ASYBASE_SHIFT
-#define USBHS_ASYNCLISTADDR_ASYBASE(x)           USB_ASYNCLISTADDR_ASYBASE(x)
-#define USBHS_EPLISTADDR_EPBASE_MASK             USB_ENDPTLISTADDR_EPBASE_MASK
-#define USBHS_EPLISTADDR_EPBASE_SHIFT            USB_ENDPTLISTADDR_EPBASE_SHIFT
-#define USBHS_EPLISTADDR_EPBASE(x)               USB_ENDPTLISTADDR_EPBASE(x)
-#define USBHS_BURSTSIZE_RXPBURST_MASK            USB_BURSTSIZE_RXPBURST_MASK
-#define USBHS_BURSTSIZE_RXPBURST_SHIFT           USB_BURSTSIZE_RXPBURST_SHIFT
-#define USBHS_BURSTSIZE_RXPBURST(x)              USB_BURSTSIZE_RXPBURST(x)
-#define USBHS_BURSTSIZE_TXPBURST_MASK            USB_BURSTSIZE_TXPBURST_MASK
-#define USBHS_BURSTSIZE_TXPBURST_SHIFT           USB_BURSTSIZE_TXPBURST_SHIFT
-#define USBHS_BURSTSIZE_TXPBURST(x)              USB_BURSTSIZE_TXPBURST(x)
-#define USBHS_TXFILLTUNING_TXSCHOH_MASK          USB_TXFILLTUNING_TXSCHOH_MASK
-#define USBHS_TXFILLTUNING_TXSCHOH_SHIFT         USB_TXFILLTUNING_TXSCHOH_SHIFT
-#define USBHS_TXFILLTUNING_TXSCHOH(x)            USB_TXFILLTUNING_TXSCHOH(x)
-#define USBHS_TXFILLTUNING_TXSCHHEALTH_MASK      USB_TXFILLTUNING_TXSCHHEALTH_MASK
-#define USBHS_TXFILLTUNING_TXSCHHEALTH_SHIFT     USB_TXFILLTUNING_TXSCHHEALTH_SHIFT
-#define USBHS_TXFILLTUNING_TXSCHHEALTH(x)        USB_TXFILLTUNING_TXSCHHEALTH(x)
-#define USBHS_TXFILLTUNING_TXFIFOTHRES_MASK      USB_TXFILLTUNING_TXFIFOTHRES_MASK
-#define USBHS_TXFILLTUNING_TXFIFOTHRES_SHIFT     USB_TXFILLTUNING_TXFIFOTHRES_SHIFT
-#define USBHS_TXFILLTUNING_TXFIFOTHRES(x)        USB_TXFILLTUNING_TXFIFOTHRES(x)
-#define USBHS_ENDPTNAK_EPRN_MASK                 USB_ENDPTNAK_EPRN_MASK
-#define USBHS_ENDPTNAK_EPRN_SHIFT                USB_ENDPTNAK_EPRN_SHIFT
-#define USBHS_ENDPTNAK_EPRN(x)                   USB_ENDPTNAK_EPRN(x)
-#define USBHS_ENDPTNAK_EPTN_MASK                 USB_ENDPTNAK_EPTN_MASK
-#define USBHS_ENDPTNAK_EPTN_SHIFT                USB_ENDPTNAK_EPTN_SHIFT
-#define USBHS_ENDPTNAK_EPTN(x)                   USB_ENDPTNAK_EPTN(x)
-#define USBHS_ENDPTNAKEN_EPRNE_MASK              USB_ENDPTNAKEN_EPRNE_MASK
-#define USBHS_ENDPTNAKEN_EPRNE_SHIFT             USB_ENDPTNAKEN_EPRNE_SHIFT
-#define USBHS_ENDPTNAKEN_EPRNE(x)                USB_ENDPTNAKEN_EPRNE(x)
-#define USBHS_ENDPTNAKEN_EPTNE_MASK              USB_ENDPTNAKEN_EPTNE_MASK
-#define USBHS_ENDPTNAKEN_EPTNE_SHIFT             USB_ENDPTNAKEN_EPTNE_SHIFT
-#define USBHS_ENDPTNAKEN_EPTNE(x)                USB_ENDPTNAKEN_EPTNE(x)
-#define USBHS_CONFIGFLAG_CF_MASK                 USB_CONFIGFLAG_CF_MASK
-#define USBHS_CONFIGFLAG_CF_SHIFT                USB_CONFIGFLAG_CF_SHIFT
-#define USBHS_CONFIGFLAG_CF(x)                   USB_CONFIGFLAG_CF(x)
-#define USBHS_PORTSC1_CCS_MASK                   USB_PORTSC1_CCS_MASK
-#define USBHS_PORTSC1_CCS_SHIFT                  USB_PORTSC1_CCS_SHIFT
-#define USBHS_PORTSC1_CCS(x)                     USB_PORTSC1_CCS(x)
-#define USBHS_PORTSC1_CSC_MASK                   USB_PORTSC1_CSC_MASK
-#define USBHS_PORTSC1_CSC_SHIFT                  USB_PORTSC1_CSC_SHIFT
-#define USBHS_PORTSC1_CSC(x)                     USB_PORTSC1_CSC(x)
-#define USBHS_PORTSC1_PE_MASK                    USB_PORTSC1_PE_MASK
-#define USBHS_PORTSC1_PE_SHIFT                   USB_PORTSC1_PE_SHIFT
-#define USBHS_PORTSC1_PE(x)                      USB_PORTSC1_PE(x)
-#define USBHS_PORTSC1_PEC_MASK                   USB_PORTSC1_PEC_MASK
-#define USBHS_PORTSC1_PEC_SHIFT                  USB_PORTSC1_PEC_SHIFT
-#define USBHS_PORTSC1_PEC(x)                     USB_PORTSC1_PEC(x)
-#define USBHS_PORTSC1_OCA_MASK                   USB_PORTSC1_OCA_MASK
-#define USBHS_PORTSC1_OCA_SHIFT                  USB_PORTSC1_OCA_SHIFT
-#define USBHS_PORTSC1_OCA(x)                     USB_PORTSC1_OCA(x)
-#define USBHS_PORTSC1_OCC_MASK                   USB_PORTSC1_OCC_MASK
-#define USBHS_PORTSC1_OCC_SHIFT                  USB_PORTSC1_OCC_SHIFT
-#define USBHS_PORTSC1_OCC(x)                     USB_PORTSC1_OCC(x)
-#define USBHS_PORTSC1_FPR_MASK                   USB_PORTSC1_FPR_MASK
-#define USBHS_PORTSC1_FPR_SHIFT                  USB_PORTSC1_FPR_SHIFT
-#define USBHS_PORTSC1_FPR(x)                     USB_PORTSC1_FPR(x)
-#define USBHS_PORTSC1_SUSP_MASK                  USB_PORTSC1_SUSP_MASK
-#define USBHS_PORTSC1_SUSP_SHIFT                 USB_PORTSC1_SUSP_SHIFT
-#define USBHS_PORTSC1_SUSP(x)                    USB_PORTSC1_SUSP(x)
-#define USBHS_PORTSC1_PR_MASK                    USB_PORTSC1_PR_MASK
-#define USBHS_PORTSC1_PR_SHIFT                   USB_PORTSC1_PR_SHIFT
-#define USBHS_PORTSC1_PR(x)                      USB_PORTSC1_PR(x)
-#define USBHS_PORTSC1_HSP_MASK                   USB_PORTSC1_HSP_MASK
-#define USBHS_PORTSC1_HSP_SHIFT                  USB_PORTSC1_HSP_SHIFT
-#define USBHS_PORTSC1_HSP(x)                     USB_PORTSC1_HSP(x)
-#define USBHS_PORTSC1_LS_MASK                    USB_PORTSC1_LS_MASK
-#define USBHS_PORTSC1_LS_SHIFT                   USB_PORTSC1_LS_SHIFT
-#define USBHS_PORTSC1_LS(x)                      USB_PORTSC1_LS(x)
-#define USBHS_PORTSC1_PP_MASK                    USB_PORTSC1_PP_MASK
-#define USBHS_PORTSC1_PP_SHIFT                   USB_PORTSC1_PP_SHIFT
-#define USBHS_PORTSC1_PP(x)                      USB_PORTSC1_PP(x)
-#define USBHS_PORTSC1_PO_MASK                    USB_PORTSC1_PO_MASK
-#define USBHS_PORTSC1_PO_SHIFT                   USB_PORTSC1_PO_SHIFT
-#define USBHS_PORTSC1_PO(x)                      USB_PORTSC1_PO(x)
-#define USBHS_PORTSC1_PIC_MASK                   USB_PORTSC1_PIC_MASK
-#define USBHS_PORTSC1_PIC_SHIFT                  USB_PORTSC1_PIC_SHIFT
-#define USBHS_PORTSC1_PIC(x)                     USB_PORTSC1_PIC(x)
-#define USBHS_PORTSC1_PTC_MASK                   USB_PORTSC1_PTC_MASK
-#define USBHS_PORTSC1_PTC_SHIFT                  USB_PORTSC1_PTC_SHIFT
-#define USBHS_PORTSC1_PTC(x)                     USB_PORTSC1_PTC(x)
-#define USBHS_PORTSC1_WKCN_MASK                  USB_PORTSC1_WKCN_MASK
-#define USBHS_PORTSC1_WKCN_SHIFT                 USB_PORTSC1_WKCN_SHIFT
-#define USBHS_PORTSC1_WKCN(x)                    USB_PORTSC1_WKCN(x)
-#define USBHS_PORTSC1_WKDS_MASK                  USB_PORTSC1_WKDC_MASK
-#define USBHS_PORTSC1_WKDS_SHIFT                 USB_PORTSC1_WKDC_SHIFT
-#define USBHS_PORTSC1_WKDS(x)                    USB_PORTSC1_WKDC(x)
-#define USBHS_PORTSC1_WKOC_MASK                  USB_PORTSC1_WKOC_MASK
-#define USBHS_PORTSC1_WKOC_SHIFT                 USB_PORTSC1_WKOC_SHIFT
-#define USBHS_PORTSC1_WKOC(x)                    USB_PORTSC1_WKOC(x)
-#define USBHS_PORTSC1_PHCD_MASK                  USB_PORTSC1_PHCD_MASK
-#define USBHS_PORTSC1_PHCD_SHIFT                 USB_PORTSC1_PHCD_SHIFT
-#define USBHS_PORTSC1_PHCD(x)                    USB_PORTSC1_PHCD(x)
-#define USBHS_PORTSC1_PFSC_MASK                  USB_PORTSC1_PFSC_MASK
-#define USBHS_PORTSC1_PFSC_SHIFT                 USB_PORTSC1_PFSC_SHIFT
-#define USBHS_PORTSC1_PFSC(x)                    USB_PORTSC1_PFSC(x)
-#define USBHS_PORTSC1_PTS2_MASK                  USB_PORTSC1_PTS_2_MASK
-#define USBHS_PORTSC1_PTS2_SHIFT                 USB_PORTSC1_PTS_2_SHIFT
-#define USBHS_PORTSC1_PTS2(x)                    USB_PORTSC1_PTS_2(x)
-#define USBHS_PORTSC1_PSPD_MASK                  USB_PORTSC1_PSPD_MASK
-#define USBHS_PORTSC1_PSPD_SHIFT                 USB_PORTSC1_PSPD_SHIFT
-#define USBHS_PORTSC1_PSPD(x)                    USB_PORTSC1_PSPD(x)
-#define USBHS_PORTSC1_PTW_MASK                   USB_PORTSC1_PTW_MASK
-#define USBHS_PORTSC1_PTW_SHIFT                  USB_PORTSC1_PTW_SHIFT
-#define USBHS_PORTSC1_PTW(x)                     USB_PORTSC1_PTW(x)
-#define USBHS_PORTSC1_STS_MASK                   USB_PORTSC1_STS_MASK
-#define USBHS_PORTSC1_STS_SHIFT                  USB_PORTSC1_STS_SHIFT
-#define USBHS_PORTSC1_STS(x)                     USB_PORTSC1_STS(x)
-#define USBHS_PORTSC1_PTS_MASK                   USB_PORTSC1_PTS_1_MASK
-#define USBHS_PORTSC1_PTS_SHIFT                  USB_PORTSC1_PTS_1_SHIFT
-#define USBHS_PORTSC1_PTS(x)                     USB_PORTSC1_PTS_1(x)
-#define USBHS_OTGSC_VD_MASK                      USB_OTGSC_VD_MASK
-#define USBHS_OTGSC_VD_SHIFT                     USB_OTGSC_VD_SHIFT
-#define USBHS_OTGSC_VD(x)                        USB_OTGSC_VD(x)
-#define USBHS_OTGSC_VC_MASK                      USB_OTGSC_VC_MASK
-#define USBHS_OTGSC_VC_SHIFT                     USB_OTGSC_VC_SHIFT
-#define USBHS_OTGSC_VC(x)                        USB_OTGSC_VC(x)
-#define USBHS_OTGSC_OT_MASK                      USB_OTGSC_OT_MASK
-#define USBHS_OTGSC_OT_SHIFT                     USB_OTGSC_OT_SHIFT
-#define USBHS_OTGSC_OT(x)                        USB_OTGSC_OT(x)
-#define USBHS_OTGSC_DP_MASK                      USB_OTGSC_DP_MASK
-#define USBHS_OTGSC_DP_SHIFT                     USB_OTGSC_DP_SHIFT
-#define USBHS_OTGSC_DP(x)                        USB_OTGSC_DP(x)
-#define USBHS_OTGSC_IDPU_MASK                    USB_OTGSC_IDPU_MASK
-#define USBHS_OTGSC_IDPU_SHIFT                   USB_OTGSC_IDPU_SHIFT
-#define USBHS_OTGSC_IDPU(x)                      USB_OTGSC_IDPU(x)
-#define USBHS_OTGSC_ID_MASK                      USB_OTGSC_ID_MASK
-#define USBHS_OTGSC_ID_SHIFT                     USB_OTGSC_ID_SHIFT
-#define USBHS_OTGSC_ID(x)                        USB_OTGSC_ID(x)
-#define USBHS_OTGSC_AVV_MASK                     USB_OTGSC_AVV_MASK
-#define USBHS_OTGSC_AVV_SHIFT                    USB_OTGSC_AVV_SHIFT
-#define USBHS_OTGSC_AVV(x)                       USB_OTGSC_AVV(x)
-#define USBHS_OTGSC_ASV_MASK                     USB_OTGSC_ASV_MASK
-#define USBHS_OTGSC_ASV_SHIFT                    USB_OTGSC_ASV_SHIFT
-#define USBHS_OTGSC_ASV(x)                       USB_OTGSC_ASV(x)
-#define USBHS_OTGSC_BSV_MASK                     USB_OTGSC_BSV_MASK
-#define USBHS_OTGSC_BSV_SHIFT                    USB_OTGSC_BSV_SHIFT
-#define USBHS_OTGSC_BSV(x)                       USB_OTGSC_BSV(x)
-#define USBHS_OTGSC_BSE_MASK                     USB_OTGSC_BSE_MASK
-#define USBHS_OTGSC_BSE_SHIFT                    USB_OTGSC_BSE_SHIFT
-#define USBHS_OTGSC_BSE(x)                       USB_OTGSC_BSE(x)
-#define USBHS_OTGSC_MST_MASK                     USB_OTGSC_TOG_1MS_MASK
-#define USBHS_OTGSC_MST_SHIFT                    USB_OTGSC_TOG_1MS_SHIFT
-#define USBHS_OTGSC_MST(x)                       USB_OTGSC_TOG_1MS(x)
-#define USBHS_OTGSC_DPS_MASK                     USB_OTGSC_DPS_MASK
-#define USBHS_OTGSC_DPS_SHIFT                    USB_OTGSC_DPS_SHIFT
-#define USBHS_OTGSC_DPS(x)                       USB_OTGSC_DPS(x)
-#define USBHS_OTGSC_IDIS_MASK                    USB_OTGSC_IDIS_MASK
-#define USBHS_OTGSC_IDIS_SHIFT                   USB_OTGSC_IDIS_SHIFT
-#define USBHS_OTGSC_IDIS(x)                      USB_OTGSC_IDIS(x)
-#define USBHS_OTGSC_AVVIS_MASK                   USB_OTGSC_AVVIS_MASK
-#define USBHS_OTGSC_AVVIS_SHIFT                  USB_OTGSC_AVVIS_SHIFT
-#define USBHS_OTGSC_AVVIS(x)                     USB_OTGSC_AVVIS(x)
-#define USBHS_OTGSC_ASVIS_MASK                   USB_OTGSC_ASVIS_MASK
-#define USBHS_OTGSC_ASVIS_SHIFT                  USB_OTGSC_ASVIS_SHIFT
-#define USBHS_OTGSC_ASVIS(x)                     USB_OTGSC_ASVIS(x)
-#define USBHS_OTGSC_BSVIS_MASK                   USB_OTGSC_BSVIS_MASK
-#define USBHS_OTGSC_BSVIS_SHIFT                  USB_OTGSC_BSVIS_SHIFT
-#define USBHS_OTGSC_BSVIS(x)                     USB_OTGSC_BSVIS(x)
-#define USBHS_OTGSC_BSEIS_MASK                   USB_OTGSC_BSEIS_MASK
-#define USBHS_OTGSC_BSEIS_SHIFT                  USB_OTGSC_BSEIS_SHIFT
-#define USBHS_OTGSC_BSEIS(x)                     USB_OTGSC_BSEIS(x)
-#define USBHS_OTGSC_MSS_MASK                     USB_OTGSC_STATUS_1MS_MASK
-#define USBHS_OTGSC_MSS_SHIFT                    USB_OTGSC_STATUS_1MS_SHIFT
-#define USBHS_OTGSC_MSS(x)                       USB_OTGSC_STATUS_1MS(x)
-#define USBHS_OTGSC_DPIS_MASK                    USB_OTGSC_DPIS_MASK
-#define USBHS_OTGSC_DPIS_SHIFT                   USB_OTGSC_DPIS_SHIFT
-#define USBHS_OTGSC_DPIS(x)                      USB_OTGSC_DPIS(x)
-#define USBHS_OTGSC_IDIE_MASK                    USB_OTGSC_IDIE_MASK
-#define USBHS_OTGSC_IDIE_SHIFT                   USB_OTGSC_IDIE_SHIFT
-#define USBHS_OTGSC_IDIE(x)                      USB_OTGSC_IDIE(x)
-#define USBHS_OTGSC_AVVIE_MASK                   USB_OTGSC_AVVIE_MASK
-#define USBHS_OTGSC_AVVIE_SHIFT                  USB_OTGSC_AVVIE_SHIFT
-#define USBHS_OTGSC_AVVIE(x)                     USB_OTGSC_AVVIE(x)
-#define USBHS_OTGSC_ASVIE_MASK                   USB_OTGSC_ASVIE_MASK
-#define USBHS_OTGSC_ASVIE_SHIFT                  USB_OTGSC_ASVIE_SHIFT
-#define USBHS_OTGSC_ASVIE(x)                     USB_OTGSC_ASVIE(x)
-#define USBHS_OTGSC_BSVIE_MASK                   USB_OTGSC_BSVIE_MASK
-#define USBHS_OTGSC_BSVIE_SHIFT                  USB_OTGSC_BSVIE_SHIFT
-#define USBHS_OTGSC_BSVIE(x)                     USB_OTGSC_BSVIE(x)
-#define USBHS_OTGSC_BSEIE_MASK                   USB_OTGSC_BSEIE_MASK
-#define USBHS_OTGSC_BSEIE_SHIFT                  USB_OTGSC_BSEIE_SHIFT
-#define USBHS_OTGSC_BSEIE(x)                     USB_OTGSC_BSEIE(x)
-#define USBHS_OTGSC_MSE_MASK                     USB_OTGSC_EN_1MS_MASK
-#define USBHS_OTGSC_MSE_SHIFT                    USB_OTGSC_EN_1MS_SHIFT
-#define USBHS_OTGSC_MSE(x)                       USB_OTGSC_EN_1MS(x)
-#define USBHS_OTGSC_DPIE_MASK                    USB_OTGSC_DPIE_MASK
-#define USBHS_OTGSC_DPIE_SHIFT                   USB_OTGSC_DPIE_SHIFT
-#define USBHS_OTGSC_DPIE(x)                      USB_OTGSC_DPIE(x)
-#define USBHS_USBMODE_CM_MASK                    USB_USBMODE_CM_MASK
-#define USBHS_USBMODE_CM_SHIFT                   USB_USBMODE_CM_SHIFT
-#define USBHS_USBMODE_CM(x)                      USB_USBMODE_CM(x)
-#define USBHS_USBMODE_ES_MASK                    USB_USBMODE_ES_MASK
-#define USBHS_USBMODE_ES_SHIFT                   USB_USBMODE_ES_SHIFT
-#define USBHS_USBMODE_ES(x)                      USB_USBMODE_ES(x)
-#define USBHS_USBMODE_SLOM_MASK                  USB_USBMODE_SLOM_MASK
-#define USBHS_USBMODE_SLOM_SHIFT                 USB_USBMODE_SLOM_SHIFT
-#define USBHS_USBMODE_SLOM(x)                    USB_USBMODE_SLOM(x)
-#define USBHS_USBMODE_SDIS_MASK                  USB_USBMODE_SDIS_MASK
-#define USBHS_USBMODE_SDIS_SHIFT                 USB_USBMODE_SDIS_SHIFT
-#define USBHS_USBMODE_SDIS(x)                    USB_USBMODE_SDIS(x)
-#define USBHS_EPSETUPSR_EPSETUPSTAT_MASK         USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK
-#define USBHS_EPSETUPSR_EPSETUPSTAT_SHIFT        USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT
-#define USBHS_EPSETUPSR_EPSETUPSTAT(x)           USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)
-#define USBHS_EPPRIME_PERB_MASK                  USB_ENDPTPRIME_PERB_MASK
-#define USBHS_EPPRIME_PERB_SHIFT                 USB_ENDPTPRIME_PERB_SHIFT
-#define USBHS_EPPRIME_PERB(x)                    USB_ENDPTPRIME_PERB(x)
-#define USBHS_EPPRIME_PETB_MASK                  USB_ENDPTPRIME_PETB_MASK
-#define USBHS_EPPRIME_PETB_SHIFT                 USB_ENDPTPRIME_PETB_SHIFT
-#define USBHS_EPPRIME_PETB(x)                    USB_ENDPTPRIME_PETB(x)
-#define USBHS_EPFLUSH_FERB_MASK                  USB_ENDPTFLUSH_FERB_MASK
-#define USBHS_EPFLUSH_FERB_SHIFT                 USB_ENDPTFLUSH_FERB_SHIFT
-#define USBHS_EPFLUSH_FERB(x)                    USB_ENDPTFLUSH_FERB(x)
-#define USBHS_EPFLUSH_FETB_MASK                  USB_ENDPTFLUSH_FETB_MASK
-#define USBHS_EPFLUSH_FETB_SHIFT                 USB_ENDPTFLUSH_FETB_SHIFT
-#define USBHS_EPFLUSH_FETB(x)                    USB_ENDPTFLUSH_FETB(x)
-#define USBHS_EPSR_ERBR_MASK                     USB_ENDPTSTAT_ERBR_MASK
-#define USBHS_EPSR_ERBR_SHIFT                    USB_ENDPTSTAT_ERBR_SHIFT
-#define USBHS_EPSR_ERBR(x)                       USB_ENDPTSTAT_ERBR(x)
-#define USBHS_EPSR_ETBR_MASK                     USB_ENDPTSTAT_ETBR_MASK
-#define USBHS_EPSR_ETBR_SHIFT                    USB_ENDPTSTAT_ETBR_SHIFT
-#define USBHS_EPSR_ETBR(x)                       USB_ENDPTSTAT_ETBR(x)
-#define USBHS_EPCOMPLETE_ERCE_MASK               USB_ENDPTCOMPLETE_ERCE_MASK
-#define USBHS_EPCOMPLETE_ERCE_SHIFT              USB_ENDPTCOMPLETE_ERCE_SHIFT
-#define USBHS_EPCOMPLETE_ERCE(x)                 USB_ENDPTCOMPLETE_ERCE(x)
-#define USBHS_EPCOMPLETE_ETCE_MASK               USB_ENDPTCOMPLETE_ETCE_MASK
-#define USBHS_EPCOMPLETE_ETCE_SHIFT              USB_ENDPTCOMPLETE_ETCE_SHIFT
-#define USBHS_EPCOMPLETE_ETCE(x)                 USB_ENDPTCOMPLETE_ETCE(x)
-#define USBHS_EPCR0_RXS_MASK                     USB_ENDPTCTRL0_RXS_MASK
-#define USBHS_EPCR0_RXS_SHIFT                    USB_ENDPTCTRL0_RXS_SHIFT
-#define USBHS_EPCR0_RXS(x)                       USB_ENDPTCTRL0_RXS(x)
-#define USBHS_EPCR0_RXT_MASK                     USB_ENDPTCTRL0_RXT_MASK
-#define USBHS_EPCR0_RXT_SHIFT                    USB_ENDPTCTRL0_RXT_SHIFT
-#define USBHS_EPCR0_RXT(x)                       USB_ENDPTCTRL0_RXT(x)
-#define USBHS_EPCR0_RXE_MASK                     USB_ENDPTCTRL0_RXE_MASK
-#define USBHS_EPCR0_RXE_SHIFT                    USB_ENDPTCTRL0_RXE_SHIFT
-#define USBHS_EPCR0_RXE(x)                       USB_ENDPTCTRL0_RXE(x)
-#define USBHS_EPCR0_TXS_MASK                     USB_ENDPTCTRL0_TXS_MASK
-#define USBHS_EPCR0_TXS_SHIFT                    USB_ENDPTCTRL0_TXS_SHIFT
-#define USBHS_EPCR0_TXS(x)                       USB_ENDPTCTRL0_TXS(x)
-#define USBHS_EPCR0_TXT_MASK                     USB_ENDPTCTRL0_TXT_MASK
-#define USBHS_EPCR0_TXT_SHIFT                    USB_ENDPTCTRL0_TXT_SHIFT
-#define USBHS_EPCR0_TXT(x)                       USB_ENDPTCTRL0_TXT(x)
-#define USBHS_EPCR0_TXE_MASK                     USB_ENDPTCTRL0_TXE_MASK
-#define USBHS_EPCR0_TXE_SHIFT                    USB_ENDPTCTRL0_TXE_SHIFT
-#define USBHS_EPCR0_TXE(x)                       USB_ENDPTCTRL0_TXE(x)
-#define USBHS_EPCR_RXS_MASK                      USB_ENDPTCTRL_RXS_MASK
-#define USBHS_EPCR_RXS_SHIFT                     USB_ENDPTCTRL_RXS_SHIFT
-#define USBHS_EPCR_RXS(x)                        USB_ENDPTCTRL_RXS(x)
-#define USBHS_EPCR_RXD_MASK                      USB_ENDPTCTRL_RXD_MASK
-#define USBHS_EPCR_RXD_SHIFT                     USB_ENDPTCTRL_RXD_SHIFT
-#define USBHS_EPCR_RXD(x)                        USB_ENDPTCTRL_RXD(x)
-#define USBHS_EPCR_RXT_MASK                      USB_ENDPTCTRL_RXT_MASK
-#define USBHS_EPCR_RXT_SHIFT                     USB_ENDPTCTRL_RXT_SHIFT
-#define USBHS_EPCR_RXT(x)                        USB_ENDPTCTRL_RXT(x)
-#define USBHS_EPCR_RXI_MASK                      USB_ENDPTCTRL_RXI_MASK
-#define USBHS_EPCR_RXI_SHIFT                     USB_ENDPTCTRL_RXI_SHIFT
-#define USBHS_EPCR_RXI(x)                        USB_ENDPTCTRL_RXI(x)
-#define USBHS_EPCR_RXR_MASK                      USB_ENDPTCTRL_RXR_MASK
-#define USBHS_EPCR_RXR_SHIFT                     USB_ENDPTCTRL_RXR_SHIFT
-#define USBHS_EPCR_RXR(x)                        USB_ENDPTCTRL_RXR(x)
-#define USBHS_EPCR_RXE_MASK                      USB_ENDPTCTRL_RXE_MASK
-#define USBHS_EPCR_RXE_SHIFT                     USB_ENDPTCTRL_RXE_SHIFT
-#define USBHS_EPCR_RXE(x)                        USB_ENDPTCTRL_RXE(x)
-#define USBHS_EPCR_TXS_MASK                      USB_ENDPTCTRL_TXS_MASK
-#define USBHS_EPCR_TXS_SHIFT                     USB_ENDPTCTRL_TXS_SHIFT
-#define USBHS_EPCR_TXS(x)                        USB_ENDPTCTRL_TXS(x)
-#define USBHS_EPCR_TXD_MASK                      USB_ENDPTCTRL_TXD_MASK
-#define USBHS_EPCR_TXD_SHIFT                     USB_ENDPTCTRL_TXD_SHIFT
-#define USBHS_EPCR_TXD(x)                        USB_ENDPTCTRL_TXD(x)
-#define USBHS_EPCR_TXT_MASK                      USB_ENDPTCTRL_TXT_MASK
-#define USBHS_EPCR_TXT_SHIFT                     USB_ENDPTCTRL_TXT_SHIFT
-#define USBHS_EPCR_TXT(x)                        USB_ENDPTCTRL_TXT(x)
-#define USBHS_EPCR_TXI_MASK                      USB_ENDPTCTRL_TXI_MASK
-#define USBHS_EPCR_TXI_SHIFT                     USB_ENDPTCTRL_TXI_SHIFT
-#define USBHS_EPCR_TXI(x)                        USB_ENDPTCTRL_TXI(x)
-#define USBHS_EPCR_TXR_MASK                      USB_ENDPTCTRL_TXR_MASK
-#define USBHS_EPCR_TXR_SHIFT                     USB_ENDPTCTRL_TXR_SHIFT
-#define USBHS_EPCR_TXR(x)                        USB_ENDPTCTRL_TXR(x)
-#define USBHS_EPCR_TXE_MASK                      USB_ENDPTCTRL_TXE_MASK
-#define USBHS_EPCR_TXE_SHIFT                     USB_ENDPTCTRL_TXE_SHIFT
-#define USBHS_EPCR_TXE(x)                        USB_ENDPTCTRL_TXE(x)
-#define USBHS_EPCR_COUNT                         USB_ENDPTCTRL_COUNT
-#define USBHS_Type                               USB_Type
-#define USBHS_BASE_ADDRS                         { USB1_BASE, USB2_BASE }
-#define USBHS_IRQS                               { USB_OTG1_IRQn, USB_OTG2_IRQn }
-#define USBHS_IRQHandler                         USB_OTG1_IRQHandler
-
+#define GPTIMER0CTL                          GPTIMER0CTRL
+#define GPTIMER1CTL                          GPTIMER1CTRL
+#define USB_SBUSCFG                          SBUSCFG
+#define EPLISTADDR                           ENDPTLISTADDR
+#define EPSETUPSR                            ENDPTSETUPSTAT
+#define EPPRIME                              ENDPTPRIME
+#define EPFLUSH                              ENDPTFLUSH
+#define EPSR                                 ENDPTSTAT
+#define EPCOMPLETE                           ENDPTCOMPLETE
+#define EPCR                                 ENDPTCTRL
+#define EPCR0                                ENDPTCTRL0
+#define USBHS_ID_ID_MASK                     USB_ID_ID_MASK
+#define USBHS_ID_ID_SHIFT                    USB_ID_ID_SHIFT
+#define USBHS_ID_ID(x)                       USB_ID_ID(x)
+#define USBHS_ID_NID_MASK                    USB_ID_NID_MASK
+#define USBHS_ID_NID_SHIFT                   USB_ID_NID_SHIFT
+#define USBHS_ID_NID(x)                      USB_ID_NID(x)
+#define USBHS_ID_REVISION_MASK               USB_ID_REVISION_MASK
+#define USBHS_ID_REVISION_SHIFT              USB_ID_REVISION_SHIFT
+#define USBHS_ID_REVISION(x)                 USB_ID_REVISION(x)
+#define USBHS_HWGENERAL_PHYW_MASK            USB_HWGENERAL_PHYW_MASK
+#define USBHS_HWGENERAL_PHYW_SHIFT           USB_HWGENERAL_PHYW_SHIFT
+#define USBHS_HWGENERAL_PHYW(x)              USB_HWGENERAL_PHYW(x)
+#define USBHS_HWGENERAL_PHYM_MASK            USB_HWGENERAL_PHYM_MASK
+#define USBHS_HWGENERAL_PHYM_SHIFT           USB_HWGENERAL_PHYM_SHIFT
+#define USBHS_HWGENERAL_PHYM(x)              USB_HWGENERAL_PHYM(x)
+#define USBHS_HWGENERAL_SM_MASK              USB_HWGENERAL_SM_MASK
+#define USBHS_HWGENERAL_SM_SHIFT             USB_HWGENERAL_SM_SHIFT
+#define USBHS_HWGENERAL_SM(x)                USB_HWGENERAL_SM(x)
+#define USBHS_HWHOST_HC_MASK                 USB_HWHOST_HC_MASK
+#define USBHS_HWHOST_HC_SHIFT                USB_HWHOST_HC_SHIFT
+#define USBHS_HWHOST_HC(x)                   USB_HWHOST_HC(x)
+#define USBHS_HWHOST_NPORT_MASK              USB_HWHOST_NPORT_MASK
+#define USBHS_HWHOST_NPORT_SHIFT             USB_HWHOST_NPORT_SHIFT
+#define USBHS_HWHOST_NPORT(x)                USB_HWHOST_NPORT(x)
+#define USBHS_HWDEVICE_DC_MASK               USB_HWDEVICE_DC_MASK
+#define USBHS_HWDEVICE_DC_SHIFT              USB_HWDEVICE_DC_SHIFT
+#define USBHS_HWDEVICE_DC(x)                 USB_HWDEVICE_DC(x)
+#define USBHS_HWDEVICE_DEVEP_MASK            USB_HWDEVICE_DEVEP_MASK
+#define USBHS_HWDEVICE_DEVEP_SHIFT           USB_HWDEVICE_DEVEP_SHIFT
+#define USBHS_HWDEVICE_DEVEP(x)              USB_HWDEVICE_DEVEP(x)
+#define USBHS_HWTXBUF_TXBURST_MASK           USB_HWTXBUF_TXBURST_MASK
+#define USBHS_HWTXBUF_TXBURST_SHIFT          USB_HWTXBUF_TXBURST_SHIFT
+#define USBHS_HWTXBUF_TXBURST(x)             USB_HWTXBUF_TXBURST(x)
+#define USBHS_HWTXBUF_TXCHANADD_MASK         USB_HWTXBUF_TXCHANADD_MASK
+#define USBHS_HWTXBUF_TXCHANADD_SHIFT        USB_HWTXBUF_TXCHANADD_SHIFT
+#define USBHS_HWTXBUF_TXCHANADD(x)           USB_HWTXBUF_TXCHANADD(x)
+#define USBHS_HWRXBUF_RXBURST_MASK           USB_HWRXBUF_RXBURST_MASK
+#define USBHS_HWRXBUF_RXBURST_SHIFT          USB_HWRXBUF_RXBURST_SHIFT
+#define USBHS_HWRXBUF_RXBURST(x)             USB_HWRXBUF_RXBURST(x)
+#define USBHS_HWRXBUF_RXADD_MASK             USB_HWRXBUF_RXADD_MASK
+#define USBHS_HWRXBUF_RXADD_SHIFT            USB_HWRXBUF_RXADD_SHIFT
+#define USBHS_HWRXBUF_RXADD(x)               USB_HWRXBUF_RXADD(x)
+#define USBHS_GPTIMER0LD_GPTLD_MASK          USB_GPTIMER0LD_GPTLD_MASK
+#define USBHS_GPTIMER0LD_GPTLD_SHIFT         USB_GPTIMER0LD_GPTLD_SHIFT
+#define USBHS_GPTIMER0LD_GPTLD(x)            USB_GPTIMER0LD_GPTLD(x)
+#define USBHS_GPTIMER0CTL_GPTCNT_MASK        USB_GPTIMER0CTRL_GPTCNT_MASK
+#define USBHS_GPTIMER0CTL_GPTCNT_SHIFT       USB_GPTIMER0CTRL_GPTCNT_SHIFT
+#define USBHS_GPTIMER0CTL_GPTCNT(x)          USB_GPTIMER0CTRL_GPTCNT(x)
+#define USBHS_GPTIMER0CTL_MODE_MASK          USB_GPTIMER0CTRL_GPTMODE_MASK
+#define USBHS_GPTIMER0CTL_MODE_SHIFT         USB_GPTIMER0CTRL_GPTMODE_SHIFT
+#define USBHS_GPTIMER0CTL_MODE(x)            USB_GPTIMER0CTRL_GPTMODE(x)
+#define USBHS_GPTIMER0CTL_RST_MASK           USB_GPTIMER0CTRL_GPTRST_MASK
+#define USBHS_GPTIMER0CTL_RST_SHIFT          USB_GPTIMER0CTRL_GPTRST_SHIFT
+#define USBHS_GPTIMER0CTL_RST(x)             USB_GPTIMER0CTRL_GPTRST(x)
+#define USBHS_GPTIMER0CTL_RUN_MASK           USB_GPTIMER0CTRL_GPTRUN_MASK
+#define USBHS_GPTIMER0CTL_RUN_SHIFT          USB_GPTIMER0CTRL_GPTRUN_SHIFT
+#define USBHS_GPTIMER0CTL_RUN(x)             USB_GPTIMER0CTRL_GPTRUN(x)
+#define USBHS_GPTIMER1LD_GPTLD_MASK          USB_GPTIMER1LD_GPTLD_MASK
+#define USBHS_GPTIMER1LD_GPTLD_SHIFT         USB_GPTIMER1LD_GPTLD_SHIFT
+#define USBHS_GPTIMER1LD_GPTLD(x)            USB_GPTIMER1LD_GPTLD(x)
+#define USBHS_GPTIMER1CTL_GPTCNT_MASK        USB_GPTIMER1CTRL_GPTCNT_MASK
+#define USBHS_GPTIMER1CTL_GPTCNT_SHIFT       USB_GPTIMER1CTRL_GPTCNT_SHIFT
+#define USBHS_GPTIMER1CTL_GPTCNT(x)          USB_GPTIMER1CTRL_GPTCNT(x)
+#define USBHS_GPTIMER1CTL_MODE_MASK          USB_GPTIMER1CTRL_GPTMODE_MASK
+#define USBHS_GPTIMER1CTL_MODE_SHIFT         USB_GPTIMER1CTRL_GPTMODE_SHIFT
+#define USBHS_GPTIMER1CTL_MODE(x)            USB_GPTIMER1CTRL_GPTMODE(x)
+#define USBHS_GPTIMER1CTL_RST_MASK           USB_GPTIMER1CTRL_GPTRST_MASK
+#define USBHS_GPTIMER1CTL_RST_SHIFT          USB_GPTIMER1CTRL_GPTRST_SHIFT
+#define USBHS_GPTIMER1CTL_RST(x)             USB_GPTIMER1CTRL_GPTRST(x)
+#define USBHS_GPTIMER1CTL_RUN_MASK           USB_GPTIMER1CTRL_GPTRUN_MASK
+#define USBHS_GPTIMER1CTL_RUN_SHIFT          USB_GPTIMER1CTRL_GPTRUN_SHIFT
+#define USBHS_GPTIMER1CTL_RUN(x)             USB_GPTIMER1CTRL_GPTRUN(x)
+#define USBHS_USB_SBUSCFG_BURSTMODE_MASK     USB_SBUSCFG_AHBBRST_MASK
+#define USBHS_USB_SBUSCFG_BURSTMODE_SHIFT    USB_SBUSCFG_AHBBRST_SHIFT
+#define USBHS_USB_SBUSCFG_BURSTMODE(x)       USB_SBUSCFG_AHBBRST(x)
+#define USBHS_HCIVERSION_CAPLENGTH(x)        USB_HCIVERSION_CAPLENGTH(x)
+#define USBHS_HCIVERSION_HCIVERSION_MASK     USB_HCIVERSION_HCIVERSION_MASK
+#define USBHS_HCIVERSION_HCIVERSION_SHIFT    USB_HCIVERSION_HCIVERSION_SHIFT
+#define USBHS_HCIVERSION_HCIVERSION(x)       USB_HCIVERSION_HCIVERSION(x)
+#define USBHS_HCSPARAMS_N_PORTS_MASK         USB_HCSPARAMS_N_PORTS_MASK
+#define USBHS_HCSPARAMS_N_PORTS_SHIFT        USB_HCSPARAMS_N_PORTS_SHIFT
+#define USBHS_HCSPARAMS_N_PORTS(x)           USB_HCSPARAMS_N_PORTS(x)
+#define USBHS_HCSPARAMS_PPC_MASK             USB_HCSPARAMS_PPC_MASK
+#define USBHS_HCSPARAMS_PPC_SHIFT            USB_HCSPARAMS_PPC_SHIFT
+#define USBHS_HCSPARAMS_PPC(x)               USB_HCSPARAMS_PPC(x)
+#define USBHS_HCSPARAMS_N_PCC_MASK           USB_HCSPARAMS_N_PCC_MASK
+#define USBHS_HCSPARAMS_N_PCC_SHIFT          USB_HCSPARAMS_N_PCC_SHIFT
+#define USBHS_HCSPARAMS_N_PCC(x)             USB_HCSPARAMS_N_PCC(x)
+#define USBHS_HCSPARAMS_N_CC_MASK            USB_HCSPARAMS_N_CC_MASK
+#define USBHS_HCSPARAMS_N_CC_SHIFT           USB_HCSPARAMS_N_CC_SHIFT
+#define USBHS_HCSPARAMS_N_CC(x)              USB_HCSPARAMS_N_CC(x)
+#define USBHS_HCSPARAMS_PI_MASK              USB_HCSPARAMS_PI_MASK
+#define USBHS_HCSPARAMS_PI_SHIFT             USB_HCSPARAMS_PI_SHIFT
+#define USBHS_HCSPARAMS_PI(x)                USB_HCSPARAMS_PI(x)
+#define USBHS_HCSPARAMS_N_PTT_MASK           USB_HCSPARAMS_N_PTT_MASK
+#define USBHS_HCSPARAMS_N_PTT_SHIFT          USB_HCSPARAMS_N_PTT_SHIFT
+#define USBHS_HCSPARAMS_N_PTT(x)             USB_HCSPARAMS_N_PTT(x)
+#define USBHS_HCSPARAMS_N_TT_MASK            USB_HCSPARAMS_N_TT_MASK
+#define USBHS_HCSPARAMS_N_TT_SHIFT           USB_HCSPARAMS_N_TT_SHIFT
+#define USBHS_HCSPARAMS_N_TT(x)              USB_HCSPARAMS_N_TT(x)
+#define USBHS_HCCPARAMS_ADC_MASK             USB_HCCPARAMS_ADC_MASK
+#define USBHS_HCCPARAMS_ADC_SHIFT            USB_HCCPARAMS_ADC_SHIFT
+#define USBHS_HCCPARAMS_ADC(x)               USB_HCCPARAMS_ADC(x)
+#define USBHS_HCCPARAMS_PFL_MASK             USB_HCCPARAMS_PFL_MASK
+#define USBHS_HCCPARAMS_PFL_SHIFT            USB_HCCPARAMS_PFL_SHIFT
+#define USBHS_HCCPARAMS_PFL(x)               USB_HCCPARAMS_PFL(x)
+#define USBHS_HCCPARAMS_ASP_MASK             USB_HCCPARAMS_ASP_MASK
+#define USBHS_HCCPARAMS_ASP_SHIFT            USB_HCCPARAMS_ASP_SHIFT
+#define USBHS_HCCPARAMS_ASP(x)               USB_HCCPARAMS_ASP(x)
+#define USBHS_HCCPARAMS_IST_MASK             USB_HCCPARAMS_IST_MASK
+#define USBHS_HCCPARAMS_IST_SHIFT            USB_HCCPARAMS_IST_SHIFT
+#define USBHS_HCCPARAMS_IST(x)               USB_HCCPARAMS_IST(x)
+#define USBHS_HCCPARAMS_EECP_MASK            USB_HCCPARAMS_EECP_MASK
+#define USBHS_HCCPARAMS_EECP_SHIFT           USB_HCCPARAMS_EECP_SHIFT
+#define USBHS_HCCPARAMS_EECP(x)              USB_HCCPARAMS_EECP(x)
+#define USBHS_DCIVERSION_DCIVERSION_MASK     USB_DCIVERSION_DCIVERSION_MASK
+#define USBHS_DCIVERSION_DCIVERSION_SHIFT    USB_DCIVERSION_DCIVERSION_SHIFT
+#define USBHS_DCIVERSION_DCIVERSION(x)       USB_DCIVERSION_DCIVERSION(x)
+#define USBHS_DCCPARAMS_DEN_MASK             USB_DCCPARAMS_DEN_MASK
+#define USBHS_DCCPARAMS_DEN_SHIFT            USB_DCCPARAMS_DEN_SHIFT
+#define USBHS_DCCPARAMS_DEN(x)               USB_DCCPARAMS_DEN(x)
+#define USBHS_DCCPARAMS_DC_MASK              USB_DCCPARAMS_DC_MASK
+#define USBHS_DCCPARAMS_DC_SHIFT             USB_DCCPARAMS_DC_SHIFT
+#define USBHS_DCCPARAMS_DC(x)                USB_DCCPARAMS_DC(x)
+#define USBHS_DCCPARAMS_HC_MASK              USB_DCCPARAMS_HC_MASK
+#define USBHS_DCCPARAMS_HC_SHIFT             USB_DCCPARAMS_HC_SHIFT
+#define USBHS_DCCPARAMS_HC(x)                USB_DCCPARAMS_HC(x)
+#define USBHS_USBCMD_RS_MASK                 USB_USBCMD_RS_MASK
+#define USBHS_USBCMD_RS_SHIFT                USB_USBCMD_RS_SHIFT
+#define USBHS_USBCMD_RS(x)                   USB_USBCMD_RS(x)
+#define USBHS_USBCMD_RST_MASK                USB_USBCMD_RST_MASK
+#define USBHS_USBCMD_RST_SHIFT               USB_USBCMD_RST_SHIFT
+#define USBHS_USBCMD_RST(x)                  USB_USBCMD_RST(x)
+#define USBHS_USBCMD_FS_MASK                 USB_USBCMD_FS_1_MASK
+#define USBHS_USBCMD_FS_SHIFT                USB_USBCMD_FS_1_SHIFT
+#define USBHS_USBCMD_FS(x)                   USB_USBCMD_FS_1(x)
+#define USBHS_USBCMD_PSE_MASK                USB_USBCMD_PSE_MASK
+#define USBHS_USBCMD_PSE_SHIFT               USB_USBCMD_PSE_SHIFT
+#define USBHS_USBCMD_PSE(x)                  USB_USBCMD_PSE(x)
+#define USBHS_USBCMD_ASE_MASK                USB_USBCMD_ASE_MASK
+#define USBHS_USBCMD_ASE_SHIFT               USB_USBCMD_ASE_SHIFT
+#define USBHS_USBCMD_ASE(x)                  USB_USBCMD_ASE(x)
+#define USBHS_USBCMD_IAA_MASK                USB_USBCMD_IAA_MASK
+#define USBHS_USBCMD_IAA_SHIFT               USB_USBCMD_IAA_SHIFT
+#define USBHS_USBCMD_IAA(x)                  USB_USBCMD_IAA(x)
+#define USBHS_USBCMD_ASP_MASK                USB_USBCMD_ASP_MASK
+#define USBHS_USBCMD_ASP_SHIFT               USB_USBCMD_ASP_SHIFT
+#define USBHS_USBCMD_ASP(x)                  USB_USBCMD_ASP(x)
+#define USBHS_USBCMD_ASPE_MASK               USB_USBCMD_ASPE_MASK
+#define USBHS_USBCMD_ASPE_SHIFT              USB_USBCMD_ASPE_SHIFT
+#define USBHS_USBCMD_ASPE(x)                 USB_USBCMD_ASPE(x)
+#define USBHS_USBCMD_ATDTW_MASK              USB_USBCMD_ATDTW_MASK
+#define USBHS_USBCMD_ATDTW_SHIFT             USB_USBCMD_ATDTW_SHIFT
+#define USBHS_USBCMD_ATDTW(x)                USB_USBCMD_ATDTW(x)
+#define USBHS_USBCMD_SUTW_MASK               USB_USBCMD_SUTW_MASK
+#define USBHS_USBCMD_SUTW_SHIFT              USB_USBCMD_SUTW_SHIFT
+#define USBHS_USBCMD_SUTW(x)                 USB_USBCMD_SUTW(x)
+#define USBHS_USBCMD_FS2_MASK                USB_USBCMD_FS_2_MASK
+#define USBHS_USBCMD_FS2_SHIFT               USB_USBCMD_FS_2_SHIFT
+#define USBHS_USBCMD_FS2(x)                  USB_USBCMD_FS_2(x)
+#define USBHS_USBCMD_ITC_MASK                USB_USBCMD_ITC_MASK
+#define USBHS_USBCMD_ITC_SHIFT               USB_USBCMD_ITC_SHIFT
+#define USBHS_USBCMD_ITC(x)                  USB_USBCMD_ITC(x)
+#define USBHS_USBSTS_UI_MASK                 USB_USBSTS_UI_MASK
+#define USBHS_USBSTS_UI_SHIFT                USB_USBSTS_UI_SHIFT
+#define USBHS_USBSTS_UI(x)                   USB_USBSTS_UI(x)
+#define USBHS_USBSTS_UEI_MASK                USB_USBSTS_UEI_MASK
+#define USBHS_USBSTS_UEI_SHIFT               USB_USBSTS_UEI_SHIFT
+#define USBHS_USBSTS_UEI(x)                  USB_USBSTS_UEI(x)
+#define USBHS_USBSTS_PCI_MASK                USB_USBSTS_PCI_MASK
+#define USBHS_USBSTS_PCI_SHIFT               USB_USBSTS_PCI_SHIFT
+#define USBHS_USBSTS_PCI(x)                  USB_USBSTS_PCI(x)
+#define USBHS_USBSTS_FRI_MASK                USB_USBSTS_FRI_MASK
+#define USBHS_USBSTS_FRI_SHIFT               USB_USBSTS_FRI_SHIFT
+#define USBHS_USBSTS_FRI(x)                  USB_USBSTS_FRI(x)
+#define USBHS_USBSTS_SEI_MASK                USB_USBSTS_SEI_MASK
+#define USBHS_USBSTS_SEI_SHIFT               USB_USBSTS_SEI_SHIFT
+#define USBHS_USBSTS_SEI(x)                  USB_USBSTS_SEI(x)
+#define USBHS_USBSTS_AAI_MASK                USB_USBSTS_AAI_MASK
+#define USBHS_USBSTS_AAI_SHIFT               USB_USBSTS_AAI_SHIFT
+#define USBHS_USBSTS_AAI(x)                  USB_USBSTS_AAI(x)
+#define USBHS_USBSTS_URI_MASK                USB_USBSTS_URI_MASK
+#define USBHS_USBSTS_URI_SHIFT               USB_USBSTS_URI_SHIFT
+#define USBHS_USBSTS_URI(x)                  USB_USBSTS_URI(x)
+#define USBHS_USBSTS_SRI_MASK                USB_USBSTS_SRI_MASK
+#define USBHS_USBSTS_SRI_SHIFT               USB_USBSTS_SRI_SHIFT
+#define USBHS_USBSTS_SRI(x)                  USB_USBSTS_SRI(x)
+#define USBHS_USBSTS_SLI_MASK                USB_USBSTS_SLI_MASK
+#define USBHS_USBSTS_SLI_SHIFT               USB_USBSTS_SLI_SHIFT
+#define USBHS_USBSTS_SLI(x)                  USB_USBSTS_SLI(x)
+#define USBHS_USBSTS_ULPII_MASK              USB_USBSTS_ULPII_MASK
+#define USBHS_USBSTS_ULPII_SHIFT             USB_USBSTS_ULPII_SHIFT
+#define USBHS_USBSTS_ULPII(x)                USB_USBSTS_ULPII(x)
+#define USBHS_USBSTS_HCH_MASK                USB_USBSTS_HCH_MASK
+#define USBHS_USBSTS_HCH_SHIFT               USB_USBSTS_HCH_SHIFT
+#define USBHS_USBSTS_HCH(x)                  USB_USBSTS_HCH(x)
+#define USBHS_USBSTS_RCL_MASK                USB_USBSTS_RCL_MASK
+#define USBHS_USBSTS_RCL_SHIFT               USB_USBSTS_RCL_SHIFT
+#define USBHS_USBSTS_RCL(x)                  USB_USBSTS_RCL(x)
+#define USBHS_USBSTS_PS_MASK                 USB_USBSTS_PS_MASK
+#define USBHS_USBSTS_PS_SHIFT                USB_USBSTS_PS_SHIFT
+#define USBHS_USBSTS_PS(x)                   USB_USBSTS_PS(x)
+#define USBHS_USBSTS_AS_MASK                 USB_USBSTS_AS_MASK
+#define USBHS_USBSTS_AS_SHIFT                USB_USBSTS_AS_SHIFT
+#define USBHS_USBSTS_AS(x)                   USB_USBSTS_AS(x)
+#define USBHS_USBSTS_NAKI_MASK               USB_USBSTS_NAKI_MASK
+#define USBHS_USBSTS_NAKI_SHIFT              USB_USBSTS_NAKI_SHIFT
+#define USBHS_USBSTS_NAKI(x)                 USB_USBSTS_NAKI(x)
+#define USBHS_USBSTS_TI0_MASK                USB_USBSTS_TI0_MASK
+#define USBHS_USBSTS_TI0_SHIFT               USB_USBSTS_TI0_SHIFT
+#define USBHS_USBSTS_TI0(x)                  USB_USBSTS_TI0(x)
+#define USBHS_USBSTS_TI1_MASK                USB_USBSTS_TI1_MASK
+#define USBHS_USBSTS_TI1_SHIFT               USB_USBSTS_TI1_SHIFT
+#define USBHS_USBSTS_TI1(x)                  USB_USBSTS_TI1(x)
+#define USBHS_USBINTR_UE_MASK                USB_USBINTR_UE_MASK
+#define USBHS_USBINTR_UE_SHIFT               USB_USBINTR_UE_SHIFT
+#define USBHS_USBINTR_UE(x)                  USB_USBINTR_UE(x)
+#define USBHS_USBINTR_UEE_MASK               USB_USBINTR_UEE_MASK
+#define USBHS_USBINTR_UEE_SHIFT              USB_USBINTR_UEE_SHIFT
+#define USBHS_USBINTR_UEE(x)                 USB_USBINTR_UEE(x)
+#define USBHS_USBINTR_PCE_MASK               USB_USBINTR_PCE_MASK
+#define USBHS_USBINTR_PCE_SHIFT              USB_USBINTR_PCE_SHIFT
+#define USBHS_USBINTR_PCE(x)                 USB_USBINTR_PCE(x)
+#define USBHS_USBINTR_FRE_MASK               USB_USBINTR_FRE_MASK
+#define USBHS_USBINTR_FRE_SHIFT              USB_USBINTR_FRE_SHIFT
+#define USBHS_USBINTR_FRE(x)                 USB_USBINTR_FRE(x)
+#define USBHS_USBINTR_SEE_MASK               USB_USBINTR_SEE_MASK
+#define USBHS_USBINTR_SEE_SHIFT              USB_USBINTR_SEE_SHIFT
+#define USBHS_USBINTR_SEE(x)                 USB_USBINTR_SEE(x)
+#define USBHS_USBINTR_AAE_MASK               USB_USBINTR_AAE_MASK
+#define USBHS_USBINTR_AAE_SHIFT              USB_USBINTR_AAE_SHIFT
+#define USBHS_USBINTR_AAE(x)                 USB_USBINTR_AAE(x)
+#define USBHS_USBINTR_URE_MASK               USB_USBINTR_URE_MASK
+#define USBHS_USBINTR_URE_SHIFT              USB_USBINTR_URE_SHIFT
+#define USBHS_USBINTR_URE(x)                 USB_USBINTR_URE(x)
+#define USBHS_USBINTR_SRE_MASK               USB_USBINTR_SRE_MASK
+#define USBHS_USBINTR_SRE_SHIFT              USB_USBINTR_SRE_SHIFT
+#define USBHS_USBINTR_SRE(x)                 USB_USBINTR_SRE(x)
+#define USBHS_USBINTR_SLE_MASK               USB_USBINTR_SLE_MASK
+#define USBHS_USBINTR_SLE_SHIFT              USB_USBINTR_SLE_SHIFT
+#define USBHS_USBINTR_SLE(x)                 USB_USBINTR_SLE(x)
+#define USBHS_USBINTR_ULPIE_MASK             USB_USBINTR_ULPIE_MASK
+#define USBHS_USBINTR_ULPIE_SHIFT            USB_USBINTR_ULPIE_SHIFT
+#define USBHS_USBINTR_ULPIE(x)               USB_USBINTR_ULPIE(x)
+#define USBHS_USBINTR_NAKE_MASK              USB_USBINTR_NAKE_MASK
+#define USBHS_USBINTR_NAKE_SHIFT             USB_USBINTR_NAKE_SHIFT
+#define USBHS_USBINTR_NAKE(x)                USB_USBINTR_NAKE(x)
+#define USBHS_USBINTR_UAIE_MASK              USB_USBINTR_UAIE_MASK
+#define USBHS_USBINTR_UAIE_SHIFT             USB_USBINTR_UAIE_SHIFT
+#define USBHS_USBINTR_UAIE(x)                USB_USBINTR_UAIE(x)
+#define USBHS_USBINTR_UPIE_MASK              USB_USBINTR_UPIE_MASK
+#define USBHS_USBINTR_UPIE_SHIFT             USB_USBINTR_UPIE_SHIFT
+#define USBHS_USBINTR_UPIE(x)                USB_USBINTR_UPIE(x)
+#define USBHS_USBINTR_TIE0_MASK              USB_USBINTR_TIE0_MASK
+#define USBHS_USBINTR_TIE0_SHIFT             USB_USBINTR_TIE0_SHIFT
+#define USBHS_USBINTR_TIE0(x)                USB_USBINTR_TIE0(x)
+#define USBHS_USBINTR_TIE1_MASK              USB_USBINTR_TIE1_MASK
+#define USBHS_USBINTR_TIE1_SHIFT             USB_USBINTR_TIE1_SHIFT
+#define USBHS_USBINTR_TIE1(x)                USB_USBINTR_TIE1(x)
+#define USBHS_FRINDEX_FRINDEX_MASK           USB_FRINDEX_FRINDEX_MASK
+#define USBHS_FRINDEX_FRINDEX_SHIFT          USB_FRINDEX_FRINDEX_SHIFT
+#define USBHS_FRINDEX_FRINDEX(x)             USB_FRINDEX_FRINDEX(x)
+#define USBHS_DEVICEADDR_USBADRA_MASK        USB_DEVICEADDR_USBADRA_MASK
+#define USBHS_DEVICEADDR_USBADRA_SHIFT       USB_DEVICEADDR_USBADRA_SHIFT
+#define USBHS_DEVICEADDR_USBADRA(x)          USB_DEVICEADDR_USBADRA(x)
+#define USBHS_DEVICEADDR_USBADR_MASK         USB_DEVICEADDR_USBADR_MASK
+#define USBHS_DEVICEADDR_USBADR_SHIFT        USB_DEVICEADDR_USBADR_SHIFT
+#define USBHS_DEVICEADDR_USBADR(x)           USB_DEVICEADDR_USBADR(x)
+#define USBHS_PERIODICLISTBASE_PERBASE_MASK  USB_PERIODICLISTBASE_BASEADR_MASK
+#define USBHS_PERIODICLISTBASE_PERBASE_SHIFT USB_PERIODICLISTBASE_BASEADR_SHIFT
+#define USBHS_PERIODICLISTBASE_PERBASE(x)    USB_PERIODICLISTBASE_BASEADR(x)
+#define USBHS_ASYNCLISTADDR_ASYBASE_MASK     USB_ASYNCLISTADDR_ASYBASE_MASK
+#define USBHS_ASYNCLISTADDR_ASYBASE_SHIFT    USB_ASYNCLISTADDR_ASYBASE_SHIFT
+#define USBHS_ASYNCLISTADDR_ASYBASE(x)       USB_ASYNCLISTADDR_ASYBASE(x)
+#define USBHS_EPLISTADDR_EPBASE_MASK         USB_ENDPTLISTADDR_EPBASE_MASK
+#define USBHS_EPLISTADDR_EPBASE_SHIFT        USB_ENDPTLISTADDR_EPBASE_SHIFT
+#define USBHS_EPLISTADDR_EPBASE(x)           USB_ENDPTLISTADDR_EPBASE(x)
+#define USBHS_BURSTSIZE_RXPBURST_MASK        USB_BURSTSIZE_RXPBURST_MASK
+#define USBHS_BURSTSIZE_RXPBURST_SHIFT       USB_BURSTSIZE_RXPBURST_SHIFT
+#define USBHS_BURSTSIZE_RXPBURST(x)          USB_BURSTSIZE_RXPBURST(x)
+#define USBHS_BURSTSIZE_TXPBURST_MASK        USB_BURSTSIZE_TXPBURST_MASK
+#define USBHS_BURSTSIZE_TXPBURST_SHIFT       USB_BURSTSIZE_TXPBURST_SHIFT
+#define USBHS_BURSTSIZE_TXPBURST(x)          USB_BURSTSIZE_TXPBURST(x)
+#define USBHS_TXFILLTUNING_TXSCHOH_MASK      USB_TXFILLTUNING_TXSCHOH_MASK
+#define USBHS_TXFILLTUNING_TXSCHOH_SHIFT     USB_TXFILLTUNING_TXSCHOH_SHIFT
+#define USBHS_TXFILLTUNING_TXSCHOH(x)        USB_TXFILLTUNING_TXSCHOH(x)
+#define USBHS_TXFILLTUNING_TXSCHHEALTH_MASK  USB_TXFILLTUNING_TXSCHHEALTH_MASK
+#define USBHS_TXFILLTUNING_TXSCHHEALTH_SHIFT USB_TXFILLTUNING_TXSCHHEALTH_SHIFT
+#define USBHS_TXFILLTUNING_TXSCHHEALTH(x)    USB_TXFILLTUNING_TXSCHHEALTH(x)
+#define USBHS_TXFILLTUNING_TXFIFOTHRES_MASK  USB_TXFILLTUNING_TXFIFOTHRES_MASK
+#define USBHS_TXFILLTUNING_TXFIFOTHRES_SHIFT USB_TXFILLTUNING_TXFIFOTHRES_SHIFT
+#define USBHS_TXFILLTUNING_TXFIFOTHRES(x)    USB_TXFILLTUNING_TXFIFOTHRES(x)
+#define USBHS_ENDPTNAK_EPRN_MASK             USB_ENDPTNAK_EPRN_MASK
+#define USBHS_ENDPTNAK_EPRN_SHIFT            USB_ENDPTNAK_EPRN_SHIFT
+#define USBHS_ENDPTNAK_EPRN(x)               USB_ENDPTNAK_EPRN(x)
+#define USBHS_ENDPTNAK_EPTN_MASK             USB_ENDPTNAK_EPTN_MASK
+#define USBHS_ENDPTNAK_EPTN_SHIFT            USB_ENDPTNAK_EPTN_SHIFT
+#define USBHS_ENDPTNAK_EPTN(x)               USB_ENDPTNAK_EPTN(x)
+#define USBHS_ENDPTNAKEN_EPRNE_MASK          USB_ENDPTNAKEN_EPRNE_MASK
+#define USBHS_ENDPTNAKEN_EPRNE_SHIFT         USB_ENDPTNAKEN_EPRNE_SHIFT
+#define USBHS_ENDPTNAKEN_EPRNE(x)            USB_ENDPTNAKEN_EPRNE(x)
+#define USBHS_ENDPTNAKEN_EPTNE_MASK          USB_ENDPTNAKEN_EPTNE_MASK
+#define USBHS_ENDPTNAKEN_EPTNE_SHIFT         USB_ENDPTNAKEN_EPTNE_SHIFT
+#define USBHS_ENDPTNAKEN_EPTNE(x)            USB_ENDPTNAKEN_EPTNE(x)
+#define USBHS_CONFIGFLAG_CF_MASK             USB_CONFIGFLAG_CF_MASK
+#define USBHS_CONFIGFLAG_CF_SHIFT            USB_CONFIGFLAG_CF_SHIFT
+#define USBHS_CONFIGFLAG_CF(x)               USB_CONFIGFLAG_CF(x)
+#define USBHS_PORTSC1_CCS_MASK               USB_PORTSC1_CCS_MASK
+#define USBHS_PORTSC1_CCS_SHIFT              USB_PORTSC1_CCS_SHIFT
+#define USBHS_PORTSC1_CCS(x)                 USB_PORTSC1_CCS(x)
+#define USBHS_PORTSC1_CSC_MASK               USB_PORTSC1_CSC_MASK
+#define USBHS_PORTSC1_CSC_SHIFT              USB_PORTSC1_CSC_SHIFT
+#define USBHS_PORTSC1_CSC(x)                 USB_PORTSC1_CSC(x)
+#define USBHS_PORTSC1_PE_MASK                USB_PORTSC1_PE_MASK
+#define USBHS_PORTSC1_PE_SHIFT               USB_PORTSC1_PE_SHIFT
+#define USBHS_PORTSC1_PE(x)                  USB_PORTSC1_PE(x)
+#define USBHS_PORTSC1_PEC_MASK               USB_PORTSC1_PEC_MASK
+#define USBHS_PORTSC1_PEC_SHIFT              USB_PORTSC1_PEC_SHIFT
+#define USBHS_PORTSC1_PEC(x)                 USB_PORTSC1_PEC(x)
+#define USBHS_PORTSC1_OCA_MASK               USB_PORTSC1_OCA_MASK
+#define USBHS_PORTSC1_OCA_SHIFT              USB_PORTSC1_OCA_SHIFT
+#define USBHS_PORTSC1_OCA(x)                 USB_PORTSC1_OCA(x)
+#define USBHS_PORTSC1_OCC_MASK               USB_PORTSC1_OCC_MASK
+#define USBHS_PORTSC1_OCC_SHIFT              USB_PORTSC1_OCC_SHIFT
+#define USBHS_PORTSC1_OCC(x)                 USB_PORTSC1_OCC(x)
+#define USBHS_PORTSC1_FPR_MASK               USB_PORTSC1_FPR_MASK
+#define USBHS_PORTSC1_FPR_SHIFT              USB_PORTSC1_FPR_SHIFT
+#define USBHS_PORTSC1_FPR(x)                 USB_PORTSC1_FPR(x)
+#define USBHS_PORTSC1_SUSP_MASK              USB_PORTSC1_SUSP_MASK
+#define USBHS_PORTSC1_SUSP_SHIFT             USB_PORTSC1_SUSP_SHIFT
+#define USBHS_PORTSC1_SUSP(x)                USB_PORTSC1_SUSP(x)
+#define USBHS_PORTSC1_PR_MASK                USB_PORTSC1_PR_MASK
+#define USBHS_PORTSC1_PR_SHIFT               USB_PORTSC1_PR_SHIFT
+#define USBHS_PORTSC1_PR(x)                  USB_PORTSC1_PR(x)
+#define USBHS_PORTSC1_HSP_MASK               USB_PORTSC1_HSP_MASK
+#define USBHS_PORTSC1_HSP_SHIFT              USB_PORTSC1_HSP_SHIFT
+#define USBHS_PORTSC1_HSP(x)                 USB_PORTSC1_HSP(x)
+#define USBHS_PORTSC1_LS_MASK                USB_PORTSC1_LS_MASK
+#define USBHS_PORTSC1_LS_SHIFT               USB_PORTSC1_LS_SHIFT
+#define USBHS_PORTSC1_LS(x)                  USB_PORTSC1_LS(x)
+#define USBHS_PORTSC1_PP_MASK                USB_PORTSC1_PP_MASK
+#define USBHS_PORTSC1_PP_SHIFT               USB_PORTSC1_PP_SHIFT
+#define USBHS_PORTSC1_PP(x)                  USB_PORTSC1_PP(x)
+#define USBHS_PORTSC1_PO_MASK                USB_PORTSC1_PO_MASK
+#define USBHS_PORTSC1_PO_SHIFT               USB_PORTSC1_PO_SHIFT
+#define USBHS_PORTSC1_PO(x)                  USB_PORTSC1_PO(x)
+#define USBHS_PORTSC1_PIC_MASK               USB_PORTSC1_PIC_MASK
+#define USBHS_PORTSC1_PIC_SHIFT              USB_PORTSC1_PIC_SHIFT
+#define USBHS_PORTSC1_PIC(x)                 USB_PORTSC1_PIC(x)
+#define USBHS_PORTSC1_PTC_MASK               USB_PORTSC1_PTC_MASK
+#define USBHS_PORTSC1_PTC_SHIFT              USB_PORTSC1_PTC_SHIFT
+#define USBHS_PORTSC1_PTC(x)                 USB_PORTSC1_PTC(x)
+#define USBHS_PORTSC1_WKCN_MASK              USB_PORTSC1_WKCN_MASK
+#define USBHS_PORTSC1_WKCN_SHIFT             USB_PORTSC1_WKCN_SHIFT
+#define USBHS_PORTSC1_WKCN(x)                USB_PORTSC1_WKCN(x)
+#define USBHS_PORTSC1_WKDS_MASK              USB_PORTSC1_WKDC_MASK
+#define USBHS_PORTSC1_WKDS_SHIFT             USB_PORTSC1_WKDC_SHIFT
+#define USBHS_PORTSC1_WKDS(x)                USB_PORTSC1_WKDC(x)
+#define USBHS_PORTSC1_WKOC_MASK              USB_PORTSC1_WKOC_MASK
+#define USBHS_PORTSC1_WKOC_SHIFT             USB_PORTSC1_WKOC_SHIFT
+#define USBHS_PORTSC1_WKOC(x)                USB_PORTSC1_WKOC(x)
+#define USBHS_PORTSC1_PHCD_MASK              USB_PORTSC1_PHCD_MASK
+#define USBHS_PORTSC1_PHCD_SHIFT             USB_PORTSC1_PHCD_SHIFT
+#define USBHS_PORTSC1_PHCD(x)                USB_PORTSC1_PHCD(x)
+#define USBHS_PORTSC1_PFSC_MASK              USB_PORTSC1_PFSC_MASK
+#define USBHS_PORTSC1_PFSC_SHIFT             USB_PORTSC1_PFSC_SHIFT
+#define USBHS_PORTSC1_PFSC(x)                USB_PORTSC1_PFSC(x)
+#define USBHS_PORTSC1_PTS2_MASK              USB_PORTSC1_PTS_2_MASK
+#define USBHS_PORTSC1_PTS2_SHIFT             USB_PORTSC1_PTS_2_SHIFT
+#define USBHS_PORTSC1_PTS2(x)                USB_PORTSC1_PTS_2(x)
+#define USBHS_PORTSC1_PSPD_MASK              USB_PORTSC1_PSPD_MASK
+#define USBHS_PORTSC1_PSPD_SHIFT             USB_PORTSC1_PSPD_SHIFT
+#define USBHS_PORTSC1_PSPD(x)                USB_PORTSC1_PSPD(x)
+#define USBHS_PORTSC1_PTW_MASK               USB_PORTSC1_PTW_MASK
+#define USBHS_PORTSC1_PTW_SHIFT              USB_PORTSC1_PTW_SHIFT
+#define USBHS_PORTSC1_PTW(x)                 USB_PORTSC1_PTW(x)
+#define USBHS_PORTSC1_STS_MASK               USB_PORTSC1_STS_MASK
+#define USBHS_PORTSC1_STS_SHIFT              USB_PORTSC1_STS_SHIFT
+#define USBHS_PORTSC1_STS(x)                 USB_PORTSC1_STS(x)
+#define USBHS_PORTSC1_PTS_MASK               USB_PORTSC1_PTS_1_MASK
+#define USBHS_PORTSC1_PTS_SHIFT              USB_PORTSC1_PTS_1_SHIFT
+#define USBHS_PORTSC1_PTS(x)                 USB_PORTSC1_PTS_1(x)
+#define USBHS_OTGSC_VD_MASK                  USB_OTGSC_VD_MASK
+#define USBHS_OTGSC_VD_SHIFT                 USB_OTGSC_VD_SHIFT
+#define USBHS_OTGSC_VD(x)                    USB_OTGSC_VD(x)
+#define USBHS_OTGSC_VC_MASK                  USB_OTGSC_VC_MASK
+#define USBHS_OTGSC_VC_SHIFT                 USB_OTGSC_VC_SHIFT
+#define USBHS_OTGSC_VC(x)                    USB_OTGSC_VC(x)
+#define USBHS_OTGSC_OT_MASK                  USB_OTGSC_OT_MASK
+#define USBHS_OTGSC_OT_SHIFT                 USB_OTGSC_OT_SHIFT
+#define USBHS_OTGSC_OT(x)                    USB_OTGSC_OT(x)
+#define USBHS_OTGSC_DP_MASK                  USB_OTGSC_DP_MASK
+#define USBHS_OTGSC_DP_SHIFT                 USB_OTGSC_DP_SHIFT
+#define USBHS_OTGSC_DP(x)                    USB_OTGSC_DP(x)
+#define USBHS_OTGSC_IDPU_MASK                USB_OTGSC_IDPU_MASK
+#define USBHS_OTGSC_IDPU_SHIFT               USB_OTGSC_IDPU_SHIFT
+#define USBHS_OTGSC_IDPU(x)                  USB_OTGSC_IDPU(x)
+#define USBHS_OTGSC_ID_MASK                  USB_OTGSC_ID_MASK
+#define USBHS_OTGSC_ID_SHIFT                 USB_OTGSC_ID_SHIFT
+#define USBHS_OTGSC_ID(x)                    USB_OTGSC_ID(x)
+#define USBHS_OTGSC_AVV_MASK                 USB_OTGSC_AVV_MASK
+#define USBHS_OTGSC_AVV_SHIFT                USB_OTGSC_AVV_SHIFT
+#define USBHS_OTGSC_AVV(x)                   USB_OTGSC_AVV(x)
+#define USBHS_OTGSC_ASV_MASK                 USB_OTGSC_ASV_MASK
+#define USBHS_OTGSC_ASV_SHIFT                USB_OTGSC_ASV_SHIFT
+#define USBHS_OTGSC_ASV(x)                   USB_OTGSC_ASV(x)
+#define USBHS_OTGSC_BSV_MASK                 USB_OTGSC_BSV_MASK
+#define USBHS_OTGSC_BSV_SHIFT                USB_OTGSC_BSV_SHIFT
+#define USBHS_OTGSC_BSV(x)                   USB_OTGSC_BSV(x)
+#define USBHS_OTGSC_BSE_MASK                 USB_OTGSC_BSE_MASK
+#define USBHS_OTGSC_BSE_SHIFT                USB_OTGSC_BSE_SHIFT
+#define USBHS_OTGSC_BSE(x)                   USB_OTGSC_BSE(x)
+#define USBHS_OTGSC_MST_MASK                 USB_OTGSC_TOG_1MS_MASK
+#define USBHS_OTGSC_MST_SHIFT                USB_OTGSC_TOG_1MS_SHIFT
+#define USBHS_OTGSC_MST(x)                   USB_OTGSC_TOG_1MS(x)
+#define USBHS_OTGSC_DPS_MASK                 USB_OTGSC_DPS_MASK
+#define USBHS_OTGSC_DPS_SHIFT                USB_OTGSC_DPS_SHIFT
+#define USBHS_OTGSC_DPS(x)                   USB_OTGSC_DPS(x)
+#define USBHS_OTGSC_IDIS_MASK                USB_OTGSC_IDIS_MASK
+#define USBHS_OTGSC_IDIS_SHIFT               USB_OTGSC_IDIS_SHIFT
+#define USBHS_OTGSC_IDIS(x)                  USB_OTGSC_IDIS(x)
+#define USBHS_OTGSC_AVVIS_MASK               USB_OTGSC_AVVIS_MASK
+#define USBHS_OTGSC_AVVIS_SHIFT              USB_OTGSC_AVVIS_SHIFT
+#define USBHS_OTGSC_AVVIS(x)                 USB_OTGSC_AVVIS(x)
+#define USBHS_OTGSC_ASVIS_MASK               USB_OTGSC_ASVIS_MASK
+#define USBHS_OTGSC_ASVIS_SHIFT              USB_OTGSC_ASVIS_SHIFT
+#define USBHS_OTGSC_ASVIS(x)                 USB_OTGSC_ASVIS(x)
+#define USBHS_OTGSC_BSVIS_MASK               USB_OTGSC_BSVIS_MASK
+#define USBHS_OTGSC_BSVIS_SHIFT              USB_OTGSC_BSVIS_SHIFT
+#define USBHS_OTGSC_BSVIS(x)                 USB_OTGSC_BSVIS(x)
+#define USBHS_OTGSC_BSEIS_MASK               USB_OTGSC_BSEIS_MASK
+#define USBHS_OTGSC_BSEIS_SHIFT              USB_OTGSC_BSEIS_SHIFT
+#define USBHS_OTGSC_BSEIS(x)                 USB_OTGSC_BSEIS(x)
+#define USBHS_OTGSC_MSS_MASK                 USB_OTGSC_STATUS_1MS_MASK
+#define USBHS_OTGSC_MSS_SHIFT                USB_OTGSC_STATUS_1MS_SHIFT
+#define USBHS_OTGSC_MSS(x)                   USB_OTGSC_STATUS_1MS(x)
+#define USBHS_OTGSC_DPIS_MASK                USB_OTGSC_DPIS_MASK
+#define USBHS_OTGSC_DPIS_SHIFT               USB_OTGSC_DPIS_SHIFT
+#define USBHS_OTGSC_DPIS(x)                  USB_OTGSC_DPIS(x)
+#define USBHS_OTGSC_IDIE_MASK                USB_OTGSC_IDIE_MASK
+#define USBHS_OTGSC_IDIE_SHIFT               USB_OTGSC_IDIE_SHIFT
+#define USBHS_OTGSC_IDIE(x)                  USB_OTGSC_IDIE(x)
+#define USBHS_OTGSC_AVVIE_MASK               USB_OTGSC_AVVIE_MASK
+#define USBHS_OTGSC_AVVIE_SHIFT              USB_OTGSC_AVVIE_SHIFT
+#define USBHS_OTGSC_AVVIE(x)                 USB_OTGSC_AVVIE(x)
+#define USBHS_OTGSC_ASVIE_MASK               USB_OTGSC_ASVIE_MASK
+#define USBHS_OTGSC_ASVIE_SHIFT              USB_OTGSC_ASVIE_SHIFT
+#define USBHS_OTGSC_ASVIE(x)                 USB_OTGSC_ASVIE(x)
+#define USBHS_OTGSC_BSVIE_MASK               USB_OTGSC_BSVIE_MASK
+#define USBHS_OTGSC_BSVIE_SHIFT              USB_OTGSC_BSVIE_SHIFT
+#define USBHS_OTGSC_BSVIE(x)                 USB_OTGSC_BSVIE(x)
+#define USBHS_OTGSC_BSEIE_MASK               USB_OTGSC_BSEIE_MASK
+#define USBHS_OTGSC_BSEIE_SHIFT              USB_OTGSC_BSEIE_SHIFT
+#define USBHS_OTGSC_BSEIE(x)                 USB_OTGSC_BSEIE(x)
+#define USBHS_OTGSC_MSE_MASK                 USB_OTGSC_EN_1MS_MASK
+#define USBHS_OTGSC_MSE_SHIFT                USB_OTGSC_EN_1MS_SHIFT
+#define USBHS_OTGSC_MSE(x)                   USB_OTGSC_EN_1MS(x)
+#define USBHS_OTGSC_DPIE_MASK                USB_OTGSC_DPIE_MASK
+#define USBHS_OTGSC_DPIE_SHIFT               USB_OTGSC_DPIE_SHIFT
+#define USBHS_OTGSC_DPIE(x)                  USB_OTGSC_DPIE(x)
+#define USBHS_USBMODE_CM_MASK                USB_USBMODE_CM_MASK
+#define USBHS_USBMODE_CM_SHIFT               USB_USBMODE_CM_SHIFT
+#define USBHS_USBMODE_CM(x)                  USB_USBMODE_CM(x)
+#define USBHS_USBMODE_ES_MASK                USB_USBMODE_ES_MASK
+#define USBHS_USBMODE_ES_SHIFT               USB_USBMODE_ES_SHIFT
+#define USBHS_USBMODE_ES(x)                  USB_USBMODE_ES(x)
+#define USBHS_USBMODE_SLOM_MASK              USB_USBMODE_SLOM_MASK
+#define USBHS_USBMODE_SLOM_SHIFT             USB_USBMODE_SLOM_SHIFT
+#define USBHS_USBMODE_SLOM(x)                USB_USBMODE_SLOM(x)
+#define USBHS_USBMODE_SDIS_MASK              USB_USBMODE_SDIS_MASK
+#define USBHS_USBMODE_SDIS_SHIFT             USB_USBMODE_SDIS_SHIFT
+#define USBHS_USBMODE_SDIS(x)                USB_USBMODE_SDIS(x)
+#define USBHS_EPSETUPSR_EPSETUPSTAT_MASK     USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_MASK
+#define USBHS_EPSETUPSR_EPSETUPSTAT_SHIFT    USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT_SHIFT
+#define USBHS_EPSETUPSR_EPSETUPSTAT(x)       USB_ENDPTSETUPSTAT_ENDPTSETUPSTAT(x)
+#define USBHS_EPPRIME_PERB_MASK              USB_ENDPTPRIME_PERB_MASK
+#define USBHS_EPPRIME_PERB_SHIFT             USB_ENDPTPRIME_PERB_SHIFT
+#define USBHS_EPPRIME_PERB(x)                USB_ENDPTPRIME_PERB(x)
+#define USBHS_EPPRIME_PETB_MASK              USB_ENDPTPRIME_PETB_MASK
+#define USBHS_EPPRIME_PETB_SHIFT             USB_ENDPTPRIME_PETB_SHIFT
+#define USBHS_EPPRIME_PETB(x)                USB_ENDPTPRIME_PETB(x)
+#define USBHS_EPFLUSH_FERB_MASK              USB_ENDPTFLUSH_FERB_MASK
+#define USBHS_EPFLUSH_FERB_SHIFT             USB_ENDPTFLUSH_FERB_SHIFT
+#define USBHS_EPFLUSH_FERB(x)                USB_ENDPTFLUSH_FERB(x)
+#define USBHS_EPFLUSH_FETB_MASK              USB_ENDPTFLUSH_FETB_MASK
+#define USBHS_EPFLUSH_FETB_SHIFT             USB_ENDPTFLUSH_FETB_SHIFT
+#define USBHS_EPFLUSH_FETB(x)                USB_ENDPTFLUSH_FETB(x)
+#define USBHS_EPSR_ERBR_MASK                 USB_ENDPTSTAT_ERBR_MASK
+#define USBHS_EPSR_ERBR_SHIFT                USB_ENDPTSTAT_ERBR_SHIFT
+#define USBHS_EPSR_ERBR(x)                   USB_ENDPTSTAT_ERBR(x)
+#define USBHS_EPSR_ETBR_MASK                 USB_ENDPTSTAT_ETBR_MASK
+#define USBHS_EPSR_ETBR_SHIFT                USB_ENDPTSTAT_ETBR_SHIFT
+#define USBHS_EPSR_ETBR(x)                   USB_ENDPTSTAT_ETBR(x)
+#define USBHS_EPCOMPLETE_ERCE_MASK           USB_ENDPTCOMPLETE_ERCE_MASK
+#define USBHS_EPCOMPLETE_ERCE_SHIFT          USB_ENDPTCOMPLETE_ERCE_SHIFT
+#define USBHS_EPCOMPLETE_ERCE(x)             USB_ENDPTCOMPLETE_ERCE(x)
+#define USBHS_EPCOMPLETE_ETCE_MASK           USB_ENDPTCOMPLETE_ETCE_MASK
+#define USBHS_EPCOMPLETE_ETCE_SHIFT          USB_ENDPTCOMPLETE_ETCE_SHIFT
+#define USBHS_EPCOMPLETE_ETCE(x)             USB_ENDPTCOMPLETE_ETCE(x)
+#define USBHS_EPCR0_RXS_MASK                 USB_ENDPTCTRL0_RXS_MASK
+#define USBHS_EPCR0_RXS_SHIFT                USB_ENDPTCTRL0_RXS_SHIFT
+#define USBHS_EPCR0_RXS(x)                   USB_ENDPTCTRL0_RXS(x)
+#define USBHS_EPCR0_RXT_MASK                 USB_ENDPTCTRL0_RXT_MASK
+#define USBHS_EPCR0_RXT_SHIFT                USB_ENDPTCTRL0_RXT_SHIFT
+#define USBHS_EPCR0_RXT(x)                   USB_ENDPTCTRL0_RXT(x)
+#define USBHS_EPCR0_RXE_MASK                 USB_ENDPTCTRL0_RXE_MASK
+#define USBHS_EPCR0_RXE_SHIFT                USB_ENDPTCTRL0_RXE_SHIFT
+#define USBHS_EPCR0_RXE(x)                   USB_ENDPTCTRL0_RXE(x)
+#define USBHS_EPCR0_TXS_MASK                 USB_ENDPTCTRL0_TXS_MASK
+#define USBHS_EPCR0_TXS_SHIFT                USB_ENDPTCTRL0_TXS_SHIFT
+#define USBHS_EPCR0_TXS(x)                   USB_ENDPTCTRL0_TXS(x)
+#define USBHS_EPCR0_TXT_MASK                 USB_ENDPTCTRL0_TXT_MASK
+#define USBHS_EPCR0_TXT_SHIFT                USB_ENDPTCTRL0_TXT_SHIFT
+#define USBHS_EPCR0_TXT(x)                   USB_ENDPTCTRL0_TXT(x)
+#define USBHS_EPCR0_TXE_MASK                 USB_ENDPTCTRL0_TXE_MASK
+#define USBHS_EPCR0_TXE_SHIFT                USB_ENDPTCTRL0_TXE_SHIFT
+#define USBHS_EPCR0_TXE(x)                   USB_ENDPTCTRL0_TXE(x)
+#define USBHS_EPCR_RXS_MASK                  USB_ENDPTCTRL_RXS_MASK
+#define USBHS_EPCR_RXS_SHIFT                 USB_ENDPTCTRL_RXS_SHIFT
+#define USBHS_EPCR_RXS(x)                    USB_ENDPTCTRL_RXS(x)
+#define USBHS_EPCR_RXD_MASK                  USB_ENDPTCTRL_RXD_MASK
+#define USBHS_EPCR_RXD_SHIFT                 USB_ENDPTCTRL_RXD_SHIFT
+#define USBHS_EPCR_RXD(x)                    USB_ENDPTCTRL_RXD(x)
+#define USBHS_EPCR_RXT_MASK                  USB_ENDPTCTRL_RXT_MASK
+#define USBHS_EPCR_RXT_SHIFT                 USB_ENDPTCTRL_RXT_SHIFT
+#define USBHS_EPCR_RXT(x)                    USB_ENDPTCTRL_RXT(x)
+#define USBHS_EPCR_RXI_MASK                  USB_ENDPTCTRL_RXI_MASK
+#define USBHS_EPCR_RXI_SHIFT                 USB_ENDPTCTRL_RXI_SHIFT
+#define USBHS_EPCR_RXI(x)                    USB_ENDPTCTRL_RXI(x)
+#define USBHS_EPCR_RXR_MASK                  USB_ENDPTCTRL_RXR_MASK
+#define USBHS_EPCR_RXR_SHIFT                 USB_ENDPTCTRL_RXR_SHIFT
+#define USBHS_EPCR_RXR(x)                    USB_ENDPTCTRL_RXR(x)
+#define USBHS_EPCR_RXE_MASK                  USB_ENDPTCTRL_RXE_MASK
+#define USBHS_EPCR_RXE_SHIFT                 USB_ENDPTCTRL_RXE_SHIFT
+#define USBHS_EPCR_RXE(x)                    USB_ENDPTCTRL_RXE(x)
+#define USBHS_EPCR_TXS_MASK                  USB_ENDPTCTRL_TXS_MASK
+#define USBHS_EPCR_TXS_SHIFT                 USB_ENDPTCTRL_TXS_SHIFT
+#define USBHS_EPCR_TXS(x)                    USB_ENDPTCTRL_TXS(x)
+#define USBHS_EPCR_TXD_MASK                  USB_ENDPTCTRL_TXD_MASK
+#define USBHS_EPCR_TXD_SHIFT                 USB_ENDPTCTRL_TXD_SHIFT
+#define USBHS_EPCR_TXD(x)                    USB_ENDPTCTRL_TXD(x)
+#define USBHS_EPCR_TXT_MASK                  USB_ENDPTCTRL_TXT_MASK
+#define USBHS_EPCR_TXT_SHIFT                 USB_ENDPTCTRL_TXT_SHIFT
+#define USBHS_EPCR_TXT(x)                    USB_ENDPTCTRL_TXT(x)
+#define USBHS_EPCR_TXI_MASK                  USB_ENDPTCTRL_TXI_MASK
+#define USBHS_EPCR_TXI_SHIFT                 USB_ENDPTCTRL_TXI_SHIFT
+#define USBHS_EPCR_TXI(x)                    USB_ENDPTCTRL_TXI(x)
+#define USBHS_EPCR_TXR_MASK                  USB_ENDPTCTRL_TXR_MASK
+#define USBHS_EPCR_TXR_SHIFT                 USB_ENDPTCTRL_TXR_SHIFT
+#define USBHS_EPCR_TXR(x)                    USB_ENDPTCTRL_TXR(x)
+#define USBHS_EPCR_TXE_MASK                  USB_ENDPTCTRL_TXE_MASK
+#define USBHS_EPCR_TXE_SHIFT                 USB_ENDPTCTRL_TXE_SHIFT
+#define USBHS_EPCR_TXE(x)                    USB_ENDPTCTRL_TXE(x)
+#define USBHS_EPCR_COUNT                     USB_ENDPTCTRL_COUNT
+#define USBHS_Type                           USB_Type
+#define USBHS_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        USB1_BASE, USB2_BASE                                                                                           \
+    }
+#define USBHS_IRQS                                                                                                     \
+    {                                                                                                                  \
+        USB_OTG1_IRQn, USB_OTG2_IRQn                                                                                   \
+    }
+#define USBHS_IRQHandler USB_OTG1_IRQHandler
 
 /*!
  * @}
  */ /* end of group USB_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USBNC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -23060,11 +26131,13 @@ typedef struct {
  */
 
 /** USBNC - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[2048];
-  __IO uint32_t USB_OTGn_CTRL;                     /**< USB OTG1 Control Register..USB OTG2 Control Register, offset: 0x800 */
-       uint8_t RESERVED_1[20];
-  __IO uint32_t USB_OTGn_PHY_CTRL_0;               /**< OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register, offset: 0x818 */
+typedef struct
+{
+    uint8_t RESERVED_0[2048];
+    __IO uint32_t USB_OTGn_CTRL; /**< USB OTG1 Control Register..USB OTG2 Control Register, offset: 0x800 */
+    uint8_t RESERVED_1[20];
+    __IO uint32_t
+        USB_OTGn_PHY_CTRL_0; /**< OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register, offset: 0x818 */
 } USBNC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -23078,70 +26151,85 @@ typedef struct {
 
 /*! @name USB_OTGn_CTRL - USB OTG1 Control Register..USB OTG2 Control Register */
 /*! @{ */
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK    (0x80U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT   (7U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK    (0x100U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT   (8U)
-#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK)
-#define USBNC_USB_OTGn_CTRL_PWR_POL_MASK         (0x200U)
-#define USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT        (9U)
-#define USBNC_USB_OTGn_CTRL_PWR_POL(x)           (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_PWR_POL_MASK)
-#define USBNC_USB_OTGn_CTRL_WIE_MASK             (0x400U)
-#define USBNC_USB_OTGn_CTRL_WIE_SHIFT            (10U)
-#define USBNC_USB_OTGn_CTRL_WIE(x)               (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIE_SHIFT)) & USBNC_USB_OTGn_CTRL_WIE_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK      (0x4000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT     (14U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)        (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_MASK         (0x8000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT        (15U)
-#define USBNC_USB_OTGn_CTRL_WKUP_SW(x)           (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK      (0x10000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT     (16U)
-#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)        (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK    (0x20000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT   (17U)
-#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK    (0x20000000U)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT   (29U)
-#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)      (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK)
-#define USBNC_USB_OTGn_CTRL_WIR_MASK             (0x80000000U)
-#define USBNC_USB_OTGn_CTRL_WIR_SHIFT            (31U)
-#define USBNC_USB_OTGn_CTRL_WIR(x)               (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIR_SHIFT)) & USBNC_USB_OTGn_CTRL_WIR_MASK)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK  (0x80U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT (7U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_DIS(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_DIS_MASK)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK  (0x100U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT (8U)
+#define USBNC_USB_OTGn_CTRL_OVER_CUR_POL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_OVER_CUR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_OVER_CUR_POL_MASK)
+#define USBNC_USB_OTGn_CTRL_PWR_POL_MASK  (0x200U)
+#define USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT (9U)
+#define USBNC_USB_OTGn_CTRL_PWR_POL(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_PWR_POL_SHIFT)) & USBNC_USB_OTGn_CTRL_PWR_POL_MASK)
+#define USBNC_USB_OTGn_CTRL_WIE_MASK  (0x400U)
+#define USBNC_USB_OTGn_CTRL_WIE_SHIFT (10U)
+#define USBNC_USB_OTGn_CTRL_WIE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIE_SHIFT)) & USBNC_USB_OTGn_CTRL_WIE_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK  (0x4000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT (14U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_MASK  (0x8000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT (15U)
+#define USBNC_USB_OTGn_CTRL_WKUP_SW(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_SW_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_SW_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK  (0x10000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT (16U)
+#define USBNC_USB_OTGn_CTRL_WKUP_ID_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_ID_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_ID_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK  (0x20000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT (17U)
+#define USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_VBUS_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK  (0x20000000U)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT (29U)
+#define USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_SHIFT)) & USBNC_USB_OTGn_CTRL_WKUP_DPDM_EN_MASK)
+#define USBNC_USB_OTGn_CTRL_WIR_MASK  (0x80000000U)
+#define USBNC_USB_OTGn_CTRL_WIR_SHIFT (31U)
+#define USBNC_USB_OTGn_CTRL_WIR(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_CTRL_WIR_SHIFT)) & USBNC_USB_OTGn_CTRL_WIR_MASK)
 /*! @} */
 
 /*! @name USB_OTGn_PHY_CTRL_0 - OTG1 UTMI PHY Control 0 Register..OTG2 UTMI PHY Control 0 Register */
 /*! @{ */
-#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK (0x80000000U)
+#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK  (0x80000000U)
 #define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT (31U)
-#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD(x) (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT)) & USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK)
+#define USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_SHIFT)) &                                   \
+     USBNC_USB_OTGn_PHY_CTRL_0_UTMI_CLK_VLD_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USBNC_Register_Masks */
 
-
 /* USBNC - Peripheral instance base addresses */
 /** Peripheral USBNC1 base address */
-#define USBNC1_BASE                              (0x402E0000u)
+#define USBNC1_BASE (0x402E0000u)
 /** Peripheral USBNC1 base pointer */
-#define USBNC1                                   ((USBNC_Type *)USBNC1_BASE)
+#define USBNC1 ((USBNC_Type *)USBNC1_BASE)
 /** Peripheral USBNC2 base address */
-#define USBNC2_BASE                              (0x402E0004u)
+#define USBNC2_BASE (0x402E0004u)
 /** Peripheral USBNC2 base pointer */
-#define USBNC2                                   ((USBNC_Type *)USBNC2_BASE)
+#define USBNC2 ((USBNC_Type *)USBNC2_BASE)
 /** Array initializer of USBNC peripheral base addresses */
-#define USBNC_BASE_ADDRS                         { 0u, USBNC1_BASE, USBNC2_BASE }
+#define USBNC_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, USBNC1_BASE, USBNC2_BASE                                                                                   \
+    }
 /** Array initializer of USBNC peripheral base pointers */
-#define USBNC_BASE_PTRS                          { (USBNC_Type *)0u, USBNC1, USBNC2 }
+#define USBNC_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (USBNC_Type *)0u, USBNC1, USBNC2                                                                               \
+    }
 
 /*!
  * @}
  */ /* end of group USBNC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USBPHY Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -23152,36 +26240,37 @@ typedef struct {
  */
 
 /** USBPHY - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t PWD;                               /**< USB PHY Power-Down Register, offset: 0x0 */
-  __IO uint32_t PWD_SET;                           /**< USB PHY Power-Down Register, offset: 0x4 */
-  __IO uint32_t PWD_CLR;                           /**< USB PHY Power-Down Register, offset: 0x8 */
-  __IO uint32_t PWD_TOG;                           /**< USB PHY Power-Down Register, offset: 0xC */
-  __IO uint32_t TX;                                /**< USB PHY Transmitter Control Register, offset: 0x10 */
-  __IO uint32_t TX_SET;                            /**< USB PHY Transmitter Control Register, offset: 0x14 */
-  __IO uint32_t TX_CLR;                            /**< USB PHY Transmitter Control Register, offset: 0x18 */
-  __IO uint32_t TX_TOG;                            /**< USB PHY Transmitter Control Register, offset: 0x1C */
-  __IO uint32_t RX;                                /**< USB PHY Receiver Control Register, offset: 0x20 */
-  __IO uint32_t RX_SET;                            /**< USB PHY Receiver Control Register, offset: 0x24 */
-  __IO uint32_t RX_CLR;                            /**< USB PHY Receiver Control Register, offset: 0x28 */
-  __IO uint32_t RX_TOG;                            /**< USB PHY Receiver Control Register, offset: 0x2C */
-  __IO uint32_t CTRL;                              /**< USB PHY General Control Register, offset: 0x30 */
-  __IO uint32_t CTRL_SET;                          /**< USB PHY General Control Register, offset: 0x34 */
-  __IO uint32_t CTRL_CLR;                          /**< USB PHY General Control Register, offset: 0x38 */
-  __IO uint32_t CTRL_TOG;                          /**< USB PHY General Control Register, offset: 0x3C */
-  __IO uint32_t STATUS;                            /**< USB PHY Status Register, offset: 0x40 */
-       uint8_t RESERVED_0[12];
-  __IO uint32_t DEBUGr;                            /**< USB PHY Debug Register, offset: 0x50 */
-  __IO uint32_t DEBUG_SET;                         /**< USB PHY Debug Register, offset: 0x54 */
-  __IO uint32_t DEBUG_CLR;                         /**< USB PHY Debug Register, offset: 0x58 */
-  __IO uint32_t DEBUG_TOG;                         /**< USB PHY Debug Register, offset: 0x5C */
-  __I  uint32_t DEBUG0_STATUS;                     /**< UTMI Debug Status Register 0, offset: 0x60 */
-       uint8_t RESERVED_1[12];
-  __IO uint32_t DEBUG1;                            /**< UTMI Debug Status Register 1, offset: 0x70 */
-  __IO uint32_t DEBUG1_SET;                        /**< UTMI Debug Status Register 1, offset: 0x74 */
-  __IO uint32_t DEBUG1_CLR;                        /**< UTMI Debug Status Register 1, offset: 0x78 */
-  __IO uint32_t DEBUG1_TOG;                        /**< UTMI Debug Status Register 1, offset: 0x7C */
-  __I  uint32_t VERSION;                           /**< UTMI RTL Version, offset: 0x80 */
+typedef struct
+{
+    __IO uint32_t PWD;      /**< USB PHY Power-Down Register, offset: 0x0 */
+    __IO uint32_t PWD_SET;  /**< USB PHY Power-Down Register, offset: 0x4 */
+    __IO uint32_t PWD_CLR;  /**< USB PHY Power-Down Register, offset: 0x8 */
+    __IO uint32_t PWD_TOG;  /**< USB PHY Power-Down Register, offset: 0xC */
+    __IO uint32_t TX;       /**< USB PHY Transmitter Control Register, offset: 0x10 */
+    __IO uint32_t TX_SET;   /**< USB PHY Transmitter Control Register, offset: 0x14 */
+    __IO uint32_t TX_CLR;   /**< USB PHY Transmitter Control Register, offset: 0x18 */
+    __IO uint32_t TX_TOG;   /**< USB PHY Transmitter Control Register, offset: 0x1C */
+    __IO uint32_t RX;       /**< USB PHY Receiver Control Register, offset: 0x20 */
+    __IO uint32_t RX_SET;   /**< USB PHY Receiver Control Register, offset: 0x24 */
+    __IO uint32_t RX_CLR;   /**< USB PHY Receiver Control Register, offset: 0x28 */
+    __IO uint32_t RX_TOG;   /**< USB PHY Receiver Control Register, offset: 0x2C */
+    __IO uint32_t CTRL;     /**< USB PHY General Control Register, offset: 0x30 */
+    __IO uint32_t CTRL_SET; /**< USB PHY General Control Register, offset: 0x34 */
+    __IO uint32_t CTRL_CLR; /**< USB PHY General Control Register, offset: 0x38 */
+    __IO uint32_t CTRL_TOG; /**< USB PHY General Control Register, offset: 0x3C */
+    __IO uint32_t STATUS;   /**< USB PHY Status Register, offset: 0x40 */
+    uint8_t RESERVED_0[12];
+    __IO uint32_t DEBUGr;       /**< USB PHY Debug Register, offset: 0x50 */
+    __IO uint32_t DEBUG_SET;    /**< USB PHY Debug Register, offset: 0x54 */
+    __IO uint32_t DEBUG_CLR;    /**< USB PHY Debug Register, offset: 0x58 */
+    __IO uint32_t DEBUG_TOG;    /**< USB PHY Debug Register, offset: 0x5C */
+    __I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */
+    uint8_t RESERVED_1[12];
+    __IO uint32_t DEBUG1;     /**< UTMI Debug Status Register 1, offset: 0x70 */
+    __IO uint32_t DEBUG1_SET; /**< UTMI Debug Status Register 1, offset: 0x74 */
+    __IO uint32_t DEBUG1_CLR; /**< UTMI Debug Status Register 1, offset: 0x78 */
+    __IO uint32_t DEBUG1_TOG; /**< UTMI Debug Status Register 1, offset: 0x7C */
+    __I uint32_t VERSION;     /**< UTMI RTL Version, offset: 0x80 */
 } USBPHY_Type;
 
 /* ----------------------------------------------------------------------------
@@ -23195,1068 +26284,1346 @@ typedef struct {
 
 /*! @name PWD - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_RSVD0_MASK                    (0x3FFU)
-#define USBPHY_PWD_RSVD0_SHIFT                   (0U)
-#define USBPHY_PWD_RSVD0(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD0_SHIFT)) & USBPHY_PWD_RSVD0_MASK)
-#define USBPHY_PWD_TXPWDFS_MASK                  (0x400U)
-#define USBPHY_PWD_TXPWDFS_SHIFT                 (10U)
-#define USBPHY_PWD_TXPWDFS(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
-#define USBPHY_PWD_TXPWDIBIAS_MASK               (0x800U)
-#define USBPHY_PWD_TXPWDIBIAS_SHIFT              (11U)
-#define USBPHY_PWD_TXPWDIBIAS(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_TXPWDV2I_MASK                 (0x1000U)
-#define USBPHY_PWD_TXPWDV2I_SHIFT                (12U)
-#define USBPHY_PWD_TXPWDV2I(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
-#define USBPHY_PWD_RSVD1_MASK                    (0x1E000U)
-#define USBPHY_PWD_RSVD1_SHIFT                   (13U)
-#define USBPHY_PWD_RSVD1(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD1_SHIFT)) & USBPHY_PWD_RSVD1_MASK)
-#define USBPHY_PWD_RXPWDENV_MASK                 (0x20000U)
-#define USBPHY_PWD_RXPWDENV_SHIFT                (17U)
-#define USBPHY_PWD_RXPWDENV(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
-#define USBPHY_PWD_RXPWD1PT1_MASK                (0x40000U)
-#define USBPHY_PWD_RXPWD1PT1_SHIFT               (18U)
-#define USBPHY_PWD_RXPWD1PT1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
-#define USBPHY_PWD_RXPWDDIFF_MASK                (0x80000U)
-#define USBPHY_PWD_RXPWDDIFF_SHIFT               (19U)
-#define USBPHY_PWD_RXPWDDIFF(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
-#define USBPHY_PWD_RXPWDRX_MASK                  (0x100000U)
-#define USBPHY_PWD_RXPWDRX_SHIFT                 (20U)
-#define USBPHY_PWD_RXPWDRX(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)
-#define USBPHY_PWD_RSVD2_MASK                    (0xFFE00000U)
-#define USBPHY_PWD_RSVD2_SHIFT                   (21U)
-#define USBPHY_PWD_RSVD2(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
+#define USBPHY_PWD_RSVD0_MASK       (0x3FFU)
+#define USBPHY_PWD_RSVD0_SHIFT      (0U)
+#define USBPHY_PWD_RSVD0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD0_SHIFT)) & USBPHY_PWD_RSVD0_MASK)
+#define USBPHY_PWD_TXPWDFS_MASK     (0x400U)
+#define USBPHY_PWD_TXPWDFS_SHIFT    (10U)
+#define USBPHY_PWD_TXPWDFS(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
+#define USBPHY_PWD_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_TXPWDIBIAS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_TXPWDV2I_MASK   (0x1000U)
+#define USBPHY_PWD_TXPWDV2I_SHIFT  (12U)
+#define USBPHY_PWD_TXPWDV2I(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
+#define USBPHY_PWD_RSVD1_MASK      (0x1E000U)
+#define USBPHY_PWD_RSVD1_SHIFT     (13U)
+#define USBPHY_PWD_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD1_SHIFT)) & USBPHY_PWD_RSVD1_MASK)
+#define USBPHY_PWD_RXPWDENV_MASK   (0x20000U)
+#define USBPHY_PWD_RXPWDENV_SHIFT  (17U)
+#define USBPHY_PWD_RXPWDENV(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
+#define USBPHY_PWD_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_RXPWD1PT1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
+#define USBPHY_PWD_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_RXPWDDIFF(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
+#define USBPHY_PWD_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_RXPWDRX(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)
+#define USBPHY_PWD_RSVD2_MASK    (0xFFE00000U)
+#define USBPHY_PWD_RSVD2_SHIFT   (21U)
+#define USBPHY_PWD_RSVD2(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_SET - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_SET_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_SET_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_SET_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD0_SHIFT)) & USBPHY_PWD_SET_RSVD0_MASK)
-#define USBPHY_PWD_SET_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_SET_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_SET_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
-#define USBPHY_PWD_SET_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_SET_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_SET_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_SET_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_SET_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_SET_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
-#define USBPHY_PWD_SET_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_SET_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_SET_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD1_SHIFT)) & USBPHY_PWD_SET_RSVD1_MASK)
-#define USBPHY_PWD_SET_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_SET_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_SET_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
-#define USBPHY_PWD_SET_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_SET_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_SET_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
-#define USBPHY_PWD_SET_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_SET_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_SET_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
-#define USBPHY_PWD_SET_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_SET_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_SET_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)
-#define USBPHY_PWD_SET_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_SET_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_SET_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD2_SHIFT)) & USBPHY_PWD_SET_RSVD2_MASK)
+#define USBPHY_PWD_SET_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_SET_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_SET_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD0_SHIFT)) & USBPHY_PWD_SET_RSVD0_MASK)
+#define USBPHY_PWD_SET_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_SET_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_SET_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
+#define USBPHY_PWD_SET_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_SET_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_SET_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_SET_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_SET_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_SET_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
+#define USBPHY_PWD_SET_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_SET_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_SET_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD1_SHIFT)) & USBPHY_PWD_SET_RSVD1_MASK)
+#define USBPHY_PWD_SET_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_SET_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_SET_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
+#define USBPHY_PWD_SET_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_SET_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_SET_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
+#define USBPHY_PWD_SET_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_SET_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_SET_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
+#define USBPHY_PWD_SET_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_SET_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_SET_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)
+#define USBPHY_PWD_SET_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_SET_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_SET_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RSVD2_SHIFT)) & USBPHY_PWD_SET_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_CLR - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_CLR_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_CLR_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_CLR_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
-#define USBPHY_PWD_CLR_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_CLR_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_CLR_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
-#define USBPHY_PWD_CLR_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_CLR_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_CLR_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_CLR_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_CLR_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
-#define USBPHY_PWD_CLR_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_CLR_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_CLR_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD1_SHIFT)) & USBPHY_PWD_CLR_RSVD1_MASK)
-#define USBPHY_PWD_CLR_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_CLR_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_CLR_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
-#define USBPHY_PWD_CLR_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_CLR_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_CLR_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
-#define USBPHY_PWD_CLR_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_CLR_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_CLR_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
-#define USBPHY_PWD_CLR_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_CLR_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_CLR_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)
-#define USBPHY_PWD_CLR_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_CLR_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_CLR_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD2_SHIFT)) & USBPHY_PWD_CLR_RSVD2_MASK)
+#define USBPHY_PWD_CLR_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_CLR_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_CLR_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
+#define USBPHY_PWD_CLR_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_CLR_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_CLR_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
+#define USBPHY_PWD_CLR_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_CLR_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_CLR_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_CLR_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_CLR_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
+#define USBPHY_PWD_CLR_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_CLR_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_CLR_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD1_SHIFT)) & USBPHY_PWD_CLR_RSVD1_MASK)
+#define USBPHY_PWD_CLR_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_CLR_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_CLR_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
+#define USBPHY_PWD_CLR_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_CLR_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_CLR_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
+#define USBPHY_PWD_CLR_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_CLR_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_CLR_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
+#define USBPHY_PWD_CLR_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_CLR_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_CLR_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)
+#define USBPHY_PWD_CLR_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_CLR_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_CLR_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD2_SHIFT)) & USBPHY_PWD_CLR_RSVD2_MASK)
 /*! @} */
 
 /*! @name PWD_TOG - USB PHY Power-Down Register */
 /*! @{ */
-#define USBPHY_PWD_TOG_RSVD0_MASK                (0x3FFU)
-#define USBPHY_PWD_TOG_RSVD0_SHIFT               (0U)
-#define USBPHY_PWD_TOG_RSVD0(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD0_SHIFT)) & USBPHY_PWD_TOG_RSVD0_MASK)
-#define USBPHY_PWD_TOG_TXPWDFS_MASK              (0x400U)
-#define USBPHY_PWD_TOG_TXPWDFS_SHIFT             (10U)
-#define USBPHY_PWD_TOG_TXPWDFS(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
-#define USBPHY_PWD_TOG_TXPWDIBIAS_MASK           (0x800U)
-#define USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT          (11U)
-#define USBPHY_PWD_TOG_TXPWDIBIAS(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
-#define USBPHY_PWD_TOG_TXPWDV2I_MASK             (0x1000U)
-#define USBPHY_PWD_TOG_TXPWDV2I_SHIFT            (12U)
-#define USBPHY_PWD_TOG_TXPWDV2I(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
-#define USBPHY_PWD_TOG_RSVD1_MASK                (0x1E000U)
-#define USBPHY_PWD_TOG_RSVD1_SHIFT               (13U)
-#define USBPHY_PWD_TOG_RSVD1(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD1_SHIFT)) & USBPHY_PWD_TOG_RSVD1_MASK)
-#define USBPHY_PWD_TOG_RXPWDENV_MASK             (0x20000U)
-#define USBPHY_PWD_TOG_RXPWDENV_SHIFT            (17U)
-#define USBPHY_PWD_TOG_RXPWDENV(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
-#define USBPHY_PWD_TOG_RXPWD1PT1_MASK            (0x40000U)
-#define USBPHY_PWD_TOG_RXPWD1PT1_SHIFT           (18U)
-#define USBPHY_PWD_TOG_RXPWD1PT1(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
-#define USBPHY_PWD_TOG_RXPWDDIFF_MASK            (0x80000U)
-#define USBPHY_PWD_TOG_RXPWDDIFF_SHIFT           (19U)
-#define USBPHY_PWD_TOG_RXPWDDIFF(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
-#define USBPHY_PWD_TOG_RXPWDRX_MASK              (0x100000U)
-#define USBPHY_PWD_TOG_RXPWDRX_SHIFT             (20U)
-#define USBPHY_PWD_TOG_RXPWDRX(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)
-#define USBPHY_PWD_TOG_RSVD2_MASK                (0xFFE00000U)
-#define USBPHY_PWD_TOG_RSVD2_SHIFT               (21U)
-#define USBPHY_PWD_TOG_RSVD2(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD2_SHIFT)) & USBPHY_PWD_TOG_RSVD2_MASK)
+#define USBPHY_PWD_TOG_RSVD0_MASK  (0x3FFU)
+#define USBPHY_PWD_TOG_RSVD0_SHIFT (0U)
+#define USBPHY_PWD_TOG_RSVD0(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD0_SHIFT)) & USBPHY_PWD_TOG_RSVD0_MASK)
+#define USBPHY_PWD_TOG_TXPWDFS_MASK  (0x400U)
+#define USBPHY_PWD_TOG_TXPWDFS_SHIFT (10U)
+#define USBPHY_PWD_TOG_TXPWDFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
+#define USBPHY_PWD_TOG_TXPWDIBIAS_MASK  (0x800U)
+#define USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT (11U)
+#define USBPHY_PWD_TOG_TXPWDIBIAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
+#define USBPHY_PWD_TOG_TXPWDV2I_MASK  (0x1000U)
+#define USBPHY_PWD_TOG_TXPWDV2I_SHIFT (12U)
+#define USBPHY_PWD_TOG_TXPWDV2I(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
+#define USBPHY_PWD_TOG_RSVD1_MASK  (0x1E000U)
+#define USBPHY_PWD_TOG_RSVD1_SHIFT (13U)
+#define USBPHY_PWD_TOG_RSVD1(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD1_SHIFT)) & USBPHY_PWD_TOG_RSVD1_MASK)
+#define USBPHY_PWD_TOG_RXPWDENV_MASK  (0x20000U)
+#define USBPHY_PWD_TOG_RXPWDENV_SHIFT (17U)
+#define USBPHY_PWD_TOG_RXPWDENV(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
+#define USBPHY_PWD_TOG_RXPWD1PT1_MASK  (0x40000U)
+#define USBPHY_PWD_TOG_RXPWD1PT1_SHIFT (18U)
+#define USBPHY_PWD_TOG_RXPWD1PT1(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
+#define USBPHY_PWD_TOG_RXPWDDIFF_MASK  (0x80000U)
+#define USBPHY_PWD_TOG_RXPWDDIFF_SHIFT (19U)
+#define USBPHY_PWD_TOG_RXPWDDIFF(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
+#define USBPHY_PWD_TOG_RXPWDRX_MASK  (0x100000U)
+#define USBPHY_PWD_TOG_RXPWDRX_SHIFT (20U)
+#define USBPHY_PWD_TOG_RXPWDRX(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)
+#define USBPHY_PWD_TOG_RSVD2_MASK  (0xFFE00000U)
+#define USBPHY_PWD_TOG_RSVD2_SHIFT (21U)
+#define USBPHY_PWD_TOG_RSVD2(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RSVD2_SHIFT)) & USBPHY_PWD_TOG_RSVD2_MASK)
 /*! @} */
 
 /*! @name TX - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_D_CAL_MASK                     (0xFU)
-#define USBPHY_TX_D_CAL_SHIFT                    (0U)
-#define USBPHY_TX_D_CAL(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
-#define USBPHY_TX_RSVD0_MASK                     (0xF0U)
-#define USBPHY_TX_RSVD0_SHIFT                    (4U)
-#define USBPHY_TX_RSVD0(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD0_SHIFT)) & USBPHY_TX_RSVD0_MASK)
-#define USBPHY_TX_TXCAL45DN_MASK                 (0xF00U)
-#define USBPHY_TX_TXCAL45DN_SHIFT                (8U)
-#define USBPHY_TX_TXCAL45DN(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DN_SHIFT)) & USBPHY_TX_TXCAL45DN_MASK)
-#define USBPHY_TX_RSVD1_MASK                     (0xF000U)
-#define USBPHY_TX_RSVD1_SHIFT                    (12U)
-#define USBPHY_TX_RSVD1(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD1_SHIFT)) & USBPHY_TX_RSVD1_MASK)
-#define USBPHY_TX_TXCAL45DP_MASK                 (0xF0000U)
-#define USBPHY_TX_TXCAL45DP_SHIFT                (16U)
-#define USBPHY_TX_TXCAL45DP(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
-#define USBPHY_TX_RSVD2_MASK                     (0x3F00000U)
-#define USBPHY_TX_RSVD2_SHIFT                    (20U)
-#define USBPHY_TX_RSVD2(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD2_SHIFT)) & USBPHY_TX_RSVD2_MASK)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL_MASK        (0x1C000000U)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT       (26U)
-#define USBPHY_TX_USBPHY_TX_EDGECTRL(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_RSVD5_MASK                     (0xE0000000U)
-#define USBPHY_TX_RSVD5_SHIFT                    (29U)
-#define USBPHY_TX_RSVD5(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD5_SHIFT)) & USBPHY_TX_RSVD5_MASK)
+#define USBPHY_TX_D_CAL_MASK               (0xFU)
+#define USBPHY_TX_D_CAL_SHIFT              (0U)
+#define USBPHY_TX_D_CAL(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
+#define USBPHY_TX_RSVD0_MASK               (0xF0U)
+#define USBPHY_TX_RSVD0_SHIFT              (4U)
+#define USBPHY_TX_RSVD0(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD0_SHIFT)) & USBPHY_TX_RSVD0_MASK)
+#define USBPHY_TX_TXCAL45DN_MASK           (0xF00U)
+#define USBPHY_TX_TXCAL45DN_SHIFT          (8U)
+#define USBPHY_TX_TXCAL45DN(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DN_SHIFT)) & USBPHY_TX_TXCAL45DN_MASK)
+#define USBPHY_TX_RSVD1_MASK               (0xF000U)
+#define USBPHY_TX_RSVD1_SHIFT              (12U)
+#define USBPHY_TX_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD1_SHIFT)) & USBPHY_TX_RSVD1_MASK)
+#define USBPHY_TX_TXCAL45DP_MASK           (0xF0000U)
+#define USBPHY_TX_TXCAL45DP_SHIFT          (16U)
+#define USBPHY_TX_TXCAL45DP(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
+#define USBPHY_TX_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD2_SHIFT)) & USBPHY_TX_RSVD2_MASK)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_USBPHY_TX_EDGECTRL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_RSVD5_SHIFT (29U)
+#define USBPHY_TX_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_RSVD5_SHIFT)) & USBPHY_TX_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_SET - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_SET_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_SET_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_SET_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
-#define USBPHY_TX_SET_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_SET_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_SET_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD0_SHIFT)) & USBPHY_TX_SET_RSVD0_MASK)
-#define USBPHY_TX_SET_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_SET_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_SET_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DN_SHIFT)) & USBPHY_TX_SET_TXCAL45DN_MASK)
-#define USBPHY_TX_SET_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_SET_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_SET_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD1_SHIFT)) & USBPHY_TX_SET_RSVD1_MASK)
-#define USBPHY_TX_SET_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_SET_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_SET_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
-#define USBPHY_TX_SET_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_SET_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_SET_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD2_SHIFT)) & USBPHY_TX_SET_RSVD2_MASK)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_SET_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_SET_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_SET_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD5_SHIFT)) & USBPHY_TX_SET_RSVD5_MASK)
+#define USBPHY_TX_SET_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_SET_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_SET_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
+#define USBPHY_TX_SET_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_SET_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_SET_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD0_SHIFT)) & USBPHY_TX_SET_RSVD0_MASK)
+#define USBPHY_TX_SET_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_SET_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_SET_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DN_SHIFT)) & USBPHY_TX_SET_TXCAL45DN_MASK)
+#define USBPHY_TX_SET_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_SET_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_SET_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD1_SHIFT)) & USBPHY_TX_SET_RSVD1_MASK)
+#define USBPHY_TX_SET_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_SET_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_SET_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
+#define USBPHY_TX_SET_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_SET_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_SET_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD2_SHIFT)) & USBPHY_TX_SET_RSVD2_MASK)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_SET_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_SET_RSVD5_SHIFT (29U)
+#define USBPHY_TX_SET_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_RSVD5_SHIFT)) & USBPHY_TX_SET_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_CLR - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_CLR_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_CLR_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_CLR_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
-#define USBPHY_TX_CLR_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_CLR_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_CLR_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD0_SHIFT)) & USBPHY_TX_CLR_RSVD0_MASK)
-#define USBPHY_TX_CLR_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_CLR_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_CLR_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DN_SHIFT)) & USBPHY_TX_CLR_TXCAL45DN_MASK)
-#define USBPHY_TX_CLR_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_CLR_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_CLR_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD1_SHIFT)) & USBPHY_TX_CLR_RSVD1_MASK)
-#define USBPHY_TX_CLR_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_CLR_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_CLR_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
-#define USBPHY_TX_CLR_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_CLR_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_CLR_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD2_SHIFT)) & USBPHY_TX_CLR_RSVD2_MASK)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_CLR_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_CLR_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_CLR_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD5_SHIFT)) & USBPHY_TX_CLR_RSVD5_MASK)
+#define USBPHY_TX_CLR_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_CLR_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_CLR_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
+#define USBPHY_TX_CLR_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_CLR_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_CLR_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD0_SHIFT)) & USBPHY_TX_CLR_RSVD0_MASK)
+#define USBPHY_TX_CLR_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_CLR_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_CLR_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DN_SHIFT)) & USBPHY_TX_CLR_TXCAL45DN_MASK)
+#define USBPHY_TX_CLR_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_CLR_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_CLR_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD1_SHIFT)) & USBPHY_TX_CLR_RSVD1_MASK)
+#define USBPHY_TX_CLR_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_CLR_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_CLR_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
+#define USBPHY_TX_CLR_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_CLR_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_CLR_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD2_SHIFT)) & USBPHY_TX_CLR_RSVD2_MASK)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_CLR_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_CLR_RSVD5_SHIFT (29U)
+#define USBPHY_TX_CLR_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_RSVD5_SHIFT)) & USBPHY_TX_CLR_RSVD5_MASK)
 /*! @} */
 
 /*! @name TX_TOG - USB PHY Transmitter Control Register */
 /*! @{ */
-#define USBPHY_TX_TOG_D_CAL_MASK                 (0xFU)
-#define USBPHY_TX_TOG_D_CAL_SHIFT                (0U)
-#define USBPHY_TX_TOG_D_CAL(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
-#define USBPHY_TX_TOG_RSVD0_MASK                 (0xF0U)
-#define USBPHY_TX_TOG_RSVD0_SHIFT                (4U)
-#define USBPHY_TX_TOG_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD0_SHIFT)) & USBPHY_TX_TOG_RSVD0_MASK)
-#define USBPHY_TX_TOG_TXCAL45DN_MASK             (0xF00U)
-#define USBPHY_TX_TOG_TXCAL45DN_SHIFT            (8U)
-#define USBPHY_TX_TOG_TXCAL45DN(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DN_SHIFT)) & USBPHY_TX_TOG_TXCAL45DN_MASK)
-#define USBPHY_TX_TOG_RSVD1_MASK                 (0xF000U)
-#define USBPHY_TX_TOG_RSVD1_SHIFT                (12U)
-#define USBPHY_TX_TOG_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD1_SHIFT)) & USBPHY_TX_TOG_RSVD1_MASK)
-#define USBPHY_TX_TOG_TXCAL45DP_MASK             (0xF0000U)
-#define USBPHY_TX_TOG_TXCAL45DP_SHIFT            (16U)
-#define USBPHY_TX_TOG_TXCAL45DP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
-#define USBPHY_TX_TOG_RSVD2_MASK                 (0x3F00000U)
-#define USBPHY_TX_TOG_RSVD2_SHIFT                (20U)
-#define USBPHY_TX_TOG_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD2_SHIFT)) & USBPHY_TX_TOG_RSVD2_MASK)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK    (0x1C000000U)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT   (26U)
-#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)
-#define USBPHY_TX_TOG_RSVD5_MASK                 (0xE0000000U)
-#define USBPHY_TX_TOG_RSVD5_SHIFT                (29U)
-#define USBPHY_TX_TOG_RSVD5(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD5_SHIFT)) & USBPHY_TX_TOG_RSVD5_MASK)
+#define USBPHY_TX_TOG_D_CAL_MASK      (0xFU)
+#define USBPHY_TX_TOG_D_CAL_SHIFT     (0U)
+#define USBPHY_TX_TOG_D_CAL(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
+#define USBPHY_TX_TOG_RSVD0_MASK      (0xF0U)
+#define USBPHY_TX_TOG_RSVD0_SHIFT     (4U)
+#define USBPHY_TX_TOG_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD0_SHIFT)) & USBPHY_TX_TOG_RSVD0_MASK)
+#define USBPHY_TX_TOG_TXCAL45DN_MASK  (0xF00U)
+#define USBPHY_TX_TOG_TXCAL45DN_SHIFT (8U)
+#define USBPHY_TX_TOG_TXCAL45DN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DN_SHIFT)) & USBPHY_TX_TOG_TXCAL45DN_MASK)
+#define USBPHY_TX_TOG_RSVD1_MASK      (0xF000U)
+#define USBPHY_TX_TOG_RSVD1_SHIFT     (12U)
+#define USBPHY_TX_TOG_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD1_SHIFT)) & USBPHY_TX_TOG_RSVD1_MASK)
+#define USBPHY_TX_TOG_TXCAL45DP_MASK  (0xF0000U)
+#define USBPHY_TX_TOG_TXCAL45DP_SHIFT (16U)
+#define USBPHY_TX_TOG_TXCAL45DP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
+#define USBPHY_TX_TOG_RSVD2_MASK               (0x3F00000U)
+#define USBPHY_TX_TOG_RSVD2_SHIFT              (20U)
+#define USBPHY_TX_TOG_RSVD2(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD2_SHIFT)) & USBPHY_TX_TOG_RSVD2_MASK)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK  (0x1C000000U)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT (26U)
+#define USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)
+#define USBPHY_TX_TOG_RSVD5_MASK  (0xE0000000U)
+#define USBPHY_TX_TOG_RSVD5_SHIFT (29U)
+#define USBPHY_TX_TOG_RSVD5(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_RSVD5_SHIFT)) & USBPHY_TX_TOG_RSVD5_MASK)
 /*! @} */
 
 /*! @name RX - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_ENVADJ_MASK                    (0x7U)
-#define USBPHY_RX_ENVADJ_SHIFT                   (0U)
-#define USBPHY_RX_ENVADJ(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
-#define USBPHY_RX_RSVD0_MASK                     (0x8U)
-#define USBPHY_RX_RSVD0_SHIFT                    (3U)
-#define USBPHY_RX_RSVD0(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD0_SHIFT)) & USBPHY_RX_RSVD0_MASK)
-#define USBPHY_RX_DISCONADJ_MASK                 (0x70U)
-#define USBPHY_RX_DISCONADJ_SHIFT                (4U)
-#define USBPHY_RX_DISCONADJ(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
-#define USBPHY_RX_RSVD1_MASK                     (0x3FFF80U)
-#define USBPHY_RX_RSVD1_SHIFT                    (7U)
-#define USBPHY_RX_RSVD1(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD1_SHIFT)) & USBPHY_RX_RSVD1_MASK)
-#define USBPHY_RX_RXDBYPASS_MASK                 (0x400000U)
-#define USBPHY_RX_RXDBYPASS_SHIFT                (22U)
-#define USBPHY_RX_RXDBYPASS(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)
-#define USBPHY_RX_RSVD2_MASK                     (0xFF800000U)
-#define USBPHY_RX_RSVD2_SHIFT                    (23U)
-#define USBPHY_RX_RSVD2(x)                       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD2_SHIFT)) & USBPHY_RX_RSVD2_MASK)
+#define USBPHY_RX_ENVADJ_MASK     (0x7U)
+#define USBPHY_RX_ENVADJ_SHIFT    (0U)
+#define USBPHY_RX_ENVADJ(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
+#define USBPHY_RX_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD0_SHIFT)) & USBPHY_RX_RSVD0_MASK)
+#define USBPHY_RX_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_DISCONADJ(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
+#define USBPHY_RX_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD1_SHIFT)) & USBPHY_RX_RSVD1_MASK)
+#define USBPHY_RX_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_RXDBYPASS(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)
+#define USBPHY_RX_RSVD2_MASK      (0xFF800000U)
+#define USBPHY_RX_RSVD2_SHIFT     (23U)
+#define USBPHY_RX_RSVD2(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RSVD2_SHIFT)) & USBPHY_RX_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_SET - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_SET_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_SET_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_SET_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
-#define USBPHY_RX_SET_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_SET_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_SET_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD0_SHIFT)) & USBPHY_RX_SET_RSVD0_MASK)
-#define USBPHY_RX_SET_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_SET_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_SET_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
-#define USBPHY_RX_SET_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_SET_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_SET_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD1_SHIFT)) & USBPHY_RX_SET_RSVD1_MASK)
-#define USBPHY_RX_SET_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_SET_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_SET_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)
-#define USBPHY_RX_SET_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_SET_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_SET_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD2_SHIFT)) & USBPHY_RX_SET_RSVD2_MASK)
+#define USBPHY_RX_SET_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_SET_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_SET_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
+#define USBPHY_RX_SET_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_SET_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_SET_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD0_SHIFT)) & USBPHY_RX_SET_RSVD0_MASK)
+#define USBPHY_RX_SET_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_SET_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_SET_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
+#define USBPHY_RX_SET_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_SET_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_SET_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD1_SHIFT)) & USBPHY_RX_SET_RSVD1_MASK)
+#define USBPHY_RX_SET_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_SET_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_SET_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)
+#define USBPHY_RX_SET_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_SET_RSVD2_SHIFT (23U)
+#define USBPHY_RX_SET_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RSVD2_SHIFT)) & USBPHY_RX_SET_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_CLR - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_CLR_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_CLR_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_CLR_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
-#define USBPHY_RX_CLR_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_CLR_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_CLR_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD0_SHIFT)) & USBPHY_RX_CLR_RSVD0_MASK)
-#define USBPHY_RX_CLR_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_CLR_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_CLR_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
-#define USBPHY_RX_CLR_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_CLR_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_CLR_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD1_SHIFT)) & USBPHY_RX_CLR_RSVD1_MASK)
-#define USBPHY_RX_CLR_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_CLR_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_CLR_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)
-#define USBPHY_RX_CLR_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_CLR_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_CLR_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD2_SHIFT)) & USBPHY_RX_CLR_RSVD2_MASK)
+#define USBPHY_RX_CLR_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_CLR_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_CLR_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
+#define USBPHY_RX_CLR_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_CLR_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_CLR_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD0_SHIFT)) & USBPHY_RX_CLR_RSVD0_MASK)
+#define USBPHY_RX_CLR_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_CLR_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_CLR_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
+#define USBPHY_RX_CLR_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_CLR_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_CLR_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD1_SHIFT)) & USBPHY_RX_CLR_RSVD1_MASK)
+#define USBPHY_RX_CLR_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_CLR_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_CLR_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)
+#define USBPHY_RX_CLR_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_CLR_RSVD2_SHIFT (23U)
+#define USBPHY_RX_CLR_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RSVD2_SHIFT)) & USBPHY_RX_CLR_RSVD2_MASK)
 /*! @} */
 
 /*! @name RX_TOG - USB PHY Receiver Control Register */
 /*! @{ */
-#define USBPHY_RX_TOG_ENVADJ_MASK                (0x7U)
-#define USBPHY_RX_TOG_ENVADJ_SHIFT               (0U)
-#define USBPHY_RX_TOG_ENVADJ(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
-#define USBPHY_RX_TOG_RSVD0_MASK                 (0x8U)
-#define USBPHY_RX_TOG_RSVD0_SHIFT                (3U)
-#define USBPHY_RX_TOG_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD0_SHIFT)) & USBPHY_RX_TOG_RSVD0_MASK)
-#define USBPHY_RX_TOG_DISCONADJ_MASK             (0x70U)
-#define USBPHY_RX_TOG_DISCONADJ_SHIFT            (4U)
-#define USBPHY_RX_TOG_DISCONADJ(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
-#define USBPHY_RX_TOG_RSVD1_MASK                 (0x3FFF80U)
-#define USBPHY_RX_TOG_RSVD1_SHIFT                (7U)
-#define USBPHY_RX_TOG_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD1_SHIFT)) & USBPHY_RX_TOG_RSVD1_MASK)
-#define USBPHY_RX_TOG_RXDBYPASS_MASK             (0x400000U)
-#define USBPHY_RX_TOG_RXDBYPASS_SHIFT            (22U)
-#define USBPHY_RX_TOG_RXDBYPASS(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)
-#define USBPHY_RX_TOG_RSVD2_MASK                 (0xFF800000U)
-#define USBPHY_RX_TOG_RSVD2_SHIFT                (23U)
-#define USBPHY_RX_TOG_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD2_SHIFT)) & USBPHY_RX_TOG_RSVD2_MASK)
+#define USBPHY_RX_TOG_ENVADJ_MASK  (0x7U)
+#define USBPHY_RX_TOG_ENVADJ_SHIFT (0U)
+#define USBPHY_RX_TOG_ENVADJ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
+#define USBPHY_RX_TOG_RSVD0_MASK      (0x8U)
+#define USBPHY_RX_TOG_RSVD0_SHIFT     (3U)
+#define USBPHY_RX_TOG_RSVD0(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD0_SHIFT)) & USBPHY_RX_TOG_RSVD0_MASK)
+#define USBPHY_RX_TOG_DISCONADJ_MASK  (0x70U)
+#define USBPHY_RX_TOG_DISCONADJ_SHIFT (4U)
+#define USBPHY_RX_TOG_DISCONADJ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
+#define USBPHY_RX_TOG_RSVD1_MASK      (0x3FFF80U)
+#define USBPHY_RX_TOG_RSVD1_SHIFT     (7U)
+#define USBPHY_RX_TOG_RSVD1(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD1_SHIFT)) & USBPHY_RX_TOG_RSVD1_MASK)
+#define USBPHY_RX_TOG_RXDBYPASS_MASK  (0x400000U)
+#define USBPHY_RX_TOG_RXDBYPASS_SHIFT (22U)
+#define USBPHY_RX_TOG_RXDBYPASS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)
+#define USBPHY_RX_TOG_RSVD2_MASK  (0xFF800000U)
+#define USBPHY_RX_TOG_RSVD2_SHIFT (23U)
+#define USBPHY_RX_TOG_RSVD2(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RSVD2_SHIFT)) & USBPHY_RX_TOG_RSVD2_MASK)
 /*! @} */
 
 /*! @name CTRL - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK        (0x1U)
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT       (0U)
-#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT_MASK      (0x2U)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT     (1U)
-#define USBPHY_CTRL_ENHOSTDISCONDETECT(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_ENIRQHOSTDISCON_MASK         (0x4U)
-#define USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT        (2U)
-#define USBPHY_CTRL_ENIRQHOSTDISCON(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK    (0x8U)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
-#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT_MASK       (0x10U)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT      (4U)
-#define USBPHY_CTRL_ENDEVPLUGINDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK      (0x20U)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT     (5U)
-#define USBPHY_CTRL_DEVPLUGIN_POLARITY(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK          (0x40U)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT         (6U)
-#define USBPHY_CTRL_OTG_ID_CHG_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_ENOTGIDDETECT_MASK           (0x80U)
-#define USBPHY_CTRL_ENOTGIDDETECT_SHIFT          (7U)
-#define USBPHY_CTRL_ENOTGIDDETECT(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_RESUMEIRQSTICKY_MASK         (0x100U)
-#define USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT        (8U)
-#define USBPHY_CTRL_RESUMEIRQSTICKY(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT_MASK       (0x200U)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT      (9U)
-#define USBPHY_CTRL_ENIRQRESUMEDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_RESUME_IRQ_MASK              (0x400U)
-#define USBPHY_CTRL_RESUME_IRQ_SHIFT             (10U)
-#define USBPHY_CTRL_RESUME_IRQ(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN_MASK          (0x800U)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT         (11U)
-#define USBPHY_CTRL_ENIRQDEVPLUGIN(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ_MASK           (0x1000U)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT          (12U)
-#define USBPHY_CTRL_DEVPLUGIN_IRQ(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_DATA_ON_LRADC_MASK           (0x2000U)
-#define USBPHY_CTRL_DATA_ON_LRADC_SHIFT          (13U)
-#define USBPHY_CTRL_DATA_ON_LRADC(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_ENUTMILEVEL2_MASK            (0x4000U)
-#define USBPHY_CTRL_ENUTMILEVEL2_SHIFT           (14U)
-#define USBPHY_CTRL_ENUTMILEVEL2(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_ENUTMILEVEL3_MASK            (0x8000U)
-#define USBPHY_CTRL_ENUTMILEVEL3_SHIFT           (15U)
-#define USBPHY_CTRL_ENUTMILEVEL3(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_ENIRQWAKEUP_MASK             (0x10000U)
-#define USBPHY_CTRL_ENIRQWAKEUP_SHIFT            (16U)
-#define USBPHY_CTRL_ENIRQWAKEUP(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_WAKEUP_IRQ_MASK              (0x20000U)
-#define USBPHY_CTRL_WAKEUP_IRQ_SHIFT             (17U)
-#define USBPHY_CTRL_WAKEUP_IRQ(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK        (0x40000U)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT       (18U)
-#define USBPHY_CTRL_ENAUTO_PWRON_PLL(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK       (0x80000U)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT      (19U)
-#define USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK       (0x100000U)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT      (20U)
-#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP_MASK          (0x200000U)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT         (21U)
-#define USBPHY_CTRL_ENDPDMCHG_WKUP(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_ENIDCHG_WKUP_MASK            (0x400000U)
-#define USBPHY_CTRL_ENIDCHG_WKUP_SHIFT           (22U)
-#define USBPHY_CTRL_ENIDCHG_WKUP(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP_MASK          (0x800000U)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT         (23U)
-#define USBPHY_CTRL_ENVBUSCHG_WKUP(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_FSDLL_RST_EN_MASK            (0x1000000U)
-#define USBPHY_CTRL_FSDLL_RST_EN_SHIFT           (24U)
-#define USBPHY_CTRL_FSDLL_RST_EN(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_RSVD1_MASK                   (0x6000000U)
-#define USBPHY_CTRL_RSVD1_SHIFT                  (25U)
-#define USBPHY_CTRL_RSVD1(x)                     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RSVD1_SHIFT)) & USBPHY_CTRL_RSVD1_MASK)
-#define USBPHY_CTRL_OTG_ID_VALUE_MASK            (0x8000000U)
-#define USBPHY_CTRL_OTG_ID_VALUE_SHIFT           (27U)
-#define USBPHY_CTRL_OTG_ID_VALUE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK       (0x10000000U)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT      (28U)
-#define USBPHY_CTRL_HOST_FORCE_LS_SE0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_UTMI_SUSPENDM_MASK           (0x20000000U)
-#define USBPHY_CTRL_UTMI_SUSPENDM_SHIFT          (29U)
-#define USBPHY_CTRL_UTMI_SUSPENDM(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_CLKGATE_MASK                 (0x40000000U)
-#define USBPHY_CTRL_CLKGATE_SHIFT                (30U)
-#define USBPHY_CTRL_CLKGATE(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
-#define USBPHY_CTRL_SFTRST_MASK                  (0x80000000U)
-#define USBPHY_CTRL_SFTRST_SHIFT                 (31U)
-#define USBPHY_CTRL_SFTRST(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_ENOTG_ID_CHG_IRQ(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT_MASK  (0x2U)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT (1U)
+#define USBPHY_CTRL_ENHOSTDISCONDETECT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_ENIRQHOSTDISCON(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT (3U)
+#define USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_ENDEVPLUGINDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK  (0x20U)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT (5U)
+#define USBPHY_CTRL_DEVPLUGIN_POLARITY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_OTG_ID_CHG_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_ENOTGIDDETECT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_RESUMEIRQSTICKY(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_ENIRQRESUMEDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_RESUME_IRQ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_ENIRQDEVPLUGIN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_DEVPLUGIN_IRQ(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_DATA_ON_LRADC(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_ENUTMILEVEL2(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_ENUTMILEVEL3(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_ENIRQWAKEUP(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_WAKEUP_IRQ(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_ENAUTO_PWRON_PLL(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_ENDPDMCHG_WKUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_ENIDCHG_WKUP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_ENVBUSCHG_WKUP(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_FSDLL_RST_EN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_RSVD1_MASK         (0x6000000U)
+#define USBPHY_CTRL_RSVD1_SHIFT        (25U)
+#define USBPHY_CTRL_RSVD1(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_RSVD1_SHIFT)) & USBPHY_CTRL_RSVD1_MASK)
+#define USBPHY_CTRL_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_OTG_ID_VALUE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_HOST_FORCE_LS_SE0(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_UTMI_SUSPENDM(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_CLKGATE(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
+#define USBPHY_CTRL_SFTRST_MASK   (0x80000000U)
+#define USBPHY_CTRL_SFTRST_SHIFT  (31U)
+#define USBPHY_CTRL_SFTRST(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_SET - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_SET_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_SET_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_SET_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_SET_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_SET_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_SET_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_SET_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_SET_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_SET_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_SET_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_SET_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_SET_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_SET_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_SET_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_SET_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_SET_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_SET_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_SET_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_SET_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RSVD1_SHIFT)) & USBPHY_CTRL_SET_RSVD1_MASK)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_SET_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_SET_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_SET_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_SET_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_SET_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
-#define USBPHY_CTRL_SET_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_SET_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_SET_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)
+#define USBPHY_CTRL_SET_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_SET_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_SET_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_SET_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_SET_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_SET_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_SET_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_SET_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_SET_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_SET_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_SET_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_SET_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_SET_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_SET_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_SET_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_SET_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_SET_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_SET_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_SET_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_SET_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_SET_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_SET_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_SET_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_SET_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_SET_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_SET_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_SET_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_SET_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_SET_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_SET_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_SET_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_SET_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_RSVD1_SHIFT)) & USBPHY_CTRL_SET_RSVD1_MASK)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_SET_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_SET_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_SET_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_SET_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_SET_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
+#define USBPHY_CTRL_SET_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_SET_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_SET_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_CLR - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_CLR_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_CLR_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_CLR_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_CLR_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_CLR_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_CLR_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_CLR_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_CLR_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_CLR_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_CLR_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_CLR_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_CLR_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_CLR_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_CLR_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_CLR_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RSVD1_SHIFT)) & USBPHY_CTRL_CLR_RSVD1_MASK)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_CLR_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_CLR_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_CLR_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_CLR_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
-#define USBPHY_CTRL_CLR_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_CLR_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_CLR_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_CLR_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_CLR_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_CLR_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_CLR_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_CLR_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_CLR_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_CLR_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_CLR_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_CLR_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_CLR_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_CLR_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_CLR_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_CLR_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_CLR_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_CLR_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_CLR_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_CLR_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_CLR_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_CLR_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_CLR_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_CLR_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_CLR_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_CLR_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_CLR_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_CLR_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_CLR_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_RSVD1_SHIFT)) & USBPHY_CTRL_CLR_RSVD1_MASK)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_CLR_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_CLR_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_CLR_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_CLR_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
+#define USBPHY_CTRL_CLR_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_CLR_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_CLR_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)
 /*! @} */
 
 /*! @name CTRL_TOG - USB PHY General Control Register */
 /*! @{ */
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK    (0x1U)
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT   (0U)
-#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK  (0x1U)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT (0U)
+#define USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_ENOTG_ID_CHG_IRQ_MASK)
 #define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK  (0x2U)
 #define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT (1U)
-#define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK     (0x4U)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT    (2U)
-#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK)
-#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK (0x8U)
+#define USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) &                                       \
+     USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK  (0x4U)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT (2U)
+#define USBPHY_CTRL_TOG_ENIRQHOSTDISCON(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQHOSTDISCON_SHIFT)) & USBPHY_CTRL_TOG_ENIRQHOSTDISCON_MASK)
+#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK  (0x8U)
 #define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT (3U)
-#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)  (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK   (0x10U)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT  (4U)
-#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK)
+#define USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) &                                     \
+     USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK  (0x10U)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT (4U)
+#define USBPHY_CTRL_TOG_ENDEVPLUGINDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDETECT_MASK)
 #define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK  (0x20U)
 #define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT (5U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK      (0x40U)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT     (6U)
-#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK       (0x80U)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT      (7U)
-#define USBPHY_CTRL_TOG_ENOTGIDDETECT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK     (0x100U)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT    (8U)
-#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK   (0x200U)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT  (9U)
-#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK)
-#define USBPHY_CTRL_TOG_RESUME_IRQ_MASK          (0x400U)
-#define USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT         (10U)
-#define USBPHY_CTRL_TOG_RESUME_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK      (0x800U)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT     (11U)
-#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK       (0x1000U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT      (12U)
-#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK       (0x2000U)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT      (13U)
-#define USBPHY_CTRL_TOG_DATA_ON_LRADC(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK        (0x4000U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT       (14U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL2(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK        (0x8000U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT       (15U)
-#define USBPHY_CTRL_TOG_ENUTMILEVEL3(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK         (0x10000U)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT        (16U)
-#define USBPHY_CTRL_TOG_ENIRQWAKEUP(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK          (0x20000U)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT         (17U)
-#define USBPHY_CTRL_TOG_WAKEUP_IRQ(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK    (0x40000U)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT   (18U)
-#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL(x)      (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT  (19U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT  (20U)
-#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK      (0x200000U)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT     (21U)
-#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK        (0x400000U)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT       (22U)
-#define USBPHY_CTRL_TOG_ENIDCHG_WKUP(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK      (0x800000U)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT     (23U)
-#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK        (0x1000000U)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT       (24U)
-#define USBPHY_CTRL_TOG_FSDLL_RST_EN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
-#define USBPHY_CTRL_TOG_RSVD1_MASK               (0x6000000U)
-#define USBPHY_CTRL_TOG_RSVD1_SHIFT              (25U)
-#define USBPHY_CTRL_TOG_RSVD1(x)                 (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RSVD1_SHIFT)) & USBPHY_CTRL_TOG_RSVD1_MASK)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK        (0x8000000U)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT       (27U)
-#define USBPHY_CTRL_TOG_OTG_ID_VALUE(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT  (28U)
-#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK       (0x20000000U)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT      (29U)
-#define USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
-#define USBPHY_CTRL_TOG_CLKGATE_MASK             (0x40000000U)
-#define USBPHY_CTRL_TOG_CLKGATE_SHIFT            (30U)
-#define USBPHY_CTRL_TOG_CLKGATE(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
-#define USBPHY_CTRL_TOG_SFTRST_MASK              (0x80000000U)
-#define USBPHY_CTRL_TOG_SFTRST_SHIFT             (31U)
-#define USBPHY_CTRL_TOG_SFTRST(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_SHIFT)) &                                       \
+     USBPHY_CTRL_TOG_DEVPLUGIN_POLARITY_MASK)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK  (0x40U)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT (6U)
+#define USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_CHG_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK  (0x80U)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT (7U)
+#define USBPHY_CTRL_TOG_ENOTGIDDETECT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENOTGIDDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENOTGIDDETECT_MASK)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK  (0x100U)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT (8U)
+#define USBPHY_CTRL_TOG_RESUMEIRQSTICKY(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUMEIRQSTICKY_SHIFT)) & USBPHY_CTRL_TOG_RESUMEIRQSTICKY_MASK)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK  (0x200U)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT (9U)
+#define USBPHY_CTRL_TOG_ENIRQRESUMEDETECT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENIRQRESUMEDETECT_MASK)
+#define USBPHY_CTRL_TOG_RESUME_IRQ_MASK  (0x400U)
+#define USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT (10U)
+#define USBPHY_CTRL_TOG_RESUME_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RESUME_IRQ_SHIFT)) & USBPHY_CTRL_TOG_RESUME_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK  (0x800U)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT (11U)
+#define USBPHY_CTRL_TOG_ENIRQDEVPLUGIN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_SHIFT)) & USBPHY_CTRL_TOG_ENIRQDEVPLUGIN_MASK)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK  (0x1000U)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT (12U)
+#define USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK  (0x2000U)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT (13U)
+#define USBPHY_CTRL_TOG_DATA_ON_LRADC(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DATA_ON_LRADC_SHIFT)) & USBPHY_CTRL_TOG_DATA_ON_LRADC_MASK)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK  (0x4000U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT (14U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL2(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK  (0x8000U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT (15U)
+#define USBPHY_CTRL_TOG_ENUTMILEVEL3(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK  (0x10000U)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT (16U)
+#define USBPHY_CTRL_TOG_ENIRQWAKEUP(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIRQWAKEUP_SHIFT)) & USBPHY_CTRL_TOG_ENIRQWAKEUP_MASK)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK  (0x20000U)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT (17U)
+#define USBPHY_CTRL_TOG_WAKEUP_IRQ(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_WAKEUP_IRQ_SHIFT)) & USBPHY_CTRL_TOG_WAKEUP_IRQ_MASK)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK  (0x40000U)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT (18U)
+#define USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_SHIFT)) & USBPHY_CTRL_TOG_ENAUTO_PWRON_PLL_MASK)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK  (0x80000U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT (19U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK  (0x100000U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT (20U)
+#define USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK  (0x200000U)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT (21U)
+#define USBPHY_CTRL_TOG_ENDPDMCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENDPDMCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK  (0x400000U)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT (22U)
+#define USBPHY_CTRL_TOG_ENIDCHG_WKUP(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENIDCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENIDCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK  (0x800000U)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT (23U)
+#define USBPHY_CTRL_TOG_ENVBUSCHG_WKUP(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_SHIFT)) & USBPHY_CTRL_TOG_ENVBUSCHG_WKUP_MASK)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK  (0x1000000U)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT (24U)
+#define USBPHY_CTRL_TOG_FSDLL_RST_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
+#define USBPHY_CTRL_TOG_RSVD1_MASK  (0x6000000U)
+#define USBPHY_CTRL_TOG_RSVD1_SHIFT (25U)
+#define USBPHY_CTRL_TOG_RSVD1(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_RSVD1_SHIFT)) & USBPHY_CTRL_TOG_RSVD1_MASK)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK  (0x8000000U)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT (27U)
+#define USBPHY_CTRL_TOG_OTG_ID_VALUE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK  (0x10000000U)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT (28U)
+#define USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK  (0x20000000U)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT (29U)
+#define USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
+#define USBPHY_CTRL_TOG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_CTRL_TOG_CLKGATE_SHIFT (30U)
+#define USBPHY_CTRL_TOG_CLKGATE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
+#define USBPHY_CTRL_TOG_SFTRST_MASK  (0x80000000U)
+#define USBPHY_CTRL_TOG_SFTRST_SHIFT (31U)
+#define USBPHY_CTRL_TOG_SFTRST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)
 /*! @} */
 
 /*! @name STATUS - USB PHY Status Register */
 /*! @{ */
-#define USBPHY_STATUS_RSVD0_MASK                 (0x7U)
-#define USBPHY_STATUS_RSVD0_SHIFT                (0U)
-#define USBPHY_STATUS_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD0_SHIFT)) & USBPHY_STATUS_RSVD0_MASK)
-#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK (0x8U)
+#define USBPHY_STATUS_RSVD0_MASK                    (0x7U)
+#define USBPHY_STATUS_RSVD0_SHIFT                   (0U)
+#define USBPHY_STATUS_RSVD0(x)                      (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD0_SHIFT)) & USBPHY_STATUS_RSVD0_MASK)
+#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK  (0x8U)
 #define USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT (3U)
-#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
-#define USBPHY_STATUS_RSVD1_MASK                 (0x30U)
-#define USBPHY_STATUS_RSVD1_SHIFT                (4U)
-#define USBPHY_STATUS_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD1_SHIFT)) & USBPHY_STATUS_RSVD1_MASK)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS_MASK      (0x40U)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT     (6U)
-#define USBPHY_STATUS_DEVPLUGIN_STATUS(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
-#define USBPHY_STATUS_RSVD2_MASK                 (0x80U)
-#define USBPHY_STATUS_RSVD2_SHIFT                (7U)
-#define USBPHY_STATUS_RSVD2(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD2_SHIFT)) & USBPHY_STATUS_RSVD2_MASK)
-#define USBPHY_STATUS_OTGID_STATUS_MASK          (0x100U)
-#define USBPHY_STATUS_OTGID_STATUS_SHIFT         (8U)
-#define USBPHY_STATUS_OTGID_STATUS(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
-#define USBPHY_STATUS_RSVD3_MASK                 (0x200U)
-#define USBPHY_STATUS_RSVD3_SHIFT                (9U)
-#define USBPHY_STATUS_RSVD3(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD3_SHIFT)) & USBPHY_STATUS_RSVD3_MASK)
-#define USBPHY_STATUS_RESUME_STATUS_MASK         (0x400U)
-#define USBPHY_STATUS_RESUME_STATUS_SHIFT        (10U)
-#define USBPHY_STATUS_RESUME_STATUS(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)
-#define USBPHY_STATUS_RSVD4_MASK                 (0xFFFFF800U)
-#define USBPHY_STATUS_RSVD4_SHIFT                (11U)
-#define USBPHY_STATUS_RSVD4(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD4_SHIFT)) & USBPHY_STATUS_RSVD4_MASK)
+#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) &                                    \
+     USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
+#define USBPHY_STATUS_RSVD1_MASK             (0x30U)
+#define USBPHY_STATUS_RSVD1_SHIFT            (4U)
+#define USBPHY_STATUS_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD1_SHIFT)) & USBPHY_STATUS_RSVD1_MASK)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS_MASK  (0x40U)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT (6U)
+#define USBPHY_STATUS_DEVPLUGIN_STATUS(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
+#define USBPHY_STATUS_RSVD2_MASK         (0x80U)
+#define USBPHY_STATUS_RSVD2_SHIFT        (7U)
+#define USBPHY_STATUS_RSVD2(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD2_SHIFT)) & USBPHY_STATUS_RSVD2_MASK)
+#define USBPHY_STATUS_OTGID_STATUS_MASK  (0x100U)
+#define USBPHY_STATUS_OTGID_STATUS_SHIFT (8U)
+#define USBPHY_STATUS_OTGID_STATUS(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
+#define USBPHY_STATUS_RSVD3_MASK          (0x200U)
+#define USBPHY_STATUS_RSVD3_SHIFT         (9U)
+#define USBPHY_STATUS_RSVD3(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD3_SHIFT)) & USBPHY_STATUS_RSVD3_MASK)
+#define USBPHY_STATUS_RESUME_STATUS_MASK  (0x400U)
+#define USBPHY_STATUS_RESUME_STATUS_SHIFT (10U)
+#define USBPHY_STATUS_RESUME_STATUS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)
+#define USBPHY_STATUS_RSVD4_MASK  (0xFFFFF800U)
+#define USBPHY_STATUS_RSVD4_SHIFT (11U)
+#define USBPHY_STATUS_RSVD4(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RSVD4_SHIFT)) & USBPHY_STATUS_RSVD4_MASK)
 /*! @} */
 
 /*! @name DEBUG - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_OTGIDPIOLOCK_MASK           (0x1U)
-#define USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT          (0U)
-#define USBPHY_DEBUG_OTGIDPIOLOCK(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT  (1U)
-#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_HSTPULLDOWN_MASK            (0xCU)
-#define USBPHY_DEBUG_HSTPULLDOWN_SHIFT           (2U)
-#define USBPHY_DEBUG_HSTPULLDOWN(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_ENHSTPULLDOWN_MASK          (0x30U)
-#define USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT         (4U)
-#define USBPHY_DEBUG_ENHSTPULLDOWN(x)            (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_RSVD0_MASK                  (0xC0U)
-#define USBPHY_DEBUG_RSVD0_SHIFT                 (6U)
-#define USBPHY_DEBUG_RSVD0(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD0_SHIFT)) & USBPHY_DEBUG_RSVD0_MASK)
-#define USBPHY_DEBUG_TX2RXCOUNT_MASK             (0xF00U)
-#define USBPHY_DEBUG_TX2RXCOUNT_SHIFT            (8U)
-#define USBPHY_DEBUG_TX2RXCOUNT(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_ENTX2RXCOUNT_MASK           (0x1000U)
-#define USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT          (12U)
-#define USBPHY_DEBUG_ENTX2RXCOUNT(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_RSVD1_MASK                  (0xE000U)
-#define USBPHY_DEBUG_RSVD1_SHIFT                 (13U)
-#define USBPHY_DEBUG_RSVD1(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD1_SHIFT)) & USBPHY_DEBUG_RSVD1_MASK)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK      (0x1F0000U)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT     (16U)
-#define USBPHY_DEBUG_SQUELCHRESETCOUNT(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_RSVD2_MASK                  (0xE00000U)
-#define USBPHY_DEBUG_RSVD2_SHIFT                 (21U)
-#define USBPHY_DEBUG_RSVD2(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD2_SHIFT)) & USBPHY_DEBUG_RSVD2_MASK)
-#define USBPHY_DEBUG_ENSQUELCHRESET_MASK         (0x1000000U)
-#define USBPHY_DEBUG_ENSQUELCHRESET_SHIFT        (24U)
-#define USBPHY_DEBUG_ENSQUELCHRESET(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK     (0x1E000000U)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT    (25U)
-#define USBPHY_DEBUG_SQUELCHRESETLENGTH(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK      (0x20000000U)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT     (29U)
-#define USBPHY_DEBUG_HOST_RESUME_DEBUG(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_CLKGATE_MASK                (0x40000000U)
-#define USBPHY_DEBUG_CLKGATE_SHIFT               (30U)
-#define USBPHY_DEBUG_CLKGATE(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)
-#define USBPHY_DEBUG_RSVD3_MASK                  (0x80000000U)
-#define USBPHY_DEBUG_RSVD3_SHIFT                 (31U)
-#define USBPHY_DEBUG_RSVD3(x)                    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD3_SHIFT)) & USBPHY_DEBUG_RSVD3_MASK)
+#define USBPHY_DEBUG_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_OTGIDPIOLOCK(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT (1U)
+#define USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_HSTPULLDOWN(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_ENHSTPULLDOWN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_RSVD0_MASK       (0xC0U)
+#define USBPHY_DEBUG_RSVD0_SHIFT      (6U)
+#define USBPHY_DEBUG_RSVD0(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD0_SHIFT)) & USBPHY_DEBUG_RSVD0_MASK)
+#define USBPHY_DEBUG_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_TX2RXCOUNT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_ENTX2RXCOUNT(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_RSVD1_MASK              (0xE000U)
+#define USBPHY_DEBUG_RSVD1_SHIFT             (13U)
+#define USBPHY_DEBUG_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD1_SHIFT)) & USBPHY_DEBUG_RSVD1_MASK)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT (16U)
+#define USBPHY_DEBUG_SQUELCHRESETCOUNT(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_RSVD2_MASK           (0xE00000U)
+#define USBPHY_DEBUG_RSVD2_SHIFT          (21U)
+#define USBPHY_DEBUG_RSVD2(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD2_SHIFT)) & USBPHY_DEBUG_RSVD2_MASK)
+#define USBPHY_DEBUG_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_ENSQUELCHRESET(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT (25U)
+#define USBPHY_DEBUG_SQUELCHRESETLENGTH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK  (0x20000000U)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT (29U)
+#define USBPHY_DEBUG_HOST_RESUME_DEBUG(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_CLKGATE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)
+#define USBPHY_DEBUG_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_RSVD3(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_RSVD3_SHIFT)) & USBPHY_DEBUG_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_SET - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_SET_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_SET_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_SET_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_SET_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD0_SHIFT)) & USBPHY_DEBUG_SET_RSVD0_MASK)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_SET_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_SET_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_SET_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_SET_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD1_SHIFT)) & USBPHY_DEBUG_SET_RSVD1_MASK)
+#define USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_SET_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_SET_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_SET_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_SET_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD0_SHIFT)) & USBPHY_DEBUG_SET_RSVD0_MASK)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_SET_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_SET_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_SET_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_SET_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD1_SHIFT)) & USBPHY_DEBUG_SET_RSVD1_MASK)
 #define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_SET_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_SET_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_SET_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD2_SHIFT)) & USBPHY_DEBUG_SET_RSVD2_MASK)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_SET_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_SET_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_SET_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_SET_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD2_SHIFT)) & USBPHY_DEBUG_SET_RSVD2_MASK)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_SET_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_SET_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_SET_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_SET_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)
-#define USBPHY_DEBUG_SET_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_SET_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_SET_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD3_SHIFT)) & USBPHY_DEBUG_SET_RSVD3_MASK)
+#define USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_SET_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_SET_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_SET_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)
+#define USBPHY_DEBUG_SET_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_SET_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_SET_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_RSVD3_SHIFT)) & USBPHY_DEBUG_SET_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_CLR - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_CLR_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_CLR_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_CLR_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_CLR_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG_CLR_RSVD0_MASK)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_CLR_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_CLR_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_CLR_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG_CLR_RSVD1_MASK)
+#define USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_CLR_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_CLR_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_CLR_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_CLR_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG_CLR_RSVD0_MASK)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_CLR_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_CLR_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_CLR_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG_CLR_RSVD1_MASK)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_CLR_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_CLR_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_CLR_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD2_SHIFT)) & USBPHY_DEBUG_CLR_RSVD2_MASK)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_CLR_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_CLR_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_CLR_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD2_SHIFT)) & USBPHY_DEBUG_CLR_RSVD2_MASK)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_CLR_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_CLR_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_CLR_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)
-#define USBPHY_DEBUG_CLR_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_CLR_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_CLR_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD3_SHIFT)) & USBPHY_DEBUG_CLR_RSVD3_MASK)
+#define USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_CLR_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_CLR_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_CLR_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)
+#define USBPHY_DEBUG_CLR_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_CLR_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_CLR_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_RSVD3_SHIFT)) & USBPHY_DEBUG_CLR_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG_TOG - USB PHY Debug Register */
 /*! @{ */
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK       (0x1U)
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT      (0U)
-#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
-#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK (0x2U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK  (0x1U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT (0U)
+#define USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
+#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK  (0x2U)
 #define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT (1U)
-#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK        (0xCU)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT       (2U)
-#define USBPHY_DEBUG_TOG_HSTPULLDOWN(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK      (0x30U)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT     (4U)
-#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)        (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
-#define USBPHY_DEBUG_TOG_RSVD0_MASK              (0xC0U)
-#define USBPHY_DEBUG_TOG_RSVD0_SHIFT             (6U)
-#define USBPHY_DEBUG_TOG_RSVD0(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG_TOG_RSVD0_MASK)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK         (0xF00U)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT        (8U)
-#define USBPHY_DEBUG_TOG_TX2RXCOUNT(x)           (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK       (0x1000U)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT      (12U)
-#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_RSVD1_MASK              (0xE000U)
-#define USBPHY_DEBUG_TOG_RSVD1_SHIFT             (13U)
-#define USBPHY_DEBUG_TOG_RSVD1(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG_TOG_RSVD1_MASK)
+#define USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) &                                    \
+     USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK  (0xCU)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT (2U)
+#define USBPHY_DEBUG_TOG_HSTPULLDOWN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK  (0x30U)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT (4U)
+#define USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
+#define USBPHY_DEBUG_TOG_RSVD0_MASK  (0xC0U)
+#define USBPHY_DEBUG_TOG_RSVD0_SHIFT (6U)
+#define USBPHY_DEBUG_TOG_RSVD0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG_TOG_RSVD0_MASK)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK  (0xF00U)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT (8U)
+#define USBPHY_DEBUG_TOG_TX2RXCOUNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK  (0x1000U)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT (12U)
+#define USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_RSVD1_MASK  (0xE000U)
+#define USBPHY_DEBUG_TOG_RSVD1_SHIFT (13U)
+#define USBPHY_DEBUG_TOG_RSVD1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG_TOG_RSVD1_MASK)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK  (0x1F0000U)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT (16U)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
-#define USBPHY_DEBUG_TOG_RSVD2_MASK              (0xE00000U)
-#define USBPHY_DEBUG_TOG_RSVD2_SHIFT             (21U)
-#define USBPHY_DEBUG_TOG_RSVD2(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD2_SHIFT)) & USBPHY_DEBUG_TOG_RSVD2_MASK)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK     (0x1000000U)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT    (24U)
-#define USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)       (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK (0x1E000000U)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
+#define USBPHY_DEBUG_TOG_RSVD2_MASK  (0xE00000U)
+#define USBPHY_DEBUG_TOG_RSVD2_SHIFT (21U)
+#define USBPHY_DEBUG_TOG_RSVD2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD2_SHIFT)) & USBPHY_DEBUG_TOG_RSVD2_MASK)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK  (0x1000000U)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT (24U)
+#define USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK  (0x1E000000U)
 #define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT (25U)
-#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
+#define USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) &                                      \
+     USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
 #define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK  (0x20000000U)
 #define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT (29U)
-#define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
-#define USBPHY_DEBUG_TOG_CLKGATE_MASK            (0x40000000U)
-#define USBPHY_DEBUG_TOG_CLKGATE_SHIFT           (30U)
-#define USBPHY_DEBUG_TOG_CLKGATE(x)              (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)
-#define USBPHY_DEBUG_TOG_RSVD3_MASK              (0x80000000U)
-#define USBPHY_DEBUG_TOG_RSVD3_SHIFT             (31U)
-#define USBPHY_DEBUG_TOG_RSVD3(x)                (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD3_SHIFT)) & USBPHY_DEBUG_TOG_RSVD3_MASK)
+#define USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) &                                       \
+     USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
+#define USBPHY_DEBUG_TOG_CLKGATE_MASK  (0x40000000U)
+#define USBPHY_DEBUG_TOG_CLKGATE_SHIFT (30U)
+#define USBPHY_DEBUG_TOG_CLKGATE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)
+#define USBPHY_DEBUG_TOG_RSVD3_MASK  (0x80000000U)
+#define USBPHY_DEBUG_TOG_RSVD3_SHIFT (31U)
+#define USBPHY_DEBUG_TOG_RSVD3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_RSVD3_SHIFT)) & USBPHY_DEBUG_TOG_RSVD3_MASK)
 /*! @} */
 
 /*! @name DEBUG0_STATUS - UTMI Debug Status Register 0 */
 /*! @{ */
-#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK (0xFFFFU)
+#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK  (0xFFFFU)
 #define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT (0U)
-#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
-#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK (0x3FF0000U)
+#define USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) &                                \
+     USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK  (0x3FF0000U)
 #define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT (16U)
-#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x) (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) &                             \
+     USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
 #define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK  (0xFC000000U)
 #define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT (26U)
-#define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)
+#define USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) &                                       \
+     USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)
 /*! @} */
 
 /*! @name DEBUG1 - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_RSVD0_MASK                 (0x1FFFU)
-#define USBPHY_DEBUG1_RSVD0_SHIFT                (0U)
-#define USBPHY_DEBUG1_RSVD0(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD0_SHIFT)) & USBPHY_DEBUG1_RSVD0_MASK)
-#define USBPHY_DEBUG1_ENTAILADJVD_MASK           (0x6000U)
-#define USBPHY_DEBUG1_ENTAILADJVD_SHIFT          (13U)
-#define USBPHY_DEBUG1_ENTAILADJVD(x)             (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_RSVD1_MASK                 (0xFFFF8000U)
-#define USBPHY_DEBUG1_RSVD1_SHIFT                (15U)
-#define USBPHY_DEBUG1_RSVD1(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD1_SHIFT)) & USBPHY_DEBUG1_RSVD1_MASK)
+#define USBPHY_DEBUG1_RSVD0_MASK        (0x1FFFU)
+#define USBPHY_DEBUG1_RSVD0_SHIFT       (0U)
+#define USBPHY_DEBUG1_RSVD0(x)          (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD0_SHIFT)) & USBPHY_DEBUG1_RSVD0_MASK)
+#define USBPHY_DEBUG1_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_ENTAILADJVD(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_RSVD1(x)    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_RSVD1_SHIFT)) & USBPHY_DEBUG1_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_SET - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_SET_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_SET_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_SET_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD0_SHIFT)) & USBPHY_DEBUG1_SET_RSVD0_MASK)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_SET_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_SET_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_SET_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_SET_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD1_SHIFT)) & USBPHY_DEBUG1_SET_RSVD1_MASK)
+#define USBPHY_DEBUG1_SET_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_SET_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_SET_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD0_SHIFT)) & USBPHY_DEBUG1_SET_RSVD0_MASK)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_SET_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_SET_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_SET_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_SET_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_RSVD1_SHIFT)) & USBPHY_DEBUG1_SET_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_CLR - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_CLR_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_CLR_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_CLR_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD0_MASK)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_CLR_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_CLR_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_CLR_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_CLR_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD1_MASK)
+#define USBPHY_DEBUG1_CLR_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_CLR_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_CLR_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD0_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD0_MASK)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_CLR_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_CLR_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_CLR_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_CLR_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_RSVD1_SHIFT)) & USBPHY_DEBUG1_CLR_RSVD1_MASK)
 /*! @} */
 
 /*! @name DEBUG1_TOG - UTMI Debug Status Register 1 */
 /*! @{ */
-#define USBPHY_DEBUG1_TOG_RSVD0_MASK             (0x1FFFU)
-#define USBPHY_DEBUG1_TOG_RSVD0_SHIFT            (0U)
-#define USBPHY_DEBUG1_TOG_RSVD0(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD0_MASK)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK       (0x6000U)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT      (13U)
-#define USBPHY_DEBUG1_TOG_ENTAILADJVD(x)         (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)
-#define USBPHY_DEBUG1_TOG_RSVD1_MASK             (0xFFFF8000U)
-#define USBPHY_DEBUG1_TOG_RSVD1_SHIFT            (15U)
-#define USBPHY_DEBUG1_TOG_RSVD1(x)               (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD1_MASK)
+#define USBPHY_DEBUG1_TOG_RSVD0_MASK  (0x1FFFU)
+#define USBPHY_DEBUG1_TOG_RSVD0_SHIFT (0U)
+#define USBPHY_DEBUG1_TOG_RSVD0(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD0_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD0_MASK)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK  (0x6000U)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT (13U)
+#define USBPHY_DEBUG1_TOG_ENTAILADJVD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)
+#define USBPHY_DEBUG1_TOG_RSVD1_MASK  (0xFFFF8000U)
+#define USBPHY_DEBUG1_TOG_RSVD1_SHIFT (15U)
+#define USBPHY_DEBUG1_TOG_RSVD1(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_RSVD1_SHIFT)) & USBPHY_DEBUG1_TOG_RSVD1_MASK)
 /*! @} */
 
 /*! @name VERSION - UTMI RTL Version */
 /*! @{ */
-#define USBPHY_VERSION_STEP_MASK                 (0xFFFFU)
-#define USBPHY_VERSION_STEP_SHIFT                (0U)
-#define USBPHY_VERSION_STEP(x)                   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
-#define USBPHY_VERSION_MINOR_MASK                (0xFF0000U)
-#define USBPHY_VERSION_MINOR_SHIFT               (16U)
-#define USBPHY_VERSION_MINOR(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
-#define USBPHY_VERSION_MAJOR_MASK                (0xFF000000U)
-#define USBPHY_VERSION_MAJOR_SHIFT               (24U)
-#define USBPHY_VERSION_MAJOR(x)                  (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)
+#define USBPHY_VERSION_STEP_MASK   (0xFFFFU)
+#define USBPHY_VERSION_STEP_SHIFT  (0U)
+#define USBPHY_VERSION_STEP(x)     (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
+#define USBPHY_VERSION_MINOR_MASK  (0xFF0000U)
+#define USBPHY_VERSION_MINOR_SHIFT (16U)
+#define USBPHY_VERSION_MINOR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
+#define USBPHY_VERSION_MAJOR_MASK  (0xFF000000U)
+#define USBPHY_VERSION_MAJOR_SHIFT (24U)
+#define USBPHY_VERSION_MAJOR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USBPHY_Register_Masks */
 
-
 /* USBPHY - Peripheral instance base addresses */
 /** Peripheral USBPHY1 base address */
-#define USBPHY1_BASE                             (0x400D9000u)
+#define USBPHY1_BASE (0x400D9000u)
 /** Peripheral USBPHY1 base pointer */
-#define USBPHY1                                  ((USBPHY_Type *)USBPHY1_BASE)
+#define USBPHY1 ((USBPHY_Type *)USBPHY1_BASE)
 /** Peripheral USBPHY2 base address */
-#define USBPHY2_BASE                             (0x400DA000u)
+#define USBPHY2_BASE (0x400DA000u)
 /** Peripheral USBPHY2 base pointer */
-#define USBPHY2                                  ((USBPHY_Type *)USBPHY2_BASE)
+#define USBPHY2 ((USBPHY_Type *)USBPHY2_BASE)
 /** Array initializer of USBPHY peripheral base addresses */
-#define USBPHY_BASE_ADDRS                        { 0u, USBPHY1_BASE, USBPHY2_BASE }
+#define USBPHY_BASE_ADDRS                                                                                              \
+    {                                                                                                                  \
+        0u, USBPHY1_BASE, USBPHY2_BASE                                                                                 \
+    }
 /** Array initializer of USBPHY peripheral base pointers */
-#define USBPHY_BASE_PTRS                         { (USBPHY_Type *)0u, USBPHY1, USBPHY2 }
+#define USBPHY_BASE_PTRS                                                                                               \
+    {                                                                                                                  \
+        (USBPHY_Type *)0u, USBPHY1, USBPHY2                                                                            \
+    }
 /** Interrupt vectors for the USBPHY peripheral type */
-#define USBPHY_IRQS                              { NotAvail_IRQn, USB_PHY1_IRQn, USB_PHY2_IRQn }
+#define USBPHY_IRQS                                                                                                    \
+    {                                                                                                                  \
+        NotAvail_IRQn, USB_PHY1_IRQn, USB_PHY2_IRQn                                                                    \
+    }
 /* Backward compatibility */
-#define USBPHY_CTRL_ENDEVPLUGINDET_MASK     USBPHY_CTRL_ENDEVPLUGINDETECT_MASK
-#define USBPHY_CTRL_ENDEVPLUGINDET_SHIFT    USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT
-#define USBPHY_CTRL_ENDEVPLUGINDET(x)       USBPHY_CTRL_ENDEVPLUGINDETECT(x)
-#define USBPHY_TX_TXCAL45DM_MASK            USBPHY_TX_TXCAL45DN_MASK
-#define USBPHY_TX_TXCAL45DM_SHIFT           USBPHY_TX_TXCAL45DN_SHIFT
-#define USBPHY_TX_TXCAL45DM(x)              USBPHY_TX_TXCAL45DN(x)
-
+#define USBPHY_CTRL_ENDEVPLUGINDET_MASK  USBPHY_CTRL_ENDEVPLUGINDETECT_MASK
+#define USBPHY_CTRL_ENDEVPLUGINDET_SHIFT USBPHY_CTRL_ENDEVPLUGINDETECT_SHIFT
+#define USBPHY_CTRL_ENDEVPLUGINDET(x)    USBPHY_CTRL_ENDEVPLUGINDETECT(x)
+#define USBPHY_TX_TXCAL45DM_MASK         USBPHY_TX_TXCAL45DN_MASK
+#define USBPHY_TX_TXCAL45DM_SHIFT        USBPHY_TX_TXCAL45DN_SHIFT
+#define USBPHY_TX_TXCAL45DM(x)           USBPHY_TX_TXCAL45DN(x)
 
 /*!
  * @}
  */ /* end of group USBPHY_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USB_ANALOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -24267,27 +27634,29 @@ typedef struct {
  */
 
 /** USB_ANALOG - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[416];
-  struct {                                         /* offset: 0x1A0, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT;                       /**< USB VBUS Detect Register, array offset: 0x1A0, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_SET;                   /**< USB VBUS Detect Register, array offset: 0x1A4, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_CLR;                   /**< USB VBUS Detect Register, array offset: 0x1A8, array step: 0x60 */
-    __IO uint32_t VBUS_DETECT_TOG;                   /**< USB VBUS Detect Register, array offset: 0x1AC, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT;                       /**< USB Charger Detect Register, array offset: 0x1B0, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_SET;                   /**< USB Charger Detect Register, array offset: 0x1B4, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_CLR;                   /**< USB Charger Detect Register, array offset: 0x1B8, array step: 0x60 */
-    __IO uint32_t CHRG_DETECT_TOG;                   /**< USB Charger Detect Register, array offset: 0x1BC, array step: 0x60 */
-    __I  uint32_t VBUS_DETECT_STAT;                  /**< USB VBUS Detect Status Register, array offset: 0x1C0, array step: 0x60 */
-         uint8_t RESERVED_0[12];
-    __I  uint32_t CHRG_DETECT_STAT;                  /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */
-         uint8_t RESERVED_1[28];
-    __IO uint32_t MISC;                              /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */
-    __IO uint32_t MISC_SET;                          /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */
-    __IO uint32_t MISC_CLR;                          /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */
-    __IO uint32_t MISC_TOG;                          /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */
-  } INSTANCE[2];
-  __I  uint32_t DIGPROG;                           /**< Chip Silicon Version, offset: 0x260 */
+typedef struct
+{
+    uint8_t RESERVED_0[416];
+    struct
+    {                                  /* offset: 0x1A0, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT;     /**< USB VBUS Detect Register, array offset: 0x1A0, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_SET; /**< USB VBUS Detect Register, array offset: 0x1A4, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_CLR; /**< USB VBUS Detect Register, array offset: 0x1A8, array step: 0x60 */
+        __IO uint32_t VBUS_DETECT_TOG; /**< USB VBUS Detect Register, array offset: 0x1AC, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT;     /**< USB Charger Detect Register, array offset: 0x1B0, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_SET; /**< USB Charger Detect Register, array offset: 0x1B4, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_CLR; /**< USB Charger Detect Register, array offset: 0x1B8, array step: 0x60 */
+        __IO uint32_t CHRG_DETECT_TOG; /**< USB Charger Detect Register, array offset: 0x1BC, array step: 0x60 */
+        __I uint32_t VBUS_DETECT_STAT; /**< USB VBUS Detect Status Register, array offset: 0x1C0, array step: 0x60 */
+        uint8_t RESERVED_0[12];
+        __I uint32_t CHRG_DETECT_STAT; /**< USB Charger Detect Status Register, array offset: 0x1D0, array step: 0x60 */
+        uint8_t RESERVED_1[28];
+        __IO uint32_t MISC;     /**< USB Misc Register, array offset: 0x1F0, array step: 0x60 */
+        __IO uint32_t MISC_SET; /**< USB Misc Register, array offset: 0x1F4, array step: 0x60 */
+        __IO uint32_t MISC_CLR; /**< USB Misc Register, array offset: 0x1F8, array step: 0x60 */
+        __IO uint32_t MISC_TOG; /**< USB Misc Register, array offset: 0x1FC, array step: 0x60 */
+    } INSTANCE[2];
+    __I uint32_t DIGPROG; /**< Chip Silicon Version, offset: 0x260 */
 } USB_ANALOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -24301,274 +27670,361 @@ typedef struct {
 
 /*! @name VBUS_DETECT - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) &                                  \
+     USB_ANALOG_VBUS_DETECT_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) &                                    \
+     USB_ANALOG_VBUS_DETECT_DISCHARGE_VBUS_MASK)
 #define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CHARGE_VBUS(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT */
-#define USB_ANALOG_VBUS_DETECT_COUNT             (2U)
+#define USB_ANALOG_VBUS_DETECT_COUNT (2U)
 
 /*! @name VBUS_DETECT_SET - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_SET_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_SET_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_SET */
-#define USB_ANALOG_VBUS_DETECT_SET_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_SET_COUNT (2U)
 
 /*! @name VBUS_DETECT_CLR - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_CLR_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_CLR_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_CLR */
-#define USB_ANALOG_VBUS_DETECT_CLR_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_CLR_COUNT (2U)
 
 /*! @name VBUS_DETECT_TOG - USB VBUS Detect Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK (0x7U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK  (0x7U)
 #define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK (0x100000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) &                              \
+     USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK  (0x100000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT (20U)
-#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK (0x4000000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS(x)                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_SHIFT)) &                          \
+     USB_ANALOG_VBUS_DETECT_TOG_VBUSVALID_PWRUP_CMPS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK  (0x4000000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT (26U)
-#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
-#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK (0x8000000U)
+#define USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) &                                \
+     USB_ANALOG_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK  (0x8000000U)
 #define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT (27U)
-#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT)) & USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK)
+#define USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_TOG_CHARGE_VBUS_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_TOG */
-#define USB_ANALOG_VBUS_DETECT_TOG_COUNT         (2U)
+#define USB_ANALOG_VBUS_DETECT_TOG_COUNT (2U)
 
 /*! @name CHRG_DETECT - USB Charger Detect Register */
 /*! @{ */
 #define USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CONTACT(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK   (0x80000U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT  (19U)
-#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(x)     (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_EN_B_MASK         (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_EN_B_SHIFT        (20U)
-#define USB_ANALOG_CHRG_DETECT_EN_B(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CHK_CONTACT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CONTACT_SHIFT)) &                                       \
+     USB_ANALOG_CHRG_DETECT_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK  (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT (19U)
+#define USB_ANALOG_CHRG_DETECT_CHK_CHRG_B(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_EN_B(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT */
-#define USB_ANALOG_CHRG_DETECT_COUNT             (2U)
+#define USB_ANALOG_CHRG_DETECT_COUNT (2U)
 
 /*! @name CHRG_DETECT_SET - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_SET_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_SET_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_SET_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_SET_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_SET_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_SET_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_SET */
-#define USB_ANALOG_CHRG_DETECT_SET_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_SET_COUNT (2U)
 
 /*! @name CHRG_DETECT_CLR - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_CLR_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_CLR_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_CLR_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_CLR_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_CLR_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_CLR_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_CLR */
-#define USB_ANALOG_CHRG_DETECT_CLR_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_CLR_COUNT (2U)
 
 /*! @name CHRG_DETECT_TOG - USB Charger Detect Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK (0x40000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK  (0x40000U)
 #define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT (18U)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK (0x80000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_SHIFT)) &                                   \
+     USB_ANALOG_CHRG_DETECT_TOG_CHK_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK  (0x80000U)
 #define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT (19U)
-#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK     (0x100000U)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT    (20U)
-#define USB_ANALOG_CHRG_DETECT_TOG_EN_B(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_SHIFT)) &                                    \
+     USB_ANALOG_CHRG_DETECT_TOG_CHK_CHRG_B_MASK)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK  (0x100000U)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT (20U)
+#define USB_ANALOG_CHRG_DETECT_TOG_EN_B(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_TOG_EN_B_SHIFT)) & USB_ANALOG_CHRG_DETECT_TOG_EN_B_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_TOG */
-#define USB_ANALOG_CHRG_DETECT_TOG_COUNT         (2U)
+#define USB_ANALOG_CHRG_DETECT_TOG_COUNT (2U)
 
 /*! @name VBUS_DETECT_STAT - USB VBUS Detect Status Register */
 /*! @{ */
-#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK (0x1U)
+#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK  (0x1U)
 #define USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT (0U)
-#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND(x)   (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_SESSEND(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_SESSEND_SHIFT)) &                                      \
+     USB_ANALOG_VBUS_DETECT_STAT_SESSEND_MASK)
 #define USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK  (0x2U)
 #define USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT (1U)
-#define USB_ANALOG_VBUS_DETECT_STAT_BVALID(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_BVALID(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_BVALID_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_STAT_BVALID_MASK)
 #define USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK  (0x4U)
 #define USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT (2U)
-#define USB_ANALOG_VBUS_DETECT_STAT_AVALID(x)    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK)
-#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK (0x8U)
+#define USB_ANALOG_VBUS_DETECT_STAT_AVALID(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_AVALID_SHIFT)) &                                       \
+     USB_ANALOG_VBUS_DETECT_STAT_AVALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK  (0x8U)
 #define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT (3U)
-#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT)) & USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK)
+#define USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_SHIFT)) &                                   \
+     USB_ANALOG_VBUS_DETECT_STAT_VBUS_VALID_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_VBUS_DETECT_STAT */
-#define USB_ANALOG_VBUS_DETECT_STAT_COUNT        (2U)
+#define USB_ANALOG_VBUS_DETECT_STAT_COUNT (2U)
 
 /*! @name CHRG_DETECT_STAT - USB Charger Detect Status Register */
 /*! @{ */
-#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK (0x1U)
+#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK  (0x1U)
 #define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT (0U)
-#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK (0x2U)
+#define USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_SHIFT)) &                                 \
+     USB_ANALOG_CHRG_DETECT_STAT_PLUG_CONTACT_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK  (0x2U)
 #define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT (1U)
-#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK (0x4U)
+#define USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_SHIFT)) &                                \
+     USB_ANALOG_CHRG_DETECT_STAT_CHRG_DETECTED_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK  (0x4U)
 #define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT (2U)
-#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE(x)  (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK)
-#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK (0x8U)
+#define USB_ANALOG_CHRG_DETECT_STAT_DM_STATE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_SHIFT)) &                                     \
+     USB_ANALOG_CHRG_DETECT_STAT_DM_STATE_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK  (0x8U)
 #define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT (3U)
-#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE(x)  (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT)) & USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK)
+#define USB_ANALOG_CHRG_DETECT_STAT_DP_STATE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_SHIFT)) &                                     \
+     USB_ANALOG_CHRG_DETECT_STAT_DP_STATE_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_CHRG_DETECT_STAT */
-#define USB_ANALOG_CHRG_DETECT_STAT_COUNT        (2U)
+#define USB_ANALOG_CHRG_DETECT_STAT_COUNT (2U)
 
 /*! @name MISC - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK   (0x1U)
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT  (0U)
-#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R(x)     (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_EN_DEGLITCH_MASK         (0x2U)
-#define USB_ANALOG_MISC_EN_DEGLITCH_SHIFT        (1U)
-#define USB_ANALOG_MISC_EN_DEGLITCH(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_EN_CLK_UTMI_MASK         (0x40000000U)
-#define USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT        (30U)
-#define USB_ANALOG_MISC_EN_CLK_UTMI(x)           (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK  (0x1U)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT (0U)
+#define USB_ANALOG_MISC_HS_USE_EXTERNAL_R(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_EN_DEGLITCH(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_EN_CLK_UTMI(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC */
-#define USB_ANALOG_MISC_COUNT                    (2U)
+#define USB_ANALOG_MISC_COUNT (2U)
 
 /*! @name MISC_SET - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_SET_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_SET_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_SET_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_SET_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_SET_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_SET_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_SET_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_SET_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_SET */
-#define USB_ANALOG_MISC_SET_COUNT                (2U)
+#define USB_ANALOG_MISC_SET_COUNT (2U)
 
 /*! @name MISC_CLR - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_CLR_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_CLR_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_CLR_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_CLR_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_CLR_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_CLR_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_CLR_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_CLR */
-#define USB_ANALOG_MISC_CLR_COUNT                (2U)
+#define USB_ANALOG_MISC_CLR_COUNT (2U)
 
 /*! @name MISC_TOG - USB Misc Register */
 /*! @{ */
-#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK (0x1U)
+#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK  (0x1U)
 #define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT (0U)
-#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R(x) (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT)) & USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK     (0x2U)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT    (1U)
-#define USB_ANALOG_MISC_TOG_EN_DEGLITCH(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK     (0x40000000U)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT    (30U)
-#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI(x)       (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK)
+#define USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_SHIFT)) &                                    \
+     USB_ANALOG_MISC_TOG_HS_USE_EXTERNAL_R_MASK)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK  (0x2U)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT (1U)
+#define USB_ANALOG_MISC_TOG_EN_DEGLITCH(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_DEGLITCH_SHIFT)) & USB_ANALOG_MISC_TOG_EN_DEGLITCH_MASK)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK  (0x40000000U)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT (30U)
+#define USB_ANALOG_MISC_TOG_EN_CLK_UTMI(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_MISC_TOG_EN_CLK_UTMI_SHIFT)) & USB_ANALOG_MISC_TOG_EN_CLK_UTMI_MASK)
 /*! @} */
 
 /* The count of USB_ANALOG_MISC_TOG */
-#define USB_ANALOG_MISC_TOG_COUNT                (2U)
+#define USB_ANALOG_MISC_TOG_COUNT (2U)
 
 /*! @name DIGPROG - Chip Silicon Version */
 /*! @{ */
-#define USB_ANALOG_DIGPROG_SILICON_REVISION_MASK (0xFFFFFFFFU)
+#define USB_ANALOG_DIGPROG_SILICON_REVISION_MASK  (0xFFFFFFFFU)
 #define USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT (0U)
-#define USB_ANALOG_DIGPROG_SILICON_REVISION(x)   (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT)) & USB_ANALOG_DIGPROG_SILICON_REVISION_MASK)
+#define USB_ANALOG_DIGPROG_SILICON_REVISION(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USB_ANALOG_DIGPROG_SILICON_REVISION_SHIFT)) &                                      \
+     USB_ANALOG_DIGPROG_SILICON_REVISION_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USB_ANALOG_Register_Masks */
 
-
 /* USB_ANALOG - Peripheral instance base addresses */
 /** Peripheral USB_ANALOG base address */
-#define USB_ANALOG_BASE                          (0x400D8000u)
+#define USB_ANALOG_BASE (0x400D8000u)
 /** Peripheral USB_ANALOG base pointer */
-#define USB_ANALOG                               ((USB_ANALOG_Type *)USB_ANALOG_BASE)
+#define USB_ANALOG ((USB_ANALOG_Type *)USB_ANALOG_BASE)
 /** Array initializer of USB_ANALOG peripheral base addresses */
-#define USB_ANALOG_BASE_ADDRS                    { USB_ANALOG_BASE }
+#define USB_ANALOG_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        USB_ANALOG_BASE                                                                                                \
+    }
 /** Array initializer of USB_ANALOG peripheral base pointers */
-#define USB_ANALOG_BASE_PTRS                     { USB_ANALOG }
+#define USB_ANALOG_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        USB_ANALOG                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group USB_ANALOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- USDHC Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -24579,39 +28035,40 @@ typedef struct {
  */
 
 /** USDHC - Register Layout Typedef */
-typedef struct {
-  __IO uint32_t DS_ADDR;                           /**< DMA System Address, offset: 0x0 */
-  __IO uint32_t BLK_ATT;                           /**< Block Attributes, offset: 0x4 */
-  __IO uint32_t CMD_ARG;                           /**< Command Argument, offset: 0x8 */
-  __IO uint32_t CMD_XFR_TYP;                       /**< Command Transfer Type, offset: 0xC */
-  __I  uint32_t CMD_RSP0;                          /**< Command Response0, offset: 0x10 */
-  __I  uint32_t CMD_RSP1;                          /**< Command Response1, offset: 0x14 */
-  __I  uint32_t CMD_RSP2;                          /**< Command Response2, offset: 0x18 */
-  __I  uint32_t CMD_RSP3;                          /**< Command Response3, offset: 0x1C */
-  __IO uint32_t DATA_BUFF_ACC_PORT;                /**< Data Buffer Access Port, offset: 0x20 */
-  __I  uint32_t PRES_STATE;                        /**< Present State, offset: 0x24 */
-  __IO uint32_t PROT_CTRL;                         /**< Protocol Control, offset: 0x28 */
-  __IO uint32_t SYS_CTRL;                          /**< System Control, offset: 0x2C */
-  __IO uint32_t INT_STATUS;                        /**< Interrupt Status, offset: 0x30 */
-  __IO uint32_t INT_STATUS_EN;                     /**< Interrupt Status Enable, offset: 0x34 */
-  __IO uint32_t INT_SIGNAL_EN;                     /**< Interrupt Signal Enable, offset: 0x38 */
-  __IO uint32_t AUTOCMD12_ERR_STATUS;              /**< Auto CMD12 Error Status, offset: 0x3C */
-  __IO uint32_t HOST_CTRL_CAP;                     /**< Host Controller Capabilities, offset: 0x40 */
-  __IO uint32_t WTMK_LVL;                          /**< Watermark Level, offset: 0x44 */
-  __IO uint32_t MIX_CTRL;                          /**< Mixer Control, offset: 0x48 */
-       uint8_t RESERVED_0[4];
-  __O  uint32_t FORCE_EVENT;                       /**< Force Event, offset: 0x50 */
-  __I  uint32_t ADMA_ERR_STATUS;                   /**< ADMA Error Status Register, offset: 0x54 */
-  __IO uint32_t ADMA_SYS_ADDR;                     /**< ADMA System Address, offset: 0x58 */
-       uint8_t RESERVED_1[4];
-  __IO uint32_t DLL_CTRL;                          /**< DLL (Delay Line) Control, offset: 0x60 */
-  __I  uint32_t DLL_STATUS;                        /**< DLL Status, offset: 0x64 */
-  __IO uint32_t CLK_TUNE_CTRL_STATUS;              /**< CLK Tuning Control and Status, offset: 0x68 */
-       uint8_t RESERVED_2[84];
-  __IO uint32_t VEND_SPEC;                         /**< Vendor Specific Register, offset: 0xC0 */
-  __IO uint32_t MMC_BOOT;                          /**< MMC Boot Register, offset: 0xC4 */
-  __IO uint32_t VEND_SPEC2;                        /**< Vendor Specific 2 Register, offset: 0xC8 */
-  __IO uint32_t TUNING_CTRL;                       /**< Tuning Control Register, offset: 0xCC */
+typedef struct
+{
+    __IO uint32_t DS_ADDR;              /**< DMA System Address, offset: 0x0 */
+    __IO uint32_t BLK_ATT;              /**< Block Attributes, offset: 0x4 */
+    __IO uint32_t CMD_ARG;              /**< Command Argument, offset: 0x8 */
+    __IO uint32_t CMD_XFR_TYP;          /**< Command Transfer Type, offset: 0xC */
+    __I uint32_t CMD_RSP0;              /**< Command Response0, offset: 0x10 */
+    __I uint32_t CMD_RSP1;              /**< Command Response1, offset: 0x14 */
+    __I uint32_t CMD_RSP2;              /**< Command Response2, offset: 0x18 */
+    __I uint32_t CMD_RSP3;              /**< Command Response3, offset: 0x1C */
+    __IO uint32_t DATA_BUFF_ACC_PORT;   /**< Data Buffer Access Port, offset: 0x20 */
+    __I uint32_t PRES_STATE;            /**< Present State, offset: 0x24 */
+    __IO uint32_t PROT_CTRL;            /**< Protocol Control, offset: 0x28 */
+    __IO uint32_t SYS_CTRL;             /**< System Control, offset: 0x2C */
+    __IO uint32_t INT_STATUS;           /**< Interrupt Status, offset: 0x30 */
+    __IO uint32_t INT_STATUS_EN;        /**< Interrupt Status Enable, offset: 0x34 */
+    __IO uint32_t INT_SIGNAL_EN;        /**< Interrupt Signal Enable, offset: 0x38 */
+    __IO uint32_t AUTOCMD12_ERR_STATUS; /**< Auto CMD12 Error Status, offset: 0x3C */
+    __IO uint32_t HOST_CTRL_CAP;        /**< Host Controller Capabilities, offset: 0x40 */
+    __IO uint32_t WTMK_LVL;             /**< Watermark Level, offset: 0x44 */
+    __IO uint32_t MIX_CTRL;             /**< Mixer Control, offset: 0x48 */
+    uint8_t RESERVED_0[4];
+    __O uint32_t FORCE_EVENT;     /**< Force Event, offset: 0x50 */
+    __I uint32_t ADMA_ERR_STATUS; /**< ADMA Error Status Register, offset: 0x54 */
+    __IO uint32_t ADMA_SYS_ADDR;  /**< ADMA System Address, offset: 0x58 */
+    uint8_t RESERVED_1[4];
+    __IO uint32_t DLL_CTRL;             /**< DLL (Delay Line) Control, offset: 0x60 */
+    __I uint32_t DLL_STATUS;            /**< DLL Status, offset: 0x64 */
+    __IO uint32_t CLK_TUNE_CTRL_STATUS; /**< CLK Tuning Control and Status, offset: 0x68 */
+    uint8_t RESERVED_2[84];
+    __IO uint32_t VEND_SPEC;   /**< Vendor Specific Register, offset: 0xC0 */
+    __IO uint32_t MMC_BOOT;    /**< MMC Boot Register, offset: 0xC4 */
+    __IO uint32_t VEND_SPEC2;  /**< Vendor Specific 2 Register, offset: 0xC8 */
+    __IO uint32_t TUNING_CTRL; /**< Tuning Control Register, offset: 0xCC */
 } USDHC_Type;
 
 /* ----------------------------------------------------------------------------
@@ -24625,834 +28082,1085 @@ typedef struct {
 
 /*! @name DS_ADDR - DMA System Address */
 /*! @{ */
-#define USDHC_DS_ADDR_DS_ADDR_MASK               (0xFFFFFFFFU)
-#define USDHC_DS_ADDR_DS_ADDR_SHIFT              (0U)
-#define USDHC_DS_ADDR_DS_ADDR(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_DS_ADDR_DS_ADDR_SHIFT)) & USDHC_DS_ADDR_DS_ADDR_MASK)
+#define USDHC_DS_ADDR_DS_ADDR_MASK  (0xFFFFFFFFU)
+#define USDHC_DS_ADDR_DS_ADDR_SHIFT (0U)
+#define USDHC_DS_ADDR_DS_ADDR(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DS_ADDR_DS_ADDR_SHIFT)) & USDHC_DS_ADDR_DS_ADDR_MASK)
 /*! @} */
 
 /*! @name BLK_ATT - Block Attributes */
 /*! @{ */
-#define USDHC_BLK_ATT_BLKSIZE_MASK               (0x1FFFU)
-#define USDHC_BLK_ATT_BLKSIZE_SHIFT              (0U)
-#define USDHC_BLK_ATT_BLKSIZE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKSIZE_SHIFT)) & USDHC_BLK_ATT_BLKSIZE_MASK)
-#define USDHC_BLK_ATT_BLKCNT_MASK                (0xFFFF0000U)
-#define USDHC_BLK_ATT_BLKCNT_SHIFT               (16U)
-#define USDHC_BLK_ATT_BLKCNT(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKCNT_SHIFT)) & USDHC_BLK_ATT_BLKCNT_MASK)
+#define USDHC_BLK_ATT_BLKSIZE_MASK  (0x1FFFU)
+#define USDHC_BLK_ATT_BLKSIZE_SHIFT (0U)
+#define USDHC_BLK_ATT_BLKSIZE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKSIZE_SHIFT)) & USDHC_BLK_ATT_BLKSIZE_MASK)
+#define USDHC_BLK_ATT_BLKCNT_MASK  (0xFFFF0000U)
+#define USDHC_BLK_ATT_BLKCNT_SHIFT (16U)
+#define USDHC_BLK_ATT_BLKCNT(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_BLK_ATT_BLKCNT_SHIFT)) & USDHC_BLK_ATT_BLKCNT_MASK)
 /*! @} */
 
 /*! @name CMD_ARG - Command Argument */
 /*! @{ */
-#define USDHC_CMD_ARG_CMDARG_MASK                (0xFFFFFFFFU)
-#define USDHC_CMD_ARG_CMDARG_SHIFT               (0U)
-#define USDHC_CMD_ARG_CMDARG(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_ARG_CMDARG_SHIFT)) & USDHC_CMD_ARG_CMDARG_MASK)
+#define USDHC_CMD_ARG_CMDARG_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_ARG_CMDARG_SHIFT (0U)
+#define USDHC_CMD_ARG_CMDARG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_ARG_CMDARG_SHIFT)) & USDHC_CMD_ARG_CMDARG_MASK)
 /*! @} */
 
 /*! @name CMD_XFR_TYP - Command Transfer Type */
 /*! @{ */
-#define USDHC_CMD_XFR_TYP_RSPTYP_MASK            (0x30000U)
-#define USDHC_CMD_XFR_TYP_RSPTYP_SHIFT           (16U)
-#define USDHC_CMD_XFR_TYP_RSPTYP(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_RSPTYP_SHIFT)) & USDHC_CMD_XFR_TYP_RSPTYP_MASK)
-#define USDHC_CMD_XFR_TYP_CCCEN_MASK             (0x80000U)
-#define USDHC_CMD_XFR_TYP_CCCEN_SHIFT            (19U)
-#define USDHC_CMD_XFR_TYP_CCCEN(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CCCEN_SHIFT)) & USDHC_CMD_XFR_TYP_CCCEN_MASK)
-#define USDHC_CMD_XFR_TYP_CICEN_MASK             (0x100000U)
-#define USDHC_CMD_XFR_TYP_CICEN_SHIFT            (20U)
-#define USDHC_CMD_XFR_TYP_CICEN(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CICEN_SHIFT)) & USDHC_CMD_XFR_TYP_CICEN_MASK)
-#define USDHC_CMD_XFR_TYP_DPSEL_MASK             (0x200000U)
-#define USDHC_CMD_XFR_TYP_DPSEL_SHIFT            (21U)
-#define USDHC_CMD_XFR_TYP_DPSEL(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_DPSEL_SHIFT)) & USDHC_CMD_XFR_TYP_DPSEL_MASK)
-#define USDHC_CMD_XFR_TYP_CMDTYP_MASK            (0xC00000U)
-#define USDHC_CMD_XFR_TYP_CMDTYP_SHIFT           (22U)
-#define USDHC_CMD_XFR_TYP_CMDTYP(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDTYP_SHIFT)) & USDHC_CMD_XFR_TYP_CMDTYP_MASK)
-#define USDHC_CMD_XFR_TYP_CMDINX_MASK            (0x3F000000U)
-#define USDHC_CMD_XFR_TYP_CMDINX_SHIFT           (24U)
-#define USDHC_CMD_XFR_TYP_CMDINX(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDINX_SHIFT)) & USDHC_CMD_XFR_TYP_CMDINX_MASK)
+#define USDHC_CMD_XFR_TYP_RSPTYP_MASK  (0x30000U)
+#define USDHC_CMD_XFR_TYP_RSPTYP_SHIFT (16U)
+#define USDHC_CMD_XFR_TYP_RSPTYP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_RSPTYP_SHIFT)) & USDHC_CMD_XFR_TYP_RSPTYP_MASK)
+#define USDHC_CMD_XFR_TYP_CCCEN_MASK  (0x80000U)
+#define USDHC_CMD_XFR_TYP_CCCEN_SHIFT (19U)
+#define USDHC_CMD_XFR_TYP_CCCEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CCCEN_SHIFT)) & USDHC_CMD_XFR_TYP_CCCEN_MASK)
+#define USDHC_CMD_XFR_TYP_CICEN_MASK  (0x100000U)
+#define USDHC_CMD_XFR_TYP_CICEN_SHIFT (20U)
+#define USDHC_CMD_XFR_TYP_CICEN(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CICEN_SHIFT)) & USDHC_CMD_XFR_TYP_CICEN_MASK)
+#define USDHC_CMD_XFR_TYP_DPSEL_MASK  (0x200000U)
+#define USDHC_CMD_XFR_TYP_DPSEL_SHIFT (21U)
+#define USDHC_CMD_XFR_TYP_DPSEL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_DPSEL_SHIFT)) & USDHC_CMD_XFR_TYP_DPSEL_MASK)
+#define USDHC_CMD_XFR_TYP_CMDTYP_MASK  (0xC00000U)
+#define USDHC_CMD_XFR_TYP_CMDTYP_SHIFT (22U)
+#define USDHC_CMD_XFR_TYP_CMDTYP(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDTYP_SHIFT)) & USDHC_CMD_XFR_TYP_CMDTYP_MASK)
+#define USDHC_CMD_XFR_TYP_CMDINX_MASK  (0x3F000000U)
+#define USDHC_CMD_XFR_TYP_CMDINX_SHIFT (24U)
+#define USDHC_CMD_XFR_TYP_CMDINX(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_XFR_TYP_CMDINX_SHIFT)) & USDHC_CMD_XFR_TYP_CMDINX_MASK)
 /*! @} */
 
 /*! @name CMD_RSP0 - Command Response0 */
 /*! @{ */
-#define USDHC_CMD_RSP0_CMDRSP0_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP0_CMDRSP0_SHIFT             (0U)
-#define USDHC_CMD_RSP0_CMDRSP0(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP0_CMDRSP0_SHIFT)) & USDHC_CMD_RSP0_CMDRSP0_MASK)
+#define USDHC_CMD_RSP0_CMDRSP0_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP0_CMDRSP0_SHIFT (0U)
+#define USDHC_CMD_RSP0_CMDRSP0(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP0_CMDRSP0_SHIFT)) & USDHC_CMD_RSP0_CMDRSP0_MASK)
 /*! @} */
 
 /*! @name CMD_RSP1 - Command Response1 */
 /*! @{ */
-#define USDHC_CMD_RSP1_CMDRSP1_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP1_CMDRSP1_SHIFT             (0U)
-#define USDHC_CMD_RSP1_CMDRSP1(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP1_CMDRSP1_SHIFT)) & USDHC_CMD_RSP1_CMDRSP1_MASK)
+#define USDHC_CMD_RSP1_CMDRSP1_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP1_CMDRSP1_SHIFT (0U)
+#define USDHC_CMD_RSP1_CMDRSP1(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP1_CMDRSP1_SHIFT)) & USDHC_CMD_RSP1_CMDRSP1_MASK)
 /*! @} */
 
 /*! @name CMD_RSP2 - Command Response2 */
 /*! @{ */
-#define USDHC_CMD_RSP2_CMDRSP2_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP2_CMDRSP2_SHIFT             (0U)
-#define USDHC_CMD_RSP2_CMDRSP2(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP2_CMDRSP2_SHIFT)) & USDHC_CMD_RSP2_CMDRSP2_MASK)
+#define USDHC_CMD_RSP2_CMDRSP2_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP2_CMDRSP2_SHIFT (0U)
+#define USDHC_CMD_RSP2_CMDRSP2(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP2_CMDRSP2_SHIFT)) & USDHC_CMD_RSP2_CMDRSP2_MASK)
 /*! @} */
 
 /*! @name CMD_RSP3 - Command Response3 */
 /*! @{ */
-#define USDHC_CMD_RSP3_CMDRSP3_MASK              (0xFFFFFFFFU)
-#define USDHC_CMD_RSP3_CMDRSP3_SHIFT             (0U)
-#define USDHC_CMD_RSP3_CMDRSP3(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP3_CMDRSP3_SHIFT)) & USDHC_CMD_RSP3_CMDRSP3_MASK)
+#define USDHC_CMD_RSP3_CMDRSP3_MASK  (0xFFFFFFFFU)
+#define USDHC_CMD_RSP3_CMDRSP3_SHIFT (0U)
+#define USDHC_CMD_RSP3_CMDRSP3(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CMD_RSP3_CMDRSP3_SHIFT)) & USDHC_CMD_RSP3_CMDRSP3_MASK)
 /*! @} */
 
 /*! @name DATA_BUFF_ACC_PORT - Data Buffer Access Port */
 /*! @{ */
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK    (0xFFFFFFFFU)
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT   (0U)
-#define USDHC_DATA_BUFF_ACC_PORT_DATCONT(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT)) & USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK  (0xFFFFFFFFU)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT (0U)
+#define USDHC_DATA_BUFF_ACC_PORT_DATCONT(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DATA_BUFF_ACC_PORT_DATCONT_SHIFT)) & USDHC_DATA_BUFF_ACC_PORT_DATCONT_MASK)
 /*! @} */
 
 /*! @name PRES_STATE - Present State */
 /*! @{ */
-#define USDHC_PRES_STATE_CIHB_MASK               (0x1U)
-#define USDHC_PRES_STATE_CIHB_SHIFT              (0U)
-#define USDHC_PRES_STATE_CIHB(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CIHB_SHIFT)) & USDHC_PRES_STATE_CIHB_MASK)
-#define USDHC_PRES_STATE_CDIHB_MASK              (0x2U)
-#define USDHC_PRES_STATE_CDIHB_SHIFT             (1U)
-#define USDHC_PRES_STATE_CDIHB(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDIHB_SHIFT)) & USDHC_PRES_STATE_CDIHB_MASK)
-#define USDHC_PRES_STATE_DLA_MASK                (0x4U)
-#define USDHC_PRES_STATE_DLA_SHIFT               (2U)
-#define USDHC_PRES_STATE_DLA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLA_SHIFT)) & USDHC_PRES_STATE_DLA_MASK)
-#define USDHC_PRES_STATE_SDSTB_MASK              (0x8U)
-#define USDHC_PRES_STATE_SDSTB_SHIFT             (3U)
-#define USDHC_PRES_STATE_SDSTB(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDSTB_SHIFT)) & USDHC_PRES_STATE_SDSTB_MASK)
-#define USDHC_PRES_STATE_IPGOFF_MASK             (0x10U)
-#define USDHC_PRES_STATE_IPGOFF_SHIFT            (4U)
-#define USDHC_PRES_STATE_IPGOFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_IPGOFF_SHIFT)) & USDHC_PRES_STATE_IPGOFF_MASK)
-#define USDHC_PRES_STATE_HCKOFF_MASK             (0x20U)
-#define USDHC_PRES_STATE_HCKOFF_SHIFT            (5U)
-#define USDHC_PRES_STATE_HCKOFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_HCKOFF_SHIFT)) & USDHC_PRES_STATE_HCKOFF_MASK)
-#define USDHC_PRES_STATE_PEROFF_MASK             (0x40U)
-#define USDHC_PRES_STATE_PEROFF_SHIFT            (6U)
-#define USDHC_PRES_STATE_PEROFF(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_PEROFF_SHIFT)) & USDHC_PRES_STATE_PEROFF_MASK)
-#define USDHC_PRES_STATE_SDOFF_MASK              (0x80U)
-#define USDHC_PRES_STATE_SDOFF_SHIFT             (7U)
-#define USDHC_PRES_STATE_SDOFF(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDOFF_SHIFT)) & USDHC_PRES_STATE_SDOFF_MASK)
-#define USDHC_PRES_STATE_WTA_MASK                (0x100U)
-#define USDHC_PRES_STATE_WTA_SHIFT               (8U)
-#define USDHC_PRES_STATE_WTA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WTA_SHIFT)) & USDHC_PRES_STATE_WTA_MASK)
-#define USDHC_PRES_STATE_RTA_MASK                (0x200U)
-#define USDHC_PRES_STATE_RTA_SHIFT               (9U)
-#define USDHC_PRES_STATE_RTA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTA_SHIFT)) & USDHC_PRES_STATE_RTA_MASK)
-#define USDHC_PRES_STATE_BWEN_MASK               (0x400U)
-#define USDHC_PRES_STATE_BWEN_SHIFT              (10U)
-#define USDHC_PRES_STATE_BWEN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BWEN_SHIFT)) & USDHC_PRES_STATE_BWEN_MASK)
-#define USDHC_PRES_STATE_BREN_MASK               (0x800U)
-#define USDHC_PRES_STATE_BREN_SHIFT              (11U)
-#define USDHC_PRES_STATE_BREN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BREN_SHIFT)) & USDHC_PRES_STATE_BREN_MASK)
-#define USDHC_PRES_STATE_RTR_MASK                (0x1000U)
-#define USDHC_PRES_STATE_RTR_SHIFT               (12U)
-#define USDHC_PRES_STATE_RTR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTR_SHIFT)) & USDHC_PRES_STATE_RTR_MASK)
-#define USDHC_PRES_STATE_TSCD_MASK               (0x8000U)
-#define USDHC_PRES_STATE_TSCD_SHIFT              (15U)
-#define USDHC_PRES_STATE_TSCD(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_TSCD_SHIFT)) & USDHC_PRES_STATE_TSCD_MASK)
-#define USDHC_PRES_STATE_CINST_MASK              (0x10000U)
-#define USDHC_PRES_STATE_CINST_SHIFT             (16U)
-#define USDHC_PRES_STATE_CINST(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CINST_SHIFT)) & USDHC_PRES_STATE_CINST_MASK)
-#define USDHC_PRES_STATE_CDPL_MASK               (0x40000U)
-#define USDHC_PRES_STATE_CDPL_SHIFT              (18U)
-#define USDHC_PRES_STATE_CDPL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDPL_SHIFT)) & USDHC_PRES_STATE_CDPL_MASK)
-#define USDHC_PRES_STATE_WPSPL_MASK              (0x80000U)
-#define USDHC_PRES_STATE_WPSPL_SHIFT             (19U)
-#define USDHC_PRES_STATE_WPSPL(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WPSPL_SHIFT)) & USDHC_PRES_STATE_WPSPL_MASK)
-#define USDHC_PRES_STATE_CLSL_MASK               (0x800000U)
-#define USDHC_PRES_STATE_CLSL_SHIFT              (23U)
-#define USDHC_PRES_STATE_CLSL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CLSL_SHIFT)) & USDHC_PRES_STATE_CLSL_MASK)
-#define USDHC_PRES_STATE_DLSL_MASK               (0xFF000000U)
-#define USDHC_PRES_STATE_DLSL_SHIFT              (24U)
-#define USDHC_PRES_STATE_DLSL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
+#define USDHC_PRES_STATE_CIHB_MASK  (0x1U)
+#define USDHC_PRES_STATE_CIHB_SHIFT (0U)
+#define USDHC_PRES_STATE_CIHB(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CIHB_SHIFT)) & USDHC_PRES_STATE_CIHB_MASK)
+#define USDHC_PRES_STATE_CDIHB_MASK  (0x2U)
+#define USDHC_PRES_STATE_CDIHB_SHIFT (1U)
+#define USDHC_PRES_STATE_CDIHB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDIHB_SHIFT)) & USDHC_PRES_STATE_CDIHB_MASK)
+#define USDHC_PRES_STATE_DLA_MASK  (0x4U)
+#define USDHC_PRES_STATE_DLA_SHIFT (2U)
+#define USDHC_PRES_STATE_DLA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLA_SHIFT)) & USDHC_PRES_STATE_DLA_MASK)
+#define USDHC_PRES_STATE_SDSTB_MASK  (0x8U)
+#define USDHC_PRES_STATE_SDSTB_SHIFT (3U)
+#define USDHC_PRES_STATE_SDSTB(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDSTB_SHIFT)) & USDHC_PRES_STATE_SDSTB_MASK)
+#define USDHC_PRES_STATE_IPGOFF_MASK  (0x10U)
+#define USDHC_PRES_STATE_IPGOFF_SHIFT (4U)
+#define USDHC_PRES_STATE_IPGOFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_IPGOFF_SHIFT)) & USDHC_PRES_STATE_IPGOFF_MASK)
+#define USDHC_PRES_STATE_HCKOFF_MASK  (0x20U)
+#define USDHC_PRES_STATE_HCKOFF_SHIFT (5U)
+#define USDHC_PRES_STATE_HCKOFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_HCKOFF_SHIFT)) & USDHC_PRES_STATE_HCKOFF_MASK)
+#define USDHC_PRES_STATE_PEROFF_MASK  (0x40U)
+#define USDHC_PRES_STATE_PEROFF_SHIFT (6U)
+#define USDHC_PRES_STATE_PEROFF(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_PEROFF_SHIFT)) & USDHC_PRES_STATE_PEROFF_MASK)
+#define USDHC_PRES_STATE_SDOFF_MASK  (0x80U)
+#define USDHC_PRES_STATE_SDOFF_SHIFT (7U)
+#define USDHC_PRES_STATE_SDOFF(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_SDOFF_SHIFT)) & USDHC_PRES_STATE_SDOFF_MASK)
+#define USDHC_PRES_STATE_WTA_MASK  (0x100U)
+#define USDHC_PRES_STATE_WTA_SHIFT (8U)
+#define USDHC_PRES_STATE_WTA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WTA_SHIFT)) & USDHC_PRES_STATE_WTA_MASK)
+#define USDHC_PRES_STATE_RTA_MASK  (0x200U)
+#define USDHC_PRES_STATE_RTA_SHIFT (9U)
+#define USDHC_PRES_STATE_RTA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTA_SHIFT)) & USDHC_PRES_STATE_RTA_MASK)
+#define USDHC_PRES_STATE_BWEN_MASK  (0x400U)
+#define USDHC_PRES_STATE_BWEN_SHIFT (10U)
+#define USDHC_PRES_STATE_BWEN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BWEN_SHIFT)) & USDHC_PRES_STATE_BWEN_MASK)
+#define USDHC_PRES_STATE_BREN_MASK  (0x800U)
+#define USDHC_PRES_STATE_BREN_SHIFT (11U)
+#define USDHC_PRES_STATE_BREN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_BREN_SHIFT)) & USDHC_PRES_STATE_BREN_MASK)
+#define USDHC_PRES_STATE_RTR_MASK  (0x1000U)
+#define USDHC_PRES_STATE_RTR_SHIFT (12U)
+#define USDHC_PRES_STATE_RTR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_RTR_SHIFT)) & USDHC_PRES_STATE_RTR_MASK)
+#define USDHC_PRES_STATE_TSCD_MASK  (0x8000U)
+#define USDHC_PRES_STATE_TSCD_SHIFT (15U)
+#define USDHC_PRES_STATE_TSCD(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_TSCD_SHIFT)) & USDHC_PRES_STATE_TSCD_MASK)
+#define USDHC_PRES_STATE_CINST_MASK  (0x10000U)
+#define USDHC_PRES_STATE_CINST_SHIFT (16U)
+#define USDHC_PRES_STATE_CINST(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CINST_SHIFT)) & USDHC_PRES_STATE_CINST_MASK)
+#define USDHC_PRES_STATE_CDPL_MASK  (0x40000U)
+#define USDHC_PRES_STATE_CDPL_SHIFT (18U)
+#define USDHC_PRES_STATE_CDPL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CDPL_SHIFT)) & USDHC_PRES_STATE_CDPL_MASK)
+#define USDHC_PRES_STATE_WPSPL_MASK  (0x80000U)
+#define USDHC_PRES_STATE_WPSPL_SHIFT (19U)
+#define USDHC_PRES_STATE_WPSPL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_WPSPL_SHIFT)) & USDHC_PRES_STATE_WPSPL_MASK)
+#define USDHC_PRES_STATE_CLSL_MASK  (0x800000U)
+#define USDHC_PRES_STATE_CLSL_SHIFT (23U)
+#define USDHC_PRES_STATE_CLSL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_CLSL_SHIFT)) & USDHC_PRES_STATE_CLSL_MASK)
+#define USDHC_PRES_STATE_DLSL_MASK  (0xFF000000U)
+#define USDHC_PRES_STATE_DLSL_SHIFT (24U)
+#define USDHC_PRES_STATE_DLSL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
 /*! @} */
 
 /*! @name PROT_CTRL - Protocol Control */
 /*! @{ */
-#define USDHC_PROT_CTRL_LCTL_MASK                (0x1U)
-#define USDHC_PROT_CTRL_LCTL_SHIFT               (0U)
-#define USDHC_PROT_CTRL_LCTL(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_LCTL_SHIFT)) & USDHC_PROT_CTRL_LCTL_MASK)
-#define USDHC_PROT_CTRL_DTW_MASK                 (0x6U)
-#define USDHC_PROT_CTRL_DTW_SHIFT                (1U)
-#define USDHC_PROT_CTRL_DTW(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DTW_SHIFT)) & USDHC_PROT_CTRL_DTW_MASK)
-#define USDHC_PROT_CTRL_D3CD_MASK                (0x8U)
-#define USDHC_PROT_CTRL_D3CD_SHIFT               (3U)
-#define USDHC_PROT_CTRL_D3CD(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_D3CD_SHIFT)) & USDHC_PROT_CTRL_D3CD_MASK)
-#define USDHC_PROT_CTRL_EMODE_MASK               (0x30U)
-#define USDHC_PROT_CTRL_EMODE_SHIFT              (4U)
-#define USDHC_PROT_CTRL_EMODE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_EMODE_SHIFT)) & USDHC_PROT_CTRL_EMODE_MASK)
-#define USDHC_PROT_CTRL_CDTL_MASK                (0x40U)
-#define USDHC_PROT_CTRL_CDTL_SHIFT               (6U)
-#define USDHC_PROT_CTRL_CDTL(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDTL_SHIFT)) & USDHC_PROT_CTRL_CDTL_MASK)
-#define USDHC_PROT_CTRL_CDSS_MASK                (0x80U)
-#define USDHC_PROT_CTRL_CDSS_SHIFT               (7U)
-#define USDHC_PROT_CTRL_CDSS(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDSS_SHIFT)) & USDHC_PROT_CTRL_CDSS_MASK)
-#define USDHC_PROT_CTRL_DMASEL_MASK              (0x300U)
-#define USDHC_PROT_CTRL_DMASEL_SHIFT             (8U)
-#define USDHC_PROT_CTRL_DMASEL(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DMASEL_SHIFT)) & USDHC_PROT_CTRL_DMASEL_MASK)
-#define USDHC_PROT_CTRL_SABGREQ_MASK             (0x10000U)
-#define USDHC_PROT_CTRL_SABGREQ_SHIFT            (16U)
-#define USDHC_PROT_CTRL_SABGREQ(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_SABGREQ_SHIFT)) & USDHC_PROT_CTRL_SABGREQ_MASK)
-#define USDHC_PROT_CTRL_CREQ_MASK                (0x20000U)
-#define USDHC_PROT_CTRL_CREQ_SHIFT               (17U)
-#define USDHC_PROT_CTRL_CREQ(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CREQ_SHIFT)) & USDHC_PROT_CTRL_CREQ_MASK)
-#define USDHC_PROT_CTRL_RWCTL_MASK               (0x40000U)
-#define USDHC_PROT_CTRL_RWCTL_SHIFT              (18U)
-#define USDHC_PROT_CTRL_RWCTL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RWCTL_SHIFT)) & USDHC_PROT_CTRL_RWCTL_MASK)
-#define USDHC_PROT_CTRL_IABG_MASK                (0x80000U)
-#define USDHC_PROT_CTRL_IABG_SHIFT               (19U)
-#define USDHC_PROT_CTRL_IABG(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_IABG_SHIFT)) & USDHC_PROT_CTRL_IABG_MASK)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK     (0x100000U)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT    (20U)
-#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT)) & USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK)
-#define USDHC_PROT_CTRL_WECINT_MASK              (0x1000000U)
-#define USDHC_PROT_CTRL_WECINT_SHIFT             (24U)
-#define USDHC_PROT_CTRL_WECINT(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINT_SHIFT)) & USDHC_PROT_CTRL_WECINT_MASK)
-#define USDHC_PROT_CTRL_WECINS_MASK              (0x2000000U)
-#define USDHC_PROT_CTRL_WECINS_SHIFT             (25U)
-#define USDHC_PROT_CTRL_WECINS(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINS_SHIFT)) & USDHC_PROT_CTRL_WECINS_MASK)
-#define USDHC_PROT_CTRL_WECRM_MASK               (0x4000000U)
-#define USDHC_PROT_CTRL_WECRM_SHIFT              (26U)
-#define USDHC_PROT_CTRL_WECRM(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECRM_SHIFT)) & USDHC_PROT_CTRL_WECRM_MASK)
-#define USDHC_PROT_CTRL_BURST_LEN_EN_MASK        (0x38000000U)
-#define USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT       (27U)
-#define USDHC_PROT_CTRL_BURST_LEN_EN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT)) & USDHC_PROT_CTRL_BURST_LEN_EN_MASK)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK    (0x40000000U)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT   (30U)
-#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT)) & USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK)
+#define USDHC_PROT_CTRL_LCTL_MASK  (0x1U)
+#define USDHC_PROT_CTRL_LCTL_SHIFT (0U)
+#define USDHC_PROT_CTRL_LCTL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_LCTL_SHIFT)) & USDHC_PROT_CTRL_LCTL_MASK)
+#define USDHC_PROT_CTRL_DTW_MASK   (0x6U)
+#define USDHC_PROT_CTRL_DTW_SHIFT  (1U)
+#define USDHC_PROT_CTRL_DTW(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DTW_SHIFT)) & USDHC_PROT_CTRL_DTW_MASK)
+#define USDHC_PROT_CTRL_D3CD_MASK  (0x8U)
+#define USDHC_PROT_CTRL_D3CD_SHIFT (3U)
+#define USDHC_PROT_CTRL_D3CD(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_D3CD_SHIFT)) & USDHC_PROT_CTRL_D3CD_MASK)
+#define USDHC_PROT_CTRL_EMODE_MASK  (0x30U)
+#define USDHC_PROT_CTRL_EMODE_SHIFT (4U)
+#define USDHC_PROT_CTRL_EMODE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_EMODE_SHIFT)) & USDHC_PROT_CTRL_EMODE_MASK)
+#define USDHC_PROT_CTRL_CDTL_MASK  (0x40U)
+#define USDHC_PROT_CTRL_CDTL_SHIFT (6U)
+#define USDHC_PROT_CTRL_CDTL(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDTL_SHIFT)) & USDHC_PROT_CTRL_CDTL_MASK)
+#define USDHC_PROT_CTRL_CDSS_MASK  (0x80U)
+#define USDHC_PROT_CTRL_CDSS_SHIFT (7U)
+#define USDHC_PROT_CTRL_CDSS(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CDSS_SHIFT)) & USDHC_PROT_CTRL_CDSS_MASK)
+#define USDHC_PROT_CTRL_DMASEL_MASK  (0x300U)
+#define USDHC_PROT_CTRL_DMASEL_SHIFT (8U)
+#define USDHC_PROT_CTRL_DMASEL(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_DMASEL_SHIFT)) & USDHC_PROT_CTRL_DMASEL_MASK)
+#define USDHC_PROT_CTRL_SABGREQ_MASK  (0x10000U)
+#define USDHC_PROT_CTRL_SABGREQ_SHIFT (16U)
+#define USDHC_PROT_CTRL_SABGREQ(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_SABGREQ_SHIFT)) & USDHC_PROT_CTRL_SABGREQ_MASK)
+#define USDHC_PROT_CTRL_CREQ_MASK  (0x20000U)
+#define USDHC_PROT_CTRL_CREQ_SHIFT (17U)
+#define USDHC_PROT_CTRL_CREQ(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_CREQ_SHIFT)) & USDHC_PROT_CTRL_CREQ_MASK)
+#define USDHC_PROT_CTRL_RWCTL_MASK  (0x40000U)
+#define USDHC_PROT_CTRL_RWCTL_SHIFT (18U)
+#define USDHC_PROT_CTRL_RWCTL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RWCTL_SHIFT)) & USDHC_PROT_CTRL_RWCTL_MASK)
+#define USDHC_PROT_CTRL_IABG_MASK  (0x80000U)
+#define USDHC_PROT_CTRL_IABG_SHIFT (19U)
+#define USDHC_PROT_CTRL_IABG(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_IABG_SHIFT)) & USDHC_PROT_CTRL_IABG_MASK)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK  (0x100000U)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT (20U)
+#define USDHC_PROT_CTRL_RD_DONE_NO_8CLK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_RD_DONE_NO_8CLK_SHIFT)) & USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK)
+#define USDHC_PROT_CTRL_WECINT_MASK  (0x1000000U)
+#define USDHC_PROT_CTRL_WECINT_SHIFT (24U)
+#define USDHC_PROT_CTRL_WECINT(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINT_SHIFT)) & USDHC_PROT_CTRL_WECINT_MASK)
+#define USDHC_PROT_CTRL_WECINS_MASK  (0x2000000U)
+#define USDHC_PROT_CTRL_WECINS_SHIFT (25U)
+#define USDHC_PROT_CTRL_WECINS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECINS_SHIFT)) & USDHC_PROT_CTRL_WECINS_MASK)
+#define USDHC_PROT_CTRL_WECRM_MASK  (0x4000000U)
+#define USDHC_PROT_CTRL_WECRM_SHIFT (26U)
+#define USDHC_PROT_CTRL_WECRM(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_WECRM_SHIFT)) & USDHC_PROT_CTRL_WECRM_MASK)
+#define USDHC_PROT_CTRL_BURST_LEN_EN_MASK  (0x38000000U)
+#define USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT (27U)
+#define USDHC_PROT_CTRL_BURST_LEN_EN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_BURST_LEN_EN_SHIFT)) & USDHC_PROT_CTRL_BURST_LEN_EN_MASK)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK  (0x40000000U)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT (30U)
+#define USDHC_PROT_CTRL_NON_EXACT_BLK_RD(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_PROT_CTRL_NON_EXACT_BLK_RD_SHIFT)) & USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK)
 /*! @} */
 
 /*! @name SYS_CTRL - System Control */
 /*! @{ */
-#define USDHC_SYS_CTRL_DVS_MASK                  (0xF0U)
-#define USDHC_SYS_CTRL_DVS_SHIFT                 (4U)
-#define USDHC_SYS_CTRL_DVS(x)                    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DVS_SHIFT)) & USDHC_SYS_CTRL_DVS_MASK)
-#define USDHC_SYS_CTRL_SDCLKFS_MASK              (0xFF00U)
-#define USDHC_SYS_CTRL_SDCLKFS_SHIFT             (8U)
-#define USDHC_SYS_CTRL_SDCLKFS(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_SDCLKFS_SHIFT)) & USDHC_SYS_CTRL_SDCLKFS_MASK)
-#define USDHC_SYS_CTRL_DTOCV_MASK                (0xF0000U)
-#define USDHC_SYS_CTRL_DTOCV_SHIFT               (16U)
-#define USDHC_SYS_CTRL_DTOCV(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DTOCV_SHIFT)) & USDHC_SYS_CTRL_DTOCV_MASK)
-#define USDHC_SYS_CTRL_IPP_RST_N_MASK            (0x800000U)
-#define USDHC_SYS_CTRL_IPP_RST_N_SHIFT           (23U)
-#define USDHC_SYS_CTRL_IPP_RST_N(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_IPP_RST_N_SHIFT)) & USDHC_SYS_CTRL_IPP_RST_N_MASK)
-#define USDHC_SYS_CTRL_RSTA_MASK                 (0x1000000U)
-#define USDHC_SYS_CTRL_RSTA_SHIFT                (24U)
-#define USDHC_SYS_CTRL_RSTA(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTA_SHIFT)) & USDHC_SYS_CTRL_RSTA_MASK)
-#define USDHC_SYS_CTRL_RSTC_MASK                 (0x2000000U)
-#define USDHC_SYS_CTRL_RSTC_SHIFT                (25U)
-#define USDHC_SYS_CTRL_RSTC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTC_SHIFT)) & USDHC_SYS_CTRL_RSTC_MASK)
-#define USDHC_SYS_CTRL_RSTD_MASK                 (0x4000000U)
-#define USDHC_SYS_CTRL_RSTD_SHIFT                (26U)
-#define USDHC_SYS_CTRL_RSTD(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTD_SHIFT)) & USDHC_SYS_CTRL_RSTD_MASK)
-#define USDHC_SYS_CTRL_INITA_MASK                (0x8000000U)
-#define USDHC_SYS_CTRL_INITA_SHIFT               (27U)
-#define USDHC_SYS_CTRL_INITA(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_INITA_SHIFT)) & USDHC_SYS_CTRL_INITA_MASK)
-#define USDHC_SYS_CTRL_RSTT_MASK                 (0x10000000U)
-#define USDHC_SYS_CTRL_RSTT_SHIFT                (28U)
-#define USDHC_SYS_CTRL_RSTT(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTT_SHIFT)) & USDHC_SYS_CTRL_RSTT_MASK)
+#define USDHC_SYS_CTRL_DVS_MASK      (0xF0U)
+#define USDHC_SYS_CTRL_DVS_SHIFT     (4U)
+#define USDHC_SYS_CTRL_DVS(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DVS_SHIFT)) & USDHC_SYS_CTRL_DVS_MASK)
+#define USDHC_SYS_CTRL_SDCLKFS_MASK  (0xFF00U)
+#define USDHC_SYS_CTRL_SDCLKFS_SHIFT (8U)
+#define USDHC_SYS_CTRL_SDCLKFS(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_SDCLKFS_SHIFT)) & USDHC_SYS_CTRL_SDCLKFS_MASK)
+#define USDHC_SYS_CTRL_DTOCV_MASK  (0xF0000U)
+#define USDHC_SYS_CTRL_DTOCV_SHIFT (16U)
+#define USDHC_SYS_CTRL_DTOCV(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_DTOCV_SHIFT)) & USDHC_SYS_CTRL_DTOCV_MASK)
+#define USDHC_SYS_CTRL_IPP_RST_N_MASK  (0x800000U)
+#define USDHC_SYS_CTRL_IPP_RST_N_SHIFT (23U)
+#define USDHC_SYS_CTRL_IPP_RST_N(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_IPP_RST_N_SHIFT)) & USDHC_SYS_CTRL_IPP_RST_N_MASK)
+#define USDHC_SYS_CTRL_RSTA_MASK   (0x1000000U)
+#define USDHC_SYS_CTRL_RSTA_SHIFT  (24U)
+#define USDHC_SYS_CTRL_RSTA(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTA_SHIFT)) & USDHC_SYS_CTRL_RSTA_MASK)
+#define USDHC_SYS_CTRL_RSTC_MASK   (0x2000000U)
+#define USDHC_SYS_CTRL_RSTC_SHIFT  (25U)
+#define USDHC_SYS_CTRL_RSTC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTC_SHIFT)) & USDHC_SYS_CTRL_RSTC_MASK)
+#define USDHC_SYS_CTRL_RSTD_MASK   (0x4000000U)
+#define USDHC_SYS_CTRL_RSTD_SHIFT  (26U)
+#define USDHC_SYS_CTRL_RSTD(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTD_SHIFT)) & USDHC_SYS_CTRL_RSTD_MASK)
+#define USDHC_SYS_CTRL_INITA_MASK  (0x8000000U)
+#define USDHC_SYS_CTRL_INITA_SHIFT (27U)
+#define USDHC_SYS_CTRL_INITA(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_INITA_SHIFT)) & USDHC_SYS_CTRL_INITA_MASK)
+#define USDHC_SYS_CTRL_RSTT_MASK  (0x10000000U)
+#define USDHC_SYS_CTRL_RSTT_SHIFT (28U)
+#define USDHC_SYS_CTRL_RSTT(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_SYS_CTRL_RSTT_SHIFT)) & USDHC_SYS_CTRL_RSTT_MASK)
 /*! @} */
 
 /*! @name INT_STATUS - Interrupt Status */
 /*! @{ */
-#define USDHC_INT_STATUS_CC_MASK                 (0x1U)
-#define USDHC_INT_STATUS_CC_SHIFT                (0U)
-#define USDHC_INT_STATUS_CC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CC_SHIFT)) & USDHC_INT_STATUS_CC_MASK)
-#define USDHC_INT_STATUS_TC_MASK                 (0x2U)
-#define USDHC_INT_STATUS_TC_SHIFT                (1U)
-#define USDHC_INT_STATUS_TC(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TC_SHIFT)) & USDHC_INT_STATUS_TC_MASK)
-#define USDHC_INT_STATUS_BGE_MASK                (0x4U)
-#define USDHC_INT_STATUS_BGE_SHIFT               (2U)
-#define USDHC_INT_STATUS_BGE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BGE_SHIFT)) & USDHC_INT_STATUS_BGE_MASK)
-#define USDHC_INT_STATUS_DINT_MASK               (0x8U)
-#define USDHC_INT_STATUS_DINT_SHIFT              (3U)
-#define USDHC_INT_STATUS_DINT(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DINT_SHIFT)) & USDHC_INT_STATUS_DINT_MASK)
-#define USDHC_INT_STATUS_BWR_MASK                (0x10U)
-#define USDHC_INT_STATUS_BWR_SHIFT               (4U)
-#define USDHC_INT_STATUS_BWR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BWR_SHIFT)) & USDHC_INT_STATUS_BWR_MASK)
-#define USDHC_INT_STATUS_BRR_MASK                (0x20U)
-#define USDHC_INT_STATUS_BRR_SHIFT               (5U)
-#define USDHC_INT_STATUS_BRR(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BRR_SHIFT)) & USDHC_INT_STATUS_BRR_MASK)
-#define USDHC_INT_STATUS_CINS_MASK               (0x40U)
-#define USDHC_INT_STATUS_CINS_SHIFT              (6U)
-#define USDHC_INT_STATUS_CINS(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINS_SHIFT)) & USDHC_INT_STATUS_CINS_MASK)
-#define USDHC_INT_STATUS_CRM_MASK                (0x80U)
-#define USDHC_INT_STATUS_CRM_SHIFT               (7U)
-#define USDHC_INT_STATUS_CRM(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CRM_SHIFT)) & USDHC_INT_STATUS_CRM_MASK)
-#define USDHC_INT_STATUS_CINT_MASK               (0x100U)
-#define USDHC_INT_STATUS_CINT_SHIFT              (8U)
-#define USDHC_INT_STATUS_CINT(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINT_SHIFT)) & USDHC_INT_STATUS_CINT_MASK)
-#define USDHC_INT_STATUS_RTE_MASK                (0x1000U)
-#define USDHC_INT_STATUS_RTE_SHIFT               (12U)
-#define USDHC_INT_STATUS_RTE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_RTE_SHIFT)) & USDHC_INT_STATUS_RTE_MASK)
-#define USDHC_INT_STATUS_TP_MASK                 (0x4000U)
-#define USDHC_INT_STATUS_TP_SHIFT                (14U)
-#define USDHC_INT_STATUS_TP(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TP_SHIFT)) & USDHC_INT_STATUS_TP_MASK)
-#define USDHC_INT_STATUS_CTOE_MASK               (0x10000U)
-#define USDHC_INT_STATUS_CTOE_SHIFT              (16U)
-#define USDHC_INT_STATUS_CTOE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CTOE_SHIFT)) & USDHC_INT_STATUS_CTOE_MASK)
-#define USDHC_INT_STATUS_CCE_MASK                (0x20000U)
-#define USDHC_INT_STATUS_CCE_SHIFT               (17U)
-#define USDHC_INT_STATUS_CCE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CCE_SHIFT)) & USDHC_INT_STATUS_CCE_MASK)
-#define USDHC_INT_STATUS_CEBE_MASK               (0x40000U)
-#define USDHC_INT_STATUS_CEBE_SHIFT              (18U)
-#define USDHC_INT_STATUS_CEBE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CEBE_SHIFT)) & USDHC_INT_STATUS_CEBE_MASK)
-#define USDHC_INT_STATUS_CIE_MASK                (0x80000U)
-#define USDHC_INT_STATUS_CIE_SHIFT               (19U)
-#define USDHC_INT_STATUS_CIE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CIE_SHIFT)) & USDHC_INT_STATUS_CIE_MASK)
-#define USDHC_INT_STATUS_DTOE_MASK               (0x100000U)
-#define USDHC_INT_STATUS_DTOE_SHIFT              (20U)
-#define USDHC_INT_STATUS_DTOE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DTOE_SHIFT)) & USDHC_INT_STATUS_DTOE_MASK)
-#define USDHC_INT_STATUS_DCE_MASK                (0x200000U)
-#define USDHC_INT_STATUS_DCE_SHIFT               (21U)
-#define USDHC_INT_STATUS_DCE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DCE_SHIFT)) & USDHC_INT_STATUS_DCE_MASK)
-#define USDHC_INT_STATUS_DEBE_MASK               (0x400000U)
-#define USDHC_INT_STATUS_DEBE_SHIFT              (22U)
-#define USDHC_INT_STATUS_DEBE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DEBE_SHIFT)) & USDHC_INT_STATUS_DEBE_MASK)
-#define USDHC_INT_STATUS_AC12E_MASK              (0x1000000U)
-#define USDHC_INT_STATUS_AC12E_SHIFT             (24U)
-#define USDHC_INT_STATUS_AC12E(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_AC12E_SHIFT)) & USDHC_INT_STATUS_AC12E_MASK)
-#define USDHC_INT_STATUS_TNE_MASK                (0x4000000U)
-#define USDHC_INT_STATUS_TNE_SHIFT               (26U)
-#define USDHC_INT_STATUS_TNE(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TNE_SHIFT)) & USDHC_INT_STATUS_TNE_MASK)
-#define USDHC_INT_STATUS_DMAE_MASK               (0x10000000U)
-#define USDHC_INT_STATUS_DMAE_SHIFT              (28U)
-#define USDHC_INT_STATUS_DMAE(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DMAE_SHIFT)) & USDHC_INT_STATUS_DMAE_MASK)
+#define USDHC_INT_STATUS_CC_MASK   (0x1U)
+#define USDHC_INT_STATUS_CC_SHIFT  (0U)
+#define USDHC_INT_STATUS_CC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CC_SHIFT)) & USDHC_INT_STATUS_CC_MASK)
+#define USDHC_INT_STATUS_TC_MASK   (0x2U)
+#define USDHC_INT_STATUS_TC_SHIFT  (1U)
+#define USDHC_INT_STATUS_TC(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TC_SHIFT)) & USDHC_INT_STATUS_TC_MASK)
+#define USDHC_INT_STATUS_BGE_MASK  (0x4U)
+#define USDHC_INT_STATUS_BGE_SHIFT (2U)
+#define USDHC_INT_STATUS_BGE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BGE_SHIFT)) & USDHC_INT_STATUS_BGE_MASK)
+#define USDHC_INT_STATUS_DINT_MASK  (0x8U)
+#define USDHC_INT_STATUS_DINT_SHIFT (3U)
+#define USDHC_INT_STATUS_DINT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DINT_SHIFT)) & USDHC_INT_STATUS_DINT_MASK)
+#define USDHC_INT_STATUS_BWR_MASK  (0x10U)
+#define USDHC_INT_STATUS_BWR_SHIFT (4U)
+#define USDHC_INT_STATUS_BWR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BWR_SHIFT)) & USDHC_INT_STATUS_BWR_MASK)
+#define USDHC_INT_STATUS_BRR_MASK  (0x20U)
+#define USDHC_INT_STATUS_BRR_SHIFT (5U)
+#define USDHC_INT_STATUS_BRR(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_BRR_SHIFT)) & USDHC_INT_STATUS_BRR_MASK)
+#define USDHC_INT_STATUS_CINS_MASK  (0x40U)
+#define USDHC_INT_STATUS_CINS_SHIFT (6U)
+#define USDHC_INT_STATUS_CINS(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINS_SHIFT)) & USDHC_INT_STATUS_CINS_MASK)
+#define USDHC_INT_STATUS_CRM_MASK  (0x80U)
+#define USDHC_INT_STATUS_CRM_SHIFT (7U)
+#define USDHC_INT_STATUS_CRM(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CRM_SHIFT)) & USDHC_INT_STATUS_CRM_MASK)
+#define USDHC_INT_STATUS_CINT_MASK  (0x100U)
+#define USDHC_INT_STATUS_CINT_SHIFT (8U)
+#define USDHC_INT_STATUS_CINT(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CINT_SHIFT)) & USDHC_INT_STATUS_CINT_MASK)
+#define USDHC_INT_STATUS_RTE_MASK  (0x1000U)
+#define USDHC_INT_STATUS_RTE_SHIFT (12U)
+#define USDHC_INT_STATUS_RTE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_RTE_SHIFT)) & USDHC_INT_STATUS_RTE_MASK)
+#define USDHC_INT_STATUS_TP_MASK    (0x4000U)
+#define USDHC_INT_STATUS_TP_SHIFT   (14U)
+#define USDHC_INT_STATUS_TP(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TP_SHIFT)) & USDHC_INT_STATUS_TP_MASK)
+#define USDHC_INT_STATUS_CTOE_MASK  (0x10000U)
+#define USDHC_INT_STATUS_CTOE_SHIFT (16U)
+#define USDHC_INT_STATUS_CTOE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CTOE_SHIFT)) & USDHC_INT_STATUS_CTOE_MASK)
+#define USDHC_INT_STATUS_CCE_MASK  (0x20000U)
+#define USDHC_INT_STATUS_CCE_SHIFT (17U)
+#define USDHC_INT_STATUS_CCE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CCE_SHIFT)) & USDHC_INT_STATUS_CCE_MASK)
+#define USDHC_INT_STATUS_CEBE_MASK  (0x40000U)
+#define USDHC_INT_STATUS_CEBE_SHIFT (18U)
+#define USDHC_INT_STATUS_CEBE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CEBE_SHIFT)) & USDHC_INT_STATUS_CEBE_MASK)
+#define USDHC_INT_STATUS_CIE_MASK  (0x80000U)
+#define USDHC_INT_STATUS_CIE_SHIFT (19U)
+#define USDHC_INT_STATUS_CIE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_CIE_SHIFT)) & USDHC_INT_STATUS_CIE_MASK)
+#define USDHC_INT_STATUS_DTOE_MASK  (0x100000U)
+#define USDHC_INT_STATUS_DTOE_SHIFT (20U)
+#define USDHC_INT_STATUS_DTOE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DTOE_SHIFT)) & USDHC_INT_STATUS_DTOE_MASK)
+#define USDHC_INT_STATUS_DCE_MASK  (0x200000U)
+#define USDHC_INT_STATUS_DCE_SHIFT (21U)
+#define USDHC_INT_STATUS_DCE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DCE_SHIFT)) & USDHC_INT_STATUS_DCE_MASK)
+#define USDHC_INT_STATUS_DEBE_MASK  (0x400000U)
+#define USDHC_INT_STATUS_DEBE_SHIFT (22U)
+#define USDHC_INT_STATUS_DEBE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DEBE_SHIFT)) & USDHC_INT_STATUS_DEBE_MASK)
+#define USDHC_INT_STATUS_AC12E_MASK  (0x1000000U)
+#define USDHC_INT_STATUS_AC12E_SHIFT (24U)
+#define USDHC_INT_STATUS_AC12E(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_AC12E_SHIFT)) & USDHC_INT_STATUS_AC12E_MASK)
+#define USDHC_INT_STATUS_TNE_MASK  (0x4000000U)
+#define USDHC_INT_STATUS_TNE_SHIFT (26U)
+#define USDHC_INT_STATUS_TNE(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_TNE_SHIFT)) & USDHC_INT_STATUS_TNE_MASK)
+#define USDHC_INT_STATUS_DMAE_MASK  (0x10000000U)
+#define USDHC_INT_STATUS_DMAE_SHIFT (28U)
+#define USDHC_INT_STATUS_DMAE(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_DMAE_SHIFT)) & USDHC_INT_STATUS_DMAE_MASK)
 /*! @} */
 
 /*! @name INT_STATUS_EN - Interrupt Status Enable */
 /*! @{ */
-#define USDHC_INT_STATUS_EN_CCSEN_MASK           (0x1U)
-#define USDHC_INT_STATUS_EN_CCSEN_SHIFT          (0U)
-#define USDHC_INT_STATUS_EN_CCSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCSEN_SHIFT)) & USDHC_INT_STATUS_EN_CCSEN_MASK)
-#define USDHC_INT_STATUS_EN_TCSEN_MASK           (0x2U)
-#define USDHC_INT_STATUS_EN_TCSEN_SHIFT          (1U)
-#define USDHC_INT_STATUS_EN_TCSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TCSEN_SHIFT)) & USDHC_INT_STATUS_EN_TCSEN_MASK)
-#define USDHC_INT_STATUS_EN_BGESEN_MASK          (0x4U)
-#define USDHC_INT_STATUS_EN_BGESEN_SHIFT         (2U)
-#define USDHC_INT_STATUS_EN_BGESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BGESEN_SHIFT)) & USDHC_INT_STATUS_EN_BGESEN_MASK)
-#define USDHC_INT_STATUS_EN_DINTSEN_MASK         (0x8U)
-#define USDHC_INT_STATUS_EN_DINTSEN_SHIFT        (3U)
-#define USDHC_INT_STATUS_EN_DINTSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_DINTSEN_MASK)
-#define USDHC_INT_STATUS_EN_BWRSEN_MASK          (0x10U)
-#define USDHC_INT_STATUS_EN_BWRSEN_SHIFT         (4U)
-#define USDHC_INT_STATUS_EN_BWRSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BWRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BWRSEN_MASK)
-#define USDHC_INT_STATUS_EN_BRRSEN_MASK          (0x20U)
-#define USDHC_INT_STATUS_EN_BRRSEN_SHIFT         (5U)
-#define USDHC_INT_STATUS_EN_BRRSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BRRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BRRSEN_MASK)
-#define USDHC_INT_STATUS_EN_CINSSEN_MASK         (0x40U)
-#define USDHC_INT_STATUS_EN_CINSSEN_SHIFT        (6U)
-#define USDHC_INT_STATUS_EN_CINSSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINSSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINSSEN_MASK)
-#define USDHC_INT_STATUS_EN_CRMSEN_MASK          (0x80U)
-#define USDHC_INT_STATUS_EN_CRMSEN_SHIFT         (7U)
-#define USDHC_INT_STATUS_EN_CRMSEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CRMSEN_SHIFT)) & USDHC_INT_STATUS_EN_CRMSEN_MASK)
-#define USDHC_INT_STATUS_EN_CINTSEN_MASK         (0x100U)
-#define USDHC_INT_STATUS_EN_CINTSEN_SHIFT        (8U)
-#define USDHC_INT_STATUS_EN_CINTSEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINTSEN_MASK)
-#define USDHC_INT_STATUS_EN_RTESEN_MASK          (0x1000U)
-#define USDHC_INT_STATUS_EN_RTESEN_SHIFT         (12U)
-#define USDHC_INT_STATUS_EN_RTESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_RTESEN_SHIFT)) & USDHC_INT_STATUS_EN_RTESEN_MASK)
-#define USDHC_INT_STATUS_EN_TPSEN_MASK           (0x4000U)
-#define USDHC_INT_STATUS_EN_TPSEN_SHIFT          (14U)
-#define USDHC_INT_STATUS_EN_TPSEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TPSEN_SHIFT)) & USDHC_INT_STATUS_EN_TPSEN_MASK)
-#define USDHC_INT_STATUS_EN_CTOESEN_MASK         (0x10000U)
-#define USDHC_INT_STATUS_EN_CTOESEN_SHIFT        (16U)
-#define USDHC_INT_STATUS_EN_CTOESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_CTOESEN_MASK)
-#define USDHC_INT_STATUS_EN_CCESEN_MASK          (0x20000U)
-#define USDHC_INT_STATUS_EN_CCESEN_SHIFT         (17U)
-#define USDHC_INT_STATUS_EN_CCESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCESEN_SHIFT)) & USDHC_INT_STATUS_EN_CCESEN_MASK)
-#define USDHC_INT_STATUS_EN_CEBESEN_MASK         (0x40000U)
-#define USDHC_INT_STATUS_EN_CEBESEN_SHIFT        (18U)
-#define USDHC_INT_STATUS_EN_CEBESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_CEBESEN_MASK)
-#define USDHC_INT_STATUS_EN_CIESEN_MASK          (0x80000U)
-#define USDHC_INT_STATUS_EN_CIESEN_SHIFT         (19U)
-#define USDHC_INT_STATUS_EN_CIESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CIESEN_SHIFT)) & USDHC_INT_STATUS_EN_CIESEN_MASK)
-#define USDHC_INT_STATUS_EN_DTOESEN_MASK         (0x100000U)
-#define USDHC_INT_STATUS_EN_DTOESEN_SHIFT        (20U)
-#define USDHC_INT_STATUS_EN_DTOESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_DTOESEN_MASK)
-#define USDHC_INT_STATUS_EN_DCESEN_MASK          (0x200000U)
-#define USDHC_INT_STATUS_EN_DCESEN_SHIFT         (21U)
-#define USDHC_INT_STATUS_EN_DCESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DCESEN_SHIFT)) & USDHC_INT_STATUS_EN_DCESEN_MASK)
-#define USDHC_INT_STATUS_EN_DEBESEN_MASK         (0x400000U)
-#define USDHC_INT_STATUS_EN_DEBESEN_SHIFT        (22U)
-#define USDHC_INT_STATUS_EN_DEBESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_DEBESEN_MASK)
-#define USDHC_INT_STATUS_EN_AC12ESEN_MASK        (0x1000000U)
-#define USDHC_INT_STATUS_EN_AC12ESEN_SHIFT       (24U)
-#define USDHC_INT_STATUS_EN_AC12ESEN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_AC12ESEN_SHIFT)) & USDHC_INT_STATUS_EN_AC12ESEN_MASK)
-#define USDHC_INT_STATUS_EN_TNESEN_MASK          (0x4000000U)
-#define USDHC_INT_STATUS_EN_TNESEN_SHIFT         (26U)
-#define USDHC_INT_STATUS_EN_TNESEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TNESEN_SHIFT)) & USDHC_INT_STATUS_EN_TNESEN_MASK)
-#define USDHC_INT_STATUS_EN_DMAESEN_MASK         (0x10000000U)
-#define USDHC_INT_STATUS_EN_DMAESEN_SHIFT        (28U)
-#define USDHC_INT_STATUS_EN_DMAESEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DMAESEN_SHIFT)) & USDHC_INT_STATUS_EN_DMAESEN_MASK)
+#define USDHC_INT_STATUS_EN_CCSEN_MASK  (0x1U)
+#define USDHC_INT_STATUS_EN_CCSEN_SHIFT (0U)
+#define USDHC_INT_STATUS_EN_CCSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCSEN_SHIFT)) & USDHC_INT_STATUS_EN_CCSEN_MASK)
+#define USDHC_INT_STATUS_EN_TCSEN_MASK  (0x2U)
+#define USDHC_INT_STATUS_EN_TCSEN_SHIFT (1U)
+#define USDHC_INT_STATUS_EN_TCSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TCSEN_SHIFT)) & USDHC_INT_STATUS_EN_TCSEN_MASK)
+#define USDHC_INT_STATUS_EN_BGESEN_MASK  (0x4U)
+#define USDHC_INT_STATUS_EN_BGESEN_SHIFT (2U)
+#define USDHC_INT_STATUS_EN_BGESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BGESEN_SHIFT)) & USDHC_INT_STATUS_EN_BGESEN_MASK)
+#define USDHC_INT_STATUS_EN_DINTSEN_MASK  (0x8U)
+#define USDHC_INT_STATUS_EN_DINTSEN_SHIFT (3U)
+#define USDHC_INT_STATUS_EN_DINTSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_DINTSEN_MASK)
+#define USDHC_INT_STATUS_EN_BWRSEN_MASK  (0x10U)
+#define USDHC_INT_STATUS_EN_BWRSEN_SHIFT (4U)
+#define USDHC_INT_STATUS_EN_BWRSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BWRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BWRSEN_MASK)
+#define USDHC_INT_STATUS_EN_BRRSEN_MASK  (0x20U)
+#define USDHC_INT_STATUS_EN_BRRSEN_SHIFT (5U)
+#define USDHC_INT_STATUS_EN_BRRSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_BRRSEN_SHIFT)) & USDHC_INT_STATUS_EN_BRRSEN_MASK)
+#define USDHC_INT_STATUS_EN_CINSSEN_MASK  (0x40U)
+#define USDHC_INT_STATUS_EN_CINSSEN_SHIFT (6U)
+#define USDHC_INT_STATUS_EN_CINSSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINSSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINSSEN_MASK)
+#define USDHC_INT_STATUS_EN_CRMSEN_MASK  (0x80U)
+#define USDHC_INT_STATUS_EN_CRMSEN_SHIFT (7U)
+#define USDHC_INT_STATUS_EN_CRMSEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CRMSEN_SHIFT)) & USDHC_INT_STATUS_EN_CRMSEN_MASK)
+#define USDHC_INT_STATUS_EN_CINTSEN_MASK  (0x100U)
+#define USDHC_INT_STATUS_EN_CINTSEN_SHIFT (8U)
+#define USDHC_INT_STATUS_EN_CINTSEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CINTSEN_SHIFT)) & USDHC_INT_STATUS_EN_CINTSEN_MASK)
+#define USDHC_INT_STATUS_EN_RTESEN_MASK  (0x1000U)
+#define USDHC_INT_STATUS_EN_RTESEN_SHIFT (12U)
+#define USDHC_INT_STATUS_EN_RTESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_RTESEN_SHIFT)) & USDHC_INT_STATUS_EN_RTESEN_MASK)
+#define USDHC_INT_STATUS_EN_TPSEN_MASK  (0x4000U)
+#define USDHC_INT_STATUS_EN_TPSEN_SHIFT (14U)
+#define USDHC_INT_STATUS_EN_TPSEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TPSEN_SHIFT)) & USDHC_INT_STATUS_EN_TPSEN_MASK)
+#define USDHC_INT_STATUS_EN_CTOESEN_MASK  (0x10000U)
+#define USDHC_INT_STATUS_EN_CTOESEN_SHIFT (16U)
+#define USDHC_INT_STATUS_EN_CTOESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_CTOESEN_MASK)
+#define USDHC_INT_STATUS_EN_CCESEN_MASK  (0x20000U)
+#define USDHC_INT_STATUS_EN_CCESEN_SHIFT (17U)
+#define USDHC_INT_STATUS_EN_CCESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CCESEN_SHIFT)) & USDHC_INT_STATUS_EN_CCESEN_MASK)
+#define USDHC_INT_STATUS_EN_CEBESEN_MASK  (0x40000U)
+#define USDHC_INT_STATUS_EN_CEBESEN_SHIFT (18U)
+#define USDHC_INT_STATUS_EN_CEBESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_CEBESEN_MASK)
+#define USDHC_INT_STATUS_EN_CIESEN_MASK  (0x80000U)
+#define USDHC_INT_STATUS_EN_CIESEN_SHIFT (19U)
+#define USDHC_INT_STATUS_EN_CIESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_CIESEN_SHIFT)) & USDHC_INT_STATUS_EN_CIESEN_MASK)
+#define USDHC_INT_STATUS_EN_DTOESEN_MASK  (0x100000U)
+#define USDHC_INT_STATUS_EN_DTOESEN_SHIFT (20U)
+#define USDHC_INT_STATUS_EN_DTOESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DTOESEN_SHIFT)) & USDHC_INT_STATUS_EN_DTOESEN_MASK)
+#define USDHC_INT_STATUS_EN_DCESEN_MASK  (0x200000U)
+#define USDHC_INT_STATUS_EN_DCESEN_SHIFT (21U)
+#define USDHC_INT_STATUS_EN_DCESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DCESEN_SHIFT)) & USDHC_INT_STATUS_EN_DCESEN_MASK)
+#define USDHC_INT_STATUS_EN_DEBESEN_MASK  (0x400000U)
+#define USDHC_INT_STATUS_EN_DEBESEN_SHIFT (22U)
+#define USDHC_INT_STATUS_EN_DEBESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DEBESEN_SHIFT)) & USDHC_INT_STATUS_EN_DEBESEN_MASK)
+#define USDHC_INT_STATUS_EN_AC12ESEN_MASK  (0x1000000U)
+#define USDHC_INT_STATUS_EN_AC12ESEN_SHIFT (24U)
+#define USDHC_INT_STATUS_EN_AC12ESEN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_AC12ESEN_SHIFT)) & USDHC_INT_STATUS_EN_AC12ESEN_MASK)
+#define USDHC_INT_STATUS_EN_TNESEN_MASK  (0x4000000U)
+#define USDHC_INT_STATUS_EN_TNESEN_SHIFT (26U)
+#define USDHC_INT_STATUS_EN_TNESEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_TNESEN_SHIFT)) & USDHC_INT_STATUS_EN_TNESEN_MASK)
+#define USDHC_INT_STATUS_EN_DMAESEN_MASK  (0x10000000U)
+#define USDHC_INT_STATUS_EN_DMAESEN_SHIFT (28U)
+#define USDHC_INT_STATUS_EN_DMAESEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_STATUS_EN_DMAESEN_SHIFT)) & USDHC_INT_STATUS_EN_DMAESEN_MASK)
 /*! @} */
 
 /*! @name INT_SIGNAL_EN - Interrupt Signal Enable */
 /*! @{ */
-#define USDHC_INT_SIGNAL_EN_CCIEN_MASK           (0x1U)
-#define USDHC_INT_SIGNAL_EN_CCIEN_SHIFT          (0U)
-#define USDHC_INT_SIGNAL_EN_CCIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TCIEN_MASK           (0x2U)
-#define USDHC_INT_SIGNAL_EN_TCIEN_SHIFT          (1U)
-#define USDHC_INT_SIGNAL_EN_TCIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TCIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BGEIEN_MASK          (0x4U)
-#define USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT         (2U)
-#define USDHC_INT_SIGNAL_EN_BGEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BGEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DINTIEN_MASK         (0x8U)
-#define USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT        (3U)
-#define USDHC_INT_SIGNAL_EN_DINTIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DINTIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BWRIEN_MASK          (0x10U)
-#define USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT         (4U)
-#define USDHC_INT_SIGNAL_EN_BWRIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BWRIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_BRRIEN_MASK          (0x20U)
-#define USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT         (5U)
-#define USDHC_INT_SIGNAL_EN_BRRIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BRRIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CINSIEN_MASK         (0x40U)
-#define USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT        (6U)
-#define USDHC_INT_SIGNAL_EN_CINSIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINSIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CRMIEN_MASK          (0x80U)
-#define USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT         (7U)
-#define USDHC_INT_SIGNAL_EN_CRMIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CRMIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CINTIEN_MASK         (0x100U)
-#define USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT        (8U)
-#define USDHC_INT_SIGNAL_EN_CINTIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINTIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_RTEIEN_MASK          (0x1000U)
-#define USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT         (12U)
-#define USDHC_INT_SIGNAL_EN_RTEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_RTEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TPIEN_MASK           (0x4000U)
-#define USDHC_INT_SIGNAL_EN_TPIEN_SHIFT          (14U)
-#define USDHC_INT_SIGNAL_EN_TPIEN(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TPIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TPIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN_MASK         (0x10000U)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT        (16U)
-#define USDHC_INT_SIGNAL_EN_CTOEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CTOEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CCEIEN_MASK          (0x20000U)
-#define USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT         (17U)
-#define USDHC_INT_SIGNAL_EN_CCEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN_MASK         (0x40000U)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT        (18U)
-#define USDHC_INT_SIGNAL_EN_CEBEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CEBEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_CIEIEN_MASK          (0x80000U)
-#define USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT         (19U)
-#define USDHC_INT_SIGNAL_EN_CIEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CIEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN_MASK         (0x100000U)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT        (20U)
-#define USDHC_INT_SIGNAL_EN_DTOEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DTOEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DCEIEN_MASK          (0x200000U)
-#define USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT         (21U)
-#define USDHC_INT_SIGNAL_EN_DCEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DCEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN_MASK         (0x400000U)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT        (22U)
-#define USDHC_INT_SIGNAL_EN_DEBEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DEBEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN_MASK        (0x1000000U)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT       (24U)
-#define USDHC_INT_SIGNAL_EN_AC12EIEN(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_AC12EIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_TNEIEN_MASK          (0x4000000U)
-#define USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT         (26U)
-#define USDHC_INT_SIGNAL_EN_TNEIEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TNEIEN_MASK)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN_MASK         (0x10000000U)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT        (28U)
-#define USDHC_INT_SIGNAL_EN_DMAEIEN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DMAEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CCIEN_MASK  (0x1U)
+#define USDHC_INT_SIGNAL_EN_CCIEN_SHIFT (0U)
+#define USDHC_INT_SIGNAL_EN_CCIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TCIEN_MASK  (0x2U)
+#define USDHC_INT_SIGNAL_EN_TCIEN_SHIFT (1U)
+#define USDHC_INT_SIGNAL_EN_TCIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TCIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TCIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BGEIEN_MASK  (0x4U)
+#define USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT (2U)
+#define USDHC_INT_SIGNAL_EN_BGEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BGEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BGEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DINTIEN_MASK  (0x8U)
+#define USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT (3U)
+#define USDHC_INT_SIGNAL_EN_DINTIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DINTIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BWRIEN_MASK  (0x10U)
+#define USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT (4U)
+#define USDHC_INT_SIGNAL_EN_BWRIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BWRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BWRIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_BRRIEN_MASK  (0x20U)
+#define USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT (5U)
+#define USDHC_INT_SIGNAL_EN_BRRIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_BRRIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_BRRIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CINSIEN_MASK  (0x40U)
+#define USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT (6U)
+#define USDHC_INT_SIGNAL_EN_CINSIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINSIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINSIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CRMIEN_MASK  (0x80U)
+#define USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT (7U)
+#define USDHC_INT_SIGNAL_EN_CRMIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CRMIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CRMIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CINTIEN_MASK  (0x100U)
+#define USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT (8U)
+#define USDHC_INT_SIGNAL_EN_CINTIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CINTIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CINTIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_RTEIEN_MASK  (0x1000U)
+#define USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT (12U)
+#define USDHC_INT_SIGNAL_EN_RTEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_RTEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_RTEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TPIEN_MASK  (0x4000U)
+#define USDHC_INT_SIGNAL_EN_TPIEN_SHIFT (14U)
+#define USDHC_INT_SIGNAL_EN_TPIEN(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TPIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TPIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN_MASK  (0x10000U)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT (16U)
+#define USDHC_INT_SIGNAL_EN_CTOEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CTOEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CCEIEN_MASK  (0x20000U)
+#define USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT (17U)
+#define USDHC_INT_SIGNAL_EN_CCEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CCEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN_MASK  (0x40000U)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT (18U)
+#define USDHC_INT_SIGNAL_EN_CEBEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CEBEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_CIEIEN_MASK  (0x80000U)
+#define USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT (19U)
+#define USDHC_INT_SIGNAL_EN_CIEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_CIEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_CIEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN_MASK  (0x100000U)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT (20U)
+#define USDHC_INT_SIGNAL_EN_DTOEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DTOEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DTOEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DCEIEN_MASK  (0x200000U)
+#define USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT (21U)
+#define USDHC_INT_SIGNAL_EN_DCEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DCEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DCEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN_MASK  (0x400000U)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT (22U)
+#define USDHC_INT_SIGNAL_EN_DEBEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DEBEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DEBEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN_MASK  (0x1000000U)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT (24U)
+#define USDHC_INT_SIGNAL_EN_AC12EIEN(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_AC12EIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_AC12EIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_TNEIEN_MASK  (0x4000000U)
+#define USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT (26U)
+#define USDHC_INT_SIGNAL_EN_TNEIEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_TNEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_TNEIEN_MASK)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN_MASK  (0x10000000U)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT (28U)
+#define USDHC_INT_SIGNAL_EN_DMAEIEN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_INT_SIGNAL_EN_DMAEIEN_SHIFT)) & USDHC_INT_SIGNAL_EN_DMAEIEN_MASK)
 /*! @} */
 
 /*! @name AUTOCMD12_ERR_STATUS - Auto CMD12 Error Status */
 /*! @{ */
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK   (0x1U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT  (0U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK  (0x1U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT (0U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12NE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12NE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK  (0x2U)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT (1U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12TOE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_SHIFT)) &                                       \
+     USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK  (0x4U)
 #define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT (2U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK   (0x8U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT  (3U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK   (0x10U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT  (4U)
-#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK (0x80U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12EBE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_SHIFT)) &                                       \
+     USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK  (0x8U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT (3U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12CE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12CE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK  (0x10U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT (4U)
+#define USDHC_AUTOCMD12_ERR_STATUS_AC12IE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_AC12IE_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK  (0x80U)
 #define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT (7U)
-#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK (0x400000U)
+#define USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_SHIFT)) &                                     \
+     USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK  (0x400000U)
 #define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT (22U)
-#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING(x) (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK)
-#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK (0x800000U)
+#define USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_SHIFT)) &                                \
+     USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK  (0x800000U)
 #define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT (23U)
-#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL(x) (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT)) & USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK)
+#define USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_SHIFT)) &                                   \
+     USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK)
 /*! @} */
 
 /*! @name HOST_CTRL_CAP - Host Controller Capabilities */
 /*! @{ */
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK   (0x1U)
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT  (0U)
-#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK  (0x1U)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT (0U)
+#define USDHC_HOST_CTRL_CAP_SDR50_SUPPORT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK)
 #define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK  (0x2U)
 #define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT (1U)
-#define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK   (0x4U)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT  (2U)
-#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK)
-#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK (0xF00U)
+#define USDHC_HOST_CTRL_CAP_SDR104_SUPPORT(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_SHIFT)) &                                       \
+     USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK  (0x4U)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT (2U)
+#define USDHC_HOST_CTRL_CAP_DDR50_SUPPORT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_SHIFT)) & USDHC_HOST_CTRL_CAP_DDR50_SUPPORT_MASK)
+#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK  (0xF00U)
 #define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT (8U)
-#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(x) (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT)) & USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK)
-#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK (0x2000U)
+#define USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_SHIFT)) &                                  \
+     USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK)
+#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK  (0x2000U)
 #define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT (13U)
-#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT)) & USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK   (0xC000U)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT  (14U)
-#define USDHC_HOST_CTRL_CAP_RETUNING_MODE(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT)) & USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK)
-#define USDHC_HOST_CTRL_CAP_MBL_MASK             (0x70000U)
-#define USDHC_HOST_CTRL_CAP_MBL_SHIFT            (16U)
-#define USDHC_HOST_CTRL_CAP_MBL(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_MBL_SHIFT)) & USDHC_HOST_CTRL_CAP_MBL_MASK)
-#define USDHC_HOST_CTRL_CAP_ADMAS_MASK           (0x100000U)
-#define USDHC_HOST_CTRL_CAP_ADMAS_SHIFT          (20U)
-#define USDHC_HOST_CTRL_CAP_ADMAS(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_ADMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_ADMAS_MASK)
-#define USDHC_HOST_CTRL_CAP_HSS_MASK             (0x200000U)
-#define USDHC_HOST_CTRL_CAP_HSS_SHIFT            (21U)
-#define USDHC_HOST_CTRL_CAP_HSS(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_HSS_SHIFT)) & USDHC_HOST_CTRL_CAP_HSS_MASK)
-#define USDHC_HOST_CTRL_CAP_DMAS_MASK            (0x400000U)
-#define USDHC_HOST_CTRL_CAP_DMAS_SHIFT           (22U)
-#define USDHC_HOST_CTRL_CAP_DMAS(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_DMAS_MASK)
-#define USDHC_HOST_CTRL_CAP_SRS_MASK             (0x800000U)
-#define USDHC_HOST_CTRL_CAP_SRS_SHIFT            (23U)
-#define USDHC_HOST_CTRL_CAP_SRS(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SRS_SHIFT)) & USDHC_HOST_CTRL_CAP_SRS_MASK)
-#define USDHC_HOST_CTRL_CAP_VS33_MASK            (0x1000000U)
-#define USDHC_HOST_CTRL_CAP_VS33_SHIFT           (24U)
-#define USDHC_HOST_CTRL_CAP_VS33(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS33_SHIFT)) & USDHC_HOST_CTRL_CAP_VS33_MASK)
-#define USDHC_HOST_CTRL_CAP_VS30_MASK            (0x2000000U)
-#define USDHC_HOST_CTRL_CAP_VS30_SHIFT           (25U)
-#define USDHC_HOST_CTRL_CAP_VS30(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS30_SHIFT)) & USDHC_HOST_CTRL_CAP_VS30_MASK)
-#define USDHC_HOST_CTRL_CAP_VS18_MASK            (0x4000000U)
-#define USDHC_HOST_CTRL_CAP_VS18_SHIFT           (26U)
-#define USDHC_HOST_CTRL_CAP_VS18(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS18_SHIFT)) & USDHC_HOST_CTRL_CAP_VS18_MASK)
+#define USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_SHIFT)) &                                     \
+     USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK  (0xC000U)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT (14U)
+#define USDHC_HOST_CTRL_CAP_RETUNING_MODE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_RETUNING_MODE_SHIFT)) & USDHC_HOST_CTRL_CAP_RETUNING_MODE_MASK)
+#define USDHC_HOST_CTRL_CAP_MBL_MASK  (0x70000U)
+#define USDHC_HOST_CTRL_CAP_MBL_SHIFT (16U)
+#define USDHC_HOST_CTRL_CAP_MBL(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_MBL_SHIFT)) & USDHC_HOST_CTRL_CAP_MBL_MASK)
+#define USDHC_HOST_CTRL_CAP_ADMAS_MASK  (0x100000U)
+#define USDHC_HOST_CTRL_CAP_ADMAS_SHIFT (20U)
+#define USDHC_HOST_CTRL_CAP_ADMAS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_ADMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_ADMAS_MASK)
+#define USDHC_HOST_CTRL_CAP_HSS_MASK  (0x200000U)
+#define USDHC_HOST_CTRL_CAP_HSS_SHIFT (21U)
+#define USDHC_HOST_CTRL_CAP_HSS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_HSS_SHIFT)) & USDHC_HOST_CTRL_CAP_HSS_MASK)
+#define USDHC_HOST_CTRL_CAP_DMAS_MASK  (0x400000U)
+#define USDHC_HOST_CTRL_CAP_DMAS_SHIFT (22U)
+#define USDHC_HOST_CTRL_CAP_DMAS(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_DMAS_SHIFT)) & USDHC_HOST_CTRL_CAP_DMAS_MASK)
+#define USDHC_HOST_CTRL_CAP_SRS_MASK  (0x800000U)
+#define USDHC_HOST_CTRL_CAP_SRS_SHIFT (23U)
+#define USDHC_HOST_CTRL_CAP_SRS(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_SRS_SHIFT)) & USDHC_HOST_CTRL_CAP_SRS_MASK)
+#define USDHC_HOST_CTRL_CAP_VS33_MASK  (0x1000000U)
+#define USDHC_HOST_CTRL_CAP_VS33_SHIFT (24U)
+#define USDHC_HOST_CTRL_CAP_VS33(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS33_SHIFT)) & USDHC_HOST_CTRL_CAP_VS33_MASK)
+#define USDHC_HOST_CTRL_CAP_VS30_MASK  (0x2000000U)
+#define USDHC_HOST_CTRL_CAP_VS30_SHIFT (25U)
+#define USDHC_HOST_CTRL_CAP_VS30(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS30_SHIFT)) & USDHC_HOST_CTRL_CAP_VS30_MASK)
+#define USDHC_HOST_CTRL_CAP_VS18_MASK  (0x4000000U)
+#define USDHC_HOST_CTRL_CAP_VS18_SHIFT (26U)
+#define USDHC_HOST_CTRL_CAP_VS18(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_HOST_CTRL_CAP_VS18_SHIFT)) & USDHC_HOST_CTRL_CAP_VS18_MASK)
 /*! @} */
 
 /*! @name WTMK_LVL - Watermark Level */
 /*! @{ */
-#define USDHC_WTMK_LVL_RD_WML_MASK               (0xFFU)
-#define USDHC_WTMK_LVL_RD_WML_SHIFT              (0U)
-#define USDHC_WTMK_LVL_RD_WML(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_WML_SHIFT)) & USDHC_WTMK_LVL_RD_WML_MASK)
-#define USDHC_WTMK_LVL_RD_BRST_LEN_MASK          (0x1F00U)
-#define USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT         (8U)
-#define USDHC_WTMK_LVL_RD_BRST_LEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_RD_BRST_LEN_MASK)
-#define USDHC_WTMK_LVL_WR_WML_MASK               (0xFF0000U)
-#define USDHC_WTMK_LVL_WR_WML_SHIFT              (16U)
-#define USDHC_WTMK_LVL_WR_WML(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_WML_SHIFT)) & USDHC_WTMK_LVL_WR_WML_MASK)
-#define USDHC_WTMK_LVL_WR_BRST_LEN_MASK          (0x1F000000U)
-#define USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT         (24U)
-#define USDHC_WTMK_LVL_WR_BRST_LEN(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_WR_BRST_LEN_MASK)
+#define USDHC_WTMK_LVL_RD_WML_MASK  (0xFFU)
+#define USDHC_WTMK_LVL_RD_WML_SHIFT (0U)
+#define USDHC_WTMK_LVL_RD_WML(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_WML_SHIFT)) & USDHC_WTMK_LVL_RD_WML_MASK)
+#define USDHC_WTMK_LVL_RD_BRST_LEN_MASK  (0x1F00U)
+#define USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT (8U)
+#define USDHC_WTMK_LVL_RD_BRST_LEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_RD_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_RD_BRST_LEN_MASK)
+#define USDHC_WTMK_LVL_WR_WML_MASK  (0xFF0000U)
+#define USDHC_WTMK_LVL_WR_WML_SHIFT (16U)
+#define USDHC_WTMK_LVL_WR_WML(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_WML_SHIFT)) & USDHC_WTMK_LVL_WR_WML_MASK)
+#define USDHC_WTMK_LVL_WR_BRST_LEN_MASK  (0x1F000000U)
+#define USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT (24U)
+#define USDHC_WTMK_LVL_WR_BRST_LEN(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_WTMK_LVL_WR_BRST_LEN_SHIFT)) & USDHC_WTMK_LVL_WR_BRST_LEN_MASK)
 /*! @} */
 
 /*! @name MIX_CTRL - Mixer Control */
 /*! @{ */
-#define USDHC_MIX_CTRL_DMAEN_MASK                (0x1U)
-#define USDHC_MIX_CTRL_DMAEN_SHIFT               (0U)
-#define USDHC_MIX_CTRL_DMAEN(x)                  (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DMAEN_SHIFT)) & USDHC_MIX_CTRL_DMAEN_MASK)
-#define USDHC_MIX_CTRL_BCEN_MASK                 (0x2U)
-#define USDHC_MIX_CTRL_BCEN_SHIFT                (1U)
-#define USDHC_MIX_CTRL_BCEN(x)                   (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_BCEN_SHIFT)) & USDHC_MIX_CTRL_BCEN_MASK)
-#define USDHC_MIX_CTRL_AC12EN_MASK               (0x4U)
-#define USDHC_MIX_CTRL_AC12EN_SHIFT              (2U)
-#define USDHC_MIX_CTRL_AC12EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC12EN_SHIFT)) & USDHC_MIX_CTRL_AC12EN_MASK)
-#define USDHC_MIX_CTRL_DDR_EN_MASK               (0x8U)
-#define USDHC_MIX_CTRL_DDR_EN_SHIFT              (3U)
-#define USDHC_MIX_CTRL_DDR_EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DDR_EN_SHIFT)) & USDHC_MIX_CTRL_DDR_EN_MASK)
-#define USDHC_MIX_CTRL_DTDSEL_MASK               (0x10U)
-#define USDHC_MIX_CTRL_DTDSEL_SHIFT              (4U)
-#define USDHC_MIX_CTRL_DTDSEL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DTDSEL_SHIFT)) & USDHC_MIX_CTRL_DTDSEL_MASK)
-#define USDHC_MIX_CTRL_MSBSEL_MASK               (0x20U)
-#define USDHC_MIX_CTRL_MSBSEL_SHIFT              (5U)
-#define USDHC_MIX_CTRL_MSBSEL(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_MSBSEL_SHIFT)) & USDHC_MIX_CTRL_MSBSEL_MASK)
-#define USDHC_MIX_CTRL_NIBBLE_POS_MASK           (0x40U)
-#define USDHC_MIX_CTRL_NIBBLE_POS_SHIFT          (6U)
-#define USDHC_MIX_CTRL_NIBBLE_POS(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_NIBBLE_POS_SHIFT)) & USDHC_MIX_CTRL_NIBBLE_POS_MASK)
-#define USDHC_MIX_CTRL_AC23EN_MASK               (0x80U)
-#define USDHC_MIX_CTRL_AC23EN_SHIFT              (7U)
-#define USDHC_MIX_CTRL_AC23EN(x)                 (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC23EN_SHIFT)) & USDHC_MIX_CTRL_AC23EN_MASK)
-#define USDHC_MIX_CTRL_EXE_TUNE_MASK             (0x400000U)
-#define USDHC_MIX_CTRL_EXE_TUNE_SHIFT            (22U)
-#define USDHC_MIX_CTRL_EXE_TUNE(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_EXE_TUNE_SHIFT)) & USDHC_MIX_CTRL_EXE_TUNE_MASK)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL_MASK          (0x800000U)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT         (23U)
-#define USDHC_MIX_CTRL_SMP_CLK_SEL(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT)) & USDHC_MIX_CTRL_SMP_CLK_SEL_MASK)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK         (0x1000000U)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT        (24U)
-#define USDHC_MIX_CTRL_AUTO_TUNE_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT)) & USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK)
-#define USDHC_MIX_CTRL_FBCLK_SEL_MASK            (0x2000000U)
-#define USDHC_MIX_CTRL_FBCLK_SEL_SHIFT           (25U)
-#define USDHC_MIX_CTRL_FBCLK_SEL(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_FBCLK_SEL_SHIFT)) & USDHC_MIX_CTRL_FBCLK_SEL_MASK)
+#define USDHC_MIX_CTRL_DMAEN_MASK  (0x1U)
+#define USDHC_MIX_CTRL_DMAEN_SHIFT (0U)
+#define USDHC_MIX_CTRL_DMAEN(x)                                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DMAEN_SHIFT)) & USDHC_MIX_CTRL_DMAEN_MASK)
+#define USDHC_MIX_CTRL_BCEN_MASK    (0x2U)
+#define USDHC_MIX_CTRL_BCEN_SHIFT   (1U)
+#define USDHC_MIX_CTRL_BCEN(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_BCEN_SHIFT)) & USDHC_MIX_CTRL_BCEN_MASK)
+#define USDHC_MIX_CTRL_AC12EN_MASK  (0x4U)
+#define USDHC_MIX_CTRL_AC12EN_SHIFT (2U)
+#define USDHC_MIX_CTRL_AC12EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC12EN_SHIFT)) & USDHC_MIX_CTRL_AC12EN_MASK)
+#define USDHC_MIX_CTRL_DDR_EN_MASK  (0x8U)
+#define USDHC_MIX_CTRL_DDR_EN_SHIFT (3U)
+#define USDHC_MIX_CTRL_DDR_EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DDR_EN_SHIFT)) & USDHC_MIX_CTRL_DDR_EN_MASK)
+#define USDHC_MIX_CTRL_DTDSEL_MASK  (0x10U)
+#define USDHC_MIX_CTRL_DTDSEL_SHIFT (4U)
+#define USDHC_MIX_CTRL_DTDSEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_DTDSEL_SHIFT)) & USDHC_MIX_CTRL_DTDSEL_MASK)
+#define USDHC_MIX_CTRL_MSBSEL_MASK  (0x20U)
+#define USDHC_MIX_CTRL_MSBSEL_SHIFT (5U)
+#define USDHC_MIX_CTRL_MSBSEL(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_MSBSEL_SHIFT)) & USDHC_MIX_CTRL_MSBSEL_MASK)
+#define USDHC_MIX_CTRL_NIBBLE_POS_MASK  (0x40U)
+#define USDHC_MIX_CTRL_NIBBLE_POS_SHIFT (6U)
+#define USDHC_MIX_CTRL_NIBBLE_POS(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_NIBBLE_POS_SHIFT)) & USDHC_MIX_CTRL_NIBBLE_POS_MASK)
+#define USDHC_MIX_CTRL_AC23EN_MASK  (0x80U)
+#define USDHC_MIX_CTRL_AC23EN_SHIFT (7U)
+#define USDHC_MIX_CTRL_AC23EN(x)                                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AC23EN_SHIFT)) & USDHC_MIX_CTRL_AC23EN_MASK)
+#define USDHC_MIX_CTRL_EXE_TUNE_MASK  (0x400000U)
+#define USDHC_MIX_CTRL_EXE_TUNE_SHIFT (22U)
+#define USDHC_MIX_CTRL_EXE_TUNE(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_EXE_TUNE_SHIFT)) & USDHC_MIX_CTRL_EXE_TUNE_MASK)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL_MASK  (0x800000U)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT (23U)
+#define USDHC_MIX_CTRL_SMP_CLK_SEL(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_SMP_CLK_SEL_SHIFT)) & USDHC_MIX_CTRL_SMP_CLK_SEL_MASK)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK  (0x1000000U)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT (24U)
+#define USDHC_MIX_CTRL_AUTO_TUNE_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_AUTO_TUNE_EN_SHIFT)) & USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK)
+#define USDHC_MIX_CTRL_FBCLK_SEL_MASK  (0x2000000U)
+#define USDHC_MIX_CTRL_FBCLK_SEL_SHIFT (25U)
+#define USDHC_MIX_CTRL_FBCLK_SEL(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MIX_CTRL_FBCLK_SEL_SHIFT)) & USDHC_MIX_CTRL_FBCLK_SEL_MASK)
 /*! @} */
 
 /*! @name FORCE_EVENT - Force Event */
 /*! @{ */
-#define USDHC_FORCE_EVENT_FEVTAC12NE_MASK        (0x1U)
-#define USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT       (0U)
-#define USDHC_FORCE_EVENT_FEVTAC12NE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12NE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE_MASK       (0x2U)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT      (1U)
-#define USDHC_FORCE_EVENT_FEVTAC12TOE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12TOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12CE_MASK        (0x4U)
-#define USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT       (2U)
-#define USDHC_FORCE_EVENT_FEVTAC12CE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12CE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE_MASK       (0x8U)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT      (3U)
-#define USDHC_FORCE_EVENT_FEVTAC12EBE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12EBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12IE_MASK        (0x10U)
-#define USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT       (4U)
-#define USDHC_FORCE_EVENT_FEVTAC12IE(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12IE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK     (0x80U)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT    (7U)
-#define USDHC_FORCE_EVENT_FEVTCNIBAC12E(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK)
-#define USDHC_FORCE_EVENT_FEVTCTOE_MASK          (0x10000U)
-#define USDHC_FORCE_EVENT_FEVTCTOE_SHIFT         (16U)
-#define USDHC_FORCE_EVENT_FEVTCTOE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCTOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCCE_MASK           (0x20000U)
-#define USDHC_FORCE_EVENT_FEVTCCE_SHIFT          (17U)
-#define USDHC_FORCE_EVENT_FEVTCCE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCCE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCEBE_MASK          (0x40000U)
-#define USDHC_FORCE_EVENT_FEVTCEBE_SHIFT         (18U)
-#define USDHC_FORCE_EVENT_FEVTCEBE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCEBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCIE_MASK           (0x80000U)
-#define USDHC_FORCE_EVENT_FEVTCIE_SHIFT          (19U)
-#define USDHC_FORCE_EVENT_FEVTCIE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCIE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCIE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDTOE_MASK          (0x100000U)
-#define USDHC_FORCE_EVENT_FEVTDTOE_SHIFT         (20U)
-#define USDHC_FORCE_EVENT_FEVTDTOE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDTOE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDCE_MASK           (0x200000U)
-#define USDHC_FORCE_EVENT_FEVTDCE_SHIFT          (21U)
-#define USDHC_FORCE_EVENT_FEVTDCE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDCE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDEBE_MASK          (0x400000U)
-#define USDHC_FORCE_EVENT_FEVTDEBE_SHIFT         (22U)
-#define USDHC_FORCE_EVENT_FEVTDEBE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDEBE_MASK)
-#define USDHC_FORCE_EVENT_FEVTAC12E_MASK         (0x1000000U)
-#define USDHC_FORCE_EVENT_FEVTAC12E_SHIFT        (24U)
-#define USDHC_FORCE_EVENT_FEVTAC12E(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12E_MASK)
-#define USDHC_FORCE_EVENT_FEVTTNE_MASK           (0x4000000U)
-#define USDHC_FORCE_EVENT_FEVTTNE_SHIFT          (26U)
-#define USDHC_FORCE_EVENT_FEVTTNE(x)             (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTTNE_SHIFT)) & USDHC_FORCE_EVENT_FEVTTNE_MASK)
-#define USDHC_FORCE_EVENT_FEVTDMAE_MASK          (0x10000000U)
-#define USDHC_FORCE_EVENT_FEVTDMAE_SHIFT         (28U)
-#define USDHC_FORCE_EVENT_FEVTDMAE(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDMAE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDMAE_MASK)
-#define USDHC_FORCE_EVENT_FEVTCINT_MASK          (0x80000000U)
-#define USDHC_FORCE_EVENT_FEVTCINT_SHIFT         (31U)
-#define USDHC_FORCE_EVENT_FEVTCINT(x)            (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCINT_SHIFT)) & USDHC_FORCE_EVENT_FEVTCINT_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12NE_MASK  (0x1U)
+#define USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT (0U)
+#define USDHC_FORCE_EVENT_FEVTAC12NE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12NE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12NE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE_MASK  (0x2U)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT (1U)
+#define USDHC_FORCE_EVENT_FEVTAC12TOE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12TOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12TOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12CE_MASK  (0x4U)
+#define USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT (2U)
+#define USDHC_FORCE_EVENT_FEVTAC12CE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12CE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12CE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE_MASK  (0x8U)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT (3U)
+#define USDHC_FORCE_EVENT_FEVTAC12EBE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12EBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12EBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12IE_MASK  (0x10U)
+#define USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT (4U)
+#define USDHC_FORCE_EVENT_FEVTAC12IE(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12IE_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12IE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK  (0x80U)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT (7U)
+#define USDHC_FORCE_EVENT_FEVTCNIBAC12E(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCNIBAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK)
+#define USDHC_FORCE_EVENT_FEVTCTOE_MASK  (0x10000U)
+#define USDHC_FORCE_EVENT_FEVTCTOE_SHIFT (16U)
+#define USDHC_FORCE_EVENT_FEVTCTOE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCTOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCCE_MASK  (0x20000U)
+#define USDHC_FORCE_EVENT_FEVTCCE_SHIFT (17U)
+#define USDHC_FORCE_EVENT_FEVTCCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCCE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCEBE_MASK  (0x40000U)
+#define USDHC_FORCE_EVENT_FEVTCEBE_SHIFT (18U)
+#define USDHC_FORCE_EVENT_FEVTCEBE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCEBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCIE_MASK  (0x80000U)
+#define USDHC_FORCE_EVENT_FEVTCIE_SHIFT (19U)
+#define USDHC_FORCE_EVENT_FEVTCIE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCIE_SHIFT)) & USDHC_FORCE_EVENT_FEVTCIE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDTOE_MASK  (0x100000U)
+#define USDHC_FORCE_EVENT_FEVTDTOE_SHIFT (20U)
+#define USDHC_FORCE_EVENT_FEVTDTOE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDTOE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDTOE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDCE_MASK  (0x200000U)
+#define USDHC_FORCE_EVENT_FEVTDCE_SHIFT (21U)
+#define USDHC_FORCE_EVENT_FEVTDCE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDCE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDCE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDEBE_MASK  (0x400000U)
+#define USDHC_FORCE_EVENT_FEVTDEBE_SHIFT (22U)
+#define USDHC_FORCE_EVENT_FEVTDEBE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDEBE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDEBE_MASK)
+#define USDHC_FORCE_EVENT_FEVTAC12E_MASK  (0x1000000U)
+#define USDHC_FORCE_EVENT_FEVTAC12E_SHIFT (24U)
+#define USDHC_FORCE_EVENT_FEVTAC12E(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTAC12E_SHIFT)) & USDHC_FORCE_EVENT_FEVTAC12E_MASK)
+#define USDHC_FORCE_EVENT_FEVTTNE_MASK  (0x4000000U)
+#define USDHC_FORCE_EVENT_FEVTTNE_SHIFT (26U)
+#define USDHC_FORCE_EVENT_FEVTTNE(x)                                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTTNE_SHIFT)) & USDHC_FORCE_EVENT_FEVTTNE_MASK)
+#define USDHC_FORCE_EVENT_FEVTDMAE_MASK  (0x10000000U)
+#define USDHC_FORCE_EVENT_FEVTDMAE_SHIFT (28U)
+#define USDHC_FORCE_EVENT_FEVTDMAE(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTDMAE_SHIFT)) & USDHC_FORCE_EVENT_FEVTDMAE_MASK)
+#define USDHC_FORCE_EVENT_FEVTCINT_MASK  (0x80000000U)
+#define USDHC_FORCE_EVENT_FEVTCINT_SHIFT (31U)
+#define USDHC_FORCE_EVENT_FEVTCINT(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_FORCE_EVENT_FEVTCINT_SHIFT)) & USDHC_FORCE_EVENT_FEVTCINT_MASK)
 /*! @} */
 
 /*! @name ADMA_ERR_STATUS - ADMA Error Status Register */
 /*! @{ */
-#define USDHC_ADMA_ERR_STATUS_ADMAES_MASK        (0x3U)
-#define USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT       (0U)
-#define USDHC_ADMA_ERR_STATUS_ADMAES(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMAES_MASK)
-#define USDHC_ADMA_ERR_STATUS_ADMALME_MASK       (0x4U)
-#define USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT      (2U)
-#define USDHC_ADMA_ERR_STATUS_ADMALME(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMALME_MASK)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE_MASK       (0x8U)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT      (3U)
-#define USDHC_ADMA_ERR_STATUS_ADMADCE(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMADCE_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMAES_MASK  (0x3U)
+#define USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT (0U)
+#define USDHC_ADMA_ERR_STATUS_ADMAES(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMAES_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMAES_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMALME_MASK  (0x4U)
+#define USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT (2U)
+#define USDHC_ADMA_ERR_STATUS_ADMALME(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMALME_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMALME_MASK)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE_MASK  (0x8U)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT (3U)
+#define USDHC_ADMA_ERR_STATUS_ADMADCE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_ERR_STATUS_ADMADCE_SHIFT)) & USDHC_ADMA_ERR_STATUS_ADMADCE_MASK)
 /*! @} */
 
 /*! @name ADMA_SYS_ADDR - ADMA System Address */
 /*! @{ */
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK        (0xFFFFFFFCU)
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT       (2U)
-#define USDHC_ADMA_SYS_ADDR_ADS_ADDR(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT)) & USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK  (0xFFFFFFFCU)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT (2U)
+#define USDHC_ADMA_SYS_ADDR_ADS_ADDR(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_ADMA_SYS_ADDR_ADS_ADDR_SHIFT)) & USDHC_ADMA_SYS_ADDR_ADS_ADDR_MASK)
 /*! @} */
 
 /*! @name DLL_CTRL - DLL (Delay Line) Control */
 /*! @{ */
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK      (0x1U)
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT     (0U)
-#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK       (0x2U)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT      (1U)
-#define USDHC_DLL_CTRL_DLL_CTRL_RESET(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK (0x4U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK  (0x1U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT (0U)
+#define USDHC_DLL_CTRL_DLL_CTRL_ENABLE(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_ENABLE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_ENABLE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK  (0x2U)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT (1U)
+#define USDHC_DLL_CTRL_DLL_CTRL_RESET(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_RESET_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_RESET_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK  (0x4U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT (2U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK (0x78U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_SHIFT)) &                                    \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_FORCE_UPD_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK  (0x78U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT (3U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK (0x80U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_SHIFT)) &                                  \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET0_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK  (0x80U)
 #define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT (7U)
-#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE(x)   (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK (0x100U)
+#define USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_SHIFT)) &                                      \
+     USDHC_DLL_CTRL_DLL_CTRL_GATE_UPDATE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK  (0x100U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT (8U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE(x)  (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK (0xFE00U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_SHIFT)) &                                     \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK  (0xFE00U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT (9U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK (0x70000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_SHIFT)) &                                 \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_OVERRIDE_VAL_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK  (0x70000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT (16U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK (0xFF00000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_SHIFT)) &                                  \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_DLY_TARGET1_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK  (0xFF00000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT (20U)
-#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK)
-#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK (0xF0000000U)
+#define USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_SHIFT)) &                                   \
+     USDHC_DLL_CTRL_DLL_CTRL_SLV_UPDATE_INT_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK  (0xF0000000U)
 #define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT (28U)
-#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT)) & USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK)
+#define USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_SHIFT)) &                                   \
+     USDHC_DLL_CTRL_DLL_CTRL_REF_UPDATE_INT_MASK)
 /*! @} */
 
 /*! @name DLL_STATUS - DLL Status */
 /*! @{ */
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK   (0x1U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT  (0U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK   (0x2U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT  (1U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK    (0x1FCU)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT   (2U)
-#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK    (0xFE00U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT   (9U)
-#define USDHC_DLL_STATUS_DLL_STS_REF_SEL(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK  (0x1U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT (0U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_LOCK_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK  (0x2U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT (1U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_LOCK(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_LOCK_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_LOCK_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK  (0x1FCU)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT (2U)
+#define USDHC_DLL_STATUS_DLL_STS_SLV_SEL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_SLV_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_SLV_SEL_MASK)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK  (0xFE00U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT (9U)
+#define USDHC_DLL_STATUS_DLL_STS_REF_SEL(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_DLL_STATUS_DLL_STS_REF_SEL_SHIFT)) & USDHC_DLL_STATUS_DLL_STS_REF_SEL_MASK)
 /*! @} */
 
 /*! @name CLK_TUNE_CTRL_STATUS - CLK Tuning Control and Status */
 /*! @{ */
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK (0xFU)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK  (0xFU)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT (0U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK (0xF0U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_SHIFT)) &                             \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK  (0xF0U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT (4U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK (0x7F00U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_SHIFT)) &                              \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK  (0x7F00U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT (8U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT)) &                              \
+     USDHC_CLK_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK)
 #define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK  (0x8000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT (15U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK (0xF0000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_SHIFT)) &                                       \
+     USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK  (0xF0000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT (16U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK (0xF00000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_SHIFT)) &                                  \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_POST_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK  (0xF00000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT (20U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK (0x7F000000U)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_SHIFT)) &                                   \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_OUT_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK  (0x7F000000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT (24U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE(x) (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT)) &                                   \
+     USDHC_CLK_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK)
 #define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK  (0x80000000U)
 #define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT (31U)
-#define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT)) & USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK)
+#define USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_SHIFT)) &                                       \
+     USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK)
 /*! @} */
 
 /*! @name VEND_SPEC - Vendor Specific Register */
 /*! @{ */
-#define USDHC_VEND_SPEC_VSELECT_MASK             (0x2U)
-#define USDHC_VEND_SPEC_VSELECT_SHIFT            (1U)
-#define USDHC_VEND_SPEC_VSELECT(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_VSELECT_SHIFT)) & USDHC_VEND_SPEC_VSELECT_MASK)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK     (0x4U)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT    (2U)
-#define USDHC_VEND_SPEC_CONFLICT_CHK_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT)) & USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK)
+#define USDHC_VEND_SPEC_VSELECT_MASK  (0x2U)
+#define USDHC_VEND_SPEC_VSELECT_SHIFT (1U)
+#define USDHC_VEND_SPEC_VSELECT(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_VSELECT_SHIFT)) & USDHC_VEND_SPEC_VSELECT_MASK)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK  (0x4U)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT (2U)
+#define USDHC_VEND_SPEC_CONFLICT_CHK_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CONFLICT_CHK_EN_SHIFT)) & USDHC_VEND_SPEC_CONFLICT_CHK_EN_MASK)
 #define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK  (0x8U)
 #define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT (3U)
-#define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT)) & USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK        (0x100U)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT       (8U)
-#define USDHC_VEND_SPEC_FRC_SDCLK_ON(x)          (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS_MASK         (0x8000U)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT        (15U)
-#define USDHC_VEND_SPEC_CRC_CHK_DIS(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT)) & USDHC_VEND_SPEC_CRC_CHK_DIS_MASK)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN_MASK         (0x80000000U)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT        (31U)
-#define USDHC_VEND_SPEC_CMD_BYTE_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT)) & USDHC_VEND_SPEC_CMD_BYTE_EN_MASK)
+#define USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_SHIFT)) &                                       \
+     USDHC_VEND_SPEC_AC12_WR_CHKBUSY_EN_MASK)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK  (0x100U)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT (8U)
+#define USDHC_VEND_SPEC_FRC_SDCLK_ON(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS_MASK  (0x8000U)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT (15U)
+#define USDHC_VEND_SPEC_CRC_CHK_DIS(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CRC_CHK_DIS_SHIFT)) & USDHC_VEND_SPEC_CRC_CHK_DIS_MASK)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN_MASK  (0x80000000U)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT (31U)
+#define USDHC_VEND_SPEC_CMD_BYTE_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_CMD_BYTE_EN_SHIFT)) & USDHC_VEND_SPEC_CMD_BYTE_EN_MASK)
 /*! @} */
 
 /*! @name MMC_BOOT - MMC Boot Register */
 /*! @{ */
-#define USDHC_MMC_BOOT_DTOCV_ACK_MASK            (0xFU)
-#define USDHC_MMC_BOOT_DTOCV_ACK_SHIFT           (0U)
-#define USDHC_MMC_BOOT_DTOCV_ACK(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DTOCV_ACK_SHIFT)) & USDHC_MMC_BOOT_DTOCV_ACK_MASK)
-#define USDHC_MMC_BOOT_BOOT_ACK_MASK             (0x10U)
-#define USDHC_MMC_BOOT_BOOT_ACK_SHIFT            (4U)
-#define USDHC_MMC_BOOT_BOOT_ACK(x)               (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_ACK_SHIFT)) & USDHC_MMC_BOOT_BOOT_ACK_MASK)
-#define USDHC_MMC_BOOT_BOOT_MODE_MASK            (0x20U)
-#define USDHC_MMC_BOOT_BOOT_MODE_SHIFT           (5U)
-#define USDHC_MMC_BOOT_BOOT_MODE(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_MODE_SHIFT)) & USDHC_MMC_BOOT_BOOT_MODE_MASK)
-#define USDHC_MMC_BOOT_BOOT_EN_MASK              (0x40U)
-#define USDHC_MMC_BOOT_BOOT_EN_SHIFT             (6U)
-#define USDHC_MMC_BOOT_BOOT_EN(x)                (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_EN_SHIFT)) & USDHC_MMC_BOOT_BOOT_EN_MASK)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN_MASK         (0x80U)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT        (7U)
-#define USDHC_MMC_BOOT_AUTO_SABG_EN(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT)) & USDHC_MMC_BOOT_AUTO_SABG_EN_MASK)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK     (0x100U)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT    (8U)
-#define USDHC_MMC_BOOT_DISABLE_TIME_OUT(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT)) & USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK         (0xFFFF0000U)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT        (16U)
-#define USDHC_MMC_BOOT_BOOT_BLK_CNT(x)           (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT)) & USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK)
+#define USDHC_MMC_BOOT_DTOCV_ACK_MASK  (0xFU)
+#define USDHC_MMC_BOOT_DTOCV_ACK_SHIFT (0U)
+#define USDHC_MMC_BOOT_DTOCV_ACK(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DTOCV_ACK_SHIFT)) & USDHC_MMC_BOOT_DTOCV_ACK_MASK)
+#define USDHC_MMC_BOOT_BOOT_ACK_MASK  (0x10U)
+#define USDHC_MMC_BOOT_BOOT_ACK_SHIFT (4U)
+#define USDHC_MMC_BOOT_BOOT_ACK(x)                                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_ACK_SHIFT)) & USDHC_MMC_BOOT_BOOT_ACK_MASK)
+#define USDHC_MMC_BOOT_BOOT_MODE_MASK  (0x20U)
+#define USDHC_MMC_BOOT_BOOT_MODE_SHIFT (5U)
+#define USDHC_MMC_BOOT_BOOT_MODE(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_MODE_SHIFT)) & USDHC_MMC_BOOT_BOOT_MODE_MASK)
+#define USDHC_MMC_BOOT_BOOT_EN_MASK  (0x40U)
+#define USDHC_MMC_BOOT_BOOT_EN_SHIFT (6U)
+#define USDHC_MMC_BOOT_BOOT_EN(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_EN_SHIFT)) & USDHC_MMC_BOOT_BOOT_EN_MASK)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN_MASK  (0x80U)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT (7U)
+#define USDHC_MMC_BOOT_AUTO_SABG_EN(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_AUTO_SABG_EN_SHIFT)) & USDHC_MMC_BOOT_AUTO_SABG_EN_MASK)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK  (0x100U)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT (8U)
+#define USDHC_MMC_BOOT_DISABLE_TIME_OUT(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_DISABLE_TIME_OUT_SHIFT)) & USDHC_MMC_BOOT_DISABLE_TIME_OUT_MASK)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK  (0xFFFF0000U)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT (16U)
+#define USDHC_MMC_BOOT_BOOT_BLK_CNT(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_MMC_BOOT_BOOT_BLK_CNT_SHIFT)) & USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK)
 /*! @} */
 
 /*! @name VEND_SPEC2 - Vendor Specific 2 Register */
 /*! @{ */
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK   (0x8U)
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT  (3U)
-#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST(x)     (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT)) & USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK     (0x10U)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT    (4U)
-#define USDHC_VEND_SPEC2_TUNING_8bit_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK     (0x20U)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT    (5U)
-#define USDHC_VEND_SPEC2_TUNING_1bit_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK      (0x40U)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT     (6U)
-#define USDHC_VEND_SPEC2_TUNING_CMD_EN(x)        (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK    (0x1000U)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT   (12U)
-#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT)) & USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK     (0x2000U)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT    (13U)
-#define USDHC_VEND_SPEC2_PART_DLL_DEBUG(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT)) & USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK)
-#define USDHC_VEND_SPEC2_BUS_RST_MASK            (0x4000U)
-#define USDHC_VEND_SPEC2_BUS_RST_SHIFT           (14U)
-#define USDHC_VEND_SPEC2_BUS_RST(x)              (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_BUS_RST_SHIFT)) & USDHC_VEND_SPEC2_BUS_RST_MASK)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK  (0x8U)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT (3U)
+#define USDHC_VEND_SPEC2_CARD_INT_D3_TEST(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_CARD_INT_D3_TEST_SHIFT)) & USDHC_VEND_SPEC2_CARD_INT_D3_TEST_MASK)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK  (0x10U)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT (4U)
+#define USDHC_VEND_SPEC2_TUNING_8bit_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_8bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK  (0x20U)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT (5U)
+#define USDHC_VEND_SPEC2_TUNING_1bit_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_1bit_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK  (0x40U)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT (6U)
+#define USDHC_VEND_SPEC2_TUNING_CMD_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_TUNING_CMD_EN_SHIFT)) & USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK  (0x1000U)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT (12U)
+#define USDHC_VEND_SPEC2_ACMD23_ARGU2_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_SHIFT)) & USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK  (0x2000U)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT (13U)
+#define USDHC_VEND_SPEC2_PART_DLL_DEBUG(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_PART_DLL_DEBUG_SHIFT)) & USDHC_VEND_SPEC2_PART_DLL_DEBUG_MASK)
+#define USDHC_VEND_SPEC2_BUS_RST_MASK  (0x4000U)
+#define USDHC_VEND_SPEC2_BUS_RST_SHIFT (14U)
+#define USDHC_VEND_SPEC2_BUS_RST(x)                                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC2_BUS_RST_SHIFT)) & USDHC_VEND_SPEC2_BUS_RST_MASK)
 /*! @} */
 
 /*! @name TUNING_CTRL - Tuning Control Register */
 /*! @{ */
 #define USDHC_TUNING_CTRL_TUNING_START_TAP_MASK  (0xFFU)
 #define USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT (0U)
-#define USDHC_TUNING_CTRL_TUNING_START_TAP(x)    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_START_TAP_MASK)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER_MASK    (0xFF00U)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT   (8U)
-#define USDHC_TUNING_CTRL_TUNING_COUNTER(x)      (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT)) & USDHC_TUNING_CTRL_TUNING_COUNTER_MASK)
-#define USDHC_TUNING_CTRL_TUNING_STEP_MASK       (0x70000U)
-#define USDHC_TUNING_CTRL_TUNING_STEP_SHIFT      (16U)
-#define USDHC_TUNING_CTRL_TUNING_STEP(x)         (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_STEP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_STEP_MASK)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW_MASK     (0x700000U)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT    (20U)
-#define USDHC_TUNING_CTRL_TUNING_WINDOW(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT)) & USDHC_TUNING_CTRL_TUNING_WINDOW_MASK)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN_MASK     (0x1000000U)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT    (24U)
-#define USDHC_TUNING_CTRL_STD_TUNING_EN(x)       (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT)) & USDHC_TUNING_CTRL_STD_TUNING_EN_MASK)
+#define USDHC_TUNING_CTRL_TUNING_START_TAP(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_START_TAP_SHIFT)) &                                       \
+     USDHC_TUNING_CTRL_TUNING_START_TAP_MASK)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER_MASK  (0xFF00U)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT (8U)
+#define USDHC_TUNING_CTRL_TUNING_COUNTER(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_COUNTER_SHIFT)) & USDHC_TUNING_CTRL_TUNING_COUNTER_MASK)
+#define USDHC_TUNING_CTRL_TUNING_STEP_MASK  (0x70000U)
+#define USDHC_TUNING_CTRL_TUNING_STEP_SHIFT (16U)
+#define USDHC_TUNING_CTRL_TUNING_STEP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_STEP_SHIFT)) & USDHC_TUNING_CTRL_TUNING_STEP_MASK)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW_MASK  (0x700000U)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT (20U)
+#define USDHC_TUNING_CTRL_TUNING_WINDOW(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_TUNING_WINDOW_SHIFT)) & USDHC_TUNING_CTRL_TUNING_WINDOW_MASK)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN_MASK  (0x1000000U)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT (24U)
+#define USDHC_TUNING_CTRL_STD_TUNING_EN(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << USDHC_TUNING_CTRL_STD_TUNING_EN_SHIFT)) & USDHC_TUNING_CTRL_STD_TUNING_EN_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group USDHC_Register_Masks */
 
-
 /* USDHC - Peripheral instance base addresses */
 /** Peripheral USDHC1 base address */
-#define USDHC1_BASE                              (0x402C0000u)
+#define USDHC1_BASE (0x402C0000u)
 /** Peripheral USDHC1 base pointer */
-#define USDHC1                                   ((USDHC_Type *)USDHC1_BASE)
+#define USDHC1 ((USDHC_Type *)USDHC1_BASE)
 /** Peripheral USDHC2 base address */
-#define USDHC2_BASE                              (0x402C4000u)
+#define USDHC2_BASE (0x402C4000u)
 /** Peripheral USDHC2 base pointer */
-#define USDHC2                                   ((USDHC_Type *)USDHC2_BASE)
+#define USDHC2 ((USDHC_Type *)USDHC2_BASE)
 /** Array initializer of USDHC peripheral base addresses */
-#define USDHC_BASE_ADDRS                         { 0u, USDHC1_BASE, USDHC2_BASE }
+#define USDHC_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, USDHC1_BASE, USDHC2_BASE                                                                                   \
+    }
 /** Array initializer of USDHC peripheral base pointers */
-#define USDHC_BASE_PTRS                          { (USDHC_Type *)0u, USDHC1, USDHC2 }
+#define USDHC_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (USDHC_Type *)0u, USDHC1, USDHC2                                                                               \
+    }
 /** Interrupt vectors for the USDHC peripheral type */
-#define USDHC_IRQS                               { NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn }
+#define USDHC_IRQS                                                                                                     \
+    {                                                                                                                  \
+        NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn                                                                        \
+    }
 
 /*!
  * @}
  */ /* end of group USDHC_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- WDOG Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -25463,12 +29171,13 @@ typedef struct {
  */
 
 /** WDOG - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t WCR;                               /**< Watchdog Control Register, offset: 0x0 */
-  __IO uint16_t WSR;                               /**< Watchdog Service Register, offset: 0x2 */
-  __I  uint16_t WRSR;                              /**< Watchdog Reset Status Register, offset: 0x4 */
-  __IO uint16_t WICR;                              /**< Watchdog Interrupt Control Register, offset: 0x6 */
-  __IO uint16_t WMCR;                              /**< Watchdog Miscellaneous Control Register, offset: 0x8 */
+typedef struct
+{
+    __IO uint16_t WCR;  /**< Watchdog Control Register, offset: 0x0 */
+    __IO uint16_t WSR;  /**< Watchdog Service Register, offset: 0x2 */
+    __I uint16_t WRSR;  /**< Watchdog Reset Status Register, offset: 0x4 */
+    __IO uint16_t WICR; /**< Watchdog Interrupt Control Register, offset: 0x6 */
+    __IO uint16_t WMCR; /**< Watchdog Miscellaneous Control Register, offset: 0x8 */
 } WDOG_Type;
 
 /* ----------------------------------------------------------------------------
@@ -25482,102 +29191,108 @@ typedef struct {
 
 /*! @name WCR - Watchdog Control Register */
 /*! @{ */
-#define WDOG_WCR_WDZST_MASK                      (0x1U)
-#define WDOG_WCR_WDZST_SHIFT                     (0U)
-#define WDOG_WCR_WDZST(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDZST_SHIFT)) & WDOG_WCR_WDZST_MASK)
-#define WDOG_WCR_WDBG_MASK                       (0x2U)
-#define WDOG_WCR_WDBG_SHIFT                      (1U)
-#define WDOG_WCR_WDBG(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDBG_SHIFT)) & WDOG_WCR_WDBG_MASK)
-#define WDOG_WCR_WDE_MASK                        (0x4U)
-#define WDOG_WCR_WDE_SHIFT                       (2U)
-#define WDOG_WCR_WDE(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDE_SHIFT)) & WDOG_WCR_WDE_MASK)
-#define WDOG_WCR_WDT_MASK                        (0x8U)
-#define WDOG_WCR_WDT_SHIFT                       (3U)
-#define WDOG_WCR_WDT(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDT_SHIFT)) & WDOG_WCR_WDT_MASK)
-#define WDOG_WCR_SRS_MASK                        (0x10U)
-#define WDOG_WCR_SRS_SHIFT                       (4U)
-#define WDOG_WCR_SRS(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRS_SHIFT)) & WDOG_WCR_SRS_MASK)
-#define WDOG_WCR_WDA_MASK                        (0x20U)
-#define WDOG_WCR_WDA_SHIFT                       (5U)
-#define WDOG_WCR_WDA(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDA_SHIFT)) & WDOG_WCR_WDA_MASK)
-#define WDOG_WCR_SRE_MASK                        (0x40U)
-#define WDOG_WCR_SRE_SHIFT                       (6U)
-#define WDOG_WCR_SRE(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRE_SHIFT)) & WDOG_WCR_SRE_MASK)
-#define WDOG_WCR_WDW_MASK                        (0x80U)
-#define WDOG_WCR_WDW_SHIFT                       (7U)
-#define WDOG_WCR_WDW(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDW_SHIFT)) & WDOG_WCR_WDW_MASK)
-#define WDOG_WCR_WT_MASK                         (0xFF00U)
-#define WDOG_WCR_WT_SHIFT                        (8U)
-#define WDOG_WCR_WT(x)                           (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WT_SHIFT)) & WDOG_WCR_WT_MASK)
+#define WDOG_WCR_WDZST_MASK  (0x1U)
+#define WDOG_WCR_WDZST_SHIFT (0U)
+#define WDOG_WCR_WDZST(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDZST_SHIFT)) & WDOG_WCR_WDZST_MASK)
+#define WDOG_WCR_WDBG_MASK   (0x2U)
+#define WDOG_WCR_WDBG_SHIFT  (1U)
+#define WDOG_WCR_WDBG(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDBG_SHIFT)) & WDOG_WCR_WDBG_MASK)
+#define WDOG_WCR_WDE_MASK    (0x4U)
+#define WDOG_WCR_WDE_SHIFT   (2U)
+#define WDOG_WCR_WDE(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDE_SHIFT)) & WDOG_WCR_WDE_MASK)
+#define WDOG_WCR_WDT_MASK    (0x8U)
+#define WDOG_WCR_WDT_SHIFT   (3U)
+#define WDOG_WCR_WDT(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDT_SHIFT)) & WDOG_WCR_WDT_MASK)
+#define WDOG_WCR_SRS_MASK    (0x10U)
+#define WDOG_WCR_SRS_SHIFT   (4U)
+#define WDOG_WCR_SRS(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRS_SHIFT)) & WDOG_WCR_SRS_MASK)
+#define WDOG_WCR_WDA_MASK    (0x20U)
+#define WDOG_WCR_WDA_SHIFT   (5U)
+#define WDOG_WCR_WDA(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDA_SHIFT)) & WDOG_WCR_WDA_MASK)
+#define WDOG_WCR_SRE_MASK    (0x40U)
+#define WDOG_WCR_SRE_SHIFT   (6U)
+#define WDOG_WCR_SRE(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_SRE_SHIFT)) & WDOG_WCR_SRE_MASK)
+#define WDOG_WCR_WDW_MASK    (0x80U)
+#define WDOG_WCR_WDW_SHIFT   (7U)
+#define WDOG_WCR_WDW(x)      (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WDW_SHIFT)) & WDOG_WCR_WDW_MASK)
+#define WDOG_WCR_WT_MASK     (0xFF00U)
+#define WDOG_WCR_WT_SHIFT    (8U)
+#define WDOG_WCR_WT(x)       (((uint16_t)(((uint16_t)(x)) << WDOG_WCR_WT_SHIFT)) & WDOG_WCR_WT_MASK)
 /*! @} */
 
 /*! @name WSR - Watchdog Service Register */
 /*! @{ */
-#define WDOG_WSR_WSR_MASK                        (0xFFFFU)
-#define WDOG_WSR_WSR_SHIFT                       (0U)
-#define WDOG_WSR_WSR(x)                          (((uint16_t)(((uint16_t)(x)) << WDOG_WSR_WSR_SHIFT)) & WDOG_WSR_WSR_MASK)
+#define WDOG_WSR_WSR_MASK  (0xFFFFU)
+#define WDOG_WSR_WSR_SHIFT (0U)
+#define WDOG_WSR_WSR(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WSR_WSR_SHIFT)) & WDOG_WSR_WSR_MASK)
 /*! @} */
 
 /*! @name WRSR - Watchdog Reset Status Register */
 /*! @{ */
-#define WDOG_WRSR_SFTW_MASK                      (0x1U)
-#define WDOG_WRSR_SFTW_SHIFT                     (0U)
-#define WDOG_WRSR_SFTW(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_SFTW_SHIFT)) & WDOG_WRSR_SFTW_MASK)
-#define WDOG_WRSR_TOUT_MASK                      (0x2U)
-#define WDOG_WRSR_TOUT_SHIFT                     (1U)
-#define WDOG_WRSR_TOUT(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_TOUT_SHIFT)) & WDOG_WRSR_TOUT_MASK)
-#define WDOG_WRSR_POR_MASK                       (0x10U)
-#define WDOG_WRSR_POR_SHIFT                      (4U)
-#define WDOG_WRSR_POR(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_POR_SHIFT)) & WDOG_WRSR_POR_MASK)
+#define WDOG_WRSR_SFTW_MASK  (0x1U)
+#define WDOG_WRSR_SFTW_SHIFT (0U)
+#define WDOG_WRSR_SFTW(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_SFTW_SHIFT)) & WDOG_WRSR_SFTW_MASK)
+#define WDOG_WRSR_TOUT_MASK  (0x2U)
+#define WDOG_WRSR_TOUT_SHIFT (1U)
+#define WDOG_WRSR_TOUT(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_TOUT_SHIFT)) & WDOG_WRSR_TOUT_MASK)
+#define WDOG_WRSR_POR_MASK   (0x10U)
+#define WDOG_WRSR_POR_SHIFT  (4U)
+#define WDOG_WRSR_POR(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WRSR_POR_SHIFT)) & WDOG_WRSR_POR_MASK)
 /*! @} */
 
 /*! @name WICR - Watchdog Interrupt Control Register */
 /*! @{ */
-#define WDOG_WICR_WICT_MASK                      (0xFFU)
-#define WDOG_WICR_WICT_SHIFT                     (0U)
-#define WDOG_WICR_WICT(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WICT_SHIFT)) & WDOG_WICR_WICT_MASK)
-#define WDOG_WICR_WTIS_MASK                      (0x4000U)
-#define WDOG_WICR_WTIS_SHIFT                     (14U)
-#define WDOG_WICR_WTIS(x)                        (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WTIS_SHIFT)) & WDOG_WICR_WTIS_MASK)
-#define WDOG_WICR_WIE_MASK                       (0x8000U)
-#define WDOG_WICR_WIE_SHIFT                      (15U)
-#define WDOG_WICR_WIE(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WIE_SHIFT)) & WDOG_WICR_WIE_MASK)
+#define WDOG_WICR_WICT_MASK  (0xFFU)
+#define WDOG_WICR_WICT_SHIFT (0U)
+#define WDOG_WICR_WICT(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WICT_SHIFT)) & WDOG_WICR_WICT_MASK)
+#define WDOG_WICR_WTIS_MASK  (0x4000U)
+#define WDOG_WICR_WTIS_SHIFT (14U)
+#define WDOG_WICR_WTIS(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WTIS_SHIFT)) & WDOG_WICR_WTIS_MASK)
+#define WDOG_WICR_WIE_MASK   (0x8000U)
+#define WDOG_WICR_WIE_SHIFT  (15U)
+#define WDOG_WICR_WIE(x)     (((uint16_t)(((uint16_t)(x)) << WDOG_WICR_WIE_SHIFT)) & WDOG_WICR_WIE_MASK)
 /*! @} */
 
 /*! @name WMCR - Watchdog Miscellaneous Control Register */
 /*! @{ */
-#define WDOG_WMCR_PDE_MASK                       (0x1U)
-#define WDOG_WMCR_PDE_SHIFT                      (0U)
-#define WDOG_WMCR_PDE(x)                         (((uint16_t)(((uint16_t)(x)) << WDOG_WMCR_PDE_SHIFT)) & WDOG_WMCR_PDE_MASK)
+#define WDOG_WMCR_PDE_MASK  (0x1U)
+#define WDOG_WMCR_PDE_SHIFT (0U)
+#define WDOG_WMCR_PDE(x)    (((uint16_t)(((uint16_t)(x)) << WDOG_WMCR_PDE_SHIFT)) & WDOG_WMCR_PDE_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group WDOG_Register_Masks */
 
-
 /* WDOG - Peripheral instance base addresses */
 /** Peripheral WDOG1 base address */
-#define WDOG1_BASE                               (0x400B8000u)
+#define WDOG1_BASE (0x400B8000u)
 /** Peripheral WDOG1 base pointer */
-#define WDOG1                                    ((WDOG_Type *)WDOG1_BASE)
+#define WDOG1 ((WDOG_Type *)WDOG1_BASE)
 /** Peripheral WDOG2 base address */
-#define WDOG2_BASE                               (0x400D0000u)
+#define WDOG2_BASE (0x400D0000u)
 /** Peripheral WDOG2 base pointer */
-#define WDOG2                                    ((WDOG_Type *)WDOG2_BASE)
+#define WDOG2 ((WDOG_Type *)WDOG2_BASE)
 /** Array initializer of WDOG peripheral base addresses */
-#define WDOG_BASE_ADDRS                          { 0u, WDOG1_BASE, WDOG2_BASE }
+#define WDOG_BASE_ADDRS                                                                                                \
+    {                                                                                                                  \
+        0u, WDOG1_BASE, WDOG2_BASE                                                                                     \
+    }
 /** Array initializer of WDOG peripheral base pointers */
-#define WDOG_BASE_PTRS                           { (WDOG_Type *)0u, WDOG1, WDOG2 }
+#define WDOG_BASE_PTRS                                                                                                 \
+    {                                                                                                                  \
+        (WDOG_Type *)0u, WDOG1, WDOG2                                                                                  \
+    }
 /** Interrupt vectors for the WDOG peripheral type */
-#define WDOG_IRQS                                { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
+#define WDOG_IRQS                                                                                                      \
+    {                                                                                                                  \
+        NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn                                                                          \
+    }
 
 /*!
  * @}
  */ /* end of group WDOG_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XBARA Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -25588,75 +29303,76 @@ typedef struct {
  */
 
 /** XBARA - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t SEL0;                              /**< Crossbar A Select Register 0, offset: 0x0 */
-  __IO uint16_t SEL1;                              /**< Crossbar A Select Register 1, offset: 0x2 */
-  __IO uint16_t SEL2;                              /**< Crossbar A Select Register 2, offset: 0x4 */
-  __IO uint16_t SEL3;                              /**< Crossbar A Select Register 3, offset: 0x6 */
-  __IO uint16_t SEL4;                              /**< Crossbar A Select Register 4, offset: 0x8 */
-  __IO uint16_t SEL5;                              /**< Crossbar A Select Register 5, offset: 0xA */
-  __IO uint16_t SEL6;                              /**< Crossbar A Select Register 6, offset: 0xC */
-  __IO uint16_t SEL7;                              /**< Crossbar A Select Register 7, offset: 0xE */
-  __IO uint16_t SEL8;                              /**< Crossbar A Select Register 8, offset: 0x10 */
-  __IO uint16_t SEL9;                              /**< Crossbar A Select Register 9, offset: 0x12 */
-  __IO uint16_t SEL10;                             /**< Crossbar A Select Register 10, offset: 0x14 */
-  __IO uint16_t SEL11;                             /**< Crossbar A Select Register 11, offset: 0x16 */
-  __IO uint16_t SEL12;                             /**< Crossbar A Select Register 12, offset: 0x18 */
-  __IO uint16_t SEL13;                             /**< Crossbar A Select Register 13, offset: 0x1A */
-  __IO uint16_t SEL14;                             /**< Crossbar A Select Register 14, offset: 0x1C */
-  __IO uint16_t SEL15;                             /**< Crossbar A Select Register 15, offset: 0x1E */
-  __IO uint16_t SEL16;                             /**< Crossbar A Select Register 16, offset: 0x20 */
-  __IO uint16_t SEL17;                             /**< Crossbar A Select Register 17, offset: 0x22 */
-  __IO uint16_t SEL18;                             /**< Crossbar A Select Register 18, offset: 0x24 */
-  __IO uint16_t SEL19;                             /**< Crossbar A Select Register 19, offset: 0x26 */
-  __IO uint16_t SEL20;                             /**< Crossbar A Select Register 20, offset: 0x28 */
-  __IO uint16_t SEL21;                             /**< Crossbar A Select Register 21, offset: 0x2A */
-  __IO uint16_t SEL22;                             /**< Crossbar A Select Register 22, offset: 0x2C */
-  __IO uint16_t SEL23;                             /**< Crossbar A Select Register 23, offset: 0x2E */
-  __IO uint16_t SEL24;                             /**< Crossbar A Select Register 24, offset: 0x30 */
-  __IO uint16_t SEL25;                             /**< Crossbar A Select Register 25, offset: 0x32 */
-  __IO uint16_t SEL26;                             /**< Crossbar A Select Register 26, offset: 0x34 */
-  __IO uint16_t SEL27;                             /**< Crossbar A Select Register 27, offset: 0x36 */
-  __IO uint16_t SEL28;                             /**< Crossbar A Select Register 28, offset: 0x38 */
-  __IO uint16_t SEL29;                             /**< Crossbar A Select Register 29, offset: 0x3A */
-  __IO uint16_t SEL30;                             /**< Crossbar A Select Register 30, offset: 0x3C */
-  __IO uint16_t SEL31;                             /**< Crossbar A Select Register 31, offset: 0x3E */
-  __IO uint16_t SEL32;                             /**< Crossbar A Select Register 32, offset: 0x40 */
-  __IO uint16_t SEL33;                             /**< Crossbar A Select Register 33, offset: 0x42 */
-  __IO uint16_t SEL34;                             /**< Crossbar A Select Register 34, offset: 0x44 */
-  __IO uint16_t SEL35;                             /**< Crossbar A Select Register 35, offset: 0x46 */
-  __IO uint16_t SEL36;                             /**< Crossbar A Select Register 36, offset: 0x48 */
-  __IO uint16_t SEL37;                             /**< Crossbar A Select Register 37, offset: 0x4A */
-  __IO uint16_t SEL38;                             /**< Crossbar A Select Register 38, offset: 0x4C */
-  __IO uint16_t SEL39;                             /**< Crossbar A Select Register 39, offset: 0x4E */
-  __IO uint16_t SEL40;                             /**< Crossbar A Select Register 40, offset: 0x50 */
-  __IO uint16_t SEL41;                             /**< Crossbar A Select Register 41, offset: 0x52 */
-  __IO uint16_t SEL42;                             /**< Crossbar A Select Register 42, offset: 0x54 */
-  __IO uint16_t SEL43;                             /**< Crossbar A Select Register 43, offset: 0x56 */
-  __IO uint16_t SEL44;                             /**< Crossbar A Select Register 44, offset: 0x58 */
-  __IO uint16_t SEL45;                             /**< Crossbar A Select Register 45, offset: 0x5A */
-  __IO uint16_t SEL46;                             /**< Crossbar A Select Register 46, offset: 0x5C */
-  __IO uint16_t SEL47;                             /**< Crossbar A Select Register 47, offset: 0x5E */
-  __IO uint16_t SEL48;                             /**< Crossbar A Select Register 48, offset: 0x60 */
-  __IO uint16_t SEL49;                             /**< Crossbar A Select Register 49, offset: 0x62 */
-  __IO uint16_t SEL50;                             /**< Crossbar A Select Register 50, offset: 0x64 */
-  __IO uint16_t SEL51;                             /**< Crossbar A Select Register 51, offset: 0x66 */
-  __IO uint16_t SEL52;                             /**< Crossbar A Select Register 52, offset: 0x68 */
-  __IO uint16_t SEL53;                             /**< Crossbar A Select Register 53, offset: 0x6A */
-  __IO uint16_t SEL54;                             /**< Crossbar A Select Register 54, offset: 0x6C */
-  __IO uint16_t SEL55;                             /**< Crossbar A Select Register 55, offset: 0x6E */
-  __IO uint16_t SEL56;                             /**< Crossbar A Select Register 56, offset: 0x70 */
-  __IO uint16_t SEL57;                             /**< Crossbar A Select Register 57, offset: 0x72 */
-  __IO uint16_t SEL58;                             /**< Crossbar A Select Register 58, offset: 0x74 */
-  __IO uint16_t SEL59;                             /**< Crossbar A Select Register 59, offset: 0x76 */
-  __IO uint16_t SEL60;                             /**< Crossbar A Select Register 60, offset: 0x78 */
-  __IO uint16_t SEL61;                             /**< Crossbar A Select Register 61, offset: 0x7A */
-  __IO uint16_t SEL62;                             /**< Crossbar A Select Register 62, offset: 0x7C */
-  __IO uint16_t SEL63;                             /**< Crossbar A Select Register 63, offset: 0x7E */
-  __IO uint16_t SEL64;                             /**< Crossbar A Select Register 64, offset: 0x80 */
-  __IO uint16_t SEL65;                             /**< Crossbar A Select Register 65, offset: 0x82 */
-  __IO uint16_t CTRL0;                             /**< Crossbar A Control Register 0, offset: 0x84 */
-  __IO uint16_t CTRL1;                             /**< Crossbar A Control Register 1, offset: 0x86 */
+typedef struct
+{
+    __IO uint16_t SEL0;  /**< Crossbar A Select Register 0, offset: 0x0 */
+    __IO uint16_t SEL1;  /**< Crossbar A Select Register 1, offset: 0x2 */
+    __IO uint16_t SEL2;  /**< Crossbar A Select Register 2, offset: 0x4 */
+    __IO uint16_t SEL3;  /**< Crossbar A Select Register 3, offset: 0x6 */
+    __IO uint16_t SEL4;  /**< Crossbar A Select Register 4, offset: 0x8 */
+    __IO uint16_t SEL5;  /**< Crossbar A Select Register 5, offset: 0xA */
+    __IO uint16_t SEL6;  /**< Crossbar A Select Register 6, offset: 0xC */
+    __IO uint16_t SEL7;  /**< Crossbar A Select Register 7, offset: 0xE */
+    __IO uint16_t SEL8;  /**< Crossbar A Select Register 8, offset: 0x10 */
+    __IO uint16_t SEL9;  /**< Crossbar A Select Register 9, offset: 0x12 */
+    __IO uint16_t SEL10; /**< Crossbar A Select Register 10, offset: 0x14 */
+    __IO uint16_t SEL11; /**< Crossbar A Select Register 11, offset: 0x16 */
+    __IO uint16_t SEL12; /**< Crossbar A Select Register 12, offset: 0x18 */
+    __IO uint16_t SEL13; /**< Crossbar A Select Register 13, offset: 0x1A */
+    __IO uint16_t SEL14; /**< Crossbar A Select Register 14, offset: 0x1C */
+    __IO uint16_t SEL15; /**< Crossbar A Select Register 15, offset: 0x1E */
+    __IO uint16_t SEL16; /**< Crossbar A Select Register 16, offset: 0x20 */
+    __IO uint16_t SEL17; /**< Crossbar A Select Register 17, offset: 0x22 */
+    __IO uint16_t SEL18; /**< Crossbar A Select Register 18, offset: 0x24 */
+    __IO uint16_t SEL19; /**< Crossbar A Select Register 19, offset: 0x26 */
+    __IO uint16_t SEL20; /**< Crossbar A Select Register 20, offset: 0x28 */
+    __IO uint16_t SEL21; /**< Crossbar A Select Register 21, offset: 0x2A */
+    __IO uint16_t SEL22; /**< Crossbar A Select Register 22, offset: 0x2C */
+    __IO uint16_t SEL23; /**< Crossbar A Select Register 23, offset: 0x2E */
+    __IO uint16_t SEL24; /**< Crossbar A Select Register 24, offset: 0x30 */
+    __IO uint16_t SEL25; /**< Crossbar A Select Register 25, offset: 0x32 */
+    __IO uint16_t SEL26; /**< Crossbar A Select Register 26, offset: 0x34 */
+    __IO uint16_t SEL27; /**< Crossbar A Select Register 27, offset: 0x36 */
+    __IO uint16_t SEL28; /**< Crossbar A Select Register 28, offset: 0x38 */
+    __IO uint16_t SEL29; /**< Crossbar A Select Register 29, offset: 0x3A */
+    __IO uint16_t SEL30; /**< Crossbar A Select Register 30, offset: 0x3C */
+    __IO uint16_t SEL31; /**< Crossbar A Select Register 31, offset: 0x3E */
+    __IO uint16_t SEL32; /**< Crossbar A Select Register 32, offset: 0x40 */
+    __IO uint16_t SEL33; /**< Crossbar A Select Register 33, offset: 0x42 */
+    __IO uint16_t SEL34; /**< Crossbar A Select Register 34, offset: 0x44 */
+    __IO uint16_t SEL35; /**< Crossbar A Select Register 35, offset: 0x46 */
+    __IO uint16_t SEL36; /**< Crossbar A Select Register 36, offset: 0x48 */
+    __IO uint16_t SEL37; /**< Crossbar A Select Register 37, offset: 0x4A */
+    __IO uint16_t SEL38; /**< Crossbar A Select Register 38, offset: 0x4C */
+    __IO uint16_t SEL39; /**< Crossbar A Select Register 39, offset: 0x4E */
+    __IO uint16_t SEL40; /**< Crossbar A Select Register 40, offset: 0x50 */
+    __IO uint16_t SEL41; /**< Crossbar A Select Register 41, offset: 0x52 */
+    __IO uint16_t SEL42; /**< Crossbar A Select Register 42, offset: 0x54 */
+    __IO uint16_t SEL43; /**< Crossbar A Select Register 43, offset: 0x56 */
+    __IO uint16_t SEL44; /**< Crossbar A Select Register 44, offset: 0x58 */
+    __IO uint16_t SEL45; /**< Crossbar A Select Register 45, offset: 0x5A */
+    __IO uint16_t SEL46; /**< Crossbar A Select Register 46, offset: 0x5C */
+    __IO uint16_t SEL47; /**< Crossbar A Select Register 47, offset: 0x5E */
+    __IO uint16_t SEL48; /**< Crossbar A Select Register 48, offset: 0x60 */
+    __IO uint16_t SEL49; /**< Crossbar A Select Register 49, offset: 0x62 */
+    __IO uint16_t SEL50; /**< Crossbar A Select Register 50, offset: 0x64 */
+    __IO uint16_t SEL51; /**< Crossbar A Select Register 51, offset: 0x66 */
+    __IO uint16_t SEL52; /**< Crossbar A Select Register 52, offset: 0x68 */
+    __IO uint16_t SEL53; /**< Crossbar A Select Register 53, offset: 0x6A */
+    __IO uint16_t SEL54; /**< Crossbar A Select Register 54, offset: 0x6C */
+    __IO uint16_t SEL55; /**< Crossbar A Select Register 55, offset: 0x6E */
+    __IO uint16_t SEL56; /**< Crossbar A Select Register 56, offset: 0x70 */
+    __IO uint16_t SEL57; /**< Crossbar A Select Register 57, offset: 0x72 */
+    __IO uint16_t SEL58; /**< Crossbar A Select Register 58, offset: 0x74 */
+    __IO uint16_t SEL59; /**< Crossbar A Select Register 59, offset: 0x76 */
+    __IO uint16_t SEL60; /**< Crossbar A Select Register 60, offset: 0x78 */
+    __IO uint16_t SEL61; /**< Crossbar A Select Register 61, offset: 0x7A */
+    __IO uint16_t SEL62; /**< Crossbar A Select Register 62, offset: 0x7C */
+    __IO uint16_t SEL63; /**< Crossbar A Select Register 63, offset: 0x7E */
+    __IO uint16_t SEL64; /**< Crossbar A Select Register 64, offset: 0x80 */
+    __IO uint16_t SEL65; /**< Crossbar A Select Register 65, offset: 0x82 */
+    __IO uint16_t CTRL0; /**< Crossbar A Control Register 0, offset: 0x84 */
+    __IO uint16_t CTRL1; /**< Crossbar A Control Register 1, offset: 0x86 */
 } XBARA_Type;
 
 /* ----------------------------------------------------------------------------
@@ -25670,741 +29386,744 @@ typedef struct {
 
 /*! @name SEL0 - Crossbar A Select Register 0 */
 /*! @{ */
-#define XBARA_SEL0_SEL0_MASK                     (0x7FU)
-#define XBARA_SEL0_SEL0_SHIFT                    (0U)
-#define XBARA_SEL0_SEL0(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL0_SHIFT)) & XBARA_SEL0_SEL0_MASK)
-#define XBARA_SEL0_SEL1_MASK                     (0x7F00U)
-#define XBARA_SEL0_SEL1_SHIFT                    (8U)
-#define XBARA_SEL0_SEL1(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL1_SHIFT)) & XBARA_SEL0_SEL1_MASK)
+#define XBARA_SEL0_SEL0_MASK  (0x7FU)
+#define XBARA_SEL0_SEL0_SHIFT (0U)
+#define XBARA_SEL0_SEL0(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL0_SHIFT)) & XBARA_SEL0_SEL0_MASK)
+#define XBARA_SEL0_SEL1_MASK  (0x7F00U)
+#define XBARA_SEL0_SEL1_SHIFT (8U)
+#define XBARA_SEL0_SEL1(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL0_SEL1_SHIFT)) & XBARA_SEL0_SEL1_MASK)
 /*! @} */
 
 /*! @name SEL1 - Crossbar A Select Register 1 */
 /*! @{ */
-#define XBARA_SEL1_SEL2_MASK                     (0x7FU)
-#define XBARA_SEL1_SEL2_SHIFT                    (0U)
-#define XBARA_SEL1_SEL2(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL2_SHIFT)) & XBARA_SEL1_SEL2_MASK)
-#define XBARA_SEL1_SEL3_MASK                     (0x7F00U)
-#define XBARA_SEL1_SEL3_SHIFT                    (8U)
-#define XBARA_SEL1_SEL3(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL3_SHIFT)) & XBARA_SEL1_SEL3_MASK)
+#define XBARA_SEL1_SEL2_MASK  (0x7FU)
+#define XBARA_SEL1_SEL2_SHIFT (0U)
+#define XBARA_SEL1_SEL2(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL2_SHIFT)) & XBARA_SEL1_SEL2_MASK)
+#define XBARA_SEL1_SEL3_MASK  (0x7F00U)
+#define XBARA_SEL1_SEL3_SHIFT (8U)
+#define XBARA_SEL1_SEL3(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL1_SEL3_SHIFT)) & XBARA_SEL1_SEL3_MASK)
 /*! @} */
 
 /*! @name SEL2 - Crossbar A Select Register 2 */
 /*! @{ */
-#define XBARA_SEL2_SEL4_MASK                     (0x7FU)
-#define XBARA_SEL2_SEL4_SHIFT                    (0U)
-#define XBARA_SEL2_SEL4(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL4_SHIFT)) & XBARA_SEL2_SEL4_MASK)
-#define XBARA_SEL2_SEL5_MASK                     (0x7F00U)
-#define XBARA_SEL2_SEL5_SHIFT                    (8U)
-#define XBARA_SEL2_SEL5(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL5_SHIFT)) & XBARA_SEL2_SEL5_MASK)
+#define XBARA_SEL2_SEL4_MASK  (0x7FU)
+#define XBARA_SEL2_SEL4_SHIFT (0U)
+#define XBARA_SEL2_SEL4(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL4_SHIFT)) & XBARA_SEL2_SEL4_MASK)
+#define XBARA_SEL2_SEL5_MASK  (0x7F00U)
+#define XBARA_SEL2_SEL5_SHIFT (8U)
+#define XBARA_SEL2_SEL5(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL2_SEL5_SHIFT)) & XBARA_SEL2_SEL5_MASK)
 /*! @} */
 
 /*! @name SEL3 - Crossbar A Select Register 3 */
 /*! @{ */
-#define XBARA_SEL3_SEL6_MASK                     (0x7FU)
-#define XBARA_SEL3_SEL6_SHIFT                    (0U)
-#define XBARA_SEL3_SEL6(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL6_SHIFT)) & XBARA_SEL3_SEL6_MASK)
-#define XBARA_SEL3_SEL7_MASK                     (0x7F00U)
-#define XBARA_SEL3_SEL7_SHIFT                    (8U)
-#define XBARA_SEL3_SEL7(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL7_SHIFT)) & XBARA_SEL3_SEL7_MASK)
+#define XBARA_SEL3_SEL6_MASK  (0x7FU)
+#define XBARA_SEL3_SEL6_SHIFT (0U)
+#define XBARA_SEL3_SEL6(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL6_SHIFT)) & XBARA_SEL3_SEL6_MASK)
+#define XBARA_SEL3_SEL7_MASK  (0x7F00U)
+#define XBARA_SEL3_SEL7_SHIFT (8U)
+#define XBARA_SEL3_SEL7(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL3_SEL7_SHIFT)) & XBARA_SEL3_SEL7_MASK)
 /*! @} */
 
 /*! @name SEL4 - Crossbar A Select Register 4 */
 /*! @{ */
-#define XBARA_SEL4_SEL8_MASK                     (0x7FU)
-#define XBARA_SEL4_SEL8_SHIFT                    (0U)
-#define XBARA_SEL4_SEL8(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL8_SHIFT)) & XBARA_SEL4_SEL8_MASK)
-#define XBARA_SEL4_SEL9_MASK                     (0x7F00U)
-#define XBARA_SEL4_SEL9_SHIFT                    (8U)
-#define XBARA_SEL4_SEL9(x)                       (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL9_SHIFT)) & XBARA_SEL4_SEL9_MASK)
+#define XBARA_SEL4_SEL8_MASK  (0x7FU)
+#define XBARA_SEL4_SEL8_SHIFT (0U)
+#define XBARA_SEL4_SEL8(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL8_SHIFT)) & XBARA_SEL4_SEL8_MASK)
+#define XBARA_SEL4_SEL9_MASK  (0x7F00U)
+#define XBARA_SEL4_SEL9_SHIFT (8U)
+#define XBARA_SEL4_SEL9(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL4_SEL9_SHIFT)) & XBARA_SEL4_SEL9_MASK)
 /*! @} */
 
 /*! @name SEL5 - Crossbar A Select Register 5 */
 /*! @{ */
-#define XBARA_SEL5_SEL10_MASK                    (0x7FU)
-#define XBARA_SEL5_SEL10_SHIFT                   (0U)
-#define XBARA_SEL5_SEL10(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL10_SHIFT)) & XBARA_SEL5_SEL10_MASK)
-#define XBARA_SEL5_SEL11_MASK                    (0x7F00U)
-#define XBARA_SEL5_SEL11_SHIFT                   (8U)
-#define XBARA_SEL5_SEL11(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL11_SHIFT)) & XBARA_SEL5_SEL11_MASK)
+#define XBARA_SEL5_SEL10_MASK  (0x7FU)
+#define XBARA_SEL5_SEL10_SHIFT (0U)
+#define XBARA_SEL5_SEL10(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL10_SHIFT)) & XBARA_SEL5_SEL10_MASK)
+#define XBARA_SEL5_SEL11_MASK  (0x7F00U)
+#define XBARA_SEL5_SEL11_SHIFT (8U)
+#define XBARA_SEL5_SEL11(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL5_SEL11_SHIFT)) & XBARA_SEL5_SEL11_MASK)
 /*! @} */
 
 /*! @name SEL6 - Crossbar A Select Register 6 */
 /*! @{ */
-#define XBARA_SEL6_SEL12_MASK                    (0x7FU)
-#define XBARA_SEL6_SEL12_SHIFT                   (0U)
-#define XBARA_SEL6_SEL12(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL12_SHIFT)) & XBARA_SEL6_SEL12_MASK)
-#define XBARA_SEL6_SEL13_MASK                    (0x7F00U)
-#define XBARA_SEL6_SEL13_SHIFT                   (8U)
-#define XBARA_SEL6_SEL13(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL13_SHIFT)) & XBARA_SEL6_SEL13_MASK)
+#define XBARA_SEL6_SEL12_MASK  (0x7FU)
+#define XBARA_SEL6_SEL12_SHIFT (0U)
+#define XBARA_SEL6_SEL12(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL12_SHIFT)) & XBARA_SEL6_SEL12_MASK)
+#define XBARA_SEL6_SEL13_MASK  (0x7F00U)
+#define XBARA_SEL6_SEL13_SHIFT (8U)
+#define XBARA_SEL6_SEL13(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL6_SEL13_SHIFT)) & XBARA_SEL6_SEL13_MASK)
 /*! @} */
 
 /*! @name SEL7 - Crossbar A Select Register 7 */
 /*! @{ */
-#define XBARA_SEL7_SEL14_MASK                    (0x7FU)
-#define XBARA_SEL7_SEL14_SHIFT                   (0U)
-#define XBARA_SEL7_SEL14(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL14_SHIFT)) & XBARA_SEL7_SEL14_MASK)
-#define XBARA_SEL7_SEL15_MASK                    (0x7F00U)
-#define XBARA_SEL7_SEL15_SHIFT                   (8U)
-#define XBARA_SEL7_SEL15(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL15_SHIFT)) & XBARA_SEL7_SEL15_MASK)
+#define XBARA_SEL7_SEL14_MASK  (0x7FU)
+#define XBARA_SEL7_SEL14_SHIFT (0U)
+#define XBARA_SEL7_SEL14(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL14_SHIFT)) & XBARA_SEL7_SEL14_MASK)
+#define XBARA_SEL7_SEL15_MASK  (0x7F00U)
+#define XBARA_SEL7_SEL15_SHIFT (8U)
+#define XBARA_SEL7_SEL15(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL7_SEL15_SHIFT)) & XBARA_SEL7_SEL15_MASK)
 /*! @} */
 
 /*! @name SEL8 - Crossbar A Select Register 8 */
 /*! @{ */
-#define XBARA_SEL8_SEL16_MASK                    (0x7FU)
-#define XBARA_SEL8_SEL16_SHIFT                   (0U)
-#define XBARA_SEL8_SEL16(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL16_SHIFT)) & XBARA_SEL8_SEL16_MASK)
-#define XBARA_SEL8_SEL17_MASK                    (0x7F00U)
-#define XBARA_SEL8_SEL17_SHIFT                   (8U)
-#define XBARA_SEL8_SEL17(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL17_SHIFT)) & XBARA_SEL8_SEL17_MASK)
+#define XBARA_SEL8_SEL16_MASK  (0x7FU)
+#define XBARA_SEL8_SEL16_SHIFT (0U)
+#define XBARA_SEL8_SEL16(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL16_SHIFT)) & XBARA_SEL8_SEL16_MASK)
+#define XBARA_SEL8_SEL17_MASK  (0x7F00U)
+#define XBARA_SEL8_SEL17_SHIFT (8U)
+#define XBARA_SEL8_SEL17(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL8_SEL17_SHIFT)) & XBARA_SEL8_SEL17_MASK)
 /*! @} */
 
 /*! @name SEL9 - Crossbar A Select Register 9 */
 /*! @{ */
-#define XBARA_SEL9_SEL18_MASK                    (0x7FU)
-#define XBARA_SEL9_SEL18_SHIFT                   (0U)
-#define XBARA_SEL9_SEL18(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL18_SHIFT)) & XBARA_SEL9_SEL18_MASK)
-#define XBARA_SEL9_SEL19_MASK                    (0x7F00U)
-#define XBARA_SEL9_SEL19_SHIFT                   (8U)
-#define XBARA_SEL9_SEL19(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL19_SHIFT)) & XBARA_SEL9_SEL19_MASK)
+#define XBARA_SEL9_SEL18_MASK  (0x7FU)
+#define XBARA_SEL9_SEL18_SHIFT (0U)
+#define XBARA_SEL9_SEL18(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL18_SHIFT)) & XBARA_SEL9_SEL18_MASK)
+#define XBARA_SEL9_SEL19_MASK  (0x7F00U)
+#define XBARA_SEL9_SEL19_SHIFT (8U)
+#define XBARA_SEL9_SEL19(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL9_SEL19_SHIFT)) & XBARA_SEL9_SEL19_MASK)
 /*! @} */
 
 /*! @name SEL10 - Crossbar A Select Register 10 */
 /*! @{ */
-#define XBARA_SEL10_SEL20_MASK                   (0x7FU)
-#define XBARA_SEL10_SEL20_SHIFT                  (0U)
-#define XBARA_SEL10_SEL20(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL20_SHIFT)) & XBARA_SEL10_SEL20_MASK)
-#define XBARA_SEL10_SEL21_MASK                   (0x7F00U)
-#define XBARA_SEL10_SEL21_SHIFT                  (8U)
-#define XBARA_SEL10_SEL21(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL21_SHIFT)) & XBARA_SEL10_SEL21_MASK)
+#define XBARA_SEL10_SEL20_MASK  (0x7FU)
+#define XBARA_SEL10_SEL20_SHIFT (0U)
+#define XBARA_SEL10_SEL20(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL20_SHIFT)) & XBARA_SEL10_SEL20_MASK)
+#define XBARA_SEL10_SEL21_MASK  (0x7F00U)
+#define XBARA_SEL10_SEL21_SHIFT (8U)
+#define XBARA_SEL10_SEL21(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL10_SEL21_SHIFT)) & XBARA_SEL10_SEL21_MASK)
 /*! @} */
 
 /*! @name SEL11 - Crossbar A Select Register 11 */
 /*! @{ */
-#define XBARA_SEL11_SEL22_MASK                   (0x7FU)
-#define XBARA_SEL11_SEL22_SHIFT                  (0U)
-#define XBARA_SEL11_SEL22(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL22_SHIFT)) & XBARA_SEL11_SEL22_MASK)
-#define XBARA_SEL11_SEL23_MASK                   (0x7F00U)
-#define XBARA_SEL11_SEL23_SHIFT                  (8U)
-#define XBARA_SEL11_SEL23(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL23_SHIFT)) & XBARA_SEL11_SEL23_MASK)
+#define XBARA_SEL11_SEL22_MASK  (0x7FU)
+#define XBARA_SEL11_SEL22_SHIFT (0U)
+#define XBARA_SEL11_SEL22(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL22_SHIFT)) & XBARA_SEL11_SEL22_MASK)
+#define XBARA_SEL11_SEL23_MASK  (0x7F00U)
+#define XBARA_SEL11_SEL23_SHIFT (8U)
+#define XBARA_SEL11_SEL23(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL11_SEL23_SHIFT)) & XBARA_SEL11_SEL23_MASK)
 /*! @} */
 
 /*! @name SEL12 - Crossbar A Select Register 12 */
 /*! @{ */
-#define XBARA_SEL12_SEL24_MASK                   (0x7FU)
-#define XBARA_SEL12_SEL24_SHIFT                  (0U)
-#define XBARA_SEL12_SEL24(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL24_SHIFT)) & XBARA_SEL12_SEL24_MASK)
-#define XBARA_SEL12_SEL25_MASK                   (0x7F00U)
-#define XBARA_SEL12_SEL25_SHIFT                  (8U)
-#define XBARA_SEL12_SEL25(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL25_SHIFT)) & XBARA_SEL12_SEL25_MASK)
+#define XBARA_SEL12_SEL24_MASK  (0x7FU)
+#define XBARA_SEL12_SEL24_SHIFT (0U)
+#define XBARA_SEL12_SEL24(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL24_SHIFT)) & XBARA_SEL12_SEL24_MASK)
+#define XBARA_SEL12_SEL25_MASK  (0x7F00U)
+#define XBARA_SEL12_SEL25_SHIFT (8U)
+#define XBARA_SEL12_SEL25(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL12_SEL25_SHIFT)) & XBARA_SEL12_SEL25_MASK)
 /*! @} */
 
 /*! @name SEL13 - Crossbar A Select Register 13 */
 /*! @{ */
-#define XBARA_SEL13_SEL26_MASK                   (0x7FU)
-#define XBARA_SEL13_SEL26_SHIFT                  (0U)
-#define XBARA_SEL13_SEL26(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL26_SHIFT)) & XBARA_SEL13_SEL26_MASK)
-#define XBARA_SEL13_SEL27_MASK                   (0x7F00U)
-#define XBARA_SEL13_SEL27_SHIFT                  (8U)
-#define XBARA_SEL13_SEL27(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL27_SHIFT)) & XBARA_SEL13_SEL27_MASK)
+#define XBARA_SEL13_SEL26_MASK  (0x7FU)
+#define XBARA_SEL13_SEL26_SHIFT (0U)
+#define XBARA_SEL13_SEL26(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL26_SHIFT)) & XBARA_SEL13_SEL26_MASK)
+#define XBARA_SEL13_SEL27_MASK  (0x7F00U)
+#define XBARA_SEL13_SEL27_SHIFT (8U)
+#define XBARA_SEL13_SEL27(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL13_SEL27_SHIFT)) & XBARA_SEL13_SEL27_MASK)
 /*! @} */
 
 /*! @name SEL14 - Crossbar A Select Register 14 */
 /*! @{ */
-#define XBARA_SEL14_SEL28_MASK                   (0x7FU)
-#define XBARA_SEL14_SEL28_SHIFT                  (0U)
-#define XBARA_SEL14_SEL28(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL28_SHIFT)) & XBARA_SEL14_SEL28_MASK)
-#define XBARA_SEL14_SEL29_MASK                   (0x7F00U)
-#define XBARA_SEL14_SEL29_SHIFT                  (8U)
-#define XBARA_SEL14_SEL29(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL29_SHIFT)) & XBARA_SEL14_SEL29_MASK)
+#define XBARA_SEL14_SEL28_MASK  (0x7FU)
+#define XBARA_SEL14_SEL28_SHIFT (0U)
+#define XBARA_SEL14_SEL28(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL28_SHIFT)) & XBARA_SEL14_SEL28_MASK)
+#define XBARA_SEL14_SEL29_MASK  (0x7F00U)
+#define XBARA_SEL14_SEL29_SHIFT (8U)
+#define XBARA_SEL14_SEL29(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL14_SEL29_SHIFT)) & XBARA_SEL14_SEL29_MASK)
 /*! @} */
 
 /*! @name SEL15 - Crossbar A Select Register 15 */
 /*! @{ */
-#define XBARA_SEL15_SEL30_MASK                   (0x7FU)
-#define XBARA_SEL15_SEL30_SHIFT                  (0U)
-#define XBARA_SEL15_SEL30(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL30_SHIFT)) & XBARA_SEL15_SEL30_MASK)
-#define XBARA_SEL15_SEL31_MASK                   (0x7F00U)
-#define XBARA_SEL15_SEL31_SHIFT                  (8U)
-#define XBARA_SEL15_SEL31(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL31_SHIFT)) & XBARA_SEL15_SEL31_MASK)
+#define XBARA_SEL15_SEL30_MASK  (0x7FU)
+#define XBARA_SEL15_SEL30_SHIFT (0U)
+#define XBARA_SEL15_SEL30(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL30_SHIFT)) & XBARA_SEL15_SEL30_MASK)
+#define XBARA_SEL15_SEL31_MASK  (0x7F00U)
+#define XBARA_SEL15_SEL31_SHIFT (8U)
+#define XBARA_SEL15_SEL31(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL15_SEL31_SHIFT)) & XBARA_SEL15_SEL31_MASK)
 /*! @} */
 
 /*! @name SEL16 - Crossbar A Select Register 16 */
 /*! @{ */
-#define XBARA_SEL16_SEL32_MASK                   (0x7FU)
-#define XBARA_SEL16_SEL32_SHIFT                  (0U)
-#define XBARA_SEL16_SEL32(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL32_SHIFT)) & XBARA_SEL16_SEL32_MASK)
-#define XBARA_SEL16_SEL33_MASK                   (0x7F00U)
-#define XBARA_SEL16_SEL33_SHIFT                  (8U)
-#define XBARA_SEL16_SEL33(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL33_SHIFT)) & XBARA_SEL16_SEL33_MASK)
+#define XBARA_SEL16_SEL32_MASK  (0x7FU)
+#define XBARA_SEL16_SEL32_SHIFT (0U)
+#define XBARA_SEL16_SEL32(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL32_SHIFT)) & XBARA_SEL16_SEL32_MASK)
+#define XBARA_SEL16_SEL33_MASK  (0x7F00U)
+#define XBARA_SEL16_SEL33_SHIFT (8U)
+#define XBARA_SEL16_SEL33(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL16_SEL33_SHIFT)) & XBARA_SEL16_SEL33_MASK)
 /*! @} */
 
 /*! @name SEL17 - Crossbar A Select Register 17 */
 /*! @{ */
-#define XBARA_SEL17_SEL34_MASK                   (0x7FU)
-#define XBARA_SEL17_SEL34_SHIFT                  (0U)
-#define XBARA_SEL17_SEL34(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL34_SHIFT)) & XBARA_SEL17_SEL34_MASK)
-#define XBARA_SEL17_SEL35_MASK                   (0x7F00U)
-#define XBARA_SEL17_SEL35_SHIFT                  (8U)
-#define XBARA_SEL17_SEL35(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL35_SHIFT)) & XBARA_SEL17_SEL35_MASK)
+#define XBARA_SEL17_SEL34_MASK  (0x7FU)
+#define XBARA_SEL17_SEL34_SHIFT (0U)
+#define XBARA_SEL17_SEL34(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL34_SHIFT)) & XBARA_SEL17_SEL34_MASK)
+#define XBARA_SEL17_SEL35_MASK  (0x7F00U)
+#define XBARA_SEL17_SEL35_SHIFT (8U)
+#define XBARA_SEL17_SEL35(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL17_SEL35_SHIFT)) & XBARA_SEL17_SEL35_MASK)
 /*! @} */
 
 /*! @name SEL18 - Crossbar A Select Register 18 */
 /*! @{ */
-#define XBARA_SEL18_SEL36_MASK                   (0x7FU)
-#define XBARA_SEL18_SEL36_SHIFT                  (0U)
-#define XBARA_SEL18_SEL36(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL36_SHIFT)) & XBARA_SEL18_SEL36_MASK)
-#define XBARA_SEL18_SEL37_MASK                   (0x7F00U)
-#define XBARA_SEL18_SEL37_SHIFT                  (8U)
-#define XBARA_SEL18_SEL37(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL37_SHIFT)) & XBARA_SEL18_SEL37_MASK)
+#define XBARA_SEL18_SEL36_MASK  (0x7FU)
+#define XBARA_SEL18_SEL36_SHIFT (0U)
+#define XBARA_SEL18_SEL36(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL36_SHIFT)) & XBARA_SEL18_SEL36_MASK)
+#define XBARA_SEL18_SEL37_MASK  (0x7F00U)
+#define XBARA_SEL18_SEL37_SHIFT (8U)
+#define XBARA_SEL18_SEL37(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL18_SEL37_SHIFT)) & XBARA_SEL18_SEL37_MASK)
 /*! @} */
 
 /*! @name SEL19 - Crossbar A Select Register 19 */
 /*! @{ */
-#define XBARA_SEL19_SEL38_MASK                   (0x7FU)
-#define XBARA_SEL19_SEL38_SHIFT                  (0U)
-#define XBARA_SEL19_SEL38(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL38_SHIFT)) & XBARA_SEL19_SEL38_MASK)
-#define XBARA_SEL19_SEL39_MASK                   (0x7F00U)
-#define XBARA_SEL19_SEL39_SHIFT                  (8U)
-#define XBARA_SEL19_SEL39(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL39_SHIFT)) & XBARA_SEL19_SEL39_MASK)
+#define XBARA_SEL19_SEL38_MASK  (0x7FU)
+#define XBARA_SEL19_SEL38_SHIFT (0U)
+#define XBARA_SEL19_SEL38(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL38_SHIFT)) & XBARA_SEL19_SEL38_MASK)
+#define XBARA_SEL19_SEL39_MASK  (0x7F00U)
+#define XBARA_SEL19_SEL39_SHIFT (8U)
+#define XBARA_SEL19_SEL39(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL19_SEL39_SHIFT)) & XBARA_SEL19_SEL39_MASK)
 /*! @} */
 
 /*! @name SEL20 - Crossbar A Select Register 20 */
 /*! @{ */
-#define XBARA_SEL20_SEL40_MASK                   (0x7FU)
-#define XBARA_SEL20_SEL40_SHIFT                  (0U)
-#define XBARA_SEL20_SEL40(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL40_SHIFT)) & XBARA_SEL20_SEL40_MASK)
-#define XBARA_SEL20_SEL41_MASK                   (0x7F00U)
-#define XBARA_SEL20_SEL41_SHIFT                  (8U)
-#define XBARA_SEL20_SEL41(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL41_SHIFT)) & XBARA_SEL20_SEL41_MASK)
+#define XBARA_SEL20_SEL40_MASK  (0x7FU)
+#define XBARA_SEL20_SEL40_SHIFT (0U)
+#define XBARA_SEL20_SEL40(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL40_SHIFT)) & XBARA_SEL20_SEL40_MASK)
+#define XBARA_SEL20_SEL41_MASK  (0x7F00U)
+#define XBARA_SEL20_SEL41_SHIFT (8U)
+#define XBARA_SEL20_SEL41(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL20_SEL41_SHIFT)) & XBARA_SEL20_SEL41_MASK)
 /*! @} */
 
 /*! @name SEL21 - Crossbar A Select Register 21 */
 /*! @{ */
-#define XBARA_SEL21_SEL42_MASK                   (0x7FU)
-#define XBARA_SEL21_SEL42_SHIFT                  (0U)
-#define XBARA_SEL21_SEL42(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL42_SHIFT)) & XBARA_SEL21_SEL42_MASK)
-#define XBARA_SEL21_SEL43_MASK                   (0x7F00U)
-#define XBARA_SEL21_SEL43_SHIFT                  (8U)
-#define XBARA_SEL21_SEL43(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL43_SHIFT)) & XBARA_SEL21_SEL43_MASK)
+#define XBARA_SEL21_SEL42_MASK  (0x7FU)
+#define XBARA_SEL21_SEL42_SHIFT (0U)
+#define XBARA_SEL21_SEL42(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL42_SHIFT)) & XBARA_SEL21_SEL42_MASK)
+#define XBARA_SEL21_SEL43_MASK  (0x7F00U)
+#define XBARA_SEL21_SEL43_SHIFT (8U)
+#define XBARA_SEL21_SEL43(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL21_SEL43_SHIFT)) & XBARA_SEL21_SEL43_MASK)
 /*! @} */
 
 /*! @name SEL22 - Crossbar A Select Register 22 */
 /*! @{ */
-#define XBARA_SEL22_SEL44_MASK                   (0x7FU)
-#define XBARA_SEL22_SEL44_SHIFT                  (0U)
-#define XBARA_SEL22_SEL44(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL44_SHIFT)) & XBARA_SEL22_SEL44_MASK)
-#define XBARA_SEL22_SEL45_MASK                   (0x7F00U)
-#define XBARA_SEL22_SEL45_SHIFT                  (8U)
-#define XBARA_SEL22_SEL45(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL45_SHIFT)) & XBARA_SEL22_SEL45_MASK)
+#define XBARA_SEL22_SEL44_MASK  (0x7FU)
+#define XBARA_SEL22_SEL44_SHIFT (0U)
+#define XBARA_SEL22_SEL44(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL44_SHIFT)) & XBARA_SEL22_SEL44_MASK)
+#define XBARA_SEL22_SEL45_MASK  (0x7F00U)
+#define XBARA_SEL22_SEL45_SHIFT (8U)
+#define XBARA_SEL22_SEL45(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL22_SEL45_SHIFT)) & XBARA_SEL22_SEL45_MASK)
 /*! @} */
 
 /*! @name SEL23 - Crossbar A Select Register 23 */
 /*! @{ */
-#define XBARA_SEL23_SEL46_MASK                   (0x7FU)
-#define XBARA_SEL23_SEL46_SHIFT                  (0U)
-#define XBARA_SEL23_SEL46(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL46_SHIFT)) & XBARA_SEL23_SEL46_MASK)
-#define XBARA_SEL23_SEL47_MASK                   (0x7F00U)
-#define XBARA_SEL23_SEL47_SHIFT                  (8U)
-#define XBARA_SEL23_SEL47(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL47_SHIFT)) & XBARA_SEL23_SEL47_MASK)
+#define XBARA_SEL23_SEL46_MASK  (0x7FU)
+#define XBARA_SEL23_SEL46_SHIFT (0U)
+#define XBARA_SEL23_SEL46(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL46_SHIFT)) & XBARA_SEL23_SEL46_MASK)
+#define XBARA_SEL23_SEL47_MASK  (0x7F00U)
+#define XBARA_SEL23_SEL47_SHIFT (8U)
+#define XBARA_SEL23_SEL47(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL23_SEL47_SHIFT)) & XBARA_SEL23_SEL47_MASK)
 /*! @} */
 
 /*! @name SEL24 - Crossbar A Select Register 24 */
 /*! @{ */
-#define XBARA_SEL24_SEL48_MASK                   (0x7FU)
-#define XBARA_SEL24_SEL48_SHIFT                  (0U)
-#define XBARA_SEL24_SEL48(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL48_SHIFT)) & XBARA_SEL24_SEL48_MASK)
-#define XBARA_SEL24_SEL49_MASK                   (0x7F00U)
-#define XBARA_SEL24_SEL49_SHIFT                  (8U)
-#define XBARA_SEL24_SEL49(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL49_SHIFT)) & XBARA_SEL24_SEL49_MASK)
+#define XBARA_SEL24_SEL48_MASK  (0x7FU)
+#define XBARA_SEL24_SEL48_SHIFT (0U)
+#define XBARA_SEL24_SEL48(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL48_SHIFT)) & XBARA_SEL24_SEL48_MASK)
+#define XBARA_SEL24_SEL49_MASK  (0x7F00U)
+#define XBARA_SEL24_SEL49_SHIFT (8U)
+#define XBARA_SEL24_SEL49(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL24_SEL49_SHIFT)) & XBARA_SEL24_SEL49_MASK)
 /*! @} */
 
 /*! @name SEL25 - Crossbar A Select Register 25 */
 /*! @{ */
-#define XBARA_SEL25_SEL50_MASK                   (0x7FU)
-#define XBARA_SEL25_SEL50_SHIFT                  (0U)
-#define XBARA_SEL25_SEL50(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL50_SHIFT)) & XBARA_SEL25_SEL50_MASK)
-#define XBARA_SEL25_SEL51_MASK                   (0x7F00U)
-#define XBARA_SEL25_SEL51_SHIFT                  (8U)
-#define XBARA_SEL25_SEL51(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL51_SHIFT)) & XBARA_SEL25_SEL51_MASK)
+#define XBARA_SEL25_SEL50_MASK  (0x7FU)
+#define XBARA_SEL25_SEL50_SHIFT (0U)
+#define XBARA_SEL25_SEL50(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL50_SHIFT)) & XBARA_SEL25_SEL50_MASK)
+#define XBARA_SEL25_SEL51_MASK  (0x7F00U)
+#define XBARA_SEL25_SEL51_SHIFT (8U)
+#define XBARA_SEL25_SEL51(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL25_SEL51_SHIFT)) & XBARA_SEL25_SEL51_MASK)
 /*! @} */
 
 /*! @name SEL26 - Crossbar A Select Register 26 */
 /*! @{ */
-#define XBARA_SEL26_SEL52_MASK                   (0x7FU)
-#define XBARA_SEL26_SEL52_SHIFT                  (0U)
-#define XBARA_SEL26_SEL52(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL52_SHIFT)) & XBARA_SEL26_SEL52_MASK)
-#define XBARA_SEL26_SEL53_MASK                   (0x7F00U)
-#define XBARA_SEL26_SEL53_SHIFT                  (8U)
-#define XBARA_SEL26_SEL53(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL53_SHIFT)) & XBARA_SEL26_SEL53_MASK)
+#define XBARA_SEL26_SEL52_MASK  (0x7FU)
+#define XBARA_SEL26_SEL52_SHIFT (0U)
+#define XBARA_SEL26_SEL52(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL52_SHIFT)) & XBARA_SEL26_SEL52_MASK)
+#define XBARA_SEL26_SEL53_MASK  (0x7F00U)
+#define XBARA_SEL26_SEL53_SHIFT (8U)
+#define XBARA_SEL26_SEL53(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL26_SEL53_SHIFT)) & XBARA_SEL26_SEL53_MASK)
 /*! @} */
 
 /*! @name SEL27 - Crossbar A Select Register 27 */
 /*! @{ */
-#define XBARA_SEL27_SEL54_MASK                   (0x7FU)
-#define XBARA_SEL27_SEL54_SHIFT                  (0U)
-#define XBARA_SEL27_SEL54(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL54_SHIFT)) & XBARA_SEL27_SEL54_MASK)
-#define XBARA_SEL27_SEL55_MASK                   (0x7F00U)
-#define XBARA_SEL27_SEL55_SHIFT                  (8U)
-#define XBARA_SEL27_SEL55(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL55_SHIFT)) & XBARA_SEL27_SEL55_MASK)
+#define XBARA_SEL27_SEL54_MASK  (0x7FU)
+#define XBARA_SEL27_SEL54_SHIFT (0U)
+#define XBARA_SEL27_SEL54(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL54_SHIFT)) & XBARA_SEL27_SEL54_MASK)
+#define XBARA_SEL27_SEL55_MASK  (0x7F00U)
+#define XBARA_SEL27_SEL55_SHIFT (8U)
+#define XBARA_SEL27_SEL55(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL27_SEL55_SHIFT)) & XBARA_SEL27_SEL55_MASK)
 /*! @} */
 
 /*! @name SEL28 - Crossbar A Select Register 28 */
 /*! @{ */
-#define XBARA_SEL28_SEL56_MASK                   (0x7FU)
-#define XBARA_SEL28_SEL56_SHIFT                  (0U)
-#define XBARA_SEL28_SEL56(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL56_SHIFT)) & XBARA_SEL28_SEL56_MASK)
-#define XBARA_SEL28_SEL57_MASK                   (0x7F00U)
-#define XBARA_SEL28_SEL57_SHIFT                  (8U)
-#define XBARA_SEL28_SEL57(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL57_SHIFT)) & XBARA_SEL28_SEL57_MASK)
+#define XBARA_SEL28_SEL56_MASK  (0x7FU)
+#define XBARA_SEL28_SEL56_SHIFT (0U)
+#define XBARA_SEL28_SEL56(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL56_SHIFT)) & XBARA_SEL28_SEL56_MASK)
+#define XBARA_SEL28_SEL57_MASK  (0x7F00U)
+#define XBARA_SEL28_SEL57_SHIFT (8U)
+#define XBARA_SEL28_SEL57(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL28_SEL57_SHIFT)) & XBARA_SEL28_SEL57_MASK)
 /*! @} */
 
 /*! @name SEL29 - Crossbar A Select Register 29 */
 /*! @{ */
-#define XBARA_SEL29_SEL58_MASK                   (0x7FU)
-#define XBARA_SEL29_SEL58_SHIFT                  (0U)
-#define XBARA_SEL29_SEL58(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL58_SHIFT)) & XBARA_SEL29_SEL58_MASK)
-#define XBARA_SEL29_SEL59_MASK                   (0x7F00U)
-#define XBARA_SEL29_SEL59_SHIFT                  (8U)
-#define XBARA_SEL29_SEL59(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL59_SHIFT)) & XBARA_SEL29_SEL59_MASK)
+#define XBARA_SEL29_SEL58_MASK  (0x7FU)
+#define XBARA_SEL29_SEL58_SHIFT (0U)
+#define XBARA_SEL29_SEL58(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL58_SHIFT)) & XBARA_SEL29_SEL58_MASK)
+#define XBARA_SEL29_SEL59_MASK  (0x7F00U)
+#define XBARA_SEL29_SEL59_SHIFT (8U)
+#define XBARA_SEL29_SEL59(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL29_SEL59_SHIFT)) & XBARA_SEL29_SEL59_MASK)
 /*! @} */
 
 /*! @name SEL30 - Crossbar A Select Register 30 */
 /*! @{ */
-#define XBARA_SEL30_SEL60_MASK                   (0x7FU)
-#define XBARA_SEL30_SEL60_SHIFT                  (0U)
-#define XBARA_SEL30_SEL60(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL60_SHIFT)) & XBARA_SEL30_SEL60_MASK)
-#define XBARA_SEL30_SEL61_MASK                   (0x7F00U)
-#define XBARA_SEL30_SEL61_SHIFT                  (8U)
-#define XBARA_SEL30_SEL61(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL61_SHIFT)) & XBARA_SEL30_SEL61_MASK)
+#define XBARA_SEL30_SEL60_MASK  (0x7FU)
+#define XBARA_SEL30_SEL60_SHIFT (0U)
+#define XBARA_SEL30_SEL60(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL60_SHIFT)) & XBARA_SEL30_SEL60_MASK)
+#define XBARA_SEL30_SEL61_MASK  (0x7F00U)
+#define XBARA_SEL30_SEL61_SHIFT (8U)
+#define XBARA_SEL30_SEL61(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL30_SEL61_SHIFT)) & XBARA_SEL30_SEL61_MASK)
 /*! @} */
 
 /*! @name SEL31 - Crossbar A Select Register 31 */
 /*! @{ */
-#define XBARA_SEL31_SEL62_MASK                   (0x7FU)
-#define XBARA_SEL31_SEL62_SHIFT                  (0U)
-#define XBARA_SEL31_SEL62(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL62_SHIFT)) & XBARA_SEL31_SEL62_MASK)
-#define XBARA_SEL31_SEL63_MASK                   (0x7F00U)
-#define XBARA_SEL31_SEL63_SHIFT                  (8U)
-#define XBARA_SEL31_SEL63(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL63_SHIFT)) & XBARA_SEL31_SEL63_MASK)
+#define XBARA_SEL31_SEL62_MASK  (0x7FU)
+#define XBARA_SEL31_SEL62_SHIFT (0U)
+#define XBARA_SEL31_SEL62(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL62_SHIFT)) & XBARA_SEL31_SEL62_MASK)
+#define XBARA_SEL31_SEL63_MASK  (0x7F00U)
+#define XBARA_SEL31_SEL63_SHIFT (8U)
+#define XBARA_SEL31_SEL63(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL31_SEL63_SHIFT)) & XBARA_SEL31_SEL63_MASK)
 /*! @} */
 
 /*! @name SEL32 - Crossbar A Select Register 32 */
 /*! @{ */
-#define XBARA_SEL32_SEL64_MASK                   (0x7FU)
-#define XBARA_SEL32_SEL64_SHIFT                  (0U)
-#define XBARA_SEL32_SEL64(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL64_SHIFT)) & XBARA_SEL32_SEL64_MASK)
-#define XBARA_SEL32_SEL65_MASK                   (0x7F00U)
-#define XBARA_SEL32_SEL65_SHIFT                  (8U)
-#define XBARA_SEL32_SEL65(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL65_SHIFT)) & XBARA_SEL32_SEL65_MASK)
+#define XBARA_SEL32_SEL64_MASK  (0x7FU)
+#define XBARA_SEL32_SEL64_SHIFT (0U)
+#define XBARA_SEL32_SEL64(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL64_SHIFT)) & XBARA_SEL32_SEL64_MASK)
+#define XBARA_SEL32_SEL65_MASK  (0x7F00U)
+#define XBARA_SEL32_SEL65_SHIFT (8U)
+#define XBARA_SEL32_SEL65(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL32_SEL65_SHIFT)) & XBARA_SEL32_SEL65_MASK)
 /*! @} */
 
 /*! @name SEL33 - Crossbar A Select Register 33 */
 /*! @{ */
-#define XBARA_SEL33_SEL66_MASK                   (0x7FU)
-#define XBARA_SEL33_SEL66_SHIFT                  (0U)
-#define XBARA_SEL33_SEL66(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL66_SHIFT)) & XBARA_SEL33_SEL66_MASK)
-#define XBARA_SEL33_SEL67_MASK                   (0x7F00U)
-#define XBARA_SEL33_SEL67_SHIFT                  (8U)
-#define XBARA_SEL33_SEL67(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL67_SHIFT)) & XBARA_SEL33_SEL67_MASK)
+#define XBARA_SEL33_SEL66_MASK  (0x7FU)
+#define XBARA_SEL33_SEL66_SHIFT (0U)
+#define XBARA_SEL33_SEL66(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL66_SHIFT)) & XBARA_SEL33_SEL66_MASK)
+#define XBARA_SEL33_SEL67_MASK  (0x7F00U)
+#define XBARA_SEL33_SEL67_SHIFT (8U)
+#define XBARA_SEL33_SEL67(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL33_SEL67_SHIFT)) & XBARA_SEL33_SEL67_MASK)
 /*! @} */
 
 /*! @name SEL34 - Crossbar A Select Register 34 */
 /*! @{ */
-#define XBARA_SEL34_SEL68_MASK                   (0x7FU)
-#define XBARA_SEL34_SEL68_SHIFT                  (0U)
-#define XBARA_SEL34_SEL68(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL68_SHIFT)) & XBARA_SEL34_SEL68_MASK)
-#define XBARA_SEL34_SEL69_MASK                   (0x7F00U)
-#define XBARA_SEL34_SEL69_SHIFT                  (8U)
-#define XBARA_SEL34_SEL69(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL69_SHIFT)) & XBARA_SEL34_SEL69_MASK)
+#define XBARA_SEL34_SEL68_MASK  (0x7FU)
+#define XBARA_SEL34_SEL68_SHIFT (0U)
+#define XBARA_SEL34_SEL68(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL68_SHIFT)) & XBARA_SEL34_SEL68_MASK)
+#define XBARA_SEL34_SEL69_MASK  (0x7F00U)
+#define XBARA_SEL34_SEL69_SHIFT (8U)
+#define XBARA_SEL34_SEL69(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL34_SEL69_SHIFT)) & XBARA_SEL34_SEL69_MASK)
 /*! @} */
 
 /*! @name SEL35 - Crossbar A Select Register 35 */
 /*! @{ */
-#define XBARA_SEL35_SEL70_MASK                   (0x7FU)
-#define XBARA_SEL35_SEL70_SHIFT                  (0U)
-#define XBARA_SEL35_SEL70(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL70_SHIFT)) & XBARA_SEL35_SEL70_MASK)
-#define XBARA_SEL35_SEL71_MASK                   (0x7F00U)
-#define XBARA_SEL35_SEL71_SHIFT                  (8U)
-#define XBARA_SEL35_SEL71(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL71_SHIFT)) & XBARA_SEL35_SEL71_MASK)
+#define XBARA_SEL35_SEL70_MASK  (0x7FU)
+#define XBARA_SEL35_SEL70_SHIFT (0U)
+#define XBARA_SEL35_SEL70(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL70_SHIFT)) & XBARA_SEL35_SEL70_MASK)
+#define XBARA_SEL35_SEL71_MASK  (0x7F00U)
+#define XBARA_SEL35_SEL71_SHIFT (8U)
+#define XBARA_SEL35_SEL71(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL35_SEL71_SHIFT)) & XBARA_SEL35_SEL71_MASK)
 /*! @} */
 
 /*! @name SEL36 - Crossbar A Select Register 36 */
 /*! @{ */
-#define XBARA_SEL36_SEL72_MASK                   (0x7FU)
-#define XBARA_SEL36_SEL72_SHIFT                  (0U)
-#define XBARA_SEL36_SEL72(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL72_SHIFT)) & XBARA_SEL36_SEL72_MASK)
-#define XBARA_SEL36_SEL73_MASK                   (0x7F00U)
-#define XBARA_SEL36_SEL73_SHIFT                  (8U)
-#define XBARA_SEL36_SEL73(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL73_SHIFT)) & XBARA_SEL36_SEL73_MASK)
+#define XBARA_SEL36_SEL72_MASK  (0x7FU)
+#define XBARA_SEL36_SEL72_SHIFT (0U)
+#define XBARA_SEL36_SEL72(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL72_SHIFT)) & XBARA_SEL36_SEL72_MASK)
+#define XBARA_SEL36_SEL73_MASK  (0x7F00U)
+#define XBARA_SEL36_SEL73_SHIFT (8U)
+#define XBARA_SEL36_SEL73(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL36_SEL73_SHIFT)) & XBARA_SEL36_SEL73_MASK)
 /*! @} */
 
 /*! @name SEL37 - Crossbar A Select Register 37 */
 /*! @{ */
-#define XBARA_SEL37_SEL74_MASK                   (0x7FU)
-#define XBARA_SEL37_SEL74_SHIFT                  (0U)
-#define XBARA_SEL37_SEL74(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL74_SHIFT)) & XBARA_SEL37_SEL74_MASK)
-#define XBARA_SEL37_SEL75_MASK                   (0x7F00U)
-#define XBARA_SEL37_SEL75_SHIFT                  (8U)
-#define XBARA_SEL37_SEL75(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL75_SHIFT)) & XBARA_SEL37_SEL75_MASK)
+#define XBARA_SEL37_SEL74_MASK  (0x7FU)
+#define XBARA_SEL37_SEL74_SHIFT (0U)
+#define XBARA_SEL37_SEL74(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL74_SHIFT)) & XBARA_SEL37_SEL74_MASK)
+#define XBARA_SEL37_SEL75_MASK  (0x7F00U)
+#define XBARA_SEL37_SEL75_SHIFT (8U)
+#define XBARA_SEL37_SEL75(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL37_SEL75_SHIFT)) & XBARA_SEL37_SEL75_MASK)
 /*! @} */
 
 /*! @name SEL38 - Crossbar A Select Register 38 */
 /*! @{ */
-#define XBARA_SEL38_SEL76_MASK                   (0x7FU)
-#define XBARA_SEL38_SEL76_SHIFT                  (0U)
-#define XBARA_SEL38_SEL76(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL76_SHIFT)) & XBARA_SEL38_SEL76_MASK)
-#define XBARA_SEL38_SEL77_MASK                   (0x7F00U)
-#define XBARA_SEL38_SEL77_SHIFT                  (8U)
-#define XBARA_SEL38_SEL77(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL77_SHIFT)) & XBARA_SEL38_SEL77_MASK)
+#define XBARA_SEL38_SEL76_MASK  (0x7FU)
+#define XBARA_SEL38_SEL76_SHIFT (0U)
+#define XBARA_SEL38_SEL76(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL76_SHIFT)) & XBARA_SEL38_SEL76_MASK)
+#define XBARA_SEL38_SEL77_MASK  (0x7F00U)
+#define XBARA_SEL38_SEL77_SHIFT (8U)
+#define XBARA_SEL38_SEL77(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL38_SEL77_SHIFT)) & XBARA_SEL38_SEL77_MASK)
 /*! @} */
 
 /*! @name SEL39 - Crossbar A Select Register 39 */
 /*! @{ */
-#define XBARA_SEL39_SEL78_MASK                   (0x7FU)
-#define XBARA_SEL39_SEL78_SHIFT                  (0U)
-#define XBARA_SEL39_SEL78(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL78_SHIFT)) & XBARA_SEL39_SEL78_MASK)
-#define XBARA_SEL39_SEL79_MASK                   (0x7F00U)
-#define XBARA_SEL39_SEL79_SHIFT                  (8U)
-#define XBARA_SEL39_SEL79(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL79_SHIFT)) & XBARA_SEL39_SEL79_MASK)
+#define XBARA_SEL39_SEL78_MASK  (0x7FU)
+#define XBARA_SEL39_SEL78_SHIFT (0U)
+#define XBARA_SEL39_SEL78(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL78_SHIFT)) & XBARA_SEL39_SEL78_MASK)
+#define XBARA_SEL39_SEL79_MASK  (0x7F00U)
+#define XBARA_SEL39_SEL79_SHIFT (8U)
+#define XBARA_SEL39_SEL79(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL39_SEL79_SHIFT)) & XBARA_SEL39_SEL79_MASK)
 /*! @} */
 
 /*! @name SEL40 - Crossbar A Select Register 40 */
 /*! @{ */
-#define XBARA_SEL40_SEL80_MASK                   (0x7FU)
-#define XBARA_SEL40_SEL80_SHIFT                  (0U)
-#define XBARA_SEL40_SEL80(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL80_SHIFT)) & XBARA_SEL40_SEL80_MASK)
-#define XBARA_SEL40_SEL81_MASK                   (0x7F00U)
-#define XBARA_SEL40_SEL81_SHIFT                  (8U)
-#define XBARA_SEL40_SEL81(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL81_SHIFT)) & XBARA_SEL40_SEL81_MASK)
+#define XBARA_SEL40_SEL80_MASK  (0x7FU)
+#define XBARA_SEL40_SEL80_SHIFT (0U)
+#define XBARA_SEL40_SEL80(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL80_SHIFT)) & XBARA_SEL40_SEL80_MASK)
+#define XBARA_SEL40_SEL81_MASK  (0x7F00U)
+#define XBARA_SEL40_SEL81_SHIFT (8U)
+#define XBARA_SEL40_SEL81(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL40_SEL81_SHIFT)) & XBARA_SEL40_SEL81_MASK)
 /*! @} */
 
 /*! @name SEL41 - Crossbar A Select Register 41 */
 /*! @{ */
-#define XBARA_SEL41_SEL82_MASK                   (0x7FU)
-#define XBARA_SEL41_SEL82_SHIFT                  (0U)
-#define XBARA_SEL41_SEL82(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL82_SHIFT)) & XBARA_SEL41_SEL82_MASK)
-#define XBARA_SEL41_SEL83_MASK                   (0x7F00U)
-#define XBARA_SEL41_SEL83_SHIFT                  (8U)
-#define XBARA_SEL41_SEL83(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL83_SHIFT)) & XBARA_SEL41_SEL83_MASK)
+#define XBARA_SEL41_SEL82_MASK  (0x7FU)
+#define XBARA_SEL41_SEL82_SHIFT (0U)
+#define XBARA_SEL41_SEL82(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL82_SHIFT)) & XBARA_SEL41_SEL82_MASK)
+#define XBARA_SEL41_SEL83_MASK  (0x7F00U)
+#define XBARA_SEL41_SEL83_SHIFT (8U)
+#define XBARA_SEL41_SEL83(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL41_SEL83_SHIFT)) & XBARA_SEL41_SEL83_MASK)
 /*! @} */
 
 /*! @name SEL42 - Crossbar A Select Register 42 */
 /*! @{ */
-#define XBARA_SEL42_SEL84_MASK                   (0x7FU)
-#define XBARA_SEL42_SEL84_SHIFT                  (0U)
-#define XBARA_SEL42_SEL84(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL84_SHIFT)) & XBARA_SEL42_SEL84_MASK)
-#define XBARA_SEL42_SEL85_MASK                   (0x7F00U)
-#define XBARA_SEL42_SEL85_SHIFT                  (8U)
-#define XBARA_SEL42_SEL85(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL85_SHIFT)) & XBARA_SEL42_SEL85_MASK)
+#define XBARA_SEL42_SEL84_MASK  (0x7FU)
+#define XBARA_SEL42_SEL84_SHIFT (0U)
+#define XBARA_SEL42_SEL84(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL84_SHIFT)) & XBARA_SEL42_SEL84_MASK)
+#define XBARA_SEL42_SEL85_MASK  (0x7F00U)
+#define XBARA_SEL42_SEL85_SHIFT (8U)
+#define XBARA_SEL42_SEL85(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL42_SEL85_SHIFT)) & XBARA_SEL42_SEL85_MASK)
 /*! @} */
 
 /*! @name SEL43 - Crossbar A Select Register 43 */
 /*! @{ */
-#define XBARA_SEL43_SEL86_MASK                   (0x7FU)
-#define XBARA_SEL43_SEL86_SHIFT                  (0U)
-#define XBARA_SEL43_SEL86(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL86_SHIFT)) & XBARA_SEL43_SEL86_MASK)
-#define XBARA_SEL43_SEL87_MASK                   (0x7F00U)
-#define XBARA_SEL43_SEL87_SHIFT                  (8U)
-#define XBARA_SEL43_SEL87(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL87_SHIFT)) & XBARA_SEL43_SEL87_MASK)
+#define XBARA_SEL43_SEL86_MASK  (0x7FU)
+#define XBARA_SEL43_SEL86_SHIFT (0U)
+#define XBARA_SEL43_SEL86(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL86_SHIFT)) & XBARA_SEL43_SEL86_MASK)
+#define XBARA_SEL43_SEL87_MASK  (0x7F00U)
+#define XBARA_SEL43_SEL87_SHIFT (8U)
+#define XBARA_SEL43_SEL87(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL43_SEL87_SHIFT)) & XBARA_SEL43_SEL87_MASK)
 /*! @} */
 
 /*! @name SEL44 - Crossbar A Select Register 44 */
 /*! @{ */
-#define XBARA_SEL44_SEL88_MASK                   (0x7FU)
-#define XBARA_SEL44_SEL88_SHIFT                  (0U)
-#define XBARA_SEL44_SEL88(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL88_SHIFT)) & XBARA_SEL44_SEL88_MASK)
-#define XBARA_SEL44_SEL89_MASK                   (0x7F00U)
-#define XBARA_SEL44_SEL89_SHIFT                  (8U)
-#define XBARA_SEL44_SEL89(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL89_SHIFT)) & XBARA_SEL44_SEL89_MASK)
+#define XBARA_SEL44_SEL88_MASK  (0x7FU)
+#define XBARA_SEL44_SEL88_SHIFT (0U)
+#define XBARA_SEL44_SEL88(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL88_SHIFT)) & XBARA_SEL44_SEL88_MASK)
+#define XBARA_SEL44_SEL89_MASK  (0x7F00U)
+#define XBARA_SEL44_SEL89_SHIFT (8U)
+#define XBARA_SEL44_SEL89(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL44_SEL89_SHIFT)) & XBARA_SEL44_SEL89_MASK)
 /*! @} */
 
 /*! @name SEL45 - Crossbar A Select Register 45 */
 /*! @{ */
-#define XBARA_SEL45_SEL90_MASK                   (0x7FU)
-#define XBARA_SEL45_SEL90_SHIFT                  (0U)
-#define XBARA_SEL45_SEL90(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL90_SHIFT)) & XBARA_SEL45_SEL90_MASK)
-#define XBARA_SEL45_SEL91_MASK                   (0x7F00U)
-#define XBARA_SEL45_SEL91_SHIFT                  (8U)
-#define XBARA_SEL45_SEL91(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL91_SHIFT)) & XBARA_SEL45_SEL91_MASK)
+#define XBARA_SEL45_SEL90_MASK  (0x7FU)
+#define XBARA_SEL45_SEL90_SHIFT (0U)
+#define XBARA_SEL45_SEL90(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL90_SHIFT)) & XBARA_SEL45_SEL90_MASK)
+#define XBARA_SEL45_SEL91_MASK  (0x7F00U)
+#define XBARA_SEL45_SEL91_SHIFT (8U)
+#define XBARA_SEL45_SEL91(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL45_SEL91_SHIFT)) & XBARA_SEL45_SEL91_MASK)
 /*! @} */
 
 /*! @name SEL46 - Crossbar A Select Register 46 */
 /*! @{ */
-#define XBARA_SEL46_SEL92_MASK                   (0x7FU)
-#define XBARA_SEL46_SEL92_SHIFT                  (0U)
-#define XBARA_SEL46_SEL92(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL92_SHIFT)) & XBARA_SEL46_SEL92_MASK)
-#define XBARA_SEL46_SEL93_MASK                   (0x7F00U)
-#define XBARA_SEL46_SEL93_SHIFT                  (8U)
-#define XBARA_SEL46_SEL93(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL93_SHIFT)) & XBARA_SEL46_SEL93_MASK)
+#define XBARA_SEL46_SEL92_MASK  (0x7FU)
+#define XBARA_SEL46_SEL92_SHIFT (0U)
+#define XBARA_SEL46_SEL92(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL92_SHIFT)) & XBARA_SEL46_SEL92_MASK)
+#define XBARA_SEL46_SEL93_MASK  (0x7F00U)
+#define XBARA_SEL46_SEL93_SHIFT (8U)
+#define XBARA_SEL46_SEL93(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL46_SEL93_SHIFT)) & XBARA_SEL46_SEL93_MASK)
 /*! @} */
 
 /*! @name SEL47 - Crossbar A Select Register 47 */
 /*! @{ */
-#define XBARA_SEL47_SEL94_MASK                   (0x7FU)
-#define XBARA_SEL47_SEL94_SHIFT                  (0U)
-#define XBARA_SEL47_SEL94(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL94_SHIFT)) & XBARA_SEL47_SEL94_MASK)
-#define XBARA_SEL47_SEL95_MASK                   (0x7F00U)
-#define XBARA_SEL47_SEL95_SHIFT                  (8U)
-#define XBARA_SEL47_SEL95(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL95_SHIFT)) & XBARA_SEL47_SEL95_MASK)
+#define XBARA_SEL47_SEL94_MASK  (0x7FU)
+#define XBARA_SEL47_SEL94_SHIFT (0U)
+#define XBARA_SEL47_SEL94(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL94_SHIFT)) & XBARA_SEL47_SEL94_MASK)
+#define XBARA_SEL47_SEL95_MASK  (0x7F00U)
+#define XBARA_SEL47_SEL95_SHIFT (8U)
+#define XBARA_SEL47_SEL95(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL47_SEL95_SHIFT)) & XBARA_SEL47_SEL95_MASK)
 /*! @} */
 
 /*! @name SEL48 - Crossbar A Select Register 48 */
 /*! @{ */
-#define XBARA_SEL48_SEL96_MASK                   (0x7FU)
-#define XBARA_SEL48_SEL96_SHIFT                  (0U)
-#define XBARA_SEL48_SEL96(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL96_SHIFT)) & XBARA_SEL48_SEL96_MASK)
-#define XBARA_SEL48_SEL97_MASK                   (0x7F00U)
-#define XBARA_SEL48_SEL97_SHIFT                  (8U)
-#define XBARA_SEL48_SEL97(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL97_SHIFT)) & XBARA_SEL48_SEL97_MASK)
+#define XBARA_SEL48_SEL96_MASK  (0x7FU)
+#define XBARA_SEL48_SEL96_SHIFT (0U)
+#define XBARA_SEL48_SEL96(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL96_SHIFT)) & XBARA_SEL48_SEL96_MASK)
+#define XBARA_SEL48_SEL97_MASK  (0x7F00U)
+#define XBARA_SEL48_SEL97_SHIFT (8U)
+#define XBARA_SEL48_SEL97(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL48_SEL97_SHIFT)) & XBARA_SEL48_SEL97_MASK)
 /*! @} */
 
 /*! @name SEL49 - Crossbar A Select Register 49 */
 /*! @{ */
-#define XBARA_SEL49_SEL98_MASK                   (0x7FU)
-#define XBARA_SEL49_SEL98_SHIFT                  (0U)
-#define XBARA_SEL49_SEL98(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL98_SHIFT)) & XBARA_SEL49_SEL98_MASK)
-#define XBARA_SEL49_SEL99_MASK                   (0x7F00U)
-#define XBARA_SEL49_SEL99_SHIFT                  (8U)
-#define XBARA_SEL49_SEL99(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL99_SHIFT)) & XBARA_SEL49_SEL99_MASK)
+#define XBARA_SEL49_SEL98_MASK  (0x7FU)
+#define XBARA_SEL49_SEL98_SHIFT (0U)
+#define XBARA_SEL49_SEL98(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL98_SHIFT)) & XBARA_SEL49_SEL98_MASK)
+#define XBARA_SEL49_SEL99_MASK  (0x7F00U)
+#define XBARA_SEL49_SEL99_SHIFT (8U)
+#define XBARA_SEL49_SEL99(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL49_SEL99_SHIFT)) & XBARA_SEL49_SEL99_MASK)
 /*! @} */
 
 /*! @name SEL50 - Crossbar A Select Register 50 */
 /*! @{ */
-#define XBARA_SEL50_SEL100_MASK                  (0x7FU)
-#define XBARA_SEL50_SEL100_SHIFT                 (0U)
-#define XBARA_SEL50_SEL100(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL100_SHIFT)) & XBARA_SEL50_SEL100_MASK)
-#define XBARA_SEL50_SEL101_MASK                  (0x7F00U)
-#define XBARA_SEL50_SEL101_SHIFT                 (8U)
-#define XBARA_SEL50_SEL101(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL101_SHIFT)) & XBARA_SEL50_SEL101_MASK)
+#define XBARA_SEL50_SEL100_MASK  (0x7FU)
+#define XBARA_SEL50_SEL100_SHIFT (0U)
+#define XBARA_SEL50_SEL100(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL100_SHIFT)) & XBARA_SEL50_SEL100_MASK)
+#define XBARA_SEL50_SEL101_MASK  (0x7F00U)
+#define XBARA_SEL50_SEL101_SHIFT (8U)
+#define XBARA_SEL50_SEL101(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL50_SEL101_SHIFT)) & XBARA_SEL50_SEL101_MASK)
 /*! @} */
 
 /*! @name SEL51 - Crossbar A Select Register 51 */
 /*! @{ */
-#define XBARA_SEL51_SEL102_MASK                  (0x7FU)
-#define XBARA_SEL51_SEL102_SHIFT                 (0U)
-#define XBARA_SEL51_SEL102(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL102_SHIFT)) & XBARA_SEL51_SEL102_MASK)
-#define XBARA_SEL51_SEL103_MASK                  (0x7F00U)
-#define XBARA_SEL51_SEL103_SHIFT                 (8U)
-#define XBARA_SEL51_SEL103(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL103_SHIFT)) & XBARA_SEL51_SEL103_MASK)
+#define XBARA_SEL51_SEL102_MASK  (0x7FU)
+#define XBARA_SEL51_SEL102_SHIFT (0U)
+#define XBARA_SEL51_SEL102(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL102_SHIFT)) & XBARA_SEL51_SEL102_MASK)
+#define XBARA_SEL51_SEL103_MASK  (0x7F00U)
+#define XBARA_SEL51_SEL103_SHIFT (8U)
+#define XBARA_SEL51_SEL103(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL51_SEL103_SHIFT)) & XBARA_SEL51_SEL103_MASK)
 /*! @} */
 
 /*! @name SEL52 - Crossbar A Select Register 52 */
 /*! @{ */
-#define XBARA_SEL52_SEL104_MASK                  (0x7FU)
-#define XBARA_SEL52_SEL104_SHIFT                 (0U)
-#define XBARA_SEL52_SEL104(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL104_SHIFT)) & XBARA_SEL52_SEL104_MASK)
-#define XBARA_SEL52_SEL105_MASK                  (0x7F00U)
-#define XBARA_SEL52_SEL105_SHIFT                 (8U)
-#define XBARA_SEL52_SEL105(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL105_SHIFT)) & XBARA_SEL52_SEL105_MASK)
+#define XBARA_SEL52_SEL104_MASK  (0x7FU)
+#define XBARA_SEL52_SEL104_SHIFT (0U)
+#define XBARA_SEL52_SEL104(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL104_SHIFT)) & XBARA_SEL52_SEL104_MASK)
+#define XBARA_SEL52_SEL105_MASK  (0x7F00U)
+#define XBARA_SEL52_SEL105_SHIFT (8U)
+#define XBARA_SEL52_SEL105(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL52_SEL105_SHIFT)) & XBARA_SEL52_SEL105_MASK)
 /*! @} */
 
 /*! @name SEL53 - Crossbar A Select Register 53 */
 /*! @{ */
-#define XBARA_SEL53_SEL106_MASK                  (0x7FU)
-#define XBARA_SEL53_SEL106_SHIFT                 (0U)
-#define XBARA_SEL53_SEL106(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL106_SHIFT)) & XBARA_SEL53_SEL106_MASK)
-#define XBARA_SEL53_SEL107_MASK                  (0x7F00U)
-#define XBARA_SEL53_SEL107_SHIFT                 (8U)
-#define XBARA_SEL53_SEL107(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL107_SHIFT)) & XBARA_SEL53_SEL107_MASK)
+#define XBARA_SEL53_SEL106_MASK  (0x7FU)
+#define XBARA_SEL53_SEL106_SHIFT (0U)
+#define XBARA_SEL53_SEL106(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL106_SHIFT)) & XBARA_SEL53_SEL106_MASK)
+#define XBARA_SEL53_SEL107_MASK  (0x7F00U)
+#define XBARA_SEL53_SEL107_SHIFT (8U)
+#define XBARA_SEL53_SEL107(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL53_SEL107_SHIFT)) & XBARA_SEL53_SEL107_MASK)
 /*! @} */
 
 /*! @name SEL54 - Crossbar A Select Register 54 */
 /*! @{ */
-#define XBARA_SEL54_SEL108_MASK                  (0x7FU)
-#define XBARA_SEL54_SEL108_SHIFT                 (0U)
-#define XBARA_SEL54_SEL108(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL108_SHIFT)) & XBARA_SEL54_SEL108_MASK)
-#define XBARA_SEL54_SEL109_MASK                  (0x7F00U)
-#define XBARA_SEL54_SEL109_SHIFT                 (8U)
-#define XBARA_SEL54_SEL109(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL109_SHIFT)) & XBARA_SEL54_SEL109_MASK)
+#define XBARA_SEL54_SEL108_MASK  (0x7FU)
+#define XBARA_SEL54_SEL108_SHIFT (0U)
+#define XBARA_SEL54_SEL108(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL108_SHIFT)) & XBARA_SEL54_SEL108_MASK)
+#define XBARA_SEL54_SEL109_MASK  (0x7F00U)
+#define XBARA_SEL54_SEL109_SHIFT (8U)
+#define XBARA_SEL54_SEL109(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL54_SEL109_SHIFT)) & XBARA_SEL54_SEL109_MASK)
 /*! @} */
 
 /*! @name SEL55 - Crossbar A Select Register 55 */
 /*! @{ */
-#define XBARA_SEL55_SEL110_MASK                  (0x7FU)
-#define XBARA_SEL55_SEL110_SHIFT                 (0U)
-#define XBARA_SEL55_SEL110(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL110_SHIFT)) & XBARA_SEL55_SEL110_MASK)
-#define XBARA_SEL55_SEL111_MASK                  (0x7F00U)
-#define XBARA_SEL55_SEL111_SHIFT                 (8U)
-#define XBARA_SEL55_SEL111(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL111_SHIFT)) & XBARA_SEL55_SEL111_MASK)
+#define XBARA_SEL55_SEL110_MASK  (0x7FU)
+#define XBARA_SEL55_SEL110_SHIFT (0U)
+#define XBARA_SEL55_SEL110(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL110_SHIFT)) & XBARA_SEL55_SEL110_MASK)
+#define XBARA_SEL55_SEL111_MASK  (0x7F00U)
+#define XBARA_SEL55_SEL111_SHIFT (8U)
+#define XBARA_SEL55_SEL111(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL55_SEL111_SHIFT)) & XBARA_SEL55_SEL111_MASK)
 /*! @} */
 
 /*! @name SEL56 - Crossbar A Select Register 56 */
 /*! @{ */
-#define XBARA_SEL56_SEL112_MASK                  (0x7FU)
-#define XBARA_SEL56_SEL112_SHIFT                 (0U)
-#define XBARA_SEL56_SEL112(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL112_SHIFT)) & XBARA_SEL56_SEL112_MASK)
-#define XBARA_SEL56_SEL113_MASK                  (0x7F00U)
-#define XBARA_SEL56_SEL113_SHIFT                 (8U)
-#define XBARA_SEL56_SEL113(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL113_SHIFT)) & XBARA_SEL56_SEL113_MASK)
+#define XBARA_SEL56_SEL112_MASK  (0x7FU)
+#define XBARA_SEL56_SEL112_SHIFT (0U)
+#define XBARA_SEL56_SEL112(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL112_SHIFT)) & XBARA_SEL56_SEL112_MASK)
+#define XBARA_SEL56_SEL113_MASK  (0x7F00U)
+#define XBARA_SEL56_SEL113_SHIFT (8U)
+#define XBARA_SEL56_SEL113(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL56_SEL113_SHIFT)) & XBARA_SEL56_SEL113_MASK)
 /*! @} */
 
 /*! @name SEL57 - Crossbar A Select Register 57 */
 /*! @{ */
-#define XBARA_SEL57_SEL114_MASK                  (0x7FU)
-#define XBARA_SEL57_SEL114_SHIFT                 (0U)
-#define XBARA_SEL57_SEL114(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL114_SHIFT)) & XBARA_SEL57_SEL114_MASK)
-#define XBARA_SEL57_SEL115_MASK                  (0x7F00U)
-#define XBARA_SEL57_SEL115_SHIFT                 (8U)
-#define XBARA_SEL57_SEL115(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL115_SHIFT)) & XBARA_SEL57_SEL115_MASK)
+#define XBARA_SEL57_SEL114_MASK  (0x7FU)
+#define XBARA_SEL57_SEL114_SHIFT (0U)
+#define XBARA_SEL57_SEL114(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL114_SHIFT)) & XBARA_SEL57_SEL114_MASK)
+#define XBARA_SEL57_SEL115_MASK  (0x7F00U)
+#define XBARA_SEL57_SEL115_SHIFT (8U)
+#define XBARA_SEL57_SEL115(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL57_SEL115_SHIFT)) & XBARA_SEL57_SEL115_MASK)
 /*! @} */
 
 /*! @name SEL58 - Crossbar A Select Register 58 */
 /*! @{ */
-#define XBARA_SEL58_SEL116_MASK                  (0x7FU)
-#define XBARA_SEL58_SEL116_SHIFT                 (0U)
-#define XBARA_SEL58_SEL116(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL116_SHIFT)) & XBARA_SEL58_SEL116_MASK)
-#define XBARA_SEL58_SEL117_MASK                  (0x7F00U)
-#define XBARA_SEL58_SEL117_SHIFT                 (8U)
-#define XBARA_SEL58_SEL117(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL117_SHIFT)) & XBARA_SEL58_SEL117_MASK)
+#define XBARA_SEL58_SEL116_MASK  (0x7FU)
+#define XBARA_SEL58_SEL116_SHIFT (0U)
+#define XBARA_SEL58_SEL116(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL116_SHIFT)) & XBARA_SEL58_SEL116_MASK)
+#define XBARA_SEL58_SEL117_MASK  (0x7F00U)
+#define XBARA_SEL58_SEL117_SHIFT (8U)
+#define XBARA_SEL58_SEL117(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL58_SEL117_SHIFT)) & XBARA_SEL58_SEL117_MASK)
 /*! @} */
 
 /*! @name SEL59 - Crossbar A Select Register 59 */
 /*! @{ */
-#define XBARA_SEL59_SEL118_MASK                  (0x7FU)
-#define XBARA_SEL59_SEL118_SHIFT                 (0U)
-#define XBARA_SEL59_SEL118(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL118_SHIFT)) & XBARA_SEL59_SEL118_MASK)
-#define XBARA_SEL59_SEL119_MASK                  (0x7F00U)
-#define XBARA_SEL59_SEL119_SHIFT                 (8U)
-#define XBARA_SEL59_SEL119(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL119_SHIFT)) & XBARA_SEL59_SEL119_MASK)
+#define XBARA_SEL59_SEL118_MASK  (0x7FU)
+#define XBARA_SEL59_SEL118_SHIFT (0U)
+#define XBARA_SEL59_SEL118(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL118_SHIFT)) & XBARA_SEL59_SEL118_MASK)
+#define XBARA_SEL59_SEL119_MASK  (0x7F00U)
+#define XBARA_SEL59_SEL119_SHIFT (8U)
+#define XBARA_SEL59_SEL119(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL59_SEL119_SHIFT)) & XBARA_SEL59_SEL119_MASK)
 /*! @} */
 
 /*! @name SEL60 - Crossbar A Select Register 60 */
 /*! @{ */
-#define XBARA_SEL60_SEL120_MASK                  (0x7FU)
-#define XBARA_SEL60_SEL120_SHIFT                 (0U)
-#define XBARA_SEL60_SEL120(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL120_SHIFT)) & XBARA_SEL60_SEL120_MASK)
-#define XBARA_SEL60_SEL121_MASK                  (0x7F00U)
-#define XBARA_SEL60_SEL121_SHIFT                 (8U)
-#define XBARA_SEL60_SEL121(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL121_SHIFT)) & XBARA_SEL60_SEL121_MASK)
+#define XBARA_SEL60_SEL120_MASK  (0x7FU)
+#define XBARA_SEL60_SEL120_SHIFT (0U)
+#define XBARA_SEL60_SEL120(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL120_SHIFT)) & XBARA_SEL60_SEL120_MASK)
+#define XBARA_SEL60_SEL121_MASK  (0x7F00U)
+#define XBARA_SEL60_SEL121_SHIFT (8U)
+#define XBARA_SEL60_SEL121(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL60_SEL121_SHIFT)) & XBARA_SEL60_SEL121_MASK)
 /*! @} */
 
 /*! @name SEL61 - Crossbar A Select Register 61 */
 /*! @{ */
-#define XBARA_SEL61_SEL122_MASK                  (0x7FU)
-#define XBARA_SEL61_SEL122_SHIFT                 (0U)
-#define XBARA_SEL61_SEL122(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL122_SHIFT)) & XBARA_SEL61_SEL122_MASK)
-#define XBARA_SEL61_SEL123_MASK                  (0x7F00U)
-#define XBARA_SEL61_SEL123_SHIFT                 (8U)
-#define XBARA_SEL61_SEL123(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL123_SHIFT)) & XBARA_SEL61_SEL123_MASK)
+#define XBARA_SEL61_SEL122_MASK  (0x7FU)
+#define XBARA_SEL61_SEL122_SHIFT (0U)
+#define XBARA_SEL61_SEL122(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL122_SHIFT)) & XBARA_SEL61_SEL122_MASK)
+#define XBARA_SEL61_SEL123_MASK  (0x7F00U)
+#define XBARA_SEL61_SEL123_SHIFT (8U)
+#define XBARA_SEL61_SEL123(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL61_SEL123_SHIFT)) & XBARA_SEL61_SEL123_MASK)
 /*! @} */
 
 /*! @name SEL62 - Crossbar A Select Register 62 */
 /*! @{ */
-#define XBARA_SEL62_SEL124_MASK                  (0x7FU)
-#define XBARA_SEL62_SEL124_SHIFT                 (0U)
-#define XBARA_SEL62_SEL124(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL124_SHIFT)) & XBARA_SEL62_SEL124_MASK)
-#define XBARA_SEL62_SEL125_MASK                  (0x7F00U)
-#define XBARA_SEL62_SEL125_SHIFT                 (8U)
-#define XBARA_SEL62_SEL125(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL125_SHIFT)) & XBARA_SEL62_SEL125_MASK)
+#define XBARA_SEL62_SEL124_MASK  (0x7FU)
+#define XBARA_SEL62_SEL124_SHIFT (0U)
+#define XBARA_SEL62_SEL124(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL124_SHIFT)) & XBARA_SEL62_SEL124_MASK)
+#define XBARA_SEL62_SEL125_MASK  (0x7F00U)
+#define XBARA_SEL62_SEL125_SHIFT (8U)
+#define XBARA_SEL62_SEL125(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL62_SEL125_SHIFT)) & XBARA_SEL62_SEL125_MASK)
 /*! @} */
 
 /*! @name SEL63 - Crossbar A Select Register 63 */
 /*! @{ */
-#define XBARA_SEL63_SEL126_MASK                  (0x7FU)
-#define XBARA_SEL63_SEL126_SHIFT                 (0U)
-#define XBARA_SEL63_SEL126(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL126_SHIFT)) & XBARA_SEL63_SEL126_MASK)
-#define XBARA_SEL63_SEL127_MASK                  (0x7F00U)
-#define XBARA_SEL63_SEL127_SHIFT                 (8U)
-#define XBARA_SEL63_SEL127(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL127_SHIFT)) & XBARA_SEL63_SEL127_MASK)
+#define XBARA_SEL63_SEL126_MASK  (0x7FU)
+#define XBARA_SEL63_SEL126_SHIFT (0U)
+#define XBARA_SEL63_SEL126(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL126_SHIFT)) & XBARA_SEL63_SEL126_MASK)
+#define XBARA_SEL63_SEL127_MASK  (0x7F00U)
+#define XBARA_SEL63_SEL127_SHIFT (8U)
+#define XBARA_SEL63_SEL127(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL63_SEL127_SHIFT)) & XBARA_SEL63_SEL127_MASK)
 /*! @} */
 
 /*! @name SEL64 - Crossbar A Select Register 64 */
 /*! @{ */
-#define XBARA_SEL64_SEL128_MASK                  (0x7FU)
-#define XBARA_SEL64_SEL128_SHIFT                 (0U)
-#define XBARA_SEL64_SEL128(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL128_SHIFT)) & XBARA_SEL64_SEL128_MASK)
-#define XBARA_SEL64_SEL129_MASK                  (0x7F00U)
-#define XBARA_SEL64_SEL129_SHIFT                 (8U)
-#define XBARA_SEL64_SEL129(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL129_SHIFT)) & XBARA_SEL64_SEL129_MASK)
+#define XBARA_SEL64_SEL128_MASK  (0x7FU)
+#define XBARA_SEL64_SEL128_SHIFT (0U)
+#define XBARA_SEL64_SEL128(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL128_SHIFT)) & XBARA_SEL64_SEL128_MASK)
+#define XBARA_SEL64_SEL129_MASK  (0x7F00U)
+#define XBARA_SEL64_SEL129_SHIFT (8U)
+#define XBARA_SEL64_SEL129(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL64_SEL129_SHIFT)) & XBARA_SEL64_SEL129_MASK)
 /*! @} */
 
 /*! @name SEL65 - Crossbar A Select Register 65 */
 /*! @{ */
-#define XBARA_SEL65_SEL130_MASK                  (0x7FU)
-#define XBARA_SEL65_SEL130_SHIFT                 (0U)
-#define XBARA_SEL65_SEL130(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL130_SHIFT)) & XBARA_SEL65_SEL130_MASK)
-#define XBARA_SEL65_SEL131_MASK                  (0x7F00U)
-#define XBARA_SEL65_SEL131_SHIFT                 (8U)
-#define XBARA_SEL65_SEL131(x)                    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL131_SHIFT)) & XBARA_SEL65_SEL131_MASK)
+#define XBARA_SEL65_SEL130_MASK  (0x7FU)
+#define XBARA_SEL65_SEL130_SHIFT (0U)
+#define XBARA_SEL65_SEL130(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL130_SHIFT)) & XBARA_SEL65_SEL130_MASK)
+#define XBARA_SEL65_SEL131_MASK  (0x7F00U)
+#define XBARA_SEL65_SEL131_SHIFT (8U)
+#define XBARA_SEL65_SEL131(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_SEL65_SEL131_SHIFT)) & XBARA_SEL65_SEL131_MASK)
 /*! @} */
 
 /*! @name CTRL0 - Crossbar A Control Register 0 */
 /*! @{ */
-#define XBARA_CTRL0_DEN0_MASK                    (0x1U)
-#define XBARA_CTRL0_DEN0_SHIFT                   (0U)
-#define XBARA_CTRL0_DEN0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN0_SHIFT)) & XBARA_CTRL0_DEN0_MASK)
-#define XBARA_CTRL0_IEN0_MASK                    (0x2U)
-#define XBARA_CTRL0_IEN0_SHIFT                   (1U)
-#define XBARA_CTRL0_IEN0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN0_SHIFT)) & XBARA_CTRL0_IEN0_MASK)
-#define XBARA_CTRL0_EDGE0_MASK                   (0xCU)
-#define XBARA_CTRL0_EDGE0_SHIFT                  (2U)
-#define XBARA_CTRL0_EDGE0(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE0_SHIFT)) & XBARA_CTRL0_EDGE0_MASK)
-#define XBARA_CTRL0_STS0_MASK                    (0x10U)
-#define XBARA_CTRL0_STS0_SHIFT                   (4U)
-#define XBARA_CTRL0_STS0(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS0_SHIFT)) & XBARA_CTRL0_STS0_MASK)
-#define XBARA_CTRL0_DEN1_MASK                    (0x100U)
-#define XBARA_CTRL0_DEN1_SHIFT                   (8U)
-#define XBARA_CTRL0_DEN1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN1_SHIFT)) & XBARA_CTRL0_DEN1_MASK)
-#define XBARA_CTRL0_IEN1_MASK                    (0x200U)
-#define XBARA_CTRL0_IEN1_SHIFT                   (9U)
-#define XBARA_CTRL0_IEN1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN1_SHIFT)) & XBARA_CTRL0_IEN1_MASK)
-#define XBARA_CTRL0_EDGE1_MASK                   (0xC00U)
-#define XBARA_CTRL0_EDGE1_SHIFT                  (10U)
-#define XBARA_CTRL0_EDGE1(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE1_SHIFT)) & XBARA_CTRL0_EDGE1_MASK)
-#define XBARA_CTRL0_STS1_MASK                    (0x1000U)
-#define XBARA_CTRL0_STS1_SHIFT                   (12U)
-#define XBARA_CTRL0_STS1(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS1_SHIFT)) & XBARA_CTRL0_STS1_MASK)
+#define XBARA_CTRL0_DEN0_MASK   (0x1U)
+#define XBARA_CTRL0_DEN0_SHIFT  (0U)
+#define XBARA_CTRL0_DEN0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN0_SHIFT)) & XBARA_CTRL0_DEN0_MASK)
+#define XBARA_CTRL0_IEN0_MASK   (0x2U)
+#define XBARA_CTRL0_IEN0_SHIFT  (1U)
+#define XBARA_CTRL0_IEN0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN0_SHIFT)) & XBARA_CTRL0_IEN0_MASK)
+#define XBARA_CTRL0_EDGE0_MASK  (0xCU)
+#define XBARA_CTRL0_EDGE0_SHIFT (2U)
+#define XBARA_CTRL0_EDGE0(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE0_SHIFT)) & XBARA_CTRL0_EDGE0_MASK)
+#define XBARA_CTRL0_STS0_MASK   (0x10U)
+#define XBARA_CTRL0_STS0_SHIFT  (4U)
+#define XBARA_CTRL0_STS0(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS0_SHIFT)) & XBARA_CTRL0_STS0_MASK)
+#define XBARA_CTRL0_DEN1_MASK   (0x100U)
+#define XBARA_CTRL0_DEN1_SHIFT  (8U)
+#define XBARA_CTRL0_DEN1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_DEN1_SHIFT)) & XBARA_CTRL0_DEN1_MASK)
+#define XBARA_CTRL0_IEN1_MASK   (0x200U)
+#define XBARA_CTRL0_IEN1_SHIFT  (9U)
+#define XBARA_CTRL0_IEN1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_IEN1_SHIFT)) & XBARA_CTRL0_IEN1_MASK)
+#define XBARA_CTRL0_EDGE1_MASK  (0xC00U)
+#define XBARA_CTRL0_EDGE1_SHIFT (10U)
+#define XBARA_CTRL0_EDGE1(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_EDGE1_SHIFT)) & XBARA_CTRL0_EDGE1_MASK)
+#define XBARA_CTRL0_STS1_MASK   (0x1000U)
+#define XBARA_CTRL0_STS1_SHIFT  (12U)
+#define XBARA_CTRL0_STS1(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL0_STS1_SHIFT)) & XBARA_CTRL0_STS1_MASK)
 /*! @} */
 
 /*! @name CTRL1 - Crossbar A Control Register 1 */
 /*! @{ */
-#define XBARA_CTRL1_DEN2_MASK                    (0x1U)
-#define XBARA_CTRL1_DEN2_SHIFT                   (0U)
-#define XBARA_CTRL1_DEN2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN2_SHIFT)) & XBARA_CTRL1_DEN2_MASK)
-#define XBARA_CTRL1_IEN2_MASK                    (0x2U)
-#define XBARA_CTRL1_IEN2_SHIFT                   (1U)
-#define XBARA_CTRL1_IEN2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN2_SHIFT)) & XBARA_CTRL1_IEN2_MASK)
-#define XBARA_CTRL1_EDGE2_MASK                   (0xCU)
-#define XBARA_CTRL1_EDGE2_SHIFT                  (2U)
-#define XBARA_CTRL1_EDGE2(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE2_SHIFT)) & XBARA_CTRL1_EDGE2_MASK)
-#define XBARA_CTRL1_STS2_MASK                    (0x10U)
-#define XBARA_CTRL1_STS2_SHIFT                   (4U)
-#define XBARA_CTRL1_STS2(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS2_SHIFT)) & XBARA_CTRL1_STS2_MASK)
-#define XBARA_CTRL1_DEN3_MASK                    (0x100U)
-#define XBARA_CTRL1_DEN3_SHIFT                   (8U)
-#define XBARA_CTRL1_DEN3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN3_SHIFT)) & XBARA_CTRL1_DEN3_MASK)
-#define XBARA_CTRL1_IEN3_MASK                    (0x200U)
-#define XBARA_CTRL1_IEN3_SHIFT                   (9U)
-#define XBARA_CTRL1_IEN3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN3_SHIFT)) & XBARA_CTRL1_IEN3_MASK)
-#define XBARA_CTRL1_EDGE3_MASK                   (0xC00U)
-#define XBARA_CTRL1_EDGE3_SHIFT                  (10U)
-#define XBARA_CTRL1_EDGE3(x)                     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE3_SHIFT)) & XBARA_CTRL1_EDGE3_MASK)
-#define XBARA_CTRL1_STS3_MASK                    (0x1000U)
-#define XBARA_CTRL1_STS3_SHIFT                   (12U)
-#define XBARA_CTRL1_STS3(x)                      (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS3_SHIFT)) & XBARA_CTRL1_STS3_MASK)
+#define XBARA_CTRL1_DEN2_MASK   (0x1U)
+#define XBARA_CTRL1_DEN2_SHIFT  (0U)
+#define XBARA_CTRL1_DEN2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN2_SHIFT)) & XBARA_CTRL1_DEN2_MASK)
+#define XBARA_CTRL1_IEN2_MASK   (0x2U)
+#define XBARA_CTRL1_IEN2_SHIFT  (1U)
+#define XBARA_CTRL1_IEN2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN2_SHIFT)) & XBARA_CTRL1_IEN2_MASK)
+#define XBARA_CTRL1_EDGE2_MASK  (0xCU)
+#define XBARA_CTRL1_EDGE2_SHIFT (2U)
+#define XBARA_CTRL1_EDGE2(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE2_SHIFT)) & XBARA_CTRL1_EDGE2_MASK)
+#define XBARA_CTRL1_STS2_MASK   (0x10U)
+#define XBARA_CTRL1_STS2_SHIFT  (4U)
+#define XBARA_CTRL1_STS2(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS2_SHIFT)) & XBARA_CTRL1_STS2_MASK)
+#define XBARA_CTRL1_DEN3_MASK   (0x100U)
+#define XBARA_CTRL1_DEN3_SHIFT  (8U)
+#define XBARA_CTRL1_DEN3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_DEN3_SHIFT)) & XBARA_CTRL1_DEN3_MASK)
+#define XBARA_CTRL1_IEN3_MASK   (0x200U)
+#define XBARA_CTRL1_IEN3_SHIFT  (9U)
+#define XBARA_CTRL1_IEN3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_IEN3_SHIFT)) & XBARA_CTRL1_IEN3_MASK)
+#define XBARA_CTRL1_EDGE3_MASK  (0xC00U)
+#define XBARA_CTRL1_EDGE3_SHIFT (10U)
+#define XBARA_CTRL1_EDGE3(x)    (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_EDGE3_SHIFT)) & XBARA_CTRL1_EDGE3_MASK)
+#define XBARA_CTRL1_STS3_MASK   (0x1000U)
+#define XBARA_CTRL1_STS3_SHIFT  (12U)
+#define XBARA_CTRL1_STS3(x)     (((uint16_t)(((uint16_t)(x)) << XBARA_CTRL1_STS3_SHIFT)) & XBARA_CTRL1_STS3_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XBARA_Register_Masks */
 
-
 /* XBARA - Peripheral instance base addresses */
 /** Peripheral XBARA1 base address */
-#define XBARA1_BASE                              (0x403BC000u)
+#define XBARA1_BASE (0x403BC000u)
 /** Peripheral XBARA1 base pointer */
-#define XBARA1                                   ((XBARA_Type *)XBARA1_BASE)
+#define XBARA1 ((XBARA_Type *)XBARA1_BASE)
 /** Array initializer of XBARA peripheral base addresses */
-#define XBARA_BASE_ADDRS                         { XBARA1_BASE }
+#define XBARA_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        XBARA1_BASE                                                                                                    \
+    }
 /** Array initializer of XBARA peripheral base pointers */
-#define XBARA_BASE_PTRS                          { XBARA1 }
+#define XBARA_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        XBARA1                                                                                                         \
+    }
 
 /*!
  * @}
  */ /* end of group XBARA_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XBARB Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -26415,15 +30134,16 @@ typedef struct {
  */
 
 /** XBARB - Register Layout Typedef */
-typedef struct {
-  __IO uint16_t SEL0;                              /**< Crossbar B Select Register 0, offset: 0x0 */
-  __IO uint16_t SEL1;                              /**< Crossbar B Select Register 1, offset: 0x2 */
-  __IO uint16_t SEL2;                              /**< Crossbar B Select Register 2, offset: 0x4 */
-  __IO uint16_t SEL3;                              /**< Crossbar B Select Register 3, offset: 0x6 */
-  __IO uint16_t SEL4;                              /**< Crossbar B Select Register 4, offset: 0x8 */
-  __IO uint16_t SEL5;                              /**< Crossbar B Select Register 5, offset: 0xA */
-  __IO uint16_t SEL6;                              /**< Crossbar B Select Register 6, offset: 0xC */
-  __IO uint16_t SEL7;                              /**< Crossbar B Select Register 7, offset: 0xE */
+typedef struct
+{
+    __IO uint16_t SEL0; /**< Crossbar B Select Register 0, offset: 0x0 */
+    __IO uint16_t SEL1; /**< Crossbar B Select Register 1, offset: 0x2 */
+    __IO uint16_t SEL2; /**< Crossbar B Select Register 2, offset: 0x4 */
+    __IO uint16_t SEL3; /**< Crossbar B Select Register 3, offset: 0x6 */
+    __IO uint16_t SEL4; /**< Crossbar B Select Register 4, offset: 0x8 */
+    __IO uint16_t SEL5; /**< Crossbar B Select Register 5, offset: 0xA */
+    __IO uint16_t SEL6; /**< Crossbar B Select Register 6, offset: 0xC */
+    __IO uint16_t SEL7; /**< Crossbar B Select Register 7, offset: 0xE */
 } XBARB_Type;
 
 /* ----------------------------------------------------------------------------
@@ -26437,109 +30157,112 @@ typedef struct {
 
 /*! @name SEL0 - Crossbar B Select Register 0 */
 /*! @{ */
-#define XBARB_SEL0_SEL0_MASK                     (0x3FU)
-#define XBARB_SEL0_SEL0_SHIFT                    (0U)
-#define XBARB_SEL0_SEL0(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK)
-#define XBARB_SEL0_SEL1_MASK                     (0x3F00U)
-#define XBARB_SEL0_SEL1_SHIFT                    (8U)
-#define XBARB_SEL0_SEL1(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK)
+#define XBARB_SEL0_SEL0_MASK  (0x3FU)
+#define XBARB_SEL0_SEL0_SHIFT (0U)
+#define XBARB_SEL0_SEL0(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK)
+#define XBARB_SEL0_SEL1_MASK  (0x3F00U)
+#define XBARB_SEL0_SEL1_SHIFT (8U)
+#define XBARB_SEL0_SEL1(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK)
 /*! @} */
 
 /*! @name SEL1 - Crossbar B Select Register 1 */
 /*! @{ */
-#define XBARB_SEL1_SEL2_MASK                     (0x3FU)
-#define XBARB_SEL1_SEL2_SHIFT                    (0U)
-#define XBARB_SEL1_SEL2(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK)
-#define XBARB_SEL1_SEL3_MASK                     (0x3F00U)
-#define XBARB_SEL1_SEL3_SHIFT                    (8U)
-#define XBARB_SEL1_SEL3(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK)
+#define XBARB_SEL1_SEL2_MASK  (0x3FU)
+#define XBARB_SEL1_SEL2_SHIFT (0U)
+#define XBARB_SEL1_SEL2(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK)
+#define XBARB_SEL1_SEL3_MASK  (0x3F00U)
+#define XBARB_SEL1_SEL3_SHIFT (8U)
+#define XBARB_SEL1_SEL3(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK)
 /*! @} */
 
 /*! @name SEL2 - Crossbar B Select Register 2 */
 /*! @{ */
-#define XBARB_SEL2_SEL4_MASK                     (0x3FU)
-#define XBARB_SEL2_SEL4_SHIFT                    (0U)
-#define XBARB_SEL2_SEL4(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK)
-#define XBARB_SEL2_SEL5_MASK                     (0x3F00U)
-#define XBARB_SEL2_SEL5_SHIFT                    (8U)
-#define XBARB_SEL2_SEL5(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK)
+#define XBARB_SEL2_SEL4_MASK  (0x3FU)
+#define XBARB_SEL2_SEL4_SHIFT (0U)
+#define XBARB_SEL2_SEL4(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK)
+#define XBARB_SEL2_SEL5_MASK  (0x3F00U)
+#define XBARB_SEL2_SEL5_SHIFT (8U)
+#define XBARB_SEL2_SEL5(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK)
 /*! @} */
 
 /*! @name SEL3 - Crossbar B Select Register 3 */
 /*! @{ */
-#define XBARB_SEL3_SEL6_MASK                     (0x3FU)
-#define XBARB_SEL3_SEL6_SHIFT                    (0U)
-#define XBARB_SEL3_SEL6(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK)
-#define XBARB_SEL3_SEL7_MASK                     (0x3F00U)
-#define XBARB_SEL3_SEL7_SHIFT                    (8U)
-#define XBARB_SEL3_SEL7(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK)
+#define XBARB_SEL3_SEL6_MASK  (0x3FU)
+#define XBARB_SEL3_SEL6_SHIFT (0U)
+#define XBARB_SEL3_SEL6(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK)
+#define XBARB_SEL3_SEL7_MASK  (0x3F00U)
+#define XBARB_SEL3_SEL7_SHIFT (8U)
+#define XBARB_SEL3_SEL7(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK)
 /*! @} */
 
 /*! @name SEL4 - Crossbar B Select Register 4 */
 /*! @{ */
-#define XBARB_SEL4_SEL8_MASK                     (0x3FU)
-#define XBARB_SEL4_SEL8_SHIFT                    (0U)
-#define XBARB_SEL4_SEL8(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK)
-#define XBARB_SEL4_SEL9_MASK                     (0x3F00U)
-#define XBARB_SEL4_SEL9_SHIFT                    (8U)
-#define XBARB_SEL4_SEL9(x)                       (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK)
+#define XBARB_SEL4_SEL8_MASK  (0x3FU)
+#define XBARB_SEL4_SEL8_SHIFT (0U)
+#define XBARB_SEL4_SEL8(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK)
+#define XBARB_SEL4_SEL9_MASK  (0x3F00U)
+#define XBARB_SEL4_SEL9_SHIFT (8U)
+#define XBARB_SEL4_SEL9(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK)
 /*! @} */
 
 /*! @name SEL5 - Crossbar B Select Register 5 */
 /*! @{ */
-#define XBARB_SEL5_SEL10_MASK                    (0x3FU)
-#define XBARB_SEL5_SEL10_SHIFT                   (0U)
-#define XBARB_SEL5_SEL10(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK)
-#define XBARB_SEL5_SEL11_MASK                    (0x3F00U)
-#define XBARB_SEL5_SEL11_SHIFT                   (8U)
-#define XBARB_SEL5_SEL11(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK)
+#define XBARB_SEL5_SEL10_MASK  (0x3FU)
+#define XBARB_SEL5_SEL10_SHIFT (0U)
+#define XBARB_SEL5_SEL10(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK)
+#define XBARB_SEL5_SEL11_MASK  (0x3F00U)
+#define XBARB_SEL5_SEL11_SHIFT (8U)
+#define XBARB_SEL5_SEL11(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK)
 /*! @} */
 
 /*! @name SEL6 - Crossbar B Select Register 6 */
 /*! @{ */
-#define XBARB_SEL6_SEL12_MASK                    (0x3FU)
-#define XBARB_SEL6_SEL12_SHIFT                   (0U)
-#define XBARB_SEL6_SEL12(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK)
-#define XBARB_SEL6_SEL13_MASK                    (0x3F00U)
-#define XBARB_SEL6_SEL13_SHIFT                   (8U)
-#define XBARB_SEL6_SEL13(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK)
+#define XBARB_SEL6_SEL12_MASK  (0x3FU)
+#define XBARB_SEL6_SEL12_SHIFT (0U)
+#define XBARB_SEL6_SEL12(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK)
+#define XBARB_SEL6_SEL13_MASK  (0x3F00U)
+#define XBARB_SEL6_SEL13_SHIFT (8U)
+#define XBARB_SEL6_SEL13(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK)
 /*! @} */
 
 /*! @name SEL7 - Crossbar B Select Register 7 */
 /*! @{ */
-#define XBARB_SEL7_SEL14_MASK                    (0x3FU)
-#define XBARB_SEL7_SEL14_SHIFT                   (0U)
-#define XBARB_SEL7_SEL14(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK)
-#define XBARB_SEL7_SEL15_MASK                    (0x3F00U)
-#define XBARB_SEL7_SEL15_SHIFT                   (8U)
-#define XBARB_SEL7_SEL15(x)                      (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK)
+#define XBARB_SEL7_SEL14_MASK  (0x3FU)
+#define XBARB_SEL7_SEL14_SHIFT (0U)
+#define XBARB_SEL7_SEL14(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK)
+#define XBARB_SEL7_SEL15_MASK  (0x3F00U)
+#define XBARB_SEL7_SEL15_SHIFT (8U)
+#define XBARB_SEL7_SEL15(x)    (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XBARB_Register_Masks */
 
-
 /* XBARB - Peripheral instance base addresses */
 /** Peripheral XBARB2 base address */
-#define XBARB2_BASE                              (0x403C0000u)
+#define XBARB2_BASE (0x403C0000u)
 /** Peripheral XBARB2 base pointer */
-#define XBARB2                                   ((XBARB_Type *)XBARB2_BASE)
+#define XBARB2 ((XBARB_Type *)XBARB2_BASE)
 /** Peripheral XBARB3 base address */
-#define XBARB3_BASE                              (0x403C4000u)
+#define XBARB3_BASE (0x403C4000u)
 /** Peripheral XBARB3 base pointer */
-#define XBARB3                                   ((XBARB_Type *)XBARB3_BASE)
+#define XBARB3 ((XBARB_Type *)XBARB3_BASE)
 /** Array initializer of XBARB peripheral base addresses */
-#define XBARB_BASE_ADDRS                         { 0u, 0u, XBARB2_BASE, XBARB3_BASE }
+#define XBARB_BASE_ADDRS                                                                                               \
+    {                                                                                                                  \
+        0u, 0u, XBARB2_BASE, XBARB3_BASE                                                                               \
+    }
 /** Array initializer of XBARB peripheral base pointers */
-#define XBARB_BASE_PTRS                          { (XBARB_Type *)0u, (XBARB_Type *)0u, XBARB2, XBARB3 }
+#define XBARB_BASE_PTRS                                                                                                \
+    {                                                                                                                  \
+        (XBARB_Type *)0u, (XBARB_Type *)0u, XBARB2, XBARB3                                                             \
+    }
 
 /*!
  * @}
  */ /* end of group XBARB_Peripheral_Access_Layer */
 
-
 /* ----------------------------------------------------------------------------
    -- XTALOSC24M Peripheral Access Layer
    ---------------------------------------------------------------------------- */
@@ -26550,30 +30273,31 @@ typedef struct {
  */
 
 /** XTALOSC24M - Register Layout Typedef */
-typedef struct {
-       uint8_t RESERVED_0[336];
-  __IO uint32_t MISC0;                             /**< Miscellaneous Register 0, offset: 0x150 */
-  __IO uint32_t MISC0_SET;                         /**< Miscellaneous Register 0, offset: 0x154 */
-  __IO uint32_t MISC0_CLR;                         /**< Miscellaneous Register 0, offset: 0x158 */
-  __IO uint32_t MISC0_TOG;                         /**< Miscellaneous Register 0, offset: 0x15C */
-       uint8_t RESERVED_1[272];
-  __IO uint32_t LOWPWR_CTRL;                       /**< XTAL OSC (LP) Control Register, offset: 0x270 */
-  __IO uint32_t LOWPWR_CTRL_SET;                   /**< XTAL OSC (LP) Control Register, offset: 0x274 */
-  __IO uint32_t LOWPWR_CTRL_CLR;                   /**< XTAL OSC (LP) Control Register, offset: 0x278 */
-  __IO uint32_t LOWPWR_CTRL_TOG;                   /**< XTAL OSC (LP) Control Register, offset: 0x27C */
-       uint8_t RESERVED_2[32];
-  __IO uint32_t OSC_CONFIG0;                       /**< XTAL OSC Configuration 0 Register, offset: 0x2A0 */
-  __IO uint32_t OSC_CONFIG0_SET;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2A4 */
-  __IO uint32_t OSC_CONFIG0_CLR;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2A8 */
-  __IO uint32_t OSC_CONFIG0_TOG;                   /**< XTAL OSC Configuration 0 Register, offset: 0x2AC */
-  __IO uint32_t OSC_CONFIG1;                       /**< XTAL OSC Configuration 1 Register, offset: 0x2B0 */
-  __IO uint32_t OSC_CONFIG1_SET;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2B4 */
-  __IO uint32_t OSC_CONFIG1_CLR;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2B8 */
-  __IO uint32_t OSC_CONFIG1_TOG;                   /**< XTAL OSC Configuration 1 Register, offset: 0x2BC */
-  __IO uint32_t OSC_CONFIG2;                       /**< XTAL OSC Configuration 2 Register, offset: 0x2C0 */
-  __IO uint32_t OSC_CONFIG2_SET;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2C4 */
-  __IO uint32_t OSC_CONFIG2_CLR;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2C8 */
-  __IO uint32_t OSC_CONFIG2_TOG;                   /**< XTAL OSC Configuration 2 Register, offset: 0x2CC */
+typedef struct
+{
+    uint8_t RESERVED_0[336];
+    __IO uint32_t MISC0;     /**< Miscellaneous Register 0, offset: 0x150 */
+    __IO uint32_t MISC0_SET; /**< Miscellaneous Register 0, offset: 0x154 */
+    __IO uint32_t MISC0_CLR; /**< Miscellaneous Register 0, offset: 0x158 */
+    __IO uint32_t MISC0_TOG; /**< Miscellaneous Register 0, offset: 0x15C */
+    uint8_t RESERVED_1[272];
+    __IO uint32_t LOWPWR_CTRL;     /**< XTAL OSC (LP) Control Register, offset: 0x270 */
+    __IO uint32_t LOWPWR_CTRL_SET; /**< XTAL OSC (LP) Control Register, offset: 0x274 */
+    __IO uint32_t LOWPWR_CTRL_CLR; /**< XTAL OSC (LP) Control Register, offset: 0x278 */
+    __IO uint32_t LOWPWR_CTRL_TOG; /**< XTAL OSC (LP) Control Register, offset: 0x27C */
+    uint8_t RESERVED_2[32];
+    __IO uint32_t OSC_CONFIG0;     /**< XTAL OSC Configuration 0 Register, offset: 0x2A0 */
+    __IO uint32_t OSC_CONFIG0_SET; /**< XTAL OSC Configuration 0 Register, offset: 0x2A4 */
+    __IO uint32_t OSC_CONFIG0_CLR; /**< XTAL OSC Configuration 0 Register, offset: 0x2A8 */
+    __IO uint32_t OSC_CONFIG0_TOG; /**< XTAL OSC Configuration 0 Register, offset: 0x2AC */
+    __IO uint32_t OSC_CONFIG1;     /**< XTAL OSC Configuration 1 Register, offset: 0x2B0 */
+    __IO uint32_t OSC_CONFIG1_SET; /**< XTAL OSC Configuration 1 Register, offset: 0x2B4 */
+    __IO uint32_t OSC_CONFIG1_CLR; /**< XTAL OSC Configuration 1 Register, offset: 0x2B8 */
+    __IO uint32_t OSC_CONFIG1_TOG; /**< XTAL OSC Configuration 1 Register, offset: 0x2BC */
+    __IO uint32_t OSC_CONFIG2;     /**< XTAL OSC Configuration 2 Register, offset: 0x2C0 */
+    __IO uint32_t OSC_CONFIG2_SET; /**< XTAL OSC Configuration 2 Register, offset: 0x2C4 */
+    __IO uint32_t OSC_CONFIG2_CLR; /**< XTAL OSC Configuration 2 Register, offset: 0x2C8 */
+    __IO uint32_t OSC_CONFIG2_TOG; /**< XTAL OSC Configuration 2 Register, offset: 0x2CC */
 } XTALOSC24M_Type;
 
 /* ----------------------------------------------------------------------------
@@ -26587,634 +30311,912 @@ typedef struct {
 
 /*! @name MISC0 - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_REFTOP_PWD_MASK         (0x1U)
-#define XTALOSC24M_MISC0_REFTOP_PWD_SHIFT        (0U)
-#define XTALOSC24M_MISC0_REFTOP_PWD(x)           (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_REFTOP_PWD(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK      (0x70U)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT     (4U)
-#define XTALOSC24M_MISC0_REFTOP_VBGADJ(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP_MASK       (0x80U)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT      (7U)
-#define XTALOSC24M_MISC0_REFTOP_VBGUP(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK   (0xC00U)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT  (10U)
-#define XTALOSC24M_MISC0_STOP_MODE_CONFIG(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK   (0x1000U)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT  (12U)
-#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_OSC_I_MASK              (0x6000U)
-#define XTALOSC24M_MISC0_OSC_I_SHIFT             (13U)
-#define XTALOSC24M_MISC0_OSC_I(x)                (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_I_SHIFT)) & XTALOSC24M_MISC0_OSC_I_MASK)
-#define XTALOSC24M_MISC0_OSC_XTALOK_MASK         (0x8000U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_SHIFT        (15U)
-#define XTALOSC24M_MISC0_OSC_XTALOK(x)           (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_MASK)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK      (0x10000U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT     (16U)
-#define XTALOSC24M_MISC0_OSC_XTALOK_EN(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL_MASK       (0x2000000U)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT      (25U)
-#define XTALOSC24M_MISC0_CLKGATE_CTRL(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_CTRL_MASK)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY_MASK      (0x1C000000U)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT     (26U)
-#define XTALOSC24M_MISC0_CLKGATE_DELAY(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK    (0x20000000U)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT   (29U)
-#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD_MASK       (0x40000000U)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT      (30U)
-#define XTALOSC24M_MISC0_XTAL_24M_PWD(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK     (0x80000000U)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT    (31U)
-#define XTALOSC24M_MISC0_VID_PLL_PREDIV(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_REFTOP_SELFBIASOFF(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK  (0x70U)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT (4U)
+#define XTALOSC24M_MISC0_REFTOP_VBGADJ(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_REFTOP_VBGUP(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK  (0xC00U)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT (10U)
+#define XTALOSC24M_MISC0_STOP_MODE_CONFIG(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK  (0x1000U)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT (12U)
+#define XTALOSC24M_MISC0_DISCON_HIGH_SNVS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_OSC_I(x)                                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_I_SHIFT)) & XTALOSC24M_MISC0_OSC_I_MASK)
+#define XTALOSC24M_MISC0_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_OSC_XTALOK(x)                                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK  (0x10000U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT (16U)
+#define XTALOSC24M_MISC0_OSC_XTALOK_EN(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_CLKGATE_CTRL(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY_MASK  (0x1C000000U)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT (26U)
+#define XTALOSC24M_MISC0_CLKGATE_DELAY(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK  (0x20000000U)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT (29U)
+#define XTALOSC24M_MISC0_RTC_XTAL_SOURCE(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_XTAL_24M_PWD(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK  (0x80000000U)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT (31U)
+#define XTALOSC24M_MISC0_VID_PLL_PREDIV(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_SET - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_SET_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_SET_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_SET_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_SET_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_SET_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_SET_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_SET_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_SET_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_SET_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_I_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_I_MASK)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_SET_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_SET_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_SET_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_I_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_I_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_SET_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_SET_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_SET_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_SET_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_SET_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_SET_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_SET_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_SET_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_SET_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_CLR - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_CLR_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_CLR_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_CLR_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_CLR_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_CLR_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_CLR_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_CLR_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_I_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_I_MASK)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_CLR_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_CLR_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_CLR_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_I_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_I_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_CLR_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_CLR_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_CLR_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_CLR_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_CLR_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_CLR_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name MISC0_TOG - Miscellaneous Register 0 */
 /*! @{ */
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK     (0x1U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT    (0U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_PWD(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK)
-#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK (0x8U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK  (0x1U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT (0U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_PWD(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_PWD_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK  (0x8U)
 #define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT (3U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_SHIFT)) &                                  \
+     XTALOSC24M_MISC0_TOG_REFTOP_SELFBIASOFF_MASK)
 #define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK  (0x70U)
 #define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT (4U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK   (0x80U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT  (7U)
-#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK)
-#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK (0xC00U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_REFTOP_VBGADJ_MASK)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK  (0x80U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT (7U)
+#define XTALOSC24M_MISC0_TOG_REFTOP_VBGUP(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_SHIFT)) & XTALOSC24M_MISC0_TOG_REFTOP_VBGUP_MASK)
+#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK  (0xC00U)
 #define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT (10U)
-#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) & XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK)
-#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK (0x1000U)
+#define XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_TOG_STOP_MODE_CONFIG_MASK)
+#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK  (0x1000U)
 #define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT (12U)
-#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) & XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
-#define XTALOSC24M_MISC0_TOG_OSC_I_MASK          (0x6000U)
-#define XTALOSC24M_MISC0_TOG_OSC_I_SHIFT         (13U)
-#define XTALOSC24M_MISC0_TOG_OSC_I(x)            (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_I_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_I_MASK)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK     (0x8000U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT    (15U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK)
+#define XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_SHIFT)) &                                    \
+     XTALOSC24M_MISC0_TOG_DISCON_HIGH_SNVS_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_I_MASK  (0x6000U)
+#define XTALOSC24M_MISC0_TOG_OSC_I_SHIFT (13U)
+#define XTALOSC24M_MISC0_TOG_OSC_I(x)                                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_I_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_I_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK  (0x8000U)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT (15U)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_MASK)
 #define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK  (0x10000U)
 #define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT (16U)
-#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) & XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK   (0x2000000U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT  (25U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK)
+#define XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_OSC_XTALOK_EN_MASK)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK  (0x2000000U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT (25U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_CTRL(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_CTRL_MASK)
 #define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK  (0x1C000000U)
 #define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT (26U)
-#define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT)) & XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK)
-#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK (0x20000000U)
+#define XTALOSC24M_MISC0_TOG_CLKGATE_DELAY(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_SHIFT)) &                                       \
+     XTALOSC24M_MISC0_TOG_CLKGATE_DELAY_MASK)
+#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK  (0x20000000U)
 #define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT (29U)
-#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) & XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK   (0x40000000U)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT  (30U)
-#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK)
-#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK (0x80000000U)
+#define XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_SHIFT)) &                                     \
+     XTALOSC24M_MISC0_TOG_RTC_XTAL_SOURCE_MASK)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK  (0x40000000U)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT (30U)
+#define XTALOSC24M_MISC0_TOG_XTAL_24M_PWD(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_SHIFT)) & XTALOSC24M_MISC0_TOG_XTAL_24M_PWD_MASK)
+#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK  (0x80000000U)
 #define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT (31U)
-#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) & XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK)
+#define XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_SHIFT)) &                                      \
+     XTALOSC24M_MISC0_TOG_VID_PLL_PREDIV_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK    (0x1U)
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT   (0U)
-#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK      (0x10U)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT     (4U)
-#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL(x)        (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK     (0x20U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT    (5U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL(x)       (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK    (0x40U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT   (6U)
-#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK  (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT (0U)
+#define XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK  (0x10U)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT (4U)
+#define XTALOSC24M_LOWPWR_CTRL_OSC_SEL(x)                                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK  (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT (5U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_SEL(x)                                                                             \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK  (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT (6U)
+#define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK   (0x100U)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT  (8U)
-#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK   (0x200U)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT  (9U)
-#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_SHIFT)) &                                  \
+     XTALOSC24M_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK  (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT (8U)
+#define XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK  (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT (9U)
+#define XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_L2_PWRGATE_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_SHIFT)) &                                 \
+     XTALOSC24M_LOWPWR_CTRL_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT(x)                                                                   \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) &                                \
+     XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_SET - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_SET_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_SET_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_SET_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_SET_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_SET_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_SET_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_SET_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_SET_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_SET_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_CLR - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_CLR_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_CLR_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_CLR_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_CLR_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_CLR_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_CLR_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_CLR_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name LOWPWR_CTRL_TOG - XTAL OSC (LP) Control Register */
 /*! @{ */
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK (0x1U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK  (0x1U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT (0U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_TOG_RC_OSC_EN_MASK)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK  (0x10U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT (4U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK (0x20U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_SHIFT)) &                                       \
+     XTALOSC24M_LOWPWR_CTRL_TOG_OSC_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK  (0x20U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT (5U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK (0x40U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_SHIFT)) &                                      \
+     XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_SEL_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK  (0x40U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT (6U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK (0x80U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_SHIFT)) &                                     \
+     XTALOSC24M_LOWPWR_CTRL_TOG_LPBG_TEST_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK  (0x80U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT (7U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF(x)                                                                 \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_SHIFT)) &                              \
+     XTALOSC24M_LOWPWR_CTRL_TOG_REFTOP_IBIAS_OFF_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK  (0x100U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT (8U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK (0x200U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK  (0x200U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT (9U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK (0x400U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_SHIFT)) &                                    \
+     XTALOSC24M_LOWPWR_CTRL_TOG_L2_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK  (0x400U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT (10U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK (0x800U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_CPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK  (0x800U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT (11U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK (0x2000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_SHIFT)) &                               \
+     XTALOSC24M_LOWPWR_CTRL_TOG_DISPLAY_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK  (0x2000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT (13U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK (0xC000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE(x)                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_SHIFT)) &                             \
+     XTALOSC24M_LOWPWR_CTRL_TOG_RCOSC_CG_OVERRIDE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK  (0xC000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT (14U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK (0x10000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY(x)                                                              \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_SHIFT)) &                           \
+     XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_DELAY_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK  (0x10000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT (16U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK (0x20000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT(x)                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_SHIFT)) &                            \
+     XTALOSC24M_LOWPWR_CTRL_TOG_XTALOSC_PWRUP_STAT_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK  (0x20000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT (17U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK (0x40000U)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_MIX_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK  (0x40000U)
 #define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT (18U)
-#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK)
+#define XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_SHIFT)) &                                   \
+     XTALOSC24M_LOWPWR_CTRL_TOG_GPU_PWRGATE_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0 - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_START_MASK        (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_START_SHIFT       (0U)
-#define XTALOSC24M_OSC_CONFIG0_START(x)          (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE_MASK       (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT      (1U)
-#define XTALOSC24M_OSC_CONFIG0_ENABLE(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS_MASK       (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT      (2U)
-#define XTALOSC24M_OSC_CONFIG0_BYPASS(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_INVERT_MASK       (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT      (3U)
-#define XTALOSC24M_OSC_CONFIG0_INVERT(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_START(x)                                                                                \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_ENABLE(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_BYPASS(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_INVERT(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_INVERT_MASK)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG(x)    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK    (0xF000U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT   (12U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK   (0xF0000U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT  (16U)
-#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG(x)                                                                          \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_SHIFT)) &                                       \
+     XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK  (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT (12U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_PLUS(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK  (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT (16U)
+#define XTALOSC24M_OSC_CONFIG0_HYST_MINUS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_SET - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_SET_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_SET_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_SET_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_SET_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_SET_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_SET_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_SET_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_SET_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_SET_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_SET_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_CLR - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_CLR_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_CLR_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_CLR_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_CLR_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG0_TOG - XTAL OSC Configuration 0 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG0_TOG_START_MASK    (0x1U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT   (0U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_START(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_START_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK   (0x2U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT  (1U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK   (0x4U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT  (2U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK   (0x8U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT  (3U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK (0xFF0U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START_MASK  (0x1U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT (0U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_START(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_START_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_START_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK  (0x2U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT (1U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_ENABLE(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_ENABLE_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK  (0x4U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT (2U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_BYPASS(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_BYPASS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK  (0x8U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT (3U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_INVERT(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_INVERT_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_INVERT_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK  (0xFF0U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT (4U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK (0xF000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG(x)                                                                      \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_SHIFT)) &                                   \
+     XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK  (0xF000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT (12U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK (0xF0000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG0_TOG_HYST_PLUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK  (0xF0000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK (0xFF000000U)
+#define XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS(x)                                                                       \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_SHIFT)) &                                    \
+     XTALOSC24M_OSC_CONFIG0_TOG_HYST_MINUS_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK  (0xFF000000U)
 #define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT (24U)
-#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR(x)                                                                  \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_SHIFT)) &                               \
+     XTALOSC24M_OSC_CONFIG0_TOG_RC_OSC_PROG_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1 - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG1_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG1_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_SET - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_SET_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_CLR - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_CLR_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG1_TOG - XTAL OSC Configuration 1 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK (0xFFF00000U)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK  (0xFFF00000U)
 #define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT (20U)
-#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT)) & XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK)
+#define XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG1_TOG_COUNT_RC_CUR_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2 - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG(x)   (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK    (0x10000U)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT   (16U)
-#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M(x)      (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK       (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT      (17U)
-#define XTALOSC24M_OSC_CONFIG2_MUX_1M(x)         (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG(x)                                                                         \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) &                                      \
+     XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK  (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT (16U)
+#define XTALOSC24M_OSC_CONFIG2_ENABLE_1M(x)                                                                            \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_MUX_1M(x)                                                                               \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_SET - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_SET_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_SET_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_SET_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_CLR - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_CLR_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_CLR_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_CLR_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
 /*! @name OSC_CONFIG2_TOG - XTAL OSC Configuration 2 Register */
 /*! @{ */
-#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK (0xFFFU)
+#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK  (0xFFFU)
 #define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT (0U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK (0x10000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG(x)                                                                     \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_SHIFT)) &                                  \
+     XTALOSC24M_OSC_CONFIG2_TOG_COUNT_1M_TRG_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK  (0x10000U)
 #define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT (16U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M(x)  (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK   (0x20000U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT  (17U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M(x)     (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK)
-#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK (0x80000000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M(x)                                                                        \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_SHIFT)) &                                     \
+     XTALOSC24M_OSC_CONFIG2_TOG_ENABLE_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK  (0x20000U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT (17U)
+#define XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M(x)                                                                           \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_MUX_1M_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK  (0x80000000U)
 #define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT (31U)
-#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL(x) (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT)) & XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK)
+#define XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL(x)                                                                    \
+    (((uint32_t)(((uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_SHIFT)) &                                 \
+     XTALOSC24M_OSC_CONFIG2_TOG_CLK_1M_ERR_FL_MASK)
 /*! @} */
 
-
 /*!
  * @}
  */ /* end of group XTALOSC24M_Register_Masks */
 
-
 /* XTALOSC24M - Peripheral instance base addresses */
 /** Peripheral XTALOSC24M base address */
-#define XTALOSC24M_BASE                          (0x400D8000u)
+#define XTALOSC24M_BASE (0x400D8000u)
 /** Peripheral XTALOSC24M base pointer */
-#define XTALOSC24M                               ((XTALOSC24M_Type *)XTALOSC24M_BASE)
+#define XTALOSC24M ((XTALOSC24M_Type *)XTALOSC24M_BASE)
 /** Array initializer of XTALOSC24M peripheral base addresses */
-#define XTALOSC24M_BASE_ADDRS                    { XTALOSC24M_BASE }
+#define XTALOSC24M_BASE_ADDRS                                                                                          \
+    {                                                                                                                  \
+        XTALOSC24M_BASE                                                                                                \
+    }
 /** Array initializer of XTALOSC24M peripheral base pointers */
-#define XTALOSC24M_BASE_PTRS                     { XTALOSC24M }
+#define XTALOSC24M_BASE_PTRS                                                                                           \
+    {                                                                                                                  \
+        XTALOSC24M                                                                                                     \
+    }
 
 /*!
  * @}
  */ /* end of group XTALOSC24M_Peripheral_Access_Layer */
 
-
 /*
 ** End of section using anonymous unions
 */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang diagnostic pop
-  #else
-    #pragma pop
-  #endif
-#elif defined(__CWCC__)
-  #pragma pop
-#elif defined(__GNUC__)
-  /* leave anonymous unions enabled */
-#elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma language=default
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang diagnostic pop
 #else
-  #error Not supported compiler type
+#pragma pop
+#endif
+#elif defined(__CWCC__)
+#pragma pop
+#elif defined(__GNUC__)
+/* leave anonymous unions enabled */
+#elif defined(__IAR_SYSTEMS_ICC__)
+#pragma language = default
+#else
+#error Not supported compiler type
 #endif
 
 /*!
  * @}
  */ /* end of group Peripheral_access_layer */
 
-
 /* ----------------------------------------------------------------------------
    -- Macros for use with bit field definitions (xxx_SHIFT, xxx_MASK).
    ---------------------------------------------------------------------------- */
@@ -27225,11 +31227,11 @@ typedef struct {
  */
 
 #if defined(__ARMCC_VERSION)
-  #if (__ARMCC_VERSION >= 6010050)
-    #pragma clang system_header
-  #endif
+#if (__ARMCC_VERSION >= 6010050)
+#pragma clang system_header
+#endif
 #elif defined(__IAR_SYSTEMS_ICC__)
-  #pragma system_include
+#pragma system_include
 #endif
 
 /**
@@ -27238,20 +31240,19 @@ typedef struct {
  * @param value Value of the bit field.
  * @return Masked and shifted value.
  */
-#define NXP_VAL2FLD(field, value)    (((value) << (field ## _SHIFT)) & (field ## _MASK))
+#define NXP_VAL2FLD(field, value) (((value) << (field##_SHIFT)) & (field##_MASK))
 /**
  * @brief Mask and right-shift a register value to extract a bit field value.
  * @param field Name of the register bit field.
  * @param value Value of the register.
  * @return Masked and shifted bit field value.
  */
-#define NXP_FLD2VAL(field, value)    (((value) & (field ## _MASK)) >> (field ## _SHIFT))
+#define NXP_FLD2VAL(field, value) (((value) & (field##_MASK)) >> (field##_SHIFT))
 
 /*!
  * @}
  */ /* end of group Bit_Field_Generic_Macros */
 
-
 /* ----------------------------------------------------------------------------
    -- SDK Compatibility
    ---------------------------------------------------------------------------- */
@@ -27267,6 +31268,4 @@ typedef struct {
  * @}
  */ /* end of group SDK_Compatibility_Symbols */
 
-
-#endif  /* _MIMXRT1051_H_ */
-
+#endif /* _MIMXRT1051_H_ */
diff --git a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h b/module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h
index 5b92bf59b..43fcf47a8 100644
--- a/module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h
+++ b/module-bsp/board/rt1051/common/cmsis/MIMXRT1052_features.h
@@ -189,7 +189,8 @@
 #define FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA (0)
 /* @brief Remove CAN Engine Clock Source Selection from unsupported part. */
 #define FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE (1)
-/* @brief Is affected by errata with ID 5641 (Module does not transmit a message that is enabled to be transmitted at a specific moment during the arbitration process). */
+/* @brief Is affected by errata with ID 5641 (Module does not transmit a message that is enabled to be transmitted at a
+ * specific moment during the arbitration process). */
 #define FSL_FEATURE_FLEXCAN_HAS_ERRATA_5641 (0)
 /* @brief Has CAN with Flexible Data rate (CAN FD) protocol. */
 #define FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE (0)
@@ -213,11 +214,15 @@
 
 /* EDMA module features */
 
-/* @brief Number of DMA channels (related to number of registers TCD, DCHPRI, bit fields ERQ[ERQn], EEI[EEIn], INT[INTn], ERR[ERRn], HRS[HRSn] and bit field widths ES[ERRCHN], CEEI[CEEI], SEEI[SEEI], CERQ[CERQ], SERQ[SERQ], CDNE[CDNE], SSRT[SSRT], CERR[CERR], CINT[CINT], TCDn_CITER_ELINKYES[LINKCH], TCDn_CSR[MAJORLINKCH], TCDn_BITER_ELINKYES[LINKCH]). (Valid only for eDMA modules.) */
+/* @brief Number of DMA channels (related to number of registers TCD, DCHPRI, bit fields ERQ[ERQn], EEI[EEIn],
+ * INT[INTn], ERR[ERRn], HRS[HRSn] and bit field widths ES[ERRCHN], CEEI[CEEI], SEEI[SEEI], CERQ[CERQ], SERQ[SERQ],
+ * CDNE[CDNE], SSRT[SSRT], CERR[CERR], CINT[CINT], TCDn_CITER_ELINKYES[LINKCH], TCDn_CSR[MAJORLINKCH],
+ * TCDn_BITER_ELINKYES[LINKCH]). (Valid only for eDMA modules.) */
 #define FSL_FEATURE_EDMA_MODULE_CHANNEL (32)
 /* @brief Total number of DMA channels on all modules. */
 #define FSL_FEATURE_EDMA_DMAMUX_CHANNELS (32)
-/* @brief Number of DMA channel groups (register bit fields CR[ERGA], CR[GRPnPRI], ES[GPE], DCHPRIn[GRPPRI]). (Valid only for eDMA modules.) */
+/* @brief Number of DMA channel groups (register bit fields CR[ERGA], CR[GRPnPRI], ES[GPE], DCHPRIn[GRPPRI]). (Valid
+ * only for eDMA modules.) */
 #define FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT (1)
 /* @brief Has DMA_Error interrupt vector. */
 #define FSL_FEATURE_EDMA_HAS_ERROR_IRQ (1)
@@ -331,7 +336,8 @@
 
 /* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
 #define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
-/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
+/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the
+ * registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
 /* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
@@ -351,7 +357,8 @@
 #define FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT (1)
 /* @brief Baud rate fine adjustment is available. */
 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
-/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
+/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR],
+ * BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
 /* @brief Baud rate oversampling is available. */
 #define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
@@ -367,11 +374,13 @@
 #define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
 /* @brief Supports two match addresses to filter incoming frames. */
 #define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
-/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
+/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are
+ * 32-bit wide). */
 #define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
 /* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
 #define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
-/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
+/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit
+ * wide). */
 #define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
 #define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
@@ -459,21 +468,28 @@
 
 /* SAI module features */
 
-/* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW], RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
+/* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW],
+ * RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
 #define FSL_FEATURE_SAI_FIFO_COUNT (32)
 /* @brief Receive/transmit channel number (register bit fields TCR3[TCE], RCR3[RCE], registers TDRn and RDRn). */
 #define FSL_FEATURE_SAI_CHANNEL_COUNT (4)
-/* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ], RMR[RWM]). */
+/* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ],
+ * RMR[RWM]). */
 #define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (32)
-/* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR], TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
+/* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR],
+ * TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (1)
-/* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK], RCR4[FPACK]). */
+/* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK],
+ * RCR4[FPACK]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_PACKING (1)
-/* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields TCR4[FCONT], RCR4[FCONT]). */
+/* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields
+ * TCR4[FCONT], RCR4[FCONT]). */
 #define FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR (1)
-/* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
+/* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning
+ * flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
 #define FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE (1)
-/* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE], RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
+/* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE],
+ * RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
 #define FSL_FEATURE_SAI_HAS_CLOCKING_MODE (0)
 /* @brief Has register for configuration of the MCLK divide ratio (register bit fields MDR[FRACT], MDR[DIVIDE]). */
 #define FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER (0)
@@ -586,4 +602,3 @@
 #define FSL_FEATURE_XBARA_OUTPUT_DMA_CH_MUX_REQ_95 (1)
 
 #endif /* _MIMXRT1051_FEATURES_H_ */
-
diff --git a/module-bsp/board/rt1051/common/cmsis/arm_common_tables.h b/module-bsp/board/rt1051/common/cmsis/arm_common_tables.h
index dfea7460e..6de8b8633 100644
--- a/module-bsp/board/rt1051/common/cmsis/arm_common_tables.h
+++ b/module-bsp/board/rt1051/common/cmsis/arm_common_tables.h
@@ -72,12 +72,12 @@ extern const float32_t twiddleCoef_rfft_2048[2048];
 extern const float32_t twiddleCoef_rfft_4096[4096];
 
 /* floating-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
-#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
-#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
-#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
-#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
-#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH   ((uint16_t)20)
+#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH   ((uint16_t)48)
+#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH   ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH  ((uint16_t)208)
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH  ((uint16_t)440)
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH  ((uint16_t)448)
 #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
 #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
 #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
@@ -93,12 +93,12 @@ extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LEN
 extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
 
 /* fixed-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
-#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
-#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
-#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
-#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
-#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH   ((uint16_t)12)
+#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH   ((uint16_t)24)
+#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH   ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH  ((uint16_t)112)
+#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH  ((uint16_t)240)
+#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH  ((uint16_t)480)
 #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
 #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
 #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
diff --git a/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h b/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h
index b7b0f0b80..d904d3796 100644
--- a/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h
+++ b/module-bsp/board/rt1051/common/cmsis/arm_const_structs.h
@@ -33,34 +33,34 @@
 #include "arm_math.h"
 #include "cmsis/arm_common_tables.h"
 
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
 
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
 
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
 
 #endif
diff --git a/module-bsp/board/rt1051/common/cmsis/arm_math.h b/module-bsp/board/rt1051/common/cmsis/arm_math.h
index ea9dd26aa..051b6d0d5 100644
--- a/module-bsp/board/rt1051/common/cmsis/arm_math.h
+++ b/module-bsp/board/rt1051/common/cmsis/arm_math.h
@@ -68,16 +68,20 @@
    * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
    * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point Unit)
    * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
-   * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)
+   * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point
+   Unit)
    *
-   * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
-   * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the
+   <code>Include</code> folder.
+   * Simply include this file and link the appropriate library in the application and begin calling the library
+   functions. The Library supports single
+   * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endian. Same header file
+   will be used for floating point unit(FPU) variants.
    * Define the appropriate preprocessor macro ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or
    * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
    * For Armv8-M cores define preprocessor macro ARM_MATH_ARMV8MBL or ARM_MATH_ARMV8MML.
    * Set preprocessor macro __DSP_PRESENT if Armv8-M Mainline core supports DSP instructions.
-   * 
+   *
    *
    * Examples
    * --------
@@ -93,11 +97,13 @@
    * Building the Library
    * ------------
    *
-   * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
+   * The library installer contains a project file to rebuild libraries on MDK toolchain in the
+   <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
    * - arm_cortexM_math.uvprojx
    *
    *
-   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional preprocessor macros detailed above.
+   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target,
+   and defining the optional preprocessor macros detailed above.
    *
    * Preprocessor Macros
    * ------------
@@ -110,7 +116,8 @@
    *
    * - ARM_MATH_BIG_ENDIAN:
    *
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little
+   endian targets.
    *
    * - ARM_MATH_MATRIX_CHECK:
    *
@@ -122,18 +129,22 @@
    *
    * - ARM_MATH_CMx:
    *
-   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
-   * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and
+   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on
+   Cortex-M3 target
+   * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+
+   target, and
    * ARM_MATH_CM7 for building the library on cortex-M7.
    *
    * - ARM_MATH_ARMV8MxL:
    *
-   * Define macro ARM_MATH_ARMV8MBL for building the library on Armv8-M Baseline target, ARM_MATH_ARMV8MML for building library
+   * Define macro ARM_MATH_ARMV8MBL for building the library on Armv8-M Baseline target, ARM_MATH_ARMV8MML for building
+   library
    * on Armv8-M Mainline target.
    *
    * - __FPU_PRESENT:
    *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for floating point libraries.
+   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for floating point
+   libraries.
    *
    * - __DSP_PRESENT:
    *
@@ -162,7 +173,6 @@
    * Copyright (C) 2010-2015 Arm Limited. All rights reserved.
    */
 
-
 /**
  * @defgroup groupMath Basic Math Functions
  */
@@ -290,6863 +300,5665 @@
 #define _ARM_MATH_H
 
 /* Compiler specific diagnostic adjustment */
-#if   defined ( __CC_ARM )
+#if defined(__CC_ARM)
 
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
 
-#elif defined ( __GNUC__ )
+#elif defined(__GNUC__)
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wsign-conversion"
 #pragma GCC diagnostic ignored "-Wconversion"
 #pragma GCC diagnostic ignored "-Wunused-parameter"
 
-#elif defined ( __ICCARM__ )
+#elif defined(__ICCARM__)
 
-#elif defined ( __TI_ARM__ )
+#elif defined(__TI_ARM__)
 
-#elif defined ( __CSMC__ )
+#elif defined(__CSMC__)
 
-#elif defined ( __TASKING__ )
+#elif defined(__TASKING__)
 
 #else
-  #error Unknown compiler
+#error Unknown compiler
 #endif
 
-
-#define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
+#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
 
 #if defined(ARM_MATH_CM7)
-  #include "core_cm7.h"
-  #define ARM_MATH_DSP
-#elif defined (ARM_MATH_CM4)
-  #include "core_cm4.h"
-  #define ARM_MATH_DSP
-#elif defined (ARM_MATH_CM3)
-  #include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
-  #include "core_cm0.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_CM0PLUS)
-  #include "core_cm0plus.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_ARMV8MBL)
-  #include "core_armv8mbl.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_ARMV8MML)
-  #include "core_armv8mml.h"
-  #if (defined (__DSP_PRESENT) && (__DSP_PRESENT == 1))
-    #define ARM_MATH_DSP
-  #endif
+#include "core_cm7.h"
+#define ARM_MATH_DSP
+#elif defined(ARM_MATH_CM4)
+#include "core_cm4.h"
+#define ARM_MATH_DSP
+#elif defined(ARM_MATH_CM3)
+#include "core_cm3.h"
+#elif defined(ARM_MATH_CM0)
+#include "core_cm0.h"
+#define ARM_MATH_CM0_FAMILY
+#elif defined(ARM_MATH_CM0PLUS)
+#include "core_cm0plus.h"
+#define ARM_MATH_CM0_FAMILY
+#elif defined(ARM_MATH_ARMV8MBL)
+#include "core_armv8mbl.h"
+#define ARM_MATH_CM0_FAMILY
+#elif defined(ARM_MATH_ARMV8MML)
+#include "core_armv8mml.h"
+#if (defined(__DSP_PRESENT) && (__DSP_PRESENT == 1))
+#define ARM_MATH_DSP
+#endif
 #else
-  #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS, ARM_MATH_CM0, ARM_MATH_ARMV8MBL, ARM_MATH_ARMV8MML"
+#error                                                                                                                 \
+    "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS, ARM_MATH_CM0, ARM_MATH_ARMV8MBL, ARM_MATH_ARMV8MML"
 #endif
 
-#undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
+#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
 #include "string.h"
 #include "math.h"
-#ifdef   __cplusplus
+#ifdef __cplusplus
 extern "C"
 {
 #endif
 
+    /**
+     * @brief Macros required for reciprocal calculation in Normalized LMS
+     */
 
-  /**
-   * @brief Macros required for reciprocal calculation in Normalized LMS
-   */
-
-#define DELTA_Q31          (0x100)
-#define DELTA_Q15          0x5
-#define INDEX_MASK         0x0000003F
+#define DELTA_Q31  (0x100)
+#define DELTA_Q15  0x5
+#define INDEX_MASK 0x0000003F
 #ifndef PI
-  #define PI               3.14159265358979f
+#define PI 3.14159265358979f
 #endif
 
-  /**
-   * @brief Macros required for SINE and COSINE Fast math approximations
-   */
+    /**
+     * @brief Macros required for SINE and COSINE Fast math approximations
+     */
 
-#define FAST_MATH_TABLE_SIZE  512
-#define FAST_MATH_Q31_SHIFT   (32 - 10)
-#define FAST_MATH_Q15_SHIFT   (16 - 10)
-#define CONTROLLER_Q31_SHIFT  (32 - 9)
-#define TABLE_SPACING_Q31     0x400000
-#define TABLE_SPACING_Q15     0x80
+#define FAST_MATH_TABLE_SIZE 512
+#define FAST_MATH_Q31_SHIFT  (32 - 10)
+#define FAST_MATH_Q15_SHIFT  (16 - 10)
+#define CONTROLLER_Q31_SHIFT (32 - 9)
+#define TABLE_SPACING_Q31    0x400000
+#define TABLE_SPACING_Q15    0x80
 
-  /**
-   * @brief Macros required for SINE and COSINE Controller functions
-   */
-  /* 1.31(q31) Fixed value of 2/360 */
-  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING         0xB60B61
+    /**
+     * @brief Macros required for SINE and COSINE Controller functions
+     */
+    /* 1.31(q31) Fixed value of 2/360 */
+    /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING 0xB60B61
 
-  /**
-   * @brief Macro for Unaligned Support
-   */
+    /**
+     * @brief Macro for Unaligned Support
+     */
 #ifndef UNALIGNED_SUPPORT_DISABLE
-    #define ALIGN4
+#define ALIGN4
 #else
-  #if defined  (__GNUC__)
-    #define ALIGN4 __attribute__((aligned(4)))
-  #else
-    #define ALIGN4 __align(4)
-  #endif
-#endif   /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#if defined(__GNUC__)
+#define ALIGN4 __attribute__((aligned(4)))
+#else
+#define ALIGN4 __align(4)
+#endif
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
 
-  /**
-   * @brief Error status returned by some functions in the library.
-   */
+    /**
+     * @brief Error status returned by some functions in the library.
+     */
 
-  typedef enum
-  {
-    ARM_MATH_SUCCESS = 0,                /**< No error */
-    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
-    ARM_MATH_LENGTH_ERROR = -2,          /**< Length of data buffer is incorrect */
-    ARM_MATH_SIZE_MISMATCH = -3,         /**< Size of matrices is not compatible with the operation. */
-    ARM_MATH_NANINF = -4,                /**< Not-a-number (NaN) or infinity is generated */
-    ARM_MATH_SINGULAR = -5,              /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
-    ARM_MATH_TEST_FAILURE = -6           /**< Test Failed  */
-  } arm_status;
+    typedef enum
+    {
+        ARM_MATH_SUCCESS        = 0,  /**< No error */
+        ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
+        ARM_MATH_LENGTH_ERROR   = -2, /**< Length of data buffer is incorrect */
+        ARM_MATH_SIZE_MISMATCH  = -3, /**< Size of matrices is not compatible with the operation. */
+        ARM_MATH_NANINF         = -4, /**< Not-a-number (NaN) or infinity is generated */
+        ARM_MATH_SINGULAR =
+            -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
+        ARM_MATH_TEST_FAILURE = -6 /**< Test Failed  */
+    } arm_status;
 
-  /**
-   * @brief 8-bit fractional data type in 1.7 format.
-   */
-  typedef int8_t q7_t;
+    /**
+     * @brief 8-bit fractional data type in 1.7 format.
+     */
+    typedef int8_t q7_t;
 
-  /**
-   * @brief 16-bit fractional data type in 1.15 format.
-   */
-  typedef int16_t q15_t;
+    /**
+     * @brief 16-bit fractional data type in 1.15 format.
+     */
+    typedef int16_t q15_t;
 
-  /**
-   * @brief 32-bit fractional data type in 1.31 format.
-   */
-  typedef int32_t q31_t;
+    /**
+     * @brief 32-bit fractional data type in 1.31 format.
+     */
+    typedef int32_t q31_t;
 
-  /**
-   * @brief 64-bit fractional data type in 1.63 format.
-   */
-  typedef int64_t q63_t;
+    /**
+     * @brief 64-bit fractional data type in 1.63 format.
+     */
+    typedef int64_t q63_t;
 
-  /**
-   * @brief 32-bit floating-point type definition.
-   */
-  typedef float float32_t;
+    /**
+     * @brief 32-bit floating-point type definition.
+     */
+    typedef float float32_t;
 
-  /**
-   * @brief 64-bit floating-point type definition.
-   */
-  typedef double float64_t;
+    /**
+     * @brief 64-bit floating-point type definition.
+     */
+    typedef double float64_t;
 
-  /**
-   * @brief definition to read/write two 16 bit values.
-   */
-#if   defined ( __CC_ARM )
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
+    /**
+     * @brief definition to read/write two 16 bit values.
+     */
+#if defined(__CC_ARM)
+#define __SIMD32_TYPE int32_t __packed
+#define CMSIS_UNUSED  __attribute__((unused))
+#define CMSIS_INLINE  __attribute__((always_inline))
 
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED  __attribute__((unused))
+#define CMSIS_INLINE  __attribute__((always_inline))
 
-#elif defined ( __GNUC__ )
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
+#elif defined(__GNUC__)
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED  __attribute__((unused))
+#define CMSIS_INLINE  __attribute__((always_inline))
 
-#elif defined ( __ICCARM__ )
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
+#elif defined(__ICCARM__)
+#define __SIMD32_TYPE int32_t __packed
+#define CMSIS_UNUSED
+#define CMSIS_INLINE
 
-#elif defined ( __TI_ARM__ )
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE
+#elif defined(__TI_ARM__)
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED  __attribute__((unused))
+#define CMSIS_INLINE
 
-#elif defined ( __CSMC__ )
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
+#elif defined(__CSMC__)
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED
+#define CMSIS_INLINE
 
-#elif defined ( __TASKING__ )
-  #define __SIMD32_TYPE __unaligned int32_t
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
+#elif defined(__TASKING__)
+#define __SIMD32_TYPE __unaligned int32_t
+#define CMSIS_UNUSED
+#define CMSIS_INLINE
 
 #else
-  #error Unknown compiler
+#error Unknown compiler
 #endif
 
-#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
-#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
-#define __SIMD64(addr)        (*(int64_t **) & (addr))
+#define __SIMD32(addr)       (*(__SIMD32_TYPE **)&(addr))
+#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr))
+#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *)(addr))
+#define __SIMD64(addr)       (*(int64_t **)&(addr))
 
-#if !defined (ARM_MATH_DSP)
-  /**
-   * @brief definition to pack two 16 bit values.
-   */
-#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
-                                    (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
-#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
-                                    (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
+#if !defined(ARM_MATH_DSP)
+    /**
+     * @brief definition to pack two 16 bit values.
+     */
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    ((((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000))
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    ((((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF))
 
 #endif /* !defined (ARM_MATH_DSP) */
 
-   /**
-   * @brief definition to pack four 8 bit values.
-   */
+    /**
+     * @brief definition to pack four 8 bit values.
+     */
 #ifndef ARM_MATH_BIG_ENDIAN
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0, v1, v2, v3)                                                                                       \
+    ((((int32_t)(v0) << 0) & (int32_t)0x000000FF) | (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) |                     \
+     (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | (((int32_t)(v3) << 24) & (int32_t)0xFF000000))
 #else
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0, v1, v2, v3)                                                                                       \
+    ((((int32_t)(v3) << 0) & (int32_t)0x000000FF) | (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) |                     \
+     (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | (((int32_t)(v0) << 24) & (int32_t)0xFF000000))
 
 #endif
 
-
-  /**
-   * @brief Clips Q63 to Q31 values.
-   */
-  CMSIS_INLINE __STATIC_INLINE q31_t clip_q63_to_q31(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
-  }
-
-  /**
-   * @brief Clips Q63 to Q15 values.
-   */
-  CMSIS_INLINE __STATIC_INLINE q15_t clip_q63_to_q15(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
-  }
-
-  /**
-   * @brief Clips Q31 to Q7 values.
-   */
-  CMSIS_INLINE __STATIC_INLINE q7_t clip_q31_to_q7(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
-      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
-  }
-
-  /**
-   * @brief Clips Q31 to Q15 values.
-   */
-  CMSIS_INLINE __STATIC_INLINE q15_t clip_q31_to_q15(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
-  }
-
-  /**
-   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
-   */
-
-  CMSIS_INLINE __STATIC_INLINE q63_t mult32x64(
-  q63_t x,
-  q31_t y)
-  {
-    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
-            (((q63_t) (x >> 32) * y)));
-  }
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
-   */
-
-  CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31(
-  q31_t in,
-  q31_t * dst,
-  q31_t * pRecipTable)
-  {
-    q31_t out;
-    uint32_t tempVal;
-    uint32_t index, i;
-    uint32_t signBits;
-
-    if (in > 0)
+    /**
+     * @brief Clips Q63 to Q31 values.
+     */
+    CMSIS_INLINE __STATIC_INLINE q31_t clip_q63_to_q31(q63_t x)
     {
-      signBits = ((uint32_t) (__CLZ( in) - 1));
-    }
-    else
-    {
-      signBits = ((uint32_t) (__CLZ(-in) - 1));
+        return ((q31_t)(x >> 32) != ((q31_t)x >> 31)) ? ((0x7FFFFFFF ^ ((q31_t)(x >> 63)))) : (q31_t)x;
     }
 
-    /* Convert input sample to 1.31 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >> 24);
-    index = (index & INDEX_MASK);
-
-    /* 1.31 with exp 1 */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0U; i < 2U; i++)
+    /**
+     * @brief Clips Q63 to Q15 values.
+     */
+    CMSIS_INLINE __STATIC_INLINE q15_t clip_q63_to_q15(q63_t x)
     {
-      tempVal = (uint32_t) (((q63_t) in * out) >> 31);
-      tempVal = 0x7FFFFFFFu - tempVal;
-      /*      1.31 with exp 1 */
-      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
-      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
+        return ((q31_t)(x >> 32) != ((q31_t)x >> 31)) ? ((0x7FFF ^ ((q15_t)(x >> 63)))) : (q15_t)(x >> 15);
     }
 
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1U);
-  }
-
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15(
-  q15_t in,
-  q15_t * dst,
-  q15_t * pRecipTable)
-  {
-    q15_t out = 0;
-    uint32_t tempVal = 0;
-    uint32_t index = 0, i = 0;
-    uint32_t signBits = 0;
-
-    if (in > 0)
+    /**
+     * @brief Clips Q31 to Q7 values.
+     */
+    CMSIS_INLINE __STATIC_INLINE q7_t clip_q31_to_q7(q31_t x)
     {
-      signBits = ((uint32_t)(__CLZ( in) - 17));
-    }
-    else
-    {
-      signBits = ((uint32_t)(__CLZ(-in) - 17));
+        return ((q31_t)(x >> 24) != ((q31_t)x >> 23)) ? ((0x7F ^ ((q7_t)(x >> 31)))) : (q7_t)x;
     }
 
-    /* Convert input sample to 1.15 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >>  8);
-    index = (index & INDEX_MASK);
-
-    /*      1.15 with exp 1  */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0U; i < 2U; i++)
+    /**
+     * @brief Clips Q31 to Q15 values.
+     */
+    CMSIS_INLINE __STATIC_INLINE q15_t clip_q31_to_q15(q31_t x)
     {
-      tempVal = (uint32_t) (((q31_t) in * out) >> 15);
-      tempVal = 0x7FFFu - tempVal;
-      /*      1.15 with exp 1 */
-      out = (q15_t) (((q31_t) out * tempVal) >> 14);
-      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+        return ((q31_t)(x >> 16) != ((q31_t)x >> 15)) ? ((0x7FFF ^ ((q15_t)(x >> 31)))) : (q15_t)x;
     }
 
-    /* write output */
-    *dst = out;
+    /**
+     * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+     */
 
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1);
-  }
+    CMSIS_INLINE __STATIC_INLINE q63_t mult32x64(q63_t x, q31_t y)
+    {
+        return ((((q63_t)(x & 0x00000000FFFFFFFF) * y) >> 32) + (((q63_t)(x >> 32) * y)));
+    }
 
+    /**
+     * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+     */
+
+    CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31(q31_t in, q31_t *dst, q31_t *pRecipTable)
+    {
+        q31_t out;
+        uint32_t tempVal;
+        uint32_t index, i;
+        uint32_t signBits;
+
+        if (in > 0) {
+            signBits = ((uint32_t)(__CLZ(in) - 1));
+        }
+        else {
+            signBits = ((uint32_t)(__CLZ(-in) - 1));
+        }
+
+        /* Convert input sample to 1.31 format */
+        in = (in << signBits);
+
+        /* calculation of index for initial approximated Val */
+        index = (uint32_t)(in >> 24);
+        index = (index & INDEX_MASK);
+
+        /* 1.31 with exp 1 */
+        out = pRecipTable[index];
+
+        /* calculation of reciprocal value */
+        /* running approximation for two iterations */
+        for (i = 0U; i < 2U; i++) {
+            tempVal = (uint32_t)(((q63_t)in * out) >> 31);
+            tempVal = 0x7FFFFFFFu - tempVal;
+            /*      1.31 with exp 1 */
+            /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
+            out = clip_q63_to_q31(((q63_t)out * tempVal) >> 30);
+        }
+
+        /* write output */
+        *dst = out;
+
+        /* return num of signbits of out = 1/in value */
+        return (signBits + 1U);
+    }
+
+    /**
+     * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15(q15_t in, q15_t *dst, q15_t *pRecipTable)
+    {
+        q15_t out        = 0;
+        uint32_t tempVal = 0;
+        uint32_t index = 0, i = 0;
+        uint32_t signBits = 0;
+
+        if (in > 0) {
+            signBits = ((uint32_t)(__CLZ(in) - 17));
+        }
+        else {
+            signBits = ((uint32_t)(__CLZ(-in) - 17));
+        }
+
+        /* Convert input sample to 1.15 format */
+        in = (in << signBits);
+
+        /* calculation of index for initial approximated Val */
+        index = (uint32_t)(in >> 8);
+        index = (index & INDEX_MASK);
+
+        /*      1.15 with exp 1  */
+        out = pRecipTable[index];
+
+        /* calculation of reciprocal value */
+        /* running approximation for two iterations */
+        for (i = 0U; i < 2U; i++) {
+            tempVal = (uint32_t)(((q31_t)in * out) >> 15);
+            tempVal = 0x7FFFu - tempVal;
+            /*      1.15 with exp 1 */
+            out = (q15_t)(((q31_t)out * tempVal) >> 14);
+            /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+        }
+
+        /* write output */
+        *dst = out;
+
+        /* return num of signbits of out = 1/in value */
+        return (signBits + 1);
+    }
 
 /*
  * @brief C custom defined intrinsic function for M3 and M0 processors
  */
-#if !defined (ARM_MATH_DSP)
+#if !defined(ARM_MATH_DSP)
 
-  /*
-   * @brief C custom defined QADD8 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QADD8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
+    /*
+     * @brief C custom defined QADD8 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QADD8(uint32_t x, uint32_t y)
+    {
+        q31_t r, s, t, u;
 
-    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+        r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+        s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+        t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+        u = __SSAT(((((q31_t)x) >> 24) + (((q31_t)y) >> 24)), 8) & (int32_t)0x000000FF;
 
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
+        return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r)));
+    }
 
+    /*
+     * @brief C custom defined QSUB8 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB8(uint32_t x, uint32_t y)
+    {
+        q31_t r, s, t, u;
 
-  /*
-   * @brief C custom defined QSUB8 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
+        r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+        s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+        t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+        u = __SSAT(((((q31_t)x) >> 24) - (((q31_t)y) >> 24)), 8) & (int32_t)0x000000FF;
 
-    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+        return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r)));
+    }
 
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
+    /*
+     * @brief C custom defined QADD16 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QADD16(uint32_t x, uint32_t y)
+    {
+        /*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC
+         */
+        q31_t r = 0, s = 0;
 
+        r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+        s = __SSAT(((((q31_t)x) >> 16) + (((q31_t)y) >> 16)), 16) & (int32_t)0x0000FFFF;
 
-  /*
-   * @brief C custom defined QADD16 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */
-    q31_t r = 0, s = 0;
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+    /*
+     * @brief C custom defined SHADD16 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SHADD16(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+        r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        s = (((((q31_t)x) >> 16) + (((q31_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF;
 
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-  /*
-   * @brief C custom defined SHADD16 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+    /*
+     * @brief C custom defined QSUB16 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB16(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+        s = __SSAT(((((q31_t)x) >> 16) - (((q31_t)y) >> 16)), 16) & (int32_t)0x0000FFFF;
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
+    /*
+     * @brief C custom defined SHSUB16 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SHSUB16(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-  /*
-   * @brief C custom defined QSUB16 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+        r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        s = (((((q31_t)x) >> 16) - (((q31_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF;
 
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+    /*
+     * @brief C custom defined QASX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QASX(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
+        r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y) >> 16)), 16) & (int32_t)0x0000FFFF;
+        s = __SSAT(((((q31_t)x) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
 
-  /*
-   * @brief C custom defined SHSUB16 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    /*
+     * @brief C custom defined SHASX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SHASX(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+        r = (((((q31_t)x << 16) >> 16) - (((q31_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        s = (((((q31_t)x) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
 
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-  /*
-   * @brief C custom defined QASX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+    /*
+     * @brief C custom defined QSAX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __QSAX(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+        r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y) >> 16)), 16) & (int32_t)0x0000FFFF;
+        s = __SSAT(((((q31_t)x) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
+    /*
+     * @brief C custom defined SHSAX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SHSAX(uint32_t x, uint32_t y)
+    {
+        q31_t r, s;
 
-  /*
-   * @brief C custom defined SHASX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+        r = (((((q31_t)x << 16) >> 16) + (((q31_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        s = (((((q31_t)x) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
 
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+        return ((uint32_t)((s << 16) | (r)));
+    }
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+    /*
+     * @brief C custom defined SMUSDX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX(uint32_t x, uint32_t y)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y) >> 16)) -
+                           ((((q31_t)x) >> 16) * (((q31_t)y << 16) >> 16))));
+    }
 
+    /*
+     * @brief C custom defined SMUADX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX(uint32_t x, uint32_t y)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y << 16) >> 16))));
+    }
 
-  /*
-   * @brief C custom defined QSAX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+    /*
+     * @brief C custom defined QADD for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE int32_t __QADD(int32_t x, int32_t y)
+    {
+        return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
+    }
 
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+    /*
+     * @brief C custom defined QSUB for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE int32_t __QSUB(int32_t x, int32_t y)
+    {
+        return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
+    }
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+    /*
+     * @brief C custom defined SMLAD for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMLAD(uint32_t x, uint32_t y, uint32_t sum)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y) >> 16)) + (((q31_t)sum))));
+    }
 
+    /*
+     * @brief C custom defined SMLADX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX(uint32_t x, uint32_t y, uint32_t sum)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y << 16) >> 16)) + (((q31_t)sum))));
+    }
 
-  /*
-   * @brief C custom defined SHSAX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
+    /*
+     * @brief C custom defined SMLSDX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX(uint32_t x, uint32_t y, uint32_t sum)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y) >> 16)) -
+                           ((((q31_t)x) >> 16) * (((q31_t)y << 16) >> 16)) + (((q31_t)sum))));
+    }
 
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    /*
+     * @brief C custom defined SMLALD for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD(uint32_t x, uint32_t y, uint64_t sum)
+    {
+        /*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
+        return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y) >> 16)) + (((q63_t)sum))));
+    }
 
-    return ((uint32_t)((s << 16) | (r      )));
-  }
+    /*
+     * @brief C custom defined SMLALDX for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX(uint32_t x, uint32_t y, uint64_t sum)
+    {
+        /*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
+        return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y << 16) >> 16)) + (((q63_t)sum))));
+    }
 
+    /*
+     * @brief C custom defined SMUAD for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD(uint32_t x, uint32_t y)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                           ((((q31_t)x) >> 16) * (((q31_t)y) >> 16))));
+    }
 
-  /*
-   * @brief C custom defined SMUSDX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
+    /*
+     * @brief C custom defined SMUSD for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD(uint32_t x, uint32_t y)
+    {
+        return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
+                           ((((q31_t)x) >> 16) * (((q31_t)y) >> 16))));
+    }
 
-  /*
-   * @brief C custom defined SMUADX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
+    /*
+     * @brief C custom defined SXTB16 for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16(uint32_t x)
+    {
+        return (
+            (uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000)));
+    }
 
-
-  /*
-   * @brief C custom defined QADD for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE int32_t __QADD(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE int32_t __QSUB(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined SMLAD for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLAD(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLADX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLSDX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALD for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALDX for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUAD for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUSD for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SXTB16 for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16(
-  uint32_t x)
-  {
-    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
-                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));
-  }
-
-  /*
-   * @brief C custom defined SMMLA for M3 and M0 processors
-   */
-  CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA(
-  int32_t x,
-  int32_t y,
-  int32_t sum)
-  {
-    return (sum + (int32_t) (((int64_t) x * y) >> 32));
-  }
+    /*
+     * @brief C custom defined SMMLA for M3 and M0 processors
+     */
+    CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA(int32_t x, int32_t y, int32_t sum)
+    {
+        return (sum + (int32_t)(((int64_t)x * y) >> 32));
+    }
 
 #endif /* !defined (ARM_MATH_DSP) */
 
-
-  /**
-   * @brief Instance structure for the Q7 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;        /**< number of filter coefficients in the filter. */
-    q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q7;
-
-  /**
-   * @brief Instance structure for the Q15 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of filter coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q7 FIR filter.
-   * @param[in]  S          points to an instance of the Q7 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed.
-   */
-  void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR filter.
-   * @param[in]  S          points to an instance of the Q15 FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
-   * <code>numTaps</code> is not a supported value.
-   */
-  arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR filter.
-   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR filter.
-   * @param[in]  S          points to an instance of the floating-point FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q15;
-
-  /**
-   * @brief Instance structure for the Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q31;
-
-  /**
-   * @brief Instance structure for the floating-point Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_casd_df1_inst_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 Biquad cascade filter.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift);
-
-
-  /**
-   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 Biquad cascade filter
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift);
-
-
-  /**
-   * @brief Processing function for the floating-point Biquad cascade filter.
-   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float32_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f32;
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float64_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f64;
-
-  /**
-   * @brief Instance structure for the Q15 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q15_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q31_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q31;
-
-
-  /**
-   * @brief Floating-point matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix addition.
-   * @param[in]   pSrcA  points to the first input matrix structure
-   * @param[in]   pSrcB  points to the second input matrix structure
-   * @param[out]  pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15, complex,  matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Q31, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix multiplication
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-
-  /**
-   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-
-  /**
-   * @brief Q31 matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix scaling.
-   * @param[in]  pSrc   points to the input matrix
-   * @param[in]  scale  scale factor
-   * @param[out] pDst   points to the output matrix
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief  Q31 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData);
-
-
-  /**
-   * @brief  Q15 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData);
-
-
-  /**
-   * @brief  Floating-point matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 PID Control.
-   */
-  typedef struct
-  {
-    q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
-#if !defined (ARM_MATH_DSP)
-    q15_t A1;
-    q15_t A2;
-#else
-    q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
-    q15_t state[3];     /**< The state array of length 3. */
-    q15_t Kp;           /**< The proportional gain. */
-    q15_t Ki;           /**< The integral gain. */
-    q15_t Kd;           /**< The derivative gain. */
-  } arm_pid_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 PID Control.
-   */
-  typedef struct
-  {
-    q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
-    q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
-    q31_t A2;            /**< The derived gain, A2 = Kd . */
-    q31_t state[3];      /**< The state array of length 3. */
-    q31_t Kp;            /**< The proportional gain. */
-    q31_t Ki;            /**< The integral gain. */
-    q31_t Kd;            /**< The derivative gain. */
-  } arm_pid_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point PID Control.
-   */
-  typedef struct
-  {
-    float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
-    float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
-    float32_t A2;          /**< The derived gain, A2 = Kd . */
-    float32_t state[3];    /**< The state array of length 3. */
-    float32_t Kp;          /**< The proportional gain. */
-    float32_t Ki;          /**< The integral gain. */
-    float32_t Kd;          /**< The derivative gain. */
-  } arm_pid_instance_f32;
-
-
-
-  /**
-   * @brief  Initialization function for the floating-point PID Control.
-   * @param[in,out] S               points to an instance of the PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the floating-point PID Control.
-   * @param[in,out] S  is an instance of the floating-point PID Control structure
-   */
-  void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q31 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q31 PID Control.
-   * @param[in,out] S   points to an instance of the Q31 PID Control structure
-   */
-
-  void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q15 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q15 PID Control.
-   * @param[in,out] S  points to an instance of the q15 PID Control structure
-   */
-  void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S);
-
-
-  /**
-   * @brief Instance structure for the floating-point Linear Interpolate function.
-   */
-  typedef struct
-  {
-    uint32_t nValues;           /**< nValues */
-    float32_t x1;               /**< x1 */
-    float32_t xSpacing;         /**< xSpacing */
-    float32_t *pYData;          /**< pointer to the table of Y values */
-  } arm_linear_interp_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    float32_t *pData;   /**< points to the data table. */
-  } arm_bilinear_interp_instance_f32;
-
-   /**
-   * @brief Instance structure for the Q31 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q31_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q31;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q15_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q15;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q7_t *pData;        /**< points to the data table. */
-  } arm_bilinear_interp_instance_q7;
-
-
-  /**
-   * @brief Q7 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q31;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q31;
-
-/* Deprecated */
-  void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc);
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix2_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix4_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q15;
-
-void arm_cfft_q15(
-    const arm_cfft_instance_q15 * S,
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q31;
-
-void arm_cfft_q31(
-    const arm_cfft_instance_q31 * S,
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_f32;
-
-  void arm_cfft_f32(
-  const arm_cfft_instance_f32 * S,
-  float32_t * p1,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the Q15 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                      /**< length of the real FFT. */
-    uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
-    q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q15;
-
-  arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst);
-
-  /**
-   * @brief Instance structure for the Q31 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
-    q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q31;
-
-  arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint16_t fftLenBy2;                         /**< length of the complex FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
-    float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
-    arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
-  } arm_rfft_instance_f32;
-
-  arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-typedef struct
-  {
-    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
-    uint16_t fftLenRFFT;             /**< length of the real sequence */
-    float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
-  } arm_rfft_fast_instance_f32 ;
-
-arm_status arm_rfft_fast_init_f32 (
-   arm_rfft_fast_instance_f32 * S,
-   uint16_t fftLen);
-
-void arm_rfft_fast_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut,
-  uint8_t ifftFlag);
-
-  /**
-   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    float32_t normalize;                 /**< normalizing factor. */
-    float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    float32_t *pCosFactor;               /**< points to the cosFactor table. */
-    arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_f32;
-
-
-  /**
-   * @brief  Initialization function for the floating-point DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize);
-
-
-  /**
-   * @brief Processing function for the floating-point DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q31_t normalize;                     /**< normalizing factor. */
-    q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q31_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q31;
-
-
-  /**
-   * @brief  Initialization function for the Q31 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
-   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q31 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q31 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q15_t normalize;                     /**< normalizing factor. */
-    q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q15_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q15;
-
-
-  /**
-   * @brief  Initialization function for the Q15 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q15 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q15 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer);
-
-
-  /**
-   * @brief Floating-point vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a floating-point vector by a scalar.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  scale      scale factor to be applied
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q7 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q15 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q31 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Dot product of floating-point vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result);
-
-
-  /**
-   * @brief Dot product of Q7 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result);
-
-
-  /**
-   * @brief Dot product of Q15 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-
-  /**
-   * @brief Dot product of Q31 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-
-  /**
-   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a floating-point vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q7 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a floating-point vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q7 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q15 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q31 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q15(
-          q15_t * pSrcA,
-          uint32_t srcALen,
-          q15_t * pSrcB,
-          uint32_t srcBLen,
-          q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
+    /**
+     * @brief Instance structure for the Q7 FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps; /**< number of filter coefficients in the filter. */
+        q7_t *pState;     /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q7_t *pCoeffs;    /**< points to the coefficient array. The array is of length numTaps.*/
+    } arm_fir_instance_q7;
 
     /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Partial convolution of floating-point sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q7 sequences
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
-   * @brief Partial convolution of Q7 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
-    float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the floating-point FIR decimator.
-   * @param[in]  S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR decimator.
-   * @param[in,out] S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator.
-   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc  points to the block of input data.
-   * @param[out] pDst  points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   */
-  void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                     /**< upsample factor. */
-    uint16_t phaseLength;          /**< length of each polyphase filter component. */
-    float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
-    float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
-  } arm_fir_interpolate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR interpolator.
-   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR interpolator.
-   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
-  } arm_biquad_cas_df1_32x64_ins_q31;
-
-
-  /**
-   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_stereo_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f64;
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_stereo_df2T_f32(
-  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f64(
-  const arm_biquad_cascade_df2T_instance_f64 * S,
-  float64_t * pSrc,
-  float64_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
-    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_f32;
-
-
-  /**
-   * @brief Initialization function for the Q15 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.   The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] S          points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages  number of filter stages.
- * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
- * @param[in] pState     points to the state buffer.  The array is of length numStages.
- */
-  void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
-    float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
-    float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_f32;
-
-
-  /**
-   * @brief Processing function for the floating-point IIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the floating-point IIR lattice filter.
-   * @param[in] S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 IIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages  number of stages in the filter.
- * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
- * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
- * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
- * @param[in] blockSize  number of samples to process per call.
- */
-  void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the floating-point LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;        /**< step size that controls filter coefficient updates. */
-  } arm_lms_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point LMS filter.
-   * @param[in]  S          points to an instance of the floating-point LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q15;
-
-
-  /**
-   * @brief Initialization function for the Q15 LMS filter.
-   * @param[in] S          points to an instance of the Q15 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to the state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-
-  /**
-   * @brief Processing function for Q15 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 LMS filter.
-   * @param[in] S          points to an instance of the Q31 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;         /**< step size that control filter coefficient updates. */
-    float32_t energy;     /**< saves previous frame energy. */
-    float32_t x0;         /**< saves previous input sample. */
-  } arm_lms_norm_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point normalized LMS filter.
-   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point normalized LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q31_t *recipTable;    /**< points to the reciprocal initial value table. */
-    q31_t energy;         /**< saves previous frame energy. */
-    q31_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the Q15 normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< Number of coefficients in the filter. */
-    q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
-    q15_t energy;         /**< saves previous frame energy. */
-    q15_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q15;
-
-
-  /**
-   * @brief Processing function for Q15 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q15 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Correlation of floating-point sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-   /**
-   * @brief Correlation of Q15 sequences
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q15 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
-  void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
-  void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
- /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Instance structure for the floating-point sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_f32;
-
-  /**
-   * @brief Instance structure for the Q31 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q31;
-
-  /**
-   * @brief Instance structure for the Q15 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q7 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q7;
-
-
-  /**
-   * @brief Processing function for the floating-point sparse FIR filter.
-   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point sparse FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 sparse FIR filter.
-   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q7 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Floating-point sin_cos function.
-   * @param[in]  theta   input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cos output.
-   */
-  void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal);
-
-
-  /**
-   * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cosine output.
-   */
-  void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal);
-
-
-  /**
-   * @brief  Floating-point complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
- /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup PID PID Motor Control
-   *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control
-   * loop mechanism widely used in industrial control systems.
-   * A PID controller is the most commonly used type of feedback controller.
-   *
-   * This set of functions implements (PID) controllers
-   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
-   * of data and each call to the function returns a single processed value.
-   * <code>S</code> points to an instance of the PID control data structure.  <code>in</code>
-   * is the input sample value. The functions return the output value.
-   *
-   * \par Algorithm:
-   * <pre>
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd  </pre>
-   *
-   * \par
-   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   *
-   * \par
-   * \image html PID.gif "Proportional Integral Derivative Controller"
-   *
-   * \par
-   * The PID controller calculates an "error" value as the difference between
-   * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.
-   * The proportional value determines the reaction to the current error,
-   * the integral value determines the reaction based on the sum of recent errors,
-   * and the derivative value determines the reaction based on the rate at which the error has been changing.
-   *
-   * \par Instance Structure
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
-   * A separate instance structure must be defined for each PID Controller.
-   * There are separate instance structure declarations for each of the 3 supported data types.
-   *
-   * \par Reset Functions
-   * There is also an associated reset function for each data type which clears the state array.
-   *
-   * \par Initialization Functions
-   * There is also an associated initialization function for each data type.
-   * The initialization function performs the following operations:
-   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.
-   *
-   * \par
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
-   *
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the fixed-point versions of the PID Controller functions.
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup PID
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point PID Control.
-   * @param[in,out] S   is an instance of the floating-point PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_pid_f32(
-  arm_pid_instance_f32 * S,
-  float32_t in)
-  {
-    float32_t out;
-
-    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
-    out = (S->A0 * in) +
-      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-   * @brief  Process function for the Q31 PID Control.
-   * @param[in,out] S  points to an instance of the Q31 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 64-bit accumulator.
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-   * Thus, if the accumulator result overflows it wraps around rather than clip.
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
-   */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_pid_q31(
-  arm_pid_instance_q31 * S,
-  q31_t in)
-  {
-    q63_t acc;
-    q31_t out;
-
-    /* acc = A0 * x[n]  */
-    acc = (q63_t) S->A0 * in;
-
-    /* acc += A1 * x[n-1] */
-    acc += (q63_t) S->A1 * S->state[0];
-
-    /* acc += A2 * x[n-2]  */
-    acc += (q63_t) S->A2 * S->state[1];
-
-    /* convert output to 1.31 format to add y[n-1] */
-    out = (q31_t) (acc >> 31U);
-
-    /* out += y[n-1] */
-    out += S->state[2];
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-
-  /**
-   * @brief  Process function for the Q15 PID Control.
-   * @param[in,out] S   points to an instance of the Q15 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using a 64-bit internal accumulator.
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-   * Lastly, the accumulator is saturated to yield a result in 1.15 format.
-   */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_pid_q15(
-  arm_pid_instance_q15 * S,
-  q15_t in)
-  {
-    q63_t acc;
-    q15_t out;
-
-#if defined (ARM_MATH_DSP)
-    __SIMD32_TYPE *vstate;
-
-    /* Implementation of PID controller */
-
-    /* acc = A0 * x[n]  */
-    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    vstate = __SIMD32_CONST(S->state);
-    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
+     * @brief Instance structure for the Q15 FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps; /**< number of filter coefficients in the filter. */
+        q15_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q15_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps.*/
+    } arm_fir_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps; /**< number of filter coefficients in the filter. */
+        q31_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q31_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+    } arm_fir_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;   /**< number of filter coefficients in the filter. */
+        float32_t *pState;  /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+    } arm_fir_instance_f32;
+
+    /**
+     * @brief Processing function for the Q7 FIR filter.
+     * @param[in]  S          points to an instance of the Q7 FIR filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_q7(const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q7 FIR filter.
+     * @param[in,out] S          points to an instance of the Q7 FIR structure.
+     * @param[in]     numTaps    Number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of samples that are processed.
+     */
+    void arm_fir_init_q7(arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q15 FIR filter.
+     * @param[in]  S          points to an instance of the Q15 FIR structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_q15(const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q15 FIR filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_fast_q15(const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q15 FIR filter.
+     * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+     * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal
+     * to 4.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of samples that are processed at a time.
+     * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
+     * <code>numTaps</code> is not a supported value.
+     */
+    arm_status arm_fir_init_q15(
+        arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 FIR filter.
+     * @param[in]  S          points to an instance of the Q31 FIR filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_q31(const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q31 FIR structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_fast_q31(const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q31 FIR filter.
+     * @param[in,out] S          points to an instance of the Q31 FIR structure.
+     * @param[in]     numTaps    Number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of samples that are processed at a time.
+     */
+    void arm_fir_init_q31(arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the floating-point FIR filter.
+     * @param[in]  S          points to an instance of the floating-point FIR structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_f32(const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point FIR filter.
+     * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
+     * @param[in]     numTaps    Number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of samples that are processed at a time.
+     */
+    void arm_fir_init_f32(
+        arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q15 Biquad cascade filter.
+     */
+    typedef struct
+    {
+        int8_t numStages; /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        q15_t *pState;    /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+        q15_t *pCoeffs;   /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+        int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+    } arm_biquad_casd_df1_inst_q15;
+
+    /**
+     * @brief Instance structure for the Q31 Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint32_t numStages; /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        q31_t *pState;      /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+        q31_t *pCoeffs;     /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+        uint8_t postShift;  /**< Additional shift, in bits, applied to each output sample. */
+    } arm_biquad_casd_df1_inst_q31;
+
+    /**
+     * @brief Instance structure for the floating-point Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint32_t numStages; /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        float32_t *pState;  /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+        float32_t *pCoeffs; /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+    } arm_biquad_casd_df1_inst_f32;
+
+    /**
+     * @brief Processing function for the Q15 Biquad cascade filter.
+     * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df1_q15(const arm_biquad_casd_df1_inst_q15 *S,
+                                    q15_t *pSrc,
+                                    q15_t *pDst,
+                                    uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q15 Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+     */
+    void arm_biquad_cascade_df1_init_q15(
+        arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift);
+
+    /**
+     * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df1_fast_q15(const arm_biquad_casd_df1_inst_q15 *S,
+                                         q15_t *pSrc,
+                                         q15_t *pDst,
+                                         uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 Biquad cascade filter
+     * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df1_q31(const arm_biquad_casd_df1_inst_q31 *S,
+                                    q31_t *pSrc,
+                                    q31_t *pDst,
+                                    uint32_t blockSize);
+
+    /**
+     * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df1_fast_q31(const arm_biquad_casd_df1_inst_q31 *S,
+                                         q31_t *pSrc,
+                                         q31_t *pDst,
+                                         uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q31 Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+     */
+    void arm_biquad_cascade_df1_init_q31(
+        arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift);
+
+    /**
+     * @brief Processing function for the floating-point Biquad cascade filter.
+     * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df1_f32(const arm_biquad_casd_df1_inst_f32 *S,
+                                    float32_t *pSrc,
+                                    float32_t *pDst,
+                                    uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     */
+    void arm_biquad_cascade_df1_init_f32(arm_biquad_casd_df1_inst_f32 *S,
+                                         uint8_t numStages,
+                                         float32_t *pCoeffs,
+                                         float32_t *pState);
+
+    /**
+     * @brief Instance structure for the floating-point matrix structure.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows of the matrix.     */
+        uint16_t numCols; /**< number of columns of the matrix.  */
+        float32_t *pData; /**< points to the data of the matrix. */
+    } arm_matrix_instance_f32;
+
+    /**
+     * @brief Instance structure for the floating-point matrix structure.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows of the matrix.     */
+        uint16_t numCols; /**< number of columns of the matrix.  */
+        float64_t *pData; /**< points to the data of the matrix. */
+    } arm_matrix_instance_f64;
+
+    /**
+     * @brief Instance structure for the Q15 matrix structure.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows of the matrix.     */
+        uint16_t numCols; /**< number of columns of the matrix.  */
+        q15_t *pData;     /**< points to the data of the matrix. */
+    } arm_matrix_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 matrix structure.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows of the matrix.     */
+        uint16_t numCols; /**< number of columns of the matrix.  */
+        q31_t *pData;     /**< points to the data of the matrix. */
+    } arm_matrix_instance_q31;
+
+    /**
+     * @brief Floating-point matrix addition.
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_add_f32(const arm_matrix_instance_f32 *pSrcA,
+                               const arm_matrix_instance_f32 *pSrcB,
+                               arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15 matrix addition.
+     * @param[in]   pSrcA  points to the first input matrix structure
+     * @param[in]   pSrcB  points to the second input matrix structure
+     * @param[out]  pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_add_q15(const arm_matrix_instance_q15 *pSrcA,
+                               const arm_matrix_instance_q15 *pSrcB,
+                               arm_matrix_instance_q15 *pDst);
+
+    /**
+     * @brief Q31 matrix addition.
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_add_q31(const arm_matrix_instance_q31 *pSrcA,
+                               const arm_matrix_instance_q31 *pSrcB,
+                               arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Floating-point, complex, matrix multiplication.
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_cmplx_mult_f32(const arm_matrix_instance_f32 *pSrcA,
+                                      const arm_matrix_instance_f32 *pSrcB,
+                                      arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15, complex,  matrix multiplication.
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_cmplx_mult_q15(const arm_matrix_instance_q15 *pSrcA,
+                                      const arm_matrix_instance_q15 *pSrcB,
+                                      arm_matrix_instance_q15 *pDst,
+                                      q15_t *pScratch);
+
+    /**
+     * @brief Q31, complex, matrix multiplication.
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_cmplx_mult_q31(const arm_matrix_instance_q31 *pSrcA,
+                                      const arm_matrix_instance_q31 *pSrcB,
+                                      arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Floating-point matrix transpose.
+     * @param[in]  pSrc  points to the input matrix
+     * @param[out] pDst  points to the output matrix
+     * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+     * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_trans_f32(const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15 matrix transpose.
+     * @param[in]  pSrc  points to the input matrix
+     * @param[out] pDst  points to the output matrix
+     * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+     * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_trans_q15(const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst);
+
+    /**
+     * @brief Q31 matrix transpose.
+     * @param[in]  pSrc  points to the input matrix
+     * @param[out] pDst  points to the output matrix
+     * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+     * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_trans_q31(const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Floating-point matrix multiplication
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_mult_f32(const arm_matrix_instance_f32 *pSrcA,
+                                const arm_matrix_instance_f32 *pSrcB,
+                                arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15 matrix multiplication
+     * @param[in]  pSrcA   points to the first input matrix structure
+     * @param[in]  pSrcB   points to the second input matrix structure
+     * @param[out] pDst    points to output matrix structure
+     * @param[in]  pState  points to the array for storing intermediate results
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_mult_q15(const arm_matrix_instance_q15 *pSrcA,
+                                const arm_matrix_instance_q15 *pSrcB,
+                                arm_matrix_instance_q15 *pDst,
+                                q15_t *pState);
+
+    /**
+     * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA   points to the first input matrix structure
+     * @param[in]  pSrcB   points to the second input matrix structure
+     * @param[out] pDst    points to output matrix structure
+     * @param[in]  pState  points to the array for storing intermediate results
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_mult_fast_q15(const arm_matrix_instance_q15 *pSrcA,
+                                     const arm_matrix_instance_q15 *pSrcB,
+                                     arm_matrix_instance_q15 *pDst,
+                                     q15_t *pState);
+
+    /**
+     * @brief Q31 matrix multiplication
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_mult_q31(const arm_matrix_instance_q31 *pSrcA,
+                                const arm_matrix_instance_q31 *pSrcB,
+                                arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_mult_fast_q31(const arm_matrix_instance_q31 *pSrcA,
+                                     const arm_matrix_instance_q31 *pSrcB,
+                                     arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Floating-point matrix subtraction
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_sub_f32(const arm_matrix_instance_f32 *pSrcA,
+                               const arm_matrix_instance_f32 *pSrcB,
+                               arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15 matrix subtraction
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_sub_q15(const arm_matrix_instance_q15 *pSrcA,
+                               const arm_matrix_instance_q15 *pSrcB,
+                               arm_matrix_instance_q15 *pDst);
+
+    /**
+     * @brief Q31 matrix subtraction
+     * @param[in]  pSrcA  points to the first input matrix structure
+     * @param[in]  pSrcB  points to the second input matrix structure
+     * @param[out] pDst   points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_sub_q31(const arm_matrix_instance_q31 *pSrcA,
+                               const arm_matrix_instance_q31 *pSrcB,
+                               arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief Floating-point matrix scaling.
+     * @param[in]  pSrc   points to the input matrix
+     * @param[in]  scale  scale factor
+     * @param[out] pDst   points to the output matrix
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_scale_f32(const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst);
+
+    /**
+     * @brief Q15 matrix scaling.
+     * @param[in]  pSrc        points to input matrix
+     * @param[in]  scaleFract  fractional portion of the scale factor
+     * @param[in]  shift       number of bits to shift the result by
+     * @param[out] pDst        points to output matrix
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_scale_q15(const arm_matrix_instance_q15 *pSrc,
+                                 q15_t scaleFract,
+                                 int32_t shift,
+                                 arm_matrix_instance_q15 *pDst);
+
+    /**
+     * @brief Q31 matrix scaling.
+     * @param[in]  pSrc        points to input matrix
+     * @param[in]  scaleFract  fractional portion of the scale factor
+     * @param[in]  shift       number of bits to shift the result by
+     * @param[out] pDst        points to output matrix structure
+     * @return     The function returns either
+     * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+     */
+    arm_status arm_mat_scale_q31(const arm_matrix_instance_q31 *pSrc,
+                                 q31_t scaleFract,
+                                 int32_t shift,
+                                 arm_matrix_instance_q31 *pDst);
+
+    /**
+     * @brief  Q31 matrix initialization.
+     * @param[in,out] S         points to an instance of the floating-point matrix structure.
+     * @param[in]     nRows     number of rows in the matrix.
+     * @param[in]     nColumns  number of columns in the matrix.
+     * @param[in]     pData     points to the matrix data array.
+     */
+    void arm_mat_init_q31(arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData);
+
+    /**
+     * @brief  Q15 matrix initialization.
+     * @param[in,out] S         points to an instance of the floating-point matrix structure.
+     * @param[in]     nRows     number of rows in the matrix.
+     * @param[in]     nColumns  number of columns in the matrix.
+     * @param[in]     pData     points to the matrix data array.
+     */
+    void arm_mat_init_q15(arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData);
+
+    /**
+     * @brief  Floating-point matrix initialization.
+     * @param[in,out] S         points to an instance of the floating-point matrix structure.
+     * @param[in]     nRows     number of rows in the matrix.
+     * @param[in]     nColumns  number of columns in the matrix.
+     * @param[in]     pData     points to the matrix data array.
+     */
+    void arm_mat_init_f32(arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData);
+
+    /**
+     * @brief Instance structure for the Q15 PID Control.
+     */
+    typedef struct
+    {
+        q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+#if !defined(ARM_MATH_DSP)
+        q15_t A1;
+        q15_t A2;
+#else
+    q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+#endif
+        q15_t state[3]; /**< The state array of length 3. */
+        q15_t Kp;       /**< The proportional gain. */
+        q15_t Ki;       /**< The integral gain. */
+        q15_t Kd;       /**< The derivative gain. */
+    } arm_pid_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 PID Control.
+     */
+    typedef struct
+    {
+        q31_t A0;       /**< The derived gain, A0 = Kp + Ki + Kd . */
+        q31_t A1;       /**< The derived gain, A1 = -Kp - 2Kd. */
+        q31_t A2;       /**< The derived gain, A2 = Kd . */
+        q31_t state[3]; /**< The state array of length 3. */
+        q31_t Kp;       /**< The proportional gain. */
+        q31_t Ki;       /**< The integral gain. */
+        q31_t Kd;       /**< The derivative gain. */
+    } arm_pid_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point PID Control.
+     */
+    typedef struct
+    {
+        float32_t A0;       /**< The derived gain, A0 = Kp + Ki + Kd . */
+        float32_t A1;       /**< The derived gain, A1 = -Kp - 2Kd. */
+        float32_t A2;       /**< The derived gain, A2 = Kd . */
+        float32_t state[3]; /**< The state array of length 3. */
+        float32_t Kp;       /**< The proportional gain. */
+        float32_t Ki;       /**< The integral gain. */
+        float32_t Kd;       /**< The derivative gain. */
+    } arm_pid_instance_f32;
+
+    /**
+     * @brief  Initialization function for the floating-point PID Control.
+     * @param[in,out] S               points to an instance of the PID structure.
+     * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+     */
+    void arm_pid_init_f32(arm_pid_instance_f32 *S, int32_t resetStateFlag);
+
+    /**
+     * @brief  Reset function for the floating-point PID Control.
+     * @param[in,out] S  is an instance of the floating-point PID Control structure
+     */
+    void arm_pid_reset_f32(arm_pid_instance_f32 *S);
+
+    /**
+     * @brief  Initialization function for the Q31 PID Control.
+     * @param[in,out] S               points to an instance of the Q15 PID structure.
+     * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+     */
+    void arm_pid_init_q31(arm_pid_instance_q31 *S, int32_t resetStateFlag);
+
+    /**
+     * @brief  Reset function for the Q31 PID Control.
+     * @param[in,out] S   points to an instance of the Q31 PID Control structure
+     */
+
+    void arm_pid_reset_q31(arm_pid_instance_q31 *S);
+
+    /**
+     * @brief  Initialization function for the Q15 PID Control.
+     * @param[in,out] S               points to an instance of the Q15 PID structure.
+     * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+     */
+    void arm_pid_init_q15(arm_pid_instance_q15 *S, int32_t resetStateFlag);
+
+    /**
+     * @brief  Reset function for the Q15 PID Control.
+     * @param[in,out] S  points to an instance of the q15 PID Control structure
+     */
+    void arm_pid_reset_q15(arm_pid_instance_q15 *S);
+
+    /**
+     * @brief Instance structure for the floating-point Linear Interpolate function.
+     */
+    typedef struct
+    {
+        uint32_t nValues;   /**< nValues */
+        float32_t x1;       /**< x1 */
+        float32_t xSpacing; /**< xSpacing */
+        float32_t *pYData;  /**< pointer to the table of Y values */
+    } arm_linear_interp_instance_f32;
+
+    /**
+     * @brief Instance structure for the floating-point bilinear interpolation function.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows in the data table. */
+        uint16_t numCols; /**< number of columns in the data table. */
+        float32_t *pData; /**< points to the data table. */
+    } arm_bilinear_interp_instance_f32;
+
+    /**
+     * @brief Instance structure for the Q31 bilinear interpolation function.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows in the data table. */
+        uint16_t numCols; /**< number of columns in the data table. */
+        q31_t *pData;     /**< points to the data table. */
+    } arm_bilinear_interp_instance_q31;
+
+    /**
+     * @brief Instance structure for the Q15 bilinear interpolation function.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows in the data table. */
+        uint16_t numCols; /**< number of columns in the data table. */
+        q15_t *pData;     /**< points to the data table. */
+    } arm_bilinear_interp_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q15 bilinear interpolation function.
+     */
+    typedef struct
+    {
+        uint16_t numRows; /**< number of rows in the data table. */
+        uint16_t numCols; /**< number of columns in the data table. */
+        q7_t *pData;      /**< points to the data table. */
+    } arm_bilinear_interp_instance_q7;
+
+    /**
+     * @brief Q7 vector multiplication.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_mult_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q15 vector multiplication.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_mult_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q31 vector multiplication.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_mult_q31(q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Floating-point vector multiplication.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_mult_f32(float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q15 CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        q15_t *pTwiddle;        /**< points to the Sin twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+    } arm_cfft_radix2_instance_q15;
+
+    /* Deprecated */
+    arm_status arm_cfft_radix2_init_q15(arm_cfft_radix2_instance_q15 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /* Deprecated */
+    void arm_cfft_radix2_q15(const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc);
+
+    /**
+     * @brief Instance structure for the Q15 CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        q15_t *pTwiddle;        /**< points to the twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+    } arm_cfft_radix4_instance_q15;
+
+    /* Deprecated */
+    arm_status arm_cfft_radix4_init_q15(arm_cfft_radix4_instance_q15 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /* Deprecated */
+    void arm_cfft_radix4_q15(const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc);
+
+    /**
+     * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        q31_t *pTwiddle;        /**< points to the Twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+    } arm_cfft_radix2_instance_q31;
+
+    /* Deprecated */
+    arm_status arm_cfft_radix2_init_q31(arm_cfft_radix2_instance_q31 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /* Deprecated */
+    void arm_cfft_radix2_q31(const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc);
+
+    /**
+     * @brief Instance structure for the Q31 CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        q31_t *pTwiddle;        /**< points to the twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+    } arm_cfft_radix4_instance_q31;
+
+    /* Deprecated */
+    void arm_cfft_radix4_q31(const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc);
+
+    /* Deprecated */
+    arm_status arm_cfft_radix4_init_q31(arm_cfft_radix4_instance_q31 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /**
+     * @brief Instance structure for the floating-point CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        float32_t *pTwiddle;    /**< points to the Twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+        float32_t onebyfftLen; /**< value of 1/fftLen. */
+    } arm_cfft_radix2_instance_f32;
+
+    /* Deprecated */
+    arm_status arm_cfft_radix2_init_f32(arm_cfft_radix2_instance_f32 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /* Deprecated */
+    void arm_cfft_radix2_f32(const arm_cfft_radix2_instance_f32 *S, float32_t *pSrc);
+
+    /**
+     * @brief Instance structure for the floating-point CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;        /**< length of the FFT. */
+        uint8_t ifftFlag;       /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+        uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of
+                                   output. */
+        float32_t *pTwiddle;    /**< points to the Twiddle factor table. */
+        uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                      twiddle factor table. */
+        uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal
+                                  table. */
+        float32_t onebyfftLen; /**< value of 1/fftLen. */
+    } arm_cfft_radix4_instance_f32;
+
+    /* Deprecated */
+    arm_status arm_cfft_radix4_init_f32(arm_cfft_radix4_instance_f32 *S,
+                                        uint16_t fftLen,
+                                        uint8_t ifftFlag,
+                                        uint8_t bitReverseFlag);
+
+    /* Deprecated */
+    void arm_cfft_radix4_f32(const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc);
+
+    /**
+     * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;              /**< length of the FFT. */
+        const q15_t *pTwiddle;        /**< points to the Twiddle factor table. */
+        const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t bitRevLength;        /**< bit reversal table length. */
+    } arm_cfft_instance_q15;
+
+    void arm_cfft_q15(const arm_cfft_instance_q15 *S, q15_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag);
+
+    /**
+     * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;              /**< length of the FFT. */
+        const q31_t *pTwiddle;        /**< points to the Twiddle factor table. */
+        const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t bitRevLength;        /**< bit reversal table length. */
+    } arm_cfft_instance_q31;
+
+    void arm_cfft_q31(const arm_cfft_instance_q31 *S, q31_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag);
+
+    /**
+     * @brief Instance structure for the floating-point CFFT/CIFFT function.
+     */
+    typedef struct
+    {
+        uint16_t fftLen;              /**< length of the FFT. */
+        const float32_t *pTwiddle;    /**< points to the Twiddle factor table. */
+        const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+        uint16_t bitRevLength;        /**< bit reversal table length. */
+    } arm_cfft_instance_f32;
+
+    void arm_cfft_f32(const arm_cfft_instance_f32 *S, float32_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag);
+
+    /**
+     * @brief Instance structure for the Q15 RFFT/RIFFT function.
+     */
+    typedef struct
+    {
+        uint32_t fftLenReal;     /**< length of the real FFT. */
+        uint8_t ifftFlagR;       /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+        uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal
+                                    of output. */
+        uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                       twiddle factor table. */
+        q15_t *pTwiddleAReal;       /**< points to the real twiddle factor table. */
+        q15_t *pTwiddleBReal;       /**< points to the imag twiddle factor table. */
+        const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+    } arm_rfft_instance_q15;
+
+    arm_status arm_rfft_init_q15(arm_rfft_instance_q15 *S,
+                                 uint32_t fftLenReal,
+                                 uint32_t ifftFlagR,
+                                 uint32_t bitReverseFlag);
+
+    void arm_rfft_q15(const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst);
+
+    /**
+     * @brief Instance structure for the Q31 RFFT/RIFFT function.
+     */
+    typedef struct
+    {
+        uint32_t fftLenReal;     /**< length of the real FFT. */
+        uint8_t ifftFlagR;       /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+        uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal
+                                    of output. */
+        uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                       twiddle factor table. */
+        q31_t *pTwiddleAReal;       /**< points to the real twiddle factor table. */
+        q31_t *pTwiddleBReal;       /**< points to the imag twiddle factor table. */
+        const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+    } arm_rfft_instance_q31;
+
+    arm_status arm_rfft_init_q31(arm_rfft_instance_q31 *S,
+                                 uint32_t fftLenReal,
+                                 uint32_t ifftFlagR,
+                                 uint32_t bitReverseFlag);
+
+    void arm_rfft_q31(const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst);
+
+    /**
+     * @brief Instance structure for the floating-point RFFT/RIFFT function.
+     */
+    typedef struct
+    {
+        uint32_t fftLenReal;     /**< length of the real FFT. */
+        uint16_t fftLenBy2;      /**< length of the complex FFT. */
+        uint8_t ifftFlagR;       /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+        uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal
+                                    of output. */
+        uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same
+                                       twiddle factor table. */
+        float32_t *pTwiddleAReal;   /**< points to the real twiddle factor table. */
+        float32_t *pTwiddleBReal;   /**< points to the imag twiddle factor table. */
+        arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+    } arm_rfft_instance_f32;
+
+    arm_status arm_rfft_init_f32(arm_rfft_instance_f32 *S,
+                                 arm_cfft_radix4_instance_f32 *S_CFFT,
+                                 uint32_t fftLenReal,
+                                 uint32_t ifftFlagR,
+                                 uint32_t bitReverseFlag);
+
+    void arm_rfft_f32(const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst);
+
+    /**
+     * @brief Instance structure for the floating-point RFFT/RIFFT function.
+     */
+    typedef struct
+    {
+        arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
+        uint16_t fftLenRFFT;        /**< length of the real sequence */
+        float32_t *pTwiddleRFFT;    /**< Twiddle factors real stage  */
+    } arm_rfft_fast_instance_f32;
+
+    arm_status arm_rfft_fast_init_f32(arm_rfft_fast_instance_f32 *S, uint16_t fftLen);
+
+    void arm_rfft_fast_f32(arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut, uint8_t ifftFlag);
+
+    /**
+     * @brief Instance structure for the floating-point DCT4/IDCT4 function.
+     */
+    typedef struct
+    {
+        uint16_t N;                          /**< length of the DCT4. */
+        uint16_t Nby2;                       /**< half of the length of the DCT4. */
+        float32_t normalize;                 /**< normalizing factor. */
+        float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
+        float32_t *pCosFactor;               /**< points to the cosFactor table. */
+        arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
+        arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+    } arm_dct4_instance_f32;
+
+    /**
+     * @brief  Initialization function for the floating-point DCT4/IDCT4.
+     * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
+     * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
+     * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
+     * @param[in]     N          length of the DCT4.
+     * @param[in]     Nby2       half of the length of the DCT4.
+     * @param[in]     normalize  normalizing factor.
+     * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or
+     * ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+     */
+    arm_status arm_dct4_init_f32(arm_dct4_instance_f32 *S,
+                                 arm_rfft_instance_f32 *S_RFFT,
+                                 arm_cfft_radix4_instance_f32 *S_CFFT,
+                                 uint16_t N,
+                                 uint16_t Nby2,
+                                 float32_t normalize);
+
+    /**
+     * @brief Processing function for the floating-point DCT4/IDCT4.
+     * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
+     * @param[in]     pState         points to state buffer.
+     * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+     */
+    void arm_dct4_f32(const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer);
+
+    /**
+     * @brief Instance structure for the Q31 DCT4/IDCT4 function.
+     */
+    typedef struct
+    {
+        uint16_t N;                          /**< length of the DCT4. */
+        uint16_t Nby2;                       /**< half of the length of the DCT4. */
+        q31_t normalize;                     /**< normalizing factor. */
+        q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
+        q31_t *pCosFactor;                   /**< points to the cosFactor table. */
+        arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
+        arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+    } arm_dct4_instance_q31;
+
+    /**
+     * @brief  Initialization function for the Q31 DCT4/IDCT4.
+     * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+     * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+     * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+     * @param[in]     N          length of the DCT4.
+     * @param[in]     Nby2       half of the length of the DCT4.
+     * @param[in]     normalize  normalizing factor.
+     * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or
+     * ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+     */
+    arm_status arm_dct4_init_q31(arm_dct4_instance_q31 *S,
+                                 arm_rfft_instance_q31 *S_RFFT,
+                                 arm_cfft_radix4_instance_q31 *S_CFFT,
+                                 uint16_t N,
+                                 uint16_t Nby2,
+                                 q31_t normalize);
+
+    /**
+     * @brief Processing function for the Q31 DCT4/IDCT4.
+     * @param[in]     S              points to an instance of the Q31 DCT4 structure.
+     * @param[in]     pState         points to state buffer.
+     * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+     */
+    void arm_dct4_q31(const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer);
+
+    /**
+     * @brief Instance structure for the Q15 DCT4/IDCT4 function.
+     */
+    typedef struct
+    {
+        uint16_t N;                          /**< length of the DCT4. */
+        uint16_t Nby2;                       /**< half of the length of the DCT4. */
+        q15_t normalize;                     /**< normalizing factor. */
+        q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
+        q15_t *pCosFactor;                   /**< points to the cosFactor table. */
+        arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
+        arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+    } arm_dct4_instance_q15;
+
+    /**
+     * @brief  Initialization function for the Q15 DCT4/IDCT4.
+     * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
+     * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
+     * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
+     * @param[in]     N          length of the DCT4.
+     * @param[in]     Nby2       half of the length of the DCT4.
+     * @param[in]     normalize  normalizing factor.
+     * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or
+     * ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+     */
+    arm_status arm_dct4_init_q15(arm_dct4_instance_q15 *S,
+                                 arm_rfft_instance_q15 *S_RFFT,
+                                 arm_cfft_radix4_instance_q15 *S_CFFT,
+                                 uint16_t N,
+                                 uint16_t Nby2,
+                                 q15_t normalize);
+
+    /**
+     * @brief Processing function for the Q15 DCT4/IDCT4.
+     * @param[in]     S              points to an instance of the Q15 DCT4 structure.
+     * @param[in]     pState         points to state buffer.
+     * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+     */
+    void arm_dct4_q15(const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer);
+
+    /**
+     * @brief Floating-point vector addition.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_add_f32(float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q7 vector addition.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_add_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q15 vector addition.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_add_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q31 vector addition.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_add_q31(q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Floating-point vector subtraction.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_sub_f32(float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q7 vector subtraction.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_sub_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q15 vector subtraction.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_sub_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q31 vector subtraction.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_sub_q31(q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Multiplies a floating-point vector by a scalar.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  scale      scale factor to be applied
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_scale_f32(float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Multiplies a Q7 vector by a scalar.
+     * @param[in]  pSrc        points to the input vector
+     * @param[in]  scaleFract  fractional portion of the scale value
+     * @param[in]  shift       number of bits to shift the result by
+     * @param[out] pDst        points to the output vector
+     * @param[in]  blockSize   number of samples in the vector
+     */
+    void arm_scale_q7(q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Multiplies a Q15 vector by a scalar.
+     * @param[in]  pSrc        points to the input vector
+     * @param[in]  scaleFract  fractional portion of the scale value
+     * @param[in]  shift       number of bits to shift the result by
+     * @param[out] pDst        points to the output vector
+     * @param[in]  blockSize   number of samples in the vector
+     */
+    void arm_scale_q15(q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Multiplies a Q31 vector by a scalar.
+     * @param[in]  pSrc        points to the input vector
+     * @param[in]  scaleFract  fractional portion of the scale value
+     * @param[in]  shift       number of bits to shift the result by
+     * @param[out] pDst        points to the output vector
+     * @param[in]  blockSize   number of samples in the vector
+     */
+    void arm_scale_q31(q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q7 vector absolute value.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[out] pDst       points to the output buffer
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_abs_q7(q7_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Floating-point vector absolute value.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[out] pDst       points to the output buffer
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_abs_f32(float32_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q15 vector absolute value.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[out] pDst       points to the output buffer
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_abs_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Q31 vector absolute value.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[out] pDst       points to the output buffer
+     * @param[in]  blockSize  number of samples in each vector
+     */
+    void arm_abs_q31(q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Dot product of floating-point vectors.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[in]  blockSize  number of samples in each vector
+     * @param[out] result     output result returned here
+     */
+    void arm_dot_prod_f32(float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result);
+
+    /**
+     * @brief Dot product of Q7 vectors.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[in]  blockSize  number of samples in each vector
+     * @param[out] result     output result returned here
+     */
+    void arm_dot_prod_q7(q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result);
+
+    /**
+     * @brief Dot product of Q15 vectors.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[in]  blockSize  number of samples in each vector
+     * @param[out] result     output result returned here
+     */
+    void arm_dot_prod_q15(q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result);
+
+    /**
+     * @brief Dot product of Q31 vectors.
+     * @param[in]  pSrcA      points to the first input vector
+     * @param[in]  pSrcB      points to the second input vector
+     * @param[in]  blockSize  number of samples in each vector
+     * @param[out] result     output result returned here
+     */
+    void arm_dot_prod_q31(q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result);
+
+    /**
+     * @brief  Shifts the elements of a Q7 vector a specified number of bits.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_shift_q7(q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Shifts the elements of a Q15 vector a specified number of bits.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_shift_q15(q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Shifts the elements of a Q31 vector a specified number of bits.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_shift_q31(q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Adds a constant offset to a floating-point vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  offset     is the offset to be added
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_offset_f32(float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Adds a constant offset to a Q7 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  offset     is the offset to be added
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_offset_q7(q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Adds a constant offset to a Q15 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  offset     is the offset to be added
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_offset_q15(q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Adds a constant offset to a Q31 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[in]  offset     is the offset to be added
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_offset_q31(q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Negates the elements of a floating-point vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_negate_f32(float32_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Negates the elements of a Q7 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_negate_q7(q7_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Negates the elements of a Q15 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_negate_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Negates the elements of a Q31 vector.
+     * @param[in]  pSrc       points to the input vector
+     * @param[out] pDst       points to the output vector
+     * @param[in]  blockSize  number of samples in the vector
+     */
+    void arm_negate_q31(q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Copies the elements of a floating-point vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_copy_f32(float32_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Copies the elements of a Q7 vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_copy_q7(q7_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Copies the elements of a Q15 vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_copy_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Copies the elements of a Q31 vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_copy_q31(q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Fills a constant value into a floating-point vector.
+     * @param[in]  value      input value to be filled
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_fill_f32(float32_t value, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Fills a constant value into a Q7 vector.
+     * @param[in]  value      input value to be filled
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_fill_q7(q7_t value, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Fills a constant value into a Q15 vector.
+     * @param[in]  value      input value to be filled
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_fill_q15(q15_t value, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Fills a constant value into a Q31 vector.
+     * @param[in]  value      input value to be filled
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_fill_q31(q31_t value, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Convolution of floating-point sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_f32(float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst);
+
+    /**
+     * @brief Convolution of Q15 sequences.
+     * @param[in]  pSrcA      points to the first input sequence.
+     * @param[in]  srcALen    length of the first input sequence.
+     * @param[in]  pSrcB      points to the second input sequence.
+     * @param[in]  srcBLen    length of the second input sequence.
+     * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+     * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+     */
+    void arm_conv_opt_q15(q15_t *pSrcA,
+                          uint32_t srcALen,
+                          q15_t *pSrcB,
+                          uint32_t srcBLen,
+                          q15_t *pDst,
+                          q15_t *pScratch1,
+                          q15_t *pScratch2);
+
+    /**
+     * @brief Convolution of Q15 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_q15(q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst);
+
+    /**
+     * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_fast_q15(q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst);
+
+    /**
+     * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA      points to the first input sequence.
+     * @param[in]  srcALen    length of the first input sequence.
+     * @param[in]  pSrcB      points to the second input sequence.
+     * @param[in]  srcBLen    length of the second input sequence.
+     * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+     * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+     */
+    void arm_conv_fast_opt_q15(q15_t *pSrcA,
+                               uint32_t srcALen,
+                               q15_t *pSrcB,
+                               uint32_t srcBLen,
+                               q15_t *pDst,
+                               q15_t *pScratch1,
+                               q15_t *pScratch2);
+
+    /**
+     * @brief Convolution of Q31 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_q31(q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst);
+
+    /**
+     * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_fast_q31(q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst);
+
+    /**
+     * @brief Convolution of Q7 sequences.
+     * @param[in]  pSrcA      points to the first input sequence.
+     * @param[in]  srcALen    length of the first input sequence.
+     * @param[in]  pSrcB      points to the second input sequence.
+     * @param[in]  srcBLen    length of the second input sequence.
+     * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+     * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen,
+     * srcBLen) - 2.
+     * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+     */
+    void arm_conv_opt_q7(
+        q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2);
+
+    /**
+     * @brief Convolution of Q7 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+     */
+    void arm_conv_q7(q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst);
+
+    /**
+     * @brief Partial convolution of floating-point sequences.
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_f32(float32_t *pSrcA,
+                                    uint32_t srcALen,
+                                    float32_t *pSrcB,
+                                    uint32_t srcBLen,
+                                    float32_t *pDst,
+                                    uint32_t firstIndex,
+                                    uint32_t numPoints);
+
+    /**
+     * @brief Partial convolution of Q15 sequences.
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_opt_q15(q15_t *pSrcA,
+                                        uint32_t srcALen,
+                                        q15_t *pSrcB,
+                                        uint32_t srcBLen,
+                                        q15_t *pDst,
+                                        uint32_t firstIndex,
+                                        uint32_t numPoints,
+                                        q15_t *pScratch1,
+                                        q15_t *pScratch2);
+
+    /**
+     * @brief Partial convolution of Q15 sequences.
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_q15(q15_t *pSrcA,
+                                    uint32_t srcALen,
+                                    q15_t *pSrcB,
+                                    uint32_t srcBLen,
+                                    q15_t *pDst,
+                                    uint32_t firstIndex,
+                                    uint32_t numPoints);
+
+    /**
+     * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_fast_q15(q15_t *pSrcA,
+                                         uint32_t srcALen,
+                                         q15_t *pSrcB,
+                                         uint32_t srcBLen,
+                                         q15_t *pDst,
+                                         uint32_t firstIndex,
+                                         uint32_t numPoints);
+
+    /**
+     * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_fast_opt_q15(q15_t *pSrcA,
+                                             uint32_t srcALen,
+                                             q15_t *pSrcB,
+                                             uint32_t srcBLen,
+                                             q15_t *pDst,
+                                             uint32_t firstIndex,
+                                             uint32_t numPoints,
+                                             q15_t *pScratch1,
+                                             q15_t *pScratch2);
+
+    /**
+     * @brief Partial convolution of Q31 sequences.
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_q31(q31_t *pSrcA,
+                                    uint32_t srcALen,
+                                    q31_t *pSrcB,
+                                    uint32_t srcBLen,
+                                    q31_t *pDst,
+                                    uint32_t firstIndex,
+                                    uint32_t numPoints);
+
+    /**
+     * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_fast_q31(q31_t *pSrcA,
+                                         uint32_t srcALen,
+                                         q31_t *pSrcB,
+                                         uint32_t srcBLen,
+                                         q31_t *pDst,
+                                         uint32_t firstIndex,
+                                         uint32_t numPoints);
+
+    /**
+     * @brief Partial convolution of Q7 sequences
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen,
+     * srcBLen) - 2.
+     * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_opt_q7(q7_t *pSrcA,
+                                       uint32_t srcALen,
+                                       q7_t *pSrcB,
+                                       uint32_t srcBLen,
+                                       q7_t *pDst,
+                                       uint32_t firstIndex,
+                                       uint32_t numPoints,
+                                       q15_t *pScratch1,
+                                       q15_t *pScratch2);
+
+    /**
+     * @brief Partial convolution of Q7 sequences.
+     * @param[in]  pSrcA       points to the first input sequence.
+     * @param[in]  srcALen     length of the first input sequence.
+     * @param[in]  pSrcB       points to the second input sequence.
+     * @param[in]  srcBLen     length of the second input sequence.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  firstIndex  is the first output sample to start with.
+     * @param[in]  numPoints   is the number of output points to be computed.
+     * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the
+     * requested subset is not in the range [0 srcALen+srcBLen-2].
+     */
+    arm_status arm_conv_partial_q7(q7_t *pSrcA,
+                                   uint32_t srcALen,
+                                   q7_t *pSrcB,
+                                   uint32_t srcBLen,
+                                   q7_t *pDst,
+                                   uint32_t firstIndex,
+                                   uint32_t numPoints);
+
+    /**
+     * @brief Instance structure for the Q15 FIR decimator.
+     */
+    typedef struct
+    {
+        uint8_t M;        /**< decimation factor. */
+        uint16_t numTaps; /**< number of coefficients in the filter. */
+        q15_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps.*/
+        q15_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    } arm_fir_decimate_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 FIR decimator.
+     */
+    typedef struct
+    {
+        uint8_t M;        /**< decimation factor. */
+        uint16_t numTaps; /**< number of coefficients in the filter. */
+        q31_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps.*/
+        q31_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    } arm_fir_decimate_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point FIR decimator.
+     */
+    typedef struct
+    {
+        uint8_t M;          /**< decimation factor. */
+        uint16_t numTaps;   /**< number of coefficients in the filter. */
+        float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+        float32_t *pState;  /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    } arm_fir_decimate_instance_f32;
+
+    /**
+     * @brief Processing function for the floating-point FIR decimator.
+     * @param[in]  S          points to an instance of the floating-point FIR decimator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_decimate_f32(const arm_fir_decimate_instance_f32 *S,
+                              float32_t *pSrc,
+                              float32_t *pDst,
+                              uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point FIR decimator.
+     * @param[in,out] S          points to an instance of the floating-point FIR decimator structure.
+     * @param[in]     numTaps    number of coefficients in the filter.
+     * @param[in]     M          decimation factor.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * <code>blockSize</code> is not a multiple of <code>M</code>.
+     */
+    arm_status arm_fir_decimate_init_f32(arm_fir_decimate_instance_f32 *S,
+                                         uint16_t numTaps,
+                                         uint8_t M,
+                                         float32_t *pCoeffs,
+                                         float32_t *pState,
+                                         uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q15 FIR decimator.
+     * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_decimate_fast_q15(const arm_fir_decimate_instance_q15 *S,
+                                   q15_t *pSrc,
+                                   q15_t *pDst,
+                                   uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q15 FIR decimator.
+     * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
+     * @param[in]     numTaps    number of coefficients in the filter.
+     * @param[in]     M          decimation factor.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * <code>blockSize</code> is not a multiple of <code>M</code>.
+     */
+    arm_status arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S,
+                                         uint16_t numTaps,
+                                         uint8_t M,
+                                         q15_t *pCoeffs,
+                                         q15_t *pState,
+                                         uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 FIR decimator.
+     * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
+     * @param[in]  pSrc  points to the block of input data.
+     * @param[out] pDst  points to the block of output data
+     * @param[in] blockSize number of input samples to process per call.
+     */
+    void arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+     * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_decimate_fast_q31(arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q31 FIR decimator.
+     * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
+     * @param[in]     numTaps    number of coefficients in the filter.
+     * @param[in]     M          decimation factor.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * <code>blockSize</code> is not a multiple of <code>M</code>.
+     */
+    arm_status arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S,
+                                         uint16_t numTaps,
+                                         uint8_t M,
+                                         q31_t *pCoeffs,
+                                         q31_t *pState,
+                                         uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q15 FIR interpolator.
+     */
+    typedef struct
+    {
+        uint8_t L;            /**< upsample factor. */
+        uint16_t phaseLength; /**< length of each polyphase filter component. */
+        q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+    } arm_fir_interpolate_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 FIR interpolator.
+     */
+    typedef struct
+    {
+        uint8_t L;            /**< upsample factor. */
+        uint16_t phaseLength; /**< length of each polyphase filter component. */
+        q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+    } arm_fir_interpolate_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point FIR interpolator.
+     */
+    typedef struct
+    {
+        uint8_t L;            /**< upsample factor. */
+        uint16_t phaseLength; /**< length of each polyphase filter component. */
+        float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length L*phaseLength. */
+        float32_t *pState;    /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+    } arm_fir_interpolate_instance_f32;
+
+    /**
+     * @brief Processing function for the Q15 FIR interpolator.
+     * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_interpolate_q15(const arm_fir_interpolate_instance_q15 *S,
+                                 q15_t *pSrc,
+                                 q15_t *pDst,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q15 FIR interpolator.
+     * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
+     * @param[in]     L          upsample factor.
+     * @param[in]     numTaps    number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficient buffer.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+     */
+    arm_status arm_fir_interpolate_init_q15(arm_fir_interpolate_instance_q15 *S,
+                                            uint8_t L,
+                                            uint16_t numTaps,
+                                            q15_t *pCoeffs,
+                                            q15_t *pState,
+                                            uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 FIR interpolator.
+     * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_interpolate_q31(const arm_fir_interpolate_instance_q31 *S,
+                                 q31_t *pSrc,
+                                 q31_t *pDst,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q31 FIR interpolator.
+     * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
+     * @param[in]     L          upsample factor.
+     * @param[in]     numTaps    number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficient buffer.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+     */
+    arm_status arm_fir_interpolate_init_q31(arm_fir_interpolate_instance_q31 *S,
+                                            uint8_t L,
+                                            uint16_t numTaps,
+                                            q31_t *pCoeffs,
+                                            q31_t *pState,
+                                            uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the floating-point FIR interpolator.
+     * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of input samples to process per call.
+     */
+    void arm_fir_interpolate_f32(const arm_fir_interpolate_instance_f32 *S,
+                                 float32_t *pSrc,
+                                 float32_t *pDst,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point FIR interpolator.
+     * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
+     * @param[in]     L          upsample factor.
+     * @param[in]     numTaps    number of filter coefficients in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficient buffer.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     blockSize  number of input samples to process per call.
+     * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+     * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+     */
+    arm_status arm_fir_interpolate_init_f32(arm_fir_interpolate_instance_f32 *S,
+                                            uint8_t L,
+                                            uint16_t numTaps,
+                                            float32_t *pCoeffs,
+                                            float32_t *pState,
+                                            uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the high precision Q31 Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint8_t numStages; /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        q63_t *pState;     /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+        q31_t *pCoeffs;    /**< points to the array of coefficients.  The array is of length 5*numStages. */
+        uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
+    } arm_biquad_cas_df1_32x64_ins_q31;
+
+    /**
+     * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cas_df1_32x64_q31(const arm_biquad_cas_df1_32x64_ins_q31 *S,
+                                      q31_t *pSrc,
+                                      q31_t *pDst,
+                                      uint32_t blockSize);
+
+    /**
+     * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
+     */
+    void arm_biquad_cas_df1_32x64_init_q31(
+        arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift);
+
+    /**
+     * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint8_t numStages;  /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        float32_t *pState;  /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+        float32_t *pCoeffs; /**< points to the array of coefficients.  The array is of length 5*numStages. */
+    } arm_biquad_cascade_df2T_instance_f32;
+
+    /**
+     * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint8_t numStages;  /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        float32_t *pState;  /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+        float32_t *pCoeffs; /**< points to the array of coefficients.  The array is of length 5*numStages. */
+    } arm_biquad_cascade_stereo_df2T_instance_f32;
+
+    /**
+     * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+     */
+    typedef struct
+    {
+        uint8_t numStages;  /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+        float64_t *pState;  /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+        float64_t *pCoeffs; /**< points to the array of coefficients.  The array is of length 5*numStages. */
+    } arm_biquad_cascade_df2T_instance_f64;
+
+    /**
+     * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+     * @param[in]  S          points to an instance of the filter data structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df2T_f32(const arm_biquad_cascade_df2T_instance_f32 *S,
+                                     float32_t *pSrc,
+                                     float32_t *pDst,
+                                     uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
+     * @param[in]  S          points to an instance of the filter data structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_stereo_df2T_f32(const arm_biquad_cascade_stereo_df2T_instance_f32 *S,
+                                            float32_t *pSrc,
+                                            float32_t *pDst,
+                                            uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+     * @param[in]  S          points to an instance of the filter data structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_biquad_cascade_df2T_f64(const arm_biquad_cascade_df2T_instance_f64 *S,
+                                     float64_t *pSrc,
+                                     float64_t *pDst,
+                                     uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the filter data structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     */
+    void arm_biquad_cascade_df2T_init_f32(arm_biquad_cascade_df2T_instance_f32 *S,
+                                          uint8_t numStages,
+                                          float32_t *pCoeffs,
+                                          float32_t *pState);
+
+    /**
+     * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the filter data structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     */
+    void arm_biquad_cascade_stereo_df2T_init_f32(arm_biquad_cascade_stereo_df2T_instance_f32 *S,
+                                                 uint8_t numStages,
+                                                 float32_t *pCoeffs,
+                                                 float32_t *pState);
+
+    /**
+     * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+     * @param[in,out] S          points to an instance of the filter data structure.
+     * @param[in]     numStages  number of 2nd order stages in the filter.
+     * @param[in]     pCoeffs    points to the filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     */
+    void arm_biquad_cascade_df2T_init_f64(arm_biquad_cascade_df2T_instance_f64 *S,
+                                          uint8_t numStages,
+                                          float64_t *pCoeffs,
+                                          float64_t *pState);
+
+    /**
+     * @brief Instance structure for the Q15 FIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages; /**< number of filter stages. */
+        q15_t *pState;      /**< points to the state variable array. The array is of length numStages. */
+        q15_t *pCoeffs;     /**< points to the coefficient array. The array is of length numStages. */
+    } arm_fir_lattice_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 FIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages; /**< number of filter stages. */
+        q31_t *pState;      /**< points to the state variable array. The array is of length numStages. */
+        q31_t *pCoeffs;     /**< points to the coefficient array. The array is of length numStages. */
+    } arm_fir_lattice_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point FIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages; /**< number of filter stages. */
+        float32_t *pState;  /**< points to the state variable array. The array is of length numStages. */
+        float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+    } arm_fir_lattice_instance_f32;
+
+    /**
+     * @brief Initialization function for the Q15 FIR lattice filter.
+     * @param[in] S          points to an instance of the Q15 FIR lattice structure.
+     * @param[in] numStages  number of filter stages.
+     * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+     * @param[in] pState     points to the state buffer.  The array is of length numStages.
+     */
+    void arm_fir_lattice_init_q15(arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState);
+
+    /**
+     * @brief Processing function for the Q15 FIR lattice filter.
+     * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_lattice_q15(const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for the Q31 FIR lattice filter.
+     * @param[in] S          points to an instance of the Q31 FIR lattice structure.
+     * @param[in] numStages  number of filter stages.
+     * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+     * @param[in] pState     points to the state buffer.   The array is of length numStages.
+     */
+    void arm_fir_lattice_init_q31(arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState);
+
+    /**
+     * @brief Processing function for the Q31 FIR lattice filter.
+     * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_lattice_q31(const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for the floating-point FIR lattice filter.
+     * @param[in] S          points to an instance of the floating-point FIR lattice structure.
+     * @param[in] numStages  number of filter stages.
+     * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+     * @param[in] pState     points to the state buffer.  The array is of length numStages.
+     */
+    void arm_fir_lattice_init_f32(arm_fir_lattice_instance_f32 *S,
+                                  uint16_t numStages,
+                                  float32_t *pCoeffs,
+                                  float32_t *pState);
+
+    /**
+     * @brief Processing function for the floating-point FIR lattice filter.
+     * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_fir_lattice_f32(const arm_fir_lattice_instance_f32 *S,
+                             float32_t *pSrc,
+                             float32_t *pDst,
+                             uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q15 IIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages; /**< number of stages in the filter. */
+        q15_t *pState;      /**< points to the state variable array. The array is of length numStages+blockSize. */
+        q15_t *pkCoeffs;    /**< points to the reflection coefficient array. The array is of length numStages. */
+        q15_t *pvCoeffs;    /**< points to the ladder coefficient array. The array is of length numStages+1. */
+    } arm_iir_lattice_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q31 IIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages; /**< number of stages in the filter. */
+        q31_t *pState;      /**< points to the state variable array. The array is of length numStages+blockSize. */
+        q31_t *pkCoeffs;    /**< points to the reflection coefficient array. The array is of length numStages. */
+        q31_t *pvCoeffs;    /**< points to the ladder coefficient array. The array is of length numStages+1. */
+    } arm_iir_lattice_instance_q31;
+
+    /**
+     * @brief Instance structure for the floating-point IIR lattice filter.
+     */
+    typedef struct
+    {
+        uint16_t numStages;  /**< number of stages in the filter. */
+        float32_t *pState;   /**< points to the state variable array. The array is of length numStages+blockSize. */
+        float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+        float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
+    } arm_iir_lattice_instance_f32;
+
+    /**
+     * @brief Processing function for the floating-point IIR lattice filter.
+     * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_iir_lattice_f32(const arm_iir_lattice_instance_f32 *S,
+                             float32_t *pSrc,
+                             float32_t *pDst,
+                             uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for the floating-point IIR lattice filter.
+     * @param[in] S          points to an instance of the floating-point IIR lattice structure.
+     * @param[in] numStages  number of stages in the filter.
+     * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+     * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+     * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
+     * @param[in] blockSize  number of samples to process.
+     */
+    void arm_iir_lattice_init_f32(arm_iir_lattice_instance_f32 *S,
+                                  uint16_t numStages,
+                                  float32_t *pkCoeffs,
+                                  float32_t *pvCoeffs,
+                                  float32_t *pState,
+                                  uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 IIR lattice filter.
+     * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_iir_lattice_q31(const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for the Q31 IIR lattice filter.
+     * @param[in] S          points to an instance of the Q31 IIR lattice structure.
+     * @param[in] numStages  number of stages in the filter.
+     * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+     * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+     * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
+     * @param[in] blockSize  number of samples to process.
+     */
+    void arm_iir_lattice_init_q31(arm_iir_lattice_instance_q31 *S,
+                                  uint16_t numStages,
+                                  q31_t *pkCoeffs,
+                                  q31_t *pvCoeffs,
+                                  q31_t *pState,
+                                  uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q15 IIR lattice filter.
+     * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[out] pDst       points to the block of output data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_iir_lattice_q15(const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for the Q15 IIR lattice filter.
+     * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
+     * @param[in] numStages  number of stages in the filter.
+     * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
+     * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
+     * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
+     * @param[in] blockSize  number of samples to process per call.
+     */
+    void arm_iir_lattice_init_q15(arm_iir_lattice_instance_q15 *S,
+                                  uint16_t numStages,
+                                  q15_t *pkCoeffs,
+                                  q15_t *pvCoeffs,
+                                  q15_t *pState,
+                                  uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the floating-point LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;   /**< number of coefficients in the filter. */
+        float32_t *pState;  /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+        float32_t mu;       /**< step size that controls filter coefficient updates. */
+    } arm_lms_instance_f32;
+
+    /**
+     * @brief Processing function for floating-point LMS filter.
+     * @param[in]  S          points to an instance of the floating-point LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_f32(const arm_lms_instance_f32 *S,
+                     float32_t *pSrc,
+                     float32_t *pRef,
+                     float32_t *pOut,
+                     float32_t *pErr,
+                     uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for floating-point LMS filter.
+     * @param[in] S          points to an instance of the floating-point LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to the coefficient buffer.
+     * @param[in] pState     points to state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     */
+    void arm_lms_init_f32(arm_lms_instance_f32 *S,
+                          uint16_t numTaps,
+                          float32_t *pCoeffs,
+                          float32_t *pState,
+                          float32_t mu,
+                          uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q15 LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;   /**< number of coefficients in the filter. */
+        q15_t *pState;      /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q15_t *pCoeffs;     /**< points to the coefficient array. The array is of length numTaps. */
+        q15_t mu;           /**< step size that controls filter coefficient updates. */
+        uint32_t postShift; /**< bit shift applied to coefficients. */
+    } arm_lms_instance_q15;
+
+    /**
+     * @brief Initialization function for the Q15 LMS filter.
+     * @param[in] S          points to an instance of the Q15 LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to the coefficient buffer.
+     * @param[in] pState     points to the state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     * @param[in] postShift  bit shift applied to coefficients.
+     */
+    void arm_lms_init_q15(arm_lms_instance_q15 *S,
+                          uint16_t numTaps,
+                          q15_t *pCoeffs,
+                          q15_t *pState,
+                          q15_t mu,
+                          uint32_t blockSize,
+                          uint32_t postShift);
+
+    /**
+     * @brief Processing function for Q15 LMS filter.
+     * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_q15(
+        const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q31 LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;   /**< number of coefficients in the filter. */
+        q31_t *pState;      /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q31_t *pCoeffs;     /**< points to the coefficient array. The array is of length numTaps. */
+        q31_t mu;           /**< step size that controls filter coefficient updates. */
+        uint32_t postShift; /**< bit shift applied to coefficients. */
+    } arm_lms_instance_q31;
+
+    /**
+     * @brief Processing function for Q31 LMS filter.
+     * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_q31(
+        const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for Q31 LMS filter.
+     * @param[in] S          points to an instance of the Q31 LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to coefficient buffer.
+     * @param[in] pState     points to state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     * @param[in] postShift  bit shift applied to coefficients.
+     */
+    void arm_lms_init_q31(arm_lms_instance_q31 *S,
+                          uint16_t numTaps,
+                          q31_t *pCoeffs,
+                          q31_t *pState,
+                          q31_t mu,
+                          uint32_t blockSize,
+                          uint32_t postShift);
+
+    /**
+     * @brief Instance structure for the floating-point normalized LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;   /**< number of coefficients in the filter. */
+        float32_t *pState;  /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+        float32_t mu;       /**< step size that control filter coefficient updates. */
+        float32_t energy;   /**< saves previous frame energy. */
+        float32_t x0;       /**< saves previous input sample. */
+    } arm_lms_norm_instance_f32;
+
+    /**
+     * @brief Processing function for floating-point normalized LMS filter.
+     * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_norm_f32(arm_lms_norm_instance_f32 *S,
+                          float32_t *pSrc,
+                          float32_t *pRef,
+                          float32_t *pOut,
+                          float32_t *pErr,
+                          uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for floating-point normalized LMS filter.
+     * @param[in] S          points to an instance of the floating-point LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to coefficient buffer.
+     * @param[in] pState     points to state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     */
+    void arm_lms_norm_init_f32(arm_lms_norm_instance_f32 *S,
+                               uint16_t numTaps,
+                               float32_t *pCoeffs,
+                               float32_t *pState,
+                               float32_t mu,
+                               uint32_t blockSize);
+
+    /**
+     * @brief Instance structure for the Q31 normalized LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;  /**< number of coefficients in the filter. */
+        q31_t *pState;     /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q31_t *pCoeffs;    /**< points to the coefficient array. The array is of length numTaps. */
+        q31_t mu;          /**< step size that controls filter coefficient updates. */
+        uint8_t postShift; /**< bit shift applied to coefficients. */
+        q31_t *recipTable; /**< points to the reciprocal initial value table. */
+        q31_t energy;      /**< saves previous frame energy. */
+        q31_t x0;          /**< saves previous input sample. */
+    } arm_lms_norm_instance_q31;
+
+    /**
+     * @brief Processing function for Q31 normalized LMS filter.
+     * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_norm_q31(
+        arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for Q31 normalized LMS filter.
+     * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to coefficient buffer.
+     * @param[in] pState     points to state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     * @param[in] postShift  bit shift applied to coefficients.
+     */
+    void arm_lms_norm_init_q31(arm_lms_norm_instance_q31 *S,
+                               uint16_t numTaps,
+                               q31_t *pCoeffs,
+                               q31_t *pState,
+                               q31_t mu,
+                               uint32_t blockSize,
+                               uint8_t postShift);
+
+    /**
+     * @brief Instance structure for the Q15 normalized LMS filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;  /**< Number of coefficients in the filter. */
+        q15_t *pState;     /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+        q15_t *pCoeffs;    /**< points to the coefficient array. The array is of length numTaps. */
+        q15_t mu;          /**< step size that controls filter coefficient updates. */
+        uint8_t postShift; /**< bit shift applied to coefficients. */
+        q15_t *recipTable; /**< Points to the reciprocal initial value table. */
+        q15_t energy;      /**< saves previous frame energy. */
+        q15_t x0;          /**< saves previous input sample. */
+    } arm_lms_norm_instance_q15;
+
+    /**
+     * @brief Processing function for Q15 normalized LMS filter.
+     * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
+     * @param[in]  pSrc       points to the block of input data.
+     * @param[in]  pRef       points to the block of reference data.
+     * @param[out] pOut       points to the block of output data.
+     * @param[out] pErr       points to the block of error data.
+     * @param[in]  blockSize  number of samples to process.
+     */
+    void arm_lms_norm_q15(
+        arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize);
+
+    /**
+     * @brief Initialization function for Q15 normalized LMS filter.
+     * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
+     * @param[in] numTaps    number of filter coefficients.
+     * @param[in] pCoeffs    points to coefficient buffer.
+     * @param[in] pState     points to state buffer.
+     * @param[in] mu         step size that controls filter coefficient updates.
+     * @param[in] blockSize  number of samples to process.
+     * @param[in] postShift  bit shift applied to coefficients.
+     */
+    void arm_lms_norm_init_q15(arm_lms_norm_instance_q15 *S,
+                               uint16_t numTaps,
+                               q15_t *pCoeffs,
+                               q15_t *pState,
+                               q15_t mu,
+                               uint32_t blockSize,
+                               uint8_t postShift);
+
+    /**
+     * @brief Correlation of floating-point sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+    void arm_correlate_f32(float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst);
+
+    /**
+     * @brief Correlation of Q15 sequences
+     * @param[in]  pSrcA     points to the first input sequence.
+     * @param[in]  srcALen   length of the first input sequence.
+     * @param[in]  pSrcB     points to the second input sequence.
+     * @param[in]  srcBLen   length of the second input sequence.
+     * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     */
+    void arm_correlate_opt_q15(
+        q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch);
+
+    /**
+     * @brief Correlation of Q15 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+
+    void arm_correlate_q15(q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst);
+
+    /**
+     * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+
+    void arm_correlate_fast_q15(q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst);
+
+    /**
+     * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+     * @param[in]  pSrcA     points to the first input sequence.
+     * @param[in]  srcALen   length of the first input sequence.
+     * @param[in]  pSrcB     points to the second input sequence.
+     * @param[in]  srcBLen   length of the second input sequence.
+     * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+     */
+    void arm_correlate_fast_opt_q15(
+        q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch);
+
+    /**
+     * @brief Correlation of Q31 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+    void arm_correlate_q31(q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst);
+
+    /**
+     * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+    void arm_correlate_fast_q31(q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst);
+
+    /**
+     * @brief Correlation of Q7 sequences.
+     * @param[in]  pSrcA      points to the first input sequence.
+     * @param[in]  srcALen    length of the first input sequence.
+     * @param[in]  pSrcB      points to the second input sequence.
+     * @param[in]  srcBLen    length of the second input sequence.
+     * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen,
+     * srcBLen) - 2.
+     * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+     */
+    void arm_correlate_opt_q7(
+        q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2);
+
+    /**
+     * @brief Correlation of Q7 sequences.
+     * @param[in]  pSrcA    points to the first input sequence.
+     * @param[in]  srcALen  length of the first input sequence.
+     * @param[in]  pSrcB    points to the second input sequence.
+     * @param[in]  srcBLen  length of the second input sequence.
+     * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+     */
+    void arm_correlate_q7(q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst);
+
+    /**
+     * @brief Instance structure for the floating-point sparse FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;    /**< number of coefficients in the filter. */
+        uint16_t stateIndex; /**< state buffer index.  Points to the oldest sample in the state buffer. */
+        float32_t *pState;   /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+        float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps.*/
+        uint16_t maxDelay;   /**< maximum offset specified by the pTapDelay array. */
+        int32_t *pTapDelay;  /**< points to the array of delay values.  The array is of length numTaps. */
+    } arm_fir_sparse_instance_f32;
+
+    /**
+     * @brief Instance structure for the Q31 sparse FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;    /**< number of coefficients in the filter. */
+        uint16_t stateIndex; /**< state buffer index.  Points to the oldest sample in the state buffer. */
+        q31_t *pState;       /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+        q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps.*/
+        uint16_t maxDelay;   /**< maximum offset specified by the pTapDelay array. */
+        int32_t *pTapDelay;  /**< points to the array of delay values.  The array is of length numTaps. */
+    } arm_fir_sparse_instance_q31;
+
+    /**
+     * @brief Instance structure for the Q15 sparse FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;    /**< number of coefficients in the filter. */
+        uint16_t stateIndex; /**< state buffer index.  Points to the oldest sample in the state buffer. */
+        q15_t *pState;       /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+        q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps.*/
+        uint16_t maxDelay;   /**< maximum offset specified by the pTapDelay array. */
+        int32_t *pTapDelay;  /**< points to the array of delay values.  The array is of length numTaps. */
+    } arm_fir_sparse_instance_q15;
+
+    /**
+     * @brief Instance structure for the Q7 sparse FIR filter.
+     */
+    typedef struct
+    {
+        uint16_t numTaps;    /**< number of coefficients in the filter. */
+        uint16_t stateIndex; /**< state buffer index.  Points to the oldest sample in the state buffer. */
+        q7_t *pState;        /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+        q7_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps.*/
+        uint16_t maxDelay;   /**< maximum offset specified by the pTapDelay array. */
+        int32_t *pTapDelay;  /**< points to the array of delay values.  The array is of length numTaps. */
+    } arm_fir_sparse_instance_q7;
+
+    /**
+     * @brief Processing function for the floating-point sparse FIR filter.
+     * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
+     * @param[in]  pSrc        points to the block of input data.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+     * @param[in]  blockSize   number of input samples to process per call.
+     */
+    void arm_fir_sparse_f32(
+        arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the floating-point sparse FIR filter.
+     * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
+     * @param[in]     numTaps    number of nonzero coefficients in the filter.
+     * @param[in]     pCoeffs    points to the array of filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     pTapDelay  points to the array of offset times.
+     * @param[in]     maxDelay   maximum offset time supported.
+     * @param[in]     blockSize  number of samples that will be processed per block.
+     */
+    void arm_fir_sparse_init_f32(arm_fir_sparse_instance_f32 *S,
+                                 uint16_t numTaps,
+                                 float32_t *pCoeffs,
+                                 float32_t *pState,
+                                 int32_t *pTapDelay,
+                                 uint16_t maxDelay,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q31 sparse FIR filter.
+     * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
+     * @param[in]  pSrc        points to the block of input data.
+     * @param[out] pDst        points to the block of output data
+     * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+     * @param[in]  blockSize   number of input samples to process per call.
+     */
+    void arm_fir_sparse_q31(
+        arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q31 sparse FIR filter.
+     * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
+     * @param[in]     numTaps    number of nonzero coefficients in the filter.
+     * @param[in]     pCoeffs    points to the array of filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     pTapDelay  points to the array of offset times.
+     * @param[in]     maxDelay   maximum offset time supported.
+     * @param[in]     blockSize  number of samples that will be processed per block.
+     */
+    void arm_fir_sparse_init_q31(arm_fir_sparse_instance_q31 *S,
+                                 uint16_t numTaps,
+                                 q31_t *pCoeffs,
+                                 q31_t *pState,
+                                 int32_t *pTapDelay,
+                                 uint16_t maxDelay,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q15 sparse FIR filter.
+     * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
+     * @param[in]  pSrc         points to the block of input data.
+     * @param[out] pDst         points to the block of output data
+     * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+     * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+     * @param[in]  blockSize    number of input samples to process per call.
+     */
+    void arm_fir_sparse_q15(arm_fir_sparse_instance_q15 *S,
+                            q15_t *pSrc,
+                            q15_t *pDst,
+                            q15_t *pScratchIn,
+                            q31_t *pScratchOut,
+                            uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q15 sparse FIR filter.
+     * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
+     * @param[in]     numTaps    number of nonzero coefficients in the filter.
+     * @param[in]     pCoeffs    points to the array of filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     pTapDelay  points to the array of offset times.
+     * @param[in]     maxDelay   maximum offset time supported.
+     * @param[in]     blockSize  number of samples that will be processed per block.
+     */
+    void arm_fir_sparse_init_q15(arm_fir_sparse_instance_q15 *S,
+                                 uint16_t numTaps,
+                                 q15_t *pCoeffs,
+                                 q15_t *pState,
+                                 int32_t *pTapDelay,
+                                 uint16_t maxDelay,
+                                 uint32_t blockSize);
+
+    /**
+     * @brief Processing function for the Q7 sparse FIR filter.
+     * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
+     * @param[in]  pSrc         points to the block of input data.
+     * @param[out] pDst         points to the block of output data
+     * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+     * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+     * @param[in]  blockSize    number of input samples to process per call.
+     */
+    void arm_fir_sparse_q7(arm_fir_sparse_instance_q7 *S,
+                           q7_t *pSrc,
+                           q7_t *pDst,
+                           q7_t *pScratchIn,
+                           q31_t *pScratchOut,
+                           uint32_t blockSize);
+
+    /**
+     * @brief  Initialization function for the Q7 sparse FIR filter.
+     * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
+     * @param[in]     numTaps    number of nonzero coefficients in the filter.
+     * @param[in]     pCoeffs    points to the array of filter coefficients.
+     * @param[in]     pState     points to the state buffer.
+     * @param[in]     pTapDelay  points to the array of offset times.
+     * @param[in]     maxDelay   maximum offset time supported.
+     * @param[in]     blockSize  number of samples that will be processed per block.
+     */
+    void arm_fir_sparse_init_q7(arm_fir_sparse_instance_q7 *S,
+                                uint16_t numTaps,
+                                q7_t *pCoeffs,
+                                q7_t *pState,
+                                int32_t *pTapDelay,
+                                uint16_t maxDelay,
+                                uint32_t blockSize);
+
+    /**
+     * @brief  Floating-point sin_cos function.
+     * @param[in]  theta   input value in degrees
+     * @param[out] pSinVal  points to the processed sine output.
+     * @param[out] pCosVal  points to the processed cos output.
+     */
+    void arm_sin_cos_f32(float32_t theta, float32_t *pSinVal, float32_t *pCosVal);
+
+    /**
+     * @brief  Q31 sin_cos function.
+     * @param[in]  theta    scaled input value in degrees
+     * @param[out] pSinVal  points to the processed sine output.
+     * @param[out] pCosVal  points to the processed cosine output.
+     */
+    void arm_sin_cos_q31(q31_t theta, q31_t *pSinVal, q31_t *pCosVal);
+
+    /**
+     * @brief  Floating-point complex conjugate.
+     * @param[in]  pSrc        points to the input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_conj_f32(float32_t *pSrc, float32_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q31 complex conjugate.
+     * @param[in]  pSrc        points to the input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_conj_q31(q31_t *pSrc, q31_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q15 complex conjugate.
+     * @param[in]  pSrc        points to the input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_conj_q15(q15_t *pSrc, q15_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Floating-point complex magnitude squared
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_squared_f32(float32_t *pSrc, float32_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q31 complex magnitude squared
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_squared_q31(q31_t *pSrc, q31_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q15 complex magnitude squared
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_squared_q15(q15_t *pSrc, q15_t *pDst, uint32_t numSamples);
+
+    /**
+     * @ingroup groupController
+     */
+
+    /**
+     * @defgroup PID PID Motor Control
+     *
+     * A Proportional Integral Derivative (PID) controller is a generic feedback control
+     * loop mechanism widely used in industrial control systems.
+     * A PID controller is the most commonly used type of feedback controller.
+     *
+     * This set of functions implements (PID) controllers
+     * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
+     * of data and each call to the function returns a single processed value.
+     * <code>S</code> points to an instance of the PID control data structure.  <code>in</code>
+     * is the input sample value. The functions return the output value.
+     *
+     * \par Algorithm:
+     * <pre>
+     *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+     *    A0 = Kp + Ki + Kd
+     *    A1 = (-Kp ) - (2 * Kd )
+     *    A2 = Kd  </pre>
+     *
+     * \par
+     * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
+     *
+     * \par
+     * \image html PID.gif "Proportional Integral Derivative Controller"
+     *
+     * \par
+     * The PID controller calculates an "error" value as the difference between
+     * the measured output and the reference input.
+     * The controller attempts to minimize the error by adjusting the process control inputs.
+     * The proportional value determines the reaction to the current error,
+     * the integral value determines the reaction based on the sum of recent errors,
+     * and the derivative value determines the reaction based on the rate at which the error has been changing.
+     *
+     * \par Instance Structure
+     * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+     * A separate instance structure must be defined for each PID Controller.
+     * There are separate instance structure declarations for each of the 3 supported data types.
+     *
+     * \par Reset Functions
+     * There is also an associated reset function for each data type which clears the state array.
+     *
+     * \par Initialization Functions
+     * There is also an associated initialization function for each data type.
+     * The initialization function performs the following operations:
+     * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
+     * - Zeros out the values in the state buffer.
+     *
+     * \par
+     * Instance structure cannot be placed into a const data section and it is recommended to use the initialization
+     * function.
+     *
+     * \par Fixed-Point Behavior
+     * Care must be taken when using the fixed-point versions of the PID Controller functions.
+     * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+     * Refer to the function specific documentation below for usage guidelines.
+     */
+
+    /**
+     * @addtogroup PID
+     * @{
+     */
+
+    /**
+     * @brief  Process function for the floating-point PID Control.
+     * @param[in,out] S   is an instance of the floating-point PID Control structure
+     * @param[in]     in  input sample to process
+     * @return out processed output sample.
+     */
+    CMSIS_INLINE __STATIC_INLINE float32_t arm_pid_f32(arm_pid_instance_f32 *S, float32_t in)
+    {
+        float32_t out;
+
+        /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
+        out = (S->A0 * in) + (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
+
+        /* Update state */
+        S->state[1] = S->state[0];
+        S->state[0] = in;
+        S->state[2] = out;
+
+        /* return to application */
+        return (out);
+    }
+
+    /**
+     * @brief  Process function for the Q31 PID Control.
+     * @param[in,out] S  points to an instance of the Q31 PID Control structure
+     * @param[in]     in  input sample to process
+     * @return out processed output sample.
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using an internal 64-bit accumulator.
+     * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but
+     * provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In
+     * order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+     * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated
+     * to 1.31 format.
+     */
+    CMSIS_INLINE __STATIC_INLINE q31_t arm_pid_q31(arm_pid_instance_q31 *S, q31_t in)
+    {
+        q63_t acc;
+        q31_t out;
+
+        /* acc = A0 * x[n]  */
+        acc = (q63_t)S->A0 * in;
+
+        /* acc += A1 * x[n-1] */
+        acc += (q63_t)S->A1 * S->state[0];
+
+        /* acc += A2 * x[n-2]  */
+        acc += (q63_t)S->A2 * S->state[1];
+
+        /* convert output to 1.31 format to add y[n-1] */
+        out = (q31_t)(acc >> 31U);
+
+        /* out += y[n-1] */
+        out += S->state[2];
+
+        /* Update state */
+        S->state[1] = S->state[0];
+        S->state[0] = in;
+        S->state[2] = out;
+
+        /* return to application */
+        return (out);
+    }
+
+    /**
+     * @brief  Process function for the Q15 PID Control.
+     * @param[in,out] S   points to an instance of the Q15 PID Control structure
+     * @param[in]     in  input sample to process
+     * @return out processed output sample.
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using a 64-bit internal accumulator.
+     * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+     * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+     * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications
+     * is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding
+     * low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
+     */
+    CMSIS_INLINE __STATIC_INLINE q15_t arm_pid_q15(arm_pid_instance_q15 *S, q15_t in)
+    {
+        q63_t acc;
+        q15_t out;
+
+#if defined(ARM_MATH_DSP)
+        __SIMD32_TYPE *vstate;
+
+        /* Implementation of PID controller */
+
+        /* acc = A0 * x[n]  */
+        acc = (q31_t)__SMUAD((uint32_t)S->A0, (uint32_t)in);
+
+        /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+        vstate = __SIMD32_CONST(S->state);
+        acc    = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
 #else
     /* acc = A0 * x[n]  */
-    acc = ((q31_t) S->A0) * in;
+    acc = ((q31_t)S->A0) * in;
 
     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc += (q31_t) S->A1 * S->state[0];
-    acc += (q31_t) S->A2 * S->state[1];
+    acc += (q31_t)S->A1 * S->state[0];
+    acc += (q31_t)S->A2 * S->state[1];
 #endif
 
-    /* acc += y[n-1] */
-    acc += (q31_t) S->state[2] << 15;
+        /* acc += y[n-1] */
+        acc += (q31_t)S->state[2] << 15;
 
-    /* saturate the output */
-    out = (q15_t) (__SSAT((acc >> 15), 16));
+        /* saturate the output */
+        out = (q15_t)(__SSAT((acc >> 15), 16));
 
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-  /**
-   * @} end of PID group
-   */
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * src,
-  arm_matrix_instance_f32 * dst);
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * src,
-  arm_matrix_instance_f64 * dst);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup clarke Vector Clarke Transform
-   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
-   * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
-   * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
-   * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
-   * \image html clarke.gif Stator current space vector and its components in (a,b).
-   * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
-   * can be calculated using only <code>Ia</code> and <code>Ib</code>.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeFormula.gif
-   * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
-   * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup clarke
-   * @{
-   */
-
-  /**
-   *
-   * @brief  Floating-point Clarke transform
-   * @param[in]  Ia       input three-phase coordinate <code>a</code>
-   * @param[in]  Ib       input three-phase coordinate <code>b</code>
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_clarke_f32(
-  float32_t Ia,
-  float32_t Ib,
-  float32_t * pIalpha,
-  float32_t * pIbeta)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
-    *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
-  }
-
-
-  /**
-   * @brief  Clarke transform for Q31 version
-   * @param[in]  Ia       input three-phase coordinate <code>a</code>
-   * @param[in]  Ib       input three-phase coordinate <code>b</code>
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_clarke_q31(
-  q31_t Ia,
-  q31_t Ib,
-  q31_t * pIalpha,
-  q31_t * pIbeta)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
-    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
-    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
-    /* pIbeta is calculated by adding the intermediate products */
-    *pIbeta = __QADD(product1, product2);
-  }
-
-  /**
-   * @} end of clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_clarke Vector Inverse Clarke Transform
-   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeInvFormula.gif
-   * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
-   * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_clarke
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Clarke transform
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate <code>a</code>
-   * @param[out] pIb     points to output three-phase coordinate <code>b</code>
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pIa,
-  float32_t * pIb)
-  {
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
-    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
-  }
-
-
-  /**
-   * @brief  Inverse Clarke transform for Q31 version
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate <code>a</code>
-   * @param[out] pIb     points to output three-phase coordinate <code>b</code>
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the subtraction, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pIa,
-  q31_t * pIb)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
-    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
-    /* pIb is calculated by subtracting the products */
-    *pIb = __QSUB(product2, product1);
-  }
-
-  /**
-   * @} end of inv_clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup park Vector Park Transform
-   *
-   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
-   * from the stationary to the moving reference frame and control the spatial relationship between
-   * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
-   * current vector and the relationship from the two reference frames:
-   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkFormula.gif
-   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
-   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup park
-   * @{
-   */
-
-  /**
-   * @brief Floating-point Park transform
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output   rotor reference frame d
-   * @param[out] pIq     points to output   rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   *
-   * The function implements the forward Park transform.
-   *
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_park_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pId,
-  float32_t * pIq,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
-    *pId = Ialpha * cosVal + Ibeta * sinVal;
-
-    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
-    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
-  }
-
-
-  /**
-   * @brief  Park transform for Q31 version
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output rotor reference frame d
-   * @param[out] pIq     points to output rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition and subtraction, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_park_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pId,
-  q31_t * pIq,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Ialpha * cosVal) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * sinVal) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Ialpha * sinVal) */
-    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * cosVal) */
-    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
-    /* Calculate pId by adding the two intermediate products 1 and 2 */
-    *pId = __QADD(product1, product2);
-
-    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
-    *pIq = __QSUB(product4, product3);
-  }
-
-  /**
-   * @} end of park group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_park Vector Inverse Park transform
-   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkInvFormula.gif
-   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
-   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_park
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Park transform
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_park_f32(
-  float32_t Id,
-  float32_t Iq,
-  float32_t * pIalpha,
-  float32_t * pIbeta,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
-    *pIalpha = Id * cosVal - Iq * sinVal;
-
-    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
-    *pIbeta = Id * sinVal + Iq * cosVal;
-  }
-
-
-  /**
-   * @brief  Inverse Park transform for   Q31 version
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_park_q31(
-  q31_t Id,
-  q31_t Iq,
-  q31_t * pIalpha,
-  q31_t * pIbeta,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Id * cosVal) */
-    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * sinVal) */
-    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Id * sinVal) */
-    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * cosVal) */
-    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
-    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
-    *pIalpha = __QSUB(product1, product2);
-
-    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
-    *pIbeta = __QADD(product4, product3);
-  }
-
-  /**
-   * @} end of Inverse park group
-   */
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup LinearInterpolate Linear Interpolation
-   *
-   * Linear interpolation is a method of curve fitting using linear polynomials.
-   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
-   *
-   * \par
-   * \image html LinearInterp.gif "Linear interpolation"
-   *
-   * \par
-   * A  Linear Interpolate function calculates an output value(y), for the input(x)
-   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
-   *
-   * \par Algorithm:
-   * <pre>
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   * </pre>
-   *
-   * \par
-   * This set of functions implements Linear interpolation process
-   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
-   * sample of data and each call to the function returns a single processed value.
-   * <code>S</code> points to an instance of the Linear Interpolate function data structure.
-   * <code>x</code> is the input sample value. The functions returns the output value.
-   *
-   * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table
-   * if x is below input range and returns last value of table if x is above range.
-   */
-
-  /**
-   * @addtogroup LinearInterpolate
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point Linear Interpolation Function.
-   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
-   * @param[in]     x  input sample to process
-   * @return y processed output sample.
-   *
-   */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_linear_interp_f32(
-  arm_linear_interp_instance_f32 * S,
-  float32_t x)
-  {
-    float32_t y;
-    float32_t x0, x1;                            /* Nearest input values */
-    float32_t y0, y1;                            /* Nearest output values */
-    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
-    int32_t i;                                   /* Index variable */
-    float32_t *pYData = S->pYData;               /* pointer to output table */
-
-    /* Calculation of index */
-    i = (int32_t) ((x - S->x1) / xSpacing);
-
-    if (i < 0)
-    {
-      /* Iniatilize output for below specified range as least output value of table */
-      y = pYData[0];
-    }
-    else if ((uint32_t)i >= S->nValues)
-    {
-      /* Iniatilize output for above specified range as last output value of table */
-      y = pYData[S->nValues - 1];
-    }
-    else
-    {
-      /* Calculation of nearest input values */
-      x0 = S->x1 +  i      * xSpacing;
-      x1 = S->x1 + (i + 1) * xSpacing;
-
-      /* Read of nearest output values */
-      y0 = pYData[i];
-      y1 = pYData[i + 1];
-
-      /* Calculation of output */
-      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+        /* Update state */
+        S->state[1] = S->state[0];
+        S->state[0] = in;
+        S->state[2] = out;
 
+        /* return to application */
+        return (out);
     }
 
-    /* returns output value */
-    return (y);
-  }
+    /**
+     * @} end of PID group
+     */
 
+    /**
+     * @brief Floating-point matrix inverse.
+     * @param[in]  src   points to the instance of the input floating-point matrix structure.
+     * @param[out] dst   points to the instance of the output floating-point matrix structure.
+     * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+     * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error
+     * status ARM_MATH_SINGULAR.
+     */
+    arm_status arm_mat_inverse_f32(const arm_matrix_instance_f32 *src, arm_matrix_instance_f32 *dst);
 
-   /**
-   *
-   * @brief  Process function for the Q31 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q31 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_linear_interp_q31(
-  q31_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q31_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
+    /**
+     * @brief Floating-point matrix inverse.
+     * @param[in]  src   points to the instance of the input floating-point matrix structure.
+     * @param[out] dst   points to the instance of the output floating-point matrix structure.
+     * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+     * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error
+     * status ARM_MATH_SINGULAR.
+     */
+    arm_status arm_mat_inverse_f64(const arm_matrix_instance_f64 *src, arm_matrix_instance_f64 *dst);
 
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (q31_t)0xFFF00000) >> 20);
+    /**
+     * @ingroup groupController
+     */
 
-    if (index >= (int32_t)(nValues - 1))
+    /**
+     * @defgroup clarke Vector Clarke Transform
+     * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
+     * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
+     * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
+     * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
+     * \image html clarke.gif Stator current space vector and its components in (a,b).
+     * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
+     * can be calculated using only <code>Ia</code> and <code>Ib</code>.
+     *
+     * The function operates on a single sample of data and each call to the function returns the processed output.
+     * The library provides separate functions for Q31 and floating-point data types.
+     * \par Algorithm
+     * \image html clarkeFormula.gif
+     * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
+     * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
+     * \par Fixed-Point Behavior
+     * Care must be taken when using the Q31 version of the Clarke transform.
+     * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+     * Refer to the function specific documentation below for usage guidelines.
+     */
+
+    /**
+     * @addtogroup clarke
+     * @{
+     */
+
+    /**
+     *
+     * @brief  Floating-point Clarke transform
+     * @param[in]  Ia       input three-phase coordinate <code>a</code>
+     * @param[in]  Ib       input three-phase coordinate <code>b</code>
+     * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+     * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_clarke_f32(float32_t Ia, float32_t Ib, float32_t *pIalpha, float32_t *pIbeta)
     {
-      return (pYData[nValues - 1]);
+        /* Calculate pIalpha using the equation, pIalpha = Ia */
+        *pIalpha = Ia;
+
+        /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
+        *pIbeta = ((float32_t)0.57735026919 * Ia + (float32_t)1.15470053838 * Ib);
     }
-    else if (index < 0)
+
+    /**
+     * @brief  Clarke transform for Q31 version
+     * @param[in]  Ia       input three-phase coordinate <code>a</code>
+     * @param[in]  Ib       input three-phase coordinate <code>b</code>
+     * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+     * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using an internal 32-bit accumulator.
+     * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62
+     * format. There is saturation on the addition, hence there is no risk of overflow.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_clarke_q31(q31_t Ia, q31_t Ib, q31_t *pIalpha, q31_t *pIbeta)
     {
-      return (pYData[0]);
+        q31_t product1, product2; /* Temporary variables used to store intermediate results */
+
+        /* Calculating pIalpha from Ia by equation pIalpha = Ia */
+        *pIalpha = Ia;
+
+        /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
+        product1 = (q31_t)(((q63_t)Ia * 0x24F34E8B) >> 30);
+
+        /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
+        product2 = (q31_t)(((q63_t)Ib * 0x49E69D16) >> 30);
+
+        /* pIbeta is calculated by adding the intermediate products */
+        *pIbeta = __QADD(product1, product2);
     }
-    else
+
+    /**
+     * @} end of clarke group
+     */
+
+    /**
+     * @brief  Converts the elements of the Q7 vector to Q31 vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_q7_to_q31(q7_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @ingroup groupController
+     */
+
+    /**
+     * @defgroup inv_clarke Vector Inverse Clarke Transform
+     * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
+     *
+     * The function operates on a single sample of data and each call to the function returns the processed output.
+     * The library provides separate functions for Q31 and floating-point data types.
+     * \par Algorithm
+     * \image html clarkeInvFormula.gif
+     * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
+     * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
+     * \par Fixed-Point Behavior
+     * Care must be taken when using the Q31 version of the Clarke transform.
+     * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+     * Refer to the function specific documentation below for usage guidelines.
+     */
+
+    /**
+     * @addtogroup inv_clarke
+     * @{
+     */
+
+    /**
+     * @brief  Floating-point Inverse Clarke transform
+     * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+     * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+     * @param[out] pIa     points to output three-phase coordinate <code>a</code>
+     * @param[out] pIb     points to output three-phase coordinate <code>b</code>
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_f32(float32_t Ialpha,
+                                                         float32_t Ibeta,
+                                                         float32_t *pIa,
+                                                         float32_t *pIb)
     {
-      /* 20 bits for the fractional part */
-      /* shift left by 11 to keep fract in 1.31 format */
-      fract = (x & 0x000FFFFF) << 11;
+        /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+        *pIa = Ialpha;
 
-      /* Read two nearest output values from the index in 1.31(q31) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
-      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
-      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
-      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
-      /* Convert y to 1.31 format */
-      return (y << 1U);
+        /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
+        *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
     }
-  }
 
-
-  /**
-   *
-   * @brief  Process function for the Q15 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q15 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_linear_interp_q15(
-  q15_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q63_t y;                                     /* output */
-    q15_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (int32_t)0xFFF00000) >> 20);
-
-    if (index >= (int32_t)(nValues - 1))
+    /**
+     * @brief  Inverse Clarke transform for Q31 version
+     * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+     * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+     * @param[out] pIa     points to output three-phase coordinate <code>a</code>
+     * @param[out] pIb     points to output three-phase coordinate <code>b</code>
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using an internal 32-bit accumulator.
+     * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62
+     * format. There is saturation on the subtraction, hence there is no risk of overflow.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_q31(q31_t Ialpha, q31_t Ibeta, q31_t *pIa, q31_t *pIb)
     {
-      return (pYData[nValues - 1]);
+        q31_t product1, product2; /* Temporary variables used to store intermediate results */
+
+        /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+        *pIa = Ialpha;
+
+        /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
+        product1 = (q31_t)(((q63_t)(Ialpha) * (0x40000000)) >> 31);
+
+        /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
+        product2 = (q31_t)(((q63_t)(Ibeta) * (0x6ED9EBA1)) >> 31);
+
+        /* pIb is calculated by subtracting the products */
+        *pIb = __QSUB(product2, product1);
     }
-    else if (index < 0)
+
+    /**
+     * @} end of inv_clarke group
+     */
+
+    /**
+     * @brief  Converts the elements of the Q7 vector to Q15 vector.
+     * @param[in]  pSrc       input pointer
+     * @param[out] pDst       output pointer
+     * @param[in]  blockSize  number of samples to process
+     */
+    void arm_q7_to_q15(q7_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @ingroup groupController
+     */
+
+    /**
+     * @defgroup park Vector Park Transform
+     *
+     * Forward Park transform converts the input two-coordinate vector to flux and torque components.
+     * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the
+     * <code>Ibeta</code> currents from the stationary to the moving reference frame and control the spatial
+     * relationship between the stator vector current and rotor flux vector. If we consider the d axis aligned with the
+     * rotor flux, the diagram below shows the current vector and the relationship from the two reference frames: \image
+     * html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
+     *
+     * The function operates on a single sample of data and each call to the function returns the processed output.
+     * The library provides separate functions for Q31 and floating-point data types.
+     * \par Algorithm
+     * \image html parkFormula.gif
+     * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
+     * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code>
+     * are the cosine and sine values of theta (rotor flux position). \par Fixed-Point Behavior Care must be taken when
+     * using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the
+     * accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
+     */
+
+    /**
+     * @addtogroup park
+     * @{
+     */
+
+    /**
+     * @brief Floating-point Park transform
+     * @param[in]  Ialpha  input two-phase vector coordinate alpha
+     * @param[in]  Ibeta   input two-phase vector coordinate beta
+     * @param[out] pId     points to output   rotor reference frame d
+     * @param[out] pIq     points to output   rotor reference frame q
+     * @param[in]  sinVal  sine value of rotation angle theta
+     * @param[in]  cosVal  cosine value of rotation angle theta
+     *
+     * The function implements the forward Park transform.
+     *
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_park_f32(
+        float32_t Ialpha, float32_t Ibeta, float32_t *pId, float32_t *pIq, float32_t sinVal, float32_t cosVal)
     {
-      return (pYData[0]);
+        /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
+        *pId = Ialpha * cosVal + Ibeta * sinVal;
+
+        /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
+        *pIq = -Ialpha * sinVal + Ibeta * cosVal;
     }
-    else
+
+    /**
+     * @brief  Park transform for Q31 version
+     * @param[in]  Ialpha  input two-phase vector coordinate alpha
+     * @param[in]  Ibeta   input two-phase vector coordinate beta
+     * @param[out] pId     points to output rotor reference frame d
+     * @param[out] pIq     points to output rotor reference frame q
+     * @param[in]  sinVal  sine value of rotation angle theta
+     * @param[in]  cosVal  cosine value of rotation angle theta
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using an internal 32-bit accumulator.
+     * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62
+     * format. There is saturation on the addition and subtraction, hence there is no risk of overflow.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_park_q31(
+        q31_t Ialpha, q31_t Ibeta, q31_t *pId, q31_t *pIq, q31_t sinVal, q31_t cosVal)
     {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
+        q31_t product1, product2; /* Temporary variables used to store intermediate results */
+        q31_t product3, product4; /* Temporary variables used to store intermediate results */
 
-      /* Read two nearest output values from the index */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
+        /* Intermediate product is calculated by (Ialpha * cosVal) */
+        product1 = (q31_t)(((q63_t)(Ialpha) * (cosVal)) >> 31);
 
-      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
-      y = ((q63_t) y0 * (0xFFFFF - fract));
+        /* Intermediate product is calculated by (Ibeta * sinVal) */
+        product2 = (q31_t)(((q63_t)(Ibeta) * (sinVal)) >> 31);
 
-      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
-      y += ((q63_t) y1 * (fract));
+        /* Intermediate product is calculated by (Ialpha * sinVal) */
+        product3 = (q31_t)(((q63_t)(Ialpha) * (sinVal)) >> 31);
 
-      /* convert y to 1.15 format */
-      return (q15_t) (y >> 20);
+        /* Intermediate product is calculated by (Ibeta * cosVal) */
+        product4 = (q31_t)(((q63_t)(Ibeta) * (cosVal)) >> 31);
+
+        /* Calculate pId by adding the two intermediate products 1 and 2 */
+        *pId = __QADD(product1, product2);
+
+        /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
+        *pIq = __QSUB(product4, product3);
     }
-  }
 
+    /**
+     * @} end of park group
+     */
 
-  /**
-   *
-   * @brief  Process function for the Q7 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q7 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   */
-  CMSIS_INLINE __STATIC_INLINE q7_t arm_linear_interp_q7(
-  q7_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q7_t y0, y1;                                 /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    uint32_t index;                              /* Index to read nearest output values */
+    /**
+     * @brief  Converts the elements of the Q7 vector to floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q7_to_float(q7_t *pSrc, float32_t *pDst, uint32_t blockSize);
 
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    if (x < 0)
+    /**
+     * @ingroup groupController
+     */
+
+    /**
+     * @defgroup inv_park Vector Inverse Park transform
+     * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
+     *
+     * The function operates on a single sample of data and each call to the function returns the processed output.
+     * The library provides separate functions for Q31 and floating-point data types.
+     * \par Algorithm
+     * \image html parkInvFormula.gif
+     * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
+     * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code>
+     * are the cosine and sine values of theta (rotor flux position). \par Fixed-Point Behavior Care must be taken when
+     * using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the
+     * accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
+     */
+
+    /**
+     * @addtogroup inv_park
+     * @{
+     */
+
+    /**
+     * @brief  Floating-point Inverse Park transform
+     * @param[in]  Id       input coordinate of rotor reference frame d
+     * @param[in]  Iq       input coordinate of rotor reference frame q
+     * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+     * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+     * @param[in]  sinVal   sine value of rotation angle theta
+     * @param[in]  cosVal   cosine value of rotation angle theta
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_inv_park_f32(
+        float32_t Id, float32_t Iq, float32_t *pIalpha, float32_t *pIbeta, float32_t sinVal, float32_t cosVal)
     {
-      return (pYData[0]);
+        /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
+        *pIalpha = Id * cosVal - Iq * sinVal;
+
+        /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
+        *pIbeta = Id * sinVal + Iq * cosVal;
     }
-    index = (x >> 20) & 0xfff;
 
-    if (index >= (nValues - 1))
+    /**
+     * @brief  Inverse Park transform for   Q31 version
+     * @param[in]  Id       input coordinate of rotor reference frame d
+     * @param[in]  Iq       input coordinate of rotor reference frame q
+     * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+     * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+     * @param[in]  sinVal   sine value of rotation angle theta
+     * @param[in]  cosVal   cosine value of rotation angle theta
+     *
+     * <b>Scaling and Overflow Behavior:</b>
+     * \par
+     * The function is implemented using an internal 32-bit accumulator.
+     * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62
+     * format. There is saturation on the addition, hence there is no risk of overflow.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_inv_park_q31(
+        q31_t Id, q31_t Iq, q31_t *pIalpha, q31_t *pIbeta, q31_t sinVal, q31_t cosVal)
     {
-      return (pYData[nValues - 1]);
+        q31_t product1, product2; /* Temporary variables used to store intermediate results */
+        q31_t product3, product4; /* Temporary variables used to store intermediate results */
+
+        /* Intermediate product is calculated by (Id * cosVal) */
+        product1 = (q31_t)(((q63_t)(Id) * (cosVal)) >> 31);
+
+        /* Intermediate product is calculated by (Iq * sinVal) */
+        product2 = (q31_t)(((q63_t)(Iq) * (sinVal)) >> 31);
+
+        /* Intermediate product is calculated by (Id * sinVal) */
+        product3 = (q31_t)(((q63_t)(Id) * (sinVal)) >> 31);
+
+        /* Intermediate product is calculated by (Iq * cosVal) */
+        product4 = (q31_t)(((q63_t)(Iq) * (cosVal)) >> 31);
+
+        /* Calculate pIalpha by using the two intermediate products 1 and 2 */
+        *pIalpha = __QSUB(product1, product2);
+
+        /* Calculate pIbeta by using the two intermediate products 3 and 4 */
+        *pIbeta = __QADD(product4, product3);
     }
-    else
+
+    /**
+     * @} end of Inverse park group
+     */
+
+    /**
+     * @brief  Converts the elements of the Q31 vector to floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q31_to_float(q31_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @ingroup groupInterpolation
+     */
+
+    /**
+     * @defgroup LinearInterpolate Linear Interpolation
+     *
+     * Linear interpolation is a method of curve fitting using linear polynomials.
+     * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning
+     * the appropriate point along that line
+     *
+     * \par
+     * \image html LinearInterp.gif "Linear interpolation"
+     *
+     * \par
+     * A  Linear Interpolate function calculates an output value(y), for the input(x)
+     * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and
+     * y1(nearest output values)
+     *
+     * \par Algorithm:
+     * <pre>
+     *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+     *       where x0, x1 are nearest values of input x
+     *             y0, y1 are nearest values to output y
+     * </pre>
+     *
+     * \par
+     * This set of functions implements Linear interpolation process
+     * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
+     * sample of data and each call to the function returns a single processed value.
+     * <code>S</code> points to an instance of the Linear Interpolate function data structure.
+     * <code>x</code> is the input sample value. The functions returns the output value.
+     *
+     * \par
+     * if x is outside of the table boundary, Linear interpolation returns first value of the table
+     * if x is below input range and returns last value of table if x is above range.
+     */
+
+    /**
+     * @addtogroup LinearInterpolate
+     * @{
+     */
+
+    /**
+     * @brief  Process function for the floating-point Linear Interpolation Function.
+     * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+     * @param[in]     x  input sample to process
+     * @return y processed output sample.
+     *
+     */
+    CMSIS_INLINE __STATIC_INLINE float32_t arm_linear_interp_f32(arm_linear_interp_instance_f32 *S, float32_t x)
     {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
+        float32_t y;
+        float32_t x0, x1;                 /* Nearest input values */
+        float32_t y0, y1;                 /* Nearest output values */
+        float32_t xSpacing = S->xSpacing; /* spacing between input values */
+        int32_t i;                        /* Index variable */
+        float32_t *pYData = S->pYData;    /* pointer to output table */
 
-      /* Read two nearest output values from the index and are in 1.7(q7) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
+        /* Calculation of index */
+        i = (int32_t)((x - S->x1) / xSpacing);
 
-      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
-      y = ((y0 * (0xFFFFF - fract)));
+        if (i < 0) {
+            /* Iniatilize output for below specified range as least output value of table */
+            y = pYData[0];
+        }
+        else if ((uint32_t)i >= S->nValues) {
+            /* Iniatilize output for above specified range as last output value of table */
+            y = pYData[S->nValues - 1];
+        }
+        else {
+            /* Calculation of nearest input values */
+            x0 = S->x1 + i * xSpacing;
+            x1 = S->x1 + (i + 1) * xSpacing;
 
-      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
-      y += (y1 * fract);
+            /* Read of nearest output values */
+            y0 = pYData[i];
+            y1 = pYData[i + 1];
 
-      /* convert y to 1.7(q7) format */
-      return (q7_t) (y >> 20);
-     }
-  }
+            /* Calculation of output */
+            y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+        }
 
-  /**
-   * @} end of LinearInterpolate group
-   */
+        /* returns output value */
+        return (y);
+    }
 
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  sin(x).
-   */
-  float32_t arm_sin_f32(
-  float32_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q31_t arm_sin_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q15_t arm_sin_q15(
-  q15_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  cos(x).
-   */
-  float32_t arm_cos_f32(
-  float32_t x);
-
-
-  /**
-   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q31_t arm_cos_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q15_t arm_cos_q15(
-  q15_t x);
-
-
-  /**
-   * @ingroup groupFastMath
-   */
-
-
-  /**
-   * @defgroup SQRT Square Root
-   *
-   * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.
-   * The square root function is computed using the Newton-Raphson algorithm.
-   * This is an iterative algorithm of the form:
-   * <pre>
-   *      x1 = x0 - f(x0)/f'(x0)
-   * </pre>
-   * where <code>x1</code> is the current estimate,
-   * <code>x0</code> is the previous estimate, and
-   * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
-   * For the square root function, the algorithm reduces to:
-   * <pre>
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   * </pre>
-   */
-
-
-  /**
-   * @addtogroup SQRT
-   * @{
-   */
-
-  /**
-   * @brief  Floating-point square root function.
-   * @param[in]  in    input value.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  CMSIS_INLINE __STATIC_INLINE arm_status arm_sqrt_f32(
-  float32_t in,
-  float32_t * pOut)
-  {
-    if (in >= 0.0f)
+    /**
+     *
+     * @brief  Process function for the Q31 Linear Interpolation Function.
+     * @param[in] pYData   pointer to Q31 Linear Interpolation table
+     * @param[in] x        input sample to process
+     * @param[in] nValues  number of table values
+     * @return y processed output sample.
+     *
+     * \par
+     * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional
+     * part. This function can support maximum of table size 2^12.
+     *
+     */
+    CMSIS_INLINE __STATIC_INLINE q31_t arm_linear_interp_q31(q31_t *pYData, q31_t x, uint32_t nValues)
     {
+        q31_t y;       /* output */
+        q31_t y0, y1;  /* Nearest output values */
+        q31_t fract;   /* fractional part */
+        int32_t index; /* Index to read nearest output values */
 
-#if   (__FPU_USED == 1) && defined ( __CC_ARM   )
-      *pOut = __sqrtf(in);
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        index = ((x & (q31_t)0xFFF00000) >> 20);
+
+        if (index >= (int32_t)(nValues - 1)) {
+            return (pYData[nValues - 1]);
+        }
+        else if (index < 0) {
+            return (pYData[0]);
+        }
+        else {
+            /* 20 bits for the fractional part */
+            /* shift left by 11 to keep fract in 1.31 format */
+            fract = (x & 0x000FFFFF) << 11;
+
+            /* Read two nearest output values from the index in 1.31(q31) format */
+            y0 = pYData[index];
+            y1 = pYData[index + 1];
+
+            /* Calculation of y0 * (1-fract) and y is in 2.30 format */
+            y = ((q31_t)((q63_t)y0 * (0x7FFFFFFF - fract) >> 32));
+
+            /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
+            y += ((q31_t)(((q63_t)y1 * fract) >> 32));
+
+            /* Convert y to 1.31 format */
+            return (y << 1U);
+        }
+    }
+
+    /**
+     *
+     * @brief  Process function for the Q15 Linear Interpolation Function.
+     * @param[in] pYData   pointer to Q15 Linear Interpolation table
+     * @param[in] x        input sample to process
+     * @param[in] nValues  number of table values
+     * @return y processed output sample.
+     *
+     * \par
+     * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional
+     * part. This function can support maximum of table size 2^12.
+     *
+     */
+    CMSIS_INLINE __STATIC_INLINE q15_t arm_linear_interp_q15(q15_t *pYData, q31_t x, uint32_t nValues)
+    {
+        q63_t y;       /* output */
+        q15_t y0, y1;  /* Nearest output values */
+        q31_t fract;   /* fractional part */
+        int32_t index; /* Index to read nearest output values */
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        index = ((x & (int32_t)0xFFF00000) >> 20);
+
+        if (index >= (int32_t)(nValues - 1)) {
+            return (pYData[nValues - 1]);
+        }
+        else if (index < 0) {
+            return (pYData[0]);
+        }
+        else {
+            /* 20 bits for the fractional part */
+            /* fract is in 12.20 format */
+            fract = (x & 0x000FFFFF);
+
+            /* Read two nearest output values from the index */
+            y0 = pYData[index];
+            y1 = pYData[index + 1];
+
+            /* Calculation of y0 * (1-fract) and y is in 13.35 format */
+            y = ((q63_t)y0 * (0xFFFFF - fract));
+
+            /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
+            y += ((q63_t)y1 * (fract));
+
+            /* convert y to 1.15 format */
+            return (q15_t)(y >> 20);
+        }
+    }
+
+    /**
+     *
+     * @brief  Process function for the Q7 Linear Interpolation Function.
+     * @param[in] pYData   pointer to Q7 Linear Interpolation table
+     * @param[in] x        input sample to process
+     * @param[in] nValues  number of table values
+     * @return y processed output sample.
+     *
+     * \par
+     * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional
+     * part. This function can support maximum of table size 2^12.
+     */
+    CMSIS_INLINE __STATIC_INLINE q7_t arm_linear_interp_q7(q7_t *pYData, q31_t x, uint32_t nValues)
+    {
+        q31_t y;        /* output */
+        q7_t y0, y1;    /* Nearest output values */
+        q31_t fract;    /* fractional part */
+        uint32_t index; /* Index to read nearest output values */
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        if (x < 0) {
+            return (pYData[0]);
+        }
+        index = (x >> 20) & 0xfff;
+
+        if (index >= (nValues - 1)) {
+            return (pYData[nValues - 1]);
+        }
+        else {
+            /* 20 bits for the fractional part */
+            /* fract is in 12.20 format */
+            fract = (x & 0x000FFFFF);
+
+            /* Read two nearest output values from the index and are in 1.7(q7) format */
+            y0 = pYData[index];
+            y1 = pYData[index + 1];
+
+            /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
+            y = ((y0 * (0xFFFFF - fract)));
+
+            /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
+            y += (y1 * fract);
+
+            /* convert y to 1.7(q7) format */
+            return (q7_t)(y >> 20);
+        }
+    }
+
+    /**
+     * @} end of LinearInterpolate group
+     */
+
+    /**
+     * @brief  Fast approximation to the trigonometric sine function for floating-point data.
+     * @param[in] x  input value in radians.
+     * @return  sin(x).
+     */
+    float32_t arm_sin_f32(float32_t x);
+
+    /**
+     * @brief  Fast approximation to the trigonometric sine function for Q31 data.
+     * @param[in] x  Scaled input value in radians.
+     * @return  sin(x).
+     */
+    q31_t arm_sin_q31(q31_t x);
+
+    /**
+     * @brief  Fast approximation to the trigonometric sine function for Q15 data.
+     * @param[in] x  Scaled input value in radians.
+     * @return  sin(x).
+     */
+    q15_t arm_sin_q15(q15_t x);
+
+    /**
+     * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
+     * @param[in] x  input value in radians.
+     * @return  cos(x).
+     */
+    float32_t arm_cos_f32(float32_t x);
+
+    /**
+     * @brief Fast approximation to the trigonometric cosine function for Q31 data.
+     * @param[in] x  Scaled input value in radians.
+     * @return  cos(x).
+     */
+    q31_t arm_cos_q31(q31_t x);
+
+    /**
+     * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
+     * @param[in] x  Scaled input value in radians.
+     * @return  cos(x).
+     */
+    q15_t arm_cos_q15(q15_t x);
+
+    /**
+     * @ingroup groupFastMath
+     */
+
+    /**
+     * @defgroup SQRT Square Root
+     *
+     * Computes the square root of a number.
+     * There are separate functions for Q15, Q31, and floating-point data types.
+     * The square root function is computed using the Newton-Raphson algorithm.
+     * This is an iterative algorithm of the form:
+     * <pre>
+     *      x1 = x0 - f(x0)/f'(x0)
+     * </pre>
+     * where <code>x1</code> is the current estimate,
+     * <code>x0</code> is the previous estimate, and
+     * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
+     * For the square root function, the algorithm reduces to:
+     * <pre>
+     *     x0 = in/2                         [initial guess]
+     *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+     * </pre>
+     */
+
+    /**
+     * @addtogroup SQRT
+     * @{
+     */
+
+    /**
+     * @brief  Floating-point square root function.
+     * @param[in]  in    input value.
+     * @param[out] pOut  square root of input value.
+     * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+     * <code>in</code> is negative value and returns zero output for negative values.
+     */
+    CMSIS_INLINE __STATIC_INLINE arm_status arm_sqrt_f32(float32_t in, float32_t *pOut)
+    {
+        if (in >= 0.0f) {
+
+#if (__FPU_USED == 1) && defined(__CC_ARM)
+            *pOut = __sqrtf(in);
 #elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
-      *pOut = __builtin_sqrtf(in);
+        *pOut = __builtin_sqrtf(in);
 #elif (__FPU_USED == 1) && defined(__GNUC__)
-      *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000)
-      __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
+        *pOut = __builtin_sqrtf(in);
+#elif (__FPU_USED == 1) && defined(__ICCARM__) && (__VER__ >= 6040000)
+        __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
 #else
-      *pOut = sqrtf(in);
+        *pOut = sqrtf(in);
 #endif
 
-      return (ARM_MATH_SUCCESS);
+            return (ARM_MATH_SUCCESS);
+        }
+        else {
+            *pOut = 0.0f;
+            return (ARM_MATH_ARGUMENT_ERROR);
+        }
     }
-    else
+
+    /**
+     * @brief Q31 square root function.
+     * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
+     * @param[out] pOut  square root of input value.
+     * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+     * <code>in</code> is negative value and returns zero output for negative values.
+     */
+    arm_status arm_sqrt_q31(q31_t in, q31_t *pOut);
+
+    /**
+     * @brief  Q15 square root function.
+     * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
+     * @param[out] pOut  square root of input value.
+     * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+     * <code>in</code> is negative value and returns zero output for negative values.
+     */
+    arm_status arm_sqrt_q15(q15_t in, q15_t *pOut);
+
+    /**
+     * @} end of SQRT group
+     */
+
+    /**
+     * @brief floating-point Circular write function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_f32(int32_t *circBuffer,
+                                                            int32_t L,
+                                                            uint16_t *writeOffset,
+                                                            int32_t bufferInc,
+                                                            const int32_t *src,
+                                                            int32_t srcInc,
+                                                            uint32_t blockSize)
     {
-      *pOut = 0.0f;
-      return (ARM_MATH_ARGUMENT_ERROR);
+        uint32_t i = 0U;
+        int32_t wOffset;
+
+        /* Copy the value of Index pointer that points
+         * to the current location where the input samples to be copied */
+        wOffset = *writeOffset;
+
+        /* Loop over the blockSize */
+        i = blockSize;
+
+        while (i > 0U) {
+            /* copy the input sample to the circular buffer */
+            circBuffer[wOffset] = *src;
+
+            /* Update the input pointer */
+            src += srcInc;
+
+            /* Circularly update wOffset.  Watch out for positive and negative value */
+            wOffset += bufferInc;
+            if (wOffset >= L)
+                wOffset -= L;
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *writeOffset = (uint16_t)wOffset;
     }
-  }
 
-
-  /**
-   * @brief Q31 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut);
-
-
-  /**
-   * @brief  Q15 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut);
-
-  /**
-   * @} end of SQRT group
-   */
-
-
-  /**
-   * @brief floating-point Circular write function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const int32_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
+    /**
+     * @brief floating-point Circular Read function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularRead_f32(int32_t *circBuffer,
+                                                           int32_t L,
+                                                           int32_t *readOffset,
+                                                           int32_t bufferInc,
+                                                           int32_t *dst,
+                                                           int32_t *dst_base,
+                                                           int32_t dst_length,
+                                                           int32_t dstInc,
+                                                           uint32_t blockSize)
     {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
+        uint32_t i = 0U;
+        int32_t rOffset, dst_end;
 
-      /* Update the input pointer */
-      src += srcInc;
+        /* Copy the value of Index pointer that points
+         * to the current location from where the input samples to be read */
+        rOffset = *readOffset;
+        dst_end = (int32_t)(dst_base + dst_length);
 
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
+        /* Loop over the blockSize */
+        i = blockSize;
 
-      /* Decrement the loop counter */
-      i--;
+        while (i > 0U) {
+            /* copy the sample from the circular buffer to the destination buffer */
+            *dst = circBuffer[rOffset];
+
+            /* Update the input pointer */
+            dst += dstInc;
+
+            if (dst == (int32_t *)dst_end) {
+                dst = dst_base;
+            }
+
+            /* Circularly update rOffset.  Watch out for positive and negative value  */
+            rOffset += bufferInc;
+
+            if (rOffset >= L) {
+                rOffset -= L;
+            }
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *readOffset = rOffset;
     }
 
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-
-  /**
-   * @brief floating-point Circular Read function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  int32_t * dst,
-  int32_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
+    /**
+     * @brief Q15 Circular write function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q15(q15_t *circBuffer,
+                                                            int32_t L,
+                                                            uint16_t *writeOffset,
+                                                            int32_t bufferInc,
+                                                            const q15_t *src,
+                                                            int32_t srcInc,
+                                                            uint32_t blockSize)
     {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
+        uint32_t i = 0U;
+        int32_t wOffset;
 
-      /* Update the input pointer */
-      dst += dstInc;
+        /* Copy the value of Index pointer that points
+         * to the current location where the input samples to be copied */
+        wOffset = *writeOffset;
 
-      if (dst == (int32_t *) dst_end)
-      {
-        dst = dst_base;
-      }
+        /* Loop over the blockSize */
+        i = blockSize;
 
-      /* Circularly update rOffset.  Watch out for positive and negative value  */
-      rOffset += bufferInc;
+        while (i > 0U) {
+            /* copy the input sample to the circular buffer */
+            circBuffer[wOffset] = *src;
 
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
+            /* Update the input pointer */
+            src += srcInc;
 
-      /* Decrement the loop counter */
-      i--;
+            /* Circularly update wOffset.  Watch out for positive and negative value */
+            wOffset += bufferInc;
+            if (wOffset >= L)
+                wOffset -= L;
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *writeOffset = (uint16_t)wOffset;
     }
 
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular write function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q15_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
+    /**
+     * @brief Q15 Circular Read function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q15(q15_t *circBuffer,
+                                                           int32_t L,
+                                                           int32_t *readOffset,
+                                                           int32_t bufferInc,
+                                                           q15_t *dst,
+                                                           q15_t *dst_base,
+                                                           int32_t dst_length,
+                                                           int32_t dstInc,
+                                                           uint32_t blockSize)
     {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
+        uint32_t i = 0;
+        int32_t rOffset, dst_end;
 
-      /* Update the input pointer */
-      src += srcInc;
+        /* Copy the value of Index pointer that points
+         * to the current location from where the input samples to be read */
+        rOffset = *readOffset;
 
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
+        dst_end = (int32_t)(dst_base + dst_length);
 
-      /* Decrement the loop counter */
-      i--;
+        /* Loop over the blockSize */
+        i = blockSize;
+
+        while (i > 0U) {
+            /* copy the sample from the circular buffer to the destination buffer */
+            *dst = circBuffer[rOffset];
+
+            /* Update the input pointer */
+            dst += dstInc;
+
+            if (dst == (q15_t *)dst_end) {
+                dst = dst_base;
+            }
+
+            /* Circularly update wOffset.  Watch out for positive and negative value */
+            rOffset += bufferInc;
+
+            if (rOffset >= L) {
+                rOffset -= L;
+            }
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *readOffset = rOffset;
     }
 
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular Read function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q15_t * dst,
-  q15_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
+    /**
+     * @brief Q7 Circular write function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q7(q7_t *circBuffer,
+                                                           int32_t L,
+                                                           uint16_t *writeOffset,
+                                                           int32_t bufferInc,
+                                                           const q7_t *src,
+                                                           int32_t srcInc,
+                                                           uint32_t blockSize)
     {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
+        uint32_t i = 0U;
+        int32_t wOffset;
 
-      /* Update the input pointer */
-      dst += dstInc;
+        /* Copy the value of Index pointer that points
+         * to the current location where the input samples to be copied */
+        wOffset = *writeOffset;
 
-      if (dst == (q15_t *) dst_end)
-      {
-        dst = dst_base;
-      }
+        /* Loop over the blockSize */
+        i = blockSize;
 
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
+        while (i > 0U) {
+            /* copy the input sample to the circular buffer */
+            circBuffer[wOffset] = *src;
 
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
+            /* Update the input pointer */
+            src += srcInc;
 
-      /* Decrement the loop counter */
-      i--;
+            /* Circularly update wOffset.  Watch out for positive and negative value */
+            wOffset += bufferInc;
+            if (wOffset >= L)
+                wOffset -= L;
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *writeOffset = (uint16_t)wOffset;
     }
 
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular write function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q7_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
+    /**
+     * @brief Q7 Circular Read function.
+     */
+    CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q7(q7_t *circBuffer,
+                                                          int32_t L,
+                                                          int32_t *readOffset,
+                                                          int32_t bufferInc,
+                                                          q7_t *dst,
+                                                          q7_t *dst_base,
+                                                          int32_t dst_length,
+                                                          int32_t dstInc,
+                                                          uint32_t blockSize)
     {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
+        uint32_t i = 0;
+        int32_t rOffset, dst_end;
 
-      /* Update the input pointer */
-      src += srcInc;
+        /* Copy the value of Index pointer that points
+         * to the current location from where the input samples to be read */
+        rOffset = *readOffset;
 
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
+        dst_end = (int32_t)(dst_base + dst_length);
 
-      /* Decrement the loop counter */
-      i--;
+        /* Loop over the blockSize */
+        i = blockSize;
+
+        while (i > 0U) {
+            /* copy the sample from the circular buffer to the destination buffer */
+            *dst = circBuffer[rOffset];
+
+            /* Update the input pointer */
+            dst += dstInc;
+
+            if (dst == (q7_t *)dst_end) {
+                dst = dst_base;
+            }
+
+            /* Circularly update rOffset.  Watch out for positive and negative value */
+            rOffset += bufferInc;
+
+            if (rOffset >= L) {
+                rOffset -= L;
+            }
+
+            /* Decrement the loop counter */
+            i--;
+        }
+
+        /* Update the index pointer */
+        *readOffset = rOffset;
     }
 
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
+    /**
+     * @brief  Sum of the squares of the elements of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_power_q31(q31_t *pSrc, uint32_t blockSize, q63_t *pResult);
 
+    /**
+     * @brief  Sum of the squares of the elements of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_power_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult);
 
-  /**
-   * @brief Q7 Circular Read function.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q7_t * dst,
-  q7_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
+    /**
+     * @brief  Sum of the squares of the elements of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_power_q15(q15_t *pSrc, uint32_t blockSize, q63_t *pResult);
 
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
+    /**
+     * @brief  Sum of the squares of the elements of a Q7 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_power_q7(q7_t *pSrc, uint32_t blockSize, q31_t *pResult);
 
-    dst_end = (int32_t) (dst_base + dst_length);
+    /**
+     * @brief  Mean value of a Q7 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_mean_q7(q7_t *pSrc, uint32_t blockSize, q7_t *pResult);
 
-    /* Loop over the blockSize */
-    i = blockSize;
+    /**
+     * @brief  Mean value of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_mean_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult);
 
-    while (i > 0U)
+    /**
+     * @brief  Mean value of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_mean_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult);
+
+    /**
+     * @brief  Mean value of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_mean_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult);
+
+    /**
+     * @brief  Variance of the elements of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_var_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult);
+
+    /**
+     * @brief  Variance of the elements of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_var_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult);
+
+    /**
+     * @brief  Variance of the elements of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_var_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult);
+
+    /**
+     * @brief  Root Mean Square of the elements of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_rms_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult);
+
+    /**
+     * @brief  Root Mean Square of the elements of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_rms_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult);
+
+    /**
+     * @brief  Root Mean Square of the elements of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_rms_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult);
+
+    /**
+     * @brief  Standard deviation of the elements of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_std_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult);
+
+    /**
+     * @brief  Standard deviation of the elements of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_std_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult);
+
+    /**
+     * @brief  Standard deviation of the elements of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output value.
+     */
+    void arm_std_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult);
+
+    /**
+     * @brief  Floating-point complex magnitude
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_f32(float32_t *pSrc, float32_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q31 complex magnitude
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_q31(q31_t *pSrc, q31_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q15 complex magnitude
+     * @param[in]  pSrc        points to the complex input vector
+     * @param[out] pDst        points to the real output vector
+     * @param[in]  numSamples  number of complex samples in the input vector
+     */
+    void arm_cmplx_mag_q15(q15_t *pSrc, q15_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q15 complex dot product
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     * @param[out] realResult  real part of the result returned here
+     * @param[out] imagResult  imaginary part of the result returned here
+     */
+    void arm_cmplx_dot_prod_q15(q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult);
+
+    /**
+     * @brief  Q31 complex dot product
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     * @param[out] realResult  real part of the result returned here
+     * @param[out] imagResult  imaginary part of the result returned here
+     */
+    void arm_cmplx_dot_prod_q31(q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult);
+
+    /**
+     * @brief  Floating-point complex dot product
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     * @param[out] realResult  real part of the result returned here
+     * @param[out] imagResult  imaginary part of the result returned here
+     */
+    void arm_cmplx_dot_prod_f32(
+        float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult);
+
+    /**
+     * @brief  Q15 complex-by-real multiplication
+     * @param[in]  pSrcCmplx   points to the complex input vector
+     * @param[in]  pSrcReal    points to the real input vector
+     * @param[out] pCmplxDst   points to the complex output vector
+     * @param[in]  numSamples  number of samples in each vector
+     */
+    void arm_cmplx_mult_real_q15(q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q31 complex-by-real multiplication
+     * @param[in]  pSrcCmplx   points to the complex input vector
+     * @param[in]  pSrcReal    points to the real input vector
+     * @param[out] pCmplxDst   points to the complex output vector
+     * @param[in]  numSamples  number of samples in each vector
+     */
+    void arm_cmplx_mult_real_q31(q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples);
+
+    /**
+     * @brief  Floating-point complex-by-real multiplication
+     * @param[in]  pSrcCmplx   points to the complex input vector
+     * @param[in]  pSrcReal    points to the real input vector
+     * @param[out] pCmplxDst   points to the complex output vector
+     * @param[in]  numSamples  number of samples in each vector
+     */
+    void arm_cmplx_mult_real_f32(float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples);
+
+    /**
+     * @brief  Minimum value of a Q7 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] result     is output pointer
+     * @param[in]  index      is the array index of the minimum value in the input buffer.
+     */
+    void arm_min_q7(q7_t *pSrc, uint32_t blockSize, q7_t *result, uint32_t *index);
+
+    /**
+     * @brief  Minimum value of a Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output pointer
+     * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
+     */
+    void arm_min_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief  Minimum value of a Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output pointer
+     * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+     */
+    void arm_min_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief  Minimum value of a floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[in]  blockSize  is the number of samples to process
+     * @param[out] pResult    is output pointer
+     * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+     */
+    void arm_min_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief Maximum value of a Q7 vector.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[in]  blockSize  length of the input vector
+     * @param[out] pResult    maximum value returned here
+     * @param[out] pIndex     index of maximum value returned here
+     */
+    void arm_max_q7(q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief Maximum value of a Q15 vector.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[in]  blockSize  length of the input vector
+     * @param[out] pResult    maximum value returned here
+     * @param[out] pIndex     index of maximum value returned here
+     */
+    void arm_max_q15(q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief Maximum value of a Q31 vector.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[in]  blockSize  length of the input vector
+     * @param[out] pResult    maximum value returned here
+     * @param[out] pIndex     index of maximum value returned here
+     */
+    void arm_max_q31(q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief Maximum value of a floating-point vector.
+     * @param[in]  pSrc       points to the input buffer
+     * @param[in]  blockSize  length of the input vector
+     * @param[out] pResult    maximum value returned here
+     * @param[out] pIndex     index of maximum value returned here
+     */
+    void arm_max_f32(float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex);
+
+    /**
+     * @brief  Q15 complex-by-complex multiplication
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_mult_cmplx_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Q31 complex-by-complex multiplication
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_mult_cmplx_q31(q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief  Floating-point complex-by-complex multiplication
+     * @param[in]  pSrcA       points to the first input vector
+     * @param[in]  pSrcB       points to the second input vector
+     * @param[out] pDst        points to the output vector
+     * @param[in]  numSamples  number of complex samples in each vector
+     */
+    void arm_cmplx_mult_cmplx_f32(float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples);
+
+    /**
+     * @brief Converts the elements of the floating-point vector to Q31 vector.
+     * @param[in]  pSrc       points to the floating-point input vector
+     * @param[out] pDst       points to the Q31 output vector
+     * @param[in]  blockSize  length of the input vector
+     */
+    void arm_float_to_q31(float32_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Converts the elements of the floating-point vector to Q15 vector.
+     * @param[in]  pSrc       points to the floating-point input vector
+     * @param[out] pDst       points to the Q15 output vector
+     * @param[in]  blockSize  length of the input vector
+     */
+    void arm_float_to_q15(float32_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief Converts the elements of the floating-point vector to Q7 vector.
+     * @param[in]  pSrc       points to the floating-point input vector
+     * @param[out] pDst       points to the Q7 output vector
+     * @param[in]  blockSize  length of the input vector
+     */
+    void arm_float_to_q7(float32_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Converts the elements of the Q31 vector to Q15 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q31_to_q15(q31_t *pSrc, q15_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Converts the elements of the Q31 vector to Q7 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q31_to_q7(q31_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Converts the elements of the Q15 vector to floating-point vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q15_to_float(q15_t *pSrc, float32_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Converts the elements of the Q15 vector to Q31 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q15_to_q31(q15_t *pSrc, q31_t *pDst, uint32_t blockSize);
+
+    /**
+     * @brief  Converts the elements of the Q15 vector to Q7 vector.
+     * @param[in]  pSrc       is input pointer
+     * @param[out] pDst       is output pointer
+     * @param[in]  blockSize  is the number of samples to process
+     */
+    void arm_q15_to_q7(q15_t *pSrc, q7_t *pDst, uint32_t blockSize);
+
+    /**
+     * @ingroup groupInterpolation
+     */
+
+    /**
+     * @defgroup BilinearInterpolate Bilinear Interpolation
+     *
+     * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+     * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
+     * determines values between the grid points.
+     * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the
+     * y-dimension. Bilinear interpolation is often used in image processing to rescale images. The CMSIS DSP library
+     * provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+     *
+     * <b>Algorithm</b>
+     * \par
+     * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+     * For floating-point, the instance structure is defined as:
+     * <pre>
+     *   typedef struct
+     *   {
+     *     uint16_t numRows;
+     *     uint16_t numCols;
+     *     float32_t *pData;
+     * } arm_bilinear_interp_instance_f32;
+     * </pre>
+     *
+     * \par
+     * where <code>numRows</code> specifies the number of rows in the table;
+     * <code>numCols</code> specifies the number of columns in the table;
+     * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
+     * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer
+     * indexes. That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are
+     * integers.
+     *
+     * \par
+     * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
+     * <pre>
+     *     XF = floor(x)
+     *     YF = floor(y)
+     * </pre>
+     * \par
+     * The interpolated output point is computed as:
+     * <pre>
+     *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+     *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+     *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+     *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
+     * </pre>
+     * Note that the coordinates (x, y) contain integer and fractional components.
+     * The integer components specify which portion of the table to use while the
+     * fractional components control the interpolation processor.
+     *
+     * \par
+     * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+     */
+
+    /**
+     * @addtogroup BilinearInterpolate
+     * @{
+     */
+
+    /**
+     *
+     * @brief  Floating-point bilinear interpolation.
+     * @param[in,out] S  points to an instance of the interpolation structure.
+     * @param[in]     X  interpolation coordinate.
+     * @param[in]     Y  interpolation coordinate.
+     * @return out interpolated value.
+     */
+    CMSIS_INLINE __STATIC_INLINE float32_t arm_bilinear_interp_f32(const arm_bilinear_interp_instance_f32 *S,
+                                                                   float32_t X,
+                                                                   float32_t Y)
     {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
+        float32_t out;
+        float32_t f00, f01, f10, f11;
+        float32_t *pData = S->pData;
+        int32_t xIndex, yIndex, index;
+        float32_t xdiff, ydiff;
+        float32_t b1, b2, b3, b4;
 
-      /* Update the input pointer */
-      dst += dstInc;
+        xIndex = (int32_t)X;
+        yIndex = (int32_t)Y;
 
-      if (dst == (q7_t *) dst_end)
-      {
-        dst = dst_base;
-      }
+        /* Care taken for table outside boundary */
+        /* Returns zero output when values are outside table boundary */
+        if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1)) {
+            return (0);
+        }
 
-      /* Circularly update rOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
+        /* Calculation of index for two nearest points in X-direction */
+        index = (xIndex - 1) + (yIndex - 1) * S->numCols;
 
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
+        /* Read two nearest points in X-direction */
+        f00 = pData[index];
+        f01 = pData[index + 1];
 
-      /* Decrement the loop counter */
-      i--;
+        /* Calculation of index for two nearest points in Y-direction */
+        index = (xIndex - 1) + (yIndex)*S->numCols;
+
+        /* Read two nearest points in Y-direction */
+        f10 = pData[index];
+        f11 = pData[index + 1];
+
+        /* Calculation of intermediate values */
+        b1 = f00;
+        b2 = f01 - f00;
+        b3 = f10 - f00;
+        b4 = f00 - f01 - f10 + f11;
+
+        /* Calculation of fractional part in X */
+        xdiff = X - xIndex;
+
+        /* Calculation of fractional part in Y */
+        ydiff = Y - yIndex;
+
+        /* Calculation of bi-linear interpolated output */
+        out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
+
+        /* return to application */
+        return (out);
     }
 
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Floating-point complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult);
-
-
-  /**
-   * @brief  Q31 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult);
-
-
-  /**
-   * @brief  Floating-point complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult);
-
-
-  /**
-   * @brief  Q15 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Minimum value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] result     is output pointer
-   * @param[in]  index      is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * result,
-  uint32_t * index);
-
-
-  /**
-   * @brief  Minimum value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Q15 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q31 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q15 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q7 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup BilinearInterpolate Bilinear Interpolation
-   *
-   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
-   * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
-   * determines values between the grid points.
-   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
-   * Bilinear interpolation is often used in image processing to rescale images.
-   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
-   *
-   * <b>Algorithm</b>
-   * \par
-   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
-   * For floating-point, the instance structure is defined as:
-   * <pre>
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   * </pre>
-   *
-   * \par
-   * where <code>numRows</code> specifies the number of rows in the table;
-   * <code>numCols</code> specifies the number of columns in the table;
-   * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
-   * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
-   * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
-   *
-   * \par
-   * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
-   * <pre>
-   *     XF = floor(x)
-   *     YF = floor(y)
-   * </pre>
-   * \par
-   * The interpolated output point is computed as:
-   * <pre>
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   * </pre>
-   * Note that the coordinates (x, y) contain integer and fractional components.
-   * The integer components specify which portion of the table to use while the
-   * fractional components control the interpolation processor.
-   *
-   * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
-   */
-
-  /**
-   * @addtogroup BilinearInterpolate
-   * @{
-   */
-
-
-  /**
-  *
-  * @brief  Floating-point bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate.
-  * @param[in]     Y  interpolation coordinate.
-  * @return out interpolated value.
-  */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_bilinear_interp_f32(
-  const arm_bilinear_interp_instance_f32 * S,
-  float32_t X,
-  float32_t Y)
-  {
-    float32_t out;
-    float32_t f00, f01, f10, f11;
-    float32_t *pData = S->pData;
-    int32_t xIndex, yIndex, index;
-    float32_t xdiff, ydiff;
-    float32_t b1, b2, b3, b4;
-
-    xIndex = (int32_t) X;
-    yIndex = (int32_t) Y;
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
+    /**
+     *
+     * @brief  Q31 bilinear interpolation.
+     * @param[in,out] S  points to an instance of the interpolation structure.
+     * @param[in]     X  interpolation coordinate in 12.20 format.
+     * @param[in]     Y  interpolation coordinate in 12.20 format.
+     * @return out interpolated value.
+     */
+    CMSIS_INLINE __STATIC_INLINE q31_t arm_bilinear_interp_q31(arm_bilinear_interp_instance_q31 *S, q31_t X, q31_t Y)
     {
-      return (0);
+        q31_t out;                   /* Temporary output */
+        q31_t acc = 0;               /* output */
+        q31_t xfract, yfract;        /* X, Y fractional parts */
+        q31_t x1, x2, y1, y2;        /* Nearest output values */
+        int32_t rI, cI;              /* Row and column indices */
+        q31_t *pYData  = S->pData;   /* pointer to output table values */
+        uint32_t nCols = S->numCols; /* num of rows */
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+        /* Care taken for table outside boundary */
+        /* Returns zero output when values are outside table boundary */
+        if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) {
+            return (0);
+        }
+
+        /* 20 bits for the fractional part */
+        /* shift left xfract by 11 to keep 1.31 format */
+        xfract = (X & 0x000FFFFF) << 11U;
+
+        /* Read two nearest output values from the index */
+        x1 = pYData[(rI) + (int32_t)nCols * (cI)];
+        x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
+
+        /* 20 bits for the fractional part */
+        /* shift left yfract by 11 to keep 1.31 format */
+        yfract = (Y & 0x000FFFFF) << 11U;
+
+        /* Read two nearest output values from the index */
+        y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)];
+        y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
+
+        /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
+        out = ((q31_t)(((q63_t)x1 * (0x7FFFFFFF - xfract)) >> 32));
+        acc = ((q31_t)(((q63_t)out * (0x7FFFFFFF - yfract)) >> 32));
+
+        /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
+        out = ((q31_t)((q63_t)x2 * (0x7FFFFFFF - yfract) >> 32));
+        acc += ((q31_t)((q63_t)out * (xfract) >> 32));
+
+        /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
+        out = ((q31_t)((q63_t)y1 * (0x7FFFFFFF - xfract) >> 32));
+        acc += ((q31_t)((q63_t)out * (yfract) >> 32));
+
+        /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
+        out = ((q31_t)((q63_t)y2 * (xfract) >> 32));
+        acc += ((q31_t)((q63_t)out * (yfract) >> 32));
+
+        /* Convert acc to 1.31(q31) format */
+        return ((q31_t)(acc << 2));
     }
 
-    /* Calculation of index for two nearest points in X-direction */
-    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
-    /* Read two nearest points in X-direction */
-    f00 = pData[index];
-    f01 = pData[index + 1];
-
-    /* Calculation of index for two nearest points in Y-direction */
-    index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
-    /* Read two nearest points in Y-direction */
-    f10 = pData[index];
-    f11 = pData[index + 1];
-
-    /* Calculation of intermediate values */
-    b1 = f00;
-    b2 = f01 - f00;
-    b3 = f10 - f00;
-    b4 = f00 - f01 - f10 + f11;
-
-    /* Calculation of fractional part in X */
-    xdiff = X - xIndex;
-
-    /* Calculation of fractional part in Y */
-    ydiff = Y - yIndex;
-
-    /* Calculation of bi-linear interpolated output */
-    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
-    /* return to application */
-    return (out);
-  }
-
-
-  /**
-  *
-  * @brief  Q31 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_bilinear_interp_q31(
-  arm_bilinear_interp_instance_q31 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q31_t out;                                   /* Temporary output */
-    q31_t acc = 0;                               /* output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q31_t x1, x2, y1, y2;                        /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q31_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    /**
+     * @brief  Q15 bilinear interpolation.
+     * @param[in,out] S  points to an instance of the interpolation structure.
+     * @param[in]     X  interpolation coordinate in 12.20 format.
+     * @param[in]     Y  interpolation coordinate in 12.20 format.
+     * @return out interpolated value.
+     */
+    CMSIS_INLINE __STATIC_INLINE q15_t arm_bilinear_interp_q15(arm_bilinear_interp_instance_q15 *S, q31_t X, q31_t Y)
     {
-      return (0);
+        q63_t acc = 0;               /* output */
+        q31_t out;                   /* Temporary output */
+        q15_t x1, x2, y1, y2;        /* Nearest output values */
+        q31_t xfract, yfract;        /* X, Y fractional parts */
+        int32_t rI, cI;              /* Row and column indices */
+        q15_t *pYData  = S->pData;   /* pointer to output table values */
+        uint32_t nCols = S->numCols; /* num of rows */
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+        /* Care taken for table outside boundary */
+        /* Returns zero output when values are outside table boundary */
+        if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) {
+            return (0);
+        }
+
+        /* 20 bits for the fractional part */
+        /* xfract should be in 12.20 format */
+        xfract = (X & 0x000FFFFF);
+
+        /* Read two nearest output values from the index */
+        x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)];
+        x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+        /* 20 bits for the fractional part */
+        /* yfract should be in 12.20 format */
+        yfract = (Y & 0x000FFFFF);
+
+        /* Read two nearest output values from the index */
+        y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)];
+        y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+        /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
+
+        /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
+        /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
+        out = (q31_t)(((q63_t)x1 * (0xFFFFF - xfract)) >> 4U);
+        acc = ((q63_t)out * (0xFFFFF - yfract));
+
+        /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
+        out = (q31_t)(((q63_t)x2 * (0xFFFFF - yfract)) >> 4U);
+        acc += ((q63_t)out * (xfract));
+
+        /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
+        out = (q31_t)(((q63_t)y1 * (0xFFFFF - xfract)) >> 4U);
+        acc += ((q63_t)out * (yfract));
+
+        /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
+        out = (q31_t)(((q63_t)y2 * (xfract)) >> 4U);
+        acc += ((q63_t)out * (yfract));
+
+        /* acc is in 13.51 format and down shift acc by 36 times */
+        /* Convert out to 1.15 format */
+        return ((q15_t)(acc >> 36));
     }
 
-    /* 20 bits for the fractional part */
-    /* shift left xfract by 11 to keep 1.31 format */
-    xfract = (X & 0x000FFFFF) << 11U;
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];
-    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* shift left yfract by 11 to keep 1.31 format */
-    yfract = (Y & 0x000FFFFF) << 11U;
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];
-    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
-    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));
-    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
-    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
-    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* Convert acc to 1.31(q31) format */
-    return ((q31_t)(acc << 2));
-  }
-
-
-  /**
-  * @brief  Q15 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_bilinear_interp_q15(
-  arm_bilinear_interp_instance_q15 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q15_t x1, x2, y1, y2;                        /* Nearest output values */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    int32_t rI, cI;                              /* Row and column indices */
-    q15_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    /**
+     * @brief  Q7 bilinear interpolation.
+     * @param[in,out] S  points to an instance of the interpolation structure.
+     * @param[in]     X  interpolation coordinate in 12.20 format.
+     * @param[in]     Y  interpolation coordinate in 12.20 format.
+     * @return out interpolated value.
+     */
+    CMSIS_INLINE __STATIC_INLINE q7_t arm_bilinear_interp_q7(arm_bilinear_interp_instance_q7 *S, q31_t X, q31_t Y)
     {
-      return (0);
+        q63_t acc = 0;               /* output */
+        q31_t out;                   /* Temporary output */
+        q31_t xfract, yfract;        /* X, Y fractional parts */
+        q7_t x1, x2, y1, y2;         /* Nearest output values */
+        int32_t rI, cI;              /* Row and column indices */
+        q7_t *pYData   = S->pData;   /* pointer to output table values */
+        uint32_t nCols = S->numCols; /* num of rows */
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+        /* Input is in 12.20 format */
+        /* 12 bits for the table index */
+        /* Index value calculation */
+        cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+        /* Care taken for table outside boundary */
+        /* Returns zero output when values are outside table boundary */
+        if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) {
+            return (0);
+        }
+
+        /* 20 bits for the fractional part */
+        /* xfract should be in 12.20 format */
+        xfract = (X & (q31_t)0x000FFFFF);
+
+        /* Read two nearest output values from the index */
+        x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)];
+        x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+        /* 20 bits for the fractional part */
+        /* yfract should be in 12.20 format */
+        yfract = (Y & (q31_t)0x000FFFFF);
+
+        /* Read two nearest output values from the index */
+        y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)];
+        y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+        /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
+        out = ((x1 * (0xFFFFF - xfract)));
+        acc = (((q63_t)out * (0xFFFFF - yfract)));
+
+        /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
+        out = ((x2 * (0xFFFFF - yfract)));
+        acc += (((q63_t)out * (xfract)));
+
+        /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
+        out = ((y1 * (0xFFFFF - xfract)));
+        acc += (((q63_t)out * (yfract)));
+
+        /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
+        out = ((y2 * (yfract)));
+        acc += (((q63_t)out * (xfract)));
+
+        /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
+        return ((q7_t)(acc >> 40));
     }
 
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
-    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
-    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
-    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4U);
-    acc = ((q63_t) out * (0xFFFFF - yfract));
-
-    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4U);
-    acc += ((q63_t) out * (xfract));
-
-    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4U);
-    acc += ((q63_t) out * (yfract));
-
-    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U);
-    acc += ((q63_t) out * (yfract));
-
-    /* acc is in 13.51 format and down shift acc by 36 times */
-    /* Convert out to 1.15 format */
-    return ((q15_t)(acc >> 36));
-  }
-
-
-  /**
-  * @brief  Q7 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  CMSIS_INLINE __STATIC_INLINE q7_t arm_bilinear_interp_q7(
-  arm_bilinear_interp_instance_q7 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q7_t x1, x2, y1, y2;                         /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q7_t *pYData = S->pData;                     /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
-    out = ((x1 * (0xFFFFF - xfract)));
-    acc = (((q63_t) out * (0xFFFFF - yfract)));
-
-    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
-    out = ((x2 * (0xFFFFF - yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y1 * (0xFFFFF - xfract)));
-    acc += (((q63_t) out * (yfract)));
-
-    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y2 * (yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
-    return ((q7_t)(acc >> 40));
-  }
-
-  /**
-   * @} end of BilinearInterpolate group
-   */
-
+    /**
+     * @} end of BilinearInterpolate group
+     */
 
 /* SMMLAR */
-#define multAcc_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+#define multAcc_32x32_keep32_R(a, x, y) a = (q31_t)(((((q63_t)a) << 32) + ((q63_t)x * y) + 0x80000000LL) >> 32)
 
 /* SMMLSR */
-#define multSub_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+#define multSub_32x32_keep32_R(a, x, y) a = (q31_t)(((((q63_t)a) << 32) - ((q63_t)x * y) + 0x80000000LL) >> 32)
 
 /* SMMULR */
-#define mult_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+#define mult_32x32_keep32_R(a, x, y) a = (q31_t)(((q63_t)x * y + 0x80000000LL) >> 32)
 
 /* SMMLA */
-#define multAcc_32x32_keep32(a, x, y) \
-    a += (q31_t) (((q63_t) x * y) >> 32)
+#define multAcc_32x32_keep32(a, x, y) a += (q31_t)(((q63_t)x * y) >> 32)
 
 /* SMMLS */
-#define multSub_32x32_keep32(a, x, y) \
-    a -= (q31_t) (((q63_t) x * y) >> 32)
+#define multSub_32x32_keep32(a, x, y) a -= (q31_t)(((q63_t)x * y) >> 32)
 
 /* SMMUL */
-#define mult_32x32_keep32(a, x, y) \
-    a = (q31_t) (((q63_t) x * y ) >> 32)
+#define mult_32x32_keep32(a, x, y) a = (q31_t)(((q63_t)x * y) >> 32)
 
+#if defined(__CC_ARM)
+/* Enter low optimization region - place directly above function definition */
+#if defined(ARM_MATH_CM4) || defined(ARM_MATH_CM7)
+#define LOW_OPTIMIZATION_ENTER _Pragma("push") _Pragma("O1")
+#else
+#define LOW_OPTIMIZATION_ENTER
+#endif
 
-#if   defined ( __CC_ARM )
-  /* Enter low optimization region - place directly above function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("push")         \
-       _Pragma ("O1")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
+/* Exit low optimization region - place directly after end of function definition */
+#if defined(ARM_MATH_CM4) || defined(ARM_MATH_CM7)
+#define LOW_OPTIMIZATION_EXIT _Pragma("pop")
+#else
+#define LOW_OPTIMIZATION_EXIT
+#endif
 
-  /* Exit low optimization region - place directly after end of function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
-    #define LOW_OPTIMIZATION_EXIT \
-       _Pragma ("pop")
-  #else
-    #define LOW_OPTIMIZATION_EXIT
-  #endif
+/* Enter low optimization region - place directly above function definition */
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
 
-  /* Enter low optimization region - place directly above function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+/* Exit low optimization region - place directly after end of function definition */
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__GNUC__)
+#define LOW_OPTIMIZATION_ENTER __attribute__((optimize("-O1")))
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-#elif defined ( __GNUC__ )
-  #define LOW_OPTIMIZATION_ENTER \
-       __attribute__(( optimize("-O1") ))
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__ICCARM__)
+/* Enter low optimization region - place directly above function definition */
+#if defined(ARM_MATH_CM4) || defined(ARM_MATH_CM7)
+#define LOW_OPTIMIZATION_ENTER _Pragma("optimize=low")
+#else
+#define LOW_OPTIMIZATION_ENTER
+#endif
 
-#elif defined ( __ICCARM__ )
-  /* Enter low optimization region - place directly above function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
+/* Exit low optimization region - place directly after end of function definition */
+#define LOW_OPTIMIZATION_EXIT
 
-  /* Exit low optimization region - place directly after end of function definition */
-  #define LOW_OPTIMIZATION_EXIT
+/* Enter low optimization region - place directly above function definition */
+#if defined(ARM_MATH_CM4) || defined(ARM_MATH_CM7)
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER _Pragma("optimize=low")
+#else
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#endif
 
-  /* Enter low optimization region - place directly above function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #endif
+/* Exit low optimization region - place directly after end of function definition */
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__TI_ARM__)
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-#elif defined ( __TI_ARM__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__CSMC__)
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
-#elif defined ( __CSMC__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __TASKING__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#elif defined(__TASKING__)
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 
 #endif
 
-
-#ifdef   __cplusplus
+#ifdef __cplusplus
 }
 #endif
 
 /* Compiler specific diagnostic adjustment */
-#if   defined ( __CC_ARM )
+#if defined(__CC_ARM)
 
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
 
-#elif defined ( __GNUC__ )
+#elif defined(__GNUC__)
 #pragma GCC diagnostic pop
 
-#elif defined ( __ICCARM__ )
+#elif defined(__ICCARM__)
 
-#elif defined ( __TI_ARM__ )
+#elif defined(__TI_ARM__)
 
-#elif defined ( __CSMC__ )
+#elif defined(__CSMC__)
 
-#elif defined ( __TASKING__ )
+#elif defined(__TASKING__)
 
 #else
-  #error Unknown compiler
+#error Unknown compiler
 #endif
 
 #endif /* _ARM_MATH_H */
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h b/module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h
index 093d35b9e..ab4628750 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_armcc.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_armcc.h
+                                                                              * @brief    CMSIS compiler ARMCC (Arm
+                                                                              *Compiler 5) header file
+                                                                              * @version  V5.0.4
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
@@ -25,80 +26,78 @@
 #ifndef __CMSIS_ARMCC_H
 #define __CMSIS_ARMCC_H
 
-
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
+#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
 #endif
 
 /* CMSIS compiler control architecture macros */
-#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
-     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
-  #define __ARM_ARCH_6M__           1
+#if ((defined(__TARGET_ARCH_6_M) && (__TARGET_ARCH_6_M == 1)) ||                                                       \
+     (defined(__TARGET_ARCH_6S_M) && (__TARGET_ARCH_6S_M == 1)))
+#define __ARM_ARCH_6M__ 1
 #endif
 
-#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
-  #define __ARM_ARCH_7M__           1
+#if (defined(__TARGET_ARCH_7_M) && (__TARGET_ARCH_7_M == 1))
+#define __ARM_ARCH_7M__ 1
 #endif
 
-#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
-  #define __ARM_ARCH_7EM__          1
+#if (defined(__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
+#define __ARM_ARCH_7EM__ 1
 #endif
 
-  /* __ARM_ARCH_8M_BASE__  not applicable */
-  /* __ARM_ARCH_8M_MAIN__  not applicable */
-
+/* __ARM_ARCH_8M_BASE__  not applicable */
+/* __ARM_ARCH_8M_MAIN__  not applicable */
 
 /* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
+#ifndef __ASM
+#define __ASM __asm
 #endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
+#ifndef __INLINE
+#define __INLINE __inline
 #endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static __inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   static __forceinline
-#endif           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __declspec(noreturn)
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE static __forceinline
 #endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
+#ifndef __NO_RETURN
+#define __NO_RETURN __declspec(noreturn)
 #endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
+#ifndef __USED
+#define __USED __attribute__((used))
 #endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
+#ifndef __WEAK
+#define __WEAK __attribute__((weak))
 #endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        __packed struct
+#ifndef __PACKED
+#define __PACKED __attribute__((packed))
 #endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         __packed union
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT __packed struct
 #endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
+#ifndef __PACKED_UNION
+#define __PACKED_UNION __packed union
 #endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
 #endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
+#ifndef __UNALIGNED_UINT16_WRITE
+#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
 #endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
+#ifndef __UNALIGNED_UINT16_READ
+#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
 #endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
+#ifndef __UNALIGNED_UINT32_WRITE
+#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
 #endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#ifndef __UNALIGNED_UINT32_READ
+#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
 #endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
+#ifndef __ALIGNED
+#define __ALIGNED(x) __attribute__((aligned(x)))
+#endif
+#ifndef __RESTRICT
+#define __RESTRICT __restrict
 #endif
 
 /* ###########################  Core Function Access  ########################### */
@@ -114,7 +113,6 @@
  */
 /* intrinsic void __enable_irq();     */
 
-
 /**
   \brief   Disable IRQ Interrupts
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
@@ -129,11 +127,10 @@
  */
 __STATIC_INLINE uint32_t __get_CONTROL(void)
 {
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
+    register uint32_t __regControl __ASM("control");
+    return (__regControl);
 }
 
-
 /**
   \brief   Set Control Register
   \details Writes the given value to the Control Register.
@@ -141,11 +138,10 @@ __STATIC_INLINE uint32_t __get_CONTROL(void)
  */
 __STATIC_INLINE void __set_CONTROL(uint32_t control)
 {
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
+    register uint32_t __regControl __ASM("control");
+    __regControl = control;
 }
 
-
 /**
   \brief   Get IPSR Register
   \details Returns the content of the IPSR Register.
@@ -153,11 +149,10 @@ __STATIC_INLINE void __set_CONTROL(uint32_t control)
  */
 __STATIC_INLINE uint32_t __get_IPSR(void)
 {
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
+    register uint32_t __regIPSR __ASM("ipsr");
+    return (__regIPSR);
 }
 
-
 /**
   \brief   Get APSR Register
   \details Returns the content of the APSR Register.
@@ -165,11 +160,10 @@ __STATIC_INLINE uint32_t __get_IPSR(void)
  */
 __STATIC_INLINE uint32_t __get_APSR(void)
 {
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
+    register uint32_t __regAPSR __ASM("apsr");
+    return (__regAPSR);
 }
 
-
 /**
   \brief   Get xPSR Register
   \details Returns the content of the xPSR Register.
@@ -177,11 +171,10 @@ __STATIC_INLINE uint32_t __get_APSR(void)
  */
 __STATIC_INLINE uint32_t __get_xPSR(void)
 {
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
+    register uint32_t __regXPSR __ASM("xpsr");
+    return (__regXPSR);
 }
 
-
 /**
   \brief   Get Process Stack Pointer
   \details Returns the current value of the Process Stack Pointer (PSP).
@@ -189,11 +182,10 @@ __STATIC_INLINE uint32_t __get_xPSR(void)
  */
 __STATIC_INLINE uint32_t __get_PSP(void)
 {
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
+    register uint32_t __regProcessStackPointer __ASM("psp");
+    return (__regProcessStackPointer);
 }
 
-
 /**
   \brief   Set Process Stack Pointer
   \details Assigns the given value to the Process Stack Pointer (PSP).
@@ -201,11 +193,10 @@ __STATIC_INLINE uint32_t __get_PSP(void)
  */
 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
 {
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
+    register uint32_t __regProcessStackPointer __ASM("psp");
+    __regProcessStackPointer = topOfProcStack;
 }
 
-
 /**
   \brief   Get Main Stack Pointer
   \details Returns the current value of the Main Stack Pointer (MSP).
@@ -213,11 +204,10 @@ __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
  */
 __STATIC_INLINE uint32_t __get_MSP(void)
 {
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
+    register uint32_t __regMainStackPointer __ASM("msp");
+    return (__regMainStackPointer);
 }
 
-
 /**
   \brief   Set Main Stack Pointer
   \details Assigns the given value to the Main Stack Pointer (MSP).
@@ -225,11 +215,10 @@ __STATIC_INLINE uint32_t __get_MSP(void)
  */
 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
 {
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
+    register uint32_t __regMainStackPointer __ASM("msp");
+    __regMainStackPointer = topOfMainStack;
 }
 
-
 /**
   \brief   Get Priority Mask
   \details Returns the current state of the priority mask bit from the Priority Mask Register.
@@ -237,11 +226,10 @@ __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
  */
 __STATIC_INLINE uint32_t __get_PRIMASK(void)
 {
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
+    register uint32_t __regPriMask __ASM("primask");
+    return (__regPriMask);
 }
 
-
 /**
   \brief   Set Priority Mask
   \details Assigns the given value to the Priority Mask Register.
@@ -249,42 +237,37 @@ __STATIC_INLINE uint32_t __get_PRIMASK(void)
  */
 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
 {
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
+    register uint32_t __regPriMask __ASM("primask");
+    __regPriMask = (priMask);
 }
 
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)))
 
 /**
   \brief   Enable FIQ
   \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
-#define __enable_fault_irq                __enable_fiq
-
+#define __enable_fault_irq __enable_fiq
 
 /**
   \brief   Disable FIQ
   \details Disables FIQ interrupts by setting the F-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
-#define __disable_fault_irq               __disable_fiq
-
+#define __disable_fault_irq __disable_fiq
 
 /**
   \brief   Get Base Priority
   \details Returns the current value of the Base Priority register.
   \return               Base Priority register value
  */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+__STATIC_INLINE uint32_t __get_BASEPRI(void)
 {
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
+    register uint32_t __regBasePri __ASM("basepri");
+    return (__regBasePri);
 }
 
-
 /**
   \brief   Set Base Priority
   \details Assigns the given value to the Base Priority register.
@@ -292,11 +275,10 @@ __STATIC_INLINE uint32_t  __get_BASEPRI(void)
  */
 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
 {
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xFFU);
+    register uint32_t __regBasePri __ASM("basepri");
+    __regBasePri = (basePri & 0xFFU);
 }
 
-
 /**
   \brief   Set Base Priority with condition
   \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
@@ -305,11 +287,10 @@ __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
  */
 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
 {
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xFFU);
+    register uint32_t __regBasePriMax __ASM("basepri_max");
+    __regBasePriMax = (basePri & 0xFFU);
 }
 
-
 /**
   \brief   Get Fault Mask
   \details Returns the current value of the Fault Mask register.
@@ -317,11 +298,10 @@ __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
  */
 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
 {
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
+    register uint32_t __regFaultMask __ASM("faultmask");
+    return (__regFaultMask);
 }
 
-
 /**
   \brief   Set Fault Mask
   \details Assigns the given value to the Fault Mask register.
@@ -329,15 +309,14 @@ __STATIC_INLINE uint32_t __get_FAULTMASK(void)
  */
 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
 {
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1U);
+    register uint32_t __regFaultMask __ASM("faultmask");
+    __regFaultMask = (faultMask & (uint32_t)1U);
 }
 
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) ||                                                  \
            (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 
-
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+#if ((defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)))
 
 /**
   \brief   Get FPSCR
@@ -346,16 +325,14 @@ __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
  */
 __STATIC_INLINE uint32_t __get_FPSCR(void)
 {
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+    register uint32_t __regfpscr __ASM("fpscr");
+    return (__regfpscr);
 #else
-   return(0U);
+    return (0U);
 #endif
 }
 
-
 /**
   \brief   Set FPSCR
   \details Assigns the given value to the Floating Point Status/Control register.
@@ -363,22 +340,18 @@ __STATIC_INLINE uint32_t __get_FPSCR(void)
  */
 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
 {
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+    register uint32_t __regfpscr __ASM("fpscr");
+    __regfpscr = (fpscr);
 #else
-  (void)fpscr;
+    (void)fpscr;
 #endif
 }
 
 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 
-
-
 /*@} end of CMSIS_Core_RegAccFunctions */
 
-
 /* ##########################  Core Instruction Access  ######################### */
 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
   Access to dedicated instructions
@@ -389,30 +362,26 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
   \brief   No Operation
   \details No Operation does nothing. This instruction can be used for code alignment purposes.
  */
-#define __NOP                             __nop
-
+#define __NOP __nop
 
 /**
   \brief   Wait For Interrupt
   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
  */
-#define __WFI                             __wfi
-
+#define __WFI __wfi
 
 /**
   \brief   Wait For Event
   \details Wait For Event is a hint instruction that permits the processor to enter
            a low-power state until one of a number of events occurs.
  */
-#define __WFE                             __wfe
-
+#define __WFE __wfe
 
 /**
   \brief   Send Event
   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  */
-#define __SEV                             __sev
-
+#define __SEV __sev
 
 /**
   \brief   Instruction Synchronization Barrier
@@ -420,43 +389,44 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
            so that all instructions following the ISB are fetched from cache or memory,
            after the instruction has been completed.
  */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
+#define __ISB()                                                                                                        \
+    do {                                                                                                               \
+        __schedule_barrier();                                                                                          \
+        __isb(0xF);                                                                                                    \
+        __schedule_barrier();                                                                                          \
+    } while (0U)
 
 /**
   \brief   Data Synchronization Barrier
   \details Acts as a special kind of Data Memory Barrier.
            It completes when all explicit memory accesses before this instruction complete.
  */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
+#define __DSB()                                                                                                        \
+    do {                                                                                                               \
+        __schedule_barrier();                                                                                          \
+        __dsb(0xF);                                                                                                    \
+        __schedule_barrier();                                                                                          \
+    } while (0U)
 
 /**
   \brief   Data Memory Barrier
   \details Ensures the apparent order of the explicit memory operations before
            and after the instruction, without ensuring their completion.
  */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
+#define __DMB()                                                                                                        \
+    do {                                                                                                               \
+        __schedule_barrier();                                                                                          \
+        __dmb(0xF);                                                                                                    \
+        __schedule_barrier();                                                                                          \
+    } while (0U)
 
-                  
 /**
   \brief   Reverse byte order (32 bit)
   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
   \param [in]    value  Value to reverse
   \return               Reversed value
  */
-#define __REV                             __rev
-
+#define __REV __rev
 
 /**
   \brief   Reverse byte order (16 bit)
@@ -467,36 +437,29 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
 #ifndef __NO_EMBEDDED_ASM
 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
 {
-  rev16 r0, r0
-  bx lr
+    rev16 r0, r0 bx lr
 }
 #endif
 
-
 /**
   \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes
+  0x8000. \param [in]    value  Value to reverse \return               Reversed value
  */
 #ifndef __NO_EMBEDDED_ASM
 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
 {
-  revsh r0, r0
-  bx lr
+    revsh r0, r0 bx lr
 }
 #endif
 
-
 /**
   \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of
+  bits. \param [in]    op1  Value to rotate \param [in]    op2  Number of Bits to rotate \return               Rotated
+  value
  */
-#define __ROR                             __ror
-
+#define __ROR __ror
 
 /**
   \brief   Breakpoint
@@ -505,8 +468,7 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(in
   \param [in]    value  is ignored by the processor.
                  If required, a debugger can use it to store additional information about the breakpoint.
  */
-#define __BKPT(value)                       __breakpoint(value)
-
+#define __BKPT(value) __breakpoint(value)
 
 /**
   \brief   Reverse bit order of value
@@ -514,39 +476,34 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(in
   \param [in]    value  Value to reverse
   \return               Reversed value
  */
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __RBIT                          __rbit
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)))
+#define __RBIT __rbit
 #else
 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
 {
-  uint32_t result;
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+    uint32_t result;
+    uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-  return result;
+    result = value; /* r will be reversed bits of v; first get LSB of v */
+    for (value >>= 1U; value != 0U; value >>= 1U) {
+        result <<= 1U;
+        result |= value & 1U;
+        s--;
+    }
+    result <<= s; /* shift when v's highest bits are zero */
+    return result;
 }
 #endif
 
-
 /**
   \brief   Count leading zeros
   \details Counts the number of leading zeros of a data value.
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ                             __clz
+#define __CLZ __clz
 
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)))
 
 /**
   \brief   LDR Exclusive (8 bit)
@@ -555,12 +512,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return             value of type uint8_t at (*ptr)
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
+#define __LDREXB(ptr) ((uint8_t)__ldrex(ptr))
 #else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
+#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731")((uint8_t)__ldrex(ptr)) _Pragma("pop")
 #endif
 
-
 /**
   \brief   LDR Exclusive (16 bit)
   \details Executes a exclusive LDR instruction for 16 bit values.
@@ -568,12 +524,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return        value of type uint16_t at (*ptr)
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
+#define __LDREXH(ptr) ((uint16_t)__ldrex(ptr))
 #else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
+#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731")((uint16_t)__ldrex(ptr)) _Pragma("pop")
 #endif
 
-
 /**
   \brief   LDR Exclusive (32 bit)
   \details Executes a exclusive LDR instruction for 32 bit values.
@@ -581,12 +536,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return        value of type uint32_t at (*ptr)
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
+#define __LDREXW(ptr) ((uint32_t)__ldrex(ptr))
 #else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
+#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731")((uint32_t)__ldrex(ptr)) _Pragma("pop")
 #endif
 
-
 /**
   \brief   STR Exclusive (8 bit)
   \details Executes a exclusive STR instruction for 8 bit values.
@@ -596,12 +550,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return          1  Function failed
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
+#define __STREXB(value, ptr) __strex(value, ptr)
 #else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
 #endif
 
-
 /**
   \brief   STR Exclusive (16 bit)
   \details Executes a exclusive STR instruction for 16 bit values.
@@ -611,12 +564,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return          1  Function failed
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
+#define __STREXH(value, ptr) __strex(value, ptr)
 #else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
 #endif
 
-
 /**
   \brief   STR Exclusive (32 bit)
   \details Executes a exclusive STR instruction for 32 bit values.
@@ -626,18 +578,16 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \return          1  Function failed
  */
 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
+#define __STREXW(value, ptr) __strex(value, ptr)
 #else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
 #endif
 
-
 /**
   \brief   Remove the exclusive lock
   \details Removes the exclusive lock which is created by LDREX.
  */
-#define __CLREX                           __clrex
-
+#define __CLREX __clrex
 
 /**
   \brief   Signed Saturate
@@ -646,8 +596,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \param [in]    sat  Bit position to saturate to (1..32)
   \return             Saturated value
  */
-#define __SSAT                            __ssat
-
+#define __SSAT __ssat
 
 /**
   \brief   Unsigned Saturate
@@ -656,8 +605,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
   \param [in]    sat  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-#define __USAT                            __usat
-
+#define __USAT __usat
 
 /**
   \brief   Rotate Right with Extend (32 bit)
@@ -669,20 +617,17 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
 #ifndef __NO_EMBEDDED_ASM
 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
 {
-  rrx r0, r0
-  bx lr
+    rrx r0, r0 bx lr
 }
 #endif
 
-
 /**
   \brief   LDRT Unprivileged (8 bit)
   \details Executes a Unprivileged LDRT instruction for 8 bit value.
   \param [in]    ptr  Pointer to data
   \return             value of type uint8_t at (*ptr)
  */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
+#define __LDRBT(ptr) ((uint8_t)__ldrt(ptr))
 
 /**
   \brief   LDRT Unprivileged (16 bit)
@@ -690,8 +635,7 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
   \param [in]    ptr  Pointer to data
   \return        value of type uint16_t at (*ptr)
  */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
+#define __LDRHT(ptr) ((uint16_t)__ldrt(ptr))
 
 /**
   \brief   LDRT Unprivileged (32 bit)
@@ -699,8 +643,7 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
   \param [in]    ptr  Pointer to data
   \return        value of type uint32_t at (*ptr)
  */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
+#define __LDRT(ptr) ((uint32_t)__ldrt(ptr))
 
 /**
   \brief   STRT Unprivileged (8 bit)
@@ -708,8 +651,7 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
   \param [in]  value  Value to store
   \param [in]    ptr  Pointer to location
  */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
+#define __STRBT(value, ptr) __strt(value, ptr)
 
 /**
   \brief   STRT Unprivileged (16 bit)
@@ -717,8 +659,7 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
   \param [in]  value  Value to store
   \param [in]    ptr  Pointer to location
  */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
+#define __STRHT(value, ptr) __strt(value, ptr)
 
 /**
   \brief   STRT Unprivileged (32 bit)
@@ -726,10 +667,10 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
   \param [in]  value  Value to store
   \param [in]    ptr  Pointer to location
  */
-#define __STRT(value, ptr)                __strt(value, ptr)
+#define __STRT(value, ptr) __strt(value, ptr)
 
-#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) ||                                                   \
+          (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 
 /**
   \brief   Signed Saturate
@@ -740,20 +681,17 @@ __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint3
  */
 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
 {
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
+    if ((sat >= 1U) && (sat <= 32U)) {
+        const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+        const int32_t min = -1 - max;
+        if (val > max) {
+            return max;
+        }
+        else if (val < min) {
+            return min;
+        }
     }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
+    return val;
 }
 
 /**
@@ -765,106 +703,100 @@ __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint3
  */
 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
 {
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
+    if (sat <= 31U) {
+        const uint32_t max = ((1U << sat) - 1U);
+        if (val > (int32_t)max) {
+            return max;
+        }
+        else if (val < 0) {
+            return 0U;
+        }
     }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
+    return (uint32_t)val;
 }
 
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) ||                                                  \
            (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 
 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 
-
 /* ###################  Compiler specific Intrinsics  ########################### */
 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
   Access to dedicated SIMD instructions
   @{
 */
 
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+#if ((defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)))
 
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
+#define __SADD8   __sadd8
+#define __QADD8   __qadd8
+#define __SHADD8  __shadd8
+#define __UADD8   __uadd8
+#define __UQADD8  __uqadd8
+#define __UHADD8  __uhadd8
+#define __SSUB8   __ssub8
+#define __QSUB8   __qsub8
+#define __SHSUB8  __shsub8
+#define __USUB8   __usub8
+#define __UQSUB8  __uqsub8
+#define __UHSUB8  __uhsub8
+#define __SADD16  __sadd16
+#define __QADD16  __qadd16
+#define __SHADD16 __shadd16
+#define __UADD16  __uadd16
+#define __UQADD16 __uqadd16
+#define __UHADD16 __uhadd16
+#define __SSUB16  __ssub16
+#define __QSUB16  __qsub16
+#define __SHSUB16 __shsub16
+#define __USUB16  __usub16
+#define __UQSUB16 __uqsub16
+#define __UHSUB16 __uhsub16
+#define __SASX    __sasx
+#define __QASX    __qasx
+#define __SHASX   __shasx
+#define __UASX    __uasx
+#define __UQASX   __uqasx
+#define __UHASX   __uhasx
+#define __SSAX    __ssax
+#define __QSAX    __qsax
+#define __SHSAX   __shsax
+#define __USAX    __usax
+#define __UQSAX   __uqsax
+#define __UHSAX   __uhsax
+#define __USAD8   __usad8
+#define __USADA8  __usada8
+#define __SSAT16  __ssat16
+#define __USAT16  __usat16
+#define __UXTB16  __uxtb16
+#define __UXTAB16 __uxtab16
+#define __SXTB16  __sxtb16
+#define __SXTAB16 __sxtab16
+#define __SMUAD   __smuad
+#define __SMUADX  __smuadx
+#define __SMLAD   __smlad
+#define __SMLADX  __smladx
+#define __SMLALD  __smlald
+#define __SMLALDX __smlaldx
+#define __SMUSD   __smusd
+#define __SMUSDX  __smusdx
+#define __SMLSD   __smlsd
+#define __SMLSDX  __smlsdx
+#define __SMLSLD  __smlsld
+#define __SMLSLDX __smlsldx
+#define __SEL     __sel
+#define __QADD    __qadd
+#define __QSUB    __qsub
 
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0x0000FFFFUL) | ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL))
 
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0xFFFF0000UL) | ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL))
 
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
+#define __SMMLA(ARG1, ARG2, ARG3) ((int32_t)((((int64_t)(ARG1) * (ARG2)) + ((int64_t)(ARG3) << 32U)) >> 32U))
 
 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
-
 #endif /* __CMSIS_ARMCC_H */
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h b/module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h
index 5c4c20e87..b036ba601 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_armclang.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     cmsis_armclang.h
- * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_armclang.h
+                                                                              * @brief    CMSIS compiler armclang (Arm
+                                                                              *Compiler 6) header file
+                                                                              * @version  V5.0.4
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
@@ -27,91 +28,105 @@
 #ifndef __CMSIS_ARMCLANG_H
 #define __CMSIS_ARMCLANG_H
 
-#pragma clang system_header   /* treat file as system include file */
+#pragma clang system_header /* treat file as system include file */
 
 #ifndef __ARM_COMPAT_H
-#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
+#include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
 #endif
 
 /* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
+#ifndef __ASM
+#define __ASM __asm
 #endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
+#ifndef __INLINE
+#define __INLINE __inline
 #endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static __inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif                                           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
 #endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
+#ifndef __NO_RETURN
+#define __NO_RETURN __attribute__((__noreturn__))
 #endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
+#ifndef __USED
+#define __USED __attribute__((used))
 #endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
+#ifndef __WEAK
+#define __WEAK __attribute__((weak))
 #endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#ifndef __PACKED
+#define __PACKED __attribute__((packed, aligned(1)))
 #endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
 #endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
+#ifndef __PACKED_UNION
+#define __PACKED_UNION union __attribute__((packed, aligned(1)))
+#endif
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wpacked"
 /*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+struct __attribute__((packed)) T_UINT32
+{
+    uint32_t v;
+};
+#pragma clang diagnostic pop
+#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
 #endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
+#ifndef __UNALIGNED_UINT16_WRITE
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wpacked"
 /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+__PACKED_STRUCT T_UINT16_WRITE
+{
+    uint16_t v;
+};
+#pragma clang diagnostic pop
+#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
 #endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
+#ifndef __UNALIGNED_UINT16_READ
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wpacked"
 /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+__PACKED_STRUCT T_UINT16_READ
+{
+    uint16_t v;
+};
+#pragma clang diagnostic pop
+#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
 #endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
+#ifndef __UNALIGNED_UINT32_WRITE
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wpacked"
 /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+__PACKED_STRUCT T_UINT32_WRITE
+{
+    uint32_t v;
+};
+#pragma clang diagnostic pop
+#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
 #endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
+#ifndef __UNALIGNED_UINT32_READ
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wpacked"
 /*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+__PACKED_STRUCT T_UINT32_READ
+{
+    uint32_t v;
+};
+#pragma clang diagnostic pop
+#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
 #endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#ifndef __ALIGNED
+#define __ALIGNED(x) __attribute__((aligned(x)))
 #endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
+#ifndef __RESTRICT
+#define __RESTRICT __restrict
 #endif
 
-
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@@ -125,7 +140,6 @@
  */
 /* intrinsic void __enable_irq();  see arm_compat.h */
 
-
 /**
   \brief   Disable IRQ Interrupts
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
@@ -133,7 +147,6 @@
  */
 /* intrinsic void __disable_irq();  see arm_compat.h */
 
-
 /**
   \brief   Get Control Register
   \details Returns the content of the Control Register.
@@ -141,14 +154,13 @@
  */
 __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, control" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Control Register (non-secure)
   \details Returns the content of the non-secure Control Register when in secure mode.
@@ -156,14 +168,13 @@ __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, control_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Control Register
   \details Writes the given value to the Control Register.
@@ -171,11 +182,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
  */
 __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
 {
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+    __ASM volatile("MSR control, %0" : : "r"(control) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Control Register (non-secure)
   \details Writes the given value to the non-secure Control Register when in secure state.
@@ -183,11 +193,10 @@ __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
  */
 __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
 {
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+    __ASM volatile("MSR control_ns, %0" : : "r"(control) : "memory");
 }
 #endif
 
-
 /**
   \brief   Get IPSR Register
   \details Returns the content of the IPSR Register.
@@ -195,13 +204,12 @@ __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
  */
 __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, ipsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get APSR Register
   \details Returns the content of the APSR Register.
@@ -209,13 +217,12 @@ __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_APSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, apsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get xPSR Register
   \details Returns the content of the xPSR Register.
@@ -223,13 +230,12 @@ __STATIC_FORCEINLINE uint32_t __get_APSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, xpsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get Process Stack Pointer
   \details Returns the current value of the Process Stack Pointer (PSP).
@@ -237,14 +243,13 @@ __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_PSP(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, psp" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Process Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -252,14 +257,13 @@ __STATIC_FORCEINLINE uint32_t __get_PSP(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, psp_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Process Stack Pointer
   \details Assigns the given value to the Process Stack Pointer (PSP).
@@ -267,11 +271,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
  */
 __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
 {
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+    __ASM volatile("MSR psp, %0" : : "r"(topOfProcStack) :);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Process Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -279,11 +282,10 @@ __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
  */
 __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
 {
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+    __ASM volatile("MSR psp_ns, %0" : : "r"(topOfProcStack) :);
 }
 #endif
 
-
 /**
   \brief   Get Main Stack Pointer
   \details Returns the current value of the Main Stack Pointer (MSP).
@@ -291,14 +293,13 @@ __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
  */
 __STATIC_FORCEINLINE uint32_t __get_MSP(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, msp" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Main Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -306,14 +307,13 @@ __STATIC_FORCEINLINE uint32_t __get_MSP(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, msp_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Main Stack Pointer
   \details Assigns the given value to the Main Stack Pointer (MSP).
@@ -321,11 +321,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
  */
 __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
 {
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+    __ASM volatile("MSR msp, %0" : : "r"(topOfMainStack) :);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Main Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -333,12 +332,11 @@ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
  */
 __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
 {
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+    __ASM volatile("MSR msp_ns, %0" : : "r"(topOfMainStack) :);
 }
 #endif
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
@@ -346,13 +344,12 @@ __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, sp_ns" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Set Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
@@ -360,11 +357,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
  */
 __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
 {
-  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+    __ASM volatile("MSR sp_ns, %0" : : "r"(topOfStack) :);
 }
 #endif
 
-
 /**
   \brief   Get Priority Mask
   \details Returns the current state of the priority mask bit from the Priority Mask Register.
@@ -372,29 +368,27 @@ __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
  */
 __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, primask" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure
+  state. \return               Priority Mask value
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, primask_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Priority Mask
   \details Assigns the given value to the Priority Mask Register.
@@ -402,11 +396,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
  */
 __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
 {
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+    __ASM volatile("MSR primask, %0" : : "r"(priMask) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Priority Mask (non-secure)
   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@@ -414,29 +407,25 @@ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
  */
 __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
 {
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+    __ASM volatile("MSR primask_ns, %0" : : "r"(priMask) : "memory");
 }
 #endif
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 /**
   \brief   Enable FIQ
   \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
-#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
-
+#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
 
 /**
   \brief   Disable FIQ
   \details Disables FIQ interrupts by setting the F-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
-#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
-
+#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
 
 /**
   \brief   Get Base Priority
@@ -445,14 +434,13 @@ __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
  */
 __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, basepri" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Base Priority (non-secure)
   \details Returns the current value of the non-secure Base Priority register when in secure state.
@@ -460,14 +448,13 @@ __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, basepri_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Base Priority
   \details Assigns the given value to the Base Priority register.
@@ -475,11 +462,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
  */
 __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri, %0" : : "r"(basePri) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Base Priority (non-secure)
   \details Assigns the given value to the non-secure Base Priority register when in secure state.
@@ -487,11 +473,10 @@ __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
  */
 __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri_ns, %0" : : "r"(basePri) : "memory");
 }
 #endif
 
-
 /**
   \brief   Set Base Priority with condition
   \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
@@ -500,10 +485,9 @@ __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
  */
 __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri_max, %0" : : "r"(basePri) : "memory");
 }
 
-
 /**
   \brief   Get Fault Mask
   \details Returns the current value of the Fault Mask register.
@@ -511,14 +495,13 @@ __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
  */
 __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, faultmask" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Fault Mask (non-secure)
   \details Returns the current value of the non-secure Fault Mask register when in secure state.
@@ -526,14 +509,13 @@ __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, faultmask_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Fault Mask
   \details Assigns the given value to the Fault Mask register.
@@ -541,11 +523,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
  */
 __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
 {
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+    __ASM volatile("MSR faultmask, %0" : : "r"(faultMask) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Fault Mask (non-secure)
   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
@@ -553,41 +534,40 @@ __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
  */
 __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
 {
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+    __ASM volatile("MSR faultmask_ns, %0" : : "r"(faultMask) : "memory");
 }
 #endif
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 
 /**
   \brief   Get Process Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence zero is returned always in non-secure
   mode.
-  
+
   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
   \return               PSPLIM Register value
  */
 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
     // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, psplim" : "=r"(result));
+    return result;
 #endif
 }
 
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Process Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -599,40 +579,38 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, psplim_ns" : "=r"(result));
+    return result;
 #endif
 }
 #endif
 
-
 /**
   \brief   Set Process Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence the write is silently ignored in non-secure
   mode.
-  
+
   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
  */
 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    (void)ProcStackPtrLimit;
 #else
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+    __ASM volatile("MSR psplim, %0" : : "r"(ProcStackPtrLimit));
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Process Stack Pointer (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -644,16 +622,15 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    (void)ProcStackPtrLimit;
 #else
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+    __ASM volatile("MSR psplim_ns, %0\n" : : "r"(ProcStackPtrLimit));
 #endif
 }
 #endif
 
-
 /**
   \brief   Get Main Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -664,19 +641,18 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, msplim" : "=r"(result));
+    return result;
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -687,18 +663,17 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, msplim_ns" : "=r"(result));
+    return result;
 #endif
 }
 #endif
 
-
 /**
   \brief   Set Main Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -709,17 +684,16 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
  */
 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    (void)MainStackPtrLimit;
 #else
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+    __ASM volatile("MSR msplim, %0" : : "r"(MainStackPtrLimit));
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -730,32 +704,30 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    (void)MainStackPtrLimit;
 #else
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+    __ASM volatile("MSR msplim_ns, %0" : : "r"(MainStackPtrLimit));
 #endif
 }
 #endif
 
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ||                                                         \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 
 /**
   \brief   Get FPSCR
   \details Returns the current value of the Floating Point Status/Control register.
   \return               Floating Point Status/Control register value
  */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+#define __get_FPSCR (uint32_t) __builtin_arm_get_fpscr
 #else
-#define __get_FPSCR()      ((uint32_t)0U)
+#define __get_FPSCR() ((uint32_t)0U)
 #endif
 
 /**
@@ -763,21 +735,17 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
   \details Assigns the given value to the Floating Point Status/Control register.
   \param [in]    fpscr  Floating Point Status/Control value to set
  */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __set_FPSCR      __builtin_arm_set_fpscr
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+#define __set_FPSCR __builtin_arm_set_fpscr
 #else
-#define __set_FPSCR(x)      ((void)(x))
+#define __set_FPSCR(x) ((void)(x))
 #endif
 
-#endif /* ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-
 /*@} end of CMSIS_Core_RegAccFunctions */
 
-
 /* ##########################  Core Instruction Access  ######################### */
 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
   Access to dedicated instructions
@@ -787,41 +755,38 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 /* Define macros for porting to both thumb1 and thumb2.
  * For thumb1, use low register (r0-r7), specified by constraint "l"
  * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#if defined(__thumb__) && !defined(__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l"(r)
+#define __CMSIS_GCC_USE_REG(r) "l"(r)
 #else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#define __CMSIS_GCC_OUT_REG(r) "=r"(r)
+#define __CMSIS_GCC_USE_REG(r) "r"(r)
 #endif
 
 /**
   \brief   No Operation
   \details No Operation does nothing. This instruction can be used for code alignment purposes.
  */
-#define __NOP          __builtin_arm_nop
+#define __NOP __builtin_arm_nop
 
 /**
   \brief   Wait For Interrupt
   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
  */
-#define __WFI          __builtin_arm_wfi
-
+#define __WFI __builtin_arm_wfi
 
 /**
   \brief   Wait For Event
   \details Wait For Event is a hint instruction that permits the processor to enter
            a low-power state until one of a number of events occurs.
  */
-#define __WFE          __builtin_arm_wfe
-
+#define __WFE __builtin_arm_wfe
 
 /**
   \brief   Send Event
   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  */
-#define __SEV          __builtin_arm_sev
-
+#define __SEV __builtin_arm_sev
 
 /**
   \brief   Instruction Synchronization Barrier
@@ -829,23 +794,21 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
            so that all instructions following the ISB are fetched from cache or memory,
            after the instruction has been completed.
  */
-#define __ISB()        __builtin_arm_isb(0xF);
+#define __ISB() __builtin_arm_isb(0xF);
 
 /**
   \brief   Data Synchronization Barrier
   \details Acts as a special kind of Data Memory Barrier.
            It completes when all explicit memory accesses before this instruction complete.
  */
-#define __DSB()        __builtin_arm_dsb(0xF);
-
+#define __DSB() __builtin_arm_dsb(0xF);
 
 /**
   \brief   Data Memory Barrier
   \details Ensures the apparent order of the explicit memory operations before
            and after the instruction, without ensuring their completion.
  */
-#define __DMB()        __builtin_arm_dmb(0xF);
-
+#define __DMB() __builtin_arm_dmb(0xF);
 
 /**
   \brief   Reverse byte order (32 bit)
@@ -853,8 +816,7 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
   \param [in]    value  Value to reverse
   \return               Reversed value
  */
-#define __REV(value)   __builtin_bswap32(value)
-
+#define __REV(value) __builtin_bswap32(value)
 
 /**
   \brief   Reverse byte order (16 bit)
@@ -864,34 +826,28 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
  */
 #define __REV16(value) __ROR(__REV(value), 16)
 
-
 /**
   \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes
+  0x8000. \param [in]    value  Value to reverse \return               Reversed value
  */
-#define __REVSH(value) (int16_t)__builtin_bswap16(value)
-
+#define __REVSH(value) (int16_t) __builtin_bswap16(value)
 
 /**
   \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of
+  bits. \param [in]    op1  Value to rotate \param [in]    op2  Number of Bits to rotate \return               Rotated
+  value
  */
 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 {
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
+    op2 %= 32U;
+    if (op2 == 0U) {
+        return op1;
+    }
+    return (op1 >> op2) | (op1 << (32U - op2));
 }
 
-
 /**
   \brief   Breakpoint
   \details Causes the processor to enter Debug state.
@@ -899,8 +855,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    value  is ignored by the processor.
                  If required, a debugger can use it to store additional information about the breakpoint.
  */
-#define __BKPT(value)     __ASM volatile ("bkpt "#value)
-
+#define __BKPT(value) __ASM volatile("bkpt " #value)
 
 /**
   \brief   Reverse bit order of value
@@ -908,7 +863,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    value  Value to reverse
   \return               Reversed value
  */
-#define __RBIT            __builtin_arm_rbit
+#define __RBIT __builtin_arm_rbit
 
 /**
   \brief   Count leading zeros
@@ -916,21 +871,18 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+#define __CLZ (uint8_t) __builtin_clz
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 /**
   \brief   LDR Exclusive (8 bit)
   \details Executes a exclusive LDR instruction for 8 bit value.
   \param [in]    ptr  Pointer to data
   \return             value of type uint8_t at (*ptr)
  */
-#define __LDREXB        (uint8_t)__builtin_arm_ldrex
-
+#define __LDREXB (uint8_t) __builtin_arm_ldrex
 
 /**
   \brief   LDR Exclusive (16 bit)
@@ -938,8 +890,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    ptr  Pointer to data
   \return        value of type uint16_t at (*ptr)
  */
-#define __LDREXH        (uint16_t)__builtin_arm_ldrex
-
+#define __LDREXH (uint16_t) __builtin_arm_ldrex
 
 /**
   \brief   LDR Exclusive (32 bit)
@@ -947,8 +898,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    ptr  Pointer to data
   \return        value of type uint32_t at (*ptr)
  */
-#define __LDREXW        (uint32_t)__builtin_arm_ldrex
-
+#define __LDREXW (uint32_t) __builtin_arm_ldrex
 
 /**
   \brief   STR Exclusive (8 bit)
@@ -958,8 +908,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define __STREXB        (uint32_t)__builtin_arm_strex
-
+#define __STREXB (uint32_t) __builtin_arm_strex
 
 /**
   \brief   STR Exclusive (16 bit)
@@ -969,8 +918,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define __STREXH        (uint32_t)__builtin_arm_strex
-
+#define __STREXH (uint32_t) __builtin_arm_strex
 
 /**
   \brief   STR Exclusive (32 bit)
@@ -980,24 +928,21 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define __STREXW        (uint32_t)__builtin_arm_strex
-
+#define __STREXW (uint32_t) __builtin_arm_strex
 
 /**
   \brief   Remove the exclusive lock
   \details Removes the exclusive lock which is created by LDREX.
  */
-#define __CLREX             __builtin_arm_clrex
+#define __CLREX __builtin_arm_clrex
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 
 /**
   \brief   Signed Saturate
@@ -1006,8 +951,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    sat  Bit position to saturate to (1..32)
   \return             Saturated value
  */
-#define __SSAT             __builtin_arm_ssat
-
+#define __SSAT __builtin_arm_ssat
 
 /**
   \brief   Unsigned Saturate
@@ -1016,8 +960,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    sat  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-#define __USAT             __builtin_arm_usat
-
+#define __USAT __builtin_arm_usat
 
 /**
   \brief   Rotate Right with Extend (32 bit)
@@ -1028,13 +971,12 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
  */
 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
+    __ASM volatile("rrx %0, %1" : __CMSIS_GCC_OUT_REG(result) : __CMSIS_GCC_USE_REG(value));
+    return (result);
 }
 
-
 /**
   \brief   LDRT Unprivileged (8 bit)
   \details Executes a Unprivileged LDRT instruction for 8 bit value.
@@ -1043,13 +985,12 @@ __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
  */
 __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);    /* Add explicit type cast here */
+    __ASM volatile("ldrbt %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint8_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDRT Unprivileged (16 bit)
   \details Executes a Unprivileged LDRT instruction for 16 bit values.
@@ -1058,13 +999,12 @@ __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);    /* Add explicit type cast here */
+    __ASM volatile("ldrht %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint16_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDRT Unprivileged (32 bit)
   \details Executes a Unprivileged LDRT instruction for 32 bit values.
@@ -1073,13 +1013,12 @@ __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
+    __ASM volatile("ldrt %0, %1" : "=r"(result) : "Q"(*ptr));
+    return (result);
 }
 
-
 /**
   \brief   STRT Unprivileged (8 bit)
   \details Executes a Unprivileged STRT instruction for 8 bit values.
@@ -1088,10 +1027,9 @@ __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
 {
-  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("strbt %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   STRT Unprivileged (16 bit)
   \details Executes a Unprivileged STRT instruction for 16 bit values.
@@ -1100,10 +1038,9 @@ __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 {
-  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("strht %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   STRT Unprivileged (32 bit)
   \details Executes a Unprivileged STRT instruction for 32 bit values.
@@ -1112,12 +1049,12 @@ __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 {
-  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+    __ASM volatile("strt %1, %0" : "=Q"(*ptr) : "r"(value));
 }
 
-#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+#else /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                          \
+          (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                          \
+          (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
 /**
   \brief   Signed Saturate
@@ -1128,20 +1065,17 @@ __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 {
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
+    if ((sat >= 1U) && (sat <= 32U)) {
+        const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+        const int32_t min = -1 - max;
+        if (val > max) {
+            return max;
+        }
+        else if (val < min) {
+            return min;
+        }
     }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
+    return val;
 }
 
 /**
@@ -1153,28 +1087,24 @@ __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
  */
 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 {
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
+    if (sat <= 31U) {
+        const uint32_t max = ((1U << sat) - 1U);
+        if (val > (int32_t)max) {
+            return max;
+        }
+        else if (val < 0) {
+            return 0U;
+        }
     }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
+    return (uint32_t)val;
 }
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 /**
   \brief   Load-Acquire (8 bit)
   \details Executes a LDAB instruction for 8 bit value.
@@ -1183,13 +1113,12 @@ __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
  */
 __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);
+    __ASM volatile("ldab %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint8_t)result);
 }
 
-
 /**
   \brief   Load-Acquire (16 bit)
   \details Executes a LDAH instruction for 16 bit values.
@@ -1198,13 +1127,12 @@ __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);
+    __ASM volatile("ldah %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint16_t)result);
 }
 
-
 /**
   \brief   Load-Acquire (32 bit)
   \details Executes a LDA instruction for 32 bit values.
@@ -1213,13 +1141,12 @@ __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
+    __ASM volatile("lda %0, %1" : "=r"(result) : "Q"(*ptr));
+    return (result);
 }
 
-
 /**
   \brief   Store-Release (8 bit)
   \details Executes a STLB instruction for 8 bit values.
@@ -1228,10 +1155,9 @@ __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 {
-  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stlb %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Store-Release (16 bit)
   \details Executes a STLH instruction for 16 bit values.
@@ -1240,10 +1166,9 @@ __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 {
-  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stlh %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Store-Release (32 bit)
   \details Executes a STL instruction for 32 bit values.
@@ -1252,18 +1177,16 @@ __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 {
-  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stl %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Load-Acquire Exclusive (8 bit)
   \details Executes a LDAB exclusive instruction for 8 bit value.
   \param [in]    ptr  Pointer to data
   \return             value of type uint8_t at (*ptr)
  */
-#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
-
+#define __LDAEXB (uint8_t) __builtin_arm_ldaex
 
 /**
   \brief   Load-Acquire Exclusive (16 bit)
@@ -1271,8 +1194,7 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
   \param [in]    ptr  Pointer to data
   \return        value of type uint16_t at (*ptr)
  */
-#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
-
+#define __LDAEXH (uint16_t) __builtin_arm_ldaex
 
 /**
   \brief   Load-Acquire Exclusive (32 bit)
@@ -1280,8 +1202,7 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
   \param [in]    ptr  Pointer to data
   \return        value of type uint32_t at (*ptr)
  */
-#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
-
+#define __LDAEX (uint32_t) __builtin_arm_ldaex
 
 /**
   \brief   Store-Release Exclusive (8 bit)
@@ -1291,8 +1212,7 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
-
+#define __STLEXB (uint32_t) __builtin_arm_stlex
 
 /**
   \brief   Store-Release Exclusive (16 bit)
@@ -1302,8 +1222,7 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
-
+#define __STLEXH (uint32_t) __builtin_arm_stlex
 
 /**
   \brief   Store-Release Exclusive (32 bit)
@@ -1313,565 +1232,581 @@ __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
   \return          0  Function succeeded
   \return          1  Function failed
  */
-#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+#define __STLEX (uint32_t) __builtin_arm_stlex
 
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 
-
 /* ###################  Compiler specific Intrinsics  ########################### */
 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
   Access to dedicated SIMD instructions
   @{
 */
 
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+#if (defined(__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
 
 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-
 __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-
 __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usad8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("usada8 %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
+#define __SSAT16(ARG1, ARG2)                                                                                           \
+    ({                                                                                                                 \
+        int32_t __RES, __ARG1 = (ARG1);                                                                                \
+        __ASM("ssat16 %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                             \
+        __RES;                                                                                                         \
+    })
 
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
+#define __USAT16(ARG1, ARG2)                                                                                           \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1);                                                                               \
+        __ASM("usat16 %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                             \
+        __RES;                                                                                                         \
+    })
 
 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
+    __ASM volatile("uxtb16 %0, %1" : "=r"(result) : "r"(op1));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uxtab16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
+    __ASM volatile("sxtb16 %0, %1" : "=r"(result) : "r"(op1));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sxtab16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUAD(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smuad %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUADX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smuadx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLAD(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlad %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLADX(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smladx %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALD(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlald %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlald %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALDX(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlaldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlaldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSD(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smusd %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSDX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smusdx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSD(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlsd %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSDX(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlsdx %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLD(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlsld %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlsld %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLDX(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlsldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlsldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SEL(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sel %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+__STATIC_FORCEINLINE int32_t __QADD(int32_t op1, int32_t op2)
 {
-  int32_t result;
+    int32_t result;
 
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+__STATIC_FORCEINLINE int32_t __QSUB(int32_t op1, int32_t op2)
 {
-  int32_t result;
+    int32_t result;
 
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 #if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2);                                                              \
+        __ASM("pkhbt %0, %1, %2, lsl %3" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2), "I"(ARG3));                         \
+        __RES;                                                                                                         \
+    })
 
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2);                                                              \
+        if (ARG3 == 0)                                                                                                 \
+            __ASM("pkhtb %0, %1, %2" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2));                                        \
+        else                                                                                                           \
+            __ASM("pkhtb %0, %1, %2, asr %3" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2), "I"(ARG3));                     \
+        __RES;                                                                                                         \
+    })
 #endif
 
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0x0000FFFFUL) | ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL))
 
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0xFFFF0000UL) | ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL))
 
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+__STATIC_FORCEINLINE int32_t __SMMLA(int32_t op1, int32_t op2, int32_t op3)
 {
-  int32_t result;
+    int32_t result;
 
-  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smmla %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
 #endif /* (__ARM_FEATURE_DSP == 1) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
-
 #endif /* __CMSIS_ARMCLANG_H */
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h b/module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h
index 94212eb87..f45db7223 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_compiler.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     cmsis_compiler.h
- * @brief    CMSIS compiler generic header file
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_compiler.h
+                                                                              * @brief    CMSIS compiler generic header
+                                                                              *file
+                                                                              * @version  V5.0.4
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
@@ -30,237 +31,273 @@
 /*
  * Arm Compiler 4/5
  */
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
+#if defined(__CC_ARM)
+#include "cmsis_armcc.h"
 
 /*
  * Arm Compiler 6 (armclang)
  */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armclang.h"
-
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#include "cmsis_armclang.h"
 
 /*
  * GNU Compiler
  */
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
+#elif defined(__GNUC__)
+#include "cmsis_gcc.h"
 
 /*
  * IAR Compiler
  */
-#elif defined ( __ICCARM__ )
-  #include <cmsis_iccarm.h>
-
+#elif defined(__ICCARM__)
+#include <cmsis_iccarm.h>
 
 /*
  * TI Arm Compiler
  */
-#elif defined ( __TI_ARM__ )
-  #include <cmsis_ccs.h>
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __attribute__((packed))
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)                           __attribute__((aligned(x)))
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
+#elif defined(__TI_ARM__)
+#include <cmsis_ccs.h>
 
+#ifndef __ASM
+#define __ASM __asm
+#endif
+#ifndef __INLINE
+#define __INLINE inline
+#endif
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static inline
+#endif
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __STATIC_INLINE
+#endif
+#ifndef __NO_RETURN
+#define __NO_RETURN __attribute__((noreturn))
+#endif
+#ifndef __USED
+#define __USED __attribute__((used))
+#endif
+#ifndef __WEAK
+#define __WEAK __attribute__((weak))
+#endif
+#ifndef __PACKED
+#define __PACKED __attribute__((packed))
+#endif
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT struct __attribute__((packed))
+#endif
+#ifndef __PACKED_UNION
+#define __PACKED_UNION union __attribute__((packed))
+#endif
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+struct __attribute__((packed)) T_UINT32
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef __UNALIGNED_UINT16_WRITE
+__PACKED_STRUCT T_UINT16_WRITE
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT16_READ
+__PACKED_STRUCT T_UINT16_READ
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __UNALIGNED_UINT32_WRITE
+__PACKED_STRUCT T_UINT32_WRITE
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT32_READ
+__PACKED_STRUCT T_UINT32_READ
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __ALIGNED
+#define __ALIGNED(x) __attribute__((aligned(x)))
+#endif
+#ifndef __RESTRICT
+#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+#define __RESTRICT
+#endif
 
 /*
  * TASKING Compiler
  */
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __packed__
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __packed__
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __packed__
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __align(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
+#elif defined(__TASKING__)
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
 
+#ifndef __ASM
+#define __ASM __asm
+#endif
+#ifndef __INLINE
+#define __INLINE inline
+#endif
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static inline
+#endif
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __STATIC_INLINE
+#endif
+#ifndef __NO_RETURN
+#define __NO_RETURN __attribute__((noreturn))
+#endif
+#ifndef __USED
+#define __USED __attribute__((used))
+#endif
+#ifndef __WEAK
+#define __WEAK __attribute__((weak))
+#endif
+#ifndef __PACKED
+#define __PACKED __packed__
+#endif
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT struct __packed__
+#endif
+#ifndef __PACKED_UNION
+#define __PACKED_UNION union __packed__
+#endif
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+struct __packed__ T_UINT32
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef __UNALIGNED_UINT16_WRITE
+__PACKED_STRUCT T_UINT16_WRITE
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT16_READ
+__PACKED_STRUCT T_UINT16_READ
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __UNALIGNED_UINT32_WRITE
+__PACKED_STRUCT T_UINT32_WRITE
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT32_READ
+__PACKED_STRUCT T_UINT32_READ
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __ALIGNED
+#define __ALIGNED(x) __align(x)
+#endif
+#ifndef __RESTRICT
+#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+#define __RESTRICT
+#endif
 
 /*
  * COSMIC Compiler
  */
-#elif defined ( __CSMC__ )
-   #include <cmsis_csm.h>
+#elif defined(__CSMC__)
+#include <cmsis_csm.h>
 
- #ifndef   __ASM
-    #define __ASM                                  _asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    // NO RETURN is automatically detected hence no warning here
-    #define __NO_RETURN
-  #endif
-  #ifndef   __USED
-    #warning No compiler specific solution for __USED. __USED is ignored.
-    #define __USED
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __weak
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               @packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        @packed struct
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         @packed union
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-
-
-#else
-  #error Unknown compiler.
+#ifndef __ASM
+#define __ASM _asm
+#endif
+#ifndef __INLINE
+#define __INLINE inline
+#endif
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static inline
+#endif
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __STATIC_INLINE
+#endif
+#ifndef __NO_RETURN
+// NO RETURN is automatically detected hence no warning here
+#define __NO_RETURN
+#endif
+#ifndef __USED
+#warning No compiler specific solution for __USED. __USED is ignored.
+#define __USED
+#endif
+#ifndef __WEAK
+#define __WEAK __weak
+#endif
+#ifndef __PACKED
+#define __PACKED @packed
+#endif
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT @packed struct
+#endif
+#ifndef __PACKED_UNION
+#define __PACKED_UNION @packed union
+#endif
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+@packed struct T_UINT32
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef __UNALIGNED_UINT16_WRITE
+__PACKED_STRUCT T_UINT16_WRITE
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT16_READ
+__PACKED_STRUCT T_UINT16_READ
+{
+    uint16_t v;
+};
+#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __UNALIGNED_UINT32_WRITE
+__PACKED_STRUCT T_UINT32_WRITE
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT32_READ
+__PACKED_STRUCT T_UINT32_READ
+{
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __ALIGNED
+#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
+#ifndef __RESTRICT
+#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+#define __RESTRICT
 #endif
 
+#else
+#error Unknown compiler.
+#endif
 
 #endif /* __CMSIS_COMPILER_H */
-
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h b/module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h
index 5d0f07e8a..abcf2cd1f 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_gcc.h
@@ -1,9 +1,9 @@
-/**************************************************************************//**
- * @file     cmsis_gcc.h
- * @brief    CMSIS compiler GCC header file
- * @version  V5.0.3
- * @date     16. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_gcc.h
+                                                                              * @brief    CMSIS compiler GCC header file
+                                                                              * @version  V5.0.3
+                                                                              * @date     16. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
@@ -33,87 +33,101 @@
 
 /* Fallback for __has_builtin */
 #ifndef __has_builtin
-  #define __has_builtin(x) (0)
+#define __has_builtin(x) (0)
 #endif
 
 /* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
+#ifndef __ASM
+#define __ASM __asm
 #endif
-#ifndef   __INLINE
-  #define __INLINE                               inline
+#ifndef __INLINE
+#define __INLINE inline
 #endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static inline
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
-#endif                                           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
 #endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
+#ifndef __NO_RETURN
+#define __NO_RETURN __attribute__((__noreturn__))
 #endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
+#ifndef __USED
+#define __USED __attribute__((used))
 #endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
+#ifndef __WEAK
+#define __WEAK __attribute__((weak))
 #endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#ifndef __PACKED
+#define __PACKED __attribute__((packed, aligned(1)))
 #endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
 #endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#ifndef __PACKED_UNION
+#define __PACKED_UNION union __attribute__((packed, aligned(1)))
 #endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpacked"
+#pragma GCC diagnostic ignored "-Wattributes"
+struct __attribute__((packed)) T_UINT32
+{
+    uint32_t v;
+};
+#pragma GCC diagnostic pop
+#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
 #endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#ifndef __UNALIGNED_UINT16_WRITE
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpacked"
+#pragma GCC diagnostic ignored "-Wattributes"
+__PACKED_STRUCT T_UINT16_WRITE
+{
+    uint16_t v;
+};
+#pragma GCC diagnostic pop
+#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
 #endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#ifndef __UNALIGNED_UINT16_READ
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpacked"
+#pragma GCC diagnostic ignored "-Wattributes"
+__PACKED_STRUCT T_UINT16_READ
+{
+    uint16_t v;
+};
+#pragma GCC diagnostic pop
+#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
 #endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#ifndef __UNALIGNED_UINT32_WRITE
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpacked"
+#pragma GCC diagnostic ignored "-Wattributes"
+__PACKED_STRUCT T_UINT32_WRITE
+{
+    uint32_t v;
+};
+#pragma GCC diagnostic pop
+#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
 #endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#ifndef __UNALIGNED_UINT32_READ
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpacked"
+#pragma GCC diagnostic ignored "-Wattributes"
+__PACKED_STRUCT T_UINT32_READ
+{
+    uint32_t v;
+};
+#pragma GCC diagnostic pop
+#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
 #endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
+#ifndef __ALIGNED
+#define __ALIGNED(x) __attribute__((aligned(x)))
+#endif
+#ifndef __RESTRICT
+#define __RESTRICT __restrict
 #endif
-
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
@@ -128,10 +142,9 @@
  */
 __STATIC_FORCEINLINE void __enable_irq(void)
 {
-  __ASM volatile ("cpsie i" : : : "memory");
+    __ASM volatile("cpsie i" : : : "memory");
 }
 
-
 /**
   \brief   Disable IRQ Interrupts
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
@@ -139,10 +152,9 @@ __STATIC_FORCEINLINE void __enable_irq(void)
  */
 __STATIC_FORCEINLINE void __disable_irq(void)
 {
-  __ASM volatile ("cpsid i" : : : "memory");
+    __ASM volatile("cpsid i" : : : "memory");
 }
 
-
 /**
   \brief   Get Control Register
   \details Returns the content of the Control Register.
@@ -150,14 +162,13 @@ __STATIC_FORCEINLINE void __disable_irq(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, control" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Control Register (non-secure)
   \details Returns the content of the non-secure Control Register when in secure mode.
@@ -165,14 +176,13 @@ __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, control_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Control Register
   \details Writes the given value to the Control Register.
@@ -180,11 +190,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
  */
 __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
 {
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+    __ASM volatile("MSR control, %0" : : "r"(control) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Control Register (non-secure)
   \details Writes the given value to the non-secure Control Register when in secure state.
@@ -192,11 +201,10 @@ __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
  */
 __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
 {
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+    __ASM volatile("MSR control_ns, %0" : : "r"(control) : "memory");
 }
 #endif
 
-
 /**
   \brief   Get IPSR Register
   \details Returns the content of the IPSR Register.
@@ -204,13 +212,12 @@ __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
  */
 __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, ipsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get APSR Register
   \details Returns the content of the APSR Register.
@@ -218,13 +225,12 @@ __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_APSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, apsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get xPSR Register
   \details Returns the content of the xPSR Register.
@@ -232,13 +238,12 @@ __STATIC_FORCEINLINE uint32_t __get_APSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, xpsr" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Get Process Stack Pointer
   \details Returns the current value of the Process Stack Pointer (PSP).
@@ -246,14 +251,13 @@ __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_PSP(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, psp" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Process Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -261,14 +265,13 @@ __STATIC_FORCEINLINE uint32_t __get_PSP(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, psp_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Process Stack Pointer
   \details Assigns the given value to the Process Stack Pointer (PSP).
@@ -276,11 +279,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
  */
 __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
 {
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+    __ASM volatile("MSR psp, %0" : : "r"(topOfProcStack) :);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Process Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -288,11 +290,10 @@ __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
  */
 __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
 {
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+    __ASM volatile("MSR psp_ns, %0" : : "r"(topOfProcStack) :);
 }
 #endif
 
-
 /**
   \brief   Get Main Stack Pointer
   \details Returns the current value of the Main Stack Pointer (MSP).
@@ -300,14 +301,13 @@ __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
  */
 __STATIC_FORCEINLINE uint32_t __get_MSP(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, msp" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Main Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -315,14 +315,13 @@ __STATIC_FORCEINLINE uint32_t __get_MSP(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, msp_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Main Stack Pointer
   \details Assigns the given value to the Main Stack Pointer (MSP).
@@ -330,11 +329,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
  */
 __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
 {
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+    __ASM volatile("MSR msp, %0" : : "r"(topOfMainStack) :);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Main Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -342,12 +340,11 @@ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
  */
 __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
 {
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+    __ASM volatile("MSR msp_ns, %0" : : "r"(topOfMainStack) :);
 }
 #endif
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
@@ -355,13 +352,12 @@ __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
 {
-  register uint32_t result;
+    register uint32_t result;
 
-  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, sp_ns" : "=r"(result));
+    return (result);
 }
 
-
 /**
   \brief   Set Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
@@ -369,11 +365,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
  */
 __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
 {
-  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+    __ASM volatile("MSR sp_ns, %0" : : "r"(topOfStack) :);
 }
 #endif
 
-
 /**
   \brief   Get Priority Mask
   \details Returns the current state of the priority mask bit from the Priority Mask Register.
@@ -381,29 +376,27 @@ __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
  */
 __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
-  return(result);
+    __ASM volatile("MRS %0, primask" : "=r"(result)::"memory");
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure
+  state. \return               Priority Mask value
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
-  return(result);
+    __ASM volatile("MRS %0, primask_ns" : "=r"(result)::"memory");
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Priority Mask
   \details Assigns the given value to the Priority Mask Register.
@@ -411,11 +404,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
  */
 __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
 {
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+    __ASM volatile("MSR primask, %0" : : "r"(priMask) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Priority Mask (non-secure)
   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@@ -423,14 +415,12 @@ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
  */
 __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
 {
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+    __ASM volatile("MSR primask_ns, %0" : : "r"(priMask) : "memory");
 }
 #endif
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 /**
   \brief   Enable FIQ
   \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
@@ -438,10 +428,9 @@ __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
  */
 __STATIC_FORCEINLINE void __enable_fault_irq(void)
 {
-  __ASM volatile ("cpsie f" : : : "memory");
+    __ASM volatile("cpsie f" : : : "memory");
 }
 
-
 /**
   \brief   Disable FIQ
   \details Disables FIQ interrupts by setting the F-bit in the CPSR.
@@ -449,10 +438,9 @@ __STATIC_FORCEINLINE void __enable_fault_irq(void)
  */
 __STATIC_FORCEINLINE void __disable_fault_irq(void)
 {
-  __ASM volatile ("cpsid f" : : : "memory");
+    __ASM volatile("cpsid f" : : : "memory");
 }
 
-
 /**
   \brief   Get Base Priority
   \details Returns the current value of the Base Priority register.
@@ -460,14 +448,13 @@ __STATIC_FORCEINLINE void __disable_fault_irq(void)
  */
 __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, basepri" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Base Priority (non-secure)
   \details Returns the current value of the non-secure Base Priority register when in secure state.
@@ -475,14 +462,13 @@ __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, basepri_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Base Priority
   \details Assigns the given value to the Base Priority register.
@@ -490,11 +476,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
  */
 __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri, %0" : : "r"(basePri) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Base Priority (non-secure)
   \details Assigns the given value to the non-secure Base Priority register when in secure state.
@@ -502,11 +487,10 @@ __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
  */
 __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri_ns, %0" : : "r"(basePri) : "memory");
 }
 #endif
 
-
 /**
   \brief   Set Base Priority with condition
   \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
@@ -515,10 +499,9 @@ __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
  */
 __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
 {
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+    __ASM volatile("MSR basepri_max, %0" : : "r"(basePri) : "memory");
 }
 
-
 /**
   \brief   Get Fault Mask
   \details Returns the current value of the Fault Mask register.
@@ -526,14 +509,13 @@ __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
  */
 __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, faultmask" : "=r"(result));
+    return (result);
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Fault Mask (non-secure)
   \details Returns the current value of the non-secure Fault Mask register when in secure state.
@@ -541,14 +523,13 @@ __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
+    __ASM volatile("MRS %0, faultmask_ns" : "=r"(result));
+    return (result);
 }
 #endif
 
-
 /**
   \brief   Set Fault Mask
   \details Assigns the given value to the Fault Mask register.
@@ -556,11 +537,10 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
  */
 __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
 {
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+    __ASM volatile("MSR faultmask, %0" : : "r"(faultMask) : "memory");
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Fault Mask (non-secure)
   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
@@ -568,41 +548,40 @@ __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
  */
 __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
 {
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+    __ASM volatile("MSR faultmask_ns, %0" : : "r"(faultMask) : "memory");
 }
 #endif
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 
 /**
   \brief   Get Process Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence zero is returned always in non-secure
   mode.
-  
+
   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
   \return               PSPLIM Register value
  */
 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
     // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, psplim" : "=r"(result));
+    return result;
 #endif
 }
 
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Process Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -613,40 +592,38 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, psplim_ns" : "=r"(result));
+    return result;
 #endif
 }
 #endif
 
-
 /**
   \brief   Set Process Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence the write is silently ignored in non-secure
   mode.
-  
+
   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
  */
 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    (void)ProcStackPtrLimit;
 #else
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+    __ASM volatile("MSR psplim, %0" : : "r"(ProcStackPtrLimit));
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Process Stack Pointer (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -657,16 +634,15 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    (void)ProcStackPtrLimit;
 #else
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+    __ASM volatile("MSR psplim_ns, %0\n" : : "r"(ProcStackPtrLimit));
 #endif
 }
 #endif
 
-
 /**
   \brief   Get Main Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -678,19 +654,18 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, msplim" : "=r"(result));
+    return result;
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Get Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -701,18 +676,17 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    return 0U;
 #else
-  register uint32_t result;
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return result;
+    register uint32_t result;
+    __ASM volatile("MRS %0, msplim_ns" : "=r"(result));
+    return result;
 #endif
 }
 #endif
 
-
 /**
   \brief   Set Main Stack Pointer Limit
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -724,17 +698,16 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
  */
 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    (void)MainStackPtrLimit;
 #else
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+    __ASM volatile("MSR msplim, %0" : : "r"(MainStackPtrLimit));
 #endif
 }
 
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+#if (defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 /**
   \brief   Set Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -745,21 +718,20 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 {
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    (void)MainStackPtrLimit;
 #else
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+    __ASM volatile("MSR msplim_ns, %0" : : "r"(MainStackPtrLimit));
 #endif
 }
 #endif
 
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ||                                                         \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 
 /**
   \brief   Get FPSCR
@@ -768,23 +740,21 @@ __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
  */
 __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
 {
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
 #if __has_builtin(__builtin_arm_get_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-  return __builtin_arm_get_fpscr();
+    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+    return __builtin_arm_get_fpscr();
 #else
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  return(result);
+    __ASM volatile("VMRS %0, fpscr" : "=r"(result));
+    return (result);
 #endif
 #else
-  return(0U);
+    return (0U);
 #endif
 }
 
-
 /**
   \brief   Set FPSCR
   \details Assigns the given value to the Floating Point Status/Control register.
@@ -792,27 +762,23 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
  */
 __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
 {
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
 #if __has_builtin(__builtin_arm_set_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-  __builtin_arm_set_fpscr(fpscr);
+    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+    __builtin_arm_set_fpscr(fpscr);
 #else
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
+    __ASM volatile("VMSR fpscr, %0" : : "r"(fpscr) : "vfpcc", "memory");
 #endif
 #else
-  (void)fpscr;
+    (void)fpscr;
 #endif
 }
 
-#endif /* ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-
 /*@} end of CMSIS_Core_RegAccFunctions */
 
-
 /* ##########################  Core Instruction Access  ######################### */
 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
   Access to dedicated instructions
@@ -822,43 +788,40 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
 /* Define macros for porting to both thumb1 and thumb2.
  * For thumb1, use low register (r0-r7), specified by constraint "l"
  * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_RW_REG(r) "+l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#if defined(__thumb__) && !defined(__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l"(r)
+#define __CMSIS_GCC_RW_REG(r)  "+l"(r)
+#define __CMSIS_GCC_USE_REG(r) "l"(r)
 #else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_RW_REG(r) "+r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#define __CMSIS_GCC_OUT_REG(r) "=r"(r)
+#define __CMSIS_GCC_RW_REG(r)  "+r"(r)
+#define __CMSIS_GCC_USE_REG(r) "r"(r)
 #endif
 
 /**
   \brief   No Operation
   \details No Operation does nothing. This instruction can be used for code alignment purposes.
  */
-#define __NOP()                             __ASM volatile ("nop")
+#define __NOP() __ASM volatile("nop")
 
 /**
   \brief   Wait For Interrupt
   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
  */
-#define __WFI()                             __ASM volatile ("wfi")
-
+#define __WFI() __ASM volatile("wfi")
 
 /**
   \brief   Wait For Event
   \details Wait For Event is a hint instruction that permits the processor to enter
            a low-power state until one of a number of events occurs.
  */
-#define __WFE()                             __ASM volatile ("wfe")
-
+#define __WFE() __ASM volatile("wfe")
 
 /**
   \brief   Send Event
   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  */
-#define __SEV()                             __ASM volatile ("sev")
-
+#define __SEV() __ASM volatile("sev")
 
 /**
   \brief   Instruction Synchronization Barrier
@@ -868,10 +831,9 @@ __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
  */
 __STATIC_FORCEINLINE void __ISB(void)
 {
-  __ASM volatile ("isb 0xF":::"memory");
+    __ASM volatile("isb 0xF" ::: "memory");
 }
 
-
 /**
   \brief   Data Synchronization Barrier
   \details Acts as a special kind of Data Memory Barrier.
@@ -879,10 +841,9 @@ __STATIC_FORCEINLINE void __ISB(void)
  */
 __STATIC_FORCEINLINE void __DSB(void)
 {
-  __ASM volatile ("dsb 0xF":::"memory");
+    __ASM volatile("dsb 0xF" ::: "memory");
 }
 
-
 /**
   \brief   Data Memory Barrier
   \details Ensures the apparent order of the explicit memory operations before
@@ -890,10 +851,9 @@ __STATIC_FORCEINLINE void __DSB(void)
  */
 __STATIC_FORCEINLINE void __DMB(void)
 {
-  __ASM volatile ("dmb 0xF":::"memory");
+    __ASM volatile("dmb 0xF" ::: "memory");
 }
 
-
 /**
   \brief   Reverse byte order (32 bit)
   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
@@ -903,16 +863,15 @@ __STATIC_FORCEINLINE void __DMB(void)
 __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 {
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-  return __builtin_bswap32(value);
+    return __builtin_bswap32(value);
 #else
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
+    __ASM volatile("rev %0, %1" : __CMSIS_GCC_OUT_REG(result) : __CMSIS_GCC_USE_REG(value));
+    return result;
 #endif
 }
 
-
 /**
   \brief   Reverse byte order (16 bit)
   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
@@ -921,50 +880,44 @@ __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
  */
 __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
+    __ASM volatile("rev16 %0, %1" : __CMSIS_GCC_OUT_REG(result) : __CMSIS_GCC_USE_REG(value));
+    return result;
 }
 
-
 /**
   \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes
+  0x8000. \param [in]    value  Value to reverse \return               Reversed value
  */
 __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 {
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-  return (int16_t)__builtin_bswap16(value);
+    return (int16_t)__builtin_bswap16(value);
 #else
-  int16_t result;
+    int16_t result;
 
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
+    __ASM volatile("revsh %0, %1" : __CMSIS_GCC_OUT_REG(result) : __CMSIS_GCC_USE_REG(value));
+    return result;
 #endif
 }
 
-
 /**
   \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of
+  bits. \param [in]    op1  Value to rotate \param [in]    op2  Number of Bits to rotate \return               Rotated
+  value
  */
 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 {
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
+    op2 %= 32U;
+    if (op2 == 0U) {
+        return op1;
+    }
+    return (op1 >> op2) | (op1 << (32U - op2));
 }
 
-
 /**
   \brief   Breakpoint
   \details Causes the processor to enter Debug state.
@@ -972,8 +925,7 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
   \param [in]    value  is ignored by the processor.
                  If required, a debugger can use it to store additional information about the breakpoint.
  */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
+#define __BKPT(value) __ASM volatile("bkpt " #value)
 
 /**
   \brief   Reverse bit order of value
@@ -983,41 +935,36 @@ __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
  */
 __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 {
-  uint32_t result;
+    uint32_t result;
 
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
+    __ASM volatile("rbit %0, %1" : "=r"(result) : "r"(value));
 #else
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+    uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
+    result = value; /* r will be reversed bits of v; first get LSB of v */
+    for (value >>= 1U; value != 0U; value >>= 1U) {
+        result <<= 1U;
+        result |= value & 1U;
+        s--;
+    }
+    result <<= s; /* shift when v's highest bits are zero */
 #endif
-  return result;
+    return result;
 }
 
-
 /**
   \brief   Count leading zeros
   \details Counts the number of leading zeros of a data value.
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+#define __CLZ (uint8_t) __builtin_clz
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 /**
   \brief   LDR Exclusive (8 bit)
   \details Executes a exclusive LDR instruction for 8 bit value.
@@ -1029,17 +976,16 @@ __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
     uint32_t result;
 
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+    __ASM volatile("ldrexb %0, %1" : "=r"(result) : "Q"(*addr));
 #else
     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
        accepted by assembler. So has to use following less efficient pattern.
     */
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+    __ASM volatile("ldrexb %0, [%1]" : "=r"(result) : "r"(addr) : "memory");
 #endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
+    return ((uint8_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDR Exclusive (16 bit)
   \details Executes a exclusive LDR instruction for 16 bit values.
@@ -1051,17 +997,16 @@ __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
     uint32_t result;
 
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+    __ASM volatile("ldrexh %0, %1" : "=r"(result) : "Q"(*addr));
 #else
     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
        accepted by assembler. So has to use following less efficient pattern.
     */
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+    __ASM volatile("ldrexh %0, [%1]" : "=r"(result) : "r"(addr) : "memory");
 #endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
+    return ((uint16_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDR Exclusive (32 bit)
   \details Executes a exclusive LDR instruction for 32 bit values.
@@ -1072,11 +1017,10 @@ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
+    __ASM volatile("ldrex %0, %1" : "=r"(result) : "Q"(*addr));
+    return (result);
 }
 
-
 /**
   \brief   STR Exclusive (8 bit)
   \details Executes a exclusive STR instruction for 8 bit values.
@@ -1087,13 +1031,12 @@ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
  */
 __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
+    __ASM volatile("strexb %0, %2, %1" : "=&r"(result), "=Q"(*addr) : "r"((uint32_t)value));
+    return (result);
 }
 
-
 /**
   \brief   STR Exclusive (16 bit)
   \details Executes a exclusive STR instruction for 16 bit values.
@@ -1104,13 +1047,12 @@ __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
  */
 __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
+    __ASM volatile("strexh %0, %2, %1" : "=&r"(result), "=Q"(*addr) : "r"((uint32_t)value));
+    return (result);
 }
 
-
 /**
   \brief   STR Exclusive (32 bit)
   \details Executes a exclusive STR instruction for 32 bit values.
@@ -1121,31 +1063,28 @@ __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
  */
 __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
-   return(result);
+    __ASM volatile("strex %0, %2, %1" : "=&r"(result), "=Q"(*addr) : "r"(value));
+    return (result);
 }
 
-
 /**
   \brief   Remove the exclusive lock
   \details Removes the exclusive lock which is created by LDREX.
  */
 __STATIC_FORCEINLINE void __CLREX(void)
 {
-  __ASM volatile ("clrex" ::: "memory");
+    __ASM volatile("clrex" ::: "memory");
 }
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+#if ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ == 1)) || (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) || \
+     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)))
 /**
   \brief   Signed Saturate
   \details Saturates a signed value.
@@ -1153,14 +1092,12 @@ __STATIC_FORCEINLINE void __CLREX(void)
   \param [in]  ARG2  Bit position to saturate to (1..32)
   \return             Saturated value
  */
-#define __SSAT(ARG1,ARG2) \
-__extension__ \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
+#define __SSAT(ARG1, ARG2)                                                                                             \
+    __extension__({                                                                                                    \
+        int32_t __RES, __ARG1 = (ARG1);                                                                                \
+        __ASM("ssat %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                               \
+        __RES;                                                                                                         \
+    })
 
 /**
   \brief   Unsigned Saturate
@@ -1169,14 +1106,12 @@ __extension__ \
   \param [in]  ARG2  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-#define __USAT(ARG1,ARG2) \
- __extension__ \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
+#define __USAT(ARG1, ARG2)                                                                                             \
+    __extension__({                                                                                                    \
+        uint32_t __RES, __ARG1 = (ARG1);                                                                               \
+        __ASM("usat %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                               \
+        __RES;                                                                                                         \
+    })
 
 /**
   \brief   Rotate Right with Extend (32 bit)
@@ -1187,13 +1122,12 @@ __extension__ \
  */
 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
+    __ASM volatile("rrx %0, %1" : __CMSIS_GCC_OUT_REG(result) : __CMSIS_GCC_USE_REG(value));
+    return (result);
 }
 
-
 /**
   \brief   LDRT Unprivileged (8 bit)
   \details Executes a Unprivileged LDRT instruction for 8 bit value.
@@ -1205,17 +1139,16 @@ __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
     uint32_t result;
 
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+    __ASM volatile("ldrbt %0, %1" : "=r"(result) : "Q"(*ptr));
 #else
     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
        accepted by assembler. So has to use following less efficient pattern.
     */
-   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+    __ASM volatile("ldrbt %0, [%1]" : "=r"(result) : "r"(ptr) : "memory");
 #endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
+    return ((uint8_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDRT Unprivileged (16 bit)
   \details Executes a Unprivileged LDRT instruction for 16 bit values.
@@ -1227,17 +1160,16 @@ __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
     uint32_t result;
 
 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+    __ASM volatile("ldrht %0, %1" : "=r"(result) : "Q"(*ptr));
 #else
     /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
        accepted by assembler. So has to use following less efficient pattern.
     */
-   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+    __ASM volatile("ldrht %0, [%1]" : "=r"(result) : "r"(ptr) : "memory");
 #endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
+    return ((uint16_t)result); /* Add explicit type cast here */
 }
 
-
 /**
   \brief   LDRT Unprivileged (32 bit)
   \details Executes a Unprivileged LDRT instruction for 32 bit values.
@@ -1248,11 +1180,10 @@ __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
+    __ASM volatile("ldrt %0, %1" : "=r"(result) : "Q"(*ptr));
+    return (result);
 }
 
-
 /**
   \brief   STRT Unprivileged (8 bit)
   \details Executes a Unprivileged STRT instruction for 8 bit values.
@@ -1261,10 +1192,9 @@ __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
 {
-   __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("strbt %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   STRT Unprivileged (16 bit)
   \details Executes a Unprivileged STRT instruction for 16 bit values.
@@ -1273,10 +1203,9 @@ __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
 {
-   __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("strht %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   STRT Unprivileged (32 bit)
   \details Executes a Unprivileged STRT instruction for 32 bit values.
@@ -1285,12 +1214,12 @@ __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
 {
-   __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+    __ASM volatile("strt %1, %0" : "=Q"(*ptr) : "r"(value));
 }
 
-#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+#else /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                          \
+          (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                          \
+          (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
 /**
   \brief   Signed Saturate
@@ -1301,20 +1230,17 @@ __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
 {
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
+    if ((sat >= 1U) && (sat <= 32U)) {
+        const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+        const int32_t min = -1 - max;
+        if (val > max) {
+            return max;
+        }
+        else if (val < min) {
+            return min;
+        }
     }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
+    return val;
 }
 
 /**
@@ -1326,28 +1252,24 @@ __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
  */
 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
 {
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
+    if (sat <= 31U) {
+        const uint32_t max = ((1U << sat) - 1U);
+        if (val > (int32_t)max) {
+            return max;
+        }
+        else if (val < 0) {
+            return 0U;
+        }
     }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
+    return (uint32_t)val;
 }
 
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) ||                                         \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 /**
   \brief   Load-Acquire (8 bit)
   \details Executes a LDAB instruction for 8 bit value.
@@ -1358,11 +1280,10 @@ __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);
+    __ASM volatile("ldab %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint8_t)result);
 }
 
-
 /**
   \brief   Load-Acquire (16 bit)
   \details Executes a LDAH instruction for 16 bit values.
@@ -1373,11 +1294,10 @@ __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);
+    __ASM volatile("ldah %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint16_t)result);
 }
 
-
 /**
   \brief   Load-Acquire (32 bit)
   \details Executes a LDA instruction for 32 bit values.
@@ -1388,11 +1308,10 @@ __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
+    __ASM volatile("lda %0, %1" : "=r"(result) : "Q"(*ptr));
+    return (result);
 }
 
-
 /**
   \brief   Store-Release (8 bit)
   \details Executes a STLB instruction for 8 bit values.
@@ -1401,10 +1320,9 @@ __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
 {
-   __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stlb %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Store-Release (16 bit)
   \details Executes a STLH instruction for 16 bit values.
@@ -1413,10 +1331,9 @@ __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
 {
-   __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stlh %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Store-Release (32 bit)
   \details Executes a STL instruction for 32 bit values.
@@ -1425,10 +1342,9 @@ __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
 {
-   __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+    __ASM volatile("stl %1, %0" : "=Q"(*ptr) : "r"((uint32_t)value));
 }
 
-
 /**
   \brief   Load-Acquire Exclusive (8 bit)
   \details Executes a LDAB exclusive instruction for 8 bit value.
@@ -1439,11 +1355,10 @@ __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);
+    __ASM volatile("ldaexb %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint8_t)result);
 }
 
-
 /**
   \brief   Load-Acquire Exclusive (16 bit)
   \details Executes a LDAH exclusive instruction for 16 bit values.
@@ -1454,11 +1369,10 @@ __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);
+    __ASM volatile("ldaexh %0, %1" : "=r"(result) : "Q"(*ptr));
+    return ((uint16_t)result);
 }
 
-
 /**
   \brief   Load-Acquire Exclusive (32 bit)
   \details Executes a LDA exclusive instruction for 32 bit values.
@@ -1469,11 +1383,10 @@ __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
 {
     uint32_t result;
 
-   __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
+    __ASM volatile("ldaex %0, %1" : "=r"(result) : "Q"(*ptr));
+    return (result);
 }
 
-
 /**
   \brief   Store-Release Exclusive (8 bit)
   \details Executes a STLB exclusive instruction for 8 bit values.
@@ -1484,13 +1397,12 @@ __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
  */
 __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
+    __ASM volatile("stlexb %0, %2, %1" : "=&r"(result), "=Q"(*ptr) : "r"((uint32_t)value));
+    return (result);
 }
 
-
 /**
   \brief   Store-Release Exclusive (16 bit)
   \details Executes a STLH exclusive instruction for 16 bit values.
@@ -1501,13 +1413,12 @@ __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
  */
 __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
+    __ASM volatile("stlexh %0, %2, %1" : "=&r"(result), "=Q"(*ptr) : "r"((uint32_t)value));
+    return (result);
 }
 
-
 /**
   \brief   Store-Release Exclusive (32 bit)
   \details Executes a STL exclusive instruction for 32 bit values.
@@ -1518,571 +1429,587 @@ __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
  */
 __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
 {
-   uint32_t result;
+    uint32_t result;
 
-   __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
+    __ASM volatile("stlex %0, %2, %1" : "=&r"(result), "=Q"(*ptr) : "r"((uint32_t)value));
+    return (result);
 }
 
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                         \
            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 
 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 
-
 /* ###################  Compiler specific Intrinsics  ########################### */
 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
   Access to dedicated SIMD instructions
   @{
 */
 
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+#if (defined(__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
 
 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhadd8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-
 __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsub8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-
 __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhadd16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsub16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhasx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("ssax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("shsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uqsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uhsax %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("usad8 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("usada8 %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
+#define __SSAT16(ARG1, ARG2)                                                                                           \
+    ({                                                                                                                 \
+        int32_t __RES, __ARG1 = (ARG1);                                                                                \
+        __ASM("ssat16 %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                             \
+        __RES;                                                                                                         \
+    })
 
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
+#define __USAT16(ARG1, ARG2)                                                                                           \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1);                                                                               \
+        __ASM("usat16 %0, %1, %2" : "=r"(__RES) : "I"(ARG2), "r"(__ARG1));                                             \
+        __RES;                                                                                                         \
+    })
 
 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
+    __ASM volatile("uxtb16 %0, %1" : "=r"(result) : "r"(op1));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("uxtab16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
+    __ASM volatile("sxtb16 %0, %1" : "=r"(result) : "r"(op1));
+    return (result);
 }
 
 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sxtab16 %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUAD(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smuad %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUADX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smuadx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLAD(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlad %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLADX(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smladx %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALD(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlald %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlald %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALDX(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlaldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlaldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSD(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smusd %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSDX(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("smusdx %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSD(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlsd %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSDX(uint32_t op1, uint32_t op2, uint32_t op3)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
+    __ASM volatile("smlsdx %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLD(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlsld %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlsld %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLDX(uint32_t op1, uint32_t op2, uint64_t acc)
 {
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
+    union llreg_u
+    {
+        uint32_t w32[2];
+        uint64_t w64;
+    } llr;
+    llr.w64 = acc;
 
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#ifndef __ARMEB__ /* Little endian */
+    __ASM volatile("smlsldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[0]), "=r"(llr.w32[1])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[0]), "1"(llr.w32[1]));
+#else /* Big endian */
+    __ASM volatile("smlsldx %0, %1, %2, %3"
+                   : "=r"(llr.w32[1]), "=r"(llr.w32[0])
+                   : "r"(op1), "r"(op2), "0"(llr.w32[1]), "1"(llr.w32[0]));
 #endif
 
-  return(llr.w64);
+    return (llr.w64);
 }
 
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SEL(uint32_t op1, uint32_t op2)
 {
-  uint32_t result;
+    uint32_t result;
 
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("sel %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+__STATIC_FORCEINLINE int32_t __QADD(int32_t op1, int32_t op2)
 {
-  int32_t result;
+    int32_t result;
 
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qadd %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+__STATIC_FORCEINLINE int32_t __QSUB(int32_t op1, int32_t op2)
 {
-  int32_t result;
+    int32_t result;
 
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
+    __ASM volatile("qsub %0, %1, %2" : "=r"(result) : "r"(op1), "r"(op2));
+    return (result);
 }
 
 #if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2);                                                              \
+        __ASM("pkhbt %0, %1, %2, lsl %3" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2), "I"(ARG3));                         \
+        __RES;                                                                                                         \
+    })
 
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    ({                                                                                                                 \
+        uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2);                                                              \
+        if (ARG3 == 0)                                                                                                 \
+            __ASM("pkhtb %0, %1, %2" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2));                                        \
+        else                                                                                                           \
+            __ASM("pkhtb %0, %1, %2, asr %3" : "=r"(__RES) : "r"(__ARG1), "r"(__ARG2), "I"(ARG3));                     \
+        __RES;                                                                                                         \
+    })
 #endif
 
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+#define __PKHBT(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0x0000FFFFUL) | ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL))
 
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+#define __PKHTB(ARG1, ARG2, ARG3)                                                                                      \
+    (((((uint32_t)(ARG1))) & 0xFFFF0000UL) | ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL))
 
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+__STATIC_FORCEINLINE int32_t __SMMLA(int32_t op1, int32_t op2, int32_t op3)
 {
- int32_t result;
+    int32_t result;
 
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
- return(result);
+    __ASM volatile("smmla %0, %1, %2, %3" : "=r"(result) : "r"(op1), "r"(op2), "r"(op3));
+    return (result);
 }
 
 #endif /* (__ARM_FEATURE_DSP == 1) */
 /*@} end of group CMSIS_SIMD_intrinsics */
 
-
 #pragma GCC diagnostic pop
 
 #endif /* __CMSIS_GCC_H */
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h b/module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h
index edcaee3d4..99d80a54c 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_iccarm.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     cmsis_iccarm.h
- * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.0.5
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_iccarm.h
+                                                                              * @brief    CMSIS compiler ICCARM (IAR
+                                                                              *Compiler for Arm) header file
+                                                                              * @version  V5.0.5
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 
 //------------------------------------------------------------------------------
 //
@@ -22,12 +23,11 @@
 //
 //------------------------------------------------------------------------------
 
-
 #ifndef __CMSIS_ICCARM_H__
 #define __CMSIS_ICCARM_H__
 
 #ifndef __ICCARM__
-  #error This file should only be compiled by ICCARM
+#error This file should only be compiled by ICCARM
 #endif
 
 #pragma system_include
@@ -35,871 +35,855 @@
 #define __IAR_FT _Pragma("inline=forced") __intrinsic
 
 #if (__VER__ >= 8000000)
-  #define __ICCARM_V8 1
+#define __ICCARM_V8 1
 #else
-  #define __ICCARM_V8 0
+#define __ICCARM_V8 0
 #endif
 
 #ifndef __ALIGNED
-  #if __ICCARM_V8
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #elif (__VER__ >= 7080000)
-    /* Needs IAR language extensions */
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #else
-    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
+#if __ICCARM_V8
+#define __ALIGNED(x) __attribute__((aligned(x)))
+#elif (__VER__ >= 7080000)
+/* Needs IAR language extensions */
+#define __ALIGNED(x) __attribute__((aligned(x)))
+#else
+#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
 #endif
-
 
 /* Define compiler macros for CPU architecture, used in CMSIS 5.
  */
 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
 /* Macros already defined */
 #else
-  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
-    #if __ARM_ARCH == 6
-      #define __ARM_ARCH_6M__ 1
-    #elif __ARM_ARCH == 7
-      #if __ARM_FEATURE_DSP
-        #define __ARM_ARCH_7EM__ 1
-      #else
-        #define __ARM_ARCH_7M__ 1
-      #endif
-    #endif /* __ARM_ARCH */
-  #endif /* __ARM_ARCH_PROFILE == 'M' */
+#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
+#define __ARM_ARCH_8M_MAIN__ 1
+#elif defined(__ARM8M_BASELINE__)
+#define __ARM_ARCH_8M_BASE__ 1
+#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
+#if __ARM_ARCH == 6
+#define __ARM_ARCH_6M__ 1
+#elif __ARM_ARCH == 7
+#if __ARM_FEATURE_DSP
+#define __ARM_ARCH_7EM__ 1
+#else
+#define __ARM_ARCH_7M__ 1
+#endif
+#endif /* __ARM_ARCH */
+#endif /* __ARM_ARCH_PROFILE == 'M' */
 #endif
 
 /* Alternativ core deduction for older ICCARM's */
-#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) &&                            \
     !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
-  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
-    #define __ARM_ARCH_6M__ 1
-  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
-    #define __ARM_ARCH_7M__ 1
-  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
-    #define __ARM_ARCH_7EM__  1
-  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #else
-    #error "Unknown target."
-  #endif
-#endif
-
-
-
-#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
-  #define __IAR_M0_FAMILY  1
-#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
-  #define __IAR_M0_FAMILY  1
+#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
+#define __ARM_ARCH_6M__ 1
+#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
+#define __ARM_ARCH_7M__ 1
+#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
+#define __ARM_ARCH_7EM__ 1
+#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
+#define __ARM_ARCH_8M_BASE__ 1
+#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
+#define __ARM_ARCH_8M_MAIN__ 1
+#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
+#define __ARM_ARCH_8M_MAIN__ 1
 #else
-  #define __IAR_M0_FAMILY  0
+#error "Unknown target."
+#endif
 #endif
 
+#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__ == 1
+#define __IAR_M0_FAMILY 1
+#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__ == 1
+#define __IAR_M0_FAMILY 1
+#else
+#define __IAR_M0_FAMILY 0
+#endif
 
 #ifndef __ASM
-  #define __ASM __asm
+#define __ASM __asm
 #endif
 
 #ifndef __INLINE
-  #define __INLINE inline
+#define __INLINE inline
 #endif
 
-#ifndef   __NO_RETURN
-  #if __ICCARM_V8
-    #define __NO_RETURN __attribute__((__noreturn__))
-  #else
-    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
-  #endif
+#ifndef __NO_RETURN
+#if __ICCARM_V8
+#define __NO_RETURN __attribute__((__noreturn__))
+#else
+#define __NO_RETURN _Pragma("object_attribute=__noreturn")
+#endif
 #endif
 
-#ifndef   __PACKED
-  #if __ICCARM_V8
-    #define __PACKED __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED __packed
-  #endif
+#ifndef __PACKED
+#if __ICCARM_V8
+#define __PACKED __attribute__((packed, aligned(1)))
+#else
+/* Needs IAR language extensions */
+#define __PACKED __packed
+#endif
 #endif
 
-#ifndef   __PACKED_STRUCT
-  #if __ICCARM_V8
-    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_STRUCT __packed struct
-  #endif
+#ifndef __PACKED_STRUCT
+#if __ICCARM_V8
+#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
+#else
+/* Needs IAR language extensions */
+#define __PACKED_STRUCT __packed struct
+#endif
 #endif
 
-#ifndef   __PACKED_UNION
-  #if __ICCARM_V8
-    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_UNION __packed union
-  #endif
+#ifndef __PACKED_UNION
+#if __ICCARM_V8
+#define __PACKED_UNION union __attribute__((packed, aligned(1)))
+#else
+/* Needs IAR language extensions */
+#define __PACKED_UNION __packed union
+#endif
 #endif
 
-#ifndef   __RESTRICT
-  #define __RESTRICT            restrict
+#ifndef __RESTRICT
+#define __RESTRICT restrict
 #endif
 
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE       static inline
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE static inline
 #endif
 
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE         _Pragma("inline=forced")
+#ifndef __FORCEINLINE
+#define __FORCEINLINE _Pragma("inline=forced")
 #endif
 
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
+#ifndef __STATIC_FORCEINLINE
+#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
 #endif
 
 #ifndef __UNALIGNED_UINT16_READ
-#pragma language=save
-#pragma language=extended
+#pragma language = save
+#pragma language = extended
 __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 {
-  return *(__packed uint16_t*)(ptr);
+    return *(__packed uint16_t *)(ptr);
 }
-#pragma language=restore
+#pragma language = restore
 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
 #endif
 
-
 #ifndef __UNALIGNED_UINT16_WRITE
-#pragma language=save
-#pragma language=extended
+#pragma language = save
+#pragma language = extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+    *(__packed uint16_t *)(ptr) = val;
+    ;
 }
-#pragma language=restore
-#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
+#pragma language = restore
+#define __UNALIGNED_UINT16_WRITE(PTR, VAL) __iar_uint16_write(PTR, VAL)
 #endif
 
 #ifndef __UNALIGNED_UINT32_READ
-#pragma language=save
-#pragma language=extended
+#pragma language = save
+#pragma language = extended
 __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 {
-  return *(__packed uint32_t*)(ptr);
+    return *(__packed uint32_t *)(ptr);
 }
-#pragma language=restore
+#pragma language = restore
 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
 #endif
 
 #ifndef __UNALIGNED_UINT32_WRITE
-#pragma language=save
-#pragma language=extended
+#pragma language = save
+#pragma language = extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+    *(__packed uint32_t *)(ptr) = val;
+    ;
 }
-#pragma language=restore
-#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
+#pragma language = restore
+#define __UNALIGNED_UINT32_WRITE(PTR, VAL) __iar_uint32_write(PTR, VAL)
 #endif
 
-#ifndef __UNALIGNED_UINT32   /* deprecated */
-#pragma language=save
-#pragma language=extended
-__packed struct  __iar_u32 { uint32_t v; };
-#pragma language=restore
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+#pragma language = save
+#pragma language = extended
+__packed struct __iar_u32
+{
+    uint32_t v;
+};
+#pragma language = restore
 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
 #endif
 
-#ifndef   __USED
-  #if __ICCARM_V8
-    #define __USED __attribute__((used))
-  #else
-    #define __USED _Pragma("__root")
-  #endif
+#ifndef __USED
+#if __ICCARM_V8
+#define __USED __attribute__((used))
+#else
+#define __USED _Pragma("__root")
+#endif
 #endif
 
-#ifndef   __WEAK
-  #if __ICCARM_V8
-    #define __WEAK __attribute__((weak))
-  #else
-    #define __WEAK _Pragma("__weak")
-  #endif
+#ifndef __WEAK
+#if __ICCARM_V8
+#define __WEAK __attribute__((weak))
+#else
+#define __WEAK _Pragma("__weak")
+#endif
 #endif
-
 
 #ifndef __ICCARM_INTRINSICS_VERSION__
-  #define __ICCARM_INTRINSICS_VERSION__  0
+#define __ICCARM_INTRINSICS_VERSION__ 0
 #endif
 
 #if __ICCARM_INTRINSICS_VERSION__ == 2
 
-  #if defined(__CLZ)
-    #undef __CLZ
-  #endif
-  #if defined(__REVSH)
-    #undef __REVSH
-  #endif
-  #if defined(__RBIT)
-    #undef __RBIT
-  #endif
-  #if defined(__SSAT)
-    #undef __SSAT
-  #endif
-  #if defined(__USAT)
-    #undef __USAT
-  #endif
+#if defined(__CLZ)
+#undef __CLZ
+#endif
+#if defined(__REVSH)
+#undef __REVSH
+#endif
+#if defined(__RBIT)
+#undef __RBIT
+#endif
+#if defined(__SSAT)
+#undef __SSAT
+#endif
+#if defined(__USAT)
+#undef __USAT
+#endif
 
-  #include "iccarm_builtin.h"
+#include "iccarm_builtin.h"
 
-  #define __disable_fault_irq __iar_builtin_disable_fiq
-  #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq  __iar_builtin_enable_fiq
-  #define __enable_irq        __iar_builtin_enable_interrupt
-  #define __arm_rsr           __iar_builtin_rsr
-  #define __arm_wsr           __iar_builtin_wsr
+#define __disable_fault_irq __iar_builtin_disable_fiq
+#define __disable_irq       __iar_builtin_disable_interrupt
+#define __enable_fault_irq  __iar_builtin_enable_fiq
+#define __enable_irq        __iar_builtin_enable_interrupt
+#define __arm_rsr           __iar_builtin_rsr
+#define __arm_wsr           __iar_builtin_wsr
 
+#define __get_APSR()      (__arm_rsr("APSR"))
+#define __get_BASEPRI()   (__arm_rsr("BASEPRI"))
+#define __get_CONTROL()   (__arm_rsr("CONTROL"))
+#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
 
-  #define __get_APSR()                (__arm_rsr("APSR"))
-  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
-  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
-  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U)))
+#define __get_FPSCR()      (__arm_rsr("FPSCR"))
+#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
+#else
+#define __get_FPSCR()      (0)
+#define __set_FPSCR(VALUE) ((void)VALUE)
+#endif
 
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
-    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
-  #else
-    #define __get_FPSCR()             ( 0 )
-    #define __set_FPSCR(VALUE)        ((void)VALUE)
-  #endif
+#define __get_IPSR() (__arm_rsr("IPSR"))
+#define __get_MSP()  (__arm_rsr("MSP"))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+// without main extensions, the non-secure MSPLIM is RAZ/WI
+#define __get_MSPLIM() (0U)
+#else
+#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
+#endif
+#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
+#define __get_PSP()     (__arm_rsr("PSP"))
 
-  #define __get_IPSR()                (__arm_rsr("IPSR"))
-  #define __get_MSP()                 (__arm_rsr("MSP"))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __get_MSPLIM()            (0U)
-  #else
-    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
-  #endif
-  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
-  #define __get_PSP()                 (__arm_rsr("PSP"))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+// without main extensions, the non-secure PSPLIM is RAZ/WI
+#define __get_PSPLIM() (0U)
+#else
+#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
+#endif
 
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __get_PSPLIM()            (0U)
-  #else
-    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
-  #endif
+#define __get_xPSR() (__arm_rsr("xPSR"))
 
-  #define __get_xPSR()                (__arm_rsr("xPSR"))
+#define __set_BASEPRI(VALUE)     (__arm_wsr("BASEPRI", (VALUE)))
+#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
+#define __set_CONTROL(VALUE)     (__arm_wsr("CONTROL", (VALUE)))
+#define __set_FAULTMASK(VALUE)   (__arm_wsr("FAULTMASK", (VALUE)))
+#define __set_MSP(VALUE)         (__arm_wsr("MSP", (VALUE)))
 
-  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
-  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
-  #define __set_CONTROL(VALUE)        (__arm_wsr("CONTROL", (VALUE)))
-  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
-  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+// without main extensions, the non-secure MSPLIM is RAZ/WI
+#define __set_MSPLIM(VALUE) ((void)(VALUE))
+#else
+#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
+#endif
+#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
+#define __set_PSP(VALUE)     (__arm_wsr("PSP", (VALUE)))
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+// without main extensions, the non-secure PSPLIM is RAZ/WI
+#define __set_PSPLIM(VALUE) ((void)(VALUE))
+#else
+#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
+#endif
 
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
-  #endif
-  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
-  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
-  #endif
+#define __TZ_get_CONTROL_NS()        (__arm_rsr("CONTROL_NS"))
+#define __TZ_set_CONTROL_NS(VALUE)   (__arm_wsr("CONTROL_NS", (VALUE)))
+#define __TZ_get_PSP_NS()            (__arm_rsr("PSP_NS"))
+#define __TZ_set_PSP_NS(VALUE)       (__arm_wsr("PSP_NS", (VALUE)))
+#define __TZ_get_MSP_NS()            (__arm_rsr("MSP_NS"))
+#define __TZ_set_MSP_NS(VALUE)       (__arm_wsr("MSP_NS", (VALUE)))
+#define __TZ_get_SP_NS()             (__arm_rsr("SP_NS"))
+#define __TZ_set_SP_NS(VALUE)        (__arm_wsr("SP_NS", (VALUE)))
+#define __TZ_get_PRIMASK_NS()        (__arm_rsr("PRIMASK_NS"))
+#define __TZ_set_PRIMASK_NS(VALUE)   (__arm_wsr("PRIMASK_NS", (VALUE)))
+#define __TZ_get_BASEPRI_NS()        (__arm_rsr("BASEPRI_NS"))
+#define __TZ_set_BASEPRI_NS(VALUE)   (__arm_wsr("BASEPRI_NS", (VALUE)))
+#define __TZ_get_FAULTMASK_NS()      (__arm_rsr("FAULTMASK_NS"))
+#define __TZ_set_FAULTMASK_NS(VALUE) (__arm_wsr("FAULTMASK_NS", (VALUE)))
+#define __TZ_get_PSPLIM_NS()         (__arm_rsr("PSPLIM_NS"))
+#define __TZ_set_PSPLIM_NS(VALUE)    (__arm_wsr("PSPLIM_NS", (VALUE)))
+#define __TZ_get_MSPLIM_NS()         (__arm_rsr("MSPLIM_NS"))
+#define __TZ_set_MSPLIM_NS(VALUE)    (__arm_wsr("MSPLIM_NS", (VALUE)))
 
-  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
-  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr("CONTROL_NS", (VALUE)))
-  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
-  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
-  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
-  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
-  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
-  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
-  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
-  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
-  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
-  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
-  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
-  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
-  #define __TZ_get_PSPLIM_NS()        (__arm_rsr("PSPLIM_NS"))
-  #define __TZ_set_PSPLIM_NS(VALUE)   (__arm_wsr("PSPLIM_NS", (VALUE)))
-  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
-  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
+#define __NOP __iar_builtin_no_operation
 
-  #define __NOP     __iar_builtin_no_operation
+#define __CLZ   __iar_builtin_CLZ
+#define __CLREX __iar_builtin_CLREX
 
-  #define __CLZ     __iar_builtin_CLZ
-  #define __CLREX   __iar_builtin_CLREX
+#define __DMB __iar_builtin_DMB
+#define __DSB __iar_builtin_DSB
+#define __ISB __iar_builtin_ISB
 
-  #define __DMB     __iar_builtin_DMB
-  #define __DSB     __iar_builtin_DSB
-  #define __ISB     __iar_builtin_ISB
+#define __LDREXB __iar_builtin_LDREXB
+#define __LDREXH __iar_builtin_LDREXH
+#define __LDREXW __iar_builtin_LDREX
 
-  #define __LDREXB  __iar_builtin_LDREXB
-  #define __LDREXH  __iar_builtin_LDREXH
-  #define __LDREXW  __iar_builtin_LDREX
+#define __RBIT  __iar_builtin_RBIT
+#define __REV   __iar_builtin_REV
+#define __REV16 __iar_builtin_REV16
 
-  #define __RBIT    __iar_builtin_RBIT
-  #define __REV     __iar_builtin_REV
-  #define __REV16   __iar_builtin_REV16
+__IAR_FT int16_t __REVSH(int16_t val)
+{
+    return (int16_t)__iar_builtin_REVSH(val);
+}
 
-  __IAR_FT int16_t __REVSH(int16_t val)
-  {
-    return (int16_t) __iar_builtin_REVSH(val);
-  }
+#define __ROR __iar_builtin_ROR
+#define __RRX __iar_builtin_RRX
 
-  #define __ROR     __iar_builtin_ROR
-  #define __RRX     __iar_builtin_RRX
+#define __SEV __iar_builtin_SEV
 
-  #define __SEV     __iar_builtin_SEV
+#if !__IAR_M0_FAMILY
+#define __SSAT __iar_builtin_SSAT
+#endif
 
-  #if !__IAR_M0_FAMILY
-    #define __SSAT    __iar_builtin_SSAT
-  #endif
+#define __STREXB __iar_builtin_STREXB
+#define __STREXH __iar_builtin_STREXH
+#define __STREXW __iar_builtin_STREX
 
-  #define __STREXB  __iar_builtin_STREXB
-  #define __STREXH  __iar_builtin_STREXH
-  #define __STREXW  __iar_builtin_STREX
+#if !__IAR_M0_FAMILY
+#define __USAT __iar_builtin_USAT
+#endif
 
-  #if !__IAR_M0_FAMILY
-    #define __USAT    __iar_builtin_USAT
-  #endif
+#define __WFE __iar_builtin_WFE
+#define __WFI __iar_builtin_WFI
 
-  #define __WFE     __iar_builtin_WFE
-  #define __WFI     __iar_builtin_WFI
-
-  #if __ARM_MEDIA__
-    #define __SADD8   __iar_builtin_SADD8
-    #define __QADD8   __iar_builtin_QADD8
-    #define __SHADD8  __iar_builtin_SHADD8
-    #define __UADD8   __iar_builtin_UADD8
-    #define __UQADD8  __iar_builtin_UQADD8
-    #define __UHADD8  __iar_builtin_UHADD8
-    #define __SSUB8   __iar_builtin_SSUB8
-    #define __QSUB8   __iar_builtin_QSUB8
-    #define __SHSUB8  __iar_builtin_SHSUB8
-    #define __USUB8   __iar_builtin_USUB8
-    #define __UQSUB8  __iar_builtin_UQSUB8
-    #define __UHSUB8  __iar_builtin_UHSUB8
-    #define __SADD16  __iar_builtin_SADD16
-    #define __QADD16  __iar_builtin_QADD16
-    #define __SHADD16 __iar_builtin_SHADD16
-    #define __UADD16  __iar_builtin_UADD16
-    #define __UQADD16 __iar_builtin_UQADD16
-    #define __UHADD16 __iar_builtin_UHADD16
-    #define __SSUB16  __iar_builtin_SSUB16
-    #define __QSUB16  __iar_builtin_QSUB16
-    #define __SHSUB16 __iar_builtin_SHSUB16
-    #define __USUB16  __iar_builtin_USUB16
-    #define __UQSUB16 __iar_builtin_UQSUB16
-    #define __UHSUB16 __iar_builtin_UHSUB16
-    #define __SASX    __iar_builtin_SASX
-    #define __QASX    __iar_builtin_QASX
-    #define __SHASX   __iar_builtin_SHASX
-    #define __UASX    __iar_builtin_UASX
-    #define __UQASX   __iar_builtin_UQASX
-    #define __UHASX   __iar_builtin_UHASX
-    #define __SSAX    __iar_builtin_SSAX
-    #define __QSAX    __iar_builtin_QSAX
-    #define __SHSAX   __iar_builtin_SHSAX
-    #define __USAX    __iar_builtin_USAX
-    #define __UQSAX   __iar_builtin_UQSAX
-    #define __UHSAX   __iar_builtin_UHSAX
-    #define __USAD8   __iar_builtin_USAD8
-    #define __USADA8  __iar_builtin_USADA8
-    #define __SSAT16  __iar_builtin_SSAT16
-    #define __USAT16  __iar_builtin_USAT16
-    #define __UXTB16  __iar_builtin_UXTB16
-    #define __UXTAB16 __iar_builtin_UXTAB16
-    #define __SXTB16  __iar_builtin_SXTB16
-    #define __SXTAB16 __iar_builtin_SXTAB16
-    #define __SMUAD   __iar_builtin_SMUAD
-    #define __SMUADX  __iar_builtin_SMUADX
-    #define __SMMLA   __iar_builtin_SMMLA
-    #define __SMLAD   __iar_builtin_SMLAD
-    #define __SMLADX  __iar_builtin_SMLADX
-    #define __SMLALD  __iar_builtin_SMLALD
-    #define __SMLALDX __iar_builtin_SMLALDX
-    #define __SMUSD   __iar_builtin_SMUSD
-    #define __SMUSDX  __iar_builtin_SMUSDX
-    #define __SMLSD   __iar_builtin_SMLSD
-    #define __SMLSDX  __iar_builtin_SMLSDX
-    #define __SMLSLD  __iar_builtin_SMLSLD
-    #define __SMLSLDX __iar_builtin_SMLSLDX
-    #define __SEL     __iar_builtin_SEL
-    #define __QADD    __iar_builtin_QADD
-    #define __QSUB    __iar_builtin_QSUB
-    #define __PKHBT   __iar_builtin_PKHBT
-    #define __PKHTB   __iar_builtin_PKHTB
-  #endif
+#if __ARM_MEDIA__
+#define __SADD8   __iar_builtin_SADD8
+#define __QADD8   __iar_builtin_QADD8
+#define __SHADD8  __iar_builtin_SHADD8
+#define __UADD8   __iar_builtin_UADD8
+#define __UQADD8  __iar_builtin_UQADD8
+#define __UHADD8  __iar_builtin_UHADD8
+#define __SSUB8   __iar_builtin_SSUB8
+#define __QSUB8   __iar_builtin_QSUB8
+#define __SHSUB8  __iar_builtin_SHSUB8
+#define __USUB8   __iar_builtin_USUB8
+#define __UQSUB8  __iar_builtin_UQSUB8
+#define __UHSUB8  __iar_builtin_UHSUB8
+#define __SADD16  __iar_builtin_SADD16
+#define __QADD16  __iar_builtin_QADD16
+#define __SHADD16 __iar_builtin_SHADD16
+#define __UADD16  __iar_builtin_UADD16
+#define __UQADD16 __iar_builtin_UQADD16
+#define __UHADD16 __iar_builtin_UHADD16
+#define __SSUB16  __iar_builtin_SSUB16
+#define __QSUB16  __iar_builtin_QSUB16
+#define __SHSUB16 __iar_builtin_SHSUB16
+#define __USUB16  __iar_builtin_USUB16
+#define __UQSUB16 __iar_builtin_UQSUB16
+#define __UHSUB16 __iar_builtin_UHSUB16
+#define __SASX    __iar_builtin_SASX
+#define __QASX    __iar_builtin_QASX
+#define __SHASX   __iar_builtin_SHASX
+#define __UASX    __iar_builtin_UASX
+#define __UQASX   __iar_builtin_UQASX
+#define __UHASX   __iar_builtin_UHASX
+#define __SSAX    __iar_builtin_SSAX
+#define __QSAX    __iar_builtin_QSAX
+#define __SHSAX   __iar_builtin_SHSAX
+#define __USAX    __iar_builtin_USAX
+#define __UQSAX   __iar_builtin_UQSAX
+#define __UHSAX   __iar_builtin_UHSAX
+#define __USAD8   __iar_builtin_USAD8
+#define __USADA8  __iar_builtin_USADA8
+#define __SSAT16  __iar_builtin_SSAT16
+#define __USAT16  __iar_builtin_USAT16
+#define __UXTB16  __iar_builtin_UXTB16
+#define __UXTAB16 __iar_builtin_UXTAB16
+#define __SXTB16  __iar_builtin_SXTB16
+#define __SXTAB16 __iar_builtin_SXTAB16
+#define __SMUAD   __iar_builtin_SMUAD
+#define __SMUADX  __iar_builtin_SMUADX
+#define __SMMLA   __iar_builtin_SMMLA
+#define __SMLAD   __iar_builtin_SMLAD
+#define __SMLADX  __iar_builtin_SMLADX
+#define __SMLALD  __iar_builtin_SMLALD
+#define __SMLALDX __iar_builtin_SMLALDX
+#define __SMUSD   __iar_builtin_SMUSD
+#define __SMUSDX  __iar_builtin_SMUSDX
+#define __SMLSD   __iar_builtin_SMLSD
+#define __SMLSDX  __iar_builtin_SMLSDX
+#define __SMLSLD  __iar_builtin_SMLSLD
+#define __SMLSLDX __iar_builtin_SMLSLDX
+#define __SEL     __iar_builtin_SEL
+#define __QADD    __iar_builtin_QADD
+#define __QSUB    __iar_builtin_QSUB
+#define __PKHBT   __iar_builtin_PKHBT
+#define __PKHTB   __iar_builtin_PKHTB
+#endif
 
 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
 
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #define __CLZ  __cmsis_iar_clz_not_active
-    #define __SSAT __cmsis_iar_ssat_not_active
-    #define __USAT __cmsis_iar_usat_not_active
-    #define __RBIT __cmsis_iar_rbit_not_active
-    #define __get_APSR  __cmsis_iar_get_APSR_not_active
-  #endif
+#if __IAR_M0_FAMILY
+/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+#define __CLZ      __cmsis_iar_clz_not_active
+#define __SSAT     __cmsis_iar_ssat_not_active
+#define __USAT     __cmsis_iar_usat_not_active
+#define __RBIT     __cmsis_iar_rbit_not_active
+#define __get_APSR __cmsis_iar_get_APSR_not_active
+#endif
 
+#if (!((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U))))
+#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
+#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
+#endif
 
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
-    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
-  #endif
+#ifdef __INTRINSICS_INCLUDED
+#error intrinsics.h is already included previously!
+#endif
 
-  #ifdef __INTRINSICS_INCLUDED
-  #error intrinsics.h is already included previously!
-  #endif
+#include <intrinsics.h>
 
-  #include <intrinsics.h>
+#if __IAR_M0_FAMILY
+/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+#undef __CLZ
+#undef __SSAT
+#undef __USAT
+#undef __RBIT
+#undef __get_APSR
 
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #undef __CLZ
-    #undef __SSAT
-    #undef __USAT
-    #undef __RBIT
-    #undef __get_APSR
-
-    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
-    {
-      if (data == 0U) { return 32U; }
-
-      uint32_t count = 0U;
-      uint32_t mask = 0x80000000U;
-
-      while ((data & mask) == 0U)
-      {
-        count += 1U;
-        mask = mask >> 1U;
-      }
-      return count;
+__STATIC_INLINE uint8_t __CLZ(uint32_t data)
+{
+    if (data == 0U) {
+        return 32U;
     }
 
-    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
-    {
-      uint8_t sc = 31U;
-      uint32_t r = v;
-      for (v >>= 1U; v; v >>= 1U)
-      {
+    uint32_t count = 0U;
+    uint32_t mask  = 0x80000000U;
+
+    while ((data & mask) == 0U) {
+        count += 1U;
+        mask = mask >> 1U;
+    }
+    return count;
+}
+
+__STATIC_INLINE uint32_t __RBIT(uint32_t v)
+{
+    uint8_t sc = 31U;
+    uint32_t r = v;
+    for (v >>= 1U; v; v >>= 1U) {
         r <<= 1U;
         r |= v & 1U;
         sc--;
-      }
-      return (r << sc);
     }
+    return (r << sc);
+}
 
-    __STATIC_INLINE  uint32_t __get_APSR(void)
-    {
-      uint32_t res;
-      __asm("MRS      %0,APSR" : "=r" (res));
-      return res;
-    }
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+    uint32_t res;
+    __asm("MRS      %0,APSR" : "=r"(res));
+    return res;
+}
 
-  #endif
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #undef __get_FPSCR
-    #undef __set_FPSCR
-    #define __get_FPSCR()       (0)
-    #define __set_FPSCR(VALUE)  ((void)VALUE)
-  #endif
-
-  #pragma diag_suppress=Pe940
-  #pragma diag_suppress=Pe177
-
-  #define __enable_irq    __enable_interrupt
-  #define __disable_irq   __disable_interrupt
-  #define __NOP           __no_operation
-
-  #define __get_xPSR      __get_PSR
-
-  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
-
-    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
-    {
-      return __LDREX((unsigned long *)ptr);
-    }
-
-    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
-    {
-      return __STREX(value, (unsigned long *)ptr);
-    }
-  #endif
-
-
-  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-  #if (__CORTEX_M >= 0x03)
-
-    __IAR_FT uint32_t __RRX(uint32_t value)
-    {
-      uint32_t result;
-      __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
-      return(result);
-    }
-
-    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
-    }
-
-
-    #define __enable_fault_irq  __enable_fiq
-    #define __disable_fault_irq __disable_fiq
-
-
-  #endif /* (__CORTEX_M >= 0x03) */
-
-  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
-  {
-    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
-  }
-
-  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-   __IAR_FT uint32_t __get_MSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_MSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __get_PSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_PSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
-    {
-      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
-      return res;
-    }
-    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
-      return res;
-    }
-    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
-    }
-
-  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
-
-#if __IAR_M0_FAMILY
-  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-  {
-    if ((sat >= 1U) && (sat <= 32U))
-    {
-      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-      const int32_t min = -1 - max ;
-      if (val > max)
-      {
-        return max;
-      }
-      else if (val < min)
-      {
-        return min;
-      }
-    }
-    return val;
-  }
-
-  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-  {
-    if (sat <= 31U)
-    {
-      const uint32_t max = ((1U << sat) - 1U);
-      if (val > (int32_t)max)
-      {
-        return max;
-      }
-      else if (val < 0)
-      {
-        return 0U;
-      }
-    }
-    return (uint32_t)val;
-  }
 #endif
 
-#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+#if (!((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && (defined(__FPU_USED) && (__FPU_USED == 1U))))
+#undef __get_FPSCR
+#undef __set_FPSCR
+#define __get_FPSCR()      (0)
+#define __set_FPSCR(VALUE) ((void)VALUE)
+#endif
 
-  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint8_t)res);
-  }
+#pragma diag_suppress = Pe940
+#pragma diag_suppress = Pe177
 
-  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint16_t)res);
-  }
+#define __enable_irq  __enable_interrupt
+#define __disable_irq __disable_interrupt
+#define __NOP         __no_operation
 
-  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return res;
-  }
+#define __get_xPSR __get_PSR
 
-  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
-  {
-    __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
+#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__ == 0)
 
-  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
-  {
-    __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
+__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
+{
+    return __LDREX((unsigned long *)ptr);
+}
 
-  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
-  {
-    __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
-  }
+__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
+{
+    return __STREX(value, (unsigned long *)ptr);
+}
+#endif
+
+/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+#if (__CORTEX_M >= 0x03)
+
+__IAR_FT uint32_t __RRX(uint32_t value)
+{
+    uint32_t result;
+    __ASM("RRX      %0, %1" : "=r"(result) : "r"(value) : "cc");
+    return (result);
+}
+
+__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
+{
+    __asm volatile("MSR      BASEPRI_MAX,%0" ::"r"(value));
+}
+
+#define __enable_fault_irq  __enable_fiq
+#define __disable_fault_irq __disable_fiq
 
 #endif /* (__CORTEX_M >= 0x03) */
 
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+    return (op1 >> op2) | (op1 << ((sizeof(op1) * 8) - op2));
+}
 
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
 
-  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
-  {
+__IAR_FT uint32_t __get_MSPLIM(void)
+{
     uint32_t res;
-    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    res = 0U;
+#else
+    __asm volatile("MRS      %0,MSPLIM" : "=r"(res));
+#endif
+    return res;
+}
+
+__IAR_FT void __set_MSPLIM(uint32_t value)
+{
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    (void)value;
+#else
+    __asm volatile("MSR      MSPLIM,%0" ::"r"(value));
+#endif
+}
+
+__IAR_FT uint32_t __get_PSPLIM(void)
+{
+    uint32_t res;
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    res = 0U;
+#else
+    __asm volatile("MRS      %0,PSPLIM" : "=r"(res));
+#endif
+    return res;
+}
+
+__IAR_FT void __set_PSPLIM(uint32_t value)
+{
+#if (!(defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) &&                                                \
+     (!defined(__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    (void)value;
+#else
+    __asm volatile("MSR      PSPLIM,%0" ::"r"(value));
+#endif
+}
+
+__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,CONTROL_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
+{
+    __asm volatile("MSR      CONTROL_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_PSP_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,PSP_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
+{
+    __asm volatile("MSR      PSP_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_MSP_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,MSP_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
+{
+    __asm volatile("MSR      MSP_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_SP_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,SP_NS" : "=r"(res));
+    return res;
+}
+__IAR_FT void __TZ_set_SP_NS(uint32_t value)
+{
+    __asm volatile("MSR      SP_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,PRIMASK_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
+{
+    __asm volatile("MSR      PRIMASK_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,BASEPRI_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
+{
+    __asm volatile("MSR      BASEPRI_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,FAULTMASK_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
+{
+    __asm volatile("MSR      FAULTMASK_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,PSPLIM_NS" : "=r"(res));
+    return res;
+}
+__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
+{
+    __asm volatile("MSR      PSPLIM_NS,%0" ::"r"(value));
+}
+
+__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
+{
+    uint32_t res;
+    __asm volatile("MRS      %0,MSPLIM_NS" : "=r"(res));
+    return res;
+}
+
+__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
+{
+    __asm volatile("MSR      MSPLIM_NS,%0" ::"r"(value));
+}
+
+#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
+
+#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
+
+#define __BKPT(value) __asm volatile("BKPT     %0" : : "i"(value))
+
+#if __IAR_M0_FAMILY
+__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+    if ((sat >= 1U) && (sat <= 32U)) {
+        const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+        const int32_t min = -1 - max;
+        if (val > max) {
+            return max;
+        }
+        else if (val < min) {
+            return min;
+        }
+    }
+    return val;
+}
+
+__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+    if (sat <= 31U) {
+        const uint32_t max = ((1U << sat) - 1U);
+        if (val > (int32_t)max) {
+            return max;
+        }
+        else if (val < 0) {
+            return 0U;
+        }
+    }
+    return (uint32_t)val;
+}
+#endif
+
+#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+
+__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
+{
+    uint32_t res;
+    __ASM("LDRBT %0, [%1]" : "=r"(res) : "r"(addr) : "memory");
     return ((uint8_t)res);
-  }
+}
 
-  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
-  {
+__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
+{
     uint32_t res;
-    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+    __ASM("LDRHT %0, [%1]" : "=r"(res) : "r"(addr) : "memory");
     return ((uint16_t)res);
-  }
+}
 
-  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
-  {
+__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
+{
     uint32_t res;
-    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+    __ASM("LDRT %0, [%1]" : "=r"(res) : "r"(addr) : "memory");
     return res;
-  }
+}
 
-  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
-  {
-    __ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
-  }
+__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
+{
+    __ASM("STRBT %1, [%0]" : : "r"(addr), "r"((uint32_t)value) : "memory");
+}
 
-  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
-  {
-    __ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
-  }
+__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
+{
+    __ASM("STRHT %1, [%0]" : : "r"(addr), "r"((uint32_t)value) : "memory");
+}
 
-  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
-  {
-    __ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
-  }
+__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
+{
+    __ASM("STRT %1, [%0]" : : "r"(addr), "r"(value) : "memory");
+}
 
-  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
-  {
+#endif /* (__CORTEX_M >= 0x03) */
+
+#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) ||                                                 \
+     (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
+
+__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
+{
     uint32_t res;
-    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+    __ASM volatile("LDAB %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
     return ((uint8_t)res);
-  }
+}
 
-  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
-  {
+__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
+{
     uint32_t res;
-    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+    __ASM volatile("LDAH %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
     return ((uint16_t)res);
-  }
+}
 
-  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
-  {
+__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
+{
     uint32_t res;
-    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
+    __ASM volatile("LDA %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
     return res;
-  }
+}
 
-  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
-    return res;
-  }
+__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+    __ASM volatile("STLB %1, [%0]" ::"r"(*ptr), "r"(value) : "memory");
+}
 
-  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
-    return res;
-  }
+__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+    __ASM volatile("STLH %1, [%0]" ::"r"(*ptr), "r"(value) : "memory");
+}
 
-  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-  {
+__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+    __ASM volatile("STL %1, [%0]" ::"r"(*ptr), "r"(value) : "memory");
+}
+
+__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
+{
     uint32_t res;
-    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
+    __ASM volatile("LDAEXB %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
+    return ((uint8_t)res);
+}
+
+__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
+{
+    uint32_t res;
+    __ASM volatile("LDAEXH %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
+    return ((uint16_t)res);
+}
+
+__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
+{
+    uint32_t res;
+    __ASM volatile("LDAEX %0, [%1]" : "=r"(res) : "r"(*ptr) : "memory");
     return res;
-  }
+}
+
+__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+{
+    uint32_t res;
+    __ASM volatile("STLEXB %0, %2, [%1]" : "=r"(res) : "r"(*ptr), "r"(value) : "memory");
+    return res;
+}
+
+__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+{
+    uint32_t res;
+    __ASM volatile("STLEXH %0, %2, [%1]" : "=r"(res) : "r"(*ptr), "r"(value) : "memory");
+    return res;
+}
+
+__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+{
+    uint32_t res;
+    __ASM volatile("STLEX %0, %2, [%1]" : "=r"(res) : "r"(*ptr), "r"(value) : "memory");
+    return res;
+}
 
 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
 
@@ -907,7 +891,7 @@ __packed struct  __iar_u32 { uint32_t v; };
 #undef __IAR_M0_FAMILY
 #undef __ICCARM_V8
 
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
+#pragma diag_default = Pe940
+#pragma diag_default = Pe177
 
 #endif /* __CMSIS_ICCARM_H__ */
diff --git a/module-bsp/board/rt1051/common/cmsis/cmsis_version.h b/module-bsp/board/rt1051/common/cmsis/cmsis_version.h
index 660f612aa..89936a31a 100644
--- a/module-bsp/board/rt1051/common/cmsis/cmsis_version.h
+++ b/module-bsp/board/rt1051/common/cmsis/cmsis_version.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     cmsis_version.h
- * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.2
- * @date     19. April 2017
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     cmsis_version.h
+                                                                              * @brief    CMSIS Core(M) Version
+                                                                              *definitions
+                                                                              * @version  V5.0.2
+                                                                              * @date     19. April 2017
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
@@ -22,18 +23,18 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
 
 #ifndef __CMSIS_VERSION_H
 #define __CMSIS_VERSION_H
 
 /*  CMSIS Version definitions */
-#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
-#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
-                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#define __CM_CMSIS_VERSION_MAIN (5U) /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB  (1U) /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION                                                                                             \
+    ((__CM_CMSIS_VERSION_MAIN << 16U) | __CM_CMSIS_VERSION_SUB) /*!< CMSIS Core(M) version number */
 #endif
diff --git a/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h b/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h
index 47a39893a..5f8557085 100644
--- a/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h
+++ b/module-bsp/board/rt1051/common/cmsis/core_armv8mbl.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     core_armv8mbl.h
- * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     core_armv8mbl.h
+                                                                              * @brief    CMSIS Armv8-M Baseline Core
+                                                                              *Peripheral Access Layer Header File
+                                                                              * @version  V5.0.4
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
@@ -22,10 +23,10 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
 
 #ifndef __CORE_ARMV8MBL_H_GENERIC
@@ -34,86 +35,86 @@
 #include <stdint.h>
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
+    /**
+      \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+      CMSIS violates the following MISRA-C:2004 rules:
 
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
+       \li Required Rule 8.5, object/function definition in header file.<br>
+         Function definitions in header files are used to allow 'inlining'.
 
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
+       \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+         Unions are used for effective representation of core registers.
 
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
+       \li Advisory Rule 19.7, Function-like macro defined.<br>
+         Function-like macros are used to allow more efficient code.
+     */
 
+    /*******************************************************************************
+     *                 CMSIS definitions
+     ******************************************************************************/
+    /**
+      \ingroup Cortex_ARMv8MBL
+      @{
+     */
 
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_ARMv8MBL
-  @{
- */
- 
 #include "cmsis_version.h"
 
 /*  CMSIS definitions */
-#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \
-                                         __ARMv8MBL_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+#define __ARMv8MBL_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MBL_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)  /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MBL_CMSIS_VERSION                                                                                       \
+    ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | __ARMv8MBL_CMSIS_VERSION_SUB) /*!< \deprecated CMSIS HAL version number  \
+                                                                             */
 
-#define __CORTEX_M                     ( 2U)                                            /*!< Cortex-M Core */
+#define __CORTEX_M (2U) /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0U
+#define __FPU_USED 0U
 
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#if defined(__CC_ARM)
+#if defined __TARGET_FPU_VFP
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#if defined __ARM_PCS_VFP
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__GNUC__)
+#if defined(__VFP_FP__) && !defined(__SOFTFP__)
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__ICCARM__)
+#if defined __ARMVFP__
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__TI_ARM__)
+#if defined __TI_VFP_SUPPORT__
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__TASKING__)
+#if defined __FPU_VFP__
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
+#elif defined(__CSMC__)
+#if (__CSMC__ & 0x400U)
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#endif
 
 #endif
 
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
+#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
 
 #ifdef __cplusplus
 }
@@ -127,55 +128,56 @@
 #define __CORE_ARMV8MBL_H_DEPENDANT
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
-  #ifndef __ARMv8MBL_REV
-    #define __ARMv8MBL_REV               0x0000U
-    #warning "__ARMv8MBL_REV not defined in device header file; using default!"
-  #endif
+#ifndef __ARMv8MBL_REV
+#define __ARMv8MBL_REV 0x0000U
+#warning "__ARMv8MBL_REV not defined in device header file; using default!"
+#endif
 
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __FPU_PRESENT
+#define __FPU_PRESENT 0U
+#warning "__FPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __MPU_PRESENT
+#define __MPU_PRESENT 0U
+#warning "__MPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __SAUREGION_PRESENT
+#define __SAUREGION_PRESENT 0U
+#warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0U
-    #warning "__VTOR_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __VTOR_PRESENT
+#define __VTOR_PRESENT 0U
+#warning "__VTOR_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
+#ifndef __NVIC_PRIO_BITS
+#define __NVIC_PRIO_BITS 2U
+#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+#endif
 
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
+#ifndef __Vendor_SysTickConfig
+#define __Vendor_SysTickConfig 0U
+#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+#endif
 
-  #ifndef __ETM_PRESENT
-    #define __ETM_PRESENT             0U
-    #warning "__ETM_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __ETM_PRESENT
+#define __ETM_PRESENT 0U
+#warning "__ETM_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __MTB_PRESENT
-    #define __MTB_PRESENT             0U
-    #warning "__MTB_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __MTB_PRESENT
+#define __MTB_PRESENT 0U
+#warning "__MTB_PRESENT not defined in device header file; using default!"
+#endif
 
 #endif
 
@@ -188,948 +190,947 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#define __I volatile /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#define __I volatile const /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+#define __O  volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
 
 /* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+#define __IM  volatile const /*! Defines 'read only' structure member permissions */
+#define __OM  volatile       /*! Defines 'write only' structure member permissions */
+#define __IOM volatile       /*! Defines 'read / write' structure member permissions */
 
-/*@} end of group ARMv8MBL */
+    /*@} end of group ARMv8MBL */
 
+    /*******************************************************************************
+     *                 Register Abstraction
+      Core Register contain:
+      - Core Register
+      - Core NVIC Register
+      - Core SCB Register
+      - Core SysTick Register
+      - Core Debug Register
+      - Core MPU Register
+      - Core SAU Register
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_core_register Defines and Type Definitions
+      \brief Type definitions and defines for Cortex-M processor based devices.
+    */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_CORE  Status and Control Registers
+      \brief      Core Register type definitions.
+      @{
+     */
 
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
+    /**
+      \brief  Union type to access the Application Program Status Register (APSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t _reserved0 : 28; /*!< bit:  0..27  Reserved */
+            uint32_t V : 1;           /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;           /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;           /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;           /*!< bit:     31  Negative condition code flag */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+#define APSR_N_Pos 31U                 /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+#define APSR_Z_Pos 30U                 /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+#define APSR_C_Pos 29U                 /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+#define APSR_V_Pos 28U                 /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
 
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
+    /**
+      \brief  Union type to access the Interrupt Program Status Register (IPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;         /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 23; /*!< bit:  9..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+#define IPSR_ISR_Pos 0U                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
+    /**
+      \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;         /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 15; /*!< bit:  9..23  Reserved */
+            uint32_t T : 1;           /*!< bit:     24  Thumb bit        (read 0) */
+            uint32_t _reserved1 : 3;  /*!< bit: 25..27  Reserved */
+            uint32_t V : 1;           /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;           /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;           /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;           /*!< bit:     31  Negative condition code flag */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+#define xPSR_N_Pos 31U                 /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+#define xPSR_Z_Pos 30U                 /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+#define xPSR_C_Pos 29U                 /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+#define xPSR_V_Pos 28U                 /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
 
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+#define xPSR_T_Pos 24U                 /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+#define xPSR_ISR_Pos 0U                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
+    /**
+      \brief  Union type to access the Control Registers (CONTROL).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t nPRIV : 1;       /*!< bit:      0  Execution privilege in Thread mode */
+            uint32_t SPSEL : 1;       /*!< bit:      1  Stack-pointer select */
+            uint32_t _reserved1 : 30; /*!< bit:  2..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+#define CONTROL_SPSEL_Pos 1U                         /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+#define CONTROL_nPRIV_Pos 0U                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
 
-/*@} end of group CMSIS_CORE */
+    /*@} end of group CMSIS_CORE */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+      \brief      Type definitions for the NVIC Registers
+      @{
+     */
 
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+    /**
+      \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+     */
+    typedef struct
+    {
+        __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
         uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
         uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
         uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
         uint32_t RESERVED5[16U];
-  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
+        __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+    } NVIC_Type;
 
-/*@} end of group CMSIS_NVIC */
+    /*@} end of group CMSIS_NVIC */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SCB     System Control Block (SCB)
+      \brief    Type definitions for the System Control Block Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+    /**
+      \brief  Structure type to access the System Control Block (SCB).
+     */
+    typedef struct
+    {
+        __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+        __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+        __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
 #else
-        uint32_t RESERVED0;
+    uint32_t RESERVED0;
 #endif
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+        __IOM uint32_t SCR;   /*!< Offset: 0x010 (R/W)  System Control Register */
+        __IOM uint32_t CCR;   /*!< Offset: 0x014 (R/W)  Configuration Control Register */
         uint32_t RESERVED1;
-  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
+        __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+        __IOM uint32_t SHCSR;    /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+    } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U                                   /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+#define SCB_CPUID_VARIANT_Pos 20U                              /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+#define SCB_CPUID_ARCHITECTURE_Pos 16U                                   /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+#define SCB_CPUID_PARTNO_Pos 4U                                /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+#define SCB_CPUID_REVISION_Pos 0U                                    /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+#define SCB_ICSR_PENDNMISET_Pos 31U                              /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
 
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+#define SCB_ICSR_PENDNMICLR_Pos 30U                              /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+#define SCB_ICSR_PENDSVSET_Pos 28U                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+#define SCB_ICSR_PENDSVCLR_Pos 27U                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+#define SCB_ICSR_PENDSTSET_Pos 26U                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+#define SCB_ICSR_PENDSTCLR_Pos 25U                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+#define SCB_ICSR_STTNS_Pos 24U                         /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+#define SCB_ICSR_ISRPREEMPT_Pos 23U                              /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+#define SCB_ICSR_ISRPENDING_Pos 22U                              /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+#define SCB_ICSR_VECTPENDING_Pos 12U                                   /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+#define SCB_ICSR_RETTOBASE_Pos 11U                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+#define SCB_ICSR_VECTACTIVE_Pos 0U                                       /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
 
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#define SCB_VTOR_TBLOFF_Pos 7U                                   /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
 #endif
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+#define SCB_AIRCR_VECTKEY_Pos 16U                                 /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U                                     /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+#define SCB_AIRCR_ENDIANESS_Pos 15U                              /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+#define SCB_AIRCR_PRIS_Pos 14U                         /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
 
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+#define SCB_AIRCR_BFHFNMINS_Pos 13U                              /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
 
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+#define SCB_AIRCR_SYSRESETREQS_Pos 3U                                  /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U                                 /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U                                   /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+#define SCB_SCR_SEVONPEND_Pos 4U                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+#define SCB_SCR_SLEEPDEEPS_Pos 3U                              /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+#define SCB_SCR_SLEEPDEEP_Pos 2U                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+#define SCB_SCR_SLEEPONEXIT_Pos 1U                               /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+#define SCB_CCR_BP_Pos 18U                     /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
 
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+#define SCB_CCR_IC_Pos 17U                     /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
 
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+#define SCB_CCR_DC_Pos 16U                     /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
 
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+#define SCB_CCR_STKOFHFNMIGN_Pos 10U                               /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+#define SCB_CCR_BFHFNMIGN_Pos 8U                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+#define SCB_CCR_DIV_0_TRP_Pos 4U                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+#define SCB_CCR_UNALIGN_TRP_Pos 3U                               /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+#define SCB_CCR_USERSETMPEND_Pos 1U                                /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U                                    /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U                                 /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+#define SCB_SHCSR_SYSTICKACT_Pos 11U                               /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+#define SCB_SHCSR_PENDSVACT_Pos 10U                              /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+#define SCB_SHCSR_SVCALLACT_Pos 7U                               /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+#define SCB_SHCSR_NMIACT_Pos 5U                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
 
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+#define SCB_SHCSR_HARDFAULTACT_Pos 2U                                  /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
 
-/*@} end of group CMSIS_SCB */
+    /*@} end of group CMSIS_SCB */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+      \brief    Type definitions for the System Timer Registers.
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
+    /**
+      \brief  Structure type to access the System Timer (SysTick).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+        __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+        __IOM uint32_t VAL;  /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+        __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+    } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U                                 /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+#define SysTick_CTRL_CLKSOURCE_Pos 2U                                  /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+#define SysTick_CTRL_TICKINT_Pos 1U                                /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+#define SysTick_CTRL_ENABLE_Pos 0U                                   /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+#define SysTick_LOAD_RELOAD_Pos 0U                                          /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+#define SysTick_VAL_CURRENT_Pos 0U                                          /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+#define SysTick_CALIB_NOREF_Pos 31U                              /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+#define SysTick_CALIB_SKEW_Pos 30U                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+#define SysTick_CALIB_TENMS_Pos 0U                                          /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
 
-/*@} end of group CMSIS_SysTick */
+    /*@} end of group CMSIS_SysTick */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+      \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+    /**
+      \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  Control Register */
         uint32_t RESERVED0[6U];
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        __IM uint32_t PCSR;   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+        __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
         uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W)  Function Register 0 */
         uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
         uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W)  Function Register 1 */
         uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
         uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W)  Function Register 2 */
         uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
         uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W)  Function Register 3 */
         uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
         uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W)  Function Register 4 */
         uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
         uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W)  Function Register 5 */
         uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
         uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W)  Function Register 6 */
         uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
         uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W)  Function Register 7 */
         uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
         uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
         uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
         uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
         uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
         uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
         uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
         uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
         uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
         uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
         uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
         uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
         uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
         uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W)  Function Register 14 */
         uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
         uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-} DWT_Type;
+        __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W)  Function Register 15 */
+    } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+#define DWT_CTRL_NUMCOMP_Pos 28U                             /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+#define DWT_CTRL_NOTRCPKT_Pos 27U                              /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+#define DWT_CTRL_NOEXTTRIG_Pos 26U                               /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+#define DWT_CTRL_NOCYCCNT_Pos 25U                              /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+#define DWT_CTRL_NOPRFCNT_Pos 24U                              /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+#define DWT_FUNCTION_ID_Pos 27U                             /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
 
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+#define DWT_FUNCTION_MATCHED_Pos 24U                                 /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U                                   /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+#define DWT_FUNCTION_ACTION_Pos 4U                                 /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
 
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+#define DWT_FUNCTION_MATCH_Pos 0U                                    /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
 
-/*@}*/ /* end of group CMSIS_DWT */
+    /*@}*/ /* end of group CMSIS_DWT */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+      \brief    Type definitions for the Trace Port Interface (TPI)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+    /**
+      \brief  Structure type to access the Trace Port Interface Register (TPI).
+     */
+    typedef struct
+    {
+        __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+        __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
         uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
         uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
         uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        __IM uint32_t FFSR;  /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+        __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+        __IM uint32_t FSCR;  /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
         uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        __IM uint32_t TRIGGER;   /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+        __IM uint32_t FIFO0;     /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+        __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
         uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+        __IM uint32_t FIFO1;     /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+        __IOM uint32_t ITCTRL;   /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
         uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+        __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
         uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
+        __IM uint32_t DEVID;   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+        __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+    } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+#define TPI_ACPR_PRESCALER_Pos 0U                                       /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+#define TPI_SPPR_TXMODE_Pos 0U                                 /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+#define TPI_FFSR_FtNonStop_Pos 3U                                /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+#define TPI_FFSR_TCPresent_Pos 2U                                /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+#define TPI_FFSR_FtStopped_Pos 1U                                /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+#define TPI_FFSR_FlInProg_Pos 0U                                   /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+#define TPI_FFCR_TrigIn_Pos 8U                             /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+#define TPI_FFCR_EnFCont_Pos 1U                              /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+#define TPI_TRIGGER_TRIGGER_Pos 0U                                     /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+#define TPI_FIFO0_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+#define TPI_FIFO0_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+#define TPI_FIFO0_ETM2_Pos 16U                            /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+#define TPI_FIFO0_ETM1_Pos 8U                             /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+#define TPI_FIFO0_ETM0_Pos 0U                                 /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+#define TPI_FIFO1_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+#define TPI_FIFO1_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+#define TPI_FIFO1_ITM2_Pos 16U                            /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+#define TPI_FIFO1_ITM1_Pos 8U                             /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+#define TPI_FIFO1_ITM0_Pos 0U                                 /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos 0U                                 /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+#define TPI_DEVID_NRZVALID_Pos 11U                               /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+#define TPI_DEVID_MANCVALID_Pos 10U                                /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+#define TPI_DEVID_PTINVALID_Pos 9U                                 /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+#define TPI_DEVID_MinBufSz_Pos 6U                                /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+#define TPI_DEVID_AsynClkIn_Pos 5U                                 /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+#define TPI_DEVID_NrTraceInput_Pos 0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+#define TPI_DEVTYPE_MajorType_Pos 4U                                   /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
 
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+#define TPI_DEVTYPE_SubType_Pos 0U                                     /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
 
-/*@}*/ /* end of group CMSIS_TPI */
+    /*@}*/ /* end of group CMSIS_TPI */
 
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+      \brief    Type definitions for the Memory Protection Unit (MPU)
+      @{
+     */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+    /**
+      \brief  Structure type to access the Memory Protection Unit (MPU).
+     */
+    typedef struct
+    {
+        __IM uint32_t TYPE;  /*!< Offset: 0x000 (R/ )  MPU Type Register */
+        __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W)  MPU Control Register */
+        __IOM uint32_t RNR;  /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+        __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+        __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
         uint32_t RESERVED0[7U];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
+        union
+        {
+            __IOM uint32_t MAIR[2];
+            struct
+            {
+                __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+                __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+            };
+        };
+    } MPU_Type;
 
-#define MPU_TYPE_RALIASES                  1U
+#define MPU_TYPE_RALIASES 1U
 
 /* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+#define MPU_TYPE_IREGION_Pos 16U                              /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+#define MPU_TYPE_DREGION_Pos 8U                               /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+#define MPU_TYPE_SEPARATE_Pos 0U                                 /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
 
 /* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U                               /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+#define MPU_CTRL_HFNMIENA_Pos 1U                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+#define MPU_CTRL_ENABLE_Pos 0U                               /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
 
 /* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+#define MPU_RNR_REGION_Pos 0U                                 /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
 
 /* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+#define MPU_RBAR_BASE_Pos 5U                                 /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */
 
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+#define MPU_RBAR_SH_Pos 3U                         /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
 
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+#define MPU_RBAR_AP_Pos 1U                         /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
 
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+#define MPU_RBAR_XN_Pos 0U                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
 
 /* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+#define MPU_RLAR_LIMIT_Pos 5U                                  /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
 
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+#define MPU_RLAR_AttrIndx_Pos 1U                               /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
 
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
+#define MPU_RLAR_EN_Pos 0U                           /*!< MPU RLAR: EN Position */
+#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */
 
 /* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+#define MPU_MAIR0_Attr3_Pos 24U                             /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
 
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+#define MPU_MAIR0_Attr2_Pos 16U                             /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
 
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+#define MPU_MAIR0_Attr1_Pos 8U                              /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
 
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+#define MPU_MAIR0_Attr0_Pos 0U                                  /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
 
 /* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+#define MPU_MAIR1_Attr7_Pos 24U                             /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
 
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+#define MPU_MAIR1_Attr6_Pos 16U                             /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
 
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+#define MPU_MAIR1_Attr5_Pos 8U                              /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
 
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+#define MPU_MAIR1_Attr4_Pos 0U                                  /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+      \brief    Type definitions for the Security Attribution Unit (SAU)
+      @{
+     */
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+    /**
+      \brief  Structure type to access the Security Attribution Unit (SAU).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  SAU Control Register */
+        __IM uint32_t TYPE;  /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined(__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+        __IOM uint32_t RNR;  /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+        __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+        __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
 #endif
-} SAU_Type;
+    } SAU_Type;
 
 /* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+#define SAU_CTRL_ALLNS_Pos 1U                          /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
 
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+#define SAU_CTRL_ENABLE_Pos 0U                               /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
 
 /* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+#define SAU_TYPE_SREGION_Pos 0U                                   /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
 
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+#if defined(__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
 /* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+#define SAU_RNR_REGION_Pos 0U                                 /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
 
 /* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+#define SAU_RBAR_BADDR_Pos 5U                                  /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
 
 /* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+#define SAU_RLAR_LADDR_Pos 5U                                  /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
 
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+#define SAU_RLAR_NSC_Pos 1U                        /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
 
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+#define SAU_RLAR_ENABLE_Pos 0U                               /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
 
 #endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
 
 /*@} end of group CMSIS_SAU */
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+      \brief    Type definitions for the Core Debug Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+    /**
+      \brief  Structure type to access the Core Debug Register (CoreDebug).
+     */
+    typedef struct
+    {
+        __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+        __OM uint32_t DCRSR;  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+        __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+        __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
         uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
+        __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+        __IOM uint32_t DSCSR;     /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+    } CoreDebug_Type;
 
 /* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U                                      /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk                                                                               \
+    (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk                                                                                \
+    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U                                   /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U                                  /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+#define CoreDebug_DHCSR_S_HALT_Pos 17U                                 /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U                                   /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+#define CoreDebug_DHCSR_C_STEP_Pos 2U                                  /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+#define CoreDebug_DHCSR_C_HALT_Pos 1U                                  /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask  \
+                                                                                  */
 
 /* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U                                 /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+#define CoreDebug_DCRSR_REGSEL_Pos 0U                                         /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
 
 /* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */
-#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */
+#define CoreDebug_DEMCR_DWTENA_Pos 24U                                 /*!< CoreDebug DEMCR: DWTENA Position */
+#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk                                                                               \
+    (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk                                                                             \
+    (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
 
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk                                                                             \
+    (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
 
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk                                                                              \
+    (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
 
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk                                                                              \
+    (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
 
 /* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+#define CoreDebug_DSCSR_CDS_Pos 16U                              /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
 
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+#define CoreDebug_DSCSR_SBRSEL_Pos 1U                                  /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
 
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
-
 /**
   \ingroup    CMSIS_core_register
   \defgroup   CMSIS_core_bitfield     Core register bit field macros
@@ -1143,7 +1144,7 @@ typedef struct
   \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted value.
 */
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+#define _VAL2FLD(field, value) (((uint32_t)(value) << field##_Pos) & field##_Msk)
 
 /**
   \brief     Mask and shift a register value to extract a bit filed value.
@@ -1151,741 +1152,667 @@ typedef struct
   \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted bit field value.
 */
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+#define _FLD2VAL(field, value) (((uint32_t)(value)&field##_Msk) >> field##_Pos)
 
-/*@} end of group CMSIS_core_bitfield */
+    /*@} end of group CMSIS_core_bitfield */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_core_base     Core Definitions
+      \brief      Definitions for base addresses, unions, and structures.
+      @{
+     */
 
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
+    /* Memory mapping of Core Hardware */
+#define SCS_BASE       (0xE000E000UL)        /*!< System Control Space Base Address */
+#define DWT_BASE       (0xE0001000UL)        /*!< DWT Base Address */
+#define TPI_BASE       (0xE0040000UL)        /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL)        /*!< Core Debug Base Address */
+#define SysTick_BASE   (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE      (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE       (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
 
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+#define SCB       ((SCB_Type *)SCB_BASE)             /*!< SCB configuration struct */
+#define SysTick   ((SysTick_Type *)SysTick_BASE)     /*!< SysTick configuration struct */
+#define NVIC      ((NVIC_Type *)NVIC_BASE)           /*!< NVIC configuration struct */
+#define DWT       ((DWT_Type *)DWT_BASE)             /*!< DWT configuration struct */
+#define TPI       ((TPI_Type *)TPI_BASE)             /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *)CoreDebug_BASE) /*!< Core Debug configuration struct */
 
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#define MPU_BASE (SCS_BASE + 0x0D90UL)  /*!< Memory Protection Unit */
+#define MPU      ((MPU_Type *)MPU_BASE) /*!< Memory Protection Unit */
+#endif
 
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SAU_BASE (SCS_BASE + 0x0DD0UL)  /*!< Security Attribution Unit */
+#define SAU      ((SAU_Type *)SAU_BASE) /*!< Security Attribution Unit */
+#endif
 
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SCS_BASE_NS       (0xE002E000UL)           /*!< System Control Space Base Address (non-secure address space) */
+#define CoreDebug_BASE_NS (0xE002EDF0UL)           /*!< Core Debug Base Address           (non-secure address space) */
+#define SysTick_BASE_NS   (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address              (non-secure address space) */
+#define NVIC_BASE_NS      (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address                 (non-secure address space) */
+#define SCB_BASE_NS       (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
 
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
+#define SCB_NS ((SCB_Type *)SCB_BASE_NS) /*!< SCB configuration struct          (non-secure address space) */
+#define SysTick_NS                                                                                                     \
+    ((SysTick_Type *)SysTick_BASE_NS)       /*!< SysTick configuration struct      (non-secure address space) */
+#define NVIC_NS ((NVIC_Type *)NVIC_BASE_NS) /*!< NVIC configuration struct         (non-secure address space) */
+#define CoreDebug_NS                                                                                                   \
+    ((CoreDebug_Type *)CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL)  /*!< Memory Protection Unit            (non-secure address space) */
+#define MPU_NS      ((MPU_Type *)MPU_BASE_NS) /*!< Memory Protection Unit            (non-secure address space) */
+#endif
 
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
+    /*@} */
 
+    /*******************************************************************************
+     *                Hardware Abstraction Layer
+      Core Function Interface contains:
+      - Core NVIC Functions
+      - Core SysTick Functions
+      - Core Register Access Functions
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+    */
 
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
+    /* ##########################   NVIC functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+      \brief    Functions that manage interrupts and exceptions via the NVIC.
+      @{
+     */
 
 #ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+#endif
+#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
 #else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Armv8-M Baseline */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Armv8-M Baseline */
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
+#define NVIC_EnableIRQ       __NVIC_EnableIRQ
+#define NVIC_GetEnableIRQ    __NVIC_GetEnableIRQ
+#define NVIC_DisableIRQ      __NVIC_DisableIRQ
+#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
+#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
+#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
+#define NVIC_GetActive       __NVIC_GetActive
+#define NVIC_SetPriority     __NVIC_SetPriority
+#define NVIC_GetPriority     __NVIC_GetPriority
+#define NVIC_SystemReset     __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
 #ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+#endif
+#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
 #else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
+#define NVIC_SetVector __NVIC_SetVector
+#define NVIC_GetVector __NVIC_GetVector
+#endif /* (CMSIS_VECTAB_VIRTUAL) */
 
+#define NVIC_USER_IRQ_OFFSET 16
 
 /* Interrupt Priorities are WORD accessible only under Armv6-M                  */
 /* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+#define _BIT_SHIFT(IRQn) (((((uint32_t)(int32_t)(IRQn))) & 0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)   ((((((uint32_t)(int32_t)(IRQn)) & 0x0FUL) - 8UL) >> 2UL))
+#define _IP_IDX(IRQn)    ((((uint32_t)(int32_t)(IRQn)) >> 2UL))
 
+    /**
+      \brief   Enable Interrupt
+      \details Enables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+    /**
+      \brief   Get Interrupt Enable status
+      \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt is not enabled.
+      \return             1  Interrupt is enabled.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Disable Interrupt
+      \details Disables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+            __DSB();
+            __ISB();
+        }
+    }
 
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Get Pending Interrupt
+      \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not pending.
+      \return             1  Interrupt status is pending.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Set Pending Interrupt
+      \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
+    /**
+      \brief   Clear Pending Interrupt
+      \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Active Interrupt
+      \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not active.
+      \return             1  Interrupt status is active.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   Get Interrupt Target State
+      \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific
+      interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt is
+      assigned to Secure \return             1  if interrupt is assigned to Non Secure \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Set Interrupt Target State
+      \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific
+      interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt is
+      assigned to Secure 1  if interrupt is assigned to Non Secure \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Clear Interrupt Target State
+      \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device
+      specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt
+      is assigned to Secure 1  if interrupt is assigned to Non Secure \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
+    /**
+      \brief   Set Interrupt Priority
+      \details Sets the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]      IRQn  Interrupt number.
+      \param [in]  priority  Priority to set.
+      \note    The priority cannot be set for every processor exception.
+     */
+    __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->IPR[_IP_IDX(IRQn)] =
+                ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+                 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+        }
+        else {
+            SCB->SHPR[_SHP_IDX(IRQn)] =
+                ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+                 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+        }
+    }
 
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
+    /**
+      \brief   Get Interrupt Priority
+      \details Reads the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn  Interrupt number.
+      \return             Interrupt Priority.
+                          Value is aligned automatically to the implemented priority bits of the microcontroller.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+    {
 
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(((NVIC->IPR[_IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >>
+                               (8U - __NVIC_PRIO_BITS)));
+        }
+        else {
+            return ((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >>
+                               (8U - __NVIC_PRIO_BITS)));
+        }
+    }
 
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-           If VTOR is not present address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+    /**
+      \brief   Set Interrupt Vector
+      \details Sets an interrupt vector in SRAM based interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+               VTOR must been relocated to SRAM before.
+               If VTOR is not present address 0 must be mapped to SRAM.
+      \param [in]   IRQn      Interrupt number
+      \param [in]   vector    Address of interrupt handler function
+     */
+    __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+    {
+#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+        uint32_t *vectors = (uint32_t *)SCB->VTOR;
 #else
-  uint32_t *vectors = (uint32_t *)0x0U;
+    uint32_t *vectors = (uint32_t *)0x0U;
 #endif
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
+        vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+    }
 
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+    /**
+      \brief   Get Interrupt Vector
+      \details Reads an interrupt vector from interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn      Interrupt number.
+      \return                 Address of interrupt handler function
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+    {
+#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+        uint32_t *vectors = (uint32_t *)SCB->VTOR;
 #else
-  uint32_t *vectors = (uint32_t *)0x0U;
+    uint32_t *vectors = (uint32_t *)0x0U;
 #endif
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
+        return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+    }
 
+    /**
+      \brief   System Reset
+      \details Initiates a system reset request to reset the MCU.
+     */
+    __STATIC_INLINE void __NVIC_SystemReset(void)
+    {
+        __DSB(); /* Ensure all outstanding memory accesses included
+                    buffered write are completed before reset */
+        SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | SCB_AIRCR_SYSRESETREQ_Msk);
+        __DSB(); /* Ensure completion of memory access */
 
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
+        for (;;) /* wait until reset */
+        {
+            __NOP();
+        }
+    }
 
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   Enable Interrupt (non-secure)
+      \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+    /**
+      \brief   Get Interrupt Enable status (non-secure)
+      \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \return             0  Interrupt is not
+      enabled. \return             1  Interrupt is enabled. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Disable Interrupt (non-secure)
+      \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Get Pending Interrupt (non-secure)
+      \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit
+      for the specified device specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return 0
+      Interrupt status is not pending. \return             1  Interrupt status is pending. \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Set Pending Interrupt (non-secure)
+      \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+    /**
+      \brief   Clear Pending Interrupt (non-secure)
+      \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Active Interrupt (non-secure)
+      \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the
+      device specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0
+      Interrupt status is not active. \return             1  Interrupt status is active. \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Set Interrupt Priority (non-secure)
+      \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in
+      secure state. The interrupt number can be positive to specify a device specific interrupt, or negative to specify
+      a processor exception. \param [in]      IRQn  Interrupt number. \param [in]  priority  Priority to set. \note The
+      priority cannot be set for every non-secure processor exception.
+     */
+    __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->IPR[_IP_IDX(IRQn)] =
+                ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+                 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+        }
+        else {
+            SCB_NS->SHPR[_SHP_IDX(IRQn)] =
+                ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+                 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+        }
+    }
 
+    /**
+      \brief   Get Interrupt Priority (non-secure)
+      \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in
+      secure state. The interrupt number can be positive to specify a device specific interrupt, or negative to specify
+      a processor exception. \param [in]   IRQn  Interrupt number. \return             Interrupt Priority. Value is
+      aligned automatically to the implemented priority bits of the microcontroller.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+    {
 
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(((NVIC_NS->IPR[_IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >>
+                               (8U - __NVIC_PRIO_BITS)));
+        }
+        else {
+            return ((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >>
+                               (8U - __NVIC_PRIO_BITS)));
+        }
+    }
 #endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
 
-/*@} end of CMSIS_Core_NVICFunctions */
+    /*@} end of CMSIS_Core_NVICFunctions */
 
-/* ##########################  MPU functions  #################################### */
+    /* ##########################  MPU functions  #################################### */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
 
 #include "mpu_armv8.h"
 
 #endif
 
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
+    /* ##########################  FPU functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_FpuFunctions FPU Functions
+      \brief    Function that provides FPU type.
+      @{
+     */
 
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
+    /**
+      \brief   get FPU type
+      \details returns the FPU type
+      \returns
+       - \b  0: No FPU
+       - \b  1: Single precision FPU
+       - \b  2: Double + Single precision FPU
+     */
+    __STATIC_INLINE uint32_t SCB_GetFPUType(void)
+    {
+        return 0U; /* No FPU */
+    }
 
+    /*@} end of CMSIS_Core_FpuFunctions */
 
-/*@} end of CMSIS_Core_FpuFunctions */
+    /* ##########################   SAU functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_SAUFunctions SAU Functions
+      \brief    Functions that configure the SAU.
+      @{
+     */
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 
+    /**
+      \brief   Enable SAU
+      \details Enables the Security Attribution Unit (SAU).
+     */
+    __STATIC_INLINE void TZ_SAU_Enable(void)
+    {
+        SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
+    }
 
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
+    /**
+      \brief   Disable SAU
+      \details Disables the Security Attribution Unit (SAU).
+     */
+    __STATIC_INLINE void TZ_SAU_Disable(void)
+    {
+        SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+    }
 
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
-/*@} end of CMSIS_Core_SAUFunctions */
+    /*@} end of CMSIS_Core_SAUFunctions */
 
+    /* ##################################    SysTick function  ############################################ */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+      \brief    Functions that configure the System.
+      @{
+     */
 
+#if defined(__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+    /**
+      \brief   System Tick Configuration
+      \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+               Counter is in free running mode to generate periodic interrupts.
+      \param [in]  ticks  Number of ticks between two interrupts.
+      \return          0  Function succeeded.
+      \return          1  Function failed.
+      \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+               function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+               must contain a vendor-specific implementation of this function.
+     */
+    __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+    {
+        if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {
+            return (1UL); /* Reload value impossible */
+        }
 
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
+        SysTick->LOAD = (uint32_t)(ticks - 1UL);                         /* set reload register */
+        NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+        SysTick->VAL  = 0UL;                                             /* Load the SysTick Counter Value */
+        SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk |
+                        SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+        return (0UL);                            /* Function successful */
+    }
 
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   System Tick Configuration (non-secure)
+      \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System
+      Tick Timer. Counter is in free running mode to generate periodic interrupts. \param [in]  ticks  Number of ticks
+      between two interrupts. \return          0  Function succeeded. \return          1  Function failed. \note    When
+      the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the function <b>TZ_SysTick_Config_NS</b> is not
+      included. In this case, the file <b><i>device</i>.h</b> must contain a vendor-specific implementation of this
+      function.
 
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
+     */
+    __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+    {
+        if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {
+            return (1UL); /* Reload value impossible */
+        }
 
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
+        SysTick_NS->LOAD = (uint32_t)(ticks - 1UL);                            /* set reload register */
+        TZ_NVIC_SetPriority_NS(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+        SysTick_NS->VAL  = 0UL;                                                /* Load the SysTick Counter Value */
+        SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk |
+                           SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+        return (0UL);                               /* Function successful */
+    }
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
 #endif
 
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
+    /*@} end of CMSIS_Core_SysTickFunctions */
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h b/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h
index 0951a1f78..015a722c8 100644
--- a/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h
+++ b/module-bsp/board/rt1051/common/cmsis/core_armv8mml.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     core_armv8mml.h
- * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     core_armv8mml.h
+                                                                              * @brief    CMSIS Armv8-M Mainline Core
+                                                                              *Peripheral Access Layer Header File
+                                                                              * @version  V5.0.4
+                                                                              * @date     10. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
@@ -22,10 +23,10 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
 
 #ifndef __CORE_ARMV8MML_H_GENERIC
@@ -34,177 +35,177 @@
 #include <stdint.h>
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
+    /**
+      \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+      CMSIS violates the following MISRA-C:2004 rules:
 
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
+       \li Required Rule 8.5, object/function definition in header file.<br>
+         Function definitions in header files are used to allow 'inlining'.
 
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
+       \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+         Unions are used for effective representation of core registers.
 
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
+       \li Advisory Rule 19.7, Function-like macro defined.<br>
+         Function-like macros are used to allow more efficient code.
+     */
 
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_ARMv8MML
-  @{
- */
+    /*******************************************************************************
+     *                 CMSIS definitions
+     ******************************************************************************/
+    /**
+      \ingroup Cortex_ARMv8MML
+      @{
+     */
 
 #include "cmsis_version.h"
- 
-/*  CMSIS Armv8MML definitions */
-#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \
-                                         __ARMv8MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
+/*  CMSIS Armv8MML definitions */
+#define __ARMv8MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MML_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)  /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MML_CMSIS_VERSION                                                                                       \
+    ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | __ARMv8MML_CMSIS_VERSION_SUB) /*!< \deprecated CMSIS HAL version number  \
+                                                                             */
+
+#define __CORTEX_M (81U) /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
 */
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#if defined(__CC_ARM)
+#if defined __TARGET_FPU_VFP
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#if defined(__ARM_FEATURE_DSP)
+#if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+#define __DSP_USED 1U
+#else
+#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+#define __DSP_USED 0U
+#endif
+#else
+#define __DSP_USED 0U
+#endif
 
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#if defined __ARM_PCS_VFP
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-  
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#if defined(__ARM_FEATURE_DSP)
+#if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+#define __DSP_USED 1U
+#else
+#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+#define __DSP_USED 0U
+#endif
+#else
+#define __DSP_USED 0U
+#endif
 
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__GNUC__)
+#if defined(__VFP_FP__) && !defined(__SOFTFP__)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#if defined(__ARM_FEATURE_DSP)
+#if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+#define __DSP_USED 1U
+#else
+#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+#define __DSP_USED 0U
+#endif
+#else
+#define __DSP_USED 0U
+#endif
 
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__ICCARM__)
+#if defined __ARMVFP__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
+
+#if defined(__ARM_FEATURE_DSP)
+#if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+#define __DSP_USED 1U
+#else
+#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+#define __DSP_USED 0U
+#endif
+#else
+#define __DSP_USED 0U
+#endif
+
+#elif defined(__TI_ARM__)
+#if defined __TI_VFP_SUPPORT__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
+
+#elif defined(__TASKING__)
+#if defined __FPU_VFP__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
+
+#elif defined(__CSMC__)
+#if (__CSMC__ & 0x400U)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
 #endif
 
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
+#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
 
 #ifdef __cplusplus
 }
@@ -218,45 +219,46 @@
 #define __CORE_ARMV8MML_H_DEPENDANT
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
-  #ifndef __ARMv8MML_REV
-    #define __ARMv8MML_REV               0x0000U
-    #warning "__ARMv8MML_REV not defined in device header file; using default!"
-  #endif
+#ifndef __ARMv8MML_REV
+#define __ARMv8MML_REV 0x0000U
+#warning "__ARMv8MML_REV not defined in device header file; using default!"
+#endif
 
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __FPU_PRESENT
+#define __FPU_PRESENT 0U
+#warning "__FPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __MPU_PRESENT
+#define __MPU_PRESENT 0U
+#warning "__MPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __SAUREGION_PRESENT
+#define __SAUREGION_PRESENT 0U
+#warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __DSP_PRESENT
-    #define __DSP_PRESENT             0U
-    #warning "__DSP_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __DSP_PRESENT
+#define __DSP_PRESENT 0U
+#warning "__DSP_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
+#ifndef __NVIC_PRIO_BITS
+#define __NVIC_PRIO_BITS 3U
+#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+#endif
 
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
+#ifndef __Vendor_SysTickConfig
+#define __Vendor_SysTickConfig 0U
+#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+#endif
 #endif
 
 /* IO definitions (access restrictions to peripheral registers) */
@@ -268,1728 +270,1735 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#define __I volatile /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#define __I volatile const /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+#define __O  volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
 
 /* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+#define __IM  volatile const /*! Defines 'read only' structure member permissions */
+#define __OM  volatile       /*! Defines 'write only' structure member permissions */
+#define __IOM volatile       /*! Defines 'read / write' structure member permissions */
 
-/*@} end of group ARMv8MML */
+    /*@} end of group ARMv8MML */
 
+    /*******************************************************************************
+     *                 Register Abstraction
+      Core Register contain:
+      - Core Register
+      - Core NVIC Register
+      - Core SCB Register
+      - Core SysTick Register
+      - Core Debug Register
+      - Core MPU Register
+      - Core SAU Register
+      - Core FPU Register
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_core_register Defines and Type Definitions
+      \brief Type definitions and defines for Cortex-M processor based devices.
+    */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_CORE  Status and Control Registers
+      \brief      Core Register type definitions.
+      @{
+     */
 
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
+    /**
+      \brief  Union type to access the Application Program Status Register (APSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t _reserved0 : 16; /*!< bit:  0..15  Reserved */
+            uint32_t GE : 4;          /*!< bit: 16..19  Greater than or Equal flags */
+            uint32_t _reserved1 : 7;  /*!< bit: 20..26  Reserved */
+            uint32_t Q : 1;           /*!< bit:     27  Saturation condition flag */
+            uint32_t V : 1;           /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;           /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;           /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;           /*!< bit:     31  Negative condition code flag */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+#define APSR_N_Pos 31U                 /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+#define APSR_Z_Pos 30U                 /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+#define APSR_C_Pos 29U                 /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+#define APSR_V_Pos 28U                 /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+#define APSR_Q_Pos 27U                 /*!< APSR: Q Position */
+#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
 
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+#define APSR_GE_Pos 16U                    /*!< APSR: GE Position */
+#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
 
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
+    /**
+      \brief  Union type to access the Interrupt Program Status Register (IPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;         /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 23; /*!< bit:  9..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+#define IPSR_ISR_Pos 0U                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
+    /**
+      \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;        /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 7; /*!< bit:  9..15  Reserved */
+            uint32_t GE : 4;         /*!< bit: 16..19  Greater than or Equal flags */
+            uint32_t _reserved1 : 4; /*!< bit: 20..23  Reserved */
+            uint32_t T : 1;          /*!< bit:     24  Thumb bit        (read 0) */
+            uint32_t IT : 2;         /*!< bit: 25..26  saved IT state   (read 0) */
+            uint32_t Q : 1;          /*!< bit:     27  Saturation condition flag */
+            uint32_t V : 1;          /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;          /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;          /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;          /*!< bit:     31  Negative condition code flag */
+        } b;                         /*!< Structure used for bit  access */
+        uint32_t w;                  /*!< Type      used for word access */
+    } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+#define xPSR_N_Pos 31U                 /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+#define xPSR_Z_Pos 30U                 /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+#define xPSR_C_Pos 29U                 /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+#define xPSR_V_Pos 28U                 /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+#define xPSR_Q_Pos 27U                 /*!< xPSR: Q Position */
+#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
 
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+#define xPSR_IT_Pos 25U                  /*!< xPSR: IT Position */
+#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
 
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+#define xPSR_T_Pos 24U                 /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
 
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+#define xPSR_GE_Pos 16U                    /*!< xPSR: GE Position */
+#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
 
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+#define xPSR_ISR_Pos 0U                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
-    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
-    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
+    /**
+      \brief  Union type to access the Control Registers (CONTROL).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t nPRIV : 1;       /*!< bit:      0  Execution privilege in Thread mode */
+            uint32_t SPSEL : 1;       /*!< bit:      1  Stack-pointer select */
+            uint32_t FPCA : 1;        /*!< bit:      2  Floating-point context active */
+            uint32_t SFPA : 1;        /*!< bit:      3  Secure floating-point active */
+            uint32_t _reserved1 : 28; /*!< bit:  4..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+#define CONTROL_SFPA_Pos 3U                        /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */
 
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+#define CONTROL_FPCA_Pos 2U                        /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
 
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+#define CONTROL_SPSEL_Pos 1U                         /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+#define CONTROL_nPRIV_Pos 0U                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
 
-/*@} end of group CMSIS_CORE */
+    /*@} end of group CMSIS_CORE */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+      \brief      Type definitions for the NVIC Registers
+      @{
+     */
 
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+    /**
+      \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+     */
+    typedef struct
+    {
+        __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
         uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
         uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
         uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
         uint32_t RESERVED5[16U];
-  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
         uint32_t RESERVED6[580U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
+        __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+    } NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+#define NVIC_STIR_INTID_Pos 0U                                   /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
 
-/*@} end of group CMSIS_NVIC */
+    /*@} end of group CMSIS_NVIC */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SCB     System Control Block (SCB)
+      \brief    Type definitions for the System Control Block Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+    /**
+      \brief  Structure type to access the System Control Block (SCB).
+     */
+    typedef struct
+    {
+        __IM uint32_t CPUID;       /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+        __IOM uint32_t ICSR;       /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        __IOM uint32_t VTOR;       /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+        __IOM uint32_t AIRCR;      /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+        __IOM uint32_t SCR;        /*!< Offset: 0x010 (R/W)  System Control Register */
+        __IOM uint32_t CCR;        /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        __IOM uint8_t SHPR[12U];   /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+        __IOM uint32_t SHCSR;      /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+        __IOM uint32_t CFSR;       /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+        __IOM uint32_t HFSR;       /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+        __IOM uint32_t DFSR;       /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+        __IOM uint32_t MMFAR;      /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+        __IOM uint32_t BFAR;       /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+        __IOM uint32_t AFSR;       /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+        __IM uint32_t ID_PFR[2U];  /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+        __IM uint32_t ID_DFR;      /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+        __IM uint32_t ID_ADR;      /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+        __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+        __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        __IM uint32_t CLIDR;       /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+        __IM uint32_t CTR;         /*!< Offset: 0x07C (R/ )  Cache Type register */
+        __IM uint32_t CCSIDR;      /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+        __IOM uint32_t CSSELR;     /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+        __IOM uint32_t CPACR;      /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        __IOM uint32_t NSACR;      /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
         uint32_t RESERVED3[92U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        __OM uint32_t STIR; /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
         uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+        __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+        __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
         uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
         uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        __OM uint32_t ICIMVAU;  /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+        __OM uint32_t DCIMVAC;  /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+        __OM uint32_t DCISW;    /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+        __OM uint32_t DCCMVAU;  /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+        __OM uint32_t DCCMVAC;  /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+        __OM uint32_t DCCSW;    /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+        __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+        __OM uint32_t DCCISW;   /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
         uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+        __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+        __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+        __IOM uint32_t CACR;   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+        __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
         uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
-} SCB_Type;
+        __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+    } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U                                   /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+#define SCB_CPUID_VARIANT_Pos 20U                              /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+#define SCB_CPUID_ARCHITECTURE_Pos 16U                                   /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+#define SCB_CPUID_PARTNO_Pos 4U                                /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+#define SCB_CPUID_REVISION_Pos 0U                                    /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+#define SCB_ICSR_PENDNMISET_Pos 31U                              /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
 
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+#define SCB_ICSR_PENDNMICLR_Pos 30U                              /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+#define SCB_ICSR_PENDSVSET_Pos 28U                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+#define SCB_ICSR_PENDSVCLR_Pos 27U                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+#define SCB_ICSR_PENDSTSET_Pos 26U                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+#define SCB_ICSR_PENDSTCLR_Pos 25U                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+#define SCB_ICSR_STTNS_Pos 24U                         /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+#define SCB_ICSR_ISRPREEMPT_Pos 23U                              /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+#define SCB_ICSR_ISRPENDING_Pos 22U                              /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+#define SCB_ICSR_VECTPENDING_Pos 12U                                   /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+#define SCB_ICSR_RETTOBASE_Pos 11U                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+#define SCB_ICSR_VECTACTIVE_Pos 0U                                       /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#define SCB_VTOR_TBLOFF_Pos 7U                                   /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+#define SCB_AIRCR_VECTKEY_Pos 16U                                 /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U                                     /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+#define SCB_AIRCR_ENDIANESS_Pos 15U                              /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+#define SCB_AIRCR_PRIS_Pos 14U                         /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
 
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+#define SCB_AIRCR_BFHFNMINS_Pos 13U                              /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+#define SCB_AIRCR_PRIGROUP_Pos 8U                              /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+#define SCB_AIRCR_SYSRESETREQS_Pos 3U                                  /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U                                 /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U                                   /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+#define SCB_SCR_SEVONPEND_Pos 4U                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+#define SCB_SCR_SLEEPDEEPS_Pos 3U                              /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+#define SCB_SCR_SLEEPDEEP_Pos 2U                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+#define SCB_SCR_SLEEPONEXIT_Pos 1U                               /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+#define SCB_CCR_BP_Pos 18U                     /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
 
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+#define SCB_CCR_IC_Pos 17U                     /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
 
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+#define SCB_CCR_DC_Pos 16U                     /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
 
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+#define SCB_CCR_STKOFHFNMIGN_Pos 10U                               /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+#define SCB_CCR_BFHFNMIGN_Pos 8U                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+#define SCB_CCR_DIV_0_TRP_Pos 4U                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+#define SCB_CCR_UNALIGN_TRP_Pos 3U                               /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+#define SCB_CCR_USERSETMPEND_Pos 1U                                /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U                                    /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
 
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk                                                                                \
+    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
 
-#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+#define SCB_SHCSR_SECUREFAULTENA_Pos 19U                                   /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */
 
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+#define SCB_SHCSR_USGFAULTENA_Pos 18U                                /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+#define SCB_SHCSR_BUSFAULTENA_Pos 17U                                /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+#define SCB_SHCSR_MEMFAULTENA_Pos 16U                                /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U                                 /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U                                   /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U                                   /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+#define SCB_SHCSR_USGFAULTPENDED_Pos 12U                                   /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+#define SCB_SHCSR_SYSTICKACT_Pos 11U                               /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+#define SCB_SHCSR_PENDSVACT_Pos 10U                              /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+#define SCB_SHCSR_MONITORACT_Pos 8U                                /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+#define SCB_SHCSR_SVCALLACT_Pos 7U                               /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+#define SCB_SHCSR_NMIACT_Pos 5U                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
 
-#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+#define SCB_SHCSR_SECUREFAULTACT_Pos 4U                                    /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+#define SCB_SHCSR_USGFAULTACT_Pos 3U                                 /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+#define SCB_SHCSR_HARDFAULTACT_Pos 2U                                  /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+#define SCB_SHCSR_BUSFAULTACT_Pos 1U                                 /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+#define SCB_SHCSR_MEMFAULTACT_Pos 0U                                     /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
 
 /* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask  \
+                                                                       */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+#define SCB_CFSR_BUSFAULTSR_Pos 8U                                  /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk                                                                                        \
+    (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
 /* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos)  /*!< SCB CFSR (MMFSR): MMARVALID Mask */
 
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos)    /*!< SCB CFSR (MMFSR): MLSPERR Mask */
 
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos)    /*!< SCB CFSR (MMFSR): MSTKERR Mask */
 
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos)  /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
 
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos)   /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
 
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U)   /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
 
 /* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U)  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
 
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos)   /*!< SCB CFSR (BFSR): LSPERR Mask */
 
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos)   /*!< SCB CFSR (BFSR): STKERR Mask */
 
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
 
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U)    /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
 
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U)  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
 
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos)  /*!< SCB CFSR (BFSR): IBUSERR Mask */
 
 /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U)  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
 
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U)  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
 
-#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos)    /*!< SCB CFSR (UFSR): STKOF Mask */
 
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos)     /*!< SCB CFSR (UFSR): NOCP Mask */
 
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos)    /*!< SCB CFSR (UFSR): INVPC Mask */
 
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
 
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U)   /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
 
 /* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+#define SCB_HFSR_DEBUGEVT_Pos 31U                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+#define SCB_HFSR_FORCED_Pos 30U                          /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+#define SCB_HFSR_VECTTBL_Pos 1U                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+#define SCB_DFSR_EXTERNAL_Pos 4U                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+#define SCB_DFSR_VCATCH_Pos 3U                           /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+#define SCB_DFSR_DWTTRAP_Pos 2U                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+#define SCB_DFSR_BKPT_Pos 1U                         /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+#define SCB_DFSR_HALTED_Pos 0U                               /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
 
 /* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+#define SCB_NSACR_CP11_Pos 11U                         /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */
 
-#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+#define SCB_NSACR_CP10_Pos 10U                         /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */
 
-#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+#define SCB_NSACR_CPn_Pos 0U                             /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */
 
 /* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+#define SCB_CLIDR_LOUU_Pos 27U                         /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
 
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+#define SCB_CLIDR_LOC_Pos 24U                        /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */
 
 /* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+#define SCB_CTR_FORMAT_Pos 29U                         /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
 
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+#define SCB_CTR_CWG_Pos 24U                        /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
 
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+#define SCB_CTR_ERG_Pos 20U                        /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
 
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+#define SCB_CTR_DMINLINE_Pos 16U                             /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
 
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+#define SCB_CTR_IMINLINE_Pos 0U                                  /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
 
 /* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+#define SCB_CCSIDR_WT_Pos 31U                        /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
 
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+#define SCB_CCSIDR_WB_Pos 30U                        /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
 
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+#define SCB_CCSIDR_RA_Pos 29U                        /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
 
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+#define SCB_CCSIDR_WA_Pos 28U                        /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
 
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+#define SCB_CCSIDR_NUMSETS_Pos 13U                                  /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
 
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
 
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+#define SCB_CCSIDR_LINESIZE_Pos 0U                                   /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
 
 /* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+#define SCB_CSSELR_LEVEL_Pos 1U                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
 
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+#define SCB_CSSELR_IND_Pos 0U                              /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
 
 /* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+#define SCB_STIR_INTID_Pos 0U                                  /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
 
 /* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+#define SCB_DCISW_WAY_Pos 30U                        /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */
 
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+#define SCB_DCISW_SET_Pos 5U                             /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */
 
 /* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+#define SCB_DCCSW_WAY_Pos 30U                        /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */
 
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+#define SCB_DCCSW_SET_Pos 5U                             /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */
 
 /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+#define SCB_DCCISW_WAY_Pos 30U                         /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
 
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+#define SCB_DCCISW_SET_Pos 5U                              /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
 
 /* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+#define SCB_ITCMCR_SZ_Pos 3U                           /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
 
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+#define SCB_ITCMCR_RETEN_Pos 2U                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
 
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+#define SCB_ITCMCR_RMW_Pos 1U                          /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
 
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+#define SCB_ITCMCR_EN_Pos 0U                             /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
 
 /* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+#define SCB_DTCMCR_SZ_Pos 3U                           /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
 
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+#define SCB_DTCMCR_RETEN_Pos 2U                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
 
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+#define SCB_DTCMCR_RMW_Pos 1U                          /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
 
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+#define SCB_DTCMCR_EN_Pos 0U                             /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
 
 /* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+#define SCB_AHBPCR_SZ_Pos 1U                         /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
 
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+#define SCB_AHBPCR_EN_Pos 0U                             /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
 
 /* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+#define SCB_CACR_FORCEWT_Pos 2U                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
 
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
+#define SCB_CACR_ECCEN_Pos 1U                          /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
 
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+#define SCB_CACR_SIWT_Pos 0U                             /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
 
 /* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+#define SCB_AHBSCR_INITCOUNT_Pos 11U                                  /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
 
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+#define SCB_AHBSCR_TPRI_Pos 2U                               /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
 
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+#define SCB_AHBSCR_CTL_Pos 0U                              /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
 
 /* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+#define SCB_ABFSR_AXIMTYPE_Pos 8U                              /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
 
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+#define SCB_ABFSR_EPPB_Pos 4U                          /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
 
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+#define SCB_ABFSR_AXIM_Pos 3U                          /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
 
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+#define SCB_ABFSR_AHBP_Pos 2U                          /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
 
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+#define SCB_ABFSR_DTCM_Pos 1U                          /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
 
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+#define SCB_ABFSR_ITCM_Pos 0U                              /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
 
-/*@} end of group CMSIS_SCB */
+    /*@} end of group CMSIS_SCB */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+      \brief    Type definitions for the System Control and ID Register not in the SCB
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
+    /**
+      \brief  Structure type to access the System Control and ID Register not in the SCB.
+     */
+    typedef struct
+    {
         uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
-} SCnSCB_Type;
+        __IM uint32_t ICTR;   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+        __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+        __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+    } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+#define SCnSCB_ICTR_INTLINESNUM_Pos 0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
 
-/*@} end of group CMSIS_SCnotSCB */
+    /*@} end of group CMSIS_SCnotSCB */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+      \brief    Type definitions for the System Timer Registers.
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
+    /**
+      \brief  Structure type to access the System Timer (SysTick).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+        __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+        __IOM uint32_t VAL;  /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+        __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+    } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U                                 /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+#define SysTick_CTRL_CLKSOURCE_Pos 2U                                  /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+#define SysTick_CTRL_TICKINT_Pos 1U                                /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+#define SysTick_CTRL_ENABLE_Pos 0U                                   /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+#define SysTick_LOAD_RELOAD_Pos 0U                                          /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+#define SysTick_VAL_CURRENT_Pos 0U                                          /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+#define SysTick_CALIB_NOREF_Pos 31U                              /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+#define SysTick_CALIB_SKEW_Pos 30U                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+#define SysTick_CALIB_TENMS_Pos 0U                                          /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
 
-/*@} end of group CMSIS_SysTick */
+    /*@} end of group CMSIS_SysTick */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+      \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+    /**
+      \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+     */
+    typedef struct
+    {
+        __OM union
+        {
+            __OM uint8_t u8;   /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+            __OM uint16_t u16; /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+            __OM uint32_t u32; /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+        } PORT[32U];           /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
         uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
         uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
         uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        __OM uint32_t IWR;   /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
+        __IM uint32_t IRR;   /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
+        __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
         uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+        __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
         uint32_t RESERVED5[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
         uint32_t RESERVED6[4U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
+        __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+        __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+        __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+        __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+        __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+        __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+        __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+        __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+        __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+        __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+        __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+        __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    } ITM_Type;
 
 /* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+#define ITM_STIM_DISABLED_Pos 1U                               /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */
 
-#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+#define ITM_STIM_FIFOREADY_Pos 0U                                    /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Pos 0U                                  /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+#define ITM_TCR_BUSY_Pos 23U                       /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+#define ITM_TCR_TRACEBUSID_Pos 16U                                /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+#define ITM_TCR_GTSFREQ_Pos 10U                          /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+#define ITM_TCR_TSPRESCALE_Pos 8U                              /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */
 
-#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+#define ITM_TCR_STALLENA_Pos 5U                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+#define ITM_TCR_SWOENA_Pos 4U                          /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+#define ITM_TCR_DWTENA_Pos 3U                          /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+#define ITM_TCR_SYNCENA_Pos 2U                           /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+#define ITM_TCR_TSENA_Pos 1U                         /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+#define ITM_TCR_ITMENA_Pos 0U                              /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
 
 /* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
+#define ITM_IWR_ATVALIDM_Pos 0U                                /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
 
 /* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
+#define ITM_IRR_ATREADYM_Pos 0U                                /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
 
 /* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
+#define ITM_IMCR_INTEGRATION_Pos 0U                                    /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
 
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+#define ITM_LSR_ByteAcc_Pos 2U                           /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+#define ITM_LSR_Access_Pos 1U                          /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+#define ITM_LSR_Present_Pos 0U                               /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
 
-/*@}*/ /* end of group CMSIS_ITM */
+    /*@}*/ /* end of group CMSIS_ITM */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+      \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+    /**
+      \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL;     /*!< Offset: 0x000 (R/W)  Control Register */
+        __IOM uint32_t CYCCNT;   /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+        __IOM uint32_t CPICNT;   /*!< Offset: 0x008 (R/W)  CPI Count Register */
+        __IOM uint32_t EXCCNT;   /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+        __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+        __IOM uint32_t LSUCNT;   /*!< Offset: 0x014 (R/W)  LSU Count Register */
+        __IOM uint32_t FOLDCNT;  /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+        __IM uint32_t PCSR;      /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+        __IOM uint32_t COMP0;    /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
         uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W)  Function Register 0 */
         uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
         uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W)  Function Register 1 */
         uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
         uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W)  Function Register 2 */
         uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
         uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W)  Function Register 3 */
         uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
         uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W)  Function Register 4 */
         uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
         uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W)  Function Register 5 */
         uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
         uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W)  Function Register 6 */
         uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
         uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W)  Function Register 7 */
         uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
         uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
         uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
         uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
         uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
         uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
         uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
         uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
         uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
         uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
         uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
         uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
         uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
         uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W)  Function Register 14 */
         uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
         uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W)  Function Register 15 */
         uint32_t RESERVED32[934U];
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        __IM uint32_t LSR; /*!< Offset: 0xFB4 (R  )  Lock Status Register */
         uint32_t RESERVED33[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
-} DWT_Type;
+        __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+    } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+#define DWT_CTRL_NUMCOMP_Pos 28U                             /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+#define DWT_CTRL_NOTRCPKT_Pos 27U                              /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+#define DWT_CTRL_NOEXTTRIG_Pos 26U                               /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+#define DWT_CTRL_NOCYCCNT_Pos 25U                              /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+#define DWT_CTRL_NOPRFCNT_Pos 24U                              /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+#define DWT_CTRL_CYCDISS_Pos 23U                             /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+#define DWT_CTRL_CYCEVTENA_Pos 22U                               /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+#define DWT_CTRL_FOLDEVTENA_Pos 21U                                /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+#define DWT_CTRL_LSUEVTENA_Pos 20U                               /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+#define DWT_CTRL_SLEEPEVTENA_Pos 19U                                 /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+#define DWT_CTRL_EXCEVTENA_Pos 18U                               /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+#define DWT_CTRL_CPIEVTENA_Pos 17U                               /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+#define DWT_CTRL_EXCTRCENA_Pos 16U                               /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+#define DWT_CTRL_PCSAMPLENA_Pos 12U                                /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+#define DWT_CTRL_SYNCTAP_Pos 10U                             /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+#define DWT_CTRL_CYCTAP_Pos 9U                             /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+#define DWT_CTRL_POSTINIT_Pos 5U                               /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+#define DWT_CTRL_POSTPRESET_Pos 1U                                 /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+#define DWT_CTRL_CYCCNTENA_Pos 0U                                    /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+#define DWT_CPICNT_CPICNT_Pos 0U                                    /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+#define DWT_EXCCNT_EXCCNT_Pos 0U                                    /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U                                        /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+#define DWT_LSUCNT_LSUCNT_Pos 0U                                    /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+#define DWT_FOLDCNT_FOLDCNT_Pos 0U                                      /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+#define DWT_FUNCTION_ID_Pos 27U                             /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
 
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+#define DWT_FUNCTION_MATCHED_Pos 24U                                 /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U                                   /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+#define DWT_FUNCTION_ACTION_Pos 4U                                 /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
 
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+#define DWT_FUNCTION_MATCH_Pos 0U                                    /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
 
-/*@}*/ /* end of group CMSIS_DWT */
+    /*@}*/ /* end of group CMSIS_DWT */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+      \brief    Type definitions for the Trace Port Interface (TPI)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+    /**
+      \brief  Structure type to access the Trace Port Interface Register (TPI).
+     */
+    typedef struct
+    {
+        __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+        __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
         uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
         uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
         uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        __IM uint32_t FFSR;  /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+        __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+        __IM uint32_t FSCR;  /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
         uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        __IM uint32_t TRIGGER;   /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+        __IM uint32_t FIFO0;     /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+        __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
         uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+        __IM uint32_t FIFO1;     /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+        __IOM uint32_t ITCTRL;   /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
         uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+        __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
         uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
+        __IM uint32_t DEVID;   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+        __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+    } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+#define TPI_ACPR_PRESCALER_Pos 0U                                       /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+#define TPI_SPPR_TXMODE_Pos 0U                                 /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+#define TPI_FFSR_FtNonStop_Pos 3U                                /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+#define TPI_FFSR_TCPresent_Pos 2U                                /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+#define TPI_FFSR_FtStopped_Pos 1U                                /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+#define TPI_FFSR_FlInProg_Pos 0U                                   /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+#define TPI_FFCR_TrigIn_Pos 8U                             /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+#define TPI_FFCR_EnFCont_Pos 1U                              /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+#define TPI_TRIGGER_TRIGGER_Pos 0U                                     /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+#define TPI_FIFO0_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+#define TPI_FIFO0_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+#define TPI_FIFO0_ETM2_Pos 16U                            /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+#define TPI_FIFO0_ETM1_Pos 8U                             /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+#define TPI_FIFO0_ETM0_Pos 0U                                 /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+#define TPI_FIFO1_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+#define TPI_FIFO1_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+#define TPI_FIFO1_ITM2_Pos 16U                            /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+#define TPI_FIFO1_ITM1_Pos 8U                             /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+#define TPI_FIFO1_ITM0_Pos 0U                                 /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos 0U                                 /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+#define TPI_DEVID_NRZVALID_Pos 11U                               /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+#define TPI_DEVID_MANCVALID_Pos 10U                                /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+#define TPI_DEVID_PTINVALID_Pos 9U                                 /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+#define TPI_DEVID_MinBufSz_Pos 6U                                /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+#define TPI_DEVID_AsynClkIn_Pos 5U                                 /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+#define TPI_DEVID_NrTraceInput_Pos 0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+#define TPI_DEVTYPE_MajorType_Pos 4U                                   /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
 
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+#define TPI_DEVTYPE_SubType_Pos 0U                                     /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
 
-/*@}*/ /* end of group CMSIS_TPI */
+    /*@}*/ /* end of group CMSIS_TPI */
 
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+      \brief    Type definitions for the Memory Protection Unit (MPU)
+      @{
+     */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
-  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
-  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
-  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+    /**
+      \brief  Structure type to access the Memory Protection Unit (MPU).
+     */
+    typedef struct
+    {
+        __IM uint32_t TYPE;     /*!< Offset: 0x000 (R/ )  MPU Type Register */
+        __IOM uint32_t CTRL;    /*!< Offset: 0x004 (R/W)  MPU Control Register */
+        __IOM uint32_t RNR;     /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+        __IOM uint32_t RBAR;    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+        __IOM uint32_t RLAR;    /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+        __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+        __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+        __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+        __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+        __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+        __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
         uint32_t RESERVED0[1];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
+        union
+        {
+            __IOM uint32_t MAIR[2];
+            struct
+            {
+                __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+                __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+            };
+        };
+    } MPU_Type;
 
-#define MPU_TYPE_RALIASES                  4U
+#define MPU_TYPE_RALIASES 4U
 
 /* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+#define MPU_TYPE_IREGION_Pos 16U                              /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+#define MPU_TYPE_DREGION_Pos 8U                               /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+#define MPU_TYPE_SEPARATE_Pos 0U                                 /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
 
 /* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U                               /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+#define MPU_CTRL_HFNMIENA_Pos 1U                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+#define MPU_CTRL_ENABLE_Pos 0U                               /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
 
 /* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+#define MPU_RNR_REGION_Pos 0U                                 /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
 
 /* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+#define MPU_RBAR_ADDR_Pos 5U                                 /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+#define MPU_RBAR_SH_Pos 3U                         /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
 
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+#define MPU_RBAR_AP_Pos 1U                         /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
 
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+#define MPU_RBAR_XN_Pos 0U                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
 
 /* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+#define MPU_RLAR_LIMIT_Pos 5U                                  /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
 
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+#define MPU_RLAR_AttrIndx_Pos 1U                               /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
 
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+#define MPU_RLAR_EN_Pos 0U                           /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */
 
 /* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+#define MPU_MAIR0_Attr3_Pos 24U                             /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
 
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+#define MPU_MAIR0_Attr2_Pos 16U                             /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
 
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+#define MPU_MAIR0_Attr1_Pos 8U                              /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
 
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+#define MPU_MAIR0_Attr0_Pos 0U                                  /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
 
 /* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+#define MPU_MAIR1_Attr7_Pos 24U                             /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
 
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+#define MPU_MAIR1_Attr6_Pos 16U                             /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
 
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+#define MPU_MAIR1_Attr5_Pos 8U                              /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
 
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+#define MPU_MAIR1_Attr4_Pos 0U                                  /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+      \brief    Type definitions for the Security Attribution Unit (SAU)
+      @{
+     */
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+    /**
+      \brief  Structure type to access the Security Attribution Unit (SAU).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  SAU Control Register */
+        __IM uint32_t TYPE;  /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined(__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+        __IOM uint32_t RNR;  /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+        __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+        __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
 #else
         uint32_t RESERVED0[3];
 #endif
-  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
-  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
-} SAU_Type;
+        __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+        __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+    } SAU_Type;
 
 /* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+#define SAU_CTRL_ALLNS_Pos 1U                          /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
 
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+#define SAU_CTRL_ENABLE_Pos 0U                               /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
 
 /* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+#define SAU_TYPE_SREGION_Pos 0U                                   /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
 
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+#if defined(__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
 /* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+#define SAU_RNR_REGION_Pos 0U                                 /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
 
 /* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+#define SAU_RBAR_BADDR_Pos 5U                                  /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
 
 /* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+#define SAU_RLAR_LADDR_Pos 5U                                  /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
 
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+#define SAU_RLAR_NSC_Pos 1U                        /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
 
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+#define SAU_RLAR_ENABLE_Pos 0U                               /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
 
 #endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
 
 /* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+#define SAU_SFSR_LSERR_Pos 7U                          /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */
 
-#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+#define SAU_SFSR_SFARVALID_Pos 6U                              /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */
 
-#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+#define SAU_SFSR_LSPERR_Pos 5U                           /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */
 
-#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+#define SAU_SFSR_INVTRAN_Pos 4U                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */
 
-#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+#define SAU_SFSR_AUVIOL_Pos 3U                           /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */
 
-#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+#define SAU_SFSR_INVER_Pos 2U                          /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */
 
-#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+#define SAU_SFSR_INVIS_Pos 1U                          /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */
 
-#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+#define SAU_SFSR_INVEP_Pos 0U                              /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */
 
 /*@} end of group CMSIS_SAU */
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+      \brief    Type definitions for the Floating Point Unit (FPU)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
+    /**
+      \brief  Structure type to access the Floating Point Unit (FPU).
+     */
+    typedef struct
+    {
         uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
+        __IOM uint32_t FPCCR;  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+        __IOM uint32_t FPCAR;  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+        __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+        __IM uint32_t MVFR0;   /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+        __IM uint32_t MVFR1;   /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+    } FPU_Type;
 
 /* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+#define FPU_FPCCR_ASPEN_Pos 31U                          /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
 
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+#define FPU_FPCCR_LSPEN_Pos 30U                          /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
 
-#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+#define FPU_FPCCR_LSPENS_Pos 29U                           /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */
 
-#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+#define FPU_FPCCR_CLRONRET_Pos 28U                             /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */
 
-#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+#define FPU_FPCCR_CLRONRETS_Pos 27U                              /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */
 
-#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+#define FPU_FPCCR_TS_Pos 26U                       /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */
 
-#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+#define FPU_FPCCR_UFRDY_Pos 10U                          /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */
 
-#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+#define FPU_FPCCR_SPLIMVIOL_Pos 9U                               /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */
 
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+#define FPU_FPCCR_MONRDY_Pos 8U                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
 
-#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+#define FPU_FPCCR_SFRDY_Pos 7U                           /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */
 
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+#define FPU_FPCCR_BFRDY_Pos 6U                           /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
 
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+#define FPU_FPCCR_MMRDY_Pos 5U                           /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
 
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+#define FPU_FPCCR_HFRDY_Pos 4U                           /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
 
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+#define FPU_FPCCR_THREAD_Pos 3U                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
 
-#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+#define FPU_FPCCR_S_Pos 2U                       /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */
 
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+#define FPU_FPCCR_USER_Pos 1U                          /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
 
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
 
 /* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+#define FPU_FPCAR_ADDRESS_Pos 3U                                      /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
 
 /* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+#define FPU_FPDSCR_AHP_Pos 26U                         /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
 
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+#define FPU_FPDSCR_DN_Pos 25U                        /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
 
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+#define FPU_FPDSCR_FZ_Pos 24U                        /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
 
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+#define FPU_FPDSCR_RMode_Pos 22U                           /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
 
 /* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk                                                                                \
+    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
 
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+#define FPU_MVFR0_Short_vectors_Pos 24U                                    /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
 
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+#define FPU_MVFR0_Square_root_Pos 20U                                  /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
 
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+#define FPU_MVFR0_Divide_Pos 16U                             /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
 
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk                                                                                \
+    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
 
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk                                                                                 \
+    (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
 
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk                                                                                 \
+    (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
 
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk                                                                                 \
+    (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
 
 /* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+#define FPU_MVFR1_FP_fused_MAC_Pos 28U                                   /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
 
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+#define FPU_MVFR1_FP_HPFP_Pos 24U                              /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
 
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+#define FPU_MVFR1_D_NaN_mode_Pos 4U                                  /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
 
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+#define FPU_MVFR1_FtZ_mode_Pos 0U                                    /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
 
-/*@} end of group CMSIS_FPU */
+    /*@} end of group CMSIS_FPU */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+      \brief    Type definitions for the Core Debug Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+    /**
+      \brief  Structure type to access the Core Debug Register (CoreDebug).
+     */
+    typedef struct
+    {
+        __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+        __OM uint32_t DCRSR;  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+        __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+        __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
         uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
+        __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+        __IOM uint32_t DSCSR;     /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+    } CoreDebug_Type;
 
 /* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U                                      /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk                                                                               \
+    (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk                                                                                \
+    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U                                   /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U                                  /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+#define CoreDebug_DHCSR_S_HALT_Pos 17U                                 /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U                                   /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk                                                                                \
+    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+#define CoreDebug_DHCSR_C_STEP_Pos 2U                                  /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+#define CoreDebug_DHCSR_C_HALT_Pos 1U                                  /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask  \
+                                                                                  */
 
 /* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U                                 /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+#define CoreDebug_DCRSR_REGSEL_Pos 0U                                         /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
 
 /* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+#define CoreDebug_DEMCR_TRCENA_Pos 24U                                 /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+#define CoreDebug_DEMCR_MON_REQ_Pos 19U                                  /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+#define CoreDebug_DEMCR_MON_STEP_Pos 18U                                   /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+#define CoreDebug_DEMCR_MON_PEND_Pos 17U                                   /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+#define CoreDebug_DEMCR_MON_EN_Pos 16U                                 /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+#define CoreDebug_DEMCR_VC_INTERR_Pos 9U                                     /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U                                     /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U                                     /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+#define CoreDebug_DEMCR_VC_MMERR_Pos 4U                                    /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk                                                                               \
+    (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk                                                                             \
+    (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
 
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk                                                                             \
+    (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
 
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk                                                                              \
+    (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
 
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk                                                                              \
+    (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
 
 /* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+#define CoreDebug_DSCSR_CDS_Pos 16U                              /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
 
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+#define CoreDebug_DSCSR_SBRSEL_Pos 1U                                  /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
 
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
-
 /**
   \ingroup    CMSIS_core_register
   \defgroup   CMSIS_core_bitfield     Core register bit field macros
@@ -2003,7 +2012,7 @@ typedef struct
   \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted value.
 */
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+#define _VAL2FLD(field, value) (((uint32_t)(value) << field##_Pos) & field##_Msk)
 
 /**
   \brief     Mask and shift a register value to extract a bit filed value.
@@ -2011,945 +2020,856 @@ typedef struct
   \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted bit field value.
 */
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+#define _FLD2VAL(field, value) (((uint32_t)(value)&field##_Msk) >> field##_Pos)
 
-/*@} end of group CMSIS_core_bitfield */
+    /*@} end of group CMSIS_core_bitfield */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_core_base     Core Definitions
+      \brief      Definitions for base addresses, unions, and structures.
+      @{
+     */
 
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
+    /* Memory mapping of Core Hardware */
+#define SCS_BASE       (0xE000E000UL)        /*!< System Control Space Base Address */
+#define ITM_BASE       (0xE0000000UL)        /*!< ITM Base Address */
+#define DWT_BASE       (0xE0001000UL)        /*!< DWT Base Address */
+#define TPI_BASE       (0xE0040000UL)        /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL)        /*!< Core Debug Base Address */
+#define SysTick_BASE   (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE      (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE       (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
 
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+#define SCnSCB    ((SCnSCB_Type *)SCS_BASE)          /*!< System control Register not in SCB */
+#define SCB       ((SCB_Type *)SCB_BASE)             /*!< SCB configuration struct */
+#define SysTick   ((SysTick_Type *)SysTick_BASE)     /*!< SysTick configuration struct */
+#define NVIC      ((NVIC_Type *)NVIC_BASE)           /*!< NVIC configuration struct */
+#define ITM       ((ITM_Type *)ITM_BASE)             /*!< ITM configuration struct */
+#define DWT       ((DWT_Type *)DWT_BASE)             /*!< DWT configuration struct */
+#define TPI       ((TPI_Type *)TPI_BASE)             /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *)CoreDebug_BASE) /*!< Core Debug configuration struct */
 
-  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#define MPU_BASE (SCS_BASE + 0x0D90UL)  /*!< Memory Protection Unit */
+#define MPU      ((MPU_Type *)MPU_BASE) /*!< Memory Protection Unit */
+#endif
 
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SAU_BASE (SCS_BASE + 0x0DD0UL)  /*!< Security Attribution Unit */
+#define SAU      ((SAU_Type *)SAU_BASE) /*!< Security Attribution Unit */
+#endif
 
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
+#define FPU_BASE (SCS_BASE + 0x0F30UL)  /*!< Floating Point Unit */
+#define FPU      ((FPU_Type *)FPU_BASE) /*!< Floating Point Unit */
 
-  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
-  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SCS_BASE_NS       (0xE002E000UL)           /*!< System Control Space Base Address (non-secure address space) */
+#define CoreDebug_BASE_NS (0xE002EDF0UL)           /*!< Core Debug Base Address           (non-secure address space) */
+#define SysTick_BASE_NS   (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address              (non-secure address space) */
+#define NVIC_BASE_NS      (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address                 (non-secure address space) */
+#define SCB_BASE_NS       (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+#define SCnSCB_NS ((SCnSCB_Type *)SCS_BASE_NS) /*!< System control Register not in SCB(non-secure address space) */
+#define SCB_NS    ((SCB_Type *)SCB_BASE_NS)    /*!< SCB configuration struct          (non-secure address space) */
+#define SysTick_NS                                                                                                     \
+    ((SysTick_Type *)SysTick_BASE_NS)       /*!< SysTick configuration struct      (non-secure address space) */
+#define NVIC_NS ((NVIC_Type *)NVIC_BASE_NS) /*!< NVIC configuration struct         (non-secure address space) */
+#define CoreDebug_NS                                                                                                   \
+    ((CoreDebug_Type *)CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
 
-  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL)  /*!< Memory Protection Unit            (non-secure address space) */
+#define MPU_NS      ((MPU_Type *)MPU_BASE_NS) /*!< Memory Protection Unit            (non-secure address space) */
+#endif
 
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
-  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+#define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL)  /*!< Floating Point Unit               (non-secure address space) */
+#define FPU_NS      ((FPU_Type *)FPU_BASE_NS) /*!< Floating Point Unit               (non-secure address space) */
 
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
+    /*@} */
 
+    /*******************************************************************************
+     *                Hardware Abstraction Layer
+      Core Function Interface contains:
+      - Core NVIC Functions
+      - Core SysTick Functions
+      - Core Debug Functions
+      - Core Register Access Functions
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+    */
 
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
+    /* ##########################   NVIC functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+      \brief    Functions that manage interrupts and exceptions via the NVIC.
+      @{
+     */
 
 #ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+#endif
+#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
 #else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
+#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
+#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
+#define NVIC_EnableIRQ           __NVIC_EnableIRQ
+#define NVIC_GetEnableIRQ        __NVIC_GetEnableIRQ
+#define NVIC_DisableIRQ          __NVIC_DisableIRQ
+#define NVIC_GetPendingIRQ       __NVIC_GetPendingIRQ
+#define NVIC_SetPendingIRQ       __NVIC_SetPendingIRQ
+#define NVIC_ClearPendingIRQ     __NVIC_ClearPendingIRQ
+#define NVIC_GetActive           __NVIC_GetActive
+#define NVIC_SetPriority         __NVIC_SetPriority
+#define NVIC_GetPriority         __NVIC_GetPriority
+#define NVIC_SystemReset         __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
 #ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+#endif
+#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
 #else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+#define NVIC_SetVector __NVIC_SetVector
+#define NVIC_GetVector __NVIC_GetVector
+#endif /* (CMSIS_VECTAB_VIRTUAL) */
 
-#define NVIC_USER_IRQ_OFFSET          16
+#define NVIC_USER_IRQ_OFFSET 16
 
+    /**
+      \brief   Set Priority Grouping
+      \details Sets the priority grouping field using the required unlock sequence.
+               The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+               Only values from 0..7 are used.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+      \param [in]      PriorityGroup  Priority grouping field.
+     */
+    __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+    {
+        uint32_t reg_value;
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
 
+        reg_value = SCB->AIRCR; /* read old register configuration    */
+        reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+        reg_value  = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                     (PriorityGroupTmp << 8U)); /* Insert write key and priorty group */
+        SCB->AIRCR = reg_value;
+    }
 
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+    /**
+      \brief   Get Priority Grouping
+      \details Reads the priority grouping field from the NVIC Interrupt Controller.
+      \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+    {
+        return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+    }
 
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
+    /**
+      \brief   Enable Interrupt
+      \details Enables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Interrupt Enable status
+      \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt is not enabled.
+      \return             1  Interrupt is enabled.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
+    /**
+      \brief   Disable Interrupt
+      \details Disables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+            __DSB();
+            __ISB();
+        }
+    }
 
+    /**
+      \brief   Get Pending Interrupt
+      \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not pending.
+      \return             1  Interrupt status is pending.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+    /**
+      \brief   Set Pending Interrupt
+      \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Clear Pending Interrupt
+      \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Get Active Interrupt
+      \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not active.
+      \return             1  Interrupt status is active.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   Get Interrupt Target State
+      \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific
+      interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt is
+      assigned to Secure \return             1  if interrupt is assigned to Non Secure \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
+    /**
+      \brief   Set Interrupt Target State
+      \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific
+      interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt is
+      assigned to Secure 1  if interrupt is assigned to Non Secure \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Clear Interrupt Target State
+      \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device
+      specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0  if interrupt
+      is assigned to Secure 1  if interrupt is assigned to Non Secure \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+            return ((uint32_t)(
+                ((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
+    /**
+      \brief   Set Interrupt Priority
+      \details Sets the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]      IRQn  Interrupt number.
+      \param [in]  priority  Priority to set.
+      \note    The priority cannot be set for every processor exception.
+     */
+    __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+        else {
+            SCB->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] =
+                (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+    }
 
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
+    /**
+      \brief   Get Interrupt Priority
+      \details Reads the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn  Interrupt number.
+      \return             Interrupt Priority.
+                          Value is aligned automatically to the implemented priority bits of the microcontroller.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+    {
 
+        if ((int32_t)(IRQn) >= 0) {
+            return (((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+        }
+        else {
+            return (((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] >> (8U - __NVIC_PRIO_BITS)));
+        }
+    }
 
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
+    /**
+      \brief   Encode Priority
+      \details Encodes the priority for an interrupt with the given priority group,
+               preemptive priority value, and subpriority value.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+      \param [in]     PriorityGroup  Used priority group.
+      \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+      \param [in]       SubPriority  Subpriority value (starting from 0).
+      \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+     */
+    __STATIC_INLINE uint32_t NVIC_EncodePriority(uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+    {
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
+        uint32_t PreemptPriorityBits;
+        uint32_t SubPriorityBits;
 
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
+        PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS))
+                                  ? (uint32_t)(__NVIC_PRIO_BITS)
+                                  : (uint32_t)(7UL - PriorityGroupTmp);
+        SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL)
+                              ? (uint32_t)0UL
+                              : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 
+        return (((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+                ((SubPriority & (uint32_t)((1UL << (SubPriorityBits)) - 1UL))));
+    }
 
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
+    /**
+      \brief   Decode Priority
+      \details Decodes an interrupt priority value with a given priority group to
+               preemptive priority value and subpriority value.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+      \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+      \param [in]     PriorityGroup  Used priority group.
+      \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+      \param [out]     pSubPriority  Subpriority value (starting from 0).
+     */
+    __STATIC_INLINE void NVIC_DecodePriority(uint32_t Priority,
+                                             uint32_t PriorityGroup,
+                                             uint32_t *const pPreemptPriority,
+                                             uint32_t *const pSubPriority)
+    {
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
+        uint32_t PreemptPriorityBits;
+        uint32_t SubPriorityBits;
 
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+        PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS))
+                                  ? (uint32_t)(__NVIC_PRIO_BITS)
+                                  : (uint32_t)(7UL - PriorityGroupTmp);
+        SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL)
+                              ? (uint32_t)0UL
+                              : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
+        *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+        *pSubPriority     = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL);
+    }
 
+    /**
+      \brief   Set Interrupt Vector
+      \details Sets an interrupt vector in SRAM based interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+               VTOR must been relocated to SRAM before.
+      \param [in]   IRQn      Interrupt number
+      \param [in]   vector    Address of interrupt handler function
+     */
+    __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+    {
+        uint32_t *vectors                             = (uint32_t *)SCB->VTOR;
+        vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+    }
 
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
+    /**
+      \brief   Get Interrupt Vector
+      \details Reads an interrupt vector from interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn      Interrupt number.
+      \return                 Address of interrupt handler function
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+    {
+        uint32_t *vectors = (uint32_t *)SCB->VTOR;
+        return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+    }
 
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+    /**
+      \brief   System Reset
+      \details Initiates a system reset request to reset the MCU.
+     */
+    __STATIC_INLINE void __NVIC_SystemReset(void)
+    {
+        __DSB(); /* Ensure all outstanding memory accesses included
+                    buffered write are completed before reset */
+        SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                                SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
+        __DSB();                                            /* Ensure completion of memory access */
 
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
+        for (;;) /* wait until reset */
+        {
+            __NOP();
+        }
+    }
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   Set Priority Grouping (non-secure)
+      \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+               The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+               Only values from 0..7 are used.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+      \param [in]      PriorityGroup  Priority grouping field.
+     */
+    __STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+    {
+        uint32_t reg_value;
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
 
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
+        reg_value = SCB_NS->AIRCR; /* read old register configuration    */
+        reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+        reg_value     = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                     (PriorityGroupTmp << 8U)); /* Insert write key and priorty group */
+        SCB_NS->AIRCR = reg_value;
+    }
 
+    /**
+      \brief   Get Priority Grouping (non-secure)
+      \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+      \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+    {
+        return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+    }
 
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
+    /**
+      \brief   Enable Interrupt (non-secure)
+      \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Interrupt Enable status (non-secure)
+      \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \return             0  Interrupt is not
+      enabled. \return             1  Interrupt is enabled. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
+    /**
+      \brief   Disable Interrupt (non-secure)
+      \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
+    /**
+      \brief   Get Pending Interrupt (non-secure)
+      \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit
+      for the specified device specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return 0
+      Interrupt status is not pending. \return             1  Interrupt status is pending. \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Grouping (non-secure)
-  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+    /**
+      \brief   Set Pending Interrupt (non-secure)
+      \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB_NS->AIRCR =  reg_value;
-}
+    /**
+      \brief   Clear Pending Interrupt (non-secure)
+      \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in
+      secure state. \param [in]      IRQn  Device specific interrupt number. \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Active Interrupt (non-secure)
+      \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the
+      device specific interrupt. \param [in]      IRQn  Device specific interrupt number. \return             0
+      Interrupt status is not active. \return             1  Interrupt status is active. \note    IRQn must not be
+      negative.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL
+                                                                                                           : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Get Priority Grouping (non-secure)
-  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
-  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
+    /**
+      \brief   Set Interrupt Priority (non-secure)
+      \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in
+      secure state. The interrupt number can be positive to specify a device specific interrupt, or negative to specify
+      a processor exception. \param [in]      IRQn  Interrupt number. \param [in]  priority  Priority to set. \note The
+      priority cannot be set for every non-secure processor exception.
+     */
+    __STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+        else {
+            SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] =
+                (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+    }
 
+    /**
+      \brief   Get Interrupt Priority (non-secure)
+      \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in
+      secure state. The interrupt number can be positive to specify a device specific interrupt, or negative to specify
+      a processor exception. \param [in]   IRQn  Interrupt number. \return             Interrupt Priority. Value is
+      aligned automatically to the implemented priority bits of the microcontroller.
+     */
+    __STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+    {
 
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
+        if ((int32_t)(IRQn) >= 0) {
+            return (((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+        }
+        else {
+            return (((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] >> (8U - __NVIC_PRIO_BITS)));
+        }
+    }
 #endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
 
-/*@} end of CMSIS_Core_NVICFunctions */
+    /*@} end of CMSIS_Core_NVICFunctions */
 
-/* ##########################  MPU functions  #################################### */
+    /* ##########################  MPU functions  #################################### */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
 
 #include "mpu_armv8.h"
 
 #endif
 
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
+    /* ##########################  FPU functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_FpuFunctions FPU Functions
+      \brief    Function that provides FPU type.
+      @{
+     */
 
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
+    /**
+      \brief   get FPU type
+      \details returns the FPU type
+      \returns
+       - \b  0: No FPU
+       - \b  1: Single precision FPU
+       - \b  2: Double + Single precision FPU
+     */
+    __STATIC_INLINE uint32_t SCB_GetFPUType(void)
+    {
+        uint32_t mvfr0;
 
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
+        mvfr0 = FPU->MVFR0;
+        if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) {
+            return 2U; /* Double + Single precision FPU */
+        }
+        else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) {
+            return 1U; /* Single precision FPU */
+        }
+        else {
+            return 0U; /* No FPU */
+        }
+    }
 
+    /*@} end of CMSIS_Core_FpuFunctions */
 
-/*@} end of CMSIS_Core_FpuFunctions */
+    /* ##########################   SAU functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_SAUFunctions SAU Functions
+      \brief    Functions that configure the SAU.
+      @{
+     */
 
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 
+    /**
+      \brief   Enable SAU
+      \details Enables the Security Attribution Unit (SAU).
+     */
+    __STATIC_INLINE void TZ_SAU_Enable(void)
+    {
+        SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
+    }
 
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
+    /**
+      \brief   Disable SAU
+      \details Disables the Security Attribution Unit (SAU).
+     */
+    __STATIC_INLINE void TZ_SAU_Disable(void)
+    {
+        SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+    }
 
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
-/*@} end of CMSIS_Core_SAUFunctions */
+    /*@} end of CMSIS_Core_SAUFunctions */
 
+    /* ##################################    SysTick function  ############################################ */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+      \brief    Functions that configure the System.
+      @{
+     */
 
+#if defined(__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+    /**
+      \brief   System Tick Configuration
+      \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+               Counter is in free running mode to generate periodic interrupts.
+      \param [in]  ticks  Number of ticks between two interrupts.
+      \return          0  Function succeeded.
+      \return          1  Function failed.
+      \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+               function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+               must contain a vendor-specific implementation of this function.
+     */
+    __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+    {
+        if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {
+            return (1UL); /* Reload value impossible */
+        }
 
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
+        SysTick->LOAD = (uint32_t)(ticks - 1UL);                         /* set reload register */
+        NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+        SysTick->VAL  = 0UL;                                             /* Load the SysTick Counter Value */
+        SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk |
+                        SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+        return (0UL);                            /* Function successful */
+    }
 
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    /**
+      \brief   System Tick Configuration (non-secure)
+      \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System
+      Tick Timer. Counter is in free running mode to generate periodic interrupts. \param [in]  ticks  Number of ticks
+      between two interrupts. \return          0  Function succeeded. \return          1  Function failed. \note    When
+      the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the function <b>TZ_SysTick_Config_NS</b> is not
+      included. In this case, the file <b><i>device</i>.h</b> must contain a vendor-specific implementation of this
+      function.
 
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
+     */
+    __STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+    {
+        if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {
+            return (1UL); /* Reload value impossible */
+        }
 
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
+        SysTick_NS->LOAD = (uint32_t)(ticks - 1UL);                            /* set reload register */
+        TZ_NVIC_SetPriority_NS(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+        SysTick_NS->VAL  = 0UL;                                                /* Load the SysTick Counter Value */
+        SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk |
+                           SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+        return (0UL);                               /* Function successful */
+    }
 #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
 
 #endif
 
-/*@} end of CMSIS_Core_SysTickFunctions */
+    /*@} end of CMSIS_Core_SysTickFunctions */
 
+    /* ##################################### Debug In/Output function ########################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_core_DebugFunctions ITM Functions
+      \brief    Functions that access the ITM debug interface.
+      @{
+     */
 
+    extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY                                                                                             \
+    ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
+    /**
+      \brief   ITM Send Character
+      \details Transmits a character via the ITM channel 0, and
+               \li Just returns when no debugger is connected that has booked the output.
+               \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+      \param [in]     ch  Character to transmit.
+      \returns            Character to transmit.
+     */
+    __STATIC_INLINE uint32_t ITM_SendChar(uint32_t ch)
     {
-      __NOP();
+        if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
+            ((ITM->TER & 1UL) != 0UL))                  /* ITM Port #0 enabled */
+        {
+            while (ITM->PORT[0U].u32 == 0UL) {
+                __NOP();
+            }
+            ITM->PORT[0U].u8 = (uint8_t)ch;
+        }
+        return (ch);
     }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
 
+    /**
+      \brief   ITM Receive Character
+      \details Inputs a character via the external variable \ref ITM_RxBuffer.
+      \return             Received character.
+      \return         -1  No character pending.
+     */
+    __STATIC_INLINE int32_t ITM_ReceiveChar(void)
+    {
+        int32_t ch = -1; /* no character available */
 
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
+        if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+            ch           = ITM_RxBuffer;
+            ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+        }
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
+        return (ch);
+    }
 
+    /**
+      \brief   ITM Check Character
+      \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+      \return          0  No character available.
+      \return          1  Character available.
+     */
+    __STATIC_INLINE int32_t ITM_CheckChar(void)
+    {
 
+        if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+            return (0); /* no character available */
+        }
+        else {
+            return (1); /*    character available */
+        }
+    }
 
+    /*@} end of CMSIS_core_DebugFunctions */
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/common/cmsis/core_cm7.h b/module-bsp/board/rt1051/common/cmsis/core_cm7.h
index 4fa52be2e..c0e1982fd 100644
--- a/module-bsp/board/rt1051/common/cmsis/core_cm7.h
+++ b/module-bsp/board/rt1051/common/cmsis/core_cm7.h
@@ -1,9 +1,10 @@
-/**************************************************************************//**
- * @file     core_cm7.h
- * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     08. January 2018
- ******************************************************************************/
+/**************************************************************************/ /**
+                                                                              * @file     core_cm7.h
+                                                                              * @brief    CMSIS Cortex-M7 Core
+                                                                              *Peripheral Access Layer Header File
+                                                                              * @version  V5.0.5
+                                                                              * @date     08. January 2018
+                                                                              ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
@@ -22,10 +23,10 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM7_H_GENERIC
@@ -34,134 +35,133 @@
 #include <stdint.h>
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
+    /**
+      \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+      CMSIS violates the following MISRA-C:2004 rules:
 
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
+       \li Required Rule 8.5, object/function definition in header file.<br>
+         Function definitions in header files are used to allow 'inlining'.
 
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
+       \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+         Unions are used for effective representation of core registers.
 
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
+       \li Advisory Rule 19.7, Function-like macro defined.<br>
+         Function-like macros are used to allow more efficient code.
+     */
 
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M7
-  @{
- */
+    /*******************************************************************************
+     *                 CMSIS definitions
+     ******************************************************************************/
+    /**
+      \ingroup Cortex_M7
+      @{
+     */
 
 #include "cmsis_version.h"
 #include "MIMXRT1051.h"
 
 /*  CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM7_CMSIS_VERSION_SUB   ( __CM_CMSIS_VERSION_SUB)                  /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM7_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+#define __CM7_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM7_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)  /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM7_CMSIS_VERSION                                                                                            \
+    ((__CM7_CMSIS_VERSION_MAIN << 16U) | __CM7_CMSIS_VERSION_SUB) /*!< \deprecated CMSIS HAL version number */
 
-#define __CORTEX_M                (7U)                                       /*!< Cortex-M Core */
+#define __CORTEX_M (7U) /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
 */
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#if defined(__CC_ARM)
+#if defined __TARGET_FPU_VFP
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#if defined __ARM_PCS_VFP
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__GNUC__)
+#if defined(__VFP_FP__) && !defined(__SOFTFP__)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__ICCARM__)
+#if defined __ARMVFP__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__TI_ARM__)
+#if defined __TI_VFP_SUPPORT__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__TASKING__)
+#if defined __FPU_VFP__
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
+#elif defined(__CSMC__)
+#if (__CSMC__ & 0x400U)
+#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+#define __FPU_USED 1U
+#else
+#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#define __FPU_USED 0U
+#endif
+#else
+#define __FPU_USED 0U
+#endif
 
 #endif
 
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
+#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
 
 #ifdef __cplusplus
 }
@@ -175,50 +175,51 @@
 #define __CORE_CM7_H_DEPENDANT
 
 #ifdef __cplusplus
- extern "C" {
+extern "C"
+{
 #endif
 
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM7_REV
-    #define __CM7_REV               0x0000U
-    #warning "__CM7_REV not defined in device header file; using default!"
-  #endif
+#ifndef __CM7_REV
+#define __CM7_REV 0x0000U
+#warning "__CM7_REV not defined in device header file; using default!"
+#endif
 
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __FPU_PRESENT
+#define __FPU_PRESENT 0U
+#warning "__FPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __MPU_PRESENT
+#define __MPU_PRESENT 0U
+#warning "__MPU_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __ICACHE_PRESENT
-    #define __ICACHE_PRESENT          0U
-    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __ICACHE_PRESENT
+#define __ICACHE_PRESENT 0U
+#warning "__ICACHE_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __DCACHE_PRESENT
-    #define __DCACHE_PRESENT          0U
-    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
-  #endif
+#ifndef __DCACHE_PRESENT
+#define __DCACHE_PRESENT 0U
+#warning "__DCACHE_PRESENT not defined in device header file; using default!"
+#endif
 
-  #ifndef __DTCM_PRESENT
-    #define __DTCM_PRESENT            0U
-    #warning "__DTCM_PRESENT        not defined in device header file; using default!"
-  #endif
+#ifndef __DTCM_PRESENT
+#define __DTCM_PRESENT 0U
+#warning "__DTCM_PRESENT        not defined in device header file; using default!"
+#endif
 
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
+#ifndef __NVIC_PRIO_BITS
+#define __NVIC_PRIO_BITS 3U
+#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+#endif
 
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
+#ifndef __Vendor_SysTickConfig
+#define __Vendor_SysTickConfig 0U
+#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+#endif
 #endif
 
 /* IO definitions (access restrictions to peripheral registers) */
@@ -230,1499 +231,1499 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#define __I volatile /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#define __I volatile const /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+#define __O  volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
 
 /* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+#define __IM  volatile const /*! Defines 'read only' structure member permissions */
+#define __OM  volatile       /*! Defines 'write only' structure member permissions */
+#define __IOM volatile       /*! Defines 'read / write' structure member permissions */
 
-/*@} end of group Cortex_M7 */
+    /*@} end of group Cortex_M7 */
 
+    /*******************************************************************************
+     *                 Register Abstraction
+      Core Register contain:
+      - Core Register
+      - Core NVIC Register
+      - Core SCB Register
+      - Core SysTick Register
+      - Core Debug Register
+      - Core MPU Register
+      - Core FPU Register
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_core_register Defines and Type Definitions
+      \brief Type definitions and defines for Cortex-M processor based devices.
+    */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_CORE  Status and Control Registers
+      \brief      Core Register type definitions.
+      @{
+     */
 
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
+    /**
+      \brief  Union type to access the Application Program Status Register (APSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t _reserved0 : 16; /*!< bit:  0..15  Reserved */
+            uint32_t GE : 4;          /*!< bit: 16..19  Greater than or Equal flags */
+            uint32_t _reserved1 : 7;  /*!< bit: 20..26  Reserved */
+            uint32_t Q : 1;           /*!< bit:     27  Saturation condition flag */
+            uint32_t V : 1;           /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;           /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;           /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;           /*!< bit:     31  Negative condition code flag */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+#define APSR_N_Pos 31U                 /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+#define APSR_Z_Pos 30U                 /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+#define APSR_C_Pos 29U                 /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+#define APSR_V_Pos 28U                 /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+#define APSR_Q_Pos 27U                 /*!< APSR: Q Position */
+#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
 
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+#define APSR_GE_Pos 16U                    /*!< APSR: GE Position */
+#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
 
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
+    /**
+      \brief  Union type to access the Interrupt Program Status Register (IPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;         /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 23; /*!< bit:  9..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+#define IPSR_ISR_Pos 0U                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
-    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
-    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
+    /**
+      \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t ISR : 9;        /*!< bit:  0.. 8  Exception number */
+            uint32_t _reserved0 : 1; /*!< bit:      9  Reserved */
+            uint32_t ICI_IT_1 : 6;   /*!< bit: 10..15  ICI/IT part 1 */
+            uint32_t GE : 4;         /*!< bit: 16..19  Greater than or Equal flags */
+            uint32_t _reserved1 : 4; /*!< bit: 20..23  Reserved */
+            uint32_t T : 1;          /*!< bit:     24  Thumb bit */
+            uint32_t ICI_IT_2 : 2;   /*!< bit: 25..26  ICI/IT part 2 */
+            uint32_t Q : 1;          /*!< bit:     27  Saturation condition flag */
+            uint32_t V : 1;          /*!< bit:     28  Overflow condition code flag */
+            uint32_t C : 1;          /*!< bit:     29  Carry condition code flag */
+            uint32_t Z : 1;          /*!< bit:     30  Zero condition code flag */
+            uint32_t N : 1;          /*!< bit:     31  Negative condition code flag */
+        } b;                         /*!< Structure used for bit  access */
+        uint32_t w;                  /*!< Type      used for word access */
+    } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+#define xPSR_N_Pos 31U                 /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+#define xPSR_Z_Pos 30U                 /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+#define xPSR_C_Pos 29U                 /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+#define xPSR_V_Pos 28U                 /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+#define xPSR_Q_Pos 27U                 /*!< xPSR: Q Position */
+#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
 
-#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
+#define xPSR_ICI_IT_2_Pos 25U                        /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
 
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+#define xPSR_T_Pos 24U                 /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
 
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+#define xPSR_GE_Pos 16U                    /*!< xPSR: GE Position */
+#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
 
-#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+#define xPSR_ICI_IT_1_Pos 10U                           /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
 
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+#define xPSR_ISR_Pos 0U                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
 
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
+    /**
+      \brief  Union type to access the Control Registers (CONTROL).
+     */
+    typedef union
+    {
+        struct
+        {
+            uint32_t nPRIV : 1;       /*!< bit:      0  Execution privilege in Thread mode */
+            uint32_t SPSEL : 1;       /*!< bit:      1  Stack to be used */
+            uint32_t FPCA : 1;        /*!< bit:      2  FP extension active flag */
+            uint32_t _reserved0 : 29; /*!< bit:  3..31  Reserved */
+        } b;                          /*!< Structure used for bit  access */
+        uint32_t w;                   /*!< Type      used for word access */
+    } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+#define CONTROL_FPCA_Pos 2U                        /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
 
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+#define CONTROL_SPSEL_Pos 1U                         /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+#define CONTROL_nPRIV_Pos 0U                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
 
-/*@} end of group CMSIS_CORE */
+    /*@} end of group CMSIS_CORE */
 
+    /**
+      \ingroup    CMSIS_core_register
+      \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+      \brief      Type definitions for the NVIC Registers
+      @{
+     */
 
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+    /**
+      \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+     */
+    typedef struct
+    {
+        __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
         uint32_t RSERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
         uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
         uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
         uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
+        __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+    } NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+#define NVIC_STIR_INTID_Pos 0U                                   /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
 
-/*@} end of group CMSIS_NVIC */
+    /*@} end of group CMSIS_NVIC */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SCB     System Control Block (SCB)
+      \brief    Type definitions for the System Control Block Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+    /**
+      \brief  Structure type to access the System Control Block (SCB).
+     */
+    typedef struct
+    {
+        __IM uint32_t CPUID;       /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+        __IOM uint32_t ICSR;       /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        __IOM uint32_t VTOR;       /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+        __IOM uint32_t AIRCR;      /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+        __IOM uint32_t SCR;        /*!< Offset: 0x010 (R/W)  System Control Register */
+        __IOM uint32_t CCR;        /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        __IOM uint8_t SHPR[12U];   /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+        __IOM uint32_t SHCSR;      /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+        __IOM uint32_t CFSR;       /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+        __IOM uint32_t HFSR;       /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+        __IOM uint32_t DFSR;       /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+        __IOM uint32_t MMFAR;      /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+        __IOM uint32_t BFAR;       /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+        __IOM uint32_t AFSR;       /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+        __IM uint32_t ID_PFR[2U];  /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+        __IM uint32_t ID_DFR;      /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+        __IM uint32_t ID_AFR;      /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+        __IM uint32_t ID_MFR[4U];  /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+        __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
         uint32_t RESERVED0[1U];
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        __IM uint32_t CLIDR;   /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+        __IM uint32_t CTR;     /*!< Offset: 0x07C (R/ )  Cache Type register */
+        __IM uint32_t CCSIDR;  /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+        __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+        __IOM uint32_t CPACR;  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
         uint32_t RESERVED3[93U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        __OM uint32_t STIR; /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
         uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+        __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+        __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
         uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
         uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        __OM uint32_t ICIMVAU;  /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+        __OM uint32_t DCIMVAC;  /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+        __OM uint32_t DCISW;    /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+        __OM uint32_t DCCMVAU;  /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+        __OM uint32_t DCCMVAC;  /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+        __OM uint32_t DCCSW;    /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+        __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+        __OM uint32_t DCCISW;   /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
         uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+        __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+        __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+        __IOM uint32_t CACR;   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+        __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
         uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
-} SCB_Type;
+        __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+    } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U                                   /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+#define SCB_CPUID_VARIANT_Pos 20U                              /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+#define SCB_CPUID_ARCHITECTURE_Pos 16U                                   /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+#define SCB_CPUID_PARTNO_Pos 4U                                /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+#define SCB_CPUID_REVISION_Pos 0U                                    /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+#define SCB_ICSR_NMIPENDSET_Pos 31U                              /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+#define SCB_ICSR_PENDSVSET_Pos 28U                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+#define SCB_ICSR_PENDSVCLR_Pos 27U                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+#define SCB_ICSR_PENDSTSET_Pos 26U                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+#define SCB_ICSR_PENDSTCLR_Pos 25U                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+#define SCB_ICSR_ISRPREEMPT_Pos 23U                              /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+#define SCB_ICSR_ISRPENDING_Pos 22U                              /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+#define SCB_ICSR_VECTPENDING_Pos 12U                                   /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+#define SCB_ICSR_RETTOBASE_Pos 11U                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+#define SCB_ICSR_VECTACTIVE_Pos 0U                                       /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#define SCB_VTOR_TBLOFF_Pos 7U                                   /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+#define SCB_AIRCR_VECTKEY_Pos 16U                                 /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U                                     /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+#define SCB_AIRCR_ENDIANESS_Pos 15U                              /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+#define SCB_AIRCR_PRIGROUP_Pos 8U                              /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U                                 /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U                                   /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
+#define SCB_AIRCR_VECTRESET_Pos 0U                                   /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+#define SCB_SCR_SEVONPEND_Pos 4U                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+#define SCB_SCR_SLEEPDEEP_Pos 2U                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+#define SCB_SCR_SLEEPONEXIT_Pos 1U                               /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */
+#define SCB_CCR_BP_Pos 18U                     /*!< SCB CCR: Branch prediction enable bit Position */
+#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */
 
-#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */
+#define SCB_CCR_IC_Pos 17U                     /*!< SCB CCR: Instruction cache enable bit Position */
+#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */
 
-#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */
+#define SCB_CCR_DC_Pos 16U                     /*!< SCB CCR: Cache enable bit Position */
+#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */
 
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+#define SCB_CCR_STKALIGN_Pos 9U                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+#define SCB_CCR_BFHFNMIGN_Pos 8U                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+#define SCB_CCR_DIV_0_TRP_Pos 4U                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+#define SCB_CCR_UNALIGN_TRP_Pos 3U                               /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+#define SCB_CCR_USERSETMPEND_Pos 1U                                /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
 
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
+#define SCB_CCR_NONBASETHRDENA_Pos 0U                                      /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+#define SCB_SHCSR_USGFAULTENA_Pos 18U                                /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+#define SCB_SHCSR_BUSFAULTENA_Pos 17U                                /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+#define SCB_SHCSR_MEMFAULTENA_Pos 16U                                /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U                                 /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U                                   /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U                                   /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+#define SCB_SHCSR_USGFAULTPENDED_Pos 12U                                   /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+#define SCB_SHCSR_SYSTICKACT_Pos 11U                               /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+#define SCB_SHCSR_PENDSVACT_Pos 10U                              /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+#define SCB_SHCSR_MONITORACT_Pos 8U                                /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+#define SCB_SHCSR_SVCALLACT_Pos 7U                               /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+#define SCB_SHCSR_USGFAULTACT_Pos 3U                                 /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+#define SCB_SHCSR_BUSFAULTACT_Pos 1U                                 /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+#define SCB_SHCSR_MEMFAULTACT_Pos 0U                                     /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
 
 /* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask  \
+                                                                       */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+#define SCB_CFSR_BUSFAULTSR_Pos 8U                                  /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk                                                                                        \
+    (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
 /* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos)  /*!< SCB CFSR (MMFSR): MMARVALID Mask */
 
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos)    /*!< SCB CFSR (MMFSR): MLSPERR Mask */
 
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos)    /*!< SCB CFSR (MMFSR): MSTKERR Mask */
 
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos)  /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
 
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos)   /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
 
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U)   /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
 
 /* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U)  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
 
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos)   /*!< SCB CFSR (BFSR): LSPERR Mask */
 
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos)   /*!< SCB CFSR (BFSR): STKERR Mask */
 
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
 
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U)    /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
 
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U)  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
 
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos)  /*!< SCB CFSR (BFSR): IBUSERR Mask */
 
 /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U)  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
 
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U)  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
 
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos)     /*!< SCB CFSR (UFSR): NOCP Mask */
 
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos)    /*!< SCB CFSR (UFSR): INVPC Mask */
 
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
 
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U)   /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
 
 /* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+#define SCB_HFSR_DEBUGEVT_Pos 31U                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+#define SCB_HFSR_FORCED_Pos 30U                          /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+#define SCB_HFSR_VECTTBL_Pos 1U                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+#define SCB_DFSR_EXTERNAL_Pos 4U                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+#define SCB_DFSR_VCATCH_Pos 3U                           /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+#define SCB_DFSR_DWTTRAP_Pos 2U                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+#define SCB_DFSR_BKPT_Pos 1U                         /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+#define SCB_DFSR_HALTED_Pos 0U                               /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
 
 /* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+#define SCB_CLIDR_LOUU_Pos 27U                         /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
 
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+#define SCB_CLIDR_LOC_Pos 24U                        /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */
 
 /* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+#define SCB_CTR_FORMAT_Pos 29U                         /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
 
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+#define SCB_CTR_CWG_Pos 24U                        /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
 
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+#define SCB_CTR_ERG_Pos 20U                        /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
 
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+#define SCB_CTR_DMINLINE_Pos 16U                             /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
 
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+#define SCB_CTR_IMINLINE_Pos 0U                                  /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
 
 /* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+#define SCB_CCSIDR_WT_Pos 31U                        /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
 
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+#define SCB_CCSIDR_WB_Pos 30U                        /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
 
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+#define SCB_CCSIDR_RA_Pos 29U                        /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
 
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+#define SCB_CCSIDR_WA_Pos 28U                        /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
 
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+#define SCB_CCSIDR_NUMSETS_Pos 13U                                  /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
 
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
 
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+#define SCB_CCSIDR_LINESIZE_Pos 0U                                   /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
 
 /* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+#define SCB_CSSELR_LEVEL_Pos 1U                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
 
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+#define SCB_CSSELR_IND_Pos 0U                              /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
 
 /* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+#define SCB_STIR_INTID_Pos 0U                                  /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
 
 /* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+#define SCB_DCISW_WAY_Pos 30U                        /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */
 
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+#define SCB_DCISW_SET_Pos 5U                             /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */
 
 /* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+#define SCB_DCCSW_WAY_Pos 30U                        /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */
 
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+#define SCB_DCCSW_SET_Pos 5U                             /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */
 
 /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+#define SCB_DCCISW_WAY_Pos 30U                         /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
 
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+#define SCB_DCCISW_SET_Pos 5U                              /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
 
 /* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+#define SCB_ITCMCR_SZ_Pos 3U                           /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
 
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+#define SCB_ITCMCR_RETEN_Pos 2U                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
 
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+#define SCB_ITCMCR_RMW_Pos 1U                          /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
 
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+#define SCB_ITCMCR_EN_Pos 0U                             /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
 
 /* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+#define SCB_DTCMCR_SZ_Pos 3U                           /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
 
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+#define SCB_DTCMCR_RETEN_Pos 2U                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
 
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+#define SCB_DTCMCR_RMW_Pos 1U                          /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
 
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+#define SCB_DTCMCR_EN_Pos 0U                             /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
 
 /* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+#define SCB_AHBPCR_SZ_Pos 1U                         /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
 
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+#define SCB_AHBPCR_EN_Pos 0U                             /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
 
 /* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+#define SCB_CACR_FORCEWT_Pos 2U                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
 
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
+#define SCB_CACR_ECCEN_Pos 1U                          /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
 
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+#define SCB_CACR_SIWT_Pos 0U                             /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
 
 /* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+#define SCB_AHBSCR_INITCOUNT_Pos 11U                                  /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
 
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+#define SCB_AHBSCR_TPRI_Pos 2U                               /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
 
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+#define SCB_AHBSCR_CTL_Pos 0U                              /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
 
 /* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+#define SCB_ABFSR_AXIMTYPE_Pos 8U                              /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
 
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+#define SCB_ABFSR_EPPB_Pos 4U                          /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
 
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+#define SCB_ABFSR_AXIM_Pos 3U                          /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
 
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+#define SCB_ABFSR_AHBP_Pos 2U                          /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
 
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+#define SCB_ABFSR_DTCM_Pos 1U                          /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
 
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+#define SCB_ABFSR_ITCM_Pos 0U                              /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
 
-/*@} end of group CMSIS_SCB */
+    /*@} end of group CMSIS_SCB */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+      \brief    Type definitions for the System Control and ID Register not in the SCB
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
+    /**
+      \brief  Structure type to access the System Control and ID Register not in the SCB.
+     */
+    typedef struct
+    {
         uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
+        __IM uint32_t ICTR;   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+        __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+    } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+#define SCnSCB_ICTR_INTLINESNUM_Pos 0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
+#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U                                      /*!< ACTLR: DISITMATBFLUSH Position */
+#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */
 
-#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */
-#define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */
+#define SCnSCB_ACTLR_DISRAMODE_Pos 11U                                 /*!< ACTLR: DISRAMODE Position */
+#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */
 
-#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */
-#define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */
+#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U                                 /*!< ACTLR: FPEXCODIS Position */
+#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */
 
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+#define SCnSCB_ACTLR_DISFOLD_Pos 2U                                /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
 
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U                                       /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
 
-/*@} end of group CMSIS_SCnotSCB */
+    /*@} end of group CMSIS_SCnotSCB */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+      \brief    Type definitions for the System Timer Registers.
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
+    /**
+      \brief  Structure type to access the System Timer (SysTick).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+        __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+        __IOM uint32_t VAL;  /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+        __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+    } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U                                 /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+#define SysTick_CTRL_CLKSOURCE_Pos 2U                                  /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+#define SysTick_CTRL_TICKINT_Pos 1U                                /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+#define SysTick_CTRL_ENABLE_Pos 0U                                   /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+#define SysTick_LOAD_RELOAD_Pos 0U                                          /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+#define SysTick_VAL_CURRENT_Pos 0U                                          /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+#define SysTick_CALIB_NOREF_Pos 31U                              /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+#define SysTick_CALIB_SKEW_Pos 30U                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+#define SysTick_CALIB_TENMS_Pos 0U                                          /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
 
-/*@} end of group CMSIS_SysTick */
+    /*@} end of group CMSIS_SysTick */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+      \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+    /**
+      \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+     */
+    typedef struct
+    {
+        __OM union
+        {
+            __OM uint8_t u8;   /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+            __OM uint16_t u16; /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+            __OM uint32_t u32; /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+        } PORT[32U];           /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
         uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
         uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
         uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        __OM uint32_t IWR;   /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
+        __IM uint32_t IRR;   /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
+        __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
         uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+        __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
         uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
+        __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+        __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+        __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+        __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+        __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+        __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+        __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+        __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+        __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+        __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+        __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+        __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    } ITM_Type;
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Pos 0U                                         /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+#define ITM_TCR_BUSY_Pos 23U                       /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+#define ITM_TCR_TraceBusID_Pos 16U                                /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+#define ITM_TCR_GTSFREQ_Pos 10U                          /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+#define ITM_TCR_TSPrescale_Pos 8U                              /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+#define ITM_TCR_SWOENA_Pos 4U                          /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+#define ITM_TCR_DWTENA_Pos 3U                          /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+#define ITM_TCR_SYNCENA_Pos 2U                           /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+#define ITM_TCR_TSENA_Pos 1U                         /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+#define ITM_TCR_ITMENA_Pos 0U                              /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
 
 /* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
+#define ITM_IWR_ATVALIDM_Pos 0U                                /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
 
 /* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
+#define ITM_IRR_ATREADYM_Pos 0U                                /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
 
 /* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
+#define ITM_IMCR_INTEGRATION_Pos 0U                                    /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
 
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+#define ITM_LSR_ByteAcc_Pos 2U                           /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+#define ITM_LSR_Access_Pos 1U                          /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+#define ITM_LSR_Present_Pos 0U                               /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
 
-/*@}*/ /* end of group CMSIS_ITM */
+    /*@}*/ /* end of group CMSIS_ITM */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+      \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+    /**
+      \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+     */
+    typedef struct
+    {
+        __IOM uint32_t CTRL;      /*!< Offset: 0x000 (R/W)  Control Register */
+        __IOM uint32_t CYCCNT;    /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+        __IOM uint32_t CPICNT;    /*!< Offset: 0x008 (R/W)  CPI Count Register */
+        __IOM uint32_t EXCCNT;    /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+        __IOM uint32_t SLEEPCNT;  /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+        __IOM uint32_t LSUCNT;    /*!< Offset: 0x014 (R/W)  LSU Count Register */
+        __IOM uint32_t FOLDCNT;   /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+        __IM uint32_t PCSR;       /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+        __IOM uint32_t COMP0;     /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        __IOM uint32_t MASK0;     /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+        __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W)  Function Register 0 */
         uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        __IOM uint32_t COMP1;     /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        __IOM uint32_t MASK1;     /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+        __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W)  Function Register 1 */
         uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        __IOM uint32_t COMP2;     /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        __IOM uint32_t MASK2;     /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+        __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W)  Function Register 2 */
         uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        __IOM uint32_t COMP3;     /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        __IOM uint32_t MASK3;     /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+        __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W)  Function Register 3 */
         uint32_t RESERVED3[981U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-} DWT_Type;
+        __OM uint32_t LAR; /*!< Offset: 0xFB0 (  W)  Lock Access Register */
+        __IM uint32_t LSR; /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+    } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+#define DWT_CTRL_NUMCOMP_Pos 28U                             /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+#define DWT_CTRL_NOTRCPKT_Pos 27U                              /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+#define DWT_CTRL_NOEXTTRIG_Pos 26U                               /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+#define DWT_CTRL_NOCYCCNT_Pos 25U                              /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+#define DWT_CTRL_NOPRFCNT_Pos 24U                              /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+#define DWT_CTRL_CYCEVTENA_Pos 22U                               /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+#define DWT_CTRL_FOLDEVTENA_Pos 21U                                /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+#define DWT_CTRL_LSUEVTENA_Pos 20U                               /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+#define DWT_CTRL_SLEEPEVTENA_Pos 19U                                 /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+#define DWT_CTRL_EXCEVTENA_Pos 18U                               /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+#define DWT_CTRL_CPIEVTENA_Pos 17U                               /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+#define DWT_CTRL_EXCTRCENA_Pos 16U                               /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+#define DWT_CTRL_PCSAMPLENA_Pos 12U                                /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+#define DWT_CTRL_SYNCTAP_Pos 10U                             /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+#define DWT_CTRL_CYCTAP_Pos 9U                             /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+#define DWT_CTRL_POSTINIT_Pos 5U                               /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+#define DWT_CTRL_POSTPRESET_Pos 1U                                 /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+#define DWT_CTRL_CYCCNTENA_Pos 0U                                    /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+#define DWT_CPICNT_CPICNT_Pos 0U                                    /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+#define DWT_EXCCNT_EXCCNT_Pos 0U                                    /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U                                        /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+#define DWT_LSUCNT_LSUCNT_Pos 0U                                    /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+#define DWT_FOLDCNT_FOLDCNT_Pos 0U                                      /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
+#define DWT_MASK_MASK_Pos 0U                                /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+#define DWT_FUNCTION_MATCHED_Pos 24U                                 /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+#define DWT_FUNCTION_DATAVADDR1_Pos 16U                                    /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
 
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+#define DWT_FUNCTION_DATAVADDR0_Pos 12U                                    /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U                                   /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+#define DWT_FUNCTION_LNK1ENA_Pos 9U                                  /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
 
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+#define DWT_FUNCTION_DATAVMATCH_Pos 8U                                     /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
 
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+#define DWT_FUNCTION_CYCMATCH_Pos 7U                                   /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
 
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+#define DWT_FUNCTION_EMITRANGE_Pos 5U                                    /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
 
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
+#define DWT_FUNCTION_FUNCTION_Pos 0U                                       /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
 
-/*@}*/ /* end of group CMSIS_DWT */
+    /*@}*/ /* end of group CMSIS_DWT */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+      \brief    Type definitions for the Trace Port Interface (TPI)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+    /**
+      \brief  Structure type to access the Trace Port Interface Register (TPI).
+     */
+    typedef struct
+    {
+        __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+        __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
         uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
         uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
         uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        __IM uint32_t FFSR;  /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+        __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+        __IM uint32_t FSCR;  /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
         uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        __IM uint32_t TRIGGER;   /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+        __IM uint32_t FIFO0;     /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+        __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
         uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+        __IM uint32_t FIFO1;     /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+        __IOM uint32_t ITCTRL;   /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
         uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+        __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
         uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
+        __IM uint32_t DEVID;   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+        __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+    } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< @Deprecated TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< @Deprecated TPI ACPR: PRESCALER Mask */
+#define TPI_ACPR_PRESCALER_Pos 0U                                       /*!< @Deprecated TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< @Deprecated TPI ACPR: PRESCALER Mask */
 
-#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
-#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+#define TPI_ACPR_SWOSCALER_Pos 0U                                       /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+#define TPI_SPPR_TXMODE_Pos 0U                                 /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+#define TPI_FFSR_FtNonStop_Pos 3U                                /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+#define TPI_FFSR_TCPresent_Pos 2U                                /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+#define TPI_FFSR_FtStopped_Pos 1U                                /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+#define TPI_FFSR_FlInProg_Pos 0U                                   /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+#define TPI_FFCR_TrigIn_Pos 8U                             /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+#define TPI_FFCR_EnFCont_Pos 1U                              /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+#define TPI_TRIGGER_TRIGGER_Pos 0U                                     /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+#define TPI_FIFO0_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+#define TPI_FIFO0_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+#define TPI_FIFO0_ETM2_Pos 16U                            /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+#define TPI_FIFO0_ETM1_Pos 8U                             /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+#define TPI_FIFO0_ETM0_Pos 0U                                 /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U                                  /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+#define TPI_FIFO1_ITM_bytecount_Pos 27U                                    /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U                                  /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+#define TPI_FIFO1_ETM_bytecount_Pos 24U                                    /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+#define TPI_FIFO1_ITM2_Pos 16U                            /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+#define TPI_FIFO1_ITM1_Pos 8U                             /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+#define TPI_FIFO1_ITM0_Pos 0U                                 /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U                                       /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos 0U                                 /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+#define TPI_DEVID_NRZVALID_Pos 11U                               /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+#define TPI_DEVID_MANCVALID_Pos 10U                                /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+#define TPI_DEVID_PTINVALID_Pos 9U                                 /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+#define TPI_DEVID_MinBufSz_Pos 6U                                /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+#define TPI_DEVID_AsynClkIn_Pos 5U                                 /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+#define TPI_DEVID_NrTraceInput_Pos 0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+#define TPI_DEVTYPE_MajorType_Pos 4U                                   /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
 
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+#define TPI_DEVTYPE_SubType_Pos 0U                                     /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
 
-/*@}*/ /* end of group CMSIS_TPI */
+    /*@}*/ /* end of group CMSIS_TPI */
 
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+      \brief    Type definitions for the Memory Protection Unit (MPU)
+      @{
+     */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
+    /**
+      \brief  Structure type to access the Memory Protection Unit (MPU).
+     */
+    typedef struct
+    {
+        __IM uint32_t TYPE;     /*!< Offset: 0x000 (R/ )  MPU Type Register */
+        __IOM uint32_t CTRL;    /*!< Offset: 0x004 (R/W)  MPU Control Register */
+        __IOM uint32_t RNR;     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+        __IOM uint32_t RBAR;    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+        __IOM uint32_t RASR;    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+        __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+        __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+        __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+        __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+        __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+        __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+    } MPU_Type;
 
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
+#define MPU_TYPE_RALIASES 4U
 
 /* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+#define MPU_TYPE_IREGION_Pos 16U                              /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+#define MPU_TYPE_DREGION_Pos 8U                               /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+#define MPU_TYPE_SEPARATE_Pos 0U                                 /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
 
 /* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U                               /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+#define MPU_CTRL_HFNMIENA_Pos 1U                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+#define MPU_CTRL_ENABLE_Pos 0U                               /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
 
 /* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+#define MPU_RNR_REGION_Pos 0U                                 /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
 
 /* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+#define MPU_RBAR_ADDR_Pos 5U                                 /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+#define MPU_RBAR_VALID_Pos 4U                          /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+#define MPU_RBAR_REGION_Pos 0U                                 /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
 
 /* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+#define MPU_RASR_ATTRS_Pos 16U                              /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+#define MPU_RASR_XN_Pos 28U                      /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+#define MPU_RASR_AP_Pos 24U                        /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+#define MPU_RASR_TEX_Pos 19U                         /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+#define MPU_RASR_S_Pos 18U                     /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+#define MPU_RASR_C_Pos 17U                     /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+#define MPU_RASR_B_Pos 16U                     /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+#define MPU_RASR_SRD_Pos 8U                           /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+#define MPU_RASR_SIZE_Pos 1U                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+#define MPU_RASR_ENABLE_Pos 0U                               /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+      \brief    Type definitions for the Floating Point Unit (FPU)
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
+    /**
+      \brief  Structure type to access the Floating Point Unit (FPU).
+     */
+    typedef struct
+    {
         uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
-} FPU_Type;
+        __IOM uint32_t FPCCR;  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+        __IOM uint32_t FPCAR;  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+        __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+        __IM uint32_t MVFR0;   /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+        __IM uint32_t MVFR1;   /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+        __IM uint32_t MVFR2;   /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
+    } FPU_Type;
 
 /* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+#define FPU_FPCCR_ASPEN_Pos 31U                          /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
 
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+#define FPU_FPCCR_LSPEN_Pos 30U                          /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
 
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+#define FPU_FPCCR_MONRDY_Pos 8U                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
 
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+#define FPU_FPCCR_BFRDY_Pos 6U                           /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
 
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+#define FPU_FPCCR_MMRDY_Pos 5U                           /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
 
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+#define FPU_FPCCR_HFRDY_Pos 4U                           /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
 
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+#define FPU_FPCCR_THREAD_Pos 3U                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
 
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+#define FPU_FPCCR_USER_Pos 1U                          /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
 
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
 
 /* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+#define FPU_FPCAR_ADDRESS_Pos 3U                                      /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
 
 /* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+#define FPU_FPDSCR_AHP_Pos 26U                         /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
 
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+#define FPU_FPDSCR_DN_Pos 25U                        /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
 
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+#define FPU_FPDSCR_FZ_Pos 24U                        /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
 
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+#define FPU_FPDSCR_RMode_Pos 22U                           /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
 
 /* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk                                                                                \
+    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
 
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+#define FPU_MVFR0_Short_vectors_Pos 24U                                    /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
 
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+#define FPU_MVFR0_Square_root_Pos 20U                                  /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
 
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+#define FPU_MVFR0_Divide_Pos 16U                             /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
 
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk                                                                                \
+    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
 
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk                                                                                 \
+    (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
 
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk                                                                                 \
+    (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
 
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk                                                                                 \
+    (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
 
 /* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+#define FPU_MVFR1_FP_fused_MAC_Pos 28U                                   /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
 
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+#define FPU_MVFR1_FP_HPFP_Pos 24U                              /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
 
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+#define FPU_MVFR1_D_NaN_mode_Pos 4U                                  /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
 
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+#define FPU_MVFR1_FtZ_mode_Pos 0U                                    /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
 
-/* Media and FP Feature Register 2 Definitions */
+    /* Media and FP Feature Register 2 Definitions */
 
-/*@} end of group CMSIS_FPU */
+    /*@} end of group CMSIS_FPU */
 
+    /**
+      \ingroup  CMSIS_core_register
+      \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+      \brief    Type definitions for the Core Debug Registers
+      @{
+     */
 
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
+    /**
+      \brief  Structure type to access the Core Debug Register (CoreDebug).
+     */
+    typedef struct
+    {
+        __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+        __OM uint32_t DCRSR;  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+        __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+        __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+    } CoreDebug_Type;
 
 /* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U                                      /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk                                                                                \
+    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U                                   /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U                                  /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+#define CoreDebug_DHCSR_S_HALT_Pos 17U                                 /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U                                   /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk                                                                                \
+    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask   \
+                                                                                */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+#define CoreDebug_DHCSR_C_STEP_Pos 2U                                  /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+#define CoreDebug_DHCSR_C_HALT_Pos 1U                                  /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask  \
+                                                                                  */
 
 /* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U                                 /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+#define CoreDebug_DCRSR_REGSEL_Pos 0U                                         /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
 
 /* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+#define CoreDebug_DEMCR_TRCENA_Pos 24U                                 /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+#define CoreDebug_DEMCR_MON_REQ_Pos 19U                                  /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+#define CoreDebug_DEMCR_MON_STEP_Pos 18U                                   /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+#define CoreDebug_DEMCR_MON_PEND_Pos 17U                                   /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+#define CoreDebug_DEMCR_MON_EN_Pos 16U                                 /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+#define CoreDebug_DEMCR_VC_INTERR_Pos 9U                                     /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U                                     /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U                                     /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask   \
+                                                                                */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+#define CoreDebug_DEMCR_VC_MMERR_Pos 4U                                    /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk                                                                               \
+    (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
-
 /**
   \ingroup    CMSIS_core_register
   \defgroup   CMSIS_core_bitfield     Core register bit field macros
@@ -1736,7 +1737,7 @@ typedef struct
   \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted value.
 */
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+#define _VAL2FLD(field, value) (((uint32_t)(value) << field##_Pos) & field##_Msk)
 
 /**
   \brief     Mask and shift a register value to extract a bit filed value.
@@ -1744,11 +1745,10 @@ typedef struct
   \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
   \return           Masked and shifted bit field value.
 */
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+#define _FLD2VAL(field, value) (((uint32_t)(value)&field##_Msk) >> field##_Pos)
 
 /*@} end of group CMSIS_core_bitfield */
 
-
 /**
   \ingroup    CMSIS_core_register
   \defgroup   CMSIS_core_base     Core Definitions
@@ -1757,448 +1757,418 @@ typedef struct
  */
 
 /* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+#define SCS_BASE       (0xE000E000UL)        /*!< System Control Space Base Address */
+#define ITM_BASE       (0xE0000000UL)        /*!< ITM Base Address */
+#define DWT_BASE       (0xE0001000UL)        /*!< DWT Base Address */
+#define TPI_BASE       (0xE0040000UL)        /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL)        /*!< Core Debug Base Address */
+#define SysTick_BASE   (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE      (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE       (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
 
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+#define SCnSCB    ((SCnSCB_Type *)SCS_BASE)          /*!< System control Register not in SCB */
+#define SCB       ((SCB_Type *)SCB_BASE)             /*!< SCB configuration struct */
+#define SysTick   ((SysTick_Type *)SysTick_BASE)     /*!< SysTick configuration struct */
+#define NVIC      ((NVIC_Type *)NVIC_BASE)           /*!< NVIC configuration struct */
+#define ITM       ((ITM_Type *)ITM_BASE)             /*!< ITM configuration struct */
+#define DWT       ((DWT_Type *)DWT_BASE)             /*!< DWT configuration struct */
+#define TPI       ((TPI_Type *)TPI_BASE)             /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *)CoreDebug_BASE) /*!< Core Debug configuration struct */
 
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#define MPU_BASE (SCS_BASE + 0x0D90UL)  /*!< Memory Protection Unit */
+#define MPU      ((MPU_Type *)MPU_BASE) /*!< Memory Protection Unit */
 #endif
 
-#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
-#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
+#define FPU_BASE (SCS_BASE + 0x0F30UL)  /*!< Floating Point Unit */
+#define FPU      ((FPU_Type *)FPU_BASE) /*!< Floating Point Unit */
 
-/*@} */
+    /*@} */
 
+    /*******************************************************************************
+     *                Hardware Abstraction Layer
+      Core Function Interface contains:
+      - Core NVIC Functions
+      - Core SysTick Functions
+      - Core Debug Functions
+      - Core Register Access Functions
+     ******************************************************************************/
+    /**
+      \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+    */
 
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
+    /* ##########################   NVIC functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+      \brief    Functions that manage interrupts and exceptions via the NVIC.
+      @{
+     */
 
 #ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+#endif
+#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
 #else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
+#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
+#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
+#define NVIC_EnableIRQ           __NVIC_EnableIRQ
+#define NVIC_GetEnableIRQ        __NVIC_GetEnableIRQ
+#define NVIC_DisableIRQ          __NVIC_DisableIRQ
+#define NVIC_GetPendingIRQ       __NVIC_GetPendingIRQ
+#define NVIC_SetPendingIRQ       __NVIC_SetPendingIRQ
+#define NVIC_ClearPendingIRQ     __NVIC_ClearPendingIRQ
+#define NVIC_GetActive           __NVIC_GetActive
+#define NVIC_SetPriority         __NVIC_SetPriority
+#define NVIC_GetPriority         __NVIC_GetPriority
+#define NVIC_SystemReset         __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
 #ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+#endif
+#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
 #else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+#define NVIC_SetVector __NVIC_SetVector
+#define NVIC_GetVector __NVIC_GetVector
+#endif /* (CMSIS_VECTAB_VIRTUAL) */
 
-#define NVIC_USER_IRQ_OFFSET          16
+#define NVIC_USER_IRQ_OFFSET 16
 
+    /**
+      \brief   Set Priority Grouping
+      \details Sets the priority grouping field using the required unlock sequence.
+               The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+               Only values from 0..7 are used.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+      \param [in]      PriorityGroup  Priority grouping field.
+     */
+    __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+    {
+        uint32_t reg_value;
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
 
+        reg_value = SCB->AIRCR; /* read old register configuration    */
+        reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+        reg_value  = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                     (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)); /* Insert write key and priority group */
+        SCB->AIRCR = reg_value;
+    }
 
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+    /**
+      \brief   Get Priority Grouping
+      \details Reads the priority grouping field from the NVIC Interrupt Controller.
+      \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+    {
+        return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+    }
 
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
+    /**
+      \brief   Enable Interrupt
+      \details Enables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Get Interrupt Enable status
+      \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt is not enabled.
+      \return             1  Interrupt is enabled.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
+    /**
+      \brief   Disable Interrupt
+      \details Disables a device specific interrupt in the NVIC interrupt controller.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+            __DSB();
+            __ISB();
+        }
+    }
 
+    /**
+      \brief   Get Pending Interrupt
+      \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not pending.
+      \return             1  Interrupt status is pending.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+    /**
+      \brief   Set Pending Interrupt
+      \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
+    /**
+      \brief   Clear Pending Interrupt
+      \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+      \param [in]      IRQn  Device specific interrupt number.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+        }
+    }
 
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Get Active Interrupt
+      \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+      \param [in]      IRQn  Device specific interrupt number.
+      \return             0  Interrupt status is not active.
+      \return             1  Interrupt status is active.
+      \note    IRQn must not be negative.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            return ((uint32_t)(
+                ((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+        }
+        else {
+            return (0U);
+        }
+    }
 
+    /**
+      \brief   Set Interrupt Priority
+      \details Sets the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]      IRQn  Interrupt number.
+      \param [in]  priority  Priority to set.
+      \note    The priority cannot be set for every processor exception.
+     */
+    __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+    {
+        if ((int32_t)(IRQn) >= 0) {
+            NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+        else {
+            SCB->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] =
+                (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+        }
+    }
 
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
+    /**
+      \brief   Get Interrupt Priority
+      \details Reads the priority of a device specific interrupt or a processor exception.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn  Interrupt number.
+      \return             Interrupt Priority.
+                          Value is aligned automatically to the implemented priority bits of the microcontroller.
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+    {
 
+        if ((int32_t)(IRQn) >= 0) {
+            return (((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+        }
+        else {
+            return (((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL) - 4UL] >> (8U - __NVIC_PRIO_BITS)));
+        }
+    }
 
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Encode Priority
+      \details Encodes the priority for an interrupt with the given priority group,
+               preemptive priority value, and subpriority value.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+      \param [in]     PriorityGroup  Used priority group.
+      \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+      \param [in]       SubPriority  Subpriority value (starting from 0).
+      \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+     */
+    __STATIC_INLINE uint32_t NVIC_EncodePriority(uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+    {
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
+        uint32_t PreemptPriorityBits;
+        uint32_t SubPriorityBits;
 
+        PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS))
+                                  ? (uint32_t)(__NVIC_PRIO_BITS)
+                                  : (uint32_t)(7UL - PriorityGroupTmp);
+        SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL)
+                              ? (uint32_t)0UL
+                              : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+        return (((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+                ((SubPriority & (uint32_t)((1UL << (SubPriorityBits)) - 1UL))));
+    }
 
+    /**
+      \brief   Decode Priority
+      \details Decodes an interrupt priority value with a given priority group to
+               preemptive priority value and subpriority value.
+               In case of a conflict between priority grouping and available
+               priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+      \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+      \param [in]     PriorityGroup  Used priority group.
+      \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+      \param [out]     pSubPriority  Subpriority value (starting from 0).
+     */
+    __STATIC_INLINE void NVIC_DecodePriority(uint32_t Priority,
+                                             uint32_t PriorityGroup,
+                                             uint32_t *const pPreemptPriority,
+                                             uint32_t *const pSubPriority)
+    {
+        uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used          */
+        uint32_t PreemptPriorityBits;
+        uint32_t SubPriorityBits;
 
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
+        PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS))
+                                  ? (uint32_t)(__NVIC_PRIO_BITS)
+                                  : (uint32_t)(7UL - PriorityGroupTmp);
+        SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL)
+                              ? (uint32_t)0UL
+                              : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 
+        *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+        *pSubPriority     = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL);
+    }
 
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
+    /**
+      \brief   Set Interrupt Vector
+      \details Sets an interrupt vector in SRAM based interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+               VTOR must been relocated to SRAM before.
+      \param [in]   IRQn      Interrupt number
+      \param [in]   vector    Address of interrupt handler function
+     */
+    __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+    {
+        uint32_t *vectors                             = (uint32_t *)SCB->VTOR;
+        vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+    }
 
+    /**
+      \brief   Get Interrupt Vector
+      \details Reads an interrupt vector from interrupt vector table.
+               The interrupt number can be positive to specify a device specific interrupt,
+               or negative to specify a processor exception.
+      \param [in]   IRQn      Interrupt number.
+      \return                 Address of interrupt handler function
+     */
+    __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+    {
+        uint32_t *vectors = (uint32_t *)SCB->VTOR;
+        return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+    }
 
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
+    /**
+      \brief   System Reset
+      \details Initiates a system reset request to reset the MCU.
+     */
+    __STATIC_INLINE void __NVIC_SystemReset(void)
+    {
+        __DSB(); /* Ensure all outstanding memory accesses included
+                    buffered write are completed before reset */
+        SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                                SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
+        __DSB();                                            /* Ensure completion of memory access */
 
+        for (;;) /* wait until reset */
+        {
+            __NOP();
+        }
+    }
 
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
+    /*@} end of CMSIS_Core_NVICFunctions */
 
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
+    /* ##########################  MPU functions  #################################### */
 
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
 
 #include "mpu_armv7.h"
 
 #endif
 
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
+    /* ##########################  FPU functions  #################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_FpuFunctions FPU Functions
+      \brief    Function that provides FPU type.
+      @{
+     */
 
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = SCB->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
+    /**
+      \brief   get FPU type
+      \details returns the FPU type
+      \returns
+       - \b  0: No FPU
+       - \b  1: Single precision FPU
+       - \b  2: Double + Single precision FPU
+     */
+    __STATIC_INLINE uint32_t SCB_GetFPUType(void)
+    {
+        uint32_t mvfr0;
 
+        mvfr0 = SCB->MVFR0;
+        if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) {
+            return 2U; /* Double + Single precision FPU */
+        }
+        else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) {
+            return 1U; /* Single precision FPU */
+        }
+        else {
+            return 0U; /* No FPU */
+        }
+    }
 
 /*@} end of CMSIS_Core_FpuFunctions */
 
-
-
 /* ##########################  Cache functions  #################################### */
 /**
   \ingroup  CMSIS_Core_FunctionInterface
@@ -2208,449 +2178,422 @@ __STATIC_INLINE uint32_t SCB_GetFPUType(void)
  */
 
 /* Cache Size ID Register Macros */
-#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
-#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
+#define CCSIDR_WAYS(x) (((x)&SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
+#define CCSIDR_SETS(x) (((x)&SCB_CCSIDR_NUMSETS_Msk) >> SCB_CCSIDR_NUMSETS_Pos)
 
-
-/**
-  \brief   Enable I-Cache
-  \details Turns on I-Cache
-  */
-__STATIC_INLINE void SCB_EnableICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    __DSB();
-    __ISB();
-    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable I-Cache
-  \details Turns off I-Cache
-  */
-__STATIC_INLINE void SCB_DisableICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate I-Cache
-  \details Invalidates I-Cache
-  */
-__STATIC_INLINE void SCB_InvalidateICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Enable D-Cache
-  \details Turns on D-Cache
-  */
-__STATIC_INLINE void SCB_EnableDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-    __DSB();
-
-    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable D-Cache
-  \details Turns off D-Cache
-  */
-__STATIC_INLINE void SCB_DisableDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    register uint32_t ccsidr;
-    register uint32_t sets;
-    register uint32_t ways;
-
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-    __DSB();
-
-    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate D-Cache
-  \details Invalidates D-Cache
-  */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean D-Cache
-  \details Cleans D-Cache
-  */
-__STATIC_INLINE void SCB_CleanDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-     SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-   __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
-                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean & Invalidate D-Cache
-  \details Cleans and Invalidates D-Cache
-  */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Invalidate by address
-  \details Invalidates D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t)addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+    /**
+      \brief   Enable I-Cache
+      \details Turns on I-Cache
+      */
+    __STATIC_INLINE void SCB_EnableICache(void)
+    {
+#if defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+        __DSB();
+        __ISB();
+        SCB->ICIALLU = 0UL; /* invalidate I-Cache */
+        __DSB();
+        __ISB();
+        SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
+        __DSB();
+        __ISB();
+#endif
     }
 
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean by address
-  \details Cleans D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+    /**
+      \brief   Disable I-Cache
+      \details Turns off I-Cache
+      */
+    __STATIC_INLINE void SCB_DisableICache(void)
+    {
+#if defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+        __DSB();
+        __ISB();
+        SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
+        SCB->ICIALLU = 0UL;                    /* invalidate I-Cache */
+        __DSB();
+        __ISB();
+#endif
     }
 
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean and Invalidate by address
-  \details Cleans and invalidates D_Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+    /**
+      \brief   Invalidate I-Cache
+      \details Invalidates I-Cache
+      */
+    __STATIC_INLINE void SCB_InvalidateICache(void)
+    {
+#if defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+        __DSB();
+        __ISB();
+        SCB->ICIALLU = 0UL;
+        __DSB();
+        __ISB();
+#endif
     }
 
-    __DSB();
-    __ISB();
-  #endif
-}
+    /**
+      \brief   Enable D-Cache
+      \details Turns on D-Cache
+      */
+    __STATIC_INLINE void SCB_EnableDCache(void)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        uint32_t ccsidr;
+        uint32_t sets;
+        uint32_t ways;
 
+        SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
+        __DSB();
 
-/*@} end of CMSIS_Core_CacheFunctions */
+        ccsidr = SCB->CCSIDR;
 
+        /* invalidate D-Cache */
+        sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+        do {
+            ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+            do {
+                SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                              ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk));
+#if defined(__CC_ARM)
+                __schedule_barrier();
+#endif
+            } while (ways-- != 0U);
+        } while (sets-- != 0U);
+        __DSB();
 
+        SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
 
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
+        __DSB();
+        __ISB();
+#endif
+    }
 
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+    /**
+      \brief   Disable D-Cache
+      \details Turns off D-Cache
+      */
+    __STATIC_INLINE void SCB_DisableDCache(void)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        register uint32_t ccsidr;
+        register uint32_t sets;
+        register uint32_t ways;
 
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
+        SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
+        __DSB();
 
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
+        SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
+        __DSB();
+
+        ccsidr = SCB->CCSIDR;
+
+        /* clean & invalidate D-Cache */
+        sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+        do {
+            ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+            do {
+                SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                               ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk));
+#if defined(__CC_ARM)
+                __schedule_barrier();
+#endif
+            } while (ways-- != 0U);
+        } while (sets-- != 0U);
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   Invalidate D-Cache
+      \details Invalidates D-Cache
+      */
+    __STATIC_INLINE void SCB_InvalidateDCache(void)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        uint32_t ccsidr;
+        uint32_t sets;
+        uint32_t ways;
+
+        SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
+        __DSB();
+
+        ccsidr = SCB->CCSIDR;
+
+        /* invalidate D-Cache */
+        sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+        do {
+            ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+            do {
+                SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                              ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk));
+#if defined(__CC_ARM)
+                __schedule_barrier();
+#endif
+            } while (ways-- != 0U);
+        } while (sets-- != 0U);
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   Clean D-Cache
+      \details Cleans D-Cache
+      */
+    __STATIC_INLINE void SCB_CleanDCache(void)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        uint32_t ccsidr;
+        uint32_t sets;
+        uint32_t ways;
+
+        SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
+        __DSB();
+
+        ccsidr = SCB->CCSIDR;
+
+        /* clean D-Cache */
+        sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+        do {
+            ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+            do {
+                SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
+                              ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk));
+#if defined(__CC_ARM)
+                __schedule_barrier();
+#endif
+            } while (ways-- != 0U);
+        } while (sets-- != 0U);
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   Clean & Invalidate D-Cache
+      \details Cleans and Invalidates D-Cache
+      */
+    __STATIC_INLINE void SCB_CleanInvalidateDCache(void)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        uint32_t ccsidr;
+        uint32_t sets;
+        uint32_t ways;
+
+        SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
+        __DSB();
+
+        ccsidr = SCB->CCSIDR;
+
+        /* clean & invalidate D-Cache */
+        sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+        do {
+            ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+            do {
+                SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                               ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk));
+#if defined(__CC_ARM)
+                __schedule_barrier();
+#endif
+            } while (ways-- != 0U);
+        } while (sets-- != 0U);
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   D-Cache Invalidate by address
+      \details Invalidates D-Cache for the given address
+      \param[in]   addr    address (aligned to 32-byte boundary)
+      \param[in]   dsize   size of memory block (in number of bytes)
+    */
+    __STATIC_INLINE void SCB_InvalidateDCache_by_Addr(uint32_t *addr, int32_t dsize)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        int32_t op_size  = dsize;
+        uint32_t op_addr = (uint32_t)addr;
+        int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+
+        __DSB();
+
+        while (op_size > 0) {
+            SCB->DCIMVAC = op_addr;
+            op_addr += (uint32_t)linesize;
+            op_size -= linesize;
+        }
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   D-Cache Clean by address
+      \details Cleans D-Cache for the given address
+      \param[in]   addr    address (aligned to 32-byte boundary)
+      \param[in]   dsize   size of memory block (in number of bytes)
+    */
+    __STATIC_INLINE void SCB_CleanDCache_by_Addr(uint32_t *addr, int32_t dsize)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        int32_t op_size  = dsize;
+        uint32_t op_addr = (uint32_t)addr;
+        int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+
+        __DSB();
+
+        while (op_size > 0) {
+            SCB->DCCMVAC = op_addr;
+            op_addr += (uint32_t)linesize;
+            op_size -= linesize;
+        }
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /**
+      \brief   D-Cache Clean and Invalidate by address
+      \details Cleans and invalidates D_Cache for the given address
+      \param[in]   addr    address (aligned to 32-byte boundary)
+      \param[in]   dsize   size of memory block (in number of bytes)
+    */
+    __STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr(uint32_t *addr, int32_t dsize)
+    {
+#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+        int32_t op_size  = dsize;
+        uint32_t op_addr = (uint32_t)addr;
+        int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+
+        __DSB();
+
+        while (op_size > 0) {
+            SCB->DCCIMVAC = op_addr;
+            op_addr += (uint32_t)linesize;
+            op_size -= linesize;
+        }
+
+        __DSB();
+        __ISB();
+#endif
+    }
+
+    /*@} end of CMSIS_Core_CacheFunctions */
+
+    /* ##################################    SysTick function  ############################################ */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+      \brief    Functions that configure the System.
+      @{
+     */
+
+#if defined(__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+    /**
+      \brief   System Tick Configuration
+      \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+               Counter is in free running mode to generate periodic interrupts.
+      \param [in]  ticks  Number of ticks between two interrupts.
+      \return          0  Function succeeded.
+      \return          1  Function failed.
+      \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+               function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+               must contain a vendor-specific implementation of this function.
+     */
+    __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+    {
+        if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {
+            return (1UL); /* Reload value impossible */
+        }
+
+        SysTick->LOAD = (uint32_t)(ticks - 1UL);                         /* set reload register */
+        NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+        SysTick->VAL  = 0UL;                                             /* Load the SysTick Counter Value */
+        SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk |
+                        SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+        return (0UL);                            /* Function successful */
+    }
 
 #endif
 
-/*@} end of CMSIS_Core_SysTickFunctions */
+    /*@} end of CMSIS_Core_SysTickFunctions */
 
+    /* ##################################### Debug In/Output function ########################################### */
+    /**
+      \ingroup  CMSIS_Core_FunctionInterface
+      \defgroup CMSIS_core_DebugFunctions ITM Functions
+      \brief    Functions that access the ITM debug interface.
+      @{
+     */
 
+    extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY                                                                                             \
+    ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
+    /**
+      \brief   ITM Send Character
+      \details Transmits a character via the ITM channel 0, and
+               \li Just returns when no debugger is connected that has booked the output.
+               \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+      \param [in]     ch  Character to transmit.
+      \returns            Character to transmit.
+     */
+    __STATIC_INLINE uint32_t ITM_SendChar(uint32_t ch)
     {
-      __NOP();
+        if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
+            ((ITM->TER & 1UL) != 0UL))                  /* ITM Port #0 enabled */
+        {
+            while (ITM->PORT[0U].u32 == 0UL) {
+                __NOP();
+            }
+            ITM->PORT[0U].u8 = (uint8_t)ch;
+        }
+        return (ch);
     }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
 
+    /**
+      \brief   ITM Receive Character
+      \details Inputs a character via the external variable \ref ITM_RxBuffer.
+      \return             Received character.
+      \return         -1  No character pending.
+     */
+    __STATIC_INLINE int32_t ITM_ReceiveChar(void)
+    {
+        int32_t ch = -1; /* no character available */
 
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
+        if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+            ch           = ITM_RxBuffer;
+            ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+        }
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
+        return (ch);
+    }
 
+    /**
+      \brief   ITM Check Character
+      \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+      \return          0  No character available.
+      \return          1  Character available.
+     */
+    __STATIC_INLINE int32_t ITM_CheckChar(void)
+    {
 
+        if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+            return (0); /* no character available */
+        }
+        else {
+            return (1); /*    character available */
+        }
+    }
 
+    /*@} end of CMSIS_core_DebugFunctions */
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/common/cmsis/mpu_armv7.h b/module-bsp/board/rt1051/common/cmsis/mpu_armv7.h
index aa180c9e5..5e63cea93 100644
--- a/module-bsp/board/rt1051/common/cmsis/mpu_armv7.h
+++ b/module-bsp/board/rt1051/common/cmsis/mpu_armv7.h
@@ -21,46 +21,46 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
- 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
+
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
- 
+
 #ifndef ARM_MPU_ARMV7_H
 #define ARM_MPU_ARMV7_H
 
-#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U)
-#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U)
-#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U)
-#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U)
-#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U)
-#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U)
-#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU)
-#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU)
-#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU)
-#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU)
-#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU)
-#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU)
-#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U)
-#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U)
-#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U)
-#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U)
-#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U)
-#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U)
-#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U)
-#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U)
-#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U)
-#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U)
-#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU)
-#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU)
-#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU)
-#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU)
-#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU)
-#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU)
+#define ARM_MPU_REGION_SIZE_32B   ((uint8_t)0x04U)
+#define ARM_MPU_REGION_SIZE_64B   ((uint8_t)0x05U)
+#define ARM_MPU_REGION_SIZE_128B  ((uint8_t)0x06U)
+#define ARM_MPU_REGION_SIZE_256B  ((uint8_t)0x07U)
+#define ARM_MPU_REGION_SIZE_512B  ((uint8_t)0x08U)
+#define ARM_MPU_REGION_SIZE_1KB   ((uint8_t)0x09U)
+#define ARM_MPU_REGION_SIZE_2KB   ((uint8_t)0x0AU)
+#define ARM_MPU_REGION_SIZE_4KB   ((uint8_t)0x0BU)
+#define ARM_MPU_REGION_SIZE_8KB   ((uint8_t)0x0CU)
+#define ARM_MPU_REGION_SIZE_16KB  ((uint8_t)0x0DU)
+#define ARM_MPU_REGION_SIZE_32KB  ((uint8_t)0x0EU)
+#define ARM_MPU_REGION_SIZE_64KB  ((uint8_t)0x0FU)
+#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
+#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
+#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
+#define ARM_MPU_REGION_SIZE_1MB   ((uint8_t)0x13U)
+#define ARM_MPU_REGION_SIZE_2MB   ((uint8_t)0x14U)
+#define ARM_MPU_REGION_SIZE_4MB   ((uint8_t)0x15U)
+#define ARM_MPU_REGION_SIZE_8MB   ((uint8_t)0x16U)
+#define ARM_MPU_REGION_SIZE_16MB  ((uint8_t)0x17U)
+#define ARM_MPU_REGION_SIZE_32MB  ((uint8_t)0x18U)
+#define ARM_MPU_REGION_SIZE_64MB  ((uint8_t)0x19U)
+#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU)
+#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU)
+#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU)
+#define ARM_MPU_REGION_SIZE_1GB   ((uint8_t)0x1DU)
+#define ARM_MPU_REGION_SIZE_2GB   ((uint8_t)0x1EU)
+#define ARM_MPU_REGION_SIZE_4GB   ((uint8_t)0x1FU)
 
-#define ARM_MPU_AP_NONE 0U 
+#define ARM_MPU_AP_NONE 0U
 #define ARM_MPU_AP_PRIV 1U
 #define ARM_MPU_AP_URO  2U
 #define ARM_MPU_AP_FULL 3U
@@ -68,130 +68,125 @@
 #define ARM_MPU_AP_RO   6U
 
 /** MPU Region Base Address Register Value
-*
-* \param Region The region to be configured, number 0 to 15.
-* \param BaseAddress The base address for the region.
-*/
-#define ARM_MPU_RBAR(Region, BaseAddress) \
-  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
-   ((Region) & MPU_RBAR_REGION_Msk)    |  \
-   (MPU_RBAR_VALID_Msk))
+ *
+ * \param Region The region to be configured, number 0 to 15.
+ * \param BaseAddress The base address for the region.
+ */
+#define ARM_MPU_RBAR(Region, BaseAddress)                                                                              \
+    (((BaseAddress)&MPU_RBAR_ADDR_Msk) | ((Region)&MPU_RBAR_REGION_Msk) | (MPU_RBAR_VALID_Msk))
 
 /**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/                         
-#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
-  ((((DisableExec     ) << MPU_RASR_XN_Pos)     & MPU_RASR_XN_Msk)     | \
-   (((AccessPermission) << MPU_RASR_AP_Pos)     & MPU_RASR_AP_Msk)     | \
-   (((TypeExtField    ) << MPU_RASR_TEX_Pos)    & MPU_RASR_TEX_Msk)    | \
-   (((IsShareable     ) << MPU_RASR_S_Pos)      & MPU_RASR_S_Msk)      | \
-   (((IsCacheable     ) << MPU_RASR_C_Pos)      & MPU_RASR_C_Msk)      | \
-   (((IsBufferable    ) << MPU_RASR_B_Pos)      & MPU_RASR_B_Msk)      | \
-   (((SubRegionDisable) << MPU_RASR_SRD_Pos)    & MPU_RASR_SRD_Msk)    | \
-   (((Size            ) << MPU_RASR_SIZE_Pos)   & MPU_RASR_SIZE_Msk)   | \
-   (MPU_RASR_ENABLE_Msk))
-
+ * MPU Region Attribute and Size Register Value
+ *
+ * \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
+ * \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged
+ * mode. \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly
+ * ordered, peripheral. \param IsShareable       Region is shareable between multiple bus masters. \param IsCacheable
+ * Region is cacheable, i.e. its value may be kept in cache. \param IsBufferable      Region is bufferable, i.e. using
+ * write-back caching. Cacheable but non-bufferable regions use write-through policy. \param SubRegionDisable Sub-region
+ * disable field. \param Size              Region size of the region to be configured, for example 4K, 8K.
+ */
+#define ARM_MPU_RASR(                                                                                                  \
+    DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size)       \
+    ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) |                                                          \
+     (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) |                                                     \
+     (((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) |                                                       \
+     (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) |     \
+     (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk) |                                                           \
+     (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) |                                                   \
+     (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | (MPU_RASR_ENABLE_Msk))
 
 /**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR; //!< The region base address register value (RBAR)
-  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
+ * Struct for a single MPU Region
+ */
+typedef struct
+{
+    uint32_t RBAR; //!< The region base address register value (RBAR)
+    uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
 } ARM_MPU_Region_t;
-    
+
 /** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
+ * \param MPU_Control Default access permissions for unconfigured regions.
+ */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+    __DSB();
+    __ISB();
+    MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
 }
 
 /** Disable the MPU.
-*/
+ */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+    __DSB();
+    __ISB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+    MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
 }
 
 /** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
+ * \param rnr Region number to be cleared.
+ */
 __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
 {
-  MPU->RNR = rnr;
-  MPU->RASR = 0U;
+    MPU->RNR  = rnr;
+    MPU->RASR = 0U;
 }
 
 /** Configure an MPU region.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
+ * \param rbar Value for RBAR register.
+ * \param rsar Value for RSAR register.
+ */
 __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
 {
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
+    MPU->RBAR = rbar;
+    MPU->RASR = rasr;
 }
 
 /** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
+ * \param rnr Region number to be configured.
+ * \param rbar Value for RBAR register.
+ * \param rsar Value for RSAR register.
+ */
 __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
 {
-  MPU->RNR = rnr;
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
+    MPU->RNR  = rnr;
+    MPU->RBAR = rbar;
+    MPU->RASR = rasr;
 }
 
 /** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+ * \param dst Destination data is copied to.
+ * \param src Source data is copied from.
+ * \param len Amount of data words to be copied.
+ */
+__STATIC_INLINE void orderedCpy(volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len)
 {
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
+    uint32_t i;
+    for (i = 0U; i < len; ++i) {
+        dst[i] = src[i];
+    }
 }
 
 /** Load the given number of MPU regions from a table.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
+ * \param table Pointer to the MPU configuration table.
+ * \param cnt Amount of regions to be configured.
+ */
+__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const *table, uint32_t cnt)
 {
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  while (cnt > MPU_TYPE_RALIASES) {
-    orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
-    table += MPU_TYPE_RALIASES;
-    cnt -= MPU_TYPE_RALIASES;
-  }
-  orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+    const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t) / 4U;
+    while (cnt > MPU_TYPE_RALIASES) {
+        orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES * rowWordSize);
+        table += MPU_TYPE_RALIASES;
+        cnt -= MPU_TYPE_RALIASES;
+    }
+    orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt * rowWordSize);
 }
 
 #endif
diff --git a/module-bsp/board/rt1051/common/cmsis/mpu_armv8.h b/module-bsp/board/rt1051/common/cmsis/mpu_armv8.h
index 0ccfc74fe..54ada6af6 100644
--- a/module-bsp/board/rt1051/common/cmsis/mpu_armv8.h
+++ b/module-bsp/board/rt1051/common/cmsis/mpu_armv8.h
@@ -22,50 +22,49 @@
  * limitations under the License.
  */
 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
+#if defined(__ICCARM__)
+#pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__clang__)
+#pragma clang system_header /* treat file as system include file */
 #endif
 
 #ifndef ARM_MPU_ARMV8_H
 #define ARM_MPU_ARMV8_H
 
 /** \brief Attribute for device memory (outer only) */
-#define ARM_MPU_ATTR_DEVICE                           ( 0U )
+#define ARM_MPU_ATTR_DEVICE (0U)
 
 /** \brief Attribute for non-cacheable, normal memory */
-#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
+#define ARM_MPU_ATTR_NON_CACHEABLE (4U)
 
 /** \brief Attribute for normal memory (outer and inner)
-* \param NT Non-Transient: Set to 1 for non-transient data.
-* \param WB Write-Back: Set to 1 to use write-back update policy.
-* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
-* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
-*/
-#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
-  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
+ * \param NT Non-Transient: Set to 1 for non-transient data.
+ * \param WB Write-Back: Set to 1 to use write-back update policy.
+ * \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
+ * \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
+ */
+#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
 
 /** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
 #define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
 
 /** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
+#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
 
 /** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
+#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
 
 /** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
+#define ARM_MPU_ATTR_DEVICE_GRE (3U)
 
 /** \brief Memory Attribute
-* \param O Outer memory attributes
-* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
-*/
+ * \param O Outer memory attributes
+ * \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
+ */
 #define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
 
 /** \brief Normal memory non-shareable  */
-#define ARM_MPU_SH_NON   (0U)
+#define ARM_MPU_SH_NON (0U)
 
 /** \brief Normal memory outer shareable  */
 #define ARM_MPU_SH_OUTER (2U)
@@ -74,260 +73,255 @@
 #define ARM_MPU_SH_INNER (3U)
 
 /** \brief Memory access permissions
-* \param RO Read-Only: Set to 1 for read-only memory.
-* \param NP Non-Privileged: Set to 1 for non-privileged memory.
-*/
+ * \param RO Read-Only: Set to 1 for read-only memory.
+ * \param NP Non-Privileged: Set to 1 for non-privileged memory.
+ */
 #define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
 
 /** \brief Region Base Address Register value
-* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
-* \param SH Defines the Shareability domain for this memory region.
-* \param RO Read-Only: Set to 1 for a read-only memory region.
-* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
-*/
-#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
-  ((BASE & MPU_RBAR_BASE_Pos) | \
-  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
-  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
-  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
+ * \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32
+ * byte aligned. \param SH Defines the Shareability domain for this memory region. \param RO Read-Only: Set to 1 for a
+ * read-only memory region. \param NP Non-Privileged: Set to 1 for a non-privileged memory region. \oaram XN eXecute
+ * Never: Set to 1 for a non-executable memory region.
+ */
+#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN)                                                                             \
+    ((BASE & MPU_RBAR_BASE_Pos) | ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) |                                        \
+     ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
 
 /** \brief Region Limit Address Register value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR(LIMIT, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
+ * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+ * \param IDX The attribute index to be associated with this memory region.
+ */
+#define ARM_MPU_RLAR(LIMIT, IDX)                                                                                       \
+    ((LIMIT & MPU_RLAR_LIMIT_Msk) | ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | (MPU_RLAR_EN_Msk))
 
 /**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR;                   /*!< Region Base Address Register value */
-  uint32_t RLAR;                   /*!< Region Limit Address Register value */
+ * Struct for a single MPU Region
+ */
+typedef struct
+{
+    uint32_t RBAR; /*!< Region Base Address Register value */
+    uint32_t RLAR; /*!< Region Limit Address Register value */
 } ARM_MPU_Region_t;
-    
+
 /** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
+ * \param MPU_Control Default access permissions for unconfigured regions.
+ */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+    __DSB();
+    __ISB();
+    MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
 }
 
 /** Disable the MPU.
-*/
+ */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+    __DSB();
+    __ISB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+    MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
 }
 
 #ifdef MPU_NS
 /** Enable the Non-secure MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
+ * \param MPU_Control Default access permissions for unconfigured regions.
+ */
 __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
-  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+    __DSB();
+    __ISB();
+    MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
 }
 
 /** Disable the Non-secure MPU.
-*/
+ */
 __STATIC_INLINE void ARM_MPU_Disable_NS(void)
 {
-  __DSB();
-  __ISB();
+    __DSB();
+    __ISB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+    SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
-  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+    MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
 }
 #endif
 
 /** Set the memory attribute encoding to the given MPU.
-* \param mpu Pointer to the MPU to be configured.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
+ * \param mpu Pointer to the MPU to be configured.
+ * \param idx The attribute index to be set [0-7]
+ * \param attr The attribute value to be set.
+ */
+__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type *mpu, uint8_t idx, uint8_t attr)
 {
-  const uint8_t reg = idx / 4U;
-  const uint32_t pos = ((idx % 4U) * 8U);
-  const uint32_t mask = 0xFFU << pos;
-  
-  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
-    return; // invalid index
-  }
-  
-  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
+    const uint8_t reg   = idx / 4U;
+    const uint32_t pos  = ((idx % 4U) * 8U);
+    const uint32_t mask = 0xFFU << pos;
+
+    if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
+        return; // invalid index
+    }
+
+    mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
 }
 
 /** Set the memory attribute encoding.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
+ * \param idx The attribute index to be set [0-7]
+ * \param attr The attribute value to be set.
+ */
 __STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
 {
-  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
+    ARM_MPU_SetMemAttrEx(MPU, idx, attr);
 }
 
 #ifdef MPU_NS
 /** Set the memory attribute encoding to the Non-secure MPU.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
+ * \param idx The attribute index to be set [0-7]
+ * \param attr The attribute value to be set.
+ */
 __STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
 {
-  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
+    ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
 }
 #endif
 
 /** Clear and disable the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
+ * \param mpu Pointer to MPU to be used.
+ * \param rnr Region number to be cleared.
+ */
+__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type *mpu, uint32_t rnr)
 {
-  mpu->RNR = rnr;
-  mpu->RLAR = 0U;
+    mpu->RNR  = rnr;
+    mpu->RLAR = 0U;
 }
 
 /** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
+ * \param rnr Region number to be cleared.
+ */
 __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
 {
-  ARM_MPU_ClrRegionEx(MPU, rnr);
+    ARM_MPU_ClrRegionEx(MPU, rnr);
 }
 
 #ifdef MPU_NS
 /** Clear and disable the given Non-secure MPU region.
-* \param rnr Region number to be cleared.
-*/
+ * \param rnr Region number to be cleared.
+ */
 __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
-  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
+{
+    ARM_MPU_ClrRegionEx(MPU_NS, rnr);
 }
 #endif
 
 /** Configure the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
+ * \param mpu Pointer to MPU to be used.
+ * \param rnr Region number to be configured.
+ * \param rbar Value for RBAR register.
+ * \param rlar Value for RLAR register.
+ */
+__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
-  mpu->RNR = rnr;
-  mpu->RBAR = rbar;
-  mpu->RLAR = rlar;
+    mpu->RNR  = rnr;
+    mpu->RBAR = rbar;
+    mpu->RLAR = rlar;
 }
 
 /** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
+ * \param rnr Region number to be configured.
+ * \param rbar Value for RBAR register.
+ * \param rlar Value for RLAR register.
+ */
 __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
-  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
+    ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
 }
 
 #ifdef MPU_NS
 /** Configure the given Non-secure MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
+ * \param rnr Region number to be configured.
+ * \param rbar Value for RBAR register.
+ * \param rlar Value for RLAR register.
+ */
 __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
+    ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
 }
 #endif
 
 /** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+ * \param dst Destination data is copied to.
+ * \param src Source data is copied from.
+ * \param len Amount of data words to be copied.
+ */
+__STATIC_INLINE void orderedCpy(volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len)
 {
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
+    uint32_t i;
+    for (i = 0U; i < len; ++i) {
+        dst[i] = src[i];
+    }
 }
 
 /** Load the given number of MPU regions from a table to the given MPU.
-* \param mpu Pointer to the MPU registers to be used.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+ * \param mpu Pointer to the MPU registers to be used.
+ * \param rnr First region number to be configured.
+ * \param table Pointer to the MPU configuration table.
+ * \param cnt Amount of regions to be configured.
+ */
+__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type *mpu, uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
 {
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  if (cnt == 1U) {
-    mpu->RNR = rnr;
-    orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
-  } else {
-    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
-    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
-    mpu->RNR = rnrBase;
-    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
-      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
-      table += c;
-      cnt -= c;
-      rnrOffset = 0U;
-      rnrBase += MPU_TYPE_RALIASES;
-      mpu->RNR = rnrBase;
+    const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t) / 4U;
+    if (cnt == 1U) {
+        mpu->RNR = rnr;
+        orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
+    }
+    else {
+        uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES - 1U);
+        uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
+
+        mpu->RNR = rnrBase;
+        while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
+            uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
+            orderedCpy(&(mpu->RBAR) + (rnrOffset * 2U), &(table->RBAR), c * rowWordSize);
+            table += c;
+            cnt -= c;
+            rnrOffset = 0U;
+            rnrBase += MPU_TYPE_RALIASES;
+            mpu->RNR = rnrBase;
+        }
+
+        orderedCpy(&(mpu->RBAR) + (rnrOffset * 2U), &(table->RBAR), cnt * rowWordSize);
     }
-    
-    orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
-  }
 }
 
 /** Load the given number of MPU regions from a table.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+ * \param rnr First region number to be configured.
+ * \param table Pointer to the MPU configuration table.
+ * \param cnt Amount of regions to be configured.
+ */
+__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
 {
-  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
+    ARM_MPU_LoadEx(MPU, rnr, table, cnt);
 }
 
 #ifdef MPU_NS
 /** Load the given number of MPU regions from a table to the Non-secure MPU.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+ * \param rnr First region number to be configured.
+ * \param table Pointer to the MPU configuration table.
+ * \param cnt Amount of regions to be configured.
+ */
+__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt)
 {
-  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
+    ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
 }
 #endif
 
 #endif
-
diff --git a/module-bsp/board/rt1051/common/dma_config.h b/module-bsp/board/rt1051/common/dma_config.h
index 6321b7103..76e78adfc 100644
--- a/module-bsp/board/rt1051/common/dma_config.h
+++ b/module-bsp/board/rt1051/common/dma_config.h
@@ -10,72 +10,72 @@
 #define MODULE_BSP_BOARD_RT1051_EINK_DMA_CONFIG_H_
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 /*
  *   **********************************************************************************************************************
- *   *                                                                                                                    *
- *   *                                              DMA FOR EINK                                                          *
- *   *                                                                                                                    *
+ *   * *
+ *   *                                              DMA FOR EINK *
+ *   * *
  *   **********************************************************************************************************************
  */
 
 /**
  *   Eink SPI TX DMA config
  */
-#define BSP_EINK_LPSPI_DMA_TX_DMAMUX_BASE               DMAMUX
-#define BSP_EINK_LPSPI_DMA_TX_DMA_BASE                  DMA0
-#define BSP_EINK_LPSPI_DMA_TX_PERI_SEL                  (uint8_t) kDmaRequestMuxLPSPI1Tx
-#define BSP_EINK_LPSPI_DMA_TX_CH                        0
+#define BSP_EINK_LPSPI_DMA_TX_DMAMUX_BASE DMAMUX
+#define BSP_EINK_LPSPI_DMA_TX_DMA_BASE    DMA0
+#define BSP_EINK_LPSPI_DMA_TX_PERI_SEL    (uint8_t) kDmaRequestMuxLPSPI1Tx
+#define BSP_EINK_LPSPI_DMA_TX_CH          0
 
 /**
  *   Eink SPI RX DMA config
  */
-#define BSP_EINK_LPSPI_DMA_RX_DMAMUX_BASE               DMAMUX
-#define BSP_EINK_LPSPI_DMA_RX_DMA_BASE                  DMA0
-#define BSP_EINK_LPSPI_DMA_RX_PERI_SEL                  (uint8_t) kDmaRequestMuxLPSPI1Rx
-#define BSP_EINK_LPSPI_DMA_RX_CH                        1
+#define BSP_EINK_LPSPI_DMA_RX_DMAMUX_BASE DMAMUX
+#define BSP_EINK_LPSPI_DMA_RX_DMA_BASE    DMA0
+#define BSP_EINK_LPSPI_DMA_RX_PERI_SEL    (uint8_t) kDmaRequestMuxLPSPI1Rx
+#define BSP_EINK_LPSPI_DMA_RX_CH          1
+
+    /*
+     *   **********************************************************************************************************************
+     *   * *
+     *   *                                              DMA FOR CELLULAR *
+     *   * *
+     *   **********************************************************************************************************************
+     */
+
+    /* DMA */
+
+#define BSP_CELLULAR_AUDIO_SAIx_DMA_TX_SOURCE kDmaRequestMuxSai1Tx
+#define BSP_CELLULAR_AUDIO_SAIx_DMA_RX_SOURCE kDmaRequestMuxSai1Rx
 
 /*
  *   **********************************************************************************************************************
- *   *                                                                                                                    *
- *   *                                              DMA FOR CELLULAR                                                      *
- *   *                                                                                                                    *
+ *   * *
+ *   *                                              DMA FOR AUDIOCODEC *
+ *   * *
  *   **********************************************************************************************************************
  */
-
-/* DMA */
-
-#define BSP_CELLULAR_AUDIO_SAIx_DMA_TX_SOURCE	            kDmaRequestMuxSai1Tx
-#define BSP_CELLULAR_AUDIO_SAIx_DMA_RX_SOURCE         	kDmaRequestMuxSai1Rx
-
+#define BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE kDmaRequestMuxSai2Tx
+#define BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE kDmaRequestMuxSai2Rx
 
 /*
  *   **********************************************************************************************************************
- *   *                                                                                                                    *
- *   *                                              DMA FOR AUDIOCODEC                                                    *
- *   *                                                                                                                    *
+ *   * *
+ *   *                                              DMA FOR BLUETOOTH *
+ *   * *
  *   **********************************************************************************************************************
  */
-#define BSP_AUDIOCODEC_SAIx_DMA_TX_SOURCE	kDmaRequestMuxSai2Tx
-#define BSP_AUDIOCODEC_SAIx_DMA_RX_SOURCE	kDmaRequestMuxSai2Rx
+#define BSP_BLUETOOTH_UART_TX_DMA_DMAMUX_BASE DMAMUX
+#define BSP_BLUETOOTH_UART_TX_DMA_BASE        DMA0
+#define BSP_BLUETOOTH_UART_TX_DMA_CH          8
 
-/*
- *   **********************************************************************************************************************
- *   *                                                                                                                    *
- *   *                                              DMA FOR BLUETOOTH                                                     *
- *   *                                                                                                                    *
- *   **********************************************************************************************************************
- */
-#define BSP_BLUETOOTH_UART_TX_DMA_DMAMUX_BASE           DMAMUX
-#define BSP_BLUETOOTH_UART_TX_DMA_BASE                  DMA0
-#define BSP_BLUETOOTH_UART_TX_DMA_CH                    8
-
-/**
- * @brief This function initializes the entire DMA peripheral
- */
-void BOARD_InitDMA();
+    /**
+     * @brief This function initializes the entire DMA peripheral
+     */
+    void BOARD_InitDMA();
 
 #ifdef __cplusplus
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.c
index d3cdb6f64..6a14263d3 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.adc_12b1msps_sar"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -67,10 +66,8 @@ static uint32_t ADC_GetInstance(ADC_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_adcBases); instance++)
-    {
-        if (s_adcBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_adcBases); instance++) {
+        if (s_adcBases[instance] == base) {
             break;
         }
     }
@@ -92,32 +89,26 @@ void ADC_Init(ADC_Type *base, const adc_config_t *config)
     tmp32 = base->CFG & (ADC_CFG_AVGS_MASK | ADC_CFG_ADTRG_MASK); /* Reserve AVGS and ADTRG bits. */
     tmp32 |= ADC_CFG_REFSEL(config->referenceVoltageSource) | ADC_CFG_ADSTS(config->samplePeriodMode) |
              ADC_CFG_ADICLK(config->clockSource) | ADC_CFG_ADIV(config->clockDriver) | ADC_CFG_MODE(config->resolution);
-    if (config->enableOverWrite)
-    {
+    if (config->enableOverWrite) {
         tmp32 |= ADC_CFG_OVWREN_MASK;
     }
-    if (config->enableLongSample)
-    {
+    if (config->enableLongSample) {
         tmp32 |= ADC_CFG_ADLSMP_MASK;
     }
-    if (config->enableLowPower)
-    {
+    if (config->enableLowPower) {
         tmp32 |= ADC_CFG_ADLPC_MASK;
     }
-    if (config->enableHighSpeed)
-    {
+    if (config->enableHighSpeed) {
         tmp32 |= ADC_CFG_ADHSC_MASK;
     }
     base->CFG = tmp32;
 
     /* ADCx_GC  */
     tmp32 = base->GC & ~(ADC_GC_ADCO_MASK | ADC_GC_ADACKEN_MASK);
-    if (config->enableContinuousConversion)
-    {
+    if (config->enableContinuousConversion) {
         tmp32 |= ADC_GC_ADCO_MASK;
     }
-    if (config->enableAsynchronousClockOutput)
-    {
+    if (config->enableAsynchronousClockOutput) {
         tmp32 |= ADC_GC_ADACKEN_MASK;
     }
     base->GC = tmp32;
@@ -134,16 +125,16 @@ void ADC_GetDefaultConfig(adc_config_t *config)
     assert(NULL != config);
 
     config->enableAsynchronousClockOutput = true;
-    config->enableOverWrite = false;
-    config->enableContinuousConversion = false;
-    config->enableHighSpeed = false;
-    config->enableLowPower = false;
-    config->enableLongSample = false;
-    config->referenceVoltageSource = kADC_ReferenceVoltageSourceAlt0;
-    config->samplePeriodMode = kADC_SamplePeriod2or12Clocks;
-    config->clockSource = kADC_ClockSourceAD;
-    config->clockDriver = kADC_ClockDriver1;
-    config->resolution = kADC_Resolution12Bit;
+    config->enableOverWrite               = false;
+    config->enableContinuousConversion    = false;
+    config->enableHighSpeed               = false;
+    config->enableLowPower                = false;
+    config->enableLongSample              = false;
+    config->referenceVoltageSource        = kADC_ReferenceVoltageSourceAlt0;
+    config->samplePeriodMode              = kADC_SamplePeriod2or12Clocks;
+    config->clockSource                   = kADC_ClockSourceAD;
+    config->clockDriver                   = kADC_ClockDriver1;
+    config->resolution                    = kADC_Resolution12Bit;
 }
 
 void ADC_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc_channel_config_t *config)
@@ -154,8 +145,7 @@ void ADC_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc_chann
     uint32_t tmp32;
 
     tmp32 = ADC_HC_ADCH(config->channelNumber);
-    if (config->enableInterruptOnConversionCompleted)
-    {
+    if (config->enableInterruptOnConversionCompleted) {
         tmp32 |= ADC_HC_AIEN_MASK;
     }
     base->HC[channelGroup] = tmp32;
@@ -176,8 +166,7 @@ status_t ADC_DoAutoCalibration(ADC_Type *base)
 
     /* The calibration would be failed when in hardwar mode.
      * Remember the hardware trigger state here and restore it later if the hardware trigger is enabled.*/
-    if (0U != (ADC_CFG_ADTRG_MASK & base->CFG))
-    {
+    if (0U != (ADC_CFG_ADTRG_MASK & base->CFG)) {
         bHWTrigger = true;
         ADC_EnableHardwareTrigger(base, false);
     }
@@ -188,11 +177,9 @@ status_t ADC_DoAutoCalibration(ADC_Type *base)
     base->GC |= ADC_GC_CAL_MASK; /* Launch the calibration. */
 
     /* Check the status of CALF bit in ADC_GS and the CAL bit in ADC_GC. */
-    while (0U != (base->GC & ADC_GC_CAL_MASK))
-    {
+    while (0U != (base->GC & ADC_GC_CAL_MASK)) {
         /* Check the CALF when the calibration is active. */
-        if (0U != (ADC_GetStatusFlags(base) & kADC_CalibrationFailedFlag))
-        {
+        if (0U != (ADC_GetStatusFlags(base) & kADC_CalibrationFailedFlag)) {
             status = kStatus_Fail;
             break;
         }
@@ -213,8 +200,7 @@ status_t ADC_DoAutoCalibration(ADC_Type *base)
 
 #if !(defined(FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE) && FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE)
     /* Restore original trigger mode. */
-    if (true == bHWTrigger)
-    {
+    if (true == bHWTrigger) {
         ADC_EnableHardwareTrigger(base, true);
     }
 #endif
@@ -229,8 +215,7 @@ void ADC_SetOffsetConfig(ADC_Type *base, const adc_offest_config_t *config)
     uint32_t tmp32;
 
     tmp32 = ADC_OFS_OFS(config->offsetValue);
-    if (config->enableSigned)
-    {
+    if (config->enableSigned) {
         tmp32 |= ADC_OFS_SIGN_MASK;
     }
     base->OFS = tmp32;
@@ -250,26 +235,25 @@ void ADC_SetHardwareCompareConfig(ADC_Type *base, const adc_hardware_compare_con
     tmp32 |= ADC_GC_ACFE_MASK;
 
     /* Select the hardware compare working mode. */
-    switch (config->hardwareCompareMode)
-    {
-        case kADC_HardwareCompareMode0:
-            break;
-        case kADC_HardwareCompareMode1:
-            tmp32 |= ADC_GC_ACFGT_MASK;
-            break;
-        case kADC_HardwareCompareMode2:
-            tmp32 |= ADC_GC_ACREN_MASK;
-            break;
-        case kADC_HardwareCompareMode3:
-            tmp32 |= ADC_GC_ACFGT_MASK | ADC_GC_ACREN_MASK;
-            break;
-        default:
-            break;
+    switch (config->hardwareCompareMode) {
+    case kADC_HardwareCompareMode0:
+        break;
+    case kADC_HardwareCompareMode1:
+        tmp32 |= ADC_GC_ACFGT_MASK;
+        break;
+    case kADC_HardwareCompareMode2:
+        tmp32 |= ADC_GC_ACREN_MASK;
+        break;
+    case kADC_HardwareCompareMode3:
+        tmp32 |= ADC_GC_ACFGT_MASK | ADC_GC_ACREN_MASK;
+        break;
+    default:
+        break;
     }
     base->GC = tmp32;
 
     /* Load the compare values. */
-    tmp32 = ADC_CV_CV1(config->value1) | ADC_CV_CV2(config->value2);
+    tmp32    = ADC_CV_CV1(config->value1) | ADC_CV_CV2(config->value2);
     base->CV = tmp32;
 }
 
@@ -277,12 +261,10 @@ void ADC_SetHardwareAverageConfig(ADC_Type *base, adc_hardware_average_mode_t mo
 {
     uint32_t tmp32;
 
-    if (mode == kADC_HardwareAverageDiasable)
-    {
+    if (mode == kADC_HardwareAverageDiasable) {
         base->GC &= ~ADC_GC_AVGE_MASK;
     }
-    else
-    {
+    else {
         tmp32 = base->CFG & ~ADC_CFG_AVGS_MASK;
         tmp32 |= ADC_CFG_AVGS(mode);
         base->CFG = tmp32;
@@ -294,12 +276,10 @@ void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)
 {
     uint32_t tmp32 = 0;
 
-    if (0U != (mask & kADC_CalibrationFailedFlag))
-    {
+    if (0U != (mask & kADC_CalibrationFailedFlag)) {
         tmp32 |= ADC_GS_CALF_MASK;
     }
-    if (0U != (mask & kADC_ConversionActiveFlag))
-    {
+    if (0U != (mask & kADC_ConversionActiveFlag)) {
         tmp32 |= ADC_GS_ADACT_MASK;
     }
     base->GS = tmp32;
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.h
index 8b46fb1ba..0d9f76bf9 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_adc.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -43,8 +43,8 @@
  */
 
 /*******************************************************************************
-* Definitions
-******************************************************************************/
+ * Definitions
+ ******************************************************************************/
 /*! @brief ADC driver version */
 #define FSL_ADC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
 
@@ -53,8 +53,8 @@
  */
 typedef enum _adc_status_flags
 {
-    kADC_ConversionActiveFlag = ADC_GS_ADACT_MASK, /*!< Conversion is active,not support w1c. */
-    kADC_CalibrationFailedFlag = ADC_GS_CALF_MASK, /*!< Calibration is failed,support w1c. */
+    kADC_ConversionActiveFlag  = ADC_GS_ADACT_MASK, /*!< Conversion is active,not support w1c. */
+    kADC_CalibrationFailedFlag = ADC_GS_CALF_MASK,  /*!< Calibration is failed,support w1c. */
     kADC_AsynchronousWakeupInterruptFlag =
         ADC_GS_AWKST_MASK, /*!< Asynchronous wakeup interrupt occured, support w1c. */
 } adc_status_flags_t;
@@ -95,7 +95,7 @@ typedef enum _adc_sample_period_mode
  */
 typedef enum _adc_clock_source
 {
-    kADC_ClockSourceIPG = 0U,     /*!< Select IPG clock to generate ADCK. */
+    kADC_ClockSourceIPG     = 0U, /*!< Select IPG clock to generate ADCK. */
     kADC_ClockSourceIPGDiv2 = 1U, /*!< Select IPG clock divided by 2 to generate ADCK. */
 #if !(defined(FSL_FEATURE_ADC_SUPPORT_ALTCLK_REMOVE) && FSL_FEATURE_ADC_SUPPORT_ALTCLK_REMOVE)
     kADC_ClockSourceALT = 2U, /*!< Select alternate clock to generate ADCK. */
@@ -119,7 +119,7 @@ typedef enum _adc_clock_drvier
  */
 typedef enum _adc_resolution
 {
-    kADC_Resolution8Bit = 0U,  /*!< Single End 8-bit resolution. */
+    kADC_Resolution8Bit  = 0U, /*!< Single End 8-bit resolution. */
     kADC_Resolution10Bit = 1U, /*!< Single End 10-bit resolution. */
     kADC_Resolution12Bit = 2U, /*!< Single End 12-bit resolution. */
 } adc_resolution_t;
@@ -146,10 +146,10 @@ typedef enum _adc_hardware_compare_mode
  */
 typedef enum _adc_hardware_average_mode
 {
-    kADC_HardwareAverageCount4 = 0U,   /*!< For hardware average with 4 samples. */
-    kADC_HardwareAverageCount8 = 1U,   /*!< For hardware average with 8 samples. */
-    kADC_HardwareAverageCount16 = 2U,  /*!< For hardware average with 16 samples. */
-    kADC_HardwareAverageCount32 = 3U,  /*!< For hardware average with 32 samples. */
+    kADC_HardwareAverageCount4   = 0U, /*!< For hardware average with 4 samples. */
+    kADC_HardwareAverageCount8   = 1U, /*!< For hardware average with 8 samples. */
+    kADC_HardwareAverageCount16  = 2U, /*!< For hardware average with 16 samples. */
+    kADC_HardwareAverageCount32  = 3U, /*!< For hardware average with 32 samples. */
     kADC_HardwareAverageDiasable = 4U, /*!< Disable the hardware average function. */
 } adc_hardware_average_mode_t;
 
@@ -214,163 +214,162 @@ typedef struct _adc_channel_config
     bool enableInterruptOnConversionCompleted; /*!< Generate an interrupt request once the conversion is completed. */
 } adc_channel_config_t;
 /*******************************************************************************
-* API
-******************************************************************************/
+ * API
+ ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Initialization
- * @{
- */
+    /*!
+     * @name Initialization
+     * @{
+     */
 
-/*!
- * @brief Initialize the ADC module.
- *
- * @param base ADC peripheral base address.
- * @param config Pointer to "adc_config_t" structure.
- */
-void ADC_Init(ADC_Type *base, const adc_config_t *config);
+    /*!
+     * @brief Initialize the ADC module.
+     *
+     * @param base ADC peripheral base address.
+     * @param config Pointer to "adc_config_t" structure.
+     */
+    void ADC_Init(ADC_Type *base, const adc_config_t *config);
 
-/*!
- * @brief De-initializes the ADC module.
- *
- * @param base ADC peripheral base address.
- */
-void ADC_Deinit(ADC_Type *base);
+    /*!
+     * @brief De-initializes the ADC module.
+     *
+     * @param base ADC peripheral base address.
+     */
+    void ADC_Deinit(ADC_Type *base);
 
-/*!
- * @brief Gets an available pre-defined settings for the converter's configuration.
- *
- * This function initializes the converter configuration structure with available settings. The default values are:
- * @code
- *  config->enableAsynchronousClockOutput = true;
- *  config->enableOverWrite =               false;
- *  config->enableContinuousConversion =    false;
- *  config->enableHighSpeed =               false;
- *  config->enableLowPower =                false;
- *  config->enableLongSample =              false;
- *  config->referenceVoltageSource =        kADC_ReferenceVoltageSourceAlt0;
- *  config->samplePeriodMode =              kADC_SamplePeriod2or12Clocks;
- *  config->clockSource =                   kADC_ClockSourceAD;
- *  config->clockDriver =                   kADC_ClockDriver1;
- *  config->resolution =                    kADC_Resolution12Bit;
- * @endcode
- * @param base   ADC peripheral base address.
- * @param config Pointer to the configuration structure.
- */
-void ADC_GetDefaultConfig(adc_config_t *config);
+    /*!
+     * @brief Gets an available pre-defined settings for the converter's configuration.
+     *
+     * This function initializes the converter configuration structure with available settings. The default values are:
+     * @code
+     *  config->enableAsynchronousClockOutput = true;
+     *  config->enableOverWrite =               false;
+     *  config->enableContinuousConversion =    false;
+     *  config->enableHighSpeed =               false;
+     *  config->enableLowPower =                false;
+     *  config->enableLongSample =              false;
+     *  config->referenceVoltageSource =        kADC_ReferenceVoltageSourceAlt0;
+     *  config->samplePeriodMode =              kADC_SamplePeriod2or12Clocks;
+     *  config->clockSource =                   kADC_ClockSourceAD;
+     *  config->clockDriver =                   kADC_ClockDriver1;
+     *  config->resolution =                    kADC_Resolution12Bit;
+     * @endcode
+     * @param base   ADC peripheral base address.
+     * @param config Pointer to the configuration structure.
+     */
+    void ADC_GetDefaultConfig(adc_config_t *config);
 
-/*!
- * @brief Configures the conversion channel.
- *
- * This operation triggers the conversion when in software trigger mode. When in hardware trigger mode, this API
- * configures the channel while the external trigger source helps to trigger the conversion.
- *
- * Note that the "Channel Group" has a detailed description.
- * To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC has more than one
- * group of status and control registers, one for each conversion. The channel group parameter indicates which group of
- * registers are used, for example channel group 0 is for Group A registers and channel group 1 is for Group B
- * registers. The
- * channel groups are used in a "ping-pong" approach to control the ADC operation.  At any point, only one of
- * the channel groups is actively controlling ADC conversions. The channel group 0 is used for both software and
- * hardware
- * trigger modes. Channel groups 1 and greater indicate potentially multiple channel group registers for
- * use only in hardware trigger mode. See the chip configuration information in the appropriate MCU reference manual
- * about the
- * number of SC1n registers (channel groups) specific to this device.  None of the channel groups 1 or greater are used
- * for software trigger operation. Therefore, writing to these channel groups does not initiate a new conversion.
- * Updating the channel group 0 while a different channel group is actively controlling a conversion is allowed and
- * vice versa. Writing any of the channel group registers while that specific channel group is actively controlling a
- * conversion aborts the current conversion.
- *
- * @param base          ADC peripheral base address.
- * @param channelGroup  Channel group index.
- * @param config        Pointer to the "adc_channel_config_t" structure for the conversion channel.
- */
-void ADC_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc_channel_config_t *config);
+    /*!
+     * @brief Configures the conversion channel.
+     *
+     * This operation triggers the conversion when in software trigger mode. When in hardware trigger mode, this API
+     * configures the channel while the external trigger source helps to trigger the conversion.
+     *
+     * Note that the "Channel Group" has a detailed description.
+     * To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC has more than one
+     * group of status and control registers, one for each conversion. The channel group parameter indicates which group
+     * of registers are used, for example channel group 0 is for Group A registers and channel group 1 is for Group B
+     * registers. The
+     * channel groups are used in a "ping-pong" approach to control the ADC operation.  At any point, only one of
+     * the channel groups is actively controlling ADC conversions. The channel group 0 is used for both software and
+     * hardware
+     * trigger modes. Channel groups 1 and greater indicate potentially multiple channel group registers for
+     * use only in hardware trigger mode. See the chip configuration information in the appropriate MCU reference manual
+     * about the
+     * number of SC1n registers (channel groups) specific to this device.  None of the channel groups 1 or greater are
+     * used for software trigger operation. Therefore, writing to these channel groups does not initiate a new
+     * conversion. Updating the channel group 0 while a different channel group is actively controlling a conversion is
+     * allowed and vice versa. Writing any of the channel group registers while that specific channel group is actively
+     * controlling a conversion aborts the current conversion.
+     *
+     * @param base          ADC peripheral base address.
+     * @param channelGroup  Channel group index.
+     * @param config        Pointer to the "adc_channel_config_t" structure for the conversion channel.
+     */
+    void ADC_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc_channel_config_t *config);
 
-/*!
- * @brief  Gets the conversion value.
- *
- * @param  base         ADC peripheral base address.
- * @param  channelGroup Channel group index.
- *
- * @return              Conversion value.
- */
-static inline uint32_t ADC_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
-{
-    assert(channelGroup < ADC_R_COUNT);
-
-    return base->R[channelGroup];
-}
-
-/*!
- * @brief Gets the status flags of channel.
- *
- * A conversion is completed when the result of the conversion is transferred into the data
- * result registers. (provided the compare function & hardware averaging is disabled), this is
- * indicated by the setting of COCOn. If hardware averaging is enabled, COCOn sets only,
- * if the last of the selected number of conversions is complete. If the compare function is
- * enabled, COCOn sets and conversion result data is transferred only if the compare
- * condition is true. If both hardware averaging and compare functions are enabled, then
- * COCOn sets only if the last of the selected number of conversions is complete and the
- * compare condition is true.
- *
- * @param base         ADC peripheral base address.
- * @param channelGroup Channel group index.
- *
- * @return             Status flags of channel.return 0 means COCO flag is 0,return 1 means COCOflag is 1.
- */
-static inline uint32_t ADC_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup)
-{
-    assert(channelGroup < ADC_HC_COUNT);
-
-    /* If flag is set,return 1,otherwise, return 0. */
-    return (((base->HS) & (1U << channelGroup)) >> channelGroup);
-}
-
-/*!
- * @brief  Automates the hardware calibration.
- *
- * This auto calibration helps to adjust the plus/minus side gain automatically.
- * Execute the calibration before using the converter. Note that the software trigger should be used
- * during calibration.
- *
- * @param  base ADC peripheral base address.
- *
- * @return                 Execution status.
- * @retval kStatus_Success Calibration is done successfully.
- * @retval kStatus_Fail    Calibration has failed.
- */
-status_t ADC_DoAutoCalibration(ADC_Type *base);
-
-/*!
- * @brief Set user defined offset.
- *
- * @param base   ADC peripheral base address.
- * @param config Pointer to "adc_offest_config_t" structure.
- */
-void ADC_SetOffsetConfig(ADC_Type *base, const adc_offest_config_t *config);
-
-/*!
- * @brief Enables generating the DMA trigger when the conversion is complete.
- *
- * @param base   ADC peripheral base address.
- * @param enable Switcher of the DMA feature. "true" means enabled, "false" means not enabled.
- */
-static inline void ADC_EnableDMA(ADC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief  Gets the conversion value.
+     *
+     * @param  base         ADC peripheral base address.
+     * @param  channelGroup Channel group index.
+     *
+     * @return              Conversion value.
+     */
+    static inline uint32_t ADC_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
     {
-        base->GC |= ADC_GC_DMAEN_MASK;
+        assert(channelGroup < ADC_R_COUNT);
+
+        return base->R[channelGroup];
     }
-    else
+
+    /*!
+     * @brief Gets the status flags of channel.
+     *
+     * A conversion is completed when the result of the conversion is transferred into the data
+     * result registers. (provided the compare function & hardware averaging is disabled), this is
+     * indicated by the setting of COCOn. If hardware averaging is enabled, COCOn sets only,
+     * if the last of the selected number of conversions is complete. If the compare function is
+     * enabled, COCOn sets and conversion result data is transferred only if the compare
+     * condition is true. If both hardware averaging and compare functions are enabled, then
+     * COCOn sets only if the last of the selected number of conversions is complete and the
+     * compare condition is true.
+     *
+     * @param base         ADC peripheral base address.
+     * @param channelGroup Channel group index.
+     *
+     * @return             Status flags of channel.return 0 means COCO flag is 0,return 1 means COCOflag is 1.
+     */
+    static inline uint32_t ADC_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup)
     {
-        base->GC &= ~ADC_GC_DMAEN_MASK;
+        assert(channelGroup < ADC_HC_COUNT);
+
+        /* If flag is set,return 1,otherwise, return 0. */
+        return (((base->HS) & (1U << channelGroup)) >> channelGroup);
+    }
+
+    /*!
+     * @brief  Automates the hardware calibration.
+     *
+     * This auto calibration helps to adjust the plus/minus side gain automatically.
+     * Execute the calibration before using the converter. Note that the software trigger should be used
+     * during calibration.
+     *
+     * @param  base ADC peripheral base address.
+     *
+     * @return                 Execution status.
+     * @retval kStatus_Success Calibration is done successfully.
+     * @retval kStatus_Fail    Calibration has failed.
+     */
+    status_t ADC_DoAutoCalibration(ADC_Type *base);
+
+    /*!
+     * @brief Set user defined offset.
+     *
+     * @param base   ADC peripheral base address.
+     * @param config Pointer to "adc_offest_config_t" structure.
+     */
+    void ADC_SetOffsetConfig(ADC_Type *base, const adc_offest_config_t *config);
+
+    /*!
+     * @brief Enables generating the DMA trigger when the conversion is complete.
+     *
+     * @param base   ADC peripheral base address.
+     * @param enable Switcher of the DMA feature. "true" means enabled, "false" means not enabled.
+     */
+    static inline void ADC_EnableDMA(ADC_Type *base, bool enable)
+    {
+        if (enable) {
+            base->GC |= ADC_GC_DMAEN_MASK;
+        }
+        else {
+            base->GC &= ~ADC_GC_DMAEN_MASK;
+        }
     }
-}
 
 /*!
  * @brief Enables the hardware trigger mode.
@@ -379,65 +378,61 @@ static inline void ADC_EnableDMA(ADC_Type *base, bool enable)
  * @param enable Switcher of the trigger mode. "true" means hardware tirgger mode,"false" means software mode.
  */
 #if !(defined(FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE) && FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE)
-static inline void ADC_EnableHardwareTrigger(ADC_Type *base, bool enable)
-{
-    if (enable)
+    static inline void ADC_EnableHardwareTrigger(ADC_Type *base, bool enable)
     {
-        base->CFG |= ADC_CFG_ADTRG_MASK;
+        if (enable) {
+            base->CFG |= ADC_CFG_ADTRG_MASK;
+        }
+        else {
+            base->CFG &= ~ADC_CFG_ADTRG_MASK;
+        }
     }
-    else
-    {
-        base->CFG &= ~ADC_CFG_ADTRG_MASK;
-    }
-}
 #endif
 
-/*!
- * @brief Configures the hardware compare mode.
- *
- * The hardware compare mode provides a way to process the conversion result automatically by using hardware. Only the
- * result
- * in the compare range is available. To compare the range, see "adc_hardware_compare_mode_t" or the appopriate
- * reference
- * manual for more information.
- *
- * @param base ADC peripheral base address.
- * @param Pointer to "adc_hardware_compare_config_t" structure.
- *
- */
-void ADC_SetHardwareCompareConfig(ADC_Type *base, const adc_hardware_compare_config_t *config);
+    /*!
+     * @brief Configures the hardware compare mode.
+     *
+     * The hardware compare mode provides a way to process the conversion result automatically by using hardware. Only
+     * the result in the compare range is available. To compare the range, see "adc_hardware_compare_mode_t" or the
+     * appopriate reference manual for more information.
+     *
+     * @param base ADC peripheral base address.
+     * @param Pointer to "adc_hardware_compare_config_t" structure.
+     *
+     */
+    void ADC_SetHardwareCompareConfig(ADC_Type *base, const adc_hardware_compare_config_t *config);
 
-/*!
- * @brief Configures the hardware average mode.
- *
- * The hardware average mode provides a way to process the conversion result automatically by using hardware. The
- * multiple
- * conversion results are accumulated and averaged internally making them easier to read.
- *
- * @param base ADC peripheral base address.
- * @param mode Setting the hardware average mode. See "adc_hardware_average_mode_t".
- */
-void ADC_SetHardwareAverageConfig(ADC_Type *base, adc_hardware_average_mode_t mode);
+    /*!
+     * @brief Configures the hardware average mode.
+     *
+     * The hardware average mode provides a way to process the conversion result automatically by using hardware. The
+     * multiple
+     * conversion results are accumulated and averaged internally making them easier to read.
+     *
+     * @param base ADC peripheral base address.
+     * @param mode Setting the hardware average mode. See "adc_hardware_average_mode_t".
+     */
+    void ADC_SetHardwareAverageConfig(ADC_Type *base, adc_hardware_average_mode_t mode);
 
-/*!
- * @brief Gets the converter's status flags.
- *
- * @param base ADC peripheral base address.
- *
- * @return Flags' mask if indicated flags are asserted. See "adc_status_flags_t".
- */
-static inline uint32_t ADC_GetStatusFlags(ADC_Type *base)
-{
-    return base->GS;
-}
+    /*!
+     * @brief Gets the converter's status flags.
+     *
+     * @param base ADC peripheral base address.
+     *
+     * @return Flags' mask if indicated flags are asserted. See "adc_status_flags_t".
+     */
+    static inline uint32_t ADC_GetStatusFlags(ADC_Type *base)
+    {
+        return base->GS;
+    }
 
-/*!
- * @brief Clears the converter's status falgs.
- *
- * @param base ADC peripheral base address.
- * @param mask Mask value for the cleared flags. See "adc_status_flags_t".
- */
-void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask);
+    /*!
+     * @brief Clears the converter's status falgs.
+     *
+     * @param base ADC peripheral base address.
+     * @param mask Mask value for the cleared flags. See "adc_status_flags_t".
+     */
+    void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.c
index 595fefe73..09f14f1a8 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -45,15 +45,15 @@
 
 #if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
 #define L2CACHE_OPERATION_TIMEOUT 0xFFFFFU
-#define L2CACHE_8WAYS_MASK 0xFFU
-#define L2CACHE_16WAYS_MASK 0xFFFFU
-#define L2CACHE_SMALLWAYS_NUM 8U
-#define L2CACHE_1KBCOVERTOB 1024U
-#define L2CACHE_SAMLLWAYS_SIZE 16U
-#define L2CACHE_LOCKDOWN_REGNUM 8  /*!< Lock down register numbers.*/
+#define L2CACHE_8WAYS_MASK        0xFFU
+#define L2CACHE_16WAYS_MASK       0xFFFFU
+#define L2CACHE_SMALLWAYS_NUM     8U
+#define L2CACHE_1KBCOVERTOB       1024U
+#define L2CACHE_SAMLLWAYS_SIZE    16U
+#define L2CACHE_LOCKDOWN_REGNUM   8 /*!< Lock down register numbers.*/
 /*******************************************************************************
-* Prototypes
-******************************************************************************/
+ * Prototypes
+ ******************************************************************************/
 /*!
  * @brief Set for all ways and waiting for the operation finished.
  *  This is provided for all the background operations.
@@ -124,20 +124,18 @@ static void L2CACHE_GetWayNumSize(uint32_t *num_ways, uint32_t *size_way);
  ******************************************************************************/
 static void L2CACHE_SetAndWaitBackGroundOperate(uint32_t auxCtlReg, uint32_t regAddr)
 {
-    uint16_t mask = L2CACHE_8WAYS_MASK;
+    uint16_t mask    = L2CACHE_8WAYS_MASK;
     uint32_t timeout = L2CACHE_OPERATION_TIMEOUT;
 
     /* Check the ways used at first. */
-    if (auxCtlReg & L2CACHEC_REG1_AUX_CONTROL_ASSOCIATIVITY_MASK)
-    {
+    if (auxCtlReg & L2CACHEC_REG1_AUX_CONTROL_ASSOCIATIVITY_MASK) {
         mask = L2CACHE_16WAYS_MASK;
     }
 
     /* Set the opeartion for all ways/entries of the cache. */
     *(uint32_t *)regAddr = mask;
     /* Waiting for until the operation is complete. */
-    while ((*(volatile uint32_t *)regAddr & mask) && timeout)
-    {
+    while ((*(volatile uint32_t *)regAddr & mask) && timeout) {
         __ASM("nop");
         timeout--;
     }
@@ -184,8 +182,7 @@ static void L2CACHE_GetWayNumSize(uint32_t *num_ways, uint32_t *size_way)
                     L2CACHEC_REG1_AUX_CONTROL_WAYSIZE_SHIFT;
 
     *num_ways = (number + 1) * L2CACHE_SMALLWAYS_NUM;
-    if (!size)
-    {
+    if (!size) {
         /* 0 internally mapped to the same size as 1 - 16KB.*/
         size += 1;
     }
@@ -194,8 +191,8 @@ static void L2CACHE_GetWayNumSize(uint32_t *num_ways, uint32_t *size_way)
 
 void L2CACHE_Init(l2cache_config_t *config)
 {
-    assert (config);
-    
+    assert(config);
+
     uint16_t waysNum = 0xFFU; /* Default use the 8-way mask. */
     uint8_t count;
     uint32_t auxReg = 0;
@@ -203,48 +200,42 @@ void L2CACHE_Init(l2cache_config_t *config)
     /*The aux register must be configured when the cachec is disabled
      * So disable first if the cache controller is enabled.
      */
-    if (L2CACHEC->REG1_CONTROL & L2CACHEC_REG1_CONTROL_CE_MASK)
-    {
+    if (L2CACHEC->REG1_CONTROL & L2CACHEC_REG1_CONTROL_CE_MASK) {
         L2CACHE_Disable();
-    }    
+    }
 
     /* Unlock all entries. */
-    if (L2CACHEC->REG1_AUX_CONTROL & L2CACHEC_REG1_AUX_CONTROL_ASSOCIATIVITY_MASK)
-    {
+    if (L2CACHEC->REG1_AUX_CONTROL & L2CACHEC_REG1_AUX_CONTROL_ASSOCIATIVITY_MASK) {
         waysNum = 0xFFFFU;
     }
 
-    for (count = 0; count < L2CACHE_LOCKDOWN_REGNUM; count ++)
-    {
-        L2CACHE_LockdownByWayEnable(count, waysNum, false);    
+    for (count = 0; count < L2CACHE_LOCKDOWN_REGNUM; count++) {
+        L2CACHE_LockdownByWayEnable(count, waysNum, false);
     }
-    
+
     /* Set the ways and way-size etc. */
     auxReg = L2CACHEC_REG1_AUX_CONTROL_ASSOCIATIVITY(config->wayNum) |
-            L2CACHEC_REG1_AUX_CONTROL_WAYSIZE(config->waySize) | 
-            L2CACHEC_REG1_AUX_CONTROL_CRP(config->repacePolicy) |
-            L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) |
-            L2CACHEC_REG1_AUX_CONTROL_DPE(config->dataPrefetchEnable) |
-            L2CACHEC_REG1_AUX_CONTROL_NLE(config->nsLockdownEnable) |
-            L2CACHEC_REG1_AUX_CONTROL_FWA(config->writeAlloc) |
-            L2CACHEC_REG1_AUX_CONTROL_HPSDRE(config->writeAlloc);
+             L2CACHEC_REG1_AUX_CONTROL_WAYSIZE(config->waySize) | L2CACHEC_REG1_AUX_CONTROL_CRP(config->repacePolicy) |
+             L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) |
+             L2CACHEC_REG1_AUX_CONTROL_DPE(config->dataPrefetchEnable) |
+             L2CACHEC_REG1_AUX_CONTROL_NLE(config->nsLockdownEnable) |
+             L2CACHEC_REG1_AUX_CONTROL_FWA(config->writeAlloc) | L2CACHEC_REG1_AUX_CONTROL_HPSDRE(config->writeAlloc);
     L2CACHEC->REG1_AUX_CONTROL = auxReg;
 
     /* Set the tag/data ram latency. */
-    if (config->lateConfig)
-    {
+    if (config->lateConfig) {
         uint32_t data = 0;
         /* Tag latency. */
-        data = L2CACHEC_REG1_TAG_RAM_CONTROL_SL(config->lateConfig->tagSetupLate)|
-            L2CACHEC_REG1_TAG_RAM_CONTROL_SL(config->lateConfig->tagSetupLate)|
-            L2CACHEC_REG1_TAG_RAM_CONTROL_RAL(config->lateConfig->tagReadLate)|
-            L2CACHEC_REG1_TAG_RAM_CONTROL_WAL(config->lateConfig->dataWriteLate);
+        data = L2CACHEC_REG1_TAG_RAM_CONTROL_SL(config->lateConfig->tagSetupLate) |
+               L2CACHEC_REG1_TAG_RAM_CONTROL_SL(config->lateConfig->tagSetupLate) |
+               L2CACHEC_REG1_TAG_RAM_CONTROL_RAL(config->lateConfig->tagReadLate) |
+               L2CACHEC_REG1_TAG_RAM_CONTROL_WAL(config->lateConfig->dataWriteLate);
         L2CACHEC->REG1_TAG_RAM_CONTROL = data;
         /* Data latency. */
-        data = L2CACHEC_REG1_DATA_RAM_CONTROL_SL(config->lateConfig->dataSetupLate)|
-            L2CACHEC_REG1_DATA_RAM_CONTROL_SL(config->lateConfig->dataSetupLate)|
-            L2CACHEC_REG1_DATA_RAM_CONTROL_RAL(config->lateConfig->dataReadLate)|
-            L2CACHEC_REG1_DATA_RAM_CONTROL_WAL(config->lateConfig->dataWriteLate);
+        data = L2CACHEC_REG1_DATA_RAM_CONTROL_SL(config->lateConfig->dataSetupLate) |
+               L2CACHEC_REG1_DATA_RAM_CONTROL_SL(config->lateConfig->dataSetupLate) |
+               L2CACHEC_REG1_DATA_RAM_CONTROL_RAL(config->lateConfig->dataReadLate) |
+               L2CACHEC_REG1_DATA_RAM_CONTROL_WAL(config->lateConfig->dataWriteLate);
         L2CACHEC->REG1_DATA_RAM_CONTROL = data;
     }
 }
@@ -258,14 +249,14 @@ void L2CACHE_GetDefaultConfig(l2cache_config_t *config)
                     L2CACHEC_REG1_AUX_CONTROL_WAYSIZE_SHIFT;
 
     /* Get the default value */
-    config->wayNum = (l2cache_way_num_t)number;
-    config->waySize = (l2cache_way_size)size;
-    config->repacePolicy = kL2CACHE_Roundrobin;
-    config->lateConfig = NULL;
+    config->wayNum             = (l2cache_way_num_t)number;
+    config->waySize            = (l2cache_way_size)size;
+    config->repacePolicy       = kL2CACHE_Roundrobin;
+    config->lateConfig         = NULL;
     config->istrPrefetchEnable = false;
     config->dataPrefetchEnable = false;
-    config->nsLockdownEnable = false;
-    config->writeAlloc = kL2CACHE_UseAwcache; 
+    config->nsLockdownEnable   = false;
+    config->writeAlloc         = kL2CACHE_UseAwcache;
 }
 
 void L2CACHE_Enable(void)
@@ -315,8 +306,7 @@ void L2CACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
     uint32_t endAddr = address + size_byte;
 
     /* Invalidate addresses in the range. */
-    while (address < endAddr)
-    {
+    while (address < endAddr) {
         address = L2CACHE_InvalidateLineByAddr(address);
         /* Update the size. */
         address += FSL_FEATURE_L2CACHE_LINESIZE_BYTE;
@@ -330,21 +320,19 @@ void L2CACHE_CleanByRange(uint32_t address, uint32_t size_byte)
 {
     uint32_t num_ways = 0;
     uint32_t size_way = 0;
-    uint32_t endAddr = address + size_byte;
+    uint32_t endAddr  = address + size_byte;
 
     /* Get the number and size of the cache way. */
     L2CACHE_GetWayNumSize(&num_ways, &size_way);
 
     /* Check if the clean size is over the cache size. */
-    if ((endAddr - address) > num_ways * size_way)
-    {
+    if ((endAddr - address) > num_ways * size_way) {
         L2CACHE_Clean();
         return;
     }
 
     /* Clean addresses in the range. */
-    while ((address & ~(uint32_t)(FSL_FEATURE_L2CACHE_LINESIZE_BYTE - 1)) < endAddr)
-    {
+    while ((address & ~(uint32_t)(FSL_FEATURE_L2CACHE_LINESIZE_BYTE - 1)) < endAddr) {
         /* Clean the address in the range. */
         address = L2CACHE_CleanLineByAddr(address);
         address += FSL_FEATURE_L2CACHE_LINESIZE_BYTE;
@@ -357,21 +345,19 @@ void L2CACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)
 {
     uint32_t num_ways = 0;
     uint32_t size_way = 0;
-    uint32_t endAddr = address + size_byte;
+    uint32_t endAddr  = address + size_byte;
 
     /* Get the number and size of the cache way. */
     L2CACHE_GetWayNumSize(&num_ways, &size_way);
 
     /* Check if the clean size is over the cache size. */
-    if ((endAddr - address) > num_ways * size_way)
-    {
+    if ((endAddr - address) > num_ways * size_way) {
         L2CACHE_CleanInvalidate();
         return;
     }
 
     /* Clean addresses in the range. */
-    while ((address & ~(uint32_t)(FSL_FEATURE_L2CACHE_LINESIZE_BYTE - 1)) < endAddr)
-    {
+    while ((address & ~(uint32_t)(FSL_FEATURE_L2CACHE_LINESIZE_BYTE - 1)) < endAddr) {
         /* Clean the address in the range. */
         address = L2CACHE_CleanInvalidateLineByAddr(address);
         address += FSL_FEATURE_L2CACHE_LINESIZE_BYTE;
@@ -392,40 +378,37 @@ void L2CACHE_LockdownByWayEnable(uint32_t masterId, uint32_t mask, bool enable)
     uint32_t dataReg = L2CACHEC->LOCKDOWN[masterId].REG9_D_LOCKDOWN;
     uint32_t istrReg = L2CACHEC->LOCKDOWN[masterId].REG9_I_LOCKDOWN;
 
-    if (enable)
-    {
+    if (enable) {
         /* Data lockdown. */
         L2CACHEC->LOCKDOWN[masterId].REG9_D_LOCKDOWN = dataReg | mask;
         /* Instruction lockdown. */
         L2CACHEC->LOCKDOWN[masterId].REG9_I_LOCKDOWN = istrReg | mask;
     }
-    else
-    {
+    else {
         /* Data lockdown. */
         L2CACHEC->LOCKDOWN[masterId].REG9_D_LOCKDOWN = dataReg & ~mask;
         /* Instruction lockdown. */
         L2CACHEC->LOCKDOWN[masterId].REG9_I_LOCKDOWN = istrReg & ~mask;
     }
 }
-#endif  /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
+#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
 
 void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte)
 {
 #if (__DCACHE_PRESENT == 1U)
-    uint32_t addr = address & (uint32_t)~(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1);
-    int32_t size = size_byte + address - addr;
+    uint32_t addr     = address & (uint32_t) ~(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1);
+    int32_t size      = size_byte + address - addr;
     uint32_t linesize = 32U;
 
     __DSB();
-    while (size > 0)
-    {
+    while (size > 0) {
         SCB->ICIMVAU = addr;
         addr += linesize;
         size -= linesize;
     }
     __DSB();
     __ISB();
-#endif    
+#endif
 }
 
 void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
@@ -436,7 +419,7 @@ void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
 #endif /* !FSL_SDK_DISBLE_L2CACHE_PRESENT */
 #endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
 
-   L1CACHE_InvalidateICacheByRange(address, size_byte);
+    L1CACHE_InvalidateICacheByRange(address, size_byte);
 }
 
 void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.h
index a041ea2a3..a6f06adac 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_cache.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -53,7 +53,7 @@
 
 #if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
 #ifndef FSL_SDK_DISBLE_L2CACHE_PRESENT
-#define FSL_SDK_DISBLE_L2CACHE_PRESENT   0
+#define FSL_SDK_DISBLE_L2CACHE_PRESENT 0
 #endif
 #endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
 /*******************************************************************************
@@ -64,426 +64,426 @@
 /*! @brief Number of level 2 cache controller ways. */
 typedef enum _l2cache_way_num
 {
-    kL2CACHE_8ways = 0,         /*!< 8 ways. */
+    kL2CACHE_8ways = 0, /*!< 8 ways. */
 #if defined(FSL_FEATURE_L2CACHE_SUPPORT_16_WAY_ASSOCIATIVITY) && FSL_FEATURE_L2CACHE_SUPPORT_16_WAY_ASSOCIATIVITY
-    kL2CACHE_16ways             /*!< 16 ways. */
-#endif /* FSL_FEATURE_L2CACHE_SUPPORT_16_WAY_ASSOCIATIVITY */
+    kL2CACHE_16ways /*!< 16 ways. */
+#endif              /* FSL_FEATURE_L2CACHE_SUPPORT_16_WAY_ASSOCIATIVITY */
 } l2cache_way_num_t;
 
 /*! @brief Level 2 cache controller way size. */
 typedef enum _l2cache_way_size
 {
-    kL2CACHE_16KBSize  = 1,      /*!< 16 KB way size. */
-    kL2CACHE_32KBSize  = 2,      /*!< 32 KB way size. */
-    kL2CACHE_64KBSize  = 3,      /*!< 64 KB way size. */
-    kL2CACHE_128KBSize = 4,      /*!< 128 KB way size. */
-    kL2CACHE_256KBSize = 5,      /*!< 256 KB way size. */
-    kL2CACHE_512KBSize = 6       /*!< 512 KB way size. */
+    kL2CACHE_16KBSize  = 1, /*!< 16 KB way size. */
+    kL2CACHE_32KBSize  = 2, /*!< 32 KB way size. */
+    kL2CACHE_64KBSize  = 3, /*!< 64 KB way size. */
+    kL2CACHE_128KBSize = 4, /*!< 128 KB way size. */
+    kL2CACHE_256KBSize = 5, /*!< 256 KB way size. */
+    kL2CACHE_512KBSize = 6  /*!< 512 KB way size. */
 } l2cache_way_size;
 
 /*! @brief Level 2 cache controller replacement policy. */
 typedef enum _l2cache_replacement
 {
-    kL2CACHE_Pseudorandom = 0U,    /*!< Peseudo-random replacement policy using an lfsr. */
-    kL2CACHE_Roundrobin            /*!< Round-robin replacemnt policy. */
+    kL2CACHE_Pseudorandom = 0U, /*!< Peseudo-random replacement policy using an lfsr. */
+    kL2CACHE_Roundrobin         /*!< Round-robin replacemnt policy. */
 } l2cache_replacement_t;
 
 /*! @brief Level 2 cache controller force write allocate options. */
 typedef enum _l2cache_writealloc
 {
-    kL2CACHE_UseAwcache = 0,      /*!< Use AWCAHE attribute for the write allocate. */
-    kL2CACHE_NoWriteallocate,     /*!< Force no write allocate. */
-    kL2CACHE_forceWriteallocate   /*!< Force write allocate when write misses. */
+    kL2CACHE_UseAwcache = 0,    /*!< Use AWCAHE attribute for the write allocate. */
+    kL2CACHE_NoWriteallocate,   /*!< Force no write allocate. */
+    kL2CACHE_forceWriteallocate /*!< Force write allocate when write misses. */
 } l2cache_writealloc_t;
 
 /*! @brief Level 2 cache controller tag/data ram latency. */
 typedef enum _l2cache_latency
 {
-    kL2CACHE_1CycleLate = 0,   /*!< 1 cycle of latency. */
-    kL2CACHE_2CycleLate,       /*!< 2 cycle of latency. */
-    kL2CACHE_3CycleLate,       /*!< 3 cycle of latency. */
-    kL2CACHE_4CycleLate,       /*!< 4 cycle of latency. */
-    kL2CACHE_5CycleLate,       /*!< 5 cycle of latency. */
-    kL2CACHE_6CycleLate,       /*!< 6 cycle of latency. */
-    kL2CACHE_7CycleLate,       /*!< 7 cycle of latency. */
-    kL2CACHE_8CycleLate        /*!< 8 cycle of latency. */
+    kL2CACHE_1CycleLate = 0, /*!< 1 cycle of latency. */
+    kL2CACHE_2CycleLate,     /*!< 2 cycle of latency. */
+    kL2CACHE_3CycleLate,     /*!< 3 cycle of latency. */
+    kL2CACHE_4CycleLate,     /*!< 4 cycle of latency. */
+    kL2CACHE_5CycleLate,     /*!< 5 cycle of latency. */
+    kL2CACHE_6CycleLate,     /*!< 6 cycle of latency. */
+    kL2CACHE_7CycleLate,     /*!< 7 cycle of latency. */
+    kL2CACHE_8CycleLate      /*!< 8 cycle of latency. */
 } l2cache_latency_t;
 
 /*! @brief Level 2 cache controller tag/data ram latency configure structure. */
 typedef struct _l2cache_latency_config
 {
-    l2cache_latency_t tagWriteLate;   /*!< Tag write latency. */
-    l2cache_latency_t tagReadLate;    /*!< Tag Read latency. */
-    l2cache_latency_t tagSetupLate;   /*!< Tag setup latency. */
-    l2cache_latency_t dataWriteLate;  /*!< Data write latency. */
-    l2cache_latency_t dataReadLate;   /*!< Data Read latency. */
-    l2cache_latency_t dataSetupLate;  /*!< Data setup latency. */
+    l2cache_latency_t tagWriteLate;  /*!< Tag write latency. */
+    l2cache_latency_t tagReadLate;   /*!< Tag Read latency. */
+    l2cache_latency_t tagSetupLate;  /*!< Tag setup latency. */
+    l2cache_latency_t dataWriteLate; /*!< Data write latency. */
+    l2cache_latency_t dataReadLate;  /*!< Data Read latency. */
+    l2cache_latency_t dataSetupLate; /*!< Data setup latency. */
 } L2cache_latency_config_t;
 
 /*! @brief Level 2 cache controller configure structure. */
 typedef struct _l2cache_config
 {
     /* ------------------------ l2 cachec basic settings ---------------------------- */
-    l2cache_way_num_t wayNum;        /*!< The number of ways. */
-    l2cache_way_size  waySize;        /*!< The way size = Cache Ram size / wayNum. */ 
-    l2cache_replacement_t repacePolicy;/*!< Replacemnet policy. */
+    l2cache_way_num_t wayNum;           /*!< The number of ways. */
+    l2cache_way_size waySize;           /*!< The way size = Cache Ram size / wayNum. */
+    l2cache_replacement_t repacePolicy; /*!< Replacemnet policy. */
     /* ------------------------ tag/data ram latency settings ----------------------- */
     L2cache_latency_config_t *lateConfig; /*!< Tag/data latency configure. Set NUll if not required. */
     /* ------------------------ Prefetch enable settings ---------------------------- */
-    bool istrPrefetchEnable;          /*!< Instruction prefetch enable. */
-    bool dataPrefetchEnable;          /*!< Data prefetch enable. */
+    bool istrPrefetchEnable; /*!< Instruction prefetch enable. */
+    bool dataPrefetchEnable; /*!< Data prefetch enable. */
     /* ------------------------ Non-secure access settings -------------------------- */
-    bool nsLockdownEnable;            /*!< None-secure lockdown enable. */
+    bool nsLockdownEnable; /*!< None-secure lockdown enable. */
     /* ------------------------ other settings -------------------------------------- */
-    l2cache_writealloc_t  writeAlloc;/*!< Write allcoate force option. */     
+    l2cache_writealloc_t writeAlloc; /*!< Write allcoate force option. */
 } l2cache_config_t;
-#endif  /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
+#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
 /*******************************************************************************
  * API
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Control for cortex-m7 L1 cache
- *@{
- */
+    /*!
+     * @name Control for cortex-m7 L1 cache
+     *@{
+     */
 
-/*!
- * @brief Enables cortex-m7 L1 instruction cache.
- *
- */
-static inline void L1CACHE_EnableICache(void)
-{
-    SCB_EnableICache();
-}
+    /*!
+     * @brief Enables cortex-m7 L1 instruction cache.
+     *
+     */
+    static inline void L1CACHE_EnableICache(void)
+    {
+        SCB_EnableICache();
+    }
 
-/*!
- * @brief Disables cortex-m7 L1 instruction cache.
- *
- */
-static inline void L1CACHE_DisableICache(void)
-{
-    SCB_DisableICache();
-}
+    /*!
+     * @brief Disables cortex-m7 L1 instruction cache.
+     *
+     */
+    static inline void L1CACHE_DisableICache(void)
+    {
+        SCB_DisableICache();
+    }
 
-/*!
- * @brief Invalidate cortex-m7 L1 instruction cache.
- *
- */
-static inline void L1CACHE_InvalidateICache(void)
-{
-    SCB_InvalidateICache();
-}
+    /*!
+     * @brief Invalidate cortex-m7 L1 instruction cache.
+     *
+     */
+    static inline void L1CACHE_InvalidateICache(void)
+    {
+        SCB_InvalidateICache();
+    }
 
-/*!
- * @brief Invalidate cortex-m7 L1 instruction cache by range.
- *
- * @param address  The start address of the memory to be invalidated.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) aligned. 
- * The startAddr here will be forced to align to L1 I-cache line size if
- * startAddr is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Invalidate cortex-m7 L1 instruction cache by range.
+     *
+     * @param address  The start address of the memory to be invalidated.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L1 I-cache line size if
+     * startAddr is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Enables cortex-m7 L1 data cache.
- *
- */
-static inline void L1CACHE_EnableDCache(void)
-{
-    SCB_EnableDCache();
-}
+    /*!
+     * @brief Enables cortex-m7 L1 data cache.
+     *
+     */
+    static inline void L1CACHE_EnableDCache(void)
+    {
+        SCB_EnableDCache();
+    }
 
-/*!
- * @brief Disables cortex-m7 L1 data cache.
- *
- */
-static inline void L1CACHE_DisableDCache(void)
-{
-    SCB_DisableDCache();
-}
+    /*!
+     * @brief Disables cortex-m7 L1 data cache.
+     *
+     */
+    static inline void L1CACHE_DisableDCache(void)
+    {
+        SCB_DisableDCache();
+    }
 
-/*!
- * @brief Invalidates cortex-m7 L1 data cache.
- *
- */
-static inline void L1CACHE_InvalidateDCache(void)
-{
-    SCB_InvalidateDCache();
-}
+    /*!
+     * @brief Invalidates cortex-m7 L1 data cache.
+     *
+     */
+    static inline void L1CACHE_InvalidateDCache(void)
+    {
+        SCB_InvalidateDCache();
+    }
 
-/*!
- * @brief Cleans cortex-m7 L1 data cache.
- *
- */
-static inline void L1CACHE_CleanDCache(void)
-{
-    SCB_CleanDCache();
-}
+    /*!
+     * @brief Cleans cortex-m7 L1 data cache.
+     *
+     */
+    static inline void L1CACHE_CleanDCache(void)
+    {
+        SCB_CleanDCache();
+    }
 
-/*!
- * @brief Cleans and Invalidates cortex-m7 L1 data cache.
- *
- */
-static inline void L1CACHE_CleanInvalidateDCache(void)
-{
-    SCB_CleanInvalidateDCache();
-}
+    /*!
+     * @brief Cleans and Invalidates cortex-m7 L1 data cache.
+     *
+     */
+    static inline void L1CACHE_CleanInvalidateDCache(void)
+    {
+        SCB_CleanInvalidateDCache();
+    }
 
-/*!
- * @brief Invalidates cortex-m7 L1 data cache by range.
- *
- * @param address  The start address of the memory to be invalidated.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned. 
- * The startAddr here will be forced to align to L1 D-cache line size if
- * startAddr is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-static inline void L1CACHE_InvalidateDCacheByRange(uint32_t address, uint32_t size_byte)
-{
-    uint32_t startAddr = address & (uint32_t)~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
-    uint32_t size = size_byte + address - startAddr;
+    /*!
+     * @brief Invalidates cortex-m7 L1 data cache by range.
+     *
+     * @param address  The start address of the memory to be invalidated.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L1 D-cache line size if
+     * startAddr is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    static inline void L1CACHE_InvalidateDCacheByRange(uint32_t address, uint32_t size_byte)
+    {
+        uint32_t startAddr = address & (uint32_t) ~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
+        uint32_t size      = size_byte + address - startAddr;
 
-    SCB_InvalidateDCache_by_Addr((uint32_t *)startAddr, size);
-}
+        SCB_InvalidateDCache_by_Addr((uint32_t *)startAddr, size);
+    }
 
-/*!
- * @brief Cleans cortex-m7 L1 data cache by range.
- *
- * @param address  The start address of the memory to be cleaned.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.
- * The startAddr here will be forced to align to L1 D-cache line size if
- * startAddr is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-static inline void L1CACHE_CleanDCacheByRange(uint32_t address, uint32_t size_byte)
-{
-    uint32_t startAddr = address & (uint32_t)~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
-    uint32_t size = size_byte + address - startAddr;
+    /*!
+     * @brief Cleans cortex-m7 L1 data cache by range.
+     *
+     * @param address  The start address of the memory to be cleaned.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L1 D-cache line size if
+     * startAddr is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    static inline void L1CACHE_CleanDCacheByRange(uint32_t address, uint32_t size_byte)
+    {
+        uint32_t startAddr = address & (uint32_t) ~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
+        uint32_t size      = size_byte + address - startAddr;
 
-    SCB_CleanDCache_by_Addr((uint32_t *)startAddr, size);
-}
+        SCB_CleanDCache_by_Addr((uint32_t *)startAddr, size);
+    }
 
-/*!
- * @brief Cleans and Invalidates cortex-m7 L1 data cache by range.
- *
- * @param address  The start address of the memory to be clean and invalidated.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.
- * The startAddr here will be forced to align to L1 D-cache line size if
- * startAddr is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-static inline void L1CACHE_CleanInvalidateDCacheByRange(uint32_t address, uint32_t size_byte)
-{
-    uint32_t startAddr = address & (uint32_t)~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
-    uint32_t size = size_byte + address - startAddr;
+    /*!
+     * @brief Cleans and Invalidates cortex-m7 L1 data cache by range.
+     *
+     * @param address  The start address of the memory to be clean and invalidated.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L1 D-cache line size if
+     * startAddr is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    static inline void L1CACHE_CleanInvalidateDCacheByRange(uint32_t address, uint32_t size_byte)
+    {
+        uint32_t startAddr = address & (uint32_t) ~(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1);
+        uint32_t size      = size_byte + address - startAddr;
 
-    SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size);
-}
-/*@}*/
+        SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size);
+    }
+    /*@}*/
 
 #if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
-/*!
- * @name Control for L2 pl310 cache
- *@{
- */
+    /*!
+     * @name Control for L2 pl310 cache
+     *@{
+     */
 
-/*!
- * @brief Initializes the level 2 cache controller module.
- *
- * @param config Pointer to configuration structure. See "l2cache_config_t".
- */
-void L2CACHE_Init(l2cache_config_t *config);
+    /*!
+     * @brief Initializes the level 2 cache controller module.
+     *
+     * @param config Pointer to configuration structure. See "l2cache_config_t".
+     */
+    void L2CACHE_Init(l2cache_config_t *config);
 
-/*!
- * @brief Gets an available default settings for the cache controller.
- *
- * This function initializes the cache controller configuration structure with default settings. 
- * The default values are:
- * @code
- *   config->waysNum = kL2CACHE_8ways;
- *   config->waySize = kL2CACHE_32KbSize;
- *   config->repacePolicy = kL2CACHE_Roundrobin;
- *   config->lateConfig = NULL;
- *   config->istrPrefetchEnable = false;
- *   config->dataPrefetchEnable = false;
- *   config->nsLockdownEnable = false;
- *   config->writeAlloc = kL2CACHE_UseAwcache; 
- * @endcode
- * @param config Pointer to the configuration structure.
- */
-void L2CACHE_GetDefaultConfig(l2cache_config_t *config);
+    /*!
+     * @brief Gets an available default settings for the cache controller.
+     *
+     * This function initializes the cache controller configuration structure with default settings.
+     * The default values are:
+     * @code
+     *   config->waysNum = kL2CACHE_8ways;
+     *   config->waySize = kL2CACHE_32KbSize;
+     *   config->repacePolicy = kL2CACHE_Roundrobin;
+     *   config->lateConfig = NULL;
+     *   config->istrPrefetchEnable = false;
+     *   config->dataPrefetchEnable = false;
+     *   config->nsLockdownEnable = false;
+     *   config->writeAlloc = kL2CACHE_UseAwcache;
+     * @endcode
+     * @param config Pointer to the configuration structure.
+     */
+    void L2CACHE_GetDefaultConfig(l2cache_config_t *config);
 
-/*!
- * @brief Enables the level 2 cache controller.
- * This function enables the cache controller. Must be written using a secure access.
- * If write with a Non-secure access will cause a DECERR response.
- *
- */
-void L2CACHE_Enable(void);
+    /*!
+     * @brief Enables the level 2 cache controller.
+     * This function enables the cache controller. Must be written using a secure access.
+     * If write with a Non-secure access will cause a DECERR response.
+     *
+     */
+    void L2CACHE_Enable(void);
 
-/*!
- * @brief Disables the level 2 cache controller.
- * This function disables the cache controller. Must be written using a secure access.
- * If write with a Non-secure access will cause a DECERR response.
- *
- */
-void L2CACHE_Disable(void);
+    /*!
+     * @brief Disables the level 2 cache controller.
+     * This function disables the cache controller. Must be written using a secure access.
+     * If write with a Non-secure access will cause a DECERR response.
+     *
+     */
+    void L2CACHE_Disable(void);
 
-/*!
- * @brief Invalidates the Level 2 cache.
- * This function invalidates all entries in cache.
- *
- */
-void L2CACHE_Invalidate(void);
+    /*!
+     * @brief Invalidates the Level 2 cache.
+     * This function invalidates all entries in cache.
+     *
+     */
+    void L2CACHE_Invalidate(void);
 
-/*!
- * @brief Invalidates the Level 2 cache lines in the range of two physical addresses.
- * This function invalidates all cache lines between two physical addresses.
- *
- * @param address  The start address of the memory to be invalidated.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
- * The startAddr here will be forced to align to L2 line size if startAddr
- * is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void L2CACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Invalidates the Level 2 cache lines in the range of two physical addresses.
+     * This function invalidates all cache lines between two physical addresses.
+     *
+     * @param address  The start address of the memory to be invalidated.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L2 line size if startAddr
+     * is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void L2CACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Cleans the level 2 cache controller.
- * This function cleans all entries in the level 2 cache controller.
- *
- */
-void L2CACHE_Clean(void);
+    /*!
+     * @brief Cleans the level 2 cache controller.
+     * This function cleans all entries in the level 2 cache controller.
+     *
+     */
+    void L2CACHE_Clean(void);
 
-/*!
- * @brief Cleans the Level 2 cache lines in the range of two physical addresses.
- * This function cleans all cache lines between two physical addresses.
- *
- * @param address  The start address of the memory to be cleaned.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
- * The startAddr here will be forced to align to L2 line size if startAddr
- * is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void L2CACHE_CleanByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Cleans the Level 2 cache lines in the range of two physical addresses.
+     * This function cleans all cache lines between two physical addresses.
+     *
+     * @param address  The start address of the memory to be cleaned.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L2 line size if startAddr
+     * is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void L2CACHE_CleanByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Cleans and invalidates the level 2 cache controller.
- * This function cleans and invalidates all entries in the level 2 cache controller.
- *
- */
-void L2CACHE_CleanInvalidate(void);
+    /*!
+     * @brief Cleans and invalidates the level 2 cache controller.
+     * This function cleans and invalidates all entries in the level 2 cache controller.
+     *
+     */
+    void L2CACHE_CleanInvalidate(void);
 
-/*!
- * @brief Cleans and invalidates the Level 2 cache lines in the range of two physical addresses.
- * This function cleans and invalidates all cache lines between two physical addresses.
- *
- * @param address  The start address of the memory to be cleaned and invalidated.
- * @param size_byte  The memory size.
- * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
- * The startAddr here will be forced to align to L2 line size if startAddr
- * is not aligned. For the size_byte, application should make sure the
- * alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void L2CACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Cleans and invalidates the Level 2 cache lines in the range of two physical addresses.
+     * This function cleans and invalidates all cache lines between two physical addresses.
+     *
+     * @param address  The start address of the memory to be cleaned and invalidated.
+     * @param size_byte  The memory size.
+     * @note The start address and size_byte should be 32-byte(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) aligned.
+     * The startAddr here will be forced to align to L2 line size if startAddr
+     * is not aligned. For the size_byte, application should make sure the
+     * alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void L2CACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Enables or disables to lock down the data and instruction by way.
- * This function locks down the cached instruction/data by way and prevent the adresses from
- * being allocated and prevent dara from being evicted out of the level 2 cache.
- * But the normal cache maintenance operations that invalidate, clean or clean
- * and validate cache contents affect the locked-down cache lines as normal.
- *
- * @param masterId  The master id, range from 0 ~ 7.
- * @param mask  The ways to be enabled or disabled to lockdown.
- *               each bit in value is related to each way of the cache. for example:
- *               value: bit 0  ------ way 0.
- *               value: bit 1  ------ way 1.
- *               --------------------------
- *               value: bit 15 ------ way 15.
- * Note: please make sure the value setting is align with your supported ways.
- * @param enable  True enable the lockdown, false to disable the lockdown.
- */
-void L2CACHE_LockdownByWayEnable(uint32_t masterId, uint32_t mask, bool enable);
+    /*!
+     * @brief Enables or disables to lock down the data and instruction by way.
+     * This function locks down the cached instruction/data by way and prevent the adresses from
+     * being allocated and prevent dara from being evicted out of the level 2 cache.
+     * But the normal cache maintenance operations that invalidate, clean or clean
+     * and validate cache contents affect the locked-down cache lines as normal.
+     *
+     * @param masterId  The master id, range from 0 ~ 7.
+     * @param mask  The ways to be enabled or disabled to lockdown.
+     *               each bit in value is related to each way of the cache. for example:
+     *               value: bit 0  ------ way 0.
+     *               value: bit 1  ------ way 1.
+     *               --------------------------
+     *               value: bit 15 ------ way 15.
+     * Note: please make sure the value setting is align with your supported ways.
+     * @param enable  True enable the lockdown, false to disable the lockdown.
+     */
+    void L2CACHE_LockdownByWayEnable(uint32_t masterId, uint32_t mask, bool enable);
 
 /*@}*/
 #endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
 
-/*!
- * @name Unified Cache Control for all caches (cortex-m7 L1 cache + l2 pl310)
- * Mainly used for many drivers for easy cache operation.
- *@{
- */
+    /*!
+     * @name Unified Cache Control for all caches (cortex-m7 L1 cache + l2 pl310)
+     * Mainly used for many drivers for easy cache operation.
+     *@{
+     */
 
-/*!
- * @brief Invalidates all instruction caches by range.
- *
- * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
- *
- * @param address The physical address.
- * @param size_byte size of the memory to be invalidated.
- * @note address and size should be aligned to cache line size
- *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
- * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
- * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Invalidates all instruction caches by range.
+     *
+     * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
+     *
+     * @param address The physical address.
+     * @param size_byte size of the memory to be invalidated.
+     * @note address and size should be aligned to cache line size
+     *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
+     * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
+     * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Invalidates all data caches by range.
- *
- * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
- *
- * @param address The physical address.
- * @param size_byte size of the memory to be invalidated.
- * @note address and size should be aligned to cache line size
- *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
- * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
- * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Invalidates all data caches by range.
+     *
+     * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
+     *
+     * @param address The physical address.
+     * @param size_byte size of the memory to be invalidated.
+     * @note address and size should be aligned to cache line size
+     *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
+     * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
+     * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Cleans all data caches by range.
- *
- * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
- *
- * @param address The physical address.
- * @param size_byte size of the memory to be cleaned.
- * @note address and size should be aligned to cache line size
- *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
- * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
- * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte);
+    /*!
+     * @brief Cleans all data caches by range.
+     *
+     * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
+     *
+     * @param address The physical address.
+     * @param size_byte size of the memory to be cleaned.
+     * @note address and size should be aligned to cache line size
+     *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
+     * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
+     * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte);
 
-/*!
- * @brief Cleans and Invalidates all data caches by range.
- *
- * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
- *
- * @param address The physical address.
- * @param size_byte size of the memory to be cleaned and invalidated.
- * @note address and size should be aligned to cache line size
- *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
- * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
- * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
- */
-void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte);
-
-/*@}*/
+    /*!
+     * @brief Cleans and Invalidates all data caches by range.
+     *
+     * Both cortex-m7 L1 cache line and L2 PL310 cache line length is 32-byte.
+     *
+     * @param address The physical address.
+     * @param size_byte size of the memory to be cleaned and invalidated.
+     * @note address and size should be aligned to cache line size
+     *  32-Byte due to the cache operation unit is one cache line. The startAddr here will be forced
+     * to align to the cache line size if startAddr is not aligned. For the size_byte, application should
+     * make sure the alignment or make sure the right operation order if the size_byte is not aligned.
+     */
+    void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte);
 
+    /*@}*/
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.c
index d581be7d5..5a8c991a0 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.c
@@ -66,61 +66,57 @@ static uint32_t CLOCK_GetPeriphClkFreq(void)
     uint32_t freq;
 
     /* Periph_clk2_clk ---> Periph_clk */
-    if (CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
-    {
-        switch (CCM->CBCMR & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
-        {
-            /* Pll3_sw_clk ---> Periph_clk2_clk ---> Periph_clk */
-            case CCM_CBCMR_PERIPH_CLK2_SEL(0U):
-                freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
-                break;
+    if (CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK) {
+        switch (CCM->CBCMR & CCM_CBCMR_PERIPH_CLK2_SEL_MASK) {
+        /* Pll3_sw_clk ---> Periph_clk2_clk ---> Periph_clk */
+        case CCM_CBCMR_PERIPH_CLK2_SEL(0U):
+            freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
+            break;
 
-            /* Osc_clk ---> Periph_clk2_clk ---> Periph_clk */
-            case CCM_CBCMR_PERIPH_CLK2_SEL(1U):
-                freq = CLOCK_GetOscFreq();
-                break;
+        /* Osc_clk ---> Periph_clk2_clk ---> Periph_clk */
+        case CCM_CBCMR_PERIPH_CLK2_SEL(1U):
+            freq = CLOCK_GetOscFreq();
+            break;
 
-            case CCM_CBCMR_PERIPH_CLK2_SEL(2U):
-                freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
-                break;
+        case CCM_CBCMR_PERIPH_CLK2_SEL(2U):
+            freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
+            break;
 
-            case CCM_CBCMR_PERIPH_CLK2_SEL(3U):
-            default:
-                freq = 0U;
-                break;
+        case CCM_CBCMR_PERIPH_CLK2_SEL(3U):
+        default:
+            freq = 0U;
+            break;
         }
 
         freq /= (((CCM->CBCDR & CCM_CBCDR_PERIPH_CLK2_PODF_MASK) >> CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT) + 1U);
     }
     /* Pre_Periph_clk ---> Periph_clk */
-    else
-    {
-        switch (CCM->CBCMR & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
-        {
-            /* PLL2 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(0U):
-                freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
-                break;
+    else {
+        switch (CCM->CBCMR & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK) {
+        /* PLL2 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(0U):
+            freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
+            break;
 
-            /* PLL2 PFD2 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(1U):
-                freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
-                break;
+        /* PLL2 PFD2 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(1U):
+            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
+            break;
 
-            /* PLL2 PFD0 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(2U):
-                freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0);
-                break;
+        /* PLL2 PFD0 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(2U):
+            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0);
+            break;
 
-            /* PLL1 divided(/2) ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(3U):
-                freq = CLOCK_GetPllFreq(kCLOCK_PllArm) /
-                       (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U);
-                break;
+        /* PLL1 divided(/2) ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(3U):
+            freq = CLOCK_GetPllFreq(kCLOCK_PllArm) /
+                   (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U);
+            break;
 
-            default:
-                freq = 0U;
-                break;
+        default:
+            freq = 0U;
+            break;
         }
     }
 
@@ -133,13 +129,9 @@ void CLOCK_InitExternalClk(bool bypassXtalOsc)
     assert(!bypassXtalOsc);
 
     CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK; /* Power up */
-    while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0)
-    {
-    }
+    while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0) {}
     CCM_ANALOG->MISC0_SET = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK; /* detect freq */
-    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0) {}
     CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK;
 }
 
@@ -170,104 +162,97 @@ uint32_t CLOCK_GetFreq(clock_name_t name)
 {
     uint32_t freq;
 
-    switch (name)
-    {
-        case kCLOCK_CpuClk:
+    switch (name) {
+    case kCLOCK_CpuClk:
+    /* Periph_clk ---> AHB Clock */
+    case kCLOCK_AhbClk:
         /* Periph_clk ---> AHB Clock */
-        case kCLOCK_AhbClk:
-            /* Periph_clk ---> AHB Clock */
-            freq =
-                CLOCK_GetPeriphClkFreq() / (((CCM->CBCDR & CCM_CBCDR_AHB_PODF_MASK) >> CCM_CBCDR_AHB_PODF_SHIFT) + 1U);
-            break;
+        freq = CLOCK_GetPeriphClkFreq() / (((CCM->CBCDR & CCM_CBCDR_AHB_PODF_MASK) >> CCM_CBCDR_AHB_PODF_SHIFT) + 1U);
+        break;
 
-        case kCLOCK_SemcClk:
-            /* SEMC alternative clock ---> SEMC Clock */
-            if (CCM->CBCDR & CCM_CBCDR_SEMC_CLK_SEL_MASK)
-            {
-                /* PLL3 PFD1 ---> SEMC alternative clock ---> SEMC Clock */
-                if (CCM->CBCDR & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK)
-                {
-                    freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
-                }
-                /* PLL2 PFD2 ---> SEMC alternative clock ---> SEMC Clock */
-                else
-                {
-                    freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
-                }
+    case kCLOCK_SemcClk:
+        /* SEMC alternative clock ---> SEMC Clock */
+        if (CCM->CBCDR & CCM_CBCDR_SEMC_CLK_SEL_MASK) {
+            /* PLL3 PFD1 ---> SEMC alternative clock ---> SEMC Clock */
+            if (CCM->CBCDR & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK) {
+                freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
             }
-            /* Periph_clk ---> SEMC Clock */
-            else
-            {
-                freq = CLOCK_GetPeriphClkFreq();
+            /* PLL2 PFD2 ---> SEMC alternative clock ---> SEMC Clock */
+            else {
+                freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
             }
+        }
+        /* Periph_clk ---> SEMC Clock */
+        else {
+            freq = CLOCK_GetPeriphClkFreq();
+        }
 
-            freq /= (((CCM->CBCDR & CCM_CBCDR_SEMC_PODF_MASK) >> CCM_CBCDR_SEMC_PODF_SHIFT) + 1U);
-            break;
+        freq /= (((CCM->CBCDR & CCM_CBCDR_SEMC_PODF_MASK) >> CCM_CBCDR_SEMC_PODF_SHIFT) + 1U);
+        break;
 
-        case kCLOCK_IpgClk:
-            /* Periph_clk ---> AHB Clock ---> IPG Clock */
-            freq =
-                CLOCK_GetPeriphClkFreq() / (((CCM->CBCDR & CCM_CBCDR_AHB_PODF_MASK) >> CCM_CBCDR_AHB_PODF_SHIFT) + 1U);
-            freq /= (((CCM->CBCDR & CCM_CBCDR_IPG_PODF_MASK) >> CCM_CBCDR_IPG_PODF_SHIFT) + 1U);
-            break;
+    case kCLOCK_IpgClk:
+        /* Periph_clk ---> AHB Clock ---> IPG Clock */
+        freq = CLOCK_GetPeriphClkFreq() / (((CCM->CBCDR & CCM_CBCDR_AHB_PODF_MASK) >> CCM_CBCDR_AHB_PODF_SHIFT) + 1U);
+        freq /= (((CCM->CBCDR & CCM_CBCDR_IPG_PODF_MASK) >> CCM_CBCDR_IPG_PODF_SHIFT) + 1U);
+        break;
 
-        case kCLOCK_OscClk:
-            freq = CLOCK_GetOscFreq();
-            break;
-        case kCLOCK_RtcClk:
-            freq = CLOCK_GetRtcFreq();
-            break;
-        case kCLOCK_ArmPllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllArm);
-            break;
-        case kCLOCK_Usb1PllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
-            break;
-        case kCLOCK_Usb1PllPfd0Clk:
-            freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd0);
-            break;
-        case kCLOCK_Usb1PllPfd1Clk:
-            freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
-            break;
-        case kCLOCK_Usb1PllPfd2Clk:
-            freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd2);
-            break;
-        case kCLOCK_Usb1PllPfd3Clk:
-            freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd3);
-            break;
-        case kCLOCK_Usb2PllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllUsb2);
-            break;
-        case kCLOCK_SysPllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
-            break;
-        case kCLOCK_SysPllPfd0Clk:
-            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0);
-            break;
-        case kCLOCK_SysPllPfd1Clk:
-            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd1);
-            break;
-        case kCLOCK_SysPllPfd2Clk:
-            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
-            break;
-        case kCLOCK_SysPllPfd3Clk:
-            freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd3);
-            break;
-        case kCLOCK_EnetPll0Clk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllEnet);
-            break;
-        case kCLOCK_EnetPll1Clk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllEnet25M);
-            break;
-        case kCLOCK_AudioPllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllAudio);
-            break;
-        case kCLOCK_VideoPllClk:
-            freq = CLOCK_GetPllFreq(kCLOCK_PllVideo);
-            break;
-        default:
-            freq = 0U;
-            break;
+    case kCLOCK_OscClk:
+        freq = CLOCK_GetOscFreq();
+        break;
+    case kCLOCK_RtcClk:
+        freq = CLOCK_GetRtcFreq();
+        break;
+    case kCLOCK_ArmPllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllArm);
+        break;
+    case kCLOCK_Usb1PllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
+        break;
+    case kCLOCK_Usb1PllPfd0Clk:
+        freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd0);
+        break;
+    case kCLOCK_Usb1PllPfd1Clk:
+        freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
+        break;
+    case kCLOCK_Usb1PllPfd2Clk:
+        freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd2);
+        break;
+    case kCLOCK_Usb1PllPfd3Clk:
+        freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd3);
+        break;
+    case kCLOCK_Usb2PllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllUsb2);
+        break;
+    case kCLOCK_SysPllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
+        break;
+    case kCLOCK_SysPllPfd0Clk:
+        freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0);
+        break;
+    case kCLOCK_SysPllPfd1Clk:
+        freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd1);
+        break;
+    case kCLOCK_SysPllPfd2Clk:
+        freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
+        break;
+    case kCLOCK_SysPllPfd3Clk:
+        freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd3);
+        break;
+    case kCLOCK_EnetPll0Clk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllEnet);
+        break;
+    case kCLOCK_EnetPll1Clk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllEnet25M);
+        break;
+    case kCLOCK_AudioPllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllAudio);
+        break;
+    case kCLOCK_VideoPllClk:
+        freq = CLOCK_GetPllFreq(kCLOCK_PllVideo);
+        break;
+    default:
+        freq = 0U;
+        break;
     }
 
     return freq;
@@ -304,12 +289,10 @@ bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq)
 bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)
 {
     const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};
-    if (CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_ENABLE_MASK)
-    {
-        CCM_ANALOG->PLL_USB1 |= CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; 
+    if (CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_ENABLE_MASK) {
+        CCM_ANALOG->PLL_USB1 |= CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
     }
-    else
-    {
+    else {
         CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll);
     }
     USBPHY1->CTRL &= ~USBPHY_CTRL_SFTRST_MASK; /* release PHY from reset */
@@ -323,7 +306,7 @@ bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)
 
 void CLOCK_DisableUsbhs0PhyPllClock(void)
 {
-    CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; 
+    CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
     USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */
 }
 
@@ -337,9 +320,7 @@ void CLOCK_InitArmPll(const clock_arm_pll_config_t *config)
         (CCM_ANALOG->PLL_ARM & (~(CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK | CCM_ANALOG_PLL_ARM_POWERDOWN_MASK))) |
         CCM_ANALOG_PLL_ARM_ENABLE_MASK | CCM_ANALOG_PLL_ARM_DIV_SELECT(config->loopDivider);
 
-    while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_ARM &= ~CCM_ANALOG_PLL_ARM_BYPASS_MASK;
@@ -350,7 +331,6 @@ void CLOCK_DeinitArmPll(void)
     CCM_ANALOG->PLL_ARM = CCM_ANALOG_PLL_ARM_POWERDOWN_MASK;
 }
 
-
 void CLOCK_InitSysPll(const clock_sys_pll_config_t *config)
 {
     /* Bypass PLL first */
@@ -361,15 +341,12 @@ void CLOCK_InitSysPll(const clock_sys_pll_config_t *config)
         (CCM_ANALOG->PLL_SYS & (~(CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK | CCM_ANALOG_PLL_SYS_POWERDOWN_MASK))) |
         CCM_ANALOG_PLL_SYS_ENABLE_MASK | CCM_ANALOG_PLL_SYS_DIV_SELECT(config->loopDivider);
 
-    while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_BYPASS_MASK;
 }
 
-
 void CLOCK_DeinitSysPll(void)
 {
     CCM_ANALOG->PLL_SYS = CCM_ANALOG_PLL_SYS_POWERDOWN_MASK;
@@ -385,9 +362,7 @@ void CLOCK_InitUsb1Pll(const clock_usb_pll_config_t *config)
                            CCM_ANALOG_PLL_USB1_ENABLE_MASK | CCM_ANALOG_PLL_USB1_POWER_MASK |
                            CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK | CCM_ANALOG_PLL_USB1_DIV_SELECT(config->loopDivider);
 
-    while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_BYPASS_MASK;
@@ -408,9 +383,7 @@ void CLOCK_InitUsb2Pll(const clock_usb_pll_config_t *config)
                            CCM_ANALOG_PLL_USB2_ENABLE_MASK | CCM_ANALOG_PLL_USB2_POWER_MASK |
                            CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK | CCM_ANALOG_PLL_USB2_DIV_SELECT(config->loopDivider);
 
-    while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_USB2 &= ~CCM_ANALOG_PLL_USB2_BYPASS_MASK;
@@ -430,7 +403,7 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config)
     CCM_ANALOG->PLL_AUDIO = (CCM_ANALOG->PLL_AUDIO & (~CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)) |
                             CCM_ANALOG_PLL_AUDIO_BYPASS_MASK | CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(config->src);
 
-    CCM_ANALOG->PLL_AUDIO_NUM = CCM_ANALOG_PLL_AUDIO_NUM_A(config->numerator);
+    CCM_ANALOG->PLL_AUDIO_NUM   = CCM_ANALOG_PLL_AUDIO_NUM_A(config->numerator);
     CCM_ANALOG->PLL_AUDIO_DENOM = CCM_ANALOG_PLL_AUDIO_DENOM_B(config->denominator);
 
     /*
@@ -454,30 +427,29 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config)
         (CCM_ANALOG->PLL_AUDIO & (~(CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK | CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK))) |
         CCM_ANALOG_PLL_AUDIO_ENABLE_MASK | CCM_ANALOG_PLL_AUDIO_DIV_SELECT(config->loopDivider);
 
-    switch (config->postDivider)
-    {
-        case 16:
-            pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(0);
-            misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
-            break;
+    switch (config->postDivider) {
+    case 16:
+        pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(0);
+        misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+        break;
 
-        case 8:
-            pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1);
-            misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
-            break;
+    case 8:
+        pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1);
+        misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+        break;
 
-        case 4:
-            pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2);
-            misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
-            break;
+    case 4:
+        pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2);
+        misc2 = CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+        break;
 
-        case 2:
-            pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1);
-            break;
+    case 2:
+        pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1);
+        break;
 
-        default:
-            pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2);
-            break;
+    default:
+        pllAudio |= CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2);
+        break;
     }
 
     CCM_ANALOG->MISC2 =
@@ -485,9 +457,7 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config)
 
     CCM_ANALOG->PLL_AUDIO = pllAudio;
 
-    while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_AUDIO &= ~CCM_ANALOG_PLL_AUDIO_BYPASS_MASK;
@@ -507,7 +477,7 @@ void CLOCK_InitVideoPll(const clock_video_pll_config_t *config)
     CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
                             CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(config->src);
 
-    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(config->numerator);
+    CCM_ANALOG->PLL_VIDEO_NUM   = CCM_ANALOG_PLL_VIDEO_NUM_A(config->numerator);
     CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(config->denominator);
 
     /*
@@ -531,39 +501,36 @@ void CLOCK_InitVideoPll(const clock_video_pll_config_t *config)
         (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
         CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider);
 
-    switch (config->postDivider)
-    {
-        case 16:
-            pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(0);
-            misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
-            break;
+    switch (config->postDivider) {
+    case 16:
+        pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(0);
+        misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
+        break;
 
-        case 8:
-            pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
-            misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
-            break;
+    case 8:
+        pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+        misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
+        break;
 
-        case 4:
-            pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(2);
-            misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
-            break;
+    case 4:
+        pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(2);
+        misc2 = CCM_ANALOG_MISC2_VIDEO_DIV(3);
+        break;
 
-        case 2:
-            pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
-            break;
+    case 2:
+        pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+        break;
 
-        default:
-            pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(2);
-            break;
+    default:
+        pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(2);
+        break;
     }
 
     CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & ~CCM_ANALOG_MISC2_VIDEO_DIV_MASK) | misc2;
 
     CCM_ANALOG->PLL_VIDEO = pllVideo;
 
-    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
@@ -581,13 +548,11 @@ void CLOCK_InitEnetPll(const clock_enet_pll_config_t *config)
     CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_MASK)) |
                            CCM_ANALOG_PLL_ENET_BYPASS_MASK | CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(config->src);
 
-    if (config->enableClkOutput)
-    {
+    if (config->enableClkOutput) {
         enet_pll |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
     }
 
-    if (config->enableClkOutput25M)
-    {
+    if (config->enableClkOutput25M) {
         enet_pll |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
     }
 
@@ -596,9 +561,7 @@ void CLOCK_InitEnetPll(const clock_enet_pll_config_t *config)
         enet_pll;
 
     /* Wait for stable */
-    while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0)
-    {
-    }
+    while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0) {}
 
     /* Disable Bypass */
     CCM_ANALOG->PLL_ENET &= ~CCM_ANALOG_PLL_ENET_BYPASS_MASK;
@@ -623,8 +586,7 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll)
     };
 
     /* check if PLL is enabled */
-    if (!CLOCK_IsPllEnabled(CCM_ANALOG, pll))
-    {
+    if (!CLOCK_IsPllEnabled(CCM_ANALOG, pll)) {
         return 0U;
     }
 
@@ -632,165 +594,156 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll)
     freq = CLOCK_GetPllBypassRefClk(CCM_ANALOG, pll);
 
     /* check if pll is bypassed */
-    if (CLOCK_IsPllBypassed(CCM_ANALOG, pll))
-    {
+    if (CLOCK_IsPllBypassed(CCM_ANALOG, pll)) {
         return freq;
     }
 
-    switch (pll)
-    {
-        case kCLOCK_PllArm:
-            freq = ((freq * ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK) >>
-                             CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) >>
-                    1U);
-            break;
-        case kCLOCK_PllSys:
-            /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
-            freqTmp =
-                ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_SYS_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_SYS_DENOM));
+    switch (pll) {
+    case kCLOCK_PllArm:
+        freq = ((freq *
+                 ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) >>
+                1U);
+        break;
+    case kCLOCK_PllSys:
+        /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
+        freqTmp = ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_SYS_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_SYS_DENOM));
 
-            if (CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK)
-            {
-                freq *= 22U;
-            }
-            else
-            {
-                freq *= 20U;
-            }
+        if (CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK) {
+            freq *= 22U;
+        }
+        else {
+            freq *= 20U;
+        }
 
-            freq += (uint32_t)freqTmp;
+        freq += (uint32_t)freqTmp;
+        break;
+
+    case kCLOCK_PllUsb1:
+        freq = (freq * ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) ? 22U : 20U));
+        break;
+
+    case kCLOCK_PllAudio:
+        /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
+        divSelect =
+            (CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT;
+
+        freqTmp =
+            ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_AUDIO_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_AUDIO_DENOM));
+
+        freq = freq * divSelect + (uint32_t)freqTmp;
+
+        /* AUDIO PLL output = PLL output frequency / POSTDIV. */
+
+        /*
+         * Post divider:
+         *
+         * PLL_AUDIO[POST_DIV_SELECT]:
+         * 0x00: 4
+         * 0x01: 2
+         * 0x02: 1
+         *
+         * MISC2[AUDO_DIV]:
+         * 0x00: 1
+         * 0x01: 2
+         * 0x02: 1
+         * 0x03: 4
+         */
+        switch (CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK) {
+        case CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(0U):
+            freq = freq >> 2U;
             break;
 
-        case kCLOCK_PllUsb1:
-            freq = (freq * ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) ? 22U : 20U));
+        case CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1U):
+            freq = freq >> 1U;
             break;
 
-        case kCLOCK_PllAudio:
-            /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
-            divSelect =
-                (CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT;
-
-            freqTmp =
-                ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_AUDIO_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_AUDIO_DENOM));
-
-            freq = freq * divSelect + (uint32_t)freqTmp;
-
-            /* AUDIO PLL output = PLL output frequency / POSTDIV. */
-
-            /*
-             * Post divider:
-             *
-             * PLL_AUDIO[POST_DIV_SELECT]:
-             * 0x00: 4
-             * 0x01: 2
-             * 0x02: 1
-             *
-             * MISC2[AUDO_DIV]:
-             * 0x00: 1
-             * 0x01: 2
-             * 0x02: 1
-             * 0x03: 4
-             */
-            switch (CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT_MASK)
-            {
-                case CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(0U):
-                    freq = freq >> 2U;
-                    break;
-
-                case CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(1U):
-                    freq = freq >> 1U;
-                    break;
-
-                default:
-                    break;
-            }
-
-            switch (CCM_ANALOG->MISC2 & (CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK))
-            {
-                case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(1) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(1):
-                    freq >>= 2U;
-                    break;
-
-                case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(0) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(1):
-                    freq >>= 1U;
-                    break;
-
-                default:
-                    break;
-            }
-            break;
-
-        case kCLOCK_PllVideo:
-            /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
-            divSelect =
-                (CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT;
-
-            freqTmp =
-                ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_VIDEO_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_VIDEO_DENOM));
-
-            freq = freq * divSelect + (uint32_t)freqTmp;
-
-            /* VIDEO PLL output = PLL output frequency / POSTDIV. */
-
-            /*
-             * Post divider:
-             *
-             * PLL_VIDEO[POST_DIV_SELECT]:
-             * 0x00: 4
-             * 0x01: 2
-             * 0x02: 1
-             *
-             * MISC2[VIDEO_DIV]:
-             * 0x00: 1
-             * 0x01: 2
-             * 0x02: 1
-             * 0x03: 4
-             */
-            switch (CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK)
-            {
-                case CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(0U):
-                    freq = freq >> 2U;
-                    break;
-
-                case CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1U):
-                    freq = freq >> 1U;
-                    break;
-
-                default:
-                    break;
-            }
-
-            switch (CCM_ANALOG->MISC2 & CCM_ANALOG_MISC2_VIDEO_DIV_MASK)
-            {
-                case CCM_ANALOG_MISC2_VIDEO_DIV(3):
-                    freq >>= 2U;
-                    break;
-
-                case CCM_ANALOG_MISC2_VIDEO_DIV(1):
-                    freq >>= 1U;
-                    break;
-
-                default:
-                    break;
-            }
-            break;
-        case kCLOCK_PllEnet:
-            divSelect =
-                (CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT;
-            freq = enetRefClkFreq[divSelect];
-            break;
-
-        case kCLOCK_PllEnet25M:
-            /* ref_enetpll1 if fixed at 25MHz. */
-            freq = 25000000UL;
-            break;
-
-        case kCLOCK_PllUsb2:
-            freq = (freq * ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK) ? 22U : 20U));
-            break;
         default:
-            freq = 0U;
             break;
+        }
+
+        switch (CCM_ANALOG->MISC2 & (CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK | CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK)) {
+        case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(1) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(1):
+            freq >>= 2U;
+            break;
+
+        case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(0) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(1):
+            freq >>= 1U;
+            break;
+
+        default:
+            break;
+        }
+        break;
+
+    case kCLOCK_PllVideo:
+        /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
+        divSelect =
+            (CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT;
+
+        freqTmp =
+            ((uint64_t)freq * ((uint64_t)(CCM_ANALOG->PLL_VIDEO_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_VIDEO_DENOM));
+
+        freq = freq * divSelect + (uint32_t)freqTmp;
+
+        /* VIDEO PLL output = PLL output frequency / POSTDIV. */
+
+        /*
+         * Post divider:
+         *
+         * PLL_VIDEO[POST_DIV_SELECT]:
+         * 0x00: 4
+         * 0x01: 2
+         * 0x02: 1
+         *
+         * MISC2[VIDEO_DIV]:
+         * 0x00: 1
+         * 0x01: 2
+         * 0x02: 1
+         * 0x03: 4
+         */
+        switch (CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT_MASK) {
+        case CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(0U):
+            freq = freq >> 2U;
+            break;
+
+        case CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1U):
+            freq = freq >> 1U;
+            break;
+
+        default:
+            break;
+        }
+
+        switch (CCM_ANALOG->MISC2 & CCM_ANALOG_MISC2_VIDEO_DIV_MASK) {
+        case CCM_ANALOG_MISC2_VIDEO_DIV(3):
+            freq >>= 2U;
+            break;
+
+        case CCM_ANALOG_MISC2_VIDEO_DIV(1):
+            freq >>= 1U;
+            break;
+
+        default:
+            break;
+        }
+        break;
+    case kCLOCK_PllEnet:
+        divSelect =
+            (CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_ENET_DIV_SELECT_SHIFT;
+        freq = enetRefClkFreq[divSelect];
+        break;
+
+    case kCLOCK_PllEnet25M:
+        /* ref_enetpll1 if fixed at 25MHz. */
+        freq = 25000000UL;
+        break;
+
+    case kCLOCK_PllUsb2:
+        freq = (freq * ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK) ? 22U : 20U));
+        break;
+    default:
+        freq = 0U;
+        break;
     }
 
     return freq;
@@ -840,27 +793,26 @@ uint32_t CLOCK_GetSysPfdFreq(clock_pfd_t pfd)
 {
     uint32_t freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
 
-    switch (pfd)
-    {
-        case kCLOCK_Pfd0:
-            freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT);
-            break;
+    switch (pfd) {
+    case kCLOCK_Pfd0:
+        freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd1:
-            freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd1:
+        freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD1_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD1_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd2:
-            freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd2:
+        freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd3:
-            freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd3:
+        freq /= ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD3_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD3_FRAC_SHIFT);
+        break;
 
-        default:
-            freq = 0U;
-            break;
+    default:
+        freq = 0U;
+        break;
     }
     freq *= 18U;
 
@@ -871,27 +823,26 @@ uint32_t CLOCK_GetUsb1PfdFreq(clock_pfd_t pfd)
 {
     uint32_t freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
 
-    switch (pfd)
-    {
-        case kCLOCK_Pfd0:
-            freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT);
-            break;
+    switch (pfd) {
+    case kCLOCK_Pfd0:
+        freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd1:
-            freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd1:
+        freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD1_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD1_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd2:
-            freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd2:
+        freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD2_FRAC_SHIFT);
+        break;
 
-        case kCLOCK_Pfd3:
-            freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT);
-            break;
+    case kCLOCK_Pfd3:
+        freq /= ((CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD3_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD3_FRAC_SHIFT);
+        break;
 
-        default:
-            freq = 0U;
-            break;
+    default:
+        freq = 0U;
+        break;
     }
     freq *= 18U;
 
@@ -914,6 +865,6 @@ bool CLOCK_EnableUsbhs1PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)
 
 void CLOCK_DisableUsbhs1PhyPllClock(void)
 {
-    CCM_ANALOG->PLL_USB2 &= ~CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK; 
+    CCM_ANALOG->PLL_USB2 &= ~CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK;
     USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.h
index 6dbfe75d6..5e78a1c6a 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_clock.h
@@ -69,19 +69,19 @@
 #define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
 
 /* analog pll definition */
-#define CCM_ANALOG_PLL_BYPASS_SHIFT (16U)
-#define CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK (0xC000U)
+#define CCM_ANALOG_PLL_BYPASS_SHIFT         (16U)
+#define CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK  (0xC000U)
 #define CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT (14U)
 
 #include <stddef.h>
 
-#define CCM_TUPLE(reg, shift, mask, busyShift)                                                                     \
-    (((uint32_t)offsetof(CCM_Type,reg) & 0xFFU ) | ((shift) << 8U) | ((((mask) >> (shift)) & 0x1FFFU) << 13U) | \
+#define CCM_TUPLE(reg, shift, mask, busyShift)                                                                         \
+    (((uint32_t)offsetof(CCM_Type, reg) & 0xFFU) | ((shift) << 8U) | ((((mask) >> (shift)) & 0x1FFFU) << 13U) |        \
      ((busyShift) << 26U))
 
-#define CCM_TUPLE_REG(base, tuple) (*((volatile uint32_t *)(((uint32_t)(base)) + ((tuple)&0xFFU))))
-#define CCM_TUPLE_SHIFT(tuple) (((tuple) >> 8U) & 0x1FU)
-#define CCM_TUPLE_MASK(tuple) ((uint32_t)((((tuple) >> 13U) & 0x1FFFU) << ((((tuple) >> 8U) & 0x1FU))))
+#define CCM_TUPLE_REG(base, tuple)  (*((volatile uint32_t *)(((uint32_t)(base)) + ((tuple)&0xFFU))))
+#define CCM_TUPLE_SHIFT(tuple)      (((tuple) >> 8U) & 0x1FU)
+#define CCM_TUPLE_MASK(tuple)       ((uint32_t)((((tuple) >> 13U) & 0x1FFFU) << ((((tuple) >> 8U) & 0x1FU))))
 #define CCM_TUPLE_BUSY_SHIFT(tuple) (((tuple) >> 26U) & 0x3FU)
 
 #define CCM_NO_BUSY_WAIT (0x20U)
@@ -90,9 +90,9 @@
  * @brief CCM ANALOG tuple macros to map corresponding registers and bit fields.
  */
 
-#define CCM_ANALOG_TUPLE(reg, shift) ((((uint32_t)offsetof(CCM_ANALOG_Type,reg) & 0xFFFU) << 16U) | (shift))
+#define CCM_ANALOG_TUPLE(reg, shift)  ((((uint32_t)offsetof(CCM_ANALOG_Type, reg) & 0xFFFU) << 16U) | (shift))
 #define CCM_ANALOG_TUPLE_SHIFT(tuple) (((uint32_t)tuple) & 0x1FU)
-#define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) \
+#define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off)                                                                     \
     (*((volatile uint32_t *)((uint32_t)base + (((uint32_t)tuple >> 16U) & 0xFFFU) + off)))
 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U)
 
@@ -121,289 +121,288 @@ extern uint32_t g_xtalFreq;
 extern uint32_t g_rtcXtalFreq;
 
 /* For compatible with other platforms */
-#define CLOCK_SetXtal0Freq CLOCK_SetXtalFreq
+#define CLOCK_SetXtal0Freq  CLOCK_SetXtalFreq
 #define CLOCK_SetXtal32Freq CLOCK_SetRtcXtalFreq
 
 /*! @brief Clock ip name array for ADC. */
-#define ADC_CLOCKS                                 \
-    {                                              \
-        kCLOCK_IpInvalid, kCLOCK_Adc1, kCLOCK_Adc2 \
+#define ADC_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Adc1, kCLOCK_Adc2                                                                     \
     }
 
 /*! @brief Clock ip name array for AOI. */
-#define AOI_CLOCKS                                 \
-    {                                              \
-        kCLOCK_IpInvalid, kCLOCK_Aoi1, kCLOCK_Aoi2 \
+#define AOI_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Aoi1, kCLOCK_Aoi2                                                                     \
     }
 
 /*! @brief Clock ip name array for BEE. */
-#define BEE_CLOCKS \
-    {              \
-        kCLOCK_Bee \
+#define BEE_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Bee                                                                                                     \
     }
 
 /*! @brief Clock ip name array for CMP. */
-#define CMP_CLOCKS                                                               \
-    {                                                                            \
-        kCLOCK_IpInvalid, kCLOCK_Acmp1, kCLOCK_Acmp2, kCLOCK_Acmp3, kCLOCK_Acmp4 \
+#define CMP_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Acmp1, kCLOCK_Acmp2, kCLOCK_Acmp3, kCLOCK_Acmp4                                       \
     }
 
 /*! @brief Clock ip name array for CSI. */
-#define CSI_CLOCKS \
-    {              \
-        kCLOCK_Csi \
+#define CSI_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Csi                                                                                                     \
     }
 
 /*! @brief Clock ip name array for DCDC. */
-#define DCDC_CLOCKS \
-    {               \
-        kCLOCK_Dcdc \
+#define DCDC_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_Dcdc                                                                                                    \
     }
 
 /*! @brief Clock ip name array for DCP. */
-#define DCP_CLOCKS \
-    {              \
-        kCLOCK_Dcp \
+#define DCP_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Dcp                                                                                                     \
     }
 
 /*! @brief Clock ip name array for DMAMUX_CLOCKS. */
-#define DMAMUX_CLOCKS \
-    {                 \
-        kCLOCK_Dma    \
+#define DMAMUX_CLOCKS                                                                                                  \
+    {                                                                                                                  \
+        kCLOCK_Dma                                                                                                     \
     }
 
 /*! @brief Clock ip name array for DMA. */
-#define EDMA_CLOCKS \
-    {               \
-        kCLOCK_Dma  \
+#define EDMA_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_Dma                                                                                                     \
     }
 
 /*! @brief Clock ip name array for ENC. */
-#define ENC_CLOCKS                                                           \
-    {                                                                        \
-        kCLOCK_IpInvalid, kCLOCK_Enc1, kCLOCK_Enc2, kCLOCK_Enc3, kCLOCK_Enc4 \
+#define ENC_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Enc1, kCLOCK_Enc2, kCLOCK_Enc3, kCLOCK_Enc4                                           \
     }
 
 /*! @brief Clock ip name array for ENET. */
-#define ENET_CLOCKS \
-    {               \
-        kCLOCK_Enet \
+#define ENET_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_Enet                                                                                                    \
     }
 
 /*! @brief Clock ip name array for EWM. */
-#define EWM_CLOCKS  \
-    {               \
-        kCLOCK_Ewm0 \
+#define EWM_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Ewm0                                                                                                    \
     }
 
 /*! @brief Clock ip name array for FLEXCAN. */
-#define FLEXCAN_CLOCKS                             \
-    {                                              \
-        kCLOCK_IpInvalid, kCLOCK_Can1, kCLOCK_Can2 \
+#define FLEXCAN_CLOCKS                                                                                                 \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Can1, kCLOCK_Can2                                                                     \
     }
 
 /*! @brief Clock ip name array for FLEXCAN Peripheral clock. */
-#define FLEXCAN_PERIPH_CLOCKS                        \
-    {                                                \
-        kCLOCK_IpInvalid, kCLOCK_Can1S, kCLOCK_Can2S \
+#define FLEXCAN_PERIPH_CLOCKS                                                                                          \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Can1S, kCLOCK_Can2S                                                                   \
     }
 
 /*! @brief Clock ip name array for FLEXIO. */
-#define FLEXIO_CLOCKS                                    \
-    {                                                    \
-        kCLOCK_IpInvalid, kCLOCK_Flexio1, kCLOCK_Flexio2 \
+#define FLEXIO_CLOCKS                                                                                                  \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Flexio1, kCLOCK_Flexio2                                                               \
     }
 
 /*! @brief Clock ip name array for FLEXRAM. */
-#define FLEXRAM_CLOCKS \
-    {                  \
-        kCLOCK_FlexRam \
+#define FLEXRAM_CLOCKS                                                                                                 \
+    {                                                                                                                  \
+        kCLOCK_FlexRam                                                                                                 \
     }
 
 /*! @brief Clock ip name array for FLEXSPI. */
-#define FLEXSPI_CLOCKS \
-    {                  \
-        kCLOCK_FlexSpi \
+#define FLEXSPI_CLOCKS                                                                                                 \
+    {                                                                                                                  \
+        kCLOCK_FlexSpi                                                                                                 \
     }
 
 /*! @brief Clock ip name array for FLEXSPI EXSC. */
-#define FLEXSPI_EXSC_CLOCKS \
-    {                       \
-        kCLOCK_FlexSpiExsc  \
+#define FLEXSPI_EXSC_CLOCKS                                                                                            \
+    {                                                                                                                  \
+        kCLOCK_FlexSpiExsc                                                                                             \
     }
 
 /*! @brief Clock ip name array for GPIO. */
-#define GPIO_CLOCKS                                                                            \
-    {                                                                                          \
-        kCLOCK_IpInvalid, kCLOCK_Gpio1, kCLOCK_Gpio2, kCLOCK_Gpio3, kCLOCK_Gpio4, kCLOCK_Gpio5 \
+#define GPIO_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Gpio1, kCLOCK_Gpio2, kCLOCK_Gpio3, kCLOCK_Gpio4, kCLOCK_Gpio5                         \
     }
 
 /*! @brief Clock ip name array for GPT. */
-#define GPT_CLOCKS                                 \
-    {                                              \
-        kCLOCK_IpInvalid, kCLOCK_Gpt1, kCLOCK_Gpt2 \
+#define GPT_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Gpt1, kCLOCK_Gpt2                                                                     \
     }
 
 /*! @brief Clock ip name array for KPP. */
-#define KPP_CLOCKS \
-    {              \
-        kCLOCK_Kpp \
+#define KPP_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Kpp                                                                                                     \
     }
 
 /*! @brief Clock ip name array for LCDIF. */
-#define LCDIF_CLOCKS \
-    {                \
-        kCLOCK_Lcd   \
+#define LCDIF_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_Lcd                                                                                                     \
     }
 
 /*! @brief Clock ip name array for LCDIF PIXEL. */
-#define LCDIF_PERIPH_CLOCKS \
-    {                       \
-        kCLOCK_LcdPixel     \
+#define LCDIF_PERIPH_CLOCKS                                                                                            \
+    {                                                                                                                  \
+        kCLOCK_LcdPixel                                                                                                \
     }
 
 /*! @brief Clock ip name array for LPI2C. */
-#define LPI2C_CLOCKS                                                                 \
-    {                                                                                \
-        kCLOCK_IpInvalid, kCLOCK_Lpi2c1, kCLOCK_Lpi2c2, kCLOCK_Lpi2c3, kCLOCK_Lpi2c4 \
+#define LPI2C_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Lpi2c1, kCLOCK_Lpi2c2, kCLOCK_Lpi2c3, kCLOCK_Lpi2c4                                   \
     }
 
 /*! @brief Clock ip name array for LPSPI. */
-#define LPSPI_CLOCKS                                                                 \
-    {                                                                                \
-        kCLOCK_IpInvalid, kCLOCK_Lpspi1, kCLOCK_Lpspi2, kCLOCK_Lpspi3, kCLOCK_Lpspi4 \
+#define LPSPI_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Lpspi1, kCLOCK_Lpspi2, kCLOCK_Lpspi3, kCLOCK_Lpspi4                                   \
     }
 
 /*! @brief Clock ip name array for LPUART. */
-#define LPUART_CLOCKS                                                                                     \
-    {                                                                                                     \
-        kCLOCK_IpInvalid, kCLOCK_Lpuart1, kCLOCK_Lpuart2, kCLOCK_Lpuart3, kCLOCK_Lpuart4, kCLOCK_Lpuart5, \
-            kCLOCK_Lpuart6, kCLOCK_Lpuart7, kCLOCK_Lpuart8                                                \
+#define LPUART_CLOCKS                                                                                                  \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Lpuart1, kCLOCK_Lpuart2, kCLOCK_Lpuart3, kCLOCK_Lpuart4, kCLOCK_Lpuart5,              \
+            kCLOCK_Lpuart6, kCLOCK_Lpuart7, kCLOCK_Lpuart8                                                             \
     }
 
 /*! @brief Clock ip name array for MQS. */
-#define MQS_CLOCKS \
-    {              \
-        kCLOCK_Mqs \
+#define MQS_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Mqs                                                                                                     \
     }
 
 /*! @brief Clock ip name array for OCRAM EXSC. */
-#define OCRAM_EXSC_CLOCKS \
-    {                     \
-        kCLOCK_OcramExsc  \
+#define OCRAM_EXSC_CLOCKS                                                                                              \
+    {                                                                                                                  \
+        kCLOCK_OcramExsc                                                                                               \
     }
 
 /*! @brief Clock ip name array for PIT. */
-#define PIT_CLOCKS \
-    {              \
-        kCLOCK_Pit \
+#define PIT_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Pit                                                                                                     \
     }
 
 /*! @brief Clock ip name array for PWM. */
-#define PWM_CLOCKS                                                                                                    \
-    {                                                                                                                 \
-        {                                                                                                             \
-            kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid                                    \
-        }                                                                                                             \
-        , {kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1}, {kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2}, \
-            {kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3},                                                     \
-        {                                                                                                             \
-            kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4                                                        \
-        }                                                                                                             \
+#define PWM_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        {kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid},                                      \
+            {kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1},                                                      \
+            {kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2},                                                      \
+            {kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3},                                                      \
+        {                                                                                                              \
+            kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4                                                         \
+        }                                                                                                              \
     }
 
 /*! @brief Clock ip name array for PXP. */
-#define PXP_CLOCKS \
-    {              \
-        kCLOCK_Pxp \
+#define PXP_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Pxp                                                                                                     \
     }
 
 /*! @brief Clock ip name array for RTWDOG. */
-#define RTWDOG_CLOCKS \
-    {                 \
-        kCLOCK_Wdog3  \
+#define RTWDOG_CLOCKS                                                                                                  \
+    {                                                                                                                  \
+        kCLOCK_Wdog3                                                                                                   \
     }
 
 /*! @brief Clock ip name array for SAI. */
-#define SAI_CLOCKS                                              \
-    {                                                           \
-        kCLOCK_IpInvalid, kCLOCK_Sai1, kCLOCK_Sai2, kCLOCK_Sai3 \
+#define SAI_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Sai1, kCLOCK_Sai2, kCLOCK_Sai3                                                        \
     }
 
 /*! @brief Clock ip name array for SEMC. */
-#define SEMC_CLOCKS \
-    {               \
-        kCLOCK_Semc \
+#define SEMC_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_Semc                                                                                                    \
     }
 
 /*! @brief Clock ip name array for SEMC EXSC. */
-#define SEMC_EXSC_CLOCKS \
-    {                    \
-        kCLOCK_SemcExsc  \
+#define SEMC_EXSC_CLOCKS                                                                                               \
+    {                                                                                                                  \
+        kCLOCK_SemcExsc                                                                                                \
     }
 
 /*! @brief Clock ip name array for QTIMER. */
-#define TMR_CLOCKS                                                                   \
-    {                                                                                \
-        kCLOCK_IpInvalid, kCLOCK_Timer1, kCLOCK_Timer2, kCLOCK_Timer3, kCLOCK_Timer4 \
+#define TMR_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Timer1, kCLOCK_Timer2, kCLOCK_Timer3, kCLOCK_Timer4                                   \
     }
 
 /*! @brief Clock ip name array for TRNG. */
-#define TRNG_CLOCKS \
-    {               \
-        kCLOCK_Trng \
+#define TRNG_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_Trng                                                                                                    \
     }
 
 /*! @brief Clock ip name array for TSC. */
-#define TSC_CLOCKS \
-    {              \
-        kCLOCK_Tsc \
+#define TSC_CLOCKS                                                                                                     \
+    {                                                                                                                  \
+        kCLOCK_Tsc                                                                                                     \
     }
 
 /*! @brief Clock ip name array for WDOG. */
-#define WDOG_CLOCKS                                  \
-    {                                                \
-        kCLOCK_IpInvalid, kCLOCK_Wdog1, kCLOCK_Wdog2 \
+#define WDOG_CLOCKS                                                                                                    \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Wdog1, kCLOCK_Wdog2                                                                   \
     }
 
 /*! @brief Clock ip name array for USDHC. */
-#define USDHC_CLOCKS                                   \
-    {                                                  \
-        kCLOCK_IpInvalid, kCLOCK_Usdhc1, kCLOCK_Usdhc2 \
+#define USDHC_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_Usdhc1, kCLOCK_Usdhc2                                                                 \
     }
 
 /*! @brief Clock ip name array for SPDIF. */
-#define SPDIF_CLOCKS \
-    {                \
-        kCLOCK_Spdif \
+#define SPDIF_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_Spdif                                                                                                   \
     }
 
 /*! @brief Clock ip name array for XBARA. */
-#define XBARA_CLOCKS \
-    {                \
-        kCLOCK_Xbar1 \
+#define XBARA_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_Xbar1                                                                                                   \
     }
 
 /*! @brief Clock ip name array for XBARB. */
-#define XBARB_CLOCKS                                                   \
-    {                                                                  \
-        kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_Xbar2, kCLOCK_Xbar3 \
+#define XBARB_CLOCKS                                                                                                   \
+    {                                                                                                                  \
+        kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_Xbar2, kCLOCK_Xbar3                                                 \
     }
 
 /*! @brief Clock name used to get clock frequency. */
 typedef enum _clock_name
 {
-    kCLOCK_CpuClk = 0x0U,  /*!< CPU clock */
-    kCLOCK_AhbClk = 0x1U,  /*!< AHB clock */
+    kCLOCK_CpuClk  = 0x0U, /*!< CPU clock */
+    kCLOCK_AhbClk  = 0x1U, /*!< AHB clock */
     kCLOCK_SemcClk = 0x2U, /*!< SEMC clock */
-    kCLOCK_IpgClk = 0x3U,  /*!< IPG clock */
+    kCLOCK_IpgClk  = 0x3U, /*!< IPG clock */
 
     kCLOCK_OscClk = 0x4U, /*!< OSC clock selected by PMU_LOWPWR_CTRL[OSC_SEL]. */
     kCLOCK_RtcClk = 0x5U, /*!< RTC clock. (RTCCLK) */
 
     kCLOCK_ArmPllClk = 0x6U, /*!< ARMPLLCLK. */
 
-    kCLOCK_Usb1PllClk = 0x7U,     /*!< USB1PLLCLK. */
+    kCLOCK_Usb1PllClk     = 0x7U, /*!< USB1PLLCLK. */
     kCLOCK_Usb1PllPfd0Clk = 0x8U, /*!< USB1PLLPDF0CLK. */
     kCLOCK_Usb1PllPfd1Clk = 0x9U, /*!< USB1PLLPFD1CLK. */
     kCLOCK_Usb1PllPfd2Clk = 0xAU, /*!< USB1PLLPFD2CLK. */
@@ -411,7 +410,7 @@ typedef enum _clock_name
 
     kCLOCK_Usb2PllClk = 0xCU, /*!< USB2PLLCLK. */
 
-    kCLOCK_SysPllClk = 0xDU,      /*!< SYSPLLCLK. */
+    kCLOCK_SysPllClk     = 0xDU,  /*!< SYSPLLCLK. */
     kCLOCK_SysPllPfd0Clk = 0xEU,  /*!< SYSPLLPDF0CLK. */
     kCLOCK_SysPllPfd1Clk = 0xFU,  /*!< SYSPLLPFD1CLK. */
     kCLOCK_SysPllPfd2Clk = 0x10U, /*!< SYSPLLPFD2CLK. */
@@ -424,7 +423,7 @@ typedef enum _clock_name
     kCLOCK_VideoPllClk = 0x15U, /*!< Video PLLCLK. */
 } clock_name_t;
 
-#define kCLOCK_CoreSysClk kCLOCK_CpuClk             /*!< For compatible with other platforms without CCM. */
+#define kCLOCK_CoreSysClk       kCLOCK_CpuClk       /*!< For compatible with other platforms without CCM. */
 #define CLOCK_GetCoreSysClkFreq CLOCK_GetCpuClkFreq /*!< For compatible with other platforms without CCM. */
 
 /*!
@@ -435,151 +434,151 @@ typedef enum _clock_ip_name
     kCLOCK_IpInvalid = -1,
 
     /* CCM CCGR0 */
-    kCLOCK_Aips_tz1 = (0U << 8U) | CCM_CCGR0_CG0_SHIFT,    /*!< CCGR0, CG0   */
-    kCLOCK_Aips_tz2 = (0U << 8U) | CCM_CCGR0_CG1_SHIFT,    /*!< CCGR0, CG1   */
-    kCLOCK_Mqs = (0U << 8U) | CCM_CCGR0_CG2_SHIFT,         /*!< CCGR0, CG2   */
-    kCLOCK_FlexSpiExsc = (0U << 8U) | CCM_CCGR0_CG3_SHIFT, /*!< CCGR0, CG3   */
-    kCLOCK_Sim_M_Main = (0U << 8U) | CCM_CCGR0_CG4_SHIFT,  /*!< CCGR0, CG4   */
-    kCLOCK_Dcp = (0U << 8U) | CCM_CCGR0_CG5_SHIFT,         /*!< CCGR0, CG5   */
-    kCLOCK_Lpuart3 = (0U << 8U) | CCM_CCGR0_CG6_SHIFT,     /*!< CCGR0, CG6   */
-    kCLOCK_Can1 = (0U << 8U) | CCM_CCGR0_CG7_SHIFT,        /*!< CCGR0, CG7   */
-    kCLOCK_Can1S = (0U << 8U) | CCM_CCGR0_CG8_SHIFT,       /*!< CCGR0, CG8   */
-    kCLOCK_Can2 = (0U << 8U) | CCM_CCGR0_CG9_SHIFT,        /*!< CCGR0, CG9   */
-    kCLOCK_Can2S = (0U << 8U) | CCM_CCGR0_CG10_SHIFT,      /*!< CCGR0, CG10  */
-    kCLOCK_Trace = (0U << 8U) | CCM_CCGR0_CG11_SHIFT,      /*!< CCGR0, CG11  */
-    kCLOCK_Gpt2 = (0U << 8U) | CCM_CCGR0_CG12_SHIFT,       /*!< CCGR0, CG12  */
-    kCLOCK_Gpt2S = (0U << 8U) | CCM_CCGR0_CG13_SHIFT,      /*!< CCGR0, CG13  */
-    kCLOCK_Lpuart2 = (0U << 8U) | CCM_CCGR0_CG14_SHIFT,    /*!< CCGR0, CG14  */
-    kCLOCK_Gpio2 = (0U << 8U) | CCM_CCGR0_CG15_SHIFT,      /*!< CCGR0, CG15  */
+    kCLOCK_Aips_tz1    = (0U << 8U) | CCM_CCGR0_CG0_SHIFT,  /*!< CCGR0, CG0   */
+    kCLOCK_Aips_tz2    = (0U << 8U) | CCM_CCGR0_CG1_SHIFT,  /*!< CCGR0, CG1   */
+    kCLOCK_Mqs         = (0U << 8U) | CCM_CCGR0_CG2_SHIFT,  /*!< CCGR0, CG2   */
+    kCLOCK_FlexSpiExsc = (0U << 8U) | CCM_CCGR0_CG3_SHIFT,  /*!< CCGR0, CG3   */
+    kCLOCK_Sim_M_Main  = (0U << 8U) | CCM_CCGR0_CG4_SHIFT,  /*!< CCGR0, CG4   */
+    kCLOCK_Dcp         = (0U << 8U) | CCM_CCGR0_CG5_SHIFT,  /*!< CCGR0, CG5   */
+    kCLOCK_Lpuart3     = (0U << 8U) | CCM_CCGR0_CG6_SHIFT,  /*!< CCGR0, CG6   */
+    kCLOCK_Can1        = (0U << 8U) | CCM_CCGR0_CG7_SHIFT,  /*!< CCGR0, CG7   */
+    kCLOCK_Can1S       = (0U << 8U) | CCM_CCGR0_CG8_SHIFT,  /*!< CCGR0, CG8   */
+    kCLOCK_Can2        = (0U << 8U) | CCM_CCGR0_CG9_SHIFT,  /*!< CCGR0, CG9   */
+    kCLOCK_Can2S       = (0U << 8U) | CCM_CCGR0_CG10_SHIFT, /*!< CCGR0, CG10  */
+    kCLOCK_Trace       = (0U << 8U) | CCM_CCGR0_CG11_SHIFT, /*!< CCGR0, CG11  */
+    kCLOCK_Gpt2        = (0U << 8U) | CCM_CCGR0_CG12_SHIFT, /*!< CCGR0, CG12  */
+    kCLOCK_Gpt2S       = (0U << 8U) | CCM_CCGR0_CG13_SHIFT, /*!< CCGR0, CG13  */
+    kCLOCK_Lpuart2     = (0U << 8U) | CCM_CCGR0_CG14_SHIFT, /*!< CCGR0, CG14  */
+    kCLOCK_Gpio2       = (0U << 8U) | CCM_CCGR0_CG15_SHIFT, /*!< CCGR0, CG15  */
 
     /* CCM CCGR1 */
-    kCLOCK_Lpspi1 = (1U << 8U) | CCM_CCGR1_CG0_SHIFT,   /*!< CCGR1, CG0   */
-    kCLOCK_Lpspi2 = (1U << 8U) | CCM_CCGR1_CG1_SHIFT,   /*!< CCGR1, CG1   */
-    kCLOCK_Lpspi3 = (1U << 8U) | CCM_CCGR1_CG2_SHIFT,   /*!< CCGR1, CG2   */
-    kCLOCK_Lpspi4 = (1U << 8U) | CCM_CCGR1_CG3_SHIFT,   /*!< CCGR1, CG3   */
-    kCLOCK_Adc2 = (1U << 8U) | CCM_CCGR1_CG4_SHIFT,     /*!< CCGR1, CG4   */
-    kCLOCK_Enet = (1U << 8U) | CCM_CCGR1_CG5_SHIFT,     /*!< CCGR1, CG5   */
-    kCLOCK_Pit = (1U << 8U) | CCM_CCGR1_CG6_SHIFT,      /*!< CCGR1, CG6   */
-    kCLOCK_Aoi2 = (1U << 8U) | CCM_CCGR1_CG7_SHIFT,     /*!< CCGR1, CG7   */
-    kCLOCK_Adc1 = (1U << 8U) | CCM_CCGR1_CG8_SHIFT,     /*!< CCGR1, CG8   */
-    kCLOCK_SemcExsc = (1U << 8U) | CCM_CCGR1_CG9_SHIFT, /*!< CCGR1, CG9   */
-    kCLOCK_Gpt1 = (1U << 8U) | CCM_CCGR1_CG10_SHIFT,    /*!< CCGR1, CG10  */
-    kCLOCK_Gpt1S = (1U << 8U) | CCM_CCGR1_CG11_SHIFT,   /*!< CCGR1, CG11  */
-    kCLOCK_Lpuart4 = (1U << 8U) | CCM_CCGR1_CG12_SHIFT, /*!< CCGR1, CG12  */
-    kCLOCK_Gpio1 = (1U << 8U) | CCM_CCGR1_CG13_SHIFT,   /*!< CCGR1, CG13  */
-    kCLOCK_Csu = (1U << 8U) | CCM_CCGR1_CG14_SHIFT,     /*!< CCGR1, CG14  */
-    kCLOCK_Gpio5 = (1U << 8U) | CCM_CCGR1_CG15_SHIFT,   /*!< CCGR1, CG15  */
+    kCLOCK_Lpspi1   = (1U << 8U) | CCM_CCGR1_CG0_SHIFT,  /*!< CCGR1, CG0   */
+    kCLOCK_Lpspi2   = (1U << 8U) | CCM_CCGR1_CG1_SHIFT,  /*!< CCGR1, CG1   */
+    kCLOCK_Lpspi3   = (1U << 8U) | CCM_CCGR1_CG2_SHIFT,  /*!< CCGR1, CG2   */
+    kCLOCK_Lpspi4   = (1U << 8U) | CCM_CCGR1_CG3_SHIFT,  /*!< CCGR1, CG3   */
+    kCLOCK_Adc2     = (1U << 8U) | CCM_CCGR1_CG4_SHIFT,  /*!< CCGR1, CG4   */
+    kCLOCK_Enet     = (1U << 8U) | CCM_CCGR1_CG5_SHIFT,  /*!< CCGR1, CG5   */
+    kCLOCK_Pit      = (1U << 8U) | CCM_CCGR1_CG6_SHIFT,  /*!< CCGR1, CG6   */
+    kCLOCK_Aoi2     = (1U << 8U) | CCM_CCGR1_CG7_SHIFT,  /*!< CCGR1, CG7   */
+    kCLOCK_Adc1     = (1U << 8U) | CCM_CCGR1_CG8_SHIFT,  /*!< CCGR1, CG8   */
+    kCLOCK_SemcExsc = (1U << 8U) | CCM_CCGR1_CG9_SHIFT,  /*!< CCGR1, CG9   */
+    kCLOCK_Gpt1     = (1U << 8U) | CCM_CCGR1_CG10_SHIFT, /*!< CCGR1, CG10  */
+    kCLOCK_Gpt1S    = (1U << 8U) | CCM_CCGR1_CG11_SHIFT, /*!< CCGR1, CG11  */
+    kCLOCK_Lpuart4  = (1U << 8U) | CCM_CCGR1_CG12_SHIFT, /*!< CCGR1, CG12  */
+    kCLOCK_Gpio1    = (1U << 8U) | CCM_CCGR1_CG13_SHIFT, /*!< CCGR1, CG13  */
+    kCLOCK_Csu      = (1U << 8U) | CCM_CCGR1_CG14_SHIFT, /*!< CCGR1, CG14  */
+    kCLOCK_Gpio5    = (1U << 8U) | CCM_CCGR1_CG15_SHIFT, /*!< CCGR1, CG15  */
 
     /* CCM CCGR2 */
-    kCLOCK_OcramExsc = (2U << 8U) | CCM_CCGR2_CG0_SHIFT,  /*!< CCGR2, CG0   */
-    kCLOCK_Csi = (2U << 8U) | CCM_CCGR2_CG1_SHIFT,        /*!< CCGR2, CG1   */
-    kCLOCK_IomuxcSnvs = (2U << 8U) | CCM_CCGR2_CG2_SHIFT, /*!< CCGR2, CG2   */
-    kCLOCK_Lpi2c1 = (2U << 8U) | CCM_CCGR2_CG3_SHIFT,     /*!< CCGR2, CG3   */
-    kCLOCK_Lpi2c2 = (2U << 8U) | CCM_CCGR2_CG4_SHIFT,     /*!< CCGR2, CG4   */
-    kCLOCK_Lpi2c3 = (2U << 8U) | CCM_CCGR2_CG5_SHIFT,     /*!< CCGR2, CG5   */
-    kCLOCK_Ocotp = (2U << 8U) | CCM_CCGR2_CG6_SHIFT,      /*!< CCGR2, CG6   */
-    kCLOCK_Xbar3 = (2U << 8U) | CCM_CCGR2_CG7_SHIFT,      /*!< CCGR2, CG7   */
-    kCLOCK_Ipmux1 = (2U << 8U) | CCM_CCGR2_CG8_SHIFT,     /*!< CCGR2, CG8   */
-    kCLOCK_Ipmux2 = (2U << 8U) | CCM_CCGR2_CG9_SHIFT,     /*!< CCGR2, CG9   */
-    kCLOCK_Ipmux3 = (2U << 8U) | CCM_CCGR2_CG10_SHIFT,    /*!< CCGR2, CG10  */
-    kCLOCK_Xbar1 = (2U << 8U) | CCM_CCGR2_CG11_SHIFT,     /*!< CCGR2, CG11  */
-    kCLOCK_Xbar2 = (2U << 8U) | CCM_CCGR2_CG12_SHIFT,     /*!< CCGR2, CG12  */
-    kCLOCK_Gpio3 = (2U << 8U) | CCM_CCGR2_CG13_SHIFT,     /*!< CCGR2, CG13  */
-    kCLOCK_Lcd = (2U << 8U) | CCM_CCGR2_CG14_SHIFT,       /*!< CCGR2, CG14  */
-    kCLOCK_Pxp = (2U << 8U) | CCM_CCGR2_CG15_SHIFT,       /*!< CCGR2, CG15  */
+    kCLOCK_OcramExsc  = (2U << 8U) | CCM_CCGR2_CG0_SHIFT,  /*!< CCGR2, CG0   */
+    kCLOCK_Csi        = (2U << 8U) | CCM_CCGR2_CG1_SHIFT,  /*!< CCGR2, CG1   */
+    kCLOCK_IomuxcSnvs = (2U << 8U) | CCM_CCGR2_CG2_SHIFT,  /*!< CCGR2, CG2   */
+    kCLOCK_Lpi2c1     = (2U << 8U) | CCM_CCGR2_CG3_SHIFT,  /*!< CCGR2, CG3   */
+    kCLOCK_Lpi2c2     = (2U << 8U) | CCM_CCGR2_CG4_SHIFT,  /*!< CCGR2, CG4   */
+    kCLOCK_Lpi2c3     = (2U << 8U) | CCM_CCGR2_CG5_SHIFT,  /*!< CCGR2, CG5   */
+    kCLOCK_Ocotp      = (2U << 8U) | CCM_CCGR2_CG6_SHIFT,  /*!< CCGR2, CG6   */
+    kCLOCK_Xbar3      = (2U << 8U) | CCM_CCGR2_CG7_SHIFT,  /*!< CCGR2, CG7   */
+    kCLOCK_Ipmux1     = (2U << 8U) | CCM_CCGR2_CG8_SHIFT,  /*!< CCGR2, CG8   */
+    kCLOCK_Ipmux2     = (2U << 8U) | CCM_CCGR2_CG9_SHIFT,  /*!< CCGR2, CG9   */
+    kCLOCK_Ipmux3     = (2U << 8U) | CCM_CCGR2_CG10_SHIFT, /*!< CCGR2, CG10  */
+    kCLOCK_Xbar1      = (2U << 8U) | CCM_CCGR2_CG11_SHIFT, /*!< CCGR2, CG11  */
+    kCLOCK_Xbar2      = (2U << 8U) | CCM_CCGR2_CG12_SHIFT, /*!< CCGR2, CG12  */
+    kCLOCK_Gpio3      = (2U << 8U) | CCM_CCGR2_CG13_SHIFT, /*!< CCGR2, CG13  */
+    kCLOCK_Lcd        = (2U << 8U) | CCM_CCGR2_CG14_SHIFT, /*!< CCGR2, CG14  */
+    kCLOCK_Pxp        = (2U << 8U) | CCM_CCGR2_CG15_SHIFT, /*!< CCGR2, CG15  */
 
     /* CCM CCGR3 */
-    kCLOCK_Flexio2 = (3U << 8U) | CCM_CCGR3_CG0_SHIFT,        /*!< CCGR3, CG0   */
-    kCLOCK_Lpuart5 = (3U << 8U) | CCM_CCGR3_CG1_SHIFT,        /*!< CCGR3, CG1   */
-    kCLOCK_Semc = (3U << 8U) | CCM_CCGR3_CG2_SHIFT,           /*!< CCGR3, CG2   */
-    kCLOCK_Lpuart6 = (3U << 8U) | CCM_CCGR3_CG3_SHIFT,        /*!< CCGR3, CG3   */
-    kCLOCK_Aoi1 = (3U << 8U) | CCM_CCGR3_CG4_SHIFT,           /*!< CCGR3, CG4   */
-    kCLOCK_LcdPixel = (3U << 8U) | CCM_CCGR3_CG5_SHIFT,       /*!< CCGR3, CG5   */
-    kCLOCK_Gpio4 = (3U << 8U) | CCM_CCGR3_CG6_SHIFT,          /*!< CCGR3, CG6   */
-    kCLOCK_Ewm0 = (3U << 8U) | CCM_CCGR3_CG7_SHIFT,           /*!< CCGR3, CG7   */
-    kCLOCK_Wdog1 = (3U << 8U) | CCM_CCGR3_CG8_SHIFT,          /*!< CCGR3, CG8   */
-    kCLOCK_FlexRam = (3U << 8U) | CCM_CCGR3_CG9_SHIFT,        /*!< CCGR3, CG9   */
-    kCLOCK_Acmp1 = (3U << 8U) | CCM_CCGR3_CG10_SHIFT,         /*!< CCGR3, CG10  */
-    kCLOCK_Acmp2 = (3U << 8U) | CCM_CCGR3_CG11_SHIFT,         /*!< CCGR3, CG11  */
-    kCLOCK_Acmp3 = (3U << 8U) | CCM_CCGR3_CG12_SHIFT,         /*!< CCGR3, CG12  */
-    kCLOCK_Acmp4 = (3U << 8U) | CCM_CCGR3_CG13_SHIFT,         /*!< CCGR3, CG13  */
-    kCLOCK_Ocram = (3U << 8U) | CCM_CCGR3_CG14_SHIFT,         /*!< CCGR3, CG14  */
+    kCLOCK_Flexio2       = (3U << 8U) | CCM_CCGR3_CG0_SHIFT,  /*!< CCGR3, CG0   */
+    kCLOCK_Lpuart5       = (3U << 8U) | CCM_CCGR3_CG1_SHIFT,  /*!< CCGR3, CG1   */
+    kCLOCK_Semc          = (3U << 8U) | CCM_CCGR3_CG2_SHIFT,  /*!< CCGR3, CG2   */
+    kCLOCK_Lpuart6       = (3U << 8U) | CCM_CCGR3_CG3_SHIFT,  /*!< CCGR3, CG3   */
+    kCLOCK_Aoi1          = (3U << 8U) | CCM_CCGR3_CG4_SHIFT,  /*!< CCGR3, CG4   */
+    kCLOCK_LcdPixel      = (3U << 8U) | CCM_CCGR3_CG5_SHIFT,  /*!< CCGR3, CG5   */
+    kCLOCK_Gpio4         = (3U << 8U) | CCM_CCGR3_CG6_SHIFT,  /*!< CCGR3, CG6   */
+    kCLOCK_Ewm0          = (3U << 8U) | CCM_CCGR3_CG7_SHIFT,  /*!< CCGR3, CG7   */
+    kCLOCK_Wdog1         = (3U << 8U) | CCM_CCGR3_CG8_SHIFT,  /*!< CCGR3, CG8   */
+    kCLOCK_FlexRam       = (3U << 8U) | CCM_CCGR3_CG9_SHIFT,  /*!< CCGR3, CG9   */
+    kCLOCK_Acmp1         = (3U << 8U) | CCM_CCGR3_CG10_SHIFT, /*!< CCGR3, CG10  */
+    kCLOCK_Acmp2         = (3U << 8U) | CCM_CCGR3_CG11_SHIFT, /*!< CCGR3, CG11  */
+    kCLOCK_Acmp3         = (3U << 8U) | CCM_CCGR3_CG12_SHIFT, /*!< CCGR3, CG12  */
+    kCLOCK_Acmp4         = (3U << 8U) | CCM_CCGR3_CG13_SHIFT, /*!< CCGR3, CG13  */
+    kCLOCK_Ocram         = (3U << 8U) | CCM_CCGR3_CG14_SHIFT, /*!< CCGR3, CG14  */
     kCLOCK_IomuxcSnvsGpr = (3U << 8U) | CCM_CCGR3_CG15_SHIFT, /*!< CCGR3, CG15  */
 
     /* CCM CCGR4 */
-    kCLOCK_Iomuxc = (4U << 8U) | CCM_CCGR4_CG1_SHIFT,    /*!< CCGR4, CG1   */
-    kCLOCK_IomuxcGpr = (4U << 8U) | CCM_CCGR4_CG2_SHIFT, /*!< CCGR4, CG2   */
-    kCLOCK_Bee = (4U << 8U) | CCM_CCGR4_CG3_SHIFT,       /*!< CCGR4, CG3   */
-    kCLOCK_SimM7 = (4U << 8U) | CCM_CCGR4_CG4_SHIFT,     /*!< CCGR4, CG4   */
-    kCLOCK_Tsc = (4U << 8U) | CCM_CCGR4_CG5_SHIFT,       /*!< CCGR4, CG5   */
-    kCLOCK_SimM = (4U << 8U) | CCM_CCGR4_CG6_SHIFT,      /*!< CCGR4, CG6   */
-    kCLOCK_SimEms = (4U << 8U) | CCM_CCGR4_CG7_SHIFT,    /*!< CCGR4, CG7   */
-    kCLOCK_Pwm1 = (4U << 8U) | CCM_CCGR4_CG8_SHIFT,      /*!< CCGR4, CG8   */
-    kCLOCK_Pwm2 = (4U << 8U) | CCM_CCGR4_CG9_SHIFT,      /*!< CCGR4, CG9   */
-    kCLOCK_Pwm3 = (4U << 8U) | CCM_CCGR4_CG10_SHIFT,     /*!< CCGR4, CG10  */
-    kCLOCK_Pwm4 = (4U << 8U) | CCM_CCGR4_CG11_SHIFT,     /*!< CCGR4, CG11  */
-    kCLOCK_Enc1 = (4U << 8U) | CCM_CCGR4_CG12_SHIFT,     /*!< CCGR4, CG12  */
-    kCLOCK_Enc2 = (4U << 8U) | CCM_CCGR4_CG13_SHIFT,     /*!< CCGR4, CG13  */
-    kCLOCK_Enc3 = (4U << 8U) | CCM_CCGR4_CG14_SHIFT,     /*!< CCGR4, CG14  */
-    kCLOCK_Enc4 = (4U << 8U) | CCM_CCGR4_CG15_SHIFT,     /*!< CCGR4, CG15  */
+    kCLOCK_Iomuxc    = (4U << 8U) | CCM_CCGR4_CG1_SHIFT,  /*!< CCGR4, CG1   */
+    kCLOCK_IomuxcGpr = (4U << 8U) | CCM_CCGR4_CG2_SHIFT,  /*!< CCGR4, CG2   */
+    kCLOCK_Bee       = (4U << 8U) | CCM_CCGR4_CG3_SHIFT,  /*!< CCGR4, CG3   */
+    kCLOCK_SimM7     = (4U << 8U) | CCM_CCGR4_CG4_SHIFT,  /*!< CCGR4, CG4   */
+    kCLOCK_Tsc       = (4U << 8U) | CCM_CCGR4_CG5_SHIFT,  /*!< CCGR4, CG5   */
+    kCLOCK_SimM      = (4U << 8U) | CCM_CCGR4_CG6_SHIFT,  /*!< CCGR4, CG6   */
+    kCLOCK_SimEms    = (4U << 8U) | CCM_CCGR4_CG7_SHIFT,  /*!< CCGR4, CG7   */
+    kCLOCK_Pwm1      = (4U << 8U) | CCM_CCGR4_CG8_SHIFT,  /*!< CCGR4, CG8   */
+    kCLOCK_Pwm2      = (4U << 8U) | CCM_CCGR4_CG9_SHIFT,  /*!< CCGR4, CG9   */
+    kCLOCK_Pwm3      = (4U << 8U) | CCM_CCGR4_CG10_SHIFT, /*!< CCGR4, CG10  */
+    kCLOCK_Pwm4      = (4U << 8U) | CCM_CCGR4_CG11_SHIFT, /*!< CCGR4, CG11  */
+    kCLOCK_Enc1      = (4U << 8U) | CCM_CCGR4_CG12_SHIFT, /*!< CCGR4, CG12  */
+    kCLOCK_Enc2      = (4U << 8U) | CCM_CCGR4_CG13_SHIFT, /*!< CCGR4, CG13  */
+    kCLOCK_Enc3      = (4U << 8U) | CCM_CCGR4_CG14_SHIFT, /*!< CCGR4, CG14  */
+    kCLOCK_Enc4      = (4U << 8U) | CCM_CCGR4_CG15_SHIFT, /*!< CCGR4, CG15  */
 
     /* CCM CCGR5 */
-    kCLOCK_Rom = (5U << 8U) | CCM_CCGR5_CG0_SHIFT,      /*!< CCGR5, CG0   */
-    kCLOCK_Flexio1 = (5U << 8U) | CCM_CCGR5_CG1_SHIFT,  /*!< CCGR5, CG1   */
-    kCLOCK_Wdog3 = (5U << 8U) | CCM_CCGR5_CG2_SHIFT,    /*!< CCGR5, CG2   */
-    kCLOCK_Dma = (5U << 8U) | CCM_CCGR5_CG3_SHIFT,      /*!< CCGR5, CG3   */
-    kCLOCK_Kpp = (5U << 8U) | CCM_CCGR5_CG4_SHIFT,      /*!< CCGR5, CG4   */
-    kCLOCK_Wdog2 = (5U << 8U) | CCM_CCGR5_CG5_SHIFT,    /*!< CCGR5, CG5   */
-    kCLOCK_Aips_tz4 = (5U << 8U) | CCM_CCGR5_CG6_SHIFT, /*!< CCGR5, CG6   */
-    kCLOCK_Spdif = (5U << 8U) | CCM_CCGR5_CG7_SHIFT,    /*!< CCGR5, CG7   */
-    kCLOCK_SimMain = (5U << 8U) | CCM_CCGR5_CG8_SHIFT,  /*!< CCGR5, CG8   */
-    kCLOCK_Sai1 = (5U << 8U) | CCM_CCGR5_CG9_SHIFT,     /*!< CCGR5, CG9   */
-    kCLOCK_Sai2 = (5U << 8U) | CCM_CCGR5_CG10_SHIFT,    /*!< CCGR5, CG10  */
-    kCLOCK_Sai3 = (5U << 8U) | CCM_CCGR5_CG11_SHIFT,    /*!< CCGR5, CG11  */
-    kCLOCK_Lpuart1 = (5U << 8U) | CCM_CCGR5_CG12_SHIFT, /*!< CCGR5, CG12  */
-    kCLOCK_Lpuart7 = (5U << 8U) | CCM_CCGR5_CG13_SHIFT, /*!< CCGR5, CG13  */
-    kCLOCK_SnvsHp = (5U << 8U) | CCM_CCGR5_CG14_SHIFT,  /*!< CCGR5, CG14  */
-    kCLOCK_SnvsLp = (5U << 8U) | CCM_CCGR5_CG15_SHIFT,  /*!< CCGR5, CG15  */
+    kCLOCK_Rom      = (5U << 8U) | CCM_CCGR5_CG0_SHIFT,  /*!< CCGR5, CG0   */
+    kCLOCK_Flexio1  = (5U << 8U) | CCM_CCGR5_CG1_SHIFT,  /*!< CCGR5, CG1   */
+    kCLOCK_Wdog3    = (5U << 8U) | CCM_CCGR5_CG2_SHIFT,  /*!< CCGR5, CG2   */
+    kCLOCK_Dma      = (5U << 8U) | CCM_CCGR5_CG3_SHIFT,  /*!< CCGR5, CG3   */
+    kCLOCK_Kpp      = (5U << 8U) | CCM_CCGR5_CG4_SHIFT,  /*!< CCGR5, CG4   */
+    kCLOCK_Wdog2    = (5U << 8U) | CCM_CCGR5_CG5_SHIFT,  /*!< CCGR5, CG5   */
+    kCLOCK_Aips_tz4 = (5U << 8U) | CCM_CCGR5_CG6_SHIFT,  /*!< CCGR5, CG6   */
+    kCLOCK_Spdif    = (5U << 8U) | CCM_CCGR5_CG7_SHIFT,  /*!< CCGR5, CG7   */
+    kCLOCK_SimMain  = (5U << 8U) | CCM_CCGR5_CG8_SHIFT,  /*!< CCGR5, CG8   */
+    kCLOCK_Sai1     = (5U << 8U) | CCM_CCGR5_CG9_SHIFT,  /*!< CCGR5, CG9   */
+    kCLOCK_Sai2     = (5U << 8U) | CCM_CCGR5_CG10_SHIFT, /*!< CCGR5, CG10  */
+    kCLOCK_Sai3     = (5U << 8U) | CCM_CCGR5_CG11_SHIFT, /*!< CCGR5, CG11  */
+    kCLOCK_Lpuart1  = (5U << 8U) | CCM_CCGR5_CG12_SHIFT, /*!< CCGR5, CG12  */
+    kCLOCK_Lpuart7  = (5U << 8U) | CCM_CCGR5_CG13_SHIFT, /*!< CCGR5, CG13  */
+    kCLOCK_SnvsHp   = (5U << 8U) | CCM_CCGR5_CG14_SHIFT, /*!< CCGR5, CG14  */
+    kCLOCK_SnvsLp   = (5U << 8U) | CCM_CCGR5_CG15_SHIFT, /*!< CCGR5, CG15  */
 
     /* CCM CCGR6 */
-    kCLOCK_UsbOh3 = (6U << 8U) | CCM_CCGR6_CG0_SHIFT,   /*!< CCGR6, CG0   */
-    kCLOCK_Usdhc1 = (6U << 8U) | CCM_CCGR6_CG1_SHIFT,   /*!< CCGR6, CG1   */
-    kCLOCK_Usdhc2 = (6U << 8U) | CCM_CCGR6_CG2_SHIFT,   /*!< CCGR6, CG2   */
-    kCLOCK_Dcdc = (6U << 8U) | CCM_CCGR6_CG3_SHIFT,     /*!< CCGR6, CG3   */
-    kCLOCK_Ipmux4 = (6U << 8U) | CCM_CCGR6_CG4_SHIFT,   /*!< CCGR6, CG4   */
-    kCLOCK_FlexSpi = (6U << 8U) | CCM_CCGR6_CG5_SHIFT,  /*!< CCGR6, CG5   */
-    kCLOCK_Trng = (6U << 8U) | CCM_CCGR6_CG6_SHIFT,     /*!< CCGR6, CG6   */
-    kCLOCK_Lpuart8 = (6U << 8U) | CCM_CCGR6_CG7_SHIFT,  /*!< CCGR6, CG7   */
-    kCLOCK_Timer4 = (6U << 8U) | CCM_CCGR6_CG8_SHIFT,   /*!< CCGR6, CG8   */
-    kCLOCK_Aips_tz3 = (6U << 8U) | CCM_CCGR6_CG9_SHIFT, /*!< CCGR6, CG9   */
-    kCLOCK_SimPer = (6U << 8U) | CCM_CCGR6_CG10_SHIFT,  /*!< CCGR6, CG10  */
-    kCLOCK_Anadig = (6U << 8U) | CCM_CCGR6_CG11_SHIFT,  /*!< CCGR6, CG11  */
-    kCLOCK_Lpi2c4 = (6U << 8U) | CCM_CCGR6_CG12_SHIFT,  /*!< CCGR6, CG12  */
-    kCLOCK_Timer1 = (6U << 8U) | CCM_CCGR6_CG13_SHIFT,  /*!< CCGR6, CG13  */
-    kCLOCK_Timer2 = (6U << 8U) | CCM_CCGR6_CG14_SHIFT,  /*!< CCGR6, CG14  */
-    kCLOCK_Timer3 = (6U << 8U) | CCM_CCGR6_CG15_SHIFT,  /*!< CCGR6, CG15  */
+    kCLOCK_UsbOh3   = (6U << 8U) | CCM_CCGR6_CG0_SHIFT,  /*!< CCGR6, CG0   */
+    kCLOCK_Usdhc1   = (6U << 8U) | CCM_CCGR6_CG1_SHIFT,  /*!< CCGR6, CG1   */
+    kCLOCK_Usdhc2   = (6U << 8U) | CCM_CCGR6_CG2_SHIFT,  /*!< CCGR6, CG2   */
+    kCLOCK_Dcdc     = (6U << 8U) | CCM_CCGR6_CG3_SHIFT,  /*!< CCGR6, CG3   */
+    kCLOCK_Ipmux4   = (6U << 8U) | CCM_CCGR6_CG4_SHIFT,  /*!< CCGR6, CG4   */
+    kCLOCK_FlexSpi  = (6U << 8U) | CCM_CCGR6_CG5_SHIFT,  /*!< CCGR6, CG5   */
+    kCLOCK_Trng     = (6U << 8U) | CCM_CCGR6_CG6_SHIFT,  /*!< CCGR6, CG6   */
+    kCLOCK_Lpuart8  = (6U << 8U) | CCM_CCGR6_CG7_SHIFT,  /*!< CCGR6, CG7   */
+    kCLOCK_Timer4   = (6U << 8U) | CCM_CCGR6_CG8_SHIFT,  /*!< CCGR6, CG8   */
+    kCLOCK_Aips_tz3 = (6U << 8U) | CCM_CCGR6_CG9_SHIFT,  /*!< CCGR6, CG9   */
+    kCLOCK_SimPer   = (6U << 8U) | CCM_CCGR6_CG10_SHIFT, /*!< CCGR6, CG10  */
+    kCLOCK_Anadig   = (6U << 8U) | CCM_CCGR6_CG11_SHIFT, /*!< CCGR6, CG11  */
+    kCLOCK_Lpi2c4   = (6U << 8U) | CCM_CCGR6_CG12_SHIFT, /*!< CCGR6, CG12  */
+    kCLOCK_Timer1   = (6U << 8U) | CCM_CCGR6_CG13_SHIFT, /*!< CCGR6, CG13  */
+    kCLOCK_Timer2   = (6U << 8U) | CCM_CCGR6_CG14_SHIFT, /*!< CCGR6, CG14  */
+    kCLOCK_Timer3   = (6U << 8U) | CCM_CCGR6_CG15_SHIFT, /*!< CCGR6, CG15  */
 
 } clock_ip_name_t;
 
 /*! @brief OSC 24M sorce select */
 typedef enum _clock_osc
 {
-    kCLOCK_RcOsc = 0U,   /*!< On chip OSC. */
+    kCLOCK_RcOsc   = 0U, /*!< On chip OSC. */
     kCLOCK_XtalOsc = 1U, /*!< 24M Xtal OSC */
 } clock_osc_t;
 
 /*! @brief Clock gate value */
 typedef enum _clock_gate_value
 {
-    kCLOCK_ClockNotNeeded = 0U,     /*!< Clock is off during all modes. */
-    kCLOCK_ClockNeededRun = 1U,     /*!< Clock is on in run mode, but off in WAIT and STOP modes */
+    kCLOCK_ClockNotNeeded     = 0U, /*!< Clock is off during all modes. */
+    kCLOCK_ClockNeededRun     = 1U, /*!< Clock is on in run mode, but off in WAIT and STOP modes */
     kCLOCK_ClockNeededRunWait = 3U, /*!< Clock is on during all modes, except STOP mode */
 } clock_gate_value_t;
 
 /*! @brief System clock mode */
 typedef enum _clock_mode_t
 {
-    kCLOCK_ModeRun = 0U,  /*!< Remain in run mode. */
+    kCLOCK_ModeRun  = 0U, /*!< Remain in run mode. */
     kCLOCK_ModeWait = 1U, /*!< Transfer to wait mode. */
     kCLOCK_ModeStop = 2U, /*!< Transfer to stop mode. */
 } clock_mode_t;
@@ -599,7 +598,7 @@ typedef enum _clock_mux
                                  CCM_CCSR_PLL3_SW_CLK_SEL_MASK,
                                  CCM_NO_BUSY_WAIT), /*!< pll3_sw_clk mux name */
 
-    kCLOCK_PeriphMux = CCM_TUPLE(CBCDR,
+    kCLOCK_PeriphMux  = CCM_TUPLE(CBCDR,
                                  CCM_CBCDR_PERIPH_CLK_SEL_SHIFT,
                                  CCM_CBCDR_PERIPH_CLK_SEL_MASK,
                                  CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_SHIFT), /*!< periph mux name */
@@ -607,35 +606,35 @@ typedef enum _clock_mux
                                   CCM_CBCDR_SEMC_ALT_CLK_SEL_SHIFT,
                                   CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< semc mux name */
-    kCLOCK_SemcMux = CCM_TUPLE(
+    kCLOCK_SemcMux    = CCM_TUPLE(
         CBCDR, CCM_CBCDR_SEMC_CLK_SEL_SHIFT, CCM_CBCDR_SEMC_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< semc mux name */
 
     kCLOCK_PrePeriphMux = CCM_TUPLE(CBCMR,
                                     CCM_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT,
                                     CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK,
                                     CCM_NO_BUSY_WAIT), /*!< pre-periph mux name */
-    kCLOCK_TraceMux = CCM_TUPLE(
+    kCLOCK_TraceMux     = CCM_TUPLE(
         CBCMR, CCM_CBCMR_TRACE_CLK_SEL_SHIFT, CCM_CBCMR_TRACE_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< trace mux name */
     kCLOCK_PeriphClk2Mux = CCM_TUPLE(CBCMR,
                                      CCM_CBCMR_PERIPH_CLK2_SEL_SHIFT,
                                      CCM_CBCMR_PERIPH_CLK2_SEL_MASK,
                                      CCM_NO_BUSY_WAIT), /*!< periph clock2 mux name */
-    kCLOCK_LpspiMux = CCM_TUPLE(
+    kCLOCK_LpspiMux      = CCM_TUPLE(
         CBCMR, CCM_CBCMR_LPSPI_CLK_SEL_SHIFT, CCM_CBCMR_LPSPI_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< lpspi mux name */
 
     kCLOCK_FlexspiMux = CCM_TUPLE(CSCMR1,
                                   CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT,
                                   CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< flexspi mux name */
-    kCLOCK_Usdhc2Mux = CCM_TUPLE(CSCMR1,
+    kCLOCK_Usdhc2Mux  = CCM_TUPLE(CSCMR1,
                                  CCM_CSCMR1_USDHC2_CLK_SEL_SHIFT,
                                  CCM_CSCMR1_USDHC2_CLK_SEL_MASK,
                                  CCM_NO_BUSY_WAIT), /*!< usdhc2 mux name */
-    kCLOCK_Usdhc1Mux = CCM_TUPLE(CSCMR1,
+    kCLOCK_Usdhc1Mux  = CCM_TUPLE(CSCMR1,
                                  CCM_CSCMR1_USDHC1_CLK_SEL_SHIFT,
                                  CCM_CSCMR1_USDHC1_CLK_SEL_MASK,
                                  CCM_NO_BUSY_WAIT), /*!< usdhc1 mux name */
-    kCLOCK_Sai3Mux = CCM_TUPLE(
+    kCLOCK_Sai3Mux    = CCM_TUPLE(
         CSCMR1, CCM_CSCMR1_SAI3_CLK_SEL_SHIFT, CCM_CSCMR1_SAI3_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< sai3 mux name */
     kCLOCK_Sai2Mux = CCM_TUPLE(
         CSCMR1, CCM_CSCMR1_SAI2_CLK_SEL_SHIFT, CCM_CSCMR1_SAI2_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< sai2 mux name */
@@ -650,7 +649,7 @@ typedef enum _clock_mux
                                   CCM_CSCMR2_FLEXIO2_CLK_SEL_SHIFT,
                                   CCM_CSCMR2_FLEXIO2_CLK_SEL_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< flexio2 mux name */
-    kCLOCK_CanMux = CCM_TUPLE(
+    kCLOCK_CanMux     = CCM_TUPLE(
         CSCMR2, CCM_CSCMR2_CAN_CLK_SEL_SHIFT, CCM_CSCMR2_CAN_CLK_SEL_MASK, CCM_NO_BUSY_WAIT), /*!< can mux name */
 
     kCLOCK_UartMux = CCM_TUPLE(
@@ -691,11 +690,11 @@ typedef enum _clock_div
                                      CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT,
                                      CCM_CBCDR_PERIPH_CLK2_PODF_MASK,
                                      CCM_NO_BUSY_WAIT), /*!< periph clock2 div name */
-    kCLOCK_SemcDiv = CCM_TUPLE(CBCDR,
+    kCLOCK_SemcDiv       = CCM_TUPLE(CBCDR,
                                CCM_CBCDR_SEMC_PODF_SHIFT,
                                CCM_CBCDR_SEMC_PODF_MASK,
                                CCM_CDHIPR_SEMC_PODF_BUSY_SHIFT), /*!< semc div name */
-    kCLOCK_AhbDiv = CCM_TUPLE(
+    kCLOCK_AhbDiv        = CCM_TUPLE(
         CBCDR, CCM_CBCDR_AHB_PODF_SHIFT, CCM_CBCDR_AHB_PODF_MASK, CCM_CDHIPR_AHB_PODF_BUSY_SHIFT), /*!< ahb div name */
     kCLOCK_IpgDiv =
         CCM_TUPLE(CBCDR, CCM_CBCDR_IPG_PODF_SHIFT, CCM_CBCDR_IPG_PODF_MASK, CCM_NO_BUSY_WAIT), /*!< ipg div name */
@@ -730,31 +729,31 @@ typedef enum _clock_div
                                   CCM_CS1CDR_SAI3_CLK_PRED_SHIFT,
                                   CCM_CS1CDR_SAI3_CLK_PRED_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< sai3 pre div name */
-    kCLOCK_Sai3Div = CCM_TUPLE(
+    kCLOCK_Sai3Div    = CCM_TUPLE(
         CS1CDR, CCM_CS1CDR_SAI3_CLK_PODF_SHIFT, CCM_CS1CDR_SAI3_CLK_PODF_MASK, CCM_NO_BUSY_WAIT), /*!< sai3 div name */
     kCLOCK_Flexio2PreDiv = CCM_TUPLE(CS1CDR,
                                      CCM_CS1CDR_FLEXIO2_CLK_PRED_SHIFT,
                                      CCM_CS1CDR_FLEXIO2_CLK_PRED_MASK,
                                      CCM_NO_BUSY_WAIT), /*!< sai3 pre div name */
-    kCLOCK_Sai1PreDiv = CCM_TUPLE(CS1CDR,
+    kCLOCK_Sai1PreDiv    = CCM_TUPLE(CS1CDR,
                                   CCM_CS1CDR_SAI1_CLK_PRED_SHIFT,
                                   CCM_CS1CDR_SAI1_CLK_PRED_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< sai1 pre div name */
-    kCLOCK_Sai1Div = CCM_TUPLE(
+    kCLOCK_Sai1Div       = CCM_TUPLE(
         CS1CDR, CCM_CS1CDR_SAI1_CLK_PODF_SHIFT, CCM_CS1CDR_SAI1_CLK_PODF_MASK, CCM_NO_BUSY_WAIT), /*!< sai1 div name */
 
     kCLOCK_Sai2PreDiv = CCM_TUPLE(CS2CDR,
                                   CCM_CS2CDR_SAI2_CLK_PRED_SHIFT,
                                   CCM_CS2CDR_SAI2_CLK_PRED_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< sai2 pre div name */
-    kCLOCK_Sai2Div = CCM_TUPLE(
+    kCLOCK_Sai2Div    = CCM_TUPLE(
         CS2CDR, CCM_CS2CDR_SAI2_CLK_PODF_SHIFT, CCM_CS2CDR_SAI2_CLK_PODF_MASK, CCM_NO_BUSY_WAIT), /*!< sai2 div name */
 
-    kCLOCK_Spdif0PreDiv = CCM_TUPLE(CDCDR,
+    kCLOCK_Spdif0PreDiv  = CCM_TUPLE(CDCDR,
                                     CCM_CDCDR_SPDIF0_CLK_PRED_SHIFT,
                                     CCM_CDCDR_SPDIF0_CLK_PRED_MASK,
                                     CCM_NO_BUSY_WAIT), /*!< spdif pre div name */
-    kCLOCK_Spdif0Div = CCM_TUPLE(CDCDR,
+    kCLOCK_Spdif0Div     = CCM_TUPLE(CDCDR,
                                  CCM_CDCDR_SPDIF0_CLK_PODF_SHIFT,
                                  CCM_CDCDR_SPDIF0_CLK_PODF_MASK,
                                  CCM_NO_BUSY_WAIT), /*!< spdif div name */
@@ -762,12 +761,12 @@ typedef enum _clock_div
                                      CCM_CDCDR_FLEXIO1_CLK_PRED_SHIFT,
                                      CCM_CDCDR_FLEXIO1_CLK_PRED_MASK,
                                      CCM_NO_BUSY_WAIT), /*!< flexio1 pre div name */
-    kCLOCK_Flexio1Div = CCM_TUPLE(CDCDR,
+    kCLOCK_Flexio1Div    = CCM_TUPLE(CDCDR,
                                   CCM_CDCDR_FLEXIO1_CLK_PODF_SHIFT,
                                   CCM_CDCDR_FLEXIO1_CLK_PODF_MASK,
                                   CCM_NO_BUSY_WAIT), /*!< flexio1 div name */
 
-    kCLOCK_Lpi2cDiv = CCM_TUPLE(CSCDR2,
+    kCLOCK_Lpi2cDiv    = CCM_TUPLE(CSCDR2,
                                 CCM_CSCDR2_LPI2C_CLK_PODF_SHIFT,
                                 CCM_CSCDR2_LPI2C_CLK_PODF_MASK,
                                 CCM_NO_BUSY_WAIT), /*!< lpi2c div name */
@@ -781,7 +780,7 @@ typedef enum _clock_div
 /*! @brief USB clock source definition. */
 typedef enum _clock_usb_src
 {
-    kCLOCK_Usb480M = 0,                /*!< Use 480M.      */
+    kCLOCK_Usb480M      = 0,           /*!< Use 480M.      */
     kCLOCK_UsbSrcUnused = 0xFFFFFFFFU, /*!< Used when the function does not
                                             care the clock source. */
 } clock_usb_src_t;
@@ -796,7 +795,7 @@ typedef enum _clock_usb_phy_src
 enum _clock_pll_clk_src
 {
     kCLOCK_PllClkSrc24M = 0U, /*!< Pll clock source 24M */
-    kCLOCK_PllSrcClkPN = 1U,  /*!< Pll clock source CLK1_P and CLK1_N */
+    kCLOCK_PllSrcClkPN  = 1U, /*!< Pll clock source CLK1_P and CLK1_N */
 };
 
 /*! @brief PLL configuration for ARM */
@@ -867,9 +866,9 @@ typedef struct _clock_enet_pll_config
 /*! @brief PLL name */
 typedef enum _clock_pll
 {
-    kCLOCK_PllArm = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_ENABLE_SHIFT),       /*!< PLL ARM */
-    kCLOCK_PllSys = CCM_ANALOG_TUPLE(PLL_SYS, CCM_ANALOG_PLL_SYS_ENABLE_SHIFT),       /*!< PLL SYS */
-    kCLOCK_PllUsb1 = CCM_ANALOG_TUPLE(PLL_USB1, CCM_ANALOG_PLL_USB1_ENABLE_SHIFT),    /*!< PLL USB1 */
+    kCLOCK_PllArm   = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_ENABLE_SHIFT),     /*!< PLL ARM */
+    kCLOCK_PllSys   = CCM_ANALOG_TUPLE(PLL_SYS, CCM_ANALOG_PLL_SYS_ENABLE_SHIFT),     /*!< PLL SYS */
+    kCLOCK_PllUsb1  = CCM_ANALOG_TUPLE(PLL_USB1, CCM_ANALOG_PLL_USB1_ENABLE_SHIFT),   /*!< PLL USB1 */
     kCLOCK_PllAudio = CCM_ANALOG_TUPLE(PLL_AUDIO, CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT), /*!< PLL Audio */
     kCLOCK_PllVideo = CCM_ANALOG_TUPLE(PLL_VIDEO, CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT), /*!< PLL Video */
 
@@ -895,571 +894,564 @@ typedef enum _clock_pfd
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-/*!
- * @brief Set CCM MUX node to certain value.
- *
- * @param mux   Which mux node to set, see \ref clock_mux_t.
- * @param value Clock mux value to set, different mux has different value range.
- */
-static inline void CLOCK_SetMux(clock_mux_t mux, uint32_t value)
-{
-    uint32_t busyShift;
-
-    busyShift = CCM_TUPLE_BUSY_SHIFT(mux);
-    CCM_TUPLE_REG(CCM, mux) = (CCM_TUPLE_REG(CCM, mux) & (~CCM_TUPLE_MASK(mux))) |
-                              (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux));
-
-    assert(busyShift <= CCM_NO_BUSY_WAIT);
-
-    /* Clock switch need Handshake? */
-    if (CCM_NO_BUSY_WAIT != busyShift)
+    /*!
+     * @brief Set CCM MUX node to certain value.
+     *
+     * @param mux   Which mux node to set, see \ref clock_mux_t.
+     * @param value Clock mux value to set, different mux has different value range.
+     */
+    static inline void CLOCK_SetMux(clock_mux_t mux, uint32_t value)
     {
-        /* Wait until CCM internal handshake finish. */
-        while (CCM->CDHIPR & (1U << busyShift))
-        {
+        uint32_t busyShift;
+
+        busyShift               = CCM_TUPLE_BUSY_SHIFT(mux);
+        CCM_TUPLE_REG(CCM, mux) = (CCM_TUPLE_REG(CCM, mux) & (~CCM_TUPLE_MASK(mux))) |
+                                  (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux));
+
+        assert(busyShift <= CCM_NO_BUSY_WAIT);
+
+        /* Clock switch need Handshake? */
+        if (CCM_NO_BUSY_WAIT != busyShift) {
+            /* Wait until CCM internal handshake finish. */
+            while (CCM->CDHIPR & (1U << busyShift)) {}
         }
     }
-}
 
-/*!
- * @brief Get CCM MUX value.
- *
- * @param mux   Which mux node to get, see \ref clock_mux_t.
- * @return Clock mux value.
- */
-static inline uint32_t CLOCK_GetMux(clock_mux_t mux)
-{
-    return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux);
-}
-
-/*!
- * @brief Set CCM DIV node to certain value.
- *
- * @param divider Which div node to set, see \ref clock_div_t.
- * @param value   Clock div value to set, different divider has different value range.
- */
-static inline void CLOCK_SetDiv(clock_div_t divider, uint32_t value)
-{
-    uint32_t busyShift;
-
-    busyShift = CCM_TUPLE_BUSY_SHIFT(divider);
-    CCM_TUPLE_REG(CCM, divider) = (CCM_TUPLE_REG(CCM, divider) & (~CCM_TUPLE_MASK(divider))) |
-                                  (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider));
-
-    assert(busyShift <= CCM_NO_BUSY_WAIT);
-
-    /* Clock switch need Handshake? */
-    if (CCM_NO_BUSY_WAIT != busyShift)
+    /*!
+     * @brief Get CCM MUX value.
+     *
+     * @param mux   Which mux node to get, see \ref clock_mux_t.
+     * @return Clock mux value.
+     */
+    static inline uint32_t CLOCK_GetMux(clock_mux_t mux)
     {
-        /* Wait until CCM internal handshake finish. */
-        while (CCM->CDHIPR & (1U << busyShift))
-        {
+        return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux);
+    }
+
+    /*!
+     * @brief Set CCM DIV node to certain value.
+     *
+     * @param divider Which div node to set, see \ref clock_div_t.
+     * @param value   Clock div value to set, different divider has different value range.
+     */
+    static inline void CLOCK_SetDiv(clock_div_t divider, uint32_t value)
+    {
+        uint32_t busyShift;
+
+        busyShift                   = CCM_TUPLE_BUSY_SHIFT(divider);
+        CCM_TUPLE_REG(CCM, divider) = (CCM_TUPLE_REG(CCM, divider) & (~CCM_TUPLE_MASK(divider))) |
+                                      (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider));
+
+        assert(busyShift <= CCM_NO_BUSY_WAIT);
+
+        /* Clock switch need Handshake? */
+        if (CCM_NO_BUSY_WAIT != busyShift) {
+            /* Wait until CCM internal handshake finish. */
+            while (CCM->CDHIPR & (1U << busyShift)) {}
         }
     }
-}
 
-/*!
- * @brief Get CCM DIV node value.
- *
- * @param divider Which div node to get, see \ref clock_div_t.
- */
+    /*!
+     * @brief Get CCM DIV node value.
+     *
+     * @param divider Which div node to get, see \ref clock_div_t.
+     */
 
-static inline uint32_t CLOCK_GetDiv(clock_div_t divider)
-{
-    return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider));
-}
-
-/*!
- * @brief Control the clock gate for specific IP.
- *
- * @param name  Which clock to enable, see \ref clock_ip_name_t.
- * @param value Clock gate value to set, see \ref clock_gate_value_t.
- */
-static inline void CLOCK_ControlGate(clock_ip_name_t name, clock_gate_value_t value)
-{
-    uint32_t index = ((uint32_t)name) >> 8U;
-    uint32_t shift = ((uint32_t)name) & 0x1FU;
-    volatile uint32_t *reg;
-
-    assert(index <= 6);
-
-    reg = ((volatile uint32_t *)&CCM->CCGR0) + index;
-    *reg = ((*reg) & ~(3U << shift)) | (((uint32_t)value) << shift);
-}
-
-/*!
- * @brief Enable the clock for specific IP.
- *
- * @param name  Which clock to enable, see \ref clock_ip_name_t.
- */
-static inline void CLOCK_EnableClock(clock_ip_name_t name)
-{
-    CLOCK_ControlGate(name, kCLOCK_ClockNeededRunWait);
-}
-
-/*!
- * @brief Disable the clock for specific IP.
- *
- * @param name  Which clock to disable, see \ref clock_ip_name_t.
- */
-static inline void CLOCK_DisableClock(clock_ip_name_t name)
-{
-    CLOCK_ControlGate(name, kCLOCK_ClockNotNeeded);
-}
-
-/*!
- * @brief Setting the low power mode that system will enter on next assertion of dsm_request signal.
- *
- * @param mode  Which mode to enter, see \ref clock_mode_t.
- */
-static inline void CLOCK_SetMode(clock_mode_t mode)
-{
-    CCM->CLPCR = (CCM->CLPCR & ~CCM_CLPCR_LPM_MASK) | CCM_CLPCR_LPM((uint32_t)mode);
-}
-
-/*!
- * @brief Gets the OSC clock frequency.
- *
- * This function will return the external XTAL OSC frequency if it is selected as the source of OSC,
- * otherwise internal 24MHz RC OSC frequency will be returned.
- *
- * @param osc   OSC type to get frequency.
- *
- * @return  Clock frequency; If the clock is invalid, returns 0.
- */
-static inline uint32_t CLOCK_GetOscFreq(void)
-{
-    return (XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK) ? 24000000UL : g_xtalFreq;
-}
-
-/*!
- * @brief Gets the clock frequency for a specific clock name.
- *
- * This function checks the current clock configurations and then calculates
- * the clock frequency for a specific clock name defined in clock_name_t.
- *
- * @param clockName Clock names defined in clock_name_t
- * @return Clock frequency value in hertz
- */
-uint32_t CLOCK_GetFreq(clock_name_t name);
-
-/*!
- * @brief Get the CCM CPU/core/system frequency.
- *
- * @return  Clock frequency; If the clock is invalid, returns 0.
- */
-static inline uint32_t CLOCK_GetCpuClkFreq(void)
-{
-    return CLOCK_GetFreq(kCLOCK_CpuClk);
-}
-
-/*!
- * @name OSC operations
- * @{
- */
-
-/*!
- * @brief Initialize the external 24MHz clock.
- *
- * This function supports two modes:
- * 1. Use external crystal oscillator.
- * 2. Bypass the external crystal oscillator, using input source clock directly.
- *
- * After this function, please call @ref CLOCK_SetXtal0Freq to inform clock driver
- * the external clock frequency.
- *
- * @param bypassXtalOsc Pass in true to bypass the external crystal oscillator.
- * @note This device does not support bypass external crystal oscillator, so
- * the input parameter should always be false.
- */
-void CLOCK_InitExternalClk(bool bypassXtalOsc);
-
-/*!
- * @brief Deinitialize the external 24MHz clock.
- *
- * This function disables the external 24MHz clock.
- *
- * After this function, please call @ref CLOCK_SetXtal0Freq to set external clock
- * frequency to 0.
- */
-void CLOCK_DeinitExternalClk(void);
-
-/*!
- * @brief Switch the OSC.
- *
- * This function switches the OSC source for SoC.
- *
- * @param osc   OSC source to switch to.
- */
-void CLOCK_SwitchOsc(clock_osc_t osc);
-
-/*!
- * @brief Gets the RTC clock frequency.
- *
- * @return  Clock frequency; If the clock is invalid, returns 0.
- */
-static inline uint32_t CLOCK_GetRtcFreq(void)
-{
-    return 32768U;
-}
-
-/*!
- * @brief Set the XTAL (24M OSC) frequency based on board setting.
- *
- * @param freq The XTAL input clock frequency in Hz.
- */
-static inline void CLOCK_SetXtalFreq(uint32_t freq)
-{
-    g_xtalFreq = freq;
-}
-
-/*!
- * @brief Set the RTC XTAL (32K OSC) frequency based on board setting.
- *
- * @param freq The RTC XTAL input clock frequency in Hz.
- */
-static inline void CLOCK_SetRtcXtalFreq(uint32_t freq)
-{
-    g_rtcXtalFreq = freq;
-}
-
-/*!
- * @brief Initialize the RC oscillator 24MHz clock.
- */
-void CLOCK_InitRcOsc24M(void);
-
-/*!
- * @brief Power down the RCOSC 24M clock.
- */
-void CLOCK_DeinitRcOsc24M(void);
-/* @} */
-
-
-/*! @brief Enable USB HS clock.
- *
- * This function only enables the access to USB HS prepheral, upper layer
- * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY
- * clock to use USB HS.
- *
- * @param src  USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused.
- * @param freq USB HS does not care about the clock source, so this parameter is ignored.
- * @retval true The clock is set successfully.
- * @retval false The clock source is invalid to get proper USB HS clock.
- */
-bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq);
-
-/*! @brief Enable USB HS clock.
- *
- * This function only enables the access to USB HS prepheral, upper layer
- * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY
- * clock to use USB HS.
- *
- * @param src  USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused.
- * @param freq USB HS does not care about the clock source, so this parameter is ignored.
- * @retval true The clock is set successfully.
- * @retval false The clock source is invalid to get proper USB HS clock.
- */
-bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq);
-
-/*! @brief Disable USB HS PHY PLL clock.
- *
- * This function disables USB HS PHY PLL clock.
- */
-void CLOCK_DisableUsbhs1PhyPllClock(void);
-
-/* @} */
-
-/*!
- * @name PLL/PFD operations
- * @{
- */
-/*!
- * @brief PLL bypass setting
- *
- * @param base CCM_ANALOG base pointer.
- * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
- * @param bypass Bypass the PLL.
- *               - true: Bypass the PLL.
- *               - false:Not bypass the PLL.
- */
-static inline void CLOCK_SetPllBypass(CCM_ANALOG_Type *base, clock_pll_t pll, bool bypass)
-{
-    if (bypass)
+    static inline uint32_t CLOCK_GetDiv(clock_div_t divider)
     {
-        CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT;
+        return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider));
     }
-    else
+
+    /*!
+     * @brief Control the clock gate for specific IP.
+     *
+     * @param name  Which clock to enable, see \ref clock_ip_name_t.
+     * @param value Clock gate value to set, see \ref clock_gate_value_t.
+     */
+    static inline void CLOCK_ControlGate(clock_ip_name_t name, clock_gate_value_t value)
     {
-        CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT;
+        uint32_t index = ((uint32_t)name) >> 8U;
+        uint32_t shift = ((uint32_t)name) & 0x1FU;
+        volatile uint32_t *reg;
+
+        assert(index <= 6);
+
+        reg  = ((volatile uint32_t *)&CCM->CCGR0) + index;
+        *reg = ((*reg) & ~(3U << shift)) | (((uint32_t)value) << shift);
     }
-}
 
-/*!
- * @brief Check if PLL is bypassed
- *
- * @param base CCM_ANALOG base pointer.
- * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
- * @return PLL bypass status.
- *         - true: The PLL is bypassed.
- *         - false: The PLL is not bypassed.
- */
-static inline bool CLOCK_IsPllBypassed(CCM_ANALOG_Type *base, clock_pll_t pll)
-{
-    return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_PLL_BYPASS_SHIFT));
-}
+    /*!
+     * @brief Enable the clock for specific IP.
+     *
+     * @param name  Which clock to enable, see \ref clock_ip_name_t.
+     */
+    static inline void CLOCK_EnableClock(clock_ip_name_t name)
+    {
+        CLOCK_ControlGate(name, kCLOCK_ClockNeededRunWait);
+    }
 
-/*!
- * @brief Check if PLL is enabled
- *
- * @param base CCM_ANALOG base pointer.
- * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
- * @return PLL bypass status.
- *         - true: The PLL is enabled.
- *         - false: The PLL is not enabled.
- */
-static inline bool CLOCK_IsPllEnabled(CCM_ANALOG_Type *base, clock_pll_t pll)
-{
-    return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_TUPLE_SHIFT(pll)));
-}
+    /*!
+     * @brief Disable the clock for specific IP.
+     *
+     * @param name  Which clock to disable, see \ref clock_ip_name_t.
+     */
+    static inline void CLOCK_DisableClock(clock_ip_name_t name)
+    {
+        CLOCK_ControlGate(name, kCLOCK_ClockNotNeeded);
+    }
 
-/*!
- * @brief PLL bypass clock source setting.
- * Note: change the bypass clock source also change the pll reference clock source.
- *
- * @param base CCM_ANALOG base pointer.
- * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
- * @param src Bypass clock source, reference _clock_pll_bypass_clk_src.
- */
-static inline void CLOCK_SetPllBypassRefClkSrc(CCM_ANALOG_Type *base, clock_pll_t pll, uint32_t src)
-{
-    CCM_ANALOG_TUPLE_REG(base, pll) |= (CCM_ANALOG_TUPLE_REG(base, pll) & (~CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK)) | src;
-}
+    /*!
+     * @brief Setting the low power mode that system will enter on next assertion of dsm_request signal.
+     *
+     * @param mode  Which mode to enter, see \ref clock_mode_t.
+     */
+    static inline void CLOCK_SetMode(clock_mode_t mode)
+    {
+        CCM->CLPCR = (CCM->CLPCR & ~CCM_CLPCR_LPM_MASK) | CCM_CLPCR_LPM((uint32_t)mode);
+    }
 
-/*!
- * @brief Get PLL bypass clock value, it is PLL reference clock actually.
- * If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise 0
- * will be returned.
- * @param base CCM_ANALOG base pointer.
- * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
- * @retval bypass reference clock frequency value.
- */
-static inline uint32_t CLOCK_GetPllBypassRefClk(CCM_ANALOG_Type *base, clock_pll_t pll)
-{
-    return (((CCM_ANALOG_TUPLE_REG(base, pll) & CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK) >>
-             CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT) == kCLOCK_PllClkSrc24M) ?
-               CLOCK_GetOscFreq() :
-               CLKPN_FREQ;
-}
+    /*!
+     * @brief Gets the OSC clock frequency.
+     *
+     * This function will return the external XTAL OSC frequency if it is selected as the source of OSC,
+     * otherwise internal 24MHz RC OSC frequency will be returned.
+     *
+     * @param osc   OSC type to get frequency.
+     *
+     * @return  Clock frequency; If the clock is invalid, returns 0.
+     */
+    static inline uint32_t CLOCK_GetOscFreq(void)
+    {
+        return (XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK) ? 24000000UL : g_xtalFreq;
+    }
 
-/*!
- * @brief Initialize the ARM PLL.
- *
- * This function initialize the ARM PLL with specific settings
- *
- * @param config   configuration to set to PLL.
- */
-void CLOCK_InitArmPll(const clock_arm_pll_config_t *config);
+    /*!
+     * @brief Gets the clock frequency for a specific clock name.
+     *
+     * This function checks the current clock configurations and then calculates
+     * the clock frequency for a specific clock name defined in clock_name_t.
+     *
+     * @param clockName Clock names defined in clock_name_t
+     * @return Clock frequency value in hertz
+     */
+    uint32_t CLOCK_GetFreq(clock_name_t name);
 
-/*!
- * @brief De-initialize the ARM PLL.
- */
-void CLOCK_DeinitArmPll(void);
+    /*!
+     * @brief Get the CCM CPU/core/system frequency.
+     *
+     * @return  Clock frequency; If the clock is invalid, returns 0.
+     */
+    static inline uint32_t CLOCK_GetCpuClkFreq(void)
+    {
+        return CLOCK_GetFreq(kCLOCK_CpuClk);
+    }
 
-/*!
- * @brief Initialize the System PLL.
- *
- * This function initializes the System PLL with specific settings
- *
- * @param config Configuration to set to PLL.
- */
-void CLOCK_InitSysPll(const clock_sys_pll_config_t *config);
+    /*!
+     * @name OSC operations
+     * @{
+     */
 
-/*!
- * @brief De-initialize the System PLL.
- */
-void CLOCK_DeinitSysPll(void);
+    /*!
+     * @brief Initialize the external 24MHz clock.
+     *
+     * This function supports two modes:
+     * 1. Use external crystal oscillator.
+     * 2. Bypass the external crystal oscillator, using input source clock directly.
+     *
+     * After this function, please call @ref CLOCK_SetXtal0Freq to inform clock driver
+     * the external clock frequency.
+     *
+     * @param bypassXtalOsc Pass in true to bypass the external crystal oscillator.
+     * @note This device does not support bypass external crystal oscillator, so
+     * the input parameter should always be false.
+     */
+    void CLOCK_InitExternalClk(bool bypassXtalOsc);
 
-/*!
- * @brief Initialize the USB1 PLL.
- *
- * This function initializes the USB1 PLL with specific settings
- *
- * @param config Configuration to set to PLL.
- */
-void CLOCK_InitUsb1Pll(const clock_usb_pll_config_t *config);
+    /*!
+     * @brief Deinitialize the external 24MHz clock.
+     *
+     * This function disables the external 24MHz clock.
+     *
+     * After this function, please call @ref CLOCK_SetXtal0Freq to set external clock
+     * frequency to 0.
+     */
+    void CLOCK_DeinitExternalClk(void);
 
-/*!
- * @brief Deinitialize the USB1 PLL.
- */
-void CLOCK_DeinitUsb1Pll(void);
+    /*!
+     * @brief Switch the OSC.
+     *
+     * This function switches the OSC source for SoC.
+     *
+     * @param osc   OSC source to switch to.
+     */
+    void CLOCK_SwitchOsc(clock_osc_t osc);
 
-/*!
- * @brief Initialize the USB2 PLL.
- *
- * This function initializes the USB2 PLL with specific settings
- *
- * @param config Configuration to set to PLL.
- */
-void CLOCK_InitUsb2Pll(const clock_usb_pll_config_t *config);
+    /*!
+     * @brief Gets the RTC clock frequency.
+     *
+     * @return  Clock frequency; If the clock is invalid, returns 0.
+     */
+    static inline uint32_t CLOCK_GetRtcFreq(void)
+    {
+        return 32768U;
+    }
 
-/*!
- * @brief Deinitialize the USB2 PLL.
- */
-void CLOCK_DeinitUsb2Pll(void);
+    /*!
+     * @brief Set the XTAL (24M OSC) frequency based on board setting.
+     *
+     * @param freq The XTAL input clock frequency in Hz.
+     */
+    static inline void CLOCK_SetXtalFreq(uint32_t freq)
+    {
+        g_xtalFreq = freq;
+    }
 
-/*!
- * @brief Initializes the Audio PLL.
- *
- * This function initializes the Audio PLL with specific settings
- *
- * @param config Configuration to set to PLL.
- */
-void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config);
+    /*!
+     * @brief Set the RTC XTAL (32K OSC) frequency based on board setting.
+     *
+     * @param freq The RTC XTAL input clock frequency in Hz.
+     */
+    static inline void CLOCK_SetRtcXtalFreq(uint32_t freq)
+    {
+        g_rtcXtalFreq = freq;
+    }
 
-/*!
- * @brief De-initialize the Audio PLL.
- */
-void CLOCK_DeinitAudioPll(void);
+    /*!
+     * @brief Initialize the RC oscillator 24MHz clock.
+     */
+    void CLOCK_InitRcOsc24M(void);
 
-/*!
- * @brief Initialize the video PLL.
- *
- * This function configures the Video PLL with specific settings
- *
- * @param config   configuration to set to PLL.
- */
-void CLOCK_InitVideoPll(const clock_video_pll_config_t *config);
+    /*!
+     * @brief Power down the RCOSC 24M clock.
+     */
+    void CLOCK_DeinitRcOsc24M(void);
+    /* @} */
 
-/*!
- * @brief De-initialize the Video PLL.
- */
-void CLOCK_DeinitVideoPll(void);
-/*!
- * @brief Initialize the ENET PLL.
- *
- * This function initializes the ENET PLL with specific settings.
- *
- * @param config Configuration to set to PLL.
- */
-void CLOCK_InitEnetPll(const clock_enet_pll_config_t *config);
+    /*! @brief Enable USB HS clock.
+     *
+     * This function only enables the access to USB HS prepheral, upper layer
+     * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY
+     * clock to use USB HS.
+     *
+     * @param src  USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused.
+     * @param freq USB HS does not care about the clock source, so this parameter is ignored.
+     * @retval true The clock is set successfully.
+     * @retval false The clock source is invalid to get proper USB HS clock.
+     */
+    bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq);
 
-/*!
- * @brief Deinitialize the ENET PLL.
- *
- * This function disables the ENET PLL.
- */
-void CLOCK_DeinitEnetPll(void);
+    /*! @brief Enable USB HS clock.
+     *
+     * This function only enables the access to USB HS prepheral, upper layer
+     * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY
+     * clock to use USB HS.
+     *
+     * @param src  USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused.
+     * @param freq USB HS does not care about the clock source, so this parameter is ignored.
+     * @retval true The clock is set successfully.
+     * @retval false The clock source is invalid to get proper USB HS clock.
+     */
+    bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq);
 
-/*!
- * @brief Get current PLL output frequency.
- *
- * This function get current output frequency of specific PLL
- *
- * @param pll   pll name to get frequency.
- * @return The PLL output frequency in hertz.
- */
-uint32_t CLOCK_GetPllFreq(clock_pll_t pll);
+    /*! @brief Disable USB HS PHY PLL clock.
+     *
+     * This function disables USB HS PHY PLL clock.
+     */
+    void CLOCK_DisableUsbhs1PhyPllClock(void);
 
-/*!
- * @brief Initialize the System PLL PFD.
- *
- * This function initializes the System PLL PFD. During new value setting,
- * the clock output is disabled to prevent glitch.
- *
- * @param pfd Which PFD clock to enable.
- * @param pfdFrac The PFD FRAC value.
- * @note It is recommended that PFD settings are kept between 12-35.
- */
-void CLOCK_InitSysPfd(clock_pfd_t pfd, uint8_t pfdFrac);
+    /* @} */
 
-/*!
- * @brief De-initialize the System PLL PFD.
- *
- * This function disables the System PLL PFD.
- *
- * @param pfd Which PFD clock to disable.
- */
-void CLOCK_DeinitSysPfd(clock_pfd_t pfd);
+    /*!
+     * @name PLL/PFD operations
+     * @{
+     */
+    /*!
+     * @brief PLL bypass setting
+     *
+     * @param base CCM_ANALOG base pointer.
+     * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
+     * @param bypass Bypass the PLL.
+     *               - true: Bypass the PLL.
+     *               - false:Not bypass the PLL.
+     */
+    static inline void CLOCK_SetPllBypass(CCM_ANALOG_Type *base, clock_pll_t pll, bool bypass)
+    {
+        if (bypass) {
+            CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT;
+        }
+        else {
+            CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT;
+        }
+    }
 
-/*!
- * @brief Initialize the USB1 PLL PFD.
- *
- * This function initializes the USB1 PLL PFD. During new value setting,
- * the clock output is disabled to prevent glitch.
- *
- * @param pfd Which PFD clock to enable.
- * @param pfdFrac The PFD FRAC value.
- * @note It is recommended that PFD settings are kept between 12-35.
- */
-void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac);
+    /*!
+     * @brief Check if PLL is bypassed
+     *
+     * @param base CCM_ANALOG base pointer.
+     * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
+     * @return PLL bypass status.
+     *         - true: The PLL is bypassed.
+     *         - false: The PLL is not bypassed.
+     */
+    static inline bool CLOCK_IsPllBypassed(CCM_ANALOG_Type *base, clock_pll_t pll)
+    {
+        return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_PLL_BYPASS_SHIFT));
+    }
 
-/*!
- * @brief De-initialize the USB1 PLL PFD.
- *
- * This function disables the USB1 PLL PFD.
- *
- * @param pfd Which PFD clock to disable.
- */
-void CLOCK_DeinitUsb1Pfd(clock_pfd_t pfd);
+    /*!
+     * @brief Check if PLL is enabled
+     *
+     * @param base CCM_ANALOG base pointer.
+     * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
+     * @return PLL bypass status.
+     *         - true: The PLL is enabled.
+     *         - false: The PLL is not enabled.
+     */
+    static inline bool CLOCK_IsPllEnabled(CCM_ANALOG_Type *base, clock_pll_t pll)
+    {
+        return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_TUPLE_SHIFT(pll)));
+    }
 
-/*!
- * @brief Get current System PLL PFD output frequency.
- *
- * This function get current output frequency of specific System PLL PFD
- *
- * @param pfd   pfd name to get frequency.
- * @return The PFD output frequency in hertz.
- */
-uint32_t CLOCK_GetSysPfdFreq(clock_pfd_t pfd);
+    /*!
+     * @brief PLL bypass clock source setting.
+     * Note: change the bypass clock source also change the pll reference clock source.
+     *
+     * @param base CCM_ANALOG base pointer.
+     * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
+     * @param src Bypass clock source, reference _clock_pll_bypass_clk_src.
+     */
+    static inline void CLOCK_SetPllBypassRefClkSrc(CCM_ANALOG_Type *base, clock_pll_t pll, uint32_t src)
+    {
+        CCM_ANALOG_TUPLE_REG(base, pll) |=
+            (CCM_ANALOG_TUPLE_REG(base, pll) & (~CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK)) | src;
+    }
 
-/*!
- * @brief Get current USB1 PLL PFD output frequency.
- *
- * This function get current output frequency of specific USB1 PLL PFD
- *
- * @param pfd   pfd name to get frequency.
- * @return The PFD output frequency in hertz.
- */
-uint32_t CLOCK_GetUsb1PfdFreq(clock_pfd_t pfd);
+    /*!
+     * @brief Get PLL bypass clock value, it is PLL reference clock actually.
+     * If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise
+     * 0 will be returned.
+     * @param base CCM_ANALOG base pointer.
+     * @param pll PLL control name (see @ref ccm_analog_pll_control_t enumeration)
+     * @retval bypass reference clock frequency value.
+     */
+    static inline uint32_t CLOCK_GetPllBypassRefClk(CCM_ANALOG_Type *base, clock_pll_t pll)
+    {
+        return (((CCM_ANALOG_TUPLE_REG(base, pll) & CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK) >>
+                 CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT) == kCLOCK_PllClkSrc24M)
+                   ? CLOCK_GetOscFreq()
+                   : CLKPN_FREQ;
+    }
 
-/*! @brief Enable USB HS PHY PLL clock.
- *
- * This function enables the internal 480MHz USB PHY PLL clock.
- *
- * @param src  USB HS PHY PLL clock source.
- * @param freq The frequency specified by src.
- * @retval true The clock is set successfully.
- * @retval false The clock source is invalid to get proper USB HS clock.
- */
-bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq);
+    /*!
+     * @brief Initialize the ARM PLL.
+     *
+     * This function initialize the ARM PLL with specific settings
+     *
+     * @param config   configuration to set to PLL.
+     */
+    void CLOCK_InitArmPll(const clock_arm_pll_config_t *config);
 
-/*! @brief Disable USB HS PHY PLL clock.
- *
- * This function disables USB HS PHY PLL clock.
- */
-void CLOCK_DisableUsbhs0PhyPllClock(void);
+    /*!
+     * @brief De-initialize the ARM PLL.
+     */
+    void CLOCK_DeinitArmPll(void);
 
-/*! @brief Enable USB HS PHY PLL clock.
- *
- * This function enables the internal 480MHz USB PHY PLL clock.
- *
- * @param src  USB HS PHY PLL clock source.
- * @param freq The frequency specified by src.
- * @retval true The clock is set successfully.
- * @retval false The clock source is invalid to get proper USB HS clock.
- */
-bool CLOCK_EnableUsbhs1PhyPllClock(clock_usb_phy_src_t src, uint32_t freq);
+    /*!
+     * @brief Initialize the System PLL.
+     *
+     * This function initializes the System PLL with specific settings
+     *
+     * @param config Configuration to set to PLL.
+     */
+    void CLOCK_InitSysPll(const clock_sys_pll_config_t *config);
 
-/*! @brief Disable USB HS PHY PLL clock.
- *
- * This function disables USB HS PHY PLL clock.
- */
-void CLOCK_DisableUsbhs1PhyPllClock(void);
+    /*!
+     * @brief De-initialize the System PLL.
+     */
+    void CLOCK_DeinitSysPll(void);
 
-/* @} */
+    /*!
+     * @brief Initialize the USB1 PLL.
+     *
+     * This function initializes the USB1 PLL with specific settings
+     *
+     * @param config Configuration to set to PLL.
+     */
+    void CLOCK_InitUsb1Pll(const clock_usb_pll_config_t *config);
+
+    /*!
+     * @brief Deinitialize the USB1 PLL.
+     */
+    void CLOCK_DeinitUsb1Pll(void);
+
+    /*!
+     * @brief Initialize the USB2 PLL.
+     *
+     * This function initializes the USB2 PLL with specific settings
+     *
+     * @param config Configuration to set to PLL.
+     */
+    void CLOCK_InitUsb2Pll(const clock_usb_pll_config_t *config);
+
+    /*!
+     * @brief Deinitialize the USB2 PLL.
+     */
+    void CLOCK_DeinitUsb2Pll(void);
+
+    /*!
+     * @brief Initializes the Audio PLL.
+     *
+     * This function initializes the Audio PLL with specific settings
+     *
+     * @param config Configuration to set to PLL.
+     */
+    void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config);
+
+    /*!
+     * @brief De-initialize the Audio PLL.
+     */
+    void CLOCK_DeinitAudioPll(void);
+
+    /*!
+     * @brief Initialize the video PLL.
+     *
+     * This function configures the Video PLL with specific settings
+     *
+     * @param config   configuration to set to PLL.
+     */
+    void CLOCK_InitVideoPll(const clock_video_pll_config_t *config);
+
+    /*!
+     * @brief De-initialize the Video PLL.
+     */
+    void CLOCK_DeinitVideoPll(void);
+    /*!
+     * @brief Initialize the ENET PLL.
+     *
+     * This function initializes the ENET PLL with specific settings.
+     *
+     * @param config Configuration to set to PLL.
+     */
+    void CLOCK_InitEnetPll(const clock_enet_pll_config_t *config);
+
+    /*!
+     * @brief Deinitialize the ENET PLL.
+     *
+     * This function disables the ENET PLL.
+     */
+    void CLOCK_DeinitEnetPll(void);
+
+    /*!
+     * @brief Get current PLL output frequency.
+     *
+     * This function get current output frequency of specific PLL
+     *
+     * @param pll   pll name to get frequency.
+     * @return The PLL output frequency in hertz.
+     */
+    uint32_t CLOCK_GetPllFreq(clock_pll_t pll);
+
+    /*!
+     * @brief Initialize the System PLL PFD.
+     *
+     * This function initializes the System PLL PFD. During new value setting,
+     * the clock output is disabled to prevent glitch.
+     *
+     * @param pfd Which PFD clock to enable.
+     * @param pfdFrac The PFD FRAC value.
+     * @note It is recommended that PFD settings are kept between 12-35.
+     */
+    void CLOCK_InitSysPfd(clock_pfd_t pfd, uint8_t pfdFrac);
+
+    /*!
+     * @brief De-initialize the System PLL PFD.
+     *
+     * This function disables the System PLL PFD.
+     *
+     * @param pfd Which PFD clock to disable.
+     */
+    void CLOCK_DeinitSysPfd(clock_pfd_t pfd);
+
+    /*!
+     * @brief Initialize the USB1 PLL PFD.
+     *
+     * This function initializes the USB1 PLL PFD. During new value setting,
+     * the clock output is disabled to prevent glitch.
+     *
+     * @param pfd Which PFD clock to enable.
+     * @param pfdFrac The PFD FRAC value.
+     * @note It is recommended that PFD settings are kept between 12-35.
+     */
+    void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac);
+
+    /*!
+     * @brief De-initialize the USB1 PLL PFD.
+     *
+     * This function disables the USB1 PLL PFD.
+     *
+     * @param pfd Which PFD clock to disable.
+     */
+    void CLOCK_DeinitUsb1Pfd(clock_pfd_t pfd);
+
+    /*!
+     * @brief Get current System PLL PFD output frequency.
+     *
+     * This function get current output frequency of specific System PLL PFD
+     *
+     * @param pfd   pfd name to get frequency.
+     * @return The PFD output frequency in hertz.
+     */
+    uint32_t CLOCK_GetSysPfdFreq(clock_pfd_t pfd);
+
+    /*!
+     * @brief Get current USB1 PLL PFD output frequency.
+     *
+     * This function get current output frequency of specific USB1 PLL PFD
+     *
+     * @param pfd   pfd name to get frequency.
+     * @return The PFD output frequency in hertz.
+     */
+    uint32_t CLOCK_GetUsb1PfdFreq(clock_pfd_t pfd);
+
+    /*! @brief Enable USB HS PHY PLL clock.
+     *
+     * This function enables the internal 480MHz USB PHY PLL clock.
+     *
+     * @param src  USB HS PHY PLL clock source.
+     * @param freq The frequency specified by src.
+     * @retval true The clock is set successfully.
+     * @retval false The clock source is invalid to get proper USB HS clock.
+     */
+    bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq);
+
+    /*! @brief Disable USB HS PHY PLL clock.
+     *
+     * This function disables USB HS PHY PLL clock.
+     */
+    void CLOCK_DisableUsbhs0PhyPllClock(void);
+
+    /*! @brief Enable USB HS PHY PLL clock.
+     *
+     * This function enables the internal 480MHz USB PHY PLL clock.
+     *
+     * @param src  USB HS PHY PLL clock source.
+     * @param freq The frequency specified by src.
+     * @retval true The clock is set successfully.
+     * @retval false The clock source is invalid to get proper USB HS clock.
+     */
+    bool CLOCK_EnableUsbhs1PhyPllClock(clock_usb_phy_src_t src, uint32_t freq);
+
+    /*! @brief Disable USB HS PHY PLL clock.
+     *
+     * This function disables USB HS PHY PLL clock.
+     */
+    void CLOCK_DisableUsbhs1PhyPllClock(void);
+
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_common.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_common.c
index 903faf52b..ba6aa0122 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_common.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_common.c
@@ -1,45 +1,45 @@
 /*
-* The Clear BSD License
-* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
+ * The Clear BSD License
+ * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
  * Copyright 2016 NXP
-* All rights reserved.
-*
-* 
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted (subject to the limitations in the disclaimer below) provided
-*  that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-*   of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-*   list of conditions and the following disclaimer in the documentation and/or
-*   other materials provided with the distribution.
-*
-* o Neither the name of the copyright holder nor the names of its
-*   contributors may be used to endorse or promote products derived from this
-*   software without specific prior written permission.
-*
-* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted (subject to the limitations in the disclaimer below) provided
+ *  that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of the copyright holder nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
 
 #include "fsl_common.h"
-#define SDK_MEM_MAGIC_NUMBER   12345U
+#define SDK_MEM_MAGIC_NUMBER 12345U
 
 typedef struct _mem_align_control_block
 {
-    uint16_t    identifier;     /*!< Identifier for the memory control block. */
-    uint16_t    offset;         /*!< offset from aligned adress to real address */
+    uint16_t identifier; /*!< Identifier for the memory control block. */
+    uint16_t offset;     /*!< offset from aligned adress to real address */
 } mem_align_cb_t;
 
 /* Component ID definition, used by tools. */
@@ -47,7 +47,6 @@ typedef struct _mem_align_control_block
 #define FSL_COMPONENT_ID "platform.drivers.common"
 #endif
 
-
 #ifndef __GIC_PRIO_BITS
 #if defined(ENABLE_RAM_VECTOR_TABLE)
 uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
@@ -58,8 +57,8 @@ uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
     extern uint32_t Image$$VECTOR_RAM$$Base[];
     extern uint32_t Image$$RW_m_data$$Base[];
 
-#define __VECTOR_TABLE Image$$VECTOR_ROM$$Base
-#define __VECTOR_RAM Image$$VECTOR_RAM$$Base
+#define __VECTOR_TABLE          Image$$VECTOR_ROM$$Base
+#define __VECTOR_RAM            Image$$VECTOR_RAM$$Base
 #define __RAM_VECTOR_TABLE_SIZE (((uint32_t)Image$$RW_m_data$$Base - (uint32_t)Image$$VECTOR_RAM$$Base))
 #elif defined(__ICCARM__)
     extern uint32_t __RAM_VECTOR_TABLE_SIZE[];
@@ -76,11 +75,9 @@ uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
     uint32_t irqMaskValue;
 
     irqMaskValue = DisableGlobalIRQ();
-    if (SCB->VTOR != (uint32_t)__VECTOR_RAM)
-    {
+    if (SCB->VTOR != (uint32_t)__VECTOR_RAM) {
         /* Copy the vector table from ROM to RAM */
-        for (n = 0; n < ((uint32_t)__RAM_VECTOR_TABLE_SIZE) / sizeof(uint32_t); n++)
-        {
+        for (n = 0; n < ((uint32_t)__RAM_VECTOR_TABLE_SIZE) / sizeof(uint32_t); n++) {
             __VECTOR_RAM[n] = __VECTOR_TABLE[n];
         }
         /* Point the VTOR to the position of vector table */
@@ -119,8 +116,7 @@ void EnableDeepSleepIRQ(IRQn_Type interrupt)
     {
         uint32_t index = 0;
 
-        while (intNumber >= 32u)
-        {
+        while (intNumber >= 32u) {
             index++;
             intNumber -= 32u;
         }
@@ -144,8 +140,7 @@ void DisableDeepSleepIRQ(IRQn_Type interrupt)
     {
         uint32_t index = 0;
 
-        while (intNumber >= 32u)
-        {
+        while (intNumber >= 32u) {
             index++;
             intNumber -= 32u;
         }
@@ -164,16 +159,15 @@ void *SDK_Malloc(size_t size, size_t alignbytes)
     uint32_t alignedsize = SDK_SIZEALIGN(size, alignbytes) + alignbytes + sizeof(mem_align_cb_t);
     void *p_align_addr, *p_addr = malloc(alignedsize);
 
-    if (!p_addr)
-    {
+    if (!p_addr) {
         return NULL;
     }
 
     p_align_addr = (void *)SDK_SIZEALIGN((uint32_t)p_addr + sizeof(mem_align_cb_t), alignbytes);
 
-    p_cb = (mem_align_cb_t *)((uint32_t)p_align_addr - 4);
+    p_cb             = (mem_align_cb_t *)((uint32_t)p_align_addr - 4);
     p_cb->identifier = SDK_MEM_MAGIC_NUMBER;
-    p_cb->offset = (uint32_t)p_align_addr - (uint32_t)p_addr;
+    p_cb->offset     = (uint32_t)p_align_addr - (uint32_t)p_addr;
 
     return (void *)p_align_addr;
 }
@@ -182,11 +176,9 @@ void SDK_Free(void *ptr)
 {
     mem_align_cb_t *p_cb = (mem_align_cb_t *)((uint32_t)ptr - 4);
 
-    if (p_cb->identifier != SDK_MEM_MAGIC_NUMBER)
-    {
+    if (p_cb->identifier != SDK_MEM_MAGIC_NUMBER) {
         return;
     }
 
     free((void *)((uint32_t)ptr - p_cb->offset));
 }
-
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.c
index 5e0e3a97b..2606d6c01 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2017, NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.dcdc_1"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -69,10 +68,8 @@ static uint32_t DCDC_GetInstance(DCDC_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_dcdcBases); instance++)
-    {
-        if (s_dcdcBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_dcdcBases); instance++) {
+        if (s_dcdcBases[instance] == base) {
             break;
         }
     }
@@ -103,24 +100,22 @@ void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource)
     uint32_t tmp32;
 
     /* Configure the DCDC_REG0 register. */
-    tmp32 = base->REG0 &
-            ~(DCDC_REG0_XTAL_24M_OK_MASK | DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK | DCDC_REG0_SEL_CLK_MASK |
-              DCDC_REG0_PWD_OSC_INT_MASK);
-    switch (clockSource)
-    {
-        case kDCDC_ClockInternalOsc:
-            tmp32 |= DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK;
-            break;
-        case kDCDC_ClockExternalOsc:
-            /* Choose the external clock and disable the internal clock. */
-            tmp32 |= DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK | DCDC_REG0_SEL_CLK_MASK | DCDC_REG0_PWD_OSC_INT_MASK;
-            break;
-        case kDCDC_ClockAutoSwitch:
-            /* Set to switch from internal ring osc to xtal 24M if auto mode is enabled. */
-            tmp32 |= DCDC_REG0_XTAL_24M_OK_MASK;
-            break;
-        default:
-            break;
+    tmp32 = base->REG0 & ~(DCDC_REG0_XTAL_24M_OK_MASK | DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK |
+                           DCDC_REG0_SEL_CLK_MASK | DCDC_REG0_PWD_OSC_INT_MASK);
+    switch (clockSource) {
+    case kDCDC_ClockInternalOsc:
+        tmp32 |= DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK;
+        break;
+    case kDCDC_ClockExternalOsc:
+        /* Choose the external clock and disable the internal clock. */
+        tmp32 |= DCDC_REG0_DISABLE_AUTO_CLK_SWITCH_MASK | DCDC_REG0_SEL_CLK_MASK | DCDC_REG0_PWD_OSC_INT_MASK;
+        break;
+    case kDCDC_ClockAutoSwitch:
+        /* Set to switch from internal ring osc to xtal 24M if auto mode is enabled. */
+        tmp32 |= DCDC_REG0_XTAL_24M_OK_MASK;
+        break;
+    default:
+        break;
     }
     base->REG0 = tmp32;
 }
@@ -129,14 +124,14 @@ void DCDC_GetDefaultDetectionConfig(dcdc_detection_config_t *config)
 {
     assert(NULL != config);
 
-    config->enableXtalokDetection = false;
+    config->enableXtalokDetection         = false;
     config->powerDownOverVoltageDetection = true;
-    config->powerDownLowVlotageDetection = false;
+    config->powerDownLowVlotageDetection  = false;
     config->powerDownOverCurrentDetection = true;
     config->powerDownPeakCurrentDetection = true;
-    config->powerDownZeroCrossDetection = true;
-    config->OverCurrentThreshold = kDCDC_OverCurrentThresholdAlt0;
-    config->PeakCurrentThreshold = kDCDC_PeakCurrentThresholdAlt0;
+    config->powerDownZeroCrossDetection   = true;
+    config->OverCurrentThreshold          = kDCDC_OverCurrentThresholdAlt0;
+    config->PeakCurrentThreshold          = kDCDC_PeakCurrentThresholdAlt0;
 }
 
 void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *config)
@@ -152,28 +147,22 @@ void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *con
 
     tmp32 |= DCDC_REG0_CUR_SNS_THRSH(config->PeakCurrentThreshold) |
              DCDC_REG0_OVERCUR_TRIG_ADJ(config->OverCurrentThreshold);
-    if (false == config->enableXtalokDetection)
-    {
+    if (false == config->enableXtalokDetection) {
         tmp32 |= DCDC_REG0_XTALOK_DISABLE_MASK;
     }
-    if (config->powerDownOverVoltageDetection)
-    {
+    if (config->powerDownOverVoltageDetection) {
         tmp32 |= DCDC_REG0_PWD_HIGH_VOLT_DET_MASK;
     }
-    if (config->powerDownLowVlotageDetection)
-    {
+    if (config->powerDownLowVlotageDetection) {
         tmp32 |= DCDC_REG0_PWD_CMP_BATT_DET_MASK;
     }
-    if (config->powerDownOverCurrentDetection)
-    {
+    if (config->powerDownOverCurrentDetection) {
         tmp32 |= DCDC_REG0_PWD_OVERCUR_DET_MASK;
     }
-    if (config->powerDownPeakCurrentDetection)
-    {
+    if (config->powerDownPeakCurrentDetection) {
         tmp32 |= DCDC_REG0_PWD_CUR_SNS_CMP_MASK;
     }
-    if (config->powerDownZeroCrossDetection)
-    {
+    if (config->powerDownZeroCrossDetection) {
         tmp32 |= DCDC_REG0_PWD_ZCD_MASK;
     }
     base->REG0 = tmp32;
@@ -183,10 +172,10 @@ void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config)
 {
     assert(NULL != config);
 
-    config->enableOverloadDetection = true;
+    config->enableOverloadDetection     = true;
     config->enableAdjustHystereticValue = false;
-    config->countChargingTimePeriod = kDCDC_CountChargingTimePeriod8Cycle;
-    config->countChargingTimeThreshold = kDCDC_CountChargingTimeThreshold32;
+    config->countChargingTimePeriod     = kDCDC_CountChargingTimePeriod8Cycle;
+    config->countChargingTimeThreshold  = kDCDC_CountChargingTimeThreshold32;
 }
 
 void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config)
@@ -195,17 +184,14 @@ void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *conf
 
     uint32_t tmp32;
     /* Configure the DCDC_REG0 register. */
-    tmp32 = base->REG0 &
-            ~(DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK | DCDC_REG0_LP_HIGH_HYS_MASK | DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK |
-              DCDC_REG0_LP_OVERLOAD_THRSH_MASK);
+    tmp32 = base->REG0 & ~(DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK | DCDC_REG0_LP_HIGH_HYS_MASK |
+                           DCDC_REG0_LP_OVERLOAD_FREQ_SEL_MASK | DCDC_REG0_LP_OVERLOAD_THRSH_MASK);
     tmp32 |= DCDC_REG0_LP_OVERLOAD_FREQ_SEL(config->countChargingTimePeriod) |
              DCDC_REG0_LP_OVERLOAD_THRSH(config->countChargingTimeThreshold);
-    if (config->enableOverloadDetection)
-    {
+    if (config->enableOverloadDetection) {
         tmp32 |= DCDC_REG0_EN_LP_OVERLOAD_SNS_MASK;
     }
-    if (config->enableAdjustHystereticValue)
-    {
+    if (config->enableAdjustHystereticValue) {
         tmp32 |= DCDC_REG0_LP_HIGH_HYS_MASK;
     }
     base->REG0 = tmp32;
@@ -215,8 +201,7 @@ uint32_t DCDC_GetstatusFlags(DCDC_Type *base)
 {
     uint32_t tmp32 = 0U;
 
-    if (DCDC_REG0_STS_DC_OK_MASK == (DCDC_REG0_STS_DC_OK_MASK & base->REG0))
-    {
+    if (DCDC_REG0_STS_DC_OK_MASK == (DCDC_REG0_STS_DC_OK_MASK & base->REG0)) {
         tmp32 |= kDCDC_LockedOKStatus;
     }
 
@@ -225,12 +210,10 @@ uint32_t DCDC_GetstatusFlags(DCDC_Type *base)
 
 void DCDC_ResetCurrentAlertSignal(DCDC_Type *base, bool enable)
 {
-    if (enable)
-    {
+    if (enable) {
         base->REG0 |= DCDC_REG0_CURRENT_ALERT_RESET_MASK;
     }
-    else
-    {
+    else {
         base->REG0 &= ~DCDC_REG0_CURRENT_ALERT_RESET_MASK;
     }
 }
@@ -239,14 +222,14 @@ void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config)
 {
     assert(NULL != config);
 
-    config->enableCommonHysteresis = false;
+    config->enableCommonHysteresis         = false;
     config->enableCommonThresholdDetection = false;
-    config->enableInvertHysteresisSign = false;
-    config->enableRCThresholdDetection = false;
-    config->enableRCScaleCircuit = 0U;
-    config->complementFeedForwardStep = 0U;
-    config->controlParameterMagnitude = 2U;
-    config->integralProportionalRatio = 2U;
+    config->enableInvertHysteresisSign     = false;
+    config->enableRCThresholdDetection     = false;
+    config->enableRCScaleCircuit           = 0U;
+    config->complementFeedForwardStep      = 0U;
+    config->controlParameterMagnitude      = 2U;
+    config->integralProportionalRatio      = 2U;
 }
 
 void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config)
@@ -257,31 +240,26 @@ void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t
 
     /* Configure the DCDC_REG1 register. */
     tmp32 = base->REG1 & ~(DCDC_REG1_LOOPCTRL_EN_HYST_MASK | DCDC_REG1_LOOPCTRL_HST_THRESH_MASK);
-    if (config->enableCommonHysteresis)
-    {
+    if (config->enableCommonHysteresis) {
         tmp32 |= DCDC_REG1_LOOPCTRL_EN_HYST_MASK;
     }
-    if (config->enableCommonThresholdDetection)
-    {
+    if (config->enableCommonThresholdDetection) {
         tmp32 |= DCDC_REG1_LOOPCTRL_HST_THRESH_MASK;
     }
     base->REG1 = tmp32;
 
     /* configure the DCDC_REG2 register. */
-    tmp32 = base->REG2 &
-            ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK |
-              DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK | DCDC_REG2_LOOPCTRL_DC_FF_MASK | DCDC_REG2_LOOPCTRL_DC_R_MASK |
-              DCDC_REG2_LOOPCTRL_DC_C_MASK);
+    tmp32 = base->REG2 & ~(DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK | DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK |
+                           DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK | DCDC_REG2_LOOPCTRL_DC_FF_MASK |
+                           DCDC_REG2_LOOPCTRL_DC_R_MASK | DCDC_REG2_LOOPCTRL_DC_C_MASK);
     tmp32 |= DCDC_REG2_LOOPCTRL_DC_FF(config->complementFeedForwardStep) |
              DCDC_REG2_LOOPCTRL_DC_R(config->controlParameterMagnitude) |
              DCDC_REG2_LOOPCTRL_DC_C(config->integralProportionalRatio) |
              DCDC_REG2_LOOPCTRL_EN_RCSCALE(config->enableRCScaleCircuit);
-    if (config->enableInvertHysteresisSign)
-    {
+    if (config->enableInvertHysteresisSign) {
         tmp32 |= DCDC_REG2_LOOPCTRL_HYST_SIGN_MASK;
     }
-    if (config->enableRCThresholdDetection)
-    {
+    if (config->enableRCThresholdDetection) {
         tmp32 |= DCDC_REG2_LOOPCTRL_RCSCALE_THRSH_MASK;
     }
     base->REG2 = tmp32;
@@ -294,8 +272,7 @@ void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *conf
     uint32_t tmp32;
 
     tmp32 = base->REG3 & ~DCDC_REG3_MINPWR_DC_HALFCLK_MASK;
-    if (config->enableUseHalfFreqForContinuous)
-    {
+    if (config->enableUseHalfFreqForContinuous) {
         tmp32 |= DCDC_REG3_MINPWR_DC_HALFCLK_MASK;
     }
     base->REG3 = tmp32;
@@ -316,9 +293,7 @@ void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t VDDRun, uint32_t VDDStan
 
     /* DCDC_STS_DC_OK bit will be de-asserted after target register changes. After output voltage settling to new
      * target value, DCDC_STS_DC_OK will be asserted. */
-    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & base->REG0))
-    {
-    }
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & base->REG0)) {}
 }
 
 void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regulator_config_t *config)
@@ -330,8 +305,7 @@ void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regula
     /* Configure the DCDC_REG1 register. */
     tmp32 = base->REG1 & ~(DCDC_REG1_REG_FBK_SEL_MASK | DCDC_REG1_REG_RLOAD_SW_MASK);
     tmp32 |= DCDC_REG1_REG_FBK_SEL(config->feedbackPoint);
-    if (config->enableLoadResistor)
-    {
+    if (config->enableLoadResistor) {
         tmp32 |= DCDC_REG1_REG_RLOAD_SW_MASK;
     }
     base->REG1 = tmp32;
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.h
index 647d3a858..07353a28d 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dcdc.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2017, NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -48,27 +48,27 @@
 /*! @brief DCDC driver version. */
 #define FSL_DCDC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
                                                         /*!
-                                                        * @brief DCDC status flags.
-                                                        */
+                                                         * @brief DCDC status flags.
+                                                         */
 enum _dcdc_status_flags_t
 {
     kDCDC_LockedOKStatus = (1U << 0U), /*!< Indicate DCDC status. 1'b1: DCDC already settled 1'b0: DCDC is settling. */
 };
 
 /*!
-* @brief The current bias of low power comparator.
-*/
+ * @brief The current bias of low power comparator.
+ */
 typedef enum _dcdc_comparator_current_bias
 {
-    kDCDC_ComparatorCurrentBias50nA = 0U,  /*!< The current bias of low power comparator is 50nA. */
+    kDCDC_ComparatorCurrentBias50nA  = 0U, /*!< The current bias of low power comparator is 50nA. */
     kDCDC_ComparatorCurrentBias100nA = 1U, /*!< The current bias of low power comparator is 100nA. */
     kDCDC_ComparatorCurrentBias200nA = 2U, /*!< The current bias of low power comparator is 200nA. */
     kDCDC_ComparatorCurrentBias400nA = 3U, /*!< The current bias of low power comparator is 400nA. */
 } dcdc_comparator_current_bias_t;
 
 /*!
-* @brief The threshold of over current detection.
-*/
+ * @brief The threshold of over current detection.
+ */
 typedef enum _dcdc_over_current_threshold
 {
     kDCDC_OverCurrentThresholdAlt0 = 0U, /*!< 1A in the run mode, 0.25A in the power save mode. */
@@ -78,8 +78,8 @@ typedef enum _dcdc_over_current_threshold
 } dcdc_over_current_threshold_t;
 
 /*!
-* @brief The threshold if peak current detection.
-*/
+ * @brief The threshold if peak current detection.
+ */
 typedef enum _dcdc_peak_current_threshold
 {
     kDCDC_PeakCurrentThresholdAlt0 = 0U, /*!< 150mA peak current threshold. */
@@ -91,23 +91,23 @@ typedef enum _dcdc_peak_current_threshold
 } dcdc_peak_current_threshold_t;
 
 /*!
-* @brief The period of counting the charging times in power save mode.
-*/
+ * @brief The period of counting the charging times in power save mode.
+ */
 typedef enum _dcdc_count_charging_time_period
 {
-    kDCDC_CountChargingTimePeriod8Cycle = 0U,  /*!< Eight 32k cycle. */
+    kDCDC_CountChargingTimePeriod8Cycle  = 0U, /*!< Eight 32k cycle. */
     kDCDC_CountChargingTimePeriod16Cycle = 1U, /*!< Sixteen 32k cycle. */
 } dcdc_count_charging_time_period_t;
 
 /*!
-* @brief The threshold of the counting number of charging times
-*/
+ * @brief The threshold of the counting number of charging times
+ */
 typedef enum _dcdc_count_charging_time_threshold
 {
     kDCDC_CountChargingTimeThreshold32 = 0U, /*!< 0x0: 32. */
     kDCDC_CountChargingTimeThreshold64 = 1U, /*!< 0x1: 64. */
     kDCDC_CountChargingTimeThreshold16 = 2U, /*!< 0x2: 16. */
-    kDCDC_CountChargingTimeThreshold8 = 3U,  /*!< 0x3: 8. */
+    kDCDC_CountChargingTimeThreshold8  = 3U, /*!< 0x3: 8. */
 } dcdc_count_charging_time_threshold_t;
 
 /*!
@@ -115,14 +115,14 @@ typedef enum _dcdc_count_charging_time_threshold
  */
 typedef enum _dcdc_clock_source
 {
-    kDCDC_ClockAutoSwitch = 0U,  /*!< Automatic clock switch from internal oscillator to external clock. */
+    kDCDC_ClockAutoSwitch  = 0U, /*!< Automatic clock switch from internal oscillator to external clock. */
     kDCDC_ClockInternalOsc = 1U, /*!< Use internal oscillator. */
     kDCDC_ClockExternalOsc = 2U, /*!< Use external 24M crystal oscillator. */
 } dcdc_clock_source_t;
 
 /*!
-* @brief Configuration for DCDC detection.
-*/
+ * @brief Configuration for DCDC detection.
+ */
 typedef struct _dcdc_detection_config
 {
     bool enableXtalokDetection;         /*!< Enable xtalok detection circuit. */
@@ -137,8 +137,8 @@ typedef struct _dcdc_detection_config
 } dcdc_detection_config_t;
 
 /*!
-* @brief Configuration for the loop control.
-*/
+ * @brief Configuration for the loop control.
+ */
 typedef struct _dcdc_loop_control_config
 {
     bool enableCommonHysteresis;         /*!< Enable hysteresis in switching converter common mode analog comparators.
@@ -160,8 +160,8 @@ typedef struct _dcdc_loop_control_config
                                            optimize efficiency and loop response. */
 } dcdc_loop_control_config_t;
 /*!
-* @brief Configuration for DCDC low power.
-*/
+ * @brief Configuration for DCDC low power.
+ */
 typedef struct _dcdc_low_power_config
 {
     bool enableOverloadDetection; /*!< Enable the overload detection in power save mode, if current is larger than the
@@ -176,8 +176,8 @@ typedef struct _dcdc_low_power_config
 } dcdc_low_power_config_t;
 
 /*!
-* @brief Configuration for DCDC internal regulator.
-*/
+ * @brief Configuration for DCDC internal regulator.
+ */
 typedef struct _dcdc_internal_regulator_config
 {
     bool enableLoadResistor; /*!< control the load resistor of the internal regulator of DCDC, the load resistor is
@@ -194,294 +194,290 @@ typedef struct _dcdc_min_power_config
     bool enableUseHalfFreqForContinuous; /*!< Set DCDC clock to half frequency for the continuous mode. */
 } dcdc_min_power_config_t;
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*******************************************************************************
- * API
- ******************************************************************************/
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*******************************************************************************
+     * API
+     ******************************************************************************/
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
-* @brief Enable the access to DCDC registers.
-*
-* @param base DCDC peripheral base address.
-*/
-void DCDC_Init(DCDC_Type *base);
+    /*!
+     * @brief Enable the access to DCDC registers.
+     *
+     * @param base DCDC peripheral base address.
+     */
+    void DCDC_Init(DCDC_Type *base);
 
-/*!
-* @brief Disable the access to DCDC registers.
-*
-* @param base DCDC peripheral base address.
-*/
-void DCDC_Deinit(DCDC_Type *base);
+    /*!
+     * @brief Disable the access to DCDC registers.
+     *
+     * @param base DCDC peripheral base address.
+     */
+    void DCDC_Deinit(DCDC_Type *base);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Status
- * @{
- */
+    /*!
+     * @name Status
+     * @{
+     */
 
-/*!
-* @brief Get DCDC status flags.
-*
-* @param base peripheral base address.
-* @return Mask of asserted status flags. See to "_dcdc_status_flags_t".
-*/
-uint32_t DCDC_GetstatusFlags(DCDC_Type *base);
+    /*!
+     * @brief Get DCDC status flags.
+     *
+     * @param base peripheral base address.
+     * @return Mask of asserted status flags. See to "_dcdc_status_flags_t".
+     */
+    uint32_t DCDC_GetstatusFlags(DCDC_Type *base);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Misc control.
- * @{
- */
+    /*!
+     * @name Misc control.
+     * @{
+     */
 
-/*!
- * @brief Enable the output range comparator.
- *
- * The output range comparator is disabled by default.
- *
- * @param base DCDC peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void DCDC_EnableOutputRangeComparator(DCDC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the output range comparator.
+     *
+     * The output range comparator is disabled by default.
+     *
+     * @param base DCDC peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void DCDC_EnableOutputRangeComparator(DCDC_Type *base, bool enable)
     {
-        base->REG0 &= ~DCDC_REG0_PWD_CMP_OFFSET_MASK;
+        if (enable) {
+            base->REG0 &= ~DCDC_REG0_PWD_CMP_OFFSET_MASK;
+        }
+        else {
+            base->REG0 |= DCDC_REG0_PWD_CMP_OFFSET_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Configure the DCDC clock source.
+     *
+     * @param base DCDC peripheral base address.
+     * @param clockSource Clock source for DCDC. See to "dcdc_clock_source_t".
+     */
+    void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource);
+
+    /*!
+     * @brief Get the default setting for detection configuration.
+     *
+     * The default configuration are set according to responding registers' setting when powered on.
+     * They are:
+     * @code
+     *   config->enableXtalokDetection = false;
+     *   config->powerDownOverVoltageDetection = true;
+     *   config->powerDownLowVlotageDetection = false;
+     *   config->powerDownOverCurrentDetection = true;
+     *   config->powerDownPeakCurrentDetection = true;
+     *   config->powerDownZeroCrossDetection = true;
+     *   config->OverCurrentThreshold = kDCDC_OverCurrentThresholdAlt0;
+     *   config->PeakCurrentThreshold = kDCDC_PeakCurrentThresholdAlt0;
+     * @endcode
+     *
+     * @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
+     */
+    void DCDC_GetDefaultDetectionConfig(dcdc_detection_config_t *config);
+
+    /*!
+     * @breif Configure the DCDC detection.
+     *
+     * @param base DCDC peripheral base address.
+     * @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
+     */
+    void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *config);
+
+    /*!
+     * @brief Get the default setting for low power configuration.
+     *
+     * The default configuration are set according to responding registers' setting when powered on.
+     * They are:
+     * @code
+     *   config->enableOverloadDetection = true;
+     *   config->enableAdjustHystereticValue = false;
+     *   config->countChargingTimePeriod = kDCDC_CountChargingTimePeriod8Cycle;
+     *   config->countChargingTimeThreshold = kDCDC_CountChargingTimeThreshold32;
+     * @endcode
+     *
+     * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t"
+     */
+    void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config);
+
+    /*!
+     * @brief Configure the DCDC low power.
+     *
+     * @param base DCDC peripheral base address.
+     * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t".
+     */
+    void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config);
+
+    /*!
+     * @brief Reset current alert signal. Alert signal is generate by peak current detection.
+     *
+     * @param base DCDC peripheral base address.
+     * @param enable Switcher to reset signal. True means reset signal. False means don't reset signal.
+     */
+    void DCDC_ResetCurrentAlertSignal(DCDC_Type *base, bool enable);
+
+    /*!
+     * @brief Set the bangap trim value to trim bandgap voltage.
+     *
+     * @param base DCDC peripheral base address.
+     * @param TrimValue The bangap trim value. Available range is 0U-31U.
+     */
+    static inline void DCDC_SetBandgapVoltageTrimValue(DCDC_Type *base, uint32_t trimValue)
     {
-        base->REG0 |= DCDC_REG0_PWD_CMP_OFFSET_MASK;
+        base->REG1 &= ~DCDC_REG1_VBG_TRIM_MASK;
+        base->REG1 |= DCDC_REG1_VBG_TRIM(trimValue);
     }
-}
 
-/*!
-* @brief Configure the DCDC clock source.
-*
-* @param base DCDC peripheral base address.
-* @param clockSource Clock source for DCDC. See to "dcdc_clock_source_t".
-*/
-void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource);
+    /*!
+     * @brief Get the default setting for loop control configuration.
+     *
+     * The default configuration are set according to responding registers' setting when powered on.
+     * They are:
+     * @code
+     *   config->enableCommonHysteresis = false;
+     *   config->enableCommonThresholdDetection = false;
+     *   config->enableInvertHysteresisSign = false;
+     *   config->enableRCThresholdDetection = false;
+     *   config->enableRCScaleCircuit = 0U;
+     *   config->complementFeedForwardStep = 0U;
+     *   config->controlParameterMagnitude = 2U;
+     *   config->integralProportionalRatio = 2U;
+     * @endcode
+     *
+     * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t"
+     */
+    void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config);
 
-/*!
-* @brief Get the default setting for detection configuration.
-*
-* The default configuration are set according to responding registers' setting when powered on.
-* They are:
-* @code
-*   config->enableXtalokDetection = false;
-*   config->powerDownOverVoltageDetection = true;
-*   config->powerDownLowVlotageDetection = false;
-*   config->powerDownOverCurrentDetection = true;
-*   config->powerDownPeakCurrentDetection = true;
-*   config->powerDownZeroCrossDetection = true;
-*   config->OverCurrentThreshold = kDCDC_OverCurrentThresholdAlt0;
-*   config->PeakCurrentThreshold = kDCDC_PeakCurrentThresholdAlt0;
-* @endcode
-*
-* @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
-*/
-void DCDC_GetDefaultDetectionConfig(dcdc_detection_config_t *config);
+    /*!
+     * @brief Configure the DCDC loop control.
+     *
+     * @param base DCDC peripheral base address.
+     * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t".
+     */
+    void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config);
 
-/*!
-* @breif Configure the DCDC detection.
-*
-* @param base DCDC peripheral base address.
-* @param config Pointer to configuration structure. See to "dcdc_detection_config_t"
-*/
-void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *config);
+    /*!
+     * @brief Configure for the min power.
+     *
+     * @param base DCDC peripheral base address.
+     * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t".
+     */
+    void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *config);
 
-/*!
-* @brief Get the default setting for low power configuration.
-*
-* The default configuration are set according to responding registers' setting when powered on.
-* They are:
-* @code
-*   config->enableOverloadDetection = true;
-*   config->enableAdjustHystereticValue = false;
-*   config->countChargingTimePeriod = kDCDC_CountChargingTimePeriod8Cycle;
-*   config->countChargingTimeThreshold = kDCDC_CountChargingTimeThreshold32;
-* @endcode
-*
-* @param config Pointer to configuration structure. See to "dcdc_low_power_config_t"
-*/
-void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config);
-
-/*!
-* @brief Configure the DCDC low power.
-*
-* @param base DCDC peripheral base address.
-* @param config Pointer to configuration structure. See to "dcdc_low_power_config_t".
-*/
-void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config);
-
-/*!
-* @brief Reset current alert signal. Alert signal is generate by peak current detection.
-*
-* @param base DCDC peripheral base address.
-* @param enable Switcher to reset signal. True means reset signal. False means don't reset signal.
-*/
-void DCDC_ResetCurrentAlertSignal(DCDC_Type *base, bool enable);
-
-/*!
-* @brief Set the bangap trim value to trim bandgap voltage.
-*
-* @param base DCDC peripheral base address.
-* @param TrimValue The bangap trim value. Available range is 0U-31U.
-*/
-static inline void DCDC_SetBandgapVoltageTrimValue(DCDC_Type *base, uint32_t trimValue)
-{
-    base->REG1 &= ~DCDC_REG1_VBG_TRIM_MASK;
-    base->REG1 |= DCDC_REG1_VBG_TRIM(trimValue);
-}
-
-/*!
-* @brief Get the default setting for loop control configuration.
-*
-* The default configuration are set according to responding registers' setting when powered on.
-* They are:
-* @code
-*   config->enableCommonHysteresis = false;
-*   config->enableCommonThresholdDetection = false;
-*   config->enableInvertHysteresisSign = false;
-*   config->enableRCThresholdDetection = false;
-*   config->enableRCScaleCircuit = 0U;
-*   config->complementFeedForwardStep = 0U;
-*   config->controlParameterMagnitude = 2U;
-*   config->integralProportionalRatio = 2U;
-* @endcode
-*
-* @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t"
-*/
-void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config);
-
-/*!
-* @brief Configure the DCDC loop control.
-*
-* @param base DCDC peripheral base address.
-* @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t".
-*/
-void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config);
-
-/*!
- * @brief Configure for the min power.
- *
- * @param base DCDC peripheral base address.
- * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t".
- */
-void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *config);
-
-/*!
-* @brief Set the current bias of low power comparator.
-*
-* @param base DCDC peripheral base address.
-* @param biasVaule The current bias of low power comparator. Refer to "dcdc_comparator_current_bias_t".
-*/
-static inline void DCDC_SetLPComparatorBiasValue(DCDC_Type *base, dcdc_comparator_current_bias_t biasVaule)
-{
-    base->REG1 &= ~DCDC_REG1_LP_CMP_ISRC_SEL_MASK;
-    base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasVaule);
-}
-
-static inline void DCDC_LockTargetVoltage(DCDC_Type *base)
-{
-    base->REG3 |= DCDC_REG3_DISABLE_STEP_MASK;
-}
-
-/*!
-* @brief Adjust the target voltage of VDD_SOC in run mode and low power mode.
-*
-* This function is to adjust the target voltage of DCDC output. Change them and finally wait until the output is
-* stabled.
-* Set the target value of run mode the same as low power mode before entering power save mode, because DCDC will switch
-* back to run mode if it detects the current loading is larger than about 50 mA(typical value).
-*
-* @param base DCDC peripheral base address.
-* @param VDDRun Target value in run mode. 25 mV each step from 0x00 to 0x1F. 00 is for 0.8V, 0x1F is for 1.575V.
-* @param VDDStandby Target value in low power mode. 25 mV each step from 0x00 to 0x4. 00 is for 0.9V, 0x4 is for 1.0V.
-*/
-void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t VDDRun, uint32_t VDDStandby);
-
-/*!
-* @brief Configure the DCDC internal regulator.
-*
-* @param base DCDC peripheral base address.
-* @param config Pointer to configuration structure. See to "dcdc_internal_regulator_config_t".
-*/
-void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regulator_config_t *config);
-
-/*!
-* @brief Ajust delay to reduce ground noise.
-*
-* @param base DCDC peripheral base address.
-* @param enable Enable the feature or not.
-*/
-static inline void DCDC_EnableAdjustDelay(DCDC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Set the current bias of low power comparator.
+     *
+     * @param base DCDC peripheral base address.
+     * @param biasVaule The current bias of low power comparator. Refer to "dcdc_comparator_current_bias_t".
+     */
+    static inline void DCDC_SetLPComparatorBiasValue(DCDC_Type *base, dcdc_comparator_current_bias_t biasVaule)
     {
-        base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK;
+        base->REG1 &= ~DCDC_REG1_LP_CMP_ISRC_SEL_MASK;
+        base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasVaule);
     }
-    else
+
+    static inline void DCDC_LockTargetVoltage(DCDC_Type *base)
     {
-        base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK;
+        base->REG3 |= DCDC_REG3_DISABLE_STEP_MASK;
     }
-}
 
-/*!
-* @brief Enable/Disable to improve the transition from heavy load to light load. It is valid while zero
-*        cross detection is enabled. If ouput exceeds the threshold, DCDC would return CCM from DCM.
-*
-* @param base DCDC peripheral base address.
-* @param enable Enable the feature or not.
-*/
-static inline void DCDC_EnableImproveTransition(DCDC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Adjust the target voltage of VDD_SOC in run mode and low power mode.
+     *
+     * This function is to adjust the target voltage of DCDC output. Change them and finally wait until the output is
+     * stabled.
+     * Set the target value of run mode the same as low power mode before entering power save mode, because DCDC will
+     * switch back to run mode if it detects the current loading is larger than about 50 mA(typical value).
+     *
+     * @param base DCDC peripheral base address.
+     * @param VDDRun Target value in run mode. 25 mV each step from 0x00 to 0x1F. 00 is for 0.8V, 0x1F is for 1.575V.
+     * @param VDDStandby Target value in low power mode. 25 mV each step from 0x00 to 0x4. 00 is for 0.9V, 0x4 is
+     * for 1.0V.
+     */
+    void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t VDDRun, uint32_t VDDStandby);
+
+    /*!
+     * @brief Configure the DCDC internal regulator.
+     *
+     * @param base DCDC peripheral base address.
+     * @param config Pointer to configuration structure. See to "dcdc_internal_regulator_config_t".
+     */
+    void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regulator_config_t *config);
+
+    /*!
+     * @brief Ajust delay to reduce ground noise.
+     *
+     * @param base DCDC peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void DCDC_EnableAdjustDelay(DCDC_Type *base, bool enable)
     {
-        base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK;
+        if (enable) {
+            base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK;
+        }
+        else {
+            base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable/Disable to improve the transition from heavy load to light load. It is valid while zero
+     *        cross detection is enabled. If ouput exceeds the threshold, DCDC would return CCM from DCM.
+     *
+     * @param base DCDC peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void DCDC_EnableImproveTransition(DCDC_Type *base, bool enable)
     {
-        base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK;
+        if (enable) {
+            base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK;
+        }
+        else {
+            base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK;
+        }
     }
-}
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Application guideline.
- * @{
- */
+    /*!
+     * @name Application guideline.
+     * @{
+     */
 
-/*!
-* @brief Boot DCDC into DCM(discontinous conduction mode).
-*
-*  pwd_zcd=0x0;
-*  pwd_cmp_offset=0x0;
-*  dcdc_loopctrl_en_rcscale=0x3 or 0x5;
-*  DCM_set_ctrl=1'b1;
-*
-* @param base DCDC peripheral base address.
-*/
-void DCDC_BootIntoDCM(DCDC_Type *base);
+    /*!
+     * @brief Boot DCDC into DCM(discontinous conduction mode).
+     *
+     *  pwd_zcd=0x0;
+     *  pwd_cmp_offset=0x0;
+     *  dcdc_loopctrl_en_rcscale=0x3 or 0x5;
+     *  DCM_set_ctrl=1'b1;
+     *
+     * @param base DCDC peripheral base address.
+     */
+    void DCDC_BootIntoDCM(DCDC_Type *base);
 
-/*!
-* @brief Boot DCDC into CCM(continous conduction mode).
-*
-*  pwd_zcd=0x1;
-*  pwd_cmp_offset=0x0;
-*  dcdc_loopctrl_en_rcscale=0x3;
-*
-* @param base DCDC peripheral base address.
-*/
-void DCDC_BootIntoCCM(DCDC_Type *base);
+    /*!
+     * @brief Boot DCDC into CCM(continous conduction mode).
+     *
+     *  pwd_zcd=0x1;
+     *  pwd_cmp_offset=0x0;
+     *  dcdc_loopctrl_en_rcscale=0x3;
+     *
+     * @param base DCDC peripheral base address.
+     */
+    void DCDC_BootIntoCCM(DCDC_Type *base);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.c
index 155531de5..e88a66546 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -43,7 +43,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.dmamux"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -75,10 +74,8 @@ static uint32_t DMAMUX_GetInstance(DMAMUX_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_dmamuxBases); instance++)
-    {
-        if (s_dmamuxBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_dmamuxBases); instance++) {
+        if (s_dmamuxBases[instance] == base) {
             break;
         }
     }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.h
index 17f32ee2e..6fb16ca91 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_dmamux.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -42,7 +42,6 @@
  * @{
  */
 
-
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
@@ -58,142 +57,141 @@
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-/*!
- * @name DMAMUX Initialization and de-initialization
- * @{
- */
+    /*!
+     * @name DMAMUX Initialization and de-initialization
+     * @{
+     */
 
-/*!
- * @brief Initializes the DMAMUX peripheral.
- *
- * This function ungates the DMAMUX clock.
- *
- * @param base DMAMUX peripheral base address.
- *
- */
-void DMAMUX_Init(DMAMUX_Type *base);
+    /*!
+     * @brief Initializes the DMAMUX peripheral.
+     *
+     * This function ungates the DMAMUX clock.
+     *
+     * @param base DMAMUX peripheral base address.
+     *
+     */
+    void DMAMUX_Init(DMAMUX_Type *base);
 
-/*!
- * @brief Deinitializes the DMAMUX peripheral.
- *
- * This function gates the DMAMUX clock.
- *
- * @param base DMAMUX peripheral base address.
- */
-void DMAMUX_Deinit(DMAMUX_Type *base);
+    /*!
+     * @brief Deinitializes the DMAMUX peripheral.
+     *
+     * This function gates the DMAMUX clock.
+     *
+     * @param base DMAMUX peripheral base address.
+     */
+    void DMAMUX_Deinit(DMAMUX_Type *base);
 
-/* @} */
-/*!
- * @name DMAMUX Channel Operation
- * @{
- */
+    /* @} */
+    /*!
+     * @name DMAMUX Channel Operation
+     * @{
+     */
 
-/*!
- * @brief Enables the DMAMUX channel.
- *
- * This function enables the DMAMUX channel.
- *
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- */
-static inline void DMAMUX_EnableChannel(DMAMUX_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables the DMAMUX channel.
+     *
+     * This function enables the DMAMUX channel.
+     *
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     */
+    static inline void DMAMUX_EnableChannel(DMAMUX_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK;
-}
+        base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK;
+    }
 
-/*!
- * @brief Disables the DMAMUX channel.
- *
- * This function disables the DMAMUX channel.
- *
- * @note The user must disable the DMAMUX channel before configuring it.
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- */
-static inline void DMAMUX_DisableChannel(DMAMUX_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Disables the DMAMUX channel.
+     *
+     * This function disables the DMAMUX channel.
+     *
+     * @note The user must disable the DMAMUX channel before configuring it.
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     */
+    static inline void DMAMUX_DisableChannel(DMAMUX_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK;
-}
+        base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK;
+    }
 
-/*!
- * @brief Configures the DMAMUX channel source.
- *
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- * @param source Channel source, which is used to trigger the DMA transfer.
- */
-static inline void DMAMUX_SetSource(DMAMUX_Type *base, uint32_t channel, uint32_t source)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Configures the DMAMUX channel source.
+     *
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     * @param source Channel source, which is used to trigger the DMA transfer.
+     */
+    static inline void DMAMUX_SetSource(DMAMUX_Type *base, uint32_t channel, uint32_t source)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(source));
-}
+        base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(source));
+    }
 
 #if defined(FSL_FEATURE_DMAMUX_HAS_TRIG) && FSL_FEATURE_DMAMUX_HAS_TRIG > 0U
-/*!
- * @brief Enables the DMAMUX period trigger.
- *
- * This function enables the DMAMUX period trigger feature.
- *
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- */
-static inline void DMAMUX_EnablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables the DMAMUX period trigger.
+     *
+     * This function enables the DMAMUX period trigger feature.
+     *
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     */
+    static inline void DMAMUX_EnablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK;
-}
+        base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK;
+    }
 
-/*!
- * @brief Disables the DMAMUX period trigger.
- *
- * This function disables the DMAMUX period trigger.
- *
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- */
-static inline void DMAMUX_DisablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Disables the DMAMUX period trigger.
+     *
+     * This function disables the DMAMUX period trigger.
+     *
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     */
+    static inline void DMAMUX_DisablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK;
-}
+        base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK;
+    }
 #endif /* FSL_FEATURE_DMAMUX_HAS_TRIG */
 
 #if (defined(FSL_FEATURE_DMAMUX_HAS_A_ON) && FSL_FEATURE_DMAMUX_HAS_A_ON)
-/*!
- * @brief Enables the DMA channel to be always ON.
- *
- * This function enables the DMAMUX channel always ON feature.
- *
- * @param base DMAMUX peripheral base address.
- * @param channel DMAMUX channel number.
- * @param enable Switcher of the always ON feature. "true" means enabled, "false" means disabled.
- */
-static inline void DMAMUX_EnableAlwaysOn(DMAMUX_Type *base, uint32_t channel, bool enable)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables the DMA channel to be always ON.
+     *
+     * This function enables the DMAMUX channel always ON feature.
+     *
+     * @param base DMAMUX peripheral base address.
+     * @param channel DMAMUX channel number.
+     * @param enable Switcher of the always ON feature. "true" means enabled, "false" means disabled.
+     */
+    static inline void DMAMUX_EnableAlwaysOn(DMAMUX_Type *base, uint32_t channel, bool enable)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    if (enable)
-    {
-        base->CHCFG[channel] |= DMAMUX_CHCFG_A_ON_MASK;
+        if (enable) {
+            base->CHCFG[channel] |= DMAMUX_CHCFG_A_ON_MASK;
+        }
+        else {
+            base->CHCFG[channel] &= ~DMAMUX_CHCFG_A_ON_MASK;
+        }
     }
-    else
-    {
-        base->CHCFG[channel] &= ~DMAMUX_CHCFG_A_ON_MASK;
-    }
-}
 #endif /* FSL_FEATURE_DMAMUX_HAS_A_ON */
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.c
index 96b0f8002..97ea20998 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -43,7 +43,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.edma"
 #endif
 
-
 #define EDMA_TRANSFER_ENABLED_MASK 0x80U
 
 /*******************************************************************************
@@ -84,10 +83,8 @@ static uint32_t EDMA_GetInstance(DMA_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_edmaBases); instance++)
-    {
-        if (s_edmaBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_edmaBases); instance++) {
+        if (s_edmaBases[instance] == base) {
             break;
         }
     }
@@ -104,18 +101,18 @@ void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd)
     assert(((uint32_t)tcd & 0x1FU) == 0);
 
     /* Push tcd into hardware TCD register */
-    base->TCD[channel].SADDR = tcd->SADDR;
-    base->TCD[channel].SOFF = tcd->SOFF;
-    base->TCD[channel].ATTR = tcd->ATTR;
-    base->TCD[channel].NBYTES_MLNO = tcd->NBYTES;
-    base->TCD[channel].SLAST = tcd->SLAST;
-    base->TCD[channel].DADDR = tcd->DADDR;
-    base->TCD[channel].DOFF = tcd->DOFF;
+    base->TCD[channel].SADDR         = tcd->SADDR;
+    base->TCD[channel].SOFF          = tcd->SOFF;
+    base->TCD[channel].ATTR          = tcd->ATTR;
+    base->TCD[channel].NBYTES_MLNO   = tcd->NBYTES;
+    base->TCD[channel].SLAST         = tcd->SLAST;
+    base->TCD[channel].DADDR         = tcd->DADDR;
+    base->TCD[channel].DOFF          = tcd->DOFF;
     base->TCD[channel].CITER_ELINKNO = tcd->CITER;
-    base->TCD[channel].DLAST_SGA = tcd->DLAST_SGA;
+    base->TCD[channel].DLAST_SGA     = tcd->DLAST_SGA;
     /* Clear DONE bit first, otherwise ESG cannot be set */
-    base->TCD[channel].CSR = 0;
-    base->TCD[channel].CSR = tcd->CSR;
+    base->TCD[channel].CSR           = 0;
+    base->TCD[channel].CSR           = tcd->CSR;
     base->TCD[channel].BITER_ELINKNO = tcd->BITER;
 }
 
@@ -150,9 +147,9 @@ void EDMA_GetDefaultConfig(edma_config_t *config)
     assert(config != NULL);
 
     config->enableRoundRobinArbitration = false;
-    config->enableHaltOnError = true;
-    config->enableContinuousLinkMode = false;
-    config->enableDebugMode = false;
+    config->enableHaltOnError           = true;
+    config->enableContinuousLinkMode    = false;
+    config->enableDebugMode             = false;
 }
 
 void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)
@@ -207,7 +204,7 @@ void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, e
 
     uint32_t tmpreg;
 
-    tmpreg = base->TCD[channel].ATTR & (~(DMA_ATTR_SMOD_MASK | DMA_ATTR_DMOD_MASK));
+    tmpreg                  = base->TCD[channel].ATTR & (~(DMA_ATTR_SMOD_MASK | DMA_ATTR_DMOD_MASK));
     base->TCD[channel].ATTR = tmpreg | DMA_ATTR_DMOD(destModulo) | DMA_ATTR_SMOD(srcModulo);
 }
 
@@ -216,20 +213,17 @@ void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mas
     assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
 
     /* Enable error interrupt */
-    if (mask & kEDMA_ErrorInterruptEnable)
-    {
+    if (mask & kEDMA_ErrorInterruptEnable) {
         base->EEI |= (0x1U << channel);
     }
 
     /* Enable Major interrupt */
-    if (mask & kEDMA_MajorInterruptEnable)
-    {
+    if (mask & kEDMA_MajorInterruptEnable) {
         base->TCD[channel].CSR |= DMA_CSR_INTMAJOR_MASK;
     }
 
     /* Enable Half major interrupt */
-    if (mask & kEDMA_HalfInterruptEnable)
-    {
+    if (mask & kEDMA_HalfInterruptEnable) {
         base->TCD[channel].CSR |= DMA_CSR_INTHALF_MASK;
     }
 }
@@ -239,20 +233,17 @@ void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t ma
     assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
 
     /* Disable error interrupt */
-    if (mask & kEDMA_ErrorInterruptEnable)
-    {
+    if (mask & kEDMA_ErrorInterruptEnable) {
         base->EEI &= ~(0x1U << channel);
     }
 
     /* Disable Major interrupt */
-    if (mask & kEDMA_MajorInterruptEnable)
-    {
+    if (mask & kEDMA_MajorInterruptEnable) {
         base->TCD[channel].CSR &= ~DMA_CSR_INTMAJOR_MASK;
     }
 
     /* Disable Half major interrupt */
-    if (mask & kEDMA_HalfInterruptEnable)
-    {
+    if (mask & kEDMA_HalfInterruptEnable) {
         base->TCD[channel].CSR &= ~DMA_CSR_INTHALF_MASK;
     }
 }
@@ -263,17 +254,17 @@ void EDMA_TcdReset(edma_tcd_t *tcd)
     assert(((uint32_t)tcd & 0x1FU) == 0);
 
     /* Reset channel TCD */
-    tcd->SADDR = 0U;
-    tcd->SOFF = 0U;
-    tcd->ATTR = 0U;
-    tcd->NBYTES = 0U;
-    tcd->SLAST = 0U;
-    tcd->DADDR = 0U;
-    tcd->DOFF = 0U;
-    tcd->CITER = 0U;
+    tcd->SADDR     = 0U;
+    tcd->SOFF      = 0U;
+    tcd->ATTR      = 0U;
+    tcd->NBYTES    = 0U;
+    tcd->SLAST     = 0U;
+    tcd->DADDR     = 0U;
+    tcd->DOFF      = 0U;
+    tcd->CITER     = 0U;
     tcd->DLAST_SGA = 0U;
     /* Enable auto disable request feature */
-    tcd->CSR = DMA_CSR_DREQ(true);
+    tcd->CSR   = DMA_CSR_DREQ(true);
     tcd->BITER = 0U;
 }
 
@@ -301,8 +292,7 @@ void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *co
     /* Starting major iteration count */
     tcd->BITER = config->majorLoopCounts;
     /* Enable scatter/gather processing */
-    if (nextTcd != NULL)
-    {
+    if (nextTcd != NULL) {
         tcd->DLAST_SGA = (uint32_t)nextTcd;
         /*
             Before call EDMA_TcdSetTransferConfig or EDMA_SetTransferConfig,
@@ -349,7 +339,7 @@ void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint
         tmpreg = tcd->CITER & (~DMA_CITER_ELINKYES_LINKCH_MASK);
         tmpreg |= DMA_CITER_ELINKYES_LINKCH(linkedChannel);
         tcd->CITER = tmpreg;
-        tmpreg = tcd->BITER & (~DMA_BITER_ELINKYES_LINKCH_MASK);
+        tmpreg     = tcd->BITER & (~DMA_BITER_ELINKYES_LINKCH_MASK);
         tmpreg |= DMA_BITER_ELINKYES_LINKCH(linkedChannel);
         tcd->BITER = tmpreg;
     }
@@ -360,7 +350,7 @@ void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint
         /* Enable major link */
         tcd->CSR |= DMA_CSR_MAJORELINK_MASK;
         /* Set major linked channel */
-        tmpreg = tcd->CSR & (~DMA_CSR_MAJORLINKCH_MASK);
+        tmpreg   = tcd->CSR & (~DMA_CSR_MAJORLINKCH_MASK);
         tcd->CSR = tmpreg | DMA_CSR_MAJORLINKCH(linkedChannel);
     }
     else /* Link none */
@@ -378,7 +368,7 @@ void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t d
 
     uint32_t tmpreg;
 
-    tmpreg = tcd->ATTR & (~(DMA_ATTR_SMOD_MASK | DMA_ATTR_DMOD_MASK));
+    tmpreg    = tcd->ATTR & (~(DMA_ATTR_SMOD_MASK | DMA_ATTR_DMOD_MASK));
     tcd->ATTR = tmpreg | DMA_ATTR_DMOD(destModulo) | DMA_ATTR_SMOD(srcModulo);
 }
 
@@ -387,14 +377,12 @@ void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)
     assert(tcd != NULL);
 
     /* Enable Major interrupt */
-    if (mask & kEDMA_MajorInterruptEnable)
-    {
+    if (mask & kEDMA_MajorInterruptEnable) {
         tcd->CSR |= DMA_CSR_INTMAJOR_MASK;
     }
 
     /* Enable Half major interrupt */
-    if (mask & kEDMA_HalfInterruptEnable)
-    {
+    if (mask & kEDMA_HalfInterruptEnable) {
         tcd->CSR |= DMA_CSR_INTHALF_MASK;
     }
 }
@@ -404,14 +392,12 @@ void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)
     assert(tcd != NULL);
 
     /* Disable Major interrupt */
-    if (mask & kEDMA_MajorInterruptEnable)
-    {
+    if (mask & kEDMA_MajorInterruptEnable) {
         tcd->CSR &= ~DMA_CSR_INTMAJOR_MASK;
     }
 
     /* Disable Half major interrupt */
-    if (mask & kEDMA_HalfInterruptEnable)
-    {
+    if (mask & kEDMA_HalfInterruptEnable) {
         tcd->CSR &= ~DMA_CSR_INTHALF_MASK;
     }
 }
@@ -422,20 +408,16 @@ uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel)
 
     uint32_t remainingCount = 0;
 
-    if (DMA_CSR_DONE_MASK & base->TCD[channel].CSR)
-    {
+    if (DMA_CSR_DONE_MASK & base->TCD[channel].CSR) {
         remainingCount = 0;
     }
-    else
-    {
+    else {
         /* Calculate the unfinished bytes */
-        if (base->TCD[channel].CITER_ELINKNO & DMA_CITER_ELINKNO_ELINK_MASK)
-        {
+        if (base->TCD[channel].CITER_ELINKNO & DMA_CITER_ELINKNO_ELINK_MASK) {
             remainingCount =
                 (base->TCD[channel].CITER_ELINKYES & DMA_CITER_ELINKYES_CITER_MASK) >> DMA_CITER_ELINKYES_CITER_SHIFT;
         }
-        else
-        {
+        else {
             remainingCount =
                 (base->TCD[channel].CITER_ELINKNO & DMA_CITER_ELINKNO_CITER_MASK) >> DMA_CITER_ELINKNO_CITER_SHIFT;
         }
@@ -465,18 +447,15 @@ void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mas
     assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
 
     /* Clear DONE bit flag */
-    if (mask & kEDMA_DoneFlag)
-    {
+    if (mask & kEDMA_DoneFlag) {
         base->CDNE = channel;
     }
     /* Clear ERROR bit flag */
-    if (mask & kEDMA_ErrorFlag)
-    {
+    if (mask & kEDMA_ErrorFlag) {
         base->CERR = channel;
     }
     /* Clear INT bit flag */
-    if (mask & kEDMA_InterruptFlag)
-    {
+    if (mask & kEDMA_InterruptFlag) {
         base->CINT = channel;
     }
 }
@@ -511,12 +490,12 @@ void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel)
     /* Zero the handle */
     memset(handle, 0, sizeof(*handle));
 
-    handle->base = base;
+    handle->base    = base;
     handle->channel = channel;
     /* Get the DMA instance number */
-    edmaInstance = EDMA_GetInstance(base);
-    StartInstance = Get_StartInstance();
-    channelIndex = ((edmaInstance - StartInstance) * FSL_FEATURE_EDMA_MODULE_CHANNEL) + channel;
+    edmaInstance               = EDMA_GetInstance(base);
+    StartInstance              = Get_StartInstance();
+    channelIndex               = ((edmaInstance - StartInstance) * FSL_FEATURE_EDMA_MODULE_CHANNEL) + channel;
     s_EDMAHandle[channelIndex] = handle;
 
     /* Enable NVIC interrupt */
@@ -527,18 +506,18 @@ void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel)
        CSR will be 0. Because in order to suit EDMA busy check mechanism in
        EDMA_SubmitTransfer, CSR must be set 0.
     */
-    tcdRegs = (edma_tcd_t *)&handle->base->TCD[handle->channel];
-    tcdRegs->SADDR = 0;
-    tcdRegs->SOFF = 0;
-    tcdRegs->ATTR = 0;
-    tcdRegs->NBYTES = 0;
-    tcdRegs->SLAST = 0;
-    tcdRegs->DADDR = 0;
-    tcdRegs->DOFF = 0;
-    tcdRegs->CITER = 0;
+    tcdRegs            = (edma_tcd_t *)&handle->base->TCD[handle->channel];
+    tcdRegs->SADDR     = 0;
+    tcdRegs->SOFF      = 0;
+    tcdRegs->ATTR      = 0;
+    tcdRegs->NBYTES    = 0;
+    tcdRegs->SLAST     = 0;
+    tcdRegs->DADDR     = 0;
+    tcdRegs->DOFF      = 0;
+    tcdRegs->CITER     = 0;
     tcdRegs->DLAST_SGA = 0;
-    tcdRegs->CSR = 0;
-    tcdRegs->BITER = 0;
+    tcdRegs->CSR       = 0;
+    tcdRegs->BITER     = 0;
 }
 
 void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)
@@ -547,11 +526,11 @@ void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t
     assert(((uint32_t)tcdPool & 0x1FU) == 0);
 
     /* Initialize tcd queue attibute. */
-    handle->header = 0;
-    handle->tail = 0;
+    handle->header  = 0;
+    handle->tail    = 0;
     handle->tcdUsed = 0;
     handle->tcdSize = tcdSize;
-    handle->flags = 0;
+    handle->flags   = 0;
     handle->tcdPool = tcdPool;
 }
 
@@ -579,66 +558,63 @@ void EDMA_PrepareTransfer(edma_transfer_config_t *config,
     assert((destWidth == 1U) || (destWidth == 2U) || (destWidth == 4U) || (destWidth == 16U) || (destWidth == 32U));
     assert(transferBytes % bytesEachRequest == 0);
 
-    config->destAddr = (uint32_t)destAddr;
-    config->srcAddr = (uint32_t)srcAddr;
-    config->minorLoopBytes = bytesEachRequest;
+    config->destAddr        = (uint32_t)destAddr;
+    config->srcAddr         = (uint32_t)srcAddr;
+    config->minorLoopBytes  = bytesEachRequest;
     config->majorLoopCounts = transferBytes / bytesEachRequest;
-    switch (srcWidth)
-    {
-        case 1U:
-            config->srcTransferSize = kEDMA_TransferSize1Bytes;
-            break;
-        case 2U:
-            config->srcTransferSize = kEDMA_TransferSize2Bytes;
-            break;
-        case 4U:
-            config->srcTransferSize = kEDMA_TransferSize4Bytes;
-            break;
-        case 16U:
-            config->srcTransferSize = kEDMA_TransferSize16Bytes;
-            break;
-        case 32U:
-            config->srcTransferSize = kEDMA_TransferSize32Bytes;
-            break;
-        default:
-            break;
+    switch (srcWidth) {
+    case 1U:
+        config->srcTransferSize = kEDMA_TransferSize1Bytes;
+        break;
+    case 2U:
+        config->srcTransferSize = kEDMA_TransferSize2Bytes;
+        break;
+    case 4U:
+        config->srcTransferSize = kEDMA_TransferSize4Bytes;
+        break;
+    case 16U:
+        config->srcTransferSize = kEDMA_TransferSize16Bytes;
+        break;
+    case 32U:
+        config->srcTransferSize = kEDMA_TransferSize32Bytes;
+        break;
+    default:
+        break;
     }
-    switch (destWidth)
-    {
-        case 1U:
-            config->destTransferSize = kEDMA_TransferSize1Bytes;
-            break;
-        case 2U:
-            config->destTransferSize = kEDMA_TransferSize2Bytes;
-            break;
-        case 4U:
-            config->destTransferSize = kEDMA_TransferSize4Bytes;
-            break;
-        case 16U:
-            config->destTransferSize = kEDMA_TransferSize16Bytes;
-            break;
-        case 32U:
-            config->destTransferSize = kEDMA_TransferSize32Bytes;
-            break;
-        default:
-            break;
+    switch (destWidth) {
+    case 1U:
+        config->destTransferSize = kEDMA_TransferSize1Bytes;
+        break;
+    case 2U:
+        config->destTransferSize = kEDMA_TransferSize2Bytes;
+        break;
+    case 4U:
+        config->destTransferSize = kEDMA_TransferSize4Bytes;
+        break;
+    case 16U:
+        config->destTransferSize = kEDMA_TransferSize16Bytes;
+        break;
+    case 32U:
+        config->destTransferSize = kEDMA_TransferSize32Bytes;
+        break;
+    default:
+        break;
     }
-    switch (type)
-    {
-        case kEDMA_MemoryToMemory:
-            config->destOffset = destWidth;
-            config->srcOffset = srcWidth;
-            break;
-        case kEDMA_MemoryToPeripheral:
-            config->destOffset = 0U;
-            config->srcOffset = srcWidth;
-            break;
-        case kEDMA_PeripheralToMemory:
-            config->destOffset = destWidth;
-            config->srcOffset = 0U;
-            break;
-        default:
-            break;
+    switch (type) {
+    case kEDMA_MemoryToMemory:
+        config->destOffset = destWidth;
+        config->srcOffset  = srcWidth;
+        break;
+    case kEDMA_MemoryToPeripheral:
+        config->destOffset = 0U;
+        config->srcOffset  = srcWidth;
+        break;
+    case kEDMA_PeripheralToMemory:
+        config->destOffset = destWidth;
+        config->srcOffset  = 0U;
+        break;
+    default:
+        break;
     }
 }
 
@@ -649,19 +625,16 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
 
     edma_tcd_t *tcdRegs = (edma_tcd_t *)&handle->base->TCD[handle->channel];
 
-    if (handle->tcdPool == NULL)
-    {
+    if (handle->tcdPool == NULL) {
         /*
             Check if EDMA is busy: if the given channel started transfer, CSR will be not zero. Because
             if it is the last transfer, DREQ will be set. If not, ESG will be set. So in order to suit
             this check mechanism, EDMA_CreatHandle will clear CSR register.
         */
-        if ((tcdRegs->CSR != 0) && ((tcdRegs->CSR & DMA_CSR_DONE_MASK) == 0))
-        {
+        if ((tcdRegs->CSR != 0) && ((tcdRegs->CSR & DMA_CSR_DONE_MASK) == 0)) {
             return kStatus_EDMA_Busy;
         }
-        else
-        {
+        else {
             EDMA_SetTransferConfig(handle->base, handle->channel, config, NULL);
             /* Enable auto disable request feature */
             handle->base->TCD[handle->channel].CSR |= DMA_CSR_DREQ_MASK;
@@ -681,8 +654,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
 
         /* Check if tcd pool is full. */
         primask = DisableGlobalIRQ();
-        if (handle->tcdUsed >= handle->tcdSize)
-        {
+        if (handle->tcdUsed >= handle->tcdSize) {
             EnableGlobalIRQ(primask);
 
             return kStatus_EDMA_QueueFull;
@@ -691,8 +663,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
         handle->tcdUsed++;
         /* Calculate index of next TCD */
         nextTcd = currentTcd + 1U;
-        if (nextTcd == handle->tcdSize)
-        {
+        if (nextTcd == handle->tcdSize) {
             nextTcd = 0U;
         }
         /* Advance queue tail index */
@@ -708,8 +679,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
         /* Link current TCD with next TCD for identification of current TCD */
         handle->tcdPool[currentTcd].DLAST_SGA = (uint32_t)&handle->tcdPool[nextTcd];
         /* Chain from previous descriptor unless tcd pool size is 1(this descriptor is its own predecessor). */
-        if (currentTcd != previousTcd)
-        {
+        if (currentTcd != previousTcd) {
             /* Enable scatter/gather feature in the previous TCD block. */
             csr = (handle->tcdPool[previousTcd].CSR | DMA_CSR_ESG_MASK) & ~DMA_CSR_DREQ_MASK;
             handle->tcdPool[previousTcd].CSR = csr;
@@ -719,8 +689,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
                 link the TCD register in case link the current TCD with the dead chain when TCD loading occurs
                 before link the previous TCD block.
             */
-            if (tcdRegs->DLAST_SGA == (uint32_t)&handle->tcdPool[currentTcd])
-            {
+            if (tcdRegs->DLAST_SGA == (uint32_t)&handle->tcdPool[currentTcd]) {
                 /* Clear the DREQ bits for the dynamic scatter gather */
                 tcdRegs->CSR |= DMA_CSR_DREQ_MASK;
                 /* Enable scatter/gather also in the TCD registers. */
@@ -737,8 +706,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
                     transfer again. And if ESG is set, it means transfer has notfinished, so TCD dynamic
                     link succeed.
                 */
-                if (tcdRegs->CSR & DMA_CSR_ESG_MASK)
-                {
+                if (tcdRegs->CSR & DMA_CSR_ESG_MASK) {
                     tcdRegs->CSR &= ~DMA_CSR_DREQ_MASK;
                     return kStatus_Success;
                 }
@@ -747,8 +715,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
                     condition when ESG bit is not set: it means the dynamic TCD link succeed and the current
                     TCD block has been loaded into TCD registers.
                 */
-                if (tcdRegs->DLAST_SGA == (uint32_t)&handle->tcdPool[nextTcd])
-                {
+                if (tcdRegs->DLAST_SGA == (uint32_t)&handle->tcdPool[nextTcd]) {
                     return kStatus_Success;
                 }
                 /*
@@ -756,13 +723,11 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
                     So shall configure TCD registers.
                 */
             }
-            else if (tcdRegs->DLAST_SGA != 0)
-            {
+            else if (tcdRegs->DLAST_SGA != 0) {
                 /* The current TCD block has been linked successfully. */
                 return kStatus_Success;
             }
-            else
-            {
+            else {
                 /*
                     DLAST_SGA is 0 and it means the first submit transfer, so shall configure
                     TCD registers.
@@ -772,8 +737,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
         /* There is no live chain, TCD block need to be installed in TCD registers. */
         EDMA_InstallTCD(handle->base, handle->channel, &handle->tcdPool[currentTcd]);
         /* Enable channel request again. */
-        if (handle->flags & EDMA_TRANSFER_ENABLED_MASK)
-        {
+        if (handle->flags & EDMA_TRANSFER_ENABLED_MASK) {
             handle->base->SERQ = DMA_SERQ_SERQ(handle->channel);
         }
 
@@ -785,8 +749,7 @@ void EDMA_StartTransfer(edma_handle_t *handle)
 {
     assert(handle != NULL);
 
-    if (handle->tcdPool == NULL)
-    {
+    if (handle->tcdPool == NULL) {
         handle->base->SERQ = DMA_SERQ_SERQ(handle->channel);
     }
     else /* Use the TCD queue. */
@@ -797,15 +760,12 @@ void EDMA_StartTransfer(edma_handle_t *handle)
         handle->flags |= EDMA_TRANSFER_ENABLED_MASK;
 
         /* Check if there was at least one descriptor submitted since reset (TCD in registers is valid) */
-        if (tcdRegs->DLAST_SGA != 0U)
-        {
+        if (tcdRegs->DLAST_SGA != 0U) {
             primask = DisableGlobalIRQ();
             /* Check if channel request is actually disable. */
-            if ((handle->base->ERQ & (1U << handle->channel)) == 0U)
-            {
+            if ((handle->base->ERQ & (1U << handle->channel)) == 0U) {
                 /* Check if transfer is paused. */
-                if ((!(tcdRegs->CSR & DMA_CSR_DONE_MASK)) || (tcdRegs->CSR & DMA_CSR_ESG_MASK))
-                {
+                if ((!(tcdRegs->CSR & DMA_CSR_DONE_MASK)) || (tcdRegs->CSR & DMA_CSR_ESG_MASK)) {
                     /*
                         Re-enable channel request must be as soon as possible, so must put it into
                         critical section to avoid task switching or interrupt service routine.
@@ -839,10 +799,9 @@ void EDMA_AbortTransfer(edma_handle_t *handle)
     handle->base->TCD[handle->channel].DLAST_SGA = 0;
 
     /* Handle the tcd */
-    if (handle->tcdPool != NULL)
-    {
-        handle->header = 0;
-        handle->tail = 0;
+    if (handle->tcdPool != NULL) {
+        handle->header  = 0;
+        handle->tail    = 0;
         handle->tcdUsed = 0;
     }
 }
@@ -853,8 +812,7 @@ void EDMA_HandleIRQ(edma_handle_t *handle)
 
     /* Clear EDMA interrupt flag */
     handle->base->CINT = handle->channel;
-    if ((handle->tcdPool == NULL) && (handle->callback != NULL))
-    {
+    if ((handle->tcdPool == NULL) && (handle->callback != NULL)) {
         (handle->callback)(handle, handle->userData, true, 0);
     }
     else /* Use the TCD queue. Please refer to the API descriptions in the eDMA header file for detailed information. */
@@ -872,34 +830,27 @@ void EDMA_HandleIRQ(edma_handle_t *handle)
         /* Get the index of the next transfer TCD blcoks to be loaded into the eDMA engine. */
         sga_index = sga / sizeof(edma_tcd_t);
         /* Adjust header positions. */
-        if (transfer_done)
-        {
+        if (transfer_done) {
             /* New header shall point to the next TCD to be loaded (current one is already finished) */
             new_header = sga_index;
         }
-        else
-        {
+        else {
             /* New header shall point to this descriptor currently loaded (not finished yet) */
             new_header = sga_index ? sga_index - 1U : handle->tcdSize - 1U;
         }
         /* Calculate the number of finished TCDs */
-        if (new_header == handle->header)
-        {
-            if (handle->tcdUsed == handle->tcdSize)
-            {
+        if (new_header == handle->header) {
+            if (handle->tcdUsed == handle->tcdSize) {
                 tcds_done = handle->tcdUsed;
             }
-            else
-            {
+            else {
                 /* No TCD in the memory are going to be loaded or internal error occurs. */
                 tcds_done = 0;
             }
         }
-        else
-        {
+        else {
             tcds_done = new_header - handle->header;
-            if (tcds_done < 0)
-            {
+            if (tcds_done < 0) {
                 tcds_done += handle->tcdSize;
             }
         }
@@ -908,8 +859,7 @@ void EDMA_HandleIRQ(edma_handle_t *handle)
         /* Release TCD blocks. tcdUsed is the TCD number which can be used/loaded in the memory pool. */
         handle->tcdUsed -= tcds_done;
         /* Invoke callback function. */
-        if (handle->callback)
-        {
+        if (handle->callback) {
             (handle->callback)(handle, handle->userData, transfer_done, tcds_done);
         }
     }
@@ -921,12 +871,10 @@ void EDMA_HandleIRQ(edma_handle_t *handle)
 #if defined(DMA0)
 void DMA0_04_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[0]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[4]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -938,12 +886,10 @@ void DMA0_04_DriverIRQHandler(void)
 
 void DMA0_15_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[1]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[5]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -955,12 +901,10 @@ void DMA0_15_DriverIRQHandler(void)
 
 void DMA0_26_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[2]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[6]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -972,12 +916,10 @@ void DMA0_26_DriverIRQHandler(void)
 
 void DMA0_37_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[3]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[7]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -993,12 +935,10 @@ void DMA0_37_DriverIRQHandler(void)
 #if defined(DMA0)
 void DMA1_04_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[8]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[12]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1010,12 +950,10 @@ void DMA1_04_DriverIRQHandler(void)
 
 void DMA1_15_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[9]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[13]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1027,12 +965,10 @@ void DMA1_15_DriverIRQHandler(void)
 
 void DMA1_26_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[10]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[14]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1044,12 +980,10 @@ void DMA1_26_DriverIRQHandler(void)
 
 void DMA1_37_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[11]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[15]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1062,12 +996,10 @@ void DMA1_37_DriverIRQHandler(void)
 #else
 void DMA1_04_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[0]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[4]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1079,12 +1011,10 @@ void DMA1_04_DriverIRQHandler(void)
 
 void DMA1_15_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[1]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[5]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1096,12 +1026,10 @@ void DMA1_15_DriverIRQHandler(void)
 
 void DMA1_26_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[2]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[6]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1113,12 +1041,10 @@ void DMA1_26_DriverIRQHandler(void)
 
 void DMA1_37_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[3]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[7]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1136,12 +1062,10 @@ void DMA1_37_DriverIRQHandler(void)
 
 void DMA0_08_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[0]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[8]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1153,12 +1077,10 @@ void DMA0_08_DriverIRQHandler(void)
 
 void DMA0_19_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[1]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[9]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1170,12 +1092,10 @@ void DMA0_19_DriverIRQHandler(void)
 
 void DMA0_210_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[2]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[10]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1187,12 +1107,10 @@ void DMA0_210_DriverIRQHandler(void)
 
 void DMA0_311_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[3]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[11]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1204,12 +1122,10 @@ void DMA0_311_DriverIRQHandler(void)
 
 void DMA0_412_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[4]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[12]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1221,12 +1137,10 @@ void DMA0_412_DriverIRQHandler(void)
 
 void DMA0_513_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[5]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[13]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1238,12 +1152,10 @@ void DMA0_513_DriverIRQHandler(void)
 
 void DMA0_614_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[6]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[14]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1255,12 +1167,10 @@ void DMA0_614_DriverIRQHandler(void)
 
 void DMA0_715_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[7]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[15]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1273,12 +1183,10 @@ void DMA0_715_DriverIRQHandler(void)
 #if defined(DMA1)
 void DMA1_08_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[16]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 8U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 8U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[24]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1290,12 +1198,10 @@ void DMA1_08_DriverIRQHandler(void)
 
 void DMA1_19_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[17]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 9U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 9U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[25]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1307,12 +1213,10 @@ void DMA1_19_DriverIRQHandler(void)
 
 void DMA1_210_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[18]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 10U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 10U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[26]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1324,12 +1228,10 @@ void DMA1_210_DriverIRQHandler(void)
 
 void DMA1_311_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[19]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 11U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 11U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[27]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1341,12 +1243,10 @@ void DMA1_311_DriverIRQHandler(void)
 
 void DMA1_412_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[20]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 12U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 12U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[28]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1358,12 +1258,10 @@ void DMA1_412_DriverIRQHandler(void)
 
 void DMA1_513_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[21]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 13U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 13U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[29]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1375,12 +1273,10 @@ void DMA1_513_DriverIRQHandler(void)
 
 void DMA1_614_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[22]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 14U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 14U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[30]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1392,12 +1288,10 @@ void DMA1_614_DriverIRQHandler(void)
 
 void DMA1_715_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[23]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA1, 15U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA1, 15U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[31]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1414,12 +1308,10 @@ void DMA1_715_DriverIRQHandler(void)
 
 void DMA0_DMA16_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[0]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 16U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 16U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[16]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1431,12 +1323,10 @@ void DMA0_DMA16_DriverIRQHandler(void)
 
 void DMA1_DMA17_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[1]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 17U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 17U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[17]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1448,12 +1338,10 @@ void DMA1_DMA17_DriverIRQHandler(void)
 
 void DMA2_DMA18_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[2]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 18U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 18U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[18]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1465,12 +1353,10 @@ void DMA2_DMA18_DriverIRQHandler(void)
 
 void DMA3_DMA19_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[3]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 19U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 19U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[19]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1482,12 +1368,10 @@ void DMA3_DMA19_DriverIRQHandler(void)
 
 void DMA4_DMA20_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[4]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 20U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 20U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[20]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1499,12 +1383,10 @@ void DMA4_DMA20_DriverIRQHandler(void)
 
 void DMA5_DMA21_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[5]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 21U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 21U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[21]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1516,12 +1398,10 @@ void DMA5_DMA21_DriverIRQHandler(void)
 
 void DMA6_DMA22_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[6]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 22U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 22U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[22]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1533,12 +1413,10 @@ void DMA6_DMA22_DriverIRQHandler(void)
 
 void DMA7_DMA23_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[7]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 23U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 23U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[23]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1550,12 +1428,10 @@ void DMA7_DMA23_DriverIRQHandler(void)
 
 void DMA8_DMA24_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[8]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 24U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 24U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[24]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1567,12 +1443,10 @@ void DMA8_DMA24_DriverIRQHandler(void)
 
 void DMA9_DMA25_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[9]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 25U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 25U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[25]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1584,12 +1458,10 @@ void DMA9_DMA25_DriverIRQHandler(void)
 
 void DMA10_DMA26_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[10]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 26U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 26U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[26]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1601,12 +1473,10 @@ void DMA10_DMA26_DriverIRQHandler(void)
 
 void DMA11_DMA27_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[11]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 27U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 27U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[27]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1618,12 +1488,10 @@ void DMA11_DMA27_DriverIRQHandler(void)
 
 void DMA12_DMA28_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[12]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 28U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 28U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[28]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1635,12 +1503,10 @@ void DMA12_DMA28_DriverIRQHandler(void)
 
 void DMA13_DMA29_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[13]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 29U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 29U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[29]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1652,12 +1518,10 @@ void DMA13_DMA29_DriverIRQHandler(void)
 
 void DMA14_DMA30_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[14]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 30U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 30U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[30]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1669,12 +1533,10 @@ void DMA14_DMA30_DriverIRQHandler(void)
 
 void DMA15_DMA31_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[15]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 31U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 31U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[31]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1690,12 +1552,10 @@ void DMA15_DMA31_DriverIRQHandler(void)
 
 void DMA0_0_4_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 0U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[0]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 4U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[4]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1707,12 +1567,10 @@ void DMA0_0_4_DriverIRQHandler(void)
 
 void DMA0_1_5_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 1U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[1]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 5U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[5]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1724,12 +1582,10 @@ void DMA0_1_5_DriverIRQHandler(void)
 
 void DMA0_2_6_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 2U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[2]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 6U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[6]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1741,12 +1597,10 @@ void DMA0_2_6_DriverIRQHandler(void)
 
 void DMA0_3_7_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 3U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[3]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 7U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[7]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1758,12 +1612,10 @@ void DMA0_3_7_DriverIRQHandler(void)
 
 void DMA0_8_12_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 8U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[8]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 12U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[12]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1775,12 +1627,10 @@ void DMA0_8_12_DriverIRQHandler(void)
 
 void DMA0_9_13_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 9U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[9]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 13U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[13]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1792,12 +1642,10 @@ void DMA0_9_13_DriverIRQHandler(void)
 
 void DMA0_10_14_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 10U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[10]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 14U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[14]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1809,12 +1657,10 @@ void DMA0_10_14_DriverIRQHandler(void)
 
 void DMA0_11_15_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 11U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[11]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 15U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[15]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1826,12 +1672,10 @@ void DMA0_11_15_DriverIRQHandler(void)
 
 void DMA0_16_20_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 16U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 16U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[16]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 20U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 20U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[20]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1843,12 +1687,10 @@ void DMA0_16_20_DriverIRQHandler(void)
 
 void DMA0_17_21_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 17U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 17U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[17]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 21U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 21U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[21]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1860,12 +1702,10 @@ void DMA0_17_21_DriverIRQHandler(void)
 
 void DMA0_18_22_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 18U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 18U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[18]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 22U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 22U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[22]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1877,12 +1717,10 @@ void DMA0_18_22_DriverIRQHandler(void)
 
 void DMA0_19_23_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 19U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 19U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[19]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 23U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 23U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[23]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1894,12 +1732,10 @@ void DMA0_19_23_DriverIRQHandler(void)
 
 void DMA0_24_28_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 24U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 24U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[24]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 28U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 28U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[28]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1911,12 +1747,10 @@ void DMA0_24_28_DriverIRQHandler(void)
 
 void DMA0_25_29_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 25U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 25U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[25]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 29U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 29U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[29]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1928,12 +1762,10 @@ void DMA0_25_29_DriverIRQHandler(void)
 
 void DMA0_26_30_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 26U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 26U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[26]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 30U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 30U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[30]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1945,12 +1777,10 @@ void DMA0_26_30_DriverIRQHandler(void)
 
 void DMA0_27_31_DriverIRQHandler(void)
 {
-    if ((EDMA_GetChannelStatusFlags(DMA0, 27U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 27U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[27]);
     }
-    if ((EDMA_GetChannelStatusFlags(DMA0, 31U) & kEDMA_InterruptFlag) != 0U)
-    {
+    if ((EDMA_GetChannelStatusFlags(DMA0, 31U) & kEDMA_InterruptFlag) != 0U) {
         EDMA_HandleIRQ(s_EDMAHandle[31]);
     }
     /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.h
index 03bc8db16..f2cadc3c3 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_edma.h
@@ -61,10 +61,10 @@
 /*! @brief eDMA transfer configuration */
 typedef enum _edma_transfer_size
 {
-    kEDMA_TransferSize1Bytes = 0x0U,  /*!< Source/Destination data transfer size is 1 byte every time */
-    kEDMA_TransferSize2Bytes = 0x1U,  /*!< Source/Destination data transfer size is 2 bytes every time */
-    kEDMA_TransferSize4Bytes = 0x2U,  /*!< Source/Destination data transfer size is 4 bytes every time */
-    kEDMA_TransferSize8Bytes = 0x3U,  /*!< Source/Destination data transfer size is 8 bytes every time */
+    kEDMA_TransferSize1Bytes  = 0x0U, /*!< Source/Destination data transfer size is 1 byte every time */
+    kEDMA_TransferSize2Bytes  = 0x1U, /*!< Source/Destination data transfer size is 2 bytes every time */
+    kEDMA_TransferSize4Bytes  = 0x2U, /*!< Source/Destination data transfer size is 4 bytes every time */
+    kEDMA_TransferSize8Bytes  = 0x3U, /*!< Source/Destination data transfer size is 8 bytes every time */
     kEDMA_TransferSize16Bytes = 0x4U, /*!< Source/Destination data transfer size is 16 bytes every time */
     kEDMA_TransferSize32Bytes = 0x5U, /*!< Source/Destination data transfer size is 32 bytes every time */
 } edma_transfer_size_t;
@@ -109,7 +109,7 @@ typedef enum _edma_modulo
 /*! @brief Bandwidth control */
 typedef enum _edma_bandwidth
 {
-    kEDMA_BandwidthStallNone = 0x0U,   /*!< No eDMA engine stalls. */
+    kEDMA_BandwidthStallNone   = 0x0U, /*!< No eDMA engine stalls. */
     kEDMA_BandwidthStall4Cycle = 0x2U, /*!< eDMA engine stalls for 4 cycles after each read/write. */
     kEDMA_BandwidthStall8Cycle = 0x3U, /*!< eDMA engine stalls for 8 cycles after each read/write. */
 } edma_bandwidth_t;
@@ -125,25 +125,25 @@ typedef enum _edma_channel_link_type
 /*!@brief eDMA channel status flags. */
 enum _edma_channel_status_flags
 {
-    kEDMA_DoneFlag = 0x1U,      /*!< DONE flag, set while transfer finished, CITER value exhausted*/
-    kEDMA_ErrorFlag = 0x2U,     /*!< eDMA error flag, an error occurred in a transfer */
+    kEDMA_DoneFlag      = 0x1U, /*!< DONE flag, set while transfer finished, CITER value exhausted*/
+    kEDMA_ErrorFlag     = 0x2U, /*!< eDMA error flag, an error occurred in a transfer */
     kEDMA_InterruptFlag = 0x4U, /*!< eDMA interrupt flag, set while an interrupt occurred of this channel */
 };
 
 /*! @brief eDMA channel error status flags. */
 enum _edma_error_status_flags
 {
-    kEDMA_DestinationBusErrorFlag = DMA_ES_DBE_MASK,    /*!< Bus error on destination address */
-    kEDMA_SourceBusErrorFlag = DMA_ES_SBE_MASK,         /*!< Bus error on the source address */
-    kEDMA_ScatterGatherErrorFlag = DMA_ES_SGE_MASK,     /*!< Error on the Scatter/Gather address, not 32byte aligned. */
-    kEDMA_NbytesErrorFlag = DMA_ES_NCE_MASK,            /*!< NBYTES/CITER configuration error */
+    kEDMA_DestinationBusErrorFlag    = DMA_ES_DBE_MASK, /*!< Bus error on destination address */
+    kEDMA_SourceBusErrorFlag         = DMA_ES_SBE_MASK, /*!< Bus error on the source address */
+    kEDMA_ScatterGatherErrorFlag     = DMA_ES_SGE_MASK, /*!< Error on the Scatter/Gather address, not 32byte aligned. */
+    kEDMA_NbytesErrorFlag            = DMA_ES_NCE_MASK, /*!< NBYTES/CITER configuration error */
     kEDMA_DestinationOffsetErrorFlag = DMA_ES_DOE_MASK, /*!< Destination offset not aligned with destination size */
     kEDMA_DestinationAddressErrorFlag = DMA_ES_DAE_MASK, /*!< Destination address not aligned with destination size */
-    kEDMA_SourceOffsetErrorFlag = DMA_ES_SOE_MASK,       /*!< Source offset not aligned with source size */
-    kEDMA_SourceAddressErrorFlag = DMA_ES_SAE_MASK,      /*!< Source address not aligned with source size*/
-    kEDMA_ErrorChannelFlag = DMA_ES_ERRCHN_MASK,         /*!< Error channel number of the cancelled channel number */
-    kEDMA_ChannelPriorityErrorFlag = DMA_ES_CPE_MASK,    /*!< Channel priority is not unique. */
-    kEDMA_TransferCanceledFlag = DMA_ES_ECX_MASK,        /*!< Transfer cancelled */
+    kEDMA_SourceOffsetErrorFlag       = DMA_ES_SOE_MASK, /*!< Source offset not aligned with source size */
+    kEDMA_SourceAddressErrorFlag      = DMA_ES_SAE_MASK, /*!< Source address not aligned with source size*/
+    kEDMA_ErrorChannelFlag            = DMA_ES_ERRCHN_MASK, /*!< Error channel number of the cancelled channel number */
+    kEDMA_ChannelPriorityErrorFlag    = DMA_ES_CPE_MASK,    /*!< Channel priority is not unique. */
+    kEDMA_TransferCanceledFlag        = DMA_ES_ECX_MASK,    /*!< Transfer cancelled */
 #if defined(FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT) && FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT > 1
     kEDMA_GroupPriorityErrorFlag = DMA_ES_GPE_MASK, /*!< Group priority is not unique. */
 #endif
@@ -155,7 +155,7 @@ typedef enum _edma_interrupt_enable
 {
     kEDMA_ErrorInterruptEnable = 0x1U,                  /*!< Enable interrupt while channel error occurs. */
     kEDMA_MajorInterruptEnable = DMA_CSR_INTMAJOR_MASK, /*!< Enable interrupt while major count exhausted. */
-    kEDMA_HalfInterruptEnable = DMA_CSR_INTHALF_MASK,   /*!< Enable interrupt while major count to half value. */
+    kEDMA_HalfInterruptEnable  = DMA_CSR_INTHALF_MASK,  /*!< Enable interrupt while major count to half value. */
 } edma_interrupt_enable_t;
 
 /*! @brief eDMA transfer type */
@@ -170,7 +170,7 @@ typedef enum _edma_transfer_type
 enum _edma_transfer_status
 {
     kStatus_EDMA_QueueFull = MAKE_STATUS(kStatusGroup_EDMA, 0), /*!< TCD queue is full. */
-    kStatus_EDMA_Busy = MAKE_STATUS(kStatusGroup_EDMA, 1),      /*!< Channel is busy and can't handle the
+    kStatus_EDMA_Busy      = MAKE_STATUS(kStatusGroup_EDMA, 1), /*!< Channel is busy and can't handle the
                                                                      transfer request. */
 };
 
@@ -287,666 +287,668 @@ typedef struct _edma_handle
  * APIs
  ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus */
 
-/*!
- * @name eDMA initialization and de-initialization
- * @{
- */
+    /*!
+     * @name eDMA initialization and de-initialization
+     * @{
+     */
 
-/*!
- * @brief Initializes the eDMA peripheral.
- *
- * This function ungates the eDMA clock and configures the eDMA peripheral according
- * to the configuration structure.
- *
- * @param base eDMA peripheral base address.
- * @param config A pointer to the configuration structure, see "edma_config_t".
- * @note This function enables the minor loop map feature.
- */
-void EDMA_Init(DMA_Type *base, const edma_config_t *config);
+    /*!
+     * @brief Initializes the eDMA peripheral.
+     *
+     * This function ungates the eDMA clock and configures the eDMA peripheral according
+     * to the configuration structure.
+     *
+     * @param base eDMA peripheral base address.
+     * @param config A pointer to the configuration structure, see "edma_config_t".
+     * @note This function enables the minor loop map feature.
+     */
+    void EDMA_Init(DMA_Type *base, const edma_config_t *config);
 
-/*!
- * @brief Deinitializes the eDMA peripheral.
- *
- * This function gates the eDMA clock.
- *
- * @param base eDMA peripheral base address.
- */
-void EDMA_Deinit(DMA_Type *base);
+    /*!
+     * @brief Deinitializes the eDMA peripheral.
+     *
+     * This function gates the eDMA clock.
+     *
+     * @param base eDMA peripheral base address.
+     */
+    void EDMA_Deinit(DMA_Type *base);
 
-/*!
- * @brief Push content of TCD structure into hardware TCD register.
- *
- * @param base EDMA peripheral base address.
- * @param channel EDMA channel number.
- * @param tcd Point to TCD structure.
- */
-void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd);
+    /*!
+     * @brief Push content of TCD structure into hardware TCD register.
+     *
+     * @param base EDMA peripheral base address.
+     * @param channel EDMA channel number.
+     * @param tcd Point to TCD structure.
+     */
+    void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd);
 
-/*!
- * @brief Gets the eDMA default configuration structure.
- *
- * This function sets the configuration structure to default values.
- * The default configuration is set to the following values.
- * @code
- *   config.enableContinuousLinkMode = false;
- *   config.enableHaltOnError = true;
- *   config.enableRoundRobinArbitration = false;
- *   config.enableDebugMode = false;
- * @endcode
- *
- * @param config A pointer to the eDMA configuration structure.
- */
-void EDMA_GetDefaultConfig(edma_config_t *config);
+    /*!
+     * @brief Gets the eDMA default configuration structure.
+     *
+     * This function sets the configuration structure to default values.
+     * The default configuration is set to the following values.
+     * @code
+     *   config.enableContinuousLinkMode = false;
+     *   config.enableHaltOnError = true;
+     *   config.enableRoundRobinArbitration = false;
+     *   config.enableDebugMode = false;
+     * @endcode
+     *
+     * @param config A pointer to the eDMA configuration structure.
+     */
+    void EDMA_GetDefaultConfig(edma_config_t *config);
 
-/* @} */
-/*!
- * @name eDMA Channel Operation
- * @{
- */
+    /* @} */
+    /*!
+     * @name eDMA Channel Operation
+     * @{
+     */
 
-/*!
- * @brief Sets all TCD registers to default values.
- *
- * This function sets TCD registers for this channel to default values.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @note This function must not be called while the channel transfer is ongoing
- *       or it causes unpredictable results.
- * @note This function enables the auto stop request feature.
- */
-void EDMA_ResetChannel(DMA_Type *base, uint32_t channel);
+    /*!
+     * @brief Sets all TCD registers to default values.
+     *
+     * This function sets TCD registers for this channel to default values.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @note This function must not be called while the channel transfer is ongoing
+     *       or it causes unpredictable results.
+     * @note This function enables the auto stop request feature.
+     */
+    void EDMA_ResetChannel(DMA_Type *base, uint32_t channel);
 
-/*!
- * @brief Configures the eDMA transfer attribute.
- *
- * This function configures the transfer attribute, including source address, destination address,
- * transfer size, address offset, and so on. It also configures the scatter gather feature if the
- * user supplies the TCD address.
- * Example:
- * @code
- *  edma_transfer_t config;
- *  edma_tcd_t tcd;
- *  config.srcAddr = ..;
- *  config.destAddr = ..;
- *  ...
- *  EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);
- * @endcode
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param config Pointer to eDMA transfer configuration structure.
- * @param nextTcd Point to TCD structure. It can be NULL if users
- *                do not want to enable scatter/gather feature.
- * @note If nextTcd is not NULL, it means scatter gather feature is enabled
- *       and DREQ bit is cleared in the previous transfer configuration, which
- *       is set in the eDMA_ResetChannel.
- */
-void EDMA_SetTransferConfig(DMA_Type *base,
-                            uint32_t channel,
-                            const edma_transfer_config_t *config,
-                            edma_tcd_t *nextTcd);
+    /*!
+     * @brief Configures the eDMA transfer attribute.
+     *
+     * This function configures the transfer attribute, including source address, destination address,
+     * transfer size, address offset, and so on. It also configures the scatter gather feature if the
+     * user supplies the TCD address.
+     * Example:
+     * @code
+     *  edma_transfer_t config;
+     *  edma_tcd_t tcd;
+     *  config.srcAddr = ..;
+     *  config.destAddr = ..;
+     *  ...
+     *  EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);
+     * @endcode
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param config Pointer to eDMA transfer configuration structure.
+     * @param nextTcd Point to TCD structure. It can be NULL if users
+     *                do not want to enable scatter/gather feature.
+     * @note If nextTcd is not NULL, it means scatter gather feature is enabled
+     *       and DREQ bit is cleared in the previous transfer configuration, which
+     *       is set in the eDMA_ResetChannel.
+     */
+    void EDMA_SetTransferConfig(DMA_Type *base,
+                                uint32_t channel,
+                                const edma_transfer_config_t *config,
+                                edma_tcd_t *nextTcd);
 
-/*!
- * @brief Configures the eDMA minor offset feature.
- *
- * The minor offset means that the signed-extended value is added to the source address or destination
- * address after each minor loop.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param config A pointer to the minor offset configuration structure.
- */
-void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config);
+    /*!
+     * @brief Configures the eDMA minor offset feature.
+     *
+     * The minor offset means that the signed-extended value is added to the source address or destination
+     * address after each minor loop.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param config A pointer to the minor offset configuration structure.
+     */
+    void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config);
 
-/*!
- * @brief Configures the eDMA channel preemption feature.
- *
- * This function configures the channel preemption attribute and the priority of the channel.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number
- * @param config A pointer to the channel preemption configuration structure.
- */
-static inline void EDMA_SetChannelPreemptionConfig(DMA_Type *base,
-                                                   uint32_t channel,
-                                                   const edma_channel_Preemption_config_t *config)
-{
-    assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
-    assert(config != NULL);
+    /*!
+     * @brief Configures the eDMA channel preemption feature.
+     *
+     * This function configures the channel preemption attribute and the priority of the channel.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number
+     * @param config A pointer to the channel preemption configuration structure.
+     */
+    static inline void EDMA_SetChannelPreemptionConfig(DMA_Type *base,
+                                                       uint32_t channel,
+                                                       const edma_channel_Preemption_config_t *config)
+    {
+        assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
+        assert(config != NULL);
 
-    DMA_DCHPRIn(base, channel) =
-        (DMA_DCHPRI0_DPA(!config->enablePreemptAbility) | DMA_DCHPRI0_ECP(config->enableChannelPreemption) |
-         DMA_DCHPRI0_CHPRI(config->channelPriority));
-}
+        DMA_DCHPRIn(base, channel) =
+            (DMA_DCHPRI0_DPA(!config->enablePreemptAbility) | DMA_DCHPRI0_ECP(config->enableChannelPreemption) |
+             DMA_DCHPRI0_CHPRI(config->channelPriority));
+    }
 
-/*!
- * @brief Sets the channel link for the eDMA transfer.
- *
- * This function configures either the minor link or the major link mode. The minor link means that the channel link is
- * triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is
- * exhausted.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param type A channel link type, which can be one of the following:
- *   @arg kEDMA_LinkNone
- *   @arg kEDMA_MinorLink
- *   @arg kEDMA_MajorLink
- * @param linkedChannel The linked channel number.
- * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.
- */
-void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel);
+    /*!
+     * @brief Sets the channel link for the eDMA transfer.
+     *
+     * This function configures either the minor link or the major link mode. The minor link means that the channel link
+     * is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the
+     * CITER is exhausted.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param type A channel link type, which can be one of the following:
+     *   @arg kEDMA_LinkNone
+     *   @arg kEDMA_MinorLink
+     *   @arg kEDMA_MajorLink
+     * @param linkedChannel The linked channel number.
+     * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is
+     * invalid.
+     */
+    void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel);
 
-/*!
- * @brief Sets the bandwidth for the eDMA transfer.
- *
- * Because the eDMA processes the minor loop, it continuously generates read/write sequences
- * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
- * each read/write access to control the bus request bandwidth seen by the crossbar switch.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param bandWidth A bandwidth setting, which can be one of the following:
- *     @arg kEDMABandwidthStallNone
- *     @arg kEDMABandwidthStall4Cycle
- *     @arg kEDMABandwidthStall8Cycle
- */
-void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth);
+    /*!
+     * @brief Sets the bandwidth for the eDMA transfer.
+     *
+     * Because the eDMA processes the minor loop, it continuously generates read/write sequences
+     * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
+     * each read/write access to control the bus request bandwidth seen by the crossbar switch.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param bandWidth A bandwidth setting, which can be one of the following:
+     *     @arg kEDMABandwidthStallNone
+     *     @arg kEDMABandwidthStall4Cycle
+     *     @arg kEDMABandwidthStall8Cycle
+     */
+    void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth);
 
-/*!
- * @brief Sets the source modulo and the destination modulo for the eDMA transfer.
- *
- * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
- * calculation is performed or the original register value. It provides the ability to implement a circular data
- * queue easily.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param srcModulo A source modulo value.
- * @param destModulo A destination modulo value.
- */
-void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo);
+    /*!
+     * @brief Sets the source modulo and the destination modulo for the eDMA transfer.
+     *
+     * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
+     * calculation is performed or the original register value. It provides the ability to implement a circular data
+     * queue easily.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param srcModulo A source modulo value.
+     * @param destModulo A destination modulo value.
+     */
+    void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo);
 
 #if defined(FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT) && FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT
-/*!
- * @brief Enables an async request for the eDMA transfer.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param enable The command to enable (true) or disable (false).
- */
-static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables an async request for the eDMA transfer.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param enable The command to enable (true) or disable (false).
+     */
+    static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->EARS = (base->EARS & (~(1U << channel))) | ((uint32_t)enable << channel);
-}
+        base->EARS = (base->EARS & (~(1U << channel))) | ((uint32_t)enable << channel);
+    }
 #endif /* FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT */
 
-/*!
- * @brief Enables an auto stop request for the eDMA transfer.
- *
- * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param enable The command to enable (true) or disable (false).
- */
-static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables an auto stop request for the eDMA transfer.
+     *
+     * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param enable The command to enable (true) or disable (false).
+     */
+    static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->TCD[channel].CSR = (base->TCD[channel].CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
-}
+        base->TCD[channel].CSR = (base->TCD[channel].CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
+    }
 
-/*!
- * @brief Enables the interrupt source for the eDMA transfer.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param mask The mask of interrupt source to be set. Users need to use
- *             the defined edma_interrupt_enable_t type.
- */
-void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
+    /*!
+     * @brief Enables the interrupt source for the eDMA transfer.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param mask The mask of interrupt source to be set. Users need to use
+     *             the defined edma_interrupt_enable_t type.
+     */
+    void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
 
-/*!
- * @brief Disables the interrupt source for the eDMA transfer.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param mask The mask of the interrupt source to be set. Use
- *             the defined edma_interrupt_enable_t type.
- */
-void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
+    /*!
+     * @brief Disables the interrupt source for the eDMA transfer.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param mask The mask of the interrupt source to be set. Use
+     *             the defined edma_interrupt_enable_t type.
+     */
+    void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
 
-/* @} */
-/*!
- * @name eDMA TCD Operation
- * @{
- */
+    /* @} */
+    /*!
+     * @name eDMA TCD Operation
+     * @{
+     */
 
-/*!
- * @brief Sets all fields to default values for the TCD structure.
- *
- * This function sets all fields for this TCD structure to default value.
- *
- * @param tcd Pointer to the TCD structure.
- * @note This function enables the auto stop request feature.
- */
-void EDMA_TcdReset(edma_tcd_t *tcd);
+    /*!
+     * @brief Sets all fields to default values for the TCD structure.
+     *
+     * This function sets all fields for this TCD structure to default value.
+     *
+     * @param tcd Pointer to the TCD structure.
+     * @note This function enables the auto stop request feature.
+     */
+    void EDMA_TcdReset(edma_tcd_t *tcd);
 
-/*!
- * @brief Configures the eDMA TCD transfer attribute.
- *
- * The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers.
- * The STCD is used in the scatter-gather mode.
- * This function configures the TCD transfer attribute, including source address, destination address,
- * transfer size, address offset, and so on. It also configures the scatter gather feature if the
- * user supplies the next TCD address.
- * Example:
- * @code
- *   edma_transfer_t config = {
- *   ...
- *   }
- *   edma_tcd_t tcd __aligned(32);
- *   edma_tcd_t nextTcd __aligned(32);
- *   EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);
- * @endcode
- *
- * @param tcd Pointer to the TCD structure.
- * @param config Pointer to eDMA transfer configuration structure.
- * @param nextTcd Pointer to the next TCD structure. It can be NULL if users
- *                do not want to enable scatter/gather feature.
- * @note TCD address should be 32 bytes aligned or it causes an eDMA error.
- * @note If the nextTcd is not NULL, the scatter gather feature is enabled
- *       and DREQ bit is cleared in the previous transfer configuration, which
- *       is set in the EDMA_TcdReset.
- */
-void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd);
+    /*!
+     * @brief Configures the eDMA TCD transfer attribute.
+     *
+     * The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers.
+     * The STCD is used in the scatter-gather mode.
+     * This function configures the TCD transfer attribute, including source address, destination address,
+     * transfer size, address offset, and so on. It also configures the scatter gather feature if the
+     * user supplies the next TCD address.
+     * Example:
+     * @code
+     *   edma_transfer_t config = {
+     *   ...
+     *   }
+     *   edma_tcd_t tcd __aligned(32);
+     *   edma_tcd_t nextTcd __aligned(32);
+     *   EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);
+     * @endcode
+     *
+     * @param tcd Pointer to the TCD structure.
+     * @param config Pointer to eDMA transfer configuration structure.
+     * @param nextTcd Pointer to the next TCD structure. It can be NULL if users
+     *                do not want to enable scatter/gather feature.
+     * @note TCD address should be 32 bytes aligned or it causes an eDMA error.
+     * @note If the nextTcd is not NULL, the scatter gather feature is enabled
+     *       and DREQ bit is cleared in the previous transfer configuration, which
+     *       is set in the EDMA_TcdReset.
+     */
+    void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd);
 
-/*!
- * @brief Configures the eDMA TCD minor offset feature.
- *
- * A minor offset is a signed-extended value added to the source address or a destination
- * address after each minor loop.
- *
- * @param tcd A point to the TCD structure.
- * @param config A pointer to the minor offset configuration structure.
- */
-void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config);
+    /*!
+     * @brief Configures the eDMA TCD minor offset feature.
+     *
+     * A minor offset is a signed-extended value added to the source address or a destination
+     * address after each minor loop.
+     *
+     * @param tcd A point to the TCD structure.
+     * @param config A pointer to the minor offset configuration structure.
+     */
+    void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config);
 
-/*!
- * @brief Sets the channel link for the eDMA TCD.
- *
- * This function configures either a minor link or a major link. The minor link means the channel link is
- * triggered every time CITER decreases by 1. The major link means that the channel link  is triggered when the CITER is
- * exhausted.
- *
- * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.
- * @param tcd Point to the TCD structure.
- * @param type Channel link type, it can be one of:
- *   @arg kEDMA_LinkNone
- *   @arg kEDMA_MinorLink
- *   @arg kEDMA_MajorLink
- * @param linkedChannel The linked channel number.
- */
-void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel);
+    /*!
+     * @brief Sets the channel link for the eDMA TCD.
+     *
+     * This function configures either a minor link or a major link. The minor link means the channel link is
+     * triggered every time CITER decreases by 1. The major link means that the channel link  is triggered when the
+     * CITER is exhausted.
+     *
+     * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is
+     * invalid.
+     * @param tcd Point to the TCD structure.
+     * @param type Channel link type, it can be one of:
+     *   @arg kEDMA_LinkNone
+     *   @arg kEDMA_MinorLink
+     *   @arg kEDMA_MajorLink
+     * @param linkedChannel The linked channel number.
+     */
+    void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel);
 
-/*!
- * @brief Sets the bandwidth for the eDMA TCD.
- *
- * Because the eDMA processes the minor loop, it continuously generates read/write sequences
- * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
- * each read/write access to control the bus request bandwidth seen by the crossbar switch.
- * @param tcd A pointer to the TCD structure.
- * @param bandWidth A bandwidth setting, which can be one of the following:
- *     @arg kEDMABandwidthStallNone
- *     @arg kEDMABandwidthStall4Cycle
- *     @arg kEDMABandwidthStall8Cycle
- */
-static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)
-{
-    assert(tcd != NULL);
-    assert(((uint32_t)tcd & 0x1FU) == 0);
+    /*!
+     * @brief Sets the bandwidth for the eDMA TCD.
+     *
+     * Because the eDMA processes the minor loop, it continuously generates read/write sequences
+     * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
+     * each read/write access to control the bus request bandwidth seen by the crossbar switch.
+     * @param tcd A pointer to the TCD structure.
+     * @param bandWidth A bandwidth setting, which can be one of the following:
+     *     @arg kEDMABandwidthStallNone
+     *     @arg kEDMABandwidthStall4Cycle
+     *     @arg kEDMABandwidthStall8Cycle
+     */
+    static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)
+    {
+        assert(tcd != NULL);
+        assert(((uint32_t)tcd & 0x1FU) == 0);
 
-    tcd->CSR = (tcd->CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(bandWidth);
-}
+        tcd->CSR = (tcd->CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(bandWidth);
+    }
 
-/*!
- * @brief Sets the source modulo and the destination modulo for the eDMA TCD.
- *
- * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
- * calculation is performed or the original register value. It provides the ability to implement a circular data
- * queue easily.
- *
- * @param tcd A pointer to the TCD structure.
- * @param srcModulo A source modulo value.
- * @param destModulo A destination modulo value.
- */
-void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo);
+    /*!
+     * @brief Sets the source modulo and the destination modulo for the eDMA TCD.
+     *
+     * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
+     * calculation is performed or the original register value. It provides the ability to implement a circular data
+     * queue easily.
+     *
+     * @param tcd A pointer to the TCD structure.
+     * @param srcModulo A source modulo value.
+     * @param destModulo A destination modulo value.
+     */
+    void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo);
 
-/*!
- * @brief Sets the auto stop request for the eDMA TCD.
- *
- * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
- *
- * @param tcd A pointer to the TCD structure.
- * @param enable The command to enable (true) or disable (false).
- */
-static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)
-{
-    assert(tcd != NULL);
-    assert(((uint32_t)tcd & 0x1FU) == 0);
+    /*!
+     * @brief Sets the auto stop request for the eDMA TCD.
+     *
+     * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
+     *
+     * @param tcd A pointer to the TCD structure.
+     * @param enable The command to enable (true) or disable (false).
+     */
+    static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)
+    {
+        assert(tcd != NULL);
+        assert(((uint32_t)tcd & 0x1FU) == 0);
 
-    tcd->CSR = (tcd->CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
-}
+        tcd->CSR = (tcd->CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
+    }
 
-/*!
- * @brief Enables the interrupt source for the eDMA TCD.
- *
- * @param tcd Point to the TCD structure.
- * @param mask The mask of interrupt source to be set. Users need to use
- *             the defined edma_interrupt_enable_t type.
- */
-void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask);
+    /*!
+     * @brief Enables the interrupt source for the eDMA TCD.
+     *
+     * @param tcd Point to the TCD structure.
+     * @param mask The mask of interrupt source to be set. Users need to use
+     *             the defined edma_interrupt_enable_t type.
+     */
+    void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask);
 
-/*!
- * @brief Disables the interrupt source for the eDMA TCD.
- *
- * @param tcd Point to the TCD structure.
- * @param mask The mask of interrupt source to be set. Users need to use
- *             the defined edma_interrupt_enable_t type.
- */
-void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask);
+    /*!
+     * @brief Disables the interrupt source for the eDMA TCD.
+     *
+     * @param tcd Point to the TCD structure.
+     * @param mask The mask of interrupt source to be set. Users need to use
+     *             the defined edma_interrupt_enable_t type.
+     */
+    void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask);
 
-/*! @} */
-/*!
- * @name eDMA Channel Transfer Operation
- * @{
- */
+    /*! @} */
+    /*!
+     * @name eDMA Channel Transfer Operation
+     * @{
+     */
 
-/*!
- * @brief Enables the eDMA hardware channel request.
- *
- * This function enables the hardware channel request.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- */
-static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Enables the eDMA hardware channel request.
+     *
+     * This function enables the hardware channel request.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     */
+    static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->SERQ = DMA_SERQ_SERQ(channel);
-}
+        base->SERQ = DMA_SERQ_SERQ(channel);
+    }
 
-/*!
- * @brief Disables the eDMA hardware channel request.
- *
- * This function disables the hardware channel request.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- */
-static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Disables the eDMA hardware channel request.
+     *
+     * This function disables the hardware channel request.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     */
+    static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->CERQ = DMA_CERQ_CERQ(channel);
-}
+        base->CERQ = DMA_CERQ_CERQ(channel);
+    }
 
-/*!
- * @brief Starts the eDMA transfer by using the software trigger.
- *
- * This function starts a minor loop transfer.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- */
-static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
-{
-    assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
+    /*!
+     * @brief Starts the eDMA transfer by using the software trigger.
+     *
+     * This function starts a minor loop transfer.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     */
+    static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
+    {
+        assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
-    base->SSRT = DMA_SSRT_SSRT(channel);
-}
+        base->SSRT = DMA_SSRT_SSRT(channel);
+    }
 
-/*! @} */
-/*!
- * @name eDMA Channel Status Operation
- * @{
- */
+    /*! @} */
+    /*!
+     * @name eDMA Channel Status Operation
+     * @{
+     */
 
-/*!
- * @brief Gets the remaining major loop count from the eDMA current channel TCD.
- *
- * This function checks the TCD (Task Control Descriptor) status for a specified
- * eDMA channel and returns the number of major loop count that has not finished.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @return Major loop count which has not been transferred yet for the current TCD.
- * @note 1. This function can only be used to get unfinished major loop count of transfer without
- *          the next TCD, or it might be inaccuracy.
- *       2. The unfinished/remaining transfer bytes cannot be obtained directly from registers while
- *          the channel is running.
- *          Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO
- *          register is needed while the eDMA IP does not support getting it while a channel is active.
- *          In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine
- *          is working with while a channel is running.
- *          Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example
- *          copied before enabling the channel) is needed. The formula to calculate it is shown below:
- *          RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)
- */
-uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel);
+    /*!
+     * @brief Gets the remaining major loop count from the eDMA current channel TCD.
+     *
+     * This function checks the TCD (Task Control Descriptor) status for a specified
+     * eDMA channel and returns the number of major loop count that has not finished.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @return Major loop count which has not been transferred yet for the current TCD.
+     * @note 1. This function can only be used to get unfinished major loop count of transfer without
+     *          the next TCD, or it might be inaccuracy.
+     *       2. The unfinished/remaining transfer bytes cannot be obtained directly from registers while
+     *          the channel is running.
+     *          Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO
+     *          register is needed while the eDMA IP does not support getting it while a channel is active.
+     *          In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the
+     * dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a
+     * software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to
+     * calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)
+     */
+    uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel);
 
-/*!
- * @brief Gets the eDMA channel error status flags.
- *
- * @param base eDMA peripheral base address.
- * @return The mask of error status flags. Users need to use the
-*         _edma_error_status_flags type to decode the return variables.
- */
-static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)
-{
-    return base->ES;
-}
+    /*!
+     * @brief Gets the eDMA channel error status flags.
+     *
+     * @param base eDMA peripheral base address.
+     * @return The mask of error status flags. Users need to use the
+     *         _edma_error_status_flags type to decode the return variables.
+     */
+    static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)
+    {
+        return base->ES;
+    }
 
-/*!
- * @brief Gets the eDMA channel status flags.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @return The mask of channel status flags. Users need to use the
- *         _edma_channel_status_flags type to decode the return variables.
- */
-uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel);
+    /*!
+     * @brief Gets the eDMA channel status flags.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @return The mask of channel status flags. Users need to use the
+     *         _edma_channel_status_flags type to decode the return variables.
+     */
+    uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel);
 
-/*!
- * @brief Clears the eDMA channel status flags.
- *
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- * @param mask The mask of channel status to be cleared. Users need to use
- *             the defined _edma_channel_status_flags type.
- */
-void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask);
+    /*!
+     * @brief Clears the eDMA channel status flags.
+     *
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     * @param mask The mask of channel status to be cleared. Users need to use
+     *             the defined _edma_channel_status_flags type.
+     */
+    void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask);
 
-/*! @} */
-/*!
- * @name eDMA Transactional Operation
- */
+    /*! @} */
+    /*!
+     * @name eDMA Transactional Operation
+     */
 
-/*!
- * @brief Creates the eDMA handle.
- *
- * This function is called if using the transactional API for eDMA. This function
- * initializes the internal state of the eDMA handle.
- *
- * @param handle eDMA handle pointer. The eDMA handle stores callback function and
- *               parameters.
- * @param base eDMA peripheral base address.
- * @param channel eDMA channel number.
- */
-void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel);
+    /*!
+     * @brief Creates the eDMA handle.
+     *
+     * This function is called if using the transactional API for eDMA. This function
+     * initializes the internal state of the eDMA handle.
+     *
+     * @param handle eDMA handle pointer. The eDMA handle stores callback function and
+     *               parameters.
+     * @param base eDMA peripheral base address.
+     * @param channel eDMA channel number.
+     */
+    void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel);
 
-/*!
- * @brief Installs the TCDs memory pool into the eDMA handle.
- *
- * This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be used
- * while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control block
- * (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer.
- * Users need to preapre tcd memory and also configure tcds using interface EDMA_SubmitTransfer.
- *
- * @param handle eDMA handle pointer.
- * @param tcdPool A memory pool to store TCDs. It must be 32 bytes aligned.
- * @param tcdSize The number of TCD slots.
- */
-void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize);
+    /*!
+     * @brief Installs the TCDs memory pool into the eDMA handle.
+     *
+     * This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be
+     * used while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control
+     * block (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer. Users need to preapre
+     * tcd memory and also configure tcds using interface EDMA_SubmitTransfer.
+     *
+     * @param handle eDMA handle pointer.
+     * @param tcdPool A memory pool to store TCDs. It must be 32 bytes aligned.
+     * @param tcdSize The number of TCD slots.
+     */
+    void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize);
 
-/*!
- * @brief Installs a callback function for the eDMA transfer.
- *
- * This callback is called in the eDMA IRQ handler. Use the callback to do something after
- * the current major loop transfer completes. This function will be called every time one tcd finished transfer.
- *
- * @param handle eDMA handle pointer.
- * @param callback eDMA callback function pointer.
- * @param userData A parameter for the callback function.
- */
-void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData);
+    /*!
+     * @brief Installs a callback function for the eDMA transfer.
+     *
+     * This callback is called in the eDMA IRQ handler. Use the callback to do something after
+     * the current major loop transfer completes. This function will be called every time one tcd finished transfer.
+     *
+     * @param handle eDMA handle pointer.
+     * @param callback eDMA callback function pointer.
+     * @param userData A parameter for the callback function.
+     */
+    void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData);
 
-/*!
- * @brief Prepares the eDMA transfer structure.
- *
- * This function prepares the transfer configuration structure according to the user input.
- *
- * @param config The user configuration structure of type edma_transfer_t.
- * @param srcAddr eDMA transfer source address.
- * @param srcWidth eDMA transfer source address width(bytes).
- * @param destAddr eDMA transfer destination address.
- * @param destWidth eDMA transfer destination address width(bytes).
- * @param bytesEachRequest eDMA transfer bytes per channel request.
- * @param transferBytes eDMA transfer bytes to be transferred.
- * @param type eDMA transfer type.
- * @note The data address and the data width must be consistent. For example, if the SRC
- *       is 4 bytes, the source address must be 4 bytes aligned, or it results in
- *       source address error (SAE).
- */
-void EDMA_PrepareTransfer(edma_transfer_config_t *config,
-                          void *srcAddr,
-                          uint32_t srcWidth,
-                          void *destAddr,
-                          uint32_t destWidth,
-                          uint32_t bytesEachRequest,
-                          uint32_t transferBytes,
-                          edma_transfer_type_t type);
+    /*!
+     * @brief Prepares the eDMA transfer structure.
+     *
+     * This function prepares the transfer configuration structure according to the user input.
+     *
+     * @param config The user configuration structure of type edma_transfer_t.
+     * @param srcAddr eDMA transfer source address.
+     * @param srcWidth eDMA transfer source address width(bytes).
+     * @param destAddr eDMA transfer destination address.
+     * @param destWidth eDMA transfer destination address width(bytes).
+     * @param bytesEachRequest eDMA transfer bytes per channel request.
+     * @param transferBytes eDMA transfer bytes to be transferred.
+     * @param type eDMA transfer type.
+     * @note The data address and the data width must be consistent. For example, if the SRC
+     *       is 4 bytes, the source address must be 4 bytes aligned, or it results in
+     *       source address error (SAE).
+     */
+    void EDMA_PrepareTransfer(edma_transfer_config_t *config,
+                              void *srcAddr,
+                              uint32_t srcWidth,
+                              void *destAddr,
+                              uint32_t destWidth,
+                              uint32_t bytesEachRequest,
+                              uint32_t transferBytes,
+                              edma_transfer_type_t type);
 
-/*!
- * @brief Submits the eDMA transfer request.
- *
- * This function submits the eDMA transfer request according to the transfer configuration structure.
- * In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool.
- * The tcd pools is setup by call function EDMA_InstallTCDMemory before.
- *
- * @param handle eDMA handle pointer.
- * @param config Pointer to eDMA transfer configuration structure.
- * @retval kStatus_EDMA_Success It means submit transfer request succeed.
- * @retval kStatus_EDMA_QueueFull It means TCD queue is full. Submit transfer request is not allowed.
- * @retval kStatus_EDMA_Busy It means the given channel is busy, need to submit request later.
- */
-status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config);
+    /*!
+     * @brief Submits the eDMA transfer request.
+     *
+     * This function submits the eDMA transfer request according to the transfer configuration structure.
+     * In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool.
+     * The tcd pools is setup by call function EDMA_InstallTCDMemory before.
+     *
+     * @param handle eDMA handle pointer.
+     * @param config Pointer to eDMA transfer configuration structure.
+     * @retval kStatus_EDMA_Success It means submit transfer request succeed.
+     * @retval kStatus_EDMA_QueueFull It means TCD queue is full. Submit transfer request is not allowed.
+     * @retval kStatus_EDMA_Busy It means the given channel is busy, need to submit request later.
+     */
+    status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config);
 
-/*!
- * @brief eDMA starts transfer.
- *
- * This function enables the channel request. Users can call this function after submitting the transfer request
- * or before submitting the transfer request.
- *
- * @param handle eDMA handle pointer.
- */
-void EDMA_StartTransfer(edma_handle_t *handle);
+    /*!
+     * @brief eDMA starts transfer.
+     *
+     * This function enables the channel request. Users can call this function after submitting the transfer request
+     * or before submitting the transfer request.
+     *
+     * @param handle eDMA handle pointer.
+     */
+    void EDMA_StartTransfer(edma_handle_t *handle);
 
-/*!
- * @brief eDMA stops transfer.
- *
- * This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer()
- * again to resume the transfer.
- *
- * @param handle eDMA handle pointer.
- */
-void EDMA_StopTransfer(edma_handle_t *handle);
+    /*!
+     * @brief eDMA stops transfer.
+     *
+     * This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer()
+     * again to resume the transfer.
+     *
+     * @param handle eDMA handle pointer.
+     */
+    void EDMA_StopTransfer(edma_handle_t *handle);
 
-/*!
- * @brief eDMA aborts transfer.
- *
- * This function disables the channel request and clear transfer status bits.
- * Users can submit another transfer after calling this API.
- *
- * @param handle DMA handle pointer.
- */
-void EDMA_AbortTransfer(edma_handle_t *handle);
+    /*!
+     * @brief eDMA aborts transfer.
+     *
+     * This function disables the channel request and clear transfer status bits.
+     * Users can submit another transfer after calling this API.
+     *
+     * @param handle DMA handle pointer.
+     */
+    void EDMA_AbortTransfer(edma_handle_t *handle);
 
-/*!
- * @brief Get unused TCD slot number.
- *
- * This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.
- *
- * @param handle DMA handle pointer.
- * @return The unused tcd slot number.
- */
-static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)
-{
-    return (handle->tcdSize - handle->tcdUsed);
-}
+    /*!
+     * @brief Get unused TCD slot number.
+     *
+     * This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.
+     *
+     * @param handle DMA handle pointer.
+     * @return The unused tcd slot number.
+     */
+    static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)
+    {
+        return (handle->tcdSize - handle->tcdUsed);
+    }
 
-/*!
- * @brief Get the next tcd address.
- *
- * This function gets the next tcd address. If this is last TCD, return 0.
- *
- * @param handle DMA handle pointer.
- * @return The next TCD address.
- */
-static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)
-{
-    return (handle->base->TCD[handle->channel].DLAST_SGA);
-}
+    /*!
+     * @brief Get the next tcd address.
+     *
+     * This function gets the next tcd address. If this is last TCD, return 0.
+     *
+     * @param handle DMA handle pointer.
+     * @return The next TCD address.
+     */
+    static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)
+    {
+        return (handle->base->TCD[handle->channel].DLAST_SGA);
+    }
 
-/*!
- * @brief eDMA IRQ handler for the current major loop transfer completion.
- *
- * This function clears the channel major interrupt flag and calls
- * the callback function if it is not NULL.
- *
- * Note:
- * For the case using TCD queue, when the major iteration count is exhausted, additional operations are performed.
- * These include the final address adjustments and reloading of the BITER field into the CITER.
- * Assertion of an optional interrupt request also occurs at this time, as does a possible fetch of a new TCD from
- * memory using the scatter/gather address pointer included in the descriptor (if scatter/gather is enabled).
- *
- * For instance, when the time interrupt of TCD[0] happens, the TCD[1] has already been loaded into the eDMA engine.
- * As sga and sga_index are calculated based on the DLAST_SGA bitfield lies in the TCD_CSR register, the sga_index
- * in this case should be 2 (DLAST_SGA of TCD[1] stores the address of TCD[2]). Thus, the "tcdUsed" updated should be
- * (tcdUsed - 2U) which indicates the number of TCDs can be loaded in the memory pool (because TCD[0] and TCD[1] have
- * been loaded into the eDMA engine at this point already.).
- *
- * For the last two continuous ISRs in a scatter/gather process, they  both load the last TCD (The last ISR does not
- * load a new TCD) from the memory pool to the eDMA engine when major loop completes.
- * Therefore, ensure that the header and tcdUsed updated are identical for them.
- * tcdUsed are both 0 in this case as no TCD to be loaded.
- *
- * See the "eDMA basic data flow" in the eDMA Functional description section of the Reference Manual for
- * further details.
- *
- * @param handle eDMA handle pointer.
- */
-void EDMA_HandleIRQ(edma_handle_t *handle);
+    /*!
+     * @brief eDMA IRQ handler for the current major loop transfer completion.
+     *
+     * This function clears the channel major interrupt flag and calls
+     * the callback function if it is not NULL.
+     *
+     * Note:
+     * For the case using TCD queue, when the major iteration count is exhausted, additional operations are performed.
+     * These include the final address adjustments and reloading of the BITER field into the CITER.
+     * Assertion of an optional interrupt request also occurs at this time, as does a possible fetch of a new TCD from
+     * memory using the scatter/gather address pointer included in the descriptor (if scatter/gather is enabled).
+     *
+     * For instance, when the time interrupt of TCD[0] happens, the TCD[1] has already been loaded into the eDMA engine.
+     * As sga and sga_index are calculated based on the DLAST_SGA bitfield lies in the TCD_CSR register, the sga_index
+     * in this case should be 2 (DLAST_SGA of TCD[1] stores the address of TCD[2]). Thus, the "tcdUsed" updated should
+     * be (tcdUsed - 2U) which indicates the number of TCDs can be loaded in the memory pool (because TCD[0] and TCD[1]
+     * have been loaded into the eDMA engine at this point already.).
+     *
+     * For the last two continuous ISRs in a scatter/gather process, they  both load the last TCD (The last ISR does not
+     * load a new TCD) from the memory pool to the eDMA engine when major loop completes.
+     * Therefore, ensure that the header and tcdUsed updated are identical for them.
+     * tcdUsed are both 0 in this case as no TCD to be loaded.
+     *
+     * See the "eDMA basic data flow" in the eDMA Functional description section of the Reference Manual for
+     * further details.
+     *
+     * @param handle eDMA handle pointer.
+     */
+    void EDMA_HandleIRQ(edma_handle_t *handle);
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.c
index 45e3f62be..b6727f9f8 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.c
@@ -3,7 +3,7 @@
  * Copyright 2017 NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -60,7 +60,7 @@ static uint32_t FLEXRAM_GetInstance(FLEXRAM_Type *base);
  *
  * @param tcmBankNum tcm banknumber
  * @retval register value correspond to the tcm size
-  */
+ */
 static uint8_t FLEXRAM_MapTcmSizeToRegister(uint8_t tcmBankNum);
 
 /*!
@@ -69,7 +69,7 @@ static uint8_t FLEXRAM_MapTcmSizeToRegister(uint8_t tcmBankNum);
  * raised by core.
  * @param itcmBankNum itcm bank number to allocate
  * @param dtcmBankNum dtcm bank number to allocate
-  */
+ */
 static status_t FLEXRAM_SetTCMSize(uint8_t itcmBankNum, uint8_t dtcmBankNum);
 
 /*******************************************************************************
@@ -91,10 +91,8 @@ static uint32_t FLEXRAM_GetInstance(FLEXRAM_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_flexramBases); instance++)
-    {
-        if (s_flexramBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_flexramBases); instance++) {
+        if (s_flexramBases[instance] == base) {
             break;
         }
     }
@@ -131,30 +129,29 @@ static uint8_t FLEXRAM_MapTcmSizeToRegister(uint8_t tcmBankNum)
 {
     uint8_t tcmSizeConfig = 0U;
 
-    switch (tcmBankNum * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_BANK_SIZE)
-    {
-        case kFLEXRAM_TCMSize32KB:
-            tcmSizeConfig = 6U;
-            break;
+    switch (tcmBankNum * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_BANK_SIZE) {
+    case kFLEXRAM_TCMSize32KB:
+        tcmSizeConfig = 6U;
+        break;
 
-        case kFLEXRAM_TCMSize64KB:
-            tcmSizeConfig = 7U;
-            break;
+    case kFLEXRAM_TCMSize64KB:
+        tcmSizeConfig = 7U;
+        break;
 
-        case kFLEXRAM_TCMSize128KB:
-            tcmSizeConfig = 8U;
-            break;
+    case kFLEXRAM_TCMSize128KB:
+        tcmSizeConfig = 8U;
+        break;
 
-        case kFLEXRAM_TCMSize256KB:
-            tcmSizeConfig = 9U;
-            break;
+    case kFLEXRAM_TCMSize256KB:
+        tcmSizeConfig = 9U;
+        break;
 
-        case kFLEXRAM_TCMSize512KB:
-            tcmSizeConfig = 10U;
-            break;
+    case kFLEXRAM_TCMSize512KB:
+        tcmSizeConfig = 10U;
+        break;
 
-        default:
-            break;
+    default:
+        break;
     }
 
     return tcmSizeConfig;
@@ -163,25 +160,21 @@ static uint8_t FLEXRAM_MapTcmSizeToRegister(uint8_t tcmBankNum)
 static status_t FLEXRAM_SetTCMSize(uint8_t itcmBankNum, uint8_t dtcmBankNum)
 {
     /* dtcm configuration */
-    if (dtcmBankNum != 0U)
-    {
+    if (dtcmBankNum != 0U) {
         IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK;
         IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(FLEXRAM_MapTcmSizeToRegister(dtcmBankNum));
         IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK;
     }
-    else
-    {
+    else {
         IOMUXC_GPR->GPR16 &= ~IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK;
     }
     /* itcm configuration */
-    if (itcmBankNum != 0U)
-    {
+    if (itcmBankNum != 0U) {
         IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK;
         IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(FLEXRAM_MapTcmSizeToRegister(itcmBankNum));
         IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK;
     }
-    else
-    {
+    else {
         IOMUXC_GPR->GPR16 &= ~IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK;
     }
 
@@ -190,35 +183,30 @@ static status_t FLEXRAM_SetTCMSize(uint8_t itcmBankNum, uint8_t dtcmBankNum)
 
 status_t FLEXRAM_AllocateRam(flexram_allocate_ram_t *config)
 {
-    uint8_t dtcmBankNum = config->dtcmBankNum;
-    uint8_t itcmBankNum = config->itcmBankNum;
+    uint8_t dtcmBankNum  = config->dtcmBankNum;
+    uint8_t itcmBankNum  = config->itcmBankNum;
     uint8_t ocramBankNum = config->ocramBankNum;
     uint32_t bankCfg = 0U, i = 0U;
 
     /* check the arguments */
     if ((FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS < (dtcmBankNum + itcmBankNum + ocramBankNum)) ||
         ((dtcmBankNum != 0U) && ((dtcmBankNum & (dtcmBankNum - 1u)) != 0U)) ||
-        ((itcmBankNum != 0U) && ((itcmBankNum & (itcmBankNum - 1u)) != 0U)))
-    {
+        ((itcmBankNum != 0U) && ((itcmBankNum & (itcmBankNum - 1u)) != 0U))) {
         return kStatus_InvalidArgument;
     }
     /* flexram bank config value */
-    for (i = 0U; i < FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS; i++)
-    {
-        if (i < ocramBankNum)
-        {
+    for (i = 0U; i < FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS; i++) {
+        if (i < ocramBankNum) {
             bankCfg |= ((uint32_t)kFLEXRAM_BankOCRAM) << (i * 2);
             continue;
         }
 
-        if (i < (dtcmBankNum + ocramBankNum))
-        {
+        if (i < (dtcmBankNum + ocramBankNum)) {
             bankCfg |= ((uint32_t)kFLEXRAM_BankDTCM) << (i * 2);
             continue;
         }
 
-        if (i < (dtcmBankNum + ocramBankNum + itcmBankNum))
-        {
+        if (i < (dtcmBankNum + ocramBankNum + itcmBankNum)) {
             bankCfg |= ((uint32_t)kFLEXRAM_BankITCM) << (i * 2);
             continue;
         }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.h
index b84e8daec..8ed32f63b 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_flexram.h
@@ -3,7 +3,7 @@
  * Copyright 2017 NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -55,30 +55,30 @@
 /*! @brief flexram write read sel */
 enum _flexram_wr_rd_sel
 {
-    kFLEXRAM_Read = 0U,  /*!< read */
+    kFLEXRAM_Read  = 0U, /*!< read */
     kFLEXRAM_Write = 1U, /*!< write */
 };
 
 /*! @brief Interrupt status flag mask */
 enum _flexram_interrupt_status
 {
-    kFLEXRAM_OCRAMAccessError = FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK,    /*!< ocram access unallocated address */
-    kFLEXRAM_DTCMAccessError = FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK,      /*!< dtcm access unallocated address */
-    kFLEXRAM_ITCMAccessError = FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK,      /*!< itcm access unallocated address */
+    kFLEXRAM_OCRAMAccessError    = FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK, /*!< ocram access unallocated address */
+    kFLEXRAM_DTCMAccessError     = FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK,  /*!< dtcm access unallocated address */
+    kFLEXRAM_ITCMAccessError     = FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK,  /*!< itcm access unallocated address */
     kFLEXRAM_OCRAMMagicAddrMatch = FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK, /*!< ocram maigc address match */
-    kFLEXRAM_DTCMMagicAddrMatch = FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK,   /*!< dtcm maigc address match */
-    kFLEXRAM_ITCMMagicAddrMatch = FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK,   /*!< itcm maigc address match */
+    kFLEXRAM_DTCMMagicAddrMatch  = FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK,  /*!< dtcm maigc address match */
+    kFLEXRAM_ITCMMagicAddrMatch  = FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK,  /*!< itcm maigc address match */
 
     kFLEXRAM_InterruptStatusAll = 0x3FU, /*!< all the interrupt status mask */
 };
 
 /*! @brief FLEXRAM TCM access mode
-* Fast access mode expected to be finished in 1-cycle
-* Wait access mode expected to be finished in 2-cycle
-* Wait access mode is a feature of the flexram and it should be used when
-* the cpu clock too fast to finish tcm access in 1-cycle.
-* Normally, fast mode is the default mode, the efficiency of the tcm access will better.
-*/
+ * Fast access mode expected to be finished in 1-cycle
+ * Wait access mode expected to be finished in 2-cycle
+ * Wait access mode is a feature of the flexram and it should be used when
+ * the cpu clock too fast to finish tcm access in 1-cycle.
+ * Normally, fast mode is the default mode, the efficiency of the tcm access will better.
+ */
 typedef enum _flexram_tcm_access_mode
 {
     kFLEXRAM_TCMAccessFastMode = 0U, /*!< fast access mode */
@@ -89,16 +89,16 @@ typedef enum _flexram_tcm_access_mode
 enum _flexram_bank_type
 {
     kFLEXRAM_BankNotUsed = 0U, /*!< bank is not used */
-    kFLEXRAM_BankOCRAM = 1U,   /*!< bank is OCRAM */
-    kFLEXRAM_BankDTCM = 2U,    /*!< bank is DTCM */
-    kFLEXRAM_BankITCM = 3U,    /*!< bank is ITCM */
+    kFLEXRAM_BankOCRAM   = 1U, /*!< bank is OCRAM */
+    kFLEXRAM_BankDTCM    = 2U, /*!< bank is DTCM */
+    kFLEXRAM_BankITCM    = 3U, /*!< bank is ITCM */
 };
 
 /*! @brief FLEXRAM tcm support size */
 enum _flexram_tcm_size
 {
-    kFLEXRAM_TCMSize32KB = 32 * 1024U,   /*!< TCM total size 32KB */
-    kFLEXRAM_TCMSize64KB = 64 * 1024U,   /*!< TCM total size 64KB */
+    kFLEXRAM_TCMSize32KB  = 32 * 1024U,  /*!< TCM total size 32KB */
+    kFLEXRAM_TCMSize64KB  = 64 * 1024U,  /*!< TCM total size 64KB */
     kFLEXRAM_TCMSize128KB = 128 * 1024U, /*!< TCM total size 128KB */
     kFLEXRAM_TCMSize256KB = 256 * 1024U, /*!< TCM total size 256KB */
     kFLEXRAM_TCMSize512KB = 512 * 1024U, /*!< TCM total size 512KB */
@@ -108,7 +108,7 @@ enum _flexram_tcm_size
 typedef enum _flexram_bank_allocate_src
 {
     kFLEXRAM_BankAllocateThroughHardwareFuse = 0U, /*!< allocate ram through hardware fuse value */
-    kFLEXRAM_BankAllocateThroughBankCfg = 1U,      /*!< allocate ram through FLEXRAM_BANK_CFG */
+    kFLEXRAM_BankAllocateThroughBankCfg      = 1U, /*!< allocate ram through FLEXRAM_BANK_CFG */
 } flexram_bank_allocate_src_t;
 
 /*! @brief FLEXRAM allocate ocram, itcm, dtcm size */
@@ -252,12 +252,10 @@ static inline void FLEXRAM_SetTCMWriteAccessMode(FLEXRAM_Type *base, flexram_tcm
  */
 static inline void FLEXRAM_EnableForceRamClockOn(FLEXRAM_Type *base, bool enable)
 {
-    if (enable)
-    {
+    if (enable) {
         base->TCM_CTRL |= FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK;
     }
-    else
-    {
+    else {
         base->TCM_CTRL &= ~FLEXRAM_TCM_CTRL_FORCE_CLK_ON_MASK;
     }
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.c
index 90b7eb154..2071618ad 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.c
@@ -4,7 +4,7 @@
  * Copyright 2016 NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -40,22 +40,19 @@
 #define FSL_COMPONENT_ID "platform.drivers.gpc_1"
 #endif
 
-
 void GPC_EnableIRQ(GPC_Type *base, uint32_t irqId)
 {
-    uint32_t irqRegNum = irqId / 32U;
+    uint32_t irqRegNum      = irqId / 32U;
     uint32_t irqRegShiftNum = irqId % 32U;
 
     assert(irqRegNum > 0U);
     assert(irqRegNum <= GPC_IMR_COUNT);
 
 #if ((defined FSL_FEATURE_GPC_HAS_IRQ_0_31) && FSL_FEATURE_GPC_HAS_IRQ_0_31)
-    if (irqRegNum == GPC_IMR_COUNT)
-    {
+    if (irqRegNum == GPC_IMR_COUNT) {
         base->IMR5 &= ~(1U << irqRegShiftNum);
     }
-    else
-    {
+    else {
         base->IMR[irqRegNum] &= ~(1U << irqRegShiftNum);
     }
 #else
@@ -65,19 +62,17 @@ void GPC_EnableIRQ(GPC_Type *base, uint32_t irqId)
 
 void GPC_DisableIRQ(GPC_Type *base, uint32_t irqId)
 {
-    uint32_t irqRegNum = irqId / 32U;
+    uint32_t irqRegNum      = irqId / 32U;
     uint32_t irqRegShiftNum = irqId % 32U;
 
     assert(irqRegNum > 0U);
     assert(irqRegNum <= GPC_IMR_COUNT);
 
 #if ((defined FSL_FEATURE_GPC_HAS_IRQ_0_31) && FSL_FEATURE_GPC_HAS_IRQ_0_31)
-    if (irqRegNum == GPC_IMR_COUNT)
-    {
+    if (irqRegNum == GPC_IMR_COUNT) {
         base->IMR5 |= (1U << irqRegShiftNum);
     }
-    else
-    {
+    else {
         base->IMR[irqRegNum] |= (1U << irqRegShiftNum);
     }
 #else
@@ -87,7 +82,7 @@ void GPC_DisableIRQ(GPC_Type *base, uint32_t irqId)
 
 bool GPC_GetIRQStatusFlag(GPC_Type *base, uint32_t irqId)
 {
-    uint32_t irqRegNum = irqId / 32U;
+    uint32_t irqRegNum      = irqId / 32U;
     uint32_t irqRegShiftNum = irqId % 32U;
     uint32_t ret;
 
@@ -95,12 +90,10 @@ bool GPC_GetIRQStatusFlag(GPC_Type *base, uint32_t irqId)
     assert(irqRegNum <= GPC_IMR_COUNT);
 
 #if ((defined FSL_FEATURE_GPC_HAS_IRQ_0_31) && FSL_FEATURE_GPC_HAS_IRQ_0_31)
-    if (irqRegNum == GPC_IMR_COUNT)
-    {
+    if (irqRegNum == GPC_IMR_COUNT) {
         ret = base->ISR5 & (1U << irqRegShiftNum);
     }
-    else
-    {
+    else {
         ret = base->ISR[irqRegNum] & (1U << irqRegShiftNum);
     }
 #else
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.h
index 5ba31ecf6..1334ca5cd 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpc.h
@@ -4,7 +4,7 @@
  * Copyright 2016 NXP
  * All rights reserved.
  *
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -54,199 +54,190 @@
 /*@}*/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*******************************************************************************
- * API
- ******************************************************************************/
+    /*******************************************************************************
+     * API
+     ******************************************************************************/
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_GPCIRQM) && FSL_FEATURE_GPC_HAS_CNTR_GPCIRQM)
-/*!
- * @brief Allow all the IRQ/Events within the charge of GPC.
- *
- * @param base GPC peripheral base address.
- */
-static inline void GPC_AllowIRQs(GPC_Type *base)
-{
-    base->CNTR &= ~GPC_CNTR_GPCIRQM_MASK; /* Events would not be masked. */
-}
+    /*!
+     * @brief Allow all the IRQ/Events within the charge of GPC.
+     *
+     * @param base GPC peripheral base address.
+     */
+    static inline void GPC_AllowIRQs(GPC_Type *base)
+    {
+        base->CNTR &= ~GPC_CNTR_GPCIRQM_MASK; /* Events would not be masked. */
+    }
 
-/*!
- * @brief Disallow all the IRQ/Events within the charge of GPC.
- *
- * @param base GPC peripheral base address.
- */
-static inline void GPC_DisallowIRQs(GPC_Type *base)
-{
-    base->CNTR |= GPC_CNTR_GPCIRQM_MASK; /* Mask all the events. */
-}
+    /*!
+     * @brief Disallow all the IRQ/Events within the charge of GPC.
+     *
+     * @param base GPC peripheral base address.
+     */
+    static inline void GPC_DisallowIRQs(GPC_Type *base)
+    {
+        base->CNTR |= GPC_CNTR_GPCIRQM_MASK; /* Mask all the events. */
+    }
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_GPCIRQM */
 
-/*!
- * @brief Enable the IRQ.
- *
- * @param base GPC peripheral base address.
- * @param irqId ID number of IRQ to be enabled, available range is 32-159.
- */
-void GPC_EnableIRQ(GPC_Type *base, uint32_t irqId);
+    /*!
+     * @brief Enable the IRQ.
+     *
+     * @param base GPC peripheral base address.
+     * @param irqId ID number of IRQ to be enabled, available range is 32-159.
+     */
+    void GPC_EnableIRQ(GPC_Type *base, uint32_t irqId);
 
-/*!
- * @brief Disable the IRQ.
- *
- * @param base GPC peripheral base address.
- * @param irqId ID number of IRQ to be disabled, available range is 32-159.
- */
-void GPC_DisableIRQ(GPC_Type *base, uint32_t irqId);
+    /*!
+     * @brief Disable the IRQ.
+     *
+     * @param base GPC peripheral base address.
+     * @param irqId ID number of IRQ to be disabled, available range is 32-159.
+     */
+    void GPC_DisableIRQ(GPC_Type *base, uint32_t irqId);
 
-/*!
- * @brief Get the IRQ/Event flag.
- *
- * @param base GPC peripheral base address.
- * @param irqId ID number of IRQ to be enabled, available range is 32-159.
- * @return Indicated IRQ/Event is asserted or not.
- */
-bool GPC_GetIRQStatusFlag(GPC_Type *base, uint32_t irqId);
+    /*!
+     * @brief Get the IRQ/Event flag.
+     *
+     * @param base GPC peripheral base address.
+     * @param irqId ID number of IRQ to be enabled, available range is 32-159.
+     * @return Indicated IRQ/Event is asserted or not.
+     */
+    bool GPC_GetIRQStatusFlag(GPC_Type *base, uint32_t irqId);
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_L2PGE) && FSL_FEATURE_GPC_HAS_CNTR_L2PGE)
-/*!
- * @brief L2 Cache Power Gate Enable
- *
- * This function configures the L2 cache if it will keep power when in low power mode.
- * When the L2 cache power is OFF, L2 cache will be power down once when CPU core is power down
- * and will be hardware invalidated automatically when CPU core is re-power up.
- * When the L2 cache power is ON, L2 cache will keep power on even if CPU core is power down and
- * will not be hardware invalidated.
- * When CPU core is re-power up, the default setting is OFF.
- *
- * @param base GPC peripheral base address.
- * @param enable Enable the request or not.
- */
-static inline void GPC_RequestL2CachePowerDown(GPC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief L2 Cache Power Gate Enable
+     *
+     * This function configures the L2 cache if it will keep power when in low power mode.
+     * When the L2 cache power is OFF, L2 cache will be power down once when CPU core is power down
+     * and will be hardware invalidated automatically when CPU core is re-power up.
+     * When the L2 cache power is ON, L2 cache will keep power on even if CPU core is power down and
+     * will not be hardware invalidated.
+     * When CPU core is re-power up, the default setting is OFF.
+     *
+     * @param base GPC peripheral base address.
+     * @param enable Enable the request or not.
+     */
+    static inline void GPC_RequestL2CachePowerDown(GPC_Type *base, bool enable)
     {
-        base->CNTR |= GPC_CNTR_L2_PGE_MASK; /* OFF. */
+        if (enable) {
+            base->CNTR |= GPC_CNTR_L2_PGE_MASK; /* OFF. */
+        }
+        else {
+            base->CNTR &= ~GPC_CNTR_L2_PGE_MASK; /* ON. */
+        }
     }
-    else
-    {
-        base->CNTR &= ~GPC_CNTR_L2_PGE_MASK; /* ON. */
-    }
-}
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_L2PGE */
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_PDRAM0PGE) && FSL_FEATURE_GPC_HAS_CNTR_PDRAM0PGE)
-/*!
- * @brief FLEXRAM PDRAM0 Power Gate Enable
- *
- * This function configures the FLEXRAM PDRAM0 if it will keep power when cpu core is power down.
- * When the PDRAM0 Power is 1, PDRAM0 will be power down once when CPU core is power down.
- * When the PDRAM0 Power is 0, PDRAM0 will keep power on even if CPU core is power down.
- * When CPU core is re-power up, the default setting is 1.
- *
- * @param base GPC peripheral base address.
- * @param enable Enable the request or not.
- */
-static inline void GPC_RequestPdram0PowerDown(GPC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief FLEXRAM PDRAM0 Power Gate Enable
+     *
+     * This function configures the FLEXRAM PDRAM0 if it will keep power when cpu core is power down.
+     * When the PDRAM0 Power is 1, PDRAM0 will be power down once when CPU core is power down.
+     * When the PDRAM0 Power is 0, PDRAM0 will keep power on even if CPU core is power down.
+     * When CPU core is re-power up, the default setting is 1.
+     *
+     * @param base GPC peripheral base address.
+     * @param enable Enable the request or not.
+     */
+    static inline void GPC_RequestPdram0PowerDown(GPC_Type *base, bool enable)
     {
-        base->CNTR |= GPC_CNTR_PDRAM0_PGE_MASK; /* OFF. */
+        if (enable) {
+            base->CNTR |= GPC_CNTR_PDRAM0_PGE_MASK; /* OFF. */
+        }
+        else {
+            base->CNTR &= ~GPC_CNTR_PDRAM0_PGE_MASK; /* ON. */
+        }
     }
-    else
-    {
-        base->CNTR &= ~GPC_CNTR_PDRAM0_PGE_MASK; /* ON. */
-    }
-}
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_PDRAM0PGE */
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_VADC) && FSL_FEATURE_GPC_HAS_CNTR_VADC)
-/*!
- * @brief VADC power down.
- *
- * This function requests the VADC power down.
- *
- * @param base GPC peripheral base address.
- * @param enable Enable the request or not.
- */
-static inline void GPC_RequestVADCPowerDown(GPC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief VADC power down.
+     *
+     * This function requests the VADC power down.
+     *
+     * @param base GPC peripheral base address.
+     * @param enable Enable the request or not.
+     */
+    static inline void GPC_RequestVADCPowerDown(GPC_Type *base, bool enable)
     {
-        base->CNTR &= ~GPC_CNTR_VADC_EXT_PWD_N_MASK; /* VADC power down. */
+        if (enable) {
+            base->CNTR &= ~GPC_CNTR_VADC_EXT_PWD_N_MASK; /* VADC power down. */
+        }
+        else {
+            base->CNTR |= GPC_CNTR_VADC_EXT_PWD_N_MASK; /* VADC not power down. */
+        }
     }
-    else
-    {
-        base->CNTR |= GPC_CNTR_VADC_EXT_PWD_N_MASK; /* VADC not power down. */
-    }
-}
 
-/*!
- * @brief Checks if the VADC is power off.
- *
- * @param base GPC peripheral base address.
- * @return Whether the VADC is power off or not.
- */
-static inline bool GPC_GetVADCPowerDownFlag(GPC_Type *base)
-{
-    return (GPC_CNTR_VADC_ANALOG_OFF_MASK == (GPC_CNTR_VADC_ANALOG_OFF_MASK & base->CNTR));
-}
+    /*!
+     * @brief Checks if the VADC is power off.
+     *
+     * @param base GPC peripheral base address.
+     * @return Whether the VADC is power off or not.
+     */
+    static inline bool GPC_GetVADCPowerDownFlag(GPC_Type *base)
+    {
+        return (GPC_CNTR_VADC_ANALOG_OFF_MASK == (GPC_CNTR_VADC_ANALOG_OFF_MASK & base->CNTR));
+    }
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_VADC */
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_DVFS0CR) && FSL_FEATURE_GPC_HAS_CNTR_DVFS0CR)
-/*!
- * @brief Checks if the DVFS0 is requesting for frequency/voltage update.
- *
- * @param base GPC peripheral base address.
- * @return Whether the DVFS0 is requesting for frequency/voltage update.
- */
-static inline bool GPC_HasDVFS0ChangeRequest(GPC_Type *base)
-{
-    return (GPC_CNTR_DVFS0CR_MASK == (GPC_CNTR_DVFS0CR_MASK & base->CNTR));
-}
+    /*!
+     * @brief Checks if the DVFS0 is requesting for frequency/voltage update.
+     *
+     * @param base GPC peripheral base address.
+     * @return Whether the DVFS0 is requesting for frequency/voltage update.
+     */
+    static inline bool GPC_HasDVFS0ChangeRequest(GPC_Type *base)
+    {
+        return (GPC_CNTR_DVFS0CR_MASK == (GPC_CNTR_DVFS0CR_MASK & base->CNTR));
+    }
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_DVFS0CR */
 
 #if (defined(FSL_FEATURE_GPC_HAS_CNTR_DISPLAY) && FSL_FEATURE_GPC_HAS_CNTR_DISPLAY)
-/*!
- * @brief Requests the display power switch sequence.
- *
- * @param base GPC peripheral base address.
- * @param enable Enable the power on sequence, or the power down sequence.
- */
-static inline void GPC_RequestDisplayPowerOn(GPC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Requests the display power switch sequence.
+     *
+     * @param base GPC peripheral base address.
+     * @param enable Enable the power on sequence, or the power down sequence.
+     */
+    static inline void GPC_RequestDisplayPowerOn(GPC_Type *base, bool enable)
     {
-        base->CNTR |= GPC_CNTR_DISPLAY_PUP_REQ_MASK; /* Power on sequence. */
+        if (enable) {
+            base->CNTR |= GPC_CNTR_DISPLAY_PUP_REQ_MASK; /* Power on sequence. */
+        }
+        else {
+            base->CNTR |= GPC_CNTR_DISPLAY_PDN_REQ_MASK; /* Power down sequence. */
+        }
     }
-    else
-    {
-        base->CNTR |= GPC_CNTR_DISPLAY_PDN_REQ_MASK; /* Power down sequence. */
-    }
-}
 #endif /* FSL_FEATURE_GPC_HAS_CNTR_DISPLAY */
 
-/*!
- * @brief Requests the MEGA power switch sequence.
- *
- * @param base GPC peripheral base address.
- * @param enable Enable the power on sequence, or the power down sequence.
- */
-static inline void GPC_RequestMEGAPowerOn(GPC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Requests the MEGA power switch sequence.
+     *
+     * @param base GPC peripheral base address.
+     * @param enable Enable the power on sequence, or the power down sequence.
+     */
+    static inline void GPC_RequestMEGAPowerOn(GPC_Type *base, bool enable)
     {
-        base->CNTR |= GPC_CNTR_MEGA_PUP_REQ_MASK; /* Power on sequence. */
+        if (enable) {
+            base->CNTR |= GPC_CNTR_MEGA_PUP_REQ_MASK; /* Power on sequence. */
+        }
+        else {
+            base->CNTR |= GPC_CNTR_MEGA_PDN_REQ_MASK; /* Power down sequence. */
+        }
     }
-    else
-    {
-        base->CNTR |= GPC_CNTR_MEGA_PDN_REQ_MASK; /* Power down sequence. */
-    }
-}
 
-/*!
- * @}
- */
+    /*!
+     * @}
+     */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.c
index 12f89fac3..b46fc1745 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.c
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.igpio"
 #endif
 
-
 /*******************************************************************************
  * Variables
  ******************************************************************************/
@@ -53,15 +52,15 @@ static const clock_ip_name_t s_gpioClock[] = GPIO_CLOCKS;
 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
 /*******************************************************************************
-* Prototypes
-******************************************************************************/
+ * Prototypes
+ ******************************************************************************/
 
 /*!
-* @brief Gets the GPIO instance according to the GPIO base
-*
-* @param base    GPIO peripheral base pointer(PTA, PTB, PTC, etc.)
-* @retval GPIO instance
-*/
+ * @brief Gets the GPIO instance according to the GPIO base
+ *
+ * @param base    GPIO peripheral base pointer(PTA, PTB, PTC, etc.)
+ * @retval GPIO instance
+ */
 static uint32_t GPIO_GetInstance(GPIO_Type *base);
 
 /*******************************************************************************
@@ -73,10 +72,8 @@ static uint32_t GPIO_GetInstance(GPIO_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_gpioBases); instance++)
-    {
-        if (s_gpioBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_gpioBases); instance++) {
+        if (s_gpioBases[instance] == base) {
             break;
         }
     }
@@ -97,12 +94,10 @@ void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config
     base->IMR &= ~(1U << pin);
 
     /* Configure GPIO pin direction */
-    if (Config->direction == kGPIO_DigitalInput)
-    {
+    if (Config->direction == kGPIO_DigitalInput) {
         base->GDIR &= ~(1U << pin);
     }
-    else
-    {
+    else {
         GPIO_PinWrite(base, pin, Config->outputLogic);
         base->GDIR |= (1U << pin);
     }
@@ -111,19 +106,18 @@ void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config
     GPIO_SetPinInterruptConfig(base, pin, Config->interruptMode);
 }
 
-void GPIO_Deinit(GPIO_Type *base){
+void GPIO_Deinit(GPIO_Type *base)
+{
     CLOCK_DisableClock(s_gpioClock[GPIO_GetInstance(base)]);
 }
 
 void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)
 {
     assert(pin < 32);
-    if (output == 0U)
-    {
+    if (output == 0U) {
         base->DR &= ~(1U << pin); /* Set pin output to low level.*/
     }
-    else
-    {
+    else {
         base->DR |= (1U << pin); /* Set pin output to high level.*/
     }
 }
@@ -138,33 +132,30 @@ void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mo
     /* Register reset to default value */
     base->EDGE_SEL &= ~(1U << pin);
 
-    if (pin < 16)
-    {
+    if (pin < 16) {
         icr = &(base->ICR1);
     }
-    else
-    {
+    else {
         icr = &(base->ICR2);
         icrShift -= 16;
     }
-    switch (pinInterruptMode)
-    {
-        case (kGPIO_IntLowLevel):
-            *icr &= ~(3U << (2 * icrShift));
-            break;
-        case (kGPIO_IntHighLevel):
-            *icr = (*icr & (~(3U << (2 * icrShift)))) | (1U << (2 * icrShift));
-            break;
-        case (kGPIO_IntRisingEdge):
-            *icr = (*icr & (~(3U << (2 * icrShift)))) | (2U << (2 * icrShift));
-            break;
-        case (kGPIO_IntFallingEdge):
-            *icr |= (3U << (2 * icrShift));
-            break;
-        case (kGPIO_IntRisingOrFallingEdge):
-            base->EDGE_SEL |= (1U << pin);
-            break;
-        default:
-            break;
+    switch (pinInterruptMode) {
+    case (kGPIO_IntLowLevel):
+        *icr &= ~(3U << (2 * icrShift));
+        break;
+    case (kGPIO_IntHighLevel):
+        *icr = (*icr & (~(3U << (2 * icrShift)))) | (1U << (2 * icrShift));
+        break;
+    case (kGPIO_IntRisingEdge):
+        *icr = (*icr & (~(3U << (2 * icrShift)))) | (2U << (2 * icrShift));
+        break;
+    case (kGPIO_IntFallingEdge):
+        *icr |= (3U << (2 * icrShift));
+        break;
+    case (kGPIO_IntRisingOrFallingEdge):
+        base->EDGE_SEL |= (1U << pin);
+        break;
+    default:
+        break;
     }
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.h
index b38590fbb..6d7cd8218 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpio.h
@@ -55,18 +55,18 @@
 /*! @brief GPIO direction definition. */
 typedef enum _gpio_pin_direction
 {
-    kGPIO_DigitalInput = 0U,  /*!< Set current pin as digital input.*/
+    kGPIO_DigitalInput  = 0U, /*!< Set current pin as digital input.*/
     kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output.*/
 } gpio_pin_direction_t;
 
 /*! @brief GPIO interrupt mode definition. */
 typedef enum _gpio_interrupt_mode
 {
-    kGPIO_NoIntmode = 0U,              /*!< Set current pin general IO functionality.*/
-    kGPIO_IntLowLevel = 1U,            /*!< Set current pin interrupt is low-level sensitive.*/
-    kGPIO_IntHighLevel = 2U,           /*!< Set current pin interrupt is high-level sensitive.*/
-    kGPIO_IntRisingEdge = 3U,          /*!< Set current pin interrupt is rising-edge sensitive.*/
-    kGPIO_IntFallingEdge = 4U,         /*!< Set current pin interrupt is falling-edge sensitive.*/
+    kGPIO_NoIntmode              = 0U, /*!< Set current pin general IO functionality.*/
+    kGPIO_IntLowLevel            = 1U, /*!< Set current pin interrupt is low-level sensitive.*/
+    kGPIO_IntHighLevel           = 2U, /*!< Set current pin interrupt is high-level sensitive.*/
+    kGPIO_IntRisingEdge          = 3U, /*!< Set current pin interrupt is rising-edge sensitive.*/
+    kGPIO_IntFallingEdge         = 4U, /*!< Set current pin interrupt is falling-edge sensitive.*/
     kGPIO_IntRisingOrFallingEdge = 5U, /*!< Enable the edge select bit to override the ICR register's configuration.*/
 } gpio_interrupt_mode_t;
 
@@ -84,286 +84,286 @@ typedef struct _gpio_pin_config
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name GPIO Initialization and Configuration functions
- * @{
- */
+    /*!
+     * @name GPIO Initialization and Configuration functions
+     * @{
+     */
 
-/*!
- * @brief Initializes the GPIO peripheral according to the specified
- *        parameters in the initConfig.
- *
- * @param base GPIO base pointer.
- * @param pin Specifies the pin number
- * @param initConfig pointer to a @ref gpio_pin_config_t structure that
- *        contains the configuration information.
- */
-void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config);
-/*@}*/
+    /*!
+     * @brief Initializes the GPIO peripheral according to the specified
+     *        parameters in the initConfig.
+     *
+     * @param base GPIO base pointer.
+     * @param pin Specifies the pin number
+     * @param initConfig pointer to a @ref gpio_pin_config_t structure that
+     *        contains the configuration information.
+     */
+    void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config);
+    /*@}*/
 
-/*!
- * @name GPIO Deinitializes specified GPIO
- * @{
- */
+    /*!
+     * @name GPIO Deinitializes specified GPIO
+     * @{
+     */
 
-void GPIO_Deinit(GPIO_Type *base);
+    void GPIO_Deinit(GPIO_Type *base);
 
+    /*!
+     * @name GPIO Reads and Write Functions
+     * @{
+     */
 
-/*!
- * @name GPIO Reads and Write Functions
- * @{
- */
+    /*!
+     * @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
+     *
+     * @param base GPIO base pointer.
+     * @param pin GPIO port pin number.
+     * @param output GPIOpin output logic level.
+     *        - 0: corresponding pin output low-logic level.
+     *        - 1: corresponding pin output high-logic level.
+     */
+    void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output);
 
-/*!
- * @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
- *
- * @param base GPIO base pointer.
- * @param pin GPIO port pin number.
- * @param output GPIOpin output logic level.
- *        - 0: corresponding pin output low-logic level.
- *        - 1: corresponding pin output high-logic level.
- */
-void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output);
+    /*!
+     * @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinWrite.
+     */
+    static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
+    {
+        GPIO_PinWrite(base, pin, output);
+    }
 
-/*!
- * @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinWrite.
- */
-static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
-{
-    GPIO_PinWrite(base, pin, output);
-}
-
-/*!
- * @brief Sets the output level of the multiple GPIO pins to the logic 1.
- *
- * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
- * @param mask GPIO pin number macro
- */
-static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)
-{
+    /*!
+     * @brief Sets the output level of the multiple GPIO pins to the logic 1.
+     *
+     * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
+     * @param mask GPIO pin number macro
+     */
+    static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)
+    {
 #if (defined(FSL_FEATURE_IGPIO_HAS_DR_SET) && (FSL_FEATURE_IGPIO_HAS_DR_SET == 1))
-    base->DR_SET = mask;
+        base->DR_SET = mask;
 #else
     base->DR |= mask;
 #endif /* FSL_FEATURE_IGPIO_HAS_DR_SET */
-}
+    }
 
-/*!
- * @brief Sets the output level of the multiple GPIO pins to the logic 1.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortSet.
- */
-static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
-{
-    GPIO_PortSet(base, mask);
-}
+    /*!
+     * @brief Sets the output level of the multiple GPIO pins to the logic 1.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortSet.
+     */
+    static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
+    {
+        GPIO_PortSet(base, mask);
+    }
 
-/*!
- * @brief Sets the output level of the multiple GPIO pins to the logic 0.
- *
- * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
- * @param mask GPIO pin number macro
- */
-static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)
-{
+    /*!
+     * @brief Sets the output level of the multiple GPIO pins to the logic 0.
+     *
+     * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
+     * @param mask GPIO pin number macro
+     */
+    static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)
+    {
 #if (defined(FSL_FEATURE_IGPIO_HAS_DR_CLEAR) && (FSL_FEATURE_IGPIO_HAS_DR_CLEAR == 1))
-    base->DR_CLEAR = mask;
+        base->DR_CLEAR = mask;
 #else
     base->DR &= ~mask;
 #endif /* FSL_FEATURE_IGPIO_HAS_DR_CLEAR */
-}
+    }
 
-/*!
- * @brief Sets the output level of the multiple GPIO pins to the logic 0.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortClear.
- */
-static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
-{
-    GPIO_PortClear(base, mask);
-}
+    /*!
+     * @brief Sets the output level of the multiple GPIO pins to the logic 0.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortClear.
+     */
+    static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
+    {
+        GPIO_PortClear(base, mask);
+    }
 
-/*!
- * @brief Reverses the current output logic of the multiple GPIO pins.
- *
- * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
- * @param mask GPIO pin number macro
- */
-static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)
-{
+    /*!
+     * @brief Reverses the current output logic of the multiple GPIO pins.
+     *
+     * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
+     * @param mask GPIO pin number macro
+     */
+    static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)
+    {
 #if (defined(FSL_FEATURE_IGPIO_HAS_DR_TOGGLE) && (FSL_FEATURE_IGPIO_HAS_DR_TOGGLE == 1))
-    base->DR_TOGGLE = mask;
+        base->DR_TOGGLE = mask;
 #endif /* FSL_FEATURE_IGPIO_HAS_DR_TOGGLE */
-}
+    }
 
-/*!
- * @brief Reads the current input value of the GPIO port.
- *
- * @param base GPIO base pointer.
- * @param pin GPIO port pin number.
- * @retval GPIO port input value.
- */
-static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)
-{
-    assert(pin < 32);
+    /*!
+     * @brief Reads the current input value of the GPIO port.
+     *
+     * @param base GPIO base pointer.
+     * @param pin GPIO port pin number.
+     * @retval GPIO port input value.
+     */
+    static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)
+    {
+        assert(pin < 32);
 
-    return (((base->DR) >> pin) & 0x1U);
-}
+        return (((base->DR) >> pin) & 0x1U);
+    }
 
-/*!
- * @brief Reads the current input value of the GPIO port.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinRead.
- */
-static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
-{
-    return GPIO_PinRead(base, pin);
-}
-/*@}*/
+    /*!
+     * @brief Reads the current input value of the GPIO port.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinRead.
+     */
+    static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
+    {
+        return GPIO_PinRead(base, pin);
+    }
+    /*@}*/
 
-/*!
- * @name GPIO Reads Pad Status Functions
- * @{
- */
+    /*!
+     * @name GPIO Reads Pad Status Functions
+     * @{
+     */
 
-/*!
-* @brief Reads the current GPIO pin pad status.
-*
-* @param base GPIO base pointer.
-* @param pin GPIO port pin number.
-* @retval GPIO pin pad status value.
-*/
-static inline uint8_t GPIO_PinReadPadStatus(GPIO_Type *base, uint32_t pin)
-{
-    assert(pin < 32);
+    /*!
+     * @brief Reads the current GPIO pin pad status.
+     *
+     * @param base GPIO base pointer.
+     * @param pin GPIO port pin number.
+     * @retval GPIO pin pad status value.
+     */
+    static inline uint8_t GPIO_PinReadPadStatus(GPIO_Type *base, uint32_t pin)
+    {
+        assert(pin < 32);
 
-    return (uint8_t)(((base->PSR) >> pin) & 0x1U);
-}
+        return (uint8_t)(((base->PSR) >> pin) & 0x1U);
+    }
 
-/*!
-* @brief Reads the current GPIO pin pad status.
-* @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinReadPadStatus.
-*/
-static inline uint8_t GPIO_ReadPadStatus(GPIO_Type *base, uint32_t pin)
-{
-    return GPIO_PinReadPadStatus(base, pin);
-}
+    /*!
+     * @brief Reads the current GPIO pin pad status.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinReadPadStatus.
+     */
+    static inline uint8_t GPIO_ReadPadStatus(GPIO_Type *base, uint32_t pin)
+    {
+        return GPIO_PinReadPadStatus(base, pin);
+    }
 
-/*@}*/
+    /*@}*/
 
-/*!
- * @name Interrupts and flags management functions
- * @{
- */
+    /*!
+     * @name Interrupts and flags management functions
+     * @{
+     */
 
-/*!
- * @brief Sets the current pin interrupt mode.
- *
- * @param base GPIO base pointer.
- * @param pin GPIO port pin number.
- * @param pininterruptMode pointer to a @ref gpio_interrupt_mode_t structure
- *        that contains the interrupt mode information.
- */
-void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode);
+    /*!
+     * @brief Sets the current pin interrupt mode.
+     *
+     * @param base GPIO base pointer.
+     * @param pin GPIO port pin number.
+     * @param pininterruptMode pointer to a @ref gpio_interrupt_mode_t structure
+     *        that contains the interrupt mode information.
+     */
+    void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode);
 
-/*!
- * @brief Sets the current pin interrupt mode.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinSetInterruptConfig.
- */
-static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)
-{
-    GPIO_PinSetInterruptConfig(base, pin, pinInterruptMode);
-}
+    /*!
+     * @brief Sets the current pin interrupt mode.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PinSetInterruptConfig.
+     */
+    static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)
+    {
+        GPIO_PinSetInterruptConfig(base, pin, pinInterruptMode);
+    }
 
-/*!
- * @brief Enables the specific pin interrupt.
- *
- * @param base GPIO base pointer.
- * @param mask GPIO pin number macro.
- */
-static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask)
-{
-    base->IMR |= mask;
-}
+    /*!
+     * @brief Enables the specific pin interrupt.
+     *
+     * @param base GPIO base pointer.
+     * @param mask GPIO pin number macro.
+     */
+    static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask)
+    {
+        base->IMR |= mask;
+    }
 
-/*!
- * @brief Enables the specific pin interrupt.
- *
- * @param base GPIO base pointer.
- * @param mask GPIO pin number macro.
- */
-static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask)
-{
-    GPIO_PortEnableInterrupts(base, mask);
-}
+    /*!
+     * @brief Enables the specific pin interrupt.
+     *
+     * @param base GPIO base pointer.
+     * @param mask GPIO pin number macro.
+     */
+    static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask)
+    {
+        GPIO_PortEnableInterrupts(base, mask);
+    }
 
-/*!
- * @brief Disables the specific pin interrupt.
- *
- * @param base GPIO base pointer.
- * @param mask GPIO pin number macro.
- */
-static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask)
-{
-    base->IMR &= ~mask;
-}
+    /*!
+     * @brief Disables the specific pin interrupt.
+     *
+     * @param base GPIO base pointer.
+     * @param mask GPIO pin number macro.
+     */
+    static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask)
+    {
+        base->IMR &= ~mask;
+    }
 
-/*!
- * @brief Disables the specific pin interrupt.
- * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortDisableInterrupts.
- */
-static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask)
-{
-    GPIO_PortDisableInterrupts(base, mask);
-}
+    /*!
+     * @brief Disables the specific pin interrupt.
+     * @deprecated Do not use this function.  It has been superceded by @ref GPIO_PortDisableInterrupts.
+     */
+    static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask)
+    {
+        GPIO_PortDisableInterrupts(base, mask);
+    }
 
-/*!
- * @brief Reads individual pin interrupt status.
- *
- * @param base GPIO base pointer.
- * @retval current pin interrupt status flag.
- */
-static inline uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base)
-{
-    return base->ISR;
-}
+    /*!
+     * @brief Reads individual pin interrupt status.
+     *
+     * @param base GPIO base pointer.
+     * @retval current pin interrupt status flag.
+     */
+    static inline uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base)
+    {
+        return base->ISR;
+    }
 
-/*!
- * @brief Reads individual pin interrupt status.
- *
- * @param base GPIO base pointer.
- * @retval current pin interrupt status flag.
- */
-static inline uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)
-{
-    return GPIO_PortGetInterruptFlags(base);
-}
+    /*!
+     * @brief Reads individual pin interrupt status.
+     *
+     * @param base GPIO base pointer.
+     * @retval current pin interrupt status flag.
+     */
+    static inline uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)
+    {
+        return GPIO_PortGetInterruptFlags(base);
+    }
 
-/*!
- * @brief Clears pin interrupt flag. Status flags are cleared by
- *        writing a 1 to the corresponding bit position.
- *
- * @param base GPIO base pointer.
- * @param mask GPIO pin number macro.
- */
-static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask)
-{
-    base->ISR = mask;
-}
+    /*!
+     * @brief Clears pin interrupt flag. Status flags are cleared by
+     *        writing a 1 to the corresponding bit position.
+     *
+     * @param base GPIO base pointer.
+     * @param mask GPIO pin number macro.
+     */
+    static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask)
+    {
+        base->ISR = mask;
+    }
 
-/*!
- * @brief Clears pin interrupt flag. Status flags are cleared by
- *        writing a 1 to the corresponding bit position.
- *
- * @param base GPIO base pointer.
- * @param mask GPIO pin number macro.
- */
-static inline void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)
-{
-    GPIO_PortClearInterruptFlags(base, mask);
-}
-/*@}*/
+    /*!
+     * @brief Clears pin interrupt flag. Status flags are cleared by
+     *        writing a 1 to the corresponding bit position.
+     *
+     * @param base GPIO base pointer.
+     * @param mask GPIO pin number macro.
+     */
+    static inline void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)
+    {
+        GPIO_PortClearInterruptFlags(base, mask);
+    }
+    /*@}*/
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.c
index 39b0e89fb..3a9501672 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.gpt"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -63,10 +62,8 @@ static uint32_t GPT_GetInstance(GPT_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0U; instance < ARRAY_SIZE(s_gptBases); instance++)
-    {
-        if (s_gptBases[instance] == base)
-        {
+    for (instance = 0U; instance < ARRAY_SIZE(s_gptBases); instance++) {
+        if (s_gptBases[instance] == base) {
             break;
         }
     }
@@ -113,12 +110,12 @@ void GPT_GetDefaultConfig(gpt_config_t *config)
 {
     assert(config);
 
-    config->clockSource = kGPT_ClockSource_Periph;
-    config->divider = 1U;
+    config->clockSource     = kGPT_ClockSource_Periph;
+    config->divider         = 1U;
     config->enableRunInStop = true;
     config->enableRunInWait = true;
     config->enableRunInDoze = false;
-    config->enableRunInDbg = false;
-    config->enableFreeRun = false;
-    config->enableMode = true;
+    config->enableRunInDbg  = false;
+    config->enableFreeRun   = false;
+    config->enableMode      = true;
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.h
index 1cea05455..70fafd843 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_gpt.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -57,12 +57,12 @@
  */
 typedef enum _gpt_clock_source
 {
-    kGPT_ClockSource_Off = 0U,      /*!< GPT Clock Source Off.*/
-    kGPT_ClockSource_Periph = 1U,   /*!< GPT Clock Source from Peripheral Clock.*/
+    kGPT_ClockSource_Off      = 0U, /*!< GPT Clock Source Off.*/
+    kGPT_ClockSource_Periph   = 1U, /*!< GPT Clock Source from Peripheral Clock.*/
     kGPT_ClockSource_HighFreq = 2U, /*!< GPT Clock Source from High Frequency Reference Clock.*/
-    kGPT_ClockSource_Ext = 3U,      /*!< GPT Clock Source from external pin.*/
-    kGPT_ClockSource_LowFreq = 4U,  /*!< GPT Clock Source from Low Frequency Reference Clock.*/
-    kGPT_ClockSource_Osc = 5U,      /*!< GPT Clock Source from Crystal oscillator.*/
+    kGPT_ClockSource_Ext      = 3U, /*!< GPT Clock Source from external pin.*/
+    kGPT_ClockSource_LowFreq  = 4U, /*!< GPT Clock Source from Low Frequency Reference Clock.*/
+    kGPT_ClockSource_Osc      = 5U, /*!< GPT Clock Source from Crystal oscillator.*/
 } gpt_clock_source_t;
 
 /*! @brief List of input capture channel number. */
@@ -93,10 +93,10 @@ typedef enum _gpt_output_compare_channel
 typedef enum _gpt_output_operation_mode
 {
     kGPT_OutputOperation_Disconnected = 0U, /*!< Don't change output pin.*/
-    kGPT_OutputOperation_Toggle = 1U,       /*!< Toggle output pin.*/
-    kGPT_OutputOperation_Clear = 2U,        /*!< Set output pin low.*/
-    kGPT_OutputOperation_Set = 3U,          /*!< Set output pin high.*/
-    kGPT_OutputOperation_Activelow = 4U,    /*!< Generate a active low pulse on output pin.*/
+    kGPT_OutputOperation_Toggle       = 1U, /*!< Toggle output pin.*/
+    kGPT_OutputOperation_Clear        = 2U, /*!< Set output pin low.*/
+    kGPT_OutputOperation_Set          = 3U, /*!< Set output pin high.*/
+    kGPT_OutputOperation_Activelow    = 4U, /*!< Generate a active low pulse on output pin.*/
 } gpt_output_operation_mode_t;
 
 /*! @brief List of GPT interrupts */
@@ -105,9 +105,9 @@ typedef enum _gpt_interrupt_enable
     kGPT_OutputCompare1InterruptEnable = GPT_IR_OF1IE_MASK, /*!< Output Compare Channel1 interrupt enable*/
     kGPT_OutputCompare2InterruptEnable = GPT_IR_OF2IE_MASK, /*!< Output Compare Channel2 interrupt enable*/
     kGPT_OutputCompare3InterruptEnable = GPT_IR_OF3IE_MASK, /*!< Output Compare Channel3 interrupt enable*/
-    kGPT_InputCapture1InterruptEnable = GPT_IR_IF1IE_MASK,  /*!< Input Capture Channel1 interrupt enable*/
-    kGPT_InputCapture2InterruptEnable = GPT_IR_IF2IE_MASK,  /*!< Input Capture Channel1 interrupt enable*/
-    kGPT_RollOverFlagInterruptEnable = GPT_IR_ROVIE_MASK,   /*!< Counter rolled over interrupt enable*/
+    kGPT_InputCapture1InterruptEnable  = GPT_IR_IF1IE_MASK, /*!< Input Capture Channel1 interrupt enable*/
+    kGPT_InputCapture2InterruptEnable  = GPT_IR_IF2IE_MASK, /*!< Input Capture Channel1 interrupt enable*/
+    kGPT_RollOverFlagInterruptEnable   = GPT_IR_ROVIE_MASK, /*!< Counter rolled over interrupt enable*/
 } gpt_interrupt_enable_t;
 
 /*! @brief Status flag. */
@@ -116,9 +116,9 @@ typedef enum _gpt_status_flag
     kGPT_OutputCompare1Flag = GPT_SR_OF1_MASK, /*!< Output compare channel 1 event.*/
     kGPT_OutputCompare2Flag = GPT_SR_OF2_MASK, /*!< Output compare channel 2 event.*/
     kGPT_OutputCompare3Flag = GPT_SR_OF3_MASK, /*!< Output compare channel 3 event.*/
-    kGPT_InputCapture1Flag = GPT_SR_IF1_MASK,  /*!< Input Capture channel 1 event.*/
-    kGPT_InputCapture2Flag = GPT_SR_IF2_MASK,  /*!< Input Capture channel 2 event.*/
-    kGPT_RollOverFlag = GPT_SR_ROV_MASK,       /*!< Counter reaches maximum value and rolled over to 0 event.*/
+    kGPT_InputCapture1Flag  = GPT_SR_IF1_MASK, /*!< Input Capture channel 1 event.*/
+    kGPT_InputCapture2Flag  = GPT_SR_IF2_MASK, /*!< Input Capture channel 2 event.*/
+    kGPT_RollOverFlag       = GPT_SR_ROV_MASK, /*!< Counter reaches maximum value and rolled over to 0 event.*/
 } gpt_status_flag_t;
 
 /*! @brief Structure to configure the running mode. */
@@ -140,389 +140,387 @@ typedef struct _gpt_init_config
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Initialize GPT to reset state and initialize running mode.
- *
- * @param base GPT peripheral base address.
- * @param initConfig GPT mode setting configuration.
- */
-void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig);
+    /*!
+     * @brief Initialize GPT to reset state and initialize running mode.
+     *
+     * @param base GPT peripheral base address.
+     * @param initConfig GPT mode setting configuration.
+     */
+    void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig);
 
-/*!
- * @brief Disables the module and gates the GPT clock.
- *
- * @param base GPT peripheral base address.
- */
-void GPT_Deinit(GPT_Type *base);
+    /*!
+     * @brief Disables the module and gates the GPT clock.
+     *
+     * @param base GPT peripheral base address.
+     */
+    void GPT_Deinit(GPT_Type *base);
 
-/*!
- * @brief Fills in the GPT configuration structure with default settings.
- *
- * The default values are:
- * @code
- *    config->clockSource = kGPT_ClockSource_Periph;
- *    config->divider = 1U;
- *    config->enableRunInStop = true;
- *    config->enableRunInWait = true;
- *    config->enableRunInDoze = false;
- *    config->enableRunInDbg = false;
- *    config->enableFreeRun = true;
- *    config->enableMode  = true;
- * @endcode
- * @param config Pointer to the user configuration structure.
- */
-void GPT_GetDefaultConfig(gpt_config_t *config);
+    /*!
+     * @brief Fills in the GPT configuration structure with default settings.
+     *
+     * The default values are:
+     * @code
+     *    config->clockSource = kGPT_ClockSource_Periph;
+     *    config->divider = 1U;
+     *    config->enableRunInStop = true;
+     *    config->enableRunInWait = true;
+     *    config->enableRunInDoze = false;
+     *    config->enableRunInDbg = false;
+     *    config->enableFreeRun = true;
+     *    config->enableMode  = true;
+     * @endcode
+     * @param config Pointer to the user configuration structure.
+     */
+    void GPT_GetDefaultConfig(gpt_config_t *config);
 
-/*!
- * @name Software Reset
- * @{
- */
+    /*!
+     * @name Software Reset
+     * @{
+     */
 
-/*!
- * @brief Software reset of GPT module.
- *
- * @param base GPT peripheral base address.
- */
-static inline void GPT_SoftwareReset(GPT_Type *base)
-{
-    base->CR |= GPT_CR_SWR_MASK;
-    /* Wait reset finished. */
-    while ((base->CR & GPT_CR_SWR_MASK) == GPT_CR_SWR_MASK)
+    /*!
+     * @brief Software reset of GPT module.
+     *
+     * @param base GPT peripheral base address.
+     */
+    static inline void GPT_SoftwareReset(GPT_Type *base)
     {
+        base->CR |= GPT_CR_SWR_MASK;
+        /* Wait reset finished. */
+        while ((base->CR & GPT_CR_SWR_MASK) == GPT_CR_SWR_MASK) {}
     }
-}
 
-/*!
- * @name Clock source and frequency control
- * @{
- */
+    /*!
+     * @name Clock source and frequency control
+     * @{
+     */
 
-/*!
- * @brief Set clock source of GPT.
- *
- * @param base GPT peripheral base address.
- * @param source Clock source (see @ref gpt_clock_source_t typedef enumeration).
- */
-static inline void GPT_SetClockSource(GPT_Type *base, gpt_clock_source_t source)
-{
-    if (source == kGPT_ClockSource_Osc)
+    /*!
+     * @brief Set clock source of GPT.
+     *
+     * @param base GPT peripheral base address.
+     * @param source Clock source (see @ref gpt_clock_source_t typedef enumeration).
+     */
+    static inline void GPT_SetClockSource(GPT_Type *base, gpt_clock_source_t source)
     {
-        base->CR = (base->CR & ~GPT_CR_CLKSRC_MASK) | GPT_CR_EN_24M_MASK | GPT_CR_CLKSRC(source);
+        if (source == kGPT_ClockSource_Osc) {
+            base->CR = (base->CR & ~GPT_CR_CLKSRC_MASK) | GPT_CR_EN_24M_MASK | GPT_CR_CLKSRC(source);
+        }
+        else {
+            base->CR = (base->CR & ~(GPT_CR_CLKSRC_MASK | GPT_CR_EN_24M_MASK)) | GPT_CR_CLKSRC(source);
+        }
     }
-    else
+
+    /*!
+     * @brief Get clock source of GPT.
+     *
+     * @param base GPT peripheral base address.
+     * @return clock source (see @ref gpt_clock_source_t typedef enumeration).
+     */
+    static inline gpt_clock_source_t GPT_GetClockSource(GPT_Type *base)
     {
-        base->CR = (base->CR & ~(GPT_CR_CLKSRC_MASK | GPT_CR_EN_24M_MASK)) | GPT_CR_CLKSRC(source);
+        return (gpt_clock_source_t)((base->CR & GPT_CR_CLKSRC_MASK) >> GPT_CR_CLKSRC_SHIFT);
     }
-}
 
-/*!
- * @brief Get clock source of GPT.
- *
- * @param base GPT peripheral base address.
- * @return clock source (see @ref gpt_clock_source_t typedef enumeration).
- */
-static inline gpt_clock_source_t GPT_GetClockSource(GPT_Type *base)
-{
-    return (gpt_clock_source_t)((base->CR & GPT_CR_CLKSRC_MASK) >> GPT_CR_CLKSRC_SHIFT);
-}
+    /*!
+     * @brief Set pre scaler of GPT.
+     *
+     * @param base GPT peripheral base address.
+     * @param divider Divider of GPT (1-4096).
+     */
+    static inline void GPT_SetClockDivider(GPT_Type *base, uint32_t divider)
+    {
+        assert(divider - 1 <= GPT_PR_PRESCALER_MASK);
 
-/*!
- * @brief Set pre scaler of GPT.
- *
- * @param base GPT peripheral base address.
- * @param divider Divider of GPT (1-4096).
- */
-static inline void GPT_SetClockDivider(GPT_Type *base, uint32_t divider)
-{
-    assert(divider - 1 <= GPT_PR_PRESCALER_MASK);
+        base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(divider - 1);
+    }
 
-    base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(divider - 1);
-}
+    /*!
+     * @brief Get clock divider in GPT module.
+     *
+     * @param base GPT peripheral base address.
+     * @return clock divider in GPT module (1-4096).
+     */
+    static inline uint32_t GPT_GetClockDivider(GPT_Type *base)
+    {
+        return ((base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT) + 1;
+    }
 
-/*!
- * @brief Get clock divider in GPT module.
- *
- * @param base GPT peripheral base address.
- * @return clock divider in GPT module (1-4096).
- */
-static inline uint32_t GPT_GetClockDivider(GPT_Type *base)
-{
-    return ((base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT) + 1;
-}
+    /*!
+     * @brief OSC 24M pre-scaler before selected by clock source.
+     *
+     * @param base GPT peripheral base address.
+     * @param divider OSC Divider(1-16).
+     */
+    static inline void GPT_SetOscClockDivider(GPT_Type *base, uint32_t divider)
+    {
+        assert(divider - 1 <= (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT));
 
-/*!
- * @brief OSC 24M pre-scaler before selected by clock source.
- *
- * @param base GPT peripheral base address.
- * @param divider OSC Divider(1-16).
- */
-static inline void GPT_SetOscClockDivider(GPT_Type *base, uint32_t divider)
-{
-    assert(divider - 1 <= (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT));
+        base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(divider - 1);
+    }
 
-    base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(divider - 1);
-}
+    /*!
+     * @brief Get OSC 24M clock divider in GPT module.
+     *
+     * @param base GPT peripheral base address.
+     * @return OSC clock divider in GPT module (1-16).
+     */
+    static inline uint32_t GPT_GetOscClockDivider(GPT_Type *base)
+    {
+        return ((base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT) + 1;
+    }
 
-/*!
- * @brief Get OSC 24M clock divider in GPT module.
- *
- * @param base GPT peripheral base address.
- * @return OSC clock divider in GPT module (1-16).
- */
-static inline uint32_t GPT_GetOscClockDivider(GPT_Type *base)
-{
-    return ((base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT) + 1;
-}
+    /*! @}*/
 
-/*! @}*/
+    /*!
+     * @name Timer Start and Stop
+     * @{
+     */
+    /*!
+     * @brief Start GPT timer.
+     *
+     * @param base GPT peripheral base address.
+     */
+    static inline void GPT_StartTimer(GPT_Type *base)
+    {
+        base->CR |= GPT_CR_EN_MASK;
+    }
 
-/*!
- * @name Timer Start and Stop
- * @{
- */
-/*!
- * @brief Start GPT timer.
- *
- * @param base GPT peripheral base address.
- */
-static inline void GPT_StartTimer(GPT_Type *base)
-{
-    base->CR |= GPT_CR_EN_MASK;
-}
+    /*!
+     * @brief Stop GPT timer.
+     *
+     * @param base GPT peripheral base address.
+     */
+    static inline void GPT_StopTimer(GPT_Type *base)
+    {
+        base->CR &= ~GPT_CR_EN_MASK;
+    }
 
-/*!
- * @brief Stop GPT timer.
- *
- * @param base GPT peripheral base address.
- */
-static inline void GPT_StopTimer(GPT_Type *base)
-{
-    base->CR &= ~GPT_CR_EN_MASK;
-}
+    /*!
+     * @name Read the timer period
+     * @{
+     */
 
-/*!
- * @name Read the timer period
- * @{
- */
+    /*!
+     * @brief Reads the current GPT counting value.
+     *
+     * @param base GPT peripheral base address.
+     * @return Current GPT counter value.
+     */
+    static inline uint32_t GPT_GetCurrentTimerCount(GPT_Type *base)
+    {
+        return base->CNT;
+    }
 
-/*!
- * @brief Reads the current GPT counting value.
- *
- * @param base GPT peripheral base address.
- * @return Current GPT counter value.
- */
-static inline uint32_t GPT_GetCurrentTimerCount(GPT_Type *base)
-{
-    return base->CNT;
-}
+    /*@}*/
 
-/*@}*/
+    /*!
+     * @name GPT Input/Output Signal Control
+     * @{
+     */
 
-/*!
- * @name GPT Input/Output Signal Control
- * @{
- */
+    /*!
+     * @brief Set GPT operation mode of input capture channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
+     * @param mode GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
+     */
+    static inline void GPT_SetInputOperationMode(GPT_Type *base,
+                                                 gpt_input_capture_channel_t channel,
+                                                 gpt_input_operation_mode_t mode)
+    {
+        assert(channel <= kGPT_InputCapture_Channel2);
 
-/*!
- * @brief Set GPT operation mode of input capture channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
- * @param mode GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
- */
-static inline void GPT_SetInputOperationMode(GPT_Type *base,
-                                             gpt_input_capture_channel_t channel,
-                                             gpt_input_operation_mode_t mode)
-{
-    assert(channel <= kGPT_InputCapture_Channel2);
+        base->CR = (base->CR & ~(GPT_CR_IM1_MASK << (channel * 2))) | (GPT_CR_IM1(mode) << (channel * 2));
+    }
 
-    base->CR = (base->CR & ~(GPT_CR_IM1_MASK << (channel * 2))) | (GPT_CR_IM1(mode) << (channel * 2));
-}
+    /*!
+     * @brief Get GPT operation mode of input capture channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
+     * @return GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
+     */
+    static inline gpt_input_operation_mode_t GPT_GetInputOperationMode(GPT_Type *base,
+                                                                       gpt_input_capture_channel_t channel)
+    {
+        assert(channel <= kGPT_InputCapture_Channel2);
 
-/*!
- * @brief Get GPT operation mode of input capture channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
- * @return GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
- */
-static inline gpt_input_operation_mode_t GPT_GetInputOperationMode(GPT_Type *base, gpt_input_capture_channel_t channel)
-{
-    assert(channel <= kGPT_InputCapture_Channel2);
+        return (gpt_input_operation_mode_t)((base->CR >> (GPT_CR_IM1_SHIFT + channel * 2)) &
+                                            (GPT_CR_IM1_MASK >> GPT_CR_IM1_SHIFT));
+    }
 
-    return (gpt_input_operation_mode_t)((base->CR >> (GPT_CR_IM1_SHIFT + channel * 2)) &
-                                        (GPT_CR_IM1_MASK >> GPT_CR_IM1_SHIFT));
-}
+    /*!
+     * @brief Get GPT input capture value of certain channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
+     * @return GPT input capture value.
+     */
+    static inline uint32_t GPT_GetInputCaptureValue(GPT_Type *base, gpt_input_capture_channel_t channel)
+    {
+        assert(channel <= kGPT_InputCapture_Channel2);
 
-/*!
- * @brief Get GPT input capture value of certain channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
- * @return GPT input capture value.
- */
-static inline uint32_t GPT_GetInputCaptureValue(GPT_Type *base, gpt_input_capture_channel_t channel)
-{
-    assert(channel <= kGPT_InputCapture_Channel2);
+        return *(&base->ICR[0] + channel);
+    }
 
-    return *(&base->ICR[0] + channel);
-}
+    /*!
+     * @brief Set GPT operation mode of output compare channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
+     * @param mode GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
+     */
+    static inline void GPT_SetOutputOperationMode(GPT_Type *base,
+                                                  gpt_output_compare_channel_t channel,
+                                                  gpt_output_operation_mode_t mode)
+    {
+        assert(channel <= kGPT_OutputCompare_Channel3);
 
-/*!
- * @brief Set GPT operation mode of output compare channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
- * @param mode GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
- */
-static inline void GPT_SetOutputOperationMode(GPT_Type *base,
-                                              gpt_output_compare_channel_t channel,
-                                              gpt_output_operation_mode_t mode)
-{
-    assert(channel <= kGPT_OutputCompare_Channel3);
+        base->CR = (base->CR & ~(GPT_CR_OM1_MASK << (channel * 3))) | (GPT_CR_OM1(mode) << (channel * 3));
+    }
 
-    base->CR = (base->CR & ~(GPT_CR_OM1_MASK << (channel * 3))) | (GPT_CR_OM1(mode) << (channel * 3));
-}
+    /*!
+     * @brief Get GPT operation mode of output compare channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
+     * @return GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
+     */
+    static inline gpt_output_operation_mode_t GPT_GetOutputOperationMode(GPT_Type *base,
+                                                                         gpt_output_compare_channel_t channel)
+    {
+        assert(channel <= kGPT_OutputCompare_Channel3);
 
-/*!
- * @brief Get GPT operation mode of output compare channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
- * @return GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
- */
-static inline gpt_output_operation_mode_t GPT_GetOutputOperationMode(GPT_Type *base,
-                                                                     gpt_output_compare_channel_t channel)
-{
-    assert(channel <= kGPT_OutputCompare_Channel3);
+        return (gpt_output_operation_mode_t)((base->CR >> (GPT_CR_OM1_SHIFT + channel * 3)) &
+                                             (GPT_CR_OM1_MASK >> GPT_CR_OM1_SHIFT));
+    }
 
-    return (gpt_output_operation_mode_t)((base->CR >> (GPT_CR_OM1_SHIFT + channel * 3)) &
-                                         (GPT_CR_OM1_MASK >> GPT_CR_OM1_SHIFT));
-}
+    /*!
+     * @brief Set GPT output compare value of output compare channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
+     * @param value GPT output compare value.
+     */
+    static inline void GPT_SetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel, uint32_t value)
+    {
+        assert(channel <= kGPT_OutputCompare_Channel3);
 
-/*!
- * @brief Set GPT output compare value of output compare channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
- * @param value GPT output compare value.
- */
-static inline void GPT_SetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel, uint32_t value)
-{
-    assert(channel <= kGPT_OutputCompare_Channel3);
+        *(&base->OCR[0] + channel) = value;
+    }
 
-    *(&base->OCR[0] + channel) = value;
-}
+    /*!
+     * @brief Get GPT output compare value of output compare channel.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
+     * @return GPT output compare value.
+     */
+    static inline uint32_t GPT_GetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel)
+    {
+        assert(channel <= kGPT_OutputCompare_Channel3);
 
-/*!
- * @brief Get GPT output compare value of output compare channel.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
- * @return GPT output compare value.
- */
-static inline uint32_t GPT_GetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel)
-{
-    assert(channel <= kGPT_OutputCompare_Channel3);
+        return *(&base->OCR[0] + channel);
+    }
 
-    return *(&base->OCR[0] + channel);
-}
+    /*!
+     * @brief Force GPT output action on output compare channel, ignoring comparator.
+     *
+     * @param base GPT peripheral base address.
+     * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
+     */
+    static inline void GPT_ForceOutput(GPT_Type *base, gpt_output_compare_channel_t channel)
+    {
+        assert(channel <= kGPT_OutputCompare_Channel3);
 
-/*!
- * @brief Force GPT output action on output compare channel, ignoring comparator.
- *
- * @param base GPT peripheral base address.
- * @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
- */
-static inline void GPT_ForceOutput(GPT_Type *base, gpt_output_compare_channel_t channel)
-{
-    assert(channel <= kGPT_OutputCompare_Channel3);
+        base->CR |= (GPT_CR_FO1_MASK << channel);
+    }
 
-    base->CR |= (GPT_CR_FO1_MASK << channel);
-}
+    /*@}*/
 
-/*@}*/
+    /*!
+     * @name GPT Interrupt and Status Interface
+     * @{
+     */
 
-/*!
- * @name GPT Interrupt and Status Interface
- * @{
- */
+    /*!
+     * @brief Enables the selected GPT interrupts.
+     *
+     * @param base GPT peripheral base address.
+     * @param mask The interrupts to enable. This is a logical OR of members of the
+     *             enumeration ::gpt_interrupt_enable_t
+     */
+    static inline void GPT_EnableInterrupts(GPT_Type *base, uint32_t mask)
+    {
+        base->IR |= mask;
+    }
 
-/*!
- * @brief Enables the selected GPT interrupts.
- *
- * @param base GPT peripheral base address.
- * @param mask The interrupts to enable. This is a logical OR of members of the
- *             enumeration ::gpt_interrupt_enable_t
- */
-static inline void GPT_EnableInterrupts(GPT_Type *base, uint32_t mask)
-{
-    base->IR |= mask;
-}
+    /*!
+     * @brief Disables the selected GPT interrupts.
+     *
+     * @param base    GPT peripheral base address
+     * @param mask    The interrupts to disable. This is a logical OR of members of the
+     *                enumeration ::gpt_interrupt_enable_t
+     */
+    static inline void GPT_DisableInterrupts(GPT_Type *base, uint32_t mask)
+    {
+        base->IR &= ~mask;
+    }
 
-/*!
- * @brief Disables the selected GPT interrupts.
- *
- * @param base    GPT peripheral base address
- * @param mask    The interrupts to disable. This is a logical OR of members of the
- *                enumeration ::gpt_interrupt_enable_t
- */
-static inline void GPT_DisableInterrupts(GPT_Type *base, uint32_t mask)
-{
-    base->IR &= ~mask;
-}
+    /*!
+     * @brief Gets the enabled GPT interrupts.
+     *
+     * @param base    GPT peripheral base address
+     *
+     * @return The enabled interrupts. This is the logical OR of members of the
+     *         enumeration ::gpt_interrupt_enable_t
+     */
+    static inline uint32_t GPT_GetEnabledInterrupts(GPT_Type *base)
+    {
+        return (base->IR & (GPT_IR_OF1IE_MASK | GPT_IR_OF2IE_MASK | GPT_IR_OF3IE_MASK | GPT_IR_IF1IE_MASK |
+                            GPT_IR_IF2IE_MASK | GPT_IR_ROVIE_MASK));
+    }
 
-/*!
- * @brief Gets the enabled GPT interrupts.
- *
- * @param base    GPT peripheral base address
- *
- * @return The enabled interrupts. This is the logical OR of members of the
- *         enumeration ::gpt_interrupt_enable_t
- */
-static inline uint32_t GPT_GetEnabledInterrupts(GPT_Type *base)
-{
-    return (base->IR & (GPT_IR_OF1IE_MASK | GPT_IR_OF2IE_MASK | GPT_IR_OF3IE_MASK | GPT_IR_IF1IE_MASK |
-                        GPT_IR_IF2IE_MASK | GPT_IR_ROVIE_MASK));
-}
+    /*!
+     * @name Status Interface
+     * @{
+     */
 
-/*!
- * @name Status Interface
- * @{
- */
+    /*!
+     * @brief Get GPT status flags.
+     *
+     * @param base GPT peripheral base address.
+     * @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
+     * @return GPT status, each bit represents one status flag.
+     */
+    static inline uint32_t GPT_GetStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
+    {
+        return base->SR & flags;
+    }
 
-/*!
- * @brief Get GPT status flags.
- *
- * @param base GPT peripheral base address.
- * @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
- * @return GPT status, each bit represents one status flag.
- */
-static inline uint32_t GPT_GetStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
-{
-    return base->SR & flags;
-}
+    /*!
+     * @brief Clears the GPT status flags.
+     *
+     * @param base GPT peripheral base address.
+     * @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
+     */
+    static inline void GPT_ClearStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
+    {
+        base->SR = flags;
+    }
 
-/*!
- * @brief Clears the GPT status flags.
- *
- * @param base GPT peripheral base address.
- * @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
- */
-static inline void GPT_ClearStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
-{
-    base->SR = flags;
-}
-
-/*@}*/
+    /*@}*/
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_iomuxc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_iomuxc.h
index 2a7dabb80..21c81ccc7 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_iomuxc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_iomuxc.h
@@ -3,22 +3,22 @@
  * Copyright 2016 Freescale Semiconductor, Inc.
  * Copyright 2016-2018 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted (subject to the limitations in the
  * disclaimer below) provided that the following conditions are met:
- * 
+ *
  * * Redistributions of source code must retain the above copyright
  *   notice, this list of conditions and the following disclaimer.
- * 
+ *
  * * Redistributions in binary form must reproduce the above copyright
  *   notice, this list of conditions and the following disclaimer in the
  *   documentation and/or other materials provided with the distribution.
- * 
+ *
  * * Neither the name of the copyright holder nor the names of its
  *   contributors may be used to endorse or promote products derived from
  *   this software without specific prior written permission.
- * 
+ *
  * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
  * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
  * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
@@ -63,14 +63,14 @@
 /*! @name Pin function ID */
 /*@{*/
 /*! @brief The pin function ID is a tuple of <muxRegister muxMode inputRegister inputDaisy configRegister> */
-#define IOMUXC_SNVS_WAKEUP_GPIO5_IO00 0x400A8000U, 0x5U, 0, 0, 0x400A8018U
+#define IOMUXC_SNVS_WAKEUP_GPIO5_IO00   0x400A8000U, 0x5U, 0, 0, 0x400A8018U
 #define IOMUXC_SNVS_WAKEUP_NMI_GLUE_NMI 0x400A8000U, 0x7U, 0x401F8568U, 0x1U, 0x400A8018U
 
 #define IOMUXC_SNVS_PMIC_ON_REQ_SNVS_LP_PMIC_ON_REQ 0x400A8004U, 0x0U, 0, 0, 0x400A801CU
-#define IOMUXC_SNVS_PMIC_ON_REQ_GPIO5_IO01 0x400A8004U, 0x5U, 0, 0, 0x400A801CU
+#define IOMUXC_SNVS_PMIC_ON_REQ_GPIO5_IO01          0x400A8004U, 0x5U, 0, 0, 0x400A801CU
 
 #define IOMUXC_SNVS_PMIC_STBY_REQ_CCM_PMIC_VSTBY_REQ 0x400A8008U, 0x0U, 0, 0, 0x400A8020U
-#define IOMUXC_SNVS_PMIC_STBY_REQ_GPIO5_IO02 0x400A8008U, 0x5U, 0, 0, 0x400A8020U
+#define IOMUXC_SNVS_PMIC_STBY_REQ_GPIO5_IO02         0x400A8008U, 0x5U, 0, 0, 0x400A8020U
 
 #define IOMUXC_SNVS_TEST_MODE 0, 0, 0, 0, 0x400A800CU
 
@@ -78,1005 +78,1005 @@
 
 #define IOMUXC_SNVS_ONOFF 0, 0, 0, 0, 0x400A8014U
 
-#define IOMUXC_GPIO_EMC_00_SEMC_DATA00 0x401F8014U, 0x0U, 0, 0, 0x401F8204U
-#define IOMUXC_GPIO_EMC_00_FLEXPWM4_PWMA00 0x401F8014U, 0x1U, 0x401F8494U, 0x0U, 0x401F8204U
-#define IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x401F8014U, 0x2U, 0x401F8500U, 0x1U, 0x401F8204U
-#define IOMUXC_GPIO_EMC_00_XBAR1_XBAR_IN02 0x401F8014U, 0x3U, 0x401F860CU, 0x0U, 0x401F8204U
+#define IOMUXC_GPIO_EMC_00_SEMC_DATA00      0x401F8014U, 0x0U, 0, 0, 0x401F8204U
+#define IOMUXC_GPIO_EMC_00_FLEXPWM4_PWMA00  0x401F8014U, 0x1U, 0x401F8494U, 0x0U, 0x401F8204U
+#define IOMUXC_GPIO_EMC_00_LPSPI2_SCK       0x401F8014U, 0x2U, 0x401F8500U, 0x1U, 0x401F8204U
+#define IOMUXC_GPIO_EMC_00_XBAR1_XBAR_IN02  0x401F8014U, 0x3U, 0x401F860CU, 0x0U, 0x401F8204U
 #define IOMUXC_GPIO_EMC_00_FLEXIO1_FLEXIO00 0x401F8014U, 0x4U, 0, 0, 0x401F8204U
-#define IOMUXC_GPIO_EMC_00_GPIO4_IO00 0x401F8014U, 0x5U, 0, 0, 0x401F8204U
+#define IOMUXC_GPIO_EMC_00_GPIO4_IO00       0x401F8014U, 0x5U, 0, 0, 0x401F8204U
 
-#define IOMUXC_GPIO_EMC_01_SEMC_DATA01 0x401F8018U, 0x0U, 0, 0, 0x401F8208U
-#define IOMUXC_GPIO_EMC_01_FLEXPWM4_PWMB00 0x401F8018U, 0x1U, 0, 0, 0x401F8208U
-#define IOMUXC_GPIO_EMC_01_LPSPI2_PCS0 0x401F8018U, 0x2U, 0x401F84FCU, 0x1U, 0x401F8208U
-#define IOMUXC_GPIO_EMC_01_XBAR1_IN03 0x401F8018U, 0x3U, 0x401F8610U, 0x0U, 0x401F8208U
+#define IOMUXC_GPIO_EMC_01_SEMC_DATA01      0x401F8018U, 0x0U, 0, 0, 0x401F8208U
+#define IOMUXC_GPIO_EMC_01_FLEXPWM4_PWMB00  0x401F8018U, 0x1U, 0, 0, 0x401F8208U
+#define IOMUXC_GPIO_EMC_01_LPSPI2_PCS0      0x401F8018U, 0x2U, 0x401F84FCU, 0x1U, 0x401F8208U
+#define IOMUXC_GPIO_EMC_01_XBAR1_IN03       0x401F8018U, 0x3U, 0x401F8610U, 0x0U, 0x401F8208U
 #define IOMUXC_GPIO_EMC_01_FLEXIO1_FLEXIO01 0x401F8018U, 0x4U, 0, 0, 0x401F8208U
-#define IOMUXC_GPIO_EMC_01_GPIO4_IO01 0x401F8018U, 0x5U, 0, 0, 0x401F8208U
+#define IOMUXC_GPIO_EMC_01_GPIO4_IO01       0x401F8018U, 0x5U, 0, 0, 0x401F8208U
 
-#define IOMUXC_GPIO_EMC_02_SEMC_DATA02 0x401F801CU, 0x0U, 0, 0, 0x401F820CU
-#define IOMUXC_GPIO_EMC_02_FLEXPWM4_PWMA01 0x401F801CU, 0x1U, 0x401F8498U, 0x0U, 0x401F820CU
-#define IOMUXC_GPIO_EMC_02_LPSPI2_SDO 0x401F801CU, 0x2U, 0x401F8508U, 0x1U, 0x401F820CU
-#define IOMUXC_GPIO_EMC_02_XBAR1_INOUT04 0x401F801CU, 0x3U, 0x401F8614U, 0x0U, 0x401F820CU
+#define IOMUXC_GPIO_EMC_02_SEMC_DATA02      0x401F801CU, 0x0U, 0, 0, 0x401F820CU
+#define IOMUXC_GPIO_EMC_02_FLEXPWM4_PWMA01  0x401F801CU, 0x1U, 0x401F8498U, 0x0U, 0x401F820CU
+#define IOMUXC_GPIO_EMC_02_LPSPI2_SDO       0x401F801CU, 0x2U, 0x401F8508U, 0x1U, 0x401F820CU
+#define IOMUXC_GPIO_EMC_02_XBAR1_INOUT04    0x401F801CU, 0x3U, 0x401F8614U, 0x0U, 0x401F820CU
 #define IOMUXC_GPIO_EMC_02_FLEXIO1_FLEXIO02 0x401F801CU, 0x4U, 0, 0, 0x401F820CU
-#define IOMUXC_GPIO_EMC_02_GPIO4_IO02 0x401F801CU, 0x5U, 0, 0, 0x401F820CU
+#define IOMUXC_GPIO_EMC_02_GPIO4_IO02       0x401F801CU, 0x5U, 0, 0, 0x401F820CU
 
-#define IOMUXC_GPIO_EMC_03_SEMC_DATA03 0x401F8020U, 0x0U, 0, 0, 0x401F8210U
-#define IOMUXC_GPIO_EMC_03_FLEXPWM4_PWMB01 0x401F8020U, 0x1U, 0, 0, 0x401F8210U
-#define IOMUXC_GPIO_EMC_03_LPSPI2_SDI 0x401F8020U, 0x2U, 0x401F8504U, 0x1U, 0x401F8210U
-#define IOMUXC_GPIO_EMC_03_XBAR1_INOUT05 0x401F8020U, 0x3U, 0x401F8618U, 0x0U, 0x401F8210U
+#define IOMUXC_GPIO_EMC_03_SEMC_DATA03      0x401F8020U, 0x0U, 0, 0, 0x401F8210U
+#define IOMUXC_GPIO_EMC_03_FLEXPWM4_PWMB01  0x401F8020U, 0x1U, 0, 0, 0x401F8210U
+#define IOMUXC_GPIO_EMC_03_LPSPI2_SDI       0x401F8020U, 0x2U, 0x401F8504U, 0x1U, 0x401F8210U
+#define IOMUXC_GPIO_EMC_03_XBAR1_INOUT05    0x401F8020U, 0x3U, 0x401F8618U, 0x0U, 0x401F8210U
 #define IOMUXC_GPIO_EMC_03_FLEXIO1_FLEXIO03 0x401F8020U, 0x4U, 0, 0, 0x401F8210U
-#define IOMUXC_GPIO_EMC_03_GPIO4_IO03 0x401F8020U, 0x5U, 0, 0, 0x401F8210U
+#define IOMUXC_GPIO_EMC_03_GPIO4_IO03       0x401F8020U, 0x5U, 0, 0, 0x401F8210U
 
-#define IOMUXC_GPIO_EMC_04_SEMC_DATA04 0x401F8024U, 0x0U, 0, 0, 0x401F8214U
-#define IOMUXC_GPIO_EMC_04_FLEXPWM4_PWMA02 0x401F8024U, 0x1U, 0x401F849CU, 0x0U, 0x401F8214U
-#define IOMUXC_GPIO_EMC_04_SAI2_TX_DATA 0x401F8024U, 0x2U, 0, 0, 0x401F8214U
-#define IOMUXC_GPIO_EMC_04_XBAR1_INOUT06 0x401F8024U, 0x3U, 0x401F861CU, 0x0U, 0x401F8214U
+#define IOMUXC_GPIO_EMC_04_SEMC_DATA04      0x401F8024U, 0x0U, 0, 0, 0x401F8214U
+#define IOMUXC_GPIO_EMC_04_FLEXPWM4_PWMA02  0x401F8024U, 0x1U, 0x401F849CU, 0x0U, 0x401F8214U
+#define IOMUXC_GPIO_EMC_04_SAI2_TX_DATA     0x401F8024U, 0x2U, 0, 0, 0x401F8214U
+#define IOMUXC_GPIO_EMC_04_XBAR1_INOUT06    0x401F8024U, 0x3U, 0x401F861CU, 0x0U, 0x401F8214U
 #define IOMUXC_GPIO_EMC_04_FLEXIO1_FLEXIO04 0x401F8024U, 0x4U, 0, 0, 0x401F8214U
-#define IOMUXC_GPIO_EMC_04_GPIO4_IO04 0x401F8024U, 0x5U, 0, 0, 0x401F8214U
+#define IOMUXC_GPIO_EMC_04_GPIO4_IO04       0x401F8024U, 0x5U, 0, 0, 0x401F8214U
 
-#define IOMUXC_GPIO_EMC_05_SEMC_DATA05 0x401F8028U, 0x0U, 0, 0, 0x401F8218U
-#define IOMUXC_GPIO_EMC_05_FLEXPWM4_PWMB02 0x401F8028U, 0x1U, 0, 0, 0x401F8218U
-#define IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC 0x401F8028U, 0x2U, 0x401F85C4U, 0x0U, 0x401F8218U
-#define IOMUXC_GPIO_EMC_05_XBAR1_INOUT07 0x401F8028U, 0x3U, 0x401F8620U, 0x0U, 0x401F8218U
+#define IOMUXC_GPIO_EMC_05_SEMC_DATA05      0x401F8028U, 0x0U, 0, 0, 0x401F8218U
+#define IOMUXC_GPIO_EMC_05_FLEXPWM4_PWMB02  0x401F8028U, 0x1U, 0, 0, 0x401F8218U
+#define IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC     0x401F8028U, 0x2U, 0x401F85C4U, 0x0U, 0x401F8218U
+#define IOMUXC_GPIO_EMC_05_XBAR1_INOUT07    0x401F8028U, 0x3U, 0x401F8620U, 0x0U, 0x401F8218U
 #define IOMUXC_GPIO_EMC_05_FLEXIO1_FLEXIO05 0x401F8028U, 0x4U, 0, 0, 0x401F8218U
-#define IOMUXC_GPIO_EMC_05_GPIO4_IO05 0x401F8028U, 0x5U, 0, 0, 0x401F8218U
+#define IOMUXC_GPIO_EMC_05_GPIO4_IO05       0x401F8028U, 0x5U, 0, 0, 0x401F8218U
 
-#define IOMUXC_GPIO_EMC_06_SEMC_DATA06 0x401F802CU, 0x0U, 0, 0, 0x401F821CU
-#define IOMUXC_GPIO_EMC_06_FLEXPWM2_PWMA00 0x401F802CU, 0x1U, 0x401F8478U, 0x0U, 0x401F821CU
-#define IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK 0x401F802CU, 0x2U, 0x401F85C0U, 0x0U, 0x401F821CU
-#define IOMUXC_GPIO_EMC_06_XBAR1_INOUT08 0x401F802CU, 0x3U, 0x401F8624U, 0x0U, 0x401F821CU
+#define IOMUXC_GPIO_EMC_06_SEMC_DATA06      0x401F802CU, 0x0U, 0, 0, 0x401F821CU
+#define IOMUXC_GPIO_EMC_06_FLEXPWM2_PWMA00  0x401F802CU, 0x1U, 0x401F8478U, 0x0U, 0x401F821CU
+#define IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK     0x401F802CU, 0x2U, 0x401F85C0U, 0x0U, 0x401F821CU
+#define IOMUXC_GPIO_EMC_06_XBAR1_INOUT08    0x401F802CU, 0x3U, 0x401F8624U, 0x0U, 0x401F821CU
 #define IOMUXC_GPIO_EMC_06_FLEXIO1_FLEXIO06 0x401F802CU, 0x4U, 0, 0, 0x401F821CU
-#define IOMUXC_GPIO_EMC_06_GPIO4_IO06 0x401F802CU, 0x5U, 0, 0, 0x401F821CU
+#define IOMUXC_GPIO_EMC_06_GPIO4_IO06       0x401F802CU, 0x5U, 0, 0, 0x401F821CU
 
-#define IOMUXC_GPIO_EMC_07_SEMC_DATA07 0x401F8030U, 0x0U, 0, 0, 0x401F8220U
-#define IOMUXC_GPIO_EMC_07_FLEXPWM2_PWMB00 0x401F8030U, 0x1U, 0x401F8488U, 0x0U, 0x401F8220U
-#define IOMUXC_GPIO_EMC_07_SAI2_MCLK 0x401F8030U, 0x2U, 0x401F85B0U, 0x0U, 0x401F8220U
-#define IOMUXC_GPIO_EMC_07_XBAR1_INOUT09 0x401F8030U, 0x3U, 0x401F8628U, 0x0U, 0x401F8220U
+#define IOMUXC_GPIO_EMC_07_SEMC_DATA07      0x401F8030U, 0x0U, 0, 0, 0x401F8220U
+#define IOMUXC_GPIO_EMC_07_FLEXPWM2_PWMB00  0x401F8030U, 0x1U, 0x401F8488U, 0x0U, 0x401F8220U
+#define IOMUXC_GPIO_EMC_07_SAI2_MCLK        0x401F8030U, 0x2U, 0x401F85B0U, 0x0U, 0x401F8220U
+#define IOMUXC_GPIO_EMC_07_XBAR1_INOUT09    0x401F8030U, 0x3U, 0x401F8628U, 0x0U, 0x401F8220U
 #define IOMUXC_GPIO_EMC_07_FLEXIO1_FLEXIO07 0x401F8030U, 0x4U, 0, 0, 0x401F8220U
-#define IOMUXC_GPIO_EMC_07_GPIO4_IO07 0x401F8030U, 0x5U, 0, 0, 0x401F8220U
+#define IOMUXC_GPIO_EMC_07_GPIO4_IO07       0x401F8030U, 0x5U, 0, 0, 0x401F8220U
 
-#define IOMUXC_GPIO_EMC_08_SEMC_DM00 0x401F8034U, 0x0U, 0, 0, 0x401F8224U
-#define IOMUXC_GPIO_EMC_08_FLEXPWM2_PWMA01 0x401F8034U, 0x1U, 0x401F847CU, 0x0U, 0x401F8224U
-#define IOMUXC_GPIO_EMC_08_SAI2_RX_DATA 0x401F8034U, 0x2U, 0x401F85B8U, 0x0U, 0x401F8224U
-#define IOMUXC_GPIO_EMC_08_XBAR1_INOUT17 0x401F8034U, 0x3U, 0x401F862CU, 0x0U, 0x401F8224U
+#define IOMUXC_GPIO_EMC_08_SEMC_DM00        0x401F8034U, 0x0U, 0, 0, 0x401F8224U
+#define IOMUXC_GPIO_EMC_08_FLEXPWM2_PWMA01  0x401F8034U, 0x1U, 0x401F847CU, 0x0U, 0x401F8224U
+#define IOMUXC_GPIO_EMC_08_SAI2_RX_DATA     0x401F8034U, 0x2U, 0x401F85B8U, 0x0U, 0x401F8224U
+#define IOMUXC_GPIO_EMC_08_XBAR1_INOUT17    0x401F8034U, 0x3U, 0x401F862CU, 0x0U, 0x401F8224U
 #define IOMUXC_GPIO_EMC_08_FLEXIO1_FLEXIO08 0x401F8034U, 0x4U, 0, 0, 0x401F8224U
-#define IOMUXC_GPIO_EMC_08_GPIO4_IO08 0x401F8034U, 0x5U, 0, 0, 0x401F8224U
+#define IOMUXC_GPIO_EMC_08_GPIO4_IO08       0x401F8034U, 0x5U, 0, 0, 0x401F8224U
 
-#define IOMUXC_GPIO_EMC_09_SEMC_ADDR00 0x401F8038U, 0x0U, 0, 0, 0x401F8228U
-#define IOMUXC_GPIO_EMC_09_FLEXPWM2_PWMB01 0x401F8038U, 0x1U, 0x401F848CU, 0x0U, 0x401F8228U
-#define IOMUXC_GPIO_EMC_09_SAI2_RX_SYNC 0x401F8038U, 0x2U, 0x401F85BCU, 0x0U, 0x401F8228U
-#define IOMUXC_GPIO_EMC_09_FLEXCAN2_TX 0x401F8038U, 0x3U, 0, 0, 0x401F8228U
+#define IOMUXC_GPIO_EMC_09_SEMC_ADDR00      0x401F8038U, 0x0U, 0, 0, 0x401F8228U
+#define IOMUXC_GPIO_EMC_09_FLEXPWM2_PWMB01  0x401F8038U, 0x1U, 0x401F848CU, 0x0U, 0x401F8228U
+#define IOMUXC_GPIO_EMC_09_SAI2_RX_SYNC     0x401F8038U, 0x2U, 0x401F85BCU, 0x0U, 0x401F8228U
+#define IOMUXC_GPIO_EMC_09_FLEXCAN2_TX      0x401F8038U, 0x3U, 0, 0, 0x401F8228U
 #define IOMUXC_GPIO_EMC_09_FLEXIO1_FLEXIO09 0x401F8038U, 0x4U, 0, 0, 0x401F8228U
-#define IOMUXC_GPIO_EMC_09_GPIO4_IO09 0x401F8038U, 0x5U, 0, 0, 0x401F8228U
+#define IOMUXC_GPIO_EMC_09_GPIO4_IO09       0x401F8038U, 0x5U, 0, 0, 0x401F8228U
 
-#define IOMUXC_GPIO_EMC_10_SEMC_ADDR01 0x401F803CU, 0x0U, 0, 0, 0x401F822CU
-#define IOMUXC_GPIO_EMC_10_FLEXPWM2_PWMA02 0x401F803CU, 0x1U, 0x401F8480U, 0x0U, 0x401F822CU
-#define IOMUXC_GPIO_EMC_10_SAI2_RX_BCLK 0x401F803CU, 0x2U, 0x401F85B4U, 0x0U, 0x401F822CU
-#define IOMUXC_GPIO_EMC_10_FLEXCAN2_RX 0x401F803CU, 0x3U, 0x401F8450U, 0x0U, 0x401F822CU
+#define IOMUXC_GPIO_EMC_10_SEMC_ADDR01      0x401F803CU, 0x0U, 0, 0, 0x401F822CU
+#define IOMUXC_GPIO_EMC_10_FLEXPWM2_PWMA02  0x401F803CU, 0x1U, 0x401F8480U, 0x0U, 0x401F822CU
+#define IOMUXC_GPIO_EMC_10_SAI2_RX_BCLK     0x401F803CU, 0x2U, 0x401F85B4U, 0x0U, 0x401F822CU
+#define IOMUXC_GPIO_EMC_10_FLEXCAN2_RX      0x401F803CU, 0x3U, 0x401F8450U, 0x0U, 0x401F822CU
 #define IOMUXC_GPIO_EMC_10_FLEXIO1_FLEXIO10 0x401F803CU, 0x4U, 0, 0, 0x401F822CU
-#define IOMUXC_GPIO_EMC_10_GPIO4_IO10 0x401F803CU, 0x5U, 0, 0, 0x401F822CU
+#define IOMUXC_GPIO_EMC_10_GPIO4_IO10       0x401F803CU, 0x5U, 0, 0, 0x401F822CU
 
-#define IOMUXC_GPIO_EMC_11_SEMC_ADDR02 0x401F8040U, 0x0U, 0, 0, 0x401F8230U
-#define IOMUXC_GPIO_EMC_11_FLEXPWM2_PWMB02 0x401F8040U, 0x1U, 0x401F8490U, 0x0U, 0x401F8230U
-#define IOMUXC_GPIO_EMC_11_LPI2C4_SDA 0x401F8040U, 0x2U, 0x401F84E8U, 0x0U, 0x401F8230U
-#define IOMUXC_GPIO_EMC_11_USDHC2_RESET_B 0x401F8040U, 0x3U, 0, 0, 0x401F8230U
+#define IOMUXC_GPIO_EMC_11_SEMC_ADDR02      0x401F8040U, 0x0U, 0, 0, 0x401F8230U
+#define IOMUXC_GPIO_EMC_11_FLEXPWM2_PWMB02  0x401F8040U, 0x1U, 0x401F8490U, 0x0U, 0x401F8230U
+#define IOMUXC_GPIO_EMC_11_LPI2C4_SDA       0x401F8040U, 0x2U, 0x401F84E8U, 0x0U, 0x401F8230U
+#define IOMUXC_GPIO_EMC_11_USDHC2_RESET_B   0x401F8040U, 0x3U, 0, 0, 0x401F8230U
 #define IOMUXC_GPIO_EMC_11_FLEXIO1_FLEXIO11 0x401F8040U, 0x4U, 0, 0, 0x401F8230U
-#define IOMUXC_GPIO_EMC_11_GPIO4_IO11 0x401F8040U, 0x5U, 0, 0, 0x401F8230U
+#define IOMUXC_GPIO_EMC_11_GPIO4_IO11       0x401F8040U, 0x5U, 0, 0, 0x401F8230U
 
-#define IOMUXC_GPIO_EMC_12_SEMC_ADDR03 0x401F8044U, 0x0U, 0, 0, 0x401F8234U
-#define IOMUXC_GPIO_EMC_12_XBAR1_IN24 0x401F8044U, 0x1U, 0x401F8640U, 0x0U, 0x401F8234U
-#define IOMUXC_GPIO_EMC_12_LPI2C4_SCL 0x401F8044U, 0x2U, 0x401F84E4U, 0x0U, 0x401F8234U
-#define IOMUXC_GPIO_EMC_12_USDHC1_WP 0x401F8044U, 0x3U, 0x401F85D8U, 0x0U, 0x401F8234U
+#define IOMUXC_GPIO_EMC_12_SEMC_ADDR03     0x401F8044U, 0x0U, 0, 0, 0x401F8234U
+#define IOMUXC_GPIO_EMC_12_XBAR1_IN24      0x401F8044U, 0x1U, 0x401F8640U, 0x0U, 0x401F8234U
+#define IOMUXC_GPIO_EMC_12_LPI2C4_SCL      0x401F8044U, 0x2U, 0x401F84E4U, 0x0U, 0x401F8234U
+#define IOMUXC_GPIO_EMC_12_USDHC1_WP       0x401F8044U, 0x3U, 0x401F85D8U, 0x0U, 0x401F8234U
 #define IOMUXC_GPIO_EMC_12_FLEXPWM1_PWMA03 0x401F8044U, 0x4U, 0x401F8454U, 0x1U, 0x401F8234U
-#define IOMUXC_GPIO_EMC_12_GPIO4_IO12 0x401F8044U, 0x5U, 0, 0, 0x401F8234U
+#define IOMUXC_GPIO_EMC_12_GPIO4_IO12      0x401F8044U, 0x5U, 0, 0, 0x401F8234U
 
-#define IOMUXC_GPIO_EMC_13_SEMC_ADDR04 0x401F8048U, 0x0U, 0, 0, 0x401F8238U
-#define IOMUXC_GPIO_EMC_13_XBAR1_IN25 0x401F8048U, 0x1U, 0x401F8650U, 0x1U, 0x401F8238U
-#define IOMUXC_GPIO_EMC_13_LPUART3_TX 0x401F8048U, 0x2U, 0x401F853CU, 0x1U, 0x401F8238U
-#define IOMUXC_GPIO_EMC_13_MQS_RIGHT 0x401F8048U, 0x3U, 0, 0, 0x401F8238U
+#define IOMUXC_GPIO_EMC_13_SEMC_ADDR04     0x401F8048U, 0x0U, 0, 0, 0x401F8238U
+#define IOMUXC_GPIO_EMC_13_XBAR1_IN25      0x401F8048U, 0x1U, 0x401F8650U, 0x1U, 0x401F8238U
+#define IOMUXC_GPIO_EMC_13_LPUART3_TX      0x401F8048U, 0x2U, 0x401F853CU, 0x1U, 0x401F8238U
+#define IOMUXC_GPIO_EMC_13_MQS_RIGHT       0x401F8048U, 0x3U, 0, 0, 0x401F8238U
 #define IOMUXC_GPIO_EMC_13_FLEXPWM1_PWMB03 0x401F8048U, 0x4U, 0x401F8464U, 0x1U, 0x401F8238U
-#define IOMUXC_GPIO_EMC_13_GPIO4_IO13 0x401F8048U, 0x5U, 0, 0, 0x401F8238U
+#define IOMUXC_GPIO_EMC_13_GPIO4_IO13      0x401F8048U, 0x5U, 0, 0, 0x401F8238U
 
-#define IOMUXC_GPIO_EMC_14_SEMC_ADDR05 0x401F804CU, 0x0U, 0, 0, 0x401F823CU
+#define IOMUXC_GPIO_EMC_14_SEMC_ADDR05   0x401F804CU, 0x0U, 0, 0, 0x401F823CU
 #define IOMUXC_GPIO_EMC_14_XBAR1_INOUT19 0x401F804CU, 0x1U, 0x401F8654U, 0x0U, 0x401F823CU
-#define IOMUXC_GPIO_EMC_14_LPUART3_RX 0x401F804CU, 0x2U, 0x401F8538U, 0x1U, 0x401F823CU
-#define IOMUXC_GPIO_EMC_14_MQS_LEFT 0x401F804CU, 0x3U, 0, 0, 0x401F823CU
-#define IOMUXC_GPIO_EMC_14_LPSPI2_PCS1 0x401F804CU, 0x4U, 0, 0, 0x401F823CU
-#define IOMUXC_GPIO_EMC_14_GPIO4_IO14 0x401F804CU, 0x5U, 0, 0, 0x401F823CU
+#define IOMUXC_GPIO_EMC_14_LPUART3_RX    0x401F804CU, 0x2U, 0x401F8538U, 0x1U, 0x401F823CU
+#define IOMUXC_GPIO_EMC_14_MQS_LEFT      0x401F804CU, 0x3U, 0, 0, 0x401F823CU
+#define IOMUXC_GPIO_EMC_14_LPSPI2_PCS1   0x401F804CU, 0x4U, 0, 0, 0x401F823CU
+#define IOMUXC_GPIO_EMC_14_GPIO4_IO14    0x401F804CU, 0x5U, 0, 0, 0x401F823CU
 
-#define IOMUXC_GPIO_EMC_15_SEMC_ADDR06 0x401F8050U, 0x0U, 0, 0, 0x401F8240U
-#define IOMUXC_GPIO_EMC_15_XBAR1_IN20 0x401F8050U, 0x1U, 0x401F8634U, 0x0U, 0x401F8240U
-#define IOMUXC_GPIO_EMC_15_LPUART3_CTS_B 0x401F8050U, 0x2U, 0x401F8534U, 0x0U, 0x401F8240U
-#define IOMUXC_GPIO_EMC_15_SPDIF_OUT 0x401F8050U, 0x3U, 0, 0, 0x401F8240U
+#define IOMUXC_GPIO_EMC_15_SEMC_ADDR06    0x401F8050U, 0x0U, 0, 0, 0x401F8240U
+#define IOMUXC_GPIO_EMC_15_XBAR1_IN20     0x401F8050U, 0x1U, 0x401F8634U, 0x0U, 0x401F8240U
+#define IOMUXC_GPIO_EMC_15_LPUART3_CTS_B  0x401F8050U, 0x2U, 0x401F8534U, 0x0U, 0x401F8240U
+#define IOMUXC_GPIO_EMC_15_SPDIF_OUT      0x401F8050U, 0x3U, 0, 0, 0x401F8240U
 #define IOMUXC_GPIO_EMC_15_QTIMER3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U
-#define IOMUXC_GPIO_EMC_15_GPIO4_IO15 0x401F8050U, 0x5U, 0, 0, 0x401F8240U
+#define IOMUXC_GPIO_EMC_15_GPIO4_IO15     0x401F8050U, 0x5U, 0, 0, 0x401F8240U
 
-#define IOMUXC_GPIO_EMC_16_SEMC_ADDR07 0x401F8054U, 0x0U, 0, 0, 0x401F8244U
-#define IOMUXC_GPIO_EMC_16_XBAR1_IN21 0x401F8054U, 0x1U, 0x401F8658U, 0x0U, 0x401F8244U
-#define IOMUXC_GPIO_EMC_16_LPUART3_RTS_B 0x401F8054U, 0x2U, 0, 0, 0x401F8244U
-#define IOMUXC_GPIO_EMC_16_SPDIF_IN 0x401F8054U, 0x3U, 0x401F85C8U, 0x1U, 0x401F8244U
+#define IOMUXC_GPIO_EMC_16_SEMC_ADDR07    0x401F8054U, 0x0U, 0, 0, 0x401F8244U
+#define IOMUXC_GPIO_EMC_16_XBAR1_IN21     0x401F8054U, 0x1U, 0x401F8658U, 0x0U, 0x401F8244U
+#define IOMUXC_GPIO_EMC_16_LPUART3_RTS_B  0x401F8054U, 0x2U, 0, 0, 0x401F8244U
+#define IOMUXC_GPIO_EMC_16_SPDIF_IN       0x401F8054U, 0x3U, 0x401F85C8U, 0x1U, 0x401F8244U
 #define IOMUXC_GPIO_EMC_16_QTIMER3_TIMER1 0x401F8054U, 0x4U, 0x401F8580U, 0x1U, 0x401F8244U
-#define IOMUXC_GPIO_EMC_16_GPIO4_IO16 0x401F8054U, 0x5U, 0, 0, 0x401F8244U
+#define IOMUXC_GPIO_EMC_16_GPIO4_IO16     0x401F8054U, 0x5U, 0, 0, 0x401F8244U
 
-#define IOMUXC_GPIO_EMC_17_SEMC_ADDR08 0x401F8058U, 0x0U, 0, 0, 0x401F8248U
+#define IOMUXC_GPIO_EMC_17_SEMC_ADDR08     0x401F8058U, 0x0U, 0, 0, 0x401F8248U
 #define IOMUXC_GPIO_EMC_17_FLEXPWM4_PWMA03 0x401F8058U, 0x1U, 0x401F84A0U, 0x0U, 0x401F8248U
-#define IOMUXC_GPIO_EMC_17_LPUART4_CTS_B 0x401F8058U, 0x2U, 0, 0, 0x401F8248U
-#define IOMUXC_GPIO_EMC_17_FLEXCAN1_TX 0x401F8058U, 0x3U, 0, 0, 0x401F8248U
-#define IOMUXC_GPIO_EMC_17_QTIMER3_TIMER2 0x401F8058U, 0x4U, 0x401F8584U, 0x0U, 0x401F8248U
-#define IOMUXC_GPIO_EMC_17_GPIO4_IO17 0x401F8058U, 0x5U, 0, 0, 0x401F8248U
+#define IOMUXC_GPIO_EMC_17_LPUART4_CTS_B   0x401F8058U, 0x2U, 0, 0, 0x401F8248U
+#define IOMUXC_GPIO_EMC_17_FLEXCAN1_TX     0x401F8058U, 0x3U, 0, 0, 0x401F8248U
+#define IOMUXC_GPIO_EMC_17_QTIMER3_TIMER2  0x401F8058U, 0x4U, 0x401F8584U, 0x0U, 0x401F8248U
+#define IOMUXC_GPIO_EMC_17_GPIO4_IO17      0x401F8058U, 0x5U, 0, 0, 0x401F8248U
 
-#define IOMUXC_GPIO_EMC_18_SEMC_ADDR09 0x401F805CU, 0x0U, 0, 0, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_SEMC_ADDR09     0x401F805CU, 0x0U, 0, 0, 0x401F824CU
 #define IOMUXC_GPIO_EMC_18_FLEXPWM4_PWMB03 0x401F805CU, 0x1U, 0, 0, 0x401F824CU
-#define IOMUXC_GPIO_EMC_18_LPUART4_RTS_B 0x401F805CU, 0x2U, 0, 0, 0x401F824CU
-#define IOMUXC_GPIO_EMC_18_FLEXCAN1_RX 0x401F805CU, 0x3U, 0x401F844CU, 0x1U, 0x401F824CU
-#define IOMUXC_GPIO_EMC_18_QTIMER3_TIMER3 0x401F805CU, 0x4U, 0x401F8588U, 0x0U, 0x401F824CU
-#define IOMUXC_GPIO_EMC_18_GPIO4_IO18 0x401F805CU, 0x5U, 0, 0, 0x401F824CU
-#define IOMUXC_GPIO_EMC_18_SNVS_VIO_5_CTL 0x401F805CU, 0x6U, 0, 0, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_LPUART4_RTS_B   0x401F805CU, 0x2U, 0, 0, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_FLEXCAN1_RX     0x401F805CU, 0x3U, 0x401F844CU, 0x1U, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_QTIMER3_TIMER3  0x401F805CU, 0x4U, 0x401F8588U, 0x0U, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_GPIO4_IO18      0x401F805CU, 0x5U, 0, 0, 0x401F824CU
+#define IOMUXC_GPIO_EMC_18_SNVS_VIO_5_CTL  0x401F805CU, 0x6U, 0, 0, 0x401F824CU
 
-#define IOMUXC_GPIO_EMC_19_SEMC_ADDR11 0x401F8060U, 0x0U, 0, 0, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_SEMC_ADDR11     0x401F8060U, 0x0U, 0, 0, 0x401F8250U
 #define IOMUXC_GPIO_EMC_19_FLEXPWM2_PWMA03 0x401F8060U, 0x1U, 0x401F8474U, 0x1U, 0x401F8250U
-#define IOMUXC_GPIO_EMC_19_LPUART4_TX 0x401F8060U, 0x2U, 0x401F8544U, 0x1U, 0x401F8250U
-#define IOMUXC_GPIO_EMC_19_ENET_RDATA01 0x401F8060U, 0x3U, 0x401F8438U, 0x0U, 0x401F8250U
-#define IOMUXC_GPIO_EMC_19_QTIMER2_TIMER0 0x401F8060U, 0x4U, 0x401F856CU, 0x0U, 0x401F8250U
-#define IOMUXC_GPIO_EMC_19_GPIO4_IO19 0x401F8060U, 0x5U, 0, 0, 0x401F8250U
-#define IOMUXC_GPIO_EMC_19_SNVS_VIO_5 0x401F8060U, 0x6U, 0, 0, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_LPUART4_TX      0x401F8060U, 0x2U, 0x401F8544U, 0x1U, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_ENET_RDATA01    0x401F8060U, 0x3U, 0x401F8438U, 0x0U, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_QTIMER2_TIMER0  0x401F8060U, 0x4U, 0x401F856CU, 0x0U, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_GPIO4_IO19      0x401F8060U, 0x5U, 0, 0, 0x401F8250U
+#define IOMUXC_GPIO_EMC_19_SNVS_VIO_5      0x401F8060U, 0x6U, 0, 0, 0x401F8250U
 
-#define IOMUXC_GPIO_EMC_20_SEMC_ADDR12 0x401F8064U, 0x0U, 0, 0, 0x401F8254U
+#define IOMUXC_GPIO_EMC_20_SEMC_ADDR12     0x401F8064U, 0x0U, 0, 0, 0x401F8254U
 #define IOMUXC_GPIO_EMC_20_FLEXPWM2_PWMB03 0x401F8064U, 0x1U, 0x401F8484U, 0x1U, 0x401F8254U
-#define IOMUXC_GPIO_EMC_20_LPUART4_RX 0x401F8064U, 0x2U, 0x401F8540U, 0x1U, 0x401F8254U
-#define IOMUXC_GPIO_EMC_20_ENET_RDATA00 0x401F8064U, 0x3U, 0x401F8434U, 0x0U, 0x401F8254U
-#define IOMUXC_GPIO_EMC_20_QTIMER2_TIMER1 0x401F8064U, 0x4U, 0x401F8570U, 0x0U, 0x401F8254U
-#define IOMUXC_GPIO_EMC_20_GPIO4_IO20 0x401F8064U, 0x5U, 0, 0, 0x401F8254U
+#define IOMUXC_GPIO_EMC_20_LPUART4_RX      0x401F8064U, 0x2U, 0x401F8540U, 0x1U, 0x401F8254U
+#define IOMUXC_GPIO_EMC_20_ENET_RDATA00    0x401F8064U, 0x3U, 0x401F8434U, 0x0U, 0x401F8254U
+#define IOMUXC_GPIO_EMC_20_QTIMER2_TIMER1  0x401F8064U, 0x4U, 0x401F8570U, 0x0U, 0x401F8254U
+#define IOMUXC_GPIO_EMC_20_GPIO4_IO20      0x401F8064U, 0x5U, 0, 0, 0x401F8254U
 
-#define IOMUXC_GPIO_EMC_21_SEMC_BA0 0x401F8068U, 0x0U, 0, 0, 0x401F8258U
+#define IOMUXC_GPIO_EMC_21_SEMC_BA0        0x401F8068U, 0x0U, 0, 0, 0x401F8258U
 #define IOMUXC_GPIO_EMC_21_FLEXPWM3_PWMA03 0x401F8068U, 0x1U, 0, 0, 0x401F8258U
-#define IOMUXC_GPIO_EMC_21_LPI2C3_SDA 0x401F8068U, 0x2U, 0x401F84E0U, 0x0U, 0x401F8258U
-#define IOMUXC_GPIO_EMC_21_ENET_TDATA01 0x401F8068U, 0x3U, 0, 0, 0x401F8258U
-#define IOMUXC_GPIO_EMC_21_QTIMER2_TIMER2 0x401F8068U, 0x4U, 0x401F8574U, 0x0U, 0x401F8258U
-#define IOMUXC_GPIO_EMC_21_GPIO4_IO21 0x401F8068U, 0x5U, 0, 0, 0x401F8258U
+#define IOMUXC_GPIO_EMC_21_LPI2C3_SDA      0x401F8068U, 0x2U, 0x401F84E0U, 0x0U, 0x401F8258U
+#define IOMUXC_GPIO_EMC_21_ENET_TDATA01    0x401F8068U, 0x3U, 0, 0, 0x401F8258U
+#define IOMUXC_GPIO_EMC_21_QTIMER2_TIMER2  0x401F8068U, 0x4U, 0x401F8574U, 0x0U, 0x401F8258U
+#define IOMUXC_GPIO_EMC_21_GPIO4_IO21      0x401F8068U, 0x5U, 0, 0, 0x401F8258U
 
-#define IOMUXC_GPIO_EMC_22_SEMC_BA1 0x401F806CU, 0x0U, 0, 0, 0x401F825CU
+#define IOMUXC_GPIO_EMC_22_SEMC_BA1        0x401F806CU, 0x0U, 0, 0, 0x401F825CU
 #define IOMUXC_GPIO_EMC_22_FLEXPWM3_PWMB03 0x401F806CU, 0x1U, 0, 0, 0x401F825CU
-#define IOMUXC_GPIO_EMC_22_LPI2C3_SCL 0x401F806CU, 0x2U, 0x401F84DCU, 0x0U, 0x401F825CU
-#define IOMUXC_GPIO_EMC_22_ENET_TDATA00 0x401F806CU, 0x3U, 0, 0, 0x401F825CU
-#define IOMUXC_GPIO_EMC_22_QTIMER2_TIMER3 0x401F806CU, 0x4U, 0x401F8578U, 0x0U, 0x401F825CU
-#define IOMUXC_GPIO_EMC_22_GPIO4_IO22 0x401F806CU, 0x5U, 0, 0, 0x401F825CU
+#define IOMUXC_GPIO_EMC_22_LPI2C3_SCL      0x401F806CU, 0x2U, 0x401F84DCU, 0x0U, 0x401F825CU
+#define IOMUXC_GPIO_EMC_22_ENET_TDATA00    0x401F806CU, 0x3U, 0, 0, 0x401F825CU
+#define IOMUXC_GPIO_EMC_22_QTIMER2_TIMER3  0x401F806CU, 0x4U, 0x401F8578U, 0x0U, 0x401F825CU
+#define IOMUXC_GPIO_EMC_22_GPIO4_IO22      0x401F806CU, 0x5U, 0, 0, 0x401F825CU
 
-#define IOMUXC_GPIO_EMC_23_SEMC_ADDR10 0x401F8070U, 0x0U, 0, 0, 0x401F8260U
+#define IOMUXC_GPIO_EMC_23_SEMC_ADDR10     0x401F8070U, 0x0U, 0, 0, 0x401F8260U
 #define IOMUXC_GPIO_EMC_23_FLEXPWM1_PWMA00 0x401F8070U, 0x1U, 0x401F8458U, 0x0U, 0x401F8260U
-#define IOMUXC_GPIO_EMC_23_LPUART5_TX 0x401F8070U, 0x2U, 0x401F854CU, 0x0U, 0x401F8260U
-#define IOMUXC_GPIO_EMC_23_ENET_RX_EN 0x401F8070U, 0x3U, 0x401F843CU, 0x0U, 0x401F8260U
-#define IOMUXC_GPIO_EMC_23_GPT1_CAPTURE2 0x401F8070U, 0x4U, 0, 0, 0x401F8260U
-#define IOMUXC_GPIO_EMC_23_GPIO4_IO23 0x401F8070U, 0x5U, 0, 0, 0x401F8260U
+#define IOMUXC_GPIO_EMC_23_LPUART5_TX      0x401F8070U, 0x2U, 0x401F854CU, 0x0U, 0x401F8260U
+#define IOMUXC_GPIO_EMC_23_ENET_RX_EN      0x401F8070U, 0x3U, 0x401F843CU, 0x0U, 0x401F8260U
+#define IOMUXC_GPIO_EMC_23_GPT1_CAPTURE2   0x401F8070U, 0x4U, 0, 0, 0x401F8260U
+#define IOMUXC_GPIO_EMC_23_GPIO4_IO23      0x401F8070U, 0x5U, 0, 0, 0x401F8260U
 
-#define IOMUXC_GPIO_EMC_24_SEMC_CAS 0x401F8074U, 0x0U, 0, 0, 0x401F8264U
+#define IOMUXC_GPIO_EMC_24_SEMC_CAS        0x401F8074U, 0x0U, 0, 0, 0x401F8264U
 #define IOMUXC_GPIO_EMC_24_FLEXPWM1_PWMB00 0x401F8074U, 0x1U, 0x401F8468U, 0x0U, 0x401F8264U
-#define IOMUXC_GPIO_EMC_24_LPUART5_RX 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U
-#define IOMUXC_GPIO_EMC_24_ENET_TX_EN 0x401F8074U, 0x3U, 0, 0, 0x401F8264U
-#define IOMUXC_GPIO_EMC_24_GPT1_CAPTURE1 0x401F8074U, 0x4U, 0, 0, 0x401F8264U
-#define IOMUXC_GPIO_EMC_24_GPIO4_IO24 0x401F8074U, 0x5U, 0, 0, 0x401F8264U
+#define IOMUXC_GPIO_EMC_24_LPUART5_RX      0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U
+#define IOMUXC_GPIO_EMC_24_ENET_TX_EN      0x401F8074U, 0x3U, 0, 0, 0x401F8264U
+#define IOMUXC_GPIO_EMC_24_GPT1_CAPTURE1   0x401F8074U, 0x4U, 0, 0, 0x401F8264U
+#define IOMUXC_GPIO_EMC_24_GPIO4_IO24      0x401F8074U, 0x5U, 0, 0, 0x401F8264U
 
-#define IOMUXC_GPIO_EMC_25_SEMC_RAS 0x401F8078U, 0x0U, 0, 0, 0x401F8268U
+#define IOMUXC_GPIO_EMC_25_SEMC_RAS        0x401F8078U, 0x0U, 0, 0, 0x401F8268U
 #define IOMUXC_GPIO_EMC_25_FLEXPWM1_PWMA01 0x401F8078U, 0x1U, 0x401F845CU, 0x0U, 0x401F8268U
-#define IOMUXC_GPIO_EMC_25_LPUART6_TX 0x401F8078U, 0x2U, 0x401F8554U, 0x0U, 0x401F8268U
-#define IOMUXC_GPIO_EMC_25_ENET_TX_CLK 0x401F8078U, 0x3U, 0x401F8448U, 0x0U, 0x401F8268U
-#define IOMUXC_GPIO_EMC_25_ENET_REF_CLK 0x401F8078U, 0x4U, 0x401F842CU, 0x0U, 0x401F8268U
-#define IOMUXC_GPIO_EMC_25_GPIO4_IO25 0x401F8078U, 0x5U, 0, 0, 0x401F8268U
+#define IOMUXC_GPIO_EMC_25_LPUART6_TX      0x401F8078U, 0x2U, 0x401F8554U, 0x0U, 0x401F8268U
+#define IOMUXC_GPIO_EMC_25_ENET_TX_CLK     0x401F8078U, 0x3U, 0x401F8448U, 0x0U, 0x401F8268U
+#define IOMUXC_GPIO_EMC_25_ENET_REF_CLK    0x401F8078U, 0x4U, 0x401F842CU, 0x0U, 0x401F8268U
+#define IOMUXC_GPIO_EMC_25_GPIO4_IO25      0x401F8078U, 0x5U, 0, 0, 0x401F8268U
 
-#define IOMUXC_GPIO_EMC_26_SEMC_CLK 0x401F807CU, 0x0U, 0, 0, 0x401F826CU
-#define IOMUXC_GPIO_EMC_26_FLEXPWM1_PWMB01 0x401F807CU, 0x1U, 0x401F846CU, 0x0U, 0x401F826CU
-#define IOMUXC_GPIO_EMC_26_LPUART6_RX 0x401F807CU, 0x2U, 0x401F8550U, 0x0U, 0x401F826CU
-#define IOMUXC_GPIO_EMC_26_ENET_RX_ER 0x401F807CU, 0x3U, 0x401F8440U, 0x0U, 0x401F826CU
+#define IOMUXC_GPIO_EMC_26_SEMC_CLK         0x401F807CU, 0x0U, 0, 0, 0x401F826CU
+#define IOMUXC_GPIO_EMC_26_FLEXPWM1_PWMB01  0x401F807CU, 0x1U, 0x401F846CU, 0x0U, 0x401F826CU
+#define IOMUXC_GPIO_EMC_26_LPUART6_RX       0x401F807CU, 0x2U, 0x401F8550U, 0x0U, 0x401F826CU
+#define IOMUXC_GPIO_EMC_26_ENET_RX_ER       0x401F807CU, 0x3U, 0x401F8440U, 0x0U, 0x401F826CU
 #define IOMUXC_GPIO_EMC_26_FLEXIO1_FLEXIO12 0x401F807CU, 0x4U, 0, 0, 0x401F826CU
-#define IOMUXC_GPIO_EMC_26_GPIO4_IO26 0x401F807CU, 0x5U, 0, 0, 0x401F826CU
+#define IOMUXC_GPIO_EMC_26_GPIO4_IO26       0x401F807CU, 0x5U, 0, 0, 0x401F826CU
 
-#define IOMUXC_GPIO_EMC_27_SEMC_CKE 0x401F8080U, 0x0U, 0, 0, 0x401F8270U
-#define IOMUXC_GPIO_EMC_27_FLEXPWM1_PWMA02 0x401F8080U, 0x1U, 0x401F8460U, 0x0U, 0x401F8270U
-#define IOMUXC_GPIO_EMC_27_LPUART5_RTS_B 0x401F8080U, 0x2U, 0, 0, 0x401F8270U
-#define IOMUXC_GPIO_EMC_27_LPSPI1_SCK 0x401F8080U, 0x3U, 0x401F84F0U, 0x0U, 0x401F8270U
+#define IOMUXC_GPIO_EMC_27_SEMC_CKE         0x401F8080U, 0x0U, 0, 0, 0x401F8270U
+#define IOMUXC_GPIO_EMC_27_FLEXPWM1_PWMA02  0x401F8080U, 0x1U, 0x401F8460U, 0x0U, 0x401F8270U
+#define IOMUXC_GPIO_EMC_27_LPUART5_RTS_B    0x401F8080U, 0x2U, 0, 0, 0x401F8270U
+#define IOMUXC_GPIO_EMC_27_LPSPI1_SCK       0x401F8080U, 0x3U, 0x401F84F0U, 0x0U, 0x401F8270U
 #define IOMUXC_GPIO_EMC_27_FLEXIO1_FLEXIO13 0x401F8080U, 0x4U, 0, 0, 0x401F8270U
-#define IOMUXC_GPIO_EMC_27_GPIO4_IO27 0x401F8080U, 0x5U, 0, 0, 0x401F8270U
+#define IOMUXC_GPIO_EMC_27_GPIO4_IO27       0x401F8080U, 0x5U, 0, 0, 0x401F8270U
 
-#define IOMUXC_GPIO_EMC_28_SEMC_WE 0x401F8084U, 0x0U, 0, 0, 0x401F8274U
-#define IOMUXC_GPIO_EMC_28_FLEXPWM1_PWMB02 0x401F8084U, 0x1U, 0x401F8470U, 0x0U, 0x401F8274U
-#define IOMUXC_GPIO_EMC_28_LPUART5_CTS_B 0x401F8084U, 0x2U, 0, 0, 0x401F8274U
-#define IOMUXC_GPIO_EMC_28_LPSPI1_SDO 0x401F8084U, 0x3U, 0x401F84F8U, 0x0U, 0x401F8274U
+#define IOMUXC_GPIO_EMC_28_SEMC_WE          0x401F8084U, 0x0U, 0, 0, 0x401F8274U
+#define IOMUXC_GPIO_EMC_28_FLEXPWM1_PWMB02  0x401F8084U, 0x1U, 0x401F8470U, 0x0U, 0x401F8274U
+#define IOMUXC_GPIO_EMC_28_LPUART5_CTS_B    0x401F8084U, 0x2U, 0, 0, 0x401F8274U
+#define IOMUXC_GPIO_EMC_28_LPSPI1_SDO       0x401F8084U, 0x3U, 0x401F84F8U, 0x0U, 0x401F8274U
 #define IOMUXC_GPIO_EMC_28_FLEXIO1_FLEXIO14 0x401F8084U, 0x4U, 0, 0, 0x401F8274U
-#define IOMUXC_GPIO_EMC_28_GPIO4_IO28 0x401F8084U, 0x5U, 0, 0, 0x401F8274U
+#define IOMUXC_GPIO_EMC_28_GPIO4_IO28       0x401F8084U, 0x5U, 0, 0, 0x401F8274U
 
-#define IOMUXC_GPIO_EMC_29_SEMC_CS0 0x401F8088U, 0x0U, 0, 0, 0x401F8278U
-#define IOMUXC_GPIO_EMC_29_FLEXPWM3_PWMA00 0x401F8088U, 0x1U, 0, 0, 0x401F8278U
-#define IOMUXC_GPIO_EMC_29_LPUART6_RTS_B 0x401F8088U, 0x2U, 0, 0, 0x401F8278U
-#define IOMUXC_GPIO_EMC_29_LPSPI1_SDI 0x401F8088U, 0x3U, 0x401F84F4U, 0x0U, 0x401F8278U
+#define IOMUXC_GPIO_EMC_29_SEMC_CS0         0x401F8088U, 0x0U, 0, 0, 0x401F8278U
+#define IOMUXC_GPIO_EMC_29_FLEXPWM3_PWMA00  0x401F8088U, 0x1U, 0, 0, 0x401F8278U
+#define IOMUXC_GPIO_EMC_29_LPUART6_RTS_B    0x401F8088U, 0x2U, 0, 0, 0x401F8278U
+#define IOMUXC_GPIO_EMC_29_LPSPI1_SDI       0x401F8088U, 0x3U, 0x401F84F4U, 0x0U, 0x401F8278U
 #define IOMUXC_GPIO_EMC_29_FLEXIO1_FLEXIO15 0x401F8088U, 0x4U, 0, 0, 0x401F8278U
-#define IOMUXC_GPIO_EMC_29_GPIO4_IO29 0x401F8088U, 0x5U, 0, 0, 0x401F8278U
+#define IOMUXC_GPIO_EMC_29_GPIO4_IO29       0x401F8088U, 0x5U, 0, 0, 0x401F8278U
 
-#define IOMUXC_GPIO_EMC_30_SEMC_DATA08 0x401F808CU, 0x0U, 0, 0, 0x401F827CU
+#define IOMUXC_GPIO_EMC_30_SEMC_DATA08     0x401F808CU, 0x0U, 0, 0, 0x401F827CU
 #define IOMUXC_GPIO_EMC_30_FLEXPWM3_PWMB00 0x401F808CU, 0x1U, 0, 0, 0x401F827CU
-#define IOMUXC_GPIO_EMC_30_LPUART6_CTS_B 0x401F808CU, 0x2U, 0, 0, 0x401F827CU
-#define IOMUXC_GPIO_EMC_30_LPSPI1_PCS0 0x401F808CU, 0x3U, 0x401F84ECU, 0x1U, 0x401F827CU
-#define IOMUXC_GPIO_EMC_30_CSI_DATA23 0x401F808CU, 0x4U, 0, 0, 0x401F827CU
-#define IOMUXC_GPIO_EMC_30_GPIO4_IO30 0x401F808CU, 0x5U, 0, 0, 0x401F827CU
+#define IOMUXC_GPIO_EMC_30_LPUART6_CTS_B   0x401F808CU, 0x2U, 0, 0, 0x401F827CU
+#define IOMUXC_GPIO_EMC_30_LPSPI1_PCS0     0x401F808CU, 0x3U, 0x401F84ECU, 0x1U, 0x401F827CU
+#define IOMUXC_GPIO_EMC_30_CSI_DATA23      0x401F808CU, 0x4U, 0, 0, 0x401F827CU
+#define IOMUXC_GPIO_EMC_30_GPIO4_IO30      0x401F808CU, 0x5U, 0, 0, 0x401F827CU
 
-#define IOMUXC_GPIO_EMC_31_SEMC_DATA09 0x401F8090U, 0x0U, 0, 0, 0x401F8280U
+#define IOMUXC_GPIO_EMC_31_SEMC_DATA09     0x401F8090U, 0x0U, 0, 0, 0x401F8280U
 #define IOMUXC_GPIO_EMC_31_FLEXPWM3_PWMA01 0x401F8090U, 0x1U, 0, 0, 0x401F8280U
-#define IOMUXC_GPIO_EMC_31_LPUART7_TX 0x401F8090U, 0x2U, 0x401F855CU, 0x1U, 0x401F8280U
-#define IOMUXC_GPIO_EMC_31_LPSPI1_PCS1 0x401F8090U, 0x3U, 0, 0, 0x401F8280U
-#define IOMUXC_GPIO_EMC_31_CSI_DATA22 0x401F8090U, 0x4U, 0, 0, 0x401F8280U
-#define IOMUXC_GPIO_EMC_31_GPIO4_IO31 0x401F8090U, 0x5U, 0, 0, 0x401F8280U
+#define IOMUXC_GPIO_EMC_31_LPUART7_TX      0x401F8090U, 0x2U, 0x401F855CU, 0x1U, 0x401F8280U
+#define IOMUXC_GPIO_EMC_31_LPSPI1_PCS1     0x401F8090U, 0x3U, 0, 0, 0x401F8280U
+#define IOMUXC_GPIO_EMC_31_CSI_DATA22      0x401F8090U, 0x4U, 0, 0, 0x401F8280U
+#define IOMUXC_GPIO_EMC_31_GPIO4_IO31      0x401F8090U, 0x5U, 0, 0, 0x401F8280U
 
-#define IOMUXC_GPIO_EMC_32_SEMC_DATA10 0x401F8094U, 0x0U, 0, 0, 0x401F8284U
+#define IOMUXC_GPIO_EMC_32_SEMC_DATA10     0x401F8094U, 0x0U, 0, 0, 0x401F8284U
 #define IOMUXC_GPIO_EMC_32_FLEXPWM3_PWMB01 0x401F8094U, 0x1U, 0, 0, 0x401F8284U
-#define IOMUXC_GPIO_EMC_32_LPUART7_RX 0x401F8094U, 0x2U, 0x401F8558U, 0x1U, 0x401F8284U
-#define IOMUXC_GPIO_EMC_32_CCM_PMIC_RDY 0x401F8094U, 0x3U, 0x401F83FCU, 0x4U, 0x401F8284U
-#define IOMUXC_GPIO_EMC_32_CSI_DATA21 0x401F8094U, 0x4U, 0, 0, 0x401F8284U
-#define IOMUXC_GPIO_EMC_32_GPIO3_IO18 0x401F8094U, 0x5U, 0, 0, 0x401F8284U
+#define IOMUXC_GPIO_EMC_32_LPUART7_RX      0x401F8094U, 0x2U, 0x401F8558U, 0x1U, 0x401F8284U
+#define IOMUXC_GPIO_EMC_32_CCM_PMIC_RDY    0x401F8094U, 0x3U, 0x401F83FCU, 0x4U, 0x401F8284U
+#define IOMUXC_GPIO_EMC_32_CSI_DATA21      0x401F8094U, 0x4U, 0, 0, 0x401F8284U
+#define IOMUXC_GPIO_EMC_32_GPIO3_IO18      0x401F8094U, 0x5U, 0, 0, 0x401F8284U
 
-#define IOMUXC_GPIO_EMC_33_SEMC_DATA11 0x401F8098U, 0x0U, 0, 0, 0x401F8288U
+#define IOMUXC_GPIO_EMC_33_SEMC_DATA11     0x401F8098U, 0x0U, 0, 0, 0x401F8288U
 #define IOMUXC_GPIO_EMC_33_FLEXPWM3_PWMA02 0x401F8098U, 0x1U, 0, 0, 0x401F8288U
-#define IOMUXC_GPIO_EMC_33_USDHC1_RESET_B 0x401F8098U, 0x2U, 0, 0, 0x401F8288U
-#define IOMUXC_GPIO_EMC_33_SAI3_RX_DATA 0x401F8098U, 0x3U, 0, 0, 0x401F8288U
-#define IOMUXC_GPIO_EMC_33_CSI_DATA20 0x401F8098U, 0x4U, 0, 0, 0x401F8288U
-#define IOMUXC_GPIO_EMC_33_GPIO3_IO19 0x401F8098U, 0x5U, 0, 0, 0x401F8288U
+#define IOMUXC_GPIO_EMC_33_USDHC1_RESET_B  0x401F8098U, 0x2U, 0, 0, 0x401F8288U
+#define IOMUXC_GPIO_EMC_33_SAI3_RX_DATA    0x401F8098U, 0x3U, 0, 0, 0x401F8288U
+#define IOMUXC_GPIO_EMC_33_CSI_DATA20      0x401F8098U, 0x4U, 0, 0, 0x401F8288U
+#define IOMUXC_GPIO_EMC_33_GPIO3_IO19      0x401F8098U, 0x5U, 0, 0, 0x401F8288U
 
-#define IOMUXC_GPIO_EMC_34_SEMC_DATA12 0x401F809CU, 0x0U, 0, 0, 0x401F828CU
+#define IOMUXC_GPIO_EMC_34_SEMC_DATA12     0x401F809CU, 0x0U, 0, 0, 0x401F828CU
 #define IOMUXC_GPIO_EMC_34_FLEXPWM3_PWMB02 0x401F809CU, 0x1U, 0, 0, 0x401F828CU
-#define IOMUXC_GPIO_EMC_34_USDHC1_VSELECT 0x401F809CU, 0x2U, 0, 0, 0x401F828CU
-#define IOMUXC_GPIO_EMC_34_SAI3_RX_SYNC 0x401F809CU, 0x3U, 0, 0, 0x401F828CU
-#define IOMUXC_GPIO_EMC_34_CSI_DATA19 0x401F809CU, 0x4U, 0, 0, 0x401F828CU
-#define IOMUXC_GPIO_EMC_34_GPIO3_IO20 0x401F809CU, 0x5U, 0, 0, 0x401F828CU
+#define IOMUXC_GPIO_EMC_34_USDHC1_VSELECT  0x401F809CU, 0x2U, 0, 0, 0x401F828CU
+#define IOMUXC_GPIO_EMC_34_SAI3_RX_SYNC    0x401F809CU, 0x3U, 0, 0, 0x401F828CU
+#define IOMUXC_GPIO_EMC_34_CSI_DATA19      0x401F809CU, 0x4U, 0, 0, 0x401F828CU
+#define IOMUXC_GPIO_EMC_34_GPIO3_IO20      0x401F809CU, 0x5U, 0, 0, 0x401F828CU
 
-#define IOMUXC_GPIO_EMC_35_SEMC_DATA13 0x401F80A0U, 0x0U, 0, 0, 0x401F8290U
+#define IOMUXC_GPIO_EMC_35_SEMC_DATA13   0x401F80A0U, 0x0U, 0, 0, 0x401F8290U
 #define IOMUXC_GPIO_EMC_35_XBAR1_INOUT18 0x401F80A0U, 0x1U, 0x401F8630U, 0x0U, 0x401F8290U
 #define IOMUXC_GPIO_EMC_35_GPT1_COMPARE1 0x401F80A0U, 0x2U, 0, 0, 0x401F8290U
-#define IOMUXC_GPIO_EMC_35_SAI3_RX_BCLK 0x401F80A0U, 0x3U, 0, 0, 0x401F8290U
-#define IOMUXC_GPIO_EMC_35_CSI_DATA18 0x401F80A0U, 0x4U, 0, 0, 0x401F8290U
-#define IOMUXC_GPIO_EMC_35_GPIO3_IO21 0x401F80A0U, 0x5U, 0, 0, 0x401F8290U
-#define IOMUXC_GPIO_EMC_35_USDHC1_CD_B 0x401F80A0U, 0x6U, 0x401F85D4U, 0x0U, 0x401F8290U
+#define IOMUXC_GPIO_EMC_35_SAI3_RX_BCLK  0x401F80A0U, 0x3U, 0, 0, 0x401F8290U
+#define IOMUXC_GPIO_EMC_35_CSI_DATA18    0x401F80A0U, 0x4U, 0, 0, 0x401F8290U
+#define IOMUXC_GPIO_EMC_35_GPIO3_IO21    0x401F80A0U, 0x5U, 0, 0, 0x401F8290U
+#define IOMUXC_GPIO_EMC_35_USDHC1_CD_B   0x401F80A0U, 0x6U, 0x401F85D4U, 0x0U, 0x401F8290U
 
-#define IOMUXC_GPIO_EMC_36_SEMC_DATA14 0x401F80A4U, 0x0U, 0, 0, 0x401F8294U
-#define IOMUXC_GPIO_EMC_36_XBAR1_IN22 0x401F80A4U, 0x1U, 0x401F8638U, 0x0U, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_SEMC_DATA14   0x401F80A4U, 0x0U, 0, 0, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_XBAR1_IN22    0x401F80A4U, 0x1U, 0x401F8638U, 0x0U, 0x401F8294U
 #define IOMUXC_GPIO_EMC_36_GPT1_COMPARE2 0x401F80A4U, 0x2U, 0, 0, 0x401F8294U
-#define IOMUXC_GPIO_EMC_36_SAI3_TX_DATA 0x401F80A4U, 0x3U, 0, 0, 0x401F8294U
-#define IOMUXC_GPIO_EMC_36_CSI_DATA17 0x401F80A4U, 0x4U, 0, 0, 0x401F8294U
-#define IOMUXC_GPIO_EMC_36_GPIO3_IO22 0x401F80A4U, 0x5U, 0, 0, 0x401F8294U
-#define IOMUXC_GPIO_EMC_36_USDHC1_WP 0x401F80A4U, 0x6U, 0x401F85D8U, 0x1U, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_SAI3_TX_DATA  0x401F80A4U, 0x3U, 0, 0, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_CSI_DATA17    0x401F80A4U, 0x4U, 0, 0, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_GPIO3_IO22    0x401F80A4U, 0x5U, 0, 0, 0x401F8294U
+#define IOMUXC_GPIO_EMC_36_USDHC1_WP     0x401F80A4U, 0x6U, 0x401F85D8U, 0x1U, 0x401F8294U
 
-#define IOMUXC_GPIO_EMC_37_SEMC_DATA15 0x401F80A8U, 0x0U, 0, 0, 0x401F8298U
-#define IOMUXC_GPIO_EMC_37_XBAR1_IN23 0x401F80A8U, 0x1U, 0x401F863CU, 0x0U, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_SEMC_DATA15   0x401F80A8U, 0x0U, 0, 0, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_XBAR1_IN23    0x401F80A8U, 0x1U, 0x401F863CU, 0x0U, 0x401F8298U
 #define IOMUXC_GPIO_EMC_37_GPT1_COMPARE3 0x401F80A8U, 0x2U, 0, 0, 0x401F8298U
-#define IOMUXC_GPIO_EMC_37_SAI3_MCLK 0x401F80A8U, 0x3U, 0, 0, 0x401F8298U
-#define IOMUXC_GPIO_EMC_37_CSI_DATA16 0x401F80A8U, 0x4U, 0, 0, 0x401F8298U
-#define IOMUXC_GPIO_EMC_37_GPIO3_IO23 0x401F80A8U, 0x5U, 0, 0, 0x401F8298U
-#define IOMUXC_GPIO_EMC_37_USDHC2_WP 0x401F80A8U, 0x6U, 0x401F8608U, 0x0U, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_SAI3_MCLK     0x401F80A8U, 0x3U, 0, 0, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_CSI_DATA16    0x401F80A8U, 0x4U, 0, 0, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_GPIO3_IO23    0x401F80A8U, 0x5U, 0, 0, 0x401F8298U
+#define IOMUXC_GPIO_EMC_37_USDHC2_WP     0x401F80A8U, 0x6U, 0x401F8608U, 0x0U, 0x401F8298U
 
-#define IOMUXC_GPIO_EMC_38_SEMC_DM01 0x401F80ACU, 0x0U, 0, 0, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_SEMC_DM01       0x401F80ACU, 0x0U, 0, 0, 0x401F829CU
 #define IOMUXC_GPIO_EMC_38_FLEXPWM1_PWMA03 0x401F80ACU, 0x1U, 0x401F8454U, 0x2U, 0x401F829CU
-#define IOMUXC_GPIO_EMC_38_LPUART8_TX 0x401F80ACU, 0x2U, 0x401F8564U, 0x2U, 0x401F829CU
-#define IOMUXC_GPIO_EMC_38_SAI3_TX_BCLK 0x401F80ACU, 0x3U, 0, 0, 0x401F829CU
-#define IOMUXC_GPIO_EMC_38_CSI_FIELD 0x401F80ACU, 0x4U, 0, 0, 0x401F829CU
-#define IOMUXC_GPIO_EMC_38_GPIO3_IO24 0x401F80ACU, 0x5U, 0, 0, 0x401F829CU
-#define IOMUXC_GPIO_EMC_38_USDHC2_VSELECT 0x401F80ACU, 0x6U, 0, 0, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_LPUART8_TX      0x401F80ACU, 0x2U, 0x401F8564U, 0x2U, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_SAI3_TX_BCLK    0x401F80ACU, 0x3U, 0, 0, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_CSI_FIELD       0x401F80ACU, 0x4U, 0, 0, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_GPIO3_IO24      0x401F80ACU, 0x5U, 0, 0, 0x401F829CU
+#define IOMUXC_GPIO_EMC_38_USDHC2_VSELECT  0x401F80ACU, 0x6U, 0, 0, 0x401F829CU
 
-#define IOMUXC_GPIO_EMC_39_SEMC_DQS 0x401F80B0U, 0x0U, 0, 0, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_SEMC_DQS        0x401F80B0U, 0x0U, 0, 0, 0x401F82A0U
 #define IOMUXC_GPIO_EMC_39_FLEXPWM1_PWMB03 0x401F80B0U, 0x1U, 0x401F8464U, 0x2U, 0x401F82A0U
-#define IOMUXC_GPIO_EMC_39_LPUART8_RX 0x401F80B0U, 0x2U, 0x401F8560U, 0x2U, 0x401F82A0U
-#define IOMUXC_GPIO_EMC_39_SAI3_TX_SYNC 0x401F80B0U, 0x3U, 0, 0, 0x401F82A0U
-#define IOMUXC_GPIO_EMC_39_WDOG1_WDOG_B 0x401F80B0U, 0x4U, 0, 0, 0x401F82A0U
-#define IOMUXC_GPIO_EMC_39_GPIO3_IO25 0x401F80B0U, 0x5U, 0, 0, 0x401F82A0U
-#define IOMUXC_GPIO_EMC_39_USDHC2_CD_B 0x401F80B0U, 0x6U, 0x401F85E0U, 0x1U, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_LPUART8_RX      0x401F80B0U, 0x2U, 0x401F8560U, 0x2U, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_SAI3_TX_SYNC    0x401F80B0U, 0x3U, 0, 0, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_WDOG1_WDOG_B    0x401F80B0U, 0x4U, 0, 0, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_GPIO3_IO25      0x401F80B0U, 0x5U, 0, 0, 0x401F82A0U
+#define IOMUXC_GPIO_EMC_39_USDHC2_CD_B     0x401F80B0U, 0x6U, 0x401F85E0U, 0x1U, 0x401F82A0U
 
-#define IOMUXC_GPIO_EMC_40_SEMC_RDY 0x401F80B4U, 0x0U, 0, 0, 0x401F82A4U
-#define IOMUXC_GPIO_EMC_40_GPT2_CAPTURE2 0x401F80B4U, 0x1U, 0, 0, 0x401F82A4U
-#define IOMUXC_GPIO_EMC_40_LPSPI1_PCS2 0x401F80B4U, 0x2U, 0, 0, 0x401F82A4U
-#define IOMUXC_GPIO_EMC_40_USB_OTG2_OC 0x401F80B4U, 0x3U, 0x401F85CCU, 0x1U, 0x401F82A4U
-#define IOMUXC_GPIO_EMC_40_ENET_MDC 0x401F80B4U, 0x4U, 0, 0, 0x401F82A4U
-#define IOMUXC_GPIO_EMC_40_GPIO3_IO26 0x401F80B4U, 0x5U, 0, 0, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_SEMC_RDY       0x401F80B4U, 0x0U, 0, 0, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_GPT2_CAPTURE2  0x401F80B4U, 0x1U, 0, 0, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_LPSPI1_PCS2    0x401F80B4U, 0x2U, 0, 0, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_USB_OTG2_OC    0x401F80B4U, 0x3U, 0x401F85CCU, 0x1U, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_ENET_MDC       0x401F80B4U, 0x4U, 0, 0, 0x401F82A4U
+#define IOMUXC_GPIO_EMC_40_GPIO3_IO26     0x401F80B4U, 0x5U, 0, 0, 0x401F82A4U
 #define IOMUXC_GPIO_EMC_40_USDHC2_RESET_B 0x401F80B4U, 0x6U, 0, 0, 0x401F82A4U
 
-#define IOMUXC_GPIO_EMC_41_SEMC_CSX00 0x401F80B8U, 0x0U, 0, 0, 0x401F82A8U
-#define IOMUXC_GPIO_EMC_41_GPT2_CAPTURE1 0x401F80B8U, 0x1U, 0, 0, 0x401F82A8U
-#define IOMUXC_GPIO_EMC_41_LPSPI1_PCS3 0x401F80B8U, 0x2U, 0, 0, 0x401F82A8U
-#define IOMUXC_GPIO_EMC_41_USB_OTG2_PWR 0x401F80B8U, 0x3U, 0, 0, 0x401F82A8U
-#define IOMUXC_GPIO_EMC_41_ENET_MDIO 0x401F80B8U, 0x4U, 0x401F8430U, 0x1U, 0x401F82A8U
-#define IOMUXC_GPIO_EMC_41_GPIO3_IO27 0x401F80B8U, 0x5U, 0, 0, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_SEMC_CSX00     0x401F80B8U, 0x0U, 0, 0, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_GPT2_CAPTURE1  0x401F80B8U, 0x1U, 0, 0, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_LPSPI1_PCS3    0x401F80B8U, 0x2U, 0, 0, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_USB_OTG2_PWR   0x401F80B8U, 0x3U, 0, 0, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_ENET_MDIO      0x401F80B8U, 0x4U, 0x401F8430U, 0x1U, 0x401F82A8U
+#define IOMUXC_GPIO_EMC_41_GPIO3_IO27     0x401F80B8U, 0x5U, 0, 0, 0x401F82A8U
 #define IOMUXC_GPIO_EMC_41_USDHC1_VSELECT 0x401F80B8U, 0x6U, 0, 0, 0x401F82A8U
 
 #define IOMUXC_GPIO_AD_B0_00_FLEXPWM2_PWMA03 0x401F80BCU, 0x0U, 0x401F8474U, 0x2U, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_XBAR1_INOUT14 0x401F80BCU, 0x1U, 0x401F8644U, 0x0U, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_REF_CLK_32K 0x401F80BCU, 0x2U, 0, 0, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_USB_OTG2_ID 0x401F80BCU, 0x3U, 0x401F83F8U, 0x0U, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_LPI2C1_SCLS 0x401F80BCU, 0x4U, 0, 0, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_GPIO1_IO00 0x401F80BCU, 0x5U, 0, 0, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_USDHC1_RESET_B 0x401F80BCU, 0x6U, 0, 0, 0x401F82ACU
-#define IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK 0x401F80BCU, 0x7U, 0x401F8510U, 0x0U, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_XBAR1_INOUT14   0x401F80BCU, 0x1U, 0x401F8644U, 0x0U, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_REF_CLK_32K     0x401F80BCU, 0x2U, 0, 0, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_USB_OTG2_ID     0x401F80BCU, 0x3U, 0x401F83F8U, 0x0U, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_LPI2C1_SCLS     0x401F80BCU, 0x4U, 0, 0, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_GPIO1_IO00      0x401F80BCU, 0x5U, 0, 0, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_USDHC1_RESET_B  0x401F80BCU, 0x6U, 0, 0, 0x401F82ACU
+#define IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK      0x401F80BCU, 0x7U, 0x401F8510U, 0x0U, 0x401F82ACU
 
 #define IOMUXC_GPIO_AD_B0_01_FLEXPWM2_PWMB03 0x401F80C0U, 0x0U, 0x401F8484U, 0x2U, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_XBAR1_INOUT15 0x401F80C0U, 0x1U, 0x401F8648U, 0x0U, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_REF_CLK_24M 0x401F80C0U, 0x2U, 0, 0, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_USB_OTG1_ID 0x401F80C0U, 0x3U, 0x401F83F4U, 0x0U, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_LPI2C1_SDAS 0x401F80C0U, 0x4U, 0, 0, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_GPIO1_IO01 0x401F80C0U, 0x5U, 0, 0, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_EWM_OUT_B 0x401F80C0U, 0x6U, 0, 0, 0x401F82B0U
-#define IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO 0x401F80C0U, 0x7U, 0x401F8518U, 0x0U, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_XBAR1_INOUT15   0x401F80C0U, 0x1U, 0x401F8648U, 0x0U, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_REF_CLK_24M     0x401F80C0U, 0x2U, 0, 0, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_USB_OTG1_ID     0x401F80C0U, 0x3U, 0x401F83F4U, 0x0U, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_LPI2C1_SDAS     0x401F80C0U, 0x4U, 0, 0, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_GPIO1_IO01      0x401F80C0U, 0x5U, 0, 0, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_EWM_OUT_B       0x401F80C0U, 0x6U, 0, 0, 0x401F82B0U
+#define IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO      0x401F80C0U, 0x7U, 0x401F8518U, 0x0U, 0x401F82B0U
 
-#define IOMUXC_GPIO_AD_B0_02_FLEXCAN2_TX 0x401F80C4U, 0x0U, 0, 0, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_XBAR1_INOUT16 0x401F80C4U, 0x1U, 0x401F864CU, 0x0U, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_LPUART6_TX 0x401F80C4U, 0x2U, 0x401F8554U, 0x1U, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_USB_OTG1_PWR 0x401F80C4U, 0x3U, 0, 0, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_FLEXCAN2_TX     0x401F80C4U, 0x0U, 0, 0, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_XBAR1_INOUT16   0x401F80C4U, 0x1U, 0x401F864CU, 0x0U, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_LPUART6_TX      0x401F80C4U, 0x2U, 0x401F8554U, 0x1U, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_USB_OTG1_PWR    0x401F80C4U, 0x3U, 0, 0, 0x401F82B4U
 #define IOMUXC_GPIO_AD_B0_02_FLEXPWM1_PWMX00 0x401F80C4U, 0x4U, 0, 0, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_GPIO1_IO02 0x401F80C4U, 0x5U, 0, 0, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_LPI2C1_HREQ 0x401F80C4U, 0x6U, 0, 0, 0x401F82B4U
-#define IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI 0x401F80C4U, 0x7U, 0x401F8514U, 0x0U, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_GPIO1_IO02      0x401F80C4U, 0x5U, 0, 0, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_LPI2C1_HREQ     0x401F80C4U, 0x6U, 0, 0, 0x401F82B4U
+#define IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI      0x401F80C4U, 0x7U, 0x401F8514U, 0x0U, 0x401F82B4U
 
-#define IOMUXC_GPIO_AD_B0_03_FLEXCAN2_RX 0x401F80C8U, 0x0U, 0x401F8450U, 0x1U, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_XBAR1_INOUT17 0x401F80C8U, 0x1U, 0x401F862CU, 0x1U, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_LPUART6_RX 0x401F80C8U, 0x2U, 0x401F8550U, 0x1U, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_USB_OTG1_OC 0x401F80C8U, 0x3U, 0x401F85D0U, 0x0U, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_FLEXCAN2_RX     0x401F80C8U, 0x0U, 0x401F8450U, 0x1U, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_XBAR1_INOUT17   0x401F80C8U, 0x1U, 0x401F862CU, 0x1U, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_LPUART6_RX      0x401F80C8U, 0x2U, 0x401F8550U, 0x1U, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_USB_OTG1_OC     0x401F80C8U, 0x3U, 0x401F85D0U, 0x0U, 0x401F82B8U
 #define IOMUXC_GPIO_AD_B0_03_FLEXPWM1_PWMX01 0x401F80C8U, 0x4U, 0, 0, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_GPIO1_IO03 0x401F80C8U, 0x5U, 0, 0, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_REF_CLK_24M 0x401F80C8U, 0x6U, 0, 0, 0x401F82B8U
-#define IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0 0x401F80C8U, 0x7U, 0x401F850CU, 0x0U, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_GPIO1_IO03      0x401F80C8U, 0x5U, 0, 0, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_REF_CLK_24M     0x401F80C8U, 0x6U, 0, 0, 0x401F82B8U
+#define IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0     0x401F80C8U, 0x7U, 0x401F850CU, 0x0U, 0x401F82B8U
 
 #define IOMUXC_GPIO_AD_B0_04_SRC_BOOT_MODE00 0x401F80CCU, 0x0U, 0, 0, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_MQS_RIGHT 0x401F80CCU, 0x1U, 0, 0, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_ENET_TX_DATA03 0x401F80CCU, 0x2U, 0, 0, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC 0x401F80CCU, 0x3U, 0x401F85C4U, 0x1U, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_CSI_DATA09 0x401F80CCU, 0x4U, 0x401F841CU, 0x1U, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_GPIO1_IO04 0x401F80CCU, 0x5U, 0, 0, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_PIT_TRIGGER00 0x401F80CCU, 0x6U, 0, 0, 0x401F82BCU
-#define IOMUXC_GPIO_AD_B0_04_LPSPI3_PCS1 0x401F80CCU, 0x7U, 0, 0, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_MQS_RIGHT       0x401F80CCU, 0x1U, 0, 0, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_ENET_TX_DATA03  0x401F80CCU, 0x2U, 0, 0, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC    0x401F80CCU, 0x3U, 0x401F85C4U, 0x1U, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_CSI_DATA09      0x401F80CCU, 0x4U, 0x401F841CU, 0x1U, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_GPIO1_IO04      0x401F80CCU, 0x5U, 0, 0, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_PIT_TRIGGER00   0x401F80CCU, 0x6U, 0, 0, 0x401F82BCU
+#define IOMUXC_GPIO_AD_B0_04_LPSPI3_PCS1     0x401F80CCU, 0x7U, 0, 0, 0x401F82BCU
 
 #define IOMUXC_GPIO_AD_B0_05_SRC_BOOT_MODE01 0x401F80D0U, 0x0U, 0, 0, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_ENET_TX_DATA02 0x401F80D0U, 0x2U, 0, 0, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK 0x401F80D0U, 0x3U, 0x401F85C0U, 0x1U, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_CSI_DATA08 0x401F80D0U, 0x4U, 0x401F8418U, 0x1U, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_GPIO1_IO05 0x401F80D0U, 0x5U, 0, 0, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_XBAR1_INOUT17 0x401F80D0U, 0x6U, 0x401F862CU, 0x2U, 0x401F82C0U
-#define IOMUXC_GPIO_AD_B0_05_LPSPI3_PCS2 0x401F80D0U, 0x7U, 0, 0, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_MQS_LEFT        0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_ENET_TX_DATA02  0x401F80D0U, 0x2U, 0, 0, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK    0x401F80D0U, 0x3U, 0x401F85C0U, 0x1U, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_CSI_DATA08      0x401F80D0U, 0x4U, 0x401F8418U, 0x1U, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_GPIO1_IO05      0x401F80D0U, 0x5U, 0, 0, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_XBAR1_INOUT17   0x401F80D0U, 0x6U, 0x401F862CU, 0x2U, 0x401F82C0U
+#define IOMUXC_GPIO_AD_B0_05_LPSPI3_PCS2     0x401F80D0U, 0x7U, 0, 0, 0x401F82C0U
 
-#define IOMUXC_GPIO_AD_B0_06_JTAG_TMS 0x401F80D4U, 0x0U, 0, 0, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_JTAG_TMS      0x401F80D4U, 0x0U, 0, 0, 0x401F82C4U
 #define IOMUXC_GPIO_AD_B0_06_GPT2_COMPARE1 0x401F80D4U, 0x1U, 0, 0, 0x401F82C4U
-#define IOMUXC_GPIO_AD_B0_06_ENET_RX_CLK 0x401F80D4U, 0x2U, 0, 0, 0x401F82C4U
-#define IOMUXC_GPIO_AD_B0_06_SAI2_RX_BCLK 0x401F80D4U, 0x3U, 0x401F85B4U, 0x1U, 0x401F82C4U
-#define IOMUXC_GPIO_AD_B0_06_CSI_DATA07 0x401F80D4U, 0x4U, 0x401F8414U, 0x1U, 0x401F82C4U
-#define IOMUXC_GPIO_AD_B0_06_GPIO1_IO06 0x401F80D4U, 0x5U, 0, 0, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_ENET_RX_CLK   0x401F80D4U, 0x2U, 0, 0, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_SAI2_RX_BCLK  0x401F80D4U, 0x3U, 0x401F85B4U, 0x1U, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_CSI_DATA07    0x401F80D4U, 0x4U, 0x401F8414U, 0x1U, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_GPIO1_IO06    0x401F80D4U, 0x5U, 0, 0, 0x401F82C4U
 #define IOMUXC_GPIO_AD_B0_06_XBAR1_INOUT18 0x401F80D4U, 0x6U, 0x401F8630U, 0x1U, 0x401F82C4U
-#define IOMUXC_GPIO_AD_B0_06_LPSPI3_PCS3 0x401F80D4U, 0x7U, 0, 0, 0x401F82C4U
+#define IOMUXC_GPIO_AD_B0_06_LPSPI3_PCS3   0x401F80D4U, 0x7U, 0, 0, 0x401F82C4U
 
-#define IOMUXC_GPIO_AD_B0_07_JTAG_TCK 0x401F80D8U, 0x0U, 0, 0, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_GPT2_COMPARE2 0x401F80D8U, 0x1U, 0, 0, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_ENET_TX_ER 0x401F80D8U, 0x2U, 0, 0, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_SAI2_RX_SYNC 0x401F80D8U, 0x3U, 0x401F85BCU, 0x1U, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_CSI_DATA06 0x401F80D8U, 0x4U, 0x401F8410U, 0x1U, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_GPIO1_IO07 0x401F80D8U, 0x5U, 0, 0, 0x401F82C8U
-#define IOMUXC_GPIO_AD_B0_07_XBAR1_INOUT19 0x401F80D8U, 0x6U, 0x401F8654U, 0x1U, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_JTAG_TCK             0x401F80D8U, 0x0U, 0, 0, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_GPT2_COMPARE2        0x401F80D8U, 0x1U, 0, 0, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_ENET_TX_ER           0x401F80D8U, 0x2U, 0, 0, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_SAI2_RX_SYNC         0x401F80D8U, 0x3U, 0x401F85BCU, 0x1U, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_CSI_DATA06           0x401F80D8U, 0x4U, 0x401F8410U, 0x1U, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_GPIO1_IO07           0x401F80D8U, 0x5U, 0, 0, 0x401F82C8U
+#define IOMUXC_GPIO_AD_B0_07_XBAR1_INOUT19        0x401F80D8U, 0x6U, 0x401F8654U, 0x1U, 0x401F82C8U
 #define IOMUXC_GPIO_AD_B0_07_ENET_1588_EVENT3_OUT 0x401F80D8U, 0x7U, 0, 0, 0x401F82C8U
 
-#define IOMUXC_GPIO_AD_B0_08_JTAG_MOD 0x401F80DCU, 0x0U, 0, 0, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_GPT2_COMPARE3 0x401F80DCU, 0x1U, 0, 0, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_ENET_RX_DATA03 0x401F80DCU, 0x2U, 0, 0, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA 0x401F80DCU, 0x3U, 0x401F85B8U, 0x1U, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_CSI_DATA05 0x401F80DCU, 0x4U, 0x401F840CU, 0x1U, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_GPIO1_IO08 0x401F80DCU, 0x5U, 0, 0, 0x401F82CCU
-#define IOMUXC_GPIO_AD_B0_08_XBAR1_IN20 0x401F80DCU, 0x6U, 0x401F8634U, 0x1U, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_JTAG_MOD            0x401F80DCU, 0x0U, 0, 0, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_GPT2_COMPARE3       0x401F80DCU, 0x1U, 0, 0, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_ENET_RX_DATA03      0x401F80DCU, 0x2U, 0, 0, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA        0x401F80DCU, 0x3U, 0x401F85B8U, 0x1U, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_CSI_DATA05          0x401F80DCU, 0x4U, 0x401F840CU, 0x1U, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_GPIO1_IO08          0x401F80DCU, 0x5U, 0, 0, 0x401F82CCU
+#define IOMUXC_GPIO_AD_B0_08_XBAR1_IN20          0x401F80DCU, 0x6U, 0x401F8634U, 0x1U, 0x401F82CCU
 #define IOMUXC_GPIO_AD_B0_08_ENET_1588_EVENT3_IN 0x401F80DCU, 0x7U, 0, 0, 0x401F82CCU
 
-#define IOMUXC_GPIO_AD_B0_09_JTAG_TDI 0x401F80E0U, 0x0U, 0, 0, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_JTAG_TDI        0x401F80E0U, 0x0U, 0, 0, 0x401F82D0U
 #define IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWMA03 0x401F80E0U, 0x1U, 0x401F8474U, 0x3U, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_ENET_RX_DATA02 0x401F80E0U, 0x2U, 0, 0, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA 0x401F80E0U, 0x3U, 0, 0, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_CSI_DATA04 0x401F80E0U, 0x4U, 0x401F8408U, 0x1U, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 0x401F80E0U, 0x5U, 0, 0, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_XBAR1_IN21 0x401F80E0U, 0x6U, 0x401F8658U, 0x1U, 0x401F82D0U
-#define IOMUXC_GPIO_AD_B0_09_GPT2_CLK 0x401F80E0U, 0x7U, 0, 0, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_ENET_RX_DATA02  0x401F80E0U, 0x2U, 0, 0, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA    0x401F80E0U, 0x3U, 0, 0, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_CSI_DATA04      0x401F80E0U, 0x4U, 0x401F8408U, 0x1U, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_GPIO1_IO09      0x401F80E0U, 0x5U, 0, 0, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_XBAR1_IN21      0x401F80E0U, 0x6U, 0x401F8658U, 0x1U, 0x401F82D0U
+#define IOMUXC_GPIO_AD_B0_09_GPT2_CLK        0x401F80E0U, 0x7U, 0, 0, 0x401F82D0U
 
-#define IOMUXC_GPIO_AD_B0_10_JTAG_TDO 0x401F80E4U, 0x0U, 0, 0, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWMA03 0x401F80E4U, 0x1U, 0x401F8454U, 0x3U, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_ENET_CRS 0x401F80E4U, 0x2U, 0, 0, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_SAI2_MCLK 0x401F80E4U, 0x3U, 0x401F85B0U, 0x1U, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_CSI_DATA03 0x401F80E4U, 0x4U, 0x401F8404U, 0x1U, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_GPIO1_IO10 0x401F80E4U, 0x5U, 0, 0, 0x401F82D4U
-#define IOMUXC_GPIO_AD_B0_10_XBAR1_IN22 0x401F80E4U, 0x6U, 0x401F8638U, 0x1U, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_JTAG_TDO             0x401F80E4U, 0x0U, 0, 0, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWMA03      0x401F80E4U, 0x1U, 0x401F8454U, 0x3U, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_ENET_CRS             0x401F80E4U, 0x2U, 0, 0, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_SAI2_MCLK            0x401F80E4U, 0x3U, 0x401F85B0U, 0x1U, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_CSI_DATA03           0x401F80E4U, 0x4U, 0x401F8404U, 0x1U, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_GPIO1_IO10           0x401F80E4U, 0x5U, 0, 0, 0x401F82D4U
+#define IOMUXC_GPIO_AD_B0_10_XBAR1_IN22           0x401F80E4U, 0x6U, 0x401F8638U, 0x1U, 0x401F82D4U
 #define IOMUXC_GPIO_AD_B0_10_ENET_1588_EVENT0_OUT 0x401F80E4U, 0x7U, 0, 0, 0x401F82D4U
 
-#define IOMUXC_GPIO_AD_B0_11_JTAG_TRSTB 0x401F80E8U, 0x0U, 0, 0, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_FLEXPWM1_PWMB03 0x401F80E8U, 0x1U, 0x401F8464U, 0x3U, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_ENET_COL 0x401F80E8U, 0x2U, 0, 0, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_WDOG1_WDOG_B 0x401F80E8U, 0x3U, 0, 0, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_CSI_DATA02 0x401F80E8U, 0x4U, 0x401F8400U, 0x1U, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_GPIO1_IO11 0x401F80E8U, 0x5U, 0, 0, 0x401F82D8U
-#define IOMUXC_GPIO_AD_B0_11_XBAR1_IN23 0x401F80E8U, 0x6U, 0x401F863CU, 0x1U, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_JTAG_TRSTB          0x401F80E8U, 0x0U, 0, 0, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_FLEXPWM1_PWMB03     0x401F80E8U, 0x1U, 0x401F8464U, 0x3U, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_ENET_COL            0x401F80E8U, 0x2U, 0, 0, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_WDOG1_WDOG_B        0x401F80E8U, 0x3U, 0, 0, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_CSI_DATA02          0x401F80E8U, 0x4U, 0x401F8400U, 0x1U, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_GPIO1_IO11          0x401F80E8U, 0x5U, 0, 0, 0x401F82D8U
+#define IOMUXC_GPIO_AD_B0_11_XBAR1_IN23          0x401F80E8U, 0x6U, 0x401F863CU, 0x1U, 0x401F82D8U
 #define IOMUXC_GPIO_AD_B0_11_ENET_1588_EVENT0_IN 0x401F80E8U, 0x7U, 0x401F8444U, 0x1U, 0x401F82D8U
 
-#define IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL 0x401F80ECU, 0x0U, 0x401F84E4U, 0x1U, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_CCM_PMIC_READY 0x401F80ECU, 0x1U, 0x401F83FCU, 0x1U, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_LPUART1_TX 0x401F80ECU, 0x2U, 0, 0, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_WDOG2_WDOG_B 0x401F80ECU, 0x3U, 0, 0, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_FLEXPWM1_PWMX02 0x401F80ECU, 0x4U, 0, 0, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_GPIO1_IO12 0x401F80ECU, 0x5U, 0, 0, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL           0x401F80ECU, 0x0U, 0x401F84E4U, 0x1U, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_CCM_PMIC_READY       0x401F80ECU, 0x1U, 0x401F83FCU, 0x1U, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_LPUART1_TX           0x401F80ECU, 0x2U, 0, 0, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_WDOG2_WDOG_B         0x401F80ECU, 0x3U, 0, 0, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_FLEXPWM1_PWMX02      0x401F80ECU, 0x4U, 0, 0, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_GPIO1_IO12           0x401F80ECU, 0x5U, 0, 0, 0x401F82DCU
 #define IOMUXC_GPIO_AD_B0_12_ENET_1588_EVENT1_OUT 0x401F80ECU, 0x6U, 0, 0, 0x401F82DCU
-#define IOMUXC_GPIO_AD_B0_12_NMI_GLUE_NMI 0x401F80ECU, 0x7U, 0x401F8568U, 0x0U, 0x401F82DCU
+#define IOMUXC_GPIO_AD_B0_12_NMI_GLUE_NMI         0x401F80ECU, 0x7U, 0x401F8568U, 0x0U, 0x401F82DCU
 
-#define IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA 0x401F80F0U, 0x0U, 0x401F84E8U, 0x1U, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_GPT1_CLK 0x401F80F0U, 0x1U, 0, 0, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_LPUART1_RX 0x401F80F0U, 0x2U, 0, 0, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_EWM_OUT_B 0x401F80F0U, 0x3U, 0, 0, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_FLEXPWM1_PWMX03 0x401F80F0U, 0x4U, 0, 0, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_GPIO1_IO13 0x401F80F0U, 0x5U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA          0x401F80F0U, 0x0U, 0x401F84E8U, 0x1U, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_GPT1_CLK            0x401F80F0U, 0x1U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_LPUART1_RX          0x401F80F0U, 0x2U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_EWM_OUT_B           0x401F80F0U, 0x3U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_FLEXPWM1_PWMX03     0x401F80F0U, 0x4U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_GPIO1_IO13          0x401F80F0U, 0x5U, 0, 0, 0x401F82E0U
 #define IOMUXC_GPIO_AD_B0_13_ENET_1588_EVENT1_IN 0x401F80F0U, 0x6U, 0, 0, 0x401F82E0U
-#define IOMUXC_GPIO_AD_B0_13_REF_CLK_24M 0x401F80F0U, 0x7U, 0, 0, 0x401F82E0U
+#define IOMUXC_GPIO_AD_B0_13_REF_CLK_24M         0x401F80F0U, 0x7U, 0, 0, 0x401F82E0U
 
-#define IOMUXC_GPIO_AD_B0_14_USB_OTG2_OC 0x401F80F4U, 0x0U, 0x401F85CCU, 0x0U, 0x401F82E4U
-#define IOMUXC_GPIO_AD_B0_14_XBAR1_IN24 0x401F80F4U, 0x1U, 0x401F8640U, 0x1U, 0x401F82E4U
-#define IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B 0x401F80F4U, 0x2U, 0, 0, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_USB_OTG2_OC          0x401F80F4U, 0x0U, 0x401F85CCU, 0x0U, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_XBAR1_IN24           0x401F80F4U, 0x1U, 0x401F8640U, 0x1U, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B        0x401F80F4U, 0x2U, 0, 0, 0x401F82E4U
 #define IOMUXC_GPIO_AD_B0_14_ENET_1588_EVENT0_OUT 0x401F80F4U, 0x3U, 0, 0, 0x401F82E4U
-#define IOMUXC_GPIO_AD_B0_14_CSI_VSYNC 0x401F80F4U, 0x4U, 0x401F8428U, 0x0U, 0x401F82E4U
-#define IOMUXC_GPIO_AD_B0_14_GPIO1_IO14 0x401F80F4U, 0x5U, 0, 0, 0x401F82E4U
-#define IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX 0x401F80F4U, 0x6U, 0, 0, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_CSI_VSYNC            0x401F80F4U, 0x4U, 0x401F8428U, 0x0U, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_GPIO1_IO14           0x401F80F4U, 0x5U, 0, 0, 0x401F82E4U
+#define IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX          0x401F80F4U, 0x6U, 0, 0, 0x401F82E4U
 
-#define IOMUXC_GPIO_AD_B0_15_USB_OTG2_PWR 0x401F80F8U, 0x0U, 0, 0, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B 0x401F80F8U, 0x2U, 0, 0, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_ENET_1588_EVENT0_IN 0x401F80F8U, 0x3U, 0x401F8444U, 0x0U, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_CSI_HSYNC 0x401F80F8U, 0x4U, 0x401F8420U, 0x0U, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_GPIO1_IO15 0x401F80F8U, 0x5U, 0, 0, 0x401F82E8U
-#define IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX 0x401F80F8U, 0x6U, 0x401F8450U, 0x2U, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_USB_OTG2_PWR         0x401F80F8U, 0x0U, 0, 0, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25           0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B        0x401F80F8U, 0x2U, 0, 0, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_ENET_1588_EVENT0_IN  0x401F80F8U, 0x3U, 0x401F8444U, 0x0U, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_CSI_HSYNC            0x401F80F8U, 0x4U, 0x401F8420U, 0x0U, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_GPIO1_IO15           0x401F80F8U, 0x5U, 0, 0, 0x401F82E8U
+#define IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX          0x401F80F8U, 0x6U, 0x401F8450U, 0x2U, 0x401F82E8U
 #define IOMUXC_GPIO_AD_B0_15_WDOG1_WDOG_RST_B_DEB 0x401F80F8U, 0x7U, 0, 0, 0x401F82E8U
 
-#define IOMUXC_GPIO_AD_B1_00_USB_OTG2_ID 0x401F80FCU, 0x0U, 0x401F83F8U, 0x1U, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_USB_OTG2_ID    0x401F80FCU, 0x0U, 0x401F83F8U, 0x1U, 0x401F82ECU
 #define IOMUXC_GPIO_AD_B1_00_QTIMER3_TIMER0 0x401F80FCU, 0x1U, 0x401F857CU, 0x1U, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_LPUART2_CTS_B 0x401F80FCU, 0x2U, 0, 0, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL 0x401F80FCU, 0x3U, 0x401F84CCU, 0x1U, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_WDOG1_B 0x401F80FCU, 0x4U, 0, 0, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_GPIO1_IO16 0x401F80FCU, 0x5U, 0, 0, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_USDHC1_WP 0x401F80FCU, 0x6U, 0x401F85D8U, 0x2U, 0x401F82ECU
-#define IOMUXC_GPIO_AD_B1_00_KPP_ROW07 0x401F80FCU, 0x7U, 0, 0, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_LPUART2_CTS_B  0x401F80FCU, 0x2U, 0, 0, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL     0x401F80FCU, 0x3U, 0x401F84CCU, 0x1U, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_WDOG1_B        0x401F80FCU, 0x4U, 0, 0, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_GPIO1_IO16     0x401F80FCU, 0x5U, 0, 0, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_USDHC1_WP      0x401F80FCU, 0x6U, 0x401F85D8U, 0x2U, 0x401F82ECU
+#define IOMUXC_GPIO_AD_B1_00_KPP_ROW07      0x401F80FCU, 0x7U, 0, 0, 0x401F82ECU
 
-#define IOMUXC_GPIO_AD_B1_01_USB_OTG1_PWR 0x401F8100U, 0x0U, 0, 0, 0x401F82F0U
+#define IOMUXC_GPIO_AD_B1_01_USB_OTG1_PWR   0x401F8100U, 0x0U, 0, 0, 0x401F82F0U
 #define IOMUXC_GPIO_AD_B1_01_QTIMER3_TIMER1 0x401F8100U, 0x1U, 0x401F8580U, 0x0U, 0x401F82F0U
-#define IOMUXC_GPIO_AD_B1_01_LPUART2_RTS_B 0x401F8100U, 0x2U, 0, 0, 0x401F82F0U
-#define IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA 0x401F8100U, 0x3U, 0x401F84D0U, 0x1U, 0x401F82F0U
+#define IOMUXC_GPIO_AD_B1_01_LPUART2_RTS_B  0x401F8100U, 0x2U, 0, 0, 0x401F82F0U
+#define IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA     0x401F8100U, 0x3U, 0x401F84D0U, 0x1U, 0x401F82F0U
 #define IOMUXC_GPIO_AD_B1_01_CCM_PMIC_READY 0x401F8100U, 0x4U, 0x401F83FCU, 0x2U, 0x401F82F0U
-#define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U
+#define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17     0x401F8100U, 0x5U, 0, 0, 0x401F82F0U
 #define IOMUXC_GPIO_AD_B1_01_USDHC1_VSELECT 0x401F8100U, 0x6U, 0, 0, 0x401F82F0U
-#define IOMUXC_GPIO_AD_B1_01_KPP_COL07 0x401F8100U, 0x7U, 0, 0, 0x401F82F0U
+#define IOMUXC_GPIO_AD_B1_01_KPP_COL07      0x401F8100U, 0x7U, 0, 0, 0x401F82F0U
 
-#define IOMUXC_GPIO_AD_B1_02_USB_OTG1_ID 0x401F8104U, 0x0U, 0x401F83F4U, 0x1U, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_QTIMER3_TIMER2 0x401F8104U, 0x1U, 0x401F8584U, 0x1U, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_LPUART2_TX 0x401F8104U, 0x2U, 0x401F8530U, 0x1U, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_SPDIF_OUT 0x401F8104U, 0x3U, 0, 0, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_USB_OTG1_ID          0x401F8104U, 0x0U, 0x401F83F4U, 0x1U, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_QTIMER3_TIMER2       0x401F8104U, 0x1U, 0x401F8584U, 0x1U, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_LPUART2_TX           0x401F8104U, 0x2U, 0x401F8530U, 0x1U, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_SPDIF_OUT            0x401F8104U, 0x3U, 0, 0, 0x401F82F4U
 #define IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT 0x401F8104U, 0x4U, 0, 0, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_GPIO1_IO18 0x401F8104U, 0x5U, 0, 0, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_USDHC1_CD_B 0x401F8104U, 0x6U, 0x401F85D4U, 0x1U, 0x401F82F4U
-#define IOMUXC_GPIO_AD_B1_02_KPP_ROW06 0x401F8104U, 0x7U, 0, 0, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_GPIO1_IO18           0x401F8104U, 0x5U, 0, 0, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_USDHC1_CD_B          0x401F8104U, 0x6U, 0x401F85D4U, 0x1U, 0x401F82F4U
+#define IOMUXC_GPIO_AD_B1_02_KPP_ROW06            0x401F8104U, 0x7U, 0, 0, 0x401F82F4U
 
-#define IOMUXC_GPIO_AD_B1_03_USB_OTG1_OC 0x401F8108U, 0x0U, 0x401F85D0U, 0x1U, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_QTIMER3_TIMER3 0x401F8108U, 0x1U, 0x401F8588U, 0x1U, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_LPUART2_RX 0x401F8108U, 0x2U, 0x401F852CU, 0x1U, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_SPDIF_IN 0x401F8108U, 0x3U, 0x401F85C8U, 0x0U, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_USB_OTG1_OC         0x401F8108U, 0x0U, 0x401F85D0U, 0x1U, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_QTIMER3_TIMER3      0x401F8108U, 0x1U, 0x401F8588U, 0x1U, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_LPUART2_RX          0x401F8108U, 0x2U, 0x401F852CU, 0x1U, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_SPDIF_IN            0x401F8108U, 0x3U, 0x401F85C8U, 0x0U, 0x401F82F8U
 #define IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN 0x401F8108U, 0x4U, 0, 0, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_GPIO1_IO19 0x401F8108U, 0x5U, 0, 0, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_USDHC2_CD_B 0x401F8108U, 0x6U, 0x401F85E0U, 0x0U, 0x401F82F8U
-#define IOMUXC_GPIO_AD_B1_03_KPP_COL06 0x401F8108U, 0x7U, 0, 0, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_GPIO1_IO19          0x401F8108U, 0x5U, 0, 0, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_USDHC2_CD_B         0x401F8108U, 0x6U, 0x401F85E0U, 0x0U, 0x401F82F8U
+#define IOMUXC_GPIO_AD_B1_03_KPP_COL06           0x401F8108U, 0x7U, 0, 0, 0x401F82F8U
 
 #define IOMUXC_GPIO_AD_B1_04_FLEXSPIB_DATA03 0x401F810CU, 0x0U, 0x401F84C4U, 0x1U, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_ENET_MDC 0x401F810CU, 0x1U, 0, 0, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_LPUART3_CTS_B 0x401F810CU, 0x2U, 0x401F8534U, 0x1U, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_SPDIF_SR_CLK 0x401F810CU, 0x3U, 0, 0, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK 0x401F810CU, 0x4U, 0x401F8424U, 0x0U, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_GPIO1_IO20 0x401F810CU, 0x5U, 0, 0, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_USDHC2_DATA0 0x401F810CU, 0x6U, 0x401F85E8U, 0x1U, 0x401F82FCU
-#define IOMUXC_GPIO_AD_B1_04_KPP_ROW05 0x401F810CU, 0x7U, 0, 0, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_ENET_MDC        0x401F810CU, 0x1U, 0, 0, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_LPUART3_CTS_B   0x401F810CU, 0x2U, 0x401F8534U, 0x1U, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_SPDIF_SR_CLK    0x401F810CU, 0x3U, 0, 0, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK      0x401F810CU, 0x4U, 0x401F8424U, 0x0U, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_GPIO1_IO20      0x401F810CU, 0x5U, 0, 0, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_USDHC2_DATA0    0x401F810CU, 0x6U, 0x401F85E8U, 0x1U, 0x401F82FCU
+#define IOMUXC_GPIO_AD_B1_04_KPP_ROW05       0x401F810CU, 0x7U, 0, 0, 0x401F82FCU
 
 #define IOMUXC_GPIO_AD_B1_05_FLEXSPIB_DATA02 0x401F8110U, 0x0U, 0x401F84C0U, 0x1U, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_ENET_MDIO 0x401F8110U, 0x1U, 0x401F8430U, 0x0U, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_LPUART3_RTS_B 0x401F8110U, 0x2U, 0, 0, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_SPDIF_OUT 0x401F8110U, 0x3U, 0, 0, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_CSI_MCLK 0x401F8110U, 0x4U, 0, 0, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_GPIO1_IO21 0x401F8110U, 0x5U, 0, 0, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_USDHC2_DATA1 0x401F8110U, 0x6U, 0x401F85ECU, 0x1U, 0x401F8300U
-#define IOMUXC_GPIO_AD_B1_05_KPP_COL05 0x401F8110U, 0x7U, 0, 0, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_ENET_MDIO       0x401F8110U, 0x1U, 0x401F8430U, 0x0U, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_LPUART3_RTS_B   0x401F8110U, 0x2U, 0, 0, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_SPDIF_OUT       0x401F8110U, 0x3U, 0, 0, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_CSI_MCLK        0x401F8110U, 0x4U, 0, 0, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_GPIO1_IO21      0x401F8110U, 0x5U, 0, 0, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_USDHC2_DATA1    0x401F8110U, 0x6U, 0x401F85ECU, 0x1U, 0x401F8300U
+#define IOMUXC_GPIO_AD_B1_05_KPP_COL05       0x401F8110U, 0x7U, 0, 0, 0x401F8300U
 
 #define IOMUXC_GPIO_AD_B1_06_FLEXSPIB_DATA01 0x401F8114U, 0x0U, 0x401F84BCU, 0x1U, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA 0x401F8114U, 0x1U, 0x401F84E0U, 0x2U, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_LPUART3_TX 0x401F8114U, 0x2U, 0x401F853CU, 0x0U, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_SPDIF_LOCK 0x401F8114U, 0x3U, 0, 0, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_CSI_VSYNC 0x401F8114U, 0x4U, 0x401F8428U, 0x1U, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_GPIO1_IO22 0x401F8114U, 0x5U, 0, 0, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_USDHC2_DATA2 0x401F8114U, 0x6U, 0x401F85F0U, 0x1U, 0x401F8304U
-#define IOMUXC_GPIO_AD_B1_06_KPP_ROW04 0x401F8114U, 0x7U, 0, 0, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA      0x401F8114U, 0x1U, 0x401F84E0U, 0x2U, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_LPUART3_TX      0x401F8114U, 0x2U, 0x401F853CU, 0x0U, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_SPDIF_LOCK      0x401F8114U, 0x3U, 0, 0, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_CSI_VSYNC       0x401F8114U, 0x4U, 0x401F8428U, 0x1U, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_GPIO1_IO22      0x401F8114U, 0x5U, 0, 0, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_USDHC2_DATA2    0x401F8114U, 0x6U, 0x401F85F0U, 0x1U, 0x401F8304U
+#define IOMUXC_GPIO_AD_B1_06_KPP_ROW04       0x401F8114U, 0x7U, 0, 0, 0x401F8304U
 
 #define IOMUXC_GPIO_AD_B1_07_FLEXSPIB_DATA00 0x401F8118U, 0x0U, 0x401F84B8U, 0x1U, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL 0x401F8118U, 0x1U, 0x401F84DCU, 0x2U, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_LPUART3_RX 0x401F8118U, 0x2U, 0x401F8538U, 0x0U, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_SPDIF_EXT_CLK 0x401F8118U, 0x3U, 0, 0, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_CSI_HSYNC 0x401F8118U, 0x4U, 0x401F8420U, 0x1U, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_GPIO1_IO23 0x401F8118U, 0x5U, 0, 0, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_USDHC2_DATA3 0x401F8118U, 0x6U, 0x401F85F4U, 0x1U, 0x401F8308U
-#define IOMUXC_GPIO_AD_B1_07_KPP_COL04 0x401F8118U, 0x7U, 0, 0, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL      0x401F8118U, 0x1U, 0x401F84DCU, 0x2U, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_LPUART3_RX      0x401F8118U, 0x2U, 0x401F8538U, 0x0U, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_SPDIF_EXT_CLK   0x401F8118U, 0x3U, 0, 0, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_CSI_HSYNC       0x401F8118U, 0x4U, 0x401F8420U, 0x1U, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_GPIO1_IO23      0x401F8118U, 0x5U, 0, 0, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_USDHC2_DATA3    0x401F8118U, 0x6U, 0x401F85F4U, 0x1U, 0x401F8308U
+#define IOMUXC_GPIO_AD_B1_07_KPP_COL04       0x401F8118U, 0x7U, 0, 0, 0x401F8308U
 
-#define IOMUXC_GPIO_AD_B1_08_FLEXSPIA_SS1_B 0x401F811CU, 0x0U, 0, 0, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_FLEXSPIA_SS1_B  0x401F811CU, 0x0U, 0, 0, 0x401F830CU
 #define IOMUXC_GPIO_AD_B1_08_FLEXPWM4_PWMA00 0x401F811CU, 0x1U, 0x401F8494U, 0x1U, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_FLEXCAN1_TX 0x401F811CU, 0x2U, 0, 0, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_CCM_PMIC_READY 0x401F811CU, 0x3U, 0x401F83FCU, 0x3U, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_CSI_DATA09 0x401F811CU, 0x4U, 0x401F841CU, 0x0U, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_GPIO1_IO24 0x401F811CU, 0x5U, 0, 0, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_USDHC2_CMD 0x401F811CU, 0x6U, 0x401F85E4U, 0x1U, 0x401F830CU
-#define IOMUXC_GPIO_AD_B1_08_KPP_ROW03 0x401F811CU, 0x7U, 0, 0, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_FLEXCAN1_TX     0x401F811CU, 0x2U, 0, 0, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_CCM_PMIC_READY  0x401F811CU, 0x3U, 0x401F83FCU, 0x3U, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_CSI_DATA09      0x401F811CU, 0x4U, 0x401F841CU, 0x0U, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_GPIO1_IO24      0x401F811CU, 0x5U, 0, 0, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_USDHC2_CMD      0x401F811CU, 0x6U, 0x401F85E4U, 0x1U, 0x401F830CU
+#define IOMUXC_GPIO_AD_B1_08_KPP_ROW03       0x401F811CU, 0x7U, 0, 0, 0x401F830CU
 
-#define IOMUXC_GPIO_AD_B1_09_FLEXSPIA_DQS 0x401F8120U, 0x0U, 0x401F84A4U, 0x1U, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_FLEXSPIA_DQS    0x401F8120U, 0x0U, 0x401F84A4U, 0x1U, 0x401F8310U
 #define IOMUXC_GPIO_AD_B1_09_FLEXPWM4_PWMA01 0x401F8120U, 0x1U, 0x401F8498U, 0x1U, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_FLEXCAN1_RX 0x401F8120U, 0x2U, 0x401F844CU, 0x2U, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_SAI1_MCLK 0x401F8120U, 0x3U, 0x401F858CU, 0x1U, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_CSI_DATA08 0x401F8120U, 0x4U, 0x401F8418U, 0x0U, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_GPIO1_IO25 0x401F8120U, 0x5U, 0, 0, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_USDHC2_CLK 0x401F8120U, 0x6U, 0x401F85DCU, 0x1U, 0x401F8310U
-#define IOMUXC_GPIO_AD_B1_09_KPP_COL03 0x401F8120U, 0x7U, 0, 0, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_FLEXCAN1_RX     0x401F8120U, 0x2U, 0x401F844CU, 0x2U, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_SAI1_MCLK       0x401F8120U, 0x3U, 0x401F858CU, 0x1U, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_CSI_DATA08      0x401F8120U, 0x4U, 0x401F8418U, 0x0U, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_GPIO1_IO25      0x401F8120U, 0x5U, 0, 0, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_USDHC2_CLK      0x401F8120U, 0x6U, 0x401F85DCU, 0x1U, 0x401F8310U
+#define IOMUXC_GPIO_AD_B1_09_KPP_COL03       0x401F8120U, 0x7U, 0, 0, 0x401F8310U
 
 #define IOMUXC_GPIO_AD_B1_10_FLEXSPIA_DATA03 0x401F8124U, 0x0U, 0x401F84B4U, 0x1U, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_WDOG1_B 0x401F8124U, 0x1U, 0, 0, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_LPUART8_TX 0x401F8124U, 0x2U, 0x401F8564U, 0x1U, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC 0x401F8124U, 0x3U, 0x401F85A4U, 0x1U, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_CSI_DATA07 0x401F8124U, 0x4U, 0x401F8414U, 0x0U, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 0x401F8124U, 0x5U, 0, 0, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_USDHC2_WP 0x401F8124U, 0x6U, 0x401F8608U, 0x1U, 0x401F8314U
-#define IOMUXC_GPIO_AD_B1_10_KPP_ROW02 0x401F8124U, 0x7U, 0, 0, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_WDOG1_B         0x401F8124U, 0x1U, 0, 0, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_LPUART8_TX      0x401F8124U, 0x2U, 0x401F8564U, 0x1U, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC    0x401F8124U, 0x3U, 0x401F85A4U, 0x1U, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_CSI_DATA07      0x401F8124U, 0x4U, 0x401F8414U, 0x0U, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_GPIO1_IO26      0x401F8124U, 0x5U, 0, 0, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_USDHC2_WP       0x401F8124U, 0x6U, 0x401F8608U, 0x1U, 0x401F8314U
+#define IOMUXC_GPIO_AD_B1_10_KPP_ROW02       0x401F8124U, 0x7U, 0, 0, 0x401F8314U
 
 #define IOMUXC_GPIO_AD_B1_11_FLEXSPIA_DATA02 0x401F8128U, 0x0U, 0x401F84B0U, 0x1U, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_EWM_OUT_B 0x401F8128U, 0x1U, 0, 0, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_LPUART8_RX 0x401F8128U, 0x2U, 0x401F8560U, 0x1U, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK 0x401F8128U, 0x3U, 0x401F8590U, 0x1U, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_CSI_DATA06 0x401F8128U, 0x4U, 0x401F8410U, 0x0U, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_GPIO1_IO27 0x401F8128U, 0x5U, 0, 0, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_USDHC2_RESET_B 0x401F8128U, 0x6U, 0, 0, 0x401F8318U
-#define IOMUXC_GPIO_AD_B1_11_KPP_COL02 0x401F8128U, 0x7U, 0, 0, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_EWM_OUT_B       0x401F8128U, 0x1U, 0, 0, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_LPUART8_RX      0x401F8128U, 0x2U, 0x401F8560U, 0x1U, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK    0x401F8128U, 0x3U, 0x401F8590U, 0x1U, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_CSI_DATA06      0x401F8128U, 0x4U, 0x401F8410U, 0x0U, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_GPIO1_IO27      0x401F8128U, 0x5U, 0, 0, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_USDHC2_RESET_B  0x401F8128U, 0x6U, 0, 0, 0x401F8318U
+#define IOMUXC_GPIO_AD_B1_11_KPP_COL02       0x401F8128U, 0x7U, 0, 0, 0x401F8318U
 
 #define IOMUXC_GPIO_AD_B1_12_FLEXSPIA_DATA01 0x401F812CU, 0x0U, 0x401F84ACU, 0x1U, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_ACMP_OUT00 0x401F812CU, 0x1U, 0, 0, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_LPSPI3_PCS0 0x401F812CU, 0x2U, 0x401F850CU, 0x1U, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00 0x401F812CU, 0x3U, 0x401F8594U, 0x1U, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_CSI_DATA05 0x401F812CU, 0x4U, 0x401F840CU, 0x0U, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_GPIO1_IO28 0x401F812CU, 0x5U, 0, 0, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_USDHC2_DATA4 0x401F812CU, 0x6U, 0x401F85F8U, 0x1U, 0x401F831CU
-#define IOMUXC_GPIO_AD_B1_12_KPP_ROW01 0x401F812CU, 0x7U, 0, 0, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_ACMP_OUT00      0x401F812CU, 0x1U, 0, 0, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_LPSPI3_PCS0     0x401F812CU, 0x2U, 0x401F850CU, 0x1U, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00  0x401F812CU, 0x3U, 0x401F8594U, 0x1U, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_CSI_DATA05      0x401F812CU, 0x4U, 0x401F840CU, 0x0U, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_GPIO1_IO28      0x401F812CU, 0x5U, 0, 0, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_USDHC2_DATA4    0x401F812CU, 0x6U, 0x401F85F8U, 0x1U, 0x401F831CU
+#define IOMUXC_GPIO_AD_B1_12_KPP_ROW01       0x401F812CU, 0x7U, 0, 0, 0x401F831CU
 
 #define IOMUXC_GPIO_AD_B1_13_FLEXSPIA_DATA00 0x401F8130U, 0x0U, 0x401F84A8U, 0x1U, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_ACMP_OUT01 0x401F8130U, 0x1U, 0, 0, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI 0x401F8130U, 0x2U, 0x401F8514U, 0x1U, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00 0x401F8130U, 0x3U, 0, 0, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_CSI_DATA04 0x401F8130U, 0x4U, 0x401F8408U, 0x0U, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_GPIO1_IO29 0x401F8130U, 0x5U, 0, 0, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_USDHC2_DATA5 0x401F8130U, 0x6U, 0x401F85FCU, 0x1U, 0x401F8320U
-#define IOMUXC_GPIO_AD_B1_13_KPP_COL01 0x401F8130U, 0x7U, 0, 0, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_ACMP_OUT01      0x401F8130U, 0x1U, 0, 0, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI      0x401F8130U, 0x2U, 0x401F8514U, 0x1U, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00  0x401F8130U, 0x3U, 0, 0, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_CSI_DATA04      0x401F8130U, 0x4U, 0x401F8408U, 0x0U, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_GPIO1_IO29      0x401F8130U, 0x5U, 0, 0, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_USDHC2_DATA5    0x401F8130U, 0x6U, 0x401F85FCU, 0x1U, 0x401F8320U
+#define IOMUXC_GPIO_AD_B1_13_KPP_COL01       0x401F8130U, 0x7U, 0, 0, 0x401F8320U
 
 #define IOMUXC_GPIO_AD_B1_14_FLEXSPIA_SCLK 0x401F8134U, 0x0U, 0x401F84C8U, 0x1U, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_ACMP_OUT02 0x401F8134U, 0x1U, 0, 0, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO 0x401F8134U, 0x2U, 0x401F8518U, 0x1U, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK 0x401F8134U, 0x3U, 0x401F85A8U, 0x1U, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_CSI_DATA03 0x401F8134U, 0x4U, 0x401F8404U, 0x0U, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_GPIO1_IO30 0x401F8134U, 0x5U, 0, 0, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_USDHC2_DATA6 0x401F8134U, 0x6U, 0x401F8600U, 0x1U, 0x401F8324U
-#define IOMUXC_GPIO_AD_B1_14_KPP_ROW00 0x401F8134U, 0x7U, 0, 0, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_ACMP_OUT02    0x401F8134U, 0x1U, 0, 0, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO    0x401F8134U, 0x2U, 0x401F8518U, 0x1U, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK  0x401F8134U, 0x3U, 0x401F85A8U, 0x1U, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_CSI_DATA03    0x401F8134U, 0x4U, 0x401F8404U, 0x0U, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_GPIO1_IO30    0x401F8134U, 0x5U, 0, 0, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_USDHC2_DATA6  0x401F8134U, 0x6U, 0x401F8600U, 0x1U, 0x401F8324U
+#define IOMUXC_GPIO_AD_B1_14_KPP_ROW00     0x401F8134U, 0x7U, 0, 0, 0x401F8324U
 
 #define IOMUXC_GPIO_AD_B1_15_FLEXSPIA_SS0_B 0x401F8138U, 0x0U, 0, 0, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_ACMP_OUT03 0x401F8138U, 0x1U, 0, 0, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK 0x401F8138U, 0x2U, 0, 0, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC 0x401F8138U, 0x3U, 0x401F85ACU, 0x1U, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_CSI_DATA02 0x401F8138U, 0x4U, 0x401F8400U, 0x0U, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_GPIO1_IO31 0x401F8138U, 0x5U, 0, 0, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_USDHC2_DATA7 0x401F8138U, 0x6U, 0x401F8604U, 0x1U, 0x401F8328U
-#define IOMUXC_GPIO_AD_B1_15_KPP_COL00 0x401F8138U, 0x7U, 0, 0, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_ACMP_OUT03     0x401F8138U, 0x1U, 0, 0, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK     0x401F8138U, 0x2U, 0, 0, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC   0x401F8138U, 0x3U, 0x401F85ACU, 0x1U, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_CSI_DATA02     0x401F8138U, 0x4U, 0x401F8400U, 0x0U, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_GPIO1_IO31     0x401F8138U, 0x5U, 0, 0, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_USDHC2_DATA7   0x401F8138U, 0x6U, 0x401F8604U, 0x1U, 0x401F8328U
+#define IOMUXC_GPIO_AD_B1_15_KPP_COL00      0x401F8138U, 0x7U, 0, 0, 0x401F8328U
 
-#define IOMUXC_GPIO_B0_00_LCD_CLK 0x401F813CU, 0x0U, 0, 0, 0x401F832CU
-#define IOMUXC_GPIO_B0_00_QTIMER1_TIMER0 0x401F813CU, 0x1U, 0, 0, 0x401F832CU
-#define IOMUXC_GPIO_B0_00_MQS_RIGHT 0x401F813CU, 0x2U, 0, 0, 0x401F832CU
-#define IOMUXC_GPIO_B0_00_LPSPI4_PCS0 0x401F813CU, 0x3U, 0x401F851CU, 0x0U, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_LCD_CLK          0x401F813CU, 0x0U, 0, 0, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_QTIMER1_TIMER0   0x401F813CU, 0x1U, 0, 0, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_MQS_RIGHT        0x401F813CU, 0x2U, 0, 0, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_LPSPI4_PCS0      0x401F813CU, 0x3U, 0x401F851CU, 0x0U, 0x401F832CU
 #define IOMUXC_GPIO_B0_00_FLEXIO2_FLEXIO00 0x401F813CU, 0x4U, 0, 0, 0x401F832CU
-#define IOMUXC_GPIO_B0_00_GPIO2_IO00 0x401F813CU, 0x5U, 0, 0, 0x401F832CU
-#define IOMUXC_GPIO_B0_00_SEMC_CSX01 0x401F813CU, 0x6U, 0, 0, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_GPIO2_IO00       0x401F813CU, 0x5U, 0, 0, 0x401F832CU
+#define IOMUXC_GPIO_B0_00_SEMC_CSX01       0x401F813CU, 0x6U, 0, 0, 0x401F832CU
 
-#define IOMUXC_GPIO_B0_01_LCD_ENABLE 0x401F8140U, 0x0U, 0, 0, 0x401F8330U
-#define IOMUXC_GPIO_B0_01_QTIMER1_TIMER1 0x401F8140U, 0x1U, 0, 0, 0x401F8330U
-#define IOMUXC_GPIO_B0_01_MQS_LEFT 0x401F8140U, 0x2U, 0, 0, 0x401F8330U
-#define IOMUXC_GPIO_B0_01_LPSPI4_SDI 0x401F8140U, 0x3U, 0x401F8524U, 0x0U, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_LCD_ENABLE       0x401F8140U, 0x0U, 0, 0, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_QTIMER1_TIMER1   0x401F8140U, 0x1U, 0, 0, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_MQS_LEFT         0x401F8140U, 0x2U, 0, 0, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_LPSPI4_SDI       0x401F8140U, 0x3U, 0x401F8524U, 0x0U, 0x401F8330U
 #define IOMUXC_GPIO_B0_01_FLEXIO2_FLEXIO01 0x401F8140U, 0x4U, 0, 0, 0x401F8330U
-#define IOMUXC_GPIO_B0_01_GPIO2_IO01 0x401F8140U, 0x5U, 0, 0, 0x401F8330U
-#define IOMUXC_GPIO_B0_01_SEMC_CSX02 0x401F8140U, 0x6U, 0, 0, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_GPIO2_IO01       0x401F8140U, 0x5U, 0, 0, 0x401F8330U
+#define IOMUXC_GPIO_B0_01_SEMC_CSX02       0x401F8140U, 0x6U, 0, 0, 0x401F8330U
 
-#define IOMUXC_GPIO_B0_02_LCD_HSYNC 0x401F8144U, 0x0U, 0, 0, 0x401F8334U
-#define IOMUXC_GPIO_B0_02_QTIMER1_TIMER2 0x401F8144U, 0x1U, 0, 0, 0x401F8334U
-#define IOMUXC_GPIO_B0_02_FLEXCAN1_TX 0x401F8144U, 0x2U, 0, 0, 0x401F8334U
-#define IOMUXC_GPIO_B0_02_LPSPI4_SDO 0x401F8144U, 0x3U, 0x401F8528U, 0x0U, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_LCD_HSYNC        0x401F8144U, 0x0U, 0, 0, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_QTIMER1_TIMER2   0x401F8144U, 0x1U, 0, 0, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_FLEXCAN1_TX      0x401F8144U, 0x2U, 0, 0, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_LPSPI4_SDO       0x401F8144U, 0x3U, 0x401F8528U, 0x0U, 0x401F8334U
 #define IOMUXC_GPIO_B0_02_FLEXIO2_FLEXIO02 0x401F8144U, 0x4U, 0, 0, 0x401F8334U
-#define IOMUXC_GPIO_B0_02_GPIO2_IO02 0x401F8144U, 0x5U, 0, 0, 0x401F8334U
-#define IOMUXC_GPIO_B0_02_SEMC_CSX03 0x401F8144U, 0x6U, 0, 0, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_GPIO2_IO02       0x401F8144U, 0x5U, 0, 0, 0x401F8334U
+#define IOMUXC_GPIO_B0_02_SEMC_CSX03       0x401F8144U, 0x6U, 0, 0, 0x401F8334U
 
-#define IOMUXC_GPIO_B0_03_LCD_VSYNC 0x401F8148U, 0x0U, 0, 0, 0x401F8338U
-#define IOMUXC_GPIO_B0_03_QTIMER2_TIMER0 0x401F8148U, 0x1U, 0x401F856CU, 0x1U, 0x401F8338U
-#define IOMUXC_GPIO_B0_03_FLEXCAN1_RX 0x401F8148U, 0x2U, 0x401F844CU, 0x3U, 0x401F8338U
-#define IOMUXC_GPIO_B0_03_LPSPI4_SCK 0x401F8148U, 0x3U, 0x401F8520U, 0x0U, 0x401F8338U
-#define IOMUXC_GPIO_B0_03_FLEXIO2_FLEXIO03 0x401F8148U, 0x4U, 0, 0, 0x401F8338U
-#define IOMUXC_GPIO_B0_03_GPIO2_IO03 0x401F8148U, 0x5U, 0, 0, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_LCD_VSYNC         0x401F8148U, 0x0U, 0, 0, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_QTIMER2_TIMER0    0x401F8148U, 0x1U, 0x401F856CU, 0x1U, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_FLEXCAN1_RX       0x401F8148U, 0x2U, 0x401F844CU, 0x3U, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_LPSPI4_SCK        0x401F8148U, 0x3U, 0x401F8520U, 0x0U, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_FLEXIO2_FLEXIO03  0x401F8148U, 0x4U, 0, 0, 0x401F8338U
+#define IOMUXC_GPIO_B0_03_GPIO2_IO03        0x401F8148U, 0x5U, 0, 0, 0x401F8338U
 #define IOMUXC_GPIO_B0_03_WDOG2_RESET_B_DEB 0x401F8148U, 0x6U, 0, 0, 0x401F8338U
 
-#define IOMUXC_GPIO_B0_04_LCD_DATA00 0x401F814CU, 0x0U, 0, 0, 0x401F833CU
-#define IOMUXC_GPIO_B0_04_QTIMER2_TIMER1 0x401F814CU, 0x1U, 0x401F8570U, 0x1U, 0x401F833CU
-#define IOMUXC_GPIO_B0_04_LPI2C2_SCL 0x401F814CU, 0x2U, 0x401F84D4U, 0x1U, 0x401F833CU
-#define IOMUXC_GPIO_B0_04_ARM_CM7_TRACE00 0x401F814CU, 0x3U, 0, 0, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_LCD_DATA00       0x401F814CU, 0x0U, 0, 0, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_QTIMER2_TIMER1   0x401F814CU, 0x1U, 0x401F8570U, 0x1U, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_LPI2C2_SCL       0x401F814CU, 0x2U, 0x401F84D4U, 0x1U, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_ARM_CM7_TRACE00  0x401F814CU, 0x3U, 0, 0, 0x401F833CU
 #define IOMUXC_GPIO_B0_04_FLEXIO2_FLEXIO04 0x401F814CU, 0x4U, 0, 0, 0x401F833CU
-#define IOMUXC_GPIO_B0_04_GPIO2_IO04 0x401F814CU, 0x5U, 0, 0, 0x401F833CU
-#define IOMUXC_GPIO_B0_04_SRC_BOOT_CFG00 0x401F814CU, 0x6U, 0, 0, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_GPIO2_IO04       0x401F814CU, 0x5U, 0, 0, 0x401F833CU
+#define IOMUXC_GPIO_B0_04_SRC_BOOT_CFG00   0x401F814CU, 0x6U, 0, 0, 0x401F833CU
 
-#define IOMUXC_GPIO_B0_05_LCD_DATA01 0x401F8150U, 0x0U, 0, 0, 0x401F8340U
-#define IOMUXC_GPIO_B0_05_QTIMER2_TIMER2 0x401F8150U, 0x1U, 0x401F8574U, 0x1U, 0x401F8340U
-#define IOMUXC_GPIO_B0_05_LPI2C2_SDA 0x401F8150U, 0x2U, 0x401F84D8U, 0x1U, 0x401F8340U
-#define IOMUXC_GPIO_B0_05_ARM_CM7_TRACE01 0x401F8150U, 0x3U, 0, 0, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_LCD_DATA01       0x401F8150U, 0x0U, 0, 0, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_QTIMER2_TIMER2   0x401F8150U, 0x1U, 0x401F8574U, 0x1U, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_LPI2C2_SDA       0x401F8150U, 0x2U, 0x401F84D8U, 0x1U, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_ARM_CM7_TRACE01  0x401F8150U, 0x3U, 0, 0, 0x401F8340U
 #define IOMUXC_GPIO_B0_05_FLEXIO2_FLEXIO05 0x401F8150U, 0x4U, 0, 0, 0x401F8340U
-#define IOMUXC_GPIO_B0_05_GPIO2_IO05 0x401F8150U, 0x5U, 0, 0, 0x401F8340U
-#define IOMUXC_GPIO_B0_05_SRC_BOOT_CFG01 0x401F8150U, 0x6U, 0, 0, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_GPIO2_IO05       0x401F8150U, 0x5U, 0, 0, 0x401F8340U
+#define IOMUXC_GPIO_B0_05_SRC_BOOT_CFG01   0x401F8150U, 0x6U, 0, 0, 0x401F8340U
 
-#define IOMUXC_GPIO_B0_06_LCD_DATA02 0x401F8154U, 0x0U, 0, 0, 0x401F8344U
-#define IOMUXC_GPIO_B0_06_QTIMER3_TIMER0 0x401F8154U, 0x1U, 0x401F857CU, 0x2U, 0x401F8344U
-#define IOMUXC_GPIO_B0_06_FLEXPWM2_PWMA00 0x401F8154U, 0x2U, 0x401F8478U, 0x1U, 0x401F8344U
-#define IOMUXC_GPIO_B0_06_ARM_CM7_TRACE02 0x401F8154U, 0x3U, 0, 0, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_LCD_DATA02       0x401F8154U, 0x0U, 0, 0, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_QTIMER3_TIMER0   0x401F8154U, 0x1U, 0x401F857CU, 0x2U, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_FLEXPWM2_PWMA00  0x401F8154U, 0x2U, 0x401F8478U, 0x1U, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_ARM_CM7_TRACE02  0x401F8154U, 0x3U, 0, 0, 0x401F8344U
 #define IOMUXC_GPIO_B0_06_FLEXIO2_FLEXIO06 0x401F8154U, 0x4U, 0, 0, 0x401F8344U
-#define IOMUXC_GPIO_B0_06_GPIO2_IO06 0x401F8154U, 0x5U, 0, 0, 0x401F8344U
-#define IOMUXC_GPIO_B0_06_SRC_BOOT_CFG02 0x401F8154U, 0x6U, 0, 0, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_GPIO2_IO06       0x401F8154U, 0x5U, 0, 0, 0x401F8344U
+#define IOMUXC_GPIO_B0_06_SRC_BOOT_CFG02   0x401F8154U, 0x6U, 0, 0, 0x401F8344U
 
-#define IOMUXC_GPIO_B0_07_LCD_DATA03 0x401F8158U, 0x0U, 0, 0, 0x401F8348U
-#define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U
-#define IOMUXC_GPIO_B0_07_FLEXPWM2_PWMB00 0x401F8158U, 0x2U, 0x401F8488U, 0x1U, 0x401F8348U
-#define IOMUXC_GPIO_B0_07_ARM_CM7_TRACE03 0x401F8158U, 0x3U, 0, 0, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_LCD_DATA03       0x401F8158U, 0x0U, 0, 0, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_QTIMER3_TIMER1   0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_FLEXPWM2_PWMB00  0x401F8158U, 0x2U, 0x401F8488U, 0x1U, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_ARM_CM7_TRACE03  0x401F8158U, 0x3U, 0, 0, 0x401F8348U
 #define IOMUXC_GPIO_B0_07_FLEXIO2_FLEXIO07 0x401F8158U, 0x4U, 0, 0, 0x401F8348U
-#define IOMUXC_GPIO_B0_07_GPIO2_IO07 0x401F8158U, 0x5U, 0, 0, 0x401F8348U
-#define IOMUXC_GPIO_B0_07_SRC_BOOT_CFG03 0x401F8158U, 0x6U, 0, 0, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_GPIO2_IO07       0x401F8158U, 0x5U, 0, 0, 0x401F8348U
+#define IOMUXC_GPIO_B0_07_SRC_BOOT_CFG03   0x401F8158U, 0x6U, 0, 0, 0x401F8348U
 
-#define IOMUXC_GPIO_B0_08_LCD_DATA04 0x401F815CU, 0x0U, 0, 0, 0x401F834CU
-#define IOMUXC_GPIO_B0_08_QTIMER3_TIMER2 0x401F815CU, 0x1U, 0x401F8584U, 0x2U, 0x401F834CU
-#define IOMUXC_GPIO_B0_08_FLEXPWM2_PWMA01 0x401F815CU, 0x2U, 0x401F847CU, 0x1U, 0x401F834CU
-#define IOMUXC_GPIO_B0_08_LPUART3_TX 0x401F815CU, 0x3U, 0x401F853CU, 0x2U, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_LCD_DATA04       0x401F815CU, 0x0U, 0, 0, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_QTIMER3_TIMER2   0x401F815CU, 0x1U, 0x401F8584U, 0x2U, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_FLEXPWM2_PWMA01  0x401F815CU, 0x2U, 0x401F847CU, 0x1U, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_LPUART3_TX       0x401F815CU, 0x3U, 0x401F853CU, 0x2U, 0x401F834CU
 #define IOMUXC_GPIO_B0_08_FLEXIO2_FLEXIO08 0x401F815CU, 0x4U, 0, 0, 0x401F834CU
-#define IOMUXC_GPIO_B0_08_GPIO2_IO08 0x401F815CU, 0x5U, 0, 0, 0x401F834CU
-#define IOMUXC_GPIO_B0_08_SRC_BOOT_CFG04 0x401F815CU, 0x6U, 0, 0, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_GPIO2_IO08       0x401F815CU, 0x5U, 0, 0, 0x401F834CU
+#define IOMUXC_GPIO_B0_08_SRC_BOOT_CFG04   0x401F815CU, 0x6U, 0, 0, 0x401F834CU
 
-#define IOMUXC_GPIO_B0_09_LCD_DATA05 0x401F8160U, 0x0U, 0, 0, 0x401F8350U
-#define IOMUXC_GPIO_B0_09_QTIMER4_TIMER0 0x401F8160U, 0x1U, 0, 0, 0x401F8350U
-#define IOMUXC_GPIO_B0_09_FLEXPWM2_PWMB01 0x401F8160U, 0x2U, 0x401F848CU, 0x1U, 0x401F8350U
-#define IOMUXC_GPIO_B0_09_LPUART3_RX 0x401F8160U, 0x3U, 0x401F8538U, 0x2U, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_LCD_DATA05       0x401F8160U, 0x0U, 0, 0, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_QTIMER4_TIMER0   0x401F8160U, 0x1U, 0, 0, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_FLEXPWM2_PWMB01  0x401F8160U, 0x2U, 0x401F848CU, 0x1U, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_LPUART3_RX       0x401F8160U, 0x3U, 0x401F8538U, 0x2U, 0x401F8350U
 #define IOMUXC_GPIO_B0_09_FLEXIO2_FLEXIO09 0x401F8160U, 0x4U, 0, 0, 0x401F8350U
-#define IOMUXC_GPIO_B0_09_GPIO2_IO09 0x401F8160U, 0x5U, 0, 0, 0x401F8350U
-#define IOMUXC_GPIO_B0_09_SRC_BOOT_CFG05 0x401F8160U, 0x6U, 0, 0, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_GPIO2_IO09       0x401F8160U, 0x5U, 0, 0, 0x401F8350U
+#define IOMUXC_GPIO_B0_09_SRC_BOOT_CFG05   0x401F8160U, 0x6U, 0, 0, 0x401F8350U
 
-#define IOMUXC_GPIO_B0_10_LCD_DATA06 0x401F8164U, 0x0U, 0, 0, 0x401F8354U
-#define IOMUXC_GPIO_B0_10_QTIMER4_TIMER1 0x401F8164U, 0x1U, 0, 0, 0x401F8354U
-#define IOMUXC_GPIO_B0_10_FLEXPWM2_PWMA02 0x401F8164U, 0x2U, 0x401F8480U, 0x1U, 0x401F8354U
-#define IOMUXC_GPIO_B0_10_SAI1_TX_DATA03 0x401F8164U, 0x3U, 0x401F8598U, 0x1U, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_LCD_DATA06       0x401F8164U, 0x0U, 0, 0, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_QTIMER4_TIMER1   0x401F8164U, 0x1U, 0, 0, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_FLEXPWM2_PWMA02  0x401F8164U, 0x2U, 0x401F8480U, 0x1U, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_SAI1_TX_DATA03   0x401F8164U, 0x3U, 0x401F8598U, 0x1U, 0x401F8354U
 #define IOMUXC_GPIO_B0_10_FLEXIO2_FLEXIO10 0x401F8164U, 0x4U, 0, 0, 0x401F8354U
-#define IOMUXC_GPIO_B0_10_GPIO2_IO10 0x401F8164U, 0x5U, 0, 0, 0x401F8354U
-#define IOMUXC_GPIO_B0_10_SRC_BOOT_CFG06 0x401F8164U, 0x6U, 0, 0, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_GPIO2_IO10       0x401F8164U, 0x5U, 0, 0, 0x401F8354U
+#define IOMUXC_GPIO_B0_10_SRC_BOOT_CFG06   0x401F8164U, 0x6U, 0, 0, 0x401F8354U
 
-#define IOMUXC_GPIO_B0_11_LCD_DATA07 0x401F8168U, 0x0U, 0, 0, 0x401F8358U
-#define IOMUXC_GPIO_B0_11_QTIMER4_TIMER2 0x401F8168U, 0x1U, 0, 0, 0x401F8358U
-#define IOMUXC_GPIO_B0_11_FLEXPWM2_PWMB02 0x401F8168U, 0x2U, 0x401F8490U, 0x1U, 0x401F8358U
-#define IOMUXC_GPIO_B0_11_SAI1_TX_DATA02 0x401F8168U, 0x3U, 0x401F859CU, 0x1U, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_LCD_DATA07       0x401F8168U, 0x0U, 0, 0, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_QTIMER4_TIMER2   0x401F8168U, 0x1U, 0, 0, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_FLEXPWM2_PWMB02  0x401F8168U, 0x2U, 0x401F8490U, 0x1U, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_SAI1_TX_DATA02   0x401F8168U, 0x3U, 0x401F859CU, 0x1U, 0x401F8358U
 #define IOMUXC_GPIO_B0_11_FLEXIO2_FLEXIO11 0x401F8168U, 0x4U, 0, 0, 0x401F8358U
-#define IOMUXC_GPIO_B0_11_GPIO2_IO11 0x401F8168U, 0x5U, 0, 0, 0x401F8358U
-#define IOMUXC_GPIO_B0_11_SRC_BOOT_CFG07 0x401F8168U, 0x6U, 0, 0, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_GPIO2_IO11       0x401F8168U, 0x5U, 0, 0, 0x401F8358U
+#define IOMUXC_GPIO_B0_11_SRC_BOOT_CFG07   0x401F8168U, 0x6U, 0, 0, 0x401F8358U
 
-#define IOMUXC_GPIO_B0_12_LCD_DATA08 0x401F816CU, 0x0U, 0, 0, 0x401F835CU
-#define IOMUXC_GPIO_B0_12_XBAR1_INOUT10 0x401F816CU, 0x1U, 0, 0, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_LCD_DATA08        0x401F816CU, 0x0U, 0, 0, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_XBAR1_INOUT10     0x401F816CU, 0x1U, 0, 0, 0x401F835CU
 #define IOMUXC_GPIO_B0_12_ARM_CM7_TRACE_CLK 0x401F816CU, 0x2U, 0, 0, 0x401F835CU
-#define IOMUXC_GPIO_B0_12_SAI1_TX_DATA01 0x401F816CU, 0x3U, 0x401F85A0U, 0x1U, 0x401F835CU
-#define IOMUXC_GPIO_B0_12_FLEXIO2_FLEXIO12 0x401F816CU, 0x4U, 0, 0, 0x401F835CU
-#define IOMUXC_GPIO_B0_12_GPIO2_IO12 0x401F816CU, 0x5U, 0, 0, 0x401F835CU
-#define IOMUXC_GPIO_B0_12_SRC_BOOT_CFG08 0x401F816CU, 0x6U, 0, 0, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_SAI1_TX_DATA01    0x401F816CU, 0x3U, 0x401F85A0U, 0x1U, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_FLEXIO2_FLEXIO12  0x401F816CU, 0x4U, 0, 0, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_GPIO2_IO12        0x401F816CU, 0x5U, 0, 0, 0x401F835CU
+#define IOMUXC_GPIO_B0_12_SRC_BOOT_CFG08    0x401F816CU, 0x6U, 0, 0, 0x401F835CU
 
-#define IOMUXC_GPIO_B0_13_LCD_DATA09 0x401F8170U, 0x0U, 0, 0, 0x401F8360U
-#define IOMUXC_GPIO_B0_13_XBAR1_INOUT11 0x401F8170U, 0x1U, 0, 0, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_LCD_DATA09        0x401F8170U, 0x0U, 0, 0, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_XBAR1_INOUT11     0x401F8170U, 0x1U, 0, 0, 0x401F8360U
 #define IOMUXC_GPIO_B0_13_ARM_CM7_TRACE_SWO 0x401F8170U, 0x2U, 0, 0, 0x401F8360U
-#define IOMUXC_GPIO_B0_13_SAI1_MCLK 0x401F8170U, 0x3U, 0x401F858CU, 0x2U, 0x401F8360U
-#define IOMUXC_GPIO_B0_13_FLEXIO2_FLEXIO13 0x401F8170U, 0x4U, 0, 0, 0x401F8360U
-#define IOMUXC_GPIO_B0_13_GPIO2_IO13 0x401F8170U, 0x5U, 0, 0, 0x401F8360U
-#define IOMUXC_GPIO_B0_13_SRC_BOOT_CFG09 0x401F8170U, 0x6U, 0, 0, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_SAI1_MCLK         0x401F8170U, 0x3U, 0x401F858CU, 0x2U, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_FLEXIO2_FLEXIO13  0x401F8170U, 0x4U, 0, 0, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_GPIO2_IO13        0x401F8170U, 0x5U, 0, 0, 0x401F8360U
+#define IOMUXC_GPIO_B0_13_SRC_BOOT_CFG09    0x401F8170U, 0x6U, 0, 0, 0x401F8360U
 
-#define IOMUXC_GPIO_B0_14_LCD_DATA10 0x401F8174U, 0x0U, 0, 0, 0x401F8364U
-#define IOMUXC_GPIO_B0_14_XBAR1_INOUT12 0x401F8174U, 0x1U, 0, 0, 0x401F8364U
-#define IOMUXC_GPIO_B0_14_ARM_CM7_TXEV 0x401F8174U, 0x2U, 0, 0, 0x401F8364U
-#define IOMUXC_GPIO_B0_14_SAI1_RX_SYNC 0x401F8174U, 0x3U, 0x401F85A4U, 0x2U, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_LCD_DATA10       0x401F8174U, 0x0U, 0, 0, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_XBAR1_INOUT12    0x401F8174U, 0x1U, 0, 0, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_ARM_CM7_TXEV     0x401F8174U, 0x2U, 0, 0, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_SAI1_RX_SYNC     0x401F8174U, 0x3U, 0x401F85A4U, 0x2U, 0x401F8364U
 #define IOMUXC_GPIO_B0_14_FLEXIO2_FLEXIO14 0x401F8174U, 0x4U, 0, 0, 0x401F8364U
-#define IOMUXC_GPIO_B0_14_GPIO2_IO14 0x401F8174U, 0x5U, 0, 0, 0x401F8364U
-#define IOMUXC_GPIO_B0_14_SRC_BOOT_CFG10 0x401F8174U, 0x6U, 0, 0, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_GPIO2_IO14       0x401F8174U, 0x5U, 0, 0, 0x401F8364U
+#define IOMUXC_GPIO_B0_14_SRC_BOOT_CFG10   0x401F8174U, 0x6U, 0, 0, 0x401F8364U
 
-#define IOMUXC_GPIO_B0_15_LCD_DATA11 0x401F8178U, 0x0U, 0, 0, 0x401F8368U
-#define IOMUXC_GPIO_B0_15_XBAR1_INOUT13 0x401F8178U, 0x1U, 0, 0, 0x401F8368U
-#define IOMUXC_GPIO_B0_15_ARM_CM7_RXEV 0x401F8178U, 0x2U, 0, 0, 0x401F8368U
-#define IOMUXC_GPIO_B0_15_SAI1_RX_BCLK 0x401F8178U, 0x3U, 0x401F8590U, 0x2U, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_LCD_DATA11       0x401F8178U, 0x0U, 0, 0, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_XBAR1_INOUT13    0x401F8178U, 0x1U, 0, 0, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_ARM_CM7_RXEV     0x401F8178U, 0x2U, 0, 0, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_SAI1_RX_BCLK     0x401F8178U, 0x3U, 0x401F8590U, 0x2U, 0x401F8368U
 #define IOMUXC_GPIO_B0_15_FLEXIO2_FLEXIO15 0x401F8178U, 0x4U, 0, 0, 0x401F8368U
-#define IOMUXC_GPIO_B0_15_GPIO2_IO15 0x401F8178U, 0x5U, 0, 0, 0x401F8368U
-#define IOMUXC_GPIO_B0_15_SRC_BOOT_CFG11 0x401F8178U, 0x6U, 0, 0, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_GPIO2_IO15       0x401F8178U, 0x5U, 0, 0, 0x401F8368U
+#define IOMUXC_GPIO_B0_15_SRC_BOOT_CFG11   0x401F8178U, 0x6U, 0, 0, 0x401F8368U
 
-#define IOMUXC_GPIO_B1_00_LCD_DATA12 0x401F817CU, 0x0U, 0, 0, 0x401F836CU
-#define IOMUXC_GPIO_B1_00_XBAR1_INOUT14 0x401F817CU, 0x1U, 0x401F8644U, 0x1U, 0x401F836CU
-#define IOMUXC_GPIO_B1_00_LPUART4_TX 0x401F817CU, 0x2U, 0x401F8544U, 0x2U, 0x401F836CU
-#define IOMUXC_GPIO_B1_00_SAI1_RX_DATA00 0x401F817CU, 0x3U, 0x401F8594U, 0x2U, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_LCD_DATA12       0x401F817CU, 0x0U, 0, 0, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_XBAR1_INOUT14    0x401F817CU, 0x1U, 0x401F8644U, 0x1U, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_LPUART4_TX       0x401F817CU, 0x2U, 0x401F8544U, 0x2U, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_SAI1_RX_DATA00   0x401F817CU, 0x3U, 0x401F8594U, 0x2U, 0x401F836CU
 #define IOMUXC_GPIO_B1_00_FLEXIO2_FLEXIO16 0x401F817CU, 0x4U, 0, 0, 0x401F836CU
-#define IOMUXC_GPIO_B1_00_GPIO2_IO16 0x401F817CU, 0x5U, 0, 0, 0x401F836CU
-#define IOMUXC_GPIO_B1_00_FLEXPWM1_PWMA03 0x401F817CU, 0x6U, 0x401F8454U, 0x4U, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_GPIO2_IO16       0x401F817CU, 0x5U, 0, 0, 0x401F836CU
+#define IOMUXC_GPIO_B1_00_FLEXPWM1_PWMA03  0x401F817CU, 0x6U, 0x401F8454U, 0x4U, 0x401F836CU
 
-#define IOMUXC_GPIO_B1_01_LCD_DATA13 0x401F8180U, 0x0U, 0, 0, 0x401F8370U
-#define IOMUXC_GPIO_B1_01_XBAR1_INOUT15 0x401F8180U, 0x1U, 0x401F8648U, 0x1U, 0x401F8370U
-#define IOMUXC_GPIO_B1_01_LPUART4_RX 0x401F8180U, 0x2U, 0x401F8540U, 0x2U, 0x401F8370U
-#define IOMUXC_GPIO_B1_01_SAI1_TX_DATA00 0x401F8180U, 0x3U, 0, 0, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_LCD_DATA13       0x401F8180U, 0x0U, 0, 0, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_XBAR1_INOUT15    0x401F8180U, 0x1U, 0x401F8648U, 0x1U, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_LPUART4_RX       0x401F8180U, 0x2U, 0x401F8540U, 0x2U, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_SAI1_TX_DATA00   0x401F8180U, 0x3U, 0, 0, 0x401F8370U
 #define IOMUXC_GPIO_B1_01_FLEXIO2_FLEXIO17 0x401F8180U, 0x4U, 0, 0, 0x401F8370U
-#define IOMUXC_GPIO_B1_01_GPIO2_IO17 0x401F8180U, 0x5U, 0, 0, 0x401F8370U
-#define IOMUXC_GPIO_B1_01_FLEXPWM1_PWMB03 0x401F8180U, 0x6U, 0x401F8464U, 0x4U, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_GPIO2_IO17       0x401F8180U, 0x5U, 0, 0, 0x401F8370U
+#define IOMUXC_GPIO_B1_01_FLEXPWM1_PWMB03  0x401F8180U, 0x6U, 0x401F8464U, 0x4U, 0x401F8370U
 
-#define IOMUXC_GPIO_B1_02_LCD_DATA14 0x401F8184U, 0x0U, 0, 0, 0x401F8374U
-#define IOMUXC_GPIO_B1_02_XBAR1_INOUT16 0x401F8184U, 0x1U, 0x401F864CU, 0x1U, 0x401F8374U
-#define IOMUXC_GPIO_B1_02_LPSPI4_PCS2 0x401F8184U, 0x2U, 0, 0, 0x401F8374U
-#define IOMUXC_GPIO_B1_02_SAI1_TX_BCLK 0x401F8184U, 0x3U, 0x401F85A8U, 0x2U, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_LCD_DATA14       0x401F8184U, 0x0U, 0, 0, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_XBAR1_INOUT16    0x401F8184U, 0x1U, 0x401F864CU, 0x1U, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_LPSPI4_PCS2      0x401F8184U, 0x2U, 0, 0, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_SAI1_TX_BCLK     0x401F8184U, 0x3U, 0x401F85A8U, 0x2U, 0x401F8374U
 #define IOMUXC_GPIO_B1_02_FLEXIO2_FLEXIO18 0x401F8184U, 0x4U, 0, 0, 0x401F8374U
-#define IOMUXC_GPIO_B1_02_GPIO2_IO18 0x401F8184U, 0x5U, 0, 0, 0x401F8374U
-#define IOMUXC_GPIO_B1_02_FLEXPWM2_PWMA03 0x401F8184U, 0x6U, 0x401F8474U, 0x4U, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_GPIO2_IO18       0x401F8184U, 0x5U, 0, 0, 0x401F8374U
+#define IOMUXC_GPIO_B1_02_FLEXPWM2_PWMA03  0x401F8184U, 0x6U, 0x401F8474U, 0x4U, 0x401F8374U
 
-#define IOMUXC_GPIO_B1_03_LCD_DATA15 0x401F8188U, 0x0U, 0, 0, 0x401F8378U
-#define IOMUXC_GPIO_B1_03_XBAR1_INOUT17 0x401F8188U, 0x1U, 0x401F862CU, 0x3U, 0x401F8378U
-#define IOMUXC_GPIO_B1_03_LPSPI4_PCS1 0x401F8188U, 0x2U, 0, 0, 0x401F8378U
-#define IOMUXC_GPIO_B1_03_SAI1_TX_SYNC 0x401F8188U, 0x3U, 0x401F85ACU, 0x2U, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_LCD_DATA15       0x401F8188U, 0x0U, 0, 0, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_XBAR1_INOUT17    0x401F8188U, 0x1U, 0x401F862CU, 0x3U, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_LPSPI4_PCS1      0x401F8188U, 0x2U, 0, 0, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_SAI1_TX_SYNC     0x401F8188U, 0x3U, 0x401F85ACU, 0x2U, 0x401F8378U
 #define IOMUXC_GPIO_B1_03_FLEXIO2_FLEXIO19 0x401F8188U, 0x4U, 0, 0, 0x401F8378U
-#define IOMUXC_GPIO_B1_03_GPIO2_IO19 0x401F8188U, 0x5U, 0, 0, 0x401F8378U
-#define IOMUXC_GPIO_B1_03_FLEXPWM2_PWMB03 0x401F8188U, 0x6U, 0x401F8484U, 0x3U, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_GPIO2_IO19       0x401F8188U, 0x5U, 0, 0, 0x401F8378U
+#define IOMUXC_GPIO_B1_03_FLEXPWM2_PWMB03  0x401F8188U, 0x6U, 0x401F8484U, 0x3U, 0x401F8378U
 
-#define IOMUXC_GPIO_B1_04_LCD_DATA16 0x401F818CU, 0x0U, 0, 0, 0x401F837CU
-#define IOMUXC_GPIO_B1_04_LPSPI4_PCS0 0x401F818CU, 0x1U, 0x401F851CU, 0x1U, 0x401F837CU
-#define IOMUXC_GPIO_B1_04_CSI_DATA15 0x401F818CU, 0x2U, 0, 0, 0x401F837CU
-#define IOMUXC_GPIO_B1_04_ENET_RX_DATA00 0x401F818CU, 0x3U, 0x401F8434U, 0x1U, 0x401F837CU
+#define IOMUXC_GPIO_B1_04_LCD_DATA16       0x401F818CU, 0x0U, 0, 0, 0x401F837CU
+#define IOMUXC_GPIO_B1_04_LPSPI4_PCS0      0x401F818CU, 0x1U, 0x401F851CU, 0x1U, 0x401F837CU
+#define IOMUXC_GPIO_B1_04_CSI_DATA15       0x401F818CU, 0x2U, 0, 0, 0x401F837CU
+#define IOMUXC_GPIO_B1_04_ENET_RX_DATA00   0x401F818CU, 0x3U, 0x401F8434U, 0x1U, 0x401F837CU
 #define IOMUXC_GPIO_B1_04_FLEXIO2_FLEXIO20 0x401F818CU, 0x4U, 0, 0, 0x401F837CU
-#define IOMUXC_GPIO_B1_04_GPIO2_IO20 0x401F818CU, 0x5U, 0, 0, 0x401F837CU
+#define IOMUXC_GPIO_B1_04_GPIO2_IO20       0x401F818CU, 0x5U, 0, 0, 0x401F837CU
 
-#define IOMUXC_GPIO_B1_05_LCD_DATA17 0x401F8190U, 0x0U, 0, 0, 0x401F8380U
-#define IOMUXC_GPIO_B1_05_LPSPI4_SDI 0x401F8190U, 0x1U, 0x401F8524U, 0x1U, 0x401F8380U
-#define IOMUXC_GPIO_B1_05_CSI_DATA14 0x401F8190U, 0x2U, 0, 0, 0x401F8380U
-#define IOMUXC_GPIO_B1_05_ENET_RX_DATA01 0x401F8190U, 0x3U, 0x401F8438U, 0x1U, 0x401F8380U
+#define IOMUXC_GPIO_B1_05_LCD_DATA17       0x401F8190U, 0x0U, 0, 0, 0x401F8380U
+#define IOMUXC_GPIO_B1_05_LPSPI4_SDI       0x401F8190U, 0x1U, 0x401F8524U, 0x1U, 0x401F8380U
+#define IOMUXC_GPIO_B1_05_CSI_DATA14       0x401F8190U, 0x2U, 0, 0, 0x401F8380U
+#define IOMUXC_GPIO_B1_05_ENET_RX_DATA01   0x401F8190U, 0x3U, 0x401F8438U, 0x1U, 0x401F8380U
 #define IOMUXC_GPIO_B1_05_FLEXIO2_FLEXIO21 0x401F8190U, 0x4U, 0, 0, 0x401F8380U
-#define IOMUXC_GPIO_B1_05_GPIO2_IO21 0x401F8190U, 0x5U, 0, 0, 0x401F8380U
+#define IOMUXC_GPIO_B1_05_GPIO2_IO21       0x401F8190U, 0x5U, 0, 0, 0x401F8380U
 
-#define IOMUXC_GPIO_B1_06_LCD_DATA18 0x401F8194U, 0x0U, 0, 0, 0x401F8384U
-#define IOMUXC_GPIO_B1_06_LPSPI4_SDO 0x401F8194U, 0x1U, 0x401F8528U, 0x1U, 0x401F8384U
-#define IOMUXC_GPIO_B1_06_CSI_DATA13 0x401F8194U, 0x2U, 0, 0, 0x401F8384U
-#define IOMUXC_GPIO_B1_06_ENET_RX_EN 0x401F8194U, 0x3U, 0x401F843CU, 0x1U, 0x401F8384U
+#define IOMUXC_GPIO_B1_06_LCD_DATA18       0x401F8194U, 0x0U, 0, 0, 0x401F8384U
+#define IOMUXC_GPIO_B1_06_LPSPI4_SDO       0x401F8194U, 0x1U, 0x401F8528U, 0x1U, 0x401F8384U
+#define IOMUXC_GPIO_B1_06_CSI_DATA13       0x401F8194U, 0x2U, 0, 0, 0x401F8384U
+#define IOMUXC_GPIO_B1_06_ENET_RX_EN       0x401F8194U, 0x3U, 0x401F843CU, 0x1U, 0x401F8384U
 #define IOMUXC_GPIO_B1_06_FLEXIO2_FLEXIO22 0x401F8194U, 0x4U, 0, 0, 0x401F8384U
-#define IOMUXC_GPIO_B1_06_GPIO2_IO22 0x401F8194U, 0x5U, 0, 0, 0x401F8384U
+#define IOMUXC_GPIO_B1_06_GPIO2_IO22       0x401F8194U, 0x5U, 0, 0, 0x401F8384U
 
-#define IOMUXC_GPIO_B1_07_LCD_DATA19 0x401F8198U, 0x0U, 0, 0, 0x401F8388U
-#define IOMUXC_GPIO_B1_07_LPSPI4_SCK 0x401F8198U, 0x1U, 0x401F8520U, 0x1U, 0x401F8388U
-#define IOMUXC_GPIO_B1_07_CSI_DATA12 0x401F8198U, 0x2U, 0, 0, 0x401F8388U
-#define IOMUXC_GPIO_B1_07_ENET_TX_DATA00 0x401F8198U, 0x3U, 0, 0, 0x401F8388U
+#define IOMUXC_GPIO_B1_07_LCD_DATA19       0x401F8198U, 0x0U, 0, 0, 0x401F8388U
+#define IOMUXC_GPIO_B1_07_LPSPI4_SCK       0x401F8198U, 0x1U, 0x401F8520U, 0x1U, 0x401F8388U
+#define IOMUXC_GPIO_B1_07_CSI_DATA12       0x401F8198U, 0x2U, 0, 0, 0x401F8388U
+#define IOMUXC_GPIO_B1_07_ENET_TX_DATA00   0x401F8198U, 0x3U, 0, 0, 0x401F8388U
 #define IOMUXC_GPIO_B1_07_FLEXIO2_FLEXIO23 0x401F8198U, 0x4U, 0, 0, 0x401F8388U
-#define IOMUXC_GPIO_B1_07_GPIO2_IO23 0x401F8198U, 0x5U, 0, 0, 0x401F8388U
+#define IOMUXC_GPIO_B1_07_GPIO2_IO23       0x401F8198U, 0x5U, 0, 0, 0x401F8388U
 
-#define IOMUXC_GPIO_B1_08_LCD_DATA20 0x401F819CU, 0x0U, 0, 0, 0x401F838CU
-#define IOMUXC_GPIO_B1_08_QTIMER1_TIMER3 0x401F819CU, 0x1U, 0, 0, 0x401F838CU
-#define IOMUXC_GPIO_B1_08_CSI_DATA11 0x401F819CU, 0x2U, 0, 0, 0x401F838CU
-#define IOMUXC_GPIO_B1_08_ENET_TX_DATA01 0x401F819CU, 0x3U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_LCD_DATA20       0x401F819CU, 0x0U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_QTIMER1_TIMER3   0x401F819CU, 0x1U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_CSI_DATA11       0x401F819CU, 0x2U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_ENET_TX_DATA01   0x401F819CU, 0x3U, 0, 0, 0x401F838CU
 #define IOMUXC_GPIO_B1_08_FLEXIO2_FLEXIO24 0x401F819CU, 0x4U, 0, 0, 0x401F838CU
-#define IOMUXC_GPIO_B1_08_GPIO2_IO24 0x401F819CU, 0x5U, 0, 0, 0x401F838CU
-#define IOMUXC_GPIO_B1_08_FLEXCAN2_TX 0x401F819CU, 0x6U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_GPIO2_IO24       0x401F819CU, 0x5U, 0, 0, 0x401F838CU
+#define IOMUXC_GPIO_B1_08_FLEXCAN2_TX      0x401F819CU, 0x6U, 0, 0, 0x401F838CU
 
-#define IOMUXC_GPIO_B1_09_LCD_DATA21 0x401F81A0U, 0x0U, 0, 0, 0x401F8390U
-#define IOMUXC_GPIO_B1_09_QTIMER2_TIMER3 0x401F81A0U, 0x1U, 0x401F8578U, 0x1U, 0x401F8390U
-#define IOMUXC_GPIO_B1_09_CSI_DATA10 0x401F81A0U, 0x2U, 0, 0, 0x401F8390U
-#define IOMUXC_GPIO_B1_09_ENET_TX_EN 0x401F81A0U, 0x3U, 0, 0, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_LCD_DATA21       0x401F81A0U, 0x0U, 0, 0, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_QTIMER2_TIMER3   0x401F81A0U, 0x1U, 0x401F8578U, 0x1U, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_CSI_DATA10       0x401F81A0U, 0x2U, 0, 0, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_ENET_TX_EN       0x401F81A0U, 0x3U, 0, 0, 0x401F8390U
 #define IOMUXC_GPIO_B1_09_FLEXIO2_FLEXIO25 0x401F81A0U, 0x4U, 0, 0, 0x401F8390U
-#define IOMUXC_GPIO_B1_09_GPIO2_IO25 0x401F81A0U, 0x5U, 0, 0, 0x401F8390U
-#define IOMUXC_GPIO_B1_09_FLEXCAN2_RX 0x401F81A0U, 0x6U, 0x401F8450U, 0x3U, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_GPIO2_IO25       0x401F81A0U, 0x5U, 0, 0, 0x401F8390U
+#define IOMUXC_GPIO_B1_09_FLEXCAN2_RX      0x401F81A0U, 0x6U, 0x401F8450U, 0x3U, 0x401F8390U
 
-#define IOMUXC_GPIO_B1_10_LCD_DATA22 0x401F81A4U, 0x0U, 0, 0, 0x401F8394U
-#define IOMUXC_GPIO_B1_10_QTIMER3_TIMER3 0x401F81A4U, 0x1U, 0x401F8588U, 0x2U, 0x401F8394U
-#define IOMUXC_GPIO_B1_10_CSI_DATA00 0x401F81A4U, 0x2U, 0, 0, 0x401F8394U
-#define IOMUXC_GPIO_B1_10_ENET_TX_CLK 0x401F81A4U, 0x3U, 0x401F8448U, 0x1U, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_LCD_DATA22       0x401F81A4U, 0x0U, 0, 0, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_QTIMER3_TIMER3   0x401F81A4U, 0x1U, 0x401F8588U, 0x2U, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_CSI_DATA00       0x401F81A4U, 0x2U, 0, 0, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_ENET_TX_CLK      0x401F81A4U, 0x3U, 0x401F8448U, 0x1U, 0x401F8394U
 #define IOMUXC_GPIO_B1_10_FLEXIO2_FLEXIO26 0x401F81A4U, 0x4U, 0, 0, 0x401F8394U
-#define IOMUXC_GPIO_B1_10_GPIO2_IO26 0x401F81A4U, 0x5U, 0, 0, 0x401F8394U
-#define IOMUXC_GPIO_B1_10_ENET_REF_CLK 0x401F81A4U, 0x6U, 0x401F842CU, 0x1U, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_GPIO2_IO26       0x401F81A4U, 0x5U, 0, 0, 0x401F8394U
+#define IOMUXC_GPIO_B1_10_ENET_REF_CLK     0x401F81A4U, 0x6U, 0x401F842CU, 0x1U, 0x401F8394U
 
-#define IOMUXC_GPIO_B1_11_LCD_DATA23 0x401F81A8U, 0x0U, 0, 0, 0x401F8398U
-#define IOMUXC_GPIO_B1_11_QTIMER4_TIMER3 0x401F81A8U, 0x1U, 0, 0, 0x401F8398U
-#define IOMUXC_GPIO_B1_11_CSI_DATA01 0x401F81A8U, 0x2U, 0, 0, 0x401F8398U
-#define IOMUXC_GPIO_B1_11_ENET_RX_ER 0x401F81A8U, 0x3U, 0x401F8440U, 0x1U, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_LCD_DATA23       0x401F81A8U, 0x0U, 0, 0, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_QTIMER4_TIMER3   0x401F81A8U, 0x1U, 0, 0, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_CSI_DATA01       0x401F81A8U, 0x2U, 0, 0, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_ENET_RX_ER       0x401F81A8U, 0x3U, 0x401F8440U, 0x1U, 0x401F8398U
 #define IOMUXC_GPIO_B1_11_FLEXIO2_FLEXIO27 0x401F81A8U, 0x4U, 0, 0, 0x401F8398U
-#define IOMUXC_GPIO_B1_11_GPIO2_IO27 0x401F81A8U, 0x5U, 0, 0, 0x401F8398U
-#define IOMUXC_GPIO_B1_11_LPSPI4_PCS3 0x401F81A8U, 0x6U, 0, 0, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_GPIO2_IO27       0x401F81A8U, 0x5U, 0, 0, 0x401F8398U
+#define IOMUXC_GPIO_B1_11_LPSPI4_PCS3      0x401F81A8U, 0x6U, 0, 0, 0x401F8398U
 
-#define IOMUXC_GPIO_B1_12_LPUART5_TX 0x401F81ACU, 0x1U, 0x401F854CU, 0x1U, 0x401F839CU
-#define IOMUXC_GPIO_B1_12_CSI_PIXCLK 0x401F81ACU, 0x2U, 0x401F8424U, 0x1U, 0x401F839CU
+#define IOMUXC_GPIO_B1_12_LPUART5_TX          0x401F81ACU, 0x1U, 0x401F854CU, 0x1U, 0x401F839CU
+#define IOMUXC_GPIO_B1_12_CSI_PIXCLK          0x401F81ACU, 0x2U, 0x401F8424U, 0x1U, 0x401F839CU
 #define IOMUXC_GPIO_B1_12_ENET_1588_EVENT0_IN 0x401F81ACU, 0x3U, 0x401F8444U, 0x2U, 0x401F839CU
-#define IOMUXC_GPIO_B1_12_FLEXIO2_FLEXIO28 0x401F81ACU, 0x4U, 0, 0, 0x401F839CU
-#define IOMUXC_GPIO_B1_12_GPIO2_IO28 0x401F81ACU, 0x5U, 0, 0, 0x401F839CU
-#define IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x401F81ACU, 0x6U, 0x401F85D4U, 0x2U, 0x401F839CU
+#define IOMUXC_GPIO_B1_12_FLEXIO2_FLEXIO28    0x401F81ACU, 0x4U, 0, 0, 0x401F839CU
+#define IOMUXC_GPIO_B1_12_GPIO2_IO28          0x401F81ACU, 0x5U, 0, 0, 0x401F839CU
+#define IOMUXC_GPIO_B1_12_USDHC1_CD_B         0x401F81ACU, 0x6U, 0x401F85D4U, 0x2U, 0x401F839CU
 
-#define IOMUXC_GPIO_B1_13_WDOG1_B 0x401F81B0U, 0x0U, 0, 0, 0x401F83A0U
-#define IOMUXC_GPIO_B1_13_LPUART5_RX 0x401F81B0U, 0x1U, 0x401F8548U, 0x1U, 0x401F83A0U
-#define IOMUXC_GPIO_B1_13_CSI_VSYNC 0x401F81B0U, 0x2U, 0x401F8428U, 0x2U, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_WDOG1_B              0x401F81B0U, 0x0U, 0, 0, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_LPUART5_RX           0x401F81B0U, 0x1U, 0x401F8548U, 0x1U, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_CSI_VSYNC            0x401F81B0U, 0x2U, 0x401F8428U, 0x2U, 0x401F83A0U
 #define IOMUXC_GPIO_B1_13_ENET_1588_EVENT0_OUT 0x401F81B0U, 0x3U, 0, 0, 0x401F83A0U
-#define IOMUXC_GPIO_B1_13_FLEXIO2_FLEXIO29 0x401F81B0U, 0x4U, 0, 0, 0x401F83A0U
-#define IOMUXC_GPIO_B1_13_GPIO2_IO29 0x401F81B0U, 0x5U, 0, 0, 0x401F83A0U
-#define IOMUXC_GPIO_B1_13_USDHC1_WP 0x401F81B0U, 0x6U, 0x401F85D8U, 0x3U, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_FLEXIO2_FLEXIO29     0x401F81B0U, 0x4U, 0, 0, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_GPIO2_IO29           0x401F81B0U, 0x5U, 0, 0, 0x401F83A0U
+#define IOMUXC_GPIO_B1_13_USDHC1_WP            0x401F81B0U, 0x6U, 0x401F85D8U, 0x3U, 0x401F83A0U
 
-#define IOMUXC_GPIO_B1_14_ENET_MDC 0x401F81B4U, 0x0U, 0, 0, 0x401F83A4U
-#define IOMUXC_GPIO_B1_14_FLEXPWM4_PWMA02 0x401F81B4U, 0x1U, 0x401F849CU, 0x1U, 0x401F83A4U
-#define IOMUXC_GPIO_B1_14_CSI_HSYNC 0x401F81B4U, 0x2U, 0x401F8420U, 0x2U, 0x401F83A4U
-#define IOMUXC_GPIO_B1_14_XBAR1_IN02 0x401F81B4U, 0x3U, 0x401F860CU, 0x1U, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_ENET_MDC         0x401F81B4U, 0x0U, 0, 0, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_FLEXPWM4_PWMA02  0x401F81B4U, 0x1U, 0x401F849CU, 0x1U, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_CSI_HSYNC        0x401F81B4U, 0x2U, 0x401F8420U, 0x2U, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_XBAR1_IN02       0x401F81B4U, 0x3U, 0x401F860CU, 0x1U, 0x401F83A4U
 #define IOMUXC_GPIO_B1_14_FLEXIO2_FLEXIO30 0x401F81B4U, 0x4U, 0, 0, 0x401F83A4U
-#define IOMUXC_GPIO_B1_14_GPIO2_IO30 0x401F81B4U, 0x5U, 0, 0, 0x401F83A4U
-#define IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0x401F81B4U, 0x6U, 0, 0, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_GPIO2_IO30       0x401F81B4U, 0x5U, 0, 0, 0x401F83A4U
+#define IOMUXC_GPIO_B1_14_USDHC1_VSELECT   0x401F81B4U, 0x6U, 0, 0, 0x401F83A4U
 
-#define IOMUXC_GPIO_B1_15_ENET_MDIO 0x401F81B8U, 0x0U, 0x401F8430U, 0x2U, 0x401F83A8U
-#define IOMUXC_GPIO_B1_15_FLEXPWM4_PWMA03 0x401F81B8U, 0x1U, 0x401F84A0U, 0x1U, 0x401F83A8U
-#define IOMUXC_GPIO_B1_15_CSI_MCLK 0x401F81B8U, 0x2U, 0, 0, 0x401F83A8U
-#define IOMUXC_GPIO_B1_15_XBAR1_IN03 0x401F81B8U, 0x3U, 0x401F8610U, 0x1U, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_ENET_MDIO        0x401F81B8U, 0x0U, 0x401F8430U, 0x2U, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_FLEXPWM4_PWMA03  0x401F81B8U, 0x1U, 0x401F84A0U, 0x1U, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_CSI_MCLK         0x401F81B8U, 0x2U, 0, 0, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_XBAR1_IN03       0x401F81B8U, 0x3U, 0x401F8610U, 0x1U, 0x401F83A8U
 #define IOMUXC_GPIO_B1_15_FLEXIO2_FLEXIO31 0x401F81B8U, 0x4U, 0, 0, 0x401F83A8U
-#define IOMUXC_GPIO_B1_15_GPIO2_IO31 0x401F81B8U, 0x5U, 0, 0, 0x401F83A8U
-#define IOMUXC_GPIO_B1_15_USDHC1_RESET_B 0x401F81B8U, 0x6U, 0, 0, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_GPIO2_IO31       0x401F81B8U, 0x5U, 0, 0, 0x401F83A8U
+#define IOMUXC_GPIO_B1_15_USDHC1_RESET_B   0x401F81B8U, 0x6U, 0, 0, 0x401F83A8U
 
-#define IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x401F81BCU, 0x0U, 0, 0, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_USDHC1_CMD      0x401F81BCU, 0x0U, 0, 0, 0x401F83ACU
 #define IOMUXC_GPIO_SD_B0_00_FLEXPWM1_PWMA00 0x401F81BCU, 0x1U, 0x401F8458U, 0x1U, 0x401F83ACU
-#define IOMUXC_GPIO_SD_B0_00_LPI2C3_SCL 0x401F81BCU, 0x2U, 0x401F84DCU, 0x1U, 0x401F83ACU
-#define IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04 0x401F81BCU, 0x3U, 0x401F8614U, 0x1U, 0x401F83ACU
-#define IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK 0x401F81BCU, 0x4U, 0x401F84F0U, 0x1U, 0x401F83ACU
-#define IOMUXC_GPIO_SD_B0_00_GPIO3_IO12 0x401F81BCU, 0x5U, 0, 0, 0x401F83ACU
-#define IOMUXC_GPIO_SD_B0_00_FLEXSPIA_SS1_B 0x401F81BCU, 0x6U, 0, 0, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_LPI2C3_SCL      0x401F81BCU, 0x2U, 0x401F84DCU, 0x1U, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04   0x401F81BCU, 0x3U, 0x401F8614U, 0x1U, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK      0x401F81BCU, 0x4U, 0x401F84F0U, 0x1U, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_GPIO3_IO12      0x401F81BCU, 0x5U, 0, 0, 0x401F83ACU
+#define IOMUXC_GPIO_SD_B0_00_FLEXSPIA_SS1_B  0x401F81BCU, 0x6U, 0, 0, 0x401F83ACU
 
-#define IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x401F81C0U, 0x0U, 0, 0, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_USDHC1_CLK      0x401F81C0U, 0x0U, 0, 0, 0x401F83B0U
 #define IOMUXC_GPIO_SD_B0_01_FLEXPWM1_PWMB00 0x401F81C0U, 0x1U, 0x401F8468U, 0x1U, 0x401F83B0U
-#define IOMUXC_GPIO_SD_B0_01_LPI2C3_SDA 0x401F81C0U, 0x2U, 0x401F84E0U, 0x1U, 0x401F83B0U
-#define IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05 0x401F81C0U, 0x3U, 0x401F8618U, 0x1U, 0x401F83B0U
-#define IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 0x401F81C0U, 0x4U, 0x401F84ECU, 0x0U, 0x401F83B0U
-#define IOMUXC_GPIO_SD_B0_01_GPIO3_IO13 0x401F81C0U, 0x5U, 0, 0, 0x401F83B0U
-#define IOMUXC_GPIO_SD_B0_01_FLEXSPIB_SS1_B 0x401F81C0U, 0x6U, 0, 0, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_LPI2C3_SDA      0x401F81C0U, 0x2U, 0x401F84E0U, 0x1U, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05   0x401F81C0U, 0x3U, 0x401F8618U, 0x1U, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0     0x401F81C0U, 0x4U, 0x401F84ECU, 0x0U, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_GPIO3_IO13      0x401F81C0U, 0x5U, 0, 0, 0x401F83B0U
+#define IOMUXC_GPIO_SD_B0_01_FLEXSPIB_SS1_B  0x401F81C0U, 0x6U, 0, 0, 0x401F83B0U
 
-#define IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x401F81C4U, 0x0U, 0, 0, 0x401F83B4U
+#define IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0    0x401F81C4U, 0x0U, 0, 0, 0x401F83B4U
 #define IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWMA01 0x401F81C4U, 0x1U, 0x401F845CU, 0x1U, 0x401F83B4U
-#define IOMUXC_GPIO_SD_B0_02_LPUART8_CTS_B 0x401F81C4U, 0x2U, 0, 0, 0x401F83B4U
-#define IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06 0x401F81C4U, 0x3U, 0x401F861CU, 0x1U, 0x401F83B4U
-#define IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO 0x401F81C4U, 0x4U, 0x401F84F8U, 0x1U, 0x401F83B4U
-#define IOMUXC_GPIO_SD_B0_02_GPIO3_IO14 0x401F81C4U, 0x5U, 0, 0, 0x401F83B4U
+#define IOMUXC_GPIO_SD_B0_02_LPUART8_CTS_B   0x401F81C4U, 0x2U, 0, 0, 0x401F83B4U
+#define IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06   0x401F81C4U, 0x3U, 0x401F861CU, 0x1U, 0x401F83B4U
+#define IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO      0x401F81C4U, 0x4U, 0x401F84F8U, 0x1U, 0x401F83B4U
+#define IOMUXC_GPIO_SD_B0_02_GPIO3_IO14      0x401F81C4U, 0x5U, 0, 0, 0x401F83B4U
 
-#define IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x401F81C8U, 0x0U, 0, 0, 0x401F83B8U
+#define IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1    0x401F81C8U, 0x0U, 0, 0, 0x401F83B8U
 #define IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWMB01 0x401F81C8U, 0x1U, 0x401F846CU, 0x1U, 0x401F83B8U
-#define IOMUXC_GPIO_SD_B0_03_LPUART8_RTS_B 0x401F81C8U, 0x2U, 0, 0, 0x401F83B8U
-#define IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07 0x401F81C8U, 0x3U, 0x401F8620U, 0x1U, 0x401F83B8U
-#define IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI 0x401F81C8U, 0x4U, 0x401F84F4U, 0x1U, 0x401F83B8U
-#define IOMUXC_GPIO_SD_B0_03_GPIO3_IO15 0x401F81C8U, 0x5U, 0, 0, 0x401F83B8U
+#define IOMUXC_GPIO_SD_B0_03_LPUART8_RTS_B   0x401F81C8U, 0x2U, 0, 0, 0x401F83B8U
+#define IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07   0x401F81C8U, 0x3U, 0x401F8620U, 0x1U, 0x401F83B8U
+#define IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI      0x401F81C8U, 0x4U, 0x401F84F4U, 0x1U, 0x401F83B8U
+#define IOMUXC_GPIO_SD_B0_03_GPIO3_IO15      0x401F81C8U, 0x5U, 0, 0, 0x401F83B8U
 
-#define IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x401F81CCU, 0x0U, 0, 0, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2    0x401F81CCU, 0x0U, 0, 0, 0x401F83BCU
 #define IOMUXC_GPIO_SD_B0_04_FLEXPWM1_PWMA02 0x401F81CCU, 0x1U, 0x401F8460U, 0x1U, 0x401F83BCU
-#define IOMUXC_GPIO_SD_B0_04_LPUART8_TX 0x401F81CCU, 0x2U, 0x401F8564U, 0x0U, 0x401F83BCU
-#define IOMUXC_GPIO_SD_B0_04_XBAR1_INOUT08 0x401F81CCU, 0x3U, 0x401F8624U, 0x1U, 0x401F83BCU
-#define IOMUXC_GPIO_SD_B0_04_FLEXSPIB_SS0_B 0x401F81CCU, 0x4U, 0, 0, 0x401F83BCU
-#define IOMUXC_GPIO_SD_B0_04_GPIO3_IO16 0x401F81CCU, 0x5U, 0, 0, 0x401F83BCU
-#define IOMUXC_GPIO_SD_B0_04_CCM_CLKO1 0x401F81CCU, 0x6U, 0, 0, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_LPUART8_TX      0x401F81CCU, 0x2U, 0x401F8564U, 0x0U, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_XBAR1_INOUT08   0x401F81CCU, 0x3U, 0x401F8624U, 0x1U, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_FLEXSPIB_SS0_B  0x401F81CCU, 0x4U, 0, 0, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_GPIO3_IO16      0x401F81CCU, 0x5U, 0, 0, 0x401F83BCU
+#define IOMUXC_GPIO_SD_B0_04_CCM_CLKO1       0x401F81CCU, 0x6U, 0, 0, 0x401F83BCU
 
-#define IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x401F81D0U, 0x0U, 0, 0, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3    0x401F81D0U, 0x0U, 0, 0, 0x401F83C0U
 #define IOMUXC_GPIO_SD_B0_05_FLEXPWM1_PWMB02 0x401F81D0U, 0x1U, 0x401F8470U, 0x1U, 0x401F83C0U
-#define IOMUXC_GPIO_SD_B0_05_LPUART8_RX 0x401F81D0U, 0x2U, 0x401F8560U, 0x0U, 0x401F83C0U
-#define IOMUXC_GPIO_SD_B0_05_XBAR1_INOUT09 0x401F81D0U, 0x3U, 0x401F8628U, 0x1U, 0x401F83C0U
-#define IOMUXC_GPIO_SD_B0_05_FLEXSPIB_DQS 0x401F81D0U, 0x4U, 0, 0, 0x401F83C0U
-#define IOMUXC_GPIO_SD_B0_05_GPIO3_IO17 0x401F81D0U, 0x5U, 0, 0, 0x401F83C0U
-#define IOMUXC_GPIO_SD_B0_05_CCM_CLKO2 0x401F81D0U, 0x6U, 0, 0, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_LPUART8_RX      0x401F81D0U, 0x2U, 0x401F8560U, 0x0U, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_XBAR1_INOUT09   0x401F81D0U, 0x3U, 0x401F8628U, 0x1U, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_FLEXSPIB_DQS    0x401F81D0U, 0x4U, 0, 0, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_GPIO3_IO17      0x401F81D0U, 0x5U, 0, 0, 0x401F83C0U
+#define IOMUXC_GPIO_SD_B0_05_CCM_CLKO2       0x401F81D0U, 0x6U, 0, 0, 0x401F83C0U
 
-#define IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3 0x401F81D4U, 0x0U, 0x401F85F4U, 0x0U, 0x401F83C4U
+#define IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3    0x401F81D4U, 0x0U, 0x401F85F4U, 0x0U, 0x401F83C4U
 #define IOMUXC_GPIO_SD_B1_00_FLEXSPIB_DATA03 0x401F81D4U, 0x1U, 0x401F84C4U, 0x0U, 0x401F83C4U
 #define IOMUXC_GPIO_SD_B1_00_FLEXPWM1_PWMA03 0x401F81D4U, 0x2U, 0x401F8454U, 0x0U, 0x401F83C4U
-#define IOMUXC_GPIO_SD_B1_00_SAI1_TX_DATA03 0x401F81D4U, 0x3U, 0x401F8598U, 0x0U, 0x401F83C4U
-#define IOMUXC_GPIO_SD_B1_00_LPUART4_TX 0x401F81D4U, 0x4U, 0x401F8544U, 0x0U, 0x401F83C4U
-#define IOMUXC_GPIO_SD_B1_00_GPIO3_IO00 0x401F81D4U, 0x5U, 0, 0, 0x401F83C4U
+#define IOMUXC_GPIO_SD_B1_00_SAI1_TX_DATA03  0x401F81D4U, 0x3U, 0x401F8598U, 0x0U, 0x401F83C4U
+#define IOMUXC_GPIO_SD_B1_00_LPUART4_TX      0x401F81D4U, 0x4U, 0x401F8544U, 0x0U, 0x401F83C4U
+#define IOMUXC_GPIO_SD_B1_00_GPIO3_IO00      0x401F81D4U, 0x5U, 0, 0, 0x401F83C4U
 
-#define IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2 0x401F81D8U, 0x0U, 0x401F85F0U, 0x0U, 0x401F83C8U
+#define IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2    0x401F81D8U, 0x0U, 0x401F85F0U, 0x0U, 0x401F83C8U
 #define IOMUXC_GPIO_SD_B1_01_FLEXSPIB_DATA02 0x401F81D8U, 0x1U, 0x401F84C0U, 0x0U, 0x401F83C8U
 #define IOMUXC_GPIO_SD_B1_01_FLEXPWM1_PWMB03 0x401F81D8U, 0x2U, 0x401F8464U, 0x0U, 0x401F83C8U
-#define IOMUXC_GPIO_SD_B1_01_SAI1_TX_DATA02 0x401F81D8U, 0x3U, 0x401F859CU, 0x0U, 0x401F83C8U
-#define IOMUXC_GPIO_SD_B1_01_LPUART4_RX 0x401F81D8U, 0x4U, 0x401F8540U, 0x0U, 0x401F83C8U
-#define IOMUXC_GPIO_SD_B1_01_GPIO3_IO01 0x401F81D8U, 0x5U, 0, 0, 0x401F83C8U
+#define IOMUXC_GPIO_SD_B1_01_SAI1_TX_DATA02  0x401F81D8U, 0x3U, 0x401F859CU, 0x0U, 0x401F83C8U
+#define IOMUXC_GPIO_SD_B1_01_LPUART4_RX      0x401F81D8U, 0x4U, 0x401F8540U, 0x0U, 0x401F83C8U
+#define IOMUXC_GPIO_SD_B1_01_GPIO3_IO01      0x401F81D8U, 0x5U, 0, 0, 0x401F83C8U
 
-#define IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1 0x401F81DCU, 0x0U, 0x401F85ECU, 0x0U, 0x401F83CCU
+#define IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1    0x401F81DCU, 0x0U, 0x401F85ECU, 0x0U, 0x401F83CCU
 #define IOMUXC_GPIO_SD_B1_02_FLEXSPIB_DATA01 0x401F81DCU, 0x1U, 0x401F84BCU, 0x0U, 0x401F83CCU
 #define IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWMA03 0x401F81DCU, 0x2U, 0x401F8474U, 0x0U, 0x401F83CCU
-#define IOMUXC_GPIO_SD_B1_02_SAI1_TX_DATA01 0x401F81DCU, 0x3U, 0x401F85A0U, 0x0U, 0x401F83CCU
-#define IOMUXC_GPIO_SD_B1_02_FLEXCAN1_TX 0x401F81DCU, 0x4U, 0, 0, 0x401F83CCU
-#define IOMUXC_GPIO_SD_B1_02_GPIO3_IO02 0x401F81DCU, 0x5U, 0, 0, 0x401F83CCU
-#define IOMUXC_GPIO_SD_B1_02_CCM_WAIT 0x401F81DCU, 0x6U, 0, 0, 0x401F83CCU
+#define IOMUXC_GPIO_SD_B1_02_SAI1_TX_DATA01  0x401F81DCU, 0x3U, 0x401F85A0U, 0x0U, 0x401F83CCU
+#define IOMUXC_GPIO_SD_B1_02_FLEXCAN1_TX     0x401F81DCU, 0x4U, 0, 0, 0x401F83CCU
+#define IOMUXC_GPIO_SD_B1_02_GPIO3_IO02      0x401F81DCU, 0x5U, 0, 0, 0x401F83CCU
+#define IOMUXC_GPIO_SD_B1_02_CCM_WAIT        0x401F81DCU, 0x6U, 0, 0, 0x401F83CCU
 
-#define IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0 0x401F81E0U, 0x0U, 0x401F85E8U, 0x0U, 0x401F83D0U
+#define IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0    0x401F81E0U, 0x0U, 0x401F85E8U, 0x0U, 0x401F83D0U
 #define IOMUXC_GPIO_SD_B1_03_FLEXSPIB_DATA00 0x401F81E0U, 0x1U, 0x401F84B8U, 0x0U, 0x401F83D0U
 #define IOMUXC_GPIO_SD_B1_03_FLEXPWM2_PWMB03 0x401F81E0U, 0x2U, 0x401F8484U, 0x0U, 0x401F83D0U
-#define IOMUXC_GPIO_SD_B1_03_SAI1_MCLK 0x401F81E0U, 0x3U, 0x401F858CU, 0x0U, 0x401F83D0U
-#define IOMUXC_GPIO_SD_B1_03_FLEXCAN1_RX 0x401F81E0U, 0x4U, 0x401F844CU, 0x0U, 0x401F83D0U
-#define IOMUXC_GPIO_SD_B1_03_GPIO3_IO03 0x401F81E0U, 0x5U, 0, 0, 0x401F83D0U
-#define IOMUXC_GPIO_SD_B1_03_CCM_PMIC_READY 0x401F81E0U, 0x6U, 0x401F83FCU, 0x0U, 0x401F83D0U
+#define IOMUXC_GPIO_SD_B1_03_SAI1_MCLK       0x401F81E0U, 0x3U, 0x401F858CU, 0x0U, 0x401F83D0U
+#define IOMUXC_GPIO_SD_B1_03_FLEXCAN1_RX     0x401F81E0U, 0x4U, 0x401F844CU, 0x0U, 0x401F83D0U
+#define IOMUXC_GPIO_SD_B1_03_GPIO3_IO03      0x401F81E0U, 0x5U, 0, 0, 0x401F83D0U
+#define IOMUXC_GPIO_SD_B1_03_CCM_PMIC_READY  0x401F81E0U, 0x6U, 0x401F83FCU, 0x0U, 0x401F83D0U
 
-#define IOMUXC_GPIO_SD_B1_04_USDHC2_CLK 0x401F81E4U, 0x0U, 0x401F85DCU, 0x0U, 0x401F83D4U
-#define IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK 0x401F81E4U, 0x1U, 0, 0, 0x401F83D4U
-#define IOMUXC_GPIO_SD_B1_04_LPI2C1_SCL 0x401F81E4U, 0x2U, 0x401F84CCU, 0x0U, 0x401F83D4U
-#define IOMUXC_GPIO_SD_B1_04_SAI1_RX_SYNC 0x401F81E4U, 0x3U, 0x401F85A4U, 0x0U, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_USDHC2_CLK     0x401F81E4U, 0x0U, 0x401F85DCU, 0x0U, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_FLEXSPIB_SCLK  0x401F81E4U, 0x1U, 0, 0, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_LPI2C1_SCL     0x401F81E4U, 0x2U, 0x401F84CCU, 0x0U, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_SAI1_RX_SYNC   0x401F81E4U, 0x3U, 0x401F85A4U, 0x0U, 0x401F83D4U
 #define IOMUXC_GPIO_SD_B1_04_FLEXSPIA_SS1_B 0x401F81E4U, 0x4U, 0, 0, 0x401F83D4U
-#define IOMUXC_GPIO_SD_B1_04_GPIO3_IO04 0x401F81E4U, 0x5U, 0, 0, 0x401F83D4U
-#define IOMUXC_GPIO_SD_B1_04_CCM_STOP 0x401F81E4U, 0x6U, 0, 0, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_GPIO3_IO04     0x401F81E4U, 0x5U, 0, 0, 0x401F83D4U
+#define IOMUXC_GPIO_SD_B1_04_CCM_STOP       0x401F81E4U, 0x6U, 0, 0, 0x401F83D4U
 
-#define IOMUXC_GPIO_SD_B1_05_USDHC2_CMD 0x401F81E8U, 0x0U, 0x401F85E4U, 0x0U, 0x401F83D8U
-#define IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS 0x401F81E8U, 0x1U, 0x401F84A4U, 0x0U, 0x401F83D8U
-#define IOMUXC_GPIO_SD_B1_05_LPI2C1_SDA 0x401F81E8U, 0x2U, 0x401F84D0U, 0x0U, 0x401F83D8U
-#define IOMUXC_GPIO_SD_B1_05_SAI1_RX_BCLK 0x401F81E8U, 0x3U, 0x401F8590U, 0x0U, 0x401F83D8U
+#define IOMUXC_GPIO_SD_B1_05_USDHC2_CMD     0x401F81E8U, 0x0U, 0x401F85E4U, 0x0U, 0x401F83D8U
+#define IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS   0x401F81E8U, 0x1U, 0x401F84A4U, 0x0U, 0x401F83D8U
+#define IOMUXC_GPIO_SD_B1_05_LPI2C1_SDA     0x401F81E8U, 0x2U, 0x401F84D0U, 0x0U, 0x401F83D8U
+#define IOMUXC_GPIO_SD_B1_05_SAI1_RX_BCLK   0x401F81E8U, 0x3U, 0x401F8590U, 0x0U, 0x401F83D8U
 #define IOMUXC_GPIO_SD_B1_05_FLEXSPIB_SS0_B 0x401F81E8U, 0x4U, 0, 0, 0x401F83D8U
-#define IOMUXC_GPIO_SD_B1_05_GPIO3_IO05 0x401F81E8U, 0x5U, 0, 0, 0x401F83D8U
+#define IOMUXC_GPIO_SD_B1_05_GPIO3_IO05     0x401F81E8U, 0x5U, 0, 0, 0x401F83D8U
 
 #define IOMUXC_GPIO_SD_B1_06_USDHC2_RESET_B 0x401F81ECU, 0x0U, 0, 0, 0x401F83DCU
 #define IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B 0x401F81ECU, 0x1U, 0, 0, 0x401F83DCU
-#define IOMUXC_GPIO_SD_B1_06_LPUART7_CTS_B 0x401F81ECU, 0x2U, 0, 0, 0x401F83DCU
+#define IOMUXC_GPIO_SD_B1_06_LPUART7_CTS_B  0x401F81ECU, 0x2U, 0, 0, 0x401F83DCU
 #define IOMUXC_GPIO_SD_B1_06_SAI1_RX_DATA00 0x401F81ECU, 0x3U, 0x401F8594U, 0x0U, 0x401F83DCU
-#define IOMUXC_GPIO_SD_B1_06_LPSPI2_PCS0 0x401F81ECU, 0x4U, 0x401F84FCU, 0x0U, 0x401F83DCU
-#define IOMUXC_GPIO_SD_B1_06_GPIO3_IO06 0x401F81ECU, 0x5U, 0, 0, 0x401F83DCU
+#define IOMUXC_GPIO_SD_B1_06_LPSPI2_PCS0    0x401F81ECU, 0x4U, 0x401F84FCU, 0x0U, 0x401F83DCU
+#define IOMUXC_GPIO_SD_B1_06_GPIO3_IO06     0x401F81ECU, 0x5U, 0, 0, 0x401F83DCU
 
-#define IOMUXC_GPIO_SD_B1_07_SEMC_CSX01 0x401F81F0U, 0x0U, 0, 0, 0x401F83E0U
-#define IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK 0x401F81F0U, 0x1U, 0x401F84C8U, 0x0U, 0x401F83E0U
-#define IOMUXC_GPIO_SD_B1_07_LPUART7_RTS_B 0x401F81F0U, 0x2U, 0, 0, 0x401F83E0U
+#define IOMUXC_GPIO_SD_B1_07_SEMC_CSX01     0x401F81F0U, 0x0U, 0, 0, 0x401F83E0U
+#define IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK  0x401F81F0U, 0x1U, 0x401F84C8U, 0x0U, 0x401F83E0U
+#define IOMUXC_GPIO_SD_B1_07_LPUART7_RTS_B  0x401F81F0U, 0x2U, 0, 0, 0x401F83E0U
 #define IOMUXC_GPIO_SD_B1_07_SAI1_TX_DATA00 0x401F81F0U, 0x3U, 0, 0, 0x401F83E0U
-#define IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK 0x401F81F0U, 0x4U, 0x401F8500U, 0x0U, 0x401F83E0U
-#define IOMUXC_GPIO_SD_B1_07_GPIO3_IO07 0x401F81F0U, 0x5U, 0, 0, 0x401F83E0U
+#define IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK     0x401F81F0U, 0x4U, 0x401F8500U, 0x0U, 0x401F83E0U
+#define IOMUXC_GPIO_SD_B1_07_GPIO3_IO07     0x401F81F0U, 0x5U, 0, 0, 0x401F83E0U
 
-#define IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4 0x401F81F4U, 0x0U, 0x401F85F8U, 0x0U, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4    0x401F81F4U, 0x0U, 0x401F85F8U, 0x0U, 0x401F83E4U
 #define IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00 0x401F81F4U, 0x1U, 0x401F84A8U, 0x0U, 0x401F83E4U
-#define IOMUXC_GPIO_SD_B1_08_LPUART7_TX 0x401F81F4U, 0x2U, 0x401F855CU, 0x0U, 0x401F83E4U
-#define IOMUXC_GPIO_SD_B1_08_SAI1_TX_BCLK 0x401F81F4U, 0x3U, 0x401F85A8U, 0x0U, 0x401F83E4U
-#define IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0 0x401F81F4U, 0x4U, 0x401F8508U, 0x0U, 0x401F83E4U
-#define IOMUXC_GPIO_SD_B1_08_GPIO3_IO08 0x401F81F4U, 0x5U, 0, 0, 0x401F83E4U
-#define IOMUXC_GPIO_SD_B1_08_SEMC_CSX02 0x401F81F4U, 0x6U, 0, 0, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_LPUART7_TX      0x401F81F4U, 0x2U, 0x401F855CU, 0x0U, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_SAI1_TX_BCLK    0x401F81F4U, 0x3U, 0x401F85A8U, 0x0U, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0      0x401F81F4U, 0x4U, 0x401F8508U, 0x0U, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_GPIO3_IO08      0x401F81F4U, 0x5U, 0, 0, 0x401F83E4U
+#define IOMUXC_GPIO_SD_B1_08_SEMC_CSX02      0x401F81F4U, 0x6U, 0, 0, 0x401F83E4U
 
-#define IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5 0x401F81F8U, 0x0U, 0x401F85FCU, 0x0U, 0x401F83E8U
+#define IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5    0x401F81F8U, 0x0U, 0x401F85FCU, 0x0U, 0x401F83E8U
 #define IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01 0x401F81F8U, 0x1U, 0x401F84ACU, 0x0U, 0x401F83E8U
-#define IOMUXC_GPIO_SD_B1_09_LPUART7_RX 0x401F81F8U, 0x2U, 0x401F8558U, 0x0U, 0x401F83E8U
-#define IOMUXC_GPIO_SD_B1_09_SAI1_TX_SYNC 0x401F81F8U, 0x3U, 0x401F85ACU, 0x0U, 0x401F83E8U
-#define IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI 0x401F81F8U, 0x4U, 0x401F8504U, 0x0U, 0x401F83E8U
-#define IOMUXC_GPIO_SD_B1_09_GPIO3_IO09 0x401F81F8U, 0x5U, 0, 0, 0x401F83E8U
+#define IOMUXC_GPIO_SD_B1_09_LPUART7_RX      0x401F81F8U, 0x2U, 0x401F8558U, 0x0U, 0x401F83E8U
+#define IOMUXC_GPIO_SD_B1_09_SAI1_TX_SYNC    0x401F81F8U, 0x3U, 0x401F85ACU, 0x0U, 0x401F83E8U
+#define IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI      0x401F81F8U, 0x4U, 0x401F8504U, 0x0U, 0x401F83E8U
+#define IOMUXC_GPIO_SD_B1_09_GPIO3_IO09      0x401F81F8U, 0x5U, 0, 0, 0x401F83E8U
 
-#define IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6 0x401F81FCU, 0x0U, 0x401F8600U, 0x0U, 0x401F83ECU
+#define IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6    0x401F81FCU, 0x0U, 0x401F8600U, 0x0U, 0x401F83ECU
 #define IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02 0x401F81FCU, 0x1U, 0x401F84B0U, 0x0U, 0x401F83ECU
-#define IOMUXC_GPIO_SD_B1_10_LPUART2_RX 0x401F81FCU, 0x2U, 0x401F852CU, 0x0U, 0x401F83ECU
-#define IOMUXC_GPIO_SD_B1_10_LPI2C2_SDA 0x401F81FCU, 0x3U, 0x401F84D8U, 0x0U, 0x401F83ECU
-#define IOMUXC_GPIO_SD_B1_10_LPSPI2_PCS2 0x401F81FCU, 0x4U, 0, 0, 0x401F83ECU
-#define IOMUXC_GPIO_SD_B1_10_GPIO3_IO10 0x401F81FCU, 0x5U, 0, 0, 0x401F83ECU
+#define IOMUXC_GPIO_SD_B1_10_LPUART2_RX      0x401F81FCU, 0x2U, 0x401F852CU, 0x0U, 0x401F83ECU
+#define IOMUXC_GPIO_SD_B1_10_LPI2C2_SDA      0x401F81FCU, 0x3U, 0x401F84D8U, 0x0U, 0x401F83ECU
+#define IOMUXC_GPIO_SD_B1_10_LPSPI2_PCS2     0x401F81FCU, 0x4U, 0, 0, 0x401F83ECU
+#define IOMUXC_GPIO_SD_B1_10_GPIO3_IO10      0x401F81FCU, 0x5U, 0, 0, 0x401F83ECU
 
-#define IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7 0x401F8200U, 0x0U, 0x401F8604U, 0x0U, 0x401F83F0U
+#define IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7    0x401F8200U, 0x0U, 0x401F8604U, 0x0U, 0x401F83F0U
 #define IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03 0x401F8200U, 0x1U, 0x401F84B4U, 0x0U, 0x401F83F0U
-#define IOMUXC_GPIO_SD_B1_11_LPUART2_TX 0x401F8200U, 0x2U, 0x401F8530U, 0x0U, 0x401F83F0U
-#define IOMUXC_GPIO_SD_B1_11_LPI2C2_SCL 0x401F8200U, 0x3U, 0x401F84D4U, 0x0U, 0x401F83F0U
-#define IOMUXC_GPIO_SD_B1_11_LPSPI2_PCS3 0x401F8200U, 0x4U, 0, 0, 0x401F83F0U
-#define IOMUXC_GPIO_SD_B1_11_GPIO3_IO11 0x401F8200U, 0x5U, 0, 0, 0x401F83F0U
+#define IOMUXC_GPIO_SD_B1_11_LPUART2_TX      0x401F8200U, 0x2U, 0x401F8530U, 0x0U, 0x401F83F0U
+#define IOMUXC_GPIO_SD_B1_11_LPI2C2_SCL      0x401F8200U, 0x3U, 0x401F84D4U, 0x0U, 0x401F83F0U
+#define IOMUXC_GPIO_SD_B1_11_LPSPI2_PCS3     0x401F8200U, 0x4U, 0, 0, 0x401F83F0U
+#define IOMUXC_GPIO_SD_B1_11_GPIO3_IO11      0x401F8200U, 0x5U, 0, 0, 0x401F83F0U
 
-#define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U)
+#define IOMUXC_GPR_SAIMCLK_LOWBITMASK  (0x7U)
 #define IOMUXC_GPR_SAIMCLK_HIGHBITMASK (0x3U)
 
 typedef enum _iomuxc_gpr_mode
 {
-    kIOMUXC_GPR_GlobalInterruptRequest = IOMUXC_GPR_GPR1_GINT_MASK,
-    kIOMUXC_GPR_ENET1RefClkMode = IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK,
-    kIOMUXC_GPR_USBExposureMode = IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK,
-    kIOMUXC_GPR_ENET1TxClkOutputDir = IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK,
-    kIOMUXC_GPR_SAI1MClkOutputDir = IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK,
-    kIOMUXC_GPR_SAI2MClkOutputDir = IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK,
-    kIOMUXC_GPR_SAI3MClkOutputDir = IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK,
+    kIOMUXC_GPR_GlobalInterruptRequest    = IOMUXC_GPR_GPR1_GINT_MASK,
+    kIOMUXC_GPR_ENET1RefClkMode           = IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK,
+    kIOMUXC_GPR_USBExposureMode           = IOMUXC_GPR_GPR1_USB_EXP_MODE_MASK,
+    kIOMUXC_GPR_ENET1TxClkOutputDir       = IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK,
+    kIOMUXC_GPR_SAI1MClkOutputDir         = IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK,
+    kIOMUXC_GPR_SAI2MClkOutputDir         = IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK,
+    kIOMUXC_GPR_SAI3MClkOutputDir         = IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK,
     kIOMUXC_GPR_ExcMonitorSlavErrResponse = IOMUXC_GPR_GPR1_EXC_MON_MASK,
-    kIOMUXC_GPR_ENETIpgClkOn = IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK,
-    kIOMUXC_GPR_AHBClockEnable = IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK,  
-}  iomuxc_gpr_mode_t;
+    kIOMUXC_GPR_ENETIpgClkOn              = IOMUXC_GPR_GPR1_ENET_IPG_CLK_S_EN_MASK,
+    kIOMUXC_GPR_AHBClockEnable            = IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK,
+} iomuxc_gpr_mode_t;
 
 typedef enum _iomuxc_gpr_saimclk
 {
     kIOMUXC_GPR_SAI1MClk1Sel = IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT,
     kIOMUXC_GPR_SAI1MClk2Sel = IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT,
-    kIOMUXC_GPR_SAI1MClk3Sel = IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT, 
-    kIOMUXC_GPR_SAI2MClk3Sel = IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT, 
-    kIOMUXC_GPR_SAI3MClk3Sel = IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT,  
+    kIOMUXC_GPR_SAI1MClk3Sel = IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT,
+    kIOMUXC_GPR_SAI2MClk3Sel = IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT,
+    kIOMUXC_GPR_SAI3MClk3Sel = IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT,
 } iomuxc_gpr_saimclk_t;
 
 typedef enum _iomuxc_mqs_pwm_oversample_rate
@@ -1088,179 +1088,167 @@ typedef enum _iomuxc_mqs_pwm_oversample_rate
 /*@}*/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /*_cplusplus */
 
-/*! @name Configuration */
-/*@{*/
+    /*! @name Configuration */
+    /*@{*/
 
-/*!
- * @brief Sets the IOMUXC pin mux mode.
- * @note The first five parameters can be filled with the pin function ID macros.
- *
- * This is an example to set the PTA6 as the lpuart0_tx:
- * @code
- * IOMUXC_SetPinMux(IOMUXC_PTA6_LPUART0_TX, 0);
- * @endcode
- *
- * This is an example to set the PTA0 as GPIOA0:
- * @code
- * IOMUXC_SetPinMux(IOMUXC_PTA0_GPIOA0, 0);
- * @endcode
- *
- * @param muxRegister  The pin mux register.
- * @param muxMode      The pin mux mode.
- * @param inputRegister The select input register.
- * @param inputDaisy   The input daisy.
- * @param configRegister  The config register.
- * @param inputOnfield   Software input on field.
- */
-static inline void IOMUXC_SetPinMux(uint32_t muxRegister,
-                                    uint32_t muxMode,
-                                    uint32_t inputRegister,
-                                    uint32_t inputDaisy,
-                                    uint32_t configRegister,
-                                    uint32_t inputOnfield)
-{
-    *((volatile uint32_t *)muxRegister) =
-        IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(muxMode) | IOMUXC_SW_MUX_CTL_PAD_SION(inputOnfield);
-
-    if (inputRegister)
+    /*!
+     * @brief Sets the IOMUXC pin mux mode.
+     * @note The first five parameters can be filled with the pin function ID macros.
+     *
+     * This is an example to set the PTA6 as the lpuart0_tx:
+     * @code
+     * IOMUXC_SetPinMux(IOMUXC_PTA6_LPUART0_TX, 0);
+     * @endcode
+     *
+     * This is an example to set the PTA0 as GPIOA0:
+     * @code
+     * IOMUXC_SetPinMux(IOMUXC_PTA0_GPIOA0, 0);
+     * @endcode
+     *
+     * @param muxRegister  The pin mux register.
+     * @param muxMode      The pin mux mode.
+     * @param inputRegister The select input register.
+     * @param inputDaisy   The input daisy.
+     * @param configRegister  The config register.
+     * @param inputOnfield   Software input on field.
+     */
+    static inline void IOMUXC_SetPinMux(uint32_t muxRegister,
+                                        uint32_t muxMode,
+                                        uint32_t inputRegister,
+                                        uint32_t inputDaisy,
+                                        uint32_t configRegister,
+                                        uint32_t inputOnfield)
     {
-        *((volatile uint32_t *)inputRegister) = inputDaisy;
-    }
-}
+        *((volatile uint32_t *)muxRegister) =
+            IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(muxMode) | IOMUXC_SW_MUX_CTL_PAD_SION(inputOnfield);
 
-/*!
- * @brief Sets the IOMUXC pin configuration.
- * @note The previous five parameters can be filled with the pin function ID macros.
- *
- * This is an example to set pin configuration for IOMUXC_PTA3_LPI2C0_SCLS:
- * @code
- * IOMUXC_SetPinConfig(IOMUXC_PTA3_LPI2C0_SCLS,IOMUXC_SW_PAD_CTL_PAD_PUS_MASK|IOMUXC_SW_PAD_CTL_PAD_PUS(2U))
- * @endcode
- *
- * @param muxRegister  The pin mux register.
- * @param muxMode      The pin mux mode.
- * @param inputRegister The select input register.
- * @param inputDaisy   The input daisy.
- * @param configRegister  The config register.
- * @param configValue   The pin config value.
- */
-static inline void IOMUXC_SetPinConfig(uint32_t muxRegister,
-                                       uint32_t muxMode,
-                                       uint32_t inputRegister,
-                                       uint32_t inputDaisy,
-                                       uint32_t configRegister,
-                                       uint32_t configValue)
-{
-    if (configRegister)
+        if (inputRegister) {
+            *((volatile uint32_t *)inputRegister) = inputDaisy;
+        }
+    }
+
+    /*!
+     * @brief Sets the IOMUXC pin configuration.
+     * @note The previous five parameters can be filled with the pin function ID macros.
+     *
+     * This is an example to set pin configuration for IOMUXC_PTA3_LPI2C0_SCLS:
+     * @code
+     * IOMUXC_SetPinConfig(IOMUXC_PTA3_LPI2C0_SCLS,IOMUXC_SW_PAD_CTL_PAD_PUS_MASK|IOMUXC_SW_PAD_CTL_PAD_PUS(2U))
+     * @endcode
+     *
+     * @param muxRegister  The pin mux register.
+     * @param muxMode      The pin mux mode.
+     * @param inputRegister The select input register.
+     * @param inputDaisy   The input daisy.
+     * @param configRegister  The config register.
+     * @param configValue   The pin config value.
+     */
+    static inline void IOMUXC_SetPinConfig(uint32_t muxRegister,
+                                           uint32_t muxMode,
+                                           uint32_t inputRegister,
+                                           uint32_t inputDaisy,
+                                           uint32_t configRegister,
+                                           uint32_t configValue)
     {
-        *((volatile uint32_t *)configRegister) = configValue;
+        if (configRegister) {
+            *((volatile uint32_t *)configRegister) = configValue;
+        }
     }
-}
 
-/*!
- * @brief Sets IOMUXC general configuration for some mode.
- *
- * @param base     The IOMUXC GPR base address.
- * @param mode     The mode for setting. the mode is the logical OR of "iomuxc_gpr_mode"
- * @param enable   True enable false disable.
- */
-static inline void IOMUXC_EnableMode(IOMUXC_GPR_Type *base, uint32_t mode, bool enable)
-{
-    mode &= ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK
-            | IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK
-            | IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK
-            | IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK
-            | IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK);
-
-    if (enable)
+    /*!
+     * @brief Sets IOMUXC general configuration for some mode.
+     *
+     * @param base     The IOMUXC GPR base address.
+     * @param mode     The mode for setting. the mode is the logical OR of "iomuxc_gpr_mode"
+     * @param enable   True enable false disable.
+     */
+    static inline void IOMUXC_EnableMode(IOMUXC_GPR_Type *base, uint32_t mode, bool enable)
     {
-        base->GPR1 |= mode;
+        mode &= ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK | IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK |
+                  IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK | IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK |
+                  IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK);
+
+        if (enable) {
+            base->GPR1 |= mode;
+        }
+        else {
+            base->GPR1 &= ~mode;
+        }
     }
-    else
+
+    /*!
+     * @brief Sets IOMUXC general configuration for SAI MCLK selection.
+     *
+     * @param base     The IOMUXC GPR base address.
+     * @param mclk     The SAI MCLK.
+     * @param clkSrc   The clock source. Take refer to register setting details for the clock source in RM.
+     */
+    static inline void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc)
     {
-        base->GPR1 &= ~mode;
+        uint32_t gpr;
+
+        if (mclk > kIOMUXC_GPR_SAI1MClk2Sel) {
+            gpr        = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_HIGHBITMASK << mclk);
+            base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << mclk) | gpr;
+        }
+        else {
+            gpr        = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_LOWBITMASK << mclk);
+            base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << mclk) | gpr;
+        }
     }
-}
 
-/*!
- * @brief Sets IOMUXC general configuration for SAI MCLK selection.
- *
- * @param base     The IOMUXC GPR base address.
- * @param mclk     The SAI MCLK.
- * @param clkSrc   The clock source. Take refer to register setting details for the clock source in RM.
- */
-static inline void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc)
-{
-    uint32_t gpr;
-
-    if (mclk > kIOMUXC_GPR_SAI1MClk2Sel)
+    /*!
+     * @brief Enters or exit MQS software reset.
+     *
+     * @param base     The IOMUXC GPR base address.
+     * @param enable   Enter or exit MQS software reset.
+     */
+    static inline void IOMUXC_MQSEnterSoftwareReset(IOMUXC_GPR_Type *base, bool enable)
     {
-        gpr = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_HIGHBITMASK << mclk);
-        base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << mclk) | gpr;    
+        if (enable) {
+            base->GPR2 |= IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;
+        }
+        else {
+            base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enables or disables MQS.
+     *
+     * @param base     The IOMUXC GPR base address.
+     * @param enable   Enable or disable the MQS.
+     */
+    static inline void IOMUXC_MQSEnable(IOMUXC_GPR_Type *base, bool enable)
     {
-        gpr = base->GPR1 & ~(IOMUXC_GPR_SAIMCLK_LOWBITMASK << mclk);
-        base->GPR1 = ((clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << mclk) | gpr;            
+        if (enable) {
+            base->GPR2 |= IOMUXC_GPR_GPR2_MQS_EN_MASK;
+        }
+        else {
+            base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_EN_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enters or exit MQS software reset.  
- *
- * @param base     The IOMUXC GPR base address.
- * @param enable   Enter or exit MQS software reset.
- */
-static inline void IOMUXC_MQSEnterSoftwareReset(IOMUXC_GPR_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Configure MQS PWM oversampling rate compared with mclk and divider ratio control for mclk from hmclk.
+     *
+     * @param base     The IOMUXC GPR base address.
+     * @param rate     The MQS PWM oversampling rate, refer to "iomuxc_mqs_pwm_oversample_rate_t".
+     * @param divider  The divider ratio control for mclk from hmclk. mclk freq = 1 /(divider + 1) * hmclk freq.
+     */
+
+    static inline void IOMUXC_MQSConfig(IOMUXC_GPR_Type *base, iomuxc_mqs_pwm_oversample_rate_t rate, uint8_t divider)
     {
-        base->GPR2 |= IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;        
+        uint32_t gpr = base->GPR2 & ~(IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK | IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK);
+
+        base->GPR2 = gpr | IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(rate) | IOMUXC_GPR_GPR2_MQS_CLK_DIV(divider);
     }
-    else
-    {
-        base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;        
-    }
-}
 
-
-/*!
- * @brief Enables or disables MQS.  
- *
- * @param base     The IOMUXC GPR base address.
- * @param enable   Enable or disable the MQS.
- */
-static inline void IOMUXC_MQSEnable(IOMUXC_GPR_Type *base, bool enable)
-{
-    if (enable)
-    {
-        base->GPR2 |= IOMUXC_GPR_GPR2_MQS_EN_MASK;   
-    }
-    else
-    {
-        base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_EN_MASK;           
-    }
-}
-
-/*!
- * @brief Configure MQS PWM oversampling rate compared with mclk and divider ratio control for mclk from hmclk.  
- *
- * @param base     The IOMUXC GPR base address.
- * @param rate     The MQS PWM oversampling rate, refer to "iomuxc_mqs_pwm_oversample_rate_t".
- * @param divider  The divider ratio control for mclk from hmclk. mclk freq = 1 /(divider + 1) * hmclk freq.
- */
-
-static inline void IOMUXC_MQSConfig(IOMUXC_GPR_Type *base, iomuxc_mqs_pwm_oversample_rate_t rate, uint8_t divider)
-{
-    uint32_t gpr = base->GPR2 & ~(IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK | IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK);
-    
-    base->GPR2 = gpr | IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(rate) | IOMUXC_GPR_GPR2_MQS_CLK_DIV(divider);
-}
-
-/*@}*/
+    /*@}*/
 
 #if defined(__cplusplus)
 }
@@ -1269,4 +1257,3 @@ static inline void IOMUXC_MQSConfig(IOMUXC_GPR_Type *base, iomuxc_mqs_pwm_oversa
 /*! @}*/
 
 #endif /* _FSL_IOMUXC_H_ */
-
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.c
index 7ce2c3721..d6dc984d5 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.c
@@ -80,8 +80,8 @@ enum _lpi2c_master_fifo_cmd
 {
     kTxDataCmd = LPI2C_MTDR_CMD(0x0U), /*!< Transmit DATA[7:0] */
     kRxDataCmd = LPI2C_MTDR_CMD(0X1U), /*!< Receive (DATA[7:0] + 1) bytes */
-    kStopCmd = LPI2C_MTDR_CMD(0x2U),   /*!< Generate STOP condition */
-    kStartCmd = LPI2C_MTDR_CMD(0x4U),  /*!< Generate(repeated) START and transmit address in DATA[[7:0] */
+    kStopCmd   = LPI2C_MTDR_CMD(0x2U), /*!< Generate STOP condition */
+    kStartCmd  = LPI2C_MTDR_CMD(0x4U), /*!< Generate(repeated) START and transmit address in DATA[[7:0] */
 };
 
 /*!
@@ -183,10 +183,8 @@ static lpi2c_slave_handle_t *s_lpi2cSlaveHandle[ARRAY_SIZE(kLpi2cBases)];
 uint32_t LPI2C_GetInstance(LPI2C_Type *base)
 {
     uint32_t instance;
-    for (instance = 0; instance < ARRAY_SIZE(kLpi2cBases); ++instance)
-    {
-        if (kLpi2cBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(kLpi2cBases); ++instance) {
+        if (kLpi2cBases[instance] == base) {
             return instance;
         }
     }
@@ -211,18 +209,16 @@ static uint32_t LPI2C_GetCyclesForWidth(uint32_t sourceClock_Hz,
     assert(prescaler > 0);
 
     uint32_t busCycle_ns = 1000000 / (sourceClock_Hz / prescaler / 1000);
-    uint32_t cycles = 0;
+    uint32_t cycles      = 0;
 
     /* Search for the cycle count just below the desired glitch width. */
-    while ((((cycles + 1) * busCycle_ns) < width_ns) && (cycles + 1 < maxCycles))
-    {
+    while ((((cycles + 1) * busCycle_ns) < width_ns) && (cycles + 1 < maxCycles)) {
         ++cycles;
     }
 
     /* If we end up with zero cycles, then set the filter to a single cycle unless the */
     /* bus clock is greater than 10x the desired glitch width. */
-    if ((cycles == 0) && (busCycle_ns <= (width_ns * 10)))
-    {
+    if ((cycles == 0) && (busCycle_ns <= (width_ns * 10))) {
         cycles = 1;
     }
 
@@ -246,27 +242,21 @@ status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status)
     /* Check for error. These errors cause a stop to automatically be sent. We must */
     /* clear the errors before a new transfer can start. */
     status &= kMasterErrorFlags;
-    if (status)
-    {
+    if (status) {
         /* Select the correct error code. Ordered by severity, with bus issues first. */
-        if (status & kLPI2C_MasterPinLowTimeoutFlag)
-        {
+        if (status & kLPI2C_MasterPinLowTimeoutFlag) {
             result = kStatus_LPI2C_PinLowTimeout;
         }
-        else if (status & kLPI2C_MasterArbitrationLostFlag)
-        {
+        else if (status & kLPI2C_MasterArbitrationLostFlag) {
             result = kStatus_LPI2C_ArbitrationLost;
         }
-        else if (status & kLPI2C_MasterNackDetectFlag)
-        {
+        else if (status & kLPI2C_MasterNackDetectFlag) {
             result = kStatus_LPI2C_Nak;
         }
-        else if (status & kLPI2C_MasterFifoErrFlag)
-        {
+        else if (status & kLPI2C_MasterFifoErrFlag) {
             result = kStatus_LPI2C_FifoError;
         }
-        else
-        {
+        else {
             assert(false);
         }
 
@@ -298,8 +288,7 @@ static status_t LPI2C_MasterWaitForTxReady(LPI2C_Type *base)
 #if LPI2C_WAIT_TIMEOUT
     uint32_t waitTimes = LPI2C_WAIT_TIMEOUT;
 #endif
-    do
-    {
+    do {
         status_t result;
 
         /* Get the number of words in the tx fifo and compute empty slots. */
@@ -309,15 +298,13 @@ static status_t LPI2C_MasterWaitForTxReady(LPI2C_Type *base)
         /* Check for error flags. */
         status = LPI2C_MasterGetStatusFlags(base);
         result = LPI2C_MasterCheckAndClearError(base, status);
-        if (result)
-        {
+        if (result) {
             return result;
         }
 #if LPI2C_WAIT_TIMEOUT
     } while ((!txCount) && (--waitTimes));
 
-    if (waitTimes == 0)
-    {
+    if (waitTimes == 0) {
         return kStatus_LPI2C_Timeout;
     }
 #else
@@ -339,8 +326,7 @@ static status_t LPI2C_MasterWaitForTxReady(LPI2C_Type *base)
 status_t LPI2C_CheckForBusyBus(LPI2C_Type *base)
 {
     uint32_t status = LPI2C_MasterGetStatusFlags(base);
-    if ((status & kLPI2C_MasterBusBusyFlag) && (!(status & kLPI2C_MasterBusyFlag)))
-    {
+    if ((status & kLPI2C_MasterBusBusyFlag) && (!(status & kLPI2C_MasterBusyFlag))) {
         return kStatus_LPI2C_Busy;
     }
 
@@ -349,19 +335,19 @@ status_t LPI2C_CheckForBusyBus(LPI2C_Type *base)
 
 void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig)
 {
-    masterConfig->enableMaster = true;
-    masterConfig->debugEnable = false;
-    masterConfig->enableDoze = true;
-    masterConfig->ignoreAck = false;
-    masterConfig->pinConfig = kLPI2C_2PinOpenDrain;
-    masterConfig->baudRate_Hz = 100000U;
-    masterConfig->busIdleTimeout_ns = 0;
-    masterConfig->pinLowTimeout_ns = 0;
+    masterConfig->enableMaster            = true;
+    masterConfig->debugEnable             = false;
+    masterConfig->enableDoze              = true;
+    masterConfig->ignoreAck               = false;
+    masterConfig->pinConfig               = kLPI2C_2PinOpenDrain;
+    masterConfig->baudRate_Hz             = 100000U;
+    masterConfig->busIdleTimeout_ns       = 0;
+    masterConfig->pinLowTimeout_ns        = 0;
     masterConfig->sdaGlitchFilterWidth_ns = 0;
     masterConfig->sclGlitchFilterWidth_ns = 0;
-    masterConfig->hostRequest.enable = false;
-    masterConfig->hostRequest.source = kLPI2C_HostRequestExternalPin;
-    masterConfig->hostRequest.polarity = kLPI2C_HostRequestPinActiveHigh;
+    masterConfig->hostRequest.enable      = false;
+    masterConfig->hostRequest.source      = kLPI2C_HostRequestExternalPin;
+    masterConfig->hostRequest.polarity    = kLPI2C_HostRequestPinActiveHigh;
 }
 
 void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz)
@@ -411,33 +397,37 @@ void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfi
 
     /* Configure glitch filters and bus idle and pin low timeouts. */
     prescaler = (base->MCFGR1 & LPI2C_MCFGR1_PRESCALE_MASK) >> LPI2C_MCFGR1_PRESCALE_SHIFT;
-    cfgr2 = base->MCFGR2;
-    if (masterConfig->busIdleTimeout_ns)
-    {
-        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz, masterConfig->busIdleTimeout_ns,
-                                         (LPI2C_MCFGR2_BUSIDLE_MASK >> LPI2C_MCFGR2_BUSIDLE_SHIFT), prescaler);
+    cfgr2     = base->MCFGR2;
+    if (masterConfig->busIdleTimeout_ns) {
+        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                         masterConfig->busIdleTimeout_ns,
+                                         (LPI2C_MCFGR2_BUSIDLE_MASK >> LPI2C_MCFGR2_BUSIDLE_SHIFT),
+                                         prescaler);
         cfgr2 &= ~LPI2C_MCFGR2_BUSIDLE_MASK;
         cfgr2 |= LPI2C_MCFGR2_BUSIDLE(cycles);
     }
-    if (masterConfig->sdaGlitchFilterWidth_ns)
-    {
-        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz, masterConfig->sdaGlitchFilterWidth_ns,
-                                         (LPI2C_MCFGR2_FILTSDA_MASK >> LPI2C_MCFGR2_FILTSDA_SHIFT), 1);
+    if (masterConfig->sdaGlitchFilterWidth_ns) {
+        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                         masterConfig->sdaGlitchFilterWidth_ns,
+                                         (LPI2C_MCFGR2_FILTSDA_MASK >> LPI2C_MCFGR2_FILTSDA_SHIFT),
+                                         1);
         cfgr2 &= ~LPI2C_MCFGR2_FILTSDA_MASK;
         cfgr2 |= LPI2C_MCFGR2_FILTSDA(cycles);
     }
-    if (masterConfig->sclGlitchFilterWidth_ns)
-    {
-        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz, masterConfig->sclGlitchFilterWidth_ns,
-                                         (LPI2C_MCFGR2_FILTSCL_MASK >> LPI2C_MCFGR2_FILTSCL_SHIFT), 1);
+    if (masterConfig->sclGlitchFilterWidth_ns) {
+        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                         masterConfig->sclGlitchFilterWidth_ns,
+                                         (LPI2C_MCFGR2_FILTSCL_MASK >> LPI2C_MCFGR2_FILTSCL_SHIFT),
+                                         1);
         cfgr2 &= ~LPI2C_MCFGR2_FILTSCL_MASK;
         cfgr2 |= LPI2C_MCFGR2_FILTSCL(cycles);
     }
     base->MCFGR2 = cfgr2;
-    if (masterConfig->pinLowTimeout_ns)
-    {
-        cycles = LPI2C_GetCyclesForWidth(sourceClock_Hz, masterConfig->pinLowTimeout_ns / 256,
-                                         (LPI2C_MCFGR2_BUSIDLE_MASK >> LPI2C_MCFGR2_BUSIDLE_SHIFT), prescaler);
+    if (masterConfig->pinLowTimeout_ns) {
+        cycles       = LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                         masterConfig->pinLowTimeout_ns / 256,
+                                         (LPI2C_MCFGR2_BUSIDLE_MASK >> LPI2C_MCFGR2_BUSIDLE_SHIFT),
+                                         prescaler);
         base->MCFGR3 = (base->MCFGR3 & ~LPI2C_MCFGR3_PINLOW_MASK) | LPI2C_MCFGR3_PINLOW(cycles);
     }
 
@@ -471,21 +461,20 @@ void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_con
 
     base->MCFGR1 = (base->MCFGR1 & ~LPI2C_MCFGR1_MATCFG_MASK) | LPI2C_MCFGR1_MATCFG(config->matchMode);
     base->MCFGR0 = (base->MCFGR0 & ~LPI2C_MCFGR0_RDMO_MASK) | LPI2C_MCFGR0_RDMO(config->rxDataMatchOnly);
-    base->MDMR = LPI2C_MDMR_MATCH0(config->match0) | LPI2C_MDMR_MATCH1(config->match1);
+    base->MDMR   = LPI2C_MDMR_MATCH0(config->match0) | LPI2C_MDMR_MATCH1(config->match1);
 
     /* Restore master mode. */
-    if (wasEnabled)
-    {
+    if (wasEnabled) {
         LPI2C_MasterEnable(base, true);
     }
 }
 
 void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz)
 {
-    uint32_t prescale = 0;
-    uint32_t bestPre = 0;
+    uint32_t prescale  = 0;
+    uint32_t bestPre   = 0;
     uint32_t bestClkHi = 0;
-    uint32_t absError = 0;
+    uint32_t absError  = 0;
     uint32_t bestError = 0xffffffffu;
     uint32_t value;
     uint32_t clkHiCycle;
@@ -499,30 +488,24 @@ void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t
 
     /* Baud rate = (sourceClock_Hz/2^prescale)/(CLKLO+1+CLKHI+1 + ROUNDDOWN((2+FILTSCL)/2^prescale) */
     /* Assume CLKLO = 2*CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2. */
-    for (prescale = 1; (prescale <= 128) && (bestError != 0); prescale = 2 * prescale)
-    {
-        for (clkHiCycle = 1; clkHiCycle < 32; clkHiCycle++)
-        {
-            if (clkHiCycle == 1)
-            {
+    for (prescale = 1; (prescale <= 128) && (bestError != 0); prescale = 2 * prescale) {
+        for (clkHiCycle = 1; clkHiCycle < 32; clkHiCycle++) {
+            if (clkHiCycle == 1) {
                 computedRate = (sourceClock_Hz / prescale) / (1 + 3 + 2 + 2 / prescale);
             }
-            else
-            {
+            else {
                 computedRate = (sourceClock_Hz / prescale) / (3 * clkHiCycle + 2 + 2 / prescale);
             }
 
             absError = baudRate_Hz > computedRate ? baudRate_Hz - computedRate : computedRate - baudRate_Hz;
 
-            if (absError < bestError)
-            {
-                bestPre = prescale;
+            if (absError < bestError) {
+                bestPre   = prescale;
                 bestClkHi = clkHiCycle;
                 bestError = absError;
 
                 /* If the error is 0, then we can stop searching because we won't find a better match. */
-                if (absError == 0)
-                {
+                if (absError == 0) {
                     break;
                 }
             }
@@ -532,21 +515,17 @@ void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t
     /* Standard, fast, fast mode plus and ultra-fast transfers. */
     value = LPI2C_MCCR0_CLKHI(bestClkHi);
 
-    if (bestClkHi < 2)
-    {
+    if (bestClkHi < 2) {
         value |= LPI2C_MCCR0_CLKLO(3) | LPI2C_MCCR0_SETHOLD(2) | LPI2C_MCCR0_DATAVD(1);
     }
-    else
-    {
+    else {
         value |= LPI2C_MCCR0_CLKLO(2 * bestClkHi) | LPI2C_MCCR0_SETHOLD(bestClkHi) | LPI2C_MCCR0_DATAVD(bestClkHi / 2);
     }
 
     base->MCCR0 = value;
 
-    for (i = 0; i < 8; i++)
-    {
-        if (bestPre == (1U << i))
-        {
+    for (i = 0; i < 8; i++) {
+        if (bestPre == (1U << i)) {
             bestPre = i;
             break;
         }
@@ -554,8 +533,7 @@ void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t
     base->MCFGR1 = (base->MCFGR1 & ~LPI2C_MCFGR1_PRESCALE_MASK) | LPI2C_MCFGR1_PRESCALE(bestPre);
 
     /* Restore master mode. */
-    if (wasEnabled)
-    {
+    if (wasEnabled) {
         LPI2C_MasterEnable(base, true);
     }
 }
@@ -564,8 +542,7 @@ status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t
 {
     /* Return an error if the bus is already in use not by us. */
     status_t result = LPI2C_CheckForBusyBus(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -577,8 +554,7 @@ status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t
 
     /* Wait until there is room in the fifo. */
     result = LPI2C_MasterWaitForTxReady(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -592,8 +568,7 @@ status_t LPI2C_MasterStop(LPI2C_Type *base)
 {
     /* Wait until there is room in the fifo. */
     status_t result = LPI2C_MasterWaitForTxReady(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -618,16 +593,14 @@ status_t LPI2C_MasterStop(LPI2C_Type *base)
         result = LPI2C_MasterCheckAndClearError(base, status);
 
         /* Check if the stop was sent successfully. */
-        if (status & kLPI2C_MasterStopDetectFlag)
-        {
+        if (status & kLPI2C_MasterStopDetectFlag) {
             LPI2C_MasterClearStatusFlags(base, kLPI2C_MasterStopDetectFlag);
             break;
         }
     }
 
 #if LPI2C_WAIT_TIMEOUT
-    if (waitTimes == 0)
-    {
+    if (waitTimes == 0) {
         return kStatus_LPI2C_Timeout;
     }
 #endif
@@ -643,15 +616,13 @@ status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize)
     assert(rxBuff);
 
     /* Handle empty read. */
-    if (!rxSize)
-    {
+    if (!rxSize) {
         return kStatus_Success;
     }
 
     /* Wait until there is room in the command fifo. */
     result = LPI2C_MasterWaitForTxReady(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -664,26 +635,22 @@ status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize)
 
     /* Receive data */
     buf = (uint8_t *)rxBuff;
-    while (rxSize--)
-    {
+    while (rxSize--) {
         /* Read LPI2C receive fifo register. The register includes a flag to indicate whether */
         /* the FIFO is empty, so we can both get the data and check if we need to keep reading */
         /* using a single register read. */
         uint32_t value;
-        do
-        {
+        do {
             /* Check for errors. */
             result = LPI2C_MasterCheckAndClearError(base, LPI2C_MasterGetStatusFlags(base));
-            if (result)
-            {
+            if (result) {
                 return result;
             }
 
             value = base->MRDR;
 #if LPI2C_WAIT_TIMEOUT
         } while ((value & LPI2C_MRDR_RXEMPTY_MASK) && (--waitTimes));
-        if (waitTimes == 0)
-        {
+        if (waitTimes == 0) {
             return kStatus_LPI2C_Timeout;
         }
 #else
@@ -703,12 +670,10 @@ status_t LPI2C_MasterSend(LPI2C_Type *base, const void *txBuff, size_t txSize)
     assert(txBuff);
 
     /* Send data buffer */
-    while (txSize--)
-    {
+    while (txSize--) {
         /* Wait until there is room in the fifo. This also checks for errors. */
         status_t result = LPI2C_MasterWaitForTxReady(base);
-        if (result)
-        {
+        if (result) {
             return result;
         }
 
@@ -730,8 +695,7 @@ status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t
 
     /* Return an error if the bus is already in use not by us. */
     result = LPI2C_CheckForBusyBus(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -742,29 +706,24 @@ status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t
     base->MCFGR1 &= ~LPI2C_MCFGR1_AUTOSTOP_MASK;
 
     lpi2c_direction_t direction = transfer->subaddressSize ? kLPI2C_Write : transfer->direction;
-    if (!(transfer->flags & kLPI2C_TransferNoStartFlag))
-    {
+    if (!(transfer->flags & kLPI2C_TransferNoStartFlag)) {
         commandBuffer[cmdCount++] =
             (uint16_t)kStartCmd | (uint16_t)((uint16_t)((uint16_t)transfer->slaveAddress << 1U) | (uint16_t)direction);
     }
 
     /* Subaddress, MSB first. */
-    if (transfer->subaddressSize)
-    {
+    if (transfer->subaddressSize) {
         uint32_t subaddressRemaining = transfer->subaddressSize;
-        while (subaddressRemaining--)
-        {
-            uint8_t subaddressByte = (transfer->subaddress >> (8 * subaddressRemaining)) & 0xff;
+        while (subaddressRemaining--) {
+            uint8_t subaddressByte    = (transfer->subaddress >> (8 * subaddressRemaining)) & 0xff;
             commandBuffer[cmdCount++] = subaddressByte;
         }
     }
 
     /* Reads need special handling. */
-    if ((transfer->dataSize) && (transfer->direction == kLPI2C_Read))
-    {
+    if ((transfer->dataSize) && (transfer->direction == kLPI2C_Read)) {
         /* Need to send repeated start if switching directions to read. */
-        if (direction == kLPI2C_Write)
-        {
+        if (direction == kLPI2C_Write) {
             commandBuffer[cmdCount++] =
                 (uint16_t)kStartCmd |
                 (uint16_t)((uint16_t)((uint16_t)transfer->slaveAddress << 1U) | (uint16_t)kLPI2C_Read);
@@ -773,12 +732,10 @@ status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t
 
     /* Send command buffer */
     uint32_t index = 0;
-    while (cmdCount--)
-    {
+    while (cmdCount--) {
         /* Wait until there is room in the fifo. This also checks for errors. */
         result = LPI2C_MasterWaitForTxReady(base);
-        if (result)
-        {
+        if (result) {
             return result;
         }
 
@@ -788,25 +745,21 @@ status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t
     }
 
     /* Transmit data. */
-    if ((transfer->direction == kLPI2C_Write) && (transfer->dataSize > 0))
-    {
+    if ((transfer->direction == kLPI2C_Write) && (transfer->dataSize > 0)) {
         /* Send Data. */
         result = LPI2C_MasterSend(base, transfer->data, transfer->dataSize);
     }
 
     /* Receive Data. */
-    if ((transfer->direction == kLPI2C_Read) && (transfer->dataSize > 0))
-    {
+    if ((transfer->direction == kLPI2C_Read) && (transfer->dataSize > 0)) {
         result = LPI2C_MasterReceive(base, transfer->data, transfer->dataSize);
     }
 
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
-    if ((transfer->flags & kLPI2C_TransferNoStopFlag) == 0)
-    {
+    if ((transfer->flags & kLPI2C_TransferNoStopFlag) == 0) {
         result = LPI2C_MasterStop(base);
     }
 
@@ -830,7 +783,7 @@ void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base,
 
     /* Save base and instance. */
     handle->completionCallback = callback;
-    handle->userData = userData;
+    handle->userData           = userData;
 
     /* Save this handle for IRQ use. */
     s_lpi2cMasterHandle[instance] = handle;
@@ -864,7 +817,7 @@ static status_t LPI2C_RunTransferStateMachine(LPI2C_Type *base, lpi2c_master_han
     lpi2c_master_transfer_t *xfer;
     size_t txCount;
     size_t rxCount;
-    size_t txFifoSize = FSL_FEATURE_LPI2C_FIFO_SIZEn(base);
+    size_t txFifoSize   = FSL_FEATURE_LPI2C_FIFO_SIZEn(base);
     bool state_complete = false;
 
     /* Set default isDone return value. */
@@ -873,8 +826,7 @@ static status_t LPI2C_RunTransferStateMachine(LPI2C_Type *base, lpi2c_master_han
     /* Check for errors. */
     status = LPI2C_MasterGetStatusFlags(base);
     result = LPI2C_MasterCheckAndClearError(base, status);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -885,136 +837,117 @@ static status_t LPI2C_RunTransferStateMachine(LPI2C_Type *base, lpi2c_master_han
     LPI2C_MasterGetFifoCounts(base, &rxCount, &txCount);
     txCount = txFifoSize - txCount;
 
-    while (!state_complete)
-    {
+    while (!state_complete) {
         /* Execute the state. */
-        switch (handle->state)
-        {
-            case kSendCommandState:
-            {
-                /* Make sure there is room in the tx fifo for the next command. */
-                if (!txCount--)
-                {
-                    state_complete = true;
-                    break;
-                }
-
-                /* Issue command. buf is a uint8_t* pointing at the uint16 command array. */
-                base->MTDR = *(uint16_t *)handle->buf;
-                handle->buf += sizeof(uint16_t);
-
-                /* Count down until all commands are sent. */
-                if (--handle->remainingBytes == 0)
-                {
-                    /* Choose next state and set up buffer pointer and count. */
-                    if (xfer->dataSize)
-                    {
-                        /* Either a send or receive transfer is next. */
-                        handle->state = kTransferDataState;
-                        handle->buf = (uint8_t *)xfer->data;
-                        handle->remainingBytes = xfer->dataSize;
-                        if (xfer->direction == kLPI2C_Read)
-                        {
-                            /* Disable TX interrupt */
-                            LPI2C_MasterDisableInterrupts(base, kLPI2C_MasterTxReadyFlag);
-                        }
-                    }
-                    else
-                    {
-                        /* No transfer, so move to stop state. */
-                        handle->state = kStopState;
-                    }
-                }
+        switch (handle->state) {
+        case kSendCommandState: {
+            /* Make sure there is room in the tx fifo for the next command. */
+            if (!txCount--) {
+                state_complete = true;
                 break;
             }
 
-            case kIssueReadCommandState:
-                /* Make sure there is room in the tx fifo for the read command. */
-                if (!txCount--)
-                {
-                    state_complete = true;
-                    break;
-                }
+            /* Issue command. buf is a uint8_t* pointing at the uint16 command array. */
+            base->MTDR = *(uint16_t *)handle->buf;
+            handle->buf += sizeof(uint16_t);
 
-                base->MTDR = kRxDataCmd | LPI2C_MTDR_DATA(xfer->dataSize - 1);
-
-                /* Move to transfer state. */
-                handle->state = kTransferDataState;
-                if (xfer->direction == kLPI2C_Read)
-                {
-                    /* Disable TX interrupt */
-                    LPI2C_MasterDisableInterrupts(base, kLPI2C_MasterTxReadyFlag);
-                }
-                break;
-
-            case kTransferDataState:
-                if (xfer->direction == kLPI2C_Write)
-                {
-                    /* Make sure there is room in the tx fifo. */
-                    if (!txCount--)
-                    {
-                        state_complete = true;
-                        break;
+            /* Count down until all commands are sent. */
+            if (--handle->remainingBytes == 0) {
+                /* Choose next state and set up buffer pointer and count. */
+                if (xfer->dataSize) {
+                    /* Either a send or receive transfer is next. */
+                    handle->state          = kTransferDataState;
+                    handle->buf            = (uint8_t *)xfer->data;
+                    handle->remainingBytes = xfer->dataSize;
+                    if (xfer->direction == kLPI2C_Read) {
+                        /* Disable TX interrupt */
+                        LPI2C_MasterDisableInterrupts(base, kLPI2C_MasterTxReadyFlag);
                     }
-
-                    /* Put byte to send in fifo. */
-                    base->MTDR = *(handle->buf)++;
                 }
-                else
-                {
-                    /* XXX handle receive sizes > 256, use kIssueReadCommandState */
-                    /* Make sure there is data in the rx fifo. */
-                    if (!rxCount--)
-                    {
-                        state_complete = true;
-                        break;
-                    }
-
-                    /* Read byte from fifo. */
-                    *(handle->buf)++ = base->MRDR & LPI2C_MRDR_DATA_MASK;
-                }
-
-                /* Move to stop when the transfer is done. */
-                if (--handle->remainingBytes == 0)
-                {
+                else {
+                    /* No transfer, so move to stop state. */
                     handle->state = kStopState;
                 }
+            }
+            break;
+        }
+
+        case kIssueReadCommandState:
+            /* Make sure there is room in the tx fifo for the read command. */
+            if (!txCount--) {
+                state_complete = true;
                 break;
+            }
 
-            case kStopState:
-                /* Only issue a stop transition if the caller requested it. */
-                if ((xfer->flags & kLPI2C_TransferNoStopFlag) == 0)
-                {
-                    /* Make sure there is room in the tx fifo for the stop command. */
-                    if (!txCount--)
-                    {
-                        state_complete = true;
-                        break;
-                    }
+            base->MTDR = kRxDataCmd | LPI2C_MTDR_DATA(xfer->dataSize - 1);
 
-                    base->MTDR = kStopCmd;
-                }
-                else
-                {
-                    /* Caller doesn't want to send a stop, so we're done now. */
-                    *isDone = true;
+            /* Move to transfer state. */
+            handle->state = kTransferDataState;
+            if (xfer->direction == kLPI2C_Read) {
+                /* Disable TX interrupt */
+                LPI2C_MasterDisableInterrupts(base, kLPI2C_MasterTxReadyFlag);
+            }
+            break;
+
+        case kTransferDataState:
+            if (xfer->direction == kLPI2C_Write) {
+                /* Make sure there is room in the tx fifo. */
+                if (!txCount--) {
                     state_complete = true;
                     break;
                 }
-                handle->state = kWaitForCompletionState;
-                break;
 
-            case kWaitForCompletionState:
-                /* We stay in this state until the stop state is detected. */
-                if (status & kLPI2C_MasterStopDetectFlag)
-                {
-                    *isDone = true;
+                /* Put byte to send in fifo. */
+                base->MTDR = *(handle->buf)++;
+            }
+            else {
+                /* XXX handle receive sizes > 256, use kIssueReadCommandState */
+                /* Make sure there is data in the rx fifo. */
+                if (!rxCount--) {
+                    state_complete = true;
+                    break;
                 }
+
+                /* Read byte from fifo. */
+                *(handle->buf)++ = base->MRDR & LPI2C_MRDR_DATA_MASK;
+            }
+
+            /* Move to stop when the transfer is done. */
+            if (--handle->remainingBytes == 0) {
+                handle->state = kStopState;
+            }
+            break;
+
+        case kStopState:
+            /* Only issue a stop transition if the caller requested it. */
+            if ((xfer->flags & kLPI2C_TransferNoStopFlag) == 0) {
+                /* Make sure there is room in the tx fifo for the stop command. */
+                if (!txCount--) {
+                    state_complete = true;
+                    break;
+                }
+
+                base->MTDR = kStopCmd;
+            }
+            else {
+                /* Caller doesn't want to send a stop, so we're done now. */
+                *isDone        = true;
                 state_complete = true;
                 break;
-            default:
-                assert(false);
-                break;
+            }
+            handle->state = kWaitForCompletionState;
+            break;
+
+        case kWaitForCompletionState:
+            /* We stay in this state until the stop state is detected. */
+            if (status & kLPI2C_MasterStopDetectFlag) {
+                *isDone = true;
+            }
+            state_complete = true;
+            break;
+        default:
+            assert(false);
+            break;
         }
     }
     return result;
@@ -1029,25 +962,21 @@ static void LPI2C_InitTransferStateMachine(lpi2c_master_handle_t *handle)
     lpi2c_master_transfer_t *xfer = &handle->transfer;
 
     /* Handle no start option. */
-    if (xfer->flags & kLPI2C_TransferNoStartFlag)
-    {
-        if (xfer->direction == kLPI2C_Read)
-        {
+    if (xfer->flags & kLPI2C_TransferNoStartFlag) {
+        if (xfer->direction == kLPI2C_Read) {
             /* Need to issue read command first. */
             handle->state = kIssueReadCommandState;
         }
-        else
-        {
+        else {
             /* Start immediately in the data transfer state. */
             handle->state = kTransferDataState;
         }
 
-        handle->buf = (uint8_t *)xfer->data;
+        handle->buf            = (uint8_t *)xfer->data;
         handle->remainingBytes = xfer->dataSize;
     }
-    else
-    {
-        uint16_t *cmd = (uint16_t *)&handle->commandBuffer;
+    else {
+        uint16_t *cmd     = (uint16_t *)&handle->commandBuffer;
         uint32_t cmdCount = 0;
 
         /* Initial direction depends on whether a subaddress was provided, and of course the actual */
@@ -1059,22 +988,18 @@ static void LPI2C_InitTransferStateMachine(lpi2c_master_handle_t *handle)
             (uint16_t)kStartCmd | (uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)direction);
 
         /* Subaddress, MSB first. */
-        if (xfer->subaddressSize)
-        {
+        if (xfer->subaddressSize) {
             uint32_t subaddressRemaining = xfer->subaddressSize;
-            while (subaddressRemaining--)
-            {
+            while (subaddressRemaining--) {
                 uint8_t subaddressByte = (xfer->subaddress >> (8 * subaddressRemaining)) & 0xff;
-                cmd[cmdCount++] = subaddressByte;
+                cmd[cmdCount++]        = subaddressByte;
             }
         }
 
         /* Reads need special handling. */
-        if ((xfer->dataSize) && (xfer->direction == kLPI2C_Read))
-        {
+        if ((xfer->dataSize) && (xfer->direction == kLPI2C_Read)) {
             /* Need to send repeated start if switching directions to read. */
-            if (direction == kLPI2C_Write)
-            {
+            if (direction == kLPI2C_Write) {
                 cmd[cmdCount++] = (uint16_t)kStartCmd |
                                   (uint16_t)((uint16_t)((uint16_t)xfer->slaveAddress << 1U) | (uint16_t)kLPI2C_Read);
             }
@@ -1084,9 +1009,9 @@ static void LPI2C_InitTransferStateMachine(lpi2c_master_handle_t *handle)
         }
 
         /* Set up state machine for transferring the commands. */
-        handle->state = kSendCommandState;
+        handle->state          = kSendCommandState;
         handle->remainingBytes = cmdCount;
-        handle->buf = (uint8_t *)&handle->commandBuffer;
+        handle->buf            = (uint8_t *)&handle->commandBuffer;
     }
 }
 
@@ -1101,15 +1026,13 @@ status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base,
     assert(transfer->subaddressSize <= sizeof(transfer->subaddress));
 
     /* Return busy if another transaction is in progress. */
-    if (handle->state != kIdleState)
-    {
+    if (handle->state != kIdleState) {
         return kStatus_LPI2C_Busy;
     }
 
     /* Return an error if the bus is already in use not by us. */
     result = LPI2C_CheckForBusyBus(base);
-    if (result)
-    {
+    if (result) {
         return result;
     }
 
@@ -1138,14 +1061,12 @@ status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *h
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (handle->state == kIdleState)
-    {
+    if (handle->state == kIdleState) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
@@ -1158,29 +1079,28 @@ status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *h
     /* are synchronized with each other during an ongoing transfer. */
     uint32_t irqs = LPI2C_MasterGetEnabledInterrupts(base);
     LPI2C_MasterDisableInterrupts(base, irqs);
-    state = handle->state;
+    state          = handle->state;
     remainingBytes = handle->remainingBytes;
-    dataSize = handle->transfer.dataSize;
+    dataSize       = handle->transfer.dataSize;
     LPI2C_MasterEnableInterrupts(base, irqs);
 
     /* Get transfer count based on current transfer state. */
-    switch (state)
-    {
-        case kIdleState:
-        case kSendCommandState:
-        case kIssueReadCommandState: /* XXX return correct value for this state when >256 reads are supported */
-            *count = 0;
-            break;
+    switch (state) {
+    case kIdleState:
+    case kSendCommandState:
+    case kIssueReadCommandState: /* XXX return correct value for this state when >256 reads are supported */
+        *count = 0;
+        break;
 
-        case kTransferDataState:
-            *count = dataSize - remainingBytes;
-            break;
+    case kTransferDataState:
+        *count = dataSize - remainingBytes;
+        break;
 
-        case kStopState:
-        case kWaitForCompletionState:
-        default:
-            *count = dataSize;
-            break;
+    case kStopState:
+    case kWaitForCompletionState:
+    default:
+        *count = dataSize;
+        break;
     }
 
     return kStatus_Success;
@@ -1188,8 +1108,7 @@ status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *h
 
 void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle)
 {
-    if (handle->state != kIdleState)
-    {
+    if (handle->state != kIdleState) {
         /* Disable internal IRQ enables. */
         LPI2C_MasterDisableInterrupts(base, kMasterIrqFlags);
 
@@ -1210,20 +1129,17 @@ void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *hand
     status_t result;
 
     /* Don't do anything if we don't have a valid handle. */
-    if (!handle)
-    {
+    if (!handle) {
         return;
     }
 
-    if (handle->state == kIdleState)
-    {
+    if (handle->state == kIdleState) {
         return;
     }
 
     result = LPI2C_RunTransferStateMachine(base, handle, &isDone);
 
-    if (isDone || (result != kStatus_Success))
-    {
+    if (isDone || (result != kStatus_Success)) {
         /* XXX need to handle data that may be in rx fifo below watermark level? */
 
         /* XXX handle error, terminate xfer */
@@ -1235,8 +1151,7 @@ void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *hand
         handle->state = kIdleState;
 
         /* Invoke callback. */
-        if (handle->completionCallback)
-        {
+        if (handle->completionCallback) {
             handle->completionCallback(base, handle, result, handle->userData);
         }
     }
@@ -1244,23 +1159,23 @@ void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *hand
 
 void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig)
 {
-    slaveConfig->enableSlave = true;
-    slaveConfig->address0 = 0U;
-    slaveConfig->address1 = 0U;
-    slaveConfig->addressMatchMode = kLPI2C_MatchAddress0;
-    slaveConfig->filterDozeEnable = true;
-    slaveConfig->filterEnable = true;
-    slaveConfig->enableGeneralCall = false;
-    slaveConfig->sclStall.enableAck = false;
-    slaveConfig->sclStall.enableTx = true;
-    slaveConfig->sclStall.enableRx = true;
-    slaveConfig->sclStall.enableAddress = false;
-    slaveConfig->ignoreAck = false;
+    slaveConfig->enableSlave               = true;
+    slaveConfig->address0                  = 0U;
+    slaveConfig->address1                  = 0U;
+    slaveConfig->addressMatchMode          = kLPI2C_MatchAddress0;
+    slaveConfig->filterDozeEnable          = true;
+    slaveConfig->filterEnable              = true;
+    slaveConfig->enableGeneralCall         = false;
+    slaveConfig->sclStall.enableAck        = false;
+    slaveConfig->sclStall.enableTx         = true;
+    slaveConfig->sclStall.enableRx         = true;
+    slaveConfig->sclStall.enableAddress    = false;
+    slaveConfig->ignoreAck                 = false;
     slaveConfig->enableReceivedAddressRead = false;
-    slaveConfig->sdaGlitchFilterWidth_ns = 0; /* TODO determine default width values */
-    slaveConfig->sclGlitchFilterWidth_ns = 0;
-    slaveConfig->dataValidDelay_ns = 0;
-    slaveConfig->clockHoldTime_ns = 0;
+    slaveConfig->sdaGlitchFilterWidth_ns   = 0; /* TODO determine default width values */
+    slaveConfig->sclGlitchFilterWidth_ns   = 0;
+    slaveConfig->dataValidDelay_ns         = 0;
+    slaveConfig->clockHoldTime_ns          = 0;
 }
 
 void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz)
@@ -1292,14 +1207,22 @@ void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig,
         LPI2C_SCFGR1_ADRSTALL(slaveConfig->sclStall.enableAddress);
 
     base->SCFGR2 =
-        LPI2C_SCFGR2_FILTSDA(LPI2C_GetCyclesForWidth(sourceClock_Hz, slaveConfig->sdaGlitchFilterWidth_ns,
-                                                     (LPI2C_SCFGR2_FILTSDA_MASK >> LPI2C_SCFGR2_FILTSDA_SHIFT), 1)) |
-        LPI2C_SCFGR2_FILTSCL(LPI2C_GetCyclesForWidth(sourceClock_Hz, slaveConfig->sclGlitchFilterWidth_ns,
-                                                     (LPI2C_SCFGR2_FILTSCL_MASK >> LPI2C_SCFGR2_FILTSCL_SHIFT), 1)) |
-        LPI2C_SCFGR2_DATAVD(LPI2C_GetCyclesForWidth(sourceClock_Hz, slaveConfig->dataValidDelay_ns,
-                                                    (LPI2C_SCFGR2_DATAVD_MASK >> LPI2C_SCFGR2_DATAVD_SHIFT), 1)) |
-        LPI2C_SCFGR2_CLKHOLD(LPI2C_GetCyclesForWidth(sourceClock_Hz, slaveConfig->clockHoldTime_ns,
-                                                     (LPI2C_SCFGR2_CLKHOLD_MASK >> LPI2C_SCFGR2_CLKHOLD_SHIFT), 1));
+        LPI2C_SCFGR2_FILTSDA(LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                                     slaveConfig->sdaGlitchFilterWidth_ns,
+                                                     (LPI2C_SCFGR2_FILTSDA_MASK >> LPI2C_SCFGR2_FILTSDA_SHIFT),
+                                                     1)) |
+        LPI2C_SCFGR2_FILTSCL(LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                                     slaveConfig->sclGlitchFilterWidth_ns,
+                                                     (LPI2C_SCFGR2_FILTSCL_MASK >> LPI2C_SCFGR2_FILTSCL_SHIFT),
+                                                     1)) |
+        LPI2C_SCFGR2_DATAVD(LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                                    slaveConfig->dataValidDelay_ns,
+                                                    (LPI2C_SCFGR2_DATAVD_MASK >> LPI2C_SCFGR2_DATAVD_SHIFT),
+                                                    1)) |
+        LPI2C_SCFGR2_CLKHOLD(LPI2C_GetCyclesForWidth(sourceClock_Hz,
+                                                     slaveConfig->clockHoldTime_ns,
+                                                     (LPI2C_SCFGR2_CLKHOLD_MASK >> LPI2C_SCFGR2_CLKHOLD_SHIFT),
+                                                     1));
 
     /* Save SCR to last so we don't enable slave until it is configured */
     base->SCR = LPI2C_SCR_FILTDZ(slaveConfig->filterDozeEnable) | LPI2C_SCR_FILTEN(slaveConfig->filterEnable) |
@@ -1338,18 +1261,14 @@ static status_t LPI2C_SlaveCheckAndClearError(LPI2C_Type *base, uint32_t flags)
     status_t result = kStatus_Success;
 
     flags &= kSlaveErrorFlags;
-    if (flags)
-    {
-        if (flags & kLPI2C_SlaveBitErrFlag)
-        {
+    if (flags) {
+        if (flags & kLPI2C_SlaveBitErrFlag) {
             result = kStatus_LPI2C_BitError;
         }
-        else if (flags & kLPI2C_SlaveFifoErrFlag)
-        {
+        else if (flags & kLPI2C_SlaveFifoErrFlag) {
             result = kStatus_LPI2C_FifoError;
         }
-        else
-        {
+        else {
             assert(false);
         }
 
@@ -1363,7 +1282,7 @@ static status_t LPI2C_SlaveCheckAndClearError(LPI2C_Type *base, uint32_t flags)
 status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, size_t *actualTxSize)
 {
     const uint8_t *buf = (const uint8_t *)((const void *)txBuff);
-    size_t remaining = txSize;
+    size_t remaining   = txSize;
 
     assert(txBuff);
 
@@ -1371,21 +1290,17 @@ status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, si
     uint32_t waitTimes = LPI2C_WAIT_TIMEOUT;
 #endif
 
-    while (remaining)
-    {
+    while (remaining) {
         uint32_t flags;
         status_t result;
 
         /* Wait until we can transmit. */
-        do
-        {
+        do {
             /* Check for errors */
-            flags = LPI2C_SlaveGetStatusFlags(base);
+            flags  = LPI2C_SlaveGetStatusFlags(base);
             result = LPI2C_SlaveCheckAndClearError(base, flags);
-            if (result)
-            {
-                if (actualTxSize)
-                {
+            if (result) {
+                if (actualTxSize) {
                     *actualTxSize = txSize - remaining;
                 }
                 return result;
@@ -1394,8 +1309,7 @@ status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, si
         } while (
             (!(flags & (kLPI2C_SlaveTxReadyFlag | kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag))) &&
             (--waitTimes));
-        if (waitTimes == 0)
-        {
+        if (waitTimes == 0) {
             return kStatus_LPI2C_Timeout;
         }
 #else
@@ -1404,22 +1318,19 @@ status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, si
 #endif
 
         /* Send a byte. */
-        if (flags & kLPI2C_SlaveTxReadyFlag)
-        {
+        if (flags & kLPI2C_SlaveTxReadyFlag) {
             base->STDR = *buf++;
             --remaining;
         }
 
         /* Exit loop if we see a stop or restart */
-        if (flags & (kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag))
-        {
+        if (flags & (kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag)) {
             LPI2C_SlaveClearStatusFlags(base, kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag);
             break;
         }
     }
 
-    if (actualTxSize)
-    {
+    if (actualTxSize) {
         *actualTxSize = txSize - remaining;
     }
 
@@ -1428,7 +1339,7 @@ status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, si
 
 status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize)
 {
-    uint8_t *buf = (uint8_t *)rxBuff;
+    uint8_t *buf     = (uint8_t *)rxBuff;
     size_t remaining = rxSize;
 
     assert(rxBuff);
@@ -1437,21 +1348,17 @@ status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_
     uint32_t waitTimes = LPI2C_WAIT_TIMEOUT;
 #endif
 
-    while (remaining)
-    {
+    while (remaining) {
         uint32_t flags;
         status_t result;
 
         /* Wait until we can receive. */
-        do
-        {
+        do {
             /* Check for errors */
-            flags = LPI2C_SlaveGetStatusFlags(base);
+            flags  = LPI2C_SlaveGetStatusFlags(base);
             result = LPI2C_SlaveCheckAndClearError(base, flags);
-            if (result)
-            {
-                if (actualRxSize)
-                {
+            if (result) {
+                if (actualRxSize) {
                     *actualRxSize = rxSize - remaining;
                 }
                 return result;
@@ -1460,8 +1367,7 @@ status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_
         } while (
             (!(flags & (kLPI2C_SlaveRxReadyFlag | kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag))) &&
             (--waitTimes));
-        if (waitTimes == 0)
-        {
+        if (waitTimes == 0) {
             return kStatus_LPI2C_Timeout;
         }
 #else
@@ -1470,22 +1376,19 @@ status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_
 #endif
 
         /* Receive a byte. */
-        if (flags & kLPI2C_SlaveRxReadyFlag)
-        {
+        if (flags & kLPI2C_SlaveRxReadyFlag) {
             *buf++ = base->SRDR & LPI2C_SRDR_DATA_MASK;
             --remaining;
         }
 
         /* Exit loop if we see a stop or restart */
-        if (flags & (kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag))
-        {
+        if (flags & (kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag)) {
             LPI2C_SlaveClearStatusFlags(base, kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveRepeatedStartDetectFlag);
             break;
         }
     }
 
-    if (actualRxSize)
-    {
+    if (actualRxSize) {
         *actualRxSize = rxSize - remaining;
     }
 
@@ -1532,15 +1435,13 @@ status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *
     assert(handle);
 
     /* Return busy if another transaction is in progress. */
-    if (handle->isBusy)
-    {
+    if (handle->isBusy) {
         return kStatus_LPI2C_Busy;
     }
 
     /* Return an error if the bus is already in use not by us. */
     status = LPI2C_SlaveGetStatusFlags(base);
-    if ((status & kLPI2C_SlaveBusBusyFlag) && (!(status & kLPI2C_SlaveBusyFlag)))
-    {
+    if ((status & kLPI2C_SlaveBusBusyFlag) && (!(status & kLPI2C_SlaveBusyFlag))) {
         return kStatus_LPI2C_Busy;
     }
 
@@ -1572,14 +1473,12 @@ status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *han
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (!handle->isBusy)
-    {
+    if (!handle->isBusy) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
@@ -1595,8 +1494,7 @@ void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle)
     assert(handle);
 
     /* Return idle if no transaction is in progress. */
-    if (handle->isBusy)
-    {
+    if (handle->isBusy) {
         /* Disable LPI2C IRQ sources. */
         LPI2C_SlaveDisableInterrupts(base, kSlaveIrqFlags);
 
@@ -1617,8 +1515,7 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
     lpi2c_slave_transfer_t *xfer;
 
     /* Check for a valid handle in case of a spurious interrupt. */
-    if (!handle)
-    {
+    if (!handle) {
         return;
     }
 
@@ -1627,32 +1524,27 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
     /* Get status flags. */
     flags = LPI2C_SlaveGetStatusFlags(base);
 
-    if (flags & (kLPI2C_SlaveBitErrFlag | kLPI2C_SlaveFifoErrFlag))
-    {
-        xfer->event = kLPI2C_SlaveCompletionEvent;
+    if (flags & (kLPI2C_SlaveBitErrFlag | kLPI2C_SlaveFifoErrFlag)) {
+        xfer->event            = kLPI2C_SlaveCompletionEvent;
         xfer->completionStatus = LPI2C_SlaveCheckAndClearError(base, flags);
 
-        if ((handle->eventMask & kLPI2C_SlaveCompletionEvent) && (handle->callback))
-        {
+        if ((handle->eventMask & kLPI2C_SlaveCompletionEvent) && (handle->callback)) {
             handle->callback(base, xfer, handle->userData);
         }
         return;
     }
-    if (flags & (kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveStopDetectFlag))
-    {
-        xfer->event = (flags & kLPI2C_SlaveRepeatedStartDetectFlag) ? kLPI2C_SlaveRepeatedStartEvent :
-                                                                      kLPI2C_SlaveCompletionEvent;
-        xfer->receivedAddress = 0;
+    if (flags & (kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveStopDetectFlag)) {
+        xfer->event = (flags & kLPI2C_SlaveRepeatedStartDetectFlag) ? kLPI2C_SlaveRepeatedStartEvent
+                                                                    : kLPI2C_SlaveCompletionEvent;
+        xfer->receivedAddress  = 0;
         xfer->completionStatus = kStatus_Success;
         xfer->transferredCount = handle->transferredCount;
 
-        if (xfer->event == kLPI2C_SlaveCompletionEvent)
-        {
+        if (xfer->event == kLPI2C_SlaveCompletionEvent) {
             handle->isBusy = false;
         }
 
-        if (handle->wasTransmit)
-        {
+        if (handle->wasTransmit) {
             /* Subtract one from the transmit count to offset the fact that LPI2C asserts the */
             /* tx flag before it sees the nack from the master-receiver, thus causing one more */
             /* count that the master actually receives. */
@@ -1666,45 +1558,37 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
         /* Revert to sending an Ack by default, in case we sent a Nack for receive. */
         base->STAR = 0;
 
-        if ((handle->eventMask & xfer->event) && (handle->callback))
-        {
+        if ((handle->eventMask & xfer->event) && (handle->callback)) {
             handle->callback(base, xfer, handle->userData);
         }
 
         /* Clean up transfer info on completion, after the callback has been invoked. */
         memset(&handle->transfer, 0, sizeof(handle->transfer));
     }
-    if (flags & kLPI2C_SlaveAddressValidFlag)
-    {
-        xfer->event = kLPI2C_SlaveAddressMatchEvent;
+    if (flags & kLPI2C_SlaveAddressValidFlag) {
+        xfer->event           = kLPI2C_SlaveAddressMatchEvent;
         xfer->receivedAddress = base->SASR & LPI2C_SASR_RADDR_MASK;
 
-        if ((handle->eventMask & kLPI2C_SlaveAddressMatchEvent) && (handle->callback))
-        {
+        if ((handle->eventMask & kLPI2C_SlaveAddressMatchEvent) && (handle->callback)) {
             handle->callback(base, xfer, handle->userData);
         }
     }
-    if (flags & kLPI2C_SlaveTransmitAckFlag)
-    {
+    if (flags & kLPI2C_SlaveTransmitAckFlag) {
         xfer->event = kLPI2C_SlaveTransmitAckEvent;
 
-        if ((handle->eventMask & kLPI2C_SlaveTransmitAckEvent) && (handle->callback))
-        {
+        if ((handle->eventMask & kLPI2C_SlaveTransmitAckEvent) && (handle->callback)) {
             handle->callback(base, xfer, handle->userData);
         }
     }
 
     /* Handle transmit and receive. */
-    if (flags & kLPI2C_SlaveTxReadyFlag)
-    {
+    if (flags & kLPI2C_SlaveTxReadyFlag) {
         handle->wasTransmit = true;
 
         /* If we're out of data, invoke callback to get more. */
-        if ((!xfer->data) || (!xfer->dataSize))
-        {
+        if ((!xfer->data) || (!xfer->dataSize)) {
             xfer->event = kLPI2C_SlaveTransmitEvent;
-            if (handle->callback)
-            {
+            if (handle->callback) {
                 handle->callback(base, xfer, handle->userData);
             }
 
@@ -1713,21 +1597,17 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
         }
 
         /* Transmit a byte. */
-        if ((xfer->data) && (xfer->dataSize))
-        {
+        if ((xfer->data) && (xfer->dataSize)) {
             base->STDR = *xfer->data++;
             --xfer->dataSize;
             ++handle->transferredCount;
         }
     }
-    if (flags & kLPI2C_SlaveRxReadyFlag)
-    {
+    if (flags & kLPI2C_SlaveRxReadyFlag) {
         /* If we're out of room in the buffer, invoke callback to get another. */
-        if ((!xfer->data) || (!xfer->dataSize))
-        {
+        if ((!xfer->data) || (!xfer->dataSize)) {
             xfer->event = kLPI2C_SlaveReceiveEvent;
-            if (handle->callback)
-            {
+            if (handle->callback) {
                 handle->callback(base, xfer, handle->userData);
             }
 
@@ -1736,14 +1616,12 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
         }
 
         /* Receive a byte. */
-        if ((xfer->data) && (xfer->dataSize))
-        {
+        if ((xfer->data) && (xfer->dataSize)) {
             *xfer->data++ = base->SRDR;
             --xfer->dataSize;
             ++handle->transferredCount;
         }
-        else
-        {
+        else {
             /* We don't have any room to receive more data, so send a nack. */
             base->STAR = LPI2C_STAR_TXNACK_MASK;
         }
@@ -1763,15 +1641,13 @@ void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle
 static void LPI2C_CommonIRQHandler(LPI2C_Type *base, uint32_t instance)
 {
     /* Check for master IRQ. */
-    if ((base->MCR & LPI2C_MCR_MEN_MASK) && s_lpi2cMasterIsr)
-    {
+    if ((base->MCR & LPI2C_MCR_MEN_MASK) && s_lpi2cMasterIsr) {
         /* Master mode. */
         s_lpi2cMasterIsr(base, s_lpi2cMasterHandle[instance]);
     }
 
     /* Check for slave IRQ. */
-    if ((base->SCR & LPI2C_SCR_SEN_MASK) && s_lpi2cSlaveIsr)
-    {
+    if ((base->SCR & LPI2C_SCR_SEN_MASK) && s_lpi2cSlaveIsr) {
         /* Slave mode. */
         s_lpi2cSlaveIsr(base, s_lpi2cSlaveHandle[instance]);
     }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.h
index 1706a548e..8b97e62e6 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpi2c.h
@@ -63,16 +63,16 @@ enum _lpi2c_status
 {
     kStatus_LPI2C_Busy = MAKE_STATUS(kStatusGroup_LPI2C, 0), /*!< The master is already performing a transfer. */
     kStatus_LPI2C_Idle = MAKE_STATUS(kStatusGroup_LPI2C, 1), /*!< The slave driver is idle. */
-    kStatus_LPI2C_Nak = MAKE_STATUS(kStatusGroup_LPI2C, 2),  /*!< The slave device sent a NAK in response to a byte. */
-    kStatus_LPI2C_FifoError = MAKE_STATUS(kStatusGroup_LPI2C, 3),       /*!< FIFO under run or overrun. */
-    kStatus_LPI2C_BitError = MAKE_STATUS(kStatusGroup_LPI2C, 4),        /*!< Transferred bit was not seen on the bus. */
+    kStatus_LPI2C_Nak  = MAKE_STATUS(kStatusGroup_LPI2C, 2), /*!< The slave device sent a NAK in response to a byte. */
+    kStatus_LPI2C_FifoError       = MAKE_STATUS(kStatusGroup_LPI2C, 3), /*!< FIFO under run or overrun. */
+    kStatus_LPI2C_BitError        = MAKE_STATUS(kStatusGroup_LPI2C, 4), /*!< Transferred bit was not seen on the bus. */
     kStatus_LPI2C_ArbitrationLost = MAKE_STATUS(kStatusGroup_LPI2C, 5), /*!< Arbitration lost error. */
     kStatus_LPI2C_PinLowTimeout =
         MAKE_STATUS(kStatusGroup_LPI2C, 6), /*!< SCL or SDA were held low longer than the timeout. */
     kStatus_LPI2C_NoTransferInProgress =
         MAKE_STATUS(kStatusGroup_LPI2C, 7), /*!< Attempt to abort a transfer when one is not in progress. */
     kStatus_LPI2C_DmaRequestFail = MAKE_STATUS(kStatusGroup_LPI2C, 8), /*!< DMA request failed. */
-    kStatus_LPI2C_Timeout = MAKE_STATUS(kStatusGroup_LPI2C, 9),        /*!< Timeout poling status flags. */
+    kStatus_LPI2C_Timeout        = MAKE_STATUS(kStatusGroup_LPI2C, 9), /*!< Timeout poling status flags. */
 };
 
 /*! @} */
@@ -101,33 +101,33 @@ enum _lpi2c_status
  */
 enum _lpi2c_master_flags
 {
-    kLPI2C_MasterTxReadyFlag = LPI2C_MSR_TDF_MASK,         /*!< Transmit data flag */
-    kLPI2C_MasterRxReadyFlag = LPI2C_MSR_RDF_MASK,         /*!< Receive data flag */
-    kLPI2C_MasterEndOfPacketFlag = LPI2C_MSR_EPF_MASK,     /*!< End Packet flag */
-    kLPI2C_MasterStopDetectFlag = LPI2C_MSR_SDF_MASK,      /*!< Stop detect flag */
-    kLPI2C_MasterNackDetectFlag = LPI2C_MSR_NDF_MASK,      /*!< NACK detect flag */
-    kLPI2C_MasterArbitrationLostFlag = LPI2C_MSR_ALF_MASK, /*!< Arbitration lost flag */
-    kLPI2C_MasterFifoErrFlag = LPI2C_MSR_FEF_MASK,         /*!< FIFO error flag */
-    kLPI2C_MasterPinLowTimeoutFlag = LPI2C_MSR_PLTF_MASK,  /*!< Pin low timeout flag */
-    kLPI2C_MasterDataMatchFlag = LPI2C_MSR_DMF_MASK,       /*!< Data match flag */
-    kLPI2C_MasterBusyFlag = LPI2C_MSR_MBF_MASK,            /*!< Master busy flag */
-    kLPI2C_MasterBusBusyFlag = LPI2C_MSR_BBF_MASK          /*!< Bus busy flag */
+    kLPI2C_MasterTxReadyFlag         = LPI2C_MSR_TDF_MASK,  /*!< Transmit data flag */
+    kLPI2C_MasterRxReadyFlag         = LPI2C_MSR_RDF_MASK,  /*!< Receive data flag */
+    kLPI2C_MasterEndOfPacketFlag     = LPI2C_MSR_EPF_MASK,  /*!< End Packet flag */
+    kLPI2C_MasterStopDetectFlag      = LPI2C_MSR_SDF_MASK,  /*!< Stop detect flag */
+    kLPI2C_MasterNackDetectFlag      = LPI2C_MSR_NDF_MASK,  /*!< NACK detect flag */
+    kLPI2C_MasterArbitrationLostFlag = LPI2C_MSR_ALF_MASK,  /*!< Arbitration lost flag */
+    kLPI2C_MasterFifoErrFlag         = LPI2C_MSR_FEF_MASK,  /*!< FIFO error flag */
+    kLPI2C_MasterPinLowTimeoutFlag   = LPI2C_MSR_PLTF_MASK, /*!< Pin low timeout flag */
+    kLPI2C_MasterDataMatchFlag       = LPI2C_MSR_DMF_MASK,  /*!< Data match flag */
+    kLPI2C_MasterBusyFlag            = LPI2C_MSR_MBF_MASK,  /*!< Master busy flag */
+    kLPI2C_MasterBusBusyFlag         = LPI2C_MSR_BBF_MASK   /*!< Bus busy flag */
 };
 
 /*! @brief Direction of master and slave transfers. */
 typedef enum _lpi2c_direction
 {
     kLPI2C_Write = 0U, /*!< Master transmit. */
-    kLPI2C_Read = 1U   /*!< Master receive. */
+    kLPI2C_Read  = 1U  /*!< Master receive. */
 } lpi2c_direction_t;
 
 /*! @brief LPI2C pin configuration. */
 typedef enum _lpi2c_master_pin_config
 {
-    kLPI2C_2PinOpenDrain = 0x0U,  /*!< LPI2C Configured for 2-pin open drain mode */
+    kLPI2C_2PinOpenDrain  = 0x0U, /*!< LPI2C Configured for 2-pin open drain mode */
     kLPI2C_2PinOutputOnly = 0x1U, /*!< LPI2C Configured for 2-pin output only mode (ultra-fast mode) */
-    kLPI2C_2PinPushPull = 0x2U,   /*!< LPI2C Configured for 2-pin push-pull mode */
-    kLPI2C_4PinPushPull = 0x3U,   /*!< LPI2C Configured for 4-pin push-pull mode */
+    kLPI2C_2PinPushPull   = 0x2U, /*!< LPI2C Configured for 2-pin push-pull mode */
+    kLPI2C_4PinPushPull   = 0x3U, /*!< LPI2C Configured for 4-pin push-pull mode */
     kLPI2C_2PinOpenDrainWithSeparateSlave =
         0x4U, /*!< LPI2C Configured for 2-pin open drain mode with separate LPI2C slave */
     kLPI2C_2PinOutputOnlyWithSeparateSlave =
@@ -140,15 +140,15 @@ typedef enum _lpi2c_master_pin_config
 /*! @brief LPI2C master host request selection. */
 typedef enum _lpi2c_host_request_source
 {
-    kLPI2C_HostRequestExternalPin = 0x0U,  /*!< Select the LPI2C_HREQ pin as the host request input */
+    kLPI2C_HostRequestExternalPin  = 0x0U, /*!< Select the LPI2C_HREQ pin as the host request input */
     kLPI2C_HostRequestInputTrigger = 0x1U, /*!< Select the input trigger as the host request input */
 } lpi2c_host_request_source_t;
 
 /*! @brief LPI2C master host request pin polarity configuration. */
 typedef enum _lpi2c_host_request_polarity
 {
-    kLPI2C_HostRequestPinActiveLow = 0x0U, /*!< Configure the LPI2C_HREQ pin active low */
-    kLPI2C_HostRequestPinActiveHigh = 0x1U /*!< Configure the LPI2C_HREQ pin active high */
+    kLPI2C_HostRequestPinActiveLow  = 0x0U, /*!< Configure the LPI2C_HREQ pin active low */
+    kLPI2C_HostRequestPinActiveHigh = 0x1U  /*!< Configure the LPI2C_HREQ pin active high */
 } lpi2c_host_request_polarity_t;
 
 /*!
@@ -183,7 +183,7 @@ typedef struct _lpi2c_master_config
 /*! @brief LPI2C master data match configuration modes. */
 typedef enum _lpi2c_data_match_config_mode
 {
-    kLPI2C_MatchDisabled = 0x0U,       /*!< LPI2C Match Disabled */
+    kLPI2C_MatchDisabled       = 0x0U, /*!< LPI2C Match Disabled */
     kLPI2C_1stWordEqualsM0OrM1 = 0x2U, /*!< LPI2C Match Enabled and 1st data word equals MATCH0 OR MATCH1 */
     kLPI2C_AnyWordEqualsM0OrM1 = 0x3U, /*!< LPI2C Match Enabled and any data word equals MATCH0 OR MATCH1 */
     kLPI2C_1stWordEqualsM0And2ndWordEqualsM1 =
@@ -232,10 +232,10 @@ typedef void (*lpi2c_master_transfer_callback_t)(LPI2C_Type *base,
  */
 enum _lpi2c_master_transfer_flags
 {
-    kLPI2C_TransferDefaultFlag = 0x00U,       /*!< Transfer starts with a start signal, stops with a stop signal. */
-    kLPI2C_TransferNoStartFlag = 0x01U,       /*!< Don't send a start condition, address, and sub address */
+    kLPI2C_TransferDefaultFlag       = 0x00U, /*!< Transfer starts with a start signal, stops with a stop signal. */
+    kLPI2C_TransferNoStartFlag       = 0x01U, /*!< Don't send a start condition, address, and sub address */
     kLPI2C_TransferRepeatedStartFlag = 0x02U, /*!< Send a repeated start condition */
-    kLPI2C_TransferNoStopFlag = 0x04U,        /*!< Don't send a stop condition. */
+    kLPI2C_TransferNoStopFlag        = 0x04U, /*!< Don't send a stop condition. */
 };
 
 /*!
@@ -245,10 +245,9 @@ enum _lpi2c_master_transfer_flags
  */
 struct _lpi2c_master_transfer
 {
-    uint32_t
-        flags; /*!< Bit mask of options for the transfer. See enumeration #_lpi2c_master_transfer_flags for available
-                  options. Set to 0 or #kLPI2C_TransferDefaultFlag for normal transfers. */
-    uint16_t slaveAddress;       /*!< The 7-bit slave address. */
+    uint32_t flags;        /*!< Bit mask of options for the transfer. See enumeration #_lpi2c_master_transfer_flags for
+                              available        options. Set to 0 or #kLPI2C_TransferDefaultFlag for normal transfers. */
+    uint16_t slaveAddress; /*!< The 7-bit slave address. */
     lpi2c_direction_t direction; /*!< Either #kLPI2C_Read or #kLPI2C_Write. */
     uint32_t subaddress;         /*!< Sub address. Transferred MSB first. */
     size_t subaddressSize;       /*!< Length of sub address to send in bytes. Maximum size is 4 bytes. */
@@ -294,26 +293,26 @@ struct _lpi2c_master_handle
  */
 enum _lpi2c_slave_flags
 {
-    kLPI2C_SlaveTxReadyFlag = LPI2C_SSR_TDF_MASK,             /*!< Transmit data flag */
-    kLPI2C_SlaveRxReadyFlag = LPI2C_SSR_RDF_MASK,             /*!< Receive data flag */
-    kLPI2C_SlaveAddressValidFlag = LPI2C_SSR_AVF_MASK,        /*!< Address valid flag */
-    kLPI2C_SlaveTransmitAckFlag = LPI2C_SSR_TAF_MASK,         /*!< Transmit ACK flag */
-    kLPI2C_SlaveRepeatedStartDetectFlag = LPI2C_SSR_RSF_MASK, /*!< Repeated start detect flag */
-    kLPI2C_SlaveStopDetectFlag = LPI2C_SSR_SDF_MASK,          /*!< Stop detect flag */
-    kLPI2C_SlaveBitErrFlag = LPI2C_SSR_BEF_MASK,              /*!< Bit error flag */
-    kLPI2C_SlaveFifoErrFlag = LPI2C_SSR_FEF_MASK,             /*!< FIFO error flag */
-    kLPI2C_SlaveAddressMatch0Flag = LPI2C_SSR_AM0F_MASK,      /*!< Address match 0 flag */
-    kLPI2C_SlaveAddressMatch1Flag = LPI2C_SSR_AM1F_MASK,      /*!< Address match 1 flag */
-    kLPI2C_SlaveGeneralCallFlag = LPI2C_SSR_GCF_MASK,         /*!< General call flag */
-    kLPI2C_SlaveBusyFlag = LPI2C_SSR_SBF_MASK,                /*!< Master busy flag */
-    kLPI2C_SlaveBusBusyFlag = LPI2C_SSR_BBF_MASK,             /*!< Bus busy flag */
+    kLPI2C_SlaveTxReadyFlag             = LPI2C_SSR_TDF_MASK,  /*!< Transmit data flag */
+    kLPI2C_SlaveRxReadyFlag             = LPI2C_SSR_RDF_MASK,  /*!< Receive data flag */
+    kLPI2C_SlaveAddressValidFlag        = LPI2C_SSR_AVF_MASK,  /*!< Address valid flag */
+    kLPI2C_SlaveTransmitAckFlag         = LPI2C_SSR_TAF_MASK,  /*!< Transmit ACK flag */
+    kLPI2C_SlaveRepeatedStartDetectFlag = LPI2C_SSR_RSF_MASK,  /*!< Repeated start detect flag */
+    kLPI2C_SlaveStopDetectFlag          = LPI2C_SSR_SDF_MASK,  /*!< Stop detect flag */
+    kLPI2C_SlaveBitErrFlag              = LPI2C_SSR_BEF_MASK,  /*!< Bit error flag */
+    kLPI2C_SlaveFifoErrFlag             = LPI2C_SSR_FEF_MASK,  /*!< FIFO error flag */
+    kLPI2C_SlaveAddressMatch0Flag       = LPI2C_SSR_AM0F_MASK, /*!< Address match 0 flag */
+    kLPI2C_SlaveAddressMatch1Flag       = LPI2C_SSR_AM1F_MASK, /*!< Address match 1 flag */
+    kLPI2C_SlaveGeneralCallFlag         = LPI2C_SSR_GCF_MASK,  /*!< General call flag */
+    kLPI2C_SlaveBusyFlag                = LPI2C_SSR_SBF_MASK,  /*!< Master busy flag */
+    kLPI2C_SlaveBusBusyFlag             = LPI2C_SSR_BBF_MASK,  /*!< Bus busy flag */
 };
 
 /*! @brief LPI2C slave address match options. */
 typedef enum _lpi2c_slave_address_match
 {
-    kLPI2C_MatchAddress0 = 0U,                /*!< Match only address 0. */
-    kLPI2C_MatchAddress0OrAddress1 = 2U,      /*!< Match either address 0 or address 1. */
+    kLPI2C_MatchAddress0                = 0U, /*!< Match only address 0. */
+    kLPI2C_MatchAddress0OrAddress1      = 2U, /*!< Match either address 0 or address 1. */
     kLPI2C_MatchAddress0ThroughAddress1 = 6U, /*!< Match a range of slave addresses from address 0 through address 1. */
 } lpi2c_slave_address_match_t;
 
@@ -370,13 +369,13 @@ typedef struct _lpi2c_slave_config
 typedef enum _lpi2c_slave_transfer_event
 {
     kLPI2C_SlaveAddressMatchEvent = 0x01U,  /*!< Received the slave address after a start or repeated start. */
-    kLPI2C_SlaveTransmitEvent = 0x02U,      /*!< Callback is requested to provide data to transmit
+    kLPI2C_SlaveTransmitEvent     = 0x02U,  /*!< Callback is requested to provide data to transmit
                                                  (slave-transmitter role). */
     kLPI2C_SlaveReceiveEvent = 0x04U,       /*!< Callback is requested to provide a buffer in which to place received
                                                   data (slave-receiver role). */
-    kLPI2C_SlaveTransmitAckEvent = 0x08U,   /*!< Callback needs to either transmit an ACK or NACK. */
+    kLPI2C_SlaveTransmitAckEvent   = 0x08U, /*!< Callback needs to either transmit an ACK or NACK. */
     kLPI2C_SlaveRepeatedStartEvent = 0x10U, /*!< A repeated start was detected. */
-    kLPI2C_SlaveCompletionEvent = 0x20U,    /*!< A stop was detected, completing the transfer. */
+    kLPI2C_SlaveCompletionEvent    = 0x20U, /*!< A stop was detected, completing the transfer. */
 
     /*! Bit mask of all available events. */
     kLPI2C_SlaveAllEvents = kLPI2C_SlaveAddressMatchEvent | kLPI2C_SlaveTransmitEvent | kLPI2C_SlaveReceiveEvent |
@@ -432,859 +431,859 @@ struct _lpi2c_slave_handle
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @addtogroup lpi2c_master_driver
- * @{
- */
+    /*!
+     * @addtogroup lpi2c_master_driver
+     * @{
+     */
 
-/*! @name Initialization and deinitialization */
-/*@{*/
+    /*! @name Initialization and deinitialization */
+    /*@{*/
 
-/*!
- * @brief Provides a default configuration for the LPI2C master peripheral.
- *
- * This function provides the following default configuration for the LPI2C master peripheral:
- * @code
- *  masterConfig->enableMaster            = true;
- *  masterConfig->debugEnable             = false;
- *  masterConfig->ignoreAck               = false;
- *  masterConfig->pinConfig               = kLPI2C_2PinOpenDrain;
- *  masterConfig->baudRate_Hz             = 100000U;
- *  masterConfig->busIdleTimeout_ns       = 0;
- *  masterConfig->pinLowTimeout_ns        = 0;
- *  masterConfig->sdaGlitchFilterWidth_ns = 0;
- *  masterConfig->sclGlitchFilterWidth_ns = 0;
- *  masterConfig->hostRequest.enable      = false;
- *  masterConfig->hostRequest.source      = kLPI2C_HostRequestExternalPin;
- *  masterConfig->hostRequest.polarity    = kLPI2C_HostRequestPinActiveHigh;
- * @endcode
- *
- * After calling this function, you can override any settings in order to customize the configuration,
- * prior to initializing the master driver with LPI2C_MasterInit().
- *
- * @param[out] masterConfig User provided configuration structure for default values. Refer to #lpi2c_master_config_t.
- */
-void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig);
+    /*!
+     * @brief Provides a default configuration for the LPI2C master peripheral.
+     *
+     * This function provides the following default configuration for the LPI2C master peripheral:
+     * @code
+     *  masterConfig->enableMaster            = true;
+     *  masterConfig->debugEnable             = false;
+     *  masterConfig->ignoreAck               = false;
+     *  masterConfig->pinConfig               = kLPI2C_2PinOpenDrain;
+     *  masterConfig->baudRate_Hz             = 100000U;
+     *  masterConfig->busIdleTimeout_ns       = 0;
+     *  masterConfig->pinLowTimeout_ns        = 0;
+     *  masterConfig->sdaGlitchFilterWidth_ns = 0;
+     *  masterConfig->sclGlitchFilterWidth_ns = 0;
+     *  masterConfig->hostRequest.enable      = false;
+     *  masterConfig->hostRequest.source      = kLPI2C_HostRequestExternalPin;
+     *  masterConfig->hostRequest.polarity    = kLPI2C_HostRequestPinActiveHigh;
+     * @endcode
+     *
+     * After calling this function, you can override any settings in order to customize the configuration,
+     * prior to initializing the master driver with LPI2C_MasterInit().
+     *
+     * @param[out] masterConfig User provided configuration structure for default values. Refer to
+     * #lpi2c_master_config_t.
+     */
+    void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig);
 
-/*!
- * @brief Initializes the LPI2C master peripheral.
- *
- * This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user
- * provided configuration. A software reset is performed prior to configuration.
- *
- * @param base The LPI2C peripheral base address.
- * @param masterConfig User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of
- * defaults
- *      that you can override.
- * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors,
- *      filter widths, and timeout periods.
- */
-void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz);
+    /*!
+     * @brief Initializes the LPI2C master peripheral.
+     *
+     * This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user
+     * provided configuration. A software reset is performed prior to configuration.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param masterConfig User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of
+     * defaults
+     *      that you can override.
+     * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors,
+     *      filter widths, and timeout periods.
+     */
+    void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz);
 
-/*!
-* @brief Deinitializes the LPI2C master peripheral.
-*
- * This function disables the LPI2C master peripheral and gates the clock. It also performs a software
- * reset to restore the peripheral to reset conditions.
- *
- * @param base The LPI2C peripheral base address.
- */
-void LPI2C_MasterDeinit(LPI2C_Type *base);
+    /*!
+     * @brief Deinitializes the LPI2C master peripheral.
+     *
+     * This function disables the LPI2C master peripheral and gates the clock. It also performs a software
+     * reset to restore the peripheral to reset conditions.
+     *
+     * @param base The LPI2C peripheral base address.
+     */
+    void LPI2C_MasterDeinit(LPI2C_Type *base);
 
-/*!
- * @brief Configures LPI2C master data match feature.
- *
- * @param base The LPI2C peripheral base address.
- * @param config Settings for the data match feature.
- */
-void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *config);
+    /*!
+     * @brief Configures LPI2C master data match feature.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param config Settings for the data match feature.
+     */
+    void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *config);
 
-/* Not static so it can be used from fsl_lpi2c_edma.c. */
-status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
+    /* Not static so it can be used from fsl_lpi2c_edma.c. */
+    status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
 
-/* Not static so it can be used from fsl_lpi2c_edma.c. */
-status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
+    /* Not static so it can be used from fsl_lpi2c_edma.c. */
+    status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
 
-/*!
- * @brief Performs a software reset.
- *
- * Restores the LPI2C master peripheral to reset conditions.
- *
- * @param base The LPI2C peripheral base address.
- */
-static inline void LPI2C_MasterReset(LPI2C_Type *base)
-{
-    base->MCR = LPI2C_MCR_RST_MASK;
-    base->MCR = 0;
-}
-
-/*!
- * @brief Enables or disables the LPI2C module as master.
- *
- * @param base The LPI2C peripheral base address.
- * @param enable Pass true to enable or false to disable the specified LPI2C as master.
- */
-static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable)
-{
-    base->MCR = (base->MCR & ~LPI2C_MCR_MEN_MASK) | LPI2C_MCR_MEN(enable);
-}
-
-/*@}*/
-
-/*! @name Status */
-/*@{*/
-
-/*!
- * @brief Gets the LPI2C master status flags.
- *
- * A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit
- * in the return value is set if the flag is asserted.
- *
- * @param base The LPI2C peripheral base address.
- * @return State of the status flags:
- *         - 1: related status flag is set.
- *         - 0: related status flag is not set.
- * @see _lpi2c_master_flags
- */
-static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base)
-{
-    return base->MSR;
-}
-
-/*!
- * @brief Clears the LPI2C master status flag state.
- *
- * The following status register flags can be cleared:
- * - #kLPI2C_MasterEndOfPacketFlag
- * - #kLPI2C_MasterStopDetectFlag
- * - #kLPI2C_MasterNackDetectFlag
- * - #kLPI2C_MasterArbitrationLostFlag
- * - #kLPI2C_MasterFifoErrFlag
- * - #kLPI2C_MasterPinLowTimeoutFlag
- * - #kLPI2C_MasterDataMatchFlag
- *
- * Attempts to clear other flags has no effect.
- *
- * @param base The LPI2C peripheral base address.
- * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
- *  #_lpi2c_master_flags enumerators OR'd together. You may pass the result of a previous call to
- *  LPI2C_MasterGetStatusFlags().
- * @see _lpi2c_master_flags.
- */
-static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
-{
-    base->MSR = statusMask;
-}
-
-/*@}*/
-
-/*! @name Interrupts */
-/*@{*/
-
-/*!
- * @brief Enables the LPI2C master interrupt requests.
- *
- * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
- * interrupts.
- *
- * @param base The LPI2C peripheral base address.
- * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_master_flags for the set
- *      of constants that should be OR'd together to form the bit mask.
- */
-static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
-{
-    base->MIER |= interruptMask;
-}
-
-/*!
- * @brief Disables the LPI2C master interrupt requests.
- *
- * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
- * interrupts.
- *
- * @param base The LPI2C peripheral base address.
- * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_master_flags for the set
- *      of constants that should be OR'd together to form the bit mask.
- */
-static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
-{
-    base->MIER &= ~interruptMask;
-}
-
-/*!
- * @brief Returns the set of currently enabled LPI2C master interrupt requests.
- *
- * @param base The LPI2C peripheral base address.
- * @return A bitmask composed of #_lpi2c_master_flags enumerators OR'd together to indicate the
- *      set of enabled interrupts.
- */
-static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base)
-{
-    return base->MIER;
-}
-
-/*@}*/
-
-/*! @name DMA control */
-/*@{*/
-
-/*!
- * @brief Enables or disables LPI2C master DMA requests.
- *
- * @param base The LPI2C peripheral base address.
- * @param enableTx Enable flag for transmit DMA request. Pass true for enable, false for disable.
- * @param enableRx Enable flag for receive DMA request. Pass true for enable, false for disable.
- */
-static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx)
-{
-    base->MDER = LPI2C_MDER_TDDE(enableTx) | LPI2C_MDER_RDDE(enableRx);
-}
-
-/*!
- * @brief Gets LPI2C master transmit data register address for DMA transfer.
- *
- * @param base The LPI2C peripheral base address.
- * @return The LPI2C Master Transmit Data Register address.
- */
-static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base)
-{
-    return (uint32_t)&base->MTDR;
-}
-
-/*!
- * @brief Gets LPI2C master receive data register address for DMA transfer.
- *
- * @param base The LPI2C peripheral base address.
- * @return The LPI2C Master Receive Data Register address.
- */
-static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base)
-{
-    return (uint32_t)&base->MRDR;
-}
-
-/*@}*/
-
-/*! @name FIFO control */
-/*@{*/
-
-/*!
- * @brief Sets the watermarks for LPI2C master FIFOs.
- *
- * @param base The LPI2C peripheral base address.
- * @param txWords Transmit FIFO watermark value in words. The #kLPI2C_MasterTxReadyFlag flag is set whenever
- *      the number of words in the transmit FIFO is equal or less than @a txWords. Writing a value equal or
- *      greater than the FIFO size is truncated.
- * @param rxWords Receive FIFO watermark value in words. The #kLPI2C_MasterRxReadyFlag flag is set whenever
- *      the number of words in the receive FIFO is greater than @a rxWords. Writing a value equal or greater
- *      than the FIFO size is truncated.
- */
-static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords)
-{
-    base->MFCR = LPI2C_MFCR_TXWATER(txWords) | LPI2C_MFCR_RXWATER(rxWords);
-}
-
-/*!
- * @brief Gets the current number of words in the LPI2C master FIFOs.
- *
- * @param base The LPI2C peripheral base address.
- * @param[out] txCount Pointer through which the current number of words in the transmit FIFO is returned.
- *      Pass NULL if this value is not required.
- * @param[out] rxCount Pointer through which the current number of words in the receive FIFO is returned.
- *      Pass NULL if this value is not required.
- */
-static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount)
-{
-    if (txCount)
+    /*!
+     * @brief Performs a software reset.
+     *
+     * Restores the LPI2C master peripheral to reset conditions.
+     *
+     * @param base The LPI2C peripheral base address.
+     */
+    static inline void LPI2C_MasterReset(LPI2C_Type *base)
     {
-        *txCount = (base->MFSR & LPI2C_MFSR_TXCOUNT_MASK) >> LPI2C_MFSR_TXCOUNT_SHIFT;
+        base->MCR = LPI2C_MCR_RST_MASK;
+        base->MCR = 0;
     }
-    if (rxCount)
+
+    /*!
+     * @brief Enables or disables the LPI2C module as master.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param enable Pass true to enable or false to disable the specified LPI2C as master.
+     */
+    static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable)
     {
-        *rxCount = (base->MFSR & LPI2C_MFSR_RXCOUNT_MASK) >> LPI2C_MFSR_RXCOUNT_SHIFT;
+        base->MCR = (base->MCR & ~LPI2C_MCR_MEN_MASK) | LPI2C_MCR_MEN(enable);
     }
-}
 
-/*@}*/
+    /*@}*/
 
-/*! @name Bus operations */
-/*@{*/
+    /*! @name Status */
+    /*@{*/
 
-/*!
- * @brief Sets the I2C bus frequency for master transactions.
- *
- * The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud
- * rate. Do not call this function during a transfer, or the transfer is aborted.
- *
- * @note Please note that the second parameter is the clock frequency of LPI2C module, the third
- * parameter means user configured bus baudrate, this implementation is different from other I2C drivers
- * which use baudrate configuration as second parameter and source clock frequency as third parameter.
- *
- * @param base The LPI2C peripheral base address.
- * @param sourceClock_Hz LPI2C functional clock frequency in Hertz.
- * @param baudRate_Hz Requested bus frequency in Hertz.
- */
-void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz);
+    /*!
+     * @brief Gets the LPI2C master status flags.
+     *
+     * A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit
+     * in the return value is set if the flag is asserted.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return State of the status flags:
+     *         - 1: related status flag is set.
+     *         - 0: related status flag is not set.
+     * @see _lpi2c_master_flags
+     */
+    static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base)
+    {
+        return base->MSR;
+    }
 
-/*!
- * @brief Returns whether the bus is idle.
- *
- * Requires the master mode to be enabled.
- *
- * @param base The LPI2C peripheral base address.
- * @retval true Bus is busy.
- * @retval false Bus is idle.
- */
-static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base)
-{
-    return (base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT;
-}
+    /*!
+     * @brief Clears the LPI2C master status flag state.
+     *
+     * The following status register flags can be cleared:
+     * - #kLPI2C_MasterEndOfPacketFlag
+     * - #kLPI2C_MasterStopDetectFlag
+     * - #kLPI2C_MasterNackDetectFlag
+     * - #kLPI2C_MasterArbitrationLostFlag
+     * - #kLPI2C_MasterFifoErrFlag
+     * - #kLPI2C_MasterPinLowTimeoutFlag
+     * - #kLPI2C_MasterDataMatchFlag
+     *
+     * Attempts to clear other flags has no effect.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
+     *  #_lpi2c_master_flags enumerators OR'd together. You may pass the result of a previous call to
+     *  LPI2C_MasterGetStatusFlags().
+     * @see _lpi2c_master_flags.
+     */
+    static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
+    {
+        base->MSR = statusMask;
+    }
 
-/*!
- * @brief Sends a START signal and slave address on the I2C bus.
- *
- * This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure
- * that another master is not occupying the bus. Then a START signal is transmitted, followed by the
- * 7-bit address specified in the @a address parameter. Note that this function does not actually wait
- * until the START and address are successfully sent on the bus before returning.
- *
- * @param base The LPI2C peripheral base address.
- * @param address 7-bit slave device address, in bits [6:0].
- * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
- *      the R/w bit (bit 0) in the transmitted slave address.
- * @retval #kStatus_Success START signal and address were successfully enqueued in the transmit FIFO.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- */
-status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir);
+    /*@}*/
 
-/*!
- * @brief Sends a repeated START signal and slave address on the I2C bus.
- *
- * This function is used to send a Repeated START signal when a transfer is already in progress. Like
- * LPI2C_MasterStart(), it also sends the specified 7-bit address.
- *
- * @note This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers,
- *      as well as to better document the intent of code that uses these APIs.
- *
- * @param base The LPI2C peripheral base address.
- * @param address 7-bit slave device address, in bits [6:0].
- * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
- *      the R/w bit (bit 0) in the transmitted slave address.
- * @retval #kStatus_Success Repeated START signal and address were successfully enqueued in the transmit FIFO.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- */
-static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)
-{
-    return LPI2C_MasterStart(base, address, dir);
-}
+    /*! @name Interrupts */
+    /*@{*/
 
-/*!
- * @brief Performs a polling send transfer on the I2C bus.
- *
- * Sends up to @a txSize number of bytes to the previously addressed slave device. The slave may
- * reply with a NAK to any byte in order to terminate the transfer early. If this happens, this
- * function returns #kStatus_LPI2C_Nak.
- *
- * @param base  The LPI2C peripheral base address.
- * @param txBuff The pointer to the data to be transferred.
- * @param txSize The length in bytes of the data to be transferred.
- * @retval #kStatus_Success Data was sent successfully.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
- * @retval #kStatus_LPI2C_FifoError FIFO under run or over run.
- * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
- * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
- */
-status_t LPI2C_MasterSend(LPI2C_Type *base, const void *txBuff, size_t txSize);
+    /*!
+     * @brief Enables the LPI2C master interrupt requests.
+     *
+     * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
+     * interrupts.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_master_flags for the set
+     *      of constants that should be OR'd together to form the bit mask.
+     */
+    static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
+    {
+        base->MIER |= interruptMask;
+    }
 
-/*!
- * @brief Performs a polling receive transfer on the I2C bus.
- *
- * @param base  The LPI2C peripheral base address.
- * @param rxBuff The pointer to the data to be transferred.
- * @param rxSize The length in bytes of the data to be transferred.
- * @retval #kStatus_Success Data was received successfully.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
- * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
- * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
- * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
- */
-status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize);
+    /*!
+     * @brief Disables the LPI2C master interrupt requests.
+     *
+     * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
+     * interrupts.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_master_flags for the set
+     *      of constants that should be OR'd together to form the bit mask.
+     */
+    static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
+    {
+        base->MIER &= ~interruptMask;
+    }
 
-/*!
- * @brief Sends a STOP signal on the I2C bus.
- *
- * This function does not return until the STOP signal is seen on the bus, or an error occurs.
- *
- * @param base The LPI2C peripheral base address.
- * @retval #kStatus_Success The STOP signal was successfully sent on the bus and the transaction terminated.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
- * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
- * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
- * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
- */
-status_t LPI2C_MasterStop(LPI2C_Type *base);
+    /*!
+     * @brief Returns the set of currently enabled LPI2C master interrupt requests.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return A bitmask composed of #_lpi2c_master_flags enumerators OR'd together to indicate the
+     *      set of enabled interrupts.
+     */
+    static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base)
+    {
+        return base->MIER;
+    }
 
-/*!
- * @brief Performs a master polling transfer on the I2C bus.
- *
- * @note The API does not return until the transfer succeeds or fails due
- * to error happens during transfer.
- *
- * @param base The LPI2C peripheral base address.
- * @param transfer Pointer to the transfer structure.
- * @retval #kStatus_Success Data was received successfully.
- * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
- * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
- * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
- * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
- * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
- */
-status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer);
+    /*@}*/
 
-/*@}*/
+    /*! @name DMA control */
+    /*@{*/
 
-/*! @name Non-blocking */
-/*@{*/
+    /*!
+     * @brief Enables or disables LPI2C master DMA requests.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param enableTx Enable flag for transmit DMA request. Pass true for enable, false for disable.
+     * @param enableRx Enable flag for receive DMA request. Pass true for enable, false for disable.
+     */
+    static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx)
+    {
+        base->MDER = LPI2C_MDER_TDDE(enableTx) | LPI2C_MDER_RDDE(enableRx);
+    }
 
-/*!
- * @brief Creates a new handle for the LPI2C master non-blocking APIs.
- *
- * The creation of a handle is for use with the non-blocking APIs. Once a handle
- * is created, there is not a corresponding destroy handle. If the user wants to
- * terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.
- *
- *
- * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
- * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
- * enable the associated INTMUX IRQ in application.
- *
- * @param base The LPI2C peripheral base address.
- * @param[out] handle Pointer to the LPI2C master driver handle.
- * @param callback User provided pointer to the asynchronous callback function.
- * @param userData User provided pointer to the application callback data.
- */
-void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base,
-                                      lpi2c_master_handle_t *handle,
-                                      lpi2c_master_transfer_callback_t callback,
-                                      void *userData);
+    /*!
+     * @brief Gets LPI2C master transmit data register address for DMA transfer.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return The LPI2C Master Transmit Data Register address.
+     */
+    static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base)
+    {
+        return (uint32_t)&base->MTDR;
+    }
 
-/*!
- * @brief Performs a non-blocking transaction on the I2C bus.
- *
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to the LPI2C master driver handle.
- * @param transfer The pointer to the transfer descriptor.
- * @retval #kStatus_Success The transaction was started successfully.
- * @retval #kStatus_LPI2C_Busy Either another master is currently utilizing the bus, or a non-blocking
- *      transaction is already in progress.
- */
-status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base,
-                                         lpi2c_master_handle_t *handle,
-                                         lpi2c_master_transfer_t *transfer);
+    /*!
+     * @brief Gets LPI2C master receive data register address for DMA transfer.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return The LPI2C Master Receive Data Register address.
+     */
+    static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base)
+    {
+        return (uint32_t)&base->MRDR;
+    }
 
-/*!
- * @brief Returns number of bytes transferred so far.
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to the LPI2C master driver handle.
- * @param[out] count Number of bytes transferred so far by the non-blocking transaction.
- * @retval #kStatus_Success
- * @retval #kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
- */
-status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count);
+    /*@}*/
 
-/*!
- * @brief Terminates a non-blocking LPI2C master transmission early.
- *
- * @note It is not safe to call this function from an IRQ handler that has a higher priority than the
- *      LPI2C peripheral's IRQ priority.
- *
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to the LPI2C master driver handle.
- * @retval #kStatus_Success A transaction was successfully aborted.
- * @retval #kStatus_LPI2C_Idle There is not a non-blocking transaction currently in progress.
- */
-void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle);
+    /*! @name FIFO control */
+    /*@{*/
 
-/*@}*/
+    /*!
+     * @brief Sets the watermarks for LPI2C master FIFOs.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param txWords Transmit FIFO watermark value in words. The #kLPI2C_MasterTxReadyFlag flag is set whenever
+     *      the number of words in the transmit FIFO is equal or less than @a txWords. Writing a value equal or
+     *      greater than the FIFO size is truncated.
+     * @param rxWords Receive FIFO watermark value in words. The #kLPI2C_MasterRxReadyFlag flag is set whenever
+     *      the number of words in the receive FIFO is greater than @a rxWords. Writing a value equal or greater
+     *      than the FIFO size is truncated.
+     */
+    static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords)
+    {
+        base->MFCR = LPI2C_MFCR_TXWATER(txWords) | LPI2C_MFCR_RXWATER(rxWords);
+    }
 
-/*! @name IRQ handler */
-/*@{*/
+    /*!
+     * @brief Gets the current number of words in the LPI2C master FIFOs.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param[out] txCount Pointer through which the current number of words in the transmit FIFO is returned.
+     *      Pass NULL if this value is not required.
+     * @param[out] rxCount Pointer through which the current number of words in the receive FIFO is returned.
+     *      Pass NULL if this value is not required.
+     */
+    static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount)
+    {
+        if (txCount) {
+            *txCount = (base->MFSR & LPI2C_MFSR_TXCOUNT_MASK) >> LPI2C_MFSR_TXCOUNT_SHIFT;
+        }
+        if (rxCount) {
+            *rxCount = (base->MFSR & LPI2C_MFSR_RXCOUNT_MASK) >> LPI2C_MFSR_RXCOUNT_SHIFT;
+        }
+    }
 
-/*!
- * @brief Reusable routine to handle master interrupts.
- * @note This function does not need to be called unless you are reimplementing the
- *  nonblocking API's interrupt handler routines to add special functionality.
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to the LPI2C master driver handle.
- */
-void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *handle);
+    /*@}*/
 
-/*@}*/
+    /*! @name Bus operations */
+    /*@{*/
 
-/*! @} */
+    /*!
+     * @brief Sets the I2C bus frequency for master transactions.
+     *
+     * The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud
+     * rate. Do not call this function during a transfer, or the transfer is aborted.
+     *
+     * @note Please note that the second parameter is the clock frequency of LPI2C module, the third
+     * parameter means user configured bus baudrate, this implementation is different from other I2C drivers
+     * which use baudrate configuration as second parameter and source clock frequency as third parameter.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param sourceClock_Hz LPI2C functional clock frequency in Hertz.
+     * @param baudRate_Hz Requested bus frequency in Hertz.
+     */
+    void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz);
 
-/*!
- * @addtogroup lpi2c_slave_driver
- * @{
- */
+    /*!
+     * @brief Returns whether the bus is idle.
+     *
+     * Requires the master mode to be enabled.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @retval true Bus is busy.
+     * @retval false Bus is idle.
+     */
+    static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base)
+    {
+        return (base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT;
+    }
 
-/*! @name Slave initialization and deinitialization */
-/*@{*/
+    /*!
+     * @brief Sends a START signal and slave address on the I2C bus.
+     *
+     * This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure
+     * that another master is not occupying the bus. Then a START signal is transmitted, followed by the
+     * 7-bit address specified in the @a address parameter. Note that this function does not actually wait
+     * until the START and address are successfully sent on the bus before returning.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param address 7-bit slave device address, in bits [6:0].
+     * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
+     *      the R/w bit (bit 0) in the transmitted slave address.
+     * @retval #kStatus_Success START signal and address were successfully enqueued in the transmit FIFO.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     */
+    status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir);
 
-/*!
- * @brief Provides a default configuration for the LPI2C slave peripheral.
- *
- * This function provides the following default configuration for the LPI2C slave peripheral:
- * @code
- *  slaveConfig->enableSlave               = true;
- *  slaveConfig->address0                  = 0U;
- *  slaveConfig->address1                  = 0U;
- *  slaveConfig->addressMatchMode          = kLPI2C_MatchAddress0;
- *  slaveConfig->filterDozeEnable          = true;
- *  slaveConfig->filterEnable              = true;
- *  slaveConfig->enableGeneralCall         = false;
- *  slaveConfig->sclStall.enableAck        = false;
- *  slaveConfig->sclStall.enableTx         = true;
- *  slaveConfig->sclStall.enableRx         = true;
- *  slaveConfig->sclStall.enableAddress    = true;
- *  slaveConfig->ignoreAck                 = false;
- *  slaveConfig->enableReceivedAddressRead = false;
- *  slaveConfig->sdaGlitchFilterWidth_ns   = 0;
- *  slaveConfig->sclGlitchFilterWidth_ns   = 0;
- *  slaveConfig->dataValidDelay_ns         = 0;
- *  slaveConfig->clockHoldTime_ns          = 0;
- * @endcode
- *
- * After calling this function, override any settings  to customize the configuration,
- * prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the @a
- * address0 member of the configuration structure with the desired slave address.
- *
- * @param[out] slaveConfig User provided configuration structure that is set to default values. Refer to
- *      #lpi2c_slave_config_t.
- */
-void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig);
+    /*!
+     * @brief Sends a repeated START signal and slave address on the I2C bus.
+     *
+     * This function is used to send a Repeated START signal when a transfer is already in progress. Like
+     * LPI2C_MasterStart(), it also sends the specified 7-bit address.
+     *
+     * @note This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers,
+     *      as well as to better document the intent of code that uses these APIs.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param address 7-bit slave device address, in bits [6:0].
+     * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
+     *      the R/w bit (bit 0) in the transmitted slave address.
+     * @retval #kStatus_Success Repeated START signal and address were successfully enqueued in the transmit FIFO.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     */
+    static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)
+    {
+        return LPI2C_MasterStart(base, address, dir);
+    }
 
-/*!
- * @brief Initializes the LPI2C slave peripheral.
- *
- * This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user
- * provided configuration.
- *
- * @param base The LPI2C peripheral base address.
- * @param slaveConfig User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of defaults
- *      that you can override.
- * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths,
- *      data valid delay, and clock hold time.
- */
-void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz);
+    /*!
+     * @brief Performs a polling send transfer on the I2C bus.
+     *
+     * Sends up to @a txSize number of bytes to the previously addressed slave device. The slave may
+     * reply with a NAK to any byte in order to terminate the transfer early. If this happens, this
+     * function returns #kStatus_LPI2C_Nak.
+     *
+     * @param base  The LPI2C peripheral base address.
+     * @param txBuff The pointer to the data to be transferred.
+     * @param txSize The length in bytes of the data to be transferred.
+     * @retval #kStatus_Success Data was sent successfully.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
+     * @retval #kStatus_LPI2C_FifoError FIFO under run or over run.
+     * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
+     * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
+     */
+    status_t LPI2C_MasterSend(LPI2C_Type *base, const void *txBuff, size_t txSize);
 
-/*!
-* @brief Deinitializes the LPI2C slave peripheral.
-*
- * This function disables the LPI2C slave peripheral and gates the clock. It also performs a software
- * reset to restore the peripheral to reset conditions.
- *
- * @param base The LPI2C peripheral base address.
- */
-void LPI2C_SlaveDeinit(LPI2C_Type *base);
+    /*!
+     * @brief Performs a polling receive transfer on the I2C bus.
+     *
+     * @param base  The LPI2C peripheral base address.
+     * @param rxBuff The pointer to the data to be transferred.
+     * @param rxSize The length in bytes of the data to be transferred.
+     * @retval #kStatus_Success Data was received successfully.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
+     * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
+     * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
+     * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
+     */
+    status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize);
 
-/*!
- * @brief Performs a software reset of the LPI2C slave peripheral.
- *
- * @param base The LPI2C peripheral base address.
- */
-static inline void LPI2C_SlaveReset(LPI2C_Type *base)
-{
-    base->SCR = LPI2C_SCR_RST_MASK;
-    base->SCR = 0;
-}
+    /*!
+     * @brief Sends a STOP signal on the I2C bus.
+     *
+     * This function does not return until the STOP signal is seen on the bus, or an error occurs.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @retval #kStatus_Success The STOP signal was successfully sent on the bus and the transaction terminated.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
+     * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
+     * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
+     * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
+     */
+    status_t LPI2C_MasterStop(LPI2C_Type *base);
 
-/*!
- * @brief Enables or disables the LPI2C module as slave.
- *
- * @param base The LPI2C peripheral base address.
- * @param enable Pass true to enable or false to disable the specified LPI2C as slave.
- */
-static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable)
-{
-    base->SCR = (base->SCR & ~LPI2C_SCR_SEN_MASK) | LPI2C_SCR_SEN(enable);
-}
+    /*!
+     * @brief Performs a master polling transfer on the I2C bus.
+     *
+     * @note The API does not return until the transfer succeeds or fails due
+     * to error happens during transfer.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param transfer Pointer to the transfer structure.
+     * @retval #kStatus_Success Data was received successfully.
+     * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
+     * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
+     * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
+     * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
+     * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
+     */
+    status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer);
 
-/*@}*/
+    /*@}*/
 
-/*! @name Slave status */
-/*@{*/
+    /*! @name Non-blocking */
+    /*@{*/
 
-/*!
- * @brief Gets the LPI2C slave status flags.
- *
- * A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit
- * in the return value is set if the flag is asserted.
- *
- * @param base The LPI2C peripheral base address.
- * @return State of the status flags:
- *         - 1: related status flag is set.
- *         - 0: related status flag is not set.
- * @see _lpi2c_slave_flags
- */
-static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base)
-{
-    return base->SSR;
-}
+    /*!
+     * @brief Creates a new handle for the LPI2C master non-blocking APIs.
+     *
+     * The creation of a handle is for use with the non-blocking APIs. Once a handle
+     * is created, there is not a corresponding destroy handle. If the user wants to
+     * terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.
+     *
+     *
+     * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
+     * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
+     * enable the associated INTMUX IRQ in application.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param[out] handle Pointer to the LPI2C master driver handle.
+     * @param callback User provided pointer to the asynchronous callback function.
+     * @param userData User provided pointer to the application callback data.
+     */
+    void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base,
+                                          lpi2c_master_handle_t *handle,
+                                          lpi2c_master_transfer_callback_t callback,
+                                          void *userData);
 
-/*!
- * @brief Clears the LPI2C status flag state.
- *
- * The following status register flags can be cleared:
- * - #kLPI2C_SlaveRepeatedStartDetectFlag
- * - #kLPI2C_SlaveStopDetectFlag
- * - #kLPI2C_SlaveBitErrFlag
- * - #kLPI2C_SlaveFifoErrFlag
- *
- * Attempts to clear other flags has no effect.
- *
- * @param base The LPI2C peripheral base address.
- * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
- *  #_lpi2c_slave_flags enumerators OR'd together. You may pass the result of a previous call to
- *  LPI2C_SlaveGetStatusFlags().
- * @see _lpi2c_slave_flags.
- */
-static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
-{
-    base->SSR = statusMask;
-}
+    /*!
+     * @brief Performs a non-blocking transaction on the I2C bus.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to the LPI2C master driver handle.
+     * @param transfer The pointer to the transfer descriptor.
+     * @retval #kStatus_Success The transaction was started successfully.
+     * @retval #kStatus_LPI2C_Busy Either another master is currently utilizing the bus, or a non-blocking
+     *      transaction is already in progress.
+     */
+    status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base,
+                                             lpi2c_master_handle_t *handle,
+                                             lpi2c_master_transfer_t *transfer);
 
-/*@}*/
+    /*!
+     * @brief Returns number of bytes transferred so far.
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to the LPI2C master driver handle.
+     * @param[out] count Number of bytes transferred so far by the non-blocking transaction.
+     * @retval #kStatus_Success
+     * @retval #kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
+     */
+    status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count);
 
-/*! @name Slave interrupts */
-/*@{*/
+    /*!
+     * @brief Terminates a non-blocking LPI2C master transmission early.
+     *
+     * @note It is not safe to call this function from an IRQ handler that has a higher priority than the
+     *      LPI2C peripheral's IRQ priority.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to the LPI2C master driver handle.
+     * @retval #kStatus_Success A transaction was successfully aborted.
+     * @retval #kStatus_LPI2C_Idle There is not a non-blocking transaction currently in progress.
+     */
+    void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle);
 
-/*!
- * @brief Enables the LPI2C slave interrupt requests.
- *
- * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
- * interrupts.
- *
- * @param base The LPI2C peripheral base address.
- * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_slave_flags for the set
- *      of constants that should be OR'd together to form the bit mask.
- */
-static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
-{
-    base->SIER |= interruptMask;
-}
+    /*@}*/
 
-/*!
- * @brief Disables the LPI2C slave interrupt requests.
- *
- * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
- * interrupts.
- *
- * @param base The LPI2C peripheral base address.
- * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_slave_flags for the set
- *      of constants that should be OR'd together to form the bit mask.
- */
-static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
-{
-    base->SIER &= ~interruptMask;
-}
+    /*! @name IRQ handler */
+    /*@{*/
 
-/*!
- * @brief Returns the set of currently enabled LPI2C slave interrupt requests.
- * @param base The LPI2C peripheral base address.
- * @return A bitmask composed of #_lpi2c_slave_flags enumerators OR'd together to indicate the
- *      set of enabled interrupts.
- */
-static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base)
-{
-    return base->SIER;
-}
+    /*!
+     * @brief Reusable routine to handle master interrupts.
+     * @note This function does not need to be called unless you are reimplementing the
+     *  nonblocking API's interrupt handler routines to add special functionality.
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to the LPI2C master driver handle.
+     */
+    void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *handle);
 
-/*@}*/
+    /*@}*/
 
-/*! @name Slave DMA control */
-/*@{*/
+    /*! @} */
 
-/*!
- * @brief Enables or disables the LPI2C slave peripheral DMA requests.
- *
- * @param base The LPI2C peripheral base address.
- * @param enableAddressValid Enable flag for the address valid DMA request. Pass true for enable, false for disable.
- *      The address valid DMA request is shared with the receive data DMA request.
- * @param enableRx Enable flag for the receive data DMA request. Pass true for enable, false for disable.
- * @param enableTx Enable flag for the transmit data DMA request. Pass true for enable, false for disable.
- */
-static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx)
-{
-    base->SDER = (base->SDER & ~(LPI2C_SDER_AVDE_MASK | LPI2C_SDER_RDDE_MASK | LPI2C_SDER_TDDE_MASK)) |
-                 LPI2C_SDER_AVDE(enableAddressValid) | LPI2C_SDER_RDDE(enableRx) | LPI2C_SDER_TDDE(enableTx);
-}
+    /*!
+     * @addtogroup lpi2c_slave_driver
+     * @{
+     */
 
-/*@}*/
+    /*! @name Slave initialization and deinitialization */
+    /*@{*/
 
-/*! @name Slave bus operations */
-/*@{*/
+    /*!
+     * @brief Provides a default configuration for the LPI2C slave peripheral.
+     *
+     * This function provides the following default configuration for the LPI2C slave peripheral:
+     * @code
+     *  slaveConfig->enableSlave               = true;
+     *  slaveConfig->address0                  = 0U;
+     *  slaveConfig->address1                  = 0U;
+     *  slaveConfig->addressMatchMode          = kLPI2C_MatchAddress0;
+     *  slaveConfig->filterDozeEnable          = true;
+     *  slaveConfig->filterEnable              = true;
+     *  slaveConfig->enableGeneralCall         = false;
+     *  slaveConfig->sclStall.enableAck        = false;
+     *  slaveConfig->sclStall.enableTx         = true;
+     *  slaveConfig->sclStall.enableRx         = true;
+     *  slaveConfig->sclStall.enableAddress    = true;
+     *  slaveConfig->ignoreAck                 = false;
+     *  slaveConfig->enableReceivedAddressRead = false;
+     *  slaveConfig->sdaGlitchFilterWidth_ns   = 0;
+     *  slaveConfig->sclGlitchFilterWidth_ns   = 0;
+     *  slaveConfig->dataValidDelay_ns         = 0;
+     *  slaveConfig->clockHoldTime_ns          = 0;
+     * @endcode
+     *
+     * After calling this function, override any settings  to customize the configuration,
+     * prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the @a
+     * address0 member of the configuration structure with the desired slave address.
+     *
+     * @param[out] slaveConfig User provided configuration structure that is set to default values. Refer to
+     *      #lpi2c_slave_config_t.
+     */
+    void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig);
 
-/*!
- * @brief Returns whether the bus is idle.
- *
- * Requires the slave mode to be enabled.
- *
- * @param base The LPI2C peripheral base address.
- * @retval true Bus is busy.
- * @retval false Bus is idle.
- */
-static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base)
-{
-    return (base->SSR & LPI2C_SSR_BBF_MASK) >> LPI2C_SSR_BBF_SHIFT;
-}
+    /*!
+     * @brief Initializes the LPI2C slave peripheral.
+     *
+     * This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user
+     * provided configuration.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param slaveConfig User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of
+     * defaults that you can override.
+     * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths,
+     *      data valid delay, and clock hold time.
+     */
+    void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz);
 
-/*!
- * @brief Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.
- *
- * Use this function to send an ACK or NAK when the #kLPI2C_SlaveTransmitAckFlag is asserted. This
- * only happens if you enable the sclStall.enableAck field of the ::lpi2c_slave_config_t configuration
- * structure used to initialize the slave peripheral.
- *
- * @param base The LPI2C peripheral base address.
- * @param ackOrNack Pass true for an ACK or false for a NAK.
- */
-static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack)
-{
-    base->STAR = LPI2C_STAR_TXNACK(!ackOrNack);
-}
+    /*!
+     * @brief Deinitializes the LPI2C slave peripheral.
+     *
+     * This function disables the LPI2C slave peripheral and gates the clock. It also performs a software
+     * reset to restore the peripheral to reset conditions.
+     *
+     * @param base The LPI2C peripheral base address.
+     */
+    void LPI2C_SlaveDeinit(LPI2C_Type *base);
 
-/*!
- * @brief Returns the slave address sent by the I2C master.
- *
- * This function should only be called if the #kLPI2C_SlaveAddressValidFlag is asserted.
- *
- * @param base The LPI2C peripheral base address.
- * @return The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and
- *      the 7-bit slave address is in the upper 7 bits.
- */
-static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base)
-{
-    return base->SASR & LPI2C_SASR_RADDR_MASK;
-}
+    /*!
+     * @brief Performs a software reset of the LPI2C slave peripheral.
+     *
+     * @param base The LPI2C peripheral base address.
+     */
+    static inline void LPI2C_SlaveReset(LPI2C_Type *base)
+    {
+        base->SCR = LPI2C_SCR_RST_MASK;
+        base->SCR = 0;
+    }
 
-/*!
- * @brief Performs a polling send transfer on the I2C bus.
- *
- * @param base  The LPI2C peripheral base address.
- * @param txBuff The pointer to the data to be transferred.
- * @param txSize The length in bytes of the data to be transferred.
- * @param[out] actualTxSize
- * @return Error or success status returned by API.
- */
-status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, size_t *actualTxSize);
+    /*!
+     * @brief Enables or disables the LPI2C module as slave.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param enable Pass true to enable or false to disable the specified LPI2C as slave.
+     */
+    static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable)
+    {
+        base->SCR = (base->SCR & ~LPI2C_SCR_SEN_MASK) | LPI2C_SCR_SEN(enable);
+    }
 
-/*!
- * @brief Performs a polling receive transfer on the I2C bus.
- *
- * @param base  The LPI2C peripheral base address.
- * @param rxBuff The pointer to the data to be transferred.
- * @param rxSize The length in bytes of the data to be transferred.
- * @param[out] actualRxSize
- * @return Error or success status returned by API.
- */
-status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize);
+    /*@}*/
 
-/*@}*/
+    /*! @name Slave status */
+    /*@{*/
 
-/*! @name Slave non-blocking */
-/*@{*/
+    /*!
+     * @brief Gets the LPI2C slave status flags.
+     *
+     * A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit
+     * in the return value is set if the flag is asserted.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return State of the status flags:
+     *         - 1: related status flag is set.
+     *         - 0: related status flag is not set.
+     * @see _lpi2c_slave_flags
+     */
+    static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base)
+    {
+        return base->SSR;
+    }
 
-/*!
- * @brief Creates a new handle for the LPI2C slave non-blocking APIs.
- *
- * The creation of a handle is for use with the non-blocking APIs. Once a handle
- * is created, there is not a corresponding destroy handle. If the user wants to
- * terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called.
- *
- * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
- * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
- * enable the associated INTMUX IRQ in application.
+    /*!
+     * @brief Clears the LPI2C status flag state.
+     *
+     * The following status register flags can be cleared:
+     * - #kLPI2C_SlaveRepeatedStartDetectFlag
+     * - #kLPI2C_SlaveStopDetectFlag
+     * - #kLPI2C_SlaveBitErrFlag
+     * - #kLPI2C_SlaveFifoErrFlag
+     *
+     * Attempts to clear other flags has no effect.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
+     *  #_lpi2c_slave_flags enumerators OR'd together. You may pass the result of a previous call to
+     *  LPI2C_SlaveGetStatusFlags().
+     * @see _lpi2c_slave_flags.
+     */
+    static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
+    {
+        base->SSR = statusMask;
+    }
 
- * @param base The LPI2C peripheral base address.
- * @param[out] handle Pointer to the LPI2C slave driver handle.
- * @param callback User provided pointer to the asynchronous callback function.
- * @param userData User provided pointer to the application callback data.
- */
-void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base,
-                                     lpi2c_slave_handle_t *handle,
-                                     lpi2c_slave_transfer_callback_t callback,
-                                     void *userData);
+    /*@}*/
 
-/*!
- * @brief Starts accepting slave transfers.
- *
- * Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing
- * transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the
- * callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked
- * from the interrupt context.
- *
- * The set of events received by the callback is customizable. To do so, set the @a eventMask parameter to
- * the OR'd combination of #lpi2c_slave_transfer_event_t enumerators for the events you wish to receive.
- * The #kLPI2C_SlaveTransmitEvent and #kLPI2C_SlaveReceiveEvent events are always enabled and do not need
- * to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and
- * receive events that are always enabled. In addition, the #kLPI2C_SlaveAllEvents constant is provided as
- * a convenient way to enable all events.
- *
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
- * @param eventMask Bit mask formed by OR'ing together #lpi2c_slave_transfer_event_t enumerators to specify
- *      which events to send to the callback. Other accepted values are 0 to get a default set of
- *      only the transmit and receive events, and #kLPI2C_SlaveAllEvents to enable all events.
- *
- * @retval #kStatus_Success Slave transfers were successfully started.
- * @retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle.
- */
-status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask);
+    /*! @name Slave interrupts */
+    /*@{*/
 
-/*!
- * @brief Gets the slave transfer status during a non-blocking transfer.
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to i2c_slave_handle_t structure.
- * @param[out] count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not
- *      required.
- * @retval #kStatus_Success
- * @retval #kStatus_NoTransferInProgress
- */
-status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count);
+    /*!
+     * @brief Enables the LPI2C slave interrupt requests.
+     *
+     * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
+     * interrupts.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_slave_flags for the set
+     *      of constants that should be OR'd together to form the bit mask.
+     */
+    static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
+    {
+        base->SIER |= interruptMask;
+    }
 
-/*!
- * @brief Aborts the slave non-blocking transfers.
- * @note This API could be called at any time to stop slave for handling the bus events.
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
- * @retval #kStatus_Success
- * @retval #kStatus_LPI2C_Idle
- */
-void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
+    /*!
+     * @brief Disables the LPI2C slave interrupt requests.
+     *
+     * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
+     * interrupts.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_slave_flags for the set
+     *      of constants that should be OR'd together to form the bit mask.
+     */
+    static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
+    {
+        base->SIER &= ~interruptMask;
+    }
 
-/*@}*/
+    /*!
+     * @brief Returns the set of currently enabled LPI2C slave interrupt requests.
+     * @param base The LPI2C peripheral base address.
+     * @return A bitmask composed of #_lpi2c_slave_flags enumerators OR'd together to indicate the
+     *      set of enabled interrupts.
+     */
+    static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base)
+    {
+        return base->SIER;
+    }
 
-/*! @name Slave IRQ handler */
-/*@{*/
+    /*@}*/
 
-/*!
- * @brief Reusable routine to handle slave interrupts.
- * @note This function does not need to be called unless you are reimplementing the
- *  non blocking API's interrupt handler routines to add special functionality.
- * @param base The LPI2C peripheral base address.
- * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
- */
-void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
+    /*! @name Slave DMA control */
+    /*@{*/
 
-/*@}*/
+    /*!
+     * @brief Enables or disables the LPI2C slave peripheral DMA requests.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param enableAddressValid Enable flag for the address valid DMA request. Pass true for enable, false for disable.
+     *      The address valid DMA request is shared with the receive data DMA request.
+     * @param enableRx Enable flag for the receive data DMA request. Pass true for enable, false for disable.
+     * @param enableTx Enable flag for the transmit data DMA request. Pass true for enable, false for disable.
+     */
+    static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx)
+    {
+        base->SDER = (base->SDER & ~(LPI2C_SDER_AVDE_MASK | LPI2C_SDER_RDDE_MASK | LPI2C_SDER_TDDE_MASK)) |
+                     LPI2C_SDER_AVDE(enableAddressValid) | LPI2C_SDER_RDDE(enableRx) | LPI2C_SDER_TDDE(enableTx);
+    }
 
-/*! @} */
+    /*@}*/
+
+    /*! @name Slave bus operations */
+    /*@{*/
+
+    /*!
+     * @brief Returns whether the bus is idle.
+     *
+     * Requires the slave mode to be enabled.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @retval true Bus is busy.
+     * @retval false Bus is idle.
+     */
+    static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base)
+    {
+        return (base->SSR & LPI2C_SSR_BBF_MASK) >> LPI2C_SSR_BBF_SHIFT;
+    }
+
+    /*!
+     * @brief Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.
+     *
+     * Use this function to send an ACK or NAK when the #kLPI2C_SlaveTransmitAckFlag is asserted. This
+     * only happens if you enable the sclStall.enableAck field of the ::lpi2c_slave_config_t configuration
+     * structure used to initialize the slave peripheral.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param ackOrNack Pass true for an ACK or false for a NAK.
+     */
+    static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack)
+    {
+        base->STAR = LPI2C_STAR_TXNACK(!ackOrNack);
+    }
+
+    /*!
+     * @brief Returns the slave address sent by the I2C master.
+     *
+     * This function should only be called if the #kLPI2C_SlaveAddressValidFlag is asserted.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @return The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and
+     *      the 7-bit slave address is in the upper 7 bits.
+     */
+    static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base)
+    {
+        return base->SASR & LPI2C_SASR_RADDR_MASK;
+    }
+
+    /*!
+     * @brief Performs a polling send transfer on the I2C bus.
+     *
+     * @param base  The LPI2C peripheral base address.
+     * @param txBuff The pointer to the data to be transferred.
+     * @param txSize The length in bytes of the data to be transferred.
+     * @param[out] actualTxSize
+     * @return Error or success status returned by API.
+     */
+    status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, size_t *actualTxSize);
+
+    /*!
+     * @brief Performs a polling receive transfer on the I2C bus.
+     *
+     * @param base  The LPI2C peripheral base address.
+     * @param rxBuff The pointer to the data to be transferred.
+     * @param rxSize The length in bytes of the data to be transferred.
+     * @param[out] actualRxSize
+     * @return Error or success status returned by API.
+     */
+    status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize);
+
+    /*@}*/
+
+    /*! @name Slave non-blocking */
+    /*@{*/
+
+    /*!
+     * @brief Creates a new handle for the LPI2C slave non-blocking APIs.
+     *
+     * The creation of a handle is for use with the non-blocking APIs. Once a handle
+     * is created, there is not a corresponding destroy handle. If the user wants to
+     * terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called.
+     *
+     * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
+     * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
+     * enable the associated INTMUX IRQ in application.
+
+     * @param base The LPI2C peripheral base address.
+     * @param[out] handle Pointer to the LPI2C slave driver handle.
+     * @param callback User provided pointer to the asynchronous callback function.
+     * @param userData User provided pointer to the application callback data.
+     */
+    void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base,
+                                         lpi2c_slave_handle_t *handle,
+                                         lpi2c_slave_transfer_callback_t callback,
+                                         void *userData);
+
+    /*!
+     * @brief Starts accepting slave transfers.
+     *
+     * Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing
+     * transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the
+     * callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked
+     * from the interrupt context.
+     *
+     * The set of events received by the callback is customizable. To do so, set the @a eventMask parameter to
+     * the OR'd combination of #lpi2c_slave_transfer_event_t enumerators for the events you wish to receive.
+     * The #kLPI2C_SlaveTransmitEvent and #kLPI2C_SlaveReceiveEvent events are always enabled and do not need
+     * to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and
+     * receive events that are always enabled. In addition, the #kLPI2C_SlaveAllEvents constant is provided as
+     * a convenient way to enable all events.
+     *
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
+     * @param eventMask Bit mask formed by OR'ing together #lpi2c_slave_transfer_event_t enumerators to specify
+     *      which events to send to the callback. Other accepted values are 0 to get a default set of
+     *      only the transmit and receive events, and #kLPI2C_SlaveAllEvents to enable all events.
+     *
+     * @retval #kStatus_Success Slave transfers were successfully started.
+     * @retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle.
+     */
+    status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask);
+
+    /*!
+     * @brief Gets the slave transfer status during a non-blocking transfer.
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to i2c_slave_handle_t structure.
+     * @param[out] count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not
+     *      required.
+     * @retval #kStatus_Success
+     * @retval #kStatus_NoTransferInProgress
+     */
+    status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count);
+
+    /*!
+     * @brief Aborts the slave non-blocking transfers.
+     * @note This API could be called at any time to stop slave for handling the bus events.
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
+     * @retval #kStatus_Success
+     * @retval #kStatus_LPI2C_Idle
+     */
+    void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
+
+    /*@}*/
+
+    /*! @name Slave IRQ handler */
+    /*@{*/
+
+    /*!
+     * @brief Reusable routine to handle slave interrupts.
+     * @note This function does not need to be called unless you are reimplementing the
+     *  non blocking API's interrupt handler routines to add special functionality.
+     * @param base The LPI2C peripheral base address.
+     * @param handle Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
+     */
+    void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
+
+    /*@}*/
+
+    /*! @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.c
index 3a515e173..ae7b3a592 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.c
@@ -35,8 +35,8 @@
 #include "fsl_lpspi.h"
 
 /*******************************************************************************
-* Definitions
-******************************************************************************/
+ * Definitions
+ ******************************************************************************/
 
 /* Component ID definition, used by tools. */
 #ifndef FSL_COMPONENT_ID
@@ -61,73 +61,73 @@ typedef void (*lpspi_master_isr_t)(LPSPI_Type *base, lpspi_master_handle_t *hand
 typedef void (*lpspi_slave_isr_t)(LPSPI_Type *base, lpspi_slave_handle_t *handle);
 
 /*******************************************************************************
-* Prototypes
-******************************************************************************/
+ * Prototypes
+ ******************************************************************************/
 
 /*!
-* @brief Configures the LPSPI peripheral chip select polarity.
-*
-* This function  takes in the desired peripheral chip select (Pcs) and it's corresponding desired polarity and
-* configures the Pcs signal to operate with the desired characteristic.
-*
-* @param base LPSPI peripheral address.
-* @param pcs The particular peripheral chip select (parameter value is of type lpspi_which_pcs_t) for which we wish to
-*            apply the active high or active low characteristic.
-* @param activeLowOrHigh The setting for either "active high, inactive low (0)"  or "active low, inactive high(1)" of
-*                        type lpspi_pcs_polarity_config_t.
-*/
+ * @brief Configures the LPSPI peripheral chip select polarity.
+ *
+ * This function  takes in the desired peripheral chip select (Pcs) and it's corresponding desired polarity and
+ * configures the Pcs signal to operate with the desired characteristic.
+ *
+ * @param base LPSPI peripheral address.
+ * @param pcs The particular peripheral chip select (parameter value is of type lpspi_which_pcs_t) for which we wish to
+ *            apply the active high or active low characteristic.
+ * @param activeLowOrHigh The setting for either "active high, inactive low (0)"  or "active low, inactive high(1)" of
+ *                        type lpspi_pcs_polarity_config_t.
+ */
 static void LPSPI_SetOnePcsPolarity(LPSPI_Type *base,
                                     lpspi_which_pcs_t pcs,
                                     lpspi_pcs_polarity_config_t activeLowOrHigh);
 
 /*!
-* @brief Combine the write data for 1 byte to 4 bytes.
-* This is not a public API.
-*/
+ * @brief Combine the write data for 1 byte to 4 bytes.
+ * This is not a public API.
+ */
 static uint32_t LPSPI_CombineWriteData(uint8_t *txData, uint32_t bytesEachWrite, bool isByteSwap);
 
 /*!
-* @brief Separate the read data for 1 byte to 4 bytes.
-* This is not a public API.
-*/
+ * @brief Separate the read data for 1 byte to 4 bytes.
+ * This is not a public API.
+ */
 static void LPSPI_SeparateReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
 
 /*!
-* @brief Master fill up the TX FIFO with data.
-* This is not a public API.
-*/
+ * @brief Master fill up the TX FIFO with data.
+ * This is not a public API.
+ */
 static void LPSPI_MasterTransferFillUpTxFifo(LPSPI_Type *base, lpspi_master_handle_t *handle);
 
 /*!
-* @brief Master finish up a transfer.
-* It would call back if there is callback function and set the state to idle.
-* This is not a public API.
-*/
+ * @brief Master finish up a transfer.
+ * It would call back if there is callback function and set the state to idle.
+ * This is not a public API.
+ */
 static void LPSPI_MasterTransferComplete(LPSPI_Type *base, lpspi_master_handle_t *handle);
 
 /*!
-* @brief Slave fill up the TX FIFO with data.
-* This is not a public API.
-*/
+ * @brief Slave fill up the TX FIFO with data.
+ * This is not a public API.
+ */
 static void LPSPI_SlaveTransferFillUpTxFifo(LPSPI_Type *base, lpspi_slave_handle_t *handle);
 
 /*!
-* @brief Slave finish up a transfer.
-* It would call back if there is callback function and set the state to idle.
-* This is not a public API.
-*/
+ * @brief Slave finish up a transfer.
+ * It would call back if there is callback function and set the state to idle.
+ * This is not a public API.
+ */
 static void LPSPI_SlaveTransferComplete(LPSPI_Type *base, lpspi_slave_handle_t *handle);
 
 /*!
-* @brief LPSPI common interrupt handler.
-*
-* @param handle pointer to s_lpspiHandle which stores the transfer state.
-*/
+ * @brief LPSPI common interrupt handler.
+ *
+ * @param handle pointer to s_lpspiHandle which stores the transfer state.
+ */
 static void LPSPI_CommonIRQHandler(LPSPI_Type *base, void *param);
 
 /*******************************************************************************
-* Variables
-******************************************************************************/
+ * Variables
+ ******************************************************************************/
 
 /* Defines constant value arrays for the baud rate pre-scalar and scalar divider values.*/
 static const uint8_t s_baudratePrescaler[] = {1, 2, 4, 8, 16, 32, 64, 128};
@@ -158,17 +158,15 @@ static lpspi_slave_isr_t s_lpspiSlaveIsr;
 /* @brief Dummy data for each instance. This data is used when user's tx buffer is NULL*/
 volatile uint8_t g_lpspiDummyData[ARRAY_SIZE(s_lpspiBases)] = {0};
 /**********************************************************************************************************************
-* Code
-*********************************************************************************************************************/
+ * Code
+ *********************************************************************************************************************/
 uint32_t LPSPI_GetInstance(LPSPI_Type *base)
 {
     uint8_t instance = 0;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_lpspiBases); instance++)
-    {
-        if (s_lpspiBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_lpspiBases); instance++) {
+        if (s_lpspiBases[instance] == base) {
             break;
         }
     }
@@ -180,7 +178,7 @@ uint32_t LPSPI_GetInstance(LPSPI_Type *base)
 
 void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData)
 {
-    uint32_t instance = LPSPI_GetInstance(base);
+    uint32_t instance          = LPSPI_GetInstance(base);
     g_lpspiDummyData[instance] = dummyData;
 }
 
@@ -240,20 +238,20 @@ void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig)
 {
     assert(masterConfig);
 
-    masterConfig->baudRate = 500000;
+    masterConfig->baudRate     = 500000;
     masterConfig->bitsPerFrame = 8;
-    masterConfig->cpol = kLPSPI_ClockPolarityActiveHigh;
-    masterConfig->cpha = kLPSPI_ClockPhaseFirstEdge;
-    masterConfig->direction = kLPSPI_MsbFirst;
+    masterConfig->cpol         = kLPSPI_ClockPolarityActiveHigh;
+    masterConfig->cpha         = kLPSPI_ClockPhaseFirstEdge;
+    masterConfig->direction    = kLPSPI_MsbFirst;
 
-    masterConfig->pcsToSckDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2;
-    masterConfig->lastSckToPcsDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2;
+    masterConfig->pcsToSckDelayInNanoSec        = 1000000000 / masterConfig->baudRate * 2;
+    masterConfig->lastSckToPcsDelayInNanoSec    = 1000000000 / masterConfig->baudRate * 2;
     masterConfig->betweenTransferDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2;
 
-    masterConfig->whichPcs = kLPSPI_Pcs0;
+    masterConfig->whichPcs           = kLPSPI_Pcs0;
     masterConfig->pcsActiveHighOrLow = kLPSPI_PcsActiveLow;
 
-    masterConfig->pinCfg = kLPSPI_SdiInSdoOut;
+    masterConfig->pinCfg        = kLPSPI_SdiInSdoOut;
     masterConfig->dataOutConfig = kLpspiDataOutRetained;
 }
 
@@ -298,15 +296,15 @@ void LPSPI_SlaveGetDefaultConfig(lpspi_slave_config_t *slaveConfig)
 {
     assert(slaveConfig);
 
-    slaveConfig->bitsPerFrame = 8;                      /*!< Bits per frame, minimum 8, maximum 4096.*/
-    slaveConfig->cpol = kLPSPI_ClockPolarityActiveHigh; /*!< Clock polarity. */
-    slaveConfig->cpha = kLPSPI_ClockPhaseFirstEdge;     /*!< Clock phase. */
-    slaveConfig->direction = kLPSPI_MsbFirst;           /*!< MSB or LSB data shift direction. */
+    slaveConfig->bitsPerFrame = 8;                              /*!< Bits per frame, minimum 8, maximum 4096.*/
+    slaveConfig->cpol         = kLPSPI_ClockPolarityActiveHigh; /*!< Clock polarity. */
+    slaveConfig->cpha         = kLPSPI_ClockPhaseFirstEdge;     /*!< Clock phase. */
+    slaveConfig->direction    = kLPSPI_MsbFirst;                /*!< MSB or LSB data shift direction. */
 
-    slaveConfig->whichPcs = kLPSPI_Pcs0;                   /*!< Desired Peripheral Chip Select (pcs) */
+    slaveConfig->whichPcs           = kLPSPI_Pcs0;         /*!< Desired Peripheral Chip Select (pcs) */
     slaveConfig->pcsActiveHighOrLow = kLPSPI_PcsActiveLow; /*!< Desired PCS active high or low */
 
-    slaveConfig->pinCfg = kLPSPI_SdiInSdoOut;
+    slaveConfig->pinCfg        = kLPSPI_SdiInSdoOut;
     slaveConfig->dataOutConfig = kLpspiDataOutRetained;
 }
 
@@ -360,10 +358,9 @@ uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base,
     assert(tcrPrescaleValue);
 
     /* For master mode configuration only, if slave mode detected, return 0.
-    * Also, the LPSPI module needs to be disabled first, if enabled, return 0
-    */
-    if ((!LPSPI_IsMaster(base)) || (base->CR & LPSPI_CR_MEN_MASK))
-    {
+     * Also, the LPSPI module needs to be disabled first, if enabled, return 0
+     */
+    if ((!LPSPI_IsMaster(base)) || (base->CR & LPSPI_CR_MEN_MASK)) {
         return 0;
     }
 
@@ -374,49 +371,45 @@ uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base,
     uint32_t desiredBaudrate = baudRate_Bps;
 
     /* find combination of prescaler and scaler resulting in baudrate closest to the
-    * requested value
-    */
+     * requested value
+     */
     min_diff = 0xFFFFFFFFU;
 
     /* Set to maximum divisor value bit settings so that if baud rate passed in is less
-    * than the minimum possible baud rate, then the SPI will be configured to the lowest
-    * possible baud rate
-    */
+     * than the minimum possible baud rate, then the SPI will be configured to the lowest
+     * possible baud rate
+     */
     bestPrescaler = 7;
-    bestScaler = 255;
+    bestScaler    = 255;
 
     bestBaudrate = 0; /* required to avoid compilation warning */
 
     /* In all for loops, if min_diff = 0, the exit for loop*/
-    for (prescaler = 0; (prescaler < 8) && min_diff; prescaler++)
-    {
-        for (scaler = 0; (scaler < 256) && min_diff; scaler++)
-        {
+    for (prescaler = 0; (prescaler < 8) && min_diff; prescaler++) {
+        for (scaler = 0; (scaler < 256) && min_diff; scaler++) {
             realBaudrate = (srcClock_Hz / (s_baudratePrescaler[prescaler] * (scaler + 2U)));
 
             /* calculate the baud rate difference based on the conditional statement
-            * that states that the calculated baud rate must not exceed the desired baud rate
-            */
-            if (desiredBaudrate >= realBaudrate)
-            {
+             * that states that the calculated baud rate must not exceed the desired baud rate
+             */
+            if (desiredBaudrate >= realBaudrate) {
                 diff = desiredBaudrate - realBaudrate;
-                if (min_diff > diff)
-                {
+                if (min_diff > diff) {
                     /* a better match found */
-                    min_diff = diff;
+                    min_diff      = diff;
                     bestPrescaler = prescaler;
-                    bestScaler = scaler;
-                    bestBaudrate = realBaudrate;
+                    bestScaler    = scaler;
+                    bestBaudrate  = realBaudrate;
                 }
             }
         }
     }
 
     /* Write the best baud rate scalar to the CCR.
-    * Note, no need to check for error since we've already checked to make sure the module is
-    * disabled and in master mode. Also, there is a limit on the maximum divider so we will not
-    * exceed this.
-    */
+     * Note, no need to check for error since we've already checked to make sure the module is
+     * disabled and in master mode. Also, there is a limit on the maximum divider so we will not
+     * exceed this.
+     */
     base->CCR = (base->CCR & ~LPSPI_CCR_SCKDIV_MASK) | LPSPI_CCR_SCKDIV(bestScaler);
 
     /* return the best prescaler value for user to use later */
@@ -429,23 +422,22 @@ uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base,
 void LPSPI_MasterSetDelayScaler(LPSPI_Type *base, uint32_t scaler, lpspi_delay_type_t whichDelay)
 {
     /*These settings are only relevant in master mode */
-    switch (whichDelay)
-    {
-        case kLPSPI_PcsToSck:
-            base->CCR = (base->CCR & (~LPSPI_CCR_PCSSCK_MASK)) | LPSPI_CCR_PCSSCK(scaler);
+    switch (whichDelay) {
+    case kLPSPI_PcsToSck:
+        base->CCR = (base->CCR & (~LPSPI_CCR_PCSSCK_MASK)) | LPSPI_CCR_PCSSCK(scaler);
 
-            break;
-        case kLPSPI_LastSckToPcs:
-            base->CCR = (base->CCR & (~LPSPI_CCR_SCKPCS_MASK)) | LPSPI_CCR_SCKPCS(scaler);
+        break;
+    case kLPSPI_LastSckToPcs:
+        base->CCR = (base->CCR & (~LPSPI_CCR_SCKPCS_MASK)) | LPSPI_CCR_SCKPCS(scaler);
 
-            break;
-        case kLPSPI_BetweenTransfer:
-            base->CCR = (base->CCR & (~LPSPI_CCR_DBT_MASK)) | LPSPI_CCR_DBT(scaler);
+        break;
+    case kLPSPI_BetweenTransfer:
+        base->CCR = (base->CCR & (~LPSPI_CCR_DBT_MASK)) | LPSPI_CCR_DBT(scaler);
 
-            break;
-        default:
-            assert(false);
-            break;
+        break;
+    default:
+        assert(false);
+        break;
     }
 }
 
@@ -475,10 +467,9 @@ uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
     bestScaler = 0xFFU;
 
     /* Calculate the initial (min) delay and maximum possible delay based on the specific delay as
-    * the delay divisors are slightly different based on which delay we are configuring.
-    */
-    if (whichDelay == kLPSPI_BetweenTransfer)
-    {
+     * the delay divisors are slightly different based on which delay we are configuring.
+     */
+    if (whichDelay == kLPSPI_BetweenTransfer) {
         /* First calculate the initial, default delay, note min delay is 2 clock cycles. Due to large size of
          calculated values (uint64_t), we need to break up the calculation into several steps to ensure
          accurate calculated results
@@ -494,8 +485,7 @@ uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
 
         additionalScaler = 1U;
     }
-    else
-    {
+    else {
         /* First calculate the initial, default delay, min delay is 1 clock cycle. Due to large size of calculated
         values (uint64_t), we need to break up the calculation into several steps to ensure accurate calculated
         results.
@@ -512,18 +502,16 @@ uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
     }
 
     /* If the initial, default delay is already greater than the desired delay, then
-    * set the delay to their initial value (0) and return the delay. In other words,
-    * there is no way to decrease the delay value further.
-    */
-    if (initialDelayNanoSec >= delayTimeInNanoSec)
-    {
+     * set the delay to their initial value (0) and return the delay. In other words,
+     * there is no way to decrease the delay value further.
+     */
+    if (initialDelayNanoSec >= delayTimeInNanoSec) {
         LPSPI_MasterSetDelayScaler(base, 0, whichDelay);
         return initialDelayNanoSec;
     }
 
     /* If min_diff = 0, the exit for loop */
-    for (scaler = 0; (scaler < 256U) && min_diff; scaler++)
-    {
+    for (scaler = 0; (scaler < 256U) && min_diff; scaler++) {
         /* Calculate the real delay value as we cycle through the scaler values.
         Due to large size of calculated values (uint64_t), we need to break up the
         calculation into several steps to ensure accurate calculated results
@@ -533,17 +521,15 @@ uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
         realDelay /= clockDividedPrescaler;
 
         /* calculate the delay difference based on the conditional statement
-        * that states that the calculated delay must not be less then the desired delay
-        */
-        if (realDelay >= delayTimeInNanoSec)
-        {
+         * that states that the calculated delay must not be less then the desired delay
+         */
+        if (realDelay >= delayTimeInNanoSec) {
             diff = realDelay - delayTimeInNanoSec;
-            if (min_diff > diff)
-            {
+            if (min_diff > diff) {
                 /* a better match found */
-                min_diff = diff;
+                min_diff   = diff;
                 bestScaler = scaler;
-                bestDelay = realDelay;
+                bestDelay  = realDelay;
             }
         }
     }
@@ -581,14 +567,12 @@ bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFra
     assert(transfer);
 
     /* If the transfer count is zero, then return immediately.*/
-    if (transfer->dataSize == 0)
-    {
+    if (transfer->dataSize == 0) {
         return false;
     }
 
     /* If both send buffer and receive buffer is null */
-    if ((!(transfer->txData)) && (!(transfer->rxData)))
-    {
+    if ((!(transfer->txData)) && (!(transfer->rxData))) {
         return false;
     }
 
@@ -597,26 +581,19 @@ bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFra
      *the transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4 ,
      *otherwise , the transfer data size can be integer multiples of bytesPerFrame.
      */
-    if (bytesPerFrame <= 4)
-    {
-        if ((transfer->dataSize % bytesPerFrame) != 0)
-        {
+    if (bytesPerFrame <= 4) {
+        if ((transfer->dataSize % bytesPerFrame) != 0) {
             return false;
         }
     }
-    else
-    {
-        if ((bytesPerFrame % 4U) != 0)
-        {
-            if (transfer->dataSize != bytesPerFrame)
-            {
+    else {
+        if ((bytesPerFrame % 4U) != 0) {
+            if (transfer->dataSize != bytesPerFrame) {
                 return false;
             }
         }
-        else
-        {
-            if ((transfer->dataSize % bytesPerFrame) != 0)
-            {
+        else {
+            if ((transfer->dataSize % bytesPerFrame) != 0) {
                 return false;
             }
         }
@@ -629,24 +606,22 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
 {
     assert(transfer);
 
-    uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
+    uint32_t bitsPerFrame  = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
     uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
-    uint32_t temp = 0U;
-    uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
+    uint32_t temp          = 0U;
+    uint8_t dummyData      = g_lpspiDummyData[LPSPI_GetInstance(base)];
 
-    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
-    {
+    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame)) {
         return kStatus_InvalidArgument;
     }
 
     /* Check that LPSPI is not busy.*/
-    if (LPSPI_GetStatusFlags(base) & kLPSPI_ModuleBusyFlag)
-    {
+    if (LPSPI_GetStatusFlags(base) & kLPSPI_ModuleBusyFlag) {
         return kStatus_LPSPI_Busy;
     }
 
-    uint8_t *txData = transfer->txData;
-    uint8_t *rxData = transfer->rxData;
+    uint8_t *txData               = transfer->txData;
+    uint8_t *rxData               = transfer->rxData;
     uint32_t txRemainingByteCount = transfer->dataSize;
     uint32_t rxRemainingByteCount = transfer->dataSize;
 
@@ -663,14 +638,13 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
     uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
 
     bool isPcsContinuous = (bool)(transfer->configFlags & kLPSPI_MasterPcsContinuous);
-    bool isRxMask = false;
-    bool isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
+    bool isRxMask        = false;
+    bool isByteSwap      = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
 
     LPSPI_FlushFifo(base, true, true);
     LPSPI_ClearStatusFlags(base, kLPSPI_AllStatusFlag);
 
-    if (!rxData)
-    {
+    if (!rxData) {
         isRxMask = true;
     }
 
@@ -679,15 +653,12 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
     /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
     temp = base->CFGR1;
     temp &= LPSPI_CFGR1_PINCFG_MASK;
-    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
-    {
-        if (!txData)
-        {
+    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut))) {
+        if (!txData) {
             base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
         }
         /* The 3-wire mode can't send and receive data at the same time. */
-        if ((txData) && (rxData))
-        {
+        if ((txData) && (rxData)) {
             return kStatus_InvalidArgument;
         }
     }
@@ -697,32 +668,25 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
         (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_RXMSK_MASK | LPSPI_TCR_PCS_MASK)) |
         LPSPI_TCR_CONT(isPcsContinuous) | LPSPI_TCR_CONTC(0) | LPSPI_TCR_RXMSK(isRxMask) | LPSPI_TCR_PCS(whichPcs);
 
-    if (bytesPerFrame <= 4)
-    {
+    if (bytesPerFrame <= 4) {
         bytesEachWrite = bytesPerFrame;
-        bytesEachRead = bytesPerFrame;
+        bytesEachRead  = bytesPerFrame;
     }
-    else
-    {
+    else {
         bytesEachWrite = 4;
-        bytesEachRead = 4;
+        bytesEachRead  = 4;
     }
 
     /*Write the TX data until txRemainingByteCount is equal to 0 */
-    while (txRemainingByteCount > 0)
-    {
-        if (txRemainingByteCount < bytesEachWrite)
-        {
+    while (txRemainingByteCount > 0) {
+        if (txRemainingByteCount < bytesEachWrite) {
             bytesEachWrite = txRemainingByteCount;
         }
 
         /*Wait until TX FIFO is not full*/
-        while (LPSPI_GetTxFifoCount(base) == fifoSize)
-        {
-        }
+        while (LPSPI_GetTxFifoCount(base) == fifoSize) {}
 
-        if (txData)
-        {
+        if (txData) {
             wordToSend = LPSPI_CombineWriteData(txData, bytesEachWrite, isByteSwap);
             txData += bytesEachWrite;
         }
@@ -731,13 +695,10 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
         txRemainingByteCount -= bytesEachWrite;
 
         /*Check whether there is RX data in RX FIFO . Read out the RX data so that the RX FIFO would not overrun.*/
-        if (rxData)
-        {
-            while (LPSPI_GetRxFifoCount(base))
-            {
+        if (rxData) {
+            while (LPSPI_GetRxFifoCount(base)) {
                 readData = LPSPI_ReadData(base);
-                if (rxRemainingByteCount < bytesEachRead)
-                {
+                if (rxRemainingByteCount < bytesEachRead) {
                     bytesEachRead = rxRemainingByteCount;
                 }
 
@@ -752,22 +713,16 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
     /* After write all the data in TX FIFO , should write the TCR_CONTC to 0 to de-assert the PCS. Note that TCR
      * register also use the TX FIFO.
      */
-    while ((LPSPI_GetTxFifoCount(base) == fifoSize))
-    {
-    }
+    while ((LPSPI_GetTxFifoCount(base) == fifoSize)) {}
     base->TCR = (base->TCR & ~(LPSPI_TCR_CONTC_MASK));
 
     /*Read out the RX data in FIFO*/
-    if (rxData)
-    {
-        while (rxRemainingByteCount > 0)
-        {
-            while (LPSPI_GetRxFifoCount(base))
-            {
+    if (rxData) {
+        while (rxRemainingByteCount > 0) {
+            while (LPSPI_GetRxFifoCount(base)) {
                 readData = LPSPI_ReadData(base);
 
-                if (rxRemainingByteCount < bytesEachRead)
-                {
+                if (rxRemainingByteCount < bytesEachRead) {
                     bytesEachRead = rxRemainingByteCount;
                 }
 
@@ -778,12 +733,9 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
             }
         }
     }
-    else
-    {
+    else {
         /* If no RX buffer, then transfer is not complete until transfer complete flag sets */
-        while (!(LPSPI_GetStatusFlags(base) & kLPSPI_TransferCompleteFlag))
-        {
-        }
+        while (!(LPSPI_GetStatusFlags(base) & kLPSPI_TransferCompleteFlag)) {}
     }
 
     return kStatus_Success;
@@ -794,19 +746,17 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
     assert(handle);
     assert(transfer);
 
-    uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
+    uint32_t bitsPerFrame  = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
     uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
-    uint32_t temp = 0U;
-    uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
+    uint32_t temp          = 0U;
+    uint8_t dummyData      = g_lpspiDummyData[LPSPI_GetInstance(base)];
 
-    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
-    {
+    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame)) {
         return kStatus_InvalidArgument;
     }
 
     /* Check that we're not busy.*/
-    if (handle->state == kLPSPI_Busy)
-    {
+    if (handle->state == kLPSPI_Busy) {
         return kStatus_LPSPI_Busy;
     }
 
@@ -818,16 +768,16 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
 
     uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
 
-    handle->txData = transfer->txData;
-    handle->rxData = transfer->rxData;
+    handle->txData               = transfer->txData;
+    handle->rxData               = transfer->rxData;
     handle->txRemainingByteCount = transfer->dataSize;
     handle->rxRemainingByteCount = transfer->dataSize;
-    handle->totalByteCount = transfer->dataSize;
+    handle->totalByteCount       = transfer->dataSize;
 
     handle->writeTcrInIsr = false;
 
     handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
-    handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
+    handle->readRegRemainingTimes  = handle->writeRegRemainingTimes;
 
     handle->txBuffIfNull =
         ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
@@ -836,17 +786,15 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
     handle->fifoSize = LPSPI_GetRxFifoSize(base);
 
     handle->isPcsContinuous = (bool)(transfer->configFlags & kLPSPI_MasterPcsContinuous);
-    handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
+    handle->isByteSwap      = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
 
     /*Set the RX and TX watermarks to reduce the ISR times.*/
-    if (handle->fifoSize > 1)
-    {
-        txWatermark = 1;
+    if (handle->fifoSize > 1) {
+        txWatermark         = 1;
         handle->rxWatermark = handle->fifoSize - 2;
     }
-    else
-    {
-        txWatermark = 0;
+    else {
+        txWatermark         = 0;
         handle->rxWatermark = 0;
     }
 
@@ -858,15 +806,12 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
     /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
     temp = base->CFGR1;
     temp &= LPSPI_CFGR1_PINCFG_MASK;
-    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
-    {
-        if (!handle->txData)
-        {
+    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut))) {
+        if (!handle->txData) {
             base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
         }
         /* The 3-wire mode can't send and receive data at the same time. */
-        if ((handle->txData) && (handle->rxData))
-        {
+        if ((handle->txData) && (handle->rxData)) {
             return kStatus_InvalidArgument;
         }
     }
@@ -880,9 +825,8 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
     /* If there is not rxData , can mask the receive data (receive data is not stored in receive FIFO).
      * For master transfer , we'd better not masked the transmit data in TCR since the transfer flow is hard to
      * controlled by software.*/
-    if (handle->rxData == NULL)
-    {
-        isRxMask = true;
+    if (handle->rxData == NULL) {
+        isRxMask                     = true;
         handle->rxRemainingByteCount = 0;
     }
 
@@ -892,15 +836,13 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
         LPSPI_TCR_PCS(whichPcs);
 
     /*Calculate the bytes for write/read the TX/RX register each time*/
-    if (bytesPerFrame <= 4)
-    {
+    if (bytesPerFrame <= 4) {
         handle->bytesEachWrite = bytesPerFrame;
-        handle->bytesEachRead = bytesPerFrame;
+        handle->bytesEachRead  = bytesPerFrame;
     }
-    else
-    {
+    else {
         handle->bytesEachWrite = 4;
-        handle->bytesEachRead = 4;
+        handle->bytesEachRead  = 4;
     }
 
     /* Enable the NVIC for LPSPI peripheral. Note that below code is useless if the LPSPI interrupt is in INTMUX ,
@@ -909,29 +851,24 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
     EnableIRQ(s_lpspiIRQ[LPSPI_GetInstance(base)]);
 
     /*TCR is also shared the FIFO , so wait for TCR written.*/
-    while (LPSPI_GetTxFifoCount(base) != 0)
-    {
-    }
+    while (LPSPI_GetTxFifoCount(base) != 0) {}
     /*Fill up the TX data in FIFO */
     LPSPI_MasterTransferFillUpTxFifo(base, handle);
 
     /* Since SPI is a synchronous interface, we only need to enable the RX interrupt if there is RX data.
      * The IRQ handler will get the status of RX and TX interrupt flags.
      */
-    if (handle->rxData)
-    {
+    if (handle->rxData) {
         /*Set rxWatermark to (readRegRemainingTimes-1) if readRegRemainingTimes less than rxWatermark. Otherwise there
          *is not RX interrupt for the last datas because the RX count is not greater than rxWatermark.
          */
-        if ((handle->readRegRemainingTimes) <= handle->rxWatermark)
-        {
+        if ((handle->readRegRemainingTimes) <= handle->rxWatermark) {
             base->FCR = (base->FCR & (~LPSPI_FCR_RXWATER_MASK)) | LPSPI_FCR_RXWATER(handle->readRegRemainingTimes - 1);
         }
 
         LPSPI_EnableInterrupts(base, kLPSPI_RxInterruptEnable);
     }
-    else
-    {
+    else {
         LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable);
     }
 
@@ -945,25 +882,21 @@ static void LPSPI_MasterTransferFillUpTxFifo(LPSPI_Type *base, lpspi_master_hand
     uint32_t wordToSend = 0;
 
     /* Make sure the difference in remaining TX and RX byte counts does not exceed FIFO depth
-    * and that the number of TX FIFO entries does not exceed the FIFO depth.
-    * But no need to make the protection if there is no rxData.
-    */
+     * and that the number of TX FIFO entries does not exceed the FIFO depth.
+     * But no need to make the protection if there is no rxData.
+     */
     while ((LPSPI_GetTxFifoCount(base) < (handle->fifoSize)) &&
            (((handle->readRegRemainingTimes - handle->writeRegRemainingTimes) < handle->fifoSize) ||
-            (handle->rxData == NULL)))
-    {
-        if (handle->txRemainingByteCount < handle->bytesEachWrite)
-        {
+            (handle->rxData == NULL))) {
+        if (handle->txRemainingByteCount < handle->bytesEachWrite) {
             handle->bytesEachWrite = handle->txRemainingByteCount;
         }
 
-        if (handle->txData)
-        {
+        if (handle->txData) {
             wordToSend = LPSPI_CombineWriteData(handle->txData, handle->bytesEachWrite, handle->isByteSwap);
             handle->txData += handle->bytesEachWrite;
         }
-        else
-        {
+        else {
             wordToSend = handle->txBuffIfNull;
         }
 
@@ -976,20 +909,16 @@ static void LPSPI_MasterTransferFillUpTxFifo(LPSPI_Type *base, lpspi_master_hand
         /*Decrease the remaining TX byte count.*/
         handle->txRemainingByteCount -= handle->bytesEachWrite;
 
-        if (handle->txRemainingByteCount == 0)
-        {
+        if (handle->txRemainingByteCount == 0) {
             /* If PCS is continuous, update TCR to de-assert PCS */
-            if (handle->isPcsContinuous)
-            {
+            if (handle->isPcsContinuous) {
                 /* Only write to the TCR if the FIFO has room */
-                if ((LPSPI_GetTxFifoCount(base) < (handle->fifoSize)))
-                {
-                    base->TCR = (base->TCR & ~(LPSPI_TCR_CONTC_MASK));
+                if ((LPSPI_GetTxFifoCount(base) < (handle->fifoSize))) {
+                    base->TCR             = (base->TCR & ~(LPSPI_TCR_CONTC_MASK));
                     handle->writeTcrInIsr = false;
                 }
                 /* Else, set a global flag to tell the ISR to do write to the TCR */
-                else
-                {
+                else {
                     handle->writeTcrInIsr = true;
                 }
             }
@@ -1007,8 +936,7 @@ static void LPSPI_MasterTransferComplete(LPSPI_Type *base, lpspi_master_handle_t
 
     handle->state = kLPSPI_Idle;
 
-    if (handle->callback)
-    {
+    if (handle->callback) {
         handle->callback(base, handle, kStatus_Success, handle->userData);
     }
 }
@@ -1017,26 +945,22 @@ status_t LPSPI_MasterTransferGetCount(LPSPI_Type *base, lpspi_master_handle_t *h
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (handle->state != kLPSPI_Busy)
-    {
+    if (handle->state != kLPSPI_Busy) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
 
     size_t remainingByte;
 
-    if (handle->rxData)
-    {
+    if (handle->rxData) {
         remainingByte = handle->rxRemainingByteCount;
     }
-    else
-    {
+    else {
         remainingByte = handle->txRemainingByteCount;
     }
 
@@ -1054,7 +978,7 @@ void LPSPI_MasterTransferAbort(LPSPI_Type *base, lpspi_master_handle_t *handle)
 
     LPSPI_Reset(base);
 
-    handle->state = kLPSPI_Idle;
+    handle->state                = kLPSPI_Idle;
     handle->txRemainingByteCount = 0;
     handle->rxRemainingByteCount = 0;
 }
@@ -1065,26 +989,22 @@ void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *hand
 
     uint32_t readData;
 
-    if (handle->rxData != NULL)
-    {
-        if (handle->rxRemainingByteCount)
-        {
+    if (handle->rxData != NULL) {
+        if (handle->rxRemainingByteCount) {
             /* First, disable the interrupts to avoid potentially triggering another interrupt
-            * while reading out the RX FIFO as more data may be coming into the RX FIFO. We'll
-            * re-enable the interrupts based on the LPSPI state after reading out the FIFO.
-            */
+             * while reading out the RX FIFO as more data may be coming into the RX FIFO. We'll
+             * re-enable the interrupts based on the LPSPI state after reading out the FIFO.
+             */
             LPSPI_DisableInterrupts(base, kLPSPI_RxInterruptEnable);
 
-            while ((LPSPI_GetRxFifoCount(base)) && (handle->rxRemainingByteCount))
-            {
+            while ((LPSPI_GetRxFifoCount(base)) && (handle->rxRemainingByteCount)) {
                 /*Read out the data*/
                 readData = LPSPI_ReadData(base);
 
                 /*Decrease the read RX register times.*/
                 --handle->readRegRemainingTimes;
 
-                if (handle->rxRemainingByteCount < handle->bytesEachRead)
-                {
+                if (handle->rxRemainingByteCount < handle->bytesEachRead) {
                     handle->bytesEachRead = handle->rxRemainingByteCount;
                 }
 
@@ -1096,10 +1016,9 @@ void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *hand
             }
 
             /* Re-enable the interrupts only if rxCount indicates there is more data to receive,
-            * else we may get a spurious interrupt.
-            * */
-            if (handle->rxRemainingByteCount)
-            {
+             * else we may get a spurious interrupt.
+             * */
+            if (handle->rxRemainingByteCount) {
                 /* Set the TDF and RDF interrupt enables simultaneously to avoid race conditions */
                 LPSPI_EnableInterrupts(base, kLPSPI_RxInterruptEnable);
             }
@@ -1108,48 +1027,38 @@ void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *hand
         /*Set rxWatermark to (readRegRemainingTimes-1) if readRegRemainingTimes less than rxWatermark. Otherwise there
          *is not RX interrupt for the last datas because the RX count is not greater than rxWatermark.
          */
-        if ((handle->readRegRemainingTimes) <= (handle->rxWatermark))
-        {
+        if ((handle->readRegRemainingTimes) <= (handle->rxWatermark)) {
             base->FCR =
                 (base->FCR & (~LPSPI_FCR_RXWATER_MASK)) |
                 LPSPI_FCR_RXWATER((handle->readRegRemainingTimes > 1) ? (handle->readRegRemainingTimes - 1U) : (0U));
         }
     }
 
-    if (handle->txRemainingByteCount)
-    {
+    if (handle->txRemainingByteCount) {
         LPSPI_MasterTransferFillUpTxFifo(base, handle);
     }
-    else
-    {
-        if ((LPSPI_GetTxFifoCount(base) < (handle->fifoSize)))
-        {
-            if ((handle->isPcsContinuous) && (handle->writeTcrInIsr))
-            {
-                base->TCR = (base->TCR & ~(LPSPI_TCR_CONTC_MASK));
+    else {
+        if ((LPSPI_GetTxFifoCount(base) < (handle->fifoSize))) {
+            if ((handle->isPcsContinuous) && (handle->writeTcrInIsr)) {
+                base->TCR             = (base->TCR & ~(LPSPI_TCR_CONTC_MASK));
                 handle->writeTcrInIsr = false;
             }
         }
     }
 
-    if ((handle->txRemainingByteCount == 0) && (handle->rxRemainingByteCount == 0) && (!handle->writeTcrInIsr))
-    {
+    if ((handle->txRemainingByteCount == 0) && (handle->rxRemainingByteCount == 0) && (!handle->writeTcrInIsr)) {
         /* If no RX buffer, then transfer is not complete until transfer complete flag sets */
-        if (handle->rxData == NULL)
-        {
-            if (LPSPI_GetStatusFlags(base) & kLPSPI_TransferCompleteFlag)
-            {
+        if (handle->rxData == NULL) {
+            if (LPSPI_GetStatusFlags(base) & kLPSPI_TransferCompleteFlag) {
                 /* Complete the transfer and disable the interrupts */
                 LPSPI_MasterTransferComplete(base, handle);
             }
-            else
-            {
+            else {
                 LPSPI_EnableInterrupts(base, kLPSPI_TransferCompleteInterruptEnable);
                 LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable);
             }
         }
-        else
-        {
+        else {
             /* Complete the transfer and disable the interrupts */
             LPSPI_MasterTransferComplete(base, handle);
         }
@@ -1181,18 +1090,16 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
     assert(handle);
     assert(transfer);
 
-    uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
+    uint32_t bitsPerFrame  = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
     uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
-    uint32_t temp = 0U;
+    uint32_t temp          = 0U;
 
-    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
-    {
+    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame)) {
         return kStatus_InvalidArgument;
     }
 
     /* Check that we're not busy.*/
-    if (handle->state == kLPSPI_Busy)
-    {
+    if (handle->state == kLPSPI_Busy) {
         return kStatus_LPSPI_Busy;
     }
     handle->state = kLPSPI_Busy;
@@ -1202,14 +1109,14 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
 
     uint32_t whichPcs = (transfer->configFlags & LPSPI_SLAVE_PCS_MASK) >> LPSPI_SLAVE_PCS_SHIFT;
 
-    handle->txData = transfer->txData;
-    handle->rxData = transfer->rxData;
+    handle->txData               = transfer->txData;
+    handle->rxData               = transfer->rxData;
     handle->txRemainingByteCount = transfer->dataSize;
     handle->rxRemainingByteCount = transfer->dataSize;
-    handle->totalByteCount = transfer->dataSize;
+    handle->totalByteCount       = transfer->dataSize;
 
     handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
-    handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
+    handle->readRegRemainingTimes  = handle->writeRegRemainingTimes;
 
     /*The TX and RX FIFO sizes are always the same*/
     handle->fifoSize = LPSPI_GetRxFifoSize(base);
@@ -1218,14 +1125,12 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
 
     /*Set the RX and TX watermarks to reduce the ISR times.*/
     uint8_t txWatermark;
-    if (handle->fifoSize > 1)
-    {
-        txWatermark = 1;
+    if (handle->fifoSize > 1) {
+        txWatermark         = 1;
         handle->rxWatermark = handle->fifoSize - 2;
     }
-    else
-    {
-        txWatermark = 0;
+    else {
+        txWatermark         = 0;
         handle->rxWatermark = 0;
     }
     LPSPI_SetFifoWatermarks(base, txWatermark, handle->rxWatermark);
@@ -1233,17 +1138,14 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
     /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
     temp = base->CFGR1;
     temp &= LPSPI_CFGR1_PINCFG_MASK;
-    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
-    {
-        if (!handle->txData)
-        {
+    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut))) {
+        if (!handle->txData) {
             LPSPI_Enable(base, false);
             base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
             LPSPI_Enable(base, true);
         }
         /* The 3-wire mode can't send and receive data at the same time. */
-        if ((handle->txData) && (handle->rxData))
-        {
+        if ((handle->txData) && (handle->rxData)) {
             return kStatus_InvalidArgument;
         }
     }
@@ -1254,37 +1156,32 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
     LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
 
     /*If there is not rxData , can mask the receive data (receive data is not stored in receive FIFO).*/
-    if (handle->rxData == NULL)
-    {
-        isRxMask = true;
+    if (handle->rxData == NULL) {
+        isRxMask                     = true;
         handle->rxRemainingByteCount = 0;
     }
 
     /*If there is not txData , can mask the transmit data (no data is loaded from transmit FIFO and output pin
      * is tristated).
      */
-    if (handle->txData == NULL)
-    {
-        isTxMask = true;
+    if (handle->txData == NULL) {
+        isTxMask                     = true;
         handle->txRemainingByteCount = 0;
     }
 
-    base->TCR = (base->TCR &
-                 ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_RXMSK_MASK | LPSPI_TCR_TXMSK_MASK |
-                   LPSPI_TCR_PCS_MASK)) |
+    base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_RXMSK_MASK |
+                               LPSPI_TCR_TXMSK_MASK | LPSPI_TCR_PCS_MASK)) |
                 LPSPI_TCR_CONT(0) | LPSPI_TCR_CONTC(0) | LPSPI_TCR_RXMSK(isRxMask) | LPSPI_TCR_TXMSK(isTxMask) |
                 LPSPI_TCR_PCS(whichPcs);
 
     /*Calculate the bytes for write/read the TX/RX register each time*/
-    if (bytesPerFrame <= 4)
-    {
+    if (bytesPerFrame <= 4) {
         handle->bytesEachWrite = bytesPerFrame;
-        handle->bytesEachRead = bytesPerFrame;
+        handle->bytesEachRead  = bytesPerFrame;
     }
-    else
-    {
+    else {
         handle->bytesEachWrite = 4;
-        handle->bytesEachRead = 4;
+        handle->bytesEachRead  = 4;
     }
 
     /* Enable the NVIC for LPSPI peripheral. Note that below code is useless if the LPSPI interrupt is in INTMUX ,
@@ -1293,43 +1190,35 @@ status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *
     EnableIRQ(s_lpspiIRQ[LPSPI_GetInstance(base)]);
 
     /*TCR is also shared the FIFO , so wait for TCR written.*/
-    while (LPSPI_GetTxFifoCount(base) != 0)
-    {
-    }
+    while (LPSPI_GetTxFifoCount(base) != 0) {}
 
     /*Fill up the TX data in FIFO */
-    if (handle->txData)
-    {
+    if (handle->txData) {
         LPSPI_SlaveTransferFillUpTxFifo(base, handle);
     }
 
     /* Since SPI is a synchronous interface, we only need to enable the RX interrupt if there is RX data.
      * The IRQ handler will get the status of RX and TX interrupt flags.
      */
-    if (handle->rxData)
-    {
+    if (handle->rxData) {
         /*Set rxWatermark to (readRegRemainingTimes-1) if readRegRemainingTimes less than rxWatermark. Otherwise there
          *is not RX interrupt for the last datas because the RX count is not greater than rxWatermark.
          */
-        if ((handle->readRegRemainingTimes) <= handle->rxWatermark)
-        {
+        if ((handle->readRegRemainingTimes) <= handle->rxWatermark) {
             base->FCR = (base->FCR & (~LPSPI_FCR_RXWATER_MASK)) | LPSPI_FCR_RXWATER(handle->readRegRemainingTimes - 1);
         }
 
         LPSPI_EnableInterrupts(base, kLPSPI_RxInterruptEnable);
     }
-    else
-    {
+    else {
         LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable);
     }
 
-    if (handle->rxData)
-    {
+    if (handle->rxData) {
         /* RX FIFO overflow request enable */
         LPSPI_EnableInterrupts(base, kLPSPI_ReceiveErrorInterruptEnable);
     }
-    if (handle->txData)
-    {
+    if (handle->txData) {
         /* TX FIFO underflow request enable */
         LPSPI_EnableInterrupts(base, kLPSPI_TransmitErrorInterruptEnable);
     }
@@ -1343,10 +1232,8 @@ static void LPSPI_SlaveTransferFillUpTxFifo(LPSPI_Type *base, lpspi_slave_handle
 
     uint32_t wordToSend = 0;
 
-    while (LPSPI_GetTxFifoCount(base) < (handle->fifoSize))
-    {
-        if (handle->txRemainingByteCount < handle->bytesEachWrite)
-        {
+    while (LPSPI_GetTxFifoCount(base) < (handle->fifoSize)) {
+        if (handle->txRemainingByteCount < handle->bytesEachWrite) {
             handle->bytesEachWrite = handle->txRemainingByteCount;
         }
 
@@ -1359,8 +1246,7 @@ static void LPSPI_SlaveTransferFillUpTxFifo(LPSPI_Type *base, lpspi_slave_handle
         /*Write the word to TX register*/
         LPSPI_WriteData(base, wordToSend);
 
-        if (handle->txRemainingByteCount == 0)
-        {
+        if (handle->txRemainingByteCount == 0) {
             break;
         }
     }
@@ -1375,19 +1261,16 @@ static void LPSPI_SlaveTransferComplete(LPSPI_Type *base, lpspi_slave_handle_t *
     /* Disable interrupt requests*/
     LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
 
-    if (handle->state == kLPSPI_Error)
-    {
+    if (handle->state == kLPSPI_Error) {
         status = kStatus_LPSPI_Error;
     }
-    else
-    {
+    else {
         status = kStatus_Success;
     }
 
     handle->state = kLPSPI_Idle;
 
-    if (handle->callback)
-    {
+    if (handle->callback) {
         handle->callback(base, handle, status, handle->userData);
     }
 }
@@ -1396,26 +1279,22 @@ status_t LPSPI_SlaveTransferGetCount(LPSPI_Type *base, lpspi_slave_handle_t *han
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (handle->state != kLPSPI_Busy)
-    {
+    if (handle->state != kLPSPI_Busy) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
 
     size_t remainingByte;
 
-    if (handle->rxData)
-    {
+    if (handle->rxData) {
         remainingByte = handle->rxRemainingByteCount;
     }
-    else
-    {
+    else {
         remainingByte = handle->txRemainingByteCount;
     }
 
@@ -1433,7 +1312,7 @@ void LPSPI_SlaveTransferAbort(LPSPI_Type *base, lpspi_slave_handle_t *handle)
 
     LPSPI_Reset(base);
 
-    handle->state = kLPSPI_Idle;
+    handle->state                = kLPSPI_Idle;
     handle->txRemainingByteCount = 0;
     handle->rxRemainingByteCount = 0;
 }
@@ -1445,20 +1324,16 @@ void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle
     uint32_t readData;   /* variable to store word read from RX FIFO */
     uint32_t wordToSend; /* variable to store word to write to TX FIFO */
 
-    if (handle->rxData != NULL)
-    {
-        if (handle->rxRemainingByteCount > 0)
-        {
-            while (LPSPI_GetRxFifoCount(base))
-            {
+    if (handle->rxData != NULL) {
+        if (handle->rxRemainingByteCount > 0) {
+            while (LPSPI_GetRxFifoCount(base)) {
                 /*Read out the data*/
                 readData = LPSPI_ReadData(base);
 
                 /*Decrease the read RX register times.*/
                 --handle->readRegRemainingTimes;
 
-                if (handle->rxRemainingByteCount < handle->bytesEachRead)
-                {
+                if (handle->rxRemainingByteCount < handle->bytesEachRead) {
                     handle->bytesEachRead = handle->rxRemainingByteCount;
                 }
 
@@ -1468,10 +1343,8 @@ void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle
                 /*Decrease the remaining RX byte count.*/
                 handle->rxRemainingByteCount -= handle->bytesEachRead;
 
-                if ((handle->txRemainingByteCount > 0) && (handle->txData != NULL))
-                {
-                    if (handle->txRemainingByteCount < handle->bytesEachWrite)
-                    {
+                if ((handle->txRemainingByteCount > 0) && (handle->txData != NULL)) {
+                    if (handle->txRemainingByteCount < handle->bytesEachWrite) {
                         handle->bytesEachWrite = handle->txRemainingByteCount;
                     }
 
@@ -1485,8 +1358,7 @@ void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle
                     LPSPI_WriteData(base, wordToSend);
                 }
 
-                if (handle->rxRemainingByteCount == 0)
-                {
+                if (handle->rxRemainingByteCount == 0) {
                     break;
                 }
             }
@@ -1495,64 +1367,52 @@ void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle
         /*Set rxWatermark to (readRegRemainingTimes-1) if readRegRemainingTimes less than rxWatermark. Otherwise there
          *is not RX interrupt for the last datas because the RX count is not greater than rxWatermark.
          */
-        if ((handle->readRegRemainingTimes) <= (handle->rxWatermark))
-        {
+        if ((handle->readRegRemainingTimes) <= (handle->rxWatermark)) {
             base->FCR =
                 (base->FCR & (~LPSPI_FCR_RXWATER_MASK)) |
                 LPSPI_FCR_RXWATER((handle->readRegRemainingTimes > 1) ? (handle->readRegRemainingTimes - 1U) : (0U));
         }
     }
-    else if ((handle->txRemainingByteCount) && (handle->txData != NULL))
-    {
+    else if ((handle->txRemainingByteCount) && (handle->txData != NULL)) {
         LPSPI_SlaveTransferFillUpTxFifo(base, handle);
     }
-    else
-    {
+    else {
         __NOP();
     }
 
-    if ((handle->txRemainingByteCount == 0) && (handle->rxRemainingByteCount == 0))
-    {
+    if ((handle->txRemainingByteCount == 0) && (handle->rxRemainingByteCount == 0)) {
         /* If no RX buffer, then transfer is not complete until transfer complete flag sets and the TX FIFO empty*/
-        if (handle->rxData == NULL)
-        {
-            if ((LPSPI_GetStatusFlags(base) & kLPSPI_FrameCompleteFlag) && (LPSPI_GetTxFifoCount(base) == 0))
-            {
+        if (handle->rxData == NULL) {
+            if ((LPSPI_GetStatusFlags(base) & kLPSPI_FrameCompleteFlag) && (LPSPI_GetTxFifoCount(base) == 0)) {
                 /* Complete the transfer and disable the interrupts */
                 LPSPI_SlaveTransferComplete(base, handle);
             }
-            else
-            {
+            else {
                 LPSPI_ClearStatusFlags(base, kLPSPI_FrameCompleteFlag);
                 LPSPI_EnableInterrupts(base, kLPSPI_FrameCompleteInterruptEnable);
                 LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable);
             }
         }
-        else
-        {
+        else {
             /* Complete the transfer and disable the interrupts */
             LPSPI_SlaveTransferComplete(base, handle);
         }
     }
 
     /* Catch tx fifo underflow conditions, service only if tx under flow interrupt enabled */
-    if ((LPSPI_GetStatusFlags(base) & kLPSPI_TransmitErrorFlag) && (base->IER & LPSPI_IER_TEIE_MASK))
-    {
+    if ((LPSPI_GetStatusFlags(base) & kLPSPI_TransmitErrorFlag) && (base->IER & LPSPI_IER_TEIE_MASK)) {
         LPSPI_ClearStatusFlags(base, kLPSPI_TransmitErrorFlag);
         /* Change state to error and clear flag */
-        if (handle->txData)
-        {
+        if (handle->txData) {
             handle->state = kLPSPI_Error;
         }
         handle->errorCount++;
     }
     /* Catch rx fifo overflow conditions, service only if rx over flow interrupt enabled */
-    if ((LPSPI_GetStatusFlags(base) & kLPSPI_ReceiveErrorFlag) && (base->IER & LPSPI_IER_REIE_MASK))
-    {
+    if ((LPSPI_GetStatusFlags(base) & kLPSPI_ReceiveErrorFlag) && (base->IER & LPSPI_IER_REIE_MASK)) {
         LPSPI_ClearStatusFlags(base, kLPSPI_ReceiveErrorFlag);
         /* Change state to error and clear flag */
-        if (handle->txData)
-        {
+        if (handle->txData) {
             handle->state = kLPSPI_Error;
         }
         handle->errorCount++;
@@ -1565,80 +1425,73 @@ static uint32_t LPSPI_CombineWriteData(uint8_t *txData, uint32_t bytesEachWrite,
 
     uint32_t wordToSend = 0;
 
-    switch (bytesEachWrite)
-    {
-        case 1:
+    switch (bytesEachWrite) {
+    case 1:
+        wordToSend = *txData;
+        ++txData;
+        break;
+
+    case 2:
+        if (!isByteSwap) {
             wordToSend = *txData;
             ++txData;
-            break;
+            wordToSend |= (unsigned)(*txData) << 8U;
+            ++txData;
+        }
+        else {
+            wordToSend = (unsigned)(*txData) << 8U;
+            ++txData;
+            wordToSend |= *txData;
+            ++txData;
+        }
 
-        case 2:
-            if (!isByteSwap)
-            {
-                wordToSend = *txData;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 8U;
-                ++txData;
-            }
-            else
-            {
-                wordToSend = (unsigned)(*txData) << 8U;
-                ++txData;
-                wordToSend |= *txData;
-                ++txData;
-            }
+        break;
 
-            break;
+    case 3:
+        if (!isByteSwap) {
+            wordToSend = *txData;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 8U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 16U;
+            ++txData;
+        }
+        else {
+            wordToSend = (unsigned)(*txData) << 16U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 8U;
+            ++txData;
+            wordToSend |= *txData;
+            ++txData;
+        }
+        break;
 
-        case 3:
-            if (!isByteSwap)
-            {
-                wordToSend = *txData;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 8U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 16U;
-                ++txData;
-            }
-            else
-            {
-                wordToSend = (unsigned)(*txData) << 16U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 8U;
-                ++txData;
-                wordToSend |= *txData;
-                ++txData;
-            }
-            break;
+    case 4:
+        if (!isByteSwap) {
+            wordToSend = *txData;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 8U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 16U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 24U;
+            ++txData;
+        }
+        else {
+            wordToSend = (unsigned)(*txData) << 24U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 16U;
+            ++txData;
+            wordToSend |= (unsigned)(*txData) << 8U;
+            ++txData;
+            wordToSend |= *txData;
+            ++txData;
+        }
+        break;
 
-        case 4:
-            if (!isByteSwap)
-            {
-                wordToSend = *txData;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 8U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 16U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 24U;
-                ++txData;
-            }
-            else
-            {
-                wordToSend = (unsigned)(*txData) << 24U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 16U;
-                ++txData;
-                wordToSend |= (unsigned)(*txData) << 8U;
-                ++txData;
-                wordToSend |= *txData;
-                ++txData;
-            }
-            break;
-
-        default:
-            assert(false);
-            break;
+    default:
+        assert(false);
+        break;
     }
     return wordToSend;
 }
@@ -1647,90 +1500,81 @@ static void LPSPI_SeparateReadData(uint8_t *rxData, uint32_t readData, uint32_t
 {
     assert(rxData);
 
-    switch (bytesEachRead)
-    {
-        case 1:
+    switch (bytesEachRead) {
+    case 1:
+        *rxData = readData;
+        ++rxData;
+        break;
+
+    case 2:
+        if (!isByteSwap) {
             *rxData = readData;
             ++rxData;
-            break;
+            *rxData = readData >> 8;
+            ++rxData;
+        }
+        else {
+            *rxData = readData >> 8;
+            ++rxData;
+            *rxData = readData;
+            ++rxData;
+        }
+        break;
 
-        case 2:
-            if (!isByteSwap)
-            {
-                *rxData = readData;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-            }
-            else
-            {
-                *rxData = readData >> 8;
-                ++rxData;
-                *rxData = readData;
-                ++rxData;
-            }
-            break;
+    case 3:
+        if (!isByteSwap) {
+            *rxData = readData;
+            ++rxData;
+            *rxData = readData >> 8;
+            ++rxData;
+            *rxData = readData >> 16;
+            ++rxData;
+        }
+        else {
+            *rxData = readData >> 16;
+            ++rxData;
+            *rxData = readData >> 8;
+            ++rxData;
+            *rxData = readData;
+            ++rxData;
+        }
+        break;
 
-        case 3:
-            if (!isByteSwap)
-            {
-                *rxData = readData;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-                *rxData = readData >> 16;
-                ++rxData;
-            }
-            else
-            {
-                *rxData = readData >> 16;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-                *rxData = readData;
-                ++rxData;
-            }
-            break;
+    case 4:
+        if (!isByteSwap) {
+            *rxData = readData;
+            ++rxData;
+            *rxData = readData >> 8;
+            ++rxData;
+            *rxData = readData >> 16;
+            ++rxData;
+            *rxData = readData >> 24;
+            ++rxData;
+        }
+        else {
+            *rxData = readData >> 24;
+            ++rxData;
+            *rxData = readData >> 16;
+            ++rxData;
+            *rxData = readData >> 8;
+            ++rxData;
+            *rxData = readData;
+            ++rxData;
+        }
+        break;
 
-        case 4:
-            if (!isByteSwap)
-            {
-                *rxData = readData;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-                *rxData = readData >> 16;
-                ++rxData;
-                *rxData = readData >> 24;
-                ++rxData;
-            }
-            else
-            {
-                *rxData = readData >> 24;
-                ++rxData;
-                *rxData = readData >> 16;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-                *rxData = readData;
-                ++rxData;
-            }
-            break;
-
-        default:
-            assert(false);
-            break;
+    default:
+        assert(false);
+        break;
     }
 }
 
 static void LPSPI_CommonIRQHandler(LPSPI_Type *base, void *param)
 {
-    if (LPSPI_IsMaster(base))
-    {
+    if (LPSPI_IsMaster(base)) {
         s_lpspiMasterIsr(base, (lpspi_master_handle_t *)param);
     }
-    else
-    {
+    else {
         s_lpspiSlaveIsr(base, (lpspi_slave_handle_t *)param);
     }
 /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.h
index 72895a225..9d48275e1 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi.h
@@ -62,25 +62,25 @@ extern volatile uint8_t g_lpspiDummyData[];
 /*! @brief Status for the LPSPI driver.*/
 enum _lpspi_status
 {
-    kStatus_LPSPI_Busy = MAKE_STATUS(kStatusGroup_LPSPI, 0),      /*!< LPSPI transfer is busy.*/
-    kStatus_LPSPI_Error = MAKE_STATUS(kStatusGroup_LPSPI, 1),     /*!< LPSPI driver error. */
-    kStatus_LPSPI_Idle = MAKE_STATUS(kStatusGroup_LPSPI, 2),      /*!< LPSPI is idle.*/
-    kStatus_LPSPI_OutOfRange = MAKE_STATUS(kStatusGroup_LPSPI, 3) /*!< LPSPI transfer out Of range. */
+    kStatus_LPSPI_Busy       = MAKE_STATUS(kStatusGroup_LPSPI, 0), /*!< LPSPI transfer is busy.*/
+    kStatus_LPSPI_Error      = MAKE_STATUS(kStatusGroup_LPSPI, 1), /*!< LPSPI driver error. */
+    kStatus_LPSPI_Idle       = MAKE_STATUS(kStatusGroup_LPSPI, 2), /*!< LPSPI is idle.*/
+    kStatus_LPSPI_OutOfRange = MAKE_STATUS(kStatusGroup_LPSPI, 3)  /*!< LPSPI transfer out Of range. */
 };
 
 /*! @brief LPSPI status flags in SPIx_SR register.*/
 enum _lpspi_flags
 {
-    kLPSPI_TxDataRequestFlag = LPSPI_SR_TDF_MASK,    /*!< Transmit data flag */
-    kLPSPI_RxDataReadyFlag = LPSPI_SR_RDF_MASK,      /*!< Receive data flag */
-    kLPSPI_WordCompleteFlag = LPSPI_SR_WCF_MASK,     /*!< Word Complete flag */
-    kLPSPI_FrameCompleteFlag = LPSPI_SR_FCF_MASK,    /*!< Frame Complete flag */
+    kLPSPI_TxDataRequestFlag    = LPSPI_SR_TDF_MASK, /*!< Transmit data flag */
+    kLPSPI_RxDataReadyFlag      = LPSPI_SR_RDF_MASK, /*!< Receive data flag */
+    kLPSPI_WordCompleteFlag     = LPSPI_SR_WCF_MASK, /*!< Word Complete flag */
+    kLPSPI_FrameCompleteFlag    = LPSPI_SR_FCF_MASK, /*!< Frame Complete flag */
     kLPSPI_TransferCompleteFlag = LPSPI_SR_TCF_MASK, /*!< Transfer Complete flag */
-    kLPSPI_TransmitErrorFlag = LPSPI_SR_TEF_MASK,    /*!< Transmit Error flag (FIFO underrun) */
-    kLPSPI_ReceiveErrorFlag = LPSPI_SR_REF_MASK,     /*!< Receive Error flag (FIFO overrun) */
-    kLPSPI_DataMatchFlag = LPSPI_SR_DMF_MASK,        /*!< Data Match flag */
-    kLPSPI_ModuleBusyFlag = LPSPI_SR_MBF_MASK,       /*!< Module Busy flag */
-    kLPSPI_AllStatusFlag = (LPSPI_SR_TDF_MASK | LPSPI_SR_RDF_MASK | LPSPI_SR_WCF_MASK | LPSPI_SR_FCF_MASK |
+    kLPSPI_TransmitErrorFlag    = LPSPI_SR_TEF_MASK, /*!< Transmit Error flag (FIFO underrun) */
+    kLPSPI_ReceiveErrorFlag     = LPSPI_SR_REF_MASK, /*!< Receive Error flag (FIFO overrun) */
+    kLPSPI_DataMatchFlag        = LPSPI_SR_DMF_MASK, /*!< Data Match flag */
+    kLPSPI_ModuleBusyFlag       = LPSPI_SR_MBF_MASK, /*!< Module Busy flag */
+    kLPSPI_AllStatusFlag        = (LPSPI_SR_TDF_MASK | LPSPI_SR_RDF_MASK | LPSPI_SR_WCF_MASK | LPSPI_SR_FCF_MASK |
                             LPSPI_SR_TCF_MASK | LPSPI_SR_TEF_MASK | LPSPI_SR_REF_MASK | LPSPI_SR_DMF_MASK |
                             LPSPI_SR_MBF_MASK) /*!< Used for clearing all w1c status flags */
 };
@@ -88,14 +88,14 @@ enum _lpspi_flags
 /*! @brief LPSPI interrupt source.*/
 enum _lpspi_interrupt_enable
 {
-    kLPSPI_TxInterruptEnable = LPSPI_IER_TDIE_MASK,               /*!< Transmit data interrupt enable */
-    kLPSPI_RxInterruptEnable = LPSPI_IER_RDIE_MASK,               /*!< Receive data interrupt enable */
-    kLPSPI_WordCompleteInterruptEnable = LPSPI_IER_WCIE_MASK,     /*!< Word complete interrupt enable */
-    kLPSPI_FrameCompleteInterruptEnable = LPSPI_IER_FCIE_MASK,    /*!< Frame complete interrupt enable */
+    kLPSPI_TxInterruptEnable               = LPSPI_IER_TDIE_MASK, /*!< Transmit data interrupt enable */
+    kLPSPI_RxInterruptEnable               = LPSPI_IER_RDIE_MASK, /*!< Receive data interrupt enable */
+    kLPSPI_WordCompleteInterruptEnable     = LPSPI_IER_WCIE_MASK, /*!< Word complete interrupt enable */
+    kLPSPI_FrameCompleteInterruptEnable    = LPSPI_IER_FCIE_MASK, /*!< Frame complete interrupt enable */
     kLPSPI_TransferCompleteInterruptEnable = LPSPI_IER_TCIE_MASK, /*!< Transfer complete interrupt enable */
-    kLPSPI_TransmitErrorInterruptEnable = LPSPI_IER_TEIE_MASK,    /*!< Transmit error interrupt enable(FIFO underrun)*/
-    kLPSPI_ReceiveErrorInterruptEnable = LPSPI_IER_REIE_MASK,     /*!< Receive Error interrupt enable (FIFO overrun) */
-    kLPSPI_DataMatchInterruptEnable = LPSPI_IER_DMIE_MASK,        /*!< Data Match interrupt enable */
+    kLPSPI_TransmitErrorInterruptEnable    = LPSPI_IER_TEIE_MASK, /*!< Transmit error interrupt enable(FIFO underrun)*/
+    kLPSPI_ReceiveErrorInterruptEnable     = LPSPI_IER_REIE_MASK, /*!< Receive Error interrupt enable (FIFO overrun) */
+    kLPSPI_DataMatchInterruptEnable        = LPSPI_IER_DMIE_MASK, /*!< Data Match interrupt enable */
     kLPSPI_AllInterruptEnable =
         (LPSPI_IER_TDIE_MASK | LPSPI_IER_RDIE_MASK | LPSPI_IER_WCIE_MASK | LPSPI_IER_FCIE_MASK | LPSPI_IER_TCIE_MASK |
          LPSPI_IER_TEIE_MASK | LPSPI_IER_REIE_MASK | LPSPI_IER_DMIE_MASK) /*!< All above interrupts enable.*/
@@ -112,7 +112,7 @@ enum _lpspi_dma_enable
 typedef enum _lpspi_master_slave_mode
 {
     kLPSPI_Master = 1U, /*!< LPSPI peripheral operates in master mode.*/
-    kLPSPI_Slave = 0U   /*!< LPSPI peripheral operates in slave mode.*/
+    kLPSPI_Slave  = 0U  /*!< LPSPI peripheral operates in slave mode.*/
 } lpspi_master_slave_mode_t;
 
 /*! @brief LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure).*/
@@ -128,24 +128,24 @@ typedef enum _lpspi_which_pcs_config
 typedef enum _lpspi_pcs_polarity_config
 {
     kLPSPI_PcsActiveHigh = 1U, /*!< PCS Active High (idles low) */
-    kLPSPI_PcsActiveLow = 0U   /*!< PCS Active Low (idles high) */
+    kLPSPI_PcsActiveLow  = 0U  /*!< PCS Active Low (idles high) */
 } lpspi_pcs_polarity_config_t;
 
 /*! @brief LPSPI Peripheral Chip Select (PCS) Polarity.*/
 enum _lpspi_pcs_polarity
 {
-    kLPSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
-    kLPSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
-    kLPSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
-    kLPSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
-    kLPSPI_PcsAllActiveLow = 0xFU   /*!< Pcs0 to Pcs5 Active Low (idles high). */
+    kLPSPI_Pcs0ActiveLow   = 1U << 0, /*!< Pcs0 Active Low (idles high). */
+    kLPSPI_Pcs1ActiveLow   = 1U << 1, /*!< Pcs1 Active Low (idles high). */
+    kLPSPI_Pcs2ActiveLow   = 1U << 2, /*!< Pcs2 Active Low (idles high). */
+    kLPSPI_Pcs3ActiveLow   = 1U << 3, /*!< Pcs3 Active Low (idles high). */
+    kLPSPI_PcsAllActiveLow = 0xFU     /*!< Pcs0 to Pcs5 Active Low (idles high). */
 };
 
 /*! @brief LPSPI clock polarity configuration.*/
 typedef enum _lpspi_clock_polarity
 {
     kLPSPI_ClockPolarityActiveHigh = 0U, /*!< CPOL=0. Active-high LPSPI clock (idles low)*/
-    kLPSPI_ClockPolarityActiveLow = 1U   /*!< CPOL=1. Active-low LPSPI clock (idles high)*/
+    kLPSPI_ClockPolarityActiveLow  = 1U  /*!< CPOL=1. Active-low LPSPI clock (idles high)*/
 } lpspi_clock_polarity_t;
 
 /*! @brief LPSPI clock phase configuration.*/
@@ -167,20 +167,20 @@ typedef enum _lpspi_shift_direction
 /*! @brief LPSPI Host Request select configuration. */
 typedef enum _lpspi_host_request_select
 {
-    kLPSPI_HostReqExtPin = 0U,         /*!< Host Request is an ext pin. */
-    kLPSPI_HostReqInternalTrigger = 1U /*!< Host Request is an internal trigger. */
+    kLPSPI_HostReqExtPin          = 0U, /*!< Host Request is an ext pin. */
+    kLPSPI_HostReqInternalTrigger = 1U  /*!< Host Request is an internal trigger. */
 } lpspi_host_request_select_t;
 
 /*! @brief LPSPI Match configuration options. */
 typedef enum _lpspi_match_config
 {
-    kLPSI_MatchDisabled = 0x0U,                     /*!< LPSPI Match Disabled. */
-    kLPSI_1stWordEqualsM0orM1 = 0x2U,               /*!< LPSPI Match Enabled. */
-    kLPSI_AnyWordEqualsM0orM1 = 0x3U,               /*!< LPSPI Match Enabled. */
+    kLPSI_MatchDisabled                     = 0x0U, /*!< LPSPI Match Disabled. */
+    kLPSI_1stWordEqualsM0orM1               = 0x2U, /*!< LPSPI Match Enabled. */
+    kLPSI_AnyWordEqualsM0orM1               = 0x3U, /*!< LPSPI Match Enabled. */
     kLPSI_1stWordEqualsM0and2ndWordEqualsM1 = 0x4U, /*!< LPSPI Match Enabled. */
     kLPSI_AnyWordEqualsM0andNxtWordEqualsM1 = 0x5U, /*!< LPSPI Match Enabled. */
-    kLPSI_1stWordAndM1EqualsM0andM1 = 0x6U,         /*!< LPSPI Match Enabled. */
-    kLPSI_AnyWordAndM1EqualsM0andM1 = 0x7U,         /*!< LPSPI Match Enabled. */
+    kLPSI_1stWordAndM1EqualsM0andM1         = 0x6U, /*!< LPSPI Match Enabled. */
+    kLPSI_AnyWordAndM1EqualsM0andM1         = 0x7U, /*!< LPSPI Match Enabled. */
 } lpspi_match_config_t;
 
 /*! @brief LPSPI pin (SDO and SDI) configuration. */
@@ -203,8 +203,8 @@ typedef enum _lpspi_data_out_config
 typedef enum _lpspi_transfer_width
 {
     kLPSPI_SingleBitXfer = 0U, /*!< 1-bit shift at a time, data out on SDO, in on SDI (normal mode) */
-    kLPSPI_TwoBitXfer = 1U,    /*!< 2-bits shift out on SDO/SDI and in on SDO/SDI */
-    kLPSPI_FourBitXfer = 2U    /*!< 4-bits shift out on SDO/SDI/PCS[3:2] and in on SDO/SDI/PCS[3:2] */
+    kLPSPI_TwoBitXfer    = 1U, /*!< 2-bits shift out on SDO/SDI and in on SDO/SDI */
+    kLPSPI_FourBitXfer   = 2U  /*!< 4-bits shift out on SDO/SDI/PCS[3:2] and in on SDO/SDI/PCS[3:2] */
 } lpspi_transfer_width_t;
 
 /*! @brief LPSPI delay type selection.*/
@@ -215,8 +215,8 @@ typedef enum _lpspi_delay_type
     kLPSPI_BetweenTransfer /*!< Delay between transfers. */
 } lpspi_delay_type_t;
 
-#define LPSPI_MASTER_PCS_SHIFT (4U)   /*!< LPSPI master PCS shift macro , internal used. */
-#define LPSPI_MASTER_PCS_MASK (0xF0U) /*!< LPSPI master PCS shift macro , internal used. */
+#define LPSPI_MASTER_PCS_SHIFT (4U)    /*!< LPSPI master PCS shift macro , internal used. */
+#define LPSPI_MASTER_PCS_MASK  (0xF0U) /*!< LPSPI master PCS shift macro , internal used. */
 
 /*! @brief Use this enumeration for LPSPI master transfer configFlags. */
 enum _lpspi_transfer_config_flag_for_master
@@ -230,21 +230,21 @@ enum _lpspi_transfer_config_flag_for_master
 
     kLPSPI_MasterByteSwap =
         1U << 22 /*!< Is master swap the byte.
-                     * For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
-                     * lpspi_shift_direction_t to MSB).
-                     * 1. If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used
-                     * or not, the waveform is 1 2 3 4 5 6 7 8.
-                     * 2. If you set bitPerFrame = 16 :
-                     * (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag.
-                     * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
-                     * 3. If you set bitPerFrame = 32 :
-                     * (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag.
-                     * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
-                     */
+                  * For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
+                  * lpspi_shift_direction_t to MSB).
+                  * 1. If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used
+                  * or not, the waveform is 1 2 3 4 5 6 7 8.
+                  * 2. If you set bitPerFrame = 16 :
+                  * (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag.
+                  * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
+                  * 3. If you set bitPerFrame = 32 :
+                  * (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag.
+                  * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
+                  */
 };
 
-#define LPSPI_SLAVE_PCS_SHIFT (4U)   /*!< LPSPI slave PCS shift macro , internal used. */
-#define LPSPI_SLAVE_PCS_MASK (0xF0U) /*!< LPSPI slave PCS shift macro , internal used. */
+#define LPSPI_SLAVE_PCS_SHIFT (4U)    /*!< LPSPI slave PCS shift macro , internal used. */
+#define LPSPI_SLAVE_PCS_MASK  (0xF0U) /*!< LPSPI slave PCS shift macro , internal used. */
 
 /*! @brief Use this enumeration for LPSPI slave transfer configFlags. */
 enum _lpspi_transfer_config_flag_for_slave
@@ -256,17 +256,17 @@ enum _lpspi_transfer_config_flag_for_slave
 
     kLPSPI_SlaveByteSwap =
         1U << 22 /*!< Is slave swap the byte.
-                      * For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
-                      * lpspi_shift_direction_t to MSB).
-                      * 1. If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used
-                      * or not, the waveform is 1 2 3 4 5 6 7 8.
-                      * 2. If you set bitPerFrame = 16 :
-                      * (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag.
-                      * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
-                      * 3. If you set bitPerFrame = 32 :
-                      * (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag.
-                      * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
-                      */
+                  * For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
+                  * lpspi_shift_direction_t to MSB).
+                  * 1. If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used
+                  * or not, the waveform is 1 2 3 4 5 6 7 8.
+                  * 2. If you set bitPerFrame = 16 :
+                  * (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag.
+                  * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
+                  * 3. If you set bitPerFrame = 32 :
+                  * (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag.
+                  * (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
+                  */
 };
 
 /*! @brief LPSPI transfer state, which is used for LPSPI transactional API state machine. */
@@ -290,9 +290,8 @@ typedef struct _lpspi_master_config
                                             It sets the boundary value if out of range.*/
     uint32_t lastSckToPcsDelayInNanoSec; /*!< Last SCK to PCS delay time in nanoseconds, setting to 0 sets the minimum
                                             delay. It sets the boundary value if out of range.*/
-    uint32_t
-        betweenTransferDelayInNanoSec; /*!< After the SCK delay time with nanoseconds, setting to 0 sets the minimum
-                                        delay. It sets the boundary value if out of range.*/
+    uint32_t betweenTransferDelayInNanoSec; /*!< After the SCK delay time with nanoseconds, setting to 0 sets the
+                                             minimum delay. It sets the boundary value if out of range.*/
 
     lpspi_which_pcs_t whichPcs;                     /*!< Desired Peripheral Chip Select (PCS). */
     lpspi_pcs_polarity_config_t pcsActiveHighOrLow; /*!< Desired PCS active high or low */
@@ -323,13 +322,13 @@ typedef struct _lpspi_slave_config
 } lpspi_slave_config_t;
 
 /*!
-* @brief Forward declaration of the _lpspi_master_handle typedefs.
-*/
+ * @brief Forward declaration of the _lpspi_master_handle typedefs.
+ */
 typedef struct _lpspi_master_handle lpspi_master_handle_t;
 
 /*!
-* @brief Forward declaration of the _lpspi_slave_handle typedefs.
-*/
+ * @brief Forward declaration of the _lpspi_slave_handle typedefs.
+ */
 typedef struct _lpspi_slave_handle lpspi_slave_handle_t;
 
 /*!
@@ -365,10 +364,9 @@ typedef struct _lpspi_transfer
     uint8_t *rxData;          /*!< Receive buffer. */
     volatile size_t dataSize; /*!< Transfer bytes. */
 
-    uint32_t
-        configFlags; /*!< Transfer transfer configuration flags. Set from _lpspi_transfer_config_flag_for_master if the
-                        transfer is used for master or _lpspi_transfer_config_flag_for_slave enumeration if the transfer
-                        is used for slave.*/
+    uint32_t configFlags; /*!< Transfer transfer configuration flags. Set from _lpspi_transfer_config_flag_for_master if
+                             the transfer is used for master or _lpspi_transfer_config_flag_for_slave enumeration if the
+                             transfer is used for slave.*/
 } lpspi_transfer_t;
 
 /*! @brief LPSPI master transfer handle structure used for transactional API. */
@@ -439,707 +437,706 @@ struct _lpspi_slave_handle
  * API
  *********************************************************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /*_cplusplus*/
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Initializes the LPSPI master.
- *
- * @param base LPSPI peripheral address.
- * @param masterConfig Pointer to structure lpspi_master_config_t.
- * @param srcClock_Hz Module source input clock in Hertz
- */
-void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz);
+    /*!
+     * @brief Initializes the LPSPI master.
+     *
+     * @param base LPSPI peripheral address.
+     * @param masterConfig Pointer to structure lpspi_master_config_t.
+     * @param srcClock_Hz Module source input clock in Hertz
+     */
+    void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz);
 
-/*!
- * @brief Sets the lpspi_master_config_t structure to default values.
- *
- * This API initializes the configuration structure  for LPSPI_MasterInit().
- * The initialized structure can remain unchanged in LPSPI_MasterInit(), or can be modified
- * before calling the LPSPI_MasterInit().
- * Example:
- * @code
- *  lpspi_master_config_t  masterConfig;
- *  LPSPI_MasterGetDefaultConfig(&masterConfig);
- * @endcode
- * @param masterConfig pointer to lpspi_master_config_t structure
- */
-void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig);
+    /*!
+     * @brief Sets the lpspi_master_config_t structure to default values.
+     *
+     * This API initializes the configuration structure  for LPSPI_MasterInit().
+     * The initialized structure can remain unchanged in LPSPI_MasterInit(), or can be modified
+     * before calling the LPSPI_MasterInit().
+     * Example:
+     * @code
+     *  lpspi_master_config_t  masterConfig;
+     *  LPSPI_MasterGetDefaultConfig(&masterConfig);
+     * @endcode
+     * @param masterConfig pointer to lpspi_master_config_t structure
+     */
+    void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig);
 
-/*!
- * @brief LPSPI slave configuration.
- *
- * @param base LPSPI peripheral address.
- * @param slaveConfig Pointer to a structure lpspi_slave_config_t.
- */
-void LPSPI_SlaveInit(LPSPI_Type *base, const lpspi_slave_config_t *slaveConfig);
+    /*!
+     * @brief LPSPI slave configuration.
+     *
+     * @param base LPSPI peripheral address.
+     * @param slaveConfig Pointer to a structure lpspi_slave_config_t.
+     */
+    void LPSPI_SlaveInit(LPSPI_Type *base, const lpspi_slave_config_t *slaveConfig);
 
-/*!
- * @brief Sets the lpspi_slave_config_t structure to default values.
- *
- * This API initializes the configuration structure for LPSPI_SlaveInit().
- * The initialized structure can remain unchanged in LPSPI_SlaveInit() or can be modified
- * before calling the LPSPI_SlaveInit().
- * Example:
- * @code
- *  lpspi_slave_config_t  slaveConfig;
- *  LPSPI_SlaveGetDefaultConfig(&slaveConfig);
- * @endcode
- * @param slaveConfig pointer to lpspi_slave_config_t structure.
- */
-void LPSPI_SlaveGetDefaultConfig(lpspi_slave_config_t *slaveConfig);
+    /*!
+     * @brief Sets the lpspi_slave_config_t structure to default values.
+     *
+     * This API initializes the configuration structure for LPSPI_SlaveInit().
+     * The initialized structure can remain unchanged in LPSPI_SlaveInit() or can be modified
+     * before calling the LPSPI_SlaveInit().
+     * Example:
+     * @code
+     *  lpspi_slave_config_t  slaveConfig;
+     *  LPSPI_SlaveGetDefaultConfig(&slaveConfig);
+     * @endcode
+     * @param slaveConfig pointer to lpspi_slave_config_t structure.
+     */
+    void LPSPI_SlaveGetDefaultConfig(lpspi_slave_config_t *slaveConfig);
 
-/*!
- * @brief De-initializes the LPSPI peripheral. Call this API to disable the LPSPI clock.
- * @param base LPSPI peripheral address.
- */
-void LPSPI_Deinit(LPSPI_Type *base);
+    /*!
+     * @brief De-initializes the LPSPI peripheral. Call this API to disable the LPSPI clock.
+     * @param base LPSPI peripheral address.
+     */
+    void LPSPI_Deinit(LPSPI_Type *base);
 
-/*!
- * @brief Restores the LPSPI peripheral to reset state. Note that this function
- * sets all registers to reset state. As a result, the LPSPI module can't work after calling
- * this API.
- * @param base LPSPI peripheral address.
-*/
-void LPSPI_Reset(LPSPI_Type *base);
+    /*!
+     * @brief Restores the LPSPI peripheral to reset state. Note that this function
+     * sets all registers to reset state. As a result, the LPSPI module can't work after calling
+     * this API.
+     * @param base LPSPI peripheral address.
+     */
+    void LPSPI_Reset(LPSPI_Type *base);
 
-/*!
- * @brief Enables the LPSPI peripheral and sets the MCR MDIS to 0.
- *
- * @param base LPSPI peripheral address.
- * @param enable Pass true to enable module, false to disable module.
- */
-static inline void LPSPI_Enable(LPSPI_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables the LPSPI peripheral and sets the MCR MDIS to 0.
+     *
+     * @param base LPSPI peripheral address.
+     * @param enable Pass true to enable module, false to disable module.
+     */
+    static inline void LPSPI_Enable(LPSPI_Type *base, bool enable)
     {
-        base->CR |= LPSPI_CR_MEN_MASK;
+        if (enable) {
+            base->CR |= LPSPI_CR_MEN_MASK;
+        }
+        else {
+            base->CR &= ~LPSPI_CR_MEN_MASK;
+        }
     }
-    else
+
+    /*!
+     *@}
+     */
+
+    /*!
+     * @name Status
+     * @{
+     */
+
+    /*!
+     * @brief Gets the LPSPI status flag state.
+     * @param base LPSPI peripheral address.
+     * @return The LPSPI status(in SR register).
+     */
+    static inline uint32_t LPSPI_GetStatusFlags(LPSPI_Type *base)
     {
-        base->CR &= ~LPSPI_CR_MEN_MASK;
+        return (base->SR);
     }
-}
 
-/*!
- *@}
-*/
+    /*!
+     * @brief Gets the LPSPI Tx FIFO size.
+     * @param base LPSPI peripheral address.
+     * @return The LPSPI Tx FIFO size.
+     */
+    static inline uint32_t LPSPI_GetTxFifoSize(LPSPI_Type *base)
+    {
+        return (1U << ((base->PARAM & LPSPI_PARAM_TXFIFO_MASK) >> LPSPI_PARAM_TXFIFO_SHIFT));
+    }
 
-/*!
- * @name Status
- * @{
- */
+    /*!
+     * @brief Gets the LPSPI Rx FIFO size.
+     * @param base LPSPI peripheral address.
+     * @return The LPSPI Rx FIFO size.
+     */
+    static inline uint32_t LPSPI_GetRxFifoSize(LPSPI_Type *base)
+    {
+        return (1U << ((base->PARAM & LPSPI_PARAM_RXFIFO_MASK) >> LPSPI_PARAM_RXFIFO_SHIFT));
+    }
 
-/*!
- * @brief Gets the LPSPI status flag state.
- * @param base LPSPI peripheral address.
- * @return The LPSPI status(in SR register).
- */
-static inline uint32_t LPSPI_GetStatusFlags(LPSPI_Type *base)
-{
-    return (base->SR);
-}
+    /*!
+     * @brief Gets the LPSPI Tx FIFO count.
+     * @param base LPSPI peripheral address.
+     * @return The number of words in the transmit FIFO.
+     */
+    static inline uint32_t LPSPI_GetTxFifoCount(LPSPI_Type *base)
+    {
+        return ((base->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT);
+    }
 
-/*!
- * @brief Gets the LPSPI Tx FIFO size.
- * @param base LPSPI peripheral address.
- * @return The LPSPI Tx FIFO size.
- */
-static inline uint32_t LPSPI_GetTxFifoSize(LPSPI_Type *base)
-{
-    return (1U << ((base->PARAM & LPSPI_PARAM_TXFIFO_MASK) >> LPSPI_PARAM_TXFIFO_SHIFT));
-}
+    /*!
+     * @brief Gets the LPSPI Rx FIFO count.
+     * @param base LPSPI peripheral address.
+     * @return The number of words in the receive FIFO.
+     */
+    static inline uint32_t LPSPI_GetRxFifoCount(LPSPI_Type *base)
+    {
+        return ((base->FSR & LPSPI_FSR_RXCOUNT_MASK) >> LPSPI_FSR_RXCOUNT_SHIFT);
+    }
 
-/*!
- * @brief Gets the LPSPI Rx FIFO size.
- * @param base LPSPI peripheral address.
- * @return The LPSPI Rx FIFO size.
- */
-static inline uint32_t LPSPI_GetRxFifoSize(LPSPI_Type *base)
-{
-    return (1U << ((base->PARAM & LPSPI_PARAM_RXFIFO_MASK) >> LPSPI_PARAM_RXFIFO_SHIFT));
-}
+    /*!
+     * @brief Clears the LPSPI status flag.
+     *
+     * This function  clears the desired status bit by using a write-1-to-clear. The user passes in the base and the
+     * desired status flag bit to clear.  The list of status flags is defined in the _lpspi_flags.
+     * Example usage:
+     * @code
+     *  LPSPI_ClearStatusFlags(base, kLPSPI_TxDataRequestFlag|kLPSPI_RxDataReadyFlag);
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param statusFlags The status flag used from type _lpspi_flags.
+     */
+    static inline void LPSPI_ClearStatusFlags(LPSPI_Type *base, uint32_t statusFlags)
+    {
+        base->SR = statusFlags; /*!< The status flags are cleared by writing 1 (w1c).*/
+    }
 
-/*!
- * @brief Gets the LPSPI Tx FIFO count.
- * @param base LPSPI peripheral address.
- * @return The number of words in the transmit FIFO.
- */
-static inline uint32_t LPSPI_GetTxFifoCount(LPSPI_Type *base)
-{
-    return ((base->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT);
-}
+    /*!
+     *@}
+     */
 
-/*!
- * @brief Gets the LPSPI Rx FIFO count.
- * @param base LPSPI peripheral address.
- * @return The number of words in the receive FIFO.
- */
-static inline uint32_t LPSPI_GetRxFifoCount(LPSPI_Type *base)
-{
-    return ((base->FSR & LPSPI_FSR_RXCOUNT_MASK) >> LPSPI_FSR_RXCOUNT_SHIFT);
-}
+    /*!
+     * @name Interrupts
+     * @{
+     */
 
-/*!
- * @brief Clears the LPSPI status flag.
- *
- * This function  clears the desired status bit by using a write-1-to-clear. The user passes in the base and the
- * desired status flag bit to clear.  The list of status flags is defined in the _lpspi_flags.
- * Example usage:
- * @code
- *  LPSPI_ClearStatusFlags(base, kLPSPI_TxDataRequestFlag|kLPSPI_RxDataReadyFlag);
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param statusFlags The status flag used from type _lpspi_flags.
- */
-static inline void LPSPI_ClearStatusFlags(LPSPI_Type *base, uint32_t statusFlags)
-{
-    base->SR = statusFlags; /*!< The status flags are cleared by writing 1 (w1c).*/
-}
+    /*!
+     * @brief Enables the LPSPI interrupts.
+     *
+     * This function configures the various interrupt masks of the LPSPI.  The parameters are base and an interrupt
+     * mask. Note that, for Tx fill and Rx FIFO drain requests, enabling the interrupt request disables the DMA request.
+     *
+     * @code
+     *  LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param mask The interrupt mask; Use the enum _lpspi_interrupt_enable.
+     */
+    static inline void LPSPI_EnableInterrupts(LPSPI_Type *base, uint32_t mask)
+    {
+        base->IER |= mask;
+    }
 
-/*!
- *@}
-*/
+    /*!
+     * @brief Disables the LPSPI interrupts.
+     *
+     * @code
+     *  LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param mask The interrupt mask; Use the enum _lpspi_interrupt_enable.
+     */
+    static inline void LPSPI_DisableInterrupts(LPSPI_Type *base, uint32_t mask)
+    {
+        base->IER &= ~mask;
+    }
 
-/*!
- * @name Interrupts
- * @{
- */
+    /*!
+     *@}
+     */
 
-/*!
- * @brief Enables the LPSPI interrupts.
- *
- * This function configures the various interrupt masks of the LPSPI.  The parameters are base and an interrupt mask.
- * Note that, for Tx fill and Rx FIFO drain requests, enabling the interrupt request disables the DMA request.
- *
- * @code
- *  LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param mask The interrupt mask; Use the enum _lpspi_interrupt_enable.
- */
-static inline void LPSPI_EnableInterrupts(LPSPI_Type *base, uint32_t mask)
-{
-    base->IER |= mask;
-}
+    /*!
+     * @name DMA Control
+     * @{
+     */
 
-/*!
- * @brief Disables the LPSPI interrupts.
- *
- * @code
- *  LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param mask The interrupt mask; Use the enum _lpspi_interrupt_enable.
- */
-static inline void LPSPI_DisableInterrupts(LPSPI_Type *base, uint32_t mask)
-{
-    base->IER &= ~mask;
-}
+    /*!
+     * @brief Enables the LPSPI DMA request.
+     *
+     * This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.
+     * @code
+     *  LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param mask The interrupt mask; Use the enum _lpspi_dma_enable.
+     */
+    static inline void LPSPI_EnableDMA(LPSPI_Type *base, uint32_t mask)
+    {
+        base->DER |= mask;
+    }
 
-/*!
- *@}
-*/
+    /*!
+     * @brief Disables the LPSPI DMA request.
+     *
+     * This function configures the Rx and Tx DMA mask of the LPSPI.  The parameters are base and a DMA mask.
+     * @code
+     *  SPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param mask The interrupt mask; Use the enum _lpspi_dma_enable.
+     */
+    static inline void LPSPI_DisableDMA(LPSPI_Type *base, uint32_t mask)
+    {
+        base->DER &= ~mask;
+    }
 
-/*!
- * @name DMA Control
- * @{
- */
+    /*!
+     * @brief Gets the LPSPI Transmit Data Register address for a DMA operation.
+     *
+     * This function gets the LPSPI Transmit Data Register address because this value is needed
+     * for the DMA operation.
+     * This function can be used for either master or slave mode.
+     *
+     * @param base LPSPI peripheral address.
+     * @return The LPSPI Transmit Data Register address.
+     */
+    static inline uint32_t LPSPI_GetTxRegisterAddress(LPSPI_Type *base)
+    {
+        return (uint32_t) & (base->TDR);
+    }
 
-/*!
- * @brief Enables the LPSPI DMA request.
- *
- * This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.
- * @code
- *  LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param mask The interrupt mask; Use the enum _lpspi_dma_enable.
- */
-static inline void LPSPI_EnableDMA(LPSPI_Type *base, uint32_t mask)
-{
-    base->DER |= mask;
-}
+    /*!
+     * @brief Gets the LPSPI Receive Data Register address for a DMA operation.
+     *
+     * This function gets the LPSPI Receive Data Register address because this value is needed
+     * for the DMA operation.
+     * This function can be used for either master or slave mode.
+     *
+     * @param base LPSPI peripheral address.
+     * @return The LPSPI Receive Data Register address.
+     */
+    static inline uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)
+    {
+        return (uint32_t) & (base->RDR);
+    }
 
-/*!
- * @brief Disables the LPSPI DMA request.
- *
- * This function configures the Rx and Tx DMA mask of the LPSPI.  The parameters are base and a DMA mask.
- * @code
- *  SPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param mask The interrupt mask; Use the enum _lpspi_dma_enable.
- */
-static inline void LPSPI_DisableDMA(LPSPI_Type *base, uint32_t mask)
-{
-    base->DER &= ~mask;
-}
+    /*!
+     *@}
+     */
 
-/*!
- * @brief Gets the LPSPI Transmit Data Register address for a DMA operation.
- *
- * This function gets the LPSPI Transmit Data Register address because this value is needed
- * for the DMA operation.
- * This function can be used for either master or slave mode.
- *
- * @param base LPSPI peripheral address.
- * @return The LPSPI Transmit Data Register address.
- */
-static inline uint32_t LPSPI_GetTxRegisterAddress(LPSPI_Type *base)
-{
-    return (uint32_t) & (base->TDR);
-}
+    /*!
+     * @name Bus Operations
+     * @{
+     */
 
-/*!
- * @brief Gets the LPSPI Receive Data Register address for a DMA operation.
- *
- * This function gets the LPSPI Receive Data Register address because this value is needed
- * for the DMA operation.
- * This function can be used for either master or slave mode.
- *
- * @param base LPSPI peripheral address.
- * @return The LPSPI Receive Data Register address.
- */
-static inline uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)
-{
-    return (uint32_t) & (base->RDR);
-}
+    /*!
+     * @brief Get instance number for LPSPI module.
+     *
+     * @param base LPSPI peripheral base address.
+     * @return Return the value of LPSPI instance.
+     */
+    uint32_t LPSPI_GetInstance(LPSPI_Type *base);
 
-/*!
- *@}
-*/
+    /*!
+     * @brief Check the argument for transfer .
+     *
+     * @param transfer the transfer struct to be used.
+     * @param bitPerFrame The bit size of one frame.
+     * @param bytePerFrame The byte size of one frame.
+     * @return Return true for right and false for wrong.
+     */
+    bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
 
-/*!
- * @name Bus Operations
- * @{
- */
+    /*!
+     * @brief Configures the LPSPI for either master or slave.
+     *
+     * Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).
+     *
+     * @param base LPSPI peripheral address.
+     * @param mode Mode setting (master or slave) of type lpspi_master_slave_mode_t.
+     */
+    static inline void LPSPI_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)
+    {
+        base->CFGR1 = (base->CFGR1 & (~LPSPI_CFGR1_MASTER_MASK)) | LPSPI_CFGR1_MASTER(mode);
+    }
 
-/*!
-* @brief Get instance number for LPSPI module.
-*
-* @param base LPSPI peripheral base address.
-* @return Return the value of LPSPI instance.
-*/
-uint32_t LPSPI_GetInstance(LPSPI_Type *base);
+    /*!
+     * @brief Returns whether the LPSPI module is in master mode.
+     *
+     * @param base LPSPI peripheral address.
+     * @return Returns true if the module is in master mode or false if the module is in slave mode.
+     */
+    static inline bool LPSPI_IsMaster(LPSPI_Type *base)
+    {
+        return (bool)((base->CFGR1) & LPSPI_CFGR1_MASTER_MASK);
+    }
 
-/*!
-* @brief Check the argument for transfer .
-*
-* @param transfer the transfer struct to be used.
-* @param bitPerFrame The bit size of one frame.
-* @param bytePerFrame The byte size of one frame.
-* @return Return true for right and false for wrong.
-*/
-bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
+    /*!
+     * @brief Flushes the LPSPI FIFOs.
+     *
+     * @param base LPSPI peripheral address.
+     * @param flushTxFifo Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO.
+     * @param flushRxFifo Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO.
+     */
+    static inline void LPSPI_FlushFifo(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)
+    {
+        base->CR |= ((uint32_t)flushTxFifo << LPSPI_CR_RTF_SHIFT) | ((uint32_t)flushRxFifo << LPSPI_CR_RRF_SHIFT);
+    }
 
-/*!
- * @brief Configures the LPSPI for either master or slave.
- *
- * Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).
- *
- * @param base LPSPI peripheral address.
- * @param mode Mode setting (master or slave) of type lpspi_master_slave_mode_t.
- */
-static inline void LPSPI_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)
-{
-    base->CFGR1 = (base->CFGR1 & (~LPSPI_CFGR1_MASTER_MASK)) | LPSPI_CFGR1_MASTER(mode);
-}
+    /*!
+     * @brief Sets the transmit and receive FIFO watermark values.
+     *
+     * This function allows the user to set the receive and transmit FIFO watermarks. The function
+     * does not compare the watermark settings to the FIFO size. The FIFO watermark should not be
+     * equal to or greater than the FIFO size.  It is up to the higher level driver to make this check.
+     *
+     * @param base LPSPI peripheral address.
+     * @param txWater The TX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
+     * @param rxWater The RX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
+     */
+    static inline void LPSPI_SetFifoWatermarks(LPSPI_Type *base, uint32_t txWater, uint32_t rxWater)
+    {
+        base->FCR = LPSPI_FCR_TXWATER(txWater) | LPSPI_FCR_RXWATER(rxWater);
+    }
 
-/*!
- * @brief Returns whether the LPSPI module is in master mode.
- *
- * @param base LPSPI peripheral address.
- * @return Returns true if the module is in master mode or false if the module is in slave mode.
- */
-static inline bool LPSPI_IsMaster(LPSPI_Type *base)
-{
-    return (bool)((base->CFGR1) & LPSPI_CFGR1_MASTER_MASK);
-}
+    /*!
+     * @brief Configures all LPSPI peripheral chip select polarities simultaneously.
+     *
+     * Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).
+     *
+     * This is an example:  PCS0 and PCS1 set to active low and other PCSs set to active high. Note that the number of
+     * PCS is device-specific.
+     * @code
+     *  LPSPI_SetAllPcsPolarity(base, kLPSPI_Pcs0ActiveLow | kLPSPI_Pcs1ActiveLow);
+     * @endcode
+     *
+     * @param base LPSPI peripheral address.
+     * @param mask The PCS polarity mask; Use the enum _lpspi_pcs_polarity.
+     */
+    static inline void LPSPI_SetAllPcsPolarity(LPSPI_Type *base, uint32_t mask)
+    {
+        base->CFGR1 = (base->CFGR1 & ~LPSPI_CFGR1_PCSPOL_MASK) | LPSPI_CFGR1_PCSPOL(~mask);
+    }
 
-/*!
- * @brief Flushes the LPSPI FIFOs.
- *
- * @param base LPSPI peripheral address.
- * @param flushTxFifo Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO.
- * @param flushRxFifo Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO.
- */
-static inline void LPSPI_FlushFifo(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)
-{
-    base->CR |= ((uint32_t)flushTxFifo << LPSPI_CR_RTF_SHIFT) | ((uint32_t)flushRxFifo << LPSPI_CR_RRF_SHIFT);
-}
+    /*!
+     * @brief Configures the frame size.
+     *
+     * The minimum frame size is 8-bits and the maximum frame size is 4096-bits. If the frame size is less than or equal
+     * to 32-bits, the word size and frame size are identical. If the frame size is greater than 32-bits, the word
+     * size is 32-bits for each word except the last (the last word contains the remainder bits if the frame size is not
+     * divisible by 32). The minimum word size is 2-bits. A frame size of 33-bits (or similar) is not supported.
+     *
+     * Note 1: The transmit command register should be initialized before enabling the LPSPI in slave mode, although
+     * the command register does not update until after the LPSPI is enabled. After it is enabled, the transmit command
+     * register
+     * should only be changed if the LPSPI is idle.
+     *
+     * Note 2: The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That
+     * means the TCR register should be written to when the Tx FIFO is not full.
+     *
+     * @param base LPSPI peripheral address.
+     * @param frameSize The frame size in number of bits.
+     */
+    static inline void LPSPI_SetFrameSize(LPSPI_Type *base, uint32_t frameSize)
+    {
+        base->TCR = (base->TCR & ~LPSPI_TCR_FRAMESZ_MASK) | LPSPI_TCR_FRAMESZ(frameSize - 1);
+    }
 
-/*!
- * @brief Sets the transmit and receive FIFO watermark values.
- *
- * This function allows the user to set the receive and transmit FIFO watermarks. The function
- * does not compare the watermark settings to the FIFO size. The FIFO watermark should not be
- * equal to or greater than the FIFO size.  It is up to the higher level driver to make this check.
- *
- * @param base LPSPI peripheral address.
- * @param txWater The TX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
- * @param rxWater The RX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
- */
-static inline void LPSPI_SetFifoWatermarks(LPSPI_Type *base, uint32_t txWater, uint32_t rxWater)
-{
-    base->FCR = LPSPI_FCR_TXWATER(txWater) | LPSPI_FCR_RXWATER(rxWater);
-}
+    /*!
+     * @brief Sets the LPSPI baud rate in bits per second.
+     *
+     * This function takes in the desired bitsPerSec (baud rate) and calculates the nearest
+     * possible baud rate without exceeding the desired baud rate and returns the
+     * calculated baud rate in bits-per-second. It requires the caller to provide
+     * the frequency of the module source clock (in Hertz). Note that the baud rate
+     * does not go into effect until the Transmit Control Register (TCR) is programmed
+     * with the prescale value. Hence, this function returns the prescale tcrPrescaleValue
+     * parameter for later programming in the TCR.  The higher level
+     * peripheral driver should alert the user of an out of range baud rate input.
+     *
+     * Note that the LPSPI module must first be disabled before configuring this.
+     * Note that the LPSPI module must be configured for master mode before configuring this.
+     *
+     * @param base LPSPI peripheral address.
+     * @param baudRate_Bps The desired baud rate in bits per second.
+     * @param srcClock_Hz Module source input clock in Hertz.
+     * @param tcrPrescaleValue The TCR prescale value needed to program the TCR.
+     * @return  The actual calculated baud rate. This function may also return a "0" if the
+     *          LPSPI is not configured for master mode or if the LPSPI module is not disabled.
+     */
 
-/*!
- * @brief Configures all LPSPI peripheral chip select polarities simultaneously.
- *
- * Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).
- *
- * This is an example:  PCS0 and PCS1 set to active low and other PCSs set to active high. Note that the number of
- * PCS is device-specific.
- * @code
- *  LPSPI_SetAllPcsPolarity(base, kLPSPI_Pcs0ActiveLow | kLPSPI_Pcs1ActiveLow);
- * @endcode
- *
- * @param base LPSPI peripheral address.
- * @param mask The PCS polarity mask; Use the enum _lpspi_pcs_polarity.
- */
-static inline void LPSPI_SetAllPcsPolarity(LPSPI_Type *base, uint32_t mask)
-{
-    base->CFGR1 = (base->CFGR1 & ~LPSPI_CFGR1_PCSPOL_MASK) | LPSPI_CFGR1_PCSPOL(~mask);
-}
+    uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base,
+                                     uint32_t baudRate_Bps,
+                                     uint32_t srcClock_Hz,
+                                     uint32_t *tcrPrescaleValue);
 
-/*!
- * @brief Configures the frame size.
- *
- * The minimum frame size is 8-bits and the maximum frame size is 4096-bits. If the frame size is less than or equal
- * to 32-bits, the word size and frame size are identical. If the frame size is greater than 32-bits, the word
- * size is 32-bits for each word except the last (the last word contains the remainder bits if the frame size is not
- * divisible by 32). The minimum word size is 2-bits. A frame size of 33-bits (or similar) is not supported.
- *
- * Note 1: The transmit command register should be initialized before enabling the LPSPI in slave mode, although
- * the command register does not update until after the LPSPI is enabled. After it is enabled, the transmit command
- * register
- * should only be changed if the LPSPI is idle.
- *
- * Note 2: The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That
- * means the TCR register should be written to when the Tx FIFO is not full.
- *
- * @param base LPSPI peripheral address.
- * @param frameSize The frame size in number of bits.
- */
-static inline void LPSPI_SetFrameSize(LPSPI_Type *base, uint32_t frameSize)
-{
-    base->TCR = (base->TCR & ~LPSPI_TCR_FRAMESZ_MASK) | LPSPI_TCR_FRAMESZ(frameSize - 1);
-}
+    /*!
+     * @brief Manually configures a specific LPSPI delay parameter (module must be disabled to
+     *        change the delay values).
+     *
+     * This function configures the following:
+     * SCK to PCS delay, or
+     * PCS to SCK delay, or
+     * The configurations must occur between the transfer delay.
+     *
+     * The delay names are available in type lpspi_delay_type_t.
+     *
+     * The user passes the desired delay along with the delay value.
+     * This allows the user to directly set the delay values if they have
+     * pre-calculated them or if they simply wish to manually increment the value.
+     *
+     * Note that the LPSPI module must first be disabled before configuring this.
+     * Note that the LPSPI module must be configured for master mode before configuring this.
+     *
+     * @param base LPSPI peripheral address.
+     * @param scaler The 8-bit delay value 0x00 to 0xFF (255).
+     * @param whichDelay The desired delay to configure, must be of type lpspi_delay_type_t.
+     */
+    void LPSPI_MasterSetDelayScaler(LPSPI_Type *base, uint32_t scaler, lpspi_delay_type_t whichDelay);
 
-/*!
- * @brief Sets the LPSPI baud rate in bits per second.
- *
- * This function takes in the desired bitsPerSec (baud rate) and calculates the nearest
- * possible baud rate without exceeding the desired baud rate and returns the
- * calculated baud rate in bits-per-second. It requires the caller to provide
- * the frequency of the module source clock (in Hertz). Note that the baud rate
- * does not go into effect until the Transmit Control Register (TCR) is programmed
- * with the prescale value. Hence, this function returns the prescale tcrPrescaleValue
- * parameter for later programming in the TCR.  The higher level
- * peripheral driver should alert the user of an out of range baud rate input.
- *
- * Note that the LPSPI module must first be disabled before configuring this.
- * Note that the LPSPI module must be configured for master mode before configuring this.
- *
- * @param base LPSPI peripheral address.
- * @param baudRate_Bps The desired baud rate in bits per second.
- * @param srcClock_Hz Module source input clock in Hertz.
- * @param tcrPrescaleValue The TCR prescale value needed to program the TCR.
- * @return  The actual calculated baud rate. This function may also return a "0" if the
- *          LPSPI is not configured for master mode or if the LPSPI module is not disabled.
- */
+    /*!
+     * @brief Calculates the delay based on the desired delay input in nanoseconds (module must be
+     *        disabled to change the delay values).
+     *
+     * This function calculates the values for the following:
+     * SCK to PCS delay, or
+     * PCS to SCK delay, or
+     * The configurations must occur between the transfer delay.
+     *
+     * The delay names are available in type lpspi_delay_type_t.
+     *
+     * The user passes the desired delay and the desired delay value in
+     * nano-seconds.  The function calculates the value needed for the desired delay parameter
+     * and returns the actual calculated delay because an exact delay match may not be possible. In this
+     * case, the closest match is calculated without going below the desired delay value input.
+     * It is possible to input a very large delay value that exceeds the capability of the part, in
+     * which case the maximum supported delay is returned. It is up to the higher level
+     * peripheral driver to alert the user of an out of range delay input.
+     *
+     * Note that the LPSPI module must be configured for master mode before configuring this. And note that
+     * the delayTime = LPSPI_clockSource / (PRESCALE * Delay_scaler).
+     *
+     * @param base LPSPI peripheral address.
+     * @param delayTimeInNanoSec The desired delay value in nano-seconds.
+     * @param whichDelay The desired delay to configuration, which must be of type lpspi_delay_type_t.
+     * @param srcClock_Hz  Module source input clock in Hertz.
+     * @return actual Calculated delay value in nano-seconds.
+     */
+    uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
+                                       uint32_t delayTimeInNanoSec,
+                                       lpspi_delay_type_t whichDelay,
+                                       uint32_t srcClock_Hz);
 
-uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base,
-                                 uint32_t baudRate_Bps,
-                                 uint32_t srcClock_Hz,
-                                 uint32_t *tcrPrescaleValue);
+    /*!
+     * @brief Writes data into the transmit data buffer.
+     *
+     * This function writes data passed in by the user to the Transmit Data Register (TDR).
+     * The user can pass up to 32-bits of data to load into the TDR. If the frame size exceeds 32-bits,
+     * the user has to manage sending the data one 32-bit word at a time.
+     * Any writes to the TDR result in an immediate push to the transmit FIFO.
+     * This function can be used for either master or slave modes.
+     *
+     * @param base LPSPI peripheral address.
+     * @param data The data word to be sent.
+     */
+    static inline void LPSPI_WriteData(LPSPI_Type *base, uint32_t data)
+    {
+        base->TDR = data;
+    }
 
-/*!
- * @brief Manually configures a specific LPSPI delay parameter (module must be disabled to
- *        change the delay values).
- *
- * This function configures the following:
- * SCK to PCS delay, or
- * PCS to SCK delay, or
- * The configurations must occur between the transfer delay.
- *
- * The delay names are available in type lpspi_delay_type_t.
- *
- * The user passes the desired delay along with the delay value.
- * This allows the user to directly set the delay values if they have
- * pre-calculated them or if they simply wish to manually increment the value.
- *
- * Note that the LPSPI module must first be disabled before configuring this.
- * Note that the LPSPI module must be configured for master mode before configuring this.
- *
- * @param base LPSPI peripheral address.
- * @param scaler The 8-bit delay value 0x00 to 0xFF (255).
- * @param whichDelay The desired delay to configure, must be of type lpspi_delay_type_t.
- */
-void LPSPI_MasterSetDelayScaler(LPSPI_Type *base, uint32_t scaler, lpspi_delay_type_t whichDelay);
+    /*!
+     * @brief Reads data from the data buffer.
+     *
+     * This function reads the data from the Receive Data Register (RDR).
+     * This function can be used for either master or slave mode.
+     *
+     * @param base LPSPI peripheral address.
+     * @return The data read from the data buffer.
+     */
+    static inline uint32_t LPSPI_ReadData(LPSPI_Type *base)
+    {
+        return (base->RDR);
+    }
 
-/*!
- * @brief Calculates the delay based on the desired delay input in nanoseconds (module must be
- *        disabled to change the delay values).
- *
- * This function calculates the values for the following:
- * SCK to PCS delay, or
- * PCS to SCK delay, or
- * The configurations must occur between the transfer delay.
- *
- * The delay names are available in type lpspi_delay_type_t.
- *
- * The user passes the desired delay and the desired delay value in
- * nano-seconds.  The function calculates the value needed for the desired delay parameter
- * and returns the actual calculated delay because an exact delay match may not be possible. In this
- * case, the closest match is calculated without going below the desired delay value input.
- * It is possible to input a very large delay value that exceeds the capability of the part, in
- * which case the maximum supported delay is returned. It is up to the higher level
- * peripheral driver to alert the user of an out of range delay input.
- *
- * Note that the LPSPI module must be configured for master mode before configuring this. And note that
- * the delayTime = LPSPI_clockSource / (PRESCALE * Delay_scaler).
- *
- * @param base LPSPI peripheral address.
- * @param delayTimeInNanoSec The desired delay value in nano-seconds.
- * @param whichDelay The desired delay to configuration, which must be of type lpspi_delay_type_t.
- * @param srcClock_Hz  Module source input clock in Hertz.
- * @return actual Calculated delay value in nano-seconds.
- */
-uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base,
-                                   uint32_t delayTimeInNanoSec,
-                                   lpspi_delay_type_t whichDelay,
-                                   uint32_t srcClock_Hz);
+    /*!
+     * @brief Set up the dummy data.
+     *
+     * @param base LPSPI peripheral address.
+     * @param dummyData Data to be transferred when tx buffer is NULL.
+     * Note:
+     *      This API has no effect when LPSPI in slave interrupt mode, because driver
+     *      will set the TXMSK bit to 1 if txData is NULL, no data is loaded from transmit
+     *      FIFO and output pin is tristated.
+     */
+    void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData);
 
-/*!
- * @brief Writes data into the transmit data buffer.
- *
- * This function writes data passed in by the user to the Transmit Data Register (TDR).
- * The user can pass up to 32-bits of data to load into the TDR. If the frame size exceeds 32-bits,
- * the user has to manage sending the data one 32-bit word at a time.
- * Any writes to the TDR result in an immediate push to the transmit FIFO.
- * This function can be used for either master or slave modes.
- *
- * @param base LPSPI peripheral address.
- * @param data The data word to be sent.
- */
-static inline void LPSPI_WriteData(LPSPI_Type *base, uint32_t data)
-{
-    base->TDR = data;
-}
+    /*!
+     *@}
+     */
 
-/*!
- * @brief Reads data from the data buffer.
- *
- * This function reads the data from the Receive Data Register (RDR).
- * This function can be used for either master or slave mode.
- *
- * @param base LPSPI peripheral address.
- * @return The data read from the data buffer.
- */
-static inline uint32_t LPSPI_ReadData(LPSPI_Type *base)
-{
-    return (base->RDR);
-}
+    /*!
+     * @name Transactional
+     * @{
+     */
+    /*Transactional APIs*/
 
-/*!
- * @brief Set up the dummy data.
- *
- * @param base LPSPI peripheral address.
- * @param dummyData Data to be transferred when tx buffer is NULL.
- * Note:
- *      This API has no effect when LPSPI in slave interrupt mode, because driver
- *      will set the TXMSK bit to 1 if txData is NULL, no data is loaded from transmit
- *      FIFO and output pin is tristated.
- */
-void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData);
+    /*!
+     * @brief Initializes the LPSPI master handle.
+     *
+     * This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs.  Usually, for a
+     * specified LPSPI instance, call this API once to get the initialized handle.
 
-/*!
- *@}
-*/
+     * @param base LPSPI peripheral address.
+     * @param handle LPSPI handle pointer to lpspi_master_handle_t.
+     * @param callback DSPI callback.
+     * @param userData callback function parameter.
+     */
+    void LPSPI_MasterTransferCreateHandle(LPSPI_Type *base,
+                                          lpspi_master_handle_t *handle,
+                                          lpspi_master_transfer_callback_t callback,
+                                          void *userData);
 
-/*!
- * @name Transactional
- * @{
- */
-/*Transactional APIs*/
+    /*!
+     * @brief LPSPI master transfer data using a polling method.
+     *
+     * This function transfers data using a  polling method. This is a blocking function, which does not return until
+     * all transfers have been completed.
+     *
+     * Note:
+     * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
+     * For bytesPerFrame greater than 4:
+     * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4.
+     * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
+     *
+     * @param base LPSPI peripheral address.
+     * @param transfer pointer to lpspi_transfer_t structure.
+     * @return status of status_t.
+     */
+    status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transfer);
 
-/*!
- * @brief Initializes the LPSPI master handle.
- *
- * This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs.  Usually, for a
- * specified LPSPI instance, call this API once to get the initialized handle.
+    /*!
+     * @brief LPSPI master transfer data using an interrupt method.
+     *
+     * This function transfers data using an interrupt method. This is a non-blocking function, which returns right
+     * away. When all data is transferred, the callback function is called.
+     *
+     * Note:
+     * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
+     * For bytesPerFrame greater than 4:
+     * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4.
+     * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
+     * @param transfer pointer to lpspi_transfer_t structure.
+     * @return status of status_t.
+     */
+    status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base,
+                                             lpspi_master_handle_t *handle,
+                                             lpspi_transfer_t *transfer);
 
- * @param base LPSPI peripheral address.
- * @param handle LPSPI handle pointer to lpspi_master_handle_t.
- * @param callback DSPI callback.
- * @param userData callback function parameter.
- */
-void LPSPI_MasterTransferCreateHandle(LPSPI_Type *base,
-                                      lpspi_master_handle_t *handle,
-                                      lpspi_master_transfer_callback_t callback,
-                                      void *userData);
+    /*!
+     * @brief Gets the master transfer remaining bytes.
+     *
+     * This function gets the master transfer remaining bytes.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
+     * @param count Number of bytes transferred so far by the non-blocking transaction.
+     * @return status of status_t.
+     */
+    status_t LPSPI_MasterTransferGetCount(LPSPI_Type *base, lpspi_master_handle_t *handle, size_t *count);
 
-/*!
- * @brief LPSPI master transfer data using a polling method.
- *
- * This function transfers data using a  polling method. This is a blocking function, which does not return until all
- * transfers have been
- * completed.
- *
- * Note:
- * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
- * For bytesPerFrame greater than 4:
- * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4.
- * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
- *
- * @param base LPSPI peripheral address.
- * @param transfer pointer to lpspi_transfer_t structure.
- * @return status of status_t.
- */
-status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transfer);
+    /*!
+     * @brief LPSPI master abort transfer which uses an interrupt method.
+     *
+     * This function aborts a transfer which uses an interrupt method.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_MasterTransferAbort(LPSPI_Type *base, lpspi_master_handle_t *handle);
 
-/*!
- * @brief LPSPI master transfer data using an interrupt method.
- *
- * This function transfers data using an interrupt method. This is a non-blocking function, which returns right away.
- * When all data
- * is transferred, the callback function is called.
- *
- * Note:
- * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
- * For bytesPerFrame greater than 4:
- * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4.
- * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
- * @param transfer pointer to lpspi_transfer_t structure.
- * @return status of status_t.
- */
-status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t *handle, lpspi_transfer_t *transfer);
+    /*!
+     * @brief LPSPI Master IRQ handler function.
+     *
+     * This function processes the LPSPI transmit and receive IRQ.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *handle);
 
-/*!
- * @brief Gets the master transfer remaining bytes.
- *
- * This function gets the master transfer remaining bytes.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
- * @param count Number of bytes transferred so far by the non-blocking transaction.
- * @return status of status_t.
- */
-status_t LPSPI_MasterTransferGetCount(LPSPI_Type *base, lpspi_master_handle_t *handle, size_t *count);
+    /*!
+     * @brief Initializes the LPSPI slave handle.
+     *
+     * This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs.  Usually, for a
+     * specified LPSPI instance, call this API once to get the initialized handle.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle LPSPI handle pointer to lpspi_slave_handle_t.
+     * @param callback DSPI callback.
+     * @param userData callback function parameter.
+     */
+    void LPSPI_SlaveTransferCreateHandle(LPSPI_Type *base,
+                                         lpspi_slave_handle_t *handle,
+                                         lpspi_slave_transfer_callback_t callback,
+                                         void *userData);
 
-/*!
- * @brief LPSPI master abort transfer which uses an interrupt method.
- *
- * This function aborts a transfer which uses an interrupt method.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
- */
-void LPSPI_MasterTransferAbort(LPSPI_Type *base, lpspi_master_handle_t *handle);
+    /*!
+     * @brief LPSPI slave transfer data using an interrupt method.
+     *
+     * This function transfer data using an interrupt method. This is a non-blocking function, which returns right away.
+     * When all data
+     * is transferred, the callback function is called.
+     *
+     * Note:
+     * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
+     * For bytesPerFrame greater than 4:
+     * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
+     * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
+     * @param transfer pointer to lpspi_transfer_t structure.
+     * @return status of status_t.
+     */
+    status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_transfer_t *transfer);
 
-/*!
- * @brief LPSPI Master IRQ handler function.
- *
- * This function processes the LPSPI transmit and receive IRQ.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_master_handle_t structure which stores the transfer state.
- */
-void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *handle);
+    /*!
+     * @brief Gets the slave transfer remaining bytes.
+     *
+     * This function gets the slave transfer remaining bytes.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
+     * @param count Number of bytes transferred so far by the non-blocking transaction.
+     * @return status of status_t.
+     */
+    status_t LPSPI_SlaveTransferGetCount(LPSPI_Type *base, lpspi_slave_handle_t *handle, size_t *count);
 
-/*!
- * @brief Initializes the LPSPI slave handle.
- *
- * This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs.  Usually, for a
- * specified LPSPI instance, call this API once to get the initialized handle.
- *
- * @param base LPSPI peripheral address.
- * @param handle LPSPI handle pointer to lpspi_slave_handle_t.
- * @param callback DSPI callback.
- * @param userData callback function parameter.
- */
-void LPSPI_SlaveTransferCreateHandle(LPSPI_Type *base,
-                                     lpspi_slave_handle_t *handle,
-                                     lpspi_slave_transfer_callback_t callback,
-                                     void *userData);
+    /*!
+     * @brief LPSPI slave aborts a transfer which uses an interrupt method.
+     *
+     * This function aborts a transfer which uses an interrupt method.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_SlaveTransferAbort(LPSPI_Type *base, lpspi_slave_handle_t *handle);
 
-/*!
- * @brief LPSPI slave transfer data using an interrupt method.
- *
- * This function transfer data using an interrupt method. This is a non-blocking function, which returns right away.
- * When all data
- * is transferred, the callback function is called.
- *
- * Note:
- * The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4.
- * For bytesPerFrame greater than 4:
- * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
- * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
- * @param transfer pointer to lpspi_transfer_t structure.
- * @return status of status_t.
- */
-status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_transfer_t *transfer);
+    /*!
+     * @brief LPSPI Slave IRQ handler function.
+     *
+     * This function processes the LPSPI transmit and receives an IRQ.
+     *
+     * @param base LPSPI peripheral address.
+     * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle);
 
-/*!
- * @brief Gets the slave transfer remaining bytes.
- *
- * This function gets the slave transfer remaining bytes.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
- * @param count Number of bytes transferred so far by the non-blocking transaction.
- * @return status of status_t.
- */
-status_t LPSPI_SlaveTransferGetCount(LPSPI_Type *base, lpspi_slave_handle_t *handle, size_t *count);
-
-/*!
- * @brief LPSPI slave aborts a transfer which uses an interrupt method.
- *
- * This function aborts a transfer which uses an interrupt method.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
- */
-void LPSPI_SlaveTransferAbort(LPSPI_Type *base, lpspi_slave_handle_t *handle);
-
-/*!
- * @brief LPSPI Slave IRQ handler function.
- *
- * This function processes the LPSPI transmit and receives an IRQ.
- *
- * @param base LPSPI peripheral address.
- * @param handle pointer to lpspi_slave_handle_t structure which stores the transfer state.
- */
-void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle);
-
-/*!
- *@}
-*/
+    /*!
+     *@}
+     */
 
 #if defined(__cplusplus)
 }
 #endif /*_cplusplus*/
        /*!
         *@}
-       */
+        */
 
 #endif /*_FSL_LPSPI_H_*/
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.c
index cbc7af7e7..51203735c 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.c
@@ -35,8 +35,8 @@
 #include "fsl_lpspi_edma.h"
 
 /***********************************************************************************************************************
-* Definitions
-***********************************************************************************************************************/
+ * Definitions
+ ***********************************************************************************************************************/
 
 /* Component ID definition, used by tools. */
 #ifndef FSL_COMPONENT_ID
@@ -44,8 +44,8 @@
 #endif
 
 /*!
-* @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
-*/
+ * @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
+ */
 typedef struct _lpspi_master_edma_private_handle
 {
     LPSPI_Type *base;                   /*!< LPSPI peripheral base address. */
@@ -53,8 +53,8 @@ typedef struct _lpspi_master_edma_private_handle
 } lpspi_master_edma_private_handle_t;
 
 /*!
-* @brief Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
-*/
+ * @brief Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
+ */
 typedef struct _lpspi_slave_edma_private_handle
 {
     LPSPI_Type *base;                  /*!< LPSPI peripheral base address. */
@@ -62,21 +62,21 @@ typedef struct _lpspi_slave_edma_private_handle
 } lpspi_slave_edma_private_handle_t;
 
 /***********************************************************************************************************************
-* Prototypes
-***********************************************************************************************************************/
+ * Prototypes
+ ***********************************************************************************************************************/
 /*!
-* @brief EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA.
-* This is not a public API.
-*/
+ * @brief EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA.
+ * This is not a public API.
+ */
 static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
                                      void *g_lpspiEdmaPrivateHandle,
                                      bool transferDone,
                                      uint32_t tcds);
 
 /*!
-* @brief EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA.
-* This is not a public API.
-*/
+ * @brief EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA.
+ * This is not a public API.
+ */
 static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
                                     void *g_lpspiEdmaPrivateHandle,
                                     bool transferDone,
@@ -85,68 +85,63 @@ static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
 static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
 
 /***********************************************************************************************************************
-* Variables
-***********************************************************************************************************************/
+ * Variables
+ ***********************************************************************************************************************/
 
 /*! @brief Pointers to lpspi edma handles for each instance. */
 static lpspi_master_edma_private_handle_t s_lpspiMasterEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
 static lpspi_slave_edma_private_handle_t s_lpspiSlaveEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
 
 /***********************************************************************************************************************
-* Code
-***********************************************************************************************************************/
+ * Code
+ ***********************************************************************************************************************/
 static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap)
 {
     assert(rxData);
 
-    switch (bytesEachRead)
-    {
-        case 1:
-            if (!isByteSwap)
-            {
-                *rxData = readData;
-                ++rxData;
-            }
-            else
-            {
-                *rxData = readData >> 24;
-                ++rxData;
-            }
-            break;
-
-        case 2:
-            if (!isByteSwap)
-            {
-                *rxData = readData;
-                ++rxData;
-                *rxData = readData >> 8;
-                ++rxData;
-            }
-            else
-            {
-                *rxData = readData >> 16;
-                ++rxData;
-                *rxData = readData >> 24;
-                ++rxData;
-            }
-            break;
-
-        case 4:
+    switch (bytesEachRead) {
+    case 1:
+        if (!isByteSwap) {
+            *rxData = readData;
+            ++rxData;
+        }
+        else {
+            *rxData = readData >> 24;
+            ++rxData;
+        }
+        break;
 
+    case 2:
+        if (!isByteSwap) {
             *rxData = readData;
             ++rxData;
             *rxData = readData >> 8;
             ++rxData;
+        }
+        else {
             *rxData = readData >> 16;
             ++rxData;
             *rxData = readData >> 24;
             ++rxData;
+        }
+        break;
 
-            break;
+    case 4:
 
-        default:
-            assert(false);
-            break;
+        *rxData = readData;
+        ++rxData;
+        *rxData = readData >> 8;
+        ++rxData;
+        *rxData = readData >> 16;
+        ++rxData;
+        *rxData = readData >> 24;
+        ++rxData;
+
+        break;
+
+    default:
+        assert(false);
+        break;
     }
 }
 
@@ -166,7 +161,7 @@ void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base,
 
     uint32_t instance = LPSPI_GetInstance(base);
 
-    s_lpspiMasterEdmaPrivateHandle[instance].base = base;
+    s_lpspiMasterEdmaPrivateHandle[instance].base   = base;
     s_lpspiMasterEdmaPrivateHandle[instance].handle = handle;
 
     handle->callback = callback;
@@ -181,32 +176,29 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     assert(handle);
     assert(transfer);
 
-    uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
+    uint32_t bitsPerFrame  = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
     uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
-    uint32_t temp = 0U;
+    uint32_t temp          = 0U;
 
-    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
-    {
+    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame)) {
         return kStatus_InvalidArgument;
     }
 
     /*And since the dma transfer can not support 3 bytes .*/
-    if ((bytesPerFrame % 4U) == 3)
-    {
+    if ((bytesPerFrame % 4U) == 3) {
         return kStatus_InvalidArgument;
     }
 
     /* Check that we're not busy.*/
-    if (handle->state == kLPSPI_Busy)
-    {
+    if (handle->state == kLPSPI_Busy) {
         return kStatus_LPSPI_Busy;
     }
 
     handle->state = kLPSPI_Busy;
 
     uint32_t instance = LPSPI_GetInstance(base);
-    uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
-    uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
+    uint32_t rxAddr   = LPSPI_GetRxRegisterAddress(base);
+    uint32_t txAddr   = LPSPI_GetTxRegisterAddress(base);
 
     uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
 
@@ -226,17 +218,17 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     edma_transfer_config_t transferConfigRx;
     edma_transfer_config_t transferConfigTx;
 
-    edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
+    edma_tcd_t *softwareTCD_extraBytes    = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
     edma_tcd_t *softwareTCD_pcsContinuous = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[2]) & (~0x1FU));
 
-    handle->txData = transfer->txData;
-    handle->rxData = transfer->rxData;
+    handle->txData               = transfer->txData;
+    handle->rxData               = transfer->rxData;
     handle->txRemainingByteCount = transfer->dataSize;
     handle->rxRemainingByteCount = transfer->dataSize;
-    handle->totalByteCount = transfer->dataSize;
+    handle->totalByteCount       = transfer->dataSize;
 
     handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
-    handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
+    handle->readRegRemainingTimes  = handle->writeRegRemainingTimes;
 
     handle->txBuffIfNull =
         ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
@@ -245,7 +237,7 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     handle->fifoSize = LPSPI_GetRxFifoSize(base);
 
     handle->isPcsContinuous = (bool)(transfer->configFlags & kLPSPI_MasterPcsContinuous);
-    handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
+    handle->isByteSwap      = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
 
     LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
 
@@ -255,15 +247,12 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
     temp = base->CFGR1;
     temp &= LPSPI_CFGR1_PINCFG_MASK;
-    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
-    {
-        if (!handle->txData)
-        {
+    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut))) {
+        if (!handle->txData) {
             base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
         }
         /* The 3-wire mode can't send and receive data at the same time. */
-        if ((handle->txData) && (handle->rxData))
-        {
+        if ((handle->txData) && (handle->rxData)) {
             return kStatus_InvalidArgument;
         }
     }
@@ -280,27 +269,24 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
                 LPSPI_TCR_CONT(handle->isPcsContinuous) | LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) |
                 LPSPI_TCR_PCS(whichPcs);
 
-    isThereExtraTxBytes = false;
+    isThereExtraTxBytes         = false;
     handle->isThereExtraRxBytes = false;
 
     /*Calculate the bytes for write/read the TX/RX register each time*/
-    if (bytesPerFrame <= 4)
-    {
+    if (bytesPerFrame <= 4) {
         handle->bytesEachWrite = bytesPerFrame;
-        handle->bytesEachRead = bytesPerFrame;
+        handle->bytesEachRead  = bytesPerFrame;
 
         handle->bytesLastRead = bytesPerFrame;
     }
-    else
-    {
+    else {
         handle->bytesEachWrite = 4;
-        handle->bytesEachRead = 4;
+        handle->bytesEachRead  = 4;
 
         handle->bytesLastRead = 4;
 
-        if ((transfer->dataSize % 4) != 0)
-        {
-            bytesLastWrite = transfer->dataSize % 4;
+        if ((transfer->dataSize % 4) != 0) {
+            bytesLastWrite        = transfer->dataSize % 4;
             handle->bytesLastRead = bytesLastWrite;
 
             isThereExtraTxBytes = true;
@@ -314,58 +300,53 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
 
     LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
 
-    EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiMasterCallback,
-                     &s_lpspiMasterEdmaPrivateHandle[instance]);
+    EDMA_SetCallback(
+        handle->edmaRxRegToRxDataHandle, EDMA_LpspiMasterCallback, &s_lpspiMasterEdmaPrivateHandle[instance]);
 
     /*Rx*/
     EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
 
-    if (handle->rxData)
-    {
-        transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
+    if (handle->rxData) {
+        transferConfigRx.destAddr   = (uint32_t) & (handle->rxData[0]);
         transferConfigRx.destOffset = 1;
     }
-    else
-    {
-        transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
+    else {
+        transferConfigRx.destAddr   = (uint32_t) & (handle->rxBuffIfNull);
         transferConfigRx.destOffset = 0;
     }
     transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
 
     dif = 0;
-    switch (handle->bytesEachRead)
-    {
-        case (1U):
-            transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigRx.minorLoopBytes = 1;
-            if (handle->isByteSwap)
-            {
-                dif = 3;
-            }
-            break;
+    switch (handle->bytesEachRead) {
+    case (1U):
+        transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigRx.minorLoopBytes  = 1;
+        if (handle->isByteSwap) {
+            dif = 3;
+        }
+        break;
 
-        case (2U):
-            transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
-            transferConfigRx.minorLoopBytes = 2;
-            if (handle->isByteSwap)
-            {
-                dif = 2;
-            }
-            break;
+    case (2U):
+        transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
+        transferConfigRx.minorLoopBytes  = 2;
+        if (handle->isByteSwap) {
+            dif = 2;
+        }
+        break;
 
-        case (4U):
-            transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
-            transferConfigRx.minorLoopBytes = 4;
-            break;
+    case (4U):
+        transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
+        transferConfigRx.minorLoopBytes  = 4;
+        break;
 
-        default:
-            transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigRx.minorLoopBytes = 1;
-            assert(false);
-            break;
+    default:
+        transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigRx.minorLoopBytes  = 1;
+        assert(false);
+        break;
     }
 
-    transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
+    transferConfigRx.srcAddr   = (uint32_t)rxAddr + dif;
     transferConfigRx.srcOffset = 0;
 
     transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
@@ -373,24 +354,21 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     /* Store the initially configured eDMA minor byte transfer count into the LPSPI handle */
     handle->nbytes = transferConfigRx.minorLoopBytes;
 
-    EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
-                           &transferConfigRx, NULL);
-    EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
-                                 kEDMA_MajorInterruptEnable);
+    EDMA_SetTransferConfig(
+        handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, &transferConfigRx, NULL);
+    EDMA_EnableChannelInterrupts(
+        handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, kEDMA_MajorInterruptEnable);
 
     /*Tx*/
     EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
 
-    if (isThereExtraTxBytes)
-    {
-        if (handle->txData)
-        {
-            transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
+    if (isThereExtraTxBytes) {
+        if (handle->txData) {
+            transferConfigTx.srcAddr   = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
             transferConfigTx.srcOffset = 1;
         }
-        else
-        {
-            transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
+        else {
+            transferConfigTx.srcAddr   = (uint32_t)(&handle->txBuffIfNull);
             transferConfigTx.srcOffset = 0;
         }
 
@@ -399,75 +377,67 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
         transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
 
         dif = 0;
-        switch (bytesLastWrite)
-        {
-            case (1U):
-                transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigTx.minorLoopBytes = 1;
-                if (handle->isByteSwap)
-                {
-                    dif = 3;
-                }
-                break;
+        switch (bytesLastWrite) {
+        case (1U):
+            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigTx.minorLoopBytes   = 1;
+            if (handle->isByteSwap) {
+                dif = 3;
+            }
+            break;
 
-            case (2U):
-                transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
-                transferConfigTx.minorLoopBytes = 2;
-                if (handle->isByteSwap)
-                {
-                    dif = 2;
-                }
-                break;
+        case (2U):
+            transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
+            transferConfigTx.minorLoopBytes   = 2;
+            if (handle->isByteSwap) {
+                dif = 2;
+            }
+            break;
 
-            default:
-                transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigTx.minorLoopBytes = 1;
-                assert(false);
-                break;
+        default:
+            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigTx.minorLoopBytes   = 1;
+            assert(false);
+            break;
         }
 
-        transferConfigTx.destAddr = (uint32_t)txAddr + dif;
+        transferConfigTx.destAddr        = (uint32_t)txAddr + dif;
         transferConfigTx.majorLoopCounts = 1;
 
         EDMA_TcdReset(softwareTCD_extraBytes);
 
-        if (handle->isPcsContinuous)
-        {
+        if (handle->isPcsContinuous) {
             EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, softwareTCD_pcsContinuous);
         }
-        else
-        {
+        else {
             EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
         }
     }
 
-    if (handle->isPcsContinuous)
-    {
+    if (handle->isPcsContinuous) {
         handle->transmitCommand = base->TCR & ~(LPSPI_TCR_CONTC_MASK | LPSPI_TCR_CONT_MASK);
 
-        transferConfigTx.srcAddr = (uint32_t) & (handle->transmitCommand);
+        transferConfigTx.srcAddr   = (uint32_t) & (handle->transmitCommand);
         transferConfigTx.srcOffset = 0;
 
-        transferConfigTx.destAddr = (uint32_t) & (base->TCR);
+        transferConfigTx.destAddr   = (uint32_t) & (base->TCR);
         transferConfigTx.destOffset = 0;
 
-        transferConfigTx.srcTransferSize = kEDMA_TransferSize4Bytes;
+        transferConfigTx.srcTransferSize  = kEDMA_TransferSize4Bytes;
         transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
-        transferConfigTx.minorLoopBytes = 4;
-        transferConfigTx.majorLoopCounts = 1;
+        transferConfigTx.minorLoopBytes   = 4;
+        transferConfigTx.majorLoopCounts  = 1;
 
         EDMA_TcdReset(softwareTCD_pcsContinuous);
         EDMA_TcdSetTransferConfig(softwareTCD_pcsContinuous, &transferConfigTx, NULL);
     }
 
-    if (handle->txData)
-    {
-        transferConfigTx.srcAddr = (uint32_t)(handle->txData);
+    if (handle->txData) {
+        transferConfigTx.srcAddr   = (uint32_t)(handle->txData);
         transferConfigTx.srcOffset = 1;
     }
-    else
-    {
-        transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
+    else {
+        transferConfigTx.srcAddr   = (uint32_t)(&handle->txBuffIfNull);
         transferConfigTx.srcOffset = 0;
     }
 
@@ -476,57 +446,55 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
     transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
 
     dif = 0;
-    switch (handle->bytesEachRead)
-    {
-        case (1U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigTx.minorLoopBytes = 1;
-            if (handle->isByteSwap)
-            {
-                dif = 3;
-            }
-            break;
+    switch (handle->bytesEachRead) {
+    case (1U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigTx.minorLoopBytes   = 1;
+        if (handle->isByteSwap) {
+            dif = 3;
+        }
+        break;
 
-        case (2U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
-            transferConfigTx.minorLoopBytes = 2;
+    case (2U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
+        transferConfigTx.minorLoopBytes   = 2;
 
-            if (handle->isByteSwap)
-            {
-                dif = 2;
-            }
-            break;
+        if (handle->isByteSwap) {
+            dif = 2;
+        }
+        break;
 
-        case (4U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
-            transferConfigTx.minorLoopBytes = 4;
-            break;
+    case (4U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
+        transferConfigTx.minorLoopBytes   = 4;
+        break;
 
-        default:
-            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigTx.minorLoopBytes = 1;
-            assert(false);
-            break;
+    default:
+        transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigTx.minorLoopBytes   = 1;
+        assert(false);
+        break;
     }
 
     transferConfigTx.destAddr = (uint32_t)txAddr + dif;
 
     transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
 
-    if (isThereExtraTxBytes)
-    {
-        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
-                               &transferConfigTx, softwareTCD_extraBytes);
+    if (isThereExtraTxBytes) {
+        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base,
+                               handle->edmaTxDataToTxRegHandle->channel,
+                               &transferConfigTx,
+                               softwareTCD_extraBytes);
     }
-    else if (handle->isPcsContinuous)
-    {
-        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
-                               &transferConfigTx, softwareTCD_pcsContinuous);
+    else if (handle->isPcsContinuous) {
+        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base,
+                               handle->edmaTxDataToTxRegHandle->channel,
+                               &transferConfigTx,
+                               softwareTCD_pcsContinuous);
     }
-    else
-    {
-        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
-                               &transferConfigTx, NULL);
+    else {
+        EDMA_SetTransferConfig(
+            handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel, &transferConfigTx, NULL);
     }
 
     EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
@@ -554,28 +522,27 @@ static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
 
     LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
 
-    if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
-    {
-        while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
-        {
-        }
+    if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes) {
+        while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0) {}
         readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
 
-        if (lpspiEdmaPrivateHandle->handle->rxData)
-        {
+        if (lpspiEdmaPrivateHandle->handle->rxData) {
             LPSPI_SeparateEdmaReadData(
                 &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
                                                          lpspiEdmaPrivateHandle->handle->bytesLastRead]),
-                readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
+                readData,
+                lpspiEdmaPrivateHandle->handle->bytesLastRead,
+                lpspiEdmaPrivateHandle->handle->isByteSwap);
         }
     }
 
     lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
 
-    if (lpspiEdmaPrivateHandle->handle->callback)
-    {
-        lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
-                                                 kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
+    if (lpspiEdmaPrivateHandle->handle->callback) {
+        lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base,
+                                                 lpspiEdmaPrivateHandle->handle,
+                                                 kStatus_Success,
+                                                 lpspiEdmaPrivateHandle->handle->userData);
     }
 }
 
@@ -595,14 +562,12 @@ status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_ha
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (handle->state != kLPSPI_Busy)
-    {
+    if (handle->state != kLPSPI_Busy) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
@@ -634,7 +599,7 @@ void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base,
 
     uint32_t instance = LPSPI_GetInstance(base);
 
-    s_lpspiSlaveEdmaPrivateHandle[instance].base = base;
+    s_lpspiSlaveEdmaPrivateHandle[instance].base   = base;
     s_lpspiSlaveEdmaPrivateHandle[instance].handle = handle;
 
     handle->callback = callback;
@@ -649,26 +614,23 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
     assert(handle);
     assert(transfer);
 
-    uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
+    uint32_t bitsPerFrame  = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
     uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
-    uint32_t temp = 0U;
+    uint32_t temp          = 0U;
 
     uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
 
-    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
-    {
+    if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame)) {
         return kStatus_InvalidArgument;
     }
 
     /*And since the dma transfer can not support 3 bytes .*/
-    if ((bytesPerFrame % 4U) == 3)
-    {
+    if ((bytesPerFrame % 4U) == 3) {
         return kStatus_InvalidArgument;
     }
 
     /* Check that we're not busy.*/
-    if (handle->state == kLPSPI_Busy)
-    {
+    if (handle->state == kLPSPI_Busy) {
         return kStatus_LPSPI_Busy;
     }
 
@@ -697,14 +659,14 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
 
     bool isThereExtraTxBytes = false;
 
-    handle->txData = transfer->txData;
-    handle->rxData = transfer->rxData;
+    handle->txData               = transfer->txData;
+    handle->rxData               = transfer->rxData;
     handle->txRemainingByteCount = transfer->dataSize;
     handle->rxRemainingByteCount = transfer->dataSize;
-    handle->totalByteCount = transfer->dataSize;
+    handle->totalByteCount       = transfer->dataSize;
 
     handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
-    handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
+    handle->readRegRemainingTimes  = handle->writeRegRemainingTimes;
 
     handle->txBuffIfNull =
         ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
@@ -722,15 +684,12 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
     /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
     temp = base->CFGR1;
     temp &= LPSPI_CFGR1_PINCFG_MASK;
-    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
-    {
-        if (!handle->txData)
-        {
+    if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut))) {
+        if (!handle->txData) {
             base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
         }
         /* The 3-wire mode can't send and receive data at the same time. */
-        if ((handle->txData) && (handle->rxData))
-        {
+        if ((handle->txData) && (handle->rxData)) {
             return kStatus_InvalidArgument;
         }
     }
@@ -746,27 +705,24 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
     base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK)) |
                 LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) | LPSPI_TCR_PCS(whichPcs);
 
-    isThereExtraTxBytes = false;
+    isThereExtraTxBytes         = false;
     handle->isThereExtraRxBytes = false;
 
     /*Calculate the bytes for write/read the TX/RX register each time*/
-    if (bytesPerFrame <= 4)
-    {
+    if (bytesPerFrame <= 4) {
         handle->bytesEachWrite = bytesPerFrame;
-        handle->bytesEachRead = bytesPerFrame;
+        handle->bytesEachRead  = bytesPerFrame;
 
         handle->bytesLastRead = bytesPerFrame;
     }
-    else
-    {
+    else {
         handle->bytesEachWrite = 4;
-        handle->bytesEachRead = 4;
+        handle->bytesEachRead  = 4;
 
         handle->bytesLastRead = 4;
 
-        if ((transfer->dataSize % 4) != 0)
-        {
-            bytesLastWrite = transfer->dataSize % 4;
+        if ((transfer->dataSize % 4) != 0) {
+            bytesLastWrite        = transfer->dataSize % 4;
             handle->bytesLastRead = bytesLastWrite;
 
             isThereExtraTxBytes = true;
@@ -779,60 +735,54 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
 
     LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
 
-    EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiSlaveCallback,
-                     &s_lpspiSlaveEdmaPrivateHandle[instance]);
+    EDMA_SetCallback(
+        handle->edmaRxRegToRxDataHandle, EDMA_LpspiSlaveCallback, &s_lpspiSlaveEdmaPrivateHandle[instance]);
 
     /*Rx*/
-    if (handle->readRegRemainingTimes > 0)
-    {
+    if (handle->readRegRemainingTimes > 0) {
         EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
 
-        if (handle->rxData)
-        {
-            transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
+        if (handle->rxData) {
+            transferConfigRx.destAddr   = (uint32_t) & (handle->rxData[0]);
             transferConfigRx.destOffset = 1;
         }
-        else
-        {
-            transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
+        else {
+            transferConfigRx.destAddr   = (uint32_t) & (handle->rxBuffIfNull);
             transferConfigRx.destOffset = 0;
         }
         transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
 
         dif = 0;
-        switch (handle->bytesEachRead)
-        {
-            case (1U):
-                transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigRx.minorLoopBytes = 1;
-                if (handle->isByteSwap)
-                {
-                    dif = 3;
-                }
-                break;
+        switch (handle->bytesEachRead) {
+        case (1U):
+            transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigRx.minorLoopBytes  = 1;
+            if (handle->isByteSwap) {
+                dif = 3;
+            }
+            break;
 
-            case (2U):
-                transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
-                transferConfigRx.minorLoopBytes = 2;
-                if (handle->isByteSwap)
-                {
-                    dif = 2;
-                }
-                break;
+        case (2U):
+            transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
+            transferConfigRx.minorLoopBytes  = 2;
+            if (handle->isByteSwap) {
+                dif = 2;
+            }
+            break;
 
-            case (4U):
-                transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
-                transferConfigRx.minorLoopBytes = 4;
-                break;
+        case (4U):
+            transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
+            transferConfigRx.minorLoopBytes  = 4;
+            break;
 
-            default:
-                transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigRx.minorLoopBytes = 1;
-                assert(false);
-                break;
+        default:
+            transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigRx.minorLoopBytes  = 1;
+            assert(false);
+            break;
         }
 
-        transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
+        transferConfigRx.srcAddr   = (uint32_t)rxAddr + dif;
         transferConfigRx.srcOffset = 0;
 
         transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
@@ -840,25 +790,23 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
         /* Store the initially configured eDMA minor byte transfer count into the DSPI handle */
         handle->nbytes = transferConfigRx.minorLoopBytes;
 
-        EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
-                               &transferConfigRx, NULL);
-        EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
+        EDMA_SetTransferConfig(
+            handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, &transferConfigRx, NULL);
+        EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base,
+                                     handle->edmaRxRegToRxDataHandle->channel,
                                      kEDMA_MajorInterruptEnable);
     }
 
     /*Tx*/
     EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
 
-    if (isThereExtraTxBytes)
-    {
-        if (handle->txData)
-        {
-            transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
+    if (isThereExtraTxBytes) {
+        if (handle->txData) {
+            transferConfigTx.srcAddr   = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
             transferConfigTx.srcOffset = 1;
         }
-        else
-        {
-            transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
+        else {
+            transferConfigTx.srcAddr   = (uint32_t)(&handle->txBuffIfNull);
             transferConfigTx.srcOffset = 0;
         }
 
@@ -867,34 +815,31 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
         transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
 
         dif = 0;
-        switch (bytesLastWrite)
-        {
-            case (1U):
-                transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigTx.minorLoopBytes = 1;
-                if (handle->isByteSwap)
-                {
-                    dif = 3;
-                }
-                break;
+        switch (bytesLastWrite) {
+        case (1U):
+            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigTx.minorLoopBytes   = 1;
+            if (handle->isByteSwap) {
+                dif = 3;
+            }
+            break;
 
-            case (2U):
-                transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
-                transferConfigTx.minorLoopBytes = 2;
-                if (handle->isByteSwap)
-                {
-                    dif = 2;
-                }
-                break;
+        case (2U):
+            transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
+            transferConfigTx.minorLoopBytes   = 2;
+            if (handle->isByteSwap) {
+                dif = 2;
+            }
+            break;
 
-            default:
-                transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-                transferConfigTx.minorLoopBytes = 1;
-                assert(false);
-                break;
+        default:
+            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+            transferConfigTx.minorLoopBytes   = 1;
+            assert(false);
+            break;
         }
 
-        transferConfigTx.destAddr = (uint32_t)txAddr + dif;
+        transferConfigTx.destAddr        = (uint32_t)txAddr + dif;
         transferConfigTx.majorLoopCounts = 1;
 
         EDMA_TcdReset(softwareTCD_extraBytes);
@@ -902,14 +847,12 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
         EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
     }
 
-    if (handle->txData)
-    {
-        transferConfigTx.srcAddr = (uint32_t)(handle->txData);
+    if (handle->txData) {
+        transferConfigTx.srcAddr   = (uint32_t)(handle->txData);
         transferConfigTx.srcOffset = 1;
     }
-    else
-    {
-        transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
+    else {
+        transferConfigTx.srcAddr   = (uint32_t)(&handle->txBuffIfNull);
         transferConfigTx.srcOffset = 0;
     }
 
@@ -918,52 +861,49 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
     transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
 
     dif = 0;
-    switch (handle->bytesEachRead)
-    {
-        case (1U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigTx.minorLoopBytes = 1;
-            if (handle->isByteSwap)
-            {
-                dif = 3;
-            }
-            break;
+    switch (handle->bytesEachRead) {
+    case (1U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigTx.minorLoopBytes   = 1;
+        if (handle->isByteSwap) {
+            dif = 3;
+        }
+        break;
 
-        case (2U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
-            transferConfigTx.minorLoopBytes = 2;
+    case (2U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
+        transferConfigTx.minorLoopBytes   = 2;
 
-            if (handle->isByteSwap)
-            {
-                dif = 2;
-            }
-            break;
+        if (handle->isByteSwap) {
+            dif = 2;
+        }
+        break;
 
-        case (4U):
-            transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
-            transferConfigTx.minorLoopBytes = 4;
-            break;
+    case (4U):
+        transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
+        transferConfigTx.minorLoopBytes   = 4;
+        break;
 
-        default:
-            transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
-            transferConfigTx.minorLoopBytes = 1;
-            assert(false);
-            break;
+    default:
+        transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
+        transferConfigTx.minorLoopBytes   = 1;
+        assert(false);
+        break;
     }
 
     transferConfigTx.destAddr = (uint32_t)txAddr + dif;
 
     transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
 
-    if (isThereExtraTxBytes)
-    {
-        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
-                               &transferConfigTx, softwareTCD_extraBytes);
+    if (isThereExtraTxBytes) {
+        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base,
+                               handle->edmaTxDataToTxRegHandle->channel,
+                               &transferConfigTx,
+                               softwareTCD_extraBytes);
     }
-    else
-    {
-        EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
-                               &transferConfigTx, NULL);
+    else {
+        EDMA_SetTransferConfig(
+            handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel, &transferConfigTx, NULL);
     }
 
     EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
@@ -991,28 +931,27 @@ static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
 
     LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
 
-    if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
-    {
-        while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
-        {
-        }
+    if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes) {
+        while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0) {}
         readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
 
-        if (lpspiEdmaPrivateHandle->handle->rxData)
-        {
+        if (lpspiEdmaPrivateHandle->handle->rxData) {
             LPSPI_SeparateEdmaReadData(
                 &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
                                                          lpspiEdmaPrivateHandle->handle->bytesLastRead]),
-                readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
+                readData,
+                lpspiEdmaPrivateHandle->handle->bytesLastRead,
+                lpspiEdmaPrivateHandle->handle->isByteSwap);
         }
     }
 
     lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
 
-    if (lpspiEdmaPrivateHandle->handle->callback)
-    {
-        lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
-                                                 kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
+    if (lpspiEdmaPrivateHandle->handle->callback) {
+        lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base,
+                                                 lpspiEdmaPrivateHandle->handle,
+                                                 kStatus_Success,
+                                                 lpspiEdmaPrivateHandle->handle->userData);
     }
 }
 
@@ -1032,14 +971,12 @@ status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_hand
 {
     assert(handle);
 
-    if (!count)
-    {
+    if (!count) {
         return kStatus_InvalidArgument;
     }
 
     /* Catch when there is not an active transfer. */
-    if (handle->state != kLPSPI_Busy)
-    {
+    if (handle->state != kLPSPI_Busy) {
         *count = 0;
         return kStatus_NoTransferInProgress;
     }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.h
index 54b71bed4..16f9ca60d 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpspi_edma.h
@@ -52,13 +52,13 @@
 /*@}*/
 
 /*!
-* @brief Forward declaration of the _lpspi_master_edma_handle typedefs.
-*/
+ * @brief Forward declaration of the _lpspi_master_edma_handle typedefs.
+ */
 typedef struct _lpspi_master_edma_handle lpspi_master_edma_handle_t;
 
 /*!
-* @brief Forward declaration of the _lpspi_slave_edma_handle typedefs.
-*/
+ * @brief Forward declaration of the _lpspi_slave_edma_handle typedefs.
+ */
 typedef struct _lpspi_slave_edma_handle lpspi_slave_edma_handle_t;
 
 /*!
@@ -178,145 +178,145 @@ struct _lpspi_slave_edma_handle
  * API
  **********************************************************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /*_cplusplus*/
 
-/*Transactional APIs*/
+    /*Transactional APIs*/
 
-/*!
- * @brief Initializes the LPSPI master eDMA handle.
- *
- * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs.  Usually, for a
- * specified LPSPI instance, call this API once to get the initialized handle.
- *
- * Note that the LPSPI eDMA has a separated (Rx and Rx as two sources) or shared (Rx  and Tx are the same source) DMA
- * request source.
- * (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and
- * Tx DMAMUX source for edmaIntermediaryToTxRegHandle.
- * (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle.
- *
- * @param base LPSPI peripheral base address.
- * @param handle LPSPI handle pointer to lpspi_master_edma_handle_t.
- * @param callback LPSPI callback.
- * @param userData callback function parameter.
- * @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
- * @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
- */
-void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base,
-                                          lpspi_master_edma_handle_t *handle,
-                                          lpspi_master_edma_transfer_callback_t callback,
-                                          void *userData,
-                                          edma_handle_t *edmaRxRegToRxDataHandle,
-                                          edma_handle_t *edmaTxDataToTxRegHandle);
+    /*!
+     * @brief Initializes the LPSPI master eDMA handle.
+     *
+     * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs.  Usually,
+     * for a specified LPSPI instance, call this API once to get the initialized handle.
+     *
+     * Note that the LPSPI eDMA has a separated (Rx and Rx as two sources) or shared (Rx  and Tx are the same source)
+     * DMA request source. (1) For a separated DMA request source, enable and set the Rx DMAMUX source for
+     * edmaRxRegToRxDataHandle and Tx DMAMUX source for edmaIntermediaryToTxRegHandle. (2) For a shared DMA request
+     * source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle LPSPI handle pointer to lpspi_master_edma_handle_t.
+     * @param callback LPSPI callback.
+     * @param userData callback function parameter.
+     * @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
+     * @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
+     */
+    void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base,
+                                              lpspi_master_edma_handle_t *handle,
+                                              lpspi_master_edma_transfer_callback_t callback,
+                                              void *userData,
+                                              edma_handle_t *edmaRxRegToRxDataHandle,
+                                              edma_handle_t *edmaTxDataToTxRegHandle);
 
-/*!
- * @brief LPSPI master transfer data using eDMA.
- *
- * This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
- * is transferred, the callback function is called.
- *
- * Note:
- * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4.
- * For bytesPerFrame greater than 4:
- * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
- * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
- * @param transfer pointer to lpspi_transfer_t structure.
- * @return status of status_t.
- */
-status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer);
+    /*!
+     * @brief LPSPI master transfer data using eDMA.
+     *
+     * This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
+     * is transferred, the callback function is called.
+     *
+     * Note:
+     * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal
+     * to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the
+     * bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of
+     * bytesPerFrame.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
+     * @param transfer pointer to lpspi_transfer_t structure.
+     * @return status of status_t.
+     */
+    status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer);
 
-/*!
- * @brief LPSPI master aborts a transfer which is using eDMA.
- *
- * This function aborts a transfer which is using eDMA.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
- */
-void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle);
+    /*!
+     * @brief LPSPI master aborts a transfer which is using eDMA.
+     *
+     * This function aborts a transfer which is using eDMA.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle);
 
-/*!
- * @brief Gets the master eDMA transfer remaining bytes.
- *
- * This function gets the master eDMA transfer remaining bytes.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
- * @param count Number of bytes transferred so far by the EDMA transaction.
- * @return status of status_t.
- */
-status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count);
+    /*!
+     * @brief Gets the master eDMA transfer remaining bytes.
+     *
+     * This function gets the master eDMA transfer remaining bytes.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
+     * @param count Number of bytes transferred so far by the EDMA transaction.
+     * @return status of status_t.
+     */
+    status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count);
 
-/*!
- * @brief Initializes the LPSPI slave eDMA handle.
- *
- * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs.  Usually, for a
- * specified LPSPI instance, call this API once to get the initialized handle.
- *
- * Note that LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx  and Tx as the same source) DMA request
- * source.
- *
- * (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and
- * Tx DMAMUX source for edmaTxDataToTxRegHandle.
- * (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle .
- *
- * @param base LPSPI peripheral base address.
- * @param handle LPSPI handle pointer to lpspi_slave_edma_handle_t.
- * @param callback LPSPI callback.
- * @param userData callback function parameter.
- * @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
- * @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
- */
-void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base,
-                                         lpspi_slave_edma_handle_t *handle,
-                                         lpspi_slave_edma_transfer_callback_t callback,
-                                         void *userData,
-                                         edma_handle_t *edmaRxRegToRxDataHandle,
-                                         edma_handle_t *edmaTxDataToTxRegHandle);
+    /*!
+     * @brief Initializes the LPSPI slave eDMA handle.
+     *
+     * This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs.  Usually,
+     * for a specified LPSPI instance, call this API once to get the initialized handle.
+     *
+     * Note that LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx  and Tx as the same source) DMA
+     * request source.
+     *
+     * (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and
+     * Tx DMAMUX source for edmaTxDataToTxRegHandle.
+     * (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle .
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle LPSPI handle pointer to lpspi_slave_edma_handle_t.
+     * @param callback LPSPI callback.
+     * @param userData callback function parameter.
+     * @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
+     * @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
+     */
+    void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base,
+                                             lpspi_slave_edma_handle_t *handle,
+                                             lpspi_slave_edma_transfer_callback_t callback,
+                                             void *userData,
+                                             edma_handle_t *edmaRxRegToRxDataHandle,
+                                             edma_handle_t *edmaTxDataToTxRegHandle);
 
-/*!
- * @brief LPSPI slave transfers data using eDMA.
- *
- * This function transfers data using eDMA. This is a non-blocking function, which return right away. When all data
- * is transferred, the callback function is called.
- *
- * Note:
- * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4.
- * For bytesPerFrame greater than 4:
- * The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4.
- * Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
- * @param transfer pointer to lpspi_transfer_t structure.
- * @return status of status_t.
- */
-status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer);
+    /*!
+     * @brief LPSPI slave transfers data using eDMA.
+     *
+     * This function transfers data using eDMA. This is a non-blocking function, which return right away. When all data
+     * is transferred, the callback function is called.
+     *
+     * Note:
+     * The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal
+     * to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the
+     * bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of
+     * bytesPerFrame.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
+     * @param transfer pointer to lpspi_transfer_t structure.
+     * @return status of status_t.
+     */
+    status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer);
 
-/*!
- * @brief LPSPI slave aborts a transfer which is using eDMA.
- *
- * This function aborts a transfer which is using eDMA.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
- */
-void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle);
+    /*!
+     * @brief LPSPI slave aborts a transfer which is using eDMA.
+     *
+     * This function aborts a transfer which is using eDMA.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
+     */
+    void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle);
 
-/*!
- * @brief Gets the slave eDMA transfer remaining bytes.
- *
- * This function gets the slave eDMA transfer remaining bytes.
- *
- * @param base LPSPI peripheral base address.
- * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
- * @param count Number of bytes transferred so far by the eDMA transaction.
- * @return status of status_t.
- */
-status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count);
+    /*!
+     * @brief Gets the slave eDMA transfer remaining bytes.
+     *
+     * This function gets the slave eDMA transfer remaining bytes.
+     *
+     * @param base LPSPI peripheral base address.
+     * @param handle pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
+     * @param count Number of bytes transferred so far by the eDMA transaction.
+     * @return status of status_t.
+     */
+    status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.c
index 9664469c2..609a12612 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.c
@@ -131,10 +131,8 @@ uint32_t LPUART_GetInstance(LPUART_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_lpuartBases); instance++)
-    {
-        if (s_lpuartBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_lpuartBases); instance++) {
+        if (s_lpuartBases[instance] == base) {
             break;
         }
     }
@@ -150,12 +148,10 @@ size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *
 
     size_t size;
 
-    if (handle->rxRingBufferTail > handle->rxRingBufferHead)
-    {
+    if (handle->rxRingBufferTail > handle->rxRingBufferHead) {
         size = (size_t)(handle->rxRingBufferHead + handle->rxRingBufferSize - handle->rxRingBufferTail);
     }
-    else
-    {
+    else {
         size = (size_t)(handle->rxRingBufferHead - handle->rxRingBufferTail);
     }
 
@@ -168,12 +164,10 @@ static bool LPUART_TransferIsRxRingBufferFull(LPUART_Type *base, lpuart_handle_t
 
     bool full;
 
-    if (LPUART_TransferGetRxRingBufferLength(base, handle) == (handle->rxRingBufferSize - 1U))
-    {
+    if (LPUART_TransferGetRxRingBufferLength(base, handle) == (handle->rxRingBufferSize - 1U)) {
         full = true;
     }
-    else
-    {
+    else {
         full = false;
     }
     return full;
@@ -187,8 +181,7 @@ static void LPUART_WriteNonBlocking(LPUART_Type *base, const uint8_t *data, size
 
     /* The Non Blocking write data API assume user have ensured there is enough space in
     peripheral to write. */
-    for (i = 0; i < length; i++)
-    {
+    for (i = 0; i < length; i++) {
         base->DATA = data[i];
     }
 }
@@ -206,15 +199,12 @@ static void LPUART_ReadNonBlocking(LPUART_Type *base, uint8_t *data, size_t leng
 
     /* The Non Blocking read data API assume user have ensured there is enough space in
     peripheral to write. */
-    for (i = 0; i < length; i++)
-    {
+    for (i = 0; i < length; i++) {
 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
-        if (isSevenDataBits)
-        {
+        if (isSevenDataBits) {
             data[i] = (base->DATA & 0x7F);
         }
-        else
-        {
+        else {
             data[i] = base->DATA;
         }
 #else
@@ -243,15 +233,13 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
      * iterate through the rest of the supported values of OSR */
 
     baudDiff = config->baudRate_Bps;
-    osr = 0;
-    sbr = 0;
-    for (osrTemp = 4; osrTemp <= 32; osrTemp++)
-    {
+    osr      = 0;
+    sbr      = 0;
+    for (osrTemp = 4; osrTemp <= 32; osrTemp++) {
         /* calculate the temporary sbr value   */
         sbrTemp = (srcClock_Hz / (config->baudRate_Bps * osrTemp));
         /*set sbrTemp to 1 if the sourceClockInHz can not satisfy the desired baud rate*/
-        if (sbrTemp == 0)
-        {
+        if (sbrTemp == 0) {
             sbrTemp = 1;
         }
         /* Calculate the baud rate based on the temporary OSR and SBR values */
@@ -260,24 +248,21 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
         tempDiff = calculatedBaud - config->baudRate_Bps;
 
         /* Select the better value between srb and (sbr + 1) */
-        if (tempDiff > (config->baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1)))))
-        {
+        if (tempDiff > (config->baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))))) {
             tempDiff = config->baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1)));
             sbrTemp++;
         }
 
-        if (tempDiff <= baudDiff)
-        {
+        if (tempDiff <= baudDiff) {
             baudDiff = tempDiff;
-            osr = osrTemp; /* update and store the best OSR value calculated */
-            sbr = sbrTemp; /* update store the best SBR value calculated */
+            osr      = osrTemp; /* update and store the best OSR value calculated */
+            sbr      = sbrTemp; /* update store the best SBR value calculated */
         }
     }
 
     /* Check to see if actual baud rate is within 3% of desired baud rate
      * based on the best calculate OSR value */
-    if (baudDiff > ((config->baudRate_Bps / 100) * 3))
-    {
+    if (baudDiff > ((config->baudRate_Bps / 100) * 3)) {
         /* Unacceptable baud rate difference of more than 3%*/
         return kStatus_LPUART_BaudrateNotSupport;
     }
@@ -306,8 +291,7 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
 
     /* Acceptable baud rate, check if OSR is between 4x and 7x oversampling.
      * If so, then "BOTHEDGE" sampling must be turned on */
-    if ((osr > 3) && (osr < 8))
-    {
+    if ((osr > 3) && (osr < 8)) {
         temp |= LPUART_BAUD_BOTHEDGE_MASK;
     }
 
@@ -322,30 +306,25 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
     /* Set bit count and parity mode. */
     base->BAUD &= ~LPUART_BAUD_M10_MASK;
 
-    temp = base->CTRL &
-           ~(LPUART_CTRL_PE_MASK | LPUART_CTRL_PT_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL_ILT_MASK |
-             LPUART_CTRL_IDLECFG_MASK);
+    temp = base->CTRL & ~(LPUART_CTRL_PE_MASK | LPUART_CTRL_PT_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL_ILT_MASK |
+                          LPUART_CTRL_IDLECFG_MASK);
 
     temp |=
         (uint8_t)config->parityMode | LPUART_CTRL_IDLECFG(config->rxIdleConfig) | LPUART_CTRL_ILT(config->rxIdleType);
 
 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
-    if (kLPUART_SevenDataBits == config->dataBitsCount)
-    {
-        if (kLPUART_ParityDisabled != config->parityMode)
-        {
+    if (kLPUART_SevenDataBits == config->dataBitsCount) {
+        if (kLPUART_ParityDisabled != config->parityMode) {
             temp &= ~LPUART_CTRL_M7_MASK; /* Seven data bits and one parity bit */
         }
-        else
-        {
+        else {
             temp |= LPUART_CTRL_M7_MASK;
         }
     }
     else
 #endif
     {
-        if (kLPUART_ParityDisabled != config->parityMode)
-        {
+        if (kLPUART_ParityDisabled != config->parityMode) {
             temp |= LPUART_CTRL_M_MASK; /* Eight data bits and one parity bit */
         }
     }
@@ -354,7 +333,7 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
 
 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
     /* set stop bit per char */
-    temp = base->BAUD & ~LPUART_BAUD_SBNS_MASK;
+    temp       = base->BAUD & ~LPUART_BAUD_SBNS_MASK;
     base->BAUD = temp | LPUART_BAUD_SBNS((uint8_t)config->stopBitCount);
 #endif
 
@@ -392,25 +371,21 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
     /* Set the CTS configuration/TX CTS source. */
     base->MODIR |= LPUART_MODIR_TXCTSC(config->txCtsConfig) | LPUART_MODIR_TXCTSSRC(config->txCtsSource);
-    if (config->enableRxRTS)
-    {
+    if (config->enableRxRTS) {
         /* Enable the receiver RTS(request-to-send) function. */
         base->MODIR |= LPUART_MODIR_RXRTSE_MASK;
     }
-    if (config->enableTxCTS)
-    {
+    if (config->enableTxCTS) {
         /* Enable the CTS(clear-to-send) function. */
         base->MODIR |= LPUART_MODIR_TXCTSE_MASK;
     }
 #endif
 
     /* Set data bits order. */
-    if (config->isMsb)
-    {
+    if (config->isMsb) {
         temp |= LPUART_STAT_MSBF_MASK;
     }
-    else
-    {
+    else {
         temp &= ~LPUART_STAT_MSBF_MASK;
     }
 
@@ -418,13 +393,11 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
 
     /* Enable TX/RX base on configure structure. */
     temp = base->CTRL;
-    if (config->enableTx)
-    {
+    if (config->enableTx) {
         temp |= LPUART_CTRL_TE_MASK;
     }
 
-    if (config->enableRx)
-    {
+    if (config->enableRx) {
         temp |= LPUART_CTRL_RE_MASK;
     }
 
@@ -438,14 +411,10 @@ void LPUART_Deinit(LPUART_Type *base)
 
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
     /* Wait tx FIFO send out*/
-    while (0 != ((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXWATER_SHIFT))
-    {
-    }
+    while (0 != ((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXWATER_SHIFT)) {}
 #endif
     /* Wait last char shoft out */
-    while (0 == (base->STAT & LPUART_STAT_TC_MASK))
-    {
-    }
+    while (0 == (base->STAT & LPUART_STAT_TC_MASK)) {}
 
     /* Clear all status flags */
     temp = (LPUART_STAT_RXEDGIF_MASK | LPUART_STAT_IDLE_MASK | LPUART_STAT_OR_MASK | LPUART_STAT_NF_MASK |
@@ -481,10 +450,10 @@ void LPUART_GetDefaultConfig(lpuart_config_t *config)
 {
     assert(config);
 
-    config->baudRate_Bps = 115200U;
-    config->parityMode = kLPUART_ParityDisabled;
+    config->baudRate_Bps  = 115200U;
+    config->parityMode    = kLPUART_ParityDisabled;
     config->dataBitsCount = kLPUART_EightDataBits;
-    config->isMsb = false;
+    config->isMsb         = false;
 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
     config->stopBitCount = kLPUART_OneStopBit;
 #endif
@@ -498,10 +467,10 @@ void LPUART_GetDefaultConfig(lpuart_config_t *config)
     config->txCtsConfig = kLPUART_CtsSampleAtStart;
     config->txCtsSource = kLPUART_CtsSourcePin;
 #endif
-    config->rxIdleType = kLPUART_IdleTypeStartBit;
+    config->rxIdleType   = kLPUART_IdleTypeStartBit;
     config->rxIdleConfig = kLPUART_IdleCharacter1;
-    config->enableTx = false;
-    config->enableRx = false;
+    config->enableTx     = false;
+    config->enableRx     = false;
 }
 
 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
@@ -519,15 +488,13 @@ status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t s
      * iterate through the rest of the supported values of OSR */
 
     baudDiff = baudRate_Bps;
-    osr = 0;
-    sbr = 0;
-    for (osrTemp = 4; osrTemp <= 32; osrTemp++)
-    {
+    osr      = 0;
+    sbr      = 0;
+    for (osrTemp = 4; osrTemp <= 32; osrTemp++) {
         /* calculate the temporary sbr value   */
         sbrTemp = (srcClock_Hz / (baudRate_Bps * osrTemp));
         /*set sbrTemp to 1 if the sourceClockInHz can not satisfy the desired baud rate*/
-        if (sbrTemp == 0)
-        {
+        if (sbrTemp == 0) {
             sbrTemp = 1;
         }
         /* Calculate the baud rate based on the temporary OSR and SBR values */
@@ -536,24 +503,21 @@ status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t s
         tempDiff = calculatedBaud - baudRate_Bps;
 
         /* Select the better value between srb and (sbr + 1) */
-        if (tempDiff > (baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1)))))
-        {
+        if (tempDiff > (baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1))))) {
             tempDiff = baudRate_Bps - (srcClock_Hz / (osrTemp * (sbrTemp + 1)));
             sbrTemp++;
         }
 
-        if (tempDiff <= baudDiff)
-        {
+        if (tempDiff <= baudDiff) {
             baudDiff = tempDiff;
-            osr = osrTemp; /* update and store the best OSR value calculated */
-            sbr = sbrTemp; /* update store the best SBR value calculated */
+            osr      = osrTemp; /* update and store the best OSR value calculated */
+            sbr      = sbrTemp; /* update store the best SBR value calculated */
         }
     }
 
     /* Check to see if actual baud rate is within 3% of desired baud rate
      * based on the best calculate OSR value */
-    if (baudDiff < ((baudRate_Bps / 100) * 3))
-    {
+    if (baudDiff < ((baudRate_Bps / 100) * 3)) {
         /* Store CTRL before disable Tx and Rx */
         oldCtrl = base->CTRL;
 
@@ -564,8 +528,7 @@ status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t s
 
         /* Acceptable baud rate, check if OSR is between 4x and 7x oversampling.
          * If so, then "BOTHEDGE" sampling must be turned on */
-        if ((osr > 3) && (osr < 8))
-        {
+        if ((osr > 3) && (osr < 8)) {
             temp |= LPUART_BAUD_BOTHEDGE_MASK;
         }
 
@@ -582,8 +545,7 @@ status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t s
 
         return kStatus_Success;
     }
-    else
-    {
+    else {
         /* Unacceptable baud rate difference of more than 3%*/
         return kStatus_LPUART_BaudrateNotSupport;
     }
@@ -660,16 +622,14 @@ status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask)
 #endif
     base->STAT = temp;
     /* If some flags still pending. */
-    if (mask & LPUART_GetStatusFlags(base))
-    {
+    if (mask & LPUART_GetStatusFlags(base)) {
         /* Some flags can only clear or set by the hardware itself, these flags are: kLPUART_TxDataRegEmptyFlag,
         kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag, kLPUART_RxActiveFlag,
         kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
         kLPUART_TxFifoEmptyFlag, kLPUART_RxFifoEmptyFlag. */
         status = kStatus_LPUART_FlagCannotClearManually; /* flags can not clear manually */
     }
-    else
-    {
+    else {
         status = kStatus_Success;
     }
 
@@ -682,11 +642,8 @@ void LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
 
     /* This API can only ensure that the data is written into the data buffer but can't
     ensure all data in the data buffer are sent into the transmit shift buffer. */
-    while (length--)
-    {
-        while (!(base->STAT & LPUART_STAT_TDRE_MASK))
-        {
-        }
+    while (length--) {
+        while (!(base->STAT & LPUART_STAT_TDRE_MASK)) {}
         base->DATA = *(data++);
     }
 }
@@ -702,8 +659,7 @@ status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)
         ((ctrl & LPUART_CTRL_M7_MASK) || ((!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
 #endif
 
-    while (length--)
-    {
+    while (length--) {
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
         while (0 == ((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT))
 #else
@@ -712,37 +668,31 @@ status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)
         {
             statusFlag = LPUART_GetStatusFlags(base);
 
-            if (statusFlag & kLPUART_RxOverrunFlag)
-            {
+            if (statusFlag & kLPUART_RxOverrunFlag) {
                 LPUART_ClearStatusFlags(base, kLPUART_RxOverrunFlag);
                 return kStatus_LPUART_RxHardwareOverrun;
             }
 
-            if (statusFlag & kLPUART_NoiseErrorFlag)
-            {
+            if (statusFlag & kLPUART_NoiseErrorFlag) {
                 LPUART_ClearStatusFlags(base, kLPUART_NoiseErrorFlag);
                 return kStatus_LPUART_NoiseError;
             }
 
-            if (statusFlag & kLPUART_FramingErrorFlag)
-            {
+            if (statusFlag & kLPUART_FramingErrorFlag) {
                 LPUART_ClearStatusFlags(base, kLPUART_FramingErrorFlag);
                 return kStatus_LPUART_FramingError;
             }
 
-            if (statusFlag & kLPUART_ParityErrorFlag)
-            {
+            if (statusFlag & kLPUART_ParityErrorFlag) {
                 LPUART_ClearStatusFlags(base, kLPUART_ParityErrorFlag);
                 return kStatus_LPUART_ParityError;
             }
         }
 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
-        if (isSevenDataBits)
-        {
+        if (isSevenDataBits) {
             *(data++) = (base->DATA & 0x7F);
         }
-        else
-        {
+        else {
             *(data++) = base->DATA;
         }
 #else
@@ -809,7 +759,7 @@ void LPUART_TransferStartRingBuffer(LPUART_Type *base,
     assert(ringBuffer);
 
     /* Setup the ring buffer address */
-    handle->rxRingBuffer = ringBuffer;
+    handle->rxRingBuffer     = ringBuffer;
     handle->rxRingBufferSize = ringBufferSize;
     handle->rxRingBufferHead = 0U;
     handle->rxRingBufferTail = 0U;
@@ -822,12 +772,11 @@ void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle)
 {
     assert(handle);
 
-    if (handle->rxState == kLPUART_RxIdle)
-    {
+    if (handle->rxState == kLPUART_RxIdle) {
         LPUART_DisableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable);
     }
 
-    handle->rxRingBuffer = NULL;
+    handle->rxRingBuffer     = NULL;
     handle->rxRingBufferSize = 0U;
     handle->rxRingBufferHead = 0U;
     handle->rxRingBufferTail = 0U;
@@ -843,16 +792,14 @@ status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *hand
     status_t status;
 
     /* Return error if current TX busy. */
-    if (kLPUART_TxBusy == handle->txState)
-    {
+    if (kLPUART_TxBusy == handle->txState) {
         status = kStatus_LPUART_TxBusy;
     }
-    else
-    {
-        handle->txData = xfer->data;
-        handle->txDataSize = xfer->dataSize;
+    else {
+        handle->txData        = xfer->data;
+        handle->txDataSize    = xfer->dataSize;
         handle->txDataSizeAll = xfer->dataSize;
-        handle->txState = kLPUART_TxBusy;
+        handle->txState       = kLPUART_TxBusy;
 
         /* Enable transmiter interrupt. */
         LPUART_EnableInterrupts(base, kLPUART_TxDataRegEmptyInterruptEnable);
@@ -870,7 +817,7 @@ void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle)
     LPUART_DisableInterrupts(base, kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_TransmissionCompleteInterruptEnable);
 
     handle->txDataSize = 0;
-    handle->txState = kLPUART_TxIdle;
+    handle->txState    = kLPUART_TxIdle;
 }
 
 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)
@@ -878,8 +825,7 @@ status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle,
     assert(handle);
     assert(count);
 
-    if (kLPUART_TxIdle == handle->txState)
-    {
+    if (kLPUART_TxIdle == handle->txState) {
         return kStatus_NoTransferInProgress;
     }
 
@@ -917,84 +863,73 @@ status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
           save the xfer->data remained empty space to lpuart handle, receive data
           to this empty space and trigger callback when finished. */
 
-    if (kLPUART_RxBusy == handle->rxState)
-    {
+    if (kLPUART_RxBusy == handle->rxState) {
         status = kStatus_LPUART_RxBusy;
     }
-    else
-    {
-        bytesToReceive = xfer->dataSize;
+    else {
+        bytesToReceive       = xfer->dataSize;
         bytesCurrentReceived = 0;
 
         /* If RX ring buffer is used. */
-        if (handle->rxRingBuffer)
-        {
+        if (handle->rxRingBuffer) {
             /* Disable LPUART RX IRQ, protect ring buffer. */
             LPUART_DisableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable);
 
             /* How many bytes in RX ring buffer currently. */
             bytesToCopy = LPUART_TransferGetRxRingBufferLength(base, handle);
 
-            if (bytesToCopy)
-            {
+            if (bytesToCopy) {
                 bytesToCopy = MIN(bytesToReceive, bytesToCopy);
 
                 bytesToReceive -= bytesToCopy;
 
                 /* Copy data from ring buffer to user memory. */
-                for (i = 0U; i < bytesToCopy; i++)
-                {
+                for (i = 0U; i < bytesToCopy; i++) {
                     xfer->data[bytesCurrentReceived++] = handle->rxRingBuffer[handle->rxRingBufferTail];
 
                     /* Wrap to 0. Not use modulo (%) because it might be large and slow. */
-                    if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
-                    {
+                    if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize) {
                         handle->rxRingBufferTail = 0U;
                     }
-                    else
-                    {
+                    else {
                         handle->rxRingBufferTail++;
                     }
                 }
             }
 
             /* If ring buffer does not have enough data, still need to read more data. */
-            if (bytesToReceive)
-            {
+            if (bytesToReceive) {
                 /* No data in ring buffer, save the request to LPUART handle. */
-                handle->rxData = xfer->data + bytesCurrentReceived;
-                handle->rxDataSize = bytesToReceive;
+                handle->rxData        = xfer->data + bytesCurrentReceived;
+                handle->rxDataSize    = bytesToReceive;
                 handle->rxDataSizeAll = bytesToReceive;
-                handle->rxState = kLPUART_RxBusy;
+                handle->rxState       = kLPUART_RxBusy;
             }
             /* Enable LPUART RX IRQ if previously enabled. */
             LPUART_EnableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable);
 
             /* Call user callback since all data are received. */
-            if (0 == bytesToReceive)
-            {
-                if (handle->callback)
-                {
+            if (0 == bytesToReceive) {
+                if (handle->callback) {
                     handle->callback(base, handle, kStatus_LPUART_RxIdle, handle->userData);
                 }
             }
         }
         /* Ring buffer not used. */
-        else
-        {
-            handle->rxData = xfer->data + bytesCurrentReceived;
-            handle->rxDataSize = bytesToReceive;
+        else {
+            handle->rxData        = xfer->data + bytesCurrentReceived;
+            handle->rxDataSize    = bytesToReceive;
             handle->rxDataSizeAll = bytesToReceive;
-            handle->rxState = kLPUART_RxBusy;
+            handle->rxState       = kLPUART_RxBusy;
 
             /* Enable RX interrupt. */
-            LPUART_EnableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable |
-                                              kLPUART_IdleLineInterruptEnable);
+            LPUART_EnableInterrupts(base,
+                                    kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable |
+                                        kLPUART_IdleLineInterruptEnable);
         }
 
         /* Return the how many bytes have read. */
-        if (receivedBytes)
-        {
+        if (receivedBytes) {
             *receivedBytes = bytesCurrentReceived;
         }
 
@@ -1009,15 +944,15 @@ void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle)
     assert(handle);
 
     /* Only abort the receive to handle->rxData, the RX ring buffer is still working. */
-    if (!handle->rxRingBuffer)
-    {
+    if (!handle->rxRingBuffer) {
         /* Disable RX interrupt. */
-        LPUART_DisableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable |
-                                           kLPUART_IdleLineInterruptEnable);
+        LPUART_DisableInterrupts(base,
+                                 kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable |
+                                     kLPUART_IdleLineInterruptEnable);
     }
 
     handle->rxDataSize = 0U;
-    handle->rxState = kLPUART_RxIdle;
+    handle->rxState    = kLPUART_RxIdle;
 }
 
 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)
@@ -1025,8 +960,7 @@ status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *hand
     assert(handle);
     assert(count);
 
-    if (kLPUART_RxIdle == handle->rxState)
-    {
+    if (kLPUART_RxIdle == handle->rxState) {
         return kStatus_NoTransferInProgress;
     }
 
@@ -1043,26 +977,22 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
     uint8_t tempCount;
 
     /* If RX overrun. */
-    if (LPUART_STAT_OR_MASK & base->STAT)
-    {
+    if (LPUART_STAT_OR_MASK & base->STAT) {
         /* Clear overrun flag, otherwise the RX does not work. */
         base->STAT = ((base->STAT & 0x3FE00000U) | LPUART_STAT_OR_MASK);
 
         /* Trigger callback. */
-        if (handle->callback)
-        {
+        if (handle->callback) {
             handle->callback(base, handle, kStatus_LPUART_RxHardwareOverrun, handle->userData);
         }
     }
 
     /* If IDLE flag is set and the IDLE interrupt is enabled. */
-    if ((LPUART_STAT_IDLE_MASK & base->STAT) && (LPUART_CTRL_ILIE_MASK & base->CTRL))
-    {
+    if ((LPUART_STAT_IDLE_MASK & base->STAT) && (LPUART_CTRL_ILIE_MASK & base->CTRL)) {
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
         count = ((uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT));
 
-        while ((count) && (handle->rxDataSize))
-        {
+        while ((count) && (handle->rxDataSize)) {
             tempCount = MIN(handle->rxDataSize, count);
 
             /* Using non block API to read the data from the registers. */
@@ -1072,13 +1002,11 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
             count -= tempCount;
 
             /* If rxDataSize is 0, disable idle line interrupt.*/
-            if (!(handle->rxDataSize))
-            {
+            if (!(handle->rxDataSize)) {
                 handle->rxState = kLPUART_RxIdle;
 
                 LPUART_DisableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable);
-                if (handle->callback)
-                {
+                if (handle->callback) {
                     handle->callback(base, handle, kStatus_LPUART_RxIdle, handle->userData);
                 }
             }
@@ -1088,19 +1016,16 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
         base->STAT |= LPUART_STAT_IDLE_MASK;
 
         /* If rxDataSize is 0, disable idle line interrupt.*/
-        if (!(handle->rxDataSize))
-        {
+        if (!(handle->rxDataSize)) {
             LPUART_DisableInterrupts(base, kLPUART_IdleLineInterruptEnable);
         }
         /* If callback is not NULL and rxDataSize is not 0. */
-        if ((handle->callback) && (handle->rxDataSize))
-        {
+        if ((handle->callback) && (handle->rxDataSize)) {
             handle->callback(base, handle, kStatus_LPUART_IdleLineDetected, handle->userData);
         }
     }
     /* Receive data register full */
-    if ((LPUART_STAT_RDRF_MASK & base->STAT) && (LPUART_CTRL_RIE_MASK & base->CTRL))
-    {
+    if ((LPUART_STAT_RDRF_MASK & base->STAT) && (LPUART_CTRL_RIE_MASK & base->CTRL)) {
 /* Get the size that can be stored into buffer for this interrupt. */
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
         count = ((uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT));
@@ -1109,8 +1034,7 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
 #endif
 
         /* If handle->rxDataSize is not 0, first save data to handle->rxData. */
-        while ((count) && (handle->rxDataSize))
-        {
+        while ((count) && (handle->rxDataSize)) {
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
             tempCount = MIN(handle->rxDataSize, count);
 #else
@@ -1124,53 +1048,42 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
             count -= tempCount;
 
             /* If all the data required for upper layer is ready, trigger callback. */
-            if (!handle->rxDataSize)
-            {
+            if (!handle->rxDataSize) {
                 handle->rxState = kLPUART_RxIdle;
 
-                if (handle->callback)
-                {
+                if (handle->callback) {
                     handle->callback(base, handle, kStatus_LPUART_RxIdle, handle->userData);
                 }
             }
         }
 
         /* If use RX ring buffer, receive data to ring buffer. */
-        if (handle->rxRingBuffer)
-        {
-            while (count--)
-            {
+        if (handle->rxRingBuffer) {
+            while (count--) {
                 /* If RX ring buffer is full, trigger callback to notify over run. */
-                if (LPUART_TransferIsRxRingBufferFull(base, handle))
-                {
-                    if (handle->callback)
-                    {
+                if (LPUART_TransferIsRxRingBufferFull(base, handle)) {
+                    if (handle->callback) {
                         handle->callback(base, handle, kStatus_LPUART_RxRingBufferOverrun, handle->userData);
                     }
                 }
 
                 /* If ring buffer is still full after callback function, the oldest data is overrided. */
-                if (LPUART_TransferIsRxRingBufferFull(base, handle))
-                {
+                if (LPUART_TransferIsRxRingBufferFull(base, handle)) {
                     /* Increase handle->rxRingBufferTail to make room for new data. */
-                    if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
-                    {
+                    if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize) {
                         handle->rxRingBufferTail = 0U;
                     }
-                    else
-                    {
+                    else {
                         handle->rxRingBufferTail++;
                     }
                 }
 
 /* Read data. */
 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
-                if (handle->isSevenDataBits)
-                {
+                if (handle->isSevenDataBits) {
                     handle->rxRingBuffer[handle->rxRingBufferHead] = (base->DATA & 0x7F);
                 }
-                else
-                {
+                else {
                     handle->rxRingBuffer[handle->rxRingBufferHead] = base->DATA;
                 }
 #else
@@ -1178,29 +1091,24 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
 #endif
 
                 /* Increase handle->rxRingBufferHead. */
-                if (handle->rxRingBufferHead + 1U == handle->rxRingBufferSize)
-                {
+                if (handle->rxRingBufferHead + 1U == handle->rxRingBufferSize) {
                     handle->rxRingBufferHead = 0U;
                 }
-                else
-                {
+                else {
                     handle->rxRingBufferHead++;
                 }
             }
         }
         /* If no receive requst pending, stop RX interrupt. */
-        else if (!handle->rxDataSize)
-        {
+        else if (!handle->rxDataSize) {
             LPUART_DisableInterrupts(base, kLPUART_RxDataRegFullInterruptEnable | kLPUART_RxOverrunInterruptEnable);
         }
-        else
-        {
+        else {
         }
     }
 
     /* Send data register empty and the interrupt is enabled. */
-    if ((base->STAT & LPUART_STAT_TDRE_MASK) && (base->CTRL & LPUART_CTRL_TIE_MASK))
-    {
+    if ((base->STAT & LPUART_STAT_TDRE_MASK) && (base->CTRL & LPUART_CTRL_TIE_MASK)) {
 /* Get the bytes that available at this moment. */
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
         count = FSL_FEATURE_LPUART_FIFO_SIZEn(base) -
@@ -1209,8 +1117,7 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
         count = 1;
 #endif
 
-        while ((count) && (handle->txDataSize))
-        {
+        while ((count) && (handle->txDataSize)) {
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
             tempCount = MIN(handle->txDataSize, count);
 #else
@@ -1224,16 +1131,14 @@ void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle)
             count -= tempCount;
 
             /* If all the data are written to data register, notify user with the callback, then TX finished. */
-            if (!handle->txDataSize)
-            {
+            if (!handle->txDataSize) {
                 handle->txState = kLPUART_TxIdle;
 
                 /* Disable TX register empty interrupt. */
                 base->CTRL = (base->CTRL & ~LPUART_CTRL_TIE_MASK);
 
                 /* Trigger callback. */
-                if (handle->callback)
-                {
+                if (handle->callback) {
                     handle->callback(base, handle, kStatus_LPUART_TxIdle, handle->userData);
                 }
             }
@@ -1249,19 +1154,15 @@ void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, lpuart_handle_t *handle)
 #if defined(FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ) && FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ
 void LPUART0_LPUART1_RX_DriverIRQHandler(void)
 {
-    if (CLOCK_isEnabledClock(s_lpuartClock[0]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[0])) {
         if ((LPUART_STAT_OR_MASK & LPUART0->STAT) ||
-            ((LPUART_STAT_RDRF_MASK & LPUART0->STAT) && (LPUART_CTRL_RIE_MASK & LPUART0->CTRL)))
-        {
+            ((LPUART_STAT_RDRF_MASK & LPUART0->STAT) && (LPUART_CTRL_RIE_MASK & LPUART0->CTRL))) {
             s_lpuartIsr(LPUART0, s_lpuartHandle[0]);
         }
     }
-    if (CLOCK_isEnabledClock(s_lpuartClock[1]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[1])) {
         if ((LPUART_STAT_OR_MASK & LPUART1->STAT) ||
-            ((LPUART_STAT_RDRF_MASK & LPUART1->STAT) && (LPUART_CTRL_RIE_MASK & LPUART1->CTRL)))
-        {
+            ((LPUART_STAT_RDRF_MASK & LPUART1->STAT) && (LPUART_CTRL_RIE_MASK & LPUART1->CTRL))) {
             s_lpuartIsr(LPUART1, s_lpuartHandle[1]);
         }
     }
@@ -1273,19 +1174,15 @@ void LPUART0_LPUART1_RX_DriverIRQHandler(void)
 }
 void LPUART0_LPUART1_TX_DriverIRQHandler(void)
 {
-    if (CLOCK_isEnabledClock(s_lpuartClock[0]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[0])) {
         if ((LPUART_STAT_OR_MASK & LPUART0->STAT) ||
-            ((LPUART0->STAT & LPUART_STAT_TDRE_MASK) && (LPUART0->CTRL & LPUART_CTRL_TIE_MASK)))
-        {
+            ((LPUART0->STAT & LPUART_STAT_TDRE_MASK) && (LPUART0->CTRL & LPUART_CTRL_TIE_MASK))) {
             s_lpuartIsr(LPUART0, s_lpuartHandle[0]);
         }
     }
-    if (CLOCK_isEnabledClock(s_lpuartClock[1]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[1])) {
         if ((LPUART_STAT_OR_MASK & LPUART1->STAT) ||
-            ((LPUART1->STAT & LPUART_STAT_TDRE_MASK) && (LPUART1->CTRL & LPUART_CTRL_TIE_MASK)))
-        {
+            ((LPUART1->STAT & LPUART_STAT_TDRE_MASK) && (LPUART1->CTRL & LPUART_CTRL_TIE_MASK))) {
             s_lpuartIsr(LPUART1, s_lpuartHandle[1]);
         }
     }
@@ -1298,21 +1195,17 @@ void LPUART0_LPUART1_TX_DriverIRQHandler(void)
 #else
 void LPUART0_LPUART1_DriverIRQHandler(void)
 {
-    if (CLOCK_isEnabledClock(s_lpuartClock[0]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[0])) {
         if ((LPUART_STAT_OR_MASK & LPUART0->STAT) ||
             ((LPUART_STAT_RDRF_MASK & LPUART0->STAT) && (LPUART_CTRL_RIE_MASK & LPUART0->CTRL)) ||
-            ((LPUART0->STAT & LPUART_STAT_TDRE_MASK) && (LPUART0->CTRL & LPUART_CTRL_TIE_MASK)))
-        {
+            ((LPUART0->STAT & LPUART_STAT_TDRE_MASK) && (LPUART0->CTRL & LPUART_CTRL_TIE_MASK))) {
             s_lpuartIsr(LPUART0, s_lpuartHandle[0]);
         }
     }
-    if (CLOCK_isEnabledClock(s_lpuartClock[1]))
-    {
+    if (CLOCK_isEnabledClock(s_lpuartClock[1])) {
         if ((LPUART_STAT_OR_MASK & LPUART1->STAT) ||
             ((LPUART_STAT_RDRF_MASK & LPUART1->STAT) && (LPUART_CTRL_RIE_MASK & LPUART1->CTRL)) ||
-            ((LPUART1->STAT & LPUART_STAT_TDRE_MASK) && (LPUART1->CTRL & LPUART_CTRL_TIE_MASK)))
-        {
+            ((LPUART1->STAT & LPUART_STAT_TDRE_MASK) && (LPUART1->CTRL & LPUART_CTRL_TIE_MASK))) {
             s_lpuartIsr(LPUART1, s_lpuartHandle[1]);
         }
     }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.h
index 395c27a68..fbb99af08 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart.h
@@ -54,20 +54,20 @@
 /*! @brief Error codes for the LPUART driver. */
 enum _lpuart_status
 {
-    kStatus_LPUART_TxBusy = MAKE_STATUS(kStatusGroup_LPUART, 0),                  /*!< TX busy */
-    kStatus_LPUART_RxBusy = MAKE_STATUS(kStatusGroup_LPUART, 1),                  /*!< RX busy */
-    kStatus_LPUART_TxIdle = MAKE_STATUS(kStatusGroup_LPUART, 2),                  /*!< LPUART transmitter is idle. */
-    kStatus_LPUART_RxIdle = MAKE_STATUS(kStatusGroup_LPUART, 3),                  /*!< LPUART receiver is idle. */
-    kStatus_LPUART_TxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 4),     /*!< TX FIFO watermark too large  */
-    kStatus_LPUART_RxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 5),     /*!< RX FIFO watermark too large  */
+    kStatus_LPUART_TxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */
+    kStatus_LPUART_RxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */
+    kStatus_LPUART_TxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */
+    kStatus_LPUART_RxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */
+    kStatus_LPUART_TxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large  */
+    kStatus_LPUART_RxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large  */
     kStatus_LPUART_FlagCannotClearManually = MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */
-    kStatus_LPUART_Error = MAKE_STATUS(kStatusGroup_LPUART, 7),                   /*!< Error happens on LPUART. */
+    kStatus_LPUART_Error                   = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */
     kStatus_LPUART_RxRingBufferOverrun =
         MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */
-    kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9), /*!< LPUART RX receiver overrun. */
-    kStatus_LPUART_NoiseError = MAKE_STATUS(kStatusGroup_LPUART, 10),       /*!< LPUART noise error. */
-    kStatus_LPUART_FramingError = MAKE_STATUS(kStatusGroup_LPUART, 11),     /*!< LPUART framing error. */
-    kStatus_LPUART_ParityError = MAKE_STATUS(kStatusGroup_LPUART, 12),      /*!< LPUART parity error. */
+    kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9),  /*!< LPUART RX receiver overrun. */
+    kStatus_LPUART_NoiseError        = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */
+    kStatus_LPUART_FramingError      = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */
+    kStatus_LPUART_ParityError       = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */
     kStatus_LPUART_BaudrateNotSupport =
         MAKE_STATUS(kStatusGroup_LPUART, 13), /*!< Baudrate is not support in current clock source */
     kStatus_LPUART_IdleLineDetected = MAKE_STATUS(kStatusGroup_LPUART, 14), /*!< IDLE flag. */
@@ -77,8 +77,8 @@ enum _lpuart_status
 typedef enum _lpuart_parity_mode
 {
     kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */
-    kLPUART_ParityEven = 0x2U,     /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
-    kLPUART_ParityOdd = 0x3U,      /*!< Parity enabled, type odd,  bit setting: PE|PT = 11 */
+    kLPUART_ParityEven     = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
+    kLPUART_ParityOdd      = 0x3U, /*!< Parity enabled, type odd,  bit setting: PE|PT = 11 */
 } lpuart_parity_mode_t;
 
 /*! @brief LPUART data bits count. */
@@ -101,7 +101,7 @@ typedef enum _lpuart_stop_bit_count
 /*! @brief LPUART transmit CTS source. */
 typedef enum _lpuart_transmit_cts_source
 {
-    kLPUART_CtsSourcePin = 0U,         /*!< CTS resource is the LPUART_CTS pin. */
+    kLPUART_CtsSourcePin         = 0U, /*!< CTS resource is the LPUART_CTS pin. */
     kLPUART_CtsSourceMatchResult = 1U, /*!< CTS resource is the match result. */
 } lpuart_transmit_cts_source_t;
 
@@ -109,7 +109,7 @@ typedef enum _lpuart_transmit_cts_source
 typedef enum _lpuart_transmit_cts_config
 {
     kLPUART_CtsSampleAtStart = 0U, /*!< CTS input is sampled at the start of each character. */
-    kLPUART_CtsSampleAtIdle = 1U,  /*!< CTS input is sampled when the transmitter is idle */
+    kLPUART_CtsSampleAtIdle  = 1U, /*!< CTS input is sampled when the transmitter is idle */
 } lpuart_transmit_cts_config_t;
 #endif
 
@@ -117,7 +117,7 @@ typedef enum _lpuart_transmit_cts_config
 typedef enum _lpuart_idle_type_select
 {
     kLPUART_IdleTypeStartBit = 0U, /*!< Start counting after a valid start bit. */
-    kLPUART_IdleTypeStopBit = 1U,  /*!< Start conuting after a stop bit. */
+    kLPUART_IdleTypeStopBit  = 1U, /*!< Start conuting after a stop bit. */
 } lpuart_idle_type_select_t;
 
 /*! @brief LPUART idle detected configuration.
@@ -126,13 +126,13 @@ typedef enum _lpuart_idle_type_select
  */
 typedef enum _lpuart_idle_config
 {
-    kLPUART_IdleCharacter1 = 0U,   /*!< the number of idle characters. */
-    kLPUART_IdleCharacter2 = 1U,   /*!< the number of idle characters. */
-    kLPUART_IdleCharacter4 = 2U,   /*!< the number of idle characters. */
-    kLPUART_IdleCharacter8 = 3U,   /*!< the number of idle characters. */
-    kLPUART_IdleCharacter16 = 4U,  /*!< the number of idle characters. */
-    kLPUART_IdleCharacter32 = 5U,  /*!< the number of idle characters. */
-    kLPUART_IdleCharacter64 = 6U,  /*!< the number of idle characters. */
+    kLPUART_IdleCharacter1   = 0U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter2   = 1U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter4   = 2U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter8   = 3U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter16  = 4U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter32  = 5U, /*!< the number of idle characters. */
+    kLPUART_IdleCharacter64  = 6U, /*!< the number of idle characters. */
     kLPUART_IdleCharacter128 = 7U, /*!< the number of idle characters. */
 } lpuart_idle_config_t;
 
@@ -146,17 +146,17 @@ enum _lpuart_interrupt_enable
 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
     kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8), /*!< LIN break detect. */
 #endif
-    kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8), /*!< Receive Active Edge. */
-    kLPUART_TxDataRegEmptyInterruptEnable = (LPUART_CTRL_TIE_MASK),        /*!< Transmit data register empty. */
-    kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. */
-    kLPUART_RxDataRegFullInterruptEnable = (LPUART_CTRL_RIE_MASK),         /*!< Receiver data register full. */
-    kLPUART_IdleLineInterruptEnable = (LPUART_CTRL_ILIE_MASK),             /*!< Idle line. */
-    kLPUART_RxOverrunInterruptEnable = (LPUART_CTRL_ORIE_MASK),            /*!< Receiver Overrun. */
-    kLPUART_NoiseErrorInterruptEnable = (LPUART_CTRL_NEIE_MASK),           /*!< Noise error flag. */
-    kLPUART_FramingErrorInterruptEnable = (LPUART_CTRL_FEIE_MASK),         /*!< Framing error flag. */
-    kLPUART_ParityErrorInterruptEnable = (LPUART_CTRL_PEIE_MASK),          /*!< Parity error flag. */
+    kLPUART_RxActiveEdgeInterruptEnable         = (LPUART_BAUD_RXEDGIE_MASK >> 8), /*!< Receive Active Edge. */
+    kLPUART_TxDataRegEmptyInterruptEnable       = (LPUART_CTRL_TIE_MASK),          /*!< Transmit data register empty. */
+    kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK),         /*!< Transmission complete. */
+    kLPUART_RxDataRegFullInterruptEnable        = (LPUART_CTRL_RIE_MASK),          /*!< Receiver data register full. */
+    kLPUART_IdleLineInterruptEnable             = (LPUART_CTRL_ILIE_MASK),         /*!< Idle line. */
+    kLPUART_RxOverrunInterruptEnable            = (LPUART_CTRL_ORIE_MASK),         /*!< Receiver Overrun. */
+    kLPUART_NoiseErrorInterruptEnable           = (LPUART_CTRL_NEIE_MASK),         /*!< Noise error flag. */
+    kLPUART_FramingErrorInterruptEnable         = (LPUART_CTRL_FEIE_MASK),         /*!< Framing error flag. */
+    kLPUART_ParityErrorInterruptEnable          = (LPUART_CTRL_PEIE_MASK),         /*!< Parity error flag. */
 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
-    kLPUART_TxFifoOverflowInterruptEnable = (LPUART_FIFO_TXOFE_MASK >> 8),  /*!< Transmit FIFO Overflow. */
+    kLPUART_TxFifoOverflowInterruptEnable  = (LPUART_FIFO_TXOFE_MASK >> 8), /*!< Transmit FIFO Overflow. */
     kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK >> 8), /*!< Receive FIFO Underflow. */
 #endif
 };
@@ -174,11 +174,11 @@ enum _lpuart_flags
         (LPUART_STAT_TC_MASK), /*!< Transmission complete flag, sets when transmission activity complete */
     kLPUART_RxDataRegFullFlag =
         (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the receive data buffer is full */
-    kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected */
-    kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK),  /*!< Receive Overrun, sets when new data is received before data is
-                                                       read from receive register */
-    kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK), /*!< Receive takes 3 samples of each received bit.  If any of these
-                                                       samples differ, noise flag sets */
+    kLPUART_IdleLineFlag  = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected */
+    kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK),   /*!< Receive Overrun, sets when new data is received before data is
+                                                        read from receive register */
+    kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK),  /*!< Receive takes 3 samples of each received bit.  If any of these
+                                                        samples differ, noise flag sets */
     kLPUART_FramingErrorFlag =
         (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected */
     kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection */
@@ -280,596 +280,589 @@ struct _lpuart_handle
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* _cplusplus */
 
 #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
 
-/*!
- * @name Software Reset
- * @{
- */
+    /*!
+     * @name Software Reset
+     * @{
+     */
 
-/*!
- * @brief Resets the LPUART using software.
- *
- * This function resets all internal logic and registers except the Global Register.
- * Remains set until cleared by software.
- *
- * @param base LPUART peripheral base address.
- */
-static inline void LPUART_SoftwareReset(LPUART_Type *base)
-{
-    base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
-    base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
-}
+    /*!
+     * @brief Resets the LPUART using software.
+     *
+     * This function resets all internal logic and registers except the Global Register.
+     * Remains set until cleared by software.
+     *
+     * @param base LPUART peripheral base address.
+     */
+    static inline void LPUART_SoftwareReset(LPUART_Type *base)
+    {
+        base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
+        base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
+    }
 /* @} */
 #endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
- *
- * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function
- * to configure the configuration structure and get the default configuration.
- * The example below shows how to use this API to configure the LPUART.
- * @code
- *  lpuart_config_t lpuartConfig;
- *  lpuartConfig.baudRate_Bps = 115200U;
- *  lpuartConfig.parityMode = kLPUART_ParityDisabled;
- *  lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
- *  lpuartConfig.isMsb = false;
- *  lpuartConfig.stopBitCount = kLPUART_OneStopBit;
- *  lpuartConfig.txFifoWatermark = 0;
- *  lpuartConfig.rxFifoWatermark = 1;
- *  LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @param config Pointer to a user-defined configuration structure.
- * @param srcClock_Hz LPUART clock source frequency in HZ.
- * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
- * @retval kStatus_Success LPUART initialize succeed
- */
-status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
+    /*!
+     * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
+     *
+     * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig()
+     * function to configure the configuration structure and get the default configuration. The example below shows how
+     * to use this API to configure the LPUART.
+     * @code
+     *  lpuart_config_t lpuartConfig;
+     *  lpuartConfig.baudRate_Bps = 115200U;
+     *  lpuartConfig.parityMode = kLPUART_ParityDisabled;
+     *  lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
+     *  lpuartConfig.isMsb = false;
+     *  lpuartConfig.stopBitCount = kLPUART_OneStopBit;
+     *  lpuartConfig.txFifoWatermark = 0;
+     *  lpuartConfig.rxFifoWatermark = 1;
+     *  LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @param config Pointer to a user-defined configuration structure.
+     * @param srcClock_Hz LPUART clock source frequency in HZ.
+     * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
+     * @retval kStatus_Success LPUART initialize succeed
+     */
+    status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
 
-/*!
- * @brief Deinitializes a LPUART instance.
- *
- * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
- *
- * @param base LPUART peripheral base address.
- */
-void LPUART_Deinit(LPUART_Type *base);
+    /*!
+     * @brief Deinitializes a LPUART instance.
+     *
+     * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
+     *
+     * @param base LPUART peripheral base address.
+     */
+    void LPUART_Deinit(LPUART_Type *base);
 
-/*!
- * @brief Gets the default configuration structure.
- *
- * This function initializes the LPUART configuration structure to a default value. The default
- * values are:
- *   lpuartConfig->baudRate_Bps = 115200U;
- *   lpuartConfig->parityMode = kLPUART_ParityDisabled;
- *   lpuartConfig->dataBitsCount = kLPUART_EightDataBits;
- *   lpuartConfig->isMsb = false;
- *   lpuartConfig->stopBitCount = kLPUART_OneStopBit;
- *   lpuartConfig->txFifoWatermark = 0;
- *   lpuartConfig->rxFifoWatermark = 1;
- *   lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit;
- *   lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1;
- *   lpuartConfig->enableTx = false;
- *   lpuartConfig->enableRx = false;
- *
- * @param config Pointer to a configuration structure.
- */
-void LPUART_GetDefaultConfig(lpuart_config_t *config);
+    /*!
+     * @brief Gets the default configuration structure.
+     *
+     * This function initializes the LPUART configuration structure to a default value. The default
+     * values are:
+     *   lpuartConfig->baudRate_Bps = 115200U;
+     *   lpuartConfig->parityMode = kLPUART_ParityDisabled;
+     *   lpuartConfig->dataBitsCount = kLPUART_EightDataBits;
+     *   lpuartConfig->isMsb = false;
+     *   lpuartConfig->stopBitCount = kLPUART_OneStopBit;
+     *   lpuartConfig->txFifoWatermark = 0;
+     *   lpuartConfig->rxFifoWatermark = 1;
+     *   lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit;
+     *   lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1;
+     *   lpuartConfig->enableTx = false;
+     *   lpuartConfig->enableRx = false;
+     *
+     * @param config Pointer to a configuration structure.
+     */
+    void LPUART_GetDefaultConfig(lpuart_config_t *config);
 
-/*!
- * @brief Sets the LPUART instance baudrate.
- *
- * This function configures the LPUART module baudrate. This function is used to update
- * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
- * @code
- *  LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @param baudRate_Bps LPUART baudrate to be set.
- * @param srcClock_Hz LPUART clock source frequency in HZ.
- * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source.
- * @retval kStatus_Success Set baudrate succeeded.
- */
-status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
+    /*!
+     * @brief Sets the LPUART instance baudrate.
+     *
+     * This function configures the LPUART module baudrate. This function is used to update
+     * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
+     * @code
+     *  LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @param baudRate_Bps LPUART baudrate to be set.
+     * @param srcClock_Hz LPUART clock source frequency in HZ.
+     * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source.
+     * @retval kStatus_Success Set baudrate succeeded.
+     */
+    status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Status
- * @{
- */
+    /*!
+     * @name Status
+     * @{
+     */
 
-/*!
- * @brief Gets LPUART status flags.
- *
- * This function gets all LPUART status flags. The flags are returned as the logical
- * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
- * compare the return value with enumerators in the @ref _lpuart_flags.
- * For example, to check whether the TX is empty:
- * @code
- *     if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
- *     {
- *         ...
- *     }
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
- */
-uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
+    /*!
+     * @brief Gets LPUART status flags.
+     *
+     * This function gets all LPUART status flags. The flags are returned as the logical
+     * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
+     * compare the return value with enumerators in the @ref _lpuart_flags.
+     * For example, to check whether the TX is empty:
+     * @code
+     *     if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
+     *     {
+     *         ...
+     *     }
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
+     */
+    uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
 
-/*!
- * @brief Clears status flags with a provided mask.
- *
- * This function clears LPUART status flags with a provided mask. Automatically cleared flags
- * can't be cleared by this function.
- * Flags that can only cleared or set by hardware are:
- *    kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
- *    kLPUART_RxActiveFlag, kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
- *    kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
- * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
- *
- * @param base LPUART peripheral base address.
- * @param mask the status flags to be cleared. The user can use the enumerators in the
- *  _lpuart_status_flag_t to do the OR operation and get the mask.
- * @return 0 succeed, others failed.
- * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
- *         it is cleared automatically by hardware.
- * @retval kStatus_Success Status in the mask are cleared.
- */
-status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
+    /*!
+     * @brief Clears status flags with a provided mask.
+     *
+     * This function clears LPUART status flags with a provided mask. Automatically cleared flags
+     * can't be cleared by this function.
+     * Flags that can only cleared or set by hardware are:
+     *    kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
+     *    kLPUART_RxActiveFlag, kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
+     *    kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
+     * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
+     *
+     * @param base LPUART peripheral base address.
+     * @param mask the status flags to be cleared. The user can use the enumerators in the
+     *  _lpuart_status_flag_t to do the OR operation and get the mask.
+     * @return 0 succeed, others failed.
+     * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
+     *         it is cleared automatically by hardware.
+     * @retval kStatus_Success Status in the mask are cleared.
+     */
+    status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Interrupts
- * @{
- */
+    /*!
+     * @name Interrupts
+     * @{
+     */
 
-/*!
- * @brief Enables LPUART interrupts according to a provided mask.
- *
- * This function enables the LPUART interrupts according to a provided mask. The mask
- * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
- * This examples shows how to enable TX empty interrupt and RX full interrupt:
- * @code
- *     LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @param mask The interrupts to enable. Logical OR of @ref _uart_interrupt_enable.
- */
-void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
+    /*!
+     * @brief Enables LPUART interrupts according to a provided mask.
+     *
+     * This function enables the LPUART interrupts according to a provided mask. The mask
+     * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
+     * This examples shows how to enable TX empty interrupt and RX full interrupt:
+     * @code
+     *     LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable |
+     * kLPUART_RxDataRegFullInterruptEnable);
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @param mask The interrupts to enable. Logical OR of @ref _uart_interrupt_enable.
+     */
+    void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
 
-/*!
- * @brief Disables  LPUART interrupts according to a provided mask.
- *
- * This function disables the LPUART interrupts according to a provided mask. The mask
- * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
- * This example shows how to disable the TX empty interrupt and RX full interrupt:
- * @code
- *     LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
- */
-void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
+    /*!
+     * @brief Disables  LPUART interrupts according to a provided mask.
+     *
+     * This function disables the LPUART interrupts according to a provided mask. The mask
+     * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
+     * This example shows how to disable the TX empty interrupt and RX full interrupt:
+     * @code
+     *     LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable |
+     * kLPUART_RxDataRegFullInterruptEnable);
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
+     */
+    void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
 
-/*!
- * @brief Gets enabled LPUART interrupts.
- *
- * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
- * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
- * a specific interrupt enable status, compare the return value with enumerators
- * in @ref _lpuart_interrupt_enable.
- * For example, to check whether the TX empty interrupt is enabled:
- * @code
- *     uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
- *
- *     if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
- *     {
- *         ...
- *     }
- * @endcode
- *
- * @param base LPUART peripheral base address.
- * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
- */
-uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
+    /*!
+     * @brief Gets enabled LPUART interrupts.
+     *
+     * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
+     * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
+     * a specific interrupt enable status, compare the return value with enumerators
+     * in @ref _lpuart_interrupt_enable.
+     * For example, to check whether the TX empty interrupt is enabled:
+     * @code
+     *     uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
+     *
+     *     if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
+     *     {
+     *         ...
+     *     }
+     * @endcode
+     *
+     * @param base LPUART peripheral base address.
+     * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
+     */
+    uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
 
 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
-/*!
- * @brief Gets the LPUART data register address.
- *
- * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
- *
- * @param base LPUART peripheral base address.
- * @return LPUART data register addresses which are used both by the transmitter and receiver.
- */
-static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
-{
-    return (uint32_t) & (base->DATA);
-}
+    /*!
+     * @brief Gets the LPUART data register address.
+     *
+     * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
+     *
+     * @param base LPUART peripheral base address.
+     * @return LPUART data register addresses which are used both by the transmitter and receiver.
+     */
+    static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
+    {
+        return (uint32_t) & (base->DATA);
+    }
 
-/*!
- * @brief Enables or disables the LPUART transmitter DMA request.
- *
- * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
- *
- * @param base LPUART peripheral base address.
- * @param enable True to enable, false to disable.
- */
-static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables or disables the LPUART transmitter DMA request.
+     *
+     * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
+     *
+     * @param base LPUART peripheral base address.
+     * @param enable True to enable, false to disable.
+     */
+    static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
     {
-        base->BAUD |= LPUART_BAUD_TDMAE_MASK;
+        if (enable) {
+            base->BAUD |= LPUART_BAUD_TDMAE_MASK;
+        }
+        else {
+            base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
+        }
     }
-    else
-    {
-        base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
-    }
-}
 
-/*!
- * @brief Enables or disables the LPUART receiver DMA.
- *
- * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
- *
- * @param base LPUART peripheral base address.
- * @param enable True to enable, false to disable.
- */
-static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables or disables the LPUART receiver DMA.
+     *
+     * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
+     *
+     * @param base LPUART peripheral base address.
+     * @param enable True to enable, false to disable.
+     */
+    static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
     {
-        base->BAUD |= LPUART_BAUD_RDMAE_MASK;
+        if (enable) {
+            base->BAUD |= LPUART_BAUD_RDMAE_MASK;
+        }
+        else {
+            base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
+        }
     }
-    else
-    {
-        base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
-    }
-}
 
 /* @} */
 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
 
-/*!
- * @name Bus Operations
- * @{
- */
+    /*!
+     * @name Bus Operations
+     * @{
+     */
 
-/*!
- * @brief Get the LPUART instance from peripheral base address.
- *
- * @param base LPUART peripheral base address.
- * @return LPUART instance.
- */
-uint32_t LPUART_GetInstance(LPUART_Type *base);
+    /*!
+     * @brief Get the LPUART instance from peripheral base address.
+     *
+     * @param base LPUART peripheral base address.
+     * @return LPUART instance.
+     */
+    uint32_t LPUART_GetInstance(LPUART_Type *base);
 
-/*!
- * @brief Enables or disables the LPUART transmitter.
- *
- * This function enables or disables the LPUART transmitter.
- *
- * @param base LPUART peripheral base address.
- * @param enable True to enable, false to disable.
- */
-static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables or disables the LPUART transmitter.
+     *
+     * This function enables or disables the LPUART transmitter.
+     *
+     * @param base LPUART peripheral base address.
+     * @param enable True to enable, false to disable.
+     */
+    static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
     {
-        base->CTRL |= LPUART_CTRL_TE_MASK;
+        if (enable) {
+            base->CTRL |= LPUART_CTRL_TE_MASK;
+        }
+        else {
+            base->CTRL &= ~LPUART_CTRL_TE_MASK;
+        }
     }
-    else
-    {
-        base->CTRL &= ~LPUART_CTRL_TE_MASK;
-    }
-}
 
-/*!
- * @brief Enables or disables the LPUART receiver.
- *
- * This function enables or disables the LPUART receiver.
- *
- * @param base LPUART peripheral base address.
- * @param enable True to enable, false to disable.
- */
-static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables or disables the LPUART receiver.
+     *
+     * This function enables or disables the LPUART receiver.
+     *
+     * @param base LPUART peripheral base address.
+     * @param enable True to enable, false to disable.
+     */
+    static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
     {
-        base->CTRL |= LPUART_CTRL_RE_MASK;
+        if (enable) {
+            base->CTRL |= LPUART_CTRL_RE_MASK;
+        }
+        else {
+            base->CTRL &= ~LPUART_CTRL_RE_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Writes to the transmitter register.
+     *
+     * This function writes data to the transmitter register directly. The upper layer must
+     * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
+     *
+     * @param base LPUART peripheral base address.
+     * @param data Data write to the TX register.
+     */
+    static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
     {
-        base->CTRL &= ~LPUART_CTRL_RE_MASK;
+        base->DATA = data;
     }
-}
 
-/*!
- * @brief Writes to the transmitter register.
- *
- * This function writes data to the transmitter register directly. The upper layer must
- * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
- *
- * @param base LPUART peripheral base address.
- * @param data Data write to the TX register.
- */
-static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
-{
-    base->DATA = data;
-}
-
-/*!
- * @brief Reads the receiver register.
- *
- * This function reads data from the receiver register directly. The upper layer must
- * ensure that the receiver register is full or that the RX FIFO has data before calling this function.
- *
- * @param base LPUART peripheral base address.
- * @return Data read from data register.
- */
-static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
-{
+    /*!
+     * @brief Reads the receiver register.
+     *
+     * This function reads data from the receiver register directly. The upper layer must
+     * ensure that the receiver register is full or that the RX FIFO has data before calling this function.
+     *
+     * @param base LPUART peripheral base address.
+     * @return Data read from data register.
+     */
+    static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
+    {
 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
-    uint32_t ctrl = base->CTRL;
-    bool isSevenDataBits =
-        ((ctrl & LPUART_CTRL_M7_MASK) ||
-         ((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
+        uint32_t ctrl = base->CTRL;
+        bool isSevenDataBits =
+            ((ctrl & LPUART_CTRL_M7_MASK) ||
+             ((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
 
-    if (isSevenDataBits)
-    {
-        return (base->DATA & 0x7F);
-    }
-    else
-    {
-        return base->DATA;
-    }
+        if (isSevenDataBits) {
+            return (base->DATA & 0x7F);
+        }
+        else {
+            return base->DATA;
+        }
 #else
     return base->DATA;
 #endif
-}
+    }
 
-/*!
- * @brief Writes to the transmitter register using a blocking method.
- *
- * This function polls the transmitter register, waits for the register to be empty or  for TX FIFO to have
- * room, and writes data to the transmitter buffer.
- *
- * @note This function does not check whether all data has been sent out to the bus.
- * Before disabling the transmitter, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is
- * finished.
- *
- * @param base LPUART peripheral base address.
- * @param data Start address of the data to write.
- * @param length Size of the data to write.
- */
-void LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
+    /*!
+     * @brief Writes to the transmitter register using a blocking method.
+     *
+     * This function polls the transmitter register, waits for the register to be empty or  for TX FIFO to have
+     * room, and writes data to the transmitter buffer.
+     *
+     * @note This function does not check whether all data has been sent out to the bus.
+     * Before disabling the transmitter, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is
+     * finished.
+     *
+     * @param base LPUART peripheral base address.
+     * @param data Start address of the data to write.
+     * @param length Size of the data to write.
+     */
+    void LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
 
-/*!
-* @brief Reads the receiver data register using a blocking method.
- *
- * This function polls the receiver register, waits for the receiver register full or receiver FIFO
- * has data, and reads data from the TX register.
- *
- * @param base LPUART peripheral base address.
- * @param data Start address of the buffer to store the received data.
- * @param length Size of the buffer.
- * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
- * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
- * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
- * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
- * @retval kStatus_Success Successfully received all data.
- */
-status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
+    /*!
+     * @brief Reads the receiver data register using a blocking method.
+     *
+     * This function polls the receiver register, waits for the receiver register full or receiver FIFO
+     * has data, and reads data from the TX register.
+     *
+     * @param base LPUART peripheral base address.
+     * @param data Start address of the buffer to store the received data.
+     * @param length Size of the buffer.
+     * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
+     * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
+     * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
+     * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
+     * @retval kStatus_Success Successfully received all data.
+     */
+    status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Transactional
- * @{
- */
+    /*!
+     * @name Transactional
+     * @{
+     */
 
-/*!
- * @brief Initializes the LPUART handle.
- *
- * This function initializes the LPUART handle, which can be used for other LPUART
- * transactional APIs. Usually, for a specified LPUART instance,
- * call this API once to get the initialized handle.
- *
- * The LPUART driver supports the "background" receiving, which means that user can set up
- * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
- * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
- * in the ring buffer, the user can get the received data from the ring buffer directly.
- * The ring buffer is disabled if passing NULL as @p ringBuffer.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param callback Callback function.
- * @param userData User data.
- */
-void LPUART_TransferCreateHandle(LPUART_Type *base,
-                                 lpuart_handle_t *handle,
-                                 lpuart_transfer_callback_t callback,
-                                 void *userData);
-/*!
- * @brief Transmits a buffer of data using the interrupt method.
- *
- * This function send data using an interrupt method. This is a non-blocking function, which
- * returns directly without waiting for all data written to the transmitter register. When
- * all data is written to the TX register in the ISR, the LPUART driver calls the callback
- * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
- *
- * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
- * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
- * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param xfer LPUART transfer structure, see #lpuart_transfer_t.
- * @retval kStatus_Success Successfully start the data transmission.
- * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
- * @retval kStatus_InvalidArgument Invalid argument.
- */
-status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
+    /*!
+     * @brief Initializes the LPUART handle.
+     *
+     * This function initializes the LPUART handle, which can be used for other LPUART
+     * transactional APIs. Usually, for a specified LPUART instance,
+     * call this API once to get the initialized handle.
+     *
+     * The LPUART driver supports the "background" receiving, which means that user can set up
+     * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
+     * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
+     * in the ring buffer, the user can get the received data from the ring buffer directly.
+     * The ring buffer is disabled if passing NULL as @p ringBuffer.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param callback Callback function.
+     * @param userData User data.
+     */
+    void LPUART_TransferCreateHandle(LPUART_Type *base,
+                                     lpuart_handle_t *handle,
+                                     lpuart_transfer_callback_t callback,
+                                     void *userData);
+    /*!
+     * @brief Transmits a buffer of data using the interrupt method.
+     *
+     * This function send data using an interrupt method. This is a non-blocking function, which
+     * returns directly without waiting for all data written to the transmitter register. When
+     * all data is written to the TX register in the ISR, the LPUART driver calls the callback
+     * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
+     *
+     * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
+     * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
+     * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param xfer LPUART transfer structure, see #lpuart_transfer_t.
+     * @retval kStatus_Success Successfully start the data transmission.
+     * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     */
+    status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
 
-/*!
- * @brief Sets up the RX ring buffer.
- *
- * This function sets up the RX ring buffer to a specific UART handle.
- *
- * When the RX ring buffer is used, data received is stored into the ring buffer even when
- * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
- * in the ring buffer, the user can get the received data from the ring buffer directly.
- *
- * @note When using RX ring buffer, one byte is reserved for internal use. In other
- * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
- * @param ringBufferSize size of the ring buffer.
- */
-void LPUART_TransferStartRingBuffer(LPUART_Type *base,
-                                    lpuart_handle_t *handle,
-                                    uint8_t *ringBuffer,
-                                    size_t ringBufferSize);
+    /*!
+     * @brief Sets up the RX ring buffer.
+     *
+     * This function sets up the RX ring buffer to a specific UART handle.
+     *
+     * When the RX ring buffer is used, data received is stored into the ring buffer even when
+     * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
+     * in the ring buffer, the user can get the received data from the ring buffer directly.
+     *
+     * @note When using RX ring buffer, one byte is reserved for internal use. In other
+     * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
+     * @param ringBufferSize size of the ring buffer.
+     */
+    void LPUART_TransferStartRingBuffer(LPUART_Type *base,
+                                        lpuart_handle_t *handle,
+                                        uint8_t *ringBuffer,
+                                        size_t ringBufferSize);
 
-/*!
- * @brief Aborts the background transfer and uninstalls the ring buffer.
- *
- * This function aborts the background transfer and uninstalls the ring buffer.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- */
-void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief Aborts the background transfer and uninstalls the ring buffer.
+     *
+     * This function aborts the background transfer and uninstalls the ring buffer.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     */
+    void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
 
-/*!
- * @brief Get the length of received data in RX ring buffer.
- *
- * @userData handle LPUART handle pointer.
- * @return Length of received data in RX ring buffer.
- */
-size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief Get the length of received data in RX ring buffer.
+     *
+     * @userData handle LPUART handle pointer.
+     * @return Length of received data in RX ring buffer.
+     */
+    size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle);
 
-/*!
- * @brief Aborts the interrupt-driven data transmit.
- *
- * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
- * how many bytes are not sent out.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- */
-void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief Aborts the interrupt-driven data transmit.
+     *
+     * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
+     * how many bytes are not sent out.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     */
+    void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
 
-/*!
- * @brief Gets the number of bytes that have been written to the LPUART transmitter register.
- *
- * This function gets the number of bytes that have been written to LPUART TX
- * register by an interrupt method.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param count Send bytes count.
- * @retval kStatus_NoTransferInProgress No send in progress.
- * @retval kStatus_InvalidArgument Parameter is invalid.
- * @retval kStatus_Success Get successfully through the parameter \p count;
- */
-status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
+    /*!
+     * @brief Gets the number of bytes that have been written to the LPUART transmitter register.
+     *
+     * This function gets the number of bytes that have been written to LPUART TX
+     * register by an interrupt method.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param count Send bytes count.
+     * @retval kStatus_NoTransferInProgress No send in progress.
+     * @retval kStatus_InvalidArgument Parameter is invalid.
+     * @retval kStatus_Success Get successfully through the parameter \p count;
+     */
+    status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
 
-/*!
- * @brief Receives a buffer of data using the interrupt method.
- *
- * This function receives data using an interrupt method. This is a non-blocking function
- * which returns without waiting to ensure that all data are received.
- * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
- * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
- * After copying, if the data in the ring buffer is not enough for read, the receive
- * request is saved by the LPUART driver. When the new data arrives, the receive request
- * is serviced first. When all data is received, the LPUART driver notifies the upper layer
- * through a callback function and passes a status parameter @ref kStatus_UART_RxIdle.
- * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
- * The 5 bytes are copied to xfer->data, which returns with the
- * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
- * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
- * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
- * to receive data to xfer->data. When all data is received, the upper layer is notified.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param xfer LPUART transfer structure, see #uart_transfer_t.
- * @param receivedBytes Bytes received from the ring buffer directly.
- * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
- * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
- * @retval kStatus_InvalidArgument Invalid argument.
- */
-status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
-                                           lpuart_handle_t *handle,
-                                           lpuart_transfer_t *xfer,
-                                           size_t *receivedBytes);
+    /*!
+     * @brief Receives a buffer of data using the interrupt method.
+     *
+     * This function receives data using an interrupt method. This is a non-blocking function
+     * which returns without waiting to ensure that all data are received.
+     * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
+     * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
+     * After copying, if the data in the ring buffer is not enough for read, the receive
+     * request is saved by the LPUART driver. When the new data arrives, the receive request
+     * is serviced first. When all data is received, the LPUART driver notifies the upper layer
+     * through a callback function and passes a status parameter @ref kStatus_UART_RxIdle.
+     * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
+     * The 5 bytes are copied to xfer->data, which returns with the
+     * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
+     * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
+     * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
+     * to receive data to xfer->data. When all data is received, the upper layer is notified.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param xfer LPUART transfer structure, see #uart_transfer_t.
+     * @param receivedBytes Bytes received from the ring buffer directly.
+     * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
+     * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     */
+    status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
+                                               lpuart_handle_t *handle,
+                                               lpuart_transfer_t *xfer,
+                                               size_t *receivedBytes);
 
-/*!
- * @brief Aborts the interrupt-driven data receiving.
- *
- * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
- * how many bytes not received yet.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- */
-void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief Aborts the interrupt-driven data receiving.
+     *
+     * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
+     * how many bytes not received yet.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     */
+    void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
 
-/*!
- * @brief Gets the number of bytes that have been received.
- *
- * This function gets the number of bytes that have been received.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param count Receive bytes count.
- * @retval kStatus_NoTransferInProgress No receive in progress.
- * @retval kStatus_InvalidArgument Parameter is invalid.
- * @retval kStatus_Success Get successfully through the parameter \p count;
- */
-status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
+    /*!
+     * @brief Gets the number of bytes that have been received.
+     *
+     * This function gets the number of bytes that have been received.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param count Receive bytes count.
+     * @retval kStatus_NoTransferInProgress No receive in progress.
+     * @retval kStatus_InvalidArgument Parameter is invalid.
+     * @retval kStatus_Success Get successfully through the parameter \p count;
+     */
+    status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
 
-/*!
- * @brief LPUART IRQ handle function.
- *
- * This function handles the LPUART transmit and receive IRQ request.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- */
-void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief LPUART IRQ handle function.
+     *
+     * This function handles the LPUART transmit and receive IRQ request.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     */
+    void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle);
 
-/*!
- * @brief LPUART Error IRQ handle function.
- *
- * This function handles the LPUART error IRQ request.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- */
-void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, lpuart_handle_t *handle);
+    /*!
+     * @brief LPUART Error IRQ handle function.
+     *
+     * This function handles the LPUART error IRQ request.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     */
+    void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, lpuart_handle_t *handle);
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.c
index add948817..6bef9f422 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.c
@@ -143,16 +143,16 @@ static void LPUART_SendEDMACallback(edma_handle_t *handle, void *param, bool tra
 
     /* Avoid the warning for unused variables. */
     handle = handle;
-    tcds = tcds;
+    tcds   = tcds;
 
-    if (transferDone)
-    {
+    if (transferDone) {
         LPUART_TransferAbortSendEDMA(lpuartPrivateHandle->base, lpuartPrivateHandle->handle);
 
-        if (lpuartPrivateHandle->handle->callback)
-        {
-            lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base, lpuartPrivateHandle->handle,
-                                                  kStatus_LPUART_TxIdle, lpuartPrivateHandle->handle->userData);
+        if (lpuartPrivateHandle->handle->callback) {
+            lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base,
+                                                  lpuartPrivateHandle->handle,
+                                                  kStatus_LPUART_TxIdle,
+                                                  lpuartPrivateHandle->handle->userData);
         }
     }
 }
@@ -165,17 +165,17 @@ static void LPUART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool
 
     /* Avoid warning for unused parameters. */
     handle = handle;
-    tcds = tcds;
+    tcds   = tcds;
 
-    if (transferDone)
-    {
+    if (transferDone) {
         /* Disable transfer. */
         LPUART_TransferAbortReceiveEDMA(lpuartPrivateHandle->base, lpuartPrivateHandle->handle);
 
-        if (lpuartPrivateHandle->handle->callback)
-        {
-            lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base, lpuartPrivateHandle->handle,
-                                                  kStatus_LPUART_RxIdle, lpuartPrivateHandle->handle->userData);
+        if (lpuartPrivateHandle->handle->callback) {
+            lpuartPrivateHandle->handle->callback(lpuartPrivateHandle->base,
+                                                  lpuartPrivateHandle->handle,
+                                                  kStatus_LPUART_RxIdle,
+                                                  lpuartPrivateHandle->handle->userData);
         }
     }
 }
@@ -191,7 +191,7 @@ void LPUART_TransferCreateHandleEDMA(LPUART_Type *base,
 
     uint32_t instance = LPUART_GetInstance(base);
 
-    s_edmaPrivateHandle[instance].base = base;
+    s_edmaPrivateHandle[instance].base   = base;
     s_edmaPrivateHandle[instance].handle = handle;
 
     memset(handle, 0, sizeof(*handle));
@@ -214,21 +214,18 @@ void LPUART_TransferCreateHandleEDMA(LPUART_Type *base,
        5 bytes are received. the last byte will be saved in FIFO but not trigger
        EDMA transfer because the water mark is 2.
      */
-    if (rxEdmaHandle)
-    {
+    if (rxEdmaHandle) {
         base->WATER &= (~LPUART_WATER_RXWATER_MASK);
     }
 #endif
 
     /* Configure TX. */
-    if (txEdmaHandle)
-    {
+    if (txEdmaHandle) {
         EDMA_SetCallback(handle->txEdmaHandle, LPUART_SendEDMACallback, &s_edmaPrivateHandle[instance]);
     }
 
     /* Configure RX. */
-    if (rxEdmaHandle)
-    {
+    if (rxEdmaHandle) {
         EDMA_SetCallback(handle->rxEdmaHandle, LPUART_ReceiveEDMACallback, &s_edmaPrivateHandle[instance]);
     }
 }
@@ -245,18 +242,22 @@ status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart
     status_t status;
 
     /* If previous TX not finished. */
-    if (kLPUART_TxBusy == handle->txState)
-    {
+    if (kLPUART_TxBusy == handle->txState) {
         status = kStatus_LPUART_TxBusy;
     }
-    else
-    {
-        handle->txState = kLPUART_TxBusy;
+    else {
+        handle->txState       = kLPUART_TxBusy;
         handle->txDataSizeAll = xfer->dataSize;
 
         /* Prepare transfer. */
-        EDMA_PrepareTransfer(&xferConfig, xfer->data, sizeof(uint8_t), (void *)LPUART_GetDataRegisterAddress(base),
-                             sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_MemoryToPeripheral);
+        EDMA_PrepareTransfer(&xferConfig,
+                             xfer->data,
+                             sizeof(uint8_t),
+                             (void *)LPUART_GetDataRegisterAddress(base),
+                             sizeof(uint8_t),
+                             sizeof(uint8_t),
+                             xfer->dataSize,
+                             kEDMA_MemoryToPeripheral);
 
         /* Store the initially configured eDMA minor byte transfer count into the LPUART handle */
         handle->nbytes = sizeof(uint8_t);
@@ -286,18 +287,22 @@ status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpu
     status_t status;
 
     /* If previous RX not finished. */
-    if (kLPUART_RxBusy == handle->rxState)
-    {
+    if (kLPUART_RxBusy == handle->rxState) {
         status = kStatus_LPUART_RxBusy;
     }
-    else
-    {
-        handle->rxState = kLPUART_RxBusy;
+    else {
+        handle->rxState       = kLPUART_RxBusy;
         handle->rxDataSizeAll = xfer->dataSize;
 
         /* Prepare transfer. */
-        EDMA_PrepareTransfer(&xferConfig, (void *)LPUART_GetDataRegisterAddress(base), sizeof(uint8_t), xfer->data,
-                             sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_PeripheralToMemory);
+        EDMA_PrepareTransfer(&xferConfig,
+                             (void *)LPUART_GetDataRegisterAddress(base),
+                             sizeof(uint8_t),
+                             xfer->data,
+                             sizeof(uint8_t),
+                             sizeof(uint8_t),
+                             xfer->dataSize,
+                             kEDMA_PeripheralToMemory);
 
         /* Store the initially configured eDMA minor byte transfer count into the LPUART handle */
         handle->nbytes = sizeof(uint8_t);
@@ -349,8 +354,7 @@ status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handl
     assert(handle->rxEdmaHandle);
     assert(count);
 
-    if (kLPUART_RxIdle == handle->rxState)
-    {
+    if (kLPUART_RxIdle == handle->rxState) {
         return kStatus_NoTransferInProgress;
     }
 
@@ -367,8 +371,7 @@ status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t
     assert(handle->txEdmaHandle);
     assert(count);
 
-    if (kLPUART_TxIdle == handle->txState)
-    {
+    if (kLPUART_TxIdle == handle->txState) {
         return kStatus_NoTransferInProgress;
     }
 
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.h
index a6f240147..8da5df6e9 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_lpuart_edma.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -62,8 +62,8 @@ typedef void (*lpuart_edma_transfer_callback_t)(LPUART_Type *base,
                                                 void *userData);
 
 /*!
-* @brief LPUART eDMA handle
-*/
+ * @brief LPUART eDMA handle
+ */
 struct _lpuart_edma_handle
 {
     lpuart_edma_transfer_callback_t callback; /*!< Callback function. */
@@ -85,110 +85,111 @@ struct _lpuart_edma_handle
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name eDMA transactional
- * @{
- */
+    /*!
+     * @name eDMA transactional
+     * @{
+     */
 
-/*!
- * @brief Initializes the LPUART handle which is used in transactional functions.
- * @param base LPUART peripheral base address.
- * @param handle Pointer to lpuart_edma_handle_t structure.
- * @param callback Callback function.
- * @param userData User data.
- * @param txEdmaHandle User requested DMA handle for TX DMA transfer.
- * @param rxEdmaHandle User requested DMA handle for RX DMA transfer.
- */
-void LPUART_TransferCreateHandleEDMA(LPUART_Type *base,
-                                     lpuart_edma_handle_t *handle,
-                                     lpuart_edma_transfer_callback_t callback,
-                                     void *userData,
-                                     edma_handle_t *txEdmaHandle,
-                                     edma_handle_t *rxEdmaHandle);
+    /*!
+     * @brief Initializes the LPUART handle which is used in transactional functions.
+     * @param base LPUART peripheral base address.
+     * @param handle Pointer to lpuart_edma_handle_t structure.
+     * @param callback Callback function.
+     * @param userData User data.
+     * @param txEdmaHandle User requested DMA handle for TX DMA transfer.
+     * @param rxEdmaHandle User requested DMA handle for RX DMA transfer.
+     */
+    void LPUART_TransferCreateHandleEDMA(LPUART_Type *base,
+                                         lpuart_edma_handle_t *handle,
+                                         lpuart_edma_transfer_callback_t callback,
+                                         void *userData,
+                                         edma_handle_t *txEdmaHandle,
+                                         edma_handle_t *rxEdmaHandle);
 
-/*!
- * @brief Sends data using eDMA.
- *
- * This function sends data using eDMA. This is a non-blocking function, which returns
- * right away. When all data is sent, the send callback function is called.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param xfer LPUART eDMA transfer structure. See #lpuart_transfer_t.
- * @retval kStatus_Success if succeed, others failed.
- * @retval kStatus_LPUART_TxBusy Previous transfer on going.
- * @retval kStatus_InvalidArgument Invalid argument.
- */
-status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer);
+    /*!
+     * @brief Sends data using eDMA.
+     *
+     * This function sends data using eDMA. This is a non-blocking function, which returns
+     * right away. When all data is sent, the send callback function is called.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param xfer LPUART eDMA transfer structure. See #lpuart_transfer_t.
+     * @retval kStatus_Success if succeed, others failed.
+     * @retval kStatus_LPUART_TxBusy Previous transfer on going.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     */
+    status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer);
 
-/*!
- * @brief Receives data using eDMA.
- *
- * This function receives data using eDMA. This is non-blocking function, which returns
- * right away. When all data is received, the receive callback function is called.
- *
- * @param base LPUART peripheral base address.
- * @param handle Pointer to lpuart_edma_handle_t structure.
- * @param xfer LPUART eDMA transfer structure, see #lpuart_transfer_t.
- * @retval kStatus_Success if succeed, others fail.
- * @retval kStatus_LPUART_RxBusy Previous transfer ongoing.
- * @retval kStatus_InvalidArgument Invalid argument.
- */
-status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer);
+    /*!
+     * @brief Receives data using eDMA.
+     *
+     * This function receives data using eDMA. This is non-blocking function, which returns
+     * right away. When all data is received, the receive callback function is called.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle Pointer to lpuart_edma_handle_t structure.
+     * @param xfer LPUART eDMA transfer structure, see #lpuart_transfer_t.
+     * @retval kStatus_Success if succeed, others fail.
+     * @retval kStatus_LPUART_RxBusy Previous transfer ongoing.
+     * @retval kStatus_InvalidArgument Invalid argument.
+     */
+    status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer);
 
-/*!
- * @brief Aborts the sent data using eDMA.
- *
- * This function aborts the sent data using eDMA.
- *
- * @param base LPUART peripheral base address.
- * @param handle Pointer to lpuart_edma_handle_t structure.
- */
-void LPUART_TransferAbortSendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle);
+    /*!
+     * @brief Aborts the sent data using eDMA.
+     *
+     * This function aborts the sent data using eDMA.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle Pointer to lpuart_edma_handle_t structure.
+     */
+    void LPUART_TransferAbortSendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle);
 
-/*!
- * @brief Aborts the received data using eDMA.
- *
- * This function aborts the received data using eDMA.
- *
- * @param base LPUART peripheral base address.
- * @param handle Pointer to lpuart_edma_handle_t structure.
- */
-void LPUART_TransferAbortReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle);
+    /*!
+     * @brief Aborts the received data using eDMA.
+     *
+     * This function aborts the received data using eDMA.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle Pointer to lpuart_edma_handle_t structure.
+     */
+    void LPUART_TransferAbortReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle);
 
-/*!
- * @brief Gets the number of bytes written to the LPUART TX register.
- *
- * This function gets the number of bytes written to the LPUART TX
- * register by DMA.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param count Send bytes count.
- * @retval kStatus_NoTransferInProgress No send in progress.
- * @retval kStatus_InvalidArgument Parameter is invalid.
- * @retval kStatus_Success Get successfully through the parameter \p count;
- */
-status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count);
+    /*!
+     * @brief Gets the number of bytes written to the LPUART TX register.
+     *
+     * This function gets the number of bytes written to the LPUART TX
+     * register by DMA.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param count Send bytes count.
+     * @retval kStatus_NoTransferInProgress No send in progress.
+     * @retval kStatus_InvalidArgument Parameter is invalid.
+     * @retval kStatus_Success Get successfully through the parameter \p count;
+     */
+    status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count);
 
-/*!
- * @brief Gets the number of received bytes.
- *
- * This function gets the number of received bytes.
- *
- * @param base LPUART peripheral base address.
- * @param handle LPUART handle pointer.
- * @param count Receive bytes count.
- * @retval kStatus_NoTransferInProgress No receive in progress.
- * @retval kStatus_InvalidArgument Parameter is invalid.
- * @retval kStatus_Success Get successfully through the parameter \p count;
- */
-status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count);
+    /*!
+     * @brief Gets the number of received bytes.
+     *
+     * This function gets the number of received bytes.
+     *
+     * @param base LPUART peripheral base address.
+     * @param handle LPUART handle pointer.
+     * @param count Receive bytes count.
+     * @retval kStatus_NoTransferInProgress No receive in progress.
+     * @retval kStatus_InvalidArgument Parameter is invalid.
+     * @retval kStatus_Success Get successfully through the parameter \p count;
+     */
+    status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count);
 
-/*@}*/
+    /*@}*/
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.c
index e6ff9c874..dc19edd95 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.pit"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -71,10 +70,8 @@ static uint32_t PIT_GetInstance(PIT_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_pitBases); instance++)
-    {
-        if (s_pitBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_pitBases); instance++) {
+        if (s_pitBases[instance] == base) {
             break;
         }
     }
@@ -98,12 +95,10 @@ void PIT_Init(PIT_Type *base, const pit_config_t *config)
     base->MCR &= ~PIT_MCR_MDIS_MASK;
 #endif
     /* Config timer operation when in debug mode */
-    if (config->enableRunInDebug)
-    {
+    if (config->enableRunInDebug) {
         base->MCR &= ~PIT_MCR_FRZ_MASK;
     }
-    else
-    {
+    else {
         base->MCR |= PIT_MCR_FRZ_MASK;
     }
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.h
index 55abdd5db..db4bb8b82 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pit.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2015, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -41,7 +41,6 @@
  * @{
  */
 
-
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
@@ -94,258 +93,257 @@ typedef struct _pit_config
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Ungates the PIT clock, enables the PIT module, and configures the peripheral for basic operations.
- *
- * @note This API should be called at the beginning of the application using the PIT driver.
- *
- * @param base   PIT peripheral base address
- * @param config Pointer to the user's PIT config structure
- */
-void PIT_Init(PIT_Type *base, const pit_config_t *config);
+    /*!
+     * @brief Ungates the PIT clock, enables the PIT module, and configures the peripheral for basic operations.
+     *
+     * @note This API should be called at the beginning of the application using the PIT driver.
+     *
+     * @param base   PIT peripheral base address
+     * @param config Pointer to the user's PIT config structure
+     */
+    void PIT_Init(PIT_Type *base, const pit_config_t *config);
 
-/*!
- * @brief Gates the PIT clock and disables the PIT module.
- *
- * @param base PIT peripheral base address
- */
-void PIT_Deinit(PIT_Type *base);
+    /*!
+     * @brief Gates the PIT clock and disables the PIT module.
+     *
+     * @param base PIT peripheral base address
+     */
+    void PIT_Deinit(PIT_Type *base);
 
-/*!
- * @brief Fills in the PIT configuration structure with the default settings.
- *
- * The default values are as follows.
- * @code
- *     config->enableRunInDebug = false;
- * @endcode
- * @param config Pointer to the onfiguration structure.
- */
-static inline void PIT_GetDefaultConfig(pit_config_t *config)
-{
-    assert(config);
+    /*!
+     * @brief Fills in the PIT configuration structure with the default settings.
+     *
+     * The default values are as follows.
+     * @code
+     *     config->enableRunInDebug = false;
+     * @endcode
+     * @param config Pointer to the onfiguration structure.
+     */
+    static inline void PIT_GetDefaultConfig(pit_config_t *config)
+    {
+        assert(config);
 
-    /* Timers are stopped in Debug mode */
-    config->enableRunInDebug = false;
-}
+        /* Timers are stopped in Debug mode */
+        config->enableRunInDebug = false;
+    }
 
 #if defined(FSL_FEATURE_PIT_HAS_CHAIN_MODE) && FSL_FEATURE_PIT_HAS_CHAIN_MODE
 
-/*!
- * @brief Enables or disables chaining a timer with the previous timer.
- *
- * When a timer has a chain mode enabled, it only counts after the previous
- * timer has expired. If the timer n-1 has counted down to 0, counter n
- * decrements the value by one. Each timer is 32-bits, which allows the developers
- * to chain timers together and form a longer timer (64-bits and larger). The first timer
- * (timer 0) can't be chained to any other timer.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number which is chained with the previous timer
- * @param enable  Enable or disable chain.
- *                true:  Current timer is chained with the previous timer.
- *                false: Timer doesn't chain with other timers.
- */
-static inline void PIT_SetTimerChainMode(PIT_Type *base, pit_chnl_t channel, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enables or disables chaining a timer with the previous timer.
+     *
+     * When a timer has a chain mode enabled, it only counts after the previous
+     * timer has expired. If the timer n-1 has counted down to 0, counter n
+     * decrements the value by one. Each timer is 32-bits, which allows the developers
+     * to chain timers together and form a longer timer (64-bits and larger). The first timer
+     * (timer 0) can't be chained to any other timer.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number which is chained with the previous timer
+     * @param enable  Enable or disable chain.
+     *                true:  Current timer is chained with the previous timer.
+     *                false: Timer doesn't chain with other timers.
+     */
+    static inline void PIT_SetTimerChainMode(PIT_Type *base, pit_chnl_t channel, bool enable)
     {
-        base->CHANNEL[channel].TCTRL |= PIT_TCTRL_CHN_MASK;
+        if (enable) {
+            base->CHANNEL[channel].TCTRL |= PIT_TCTRL_CHN_MASK;
+        }
+        else {
+            base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_CHN_MASK;
+        }
     }
-    else
-    {
-        base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_CHN_MASK;
-    }
-}
 
 #endif /* FSL_FEATURE_PIT_HAS_CHAIN_MODE */
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Interrupt Interface
- * @{
- */
+    /*!
+     * @name Interrupt Interface
+     * @{
+     */
 
-/*!
- * @brief Enables the selected PIT interrupts.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- * @param mask    The interrupts to enable. This is a logical OR of members of the
- *                enumeration ::pit_interrupt_enable_t
- */
-static inline void PIT_EnableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
-{
-    base->CHANNEL[channel].TCTRL |= mask;
-}
+    /*!
+     * @brief Enables the selected PIT interrupts.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     * @param mask    The interrupts to enable. This is a logical OR of members of the
+     *                enumeration ::pit_interrupt_enable_t
+     */
+    static inline void PIT_EnableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
+    {
+        base->CHANNEL[channel].TCTRL |= mask;
+    }
 
-/*!
- * @brief Disables the selected PIT interrupts.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- * @param mask    The interrupts to disable. This is a logical OR of members of the
- *                enumeration ::pit_interrupt_enable_t
- */
-static inline void PIT_DisableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
-{
-    base->CHANNEL[channel].TCTRL &= ~mask;
-}
+    /*!
+     * @brief Disables the selected PIT interrupts.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     * @param mask    The interrupts to disable. This is a logical OR of members of the
+     *                enumeration ::pit_interrupt_enable_t
+     */
+    static inline void PIT_DisableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
+    {
+        base->CHANNEL[channel].TCTRL &= ~mask;
+    }
 
-/*!
- * @brief Gets the enabled PIT interrupts.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- *
- * @return The enabled interrupts. This is the logical OR of members of the
- *         enumeration ::pit_interrupt_enable_t
- */
-static inline uint32_t PIT_GetEnabledInterrupts(PIT_Type *base, pit_chnl_t channel)
-{
-    return (base->CHANNEL[channel].TCTRL & PIT_TCTRL_TIE_MASK);
-}
+    /*!
+     * @brief Gets the enabled PIT interrupts.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     *
+     * @return The enabled interrupts. This is the logical OR of members of the
+     *         enumeration ::pit_interrupt_enable_t
+     */
+    static inline uint32_t PIT_GetEnabledInterrupts(PIT_Type *base, pit_chnl_t channel)
+    {
+        return (base->CHANNEL[channel].TCTRL & PIT_TCTRL_TIE_MASK);
+    }
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Status Interface
- * @{
- */
+    /*!
+     * @name Status Interface
+     * @{
+     */
 
-/*!
- * @brief Gets the PIT status flags.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- *
- * @return The status flags. This is the logical OR of members of the
- *         enumeration ::pit_status_flags_t
- */
-static inline uint32_t PIT_GetStatusFlags(PIT_Type *base, pit_chnl_t channel)
-{
-    return (base->CHANNEL[channel].TFLG & PIT_TFLG_TIF_MASK);
-}
+    /*!
+     * @brief Gets the PIT status flags.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     *
+     * @return The status flags. This is the logical OR of members of the
+     *         enumeration ::pit_status_flags_t
+     */
+    static inline uint32_t PIT_GetStatusFlags(PIT_Type *base, pit_chnl_t channel)
+    {
+        return (base->CHANNEL[channel].TFLG & PIT_TFLG_TIF_MASK);
+    }
 
-/*!
- * @brief  Clears the PIT status flags.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- * @param mask    The status flags to clear. This is a logical OR of members of the
- *                enumeration ::pit_status_flags_t
- */
-static inline void PIT_ClearStatusFlags(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
-{
-    base->CHANNEL[channel].TFLG = mask;
-}
+    /*!
+     * @brief  Clears the PIT status flags.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     * @param mask    The status flags to clear. This is a logical OR of members of the
+     *                enumeration ::pit_status_flags_t
+     */
+    static inline void PIT_ClearStatusFlags(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
+    {
+        base->CHANNEL[channel].TFLG = mask;
+    }
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Read and Write the timer period
- * @{
- */
+    /*!
+     * @name Read and Write the timer period
+     * @{
+     */
 
-/*!
- * @brief Sets the timer period in units of count.
- *
- * Timers begin counting from the value set by this function until it reaches 0,
- * then it generates an interrupt and load this register value again.
- * Writing a new value to this register does not restart the timer. Instead, the value
- * is loaded after the timer expires.
- *
- * @note Users can call the utility macros provided in fsl_common.h to convert to ticks.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- * @param count   Timer period in units of ticks
- */
-static inline void PIT_SetTimerPeriod(PIT_Type *base, pit_chnl_t channel, uint32_t count)
-{
-    base->CHANNEL[channel].LDVAL = count;
-}
+    /*!
+     * @brief Sets the timer period in units of count.
+     *
+     * Timers begin counting from the value set by this function until it reaches 0,
+     * then it generates an interrupt and load this register value again.
+     * Writing a new value to this register does not restart the timer. Instead, the value
+     * is loaded after the timer expires.
+     *
+     * @note Users can call the utility macros provided in fsl_common.h to convert to ticks.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     * @param count   Timer period in units of ticks
+     */
+    static inline void PIT_SetTimerPeriod(PIT_Type *base, pit_chnl_t channel, uint32_t count)
+    {
+        base->CHANNEL[channel].LDVAL = count;
+    }
 
-/*!
- * @brief Reads the current timer counting value.
- *
- * This function returns the real-time timer counting value, in a range from 0 to a
- * timer period.
- *
- * @note Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number
- *
- * @return Current timer counting value in ticks
- */
-static inline uint32_t PIT_GetCurrentTimerCount(PIT_Type *base, pit_chnl_t channel)
-{
-    return base->CHANNEL[channel].CVAL;
-}
+    /*!
+     * @brief Reads the current timer counting value.
+     *
+     * This function returns the real-time timer counting value, in a range from 0 to a
+     * timer period.
+     *
+     * @note Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number
+     *
+     * @return Current timer counting value in ticks
+     */
+    static inline uint32_t PIT_GetCurrentTimerCount(PIT_Type *base, pit_chnl_t channel)
+    {
+        return base->CHANNEL[channel].CVAL;
+    }
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Timer Start and Stop
- * @{
- */
+    /*!
+     * @name Timer Start and Stop
+     * @{
+     */
 
-/*!
- * @brief Starts the timer counting.
- *
- * After calling this function, timers load period value, count down to 0 and
- * then load the respective start value again. Each time a timer reaches 0,
- * it generates a trigger pulse and sets the timeout interrupt flag.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number.
- */
-static inline void PIT_StartTimer(PIT_Type *base, pit_chnl_t channel)
-{
-    base->CHANNEL[channel].TCTRL |= PIT_TCTRL_TEN_MASK;
-}
+    /*!
+     * @brief Starts the timer counting.
+     *
+     * After calling this function, timers load period value, count down to 0 and
+     * then load the respective start value again. Each time a timer reaches 0,
+     * it generates a trigger pulse and sets the timeout interrupt flag.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number.
+     */
+    static inline void PIT_StartTimer(PIT_Type *base, pit_chnl_t channel)
+    {
+        base->CHANNEL[channel].TCTRL |= PIT_TCTRL_TEN_MASK;
+    }
 
-/*!
- * @brief Stops the timer counting.
- *
- * This function stops every timer counting. Timers reload their periods
- * respectively after the next time they call the PIT_DRV_StartTimer.
- *
- * @param base    PIT peripheral base address
- * @param channel Timer channel number.
- */
-static inline void PIT_StopTimer(PIT_Type *base, pit_chnl_t channel)
-{
-    base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_TEN_MASK;
-}
+    /*!
+     * @brief Stops the timer counting.
+     *
+     * This function stops every timer counting. Timers reload their periods
+     * respectively after the next time they call the PIT_DRV_StartTimer.
+     *
+     * @param base    PIT peripheral base address
+     * @param channel Timer channel number.
+     */
+    static inline void PIT_StopTimer(PIT_Type *base, pit_chnl_t channel)
+    {
+        base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_TEN_MASK;
+    }
 
-/*! @}*/
+    /*! @}*/
 
 #if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER
 
-/*!
- * @brief Reads the current lifetime counter value.
- *
- * The lifetime timer is a 64-bit timer which chains timer 0 and timer 1 together.
- * Timer 0 and 1 are chained by calling the PIT_SetTimerChainMode before using this timer.
- * The period of lifetime timer is equal to the "period of timer 0 * period of timer 1".
- * For the 64-bit value, the higher 32-bit has the value of timer 1, and the lower 32-bit
- * has the value of timer 0.
- *
- * @param base PIT peripheral base address
- *
- * @return Current lifetime timer value
- */
-uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base);
+    /*!
+     * @brief Reads the current lifetime counter value.
+     *
+     * The lifetime timer is a 64-bit timer which chains timer 0 and timer 1 together.
+     * Timer 0 and 1 are chained by calling the PIT_SetTimerChainMode before using this timer.
+     * The period of lifetime timer is equal to the "period of timer 0 * period of timer 1".
+     * For the 64-bit value, the higher 32-bit has the value of timer 1, and the lower 32-bit
+     * has the value of timer 0.
+     *
+     * @param base PIT peripheral base address
+     *
+     * @return Current lifetime timer value
+     */
+    uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base);
 
 #endif /* FSL_FEATURE_PIT_HAS_LIFETIME_TIMER */
 
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.c
index 717f5f8a6..ac98473aa 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -38,38 +38,31 @@
 #define FSL_COMPONENT_ID "platform.drivers.pmu"
 #endif
 
-
 uint32_t PMU_GetStatusFlags(PMU_Type *base)
 {
     uint32_t ret = 0U;
 
     /* For 1P1. */
-    if (PMU_REG_1P1_OK_VDD1P1_MASK == (PMU_REG_1P1_OK_VDD1P1_MASK & base->REG_1P1))
-    {
+    if (PMU_REG_1P1_OK_VDD1P1_MASK == (PMU_REG_1P1_OK_VDD1P1_MASK & base->REG_1P1)) {
         ret |= kPMU_1P1RegulatorOutputOK;
     }
-    if (PMU_REG_1P1_BO_VDD1P1_MASK == (PMU_REG_1P1_BO_VDD1P1_MASK & base->REG_1P1))
-    {
+    if (PMU_REG_1P1_BO_VDD1P1_MASK == (PMU_REG_1P1_BO_VDD1P1_MASK & base->REG_1P1)) {
         ret |= kPMU_1P1BrownoutOnOutput;
     }
 
     /* For 3P0. */
-    if (PMU_REG_3P0_OK_VDD3P0_MASK == (PMU_REG_3P0_OK_VDD3P0_MASK & base->REG_3P0))
-    {
+    if (PMU_REG_3P0_OK_VDD3P0_MASK == (PMU_REG_3P0_OK_VDD3P0_MASK & base->REG_3P0)) {
         ret |= kPMU_3P0RegulatorOutputOK;
     }
-    if (PMU_REG_3P0_BO_VDD3P0_MASK == (PMU_REG_3P0_BO_VDD3P0_MASK & base->REG_3P0))
-    {
+    if (PMU_REG_3P0_BO_VDD3P0_MASK == (PMU_REG_3P0_BO_VDD3P0_MASK & base->REG_3P0)) {
         ret |= kPMU_3P0BrownoutOnOutput;
     }
 
     /* For 2P5. */
-    if (PMU_REG_2P5_OK_VDD2P5_MASK == (PMU_REG_2P5_OK_VDD2P5_MASK & base->REG_2P5))
-    {
+    if (PMU_REG_2P5_OK_VDD2P5_MASK == (PMU_REG_2P5_OK_VDD2P5_MASK & base->REG_2P5)) {
         ret |= kPMU_2P5RegulatorOutputOK;
     }
-    if (PMU_REG_2P5_BO_VDD2P5_MASK == (PMU_REG_2P5_BO_VDD2P5_MASK & base->REG_2P5))
-    {
+    if (PMU_REG_2P5_BO_VDD2P5_MASK == (PMU_REG_2P5_BO_VDD2P5_MASK & base->REG_2P5)) {
         ret |= kPMU_2P5BrownoutOnOutput;
     }
 
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.h
index b7108941d..1d081f94c 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_pmu.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -91,10 +91,10 @@ typedef enum _pmu_3p0_vbus_voltage_source
  */
 typedef enum _pmu_core_reg_voltage_ramp_rate
 {
-    kPMU_CoreRegVoltageRampRateFast = 0U,       /*!< Fast. */
+    kPMU_CoreRegVoltageRampRateFast       = 0U, /*!< Fast. */
     kPMU_CoreRegVoltageRampRateMediumFast = 1U, /*!< Medium Fast. */
     kPMU_CoreRegVoltageRampRateMediumSlow = 2U, /*!< Medium Slow. */
-    kPMU_CoreRegVoltageRampRateSlow = 0U,       /*!< Slow. */
+    kPMU_CoreRegVoltageRampRateSlow       = 0U, /*!< Slow. */
 } pmu_core_reg_voltage_ramp_rate_t;
 
 #if defined(FSL_FEATURE_PMU_HAS_LOWPWR_CTRL) && FSL_FEATURE_PMU_HAS_LOWPWR_CTRL
@@ -103,11 +103,11 @@ typedef enum _pmu_core_reg_voltage_ramp_rate
  */
 enum _pmu_power_gate
 {
-    kPMU_PowerGateDisplay = PMU_LOWPWR_CTRL_MIX_PWRGATE_MASK,          /*!< Display power gate control. */
-    kPMU_PowerGateDisplayLogic = PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK, /*!< Display logic power gate control. */
-    kPMU_PowerGateL2 = PMU_LOWPWR_CTRL_L2_PWRGATE_MASK,                /*!< L2 power gate control. */
-    kPMU_PowerGateL1 = PMU_LOWPWR_CTRL_L1_PWRGATE_MASK,                /*!< L1 power gate control. */
-    kPMU_PowerGateRefTopIBias = PMU_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK, /*!< Low power reftop ibias disable. */
+    kPMU_PowerGateDisplay      = PMU_LOWPWR_CTRL_MIX_PWRGATE_MASK,      /*!< Display power gate control. */
+    kPMU_PowerGateDisplayLogic = PMU_LOWPWR_CTRL_DISPLAY_PWRGATE_MASK,  /*!< Display logic power gate control. */
+    kPMU_PowerGateL2           = PMU_LOWPWR_CTRL_L2_PWRGATE_MASK,       /*!< L2 power gate control. */
+    kPMU_PowerGateL1           = PMU_LOWPWR_CTRL_L1_PWRGATE_MASK,       /*!< L1 power gate control. */
+    kPMU_PowerGateRefTopIBias  = PMU_LOWPWR_CTRL_REFTOP_IBIAS_OFF_MASK, /*!< Low power reftop ibias disable. */
 };
 #endif /*  FSL_FEATURE_PMU_HAS_LOWPWR_CTRL. */
 
@@ -117,7 +117,7 @@ enum _pmu_power_gate
 typedef enum _pmu_power_bandgap
 {
     kPMU_NormalPowerBandgap = 0U, /*!< Normal power bandgap. */
-    kPMU_LowPowerBandgap = 1U,    /*!< Low power bandgap. */
+    kPMU_LowPowerBandgap    = 1U, /*!< Low power bandgap. */
 } pmu_power_bandgap_t;
 
 /*******************************************************************************
@@ -125,561 +125,530 @@ typedef enum _pmu_power_bandgap
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /* __cplusplus*/
 
-/*!
- * @name Status.
- * @{
- */
+    /*!
+     * @name Status.
+     * @{
+     */
 
-uint32_t PMU_GetStatusFlags(PMU_Type *base);
+    uint32_t PMU_GetStatusFlags(PMU_Type *base);
 
-/*@}*/
+    /*@}*/
 
-/*!
- * @name 1P1 Regular
- * @{
- */
+    /*!
+     * @name 1P1 Regular
+     * @{
+     */
 
-/*!
- * @brief Selects the source for the reference voltage of the weak 1P1 regulator.
- *
- * @param base PMU peripheral base address.
- * @param option The option for reference voltage source, see to #pmu_1p1_weak_reference_source_t.
- */
-static inline void PMU_1P1SetWeakReferenceSource(PMU_Type *base, pmu_1p1_weak_reference_source_t option)
-{
-    base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_SELREF_WEAK_LINREG_MASK) | PMU_REG_1P1_SELREF_WEAK_LINREG(option);
-}
-
-/*!
- * @brief Enables the weak 1P1 regulator.
- *
- * This regulator can be used when the main 1P1 regulator is disabled, under low-power conditions.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_1P1EnableWeakRegulator(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Selects the source for the reference voltage of the weak 1P1 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param option The option for reference voltage source, see to #pmu_1p1_weak_reference_source_t.
+     */
+    static inline void PMU_1P1SetWeakReferenceSource(PMU_Type *base, pmu_1p1_weak_reference_source_t option)
     {
-        base->REG_1P1 |= PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
+        base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_SELREF_WEAK_LINREG_MASK) | PMU_REG_1P1_SELREF_WEAK_LINREG(option);
     }
-    else
+
+    /*!
+     * @brief Enables the weak 1P1 regulator.
+     *
+     * This regulator can be used when the main 1P1 regulator is disabled, under low-power conditions.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_1P1EnableWeakRegulator(PMU_Type *base, bool enable)
     {
-        base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
+        if (enable) {
+            base->REG_1P1 |= PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
+        }
+        else {
+            base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_WEAK_LINREG_MASK;
+        }
     }
-}
 
-/*!
- * @brief Adjust the 1P1 regulator output voltage.
- *
- * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
- * may be interpolated from these examples. Choices must be in this range:
- * - 0x1b(1.375V) >= output_trg >= 0x04(0.8V)
- * - 0x04 : 0.8V
- * - 0x10 : 1.1V (typical)
- * - 0x1b : 1.375V
- * NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the output.
- */
-static inline void PMU_1P1SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_OUTPUT_TRG_MASK) | PMU_REG_1P1_OUTPUT_TRG(value);
-}
-
-/*!
- * @brief Adjust the 1P1 regulator brownout offset voltage.
- *
- * Control bits to adjust the regulator brownout offset voltage in 25mV steps. The reset
- * brown-offset is 175mV below the programmed target code.
- * Brownout target = OUTPUT_TRG - BO_OFFSET.
- * Some steps may be irrelevant because of input supply limitations or load operation.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the brownout offset. The available range is in 3-bit.
- */
-static inline void PMU_1P1SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_BO_OFFSET_MASK) | PMU_REG_1P1_BO_OFFSET(value);
-}
-
-/*!
- * @brief Enable the pull-down circuitry in the regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_1P1EnablePullDown(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Adjust the 1P1 regulator output voltage.
+     *
+     * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
+     * may be interpolated from these examples. Choices must be in this range:
+     * - 0x1b(1.375V) >= output_trg >= 0x04(0.8V)
+     * - 0x04 : 0.8V
+     * - 0x10 : 1.1V (typical)
+     * - 0x1b : 1.375V
+     * NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the output.
+     */
+    static inline void PMU_1P1SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_1P1 |= PMU_REG_1P1_ENABLE_PULLDOWN_MASK;
+        base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_OUTPUT_TRG_MASK) | PMU_REG_1P1_OUTPUT_TRG(value);
     }
-    else
+
+    /*!
+     * @brief Adjust the 1P1 regulator brownout offset voltage.
+     *
+     * Control bits to adjust the regulator brownout offset voltage in 25mV steps. The reset
+     * brown-offset is 175mV below the programmed target code.
+     * Brownout target = OUTPUT_TRG - BO_OFFSET.
+     * Some steps may be irrelevant because of input supply limitations or load operation.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the brownout offset. The available range is in 3-bit.
+     */
+    static inline void PMU_1P1SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_PULLDOWN_MASK;
+        base->REG_1P1 = (base->REG_1P1 & ~PMU_REG_1P1_BO_OFFSET_MASK) | PMU_REG_1P1_BO_OFFSET(value);
     }
-}
 
-/*!
- * @brief Enable the current-limit circuitry in the regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_1P1EnableCurrentLimit(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the pull-down circuitry in the regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_1P1EnablePullDown(PMU_Type *base, bool enable)
     {
-        base->REG_1P1 |= PMU_REG_1P1_ENABLE_ILIMIT_MASK;
+        if (enable) {
+            base->REG_1P1 |= PMU_REG_1P1_ENABLE_PULLDOWN_MASK;
+        }
+        else {
+            base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_PULLDOWN_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable the current-limit circuitry in the regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_1P1EnableCurrentLimit(PMU_Type *base, bool enable)
     {
-        base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_ILIMIT_MASK;
+        if (enable) {
+            base->REG_1P1 |= PMU_REG_1P1_ENABLE_ILIMIT_MASK;
+        }
+        else {
+            base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_ILIMIT_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enable the brownout circuitry in the regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_1P1EnableBrownout(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the brownout circuitry in the regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_1P1EnableBrownout(PMU_Type *base, bool enable)
     {
-        base->REG_1P1 |= PMU_REG_1P1_ENABLE_BO_MASK;
+        if (enable) {
+            base->REG_1P1 |= PMU_REG_1P1_ENABLE_BO_MASK;
+        }
+        else {
+            base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_BO_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable the regulator output.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_1P1EnableOutput(PMU_Type *base, bool enable)
     {
-        base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_BO_MASK;
+        if (enable) {
+            base->REG_1P1 |= PMU_REG_1P1_ENABLE_LINREG_MASK;
+        }
+        else {
+            base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_LINREG_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enable the regulator output.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_1P1EnableOutput(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*@}*/
+
+    /*!
+     * @name 3P0 Regular
+     * @{
+     */
+
+    /*!
+     * @brief Adjust the 3P0 regulator output voltage.
+     *
+     * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
+     * may be interpolated from these examples. Choices must be in this range:
+     * - 0x00(2.625V) >= output_trg >= 0x1f(3.4V)
+     * - 0x00 : 2.625V
+     * - 0x0f : 3.0V (typical)
+     * - 0x1f : 3.4V
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the output.
+     */
+    static inline void PMU_3P0SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_1P1 |= PMU_REG_1P1_ENABLE_LINREG_MASK;
+        base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_OUTPUT_TRG_MASK) | PMU_REG_3P0_OUTPUT_TRG(value);
     }
-    else
+
+    /*!
+     * @brief Select input voltage source for LDO_3P0.
+     *
+     * Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS. If only
+     * one of the two VBUS voltages is present, it is automatically selected.
+     *
+     * @param base PMU peripheral base address.
+     * @param option User-defined input voltage source for LDO_3P0.
+     */
+    static inline void PMU_3P0SetVBusVoltageSource(PMU_Type *base, pmu_3p0_vbus_voltage_source_t option)
     {
-        base->REG_1P1 &= ~PMU_REG_1P1_ENABLE_LINREG_MASK;
+        base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_VBUS_SEL_MASK) | PMU_REG_3P0_VBUS_SEL(option);
     }
-}
 
-/*@}*/
-
-/*!
- * @name 3P0 Regular
- * @{
- */
-
-/*!
- * @brief Adjust the 3P0 regulator output voltage.
- *
- * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
- * may be interpolated from these examples. Choices must be in this range:
- * - 0x00(2.625V) >= output_trg >= 0x1f(3.4V)
- * - 0x00 : 2.625V
- * - 0x0f : 3.0V (typical)
- * - 0x1f : 3.4V
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the output.
- */
-static inline void PMU_3P0SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_OUTPUT_TRG_MASK) | PMU_REG_3P0_OUTPUT_TRG(value);
-}
-
-/*!
- * @brief Select input voltage source for LDO_3P0.
- *
- * Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS. If only
- * one of the two VBUS voltages is present, it is automatically selected.
- *
- * @param base PMU peripheral base address.
- * @param option User-defined input voltage source for LDO_3P0.
- */
-static inline void PMU_3P0SetVBusVoltageSource(PMU_Type *base, pmu_3p0_vbus_voltage_source_t option)
-{
-    base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_VBUS_SEL_MASK) | PMU_REG_3P0_VBUS_SEL(option);
-}
-
-/*!
- * @brief Adjust the 3P0 regulator brownout offset voltage.
- *
- * Control bits to adjust the 3P0 regulator brownout offset voltage in 25mV steps. The reset
- * brown-offset is 175mV below the programmed target code.
- * Brownout target = OUTPUT_TRG - BO_OFFSET.
- * Some steps may be irrelevant because of input supply limitations or load operation.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the brownout offset. The available range is in 3-bit.
- */
-static inline void PMU_3P0SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_BO_OFFSET_MASK) | PMU_REG_3P0_BO_OFFSET(value);
-}
-
-/*!
- * @brief Enable the current-limit circuitry in the 3P0 regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_3P0EnableCurrentLimit(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Adjust the 3P0 regulator brownout offset voltage.
+     *
+     * Control bits to adjust the 3P0 regulator brownout offset voltage in 25mV steps. The reset
+     * brown-offset is 175mV below the programmed target code.
+     * Brownout target = OUTPUT_TRG - BO_OFFSET.
+     * Some steps may be irrelevant because of input supply limitations or load operation.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the brownout offset. The available range is in 3-bit.
+     */
+    static inline void PMU_3P0SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_3P0 |= PMU_REG_3P0_ENABLE_ILIMIT_MASK;
+        base->REG_3P0 = (base->REG_3P0 & ~PMU_REG_3P0_BO_OFFSET_MASK) | PMU_REG_3P0_BO_OFFSET(value);
     }
-    else
-    {
-        base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_ILIMIT_MASK;
-    }
-}
 
-/*!
- * @brief Enable the brownout circuitry in the 3P0 regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_3P0EnableBrownout(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the current-limit circuitry in the 3P0 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_3P0EnableCurrentLimit(PMU_Type *base, bool enable)
     {
-        base->REG_3P0 |= PMU_REG_3P0_ENABLE_BO_MASK;
+        if (enable) {
+            base->REG_3P0 |= PMU_REG_3P0_ENABLE_ILIMIT_MASK;
+        }
+        else {
+            base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_ILIMIT_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable the brownout circuitry in the 3P0 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_3P0EnableBrownout(PMU_Type *base, bool enable)
     {
-        base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_BO_MASK;
+        if (enable) {
+            base->REG_3P0 |= PMU_REG_3P0_ENABLE_BO_MASK;
+        }
+        else {
+            base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_BO_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enable the 3P0 regulator output.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_3P0EnableOutput(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the 3P0 regulator output.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_3P0EnableOutput(PMU_Type *base, bool enable)
     {
-        base->REG_3P0 |= PMU_REG_3P0_ENABLE_LINREG_MASK;
+        if (enable) {
+            base->REG_3P0 |= PMU_REG_3P0_ENABLE_LINREG_MASK;
+        }
+        else {
+            base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_LINREG_MASK;
+        }
     }
-    else
+
+    /* @} */
+
+    /*!
+     * @name 2P5 Regulator
+     * @{
+     */
+
+    /*!
+     * @brief Enables the weak 2P5 regulator.
+     *
+     * This low power regulator is used when the main 2P5 regulator is disabled
+     * to keep the 2.5V output roughly at 2.5V. Scales directly with the value of VDDHIGH_IN.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_2P5EnableWeakRegulator(PMU_Type *base, bool enable)
     {
-        base->REG_3P0 &= ~PMU_REG_3P0_ENABLE_LINREG_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
+        }
     }
-}
 
-/* @} */
-
-/*!
- * @name 2P5 Regulator
- * @{
- */
-
-/*!
- * @brief Enables the weak 2P5 regulator.
- *
- * This low power regulator is used when the main 2P5 regulator is disabled
- * to keep the 2.5V output roughly at 2.5V. Scales directly with the value of VDDHIGH_IN.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_2P5EnableWeakRegulator(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Adjust the 1P1 regulator output voltage.
+     *
+     * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
+     * may be interpolated from these examples. Choices must be in this range:
+     * - 0x00(2.1V) >= output_trg >= 0x1f(2.875V)
+     * - 0x00 : 2.1V
+     * - 0x10 : 2.5V (typical)
+     * - 0x1f : 2.875V
+     * NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the output.
+     */
+    static inline void PMU_2P5SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
+        base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_OUTPUT_TRG_MASK) | PMU_REG_2P5_OUTPUT_TRG(value);
     }
-    else
+
+    /*!
+     * @brief Adjust the 2P5 regulator brownout offset voltage.
+     *
+     * Adjust the regulator brownout offset voltage in 25mV steps. The reset
+     * brown-offset is 175mV below the programmed target code.
+     * Brownout target = OUTPUT_TRG - BO_OFFSET.
+     * Some steps may be irrelevant because of input supply limitations or load operation.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for the brownout offset. The available range is in 3-bit.
+     */
+    static inline void PMU_2P5SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_WEAK_LINREG_MASK;
+        base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_BO_OFFSET_MASK) | PMU_REG_2P5_BO_OFFSET(value);
     }
-}
 
-/*!
- * @brief Adjust the 1P1 regulator output voltage.
- *
- * Each LSB is worth 25mV. Programming examples are detailed below. Other output target voltages
- * may be interpolated from these examples. Choices must be in this range:
- * - 0x00(2.1V) >= output_trg >= 0x1f(2.875V)
- * - 0x00 : 2.1V
- * - 0x10 : 2.5V (typical)
- * - 0x1f : 2.875V
- * NOTE: There may be reduced chip functionality or reliability at the extremes of the programming range.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the output.
- */
-static inline void PMU_2P5SetRegulatorOutputVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_OUTPUT_TRG_MASK) | PMU_REG_2P5_OUTPUT_TRG(value);
-}
-
-/*!
- * @brief Adjust the 2P5 regulator brownout offset voltage.
- *
- * Adjust the regulator brownout offset voltage in 25mV steps. The reset
- * brown-offset is 175mV below the programmed target code.
- * Brownout target = OUTPUT_TRG - BO_OFFSET.
- * Some steps may be irrelevant because of input supply limitations or load operation.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for the brownout offset. The available range is in 3-bit.
- */
-static inline void PMU_2P5SetBrownoutOffsetVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_2P5 = (base->REG_2P5 & ~PMU_REG_2P5_BO_OFFSET_MASK) | PMU_REG_2P5_BO_OFFSET(value);
-}
-
-/*!
- * @brief Enable the pull-down circuitry in the 2P5 regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_2P5EnablePullDown(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the pull-down circuitry in the 2P5 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_2P5EnablePullDown(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        }
     }
-    else
-    {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
-    }
-}
 
-/*!
- * @brief Enable the pull-down circuitry in the 2P5 regulator.
- * @deprecated Do not use this function.  It has been superceded by @ref PMU_2P5EnablePullDown.
- */
-static inline void PMU_2P1EnablePullDown(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the pull-down circuitry in the 2P5 regulator.
+     * @deprecated Do not use this function.  It has been superceded by @ref PMU_2P5EnablePullDown.
+     */
+    static inline void PMU_2P1EnablePullDown(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable the current-limit circuitry in the 2P5 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_2P5EnableCurrentLimit(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_PULLDOWN_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_ILIMIT_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_ILIMIT_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enable the current-limit circuitry in the 2P5 regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_2P5EnableCurrentLimit(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the brownout circuitry in the 2P5 regulator.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_2P5nableBrownout(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_ILIMIT_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_BO_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_BO_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Enable the 2P5 regulator output.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_2P5EnableOutput(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_ILIMIT_MASK;
+        if (enable) {
+            base->REG_2P5 |= PMU_REG_2P5_ENABLE_LINREG_MASK;
+        }
+        else {
+            base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_LINREG_MASK;
+        }
     }
-}
 
-/*!
- * @brief Enable the brownout circuitry in the 2P5 regulator.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_2P5nableBrownout(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /* @} */
+
+    /*!
+     * @name Core Regulator
+     * @{
+     */
+
+    /*!
+     * @brief Increase the gate drive on power gating FETs.
+     *
+     * If set, increases the gate drive on power gating FETs to reduce leakage in the off state.
+     * Care must be taken to apply this bit only when the input supply voltage to the power FET
+     * is less than 1.1V.
+     * NOTE: This bit should only be used in low-power modes where the external input supply voltage
+     * is nominally 0.9V.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the feature or not.
+     */
+    static inline void PMU_CoreEnableIncreaseGateDrive(PMU_Type *base, bool enable)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_BO_MASK;
+        if (enable) {
+            base->REG_CORE |= PMU_REG_CORE_FET_ODRIVE_MASK;
+        }
+        else {
+            base->REG_CORE &= ~PMU_REG_CORE_FET_ODRIVE_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Set the CORE regulator voltage ramp rate.
+     *
+     * @param base PMU peripheral base address.
+     * @param option User-defined option for voltage ramp rate, see to #pmu_core_reg_voltage_ramp_rate_t.
+     */
+    static inline void PMU_CoreSetRegulatorVoltageRampRate(PMU_Type *base, pmu_core_reg_voltage_ramp_rate_t option)
     {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_BO_MASK;
+        base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_RAMP_RATE_MASK) | PMU_REG_CORE_RAMP_RATE(option);
     }
-}
 
-/*!
- * @brief Enable the 2P5 regulator output.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_2P5EnableOutput(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Define the target voltage for the SOC power domain.
+     *
+     * Define the target voltage for the SOC power domain. Single-bit increments reflect 25mV core
+     * voltage steps. Some steps may not be relevant because of input supply limitations or load operation.
+     * - 0x00 : Power gated off.
+     * - 0x01 : Target core voltage = 0.725V
+     * - 0x02 : Target core voltage = 0.750V
+     * - ...
+     * - 0x10 : Target core voltage = 1.100V
+     * - ...
+     * - 0x1e : Target core voltage = 1.450V
+     * - 0x1F : Power FET switched full on. No regulation.
+     * NOTE: This register is capable of programming an over-voltage condition on the device. Consult the
+     * datasheet Operating Ranges table for the allowed voltages.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for target voltage. 5-bit available
+     */
+    static inline void PMU_CoreSetSOCDomainVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_2P5 |= PMU_REG_2P5_ENABLE_LINREG_MASK;
+        base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_REG2_TARG_MASK) | PMU_REG_CORE_REG2_TARG(value);
     }
-    else
+
+    /*!
+     * @brief Define the target voltage for the ARM Core power domain.
+     *
+     * Define the target voltage for the ARM Core power domain. Single-bit increments reflect 25mV core
+     * voltage steps. Some steps may not be relevant because of input supply limitations or load operation.
+     * - 0x00 : Power gated off.
+     * - 0x01 : Target core voltage = 0.725V
+     * - 0x02 : Target core voltage = 0.750V
+     * - ...
+     * - 0x10 : Target core voltage = 1.100V
+     * - ...
+     * - 0x1e : Target core voltage = 1.450V
+     * - 0x1F : Power FET switched full on. No regulation.
+     * NOTE: This register is capable of programming an over-voltage condition on the device. Consult the
+     * datasheet Operating Ranges table for the allowed voltages.
+     *
+     * @param base PMU peripheral base address.
+     * @param value Setting value for target voltage. 5-bit available
+     */
+    static inline void PMU_CoreSetARMCoreDomainVoltage(PMU_Type *base, uint32_t value)
     {
-        base->REG_2P5 &= ~PMU_REG_2P5_ENABLE_LINREG_MASK;
+        base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_REG0_TARG_MASK) | PMU_REG_CORE_REG0_TARG(value);
     }
-}
 
-/* @} */
-
-/*!
- * @name Core Regulator
- * @{
- */
-
-/*!
- * @brief Increase the gate drive on power gating FETs.
- *
- * If set, increases the gate drive on power gating FETs to reduce leakage in the off state.
- * Care must be taken to apply this bit only when the input supply voltage to the power FET
- * is less than 1.1V.
- * NOTE: This bit should only be used in low-power modes where the external input supply voltage
- * is nominally 0.9V.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the feature or not.
- */
-static inline void PMU_CoreEnableIncreaseGateDrive(PMU_Type *base, bool enable)
-{
-    if (enable)
-    {
-        base->REG_CORE |= PMU_REG_CORE_FET_ODRIVE_MASK;
-    }
-    else
-    {
-        base->REG_CORE &= ~PMU_REG_CORE_FET_ODRIVE_MASK;
-    }
-}
-
-/*!
- * @brief Set the CORE regulator voltage ramp rate.
- *
- * @param base PMU peripheral base address.
- * @param option User-defined option for voltage ramp rate, see to #pmu_core_reg_voltage_ramp_rate_t.
- */
-static inline void PMU_CoreSetRegulatorVoltageRampRate(PMU_Type *base, pmu_core_reg_voltage_ramp_rate_t option)
-{
-    base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_RAMP_RATE_MASK) | PMU_REG_CORE_RAMP_RATE(option);
-}
-
-/*!
- * @brief Define the target voltage for the SOC power domain.
- *
- * Define the target voltage for the SOC power domain. Single-bit increments reflect 25mV core
- * voltage steps. Some steps may not be relevant because of input supply limitations or load operation.
- * - 0x00 : Power gated off.
- * - 0x01 : Target core voltage = 0.725V
- * - 0x02 : Target core voltage = 0.750V
- * - ...
- * - 0x10 : Target core voltage = 1.100V
- * - ...
- * - 0x1e : Target core voltage = 1.450V
- * - 0x1F : Power FET switched full on. No regulation.
- * NOTE: This register is capable of programming an over-voltage condition on the device. Consult the
- * datasheet Operating Ranges table for the allowed voltages.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for target voltage. 5-bit available
- */
-static inline void PMU_CoreSetSOCDomainVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_REG2_TARG_MASK) | PMU_REG_CORE_REG2_TARG(value);
-}
-
-/*!
- * @brief Define the target voltage for the ARM Core power domain.
- *
- * Define the target voltage for the ARM Core power domain. Single-bit increments reflect 25mV core
- * voltage steps. Some steps may not be relevant because of input supply limitations or load operation.
- * - 0x00 : Power gated off.
- * - 0x01 : Target core voltage = 0.725V
- * - 0x02 : Target core voltage = 0.750V
- * - ...
- * - 0x10 : Target core voltage = 1.100V
- * - ...
- * - 0x1e : Target core voltage = 1.450V
- * - 0x1F : Power FET switched full on. No regulation.
- * NOTE: This register is capable of programming an over-voltage condition on the device. Consult the
- * datasheet Operating Ranges table for the allowed voltages.
- *
- * @param base PMU peripheral base address.
- * @param value Setting value for target voltage. 5-bit available
- */
-static inline void PMU_CoreSetARMCoreDomainVoltage(PMU_Type *base, uint32_t value)
-{
-    base->REG_CORE = (base->REG_CORE & ~PMU_REG_CORE_REG0_TARG_MASK) | PMU_REG_CORE_REG0_TARG(value);
-}
-
-/* @} */
+    /* @} */
 
 #if defined(FSL_FEATURE_PMU_HAS_LOWPWR_CTRL) && FSL_FEATURE_PMU_HAS_LOWPWR_CTRL
-/*!
- * @name Power Gate Controller & other
- * @{
- */
+    /*!
+     * @name Power Gate Controller & other
+     * @{
+     */
 
-/*!
- * @brief Gate the power to modules.
- *
- * @param base PMU peripheral base address.
- * @param gates Mask value for the module to be gated. See to #_pmu_power_gate.
- */
-static inline void PMU_GatePower(PMU_Type *base, uint32_t gates)
-{
-    base->LOWPWR_CTRL_SET = gates;
-}
-
-/*!
- * @brief Ungate the power to modules.
- *
- * @param base PMU peripheral base address.
- * @param gates Mask value for the module to be gated. See to #_pmu_power_gate.
- */
-static inline void PMU_UngatePower(PMU_Type *base, uint32_t gates)
-{
-    base->LOWPWR_CTRL_CLR = gates;
-}
-
-/*!
- * @brief Enable the low power bandgap.
- *
- * @param base PMU peripheral base address.
- * @param enable Enable the low power bandgap or use the normal power bandgap.
- * @
- */
-static inline void PMU_EnableLowPowerBandgap(PMU_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Gate the power to modules.
+     *
+     * @param base PMU peripheral base address.
+     * @param gates Mask value for the module to be gated. See to #_pmu_power_gate.
+     */
+    static inline void PMU_GatePower(PMU_Type *base, uint32_t gates)
     {
-        base->LOWPWR_CTRL_SET = PMU_LOWPWR_CTRL_LPBG_SEL_MASK; /* Use the low power bandgap. */
+        base->LOWPWR_CTRL_SET = gates;
     }
-    else
+
+    /*!
+     * @brief Ungate the power to modules.
+     *
+     * @param base PMU peripheral base address.
+     * @param gates Mask value for the module to be gated. See to #_pmu_power_gate.
+     */
+    static inline void PMU_UngatePower(PMU_Type *base, uint32_t gates)
     {
-        base->LOWPWR_CTRL_CLR = PMU_LOWPWR_CTRL_LPBG_SEL_MASK; /* Use the normal power bandgap. */
+        base->LOWPWR_CTRL_CLR = gates;
+    }
+
+    /*!
+     * @brief Enable the low power bandgap.
+     *
+     * @param base PMU peripheral base address.
+     * @param enable Enable the low power bandgap or use the normal power bandgap.
+     * @
+     */
+    static inline void PMU_EnableLowPowerBandgap(PMU_Type *base, bool enable)
+    {
+        if (enable) {
+            base->LOWPWR_CTRL_SET = PMU_LOWPWR_CTRL_LPBG_SEL_MASK; /* Use the low power bandgap. */
+        }
+        else {
+            base->LOWPWR_CTRL_CLR = PMU_LOWPWR_CTRL_LPBG_SEL_MASK; /* Use the normal power bandgap. */
+        }
     }
-}
 #endif /* FSL_FEATURE_PMU_HAS_LOWPWR_CTRL. */
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.c
index 674dd9650..d363f9eb5 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.c
@@ -128,12 +128,12 @@ static void SAI_SetMasterClockDivider(I2S_Type *base, uint32_t mclk_Hz, uint32_t
 {
     uint32_t freq = mclkSrcClock_Hz;
     uint16_t fract, divide;
-    uint32_t remaind = 0;
+    uint32_t remaind           = 0;
     uint32_t current_remainder = 0xFFFFFFFFU;
-    uint16_t current_fract = 0;
-    uint16_t current_divide = 0;
-    uint32_t mul_freq = 0;
-    uint32_t max_fract = 256;
+    uint16_t current_fract     = 0;
+    uint16_t current_divide    = 0;
+    uint32_t mul_freq          = 0;
+    uint32_t max_fract         = 256;
 
     /*In order to prevent overflow */
     freq /= 100;
@@ -141,38 +141,33 @@ static void SAI_SetMasterClockDivider(I2S_Type *base, uint32_t mclk_Hz, uint32_t
 
     /* Compute the max fract number */
     max_fract = mclk_Hz * 4096 / freq + 1;
-    if (max_fract > 256)
-    {
+    if (max_fract > 256) {
         max_fract = 256;
     }
 
     /* Looking for the closet frequency */
-    for (fract = 1; fract < max_fract; fract++)
-    {
+    for (fract = 1; fract < max_fract; fract++) {
         mul_freq = freq * fract;
-        remaind = mul_freq % mclk_Hz;
-        divide = mul_freq / mclk_Hz;
+        remaind  = mul_freq % mclk_Hz;
+        divide   = mul_freq / mclk_Hz;
 
         /* Find the exactly frequency */
-        if (remaind == 0)
-        {
-            current_fract = fract;
+        if (remaind == 0) {
+            current_fract  = fract;
             current_divide = mul_freq / mclk_Hz;
             break;
         }
 
         /* Closer to next one, set the closest to next data */
-        if (remaind > mclk_Hz / 2)
-        {
+        if (remaind > mclk_Hz / 2) {
             remaind = mclk_Hz - remaind;
             divide += 1;
         }
 
         /* Update the closest div and fract */
-        if (remaind < current_remainder)
-        {
-            current_fract = fract;
-            current_divide = divide;
+        if (remaind < current_remainder) {
+            current_fract     = fract;
+            current_divide    = divide;
             current_remainder = remaind;
         }
     }
@@ -181,9 +176,7 @@ static void SAI_SetMasterClockDivider(I2S_Type *base, uint32_t mclk_Hz, uint32_t
     base->MDR = I2S_MDR_DIVIDE(current_divide - 1) | I2S_MDR_FRACT(current_fract - 1);
 
     /* Waiting for the divider updated */
-    while (base->MCR & I2S_MCR_DUF_MASK)
-    {
-    }
+    while (base->MCR & I2S_MCR_DUF_MASK) {}
 }
 #endif /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */
 
@@ -192,10 +185,8 @@ static uint32_t SAI_GetInstance(I2S_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++)
-    {
-        if (s_saiBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++) {
+        if (s_saiBases[instance] == base) {
             break;
         }
     }
@@ -207,37 +198,33 @@ static uint32_t SAI_GetInstance(I2S_Type *base)
 
 static void SAI_WriteNonBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)
 {
-    uint32_t i = 0;
-    uint8_t j = 0;
+    uint32_t i           = 0;
+    uint8_t j            = 0;
     uint8_t bytesPerWord = bitWidth / 8U;
-    uint32_t data = 0;
-    uint32_t temp = 0;
+    uint32_t data        = 0;
+    uint32_t temp        = 0;
 
-    for (i = 0; i < size / bytesPerWord; i++)
-    {
-        for (j = 0; j < bytesPerWord; j++)
-        {
+    for (i = 0; i < size / bytesPerWord; i++) {
+        for (j = 0; j < bytesPerWord; j++) {
             temp = (uint32_t)(*buffer);
             data |= (temp << (8U * j));
             buffer++;
         }
         base->TDR[channel] = data;
-        data = 0;
+        data               = 0;
     }
 }
 
 static void SAI_ReadNonBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)
 {
-    uint32_t i = 0;
-    uint8_t j = 0;
+    uint32_t i           = 0;
+    uint8_t j            = 0;
     uint8_t bytesPerWord = bitWidth / 8U;
-    uint32_t data = 0;
+    uint32_t data        = 0;
 
-    for (i = 0; i < size / bytesPerWord; i++)
-    {
+    for (i = 0; i < size / bytesPerWord; i++) {
         data = base->RDR[channel];
-        for (j = 0; j < bytesPerWord; j++)
-        {
+        for (j = 0; j < bytesPerWord; j++) {
             *buffer = (data >> (8U * j)) & 0xFF;
             buffer++;
         }
@@ -255,98 +242,94 @@ void SAI_TxInit(I2S_Type *base, const sai_config_t *config)
 
 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
     /* Master clock source setting */
-    val = (base->MCR & ~I2S_MCR_MICS_MASK);
+    val       = (base->MCR & ~I2S_MCR_MICS_MASK);
     base->MCR = (val | I2S_MCR_MICS(config->mclkSource));
 
     /* Configure Master clock output enable */
-    val = (base->MCR & ~I2S_MCR_MOE_MASK);
+    val       = (base->MCR & ~I2S_MCR_MOE_MASK);
     base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable));
 #endif /* FSL_FEATURE_SAI_HAS_MCR */
 
     SAI_TxReset(base);
 
     /* Configure audio protocol */
-    switch (config->protocol)
-    {
-        case kSAI_BusLeftJustified:
-            base->TCR2 |= I2S_TCR2_BCP_MASK;
-            base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
-            base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
-            break;
+    switch (config->protocol) {
+    case kSAI_BusLeftJustified:
+        base->TCR2 |= I2S_TCR2_BCP_MASK;
+        base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
+        base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusRightJustified:
-            base->TCR2 |= I2S_TCR2_BCP_MASK;
-            base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
-            base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
-            break;
+    case kSAI_BusRightJustified:
+        base->TCR2 |= I2S_TCR2_BCP_MASK;
+        base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
+        base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusI2S:
-            base->TCR2 |= I2S_TCR2_BCP_MASK;
-            base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
-            base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(1U) | I2S_TCR4_FSP(1U) | I2S_TCR4_FRSZ(1U);
-            break;
+    case kSAI_BusI2S:
+        base->TCR2 |= I2S_TCR2_BCP_MASK;
+        base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
+        base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(31U) | I2S_TCR4_FSE(1U) | I2S_TCR4_FSP(1U) | I2S_TCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusPCMA:
-            base->TCR2 &= ~I2S_TCR2_BCP_MASK;
-            base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
-            base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(0U) | I2S_TCR4_FSE(1U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
-            break;
+    case kSAI_BusPCMA:
+        base->TCR2 &= ~I2S_TCR2_BCP_MASK;
+        base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
+        base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(0U) | I2S_TCR4_FSE(1U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusPCMB:
-            base->TCR2 &= ~I2S_TCR2_BCP_MASK;
-            base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
-            base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(0U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
-            break;
+    case kSAI_BusPCMB:
+        base->TCR2 &= ~I2S_TCR2_BCP_MASK;
+        base->TCR3 &= ~I2S_TCR3_WDFL_MASK;
+        base->TCR4 = I2S_TCR4_MF(1U) | I2S_TCR4_SYWD(0U) | I2S_TCR4_FSE(0U) | I2S_TCR4_FSP(0U) | I2S_TCR4_FRSZ(1U);
+        break;
 
-        default:
-            break;
+    default:
+        break;
     }
 
     /* Set master or slave */
-    if (config->masterSlave == kSAI_Master)
-    {
+    if (config->masterSlave == kSAI_Master) {
         base->TCR2 |= I2S_TCR2_BCD_MASK;
         base->TCR4 |= I2S_TCR4_FSD_MASK;
 
         /* Bit clock source setting */
-        val = base->TCR2 & (~I2S_TCR2_MSEL_MASK);
+        val        = base->TCR2 & (~I2S_TCR2_MSEL_MASK);
         base->TCR2 = (val | I2S_TCR2_MSEL(config->bclkSource));
     }
-    else
-    {
+    else {
         base->TCR2 &= ~I2S_TCR2_BCD_MASK;
         base->TCR4 &= ~I2S_TCR4_FSD_MASK;
     }
 
     /* Set Sync mode */
-    switch (config->syncMode)
-    {
-        case kSAI_ModeAsync:
-            val = base->TCR2;
-            val &= ~I2S_TCR2_SYNC_MASK;
-            base->TCR2 = (val | I2S_TCR2_SYNC(0U));
-            break;
-        case kSAI_ModeSync:
-            val = base->TCR2;
-            val &= ~I2S_TCR2_SYNC_MASK;
-            base->TCR2 = (val | I2S_TCR2_SYNC(1U));
-            /* If sync with Rx, should set Rx to async mode */
-            val = base->RCR2;
-            val &= ~I2S_RCR2_SYNC_MASK;
-            base->RCR2 = (val | I2S_RCR2_SYNC(0U));
-            break;
-        case kSAI_ModeSyncWithOtherTx:
-            val = base->TCR2;
-            val &= ~I2S_TCR2_SYNC_MASK;
-            base->TCR2 = (val | I2S_TCR2_SYNC(2U));
-            break;
-        case kSAI_ModeSyncWithOtherRx:
-            val = base->TCR2;
-            val &= ~I2S_TCR2_SYNC_MASK;
-            base->TCR2 = (val | I2S_TCR2_SYNC(3U));
-            break;
-        default:
-            break;
+    switch (config->syncMode) {
+    case kSAI_ModeAsync:
+        val = base->TCR2;
+        val &= ~I2S_TCR2_SYNC_MASK;
+        base->TCR2 = (val | I2S_TCR2_SYNC(0U));
+        break;
+    case kSAI_ModeSync:
+        val = base->TCR2;
+        val &= ~I2S_TCR2_SYNC_MASK;
+        base->TCR2 = (val | I2S_TCR2_SYNC(1U));
+        /* If sync with Rx, should set Rx to async mode */
+        val = base->RCR2;
+        val &= ~I2S_RCR2_SYNC_MASK;
+        base->RCR2 = (val | I2S_RCR2_SYNC(0U));
+        break;
+    case kSAI_ModeSyncWithOtherTx:
+        val = base->TCR2;
+        val &= ~I2S_TCR2_SYNC_MASK;
+        base->TCR2 = (val | I2S_TCR2_SYNC(2U));
+        break;
+    case kSAI_ModeSyncWithOtherRx:
+        val = base->TCR2;
+        val &= ~I2S_TCR2_SYNC_MASK;
+        base->TCR2 = (val | I2S_TCR2_SYNC(3U));
+        break;
+    default:
+        break;
     }
 
 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
@@ -365,98 +348,94 @@ void SAI_RxInit(I2S_Type *base, const sai_config_t *config)
 
 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
     /* Master clock source setting */
-    val = (base->MCR & ~I2S_MCR_MICS_MASK);
+    val       = (base->MCR & ~I2S_MCR_MICS_MASK);
     base->MCR = (val | I2S_MCR_MICS(config->mclkSource));
 
     /* Configure Master clock output enable */
-    val = (base->MCR & ~I2S_MCR_MOE_MASK);
+    val       = (base->MCR & ~I2S_MCR_MOE_MASK);
     base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable));
 #endif /* FSL_FEATURE_SAI_HAS_MCR */
 
     SAI_RxReset(base);
 
     /* Configure audio protocol */
-    switch (config->protocol)
-    {
-        case kSAI_BusLeftJustified:
-            base->RCR2 |= I2S_RCR2_BCP_MASK;
-            base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
-            base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
-            break;
+    switch (config->protocol) {
+    case kSAI_BusLeftJustified:
+        base->RCR2 |= I2S_RCR2_BCP_MASK;
+        base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
+        base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusRightJustified:
-            base->RCR2 |= I2S_RCR2_BCP_MASK;
-            base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
-            base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
-            break;
+    case kSAI_BusRightJustified:
+        base->RCR2 |= I2S_RCR2_BCP_MASK;
+        base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
+        base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusI2S:
-            base->RCR2 |= I2S_RCR2_BCP_MASK;
-            base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
-            base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(1U) | I2S_RCR4_FSP(1U) | I2S_RCR4_FRSZ(1U);
-            break;
+    case kSAI_BusI2S:
+        base->RCR2 |= I2S_RCR2_BCP_MASK;
+        base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
+        base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(31U) | I2S_RCR4_FSE(1U) | I2S_RCR4_FSP(1U) | I2S_RCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusPCMA:
-            base->RCR2 &= ~I2S_RCR2_BCP_MASK;
-            base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
-            base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(0U) | I2S_RCR4_FSE(1U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
-            break;
+    case kSAI_BusPCMA:
+        base->RCR2 &= ~I2S_RCR2_BCP_MASK;
+        base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
+        base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(0U) | I2S_RCR4_FSE(1U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
+        break;
 
-        case kSAI_BusPCMB:
-            base->RCR2 &= ~I2S_RCR2_BCP_MASK;
-            base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
-            base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(0U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
-            break;
+    case kSAI_BusPCMB:
+        base->RCR2 &= ~I2S_RCR2_BCP_MASK;
+        base->RCR3 &= ~I2S_RCR3_WDFL_MASK;
+        base->RCR4 = I2S_RCR4_MF(1U) | I2S_RCR4_SYWD(0U) | I2S_RCR4_FSE(0U) | I2S_RCR4_FSP(0U) | I2S_RCR4_FRSZ(1U);
+        break;
 
-        default:
-            break;
+    default:
+        break;
     }
 
     /* Set master or slave */
-    if (config->masterSlave == kSAI_Master)
-    {
+    if (config->masterSlave == kSAI_Master) {
         base->RCR2 |= I2S_RCR2_BCD_MASK;
         base->RCR4 |= I2S_RCR4_FSD_MASK;
 
         /* Bit clock source setting */
-        val = base->RCR2 & (~I2S_RCR2_MSEL_MASK);
+        val        = base->RCR2 & (~I2S_RCR2_MSEL_MASK);
         base->RCR2 = (val | I2S_RCR2_MSEL(config->bclkSource));
     }
-    else
-    {
+    else {
         base->RCR2 &= ~I2S_RCR2_BCD_MASK;
         base->RCR4 &= ~I2S_RCR4_FSD_MASK;
     }
 
     /* Set Sync mode */
-    switch (config->syncMode)
-    {
-        case kSAI_ModeAsync:
-            val = base->RCR2;
-            val &= ~I2S_RCR2_SYNC_MASK;
-            base->RCR2 = (val | I2S_RCR2_SYNC(0U));
-            break;
-        case kSAI_ModeSync:
-            val = base->RCR2;
-            val &= ~I2S_RCR2_SYNC_MASK;
-            base->RCR2 = (val | I2S_RCR2_SYNC(1U));
-            /* If sync with Tx, should set Tx to async mode */
-            val = base->TCR2;
-            val &= ~I2S_TCR2_SYNC_MASK;
-            base->TCR2 = (val | I2S_TCR2_SYNC(0U));
-            break;
-        case kSAI_ModeSyncWithOtherTx:
-            val = base->RCR2;
-            val &= ~I2S_RCR2_SYNC_MASK;
-            base->RCR2 = (val | I2S_RCR2_SYNC(2U));
-            break;
-        case kSAI_ModeSyncWithOtherRx:
-            val = base->RCR2;
-            val &= ~I2S_RCR2_SYNC_MASK;
-            base->RCR2 = (val | I2S_RCR2_SYNC(3U));
-            break;
-        default:
-            break;
+    switch (config->syncMode) {
+    case kSAI_ModeAsync:
+        val = base->RCR2;
+        val &= ~I2S_RCR2_SYNC_MASK;
+        base->RCR2 = (val | I2S_RCR2_SYNC(0U));
+        break;
+    case kSAI_ModeSync:
+        val = base->RCR2;
+        val &= ~I2S_RCR2_SYNC_MASK;
+        base->RCR2 = (val | I2S_RCR2_SYNC(1U));
+        /* If sync with Tx, should set Tx to async mode */
+        val = base->TCR2;
+        val &= ~I2S_TCR2_SYNC_MASK;
+        base->TCR2 = (val | I2S_TCR2_SYNC(0U));
+        break;
+    case kSAI_ModeSyncWithOtherTx:
+        val = base->RCR2;
+        val &= ~I2S_RCR2_SYNC_MASK;
+        base->RCR2 = (val | I2S_RCR2_SYNC(2U));
+        break;
+    case kSAI_ModeSyncWithOtherRx:
+        val = base->RCR2;
+        val &= ~I2S_RCR2_SYNC_MASK;
+        base->RCR2 = (val | I2S_RCR2_SYNC(3U));
+        break;
+    default:
+        break;
     }
 
 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
@@ -475,11 +454,11 @@ void SAI_Deinit(I2S_Type *base)
 
 void SAI_TxGetDefaultConfig(sai_config_t *config)
 {
-    config->bclkSource = kSAI_BclkSourceMclkDiv;
+    config->bclkSource  = kSAI_BclkSourceMclkDiv;
     config->masterSlave = kSAI_Master;
-    config->mclkSource = kSAI_MclkSourceSysclk;
-    config->protocol = kSAI_BusI2S;
-    config->syncMode = kSAI_ModeAsync;
+    config->mclkSource  = kSAI_MclkSourceSysclk;
+    config->protocol    = kSAI_BusI2S;
+    config->syncMode    = kSAI_ModeAsync;
 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
     config->mclkOutputEnable = true;
 #endif /* FSL_FEATURE_SAI_HAS_MCR */
@@ -487,11 +466,11 @@ void SAI_TxGetDefaultConfig(sai_config_t *config)
 
 void SAI_RxGetDefaultConfig(sai_config_t *config)
 {
-    config->bclkSource = kSAI_BclkSourceMclkDiv;
+    config->bclkSource  = kSAI_BclkSourceMclkDiv;
     config->masterSlave = kSAI_Master;
-    config->mclkSource = kSAI_MclkSourceSysclk;
-    config->protocol = kSAI_BusI2S;
-    config->syncMode = kSAI_ModeSync;
+    config->mclkSource  = kSAI_MclkSourceSysclk;
+    config->protocol    = kSAI_BusI2S;
+    config->syncMode    = kSAI_ModeSync;
 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
     config->mclkOutputEnable = true;
 #endif /* FSL_FEATURE_SAI_HAS_MCR */
@@ -510,7 +489,7 @@ void SAI_TxReset(I2S_Type *base)
     base->TCR3 = 0;
     base->TCR4 = 0;
     base->TCR5 = 0;
-    base->TMR = 0;
+    base->TMR  = 0;
 }
 
 void SAI_RxReset(I2S_Type *base)
@@ -526,27 +505,23 @@ void SAI_RxReset(I2S_Type *base)
     base->RCR3 = 0;
     base->RCR4 = 0;
     base->RCR5 = 0;
-    base->RMR = 0;
+    base->RMR  = 0;
 }
 
 void SAI_TxEnable(I2S_Type *base, bool enable)
 {
-    if (enable)
-    {
+    if (enable) {
         /* If clock is sync with Rx, should enable RE bit. */
-        if (((base->TCR2 & I2S_TCR2_SYNC_MASK) >> I2S_TCR2_SYNC_SHIFT) == 0x1U)
-        {
+        if (((base->TCR2 & I2S_TCR2_SYNC_MASK) >> I2S_TCR2_SYNC_SHIFT) == 0x1U) {
             base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | I2S_RCSR_RE_MASK);
         }
         base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_TE_MASK);
         /* Also need to clear the FIFO error flag before start */
         SAI_TxClearStatusFlags(base, kSAI_FIFOErrorFlag);
     }
-    else
-    {
+    else {
         /* If RE not sync with TE, than disable TE, otherwise, shall not disable TE */
-        if (((base->RCR2 & I2S_RCR2_SYNC_MASK) >> I2S_RCR2_SYNC_SHIFT) != 0x1U)
-        {
+        if (((base->RCR2 & I2S_RCR2_SYNC_MASK) >> I2S_RCR2_SYNC_SHIFT) != 0x1U) {
             /* Should not close RE even sync with Rx */
             base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~I2S_TCSR_TE_MASK));
         }
@@ -555,22 +530,18 @@ void SAI_TxEnable(I2S_Type *base, bool enable)
 
 void SAI_RxEnable(I2S_Type *base, bool enable)
 {
-    if (enable)
-    {
+    if (enable) {
         /* If clock is sync with Tx, should enable TE bit. */
-        if (((base->RCR2 & I2S_RCR2_SYNC_MASK) >> I2S_RCR2_SYNC_SHIFT) == 0x1U)
-        {
+        if (((base->RCR2 & I2S_RCR2_SYNC_MASK) >> I2S_RCR2_SYNC_SHIFT) == 0x1U) {
             base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_TE_MASK);
         }
         base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | I2S_RCSR_RE_MASK);
         /* Also need to clear the FIFO error flag before start */
         SAI_RxClearStatusFlags(base, kSAI_FIFOErrorFlag);
     }
-    else
-    {
+    else {
         /* While TX is not sync with RX, close RX */
-        if (((base->TCR2 & I2S_TCR2_SYNC_MASK) >> I2S_TCR2_SYNC_SHIFT) != 0x1U)
-        {
+        if (((base->TCR2 & I2S_TCR2_SYNC_MASK) >> I2S_TCR2_SYNC_SHIFT) != 0x1U) {
             base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~I2S_RCSR_RE_MASK));
         }
     }
@@ -676,58 +647,49 @@ void SAI_TxSetFormat(I2S_Type *base,
                      uint32_t mclkSourceClockHz,
                      uint32_t bclkSourceClockHz)
 {
-    uint32_t bclk = 0;
-    uint32_t val = 0;
+    uint32_t bclk     = 0;
+    uint32_t val      = 0;
     uint32_t channels = 2U;
 
-    if (format->stereo != kSAI_Stereo)
-    {
+    if (format->stereo != kSAI_Stereo) {
         channels = 1U;
     }
 
-    if (format->isFrameSyncCompact)
-    {
+    if (format->isFrameSyncCompact) {
         bclk = format->sampleRate_Hz * format->bitWidth * channels;
-        val = (base->TCR4 & (~I2S_TCR4_SYWD_MASK));
+        val  = (base->TCR4 & (~I2S_TCR4_SYWD_MASK));
         val |= I2S_TCR4_SYWD(format->bitWidth - 1U);
         base->TCR4 = val;
     }
-    else
-    {
+    else {
         bclk = format->sampleRate_Hz * 32U * 2U;
     }
 
 /* Compute the mclk */
 #if defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)
     /* Check if master clock divider enabled, then set master clock divider */
-    if (base->MCR & I2S_MCR_MOE_MASK)
-    {
+    if (base->MCR & I2S_MCR_MOE_MASK) {
         SAI_SetMasterClockDivider(base, format->masterClockHz, mclkSourceClockHz);
     }
 #endif /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */
 
     /* Set bclk if needed */
-    if (base->TCR2 & I2S_TCR2_BCD_MASK)
-    {
+    if (base->TCR2 & I2S_TCR2_BCD_MASK) {
         base->TCR2 &= ~I2S_TCR2_DIV_MASK;
 
-        base->TCR2 |= I2S_TCR2_DIV((bclkSourceClockHz/bclk) / 2U - 1U);
+        base->TCR2 |= I2S_TCR2_DIV((bclkSourceClockHz / bclk) / 2U - 1U);
     }
 
     /* Set bitWidth */
     val = (format->isFrameSyncCompact) ? (format->bitWidth - 1) : 31U;
-    if (format->protocol == kSAI_BusRightJustified)
-    {
+    if (format->protocol == kSAI_BusRightJustified) {
         base->TCR5 = I2S_TCR5_WNW(val) | I2S_TCR5_W0W(val) | I2S_TCR5_FBT(val);
     }
-    else
-    {
-        if (base->TCR4 & I2S_TCR4_MF_MASK)
-        {
+    else {
+        if (base->TCR4 & I2S_TCR4_MF_MASK) {
             base->TCR5 = I2S_TCR5_WNW(val) | I2S_TCR5_W0W(val) | I2S_TCR5_FBT(format->bitWidth - 1);
         }
-        else
-        {
+        else {
             base->TCR5 = I2S_TCR5_WNW(val) | I2S_TCR5_W0W(val) | I2S_TCR5_FBT(0);
         }
     }
@@ -750,57 +712,48 @@ void SAI_RxSetFormat(I2S_Type *base,
                      uint32_t mclkSourceClockHz,
                      uint32_t bclkSourceClockHz)
 {
-    uint32_t bclk = 0;
-    uint32_t val = 0;
+    uint32_t bclk     = 0;
+    uint32_t val      = 0;
     uint32_t channels = 2U;
 
-    if (format->stereo != kSAI_Stereo)
-    {
+    if (format->stereo != kSAI_Stereo) {
         channels = 1U;
     }
 
-    if (format->isFrameSyncCompact)
-    {
+    if (format->isFrameSyncCompact) {
         bclk = format->sampleRate_Hz * format->bitWidth * channels;
-        val = (base->RCR4 & (~I2S_RCR4_SYWD_MASK));
+        val  = (base->RCR4 & (~I2S_RCR4_SYWD_MASK));
         val |= I2S_RCR4_SYWD(format->bitWidth - 1U);
         base->RCR4 = val;
     }
-    else
-    {
+    else {
         bclk = format->sampleRate_Hz * 32U * 2U;
     }
 
 /* Compute the mclk */
 #if defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)
     /* Check if master clock divider enabled */
-    if (base->MCR & I2S_MCR_MOE_MASK)
-    {
+    if (base->MCR & I2S_MCR_MOE_MASK) {
         SAI_SetMasterClockDivider(base, format->masterClockHz, mclkSourceClockHz);
     }
 #endif /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */
 
     /* Set bclk if needed */
-    if (base->RCR2 & I2S_RCR2_BCD_MASK)
-    {
+    if (base->RCR2 & I2S_RCR2_BCD_MASK) {
         base->RCR2 &= ~I2S_RCR2_DIV_MASK;
         base->RCR2 |= I2S_RCR2_DIV((bclkSourceClockHz / bclk) / 2U - 1U);
     }
 
     /* Set bitWidth */
     val = (format->isFrameSyncCompact) ? (format->bitWidth - 1) : 31U;
-    if (format->protocol == kSAI_BusRightJustified)
-    {
+    if (format->protocol == kSAI_BusRightJustified) {
         base->RCR5 = I2S_RCR5_WNW(val) | I2S_RCR5_W0W(val) | I2S_RCR5_FBT(val);
     }
-    else
-    {
-        if (base->RCR4 & I2S_RCR4_MF_MASK)
-        {
+    else {
+        if (base->RCR4 & I2S_RCR4_MF_MASK) {
             base->RCR5 = I2S_RCR5_WNW(val) | I2S_RCR5_W0W(val) | I2S_RCR5_FBT(format->bitWidth - 1);
         }
-        else
-        {
+        else {
             base->RCR5 = I2S_RCR5_WNW(val) | I2S_RCR5_W0W(val) | I2S_RCR5_FBT(0);
         }
     }
@@ -820,15 +773,12 @@ void SAI_RxSetFormat(I2S_Type *base,
 
 void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)
 {
-    uint32_t i = 0;
+    uint32_t i           = 0;
     uint8_t bytesPerWord = bitWidth / 8U;
 
-    while (i < size)
-    {
+    while (i < size) {
         /* Wait until it can write data */
-        while (!(base->TCSR & I2S_TCSR_FWF_MASK))
-        {
-        }
+        while (!(base->TCSR & I2S_TCSR_FWF_MASK)) {}
 
         SAI_WriteNonBlocking(base, channel, bitWidth, buffer, bytesPerWord);
         buffer += bytesPerWord;
@@ -836,22 +786,17 @@ void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint
     }
 
     /* Wait until the last data is sent */
-    while (!(base->TCSR & I2S_TCSR_FWF_MASK))
-    {
-    }
+    while (!(base->TCSR & I2S_TCSR_FWF_MASK)) {}
 }
 
 void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)
 {
-    uint32_t i = 0;
+    uint32_t i           = 0;
     uint8_t bytesPerWord = bitWidth / 8U;
 
-    while (i < size)
-    {
+    while (i < size) {
         /* Wait until data is received */
-        while (!(base->RCSR & I2S_RCSR_FWF_MASK))
-        {
-        }
+        while (!(base->RCSR & I2S_RCSR_FWF_MASK)) {}
 
         SAI_ReadNonBlocking(base, channel, bitWidth, buffer, bytesPerWord);
         buffer += bytesPerWord;
@@ -905,8 +850,7 @@ status_t SAI_TransferTxSetFormat(I2S_Type *base,
 {
     assert(handle);
 
-    if ((mclkSourceClockHz < format->sampleRate_Hz) || (bclkSourceClockHz < format->sampleRate_Hz))
-    {
+    if ((mclkSourceClockHz < format->sampleRate_Hz) || (bclkSourceClockHz < format->sampleRate_Hz)) {
         return kStatus_InvalidArgument;
     }
 
@@ -930,8 +874,7 @@ status_t SAI_TransferRxSetFormat(I2S_Type *base,
 {
     assert(handle);
 
-    if ((mclkSourceClockHz < format->sampleRate_Hz) || (bclkSourceClockHz < format->sampleRate_Hz))
-    {
+    if ((mclkSourceClockHz < format->sampleRate_Hz) || (bclkSourceClockHz < format->sampleRate_Hz)) {
         return kStatus_InvalidArgument;
     }
 
@@ -952,16 +895,15 @@ status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_t
     assert(handle);
 
     /* Check if the queue is full */
-    if (handle->saiQueue[handle->queueUser].data)
-    {
+    if (handle->saiQueue[handle->queueUser].data) {
         return kStatus_SAI_QueueFull;
     }
 
     /* Add into queue */
-    handle->transferSize[handle->queueUser] = xfer->dataSize;
-    handle->saiQueue[handle->queueUser].data = xfer->data;
+    handle->transferSize[handle->queueUser]      = xfer->dataSize;
+    handle->saiQueue[handle->queueUser].data     = xfer->data;
     handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
-    handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
+    handle->queueUser                            = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
 
     /* Set the state to busy */
     handle->state = kSAI_Busy;
@@ -985,16 +927,15 @@ status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sa
     assert(handle);
 
     /* Check if the queue is full */
-    if (handle->saiQueue[handle->queueUser].data)
-    {
+    if (handle->saiQueue[handle->queueUser].data) {
         return kStatus_SAI_QueueFull;
     }
 
     /* Add into queue */
-    handle->transferSize[handle->queueUser] = xfer->dataSize;
-    handle->saiQueue[handle->queueUser].data = xfer->data;
+    handle->transferSize[handle->queueUser]      = xfer->dataSize;
+    handle->saiQueue[handle->queueUser].data     = xfer->data;
     handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
-    handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
+    handle->queueUser                            = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
 
     /* Set state to busy */
     handle->state = kSAI_Busy;
@@ -1019,12 +960,10 @@ status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *
 
     status_t status = kStatus_Success;
 
-    if (handle->state != kSAI_Busy)
-    {
+    if (handle->state != kSAI_Busy) {
         status = kStatus_NoTransferInProgress;
     }
-    else
-    {
+    else {
         *count = (handle->transferSize[handle->queueDriver] - handle->saiQueue[handle->queueDriver].dataSize);
     }
 
@@ -1037,12 +976,10 @@ status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_
 
     status_t status = kStatus_Success;
 
-    if (handle->state != kSAI_Busy)
-    {
+    if (handle->state != kSAI_Busy) {
         status = kStatus_NoTransferInProgress;
     }
-    else
-    {
+    else {
         *count = (handle->transferSize[handle->queueDriver] - handle->saiQueue[handle->queueDriver].dataSize);
     }
 
@@ -1067,7 +1004,7 @@ void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle)
     /* Clear the queue */
     memset(handle->saiQueue, 0, sizeof(sai_transfer_t) * SAI_XFER_QUEUE_SIZE);
     handle->queueDriver = 0;
-    handle->queueUser = 0;
+    handle->queueUser   = 0;
 }
 
 void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle)
@@ -1088,7 +1025,7 @@ void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle)
     /* Clear the queue */
     memset(handle->saiQueue, 0, sizeof(sai_transfer_t) * SAI_XFER_QUEUE_SIZE);
     handle->queueDriver = 0;
-    handle->queueUser = 0;
+    handle->queueUser   = 0;
 }
 
 void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle)
@@ -1101,7 +1038,7 @@ void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle)
     /* Clear all the internal information */
     memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
     memset(handle->transferSize, 0U, sizeof(handle->transferSize));
-    handle->queueUser = 0U;
+    handle->queueUser   = 0U;
     handle->queueDriver = 0U;
 }
 
@@ -1115,7 +1052,7 @@ void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle)
     /* Clear all the internal information */
     memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
     memset(handle->transferSize, 0U, sizeof(handle->transferSize));
-    handle->queueUser = 0U;
+    handle->queueUser   = 0U;
     handle->queueDriver = 0U;
 }
 
@@ -1123,12 +1060,11 @@ void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
 {
     assert(handle);
 
-    uint8_t *buffer = handle->saiQueue[handle->queueDriver].data;
+    uint8_t *buffer  = handle->saiQueue[handle->queueDriver].data;
     uint8_t dataSize = handle->bitWidth / 8U;
 
     /* Handle Error */
-    if (base->TCSR & I2S_TCSR_FEF_MASK)
-    {
+    if (base->TCSR & I2S_TCSR_FEF_MASK) {
         /* Clear FIFO error flag to continue transfer */
         SAI_TxClearStatusFlags(base, kSAI_FIFOErrorFlag);
 
@@ -1136,16 +1072,14 @@ void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
         SAI_TxSoftwareReset(base, kSAI_ResetTypeFIFO);
 
         /* Call the callback */
-        if (handle->callback)
-        {
+        if (handle->callback) {
             (handle->callback)(base, handle, kStatus_SAI_TxError, handle->userData);
         }
     }
 
 /* Handle transfer */
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
-    if (base->TCSR & I2S_TCSR_FRF_MASK)
-    {
+    if (base->TCSR & I2S_TCSR_FRF_MASK) {
         /* Judge if the data need to transmit is less than space */
         uint8_t size = MIN((handle->saiQueue[handle->queueDriver].dataSize),
                            (size_t)((FSL_FEATURE_SAI_FIFO_COUNT - handle->watermark) * dataSize));
@@ -1158,8 +1092,7 @@ void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
         handle->saiQueue[handle->queueDriver].data += size;
     }
 #else
-    if (base->TCSR & I2S_TCSR_FWF_MASK)
-    {
+    if (base->TCSR & I2S_TCSR_FWF_MASK) {
         uint8_t size = MIN((handle->saiQueue[handle->queueDriver].dataSize), dataSize);
 
         SAI_WriteNonBlocking(base, handle->channel, handle->bitWidth, buffer, size);
@@ -1171,19 +1104,16 @@ void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
 #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
 
     /* If finished a blcok, call the callback function */
-    if (handle->saiQueue[handle->queueDriver].dataSize == 0U)
-    {
+    if (handle->saiQueue[handle->queueDriver].dataSize == 0U) {
         memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
         handle->queueDriver = (handle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
-        if (handle->callback)
-        {
+        if (handle->callback) {
             (handle->callback)(base, handle, kStatus_SAI_TxIdle, handle->userData);
         }
     }
 
     /* If all data finished, just stop the transfer */
-    if (handle->saiQueue[handle->queueDriver].data == NULL)
-    {
+    if (handle->saiQueue[handle->queueDriver].data == NULL) {
         SAI_TransferAbortSend(base, handle);
     }
 }
@@ -1192,12 +1122,11 @@ void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
 {
     assert(handle);
 
-    uint8_t *buffer = handle->saiQueue[handle->queueDriver].data;
+    uint8_t *buffer  = handle->saiQueue[handle->queueDriver].data;
     uint8_t dataSize = handle->bitWidth / 8U;
 
     /* Handle Error */
-    if (base->RCSR & I2S_RCSR_FEF_MASK)
-    {
+    if (base->RCSR & I2S_RCSR_FEF_MASK) {
         /* Clear FIFO error flag to continue transfer */
         SAI_RxClearStatusFlags(base, kSAI_FIFOErrorFlag);
 
@@ -1205,16 +1134,14 @@ void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
         SAI_RxSoftwareReset(base, kSAI_ResetTypeFIFO);
 
         /* Call the callback */
-        if (handle->callback)
-        {
+        if (handle->callback) {
             (handle->callback)(base, handle, kStatus_SAI_RxError, handle->userData);
         }
     }
 
 /* Handle transfer */
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
-    if (base->RCSR & I2S_RCSR_FRF_MASK)
-    {
+    if (base->RCSR & I2S_RCSR_FRF_MASK) {
         /* Judge if the data need to transmit is less than space */
         uint8_t size = MIN((handle->saiQueue[handle->queueDriver].dataSize), (handle->watermark * dataSize));
 
@@ -1226,8 +1153,7 @@ void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
         handle->saiQueue[handle->queueDriver].data += size;
     }
 #else
-    if (base->RCSR & I2S_RCSR_FWF_MASK)
-    {
+    if (base->RCSR & I2S_RCSR_FWF_MASK) {
         uint8_t size = MIN((handle->saiQueue[handle->queueDriver].dataSize), dataSize);
 
         SAI_ReadNonBlocking(base, handle->channel, handle->bitWidth, buffer, size);
@@ -1239,19 +1165,16 @@ void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)
 #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
 
     /* If finished a blcok, call the callback function */
-    if (handle->saiQueue[handle->queueDriver].dataSize == 0U)
-    {
+    if (handle->saiQueue[handle->queueDriver].dataSize == 0U) {
         memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
         handle->queueDriver = (handle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
-        if (handle->callback)
-        {
+        if (handle->callback) {
             (handle->callback)(base, handle, kStatus_SAI_RxIdle, handle->userData);
         }
     }
 
     /* If all data finished, just stop the transfer */
-    if (handle->saiQueue[handle->queueDriver].data == NULL)
-    {
+    if (handle->saiQueue[handle->queueDriver].data == NULL) {
         SAI_TransferAbortReceive(base, handle);
     }
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.h
index 82dd26bfa..42d055c2d 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai.h
@@ -54,13 +54,13 @@
 /*! @brief SAI return status*/
 enum _sai_status_t
 {
-    kStatus_SAI_TxBusy = MAKE_STATUS(kStatusGroup_SAI, 0),    /*!< SAI Tx is busy. */
-    kStatus_SAI_RxBusy = MAKE_STATUS(kStatusGroup_SAI, 1),    /*!< SAI Rx is busy. */
-    kStatus_SAI_TxError = MAKE_STATUS(kStatusGroup_SAI, 2),   /*!< SAI Tx FIFO error. */
-    kStatus_SAI_RxError = MAKE_STATUS(kStatusGroup_SAI, 3),   /*!< SAI Rx FIFO error. */
+    kStatus_SAI_TxBusy    = MAKE_STATUS(kStatusGroup_SAI, 0), /*!< SAI Tx is busy. */
+    kStatus_SAI_RxBusy    = MAKE_STATUS(kStatusGroup_SAI, 1), /*!< SAI Rx is busy. */
+    kStatus_SAI_TxError   = MAKE_STATUS(kStatusGroup_SAI, 2), /*!< SAI Tx FIFO error. */
+    kStatus_SAI_RxError   = MAKE_STATUS(kStatusGroup_SAI, 3), /*!< SAI Rx FIFO error. */
     kStatus_SAI_QueueFull = MAKE_STATUS(kStatusGroup_SAI, 4), /*!< SAI transfer queue is full. */
-    kStatus_SAI_TxIdle = MAKE_STATUS(kStatusGroup_SAI, 5),    /*!< SAI Tx is idle */
-    kStatus_SAI_RxIdle = MAKE_STATUS(kStatusGroup_SAI, 6)     /*!< SAI Rx is idle */
+    kStatus_SAI_TxIdle    = MAKE_STATUS(kStatusGroup_SAI, 5), /*!< SAI Tx is idle */
+    kStatus_SAI_RxIdle    = MAKE_STATUS(kStatusGroup_SAI, 6)  /*!< SAI Rx is idle */
 };
 
 /*! @brief Define the SAI bus type */
@@ -77,7 +77,7 @@ typedef enum _sai_protocol
 typedef enum _sai_master_slave
 {
     kSAI_Master = 0x0U, /*!< Master mode */
-    kSAI_Slave = 0x1U   /*!< Slave mode */
+    kSAI_Slave  = 0x1U  /*!< Slave mode */
 } sai_master_slave_t;
 
 /*! @brief Mono or stereo audio format */
@@ -134,9 +134,9 @@ enum _sai_interrupt_enable_t
 {
     kSAI_WordStartInterruptEnable =
         I2S_TCSR_WSIE_MASK, /*!< Word start flag, means the first word in a frame detected */
-    kSAI_SyncErrorInterruptEnable = I2S_TCSR_SEIE_MASK,   /*!< Sync error flag, means the sync error is detected */
+    kSAI_SyncErrorInterruptEnable   = I2S_TCSR_SEIE_MASK, /*!< Sync error flag, means the sync error is detected */
     kSAI_FIFOWarningInterruptEnable = I2S_TCSR_FWIE_MASK, /*!< FIFO warning flag, means the FIFO is empty */
-    kSAI_FIFOErrorInterruptEnable = I2S_TCSR_FEIE_MASK,   /*!< FIFO error flag */
+    kSAI_FIFOErrorInterruptEnable   = I2S_TCSR_FEIE_MASK, /*!< FIFO error flag */
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
     kSAI_FIFORequestInterruptEnable = I2S_TCSR_FRIE_MASK, /*!< FIFO request, means reached watermark */
 #endif                                                    /* FSL_FEATURE_SAI_FIFO_COUNT */
@@ -166,9 +166,9 @@ enum _sai_flags
 /*! @brief The reset type */
 typedef enum _sai_reset_type
 {
-    kSAI_ResetTypeSoftware = I2S_TCSR_SR_MASK,          /*!< Software reset, reset the logic state */
-    kSAI_ResetTypeFIFO = I2S_TCSR_FR_MASK,              /*!< FIFO reset, reset the FIFO read and write pointer */
-    kSAI_ResetAll = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK /*!< All reset. */
+    kSAI_ResetTypeSoftware = I2S_TCSR_SR_MASK, /*!< Software reset, reset the logic state */
+    kSAI_ResetTypeFIFO     = I2S_TCSR_FR_MASK, /*!< FIFO reset, reset the FIFO read and write pointer */
+    kSAI_ResetAll          = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK /*!< All reset. */
 } sai_reset_type_t;
 
 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
@@ -179,8 +179,8 @@ typedef enum _sai_reset_type
 typedef enum _sai_fifo_packing
 {
     kSAI_FifoPackingDisabled = 0x0U, /*!< Packing disabled */
-    kSAI_FifoPacking8bit = 0x2U,     /*!< 8 bit packing enabled */
-    kSAI_FifoPacking16bit = 0x3U     /*!< 16bit packing enabled */
+    kSAI_FifoPacking8bit     = 0x2U, /*!< 8 bit packing enabled */
+    kSAI_FifoPacking16bit    = 0x3U  /*!< 16bit packing enabled */
 } sai_fifo_packing_t;
 #endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
 
@@ -203,22 +203,22 @@ typedef struct _sai_config
 /*! @brief Audio sample rate */
 typedef enum _sai_sample_rate
 {
-    kSAI_SampleRate8KHz = 8000U,     /*!< Sample rate 8000 Hz */
+    kSAI_SampleRate8KHz    = 8000U,  /*!< Sample rate 8000 Hz */
     kSAI_SampleRate11025Hz = 11025U, /*!< Sample rate 11025 Hz */
-    kSAI_SampleRate12KHz = 12000U,   /*!< Sample rate 12000 Hz */
-    kSAI_SampleRate16KHz = 16000U,   /*!< Sample rate 16000 Hz */
+    kSAI_SampleRate12KHz   = 12000U, /*!< Sample rate 12000 Hz */
+    kSAI_SampleRate16KHz   = 16000U, /*!< Sample rate 16000 Hz */
     kSAI_SampleRate22050Hz = 22050U, /*!< Sample rate 22050 Hz */
-    kSAI_SampleRate24KHz = 24000U,   /*!< Sample rate 24000 Hz */
-    kSAI_SampleRate32KHz = 32000U,   /*!< Sample rate 32000 Hz */
+    kSAI_SampleRate24KHz   = 24000U, /*!< Sample rate 24000 Hz */
+    kSAI_SampleRate32KHz   = 32000U, /*!< Sample rate 32000 Hz */
     kSAI_SampleRate44100Hz = 44100U, /*!< Sample rate 44100 Hz */
-    kSAI_SampleRate48KHz = 48000U,   /*!< Sample rate 48000 Hz */
-    kSAI_SampleRate96KHz = 96000U    /*!< Sample rate 96000 Hz */
+    kSAI_SampleRate48KHz   = 48000U, /*!< Sample rate 48000 Hz */
+    kSAI_SampleRate96KHz   = 96000U  /*!< Sample rate 96000 Hz */
 } sai_sample_rate_t;
 
 /*! @brief Audio word width */
 typedef enum _sai_word_width
 {
-    kSAI_WordWidth8bits = 8U,   /*!< Audio data width 8 bits */
+    kSAI_WordWidth8bits  = 8U,  /*!< Audio data width 8 bits */
     kSAI_WordWidth16bits = 16U, /*!< Audio data width 16 bits */
     kSAI_WordWidth24bits = 24U, /*!< Audio data width 24 bits */
     kSAI_WordWidth32bits = 32U  /*!< Audio data width 32 bits */
@@ -274,765 +274,764 @@ struct _sai_handle
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif /*_cplusplus*/
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Initializes the SAI Tx peripheral.
- *
- * Ungates the SAI clock, resets the module, and configures SAI Tx with a configuration structure.
- * The configuration structure can be custom filled or set with default values by
- * SAI_TxGetDefaultConfig().
- *
- * @note  This API should be called at the beginning of the application to use
- * the SAI driver. Otherwise, accessing the SAIM module can cause a hard fault
- * because the clock is not enabled.
- *
- * @param base SAI base pointer
- * @param config SAI configuration structure.
-*/
-void SAI_TxInit(I2S_Type *base, const sai_config_t *config);
+    /*!
+     * @brief Initializes the SAI Tx peripheral.
+     *
+     * Ungates the SAI clock, resets the module, and configures SAI Tx with a configuration structure.
+     * The configuration structure can be custom filled or set with default values by
+     * SAI_TxGetDefaultConfig().
+     *
+     * @note  This API should be called at the beginning of the application to use
+     * the SAI driver. Otherwise, accessing the SAIM module can cause a hard fault
+     * because the clock is not enabled.
+     *
+     * @param base SAI base pointer
+     * @param config SAI configuration structure.
+     */
+    void SAI_TxInit(I2S_Type *base, const sai_config_t *config);
 
-/*!
- * @brief Initializes the SAI Rx peripheral.
- *
- * Ungates the SAI clock, resets the module, and configures the SAI Rx with a configuration structure.
- * The configuration structure can be custom filled or set with default values by
- * SAI_RxGetDefaultConfig().
- *
- * @note  This API should be called at the beginning of the application to use
- * the SAI driver. Otherwise, accessing the SAI module can cause a hard fault
- * because the clock is not enabled.
- *
- * @param base SAI base pointer
- * @param config SAI configuration structure.
- */
-void SAI_RxInit(I2S_Type *base, const sai_config_t *config);
+    /*!
+     * @brief Initializes the SAI Rx peripheral.
+     *
+     * Ungates the SAI clock, resets the module, and configures the SAI Rx with a configuration structure.
+     * The configuration structure can be custom filled or set with default values by
+     * SAI_RxGetDefaultConfig().
+     *
+     * @note  This API should be called at the beginning of the application to use
+     * the SAI driver. Otherwise, accessing the SAI module can cause a hard fault
+     * because the clock is not enabled.
+     *
+     * @param base SAI base pointer
+     * @param config SAI configuration structure.
+     */
+    void SAI_RxInit(I2S_Type *base, const sai_config_t *config);
 
-/*!
- * @brief  Sets the SAI Tx configuration structure to default values.
- *
- * This API initializes the configuration structure for use in SAI_TxConfig().
- * The initialized structure can remain unchanged in SAI_TxConfig(), or it can be modified
- *  before calling SAI_TxConfig().
- * This is an example.
-   @code
-   sai_config_t config;
-   SAI_TxGetDefaultConfig(&config);
-   @endcode
- *
- * @param config pointer to master configuration structure
- */
-void SAI_TxGetDefaultConfig(sai_config_t *config);
+    /*!
+     * @brief  Sets the SAI Tx configuration structure to default values.
+     *
+     * This API initializes the configuration structure for use in SAI_TxConfig().
+     * The initialized structure can remain unchanged in SAI_TxConfig(), or it can be modified
+     *  before calling SAI_TxConfig().
+     * This is an example.
+       @code
+       sai_config_t config;
+       SAI_TxGetDefaultConfig(&config);
+       @endcode
+     *
+     * @param config pointer to master configuration structure
+     */
+    void SAI_TxGetDefaultConfig(sai_config_t *config);
 
-/*!
- * @brief  Sets the SAI Rx configuration structure to default values.
- *
- * This API initializes the configuration structure for use in SAI_RxConfig().
- * The initialized structure can remain unchanged in SAI_RxConfig() or it can be modified
- *  before calling SAI_RxConfig().
- * This is an example.
-   @code
-   sai_config_t config;
-   SAI_RxGetDefaultConfig(&config);
-   @endcode
- *
- * @param config pointer to master configuration structure
- */
-void SAI_RxGetDefaultConfig(sai_config_t *config);
+    /*!
+     * @brief  Sets the SAI Rx configuration structure to default values.
+     *
+     * This API initializes the configuration structure for use in SAI_RxConfig().
+     * The initialized structure can remain unchanged in SAI_RxConfig() or it can be modified
+     *  before calling SAI_RxConfig().
+     * This is an example.
+       @code
+       sai_config_t config;
+       SAI_RxGetDefaultConfig(&config);
+       @endcode
+     *
+     * @param config pointer to master configuration structure
+     */
+    void SAI_RxGetDefaultConfig(sai_config_t *config);
 
-/*!
- * @brief De-initializes the SAI peripheral.
- *
- * This API gates the SAI clock. The SAI module can't operate unless SAI_TxInit
- * or SAI_RxInit is called to enable the clock.
- *
- * @param base SAI base pointer
-*/
-void SAI_Deinit(I2S_Type *base);
+    /*!
+     * @brief De-initializes the SAI peripheral.
+     *
+     * This API gates the SAI clock. The SAI module can't operate unless SAI_TxInit
+     * or SAI_RxInit is called to enable the clock.
+     *
+     * @param base SAI base pointer
+     */
+    void SAI_Deinit(I2S_Type *base);
 
-/*!
- * @brief Resets the SAI Tx.
- *
- * This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit.
- *
- * @param base SAI base pointer
- */
-void SAI_TxReset(I2S_Type *base);
+    /*!
+     * @brief Resets the SAI Tx.
+     *
+     * This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit.
+     *
+     * @param base SAI base pointer
+     */
+    void SAI_TxReset(I2S_Type *base);
 
-/*!
- * @brief Resets the SAI Rx.
- *
- * This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit.
- *
- * @param base SAI base pointer
- */
-void SAI_RxReset(I2S_Type *base);
+    /*!
+     * @brief Resets the SAI Rx.
+     *
+     * This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit.
+     *
+     * @param base SAI base pointer
+     */
+    void SAI_RxReset(I2S_Type *base);
 
-/*!
- * @brief Enables/disables the SAI Tx.
- *
- * @param base SAI base pointer
- * @param enable True means enable SAI Tx, false means disable.
- */
-void SAI_TxEnable(I2S_Type *base, bool enable);
+    /*!
+     * @brief Enables/disables the SAI Tx.
+     *
+     * @param base SAI base pointer
+     * @param enable True means enable SAI Tx, false means disable.
+     */
+    void SAI_TxEnable(I2S_Type *base, bool enable);
 
-/*!
- * @brief Enables/disables the SAI Rx.
- *
- * @param base SAI base pointer
- * @param enable True means enable SAI Rx, false means disable.
- */
-void SAI_RxEnable(I2S_Type *base, bool enable);
+    /*!
+     * @brief Enables/disables the SAI Rx.
+     *
+     * @param base SAI base pointer
+     * @param enable True means enable SAI Rx, false means disable.
+     */
+    void SAI_RxEnable(I2S_Type *base, bool enable);
 
-/*! @} */
+    /*! @} */
 
-/*!
- * @name Status
- * @{
- */
+    /*!
+     * @name Status
+     * @{
+     */
 
-/*!
- * @brief Gets the SAI Tx status flag state.
- *
- * @param base SAI base pointer
- * @return SAI Tx status flag value. Use the Status Mask to get the status value needed.
- */
-static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)
-{
-    return base->TCSR;
-}
-
-/*!
- * @brief Clears the SAI Tx status flag state.
- *
- * @param base SAI base pointer
- * @param mask State mask. It can be a combination of the following source if defined:
- *        @arg kSAI_WordStartFlag
- *        @arg kSAI_SyncErrorFlag
- *        @arg kSAI_FIFOErrorFlag
- */
-static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)
-{
-    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
-}
-
-/*!
- * @brief Gets the SAI Tx status flag state.
- *
- * @param base SAI base pointer
- * @return SAI Rx status flag value. Use the Status Mask to get the status value needed.
- */
-static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)
-{
-    return base->RCSR;
-}
-
-/*!
- * @brief Clears the SAI Rx status flag state.
- *
- * @param base SAI base pointer
- * @param mask State mask. It can be a combination of the following sources if defined.
- *        @arg kSAI_WordStartFlag
- *        @arg kSAI_SyncErrorFlag
- *        @arg kSAI_FIFOErrorFlag
- */
-static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)
-{
-    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
-}
-
-/*!
- * @brief Do software reset or FIFO reset .
- *
- * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
- * Software reset means claer the Tx internal logic, including the bit clock, frame count etc. But software
- * reset will not clear any configuration registers like TCR1~TCR5.
- * This function will also clear all the error flags such as FIFO error, sync error etc.
- *
- * @param base SAI base pointer
- * @param type Reset type, FIFO reset or software reset
- */
-void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
-
-/*!
- * @brief Do software reset or FIFO reset .
- *
- * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
- * Software reset means claer the Rx internal logic, including the bit clock, frame count etc. But software
- * reset will not clear any configuration registers like RCR1~RCR5.
- * This function will also clear all the error flags such as FIFO error, sync error etc.
- *
- * @param base SAI base pointer
- * @param type Reset type, FIFO reset or software reset
- */
-void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
-
-/*!
- * @brief Set the Tx channel FIFO enable mask.
- *
- * @param base SAI base pointer
- * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
- * 3 means both channel 0 and channel 1 enabled.
- */
-void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
-
-/*!
- * @brief Set the Rx channel FIFO enable mask.
- *
- * @param base SAI base pointer
- * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
- * 3 means both channel 0 and channel 1 enabled.
- */
-void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
-
-/*!
- * @brief Set the Tx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order);
-
-/*!
- * @brief Set the Rx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order);
-
-/*!
- * @brief Set the Tx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
-
-/*!
- * @brief Set the Rx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
-
-/*!
- * @brief Set the Tx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
-
-/*!
- * @brief Set the Rx data order.
- *
- * @param base SAI base pointer
- * @param order Data order MSB or LSB
- */
-void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
-
-#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
-/*!
- * @brief Set Tx FIFO packing feature.
- *
- * @param base SAI base pointer.
- * @param pack FIFO pack type. It is element of sai_fifo_packing_t.
- */
-void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
-
-/*!
-* @brief Set Rx FIFO packing feature.
-*
-* @param base SAI base pointer.
-* @param pack FIFO pack type. It is element of sai_fifo_packing_t.
-*/
-void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
-#endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
-
-#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
-/*!
-* @brief Set Tx FIFO error continue.
-*
-* FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
-* not enabled, SAI will hang and users need to clear FEF flag in TCSR register.
-*
-* @param base SAI base pointer.
-* @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
-*/
-static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
-{
-    if (isEnabled)
+    /*!
+     * @brief Gets the SAI Tx status flag state.
+     *
+     * @param base SAI base pointer
+     * @return SAI Tx status flag value. Use the Status Mask to get the status value needed.
+     */
+    static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)
     {
-        base->TCR4 |= I2S_TCR4_FCONT_MASK;
+        return base->TCSR;
     }
-    else
-    {
-        base->TCR4 &= ~I2S_TCR4_FCONT_MASK;
-    }
-}
 
-/*!
-* @brief Set Rx FIFO error continue.
-*
-* FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
-* not enabled, SAI will hang and users need to clear FEF flag in RCSR register.
-*
-* @param base SAI base pointer.
-* @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
-*/
-static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
-{
-    if (isEnabled)
-    {
-        base->RCR4 |= I2S_RCR4_FCONT_MASK;
-    }
-    else
-    {
-        base->RCR4 &= ~I2S_RCR4_FCONT_MASK;
-    }
-}
-#endif
-/*! @} */
-
-/*!
- * @name Interrupts
- * @{
- */
-
-/*!
- * @brief Enables the SAI Tx interrupt requests.
- *
- * @param base SAI base pointer
- * @param mask interrupt source
- *     The parameter can be a combination of the following sources if defined.
- *     @arg kSAI_WordStartInterruptEnable
- *     @arg kSAI_SyncErrorInterruptEnable
- *     @arg kSAI_FIFOWarningInterruptEnable
- *     @arg kSAI_FIFORequestInterruptEnable
- *     @arg kSAI_FIFOErrorInterruptEnable
- */
-static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)
-{
-    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
-}
-
-/*!
- * @brief Enables the SAI Rx interrupt requests.
- *
- * @param base SAI base pointer
- * @param mask interrupt source
- *     The parameter can be a combination of the following sources if defined.
- *     @arg kSAI_WordStartInterruptEnable
- *     @arg kSAI_SyncErrorInterruptEnable
- *     @arg kSAI_FIFOWarningInterruptEnable
- *     @arg kSAI_FIFORequestInterruptEnable
- *     @arg kSAI_FIFOErrorInterruptEnable
- */
-static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)
-{
-    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
-}
-
-/*!
- * @brief Disables the SAI Tx interrupt requests.
- *
- * @param base SAI base pointer
- * @param mask interrupt source
- *     The parameter can be a combination of the following sources if defined.
- *     @arg kSAI_WordStartInterruptEnable
- *     @arg kSAI_SyncErrorInterruptEnable
- *     @arg kSAI_FIFOWarningInterruptEnable
- *     @arg kSAI_FIFORequestInterruptEnable
- *     @arg kSAI_FIFOErrorInterruptEnable
- */
-static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)
-{
-    base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
-}
-
-/*!
- * @brief Disables the SAI Rx interrupt requests.
- *
- * @param base SAI base pointer
- * @param mask interrupt source
- *     The parameter can be a combination of the following sources if defined.
- *     @arg kSAI_WordStartInterruptEnable
- *     @arg kSAI_SyncErrorInterruptEnable
- *     @arg kSAI_FIFOWarningInterruptEnable
- *     @arg kSAI_FIFORequestInterruptEnable
- *     @arg kSAI_FIFOErrorInterruptEnable
- */
-static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)
-{
-    base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
-}
-
-/*! @} */
-
-/*!
- * @name DMA Control
- * @{
- */
-
-/*!
- * @brief Enables/disables the SAI Tx DMA requests.
- * @param base SAI base pointer
- * @param mask DMA source
- *     The parameter can be combination of the following sources if defined.
- *     @arg kSAI_FIFOWarningDMAEnable
- *     @arg kSAI_FIFORequestDMAEnable
- * @param enable True means enable DMA, false means disable DMA.
- */
-static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Clears the SAI Tx status flag state.
+     *
+     * @param base SAI base pointer
+     * @param mask State mask. It can be a combination of the following source if defined:
+     *        @arg kSAI_WordStartFlag
+     *        @arg kSAI_SyncErrorFlag
+     *        @arg kSAI_FIFOErrorFlag
+     */
+    static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)
     {
         base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
     }
-    else
-    {
-        base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
-    }
-}
 
-/*!
- * @brief Enables/disables the SAI Rx DMA requests.
- * @param base SAI base pointer
- * @param mask DMA source
- *     The parameter can be a combination of the following sources if defined.
- *     @arg kSAI_FIFOWarningDMAEnable
- *     @arg kSAI_FIFORequestDMAEnable
- * @param enable True means enable DMA, false means disable DMA.
- */
-static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Gets the SAI Tx status flag state.
+     *
+     * @param base SAI base pointer
+     * @return SAI Rx status flag value. Use the Status Mask to get the status value needed.
+     */
+    static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)
+    {
+        return base->RCSR;
+    }
+
+    /*!
+     * @brief Clears the SAI Rx status flag state.
+     *
+     * @param base SAI base pointer
+     * @param mask State mask. It can be a combination of the following sources if defined.
+     *        @arg kSAI_WordStartFlag
+     *        @arg kSAI_SyncErrorFlag
+     *        @arg kSAI_FIFOErrorFlag
+     */
+    static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)
     {
         base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
     }
-    else
+
+    /*!
+     * @brief Do software reset or FIFO reset .
+     *
+     * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
+     * Software reset means claer the Tx internal logic, including the bit clock, frame count etc. But software
+     * reset will not clear any configuration registers like TCR1~TCR5.
+     * This function will also clear all the error flags such as FIFO error, sync error etc.
+     *
+     * @param base SAI base pointer
+     * @param type Reset type, FIFO reset or software reset
+     */
+    void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
+
+    /*!
+     * @brief Do software reset or FIFO reset .
+     *
+     * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
+     * Software reset means claer the Rx internal logic, including the bit clock, frame count etc. But software
+     * reset will not clear any configuration registers like RCR1~RCR5.
+     * This function will also clear all the error flags such as FIFO error, sync error etc.
+     *
+     * @param base SAI base pointer
+     * @param type Reset type, FIFO reset or software reset
+     */
+    void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t type);
+
+    /*!
+     * @brief Set the Tx channel FIFO enable mask.
+     *
+     * @param base SAI base pointer
+     * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
+     * 3 means both channel 0 and channel 1 enabled.
+     */
+    void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
+
+    /*!
+     * @brief Set the Rx channel FIFO enable mask.
+     *
+     * @param base SAI base pointer
+     * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
+     * 3 means both channel 0 and channel 1 enabled.
+     */
+    void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
+
+    /*!
+     * @brief Set the Tx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order);
+
+    /*!
+     * @brief Set the Rx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order);
+
+    /*!
+     * @brief Set the Tx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
+
+    /*!
+     * @brief Set the Rx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
+
+    /*!
+     * @brief Set the Tx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
+
+    /*!
+     * @brief Set the Rx data order.
+     *
+     * @param base SAI base pointer
+     * @param order Data order MSB or LSB
+     */
+    void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
+
+#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
+    /*!
+     * @brief Set Tx FIFO packing feature.
+     *
+     * @param base SAI base pointer.
+     * @param pack FIFO pack type. It is element of sai_fifo_packing_t.
+     */
+    void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
+
+    /*!
+     * @brief Set Rx FIFO packing feature.
+     *
+     * @param base SAI base pointer.
+     * @param pack FIFO pack type. It is element of sai_fifo_packing_t.
+     */
+    void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
+#endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
+
+#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
+    /*!
+     * @brief Set Tx FIFO error continue.
+     *
+     * FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
+     * not enabled, SAI will hang and users need to clear FEF flag in TCSR register.
+     *
+     * @param base SAI base pointer.
+     * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
+     */
+    static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
+    {
+        if (isEnabled) {
+            base->TCR4 |= I2S_TCR4_FCONT_MASK;
+        }
+        else {
+            base->TCR4 &= ~I2S_TCR4_FCONT_MASK;
+        }
+    }
+
+    /*!
+     * @brief Set Rx FIFO error continue.
+     *
+     * FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
+     * not enabled, SAI will hang and users need to clear FEF flag in RCSR register.
+     *
+     * @param base SAI base pointer.
+     * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
+     */
+    static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
+    {
+        if (isEnabled) {
+            base->RCR4 |= I2S_RCR4_FCONT_MASK;
+        }
+        else {
+            base->RCR4 &= ~I2S_RCR4_FCONT_MASK;
+        }
+    }
+#endif
+    /*! @} */
+
+    /*!
+     * @name Interrupts
+     * @{
+     */
+
+    /*!
+     * @brief Enables the SAI Tx interrupt requests.
+     *
+     * @param base SAI base pointer
+     * @param mask interrupt source
+     *     The parameter can be a combination of the following sources if defined.
+     *     @arg kSAI_WordStartInterruptEnable
+     *     @arg kSAI_SyncErrorInterruptEnable
+     *     @arg kSAI_FIFOWarningInterruptEnable
+     *     @arg kSAI_FIFORequestInterruptEnable
+     *     @arg kSAI_FIFOErrorInterruptEnable
+     */
+    static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)
+    {
+        base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
+    }
+
+    /*!
+     * @brief Enables the SAI Rx interrupt requests.
+     *
+     * @param base SAI base pointer
+     * @param mask interrupt source
+     *     The parameter can be a combination of the following sources if defined.
+     *     @arg kSAI_WordStartInterruptEnable
+     *     @arg kSAI_SyncErrorInterruptEnable
+     *     @arg kSAI_FIFOWarningInterruptEnable
+     *     @arg kSAI_FIFORequestInterruptEnable
+     *     @arg kSAI_FIFOErrorInterruptEnable
+     */
+    static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)
+    {
+        base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
+    }
+
+    /*!
+     * @brief Disables the SAI Tx interrupt requests.
+     *
+     * @param base SAI base pointer
+     * @param mask interrupt source
+     *     The parameter can be a combination of the following sources if defined.
+     *     @arg kSAI_WordStartInterruptEnable
+     *     @arg kSAI_SyncErrorInterruptEnable
+     *     @arg kSAI_FIFOWarningInterruptEnable
+     *     @arg kSAI_FIFORequestInterruptEnable
+     *     @arg kSAI_FIFOErrorInterruptEnable
+     */
+    static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)
+    {
+        base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
+    }
+
+    /*!
+     * @brief Disables the SAI Rx interrupt requests.
+     *
+     * @param base SAI base pointer
+     * @param mask interrupt source
+     *     The parameter can be a combination of the following sources if defined.
+     *     @arg kSAI_WordStartInterruptEnable
+     *     @arg kSAI_SyncErrorInterruptEnable
+     *     @arg kSAI_FIFOWarningInterruptEnable
+     *     @arg kSAI_FIFORequestInterruptEnable
+     *     @arg kSAI_FIFOErrorInterruptEnable
+     */
+    static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)
     {
         base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
     }
-}
 
-/*!
- * @brief  Gets the SAI Tx data register address.
- *
- * This API is used to provide a transfer address for the SAI DMA transfer configuration.
- *
- * @param base SAI base pointer.
- * @param channel Which data channel used.
- * @return data register address.
- */
-static inline uint32_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
-{
-    return (uint32_t)(&(base->TDR)[channel]);
-}
+    /*! @} */
 
-/*!
- * @brief  Gets the SAI Rx data register address.
- *
- * This API is used to provide a transfer address for the SAI DMA transfer configuration.
- *
- * @param base SAI base pointer.
- * @param channel Which data channel used.
- * @return data register address.
- */
-static inline uint32_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
-{
-    return (uint32_t)(&(base->RDR)[channel]);
-}
+    /*!
+     * @name DMA Control
+     * @{
+     */
 
-/*! @} */
+    /*!
+     * @brief Enables/disables the SAI Tx DMA requests.
+     * @param base SAI base pointer
+     * @param mask DMA source
+     *     The parameter can be combination of the following sources if defined.
+     *     @arg kSAI_FIFOWarningDMAEnable
+     *     @arg kSAI_FIFORequestDMAEnable
+     * @param enable True means enable DMA, false means disable DMA.
+     */
+    static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
+    {
+        if (enable) {
+            base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
+        }
+        else {
+            base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
+        }
+    }
 
-/*!
- * @name Bus Operations
- * @{
- */
+    /*!
+     * @brief Enables/disables the SAI Rx DMA requests.
+     * @param base SAI base pointer
+     * @param mask DMA source
+     *     The parameter can be a combination of the following sources if defined.
+     *     @arg kSAI_FIFOWarningDMAEnable
+     *     @arg kSAI_FIFORequestDMAEnable
+     * @param enable True means enable DMA, false means disable DMA.
+     */
+    static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
+    {
+        if (enable) {
+            base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
+        }
+        else {
+            base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
+        }
+    }
 
-/*!
- * @brief Configures the SAI Tx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred.
- *
- * @param base SAI base pointer.
- * @param format Pointer to the SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
- * clock, this value should equal the masterClockHz.
-*/
-void SAI_TxSetFormat(I2S_Type *base,
-                     sai_transfer_format_t *format,
-                     uint32_t mclkSourceClockHz,
-                     uint32_t bclkSourceClockHz);
+    /*!
+     * @brief  Gets the SAI Tx data register address.
+     *
+     * This API is used to provide a transfer address for the SAI DMA transfer configuration.
+     *
+     * @param base SAI base pointer.
+     * @param channel Which data channel used.
+     * @return data register address.
+     */
+    static inline uint32_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
+    {
+        return (uint32_t)(&(base->TDR)[channel]);
+    }
 
-/*!
- * @brief Configures the SAI Rx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred.
- *
- * @param base SAI base pointer.
- * @param format Pointer to the SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
- * clock, this value should equal the masterClockHz.
-*/
-void SAI_RxSetFormat(I2S_Type *base,
-                     sai_transfer_format_t *format,
-                     uint32_t mclkSourceClockHz,
-                     uint32_t bclkSourceClockHz);
+    /*!
+     * @brief  Gets the SAI Rx data register address.
+     *
+     * This API is used to provide a transfer address for the SAI DMA transfer configuration.
+     *
+     * @param base SAI base pointer.
+     * @param channel Which data channel used.
+     * @return data register address.
+     */
+    static inline uint32_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
+    {
+        return (uint32_t)(&(base->RDR)[channel]);
+    }
 
-/*!
- * @brief Sends data using a blocking method.
- *
- * @note This function blocks by polling until data is ready to be sent.
- *
- * @param base SAI base pointer.
- * @param channel Data channel used.
- * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
- * @param buffer Pointer to the data to be written.
- * @param size Bytes to be written.
- */
-void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
+    /*! @} */
 
-/*!
- * @brief Writes data into SAI FIFO.
- *
- * @param base SAI base pointer.
- * @param channel Data channel used.
- * @param data Data needs to be written.
- */
-static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)
-{
-    base->TDR[channel] = data;
-}
+    /*!
+     * @name Bus Operations
+     * @{
+     */
 
-/*!
- * @brief Receives data using a blocking method.
- *
- * @note This function blocks by polling until data is ready to be sent.
- *
- * @param base SAI base pointer.
- * @param channel Data channel used.
- * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
- * @param buffer Pointer to the data to be read.
- * @param size Bytes to be read.
- */
-void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
+    /*!
+     * @brief Configures the SAI Tx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred.
+     *
+     * @param base SAI base pointer.
+     * @param format Pointer to the SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
+     * clock, this value should equal the masterClockHz.
+     */
+    void SAI_TxSetFormat(I2S_Type *base,
+                         sai_transfer_format_t *format,
+                         uint32_t mclkSourceClockHz,
+                         uint32_t bclkSourceClockHz);
 
-/*!
- * @brief Reads data from the SAI FIFO.
- *
- * @param base SAI base pointer.
- * @param channel Data channel used.
- * @return Data in SAI FIFO.
- */
-static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)
-{
-    return base->RDR[channel];
-}
+    /*!
+     * @brief Configures the SAI Rx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred.
+     *
+     * @param base SAI base pointer.
+     * @param format Pointer to the SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
+     * clock, this value should equal the masterClockHz.
+     */
+    void SAI_RxSetFormat(I2S_Type *base,
+                         sai_transfer_format_t *format,
+                         uint32_t mclkSourceClockHz,
+                         uint32_t bclkSourceClockHz);
 
-/*! @} */
+    /*!
+     * @brief Sends data using a blocking method.
+     *
+     * @note This function blocks by polling until data is ready to be sent.
+     *
+     * @param base SAI base pointer.
+     * @param channel Data channel used.
+     * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
+     * @param buffer Pointer to the data to be written.
+     * @param size Bytes to be written.
+     */
+    void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
-/*!
- * @name Transactional
- * @{
- */
+    /*!
+     * @brief Writes data into SAI FIFO.
+     *
+     * @param base SAI base pointer.
+     * @param channel Data channel used.
+     * @param data Data needs to be written.
+     */
+    static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)
+    {
+        base->TDR[channel] = data;
+    }
 
-/*!
- * @brief Initializes the SAI Tx handle.
- *
- * This function initializes the Tx handle for the SAI Tx transactional APIs. Call
- * this function once to get the handle initialized.
- *
- * @param base SAI base pointer
- * @param handle SAI handle pointer.
- * @param callback Pointer to the user callback function.
- * @param userData User parameter passed to the callback function
- */
-void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
+    /*!
+     * @brief Receives data using a blocking method.
+     *
+     * @note This function blocks by polling until data is ready to be sent.
+     *
+     * @param base SAI base pointer.
+     * @param channel Data channel used.
+     * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
+     * @param buffer Pointer to the data to be read.
+     * @param size Bytes to be read.
+     */
+    void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
 
-/*!
- * @brief Initializes the SAI Rx handle.
- *
- * This function initializes the Rx handle for the SAI Rx transactional APIs. Call
- * this function once to get the handle initialized.
- *
- * @param base SAI base pointer.
- * @param handle SAI handle pointer.
- * @param callback Pointer to the user callback function.
- * @param userData User parameter passed to the callback function.
- */
-void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
+    /*!
+     * @brief Reads data from the SAI FIFO.
+     *
+     * @param base SAI base pointer.
+     * @param channel Data channel used.
+     * @return Data in SAI FIFO.
+     */
+    static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)
+    {
+        return base->RDR[channel];
+    }
 
-/*!
- * @brief Configures the SAI Tx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred.
- *
- * @param base SAI base pointer.
- * @param handle SAI handle pointer.
- * @param format Pointer to the SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
- * clock, this value should equal the masterClockHz in format.
- * @return Status of this function. Return value is the status_t.
-*/
-status_t SAI_TransferTxSetFormat(I2S_Type *base,
-                                 sai_handle_t *handle,
-                                 sai_transfer_format_t *format,
-                                 uint32_t mclkSourceClockHz,
-                                 uint32_t bclkSourceClockHz);
+    /*! @} */
 
-/*!
- * @brief Configures the SAI Rx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred.
- *
- * @param base SAI base pointer.
- * @param handle SAI handle pointer.
- * @param format Pointer to the SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
- * clock, this value should equal the masterClockHz in format.
- * @return Status of this function. Return value is one of status_t.
-*/
-status_t SAI_TransferRxSetFormat(I2S_Type *base,
-                                 sai_handle_t *handle,
-                                 sai_transfer_format_t *format,
-                                 uint32_t mclkSourceClockHz,
-                                 uint32_t bclkSourceClockHz);
+    /*!
+     * @name Transactional
+     * @{
+     */
 
-/*!
- * @brief Performs an interrupt non-blocking send transfer on SAI.
- *
- * @note This API returns immediately after the transfer initiates.
- * Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether
- * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
- * is finished.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- * @param xfer Pointer to the sai_transfer_t structure.
- * @retval kStatus_Success Successfully started the data receive.
- * @retval kStatus_SAI_TxBusy Previous receive still not finished.
- * @retval kStatus_InvalidArgument The input parameter is invalid.
- */
-status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
+    /*!
+     * @brief Initializes the SAI Tx handle.
+     *
+     * This function initializes the Tx handle for the SAI Tx transactional APIs. Call
+     * this function once to get the handle initialized.
+     *
+     * @param base SAI base pointer
+     * @param handle SAI handle pointer.
+     * @param callback Pointer to the user callback function.
+     * @param userData User parameter passed to the callback function
+     */
+    void SAI_TransferTxCreateHandle(I2S_Type *base,
+                                    sai_handle_t *handle,
+                                    sai_transfer_callback_t callback,
+                                    void *userData);
 
-/*!
- * @brief Performs an interrupt non-blocking receive transfer on SAI.
- *
- * @note This API returns immediately after the transfer initiates.
- * Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether
- * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
- * is finished.
- *
- * @param base SAI base pointer
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- * @param xfer Pointer to the sai_transfer_t structure.
- * @retval kStatus_Success Successfully started the data receive.
- * @retval kStatus_SAI_RxBusy Previous receive still not finished.
- * @retval kStatus_InvalidArgument The input parameter is invalid.
- */
-status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
+    /*!
+     * @brief Initializes the SAI Rx handle.
+     *
+     * This function initializes the Rx handle for the SAI Rx transactional APIs. Call
+     * this function once to get the handle initialized.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI handle pointer.
+     * @param callback Pointer to the user callback function.
+     * @param userData User parameter passed to the callback function.
+     */
+    void SAI_TransferRxCreateHandle(I2S_Type *base,
+                                    sai_handle_t *handle,
+                                    sai_transfer_callback_t callback,
+                                    void *userData);
 
-/*!
- * @brief Gets a set byte count.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- * @param count Bytes count sent.
- * @retval kStatus_Success Succeed get the transfer count.
- * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
- */
-status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
+    /*!
+     * @brief Configures the SAI Tx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI handle pointer.
+     * @param format Pointer to the SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
+     * clock, this value should equal the masterClockHz in format.
+     * @return Status of this function. Return value is the status_t.
+     */
+    status_t SAI_TransferTxSetFormat(I2S_Type *base,
+                                     sai_handle_t *handle,
+                                     sai_transfer_format_t *format,
+                                     uint32_t mclkSourceClockHz,
+                                     uint32_t bclkSourceClockHz);
 
-/*!
- * @brief Gets a received byte count.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- * @param count Bytes count received.
- * @retval kStatus_Success Succeed get the transfer count.
- * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
- */
-status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
+    /*!
+     * @brief Configures the SAI Rx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI handle pointer.
+     * @param format Pointer to the SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
+     * clock, this value should equal the masterClockHz in format.
+     * @return Status of this function. Return value is one of status_t.
+     */
+    status_t SAI_TransferRxSetFormat(I2S_Type *base,
+                                     sai_handle_t *handle,
+                                     sai_transfer_format_t *format,
+                                     uint32_t mclkSourceClockHz,
+                                     uint32_t bclkSourceClockHz);
 
-/*!
- * @brief Aborts the current send.
- *
- * @note This API can be called any time when an interrupt non-blocking transfer initiates
- * to abort the transfer early.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- */
-void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Performs an interrupt non-blocking send transfer on SAI.
+     *
+     * @note This API returns immediately after the transfer initiates.
+     * Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether
+     * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
+     * is finished.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     * @param xfer Pointer to the sai_transfer_t structure.
+     * @retval kStatus_Success Successfully started the data receive.
+     * @retval kStatus_SAI_TxBusy Previous receive still not finished.
+     * @retval kStatus_InvalidArgument The input parameter is invalid.
+     */
+    status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
 
-/*!
- * @brief Aborts the current IRQ receive.
- *
- * @note This API can be called when an interrupt non-blocking transfer initiates
- * to abort the transfer early.
- *
- * @param base SAI base pointer
- * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
- */
-void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Performs an interrupt non-blocking receive transfer on SAI.
+     *
+     * @note This API returns immediately after the transfer initiates.
+     * Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether
+     * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
+     * is finished.
+     *
+     * @param base SAI base pointer
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     * @param xfer Pointer to the sai_transfer_t structure.
+     * @retval kStatus_Success Successfully started the data receive.
+     * @retval kStatus_SAI_RxBusy Previous receive still not finished.
+     * @retval kStatus_InvalidArgument The input parameter is invalid.
+     */
+    status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
 
-/*!
- * @brief Terminate all SAI send.
- *
- * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
- * current transfer slot, please call SAI_TransferAbortSend.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Gets a set byte count.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     * @param count Bytes count sent.
+     * @retval kStatus_Success Succeed get the transfer count.
+     * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
+     */
+    status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
 
-/*!
- * @brief Terminate all SAI receive.
- *
- * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
- * current transfer slot, please call SAI_TransferAbortReceive.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Gets a received byte count.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     * @param count Bytes count received.
+     * @retval kStatus_Success Succeed get the transfer count.
+     * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
+     */
+    status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
 
-/*!
- * @brief Tx interrupt handler.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure.
- */
-void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Aborts the current send.
+     *
+     * @note This API can be called any time when an interrupt non-blocking transfer initiates
+     * to abort the transfer early.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     */
+    void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle);
 
-/*!
- * @brief Tx interrupt handler.
- *
- * @param base SAI base pointer.
- * @param handle Pointer to the sai_handle_t structure.
- */
-void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
+    /*!
+     * @brief Aborts the current IRQ receive.
+     *
+     * @note This API can be called when an interrupt non-blocking transfer initiates
+     * to abort the transfer early.
+     *
+     * @param base SAI base pointer
+     * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
+     */
+    void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle);
 
-/*! @} */
+    /*!
+     * @brief Terminate all SAI send.
+     *
+     * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
+     * current transfer slot, please call SAI_TransferAbortSend.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle);
+
+    /*!
+     * @brief Terminate all SAI receive.
+     *
+     * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
+     * current transfer slot, please call SAI_TransferAbortReceive.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle);
+
+    /*!
+     * @brief Tx interrupt handler.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure.
+     */
+    void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
+
+    /*!
+     * @brief Tx interrupt handler.
+     *
+     * @param base SAI base pointer.
+     * @param handle Pointer to the sai_handle_t structure.
+     */
+    void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
+
+    /*! @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.c
index 11bdae301..eed69e078 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.c
@@ -94,17 +94,15 @@ static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done,
 static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
 
 /*******************************************************************************
-* Code
-******************************************************************************/
+ * Code
+ ******************************************************************************/
 static uint32_t SAI_GetInstance(I2S_Type *base)
 {
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++)
-    {
-        if (s_saiBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++) {
+        if (s_saiBases[instance] == base) {
             break;
         }
     }
@@ -117,19 +115,17 @@ static uint32_t SAI_GetInstance(I2S_Type *base)
 static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
 {
     sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
-    sai_edma_handle_t *saiHandle = privHandle->handle;
+    sai_edma_handle_t *saiHandle          = privHandle->handle;
 
     /* If finished a blcok, call the callback function */
     memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0, sizeof(sai_transfer_t));
     saiHandle->queueDriver = (saiHandle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
-    if (saiHandle->callback)
-    {
+    if (saiHandle->callback) {
         (saiHandle->callback)(privHandle->base, saiHandle, kStatus_SAI_TxIdle, saiHandle->userData);
     }
 
     /* If all data finished, just stop the transfer */
-    if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
-    {
+    if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL) {
         /* Disable DMA enable bit */
         SAI_TxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
         EDMA_AbortTransfer(handle);
@@ -139,19 +135,17 @@ static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done,
 static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
 {
     sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
-    sai_edma_handle_t *saiHandle = privHandle->handle;
+    sai_edma_handle_t *saiHandle          = privHandle->handle;
 
     /* If finished a blcok, call the callback function */
     memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0, sizeof(sai_transfer_t));
     saiHandle->queueDriver = (saiHandle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
-    if (saiHandle->callback)
-    {
+    if (saiHandle->callback) {
         (saiHandle->callback)(privHandle->base, saiHandle, kStatus_SAI_RxIdle, saiHandle->userData);
     }
 
     /* If all data finished, just stop the transfer */
-    if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
-    {
+    if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL) {
         /* Disable DMA enable bit */
         SAI_RxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
         EDMA_AbortTransfer(handle);
@@ -170,13 +164,13 @@ void SAI_TransferTxCreateHandleEDMA(
 
     /* Set sai base to handle */
     handle->dmaHandle = dmaHandle;
-    handle->callback = callback;
-    handle->userData = userData;
+    handle->callback  = callback;
+    handle->userData  = userData;
 
     /* Set SAI state to idle */
     handle->state = kSAI_Idle;
 
-    s_edmaPrivateHandle[instance][0].base = base;
+    s_edmaPrivateHandle[instance][0].base   = base;
     s_edmaPrivateHandle[instance][0].handle = handle;
 
     /* Need to use scatter gather */
@@ -198,13 +192,13 @@ void SAI_TransferRxCreateHandleEDMA(
 
     /* Set sai base to handle */
     handle->dmaHandle = dmaHandle;
-    handle->callback = callback;
-    handle->userData = userData;
+    handle->callback  = callback;
+    handle->userData  = userData;
 
     /* Set SAI state to idle */
     handle->state = kSAI_Idle;
 
-    s_edmaPrivateHandle[instance][1].base = base;
+    s_edmaPrivateHandle[instance][1].base   = base;
     s_edmaPrivateHandle[instance][1].handle = handle;
 
     /* Need to use scatter gather */
@@ -226,12 +220,10 @@ void SAI_TransferTxSetFormatEDMA(I2S_Type *base,
     SAI_TxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
 
     /* Get the tranfer size from format, this should be used in EDMA configuration */
-    if (format->bitWidth == 24U)
-    {
+    if (format->bitWidth == 24U) {
         handle->bytesPerFrame = 4U;
     }
-    else
-    {
+    else {
         handle->bytesPerFrame = format->bitWidth / 8U;
     }
 
@@ -259,12 +251,10 @@ void SAI_TransferRxSetFormatEDMA(I2S_Type *base,
     SAI_RxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
 
     /* Get the tranfer size from format, this should be used in EDMA configuration */
-    if (format->bitWidth == 24U)
-    {
+    if (format->bitWidth == 24U) {
         handle->bytesPerFrame = 4U;
     }
-    else
-    {
+    else {
         handle->bytesPerFrame = format->bitWidth / 8U;
     }
 
@@ -285,16 +275,14 @@ status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_tra
     assert(handle && xfer);
 
     edma_transfer_config_t config = {0};
-    uint32_t destAddr = SAI_TxGetDataRegisterAddress(base, handle->channel);
+    uint32_t destAddr             = SAI_TxGetDataRegisterAddress(base, handle->channel);
 
     /* Check if input parameter invalid */
-    if ((xfer->data == NULL) || (xfer->dataSize == 0U))
-    {
+    if ((xfer->data == NULL) || (xfer->dataSize == 0U)) {
         return kStatus_InvalidArgument;
     }
 
-    if (handle->saiQueue[handle->queueUser].data)
-    {
+    if (handle->saiQueue[handle->queueUser].data) {
         return kStatus_SAI_QueueFull;
     }
 
@@ -302,14 +290,20 @@ status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_tra
     handle->state = kSAI_Busy;
 
     /* Update the queue state */
-    handle->transferSize[handle->queueUser] = xfer->dataSize;
-    handle->saiQueue[handle->queueUser].data = xfer->data;
+    handle->transferSize[handle->queueUser]      = xfer->dataSize;
+    handle->saiQueue[handle->queueUser].data     = xfer->data;
     handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
-    handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
+    handle->queueUser                            = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
 
     /* Prepare edma configure */
-    EDMA_PrepareTransfer(&config, xfer->data, handle->bytesPerFrame, (void *)destAddr, handle->bytesPerFrame,
-                         handle->count * handle->bytesPerFrame, xfer->dataSize, kEDMA_MemoryToPeripheral);
+    EDMA_PrepareTransfer(&config,
+                         xfer->data,
+                         handle->bytesPerFrame,
+                         (void *)destAddr,
+                         handle->bytesPerFrame,
+                         handle->count * handle->bytesPerFrame,
+                         xfer->dataSize,
+                         kEDMA_MemoryToPeripheral);
 
     /* Store the initially configured eDMA minor byte transfer count into the SAI handle */
     handle->nbytes = handle->count * handle->bytesPerFrame;
@@ -336,16 +330,14 @@ status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_
     assert(handle && xfer);
 
     edma_transfer_config_t config = {0};
-    uint32_t srcAddr = SAI_RxGetDataRegisterAddress(base, handle->channel);
+    uint32_t srcAddr              = SAI_RxGetDataRegisterAddress(base, handle->channel);
 
     /* Check if input parameter invalid */
-    if ((xfer->data == NULL) || (xfer->dataSize == 0U))
-    {
+    if ((xfer->data == NULL) || (xfer->dataSize == 0U)) {
         return kStatus_InvalidArgument;
     }
 
-    if (handle->saiQueue[handle->queueUser].data)
-    {
+    if (handle->saiQueue[handle->queueUser].data) {
         return kStatus_SAI_QueueFull;
     }
 
@@ -353,14 +345,20 @@ status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_
     handle->state = kSAI_Busy;
 
     /* Update queue state  */
-    handle->transferSize[handle->queueUser] = xfer->dataSize;
-    handle->saiQueue[handle->queueUser].data = xfer->data;
+    handle->transferSize[handle->queueUser]      = xfer->dataSize;
+    handle->saiQueue[handle->queueUser].data     = xfer->data;
     handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
-    handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
+    handle->queueUser                            = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
 
     /* Prepare edma configure */
-    EDMA_PrepareTransfer(&config, (void *)srcAddr, handle->bytesPerFrame, xfer->data, handle->bytesPerFrame,
-                         handle->count * handle->bytesPerFrame, xfer->dataSize, kEDMA_PeripheralToMemory);
+    EDMA_PrepareTransfer(&config,
+                         (void *)srcAddr,
+                         handle->bytesPerFrame,
+                         xfer->data,
+                         handle->bytesPerFrame,
+                         handle->count * handle->bytesPerFrame,
+                         xfer->dataSize,
+                         kEDMA_PeripheralToMemory);
 
     /* Store the initially configured eDMA minor byte transfer count into the SAI handle */
     handle->nbytes = handle->count * handle->bytesPerFrame;
@@ -449,7 +447,7 @@ void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)
     memset(handle->tcd, 0U, sizeof(handle->tcd));
     memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
     memset(handle->transferSize, 0U, sizeof(handle->transferSize));
-    handle->queueUser = 0U;
+    handle->queueUser   = 0U;
     handle->queueDriver = 0U;
 }
 
@@ -464,7 +462,7 @@ void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)
     memset(handle->tcd, 0U, sizeof(handle->tcd));
     memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
     memset(handle->transferSize, 0U, sizeof(handle->transferSize));
-    handle->queueUser = 0U;
+    handle->queueUser   = 0U;
     handle->queueDriver = 0U;
 }
 
@@ -474,12 +472,10 @@ status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle,
 
     status_t status = kStatus_Success;
 
-    if (handle->state != kSAI_Busy)
-    {
+    if (handle->state != kSAI_Busy) {
         status = kStatus_NoTransferInProgress;
     }
-    else
-    {
+    else {
         *count = (handle->transferSize[handle->queueDriver] -
                   (uint32_t)handle->nbytes *
                       EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
@@ -494,12 +490,10 @@ status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *hand
 
     status_t status = kStatus_Success;
 
-    if (handle->state != kSAI_Busy)
-    {
+    if (handle->state != kSAI_Busy) {
         status = kStatus_NoTransferInProgress;
     }
-    else
-    {
+    else {
         *count = (handle->transferSize[handle->queueDriver] -
                   (uint32_t)handle->nbytes *
                       EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.h
index 0b806d246..2590b6873 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_sai_edma.h
@@ -78,185 +78,192 @@ struct _sai_edma_handle
  * APIs
  ******************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name eDMA Transactional
- * @{
- */
+    /*!
+     * @name eDMA Transactional
+     * @{
+     */
 
-/*!
- * @brief Initializes the SAI eDMA handle.
- *
- * This function initializes the SAI master DMA handle, which can be used for other SAI master transactional APIs.
- * Usually, for a specified SAI instance, call this API once to get the initialized handle.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param base SAI peripheral base address.
- * @param callback Pointer to user callback function.
- * @param userData User parameter passed to the callback function.
- * @param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
- */
-void SAI_TransferTxCreateHandleEDMA(
-    I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle);
+    /*!
+     * @brief Initializes the SAI eDMA handle.
+     *
+     * This function initializes the SAI master DMA handle, which can be used for other SAI master transactional APIs.
+     * Usually, for a specified SAI instance, call this API once to get the initialized handle.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param base SAI peripheral base address.
+     * @param callback Pointer to user callback function.
+     * @param userData User parameter passed to the callback function.
+     * @param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
+     */
+    void SAI_TransferTxCreateHandleEDMA(I2S_Type *base,
+                                        sai_edma_handle_t *handle,
+                                        sai_edma_callback_t callback,
+                                        void *userData,
+                                        edma_handle_t *dmaHandle);
 
-/*!
- * @brief Initializes the SAI Rx eDMA handle.
- *
- * This function initializes the SAI slave DMA handle, which can be used for other SAI master transactional APIs.
- * Usually, for a specified SAI instance, call this API once to get the initialized handle.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param base SAI peripheral base address.
- * @param callback Pointer to user callback function.
- * @param userData User parameter passed to the callback function.
- * @param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
- */
-void SAI_TransferRxCreateHandleEDMA(
-    I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle);
+    /*!
+     * @brief Initializes the SAI Rx eDMA handle.
+     *
+     * This function initializes the SAI slave DMA handle, which can be used for other SAI master transactional APIs.
+     * Usually, for a specified SAI instance, call this API once to get the initialized handle.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param base SAI peripheral base address.
+     * @param callback Pointer to user callback function.
+     * @param userData User parameter passed to the callback function.
+     * @param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
+     */
+    void SAI_TransferRxCreateHandleEDMA(I2S_Type *base,
+                                        sai_edma_handle_t *handle,
+                                        sai_edma_callback_t callback,
+                                        void *userData,
+                                        edma_handle_t *dmaHandle);
 
-/*!
- * @brief Configures the SAI Tx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param format Pointer to SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If bit clock source is master
- * clock, this value should equals to masterClockHz in format.
- * @retval kStatus_Success Audio format set successfully.
- * @retval kStatus_InvalidArgument The input argument is invalid.
-*/
-void SAI_TransferTxSetFormatEDMA(I2S_Type *base,
-                                 sai_edma_handle_t *handle,
-                                 sai_transfer_format_t *format,
-                                 uint32_t mclkSourceClockHz,
-                                 uint32_t bclkSourceClockHz);
+    /*!
+     * @brief Configures the SAI Tx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param format Pointer to SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If bit clock source is master
+     * clock, this value should equals to masterClockHz in format.
+     * @retval kStatus_Success Audio format set successfully.
+     * @retval kStatus_InvalidArgument The input argument is invalid.
+     */
+    void SAI_TransferTxSetFormatEDMA(I2S_Type *base,
+                                     sai_edma_handle_t *handle,
+                                     sai_transfer_format_t *format,
+                                     uint32_t mclkSourceClockHz,
+                                     uint32_t bclkSourceClockHz);
 
-/*!
- * @brief Configures the SAI Rx audio format.
- *
- * The audio format can be changed at run-time. This function configures the sample rate and audio data
- * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param format Pointer to SAI audio data format structure.
- * @param mclkSourceClockHz SAI master clock source frequency in Hz.
- * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is the master
- * clock, this value should equal to masterClockHz in format.
- * @retval kStatus_Success Audio format set successfully.
- * @retval kStatus_InvalidArgument The input argument is invalid.
-*/
-void SAI_TransferRxSetFormatEDMA(I2S_Type *base,
-                                 sai_edma_handle_t *handle,
-                                 sai_transfer_format_t *format,
-                                 uint32_t mclkSourceClockHz,
-                                 uint32_t bclkSourceClockHz);
+    /*!
+     * @brief Configures the SAI Rx audio format.
+     *
+     * The audio format can be changed at run-time. This function configures the sample rate and audio data
+     * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param format Pointer to SAI audio data format structure.
+     * @param mclkSourceClockHz SAI master clock source frequency in Hz.
+     * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is the master
+     * clock, this value should equal to masterClockHz in format.
+     * @retval kStatus_Success Audio format set successfully.
+     * @retval kStatus_InvalidArgument The input argument is invalid.
+     */
+    void SAI_TransferRxSetFormatEDMA(I2S_Type *base,
+                                     sai_edma_handle_t *handle,
+                                     sai_transfer_format_t *format,
+                                     uint32_t mclkSourceClockHz,
+                                     uint32_t bclkSourceClockHz);
 
-/*!
- * @brief Performs a non-blocking SAI transfer using DMA.
- *
- * @note This interface returns immediately after the transfer initiates. Call
- * SAI_GetTransferStatus to poll the transfer status and check whether the SAI transfer is finished.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param xfer Pointer to the DMA transfer structure.
- * @retval kStatus_Success Start a SAI eDMA send successfully.
- * @retval kStatus_InvalidArgument The input argument is invalid.
- * @retval kStatus_TxBusy SAI is busy sending data.
- */
-status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer);
+    /*!
+     * @brief Performs a non-blocking SAI transfer using DMA.
+     *
+     * @note This interface returns immediately after the transfer initiates. Call
+     * SAI_GetTransferStatus to poll the transfer status and check whether the SAI transfer is finished.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param xfer Pointer to the DMA transfer structure.
+     * @retval kStatus_Success Start a SAI eDMA send successfully.
+     * @retval kStatus_InvalidArgument The input argument is invalid.
+     * @retval kStatus_TxBusy SAI is busy sending data.
+     */
+    status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer);
 
-/*!
- * @brief Performs a non-blocking SAI receive using eDMA.
- *
- * @note This interface returns immediately after the transfer initiates. Call
- * the SAI_GetReceiveRemainingBytes to poll the transfer status and check whether the SAI transfer is finished.
- *
- * @param base SAI base pointer
- * @param handle SAI eDMA handle pointer.
- * @param xfer Pointer to DMA transfer structure.
- * @retval kStatus_Success Start a SAI eDMA receive successfully.
- * @retval kStatus_InvalidArgument The input argument is invalid.
- * @retval kStatus_RxBusy SAI is busy receiving data.
- */
-status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer);
+    /*!
+     * @brief Performs a non-blocking SAI receive using eDMA.
+     *
+     * @note This interface returns immediately after the transfer initiates. Call
+     * the SAI_GetReceiveRemainingBytes to poll the transfer status and check whether the SAI transfer is finished.
+     *
+     * @param base SAI base pointer
+     * @param handle SAI eDMA handle pointer.
+     * @param xfer Pointer to DMA transfer structure.
+     * @retval kStatus_Success Start a SAI eDMA receive successfully.
+     * @retval kStatus_InvalidArgument The input argument is invalid.
+     * @retval kStatus_RxBusy SAI is busy receiving data.
+     */
+    status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer);
 
-/*!
- * @brief Terminate all SAI send.
- *
- * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
- * current transfer slot, please call SAI_TransferAbortSendEDMA.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle);
+    /*!
+     * @brief Terminate all SAI send.
+     *
+     * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
+     * current transfer slot, please call SAI_TransferAbortSendEDMA.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle);
 
-/*!
- * @brief Terminate all SAI receive.
- *
- * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
- * current transfer slot, please call SAI_TransferAbortReceiveEDMA.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle);
+    /*!
+     * @brief Terminate all SAI receive.
+     *
+     * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
+     * current transfer slot, please call SAI_TransferAbortReceiveEDMA.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle);
 
-/*!
- * @brief Aborts a SAI transfer using eDMA.
- *
- * This function only aborts the current transfer slots, the other transfer slots' information still kept
- * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateSendEDMA.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferAbortSendEDMA(I2S_Type *base, sai_edma_handle_t *handle);
+    /*!
+     * @brief Aborts a SAI transfer using eDMA.
+     *
+     * This function only aborts the current transfer slots, the other transfer slots' information still kept
+     * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateSendEDMA.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferAbortSendEDMA(I2S_Type *base, sai_edma_handle_t *handle);
 
-/*!
- * @brief Aborts a SAI receive using eDMA.
- *
- * This function only aborts the current transfer slots, the other transfer slots' information still kept
- * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateReceiveEDMA.
- *
- * @param base SAI base pointer
- * @param handle SAI eDMA handle pointer.
- */
-void SAI_TransferAbortReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle);
+    /*!
+     * @brief Aborts a SAI receive using eDMA.
+     *
+     * This function only aborts the current transfer slots, the other transfer slots' information still kept
+     * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateReceiveEDMA.
+     *
+     * @param base SAI base pointer
+     * @param handle SAI eDMA handle pointer.
+     */
+    void SAI_TransferAbortReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle);
 
-/*!
- * @brief Gets byte count sent by SAI.
- *
- * @param base SAI base pointer.
- * @param handle SAI eDMA handle pointer.
- * @param count Bytes count sent by SAI.
- * @retval kStatus_Success Succeed get the transfer count.
- * @retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
- */
-status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count);
+    /*!
+     * @brief Gets byte count sent by SAI.
+     *
+     * @param base SAI base pointer.
+     * @param handle SAI eDMA handle pointer.
+     * @param count Bytes count sent by SAI.
+     * @retval kStatus_Success Succeed get the transfer count.
+     * @retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
+     */
+    status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count);
 
-/*!
- * @brief Gets byte count received by SAI.
- *
- * @param base SAI base pointer
- * @param handle SAI eDMA handle pointer.
- * @param count Bytes count received by SAI.
- * @retval kStatus_Success Succeed get the transfer count.
- * @retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
- */
-status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count);
+    /*!
+     * @brief Gets byte count received by SAI.
+     *
+     * @param base SAI base pointer
+     * @param handle SAI eDMA handle pointer.
+     * @param count Bytes count received by SAI.
+     * @retval kStatus_Success Succeed get the transfer count.
+     * @retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
+     */
+    status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count);
 
-/*! @} */
+    /*! @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.c
index 31dbe7649..97593de04 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.c
@@ -42,37 +42,36 @@
 #define FSL_COMPONENT_ID "platform.drivers.semc"
 #endif
 
-
 /*! @brief Define macros for SEMC driver. */
-#define SEMC_IPCOMMANDDATASIZEBYTEMAX (4U)
-#define SEMC_IPCOMMANDMAGICKEY (0xA55A)
-#define SEMC_IOCR_PINMUXBITWIDTH (0x3U)
-#define SEMC_IOCR_NAND_CE (4U)
-#define SEMC_IOCR_NOR_CE (5U)
-#define SEMC_IOCR_NOR_CE_A8 (2U)
-#define SEMC_IOCR_PSRAM_CE (6U)
-#define SEMC_IOCR_PSRAM_CE_A8 (3U)
-#define SEMC_IOCR_DBI_CSX (7U)
-#define SEMC_IOCR_DBI_CSX_A8 (4U)
+#define SEMC_IPCOMMANDDATASIZEBYTEMAX         (4U)
+#define SEMC_IPCOMMANDMAGICKEY                (0xA55A)
+#define SEMC_IOCR_PINMUXBITWIDTH              (0x3U)
+#define SEMC_IOCR_NAND_CE                     (4U)
+#define SEMC_IOCR_NOR_CE                      (5U)
+#define SEMC_IOCR_NOR_CE_A8                   (2U)
+#define SEMC_IOCR_PSRAM_CE                    (6U)
+#define SEMC_IOCR_PSRAM_CE_A8                 (3U)
+#define SEMC_IOCR_DBI_CSX                     (7U)
+#define SEMC_IOCR_DBI_CSX_A8                  (4U)
 #define SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE (24U)
-#define SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX (28U)
-#define SEMC_BMCR0_TYPICAL_WQOS (5U)
-#define SEMC_BMCR0_TYPICAL_WAGE (8U)
-#define SEMC_BMCR0_TYPICAL_WSH (0x40U)
-#define SEMC_BMCR0_TYPICAL_WRWS (0x10U)
-#define SEMC_BMCR1_TYPICAL_WQOS (5U)
-#define SEMC_BMCR1_TYPICAL_WAGE (8U)
-#define SEMC_BMCR1_TYPICAL_WPH (0x60U)
-#define SEMC_BMCR1_TYPICAL_WBR (0x40U)
-#define SEMC_BMCR1_TYPICAL_WRWS (0x24U)
-#define SEMC_STARTADDRESS (0x80000000U)
-#define SEMC_ENDADDRESS (0xDFFFFFFFU)
-#define SEMC_BR_MEMSIZE_MIN (4)
-#define SEMC_BR_MEMSIZE_OFFSET (2)
-#define SEMC_BR_MEMSIZE_MAX (4 * 1024 * 1024)
-#define SEMC_SDRAM_MODESETCAL_OFFSET (4)
-#define SEMC_BR_REG_NUM (9)
-#define SEMC_BYTE_NUMBIT (8)
+#define SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX  (28U)
+#define SEMC_BMCR0_TYPICAL_WQOS               (5U)
+#define SEMC_BMCR0_TYPICAL_WAGE               (8U)
+#define SEMC_BMCR0_TYPICAL_WSH                (0x40U)
+#define SEMC_BMCR0_TYPICAL_WRWS               (0x10U)
+#define SEMC_BMCR1_TYPICAL_WQOS               (5U)
+#define SEMC_BMCR1_TYPICAL_WAGE               (8U)
+#define SEMC_BMCR1_TYPICAL_WPH                (0x60U)
+#define SEMC_BMCR1_TYPICAL_WBR                (0x40U)
+#define SEMC_BMCR1_TYPICAL_WRWS               (0x24U)
+#define SEMC_STARTADDRESS                     (0x80000000U)
+#define SEMC_ENDADDRESS                       (0xDFFFFFFFU)
+#define SEMC_BR_MEMSIZE_MIN                   (4)
+#define SEMC_BR_MEMSIZE_OFFSET                (2)
+#define SEMC_BR_MEMSIZE_MAX                   (4 * 1024 * 1024)
+#define SEMC_SDRAM_MODESETCAL_OFFSET          (4)
+#define SEMC_BR_REG_NUM                       (9)
+#define SEMC_BYTE_NUMBIT                      (8)
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -125,7 +124,7 @@ static status_t SEMC_IsIPCommandDone(SEMC_Type *base);
 
 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
 /*! @brief Pointers to SEMC clocks for each instance. */
-static const clock_ip_name_t s_semcClock[FSL_FEATURE_SOC_SEMC_COUNT] = SEMC_CLOCKS;
+static const clock_ip_name_t s_semcClock[FSL_FEATURE_SOC_SEMC_COUNT]    = SEMC_CLOCKS;
 static const clock_ip_name_t s_semcExtClock[FSL_FEATURE_SOC_SEMC_COUNT] = SEMC_EXSC_CLOCKS;
 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
@@ -139,10 +138,8 @@ static uint32_t SEMC_GetInstance(SEMC_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < ARRAY_SIZE(s_semcBases); instance++)
-    {
-        if (s_semcBases[instance] == base)
-        {
+    for (instance = 0; instance < ARRAY_SIZE(s_semcBases); instance++) {
+        if (s_semcBases[instance] == base) {
             break;
         }
     }
@@ -157,15 +154,13 @@ static status_t SEMC_CovertMemorySize(SEMC_Type *base, uint32_t size_kbytes, uin
     assert(sizeConverted);
     uint32_t memsize;
 
-    if ((size_kbytes < SEMC_BR_MEMSIZE_MIN) || (size_kbytes > SEMC_BR_MEMSIZE_MAX))
-    {
+    if ((size_kbytes < SEMC_BR_MEMSIZE_MIN) || (size_kbytes > SEMC_BR_MEMSIZE_MAX)) {
         return kStatus_SEMC_InvalidMemorySize;
     }
 
     *sizeConverted = 0;
-    memsize = size_kbytes / 8;
-    while (memsize)
-    {
+    memsize        = size_kbytes / 8;
+    while (memsize) {
         memsize >>= 1;
         (*sizeConverted)++;
     }
@@ -182,8 +177,7 @@ static uint8_t SEMC_ConvertTiming(uint32_t time_ns, uint32_t clkSrc_Hz)
     clkSrc_Hz /= 1000000;
     tClk_us = 1000000 / clkSrc_Hz;
 
-    while (tClk_us * clockCycles < (time_ns * 1000))
-    {
+    while (tClk_us * clockCycles < (time_ns * 1000)) {
         clockCycles++;
     }
 
@@ -192,8 +186,7 @@ static uint8_t SEMC_ConvertTiming(uint32_t time_ns, uint32_t clkSrc_Hz)
 
 static status_t SEMC_ConfigureIPCommand(SEMC_Type *base, uint8_t size_bytes)
 {
-    if ((size_bytes > SEMC_IPCOMMANDDATASIZEBYTEMAX) || (!size_bytes))
-    {
+    if ((size_bytes > SEMC_IPCOMMANDDATASIZEBYTEMAX) || (!size_bytes)) {
         return kStatus_SEMC_InvalidIpcmdDataSize;
     }
 
@@ -207,16 +200,13 @@ static status_t SEMC_ConfigureIPCommand(SEMC_Type *base, uint8_t size_bytes)
     /* Clear data size. */
     base->IPCR2 = 0;
     /* Set data size. */
-    if (size_bytes < 4)
-    {
+    if (size_bytes < 4) {
         base->IPCR2 |= SEMC_IPCR2_BM3_MASK;
     }
-    if (size_bytes < 3)
-    {
+    if (size_bytes < 3) {
         base->IPCR2 |= SEMC_IPCR2_BM2_MASK;
     }
-    if (size_bytes < 2)
-    {
+    if (size_bytes < 2) {
         base->IPCR2 |= SEMC_IPCR2_BM1_MASK;
     }
     return kStatus_Success;
@@ -225,16 +215,13 @@ static status_t SEMC_ConfigureIPCommand(SEMC_Type *base, uint8_t size_bytes)
 static status_t SEMC_IsIPCommandDone(SEMC_Type *base)
 {
     /* Poll status bit till command is done*/
-    while (!(base->INTR & SEMC_INTR_IPCMDDONE_MASK))
-    {
-    };
+    while (!(base->INTR & SEMC_INTR_IPCMDDONE_MASK)) {};
 
     /* Clear status bit */
     base->INTR |= SEMC_INTR_IPCMDDONE_MASK;
 
     /* Check error status */
-    if (base->INTR & SEMC_INTR_IPCMDERR_MASK)
-    {
+    if (base->INTR & SEMC_INTR_IPCMDERR_MASK) {
         base->INTR |= SEMC_INTR_IPCMDERR_MASK;
         return kStatus_SEMC_IpCommandExecutionError;
     }
@@ -251,22 +238,22 @@ void SEMC_GetDefaultConfig(semc_config_t *config)
     semc_queueb_weight_t queuebWeight;
 
     /* Get default settings. */
-    config->dqsMode = kSEMC_Loopbackinternal;
+    config->dqsMode          = kSEMC_Loopbackinternal;
     config->cmdTimeoutCycles = 0;
     config->busTimeoutCycles = 0x1F;
 
     /* Set a typical weight settings. */
     memset((void *)&queueWeight, 0, sizeof(semc_axi_queueweight_t));
 
-    queueaWeight.qos = SEMC_BMCR0_TYPICAL_WQOS;
-    queueaWeight.aging = SEMC_BMCR0_TYPICAL_WAGE;
-    queueaWeight.slaveHitSwith = SEMC_BMCR0_TYPICAL_WSH;
+    queueaWeight.qos              = SEMC_BMCR0_TYPICAL_WQOS;
+    queueaWeight.aging            = SEMC_BMCR0_TYPICAL_WAGE;
+    queueaWeight.slaveHitSwith    = SEMC_BMCR0_TYPICAL_WSH;
     queueaWeight.slaveHitNoswitch = SEMC_BMCR0_TYPICAL_WRWS;
-    queuebWeight.qos = SEMC_BMCR1_TYPICAL_WQOS;
-    queuebWeight.aging = SEMC_BMCR1_TYPICAL_WAGE;
-    queuebWeight.slaveHitSwith = SEMC_BMCR1_TYPICAL_WRWS;
-    queuebWeight.weightPagehit = SEMC_BMCR1_TYPICAL_WPH;
-    queuebWeight.bankRotation = SEMC_BMCR1_TYPICAL_WBR;
+    queuebWeight.qos              = SEMC_BMCR1_TYPICAL_WQOS;
+    queuebWeight.aging            = SEMC_BMCR1_TYPICAL_WAGE;
+    queuebWeight.slaveHitSwith    = SEMC_BMCR1_TYPICAL_WRWS;
+    queuebWeight.weightPagehit    = SEMC_BMCR1_TYPICAL_WPH;
+    queuebWeight.bankRotation     = SEMC_BMCR1_TYPICAL_WBR;
 
     config->queueWeight.queueaWeight = &queueaWeight;
     config->queueWeight.queuebWeight = &queuebWeight;
@@ -285,28 +272,23 @@ void SEMC_Init(SEMC_Type *base, semc_config_t *configure)
 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
     /* Initialize all BR to zero due to the default base address set. */
-    for (index = 0; index < SEMC_BR_REG_NUM; index++)
-    {
+    for (index = 0; index < SEMC_BR_REG_NUM; index++) {
         base->BR[index] = 0;
     }
 
     /* Software reset for SEMC internal logical . */
     base->MCR = SEMC_MCR_SWRST_MASK;
-    while (base->MCR & SEMC_MCR_SWRST_MASK)
-    {
-    }
+    while (base->MCR & SEMC_MCR_SWRST_MASK) {}
 
     /* Configure, disable module first. */
     base->MCR |= SEMC_MCR_MDIS_MASK | SEMC_MCR_BTO(configure->busTimeoutCycles) |
                  SEMC_MCR_CTO(configure->cmdTimeoutCycles) | SEMC_MCR_DQSMD(configure->dqsMode);
 
     /* Configure Queue 0/1 for AXI bus. */
-    if (configure->queueWeight.queueaWeight)
-    {
+    if (configure->queueWeight.queueaWeight) {
         base->BMCR0 = (uint32_t)(configure->queueWeight.queueaWeight);
     }
-    if (configure->queueWeight.queuebWeight)
-    {
+    if (configure->queueWeight.queuebWeight) {
         base->BMCR1 = (uint32_t)(configure->queueWeight.queuebWeight);
     }
     /* Enable SEMC. */
@@ -316,8 +298,7 @@ void SEMC_Init(SEMC_Type *base, semc_config_t *configure)
 void SEMC_Deinit(SEMC_Type *base)
 {
     /* Disable module.  Check there is no pending command before disable module.  */
-    while (!(base->STS0 & SEMC_STS0_IDLE_MASK))
-    {
+    while (!(base->STS0 & SEMC_STS0_IDLE_MASK)) {
         ;
     }
 
@@ -337,47 +318,42 @@ status_t SEMC_ConfigureSDRAM(SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_con
     assert(config->refreshBurstLen);
 
     uint8_t memsize;
-    status_t result = kStatus_Success;
+    status_t result   = kStatus_Success;
     uint16_t prescale = config->tPrescalePeriod_Ns / 16 / (1000000000 / clkSrc_Hz);
     uint16_t refresh;
     uint16_t urgentRef;
     uint16_t idle;
     uint16_t mode;
 
-    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS))
-    {
+    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS)) {
         return kStatus_SEMC_InvalidBaseAddress;
     }
 
-    if (config->csxPinMux == kSEMC_MUXA8)
-    {
+    if (config->csxPinMux == kSEMC_MUXA8) {
         return kStatus_SEMC_InvalidSwPinmuxSelection;
     }
 
-    if (prescale > 256)
-    {
+    if (prescale > 256) {
         return kStatus_SEMC_InvalidTimerSetting;
     }
 
-    refresh = config->refreshPeriod_nsPerRow / config->tPrescalePeriod_Ns;
+    refresh   = config->refreshPeriod_nsPerRow / config->tPrescalePeriod_Ns;
     urgentRef = config->refreshUrgThreshold / config->tPrescalePeriod_Ns;
-    idle = config->tIdleTimeout_Ns / config->tPrescalePeriod_Ns;
+    idle      = config->tIdleTimeout_Ns / config->tPrescalePeriod_Ns;
 
     uint32_t iocReg = base->IOCR & ~(SEMC_IOCR_PINMUXBITWIDTH << config->csxPinMux);
 
     /* Base control. */
     result = SEMC_CovertMemorySize(base, config->memsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
 
-    base->BR[cs] = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
+    base->BR[cs]   = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
     base->SDRAMCR0 = SEMC_SDRAMCR0_PS(config->portSize) | SEMC_SDRAMCR0_BL(config->burstLen) |
                      SEMC_SDRAMCR0_COL(config->columnAddrBitNum) | SEMC_SDRAMCR0_CL(config->casLatency);
     /* IOMUX setting. */
-    if (cs)
-    {
+    if (cs) {
         base->IOCR = iocReg | (cs << config->csxPinMux);
     }
 
@@ -404,25 +380,21 @@ status_t SEMC_ConfigureSDRAM(SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_con
     SEMC->IPCR2 = 0;
 
     result = SEMC_SendIPCommand(base, kSEMC_MemType_SDRAM, config->address, kSEMC_SDRAMCM_Prechargeall, 0, NULL);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     result = SEMC_SendIPCommand(base, kSEMC_MemType_SDRAM, config->address, kSEMC_SDRAMCM_AutoRefresh, 0, NULL);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     result = SEMC_SendIPCommand(base, kSEMC_MemType_SDRAM, config->address, kSEMC_SDRAMCM_AutoRefresh, 0, NULL);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     /* Mode setting value. */
-    mode = (uint16_t)config->burstLen | (uint16_t)(config->casLatency << SEMC_SDRAM_MODESETCAL_OFFSET);
+    mode   = (uint16_t)config->burstLen | (uint16_t)(config->casLatency << SEMC_SDRAM_MODESETCAL_OFFSET);
     result = SEMC_SendIPCommand(base, kSEMC_MemType_SDRAM, config->address, kSEMC_SDRAMCM_Modeset, mode, NULL);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     /* Enables refresh */
@@ -439,48 +411,40 @@ status_t SEMC_ConfigureNAND(SEMC_Type *base, semc_nand_config_t *config, uint32_
     uint8_t memsize;
     status_t result;
 
-    if ((config->axiAddress < SEMC_STARTADDRESS) || (config->axiAddress > SEMC_ENDADDRESS))
-    {
+    if ((config->axiAddress < SEMC_STARTADDRESS) || (config->axiAddress > SEMC_ENDADDRESS)) {
         return kStatus_SEMC_InvalidBaseAddress;
     }
 
-    if (config->cePinMux == kSEMC_MUXRDY)
-    {
+    if (config->cePinMux == kSEMC_MUXRDY) {
         return kStatus_SEMC_InvalidSwPinmuxSelection;
     }
 
     uint32_t iocReg = base->IOCR & ~((SEMC_IOCR_PINMUXBITWIDTH << config->cePinMux) | SEMC_IOCR_MUX_RDY_MASK);
 
     /* Base control. */
-    if (config->rdyactivePolarity == kSEMC_RdyActivehigh)
-    {
+    if (config->rdyactivePolarity == kSEMC_RdyActivehigh) {
         base->MCR |= SEMC_MCR_WPOL1_MASK;
     }
-    else
-    {
+    else {
         base->MCR &= ~SEMC_MCR_WPOL1_MASK;
     }
     result = SEMC_CovertMemorySize(base, config->axiMemsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     base->BR[4] = (config->axiAddress & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
 
     result = SEMC_CovertMemorySize(base, config->ipgMemsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     base->BR[8] = (config->ipgAddress & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
 
     /* IOMUX setting. */
-    if (config->cePinMux)
-    {
+    if (config->cePinMux) {
         base->IOCR = iocReg | (SEMC_IOCR_NAND_CE << config->cePinMux);
     }
-    else
-    {
+    else {
         base->IOCR = iocReg | (1U << config->cePinMux);
     }
 
@@ -512,89 +476,72 @@ status_t SEMC_ConfigureNOR(SEMC_Type *base, semc_nor_config_t *config, uint32_t
     uint8_t memsize;
     status_t result;
 
-    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS))
-    {
+    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS)) {
         return kStatus_SEMC_InvalidBaseAddress;
     }
 
     uint32_t iocReg = base->IOCR & ~(SEMC_IOCR_PINMUXBITWIDTH << config->cePinMux);
-    uint32_t muxCe = (config->cePinMux == kSEMC_MUXRDY) ?
-                         SEMC_IOCR_NOR_CE - 1 :
-                         ((config->cePinMux == kSEMC_MUXA8) ? SEMC_IOCR_NOR_CE_A8 : SEMC_IOCR_NOR_CE);
+    uint32_t muxCe  = (config->cePinMux == kSEMC_MUXRDY)
+                         ? SEMC_IOCR_NOR_CE - 1
+                         : ((config->cePinMux == kSEMC_MUXA8) ? SEMC_IOCR_NOR_CE_A8 : SEMC_IOCR_NOR_CE);
 
     /* IOMUX setting. */
     base->IOCR = iocReg | (muxCe << config->cePinMux);
     /* Address bit setting. */
-    if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE)
-    {
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 1)
-        {
+    if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE) {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 1) {
             /* Address bit 24 (A24) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX0_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX0)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX0) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 2)
-        {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 2) {
             /* Address bit 25 (A25) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX1_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX1)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX1) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 3)
-        {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 3) {
             /* Address bit 26 (A26) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX2_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX2)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX2) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 4)
-        {
-            if (config->addr27 == kSEMC_NORA27_MUXCSX3)
-            {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 4) {
+            if (config->addr27 == kSEMC_NORA27_MUXCSX3) {
                 /* Address bit 27 (A27) */
                 base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX3_MASK;
             }
-            else if (config->addr27 == kSEMC_NORA27_MUXRDY)
-            {
+            else if (config->addr27 == kSEMC_NORA27_MUXRDY) {
                 base->IOCR |= SEMC_IOCR_MUX_RDY_MASK;
             }
-            else
-            {
+            else {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
-            if (config->cePinMux == kSEMC_MUXCSX3)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX3) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX)
-        {
+        if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX) {
             return kStatus_SEMC_InvalidAddressPortWidth;
         }
     }
 
     /* Base control. */
-    if (config->rdyactivePolarity == kSEMC_RdyActivehigh)
-    {
+    if (config->rdyactivePolarity == kSEMC_RdyActivehigh) {
         base->MCR |= SEMC_MCR_WPOL0_MASK;
     }
-    else
-    {
+    else {
         base->MCR &= ~SEMC_MCR_WPOL0_MASK;
     }
     result = SEMC_CovertMemorySize(base, config->memsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
-    base->BR[5] = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
+    base->BR[5]  = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
     base->NORCR0 = SEMC_NORCR0_PS(config->portSize) | SEMC_NORCR0_BL(config->burstLen) |
                    SEMC_NORCR0_AM(config->addrMode) | SEMC_NORCR0_ADVP(config->advActivePolarity) |
                    SEMC_NORCR0_COL(config->columnAddrBitNum);
@@ -625,81 +572,66 @@ status_t SEMC_ConfigureSRAM(SEMC_Type *base, semc_sram_config_t *config, uint32_
     uint8_t memsize;
     status_t result = kStatus_Success;
 
-    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS))
-    {
+    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS)) {
         return kStatus_SEMC_InvalidBaseAddress;
     }
 
     uint32_t iocReg = base->IOCR & ~(SEMC_IOCR_PINMUXBITWIDTH << config->cePinMux);
-    uint32_t muxCe = (config->cePinMux == kSEMC_MUXRDY) ?
-                         SEMC_IOCR_PSRAM_CE - 1 :
-                         ((config->cePinMux == kSEMC_MUXA8) ? SEMC_IOCR_PSRAM_CE_A8 : SEMC_IOCR_PSRAM_CE);
+    uint32_t muxCe  = (config->cePinMux == kSEMC_MUXRDY)
+                         ? SEMC_IOCR_PSRAM_CE - 1
+                         : ((config->cePinMux == kSEMC_MUXA8) ? SEMC_IOCR_PSRAM_CE_A8 : SEMC_IOCR_PSRAM_CE);
 
     /* IOMUX setting. */
     base->IOCR = iocReg | (muxCe << config->cePinMux);
     /* Address bit setting. */
-    if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE)
-    {
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 1)
-        {
+    if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE) {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 1) {
             /* Address bit 24 (A24) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX0_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX0)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX0) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 2)
-        {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 2) {
             /* Address bit 25 (A25) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX1_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX1)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX1) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 3)
-        {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 3) {
             /* Address bit 26 (A26) */
             base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX2_MASK;
-            if (config->cePinMux == kSEMC_MUXCSX2)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX2) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 4)
-        {
-            if (config->addr27 == kSEMC_NORA27_MUXCSX3)
-            {
+        if (config->addrPortWidth >= SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHBASE + 4) {
+            if (config->addr27 == kSEMC_NORA27_MUXCSX3) {
                 /* Address bit 27 (A27) */
                 base->IOCR &= (uint32_t)~SEMC_IOCR_MUX_CSX3_MASK;
             }
-            else if (config->addr27 == kSEMC_NORA27_MUXRDY)
-            {
+            else if (config->addr27 == kSEMC_NORA27_MUXRDY) {
                 base->IOCR |= SEMC_IOCR_MUX_RDY_MASK;
             }
-            else
-            {
+            else {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
 
-            if (config->cePinMux == kSEMC_MUXCSX3)
-            {
+            if (config->cePinMux == kSEMC_MUXCSX3) {
                 return kStatus_SEMC_InvalidSwPinmuxSelection;
             }
         }
-        if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX)
-        {
+        if (config->addrPortWidth > SEMC_NORFLASH_SRAM_ADDR_PORTWIDTHMAX) {
             return kStatus_SEMC_InvalidAddressPortWidth;
         }
     }
     /* Base control. */
     result = SEMC_CovertMemorySize(base, config->memsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
-    base->BR[6] = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
+    base->BR[6]   = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
     base->SRAMCR0 = SEMC_SRAMCR0_PS(config->portSize) | SEMC_SRAMCR0_BL(config->burstLen) |
                     SEMC_SRAMCR0_AM(config->addrMode) | SEMC_SRAMCR0_ADVP(config->advActivePolarity) |
                     SEMC_SRAMCR0_COL_MASK;
@@ -731,22 +663,20 @@ status_t SEMC_ConfigureDBI(SEMC_Type *base, semc_dbi_config_t *config, uint32_t
     uint8_t memsize;
     status_t result;
 
-    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS))
-    {
+    if ((config->address < SEMC_STARTADDRESS) || (config->address > SEMC_ENDADDRESS)) {
         return kStatus_SEMC_InvalidBaseAddress;
     }
 
     uint32_t iocReg = base->IOCR & ~(SEMC_IOCR_PINMUXBITWIDTH << config->csxPinMux);
-    uint32_t muxCsx = (config->csxPinMux == kSEMC_MUXRDY) ?
-                          SEMC_IOCR_DBI_CSX - 1 :
-                          ((config->csxPinMux == kSEMC_MUXA8) ? SEMC_IOCR_DBI_CSX_A8 : SEMC_IOCR_DBI_CSX);
+    uint32_t muxCsx = (config->csxPinMux == kSEMC_MUXRDY)
+                          ? SEMC_IOCR_DBI_CSX - 1
+                          : ((config->csxPinMux == kSEMC_MUXA8) ? SEMC_IOCR_DBI_CSX_A8 : SEMC_IOCR_DBI_CSX);
 
     /* IOMUX setting. */
     base->IOCR = iocReg | (muxCsx << config->csxPinMux);
     /* Base control. */
     result = SEMC_CovertMemorySize(base, config->memsize_kbytes, &memsize);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
     base->BR[7] = (config->address & SEMC_BR_BA_MASK) | SEMC_BR_MS(memsize) | SEMC_BR_VLD_MASK;
@@ -768,7 +698,7 @@ status_t SEMC_SendIPCommand(
     SEMC_Type *base, semc_mem_type_t type, uint32_t address, uint16_t command, uint32_t write, uint32_t *read)
 {
     uint32_t cmdMode;
-    bool readCmd = 0;
+    bool readCmd  = 0;
     bool writeCmd = 0;
     status_t result;
 
@@ -779,33 +709,31 @@ status_t SEMC_SendIPCommand(
 
     /* Check command mode. */
     cmdMode = command & 0xFU;
-    switch (type)
-    {
-        case kSEMC_MemType_NAND:
-            readCmd = (cmdMode == kSEMC_NANDCM_CommandAddressRead) ||
-                      (cmdMode == kSEMC_NANDCM_CommandRead) || (cmdMode == kSEMC_NANDCM_Read);
-            writeCmd = (cmdMode == kSEMC_NANDCM_CommandAddressWrite) ||
-                       (cmdMode == kSEMC_NANDCM_CommandWrite) || (cmdMode == kSEMC_NANDCM_Write);
-            break;
-        case kSEMC_MemType_NOR:
-        case kSEMC_MemType_8080:
-            readCmd = (cmdMode == kSEMC_NORDBICM_Read);
-            writeCmd = (cmdMode == kSEMC_NORDBICM_Write);
-            break;
-        case kSEMC_MemType_SRAM:
-            readCmd = (cmdMode == kSEMC_SRAMCM_ArrayRead) || (cmdMode == kSEMC_SRAMCM_RegRead);
-            writeCmd = (cmdMode == kSEMC_SRAMCM_ArrayWrite) || (cmdMode == kSEMC_SRAMCM_RegWrite);
-            break;
-        case kSEMC_MemType_SDRAM:
-            readCmd = (cmdMode == kSEMC_SDRAMCM_Read);
-            writeCmd = (cmdMode == kSEMC_SDRAMCM_Write) || (cmdMode == kSEMC_SDRAMCM_Modeset);
-            break;
-        default:
-            break;
+    switch (type) {
+    case kSEMC_MemType_NAND:
+        readCmd = (cmdMode == kSEMC_NANDCM_CommandAddressRead) || (cmdMode == kSEMC_NANDCM_CommandRead) ||
+                  (cmdMode == kSEMC_NANDCM_Read);
+        writeCmd = (cmdMode == kSEMC_NANDCM_CommandAddressWrite) || (cmdMode == kSEMC_NANDCM_CommandWrite) ||
+                   (cmdMode == kSEMC_NANDCM_Write);
+        break;
+    case kSEMC_MemType_NOR:
+    case kSEMC_MemType_8080:
+        readCmd  = (cmdMode == kSEMC_NORDBICM_Read);
+        writeCmd = (cmdMode == kSEMC_NORDBICM_Write);
+        break;
+    case kSEMC_MemType_SRAM:
+        readCmd  = (cmdMode == kSEMC_SRAMCM_ArrayRead) || (cmdMode == kSEMC_SRAMCM_RegRead);
+        writeCmd = (cmdMode == kSEMC_SRAMCM_ArrayWrite) || (cmdMode == kSEMC_SRAMCM_RegWrite);
+        break;
+    case kSEMC_MemType_SDRAM:
+        readCmd  = (cmdMode == kSEMC_SDRAMCM_Read);
+        writeCmd = (cmdMode == kSEMC_SDRAMCM_Write) || (cmdMode == kSEMC_SDRAMCM_Modeset);
+        break;
+    default:
+        break;
     }
 
-    if (writeCmd)
-    {
+    if (writeCmd) {
         /* Set data. */
         base->IPTXDAT = write;
     }
@@ -814,13 +742,11 @@ status_t SEMC_SendIPCommand(
     base->IPCMD = command | SEMC_IPCMD_KEY(SEMC_IPCOMMANDMAGICKEY);
     /* Wait for command done. */
     result = SEMC_IsIPCommandDone(base);
-    if (result != kStatus_Success)
-    {
+    if (result != kStatus_Success) {
         return result;
     }
 
-    if (readCmd)
-    {
+    if (readCmd) {
         /* Get the read data */
         *read = base->IPRXDAT;
     }
@@ -838,13 +764,11 @@ status_t SEMC_IPCommandNandWrite(SEMC_Type *base, uint32_t address, uint8_t *dat
 
     /* Write command built */
     ipCmd = SEMC_BuildNandIPCommand(0, kSEMC_NANDAM_ColumnRow, kSEMC_NANDCM_Write);
-    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX)
-    {
+    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX) {
         /* Configure IP command data size. */
         SEMC_ConfigureIPCommand(base, SEMC_IPCOMMANDDATASIZEBYTEMAX);
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NAND, address, ipCmd, *(uint32_t *)data, NULL);
-        if (result != kStatus_Success)
-        {
+        if (result != kStatus_Success) {
             break;
         }
 
@@ -852,12 +776,10 @@ status_t SEMC_IPCommandNandWrite(SEMC_Type *base, uint32_t address, uint8_t *dat
         size_bytes -= SEMC_IPCOMMANDDATASIZEBYTEMAX;
     }
 
-    if ((result == kStatus_Success) && size_bytes)
-    {
+    if ((result == kStatus_Success) && size_bytes) {
         SEMC_ConfigureIPCommand(base, size_bytes);
 
-        while (size_bytes)
-        {
+        while (size_bytes) {
             tempData |= ((uint32_t) * (data + size_bytes - 1) << ((size_bytes - 1) * SEMC_BYTE_NUMBIT));
             size_bytes--;
         }
@@ -881,11 +803,9 @@ status_t SEMC_IPCommandNandRead(SEMC_Type *base, uint32_t address, uint8_t *data
     /* Read command built */
     ipCmd = SEMC_BuildNandIPCommand(0, kSEMC_NANDAM_ColumnRow, kSEMC_NANDCM_Read);
 
-    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX)
-    {
+    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX) {
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NAND, address, ipCmd, 0, (uint32_t *)data);
-        if (result != kStatus_Success)
-        {
+        if (result != kStatus_Success) {
             break;
         }
 
@@ -893,13 +813,11 @@ status_t SEMC_IPCommandNandRead(SEMC_Type *base, uint32_t address, uint8_t *data
         size_bytes -= SEMC_IPCOMMANDDATASIZEBYTEMAX;
     }
 
-    if ((result == kStatus_Success) && size_bytes)
-    {
+    if ((result == kStatus_Success) && size_bytes) {
         SEMC_ConfigureIPCommand(base, size_bytes);
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NAND, address, ipCmd, 0, &tempData);
 
-        while (size_bytes)
-        {
+        while (size_bytes) {
             size_bytes--;
             *(data + size_bytes) = (tempData >> (SEMC_BYTE_NUMBIT * size_bytes)) & 0xFFU;
         }
@@ -913,17 +831,15 @@ status_t SEMC_IPCommandNorRead(SEMC_Type *base, uint32_t address, uint8_t *data,
     assert(data);
 
     uint32_t tempData = 0;
-    status_t result = kStatus_Success;
-    uint8_t dataSize = base->NORCR0 & SEMC_NORCR0_PS_MASK;
+    status_t result   = kStatus_Success;
+    uint8_t dataSize  = base->NORCR0 & SEMC_NORCR0_PS_MASK;
 
     /* Configure IP command data size. */
     SEMC_ConfigureIPCommand(base, SEMC_IPCOMMANDDATASIZEBYTEMAX);
 
-    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX)
-    {
+    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX) {
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NOR, address, kSEMC_NORDBICM_Read, 0, (uint32_t *)data);
-        if (result != kStatus_Success)
-        {
+        if (result != kStatus_Success) {
             break;
         }
 
@@ -931,12 +847,10 @@ status_t SEMC_IPCommandNorRead(SEMC_Type *base, uint32_t address, uint8_t *data,
         size_bytes -= SEMC_IPCOMMANDDATASIZEBYTEMAX;
     }
 
-    if ((result == kStatus_Success) && size_bytes)
-    {
+    if ((result == kStatus_Success) && size_bytes) {
         SEMC_ConfigureIPCommand(base, size_bytes);
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NOR, address, kSEMC_NORDBICM_Read, 0, &tempData);
-        while (size_bytes)
-        {
+        while (size_bytes) {
             size_bytes--;
             *(data + size_bytes) = (tempData >> (SEMC_BYTE_NUMBIT * size_bytes)) & 0xFFU;
         }
@@ -951,29 +865,25 @@ status_t SEMC_IPCommandNorWrite(SEMC_Type *base, uint32_t address, uint8_t *data
     assert(data);
 
     uint32_t tempData = 0;
-    status_t result = kStatus_Success;
-    uint8_t dataSize = base->NORCR0 & SEMC_NORCR0_PS_MASK;
+    status_t result   = kStatus_Success;
+    uint8_t dataSize  = base->NORCR0 & SEMC_NORCR0_PS_MASK;
 
     /* Write command built */
-    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX)
-    {
+    while (size_bytes >= SEMC_IPCOMMANDDATASIZEBYTEMAX) {
         /* Configure IP command data size. */
         SEMC_ConfigureIPCommand(base, SEMC_IPCOMMANDDATASIZEBYTEMAX);
         result = SEMC_SendIPCommand(base, kSEMC_MemType_NOR, address, kSEMC_NORDBICM_Write, *(uint32_t *)data, NULL);
-        if (result != kStatus_Success)
-        {
+        if (result != kStatus_Success) {
             break;
         }
         size_bytes -= SEMC_IPCOMMANDDATASIZEBYTEMAX;
         data += SEMC_IPCOMMANDDATASIZEBYTEMAX;
     }
 
-    if ((result == kStatus_Success) && size_bytes)
-    {
+    if ((result == kStatus_Success) && size_bytes) {
         SEMC_ConfigureIPCommand(base, size_bytes);
 
-        while (size_bytes)
-        {
+        while (size_bytes) {
             tempData |= ((uint32_t) * (data + size_bytes - 1) << ((size_bytes - 1) * SEMC_BYTE_NUMBIT));
             size_bytes--;
         }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.h
index a6937e12e..6426beeff 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_semc.h
@@ -53,22 +53,23 @@
 /*! @brief SEMC status. */
 enum _semc_status
 {
-    kStatus_SEMC_InvalidDeviceType = MAKE_STATUS(kStatusGroup_SEMC, 0),
-    kStatus_SEMC_IpCommandExecutionError = MAKE_STATUS(kStatusGroup_SEMC, 1),
-    kStatus_SEMC_AxiCommandExecutionError = MAKE_STATUS(kStatusGroup_SEMC, 2),
-    kStatus_SEMC_InvalidMemorySize = MAKE_STATUS(kStatusGroup_SEMC, 3),
-    kStatus_SEMC_InvalidIpcmdDataSize = MAKE_STATUS(kStatusGroup_SEMC, 4),
-    kStatus_SEMC_InvalidAddressPortWidth = MAKE_STATUS(kStatusGroup_SEMC, 5),
-    kStatus_SEMC_InvalidDataPortWidth = MAKE_STATUS(kStatusGroup_SEMC, 6),
-    kStatus_SEMC_InvalidSwPinmuxSelection = MAKE_STATUS(kStatusGroup_SEMC, 7),
-    kStatus_SEMC_InvalidBurstLength = MAKE_STATUS(kStatusGroup_SEMC, 8),
+    kStatus_SEMC_InvalidDeviceType            = MAKE_STATUS(kStatusGroup_SEMC, 0),
+    kStatus_SEMC_IpCommandExecutionError      = MAKE_STATUS(kStatusGroup_SEMC, 1),
+    kStatus_SEMC_AxiCommandExecutionError     = MAKE_STATUS(kStatusGroup_SEMC, 2),
+    kStatus_SEMC_InvalidMemorySize            = MAKE_STATUS(kStatusGroup_SEMC, 3),
+    kStatus_SEMC_InvalidIpcmdDataSize         = MAKE_STATUS(kStatusGroup_SEMC, 4),
+    kStatus_SEMC_InvalidAddressPortWidth      = MAKE_STATUS(kStatusGroup_SEMC, 5),
+    kStatus_SEMC_InvalidDataPortWidth         = MAKE_STATUS(kStatusGroup_SEMC, 6),
+    kStatus_SEMC_InvalidSwPinmuxSelection     = MAKE_STATUS(kStatusGroup_SEMC, 7),
+    kStatus_SEMC_InvalidBurstLength           = MAKE_STATUS(kStatusGroup_SEMC, 8),
     kStatus_SEMC_InvalidColumnAddressBitWidth = MAKE_STATUS(kStatusGroup_SEMC, 9),
-    kStatus_SEMC_InvalidBaseAddress = MAKE_STATUS(kStatusGroup_SEMC, 10),
-    kStatus_SEMC_InvalidTimerSetting = MAKE_STATUS(kStatusGroup_SEMC, 11),
+    kStatus_SEMC_InvalidBaseAddress           = MAKE_STATUS(kStatusGroup_SEMC, 10),
+    kStatus_SEMC_InvalidTimerSetting          = MAKE_STATUS(kStatusGroup_SEMC, 11),
 };
 
 /*! @brief SEMC memory device type. */
-typedef enum _semc_mem_type {
+typedef enum _semc_mem_type
+{
     kSEMC_MemType_SDRAM = 0, /*!< SDRAM */
     kSEMC_MemType_SRAM,      /*!< SRAM */
     kSEMC_MemType_NOR,       /*!< NOR */
@@ -77,13 +78,15 @@ typedef enum _semc_mem_type {
 } semc_mem_type_t;
 
 /*! @brief SEMC WAIT/RDY polarity. */
-typedef enum _semc_waitready_polarity {
+typedef enum _semc_waitready_polarity
+{
     kSEMC_LowActive = 0, /*!< Low active. */
     kSEMC_HighActive,    /*!< High active. */
 } semc_waitready_polarity_t;
 
 /*! @brief SEMC SDRAM Chip selection . */
-typedef enum _semc_sdram_cs {
+typedef enum _semc_sdram_cs
+{
     kSEMC_SDRAM_CS0 = 0, /*!< SEMC SDRAM CS0. */
     kSEMC_SDRAM_CS1,     /*!< SEMC SDRAM CS1. */
     kSEMC_SDRAM_CS2,     /*!< SEMC SDRAM CS2. */
@@ -91,21 +94,24 @@ typedef enum _semc_sdram_cs {
 } semc_sdram_cs_t;
 
 /*! @brief SEMC NAND device type. */
-typedef enum _semc_nand_access_type {
+typedef enum _semc_nand_access_type
+{
     kSEMC_NAND_ACCESS_BY_AXI = 0,
     kSEMC_NAND_ACCESS_BY_IPCMD,
 } semc_nand_access_type_t;
 
 /*! @brief SEMC interrupts . */
-typedef enum _semc_interrupt_enable {
+typedef enum _semc_interrupt_enable
+{
     kSEMC_IPCmdDoneInterrupt = SEMC_INTEN_IPCMDDONEEN_MASK, /*!< Ip command done interrupt. */
-    kSEMC_IPCmdErrInterrupt = SEMC_INTEN_IPCMDERREN_MASK,   /*!< Ip command error interrupt. */
+    kSEMC_IPCmdErrInterrupt  = SEMC_INTEN_IPCMDERREN_MASK,  /*!< Ip command error interrupt. */
     kSEMC_AXICmdErrInterrupt = SEMC_INTEN_AXICMDERREN_MASK, /*!< AXI command error interrupt. */
     kSEMC_AXIBusErrInterrupt = SEMC_INTEN_AXIBUSERREN_MASK  /*!< AXI bus error interrupt. */
 } semc_interrupt_enable_t;
 
 /*! @brief SEMC IP command data size in bytes. */
-typedef enum _semc_ipcmd_datasize {
+typedef enum _semc_ipcmd_datasize
+{
     kSEMC_IPcmdDataSize_1bytes = 1, /*!< The IP command data size 1 byte. */
     kSEMC_IPcmdDataSize_2bytes,     /*!< The IP command data size 2 byte. */
     kSEMC_IPcmdDataSize_3bytes,     /*!< The IP command data size 3 byte. */
@@ -113,21 +119,24 @@ typedef enum _semc_ipcmd_datasize {
 } semc_ipcmd_datasize_t;
 
 /*! @brief SEMC auto-refresh timing. */
-typedef enum _semc_refresh_time {
+typedef enum _semc_refresh_time
+{
     kSEMC_RefreshThreeClocks = 0x0U, /*!< The refresh timing with three bus clocks. */
     kSEMC_RefreshSixClocks,          /*!< The refresh timing with six bus clocks. */
     kSEMC_RefreshNineClocks          /*!< The refresh timing with nine bus clocks. */
 } semc_refresh_time_t;
 
 /*! @brief CAS latency */
-typedef enum _semc_caslatency {
+typedef enum _semc_caslatency
+{
     kSEMC_LatencyOne = 1, /*!< Latency  1. */
     kSEMC_LatencyTwo,     /*!< Latency  2. */
     kSEMC_LatencyThree,   /*!< Latency  3. */
 } semc_caslatency_t;
 
 /*! @brief SEMC sdram column address bit number. */
-typedef enum _semc_sdram_column_bit_num {
+typedef enum _semc_sdram_column_bit_num
+{
     kSEMC_SdramColunm_12bit = 0x0U, /*!< 12 bit. */
     kSEMC_SdramColunm_11bit,        /*!< 11 bit. */
     kSEMC_SdramColunm_10bit,        /*!< 10 bit. */
@@ -135,7 +144,8 @@ typedef enum _semc_sdram_column_bit_num {
 } semc_sdram_column_bit_num_t;
 
 /*! @brief SEMC sdram burst length. */
-typedef enum _semc_sdram_burst_len {
+typedef enum _semc_sdram_burst_len
+{
     kSEMC_Sdram_BurstLen1 = 0, /*!< Burst length 1*/
     kSEMC_Sdram_BurstLen2,     /*!< Burst length 2*/
     kSEMC_Sdram_BurstLen4,     /*!< Burst length 4*/
@@ -143,7 +153,8 @@ typedef enum _semc_sdram_burst_len {
 } sem_sdram_burst_len_t;
 
 /*! @brief SEMC nand column address bit number. */
-typedef enum _semc_nand_column_bit_num {
+typedef enum _semc_nand_column_bit_num
+{
     kSEMC_NandColum_16bit = 0x0U, /*!< 16 bit. */
     kSEMC_NandColum_15bit,        /*!< 15 bit. */
     kSEMC_NandColum_14bit,        /*!< 14 bit. */
@@ -155,7 +166,8 @@ typedef enum _semc_nand_column_bit_num {
 } semc_nand_column_bit_num_t;
 
 /*! @brief SEMC nand burst length. */
-typedef enum _semc_nand_burst_len {
+typedef enum _semc_nand_burst_len
+{
     kSEMC_Nand_BurstLen1 = 0, /*!< Burst length 1*/
     kSEMC_Nand_BurstLen2,     /*!< Burst length 2*/
     kSEMC_Nand_BurstLen4,     /*!< Burst length 4*/
@@ -166,7 +178,8 @@ typedef enum _semc_nand_burst_len {
 } sem_nand_burst_len_t;
 
 /*! @brief SEMC nor/sram column address bit number. */
-typedef enum _semc_norsram_column_bit_num {
+typedef enum _semc_norsram_column_bit_num
+{
     kSEMC_NorColum_12bit = 0x0U, /*!< 12 bit. */
     kSEMC_NorColum_11bit,        /*!< 11 bit. */
     kSEMC_NorColum_10bit,        /*!< 10 bit. */
@@ -181,7 +194,8 @@ typedef enum _semc_norsram_column_bit_num {
 } semc_norsram_column_bit_num_t;
 
 /*! @brief SEMC nor/sram burst length. */
-typedef enum _semc_norsram_burst_len {
+typedef enum _semc_norsram_burst_len
+{
     kSEMC_Nor_BurstLen1 = 0, /*!< Burst length 1*/
     kSEMC_Nor_BurstLen2,     /*!< Burst length 2*/
     kSEMC_Nor_BurstLen4,     /*!< Burst length 4*/
@@ -192,7 +206,8 @@ typedef enum _semc_norsram_burst_len {
 } sem_norsram_burst_len_t;
 
 /*! @brief SEMC dbi column address bit number. */
-typedef enum _semc_dbi_column_bit_num {
+typedef enum _semc_dbi_column_bit_num
+{
     kSEMC_Dbi_Colum_12bit = 0x0U, /*!< 12 bit. */
     kSEMC_Dbi_Colum_11bit,        /*!< 11 bit. */
     kSEMC_Dbi_Colum_10bit,        /*!< 10 bit. */
@@ -207,7 +222,8 @@ typedef enum _semc_dbi_column_bit_num {
 } semc_dbi_column_bit_num_t;
 
 /*! @brief SEMC dbi burst length. */
-typedef enum _semc_dbi_burst_len {
+typedef enum _semc_dbi_burst_len
+{
     kSEMC_Dbi_BurstLen1 = 0, /*!< Burst length 1*/
     kSEMC_Dbi_BurstLen2,     /*!< Burst length 2*/
     kSEMC_Dbi_Dbi_BurstLen4, /*!< Burst length 4*/
@@ -218,55 +234,63 @@ typedef enum _semc_dbi_burst_len {
 } sem_dbi_burst_len_t;
 
 /*! @brief SEMC IOMUXC. */
-typedef enum _semc_iomux_pin {
-    kSEMC_MUXA8 = SEMC_IOCR_MUX_A8_SHIFT,     /*!< MUX A8 pin. */
+typedef enum _semc_iomux_pin
+{
+    kSEMC_MUXA8   = SEMC_IOCR_MUX_A8_SHIFT,   /*!< MUX A8 pin. */
     kSEMC_MUXCSX0 = SEMC_IOCR_MUX_CSX0_SHIFT, /*!< MUX CSX0 pin */
     kSEMC_MUXCSX1 = SEMC_IOCR_MUX_CSX1_SHIFT, /*!< MUX CSX1 Pin.*/
     kSEMC_MUXCSX2 = SEMC_IOCR_MUX_CSX2_SHIFT, /*!< MUX CSX2 Pin. */
     kSEMC_MUXCSX3 = SEMC_IOCR_MUX_CSX3_SHIFT, /*!< MUX CSX3 Pin. */
-    kSEMC_MUXRDY = SEMC_IOCR_MUX_RDY_SHIFT    /*!< MUX RDY pin. */
+    kSEMC_MUXRDY  = SEMC_IOCR_MUX_RDY_SHIFT   /*!< MUX RDY pin. */
 } semc_iomux_pin;
 
 /*! @brief SEMC NOR/PSRAM Address bit 27 A27. */
-typedef enum _semc_iomux_nora27_pin {
-    kSEMC_MORA27_NONE = 0,                           /*!< No NOR/SRAM A27 pin. */
+typedef enum _semc_iomux_nora27_pin
+{
+    kSEMC_MORA27_NONE    = 0,                        /*!< No NOR/SRAM A27 pin. */
     kSEMC_NORA27_MUXCSX3 = SEMC_IOCR_MUX_CSX3_SHIFT, /*!< MUX CSX3 Pin. */
-    kSEMC_NORA27_MUXRDY = SEMC_IOCR_MUX_RDY_SHIFT    /*!< MUX RDY pin. */
+    kSEMC_NORA27_MUXRDY  = SEMC_IOCR_MUX_RDY_SHIFT   /*!< MUX RDY pin. */
 } semc_iomux_nora27_pin;
 
 /*! @brief SEMC port size. */
-typedef enum _semc_port_size {
+typedef enum _semc_port_size
+{
     kSEMC_PortSize8Bit = 0, /*!< 8-Bit port size. */
     kSEMC_PortSize16Bit     /*!< 16-Bit port size. */
 } smec_port_size_t;
 
 /*! @brief SEMC address mode. */
-typedef enum _semc_addr_mode {
+typedef enum _semc_addr_mode
+{
     kSEMC_AddrDataMux = 0, /*!< SEMC address/data mux mode. */
     kSEMC_AdvAddrdataMux,  /*!< Advanced address/data mux mode. */
     kSEMC_AddrDataNonMux   /*!< Address/data non-mux mode. */
 } semc_addr_mode_t;
 
 /*! @brief SEMC DQS read strobe mode. */
-typedef enum _semc_dqs_mode {
+typedef enum _semc_dqs_mode
+{
     kSEMC_Loopbackinternal = 0, /*!< Dummy read strobe loopbacked internally. */
     kSEMC_Loopbackdqspad,       /*!< Dummy read strobe loopbacked from DQS pad. */
 } semc_dqs_mode_t;
 
 /*! @brief SEMC ADV signal active polarity. */
-typedef enum _semc_adv_polarity {
+typedef enum _semc_adv_polarity
+{
     kSEMC_AdvActiveLow = 0, /*!< Adv active low. */
     kSEMC_AdvActivehigh,    /*!< Adv active low. */
 } semc_adv_polarity_t;
 
 /*! @brief SEMC RDY signal active polarity. */
-typedef enum _semc_rdy_polarity {
+typedef enum _semc_rdy_polarity
+{
     kSEMC_RdyActiveLow = 0, /*!< Adv active low. */
     kSEMC_RdyActivehigh,    /*!< Adv active low. */
 } semc_rdy_polarity_t;
 
 /*! @brief SEMC IP command for NAND: address mode. */
-typedef enum _semc_ipcmd_nand_addrmode {
+typedef enum _semc_ipcmd_nand_addrmode
+{
     kSEMC_NANDAM_ColumnRow = 0x0U, /*!< Address mode: column and row address(5Byte-CA0/CA1/RA0/RA1/RA2). */
     kSEMC_NANDAM_ColumnCA0,        /*!< Address mode: column address only(1 Byte-CA0).  */
     kSEMC_NANDAM_ColumnCA0CA1,     /*!< Address mode: column address only(2 Byte-CA0/CA1). */
@@ -276,21 +300,23 @@ typedef enum _semc_ipcmd_nand_addrmode {
 } semc_ipcmd_nand_addrmode_t;
 
 /*! @brief SEMC IP command for NAND： command mode. */
-typedef enum _semc_ipcmd_nand_cmdmode {
-    kSEMC_NANDCM_Command = 0x2U,        /*!< command. */
-    kSEMC_NANDCM_CommandHold,           /*!< Command hold. */
-    kSEMC_NANDCM_CommandAddress,        /*!< Command address. */
-    kSEMC_NANDCM_CommandAddressHold,    /*!< Command address hold.  */
-    kSEMC_NANDCM_CommandAddressRead,    /*!< Command address read.  */
-    kSEMC_NANDCM_CommandAddressWrite,   /*!< Command address write.  */
-    kSEMC_NANDCM_CommandRead,           /*!< Command read.  */
-    kSEMC_NANDCM_CommandWrite,          /*!< Command write.  */
-    kSEMC_NANDCM_Read,                  /*!< Read.  */
-    kSEMC_NANDCM_Write                  /*!< Write.  */
+typedef enum _semc_ipcmd_nand_cmdmode
+{
+    kSEMC_NANDCM_Command = 0x2U,      /*!< command. */
+    kSEMC_NANDCM_CommandHold,         /*!< Command hold. */
+    kSEMC_NANDCM_CommandAddress,      /*!< Command address. */
+    kSEMC_NANDCM_CommandAddressHold,  /*!< Command address hold.  */
+    kSEMC_NANDCM_CommandAddressRead,  /*!< Command address read.  */
+    kSEMC_NANDCM_CommandAddressWrite, /*!< Command address write.  */
+    kSEMC_NANDCM_CommandRead,         /*!< Command read.  */
+    kSEMC_NANDCM_CommandWrite,        /*!< Command write.  */
+    kSEMC_NANDCM_Read,                /*!< Read.  */
+    kSEMC_NANDCM_Write                /*!< Write.  */
 } semc_ipcmd_nand_cmdmode_t;
 
 /*! @brief SEMC NAND address option. */
-typedef enum _semc_nand_address_option {
+typedef enum _semc_nand_address_option
+{
     kSEMC_NandAddrOption_5byte_CA2RA3 = 0U, /*!< CA0+CA1+RA0+RA1+RA2 */
     kSEMC_NandAddrOption_4byte_CA2RA2 = 2U, /*!< CA0+CA1+RA0+RA1 */
     kSEMC_NandAddrOption_3byte_CA2RA1 = 4U, /*!< CA0+CA1+RA0 */
@@ -300,13 +326,15 @@ typedef enum _semc_nand_address_option {
 } semc_nand_address_option_t;
 
 /*! @brief SEMC IP command for NOR. */
-typedef enum _semc_ipcmd_nor_dbi {
+typedef enum _semc_ipcmd_nor_dbi
+{
     kSEMC_NORDBICM_Read = 0x2U, /*!< NOR read. */
     kSEMC_NORDBICM_Write        /*!< NOR write.  */
 } semc_ipcmd_nor_dbi_t;
 
 /*! @brief SEMC IP command for SRAM. */
-typedef enum _semc_ipcmd_sram {
+typedef enum _semc_ipcmd_sram
+{
     kSEMC_SRAMCM_ArrayRead = 0x2U, /*!< SRAM memory array read. */
     kSEMC_SRAMCM_ArrayWrite,       /*!< SRAM memory array write. */
     kSEMC_SRAMCM_RegRead,          /*!< SRAM memory register read. */
@@ -314,7 +342,8 @@ typedef enum _semc_ipcmd_sram {
 } semc_ipcmd_sram_t;
 
 /*! @brief SEMC IP command for SDARM. */
-typedef enum _semc_ipcmd_sdram {
+typedef enum _semc_ipcmd_sdram
+{
     kSEMC_SDRAMCM_Read = 0x8U, /*!< SDRAM memory read. */
     kSEMC_SDRAMCM_Write,       /*!< SDRAM memory write. */
     kSEMC_SDRAMCM_Modeset,     /*!< SDRAM MODE SET. */
@@ -362,26 +391,24 @@ typedef struct _semc_sdram_config
     uint8_t refreshBurstLen;         /*!< Refresh burst length. */
 } semc_sdram_config_t;
 
-
 /*! @brief SEMC NAND device timing configuration structure. */
 typedef struct _semc_nand_timing_config
 {
-    uint8_t tCeSetup_Ns;                         /*!< CE setup time: tCS. */
-    uint8_t tCeHold_Ns;                          /*!< CE hold time: tCH. */
-    uint8_t tCeInterval_Ns;                      /*!< CE interval time:tCEITV. */
-    uint8_t tWeLow_Ns;                           /*!< WE low time: tWP. */
-    uint8_t tWeHigh_Ns;                          /*!< WE high time: tWH. */
-    uint8_t tReLow_Ns;                           /*!< RE low time: tRP. */
-    uint8_t tReHigh_Ns;                          /*!< RE high time: tREH. */
-    uint8_t tTurnAround_Ns;                      /*!< Turnaround time for async mode: tTA. */
-    uint8_t tWehigh2Relow_Ns;                    /*!< WE# high to RE# wait time: tWHR. */
-    uint8_t tRehigh2Welow_Ns;                    /*!< RE# high to WE# low wait time: tRHW. */
-    uint8_t tAle2WriteStart_Ns;                  /*!< ALE to write start wait time: tADL. */
-    uint8_t tReady2Relow_Ns;                     /*!< Ready to RE# low min wait time: tRR. */
-    uint8_t tWehigh2Busy_Ns;                     /*!< WE# high to busy wait time: tWB. */    
+    uint8_t tCeSetup_Ns;        /*!< CE setup time: tCS. */
+    uint8_t tCeHold_Ns;         /*!< CE hold time: tCH. */
+    uint8_t tCeInterval_Ns;     /*!< CE interval time:tCEITV. */
+    uint8_t tWeLow_Ns;          /*!< WE low time: tWP. */
+    uint8_t tWeHigh_Ns;         /*!< WE high time: tWH. */
+    uint8_t tReLow_Ns;          /*!< RE low time: tRP. */
+    uint8_t tReHigh_Ns;         /*!< RE high time: tREH. */
+    uint8_t tTurnAround_Ns;     /*!< Turnaround time for async mode: tTA. */
+    uint8_t tWehigh2Relow_Ns;   /*!< WE# high to RE# wait time: tWHR. */
+    uint8_t tRehigh2Welow_Ns;   /*!< RE# high to WE# low wait time: tRHW. */
+    uint8_t tAle2WriteStart_Ns; /*!< ALE to write start wait time: tADL. */
+    uint8_t tReady2Relow_Ns;    /*!< Ready to RE# low min wait time: tRR. */
+    uint8_t tWehigh2Busy_Ns;    /*!< WE# high to busy wait time: tWB. */
 } semc_nand_timing_config_t;
 
-
 /*! @brief SEMC NAND configuration structure. */
 typedef struct _semc_nand_config
 {
@@ -524,279 +551,280 @@ typedef struct _semc_config_t
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name SEMC Initialization and De-initialization
- * @{
- */
+    /*!
+     * @name SEMC Initialization and De-initialization
+     * @{
+     */
 
-/*!
- * @brief Gets the SEMC default basic configuration structure.
- *
- * The purpose of this API is to get the default SEMC
- * configure structure for SEMC_Init(). User may use the initialized
- * structure unchanged in SEMC_Init(), or modify some fields of the
- * structure before calling SEMC_Init().
- * Example:
-   @code
-   semc_config_t config;
-   SEMC_GetDefaultConfig(&config);
-   @endcode
- * @param config The SEMC configuration structure pointer.
- */
-void SEMC_GetDefaultConfig(semc_config_t *config);
+    /*!
+     * @brief Gets the SEMC default basic configuration structure.
+     *
+     * The purpose of this API is to get the default SEMC
+     * configure structure for SEMC_Init(). User may use the initialized
+     * structure unchanged in SEMC_Init(), or modify some fields of the
+     * structure before calling SEMC_Init().
+     * Example:
+       @code
+       semc_config_t config;
+       SEMC_GetDefaultConfig(&config);
+       @endcode
+     * @param config The SEMC configuration structure pointer.
+     */
+    void SEMC_GetDefaultConfig(semc_config_t *config);
 
-/*!
- * @brief Initializes SEMC.
- * This function ungates the SEMC clock and initializes SEMC.
- * This function must be called before calling any other SEMC driver functions.
- *
- * @param base SEMC peripheral base address.
- * @param configure The SEMC configuration structure pointer.
- */
-void SEMC_Init(SEMC_Type *base, semc_config_t *configure);
+    /*!
+     * @brief Initializes SEMC.
+     * This function ungates the SEMC clock and initializes SEMC.
+     * This function must be called before calling any other SEMC driver functions.
+     *
+     * @param base SEMC peripheral base address.
+     * @param configure The SEMC configuration structure pointer.
+     */
+    void SEMC_Init(SEMC_Type *base, semc_config_t *configure);
 
-/*!
- * @brief Deinitializes the SEMC module and gates the clock.
- * This function gates the SEMC clock. As a result, the SEMC
- * module doesn't work after calling this function.
- *
- * @param base SEMC peripheral base address.
- */
-void SEMC_Deinit(SEMC_Type *base);
+    /*!
+     * @brief Deinitializes the SEMC module and gates the clock.
+     * This function gates the SEMC clock. As a result, the SEMC
+     * module doesn't work after calling this function.
+     *
+     * @param base SEMC peripheral base address.
+     */
+    void SEMC_Deinit(SEMC_Type *base);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name SEMC Configuration Operation For Each Memory Type
- * @{
- */
+    /*!
+     * @name SEMC Configuration Operation For Each Memory Type
+     * @{
+     */
 
-/*!
- * @brief Configures SDRAM controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param cs The chip selection.
- * @param config The sdram configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureSDRAM(SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_config_t *config, uint32_t clkSrc_Hz);
+    /*!
+     * @brief Configures SDRAM controller in SEMC.
+     *
+     * @param base SEMC peripheral base address.
+     * @param cs The chip selection.
+     * @param config The sdram configuration.
+     * @param clkSrc_Hz The SEMC clock frequency.
+     */
+    status_t SEMC_ConfigureSDRAM(SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_config_t *config, uint32_t clkSrc_Hz);
 
-/*!
- * @brief Configures NAND controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The nand configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureNAND(SEMC_Type *base, semc_nand_config_t *config, uint32_t clkSrc_Hz);
+    /*!
+     * @brief Configures NAND controller in SEMC.
+     *
+     * @param base SEMC peripheral base address.
+     * @param config The nand configuration.
+     * @param clkSrc_Hz The SEMC clock frequency.
+     */
+    status_t SEMC_ConfigureNAND(SEMC_Type *base, semc_nand_config_t *config, uint32_t clkSrc_Hz);
 
-/*!
- * @brief Configures NOR controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The nor configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureNOR(SEMC_Type *base, semc_nor_config_t *config, uint32_t clkSrc_Hz);
+    /*!
+     * @brief Configures NOR controller in SEMC.
+     *
+     * @param base SEMC peripheral base address.
+     * @param config The nor configuration.
+     * @param clkSrc_Hz The SEMC clock frequency.
+     */
+    status_t SEMC_ConfigureNOR(SEMC_Type *base, semc_nor_config_t *config, uint32_t clkSrc_Hz);
 
-/*!
- * @brief Configures SRAM controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The sram configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureSRAM(SEMC_Type *base, semc_sram_config_t *config, uint32_t clkSrc_Hz);
+    /*!
+     * @brief Configures SRAM controller in SEMC.
+     *
+     * @param base SEMC peripheral base address.
+     * @param config The sram configuration.
+     * @param clkSrc_Hz The SEMC clock frequency.
+     */
+    status_t SEMC_ConfigureSRAM(SEMC_Type *base, semc_sram_config_t *config, uint32_t clkSrc_Hz);
 
-/*!
- * @brief Configures DBI controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The dbi configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureDBI(SEMC_Type *base, semc_dbi_config_t *config, uint32_t clkSrc_Hz);
+    /*!
+     * @brief Configures DBI controller in SEMC.
+     *
+     * @param base SEMC peripheral base address.
+     * @param config The dbi configuration.
+     * @param clkSrc_Hz The SEMC clock frequency.
+     */
+    status_t SEMC_ConfigureDBI(SEMC_Type *base, semc_dbi_config_t *config, uint32_t clkSrc_Hz);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name SEMC Interrupt Operation
- * @{
- */
+    /*!
+     * @name SEMC Interrupt Operation
+     * @{
+     */
 
-/*!
- * @brief Enables the SEMC interrupt.
- *
- * This function enables the SEMC interrupts according to the provided mask. The mask
- * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
- * For example, to enable the IP command done and error interrupt, do the following.
- * @code
- *     SEMC_EnableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
- * @endcode
- *
- * @param base  SEMC peripheral base address.
- * @param mask  SEMC interrupts to enable. This is a logical OR of the
- *             enumeration :: semc_interrupt_enable_t.
- */
-static inline void SEMC_EnableInterrupts(SEMC_Type *base, uint32_t mask)
-{
-    base->INTEN |= mask;
-}
+    /*!
+     * @brief Enables the SEMC interrupt.
+     *
+     * This function enables the SEMC interrupts according to the provided mask. The mask
+     * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
+     * For example, to enable the IP command done and error interrupt, do the following.
+     * @code
+     *     SEMC_EnableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
+     * @endcode
+     *
+     * @param base  SEMC peripheral base address.
+     * @param mask  SEMC interrupts to enable. This is a logical OR of the
+     *             enumeration :: semc_interrupt_enable_t.
+     */
+    static inline void SEMC_EnableInterrupts(SEMC_Type *base, uint32_t mask)
+    {
+        base->INTEN |= mask;
+    }
 
-/*!
- * @brief Disables the SEMC interrupt.
- *
- * This function disables the SEMC interrupts according to the provided mask. The mask
- * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
- * For example, to disable the IP command done and error interrupt, do the following.
- * @code
- *     SEMC_DisableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
- * @endcode
- *
- * @param base  SEMC peripheral base address.
- * @param mask  SEMC interrupts to disable. This is a logical OR of the
- *             enumeration :: semc_interrupt_enable_t.
- */
-static inline void SEMC_DisableInterrupts(SEMC_Type *base, uint32_t mask)
-{
-    base->INTEN &= ~mask;
-}
+    /*!
+     * @brief Disables the SEMC interrupt.
+     *
+     * This function disables the SEMC interrupts according to the provided mask. The mask
+     * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
+     * For example, to disable the IP command done and error interrupt, do the following.
+     * @code
+     *     SEMC_DisableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
+     * @endcode
+     *
+     * @param base  SEMC peripheral base address.
+     * @param mask  SEMC interrupts to disable. This is a logical OR of the
+     *             enumeration :: semc_interrupt_enable_t.
+     */
+    static inline void SEMC_DisableInterrupts(SEMC_Type *base, uint32_t mask)
+    {
+        base->INTEN &= ~mask;
+    }
 
-/*!
- * @brief Gets the SEMC status.
- *
- * This function gets the SEMC interrupts event status.
- * User can use the a logical OR of enumeration member as a mask.
- * See @ref semc_interrupt_enable_t.
- *
- * @param base  SEMC peripheral base address.
- * @return status flag, use status flag in semc_interrupt_enable_t to get the related status.
- */
-static inline bool SEMC_GetStatusFlag(SEMC_Type *base)
-{
-    return base->INTR;
-}
+    /*!
+     * @brief Gets the SEMC status.
+     *
+     * This function gets the SEMC interrupts event status.
+     * User can use the a logical OR of enumeration member as a mask.
+     * See @ref semc_interrupt_enable_t.
+     *
+     * @param base  SEMC peripheral base address.
+     * @return status flag, use status flag in semc_interrupt_enable_t to get the related status.
+     */
+    static inline bool SEMC_GetStatusFlag(SEMC_Type *base)
+    {
+        return base->INTR;
+    }
 
-/*!
- * @brief Clears the SEMC status flag state.
- *
- * The following status register flags can be cleared SEMC interrupt status.
- *
- * @param base SEMC base pointer
- * @param mask The status flag mask, a logical OR of enumeration member @ref semc_interrupt_enable_t.
- */
-static inline void SEMC_ClearStatusFlags(SEMC_Type *base, uint32_t mask)
-{
-    base->INTR |= mask;
-}
+    /*!
+     * @brief Clears the SEMC status flag state.
+     *
+     * The following status register flags can be cleared SEMC interrupt status.
+     *
+     * @param base SEMC base pointer
+     * @param mask The status flag mask, a logical OR of enumeration member @ref semc_interrupt_enable_t.
+     */
+    static inline void SEMC_ClearStatusFlags(SEMC_Type *base, uint32_t mask)
+    {
+        base->INTR |= mask;
+    }
 
-/* @} */
+    /* @} */
 
-/*!
- * @name SEMC Memory Access Operation
- * @{
- */
+    /*!
+     * @name SEMC Memory Access Operation
+     * @{
+     */
 
-/*!
- * @brief Check if SEMC is in idle.
- *
- * @param base  SEMC peripheral base address.
- * @return  True SEMC is in idle, false is not in idle.
- */
-static inline bool SEMC_IsInIdle(SEMC_Type *base)
-{
-    return (base->STS0 & SEMC_STS0_IDLE_MASK) ? true : false;
-}
+    /*!
+     * @brief Check if SEMC is in idle.
+     *
+     * @param base  SEMC peripheral base address.
+     * @return  True SEMC is in idle, false is not in idle.
+     */
+    static inline bool SEMC_IsInIdle(SEMC_Type *base)
+    {
+        return (base->STS0 & SEMC_STS0_IDLE_MASK) ? true : false;
+    }
 
-/*!
- * @brief SEMC IP command access.
- *
- * @param base  SEMC peripheral base address.
- * @param type  SEMC memory type. refer to "semc_mem_type_t"
- * @param address  SEMC device address.
- * @param command  SEMC IP command.
- * For NAND device, we should use the SEMC_BuildNandIPCommand to get the right nand command.
- * For NOR/DBI device, take refer to "semc_ipcmd_nor_dbi_t".
- * For SRAM device, take refer to "semc_ipcmd_sram_t".
- * For SDRAM device, take refer to "semc_ipcmd_sdram_t".
- * @param write  Data for write access.
- * @param read   Data pointer for read data out.
- */
-status_t SEMC_SendIPCommand(
-    SEMC_Type *base, semc_mem_type_t type, uint32_t address, uint16_t command, uint32_t write, uint32_t *read);
+    /*!
+     * @brief SEMC IP command access.
+     *
+     * @param base  SEMC peripheral base address.
+     * @param type  SEMC memory type. refer to "semc_mem_type_t"
+     * @param address  SEMC device address.
+     * @param command  SEMC IP command.
+     * For NAND device, we should use the SEMC_BuildNandIPCommand to get the right nand command.
+     * For NOR/DBI device, take refer to "semc_ipcmd_nor_dbi_t".
+     * For SRAM device, take refer to "semc_ipcmd_sram_t".
+     * For SDRAM device, take refer to "semc_ipcmd_sdram_t".
+     * @param write  Data for write access.
+     * @param read   Data pointer for read data out.
+     */
+    status_t SEMC_SendIPCommand(
+        SEMC_Type *base, semc_mem_type_t type, uint32_t address, uint16_t command, uint32_t write, uint32_t *read);
 
-/*!
- * @brief Build SEMC IP command for NAND.
- *
- * This function build SEMC NAND IP command. The command is build of user command code,
- * SEMC address mode and SEMC command mode.
- *
- * @param userCommand  NAND device normal command.
- * @param addrMode  NAND address mode. Refer to "semc_ipcmd_nand_addrmode_t".
- * @param cmdMode   NAND command mode. Refer to "semc_ipcmd_nand_cmdmode_t".
- */
-static inline uint16_t SEMC_BuildNandIPCommand(uint8_t userCommand,
-                                               semc_ipcmd_nand_addrmode_t addrMode,
-                                               semc_ipcmd_nand_cmdmode_t cmdMode)
-{
-    return (uint16_t)((uint16_t)userCommand << 8) | (uint16_t)(addrMode << 4) | ((uint8_t)cmdMode & 0x0Fu);
-}
+    /*!
+     * @brief Build SEMC IP command for NAND.
+     *
+     * This function build SEMC NAND IP command. The command is build of user command code,
+     * SEMC address mode and SEMC command mode.
+     *
+     * @param userCommand  NAND device normal command.
+     * @param addrMode  NAND address mode. Refer to "semc_ipcmd_nand_addrmode_t".
+     * @param cmdMode   NAND command mode. Refer to "semc_ipcmd_nand_cmdmode_t".
+     */
+    static inline uint16_t SEMC_BuildNandIPCommand(uint8_t userCommand,
+                                                   semc_ipcmd_nand_addrmode_t addrMode,
+                                                   semc_ipcmd_nand_cmdmode_t cmdMode)
+    {
+        return (uint16_t)((uint16_t)userCommand << 8) | (uint16_t)(addrMode << 4) | ((uint8_t)cmdMode & 0x0Fu);
+    }
 
-/*!
- * @brief Check if the NAND device is ready.
- *
- * @param base  SEMC peripheral base address.
- * @return  True NAND is ready, false NAND is not ready.
- */
-static inline bool SEMC_IsNandReady(SEMC_Type *base)
-{
-    return (base->STS0 & SEMC_STS0_NARDY_MASK) ? true : false;
-}
+    /*!
+     * @brief Check if the NAND device is ready.
+     *
+     * @param base  SEMC peripheral base address.
+     * @return  True NAND is ready, false NAND is not ready.
+     */
+    static inline bool SEMC_IsNandReady(SEMC_Type *base)
+    {
+        return (base->STS0 & SEMC_STS0_NARDY_MASK) ? true : false;
+    }
 
-/*!
- * @brief SEMC NAND device memory write through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NAND device address.
- * @param data  Data for write access.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNandWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
+    /*!
+     * @brief SEMC NAND device memory write through IP command.
+     *
+     * @param base  SEMC peripheral base address.
+     * @param address  SEMC NAND device address.
+     * @param data  Data for write access.
+     * @param size_bytes   Data length.
+     */
+    status_t SEMC_IPCommandNandWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
 
-/*!
- * @brief SEMC NAND device memory read through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NAND device address.
- * @param data  Data pointer for data read out.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNandRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
+    /*!
+     * @brief SEMC NAND device memory read through IP command.
+     *
+     * @param base  SEMC peripheral base address.
+     * @param address  SEMC NAND device address.
+     * @param data  Data pointer for data read out.
+     * @param size_bytes   Data length.
+     */
+    status_t SEMC_IPCommandNandRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
 
-/*!
- * @brief SEMC NOR device memory write through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NOR device address.
- * @param data  Data for write access.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNorWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
+    /*!
+     * @brief SEMC NOR device memory write through IP command.
+     *
+     * @param base  SEMC peripheral base address.
+     * @param address  SEMC NOR device address.
+     * @param data  Data for write access.
+     * @param size_bytes   Data length.
+     */
+    status_t SEMC_IPCommandNorWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
 
-/*!
- * @brief SEMC NOR device memory read through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NOR device address.
- * @param data  Data pointer for data read out.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNorRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
+    /*!
+     * @brief SEMC NOR device memory read through IP command.
+     *
+     * @param base  SEMC peripheral base address.
+     * @param address  SEMC NOR device address.
+     * @param data  Data pointer for data read out.
+     * @param size_bytes   Data length.
+     */
+    status_t SEMC_IPCommandNorRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.c
index 0e6efab13..f98e93c15 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright (c) 2017, NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -43,12 +43,12 @@
 #define FSL_COMPONENT_ID "platform.drivers.snvs_hp"
 #endif
 
-#define SECONDS_IN_A_DAY (86400U)
-#define SECONDS_IN_A_HOUR (3600U)
+#define SECONDS_IN_A_DAY    (86400U)
+#define SECONDS_IN_A_HOUR   (3600U)
 #define SECONDS_IN_A_MINUTE (60U)
-#define DAYS_IN_A_YEAR (365U)
-#define YEAR_RANGE_START (1970U)
-#define YEAR_RANGE_END (2099U)
+#define DAYS_IN_A_YEAR      (365U)
+#define YEAR_RANGE_START    (1970U)
+#define YEAR_RANGE_END      (2099U)
 
 #if !(defined(SNVS_HPCOMR_SW_SV_MASK))
 #define SNVS_HPCOMR_SW_SV_MASK (0x100U)
@@ -100,7 +100,7 @@ static void SNVS_HP_ConvertSecondsToDatetime(uint32_t seconds, snvs_hp_rtc_datet
  */
 static uint32_t SNVS_HP_RTC_GetSeconds(SNVS_Type *base);
 
-#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
+#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) &&                       \
      defined(SNVS_HP_CLOCKS))
 /*!
  * @brief Get the SNVS instance from peripheral base address.
@@ -115,7 +115,7 @@ static uint32_t SNVS_HP_GetInstance(SNVS_Type *base);
 /*******************************************************************************
  * Variables
  ******************************************************************************/
-#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
+#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) &&                       \
      defined(SNVS_HP_CLOCKS))
 /*! @brief Pointer to snvs_hp clock. */
 const clock_ip_name_t s_snvsHpClock[] = SNVS_HP_CLOCKS;
@@ -135,21 +135,18 @@ static bool SNVS_HP_CheckDatetimeFormat(const snvs_hp_rtc_datetime_t *datetime)
 
     /* Check year, month, hour, minute, seconds */
     if ((datetime->year < YEAR_RANGE_START) || (datetime->year > YEAR_RANGE_END) || (datetime->month > 12U) ||
-        (datetime->month < 1U) || (datetime->hour >= 24U) || (datetime->minute >= 60U) || (datetime->second >= 60U))
-    {
+        (datetime->month < 1U) || (datetime->hour >= 24U) || (datetime->minute >= 60U) || (datetime->second >= 60U)) {
         /* If not correct then error*/
         return false;
     }
 
     /* Adjust the days in February for a leap year */
-    if ((((datetime->year & 3U) == 0) && (datetime->year % 100 != 0)) || (datetime->year % 400 == 0))
-    {
+    if ((((datetime->year & 3U) == 0) && (datetime->year % 100 != 0)) || (datetime->year % 400 == 0)) {
         daysPerMonth[2] = 29U;
     }
 
     /* Check the validity of the day */
-    if ((datetime->day > daysPerMonth[datetime->month]) || (datetime->day < 1U))
-    {
+    if ((datetime->day > daysPerMonth[datetime->month]) || (datetime->day < 1U)) {
         return false;
     }
 
@@ -175,8 +172,7 @@ static uint32_t SNVS_HP_ConvertDatetimeToSeconds(const snvs_hp_rtc_datetime_t *d
      * represented in the hours, minutes and seconds field*/
     seconds += (datetime->day - 1);
     /* For leap year if month less than or equal to Febraury, decrement day counter*/
-    if ((!(datetime->year & 3U)) && (datetime->month <= 2U))
-    {
+    if ((!(datetime->year & 3U)) && (datetime->month <= 2U)) {
         seconds--;
     }
 
@@ -210,46 +206,39 @@ static void SNVS_HP_ConvertSecondsToDatetime(uint32_t seconds, snvs_hp_rtc_datet
     secondsRemaining = secondsRemaining % SECONDS_IN_A_DAY;
 
     /* Calculate the datetime hour, minute and second fields */
-    datetime->hour = secondsRemaining / SECONDS_IN_A_HOUR;
+    datetime->hour   = secondsRemaining / SECONDS_IN_A_HOUR;
     secondsRemaining = secondsRemaining % SECONDS_IN_A_HOUR;
     datetime->minute = secondsRemaining / 60U;
     datetime->second = secondsRemaining % SECONDS_IN_A_MINUTE;
 
     /* Calculate year */
-    daysInYear = DAYS_IN_A_YEAR;
+    daysInYear     = DAYS_IN_A_YEAR;
     datetime->year = YEAR_RANGE_START;
-    while (days > daysInYear)
-    {
+    while (days > daysInYear) {
         /* Decrease day count by a year and increment year by 1 */
         days -= daysInYear;
         datetime->year++;
 
         /* Adjust the number of days for a leap year */
-        if (datetime->year & 3U)
-        {
+        if (datetime->year & 3U) {
             daysInYear = DAYS_IN_A_YEAR;
         }
-        else
-        {
+        else {
             daysInYear = DAYS_IN_A_YEAR + 1;
         }
     }
 
     /* Adjust the days in February for a leap year */
-    if (!(datetime->year & 3U))
-    {
+    if (!(datetime->year & 3U)) {
         daysPerMonth[2] = 29U;
     }
 
-    for (x = 1U; x <= 12U; x++)
-    {
-        if (days <= daysPerMonth[x])
-        {
+    for (x = 1U; x <= 12U; x++) {
+        if (days <= daysPerMonth[x]) {
             datetime->month = x;
             break;
         }
-        else
-        {
+        else {
             days -= daysPerMonth[x];
         }
     }
@@ -257,7 +246,7 @@ static void SNVS_HP_ConvertSecondsToDatetime(uint32_t seconds, snvs_hp_rtc_datet
     datetime->day = days;
 }
 
-#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
+#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) &&                       \
      defined(SNVS_HP_CLOCKS))
 static uint32_t SNVS_HP_GetInstance(SNVS_Type *base)
 {
@@ -269,7 +258,7 @@ void SNVS_HP_RTC_Init(SNVS_Type *base, const snvs_hp_rtc_config_t *config)
 {
     assert(config);
 
-#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
+#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) &&                       \
      defined(SNVS_HP_CLOCKS))
     uint32_t instance = SNVS_HP_GetInstance(base);
     CLOCK_EnableClock(s_snvsHpClock[instance]);
@@ -279,8 +268,7 @@ void SNVS_HP_RTC_Init(SNVS_Type *base, const snvs_hp_rtc_config_t *config)
 
     base->HPCR = SNVS_HPCR_PI_FREQ(config->periodicInterruptFreq);
 
-    if (config->rtcCalEnable)
-    {
+    if (config->rtcCalEnable) {
         base->HPCR = SNVS_HPCR_HPCALB_VAL_MASK & (config->rtcCalValue << SNVS_HPCR_HPCALB_VAL_SHIFT);
         base->HPCR |= SNVS_HPCR_HPCALB_EN_MASK;
     }
@@ -290,7 +278,7 @@ void SNVS_HP_RTC_Deinit(SNVS_Type *base)
 {
     base->HPCR &= ~SNVS_HPCR_RTC_EN_MASK;
 
-#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && \
+#if (!(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) &&                       \
      defined(SNVS_HP_CLOCKS))
     uint32_t instance = SNVS_HP_GetInstance(base);
     CLOCK_DisableClock(s_snvsHpClock[instance]);
@@ -301,21 +289,20 @@ void SNVS_HP_RTC_GetDefaultConfig(snvs_hp_rtc_config_t *config)
 {
     assert(config);
 
-    config->rtcCalEnable = false;
-    config->rtcCalValue = 0U;
+    config->rtcCalEnable          = false;
+    config->rtcCalValue           = 0U;
     config->periodicInterruptFreq = 0U;
 }
 
 static uint32_t SNVS_HP_RTC_GetSeconds(SNVS_Type *base)
 {
     uint32_t seconds = 0;
-    uint32_t tmp = 0;
+    uint32_t tmp     = 0;
 
     /* Do consecutive reads until value is correct */
-    do
-    {
+    do {
         seconds = tmp;
-        tmp = (base->HPRTCMR << 17U) | (base->HPRTCLR >> 15U);
+        tmp     = (base->HPRTCMR << 17U) | (base->HPRTCLR >> 15U);
     } while (tmp != seconds);
 
     return seconds;
@@ -326,14 +313,13 @@ status_t SNVS_HP_RTC_SetDatetime(SNVS_Type *base, const snvs_hp_rtc_datetime_t *
     assert(datetime);
 
     uint32_t seconds = 0U;
-    uint32_t tmp = base->HPCR;
+    uint32_t tmp     = base->HPCR;
 
     /* disable RTC */
     SNVS_HP_RTC_StopTimer(base);
 
     /* Return error if the time provided is not valid */
-    if (!(SNVS_HP_CheckDatetimeFormat(datetime)))
-    {
+    if (!(SNVS_HP_CheckDatetimeFormat(datetime))) {
         return kStatus_InvalidArgument;
     }
 
@@ -344,8 +330,7 @@ status_t SNVS_HP_RTC_SetDatetime(SNVS_Type *base, const snvs_hp_rtc_datetime_t *
     base->HPRTCLR = (uint32_t)(seconds << 15U);
 
     /* reenable RTC in case that it was enabled before */
-    if (tmp & SNVS_HPCR_RTC_EN_MASK)
-    {
+    if (tmp & SNVS_HPCR_RTC_EN_MASK) {
         SNVS_HP_RTC_StartTimer(base);
     }
 
@@ -364,29 +349,25 @@ status_t SNVS_HP_RTC_SetAlarm(SNVS_Type *base, const snvs_hp_rtc_datetime_t *ala
     assert(alarmTime);
 
     uint32_t alarmSeconds = 0U;
-    uint32_t currSeconds = 0U;
-    uint32_t tmp = base->HPCR;
+    uint32_t currSeconds  = 0U;
+    uint32_t tmp          = base->HPCR;
 
     /* Return error if the alarm time provided is not valid */
-    if (!(SNVS_HP_CheckDatetimeFormat(alarmTime)))
-    {
+    if (!(SNVS_HP_CheckDatetimeFormat(alarmTime))) {
         return kStatus_InvalidArgument;
     }
 
     alarmSeconds = SNVS_HP_ConvertDatetimeToSeconds(alarmTime);
-    currSeconds = SNVS_HP_RTC_GetSeconds(base);
+    currSeconds  = SNVS_HP_RTC_GetSeconds(base);
 
     /* Return error if the alarm time has passed */
-    if (alarmSeconds < currSeconds)
-    {
+    if (alarmSeconds < currSeconds) {
         return kStatus_Fail;
     }
 
     /* disable RTC alarm interrupt */
     base->HPCR &= ~SNVS_HPCR_HPTA_EN_MASK;
-    while (base->HPCR & SNVS_HPCR_HPTA_EN_MASK)
-    {
-    }
+    while (base->HPCR & SNVS_HPCR_HPTA_EN_MASK) {}
 
     /* Set alarm in seconds*/
     base->HPTAMR = (uint32_t)(alarmSeconds >> 17U);
@@ -421,8 +402,7 @@ void SNVS_HP_RTC_TimeSynchronize(SNVS_Type *base)
     base->HPCR |= SNVS_HPCR_HP_TS_MASK;
 
     /* reenable RTC in case that it was enabled before */
-    if (tmp & SNVS_HPCR_RTC_EN_MASK)
-    {
+    if (tmp & SNVS_HPCR_RTC_EN_MASK) {
         SNVS_HP_RTC_StartTimer(base);
     }
 }
@@ -432,13 +412,11 @@ uint32_t SNVS_HP_RTC_GetStatusFlags(SNVS_Type *base)
 {
     uint32_t flags = 0U;
 
-    if (base->HPSR & SNVS_HPSR_PI_MASK)
-    {
+    if (base->HPSR & SNVS_HPSR_PI_MASK) {
         flags |= kSNVS_RTC_PeriodicInterruptFlag;
     }
 
-    if (base->HPSR & SNVS_HPSR_HPTA_MASK)
-    {
+    if (base->HPSR & SNVS_HPSR_HPTA_MASK) {
         flags |= kSNVS_RTC_AlarmInterruptFlag;
     }
 
@@ -449,13 +427,11 @@ uint32_t SNVS_HP_RTC_GetEnabledInterrupts(SNVS_Type *base)
 {
     uint32_t val = 0U;
 
-    if (base->HPCR & SNVS_HPCR_PI_EN_MASK)
-    {
+    if (base->HPCR & SNVS_HPCR_PI_EN_MASK) {
         val |= kSNVS_RTC_PeriodicInterrupt;
     }
 
-    if (base->HPCR & SNVS_HPCR_HPTA_EN_MASK)
-    {
+    if (base->HPCR & SNVS_HPCR_HPTA_EN_MASK) {
         val |= kSNVS_RTC_AlarmInterrupt;
     }
 
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.h
index 27bf7e662..e3992ff4e 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_snvs_hp.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright (c) 2017, NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -54,15 +54,15 @@
 /*! @brief List of SNVS interrupts */
 typedef enum _snvs_hp_interrupts
 {
-    kSNVS_RTC_AlarmInterrupt = SNVS_HPCR_HPTA_EN_MASK,  /*!< RTC time alarm */
-    kSNVS_RTC_PeriodicInterrupt = SNVS_HPCR_PI_EN_MASK, /*!< RTC periodic interrupt */
+    kSNVS_RTC_AlarmInterrupt    = SNVS_HPCR_HPTA_EN_MASK, /*!< RTC time alarm */
+    kSNVS_RTC_PeriodicInterrupt = SNVS_HPCR_PI_EN_MASK,   /*!< RTC periodic interrupt */
 } snvs_hp_interrupts_t;
 
 /*! @brief List of SNVS flags */
 typedef enum _snvs_hp_status_flags
 {
-    kSNVS_RTC_AlarmInterruptFlag = SNVS_HPSR_HPTA_MASK,  /*!< RTC time alarm flag */
-    kSNVS_RTC_PeriodicInterruptFlag = SNVS_HPSR_PI_MASK, /*!< RTC periodic interrupt flag */
+    kSNVS_RTC_AlarmInterruptFlag    = SNVS_HPSR_HPTA_MASK, /*!< RTC time alarm flag */
+    kSNVS_RTC_PeriodicInterruptFlag = SNVS_HPSR_PI_MASK,   /*!< RTC periodic interrupt flag */
 } snvs_hp_status_flags_t;
 
 /*! @brief Structure is used to hold the date and time */
@@ -100,205 +100,202 @@ typedef struct _snvs_hp_rtc_config
  ******************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief Ungates the SNVS clock and configures the peripheral for basic operation.
- *
- * @note This API should be called at the beginning of the application using the SNVS driver.
- *
- * @param base   SNVS peripheral base address
- * @param config Pointer to the user's SNVS configuration structure.
- */
-void SNVS_HP_RTC_Init(SNVS_Type *base, const snvs_hp_rtc_config_t *config);
+    /*!
+     * @brief Ungates the SNVS clock and configures the peripheral for basic operation.
+     *
+     * @note This API should be called at the beginning of the application using the SNVS driver.
+     *
+     * @param base   SNVS peripheral base address
+     * @param config Pointer to the user's SNVS configuration structure.
+     */
+    void SNVS_HP_RTC_Init(SNVS_Type *base, const snvs_hp_rtc_config_t *config);
 
-/*!
- * @brief Stops the RTC and SRTC timers.
- *
- * @param base SNVS peripheral base address
- */
-void SNVS_HP_RTC_Deinit(SNVS_Type *base);
+    /*!
+     * @brief Stops the RTC and SRTC timers.
+     *
+     * @param base SNVS peripheral base address
+     */
+    void SNVS_HP_RTC_Deinit(SNVS_Type *base);
 
-/*!
- * @brief Fills in the SNVS config struct with the default settings.
- *
- * The default values are as follows.
- * @code
- *    config->rtccalenable = false;
- *    config->rtccalvalue = 0U;
- *    config->PIFreq = 0U;
- * @endcode
- * @param config Pointer to the user's SNVS configuration structure.
- */
-void SNVS_HP_RTC_GetDefaultConfig(snvs_hp_rtc_config_t *config);
+    /*!
+     * @brief Fills in the SNVS config struct with the default settings.
+     *
+     * The default values are as follows.
+     * @code
+     *    config->rtccalenable = false;
+     *    config->rtccalvalue = 0U;
+     *    config->PIFreq = 0U;
+     * @endcode
+     * @param config Pointer to the user's SNVS configuration structure.
+     */
+    void SNVS_HP_RTC_GetDefaultConfig(snvs_hp_rtc_config_t *config);
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Non secure RTC current Time & Alarm
- * @{
- */
+    /*!
+     * @name Non secure RTC current Time & Alarm
+     * @{
+     */
 
-/*!
- * @brief Sets the SNVS RTC date and time according to the given time structure.
- *
- * @param base     SNVS peripheral base address
- * @param datetime Pointer to the structure where the date and time details are stored.
- *
- * @return kStatus_Success: Success in setting the time and starting the SNVS RTC
- *         kStatus_InvalidArgument: Error because the datetime format is incorrect
- */
-status_t SNVS_HP_RTC_SetDatetime(SNVS_Type *base, const snvs_hp_rtc_datetime_t *datetime);
+    /*!
+     * @brief Sets the SNVS RTC date and time according to the given time structure.
+     *
+     * @param base     SNVS peripheral base address
+     * @param datetime Pointer to the structure where the date and time details are stored.
+     *
+     * @return kStatus_Success: Success in setting the time and starting the SNVS RTC
+     *         kStatus_InvalidArgument: Error because the datetime format is incorrect
+     */
+    status_t SNVS_HP_RTC_SetDatetime(SNVS_Type *base, const snvs_hp_rtc_datetime_t *datetime);
 
-/*!
- * @brief Gets the SNVS RTC time and stores it in the given time structure.
- *
- * @param base     SNVS peripheral base address
- * @param datetime Pointer to the structure where the date and time details are stored.
- */
-void SNVS_HP_RTC_GetDatetime(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime);
+    /*!
+     * @brief Gets the SNVS RTC time and stores it in the given time structure.
+     *
+     * @param base     SNVS peripheral base address
+     * @param datetime Pointer to the structure where the date and time details are stored.
+     */
+    void SNVS_HP_RTC_GetDatetime(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime);
 
-/*!
- * @brief Sets the SNVS RTC alarm time.
- *
- * The function sets the RTC alarm. It also checks whether the specified alarm time
- * is greater than the present time. If not, the function does not set the alarm
- * and returns an error.
- *
- * @param base      SNVS peripheral base address
- * @param alarmTime Pointer to the structure where the alarm time is stored.
- *
- * @return kStatus_Success: success in setting the SNVS RTC alarm
- *         kStatus_InvalidArgument: Error because the alarm datetime format is incorrect
- *         kStatus_Fail: Error because the alarm time has already passed
- */
-status_t SNVS_HP_RTC_SetAlarm(SNVS_Type *base, const snvs_hp_rtc_datetime_t *alarmTime);
+    /*!
+     * @brief Sets the SNVS RTC alarm time.
+     *
+     * The function sets the RTC alarm. It also checks whether the specified alarm time
+     * is greater than the present time. If not, the function does not set the alarm
+     * and returns an error.
+     *
+     * @param base      SNVS peripheral base address
+     * @param alarmTime Pointer to the structure where the alarm time is stored.
+     *
+     * @return kStatus_Success: success in setting the SNVS RTC alarm
+     *         kStatus_InvalidArgument: Error because the alarm datetime format is incorrect
+     *         kStatus_Fail: Error because the alarm time has already passed
+     */
+    status_t SNVS_HP_RTC_SetAlarm(SNVS_Type *base, const snvs_hp_rtc_datetime_t *alarmTime);
 
-/*!
- * @brief Returns the SNVS RTC alarm time.
- *
- * @param base     SNVS peripheral base address
- * @param datetime Pointer to the structure where the alarm date and time details are stored.
- */
-void SNVS_HP_RTC_GetAlarm(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime);
+    /*!
+     * @brief Returns the SNVS RTC alarm time.
+     *
+     * @param base     SNVS peripheral base address
+     * @param datetime Pointer to the structure where the alarm date and time details are stored.
+     */
+    void SNVS_HP_RTC_GetAlarm(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime);
 
 #if (defined(FSL_FEATURE_SNVS_HAS_SRTC) && (FSL_FEATURE_SNVS_HAS_SRTC > 0))
-/*!
- * @brief The function synchronizes RTC counter value with SRTC.
- *
- * @param base SNVS peripheral base address
- */
-void SNVS_HP_RTC_TimeSynchronize(SNVS_Type *base);
+    /*!
+     * @brief The function synchronizes RTC counter value with SRTC.
+     *
+     * @param base SNVS peripheral base address
+     */
+    void SNVS_HP_RTC_TimeSynchronize(SNVS_Type *base);
 #endif /* FSL_FEATURE_SNVS_HAS_SRTC */
 
-/*! @}*/
+    /*! @}*/
 
-/*!
- * @name Interrupt Interface
- * @{
- */
+    /*!
+     * @name Interrupt Interface
+     * @{
+     */
 
-/*!
- * @brief Enables the selected SNVS interrupts.
- *
- * @param base SNVS peripheral base address
- * @param mask The interrupts to enable. This is a logical OR of members of the
- *             enumeration ::snvs_interrupt_enable_t
- */
-static inline void SNVS_HP_RTC_EnableInterrupts(SNVS_Type *base, uint32_t mask)
-{
-    base->HPCR |= mask;
-}
-
-/*!
- * @brief Disables the selected SNVS interrupts.
- *
- * @param base SNVS peripheral base address
- * @param mask The interrupts to enable. This is a logical OR of members of the
- *             enumeration ::snvs_interrupt_enable_t
- */
-static inline void SNVS_HP_RTC_DisableInterrupts(SNVS_Type *base, uint32_t mask)
-{
-    base->HPCR &= ~mask;
-}
-
-/*!
- * @brief Gets the enabled SNVS interrupts.
- *
- * @param base SNVS peripheral base address
- *
- * @return The enabled interrupts. This is the logical OR of members of the
- *         enumeration ::snvs_interrupt_enable_t
- */
-uint32_t SNVS_HP_RTC_GetEnabledInterrupts(SNVS_Type *base);
-
-/*! @}*/
-
-/*!
- * @name Status Interface
- * @{
- */
-
-/*!
- * @brief Gets the SNVS status flags.
- *
- * @param base SNVS peripheral base address
- *
- * @return The status flags. This is the logical OR of members of the
- *         enumeration ::snvs_status_flags_t
- */
-uint32_t SNVS_HP_RTC_GetStatusFlags(SNVS_Type *base);
-
-/*!
- * @brief  Clears the SNVS status flags.
- *
- * @param base SNVS peripheral base address
- * @param mask The status flags to clear. This is a logical OR of members of the
- *             enumeration ::snvs_status_flags_t
- */
-static inline void SNVS_HP_RTC_ClearStatusFlags(SNVS_Type *base, uint32_t mask)
-{
-    base->HPSR |= mask;
-}
-
-/*! @}*/
-
-/*!
- * @name Timer Start and Stop
- * @{
- */
-
-/*!
- * @brief Starts the SNVS RTC time counter.
- *
- * @param base SNVS peripheral base address
- */
-static inline void SNVS_HP_RTC_StartTimer(SNVS_Type *base)
-{
-    base->HPCR |= SNVS_HPCR_RTC_EN_MASK;
-    while (!(base->HPCR & SNVS_HPCR_RTC_EN_MASK))
+    /*!
+     * @brief Enables the selected SNVS interrupts.
+     *
+     * @param base SNVS peripheral base address
+     * @param mask The interrupts to enable. This is a logical OR of members of the
+     *             enumeration ::snvs_interrupt_enable_t
+     */
+    static inline void SNVS_HP_RTC_EnableInterrupts(SNVS_Type *base, uint32_t mask)
     {
+        base->HPCR |= mask;
     }
-}
 
-/*!
- * @brief Stops the SNVS RTC time counter.
- *
- * @param base SNVS peripheral base address
- */
-static inline void SNVS_HP_RTC_StopTimer(SNVS_Type *base)
-{
-    base->HPCR &= ~SNVS_HPCR_RTC_EN_MASK;
-    while (base->HPCR & SNVS_HPCR_RTC_EN_MASK)
+    /*!
+     * @brief Disables the selected SNVS interrupts.
+     *
+     * @param base SNVS peripheral base address
+     * @param mask The interrupts to enable. This is a logical OR of members of the
+     *             enumeration ::snvs_interrupt_enable_t
+     */
+    static inline void SNVS_HP_RTC_DisableInterrupts(SNVS_Type *base, uint32_t mask)
     {
+        base->HPCR &= ~mask;
+    }
+
+    /*!
+     * @brief Gets the enabled SNVS interrupts.
+     *
+     * @param base SNVS peripheral base address
+     *
+     * @return The enabled interrupts. This is the logical OR of members of the
+     *         enumeration ::snvs_interrupt_enable_t
+     */
+    uint32_t SNVS_HP_RTC_GetEnabledInterrupts(SNVS_Type *base);
+
+    /*! @}*/
+
+    /*!
+     * @name Status Interface
+     * @{
+     */
+
+    /*!
+     * @brief Gets the SNVS status flags.
+     *
+     * @param base SNVS peripheral base address
+     *
+     * @return The status flags. This is the logical OR of members of the
+     *         enumeration ::snvs_status_flags_t
+     */
+    uint32_t SNVS_HP_RTC_GetStatusFlags(SNVS_Type *base);
+
+    /*!
+     * @brief  Clears the SNVS status flags.
+     *
+     * @param base SNVS peripheral base address
+     * @param mask The status flags to clear. This is a logical OR of members of the
+     *             enumeration ::snvs_status_flags_t
+     */
+    static inline void SNVS_HP_RTC_ClearStatusFlags(SNVS_Type *base, uint32_t mask)
+    {
+        base->HPSR |= mask;
+    }
+
+    /*! @}*/
+
+    /*!
+     * @name Timer Start and Stop
+     * @{
+     */
+
+    /*!
+     * @brief Starts the SNVS RTC time counter.
+     *
+     * @param base SNVS peripheral base address
+     */
+    static inline void SNVS_HP_RTC_StartTimer(SNVS_Type *base)
+    {
+        base->HPCR |= SNVS_HPCR_RTC_EN_MASK;
+        while (!(base->HPCR & SNVS_HPCR_RTC_EN_MASK)) {}
+    }
+
+    /*!
+     * @brief Stops the SNVS RTC time counter.
+     *
+     * @param base SNVS peripheral base address
+     */
+    static inline void SNVS_HP_RTC_StopTimer(SNVS_Type *base)
+    {
+        base->HPCR &= ~SNVS_HPCR_RTC_EN_MASK;
+        while (base->HPCR & SNVS_HPCR_RTC_EN_MASK) {}
     }
-}
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.c
index 7672586d3..bdb627f56 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -39,7 +39,6 @@
 #define FSL_COMPONENT_ID "platform.drivers.src"
 #endif
 
-
 /*******************************************************************************
  * Prototypes
  ******************************************************************************/
@@ -56,13 +55,11 @@ void SRC_ClearResetStatusFlags(SRC_Type *base, uint32_t flags)
 {
     uint32_t tmp32 = base->SRSR;
 
-    if (0U != (SRC_SRSR_TSR_MASK & flags))
-    {
+    if (0U != (SRC_SRSR_TSR_MASK & flags)) {
         tmp32 &= ~SRC_SRSR_TSR_MASK; /* Write 0 to clear. */
     }
 
-    if (0U != (SRC_SRSR_W1C_BITS_MASK & flags))
-    {
+    if (0U != (SRC_SRSR_W1C_BITS_MASK & flags)) {
         tmp32 |= (SRC_SRSR_W1C_BITS_MASK & flags); /* Write 1 to clear. */
     }
 
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.h
index bf2558205..9eb5585cb 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_src.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2016, Freescale Semiconductor, Inc.
  * Copyright 2016-2017 NXP
  * All rights reserved.
- * 
+ *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted (subject to the limitations in the disclaimer below) provided
  *  that the following conditions are met:
@@ -62,14 +62,14 @@ enum _src_reset_status_flags
                                                                driven out on PTE0 pin. */
 #endif                                                    /* FSL_FEATURE_SRC_HAS_SRSR_RESET_OUT */
 #if !(defined(FSL_FEATURE_SRC_HAS_NO_SRSR_WBI) && FSL_FEATURE_SRC_HAS_NO_SRSR_WBI)
-    kSRC_WarmBootIndicationFlag = SRC_SRSR_WBI_MASK,      /*!< WARM boot indication shows that WARM boot
-                                                               was initiated by software. */
-#endif                                                    /* FSL_FEATURE_SRC_HAS_NO_SRSR_WBI */
-    kSRC_TemperatureSensorResetFlag = SRC_SRSR_TSR_MASK,  /*!< Indicates whether the reset was the
-                                                               result of software reset from on-chip
-                                                               Temperature Sensor. Temperature Sensor
-                                                               Interrupt need be served before this
-                                                               bit can be cleaned.*/
+    kSRC_WarmBootIndicationFlag = SRC_SRSR_WBI_MASK,     /*!< WARM boot indication shows that WARM boot
+                                                              was initiated by software. */
+#endif                                                   /* FSL_FEATURE_SRC_HAS_NO_SRSR_WBI */
+    kSRC_TemperatureSensorResetFlag = SRC_SRSR_TSR_MASK, /*!< Indicates whether the reset was the
+                                                              result of software reset from on-chip
+                                                              Temperature Sensor. Temperature Sensor
+                                                              Interrupt need be served before this
+                                                              bit can be cleaned.*/
 #if (defined(FSL_FEATURE_SRC_HAS_SRSR_WDOG3_RST_B) && FSL_FEATURE_SRC_HAS_SRSR_WDOG3_RST_B)
     kSRC_Wdog3ResetFlag = SRC_SRSR_WDOG3_RST_B_MASK, /*!< IC Watchdog3 Time-out reset. Indicates
                                                           whether the reset was the result of the
@@ -112,10 +112,11 @@ enum _src_reset_status_flags
                                                     power-on detection logic. */
 #endif                                         /* FSL_FEATURE_SRC_HAS_SRSR_POR */
 #if (defined(FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ) && FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ)
-    kSRC_LockupSysResetFlag = SRC_SRSR_LOCKUP_SYSRESETREQ_MASK, /*!< Indicates a reset has been caused by CPU lockup or software 
-                                                                     setting of SYSRESETREQ bit in Application Interrupt and 
-                                                                     Reset Control Register of the ARM core. */
-#endif                                         /* FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ */
+    kSRC_LockupSysResetFlag =
+        SRC_SRSR_LOCKUP_SYSRESETREQ_MASK, /*!< Indicates a reset has been caused by CPU lockup or software
+                                               setting of SYSRESETREQ bit in Application Interrupt and
+                                               Reset Control Register of the ARM core. */
+#endif                                    /* FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ */
 #if (defined(FSL_FEATURE_SRC_HAS_SRSR_IPP_RESET_B) && FSL_FEATURE_SRC_HAS_SRSR_IPP_RESET_B)
     kSRC_IppResetPinFlag = SRC_SRSR_IPP_RESET_B_MASK, /*!< Indicates whether reset was the result of
                                                            ipp_reset_b pin (Power-up sequence). */
@@ -170,449 +171,440 @@ typedef enum _src_wdog3_reset_option
 typedef enum _src_warm_reset_bypass_count
 {
     kSRC_WarmResetWaitAlways = 0U, /*!< System will wait until MMDC acknowledge is asserted. */
-    kSRC_WarmResetWaitClk16 = 1U,  /*!< Wait 16 32KHz clock cycles before switching the reset. */
-    kSRC_WarmResetWaitClk32 = 2U,  /*!< Wait 32 32KHz clock cycles before switching the reset. */
-    kSRC_WarmResetWaitClk64 = 3U,  /*!< Wait 64 32KHz clock cycles before switching the reset. */
+    kSRC_WarmResetWaitClk16  = 1U, /*!< Wait 16 32KHz clock cycles before switching the reset. */
+    kSRC_WarmResetWaitClk32  = 2U, /*!< Wait 32 32KHz clock cycles before switching the reset. */
+    kSRC_WarmResetWaitClk64  = 3U, /*!< Wait 64 32KHz clock cycles before switching the reset. */
 } src_warm_reset_bypass_count_t;
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*******************************************************************************
- * API
- ******************************************************************************/
+    /*******************************************************************************
+     * API
+     ******************************************************************************/
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_MASK_WDOG3_RST) && FSL_FEATURE_SRC_HAS_SCR_MASK_WDOG3_RST)
-/*!
- * @brief Enable the WDOG3 reset.
- *
- * The WDOG3 reset is enabled by default.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableWDOG3Reset(SRC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the WDOG3 reset.
+     *
+     * The WDOG3 reset is enabled by default.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableWDOG3Reset(SRC_Type *base, bool enable)
     {
-        base->SCR = (base->SCR & ~SRC_SCR_MASK_WDOG3_RST_MASK) | SRC_SCR_MASK_WDOG3_RST(0xA);
+        if (enable) {
+            base->SCR = (base->SCR & ~SRC_SCR_MASK_WDOG3_RST_MASK) | SRC_SCR_MASK_WDOG3_RST(0xA);
+        }
+        else {
+            base->SCR = (base->SCR & ~SRC_SCR_MASK_WDOG3_RST_MASK) | SRC_SCR_MASK_WDOG3_RST(0x5);
+        }
     }
-    else
-    {
-        base->SCR = (base->SCR & ~SRC_SCR_MASK_WDOG3_RST_MASK) | SRC_SCR_MASK_WDOG3_RST(0x5);
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_MASK_WDOG3_RST */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_MIX_RST_STRCH) && FSL_FEATURE_SRC_HAS_SCR_MIX_RST_STRCH)
-/*!
- * @brief Set the mix power up reset stretch mix reset width.
- *
- * @param base SRC peripheral base address.
- * @param option Setting option, see to #src_mix_reset_stretch_cycles_t.
- */
-static inline void SRC_SetMixResetStretchCycles(SRC_Type *base, src_mix_reset_stretch_cycles_t option)
-{
-    base->SCR = (base->SCR & ~SRC_SCR_MIX_RST_STRCH_MASK) | SRC_SCR_MIX_RST_STRCH(option);
-}
+    /*!
+     * @brief Set the mix power up reset stretch mix reset width.
+     *
+     * @param base SRC peripheral base address.
+     * @param option Setting option, see to #src_mix_reset_stretch_cycles_t.
+     */
+    static inline void SRC_SetMixResetStretchCycles(SRC_Type *base, src_mix_reset_stretch_cycles_t option)
+    {
+        base->SCR = (base->SCR & ~SRC_SCR_MIX_RST_STRCH_MASK) | SRC_SCR_MIX_RST_STRCH(option);
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SCR_MIX_RST_STRCH */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_DBG_RST_MSK_PG) && FSL_FEATURE_SRC_HAS_SCR_DBG_RST_MSK_PG)
-/*!
- * @brief Debug reset would be asserted after power gating event.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableCoreDebugResetAfterPowerGate(SRC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Debug reset would be asserted after power gating event.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableCoreDebugResetAfterPowerGate(SRC_Type *base, bool enable)
     {
-        base->SCR &= ~SRC_SCR_DBG_RST_MSK_PG_MASK;
+        if (enable) {
+            base->SCR &= ~SRC_SCR_DBG_RST_MSK_PG_MASK;
+        }
+        else {
+            base->SCR |= SRC_SCR_DBG_RST_MSK_PG_MASK;
+        }
     }
-    else
-    {
-        base->SCR |= SRC_SCR_DBG_RST_MSK_PG_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_DBG_RST_MSK_PG */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_WDOG3_RST_OPTN) && FSL_FEATURE_SRC_HAS_SCR_WDOG3_RST_OPTN)
-/*!
- * @brief Set the Wdog3_rst_b option.
- *
- * @param base SRC peripheral base address.
- * @param option Setting option, see to #src_wdog3_reset_option_t.
- */
-static inline void SRC_SetWdog3ResetOption(SRC_Type *base, src_wdog3_reset_option_t option)
-{
-    base->SCR = (base->SCR & ~SRC_SCR_WDOG3_RST_OPTN_MASK) | SRC_SCR_WDOG3_RST_OPTN(option);
-}
+    /*!
+     * @brief Set the Wdog3_rst_b option.
+     *
+     * @param base SRC peripheral base address.
+     * @param option Setting option, see to #src_wdog3_reset_option_t.
+     */
+    static inline void SRC_SetWdog3ResetOption(SRC_Type *base, src_wdog3_reset_option_t option)
+    {
+        base->SCR = (base->SCR & ~SRC_SCR_WDOG3_RST_OPTN_MASK) | SRC_SCR_WDOG3_RST_OPTN(option);
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SCR_WDOG3_RST_OPTN */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_CORES_DBG_RST) && FSL_FEATURE_SRC_HAS_SCR_CORES_DBG_RST)
-/*!
- * @brief Software reset for debug of arm platform only.
- *
- * @param base SRC peripheral base address.
- */
-static inline void SRC_DoSoftwareResetARMCoreDebug(SRC_Type *base)
-{
-    base->SCR |= SRC_SCR_CORES_DBG_RST_MASK;
-}
+    /*!
+     * @brief Software reset for debug of arm platform only.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline void SRC_DoSoftwareResetARMCoreDebug(SRC_Type *base)
+    {
+        base->SCR |= SRC_SCR_CORES_DBG_RST_MASK;
+    }
 
-/*!
- * @brief Check if the software reset for debug of arm platform only is done.
- *
- * @param base SRC peripheral base address.
- */
-static inline bool SRC_GetSoftwareResetARMCoreDebugDone(SRC_Type *base)
-{
-    return (0U == (base->SCR & SRC_SCR_CORES_DBG_RST_MASK));
-}
+    /*!
+     * @brief Check if the software reset for debug of arm platform only is done.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline bool SRC_GetSoftwareResetARMCoreDebugDone(SRC_Type *base)
+    {
+        return (0U == (base->SCR & SRC_SCR_CORES_DBG_RST_MASK));
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SCR_CORES_DBG_RST */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_MTSR) && FSL_FEATURE_SRC_HAS_SCR_MTSR)
-/*!
- * @brief Enable the temperature sensor reset.
- *
- * The temperature sersor reset is enabled by default. When the sensor reset happens, an flag bit
- * would be asserted. This flag bit can be cleared only by the hardware reset.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableTemperatureSensorReset(SRC_Type *base, bool enable)
-{
-    if (enable) /* Temperature sensor reset is not masked. (default) */
+    /*!
+     * @brief Enable the temperature sensor reset.
+     *
+     * The temperature sersor reset is enabled by default. When the sensor reset happens, an flag bit
+     * would be asserted. This flag bit can be cleared only by the hardware reset.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableTemperatureSensorReset(SRC_Type *base, bool enable)
     {
-        base->SCR = (base->SCR & ~SRC_SCR_MTSR_MASK) | SRC_SCR_MTSR(0x2);
+        if (enable) /* Temperature sensor reset is not masked. (default) */
+        {
+            base->SCR = (base->SCR & ~SRC_SCR_MTSR_MASK) | SRC_SCR_MTSR(0x2);
+        }
+        else /* The on-chip temperature sensor interrupt will not create a reset to the chip. */
+        {
+            base->SCR = (base->SCR & ~SRC_SCR_MTSR_MASK) | SRC_SCR_MTSR(0x5);
+        }
     }
-    else /* The on-chip temperature sensor interrupt will not create a reset to the chip. */
-    {
-        base->SCR = (base->SCR & ~SRC_SCR_MTSR_MASK) | SRC_SCR_MTSR(0x5);
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_MTSR */
 
 #if (defined(FSL_FEATURE_SCR_HAS_SCR_CORE0_DBG_RST) && FSL_FEATURE_SCR_HAS_SCR_CORE0_DBG_RST)
-/*!
- * @brief Do assert the core0 debug reset.
- *
- * @param base SRC peripheral base address.
- */
-static inline void SRC_DoAssertCore0DebugReset(SRC_Type *base)
-{
-    base->SCR |= SRC_SCR_CORE0_DBG_RST_MASK;
-}
+    /*!
+     * @brief Do assert the core0 debug reset.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline void SRC_DoAssertCore0DebugReset(SRC_Type *base)
+    {
+        base->SCR |= SRC_SCR_CORE0_DBG_RST_MASK;
+    }
 
-/*!
- * @brief Check if the core0 debug reset is done.
- *
- * @param base SRC peripheral base address.
- */
-static inline bool SRC_GetAssertCore0DebugResetDone(SRC_Type *base)
-{
-    return (0U == (base->SCR & SRC_SCR_CORE0_DBG_RST_MASK));
-}
+    /*!
+     * @brief Check if the core0 debug reset is done.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline bool SRC_GetAssertCore0DebugResetDone(SRC_Type *base)
+    {
+        return (0U == (base->SCR & SRC_SCR_CORE0_DBG_RST_MASK));
+    }
 #endif /* FSL_FEATURE_SCR_HAS_SCR_CORE0_DBG_RST */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_CORE0_RST) && FSL_FEATURE_SRC_HAS_SCR_CORE0_RST)
-/*!
- * @brief Do software reset the ARM core0 only.
- *
- * @param base SRC peripheral base address.
- */
-static inline void SRC_DoSoftwareResetARMCore0(SRC_Type *base)
-{
-    base->SCR |= SRC_SCR_CORE0_RST_MASK;
-}
+    /*!
+     * @brief Do software reset the ARM core0 only.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline void SRC_DoSoftwareResetARMCore0(SRC_Type *base)
+    {
+        base->SCR |= SRC_SCR_CORE0_RST_MASK;
+    }
 
-/*!
- * @brief Check if the software for ARM core0 is done.
- *
- * @param base SRC peripheral base address.
- * @return If the reset is done.
- */
-static inline bool SRC_GetSoftwareResetARMCore0Done(SRC_Type *base)
-{
-    return (0U == (base->SCR & SRC_SCR_CORE0_RST_MASK));
-}
+    /*!
+     * @brief Check if the software for ARM core0 is done.
+     *
+     * @param base SRC peripheral base address.
+     * @return If the reset is done.
+     */
+    static inline bool SRC_GetSoftwareResetARMCore0Done(SRC_Type *base)
+    {
+        return (0U == (base->SCR & SRC_SCR_CORE0_RST_MASK));
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SCR_CORE0_RST */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_SWRC) && FSL_FEATURE_SRC_HAS_SCR_SWRC)
-/*!
- * @brief Do software reset for ARM core.
- *
- * This function can be used to assert the ARM core reset. Once it is called, the reset process will
- * begin. After the reset process is finished, the command bit would be self cleared.
- *
- * @param base SRC peripheral base address.
- */
-static inline void SRC_DoSoftwareResetARMCore(SRC_Type *base)
-{
-    base->SCR |= SRC_SCR_SWRC_MASK;
-}
+    /*!
+     * @brief Do software reset for ARM core.
+     *
+     * This function can be used to assert the ARM core reset. Once it is called, the reset process will
+     * begin. After the reset process is finished, the command bit would be self cleared.
+     *
+     * @param base SRC peripheral base address.
+     */
+    static inline void SRC_DoSoftwareResetARMCore(SRC_Type *base)
+    {
+        base->SCR |= SRC_SCR_SWRC_MASK;
+    }
 
-/*!
- * @brief Check if the software for ARM core is done.
- *
- * @param base SRC peripheral base address.
- * @return If the reset is done.
- */
-static inline bool SRC_GetSoftwareResetARMCoreDone(SRC_Type *base)
-{
-    return (0U == (base->SCR & SRC_SCR_SWRC_MASK));
-}
+    /*!
+     * @brief Check if the software for ARM core is done.
+     *
+     * @param base SRC peripheral base address.
+     * @return If the reset is done.
+     */
+    static inline bool SRC_GetSoftwareResetARMCoreDone(SRC_Type *base)
+    {
+        return (0U == (base->SCR & SRC_SCR_SWRC_MASK));
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SCR_SWRC */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_EIM_RST) && FSL_FEATURE_SRC_HAS_SCR_EIM_RST)
-/*!
- * @brief Assert the EIM reset.
- *
- * EIM reset is needed in order to reconfigure the EIM chip select.
- * The software reset bit must de-asserted since this is not self-refresh.
- *
- * @param base SRC peripheral base address.
- * @param enable Make the assertion or not.
- */
-static inline void SRC_AssertEIMReset(SRC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Assert the EIM reset.
+     *
+     * EIM reset is needed in order to reconfigure the EIM chip select.
+     * The software reset bit must de-asserted since this is not self-refresh.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Make the assertion or not.
+     */
+    static inline void SRC_AssertEIMReset(SRC_Type *base, bool enable)
     {
-        base->SCR |= SRC_SCR_EIM_RST_MASK;
+        if (enable) {
+            base->SCR |= SRC_SCR_EIM_RST_MASK;
+        }
+        else {
+            base->SCR &= ~SRC_SCR_EIM_RST_MASK;
+        }
     }
-    else
-    {
-        base->SCR &= ~SRC_SCR_EIM_RST_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_EIM_RST */
 
-/*!
- * @brief Enable the WDOG Reset in SRC.
- *
- * WDOG Reset is enabled in SRC by default. If the WDOG event to SRC is masked, it would not create
- * a reset to the chip. During the time the WDOG event is masked, when the WDOG event flag is
- * asserted, it would remain asserted regardless of servicing the WDOG module. The only way to clear
- * that bit is the hardware reset.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableWDOGReset(SRC_Type *base, bool enable)
-{
-    if (enable) /* WDOG Reset is not masked in SRC (default). */
+    /*!
+     * @brief Enable the WDOG Reset in SRC.
+     *
+     * WDOG Reset is enabled in SRC by default. If the WDOG event to SRC is masked, it would not create
+     * a reset to the chip. During the time the WDOG event is masked, when the WDOG event flag is
+     * asserted, it would remain asserted regardless of servicing the WDOG module. The only way to clear
+     * that bit is the hardware reset.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableWDOGReset(SRC_Type *base, bool enable)
     {
-        base->SCR = (base->SCR & ~SRC_SCR_MWDR_MASK) | SRC_SCR_MWDR(0xA);
+        if (enable) /* WDOG Reset is not masked in SRC (default). */
+        {
+            base->SCR = (base->SCR & ~SRC_SCR_MWDR_MASK) | SRC_SCR_MWDR(0xA);
+        }
+        else /* WDOG Reset is masked in SRC. */
+        {
+            base->SCR = (base->SCR & ~SRC_SCR_MWDR_MASK) | SRC_SCR_MWDR(0x5);
+        }
     }
-    else /* WDOG Reset is masked in SRC. */
-    {
-        base->SCR = (base->SCR & ~SRC_SCR_MWDR_MASK) | SRC_SCR_MWDR(0x5);
-    }
-}
 
 #if !(defined(FSL_FEATURE_SRC_HAS_NO_SCR_WRBC) && FSL_FEATURE_SRC_HAS_NO_SCR_WRBC)
-/*!
- * @brief Set the delay count of waiting MMDC's acknowledge.
- *
- * This function would define the 32KHz clock cycles to count before bypassing the MMDC acknowledge
- * for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD
- * reset will be initiated.
- *
- * @param base SRC peripheral base address.
- * @param option The option of setting mode, see to #src_warm_reset_bypass_count_t.
- */
-static inline void SRC_SetWarmResetBypassCount(SRC_Type *base, src_warm_reset_bypass_count_t option)
-{
-    base->SCR = (base->SCR & ~SRC_SCR_WRBC_MASK) | SRC_SCR_WRBC(option);
-}
+    /*!
+     * @brief Set the delay count of waiting MMDC's acknowledge.
+     *
+     * This function would define the 32KHz clock cycles to count before bypassing the MMDC acknowledge
+     * for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD
+     * reset will be initiated.
+     *
+     * @param base SRC peripheral base address.
+     * @param option The option of setting mode, see to #src_warm_reset_bypass_count_t.
+     */
+    static inline void SRC_SetWarmResetBypassCount(SRC_Type *base, src_warm_reset_bypass_count_t option)
+    {
+        base->SCR = (base->SCR & ~SRC_SCR_WRBC_MASK) | SRC_SCR_WRBC(option);
+    }
 #endif /* FSL_FEATURE_SRC_HAS_NO_SCR_WRBC */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_LOCKUP_RST) && FSL_FEATURE_SRC_HAS_SCR_LOCKUP_RST)
-/*!
- * @brief Enable the lockup reset.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableLockupReset(SRC_Type *base, bool enable)
-{
-    if (enable) /* Enable lockup reset. */
+    /*!
+     * @brief Enable the lockup reset.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableLockupReset(SRC_Type *base, bool enable)
     {
-        base->SCR |= SRC_SCR_LOCKUP_RST_MASK;
+        if (enable) /* Enable lockup reset. */
+        {
+            base->SCR |= SRC_SCR_LOCKUP_RST_MASK;
+        }
+        else /* Disable lockup reset. */
+        {
+            base->SCR &= ~SRC_SCR_LOCKUP_RST_MASK;
+        }
     }
-    else /* Disable lockup reset. */
-    {
-        base->SCR &= ~SRC_SCR_LOCKUP_RST_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_LOCKUP_RST */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SCR_LUEN) && FSL_FEATURE_SRC_HAS_SCR_LUEN)
-/*!
- * @brief Enable the core lockup reset.
- *
- * When enable the core luckup reset, the system would be reset when core luckup event happens.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the reset or not.
- */
-static inline void SRC_EnableCoreLockupReset(SRC_Type *base, bool enable)
-{
-    if (enable) /* Core lockup will cause system reset. */
+    /*!
+     * @brief Enable the core lockup reset.
+     *
+     * When enable the core luckup reset, the system would be reset when core luckup event happens.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the reset or not.
+     */
+    static inline void SRC_EnableCoreLockupReset(SRC_Type *base, bool enable)
     {
-        base->SCR |= SRC_SCR_LUEN_MASK;
+        if (enable) /* Core lockup will cause system reset. */
+        {
+            base->SCR |= SRC_SCR_LUEN_MASK;
+        }
+        else /* Core lockup will not cause system reset. */
+        {
+            base->SCR &= ~SRC_SCR_LUEN_MASK;
+        }
     }
-    else /* Core lockup will not cause system reset. */
-    {
-        base->SCR &= ~SRC_SCR_LUEN_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_SCR_LUEN */
 
 #if !(defined(FSL_FEATURE_SRC_HAS_NO_SCR_WRE) && FSL_FEATURE_SRC_HAS_NO_SCR_WRE)
-/*!
- * @brief Enable the WARM reset.
- *
- * Only when the WARM reset is enabled, the WARM reset requests would be served by WARM reset.
- * Otherwise, all the WARM reset sources would generate COLD reset.
- *
- * @param base SRC peripheral base address.
- * @param enable Enable the WARM reset or not.
- */
-static inline void SRC_EnableWarmReset(SRC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Enable the WARM reset.
+     *
+     * Only when the WARM reset is enabled, the WARM reset requests would be served by WARM reset.
+     * Otherwise, all the WARM reset sources would generate COLD reset.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Enable the WARM reset or not.
+     */
+    static inline void SRC_EnableWarmReset(SRC_Type *base, bool enable)
     {
-        base->SCR |= SRC_SCR_WRE_MASK;
+        if (enable) {
+            base->SCR |= SRC_SCR_WRE_MASK;
+        }
+        else {
+            base->SCR &= ~SRC_SCR_WRE_MASK;
+        }
     }
-    else
-    {
-        base->SCR &= ~SRC_SCR_WRE_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_NO_SCR_WRE */
 
 #if (defined(FSL_FEATURE_SRC_HAS_SISR) && FSL_FEATURE_SRC_HAS_SISR)
-/*!
- * @brief Get interrupt status flags.
- *
- * @param base SRC peripheral base address.
- * @return Mask value of status flags. See to $_src_status_flags.
- */
-static inline uint32_t SRC_GetStatusFlags(SRC_Type *base)
-{
-    return base->SISR;
-}
+    /*!
+     * @brief Get interrupt status flags.
+     *
+     * @param base SRC peripheral base address.
+     * @return Mask value of status flags. See to $_src_status_flags.
+     */
+    static inline uint32_t SRC_GetStatusFlags(SRC_Type *base)
+    {
+        return base->SISR;
+    }
 #endif /* FSL_FEATURE_SRC_HAS_SISR */
 
-/*!
- * @brief Get the boot mode register 1 value.
- *
- * The Boot Mode register contains bits that reflect the status of BOOT_CFGx pins of the chip.
- * See to chip-specific document for detail information about value.
- *
- * @param base SRC peripheral base address.
- * @return status of BOOT_CFGx pins of the chip.
- */
-static inline uint32_t SRC_GetBootModeWord1(SRC_Type *base)
-{
-    return base->SBMR1;
-}
+    /*!
+     * @brief Get the boot mode register 1 value.
+     *
+     * The Boot Mode register contains bits that reflect the status of BOOT_CFGx pins of the chip.
+     * See to chip-specific document for detail information about value.
+     *
+     * @param base SRC peripheral base address.
+     * @return status of BOOT_CFGx pins of the chip.
+     */
+    static inline uint32_t SRC_GetBootModeWord1(SRC_Type *base)
+    {
+        return base->SBMR1;
+    }
 
-/*!
- * @brief Get the boot mode register 2 value.
- *
- * The Boot Mode register contains bits that reflect the status of BOOT_MODEx Pins and fuse values
- * that controls boot of the chip. See to chip-specific document for detail information about value.
- *
- * @param base SRC peripheral base address.
- * @return status of BOOT_MODEx Pins and fuse values that controls boot of the chip.
- */
-static inline uint32_t SRC_GetBootModeWord2(SRC_Type *base)
-{
-    return base->SBMR2;
-}
+    /*!
+     * @brief Get the boot mode register 2 value.
+     *
+     * The Boot Mode register contains bits that reflect the status of BOOT_MODEx Pins and fuse values
+     * that controls boot of the chip. See to chip-specific document for detail information about value.
+     *
+     * @param base SRC peripheral base address.
+     * @return status of BOOT_MODEx Pins and fuse values that controls boot of the chip.
+     */
+    static inline uint32_t SRC_GetBootModeWord2(SRC_Type *base)
+    {
+        return base->SBMR2;
+    }
 
 #if !(defined(FSL_FEATURE_SRC_HAS_NO_SRSR_WBI) && FSL_FEATURE_SRC_HAS_NO_SRSR_WBI)
-/*!
- * @brief Set the warm boot indication flag.
- *
- * WARM boot indication shows that WARM boot was initiated by software. This indicates to the
- * software that it saved the needed information in the memory before initiating the WARM reset.
- * In this case, software will set this bit to '1', before initiating the WARM reset. The warm_boot
- * bit should be used as indication only after a warm_reset sequence. Software should clear this bit
- * after warm_reset to indicate that the next warm_reset is not performed with warm_boot.
- *
- * @param base SRC peripheral base address.
- * @param enable Assert the flag or not.
- */
-static inline void SRC_SetWarmBootIndication(SRC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Set the warm boot indication flag.
+     *
+     * WARM boot indication shows that WARM boot was initiated by software. This indicates to the
+     * software that it saved the needed information in the memory before initiating the WARM reset.
+     * In this case, software will set this bit to '1', before initiating the WARM reset. The warm_boot
+     * bit should be used as indication only after a warm_reset sequence. Software should clear this bit
+     * after warm_reset to indicate that the next warm_reset is not performed with warm_boot.
+     *
+     * @param base SRC peripheral base address.
+     * @param enable Assert the flag or not.
+     */
+    static inline void SRC_SetWarmBootIndication(SRC_Type *base, bool enable)
     {
-        base->SRSR = (base->SRSR & ~SRC_SRSR_W1C_BITS_MASK) | SRC_SRSR_WBI_MASK;
+        if (enable) {
+            base->SRSR = (base->SRSR & ~SRC_SRSR_W1C_BITS_MASK) | SRC_SRSR_WBI_MASK;
+        }
+        else {
+            base->SRSR = (base->SRSR & ~SRC_SRSR_W1C_BITS_MASK) & ~SRC_SRSR_WBI_MASK;
+        }
     }
-    else
-    {
-        base->SRSR = (base->SRSR & ~SRC_SRSR_W1C_BITS_MASK) & ~SRC_SRSR_WBI_MASK;
-    }
-}
 #endif /* FSL_FEATURE_SRC_HAS_NO_SRSR_WBI */
 
-/*!
- * @brief Get the status flags of SRC.
- *
- * @param base SRC peripheral base address.
- * @return Mask value of status flags, see to #_src_reset_status_flags.
- */
-static inline uint32_t SRC_GetResetStatusFlags(SRC_Type *base)
-{
-    return base->SRSR;
-}
+    /*!
+     * @brief Get the status flags of SRC.
+     *
+     * @param base SRC peripheral base address.
+     * @return Mask value of status flags, see to #_src_reset_status_flags.
+     */
+    static inline uint32_t SRC_GetResetStatusFlags(SRC_Type *base)
+    {
+        return base->SRSR;
+    }
 
-/*!
- * @brief Clear the status flags of SRC.
- *
- * @param base SRC peripheral base address.
- * @param Mask value of status flags to be cleared, see to #_src_reset_status_flags.
- */
-void SRC_ClearResetStatusFlags(SRC_Type *base, uint32_t flags);
+    /*!
+     * @brief Clear the status flags of SRC.
+     *
+     * @param base SRC peripheral base address.
+     * @param Mask value of status flags to be cleared, see to #_src_reset_status_flags.
+     */
+    void SRC_ClearResetStatusFlags(SRC_Type *base, uint32_t flags);
 
-/*!
- * @brief Set value to general purpose registers.
- *
- * General purpose registers (GPRx) would hold the value during reset process. Wakeup function could
- * be kept in these register. For example, the GPR1 holds the entry function for waking-up from
- * Partial SLEEP mode while the GPR2 holds the argument. Other GPRx register would store the
- * arbitray values.
- *
- * @param base SRC peripheral base address.
- * @param index The index of GPRx register array. Note index 0 reponses the GPR1 register.
- * @param value Setting value for GPRx register.
- */
-static inline void SRC_SetGeneralPurposeRegister(SRC_Type *base, uint32_t index, uint32_t value)
-{
-    assert(index < SRC_GPR_COUNT);
+    /*!
+     * @brief Set value to general purpose registers.
+     *
+     * General purpose registers (GPRx) would hold the value during reset process. Wakeup function could
+     * be kept in these register. For example, the GPR1 holds the entry function for waking-up from
+     * Partial SLEEP mode while the GPR2 holds the argument. Other GPRx register would store the
+     * arbitray values.
+     *
+     * @param base SRC peripheral base address.
+     * @param index The index of GPRx register array. Note index 0 reponses the GPR1 register.
+     * @param value Setting value for GPRx register.
+     */
+    static inline void SRC_SetGeneralPurposeRegister(SRC_Type *base, uint32_t index, uint32_t value)
+    {
+        assert(index < SRC_GPR_COUNT);
 
-    base->GPR[index] = value;
-}
+        base->GPR[index] = value;
+    }
 
-/*!
- * @brief Get the value from general purpose registers.
- *
- * @param base SRC peripheral base address.
- * @param index The index of GPRx register array. Note index 0 reponses the GPR1 register.
- * @return The setting value for GPRx register.
- */
-static inline uint32_t SRC_GetGeneralPurposeRegister(SRC_Type *base, uint32_t index)
-{
-    assert(index < SRC_GPR_COUNT);
+    /*!
+     * @brief Get the value from general purpose registers.
+     *
+     * @param base SRC peripheral base address.
+     * @param index The index of GPRx register array. Note index 0 reponses the GPR1 register.
+     * @return The setting value for GPRx register.
+     */
+    static inline uint32_t SRC_GetGeneralPurposeRegister(SRC_Type *base, uint32_t index)
+    {
+        assert(index < SRC_GPR_COUNT);
 
-    return base->GPR[index];
-}
+        return base->GPR[index];
+    }
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.c b/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.c
index feb5f1c6e..4fc14d4c4 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.c
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.c
@@ -48,9 +48,9 @@
 
 /*! @brief Clock setting */
 /* Max SD clock divisor from base clock */
-#define USDHC_MAX_DVS ((USDHC_SYS_CTRL_DVS_MASK >> USDHC_SYS_CTRL_DVS_SHIFT) + 1U)
-#define USDHC_MAX_CLKFS ((USDHC_SYS_CTRL_SDCLKFS_MASK >> USDHC_SYS_CTRL_SDCLKFS_SHIFT) + 1U)
-#define USDHC_PREV_DVS(x) ((x) -= 1U)
+#define USDHC_MAX_DVS          ((USDHC_SYS_CTRL_DVS_MASK >> USDHC_SYS_CTRL_DVS_SHIFT) + 1U)
+#define USDHC_MAX_CLKFS        ((USDHC_SYS_CTRL_SDCLKFS_MASK >> USDHC_SYS_CTRL_SDCLKFS_SHIFT) + 1U)
+#define USDHC_PREV_DVS(x)      ((x) -= 1U)
 #define USDHC_PREV_CLKFS(x, y) ((x) >>= (y))
 
 /* Typedef for interrupt handler. */
@@ -189,21 +189,21 @@ static void USDHC_TransferHandleSdioInterrupt(USDHC_Type *base, usdhc_handle_t *
 static void USDHC_TransferHandleBlockGap(USDHC_Type *base, usdhc_handle_t *handle);
 
 /*!
-* @brief Handle retuning
-*
-* @param base USDHC peripheral base address.
-* @param handle USDHC handle.
-* @param interrupt flags
-*/
+ * @brief Handle retuning
+ *
+ * @param base USDHC peripheral base address.
+ * @param handle USDHC handle.
+ * @param interrupt flags
+ */
 static void USDHC_TransferHandleReTuning(USDHC_Type *base, usdhc_handle_t *handle, uint32_t interruptFlags);
 
 /*!
-* @brief wait command done
-*
-* @param base USDHC peripheral base address.
-* @param command configuration
-* @param pollingCmdDone polling command done flag
-*/
+ * @brief wait command done
+ *
+ * @param base USDHC peripheral base address.
+ * @param command configuration
+ * @param pollingCmdDone polling command done flag
+ */
 static status_t USDHC_WaitCommandDone(USDHC_Type *base, usdhc_command_t *command, bool pollingCmdDone);
 
 /*******************************************************************************
@@ -233,8 +233,7 @@ static uint32_t USDHC_GetInstance(USDHC_Type *base)
 {
     uint8_t instance = 0;
 
-    while ((instance < ARRAY_SIZE(s_usdhcBase)) && (s_usdhcBase[instance] != base))
-    {
+    while ((instance < ARRAY_SIZE(s_usdhcBase)) && (s_usdhcBase[instance] != base)) {
         instance++;
     }
 
@@ -257,8 +256,7 @@ static void USDHC_SetTransferInterrupt(USDHC_Type *base, bool usingInterruptSign
 
     USDHC_EnableInterruptStatus(base, interruptEnabled);
 
-    if (usingInterruptSignal)
-    {
+    if (usingInterruptSignal) {
         USDHC_EnableInterruptSignal(base, interruptEnabled);
     }
 }
@@ -267,11 +265,9 @@ static status_t USDHC_SetDataTransferConfig(USDHC_Type *base, usdhc_data_t *data
 {
     uint32_t mixCtrl = base->MIX_CTRL;
 
-    if (data != NULL)
-    {
+    if (data != NULL) {
         /* if transfer boot continous, only need set the CREQ bit, leave others as it is */
-        if (data->dataType == kUSDHC_TransferDataBootcontinous)
-        {
+        if (data->dataType == kUSDHC_TransferDataBootcontinous) {
             /* clear stop at block gap request */
             base->PROT_CTRL &= ~USDHC_PROT_CTRL_SABGREQ_MASK;
             /* continous transfer data */
@@ -280,13 +276,11 @@ static status_t USDHC_SetDataTransferConfig(USDHC_Type *base, usdhc_data_t *data
         }
 
         /* check data inhibit flag */
-        if (base->PRES_STATE & kUSDHC_DataInhibitFlag)
-        {
+        if (base->PRES_STATE & kUSDHC_DataInhibitFlag) {
             return kStatus_USDHC_BusyTransferring;
         }
         /* check transfer block count */
-        if ((data->blockCount > USDHC_MAX_BLOCK_COUNT) || ((data->txData == NULL) && (data->rxData == NULL)))
-        {
+        if ((data->blockCount > USDHC_MAX_BLOCK_COUNT) || ((data->txData == NULL) && (data->rxData == NULL))) {
             return kStatus_InvalidArgument;
         }
 
@@ -294,43 +288,36 @@ static status_t USDHC_SetDataTransferConfig(USDHC_Type *base, usdhc_data_t *data
         mixCtrl &= ~(USDHC_MIX_CTRL_MSBSEL_MASK | USDHC_MIX_CTRL_BCEN_MASK | USDHC_MIX_CTRL_DTDSEL_MASK |
                      USDHC_MIX_CTRL_AC12EN_MASK);
 
-        if (data->rxData)
-        {
+        if (data->rxData) {
             mixCtrl |= USDHC_MIX_CTRL_DTDSEL_MASK;
         }
-        if (data->blockCount > 1U)
-        {
+        if (data->blockCount > 1U) {
             mixCtrl |= USDHC_MIX_CTRL_MSBSEL_MASK | USDHC_MIX_CTRL_BCEN_MASK;
             /* auto command 12 */
-            if (data->enableAutoCommand12)
-            {
+            if (data->enableAutoCommand12) {
                 mixCtrl |= USDHC_MIX_CTRL_AC12EN_MASK;
             }
         }
 
         /* auto command 23, auto send set block count cmd before multiple read/write */
-        if ((data->enableAutoCommand23))
-        {
+        if ((data->enableAutoCommand23)) {
             mixCtrl |= USDHC_MIX_CTRL_AC23EN_MASK;
             base->VEND_SPEC2 |= USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK;
             /* config the block count to DS_ADDR */
             base->DS_ADDR = data->blockCount;
         }
-        else
-        {
+        else {
             mixCtrl &= ~USDHC_MIX_CTRL_AC23EN_MASK;
             base->VEND_SPEC2 &= ~USDHC_VEND_SPEC2_ACMD23_ARGU2_EN_MASK;
         }
 
         /* if transfer boot data, leave the block count to USDHC_SetMmcBootConfig function */
-        if (data->dataType != kUSDHC_TransferDataBoot)
-        {
+        if (data->dataType != kUSDHC_TransferDataBoot) {
             /* config data block size/block count */
             base->BLK_ATT = ((base->BLK_ATT & ~(USDHC_BLK_ATT_BLKSIZE_MASK | USDHC_BLK_ATT_BLKCNT_MASK)) |
                              (USDHC_BLK_ATT_BLKSIZE(data->blockSize) | USDHC_BLK_ATT_BLKCNT(data->blockCount)));
         }
-        else
-        {
+        else {
             mixCtrl |= USDHC_MIX_CTRL_MSBSEL_MASK | USDHC_MIX_CTRL_BCEN_MASK;
             base->PROT_CTRL |= USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK;
         }
@@ -338,14 +325,12 @@ static status_t USDHC_SetDataTransferConfig(USDHC_Type *base, usdhc_data_t *data
         /* data present flag */
         *dataPresentFlag |= kUSDHC_DataPresentFlag;
     }
-    else
-    {
+    else {
         /* clear data flags */
         mixCtrl &= ~(USDHC_MIX_CTRL_MSBSEL_MASK | USDHC_MIX_CTRL_BCEN_MASK | USDHC_MIX_CTRL_DTDSEL_MASK |
                      USDHC_MIX_CTRL_AC12EN_MASK);
 
-        if (base->PRES_STATE & kUSDHC_CommandInhibitFlag)
-        {
+        if (base->PRES_STATE & kUSDHC_CommandInhibitFlag) {
             return kStatus_USDHC_BusyTransferring;
         }
     }
@@ -360,11 +345,9 @@ static status_t USDHC_ReceiveCommandResponse(USDHC_Type *base, usdhc_command_t *
 {
     uint32_t i;
 
-    if (command->responseType != kCARD_ResponseTypeNone)
-    {
+    if (command->responseType != kCARD_ResponseTypeNone) {
         command->response[0U] = base->CMD_RSP0;
-        if (command->responseType == kCARD_ResponseTypeR2)
-        {
+        if (command->responseType == kCARD_ResponseTypeR2) {
             command->response[1U] = base->CMD_RSP1;
             command->response[2U] = base->CMD_RSP2;
             command->response[3U] = base->CMD_RSP3;
@@ -372,11 +355,9 @@ static status_t USDHC_ReceiveCommandResponse(USDHC_Type *base, usdhc_command_t *
             i = 4U;
             /* R3-R2-R1-R0(lowest 8 bit is invalid bit) has the same format as R2 format in SD specification document
             after removed internal CRC7 and end bit. */
-            do
-            {
+            do {
                 command->response[i - 1U] <<= 8U;
-                if (i > 1U)
-                {
+                if (i > 1U) {
                     command->response[i - 1U] |= ((command->response[i - 2U] & 0xFF000000U) >> 24U);
                 }
             } while (i--);
@@ -385,10 +366,8 @@ static status_t USDHC_ReceiveCommandResponse(USDHC_Type *base, usdhc_command_t *
     /* check response error flag */
     if ((command->responseErrorFlags != 0U) &&
         ((command->responseType == kCARD_ResponseTypeR1) || (command->responseType == kCARD_ResponseTypeR1b) ||
-         (command->responseType == kCARD_ResponseTypeR6) || (command->responseType == kCARD_ResponseTypeR5)))
-    {
-        if (((command->responseErrorFlags) & (command->response[0U])) != 0U)
-        {
+         (command->responseType == kCARD_ResponseTypeR6) || (command->responseType == kCARD_ResponseTypeR5))) {
+        if (((command->responseErrorFlags) & (command->response[0U])) != 0U) {
             return kStatus_USDHC_SendCommandFailed;
         }
     }
@@ -404,15 +383,13 @@ static uint32_t USDHC_ReadDataPort(USDHC_Type *base, usdhc_data_t *data, uint32_
     uint32_t readWatermark = ((base->WTMK_LVL & USDHC_WTMK_LVL_RD_WML_MASK) >> USDHC_WTMK_LVL_RD_WML_SHIFT);
 
     /* If DMA is enable, do not need to polling data port */
-    if ((base->MIX_CTRL & USDHC_MIX_CTRL_DMAEN_MASK) == 0U)
-    {
+    if ((base->MIX_CTRL & USDHC_MIX_CTRL_DMAEN_MASK) == 0U) {
         /*
-       * Add non aligned access support ,user need make sure your buffer size is big
-       * enough to hold the data,in other words,user need make sure the buffer size
-       * is 4 byte aligned
-       */
-        if (data->blockSize % sizeof(uint32_t) != 0U)
-        {
+         * Add non aligned access support ,user need make sure your buffer size is big
+         * enough to hold the data,in other words,user need make sure the buffer size
+         * is 4 byte aligned
+         */
+        if (data->blockSize % sizeof(uint32_t) != 0U) {
             data->blockSize +=
                 sizeof(uint32_t) - (data->blockSize % sizeof(uint32_t)); /* make the block size as word-aligned */
         }
@@ -420,27 +397,23 @@ static uint32_t USDHC_ReadDataPort(USDHC_Type *base, usdhc_data_t *data, uint32_
         totalWords = ((data->blockCount * data->blockSize) / sizeof(uint32_t));
 
         /* If watermark level is equal or bigger than totalWords, transfers totalWords data. */
-        if (readWatermark >= totalWords)
-        {
+        if (readWatermark >= totalWords) {
             wordsCanBeRead = totalWords;
         }
         /* If watermark level is less than totalWords and left words to be sent is equal or bigger than readWatermark,
         transfers watermark level words. */
-        else if ((readWatermark < totalWords) && ((totalWords - transferredWords) >= readWatermark))
-        {
+        else if ((readWatermark < totalWords) && ((totalWords - transferredWords) >= readWatermark)) {
             wordsCanBeRead = readWatermark;
         }
         /* If watermark level is less than totalWords and left words to be sent is less than readWatermark, transfers
         left
         words. */
-        else
-        {
+        else {
             wordsCanBeRead = (totalWords - transferredWords);
         }
 
         i = 0U;
-        while (i < wordsCanBeRead)
-        {
+        while (i < wordsCanBeRead) {
             data->rxData[transferredWords++] = USDHC_ReadData(base);
             i++;
         }
@@ -456,53 +429,44 @@ static status_t USDHC_ReadByDataPortBlocking(USDHC_Type *base, usdhc_data_t *dat
     status_t error = kStatus_Success;
 
     /*
-       * Add non aligned access support ,user need make sure your buffer size is big
-       * enough to hold the data,in other words,user need make sure the buffer size
-       * is 4 byte aligned
-       */
-    if (data->blockSize % sizeof(uint32_t) != 0U)
-    {
+     * Add non aligned access support ,user need make sure your buffer size is big
+     * enough to hold the data,in other words,user need make sure the buffer size
+     * is 4 byte aligned
+     */
+    if (data->blockSize % sizeof(uint32_t) != 0U) {
         data->blockSize +=
             sizeof(uint32_t) - (data->blockSize % sizeof(uint32_t)); /* make the block size as word-aligned */
     }
 
     totalWords = ((data->blockCount * data->blockSize) / sizeof(uint32_t));
 
-    while ((error == kStatus_Success) && (transferredWords < totalWords))
-    {
-        while (!(interruptStatus & (kUSDHC_BufferReadReadyFlag | kUSDHC_DataErrorFlag | kUSDHC_TuningErrorFlag)))
-        {
+    while ((error == kStatus_Success) && (transferredWords < totalWords)) {
+        while (!(interruptStatus & (kUSDHC_BufferReadReadyFlag | kUSDHC_DataErrorFlag | kUSDHC_TuningErrorFlag))) {
             interruptStatus = USDHC_GetInterruptStatusFlags(base);
         }
 
         /* during std tuning process, software do not need to read data, but wait BRR is enough */
-        if ((data->dataType == kUSDHC_TransferDataTuning) && (interruptStatus & kUSDHC_BufferReadReadyFlag))
-        {
+        if ((data->dataType == kUSDHC_TransferDataTuning) && (interruptStatus & kUSDHC_BufferReadReadyFlag)) {
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_BufferReadReadyFlag | kUSDHC_TuningPassFlag);
 
             return kStatus_Success;
         }
-        else if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U)
-        {
+        else if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U) {
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_TuningErrorFlag);
             /* if tuning error occur ,return directly */
             error = kStatus_USDHC_TuningError;
         }
-        else if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U)
-        {
-            if (!(data->enableIgnoreError))
-            {
+        else if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U) {
+            if (!(data->enableIgnoreError)) {
                 error = kStatus_Fail;
             }
             /* clear data error flag */
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_DataErrorFlag);
         }
-        else
-        {
+        else {
         }
 
-        if (error == kStatus_Success)
-        {
+        if (error == kStatus_Success) {
             transferredWords = USDHC_ReadDataPort(base, data, transferredWords);
             /* clear buffer read ready */
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_BufferReadReadyFlag);
@@ -524,15 +488,13 @@ static uint32_t USDHC_WriteDataPort(USDHC_Type *base, usdhc_data_t *data, uint32
     uint32_t writeWatermark = ((base->WTMK_LVL & USDHC_WTMK_LVL_WR_WML_MASK) >> USDHC_WTMK_LVL_WR_WML_SHIFT);
 
     /* If DMA is enable, do not need to polling data port */
-    if ((base->MIX_CTRL & USDHC_MIX_CTRL_DMAEN_MASK) == 0U)
-    {
+    if ((base->MIX_CTRL & USDHC_MIX_CTRL_DMAEN_MASK) == 0U) {
         /*
-           * Add non aligned access support ,user need make sure your buffer size is big
-           * enough to hold the data,in other words,user need make sure the buffer size
-           * is 4 byte aligned
-           */
-        if (data->blockSize % sizeof(uint32_t) != 0U)
-        {
+         * Add non aligned access support ,user need make sure your buffer size is big
+         * enough to hold the data,in other words,user need make sure the buffer size
+         * is 4 byte aligned
+         */
+        if (data->blockSize % sizeof(uint32_t) != 0U) {
             data->blockSize +=
                 sizeof(uint32_t) - (data->blockSize % sizeof(uint32_t)); /* make the block size as word-aligned */
         }
@@ -540,26 +502,22 @@ static uint32_t USDHC_WriteDataPort(USDHC_Type *base, usdhc_data_t *data, uint32
         totalWords = ((data->blockCount * data->blockSize) / sizeof(uint32_t));
 
         /* If watermark level is equal or bigger than totalWords, transfers totalWords data.*/
-        if (writeWatermark >= totalWords)
-        {
+        if (writeWatermark >= totalWords) {
             wordsCanBeWrote = totalWords;
         }
         /* If watermark level is less than totalWords and left words to be sent is equal or bigger than watermark,
         transfers watermark level words. */
-        else if ((writeWatermark < totalWords) && ((totalWords - transferredWords) >= writeWatermark))
-        {
+        else if ((writeWatermark < totalWords) && ((totalWords - transferredWords) >= writeWatermark)) {
             wordsCanBeWrote = writeWatermark;
         }
         /* If watermark level is less than totalWords and left words to be sent is less than watermark, transfers left
         words. */
-        else
-        {
+        else {
             wordsCanBeWrote = (totalWords - transferredWords);
         }
 
         i = 0U;
-        while (i < wordsCanBeWrote)
-        {
+        while (i < wordsCanBeWrote) {
             USDHC_WriteData(base, data->txData[transferredWords++]);
             i++;
         }
@@ -576,46 +534,38 @@ static status_t USDHC_WriteByDataPortBlocking(USDHC_Type *base, usdhc_data_t *da
     status_t error = kStatus_Success;
 
     /*
-       * Add non aligned access support ,user need make sure your buffer size is big
-       * enough to hold the data,in other words,user need make sure the buffer size
-       * is 4 byte aligned
-       */
-    if (data->blockSize % sizeof(uint32_t) != 0U)
-    {
+     * Add non aligned access support ,user need make sure your buffer size is big
+     * enough to hold the data,in other words,user need make sure the buffer size
+     * is 4 byte aligned
+     */
+    if (data->blockSize % sizeof(uint32_t) != 0U) {
         data->blockSize +=
             sizeof(uint32_t) - (data->blockSize % sizeof(uint32_t)); /* make the block size as word-aligned */
     }
 
     totalWords = (data->blockCount * data->blockSize) / sizeof(uint32_t);
 
-    while ((error == kStatus_Success) && (transferredWords < totalWords))
-    {
-        while (!(interruptStatus & (kUSDHC_BufferWriteReadyFlag | kUSDHC_DataErrorFlag | kUSDHC_TuningErrorFlag)))
-        {
+    while ((error == kStatus_Success) && (transferredWords < totalWords)) {
+        while (!(interruptStatus & (kUSDHC_BufferWriteReadyFlag | kUSDHC_DataErrorFlag | kUSDHC_TuningErrorFlag))) {
             interruptStatus = USDHC_GetInterruptStatusFlags(base);
         }
 
-        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U)
-        {
+        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U) {
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_TuningErrorFlag);
             /* if tuning error occur ,return directly */
             return kStatus_USDHC_TuningError;
         }
-        else if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U)
-        {
-            if (!(data->enableIgnoreError))
-            {
+        else if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U) {
+            if (!(data->enableIgnoreError)) {
                 error = kStatus_Fail;
             }
             /* clear data error flag */
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_DataErrorFlag);
         }
-        else
-        {
+        else {
         }
 
-        if (error == kStatus_Success)
-        {
+        if (error == kStatus_Success) {
             transferredWords = USDHC_WriteDataPort(base, data, transferredWords);
             /* clear buffer write ready */
             USDHC_ClearInterruptStatusFlags(base, kUSDHC_BufferWriteReadyFlag);
@@ -624,15 +574,12 @@ static status_t USDHC_WriteByDataPortBlocking(USDHC_Type *base, usdhc_data_t *da
     }
 
     /* Wait write data complete or data transfer error after the last writing operation. */
-    while (!(interruptStatus & (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag)))
-    {
+    while (!(interruptStatus & (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag))) {
         interruptStatus = USDHC_GetInterruptStatusFlags(base);
     }
 
-    if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U)
-    {
-        if (!(data->enableIgnoreError))
-        {
+    if ((interruptStatus & kUSDHC_DataErrorFlag) != 0U) {
+        if (!(data->enableIgnoreError)) {
             error = kStatus_Fail;
         }
     }
@@ -647,40 +594,37 @@ void USDHC_SendCommand(USDHC_Type *base, usdhc_command_t *command)
 
     uint32_t xferType = base->CMD_XFR_TYP, flags = command->flags;
 
-    if (((base->PRES_STATE & kUSDHC_CommandInhibitFlag) == 0U) && (command->type != kCARD_CommandTypeEmpty))
-    {
+    if (((base->PRES_STATE & kUSDHC_CommandInhibitFlag) == 0U) && (command->type != kCARD_CommandTypeEmpty)) {
         /* Define the flag corresponding to each response type. */
-        switch (command->responseType)
-        {
-            case kCARD_ResponseTypeNone:
-                break;
-            case kCARD_ResponseTypeR1: /* Response 1 */
-            case kCARD_ResponseTypeR5: /* Response 5 */
-            case kCARD_ResponseTypeR6: /* Response 6 */
-            case kCARD_ResponseTypeR7: /* Response 7 */
-                flags |= (kUSDHC_ResponseLength48Flag | kUSDHC_EnableCrcCheckFlag | kUSDHC_EnableIndexCheckFlag);
-                break;
+        switch (command->responseType) {
+        case kCARD_ResponseTypeNone:
+            break;
+        case kCARD_ResponseTypeR1: /* Response 1 */
+        case kCARD_ResponseTypeR5: /* Response 5 */
+        case kCARD_ResponseTypeR6: /* Response 6 */
+        case kCARD_ResponseTypeR7: /* Response 7 */
+            flags |= (kUSDHC_ResponseLength48Flag | kUSDHC_EnableCrcCheckFlag | kUSDHC_EnableIndexCheckFlag);
+            break;
 
-            case kCARD_ResponseTypeR1b: /* Response 1 with busy */
-            case kCARD_ResponseTypeR5b: /* Response 5 with busy */
-                flags |= (kUSDHC_ResponseLength48BusyFlag | kUSDHC_EnableCrcCheckFlag | kUSDHC_EnableIndexCheckFlag);
-                break;
+        case kCARD_ResponseTypeR1b: /* Response 1 with busy */
+        case kCARD_ResponseTypeR5b: /* Response 5 with busy */
+            flags |= (kUSDHC_ResponseLength48BusyFlag | kUSDHC_EnableCrcCheckFlag | kUSDHC_EnableIndexCheckFlag);
+            break;
 
-            case kCARD_ResponseTypeR2: /* Response 2 */
-                flags |= (kUSDHC_ResponseLength136Flag | kUSDHC_EnableCrcCheckFlag);
-                break;
+        case kCARD_ResponseTypeR2: /* Response 2 */
+            flags |= (kUSDHC_ResponseLength136Flag | kUSDHC_EnableCrcCheckFlag);
+            break;
 
-            case kCARD_ResponseTypeR3: /* Response 3 */
-            case kCARD_ResponseTypeR4: /* Response 4 */
-                flags |= (kUSDHC_ResponseLength48Flag);
-                break;
+        case kCARD_ResponseTypeR3: /* Response 3 */
+        case kCARD_ResponseTypeR4: /* Response 4 */
+            flags |= (kUSDHC_ResponseLength48Flag);
+            break;
 
-            default:
-                break;
+        default:
+            break;
         }
 
-        if (command->type == kCARD_CommandTypeAbort)
-        {
+        if (command->type == kCARD_CommandTypeAbort) {
             flags |= kUSDHC_CommandTypeAbortFlag;
         }
 
@@ -694,12 +638,11 @@ void USDHC_SendCommand(USDHC_Type *base, usdhc_command_t *command)
                          USDHC_CMD_XFR_TYP_RSPTYP_MASK | USDHC_CMD_XFR_TYP_DPSEL_MASK)));
 
         /* config the command xfertype and argument */
-        base->CMD_ARG = command->argument;
+        base->CMD_ARG     = command->argument;
         base->CMD_XFR_TYP = xferType;
     }
 
-    if (command->type == kCARD_CommandTypeEmpty)
-    {
+    if (command->type == kCARD_CommandTypeEmpty) {
         /* disable CMD done interrupt for empty command */
         base->INT_SIGNAL_EN &= ~USDHC_INT_SIGNAL_EN_CCIEN_MASK;
     }
@@ -709,31 +652,25 @@ static status_t USDHC_WaitCommandDone(USDHC_Type *base, usdhc_command_t *command
 {
     assert(NULL != command);
 
-    status_t error = kStatus_Success;
+    status_t error           = kStatus_Success;
     uint32_t interruptStatus = 0U;
     /* check if need polling command done or not */
-    if (pollingCmdDone)
-    {
+    if (pollingCmdDone) {
         /* Wait command complete or USDHC encounters error. */
-        while (!(interruptStatus & (kUSDHC_CommandCompleteFlag | kUSDHC_CommandErrorFlag)))
-        {
+        while (!(interruptStatus & (kUSDHC_CommandCompleteFlag | kUSDHC_CommandErrorFlag))) {
             interruptStatus = USDHC_GetInterruptStatusFlags(base);
         }
 
-        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U)
-        {
+        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U) {
             error = kStatus_USDHC_TuningError;
         }
-        else if ((interruptStatus & kUSDHC_CommandErrorFlag) != 0U)
-        {
+        else if ((interruptStatus & kUSDHC_CommandErrorFlag) != 0U) {
             error = kStatus_Fail;
         }
-        else
-        {
+        else {
         }
         /* Receive response when command completes successfully. */
-        if (error == kStatus_Success)
-        {
+        if (error == kStatus_Success) {
             error = USDHC_ReceiveCommandResponse(base, command);
         }
 
@@ -746,49 +683,40 @@ static status_t USDHC_WaitCommandDone(USDHC_Type *base, usdhc_command_t *command
 
 static status_t USDHC_TransferDataBlocking(USDHC_Type *base, usdhc_data_t *data, bool enDMA)
 {
-    status_t error = kStatus_Success;
+    status_t error           = kStatus_Success;
     uint32_t interruptStatus = 0U;
 
-    if (enDMA)
-    {
+    if (enDMA) {
         /* Wait data complete or USDHC encounters error. */
         while (!((interruptStatus &
-                  (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag | kUSDHC_TuningErrorFlag))))
-        {
+                  (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag | kUSDHC_TuningErrorFlag)))) {
             interruptStatus = USDHC_GetInterruptStatusFlags(base);
         }
 
-        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U)
-        {
+        if ((interruptStatus & kUSDHC_TuningErrorFlag) != 0U) {
             error = kStatus_USDHC_TuningError;
         }
-        else if (((interruptStatus & (kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag)) != 0U))
-        {
-            if ((!(data->enableIgnoreError)) || (interruptStatus & kUSDHC_DataTimeoutFlag))
-            {
+        else if (((interruptStatus & (kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag)) != 0U)) {
+            if ((!(data->enableIgnoreError)) || (interruptStatus & kUSDHC_DataTimeoutFlag)) {
                 error = kStatus_Fail;
             }
         }
-        else
-        {
+        else {
         }
         /* load dummy data */
-        if ((data->dataType == kUSDHC_TransferDataBootcontinous) && (error == kStatus_Success))
-        {
+        if ((data->dataType == kUSDHC_TransferDataBootcontinous) && (error == kStatus_Success)) {
             *(data->rxData) = s_usdhcBootDummy;
         }
 
-        USDHC_ClearInterruptStatusFlags(base, (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag |
-                                               kUSDHC_TuningPassFlag | kUSDHC_TuningErrorFlag));
+        USDHC_ClearInterruptStatusFlags(base,
+                                        (kUSDHC_DataCompleteFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag |
+                                         kUSDHC_TuningPassFlag | kUSDHC_TuningErrorFlag));
     }
-    else
-    {
-        if (data->rxData)
-        {
+    else {
+        if (data->rxData) {
             error = USDHC_ReadByDataPortBlocking(base, data);
         }
-        else
-        {
+        else {
             error = USDHC_WriteByDataPortBlocking(base, data);
         }
     }
@@ -812,7 +740,7 @@ void USDHC_Init(USDHC_Type *base, const usdhc_config_t *config)
     USDHC_Reset(base, kUSDHC_ResetAll, 100U);
 
     proctl = base->PROT_CTRL;
-    wml = base->WTMK_LVL;
+    wml    = base->WTMK_LVL;
     sysctl = base->SYS_CTRL;
 
     proctl &= ~(USDHC_PROT_CTRL_EMODE_MASK | USDHC_PROT_CTRL_DMASEL_MASK);
@@ -829,8 +757,8 @@ void USDHC_Init(USDHC_Type *base, const usdhc_config_t *config)
     sysctl &= ~USDHC_SYS_CTRL_DTOCV_MASK;
     sysctl |= USDHC_SYS_CTRL_DTOCV(config->dataTimeout);
 
-    base->SYS_CTRL = sysctl;
-    base->WTMK_LVL = wml;
+    base->SYS_CTRL  = sysctl;
+    base->WTMK_LVL  = wml;
     base->PROT_CTRL = proctl;
 
 #if FSL_FEATURE_USDHC_HAS_EXT_DMA
@@ -853,10 +781,8 @@ bool USDHC_Reset(USDHC_Type *base, uint32_t mask, uint32_t timeout)
 {
     base->SYS_CTRL |= (mask & (USDHC_SYS_CTRL_RSTA_MASK | USDHC_SYS_CTRL_RSTC_MASK | USDHC_SYS_CTRL_RSTD_MASK));
     /* Delay some time to wait reset success. */
-    while ((base->SYS_CTRL & mask) != 0U)
-    {
-        if (timeout == 0U)
-        {
+    while ((base->SYS_CTRL & mask) != 0U) {
+        if (timeout == 0U) {
             break;
         }
         timeout--;
@@ -875,7 +801,7 @@ void USDHC_GetCapability(USDHC_Type *base, usdhc_capability_t *capability)
     htCapability = base->HOST_CTRL_CAP;
 
     /* Get the capability of USDHC. */
-    maxBlockLength = ((htCapability & USDHC_HOST_CTRL_CAP_MBL_MASK) >> USDHC_HOST_CTRL_CAP_MBL_SHIFT);
+    maxBlockLength             = ((htCapability & USDHC_HOST_CTRL_CAP_MBL_MASK) >> USDHC_HOST_CTRL_CAP_MBL_SHIFT);
     capability->maxBlockLength = (512U << maxBlockLength);
     /* Other attributes not in HTCAPBLT register. */
     capability->maxBlockCount = USDHC_MAX_BLOCK_COUNT;
@@ -894,80 +820,68 @@ uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busCl
     assert(srcClock_Hz != 0U);
     assert((busClock_Hz != 0U) && (busClock_Hz <= srcClock_Hz));
 
-    uint32_t totalDiv = 0U;
-    uint32_t divisor = 0U;
-    uint32_t prescaler = 0U;
-    uint32_t sysctl = 0U;
+    uint32_t totalDiv         = 0U;
+    uint32_t divisor          = 0U;
+    uint32_t prescaler        = 0U;
+    uint32_t sysctl           = 0U;
     uint32_t nearestFrequency = 0U;
 
     /* calucate total divisor first */
-    if ((totalDiv = srcClock_Hz / busClock_Hz) > (USDHC_MAX_CLKFS * USDHC_MAX_DVS))
-    {
+    if ((totalDiv = srcClock_Hz / busClock_Hz) > (USDHC_MAX_CLKFS * USDHC_MAX_DVS)) {
         return 0U;
     }
 
-    if (totalDiv != 0U)
-    {
+    if (totalDiv != 0U) {
         /* calucate the divisor (srcClock_Hz / divisor) <= busClock_Hz */
-        if ((srcClock_Hz / totalDiv) > busClock_Hz)
-        {
+        if ((srcClock_Hz / totalDiv) > busClock_Hz) {
             totalDiv++;
         }
 
         /* divide the total divisor to div and prescaler */
-        if (totalDiv > USDHC_MAX_DVS)
-        {
+        if (totalDiv > USDHC_MAX_DVS) {
             prescaler = totalDiv / USDHC_MAX_DVS;
             /* prescaler must be a value which equal 2^n and smaller than SDHC_MAX_CLKFS */
-            while (((USDHC_MAX_CLKFS % prescaler) != 0U) || (prescaler == 1U))
-            {
+            while (((USDHC_MAX_CLKFS % prescaler) != 0U) || (prescaler == 1U)) {
                 prescaler++;
             }
             /* calucate the divisor */
             divisor = totalDiv / prescaler;
             /* fine tuning the divisor until divisor * prescaler >= totalDiv */
-            while ((divisor * prescaler) < totalDiv)
-            {
+            while ((divisor * prescaler) < totalDiv) {
                 divisor++;
             }
 
             nearestFrequency = srcClock_Hz / (divisor == 0U ? 1U : divisor) / prescaler;
         }
-        else
-        {
+        else {
             /* in this situation , divsior and SDCLKFS can generate same clock
             use SDCLKFS*/
-            if ((USDHC_MAX_DVS % totalDiv) == 0U)
-            {
-                divisor = 0U;
+            if ((USDHC_MAX_DVS % totalDiv) == 0U) {
+                divisor   = 0U;
                 prescaler = totalDiv;
             }
-            else
-            {
-                divisor = (totalDiv / 2U) + 1U; /* make sure the output frequency not bigger than target value */
+            else {
+                divisor   = (totalDiv / 2U) + 1U; /* make sure the output frequency not bigger than target value */
                 prescaler = 2U;
             }
             nearestFrequency = srcClock_Hz / totalDiv;
         }
     }
     /* in this condition , srcClock_Hz = busClock_Hz, */
-    else
-    {
+    else {
         /* in DDR mode , set SDCLKFS to 0, divisor = 0, actually the
         totoal divider = 2U */
-        divisor = 0U;
-        prescaler = 0U;
+        divisor          = 0U;
+        prescaler        = 0U;
         nearestFrequency = srcClock_Hz;
     }
 
     /* calucate the value write to register */
-    if (divisor != 0U)
-    {
+    if (divisor != 0U) {
         USDHC_PREV_DVS(divisor);
     }
     /* calucate the value write to register */
-    if (prescaler != 0U)
-    {
+    if (prescaler != 0U) {
         USDHC_PREV_CLKFS(prescaler, 1U);
     }
 
@@ -978,9 +892,7 @@ uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busCl
     base->SYS_CTRL = sysctl;
 
     /* Wait until the SD clock is stable. */
-    while (!(base->PRES_STATE & USDHC_PRES_STATE_SDSTB_MASK))
-    {
-    }
+    while (!(base->PRES_STATE & USDHC_PRES_STATE_SDSTB_MASK)) {}
 
     return nearestFrequency;
 }
@@ -989,10 +901,8 @@ bool USDHC_SetCardActive(USDHC_Type *base, uint32_t timeout)
 {
     base->SYS_CTRL |= USDHC_SYS_CTRL_INITA_MASK;
     /* Delay some time to wait card become active state. */
-    while ((base->SYS_CTRL & USDHC_SYS_CTRL_INITA_MASK) == USDHC_SYS_CTRL_INITA_MASK)
-    {
-        if (!timeout)
-        {
+    while ((base->SYS_CTRL & USDHC_SYS_CTRL_INITA_MASK) == USDHC_SYS_CTRL_INITA_MASK) {
+        if (!timeout) {
             break;
         }
         timeout--;
@@ -1005,22 +915,18 @@ void USDHC_EnableDDRMode(USDHC_Type *base, bool enable, uint32_t nibblePos)
 {
     uint32_t prescaler = (base->SYS_CTRL & USDHC_SYS_CTRL_SDCLKFS_MASK) >> USDHC_SYS_CTRL_SDCLKFS_SHIFT;
 
-    if (enable)
-    {
+    if (enable) {
         base->MIX_CTRL &= ~USDHC_MIX_CTRL_NIBBLE_POS_MASK;
         base->MIX_CTRL |= (USDHC_MIX_CTRL_DDR_EN_MASK | USDHC_MIX_CTRL_NIBBLE_POS(nibblePos));
         prescaler >>= 1U;
     }
-    else
-    {
+    else {
         base->MIX_CTRL &= ~USDHC_MIX_CTRL_DDR_EN_MASK;
 
-        if (prescaler == 0U)
-        {
+        if (prescaler == 0U) {
             prescaler += 1U;
         }
-        else
-        {
+        else {
             prescaler <<= 1U;
         }
     }
@@ -1039,20 +945,17 @@ void USDHC_SetMmcBootConfig(USDHC_Type *base, const usdhc_boot_config_t *config)
     mmcboot &= ~(USDHC_MMC_BOOT_DTOCV_ACK_MASK | USDHC_MMC_BOOT_BOOT_MODE_MASK | USDHC_MMC_BOOT_BOOT_BLK_CNT_MASK);
     mmcboot |= USDHC_MMC_BOOT_DTOCV_ACK(config->ackTimeoutCount) | USDHC_MMC_BOOT_BOOT_MODE(config->bootMode);
 
-    if (config->enableBootAck)
-    {
+    if (config->enableBootAck) {
         mmcboot |= USDHC_MMC_BOOT_BOOT_ACK_MASK;
     }
-    if (config->enableAutoStopAtBlockGap)
-    {
+    if (config->enableAutoStopAtBlockGap) {
         mmcboot |=
             USDHC_MMC_BOOT_AUTO_SABG_EN_MASK | USDHC_MMC_BOOT_BOOT_BLK_CNT(USDHC_MAX_BLOCK_COUNT - config->blockCount);
         /* always set the block count to USDHC_MAX_BLOCK_COUNT to use auto stop at block gap feature */
         base->BLK_ATT = ((base->BLK_ATT & ~(USDHC_BLK_ATT_BLKSIZE_MASK | USDHC_BLK_ATT_BLKCNT_MASK)) |
                          (USDHC_BLK_ATT_BLKSIZE(config->blockSize) | USDHC_BLK_ATT_BLKCNT(USDHC_MAX_BLOCK_COUNT)));
     }
-    else
-    {
+    else {
         base->BLK_ATT = ((base->BLK_ATT & ~(USDHC_BLK_ATT_BLKSIZE_MASK | USDHC_BLK_ATT_BLKCNT_MASK)) |
                          (USDHC_BLK_ATT_BLKSIZE(config->blockSize) | USDHC_BLK_ATT_BLKCNT(config->blockCount)));
     }
@@ -1072,52 +975,43 @@ status_t USDHC_SetADMA1Descriptor(
     uint32_t i, dmaBufferLen = 0U;
     const uint32_t *data = dataBufferAddr;
 
-    if (((uint32_t)data % USDHC_ADMA1_ADDRESS_ALIGN) != 0U)
-    {
+    if (((uint32_t)data % USDHC_ADMA1_ADDRESS_ALIGN) != 0U) {
         return kStatus_USDHC_DMADataAddrNotAlign;
     }
 
-    if (flags == kUSDHC_AdmaDescriptorMultipleFlag)
-    {
+    if (flags == kUSDHC_AdmaDescriptorMultipleFlag) {
         return kStatus_USDHC_NotSupport;
     }
     /*
-    * Add non aligned access support ,user need make sure your buffer size is big
-    * enough to hold the data,in other words,user need make sure the buffer size
-    * is 4 byte aligned
-    */
-    if (dataBytes % sizeof(uint32_t) != 0U)
-    {
+     * Add non aligned access support ,user need make sure your buffer size is big
+     * enough to hold the data,in other words,user need make sure the buffer size
+     * is 4 byte aligned
+     */
+    if (dataBytes % sizeof(uint32_t) != 0U) {
         /* make the data length as word-aligned */
         dataBytes += sizeof(uint32_t) - (dataBytes % sizeof(uint32_t));
     }
 
     /* Check if ADMA descriptor's number is enough. */
-    if ((dataBytes % USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) == 0U)
-    {
+    if ((dataBytes % USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) == 0U) {
         miniEntries = dataBytes / USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY;
     }
-    else
-    {
+    else {
         miniEntries = ((dataBytes / USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) + 1U);
     }
 
     /* ADMA1 needs two descriptors to finish a transfer */
     miniEntries <<= 1U;
 
-    if (miniEntries + startEntries > maxEntries)
-    {
+    if (miniEntries + startEntries > maxEntries) {
         return kStatus_OutOfRange;
     }
 
-    for (i = startEntries; i < (miniEntries + startEntries); i += 2U)
-    {
-        if (dataBytes > USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY)
-        {
+    for (i = startEntries; i < (miniEntries + startEntries); i += 2U) {
+        if (dataBytes > USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) {
             dmaBufferLen = USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY;
         }
-        else
-        {
+        else {
             dmaBufferLen = dataBytes;
         }
 
@@ -1146,38 +1040,31 @@ status_t USDHC_SetADMA2Descriptor(
     uint32_t i, dmaBufferLen = 0U;
     const uint32_t *data = dataBufferAddr;
 
-    if (((uint32_t)data % USDHC_ADMA2_ADDRESS_ALIGN) != 0U)
-    {
+    if (((uint32_t)data % USDHC_ADMA2_ADDRESS_ALIGN) != 0U) {
         return kStatus_USDHC_DMADataAddrNotAlign;
     }
     /*
-    * Add non aligned access support ,user need make sure your buffer size is big
-    * enough to hold the data,in other words,user need make sure the buffer size
-    * is 4 byte aligned
-    */
-    if (dataBytes % sizeof(uint32_t) != 0U)
-    {
+     * Add non aligned access support ,user need make sure your buffer size is big
+     * enough to hold the data,in other words,user need make sure the buffer size
+     * is 4 byte aligned
+     */
+    if (dataBytes % sizeof(uint32_t) != 0U) {
         /* make the data length as word-aligned */
         dataBytes += sizeof(uint32_t) - (dataBytes % sizeof(uint32_t));
     }
 
     /* Check if ADMA descriptor's number is enough. */
-    if ((dataBytes % USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) == 0U)
-    {
+    if ((dataBytes % USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) == 0U) {
         miniEntries = dataBytes / USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY;
     }
-    else
-    {
+    else {
         miniEntries = ((dataBytes / USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) + 1U);
     }
     /* calucate the start entry for multiple descriptor mode, ADMA engine is not stop, so update the descriptor
     data adress and data size is enough */
-    if (flags == kUSDHC_AdmaDescriptorMultipleFlag)
-    {
-        for (i = 0U; i < maxEntries; i++)
-        {
-            if ((adma2EntryAddress[i].attribute & kUSDHC_Adma2DescriptorValidFlag) == 0U)
-            {
+    if (flags == kUSDHC_AdmaDescriptorMultipleFlag) {
+        for (i = 0U; i < maxEntries; i++) {
+            if ((adma2EntryAddress[i].attribute & kUSDHC_Adma2DescriptorValidFlag) == 0U) {
                 break;
             }
         }
@@ -1186,32 +1073,27 @@ status_t USDHC_SetADMA2Descriptor(
         miniEntries += 1U;
     }
 
-    if ((miniEntries + startEntries) > maxEntries)
-    {
+    if ((miniEntries + startEntries) > maxEntries) {
         return kStatus_OutOfRange;
     }
 
-    for (i = startEntries; i < (miniEntries + startEntries); i++)
-    {
-        if (dataBytes > USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY)
-        {
+    for (i = startEntries; i < (miniEntries + startEntries); i++) {
+        if (dataBytes > USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY) {
             dmaBufferLen = USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY;
         }
-        else
-        {
-            dmaBufferLen = (dataBytes == 0U ? sizeof(uint32_t) :
-                                              dataBytes); /* adma don't support 0 data length transfer descriptor */
+        else {
+            dmaBufferLen = (dataBytes == 0U ? sizeof(uint32_t)
+                                            : dataBytes); /* adma don't support 0 data length transfer descriptor */
         }
 
         /* Each descriptor for ADMA2 is 64-bit in length */
-        adma2EntryAddress[i].address = (dataBytes == 0U) ? &s_usdhcBootDummy : data;
+        adma2EntryAddress[i].address   = (dataBytes == 0U) ? &s_usdhcBootDummy : data;
         adma2EntryAddress[i].attribute = (dmaBufferLen << USDHC_ADMA2_DESCRIPTOR_LENGTH_SHIFT);
         adma2EntryAddress[i].attribute |=
             (dataBytes == 0U) ? 0U : (kUSDHC_Adma2DescriptorTypeTransfer | kUSDHC_Adma2DescriptorInterruptFlag);
         data += (dmaBufferLen / sizeof(uint32_t));
 
-        if (dataBytes != 0U)
-        {
+        if (dataBytes != 0U) {
             dataBytes -= dmaBufferLen;
         }
     }
@@ -1219,12 +1101,10 @@ status_t USDHC_SetADMA2Descriptor(
     /* add a dummy valid ADMA descriptor for multiple descriptor mode, this is useful when transfer boot data, the ADMA
     engine
     will not stop at block gap */
-    if (flags == kUSDHC_AdmaDescriptorMultipleFlag)
-    {
+    if (flags == kUSDHC_AdmaDescriptorMultipleFlag) {
         adma2EntryAddress[startEntries + 1U].attribute |= kUSDHC_Adma2DescriptorTypeTransfer;
     }
-    else
-    {
+    else {
         /* set the end bit */
         adma2EntryAddress[i - 1U].attribute |= kUSDHC_Adma2DescriptorEndFlag;
     }
@@ -1245,28 +1125,23 @@ status_t USDHC_SetInternalDmaConfig(USDHC_Type *base,
     base->VEND_SPEC &= ~USDHC_VEND_SPEC_EXT_DMA_EN_MASK;
 #endif
 
-    if (dmaConfig->dmaMode == kUSDHC_DmaModeSimple)
-    {
+    if (dmaConfig->dmaMode == kUSDHC_DmaModeSimple) {
         /* check DMA data buffer address align or not */
-        if (((uint32_t)dataAddr % USDHC_ADMA2_ADDRESS_ALIGN) != 0U)
-        {
+        if (((uint32_t)dataAddr % USDHC_ADMA2_ADDRESS_ALIGN) != 0U) {
             return kStatus_USDHC_DMADataAddrNotAlign;
         }
         /* in simple DMA mode if use auto CMD23, address should load to ADMA addr,
              and block count should load to DS_ADDR*/
-        if (enAutoCmd23)
-        {
+        if (enAutoCmd23) {
             base->ADMA_SYS_ADDR = (uint32_t)dataAddr;
         }
-        else
-        {
+        else {
             base->DS_ADDR = (uint32_t)dataAddr;
         }
     }
-    else
-    {
+    else {
         /* When use ADMA, disable simple DMA */
-        base->DS_ADDR = 0U;
+        base->DS_ADDR       = 0U;
         base->ADMA_SYS_ADDR = (uint32_t)(dmaConfig->admaTable);
     }
 
@@ -1288,41 +1163,39 @@ status_t USDHC_SetAdmaTableConfig(USDHC_Type *base,
     assert(NULL != dmaConfig->admaTable);
     assert(NULL != dataConfig);
 
-    status_t error = kStatus_Fail;
+    status_t error           = kStatus_Fail;
     uint32_t bootDummyOffset = dataConfig->dataType == kUSDHC_TransferDataBootcontinous ? sizeof(uint32_t) : 0U;
     const uint32_t *data =
         (const uint32_t *)((uint32_t)((dataConfig->rxData == NULL) ? dataConfig->txData : dataConfig->rxData) +
                            bootDummyOffset);
     uint32_t blockSize = dataConfig->blockSize * dataConfig->blockCount - bootDummyOffset;
 
-    switch (dmaConfig->dmaMode)
-    {
+    switch (dmaConfig->dmaMode) {
 #if FSL_FEATURE_USDHC_HAS_EXT_DMA
-        case kUSDHC_ExternalDMA:
-            /* enable the external DMA */
-            base->VEND_SPEC |= USDHC_VEND_SPEC_EXT_DMA_EN_MASK;
-            break;
+    case kUSDHC_ExternalDMA:
+        /* enable the external DMA */
+        base->VEND_SPEC |= USDHC_VEND_SPEC_EXT_DMA_EN_MASK;
+        break;
 #endif
-        case kUSDHC_DmaModeSimple:
-            error = kStatus_Success;
-            break;
+    case kUSDHC_DmaModeSimple:
+        error = kStatus_Success;
+        break;
 
-        case kUSDHC_DmaModeAdma1:
-            error = USDHC_SetADMA1Descriptor(dmaConfig->admaTable, dmaConfig->admaTableWords, data, blockSize, flags);
-            break;
+    case kUSDHC_DmaModeAdma1:
+        error = USDHC_SetADMA1Descriptor(dmaConfig->admaTable, dmaConfig->admaTableWords, data, blockSize, flags);
+        break;
 
-        case kUSDHC_DmaModeAdma2:
-            error = USDHC_SetADMA2Descriptor(dmaConfig->admaTable, dmaConfig->admaTableWords, data, blockSize, flags);
-            break;
-        default:
-            return kStatus_USDHC_PrepareAdmaDescriptorFailed;
+    case kUSDHC_DmaModeAdma2:
+        error = USDHC_SetADMA2Descriptor(dmaConfig->admaTable, dmaConfig->admaTableWords, data, blockSize, flags);
+        break;
+    default:
+        return kStatus_USDHC_PrepareAdmaDescriptorFailed;
     }
 
     /* for internal dma, internal DMA configurations should not update the configurations when continous transfer the
      * boot data, only the DMA descriptor need update */
     if ((dmaConfig->dmaMode != kUSDHC_ExternalDMA) && (error == kStatus_Success) &&
-        (dataConfig->dataType != kUSDHC_TransferDataBootcontinous))
-    {
+        (dataConfig->dataType != kUSDHC_TransferDataBootcontinous)) {
         error = USDHC_SetInternalDmaConfig(base, dmaConfig, data, dataConfig->enableAutoCommand23);
     }
 
@@ -1333,44 +1206,40 @@ status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig
 {
     assert(transfer);
 
-    status_t error = kStatus_Fail;
+    status_t error           = kStatus_Fail;
     usdhc_command_t *command = transfer->command;
-    usdhc_data_t *data = transfer->data;
-    bool enDMA = true;
-    bool executeTuning = ((data == NULL) ? false : data->dataType == kUSDHC_TransferDataTuning);
+    usdhc_data_t *data       = transfer->data;
+    bool enDMA               = true;
+    bool executeTuning       = ((data == NULL) ? false : data->dataType == kUSDHC_TransferDataTuning);
 
     /*check re-tuning request*/
-    if ((USDHC_GetInterruptStatusFlags(base) & kUSDHC_ReTuningEventFlag) != 0U)
-    {
+    if ((USDHC_GetInterruptStatusFlags(base) & kUSDHC_ReTuningEventFlag) != 0U) {
         USDHC_ClearInterruptStatusFlags(base, kUSDHC_ReTuningEventFlag);
         return kStatus_USDHC_ReTuningRequest;
     }
 
     /* Update ADMA descriptor table according to different DMA mode(no DMA, ADMA1, ADMA2).*/
-    if ((data != NULL) && (dmaConfig != NULL) && (!executeTuning))
-    {
-        error = USDHC_SetAdmaTableConfig(base, dmaConfig, data, (data->dataType & kUSDHC_TransferDataBoot) ?
-                                                                    kUSDHC_AdmaDescriptorMultipleFlag :
-                                                                    kUSDHC_AdmaDescriptorSingleFlag);
+    if ((data != NULL) && (dmaConfig != NULL) && (!executeTuning)) {
+        error = USDHC_SetAdmaTableConfig(base,
+                                         dmaConfig,
+                                         data,
+                                         (data->dataType & kUSDHC_TransferDataBoot) ? kUSDHC_AdmaDescriptorMultipleFlag
+                                                                                    : kUSDHC_AdmaDescriptorSingleFlag);
     }
 
     /* if the DMA desciptor configure fail or not needed , disable it */
-    if (error != kStatus_Success)
-    {
+    if (error != kStatus_Success) {
         enDMA = false;
         /* disable DMA, using polling mode in this situation */
         USDHC_EnableInternalDMA(base, false);
     }
 #if defined(FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL) && FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
-    else
-    {
-        if (data->txData != NULL)
-        {
+    else {
+        if (data->txData != NULL) {
             /* clear the DCACHE */
             DCACHE_CleanByRange((uint32_t)data->txData, (data->blockSize) * (data->blockCount));
         }
-        else if(data->rxData != NULL)
-        {
+        else if (data->rxData != NULL) {
             /* clear the DCACHE */
             DCACHE_CleanInvalidateByRange((uint32_t)data->rxData, (data->blockSize) * (data->blockCount));
         }
@@ -1379,8 +1248,7 @@ status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig
 
     /* config the data transfer parameter */
     error = USDHC_SetDataTransferConfig(base, data, &(command->flags));
-    if (kStatus_Success != error)
-    {
+    if (kStatus_Success != error) {
         return error;
     }
     /* send command first */
@@ -1389,8 +1257,7 @@ status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig
     error = USDHC_WaitCommandDone(base, command, (data == NULL) || (data->dataType == kUSDHC_TransferDataNormal));
 
     /* wait transfer data finsih */
-    if ((data != NULL) && (error == kStatus_Success))
-    {
+    if ((data != NULL) && (error == kStatus_Success)) {
         return USDHC_TransferDataBlocking(base, data, enDMA);
     }
 
@@ -1405,49 +1272,45 @@ status_t USDHC_TransferNonBlocking(USDHC_Type *base,
     assert(handle);
     assert(transfer);
 
-    status_t error = kStatus_Fail;
+    status_t error           = kStatus_Fail;
     usdhc_command_t *command = transfer->command;
-    usdhc_data_t *data = transfer->data;
-    bool executeTuning = ((data == NULL) ? false : data->dataType == kUSDHC_TransferDataTuning);
+    usdhc_data_t *data       = transfer->data;
+    bool executeTuning       = ((data == NULL) ? false : data->dataType == kUSDHC_TransferDataTuning);
 
     /*check re-tuning request*/
-    if ((USDHC_GetInterruptStatusFlags(base) & (kUSDHC_ReTuningEventFlag)) != 0U)
-    {
+    if ((USDHC_GetInterruptStatusFlags(base) & (kUSDHC_ReTuningEventFlag)) != 0U) {
         USDHC_ClearInterruptStatusFlags(base, kUSDHC_ReTuningEventFlag);
         return kStatus_USDHC_ReTuningRequest;
     }
 
     /* Save command and data into handle before transferring. */
-    handle->command = command;
-    handle->data = data;
+    handle->command        = command;
+    handle->data           = data;
     handle->interruptFlags = 0U;
     /* transferredWords will only be updated in ISR when transfer way is DATAPORT. */
     handle->transferredWords = 0U;
 
     /* Update ADMA descriptor table according to different DMA mode(no DMA, ADMA1, ADMA2).*/
-    if ((data != NULL) && (dmaConfig != NULL) && (!executeTuning))
-    {
-        error = USDHC_SetAdmaTableConfig(base, dmaConfig, data, (data->dataType & kUSDHC_TransferDataBoot) ?
-                                                                    kUSDHC_AdmaDescriptorMultipleFlag :
-                                                                    kUSDHC_AdmaDescriptorSingleFlag);
+    if ((data != NULL) && (dmaConfig != NULL) && (!executeTuning)) {
+        error = USDHC_SetAdmaTableConfig(base,
+                                         dmaConfig,
+                                         data,
+                                         (data->dataType & kUSDHC_TransferDataBoot) ? kUSDHC_AdmaDescriptorMultipleFlag
+                                                                                    : kUSDHC_AdmaDescriptorSingleFlag);
     }
 
     /* if the DMA desciptor configure fail or not needed , disable it */
-    if (error != kStatus_Success)
-    {
+    if (error != kStatus_Success) {
         /* disable DMA, using polling mode in this situation */
         USDHC_EnableInternalDMA(base, false);
     }
 #if defined(FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL) && FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
-    else
-    {
-        if (data->txData != NULL)
-        {
+    else {
+        if (data->txData != NULL) {
             /* clear the DCACHE */
             DCACHE_CleanByRange((uint32_t)data->txData, (data->blockSize) * (data->blockCount));
         }
-        else if (data->rxData != NULL)
-        {
+        else if (data->rxData != NULL) {
             /* clear the DCACHE */
             DCACHE_CleanInvalidateByRange((uint32_t)data->rxData, (data->blockSize) * (data->blockCount));
         }
@@ -1455,8 +1318,7 @@ status_t USDHC_TransferNonBlocking(USDHC_Type *base,
 #endif
 
     error = USDHC_SetDataTransferConfig(base, data, &(command->flags));
-    if (kStatus_Success != error)
-    {
+    if (kStatus_Success != error) {
         return error;
     }
 
@@ -1469,8 +1331,7 @@ status_t USDHC_TransferNonBlocking(USDHC_Type *base,
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (FSL_FEATURE_USDHC_HAS_SDR50_MODE)
 void USDHC_EnableManualTuning(USDHC_Type *base, bool enable)
 {
-    if (enable)
-    {
+    if (enable) {
         /* make sure std_tun_en bit is clear */
         base->TUNING_CTRL &= ~USDHC_TUNING_CTRL_STD_TUNING_EN_MASK;
         /* disable auto tuning here */
@@ -1479,8 +1340,7 @@ void USDHC_EnableManualTuning(USDHC_Type *base, bool enable)
         base->MIX_CTRL |=
             USDHC_MIX_CTRL_EXE_TUNE_MASK | USDHC_MIX_CTRL_SMP_CLK_SEL_MASK | USDHC_MIX_CTRL_FBCLK_SEL_MASK;
     }
-    else
-    { /* abort the tuning */
+    else { /* abort the tuning */
         base->MIX_CTRL &= ~(USDHC_MIX_CTRL_EXE_TUNE_MASK | USDHC_MIX_CTRL_SMP_CLK_SEL_MASK);
     }
 }
@@ -1499,8 +1359,7 @@ status_t USDHC_AdjustDelayForManualTuning(USDHC_Type *base, uint32_t delay)
     base->CLK_TUNE_CTRL_STATUS = clkTuneCtrl;
     /* check delat setting error */
     if (base->CLK_TUNE_CTRL_STATUS &
-        (USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK | USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK))
-    {
+        (USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK | USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK)) {
         return kStatus_Fail;
     }
 
@@ -1511,8 +1370,7 @@ void USDHC_EnableStandardTuning(USDHC_Type *base, uint32_t tuningStartTap, uint3
 {
     uint32_t tuningCtrl = 0U;
 
-    if (enable)
-    {
+    if (enable) {
         /* feedback clock */
         base->MIX_CTRL |= USDHC_MIX_CTRL_FBCLK_SEL_MASK;
         /* config tuning start and step */
@@ -1526,8 +1384,7 @@ void USDHC_EnableStandardTuning(USDHC_Type *base, uint32_t tuningStartTap, uint3
         base->AUTOCMD12_ERR_STATUS |=
             (USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK | USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK);
     }
-    else
-    {
+    else {
         /* disable the standard tuning */
         base->TUNING_CTRL &= ~USDHC_TUNING_CTRL_STD_TUNING_EN_MASK;
         /* clear excute tuning */
@@ -1542,40 +1399,32 @@ void USDHC_EnableAutoTuningForCmdAndData(USDHC_Type *base)
 
     base->VEND_SPEC2 |= USDHC_VEND_SPEC2_TUNING_CMD_EN_MASK;
     busWidth = (base->PROT_CTRL & USDHC_PROT_CTRL_DTW_MASK) >> USDHC_PROT_CTRL_DTW_SHIFT;
-    if (busWidth == kUSDHC_DataBusWidth1Bit)
-    {
+    if (busWidth == kUSDHC_DataBusWidth1Bit) {
         base->VEND_SPEC2 &= ~USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK;
         base->VEND_SPEC2 |= USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK;
     }
-    else if (busWidth == kUSDHC_DataBusWidth4Bit)
-    {
+    else if (busWidth == kUSDHC_DataBusWidth4Bit) {
         base->VEND_SPEC2 &= ~USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK;
         base->VEND_SPEC2 &= ~USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK;
     }
-    else if (busWidth == kUSDHC_DataBusWidth8Bit)
-    {
+    else if (busWidth == kUSDHC_DataBusWidth8Bit) {
         base->VEND_SPEC2 |= USDHC_VEND_SPEC2_TUNING_8bit_EN_MASK;
         base->VEND_SPEC2 &= ~USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK;
     }
-    else
-    {
+    else {
     }
 }
 #endif /* FSL_FEATURE_USDHC_HAS_SDR50_MODE */
 
 static void USDHC_TransferHandleCardDetect(USDHC_Type *base, usdhc_handle_t *handle, uint32_t interruptFlags)
 {
-    if (interruptFlags & kUSDHC_CardInsertionFlag)
-    {
-        if (handle->callback.CardInserted)
-        {
+    if (interruptFlags & kUSDHC_CardInsertionFlag) {
+        if (handle->callback.CardInserted) {
             handle->callback.CardInserted(base, handle->userData);
         }
     }
-    else
-    {
-        if (handle->callback.CardRemoved)
-        {
+    else {
+        if (handle->callback.CardRemoved) {
             handle->callback.CardRemoved(base, handle->userData);
         }
     }
@@ -1585,32 +1434,24 @@ static void USDHC_TransferHandleCommand(USDHC_Type *base, usdhc_handle_t *handle
 {
     assert(handle->command);
 
-    if ((interruptFlags & kUSDHC_CommandErrorFlag) && (!(handle->data)))
-    {
-        if (handle->callback.TransferComplete)
-        {
+    if ((interruptFlags & kUSDHC_CommandErrorFlag) && (!(handle->data))) {
+        if (handle->callback.TransferComplete) {
             handle->callback.TransferComplete(base, handle, kStatus_USDHC_SendCommandFailed, handle->userData);
         }
     }
-    else
-    {
+    else {
         /* Receive response */
-        if (kStatus_Success != USDHC_ReceiveCommandResponse(base, handle->command))
-        {
-            if (handle->callback.TransferComplete)
-            {
+        if (kStatus_Success != USDHC_ReceiveCommandResponse(base, handle->command)) {
+            if (handle->callback.TransferComplete) {
                 handle->callback.TransferComplete(base, handle, kStatus_USDHC_SendCommandFailed, handle->userData);
             }
         }
-        else if ((!(handle->data)) && (handle->callback.TransferComplete))
-        {
-            if (handle->callback.TransferComplete)
-            {
+        else if ((!(handle->data)) && (handle->callback.TransferComplete)) {
+            if (handle->callback.TransferComplete) {
                 handle->callback.TransferComplete(base, handle, kStatus_Success, handle->userData);
             }
         }
-        else
-        {
+        else {
         }
     }
 }
@@ -1619,44 +1460,33 @@ static void USDHC_TransferHandleData(USDHC_Type *base, usdhc_handle_t *handle, u
 {
     assert(handle->data);
 
-    if ((!(handle->data->enableIgnoreError)) && ((interruptFlags & (kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag))))
-    {
-        if (handle->callback.TransferComplete)
-        {
+    if ((!(handle->data->enableIgnoreError)) && ((interruptFlags & (kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag)))) {
+        if (handle->callback.TransferComplete) {
             handle->callback.TransferComplete(base, handle, kStatus_USDHC_TransferDataFailed, handle->userData);
         }
     }
-    else
-    {
-        if (interruptFlags & kUSDHC_BufferReadReadyFlag)
-        {
+    else {
+        if (interruptFlags & kUSDHC_BufferReadReadyFlag) {
             /* std tuning process only need to wait BRR */
-            if (handle->data->dataType == kUSDHC_TransferDataTuning)
-            {
-                if (handle->callback.TransferComplete)
-                {
+            if (handle->data->dataType == kUSDHC_TransferDataTuning) {
+                if (handle->callback.TransferComplete) {
                     handle->callback.TransferComplete(base, handle, kStatus_Success, handle->userData);
                 }
             }
-            else
-            {
+            else {
                 handle->transferredWords = USDHC_ReadDataPort(base, handle->data, handle->transferredWords);
             }
         }
-        else if (interruptFlags & kUSDHC_BufferWriteReadyFlag)
-        {
+        else if (interruptFlags & kUSDHC_BufferWriteReadyFlag) {
             handle->transferredWords = USDHC_WriteDataPort(base, handle->data, handle->transferredWords);
         }
-        else
-        {
+        else {
             if ((interruptFlags & kUSDHC_DmaCompleteFlag) &&
-                (handle->data->dataType == kUSDHC_TransferDataBootcontinous))
-            {
+                (handle->data->dataType == kUSDHC_TransferDataBootcontinous)) {
                 *(handle->data->rxData) = s_usdhcBootDummy;
             }
 
-            if ((handle->callback.TransferComplete) && (interruptFlags & kUSDHC_DataCompleteFlag))
-            {
+            if ((handle->callback.TransferComplete) && (interruptFlags & kUSDHC_DataCompleteFlag)) {
                 handle->callback.TransferComplete(base, handle, kStatus_Success, handle->userData);
             }
         }
@@ -1665,8 +1495,7 @@ static void USDHC_TransferHandleData(USDHC_Type *base, usdhc_handle_t *handle, u
 
 static void USDHC_TransferHandleSdioInterrupt(USDHC_Type *base, usdhc_handle_t *handle)
 {
-    if (handle->callback.SdioInterrupt)
-    {
+    if (handle->callback.SdioInterrupt) {
         handle->callback.SdioInterrupt(base, handle->userData);
     }
 }
@@ -1675,16 +1504,14 @@ static void USDHC_TransferHandleReTuning(USDHC_Type *base, usdhc_handle_t *handl
 {
     assert(handle->callback.ReTuning);
     /* retuning request */
-    if ((interruptFlags & kUSDHC_TuningErrorFlag) == kUSDHC_TuningErrorFlag)
-    {
+    if ((interruptFlags & kUSDHC_TuningErrorFlag) == kUSDHC_TuningErrorFlag) {
         handle->callback.ReTuning(base, handle->userData); /* retuning fail */
     }
 }
 
 static void USDHC_TransferHandleBlockGap(USDHC_Type *base, usdhc_handle_t *handle)
 {
-    if (handle->callback.BlockGap)
-    {
+    if (handle->callback.BlockGap) {
         handle->callback.BlockGap(base, handle->userData);
     }
 }
@@ -1701,13 +1528,13 @@ void USDHC_TransferCreateHandle(USDHC_Type *base,
     memset(handle, 0, sizeof(*handle));
 
     /* Set the callback. */
-    handle->callback.CardInserted = callback->CardInserted;
-    handle->callback.CardRemoved = callback->CardRemoved;
-    handle->callback.SdioInterrupt = callback->SdioInterrupt;
-    handle->callback.BlockGap = callback->BlockGap;
+    handle->callback.CardInserted     = callback->CardInserted;
+    handle->callback.CardRemoved      = callback->CardRemoved;
+    handle->callback.SdioInterrupt    = callback->SdioInterrupt;
+    handle->callback.BlockGap         = callback->BlockGap;
     handle->callback.TransferComplete = callback->TransferComplete;
-    handle->callback.ReTuning = callback->ReTuning;
-    handle->userData = userData;
+    handle->callback.ReTuning         = callback->ReTuning;
+    handle->userData                  = userData;
 
     /* Save the handle in global variables to support the double weak mechanism. */
     s_usdhcHandle[USDHC_GetInstance(base)] = handle;
@@ -1728,31 +1555,25 @@ void USDHC_TransferHandleIRQ(USDHC_Type *base, usdhc_handle_t *handle)
 
     uint32_t interruptFlags;
 
-    interruptFlags = USDHC_GetInterruptStatusFlags(base);
+    interruptFlags         = USDHC_GetInterruptStatusFlags(base);
     handle->interruptFlags = interruptFlags;
 
-    if (interruptFlags & kUSDHC_CardDetectFlag)
-    {
+    if (interruptFlags & kUSDHC_CardDetectFlag) {
         USDHC_TransferHandleCardDetect(base, handle, (interruptFlags & kUSDHC_CardDetectFlag));
     }
-    if (interruptFlags & kUSDHC_CommandFlag)
-    {
+    if (interruptFlags & kUSDHC_CommandFlag) {
         USDHC_TransferHandleCommand(base, handle, (interruptFlags & kUSDHC_CommandFlag));
     }
-    if (interruptFlags & kUSDHC_DataFlag)
-    {
+    if (interruptFlags & kUSDHC_DataFlag) {
         USDHC_TransferHandleData(base, handle, (interruptFlags & kUSDHC_DataFlag));
     }
-    if (interruptFlags & kUSDHC_CardInterruptFlag)
-    {
+    if (interruptFlags & kUSDHC_CardInterruptFlag) {
         USDHC_TransferHandleSdioInterrupt(base, handle);
     }
-    if (interruptFlags & kUSDHC_BlockGapEventFlag)
-    {
+    if (interruptFlags & kUSDHC_BlockGapEventFlag) {
         USDHC_TransferHandleBlockGap(base, handle);
     }
-    if (interruptFlags & kUSDHC_SDR104TuningFlag)
-    {
+    if (interruptFlags & kUSDHC_SDR104TuningFlag) {
         USDHC_TransferHandleReTuning(base, handle, (interruptFlags & kUSDHC_SDR104TuningFlag));
     }
     USDHC_ClearInterruptStatusFlags(base, interruptFlags);
diff --git a/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.h b/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.h
index 4139dfd8b..3069a317d 100644
--- a/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.h
+++ b/module-bsp/board/rt1051/common/fsl_drivers/fsl_usdhc.h
@@ -57,26 +57,26 @@
 /*! @brief USDHC status */
 enum _usdhc_status
 {
-    kStatus_USDHC_BusyTransferring = MAKE_STATUS(kStatusGroup_USDHC, 0U),            /*!< Transfer is on-going */
+    kStatus_USDHC_BusyTransferring            = MAKE_STATUS(kStatusGroup_USDHC, 0U), /*!< Transfer is on-going */
     kStatus_USDHC_PrepareAdmaDescriptorFailed = MAKE_STATUS(kStatusGroup_USDHC, 1U), /*!< Set DMA descriptor failed */
-    kStatus_USDHC_SendCommandFailed = MAKE_STATUS(kStatusGroup_USDHC, 2U),           /*!< Send command failed */
-    kStatus_USDHC_TransferDataFailed = MAKE_STATUS(kStatusGroup_USDHC, 3U),          /*!< Transfer data failed */
-    kStatus_USDHC_DMADataAddrNotAlign = MAKE_STATUS(kStatusGroup_USDHC, 4U),         /*!< data address not align */
-    kStatus_USDHC_ReTuningRequest = MAKE_STATUS(kStatusGroup_USDHC, 5U),             /*!< re-tuning request */
-    kStatus_USDHC_TuningError = MAKE_STATUS(kStatusGroup_USDHC, 6U),                 /*!< tuning error */
-    kStatus_USDHC_NotSupport = MAKE_STATUS(kStatusGroup_USDHC, 7U),                  /*!< not support */
+    kStatus_USDHC_SendCommandFailed           = MAKE_STATUS(kStatusGroup_USDHC, 2U), /*!< Send command failed */
+    kStatus_USDHC_TransferDataFailed          = MAKE_STATUS(kStatusGroup_USDHC, 3U), /*!< Transfer data failed */
+    kStatus_USDHC_DMADataAddrNotAlign         = MAKE_STATUS(kStatusGroup_USDHC, 4U), /*!< data address not align */
+    kStatus_USDHC_ReTuningRequest             = MAKE_STATUS(kStatusGroup_USDHC, 5U), /*!< re-tuning request */
+    kStatus_USDHC_TuningError                 = MAKE_STATUS(kStatusGroup_USDHC, 6U), /*!< tuning error */
+    kStatus_USDHC_NotSupport                  = MAKE_STATUS(kStatusGroup_USDHC, 7U), /*!< not support */
 };
 
 /*! @brief Host controller capabilities flag mask */
 enum _usdhc_capability_flag
 {
-    kUSDHC_SupportAdmaFlag = USDHC_HOST_CTRL_CAP_ADMAS_MASK,        /*!< Support ADMA */
-    kUSDHC_SupportHighSpeedFlag = USDHC_HOST_CTRL_CAP_HSS_MASK,     /*!< Support high-speed */
-    kUSDHC_SupportDmaFlag = USDHC_HOST_CTRL_CAP_DMAS_MASK,          /*!< Support DMA */
-    kUSDHC_SupportSuspendResumeFlag = USDHC_HOST_CTRL_CAP_SRS_MASK, /*!< Support suspend/resume */
-    kUSDHC_SupportV330Flag = USDHC_HOST_CTRL_CAP_VS33_MASK,         /*!< Support voltage 3.3V */
-    kUSDHC_SupportV300Flag = USDHC_HOST_CTRL_CAP_VS30_MASK,         /*!< Support voltage 3.0V */
-    kUSDHC_SupportV180Flag = USDHC_HOST_CTRL_CAP_VS18_MASK,         /*!< Support voltage 1.8V */
+    kUSDHC_SupportAdmaFlag          = USDHC_HOST_CTRL_CAP_ADMAS_MASK, /*!< Support ADMA */
+    kUSDHC_SupportHighSpeedFlag     = USDHC_HOST_CTRL_CAP_HSS_MASK,   /*!< Support high-speed */
+    kUSDHC_SupportDmaFlag           = USDHC_HOST_CTRL_CAP_DMAS_MASK,  /*!< Support DMA */
+    kUSDHC_SupportSuspendResumeFlag = USDHC_HOST_CTRL_CAP_SRS_MASK,   /*!< Support suspend/resume */
+    kUSDHC_SupportV330Flag          = USDHC_HOST_CTRL_CAP_VS33_MASK,  /*!< Support voltage 3.3V */
+    kUSDHC_SupportV300Flag          = USDHC_HOST_CTRL_CAP_VS30_MASK,  /*!< Support voltage 3.0V */
+    kUSDHC_SupportV180Flag          = USDHC_HOST_CTRL_CAP_VS18_MASK,  /*!< Support voltage 1.8V */
     /* Put additional two flags in HTCAPBLT_MBL's position. */
     kUSDHC_Support4BitFlag = (USDHC_HOST_CTRL_CAP_MBL_SHIFT << 0U), /*!< Support 4 bit mode */
     kUSDHC_Support8BitFlag = (USDHC_HOST_CTRL_CAP_MBL_SHIFT << 1U), /*!< Support 8 bit mode */
@@ -86,19 +86,19 @@ enum _usdhc_capability_flag
 #if defined(FSL_FEATURE_USDHC_HAS_SDR104_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR104_MODE)
     kUSDHC_SupportSDR104Flag = 0, /*!< not support SDR104 mode */
 #else
-    kUSDHC_SupportSDR104Flag = USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK, /*!< support SDR104 mode */
+    kUSDHC_SupportSDR104Flag   = USDHC_HOST_CTRL_CAP_SDR104_SUPPORT_MASK, /*!< support SDR104 mode */
 #endif
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
     kUSDHC_SupportSDR50Flag = 0U, /*!< not support SDR50 mode */
 #else
-    kUSDHC_SupportSDR50Flag = USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK,   /*!< support SDR50 mode */
+    kUSDHC_SupportSDR50Flag    = USDHC_HOST_CTRL_CAP_SDR50_SUPPORT_MASK,  /*!< support SDR50 mode */
 #endif
 };
 
 /*! @brief Wakeup event mask */
 enum _usdhc_wakeup_event
 {
-    kUSDHC_WakeupEventOnCardInt = USDHC_PROT_CTRL_WECINT_MASK,    /*!< Wakeup on card interrupt */
+    kUSDHC_WakeupEventOnCardInt    = USDHC_PROT_CTRL_WECINT_MASK, /*!< Wakeup on card interrupt */
     kUSDHC_WakeupEventOnCardInsert = USDHC_PROT_CTRL_WECINS_MASK, /*!< Wakeup on card insertion */
     kUSDHC_WakeupEventOnCardRemove = USDHC_PROT_CTRL_WECRM_MASK,  /*!< Wakeup on card removal */
 
@@ -109,14 +109,14 @@ enum _usdhc_wakeup_event
 /*! @brief Reset type mask */
 enum _usdhc_reset
 {
-    kUSDHC_ResetAll = USDHC_SYS_CTRL_RSTA_MASK,     /*!< Reset all except card detection */
+    kUSDHC_ResetAll     = USDHC_SYS_CTRL_RSTA_MASK, /*!< Reset all except card detection */
     kUSDHC_ResetCommand = USDHC_SYS_CTRL_RSTC_MASK, /*!< Reset command line */
-    kUSDHC_ResetData = USDHC_SYS_CTRL_RSTD_MASK,    /*!< Reset data line */
+    kUSDHC_ResetData    = USDHC_SYS_CTRL_RSTD_MASK, /*!< Reset data line */
 
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
     kUSDHC_ResetTuning = 0U, /*!< no reset tuning circuit bit */
 #else
-    kUSDHC_ResetTuning = USDHC_SYS_CTRL_RSTT_MASK,                      /*!< reset tuning circuit */
+    kUSDHC_ResetTuning         = USDHC_SYS_CTRL_RSTT_MASK,                /*!< reset tuning circuit */
 #endif
 
     kUSDHC_ResetsAll =
@@ -129,46 +129,46 @@ enum _usdhc_transfer_flag
     kUSDHC_EnableDmaFlag = USDHC_MIX_CTRL_DMAEN_MASK, /*!< Enable DMA */
 
     kUSDHC_CommandTypeSuspendFlag = (USDHC_CMD_XFR_TYP_CMDTYP(1U)), /*!< Suspend command */
-    kUSDHC_CommandTypeResumeFlag = (USDHC_CMD_XFR_TYP_CMDTYP(2U)),  /*!< Resume command */
-    kUSDHC_CommandTypeAbortFlag = (USDHC_CMD_XFR_TYP_CMDTYP(3U)),   /*!< Abort command */
+    kUSDHC_CommandTypeResumeFlag  = (USDHC_CMD_XFR_TYP_CMDTYP(2U)), /*!< Resume command */
+    kUSDHC_CommandTypeAbortFlag   = (USDHC_CMD_XFR_TYP_CMDTYP(3U)), /*!< Abort command */
 
-    kUSDHC_EnableBlockCountFlag = USDHC_MIX_CTRL_BCEN_MASK,      /*!< Enable block count */
+    kUSDHC_EnableBlockCountFlag    = USDHC_MIX_CTRL_BCEN_MASK,   /*!< Enable block count */
     kUSDHC_EnableAutoCommand12Flag = USDHC_MIX_CTRL_AC12EN_MASK, /*!< Enable auto CMD12 */
-    kUSDHC_DataReadFlag = USDHC_MIX_CTRL_DTDSEL_MASK,            /*!< Enable data read */
-    kUSDHC_MultipleBlockFlag = USDHC_MIX_CTRL_MSBSEL_MASK,       /*!< Multiple block data read/write */
+    kUSDHC_DataReadFlag            = USDHC_MIX_CTRL_DTDSEL_MASK, /*!< Enable data read */
+    kUSDHC_MultipleBlockFlag       = USDHC_MIX_CTRL_MSBSEL_MASK, /*!< Multiple block data read/write */
     kUSDHC_EnableAutoCommand23Flag = USDHC_MIX_CTRL_AC23EN_MASK, /*!< Enable auto CMD23 */
 
-    kUSDHC_ResponseLength136Flag = USDHC_CMD_XFR_TYP_RSPTYP(1U),    /*!< 136 bit response length */
-    kUSDHC_ResponseLength48Flag = USDHC_CMD_XFR_TYP_RSPTYP(2U),     /*!< 48 bit response length */
+    kUSDHC_ResponseLength136Flag    = USDHC_CMD_XFR_TYP_RSPTYP(1U), /*!< 136 bit response length */
+    kUSDHC_ResponseLength48Flag     = USDHC_CMD_XFR_TYP_RSPTYP(2U), /*!< 48 bit response length */
     kUSDHC_ResponseLength48BusyFlag = USDHC_CMD_XFR_TYP_RSPTYP(3U), /*!< 48 bit response length with busy status */
 
-    kUSDHC_EnableCrcCheckFlag = USDHC_CMD_XFR_TYP_CCCEN_MASK,   /*!< Enable CRC check */
+    kUSDHC_EnableCrcCheckFlag   = USDHC_CMD_XFR_TYP_CCCEN_MASK, /*!< Enable CRC check */
     kUSDHC_EnableIndexCheckFlag = USDHC_CMD_XFR_TYP_CICEN_MASK, /*!< Enable index check */
-    kUSDHC_DataPresentFlag = USDHC_CMD_XFR_TYP_DPSEL_MASK,      /*!< Data present flag */
+    kUSDHC_DataPresentFlag      = USDHC_CMD_XFR_TYP_DPSEL_MASK, /*!< Data present flag */
 };
 
 /*! @brief Present status flag mask */
 enum _usdhc_present_status_flag
 {
-    kUSDHC_CommandInhibitFlag = USDHC_PRES_STATE_CIHB_MASK,     /*!< Command inhibit */
-    kUSDHC_DataInhibitFlag = USDHC_PRES_STATE_CDIHB_MASK,       /*!< Data inhibit */
-    kUSDHC_DataLineActiveFlag = USDHC_PRES_STATE_DLA_MASK,      /*!< Data line active */
-    kUSDHC_SdClockStableFlag = USDHC_PRES_STATE_SDSTB_MASK,     /*!< SD bus clock stable */
-    kUSDHC_WriteTransferActiveFlag = USDHC_PRES_STATE_WTA_MASK, /*!< Write transfer active */
-    kUSDHC_ReadTransferActiveFlag = USDHC_PRES_STATE_RTA_MASK,  /*!< Read transfer active */
-    kUSDHC_BufferWriteEnableFlag = USDHC_PRES_STATE_BWEN_MASK,  /*!< Buffer write enable */
-    kUSDHC_BufferReadEnableFlag = USDHC_PRES_STATE_BREN_MASK,   /*!< Buffer read enable */
+    kUSDHC_CommandInhibitFlag      = USDHC_PRES_STATE_CIHB_MASK,  /*!< Command inhibit */
+    kUSDHC_DataInhibitFlag         = USDHC_PRES_STATE_CDIHB_MASK, /*!< Data inhibit */
+    kUSDHC_DataLineActiveFlag      = USDHC_PRES_STATE_DLA_MASK,   /*!< Data line active */
+    kUSDHC_SdClockStableFlag       = USDHC_PRES_STATE_SDSTB_MASK, /*!< SD bus clock stable */
+    kUSDHC_WriteTransferActiveFlag = USDHC_PRES_STATE_WTA_MASK,   /*!< Write transfer active */
+    kUSDHC_ReadTransferActiveFlag  = USDHC_PRES_STATE_RTA_MASK,   /*!< Read transfer active */
+    kUSDHC_BufferWriteEnableFlag   = USDHC_PRES_STATE_BWEN_MASK,  /*!< Buffer write enable */
+    kUSDHC_BufferReadEnableFlag    = USDHC_PRES_STATE_BREN_MASK,  /*!< Buffer read enable */
 
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
     kUSDHC_DelaySettingFinishedFlag = 0U, /*!< not support */
-    kUSDHC_ReTuningRequestFlag = 0U,      /*!< not support */
+    kUSDHC_ReTuningRequestFlag      = 0U, /*!< not support */
 #else
     kUSDHC_ReTuningRequestFlag = USDHC_PRES_STATE_RTR_MASK, /*!< re-tuning request flag ,only used for SDR104 mode */
     kUSDHC_DelaySettingFinishedFlag = USDHC_PRES_STATE_TSCD_MASK, /*!< delay setting finished flag */
 #endif
 
-    kUSDHC_CardInsertedFlag = USDHC_PRES_STATE_CINST_MASK,    /*!< Card inserted */
-    kUSDHC_CommandLineLevelFlag = USDHC_PRES_STATE_CLSL_MASK, /*!< Command line signal level */
+    kUSDHC_CardInsertedFlag     = USDHC_PRES_STATE_CINST_MASK, /*!< Card inserted */
+    kUSDHC_CommandLineLevelFlag = USDHC_PRES_STATE_CLSL_MASK,  /*!< Command line signal level */
 
     kUSDHC_Data0LineLevelFlag = (1U << USDHC_PRES_STATE_DLSL_SHIFT),        /*!< Data0 line signal level */
     kUSDHC_Data1LineLevelFlag = (1U << (USDHC_PRES_STATE_DLSL_SHIFT + 1U)), /*!< Data1 line signal level */
@@ -183,45 +183,45 @@ enum _usdhc_present_status_flag
 /*! @brief Interrupt status flag mask */
 enum _usdhc_interrupt_status_flag
 {
-    kUSDHC_CommandCompleteFlag = USDHC_INT_STATUS_CC_MASK,   /*!< Command complete */
-    kUSDHC_DataCompleteFlag = USDHC_INT_STATUS_TC_MASK,      /*!< Data complete */
-    kUSDHC_BlockGapEventFlag = USDHC_INT_STATUS_BGE_MASK,    /*!< Block gap event */
-    kUSDHC_DmaCompleteFlag = USDHC_INT_STATUS_DINT_MASK,     /*!< DMA interrupt */
-    kUSDHC_BufferWriteReadyFlag = USDHC_INT_STATUS_BWR_MASK, /*!< Buffer write ready */
-    kUSDHC_BufferReadReadyFlag = USDHC_INT_STATUS_BRR_MASK,  /*!< Buffer read ready */
-    kUSDHC_CardInsertionFlag = USDHC_INT_STATUS_CINS_MASK,   /*!< Card inserted */
-    kUSDHC_CardRemovalFlag = USDHC_INT_STATUS_CRM_MASK,      /*!< Card removed */
-    kUSDHC_CardInterruptFlag = USDHC_INT_STATUS_CINT_MASK,   /*!< Card interrupt */
+    kUSDHC_CommandCompleteFlag  = USDHC_INT_STATUS_CC_MASK,   /*!< Command complete */
+    kUSDHC_DataCompleteFlag     = USDHC_INT_STATUS_TC_MASK,   /*!< Data complete */
+    kUSDHC_BlockGapEventFlag    = USDHC_INT_STATUS_BGE_MASK,  /*!< Block gap event */
+    kUSDHC_DmaCompleteFlag      = USDHC_INT_STATUS_DINT_MASK, /*!< DMA interrupt */
+    kUSDHC_BufferWriteReadyFlag = USDHC_INT_STATUS_BWR_MASK,  /*!< Buffer write ready */
+    kUSDHC_BufferReadReadyFlag  = USDHC_INT_STATUS_BRR_MASK,  /*!< Buffer read ready */
+    kUSDHC_CardInsertionFlag    = USDHC_INT_STATUS_CINS_MASK, /*!< Card inserted */
+    kUSDHC_CardRemovalFlag      = USDHC_INT_STATUS_CRM_MASK,  /*!< Card removed */
+    kUSDHC_CardInterruptFlag    = USDHC_INT_STATUS_CINT_MASK, /*!< Card interrupt */
 
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
     kUSDHC_ReTuningEventFlag = 0U, /*!< Re-Tuning event,only for SD3.0 SDR104 mode */
-    kUSDHC_TuningPassFlag = 0U,    /*!< SDR104 mode tuning pass flag */
-    kUSDHC_TuningErrorFlag = 0U,   /*!< SDR104 tuning error flag */
+    kUSDHC_TuningPassFlag    = 0U, /*!< SDR104 mode tuning pass flag */
+    kUSDHC_TuningErrorFlag   = 0U, /*!< SDR104 tuning error flag */
 #else
-    kUSDHC_ReTuningEventFlag = USDHC_INT_STATUS_RTE_MASK,         /*!< Re-Tuning event,only for SD3.0 SDR104 mode */
-    kUSDHC_TuningPassFlag = USDHC_INT_STATUS_TP_MASK,             /*!< SDR104 mode tuning pass flag */
-    kUSDHC_TuningErrorFlag = USDHC_INT_STATUS_TNE_MASK,           /*!< SDR104 tuning error flag */
+    kUSDHC_ReTuningEventFlag        = USDHC_INT_STATUS_RTE_MASK,  /*!< Re-Tuning event,only for SD3.0 SDR104 mode */
+    kUSDHC_TuningPassFlag           = USDHC_INT_STATUS_TP_MASK,   /*!< SDR104 mode tuning pass flag */
+    kUSDHC_TuningErrorFlag          = USDHC_INT_STATUS_TNE_MASK,  /*!< SDR104 tuning error flag */
 #endif
 
-    kUSDHC_CommandTimeoutFlag = USDHC_INT_STATUS_CTOE_MASK,      /*!< Command timeout error */
-    kUSDHC_CommandCrcErrorFlag = USDHC_INT_STATUS_CCE_MASK,      /*!< Command CRC error */
+    kUSDHC_CommandTimeoutFlag     = USDHC_INT_STATUS_CTOE_MASK,  /*!< Command timeout error */
+    kUSDHC_CommandCrcErrorFlag    = USDHC_INT_STATUS_CCE_MASK,   /*!< Command CRC error */
     kUSDHC_CommandEndBitErrorFlag = USDHC_INT_STATUS_CEBE_MASK,  /*!< Command end bit error */
-    kUSDHC_CommandIndexErrorFlag = USDHC_INT_STATUS_CIE_MASK,    /*!< Command index error */
-    kUSDHC_DataTimeoutFlag = USDHC_INT_STATUS_DTOE_MASK,         /*!< Data timeout error */
-    kUSDHC_DataCrcErrorFlag = USDHC_INT_STATUS_DCE_MASK,         /*!< Data CRC error */
-    kUSDHC_DataEndBitErrorFlag = USDHC_INT_STATUS_DEBE_MASK,     /*!< Data end bit error */
+    kUSDHC_CommandIndexErrorFlag  = USDHC_INT_STATUS_CIE_MASK,   /*!< Command index error */
+    kUSDHC_DataTimeoutFlag        = USDHC_INT_STATUS_DTOE_MASK,  /*!< Data timeout error */
+    kUSDHC_DataCrcErrorFlag       = USDHC_INT_STATUS_DCE_MASK,   /*!< Data CRC error */
+    kUSDHC_DataEndBitErrorFlag    = USDHC_INT_STATUS_DEBE_MASK,  /*!< Data end bit error */
     kUSDHC_AutoCommand12ErrorFlag = USDHC_INT_STATUS_AC12E_MASK, /*!< Auto CMD12 error */
-    kUSDHC_DmaErrorFlag = USDHC_INT_STATUS_DMAE_MASK,            /*!< DMA error */
+    kUSDHC_DmaErrorFlag           = USDHC_INT_STATUS_DMAE_MASK,  /*!< DMA error */
 
     kUSDHC_CommandErrorFlag = (kUSDHC_CommandTimeoutFlag | kUSDHC_CommandCrcErrorFlag | kUSDHC_CommandEndBitErrorFlag |
                                kUSDHC_CommandIndexErrorFlag), /*!< Command error */
-    kUSDHC_DataErrorFlag = (kUSDHC_DataTimeoutFlag | kUSDHC_DataCrcErrorFlag | kUSDHC_DataEndBitErrorFlag |
-                            kUSDHC_AutoCommand12ErrorFlag),                                    /*!< Data error */
-    kUSDHC_ErrorFlag = (kUSDHC_CommandErrorFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag), /*!< All error */
-    kUSDHC_DataFlag = (kUSDHC_DataCompleteFlag | kUSDHC_DmaCompleteFlag | kUSDHC_BufferWriteReadyFlag |
+    kUSDHC_DataErrorFlag    = (kUSDHC_DataTimeoutFlag | kUSDHC_DataCrcErrorFlag | kUSDHC_DataEndBitErrorFlag |
+                            kUSDHC_AutoCommand12ErrorFlag),                                        /*!< Data error */
+    kUSDHC_ErrorFlag        = (kUSDHC_CommandErrorFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag), /*!< All error */
+    kUSDHC_DataFlag         = (kUSDHC_DataCompleteFlag | kUSDHC_DmaCompleteFlag | kUSDHC_BufferWriteReadyFlag |
                        kUSDHC_BufferReadReadyFlag | kUSDHC_DataErrorFlag | kUSDHC_DmaErrorFlag), /*!< Data interrupts */
-    kUSDHC_CommandFlag = (kUSDHC_CommandErrorFlag | kUSDHC_CommandCompleteFlag), /*!< Command interrupts */
-    kUSDHC_CardDetectFlag = (kUSDHC_CardInsertionFlag | kUSDHC_CardRemovalFlag), /*!< Card detection interrupts */
+    kUSDHC_CommandFlag      = (kUSDHC_CommandErrorFlag | kUSDHC_CommandCompleteFlag), /*!< Command interrupts */
+    kUSDHC_CardDetectFlag   = (kUSDHC_CardInsertionFlag | kUSDHC_CardRemovalFlag),    /*!< Card detection interrupts */
     kUSDHC_SDR104TuningFlag = (kUSDHC_TuningErrorFlag | kUSDHC_TuningPassFlag | kUSDHC_ReTuningEventFlag),
 
     kUSDHC_AllInterruptFlags = (kUSDHC_BlockGapEventFlag | kUSDHC_CardInterruptFlag | kUSDHC_CommandFlag |
@@ -231,32 +231,31 @@ enum _usdhc_interrupt_status_flag
 /*! @brief Auto CMD12 error status flag mask */
 enum _usdhc_auto_command12_error_status_flag
 {
-    kUSDHC_AutoCommand12NotExecutedFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK,  /*!< Not executed error */
-    kUSDHC_AutoCommand12TimeoutFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK,     /*!< Timeout error */
-    kUSDHC_AutoCommand12EndBitErrorFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK, /*!< End bit error */
-    kUSDHC_AutoCommand12CrcErrorFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK,     /*!< CRC error */
-    kUSDHC_AutoCommand12IndexErrorFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK,   /*!< Index error */
-    kUSDHC_AutoCommand12NotIssuedFlag = USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK, /*!< Not issued error */
+    kUSDHC_AutoCommand12NotExecutedFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12NE_MASK,    /*!< Not executed error */
+    kUSDHC_AutoCommand12TimeoutFlag     = USDHC_AUTOCMD12_ERR_STATUS_AC12TOE_MASK,   /*!< Timeout error */
+    kUSDHC_AutoCommand12EndBitErrorFlag = USDHC_AUTOCMD12_ERR_STATUS_AC12EBE_MASK,   /*!< End bit error */
+    kUSDHC_AutoCommand12CrcErrorFlag    = USDHC_AUTOCMD12_ERR_STATUS_AC12CE_MASK,    /*!< CRC error */
+    kUSDHC_AutoCommand12IndexErrorFlag  = USDHC_AUTOCMD12_ERR_STATUS_AC12IE_MASK,    /*!< Index error */
+    kUSDHC_AutoCommand12NotIssuedFlag   = USDHC_AUTOCMD12_ERR_STATUS_CNIBAC12E_MASK, /*!< Not issued error */
 };
 
 /*! @brief standard tuning flag */
 enum _usdhc_standard_tuning
 {
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
-    kUSDHC_ExecuteTuning = 0U,        /*!< not support */
+    kUSDHC_ExecuteTuning        = 0U, /*!< not support */
     kUSDHC_TuningSampleClockSel = 0U, /*!< not support */
 #else
-    kUSDHC_ExecuteTuning = USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK, /*!< used to start tuning procedure */
-    kUSDHC_TuningSampleClockSel =
-        USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK,               /*!< when std_tuning_en bit is set, this bit is used
-                                                                    select sampleing clock */
+    kUSDHC_ExecuteTuning        = USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK, /*!< used to start tuning procedure */
+    kUSDHC_TuningSampleClockSel = USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK, /*!< when std_tuning_en bit is set, this
+                                                                                bit is used select sampleing clock */
 #endif
 };
 
 /*! @brief ADMA error status flag mask */
 enum _usdhc_adma_error_status_flag
 {
-    kUSDHC_AdmaLenghMismatchFlag = USDHC_ADMA_ERR_STATUS_ADMALME_MASK,   /*!< Length mismatch error */
+    kUSDHC_AdmaLenghMismatchFlag   = USDHC_ADMA_ERR_STATUS_ADMALME_MASK, /*!< Length mismatch error */
     kUSDHC_AdmaDescriptorErrorFlag = USDHC_ADMA_ERR_STATUS_ADMADCE_MASK, /*!< Descriptor error */
 };
 
@@ -274,7 +273,7 @@ enum _usdhc_adma_error_state
     kUSDHC_AdmaErrorStateChangeAddress = 0x02U, /*!< Change address, no DMA error is occured */
     kUSDHC_AdmaErrorStateTransferData =
         0x03U, /*!< Transfer data, previous location set in the ADMA system address is error address */
-    kUSDHC_AdmaErrorStateInvalidLength = 0x04U,     /*!< Invalid length in ADMA descriptor */
+    kUSDHC_AdmaErrorStateInvalidLength     = 0x04U, /*!< Invalid length in ADMA descriptor */
     kUSDHC_AdmaErrorStateInvalidDescriptor = 0x08U, /*!< Invalid descriptor fetched by ADMA */
 
     kUSDHC_AdmaErrorState = kUSDHC_AdmaErrorStateInvalidLength | kUSDHC_AdmaErrorStateInvalidDescriptor |
@@ -285,25 +284,25 @@ enum _usdhc_adma_error_state
 enum _usdhc_force_event
 {
     kUSDHC_ForceEventAutoCommand12NotExecuted = USDHC_FORCE_EVENT_FEVTAC12NE_MASK, /*!< Auto CMD12 not executed error */
-    kUSDHC_ForceEventAutoCommand12Timeout = USDHC_FORCE_EVENT_FEVTAC12TOE_MASK,    /*!< Auto CMD12 timeout error */
-    kUSDHC_ForceEventAutoCommand12CrcError = USDHC_FORCE_EVENT_FEVTAC12CE_MASK,    /*!< Auto CMD12 CRC error */
-    kUSDHC_ForceEventEndBitError = USDHC_FORCE_EVENT_FEVTAC12EBE_MASK,             /*!< Auto CMD12 end bit error */
-    kUSDHC_ForceEventAutoCommand12IndexError = USDHC_FORCE_EVENT_FEVTAC12IE_MASK,  /*!< Auto CMD12 index error */
+    kUSDHC_ForceEventAutoCommand12Timeout     = USDHC_FORCE_EVENT_FEVTAC12TOE_MASK, /*!< Auto CMD12 timeout error */
+    kUSDHC_ForceEventAutoCommand12CrcError    = USDHC_FORCE_EVENT_FEVTAC12CE_MASK,  /*!< Auto CMD12 CRC error */
+    kUSDHC_ForceEventEndBitError              = USDHC_FORCE_EVENT_FEVTAC12EBE_MASK, /*!< Auto CMD12 end bit error */
+    kUSDHC_ForceEventAutoCommand12IndexError  = USDHC_FORCE_EVENT_FEVTAC12IE_MASK,  /*!< Auto CMD12 index error */
     kUSDHC_ForceEventAutoCommand12NotIssued = USDHC_FORCE_EVENT_FEVTCNIBAC12E_MASK, /*!< Auto CMD12 not issued error */
-    kUSDHC_ForceEventCommandTimeout = USDHC_FORCE_EVENT_FEVTCTOE_MASK,              /*!< Command timeout error */
-    kUSDHC_ForceEventCommandCrcError = USDHC_FORCE_EVENT_FEVTCCE_MASK,              /*!< Command CRC error */
-    kUSDHC_ForceEventCommandEndBitError = USDHC_FORCE_EVENT_FEVTCEBE_MASK,          /*!< Command end bit error */
-    kUSDHC_ForceEventCommandIndexError = USDHC_FORCE_EVENT_FEVTCIE_MASK,            /*!< Command index error */
-    kUSDHC_ForceEventDataTimeout = USDHC_FORCE_EVENT_FEVTDTOE_MASK,                 /*!< Data timeout error */
-    kUSDHC_ForceEventDataCrcError = USDHC_FORCE_EVENT_FEVTDCE_MASK,                 /*!< Data CRC error */
-    kUSDHC_ForceEventDataEndBitError = USDHC_FORCE_EVENT_FEVTDEBE_MASK,             /*!< Data end bit error */
-    kUSDHC_ForceEventAutoCommand12Error = USDHC_FORCE_EVENT_FEVTAC12E_MASK,         /*!< Auto CMD12 error */
-    kUSDHC_ForceEventCardInt = USDHC_FORCE_EVENT_FEVTCINT_MASK,                     /*!< Card interrupt */
-    kUSDHC_ForceEventDmaError = USDHC_FORCE_EVENT_FEVTDMAE_MASK,                    /*!< Dma error */
+    kUSDHC_ForceEventCommandTimeout         = USDHC_FORCE_EVENT_FEVTCTOE_MASK,      /*!< Command timeout error */
+    kUSDHC_ForceEventCommandCrcError        = USDHC_FORCE_EVENT_FEVTCCE_MASK,       /*!< Command CRC error */
+    kUSDHC_ForceEventCommandEndBitError     = USDHC_FORCE_EVENT_FEVTCEBE_MASK,      /*!< Command end bit error */
+    kUSDHC_ForceEventCommandIndexError      = USDHC_FORCE_EVENT_FEVTCIE_MASK,       /*!< Command index error */
+    kUSDHC_ForceEventDataTimeout            = USDHC_FORCE_EVENT_FEVTDTOE_MASK,      /*!< Data timeout error */
+    kUSDHC_ForceEventDataCrcError           = USDHC_FORCE_EVENT_FEVTDCE_MASK,       /*!< Data CRC error */
+    kUSDHC_ForceEventDataEndBitError        = USDHC_FORCE_EVENT_FEVTDEBE_MASK,      /*!< Data end bit error */
+    kUSDHC_ForceEventAutoCommand12Error     = USDHC_FORCE_EVENT_FEVTAC12E_MASK,     /*!< Auto CMD12 error */
+    kUSDHC_ForceEventCardInt                = USDHC_FORCE_EVENT_FEVTCINT_MASK,      /*!< Card interrupt */
+    kUSDHC_ForceEventDmaError               = USDHC_FORCE_EVENT_FEVTDMAE_MASK,      /*!< Dma error */
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (!FSL_FEATURE_USDHC_HAS_SDR50_MODE)
     kUSDHC_ForceEventTuningError = 0U, /*!< not support */
 #else
-    kUSDHC_ForceEventTuningError = USDHC_FORCE_EVENT_FEVTTNE_MASK, /*!< Tuning error */
+    kUSDHC_ForceEventTuningError = USDHC_FORCE_EVENT_FEVTTNE_MASK,             /*!< Tuning error */
 #endif
     kUSDHC_ForceEventsAll =
         (kUSDHC_ForceEventAutoCommand12NotExecuted | kUSDHC_ForceEventAutoCommand12Timeout |
@@ -326,45 +325,45 @@ typedef enum _usdhc_data_bus_width
 /*! @brief Endian mode */
 typedef enum _usdhc_endian_mode
 {
-    kUSDHC_EndianModeBig = 0U,         /*!< Big endian mode */
+    kUSDHC_EndianModeBig         = 0U, /*!< Big endian mode */
     kUSDHC_EndianModeHalfWordBig = 1U, /*!< Half word big endian mode */
-    kUSDHC_EndianModeLittle = 2U,      /*!< Little endian mode */
+    kUSDHC_EndianModeLittle      = 2U, /*!< Little endian mode */
 } usdhc_endian_mode_t;
 
 /*! @brief DMA mode */
 typedef enum _usdhc_dma_mode
 {
     kUSDHC_DmaModeSimple = 0U, /*!< external DMA */
-    kUSDHC_DmaModeAdma1 = 1U,  /*!< ADMA1 is selected */
-    kUSDHC_DmaModeAdma2 = 2U,  /*!< ADMA2 is selected */
-    kUSDHC_ExternalDMA = 3U,   /*!< external dma mode select */
+    kUSDHC_DmaModeAdma1  = 1U, /*!< ADMA1 is selected */
+    kUSDHC_DmaModeAdma2  = 2U, /*!< ADMA2 is selected */
+    kUSDHC_ExternalDMA   = 3U, /*!< external dma mode select */
 } usdhc_dma_mode_t;
 
 /*! @brief SDIO control flag mask */
 enum _usdhc_sdio_control_flag
 {
-    kUSDHC_StopAtBlockGapFlag = USDHC_PROT_CTRL_SABGREQ_MASK,     /*!< Stop at block gap */
-    kUSDHC_ReadWaitControlFlag = USDHC_PROT_CTRL_RWCTL_MASK,      /*!< Read wait control */
-    kUSDHC_InterruptAtBlockGapFlag = USDHC_PROT_CTRL_IABG_MASK,   /*!< Interrupt at block gap */
-    kUSDHC_ReadDoneNo8CLK = USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK, /*!< read done without 8 clk for block gap */
+    kUSDHC_StopAtBlockGapFlag      = USDHC_PROT_CTRL_SABGREQ_MASK,         /*!< Stop at block gap */
+    kUSDHC_ReadWaitControlFlag     = USDHC_PROT_CTRL_RWCTL_MASK,           /*!< Read wait control */
+    kUSDHC_InterruptAtBlockGapFlag = USDHC_PROT_CTRL_IABG_MASK,            /*!< Interrupt at block gap */
+    kUSDHC_ReadDoneNo8CLK          = USDHC_PROT_CTRL_RD_DONE_NO_8CLK_MASK, /*!< read done without 8 clk for block gap */
     kUSDHC_ExactBlockNumberReadFlag = USDHC_PROT_CTRL_NON_EXACT_BLK_RD_MASK, /*!< Exact block number read */
 };
 
 /*! @brief MMC card boot mode */
 typedef enum _usdhc_boot_mode
 {
-    kUSDHC_BootModeNormal = 0U,      /*!< Normal boot */
+    kUSDHC_BootModeNormal      = 0U, /*!< Normal boot */
     kUSDHC_BootModeAlternative = 1U, /*!< Alternative boot */
 } usdhc_boot_mode_t;
 
 /*! @brief The command type */
 typedef enum _usdhc_card_command_type
 {
-    kCARD_CommandTypeNormal = 0U,  /*!< Normal command */
+    kCARD_CommandTypeNormal  = 0U, /*!< Normal command */
     kCARD_CommandTypeSuspend = 1U, /*!< Suspend command */
-    kCARD_CommandTypeResume = 2U,  /*!< Resume command */
-    kCARD_CommandTypeAbort = 3U,   /*!< Abort command */
-    kCARD_CommandTypeEmpty = 4U,   /*!< Empty command */
+    kCARD_CommandTypeResume  = 2U, /*!< Resume command */
+    kCARD_CommandTypeAbort   = 3U, /*!< Abort command */
+    kCARD_CommandTypeEmpty   = 4U, /*!< Empty command */
 } usdhc_card_command_type_t;
 
 /*!
@@ -375,15 +374,15 @@ typedef enum _usdhc_card_command_type
 typedef enum _usdhc_card_response_type
 {
     kCARD_ResponseTypeNone = 0U, /*!< Response type: none */
-    kCARD_ResponseTypeR1 = 1U,   /*!< Response type: R1 */
-    kCARD_ResponseTypeR1b = 2U,  /*!< Response type: R1b */
-    kCARD_ResponseTypeR2 = 3U,   /*!< Response type: R2 */
-    kCARD_ResponseTypeR3 = 4U,   /*!< Response type: R3 */
-    kCARD_ResponseTypeR4 = 5U,   /*!< Response type: R4 */
-    kCARD_ResponseTypeR5 = 6U,   /*!< Response type: R5 */
-    kCARD_ResponseTypeR5b = 7U,  /*!< Response type: R5b */
-    kCARD_ResponseTypeR6 = 8U,   /*!< Response type: R6 */
-    kCARD_ResponseTypeR7 = 9U,   /*!< Response type: R7 */
+    kCARD_ResponseTypeR1   = 1U, /*!< Response type: R1 */
+    kCARD_ResponseTypeR1b  = 2U, /*!< Response type: R1b */
+    kCARD_ResponseTypeR2   = 3U, /*!< Response type: R2 */
+    kCARD_ResponseTypeR3   = 4U, /*!< Response type: R3 */
+    kCARD_ResponseTypeR4   = 5U, /*!< Response type: R4 */
+    kCARD_ResponseTypeR5   = 6U, /*!< Response type: R5 */
+    kCARD_ResponseTypeR5b  = 7U, /*!< Response type: R5b */
+    kCARD_ResponseTypeR6   = 8U, /*!< Response type: R6 */
+    kCARD_ResponseTypeR7   = 9U, /*!< Response type: R7 */
 } usdhc_card_response_type_t;
 
 /*! @brief The alignment size for ADDRESS filed in ADMA1's descriptor */
@@ -431,12 +430,12 @@ typedef enum _usdhc_card_response_type
 /*! @brief The mask for the control/status field in ADMA1 descriptor */
 enum _usdhc_adma1_descriptor_flag
 {
-    kUSDHC_Adma1DescriptorValidFlag = (1U << 0U),                      /*!< Valid flag */
-    kUSDHC_Adma1DescriptorEndFlag = (1U << 1U),                        /*!< End flag */
-    kUSDHC_Adma1DescriptorInterrupFlag = (1U << 2U),                   /*!< Interrupt flag */
-    kUSDHC_Adma1DescriptorActivity1Flag = (1U << 4U),                  /*!< Activity 1 flag */
-    kUSDHC_Adma1DescriptorActivity2Flag = (1U << 5U),                  /*!< Activity 2 flag */
-    kUSDHC_Adma1DescriptorTypeNop = (kUSDHC_Adma1DescriptorValidFlag), /*!< No operation */
+    kUSDHC_Adma1DescriptorValidFlag     = (1U << 0U),                        /*!< Valid flag */
+    kUSDHC_Adma1DescriptorEndFlag       = (1U << 1U),                        /*!< End flag */
+    kUSDHC_Adma1DescriptorInterrupFlag  = (1U << 2U),                        /*!< Interrupt flag */
+    kUSDHC_Adma1DescriptorActivity1Flag = (1U << 4U),                        /*!< Activity 1 flag */
+    kUSDHC_Adma1DescriptorActivity2Flag = (1U << 5U),                        /*!< Activity 2 flag */
+    kUSDHC_Adma1DescriptorTypeNop       = (kUSDHC_Adma1DescriptorValidFlag), /*!< No operation */
     kUSDHC_Adma1DescriptorTypeTransfer =
         (kUSDHC_Adma1DescriptorActivity2Flag | kUSDHC_Adma1DescriptorValidFlag), /*!< Transfer data */
     kUSDHC_Adma1DescriptorTypeLink = (kUSDHC_Adma1DescriptorActivity1Flag | kUSDHC_Adma1DescriptorActivity2Flag |
@@ -476,8 +475,8 @@ enum _usdhc_adma1_descriptor_flag
 /*! @brief ADMA1 descriptor control and status mask */
 enum _usdhc_adma2_descriptor_flag
 {
-    kUSDHC_Adma2DescriptorValidFlag = (1U << 0U),     /*!< Valid flag */
-    kUSDHC_Adma2DescriptorEndFlag = (1U << 1U),       /*!< End flag */
+    kUSDHC_Adma2DescriptorValidFlag     = (1U << 0U), /*!< Valid flag */
+    kUSDHC_Adma2DescriptorEndFlag       = (1U << 1U), /*!< End flag */
     kUSDHC_Adma2DescriptorInterruptFlag = (1U << 2U), /*!< Interrupt flag */
     kUSDHC_Adma2DescriptorActivity1Flag = (1U << 4U), /*!< Activity 1 mask */
     kUSDHC_Adma2DescriptorActivity2Flag = (1U << 5U), /*!< Activity 2 mask */
@@ -506,17 +505,17 @@ enum _usdhc_adma_flag
 /*! @brief dma transfer burst len config. */
 typedef enum _usdhc_burst_len
 {
-    kUSDHC_EnBurstLenForINCR = 0x01U,         /*!< enable burst len for INCR */
-    kUSDHC_EnBurstLenForINCR4816 = 0x02U,     /*!< enable burst len for INCR4/INCR8/INCR16 */
+    kUSDHC_EnBurstLenForINCR         = 0x01U, /*!< enable burst len for INCR */
+    kUSDHC_EnBurstLenForINCR4816     = 0x02U, /*!< enable burst len for INCR4/INCR8/INCR16 */
     kUSDHC_EnBurstLenForINCR4816WRAP = 0x04U, /*!< enable burst len for INCR4/8/16 WRAP */
 } usdhc_burst_len_t;
 
 /*! @brief transfer data type definition. */
 enum _usdhc_transfer_data_type
 {
-    kUSDHC_TransferDataNormal = 0U,        /*!< transfer normal read/write data */
-    kUSDHC_TransferDataTuning = 1U,        /*!< transfer tuning data */
-    kUSDHC_TransferDataBoot = 2U,          /*!< transfer boot data */
+    kUSDHC_TransferDataNormal        = 0U, /*!< transfer normal read/write data */
+    kUSDHC_TransferDataTuning        = 1U, /*!< transfer tuning data */
+    kUSDHC_TransferDataBoot          = 2U, /*!< transfer boot data */
     kUSDHC_TransferDataBootcontinous = 3U, /*!< transfer boot data continous */
 };
 
@@ -680,669 +679,656 @@ typedef struct _usdhc_host
  * API
  ************************************************************************************************/
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @name Initialization and deinitialization
- * @{
- */
+    /*!
+     * @name Initialization and deinitialization
+     * @{
+     */
 
-/*!
- * @brief USDHC module initialization function.
- *
- * Configures the USDHC according to the user configuration.
- *
- * Example:
-   @code
-   usdhc_config_t config;
-   config.cardDetectDat3 = false;
-   config.endianMode = kUSDHC_EndianModeLittle;
-   config.dmaMode = kUSDHC_DmaModeAdma2;
-   config.readWatermarkLevel = 128U;
-   config.writeWatermarkLevel = 128U;
-   USDHC_Init(USDHC, &config);
-   @endcode
- *
- * @param base USDHC peripheral base address.
- * @param config USDHC configuration information.
- * @retval kStatus_Success Operate successfully.
- */
-void USDHC_Init(USDHC_Type *base, const usdhc_config_t *config);
+    /*!
+     * @brief USDHC module initialization function.
+     *
+     * Configures the USDHC according to the user configuration.
+     *
+     * Example:
+       @code
+       usdhc_config_t config;
+       config.cardDetectDat3 = false;
+       config.endianMode = kUSDHC_EndianModeLittle;
+       config.dmaMode = kUSDHC_DmaModeAdma2;
+       config.readWatermarkLevel = 128U;
+       config.writeWatermarkLevel = 128U;
+       USDHC_Init(USDHC, &config);
+       @endcode
+     *
+     * @param base USDHC peripheral base address.
+     * @param config USDHC configuration information.
+     * @retval kStatus_Success Operate successfully.
+     */
+    void USDHC_Init(USDHC_Type *base, const usdhc_config_t *config);
 
-/*!
- * @brief Deinitializes the USDHC.
- *
- * @param base USDHC peripheral base address.
- */
-void USDHC_Deinit(USDHC_Type *base);
+    /*!
+     * @brief Deinitializes the USDHC.
+     *
+     * @param base USDHC peripheral base address.
+     */
+    void USDHC_Deinit(USDHC_Type *base);
 
-/*!
- * @brief Resets the USDHC.
- *
- * @param base USDHC peripheral base address.
- * @param mask The reset type mask(_usdhc_reset).
- * @param timeout Timeout for reset.
- * @retval true Reset successfully.
- * @retval false Reset failed.
- */
-bool USDHC_Reset(USDHC_Type *base, uint32_t mask, uint32_t timeout);
+    /*!
+     * @brief Resets the USDHC.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask The reset type mask(_usdhc_reset).
+     * @param timeout Timeout for reset.
+     * @retval true Reset successfully.
+     * @retval false Reset failed.
+     */
+    bool USDHC_Reset(USDHC_Type *base, uint32_t mask, uint32_t timeout);
 
-/* @} */
+    /* @} */
 
-/*!
- * @name DMA Control
- * @{
- */
+    /*!
+     * @name DMA Control
+     * @{
+     */
 
-/*!
- * @brief Sets the DMA descriptor table configuration.
- * A high level DMA descriptor configuration function.
- * @param base USDHC peripheral base address.
- * @param adma configuration
- * @param data Data descriptor
- * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
- *  reference _usdhc_adma_flag
- * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_SetAdmaTableConfig(USDHC_Type *base,
-                                  usdhc_adma_config_t *dmaConfig,
-                                  usdhc_data_t *dataConfig,
-                                  uint32_t flags);
+    /*!
+     * @brief Sets the DMA descriptor table configuration.
+     * A high level DMA descriptor configuration function.
+     * @param base USDHC peripheral base address.
+     * @param adma configuration
+     * @param data Data descriptor
+     * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
+     *  reference _usdhc_adma_flag
+     * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_SetAdmaTableConfig(USDHC_Type *base,
+                                      usdhc_adma_config_t *dmaConfig,
+                                      usdhc_data_t *dataConfig,
+                                      uint32_t flags);
 
-/*!
- * @brief Internal DMA configuration.
- * This function is used to config the USDHC DMA related registers.
- * @param base USDHC peripheral base address.
- * @param adma configuration
- * @param dataAddr tranfer data address, a simple DMA parameter, if ADMA is used, leave it to NULL.
- * @param enAutoCmd23 flag to indicate Auto CMD23 is enable or not, a simple DMA parameter,if ADMA is used, leave it to
- * false.
- * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_SetInternalDmaConfig(USDHC_Type *base,
-                                    usdhc_adma_config_t *dmaConfig,
-                                    const uint32_t *dataAddr,
-                                    bool enAutoCmd23);
+    /*!
+     * @brief Internal DMA configuration.
+     * This function is used to config the USDHC DMA related registers.
+     * @param base USDHC peripheral base address.
+     * @param adma configuration
+     * @param dataAddr tranfer data address, a simple DMA parameter, if ADMA is used, leave it to NULL.
+     * @param enAutoCmd23 flag to indicate Auto CMD23 is enable or not, a simple DMA parameter,if ADMA is used, leave it
+     * to false.
+     * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_SetInternalDmaConfig(USDHC_Type *base,
+                                        usdhc_adma_config_t *dmaConfig,
+                                        const uint32_t *dataAddr,
+                                        bool enAutoCmd23);
 
-/*!
- * @brief Sets the ADMA2 descriptor table configuration.
- *
- * @param admaTable Adma table address.
- * @param admaTableWords Adma table length.
- * @param dataBufferAddr Data buffer address.
- * @param dataBytes Data Data length.
- * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
- *  reference _usdhc_adma_flag.
- * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_SetADMA2Descriptor(
-    uint32_t *admaTable, uint32_t admaTableWords, const uint32_t *dataBufferAddr, uint32_t dataBytes, uint32_t flags);
+    /*!
+     * @brief Sets the ADMA2 descriptor table configuration.
+     *
+     * @param admaTable Adma table address.
+     * @param admaTableWords Adma table length.
+     * @param dataBufferAddr Data buffer address.
+     * @param dataBytes Data Data length.
+     * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
+     *  reference _usdhc_adma_flag.
+     * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_SetADMA2Descriptor(uint32_t *admaTable,
+                                      uint32_t admaTableWords,
+                                      const uint32_t *dataBufferAddr,
+                                      uint32_t dataBytes,
+                                      uint32_t flags);
 
-/*!
- * @brief Sets the ADMA1 descriptor table configuration.
- *
- * @param admaTable Adma table address.
- * @param admaTableWords Adma table length.
- * @param dataBufferAddr Data buffer address.
- * @param dataBytes Data length.
- * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
- *  reference _usdhc_adma_flag.
- * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_SetADMA1Descriptor(
-    uint32_t *admaTable, uint32_t admaTableWords, const uint32_t *dataBufferAddr, uint32_t dataBytes, uint32_t flags);
+    /*!
+     * @brief Sets the ADMA1 descriptor table configuration.
+     *
+     * @param admaTable Adma table address.
+     * @param admaTableWords Adma table length.
+     * @param dataBufferAddr Data buffer address.
+     * @param dataBytes Data length.
+     * @param flags ADAM descriptor flag, used to indicate to create multiple or single descriptor, please
+     *  reference _usdhc_adma_flag.
+     * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_SetADMA1Descriptor(uint32_t *admaTable,
+                                      uint32_t admaTableWords,
+                                      const uint32_t *dataBufferAddr,
+                                      uint32_t dataBytes,
+                                      uint32_t flags);
 
-/*!
- * @brief enable internal DMA.
- *
- * @param base USDHC peripheral base address.
- * @param enable enable or disable flag
- */
-static inline void USDHC_EnableInternalDMA(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief enable internal DMA.
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable enable or disable flag
+     */
+    static inline void USDHC_EnableInternalDMA(USDHC_Type *base, bool enable)
     {
-        base->MIX_CTRL |= USDHC_MIX_CTRL_DMAEN_MASK;
+        if (enable) {
+            base->MIX_CTRL |= USDHC_MIX_CTRL_DMAEN_MASK;
+        }
+        else {
+            base->MIX_CTRL &= ~USDHC_MIX_CTRL_DMAEN_MASK;
+            base->PROT_CTRL &= ~USDHC_PROT_CTRL_DMASEL_MASK;
+        }
     }
-    else
+
+    /* @} */
+
+    /*!
+     * @name Interrupts
+     * @{
+     */
+
+    /*!
+     * @brief Enables the interrupt status.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask Interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline void USDHC_EnableInterruptStatus(USDHC_Type *base, uint32_t mask)
     {
-        base->MIX_CTRL &= ~USDHC_MIX_CTRL_DMAEN_MASK;
-        base->PROT_CTRL &= ~USDHC_PROT_CTRL_DMASEL_MASK;
+        base->INT_STATUS_EN |= mask;
     }
-}
 
-/* @} */
-
-/*!
- * @name Interrupts
- * @{
- */
-
-/*!
- * @brief Enables the interrupt status.
- *
- * @param base USDHC peripheral base address.
- * @param mask Interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline void USDHC_EnableInterruptStatus(USDHC_Type *base, uint32_t mask)
-{
-    base->INT_STATUS_EN |= mask;
-}
-
-/*!
- * @brief Disables the interrupt status.
- *
- * @param base USDHC peripheral base address.
- * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline void USDHC_DisableInterruptStatus(USDHC_Type *base, uint32_t mask)
-{
-    base->INT_STATUS_EN &= ~mask;
-}
-
-/*!
- * @brief Enables the interrupt signal corresponding to the interrupt status flag.
- *
- * @param base USDHC peripheral base address.
- * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline void USDHC_EnableInterruptSignal(USDHC_Type *base, uint32_t mask)
-{
-    base->INT_SIGNAL_EN |= mask;
-}
-
-/*!
- * @brief Disables the interrupt signal corresponding to the interrupt status flag.
- *
- * @param base USDHC peripheral base address.
- * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline void USDHC_DisableInterruptSignal(USDHC_Type *base, uint32_t mask)
-{
-    base->INT_SIGNAL_EN &= ~mask;
-}
-
-/* @} */
-
-/*!
- * @name Status
- * @{
- */
-
-/*!
- * @brief Gets the current interrupt status.
- *
- * @param base USDHC peripheral base address.
- * @return Current interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline uint32_t USDHC_GetInterruptStatusFlags(USDHC_Type *base)
-{
-    return base->INT_STATUS;
-}
-
-/*!
- * @brief Clears a specified interrupt status.
- * write 1 clears
- * @param base USDHC peripheral base address.
- * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
- */
-static inline void USDHC_ClearInterruptStatusFlags(USDHC_Type *base, uint32_t mask)
-{
-    base->INT_STATUS = mask;
-}
-
-/*!
- * @brief Gets the status of auto command 12 error.
- *
- * @param base USDHC peripheral base address.
- * @return Auto command 12 error status flags mask(_usdhc_auto_command12_error_status_flag).
- */
-static inline uint32_t USDHC_GetAutoCommand12ErrorStatusFlags(USDHC_Type *base)
-{
-    return base->AUTOCMD12_ERR_STATUS;
-}
-
-/*!
- * @brief Gets the status of the ADMA error.
- *
- * @param base USDHC peripheral base address.
- * @return ADMA error status flags mask(_usdhc_adma_error_status_flag).
- */
-static inline uint32_t USDHC_GetAdmaErrorStatusFlags(USDHC_Type *base)
-{
-    return base->ADMA_ERR_STATUS & 0xFU;
-}
-
-/*!
- * @brief Gets a present status.
- *
- * This function gets the present USDHC's status except for an interrupt status and an error status.
- *
- * @param base USDHC peripheral base address.
- * @return Present USDHC's status flags mask(_usdhc_present_status_flag).
- */
-static inline uint32_t USDHC_GetPresentStatusFlags(USDHC_Type *base)
-{
-    return base->PRES_STATE;
-}
-
-/* @} */
-
-/*!
- * @name Bus Operations
- * @{
- */
-
-/*!
- * @brief Gets the capability information.
- *
- * @param base USDHC peripheral base address.
- * @param capability Structure to save capability information.
- */
-void USDHC_GetCapability(USDHC_Type *base, usdhc_capability_t *capability);
-
-/*!
- * @brief force the card clock on.
- *
- * @param base USDHC peripheral base address.
- * @param enable/disable flag.
- */
-static inline void USDHC_ForceClockOn(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Disables the interrupt status.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline void USDHC_DisableInterruptStatus(USDHC_Type *base, uint32_t mask)
     {
-        base->VEND_SPEC |= USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK;
+        base->INT_STATUS_EN &= ~mask;
     }
-    else
+
+    /*!
+     * @brief Enables the interrupt signal corresponding to the interrupt status flag.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline void USDHC_EnableInterruptSignal(USDHC_Type *base, uint32_t mask)
     {
-        base->VEND_SPEC &= ~USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK;
+        base->INT_SIGNAL_EN |= mask;
     }
-}
 
-/*!
- * @brief Sets the SD bus clock frequency.
- *
- * @param base USDHC peripheral base address.
- * @param srcClock_Hz USDHC source clock frequency united in Hz.
- * @param busClock_Hz SD bus clock frequency united in Hz.
- *
- * @return The nearest frequency of busClock_Hz configured to SD bus.
- */
-uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz);
-
-/*!
- * @brief Sends 80 clocks to the card to set it to the active state.
- *
- * This function must be called each time the card is inserted to ensure that the card can receive the command
- * correctly.
- *
- * @param base USDHC peripheral base address.
- * @param timeout Timeout to initialize card.
- * @retval true Set card active successfully.
- * @retval false Set card active failed.
- */
-bool USDHC_SetCardActive(USDHC_Type *base, uint32_t timeout);
-
-/*!
- * @brief trigger a hardware reset.
- *
- * @param base USDHC peripheral base address.
- * @param 1 or 0 level
- */
-static inline void USDHC_AssertHardwareReset(USDHC_Type *base, bool high)
-{
-    if (high)
+    /*!
+     * @brief Disables the interrupt signal corresponding to the interrupt status flag.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline void USDHC_DisableInterruptSignal(USDHC_Type *base, uint32_t mask)
     {
-        base->SYS_CTRL |= USDHC_SYS_CTRL_IPP_RST_N_MASK;
+        base->INT_SIGNAL_EN &= ~mask;
     }
-    else
+
+    /* @} */
+
+    /*!
+     * @name Status
+     * @{
+     */
+
+    /*!
+     * @brief Gets the current interrupt status.
+     *
+     * @param base USDHC peripheral base address.
+     * @return Current interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline uint32_t USDHC_GetInterruptStatusFlags(USDHC_Type *base)
     {
-        base->SYS_CTRL &= ~USDHC_SYS_CTRL_IPP_RST_N_MASK;
+        return base->INT_STATUS;
     }
-}
 
-/*!
- * @brief Sets the data transfer width.
- *
- * @param base USDHC peripheral base address.
- * @param width Data transfer width.
- */
-static inline void USDHC_SetDataBusWidth(USDHC_Type *base, usdhc_data_bus_width_t width)
-{
-    base->PROT_CTRL = ((base->PROT_CTRL & ~USDHC_PROT_CTRL_DTW_MASK) | USDHC_PROT_CTRL_DTW(width));
-}
-
-/*!
- * @brief Fills the data port.
- *
- * This function is used to implement the data transfer by Data Port instead of DMA.
- *
- * @param base USDHC peripheral base address.
- * @param data The data about to be sent.
- */
-static inline void USDHC_WriteData(USDHC_Type *base, uint32_t data)
-{
-    base->DATA_BUFF_ACC_PORT = data;
-}
-
-/*!
- * @brief Retrieves the data from the data port.
- *
- * This function is used to implement the data transfer by Data Port instead of DMA.
- *
- * @param base USDHC peripheral base address.
- * @return The data has been read.
- */
-static inline uint32_t USDHC_ReadData(USDHC_Type *base)
-{
-    return base->DATA_BUFF_ACC_PORT;
-}
-
-/*!
-* @brief send command function
-*
-* @param base USDHC peripheral base address.
-* @param command configuration
-*/
-void USDHC_SendCommand(USDHC_Type *base, usdhc_command_t *command);
-
-/*!
- * @brief Enables or disables a wakeup event in low-power mode.
- *
- * @param base USDHC peripheral base address.
- * @param mask Wakeup events mask(_usdhc_wakeup_event).
- * @param enable True to enable, false to disable.
- */
-static inline void USDHC_EnableWakeupEvent(USDHC_Type *base, uint32_t mask, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Clears a specified interrupt status.
+     * write 1 clears
+     * @param base USDHC peripheral base address.
+     * @param mask The interrupt status flags mask(_usdhc_interrupt_status_flag).
+     */
+    static inline void USDHC_ClearInterruptStatusFlags(USDHC_Type *base, uint32_t mask)
     {
-        base->PROT_CTRL |= mask;
+        base->INT_STATUS = mask;
     }
-    else
-    {
-        base->PROT_CTRL &= ~mask;
-    }
-}
 
-/*!
- * @brief detect card insert status.
- *
- * @param base USDHC peripheral base address.
- * @param enable/disable flag
- */
-static inline void USDHC_CardDetectByData3(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Gets the status of auto command 12 error.
+     *
+     * @param base USDHC peripheral base address.
+     * @return Auto command 12 error status flags mask(_usdhc_auto_command12_error_status_flag).
+     */
+    static inline uint32_t USDHC_GetAutoCommand12ErrorStatusFlags(USDHC_Type *base)
     {
-        base->PROT_CTRL |= USDHC_PROT_CTRL_D3CD_MASK;
+        return base->AUTOCMD12_ERR_STATUS;
     }
-    else
-    {
-        base->PROT_CTRL &= ~USDHC_PROT_CTRL_D3CD_MASK;
-    }
-}
 
-/*!
- * @brief detect card insert status.
- *
- * @param base USDHC peripheral base address.
- */
-static inline bool USDHC_DetectCardInsert(USDHC_Type *base)
-{
-    return (base->PRES_STATE & kUSDHC_CardInsertedFlag) ? true : false;
-}
+    /*!
+     * @brief Gets the status of the ADMA error.
+     *
+     * @param base USDHC peripheral base address.
+     * @return ADMA error status flags mask(_usdhc_adma_error_status_flag).
+     */
+    static inline uint32_t USDHC_GetAdmaErrorStatusFlags(USDHC_Type *base)
+    {
+        return base->ADMA_ERR_STATUS & 0xFU;
+    }
 
-/*!
- * @brief Enables or disables the SDIO card control.
- *
- * @param base USDHC peripheral base address.
- * @param mask SDIO card control flags mask(_usdhc_sdio_control_flag).
- * @param enable True to enable, false to disable.
- */
-static inline void USDHC_EnableSdioControl(USDHC_Type *base, uint32_t mask, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief Gets a present status.
+     *
+     * This function gets the present USDHC's status except for an interrupt status and an error status.
+     *
+     * @param base USDHC peripheral base address.
+     * @return Present USDHC's status flags mask(_usdhc_present_status_flag).
+     */
+    static inline uint32_t USDHC_GetPresentStatusFlags(USDHC_Type *base)
     {
-        base->PROT_CTRL |= mask;
+        return base->PRES_STATE;
     }
-    else
-    {
-        base->PROT_CTRL &= ~mask;
-    }
-}
 
-/*!
- * @brief Restarts a transaction which has stopped at the block GAP for the SDIO card.
- *
- * @param base USDHC peripheral base address.
- */
-static inline void USDHC_SetContinueRequest(USDHC_Type *base)
-{
-    base->PROT_CTRL |= USDHC_PROT_CTRL_CREQ_MASK;
-}
+    /* @} */
 
-/*!
- * @brief Request stop at block gap function.
- *
- * @param base USDHC peripheral base address.
- * @param enable true to stop at block gap, false to normal transfer
- */
-static inline void USDHC_RequestStopAtBlockGap(USDHC_Type *base, bool enable)
-{
-    if (enable)
-    {
-        base->PROT_CTRL |= USDHC_PROT_CTRL_SABGREQ_MASK;
-    }
-    else
-    {
-        base->PROT_CTRL &= ~USDHC_PROT_CTRL_SABGREQ_MASK;
-    }
-}
+    /*!
+     * @name Bus Operations
+     * @{
+     */
 
-/*!
- * @brief Configures the MMC boot feature.
- *
- * Example:
-   @code
-   usdhc_boot_config_t config;
-   config.ackTimeoutCount = 4;
-   config.bootMode = kUSDHC_BootModeNormal;
-   config.blockCount = 5;
-   config.enableBootAck = true;
-   config.enableBoot = true;
-   config.enableAutoStopAtBlockGap = true;
-   USDHC_SetMmcBootConfig(USDHC, &config);
-   @endcode
- *
- * @param base USDHC peripheral base address.
- * @param config The MMC boot configuration information.
- */
-void USDHC_SetMmcBootConfig(USDHC_Type *base, const usdhc_boot_config_t *config);
+    /*!
+     * @brief Gets the capability information.
+     *
+     * @param base USDHC peripheral base address.
+     * @param capability Structure to save capability information.
+     */
+    void USDHC_GetCapability(USDHC_Type *base, usdhc_capability_t *capability);
 
-/*!
- * @brief Enables or disables the mmc boot mode.
- *
- * @param base USDHC peripheral base address.
- * @param enable True to enable, false to disable.
- */
-static inline void USDHC_EnableMmcBoot(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief force the card clock on.
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable/disable flag.
+     */
+    static inline void USDHC_ForceClockOn(USDHC_Type *base, bool enable)
     {
-        base->MMC_BOOT |= USDHC_MMC_BOOT_BOOT_EN_MASK;
+        if (enable) {
+            base->VEND_SPEC |= USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK;
+        }
+        else {
+            base->VEND_SPEC &= ~USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK;
+        }
     }
-    else
-    {
-        base->MMC_BOOT &= ~USDHC_MMC_BOOT_BOOT_EN_MASK;
-    }
-}
 
-/*!
- * @brief Forces generating events according to the given mask.
- *
- * @param base USDHC peripheral base address.
- * @param mask The force events mask(_usdhc_force_event).
- */
-static inline void USDHC_SetForceEvent(USDHC_Type *base, uint32_t mask)
-{
-    base->FORCE_EVENT = mask;
-}
+    /*!
+     * @brief Sets the SD bus clock frequency.
+     *
+     * @param base USDHC peripheral base address.
+     * @param srcClock_Hz USDHC source clock frequency united in Hz.
+     * @param busClock_Hz SD bus clock frequency united in Hz.
+     *
+     * @return The nearest frequency of busClock_Hz configured to SD bus.
+     */
+    uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz);
 
-/*!
- * @brief select the usdhc output voltage
- *
- * @param base USDHC peripheral base address.
- * @param true 1.8V, false 3.0V
- */
-static inline void UDSHC_SelectVoltage(USDHC_Type *base, bool en18v)
-{
-    if (en18v)
+    /*!
+     * @brief Sends 80 clocks to the card to set it to the active state.
+     *
+     * This function must be called each time the card is inserted to ensure that the card can receive the command
+     * correctly.
+     *
+     * @param base USDHC peripheral base address.
+     * @param timeout Timeout to initialize card.
+     * @retval true Set card active successfully.
+     * @retval false Set card active failed.
+     */
+    bool USDHC_SetCardActive(USDHC_Type *base, uint32_t timeout);
+
+    /*!
+     * @brief trigger a hardware reset.
+     *
+     * @param base USDHC peripheral base address.
+     * @param 1 or 0 level
+     */
+    static inline void USDHC_AssertHardwareReset(USDHC_Type *base, bool high)
     {
-        base->VEND_SPEC |= USDHC_VEND_SPEC_VSELECT_MASK;
+        if (high) {
+            base->SYS_CTRL |= USDHC_SYS_CTRL_IPP_RST_N_MASK;
+        }
+        else {
+            base->SYS_CTRL &= ~USDHC_SYS_CTRL_IPP_RST_N_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief Sets the data transfer width.
+     *
+     * @param base USDHC peripheral base address.
+     * @param width Data transfer width.
+     */
+    static inline void USDHC_SetDataBusWidth(USDHC_Type *base, usdhc_data_bus_width_t width)
     {
-        base->VEND_SPEC &= ~USDHC_VEND_SPEC_VSELECT_MASK;
+        base->PROT_CTRL = ((base->PROT_CTRL & ~USDHC_PROT_CTRL_DTW_MASK) | USDHC_PROT_CTRL_DTW(width));
+    }
+
+    /*!
+     * @brief Fills the data port.
+     *
+     * This function is used to implement the data transfer by Data Port instead of DMA.
+     *
+     * @param base USDHC peripheral base address.
+     * @param data The data about to be sent.
+     */
+    static inline void USDHC_WriteData(USDHC_Type *base, uint32_t data)
+    {
+        base->DATA_BUFF_ACC_PORT = data;
+    }
+
+    /*!
+     * @brief Retrieves the data from the data port.
+     *
+     * This function is used to implement the data transfer by Data Port instead of DMA.
+     *
+     * @param base USDHC peripheral base address.
+     * @return The data has been read.
+     */
+    static inline uint32_t USDHC_ReadData(USDHC_Type *base)
+    {
+        return base->DATA_BUFF_ACC_PORT;
+    }
+
+    /*!
+     * @brief send command function
+     *
+     * @param base USDHC peripheral base address.
+     * @param command configuration
+     */
+    void USDHC_SendCommand(USDHC_Type *base, usdhc_command_t *command);
+
+    /*!
+     * @brief Enables or disables a wakeup event in low-power mode.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask Wakeup events mask(_usdhc_wakeup_event).
+     * @param enable True to enable, false to disable.
+     */
+    static inline void USDHC_EnableWakeupEvent(USDHC_Type *base, uint32_t mask, bool enable)
+    {
+        if (enable) {
+            base->PROT_CTRL |= mask;
+        }
+        else {
+            base->PROT_CTRL &= ~mask;
+        }
+    }
+
+    /*!
+     * @brief detect card insert status.
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable/disable flag
+     */
+    static inline void USDHC_CardDetectByData3(USDHC_Type *base, bool enable)
+    {
+        if (enable) {
+            base->PROT_CTRL |= USDHC_PROT_CTRL_D3CD_MASK;
+        }
+        else {
+            base->PROT_CTRL &= ~USDHC_PROT_CTRL_D3CD_MASK;
+        }
+    }
+
+    /*!
+     * @brief detect card insert status.
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline bool USDHC_DetectCardInsert(USDHC_Type *base)
+    {
+        return (base->PRES_STATE & kUSDHC_CardInsertedFlag) ? true : false;
+    }
+
+    /*!
+     * @brief Enables or disables the SDIO card control.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask SDIO card control flags mask(_usdhc_sdio_control_flag).
+     * @param enable True to enable, false to disable.
+     */
+    static inline void USDHC_EnableSdioControl(USDHC_Type *base, uint32_t mask, bool enable)
+    {
+        if (enable) {
+            base->PROT_CTRL |= mask;
+        }
+        else {
+            base->PROT_CTRL &= ~mask;
+        }
+    }
+
+    /*!
+     * @brief Restarts a transaction which has stopped at the block GAP for the SDIO card.
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline void USDHC_SetContinueRequest(USDHC_Type *base)
+    {
+        base->PROT_CTRL |= USDHC_PROT_CTRL_CREQ_MASK;
+    }
+
+    /*!
+     * @brief Request stop at block gap function.
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable true to stop at block gap, false to normal transfer
+     */
+    static inline void USDHC_RequestStopAtBlockGap(USDHC_Type *base, bool enable)
+    {
+        if (enable) {
+            base->PROT_CTRL |= USDHC_PROT_CTRL_SABGREQ_MASK;
+        }
+        else {
+            base->PROT_CTRL &= ~USDHC_PROT_CTRL_SABGREQ_MASK;
+        }
+    }
+
+    /*!
+     * @brief Configures the MMC boot feature.
+     *
+     * Example:
+       @code
+       usdhc_boot_config_t config;
+       config.ackTimeoutCount = 4;
+       config.bootMode = kUSDHC_BootModeNormal;
+       config.blockCount = 5;
+       config.enableBootAck = true;
+       config.enableBoot = true;
+       config.enableAutoStopAtBlockGap = true;
+       USDHC_SetMmcBootConfig(USDHC, &config);
+       @endcode
+     *
+     * @param base USDHC peripheral base address.
+     * @param config The MMC boot configuration information.
+     */
+    void USDHC_SetMmcBootConfig(USDHC_Type *base, const usdhc_boot_config_t *config);
+
+    /*!
+     * @brief Enables or disables the mmc boot mode.
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable True to enable, false to disable.
+     */
+    static inline void USDHC_EnableMmcBoot(USDHC_Type *base, bool enable)
+    {
+        if (enable) {
+            base->MMC_BOOT |= USDHC_MMC_BOOT_BOOT_EN_MASK;
+        }
+        else {
+            base->MMC_BOOT &= ~USDHC_MMC_BOOT_BOOT_EN_MASK;
+        }
+    }
+
+    /*!
+     * @brief Forces generating events according to the given mask.
+     *
+     * @param base USDHC peripheral base address.
+     * @param mask The force events mask(_usdhc_force_event).
+     */
+    static inline void USDHC_SetForceEvent(USDHC_Type *base, uint32_t mask)
+    {
+        base->FORCE_EVENT = mask;
+    }
+
+    /*!
+     * @brief select the usdhc output voltage
+     *
+     * @param base USDHC peripheral base address.
+     * @param true 1.8V, false 3.0V
+     */
+    static inline void UDSHC_SelectVoltage(USDHC_Type *base, bool en18v)
+    {
+        if (en18v) {
+            base->VEND_SPEC |= USDHC_VEND_SPEC_VSELECT_MASK;
+        }
+        else {
+            base->VEND_SPEC &= ~USDHC_VEND_SPEC_VSELECT_MASK;
+        }
     }
-}
 
 #if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (FSL_FEATURE_USDHC_HAS_SDR50_MODE)
-/*!
-* @brief check the SDR50 mode request tuning bit
-* When this bit set, user should call USDHC_StandardTuning function
-* @param base USDHC peripheral base address.
-*/
-static inline bool USDHC_RequestTuningForSDR50(USDHC_Type *base)
-{
-    return base->HOST_CTRL_CAP & USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK ? true : false;
-}
-
-/*!
- * @brief check the request re-tuning bit
- * When this bit is set, user should do manual tuning or standard tuning function
- * @param base USDHC peripheral base address.
- */
-static inline bool USDHC_RequestReTuning(USDHC_Type *base)
-{
-    return base->PRES_STATE & USDHC_PRES_STATE_RTR_MASK ? true : false;
-}
-
-/*!
- * @brief the SDR104 mode auto tuning enable and disable
- * This function should call after tuning function execute pass, auto tuning will handle
- * by hardware
- * @param base USDHC peripheral base address.
- * @param enable/disable flag
- */
-static inline void USDHC_EnableAutoTuning(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief check the SDR50 mode request tuning bit
+     * When this bit set, user should call USDHC_StandardTuning function
+     * @param base USDHC peripheral base address.
+     */
+    static inline bool USDHC_RequestTuningForSDR50(USDHC_Type *base)
     {
-        base->MIX_CTRL |= USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK;
+        return base->HOST_CTRL_CAP & USDHC_HOST_CTRL_CAP_USE_TUNING_SDR50_MASK ? true : false;
     }
-    else
+
+    /*!
+     * @brief check the request re-tuning bit
+     * When this bit is set, user should do manual tuning or standard tuning function
+     * @param base USDHC peripheral base address.
+     */
+    static inline bool USDHC_RequestReTuning(USDHC_Type *base)
     {
-        base->MIX_CTRL &= ~USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK;
+        return base->PRES_STATE & USDHC_PRES_STATE_RTR_MASK ? true : false;
     }
-}
 
-/*!
- * @brief the config the re-tuning timer for mode 1 and mode 3
- * This timer is used for standard tuning auto re-tuning,
- * @param base USDHC peripheral base address.
- * @param timer counter value
- */
-static inline void USDHC_SetRetuningTimer(USDHC_Type *base, uint32_t counter)
-{
-    base->HOST_CTRL_CAP &= ~USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK;
-    base->HOST_CTRL_CAP |= USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(counter);
-}
+    /*!
+     * @brief the SDR104 mode auto tuning enable and disable
+     * This function should call after tuning function execute pass, auto tuning will handle
+     * by hardware
+     * @param base USDHC peripheral base address.
+     * @param enable/disable flag
+     */
+    static inline void USDHC_EnableAutoTuning(USDHC_Type *base, bool enable)
+    {
+        if (enable) {
+            base->MIX_CTRL |= USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK;
+        }
+        else {
+            base->MIX_CTRL &= ~USDHC_MIX_CTRL_AUTO_TUNE_EN_MASK;
+        }
+    }
 
-/*!
- * @brief the auto tuning enbale for CMD/DATA line
- *
- * @param base USDHC peripheral base address.
- */
-void USDHC_EnableAutoTuningForCmdAndData(USDHC_Type *base);
+    /*!
+     * @brief the config the re-tuning timer for mode 1 and mode 3
+     * This timer is used for standard tuning auto re-tuning,
+     * @param base USDHC peripheral base address.
+     * @param timer counter value
+     */
+    static inline void USDHC_SetRetuningTimer(USDHC_Type *base, uint32_t counter)
+    {
+        base->HOST_CTRL_CAP &= ~USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING_MASK;
+        base->HOST_CTRL_CAP |= USDHC_HOST_CTRL_CAP_TIME_COUNT_RETUNING(counter);
+    }
 
-/*!
- * @brief manual tuning trigger or abort
- * User should handle the tuning cmd and find the boundary of the delay
- * then calucate a average value which will be config to the CLK_TUNE_CTRL_STATUS
- * This function should called before USDHC_AdjustDelayforSDR104 function
- * @param base USDHC peripheral base address.
- * @param tuning enable flag
- */
-void USDHC_EnableManualTuning(USDHC_Type *base, bool enable);
+    /*!
+     * @brief the auto tuning enbale for CMD/DATA line
+     *
+     * @param base USDHC peripheral base address.
+     */
+    void USDHC_EnableAutoTuningForCmdAndData(USDHC_Type *base);
 
-/*!
- * @brief the SDR104 mode delay setting adjust
- * This function should called after USDHC_ManualTuningForSDR104
- * @param base USDHC peripheral base address.
- * @param delay setting configuration
- * @retval kStatus_Fail config the delay setting fail
- * @retval kStatus_Success config the delay setting success
- */
-status_t USDHC_AdjustDelayForManualTuning(USDHC_Type *base, uint32_t delay);
+    /*!
+     * @brief manual tuning trigger or abort
+     * User should handle the tuning cmd and find the boundary of the delay
+     * then calucate a average value which will be config to the CLK_TUNE_CTRL_STATUS
+     * This function should called before USDHC_AdjustDelayforSDR104 function
+     * @param base USDHC peripheral base address.
+     * @param tuning enable flag
+     */
+    void USDHC_EnableManualTuning(USDHC_Type *base, bool enable);
 
-/*!
- * @brief the enable standard tuning function
- * The standard tuning window and tuning counter use the default config
- * tuning cmd is send by the software, user need to check the tuning result
- * can be used for SDR50,SDR104,HS200 mode tuning
- * @param base USDHC peripheral base address.
- * @param tuning start tap
- * @param tuning step
- * @param enable/disable flag
- */
-void USDHC_EnableStandardTuning(USDHC_Type *base, uint32_t tuningStartTap, uint32_t step, bool enable);
+    /*!
+     * @brief the SDR104 mode delay setting adjust
+     * This function should called after USDHC_ManualTuningForSDR104
+     * @param base USDHC peripheral base address.
+     * @param delay setting configuration
+     * @retval kStatus_Fail config the delay setting fail
+     * @retval kStatus_Success config the delay setting success
+     */
+    status_t USDHC_AdjustDelayForManualTuning(USDHC_Type *base, uint32_t delay);
 
-/*!
- * @brief Get execute std tuning status
- *
- * @param base USDHC peripheral base address.
- */
-static inline uint32_t USDHC_GetExecuteStdTuningStatus(USDHC_Type *base)
-{
-    return (base->AUTOCMD12_ERR_STATUS & USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK);
-}
+    /*!
+     * @brief the enable standard tuning function
+     * The standard tuning window and tuning counter use the default config
+     * tuning cmd is send by the software, user need to check the tuning result
+     * can be used for SDR50,SDR104,HS200 mode tuning
+     * @param base USDHC peripheral base address.
+     * @param tuning start tap
+     * @param tuning step
+     * @param enable/disable flag
+     */
+    void USDHC_EnableStandardTuning(USDHC_Type *base, uint32_t tuningStartTap, uint32_t step, bool enable);
 
-/*!
- * @brief check std tuning result
- *
- * @param base USDHC peripheral base address.
- */
-static inline uint32_t USDHC_CheckStdTuningResult(USDHC_Type *base)
-{
-    return (base->AUTOCMD12_ERR_STATUS & USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK);
-}
+    /*!
+     * @brief Get execute std tuning status
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline uint32_t USDHC_GetExecuteStdTuningStatus(USDHC_Type *base)
+    {
+        return (base->AUTOCMD12_ERR_STATUS & USDHC_AUTOCMD12_ERR_STATUS_EXECUTE_TUNING_MASK);
+    }
 
-/*!
- * @brief check tuning error
- *
- * @param base USDHC peripheral base address.
- */
-static inline uint32_t USDHC_CheckTuningError(USDHC_Type *base)
-{
-    return (base->CLK_TUNE_CTRL_STATUS &
-            (USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK | USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK));
-}
+    /*!
+     * @brief check std tuning result
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline uint32_t USDHC_CheckStdTuningResult(USDHC_Type *base)
+    {
+        return (base->AUTOCMD12_ERR_STATUS & USDHC_AUTOCMD12_ERR_STATUS_SMP_CLK_SEL_MASK);
+    }
+
+    /*!
+     * @brief check tuning error
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline uint32_t USDHC_CheckTuningError(USDHC_Type *base)
+    {
+        return (base->CLK_TUNE_CTRL_STATUS &
+                (USDHC_CLK_TUNE_CTRL_STATUS_NXT_ERR_MASK | USDHC_CLK_TUNE_CTRL_STATUS_PRE_ERR_MASK));
+    }
 
 #endif
-/*!
- * @brief the enable/disable DDR mode
- *
- * @param base USDHC peripheral base address.
- * @param enable/disable flag
- * @param nibble position
- */
-void USDHC_EnableDDRMode(USDHC_Type *base, bool enable, uint32_t nibblePos);
+    /*!
+     * @brief the enable/disable DDR mode
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable/disable flag
+     * @param nibble position
+     */
+    void USDHC_EnableDDRMode(USDHC_Type *base, bool enable, uint32_t nibblePos);
 
 /*!
  * @brief the enable/disable HS400 mode
@@ -1351,151 +1337,146 @@ void USDHC_EnableDDRMode(USDHC_Type *base, bool enable, uint32_t nibblePos);
  * @param enable/disable flag
  */
 #if FSL_FEATURE_USDHC_HAS_HS400_MODE
-static inline void USDHC_EnableHS400Mode(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    static inline void USDHC_EnableHS400Mode(USDHC_Type *base, bool enable)
     {
-        base->MIX_CTRL |= USDHC_MIX_CTRL_HS400_MODE_MASK;
+        if (enable) {
+            base->MIX_CTRL |= USDHC_MIX_CTRL_HS400_MODE_MASK;
+        }
+        else {
+            base->MIX_CTRL &= ~USDHC_MIX_CTRL_HS400_MODE_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief reset the strobe DLL
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline void USDHC_ResetStrobeDLL(USDHC_Type *base)
     {
-        base->MIX_CTRL &= ~USDHC_MIX_CTRL_HS400_MODE_MASK;
+        base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_RESET_MASK;
     }
-}
 
-/*!
- * @brief reset the strobe DLL
- *
- * @param base USDHC peripheral base address.
- */
-static inline void USDHC_ResetStrobeDLL(USDHC_Type *base)
-{
-    base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_RESET_MASK;
-}
-
-/*!
- * @brief enable/disable the strobe DLL
- *
- * @param base USDHC peripheral base address.
- * @param enable/disable flag
- */
-static inline void USDHC_EnableStrobeDLL(USDHC_Type *base, bool enable)
-{
-    if (enable)
+    /*!
+     * @brief enable/disable the strobe DLL
+     *
+     * @param base USDHC peripheral base address.
+     * @param enable/disable flag
+     */
+    static inline void USDHC_EnableStrobeDLL(USDHC_Type *base, bool enable)
     {
-        base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_ENABLE_MASK;
+        if (enable) {
+            base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_ENABLE_MASK;
+        }
+        else {
+            base->STROBE_DLL_CTRL &= ~USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_ENABLE_MASK;
+        }
     }
-    else
+
+    /*!
+     * @brief config the strobe DLL delay target and update interval
+     *
+     * @param base USDHC peripheral base address.
+     * @param delay target
+     * @param update interval
+     */
+    static inline void USDHC_ConfigStrobeDLL(USDHC_Type *base, uint32_t delayTarget, uint32_t updateInterval)
     {
-        base->STROBE_DLL_CTRL &= ~USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_ENABLE_MASK;
+        base->STROBE_DLL_CTRL &= (USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_UPDATE_INT_MASK |
+                                  USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_DLY_TARGET_MASK);
+
+        base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_UPDATE_INT(updateInterval) |
+                                 USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_DLY_TARGET(delayTarget);
     }
-}
 
-/*!
- * @brief config the strobe DLL delay target and update interval
- *
- * @param base USDHC peripheral base address.
- * @param delay target
- * @param update interval
- */
-static inline void USDHC_ConfigStrobeDLL(USDHC_Type *base, uint32_t delayTarget, uint32_t updateInterval)
-{
-    base->STROBE_DLL_CTRL &= (USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_UPDATE_INT_MASK |
-                              USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_DLY_TARGET_MASK);
-
-    base->STROBE_DLL_CTRL |= USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_UPDATE_INT(updateInterval) |
-                             USDHC_STROBE_DLL_CTRL_STROBE_DLL_CTRL_SLV_DLY_TARGET(delayTarget);
-}
-
-/*!
- * @brief get the strobe DLL status
- *
- * @param base USDHC peripheral base address.
- */
-static inline uint32_t USDHC_GetStrobeDLLStatus(USDHC_Type *base)
-{
-    return base->STROBE_DLL_STATUS;
-}
+    /*!
+     * @brief get the strobe DLL status
+     *
+     * @param base USDHC peripheral base address.
+     */
+    static inline uint32_t USDHC_GetStrobeDLLStatus(USDHC_Type *base)
+    {
+        return base->STROBE_DLL_STATUS;
+    }
 
 #endif
 
-/* @} */
+    /* @} */
 
-/*!
- * @name Transactional
- * @{
- */
+    /*!
+     * @name Transactional
+     * @{
+     */
 
-/*!
- * @brief Transfers the command/data using a blocking method.
- *
- * This function waits until the command response/data is received or the USDHC encounters an error by polling the
- * status
- * flag.
- * The application must not call this API in multiple threads at the same time. Because of that this API doesn't support
- * the re-entry mechanism.
- *
- * @note There is no need to call the API 'USDHC_TransferCreateHandle' when calling this API.
- *
- * @param base USDHC peripheral base address.
- * @param adma configuration
- * @param transfer Transfer content.
- * @retval kStatus_InvalidArgument Argument is invalid.
- * @retval kStatus_USDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
- * @retval kStatus_USDHC_SendCommandFailed Send command failed.
- * @retval kStatus_USDHC_TransferDataFailed Transfer data failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig, usdhc_transfer_t *transfer);
+    /*!
+     * @brief Transfers the command/data using a blocking method.
+     *
+     * This function waits until the command response/data is received or the USDHC encounters an error by polling the
+     * status
+     * flag.
+     * The application must not call this API in multiple threads at the same time. Because of that this API doesn't
+     * support the re-entry mechanism.
+     *
+     * @note There is no need to call the API 'USDHC_TransferCreateHandle' when calling this API.
+     *
+     * @param base USDHC peripheral base address.
+     * @param adma configuration
+     * @param transfer Transfer content.
+     * @retval kStatus_InvalidArgument Argument is invalid.
+     * @retval kStatus_USDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
+     * @retval kStatus_USDHC_SendCommandFailed Send command failed.
+     * @retval kStatus_USDHC_TransferDataFailed Transfer data failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig, usdhc_transfer_t *transfer);
 
-/*!
- * @brief Creates the USDHC handle.
- *
- * @param base USDHC peripheral base address.
- * @param handle USDHC handle pointer.
- * @param callback Structure pointer to contain all callback functions.
- * @param userData Callback function parameter.
- */
-void USDHC_TransferCreateHandle(USDHC_Type *base,
-                                usdhc_handle_t *handle,
-                                const usdhc_transfer_callback_t *callback,
-                                void *userData);
+    /*!
+     * @brief Creates the USDHC handle.
+     *
+     * @param base USDHC peripheral base address.
+     * @param handle USDHC handle pointer.
+     * @param callback Structure pointer to contain all callback functions.
+     * @param userData Callback function parameter.
+     */
+    void USDHC_TransferCreateHandle(USDHC_Type *base,
+                                    usdhc_handle_t *handle,
+                                    const usdhc_transfer_callback_t *callback,
+                                    void *userData);
 
-/*!
- * @brief Transfers the command/data using an interrupt and an asynchronous method.
- *
- * This function sends a command and data and returns immediately. It doesn't wait the transfer complete or encounter an
- * error.
- * The application must not call this API in multiple threads at the same time. Because of that this API doesn't support
- * the re-entry mechanism.
- *
- * @note Call the API 'USDHC_TransferCreateHandle' when calling this API.
- *
- * @param base USDHC peripheral base address.
- * @param handle USDHC handle.
- * @param adma configuration.
- * @param transfer Transfer content.
- * @retval kStatus_InvalidArgument Argument is invalid.
- * @retval kStatus_USDHC_BusyTransferring Busy transferring.
- * @retval kStatus_USDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
- * @retval kStatus_Success Operate successfully.
- */
-status_t USDHC_TransferNonBlocking(USDHC_Type *base,
-                                   usdhc_handle_t *handle,
-                                   usdhc_adma_config_t *dmaConfig,
-                                   usdhc_transfer_t *transfer);
+    /*!
+     * @brief Transfers the command/data using an interrupt and an asynchronous method.
+     *
+     * This function sends a command and data and returns immediately. It doesn't wait the transfer complete or
+     * encounter an error. The application must not call this API in multiple threads at the same time. Because of that
+     * this API doesn't support the re-entry mechanism.
+     *
+     * @note Call the API 'USDHC_TransferCreateHandle' when calling this API.
+     *
+     * @param base USDHC peripheral base address.
+     * @param handle USDHC handle.
+     * @param adma configuration.
+     * @param transfer Transfer content.
+     * @retval kStatus_InvalidArgument Argument is invalid.
+     * @retval kStatus_USDHC_BusyTransferring Busy transferring.
+     * @retval kStatus_USDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
+     * @retval kStatus_Success Operate successfully.
+     */
+    status_t USDHC_TransferNonBlocking(USDHC_Type *base,
+                                       usdhc_handle_t *handle,
+                                       usdhc_adma_config_t *dmaConfig,
+                                       usdhc_transfer_t *transfer);
 
-/*!
- * @brief IRQ handler for the USDHC.
- *
- * This function deals with the IRQs on the given host controller.
- *
- * @param base USDHC peripheral base address.
- * @param handle USDHC handle.
- */
-void USDHC_TransferHandleIRQ(USDHC_Type *base, usdhc_handle_t *handle);
+    /*!
+     * @brief IRQ handler for the USDHC.
+     *
+     * This function deals with the IRQs on the given host controller.
+     *
+     * @param base USDHC peripheral base address.
+     * @param handle USDHC handle.
+     */
+    void USDHC_TransferHandleIRQ(USDHC_Type *base, usdhc_handle_t *handle);
 
-/* @} */
+    /* @} */
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/irq/irq_gpio.cpp b/module-bsp/board/rt1051/common/irq/irq_gpio.cpp
index 4084988a5..8326db734 100644
--- a/module-bsp/board/rt1051/common/irq/irq_gpio.cpp
+++ b/module-bsp/board/rt1051/common/irq/irq_gpio.cpp
@@ -19,8 +19,7 @@
 #include "bsp/cellular/bsp_cellular.hpp"
 #include "bsp/keyboard/keyboard.hpp"
 
-#if 0 //TODO:M.P implement the rest of BSP drivers
-
+#if 0 // TODO:M.P implement the rest of BSP drivers
 
 #include "bsp_jackdet.h"
 #include "bsp_cellular.h"
@@ -31,53 +30,54 @@
 
 #endif
 
-namespace bsp {
+namespace bsp
+{
 
+    void irq_gpio_Init(void)
+    {
+        DisableIRQ(GPIO2_Combined_0_15_IRQn);
+        DisableIRQ(GPIO2_Combined_16_31_IRQn);
+        DisableIRQ(GPIO3_Combined_16_31_IRQn);
 
-        void irq_gpio_Init(void) {
-            DisableIRQ(GPIO2_Combined_0_15_IRQn);
-            DisableIRQ(GPIO2_Combined_16_31_IRQn);
-            DisableIRQ(GPIO3_Combined_16_31_IRQn);
+        GPIO_PortDisableInterrupts(GPIO2, UINT32_MAX);
+        GPIO_PortDisableInterrupts(GPIO3, UINT32_MAX);
 
-            GPIO_PortDisableInterrupts(GPIO2, UINT32_MAX);
-            GPIO_PortDisableInterrupts(GPIO3, UINT32_MAX);
+        // Clear all IRQs
+        GPIO_PortClearInterruptFlags(GPIO2, UINT32_MAX);
+        GPIO_PortClearInterruptFlags(GPIO3, UINT32_MAX);
 
-            // Clear all IRQs
-            GPIO_PortClearInterruptFlags(GPIO2, UINT32_MAX);
-            GPIO_PortClearInterruptFlags(GPIO3, UINT32_MAX);
+        EnableIRQ(GPIO2_Combined_0_15_IRQn);
+        NVIC_SetPriority(GPIO2_Combined_0_15_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
 
-            EnableIRQ(GPIO2_Combined_0_15_IRQn);
-            NVIC_SetPriority(GPIO2_Combined_0_15_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
+        EnableIRQ(GPIO2_Combined_16_31_IRQn);
+        NVIC_SetPriority(GPIO2_Combined_16_31_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
 
-            EnableIRQ(GPIO2_Combined_16_31_IRQn);
-            NVIC_SetPriority(GPIO2_Combined_16_31_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
+        EnableIRQ(GPIO3_Combined_16_31_IRQn);
+        NVIC_SetPriority(GPIO3_Combined_16_31_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
+    }
 
-            EnableIRQ(GPIO3_Combined_16_31_IRQn);
-            NVIC_SetPriority(GPIO3_Combined_16_31_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
-        }
+    extern "C"
+    {
 
-
-        extern "C"
+        void GPIO2_Combined_0_15_IRQHandler(void)
         {
-
-        void GPIO2_Combined_0_15_IRQHandler(void) {
             BaseType_t xHigherPriorityTaskWoken = 0;
-            uint32_t irq_mask = GPIO_GetPinsInterruptFlags(GPIO2);
+            uint32_t irq_mask                   = GPIO_GetPinsInterruptFlags(GPIO2);
 
             if (irq_mask & (1 << BOARD_KEYBOARD_RF_BUTTON_PIN)) {
                 xHigherPriorityTaskWoken |= keyboard_right_functional_IRQHandler();
             }
 
             if (irq_mask & (1 << BOARD_BATTERY_CHARGER_INOKB_PIN)) {
-            	xHigherPriorityTaskWoken |= BSP_BatteryChargerINOKB_IRQHandler();
+                xHigherPriorityTaskWoken |= BSP_BatteryChargerINOKB_IRQHandler();
             }
 
             if (irq_mask & (1 << BOARD_BATTERY_CHARGER_WCINOKB_PIN)) {
-            	//TODO:M.P xHigherPriorityTaskWoken |= BSP_BatteryChargerWCINOKB_IRQHandler();
+                // TODO:M.P xHigherPriorityTaskWoken |= BSP_BatteryChargerWCINOKB_IRQHandler();
             }
 
             if (irq_mask & (1 << BOARD_BATTERY_CHARGER_INTB_PIN)) {
-            	xHigherPriorityTaskWoken |= BSP_BatteryChargerINTB_IRQHandler();
+                xHigherPriorityTaskWoken |= BSP_BatteryChargerINTB_IRQHandler();
             }
 
             if (irq_mask & (1 << BSP_CELLULAR_SIM_CARD_1_INSERTED_PIN)) {
@@ -91,25 +91,25 @@ namespace bsp {
             portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
         }
 
-        void GPIO2_Combined_16_31_IRQHandler(void) {
+        void GPIO2_Combined_16_31_IRQHandler(void)
+        {
             BaseType_t xHigherPriorityTaskWoken = 0;
-            uint32_t irq_mask = GPIO_GetPinsInterruptFlags(GPIO2);
-
+            uint32_t irq_mask                   = GPIO_GetPinsInterruptFlags(GPIO2);
 
             if (irq_mask & (1 << BOARD_KEYBOARD_IRQ_GPIO_PIN)) {
                 xHigherPriorityTaskWoken |= keyboard_IRQHandler();
             }
 
             if (irq_mask & (1 << BOARD_USBC_NINT_PIN)) {
-                //TODO:M.P xHigherPriorityTaskWoken |= bsp_usbc_IRQHandler();
+                // TODO:M.P xHigherPriorityTaskWoken |= bsp_usbc_IRQHandler();
             }
 
             if (irq_mask & (1 << BOARD_JACKDET_IRQ_GPIO_PIN)) {
-                //TODO:M.P xHigherPriorityTaskWoken |= bsp_jackdet_IRQHandler();
+                // TODO:M.P xHigherPriorityTaskWoken |= bsp_jackdet_IRQHandler();
             }
 
             if (irq_mask & (1 << BSP_CELLULAR_RI_PIN)) {
-                //TODO:M.P BSP_CellularUartRingIndicatorIrqHandler();
+                // TODO:M.P BSP_CellularUartRingIndicatorIrqHandler();
             }
 
             // Clear all IRQs
@@ -119,14 +119,14 @@ namespace bsp {
             portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
         }
 
-        void GPIO3_Combined_16_31_IRQHandler(void) {
+        void GPIO3_Combined_16_31_IRQHandler(void)
+        {
             BaseType_t xHigherPriorityTaskWoken = 0;
-            uint32_t irq_mask = GPIO_GetPinsInterruptFlags(GPIO3);
+            uint32_t irq_mask                   = GPIO_GetPinsInterruptFlags(GPIO3);
 
             if (irq_mask & (1 << BOARD_EINK_BUSY_GPIO_PIN)) {
 
                 xHigherPriorityTaskWoken |= BSP_EinkBusyPinStateChangeHandler();
-
             }
 
             // Clear all IRQs on the GPIO3 port
@@ -135,7 +135,5 @@ namespace bsp {
             // Switch context if necessary
             portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
         }
-
-        }
-}
-
+    }
+} // namespace bsp
diff --git a/module-bsp/board/rt1051/common/irq/irq_gpio.hpp b/module-bsp/board/rt1051/common/irq/irq_gpio.hpp
index d0a53df31..652fd86b2 100644
--- a/module-bsp/board/rt1051/common/irq/irq_gpio.hpp
+++ b/module-bsp/board/rt1051/common/irq/irq_gpio.hpp
@@ -10,16 +10,11 @@
 #ifndef BSP_IRQ_IRQ_GPIO_H_
 #define BSP_IRQ_IRQ_GPIO_H_
 
-
-namespace bsp{
+namespace bsp
+{
 
     void irq_gpio_Init(void);
 
 }
 
-
-
-
-
-
 #endif /* BSP_IRQ_IRQ_GPIO_H_ */
diff --git a/module-bsp/board/rt1051/common/macros.h b/module-bsp/board/rt1051/common/macros.h
index 40a920767..b80741b4c 100644
--- a/module-bsp/board/rt1051/common/macros.h
+++ b/module-bsp/board/rt1051/common/macros.h
@@ -15,37 +15,38 @@
 #include <assert.h>
 
 #define _STRINGIFY(s) #s
-#define STRINGIFY(s) _STRINGIFY(s)
+#define STRINGIFY(s)  _STRINGIFY(s)
 
 #define UNUSED(x) ((void)(x))
 
-#define ALIGN_(n)                            __attribute__((aligned(n)))
+#define ALIGN_(n) __attribute__((aligned(n)))
 
-#define CACHEABLE_SECTION_SDRAM(var)        __attribute__ ((section (".sdram"))) var
+#define CACHEABLE_SECTION_SDRAM(var) __attribute__((section(".sdram"))) var
 
-#define CACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes)    \
-        __attribute__ ((section (".sdram")))  __attribute__((aligned(alignbytes))) var
+#define CACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes)                                                                 \
+    __attribute__((section(".sdram"))) __attribute__((aligned(alignbytes))) var
 
-#define NONCACHEABLE_SECTION_DMA(var)        __attribute__ ((section (".intramnoncacheable"))) var
+#define NONCACHEABLE_SECTION_DMA(var) __attribute__((section(".intramnoncacheable"))) var
 
-#define NONCACHEABLE_SECTION_DMA_ALIGN(var, alignbytes) \
-        __attribute__ ((section (".intramnoncacheable")))  var __attribute__((aligned(alignbytes)))
+#define NONCACHEABLE_SECTION_DMA_ALIGN(var, alignbytes)                                                                \
+    __attribute__((section(".intramnoncacheable"))) var __attribute__((aligned(alignbytes)))
 
-#define NONCACHEABLE_SECTION_SDRAM(var)        var
+#define NONCACHEABLE_SECTION_SDRAM(var) var
 
-#define NONCACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes)    var __attribute__((aligned(alignbytes)))
+#define NONCACHEABLE_SECTION_SDRAM_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
 
-#define NONCACHEABLE_SECTION_INIT(var)        __attribute__((section("NonCacheable.init"))) var
+#define NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
 
-#define NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
+#define NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)                                                               \
     __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
 
-#define NONCACHEABLE_SECTION(var)            __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
+#define NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
 
-#define NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
+#define NONCACHEABLE_SECTION_ALIGN(var, alignbytes)                                                                    \
     __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes)))
 
-static inline uint32_t IS_MEM_ADDR_CACHED(void *addr) {
+static inline uint32_t IS_MEM_ADDR_CACHED(void *addr)
+{
     extern uint32_t __ocram_noncached_start[];
     extern uint32_t __ocram_noncached_end[];
     extern uint32_t __dtcm_ram_start[];
@@ -53,15 +54,14 @@ static inline uint32_t IS_MEM_ADDR_CACHED(void *addr) {
     extern uint32_t __sdram_cached_start[];
     extern uint32_t __sdram_cached_end[];
 
-    if (((uint32_t *) addr >= (uint32_t *) __ocram_noncached_start) &&
-        ((uint32_t *) addr < (uint32_t *) __ocram_noncached_end)) {
+    if (((uint32_t *)addr >= (uint32_t *)__ocram_noncached_start) &&
+        ((uint32_t *)addr < (uint32_t *)__ocram_noncached_end)) {
         return 0;
     }
-    if (((uint32_t *) addr >= (uint32_t *) __dtcm_ram_start) && ((uint32_t *) addr < (uint32_t *) __dtcm_ram_end)) {
+    if (((uint32_t *)addr >= (uint32_t *)__dtcm_ram_start) && ((uint32_t *)addr < (uint32_t *)__dtcm_ram_end)) {
         return 0;
     }
-    if (((uint32_t *) addr >= (uint32_t *) __sdram_cached_start) &&
-        ((uint32_t *) addr < (uint32_t *) __sdram_cached_end)) {
+    if (((uint32_t *)addr >= (uint32_t *)__sdram_cached_start) && ((uint32_t *)addr < (uint32_t *)__sdram_cached_end)) {
         return 1;
     }
 
@@ -69,9 +69,9 @@ static inline uint32_t IS_MEM_ADDR_CACHED(void *addr) {
 }
 
 //! Test if in interrupt mode
-static inline bool isIRQ() {
+static inline bool isIRQ()
+{
     return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0;
 }
 
-
 #endif /* MACROS_H_ */
diff --git a/module-bsp/board/rt1051/common/pin_mux.c b/module-bsp/board/rt1051/common/pin_mux.c
index e8353ac74..e60af0200 100644
--- a/module-bsp/board/rt1051/common/pin_mux.c
+++ b/module-bsp/board/rt1051/common/pin_mux.c
@@ -133,14 +133,18 @@ pin_labels:
 - {pin_num: F12, pin_signal: GPIO_AD_B0_07, label: 'JTAG_TCK/J21[9]/SWD_CLK'}
 - {pin_num: F13, pin_signal: GPIO_AD_B0_08, label: JTAG_MOD}
 - {pin_num: F14, pin_signal: GPIO_AD_B0_09, label: 'JTAG_TDI/J21[5]/ENET_RST/J22[5]'}
-- {pin_num: G13, pin_signal: GPIO_AD_B0_10, label: 'JTAG_TDO/J21[13]/INT1_COMBO/ENET_INT/J22[6]/U32[11]', identifier: INT1_COMBO}
-- {pin_num: G10, pin_signal: GPIO_AD_B0_11, label: 'JTAG_nTRST/J21[3]/INT2_COMBO/LCD_TOUCH_INT/J22[3]/U32[9]', identifier: INT2_COMBO}
+- {pin_num: G13, pin_signal: GPIO_AD_B0_10, label: 'JTAG_TDO/J21[13]/INT1_COMBO/ENET_INT/J22[6]/U32[11]', identifier:
+INT1_COMBO}
+- {pin_num: G10, pin_signal: GPIO_AD_B0_11, label: 'JTAG_nTRST/J21[3]/INT2_COMBO/LCD_TOUCH_INT/J22[3]/U32[9]',
+identifier: INT2_COMBO}
 - {pin_num: K14, pin_signal: GPIO_AD_B0_12, label: UART1_TXD, identifier: UART1_TXD}
 - {pin_num: L14, pin_signal: GPIO_AD_B0_13, label: UART1_RXD, identifier: UART1_RXD}
 - {pin_num: H14, pin_signal: GPIO_AD_B0_14, label: 'CAN2_TX/U12[1]', identifier: CAN2_TX}
 - {pin_num: L10, pin_signal: GPIO_AD_B0_15, label: 'CAN2_RX/U12[4]', identifier: CAN2_RX}
-- {pin_num: J11, pin_signal: GPIO_AD_B1_00, label: 'I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4]', identifier: I2C_SCL_FXOS8700CQ;CSI_I2C_SCL}
-- {pin_num: K11, pin_signal: GPIO_AD_B1_01, label: 'I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6]', identifier: I2C_SDA_FXOS8700CQ;CSI_I2C_SDA}
+- {pin_num: J11, pin_signal: GPIO_AD_B1_00, label: 'I2C1_SCL/CSI_I2C_SCL/J35[20]/J23[6]/U13[17]/U32[4]', identifier:
+I2C_SCL_FXOS8700CQ;CSI_I2C_SCL}
+- {pin_num: K11, pin_signal: GPIO_AD_B1_01, label: 'I2C1_SDA/CSI_I2C_SDA/J35[22]/J23[5]/U13[18]/U32[6]', identifier:
+I2C_SDA_FXOS8700CQ;CSI_I2C_SDA}
 - {pin_num: L11, pin_signal: GPIO_AD_B1_02, label: 'SPDIF_OUT/J22[7]', identifier: SPDIF_OUT}
 - {pin_num: M12, pin_signal: GPIO_AD_B1_03, label: 'SPDIF_IN/J22[8]', identifier: SPDIF_IN}
 - {pin_num: H13, pin_signal: GPIO_AD_B1_08, label: 'AUD_INT/CSI_D9//J35[13]/J22[4]', identifier: CSI_D9}
@@ -246,47 +250,48 @@ pin_labels:
 #include "pin_mux.h"
 #include "board.h"
 
-#define     PAD_CONFIG_SLEW_RATE_SLOW          (0 << 0)
-#define     PAD_CONFIG_SLEW_RATE_FAST          (1 << 0)
+#define PAD_CONFIG_SLEW_RATE_SLOW (0 << 0)
+#define PAD_CONFIG_SLEW_RATE_FAST (1 << 0)
 
-#define     PAD_CONFIG_DRIVER_DISABLED         (0 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_1   (1 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_2   (2 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_3   (3 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_4   (4 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_5   (5 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_6   (6 << 3)
-#define     PAD_CONFIG_DRIVER_STRENGTH_LVL_7   (7 << 3)
+#define PAD_CONFIG_DRIVER_DISABLED       (0 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_1 (1 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_2 (2 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_3 (3 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_4 (4 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_5 (5 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_6 (6 << 3)
+#define PAD_CONFIG_DRIVER_STRENGTH_LVL_7 (7 << 3)
 
-#define     PAD_CONFIG_SPEED_SLOW_50MHz        (0 << 6)
-#define     PAD_CONFIG_SPEED_MEDIUM_1_100MHz   (1 << 6)
-#define     PAD_CONFIG_SPEED_MEDIUM_2_100MHz   (2 << 6)
-#define     PAD_CONFIG_SPEED_MAX_200MHz        (3 << 6)
+#define PAD_CONFIG_SPEED_SLOW_50MHz      (0 << 6)
+#define PAD_CONFIG_SPEED_MEDIUM_1_100MHz (1 << 6)
+#define PAD_CONFIG_SPEED_MEDIUM_2_100MHz (2 << 6)
+#define PAD_CONFIG_SPEED_MAX_200MHz      (3 << 6)
 
-#define     PAD_CONFIG_OPEN_DRAIN_DISABLED     (0 << 11)
-#define     PAD_CONFIG_OPEN_DRAIN_ENABLED      (1 << 11)
+#define PAD_CONFIG_OPEN_DRAIN_DISABLED (0 << 11)
+#define PAD_CONFIG_OPEN_DRAIN_ENABLED  (1 << 11)
 
-#define     PAD_CONFIG_PULL_KEEPER_DISABLED    (0 << 12)
-#define     PAD_CONFIG_PULL_KEEPER_ENABLED     (1 << 12)
+#define PAD_CONFIG_PULL_KEEPER_DISABLED (0 << 12)
+#define PAD_CONFIG_PULL_KEEPER_ENABLED  (1 << 12)
 
-#define     PAD_CONFIG_SELECT_KEEPER           (0 << 13)
-#define     PAD_CONFIG_SELECT_PULL             (1 << 13)
+#define PAD_CONFIG_SELECT_KEEPER (0 << 13)
+#define PAD_CONFIG_SELECT_PULL   (1 << 13)
 
-#define     PAD_CONFIG_PULL_DOWN_100kOhm       (0 << 14)
-#define     PAD_CONFIG_PULL_UP_47kOhm          (1 << 14)
-#define     PAD_CONFIG_PULL_UP_100kOhm         (2 << 14)
-#define     PAD_CONFIG_PULL_UP_22kOhm          (3 << 14)
+#define PAD_CONFIG_PULL_DOWN_100kOhm (0 << 14)
+#define PAD_CONFIG_PULL_UP_47kOhm    (1 << 14)
+#define PAD_CONFIG_PULL_UP_100kOhm   (2 << 14)
+#define PAD_CONFIG_PULL_UP_22kOhm    (3 << 14)
 
-#define     PAD_CONFIG_HYSTERESIS_DISABLED     (0 << 16)
-#define     PAD_CONFIG_HYSTERESIS_ENABLED      (1 << 16)
+#define PAD_CONFIG_HYSTERESIS_DISABLED (0 << 16)
+#define PAD_CONFIG_HYSTERESIS_ENABLED  (1 << 16)
 
 /* FUNCTION ************************************************************************************************************
- * 
+ *
  * Function Name : PINMUX_InitBootPins
  * Description   : Calls initialization functions.
- * 
+ *
  * END ****************************************************************************************************************/
-void PINMUX_InitBootPins(void) {
+void PINMUX_InitBootPins(void)
+{
     PINMUX_InitDEBUG_UART();
     PINMUX_InitPowerButton();
     PINMUX_InitEMMC();
@@ -311,16 +316,17 @@ PINMUX_InitPins:
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  */
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 PINMUX_InitDEBUG_UART:
 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
 - pin_list:
-  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
-  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
+  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable,
+hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm, pull_keeper_select: Keeper, pull_keeper_enable:
+Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
+  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13, software_input_on: Disable,
+hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm, pull_keeper_select: Keeper, pull_keeper_enable:
+Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  */
 
@@ -330,38 +336,34 @@ PINMUX_InitDEBUG_UART:
  * Description   : Configures pin routing and optionally pin electrical features.
  *
  * END ****************************************************************************************************************/
-void PINMUX_InitDEBUG_UART(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitDEBUG_UART(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_DEBUGUART_TX,        /* GPIO_AD_B0_12 is configured as LPUART1_TX */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_DEBUGUART_RX,        /* GPIO_AD_B0_13 is configured as LPUART1_RX */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinConfig(
-            PINMUX_DEBUGUART_TX,        /* GPIO_AD_B0_12 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-                                                 Drive Strength Field: R0/6
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Disabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_DEBUGUART_RX,        /* GPIO_AD_B0_13 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-                                                 Drive Strength Field: R0/6
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Disabled */
+    IOMUXC_SetPinMux(PINMUX_DEBUGUART_TX,    /* GPIO_AD_B0_12 is configured as LPUART1_TX */
+                     0U);                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_DEBUGUART_RX,    /* GPIO_AD_B0_13 is configured as LPUART1_RX */
+                     0U);                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinConfig(PINMUX_DEBUGUART_TX, /* GPIO_AD_B0_12 PAD functional properties : */
+                        0x10B0u);            /* Slew Rate Field: Slow Slew Rate
+                                          Drive Strength Field: R0/6
+                                          Speed Field: medium(100MHz)
+                                          Open Drain Enable Field: Open Drain Disabled
+                                          Pull / Keep Enable Field: Pull/Keeper Enabled
+                                          Pull / Keep Select Field: Keeper
+                                          Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                          Hyst. Enable Field: Hysteresis Disabled */
+    IOMUXC_SetPinConfig(PINMUX_DEBUGUART_RX, /* GPIO_AD_B0_13 PAD functional properties : */
+                        0x10B0u);            /* Slew Rate Field: Slow Slew Rate
+                                          Drive Strength Field: R0/6
+                                          Speed Field: medium(100MHz)
+                                          Open Drain Enable Field: Open Drain Disabled
+                                          Pull / Keep Enable Field: Pull/Keeper Enabled
+                                          Pull / Keep Select Field: Keeper
+                                          Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                          Hyst. Enable Field: Hysteresis Disabled */
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 PINMUX_InitSDRAM:
@@ -415,531 +417,452 @@ PINMUX_InitSDRAM:
  * Description   : Configures pin routing and optionally pin electrical features.
  *
  * END ****************************************************************************************************************/
-void PINMUX_InitSDRAM(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitSDRAM(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_00_SEMC_DATA00,         /* GPIO_EMC_00 is configured as SEMC_DATA00 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_01_SEMC_DATA01,         /* GPIO_EMC_01 is configured as SEMC_DATA01 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_02_SEMC_DATA02,         /* GPIO_EMC_02 is configured as SEMC_DATA02 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_03_SEMC_DATA03,         /* GPIO_EMC_03 is configured as SEMC_DATA03 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_04_SEMC_DATA04,         /* GPIO_EMC_04 is configured as SEMC_DATA04 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_05_SEMC_DATA05,         /* GPIO_EMC_05 is configured as SEMC_DATA05 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_06_SEMC_DATA06,         /* GPIO_EMC_06 is configured as SEMC_DATA06 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_07_SEMC_DATA07,         /* GPIO_EMC_07 is configured as SEMC_DATA07 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_08_SEMC_DM00,           /* GPIO_EMC_08 is configured as SEMC_DM00 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_09_SEMC_ADDR00,         /* GPIO_EMC_09 is configured as SEMC_ADDR00 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_10_SEMC_ADDR01,         /* GPIO_EMC_10 is configured as SEMC_ADDR01 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_11_SEMC_ADDR02,         /* GPIO_EMC_11 is configured as SEMC_ADDR02 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_12_SEMC_ADDR03,         /* GPIO_EMC_12 is configured as SEMC_ADDR03 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_13_SEMC_ADDR04,         /* GPIO_EMC_13 is configured as SEMC_ADDR04 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_14_SEMC_ADDR05,         /* GPIO_EMC_14 is configured as SEMC_ADDR05 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_15_SEMC_ADDR06,         /* GPIO_EMC_15 is configured as SEMC_ADDR06 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_16_SEMC_ADDR07,         /* GPIO_EMC_16 is configured as SEMC_ADDR07 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_17_SEMC_ADDR08,         /* GPIO_EMC_17 is configured as SEMC_ADDR08 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_18_SEMC_ADDR09,         /* GPIO_EMC_18 is configured as SEMC_ADDR09 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_19_SEMC_ADDR11,         /* GPIO_EMC_19 is configured as SEMC_ADDR11 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_20_SEMC_ADDR12,         /* GPIO_EMC_20 is configured as SEMC_ADDR12 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_21_SEMC_BA0,            /* GPIO_EMC_21 is configured as SEMC_BA0 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_22_SEMC_BA1,            /* GPIO_EMC_22 is configured as SEMC_BA1 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_23_SEMC_ADDR10,         /* GPIO_EMC_23 is configured as SEMC_ADDR10 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_24_SEMC_CAS,            /* GPIO_EMC_24 is configured as SEMC_CAS */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_25_SEMC_RAS,            /* GPIO_EMC_25 is configured as SEMC_RAS */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_26_SEMC_CLK,            /* GPIO_EMC_26 is configured as SEMC_CLK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_27_SEMC_CKE,            /* GPIO_EMC_27 is configured as SEMC_CKE */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_28_SEMC_WE,             /* GPIO_EMC_28 is configured as SEMC_WE */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_29_SEMC_CS0,            /* GPIO_EMC_29 is configured as SEMC_CS0 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_30_SEMC_DATA08,         /* GPIO_EMC_30 is configured as SEMC_DATA08 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_31_SEMC_DATA09,         /* GPIO_EMC_31 is configured as SEMC_DATA09 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_32_SEMC_DATA10,         /* GPIO_EMC_32 is configured as SEMC_DATA10 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_33_SEMC_DATA11,         /* GPIO_EMC_33 is configured as SEMC_DATA11 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_34_SEMC_DATA12,         /* GPIO_EMC_34 is configured as SEMC_DATA12 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_35_SEMC_DATA13,         /* GPIO_EMC_35 is configured as SEMC_DATA13 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_36_SEMC_DATA14,         /* GPIO_EMC_36 is configured as SEMC_DATA14 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_37_SEMC_DATA15,         /* GPIO_EMC_37 is configured as SEMC_DATA15 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_38_SEMC_DM01,           /* GPIO_EMC_38 is configured as SEMC_DM01 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            IOMUXC_GPIO_EMC_39_SEMC_DQS,            /* GPIO_EMC_39 is configured as SEMC_DQS */
-            1U);                                    /* Software Input On Field: Force input path of pad GPIO_EMC_39 */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_SEMC_ADDR00, /* GPIO_EMC_09 is configured as SEMC_ADDR00 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_10_SEMC_ADDR01, /* GPIO_EMC_10 is configured as SEMC_ADDR01 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_11_SEMC_ADDR02, /* GPIO_EMC_11 is configured as SEMC_ADDR02 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_12_SEMC_ADDR03, /* GPIO_EMC_12 is configured as SEMC_ADDR03 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_13_SEMC_ADDR04, /* GPIO_EMC_13 is configured as SEMC_ADDR04 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_14_SEMC_ADDR05, /* GPIO_EMC_14 is configured as SEMC_ADDR05 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_15_SEMC_ADDR06, /* GPIO_EMC_15 is configured as SEMC_ADDR06 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_16_SEMC_ADDR07, /* GPIO_EMC_16 is configured as SEMC_ADDR07 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_17_SEMC_ADDR08, /* GPIO_EMC_17 is configured as SEMC_ADDR08 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_18_SEMC_ADDR09, /* GPIO_EMC_18 is configured as SEMC_ADDR09 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_19_SEMC_ADDR11, /* GPIO_EMC_19 is configured as SEMC_ADDR11 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_20_SEMC_ADDR12, /* GPIO_EMC_20 is configured as SEMC_ADDR12 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_21_SEMC_BA0, /* GPIO_EMC_21 is configured as SEMC_BA0 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_22_SEMC_BA1, /* GPIO_EMC_22 is configured as SEMC_BA1 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_23_SEMC_ADDR10, /* GPIO_EMC_23 is configured as SEMC_ADDR10 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_24_SEMC_CAS, /* GPIO_EMC_24 is configured as SEMC_CAS */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_25_SEMC_RAS, /* GPIO_EMC_25 is configured as SEMC_RAS */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_26_SEMC_CLK, /* GPIO_EMC_26 is configured as SEMC_CLK */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_27_SEMC_CKE, /* GPIO_EMC_27 is configured as SEMC_CKE */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_28_SEMC_WE, /* GPIO_EMC_28 is configured as SEMC_WE */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_29_SEMC_CS0, /* GPIO_EMC_29 is configured as SEMC_CS0 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_30_SEMC_DATA08, /* GPIO_EMC_30 is configured as SEMC_DATA08 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_31_SEMC_DATA09, /* GPIO_EMC_31 is configured as SEMC_DATA09 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_SEMC_DATA10, /* GPIO_EMC_32 is configured as SEMC_DATA10 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_SEMC_DATA11, /* GPIO_EMC_33 is configured as SEMC_DATA11 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_34_SEMC_DATA12, /* GPIO_EMC_34 is configured as SEMC_DATA12 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_35_SEMC_DATA13, /* GPIO_EMC_35 is configured as SEMC_DATA13 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_36_SEMC_DATA14, /* GPIO_EMC_36 is configured as SEMC_DATA14 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_37_SEMC_DATA15, /* GPIO_EMC_37 is configured as SEMC_DATA15 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_38_SEMC_DM01, /* GPIO_EMC_38 is configured as SEMC_DM01 */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 is configured as SEMC_DQS */
+                     1U);                         /* Software Input On Field: Force input path of pad GPIO_EMC_39 */
 
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_00_SEMC_DATA00,         /* GPIO_EMC_00 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_01_SEMC_DATA01,         /* GPIO_EMC_01 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_02_SEMC_DATA02,         /* GPIO_EMC_02 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_03_SEMC_DATA03,         /* GPIO_EMC_03 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_04_SEMC_DATA04,         /* GPIO_EMC_04 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_05_SEMC_DATA05,         /* GPIO_EMC_05 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_06_SEMC_DATA06,         /* GPIO_EMC_06 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_07_SEMC_DATA07,         /* GPIO_EMC_07 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_08_SEMC_DM00,           /* GPIO_EMC_08 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_09_SEMC_ADDR00,         /* GPIO_EMC_09 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_10_SEMC_ADDR01,         /* GPIO_EMC_10 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_11_SEMC_ADDR02,         /* GPIO_EMC_11 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_12_SEMC_ADDR03,         /* GPIO_EMC_12 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_13_SEMC_ADDR04,         /* GPIO_EMC_13 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_14_SEMC_ADDR05,         /* GPIO_EMC_14 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_15_SEMC_ADDR06,         /* GPIO_EMC_15 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_16_SEMC_ADDR07,         /* GPIO_EMC_16 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_17_SEMC_ADDR08,         /* GPIO_EMC_17 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_18_SEMC_ADDR09,         /* GPIO_EMC_18 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_19_SEMC_ADDR11,         /* GPIO_EMC_19 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_20_SEMC_ADDR12,         /* GPIO_EMC_20 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_21_SEMC_BA0,            /* GPIO_EMC_21 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_22_SEMC_BA1,            /* GPIO_EMC_22 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_23_SEMC_ADDR10,         /* GPIO_EMC_23 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_24_SEMC_CAS,            /* GPIO_EMC_24 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_25_SEMC_RAS,            /* GPIO_EMC_25 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_26_SEMC_CLK,            /* GPIO_EMC_26 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_27_SEMC_CKE,            /* GPIO_EMC_27 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_28_SEMC_WE,             /* GPIO_EMC_28 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_29_SEMC_CS0,            /* GPIO_EMC_29 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_30_SEMC_DATA08,         /* GPIO_EMC_30 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_31_SEMC_DATA09,         /* GPIO_EMC_31 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_32_SEMC_DATA10,         /* GPIO_EMC_32 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_33_SEMC_DATA11,         /* GPIO_EMC_33 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_34_SEMC_DATA12,         /* GPIO_EMC_34 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_35_SEMC_DATA13,         /* GPIO_EMC_35 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_36_SEMC_DATA14,         /* GPIO_EMC_36 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_37_SEMC_DATA15,         /* GPIO_EMC_37 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_38_SEMC_DM01,           /* GPIO_EMC_38 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_08_SEMC_DM00,   /* GPIO_EMC_08 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_SEMC_ADDR00, /* GPIO_EMC_09 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_10_SEMC_ADDR01, /* GPIO_EMC_10 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_11_SEMC_ADDR02, /* GPIO_EMC_11 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_12_SEMC_ADDR03, /* GPIO_EMC_12 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_13_SEMC_ADDR04, /* GPIO_EMC_13 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_14_SEMC_ADDR05, /* GPIO_EMC_14 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_15_SEMC_ADDR06, /* GPIO_EMC_15 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_16_SEMC_ADDR07, /* GPIO_EMC_16 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_17_SEMC_ADDR08, /* GPIO_EMC_17 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_18_SEMC_ADDR09, /* GPIO_EMC_18 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_19_SEMC_ADDR11, /* GPIO_EMC_19 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_20_SEMC_ADDR12, /* GPIO_EMC_20 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_21_SEMC_BA0,    /* GPIO_EMC_21 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_22_SEMC_BA1,    /* GPIO_EMC_22 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_23_SEMC_ADDR10, /* GPIO_EMC_23 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_24_SEMC_CAS,    /* GPIO_EMC_24 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_25_SEMC_RAS,    /* GPIO_EMC_25 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_26_SEMC_CLK,    /* GPIO_EMC_26 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_27_SEMC_CKE,    /* GPIO_EMC_27 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_28_SEMC_WE,     /* GPIO_EMC_28 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_29_SEMC_CS0,    /* GPIO_EMC_29 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_30_SEMC_DATA08, /* GPIO_EMC_30 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_31_SEMC_DATA09, /* GPIO_EMC_31 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_32_SEMC_DATA10, /* GPIO_EMC_32 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_33_SEMC_DATA11, /* GPIO_EMC_33 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_34_SEMC_DATA12, /* GPIO_EMC_34 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_35_SEMC_DATA13, /* GPIO_EMC_35 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_36_SEMC_DATA14, /* GPIO_EMC_36 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_37_SEMC_DATA15, /* GPIO_EMC_37 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_38_SEMC_DM01,   /* GPIO_EMC_38 PAD functional properties : */
+                        0x0110F9u);                     /* Slew Rate Field: Fast Slew Rate
+                                                     Drive Strength Field: R0/7
+                                                     Speed Field: max(200MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Enabled */
 
-    IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_EMC_39_SEMC_DQS,           /* GPIO_EMC_39 PAD functional properties : */
-            0x0110F9u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0/7
-                                                 Speed Field: max(200MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                 Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 PAD functional properties : */
+                        0x0110F9u);                  /* Slew Rate Field: Fast Slew Rate
+                                                  Drive Strength Field: R0/7
+                                                  Speed Field: max(200MHz)
+                                                  Open Drain Enable Field: Open Drain Disabled
+                                                  Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                  Pull / Keep Select Field: Keeper
+                                                  Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                  Hyst. Enable Field: Hysteresis Enabled */
 }
 
 /*
@@ -962,913 +885,567 @@ PINMUX_InitUSDHC:
  * Description   : Configures pin routing and optionally pin electrical features.
  *
  * END ****************************************************************************************************************/
-void PINMUX_InitEMMC(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitEMMC(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_CMD,        /* GPIO_SD_B0_00 is configured as USDHC1_CMD */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_CLK,        /* GPIO_SD_B0_01 is configured as USDHC1_CLK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA0,      /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA1,      /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA2,      /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA3,      /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA4,      /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA5,      /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA6,      /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EMMC_DATA7,      /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_CMD,   /* GPIO_SD_B0_00 is configured as USDHC1_CMD */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_CLK,   /* GPIO_SD_B0_01 is configured as USDHC1_CLK */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA0, /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA1, /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA2, /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA3, /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA4, /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA5, /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA6, /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EMMC_DATA7, /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
 
+    IOMUXC_SetPinConfig(PINMUX_EMMC_CMD,   /* GPIO_SD_B0_00 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_CLK,   /* GPIO_SD_B0_01 PAD functional properties : */
+                        0x014089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Disabled
+                                        Pull / Keep Select Field: Keeper
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA0, /* GPIO_SD_B0_02 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA1, /* GPIO_SD_B0_03 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA2, /* GPIO_SD_B0_04 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA3, /* GPIO_SD_B0_05 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_CMD,        /* GPIO_SD_B0_00 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_CLK,        /* GPIO_SD_B0_01 PAD functional properties : */
-            0x014089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Disabled
-                                                 Pull / Keep Select Field: Keeper
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA0,      /* GPIO_SD_B0_02 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA1,      /* GPIO_SD_B0_03 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA2,      /* GPIO_SD_B0_04 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA3,      /* GPIO_SD_B0_05 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA4,      /* GPIO_SD_B0_02 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA5,      /* GPIO_SD_B0_03 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA6,      /* GPIO_SD_B0_04 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
-    IOMUXC_SetPinConfig(
-            PINMUX_EMMC_DATA7,      /* GPIO_SD_B0_05 PAD functional properties : */
-            0x017089u);                             /* Slew Rate Field: Fast Slew Rate
-                                                 Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
-                                                 Speed Field: medium(100MHz)
-                                                 Open Drain Enable Field: Open Drain Disabled
-                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                 Pull / Keep Select Field: Pull
-                                                 Pull Up / Down Config. Field: 47K Ohm Pull Up
-                                                 Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA4, /* GPIO_SD_B0_02 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA5, /* GPIO_SD_B0_03 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA6, /* GPIO_SD_B0_04 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
+    IOMUXC_SetPinConfig(PINMUX_EMMC_DATA7, /* GPIO_SD_B0_05 PAD functional properties : */
+                        0x017089u);        /* Slew Rate Field: Fast Slew Rate
+                                        Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)
+                                        Speed Field: medium(100MHz)
+                                        Open Drain Enable Field: Open Drain Disabled
+                                        Pull / Keep Enable Field: Pull/Keeper Enabled
+                                        Pull / Keep Select Field: Pull
+                                        Pull Up / Down Config. Field: 47K Ohm Pull Up
+                                        Hyst. Enable Field: Hysteresis Enabled */
 }
 
-void PINMUX_InitPowerButton(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitPowerButton(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_POWER_ENABLE_PAD,
-            0U);
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_POWER_ENABLE_PAD, 0U);
 
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_RF_BUTTON_PAD,
-            0U);
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_RF_BUTTON_PAD, 0U);
 
-    //Output
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_POWER_ENABLE_PAD,
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm);
+    // Output
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_POWER_ENABLE_PAD,
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm);
 
-    //Input
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_RF_BUTTON_PAD,
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_SELECT_PULL);
+    // Input
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_RF_BUTTON_PAD, PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_SELECT_PULL);
 }
 
-void PINMUX_InitKeyboard(void) {
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_SCL,        /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
-            1U);                                    /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
+void PINMUX_InitKeyboard(void)
+{
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_SCL, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
+                     1U);                 /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
 
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_SDA,        /* GPIO_AD_B1_01 is configured as LPI2C1_SDA */
-            1U);                                    /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SDA */
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_SDA, /* GPIO_AD_B1_01 is configured as LPI2C1_SDA */
+                     1U);                 /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SDA */
 
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_RESET,        /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
-            1U);                                    /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_RESET, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
+                     1U);                   /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
 
-    IOMUXC_SetPinMux(
-            PINMUX_KEYBOARD_IRQ,        /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
-            0U);                                    /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
+    IOMUXC_SetPinMux(PINMUX_KEYBOARD_IRQ, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
+                     0U);                 /* Software Input On Field: Force input path of pad PINMUX_KEYPINMUX_SCL */
 
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_SCL, PAD_CONFIG_OPEN_DRAIN_ENABLED | PAD_CONFIG_DRIVER_STRENGTH_LVL_1);
 
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_SDA, PAD_CONFIG_OPEN_DRAIN_ENABLED | PAD_CONFIG_DRIVER_STRENGTH_LVL_1);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_SCL,
-            PAD_CONFIG_OPEN_DRAIN_ENABLED |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1
-    );
+    // Output
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_RESET,
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_SDA,
-            PAD_CONFIG_OPEN_DRAIN_ENABLED |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1
-    );
-
-
-    //Output
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_RESET,
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
-
-    //Input
-    IOMUXC_SetPinConfig(
-            PINMUX_KEYBOARD_IRQ,
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
+    // Input
+    IOMUXC_SetPinConfig(PINMUX_KEYBOARD_IRQ, PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
 }
 
-void PINMUX_InitAudioCodec(void) {
+void PINMUX_InitAudioCodec(void)
+{
 
-    IOMUXC_SetPinMux(
-            PINMUX_AUDIOCODEC_SAIx_MCLK,         /* GPIO_AD_B1_09 is configured as SAI1_MCLK */
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_AUDIOCODEC_SAIx_RX_DATA00,    /* GPIO_AD_B1_12 is configured as SAI1_RX_DATA00 */
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_AUDIOCODEC_SAIx_TX_DATA00,    /* GPIO_AD_B1_13 is configured as SAI1_TX_DATA00 */
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_AUDIOCODEC_SAIx_BCLK,      /* GPIO_AD_B1_14 is configured as SAI1_TX_BCLK */
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_AUDIOCODEC_SAIx_TX_SYNC,      /* GPIO_AD_B1_15 is configured as SAI1_TX_SYNC */
-            0U);
+    IOMUXC_SetPinMux(PINMUX_AUDIOCODEC_SAIx_MCLK, /* GPIO_AD_B1_09 is configured as SAI1_MCLK */
+                     0U);
+    IOMUXC_SetPinMux(PINMUX_AUDIOCODEC_SAIx_RX_DATA00, /* GPIO_AD_B1_12 is configured as SAI1_RX_DATA00 */
+                     0U);
+    IOMUXC_SetPinMux(PINMUX_AUDIOCODEC_SAIx_TX_DATA00, /* GPIO_AD_B1_13 is configured as SAI1_TX_DATA00 */
+                     0U);
+    IOMUXC_SetPinMux(PINMUX_AUDIOCODEC_SAIx_BCLK, /* GPIO_AD_B1_14 is configured as SAI1_TX_BCLK */
+                     0U);
+    IOMUXC_SetPinMux(PINMUX_AUDIOCODEC_SAIx_TX_SYNC, /* GPIO_AD_B1_15 is configured as SAI1_TX_SYNC */
+                     0U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_AUDIOCODEC_SAIx_MCLK,         /* GPIO_AD_B1_09 PAD functional properties : */
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
-    IOMUXC_SetPinConfig(
-            PINMUX_AUDIOCODEC_SAIx_RX_DATA00,    /* GPIO_AD_B1_12 PAD functional properties : */
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm
-    );
-    IOMUXC_SetPinConfig(
-            PINMUX_AUDIOCODEC_SAIx_TX_DATA00,    /* GPIO_AD_B1_13 PAD functional properties : */
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
-    IOMUXC_SetPinConfig(
-            PINMUX_AUDIOCODEC_SAIx_BCLK,      /* GPIO_AD_B1_14 PAD functional properties : */
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
-    IOMUXC_SetPinConfig(
-            PINMUX_AUDIOCODEC_SAIx_TX_SYNC,      /* GPIO_AD_B1_15 PAD functional properties : */
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
+    IOMUXC_SetPinConfig(PINMUX_AUDIOCODEC_SAIx_MCLK, /* GPIO_AD_B1_09 PAD functional properties : */
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
+    IOMUXC_SetPinConfig(PINMUX_AUDIOCODEC_SAIx_RX_DATA00, /* GPIO_AD_B1_12 PAD functional properties : */
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
+    IOMUXC_SetPinConfig(PINMUX_AUDIOCODEC_SAIx_TX_DATA00, /* GPIO_AD_B1_13 PAD functional properties : */
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
+    IOMUXC_SetPinConfig(PINMUX_AUDIOCODEC_SAIx_BCLK, /* GPIO_AD_B1_14 PAD functional properties : */
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
+    IOMUXC_SetPinConfig(PINMUX_AUDIOCODEC_SAIx_TX_SYNC, /* GPIO_AD_B1_15 PAD functional properties : */
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
 }
 
-void PINMUX_InitEINK(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitEINK(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_SCK,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_SDO,        /* GPIO_AD_B0_01 is configured as LPSPI1_SDO */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_SDI,        /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_CS,       /* GPIO_SD_B0_01 is configured as LPSPI1_PCS0 */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_BUSY,       /* GPIO_AD_B0_03 is configured as eINK BUSY_N */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_EINK_RESET,    /* GPIO_AD_B0_03 is configured as eINK RESET */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_SCK,   /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_SDO,   /* GPIO_AD_B0_01 is configured as LPSPI1_SDO */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_SDI,   /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_CS,    /* GPIO_SD_B0_01 is configured as LPSPI1_PCS0 */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_BUSY,  /* GPIO_AD_B0_03 is configured as eINK BUSY_N */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_EINK_RESET, /* GPIO_AD_B0_03 is configured as eINK RESET */
+                     0U);               /* Software Input On Field: Input Path is determined by functionality */
 
+    IOMUXC_SetPinConfig(PINMUX_EINK_SCK, /* GPIO_AD_B0_00 PAD functional properties : */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_SCK,        /* GPIO_AD_B0_00 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_EINK_SDO, /* GPIO_AD_B0_01 PAD functional properties : */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_SDO,        /* GPIO_AD_B0_01 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_EINK_SDI, /* GPIO_AD_B0_02 PAD functional properties : */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_SDI,        /* GPIO_AD_B0_02 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_EINK_CS, /* GPIO_AD_B0_03 PAD functional properties : */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_CS,        /* GPIO_AD_B0_03 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_EINK_BUSY, /* GPIO_AD_B0_03 PAD functional properties : */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_BUSY,    /* GPIO_AD_B0_03 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);
-
-    IOMUXC_SetPinConfig(
-            PINMUX_EINK_RESET,    /* GPIO_AD_B0_03 PAD functional properties : */
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_EINK_RESET, /* GPIO_AD_B0_03 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
-void PINMUX_InitUSBC(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitUSBC(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_USBC_CONTROLLER_NEN,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_USBC_CONTROLLER_NINT,        /* GPIO_AD_B0_01 is configured as LPSPI1_SDO */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_USBC_CONTROLLER_ID,        /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-    IOMUXC_SetPinMux(
-            PINMUX_USBC_CONTROLLER_PORT,        /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_USBC_CONTROLLER_NEN, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_USBC_CONTROLLER_NINT, /* GPIO_AD_B0_01 is configured as LPSPI1_SDO */
+                     0U);                       /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_USBC_CONTROLLER_ID, /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
+                     0U);                       /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_USBC_CONTROLLER_PORT, /* GPIO_AD_B0_02 is configured as LPSPI1_SDI */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_USBC_CONTROLLER_NEN,        /* GPIO_AD_B0_02 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-	                                                 Drive Strength Field: R0/6
-	                                                 Speed Field: medium(100MHz)
-	                                                 Open Drain Enable Field: Open Drain Disabled
-	                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-	                                                 Pull / Keep Select Field: Keeper
-	                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-	                                                 Hyst. Enable Field: Hysteresis Disabled */
+    IOMUXC_SetPinConfig(PINMUX_USBC_CONTROLLER_NEN, /* GPIO_AD_B0_02 PAD functional properties : */
+                        0x10B0u);                   /* Slew Rate Field: Slow Slew Rate
+                                                     Drive Strength Field: R0/6
+                                                     Speed Field: medium(100MHz)
+                                                     Open Drain Enable Field: Open Drain Disabled
+                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                     Pull / Keep Select Field: Keeper
+                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                     Hyst. Enable Field: Hysteresis Disabled */
 
+    IOMUXC_SetPinConfig(PINMUX_USBC_CONTROLLER_NINT, /* GPIO_AD_B0_03 PAD functional properties : */
+                        IOMUXC_SW_PAD_CTL_PAD_ODE(1) | PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm); /* Open drain enable with internal 100k pullup */
 
+    IOMUXC_SetPinConfig(PINMUX_USBC_CONTROLLER_ID, /* GPIO_AD_B0_03 PAD functional properties : */
+                        IOMUXC_SW_PAD_CTL_PAD_ODE(1) | PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm); /* Open drain enable with internal 100k pullup */
 
-    IOMUXC_SetPinConfig(
-            PINMUX_USBC_CONTROLLER_NINT,        /* GPIO_AD_B0_03 PAD functional properties : */
-            IOMUXC_SW_PAD_CTL_PAD_ODE(1) |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);          /* Open drain enable with internal 100k pullup */
-
-    IOMUXC_SetPinConfig(
-            PINMUX_USBC_CONTROLLER_ID,    /* GPIO_AD_B0_03 PAD functional properties : */
-            IOMUXC_SW_PAD_CTL_PAD_ODE(1) |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm);          /* Open drain enable with internal 100k pullup */
-
-    IOMUXC_SetPinConfig(
-            PINMUX_USBC_CONTROLLER_PORT,    /* GPIO_AD_B0_03 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-	                                                 Drive Strength Field: R0/6
-	                                                 Speed Field: medium(100MHz)
-	                                                 Open Drain Enable Field: Open Drain Disabled
-	                                                 Pull / Keep Enable Field: Pull/Keeper Enabled
-	                                                 Pull / Keep Select Field: Keeper
-	                                                 Pull Up / Down Config. Field: 100K Ohm Pull Down
-	                                                 Hyst. Enable Field: Hysteresis Disabled */
+    IOMUXC_SetPinConfig(PINMUX_USBC_CONTROLLER_PORT, /* GPIO_AD_B0_03 PAD functional properties : */
+                        0x10B0u);                    /* Slew Rate Field: Slow Slew Rate
+                                                      Drive Strength Field: R0/6
+                                                      Speed Field: medium(100MHz)
+                                                      Open Drain Enable Field: Open Drain Disabled
+                                                      Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                      Pull / Keep Select Field: Keeper
+                                                      Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                      Hyst. Enable Field: Hysteresis Disabled */
 }
 
+void PINMUX_InitLEDDRIVER(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-void PINMUX_InitLEDDRIVER(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+    IOMUXC_SetPinMux(PINMUX_LEDDRIVER_NRST, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U);                   /* Software Input On Field: Input Path is determined by functionality */
 
-    IOMUXC_SetPinMux(
-            PINMUX_LEDDRIVER_NRST,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-
-
-    IOMUXC_SetPinConfig(
-            PINMUX_LEDDRIVER_NRST,        /* GPIO_AD_B0_02 PAD functional properties : */
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_LEDDRIVER_NRST, /* GPIO_AD_B0_02 PAD functional properties : */
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
+void PINMUX_InitCellular(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-void PINMUX_InitCellular(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
-
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_UART_TX,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_UART_RX,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_UART_CTS,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_UART_RTS,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_AP_READY,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_RESET,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_PWRKEY,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_WAKEUP_IN,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SIM_SEL,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_RI,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_DTR,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SIM_1_INSERTED,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SIM_2_INSERTED,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SIM_PRESENCE,
-            0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_UART_TX, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_UART_RX, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_UART_CTS, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_UART_RTS, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_AP_READY, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_RESET, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_PWRKEY, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_WAKEUP_IN, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SIM_SEL, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_RI, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_DTR, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SIM_1_INSERTED, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SIM_2_INSERTED, 0U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SIM_PRESENCE, 0U);
     IOMUXC_SetPinMux(PINMUX_CELLULAR_ANTENNA_SELECT, 0U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SAIx_MCLK,
-            1U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SAIx_TX_DATA00,
-            1U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SAIx_RX_DATA00,
-            1U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SAIx_BCLK,
-            1U);
-    IOMUXC_SetPinMux(
-            PINMUX_CELLULAR_SAIx_TX_SYNC,
-            1U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SAIx_MCLK, 1U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SAIx_TX_DATA00, 1U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SAIx_RX_DATA00, 1U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SAIx_BCLK, 1U);
+    IOMUXC_SetPinMux(PINMUX_CELLULAR_SAIx_TX_SYNC, 1U);
 
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_UART_TX,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_UART_TX,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED
-    );
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_UART_RX,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_UART_RX,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED
-    );
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_UART_CTS,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_UART_CTS,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_UART_RTS,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_UART_RTS,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_AP_READY,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_AP_READY,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_RESET,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_RESET,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_PWRKEY,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_PWRKEY,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_WAKEUP_IN,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_WAKEUP_IN,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SIM_SEL,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SIM_SEL,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_KEEPER | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_KEEPER |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_RI,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_RI,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_DISABLED | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_DISABLED |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_DTR,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_DTR,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SIM_1_INSERTED,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SIM_1_INSERTED,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_DISABLED | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_DISABLED |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SIM_2_INSERTED,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SIM_2_INSERTED,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_DISABLED | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_DISABLED |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SIM_PRESENCE,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SIM_PRESENCE,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_KEEPER | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_KEEPER |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SAIx_MCLK,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SAIx_MCLK,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SAIx_BCLK,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SAIx_BCLK,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SAIx_RX_DATA00,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SAIx_RX_DATA00,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SAIx_TX_DATA00,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SAIx_TX_DATA00,
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+    IOMUXC_SetPinConfig(PINMUX_CELLULAR_SAIx_TX_SYNC,
 
-    IOMUXC_SetPinConfig(
-            PINMUX_CELLULAR_SAIx_TX_SYNC,
-
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
-void PINMUX_InitBluetoothPins(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitBluetoothPins(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_UART_TX,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_UART_RX,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_UART_CTS,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_UART_RTS,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_NSHUTDOWN,
-            0U);
-    IOMUXC_SetPinMux(
-            PINMUX_BLUETOOTH_OSC_EN,
-            0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_UART_TX, 0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_UART_RX, 0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_UART_CTS, 0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_UART_RTS, 0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_NSHUTDOWN, 0U);
+    IOMUXC_SetPinMux(PINMUX_BLUETOOTH_OSC_EN, 0U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_UART_TX,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_UART_TX,
 
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_MEDIUM_1_100MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED
-    );
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_MEDIUM_1_100MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_UART_RX,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_UART_RX,
 
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_DISABLED
-    );
+                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_DISABLED);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_UART_CTS,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_UART_CTS,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_UART_RTS,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_UART_RTS,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_NSHUTDOWN,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_NSHUTDOWN,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_BLUETOOTH_OSC_EN,
+    IOMUXC_SetPinConfig(PINMUX_BLUETOOTH_OSC_EN,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
-void PINMUX_InitJACKDET(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitJACKDET(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_JACKDET_IRQ,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(PINMUX_JACKDET_IRQ, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U);                /* Software Input On Field: Input Path is determined by functionality */
 
-
-    IOMUXC_SetPinConfig(
-            PINMUX_JACKDET_IRQ,        /* GPIO_AD_B0_02 PAD functional properties : */
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_SELECT_PULL);
+    IOMUXC_SetPinConfig(PINMUX_JACKDET_IRQ, /* GPIO_AD_B0_02 PAD functional properties : */
+                        PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_SELECT_PULL);
 }
 
-void PINMUX_InitBatteryCharger(void) {
-//#if PROJECT_CONFIG_IS_T1_BOARD == 1
-    IOMUXC_SetPinMux(
-            PINUMX_BATTERY_CHARGER_INOKB_IRQ,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+void PINMUX_InitBatteryCharger(void)
+{
+    //#if PROJECT_CONFIG_IS_T1_BOARD == 1
+    IOMUXC_SetPinMux(PINUMX_BATTERY_CHARGER_INOKB_IRQ, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U); /* Software Input On Field: Input Path is determined by functionality */
 
-    IOMUXC_SetPinMux(
-            PINUMX_BATTERY_CHARGER_WCINOKB_IRQ,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);
-
-    IOMUXC_SetPinMux(
-            PINUMX_BATTERY_CHARGER_INTB_IRQ,        /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
-            0U);
+    IOMUXC_SetPinMux(PINUMX_BATTERY_CHARGER_WCINOKB_IRQ, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U);
 
+    IOMUXC_SetPinMux(PINUMX_BATTERY_CHARGER_INTB_IRQ, /* GPIO_AD_B0_00 is configured as LPSPI1_SCK */
+                     0U);
 
     IOMUXC_SetPinConfig(PINUMX_BATTERY_CHARGER_INOKB_IRQ,
 
-                        PAD_CONFIG_SLEW_RATE_SLOW |
-                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-                        PAD_CONFIG_SELECT_PULL |
-                        PAD_CONFIG_PULL_UP_100kOhm |
-                        PAD_CONFIG_SPEED_SLOW_50MHz |
-                        PAD_CONFIG_PULL_KEEPER_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_SPEED_SLOW_50MHz | PAD_CONFIG_PULL_KEEPER_DISABLED);
 
     IOMUXC_SetPinConfig(PINUMX_BATTERY_CHARGER_WCINOKB_IRQ,
 
-                        PAD_CONFIG_SLEW_RATE_SLOW |
-                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-                        PAD_CONFIG_SELECT_PULL |
-                        PAD_CONFIG_PULL_UP_100kOhm |
-                        PAD_CONFIG_SPEED_SLOW_50MHz |
-                        PAD_CONFIG_PULL_KEEPER_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_SPEED_SLOW_50MHz | PAD_CONFIG_PULL_KEEPER_DISABLED);
 
     IOMUXC_SetPinConfig(PINUMX_BATTERY_CHARGER_INTB_IRQ,
 
-                        PAD_CONFIG_SLEW_RATE_SLOW |
-                        PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-                        PAD_CONFIG_SELECT_PULL |
-                        PAD_CONFIG_PULL_UP_100kOhm |
-                        PAD_CONFIG_SPEED_SLOW_50MHz |
-                        PAD_CONFIG_PULL_KEEPER_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_SPEED_SLOW_50MHz | PAD_CONFIG_PULL_KEEPER_DISABLED);
 
-//#endif
+    //#endif
 }
 
-void PINMUX_InitALS(void) {
-    CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03u */
+void PINMUX_InitALS(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
 
-    IOMUXC_SetPinMux(
-            PINMUX_ALS_ADC,
-            0U);
+    IOMUXC_SetPinMux(PINMUX_ALS_ADC, 0U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_ALS_ADC,
+    IOMUXC_SetPinConfig(PINMUX_ALS_ADC,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_DISABLED |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_OPEN_DRAIN_DISABLED |
-            PAD_CONFIG_PULL_KEEPER_DISABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_DISABLED | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_OPEN_DRAIN_DISABLED | PAD_CONFIG_PULL_KEEPER_DISABLED | PAD_CONFIG_SELECT_PULL |
+                            PAD_CONFIG_PULL_UP_100kOhm | PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinMux(
-            PINMUX_ALS_GB1,
-            1U);
+    IOMUXC_SetPinMux(PINMUX_ALS_GB1, 1U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_ALS_GB1,
+    IOMUXC_SetPinConfig(PINMUX_ALS_GB1,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinMux(
-            PINMUX_ALS_GB2,
-            1U);
+    IOMUXC_SetPinMux(PINMUX_ALS_GB2, 1U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_ALS_GB2,
+    IOMUXC_SetPinConfig(PINMUX_ALS_GB2,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
-void PINMUX_InitPowerSW(void) {
-    IOMUXC_SetPinMux(
-            PINMUX_POWER_SW,
-            1U);
+void PINMUX_InitPowerSW(void)
+{
+    IOMUXC_SetPinMux(PINMUX_POWER_SW, 1U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_POWER_SW,
+    IOMUXC_SetPinConfig(PINMUX_POWER_SW,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_UP_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_UP_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 
-    IOMUXC_SetPinMux(
-            PINMUX_POWER_HOLD,
-            1U);
+    IOMUXC_SetPinMux(PINMUX_POWER_HOLD, 1U);
 
-    IOMUXC_SetPinConfig(
-            PINMUX_POWER_HOLD,
+    IOMUXC_SetPinConfig(PINMUX_POWER_HOLD,
 
-            PAD_CONFIG_SLEW_RATE_SLOW |
-            PAD_CONFIG_DRIVER_STRENGTH_LVL_1 |
-            PAD_CONFIG_SPEED_SLOW_50MHz |
-            PAD_CONFIG_PULL_KEEPER_ENABLED |
-            PAD_CONFIG_SELECT_PULL |
-            PAD_CONFIG_PULL_DOWN_100kOhm |
-            PAD_CONFIG_HYSTERESIS_DISABLED);
+                        PAD_CONFIG_SLEW_RATE_SLOW | PAD_CONFIG_DRIVER_STRENGTH_LVL_1 | PAD_CONFIG_SPEED_SLOW_50MHz |
+                            PAD_CONFIG_PULL_KEEPER_ENABLED | PAD_CONFIG_SELECT_PULL | PAD_CONFIG_PULL_DOWN_100kOhm |
+                            PAD_CONFIG_HYSTERESIS_DISABLED);
 }
 
 /***********************************************************************************************************************
diff --git a/module-bsp/board/rt1051/common/pin_mux.h b/module-bsp/board/rt1051/common/pin_mux.h
index 3f341d355..58d6c701f 100644
--- a/module-bsp/board/rt1051/common/pin_mux.h
+++ b/module-bsp/board/rt1051/common/pin_mux.h
@@ -46,9 +46,9 @@
 /*! @brief Direction type  */
 typedef enum _pin_mux_direction
 {
-  kPIN_MUX_DirectionInput = 0U,         /* Input direction */
-  kPIN_MUX_DirectionOutput = 1U,        /* Output direction */
-  kPIN_MUX_DirectionInputOrOutput = 2U  /* Input or output direction */
+    kPIN_MUX_DirectionInput         = 0U, /* Input direction */
+    kPIN_MUX_DirectionOutput        = 1U, /* Output direction */
+    kPIN_MUX_DirectionInputOrOutput = 2U  /* Input or output direction */
 } pin_mux_direction_t;
 
 /*!
@@ -61,161 +61,152 @@ typedef enum _pin_mux_direction
  **********************************************************************************************************************/
 
 #if defined(__cplusplus)
-extern "C" {
+extern "C"
+{
 #endif
 
-/*!
- * @brief Calls initialization functions.
- *
- */
-void PINMUX_InitBootPins(void);
+    /*!
+     * @brief Calls initialization functions.
+     *
+     */
+    void PINMUX_InitBootPins(void);
 
-/**
- * DEBUG UART PINMUX DEFINITIONS
- */
+    /**
+     * DEBUG UART PINMUX DEFINITIONS
+     */
 
-#define PINMUX_DEBUGUART_TX		IOMUXC_GPIO_AD_B1_06_LPUART3_TX
-#define PINMUX_DEBUGUART_RX		IOMUXC_GPIO_AD_B1_07_LPUART3_RX
+#define PINMUX_DEBUGUART_TX IOMUXC_GPIO_AD_B1_06_LPUART3_TX
+#define PINMUX_DEBUGUART_RX IOMUXC_GPIO_AD_B1_07_LPUART3_RX
 
-void PINMUX_InitDEBUG_UART(void);
+    void PINMUX_InitDEBUG_UART(void);
 
+    void PINMUX_InitSDRAM(void);
 
+#define PINMUX_EMMC_DATA0 IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0
+#define PINMUX_EMMC_DATA1 IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1
+#define PINMUX_EMMC_DATA2 IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2
+#define PINMUX_EMMC_DATA3 IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3
+#define PINMUX_EMMC_DATA4 IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4
+#define PINMUX_EMMC_DATA5 IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5
+#define PINMUX_EMMC_DATA6 IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6
+#define PINMUX_EMMC_DATA7 IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7
+#define PINMUX_EMMC_CLK   IOMUXC_GPIO_SD_B1_04_USDHC2_CLK
+#define PINMUX_EMMC_CMD   IOMUXC_GPIO_SD_B1_05_USDHC2_CMD
+#define PINMUX_EMMC_RESET IOMUXC_GPIO_SD_B1_06_USDHC2_RESET_B
 
-void PINMUX_InitSDRAM(void);
+    void PINMUX_InitEMMC(void);
 
-#define PINMUX_EMMC_DATA0		IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0
-#define PINMUX_EMMC_DATA1		IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1
-#define PINMUX_EMMC_DATA2		IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2
-#define PINMUX_EMMC_DATA3 		IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3
-#define PINMUX_EMMC_DATA4		IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4
-#define PINMUX_EMMC_DATA5		IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5
-#define PINMUX_EMMC_DATA6		IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6
-#define PINMUX_EMMC_DATA7		IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7
-#define PINMUX_EMMC_CLK			IOMUXC_GPIO_SD_B1_04_USDHC2_CLK
-#define PINMUX_EMMC_CMD			IOMUXC_GPIO_SD_B1_05_USDHC2_CMD
-#define PINMUX_EMMC_RESET		IOMUXC_GPIO_SD_B1_06_USDHC2_RESET_B
+#define PINMUX_AUDIOCODEC_SAIx_MCLK      IOMUXC_GPIO_AD_B0_10_SAI2_MCLK
+#define PINMUX_AUDIOCODEC_SAIx_TX_DATA00 IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA
+#define PINMUX_AUDIOCODEC_SAIx_RX_DATA00 IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA
+#define PINMUX_AUDIOCODEC_SAIx_BCLK      IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK
+#define PINMUX_AUDIOCODEC_SAIx_TX_SYNC   IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC
 
+#define PINMUX_AUDIOCODEC_SCL IOMUXC_GPIO_B0_04_LPI2C2_SCL
+#define PINMUX_AUDIOCODEC_SDA IOMUXC_GPIO_B0_05_LPI2C2_SDA
 
+    void PINMUX_InitAudioCodec(void);
 
+#define PINMUX_KEYBOARD_SCL   IOMUXC_GPIO_B0_04_LPI2C2_SCL
+#define PINMUX_KEYBOARD_SDA   IOMUXC_GPIO_B0_05_LPI2C2_SDA
+#define PINMUX_KEYBOARD_RESET IOMUXC_GPIO_B1_13_GPIO2_IO29
+#define PINMUX_KEYBOARD_IRQ   IOMUXC_GPIO_B1_12_GPIO2_IO28
 
-void PINMUX_InitEMMC(void);
-
-
-#define PINMUX_AUDIOCODEC_SAIx_MCLK				IOMUXC_GPIO_AD_B0_10_SAI2_MCLK
-#define PINMUX_AUDIOCODEC_SAIx_TX_DATA00		IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA
-#define PINMUX_AUDIOCODEC_SAIx_RX_DATA00		IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA
-#define PINMUX_AUDIOCODEC_SAIx_BCLK				IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK
-#define PINMUX_AUDIOCODEC_SAIx_TX_SYNC			IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC
-
-#define PINMUX_AUDIOCODEC_SCL				IOMUXC_GPIO_B0_04_LPI2C2_SCL
-#define PINMUX_AUDIOCODEC_SDA				IOMUXC_GPIO_B0_05_LPI2C2_SDA
-
-void PINMUX_InitAudioCodec(void);
-
-
-#define PINMUX_KEYBOARD_SCL			IOMUXC_GPIO_B0_04_LPI2C2_SCL
-#define PINMUX_KEYBOARD_SDA			IOMUXC_GPIO_B0_05_LPI2C2_SDA
-#define PINMUX_KEYBOARD_RESET		IOMUXC_GPIO_B1_13_GPIO2_IO29
-#define PINMUX_KEYBOARD_IRQ			IOMUXC_GPIO_B1_12_GPIO2_IO28
-
-void PINMUX_InitKeyboard(void);
-
+    void PINMUX_InitKeyboard(void);
 
 /**
  * EINK PINMUX DEFINITIONS
  */
-#define PINMUX_EINK_SCK			IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK
-#define PINMUX_EINK_SDO			IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO
-#define PINMUX_EINK_SDI			IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI
-#define PINMUX_EINK_CS			IOMUXC_GPIO_SD_B0_01_GPIO3_IO13
-#define PINMUX_EINK_BUSY		IOMUXC_GPIO_SD_B0_05_GPIO3_IO17
-#define PINMUX_EINK_RESET		IOMUXC_GPIO_SD_B0_04_GPIO3_IO16
-void PINMUX_InitEINK(void);
+#define PINMUX_EINK_SCK   IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK
+#define PINMUX_EINK_SDO   IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO
+#define PINMUX_EINK_SDI   IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI
+#define PINMUX_EINK_CS    IOMUXC_GPIO_SD_B0_01_GPIO3_IO13
+#define PINMUX_EINK_BUSY  IOMUXC_GPIO_SD_B0_05_GPIO3_IO17
+#define PINMUX_EINK_RESET IOMUXC_GPIO_SD_B0_04_GPIO3_IO16
+    void PINMUX_InitEINK(void);
 
 /**
  * CELLULAR PINMUX DEFINITIONS
  */
-#define PINMUX_CELLULAR_UART_TX             IOMUXC_GPIO_AD_B0_12_LPUART1_TX
-#define PINMUX_CELLULAR_UART_RX             IOMUXC_GPIO_AD_B0_13_LPUART1_RX
-#define PINMUX_CELLULAR_UART_CTS            IOMUXC_GPIO_AD_B0_14_GPIO1_IO14
-#define PINMUX_CELLULAR_UART_RTS            IOMUXC_GPIO_AD_B0_15_GPIO1_IO15
-#define PINMUX_CELLULAR_AP_READY            IOMUXC_GPIO_B1_00_GPIO2_IO16
-#define PINMUX_CELLULAR_RESET               IOMUXC_GPIO_B1_01_GPIO2_IO17
-#define PINMUX_CELLULAR_PWRKEY              IOMUXC_GPIO_B1_02_GPIO2_IO18
-#define PINMUX_CELLULAR_WAKEUP_IN           IOMUXC_GPIO_B1_03_GPIO2_IO19
-#define PINMUX_CELLULAR_SIM_SEL             IOMUXC_GPIO_B1_04_GPIO2_IO20
-#define PINMUX_CELLULAR_RI                  IOMUXC_GPIO_B1_05_GPIO2_IO21
-#define PINMUX_CELLULAR_DTR                 IOMUXC_GPIO_EMC_41_GPIO3_IO27
-#define PINMUX_CELLULAR_SIM_1_INSERTED      IOMUXC_GPIO_B0_11_GPIO2_IO11
-#define PINMUX_CELLULAR_SIM_2_INSERTED      IOMUXC_GPIO_B0_10_GPIO2_IO10
-#define PINMUX_CELLULAR_SIM_PRESENCE        IOMUXC_GPIO_B0_09_GPIO2_IO09
+#define PINMUX_CELLULAR_UART_TX        IOMUXC_GPIO_AD_B0_12_LPUART1_TX
+#define PINMUX_CELLULAR_UART_RX        IOMUXC_GPIO_AD_B0_13_LPUART1_RX
+#define PINMUX_CELLULAR_UART_CTS       IOMUXC_GPIO_AD_B0_14_GPIO1_IO14
+#define PINMUX_CELLULAR_UART_RTS       IOMUXC_GPIO_AD_B0_15_GPIO1_IO15
+#define PINMUX_CELLULAR_AP_READY       IOMUXC_GPIO_B1_00_GPIO2_IO16
+#define PINMUX_CELLULAR_RESET          IOMUXC_GPIO_B1_01_GPIO2_IO17
+#define PINMUX_CELLULAR_PWRKEY         IOMUXC_GPIO_B1_02_GPIO2_IO18
+#define PINMUX_CELLULAR_WAKEUP_IN      IOMUXC_GPIO_B1_03_GPIO2_IO19
+#define PINMUX_CELLULAR_SIM_SEL        IOMUXC_GPIO_B1_04_GPIO2_IO20
+#define PINMUX_CELLULAR_RI             IOMUXC_GPIO_B1_05_GPIO2_IO21
+#define PINMUX_CELLULAR_DTR            IOMUXC_GPIO_EMC_41_GPIO3_IO27
+#define PINMUX_CELLULAR_SIM_1_INSERTED IOMUXC_GPIO_B0_11_GPIO2_IO11
+#define PINMUX_CELLULAR_SIM_2_INSERTED IOMUXC_GPIO_B0_10_GPIO2_IO10
+#define PINMUX_CELLULAR_SIM_PRESENCE   IOMUXC_GPIO_B0_09_GPIO2_IO09
 #define PINMUX_CELLULAR_ANTENNA_SELECT IOMUXC_GPIO_B0_02_GPIO2_IO02
 
-#define PINMUX_CELLULAR_SAIx_MCLK				    IOMUXC_GPIO_AD_B1_09_SAI1_MCLK
-#define PINMUX_CELLULAR_SAIx_TX_DATA00		  IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00
-#define PINMUX_CELLULAR_SAIx_RX_DATA00		  IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00
-#define PINMUX_CELLULAR_SAIx_BCLK				    IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK
-#define PINMUX_CELLULAR_SAIx_TX_SYNC			  IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC
+#define PINMUX_CELLULAR_SAIx_MCLK      IOMUXC_GPIO_AD_B1_09_SAI1_MCLK
+#define PINMUX_CELLULAR_SAIx_TX_DATA00 IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00
+#define PINMUX_CELLULAR_SAIx_RX_DATA00 IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00
+#define PINMUX_CELLULAR_SAIx_BCLK      IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK
+#define PINMUX_CELLULAR_SAIx_TX_SYNC   IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC
 
-void PINMUX_InitCellular(void);
+    void PINMUX_InitCellular(void);
 
 /**
  * BLUETOOTH PINMUX DEFINITIONS
  */
-#define PINMUX_BLUETOOTH_UART_TX             IOMUXC_GPIO_AD_B1_02_LPUART2_TX
-#define PINMUX_BLUETOOTH_UART_RX             IOMUXC_GPIO_AD_B1_03_LPUART2_RX
-#define PINMUX_BLUETOOTH_UART_CTS            IOMUXC_GPIO_AD_B1_00_GPIO1_IO16
-#define PINMUX_BLUETOOTH_UART_RTS            IOMUXC_GPIO_AD_B1_01_GPIO1_IO17
-#define PINMUX_BLUETOOTH_OSC_EN              IOMUXC_GPIO_B0_00_GPIO2_IO00
-#define PINMUX_BLUETOOTH_NSHUTDOWN           IOMUXC_GPIO_B0_01_GPIO2_IO01
+#define PINMUX_BLUETOOTH_UART_TX   IOMUXC_GPIO_AD_B1_02_LPUART2_TX
+#define PINMUX_BLUETOOTH_UART_RX   IOMUXC_GPIO_AD_B1_03_LPUART2_RX
+#define PINMUX_BLUETOOTH_UART_CTS  IOMUXC_GPIO_AD_B1_00_GPIO1_IO16
+#define PINMUX_BLUETOOTH_UART_RTS  IOMUXC_GPIO_AD_B1_01_GPIO1_IO17
+#define PINMUX_BLUETOOTH_OSC_EN    IOMUXC_GPIO_B0_00_GPIO2_IO00
+#define PINMUX_BLUETOOTH_NSHUTDOWN IOMUXC_GPIO_B0_01_GPIO2_IO01
 
-
-void PINMUX_InitBluetoothPins(void);
+    void PINMUX_InitBluetoothPins(void);
 
 /**
  * USB TYPE-C CONTROLLER PINMUX DEFINITIONS
  */
-#define PINMUX_USBC_CONTROLLER_NEN			IOMUXC_GPIO_B1_06_GPIO2_IO22
-#define PINMUX_USBC_CONTROLLER_NINT			IOMUXC_GPIO_B1_09_GPIO2_IO25
-#define PINMUX_USBC_CONTROLLER_ID			IOMUXC_GPIO_B1_10_GPIO2_IO26
-#define PINMUX_USBC_CONTROLLER_PORT			IOMUXC_GPIO_B1_07_GPIO2_IO23
-void PINMUX_InitUSBC(void);
+#define PINMUX_USBC_CONTROLLER_NEN  IOMUXC_GPIO_B1_06_GPIO2_IO22
+#define PINMUX_USBC_CONTROLLER_NINT IOMUXC_GPIO_B1_09_GPIO2_IO25
+#define PINMUX_USBC_CONTROLLER_ID   IOMUXC_GPIO_B1_10_GPIO2_IO26
+#define PINMUX_USBC_CONTROLLER_PORT IOMUXC_GPIO_B1_07_GPIO2_IO23
+    void PINMUX_InitUSBC(void);
 
 /**
  * LED DRIVER PINMUX DEFINITIONS
  */
-#define PINMUX_LEDDRIVER_NRST			    IOMUXC_GPIO_AD_B0_03_GPIO1_IO03
-void PINMUX_InitLEDDRIVER(void);
-
+#define PINMUX_LEDDRIVER_NRST IOMUXC_GPIO_AD_B0_03_GPIO1_IO03
+    void PINMUX_InitLEDDRIVER(void);
 
 /**
  * JACK DETECTION PINMUX DEFINITIONS
  */
-#define PINMUX_JACKDET_IRQ			        IOMUXC_GPIO_B1_14_GPIO2_IO30
-void PINMUX_InitJACKDET(void);
+#define PINMUX_JACKDET_IRQ IOMUXC_GPIO_B1_14_GPIO2_IO30
+    void PINMUX_InitJACKDET(void);
 
 /**
  * BATTERY CHARGER PINMUX DEFINITIONS
  */
-#define PINUMX_BATTERY_CHARGER_INOKB_IRQ    IOMUXC_GPIO_B0_12_GPIO2_IO12
-#define PINUMX_BATTERY_CHARGER_WCINOKB_IRQ  IOMUXC_GPIO_B0_13_GPIO2_IO13
-#define PINUMX_BATTERY_CHARGER_INTB_IRQ     IOMUXC_GPIO_B0_14_GPIO2_IO14
+#define PINUMX_BATTERY_CHARGER_INOKB_IRQ   IOMUXC_GPIO_B0_12_GPIO2_IO12
+#define PINUMX_BATTERY_CHARGER_WCINOKB_IRQ IOMUXC_GPIO_B0_13_GPIO2_IO13
+#define PINUMX_BATTERY_CHARGER_INTB_IRQ    IOMUXC_GPIO_B0_14_GPIO2_IO14
 
-void PINMUX_InitBatteryCharger(void);
+    void PINMUX_InitBatteryCharger(void);
 
-#define PINMUX_KEYBOARD_POWER_ENABLE_PAD    IOMUXC_GPIO_B0_07_GPIO2_IO07
-#define PINMUX_KEYBOARD_RF_BUTTON_PAD       IOMUXC_GPIO_B0_06_GPIO2_IO06
+#define PINMUX_KEYBOARD_POWER_ENABLE_PAD IOMUXC_GPIO_B0_07_GPIO2_IO07
+#define PINMUX_KEYBOARD_RF_BUTTON_PAD    IOMUXC_GPIO_B0_06_GPIO2_IO06
 
-void PINMUX_InitPowerButton(void);
+    void PINMUX_InitPowerButton(void);
 
-#define PINMUX_ALS_ADC                  	IOMUXC_GPIO_AD_B1_08_GPIO1_IO24	//gpio_ad_b1_08 - gpio1.24 - alt5
-#define PINMUX_ALS_GB1                  	IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 //GPIO_AD_B1_10
-#define PINMUX_ALS_GB2                  	IOMUXC_GPIO_AD_B1_11_GPIO1_IO27 //GPIO_AD_B1_11
-void PINMUX_InitALS(void);
+#define PINMUX_ALS_ADC IOMUXC_GPIO_AD_B1_08_GPIO1_IO24 // gpio_ad_b1_08 - gpio1.24 - alt5
+#define PINMUX_ALS_GB1 IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 // GPIO_AD_B1_10
+#define PINMUX_ALS_GB2 IOMUXC_GPIO_AD_B1_11_GPIO1_IO27 // GPIO_AD_B1_11
+    void PINMUX_InitALS(void);
 
-#define PINMUX_POWER_SW						IOMUXC_GPIO_B0_06_GPIO2_IO06
-#define PINMUX_POWER_HOLD					IOMUXC_GPIO_B0_07_GPIO2_IO07
-void PINMUX_InitPowerSW(void);
+#define PINMUX_POWER_SW   IOMUXC_GPIO_B0_06_GPIO2_IO06
+#define PINMUX_POWER_HOLD IOMUXC_GPIO_B0_07_GPIO2_IO07
+    void PINMUX_InitPowerSW(void);
 
 #if defined(__cplusplus)
 }
diff --git a/module-bsp/board/rt1051/common/pin_names.h b/module-bsp/board/rt1051/common/pin_names.h
index 53e4ed726..6f98ebc73 100644
--- a/module-bsp/board/rt1051/common/pin_names.h
+++ b/module-bsp/board/rt1051/common/pin_names.h
@@ -10,9 +10,10 @@
 #ifndef BSP_BOARD_PIN_NAMES_H_
 #define BSP_BOARD_PIN_NAMES_H_
 
-#define GPIO_PORT_SHIFT      0
+#define GPIO_PORT_SHIFT 0
 
-typedef enum {
+typedef enum
+{
     WAKEUP        = ((5 << GPIO_PORT_SHIFT) | 0),
     PMIC_ON_REQ   = ((5 << GPIO_PORT_SHIFT) | 1),
     PMIC_STBY_REQ = ((5 << GPIO_PORT_SHIFT) | 2),
diff --git a/module-bsp/board/rt1051/common/startup_mimxrt1052.cpp b/module-bsp/board/rt1051/common/startup_mimxrt1052.cpp
index e64c65f48..ec4f292ac 100644
--- a/module-bsp/board/rt1051/common/startup_mimxrt1052.cpp
+++ b/module-bsp/board/rt1051/common/startup_mimxrt1052.cpp
@@ -38,12 +38,12 @@
 // IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 //*****************************************************************************
 
-#if defined (DEBUG)
+#if defined(DEBUG)
 #pragma GCC push_options
-#pragma GCC optimize ("Og")
+#pragma GCC optimize("Og")
 #endif // (DEBUG)
 
-#if defined (__cplusplus)
+#if defined(__cplusplus)
 #ifdef __REDLIB__
 #error Redlib does not support C++
 #else
@@ -52,19 +52,21 @@
 // The entry point for the C++ library startup
 //
 //*****************************************************************************
-extern "C" {
+extern "C"
+{
     extern void __libc_init_array(void);
 }
 #endif
 #endif
 
-#define WEAK __attribute__ ((weak))
-#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))
-#define ALIAS(f) __attribute__ ((weak, alias (#f)))
+#define WEAK     __attribute__((weak))
+#define WEAK_AV  __attribute__((weak, section(".after_vectors")))
+#define ALIAS(f) __attribute__((weak, alias(#f)))
 
 //*****************************************************************************
-#if defined (__cplusplus)
-extern "C" {
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 
 //*****************************************************************************
@@ -75,376 +77,376 @@ extern "C" {
 //*****************************************************************************
 // Declaration of external SystemInit function
 //*****************************************************************************
-#if defined (__USE_CMSIS)
-extern void SystemInit(void);
+#if defined(__USE_CMSIS)
+    extern void SystemInit(void);
 #endif // (__USE_CMSIS)
 
-//*****************************************************************************
-// Forward declaration of the core exception handlers.
-// When the application defines a handler (with the same name), this will
-// automatically take precedence over these weak definitions
-//*****************************************************************************
-     void ResetISR(void);
-WEAK void NMI_Handler(void);
-WEAK void HardFault_Handler(void);
-WEAK void SVC_Handler(void);
-WEAK void PendSV_Handler(void);
-WEAK void SysTick_Handler(void);
-WEAK void IntDefaultHandler(void);
-WEAK void MemManage_Handler (void);
-WEAK void UsageFault_Handler (void);
-WEAK void BusFault_Handler (void);
+    //*****************************************************************************
+    // Forward declaration of the core exception handlers.
+    // When the application defines a handler (with the same name), this will
+    // automatically take precedence over these weak definitions
+    //*****************************************************************************
+    void ResetISR(void);
+    WEAK void NMI_Handler(void);
+    WEAK void HardFault_Handler(void);
+    WEAK void SVC_Handler(void);
+    WEAK void PendSV_Handler(void);
+    WEAK void SysTick_Handler(void);
+    WEAK void IntDefaultHandler(void);
+    WEAK void MemManage_Handler(void);
+    WEAK void UsageFault_Handler(void);
+    WEAK void BusFault_Handler(void);
 
-//*****************************************************************************
-// Forward declaration of the application IRQ handlers. When the application
-// defines a handler (with the same name), this will automatically take
-// precedence over weak definitions below
-//*****************************************************************************
-WEAK void DMA0_DMA16_IRQHandler(void);
-WEAK void DMA1_DMA17_IRQHandler(void);
-WEAK void DMA2_DMA18_IRQHandler(void);
-WEAK void DMA3_DMA19_IRQHandler(void);
-WEAK void DMA4_DMA20_IRQHandler(void);
-WEAK void DMA5_DMA21_IRQHandler(void);
-WEAK void DMA6_DMA22_IRQHandler(void);
-WEAK void DMA7_DMA23_IRQHandler(void);
-WEAK void DMA8_DMA24_IRQHandler(void);
-WEAK void DMA9_DMA25_IRQHandler(void);
-WEAK void DMA10_DMA26_IRQHandler(void);
-WEAK void DMA11_DMA27_IRQHandler(void);
-WEAK void DMA12_DMA28_IRQHandler(void);
-WEAK void DMA13_DMA29_IRQHandler(void);
-WEAK void DMA14_DMA30_IRQHandler(void);
-WEAK void DMA15_DMA31_IRQHandler(void);
-WEAK void DMA_ERROR_IRQHandler(void);
-WEAK void CTI0_ERROR_IRQHandler(void);
-WEAK void CTI1_ERROR_IRQHandler(void);
-WEAK void CORE_IRQHandler(void);
-WEAK void LPUART1_IRQHandler(void);
-WEAK void LPUART2_IRQHandler(void);
-WEAK void LPUART3_IRQHandler(void);
-WEAK void LPUART4_IRQHandler(void);
-WEAK void LPUART5_IRQHandler(void);
-WEAK void LPUART6_IRQHandler(void);
-WEAK void LPUART7_IRQHandler(void);
-WEAK void LPUART8_IRQHandler(void);
-WEAK void LPI2C1_IRQHandler(void);
-WEAK void LPI2C2_IRQHandler(void);
-WEAK void LPI2C3_IRQHandler(void);
-WEAK void LPI2C4_IRQHandler(void);
-WEAK void LPSPI1_IRQHandler(void);
-WEAK void LPSPI2_IRQHandler(void);
-WEAK void LPSPI3_IRQHandler(void);
-WEAK void LPSPI4_IRQHandler(void);
-WEAK void CAN1_IRQHandler(void);
-WEAK void CAN2_IRQHandler(void);
-WEAK void FLEXRAM_IRQHandler(void);
-WEAK void KPP_IRQHandler(void);
-WEAK void TSC_DIG_IRQHandler(void);
-WEAK void GPR_IRQ_IRQHandler(void);
-WEAK void LCDIF_IRQHandler(void);
-WEAK void CSI_IRQHandler(void);
-WEAK void PXP_IRQHandler(void);
-WEAK void WDOG2_IRQHandler(void);
-WEAK void SNVS_HP_WRAPPER_IRQHandler(void);
-WEAK void SNVS_HP_WRAPPER_TZ_IRQHandler(void);
-WEAK void SNVS_LP_WRAPPER_IRQHandler(void);
-WEAK void CSU_IRQHandler(void);
-WEAK void DCP_IRQHandler(void);
-WEAK void DCP_VMI_IRQHandler(void);
-WEAK void Reserved68_IRQHandler(void);
-WEAK void TRNG_IRQHandler(void);
-WEAK void SJC_IRQHandler(void);
-WEAK void BEE_IRQHandler(void);
-WEAK void SAI1_IRQHandler(void);
-WEAK void SAI2_IRQHandler(void);
-WEAK void SAI3_RX_IRQHandler(void);
-WEAK void SAI3_TX_IRQHandler(void);
-WEAK void SPDIF_IRQHandler(void);
-WEAK void ANATOP_EVENT0_IRQHandler(void);
-WEAK void ANATOP_EVENT1_IRQHandler(void);
-WEAK void ANATOP_TAMP_LOW_HIGH_IRQHandler(void);
-WEAK void ANATOP_TEMP_PANIC_IRQHandler(void);
-WEAK void USB_PHY1_IRQHandler(void);
-WEAK void USB_PHY2_IRQHandler(void);
-WEAK void ADC1_IRQHandler(void);
-WEAK void ADC2_IRQHandler(void);
-WEAK void DCDC_IRQHandler(void);
-WEAK void Reserved86_IRQHandler(void);
-WEAK void Reserved87_IRQHandler(void);
-WEAK void GPIO1_INT0_IRQHandler(void);
-WEAK void GPIO1_INT1_IRQHandler(void);
-WEAK void GPIO1_INT2_IRQHandler(void);
-WEAK void GPIO1_INT3_IRQHandler(void);
-WEAK void GPIO1_INT4_IRQHandler(void);
-WEAK void GPIO1_INT5_IRQHandler(void);
-WEAK void GPIO1_INT6_IRQHandler(void);
-WEAK void GPIO1_INT7_IRQHandler(void);
-WEAK void GPIO1_Combined_0_15_IRQHandler(void);
-WEAK void GPIO1_Combined_16_31_IRQHandler(void);
-WEAK void GPIO2_Combined_0_15_IRQHandler(void);
-WEAK void GPIO2_Combined_16_31_IRQHandler(void);
-WEAK void GPIO3_Combined_0_15_IRQHandler(void);
-WEAK void GPIO3_Combined_16_31_IRQHandler(void);
-WEAK void GPIO4_Combined_0_15_IRQHandler(void);
-WEAK void GPIO4_Combined_16_31_IRQHandler(void);
-WEAK void GPIO5_Combined_0_15_IRQHandler(void);
-WEAK void GPIO5_Combined_16_31_IRQHandler(void);
-WEAK void FLEXIO1_IRQHandler(void);
-WEAK void FLEXIO2_IRQHandler(void);
-WEAK void WDOG1_IRQHandler(void);
-WEAK void RTWDOG_IRQHandler(void);
-WEAK void EWM_IRQHandler(void);
-WEAK void CCM_1_IRQHandler(void);
-WEAK void CCM_2_IRQHandler(void);
-WEAK void GPC_IRQHandler(void);
-WEAK void SRC_IRQHandler(void);
-WEAK void Reserved115_IRQHandler(void);
-WEAK void GPT1_IRQHandler(void);
-WEAK void GPT2_IRQHandler(void);
-WEAK void PWM1_0_IRQHandler(void);
-WEAK void PWM1_1_IRQHandler(void);
-WEAK void PWM1_2_IRQHandler(void);
-WEAK void PWM1_3_IRQHandler(void);
-WEAK void PWM1_FAULT_IRQHandler(void);
-WEAK void Reserved123_IRQHandler(void);
-WEAK void FLEXSPI_IRQHandler(void);
-WEAK void SEMC_IRQHandler(void);
-WEAK void USDHC1_IRQHandler(void);
-WEAK void USDHC2_IRQHandler(void);
-WEAK void USB_OTG2_IRQHandler(void);
-WEAK void USB_OTG1_IRQHandler(void);
-WEAK void ENET_IRQHandler(void);
-WEAK void ENET_1588_Timer_IRQHandler(void);
-WEAK void XBAR1_IRQ_0_1_IRQHandler(void);
-WEAK void XBAR1_IRQ_2_3_IRQHandler(void);
-WEAK void ADC_ETC_IRQ0_IRQHandler(void);
-WEAK void ADC_ETC_IRQ1_IRQHandler(void);
-WEAK void ADC_ETC_IRQ2_IRQHandler(void);
-WEAK void ADC_ETC_ERROR_IRQ_IRQHandler(void);
-WEAK void PIT_IRQHandler(void);
-WEAK void ACMP1_IRQHandler(void);
-WEAK void ACMP2_IRQHandler(void);
-WEAK void ACMP3_IRQHandler(void);
-WEAK void ACMP4_IRQHandler(void);
-WEAK void Reserved143_IRQHandler(void);
-WEAK void Reserved144_IRQHandler(void);
-WEAK void ENC1_IRQHandler(void);
-WEAK void ENC2_IRQHandler(void);
-WEAK void ENC3_IRQHandler(void);
-WEAK void ENC4_IRQHandler(void);
-WEAK void TMR1_IRQHandler(void);
-WEAK void TMR2_IRQHandler(void);
-WEAK void TMR3_IRQHandler(void);
-WEAK void TMR4_IRQHandler(void);
-WEAK void PWM2_0_IRQHandler(void);
-WEAK void PWM2_1_IRQHandler(void);
-WEAK void PWM2_2_IRQHandler(void);
-WEAK void PWM2_3_IRQHandler(void);
-WEAK void PWM2_FAULT_IRQHandler(void);
-WEAK void PWM3_0_IRQHandler(void);
-WEAK void PWM3_1_IRQHandler(void);
-WEAK void PWM3_2_IRQHandler(void);
-WEAK void PWM3_3_IRQHandler(void);
-WEAK void PWM3_FAULT_IRQHandler(void);
-WEAK void PWM4_0_IRQHandler(void);
-WEAK void PWM4_1_IRQHandler(void);
-WEAK void PWM4_2_IRQHandler(void);
-WEAK void PWM4_3_IRQHandler(void);
-WEAK void PWM4_FAULT_IRQHandler(void);
-WEAK void Reserved168_IRQHandler(void);
-WEAK void Reserved169_IRQHandler(void);
-WEAK void Reserved170_IRQHandler(void);
-WEAK void Reserved171_IRQHandler(void);
-WEAK void Reserved172_IRQHandler(void);
-WEAK void Reserved173_IRQHandler(void);
-WEAK void SJC_ARM_DEBUG_IRQHandler(void);
-WEAK void NMI_WAKEUP_IRQHandler(void);
+    //*****************************************************************************
+    // Forward declaration of the application IRQ handlers. When the application
+    // defines a handler (with the same name), this will automatically take
+    // precedence over weak definitions below
+    //*****************************************************************************
+    WEAK void DMA0_DMA16_IRQHandler(void);
+    WEAK void DMA1_DMA17_IRQHandler(void);
+    WEAK void DMA2_DMA18_IRQHandler(void);
+    WEAK void DMA3_DMA19_IRQHandler(void);
+    WEAK void DMA4_DMA20_IRQHandler(void);
+    WEAK void DMA5_DMA21_IRQHandler(void);
+    WEAK void DMA6_DMA22_IRQHandler(void);
+    WEAK void DMA7_DMA23_IRQHandler(void);
+    WEAK void DMA8_DMA24_IRQHandler(void);
+    WEAK void DMA9_DMA25_IRQHandler(void);
+    WEAK void DMA10_DMA26_IRQHandler(void);
+    WEAK void DMA11_DMA27_IRQHandler(void);
+    WEAK void DMA12_DMA28_IRQHandler(void);
+    WEAK void DMA13_DMA29_IRQHandler(void);
+    WEAK void DMA14_DMA30_IRQHandler(void);
+    WEAK void DMA15_DMA31_IRQHandler(void);
+    WEAK void DMA_ERROR_IRQHandler(void);
+    WEAK void CTI0_ERROR_IRQHandler(void);
+    WEAK void CTI1_ERROR_IRQHandler(void);
+    WEAK void CORE_IRQHandler(void);
+    WEAK void LPUART1_IRQHandler(void);
+    WEAK void LPUART2_IRQHandler(void);
+    WEAK void LPUART3_IRQHandler(void);
+    WEAK void LPUART4_IRQHandler(void);
+    WEAK void LPUART5_IRQHandler(void);
+    WEAK void LPUART6_IRQHandler(void);
+    WEAK void LPUART7_IRQHandler(void);
+    WEAK void LPUART8_IRQHandler(void);
+    WEAK void LPI2C1_IRQHandler(void);
+    WEAK void LPI2C2_IRQHandler(void);
+    WEAK void LPI2C3_IRQHandler(void);
+    WEAK void LPI2C4_IRQHandler(void);
+    WEAK void LPSPI1_IRQHandler(void);
+    WEAK void LPSPI2_IRQHandler(void);
+    WEAK void LPSPI3_IRQHandler(void);
+    WEAK void LPSPI4_IRQHandler(void);
+    WEAK void CAN1_IRQHandler(void);
+    WEAK void CAN2_IRQHandler(void);
+    WEAK void FLEXRAM_IRQHandler(void);
+    WEAK void KPP_IRQHandler(void);
+    WEAK void TSC_DIG_IRQHandler(void);
+    WEAK void GPR_IRQ_IRQHandler(void);
+    WEAK void LCDIF_IRQHandler(void);
+    WEAK void CSI_IRQHandler(void);
+    WEAK void PXP_IRQHandler(void);
+    WEAK void WDOG2_IRQHandler(void);
+    WEAK void SNVS_HP_WRAPPER_IRQHandler(void);
+    WEAK void SNVS_HP_WRAPPER_TZ_IRQHandler(void);
+    WEAK void SNVS_LP_WRAPPER_IRQHandler(void);
+    WEAK void CSU_IRQHandler(void);
+    WEAK void DCP_IRQHandler(void);
+    WEAK void DCP_VMI_IRQHandler(void);
+    WEAK void Reserved68_IRQHandler(void);
+    WEAK void TRNG_IRQHandler(void);
+    WEAK void SJC_IRQHandler(void);
+    WEAK void BEE_IRQHandler(void);
+    WEAK void SAI1_IRQHandler(void);
+    WEAK void SAI2_IRQHandler(void);
+    WEAK void SAI3_RX_IRQHandler(void);
+    WEAK void SAI3_TX_IRQHandler(void);
+    WEAK void SPDIF_IRQHandler(void);
+    WEAK void ANATOP_EVENT0_IRQHandler(void);
+    WEAK void ANATOP_EVENT1_IRQHandler(void);
+    WEAK void ANATOP_TAMP_LOW_HIGH_IRQHandler(void);
+    WEAK void ANATOP_TEMP_PANIC_IRQHandler(void);
+    WEAK void USB_PHY1_IRQHandler(void);
+    WEAK void USB_PHY2_IRQHandler(void);
+    WEAK void ADC1_IRQHandler(void);
+    WEAK void ADC2_IRQHandler(void);
+    WEAK void DCDC_IRQHandler(void);
+    WEAK void Reserved86_IRQHandler(void);
+    WEAK void Reserved87_IRQHandler(void);
+    WEAK void GPIO1_INT0_IRQHandler(void);
+    WEAK void GPIO1_INT1_IRQHandler(void);
+    WEAK void GPIO1_INT2_IRQHandler(void);
+    WEAK void GPIO1_INT3_IRQHandler(void);
+    WEAK void GPIO1_INT4_IRQHandler(void);
+    WEAK void GPIO1_INT5_IRQHandler(void);
+    WEAK void GPIO1_INT6_IRQHandler(void);
+    WEAK void GPIO1_INT7_IRQHandler(void);
+    WEAK void GPIO1_Combined_0_15_IRQHandler(void);
+    WEAK void GPIO1_Combined_16_31_IRQHandler(void);
+    WEAK void GPIO2_Combined_0_15_IRQHandler(void);
+    WEAK void GPIO2_Combined_16_31_IRQHandler(void);
+    WEAK void GPIO3_Combined_0_15_IRQHandler(void);
+    WEAK void GPIO3_Combined_16_31_IRQHandler(void);
+    WEAK void GPIO4_Combined_0_15_IRQHandler(void);
+    WEAK void GPIO4_Combined_16_31_IRQHandler(void);
+    WEAK void GPIO5_Combined_0_15_IRQHandler(void);
+    WEAK void GPIO5_Combined_16_31_IRQHandler(void);
+    WEAK void FLEXIO1_IRQHandler(void);
+    WEAK void FLEXIO2_IRQHandler(void);
+    WEAK void WDOG1_IRQHandler(void);
+    WEAK void RTWDOG_IRQHandler(void);
+    WEAK void EWM_IRQHandler(void);
+    WEAK void CCM_1_IRQHandler(void);
+    WEAK void CCM_2_IRQHandler(void);
+    WEAK void GPC_IRQHandler(void);
+    WEAK void SRC_IRQHandler(void);
+    WEAK void Reserved115_IRQHandler(void);
+    WEAK void GPT1_IRQHandler(void);
+    WEAK void GPT2_IRQHandler(void);
+    WEAK void PWM1_0_IRQHandler(void);
+    WEAK void PWM1_1_IRQHandler(void);
+    WEAK void PWM1_2_IRQHandler(void);
+    WEAK void PWM1_3_IRQHandler(void);
+    WEAK void PWM1_FAULT_IRQHandler(void);
+    WEAK void Reserved123_IRQHandler(void);
+    WEAK void FLEXSPI_IRQHandler(void);
+    WEAK void SEMC_IRQHandler(void);
+    WEAK void USDHC1_IRQHandler(void);
+    WEAK void USDHC2_IRQHandler(void);
+    WEAK void USB_OTG2_IRQHandler(void);
+    WEAK void USB_OTG1_IRQHandler(void);
+    WEAK void ENET_IRQHandler(void);
+    WEAK void ENET_1588_Timer_IRQHandler(void);
+    WEAK void XBAR1_IRQ_0_1_IRQHandler(void);
+    WEAK void XBAR1_IRQ_2_3_IRQHandler(void);
+    WEAK void ADC_ETC_IRQ0_IRQHandler(void);
+    WEAK void ADC_ETC_IRQ1_IRQHandler(void);
+    WEAK void ADC_ETC_IRQ2_IRQHandler(void);
+    WEAK void ADC_ETC_ERROR_IRQ_IRQHandler(void);
+    WEAK void PIT_IRQHandler(void);
+    WEAK void ACMP1_IRQHandler(void);
+    WEAK void ACMP2_IRQHandler(void);
+    WEAK void ACMP3_IRQHandler(void);
+    WEAK void ACMP4_IRQHandler(void);
+    WEAK void Reserved143_IRQHandler(void);
+    WEAK void Reserved144_IRQHandler(void);
+    WEAK void ENC1_IRQHandler(void);
+    WEAK void ENC2_IRQHandler(void);
+    WEAK void ENC3_IRQHandler(void);
+    WEAK void ENC4_IRQHandler(void);
+    WEAK void TMR1_IRQHandler(void);
+    WEAK void TMR2_IRQHandler(void);
+    WEAK void TMR3_IRQHandler(void);
+    WEAK void TMR4_IRQHandler(void);
+    WEAK void PWM2_0_IRQHandler(void);
+    WEAK void PWM2_1_IRQHandler(void);
+    WEAK void PWM2_2_IRQHandler(void);
+    WEAK void PWM2_3_IRQHandler(void);
+    WEAK void PWM2_FAULT_IRQHandler(void);
+    WEAK void PWM3_0_IRQHandler(void);
+    WEAK void PWM3_1_IRQHandler(void);
+    WEAK void PWM3_2_IRQHandler(void);
+    WEAK void PWM3_3_IRQHandler(void);
+    WEAK void PWM3_FAULT_IRQHandler(void);
+    WEAK void PWM4_0_IRQHandler(void);
+    WEAK void PWM4_1_IRQHandler(void);
+    WEAK void PWM4_2_IRQHandler(void);
+    WEAK void PWM4_3_IRQHandler(void);
+    WEAK void PWM4_FAULT_IRQHandler(void);
+    WEAK void Reserved168_IRQHandler(void);
+    WEAK void Reserved169_IRQHandler(void);
+    WEAK void Reserved170_IRQHandler(void);
+    WEAK void Reserved171_IRQHandler(void);
+    WEAK void Reserved172_IRQHandler(void);
+    WEAK void Reserved173_IRQHandler(void);
+    WEAK void SJC_ARM_DEBUG_IRQHandler(void);
+    WEAK void NMI_WAKEUP_IRQHandler(void);
 
-//*****************************************************************************
-// Forward declaration of the driver IRQ handlers. These are aliased
-// to the IntDefaultHandler, which is a 'forever' loop. When the driver
-// defines a handler (with the same name), this will automatically take
-// precedence over these weak definitions
-//*****************************************************************************
-void DMA0_DMA16_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA1_DMA17_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA2_DMA18_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA3_DMA19_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA4_DMA20_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA5_DMA21_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA6_DMA22_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA7_DMA23_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA8_DMA24_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA9_DMA25_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA10_DMA26_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA11_DMA27_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA12_DMA28_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA13_DMA29_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA14_DMA30_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA15_DMA31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DMA_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CTI0_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CTI1_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CORE_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPUART8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPI2C1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPI2C2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPI2C3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPI2C4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPSPI1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPSPI2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPSPI3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LPSPI4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CAN1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CAN2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void FLEXRAM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void KPP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TSC_DIG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPR_IRQ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void LCDIF_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CSI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PXP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void WDOG2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SNVS_HP_WRAPPER_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SNVS_HP_WRAPPER_TZ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SNVS_LP_WRAPPER_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CSU_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DCP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DCP_VMI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved68_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TRNG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SJC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void BEE_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SAI1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SAI2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SAI3_RX_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SAI3_TX_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SPDIF_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ANATOP_EVENT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ANATOP_EVENT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ANATOP_TAMP_LOW_HIGH_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ANATOP_TEMP_PANIC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_PHY1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_PHY2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void DCDC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved86_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved87_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO1_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO2_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO2_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO3_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO3_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO4_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO4_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO5_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPIO5_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void FLEXIO1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void FLEXIO2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void WDOG1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void RTWDOG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void EWM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CCM_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void CCM_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SRC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved115_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void GPT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM1_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM1_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM1_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM1_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM1_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved123_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void FLEXSPI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SEMC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USDHC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USDHC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_OTG2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void USB_OTG1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENET_1588_Timer_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void XBAR1_IRQ_0_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void XBAR1_IRQ_2_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC_ETC_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC_ETC_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC_ETC_IRQ2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ADC_ETC_ERROR_IRQ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ACMP1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ACMP2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ACMP3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ACMP4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved143_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved144_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENC3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void ENC4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TMR1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TMR2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TMR3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void TMR4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM2_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM2_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM2_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM2_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM2_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM3_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM3_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM3_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM3_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM3_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM4_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM4_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM4_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM4_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void PWM4_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved168_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved169_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved170_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved171_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved172_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void Reserved173_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void SJC_ARM_DEBUG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
-void NMI_WAKEUP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    //*****************************************************************************
+    // Forward declaration of the driver IRQ handlers. These are aliased
+    // to the IntDefaultHandler, which is a 'forever' loop. When the driver
+    // defines a handler (with the same name), this will automatically take
+    // precedence over these weak definitions
+    //*****************************************************************************
+    void DMA0_DMA16_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA1_DMA17_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA2_DMA18_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA3_DMA19_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA4_DMA20_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA5_DMA21_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA6_DMA22_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA7_DMA23_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA8_DMA24_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA9_DMA25_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA10_DMA26_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA11_DMA27_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA12_DMA28_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA13_DMA29_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA14_DMA30_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA15_DMA31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DMA_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CTI0_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CTI1_ERROR_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CORE_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPUART8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPI2C1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPI2C2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPI2C3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPI2C4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPSPI1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPSPI2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPSPI3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LPSPI4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CAN1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CAN2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void FLEXRAM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void KPP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TSC_DIG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPR_IRQ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void LCDIF_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CSI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PXP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void WDOG2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SNVS_HP_WRAPPER_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SNVS_HP_WRAPPER_TZ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SNVS_LP_WRAPPER_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CSU_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DCP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DCP_VMI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved68_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TRNG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SJC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void BEE_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SAI1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SAI2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SAI3_RX_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SAI3_TX_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SPDIF_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ANATOP_EVENT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ANATOP_EVENT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ANATOP_TAMP_LOW_HIGH_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ANATOP_TEMP_PANIC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USB_PHY1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USB_PHY2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void DCDC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved86_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved87_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO1_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO2_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO2_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO3_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO3_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO4_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO4_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO5_Combined_0_15_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPIO5_Combined_16_31_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void FLEXIO1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void FLEXIO2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void WDOG1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void RTWDOG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void EWM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CCM_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void CCM_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SRC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved115_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void GPT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM1_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM1_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM1_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM1_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM1_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved123_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void FLEXSPI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SEMC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USDHC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USDHC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USB_OTG2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void USB_OTG1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENET_1588_Timer_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void XBAR1_IRQ_0_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void XBAR1_IRQ_2_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC_ETC_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC_ETC_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC_ETC_IRQ2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ADC_ETC_ERROR_IRQ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ACMP1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ACMP2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ACMP3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ACMP4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved143_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved144_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENC1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENC2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENC3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void ENC4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TMR1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TMR2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TMR3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void TMR4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM2_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM2_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM2_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM2_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM2_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM3_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM3_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM3_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM3_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM3_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM4_0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM4_1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM4_2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM4_3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void PWM4_FAULT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved168_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved169_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved170_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved171_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved172_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void Reserved173_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void SJC_ARM_DEBUG_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
+    void NMI_WAKEUP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
 
 //*****************************************************************************
 // The entry point for the application.
 // __main() is the entry point for Redlib based applications
 // main() is the entry point for Newlib based applications
 //*****************************************************************************
-#if defined (__REDLIB__)
-extern void __main(void);
+#if defined(__REDLIB__)
+    extern void __main(void);
 #endif
-extern int main(void);
-extern int unit_tests_main(void);
+    extern int main(void);
+    extern int unit_tests_main(void);
 
+    //*****************************************************************************
+    // External declaration for the pointer to the stack top from the Linker Script
+    //*****************************************************************************
+    extern void _vStackTop(void);
 //*****************************************************************************
-// External declaration for the pointer to the stack top from the Linker Script
-//*****************************************************************************
-extern void _vStackTop(void);
-//*****************************************************************************
-#if defined (__cplusplus)
+#if defined(__cplusplus)
 } // extern "C"
 #endif
 
@@ -459,191 +461,190 @@ extern void _vStackTop(void);
 // The vector table.
 // This relies on the linker script to place at correct location in memory.
 //*****************************************************************************
-extern void (* const g_pfnVectors[])(void);
-extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));
+extern void (*const g_pfnVectors[])(void);
+extern void *__Vectors __attribute__((alias("g_pfnVectors")));
 
-__attribute__ ((used, section(".isr_vector")))
-void (* const g_pfnVectors[])(void) = {
+__attribute__((used, section(".isr_vector"))) void (*const g_pfnVectors[])(void) = {
     // Core Level - CM7
-    &_vStackTop,                       // The initial stack pointer
-    ResetISR,                          // The reset handler
-    NMI_Handler,                       // The NMI handler
-    HardFault_Handler,                 // The hard fault handler
-    MemManage_Handler,                 // The MPU fault handler
-    BusFault_Handler,                  // The bus fault handler
-    UsageFault_Handler,                // The usage fault handler
-    0,                                 // Reserved
-    0,                                 // Reserved
-    0,                                 // Reserved
-    0,                                 // Reserved
-    SVC_Handler,                       // SVCall handler
-    0,                                 // Reserved
-    0,                                 // Reserved
-    PendSV_Handler,                    // The PendSV handler
-    SysTick_Handler,                   // The SysTick handler
+    &_vStackTop,        // The initial stack pointer
+    ResetISR,           // The reset handler
+    NMI_Handler,        // The NMI handler
+    HardFault_Handler,  // The hard fault handler
+    MemManage_Handler,  // The MPU fault handler
+    BusFault_Handler,   // The bus fault handler
+    UsageFault_Handler, // The usage fault handler
+    0,                  // Reserved
+    0,                  // Reserved
+    0,                  // Reserved
+    0,                  // Reserved
+    SVC_Handler,        // SVCall handler
+    0,                  // Reserved
+    0,                  // Reserved
+    PendSV_Handler,     // The PendSV handler
+    SysTick_Handler,    // The SysTick handler
 
     // Chip Level - MIMXRT1052
-    DMA0_DMA16_IRQHandler,            // 16 : DMA channel 0/16 transfer complete
-    DMA1_DMA17_IRQHandler,            // 17 : DMA channel 1/17 transfer complete
-    DMA2_DMA18_IRQHandler,            // 18 : DMA channel 2/18 transfer complete
-    DMA3_DMA19_IRQHandler,            // 19 : DMA channel 3/19 transfer complete
-    DMA4_DMA20_IRQHandler,            // 20 : DMA channel 4/20 transfer complete
-    DMA5_DMA21_IRQHandler,            // 21 : DMA channel 5/21 transfer complete
-    DMA6_DMA22_IRQHandler,            // 22 : DMA channel 6/22 transfer complete
-    DMA7_DMA23_IRQHandler,            // 23 : DMA channel 7/23 transfer complete
-    DMA8_DMA24_IRQHandler,            // 24 : DMA channel 8/24 transfer complete
-    DMA9_DMA25_IRQHandler,            // 25 : DMA channel 9/25 transfer complete
-    DMA10_DMA26_IRQHandler,           // 26 : DMA channel 10/26 transfer complete
-    DMA11_DMA27_IRQHandler,           // 27 : DMA channel 11/27 transfer complete
-    DMA12_DMA28_IRQHandler,           // 28 : DMA channel 12/28 transfer complete
-    DMA13_DMA29_IRQHandler,           // 29 : DMA channel 13/29 transfer complete
-    DMA14_DMA30_IRQHandler,           // 30 : DMA channel 14/30 transfer complete
-    DMA15_DMA31_IRQHandler,           // 31 : DMA channel 15/31 transfer complete
-    DMA_ERROR_IRQHandler,             // 32 : DMA error interrupt channels 0-15 / 16-31
-    CTI0_ERROR_IRQHandler,            // 33 : CTI0_Error
-    CTI1_ERROR_IRQHandler,            // 34 : CTI1_Error
-    CORE_IRQHandler,                  // 35 : CorePlatform exception IRQ
-    LPUART1_IRQHandler,               // 36 : LPUART1 TX interrupt and RX interrupt
-    LPUART2_IRQHandler,               // 37 : LPUART2 TX interrupt and RX interrupt
-    LPUART3_IRQHandler,               // 38 : LPUART3 TX interrupt and RX interrupt
-    LPUART4_IRQHandler,               // 39 : LPUART4 TX interrupt and RX interrupt
-    LPUART5_IRQHandler,               // 40 : LPUART5 TX interrupt and RX interrupt
-    LPUART6_IRQHandler,               // 41 : LPUART6 TX interrupt and RX interrupt
-    LPUART7_IRQHandler,               // 42 : LPUART7 TX interrupt and RX interrupt
-    LPUART8_IRQHandler,               // 43 : LPUART8 TX interrupt and RX interrupt
-    LPI2C1_IRQHandler,                // 44 : LPI2C1 interrupt
-    LPI2C2_IRQHandler,                // 45 : LPI2C2 interrupt
-    LPI2C3_IRQHandler,                // 46 : LPI2C3 interrupt
-    LPI2C4_IRQHandler,                // 47 : LPI2C4 interrupt
-    LPSPI1_IRQHandler,                // 48 : LPSPI1 single interrupt vector for all sources
-    LPSPI2_IRQHandler,                // 49 : LPSPI2 single interrupt vector for all sources
-    LPSPI3_IRQHandler,                // 50 : LPSPI3 single interrupt vector for all sources
-    LPSPI4_IRQHandler,                // 51 : LPSPI4  single interrupt vector for all sources
-    CAN1_IRQHandler,                  // 52 : CAN1 interrupt
-    CAN2_IRQHandler,                  // 53 : CAN2 interrupt
-    FLEXRAM_IRQHandler,               // 54 : FlexRAM address out of range Or access hit IRQ
-    KPP_IRQHandler,                   // 55 : Keypad nterrupt
-    TSC_DIG_IRQHandler,               // 56 : TSC interrupt
-    GPR_IRQ_IRQHandler,               // 57 : GPR interrupt
-    LCDIF_IRQHandler,                 // 58 : LCDIF interrupt
-    CSI_IRQHandler,                   // 59 : CSI interrupt
-    PXP_IRQHandler,                   // 60 : PXP interrupt
-    WDOG2_IRQHandler,                 // 61 : WDOG2 interrupt
-    SNVS_HP_WRAPPER_IRQHandler,       // 62 : SRTC Consolidated Interrupt. Non TZ
-    SNVS_HP_WRAPPER_TZ_IRQHandler,    // 63 : SRTC Security Interrupt. TZ
-    SNVS_LP_WRAPPER_IRQHandler,       // 64 : ON-OFF button press shorter than 5 secs (pulse event)
-    CSU_IRQHandler,                   // 65 : CSU interrupt
-    DCP_IRQHandler,                   // 66 : DCP_IRQ interrupt
-    DCP_VMI_IRQHandler,               // 67 : DCP_VMI_IRQ interrupt
-    Reserved68_IRQHandler,            // 68 : Reserved interrupt
-    TRNG_IRQHandler,                  // 69 : TRNG interrupt
-    SJC_IRQHandler,                   // 70 : SJC interrupt
-    BEE_IRQHandler,                   // 71 : BEE interrupt
-    SAI1_IRQHandler,                  // 72 : SAI1 interrupt
-    SAI2_IRQHandler,                  // 73 : SAI1 interrupt
-    SAI3_RX_IRQHandler,               // 74 : SAI3 interrupt
-    SAI3_TX_IRQHandler,               // 75 : SAI3 interrupt
-    SPDIF_IRQHandler,                 // 76 : SPDIF interrupt
-    ANATOP_EVENT0_IRQHandler,         // 77 : ANATOP interrupt
-    ANATOP_EVENT1_IRQHandler,         // 78 : ANATOP interrupt
-    ANATOP_TAMP_LOW_HIGH_IRQHandler,  // 79 : ANATOP interrupt
-    ANATOP_TEMP_PANIC_IRQHandler,     // 80 : ANATOP interrupt
-    USB_PHY1_IRQHandler,              // 81 : USBPHY (UTMI0), Interrupt
-    USB_PHY2_IRQHandler,              // 82 : USBPHY (UTMI0), Interrupt
-    ADC1_IRQHandler,                  // 83 : ADC1 interrupt
-    ADC2_IRQHandler,                  // 84 : ADC2 interrupt
-    DCDC_IRQHandler,                  // 85 : DCDC interrupt
-    Reserved86_IRQHandler,            // 86 : Reserved interrupt
-    Reserved87_IRQHandler,            // 87 : Reserved interrupt
-    GPIO1_INT0_IRQHandler,            // 88 : Active HIGH Interrupt from INT0 from GPIO
-    GPIO1_INT1_IRQHandler,            // 89 : Active HIGH Interrupt from INT1 from GPIO
-    GPIO1_INT2_IRQHandler,            // 90 : Active HIGH Interrupt from INT2 from GPIO
-    GPIO1_INT3_IRQHandler,            // 91 : Active HIGH Interrupt from INT3 from GPIO
-    GPIO1_INT4_IRQHandler,            // 92 : Active HIGH Interrupt from INT4 from GPIO
-    GPIO1_INT5_IRQHandler,            // 93 : Active HIGH Interrupt from INT5 from GPIO
-    GPIO1_INT6_IRQHandler,            // 94 : Active HIGH Interrupt from INT6 from GPIO
-    GPIO1_INT7_IRQHandler,            // 95 : Active HIGH Interrupt from INT7 from GPIO
-    GPIO1_Combined_0_15_IRQHandler,   // 96 : Combined interrupt indication for GPIO1 signal 0 throughout 15
-    GPIO1_Combined_16_31_IRQHandler,  // 97 : Combined interrupt indication for GPIO1 signal 16 throughout 31
-    GPIO2_Combined_0_15_IRQHandler,   // 98 : Combined interrupt indication for GPIO2 signal 0 throughout 15
-    GPIO2_Combined_16_31_IRQHandler,  // 99 : Combined interrupt indication for GPIO2 signal 16 throughout 31
-    GPIO3_Combined_0_15_IRQHandler,   // 100: Combined interrupt indication for GPIO3 signal 0 throughout 15
-    GPIO3_Combined_16_31_IRQHandler,  // 101: Combined interrupt indication for GPIO3 signal 16 throughout 31
-    GPIO4_Combined_0_15_IRQHandler,   // 102: Combined interrupt indication for GPIO4 signal 0 throughout 15
-    GPIO4_Combined_16_31_IRQHandler,  // 103: Combined interrupt indication for GPIO4 signal 16 throughout 31
-    GPIO5_Combined_0_15_IRQHandler,   // 104: Combined interrupt indication for GPIO5 signal 0 throughout 15
-    GPIO5_Combined_16_31_IRQHandler,  // 105: Combined interrupt indication for GPIO5 signal 16 throughout 31
-    FLEXIO1_IRQHandler,               // 106: FLEXIO1 interrupt
-    FLEXIO2_IRQHandler,               // 107: FLEXIO2 interrupt
-    WDOG1_IRQHandler,                 // 108: WDOG1 interrupt
-    RTWDOG_IRQHandler,                // 109: RTWDOG interrupt
-    EWM_IRQHandler,                   // 110: EWM interrupt
-    CCM_1_IRQHandler,                 // 111: CCM IRQ1 interrupt
-    CCM_2_IRQHandler,                 // 112: CCM IRQ2 interrupt
-    GPC_IRQHandler,                   // 113: GPC interrupt
-    SRC_IRQHandler,                   // 114: SRC interrupt
-    Reserved115_IRQHandler,           // 115: Reserved interrupt
-    GPT1_IRQHandler,                  // 116: GPT1 interrupt
-    GPT2_IRQHandler,                  // 117: GPT2 interrupt
-    PWM1_0_IRQHandler,                // 118: PWM1 capture 0, compare 0, or reload 0 interrupt
-    PWM1_1_IRQHandler,                // 119: PWM1 capture 1, compare 1, or reload 0 interrupt
-    PWM1_2_IRQHandler,                // 120: PWM1 capture 2, compare 2, or reload 0 interrupt
-    PWM1_3_IRQHandler,                // 121: PWM1 capture 3, compare 3, or reload 0 interrupt
-    PWM1_FAULT_IRQHandler,            // 122: PWM1 fault or reload error interrupt
-    Reserved123_IRQHandler,           // 123: Reserved interrupt
-    FLEXSPI_IRQHandler,               // 124: FlexSPI0 interrupt
-    SEMC_IRQHandler,                  // 125: Reserved interrupt
-    USDHC1_IRQHandler,                // 126: USDHC1 interrupt
-    USDHC2_IRQHandler,                // 127: USDHC2 interrupt
-    USB_OTG2_IRQHandler,              // 128: USBO2 USB OTG2
-    USB_OTG1_IRQHandler,              // 129: USBO2 USB OTG1
-    ENET_IRQHandler,                  // 130: ENET interrupt
-    ENET_1588_Timer_IRQHandler,       // 131: ENET_1588_Timer interrupt
-    XBAR1_IRQ_0_1_IRQHandler,         // 132: XBAR1 interrupt
-    XBAR1_IRQ_2_3_IRQHandler,         // 133: XBAR1 interrupt
-    ADC_ETC_IRQ0_IRQHandler,          // 134: ADCETC IRQ0 interrupt
-    ADC_ETC_IRQ1_IRQHandler,          // 135: ADCETC IRQ1 interrupt
-    ADC_ETC_IRQ2_IRQHandler,          // 136: ADCETC IRQ2 interrupt
-    ADC_ETC_ERROR_IRQ_IRQHandler,     // 137: ADCETC Error IRQ interrupt
-    PIT_IRQHandler,                   // 138: PIT interrupt
-    ACMP1_IRQHandler,                 // 139: ACMP interrupt
-    ACMP2_IRQHandler,                 // 140: ACMP interrupt
-    ACMP3_IRQHandler,                 // 141: ACMP interrupt
-    ACMP4_IRQHandler,                 // 142: ACMP interrupt
-    Reserved143_IRQHandler,           // 143: Reserved interrupt
-    Reserved144_IRQHandler,           // 144: Reserved interrupt
-    ENC1_IRQHandler,                  // 145: ENC1 interrupt
-    ENC2_IRQHandler,                  // 146: ENC2 interrupt
-    ENC3_IRQHandler,                  // 147: ENC3 interrupt
-    ENC4_IRQHandler,                  // 148: ENC4 interrupt
-    TMR1_IRQHandler,                  // 149: TMR1 interrupt
-    TMR2_IRQHandler,                  // 150: TMR2 interrupt
-    TMR3_IRQHandler,                  // 151: TMR3 interrupt
-    TMR4_IRQHandler,                  // 152: TMR4 interrupt
-    PWM2_0_IRQHandler,                // 153: PWM2 capture 0, compare 0, or reload 0 interrupt
-    PWM2_1_IRQHandler,                // 154: PWM2 capture 1, compare 1, or reload 0 interrupt
-    PWM2_2_IRQHandler,                // 155: PWM2 capture 2, compare 2, or reload 0 interrupt
-    PWM2_3_IRQHandler,                // 156: PWM2 capture 3, compare 3, or reload 0 interrupt
-    PWM2_FAULT_IRQHandler,            // 157: PWM2 fault or reload error interrupt
-    PWM3_0_IRQHandler,                // 158: PWM3 capture 0, compare 0, or reload 0 interrupt
-    PWM3_1_IRQHandler,                // 159: PWM3 capture 1, compare 1, or reload 0 interrupt
-    PWM3_2_IRQHandler,                // 160: PWM3 capture 2, compare 2, or reload 0 interrupt
-    PWM3_3_IRQHandler,                // 161: PWM3 capture 3, compare 3, or reload 0 interrupt
-    PWM3_FAULT_IRQHandler,            // 162: PWM3 fault or reload error interrupt
-    PWM4_0_IRQHandler,                // 163: PWM4 capture 0, compare 0, or reload 0 interrupt
-    PWM4_1_IRQHandler,                // 164: PWM4 capture 1, compare 1, or reload 0 interrupt
-    PWM4_2_IRQHandler,                // 165: PWM4 capture 2, compare 2, or reload 0 interrupt
-    PWM4_3_IRQHandler,                // 166: PWM4 capture 3, compare 3, or reload 0 interrupt
-    PWM4_FAULT_IRQHandler,            // 167: PWM4 fault or reload error interrupt
-    Reserved168_IRQHandler,           // 168: Reserved interrupt
-    Reserved169_IRQHandler,           // 169: Reserved interrupt
-    Reserved170_IRQHandler,           // 170: Reserved interrupt
-    Reserved171_IRQHandler,           // 171: Reserved interrupt
-    Reserved172_IRQHandler,           // 172: Reserved interrupt
-    Reserved173_IRQHandler,           // 173: Reserved interrupt
-    SJC_ARM_DEBUG_IRQHandler,         // 174: SJC ARM debug interrupt
-    NMI_WAKEUP_IRQHandler,            // 175: NMI wake up
-}; /* End of g_pfnVectors */
+    DMA0_DMA16_IRQHandler,           // 16 : DMA channel 0/16 transfer complete
+    DMA1_DMA17_IRQHandler,           // 17 : DMA channel 1/17 transfer complete
+    DMA2_DMA18_IRQHandler,           // 18 : DMA channel 2/18 transfer complete
+    DMA3_DMA19_IRQHandler,           // 19 : DMA channel 3/19 transfer complete
+    DMA4_DMA20_IRQHandler,           // 20 : DMA channel 4/20 transfer complete
+    DMA5_DMA21_IRQHandler,           // 21 : DMA channel 5/21 transfer complete
+    DMA6_DMA22_IRQHandler,           // 22 : DMA channel 6/22 transfer complete
+    DMA7_DMA23_IRQHandler,           // 23 : DMA channel 7/23 transfer complete
+    DMA8_DMA24_IRQHandler,           // 24 : DMA channel 8/24 transfer complete
+    DMA9_DMA25_IRQHandler,           // 25 : DMA channel 9/25 transfer complete
+    DMA10_DMA26_IRQHandler,          // 26 : DMA channel 10/26 transfer complete
+    DMA11_DMA27_IRQHandler,          // 27 : DMA channel 11/27 transfer complete
+    DMA12_DMA28_IRQHandler,          // 28 : DMA channel 12/28 transfer complete
+    DMA13_DMA29_IRQHandler,          // 29 : DMA channel 13/29 transfer complete
+    DMA14_DMA30_IRQHandler,          // 30 : DMA channel 14/30 transfer complete
+    DMA15_DMA31_IRQHandler,          // 31 : DMA channel 15/31 transfer complete
+    DMA_ERROR_IRQHandler,            // 32 : DMA error interrupt channels 0-15 / 16-31
+    CTI0_ERROR_IRQHandler,           // 33 : CTI0_Error
+    CTI1_ERROR_IRQHandler,           // 34 : CTI1_Error
+    CORE_IRQHandler,                 // 35 : CorePlatform exception IRQ
+    LPUART1_IRQHandler,              // 36 : LPUART1 TX interrupt and RX interrupt
+    LPUART2_IRQHandler,              // 37 : LPUART2 TX interrupt and RX interrupt
+    LPUART3_IRQHandler,              // 38 : LPUART3 TX interrupt and RX interrupt
+    LPUART4_IRQHandler,              // 39 : LPUART4 TX interrupt and RX interrupt
+    LPUART5_IRQHandler,              // 40 : LPUART5 TX interrupt and RX interrupt
+    LPUART6_IRQHandler,              // 41 : LPUART6 TX interrupt and RX interrupt
+    LPUART7_IRQHandler,              // 42 : LPUART7 TX interrupt and RX interrupt
+    LPUART8_IRQHandler,              // 43 : LPUART8 TX interrupt and RX interrupt
+    LPI2C1_IRQHandler,               // 44 : LPI2C1 interrupt
+    LPI2C2_IRQHandler,               // 45 : LPI2C2 interrupt
+    LPI2C3_IRQHandler,               // 46 : LPI2C3 interrupt
+    LPI2C4_IRQHandler,               // 47 : LPI2C4 interrupt
+    LPSPI1_IRQHandler,               // 48 : LPSPI1 single interrupt vector for all sources
+    LPSPI2_IRQHandler,               // 49 : LPSPI2 single interrupt vector for all sources
+    LPSPI3_IRQHandler,               // 50 : LPSPI3 single interrupt vector for all sources
+    LPSPI4_IRQHandler,               // 51 : LPSPI4  single interrupt vector for all sources
+    CAN1_IRQHandler,                 // 52 : CAN1 interrupt
+    CAN2_IRQHandler,                 // 53 : CAN2 interrupt
+    FLEXRAM_IRQHandler,              // 54 : FlexRAM address out of range Or access hit IRQ
+    KPP_IRQHandler,                  // 55 : Keypad nterrupt
+    TSC_DIG_IRQHandler,              // 56 : TSC interrupt
+    GPR_IRQ_IRQHandler,              // 57 : GPR interrupt
+    LCDIF_IRQHandler,                // 58 : LCDIF interrupt
+    CSI_IRQHandler,                  // 59 : CSI interrupt
+    PXP_IRQHandler,                  // 60 : PXP interrupt
+    WDOG2_IRQHandler,                // 61 : WDOG2 interrupt
+    SNVS_HP_WRAPPER_IRQHandler,      // 62 : SRTC Consolidated Interrupt. Non TZ
+    SNVS_HP_WRAPPER_TZ_IRQHandler,   // 63 : SRTC Security Interrupt. TZ
+    SNVS_LP_WRAPPER_IRQHandler,      // 64 : ON-OFF button press shorter than 5 secs (pulse event)
+    CSU_IRQHandler,                  // 65 : CSU interrupt
+    DCP_IRQHandler,                  // 66 : DCP_IRQ interrupt
+    DCP_VMI_IRQHandler,              // 67 : DCP_VMI_IRQ interrupt
+    Reserved68_IRQHandler,           // 68 : Reserved interrupt
+    TRNG_IRQHandler,                 // 69 : TRNG interrupt
+    SJC_IRQHandler,                  // 70 : SJC interrupt
+    BEE_IRQHandler,                  // 71 : BEE interrupt
+    SAI1_IRQHandler,                 // 72 : SAI1 interrupt
+    SAI2_IRQHandler,                 // 73 : SAI1 interrupt
+    SAI3_RX_IRQHandler,              // 74 : SAI3 interrupt
+    SAI3_TX_IRQHandler,              // 75 : SAI3 interrupt
+    SPDIF_IRQHandler,                // 76 : SPDIF interrupt
+    ANATOP_EVENT0_IRQHandler,        // 77 : ANATOP interrupt
+    ANATOP_EVENT1_IRQHandler,        // 78 : ANATOP interrupt
+    ANATOP_TAMP_LOW_HIGH_IRQHandler, // 79 : ANATOP interrupt
+    ANATOP_TEMP_PANIC_IRQHandler,    // 80 : ANATOP interrupt
+    USB_PHY1_IRQHandler,             // 81 : USBPHY (UTMI0), Interrupt
+    USB_PHY2_IRQHandler,             // 82 : USBPHY (UTMI0), Interrupt
+    ADC1_IRQHandler,                 // 83 : ADC1 interrupt
+    ADC2_IRQHandler,                 // 84 : ADC2 interrupt
+    DCDC_IRQHandler,                 // 85 : DCDC interrupt
+    Reserved86_IRQHandler,           // 86 : Reserved interrupt
+    Reserved87_IRQHandler,           // 87 : Reserved interrupt
+    GPIO1_INT0_IRQHandler,           // 88 : Active HIGH Interrupt from INT0 from GPIO
+    GPIO1_INT1_IRQHandler,           // 89 : Active HIGH Interrupt from INT1 from GPIO
+    GPIO1_INT2_IRQHandler,           // 90 : Active HIGH Interrupt from INT2 from GPIO
+    GPIO1_INT3_IRQHandler,           // 91 : Active HIGH Interrupt from INT3 from GPIO
+    GPIO1_INT4_IRQHandler,           // 92 : Active HIGH Interrupt from INT4 from GPIO
+    GPIO1_INT5_IRQHandler,           // 93 : Active HIGH Interrupt from INT5 from GPIO
+    GPIO1_INT6_IRQHandler,           // 94 : Active HIGH Interrupt from INT6 from GPIO
+    GPIO1_INT7_IRQHandler,           // 95 : Active HIGH Interrupt from INT7 from GPIO
+    GPIO1_Combined_0_15_IRQHandler,  // 96 : Combined interrupt indication for GPIO1 signal 0 throughout 15
+    GPIO1_Combined_16_31_IRQHandler, // 97 : Combined interrupt indication for GPIO1 signal 16 throughout 31
+    GPIO2_Combined_0_15_IRQHandler,  // 98 : Combined interrupt indication for GPIO2 signal 0 throughout 15
+    GPIO2_Combined_16_31_IRQHandler, // 99 : Combined interrupt indication for GPIO2 signal 16 throughout 31
+    GPIO3_Combined_0_15_IRQHandler,  // 100: Combined interrupt indication for GPIO3 signal 0 throughout 15
+    GPIO3_Combined_16_31_IRQHandler, // 101: Combined interrupt indication for GPIO3 signal 16 throughout 31
+    GPIO4_Combined_0_15_IRQHandler,  // 102: Combined interrupt indication for GPIO4 signal 0 throughout 15
+    GPIO4_Combined_16_31_IRQHandler, // 103: Combined interrupt indication for GPIO4 signal 16 throughout 31
+    GPIO5_Combined_0_15_IRQHandler,  // 104: Combined interrupt indication for GPIO5 signal 0 throughout 15
+    GPIO5_Combined_16_31_IRQHandler, // 105: Combined interrupt indication for GPIO5 signal 16 throughout 31
+    FLEXIO1_IRQHandler,              // 106: FLEXIO1 interrupt
+    FLEXIO2_IRQHandler,              // 107: FLEXIO2 interrupt
+    WDOG1_IRQHandler,                // 108: WDOG1 interrupt
+    RTWDOG_IRQHandler,               // 109: RTWDOG interrupt
+    EWM_IRQHandler,                  // 110: EWM interrupt
+    CCM_1_IRQHandler,                // 111: CCM IRQ1 interrupt
+    CCM_2_IRQHandler,                // 112: CCM IRQ2 interrupt
+    GPC_IRQHandler,                  // 113: GPC interrupt
+    SRC_IRQHandler,                  // 114: SRC interrupt
+    Reserved115_IRQHandler,          // 115: Reserved interrupt
+    GPT1_IRQHandler,                 // 116: GPT1 interrupt
+    GPT2_IRQHandler,                 // 117: GPT2 interrupt
+    PWM1_0_IRQHandler,               // 118: PWM1 capture 0, compare 0, or reload 0 interrupt
+    PWM1_1_IRQHandler,               // 119: PWM1 capture 1, compare 1, or reload 0 interrupt
+    PWM1_2_IRQHandler,               // 120: PWM1 capture 2, compare 2, or reload 0 interrupt
+    PWM1_3_IRQHandler,               // 121: PWM1 capture 3, compare 3, or reload 0 interrupt
+    PWM1_FAULT_IRQHandler,           // 122: PWM1 fault or reload error interrupt
+    Reserved123_IRQHandler,          // 123: Reserved interrupt
+    FLEXSPI_IRQHandler,              // 124: FlexSPI0 interrupt
+    SEMC_IRQHandler,                 // 125: Reserved interrupt
+    USDHC1_IRQHandler,               // 126: USDHC1 interrupt
+    USDHC2_IRQHandler,               // 127: USDHC2 interrupt
+    USB_OTG2_IRQHandler,             // 128: USBO2 USB OTG2
+    USB_OTG1_IRQHandler,             // 129: USBO2 USB OTG1
+    ENET_IRQHandler,                 // 130: ENET interrupt
+    ENET_1588_Timer_IRQHandler,      // 131: ENET_1588_Timer interrupt
+    XBAR1_IRQ_0_1_IRQHandler,        // 132: XBAR1 interrupt
+    XBAR1_IRQ_2_3_IRQHandler,        // 133: XBAR1 interrupt
+    ADC_ETC_IRQ0_IRQHandler,         // 134: ADCETC IRQ0 interrupt
+    ADC_ETC_IRQ1_IRQHandler,         // 135: ADCETC IRQ1 interrupt
+    ADC_ETC_IRQ2_IRQHandler,         // 136: ADCETC IRQ2 interrupt
+    ADC_ETC_ERROR_IRQ_IRQHandler,    // 137: ADCETC Error IRQ interrupt
+    PIT_IRQHandler,                  // 138: PIT interrupt
+    ACMP1_IRQHandler,                // 139: ACMP interrupt
+    ACMP2_IRQHandler,                // 140: ACMP interrupt
+    ACMP3_IRQHandler,                // 141: ACMP interrupt
+    ACMP4_IRQHandler,                // 142: ACMP interrupt
+    Reserved143_IRQHandler,          // 143: Reserved interrupt
+    Reserved144_IRQHandler,          // 144: Reserved interrupt
+    ENC1_IRQHandler,                 // 145: ENC1 interrupt
+    ENC2_IRQHandler,                 // 146: ENC2 interrupt
+    ENC3_IRQHandler,                 // 147: ENC3 interrupt
+    ENC4_IRQHandler,                 // 148: ENC4 interrupt
+    TMR1_IRQHandler,                 // 149: TMR1 interrupt
+    TMR2_IRQHandler,                 // 150: TMR2 interrupt
+    TMR3_IRQHandler,                 // 151: TMR3 interrupt
+    TMR4_IRQHandler,                 // 152: TMR4 interrupt
+    PWM2_0_IRQHandler,               // 153: PWM2 capture 0, compare 0, or reload 0 interrupt
+    PWM2_1_IRQHandler,               // 154: PWM2 capture 1, compare 1, or reload 0 interrupt
+    PWM2_2_IRQHandler,               // 155: PWM2 capture 2, compare 2, or reload 0 interrupt
+    PWM2_3_IRQHandler,               // 156: PWM2 capture 3, compare 3, or reload 0 interrupt
+    PWM2_FAULT_IRQHandler,           // 157: PWM2 fault or reload error interrupt
+    PWM3_0_IRQHandler,               // 158: PWM3 capture 0, compare 0, or reload 0 interrupt
+    PWM3_1_IRQHandler,               // 159: PWM3 capture 1, compare 1, or reload 0 interrupt
+    PWM3_2_IRQHandler,               // 160: PWM3 capture 2, compare 2, or reload 0 interrupt
+    PWM3_3_IRQHandler,               // 161: PWM3 capture 3, compare 3, or reload 0 interrupt
+    PWM3_FAULT_IRQHandler,           // 162: PWM3 fault or reload error interrupt
+    PWM4_0_IRQHandler,               // 163: PWM4 capture 0, compare 0, or reload 0 interrupt
+    PWM4_1_IRQHandler,               // 164: PWM4 capture 1, compare 1, or reload 0 interrupt
+    PWM4_2_IRQHandler,               // 165: PWM4 capture 2, compare 2, or reload 0 interrupt
+    PWM4_3_IRQHandler,               // 166: PWM4 capture 3, compare 3, or reload 0 interrupt
+    PWM4_FAULT_IRQHandler,           // 167: PWM4 fault or reload error interrupt
+    Reserved168_IRQHandler,          // 168: Reserved interrupt
+    Reserved169_IRQHandler,          // 169: Reserved interrupt
+    Reserved170_IRQHandler,          // 170: Reserved interrupt
+    Reserved171_IRQHandler,          // 171: Reserved interrupt
+    Reserved172_IRQHandler,          // 172: Reserved interrupt
+    Reserved173_IRQHandler,          // 173: Reserved interrupt
+    SJC_ARM_DEBUG_IRQHandler,        // 174: SJC ARM debug interrupt
+    NMI_WAKEUP_IRQHandler,           // 175: NMI wake up
+};                                   /* End of g_pfnVectors */
 
 //*****************************************************************************
 // Functions to carry out the initialization of RW and BSS data sections. These
@@ -651,18 +652,20 @@ void (* const g_pfnVectors[])(void) = {
 // ResetISR() function in order to cope with MCUs with multiple banks of
 // memory.
 //*****************************************************************************
-__attribute__ ((section(".after_vectors.init_data")))
-void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
-    unsigned int *pulDest = (unsigned int*) start;
-    unsigned int *pulSrc = (unsigned int*) romstart;
+__attribute__((section(".after_vectors.init_data"))) void data_init(unsigned int romstart,
+                                                                    unsigned int start,
+                                                                    unsigned int len)
+{
+    unsigned int *pulDest = (unsigned int *)start;
+    unsigned int *pulSrc  = (unsigned int *)romstart;
     unsigned int loop;
     for (loop = 0; loop < len; loop = loop + 4)
         *pulDest++ = *pulSrc++;
 }
 
-__attribute__ ((section(".after_vectors.init_bss")))
-void bss_init(unsigned int start, unsigned int len) {
-    unsigned int *pulDest = (unsigned int*) start;
+__attribute__((section(".after_vectors.init_bss"))) void bss_init(unsigned int start, unsigned int len)
+{
+    unsigned int *pulDest = (unsigned int *)start;
     unsigned int loop;
     for (loop = 0; loop < len; loop = loop + 4)
         *pulDest++ = 0;
@@ -682,37 +685,36 @@ extern unsigned int __data_section_table_end;
 extern unsigned int __bss_section_table;
 extern unsigned int __bss_section_table_end;
 
-
-__attribute__((section(".sdram")))    volatile unsigned int LoadAddr, ExeAddr, SectionLen;
-__attribute__((section(".sdram")))     volatile unsigned int *SectionTableAddr;
+__attribute__((section(".sdram"))) volatile unsigned int LoadAddr, ExeAddr, SectionLen;
+__attribute__((section(".sdram"))) volatile unsigned int *SectionTableAddr;
 
 //*****************************************************************************
 // Reset entry point for your code.
 // Sets up a simple runtime environment and initializes the C/C++
 // library.
 //*****************************************************************************
-__attribute__ ((section(".after_vectors.reset")))
-void ResetISR(void) {
+__attribute__((section(".after_vectors.reset"))) void ResetISR(void)
+{
 
     // Disable interrupts
-    __asm volatile ("cpsid i");
+    __asm volatile("cpsid i");
 
-#if defined (__USE_CMSIS)
-// If __USE_CMSIS defined, then call CMSIS SystemInit code
+#if defined(__USE_CMSIS)
+    // If __USE_CMSIS defined, then call CMSIS SystemInit code
     SystemInit();
 #else
     // Disable Watchdog
-    volatile unsigned int *WDOG1_WCR = (unsigned int *) 0x400B8000;
-    *WDOG1_WCR = *WDOG1_WCR & ~(1 << 2);
-    volatile unsigned int *WDOG2_WCR = (unsigned int *) 0x400D0000;
-    *WDOG2_WCR = *WDOG2_WCR & ~(1 << 2);
+    volatile unsigned int *WDOG1_WCR = (unsigned int *)0x400B8000;
+    *WDOG1_WCR                       = *WDOG1_WCR & ~(1 << 2);
+    volatile unsigned int *WDOG2_WCR = (unsigned int *)0x400D0000;
+    *WDOG2_WCR                       = *WDOG2_WCR & ~(1 << 2);
     // Write watchdog update key to unlock
     *((volatile unsigned int *)0x400BC004) = 0xD928C520;
     // Set timeout value
     *((volatile unsigned int *)0x400BC008) = 0xFFFF;
     // Now disable watchdog via control register
-    volatile unsigned int *RTWDOG_CS = (unsigned int *) 0x400BC000;
-    *RTWDOG_CS = (*RTWDOG_CS & ~(1 << 7)) | (1 << 5);
+    volatile unsigned int *RTWDOG_CS = (unsigned int *)0x400BC000;
+    *RTWDOG_CS                       = (*RTWDOG_CS & ~(1 << 7)) | (1 << 5);
 
 #endif // (__USE_CMSIS)
 
@@ -724,8 +726,8 @@ void ResetISR(void) {
 
     // Copy the data sections from flash to SRAM.
     while (SectionTableAddr < &__data_section_table_end) {
-        LoadAddr = *SectionTableAddr++;
-        ExeAddr = *SectionTableAddr++;
+        LoadAddr   = *SectionTableAddr++;
+        ExeAddr    = *SectionTableAddr++;
         SectionLen = *SectionTableAddr++;
         data_init(LoadAddr, ExeAddr, SectionLen);
     }
@@ -734,26 +736,26 @@ void ResetISR(void) {
     SectionTableAddr = &__bss_section_table;
     // Zero fill the bss segment
     while (SectionTableAddr < &__bss_section_table_end) {
-        ExeAddr = *SectionTableAddr++;
+        ExeAddr    = *SectionTableAddr++;
         SectionLen = *SectionTableAddr++;
         bss_init(ExeAddr, SectionLen);
     }
 
-#if !defined (__USE_CMSIS)
-// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
-// will setup the VTOR register
+#if !defined(__USE_CMSIS)
+    // Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
+    // will setup the VTOR register
 
     // Check to see if we are running the code from a non-zero
     // address (eg RAM, external flash), in which case we need
     // to modify the VTOR register to tell the CPU that the
     // vector table is located at a non-0x0 address.
-    unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
-    if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
+    unsigned int *pSCB_VTOR = (unsigned int *)0xE000ED08;
+    if ((unsigned int *)g_pfnVectors != (unsigned int *)0x00000000) {
         *pSCB_VTOR = (unsigned int)g_pfnVectors;
     }
 #endif // (__USE_CMSIS)
 
-#if defined (__cplusplus)
+#if defined(__cplusplus)
     //
     // Call C++ library initialisation
     //
@@ -761,9 +763,9 @@ void ResetISR(void) {
 #endif
 
     // Reenable interrupts
-    __asm volatile ("cpsie i");
+    __asm volatile("cpsie i");
 
-#if defined (__REDLIB__)
+#if defined(__REDLIB__)
     // Call the Redlib library, which in turn calls main()
     __main();
 #elif PROJECT_CONFIG_UNIT_TESTS_BUILD == 1
@@ -785,346 +787,354 @@ void ResetISR(void) {
 // handler routines in your application code.
 //*****************************************************************************
 WEAK_AV void NMI_Handler(void)
-{ while(1) {}
+{
+    while (1) {}
 }
 
-
 WEAK_AV void SVC_Handler(void)
-{ while(1) {}
+{
+    while (1) {}
 }
 
 WEAK_AV void PendSV_Handler(void)
-{ while(1) {}
+{
+    while (1) {}
 }
 
 WEAK_AV void SysTick_Handler(void)
-{ while(1) {}
+{
+    while (1) {}
 }
 
-#if defined (__cplusplus)
-    extern "C"{
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 
-// Exception Stack Frame
-typedef struct __attribute__((packed))
-{
-    uint32_t r0;
-    uint32_t r1;
-    uint32_t r2;
-    uint32_t r3;
-    uint32_t r12;
-    uint32_t lr;
-    uint32_t pc;
-    uint32_t psr;
-#if defined(__ARM_ARCH_7EM__)
-    uint32_t s[16];
-#endif
-} syslog_exception_stack_frame_t;
-
-/// Hard Fault Fault Status Register
-struct __attribute__((packed)) hfsr_t
-{
-    union {
-        uint32_t all;
-        struct
-        {
-            uint32_t rsrvd0 : 1;
-            uint32_t vecttbl : 1;
-            uint32_t rsrvd1 : 28;
-            uint32_t forced : 1;
-            uint32_t debugevt : 1;
-        };
-    };
-};
-
-/// MemManage Fault Status Register
-struct __attribute__((packed)) mmfsr_t
-{
-    union {
-        uint8_t all;
-        struct
-        {
-            uint8_t iaccviol : 1;
-            uint8_t daccviol : 1;
-            uint8_t rsrvd2 : 1;
-            uint8_t munstkerr : 1;
-            uint8_t mstkerr : 1;
-            uint8_t mlsperr : 1;
-            uint8_t rsrvd6 : 1;
-            uint8_t mmarvalid : 1;
-        };
-    };
-};
-
-/// BusFault Status Register
-struct __attribute__((packed)) bfsr_t
-{
-    union {
-        uint8_t all;
-        struct
-        {
-            uint8_t ibuserr : 1;
-            uint8_t preciserr : 1;
-            uint8_t impreciserr : 1;
-            uint8_t unstkerr : 1;
-            uint8_t stkerr : 1;
-            uint8_t lsperr : 1;
-            uint8_t rsrvd6 : 1;
-            uint8_t bfarvalid : 1;
-        };
-    };
-};
-
-/// UsageFault Status Register
-struct __attribute__((packed)) ufsr_t
-{
-    union {
-        uint16_t all;
-        struct
-        {
-            uint8_t undefinstr : 1;
-            uint8_t invstate : 1;
-            uint8_t invpc : 1;
-            uint8_t nocp : 1;
-            uint8_t rsrvd4_7 : 3;
-            uint8_t unaligned : 1;
-            uint8_t divbyzero : 1;
-            uint8_t rsrvd10_15 : 6;
-        };
-    };
-};
-
-/// Configurable Fault Status Register
-struct __attribute__((packed)) cfsr_t
-{
-    union {
-        uint32_t all;
-        struct
-        {
-            mmfsr_t mmfsr;
-            bfsr_t bfsr;
-            ufsr_t ufsr;
-        };
-    };
-};
-
-/// Auxiliary Bus Fault Status register
-struct __attribute__((packed)) abfsr_t
-{
-    union {
-        uint32_t all;
-        struct
-        {
-            uint32_t itcm : 1;
-            uint32_t dtcm : 1;
-            uint32_t ahbp : 1;
-            uint32_t axim : 1;
-            uint32_t eppb : 1;
-            uint32_t rsrvd5_7 : 3;
-            uint32_t aximtype : 2;
-            uint32_t rsrvd10_31 : 1;
-        };
-    };
-};
-
-struct __attribute__((packed)) syslog_t
-{
-    syslog_exception_stack_frame_t stackFrame;
-    struct
+    // Exception Stack Frame
+    typedef struct __attribute__((packed))
     {
-        hfsr_t hfsr;         /// Hard Fault Fault Status Register
-        cfsr_t cfsr;         /// Configurable Fault Status Register
-        uint32_t mmfar;      /// MemManage Fault Address Register
-        uint32_t bfar;       /// BusFault Address Register
-        abfsr_t abfsr;       /// Auxiliary Bus Fault Status register
-        uint32_t exc_return; /// EXC_RETURN value for the exception being serviced
-    } registers;
-};
+        uint32_t r0;
+        uint32_t r1;
+        uint32_t r2;
+        uint32_t r3;
+        uint32_t r12;
+        uint32_t lr;
+        uint32_t pc;
+        uint32_t psr;
+#if defined(__ARM_ARCH_7EM__)
+        uint32_t s[16];
+#endif
+    } syslog_exception_stack_frame_t;
 
-#define DEBUG_PRINT_HARD_FAULT_INFO 1
+    /// Hard Fault Fault Status Register
+    struct __attribute__((packed)) hfsr_t
+    {
+        union
+        {
+            uint32_t all;
+            struct
+            {
+                uint32_t rsrvd0 : 1;
+                uint32_t vecttbl : 1;
+                uint32_t rsrvd1 : 28;
+                uint32_t forced : 1;
+                uint32_t debugevt : 1;
+            };
+        };
+    };
+
+    /// MemManage Fault Status Register
+    struct __attribute__((packed)) mmfsr_t
+    {
+        union
+        {
+            uint8_t all;
+            struct
+            {
+                uint8_t iaccviol : 1;
+                uint8_t daccviol : 1;
+                uint8_t rsrvd2 : 1;
+                uint8_t munstkerr : 1;
+                uint8_t mstkerr : 1;
+                uint8_t mlsperr : 1;
+                uint8_t rsrvd6 : 1;
+                uint8_t mmarvalid : 1;
+            };
+        };
+    };
+
+    /// BusFault Status Register
+    struct __attribute__((packed)) bfsr_t
+    {
+        union
+        {
+            uint8_t all;
+            struct
+            {
+                uint8_t ibuserr : 1;
+                uint8_t preciserr : 1;
+                uint8_t impreciserr : 1;
+                uint8_t unstkerr : 1;
+                uint8_t stkerr : 1;
+                uint8_t lsperr : 1;
+                uint8_t rsrvd6 : 1;
+                uint8_t bfarvalid : 1;
+            };
+        };
+    };
+
+    /// UsageFault Status Register
+    struct __attribute__((packed)) ufsr_t
+    {
+        union
+        {
+            uint16_t all;
+            struct
+            {
+                uint8_t undefinstr : 1;
+                uint8_t invstate : 1;
+                uint8_t invpc : 1;
+                uint8_t nocp : 1;
+                uint8_t rsrvd4_7 : 3;
+                uint8_t unaligned : 1;
+                uint8_t divbyzero : 1;
+                uint8_t rsrvd10_15 : 6;
+            };
+        };
+    };
+
+    /// Configurable Fault Status Register
+    struct __attribute__((packed)) cfsr_t
+    {
+        union
+        {
+            uint32_t all;
+            struct
+            {
+                mmfsr_t mmfsr;
+                bfsr_t bfsr;
+                ufsr_t ufsr;
+            };
+        };
+    };
+
+    /// Auxiliary Bus Fault Status register
+    struct __attribute__((packed)) abfsr_t
+    {
+        union
+        {
+            uint32_t all;
+            struct
+            {
+                uint32_t itcm : 1;
+                uint32_t dtcm : 1;
+                uint32_t ahbp : 1;
+                uint32_t axim : 1;
+                uint32_t eppb : 1;
+                uint32_t rsrvd5_7 : 3;
+                uint32_t aximtype : 2;
+                uint32_t rsrvd10_31 : 1;
+            };
+        };
+    };
+
+    struct __attribute__((packed)) syslog_t
+    {
+        syslog_exception_stack_frame_t stackFrame;
+        struct
+        {
+            hfsr_t hfsr;         /// Hard Fault Fault Status Register
+            cfsr_t cfsr;         /// Configurable Fault Status Register
+            uint32_t mmfar;      /// MemManage Fault Address Register
+            uint32_t bfar;       /// BusFault Address Register
+            abfsr_t abfsr;       /// Auxiliary Bus Fault Status register
+            uint32_t exc_return; /// EXC_RETURN value for the exception being serviced
+        } registers;
+    };
+
+#define DEBUG_PRINT_HARD_FAULT_INFO    1
 #define DEBUG_DETAILED_HARD_FAULT_INFO 1
 
-static void printHardFaultInfo(const syslog_t& syslog)
-{
+    static void printHardFaultInfo(const syslog_t &syslog)
+    {
 #if (DEBUG_PRINT_HARD_FAULT_INFO == 1)
-    LOG_FATAL("!!! HardFault Detected !!!");
-    LOG_FATAL("* Stack Frame:");
-    LOG_FATAL("R0  = 0x%08X", syslog.stackFrame.r0);
-    LOG_FATAL("R1  = 0x%08X", syslog.stackFrame.r1);
-    LOG_FATAL("R2  = 0x%08X", syslog.stackFrame.r2);
-    LOG_FATAL("R3  = 0x%08X", syslog.stackFrame.r3);
-    LOG_FATAL("R12 = 0x%08X", syslog.stackFrame.r12);
-    LOG_FATAL("LR  = 0x%08X", syslog.stackFrame.lr);
-    LOG_FATAL("PC  = 0x%08X", syslog.stackFrame.pc);
-    LOG_FATAL("PSR = 0x%08X", syslog.stackFrame.psr);
+        LOG_FATAL("!!! HardFault Detected !!!");
+        LOG_FATAL("* Stack Frame:");
+        LOG_FATAL("R0  = 0x%08X", syslog.stackFrame.r0);
+        LOG_FATAL("R1  = 0x%08X", syslog.stackFrame.r1);
+        LOG_FATAL("R2  = 0x%08X", syslog.stackFrame.r2);
+        LOG_FATAL("R3  = 0x%08X", syslog.stackFrame.r3);
+        LOG_FATAL("R12 = 0x%08X", syslog.stackFrame.r12);
+        LOG_FATAL("LR  = 0x%08X", syslog.stackFrame.lr);
+        LOG_FATAL("PC  = 0x%08X", syslog.stackFrame.pc);
+        LOG_FATAL("PSR = 0x%08X", syslog.stackFrame.psr);
 
-    LOG_FATAL("* Fault Status Registers:");
-    LOG_FATAL("SCB->HFSR = 0x%08X", syslog.registers.hfsr.all);
-    LOG_FATAL("SCB->CFSR = 0x%08X", syslog.registers.cfsr.all);
-    LOG_FATAL("SCB->MMAR = 0x%08X", syslog.registers.mmfar);
-    LOG_FATAL("SCB->BFAR = 0x%08X", syslog.registers.bfar);
-    LOG_FATAL("SCB->ABFSR = 0x%08x", syslog.registers.abfsr.all);
-    LOG_FATAL("EXC_RETURN = 0x%08x", syslog.registers.exc_return);
+        LOG_FATAL("* Fault Status Registers:");
+        LOG_FATAL("SCB->HFSR = 0x%08X", syslog.registers.hfsr.all);
+        LOG_FATAL("SCB->CFSR = 0x%08X", syslog.registers.cfsr.all);
+        LOG_FATAL("SCB->MMAR = 0x%08X", syslog.registers.mmfar);
+        LOG_FATAL("SCB->BFAR = 0x%08X", syslog.registers.bfar);
+        LOG_FATAL("SCB->ABFSR = 0x%08x", syslog.registers.abfsr.all);
+        LOG_FATAL("EXC_RETURN = 0x%08x", syslog.registers.exc_return);
 
 #if (DEBUG_DETAILED_HARD_FAULT_INFO == 1)
-    LOG_FATAL("* Details of Fault Status Registers:");
-    hfsr_t hfsr = syslog.registers.hfsr;
-    LOG_FATAL("SCB->HFSR = 0x%08X - HardFault Status Register", hfsr.all);
-    if (hfsr.debugevt)
-        LOG_FATAL(" - DEBUGEVT: Hard fault caused by debug event");
-    if (hfsr.forced)
-        LOG_FATAL(" - FORCED: Hard fault caused by bus/memory management/usage fault");
-    if (hfsr.vecttbl)
-        LOG_FATAL(" - VECTBL: BusFault on vector table read");
+        LOG_FATAL("* Details of Fault Status Registers:");
+        hfsr_t hfsr = syslog.registers.hfsr;
+        LOG_FATAL("SCB->HFSR = 0x%08X - HardFault Status Register", hfsr.all);
+        if (hfsr.debugevt)
+            LOG_FATAL(" - DEBUGEVT: Hard fault caused by debug event");
+        if (hfsr.forced)
+            LOG_FATAL(" - FORCED: Hard fault caused by bus/memory management/usage fault");
+        if (hfsr.vecttbl)
+            LOG_FATAL(" - VECTBL: BusFault on vector table read");
 
-    cfsr_t cfsr = syslog.registers.cfsr;
-    LOG_FATAL("SCB->CFSR = 0x%08X - Configurable Fault Status Register", cfsr.all);
-    mmfsr_t mmfsr = cfsr.mmfsr;
-    LOG_FATAL("> SCB->MMFSR = 0x%02X Memory Management Fault Status Register", mmfsr.all);
-    if (mmfsr.mmarvalid)
-        LOG_FATAL(" - MMARVALID: MMAR is valid");
-    if (mmfsr.mlsperr)
-        LOG_FATAL(" - MLSPERR: A MemManage fault occurred during floating-point lazy state preservation");
-    if (mmfsr.mstkerr)
-        LOG_FATAL(" - MSTKERR: MemManage fault on stacking for exception entry");
-    if (mmfsr.munstkerr)
-        LOG_FATAL(" - MUNSTKERR: MemManage fault on unstacking for a return from exception:");
-    if (mmfsr.daccviol)
-        LOG_FATAL(" - DACCVIOL: Data access violation");
-    if (mmfsr.iaccviol)
-        LOG_FATAL(" - IACCVIOL: Instruction access violation");
+        cfsr_t cfsr = syslog.registers.cfsr;
+        LOG_FATAL("SCB->CFSR = 0x%08X - Configurable Fault Status Register", cfsr.all);
+        mmfsr_t mmfsr = cfsr.mmfsr;
+        LOG_FATAL("> SCB->MMFSR = 0x%02X Memory Management Fault Status Register", mmfsr.all);
+        if (mmfsr.mmarvalid)
+            LOG_FATAL(" - MMARVALID: MMAR is valid");
+        if (mmfsr.mlsperr)
+            LOG_FATAL(" - MLSPERR: A MemManage fault occurred during floating-point lazy state preservation");
+        if (mmfsr.mstkerr)
+            LOG_FATAL(" - MSTKERR: MemManage fault on stacking for exception entry");
+        if (mmfsr.munstkerr)
+            LOG_FATAL(" - MUNSTKERR: MemManage fault on unstacking for a return from exception:");
+        if (mmfsr.daccviol)
+            LOG_FATAL(" - DACCVIOL: Data access violation");
+        if (mmfsr.iaccviol)
+            LOG_FATAL(" - IACCVIOL: Instruction access violation");
 
-    bfsr_t bfsr = cfsr.bfsr;
-    LOG_FATAL("> SCB->BFSR = 0x%02x - Bus Fault Status Register ", bfsr.all);
-    if (bfsr.bfarvalid)
-        LOG_FATAL(" - BFARVALID: BFAR is valid  ");
-    if (bfsr.lsperr)
-        LOG_FATAL(" - LSPERR: A bus fault occurred during floating-point lazy state preservation");
-    if (bfsr.stkerr)
-        LOG_FATAL(" - STKERR: Stacking error");
-    if (bfsr.unstkerr)
-        LOG_FATAL(" - UNSTKERR: Unstacking error");
-    if (bfsr.impreciserr)
-        LOG_FATAL(" - IMPREISERR: Imprecise data bus error");
-    if (bfsr.preciserr)
-        LOG_FATAL(" - PRECISERR: Precise data bus error");
-    if (bfsr.ibuserr)
-        LOG_FATAL(" - IBUSERR: Instruction bus error");
+        bfsr_t bfsr = cfsr.bfsr;
+        LOG_FATAL("> SCB->BFSR = 0x%02x - Bus Fault Status Register ", bfsr.all);
+        if (bfsr.bfarvalid)
+            LOG_FATAL(" - BFARVALID: BFAR is valid  ");
+        if (bfsr.lsperr)
+            LOG_FATAL(" - LSPERR: A bus fault occurred during floating-point lazy state preservation");
+        if (bfsr.stkerr)
+            LOG_FATAL(" - STKERR: Stacking error");
+        if (bfsr.unstkerr)
+            LOG_FATAL(" - UNSTKERR: Unstacking error");
+        if (bfsr.impreciserr)
+            LOG_FATAL(" - IMPREISERR: Imprecise data bus error");
+        if (bfsr.preciserr)
+            LOG_FATAL(" - PRECISERR: Precise data bus error");
+        if (bfsr.ibuserr)
+            LOG_FATAL(" - IBUSERR: Instruction bus error");
 
-    ufsr_t ufsr = cfsr.ufsr;
-    LOG_FATAL("> SCB->UFSR = 0x%04x - Usage Fault Status Register", ufsr.all);
-    if (ufsr.divbyzero)
-        LOG_FATAL(" - DIVBYZERO: Divide by zero UsageFault");
-    if (ufsr.unaligned)
-        LOG_FATAL(" - UNALIGNED: Unaligned access UsageFault");
-    if (ufsr.nocp)
-        LOG_FATAL(" - NOCP: Attempt to execute a coprocessor instruction");
-    if (ufsr.invpc)
-        LOG_FATAL(" - INVPC: Invalid PC load UsageFault");
-    if (ufsr.invstate)
-        LOG_FATAL(" - INVSTATE: Invalid state UsageFault");
-    if (ufsr.undefinstr)
-        LOG_FATAL(" - UNDEFINSTR: Undefined instruction UsageFault");
+        ufsr_t ufsr = cfsr.ufsr;
+        LOG_FATAL("> SCB->UFSR = 0x%04x - Usage Fault Status Register", ufsr.all);
+        if (ufsr.divbyzero)
+            LOG_FATAL(" - DIVBYZERO: Divide by zero UsageFault");
+        if (ufsr.unaligned)
+            LOG_FATAL(" - UNALIGNED: Unaligned access UsageFault");
+        if (ufsr.nocp)
+            LOG_FATAL(" - NOCP: Attempt to execute a coprocessor instruction");
+        if (ufsr.invpc)
+            LOG_FATAL(" - INVPC: Invalid PC load UsageFault");
+        if (ufsr.invstate)
+            LOG_FATAL(" - INVSTATE: Invalid state UsageFault");
+        if (ufsr.undefinstr)
+            LOG_FATAL(" - UNDEFINSTR: Undefined instruction UsageFault");
 
-    abfsr_t abfsr = syslog.registers.abfsr;
-    LOG_FATAL("SCB->ABFSR = 0x%08x - Auxiliary Bus Fault Status register", abfsr.all);
-    if (abfsr.itcm)
-        LOG_FATAL(" - ITCM: Asynchronous fault on ITCM interface");
-    if (abfsr.dtcm)
-        LOG_FATAL(" - DTCM: Asynchronous fault on DTCM interface.");
-    if (abfsr.ahbp)
-        LOG_FATAL(" - AHBP: Asynchronous fault on AHBP interface");
-    if (abfsr.axim)
-        LOG_FATAL(" - AXIM: Asynchronous fault on AXIM interface, AXIMTYPE: 0x%x", abfsr.aximtype);
-    if (abfsr.eppb)
-        LOG_FATAL(" - EPPB: Asynchronous fault on EPPB interface");
-  #endif // (DEBUG_DETAILED_HARD_FAULT_INFO == 1)
+        abfsr_t abfsr = syslog.registers.abfsr;
+        LOG_FATAL("SCB->ABFSR = 0x%08x - Auxiliary Bus Fault Status register", abfsr.all);
+        if (abfsr.itcm)
+            LOG_FATAL(" - ITCM: Asynchronous fault on ITCM interface");
+        if (abfsr.dtcm)
+            LOG_FATAL(" - DTCM: Asynchronous fault on DTCM interface.");
+        if (abfsr.ahbp)
+            LOG_FATAL(" - AHBP: Asynchronous fault on AHBP interface");
+        if (abfsr.axim)
+            LOG_FATAL(" - AXIM: Asynchronous fault on AXIM interface, AXIMTYPE: 0x%x", abfsr.aximtype);
+        if (abfsr.eppb)
+            LOG_FATAL(" - EPPB: Asynchronous fault on EPPB interface");
+#endif // (DEBUG_DETAILED_HARD_FAULT_INFO == 1)
 #endif //(DEBUG_PRINT_HARD_FAULT_INFO == 1)
-}
-
-WEAK_AV void
-HardFault_Handler_C(syslog_exception_stack_frame_t *frame __attribute__((unused)), uint32_t lr_value __attribute__((unused)))
-{
-    static syslog_t syslog = {0};
-    syslog.stackFrame = *frame;
-    syslog.registers.hfsr.all = SCB->HFSR;
-    syslog.registers.cfsr.all = SCB->CFSR;
-    syslog.registers.mmfar = SCB->MMFAR;
-    syslog.registers.bfar = SCB->BFAR;
-    syslog.registers.abfsr.all = SCB->ABFSR;
-
-    printHardFaultInfo(syslog);
-
-    abort();
-}
-
-WEAK_AV void MemManage_Handler_C (syslog_exception_stack_frame_t* frame __attribute__((unused)),
-                                  uint32_t lr __attribute__((unused)))
-{
-    abort();
-}
-
-/*    extern void failure_exit(syslog_exception_stack_frame_t* frame,syslog_exception_source_t source);
-
-
-
-
-
-    WEAK_AV void BusFault_Handler_C (syslog_exception_stack_frame_t* frame __attribute__((unused)),
-                        uint32_t lr __attribute__((unused)))
-    {
-        failure_exit(frame,SyslogExceptionSource_BusFault);
     }
 
-    WEAK_AV void UsageFault_Handler_C (syslog_exception_stack_frame_t* frame __attribute__((unused)),
-                        uint32_t lr __attribute__((unused)))
+    WEAK_AV void HardFault_Handler_C(syslog_exception_stack_frame_t *frame __attribute__((unused)),
+                                     uint32_t lr_value __attribute__((unused)))
     {
-        failure_exit(frame,SyslogExceptionSource_UsageFault);
-    }*/
+        static syslog_t syslog     = {0};
+        syslog.stackFrame          = *frame;
+        syslog.registers.hfsr.all  = SCB->HFSR;
+        syslog.registers.cfsr.all  = SCB->CFSR;
+        syslog.registers.mmfar     = SCB->MMFAR;
+        syslog.registers.bfar      = SCB->BFAR;
+        syslog.registers.abfsr.all = SCB->ABFSR;
 
-#if defined (__cplusplus)
+        printHardFaultInfo(syslog);
+
+        abort();
+    }
+
+    WEAK_AV void MemManage_Handler_C(syslog_exception_stack_frame_t *frame __attribute__((unused)),
+                                     uint32_t lr __attribute__((unused)))
+    {
+        abort();
+    }
+
+    /*    extern void failure_exit(syslog_exception_stack_frame_t* frame,syslog_exception_source_t source);
+
+
+
+
+
+        WEAK_AV void BusFault_Handler_C (syslog_exception_stack_frame_t* frame __attribute__((unused)),
+                            uint32_t lr __attribute__((unused)))
+        {
+            failure_exit(frame,SyslogExceptionSource_BusFault);
+        }
+
+        WEAK_AV void UsageFault_Handler_C (syslog_exception_stack_frame_t* frame __attribute__((unused)),
+                            uint32_t lr __attribute__((unused)))
+        {
+            failure_exit(frame,SyslogExceptionSource_UsageFault);
+        }*/
+
+#if defined(__cplusplus)
 }
 #endif
 
-WEAK_AV void MemManage_Handler (void)
+WEAK_AV void MemManage_Handler(void)
 {
 #if 1
-  asm volatile(
-      " tst lr,#4       \n"
-      " ite eq          \n"
-      " mrseq r0,msp    \n"
-      " mrsne r0,psp    \n"
-      " mov r1,lr       \n"
-      " ldr r2,=MemManage_Handler_C \n"
-      " bx r2"
+    asm volatile(" tst lr,#4       \n"
+                 " ite eq          \n"
+                 " mrseq r0,msp    \n"
+                 " mrsne r0,psp    \n"
+                 " mov r1,lr       \n"
+                 " ldr r2,=MemManage_Handler_C \n"
+                 " bx r2"
 
-      : /* Outputs */
-      : /* Inputs */
-      : /* Clobbers */
-  );
+                 : /* Outputs */
+                 : /* Inputs */
+                 : /* Clobbers */
+    );
 #endif
 }
 
-WEAK_AV void HardFault_Handler (void)
+WEAK_AV void HardFault_Handler(void)
 {
 #if 1
-  asm volatile(
-      " tst lr,#4       \n"
-      " ite eq          \n"
-      " mrseq r0,msp    \n"
-      " mrsne r0,psp    \n"
-      " mov r1,lr       \n"
-      " ldr r2,=HardFault_Handler_C \n"
-      " bx r2"
+    asm volatile(" tst lr,#4       \n"
+                 " ite eq          \n"
+                 " mrseq r0,msp    \n"
+                 " mrsne r0,psp    \n"
+                 " mov r1,lr       \n"
+                 " ldr r2,=HardFault_Handler_C \n"
+                 " bx r2"
 
-      : /* Outputs */
-      : /* Inputs */
-      : /* Clobbers */
-  );
+                 : /* Outputs */
+                 : /* Inputs */
+                 : /* Clobbers */
+    );
 #endif
 }
 
-WEAK_AV void BusFault_Handler (void)
+WEAK_AV void BusFault_Handler(void)
 {
 
 #if 0
@@ -1144,7 +1154,7 @@ WEAK_AV void BusFault_Handler (void)
 #endif
 }
 
-WEAK_AV void UsageFault_Handler (void)
+WEAK_AV void UsageFault_Handler(void)
 {
 
 #if 0
@@ -1164,14 +1174,13 @@ WEAK_AV void UsageFault_Handler (void)
 #endif
 }
 
-
-
 //*****************************************************************************
 // Processor ends up here if an unexpected interrupt occurs or a specific
 // handler is not present in the application code.
 //*****************************************************************************
 WEAK_AV void IntDefaultHandler(void)
-{ while(1) {}
+{
+    while (1) {}
 }
 
 //*****************************************************************************
@@ -1181,647 +1190,807 @@ WEAK_AV void IntDefaultHandler(void)
 // handler is included.
 //*****************************************************************************
 WEAK void DMA0_DMA16_IRQHandler(void)
-{   DMA0_DMA16_DriverIRQHandler();
+{
+    DMA0_DMA16_DriverIRQHandler();
 }
 
 WEAK void DMA1_DMA17_IRQHandler(void)
-{   DMA1_DMA17_DriverIRQHandler();
+{
+    DMA1_DMA17_DriverIRQHandler();
 }
 
 WEAK void DMA2_DMA18_IRQHandler(void)
-{   DMA2_DMA18_DriverIRQHandler();
+{
+    DMA2_DMA18_DriverIRQHandler();
 }
 
 WEAK void DMA3_DMA19_IRQHandler(void)
-{   DMA3_DMA19_DriverIRQHandler();
+{
+    DMA3_DMA19_DriverIRQHandler();
 }
 
 WEAK void DMA4_DMA20_IRQHandler(void)
-{   DMA4_DMA20_DriverIRQHandler();
+{
+    DMA4_DMA20_DriverIRQHandler();
 }
 
 WEAK void DMA5_DMA21_IRQHandler(void)
-{   DMA5_DMA21_DriverIRQHandler();
+{
+    DMA5_DMA21_DriverIRQHandler();
 }
 
 WEAK void DMA6_DMA22_IRQHandler(void)
-{   DMA6_DMA22_DriverIRQHandler();
+{
+    DMA6_DMA22_DriverIRQHandler();
 }
 
 WEAK void DMA7_DMA23_IRQHandler(void)
-{   DMA7_DMA23_DriverIRQHandler();
+{
+    DMA7_DMA23_DriverIRQHandler();
 }
 
 WEAK void DMA8_DMA24_IRQHandler(void)
-{   DMA8_DMA24_DriverIRQHandler();
+{
+    DMA8_DMA24_DriverIRQHandler();
 }
 
 WEAK void DMA9_DMA25_IRQHandler(void)
-{   DMA9_DMA25_DriverIRQHandler();
+{
+    DMA9_DMA25_DriverIRQHandler();
 }
 
 WEAK void DMA10_DMA26_IRQHandler(void)
-{   DMA10_DMA26_DriverIRQHandler();
+{
+    DMA10_DMA26_DriverIRQHandler();
 }
 
 WEAK void DMA11_DMA27_IRQHandler(void)
-{   DMA11_DMA27_DriverIRQHandler();
+{
+    DMA11_DMA27_DriverIRQHandler();
 }
 
 WEAK void DMA12_DMA28_IRQHandler(void)
-{   DMA12_DMA28_DriverIRQHandler();
+{
+    DMA12_DMA28_DriverIRQHandler();
 }
 
 WEAK void DMA13_DMA29_IRQHandler(void)
-{   DMA13_DMA29_DriverIRQHandler();
+{
+    DMA13_DMA29_DriverIRQHandler();
 }
 
 WEAK void DMA14_DMA30_IRQHandler(void)
-{   DMA14_DMA30_DriverIRQHandler();
+{
+    DMA14_DMA30_DriverIRQHandler();
 }
 
 WEAK void DMA15_DMA31_IRQHandler(void)
-{   DMA15_DMA31_DriverIRQHandler();
+{
+    DMA15_DMA31_DriverIRQHandler();
 }
 
 WEAK void DMA_ERROR_IRQHandler(void)
-{   DMA_ERROR_DriverIRQHandler();
+{
+    DMA_ERROR_DriverIRQHandler();
 }
 
 WEAK void CTI0_ERROR_IRQHandler(void)
-{   CTI0_ERROR_DriverIRQHandler();
+{
+    CTI0_ERROR_DriverIRQHandler();
 }
 
 WEAK void CTI1_ERROR_IRQHandler(void)
-{   CTI1_ERROR_DriverIRQHandler();
+{
+    CTI1_ERROR_DriverIRQHandler();
 }
 
 WEAK void CORE_IRQHandler(void)
-{   CORE_DriverIRQHandler();
+{
+    CORE_DriverIRQHandler();
 }
 
 WEAK void LPUART1_IRQHandler(void)
-{   LPUART1_DriverIRQHandler();
+{
+    LPUART1_DriverIRQHandler();
 }
 
 WEAK void LPUART2_IRQHandler(void)
-{   LPUART2_DriverIRQHandler();
+{
+    LPUART2_DriverIRQHandler();
 }
 
 WEAK void LPUART3_IRQHandler(void)
-{   LPUART3_DriverIRQHandler();
+{
+    LPUART3_DriverIRQHandler();
 }
 
 WEAK void LPUART4_IRQHandler(void)
-{   LPUART4_DriverIRQHandler();
+{
+    LPUART4_DriverIRQHandler();
 }
 
 WEAK void LPUART5_IRQHandler(void)
-{   LPUART5_DriverIRQHandler();
+{
+    LPUART5_DriverIRQHandler();
 }
 
 WEAK void LPUART6_IRQHandler(void)
-{   LPUART6_DriverIRQHandler();
+{
+    LPUART6_DriverIRQHandler();
 }
 
 WEAK void LPUART7_IRQHandler(void)
-{   LPUART7_DriverIRQHandler();
+{
+    LPUART7_DriverIRQHandler();
 }
 
 WEAK void LPUART8_IRQHandler(void)
-{   LPUART8_DriverIRQHandler();
+{
+    LPUART8_DriverIRQHandler();
 }
 
 WEAK void LPI2C1_IRQHandler(void)
-{   LPI2C1_DriverIRQHandler();
+{
+    LPI2C1_DriverIRQHandler();
 }
 
 WEAK void LPI2C2_IRQHandler(void)
-{   LPI2C2_DriverIRQHandler();
+{
+    LPI2C2_DriverIRQHandler();
 }
 
 WEAK void LPI2C3_IRQHandler(void)
-{   LPI2C3_DriverIRQHandler();
+{
+    LPI2C3_DriverIRQHandler();
 }
 
 WEAK void LPI2C4_IRQHandler(void)
-{   LPI2C4_DriverIRQHandler();
+{
+    LPI2C4_DriverIRQHandler();
 }
 
 WEAK void LPSPI1_IRQHandler(void)
-{   LPSPI1_DriverIRQHandler();
+{
+    LPSPI1_DriverIRQHandler();
 }
 
 WEAK void LPSPI2_IRQHandler(void)
-{   LPSPI2_DriverIRQHandler();
+{
+    LPSPI2_DriverIRQHandler();
 }
 
 WEAK void LPSPI3_IRQHandler(void)
-{   LPSPI3_DriverIRQHandler();
+{
+    LPSPI3_DriverIRQHandler();
 }
 
 WEAK void LPSPI4_IRQHandler(void)
-{   LPSPI4_DriverIRQHandler();
+{
+    LPSPI4_DriverIRQHandler();
 }
 
 WEAK void CAN1_IRQHandler(void)
-{   CAN1_DriverIRQHandler();
+{
+    CAN1_DriverIRQHandler();
 }
 
 WEAK void CAN2_IRQHandler(void)
-{   CAN2_DriverIRQHandler();
+{
+    CAN2_DriverIRQHandler();
 }
 
 WEAK void FLEXRAM_IRQHandler(void)
-{   FLEXRAM_DriverIRQHandler();
+{
+    FLEXRAM_DriverIRQHandler();
 }
 
 WEAK void KPP_IRQHandler(void)
-{   KPP_DriverIRQHandler();
+{
+    KPP_DriverIRQHandler();
 }
 
 WEAK void TSC_DIG_IRQHandler(void)
-{   TSC_DIG_DriverIRQHandler();
+{
+    TSC_DIG_DriverIRQHandler();
 }
 
 WEAK void GPR_IRQ_IRQHandler(void)
-{   GPR_IRQ_DriverIRQHandler();
+{
+    GPR_IRQ_DriverIRQHandler();
 }
 
 WEAK void LCDIF_IRQHandler(void)
-{   LCDIF_DriverIRQHandler();
+{
+    LCDIF_DriverIRQHandler();
 }
 
 WEAK void CSI_IRQHandler(void)
-{   CSI_DriverIRQHandler();
+{
+    CSI_DriverIRQHandler();
 }
 
 WEAK void PXP_IRQHandler(void)
-{   PXP_DriverIRQHandler();
+{
+    PXP_DriverIRQHandler();
 }
 
 WEAK void WDOG2_IRQHandler(void)
-{   WDOG2_DriverIRQHandler();
+{
+    WDOG2_DriverIRQHandler();
 }
 
 WEAK void SNVS_HP_WRAPPER_IRQHandler(void)
-{   SNVS_HP_WRAPPER_DriverIRQHandler();
+{
+    SNVS_HP_WRAPPER_DriverIRQHandler();
 }
 
 WEAK void SNVS_HP_WRAPPER_TZ_IRQHandler(void)
-{   SNVS_HP_WRAPPER_TZ_DriverIRQHandler();
+{
+    SNVS_HP_WRAPPER_TZ_DriverIRQHandler();
 }
 
 WEAK void SNVS_LP_WRAPPER_IRQHandler(void)
-{   SNVS_LP_WRAPPER_DriverIRQHandler();
+{
+    SNVS_LP_WRAPPER_DriverIRQHandler();
 }
 
 WEAK void CSU_IRQHandler(void)
-{   CSU_DriverIRQHandler();
+{
+    CSU_DriverIRQHandler();
 }
 
 WEAK void DCP_IRQHandler(void)
-{   DCP_DriverIRQHandler();
+{
+    DCP_DriverIRQHandler();
 }
 
 WEAK void DCP_VMI_IRQHandler(void)
-{   DCP_VMI_DriverIRQHandler();
+{
+    DCP_VMI_DriverIRQHandler();
 }
 
 WEAK void Reserved68_IRQHandler(void)
-{   Reserved68_DriverIRQHandler();
+{
+    Reserved68_DriverIRQHandler();
 }
 
 WEAK void TRNG_IRQHandler(void)
-{   TRNG_DriverIRQHandler();
+{
+    TRNG_DriverIRQHandler();
 }
 
 WEAK void SJC_IRQHandler(void)
-{   SJC_DriverIRQHandler();
+{
+    SJC_DriverIRQHandler();
 }
 
 WEAK void BEE_IRQHandler(void)
-{   BEE_DriverIRQHandler();
+{
+    BEE_DriverIRQHandler();
 }
 
 WEAK void SAI1_IRQHandler(void)
-{   SAI1_DriverIRQHandler();
+{
+    SAI1_DriverIRQHandler();
 }
 
 WEAK void SAI2_IRQHandler(void)
-{   SAI2_DriverIRQHandler();
+{
+    SAI2_DriverIRQHandler();
 }
 
 WEAK void SAI3_RX_IRQHandler(void)
-{   SAI3_RX_DriverIRQHandler();
+{
+    SAI3_RX_DriverIRQHandler();
 }
 
 WEAK void SAI3_TX_IRQHandler(void)
-{   SAI3_TX_DriverIRQHandler();
+{
+    SAI3_TX_DriverIRQHandler();
 }
 
 WEAK void SPDIF_IRQHandler(void)
-{   SPDIF_DriverIRQHandler();
+{
+    SPDIF_DriverIRQHandler();
 }
 
 WEAK void ANATOP_EVENT0_IRQHandler(void)
-{   ANATOP_EVENT0_DriverIRQHandler();
+{
+    ANATOP_EVENT0_DriverIRQHandler();
 }
 
 WEAK void ANATOP_EVENT1_IRQHandler(void)
-{   ANATOP_EVENT1_DriverIRQHandler();
+{
+    ANATOP_EVENT1_DriverIRQHandler();
 }
 
 WEAK void ANATOP_TAMP_LOW_HIGH_IRQHandler(void)
-{   ANATOP_TAMP_LOW_HIGH_DriverIRQHandler();
+{
+    ANATOP_TAMP_LOW_HIGH_DriverIRQHandler();
 }
 
 WEAK void ANATOP_TEMP_PANIC_IRQHandler(void)
-{   ANATOP_TEMP_PANIC_DriverIRQHandler();
+{
+    ANATOP_TEMP_PANIC_DriverIRQHandler();
 }
 
 WEAK void USB_PHY1_IRQHandler(void)
-{   USB_PHY1_DriverIRQHandler();
+{
+    USB_PHY1_DriverIRQHandler();
 }
 
 WEAK void USB_PHY2_IRQHandler(void)
-{   USB_PHY2_DriverIRQHandler();
+{
+    USB_PHY2_DriverIRQHandler();
 }
 
 WEAK void ADC1_IRQHandler(void)
-{   ADC1_DriverIRQHandler();
+{
+    ADC1_DriverIRQHandler();
 }
 
 WEAK void ADC2_IRQHandler(void)
-{   ADC2_DriverIRQHandler();
+{
+    ADC2_DriverIRQHandler();
 }
 
 WEAK void DCDC_IRQHandler(void)
-{   DCDC_DriverIRQHandler();
+{
+    DCDC_DriverIRQHandler();
 }
 
 WEAK void Reserved86_IRQHandler(void)
-{   Reserved86_DriverIRQHandler();
+{
+    Reserved86_DriverIRQHandler();
 }
 
 WEAK void Reserved87_IRQHandler(void)
-{   Reserved87_DriverIRQHandler();
+{
+    Reserved87_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT0_IRQHandler(void)
-{   GPIO1_INT0_DriverIRQHandler();
+{
+    GPIO1_INT0_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT1_IRQHandler(void)
-{   GPIO1_INT1_DriverIRQHandler();
+{
+    GPIO1_INT1_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT2_IRQHandler(void)
-{   GPIO1_INT2_DriverIRQHandler();
+{
+    GPIO1_INT2_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT3_IRQHandler(void)
-{   GPIO1_INT3_DriverIRQHandler();
+{
+    GPIO1_INT3_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT4_IRQHandler(void)
-{   GPIO1_INT4_DriverIRQHandler();
+{
+    GPIO1_INT4_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT5_IRQHandler(void)
-{   GPIO1_INT5_DriverIRQHandler();
+{
+    GPIO1_INT5_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT6_IRQHandler(void)
-{   GPIO1_INT6_DriverIRQHandler();
+{
+    GPIO1_INT6_DriverIRQHandler();
 }
 
 WEAK void GPIO1_INT7_IRQHandler(void)
-{   GPIO1_INT7_DriverIRQHandler();
+{
+    GPIO1_INT7_DriverIRQHandler();
 }
 
 WEAK void GPIO1_Combined_0_15_IRQHandler(void)
-{   GPIO1_Combined_0_15_DriverIRQHandler();
+{
+    GPIO1_Combined_0_15_DriverIRQHandler();
 }
 
 WEAK void GPIO1_Combined_16_31_IRQHandler(void)
-{   GPIO1_Combined_16_31_DriverIRQHandler();
+{
+    GPIO1_Combined_16_31_DriverIRQHandler();
 }
 
 WEAK void GPIO2_Combined_0_15_IRQHandler(void)
-{   GPIO2_Combined_0_15_DriverIRQHandler();
+{
+    GPIO2_Combined_0_15_DriverIRQHandler();
 }
 
 WEAK void GPIO2_Combined_16_31_IRQHandler(void)
-{   GPIO2_Combined_16_31_DriverIRQHandler();
+{
+    GPIO2_Combined_16_31_DriverIRQHandler();
 }
 
 WEAK void GPIO3_Combined_0_15_IRQHandler(void)
-{   GPIO3_Combined_0_15_DriverIRQHandler();
+{
+    GPIO3_Combined_0_15_DriverIRQHandler();
 }
 
 WEAK void GPIO3_Combined_16_31_IRQHandler(void)
-{   GPIO3_Combined_16_31_DriverIRQHandler();
+{
+    GPIO3_Combined_16_31_DriverIRQHandler();
 }
 
 WEAK void GPIO4_Combined_0_15_IRQHandler(void)
-{   GPIO4_Combined_0_15_DriverIRQHandler();
+{
+    GPIO4_Combined_0_15_DriverIRQHandler();
 }
 
 WEAK void GPIO4_Combined_16_31_IRQHandler(void)
-{   GPIO4_Combined_16_31_DriverIRQHandler();
+{
+    GPIO4_Combined_16_31_DriverIRQHandler();
 }
 
 WEAK void GPIO5_Combined_0_15_IRQHandler(void)
-{   GPIO5_Combined_0_15_DriverIRQHandler();
+{
+    GPIO5_Combined_0_15_DriverIRQHandler();
 }
 
 WEAK void GPIO5_Combined_16_31_IRQHandler(void)
-{   GPIO5_Combined_16_31_DriverIRQHandler();
+{
+    GPIO5_Combined_16_31_DriverIRQHandler();
 }
 
 WEAK void FLEXIO1_IRQHandler(void)
-{   FLEXIO1_DriverIRQHandler();
+{
+    FLEXIO1_DriverIRQHandler();
 }
 
 WEAK void FLEXIO2_IRQHandler(void)
-{   FLEXIO2_DriverIRQHandler();
+{
+    FLEXIO2_DriverIRQHandler();
 }
 
 WEAK void WDOG1_IRQHandler(void)
-{   WDOG1_DriverIRQHandler();
+{
+    WDOG1_DriverIRQHandler();
 }
 
 WEAK void RTWDOG_IRQHandler(void)
-{   RTWDOG_DriverIRQHandler();
+{
+    RTWDOG_DriverIRQHandler();
 }
 
 WEAK void EWM_IRQHandler(void)
-{   EWM_DriverIRQHandler();
+{
+    EWM_DriverIRQHandler();
 }
 
 WEAK void CCM_1_IRQHandler(void)
-{   CCM_1_DriverIRQHandler();
+{
+    CCM_1_DriverIRQHandler();
 }
 
 WEAK void CCM_2_IRQHandler(void)
-{   CCM_2_DriverIRQHandler();
+{
+    CCM_2_DriverIRQHandler();
 }
 
 WEAK void GPC_IRQHandler(void)
-{   GPC_DriverIRQHandler();
+{
+    GPC_DriverIRQHandler();
 }
 
 WEAK void SRC_IRQHandler(void)
-{   SRC_DriverIRQHandler();
+{
+    SRC_DriverIRQHandler();
 }
 
 WEAK void Reserved115_IRQHandler(void)
-{   Reserved115_DriverIRQHandler();
+{
+    Reserved115_DriverIRQHandler();
 }
 
 WEAK void GPT1_IRQHandler(void)
-{   GPT1_DriverIRQHandler();
+{
+    GPT1_DriverIRQHandler();
 }
 
 WEAK void GPT2_IRQHandler(void)
-{   GPT2_DriverIRQHandler();
+{
+    GPT2_DriverIRQHandler();
 }
 
 WEAK void PWM1_0_IRQHandler(void)
-{   PWM1_0_DriverIRQHandler();
+{
+    PWM1_0_DriverIRQHandler();
 }
 
 WEAK void PWM1_1_IRQHandler(void)
-{   PWM1_1_DriverIRQHandler();
+{
+    PWM1_1_DriverIRQHandler();
 }
 
 WEAK void PWM1_2_IRQHandler(void)
-{   PWM1_2_DriverIRQHandler();
+{
+    PWM1_2_DriverIRQHandler();
 }
 
 WEAK void PWM1_3_IRQHandler(void)
-{   PWM1_3_DriverIRQHandler();
+{
+    PWM1_3_DriverIRQHandler();
 }
 
 WEAK void PWM1_FAULT_IRQHandler(void)
-{   PWM1_FAULT_DriverIRQHandler();
+{
+    PWM1_FAULT_DriverIRQHandler();
 }
 
 WEAK void Reserved123_IRQHandler(void)
-{   Reserved123_DriverIRQHandler();
+{
+    Reserved123_DriverIRQHandler();
 }
 
 WEAK void FLEXSPI_IRQHandler(void)
-{   FLEXSPI_DriverIRQHandler();
+{
+    FLEXSPI_DriverIRQHandler();
 }
 
 WEAK void SEMC_IRQHandler(void)
-{   SEMC_DriverIRQHandler();
+{
+    SEMC_DriverIRQHandler();
 }
 
 WEAK void USDHC1_IRQHandler(void)
-{   USDHC1_DriverIRQHandler();
+{
+    USDHC1_DriverIRQHandler();
 }
 
 WEAK void USDHC2_IRQHandler(void)
-{   USDHC2_DriverIRQHandler();
+{
+    USDHC2_DriverIRQHandler();
 }
 
 WEAK void USB_OTG2_IRQHandler(void)
-{   USB_OTG2_DriverIRQHandler();
+{
+    USB_OTG2_DriverIRQHandler();
 }
 
 WEAK void USB_OTG1_IRQHandler(void)
-{   USB_OTG1_DriverIRQHandler();
+{
+    USB_OTG1_DriverIRQHandler();
 }
 
 WEAK void ENET_IRQHandler(void)
-{   ENET_DriverIRQHandler();
+{
+    ENET_DriverIRQHandler();
 }
 
 WEAK void ENET_1588_Timer_IRQHandler(void)
-{   ENET_1588_Timer_DriverIRQHandler();
+{
+    ENET_1588_Timer_DriverIRQHandler();
 }
 
 WEAK void XBAR1_IRQ_0_1_IRQHandler(void)
-{   XBAR1_IRQ_0_1_DriverIRQHandler();
+{
+    XBAR1_IRQ_0_1_DriverIRQHandler();
 }
 
 WEAK void XBAR1_IRQ_2_3_IRQHandler(void)
-{   XBAR1_IRQ_2_3_DriverIRQHandler();
+{
+    XBAR1_IRQ_2_3_DriverIRQHandler();
 }
 
 WEAK void ADC_ETC_IRQ0_IRQHandler(void)
-{   ADC_ETC_IRQ0_DriverIRQHandler();
+{
+    ADC_ETC_IRQ0_DriverIRQHandler();
 }
 
 WEAK void ADC_ETC_IRQ1_IRQHandler(void)
-{   ADC_ETC_IRQ1_DriverIRQHandler();
+{
+    ADC_ETC_IRQ1_DriverIRQHandler();
 }
 
 WEAK void ADC_ETC_IRQ2_IRQHandler(void)
-{   ADC_ETC_IRQ2_DriverIRQHandler();
+{
+    ADC_ETC_IRQ2_DriverIRQHandler();
 }
 
 WEAK void ADC_ETC_ERROR_IRQ_IRQHandler(void)
-{   ADC_ETC_ERROR_IRQ_DriverIRQHandler();
+{
+    ADC_ETC_ERROR_IRQ_DriverIRQHandler();
 }
 
 WEAK void PIT_IRQHandler(void)
-{   PIT_DriverIRQHandler();
+{
+    PIT_DriverIRQHandler();
 }
 
 WEAK void ACMP1_IRQHandler(void)
-{   ACMP1_DriverIRQHandler();
+{
+    ACMP1_DriverIRQHandler();
 }
 
 WEAK void ACMP2_IRQHandler(void)
-{   ACMP2_DriverIRQHandler();
+{
+    ACMP2_DriverIRQHandler();
 }
 
 WEAK void ACMP3_IRQHandler(void)
-{   ACMP3_DriverIRQHandler();
+{
+    ACMP3_DriverIRQHandler();
 }
 
 WEAK void ACMP4_IRQHandler(void)
-{   ACMP4_DriverIRQHandler();
+{
+    ACMP4_DriverIRQHandler();
 }
 
 WEAK void Reserved143_IRQHandler(void)
-{   Reserved143_DriverIRQHandler();
+{
+    Reserved143_DriverIRQHandler();
 }
 
 WEAK void Reserved144_IRQHandler(void)
-{   Reserved144_DriverIRQHandler();
+{
+    Reserved144_DriverIRQHandler();
 }
 
 WEAK void ENC1_IRQHandler(void)
-{   ENC1_DriverIRQHandler();
+{
+    ENC1_DriverIRQHandler();
 }
 
 WEAK void ENC2_IRQHandler(void)
-{   ENC2_DriverIRQHandler();
+{
+    ENC2_DriverIRQHandler();
 }
 
 WEAK void ENC3_IRQHandler(void)
-{   ENC3_DriverIRQHandler();
+{
+    ENC3_DriverIRQHandler();
 }
 
 WEAK void ENC4_IRQHandler(void)
-{   ENC4_DriverIRQHandler();
+{
+    ENC4_DriverIRQHandler();
 }
 
 WEAK void TMR1_IRQHandler(void)
-{   TMR1_DriverIRQHandler();
+{
+    TMR1_DriverIRQHandler();
 }
 
 WEAK void TMR2_IRQHandler(void)
-{   TMR2_DriverIRQHandler();
+{
+    TMR2_DriverIRQHandler();
 }
 
 WEAK void TMR3_IRQHandler(void)
-{   TMR3_DriverIRQHandler();
+{
+    TMR3_DriverIRQHandler();
 }
 
 WEAK void TMR4_IRQHandler(void)
-{   TMR4_DriverIRQHandler();
+{
+    TMR4_DriverIRQHandler();
 }
 
 WEAK void PWM2_0_IRQHandler(void)
-{   PWM2_0_DriverIRQHandler();
+{
+    PWM2_0_DriverIRQHandler();
 }
 
 WEAK void PWM2_1_IRQHandler(void)
-{   PWM2_1_DriverIRQHandler();
+{
+    PWM2_1_DriverIRQHandler();
 }
 
 WEAK void PWM2_2_IRQHandler(void)
-{   PWM2_2_DriverIRQHandler();
+{
+    PWM2_2_DriverIRQHandler();
 }
 
 WEAK void PWM2_3_IRQHandler(void)
-{   PWM2_3_DriverIRQHandler();
+{
+    PWM2_3_DriverIRQHandler();
 }
 
 WEAK void PWM2_FAULT_IRQHandler(void)
-{   PWM2_FAULT_DriverIRQHandler();
+{
+    PWM2_FAULT_DriverIRQHandler();
 }
 
 WEAK void PWM3_0_IRQHandler(void)
-{   PWM3_0_DriverIRQHandler();
+{
+    PWM3_0_DriverIRQHandler();
 }
 
 WEAK void PWM3_1_IRQHandler(void)
-{   PWM3_1_DriverIRQHandler();
+{
+    PWM3_1_DriverIRQHandler();
 }
 
 WEAK void PWM3_2_IRQHandler(void)
-{   PWM3_2_DriverIRQHandler();
+{
+    PWM3_2_DriverIRQHandler();
 }
 
 WEAK void PWM3_3_IRQHandler(void)
-{   PWM3_3_DriverIRQHandler();
+{
+    PWM3_3_DriverIRQHandler();
 }
 
 WEAK void PWM3_FAULT_IRQHandler(void)
-{   PWM3_FAULT_DriverIRQHandler();
+{
+    PWM3_FAULT_DriverIRQHandler();
 }
 
 WEAK void PWM4_0_IRQHandler(void)
-{   PWM4_0_DriverIRQHandler();
+{
+    PWM4_0_DriverIRQHandler();
 }
 
 WEAK void PWM4_1_IRQHandler(void)
-{   PWM4_1_DriverIRQHandler();
+{
+    PWM4_1_DriverIRQHandler();
 }
 
 WEAK void PWM4_2_IRQHandler(void)
-{   PWM4_2_DriverIRQHandler();
+{
+    PWM4_2_DriverIRQHandler();
 }
 
 WEAK void PWM4_3_IRQHandler(void)
-{   PWM4_3_DriverIRQHandler();
+{
+    PWM4_3_DriverIRQHandler();
 }
 
 WEAK void PWM4_FAULT_IRQHandler(void)
-{   PWM4_FAULT_DriverIRQHandler();
+{
+    PWM4_FAULT_DriverIRQHandler();
 }
 
 WEAK void Reserved168_IRQHandler(void)
-{   Reserved168_DriverIRQHandler();
+{
+    Reserved168_DriverIRQHandler();
 }
 
 WEAK void Reserved169_IRQHandler(void)
-{   Reserved169_DriverIRQHandler();
+{
+    Reserved169_DriverIRQHandler();
 }
 
 WEAK void Reserved170_IRQHandler(void)
-{   Reserved170_DriverIRQHandler();
+{
+    Reserved170_DriverIRQHandler();
 }
 
 WEAK void Reserved171_IRQHandler(void)
-{   Reserved171_DriverIRQHandler();
+{
+    Reserved171_DriverIRQHandler();
 }
 
 WEAK void Reserved172_IRQHandler(void)
-{   Reserved172_DriverIRQHandler();
+{
+    Reserved172_DriverIRQHandler();
 }
 
 WEAK void Reserved173_IRQHandler(void)
-{   Reserved173_DriverIRQHandler();
+{
+    Reserved173_DriverIRQHandler();
 }
 
 WEAK void SJC_ARM_DEBUG_IRQHandler(void)
-{   SJC_ARM_DEBUG_DriverIRQHandler();
+{
+    SJC_ARM_DEBUG_DriverIRQHandler();
 }
 
 WEAK void NMI_WAKEUP_IRQHandler(void)
-{   NMI_WAKEUP_DriverIRQHandler();
+{
+    NMI_WAKEUP_DriverIRQHandler();
 }
 
 //*****************************************************************************
 
-#if defined (DEBUG)
+#if defined(DEBUG)
 #pragma GCC pop_options
 #endif // (DEBUG)
diff --git a/module-bsp/board/rt1051/common/system_MIMXRT1051.c b/module-bsp/board/rt1051/common/system_MIMXRT1051.c
index ee10889e9..9e29d4543 100644
--- a/module-bsp/board/rt1051/common/system_MIMXRT1051.c
+++ b/module-bsp/board/rt1051/common/system_MIMXRT1051.c
@@ -77,8 +77,6 @@
 #include <stdint.h>
 #include "fsl_device_registers.h"
 
-
-
 /* ----------------------------------------------------------------------------
    -- Core clock
    ---------------------------------------------------------------------------- */
@@ -89,37 +87,35 @@ uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
    -- SystemInit()
    ---------------------------------------------------------------------------- */
 
-void SystemInit (void) {
+void SystemInit(void)
+{
 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
-  SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2));    /* set CP10, CP11 Full Access */
-#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
+    SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access */
+#endif                                                 /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
 
-extern uint32_t g_pfnVectors[];  // Vector table defined in startup code
-SCB->VTOR = (uint32_t)g_pfnVectors;
+    extern uint32_t g_pfnVectors[]; // Vector table defined in startup code
+    SCB->VTOR = (uint32_t)g_pfnVectors;
 
-/* Disable Watchdog Power Down Counter */
-WDOG1->WMCR &= ~WDOG_WMCR_PDE_MASK;
-WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK;
+    /* Disable Watchdog Power Down Counter */
+    WDOG1->WMCR &= ~WDOG_WMCR_PDE_MASK;
+    WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK;
 
-/* Watchdog disable */
+    /* Watchdog disable */
 
 #if (DISABLE_WDOG)
-    if (WDOG1->WCR & WDOG_WCR_WDE_MASK)
-    {
+    if (WDOG1->WCR & WDOG_WCR_WDE_MASK) {
         WDOG1->WCR &= ~WDOG_WCR_WDE_MASK;
     }
-    if (WDOG2->WCR & WDOG_WCR_WDE_MASK)
-    {
+    if (WDOG2->WCR & WDOG_WCR_WDE_MASK) {
         WDOG2->WCR &= ~WDOG_WCR_WDE_MASK;
     }
-    RTWDOG->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
+    RTWDOG->CNT   = 0xD928C520U; /* 0xD928C520U is the update key */
     RTWDOG->TOVAL = 0xFFFF;
-    RTWDOG->CS = (uint32_t) ((RTWDOG->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
+    RTWDOG->CS    = (uint32_t)((RTWDOG->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
 #endif /* (DISABLE_WDOG) */
 
     /* Disable Systick which might be enabled by bootrom */
-    if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk)
-    {
+    if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) {
         SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     }
 
@@ -138,118 +134,123 @@ WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK;
 
 #endif
 
-  SystemInitHook();
+    SystemInitHook();
 }
 
 /* ----------------------------------------------------------------------------
    -- SystemCoreClockUpdate()
    ---------------------------------------------------------------------------- */
 
-void SystemCoreClockUpdate (void) {
+void SystemCoreClockUpdate(void)
+{
 
     uint32_t freq;
     uint32_t PLL1MainClock;
     uint32_t PLL2MainClock;
 
     /* Periph_clk2_clk ---> Periph_clk */
-    if (CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK)
-    {
-        switch (CCM->CBCMR & CCM_CBCMR_PERIPH_CLK2_SEL_MASK)
-        {
-            /* Pll3_sw_clk ---> Periph_clk2_clk ---> Periph_clk */
-            case CCM_CBCMR_PERIPH_CLK2_SEL(0U):
-                if(CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_BYPASS_MASK)
-                {
-                    freq = (((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK) >> CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT) == 0U) ?
-                           CPU_XTAL_CLK_HZ : CPU_CLK1_HZ;
-                }
-                else
-                {
-                    freq = (CPU_XTAL_CLK_HZ * ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) ? 22U : 20U));
-                }
-                break;
+    if (CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK) {
+        switch (CCM->CBCMR & CCM_CBCMR_PERIPH_CLK2_SEL_MASK) {
+        /* Pll3_sw_clk ---> Periph_clk2_clk ---> Periph_clk */
+        case CCM_CBCMR_PERIPH_CLK2_SEL(0U):
+            if (CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_BYPASS_MASK) {
+                freq = (((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_MASK) >>
+                         CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC_SHIFT) == 0U)
+                           ? CPU_XTAL_CLK_HZ
+                           : CPU_CLK1_HZ;
+            }
+            else {
+                freq = (CPU_XTAL_CLK_HZ * ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) ? 22U : 20U));
+            }
+            break;
 
-            /* Osc_clk ---> Periph_clk2_clk ---> Periph_clk */
-            case CCM_CBCMR_PERIPH_CLK2_SEL(1U):
-                freq = CPU_XTAL_CLK_HZ;
-                break;
+        /* Osc_clk ---> Periph_clk2_clk ---> Periph_clk */
+        case CCM_CBCMR_PERIPH_CLK2_SEL(1U):
+            freq = CPU_XTAL_CLK_HZ;
+            break;
 
-            case CCM_CBCMR_PERIPH_CLK2_SEL(2U):
-                freq = (((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK) >> CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT) == 0U) ?
-                   CPU_XTAL_CLK_HZ : CPU_CLK1_HZ;
+        case CCM_CBCMR_PERIPH_CLK2_SEL(2U):
+            freq = (((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK) >>
+                     CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT) == 0U)
+                       ? CPU_XTAL_CLK_HZ
+                       : CPU_CLK1_HZ;
 
-            case CCM_CBCMR_PERIPH_CLK2_SEL(3U):
-            default:
-                freq = 0U;
-                break;
+        case CCM_CBCMR_PERIPH_CLK2_SEL(3U):
+        default:
+            freq = 0U;
+            break;
         }
 
         freq /= (((CCM->CBCDR & CCM_CBCDR_PERIPH_CLK2_PODF_MASK) >> CCM_CBCDR_PERIPH_CLK2_PODF_SHIFT) + 1U);
     }
     /* Pre_Periph_clk ---> Periph_clk */
-    else
-    {
+    else {
         /* check if pll is bypassed */
-        if(CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
-        {
-            PLL1MainClock = (((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK) >> CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT) == 0U) ?
-                   CPU_XTAL_CLK_HZ : CPU_CLK1_HZ;
+        if (CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK) {
+            PLL1MainClock = (((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_MASK) >>
+                              CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC_SHIFT) == 0U)
+                                ? CPU_XTAL_CLK_HZ
+                                : CPU_CLK1_HZ;
         }
-        else
-        {
+        else {
             PLL1MainClock = ((CPU_XTAL_CLK_HZ * ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK) >>
-                                             CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) >> 1U);
+                                                 CCM_ANALOG_PLL_ARM_DIV_SELECT_SHIFT)) >>
+                             1U);
         }
 
         /* check if pll is bypassed */
-        if(CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_MASK)
-        {
-            PLL2MainClock = (((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK) >> CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT) == 0U) ?
-                   CPU_XTAL_CLK_HZ : CPU_CLK1_HZ;
+        if (CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_MASK) {
+            PLL2MainClock = (((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_MASK) >>
+                              CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC_SHIFT) == 0U)
+                                ? CPU_XTAL_CLK_HZ
+                                : CPU_CLK1_HZ;
         }
-        else
-        {
-            PLL2MainClock = (CPU_XTAL_CLK_HZ * ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK) ? 22U : 20U));
+        else {
+            PLL2MainClock =
+                (CPU_XTAL_CLK_HZ * ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK) ? 22U : 20U));
         }
-        PLL2MainClock += ((uint64_t)CPU_XTAL_CLK_HZ * ((uint64_t)(CCM_ANALOG->PLL_SYS_NUM))) / ((uint64_t)(CCM_ANALOG->PLL_SYS_DENOM));
+        PLL2MainClock += ((uint64_t)CPU_XTAL_CLK_HZ * ((uint64_t)(CCM_ANALOG->PLL_SYS_NUM))) /
+                         ((uint64_t)(CCM_ANALOG->PLL_SYS_DENOM));
 
+        switch (CCM->CBCMR & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK) {
+        /* PLL2 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(0U):
+            freq = PLL2MainClock;
+            break;
 
-        switch (CCM->CBCMR & CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
-        {
-            /* PLL2 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(0U):
-                freq = PLL2MainClock;
-                break;
+        /* PLL2 PFD2 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(1U):
+            freq = PLL2MainClock /
+                   ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT) *
+                   18U;
+            break;
 
-            /* PLL2 PFD2 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(1U):
-                freq = PLL2MainClock / ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD2_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD2_FRAC_SHIFT) * 18U;
-                break;
+        /* PLL2 PFD0 ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(2U):
+            freq = PLL2MainClock /
+                   ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT) *
+                   18U;
+            break;
 
-            /* PLL2 PFD0 ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(2U):
-                freq = PLL2MainClock / ((CCM_ANALOG->PFD_528 & CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_528_PFD0_FRAC_SHIFT) * 18U;
-                break;
+        /* PLL1 divided(/2) ---> Pre_Periph_clk ---> Periph_clk */
+        case CCM_CBCMR_PRE_PERIPH_CLK_SEL(3U):
+            freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U);
+            break;
 
-            /* PLL1 divided(/2) ---> Pre_Periph_clk ---> Periph_clk */
-            case CCM_CBCMR_PRE_PERIPH_CLK_SEL(3U):
-                freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U);
-                break;
-
-            default:
-                freq = 0U;
-                break;
+        default:
+            freq = 0U;
+            break;
         }
     }
 
     SystemCoreClock = (freq / (((CCM->CBCDR & CCM_CBCDR_AHB_PODF_MASK) >> CCM_CBCDR_AHB_PODF_SHIFT) + 1U));
-
 }
 
 /* ----------------------------------------------------------------------------
    -- SystemInitHook()
    ---------------------------------------------------------------------------- */
 
-__attribute__ ((weak)) void SystemInitHook (void) {
-  /* Void implementation of the weak function. */
+__attribute__((weak)) void SystemInitHook(void)
+{
+    /* Void implementation of the weak function. */
 }
diff --git a/module-bsp/board/rt1051/common/system_MIMXRT1051.h b/module-bsp/board/rt1051/common/system_MIMXRT1051.h
index aba94e40f..fdedd9e87 100644
--- a/module-bsp/board/rt1051/common/system_MIMXRT1051.h
+++ b/module-bsp/board/rt1051/common/system_MIMXRT1051.h
@@ -75,72 +75,72 @@
  */
 
 #ifndef _SYSTEM_MIMXRT1051_H_
-#define _SYSTEM_MIMXRT1051_H_                    /**< Symbol preventing repeated inclusion */
+#define _SYSTEM_MIMXRT1051_H_ /**< Symbol preventing repeated inclusion */
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include <stdint.h>
 
-
 #ifndef DISABLE_WDOG
-  #define DISABLE_WDOG                 1
+#define DISABLE_WDOG 1
 #endif
 
-/* Define clock source values */
+    /* Define clock source values */
 
-#define CPU_XTAL_CLK_HZ                24000000UL          /* Value of the external crystal or oscillator clock frequency in Hz */
+#define CPU_XTAL_CLK_HZ 24000000UL /* Value of the external crystal or oscillator clock frequency in Hz */
 
-#define CPU_CLK1_HZ                    0UL                 /* Value of the CLK1 (select the CLK1_N/CLK1_P as source) frequency in Hz */
-                                                           /* If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise 0 will be returned. */
+#define CPU_CLK1_HZ 0UL /* Value of the CLK1 (select the CLK1_N/CLK1_P as source) frequency in Hz */
+    /* If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise
+     * 0 will be returned. */
 
-#define DEFAULT_SYSTEM_CLOCK           528000000UL         /* Default System clock value */
+#define DEFAULT_SYSTEM_CLOCK 528000000UL /* Default System clock value */
 
+    /**
+     * @brief System clock frequency (core clock)
+     *
+     * The system clock frequency supplied to the SysTick timer and the processor
+     * core clock. This variable can be used by the user application to setup the
+     * SysTick timer or configure other parameters. It may also be used by debugger to
+     * query the frequency of the debug timer or configure the trace clock speed
+     * SystemCoreClock is initialized with a correct predefined value.
+     */
+    extern uint32_t SystemCoreClock;
 
-/**
- * @brief System clock frequency (core clock)
- *
- * The system clock frequency supplied to the SysTick timer and the processor
- * core clock. This variable can be used by the user application to setup the
- * SysTick timer or configure other parameters. It may also be used by debugger to
- * query the frequency of the debug timer or configure the trace clock speed
- * SystemCoreClock is initialized with a correct predefined value.
- */
-extern uint32_t SystemCoreClock;
+    /**
+     * @brief Setup the microcontroller system.
+     *
+     * Typically this function configures the oscillator (PLL) that is part of the
+     * microcontroller device. For systems with variable clock speed it also updates
+     * the variable SystemCoreClock. SystemInit is called from startup_device file.
+     */
+    void SystemInit(void);
 
-/**
- * @brief Setup the microcontroller system.
- *
- * Typically this function configures the oscillator (PLL) that is part of the
- * microcontroller device. For systems with variable clock speed it also updates
- * the variable SystemCoreClock. SystemInit is called from startup_device file.
- */
-void SystemInit (void);
+    /**
+     * @brief Updates the SystemCoreClock variable.
+     *
+     * It must be called whenever the core clock is changed during program
+     * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
+     * the current core clock.
+     */
+    void SystemCoreClockUpdate(void);
 
-/**
- * @brief Updates the SystemCoreClock variable.
- *
- * It must be called whenever the core clock is changed during program
- * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
- * the current core clock.
- */
-void SystemCoreClockUpdate (void);
-
-/**
- * @brief SystemInit function hook.
- *
- * This weak function allows to call specific initialization code during the
- * SystemInit() execution.This can be used when an application specific code needs
- * to be called as close to the reset entry as possible (for example the Multicore
- * Manager MCMGR_EarlyInit() function call).
- * NOTE: No global r/w variables can be used in this hook function because the
- * initialization of these variables happens after this function.
- */
-void SystemInitHook (void);
+    /**
+     * @brief SystemInit function hook.
+     *
+     * This weak function allows to call specific initialization code during the
+     * SystemInit() execution.This can be used when an application specific code needs
+     * to be called as close to the reset entry as possible (for example the Multicore
+     * Manager MCMGR_EarlyInit() function call).
+     * NOTE: No global r/w variables can be used in this hook function because the
+     * initialization of these variables happens after this function.
+     */
+    void SystemInitHook(void);
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif  /* _SYSTEM_MIMXRT1051_H_ */
+#endif /* _SYSTEM_MIMXRT1051_H_ */
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverDMA.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverDMA.cpp
index 74903fda4..1a00c5c6e 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverDMA.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverDMA.cpp
@@ -2,52 +2,57 @@
  *  @file RT1051DriverDMA.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051DriverDMA.hpp"
 #include <algorithm>
 #include "log/log.hpp"
 
+namespace drivers
+{
 
-namespace drivers {
-
-    RT1051DriverDMAHandle::RT1051DriverDMAHandle(const DMA_Type *base,const uint32_t channel,std::function<void()> callback) {
-        EDMA_CreateHandle(&handle, const_cast<DMA_Type*>(base), channel);
-        if(callback){
+    RT1051DriverDMAHandle::RT1051DriverDMAHandle(const DMA_Type *base,
+                                                 const uint32_t channel,
+                                                 std::function<void()> callback)
+    {
+        EDMA_CreateHandle(&handle, const_cast<DMA_Type *>(base), channel);
+        if (callback) {
             EDMA_SetCallback(&handle, edmaCallback, this);
         }
     }
 
-    RT1051DriverDMAHandle::~RT1051DriverDMAHandle() {
+    RT1051DriverDMAHandle::~RT1051DriverDMAHandle()
+    {
         EDMA_AbortTransfer(&handle);
     }
 
     RT1051DriverDMA::RT1051DriverDMA(const drivers::DMAInstances &inst, const drivers::DriverDMAParams &params)
-            : DriverDMA(params),instance(inst) {
+        : DriverDMA(params), instance(inst)
+    {
         switch (instance) {
-            case DMAInstances::DMA_0: {
-                base = DMA0;
-                edma_config_t dmaConfig = {0};
+        case DMAInstances::DMA_0: {
+            base                    = DMA0;
+            edma_config_t dmaConfig = {0};
 
-                EDMA_GetDefaultConfig(&dmaConfig);
-                EDMA_Init(base, &dmaConfig);
-                LOG_DEBUG("Init: DMA_0");
-            }
-                break;
+            EDMA_GetDefaultConfig(&dmaConfig);
+            EDMA_Init(base, &dmaConfig);
+            LOG_DEBUG("Init: DMA_0");
+        } break;
         }
     }
 
-    RT1051DriverDMA::~RT1051DriverDMA() {
+    RT1051DriverDMA::~RT1051DriverDMA()
+    {
         EDMA_Deinit(base);
         LOG_DEBUG("Deinit: DMA_0");
     }
 
-    std::unique_ptr<DriverDMAHandle> RT1051DriverDMA::CreateHandle(const uint32_t channel,std::function<void()> callback) {
+    std::unique_ptr<DriverDMAHandle> RT1051DriverDMA::CreateHandle(const uint32_t channel,
+                                                                   std::function<void()> callback)
+    {
 
         cpp_freertos::LockGuard lock(mutex);
 
@@ -58,15 +63,13 @@ namespace drivers {
          * dmaConfig.enableContinuousLinkMode = false;
          * dmaConfig.enableDebugMode = false;
          */
-        return std::make_unique<RT1051DriverDMAHandle>(base,channel,callback);
-
+        return std::make_unique<RT1051DriverDMAHandle>(base, channel, callback);
     }
 
-
-    void edmaCallback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds){
-        RT1051DriverDMAHandle* entry = reinterpret_cast<RT1051DriverDMAHandle*>(userData);
+    void edmaCallback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds)
+    {
+        RT1051DriverDMAHandle *entry = reinterpret_cast<RT1051DriverDMAHandle *>(userData);
         entry->callback();
     }
 
-
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverDMA.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverDMA.hpp
index d63fb3d6c..a9870c82c 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverDMA.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverDMA.hpp
@@ -2,13 +2,11 @@
  *  @file RT1051DriverDMA.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051DRIVERDMA_HPP
 #define PUREPHONE_RT1051DRIVERDMA_HPP
 
@@ -17,50 +15,48 @@
 #include <map>
 #include "mutex.hpp"
 
-namespace drivers {
+namespace drivers
+{
 
     void edmaCallback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
 
-    class RT1051DriverDMAHandle : public DriverDMAHandle {
+    class RT1051DriverDMAHandle : public DriverDMAHandle
+    {
         friend void edmaCallback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
 
-    public:
-        RT1051DriverDMAHandle(const DMA_Type *base,const uint32_t channel,std::function<void()> callback);
+      public:
+        RT1051DriverDMAHandle(const DMA_Type *base, const uint32_t channel, std::function<void()> callback);
         ~RT1051DriverDMAHandle();
 
-        void* GetHandle(){
+        void *GetHandle()
+        {
             return &handle;
         }
 
-    private:
+      private:
         edma_handle_t handle;
         std::function<void()> callback;
-
     };
 
-
-    class RT1051DriverDMA : public DriverDMA {
+    class RT1051DriverDMA : public DriverDMA
+    {
 
         friend void edmaCallback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
 
-    public:
-
+      public:
         RT1051DriverDMA(const DMAInstances &inst, const DriverDMAParams &params);
 
         ~RT1051DriverDMA();
 
-        std::unique_ptr<DriverDMAHandle>
-        CreateHandle(const uint32_t channel, std::function<void()> callback = nullptr) override final;
-
-    private:
+        std::unique_ptr<DriverDMAHandle> CreateHandle(const uint32_t channel,
+                                                      std::function<void()> callback = nullptr) override final;
 
+      private:
         cpp_freertos::MutexStandard mutex;
         DMAInstances instance;
         DMA_Type *base;
-
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_RT1051DRIVERDMA_HPP
+#endif // PUREPHONE_RT1051DRIVERDMA_HPP
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.cpp
index 799675c27..21bad72f2 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.cpp
@@ -2,69 +2,70 @@
  *  @file RT1051DriverDMAMux.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051DriverDMAMux.hpp"
 #include <algorithm>
 
-
-namespace drivers {
+namespace drivers
+{
 
     RT1051DriverDMAMux::RT1051DriverDMAMux(const drivers::DMAMuxInstances &inst,
-                                           const drivers::DriverDMAMuxParams &params) : DriverDMAMux(params),
-                                                                                        instance(inst) {
+                                           const drivers::DriverDMAMuxParams &params)
+        : DriverDMAMux(params), instance(inst)
+    {
         switch (instance) {
-            case DMAMuxInstances::DMAMUX0: {
-                base = DMAMUX;
-                DMAMUX_Init(base);
-                LOG_DEBUG("Init: DMAMUX0");
-            }
-                break;
+        case DMAMuxInstances::DMAMUX0: {
+            base = DMAMUX;
+            DMAMUX_Init(base);
+            LOG_DEBUG("Init: DMAMUX0");
+        } break;
         }
     }
 
-    RT1051DriverDMAMux::~RT1051DriverDMAMux() {
+    RT1051DriverDMAMux::~RT1051DriverDMAMux()
+    {
         switch (instance) {
-            case DMAMuxInstances::DMAMUX0: {
-                for (auto &w : channels) {
-                    DMAMUX_DisableChannel(base, w);
-                }
-                DMAMUX_Deinit(DMAMUX);
-                LOG_DEBUG("Deinit DMAMUX0");
+        case DMAMuxInstances::DMAMUX0: {
+            for (auto &w : channels) {
+                DMAMUX_DisableChannel(base, w);
             }
-                break;
+            DMAMUX_Deinit(DMAMUX);
+            LOG_DEBUG("Deinit DMAMUX0");
+        } break;
         }
     }
 
-    void RT1051DriverDMAMux::Enable(const uint32_t channel, const uint32_t source) {
+    void RT1051DriverDMAMux::Enable(const uint32_t channel, const uint32_t source)
+    {
         cpp_freertos::LockGuard lock(mutex);
         if (std::find(std::begin(channels), std::end(channels), channel) == std::end(channels)) {
-            if(source != UINT32_MAX){
-                DMAMUX_SetSource(base, channel,
-                                 (uint8_t) source);
+            if (source != UINT32_MAX) {
+                DMAMUX_SetSource(base, channel, (uint8_t)source);
             }
 
             DMAMUX_EnableChannel(base, channel);
             channels.push_back(channel);
-        } else {
+        }
+        else {
             LOG_ERROR("Trying to enable channel that is already enabled");
         }
     }
 
-    void RT1051DriverDMAMux::Disable(const uint32_t channel) {
+    void RT1051DriverDMAMux::Disable(const uint32_t channel)
+    {
         cpp_freertos::LockGuard lock(mutex);
         auto ret = std::find(std::begin(channels), std::end(channels), channel);
         if (ret != std::end(channels)) {
             DMAMUX_DisableChannel(base, channel);
             channels.erase(ret);
-        } else {
+        }
+        else {
             LOG_ERROR("Trying to disable channel that doesn't exist");
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.hpp
index 0893db415..95448ebc8 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverDMAMux.hpp
@@ -2,13 +2,11 @@
  *  @file RT1051DriverDMAMux.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051DRIVERDMAMUX_HPP
 #define PUREPHONE_RT1051DRIVERDMAMUX_HPP
 
@@ -17,27 +15,27 @@
 #include "../fsl_drivers/fsl_dmamux.h"
 #include "mutex.hpp"
 
-namespace drivers {
+namespace drivers
+{
 
-    class RT1051DriverDMAMux : public DriverDMAMux {
-    public:
-
-        RT1051DriverDMAMux(const DMAMuxInstances &inst, const DriverDMAMuxParams& params);
+    class RT1051DriverDMAMux : public DriverDMAMux
+    {
+      public:
+        RT1051DriverDMAMux(const DMAMuxInstances &inst, const DriverDMAMuxParams &params);
 
         ~RT1051DriverDMAMux();
 
-        void Enable(const uint32_t channel,const uint32_t source=UINT32_MAX) override final;
+        void Enable(const uint32_t channel, const uint32_t source = UINT32_MAX) override final;
 
         void Disable(const uint32_t channel) override final;
 
-    private:
+      private:
         cpp_freertos::MutexStandard mutex;
         DMAMuxInstances instance;
         DMAMUX_Type *base;
-        std::vector<uint32_t > channels;
+        std::vector<uint32_t> channels;
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_RT1051DRIVERDMAMUX_HPP
+#endif // PUREPHONE_RT1051DRIVERDMAMUX_HPP
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.cpp
index 123c5a003..476b36f66 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.cpp
@@ -8,99 +8,103 @@
  * @details
  */
 
-
 #include "RT1051DriverGPIO.hpp"
 #include "log/log.hpp"
 
+namespace drivers
+{
 
-namespace drivers{
-
-RT1051DriverGPIO::RT1051DriverGPIO(const GPIOInstances &inst, const DriverGPIOParams &params) : DriverGPIO(params),instance(inst) {
-    switch (instance) {
+    RT1051DriverGPIO::RT1051DriverGPIO(const GPIOInstances &inst, const DriverGPIOParams &params)
+        : DriverGPIO(params), instance(inst)
+    {
+        switch (instance) {
         case GPIOInstances::GPIO_1: {
             base = GPIO1;
             name = "GPIO_1";
-        }
-            break;
+        } break;
 
         case GPIOInstances::GPIO_2: {
             base = GPIO2;
             name = "GPIO_2";
-        }
-            break;
+        } break;
 
         case GPIOInstances::GPIO_3: {
             base = GPIO3;
             name = "GPIO_3";
-        }
-            break;
+        } break;
 
         case GPIOInstances::GPIO_4: {
             base = GPIO4;
             name = "GPIO_4";
-        }
-            break;
+        } break;
 
         case GPIOInstances::GPIO_5: {
             base = GPIO5;
             name = "GPIO_5";
+        } break;
         }
-            break;
+
+        LOG_DEBUG("Init: %s", name.c_str());
     }
 
-    LOG_DEBUG("Init: %s", name.c_str());
-}
+    RT1051DriverGPIO::~RT1051DriverGPIO()
+    {
+        LOG_DEBUG("Deinit: %s", name.c_str());
+        // Disable all interrupts
+        GPIO_DisableInterrupts(base, UINT32_MAX);
+        // Clear all interrupt flags
+        GPIO_ClearPinsInterruptFlags(base, UINT32_MAX);
+        GPIO_Deinit(base);
+    }
 
+    int32_t RT1051DriverGPIO::ConfPin(const drivers::DriverGPIOPinParams &params)
+    {
+        gpio_pin_config_t conf;
+        conf.direction     = static_cast<gpio_pin_direction_t>(params.dir);
+        conf.outputLogic   = static_cast<uint8_t>(params.defLogic);
+        conf.interruptMode = static_cast<gpio_interrupt_mode_t>(params.irqMode);
+        GPIO_PinInit(base, params.pin, &conf);
+        return 0;
+    }
 
-RT1051DriverGPIO::~RT1051DriverGPIO() {
-    LOG_DEBUG("Deinit: %s", name.c_str());
-    //Disable all interrupts
-    GPIO_DisableInterrupts(base,UINT32_MAX);
-    // Clear all interrupt flags
-    GPIO_ClearPinsInterruptFlags(base,UINT32_MAX);
-    GPIO_Deinit(base);
-}
+    void RT1051DriverGPIO::SetPort(const uint32_t mask)
+    {
+        GPIO_PortSet(base, mask);
+    }
 
-int32_t RT1051DriverGPIO::ConfPin(const drivers::DriverGPIOPinParams &params) {
-    gpio_pin_config_t conf;
-    conf.direction = static_cast<gpio_pin_direction_t>(params.dir);
-    conf.outputLogic = static_cast<uint8_t >(params.defLogic);
-    conf.interruptMode = static_cast<gpio_interrupt_mode_t>(params.irqMode);
-    GPIO_PinInit(base,params.pin,&conf);
-    return 0;
-}
+    void RT1051DriverGPIO::ClearPort(const uint32_t mask)
+    {
+        GPIO_PortClear(base, mask);
+    }
 
-void RT1051DriverGPIO::SetPort(const uint32_t mask) {
-    GPIO_PortSet(base,mask);
-}
+    void RT1051DriverGPIO::TogglePort(const uint32_t mask)
+    {
+        GPIO_PortToggle(base, mask);
+    }
 
-void RT1051DriverGPIO::ClearPort(const uint32_t mask) {
-    GPIO_PortClear(base,mask);
-}
+    void RT1051DriverGPIO::WritePin(const uint32_t pin, const uint8_t output)
+    {
+        GPIO_PinWrite(base, pin, output);
+    }
 
-void RT1051DriverGPIO::TogglePort(const uint32_t mask) {
-    GPIO_PortToggle(base,mask);
-}
+    uint8_t RT1051DriverGPIO::ReadPin(const uint32_t pin)
+    {
+        return GPIO_PinRead(base, pin);
+    }
 
-void RT1051DriverGPIO::WritePin(const uint32_t pin, const uint8_t output) {
-    GPIO_PinWrite(base,pin,output);
-}
+    void RT1051DriverGPIO::EnableInterrupt(const uint32_t mask)
+    {
+        GPIO_EnableInterrupts(base, mask);
+    }
 
-uint8_t RT1051DriverGPIO::ReadPin(const uint32_t pin) {
-    return GPIO_PinRead(base,pin);
-}
+    void RT1051DriverGPIO::DisableInterrupt(const uint32_t mask)
+    {
+        GPIO_DisableInterrupts(base, mask);
+    }
 
-
-void RT1051DriverGPIO::EnableInterrupt(const uint32_t mask) {
-    GPIO_EnableInterrupts(base,mask);
-}
-
-void RT1051DriverGPIO::DisableInterrupt(const uint32_t mask) {
-    GPIO_DisableInterrupts(base,mask);
-}
-
-void RT1051DriverGPIO::ClearPortInterrupts(const uint32_t mask) {
-    GPIO_PortClearInterruptFlags(base,mask);
-}
+    void RT1051DriverGPIO::ClearPortInterrupts(const uint32_t mask)
+    {
+        GPIO_PortClearInterruptFlags(base, mask);
+    }
 
 } // namespace drivers
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.hpp
index 59c654b56..0055fce78 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverGPIO.hpp
@@ -8,17 +8,18 @@
  * @details
  */
 
-
 #ifndef PUREPHONE_RT1051DRIVERGPIO_HPP
 #define PUREPHONE_RT1051DRIVERGPIO_HPP
 
 #include "drivers/gpio/DriverGPIO.hpp"
 #include "../common/fsl_drivers/fsl_gpio.h"
 
-namespace drivers {
+namespace drivers
+{
 
-    class RT1051DriverGPIO : public DriverGPIO {
-    public:
+    class RT1051DriverGPIO : public DriverGPIO
+    {
+      public:
         RT1051DriverGPIO(const GPIOInstances &inst, const DriverGPIOParams &params);
 
         ~RT1051DriverGPIO();
@@ -47,13 +48,12 @@ namespace drivers {
 
         void ClearPortInterrupts(const uint32_t mask) override final;
 
-    private:
+      private:
         GPIOInstances instance;
         GPIO_Type *base;
         std::string name;
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_RT1051DRIVERGPIO_HPP
+#endif // PUREPHONE_RT1051DRIVERGPIO_HPP
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverI2C.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverI2C.cpp
index ea8c4bd21..970a19d13 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverI2C.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverI2C.cpp
@@ -2,124 +2,129 @@
  *  @file RT1051DriverI2C.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051DriverI2C.hpp"
 #include "log/log.hpp"
 #include "../board.h"
 
-namespace drivers {
+namespace drivers
+{
 
-
-    RT1051DriverI2C::RT1051DriverI2C(const I2CInstances inst,const DriverI2CParams &params): DriverI2C(params,inst){
+    RT1051DriverI2C::RT1051DriverI2C(const I2CInstances inst, const DriverI2CParams &params) : DriverI2C(params, inst)
+    {
 
         lpi2c_master_config_t lpi2cConfig = {0};
 
-        switch (instance){
-            case I2CInstances ::I2C1:
-                base = LPI2C1;
-                LOG_DEBUG("Init: I2C1");
-                break;
-            case I2CInstances ::I2C2:
-                base = LPI2C2;
-                LOG_DEBUG("Init: I2C2");
-                break;
+        switch (instance) {
+        case I2CInstances ::I2C1:
+            base = LPI2C1;
+            LOG_DEBUG("Init: I2C1");
+            break;
+        case I2CInstances ::I2C2:
+            base = LPI2C2;
+            LOG_DEBUG("Init: I2C2");
+            break;
         }
         LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
         LPI2C_MasterInit(base, &lpi2cConfig, GetPerphSourceClock(PerphClock_I2C));
     }
 
-    RT1051DriverI2C::~RT1051DriverI2C() {
-        switch (instance){
-            case I2CInstances ::I2C1:
-                LOG_DEBUG("Deinit: I2C1");
-                break;
-            case I2CInstances ::I2C2:
-                LOG_DEBUG("Deinit: I2C2");
-                break;
+    RT1051DriverI2C::~RT1051DriverI2C()
+    {
+        switch (instance) {
+        case I2CInstances ::I2C1:
+            LOG_DEBUG("Deinit: I2C1");
+            break;
+        case I2CInstances ::I2C2:
+            LOG_DEBUG("Deinit: I2C2");
+            break;
         }
         LPI2C_MasterDeinit(base);
     }
 
-    ssize_t RT1051DriverI2C::Write(const drivers::I2CAddress &addr, const uint8_t *txBuff, const size_t size) {
+    ssize_t RT1051DriverI2C::Write(const drivers::I2CAddress &addr, const uint8_t *txBuff, const size_t size)
+    {
         cpp_freertos::LockGuard lock(mutex);
-        auto ret = BOARD_LPI2C_Send(base,addr.deviceAddress,addr.subAddress,addr.subAddressSize, const_cast<uint8_t *>(txBuff),size);
-        if(ret != kStatus_Success){
+        auto ret = BOARD_LPI2C_Send(
+            base, addr.deviceAddress, addr.subAddress, addr.subAddressSize, const_cast<uint8_t *>(txBuff), size);
+        if (ret != kStatus_Success) {
             return -1; // TODO:M.P: fix me
-        }else{
+        }
+        else {
             return size;
         }
     }
 
-
-    ssize_t RT1051DriverI2C::Read(const drivers::I2CAddress &addr, uint8_t *rxBuff, const size_t size) {
+    ssize_t RT1051DriverI2C::Read(const drivers::I2CAddress &addr, uint8_t *rxBuff, const size_t size)
+    {
         cpp_freertos::LockGuard lock(mutex);
-        auto ret = BOARD_LPI2C_Receive(base,addr.deviceAddress,addr.subAddress,addr.subAddressSize,rxBuff,size);
-        if(ret != kStatus_Success){
+        auto ret = BOARD_LPI2C_Receive(base, addr.deviceAddress, addr.subAddress, addr.subAddressSize, rxBuff, size);
+        if (ret != kStatus_Success) {
             return -1; // TODO:M.P: fix me
-        }else{
+        }
+        else {
             return size;
         }
     }
 
-    ssize_t RT1051DriverI2C::Modify(const drivers::I2CAddress &addr, const uint32_t mask, bool setClr,
-                                    const size_t size) {
+    ssize_t RT1051DriverI2C::Modify(const drivers::I2CAddress &addr,
+                                    const uint32_t mask,
+                                    bool setClr,
+                                    const size_t size)
+    {
         cpp_freertos::LockGuard lock(mutex);
         uint16_t rx = 0;
-        auto ret = BOARD_LPI2C_Receive(base,addr.deviceAddress,addr.subAddress,addr.subAddressSize, (uint8_t*)&rx,
-                                   size);
+        auto ret =
+            BOARD_LPI2C_Receive(base, addr.deviceAddress, addr.subAddress, addr.subAddressSize, (uint8_t *)&rx, size);
 
         // Set specified bits
-        if(setClr ){
-            rx |=mask;
+        if (setClr) {
+            rx |= mask;
         }
-        else{
-            rx &=~mask;
+        else {
+            rx &= ~mask;
         }
 
-        ret |= BOARD_LPI2C_Send(base,addr.deviceAddress,addr.subAddress,addr.subAddressSize, (uint8_t*)&rx,
-                                size);
+        ret |= BOARD_LPI2C_Send(base, addr.deviceAddress, addr.subAddress, addr.subAddressSize, (uint8_t *)&rx, size);
 
-        if(ret != kStatus_Success){
+        if (ret != kStatus_Success) {
             return -1; // TODO:M.P: fix me
-        }else{
+        }
+        else {
             return size;
         }
     }
 
-    status_t RT1051DriverI2C::BOARD_LPI2C_Send(LPI2C_Type *base, uint8_t deviceAddress, uint32_t subAddress,
-                                     uint8_t subAddressSize, uint8_t *txBuff, uint8_t txBuffSize)
+    status_t RT1051DriverI2C::BOARD_LPI2C_Send(LPI2C_Type *base,
+                                               uint8_t deviceAddress,
+                                               uint32_t subAddress,
+                                               uint8_t subAddressSize,
+                                               uint8_t *txBuff,
+                                               uint8_t txBuffSize)
     {
         status_t reVal;
 
         /* Send master blocking data to slave */
         reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Write);
-        if (kStatus_Success == reVal)
-        {
-            while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag)
-            {
-            }
+        if (kStatus_Success == reVal) {
+            while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag) {}
 
             reVal = LPI2C_MasterSend(base, &subAddress, subAddressSize);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
 
             reVal = LPI2C_MasterSend(base, txBuff, txBuffSize);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
 
             reVal = LPI2C_MasterStop(base);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
         }
@@ -127,44 +132,41 @@ namespace drivers {
         return reVal;
     }
 
-    status_t RT1051DriverI2C::BOARD_LPI2C_Receive(LPI2C_Type *base, uint8_t deviceAddress, uint32_t subAddress,
-                                        uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
+    status_t RT1051DriverI2C::BOARD_LPI2C_Receive(LPI2C_Type *base,
+                                                  uint8_t deviceAddress,
+                                                  uint32_t subAddress,
+                                                  uint8_t subAddressSize,
+                                                  uint8_t *rxBuff,
+                                                  uint8_t rxBuffSize)
     {
         status_t reVal;
 
         reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Write);
-        if (kStatus_Success == reVal)
-        {
-            while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag)
-            {
-            }
+        if (kStatus_Success == reVal) {
+            while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag) {}
 
             reVal = LPI2C_MasterSend(base, &subAddress, subAddressSize);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
 
             reVal = LPI2C_MasterRepeatedStart(base, deviceAddress, kLPI2C_Read);
 
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
 
             reVal = LPI2C_MasterReceive(base, rxBuff, rxBuffSize);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
 
             reVal = LPI2C_MasterStop(base);
-            if (reVal != kStatus_Success)
-            {
+            if (reVal != kStatus_Success) {
                 return reVal;
             }
         }
         return reVal;
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverI2C.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverI2C.hpp
index 9dfb145a1..71fd9f4ba 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverI2C.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverI2C.hpp
@@ -2,13 +2,11 @@
  *  @file RT1051DriverI2C.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051DRIVERI2C_HPP
 #define PUREPHONE_RT1051DRIVERI2C_HPP
 
@@ -20,11 +18,12 @@
 
 #include "mutex.hpp"
 
-namespace drivers {
-
-    class RT1051DriverI2C : public DriverI2C {
-    public:
+namespace drivers
+{
 
+    class RT1051DriverI2C : public DriverI2C
+    {
+      public:
         RT1051DriverI2C(const I2CInstances inst, const DriverI2CParams &params);
 
         ~RT1051DriverI2C();
@@ -35,20 +34,25 @@ namespace drivers {
 
         ssize_t Modify(const I2CAddress &addr, const uint32_t mask, bool setClr, const size_t size) override final;
 
+      private:
+        status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
+                                     uint8_t deviceAddress,
+                                     uint32_t subAddress,
+                                     uint8_t subAddressSize,
+                                     uint8_t *rxBuff,
+                                     uint8_t rxBuffSize);
 
-    private:
-
-        status_t BOARD_LPI2C_Receive(LPI2C_Type *base, uint8_t deviceAddress, uint32_t subAddress,
-                                     uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-
-        status_t BOARD_LPI2C_Send(LPI2C_Type *base, uint8_t deviceAddress, uint32_t subAddress,
-                                  uint8_t subAddressSize, uint8_t *txBuff, uint8_t txBuffSize);
-
+        status_t BOARD_LPI2C_Send(LPI2C_Type *base,
+                                  uint8_t deviceAddress,
+                                  uint32_t subAddress,
+                                  uint8_t subAddressSize,
+                                  uint8_t *txBuff,
+                                  uint8_t txBuffSize);
 
         LPI2C_Type *base;
         cpp_freertos::MutexStandard mutex;
     };
 
-}
+} // namespace drivers
 
-#endif //PUREPHONE_RT1051DRIVERI2C_HPP
+#endif // PUREPHONE_RT1051DRIVERI2C_HPP
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverPLL.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverPLL.cpp
index df6655941..2cfc5a0f9 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverPLL.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverPLL.cpp
@@ -2,103 +2,88 @@
  *  @file RT1051DriverPLL.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051DriverPLL.hpp"
 #include "log/log.hpp"
 #include "../common/clock_config.h"
 
-namespace drivers {
+namespace drivers
+{
 
     RT1051DriverPLL::RT1051DriverPLL(const drivers::PLLInstances &inst, const drivers::DriverPLLParams &params)
-            : DriverPLL(params), instance(inst) {
+        : DriverPLL(params), instance(inst)
+    {
 
         switch (instance) {
-            case PLLInstances::PLL4_Audio: {
-                clkPLL4setup(CLK_ENABLE);
-                name = "PLL4_Audio";
-            }
-                break;
-            case PLLInstances::PLL3: {
-                clkPLL3setup(CLK_ENABLE);
-                name = "PLL3";
-            }
-                break;
-            case PLLInstances::PLL3_PFD0: {
-                clkPLL3_PFD0setup(CLK_ENABLE);
-                name = "PLL3_PFD0";
-            }
-                break;
-            case PLLInstances::PLL3_PFD1: {
-                clkPLL3_PFD1setup(CLK_ENABLE);
-                name = "PLL3_PFD1";
-            }
-                break;
-            case PLLInstances::PLL3_PFD2: {
-                clkPLL3_PFD2setup(CLK_ENABLE);
-                name = "PLL3_PFD2";
-            }
-                break;
-            case PLLInstances::PLL2_PFD2:
-                clkPLL2_PFD2setup(CLK_ENABLE);
-                name = "PLL2_PFD2";
-                break;
-            case PLLInstances::PLL1_ARM: {
-                clkPLL1setup(CLK_ENABLE);
-                name = "PLL1_ARM";
-            }
-                break;
-            case PLLInstances::OSC_24M: {
-                //not used
-            }
-                break;
+        case PLLInstances::PLL4_Audio: {
+            clkPLL4setup(CLK_ENABLE);
+            name = "PLL4_Audio";
+        } break;
+        case PLLInstances::PLL3: {
+            clkPLL3setup(CLK_ENABLE);
+            name = "PLL3";
+        } break;
+        case PLLInstances::PLL3_PFD0: {
+            clkPLL3_PFD0setup(CLK_ENABLE);
+            name = "PLL3_PFD0";
+        } break;
+        case PLLInstances::PLL3_PFD1: {
+            clkPLL3_PFD1setup(CLK_ENABLE);
+            name = "PLL3_PFD1";
+        } break;
+        case PLLInstances::PLL3_PFD2: {
+            clkPLL3_PFD2setup(CLK_ENABLE);
+            name = "PLL3_PFD2";
+        } break;
+        case PLLInstances::PLL2_PFD2:
+            clkPLL2_PFD2setup(CLK_ENABLE);
+            name = "PLL2_PFD2";
+            break;
+        case PLLInstances::PLL1_ARM: {
+            clkPLL1setup(CLK_ENABLE);
+            name = "PLL1_ARM";
+        } break;
+        case PLLInstances::OSC_24M: {
+            // not used
+        } break;
         }
-        LOG_DEBUG("Init: %s",name.c_str());
-
+        LOG_DEBUG("Init: %s", name.c_str());
     }
 
-
-    RT1051DriverPLL::~RT1051DriverPLL() {
+    RT1051DriverPLL::~RT1051DriverPLL()
+    {
         switch (instance) {
-            case PLLInstances::PLL4_Audio: {
-                clkPLL4setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::PLL3: {
-                clkPLL3setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::PLL3_PFD0: {
-                clkPLL3_PFD0setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::PLL3_PFD1: {
-                clkPLL3_PFD1setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::PLL3_PFD2: {
-                clkPLL3_PFD2setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::PLL2_PFD2:
-                clkPLL2_PFD2setup(CLK_DISABLE);
-                break;
-            case PLLInstances::PLL1_ARM: {
-                clkPLL1setup(CLK_DISABLE);
-            }
-                break;
-            case PLLInstances::OSC_24M: {
-                //not used
-            }
-                break;
+        case PLLInstances::PLL4_Audio: {
+            clkPLL4setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::PLL3: {
+            clkPLL3setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::PLL3_PFD0: {
+            clkPLL3_PFD0setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::PLL3_PFD1: {
+            clkPLL3_PFD1setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::PLL3_PFD2: {
+            clkPLL3_PFD2setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::PLL2_PFD2:
+            clkPLL2_PFD2setup(CLK_DISABLE);
+            break;
+        case PLLInstances::PLL1_ARM: {
+            clkPLL1setup(CLK_DISABLE);
+        } break;
+        case PLLInstances::OSC_24M: {
+            // not used
+        } break;
         }
 
-        LOG_DEBUG("Deinit: %s",name.c_str());
+        LOG_DEBUG("Deinit: %s", name.c_str());
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverPLL.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverPLL.hpp
index 06475cc91..8e3c81475 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverPLL.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverPLL.hpp
@@ -2,33 +2,30 @@
  *  @file RT1051DriverPLL.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051DRIVERPLL_HPP
 #define PUREPHONE_RT1051DRIVERPLL_HPP
 
 #include "drivers/pll/DriverPLL.hpp"
 
-namespace drivers {
+namespace drivers
+{
 
-    class RT1051DriverPLL : public DriverPLL {
-    public:
-
-        RT1051DriverPLL(const PLLInstances &inst, const DriverPLLParams& params);
+    class RT1051DriverPLL : public DriverPLL
+    {
+      public:
+        RT1051DriverPLL(const PLLInstances &inst, const DriverPLLParams &params);
         ~RT1051DriverPLL();
 
-    private:
+      private:
         PLLInstances instance;
         std::string name;
-
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_RT1051DRIVERPLL_HPP
+#endif // PUREPHONE_RT1051DRIVERPLL_HPP
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverSAI.cpp b/module-bsp/board/rt1051/drivers/RT1051DriverSAI.cpp
index be46aebb9..1d2a254d5 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverSAI.cpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverSAI.cpp
@@ -2,227 +2,234 @@
  *  @file RT1051DriverSAI.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "RT1051DriverSAI.hpp"
 #include "bsp/BoardDefinitions.hpp"
 
-
 #include "../fsl_drivers/fsl_sai_edma.h"
 
-
-
-namespace drivers{
+namespace drivers
+{
 
     using namespace magic_enum;
 
-     sai_edma_handle_t RT1051DriverSAI::txHandle[magic_enum::enum_count<SAIInstances >()] = {};
-     sai_edma_handle_t RT1051DriverSAI::rxHandle[magic_enum::enum_count<SAIInstances >()] = {};
+    sai_edma_handle_t RT1051DriverSAI::txHandle[magic_enum::enum_count<SAIInstances>()] = {};
+    sai_edma_handle_t RT1051DriverSAI::rxHandle[magic_enum::enum_count<SAIInstances>()] = {};
 
-    RT1051DriverSAI::RT1051DriverSAI(const drivers::SAIInstances &inst, const drivers::DriverSAIParams &params) : DriverSAI(params) {
-            switch(instances){
-                case SAIInstances ::SAI_1:
-                    rxDMASource = kDmaRequestMuxSai1Rx;
-                    txDMASource = kDmaRequestMuxSai1Tx;
-                    base = SAI1;
-                    IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK;
-                    break;
-                case SAIInstances ::SAI_2:
-                    rxDMASource = kDmaRequestMuxSai2Rx;
-                    txDMASource = kDmaRequestMuxSai2Tx;
-                    base = SAI2;
-                    IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK;
-                    break;
-                case SAIInstances ::SAI_3:
-                    rxDMASource = kDmaRequestMuxSai3Rx;
-                    txDMASource = kDmaRequestMuxSai3Tx;
-                    base = SAI3;
-                    IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK;
-                    break;
-            }
-
-        pll = DriverInterface<DriverPLL>::Create(static_cast<PLLInstances >(BoardDefinitions ::AUDIO_PLL),DriverPLLParams{});
-        dmamux = DriverInterface<DriverDMAMux>::Create(static_cast<DMAMuxInstances >(BoardDefinitions ::AUDIOCODEC_DMAMUX),DriverDMAMuxParams{});
-        dma = DriverInterface<DriverDMA>::Create(static_cast<DMAInstances >(BoardDefinitions ::AUDIOCODEC_DMA),DriverDMAParams{});
+    RT1051DriverSAI::RT1051DriverSAI(const drivers::SAIInstances &inst, const drivers::DriverSAIParams &params)
+        : DriverSAI(params)
+    {
+        switch (instances) {
+        case SAIInstances ::SAI_1:
+            rxDMASource = kDmaRequestMuxSai1Rx;
+            txDMASource = kDmaRequestMuxSai1Tx;
+            base        = SAI1;
+            IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK;
+            break;
+        case SAIInstances ::SAI_2:
+            rxDMASource = kDmaRequestMuxSai2Rx;
+            txDMASource = kDmaRequestMuxSai2Tx;
+            base        = SAI2;
+            IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK;
+            break;
+        case SAIInstances ::SAI_3:
+            rxDMASource = kDmaRequestMuxSai3Rx;
+            txDMASource = kDmaRequestMuxSai3Tx;
+            base        = SAI3;
+            IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK;
+            break;
+        }
 
+        pll    = DriverInterface<DriverPLL>::Create(static_cast<PLLInstances>(BoardDefinitions ::AUDIO_PLL),
+                                                 DriverPLLParams{});
+        dmamux = DriverInterface<DriverDMAMux>::Create(
+            static_cast<DMAMuxInstances>(BoardDefinitions ::AUDIOCODEC_DMAMUX), DriverDMAMuxParams{});
+        dma = DriverInterface<DriverDMA>::Create(static_cast<DMAInstances>(BoardDefinitions ::AUDIOCODEC_DMA),
+                                                 DriverDMAParams{});
     }
 
-    RT1051DriverSAI::~RT1051DriverSAI() {
+    RT1051DriverSAI::~RT1051DriverSAI()
+    {}
 
-    }
-
-    int32_t RT1051DriverSAI::StartInTransfer(const drivers::TransferParams &rx) {
+    int32_t RT1051DriverSAI::StartInTransfer(const drivers::TransferParams &rx)
+    {
         sai_transfer_t xfer = {0};
         sai_config_t config;
         sai_transfer_format_t sai_format = {0};
 
         rxParams = rx;
 
-        dmamux->Enable(parameters.rxDMAChannel,rxDMASource);
+        dmamux->Enable(parameters.rxDMAChannel, rxDMASource);
         dma->CreateHandle(parameters.rxDMAChannel);
 
         // Initialize SAI Rx module
         SAI_RxGetDefaultConfig(&config);
 
-        config.masterSlave = (parameters.masterslave == DriverSAIParams::MasterSlave ::Slave) ? kSAI_Slave : kSAI_Master;
+        config.masterSlave =
+            (parameters.masterslave == DriverSAIParams::MasterSlave ::Slave) ? kSAI_Slave : kSAI_Master;
         SAI_RxInit(base, &config);
 
         /* Configure the audio format */
-        sai_format.bitWidth = parameters.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = parameters.sampleRate;
-        sai_format.masterClockHz = parameters.masterClock;
+        sai_format.bitWidth           = parameters.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = parameters.sampleRate;
+        sai_format.masterClockHz      = parameters.masterClock;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = static_cast<sai_protocol_t>(parameters.protocol);
-        sai_format.stereo = static_cast<sai_mono_stereo_t>(parameters.monostereo);
+        sai_format.protocol           = static_cast<sai_protocol_t>(parameters.protocol);
+        sai_format.stereo             = static_cast<sai_mono_stereo_t>(parameters.monostereo);
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
-        SAI_TransferRxCreateHandleEDMA(base, &rxHandle[enum_integer(instances)], rxAudioCallback, this,
-                                       reinterpret_cast<edma_handle_t*>(dma->GetHandle(parameters.rxDMAChannel)));
+        SAI_TransferRxCreateHandleEDMA(base,
+                                       &rxHandle[enum_integer(instances)],
+                                       rxAudioCallback,
+                                       this,
+                                       reinterpret_cast<edma_handle_t *>(dma->GetHandle(parameters.rxDMAChannel)));
 
-        SAI_TransferRxSetFormatEDMA(base, &rxHandle[enum_integer(instances)], &sai_format, parameters.masterClock,
-                                    parameters.masterClock);
+        SAI_TransferRxSetFormatEDMA(
+            base, &rxHandle[enum_integer(instances)], &sai_format, parameters.masterClock, parameters.masterClock);
 
         /* Reset SAI Rx internal logic */
         SAI_RxSoftwareReset(base, kSAI_ResetTypeSoftware);
 
-        xfer.data = rx.data;
+        xfer.data     = rx.data;
         xfer.dataSize = rx.size;
         SAI_TransferReceiveEDMA(base, &rxHandle[enum_integer(instances)], &xfer);
     }
 
-    int32_t RT1051DriverSAI::StopInTransfer() {
+    int32_t RT1051DriverSAI::StopInTransfer()
+    {
         SAI_RxDisableInterrupts(base, kSAI_FIFOErrorInterruptEnable);
-        if(rxHandle[enum_integer(instances)].dmaHandle){
-            SAI_TransferAbortReceiveEDMA(base,&rxHandle[enum_integer(instances)]);
-            memset(&rxHandle[enum_integer(instances)],0,sizeof(sai_edma_handle_t));
+        if (rxHandle[enum_integer(instances)].dmaHandle) {
+            SAI_TransferAbortReceiveEDMA(base, &rxHandle[enum_integer(instances)]);
+            memset(&rxHandle[enum_integer(instances)], 0, sizeof(sai_edma_handle_t));
         }
-
     }
 
-    int32_t RT1051DriverSAI::StartOutTransfer(const drivers::TransferParams &tx) {
+    int32_t RT1051DriverSAI::StartOutTransfer(const drivers::TransferParams &tx)
+    {
         sai_transfer_t xfer = {0};
         sai_config_t config;
         sai_transfer_format_t sai_format = {0};
 
         txParams = tx;
 
-        dmamux->Enable(parameters.txDMAChannel,txDMASource);
+        dmamux->Enable(parameters.txDMAChannel, txDMASource);
         dma->CreateHandle(parameters.txDMAChannel);
 
         // Initialize SAI Tx module
         SAI_TxGetDefaultConfig(&config);
-        config.masterSlave = (parameters.masterslave == DriverSAIParams::MasterSlave ::Slave) ? kSAI_Slave : kSAI_Master;
+        config.masterSlave =
+            (parameters.masterslave == DriverSAIParams::MasterSlave ::Slave) ? kSAI_Slave : kSAI_Master;
         SAI_TxInit(base, &config);
 
         /* Configure the audio format */
-        sai_format.bitWidth = parameters.bitWidth;
-        sai_format.channel = 0U;
-        sai_format.sampleRate_Hz = parameters.sampleRate;
-        sai_format.masterClockHz = parameters.masterClock;
+        sai_format.bitWidth           = parameters.bitWidth;
+        sai_format.channel            = 0U;
+        sai_format.sampleRate_Hz      = parameters.sampleRate;
+        sai_format.masterClockHz      = parameters.masterClock;
         sai_format.isFrameSyncCompact = false;
-        sai_format.protocol = static_cast<sai_protocol_t>(parameters.protocol);
-        sai_format.stereo = static_cast<sai_mono_stereo_t>(parameters.monostereo);
+        sai_format.protocol           = static_cast<sai_protocol_t>(parameters.protocol);
+        sai_format.stereo             = static_cast<sai_mono_stereo_t>(parameters.monostereo);
 #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
         sai_format.watermark = FSL_FEATURE_SAI_FIFO_COUNT / 2U;
 #endif
 
+        SAI_TransferTxCreateHandleEDMA(base,
+                                       &txHandle[enum_integer(instances)],
+                                       txAudioCallback,
+                                       this,
+                                       reinterpret_cast<edma_handle_t *>(dma->GetHandle(parameters.txDMAChannel)));
 
-        SAI_TransferTxCreateHandleEDMA(base, &txHandle[enum_integer(instances)], txAudioCallback, this, reinterpret_cast<edma_handle_t*>(dma->GetHandle(parameters.txDMAChannel)));
-
-        SAI_TransferTxSetFormatEDMA(base, &txHandle[enum_integer(instances)], &sai_format, parameters.masterClock,
-                                    parameters.masterClock);
+        SAI_TransferTxSetFormatEDMA(
+            base, &txHandle[enum_integer(instances)], &sai_format, parameters.masterClock, parameters.masterClock);
 
         /* Reset SAI Tx internal logic */
         SAI_TxSoftwareReset(base, kSAI_ResetTypeSoftware);
 
-        xfer.data = tx.data;
+        xfer.data     = tx.data;
         xfer.dataSize = tx.size;
         SAI_TransferSendEDMA(base, &txHandle[enum_integer(instances)], &xfer);
     }
 
-    int32_t RT1051DriverSAI::StopOutTransfer() {
+    int32_t RT1051DriverSAI::StopOutTransfer()
+    {
         SAI_TxDisableInterrupts(base, kSAI_FIFOErrorInterruptEnable);
-        if(txHandle[enum_integer(instances)].dmaHandle){
-            SAI_TransferTerminateSendEDMA(base,&txHandle[enum_integer(instances)]);
-            memset(&txHandle[enum_integer(instances)],0,sizeof(sai_edma_handle_t));
+        if (txHandle[enum_integer(instances)].dmaHandle) {
+            SAI_TransferTerminateSendEDMA(base, &txHandle[enum_integer(instances)]);
+            memset(&txHandle[enum_integer(instances)], 0, sizeof(sai_edma_handle_t));
         }
-
     }
 
-    int32_t RT1051DriverSAI::SetOutTransferEndCallback(std::function<int32_t()> callback) {
+    int32_t RT1051DriverSAI::SetOutTransferEndCallback(std::function<int32_t()> callback)
+    {
         txTransferEndCallback = callback;
     }
 
-    int32_t RT1051DriverSAI::SetInTransferEndCallback(std::function<int32_t()> callback) {
+    int32_t RT1051DriverSAI::SetInTransferEndCallback(std::function<int32_t()> callback)
+    {
         rxTransferEndCallback = callback;
     }
 
-
-
-    void txAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData){
-        sai_transfer_t xfer = {0};
+    void txAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
+        sai_transfer_t xfer                 = {0};
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-        RT1051DriverSAI *inst = (RT1051DriverSAI *) userData;
+        RT1051DriverSAI *inst               = (RT1051DriverSAI *)userData;
 
         if (inst->txTransferState == RT1051DriverSAI::TransferState::HalfTransfer) {
 
             xfer.dataSize = inst->txParams.size;
-            xfer.data = inst->txParams.data + (inst->txParams.size);
+            xfer.data     = inst->txParams.data + (inst->txParams.size);
             SAI_TransferSendEDMA(base, &inst->txHandle[enum_integer(inst->instances)], &xfer);
 
             inst->txTransferEndCallback();
 
             inst->txTransferState = RT1051DriverSAI::TransferState::FullTransfer;
-
-
-        } else {
+        }
+        else {
             xfer.dataSize = inst->txParams.size;
-            xfer.data = inst->txParams.data;
+            xfer.data     = inst->txParams.data;
             SAI_TransferSendEDMA(base, &inst->txHandle[enum_integer(inst->instances)], &xfer);
 
             inst->txTransferEndCallback();
 
             inst->txTransferState = RT1051DriverSAI::TransferState::HalfTransfer;
-
         }
 
         portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
     }
-    void rxAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData){
-        sai_transfer_t xfer = {0};
+    void rxAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData)
+    {
+        sai_transfer_t xfer                 = {0};
         BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-        RT1051DriverSAI *inst = (RT1051DriverSAI *) userData;
+        RT1051DriverSAI *inst               = (RT1051DriverSAI *)userData;
 
         if (inst->txTransferState == RT1051DriverSAI::TransferState::HalfTransfer) {
 
             xfer.dataSize = inst->txParams.size;
-            xfer.data = inst->txParams.data + (inst->txParams.size);
+            xfer.data     = inst->txParams.data + (inst->txParams.size);
             SAI_TransferReceiveEDMA(base, &inst->txHandle[enum_integer(inst->instances)], &xfer);
 
             inst->txTransferEndCallback();
 
             inst->txTransferState = RT1051DriverSAI::TransferState::FullTransfer;
-
-
-        } else {
+        }
+        else {
             xfer.dataSize = inst->txParams.size;
-            xfer.data = inst->txParams.data;
+            xfer.data     = inst->txParams.data;
             SAI_TransferReceiveEDMA(base, &inst->txHandle[enum_integer(inst->instances)], &xfer);
 
             inst->txTransferEndCallback();
 
             inst->txTransferState = RT1051DriverSAI::TransferState::HalfTransfer;
-
         }
 
         portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
     }
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/board/rt1051/drivers/RT1051DriverSAI.hpp b/module-bsp/board/rt1051/drivers/RT1051DriverSAI.hpp
index 841649b0c..09d9e90a2 100644
--- a/module-bsp/board/rt1051/drivers/RT1051DriverSAI.hpp
+++ b/module-bsp/board/rt1051/drivers/RT1051DriverSAI.hpp
@@ -2,13 +2,11 @@
  *  @file RT1051DriverSAI.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_RT1051DRIVERSAI_HPP
 #define PUREPHONE_RT1051DRIVERSAI_HPP
 
@@ -19,16 +17,17 @@
 #include "../fsl_drivers/fsl_sai.h"
 #include "../fsl_drivers/fsl_sai_edma.h"
 
-namespace drivers {
+namespace drivers
+{
 
     void txAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
 
     void rxAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
 
-    class RT1051DriverSAI : public DriverSAI {
-
-    public:
+    class RT1051DriverSAI : public DriverSAI
+    {
 
+      public:
         friend void txAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
 
         friend void rxAudioCallback(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData);
@@ -49,15 +48,13 @@ namespace drivers {
 
         int32_t SetInTransferEndCallback(std::function<int32_t()> callback) override final;
 
-
-    private:
-
-        enum class TransferState {
+      private:
+        enum class TransferState
+        {
             HalfTransfer,
             FullTransfer
         };
 
-
         I2S_Type *base = nullptr;
         SAIInstances instances;
 
@@ -78,11 +75,9 @@ namespace drivers {
         TransferParams txParams;
         TransferParams rxParams;
 
-        uint32_t txDMASource=0;
-        uint32_t rxDMASource=0;
-
+        uint32_t txDMASource = 0;
+        uint32_t rxDMASource = 0;
     };
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_RT1051DRIVERSAI_HPP
+#endif // PUREPHONE_RT1051DRIVERSAI_HPP
diff --git a/module-bsp/drivers/dma/DriverDMA.cpp b/module-bsp/drivers/dma/DriverDMA.cpp
index af116c757..9750eef94 100644
--- a/module-bsp/drivers/dma/DriverDMA.cpp
+++ b/module-bsp/drivers/dma/DriverDMA.cpp
@@ -2,13 +2,11 @@
  *  @file DriverDMA.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverDMA.hpp"
 #include "critical.hpp"
 
@@ -21,33 +19,34 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
-    std::weak_ptr<DriverDMA> DriverDMA::singleton[static_cast<uint32_t >(DMAInstances ::COUNT)];
+    std::weak_ptr<DriverDMA> DriverDMA::singleton[static_cast<uint32_t>(DMAInstances ::COUNT)];
 
     std::shared_ptr<DriverDMA> DriverDMA::Create(const drivers::DMAInstances instance,
-                                                       const drivers::DriverDMAParams &params) {
+                                                 const drivers::DriverDMAParams &params)
+    {
         {
 
             cpp_freertos::CriticalSection::Enter();
-            std::shared_ptr<DriverDMA> inst = singleton[static_cast<uint32_t >(instance)].lock();
+            std::shared_ptr<DriverDMA> inst = singleton[static_cast<uint32_t>(instance)].lock();
 
             if (!inst) {
 #if defined(TARGET_RT1051)
-                inst = std::make_shared<RT1051DriverDMA>(instance,params);
+                inst = std::make_shared<RT1051DriverDMA>(instance, params);
 #elif defined(TARGET_Linux)
-                #else
+#else
 #error "Unsupported target"
 #endif
 
-                singleton[static_cast<uint32_t >(instance)] = inst;
+                singleton[static_cast<uint32_t>(instance)] = inst;
             }
 
             cpp_freertos::CriticalSection::Exit();
 
             return inst;
-
         }
     }
 
-}
+} // namespace drivers
diff --git a/module-bsp/drivers/dma/DriverDMA.hpp b/module-bsp/drivers/dma/DriverDMA.hpp
index 88c53fe02..978410ac5 100644
--- a/module-bsp/drivers/dma/DriverDMA.hpp
+++ b/module-bsp/drivers/dma/DriverDMA.hpp
@@ -2,56 +2,56 @@
  *  @file DriverDMA.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERDMA_HPP
 #define PUREPHONE_DRIVERDMA_HPP
 
-
 #include <functional>
 #include <memory>
 
-namespace drivers {
+namespace drivers
+{
 
-
-    enum class DMAInstances {
+    enum class DMAInstances
+    {
         DMA_0,
         COUNT
     };
 
-    struct DriverDMAParams {
+    struct DriverDMAParams
+    {};
 
+    class DriverDMAHandle
+    {
+      public:
+        virtual void *GetHandle() = 0;
     };
 
-    class DriverDMAHandle{
-    public:
-        virtual void* GetHandle() = 0;
-    };
-
-    class DriverDMA  {
-    public:
-
+    class DriverDMA
+    {
+      public:
         static std::shared_ptr<DriverDMA> Create(const DMAInstances inst, const DriverDMAParams &params);
 
-        DriverDMA(const DriverDMAParams &params) : parameters(params) {}
+        DriverDMA(const DriverDMAParams &params) : parameters(params)
+        {}
 
-        virtual ~DriverDMA() {}
+        virtual ~DriverDMA()
+        {}
 
-        virtual std::unique_ptr<DriverDMAHandle> CreateHandle(const uint32_t channel,std::function<void()> callback=nullptr) = 0;
+        virtual std::unique_ptr<DriverDMAHandle> CreateHandle(const uint32_t channel,
+                                                              std::function<void()> callback = nullptr) = 0;
 
-    protected:
+      protected:
         const DriverDMAParams parameters;
-    private:
-        static std::weak_ptr<DriverDMA> singleton[static_cast<uint32_t >(DMAInstances ::COUNT)];
 
+      private:
+        static std::weak_ptr<DriverDMA> singleton[static_cast<uint32_t>(DMAInstances ::COUNT)];
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERDMA_HPP
+#endif // PUREPHONE_DRIVERDMA_HPP
diff --git a/module-bsp/drivers/dmamux/DriverDMAMux.cpp b/module-bsp/drivers/dmamux/DriverDMAMux.cpp
index 754f4fa89..8bf1a1a37 100644
--- a/module-bsp/drivers/dmamux/DriverDMAMux.cpp
+++ b/module-bsp/drivers/dmamux/DriverDMAMux.cpp
@@ -2,13 +2,11 @@
  *  @file DriverDMAMux.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverDMAMux.hpp"
 #include "critical.hpp"
 
@@ -21,33 +19,34 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
-    std::weak_ptr<DriverDMAMux> DriverDMAMux::singleton[static_cast<uint32_t >(DMAMuxInstances ::COUNT)];
+    std::weak_ptr<DriverDMAMux> DriverDMAMux::singleton[static_cast<uint32_t>(DMAMuxInstances ::COUNT)];
 
     std::shared_ptr<DriverDMAMux> DriverDMAMux::Create(const drivers::DMAMuxInstances instance,
-                                                 const drivers::DriverDMAMuxParams &params) {
+                                                       const drivers::DriverDMAMuxParams &params)
+    {
         {
 
             cpp_freertos::CriticalSection::Enter();
-            std::shared_ptr<DriverDMAMux> inst = singleton[static_cast<uint32_t >(instance)].lock();
+            std::shared_ptr<DriverDMAMux> inst = singleton[static_cast<uint32_t>(instance)].lock();
 
             if (!inst) {
 #if defined(TARGET_RT1051)
-                inst = std::make_shared<RT1051DriverDMAMux>(instance,params);
+                inst = std::make_shared<RT1051DriverDMAMux>(instance, params);
 #elif defined(TARGET_Linux)
-                #else
+#else
 #error "Unsupported target"
 #endif
 
-                singleton[static_cast<uint32_t >(instance)] = inst;
+                singleton[static_cast<uint32_t>(instance)] = inst;
             }
 
             cpp_freertos::CriticalSection::Exit();
 
             return inst;
-
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/drivers/dmamux/DriverDMAMux.hpp b/module-bsp/drivers/dmamux/DriverDMAMux.hpp
index be3cf15bd..3a676d059 100644
--- a/module-bsp/drivers/dmamux/DriverDMAMux.hpp
+++ b/module-bsp/drivers/dmamux/DriverDMAMux.hpp
@@ -2,51 +2,49 @@
  *  @file DriverDMAMux.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERDMAMUX_HPP
 #define PUREPHONE_DRIVERDMAMUX_HPP
 
 #include <memory>
 
-namespace drivers {
+namespace drivers
+{
 
-
-    enum class DMAMuxInstances {
+    enum class DMAMuxInstances
+    {
         DMAMUX0,
         COUNT
     };
 
-    struct DriverDMAMuxParams {
-
-    };
-
-    class DriverDMAMux {
-    public:
+    struct DriverDMAMuxParams
+    {};
 
+    class DriverDMAMux
+    {
+      public:
         static std::shared_ptr<DriverDMAMux> Create(const DMAMuxInstances inst, const DriverDMAMuxParams &params);
 
-        DriverDMAMux(const DriverDMAMuxParams& params): parameters(params) {}
+        DriverDMAMux(const DriverDMAMuxParams &params) : parameters(params)
+        {}
 
-        virtual ~DriverDMAMux() {}
+        virtual ~DriverDMAMux()
+        {}
 
-        virtual void Enable(const uint32_t channel,const uint32_t source=UINT32_MAX) = 0;
-        virtual void Disable(const uint32_t channel) = 0;
+        virtual void Enable(const uint32_t channel, const uint32_t source = UINT32_MAX) = 0;
+        virtual void Disable(const uint32_t channel)                                    = 0;
 
-    protected:
+      protected:
         const DriverDMAMuxParams parameters;
 
-    private:
-        static std::weak_ptr<DriverDMAMux> singleton[static_cast<uint32_t >(DMAMuxInstances ::COUNT)];
-
+      private:
+        static std::weak_ptr<DriverDMAMux> singleton[static_cast<uint32_t>(DMAMuxInstances ::COUNT)];
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERDMAMUX_HPP
+#endif // PUREPHONE_DRIVERDMAMUX_HPP
diff --git a/module-bsp/drivers/gpio/DriverGPIO.cpp b/module-bsp/drivers/gpio/DriverGPIO.cpp
index cc9fcf3a1..0c562221c 100644
--- a/module-bsp/drivers/gpio/DriverGPIO.cpp
+++ b/module-bsp/drivers/gpio/DriverGPIO.cpp
@@ -2,13 +2,11 @@
  *  @file DriverGPIO.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 14.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverGPIO.hpp"
 
 #include "critical.hpp"
@@ -22,33 +20,34 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
-    std::weak_ptr<DriverGPIO> DriverGPIO::singleton[static_cast<uint32_t >(GPIOInstances ::COUNT)];
+    std::weak_ptr<DriverGPIO> DriverGPIO::singleton[static_cast<uint32_t>(GPIOInstances ::COUNT)];
 
     std::shared_ptr<DriverGPIO> DriverGPIO::Create(const drivers::GPIOInstances instance,
-                                                 const drivers::DriverGPIOParams &params) {
+                                                   const drivers::DriverGPIOParams &params)
+    {
         {
 
             cpp_freertos::CriticalSection::Enter();
-            std::shared_ptr<DriverGPIO> inst = singleton[static_cast<uint32_t >(instance)].lock();
+            std::shared_ptr<DriverGPIO> inst = singleton[static_cast<uint32_t>(instance)].lock();
 
             if (!inst) {
 #if defined(TARGET_RT1051)
-                inst = std::make_shared<RT1051DriverGPIO>(instance,params);
+                inst = std::make_shared<RT1051DriverGPIO>(instance, params);
 #elif defined(TARGET_Linux)
-                #else
+#else
 #error "Unsupported target"
 #endif
 
-                singleton[static_cast<uint32_t >(instance)] = inst;
+                singleton[static_cast<uint32_t>(instance)] = inst;
             }
 
             cpp_freertos::CriticalSection::Exit();
 
             return inst;
-
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/drivers/gpio/DriverGPIO.hpp b/module-bsp/drivers/gpio/DriverGPIO.hpp
index 0528e3b6f..33774fbd9 100644
--- a/module-bsp/drivers/gpio/DriverGPIO.hpp
+++ b/module-bsp/drivers/gpio/DriverGPIO.hpp
@@ -2,13 +2,11 @@
  *  @file DriverGPIO.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 14.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERGPIO_HPP
 #define PUREPHONE_DRIVERGPIO_HPP
 
@@ -16,10 +14,11 @@
 #include <functional>
 #include "menums/magic_enum.hpp"
 
-namespace drivers {
+namespace drivers
+{
 
-
-    enum class GPIOInstances {
+    enum class GPIOInstances
+    {
         GPIO_1,
         GPIO_2,
         GPIO_3,
@@ -28,22 +27,24 @@ namespace drivers {
         COUNT
     };
 
-    struct DriverGPIOParams {
+    struct DriverGPIOParams
+    {};
 
-    };
-
-    struct DriverGPIOPinParams{
-        enum class Direction{
-            Input=0, /*!< Set current pin as digital input.*/
-            Output /*!< Set current pin as digital output.*/
+    struct DriverGPIOPinParams
+    {
+        enum class Direction
+        {
+            Input = 0, /*!< Set current pin as digital input.*/
+            Output     /*!< Set current pin as digital output.*/
         };
 
-        enum class InterruptMode{
-            NoIntmode = 0U,              /*!< Set current pin general IO functionality.*/
-            IntLowLevel = 1U,            /*!< Set current pin interrupt is low-level sensitive.*/
-            IntHighLevel = 2U,           /*!< Set current pin interrupt is high-level sensitive.*/
-            IntRisingEdge = 3U,          /*!< Set current pin interrupt is rising-edge sensitive.*/
-            IntFallingEdge = 4U,         /*!< Set current pin interrupt is falling-edge sensitive.*/
+        enum class InterruptMode
+        {
+            NoIntmode              = 0U, /*!< Set current pin general IO functionality.*/
+            IntLowLevel            = 1U, /*!< Set current pin interrupt is low-level sensitive.*/
+            IntHighLevel           = 2U, /*!< Set current pin interrupt is high-level sensitive.*/
+            IntRisingEdge          = 3U, /*!< Set current pin interrupt is rising-edge sensitive.*/
+            IntFallingEdge         = 4U, /*!< Set current pin interrupt is falling-edge sensitive.*/
             IntRisingOrFallingEdge = 5U, /*!< Enable the edge select bit to override the ICR register's configuration.*/
         };
 
@@ -53,15 +54,18 @@ namespace drivers {
         uint32_t pin;
     };
 
-    class DriverGPIO {
-    public:
+    class DriverGPIO
+    {
+      public:
         static std::shared_ptr<DriverGPIO> Create(const GPIOInstances inst, const DriverGPIOParams &params);
 
-        DriverGPIO(const DriverGPIOParams &params) : parameters(params) {}
+        DriverGPIO(const DriverGPIOParams &params) : parameters(params)
+        {}
 
-        virtual ~DriverGPIO() {}
+        virtual ~DriverGPIO()
+        {}
 
-        virtual int32_t ConfPin(const DriverGPIOPinParams& params) = 0;
+        virtual int32_t ConfPin(const DriverGPIOPinParams &params) = 0;
 
         // Sets the output level of the multiple GPIO pins to the logic 1.
         virtual void SetPort(const uint32_t mask) = 0;
@@ -84,16 +88,13 @@ namespace drivers {
 
         virtual void ClearPortInterrupts(const uint32_t mask) = 0;
 
-
-    protected:
+      protected:
         const DriverGPIOParams parameters;
 
-    private:
-        static std::weak_ptr<DriverGPIO> singleton[static_cast<uint32_t >(GPIOInstances ::COUNT)];
-
+      private:
+        static std::weak_ptr<DriverGPIO> singleton[static_cast<uint32_t>(GPIOInstances ::COUNT)];
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERGPIO_HPP
+#endif // PUREPHONE_DRIVERGPIO_HPP
diff --git a/module-bsp/drivers/i2c/DriverI2C.cpp b/module-bsp/drivers/i2c/DriverI2C.cpp
index fb7289d36..d4f66110b 100644
--- a/module-bsp/drivers/i2c/DriverI2C.cpp
+++ b/module-bsp/drivers/i2c/DriverI2C.cpp
@@ -2,13 +2,11 @@
  *  @file DriverI2C.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverI2C.hpp"
 
 #include "critical.hpp"
@@ -22,33 +20,34 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
-    std::weak_ptr<DriverI2C> DriverI2C::singleton[static_cast<uint32_t >(I2CInstances ::COUNT)];
+    std::weak_ptr<DriverI2C> DriverI2C::singleton[static_cast<uint32_t>(I2CInstances ::COUNT)];
 
     std::shared_ptr<DriverI2C> DriverI2C::Create(const drivers::I2CInstances instance,
-                                                 const drivers::DriverI2CParams &params) {
+                                                 const drivers::DriverI2CParams &params)
+    {
         {
 
             cpp_freertos::CriticalSection::Enter();
-            std::shared_ptr<DriverI2C> inst = singleton[static_cast<uint32_t >(instance)].lock();
+            std::shared_ptr<DriverI2C> inst = singleton[static_cast<uint32_t>(instance)].lock();
 
             if (!inst) {
 #if defined(TARGET_RT1051)
-                inst = std::make_shared<RT1051DriverI2C>(instance,params);
+                inst = std::make_shared<RT1051DriverI2C>(instance, params);
 #elif defined(TARGET_Linux)
-                #else
+#else
 #error "Unsupported target"
 #endif
 
-                singleton[static_cast<uint32_t >(instance)] = inst;
+                singleton[static_cast<uint32_t>(instance)] = inst;
             }
 
             cpp_freertos::CriticalSection::Exit();
 
             return inst;
-
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/drivers/i2c/DriverI2C.hpp b/module-bsp/drivers/i2c/DriverI2C.hpp
index 6167e07d6..8f167a3bc 100644
--- a/module-bsp/drivers/i2c/DriverI2C.hpp
+++ b/module-bsp/drivers/i2c/DriverI2C.hpp
@@ -2,47 +2,49 @@
  *  @file DriverI2C.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERI2C_HPP
 #define PUREPHONE_DRIVERI2C_HPP
 
 #include <memory>
 
-namespace drivers {
+namespace drivers
+{
 
-
-    enum class I2CInstances {
+    enum class I2CInstances
+    {
         I2C1,
         I2C2,
         COUNT
     };
 
-    struct DriverI2CParams {
+    struct DriverI2CParams
+    {
         uint32_t baudrate;
-        //TODO:M.P add slave conf
+        // TODO:M.P add slave conf
     };
 
-    struct I2CAddress {
+    struct I2CAddress
+    {
         uint32_t deviceAddress;
         uint32_t subAddress;
         size_t subAddressSize;
     };
 
-
-    class DriverI2C {
-    public:
-
+    class DriverI2C
+    {
+      public:
         static std::shared_ptr<DriverI2C> Create(const I2CInstances inst, const DriverI2CParams &params);
 
-        DriverI2C(const DriverI2CParams& params,const I2CInstances inst): parameters(params),instance(inst) {}
+        DriverI2C(const DriverI2CParams &params, const I2CInstances inst) : parameters(params), instance(inst)
+        {}
 
-        virtual ~DriverI2C() {}
+        virtual ~DriverI2C()
+        {}
 
         virtual ssize_t Write(const I2CAddress &addr, const uint8_t *txBuff, const size_t size) = 0;
 
@@ -50,16 +52,14 @@ namespace drivers {
 
         virtual ssize_t Modify(const I2CAddress &addr, const uint32_t mask, bool setClr, const size_t size) = 0;
 
-    protected:
+      protected:
         I2CInstances instance;
         const DriverI2CParams parameters;
 
-    private:
-        static std::weak_ptr<DriverI2C> singleton[static_cast<uint32_t >(I2CInstances ::COUNT)];
-
+      private:
+        static std::weak_ptr<DriverI2C> singleton[static_cast<uint32_t>(I2CInstances ::COUNT)];
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERI2C_HPP
+#endif // PUREPHONE_DRIVERI2C_HPP
diff --git a/module-bsp/drivers/irq/DriverIRQ.cpp b/module-bsp/drivers/irq/DriverIRQ.cpp
index 30d95870d..9119ac43f 100644
--- a/module-bsp/drivers/irq/DriverIRQ.cpp
+++ b/module-bsp/drivers/irq/DriverIRQ.cpp
@@ -8,5 +8,4 @@
  * @details
  */
 
-
 #include "DriverIRQ.hpp"
diff --git a/module-bsp/drivers/irq/DriverIRQ.hpp b/module-bsp/drivers/irq/DriverIRQ.hpp
index 8871aaeb5..e2000f672 100644
--- a/module-bsp/drivers/irq/DriverIRQ.hpp
+++ b/module-bsp/drivers/irq/DriverIRQ.hpp
@@ -8,17 +8,15 @@
  * @details
  */
 
-
 #ifndef PUREPHONE_DRIVERIRQ_HPP
 #define PUREPHONE_DRIVERIRQ_HPP
 
-namespace drivers {
+namespace drivers
+{
 
-    class DriverIRQ {
+    class DriverIRQ
+    {};
 
-    };
+} // namespace drivers
 
-}
-
-
-#endif //PUREPHONE_DRIVERIRQ_HPP
+#endif // PUREPHONE_DRIVERIRQ_HPP
diff --git a/module-bsp/drivers/pll/DriverPLL.cpp b/module-bsp/drivers/pll/DriverPLL.cpp
index e39a76b92..e414bfa90 100644
--- a/module-bsp/drivers/pll/DriverPLL.cpp
+++ b/module-bsp/drivers/pll/DriverPLL.cpp
@@ -2,13 +2,11 @@
  *  @file DriverPLL.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverPLL.hpp"
 #include "critical.hpp"
 
@@ -21,33 +19,34 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
-    std::weak_ptr<DriverPLL> DriverPLL::singleton[static_cast<uint32_t >(PLLInstances ::COUNT)];
+    std::weak_ptr<DriverPLL> DriverPLL::singleton[static_cast<uint32_t>(PLLInstances ::COUNT)];
 
     std::shared_ptr<DriverPLL> DriverPLL::Create(const drivers::PLLInstances instance,
-                                                 const drivers::DriverPLLParams &params) {
+                                                 const drivers::DriverPLLParams &params)
+    {
         {
 
             cpp_freertos::CriticalSection::Enter();
-            std::shared_ptr<DriverPLL> inst = singleton[static_cast<uint32_t >(instance)].lock();
+            std::shared_ptr<DriverPLL> inst = singleton[static_cast<uint32_t>(instance)].lock();
 
             if (!inst) {
 #if defined(TARGET_RT1051)
-                inst = std::make_shared<RT1051DriverPLL>(instance,params);
+                inst = std::make_shared<RT1051DriverPLL>(instance, params);
 #elif defined(TARGET_Linux)
-                #else
+#else
 #error "Unsupported target"
 #endif
 
-                singleton[static_cast<uint32_t >(instance)] = inst;
+                singleton[static_cast<uint32_t>(instance)] = inst;
             }
 
             cpp_freertos::CriticalSection::Exit();
 
             return inst;
-
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/drivers/pll/DriverPLL.hpp b/module-bsp/drivers/pll/DriverPLL.hpp
index 30b130b64..4069249c9 100644
--- a/module-bsp/drivers/pll/DriverPLL.hpp
+++ b/module-bsp/drivers/pll/DriverPLL.hpp
@@ -2,22 +2,21 @@
  *  @file DriverPLL.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERPLL_HPP
 #define PUREPHONE_DRIVERPLL_HPP
 
 #include <memory>
 
-namespace drivers {
+namespace drivers
+{
 
-
-    enum class PLLInstances {
+    enum class PLLInstances
+    {
         OSC_24M,
         PLL1_ARM,
         PLL2_PFD2,
@@ -29,27 +28,27 @@ namespace drivers {
         COUNT
     };
 
-    struct DriverPLLParams {
-
-    };
-
-    class DriverPLL {
-    public:
+    struct DriverPLLParams
+    {};
 
+    class DriverPLL
+    {
+      public:
         static std::shared_ptr<DriverPLL> Create(const PLLInstances inst, const DriverPLLParams &params);
 
-        DriverPLL(const DriverPLLParams& params): parameters(params) {}
+        DriverPLL(const DriverPLLParams &params) : parameters(params)
+        {}
 
-        virtual ~DriverPLL() {}
+        virtual ~DriverPLL()
+        {}
 
-    protected:
+      protected:
         const DriverPLLParams parameters;
-    private:
-        static std::weak_ptr<DriverPLL> singleton[static_cast<uint32_t >(PLLInstances ::COUNT)];
 
+      private:
+        static std::weak_ptr<DriverPLL> singleton[static_cast<uint32_t>(PLLInstances ::COUNT)];
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERPLL_HPP
+#endif // PUREPHONE_DRIVERPLL_HPP
diff --git a/module-bsp/drivers/sai/DriverSAI.cpp b/module-bsp/drivers/sai/DriverSAI.cpp
index cc575f07f..26def736e 100644
--- a/module-bsp/drivers/sai/DriverSAI.cpp
+++ b/module-bsp/drivers/sai/DriverSAI.cpp
@@ -2,13 +2,11 @@
  *  @file DriverSAI.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "DriverSAI.hpp"
 
 #if defined(TARGET_RT1051)
@@ -20,18 +18,20 @@
 #error "Unsupported target"
 #endif
 
-namespace drivers {
+namespace drivers
+{
 
     std::shared_ptr<DriverSAI> DriverSAI::Create(const drivers::SAIInstances inst,
-                                                 const drivers::DriverSAIParams &params) {
+                                                 const drivers::DriverSAIParams &params)
+    {
         {
 #if defined(TARGET_RT1051)
-            return  std::make_shared<RT1051DriverSAI>(inst,params);
+            return std::make_shared<RT1051DriverSAI>(inst, params);
 #elif defined(TARGET_Linux)
-            #else
+#else
 #error "Unsupported target"
 #endif
         }
     }
 
-}
\ No newline at end of file
+} // namespace drivers
\ No newline at end of file
diff --git a/module-bsp/drivers/sai/DriverSAI.hpp b/module-bsp/drivers/sai/DriverSAI.hpp
index 509401827..e157e4884 100644
--- a/module-bsp/drivers/sai/DriverSAI.hpp
+++ b/module-bsp/drivers/sai/DriverSAI.hpp
@@ -2,13 +2,11 @@
  *  @file DriverSAI.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.08.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_DRIVERSAI_HPP
 #define PUREPHONE_DRIVERSAI_HPP
 
@@ -18,19 +16,21 @@
 #include "drivers/dmamux/DriverDMAMux.hpp"
 #include "drivers/pll/DriverPLL.hpp"
 
+namespace drivers
+{
 
-namespace drivers {
-
-
-    enum class SAIInstances {
+    enum class SAIInstances
+    {
         SAI_1,
         SAI_2,
         SAI_3
     };
 
-    struct DriverSAIParams {
+    struct DriverSAIParams
+    {
 
-        enum class Protocol {
+        enum class Protocol
+        {
             LeftJustified,
             RightJusstified,
             I2S,
@@ -38,13 +38,15 @@ namespace drivers {
             PCMB
         };
 
-        enum class MonoStereo {
+        enum class MonoStereo
+        {
             Stereo = 0,
             MonoRight,
             MonoLeft
         };
 
-        enum class MasterSlave{
+        enum class MasterSlave
+        {
             Master,
             Slave
         };
@@ -58,27 +60,27 @@ namespace drivers {
         MasterSlave masterslave;
         uint32_t rxDMAChannel;
         uint32_t txDMAChannel;
-
-
     };
 
-    struct TransferParams {
+    struct TransferParams
+    {
         uint8_t *data;
         size_t size;
     };
 
-    struct TransferFormat {
-
-    };
-
-    class DriverSAI {
-    public:
+    struct TransferFormat
+    {};
 
+    class DriverSAI
+    {
+      public:
         static std::shared_ptr<DriverSAI> Create(const SAIInstances inst, const DriverSAIParams &params);
 
-        DriverSAI(const DriverSAIParams &params) : parameters(params) {}
+        DriverSAI(const DriverSAIParams &params) : parameters(params)
+        {}
 
-        virtual ~DriverSAI() {}
+        virtual ~DriverSAI()
+        {}
 
         virtual int32_t StartOutTransfer(const TransferParams &tx) = 0;
 
@@ -92,13 +94,10 @@ namespace drivers {
 
         virtual int32_t SetInTransferEndCallback(std::function<int32_t()> callback) = 0;
 
-
-    protected:
+      protected:
         const DriverSAIParams parameters;
-
     };
 
-}
+} // namespace drivers
 
-
-#endif //PUREPHONE_DRIVERSAI_HPP
+#endif // PUREPHONE_DRIVERSAI_HPP
diff --git a/module-bsp/tests/bsp_audio_tests.cpp b/module-bsp/tests/bsp_audio_tests.cpp
index c5e0ed904..9a15e5792 100644
--- a/module-bsp/tests/bsp_audio_tests.cpp
+++ b/module-bsp/tests/bsp_audio_tests.cpp
@@ -2,7 +2,7 @@
  *  @file bsp_audio_tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 22.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -12,39 +12,40 @@
 #include <stdint.h>
 #include <algorithm>
 
-
 #include "bsp/audio/bsp_audio.hpp"
 
 using namespace bsp;
 
-TEST_CASE( "Testing Linux Audiocodec" ) {
-    auto audiocodec = AudioDevice::Create(AudioDevice::Type::Audiocodec,[](const void *inputBuffer,
-                                                               void *outputBuffer,
-                                                               unsigned long framesPerBuffer)->int32_t {
+TEST_CASE("Testing Linux Audiocodec")
+{
+    auto audiocodec =
+        AudioDevice::Create(AudioDevice::Type::Audiocodec,
+                            [](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
 
-    });
+                            });
 
     REQUIRE(audiocodec);
 
-    auto audiocellular = AudioDevice::Create(AudioDevice::Type::Cellular,[](const void *inputBuffer,
-                                                                           void *outputBuffer,
-                                                                           unsigned long framesPerBuffer)->int32_t {
+    auto audiocellular =
+        AudioDevice::Create(AudioDevice::Type::Cellular,
+                            [](const void *inputBuffer, void *outputBuffer, unsigned long framesPerBuffer) -> int32_t {
 
-    });
+                            });
 
     REQUIRE(audiocellular);
 
-    AudioDevice::Format formataudiocodec{.sampleRate_Hz=44100,.bitWidth=16,.flags=static_cast<uint32_t >(AudioDevice::Flags ::OutPutStereo)};
+    AudioDevice::Format formataudiocodec{
+        .sampleRate_Hz = 44100, .bitWidth = 16, .flags = static_cast<uint32_t>(AudioDevice::Flags ::OutPutStereo)};
 
     REQUIRE(audiocodec.value()->Start(formataudiocodec) == 0);
 
-    AudioDevice::Format formatcellular{.sampleRate_Hz=16000,.bitWidth=16,.flags=static_cast<uint32_t >(AudioDevice::Flags ::InputStereo) | static_cast<uint32_t >(AudioDevice::Flags ::OutPutStereo)};
+    AudioDevice::Format formatcellular{.sampleRate_Hz = 16000,
+                                       .bitWidth      = 16,
+                                       .flags         = static_cast<uint32_t>(AudioDevice::Flags ::InputStereo) |
+                                                static_cast<uint32_t>(AudioDevice::Flags ::OutPutStereo)};
 
     REQUIRE(audiocellular.value()->Start(formatcellular) == 0);
 
     REQUIRE(audiocodec.value()->Stop() == 0);
     REQUIRE(audiocellular.value()->Stop() == 0);
-
-
 }
-
diff --git a/module-bsp/tests/tests-bluetooth.cpp b/module-bsp/tests/tests-bluetooth.cpp
index 506ce2874..e2a86db77 100644
--- a/module-bsp/tests/tests-bluetooth.cpp
+++ b/module-bsp/tests/tests-bluetooth.cpp
@@ -8,18 +8,19 @@
 #include <array>
 
 using namespace bsp;
-TEST_CASE("TC1") {
+TEST_CASE("TC1")
+{
     SECTION("Generic")
     {
         auto bt = Bluetopia::getInstance();
-        REQUIRE(bt!=nullptr);
+        REQUIRE(bt != nullptr);
 
         // cast to char* to aviod warning
-        REQUIRE(bt->write_blocking((char*)"LOL", strlen("LOL"))>0);
-        std::array<char,120> test_array;
+        REQUIRE(bt->write_blocking((char *)"LOL", strlen("LOL")) > 0);
+        std::array<char, 120> test_array;
         test_array.fill('u');
         size_t ret = bt->write_blocking(test_array.data(), test_array.size());
-        printf("ret: %lu\n",ret);
+        printf("ret: %lu\n", ret);
         REQUIRE(ret != 0);
         REQUIRE(ret == test_array.size());
 
@@ -29,23 +30,22 @@ TEST_CASE("TC1") {
         REQUIRE(bt->in.pop(test_array.data()) == 0);
         // test popped element
         REQUIRE(test_array[0] == 'a');
-        test_array[0] ='z';
+        test_array[0] = 'z';
         // pop from empty buffer
         REQUIRE(bt->in.pop(test_array.data()) != 0);
         // check pointer passed for valid value (not changed)
         REQUIRE(test_array[0] == 'z');
         // fill while buffer
         const bool guard_met = false;
-        for( int i=0; i < bt->in.size; ++i) {
+        for (int i = 0; i < bt->in.size; ++i) {
             REQUIRE(bt->in.push('a') == 0);
-            if( !guard_met &&
-                i >= bt->in.size - bt->in.threshold) {
+            if (!guard_met && i >= bt->in.size - bt->in.threshold) {
                 bool guard_met = bt->in.threshold_guard();
             }
         }
         // default threshold == 0
         REQUIRE(guard_met == false);
-        bt->in.threshold=1;
+        bt->in.threshold = 1;
         // now shall be met
         REQUIRE(bt->in.threshold_guard() == true);
         // buffer is full -> we shouldn't be able to push anymore!
diff --git a/module-bsp/tests/tests-main.cpp b/module-bsp/tests/tests-main.cpp
old mode 100755
new mode 100644
index bbcc2c851..b55b043e7
--- a/module-bsp/tests/tests-main.cpp
+++ b/module-bsp/tests/tests-main.cpp
@@ -2,10 +2,10 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
\ No newline at end of file
diff --git a/module-cellular/Modem/ATCommon.cpp b/module-cellular/Modem/ATCommon.cpp
index f68290298..1e8f1e2a5 100644
--- a/module-cellular/Modem/ATCommon.cpp
+++ b/module-cellular/Modem/ATCommon.cpp
@@ -7,11 +7,11 @@
 
 using namespace at;
 
-const std::string Chanel::OK = "OK";
-const std::string Chanel::ERROR = "ERROR";
+const std::string Chanel::OK         = "OK";
+const std::string Chanel::ERROR      = "ERROR";
 const std::string Chanel::NO_CARRIER = "NO CARRIER";
-const std::string Chanel::BUSY = "BUSY";
-const std::string Chanel::NO_ANSWER = "NO ANSWER";
+const std::string Chanel::BUSY       = "BUSY";
+const std::string Chanel::NO_ANSWER  = "NO ANSWER";
 // const std::string Chanel::CONNECT = "CONNECT";
 // const std::string Chanel::RING = "RING";
 // const std::string Chanel::NO_DIALTONE = "NO DIALTONE";
@@ -19,15 +19,12 @@ const std::string Chanel::NO_ANSWER = "NO ANSWER";
 Result::Code Chanel::at_check(const std::vector<std::string> &arr)
 {
     Result::Code code = Result::Code::NONE;
-    if (arr.size())
-    {
+    if (arr.size()) {
         auto &el = arr.back();
-        if (el.compare(0, OK.length(), OK) == 0)
-        {
+        if (el.compare(0, OK.length(), OK) == 0) {
             code = Result::Code::OK;
         }
-        else if (el.compare(0, ERROR.length(), ERROR) == 0)
-        {
+        else if (el.compare(0, ERROR.length(), ERROR) == 0) {
             code = Result::Code::ERROR;
         }
     }
@@ -39,24 +36,22 @@ void Chanel::cmd_log(std::string cmd, const Result &result, uint32_t timeout)
 
     cmd.erase(std::remove(cmd.begin(), cmd.end(), '\r'), cmd.end());
     cmd.erase(std::remove(cmd.begin(), cmd.end(), '\n'), cmd.end());
-    switch (result.code)
-    {
+    switch (result.code) {
     case Result::Code::TIMEOUT: {
-        LOG_ERROR("[AT]: >%s<, timeout %d - please check the value with Quectel_EC25&EC21_AT_Commands_Manual_V1.3.pdf", cmd.c_str(), timeout);
-    }
-    break;
+        LOG_ERROR("[AT]: >%s<, timeout %d - please check the value with Quectel_EC25&EC21_AT_Commands_Manual_V1.3.pdf",
+                  cmd.c_str(),
+                  timeout);
+    } break;
     case Result::Code::ERROR: {
 
         LOG_ERROR("[AT]: >%s<, >%s<", cmd.c_str(), result.response.size() ? result.response.back().c_str() : "");
-    }
-    break;
+    } break;
     default:
         LOG_DEBUG("[AT]: >%s<, >%s<", cmd.c_str(), result.response.size() ? result.response.back().c_str() : "");
         break;
     }
 #if DEBUG_MODEM_OUTPUT_RESPONSE
-    for (auto s : result.response)
-    {
+    for (auto s : result.response) {
         LOG_DEBUG("[AT] > %s", s.c_str());
     }
 #endif
@@ -70,33 +65,28 @@ class Result Chanel::cmd(const std::string cmd, uint32_t timeout, size_t rxCount
     cmd_init();
     cmd_send(cmd);
 
-    uint32_t currentTime = cpp_freertos::Ticks::GetTicks();
+    uint32_t currentTime   = cpp_freertos::Ticks::GetTicks();
     uint32_t timeoutNeeded = ((timeout == UINT32_MAX) ? UINT32_MAX : currentTime + timeout);
-    uint32_t timeElapsed = currentTime;
+    uint32_t timeElapsed   = currentTime;
 
-    while (1)
-    {
-        if (timeoutNeeded != UINT32_MAX && timeElapsed >= timeoutNeeded)
-        {
+    while (1) {
+        if (timeoutNeeded != UINT32_MAX && timeElapsed >= timeoutNeeded) {
             result.code = Result::Code::TIMEOUT;
             break;
         }
 
-        auto ret = ulTaskNotifyTake(pdTRUE, timeoutNeeded - timeElapsed);
+        auto ret    = ulTaskNotifyTake(pdTRUE, timeoutNeeded - timeElapsed);
         timeElapsed = cpp_freertos::Ticks::GetTicks();
-        if (ret)
-        {
+        if (ret) {
             std::vector<std::string> ret = cmd_receive();
 
             result.response.insert(std::end(result.response), std::begin(ret), std::end(ret));
 
             result.code = at_check(ret);
-            if (result.code != Result::Code::NONE)
-            {
+            if (result.code != Result::Code::NONE) {
                 break;
             }
-            if (rxCount != 0 && result.response.size() >= rxCount)
-            {
+            if (rxCount != 0 && result.response.size() >= rxCount) {
                 result.code = Result::Code::TOKENS;
                 break;
             }
@@ -113,9 +103,9 @@ class Result Chanel::cmd(const std::string cmd, uint32_t timeout, size_t rxCount
 auto Chanel::cmd(at::Cmd &at) -> Result
 {
     at.last.requested = cpp_freertos::Ticks::GetTicks();
-    Result result = this->cmd(at.cmd, at.timeout);
-    at.last.response = cpp_freertos::Ticks::GetTicks();
-    at.last.status = result.code;
+    Result result     = this->cmd(at.cmd, at.timeout);
+    at.last.response  = cpp_freertos::Ticks::GetTicks();
+    at.last.status    = result.code;
     return result;
 }
 
diff --git a/module-cellular/Modem/ATCommon.hpp b/module-cellular/Modem/ATCommon.hpp
index c64deee98..7c685e7c8 100644
--- a/module-cellular/Modem/ATCommon.hpp
+++ b/module-cellular/Modem/ATCommon.hpp
@@ -29,7 +29,8 @@ namespace at
         // const std::string Chanel::NO_DIALTONE = "NO DIALTONE";
 
         /// waits till ok or timeout
-        virtual auto cmd(const std::string cmd, uint32_t timeout = at::default_timeout, size_t rxCount = 0) -> Result final;
+        virtual auto cmd(const std::string cmd, uint32_t timeout = at::default_timeout, size_t rxCount = 0)
+            -> Result final;
         virtual auto cmd(const at::AT at) -> Result final;
         virtual auto cmd(at::Cmd &at) -> Result final;
         /// check for OK, ERROR in string in last token
@@ -37,9 +38,9 @@ namespace at
         /// log result
         virtual void cmd_log(std::string cmd, const Result &result, uint32_t timeout) final;
 
-        virtual void cmd_init() = 0;
-        virtual void cmd_send(std::string cmd) = 0;
+        virtual void cmd_init()                        = 0;
+        virtual void cmd_send(std::string cmd)         = 0;
         virtual std::vector<std::string> cmd_receive() = 0;
-        virtual void cmd_post() = 0;
+        virtual void cmd_post()                        = 0;
     };
 }; // namespace at
diff --git a/module-cellular/Modem/ATParser.cpp b/module-cellular/Modem/ATParser.cpp
index 6544d9b6d..bf5136468 100644
--- a/module-cellular/Modem/ATParser.cpp
+++ b/module-cellular/Modem/ATParser.cpp
@@ -17,12 +17,14 @@
 #include <utility>
 #include <vector>
 
-ATParser::ATParser(bsp::Cellular *cellular) : cellular(cellular) {
+ATParser::ATParser(bsp::Cellular *cellular) : cellular(cellular)
+{
     isInitialized = true;
 }
 
 /// plz see 12.7 summary of urc in documentation
-std::vector<ATParser::Urc> ATParser::ParseURC() {
+std::vector<ATParser::Urc> ATParser::ParseURC()
+{
 
     std::vector<ATParser::Urc> resp;
     size_t maxPos = 0, pos = 0;
@@ -34,11 +36,9 @@ std::vector<ATParser::Urc> ATParser::ParseURC() {
         {"+CFUN: 1", ATParser::Urc::FullFuncionalityAvailable},
     };
 
-    for (const auto &el : vals)
-    {
+    for (const auto &el : vals) {
         pos = responseBuffer.find(el.first);
-        if (pos != std::string::npos)
-        {
+        if (pos != std::string::npos) {
             resp.push_back(el.second);
             maxPos = std::max(pos + el.first.length(), maxPos);
             LOG_DEBUG(("[URC]: " + el.first).c_str());
@@ -46,12 +46,11 @@ std::vector<ATParser::Urc> ATParser::ParseURC() {
     }
 
     // manage string buffer
-    if(maxPos == 0){
-
-    }
+    if (maxPos == 0) {}
     else if (responseBuffer.size() >= maxPos) {
         responseBuffer.erase();
-    } else {
+    }
+    else {
         responseBuffer = responseBuffer.substr(maxPos);
     }
 
@@ -68,23 +67,25 @@ int ATParser::ProcessNewData(sys::Service *service)
     {
         cpp_freertos::LockGuard lock(mutex);
         responseBuffer.append(reinterpret_cast<char *>(rawBuffer), length);
-        LOG_DEBUG("Appending %i bytes to responseBuffer[%d]: %s", length, responseBuffer.size(), utils::removeNewLines(responseBuffer).c_str());
+        LOG_DEBUG("Appending %i bytes to responseBuffer[%d]: %s",
+                  length,
+                  responseBuffer.size(),
+                  utils::removeNewLines(responseBuffer).c_str());
     }
 
     auto ret = ParseURC();
     if (blockedTaskHandle) {
         xTaskNotifyGive(blockedTaskHandle);
     }
-    else if (ret.size())
-    {
+    else if (ret.size()) {
         urcs.insert(std::end(urcs), std::begin(ret), std::end(ret));
         // GSM modem is considered as operational when it outputs URCs specified below:
         // 1) RDY
         // 2) +CFUN: 1
-        if (urcs.size() == 2)
-        {
+        if (urcs.size() == 2) {
             cpp_freertos::LockGuard lock(mutex);
-            auto msg = std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::PowerUpProcedureComplete);
+            auto msg = std::make_shared<CellularNotificationMessage>(
+                CellularNotificationMessage::Type::PowerUpProcedureComplete);
             sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceCellularNotifications, service);
             LOG_DEBUG("[!!!] Fucking away data");
             responseBuffer.erase();
diff --git a/module-cellular/Modem/ATParser.hpp b/module-cellular/Modem/ATParser.hpp
index dfb1703b0..cda00579d 100644
--- a/module-cellular/Modem/ATParser.hpp
+++ b/module-cellular/Modem/ATParser.hpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #ifndef PUREPHONE_ATPARSER_HPP
 #define PUREPHONE_ATPARSER_HPP
 
@@ -20,7 +19,8 @@
 #include <task.h>
 #include <vector>
 
-namespace bsp{
+namespace bsp
+{
     class Cellular;
 }
 
@@ -37,7 +37,7 @@ class ATParser : public at::Chanel
         NotHandled,
     };
 
-    ATParser(bsp::Cellular* cellular);
+    ATParser(bsp::Cellular *cellular);
 
     int ProcessNewData(sys::Service *service);
 
@@ -47,12 +47,11 @@ class ATParser : public at::Chanel
     virtual void cmd_post() override final;
 
   private:
-
     std::vector<Urc> ParseURC();
-    bsp::Cellular* cellular = nullptr;
+    bsp::Cellular *cellular = nullptr;
     std::string responseBuffer;
     std::vector<ATParser::Urc> urcs;
     bool isInitialized = false;
 };
 
-#endif //PUREPHONE_ATPARSER_HPP
+#endif // PUREPHONE_ATPARSER_HPP
diff --git a/module-cellular/Modem/TS0710/DLC_channel.cpp b/module-cellular/Modem/TS0710/DLC_channel.cpp
index acbea23f2..ecf61a619 100644
--- a/module-cellular/Modem/TS0710/DLC_channel.cpp
+++ b/module-cellular/Modem/TS0710/DLC_channel.cpp
@@ -17,41 +17,44 @@
  * DLC_channel implementation
  */
 
-DLC_channel::DLC_channel(DLCI_t DLCI, std::string name, bsp::Cellular *cellular, Callback_t callback){
+DLC_channel::DLC_channel(DLCI_t DLCI, std::string name, bsp::Cellular *cellular, Callback_t callback)
+{
     LOG_DEBUG("Creating DLCI %i channel \"%s\"", DLCI, name.c_str());
-    pv_name = name;
-    pv_DLCI = DLCI;
+    pv_name     = name;
+    pv_DLCI     = DLCI;
     pv_cellular = cellular;
 
     if (callback != nullptr)
         pv_callback = callback;
 
     DLC_ESTABL_SystemParameters_t system_parameters;
-    system_parameters.TypeOfFrame = TypeOfFrame_e::SABM;
-    system_parameters.ConvergenceLayer = 1;
-    system_parameters.Priority = 1;
-    system_parameters.AckTime = 100; //100ms default
-    system_parameters.MaxFrameSize = 128;
-    system_parameters.MaxNumOfRetransmissions = 3; //default 3
-    system_parameters.ErrRecovWindowSize = 2;      //default 2
+    system_parameters.TypeOfFrame             = TypeOfFrame_e::SABM;
+    system_parameters.ConvergenceLayer        = 1;
+    system_parameters.Priority                = 1;
+    system_parameters.AckTime                 = 100; // 100ms default
+    system_parameters.MaxFrameSize            = 128;
+    system_parameters.MaxNumOfRetransmissions = 3; // default 3
+    system_parameters.ErrRecovWindowSize      = 2; // default 2
 
     TS0710_DLC_ESTABL establ = TS0710_DLC_ESTABL(DLCI, system_parameters, cellular);
-    pv_chanParams = establ.getParams();
+    pv_chanParams            = establ.getParams();
 
-    //wait for return & set active
+    // wait for return & set active
     active = establ.getResponse();
     LOG_DEBUG("Create channel %s: %s", pv_name.c_str(), active ? "TRUE" : "FALSE");
 }
 
-DLC_channel::~DLC_channel(){
+DLC_channel::~DLC_channel()
+{
     TS0710_DLC_RELEASE release = TS0710_DLC_RELEASE(pv_DLCI);
 }
 
-void DLC_channel::SendData(std::vector<uint8_t> & data){
+void DLC_channel::SendData(std::vector<uint8_t> &data)
+{
     TS0710_DATA _data = TS0710_DATA(pv_DLCI, pv_chanParams, data, pv_cellular);
 }
 
-#if 0  //left here for reference
+#if 0 // left here for reference
 ssize_t DLC_channel::ReceiveData(std::vector<uint8_t> &data, uint32_t timeout) {
     ssize_t ret = -1;
     static uint8_t *buf = nullptr;
@@ -85,8 +88,7 @@ ssize_t DLC_channel::ReceiveData(std::vector<uint8_t> &data, uint32_t timeout) {
 #endif
 
 void DLC_channel::cmd_init()
-{
-}
+{}
 
 void DLC_channel::cmd_send(std::string cmd)
 {
@@ -105,11 +107,10 @@ std::vector<std::string> DLC_channel::cmd_receive()
     std::vector<uint8_t> rawBuffer;
 
     // get frames from buffer
-    for (int i = 0; i < v.size(); i++)
-    {
+    for (int i = 0; i < v.size(); i++) {
         rawBuffer.push_back(v[i]);
-        if (/*TS0710_Frame::isComplete(rawBuffer)*/ (rawBuffer.size() > 1) && (rawBuffer[0] == 0xF9) && (rawBuffer[rawBuffer.size() - 1] == 0xF9))
-        {
+        if (/*TS0710_Frame::isComplete(rawBuffer)*/ (rawBuffer.size() > 1) && (rawBuffer[0] == 0xF9) &&
+            (rawBuffer[rawBuffer.size() - 1] == 0xF9)) {
             // LOGrawBufferEBUG("Pushing back FRAME");
             mFrames.push_back(rawBuffer);
             rawBuffer.clear();
@@ -117,8 +118,7 @@ std::vector<std::string> DLC_channel::cmd_receive()
     }
     // deseriaise data from received frames
     std::string deserialisedData;
-    for (std::vector<uint8_t> vv : mFrames)
-    {
+    for (std::vector<uint8_t> vv : mFrames) {
         frame.deserialize(vv);
         std::string str(frame.data.begin(), frame.data.end());
         // append deserialised buffer
@@ -129,53 +129,49 @@ std::vector<std::string> DLC_channel::cmd_receive()
 }
 
 void DLC_channel::cmd_post()
-{
-}
+{}
 
 std::vector<std::string> DLC_channel::SendCommandPrompt(const char *cmd, size_t rxCount, uint32_t timeout)
 {
     std::vector<std::string> tokens;
 
-	blockedTaskHandle = xTaskGetCurrentTaskHandle();
+    blockedTaskHandle = xTaskGetCurrentTaskHandle();
     at::Result result;
     cmd_init();
     cmd_send(cmd);
 
-    uint32_t currentTime = cpp_freertos::Ticks::GetTicks();
-	uint32_t timeoutNeeded =
-			timeout == UINT32_MAX ? UINT32_MAX : currentTime + timeout;
-	uint32_t timeElapsed = currentTime;
+    uint32_t currentTime   = cpp_freertos::Ticks::GetTicks();
+    uint32_t timeoutNeeded = timeout == UINT32_MAX ? UINT32_MAX : currentTime + timeout;
+    uint32_t timeElapsed   = currentTime;
 
-	//wait_for_data:
-	while (1) {
+    // wait_for_data:
+    while (1) {
 
-		if (timeElapsed >= timeoutNeeded)
-		{
+        if (timeElapsed >= timeoutNeeded) {
             result.code = at::Result::Code::TIMEOUT;
             break;
-		}
+        }
 
-		auto ret = ulTaskNotifyTake(pdTRUE, timeoutNeeded - timeElapsed);
-		timeElapsed = cpp_freertos::Ticks::GetTicks();
-		if (ret) {
+        auto ret    = ulTaskNotifyTake(pdTRUE, timeoutNeeded - timeElapsed);
+        timeElapsed = cpp_freertos::Ticks::GetTicks();
+        if (ret) {
 
-			std::vector<std::string> strings;
+            std::vector<std::string> strings;
 
-			cpp_freertos::LockGuard lock(mutex);
-			TS0710_Frame::frame_t frame;
-			std::vector<uint8_t> v(responseBuffer.begin(),
-					responseBuffer.end());
-			responseBuffer.clear();
-			frame.deserialize(v);
-			std::string str(frame.data.begin(), frame.data.end());
-			//tokenize responseBuffer
-			auto pos = str.find(">");
-			if (pos != std::string::npos) {
-				tokens.push_back(str.substr(pos, strlen(">")));
-			}
-			if (tokens.size() < rxCount) {
-				continue;
-			}
+            cpp_freertos::LockGuard lock(mutex);
+            TS0710_Frame::frame_t frame;
+            std::vector<uint8_t> v(responseBuffer.begin(), responseBuffer.end());
+            responseBuffer.clear();
+            frame.deserialize(v);
+            std::string str(frame.data.begin(), frame.data.end());
+            // tokenize responseBuffer
+            auto pos = str.find(">");
+            if (pos != std::string::npos) {
+                tokens.push_back(str.substr(pos, strlen(">")));
+            }
+            if (tokens.size() < rxCount) {
+                continue;
+            }
         }
     }
 
@@ -186,19 +182,20 @@ std::vector<std::string> DLC_channel::SendCommandPrompt(const char *cmd, size_t
     return tokens;
 }
 
-int DLC_channel::ParseInputData(std::vector<uint8_t> &data) {
+int DLC_channel::ParseInputData(std::vector<uint8_t> &data)
+{
 
     cpp_freertos::LockGuard lock(mutex);
 
-    if(blockedTaskHandle){
+    if (blockedTaskHandle) {
         responseBuffer.append(reinterpret_cast<char *>(data.data()), data.size());
         xTaskNotifyGive(blockedTaskHandle);
     }
     else if (pv_callback != nullptr) {
-            std::vector<uint8_t> v;
-            for (auto c : data)
-                v.push_back(c);
-            pv_callback(v);
+        std::vector<uint8_t> v;
+        for (auto c : data)
+            v.push_back(c);
+        pv_callback(v);
     }
     // else{
     //     LOG_DEBUG("Dropping unneeded frame");
diff --git a/module-cellular/Modem/TS0710/DLC_channel.h b/module-cellular/Modem/TS0710/DLC_channel.h
index bac6d22e5..df775def2 100644
--- a/module-cellular/Modem/TS0710/DLC_channel.h
+++ b/module-cellular/Modem/TS0710/DLC_channel.h
@@ -2,7 +2,6 @@
  * Project Untitled
  */
 
-
 #ifndef _DLC_CHANNEL_H
 #define _DLC_CHANNEL_H
 
@@ -18,9 +17,9 @@
 class DLC_channel : public at::Chanel
 {
   public:
-    using Callback_t =  std::function<void(std::vector<uint8_t> &data)>;
+    using Callback_t = std::function<void(std::vector<uint8_t> &data)>;
 
-private:
+  private:
     std::string pv_name;
     DLCI_t pv_DLCI;
     bool active = false;
@@ -29,35 +28,53 @@ private:
 
     std::string responseBuffer;
     bsp::Cellular *pv_cellular;
-    
-public: 
-    
-//TS0710_DLC_ESTABL ctrlChanEstabl = TS0710_DLC_ESTABL(0);  //use default values to create control channel DLCI0
+
+  public:
+    // TS0710_DLC_ESTABL ctrlChanEstabl = TS0710_DLC_ESTABL(0);  //use default values to create control channel DLCI0
 
     DLC_channel(DLCI_t DLCI, std::string name, bsp::Cellular *cellular, Callback_t callback = nullptr);
-    DLC_channel() { pv_DLCI = -1; pv_name = "none"; }   //default constructor creates empty channel
+    DLC_channel()
+    {
+        pv_DLCI = -1;
+        pv_name = "none";
+    } // default constructor creates empty channel
     virtual ~DLC_channel();
 
-    void SendData(std::vector<uint8_t>& data);
+    void SendData(std::vector<uint8_t> &data);
 
-    DLCI_t getDLCI() { return pv_DLCI; }
-    std::string getName() { return pv_name; }
-    bool getActive() { return active; }
+    DLCI_t getDLCI()
+    {
+        return pv_DLCI;
+    }
+    std::string getName()
+    {
+        return pv_name;
+    }
+    bool getActive()
+    {
+        return active;
+    }
 
-    //ssize_t ReceiveData(std::vector<uint8_t> &data, uint32_t timeout);
-    void setCallback(Callback_t callback) { LOG_DEBUG("[%s] Setting up callback for channel", pv_name.c_str()); pv_callback = callback; }
+    // ssize_t ReceiveData(std::vector<uint8_t> &data, uint32_t timeout);
+    void setCallback(Callback_t callback)
+    {
+        LOG_DEBUG("[%s] Setting up callback for channel", pv_name.c_str());
+        pv_callback = callback;
+    }
 
     virtual void cmd_init() override final;
     virtual void cmd_send(std::string cmd) override final;
     virtual std::vector<std::string> cmd_receive() override final;
     virtual void cmd_post() override final;
 
-    std::vector<std::string> SendCommandPrompt(const char *cmd, size_t rxCount,
-			uint32_t timeout = 300);
+    std::vector<std::string> SendCommandPrompt(const char *cmd, size_t rxCount, uint32_t timeout = 300);
 
     int ParseInputData(std::vector<uint8_t> &data);
 
-    void callback(std::vector<uint8_t> &data) { pv_callback( data ); }
+    void callback(std::vector<uint8_t> &data)
+    {
+        pv_callback(data);
+    }
 };
 
 #endif //_DLC_CHANNEL_H
diff --git a/module-cellular/Modem/TS0710/TS0710.cpp b/module-cellular/Modem/TS0710/TS0710.cpp
index a57a0c239..e478e131a 100644
--- a/module-cellular/Modem/TS0710/TS0710.cpp
+++ b/module-cellular/Modem/TS0710/TS0710.cpp
@@ -12,9 +12,27 @@
 #include <cassert>
 #include <sstream>
 
-std::map<TypeOfFrame_e, std::string> TypeOfFrame_text = { {TypeOfFrame_e::SABM, "SABM"}, {TypeOfFrame_e::UA, "UA"}, {TypeOfFrame_e::DM, "DM"}, {TypeOfFrame_e::DISC, "DISC"}, {TypeOfFrame_e::UIH, "UIH"}, {TypeOfFrame_e::UI, "UI"}, {TypeOfFrame_e::I, "I"} };
-std::map<PortSpeed_e, int> QuectelCMUXPortSpeeds_text = { {PortSpeed_e::PS9600, 1}, {PortSpeed_e::PS19200, 2}, {PortSpeed_e::PS38400, 3}, {PortSpeed_e::PS57600, 4}, {PortSpeed_e::PS115200, 5}, {PortSpeed_e::PS230400, 6}, {PortSpeed_e::PS460800, 7} };
-std::map<PortSpeed_e, int> ATPortSpeeds_text = { {PortSpeed_e::PS9600, 9600}, {PortSpeed_e::PS19200, 19200}, {PortSpeed_e::PS38400, 38400}, {PortSpeed_e::PS57600, 57600}, {PortSpeed_e::PS115200, 115200}, {PortSpeed_e::PS230400, 230400}, {PortSpeed_e::PS460800, 460800} };
+std::map<TypeOfFrame_e, std::string> TypeOfFrame_text = {{TypeOfFrame_e::SABM, "SABM"},
+                                                         {TypeOfFrame_e::UA, "UA"},
+                                                         {TypeOfFrame_e::DM, "DM"},
+                                                         {TypeOfFrame_e::DISC, "DISC"},
+                                                         {TypeOfFrame_e::UIH, "UIH"},
+                                                         {TypeOfFrame_e::UI, "UI"},
+                                                         {TypeOfFrame_e::I, "I"}};
+std::map<PortSpeed_e, int> QuectelCMUXPortSpeeds_text = {{PortSpeed_e::PS9600, 1},
+                                                         {PortSpeed_e::PS19200, 2},
+                                                         {PortSpeed_e::PS38400, 3},
+                                                         {PortSpeed_e::PS57600, 4},
+                                                         {PortSpeed_e::PS115200, 5},
+                                                         {PortSpeed_e::PS230400, 6},
+                                                         {PortSpeed_e::PS460800, 7}};
+std::map<PortSpeed_e, int> ATPortSpeeds_text          = {{PortSpeed_e::PS9600, 9600},
+                                                {PortSpeed_e::PS19200, 19200},
+                                                {PortSpeed_e::PS38400, 38400},
+                                                {PortSpeed_e::PS57600, 57600},
+                                                {PortSpeed_e::PS115200, 115200},
+                                                {PortSpeed_e::PS230400, 230400},
+                                                {PortSpeed_e::PS460800, 460800}};
 
 /**
  * TS0710 implementation
@@ -26,139 +44,142 @@ std::map<PortSpeed_e, int> ATPortSpeeds_text = { {PortSpeed_e::PS9600, 9600}, {P
 
 #define USE_DAEFAULT_BAUDRATE 1
 
-TS0710::TS0710(PortSpeed_e portSpeed, sys::Service *parent) {
+TS0710::TS0710(PortSpeed_e portSpeed, sys::Service *parent)
+{
     pv_portSpeed = portSpeed;
-    pv_cellular = bsp::Cellular::Create(SERIAL_PORT, 115200).value_or(nullptr);
-    parser = new ATParser(pv_cellular.get());
-    pv_parent = parent;
+    pv_cellular  = bsp::Cellular::Create(SERIAL_PORT, 115200).value_or(nullptr);
+    parser       = new ATParser(pv_cellular.get());
+    pv_parent    = parent;
 
     // start connection
-    startParams.PortSpeed = pv_portSpeed;
-    startParams.MaxFrameSize = 127; //maximum for Basic mode
-    startParams.AckTimer = 10;     //100ms default
-    startParams.MaxNumOfRetransmissions = 3;    //default
-    startParams.MaxCtrlRespTime = 30;          //300ms default
-    startParams.WakeUpRespTime = 10;            //10s default
-    startParams.ErrRecovWindowSize = 2;         //2 default
+    startParams.PortSpeed               = pv_portSpeed;
+    startParams.MaxFrameSize            = 127; // maximum for Basic mode
+    startParams.AckTimer                = 10;  // 100ms default
+    startParams.MaxNumOfRetransmissions = 3;   // default
+    startParams.MaxCtrlRespTime         = 30;  // 300ms default
+    startParams.WakeUpRespTime          = 10;  // 10s default
+    startParams.ErrRecovWindowSize      = 2;   // 2 default
 
-    BaseType_t task_error = xTaskCreate(
-        workerTaskFunction,
-        "TS0710Worker",
-        512, // in words
-        this,
-        taskPriority,
-        &taskHandle);
-    if (task_error != pdPASS)
-    {
+    BaseType_t task_error = xTaskCreate(workerTaskFunction,
+                                        "TS0710Worker",
+                                        512, // in words
+                                        this,
+                                        taskPriority,
+                                        &taskHandle);
+    if (task_error != pdPASS) {
         LOG_ERROR("Failed to start inputSerialWorker task");
         return;
     }
 }
 
-TS0710::~TS0710() {
+TS0710::~TS0710()
+{
     for (auto it : channels)
         delete it;
     channels.clear();
     TS0710_CLOSE pv_TS0710_Close = TS0710_CLOSE();
-    mode = Mode::AT;
+    mode                         = Mode::AT;
     if (taskHandle) {
         vTaskDelete(taskHandle);
     }
     delete parser;
 }
 
-TS0710::ConfState TS0710::PowerUpProcedure() {
+TS0710::ConfState TS0710::PowerUpProcedure()
+{
     bool result = false;
-    int step = 1;
+    int step    = 1;
     at::Result ret;
-    while(!result) {
-        switch(step) {
-            case 1:
-                //1. Send AT - check for answer
-                //2. OK ? -> ret success
-                LOG_DEBUG("1. Sending AT...");
-                if (parser->cmd(at::AT::AT))
-                    result = true;
-                step++;
-                break;
-            case 2:
-                //3. set baudrate 460800 baud
-                //4. Send AT - check for answer
-                //5. OK ? -> ret success
-                LOG_DEBUG("2. Setting baudrate to %i...", ATPortSpeeds_text[startParams.PortSpeed]);
-                pv_cellular->SetSpeed(ATPortSpeeds_text[startParams.PortSpeed]);
-                LOG_DEBUG("Sending AT...");
-                if (parser->cmd(at::AT::AT))
-                    result = true;
-                step++;
-                break;
-            case 3: {
-                //6. Close CMUX -> Send AT
-                LOG_INFO("3. Closing mux mode");
-                TS0710_Frame::frame_t frame;
-                frame.Address = 0 | static_cast<unsigned char>(MuxDefines ::GSM0710_CR);
-                frame.Control = TypeOfFrame_e::UIH;
-                frame.data.push_back(static_cast<uint8_t>(MuxDefines::GSM0710_CONTROL_CLD) | static_cast<uint8_t>(MuxDefines::GSM0710_EA) | static_cast<uint8_t>(MuxDefines::GSM0710_CR));
-                frame.data.push_back(0x01);
-                pv_cellular->Write((void *)frame.serialize().data(), frame.serialize().size());
+    while (!result) {
+        switch (step) {
+        case 1:
+            // 1. Send AT - check for answer
+            // 2. OK ? -> ret success
+            LOG_DEBUG("1. Sending AT...");
+            if (parser->cmd(at::AT::AT))
+                result = true;
+            step++;
+            break;
+        case 2:
+            // 3. set baudrate 460800 baud
+            // 4. Send AT - check for answer
+            // 5. OK ? -> ret success
+            LOG_DEBUG("2. Setting baudrate to %i...", ATPortSpeeds_text[startParams.PortSpeed]);
+            pv_cellular->SetSpeed(ATPortSpeeds_text[startParams.PortSpeed]);
+            LOG_DEBUG("Sending AT...");
+            if (parser->cmd(at::AT::AT))
+                result = true;
+            step++;
+            break;
+        case 3: {
+            // 6. Close CMUX -> Send AT
+            LOG_INFO("3. Closing mux mode");
+            TS0710_Frame::frame_t frame;
+            frame.Address = 0 | static_cast<unsigned char>(MuxDefines ::GSM0710_CR);
+            frame.Control = TypeOfFrame_e::UIH;
+            frame.data.push_back(static_cast<uint8_t>(MuxDefines::GSM0710_CONTROL_CLD) |
+                                 static_cast<uint8_t>(MuxDefines::GSM0710_EA) |
+                                 static_cast<uint8_t>(MuxDefines::GSM0710_CR));
+            frame.data.push_back(0x01);
+            pv_cellular->Write((void *)frame.serialize().data(), frame.serialize().size());
 
-                pv_cellular->InformModemHostWakeup();
-                // GSM module needs some time to close multiplexer
-                vTaskDelay(1000);
-                LOG_DEBUG("Sending AT...");
-                if (parser->cmd(at::AT::AT))
-                {
-                    result = true;
-                }
-                step++;
+            pv_cellular->InformModemHostWakeup();
+            // GSM module needs some time to close multiplexer
+            vTaskDelay(1000);
+            LOG_DEBUG("Sending AT...");
+            if (parser->cmd(at::AT::AT)) {
+                result = true;
             }
-                break;
-            case 4:
-                //7. set baudrate 115200 baud
-                //8. Send AT
-                LOG_DEBUG("4. Setting baudrate to 115200...");
+            step++;
+        } break;
+        case 4:
+            // 7. set baudrate 115200 baud
+            // 8. Send AT
+            LOG_DEBUG("4. Setting baudrate to 115200...");
 #if USE_DAEFAULT_BAUDRATE
-                pv_cellular->SetSpeed(115200);
+            pv_cellular->SetSpeed(115200);
 #endif
-                LOG_DEBUG("Sending AT...");
-                if (parser->cmd(at::AT::AT))
-                {
-                    result = true;
-                }
-                step++;
-                break;
-            case 5: {
-                //9. Close CMUX -> Send AT
-                LOG_INFO("5. Closing mux mode");
-                TS0710_Frame::frame_t frame;
-                frame.Address = 0 | static_cast<unsigned char>(MuxDefines ::GSM0710_CR);
-                frame.Control = TypeOfFrame_e::UIH;
-                frame.data.push_back(static_cast<uint8_t>(MuxDefines::GSM0710_CONTROL_CLD) | static_cast<uint8_t>(MuxDefines::GSM0710_EA) | static_cast<uint8_t>(MuxDefines::GSM0710_CR));
-                frame.data.push_back(0x01);
-                pv_cellular->Write((void *)frame.serialize().data(), frame.serialize().size());
+            LOG_DEBUG("Sending AT...");
+            if (parser->cmd(at::AT::AT)) {
+                result = true;
+            }
+            step++;
+            break;
+        case 5: {
+            // 9. Close CMUX -> Send AT
+            LOG_INFO("5. Closing mux mode");
+            TS0710_Frame::frame_t frame;
+            frame.Address = 0 | static_cast<unsigned char>(MuxDefines ::GSM0710_CR);
+            frame.Control = TypeOfFrame_e::UIH;
+            frame.data.push_back(static_cast<uint8_t>(MuxDefines::GSM0710_CONTROL_CLD) |
+                                 static_cast<uint8_t>(MuxDefines::GSM0710_EA) |
+                                 static_cast<uint8_t>(MuxDefines::GSM0710_CR));
+            frame.data.push_back(0x01);
+            pv_cellular->Write((void *)frame.serialize().data(), frame.serialize().size());
 
-                pv_cellular->InformModemHostWakeup();
-                // GSM module needs some time to close multiplexer
-                vTaskDelay(1000);
-                LOG_DEBUG("Sending AT...");
-                if (parser->cmd(at::AT::AT))
-                    result = true;
-                }
-                step++;
-                break;
-            case 6:
-                //10. power UP
-                LOG_INFO("6. Starting power up procedure...");
-                pv_cellular->PowerUp();
-                return ConfState::PowerUp;
-                break;
+            pv_cellular->InformModemHostWakeup();
+            // GSM module needs some time to close multiplexer
+            vTaskDelay(1000);
+            LOG_DEBUG("Sending AT...");
+            if (parser->cmd(at::AT::AT))
+                result = true;
+        }
+            step++;
+            break;
+        case 6:
+            // 10. power UP
+            LOG_INFO("6. Starting power up procedure...");
+            pv_cellular->PowerUp();
+            return ConfState::PowerUp;
+            break;
         }
     }
     return ConfState ::Success;
 }
 
-//TODO:M.P Fetch configuration from JSON/XML file
-TS0710::ConfState TS0710::ConfProcedure() {
+// TODO:M.P Fetch configuration from JSON/XML file
+TS0710::ConfState TS0710::ConfProcedure()
+{
     static char buf[256];
 
     LOG_DEBUG("Configuring modem...");
@@ -167,19 +188,16 @@ TS0710::ConfState TS0710::ConfProcedure() {
     parser->cmd(at::AT::ECHO_OFF);
     LOG_INFO("GSM modem info:");
     auto ret = parser->cmd(at::AT::SW_INFO);
-    if (ret)
-    {
+    if (ret) {
         for (uint32_t i = 0; i < ret.response.size() - 1; ++i) // skip final "OK"
         {
             LOG_INFO(ret.response[i].c_str());
         }
     }
-    if (hardwareControlFlowEnable)
-    {
+    if (hardwareControlFlowEnable) {
         parser->cmd(at::AT::FLOW_CTRL_ON);
     }
-    else
-    {
+    else {
         parser->cmd(at::AT::FLOW_CTRL_OFF);
     }
 
@@ -191,52 +209,43 @@ TS0710::ConfState TS0710::ConfProcedure() {
     parser->cmd(at::AT::URC_NOTIF_SIGNAL);
 
     LOG_WARN("TODO: determine while this retry loop is necessary");
-    while (!parser->cmd(at::AT::QSCLK_ON))
-    {
+    while (!parser->cmd(at::AT::QSCLK_ON)) {
         auto const sec = 1000;
-        vTaskDelay(pdMS_TO_TICKS(sec)); // if error then limit polling - 1 poll per sec modem normaly takes ~ 20 sec to start anyway
+        vTaskDelay(pdMS_TO_TICKS(
+            sec)); // if error then limit polling - 1 poll per sec modem normaly takes ~ 20 sec to start anyway
     }
 
     bool reboot_needed = false;
 
     ret = parser->cmd(at::AT::SIM_DET);
-    if (!ret)
-    {
+    if (!ret) {
         LOG_FATAL("Cant check sim detection status!");
     }
-    else
-    {
-        if (ret.response[0].find("+QSIMDET: 1,0") != std::string::npos)
-        {
+    else {
+        if (ret.response[0].find("+QSIMDET: 1,0") != std::string::npos) {
             LOG_DEBUG("SIM detecition enabled!");
         }
-        else
-        {
+        else {
             LOG_FATAL("SIM detection failure - trying to enable! %s", ret.response[0].c_str());
             reboot_needed = true;
         }
     }
     ret = parser->cmd(at::AT::QSIMSTAT);
-    if (!ret)
-    {
+    if (!ret) {
         LOG_FATAL("Cant check sim stat status");
     }
-    else
-    {
-        if (ret.response[0].find("+QSIMSTAT: 1,1") != std::string::npos)
-        {
+    else {
+        if (ret.response[0].find("+QSIMSTAT: 1,1") != std::string::npos) {
             LOG_DEBUG("SIM swap enabled!");
         }
-        else
-        {
+        else {
             LOG_FATAL("SIM swap status failure! %s", ret.response[0].c_str());
             reboot_needed = true;
         }
     }
 
     // try to force set sim detection and sim stat
-    if (reboot_needed == true)
-    {
+    if (reboot_needed == true) {
         ret = parser->cmd(at::AT::SIM_DET_ON);
         ret = parser->cmd(at::AT::SIMSTAT_ON);
         LOG_FATAL("Please full reboot phone!");
@@ -245,26 +254,23 @@ TS0710::ConfState TS0710::ConfProcedure() {
     return ConfState ::Success;
 }
 
-TS0710::ConfState TS0710::AudioConfProcedure() {
+TS0710::ConfState TS0710::AudioConfProcedure()
+{
     auto ret = parser->cmd(at::AT::QDAI);
     // There is possibility for SendATCommand to capture invalid response (it can be ERROR or async URC)
     // Hence we are checking here for beginning of valid response for at::QDAI command. AudioConfProcedure
     // procedure will be invoked from AudioService's context as many times as needed.
-    if (!ret)
-    {
+    if (!ret) {
         return ConfState ::Failure;
     }
-    else if (ret.response[0].compare("+QDAI: 1,0,0,5,0,1,1,1") == 0)
-    {
+    else if (ret.response[0].compare("+QDAI: 1,0,0,5,0,1,1,1") == 0) {
         return ConfState ::Success;
     }
     else {
-        if (!parser->cmd(at::AT::QDAI_INIT))
-        {
+        if (!parser->cmd(at::AT::QDAI_INIT)) {
             return ConfState ::Failure;
         }
-        else
-        {
+        else {
             pv_cellular->Restart();
             LOG_DEBUG("GSM module first run, performing reset...");
             return ConfState::ModemNeedsReset;
@@ -272,24 +278,20 @@ TS0710::ConfState TS0710::AudioConfProcedure() {
     }
 }
 
-TS0710::ConfState TS0710::StartMultiplexer() {
+TS0710::ConfState TS0710::StartMultiplexer()
+{
     static char buf[128];
 
     LOG_DEBUG("Configuring multiplexer...");
 
-    //1. start CMUX by AT command AT+CMUX=...(with given parameters) & get response
+    // 1. start CMUX by AT command AT+CMUX=...(with given parameters) & get response
     /*
     AT+CMUX=<mode>[,<subset>[,<portspeed>[,<N1>[,<T1>[,<N2>[,<T2>[,<T3>[,<k>]]]]]]]]
     <mode> 0 Basic option.
     <subset> This parameter defines the way in which the MUX control channel is set up.
         Virtual channel may subsequently be set up differently, but in the absence of any
-        negotiation for the settings of a virtual channel, it shall be set up according to thecontrol channel <subset> setting.
-        0 UIH frames used only.
-        1 UI frames used only.
-        2 I frames used only.
-    <portspeed>
-        1 9600bit/s
-        2 19200bit/s
+        negotiation for the settings of a virtual channel, it shall be set up according to thecontrol channel <subset>
+    setting. 0 UIH frames used only. 1 UI frames used only. 2 I frames used only. <portspeed> 1 9600bit/s 2 19200bit/s
         3 38400bit/s
         4 57600bit/s
         5 115200bit/s
@@ -299,20 +301,20 @@ TS0710::ConfState TS0710::StartMultiplexer() {
     <T1> The time UE waits for an acknowledgement before resorting to other action (e.g.
         transmitting a frame).The step size is ten milliseconds, the range is 1-255. The default value is 100ms.
     <N2> Maximum number of re-transmissions, the range is 0-255, the default value is 3.
-    <T2> Response timer for MUX control channel, the step size is ten milliseconds, the range is 2-255, 30 is the default value.
-    <T3> Wake up response timer in seconds. The range is 1-255, 10 is the default value.
-    <k> Window size (It is not supported for UC20)
+    <T2> Response timer for MUX control channel, the step size is ten milliseconds, the range is 2-255, 30 is the
+    default value. <T3> Wake up response timer in seconds. The range is 1-255, 10 is the default value. <k> Window size
+    (It is not supported for UC20)
 
     PortSpeed_e PortSpeed;          //!< Port speed
-    int MaxFrameSize;               //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for basic option & 64 for advanced ]
-    int AckTimer;                   //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
-    int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0-100, default: 3]
-    int MaxCtrlRespTime;            //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s]
-    int WakeUpRespTime;             //!< Wake up response timer [1s-255s, default: 10s]
-    int ErrRecovWindowSize;         //!< Window size for error recovery mode [1-7, default: 2]
+    int MaxFrameSize;               //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for
+    basic option & 64 for advanced ] int AckTimer;                   //!< Acknowledgement Timer [0,01s-2,55s, default:
+    0,1s] int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0-100, default: 3] int
+    MaxCtrlRespTime;            //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s] int
+    WakeUpRespTime;             //!< Wake up response timer [1s-255s, default: 10s] int ErrRecovWindowSize;         //!<
+    Window size for error recovery mode [1-7, default: 2]
     */
 
-    //enable cmux
+    // enable cmux
     LOG_DEBUG("Enabling CMUX");
     std::stringstream ss;
     ss << std::string(at::factory(at::AT::CMUX));
@@ -326,53 +328,50 @@ TS0710::ConfState TS0710::StartMultiplexer() {
     ss << "," << startParams.ErrRecovWindowSize;
     ss << "\r";
 
-    if (!parser->cmd(ss.str()))
-    {
+    if (!parser->cmd(ss.str())) {
         LOG_ERROR("CMUX setup error");
         return ConfState::Failure;
     }
 
-    mode = Mode::CMUX_SETUP;
+    mode                          = Mode::CMUX_SETUP;
     TS0710_START *pv_TS0710_Start = new TS0710_START(TS0710_START::Mode_e::Basic, startParams, pv_cellular.get());
-    //wait for confirmation
+    // wait for confirmation
     if (pv_TS0710_Start->ConnectionStatus()) {
-        channels.push_back(pv_TS0710_Start->getCtrlChannel());  //store control channel
+        channels.push_back(pv_TS0710_Start->getCtrlChannel()); // store control channel
     }
     delete pv_TS0710_Start;
 
     controlCallback = [this](std::vector<uint8_t> &data) {
-
         TS0710_Frame *frame = new TS0710_Frame(data);
 
         switch (frame->getFrame().data.at(0)) {
-            case 0xE3: { //MSC
-                LOG_PRINTF("[MSC ch #%i] ", frame->getFrame().data.at(2) >> 2);
-                if (frame->getFrame().data.at(3) & 0x80)
-                    LOG_PRINTF("DV ");
-                if (frame->getFrame().data.at(3) & 0x40)
-                    LOG_PRINTF("IC ");
-                if (frame->getFrame().data.at(3) & 0x08)
-                    LOG_PRINTF("RTR ");
-                if (frame->getFrame().data.at(3) & 0x04) {
-                    LOG_PRINTF("RTC ");
-                    this->getCellular()->SetSendingAllowed(true);
-                }
-                else
-                    this->getCellular()->SetSendingAllowed(false);
-                if (frame->getFrame().data.at(3) & 0x02)
-                    LOG_PRINTF("FC ");
-
-                LOG_PRINTF("\n");
+        case 0xE3: { // MSC
+            LOG_PRINTF("[MSC ch #%i] ", frame->getFrame().data.at(2) >> 2);
+            if (frame->getFrame().data.at(3) & 0x80)
+                LOG_PRINTF("DV ");
+            if (frame->getFrame().data.at(3) & 0x40)
+                LOG_PRINTF("IC ");
+            if (frame->getFrame().data.at(3) & 0x08)
+                LOG_PRINTF("RTR ");
+            if (frame->getFrame().data.at(3) & 0x04) {
+                LOG_PRINTF("RTC ");
+                this->getCellular()->SetSendingAllowed(true);
             }
-            break;
+            else
+                this->getCellular()->SetSendingAllowed(false);
+            if (frame->getFrame().data.at(3) & 0x02)
+                LOG_PRINTF("FC ");
+
+            LOG_PRINTF("\n");
+        } break;
         }
 
         delete frame;
     };
 
-    //channels[0]->setCallback(controlCallback);
+    // channels[0]->setCallback(controlCallback);
 
-    //TODO: Open remaining channels
+    // TODO: Open remaining channels
     OpenChannel(1, "Commands");
     OpenChannel(2, "Notifications");
     OpenChannel(3, "Data");
@@ -381,31 +380,27 @@ TS0710::ConfState TS0710::StartMultiplexer() {
 
     // Route URCs to second (Notifications) MUX channel
     DLC_channel *c = GetChannel("Commands");
-    if (c != nullptr)
-    {
+    if (c != nullptr) {
         c->cmd(at::AT::SET_URC_CHANNEL);
         LOG_DEBUG("Sending test ATI");
         auto res = c->cmd(at::AT::SW_INFO);
-        res = c->cmd(at::AT::CSQ);
-        if (res)
-        {
+        res      = c->cmd(at::AT::CSQ);
+        if (res) {
             auto beg = res.response[0].find(" ");
             auto end = res.response[0].find(",", 1);
             SignalStrength signalStrength(std::stoi(res.response[0].substr(beg + 1, end - beg - 1)));
-            if (signalStrength.isValid())
-            {
+            if (signalStrength.isValid()) {
                 Store::GSM::get()->setSignalStrength(signalStrength.data);
-                auto msg = std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::SignalStrengthUpdate);
+                auto msg = std::make_shared<CellularNotificationMessage>(
+                    CellularNotificationMessage::Type::SignalStrengthUpdate);
                 sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceCellularNotifications, pv_parent);
             }
         }
-        else
-        {
+        else {
             LOG_ERROR("signal strength not set");
         }
     }
-    else
-    {
+    else {
         LOG_FATAL("No channel");
         return ConfState::Failure;
     }
@@ -413,7 +408,8 @@ TS0710::ConfState TS0710::StartMultiplexer() {
     return ConfState::Success;
 }
 
-void workerTaskFunction(void *ptr) {
+void workerTaskFunction(void *ptr)
+{
     TS0710 *inst = reinterpret_cast<TS0710 *>(ptr);
 
     while (1) {
@@ -424,44 +420,45 @@ void workerTaskFunction(void *ptr) {
 
         // AT mode is used only during initialization phase
         if (inst->mode == TS0710::Mode::AT) {
-            //inst->atParser->ProcessNewData();
-            //TODO: add AT command processing
+            // inst->atParser->ProcessNewData();
+            // TODO: add AT command processing
             LOG_DEBUG("[Worker] Processing AT response");
             inst->parser->ProcessNewData(inst->pv_parent);
         }
-            // CMUX mode is default operation mode
+        // CMUX mode is default operation mode
         else if (inst->mode == TS0710::Mode::CMUX) {
-            //LOG_DEBUG("[Worker] Processing CMUX response");
+            // LOG_DEBUG("[Worker] Processing CMUX response");
             std::vector<uint8_t> data;
             ssize_t len = inst->ReceiveData(data, static_cast<uint32_t>(inst->startParams.MaxCtrlRespTime));
-            //send data to fifo
+            // send data to fifo
             for (uint8_t c : data)
                 inst->RXFifo.push(c);
             data.clear();
-            //divide message to different frames as Quectel may send them one after another
+            // divide message to different frames as Quectel may send them one after another
             std::vector<std::vector<uint8_t>> multipleFrames;
             std::vector<uint8_t> _d;
             int fifoLen = inst->RXFifo.size();
-            //LOG_DEBUG("[RXFifo] %i elements", fifoLen);
+            // LOG_DEBUG("[RXFifo] %i elements", fifoLen);
 
             for (int i = 0; i < fifoLen; i++) {
                 _d.push_back(inst->RXFifo.front());
                 inst->RXFifo.pop();
-                if (/*TS0710_Frame::isComplete(_d)*/(_d.size() > 1) && (_d[0] == 0xF9) && (_d[_d.size() - 1] == 0xF9)) {
-                    //LOG_DEBUG("Pushing back FRAME");
+                if (/*TS0710_Frame::isComplete(_d)*/ (_d.size() > 1) && (_d[0] == 0xF9) &&
+                    (_d[_d.size() - 1] == 0xF9)) {
+                    // LOG_DEBUG("Pushing back FRAME");
                     multipleFrames.push_back(_d);
                     _d.clear();
                 }
             }
-            //if some data stored @_d then push it back to queue as incomplete packet
+            // if some data stored @_d then push it back to queue as incomplete packet
             if (!_d.empty() && (_d[0] == 0xF9)) {
-                //LOG_DEBUG("Pushing back [%i] incomplete frame", _d.size());
+                // LOG_DEBUG("Pushing back [%i] incomplete frame", _d.size());
                 for (uint8_t c : _d)
                     inst->RXFifo.push(c);
             }
             _d.clear();
 
-            //LOG_DEBUG("Received %i frames", multipleFrames.size());
+            // LOG_DEBUG("Received %i frames", multipleFrames.size());
             for (auto *chan : inst->channels) {
                 for (std::vector<uint8_t> v : multipleFrames) {
                     if (TS0710_Frame::isMyChannel(v, chan->getDLCI()))
@@ -473,17 +470,18 @@ void workerTaskFunction(void *ptr) {
     }
 }
 
-ssize_t TS0710::ReceiveData(std::vector<uint8_t> &data, uint32_t timeout) {
-    ssize_t ret = -1;
+ssize_t TS0710::ReceiveData(std::vector<uint8_t> &data, uint32_t timeout)
+{
+    ssize_t ret         = -1;
     static uint8_t *buf = nullptr;
-    buf = reinterpret_cast<uint8_t*>(malloc(startParams.MaxFrameSize));
-    bool complete = false;
-    uint32_t _timeout = timeout;
+    buf                 = reinterpret_cast<uint8_t *>(malloc(startParams.MaxFrameSize));
+    bool complete       = false;
+    uint32_t _timeout   = timeout;
 
-    while((!complete) && (--_timeout)) {
+    while ((!complete) && (--_timeout)) {
         ret = pv_cellular->Read(reinterpret_cast<void *>(buf), startParams.MaxFrameSize);
         if (ret > 0) {
-            //LOG_DEBUG("Received %i bytes", ret);
+            // LOG_DEBUG("Received %i bytes", ret);
             for (int i = 0; i < ret; i++)
                 data.push_back(buf[i]);
             complete = TS0710_Frame::isComplete(data);
@@ -500,8 +498,7 @@ ssize_t TS0710::ReceiveData(std::vector<uint8_t> &data, uint32_t timeout) {
 
 void TS0710::SelectAntenna(uint8_t antenna)
 {
-    if (antenna == 0 || antenna == 1)
-    {
+    if (antenna == 0 || antenna == 1) {
         // select antenna A
         pv_cellular->SelectAntenna(antenna);
     }
diff --git a/module-cellular/Modem/TS0710/TS0710.h b/module-cellular/Modem/TS0710/TS0710.h
index 12b4cd9cf..2d08af6fa 100644
--- a/module-cellular/Modem/TS0710/TS0710.h
+++ b/module-cellular/Modem/TS0710/TS0710.h
@@ -2,15 +2,14 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_H
 #define _TS0710_H
 
 /*
 5.2.6 Basic Option
-In this case, opening flag and closing flags may appear in the Information field of the frame. The flags cannot be used to
-determine beginning and end of a frame. A length indication for the frame must be given instead. The frame structure is
-then as follows:
+In this case, opening flag and closing flags may appear in the Information field of the frame. The flags cannot be used
+to determine beginning and end of a frame. A length indication for the frame must be given instead. The frame structure
+is then as follows:
 -----------------------------------------------------------------------------------------
 |  Flag   |  Adress | Control | Length indicator | Information      |   FCS   |  Flag   |
 | 1 octet | 1 octet | 1 octet |  1 or 2 octets   | integral num. of | 1 octet | 1 octet |
@@ -61,12 +60,11 @@ DISC (Disconnect)
 UIH (Unnumbered Information with Header check)
 UI (Unnumbered Information)
 
-The poll (P) bit set to 1 shall be used by a station to solicit (poll) a response or sequence of responses from the other
-station.
-The final (F) bit set to 1 shall be used by a station to indicate the response frame transmitted as the result of a soliciting
-(poll) command.
-The poll/final (P/F) bit shall serve a function in both command frames and response frames. (In command frames, the
-P/F bit is referred to as the P bit. In response frames, it is referred to as the F bit.)
+The poll (P) bit set to 1 shall be used by a station to solicit (poll) a response or sequence of responses from the
+other station. The final (F) bit set to 1 shall be used by a station to indicate the response frame transmitted as the
+result of a soliciting (poll) command. The poll/final (P/F) bit shall serve a function in both command frames and
+response frames. (In command frames, the P/F bit is referred to as the P bit. In response frames, it is referred to as
+the F bit.)
 
 Length indicator:
 first byte (and only one if EA=1)
@@ -86,26 +84,22 @@ The FCS shall be the ones complement of the sum (modulo 2) of
         x^k (x^7 + x^6 + x^5 + x^4 + x^3 + x^2 + x^1 + 1)
         divided (modulo 2) by the generator polynomial
         x^8 + x^2 + x + 1,
-        where k is the number of bits in the frame existing between, but not including, the final bit of the opening flag and the
-        first bit of the FCS, excluding start and stop elements (start/stop transmission), and bits (synchronous transmission) and
-        octets (start/stop transmission) inserted for transparency, and
-    b) the remainder of the division (modulo 2) by the generator polynomial
-        x^8 + x^2 + x + 1
-        of the product of x 8 by the content of the frame existing between, but not including, the final bit of the opening flag and
-        the first bit of the FCS, excluding start and stop elements (start/stop transmission), and bits (synchronous transmission)
-        and octets (start/stop transmission) inserted for transparency.
-        As a typical implementation, at the transmitter, the initial content of the register of the device computing the remainder
-        of the division is preset to all ones and is then modified by division by the generator polynomial (as described above) of
-        the address, control and information fields; the ones complement of the resulting remainder is transmitted as the 8-bit
-        FCS.
-        At the receiver, the initial content of the register of the device computing the remainder is preset to all ones. The final
-        remainder after multiplication by x 8 and then division (modulo 2) by the generator polynomial
-        x^8 + x^2 + x + 1
-        of the serial incoming protected bits and the FCS, will be 1111 0011 (x 7 through x 0 , respectively) in the absence of
-        transmission errors.
-        In the case of the UIH frame the FCS is calculated on the contents of the address and control fields only. This means that
-        the I-field is not protected but does permit pre-calculation of the FCS for the repertoire of DLCIs that are to be used.
-        The FCS is calculated in the normal manner for all other frames in Table 2.
+        where k is the number of bits in the frame existing between, but not including, the final bit of the opening
+flag and the first bit of the FCS, excluding start and stop elements (start/stop transmission), and bits (synchronous
+transmission) and octets (start/stop transmission) inserted for transparency, and b) the remainder of the division
+(modulo 2) by the generator polynomial x^8 + x^2 + x + 1 of the product of x 8 by the content of the frame existing
+between, but not including, the final bit of the opening flag and the first bit of the FCS, excluding start and stop
+elements (start/stop transmission), and bits (synchronous transmission) and octets (start/stop transmission) inserted
+for transparency. As a typical implementation, at the transmitter, the initial content of the register of the device
+computing the remainder of the division is preset to all ones and is then modified by division by the generator
+polynomial (as described above) of the address, control and information fields; the ones complement of the resulting
+remainder is transmitted as the 8-bit FCS. At the receiver, the initial content of the register of the device computing
+the remainder is preset to all ones. The final remainder after multiplication by x 8 and then division (modulo 2) by the
+generator polynomial x^8 + x^2 + x + 1 of the serial incoming protected bits and the FCS, will be 1111 0011 (x 7 through
+x 0 , respectively) in the absence of transmission errors. In the case of the UIH frame the FCS is calculated on the
+contents of the address and control fields only. This means that the I-field is not protected but does permit
+pre-calculation of the FCS for the repertoire of DLCIs that are to be used. The FCS is calculated in the normal manner
+for all other frames in Table 2.
 
 All transmitted characters will be sent using one start bit, eight data bits, no parity bit and one stop bit.
 In the field descriptions, bit 1 is transmitted first.
@@ -150,12 +144,11 @@ DISC command sent at DLCI 0 have the same meaning as the Multiplexer Close Down
 5.3.5 Unnumbered information with header check (UIH) command and
 response
 The UIH command/response shall be used to send information without affecting the V(S) or V(R) variables at either
-station. UIH is used where the integrity of the information being transferred is of lesser importance than its delivery to
-the correct DLCI. For the UIH frame, the FCS shall be calculated over only the address and control fields.
-Reception of the UIH command/response is not sequence number verified by the data link procedures; therefore, the
-UIH frame may be lost if a data link exception occurs during transmission of the protected portion of the command, or
-duplicated if an exception condition occurs during any reply to the command. There is no specified response to the UIH
-command/response.
+station. UIH is used where the integrity of the information being transferred is of lesser importance than its delivery
+to the correct DLCI. For the UIH frame, the FCS shall be calculated over only the address and control fields. Reception
+of the UIH command/response is not sequence number verified by the data link procedures; therefore, the UIH frame may be
+lost if a data link exception occurs during transmission of the protected portion of the command, or duplicated if an
+exception condition occurs during any reply to the command. There is no specified response to the UIH command/response.
 
 5.3.6 Unnumbered Information (UI) command and response
 The UI command/response shall be used to send information without affecting the V(S) or V(R) variables at either
@@ -169,18 +162,16 @@ Support of UI frames is optional.
 OPERATION:
 
 5.4.1 DLC Establishment
-In most cases the establishment of a DLC will be initiated by the TE, however, the protocol is balanced and the initiation
-may come from the MS. The action taken by the higher layers of the TE upon the initiation of the establishment of a
-DLC from the MS is outside the scope of this specification.
-The station wishing to establish a DLC transmits a SABM frame with the P-bit set to 1. The address field contains the
-DLCI value associated with the desired connection. If the responding station is ready to establish the connection it will
-reply with a UA frame with the F-bit set to 1. If the responding station is not ready or unwilling to establish the
-particular DLC it will reply with a DM frame with the F-bit set to 1.
-Once a DLC has been established the stations are both said to be in a connected mode, for the particular DLC, and
-transfer of information may commence.
-If no UA or DM response has been received after T1 the initiating station may retransmit the SABM. This action may be
-repeated until a response is obtained or action is taken by a higher layer.
-If no negotiation procedure is used, DLC parameters are the default one.
+In most cases the establishment of a DLC will be initiated by the TE, however, the protocol is balanced and the
+initiation may come from the MS. The action taken by the higher layers of the TE upon the initiation of the
+establishment of a DLC from the MS is outside the scope of this specification. The station wishing to establish a DLC
+transmits a SABM frame with the P-bit set to 1. The address field contains the DLCI value associated with the desired
+connection. If the responding station is ready to establish the connection it will reply with a UA frame with the F-bit
+set to 1. If the responding station is not ready or unwilling to establish the particular DLC it will reply with a DM
+frame with the F-bit set to 1. Once a DLC has been established the stations are both said to be in a connected mode, for
+the particular DLC, and transfer of information may commence. If no UA or DM response has been received after T1 the
+initiating station may retransmit the SABM. This action may be repeated until a response is obtained or action is taken
+by a higher layer. If no negotiation procedure is used, DLC parameters are the default one.
 
 5.4.2 DLC Release
 The release of a DLC may be initiated by either station by the transmission of a DISC frame with the P-bit set to one.
@@ -213,33 +204,37 @@ repeated until a response is obtained or action is taken by a higher layer.
 #include "Service/Service.hpp"
 #include <queue>
 
-#if defined (__cplusplus)
-    extern "C"{
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 #include "FreeRTOS.h"
-#include "task.h"     /* RTOS task related API prototypes. */
+#include "task.h" /* RTOS task related API prototypes. */
 #if defined(__cplusplus)
 }
 #endif
 
-namespace bsp{
+namespace bsp
+{
     class Cellular;
 }
 
-void workerTaskFunction( void* ptr );
+void workerTaskFunction(void *ptr);
 
-class TS0710 {
-private:
-    std::vector<DLC_channel*> channels;
-    friend void workerTaskFunction( void* ptr );
-    //worker's task handle
-    xTaskHandle taskHandle=nullptr;
+class TS0710
+{
+  private:
+    std::vector<DLC_channel *> channels;
+    friend void workerTaskFunction(void *ptr);
+    // worker's task handle
+    xTaskHandle taskHandle      = nullptr;
     const uint32_t taskPriority = 0;
     std::unique_ptr<bsp::Cellular> pv_cellular;
     PortSpeed_e pv_portSpeed;
     ATParser *parser;
 
-    enum class Mode{
+    enum class Mode
+    {
         AT,
         CMUX_SETUP,
         CMUX
@@ -251,8 +246,7 @@ private:
 
     bool searchForString(const std::vector<std::string> &response, std::string str)
     {
-        for (std::string s : response)
-        {
+        for (std::string s : response) {
             if (s == str)
                 return true;
         }
@@ -265,8 +259,9 @@ private:
     DLC_channel::Callback_t controlCallback = nullptr;
     std::queue<uint8_t> RXFifo;
 
-public: 
-    enum class ConfState{
+  public:
+    enum class ConfState
+    {
         Success,
         Failure,
         ModemNeedsReset,
@@ -277,48 +272,55 @@ public:
     /// @note channel 0 is mandatory - Control
     /// @param index - index
     /// @return pointer to channel or nullptr if such channel doesn't exist
-    DLC_channel *GetChannel(const size_t index) 
+    DLC_channel *GetChannel(const size_t index)
     {
-        if(index >= channels.size())
-        {
+        if (index >= channels.size()) {
             LOG_ERROR("No channel with index %d", index);
             return nullptr;
         }
-        return channels[index]; 
+        return channels[index];
     }
 
     /// @brief Get Channel by name
     /// @param name - channel name
     /// @return pointer to channel or nullptr if such channel doesn't exist
-    DLC_channel *GetChannel(const std::string & name) { 
-        for (auto it : channels) { 
-            if (it->getName() == name) return it; 
+    DLC_channel *GetChannel(const std::string &name)
+    {
+        for (auto it : channels) {
+            if (it->getName() == name)
+                return it;
         }
         LOG_ERROR("Channel %s doesn't exist", name.c_str());
         return nullptr;
-    } 
+    }
 
-    DLC_channel *OpenChannel(DLCI_t DLCI, const std::string& name) { 
-        DLC_channel *channel = new DLC_channel(DLCI, name, pv_cellular.get()); 
-        channels.push_back(channel); 
+    DLC_channel *OpenChannel(DLCI_t DLCI, const std::string &name)
+    {
+        DLC_channel *channel = new DLC_channel(DLCI, name, pv_cellular.get());
+        channels.push_back(channel);
         return channels.back();
     }
 
-    void CloseChannel(int index) { 
-        delete channels.at(index); 
-        channels.erase(channels.begin() + index); 
+    void CloseChannel(int index)
+    {
+        delete channels.at(index);
+        channels.erase(channels.begin() + index);
     }
 
-    void CloseChannel(const std::string & name) { 
-        for (size_t i = 0; i < channels.size(); i++) { 
+    void CloseChannel(const std::string &name)
+    {
+        for (size_t i = 0; i < channels.size(); i++) {
             if (channels.at(i)->getName() == name) {
-                delete channels.at(i); 
+                delete channels.at(i);
                 channels.erase(channels.begin() + 1);
-            } 
-        } 
+            }
+        }
     }
 
-    DLCI_t GetLastDLCI() { return static_cast<DLCI_t>(channels.size() == 0 ? 0 : channels.size() - 1); }
+    DLCI_t GetLastDLCI()
+    {
+        return static_cast<DLCI_t>(channels.size() == 0 ? 0 : channels.size() - 1);
+    }
 
     ConfState PowerUpProcedure();
     ConfState ConfProcedure();
@@ -327,9 +329,18 @@ public:
 
     ssize_t ReceiveData(std::vector<uint8_t> &data, uint32_t timeout);
 
-    bsp::Cellular* getCellular() { return pv_cellular.get(); }
-    TS0710_START::START_SystemParameters_t getStartParams() { return startParams; }
-    ATParser* getParser() { return parser; }
+    bsp::Cellular *getCellular()
+    {
+        return pv_cellular.get();
+    }
+    TS0710_START::START_SystemParameters_t getStartParams()
+    {
+        return startParams;
+    }
+    ATParser *getParser()
+    {
+        return parser;
+    }
 
     /// @brief It is searching the resposne for a string
     ///
@@ -338,24 +349,26 @@ public:
     /// @param numberOfExpectedTokens - number of expected tokens, 0 means do not validate number of tokens
     /// @param level - determine how the errors are logged
     /// @return true - "OK" string is found, false - otherwise
-    bool SearchATCommandResponse(const std::vector<std::string> &response, const std::string &str, size_t numberOfExpectedTokens, logger_level level)
+    bool SearchATCommandResponse(const std::vector<std::string> &response,
+                                 const std::string &str,
+                                 size_t numberOfExpectedTokens,
+                                 logger_level level)
     {
         const size_t numberOfTokens = response.size();
-        if (searchForString(response, str) && (numberOfExpectedTokens == 0 || numberOfTokens == numberOfExpectedTokens))
-        {
+        if (searchForString(response, str) &&
+            (numberOfExpectedTokens == 0 || numberOfTokens == numberOfExpectedTokens)) {
             return true;
         }
-        else
-        {
+        else {
             std::string resp;
-            for (std::string s : response)
-            {
+            for (std::string s : response) {
                 resp.append(s);
             }
 
             LOG_CUSTOM(level, "Invalid response: %s", resp.c_str());
             // numberOfExpectedTokens == 0, means do not validate number of tokens
-            LOG_CUSTOM(level, " - Number of tokens %u, number of expected tokens %u", numberOfTokens, numberOfExpectedTokens);
+            LOG_CUSTOM(
+                level, " - Number of tokens %u, number of expected tokens %u", numberOfTokens, numberOfExpectedTokens);
             return false;
         }
     }
@@ -368,7 +381,9 @@ public:
     /// @param numberOfExpectedTokens - number of expected tokens, 0 means do not validate number of tokens
     /// @param level - determine how the errors are logged
     /// @return true - str string is found, false - otherwise
-    bool CheckATCommandResponse(const std::vector<std::string> &response, size_t numberOfExpectedTokens, logger_level level = LOGERROR)
+    bool CheckATCommandResponse(const std::vector<std::string> &response,
+                                size_t numberOfExpectedTokens,
+                                logger_level level = LOGERROR)
     {
         return SearchATCommandResponse(response, "OK", numberOfExpectedTokens, level);
     }
diff --git a/module-cellular/Modem/TS0710/TS0710_CLOSE.cpp b/module-cellular/Modem/TS0710/TS0710_CLOSE.cpp
index c5dca4169..576429b1d 100644
--- a/module-cellular/Modem/TS0710/TS0710_CLOSE.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_CLOSE.cpp
@@ -2,18 +2,14 @@
  * Project Untitled
  */
 
-
 #include "TS0710_CLOSE.h"
 
 /**
  * TS0710_CLOSE implementation
  */
 
+void TS0710_CLOSE::request()
+{}
 
-void TS0710_CLOSE::request() {
-
-}
-
-void TS0710_CLOSE::indication() {
-
-}
\ No newline at end of file
+void TS0710_CLOSE::indication()
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_CLOSE.h b/module-cellular/Modem/TS0710/TS0710_CLOSE.h
index 9205690cf..a74d7e6d4 100644
--- a/module-cellular/Modem/TS0710/TS0710_CLOSE.h
+++ b/module-cellular/Modem/TS0710/TS0710_CLOSE.h
@@ -1,25 +1,27 @@
 /**
  * Project Untitled
  * @brief When the request primitive is passed to the TS 0710 layer of the transmitting device close down of the
- * multiplexer mode is initiated and a close down command is sent to the receiving device. On reception of the close down
- * command the TS 0710 layer of the receiving device sends the indication primitive to the upper layer and the multiplexer
- * mode is terminated.
+ * multiplexer mode is initiated and a close down command is sent to the receiving device. On reception of the close
+ * down command the TS 0710 layer of the receiving device sends the indication primitive to the upper layer and the
+ * multiplexer mode is terminated.
  */
 
-
 #ifndef _TS0710_CLOSE_H
 #define _TS0710_CLOSE_H
 
-//control channel - Multiplexer close down (CLD)
-class TS0710_CLOSE {
-public: 
-TS0710_CLOSE() {}
-~TS0710_CLOSE() {}
+// control channel - Multiplexer close down (CLD)
+class TS0710_CLOSE
+{
+  public:
+    TS0710_CLOSE()
+    {}
+    ~TS0710_CLOSE()
+    {}
 
-private:
-void request();
-    
-void indication();
+  private:
+    void request();
+
+    void indication();
 };
 
 #endif //_TS0710_CLOSE_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_CONTROL.cpp b/module-cellular/Modem/TS0710/TS0710_CONTROL.cpp
index 554c00e17..0baf0b8c0 100644
--- a/module-cellular/Modem/TS0710/TS0710_CONTROL.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_CONTROL.cpp
@@ -2,42 +2,36 @@
  * Project Untitled
  */
 
-
 #include "TS0710_CONTROL.h"
 
 /**
  * TS0710_CONTROL implementation
  */
 
+/**
+ * @param DLC
+ * @param Control_parameters
+ */
+void TS0710_CONTROL::request(DLCI_t DLC, ControlParameters_t Control_parameters)
+{}
 
 /**
  * @param DLC
  * @param Control_parameters
  */
-void TS0710_CONTROL::request(DLCI_t DLC, ControlParameters_t Control_parameters) {
-
-}
+void TS0710_CONTROL::indication(DLCI_t DLC, ControlParameters_t Control_parameters)
+{}
 
 /**
  * @param DLC
  * @param Control_parameters
  */
-void TS0710_CONTROL::indication(DLCI_t DLC, ControlParameters_t Control_parameters) {
-
-}
+void TS0710_CONTROL::response(DLCI_t DLC, ControlParameters_t Control_parameters)
+{}
 
 /**
  * @param DLC
  * @param Control_parameters
  */
-void TS0710_CONTROL::response(DLCI_t DLC, ControlParameters_t Control_parameters) {
-
-}
-
-/**
- * @param DLC
- * @param Control_parameters
- */
-void TS0710_CONTROL::confirm(DLCI_t DLC, ControlParameters_t Control_parameters) {
-
-}
\ No newline at end of file
+void TS0710_CONTROL::confirm(DLCI_t DLC, ControlParameters_t Control_parameters)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_CONTROL.h b/module-cellular/Modem/TS0710/TS0710_CONTROL.h
index 7e1468e4e..e0fc9e8de 100644
--- a/module-cellular/Modem/TS0710/TS0710_CONTROL.h
+++ b/module-cellular/Modem/TS0710/TS0710_CONTROL.h
@@ -1,11 +1,10 @@
 /**
  * Project Untitled
  * @brief The request primitive is used to convey control information to the remote port. The indication is sent to
- * the other port emulation entity. The remote port emulation entity replies with a response which is sent to the originating
- * 07.10 entity. A confirm is sent back to the port emulation entity.
+ * the other port emulation entity. The remote port emulation entity replies with a response which is sent to the
+ * originating 07.10 entity. A confirm is sent back to the port emulation entity.
  */
 
-
 #ifndef _TS0710_CONTROL_H
 #define _TS0710_CONTROL_H
 
@@ -14,55 +13,73 @@
 #include "TS0710_PORTNEG.h"
 #include "TS0710_CONTROL.h"
 
-//control channel - Modem Status Command (MSC)
+// control channel - Modem Status Command (MSC)
 
-class TS0710_CONTROL {
-private:
-    TS0710_PARNEG *parneg;          //control channel - DLC parameter negotiation (PN)
-    TS0710_SERVNEG *servneg;        //control channel - Service Negotiation Command (SNC)
-    TS0710_PORTNEG *portneg;        //control channel - Remote Port Negotiation Command (RPN)
-                                    //control channel - Remote Line Status Command(RLS)
-    TS0710_CONTROL *control;        //control channel - Modem Status Command (MSC)
+class TS0710_CONTROL
+{
+  private:
+    TS0710_PARNEG *parneg;   // control channel - DLC parameter negotiation (PN)
+    TS0710_SERVNEG *servneg; // control channel - Service Negotiation Command (SNC)
+    TS0710_PORTNEG *portneg; // control channel - Remote Port Negotiation Command (RPN)
+                             // control channel - Remote Line Status Command(RLS)
+    TS0710_CONTROL *control; // control channel - Modem Status Command (MSC)
 
-public: 
-    enum ModemSignal_e { DTR_DSR, RTS_CTS, RI, DCD };
-    enum Buffers_e { DNDiscard, Discard };
-    enum BreakSigSeq_e { ASAP, INSEQ };
-
-    struct ControlParameters_t {
-        ModemSignal_e ModemSignal;  //!< Modem Signal [DTR/DSR | RTS/CTS | RI | DCD ]
-        int BreakSignal;            //!< Break Signal [0—3 s in steps of 200 ms, default 0ms ]
-        Buffers_e Buffers;          //!< Buffers [do not discard buffers, discard buffer default: do not discard buffers]
-        BreakSigSeq_e BreakSigSeq;  //!< Break signal sequence [ as soon as possible | in sequence, default: in sequence]
+  public:
+    enum ModemSignal_e
+    {
+        DTR_DSR,
+        RTS_CTS,
+        RI,
+        DCD
+    };
+    enum Buffers_e
+    {
+        DNDiscard,
+        Discard
+    };
+    enum BreakSigSeq_e
+    {
+        ASAP,
+        INSEQ
     };
 
-TS0710_CONTROL() {}
-~TS0710_CONTROL() {}
+    struct ControlParameters_t
+    {
+        ModemSignal_e ModemSignal; //!< Modem Signal [DTR/DSR | RTS/CTS | RI | DCD ]
+        int BreakSignal;           //!< Break Signal [0—3 s in steps of 200 ms, default 0ms ]
+        Buffers_e Buffers;         //!< Buffers [do not discard buffers, discard buffer default: do not discard buffers]
+        BreakSigSeq_e BreakSigSeq; //!< Break signal sequence [ as soon as possible | in sequence, default: in sequence]
+    };
 
-private:
-/**
- * @param DLC
- * @param Control_parameters
- */
-void request(DLCI_t DLC, ControlParameters_t Control_parameters);
-    
-/**
- * @param DLC
- * @param Control_parameters
- */
-void indication(DLCI_t DLC, ControlParameters_t Control_parameters);
-    
-/**
- * @param DLC
- * @param Control_parameters
- */
-void response(DLCI_t DLC, ControlParameters_t Control_parameters);
-    
-/**
- * @param DLC
- * @param Control_parameters
- */
-void confirm(DLCI_t DLC, ControlParameters_t Control_parameters);
+    TS0710_CONTROL()
+    {}
+    ~TS0710_CONTROL()
+    {}
+
+  private:
+    /**
+     * @param DLC
+     * @param Control_parameters
+     */
+    void request(DLCI_t DLC, ControlParameters_t Control_parameters);
+
+    /**
+     * @param DLC
+     * @param Control_parameters
+     */
+    void indication(DLCI_t DLC, ControlParameters_t Control_parameters);
+
+    /**
+     * @param DLC
+     * @param Control_parameters
+     */
+    void response(DLCI_t DLC, ControlParameters_t Control_parameters);
+
+    /**
+     * @param DLC
+     * @param Control_parameters
+     */
+    void confirm(DLCI_t DLC, ControlParameters_t Control_parameters);
 };
 
 #endif //_TS0710_CONTROL_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DATA.cpp b/module-cellular/Modem/TS0710/TS0710_DATA.cpp
index ea01faf32..57224fe5a 100644
--- a/module-cellular/Modem/TS0710/TS0710_DATA.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_DATA.cpp
@@ -2,13 +2,13 @@
  * Project Untitled
  */
 
-
 #include "TS0710_DATA.h"
 #include "TS0710_Frame.h"
 #include <cassert>
 
-#if defined (__cplusplus)
-    extern "C"{
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 //#include "uart.h"
 #if defined(__cplusplus)
@@ -18,7 +18,11 @@
 /**
  * TS0710_DATA implementation
  */
-TS0710_DATA::TS0710_DATA(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t>& User_data, bsp::Cellular *cellular) {
+TS0710_DATA::TS0710_DATA(DLCI_t DLCI,
+                         DLC_ESTABL_SystemParameters_t sysParams,
+                         std::vector<uint8_t> &User_data,
+                         bsp::Cellular *cellular)
+{
     assert(cellular != nullptr);
 
     pv_cellular = cellular;
@@ -30,7 +34,8 @@ TS0710_DATA::TS0710_DATA(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, s
  * @param DLCI
  * @param User_data
  */
-void TS0710_DATA::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t> User_data) {
+void TS0710_DATA::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t> User_data)
+{
     /*
     TE sends AT command "ATI<CR>" through DLC 1
         TE→MS   F9 05 EF 09 41 54 49 0D 58 F9   UIH Frame
@@ -46,38 +51,37 @@ void TS0710_DATA::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams,
                 4C 44 30 33 0D 0A 0D 0A 47 F9   UIH Frame
 */
     TS0710_Frame::frame_t frame;
-    frame.Address = static_cast<uint8_t>(DLCI << 2) /*| (1 << 1)*/;  //set C/R = 1 - command
+    frame.Address = static_cast<uint8_t>(DLCI << 2) /*| (1 << 1)*/; // set C/R = 1 - command
     frame.Control = static_cast<uint8_t>(TypeOfFrame_e::UIH);
-    
+
     if (User_data.size() < static_cast<size_t>(sysParams.MaxFrameSize)) {
         frame.data = User_data;
         TS0710_Frame frame_c(frame);
-        //UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
-        pv_cellular->Write(static_cast<void*>(frame_c.getSerData().data()), frame_c.getSerData().size());
+        // UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
+        pv_cellular->Write(static_cast<void *>(frame_c.getSerData().data()), frame_c.getSerData().size());
     }
-    else {  //if data size > max frame size
-        int dataLeft = User_data.size();
+    else { // if data size > max frame size
+        int dataLeft                     = User_data.size();
         std::vector<uint8_t>::iterator i = User_data.begin();
-        uint32_t parts = User_data.size() / sysParams.MaxFrameSize + 1; //add reminder
+        uint32_t parts                   = User_data.size() / sysParams.MaxFrameSize + 1; // add reminder
         LOG_DEBUG("SENDING %i parts", parts);
         while (parts--) {
-            std::vector<uint8_t>::iterator last = i + (dataLeft < sysParams.MaxFrameSize ? dataLeft : sysParams.MaxFrameSize);  //distinguish reminder
+            std::vector<uint8_t>::iterator last =
+                i + (dataLeft < sysParams.MaxFrameSize ? dataLeft : sysParams.MaxFrameSize); // distinguish reminder
             frame.data = std::vector<uint8_t>(i, last);
             TS0710_Frame frame_c(frame);
-            //UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
-            //while(!pv_cellular->GetSendingAllowed());
-            pv_cellular->Write(static_cast<void*>(frame_c.getSerData().data()), frame_c.getSerData().size());
-            //vTaskDelay(1);
+            // UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
+            // while(!pv_cellular->GetSendingAllowed());
+            pv_cellular->Write(static_cast<void *>(frame_c.getSerData().data()), frame_c.getSerData().size());
+            // vTaskDelay(1);
             dataLeft -= (dataLeft < sysParams.MaxFrameSize ? dataLeft : sysParams.MaxFrameSize);
         }
     }
-    
 }
 
 /**
  * @param DLCI
  * @param User_data
  */
-void TS0710_DATA::indication(DLCI_t DLCI, std::vector<uint8_t> User_data) {
-
-}
\ No newline at end of file
+void TS0710_DATA::indication(DLCI_t DLCI, std::vector<uint8_t> User_data)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DATA.h b/module-cellular/Modem/TS0710/TS0710_DATA.h
index b0d5d04a3..e1c4690b5 100644
--- a/module-cellular/Modem/TS0710/TS0710_DATA.h
+++ b/module-cellular/Modem/TS0710/TS0710_DATA.h
@@ -1,39 +1,42 @@
 /**
  * Project Untitled
  * @brief The transmitting unit initiates transmission of data using the frame type specified for the chosen DLCI by
- * means of the request primitive. The transmitted data is delivered to the upper layer of the receiving by the indication
- * primitive. No confirmation primitive exists even for the error recovery mode. In this mode TS 0710 will take care of all
- * mechanisms involved in the error checking and thus deliver data error free.
+ * means of the request primitive. The transmitted data is delivered to the upper layer of the receiving by the
+ * indication primitive. No confirmation primitive exists even for the error recovery mode. In this mode TS 0710 will
+ * take care of all mechanisms involved in the error checking and thus deliver data error free.
  */
 
-
 #ifndef _TS0710_DATA_H
 #define _TS0710_DATA_H
 
 #include <vector>
 #include "TS0710.h"
 
-class TS0710_DATA {
-public: 
+class TS0710_DATA
+{
+  public:
+    TS0710_DATA(DLCI_t DLCI,
+                DLC_ESTABL_SystemParameters_t sysParams,
+                std::vector<uint8_t> &User_data,
+                bsp::Cellular *cellular);
+    ~TS0710_DATA()
+    {}
 
-TS0710_DATA(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t>& User_data, bsp::Cellular *cellular);
-~TS0710_DATA() {}
+  private:
+    /**
+     * @param DLCI
+     * @param User_data
+     */
+    void request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t> User_data);
 
-private:
-/**
- * @param DLCI
- * @param User_data
- */
-void request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t sysParams, std::vector<uint8_t> User_data);
-    
-/**
- * @param DLCI
- * @param User_data
- * 
- */
-void indication(DLCI_t DLCI, std::vector<uint8_t> User_data);
+    /**
+     * @param DLCI
+     * @param User_data
+     *
+     */
+    void indication(DLCI_t DLCI, std::vector<uint8_t> User_data);
 
-bsp::Cellular *pv_cellular;
+    bsp::Cellular *pv_cellular;
 };
 
 #endif //_TS0710_DATA_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.cpp b/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.cpp
index a2fec1740..3b8c1a0b9 100644
--- a/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.cpp
@@ -2,11 +2,11 @@
  * Project Untitled
  */
 
-
 #include "TS0710_DLC_ESTABL.h"
 
-#if defined (__cplusplus)
-    extern "C"{
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 //#include "uart.h"
 #if defined(__cplusplus)
@@ -21,29 +21,31 @@
 /**
  * TS0710_DLC_ESTABL implementation
  */
-TS0710_DLC_ESTABL::TS0710_DLC_ESTABL(DLCI_t DLCI, bsp::Cellular *cellular){ 
+TS0710_DLC_ESTABL::TS0710_DLC_ESTABL(DLCI_t DLCI, bsp::Cellular *cellular)
+{
     DLC_ESTABL_SystemParameters_t system_parameters;
-    system_parameters.TypeOfFrame = TypeOfFrame_e::UIH;
-    system_parameters.ConvergenceLayer = 1;
-    system_parameters.Priority = 1;
-    system_parameters.AckTime = 100; //100ms default
-    system_parameters.MaxFrameSize = 128;
-    system_parameters.MaxNumOfRetransmissions = 3; //default 3
-    system_parameters.ErrRecovWindowSize = 2; //default 2
+    system_parameters.TypeOfFrame             = TypeOfFrame_e::UIH;
+    system_parameters.ConvergenceLayer        = 1;
+    system_parameters.Priority                = 1;
+    system_parameters.AckTime                 = 100; // 100ms default
+    system_parameters.MaxFrameSize            = 128;
+    system_parameters.MaxNumOfRetransmissions = 3; // default 3
+    system_parameters.ErrRecovWindowSize      = 2; // default 2
 
-    pv_DLCI = DLCI;
+    pv_DLCI             = DLCI;
     pv_SystemParameters = system_parameters;
 
     pv_cellular = cellular;
 
-    active = request(DLCI, system_parameters); 
+    active = request(DLCI, system_parameters);
 }
 
 /**
  * @param DLCI
  * @param system_parameters
  */
-bool TS0710_DLC_ESTABL::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters) {
+bool TS0710_DLC_ESTABL::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters)
+{
     /*
     TE requests to establish control channel DLCI 0 by SABM frame
         TE→MS   F9 03 3F 01 1C F9     SABM Frame
@@ -51,37 +53,37 @@ bool TS0710_DLC_ESTABL::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t syste
         TE←MS   F9 03 73 01 D7 F9     UA Frame
     */
 
-   /*
-   [send data]
-        |<--------------
-        V              |
-    -(is resp.)-       |
-    |T        F|       | 
-    |     -(is t-out)- |
-    |     |T        F|-|
-    |     |          
-    |     V
-    V {no resp.}
-  {resp.}
-   */
+    /*
+    [send data]
+         |<--------------
+         V              |
+     -(is resp.)-       |
+     |T        F|       |
+     |     -(is t-out)- |
+     |     |T        F|-|
+     |     |
+     |     V
+     V {no resp.}
+   {resp.}
+    */
 
-  /* data flow :
-    TX: (data) -> queue[i] -> [ass. frame] -> [send to UART - mutex protected]
-        - frame type depends of data source - control/data[dlci]
-    RX: [receive from UART] -> [analyze frame] -> queue[i] -> (data)
-        - data sent to different queues - control/data[dlci]
-  */
+    /* data flow :
+      TX: (data) -> queue[i] -> [ass. frame] -> [send to UART - mutex protected]
+          - frame type depends of data source - control/data[dlci]
+      RX: [receive from UART] -> [analyze frame] -> queue[i] -> (data)
+          - data sent to different queues - control/data[dlci]
+    */
     LOG_DEBUG("Sending %s frame to DLCI %i", TypeOfFrame_text[system_parameters.TypeOfFrame].c_str(), DLCI);
     TS0710_Frame::frame_t frame;
-    frame.Address = static_cast<uint8_t>(DLCI << 2) | (1 << 1);  //set C/R = 1 - command
+    frame.Address = static_cast<uint8_t>(DLCI << 2) | (1 << 1); // set C/R = 1 - command
     frame.Control = static_cast<uint8_t>(system_parameters.TypeOfFrame);
     TS0710_Frame frame_c(frame);
-    pv_cellular->Write(static_cast<void*>(frame_c.getSerData().data()), frame_c.getSerData().size());
-    //return true;
+    pv_cellular->Write(static_cast<void *>(frame_c.getSerData().data()), frame_c.getSerData().size());
+    // return true;
     int retries = system_parameters.MaxNumOfRetransmissions;
     while (retries--) {
-        //UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
-        pv_cellular->Write(static_cast<void*>(frame_c.getSerData().data()), frame_c.getSerData().size());
+        // UartSend(frame_c.getSerData().data(), frame_c.getSerData().size());
+        pv_cellular->Write(static_cast<void *>(frame_c.getSerData().data()), frame_c.getSerData().size());
         vTaskDelay(system_parameters.AckTime);
         if (response(DLCI, system_parameters)) {
             LOG_DEBUG("Got response");
@@ -97,27 +99,28 @@ bool TS0710_DLC_ESTABL::request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t syste
  * @param DLCI
  * @param system_parameters
  */
-void TS0710_DLC_ESTABL::indication(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters) {
-
-}
+void TS0710_DLC_ESTABL::indication(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters)
+{}
 
 /**
  * @param DLCI
  * @param system_parameters
  * @param accept
  */
-bool TS0710_DLC_ESTABL::response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters) {
-    #define _SIZE   256
+bool TS0710_DLC_ESTABL::response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters)
+{
+#define _SIZE 256
     static uint8_t *data;
 
-    data = static_cast<uint8_t*>(malloc(_SIZE));    //disconnected from declaration due to the fact that static is needed here and if
-                                                    //allocated in declaration, compiler will not alloc this second time called
+    data = static_cast<uint8_t *>(
+        malloc(_SIZE)); // disconnected from declaration due to the fact that static is needed here and if
+                        // allocated in declaration, compiler will not alloc this second time called
 
     if (!data)
         return false;
-    
-    //uint32_t len = UartReceive(data);
-    ssize_t len = pv_cellular->Read(reinterpret_cast<void*>(data), _SIZE);
+
+    // uint32_t len = UartReceive(data);
+    ssize_t len = pv_cellular->Read(reinterpret_cast<void *>(data), _SIZE);
     LOG_DEBUG("RX length = %li", len);
 
     if (len > 0) {
@@ -125,7 +128,8 @@ bool TS0710_DLC_ESTABL::response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t syst
         TS0710_Frame frame_c(v);
         TS0710_Frame::frame_t frame = frame_c.getFrame();
 
-        if ( ((frame.Address & 0xFC) == (DLCI << 2)) && (frame.Control == (static_cast<uint8_t>(TypeOfFrame_e::UA) & ~(1 << 4))) ) {
+        if (((frame.Address & 0xFC) == (DLCI << 2)) &&
+            (frame.Control == (static_cast<uint8_t>(TypeOfFrame_e::UA) & ~(1 << 4)))) {
             LOG_DEBUG("Frame correct");
             free(data);
             return true;
@@ -142,6 +146,7 @@ bool TS0710_DLC_ESTABL::response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t syst
  * @param system_parameters
  * @param accept
  */
-bool TS0710_DLC_ESTABL::confirm(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters) {
+bool TS0710_DLC_ESTABL::confirm(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters)
+{
     return false;
 }
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.h b/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.h
index 8a00d92aa..64776c7a3 100644
--- a/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.h
+++ b/module-cellular/Modem/TS0710/TS0710_DLC_ESTABL.h
@@ -2,60 +2,77 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_DLC_ESTABL_H
 #define _TS0710_DLC_ESTABL_H
 
 #include "TS0710.h"
 
-class TS0710_DLC_ESTABL {
-public: 
-    //DLC_ESTABL_SystemParameters passed to Port Negotiation frame in control channel
+class TS0710_DLC_ESTABL
+{
+  public:
+    // DLC_ESTABL_SystemParameters passed to Port Negotiation frame in control channel
 
-private:
+  private:
     DLC_ESTABL_SystemParameters_t pv_SystemParameters;
     DLCI_t pv_DLCI;
     bool active = false;
     bsp::Cellular *pv_cellular;
 
-public:
+  public:
     TS0710_DLC_ESTABL(DLCI_t DLCI, bsp::Cellular *cellular);
-    TS0710_DLC_ESTABL(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters, bsp::Cellular *cellular) { pv_DLCI = DLCI; pv_SystemParameters = system_parameters; pv_cellular = cellular; active = request(DLCI, system_parameters); };
-    ~TS0710_DLC_ESTABL() {}
+    TS0710_DLC_ESTABL(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters, bsp::Cellular *cellular)
+    {
+        pv_DLCI             = DLCI;
+        pv_SystemParameters = system_parameters;
+        pv_cellular         = cellular;
+        active              = request(DLCI, system_parameters);
+    };
+    ~TS0710_DLC_ESTABL()
+    {}
 
-    bool getResponse() { return active; }
-    DLC_ESTABL_SystemParameters_t getParams() { return pv_SystemParameters; }
+    bool getResponse()
+    {
+        return active;
+    }
+    DLC_ESTABL_SystemParameters_t getParams()
+    {
+        return pv_SystemParameters;
+    }
 
-private:
-/**
- * @param DLCI
- * @param system_parameters
- * @brief The transmitting device uses the request primitive initiate the establishment of a new DLC with a desired set of system parameters on the multiplexer channel.
- */
-bool request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
-    
-/**
- * @param DLCI
- * @param system_parameters
- * @brief The indication primitive is passed to the upper layer by the TS 0710 layer of the receiving device on reception of the DLC establishment request.
- */
-void indication(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
-    
-/**
- * @param DLCI
- * @param system_parameters
- * @return accept
- * @brief The receiving device uses the response primitive to either accept or reject the proposed DLCI with its system parameters.
- */
-bool response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
-    
-/**
- * @param DLCI
- * @param system_parameters
- * @return accept
- * @brief The confirm primitive is passed to the upper layer of the transmitting device on reception of the response from the receiving device.
- */
-bool confirm(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
+  private:
+    /**
+     * @param DLCI
+     * @param system_parameters
+     * @brief The transmitting device uses the request primitive initiate the establishment of a new DLC with a desired
+     * set of system parameters on the multiplexer channel.
+     */
+    bool request(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
+
+    /**
+     * @param DLCI
+     * @param system_parameters
+     * @brief The indication primitive is passed to the upper layer by the TS 0710 layer of the receiving device on
+     * reception of the DLC establishment request.
+     */
+    void indication(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
+
+    /**
+     * @param DLCI
+     * @param system_parameters
+     * @return accept
+     * @brief The receiving device uses the response primitive to either accept or reject the proposed DLCI with its
+     * system parameters.
+     */
+    bool response(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
+
+    /**
+     * @param DLCI
+     * @param system_parameters
+     * @return accept
+     * @brief The confirm primitive is passed to the upper layer of the transmitting device on reception of the response
+     * from the receiving device.
+     */
+    bool confirm(DLCI_t DLCI, DLC_ESTABL_SystemParameters_t system_parameters);
 };
 
 #endif //_TS0710_DLC_ESTABL_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.cpp b/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.cpp
index 6752af9ab..13de13997 100644
--- a/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.cpp
@@ -2,22 +2,21 @@
  * Project Untitled
  */
 
-
 #include "TS0710_DLC_RELEASE.h"
 
 /**
  * TS0710_DLC_RELEASE implementation
  */
 
-
 /**
  * @param DLCI
  */
-void TS0710_DLC_RELEASE::request(DLCI_t DLCI) {
+void TS0710_DLC_RELEASE::request(DLCI_t DLCI)
+{
     /*
     TE sends DISC frame to request for closing down DLC 1
         TE→MS  F9 07 53 01 3f F9
-    MS feeds back UA frame to accept 
+    MS feeds back UA frame to accept
         TE←MS  F9 07 73 01 15 F9
     */
 }
@@ -25,6 +24,5 @@ void TS0710_DLC_RELEASE::request(DLCI_t DLCI) {
 /**
  * @param DLCI
  */
-void TS0710_DLC_RELEASE::indication(DLCI_t DLCI) {
-
-}
\ No newline at end of file
+void TS0710_DLC_RELEASE::indication(DLCI_t DLCI)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.h b/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.h
index 8ec42928f..f5152be7a 100644
--- a/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.h
+++ b/module-cellular/Modem/TS0710/TS0710_DLC_RELEASE.h
@@ -5,28 +5,31 @@
  * layer that the DLC has been closed down.
  */
 
-
 #ifndef _TS0710_DLC_RELEASE_H
 #define _TS0710_DLC_RELEASE_H
 
 #include "TS0710.h"
 
-class TS0710_DLC_RELEASE {
-public: 
+class TS0710_DLC_RELEASE
+{
+  public:
+    TS0710_DLC_RELEASE(DLCI_t DLCI)
+    {
+        request(DLCI);
+    };
+    ~TS0710_DLC_RELEASE()
+    {}
 
-TS0710_DLC_RELEASE(DLCI_t DLCI) { request(DLCI); };
-~TS0710_DLC_RELEASE() {}
+  private:
+    /**
+     * @param DLCI
+     */
+    void request(DLCI_t DLCI);
 
-private:
-/**
- * @param DLCI
- */
-void request(DLCI_t DLCI);
-    
-/**
- * @param DLCI
- */
-void indication(DLCI_t DLCI);
+    /**
+     * @param DLCI
+     */
+    void indication(DLCI_t DLCI);
 };
 
 #endif //_TS0710_DLC_RELEASE_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_FLOW.cpp b/module-cellular/Modem/TS0710/TS0710_FLOW.cpp
index 50216a6c0..030fe459d 100644
--- a/module-cellular/Modem/TS0710/TS0710_FLOW.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_FLOW.cpp
@@ -2,26 +2,22 @@
  * Project Untitled
  */
 
-
 #include "TS0710_FLOW.h"
 
 /**
  * TS0710_FLOW implementation
  */
 
+/**
+ * @param DLCI
+ * @param State
+ */
+void TS0710_FLOW::request(DLCI_t DLCI, State_e State)
+{}
 
 /**
  * @param DLCI
  * @param State
  */
-void TS0710_FLOW::request(DLCI_t DLCI, State_e State) {
-
-}
-
-/**
- * @param DLCI
- * @param State
- */
-void TS0710_FLOW::indication(DLCI_t DLCI, State_e State) {
-
-}
\ No newline at end of file
+void TS0710_FLOW::indication(DLCI_t DLCI, State_e State)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_FLOW.h b/module-cellular/Modem/TS0710/TS0710_FLOW.h
index eef8d41cb..8422f9bd0 100644
--- a/module-cellular/Modem/TS0710/TS0710_FLOW.h
+++ b/module-cellular/Modem/TS0710/TS0710_FLOW.h
@@ -2,32 +2,38 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_FLOW_H
 #define _TS0710_FLOW_H
 
 #include "TS0710.h"
-//control channel
+// control channel
 
-class TS0710_FLOW {
-public: 
-    enum State_e { enable, disable };
+class TS0710_FLOW
+{
+  public:
+    enum State_e
+    {
+        enable,
+        disable
+    };
 
-TS0710_FLOW() {}
-~TS0710_FLOW() {}
+    TS0710_FLOW()
+    {}
+    ~TS0710_FLOW()
+    {}
 
-private:
-/**
- * @param DLCI
- * @param State
- */
-void request(DLCI_t DLCI, State_e State);
-    
-/**
- * @param DLCI
- * @param State
- */
-void indication(DLCI_t DLCI, State_e State);
+  private:
+    /**
+     * @param DLCI
+     * @param State
+     */
+    void request(DLCI_t DLCI, State_e State);
+
+    /**
+     * @param DLCI
+     * @param State
+     */
+    void indication(DLCI_t DLCI, State_e State);
 };
 
 #endif //_TS0710_FLOW_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_Frame.h b/module-cellular/Modem/TS0710/TS0710_Frame.h
index cb3f32aea..071020c78 100644
--- a/module-cellular/Modem/TS0710/TS0710_Frame.h
+++ b/module-cellular/Modem/TS0710/TS0710_Frame.h
@@ -7,86 +7,89 @@
 #include <iostream>
 #include "log/log.hpp"
 
-#define TS0710_FLAG 0xF9
-#define TS0710_FRAME_HDR_LEN    6   //without extended address byte
+#define TS0710_FLAG          0xF9
+#define TS0710_FRAME_HDR_LEN 6 // without extended address byte
 
 using namespace std;
 
-class TS0710_Frame {
-private:
-    static constexpr unsigned char crctable[256] = { //reversed, 8-bit, poly=0x07
-0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
-0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
-0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
-0x24, 0xB5, 0xC7, 0x56, 0x23, 0xB2, 0xC0, 0x51, 0x2A, 0xBB, 0xC9, 0x58, 0x2D, 0xBC, 0xCE, 0x5F,
-0x70, 0xE1, 0x93, 0x02, 0x77, 0xE6, 0x94, 0x05, 0x7E, 0xEF, 0x9D, 0x0C, 0x79, 0xE8, 0x9A, 0x0B,
-0x6C, 0xFD, 0x8F, 0x1E, 0x6B, 0xFA, 0x88, 0x19, 0x62, 0xF3, 0x81, 0x10, 0x65, 0xF4, 0x86, 0x17,
-0x48, 0xD9, 0xAB, 0x3A, 0x4F, 0xDE, 0xAC, 0x3D, 0x46, 0xD7, 0xA5, 0x34, 0x41, 0xD0, 0xA2, 0x33,
-0x54, 0xC5, 0xB7, 0x26, 0x53, 0xC2, 0xB0, 0x21, 0x5A, 0xCB, 0xB9, 0x28, 0x5D, 0xCC, 0xBE, 0x2F,
-0xE0, 0x71, 0x03, 0x92, 0xE7, 0x76, 0x04, 0x95, 0xEE, 0x7F, 0x0D, 0x9C, 0xE9, 0x78, 0x0A, 0x9B,
-0xFC, 0x6D, 0x1F, 0x8E, 0xFB, 0x6A, 0x18, 0x89, 0xF2, 0x63, 0x11, 0x80, 0xF5, 0x64, 0x16, 0x87,
-0xD8, 0x49, 0x3B, 0xAA, 0xDF, 0x4E, 0x3C, 0xAD, 0xD6, 0x47, 0x35, 0xA4, 0xD1, 0x40, 0x32, 0xA3,
-0xC4, 0x55, 0x27, 0xB6, 0xC3, 0x52, 0x20, 0xB1, 0xCA, 0x5B, 0x29, 0xB8, 0xCD, 0x5C, 0x2E, 0xBF,
-0x90, 0x01, 0x73, 0xE2, 0x97, 0x06, 0x74, 0xE5, 0x9E, 0x0F, 0x7D, 0xEC, 0x99, 0x08, 0x7A, 0xEB,
-0x8C, 0x1D, 0x6F, 0xFE, 0x8B, 0x1A, 0x68, 0xF9, 0x82, 0x13, 0x61, 0xF0, 0x85, 0x14, 0x66, 0xF7,
-0xA8, 0x39, 0x4B, 0xDA, 0xAF, 0x3E, 0x4C, 0xDD, 0xA6, 0x37, 0x45, 0xD4, 0xA1, 0x30, 0x42, 0xD3,
-0xB4, 0x25, 0x57, 0xC6, 0xB3, 0x22, 0x50, 0xC1, 0xBA, 0x2B, 0x59, 0xC8, 0xBD, 0x2C, 0x5E, 0xCF
-};
+class TS0710_Frame
+{
+  private:
+    static constexpr unsigned char crctable[256] = { // reversed, 8-bit, poly=0x07
+        0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B, 0x1C, 0x8D,
+        0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67, 0x38, 0xA9, 0xDB, 0x4A,
+        0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43, 0x24, 0xB5, 0xC7, 0x56, 0x23, 0xB2,
+        0xC0, 0x51, 0x2A, 0xBB, 0xC9, 0x58, 0x2D, 0xBC, 0xCE, 0x5F, 0x70, 0xE1, 0x93, 0x02, 0x77, 0xE6, 0x94, 0x05,
+        0x7E, 0xEF, 0x9D, 0x0C, 0x79, 0xE8, 0x9A, 0x0B, 0x6C, 0xFD, 0x8F, 0x1E, 0x6B, 0xFA, 0x88, 0x19, 0x62, 0xF3,
+        0x81, 0x10, 0x65, 0xF4, 0x86, 0x17, 0x48, 0xD9, 0xAB, 0x3A, 0x4F, 0xDE, 0xAC, 0x3D, 0x46, 0xD7, 0xA5, 0x34,
+        0x41, 0xD0, 0xA2, 0x33, 0x54, 0xC5, 0xB7, 0x26, 0x53, 0xC2, 0xB0, 0x21, 0x5A, 0xCB, 0xB9, 0x28, 0x5D, 0xCC,
+        0xBE, 0x2F, 0xE0, 0x71, 0x03, 0x92, 0xE7, 0x76, 0x04, 0x95, 0xEE, 0x7F, 0x0D, 0x9C, 0xE9, 0x78, 0x0A, 0x9B,
+        0xFC, 0x6D, 0x1F, 0x8E, 0xFB, 0x6A, 0x18, 0x89, 0xF2, 0x63, 0x11, 0x80, 0xF5, 0x64, 0x16, 0x87, 0xD8, 0x49,
+        0x3B, 0xAA, 0xDF, 0x4E, 0x3C, 0xAD, 0xD6, 0x47, 0x35, 0xA4, 0xD1, 0x40, 0x32, 0xA3, 0xC4, 0x55, 0x27, 0xB6,
+        0xC3, 0x52, 0x20, 0xB1, 0xCA, 0x5B, 0x29, 0xB8, 0xCD, 0x5C, 0x2E, 0xBF, 0x90, 0x01, 0x73, 0xE2, 0x97, 0x06,
+        0x74, 0xE5, 0x9E, 0x0F, 0x7D, 0xEC, 0x99, 0x08, 0x7A, 0xEB, 0x8C, 0x1D, 0x6F, 0xFE, 0x8B, 0x1A, 0x68, 0xF9,
+        0x82, 0x13, 0x61, 0xF0, 0x85, 0x14, 0x66, 0xF7, 0xA8, 0x39, 0x4B, 0xDA, 0xAF, 0x3E, 0x4C, 0xDD, 0xA6, 0x37,
+        0x45, 0xD4, 0xA1, 0x30, 0x42, 0xD3, 0xB4, 0x25, 0x57, 0xC6, 0xB3, 0x22, 0x50, 0xC1, 0xBA, 0x2B, 0x59, 0xC8,
+        0xBD, 0x2C, 0x5E, 0xCF};
 
-public:
-    struct frame_t {
+  public:
+    struct frame_t
+    {
         uint8_t Address;
         uint8_t Control;
         std::vector<uint8_t> data;
-        
-        std::vector<uint8_t> serialize() {
+
+        std::vector<uint8_t> serialize()
+        {
             std::vector<uint8_t> ret;
             ret.push_back(TS0710_FLAG);
-            ret.push_back(Address | 0x01);  //add EA = 1
+            ret.push_back(Address | 0x01); // add EA = 1
             ret.push_back(Control);
             uint16_t Length = static_cast<uint16_t>(data.size());
             if (Length > 127) {
-                Length <<= 1;       //shift data to extend for E/A bit
-                Length &= ~0x0001;   //add E/A bit = 0 indicating long length
+                Length <<= 1;      // shift data to extend for E/A bit
+                Length &= ~0x0001; // add E/A bit = 0 indicating long length
                 ret.push_back(static_cast<uint8_t>(Length & 0x00FF));
                 ret.push_back(static_cast<uint8_t>((Length >> 8) & 0x00FF));
             }
             else {
-                Length <<= 1;       //shift data to extend for E/A bit
-                Length |= 0x0001;   //add E/A bit = 1 indicating short length
+                Length <<= 1;     // shift data to extend for E/A bit
+                Length |= 0x0001; // add E/A bit = 1 indicating short length
                 ret.push_back(static_cast<uint8_t>(Length & 0x00FF));
             }
-            ret.insert(ret.end(), data.begin(), data.end());    //add data
+            ret.insert(ret.end(), data.begin(), data.end()); // add data
             /*Calculate FCS*/
-            unsigned char FCS=0xFF;
+            unsigned char FCS = 0xFF;
             unsigned char len = ret.size() - 1;
-            unsigned char i = 1;
+            unsigned char i   = 1;
             if (Control == static_cast<uint8_t>(TypeOfFrame_e::UIH)) {
-                len = 3;  //par. 5.3.6 of GSM0710 document states that for UIH frames, the FCS shall be calculated over only the address, control and length fields TODO: include 2-byte address
+                len = 3; // par. 5.3.6 of GSM0710 document states that for UIH frames, the FCS shall be calculated over
+                         // only the address, control and length fields TODO: include 2-byte address
                 // if (Length > 127)
                 //     len += 1;
             }
             /*len is the number of bytes in the message, p points to message*/
             while (len--) {
-                FCS=crctable[FCS^ret.at(i++)];
+                FCS = crctable[FCS ^ ret.at(i++)];
             }
             /*Ones complement*/
-            FCS=0xFF-FCS;
+            FCS = 0xFF - FCS;
             ret.push_back(FCS);
             ret.push_back(TS0710_FLAG);
 
             return ret;
         }
 
-        void deserialize(const std::vector<uint8_t> &serData) {
+        void deserialize(const std::vector<uint8_t> &serData)
+        {
             if (serData.size() < 4) {
                 LOG_ERROR("Trying to deserialize empty frame");
                 Address = 0;
                 Control = 0;
                 return;
             }
-            //iterate through frame to get correct trailing flag. In case multiple-frame stream provided
-            bool myFrame = false;
+            // iterate through frame to get correct trailing flag. In case multiple-frame stream provided
+            bool myFrame  = false;
             ssize_t myLen = 0;
             for (uint8_t c : serData) {
                 myLen++;
@@ -99,113 +102,135 @@ public:
                 }
             }
 
-            if ((serData[0] != TS0710_FLAG) || (serData.at(myLen-1) != TS0710_FLAG)) {
+            if ((serData[0] != TS0710_FLAG) || (serData.at(myLen - 1) != TS0710_FLAG)) {
                 Address = 0;
                 Control = 0;
                 LOG_ERROR("Received frame has incorrect leading/trailing flags. Dropping.");
-                return; //return empty frame. Discard frame witout proper leading & trailing flag
+                return; // return empty frame. Discard frame witout proper leading & trailing flag
             }
 
             Address = serData[1];
             Control = serData[2] & ~(1 << 4);
             int Length;
-            if (serData[3] & 0x01) {  //short length
+            if (serData[3] & 0x01) { // short length
                 Length = static_cast<uint16_t>(serData[3] >> 1);
             }
-            else {  //long length
+            else { // long length
                 Length = static_cast<uint16_t>(serData[3] >> 1) + (static_cast<uint16_t>(serData[3]) << 7);
             }
-            if (serData[3] == 0xFF)   //ugly hack for Quectel misimplementation of the standard
+            if (serData[3] == 0xFF) // ugly hack for Quectel misimplementation of the standard
                 Length = myLen - 6;
-            //LOG_DEBUG("[Frame] %s Addr: 0x%02X, Ctrl: 0x%02X, Len: %i", TypeOfFrame_text[static_cast<TypeOfFrame_e>(Control)].c_str(), Address, Control, Length);
+            // LOG_DEBUG("[Frame] %s Addr: 0x%02X, Ctrl: 0x%02X, Len: %i",
+            // TypeOfFrame_text[static_cast<TypeOfFrame_e>(Control)].c_str(), Address, Control, Length);
             data.clear();
-            data.insert(data.begin(), serData.begin() + 4, serData.begin() + 4 + Length);   //get data - amount of data determined by Length value
+            data.insert(data.begin(),
+                        serData.begin() + 4,
+                        serData.begin() + 4 + Length); // get data - amount of data determined by Length value
 
-            //check FCS
+            // check FCS
             /*Calculate FCS*/
-            unsigned char FCS=0xFF;
+            unsigned char FCS = 0xFF;
             unsigned char len = myLen - 2;
-            unsigned char i = 1;
+            unsigned char i   = 1;
             if (Control == static_cast<uint8_t>(TypeOfFrame_e::UIH)) {
-                len = 3;  //par. 5.3.6 of GSM0710 document states that for UIH frames, the FCS shall be calculated over only the address, control and length fields: include 2-byte address
+                len = 3; // par. 5.3.6 of GSM0710 document states that for UIH frames, the FCS shall be calculated over
+                         // only the address, control and length fields: include 2-byte address
                 // if (Length > 127)
                 //     len += 1;
             }
             /*len is the number of bytes in the message, p points to message*/
             while (len--) {
-                FCS=crctable[FCS^serData[i++]];
+                FCS = crctable[FCS ^ serData[i++]];
             }
             if (Control == static_cast<uint8_t>(TypeOfFrame_e::UIH))
-                FCS=crctable[FCS^serData[myLen - 2]];
+                FCS = crctable[FCS ^ serData[myLen - 2]];
 
-            if ((FCS != 0xCF) && (serData[3] != 0xFF) && (Control != static_cast<uint8_t>(TypeOfFrame_e::UA))) {  //error - but fuck FCS check if it's faulty Quectel UIH frame or UA frame
+            if ((FCS != 0xCF) && (serData[3] != 0xFF) &&
+                (Control !=
+                 static_cast<uint8_t>(
+                     TypeOfFrame_e::UA))) { // error - but fuck FCS check if it's faulty Quectel UIH frame or UA frame
                 Address = 0;
                 Control = 0;
                 data.clear();
                 LOG_ERROR("Received frame FCS [0x%02X] != 0xCF error. Dropping.", FCS);
-                return; //return empty frame. Discard frame witout proper leading & trailing flag
+                return; // return empty frame. Discard frame witout proper leading & trailing flag
             }
         }
     };
 
-private:
+  private:
     frame_t pv_frame;
     std::vector<uint8_t> pv_serData;
 
-public:
-    TS0710_Frame(frame_t frame) {
-        //LOG_DEBUG("Serializing given frame");
+  public:
+    TS0710_Frame(frame_t frame)
+    {
+        // LOG_DEBUG("Serializing given frame");
         pv_serData = frame.serialize();
-        pv_frame = frame;
+        pv_frame   = frame;
     }
-    TS0710_Frame(std::vector<uint8_t> &serData) {
-        //LOG_DEBUG("Deserializing serData");
+    TS0710_Frame(std::vector<uint8_t> &serData)
+    {
+        // LOG_DEBUG("Deserializing serData");
         pv_frame.deserialize(serData);
         pv_serData = serData;
     }
-    TS0710_Frame() {
+    TS0710_Frame()
+    {
         LOG_DEBUG("Deserializing pv_serData");
         pv_frame.deserialize(pv_serData);
     }
-    ~TS0710_Frame() {
+    ~TS0710_Frame()
+    {
         pv_serData.clear();
         pv_frame.data.clear();
     }
 
-    frame_t getFrame() { return pv_frame; }
-    std::vector<uint8_t> getSerData() { return pv_serData; }
+    frame_t getFrame()
+    {
+        return pv_frame;
+    }
+    std::vector<uint8_t> getSerData()
+    {
+        return pv_serData;
+    }
 
     /* F9 03 3F 01 1C F9 */
-    static bool isComplete(const std::vector<uint8_t> &serData) {
+    static bool isComplete(const std::vector<uint8_t> &serData)
+    {
         if (serData.size() < 4)
-            return false;   //check if buffer has enough data to get length
+            return false; // check if buffer has enough data to get length
 
-        if ((serData[0] != TS0710_FLAG) || (serData[serData.size()-1] != TS0710_FLAG))
+        if ((serData[0] != TS0710_FLAG) || (serData[serData.size() - 1] != TS0710_FLAG))
             return false;
 
         int Length = 0;
-        if (serData[3] & 0x01){ //short length
+        if (serData[3] & 0x01) { // short length
             Length = static_cast<uint16_t>(serData[3] >> 1);
         }
-        else if (serData.size() > 4){ //long length - another check if enough bytes in buffer
+        else if (serData.size() > 4) { // long length - another check if enough bytes in buffer
             Length = static_cast<uint16_t>(serData[3] >> 1) + (static_cast<uint16_t>(serData[4]) << 7);
         }
         else
             return false;
 
-        if (serData.size() >= static_cast<size_t>(TS0710_FRAME_HDR_LEN + Length + (serData[3] & 0x01 ? 0 : 1)))   //include extended address byte if present
+        if (serData.size() >=
+            static_cast<size_t>(TS0710_FRAME_HDR_LEN + Length +
+                                (serData[3] & 0x01 ? 0 : 1))) // include extended address byte if present
             return true;
 
         return false;
     }
 
-    static bool isMyChannel(const std::vector<uint8_t> &serData, DLCI_t DLCI) {
+    static bool isMyChannel(const std::vector<uint8_t> &serData, DLCI_t DLCI)
+    {
         if ((serData.size() > 1) && ((serData[1] >> 2) == DLCI))
             return true;
         return false;
     }
 
-    static DLCI_t getFrameDLCI(const std::vector<uint8_t> &serData) {
+    static DLCI_t getFrameDLCI(const std::vector<uint8_t> &serData)
+    {
         if (serData.size() > 1)
             return (serData[1] >> 2);
         return -1;
diff --git a/module-cellular/Modem/TS0710/TS0710_PARNEG.cpp b/module-cellular/Modem/TS0710/TS0710_PARNEG.cpp
index c575165c3..ede7f9e9d 100644
--- a/module-cellular/Modem/TS0710/TS0710_PARNEG.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_PARNEG.cpp
@@ -2,44 +2,38 @@
  * Project Untitled
  */
 
-
 #include "TS0710_PARNEG.h"
 
 /**
  * TS0710_PARNEG implementation
  */
 
+/**
+ * @param DLC
+ * @param DLC_parameters
+ */
+void TS0710_PARNEG::request(DLCI_t DLC, DLCParameters_t DLC_parameters)
+{}
 
 /**
  * @param DLC
  * @param DLC_parameters
  */
-void TS0710_PARNEG::request(DLCI_t DLC, DLCParameters_t DLC_parameters) {
-
-}
-
-/**
- * @param DLC
- * @param DLC_parameters
- */
-void TS0710_PARNEG::indication(DLCI_t DLC, DLCParameters_t DLC_parameters) {
-
-}
+void TS0710_PARNEG::indication(DLCI_t DLC, DLCParameters_t DLC_parameters)
+{}
 
 /**
  * @param DLC
  * @param DLC_parameters
  * @param accept
  */
-void TS0710_PARNEG::response(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept) {
-
-}
+void TS0710_PARNEG::response(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept)
+{}
 
 /**
  * @param DLC
  * @param DLC_parameters
  * @param accept
  */
-void TS0710_PARNEG::confirm(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept) {
-
-}
\ No newline at end of file
+void TS0710_PARNEG::confirm(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_PARNEG.h b/module-cellular/Modem/TS0710/TS0710_PARNEG.h
index 719129b2d..2964e1529 100644
--- a/module-cellular/Modem/TS0710/TS0710_PARNEG.h
+++ b/module-cellular/Modem/TS0710/TS0710_PARNEG.h
@@ -5,57 +5,60 @@
  * response witch is forwarded as an confirmation to the originating port emulating entity.
  */
 
-
 #ifndef _TS0710_PARNEG_H
 #define _TS0710_PARNEG_H
 
 #include "TS0710.h"
-//control channel - DLC parameter negotiation (PN)
+// control channel - DLC parameter negotiation (PN)
 
-class TS0710_PARNEG {
-public: 
+class TS0710_PARNEG
+{
+  public:
+    struct DLCParameters_t
+    {
+        TypeOfFrame_e TypeOfFrame; //!< Type of frame [UIH | UI | I, default: UIH]
+        int ConvergenceLayer;      //!< Convergence layer [1 - 4, default: 1]
+        int Priority;              //!< Priority [0-63], default according to table in subclause 5.6
+        int AckTime;               //!< Acknowledgement Timer [10 ms - 25.5 sec, deault: 100 ms]
+        int MaxFrameSize; //!< Maximum Frame Size [1 – 32768, default: 31 for the basic option and 64 for the advanced
+                          //!< option]
+        int MaxNumOfRetransmissions; //!< Maximum number of retransmissions [0 – 100, default : 3]
+        int MuxCtrlRespTime;    //!< Response timer for the multiplexor control channel [0,01s-2,55s, default: 0,3s]
+        int WakeUpRespTime;     //!< Wake up response timer [1s – 255s, default 10s]
+        int ErrRecovWindowSize; //!< Window size for error recovery mode [1 – 7, default : 2]
+    };
 
-struct DLCParameters_t {
-    TypeOfFrame_e TypeOfFrame;      //!< Type of frame [UIH | UI | I, default: UIH]
-    int ConvergenceLayer;           //!< Convergence layer [1 - 4, default: 1]
-    int Priority;                   //!< Priority [0-63], default according to table in subclause 5.6
-    int AckTime;                    //!< Acknowledgement Timer [10 ms - 25.5 sec, deault: 100 ms]
-    int MaxFrameSize;               //!< Maximum Frame Size [1 – 32768, default: 31 for the basic option and 64 for the advanced option]
-    int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0 – 100, default : 3]
-    int MuxCtrlRespTime;            //!< Response timer for the multiplexor control channel [0,01s-2,55s, default: 0,3s]
-    int WakeUpRespTime;             //!< Wake up response timer [1s – 255s, default 10s]
-    int ErrRecovWindowSize;         //!< Window size for error recovery mode [1 – 7, default : 2]
-};
+    TS0710_PARNEG()
+    {}
+    ~TS0710_PARNEG()
+    {}
 
-TS0710_PARNEG() {}
-~TS0710_PARNEG() {}
+  private:
+    /**
+     * @param DLC
+     * @param DLC_parameters
+     */
+    void request(DLCI_t DLC, DLCParameters_t DLC_parameters);
 
-private:
-/**
- * @param DLC
- * @param DLC_parameters
- */
-void request(DLCI_t DLC, DLCParameters_t DLC_parameters);
-    
-/**
- * @param DLC
- * @param DLC_parameters
- */
-void indication(DLCI_t DLC, DLCParameters_t DLC_parameters);
-    
-/**
- * @param DLC
- * @param DLC_parameters
- * @param accept
- */
-void response(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept);
-    
-/**
- * @param DLC
- * @param DLC_parameters
- * @param accept
- */
-void confirm(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept);
+    /**
+     * @param DLC
+     * @param DLC_parameters
+     */
+    void indication(DLCI_t DLC, DLCParameters_t DLC_parameters);
+
+    /**
+     * @param DLC
+     * @param DLC_parameters
+     * @param accept
+     */
+    void response(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept);
+
+    /**
+     * @param DLC
+     * @param DLC_parameters
+     * @param accept
+     */
+    void confirm(DLCI_t DLC, DLCParameters_t DLC_parameters, bool accept);
 };
 
 #endif //_TS0710_PARNEG_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_PORTNEG.cpp b/module-cellular/Modem/TS0710/TS0710_PORTNEG.cpp
index 2d6b4dcb0..5587853bb 100644
--- a/module-cellular/Modem/TS0710/TS0710_PORTNEG.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_PORTNEG.cpp
@@ -2,60 +2,52 @@
  * Project Untitled
  */
 
-
 #include "TS0710_PORTNEG.h"
 
 /**
  * TS0710_PORTNEG implementation
  */
 
+/**
+ * @param DLC
+ * @param Port_parameters
+ */
+void TS0710_PORTNEG::request(DLCI_t DLC, PortParameters_t Port_parameters)
+{}
 
 /**
  * @param DLC
  * @param Port_parameters
  */
-void TS0710_PORTNEG::request(DLCI_t DLC, PortParameters_t Port_parameters) {
-
-}
-
-/**
- * @param DLC
- * @param Port_parameters
- */
-void TS0710_PORTNEG::indication(DLCI_t DLC, PortParameters_t Port_parameters) {
-
-}
+void TS0710_PORTNEG::indication(DLCI_t DLC, PortParameters_t Port_parameters)
+{}
 
 /**
  * @param DLC
  * @param Port_parameters
  * @param accept
  */
-void TS0710_PORTNEG::response(DLCI_t DLC, PortParameters_t Port_parameters, bool accept) {
-
-}
+void TS0710_PORTNEG::response(DLCI_t DLC, PortParameters_t Port_parameters, bool accept)
+{}
 
 /**
  * @param DLC
  * @param Port_parameters
  * @param accept
  */
-void TS0710_PORTNEG::confirm(DLCI_t DLC, PortParameters_t Port_parameters, bool accept) {
-
-}
+void TS0710_PORTNEG::confirm(DLCI_t DLC, PortParameters_t Port_parameters, bool accept)
+{}
 
 /**
  * @param DLC
  * @param LineStatusParameter
  */
-void TS0710_PORTNEG::request(DLCI_t DLC, LineStatusParameter_e LineStatusParameter) {
-
-}
+void TS0710_PORTNEG::request(DLCI_t DLC, LineStatusParameter_e LineStatusParameter)
+{}
 
 /**
  * @param DLC
  * @param LineStatusParameter
  */
-void TS0710_PORTNEG::indication(DLCI_t DLC, LineStatusParameter_e LineStatusParameter) {
-
-}
\ No newline at end of file
+void TS0710_PORTNEG::indication(DLCI_t DLC, LineStatusParameter_e LineStatusParameter)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_PORTNEG.h b/module-cellular/Modem/TS0710/TS0710_PORTNEG.h
index 55c487ef3..0e4970d7a 100644
--- a/module-cellular/Modem/TS0710/TS0710_PORTNEG.h
+++ b/module-cellular/Modem/TS0710/TS0710_PORTNEG.h
@@ -1,29 +1,67 @@
 /**
  * Project Untitled
  * @brief The request primitive is used to request that the remote port changes its parameters. The indication is sent
- * to the other port emulation entity. The remote port emulation entity replies with a response. A confirm is sent to the
- * originating port entity.
+ * to the other port emulation entity. The remote port emulation entity replies with a response. A confirm is sent to
+ * the originating port entity.
  */
 
-
 #ifndef _TS0710_PORTNEG_H
 #define _TS0710_PORTNEG_H
 
 #include "TS0710_types.h"
 
-//control channel - Remote Port Negotiation Command (RPN)
-//control channel - Remote Line Status Command(RLS)
+// control channel - Remote Port Negotiation Command (RPN)
+// control channel - Remote Line Status Command(RLS)
 
-class TS0710_PORTNEG {
-public: 
-    enum DataBits_e { DB5, DB6, DB7, DB8 };
-    enum PortSpeed_e { PS2400, PS4800, PS7200, PS9600, PS19200, PS38400, PS57600, PS115200, PS230400 }; 
-    enum Parity_e { NoParity, Parity };
-    enum ParityType_e { odd, even, mark, space };
-    enum StopBits_e { SB1, SB15 }; 
-    enum LineStatusParameter_e { NoErrors, OverrunErr, ParityErr, FramingErr }; //!< Port speed [no errors, overrun error, parity error, framing error]
+class TS0710_PORTNEG
+{
+  public:
+    enum DataBits_e
+    {
+        DB5,
+        DB6,
+        DB7,
+        DB8
+    };
+    enum PortSpeed_e
+    {
+        PS2400,
+        PS4800,
+        PS7200,
+        PS9600,
+        PS19200,
+        PS38400,
+        PS57600,
+        PS115200,
+        PS230400
+    };
+    enum Parity_e
+    {
+        NoParity,
+        Parity
+    };
+    enum ParityType_e
+    {
+        odd,
+        even,
+        mark,
+        space
+    };
+    enum StopBits_e
+    {
+        SB1,
+        SB15
+    };
+    enum LineStatusParameter_e
+    {
+        NoErrors,
+        OverrunErr,
+        ParityErr,
+        FramingErr
+    }; //!< Port speed [no errors, overrun error, parity error, framing error]
 
-    struct PortParameters_t {
+    struct PortParameters_t
+    {
         PortSpeed_e PortSpeed;
         DataBits_e DataBits;
         StopBits_e StopBits;
@@ -31,47 +69,49 @@ public:
         ParityType_e ParityType;
     };
 
-TS0710_PORTNEG() {}
-~TS0710_PORTNEG() {}
+    TS0710_PORTNEG()
+    {}
+    ~TS0710_PORTNEG()
+    {}
 
-private:
-/**
- * @param DLC
- * @param Port_parameters
- */
-void request(DLCI_t DLC, PortParameters_t Port_parameters);
-    
-/**
- * @param DLC
- * @param Port_parameters
- */
-void indication(DLCI_t DLC, PortParameters_t Port_parameters);
-    
-/**
- * @param DLC
- * @param Port_parameters
- * @param accept
- */
-void response(DLCI_t DLC, PortParameters_t Port_parameters, bool accept);
-    
-/**
- * @param DLC
- * @param Port_parameters
- * @param accept
- */
-void confirm(DLCI_t DLC, PortParameters_t Port_parameters, bool accept);
-    
-/**
- * @param DLC
- * @param LineStatusParameter
- */
-void request(DLCI_t DLC, LineStatusParameter_e LineStatusParameter);
-    
-/**
- * @param DLC
- * @param LineStatusParameter
- */
-void indication(DLCI_t DLC, LineStatusParameter_e LineStatusParameter);
+  private:
+    /**
+     * @param DLC
+     * @param Port_parameters
+     */
+    void request(DLCI_t DLC, PortParameters_t Port_parameters);
+
+    /**
+     * @param DLC
+     * @param Port_parameters
+     */
+    void indication(DLCI_t DLC, PortParameters_t Port_parameters);
+
+    /**
+     * @param DLC
+     * @param Port_parameters
+     * @param accept
+     */
+    void response(DLCI_t DLC, PortParameters_t Port_parameters, bool accept);
+
+    /**
+     * @param DLC
+     * @param Port_parameters
+     * @param accept
+     */
+    void confirm(DLCI_t DLC, PortParameters_t Port_parameters, bool accept);
+
+    /**
+     * @param DLC
+     * @param LineStatusParameter
+     */
+    void request(DLCI_t DLC, LineStatusParameter_e LineStatusParameter);
+
+    /**
+     * @param DLC
+     * @param LineStatusParameter
+     */
+    void indication(DLCI_t DLC, LineStatusParameter_e LineStatusParameter);
 };
 
 #endif //_TS0710_PORTNEG_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_SERVNEG.cpp b/module-cellular/Modem/TS0710/TS0710_SERVNEG.cpp
index db0eca41e..965ef0a65 100644
--- a/module-cellular/Modem/TS0710/TS0710_SERVNEG.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_SERVNEG.cpp
@@ -2,44 +2,38 @@
  * Project Untitled
  */
 
-
 #include "TS0710_SERVNEG.h"
 
 /**
  * TS0710_SERVNEG implementation
  */
 
+/**
+ * @param DLC
+ * @param Service_parameters
+ */
+void TS0710_SERVNEG::request(DLCI_t DLC, ServiceParameters_t Service_parameters)
+{}
 
 /**
  * @param DLC
  * @param Service_parameters
  */
-void TS0710_SERVNEG::request(DLCI_t DLC, ServiceParameters_t Service_parameters) {
-
-}
-
-/**
- * @param DLC
- * @param Service_parameters
- */
-void TS0710_SERVNEG::indication(DLCI_t DLC, ServiceParameters_t Service_parameters) {
-
-}
+void TS0710_SERVNEG::indication(DLCI_t DLC, ServiceParameters_t Service_parameters)
+{}
 
 /**
  * @param DLC
  * @param Service_parameters
  * @param accept
  */
-void TS0710_SERVNEG::response(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept) {
-
-}
+void TS0710_SERVNEG::response(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept)
+{}
 
 /**
  * @param DLC
  * @param Service_parameters
  * @param accept
  */
-void TS0710_SERVNEG::confirm(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept) {
-
-}
\ No newline at end of file
+void TS0710_SERVNEG::confirm(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_SERVNEG.h b/module-cellular/Modem/TS0710/TS0710_SERVNEG.h
index 48d565983..e57dba2a2 100644
--- a/module-cellular/Modem/TS0710/TS0710_SERVNEG.h
+++ b/module-cellular/Modem/TS0710/TS0710_SERVNEG.h
@@ -2,52 +2,69 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_SERVNEG_H
 #define _TS0710_SERVNEG_H
 
 #include "TS0710_types.h"
 
-//control channel - Service Negotiation Command (SNC)
+// control channel - Service Negotiation Command (SNC)
 
-class TS0710_SERVNEG {
-public: 
-    enum Service_e { data, voice, reserved1, reserved2 }; 
-    enum VoiceCodec_e { GSM0621, PCM64k, ADPCM32k, CodedHalfRate, PCM128k, reserved };
-    struct ServiceParameters_t {
+class TS0710_SERVNEG
+{
+  public:
+    enum Service_e
+    {
+        data,
+        voice,
+        reserved1,
+        reserved2
+    };
+    enum VoiceCodec_e
+    {
+        GSM0621,
+        PCM64k,
+        ADPCM32k,
+        CodedHalfRate,
+        PCM128k,
+        reserved
+    };
+    struct ServiceParameters_t
+    {
         Service_e Service;
         VoiceCodec_e VoiceCodec;
     };
 
-TS0710_SERVNEG() {}
-~TS0710_SERVNEG() {}
+    TS0710_SERVNEG()
+    {}
+    ~TS0710_SERVNEG()
+    {}
 
-private:
-/**
- * @param DLC
- * @param Service_parameters
- */
-void request(DLCI_t DLC, ServiceParameters_t Service_parameters);
-    
-/**
- * @param DLC
- * @param Service_parameters
- */
-void indication(DLCI_t DLC, ServiceParameters_t Service_parameters);
-    
-/**
- * @param DLC
- * @param Service_parameters
- * @param accept
- */
-void response(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept);
-    
-/**
- * @param DLC
- * @param Service_parameters
- * @param accept
- */
-void confirm(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept);
+  private:
+    /**
+     * @param DLC
+     * @param Service_parameters
+     */
+    void request(DLCI_t DLC, ServiceParameters_t Service_parameters);
+
+    /**
+     * @param DLC
+     * @param Service_parameters
+     */
+    void indication(DLCI_t DLC, ServiceParameters_t Service_parameters);
+
+    /**
+     * @param DLC
+     * @param Service_parameters
+     * @param accept
+     */
+    void response(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept);
+
+    /**
+     * @param DLC
+     * @param Service_parameters
+     * @param accept
+     */
+    void confirm(DLCI_t DLC, ServiceParameters_t Service_parameters, bool accept);
 };
 
 #endif //_TS0710_SERVNEG_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_SLEEP.cpp b/module-cellular/Modem/TS0710/TS0710_SLEEP.cpp
index 96d73cfe7..5b25d36d2 100644
--- a/module-cellular/Modem/TS0710/TS0710_SLEEP.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_SLEEP.cpp
@@ -2,22 +2,17 @@
  * Project Untitled
  */
 
-
 #include "TS0710_SLEEP.h"
 
 /**
  * TS0710_SLEEP implementation
  */
 
+void TS0710_SLEEP::request()
+{}
 
-void TS0710_SLEEP::request() {
+void TS0710_SLEEP::indication()
+{}
 
-}
-
-void TS0710_SLEEP::indication() {
-
-}
-
-void TS0710_SLEEP::confirm() {
-
-}
\ No newline at end of file
+void TS0710_SLEEP::confirm()
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_SLEEP.h b/module-cellular/Modem/TS0710/TS0710_SLEEP.h
index d2600287b..a425a674c 100644
--- a/module-cellular/Modem/TS0710/TS0710_SLEEP.h
+++ b/module-cellular/Modem/TS0710/TS0710_SLEEP.h
@@ -1,30 +1,31 @@
 /**
  * Project Untitled
  * @brief The request primitive is used to advice the receiving device that the transmitter wishes to enter a low
- * power state. The TS 0710 layer of the receiving unit sends an indication primitive to the upper layer in order to inform
- * that the transmitting unit has entered the power saving state. The TS 0710 layer will automatically transmit an
- * acknowledge message to the transmitting device, thus no response primitive is required. The confirm primitive is sent to
- * the upper layer of the transmitting device when the low power request has been received, and indicates that the TS 0710
- * layer has entered the low power mode. Note that the Receiving device is not required to enter a low power mode, but it
- * will be considered to have done so by the TS 07.10 layer.
+ * power state. The TS 0710 layer of the receiving unit sends an indication primitive to the upper layer in order to
+ * inform that the transmitting unit has entered the power saving state. The TS 0710 layer will automatically transmit
+ * an acknowledge message to the transmitting device, thus no response primitive is required. The confirm primitive is
+ * sent to the upper layer of the transmitting device when the low power request has been received, and indicates that
+ * the TS 0710 layer has entered the low power mode. Note that the Receiving device is not required to enter a low power
+ * mode, but it will be considered to have done so by the TS 07.10 layer.
  */
 
-
 #ifndef _TS0710_SLEEP_H
 #define _TS0710_SLEEP_H
 
-class TS0710_SLEEP {
-public: 
+class TS0710_SLEEP
+{
+  public:
+    TS0710_SLEEP()
+    {}
+    ~TS0710_SLEEP()
+    {}
 
-TS0710_SLEEP() {}
-~TS0710_SLEEP() {}
+  private:
+    void request();
 
-private:
-void request();
-    
-void indication();
-    
-void confirm();
+    void indication();
+
+    void confirm();
 };
 
 #endif //_TS0710_SLEEP_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_START.cpp b/module-cellular/Modem/TS0710/TS0710_START.cpp
index 5f6fb45fd..d1525770f 100644
--- a/module-cellular/Modem/TS0710/TS0710_START.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_START.cpp
@@ -2,7 +2,6 @@
  * Project Untitled
  */
 
-
 #include "TS0710_START.h"
 #include "DLC_channel.h"
 #include "log/log.hpp"
@@ -11,38 +10,34 @@
  * TS0710_START implementation
  */
 
-TS0710_START::TS0710_START(Mode_e mode, START_SystemParameters_t system_parameters, bsp::Cellular *cellular) {
-    pv_mode = mode;
+TS0710_START::TS0710_START(Mode_e mode, START_SystemParameters_t system_parameters, bsp::Cellular *cellular)
+{
+    pv_mode              = mode;
     pv_system_parameters = system_parameters;
-    pv_cellular = cellular;
-    
-    //assemble frame, send request, report connection status
+    pv_cellular          = cellular;
+
+    // assemble frame, send request, report connection status
     request(pv_mode, pv_system_parameters);
 }
 
-TS0710_START::~TS0710_START() {
-
-}
+TS0710_START::~TS0710_START()
+{}
 
 /**
  * @param mode
  * @param system_parameters
  */
-void TS0710_START::request(Mode_e mode, START_SystemParameters_t system_parameters) {
+void TS0710_START::request(Mode_e mode, START_SystemParameters_t system_parameters)
+{
     static char buf[256];
-    //1. start CMUX by AT command AT+CMUX=...(with given parameters) & get response
+    // 1. start CMUX by AT command AT+CMUX=...(with given parameters) & get response
     /*
     AT+CMUX=<mode>[,<subset>[,<portspeed>[,<N1>[,<T1>[,<N2>[,<T2>[,<T3>[,<k>]]]]]]]]
     <mode> 0 Basic option.
     <subset> This parameter defines the way in which the MUX control channel is set up.
         Virtual channel may subsequently be set up differently, but in the absence of any
-        negotiation for the settings of a virtual channel, it shall be set up according to thecontrol channel <subset> setting.
-        0 UIH frames used only.
-        1 UI frames used only.
-        2 I frames used only.
-    <portspeed> 
-        1 9600bit/s
-        2 19200bit/s
+        negotiation for the settings of a virtual channel, it shall be set up according to thecontrol channel <subset>
+    setting. 0 UIH frames used only. 1 UI frames used only. 2 I frames used only. <portspeed> 1 9600bit/s 2 19200bit/s
         3 38400bit/s
         4 57600bit/s
         5 115200bit/s
@@ -52,25 +47,24 @@ void TS0710_START::request(Mode_e mode, START_SystemParameters_t system_paramete
     <T1> The time UE waits for an acknowledgement before resorting to other action (e.g.
         transmitting a frame).The step size is ten milliseconds, the range is 1-255. The default value is 100ms.
     <N2> Maximum number of re-transmissions, the range is 0-255, the default value is 3.
-    <T2> Response timer for MUX control channel, the step size is ten milliseconds, the range is 2-255, 30 is the default value.
-    <T3> Wake up response timer in seconds. The range is 1-255, 10 is the default value.
-    <k> Window size (It is not supported for UC20)
+    <T2> Response timer for MUX control channel, the step size is ten milliseconds, the range is 2-255, 30 is the
+    default value. <T3> Wake up response timer in seconds. The range is 1-255, 10 is the default value. <k> Window size
+    (It is not supported for UC20)
 
     PortSpeed_e PortSpeed;          //!< Port speed
-    int MaxFrameSize;               //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for basic option & 64 for advanced ]
-    int AckTimer;                   //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
-    int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0-100, default: 3]
-    int MaxCtrlRespTime;            //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s]
-    int WakeUpRespTime;             //!< Wake up response timer [1s-255s, default: 10s]
-    int ErrRecovWindowSize;         //!< Window size for error recovery mode [1-7, default: 2]
+    int MaxFrameSize;               //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for
+    basic option & 64 for advanced ] int AckTimer;                   //!< Acknowledgement Timer [0,01s-2,55s, default:
+    0,1s] int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0-100, default: 3] int
+    MaxCtrlRespTime;            //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s] int
+    WakeUpRespTime;             //!< Wake up response timer [1s-255s, default: 10s] int ErrRecovWindowSize;         //!<
+    Window size for error recovery mode [1-7, default: 2]
     */
 
-    //2. Create channel DLCI0 - control
+    // 2. Create channel DLCI0 - control
     ctrlChannel = new DLC_channel(0, std::string("Control"), pv_cellular);
 
-    //wait & check for active flag in channel
-    if (ctrlChannel->getActive())
-    {
+    // wait & check for active flag in channel
+    if (ctrlChannel->getActive()) {
         connStatus = true;
-   }
+    }
 }
diff --git a/module-cellular/Modem/TS0710/TS0710_START.h b/module-cellular/Modem/TS0710/TS0710_START.h
index 9c4168115..693f3c69b 100644
--- a/module-cellular/Modem/TS0710/TS0710_START.h
+++ b/module-cellular/Modem/TS0710/TS0710_START.h
@@ -2,7 +2,6 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_START_H
 #define _TS0710_START_H
 
@@ -10,69 +9,88 @@
 #include <map>
 #include "DLC_channel.h"
 
-class TS0710_START {
-public: 
+class TS0710_START
+{
+  public:
+    enum class Mode_e
+    {
+        Basic,
+        HDLC_UIH_frames,
+        HDLC_UI_frames,
+        HDLC_frames
+    };
 
-enum class Mode_e { Basic, HDLC_UIH_frames, HDLC_UI_frames, HDLC_frames }; 
- 
-struct START_SystemParameters_t {
-    PortSpeed_e PortSpeed;          //!< Port speed
-    int MaxFrameSize;               //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for basic option & 64 for advanced ]
-    int AckTimer;                   //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
-    int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0-100, default: 3]
-    int MaxCtrlRespTime;            //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s]
-    int WakeUpRespTime;             //!< Wake up response timer [1s-255s, default: 10s]
-    int ErrRecovWindowSize;         //!< Window size for error recovery mode [1-7, default: 2]
-};
+    struct START_SystemParameters_t
+    {
+        PortSpeed_e PortSpeed; //!< Port speed
+        int MaxFrameSize;      //!< Maximum Frame Size [ 1-128 in Basic mode, 1-512 in HDLC modes, default: 31 for basic
+                               //!< option & 64 for advanced ]
+        int AckTimer;          //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
+        int MaxNumOfRetransmissions; //!< Maximum number of retransmissions [0-100, default: 3]
+        int MaxCtrlRespTime;    //!< Response timer for the multiplexer control channel [0,01s-2,55s, default: 0,3s]
+        int WakeUpRespTime;     //!< Wake up response timer [1s-255s, default: 10s]
+        int ErrRecovWindowSize; //!< Window size for error recovery mode [1-7, default: 2]
+    };
 
-private:
+  private:
     Mode_e pv_mode;
     START_SystemParameters_t pv_system_parameters;
-    bool connStatus = false;        //!< Connection status - false: GSM0710 not started, true: client responded
+    bool connStatus = false; //!< Connection status - false: GSM0710 not started, true: client responded
     DLC_channel *ctrlChannel;
     bsp::Cellular *pv_cellular;
-    
-public:
-TS0710_START(Mode_e mode, START_SystemParameters_t system_parameters, bsp::Cellular *cellular);
-~TS0710_START();
 
-private:
-/**
- * @param mode
- * @param system_parameters
- * @brief The request primitive is used to request that the multiplexer mode to be turned on in the desired mode and system parameters.
- */
-void request(Mode_e mode, START_SystemParameters_t system_parameters);
-    
-/**
- * @param mode
- * @param system_parameters
- * @brief The indication primitive transfers the request to start multiplexer operation along with the desired mode and system parameters to the upper layer of the target device.
- */
-//void indication(Mode_e mode, START_SystemParameters_t system_parameters);
-    
-/**
- * @param mode
- * @param system_parameters
- * @param accept
- * @brief If the target device accepts the request by issuing an affirmative response primitive, the suggested mode and system parameters will become valid. \
- * A successful establishment of the multiplexer mode is indicated by the accept parameter being set to “true”. \
- * If the accept parameter is set to “false” the returned values for the other parameters are those suggested by the responding device.
- */
-//void response(Mode_e mode, START_SystemParameters_t system_parameters, bool accept);
-    
-/**
- * @param mode
- * @param system_parameters
- * @param accept
- * @brief The confirm primitive is returned to the upper layer of the requesting device. \
- * A successful establishment of the multiplexer mode is indicated by the accept parameter being set to “true”. \
- * If the accept parameter is set to “false” the returned values for the other parameters are those suggested by the responding device.
- */
-//void confirm(Mode_e mode, START_SystemParameters_t system_parameters, bool accept);
-public:
-    bool ConnectionStatus() { return connStatus; }
-    DLC_channel *getCtrlChannel() { return ctrlChannel; }
+  public:
+    TS0710_START(Mode_e mode, START_SystemParameters_t system_parameters, bsp::Cellular *cellular);
+    ~TS0710_START();
+
+  private:
+    /**
+     * @param mode
+     * @param system_parameters
+     * @brief The request primitive is used to request that the multiplexer mode to be turned on in the desired mode and
+     * system parameters.
+     */
+    void request(Mode_e mode, START_SystemParameters_t system_parameters);
+
+    /**
+     * @param mode
+     * @param system_parameters
+     * @brief The indication primitive transfers the request to start multiplexer operation along with the desired mode
+     * and system parameters to the upper layer of the target device.
+     */
+    // void indication(Mode_e mode, START_SystemParameters_t system_parameters);
+
+    /**
+     * @param mode
+     * @param system_parameters
+     * @param accept
+     * @brief If the target device accepts the request by issuing an affirmative response primitive, the suggested mode
+     * and system parameters will become valid. \
+     * A successful establishment of the multiplexer mode is indicated by the accept parameter being set to “true”. \
+     * If the accept parameter is set to “false” the returned values for the other parameters are those suggested by the
+     * responding device.
+     */
+    // void response(Mode_e mode, START_SystemParameters_t system_parameters, bool accept);
+
+    /**
+     * @param mode
+     * @param system_parameters
+     * @param accept
+     * @brief The confirm primitive is returned to the upper layer of the requesting device. \
+     * A successful establishment of the multiplexer mode is indicated by the accept parameter being set to “true”. \
+     * If the accept parameter is set to “false” the returned values for the other parameters are those suggested by the
+     * responding device.
+     */
+    // void confirm(Mode_e mode, START_SystemParameters_t system_parameters, bool accept);
+  public:
+    bool ConnectionStatus()
+    {
+        return connStatus;
+    }
+    DLC_channel *getCtrlChannel()
+    {
+        return ctrlChannel;
+    }
 };
 
 #endif //_TS0710_START_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_TEST.cpp b/module-cellular/Modem/TS0710/TS0710_TEST.cpp
index 98d389fc9..0a00b87d4 100644
--- a/module-cellular/Modem/TS0710/TS0710_TEST.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_TEST.cpp
@@ -2,24 +2,20 @@
  * Project Untitled
  */
 
-
 #include "TS0710_TEST.h"
 
 /**
  * TS0710_TEST implementation
  */
 
+/**
+ * @param TestData
+ */
+void TS0710_TEST::request(std::vector<uint8_t> TestData)
+{}
 
 /**
  * @param TestData
  */
-void TS0710_TEST::request(std::vector<uint8_t> TestData) {
-
-}
-
-/**
- * @param TestData
- */
-void TS0710_TEST::confirm(std::vector<uint8_t> TestData) {
-
-}
\ No newline at end of file
+void TS0710_TEST::confirm(std::vector<uint8_t> TestData)
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_TEST.h b/module-cellular/Modem/TS0710/TS0710_TEST.h
index b708c3dd2..3acfbf8af 100644
--- a/module-cellular/Modem/TS0710/TS0710_TEST.h
+++ b/module-cellular/Modem/TS0710/TS0710_TEST.h
@@ -2,30 +2,31 @@
  * Project Untitled
  */
 
-
 #ifndef _TS0710_TEST_H
 #define _TS0710_TEST_H
 
 #include <vector>
 #include "stdint.h"
-//control channel - Test Command (Test)
+// control channel - Test Command (Test)
 
-class TS0710_TEST {
-public: 
+class TS0710_TEST
+{
+  public:
+    TS0710_TEST()
+    {}
+    ~TS0710_TEST()
+    {}
 
-TS0710_TEST() {}
-~TS0710_TEST() {}
+  private:
+    /**
+     * @param TestData
+     */
+    void request(std::vector<uint8_t> TestData);
 
-private:
-/**
- * @param TestData
- */
-void request(std::vector<uint8_t> TestData);
-    
-/**
- * @param TestData
- */
-void confirm(std::vector<uint8_t> TestData);
+    /**
+     * @param TestData
+     */
+    void confirm(std::vector<uint8_t> TestData);
 };
 
 #endif //_TS0710_TEST_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_WAKEUP.cpp b/module-cellular/Modem/TS0710/TS0710_WAKEUP.cpp
index 44ea9612c..aa892dede 100644
--- a/module-cellular/Modem/TS0710/TS0710_WAKEUP.cpp
+++ b/module-cellular/Modem/TS0710/TS0710_WAKEUP.cpp
@@ -2,18 +2,14 @@
  * Project Untitled
  */
 
-
 #include "TS0710_WAKEUP.h"
 
 /**
  * TS0710_WAKEUP implementation
  */
 
+void TS0710_WAKEUP::indication()
+{}
 
-void TS0710_WAKEUP::indication() {
-
-}
-
-void TS0710_WAKEUP::response() {
-
-}
\ No newline at end of file
+void TS0710_WAKEUP::response()
+{}
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_WAKEUP.h b/module-cellular/Modem/TS0710/TS0710_WAKEUP.h
index ad896f133..af067cec0 100644
--- a/module-cellular/Modem/TS0710/TS0710_WAKEUP.h
+++ b/module-cellular/Modem/TS0710/TS0710_WAKEUP.h
@@ -2,25 +2,27 @@
  * Project Untitled
  * @brief The indication primitive is sent to the upper layer when the TS 0710 layer of the receiving unit receives a
  * request to wake up from the power saving state. When the receiving device is ready to resume operation on the
- * multiplexer channel this is indicated to the TS 0710 layer in the receiving unit by means of the response primitive. Sins
- * the wakeup routine is initiated by the transmitting device attempting to communicate, neither request nor confirm
- * primitives are provided for the wakeup service. The transmitting device instead uses the Data services described below.
+ * multiplexer channel this is indicated to the TS 0710 layer in the receiving unit by means of the response primitive.
+ * Sins the wakeup routine is initiated by the transmitting device attempting to communicate, neither request nor
+ * confirm primitives are provided for the wakeup service. The transmitting device instead uses the Data services
+ * described below.
  */
 
-
 #ifndef _TS0710_WAKEUP_H
 #define _TS0710_WAKEUP_H
 
-class TS0710_WAKEUP {
-public: 
+class TS0710_WAKEUP
+{
+  public:
+    TS0710_WAKEUP()
+    {}
+    ~TS0710_WAKEUP()
+    {}
 
-TS0710_WAKEUP() {}
-~TS0710_WAKEUP() {}
+  private:
+    void indication();
 
-private:
-void indication();
-    
-void response();
+    void response();
 };
 
 #endif //_TS0710_WAKEUP_H
\ No newline at end of file
diff --git a/module-cellular/Modem/TS0710/TS0710_types.h b/module-cellular/Modem/TS0710/TS0710_types.h
index ddf95a842..9a41022e1 100644
--- a/module-cellular/Modem/TS0710/TS0710_types.h
+++ b/module-cellular/Modem/TS0710/TS0710_types.h
@@ -5,65 +5,88 @@
 #include <string>
 #include "bsp/cellular/bsp_cellular.hpp"
 
-typedef int DLCI_t;                 //!< [1 – 63] DLC over which the data is to be transmitted.
-enum TypeOfFrame_e { SABM = 0x3F, UA = 0x73, DM = 0x1F, DISC = 0x53, UIH = 0xEF, UI = 0x03, I };
+typedef int DLCI_t; //!< [1 – 63] DLC over which the data is to be transmitted.
+enum TypeOfFrame_e
+{
+    SABM = 0x3F,
+    UA   = 0x73,
+    DM   = 0x1F,
+    DISC = 0x53,
+    UIH  = 0xEF,
+    UI   = 0x03,
+    I
+};
 extern std::map<TypeOfFrame_e, std::string> TypeOfFrame_text;
-struct DLC_ESTABL_SystemParameters_t {
-        TypeOfFrame_e TypeOfFrame;      //!< Type of frame [UIH | UI | I, default: UIH]
-        int ConvergenceLayer;           //!< Convergence layer [1 - 4, default: 1]
-        int Priority;                   //!< Priority [0-63]
-        int AckTime;                    //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
-        int MaxFrameSize;               //!< Maximum Frame Size [1 – 32768, default: 31 for the basic option and 64 for the advanced option]
-        int MaxNumOfRetransmissions;    //!< Maximum number of retransmissions [0 – 255, default : 3]
-        int ErrRecovWindowSize;         //!< Window size for error recovery mode [1 – 7, default : 2]
-    };
+struct DLC_ESTABL_SystemParameters_t
+{
+    TypeOfFrame_e TypeOfFrame; //!< Type of frame [UIH | UI | I, default: UIH]
+    int ConvergenceLayer;      //!< Convergence layer [1 - 4, default: 1]
+    int Priority;              //!< Priority [0-63]
+    int AckTime;               //!< Acknowledgement Timer [0,01s-2,55s, default: 0,1s]
+    int MaxFrameSize; //!< Maximum Frame Size [1 – 32768, default: 31 for the basic option and 64 for the advanced
+                      //!< option]
+    int MaxNumOfRetransmissions; //!< Maximum number of retransmissions [0 – 255, default : 3]
+    int ErrRecovWindowSize;      //!< Window size for error recovery mode [1 – 7, default : 2]
+};
 
+#define TS0710_MAX_CHANNEL_NUM 4
 
-#define TS0710_MAX_CHANNEL_NUM  4
-
-enum PortSpeed_e { PS2400, PS4800, PS7200, PS9600, PS19200, PS38400, PS57600, PS115200, PS230400, PS460800 };
+enum PortSpeed_e
+{
+    PS2400,
+    PS4800,
+    PS7200,
+    PS9600,
+    PS19200,
+    PS38400,
+    PS57600,
+    PS115200,
+    PS230400,
+    PS460800
+};
 extern std::map<PortSpeed_e, int> QuectelCMUXPortSpeeds_text;
 extern std::map<PortSpeed_e, int> ATPortSpeeds_text;
 
 /*MUX defines */
-enum class MuxDefines {
-    GSM0710_FRAME_FLAG = 0xF9,// basic mode flag for frame start and end
-    GSM0710_FRAME_ADV_FLAG = 0x7E,// advanced mode flag for frame start and end
-    GSM0710_FRAME_ADV_ESC = 0x7D,// advanced mode escape symbol
-    GSM0710_FRAME_ADV_ESC_COPML = 0x20,// advanced mode escape complement mask
-    // bits: Poll/final, Command/Response, Extension
-            GSM0710_PF = 0x10,//16
-    GSM0710_CR = 0x02,//2
-    GSM0710_EA = 0x01,//1
+enum class MuxDefines
+{
+    GSM0710_FRAME_FLAG          = 0xF9, // basic mode flag for frame start and end
+    GSM0710_FRAME_ADV_FLAG      = 0x7E, // advanced mode flag for frame start and end
+    GSM0710_FRAME_ADV_ESC       = 0x7D, // advanced mode escape symbol
+    GSM0710_FRAME_ADV_ESC_COPML = 0x20, // advanced mode escape complement mask
+                                        // bits: Poll/final, Command/Response, Extension
+    GSM0710_PF = 0x10,                  // 16
+    GSM0710_CR = 0x02,                  // 2
+    GSM0710_EA = 0x01,                  // 1
     // type of frames
-            GSM0710_TYPE_SABM = 0x2F,//47 Set Asynchronous Balanced Mode
-    GSM0710_TYPE_UA = 0x63,//99 Unnumbered Acknowledgement
-    GSM0710_TYPE_DM = 0x0F,//15 Disconnected Mode
-    GSM0710_TYPE_DISC = 0x43,//67 Disconnect
-    GSM0710_TYPE_UIH = 0xEF,//239 Unnumbered information with header check
-    GSM0710_TYPE_UI = 0x03,//3 Unnumbered Acknowledgement
+    GSM0710_TYPE_SABM = 0x2F, // 47 Set Asynchronous Balanced Mode
+    GSM0710_TYPE_UA   = 0x63, // 99 Unnumbered Acknowledgement
+    GSM0710_TYPE_DM   = 0x0F, // 15 Disconnected Mode
+    GSM0710_TYPE_DISC = 0x43, // 67 Disconnect
+    GSM0710_TYPE_UIH = 0xEF,  // 239 Unnumbered information with header check
+    GSM0710_TYPE_UI  = 0x03,  // 3 Unnumbered Acknowledgement
     // control channel commands
-            GSM0710_CONTROL_PN = (0x80 | GSM0710_EA),//?? DLC parameter negotiation
-    GSM0710_CONTROL_CLD = (0xC0 | GSM0710_EA),//193 Multiplexer close down
-    GSM0710_CONTROL_PSC = (0x40 | GSM0710_EA),//??? Power Saving Control
-    GSM0710_CONTROL_TEST = (0x20 | GSM0710_EA),//33 Test Command
-    GSM0710_CONTROL_MSC = (0xE0 | GSM0710_EA),//225 Modem Status Command
-    GSM0710_CONTROL_NSC = (0x10 | GSM0710_EA),//17 Non Supported Command Response
-    GSM0710_CONTROL_RPN = (0x90 | GSM0710_EA),//?? Remote Port Negotiation Command
-    GSM0710_CONTROL_RLS = (0x50 | GSM0710_EA),//?? Remote Line Status Command
-    GSM0710_CONTROL_SNC = (0xD0 | GSM0710_EA),//?? Service Negotiation Command
-    // V.24 signals: flow control, ready to communicate, ring indicator,
-    // data valid
-            GSM0710_SIGNAL_FC = 0x02,
+    GSM0710_CONTROL_PN   = (0x80 | GSM0710_EA), //?? DLC parameter negotiation
+    GSM0710_CONTROL_CLD  = (0xC0 | GSM0710_EA), // 193 Multiplexer close down
+    GSM0710_CONTROL_PSC  = (0x40 | GSM0710_EA), //??? Power Saving Control
+    GSM0710_CONTROL_TEST = (0x20 | GSM0710_EA), // 33 Test Command
+    GSM0710_CONTROL_MSC  = (0xE0 | GSM0710_EA), // 225 Modem Status Command
+    GSM0710_CONTROL_NSC  = (0x10 | GSM0710_EA), // 17 Non Supported Command Response
+    GSM0710_CONTROL_RPN  = (0x90 | GSM0710_EA), //?? Remote Port Negotiation Command
+    GSM0710_CONTROL_RLS  = (0x50 | GSM0710_EA), //?? Remote Line Status Command
+    GSM0710_CONTROL_SNC  = (0xD0 | GSM0710_EA), //?? Service Negotiation Command
+                                                // V.24 signals: flow control, ready to communicate, ring indicator,
+                                                // data valid
+    GSM0710_SIGNAL_FC  = 0x02,
     GSM0710_SIGNAL_RTC = 0x04,
     GSM0710_SIGNAL_RTR = 0x08,
-    GSM0710_SIGNAL_IC = 0x40,//64
-    GSM0710_SIGNAL_DV = 0x80,//128
+    GSM0710_SIGNAL_IC  = 0x40, // 64
+    GSM0710_SIGNAL_DV  = 0x80, // 128
     GSM0710_SIGNAL_DTR = 0x04,
     GSM0710_SIGNAL_DSR = 0x04,
     GSM0710_SIGNAL_RTS = 0x08,
     GSM0710_SIGNAL_CTS = 0x08,
-    GSM0710_SIGNAL_DCD = 0x80//128
+    GSM0710_SIGNAL_DCD = 0x80 // 128
 };
 
 #endif /*_TS0710_TYPES_H*/
diff --git a/module-cellular/Modem/TS0710/tests/test-DLC_channel.cpp b/module-cellular/Modem/TS0710/tests/test-DLC_channel.cpp
index 1454601bf..ddffcb22f 100644
--- a/module-cellular/Modem/TS0710/tests/test-DLC_channel.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-DLC_channel.cpp
@@ -2,7 +2,8 @@
 #include "DLC_channel.h"
 #include "TS0710_Frame.h"
 
-TEST_CASE("test-DLC_channel") {
+TEST_CASE("test-DLC_channel")
+{
     DLC_channel *_class = new DLC_channel();
     REQUIRE(_class->getName() == "none");
     delete _class;
@@ -18,47 +19,48 @@ TEST_CASE("test-DLC_channel") {
     delete _class;
 }
 
-TEST_CASE("test-Frame") {
+TEST_CASE("test-Frame")
+{
     TS0710_Frame::frame_t frame;
-    frame.Address = static_cast<uint8_t>(2 << 2) | (1 << 1);  //set C/R = 1 - command
+    frame.Address = static_cast<uint8_t>(2 << 2) | (1 << 1); // set C/R = 1 - command
     frame.Control = static_cast<uint8_t>(TypeOfFrame_e::UIH);
     frame.data.push_back(0x00);
     frame.data.push_back(0x01);
     frame.data.push_back(0x02);
-    TS0710_Frame *_class =  new TS0710_Frame(frame);
+    TS0710_Frame *_class = new TS0710_Frame(frame);
 
-    //check for not extended address
+    // check for not extended address
     REQUIRE(_class->isComplete() == true);
 
-    std::vector<uint8_t> v =  _class->getSerData();
+    std::vector<uint8_t> v = _class->getSerData();
     delete _class;
 
-    _class =  new TS0710_Frame(v);
+    _class = new TS0710_Frame(v);
     REQUIRE(_class->isComplete() == true);
     delete _class;
 
     v.pop_back();
-    _class =  new TS0710_Frame(v);
+    _class = new TS0710_Frame(v);
     REQUIRE(_class->isComplete() == false);
     delete _class;
 
-    //check for extended address
+    // check for extended address
     v.clear();
     frame.data.clear();
     for (int i = 0; i < 256; i++)
         frame.data.push_back(0xAA);
-    _class =  new TS0710_Frame(frame);
+    _class = new TS0710_Frame(frame);
 
     REQUIRE(_class->isComplete() == true);
-    v =  _class->getSerData();
+    v = _class->getSerData();
     delete _class;
 
-    _class =  new TS0710_Frame(v);
+    _class = new TS0710_Frame(v);
     REQUIRE(_class->isComplete() == true);
     delete _class;
 
     v.pop_back();
-    _class =  new TS0710_Frame(v);
+    _class = new TS0710_Frame(v);
     REQUIRE(_class->isComplete() == false);
     delete _class;
 }
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710.cpp
index 9cb807942..352ac8b5e 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710.cpp
@@ -1,10 +1,11 @@
 #include "catch.hpp"
 #include "TS0710.h"
 #include "DLC_channel.h"
-TEST_CASE("test-TS0710") {
+TEST_CASE("test-TS0710")
+{
     TS0710 *_class = new TS0710();
 
-    //get channel by name
+    // get channel by name
     DLC_channel *channel = _class->GetChannel("Control");
     REQUIRE(channel->getName() == "Control");
     channel = _class->GetChannel("xxx");
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_CLOSE.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_CLOSE.cpp
index 89ab9b4bf..20d4d84d2 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_CLOSE.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_CLOSE.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_CLOSE.h"
-TEST_CASE("test-TS0710_CLOSE") {
+TEST_CASE("test-TS0710_CLOSE")
+{
     TS0710_CLOSE *_class = new TS0710_CLOSE();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_CONTROL.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_CONTROL.cpp
index b5c8cc3b1..6f7cbd9bf 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_CONTROL.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_CONTROL.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_CONTROL.h"
-TEST_CASE("test-TS0710_CONTROL") {
+TEST_CASE("test-TS0710_CONTROL")
+{
     TS0710_CONTROL *_class = new TS0710_CONTROL();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_DATA.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_DATA.cpp
index 530236401..563385506 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_DATA.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_DATA.cpp
@@ -2,25 +2,27 @@
 #include "TS0710_DATA.h"
 #include "TS0710_Frame.h"
 
-#if defined (__cplusplus)
-    extern "C"{
+#if defined(__cplusplus)
+extern "C"
+{
 #endif
 #include "uart.h"
 #if defined(__cplusplus)
 }
 #endif
 
-#define TEST_DATA_SIZE  220
+#define TEST_DATA_SIZE 220
 
-TEST_CASE("test-TS0710_DATA") {
+TEST_CASE("test-TS0710_DATA")
+{
     DLC_ESTABL_SystemParameters_t system_parameters;
-    system_parameters.TypeOfFrame = TypeOfFrame_e::UIH;
-    system_parameters.ConvergenceLayer = 1;
-    system_parameters.Priority = 1;
-    system_parameters.AckTime = 100; //100ms default
-    system_parameters.MaxFrameSize = 128;
-    system_parameters.MaxNumOfRetransmissions = 3; //default 3
-    system_parameters.ErrRecovWindowSize = 2; //default 2
+    system_parameters.TypeOfFrame             = TypeOfFrame_e::UIH;
+    system_parameters.ConvergenceLayer        = 1;
+    system_parameters.Priority                = 1;
+    system_parameters.AckTime                 = 100; // 100ms default
+    system_parameters.MaxFrameSize            = 128;
+    system_parameters.MaxNumOfRetransmissions = 3; // default 3
+    system_parameters.ErrRecovWindowSize      = 2; // default 2
 
     std::vector<uint8_t> User_data;
     for (int i = 0; i < TEST_DATA_SIZE; i++)
@@ -28,9 +30,9 @@ TEST_CASE("test-TS0710_DATA") {
 
     TS0710_DATA *_class = new TS0710_DATA(2, system_parameters, User_data);
     uint8_t data[256];
-    //uint32_t len = UartReceive(data);
-    uint32_t len = cellular->Read(static_cast<void*>(data), sizeof(data));
-    //check length of last received frame - should be reminder of (TEST_DATA_SIZE / system_parameters.MaxFrameSize)
+    // uint32_t len = UartReceive(data);
+    uint32_t len = cellular->Read(static_cast<void *>(data), sizeof(data));
+    // check length of last received frame - should be reminder of (TEST_DATA_SIZE / system_parameters.MaxFrameSize)
     REQUIRE((data[3] >> 1) == (TEST_DATA_SIZE % system_parameters.MaxFrameSize));
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_ESTABL.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_ESTABL.cpp
index 30dc99c07..1df8f2f66 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_ESTABL.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_ESTABL.cpp
@@ -1,14 +1,14 @@
 #include "catch.hpp"
 #include "TS0710_DLC_ESTABL.h"
 
-TEST_CASE("test-TS0710_DLC_ESTABL") {
+TEST_CASE("test-TS0710_DLC_ESTABL")
+{
     TS0710_DLC_ESTABL *_class = new TS0710_DLC_ESTABL(0);
     REQUIRE(_class->getResponse() == true);
     delete _class;
-    
+
     DLC_ESTABL_SystemParameters_t system_parameters;
     _class = new TS0710_DLC_ESTABL(0, system_parameters);
     REQUIRE(_class->getResponse() == true);
     delete _class;
-    
 }
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_RELEASE.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_RELEASE.cpp
index 9b4dae140..9b56f3696 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_RELEASE.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_DLC_RELEASE.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_DLC_RELEASE.h"
-TEST_CASE("test-TS0710_DLC_RELEASE") {
+TEST_CASE("test-TS0710_DLC_RELEASE")
+{
     TS0710_DLC_RELEASE *_class = new TS0710_DLC_RELEASE(0);
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_FLOW.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_FLOW.cpp
index 853e96871..74490e329 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_FLOW.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_FLOW.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_FLOW.h"
-TEST_CASE("test-TS0710_FLOW") {
+TEST_CASE("test-TS0710_FLOW")
+{
     TS0710_FLOW *_class = new TS0710_FLOW();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_PARNEG.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_PARNEG.cpp
index 34bd35d1f..c369390c7 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_PARNEG.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_PARNEG.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_PARNEG.h"
-TEST_CASE("test-TS0710_PARNEG") {
+TEST_CASE("test-TS0710_PARNEG")
+{
     TS0710_PARNEG *_class = new TS0710_PARNEG();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_PORTNEG.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_PORTNEG.cpp
index 700eaaaa2..c013c9858 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_PORTNEG.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_PORTNEG.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_PORTNEG.h"
-TEST_CASE("test-TS0710_PORTNEG") {
+TEST_CASE("test-TS0710_PORTNEG")
+{
     TS0710_PORTNEG *_class = new TS0710_PORTNEG();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_SERVNEG.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_SERVNEG.cpp
index 8569c8871..b809d6012 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_SERVNEG.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_SERVNEG.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_SERVNEG.h"
-TEST_CASE("test-TS0710_SERVNEG") {
+TEST_CASE("test-TS0710_SERVNEG")
+{
     TS0710_SERVNEG *_class = new TS0710_SERVNEG();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_SLEEP.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_SLEEP.cpp
index 4b900023b..588dadca9 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_SLEEP.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_SLEEP.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_SLEEP.h"
-TEST_CASE("test-TS0710_SLEEP") {
+TEST_CASE("test-TS0710_SLEEP")
+{
     TS0710_SLEEP *_class = new TS0710_SLEEP();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_START.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_START.cpp
index f922f4e4d..7a8d7c33b 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_START.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_START.cpp
@@ -1,10 +1,11 @@
 #include "catch.hpp"
 #include "TS0710_START.h"
-TEST_CASE("test-TS0710_START") {
+TEST_CASE("test-TS0710_START")
+{
     TS0710_START::START_SystemParameters_t system_parameters;
     TS0710_START *_class = new TS0710_START(TS0710_START::Mode_e::Basic, system_parameters);
 
-    //wait for confirmation
+    // wait for confirmation
     REQUIRE(_class->ConnectionStatus() == true);
     REQUIRE(_class->getCtrlChannel()->getName() == "Control");
 
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_TEST.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_TEST.cpp
index 954ef6398..980282126 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_TEST.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_TEST.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_TEST.h"
-TEST_CASE("test-TS0710_TEST") {
+TEST_CASE("test-TS0710_TEST")
+{
     TS0710_TEST *_class = new TS0710_TEST();
 
     delete _class;
diff --git a/module-cellular/Modem/TS0710/tests/test-TS0710_WAKEUP.cpp b/module-cellular/Modem/TS0710/tests/test-TS0710_WAKEUP.cpp
index e66157bb7..dd242b174 100644
--- a/module-cellular/Modem/TS0710/tests/test-TS0710_WAKEUP.cpp
+++ b/module-cellular/Modem/TS0710/tests/test-TS0710_WAKEUP.cpp
@@ -1,6 +1,7 @@
 #include "catch.hpp"
 #include "TS0710_WAKEUP.h"
-TEST_CASE("test-TS0710_WAKEUP") {
+TEST_CASE("test-TS0710_WAKEUP")
+{
     TS0710_WAKEUP *_class = new TS0710_WAKEUP();
 
     delete _class;
diff --git a/module-cellular/at/Commands.hpp b/module-cellular/at/Commands.hpp
index 45649eb9e..0983ce61e 100644
--- a/module-cellular/at/Commands.hpp
+++ b/module-cellular/at/Commands.hpp
@@ -10,8 +10,9 @@
 
 namespace at
 {
-    inline const uint32_t default_timeout = 5000;    /// if unsure - take this
-    inline const uint32_t default_doc_timeout = 300; /// if you've checked it's ok - or it was at least 300 in code somewhere, take this
+    inline const uint32_t default_timeout = 5000; /// if unsure - take this
+    inline const uint32_t default_doc_timeout =
+        300; /// if you've checked it's ok - or it was at least 300 in code somewhere, take this
 
     /// at::Cmd structure with command, it's timeout and some runtime data
     /// { command, timeout, last : {sent, response, status } }
@@ -22,8 +23,8 @@ namespace at
         struct
         {
             Result::Code status = Result::Code::NONE; /// last response for that command
-            time_t requested = 0;                     /// last time comand was requested
-            time_t response = 0;                      /// last time command was received
+            time_t requested    = 0;                  /// last time comand was requested
+            time_t response     = 0;                  /// last time command was received
             auto request_time() -> time_t
             {
                 return response - requested;
@@ -31,9 +32,9 @@ namespace at
         } last; /// last status of command execution
 
         Cmd(std::string cmd, uint32_t timeout = default_timeout) : cmd(std::move(cmd)), timeout(timeout)
-        {
-        }
-        /// not the prettiest, for now it's ok - for commands which modify strings to execute - return copy of command str
+        {}
+        /// not the prettiest, for now it's ok - for commands which modify strings to execute - return copy of command
+        /// str
         operator std::string() const
         {
             return cmd;
@@ -68,13 +69,14 @@ namespace at
         SMS_STORAGE,                /// Set SMS preferred storage
         QSCLK_ON,                   /// Configure Whether or Not to Enter into Sleep Mode
         QDAI,                       /// GSM audio initialization check
-        QDAI_INIT,                  /// Audio configuration: custom PCM, 16 bit linear samples, primary mode, 16kHz, master
-                                    /// Quectel confirmed that during init phase modem sends "ready notification" way before
-                                    /// audio subsystem is initialized. The only recommended solution for this is to send configuration
-                                    /// command repetitively until modem responds with OK. Due to our system characteristic we can't use here simple
-                                    /// while loop with vTaskDelay as this function will be invoked from AudioService context. By design service's
-                                    /// routines should be as fast as they can and non blocking. Therefore there is possibility for audioservice to block
-                                    /// for too long waiting in while loop which will trigger SystemManager ping/pong failure procedure.
+        QDAI_INIT, /// Audio configuration: custom PCM, 16 bit linear samples, primary mode, 16kHz, master
+                   /// Quectel confirmed that during init phase modem sends "ready notification" way before
+                   /// audio subsystem is initialized. The only recommended solution for this is to send configuration
+                   /// command repetitively until modem responds with OK. Due to our system characteristic we can't use
+                   /// here simple while loop with vTaskDelay as this function will be invoked from AudioService
+                   /// context. By design service's routines should be as fast as they can and non blocking. Therefore
+                   /// there is possibility for audioservice to block for too long waiting in while loop which will
+                   /// trigger SystemManager ping/pong failure procedure.
         SET_URC_CHANNEL,
         CSQ,  /// Signal strength query
         CLCC, /// list current calls
@@ -144,8 +146,7 @@ namespace at
             {AT::SIM_DET_ON, {"AT+QSIMDET=1,0\r"}},
             {AT::SIMSTAT_ON, {"AT+QSIMSTAT=1\r"}},
         };
-        if (fact.count(at))
-        {
+        if (fact.count(at)) {
             return fact.at(at);
         }
         LOG_ERROR("NO SUCH AT COMMAND DEFINED: %d", at);
diff --git a/module-cellular/at/URC_Any.hpp b/module-cellular/at/URC_Any.hpp
index 26beac75e..7fd5a398e 100644
--- a/module-cellular/at/URC_Any.hpp
+++ b/module-cellular/at/URC_Any.hpp
@@ -16,7 +16,7 @@ namespace at::urc
     struct Any
     {
         Any(const std::string &str);
-        virtual ~Any() = default;
+        virtual ~Any()                     = default;
         virtual auto what() -> std::string = 0;
         /// split urc into: head and tokenized data (as in class descripiton)
         virtual void split(const std::string &str) final;
diff --git a/module-cellular/at/URC_QIND.hpp b/module-cellular/at/URC_QIND.hpp
index fa5e432a6..d1a641cca 100644
--- a/module-cellular/at/URC_QIND.hpp
+++ b/module-cellular/at/URC_QIND.hpp
@@ -10,7 +10,7 @@ namespace at::urc
         const std::string type_csq = "csq";
 
         static const auto invalid_rssi_modulo = 99;
-        static const auto invalid_ber = 99;
+        static const auto invalid_ber         = 99;
 
         QIND(const std::string &val);
         ~QIND() override = default;
diff --git a/module-cellular/at/src/URC_Any.cpp b/module-cellular/at/src/URC_Any.cpp
index 7fe9604c0..3d134ca4a 100644
--- a/module-cellular/at/src/URC_Any.cpp
+++ b/module-cellular/at/src/URC_Any.cpp
@@ -11,10 +11,9 @@ namespace at::urc
     void Any::split(const std::string &str)
     {
         const std::string delim = ": ";
-        auto pos = str.find(delim);
-        head = std::string(str, 0, pos);
-        if (pos != std::string::npos)
-        {
+        auto pos                = str.find(delim);
+        head                    = std::string(str, 0, pos);
+        if (pos != std::string::npos) {
             tokens = utils::split(std::string(str.begin() + pos + delim.size(), str.end()), ',');
         } // else - everyting went to head
     }
diff --git a/module-cellular/at/src/URC_QIND.cpp b/module-cellular/at/src/URC_QIND.cpp
index fd667b49a..6535e2425 100644
--- a/module-cellular/at/src/URC_QIND.cpp
+++ b/module-cellular/at/src/URC_QIND.cpp
@@ -4,8 +4,7 @@
 using namespace at::urc;
 
 QIND::QIND(const std::string &val) : Any(val)
-{
-}
+{}
 
 auto QIND::what() -> std::string
 {
@@ -14,8 +13,7 @@ auto QIND::what() -> std::string
 
 auto QIND::is_csq() -> bool
 {
-    if (tokens.size() > CSQ)
-    {
+    if (tokens.size() > CSQ) {
         return tokens[CSQ].find(type_csq) != std::string::npos;
     }
     return false;
@@ -23,15 +21,12 @@ auto QIND::is_csq() -> bool
 
 auto QIND::validate(enum CSQ check) -> bool
 {
-    try
-    {
-        if (is_csq() && tokens.size() > BER)
-        {
+    try {
+        if (is_csq() && tokens.size() > BER) {
             int rssi = std::stoi(tokens[RSSI]);
-            int ber = std::stoi(tokens[BER]);
+            int ber  = std::stoi(tokens[BER]);
             LOG_DEBUG("> %d %d", rssi, ber);
-            switch (check)
-            {
+            switch (check) {
             case RSSI:
                 return (rssi % 100 % invalid_rssi_modulo) != 0;
             case BER:
@@ -41,8 +36,7 @@ auto QIND::validate(enum CSQ check) -> bool
             }
         }
     }
-    catch (const std::exception &ex)
-    {
+    catch (const std::exception &ex) {
         LOG_FATAL("exception: %s", ex.what());
     }
     return false;
diff --git a/module-cellular/tests/main_tests.cpp b/module-cellular/tests/main_tests.cpp
index 68f8ea029..453397327 100644
--- a/module-cellular/tests/main_tests.cpp
+++ b/module-cellular/tests/main_tests.cpp
@@ -8,39 +8,35 @@
  * @details
  */
 
-
 #include <iostream>
 #include <memory>
 #include <cstring>
 #include <unistd.h>
 
-
 #include "catch.hpp"
 
 #include "Modem/ATParser.hpp"
 
-
 TEST_CASE("Tokenizer tests")
 {
     std::string delimiter = "\r\n";
 
     std::string inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nUNFINIS";
-    auto ret = ATParser::Tokenizer(inputStr1, delimiter, 2);
+    auto ret              = ATParser::Tokenizer(inputStr1, delimiter, 2);
     REQUIRE(ret.size() == 2);
     REQUIRE(ret[0] == "OK");
     REQUIRE(ret[1] == "NO CARRIER");
 
     inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    ret = ATParser::Tokenizer(inputStr1, delimiter, 3);
+    ret       = ATParser::Tokenizer(inputStr1, delimiter, 3);
     REQUIRE(ret.size() == 3);
     REQUIRE(ret[0] == "OK");
     REQUIRE(ret[1] == "NO CARRIER");
     REQUIRE(ret[2] == "FINISHED");
 
     inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    ret = ATParser::Tokenizer(inputStr1, delimiter, 2);
+    ret       = ATParser::Tokenizer(inputStr1, delimiter, 2);
     REQUIRE(ret.size() == 2);
     REQUIRE(ret[0] == "OK");
     REQUIRE(ret[1] == "NO CARRIER");
 }
-
diff --git a/module-cellular/tests/tests-main.cpp b/module-cellular/tests/tests-main.cpp
old mode 100755
new mode 100644
index e044a1016..b65faeea1
--- a/module-cellular/tests/tests-main.cpp
+++ b/module-cellular/tests/tests-main.cpp
@@ -2,15 +2,14 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
 
-
 #include "vfs.hpp"
 
 class vfs vfs;
\ No newline at end of file
diff --git a/module-db/Common/Common.hpp b/module-db/Common/Common.hpp
index e8882fa6f..674118116 100644
--- a/module-db/Common/Common.hpp
+++ b/module-db/Common/Common.hpp
@@ -12,13 +12,14 @@
 /**
  * Types of sms message
  */
-enum class SMSType {
-    DRAFT = 0x01,
+enum class SMSType
+{
+    DRAFT  = 0x01,
     FAILED = 0x02,
-    INBOX = 0x04,
+    INBOX  = 0x04,
     OUTBOX = 0x08,
     QUEUED = 0x10,
-    ALL = 0xFF
+    ALL    = 0xFF
 };
 
 enum class EntryState
@@ -31,7 +32,8 @@ enum class EntryState
 /**
  * Types of contacts
  */
-enum class ContactType {
+enum class ContactType
+{
     USER = 1,
     TEMPORARY,
 };
@@ -48,23 +50,22 @@ enum class ContactNumberType
 
 enum class ContactAddressType
 {
-    HOME = 0,   /*!< ID defines that address is home address. */
-    WORK,       /*!< ID defines that address is work address. */
-    OTHER       /*!< ID defines that address doesn’t belong to any of the types defined above. */
+    HOME = 0, /*!< ID defines that address is home address. */
+    WORK,     /*!< ID defines that address is work address. */
+    OTHER     /*!< ID defines that address doesn’t belong to any of the types defined above. */
 };
 
 enum class SettingsLanguage
 {
-    ENGLISH=0x01,
-    POLISH=0x02,
-    GERMAN=0x04,
-    SPANISH=0x08,
+    ENGLISH = 0x01,
+    POLISH  = 0x02,
+    GERMAN  = 0x04,
+    SPANISH = 0x08,
 
 };
 
 enum class SettingsPinMode
 {
-    ALWAYS=0,
-    DAYS=1
+    ALWAYS = 0,
+    DAYS   = 1
 };
-
diff --git a/module-db/Database/Database.cpp b/module-db/Database/Database.cpp
index 55ca9e5d1..792cfa991 100644
--- a/module-db/Database/Database.cpp
+++ b/module-db/Database/Database.cpp
@@ -82,8 +82,10 @@ Database::~Database()
 
 void Database::Initialize()
 {
-    sqlite3_config(SQLITE_CONFIG_LOG, errorLogCallback,
-                   (void *)1); //(void*)1 is taken from official SQLITE examples and it appears that it ends variable args list
+    sqlite3_config(
+        SQLITE_CONFIG_LOG,
+        errorLogCallback,
+        (void *)1); //(void*)1 is taken from official SQLITE examples and it appears that it ends variable args list
     sqlite3_initialize();
 }
 void Database::Deinitialize()
@@ -94,8 +96,7 @@ void Database::Deinitialize()
 bool Database::Execute(const char *format, ...)
 {
 
-    if (!format)
-    {
+    if (!format) {
         return false;
     }
 
@@ -105,8 +106,7 @@ bool Database::Execute(const char *format, ...)
     int res = vsnprintf(szQuery.get(), maxQueryLen, format, ap);
     va_end(ap);
 
-    if (res == -1)
-    {
+    if (res == -1) {
         LOG_ERROR("SQL Query truncated (and not execute) for format: %s", format);
         return false;
     }
@@ -119,8 +119,7 @@ bool Database::Execute(const char *format, ...)
 std::unique_ptr<QueryResult> Database::Query(const char *format, ...)
 {
 
-    if (!format)
-    {
+    if (!format) {
         return nullptr;
     }
 
@@ -128,11 +127,10 @@ std::unique_ptr<QueryResult> Database::Query(const char *format, ...)
     auto szQuery = std::make_unique<char[]>(maxQueryLen);
     va_start(ap, format);
     szQuery.get()[0] = 0;
-    int res = vsnprintf(szQuery.get(), maxQueryLen, format, ap);
+    int res          = vsnprintf(szQuery.get(), maxQueryLen, format, ap);
     va_end(ap);
 
-    if (res == -1)
-    {
+    if (res == -1) {
         LOG_ERROR("SQL Query truncated (and not execute) for format: %s", format);
         return nullptr;
     }
@@ -140,8 +138,7 @@ std::unique_ptr<QueryResult> Database::Query(const char *format, ...)
     auto queryResult = std::make_unique<QueryResult>();
 
     int result = sqlite3_exec(dbConnection, szQuery.get(), queryCallback, queryResult.get(), NULL);
-    if (result != SQLITE_OK)
-    {
+    if (result != SQLITE_OK) {
         LOG_ERROR("SQL query failed selecting : %d", result);
         return nullptr;
     }
@@ -154,14 +151,11 @@ int Database::queryCallback(void *usrPtr, int count, char **data, char **columns
     QueryResult *db = reinterpret_cast<QueryResult *>(usrPtr);
 
     std::vector<Field> row;
-    for (uint32_t i = 0; i < (uint32_t)count; i++)
-    {
-        try
-        {
+    for (uint32_t i = 0; i < (uint32_t)count; i++) {
+        try {
             row.push_back(Field{data[i]});
         }
-        catch (...)
-        {
+        catch (...) {
             LOG_FATAL("Error on: %d %s", i, data[i]);
         }
     }
diff --git a/module-db/Database/Field.cpp b/module-db/Database/Field.cpp
index 26e04c682..d3ebaa911 100644
--- a/module-db/Database/Field.cpp
+++ b/module-db/Database/Field.cpp
@@ -7,20 +7,16 @@ const char *Field::GetCString() const
     return mValue.c_str();
 }
 
-template<class T>
-static T lget(T &val, const std::string &mValue, std::function<T()> foo)
+template <class T> static T lget(T &val, const std::string &mValue, std::function<T()> foo)
 {
-    val =0;
-    if (mValue.empty())
-    {
+    val = 0;
+    if (mValue.empty()) {
         return val;
     }
-    try
-    {
+    try {
         return foo();
     }
-    catch (...)
-    {
+    catch (...) {
         LOG_FATAL("Can't convert: %s to: %s", mValue.c_str(), typeid(T).name());
     }
     return val;
diff --git a/module-db/Database/Field.hpp b/module-db/Database/Field.hpp
index c5502760b..afb015416 100644
--- a/module-db/Database/Field.hpp
+++ b/module-db/Database/Field.hpp
@@ -17,13 +17,11 @@ class Field
 {
   public:
     Field() : mValue(nullptr)
-    {
-    }
+    {}
 
     Field(const char *value)
     {
-        if (value)
-        {
+        if (value) {
             mValue = value;
         }
     }
@@ -32,11 +30,13 @@ class Field
     // Field& operator=(Field const&);
 
     ~Field()
-    {
-    }
+    {}
 
     const char *GetCString() const;
-    std::string GetString() const { return mValue; }
+    std::string GetString() const
+    {
+        return mValue;
+    }
     float GetFloat() const;
     bool GetBool() const;
     double GetDouble() const;
diff --git a/module-db/Database/QueryResult.cpp b/module-db/Database/QueryResult.cpp
index 27cf0dd40..e8734efce 100644
--- a/module-db/Database/QueryResult.cpp
+++ b/module-db/Database/QueryResult.cpp
@@ -8,28 +8,25 @@
  * @details
  */
 
-
 #include "QueryResult.hpp"
 
+QueryResult::QueryResult() : currentRow(0), fieldCount(0), rowCount(0)
+{}
 
-QueryResult::QueryResult() :
-        currentRow(0),
-        fieldCount(0),
-        rowCount(0) {
-
-}
-
-void QueryResult::AddRow(const std::vector<Field> &row) {
+void QueryResult::AddRow(const std::vector<Field> &row)
+{
     rows.push_back(row);
     rowCount++;
     fieldCount = row.size();
 }
 
-bool QueryResult::NextRow() {
+bool QueryResult::NextRow()
+{
     if (currentRow < (rowCount - 1)) {
         currentRow++;
         return true;
-    } else {
+    }
+    else {
         return false;
     }
 }
\ No newline at end of file
diff --git a/module-db/Database/QueryResult.hpp b/module-db/Database/QueryResult.hpp
index e902fc3e0..516c49eab 100644
--- a/module-db/Database/QueryResult.hpp
+++ b/module-db/Database/QueryResult.hpp
@@ -15,30 +15,36 @@
 #include <memory>
 #include "Field.hpp"
 
-class QueryResult {
+class QueryResult
+{
 
-public:
+  public:
     QueryResult();
 
-    virtual ~QueryResult() {};
+    virtual ~QueryResult(){};
 
-
-    const Field &operator[](int index) const { return rows[currentRow][index]; }
+    const Field &operator[](int index) const
+    {
+        return rows[currentRow][index];
+    }
 
     bool NextRow();
 
     void AddRow(const std::vector<Field> &row);
 
-    uint32_t GetFieldCount() const { return fieldCount; }
+    uint32_t GetFieldCount() const
+    {
+        return fieldCount;
+    }
 
-    uint32_t GetRowCount() const { return rowCount; }
+    uint32_t GetRowCount() const
+    {
+        return rowCount;
+    }
 
-
-private:
+  private:
     uint32_t currentRow;
     std::vector<std::vector<Field>> rows;
     uint32_t fieldCount;
     uint32_t rowCount;
-
 };
-
diff --git a/module-db/Database/sqlite3ext.h b/module-db/Database/sqlite3ext.h
index e0cd2f4d8..43b436372 100644
--- a/module-db/Database/sqlite3ext.h
+++ b/module-db/Database/sqlite3ext.h
@@ -12,7 +12,7 @@
 ** This header file defines the SQLite interface for use by
 ** shared libraries that want to be imported as extensions into
 ** an SQLite instance.  Shared libraries that intend to be loaded
-** as extensions by SQLite should #include this file instead of 
+** as extensions by SQLite should #include this file instead of
 ** sqlite3.h.
 */
 #ifndef SQLITE3EXT_H
@@ -29,297 +29,298 @@
 ** versions of SQLite will not be able to load each other's shared
 ** libraries!
 */
-struct sqlite3_api_routines {
-  void * (*aggregate_context)(sqlite3_context*,int nBytes);
-  int  (*aggregate_count)(sqlite3_context*);
-  int  (*bind_blob)(sqlite3_stmt*,int,const void*,int n,void(*)(void*));
-  int  (*bind_double)(sqlite3_stmt*,int,double);
-  int  (*bind_int)(sqlite3_stmt*,int,int);
-  int  (*bind_int64)(sqlite3_stmt*,int,sqlite_int64);
-  int  (*bind_null)(sqlite3_stmt*,int);
-  int  (*bind_parameter_count)(sqlite3_stmt*);
-  int  (*bind_parameter_index)(sqlite3_stmt*,const char*zName);
-  const char * (*bind_parameter_name)(sqlite3_stmt*,int);
-  int  (*bind_text)(sqlite3_stmt*,int,const char*,int n,void(*)(void*));
-  int  (*bind_text16)(sqlite3_stmt*,int,const void*,int,void(*)(void*));
-  int  (*bind_value)(sqlite3_stmt*,int,const sqlite3_value*);
-  int  (*busy_handler)(sqlite3*,int(*)(void*,int),void*);
-  int  (*busy_timeout)(sqlite3*,int ms);
-  int  (*changes)(sqlite3*);
-  int  (*close)(sqlite3*);
-  int  (*collation_needed)(sqlite3*,void*,void(*)(void*,sqlite3*,
-                           int eTextRep,const char*));
-  int  (*collation_needed16)(sqlite3*,void*,void(*)(void*,sqlite3*,
-                             int eTextRep,const void*));
-  const void * (*column_blob)(sqlite3_stmt*,int iCol);
-  int  (*column_bytes)(sqlite3_stmt*,int iCol);
-  int  (*column_bytes16)(sqlite3_stmt*,int iCol);
-  int  (*column_count)(sqlite3_stmt*pStmt);
-  const char * (*column_database_name)(sqlite3_stmt*,int);
-  const void * (*column_database_name16)(sqlite3_stmt*,int);
-  const char * (*column_decltype)(sqlite3_stmt*,int i);
-  const void * (*column_decltype16)(sqlite3_stmt*,int);
-  double  (*column_double)(sqlite3_stmt*,int iCol);
-  int  (*column_int)(sqlite3_stmt*,int iCol);
-  sqlite_int64  (*column_int64)(sqlite3_stmt*,int iCol);
-  const char * (*column_name)(sqlite3_stmt*,int);
-  const void * (*column_name16)(sqlite3_stmt*,int);
-  const char * (*column_origin_name)(sqlite3_stmt*,int);
-  const void * (*column_origin_name16)(sqlite3_stmt*,int);
-  const char * (*column_table_name)(sqlite3_stmt*,int);
-  const void * (*column_table_name16)(sqlite3_stmt*,int);
-  const unsigned char * (*column_text)(sqlite3_stmt*,int iCol);
-  const void * (*column_text16)(sqlite3_stmt*,int iCol);
-  int  (*column_type)(sqlite3_stmt*,int iCol);
-  sqlite3_value* (*column_value)(sqlite3_stmt*,int iCol);
-  void * (*commit_hook)(sqlite3*,int(*)(void*),void*);
-  int  (*complete)(const char*sql);
-  int  (*complete16)(const void*sql);
-  int  (*create_collation)(sqlite3*,const char*,int,void*,
-                           int(*)(void*,int,const void*,int,const void*));
-  int  (*create_collation16)(sqlite3*,const void*,int,void*,
-                             int(*)(void*,int,const void*,int,const void*));
-  int  (*create_function)(sqlite3*,const char*,int,int,void*,
-                          void (*xFunc)(sqlite3_context*,int,sqlite3_value**),
-                          void (*xStep)(sqlite3_context*,int,sqlite3_value**),
-                          void (*xFinal)(sqlite3_context*));
-  int  (*create_function16)(sqlite3*,const void*,int,int,void*,
-                            void (*xFunc)(sqlite3_context*,int,sqlite3_value**),
-                            void (*xStep)(sqlite3_context*,int,sqlite3_value**),
-                            void (*xFinal)(sqlite3_context*));
-  int (*create_module)(sqlite3*,const char*,const sqlite3_module*,void*);
-  int  (*data_count)(sqlite3_stmt*pStmt);
-  sqlite3 * (*db_handle)(sqlite3_stmt*);
-  int (*declare_vtab)(sqlite3*,const char*);
-  int  (*enable_shared_cache)(int);
-  int  (*errcode)(sqlite3*db);
-  const char * (*errmsg)(sqlite3*);
-  const void * (*errmsg16)(sqlite3*);
-  int  (*exec)(sqlite3*,const char*,sqlite3_callback,void*,char**);
-  int  (*expired)(sqlite3_stmt*);
-  int  (*finalize)(sqlite3_stmt*pStmt);
-  void  (*free)(void*);
-  void  (*free_table)(char**result);
-  int  (*get_autocommit)(sqlite3*);
-  void * (*get_auxdata)(sqlite3_context*,int);
-  int  (*get_table)(sqlite3*,const char*,char***,int*,int*,char**);
-  int  (*global_recover)(void);
-  void  (*interruptx)(sqlite3*);
-  sqlite_int64  (*last_insert_rowid)(sqlite3*);
-  const char * (*libversion)(void);
-  int  (*libversion_number)(void);
-  void *(*malloc)(int);
-  char * (*mprintf)(const char*,...);
-  int  (*open)(const char*,sqlite3**);
-  int  (*open16)(const void*,sqlite3**);
-  int  (*prepare)(sqlite3*,const char*,int,sqlite3_stmt**,const char**);
-  int  (*prepare16)(sqlite3*,const void*,int,sqlite3_stmt**,const void**);
-  void * (*profile)(sqlite3*,void(*)(void*,const char*,sqlite_uint64),void*);
-  void  (*progress_handler)(sqlite3*,int,int(*)(void*),void*);
-  void *(*realloc)(void*,int);
-  int  (*reset)(sqlite3_stmt*pStmt);
-  void  (*result_blob)(sqlite3_context*,const void*,int,void(*)(void*));
-  void  (*result_double)(sqlite3_context*,double);
-  void  (*result_error)(sqlite3_context*,const char*,int);
-  void  (*result_error16)(sqlite3_context*,const void*,int);
-  void  (*result_int)(sqlite3_context*,int);
-  void  (*result_int64)(sqlite3_context*,sqlite_int64);
-  void  (*result_null)(sqlite3_context*);
-  void  (*result_text)(sqlite3_context*,const char*,int,void(*)(void*));
-  void  (*result_text16)(sqlite3_context*,const void*,int,void(*)(void*));
-  void  (*result_text16be)(sqlite3_context*,const void*,int,void(*)(void*));
-  void  (*result_text16le)(sqlite3_context*,const void*,int,void(*)(void*));
-  void  (*result_value)(sqlite3_context*,sqlite3_value*);
-  void * (*rollback_hook)(sqlite3*,void(*)(void*),void*);
-  int  (*set_authorizer)(sqlite3*,int(*)(void*,int,const char*,const char*,
-                         const char*,const char*),void*);
-  void  (*set_auxdata)(sqlite3_context*,int,void*,void (*)(void*));
-  char * (*xsnprintf)(int,char*,const char*,...);
-  int  (*step)(sqlite3_stmt*);
-  int  (*table_column_metadata)(sqlite3*,const char*,const char*,const char*,
-                                char const**,char const**,int*,int*,int*);
-  void  (*thread_cleanup)(void);
-  int  (*total_changes)(sqlite3*);
-  void * (*trace)(sqlite3*,void(*xTrace)(void*,const char*),void*);
-  int  (*transfer_bindings)(sqlite3_stmt*,sqlite3_stmt*);
-  void * (*update_hook)(sqlite3*,void(*)(void*,int ,char const*,char const*,
-                                         sqlite_int64),void*);
-  void * (*user_data)(sqlite3_context*);
-  const void * (*value_blob)(sqlite3_value*);
-  int  (*value_bytes)(sqlite3_value*);
-  int  (*value_bytes16)(sqlite3_value*);
-  double  (*value_double)(sqlite3_value*);
-  int  (*value_int)(sqlite3_value*);
-  sqlite_int64  (*value_int64)(sqlite3_value*);
-  int  (*value_numeric_type)(sqlite3_value*);
-  const unsigned char * (*value_text)(sqlite3_value*);
-  const void * (*value_text16)(sqlite3_value*);
-  const void * (*value_text16be)(sqlite3_value*);
-  const void * (*value_text16le)(sqlite3_value*);
-  int  (*value_type)(sqlite3_value*);
-  char *(*vmprintf)(const char*,va_list);
-  /* Added ??? */
-  int (*overload_function)(sqlite3*, const char *zFuncName, int nArg);
-  /* Added by 3.3.13 */
-  int (*prepare_v2)(sqlite3*,const char*,int,sqlite3_stmt**,const char**);
-  int (*prepare16_v2)(sqlite3*,const void*,int,sqlite3_stmt**,const void**);
-  int (*clear_bindings)(sqlite3_stmt*);
-  /* Added by 3.4.1 */
-  int (*create_module_v2)(sqlite3*,const char*,const sqlite3_module*,void*,
-                          void (*xDestroy)(void *));
-  /* Added by 3.5.0 */
-  int (*bind_zeroblob)(sqlite3_stmt*,int,int);
-  int (*blob_bytes)(sqlite3_blob*);
-  int (*blob_close)(sqlite3_blob*);
-  int (*blob_open)(sqlite3*,const char*,const char*,const char*,sqlite3_int64,
-                   int,sqlite3_blob**);
-  int (*blob_read)(sqlite3_blob*,void*,int,int);
-  int (*blob_write)(sqlite3_blob*,const void*,int,int);
-  int (*create_collation_v2)(sqlite3*,const char*,int,void*,
-                             int(*)(void*,int,const void*,int,const void*),
-                             void(*)(void*));
-  int (*file_control)(sqlite3*,const char*,int,void*);
-  sqlite3_int64 (*memory_highwater)(int);
-  sqlite3_int64 (*memory_used)(void);
-  sqlite3_mutex *(*mutex_alloc)(int);
-  void (*mutex_enter)(sqlite3_mutex*);
-  void (*mutex_free)(sqlite3_mutex*);
-  void (*mutex_leave)(sqlite3_mutex*);
-  int (*mutex_try)(sqlite3_mutex*);
-  int (*open_v2)(const char*,sqlite3**,int,const char*);
-  int (*release_memory)(int);
-  void (*result_error_nomem)(sqlite3_context*);
-  void (*result_error_toobig)(sqlite3_context*);
-  int (*sleep)(int);
-  void (*soft_heap_limit)(int);
-  sqlite3_vfs *(*vfs_find)(const char*);
-  int (*vfs_register)(sqlite3_vfs*,int);
-  int (*vfs_unregister)(sqlite3_vfs*);
-  int (*xthreadsafe)(void);
-  void (*result_zeroblob)(sqlite3_context*,int);
-  void (*result_error_code)(sqlite3_context*,int);
-  int (*test_control)(int, ...);
-  void (*randomness)(int,void*);
-  sqlite3 *(*context_db_handle)(sqlite3_context*);
-  int (*extended_result_codes)(sqlite3*,int);
-  int (*limit)(sqlite3*,int,int);
-  sqlite3_stmt *(*next_stmt)(sqlite3*,sqlite3_stmt*);
-  const char *(*sql)(sqlite3_stmt*);
-  int (*status)(int,int*,int*,int);
-  int (*backup_finish)(sqlite3_backup*);
-  sqlite3_backup *(*backup_init)(sqlite3*,const char*,sqlite3*,const char*);
-  int (*backup_pagecount)(sqlite3_backup*);
-  int (*backup_remaining)(sqlite3_backup*);
-  int (*backup_step)(sqlite3_backup*,int);
-  const char *(*compileoption_get)(int);
-  int (*compileoption_used)(const char*);
-  int (*create_function_v2)(sqlite3*,const char*,int,int,void*,
-                            void (*xFunc)(sqlite3_context*,int,sqlite3_value**),
-                            void (*xStep)(sqlite3_context*,int,sqlite3_value**),
-                            void (*xFinal)(sqlite3_context*),
-                            void(*xDestroy)(void*));
-  int (*db_config)(sqlite3*,int,...);
-  sqlite3_mutex *(*db_mutex)(sqlite3*);
-  int (*db_status)(sqlite3*,int,int*,int*,int);
-  int (*extended_errcode)(sqlite3*);
-  void (*log)(int,const char*,...);
-  sqlite3_int64 (*soft_heap_limit64)(sqlite3_int64);
-  const char *(*sourceid)(void);
-  int (*stmt_status)(sqlite3_stmt*,int,int);
-  int (*strnicmp)(const char*,const char*,int);
-  int (*unlock_notify)(sqlite3*,void(*)(void**,int),void*);
-  int (*wal_autocheckpoint)(sqlite3*,int);
-  int (*wal_checkpoint)(sqlite3*,const char*);
-  void *(*wal_hook)(sqlite3*,int(*)(void*,sqlite3*,const char*,int),void*);
-  int (*blob_reopen)(sqlite3_blob*,sqlite3_int64);
-  int (*vtab_config)(sqlite3*,int op,...);
-  int (*vtab_on_conflict)(sqlite3*);
-  /* Version 3.7.16 and later */
-  int (*close_v2)(sqlite3*);
-  const char *(*db_filename)(sqlite3*,const char*);
-  int (*db_readonly)(sqlite3*,const char*);
-  int (*db_release_memory)(sqlite3*);
-  const char *(*errstr)(int);
-  int (*stmt_busy)(sqlite3_stmt*);
-  int (*stmt_readonly)(sqlite3_stmt*);
-  int (*stricmp)(const char*,const char*);
-  int (*uri_boolean)(const char*,const char*,int);
-  sqlite3_int64 (*uri_int64)(const char*,const char*,sqlite3_int64);
-  const char *(*uri_parameter)(const char*,const char*);
-  char *(*xvsnprintf)(int,char*,const char*,va_list);
-  int (*wal_checkpoint_v2)(sqlite3*,const char*,int,int*,int*);
-  /* Version 3.8.7 and later */
-  int (*auto_extension)(void(*)(void));
-  int (*bind_blob64)(sqlite3_stmt*,int,const void*,sqlite3_uint64,
-                     void(*)(void*));
-  int (*bind_text64)(sqlite3_stmt*,int,const char*,sqlite3_uint64,
-                      void(*)(void*),unsigned char);
-  int (*cancel_auto_extension)(void(*)(void));
-  int (*load_extension)(sqlite3*,const char*,const char*,char**);
-  void *(*malloc64)(sqlite3_uint64);
-  sqlite3_uint64 (*msize)(void*);
-  void *(*realloc64)(void*,sqlite3_uint64);
-  void (*reset_auto_extension)(void);
-  void (*result_blob64)(sqlite3_context*,const void*,sqlite3_uint64,
-                        void(*)(void*));
-  void (*result_text64)(sqlite3_context*,const char*,sqlite3_uint64,
-                         void(*)(void*), unsigned char);
-  int (*strglob)(const char*,const char*);
-  /* Version 3.8.11 and later */
-  sqlite3_value *(*value_dup)(const sqlite3_value*);
-  void (*value_free)(sqlite3_value*);
-  int (*result_zeroblob64)(sqlite3_context*,sqlite3_uint64);
-  int (*bind_zeroblob64)(sqlite3_stmt*, int, sqlite3_uint64);
-  /* Version 3.9.0 and later */
-  unsigned int (*value_subtype)(sqlite3_value*);
-  void (*result_subtype)(sqlite3_context*,unsigned int);
-  /* Version 3.10.0 and later */
-  int (*status64)(int,sqlite3_int64*,sqlite3_int64*,int);
-  int (*strlike)(const char*,const char*,unsigned int);
-  int (*db_cacheflush)(sqlite3*);
-  /* Version 3.12.0 and later */
-  int (*system_errno)(sqlite3*);
-  /* Version 3.14.0 and later */
-  int (*trace_v2)(sqlite3*,unsigned,int(*)(unsigned,void*,void*,void*),void*);
-  char *(*expanded_sql)(sqlite3_stmt*);
-  /* Version 3.18.0 and later */
-  void (*set_last_insert_rowid)(sqlite3*,sqlite3_int64);
-  /* Version 3.20.0 and later */
-  int (*prepare_v3)(sqlite3*,const char*,int,unsigned int,
-                    sqlite3_stmt**,const char**);
-  int (*prepare16_v3)(sqlite3*,const void*,int,unsigned int,
-                      sqlite3_stmt**,const void**);
-  int (*bind_pointer)(sqlite3_stmt*,int,void*,const char*,void(*)(void*));
-  void (*result_pointer)(sqlite3_context*,void*,const char*,void(*)(void*));
-  void *(*value_pointer)(sqlite3_value*,const char*);
-  int (*vtab_nochange)(sqlite3_context*);
-  int (*value_nochange)(sqlite3_value*);
-  const char *(*vtab_collation)(sqlite3_index_info*,int);
-  /* Version 3.24.0 and later */
-  int (*keyword_count)(void);
-  int (*keyword_name)(int,const char**,int*);
-  int (*keyword_check)(const char*,int);
-  sqlite3_str *(*str_new)(sqlite3*);
-  char *(*str_finish)(sqlite3_str*);
-  void (*str_appendf)(sqlite3_str*, const char *zFormat, ...);
-  void (*str_vappendf)(sqlite3_str*, const char *zFormat, va_list);
-  void (*str_append)(sqlite3_str*, const char *zIn, int N);
-  void (*str_appendall)(sqlite3_str*, const char *zIn);
-  void (*str_appendchar)(sqlite3_str*, int N, char C);
-  void (*str_reset)(sqlite3_str*);
-  int (*str_errcode)(sqlite3_str*);
-  int (*str_length)(sqlite3_str*);
-  char *(*str_value)(sqlite3_str*);
+struct sqlite3_api_routines
+{
+    void *(*aggregate_context)(sqlite3_context *, int nBytes);
+    int (*aggregate_count)(sqlite3_context *);
+    int (*bind_blob)(sqlite3_stmt *, int, const void *, int n, void (*)(void *));
+    int (*bind_double)(sqlite3_stmt *, int, double);
+    int (*bind_int)(sqlite3_stmt *, int, int);
+    int (*bind_int64)(sqlite3_stmt *, int, sqlite_int64);
+    int (*bind_null)(sqlite3_stmt *, int);
+    int (*bind_parameter_count)(sqlite3_stmt *);
+    int (*bind_parameter_index)(sqlite3_stmt *, const char *zName);
+    const char *(*bind_parameter_name)(sqlite3_stmt *, int);
+    int (*bind_text)(sqlite3_stmt *, int, const char *, int n, void (*)(void *));
+    int (*bind_text16)(sqlite3_stmt *, int, const void *, int, void (*)(void *));
+    int (*bind_value)(sqlite3_stmt *, int, const sqlite3_value *);
+    int (*busy_handler)(sqlite3 *, int (*)(void *, int), void *);
+    int (*busy_timeout)(sqlite3 *, int ms);
+    int (*changes)(sqlite3 *);
+    int (*close)(sqlite3 *);
+    int (*collation_needed)(sqlite3 *, void *, void (*)(void *, sqlite3 *, int eTextRep, const char *));
+    int (*collation_needed16)(sqlite3 *, void *, void (*)(void *, sqlite3 *, int eTextRep, const void *));
+    const void *(*column_blob)(sqlite3_stmt *, int iCol);
+    int (*column_bytes)(sqlite3_stmt *, int iCol);
+    int (*column_bytes16)(sqlite3_stmt *, int iCol);
+    int (*column_count)(sqlite3_stmt *pStmt);
+    const char *(*column_database_name)(sqlite3_stmt *, int);
+    const void *(*column_database_name16)(sqlite3_stmt *, int);
+    const char *(*column_decltype)(sqlite3_stmt *, int i);
+    const void *(*column_decltype16)(sqlite3_stmt *, int);
+    double (*column_double)(sqlite3_stmt *, int iCol);
+    int (*column_int)(sqlite3_stmt *, int iCol);
+    sqlite_int64 (*column_int64)(sqlite3_stmt *, int iCol);
+    const char *(*column_name)(sqlite3_stmt *, int);
+    const void *(*column_name16)(sqlite3_stmt *, int);
+    const char *(*column_origin_name)(sqlite3_stmt *, int);
+    const void *(*column_origin_name16)(sqlite3_stmt *, int);
+    const char *(*column_table_name)(sqlite3_stmt *, int);
+    const void *(*column_table_name16)(sqlite3_stmt *, int);
+    const unsigned char *(*column_text)(sqlite3_stmt *, int iCol);
+    const void *(*column_text16)(sqlite3_stmt *, int iCol);
+    int (*column_type)(sqlite3_stmt *, int iCol);
+    sqlite3_value *(*column_value)(sqlite3_stmt *, int iCol);
+    void *(*commit_hook)(sqlite3 *, int (*)(void *), void *);
+    int (*complete)(const char *sql);
+    int (*complete16)(const void *sql);
+    int (*create_collation)(
+        sqlite3 *, const char *, int, void *, int (*)(void *, int, const void *, int, const void *));
+    int (*create_collation16)(
+        sqlite3 *, const void *, int, void *, int (*)(void *, int, const void *, int, const void *));
+    int (*create_function)(sqlite3 *,
+                           const char *,
+                           int,
+                           int,
+                           void *,
+                           void (*xFunc)(sqlite3_context *, int, sqlite3_value **),
+                           void (*xStep)(sqlite3_context *, int, sqlite3_value **),
+                           void (*xFinal)(sqlite3_context *));
+    int (*create_function16)(sqlite3 *,
+                             const void *,
+                             int,
+                             int,
+                             void *,
+                             void (*xFunc)(sqlite3_context *, int, sqlite3_value **),
+                             void (*xStep)(sqlite3_context *, int, sqlite3_value **),
+                             void (*xFinal)(sqlite3_context *));
+    int (*create_module)(sqlite3 *, const char *, const sqlite3_module *, void *);
+    int (*data_count)(sqlite3_stmt *pStmt);
+    sqlite3 *(*db_handle)(sqlite3_stmt *);
+    int (*declare_vtab)(sqlite3 *, const char *);
+    int (*enable_shared_cache)(int);
+    int (*errcode)(sqlite3 *db);
+    const char *(*errmsg)(sqlite3 *);
+    const void *(*errmsg16)(sqlite3 *);
+    int (*exec)(sqlite3 *, const char *, sqlite3_callback, void *, char **);
+    int (*expired)(sqlite3_stmt *);
+    int (*finalize)(sqlite3_stmt *pStmt);
+    void (*free)(void *);
+    void (*free_table)(char **result);
+    int (*get_autocommit)(sqlite3 *);
+    void *(*get_auxdata)(sqlite3_context *, int);
+    int (*get_table)(sqlite3 *, const char *, char ***, int *, int *, char **);
+    int (*global_recover)(void);
+    void (*interruptx)(sqlite3 *);
+    sqlite_int64 (*last_insert_rowid)(sqlite3 *);
+    const char *(*libversion)(void);
+    int (*libversion_number)(void);
+    void *(*malloc)(int);
+    char *(*mprintf)(const char *, ...);
+    int (*open)(const char *, sqlite3 **);
+    int (*open16)(const void *, sqlite3 **);
+    int (*prepare)(sqlite3 *, const char *, int, sqlite3_stmt **, const char **);
+    int (*prepare16)(sqlite3 *, const void *, int, sqlite3_stmt **, const void **);
+    void *(*profile)(sqlite3 *, void (*)(void *, const char *, sqlite_uint64), void *);
+    void (*progress_handler)(sqlite3 *, int, int (*)(void *), void *);
+    void *(*realloc)(void *, int);
+    int (*reset)(sqlite3_stmt *pStmt);
+    void (*result_blob)(sqlite3_context *, const void *, int, void (*)(void *));
+    void (*result_double)(sqlite3_context *, double);
+    void (*result_error)(sqlite3_context *, const char *, int);
+    void (*result_error16)(sqlite3_context *, const void *, int);
+    void (*result_int)(sqlite3_context *, int);
+    void (*result_int64)(sqlite3_context *, sqlite_int64);
+    void (*result_null)(sqlite3_context *);
+    void (*result_text)(sqlite3_context *, const char *, int, void (*)(void *));
+    void (*result_text16)(sqlite3_context *, const void *, int, void (*)(void *));
+    void (*result_text16be)(sqlite3_context *, const void *, int, void (*)(void *));
+    void (*result_text16le)(sqlite3_context *, const void *, int, void (*)(void *));
+    void (*result_value)(sqlite3_context *, sqlite3_value *);
+    void *(*rollback_hook)(sqlite3 *, void (*)(void *), void *);
+    int (*set_authorizer)(sqlite3 *,
+                          int (*)(void *, int, const char *, const char *, const char *, const char *),
+                          void *);
+    void (*set_auxdata)(sqlite3_context *, int, void *, void (*)(void *));
+    char *(*xsnprintf)(int, char *, const char *, ...);
+    int (*step)(sqlite3_stmt *);
+    int (*table_column_metadata)(
+        sqlite3 *, const char *, const char *, const char *, char const **, char const **, int *, int *, int *);
+    void (*thread_cleanup)(void);
+    int (*total_changes)(sqlite3 *);
+    void *(*trace)(sqlite3 *, void (*xTrace)(void *, const char *), void *);
+    int (*transfer_bindings)(sqlite3_stmt *, sqlite3_stmt *);
+    void *(*update_hook)(sqlite3 *, void (*)(void *, int, char const *, char const *, sqlite_int64), void *);
+    void *(*user_data)(sqlite3_context *);
+    const void *(*value_blob)(sqlite3_value *);
+    int (*value_bytes)(sqlite3_value *);
+    int (*value_bytes16)(sqlite3_value *);
+    double (*value_double)(sqlite3_value *);
+    int (*value_int)(sqlite3_value *);
+    sqlite_int64 (*value_int64)(sqlite3_value *);
+    int (*value_numeric_type)(sqlite3_value *);
+    const unsigned char *(*value_text)(sqlite3_value *);
+    const void *(*value_text16)(sqlite3_value *);
+    const void *(*value_text16be)(sqlite3_value *);
+    const void *(*value_text16le)(sqlite3_value *);
+    int (*value_type)(sqlite3_value *);
+    char *(*vmprintf)(const char *, va_list);
+    /* Added ??? */
+    int (*overload_function)(sqlite3 *, const char *zFuncName, int nArg);
+    /* Added by 3.3.13 */
+    int (*prepare_v2)(sqlite3 *, const char *, int, sqlite3_stmt **, const char **);
+    int (*prepare16_v2)(sqlite3 *, const void *, int, sqlite3_stmt **, const void **);
+    int (*clear_bindings)(sqlite3_stmt *);
+    /* Added by 3.4.1 */
+    int (*create_module_v2)(sqlite3 *, const char *, const sqlite3_module *, void *, void (*xDestroy)(void *));
+    /* Added by 3.5.0 */
+    int (*bind_zeroblob)(sqlite3_stmt *, int, int);
+    int (*blob_bytes)(sqlite3_blob *);
+    int (*blob_close)(sqlite3_blob *);
+    int (*blob_open)(sqlite3 *, const char *, const char *, const char *, sqlite3_int64, int, sqlite3_blob **);
+    int (*blob_read)(sqlite3_blob *, void *, int, int);
+    int (*blob_write)(sqlite3_blob *, const void *, int, int);
+    int (*create_collation_v2)(
+        sqlite3 *, const char *, int, void *, int (*)(void *, int, const void *, int, const void *), void (*)(void *));
+    int (*file_control)(sqlite3 *, const char *, int, void *);
+    sqlite3_int64 (*memory_highwater)(int);
+    sqlite3_int64 (*memory_used)(void);
+    sqlite3_mutex *(*mutex_alloc)(int);
+    void (*mutex_enter)(sqlite3_mutex *);
+    void (*mutex_free)(sqlite3_mutex *);
+    void (*mutex_leave)(sqlite3_mutex *);
+    int (*mutex_try)(sqlite3_mutex *);
+    int (*open_v2)(const char *, sqlite3 **, int, const char *);
+    int (*release_memory)(int);
+    void (*result_error_nomem)(sqlite3_context *);
+    void (*result_error_toobig)(sqlite3_context *);
+    int (*sleep)(int);
+    void (*soft_heap_limit)(int);
+    sqlite3_vfs *(*vfs_find)(const char *);
+    int (*vfs_register)(sqlite3_vfs *, int);
+    int (*vfs_unregister)(sqlite3_vfs *);
+    int (*xthreadsafe)(void);
+    void (*result_zeroblob)(sqlite3_context *, int);
+    void (*result_error_code)(sqlite3_context *, int);
+    int (*test_control)(int, ...);
+    void (*randomness)(int, void *);
+    sqlite3 *(*context_db_handle)(sqlite3_context *);
+    int (*extended_result_codes)(sqlite3 *, int);
+    int (*limit)(sqlite3 *, int, int);
+    sqlite3_stmt *(*next_stmt)(sqlite3 *, sqlite3_stmt *);
+    const char *(*sql)(sqlite3_stmt *);
+    int (*status)(int, int *, int *, int);
+    int (*backup_finish)(sqlite3_backup *);
+    sqlite3_backup *(*backup_init)(sqlite3 *, const char *, sqlite3 *, const char *);
+    int (*backup_pagecount)(sqlite3_backup *);
+    int (*backup_remaining)(sqlite3_backup *);
+    int (*backup_step)(sqlite3_backup *, int);
+    const char *(*compileoption_get)(int);
+    int (*compileoption_used)(const char *);
+    int (*create_function_v2)(sqlite3 *,
+                              const char *,
+                              int,
+                              int,
+                              void *,
+                              void (*xFunc)(sqlite3_context *, int, sqlite3_value **),
+                              void (*xStep)(sqlite3_context *, int, sqlite3_value **),
+                              void (*xFinal)(sqlite3_context *),
+                              void (*xDestroy)(void *));
+    int (*db_config)(sqlite3 *, int, ...);
+    sqlite3_mutex *(*db_mutex)(sqlite3 *);
+    int (*db_status)(sqlite3 *, int, int *, int *, int);
+    int (*extended_errcode)(sqlite3 *);
+    void (*log)(int, const char *, ...);
+    sqlite3_int64 (*soft_heap_limit64)(sqlite3_int64);
+    const char *(*sourceid)(void);
+    int (*stmt_status)(sqlite3_stmt *, int, int);
+    int (*strnicmp)(const char *, const char *, int);
+    int (*unlock_notify)(sqlite3 *, void (*)(void **, int), void *);
+    int (*wal_autocheckpoint)(sqlite3 *, int);
+    int (*wal_checkpoint)(sqlite3 *, const char *);
+    void *(*wal_hook)(sqlite3 *, int (*)(void *, sqlite3 *, const char *, int), void *);
+    int (*blob_reopen)(sqlite3_blob *, sqlite3_int64);
+    int (*vtab_config)(sqlite3 *, int op, ...);
+    int (*vtab_on_conflict)(sqlite3 *);
+    /* Version 3.7.16 and later */
+    int (*close_v2)(sqlite3 *);
+    const char *(*db_filename)(sqlite3 *, const char *);
+    int (*db_readonly)(sqlite3 *, const char *);
+    int (*db_release_memory)(sqlite3 *);
+    const char *(*errstr)(int);
+    int (*stmt_busy)(sqlite3_stmt *);
+    int (*stmt_readonly)(sqlite3_stmt *);
+    int (*stricmp)(const char *, const char *);
+    int (*uri_boolean)(const char *, const char *, int);
+    sqlite3_int64 (*uri_int64)(const char *, const char *, sqlite3_int64);
+    const char *(*uri_parameter)(const char *, const char *);
+    char *(*xvsnprintf)(int, char *, const char *, va_list);
+    int (*wal_checkpoint_v2)(sqlite3 *, const char *, int, int *, int *);
+    /* Version 3.8.7 and later */
+    int (*auto_extension)(void (*)(void));
+    int (*bind_blob64)(sqlite3_stmt *, int, const void *, sqlite3_uint64, void (*)(void *));
+    int (*bind_text64)(sqlite3_stmt *, int, const char *, sqlite3_uint64, void (*)(void *), unsigned char);
+    int (*cancel_auto_extension)(void (*)(void));
+    int (*load_extension)(sqlite3 *, const char *, const char *, char **);
+    void *(*malloc64)(sqlite3_uint64);
+    sqlite3_uint64 (*msize)(void *);
+    void *(*realloc64)(void *, sqlite3_uint64);
+    void (*reset_auto_extension)(void);
+    void (*result_blob64)(sqlite3_context *, const void *, sqlite3_uint64, void (*)(void *));
+    void (*result_text64)(sqlite3_context *, const char *, sqlite3_uint64, void (*)(void *), unsigned char);
+    int (*strglob)(const char *, const char *);
+    /* Version 3.8.11 and later */
+    sqlite3_value *(*value_dup)(const sqlite3_value *);
+    void (*value_free)(sqlite3_value *);
+    int (*result_zeroblob64)(sqlite3_context *, sqlite3_uint64);
+    int (*bind_zeroblob64)(sqlite3_stmt *, int, sqlite3_uint64);
+    /* Version 3.9.0 and later */
+    unsigned int (*value_subtype)(sqlite3_value *);
+    void (*result_subtype)(sqlite3_context *, unsigned int);
+    /* Version 3.10.0 and later */
+    int (*status64)(int, sqlite3_int64 *, sqlite3_int64 *, int);
+    int (*strlike)(const char *, const char *, unsigned int);
+    int (*db_cacheflush)(sqlite3 *);
+    /* Version 3.12.0 and later */
+    int (*system_errno)(sqlite3 *);
+    /* Version 3.14.0 and later */
+    int (*trace_v2)(sqlite3 *, unsigned, int (*)(unsigned, void *, void *, void *), void *);
+    char *(*expanded_sql)(sqlite3_stmt *);
+    /* Version 3.18.0 and later */
+    void (*set_last_insert_rowid)(sqlite3 *, sqlite3_int64);
+    /* Version 3.20.0 and later */
+    int (*prepare_v3)(sqlite3 *, const char *, int, unsigned int, sqlite3_stmt **, const char **);
+    int (*prepare16_v3)(sqlite3 *, const void *, int, unsigned int, sqlite3_stmt **, const void **);
+    int (*bind_pointer)(sqlite3_stmt *, int, void *, const char *, void (*)(void *));
+    void (*result_pointer)(sqlite3_context *, void *, const char *, void (*)(void *));
+    void *(*value_pointer)(sqlite3_value *, const char *);
+    int (*vtab_nochange)(sqlite3_context *);
+    int (*value_nochange)(sqlite3_value *);
+    const char *(*vtab_collation)(sqlite3_index_info *, int);
+    /* Version 3.24.0 and later */
+    int (*keyword_count)(void);
+    int (*keyword_name)(int, const char **, int *);
+    int (*keyword_check)(const char *, int);
+    sqlite3_str *(*str_new)(sqlite3 *);
+    char *(*str_finish)(sqlite3_str *);
+    void (*str_appendf)(sqlite3_str *, const char *zFormat, ...);
+    void (*str_vappendf)(sqlite3_str *, const char *zFormat, va_list);
+    void (*str_append)(sqlite3_str *, const char *zIn, int N);
+    void (*str_appendall)(sqlite3_str *, const char *zIn);
+    void (*str_appendchar)(sqlite3_str *, int N, char C);
+    void (*str_reset)(sqlite3_str *);
+    int (*str_errcode)(sqlite3_str *);
+    int (*str_length)(sqlite3_str *);
+    char *(*str_value)(sqlite3_str *);
 };
 
 /*
 ** This is the function signature used for all extension entry points.  It
 ** is also defined in the file "loadext.c".
 */
-typedef int (*sqlite3_loadext_entry)(
-  sqlite3 *db,                       /* Handle to the database. */
-  char **pzErrMsg,                   /* Used to set error string on failure. */
-  const sqlite3_api_routines *pThunk /* Extension API function pointers. */
+typedef int (*sqlite3_loadext_entry)(sqlite3 *db,                       /* Handle to the database. */
+                                     char **pzErrMsg,                   /* Used to set error string on failure. */
+                                     const sqlite3_api_routines *pThunk /* Extension API function pointers. */
 );
 
 /*
@@ -334,9 +335,9 @@ typedef int (*sqlite3_loadext_entry)(
 ** SQLITE_CORE macros is undefined.
 */
 #if !defined(SQLITE_CORE) && !defined(SQLITE_OMIT_LOAD_EXTENSION)
-#define sqlite3_aggregate_context      sqlite3_api->aggregate_context
+#define sqlite3_aggregate_context sqlite3_api->aggregate_context
 #ifndef SQLITE_OMIT_DEPRECATED
-#define sqlite3_aggregate_count        sqlite3_api->aggregate_count
+#define sqlite3_aggregate_count sqlite3_api->aggregate_count
 #endif
 #define sqlite3_bind_blob              sqlite3_api->bind_blob
 #define sqlite3_bind_double            sqlite3_api->bind_double
@@ -394,222 +395,221 @@ typedef int (*sqlite3_loadext_entry)(
 #define sqlite3_errmsg16               sqlite3_api->errmsg16
 #define sqlite3_exec                   sqlite3_api->exec
 #ifndef SQLITE_OMIT_DEPRECATED
-#define sqlite3_expired                sqlite3_api->expired
+#define sqlite3_expired sqlite3_api->expired
 #endif
-#define sqlite3_finalize               sqlite3_api->finalize
-#define sqlite3_free                   sqlite3_api->free
-#define sqlite3_free_table             sqlite3_api->free_table
-#define sqlite3_get_autocommit         sqlite3_api->get_autocommit
-#define sqlite3_get_auxdata            sqlite3_api->get_auxdata
-#define sqlite3_get_table              sqlite3_api->get_table
+#define sqlite3_finalize       sqlite3_api->finalize
+#define sqlite3_free           sqlite3_api->free
+#define sqlite3_free_table     sqlite3_api->free_table
+#define sqlite3_get_autocommit sqlite3_api->get_autocommit
+#define sqlite3_get_auxdata    sqlite3_api->get_auxdata
+#define sqlite3_get_table      sqlite3_api->get_table
 #ifndef SQLITE_OMIT_DEPRECATED
-#define sqlite3_global_recover         sqlite3_api->global_recover
+#define sqlite3_global_recover sqlite3_api->global_recover
 #endif
-#define sqlite3_interrupt              sqlite3_api->interruptx
-#define sqlite3_last_insert_rowid      sqlite3_api->last_insert_rowid
-#define sqlite3_libversion             sqlite3_api->libversion
-#define sqlite3_libversion_number      sqlite3_api->libversion_number
-#define sqlite3_malloc                 sqlite3_api->malloc
-#define sqlite3_mprintf                sqlite3_api->mprintf
-#define sqlite3_open                   sqlite3_api->open
-#define sqlite3_open16                 sqlite3_api->open16
-#define sqlite3_prepare                sqlite3_api->prepare
-#define sqlite3_prepare16              sqlite3_api->prepare16
-#define sqlite3_prepare_v2             sqlite3_api->prepare_v2
-#define sqlite3_prepare16_v2           sqlite3_api->prepare16_v2
-#define sqlite3_profile                sqlite3_api->profile
-#define sqlite3_progress_handler       sqlite3_api->progress_handler
-#define sqlite3_realloc                sqlite3_api->realloc
-#define sqlite3_reset                  sqlite3_api->reset
-#define sqlite3_result_blob            sqlite3_api->result_blob
-#define sqlite3_result_double          sqlite3_api->result_double
-#define sqlite3_result_error           sqlite3_api->result_error
-#define sqlite3_result_error16         sqlite3_api->result_error16
-#define sqlite3_result_int             sqlite3_api->result_int
-#define sqlite3_result_int64           sqlite3_api->result_int64
-#define sqlite3_result_null            sqlite3_api->result_null
-#define sqlite3_result_text            sqlite3_api->result_text
-#define sqlite3_result_text16          sqlite3_api->result_text16
-#define sqlite3_result_text16be        sqlite3_api->result_text16be
-#define sqlite3_result_text16le        sqlite3_api->result_text16le
-#define sqlite3_result_value           sqlite3_api->result_value
-#define sqlite3_rollback_hook          sqlite3_api->rollback_hook
-#define sqlite3_set_authorizer         sqlite3_api->set_authorizer
-#define sqlite3_set_auxdata            sqlite3_api->set_auxdata
-#define sqlite3_snprintf               sqlite3_api->xsnprintf
-#define sqlite3_step                   sqlite3_api->step
-#define sqlite3_table_column_metadata  sqlite3_api->table_column_metadata
-#define sqlite3_thread_cleanup         sqlite3_api->thread_cleanup
-#define sqlite3_total_changes          sqlite3_api->total_changes
-#define sqlite3_trace                  sqlite3_api->trace
+#define sqlite3_interrupt             sqlite3_api->interruptx
+#define sqlite3_last_insert_rowid     sqlite3_api->last_insert_rowid
+#define sqlite3_libversion            sqlite3_api->libversion
+#define sqlite3_libversion_number     sqlite3_api->libversion_number
+#define sqlite3_malloc                sqlite3_api->malloc
+#define sqlite3_mprintf               sqlite3_api->mprintf
+#define sqlite3_open                  sqlite3_api->open
+#define sqlite3_open16                sqlite3_api->open16
+#define sqlite3_prepare               sqlite3_api->prepare
+#define sqlite3_prepare16             sqlite3_api->prepare16
+#define sqlite3_prepare_v2            sqlite3_api->prepare_v2
+#define sqlite3_prepare16_v2          sqlite3_api->prepare16_v2
+#define sqlite3_profile               sqlite3_api->profile
+#define sqlite3_progress_handler      sqlite3_api->progress_handler
+#define sqlite3_realloc               sqlite3_api->realloc
+#define sqlite3_reset                 sqlite3_api->reset
+#define sqlite3_result_blob           sqlite3_api->result_blob
+#define sqlite3_result_double         sqlite3_api->result_double
+#define sqlite3_result_error          sqlite3_api->result_error
+#define sqlite3_result_error16        sqlite3_api->result_error16
+#define sqlite3_result_int            sqlite3_api->result_int
+#define sqlite3_result_int64          sqlite3_api->result_int64
+#define sqlite3_result_null           sqlite3_api->result_null
+#define sqlite3_result_text           sqlite3_api->result_text
+#define sqlite3_result_text16         sqlite3_api->result_text16
+#define sqlite3_result_text16be       sqlite3_api->result_text16be
+#define sqlite3_result_text16le       sqlite3_api->result_text16le
+#define sqlite3_result_value          sqlite3_api->result_value
+#define sqlite3_rollback_hook         sqlite3_api->rollback_hook
+#define sqlite3_set_authorizer        sqlite3_api->set_authorizer
+#define sqlite3_set_auxdata           sqlite3_api->set_auxdata
+#define sqlite3_snprintf              sqlite3_api->xsnprintf
+#define sqlite3_step                  sqlite3_api->step
+#define sqlite3_table_column_metadata sqlite3_api->table_column_metadata
+#define sqlite3_thread_cleanup        sqlite3_api->thread_cleanup
+#define sqlite3_total_changes         sqlite3_api->total_changes
+#define sqlite3_trace                 sqlite3_api->trace
 #ifndef SQLITE_OMIT_DEPRECATED
-#define sqlite3_transfer_bindings      sqlite3_api->transfer_bindings
+#define sqlite3_transfer_bindings sqlite3_api->transfer_bindings
 #endif
-#define sqlite3_update_hook            sqlite3_api->update_hook
-#define sqlite3_user_data              sqlite3_api->user_data
-#define sqlite3_value_blob             sqlite3_api->value_blob
-#define sqlite3_value_bytes            sqlite3_api->value_bytes
-#define sqlite3_value_bytes16          sqlite3_api->value_bytes16
-#define sqlite3_value_double           sqlite3_api->value_double
-#define sqlite3_value_int              sqlite3_api->value_int
-#define sqlite3_value_int64            sqlite3_api->value_int64
-#define sqlite3_value_numeric_type     sqlite3_api->value_numeric_type
-#define sqlite3_value_text             sqlite3_api->value_text
-#define sqlite3_value_text16           sqlite3_api->value_text16
-#define sqlite3_value_text16be         sqlite3_api->value_text16be
-#define sqlite3_value_text16le         sqlite3_api->value_text16le
-#define sqlite3_value_type             sqlite3_api->value_type
-#define sqlite3_vmprintf               sqlite3_api->vmprintf
-#define sqlite3_vsnprintf              sqlite3_api->xvsnprintf
-#define sqlite3_overload_function      sqlite3_api->overload_function
-#define sqlite3_prepare_v2             sqlite3_api->prepare_v2
-#define sqlite3_prepare16_v2           sqlite3_api->prepare16_v2
-#define sqlite3_clear_bindings         sqlite3_api->clear_bindings
-#define sqlite3_bind_zeroblob          sqlite3_api->bind_zeroblob
-#define sqlite3_blob_bytes             sqlite3_api->blob_bytes
-#define sqlite3_blob_close             sqlite3_api->blob_close
-#define sqlite3_blob_open              sqlite3_api->blob_open
-#define sqlite3_blob_read              sqlite3_api->blob_read
-#define sqlite3_blob_write             sqlite3_api->blob_write
-#define sqlite3_create_collation_v2    sqlite3_api->create_collation_v2
-#define sqlite3_file_control           sqlite3_api->file_control
-#define sqlite3_memory_highwater       sqlite3_api->memory_highwater
-#define sqlite3_memory_used            sqlite3_api->memory_used
-#define sqlite3_mutex_alloc            sqlite3_api->mutex_alloc
-#define sqlite3_mutex_enter            sqlite3_api->mutex_enter
-#define sqlite3_mutex_free             sqlite3_api->mutex_free
-#define sqlite3_mutex_leave            sqlite3_api->mutex_leave
-#define sqlite3_mutex_try              sqlite3_api->mutex_try
-#define sqlite3_open_v2                sqlite3_api->open_v2
-#define sqlite3_release_memory         sqlite3_api->release_memory
-#define sqlite3_result_error_nomem     sqlite3_api->result_error_nomem
-#define sqlite3_result_error_toobig    sqlite3_api->result_error_toobig
-#define sqlite3_sleep                  sqlite3_api->sleep
-#define sqlite3_soft_heap_limit        sqlite3_api->soft_heap_limit
-#define sqlite3_vfs_find               sqlite3_api->vfs_find
-#define sqlite3_vfs_register           sqlite3_api->vfs_register
-#define sqlite3_vfs_unregister         sqlite3_api->vfs_unregister
-#define sqlite3_threadsafe             sqlite3_api->xthreadsafe
-#define sqlite3_result_zeroblob        sqlite3_api->result_zeroblob
-#define sqlite3_result_error_code      sqlite3_api->result_error_code
-#define sqlite3_test_control           sqlite3_api->test_control
-#define sqlite3_randomness             sqlite3_api->randomness
-#define sqlite3_context_db_handle      sqlite3_api->context_db_handle
-#define sqlite3_extended_result_codes  sqlite3_api->extended_result_codes
-#define sqlite3_limit                  sqlite3_api->limit
-#define sqlite3_next_stmt              sqlite3_api->next_stmt
-#define sqlite3_sql                    sqlite3_api->sql
-#define sqlite3_status                 sqlite3_api->status
-#define sqlite3_backup_finish          sqlite3_api->backup_finish
-#define sqlite3_backup_init            sqlite3_api->backup_init
-#define sqlite3_backup_pagecount       sqlite3_api->backup_pagecount
-#define sqlite3_backup_remaining       sqlite3_api->backup_remaining
-#define sqlite3_backup_step            sqlite3_api->backup_step
-#define sqlite3_compileoption_get      sqlite3_api->compileoption_get
-#define sqlite3_compileoption_used     sqlite3_api->compileoption_used
-#define sqlite3_create_function_v2     sqlite3_api->create_function_v2
-#define sqlite3_db_config              sqlite3_api->db_config
-#define sqlite3_db_mutex               sqlite3_api->db_mutex
-#define sqlite3_db_status              sqlite3_api->db_status
-#define sqlite3_extended_errcode       sqlite3_api->extended_errcode
-#define sqlite3_log                    sqlite3_api->log
-#define sqlite3_soft_heap_limit64      sqlite3_api->soft_heap_limit64
-#define sqlite3_sourceid               sqlite3_api->sourceid
-#define sqlite3_stmt_status            sqlite3_api->stmt_status
-#define sqlite3_strnicmp               sqlite3_api->strnicmp
-#define sqlite3_unlock_notify          sqlite3_api->unlock_notify
-#define sqlite3_wal_autocheckpoint     sqlite3_api->wal_autocheckpoint
-#define sqlite3_wal_checkpoint         sqlite3_api->wal_checkpoint
-#define sqlite3_wal_hook               sqlite3_api->wal_hook
-#define sqlite3_blob_reopen            sqlite3_api->blob_reopen
-#define sqlite3_vtab_config            sqlite3_api->vtab_config
-#define sqlite3_vtab_on_conflict       sqlite3_api->vtab_on_conflict
+#define sqlite3_update_hook           sqlite3_api->update_hook
+#define sqlite3_user_data             sqlite3_api->user_data
+#define sqlite3_value_blob            sqlite3_api->value_blob
+#define sqlite3_value_bytes           sqlite3_api->value_bytes
+#define sqlite3_value_bytes16         sqlite3_api->value_bytes16
+#define sqlite3_value_double          sqlite3_api->value_double
+#define sqlite3_value_int             sqlite3_api->value_int
+#define sqlite3_value_int64           sqlite3_api->value_int64
+#define sqlite3_value_numeric_type    sqlite3_api->value_numeric_type
+#define sqlite3_value_text            sqlite3_api->value_text
+#define sqlite3_value_text16          sqlite3_api->value_text16
+#define sqlite3_value_text16be        sqlite3_api->value_text16be
+#define sqlite3_value_text16le        sqlite3_api->value_text16le
+#define sqlite3_value_type            sqlite3_api->value_type
+#define sqlite3_vmprintf              sqlite3_api->vmprintf
+#define sqlite3_vsnprintf             sqlite3_api->xvsnprintf
+#define sqlite3_overload_function     sqlite3_api->overload_function
+#define sqlite3_prepare_v2            sqlite3_api->prepare_v2
+#define sqlite3_prepare16_v2          sqlite3_api->prepare16_v2
+#define sqlite3_clear_bindings        sqlite3_api->clear_bindings
+#define sqlite3_bind_zeroblob         sqlite3_api->bind_zeroblob
+#define sqlite3_blob_bytes            sqlite3_api->blob_bytes
+#define sqlite3_blob_close            sqlite3_api->blob_close
+#define sqlite3_blob_open             sqlite3_api->blob_open
+#define sqlite3_blob_read             sqlite3_api->blob_read
+#define sqlite3_blob_write            sqlite3_api->blob_write
+#define sqlite3_create_collation_v2   sqlite3_api->create_collation_v2
+#define sqlite3_file_control          sqlite3_api->file_control
+#define sqlite3_memory_highwater      sqlite3_api->memory_highwater
+#define sqlite3_memory_used           sqlite3_api->memory_used
+#define sqlite3_mutex_alloc           sqlite3_api->mutex_alloc
+#define sqlite3_mutex_enter           sqlite3_api->mutex_enter
+#define sqlite3_mutex_free            sqlite3_api->mutex_free
+#define sqlite3_mutex_leave           sqlite3_api->mutex_leave
+#define sqlite3_mutex_try             sqlite3_api->mutex_try
+#define sqlite3_open_v2               sqlite3_api->open_v2
+#define sqlite3_release_memory        sqlite3_api->release_memory
+#define sqlite3_result_error_nomem    sqlite3_api->result_error_nomem
+#define sqlite3_result_error_toobig   sqlite3_api->result_error_toobig
+#define sqlite3_sleep                 sqlite3_api->sleep
+#define sqlite3_soft_heap_limit       sqlite3_api->soft_heap_limit
+#define sqlite3_vfs_find              sqlite3_api->vfs_find
+#define sqlite3_vfs_register          sqlite3_api->vfs_register
+#define sqlite3_vfs_unregister        sqlite3_api->vfs_unregister
+#define sqlite3_threadsafe            sqlite3_api->xthreadsafe
+#define sqlite3_result_zeroblob       sqlite3_api->result_zeroblob
+#define sqlite3_result_error_code     sqlite3_api->result_error_code
+#define sqlite3_test_control          sqlite3_api->test_control
+#define sqlite3_randomness            sqlite3_api->randomness
+#define sqlite3_context_db_handle     sqlite3_api->context_db_handle
+#define sqlite3_extended_result_codes sqlite3_api->extended_result_codes
+#define sqlite3_limit                 sqlite3_api->limit
+#define sqlite3_next_stmt             sqlite3_api->next_stmt
+#define sqlite3_sql                   sqlite3_api->sql
+#define sqlite3_status                sqlite3_api->status
+#define sqlite3_backup_finish         sqlite3_api->backup_finish
+#define sqlite3_backup_init           sqlite3_api->backup_init
+#define sqlite3_backup_pagecount      sqlite3_api->backup_pagecount
+#define sqlite3_backup_remaining      sqlite3_api->backup_remaining
+#define sqlite3_backup_step           sqlite3_api->backup_step
+#define sqlite3_compileoption_get     sqlite3_api->compileoption_get
+#define sqlite3_compileoption_used    sqlite3_api->compileoption_used
+#define sqlite3_create_function_v2    sqlite3_api->create_function_v2
+#define sqlite3_db_config             sqlite3_api->db_config
+#define sqlite3_db_mutex              sqlite3_api->db_mutex
+#define sqlite3_db_status             sqlite3_api->db_status
+#define sqlite3_extended_errcode      sqlite3_api->extended_errcode
+#define sqlite3_log                   sqlite3_api->log
+#define sqlite3_soft_heap_limit64     sqlite3_api->soft_heap_limit64
+#define sqlite3_sourceid              sqlite3_api->sourceid
+#define sqlite3_stmt_status           sqlite3_api->stmt_status
+#define sqlite3_strnicmp              sqlite3_api->strnicmp
+#define sqlite3_unlock_notify         sqlite3_api->unlock_notify
+#define sqlite3_wal_autocheckpoint    sqlite3_api->wal_autocheckpoint
+#define sqlite3_wal_checkpoint        sqlite3_api->wal_checkpoint
+#define sqlite3_wal_hook              sqlite3_api->wal_hook
+#define sqlite3_blob_reopen           sqlite3_api->blob_reopen
+#define sqlite3_vtab_config           sqlite3_api->vtab_config
+#define sqlite3_vtab_on_conflict      sqlite3_api->vtab_on_conflict
 /* Version 3.7.16 and later */
-#define sqlite3_close_v2               sqlite3_api->close_v2
-#define sqlite3_db_filename            sqlite3_api->db_filename
-#define sqlite3_db_readonly            sqlite3_api->db_readonly
-#define sqlite3_db_release_memory      sqlite3_api->db_release_memory
-#define sqlite3_errstr                 sqlite3_api->errstr
-#define sqlite3_stmt_busy              sqlite3_api->stmt_busy
-#define sqlite3_stmt_readonly          sqlite3_api->stmt_readonly
-#define sqlite3_stricmp                sqlite3_api->stricmp
-#define sqlite3_uri_boolean            sqlite3_api->uri_boolean
-#define sqlite3_uri_int64              sqlite3_api->uri_int64
-#define sqlite3_uri_parameter          sqlite3_api->uri_parameter
-#define sqlite3_uri_vsnprintf          sqlite3_api->xvsnprintf
-#define sqlite3_wal_checkpoint_v2      sqlite3_api->wal_checkpoint_v2
+#define sqlite3_close_v2          sqlite3_api->close_v2
+#define sqlite3_db_filename       sqlite3_api->db_filename
+#define sqlite3_db_readonly       sqlite3_api->db_readonly
+#define sqlite3_db_release_memory sqlite3_api->db_release_memory
+#define sqlite3_errstr            sqlite3_api->errstr
+#define sqlite3_stmt_busy         sqlite3_api->stmt_busy
+#define sqlite3_stmt_readonly     sqlite3_api->stmt_readonly
+#define sqlite3_stricmp           sqlite3_api->stricmp
+#define sqlite3_uri_boolean       sqlite3_api->uri_boolean
+#define sqlite3_uri_int64         sqlite3_api->uri_int64
+#define sqlite3_uri_parameter     sqlite3_api->uri_parameter
+#define sqlite3_uri_vsnprintf     sqlite3_api->xvsnprintf
+#define sqlite3_wal_checkpoint_v2 sqlite3_api->wal_checkpoint_v2
 /* Version 3.8.7 and later */
-#define sqlite3_auto_extension         sqlite3_api->auto_extension
-#define sqlite3_bind_blob64            sqlite3_api->bind_blob64
-#define sqlite3_bind_text64            sqlite3_api->bind_text64
-#define sqlite3_cancel_auto_extension  sqlite3_api->cancel_auto_extension
-#define sqlite3_load_extension         sqlite3_api->load_extension
-#define sqlite3_malloc64               sqlite3_api->malloc64
-#define sqlite3_msize                  sqlite3_api->msize
-#define sqlite3_realloc64              sqlite3_api->realloc64
-#define sqlite3_reset_auto_extension   sqlite3_api->reset_auto_extension
-#define sqlite3_result_blob64          sqlite3_api->result_blob64
-#define sqlite3_result_text64          sqlite3_api->result_text64
-#define sqlite3_strglob                sqlite3_api->strglob
+#define sqlite3_auto_extension        sqlite3_api->auto_extension
+#define sqlite3_bind_blob64           sqlite3_api->bind_blob64
+#define sqlite3_bind_text64           sqlite3_api->bind_text64
+#define sqlite3_cancel_auto_extension sqlite3_api->cancel_auto_extension
+#define sqlite3_load_extension        sqlite3_api->load_extension
+#define sqlite3_malloc64              sqlite3_api->malloc64
+#define sqlite3_msize                 sqlite3_api->msize
+#define sqlite3_realloc64             sqlite3_api->realloc64
+#define sqlite3_reset_auto_extension  sqlite3_api->reset_auto_extension
+#define sqlite3_result_blob64         sqlite3_api->result_blob64
+#define sqlite3_result_text64         sqlite3_api->result_text64
+#define sqlite3_strglob               sqlite3_api->strglob
 /* Version 3.8.11 and later */
-#define sqlite3_value_dup              sqlite3_api->value_dup
-#define sqlite3_value_free             sqlite3_api->value_free
-#define sqlite3_result_zeroblob64      sqlite3_api->result_zeroblob64
-#define sqlite3_bind_zeroblob64        sqlite3_api->bind_zeroblob64
+#define sqlite3_value_dup         sqlite3_api->value_dup
+#define sqlite3_value_free        sqlite3_api->value_free
+#define sqlite3_result_zeroblob64 sqlite3_api->result_zeroblob64
+#define sqlite3_bind_zeroblob64   sqlite3_api->bind_zeroblob64
 /* Version 3.9.0 and later */
-#define sqlite3_value_subtype          sqlite3_api->value_subtype
-#define sqlite3_result_subtype         sqlite3_api->result_subtype
+#define sqlite3_value_subtype  sqlite3_api->value_subtype
+#define sqlite3_result_subtype sqlite3_api->result_subtype
 /* Version 3.10.0 and later */
-#define sqlite3_status64               sqlite3_api->status64
-#define sqlite3_strlike                sqlite3_api->strlike
-#define sqlite3_db_cacheflush          sqlite3_api->db_cacheflush
+#define sqlite3_status64      sqlite3_api->status64
+#define sqlite3_strlike       sqlite3_api->strlike
+#define sqlite3_db_cacheflush sqlite3_api->db_cacheflush
 /* Version 3.12.0 and later */
-#define sqlite3_system_errno           sqlite3_api->system_errno
+#define sqlite3_system_errno sqlite3_api->system_errno
 /* Version 3.14.0 and later */
-#define sqlite3_trace_v2               sqlite3_api->trace_v2
-#define sqlite3_expanded_sql           sqlite3_api->expanded_sql
+#define sqlite3_trace_v2     sqlite3_api->trace_v2
+#define sqlite3_expanded_sql sqlite3_api->expanded_sql
 /* Version 3.18.0 and later */
-#define sqlite3_set_last_insert_rowid  sqlite3_api->set_last_insert_rowid
+#define sqlite3_set_last_insert_rowid sqlite3_api->set_last_insert_rowid
 /* Version 3.20.0 and later */
-#define sqlite3_prepare_v3             sqlite3_api->prepare_v3
-#define sqlite3_prepare16_v3           sqlite3_api->prepare16_v3
-#define sqlite3_bind_pointer           sqlite3_api->bind_pointer
-#define sqlite3_result_pointer         sqlite3_api->result_pointer
-#define sqlite3_value_pointer          sqlite3_api->value_pointer
+#define sqlite3_prepare_v3     sqlite3_api->prepare_v3
+#define sqlite3_prepare16_v3   sqlite3_api->prepare16_v3
+#define sqlite3_bind_pointer   sqlite3_api->bind_pointer
+#define sqlite3_result_pointer sqlite3_api->result_pointer
+#define sqlite3_value_pointer  sqlite3_api->value_pointer
 /* Version 3.22.0 and later */
-#define sqlite3_vtab_nochange          sqlite3_api->vtab_nochange
-#define sqlite3_value_nochange         sqlite3_api->value_nochange
-#define sqlite3_vtab_collation         sqlite3_api->vtab_collation
+#define sqlite3_vtab_nochange  sqlite3_api->vtab_nochange
+#define sqlite3_value_nochange sqlite3_api->value_nochange
+#define sqlite3_vtab_collation sqlite3_api->vtab_collation
 /* Version 3.24.0 and later */
-#define sqlite3_keyword_count          sqlite3_api->keyword_count
-#define sqlite3_keyword_name           sqlite3_api->keyword_name
-#define sqlite3_keyword_check          sqlite3_api->keyword_check
-#define sqlite3_str_new                sqlite3_api->str_new
-#define sqlite3_str_finish             sqlite3_api->str_finish
-#define sqlite3_str_appendf            sqlite3_api->str_appendf
-#define sqlite3_str_vappendf           sqlite3_api->str_vappendf
-#define sqlite3_str_append             sqlite3_api->str_append
-#define sqlite3_str_appendall          sqlite3_api->str_appendall
-#define sqlite3_str_appendchar         sqlite3_api->str_appendchar
-#define sqlite3_str_reset              sqlite3_api->str_reset
-#define sqlite3_str_errcode            sqlite3_api->str_errcode
-#define sqlite3_str_length             sqlite3_api->str_length
-#define sqlite3_str_value              sqlite3_api->str_value
+#define sqlite3_keyword_count  sqlite3_api->keyword_count
+#define sqlite3_keyword_name   sqlite3_api->keyword_name
+#define sqlite3_keyword_check  sqlite3_api->keyword_check
+#define sqlite3_str_new        sqlite3_api->str_new
+#define sqlite3_str_finish     sqlite3_api->str_finish
+#define sqlite3_str_appendf    sqlite3_api->str_appendf
+#define sqlite3_str_vappendf   sqlite3_api->str_vappendf
+#define sqlite3_str_append     sqlite3_api->str_append
+#define sqlite3_str_appendall  sqlite3_api->str_appendall
+#define sqlite3_str_appendchar sqlite3_api->str_appendchar
+#define sqlite3_str_reset      sqlite3_api->str_reset
+#define sqlite3_str_errcode    sqlite3_api->str_errcode
+#define sqlite3_str_length     sqlite3_api->str_length
+#define sqlite3_str_value      sqlite3_api->str_value
 #endif /* !defined(SQLITE_CORE) && !defined(SQLITE_OMIT_LOAD_EXTENSION) */
 
 #if !defined(SQLITE_CORE) && !defined(SQLITE_OMIT_LOAD_EXTENSION)
-  /* This case when the file really is being compiled as a loadable 
-  ** extension */
-# define SQLITE_EXTENSION_INIT1     const sqlite3_api_routines *sqlite3_api=0;
-# define SQLITE_EXTENSION_INIT2(v)  sqlite3_api=v;
-# define SQLITE_EXTENSION_INIT3     \
-    extern const sqlite3_api_routines *sqlite3_api;
+/* This case when the file really is being compiled as a loadable
+** extension */
+#define SQLITE_EXTENSION_INIT1    const sqlite3_api_routines *sqlite3_api = 0;
+#define SQLITE_EXTENSION_INIT2(v) sqlite3_api = v;
+#define SQLITE_EXTENSION_INIT3    extern const sqlite3_api_routines *sqlite3_api;
 #else
-  /* This case when the file is being statically linked into the 
-  ** application */
-# define SQLITE_EXTENSION_INIT1     /*no-op*/
-# define SQLITE_EXTENSION_INIT2(v)  (void)v; /* unused parameter */
-# define SQLITE_EXTENSION_INIT3     /*no-op*/
+/* This case when the file is being statically linked into the
+** application */
+#define SQLITE_EXTENSION_INIT1             /*no-op*/
+#define SQLITE_EXTENSION_INIT2(v) (void)v; /* unused parameter */
+#define SQLITE_EXTENSION_INIT3             /*no-op*/
 #endif
 
 #endif /* SQLITE3EXT_H */
diff --git a/module-db/Database/sqlite3vfs.cpp b/module-db/Database/sqlite3vfs.cpp
index 230647c48..91eda552f 100644
--- a/module-db/Database/sqlite3vfs.cpp
+++ b/module-db/Database/sqlite3vfs.cpp
@@ -134,7 +134,7 @@
  ** Size of the write buffer used by journal files in bytes.
  */
 #ifndef SQLITE_ECOPHONEVFS_BUFFERSZ
-# define SQLITE_ECOPHONEVFS_BUFFERSZ 8192
+#define SQLITE_ECOPHONEVFS_BUFFERSZ 8192
 #endif
 
 /*
@@ -149,29 +149,30 @@
  ** actually pointers to instances of type EcophoneFile.
  */
 typedef struct EcophoneFile EcophoneFile;
-struct EcophoneFile {
-    sqlite3_file base;              /* Base class. Must be first. */
-    vfs::FILE *fd;                         /* File descriptor */
+struct EcophoneFile
+{
+    sqlite3_file base; /* Base class. Must be first. */
+    vfs::FILE *fd;     /* File descriptor */
 
-    char *aBuffer;                  /* Pointer to malloc'd buffer */
-    int nBuffer;                    /* Valid bytes of data in zBuffer */
-    sqlite3_int64 iBufferOfst;      /* Offset in file of zBuffer[0] */
+    char *aBuffer;             /* Pointer to malloc'd buffer */
+    int nBuffer;               /* Valid bytes of data in zBuffer */
+    sqlite3_int64 iBufferOfst; /* Offset in file of zBuffer[0] */
 };
 
 /*
  ** Write directly to the file passed as the first argument. Even if the
  ** file has a write-buffer (EcophoneFile.aBuffer), ignore it.
  */
-static int ecophoneDirectWrite(
-        EcophoneFile *p,                    /* File handle */
-        const void *zBuf,               /* Buffer containing data to write */
-        int iAmt,                       /* Size of data to write in bytes */
-        sqlite_int64 iOfst              /* File offset to write to */
-) {
-    size_t nWrite;                  /* Return value from write() */
+static int ecophoneDirectWrite(EcophoneFile *p,   /* File handle */
+                               const void *zBuf,  /* Buffer containing data to write */
+                               int iAmt,          /* Size of data to write in bytes */
+                               sqlite_int64 iOfst /* File offset to write to */
+)
+{
+    size_t nWrite; /* Return value from write() */
 
     auto fileSize = vfs.filelength(p->fd);
-    //vfs_fseek doesn't like offset to be > file size
+    // vfs_fseek doesn't like offset to be > file size
     if (iOfst >= fileSize)
         iOfst = fileSize;
 
@@ -180,7 +181,7 @@ static int ecophoneDirectWrite(
     }
 
     nWrite = vfs.fwrite(zBuf, 1, iAmt, p->fd);
-    if ((int) nWrite != iAmt) {
+    if ((int)nWrite != iAmt) {
         return SQLITE_IOERR_WRITE;
     }
 
@@ -192,10 +193,11 @@ static int ecophoneDirectWrite(
  ** no-op if this particular file does not have a buffer (i.e. it is not
  ** a journal file) or if the buffer is currently empty.
  */
-static int ecophoneFlushBuffer(EcophoneFile *p) {
+static int ecophoneFlushBuffer(EcophoneFile *p)
+{
     int rc = SQLITE_OK;
     if (p->nBuffer) {
-        rc = ecophoneDirectWrite(p, p->aBuffer, p->nBuffer, p->iBufferOfst);
+        rc         = ecophoneDirectWrite(p, p->aBuffer, p->nBuffer, p->iBufferOfst);
         p->nBuffer = 0;
     }
     return rc;
@@ -204,10 +206,11 @@ static int ecophoneFlushBuffer(EcophoneFile *p) {
 /*
  ** Close a file.
  */
-static int ecophoneClose(sqlite3_file *pFile) {
+static int ecophoneClose(sqlite3_file *pFile)
+{
     int rc;
-    EcophoneFile *p = (EcophoneFile *) pFile;
-    rc = ecophoneFlushBuffer(p);
+    EcophoneFile *p = (EcophoneFile *)pFile;
+    rc              = ecophoneFlushBuffer(p);
     sqlite3_free(p->aBuffer);
 
     vfs.fclose(p->fd);
@@ -217,15 +220,11 @@ static int ecophoneClose(sqlite3_file *pFile) {
 /*
  ** Read data from a file.
  */
-static int ecophoneRead(
-        sqlite3_file *pFile,
-        void *zBuf,
-        int iAmt,
-        sqlite_int64 iOfst
-) {
-    EcophoneFile *p = (EcophoneFile *) pFile;
-    int nRead;                      /* Return value from read() */
-    int rc;                         /* Return code from ecophoneFlushBuffer() */
+static int ecophoneRead(sqlite3_file *pFile, void *zBuf, int iAmt, sqlite_int64 iOfst)
+{
+    EcophoneFile *p = (EcophoneFile *)pFile;
+    int nRead; /* Return value from read() */
+    int rc;    /* Return code from ecophoneFlushBuffer() */
 
     /* Flush any data in the write buffer to disk in case this operation
      ** is trying to read data the file-region currently cached in the buffer.
@@ -238,7 +237,8 @@ static int ecophoneRead(
         return rc;
     }
 
-    //vfs_fseek returns error if desired file position is > file size. To mimic lseek desired position need to be truncated
+    // vfs_fseek returns error if desired file position is > file size. To mimic lseek desired position need to be
+    // truncated
     auto fileSize = vfs.filelength(p->fd);
     if (p->fd != NULL) {
         if (iOfst >= fileSize)
@@ -253,7 +253,8 @@ static int ecophoneRead(
 
     if (nRead == iAmt) {
         return SQLITE_OK;
-    } else if (nRead >= 0) {
+    }
+    else if (nRead >= 0) {
         return SQLITE_IOERR_SHORT_READ;
     }
 
@@ -263,21 +264,17 @@ static int ecophoneRead(
 /*
  ** Write data to a crash-file.
  */
-static int ecophoneWrite(
-        sqlite3_file *pFile,
-        const void *zBuf,
-        int iAmt,
-        sqlite_int64 iOfst
-) {
-    EcophoneFile *p = (EcophoneFile *) pFile;
+static int ecophoneWrite(sqlite3_file *pFile, const void *zBuf, int iAmt, sqlite_int64 iOfst)
+{
+    EcophoneFile *p = (EcophoneFile *)pFile;
 
     if (p->aBuffer) {
-        char *z = (char *) zBuf;       /* Pointer to remaining data to write */
-        int n = iAmt;                 /* Number of bytes at z */
-        sqlite3_int64 i = iOfst;      /* File offset to write to */
+        char *z         = (char *)zBuf; /* Pointer to remaining data to write */
+        int n           = iAmt;         /* Number of bytes at z */
+        sqlite3_int64 i = iOfst;        /* File offset to write to */
 
         while (n > 0) {
-            int nCopy;                  /* Number of bytes to copy into buffer */
+            int nCopy; /* Number of bytes to copy into buffer */
 
             /* If the buffer is full, or if this data is not being written directly
              ** following the data already buffered, flush the buffer. Flushing
@@ -304,7 +301,8 @@ static int ecophoneWrite(
             i += nCopy;
             z += nCopy;
         }
-    } else {
+    }
+    else {
         return ecophoneDirectWrite(p, zBuf, iAmt, iOfst);
     }
 
@@ -315,7 +313,8 @@ static int ecophoneWrite(
  ** Truncate a file. This is a no-op for this VFS (see header comments at
  ** the top of the file).
  */
-static int ecophoneTruncate(sqlite3_file *pFile, sqlite_int64 size) {
+static int ecophoneTruncate(sqlite3_file *pFile, sqlite_int64 size)
+{
 #if 0
     if( ftruncate(((EcophoneFile *)pFile)->fd, size) ) return SQLITE_IOERR_TRUNCATE;
 #else
@@ -328,8 +327,9 @@ static int ecophoneTruncate(sqlite3_file *pFile, sqlite_int64 size) {
 /*
  ** Sync the contents of the file to the persistent media.
  */
-static int ecophoneSync(sqlite3_file *pFile, int flags) {
-    EcophoneFile *p = (EcophoneFile *) pFile;
+static int ecophoneSync(sqlite3_file *pFile, int flags)
+{
+    EcophoneFile *p = (EcophoneFile *)pFile;
     int rc;
 
     UNUSED(flags);
@@ -339,7 +339,7 @@ static int ecophoneSync(sqlite3_file *pFile, int flags) {
         return rc;
     }
 
-    //rc = fflush(p->fd);  //FF doesn't have this function
+    // rc = fflush(p->fd);  //FF doesn't have this function
     rc = SQLITE_OK;
     return (rc == 0 ? SQLITE_OK : SQLITE_IOERR_FSYNC);
 }
@@ -347,9 +347,10 @@ static int ecophoneSync(sqlite3_file *pFile, int flags) {
 /*
  ** Write the size of the file in bytes to *pSize.
  */
-static int ecophoneFileSize(sqlite3_file *pFile, sqlite_int64 *pSize) {
-    EcophoneFile *p = (EcophoneFile *) pFile;
-    int rc;                         /* Return code from fstat() call */
+static int ecophoneFileSize(sqlite3_file *pFile, sqlite_int64 *pSize)
+{
+    EcophoneFile *p = (EcophoneFile *)pFile;
+    int rc; /* Return code from fstat() call */
 
     /* Flush the contents of the buffer to disk. As with the flush in the
      ** ecophoneRead() method, it would be possible to avoid this and save a write
@@ -372,19 +373,22 @@ static int ecophoneFileSize(sqlite3_file *pFile, sqlite_int64 *pSize) {
  ** a reserved lock on the database file. This ensures that if a hot-journal
  ** file is found in the file-system it is rolled back.
  */
-static int ecophoneLock(sqlite3_file *pFile, int eLock) {
+static int ecophoneLock(sqlite3_file *pFile, int eLock)
+{
     UNUSED(pFile);
     UNUSED(eLock);
     return SQLITE_OK;
 }
 
-static int ecophoneUnlock(sqlite3_file *pFile, int eLock) {
+static int ecophoneUnlock(sqlite3_file *pFile, int eLock)
+{
     UNUSED(pFile);
     UNUSED(eLock);
     return SQLITE_OK;
 }
 
-static int ecophoneCheckReservedLock(sqlite3_file *pFile, int *pResOut) {
+static int ecophoneCheckReservedLock(sqlite3_file *pFile, int *pResOut)
+{
     UNUSED(pFile);
     *pResOut = 0;
     return SQLITE_OK;
@@ -393,7 +397,8 @@ static int ecophoneCheckReservedLock(sqlite3_file *pFile, int *pResOut) {
 /*
  ** No xFileControl() verbs are implemented by this VFS.
  */
-static int ecophoneFileControl(sqlite3_file *pFile, int op, void *pArg) {
+static int ecophoneFileControl(sqlite3_file *pFile, int op, void *pArg)
+{
     UNUSED(pFile);
     UNUSED(op);
     UNUSED(pArg);
@@ -405,12 +410,14 @@ static int ecophoneFileControl(sqlite3_file *pFile, int op, void *pArg) {
  ** may return special values allowing SQLite to optimize file-system
  ** access to some extent. But it is also safe to simply return 0.
  */
-static int ecophoneSectorSize(sqlite3_file *pFile) {
+static int ecophoneSectorSize(sqlite3_file *pFile)
+{
     UNUSED(pFile);
     return 0;
 }
 
-static int ecophoneDeviceCharacteristics(sqlite3_file *pFile) {
+static int ecophoneDeviceCharacteristics(sqlite3_file *pFile)
+{
     UNUSED(pFile);
     return 0;
 }
@@ -419,25 +426,24 @@ static int ecophoneDeviceCharacteristics(sqlite3_file *pFile) {
  ** Query the file-system to see if the named file exists, is readable or
  ** is both readable and writable.
  */
-static int ecophoneAccess(
-        sqlite3_vfs *pVfs,
-        const char *zPath,
-        int flags,
-        int *pResOut
-) {
+static int ecophoneAccess(sqlite3_vfs *pVfs, const char *zPath, int flags, int *pResOut)
+{
     vfs::FILE *fd;
     UNUSED(pVfs);
 
     assert(flags == SQLITE_ACCESS_EXISTS       /* access(zPath, F_OK) */
-           || flags == SQLITE_ACCESS_READ         /* access(zPath, R_OK) */
-           || flags == SQLITE_ACCESS_READWRITE    /* access(zPath, R_OK|W_OK) */
+           || flags == SQLITE_ACCESS_READ      /* access(zPath, R_OK) */
+           || flags == SQLITE_ACCESS_READWRITE /* access(zPath, R_OK|W_OK) */
     );
 
-    fd = vfs.fopen(zPath, (const char *) "r");
+    fd = vfs.fopen(zPath, (const char *)"r");
     if (fd != NULL) {
-        if (pResOut) *pResOut = flags;
+        if (pResOut)
+            *pResOut = flags;
         vfs.fclose(fd);
-    } else if (pResOut) *pResOut = 0;
+    }
+    else if (pResOut)
+        *pResOut = 0;
     return SQLITE_OK;
 }
 
@@ -446,40 +452,40 @@ static int ecophoneAccess(
  */
 #pragma GCC diagnostic ignored "-Wmissing-field-initializers"
 
-static int ecophoneOpen(
-        sqlite3_vfs *pVfs,              /* VFS */
-        const char *zName,              /* File to open, or 0 for a temp file */
-        sqlite3_file *pFile,            /* Pointer to EcophoneFile struct to populate */
-        int flags,                      /* Input SQLITE_OPEN_XXX flags */
-        int *pOutFlags                  /* Output SQLITE_OPEN_XXX flags (or NULL) */
-) {
+static int ecophoneOpen(sqlite3_vfs *pVfs,   /* VFS */
+                        const char *zName,   /* File to open, or 0 for a temp file */
+                        sqlite3_file *pFile, /* Pointer to EcophoneFile struct to populate */
+                        int flags,           /* Input SQLITE_OPEN_XXX flags */
+                        int *pOutFlags       /* Output SQLITE_OPEN_XXX flags (or NULL) */
+)
+{
     UNUSED(pVfs);
 
     static const sqlite3_io_methods ecophoneio = {
-            1,                            /* iVersion */
-            ecophoneClose,                    /* xClose */
-            ecophoneRead,                     /* xRead */
-            ecophoneWrite,                    /* xWrite */
-            ecophoneTruncate,                 /* xTruncate */
-            ecophoneSync,                     /* xSync */
-            ecophoneFileSize,                 /* xFileSize */
-            ecophoneLock,                     /* xLock */
-            ecophoneUnlock,                   /* xUnlock */
-            ecophoneCheckReservedLock,        /* xCheckReservedLock */
-            ecophoneFileControl,              /* xFileControl */
-            ecophoneSectorSize,               /* xSectorSize */
-            ecophoneDeviceCharacteristics     /* xDeviceCharacteristics */
+        1,                            /* iVersion */
+        ecophoneClose,                /* xClose */
+        ecophoneRead,                 /* xRead */
+        ecophoneWrite,                /* xWrite */
+        ecophoneTruncate,             /* xTruncate */
+        ecophoneSync,                 /* xSync */
+        ecophoneFileSize,             /* xFileSize */
+        ecophoneLock,                 /* xLock */
+        ecophoneUnlock,               /* xUnlock */
+        ecophoneCheckReservedLock,    /* xCheckReservedLock */
+        ecophoneFileControl,          /* xFileControl */
+        ecophoneSectorSize,           /* xSectorSize */
+        ecophoneDeviceCharacteristics /* xDeviceCharacteristics */
     };
 
-    EcophoneFile *p = (EcophoneFile *) pFile; /* Populate this structure */
-    char *aBuf = 0;
+    EcophoneFile *p = (EcophoneFile *)pFile; /* Populate this structure */
+    char *aBuf      = 0;
 
     if (zName == 0) {
         return SQLITE_IOERR;
     }
 
     if (flags & SQLITE_OPEN_MAIN_JOURNAL) {
-        aBuf = (char *) sqlite3_malloc(SQLITE_ECOPHONEVFS_BUFFERSZ);
+        aBuf = (char *)sqlite3_malloc(SQLITE_ECOPHONEVFS_BUFFERSZ);
         if (!aBuf) {
             return SQLITE_NOMEM;
         }
@@ -490,23 +496,25 @@ static int ecophoneOpen(
     std::string oflags;
     if (flags & SQLITE_OPEN_READONLY) {
         oflags = "r";
-    } else if ((flags & SQLITE_OPEN_READWRITE) && (flags & SQLITE_OPEN_CREATE)) {
+    }
+    else if ((flags & SQLITE_OPEN_READWRITE) && (flags & SQLITE_OPEN_CREATE)) {
 
         // check if database specified exists
         p->fd = vfs.fopen(zName, "r");
         if (p->fd == nullptr) {
             // database doesn't exist, create new one with read&write permissions
             oflags = "w+";
-        } else {
+        }
+        else {
             // database exists, open it with read&write permissions
             vfs.fclose(p->fd);
             oflags = "r+";
         }
-    } else {
+    }
+    else {
         oflags = "r+";
     }
 
-
     p->fd = vfs.fopen(zName, oflags.c_str());
     if (p->fd == nullptr) {
         sqlite3_free(aBuf);
@@ -527,29 +535,33 @@ static int ecophoneOpen(
  ** is non-zero, then ensure the file-system modification to delete the
  ** file has been synced to disk before returning.
  */
-static int ecophoneDelete(sqlite3_vfs *pVfs, const char *zPath, int dirSync) {
+static int ecophoneDelete(sqlite3_vfs *pVfs, const char *zPath, int dirSync)
+{
     UNUSED(pVfs);
-    int rc;                         /* Return code */
+    int rc; /* Return code */
 
     rc = vfs.remove(zPath);
-    if (rc != 0 /*&& errno==ENOENT*/ ) return SQLITE_OK;
+    if (rc != 0 /*&& errno==ENOENT*/)
+        return SQLITE_OK;
 
     if (rc == 0 && dirSync) {
-        vfs::FILE *dfd;                      /* File descriptor open on directory */
-        int i;                        /* Iterator variable */
-        char zDir[MAXPATHNAME + 1];     /* Name of directory containing file zPath */
+        vfs::FILE *dfd;             /* File descriptor open on directory */
+        int i;                      /* Iterator variable */
+        char zDir[MAXPATHNAME + 1]; /* Name of directory containing file zPath */
 
         /* Figure out the directory name from the path of the file deleted. */
         sqlite3_snprintf(MAXPATHNAME, zDir, "%s", zPath);
         zDir[MAXPATHNAME] = '\0';
-        for (i = strlen(zDir); i > 1 && zDir[i] != '/'; i++);
+        for (i = strlen(zDir); i > 1 && zDir[i] != '/'; i++)
+            ;
         zDir[i] = '\0';
 
         /* Open a file-descriptor on the directory. Sync. Close. */
         dfd = vfs.fopen(zDir, "D");
         if (dfd == NULL) {
             rc = -1;
-        } else {
+        }
+        else {
             rc = SQLITE_OK;
             vfs.fclose(dfd);
         }
@@ -568,34 +580,32 @@ static int ecophoneDelete(sqlite3_vfs *pVfs, const char *zPath, int dirSync) {
  **   1. Path components are separated by a '/'. and
  **   2. Full paths begin with a '/' character.
  */
-static int ecophoneFullPathname(
-        sqlite3_vfs *pVfs,              /* VFS */
-        const char *zPath,              /* Input path (possibly a relative path) */
-        int nPathOut,                   /* Size of output buffer in bytes */
-        char *zPathOut                  /* Pointer to output buffer */
-) {
+static int ecophoneFullPathname(sqlite3_vfs *pVfs, /* VFS */
+                                const char *zPath, /* Input path (possibly a relative path) */
+                                int nPathOut,      /* Size of output buffer in bytes */
+                                char *zPathOut     /* Pointer to output buffer */
+)
+{
     UNUSED(pVfs);
 
     std::string path;
     // absolute path
-    if (zPath[0] == '/') {
-    }
-        // relative path
+    if (zPath[0] == '/') {}
+    // relative path
     else {
         path = vfs.getcurrdir();
-        if (path.empty()) return SQLITE_IOERR;
-
+        if (path.empty())
+            return SQLITE_IOERR;
     }
 
     // Current path is "/"
-    if(path.size() == 1){
+    if (path.size() == 1) {
         sqlite3_snprintf(nPathOut, zPathOut, "%s%s", path.c_str(), zPath);
     }
-    else{
+    else {
         sqlite3_snprintf(nPathOut, zPathOut, "%s/%s", path.c_str(), zPath);
     }
 
-
     zPathOut[nPathOut - 1] = '\0';
 
     return SQLITE_OK;
@@ -613,26 +623,30 @@ static int ecophoneFullPathname(
  ** extensions compiled as shared objects. This simple VFS does not support
  ** this functionality, so the following functions are no-ops.
  */
-static void *ecophoneDlOpen(sqlite3_vfs *pVfs, const char *zPath) {
+static void *ecophoneDlOpen(sqlite3_vfs *pVfs, const char *zPath)
+{
     UNUSED(pVfs);
     UNUSED(zPath);
     return 0;
 }
 
-static void ecophoneDlError(sqlite3_vfs *pVfs, int nByte, char *zErrMsg) {
+static void ecophoneDlError(sqlite3_vfs *pVfs, int nByte, char *zErrMsg)
+{
     UNUSED(pVfs);
     sqlite3_snprintf(nByte, zErrMsg, "Loadable extensions are not supported");
     zErrMsg[nByte - 1] = '\0';
 }
 
-static void (*ecophoneDlSym(sqlite3_vfs *pVfs, void *pH, const char *z))(void) {
+static void (*ecophoneDlSym(sqlite3_vfs *pVfs, void *pH, const char *z))(void)
+{
     UNUSED(pVfs);
     UNUSED(pH);
     UNUSED(z);
     return 0;
 }
 
-static void ecophoneDlClose(sqlite3_vfs *pVfs, void *pHandle) {
+static void ecophoneDlClose(sqlite3_vfs *pVfs, void *pHandle)
+{
     UNUSED(pVfs);
     UNUSED(pHandle);
     return;
@@ -642,7 +656,8 @@ static void ecophoneDlClose(sqlite3_vfs *pVfs, void *pHandle) {
  ** Parameter zByte points to a buffer nByte bytes in size. Populate this
  ** buffer with pseudo-random data.
  */
-static int ecophoneRandomness(sqlite3_vfs *pVfs, int nByte, char *zByte) {
+static int ecophoneRandomness(sqlite3_vfs *pVfs, int nByte, char *zByte)
+{
     UNUSED(pVfs);
     UNUSED(nByte);
     UNUSED(zByte);
@@ -653,7 +668,8 @@ static int ecophoneRandomness(sqlite3_vfs *pVfs, int nByte, char *zByte) {
  ** Sleep for at least nMicro microseconds. Return the (approximate) number
  ** of microseconds slept for.
  */
-static int ecophoneSleep(sqlite3_vfs *pVfs, int nMicro) {
+static int ecophoneSleep(sqlite3_vfs *pVfs, int nMicro)
+{
     UNUSED(pVfs);
 
     const TickType_t xDelay = nMicro / 1000 / portTICK_PERIOD_MS;
@@ -673,10 +689,11 @@ static int ecophoneSleep(sqlite3_vfs *pVfs, int nMicro) {
  ** value, it will stop working some time in the year 2038 AD (the so-called
  ** "year 2038" problem that afflicts systems that store time this way).
  */
-static int ecophoneCurrentTime(sqlite3_vfs *pVfs, double *pTime) {
+static int ecophoneCurrentTime(sqlite3_vfs *pVfs, double *pTime)
+{
 
     time_t t = time(0);
-    *pTime = t / 86400.0 + 2440587.5;
+    *pTime   = t / 86400.0 + 2440587.5;
     return SQLITE_OK;
 }
 
@@ -688,25 +705,26 @@ static int ecophoneCurrentTime(sqlite3_vfs *pVfs, double *pTime) {
  */
 #pragma GCC diagnostic ignored "-Wmissing-field-initializers"
 
-sqlite3_vfs *sqlite3_ecophonevfs(void) {
+sqlite3_vfs *sqlite3_ecophonevfs(void)
+{
     static sqlite3_vfs ecophonevfs = {
-            1,                            /* iVersion */
-            sizeof(EcophoneFile),             /* szOsFile */
-            MAXPATHNAME,                  /* mxPathname */
-            0,                            /* pNext */
-            "ecophone",                       /* zName */
-            0,                            /* pAppData */
-            ecophoneOpen,                     /* xOpen */
-            ecophoneDelete,                   /* xDelete */
-            ecophoneAccess,                   /* xAccess */
-            ecophoneFullPathname,             /* xFullPathname */
-            ecophoneDlOpen,                   /* xDlOpen */
-            ecophoneDlError,                  /* xDlError */
-            ecophoneDlSym,                    /* xDlSym */
-            ecophoneDlClose,                  /* xDlClose */
-            ecophoneRandomness,               /* xRandomness */
-            ecophoneSleep,                    /* xSleep */
-            ecophoneCurrentTime,              /* xCurrentTime */
+        1,                    /* iVersion */
+        sizeof(EcophoneFile), /* szOsFile */
+        MAXPATHNAME,          /* mxPathname */
+        0,                    /* pNext */
+        "ecophone",           /* zName */
+        0,                    /* pAppData */
+        ecophoneOpen,         /* xOpen */
+        ecophoneDelete,       /* xDelete */
+        ecophoneAccess,       /* xAccess */
+        ecophoneFullPathname, /* xFullPathname */
+        ecophoneDlOpen,       /* xDlOpen */
+        ecophoneDlError,      /* xDlError */
+        ecophoneDlSym,        /* xDlSym */
+        ecophoneDlClose,      /* xDlClose */
+        ecophoneRandomness,   /* xRandomness */
+        ecophoneSleep,        /* xSleep */
+        ecophoneCurrentTime,  /* xCurrentTime */
     };
     return &ecophonevfs;
 }
diff --git a/module-db/Databases/AlarmsDB.cpp b/module-db/Databases/AlarmsDB.cpp
index 01ff52280..05aef48a2 100644
--- a/module-db/Databases/AlarmsDB.cpp
+++ b/module-db/Databases/AlarmsDB.cpp
@@ -7,22 +7,16 @@
 
 #include "AlarmsDB.hpp"
 
-
 const char *AlarmsDB::dbName = "sys/alarms.db";
 
-AlarmsDB::AlarmsDB() :
-        Database(dbName),
-        alarms(this){
+AlarmsDB::AlarmsDB() : Database(dbName), alarms(this)
+{
 
-        if(alarms.Create() == false) return;
-
-
-        isInitialized = true;
+    if (alarms.Create() == false)
+        return;
 
+    isInitialized = true;
 }
 
-AlarmsDB::~AlarmsDB() {
-
-}
-
-
+AlarmsDB::~AlarmsDB()
+{}
diff --git a/module-db/Databases/AlarmsDB.hpp b/module-db/Databases/AlarmsDB.hpp
index 1a3138b0f..2a7022894 100644
--- a/module-db/Databases/AlarmsDB.hpp
+++ b/module-db/Databases/AlarmsDB.hpp
@@ -10,16 +10,19 @@
 #include "../Tables/AlarmsTable.hpp"
 #include "../Tables/ThreadsTable.hpp"
 
-class AlarmsDB : public Database {
-public:
+class AlarmsDB : public Database
+{
+  public:
     AlarmsDB();
     ~AlarmsDB();
 
     AlarmsTable alarms;
 
-    static const char* GetDBName(){return dbName;}
-
-private:
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
+  private:
     static const char *dbName;
 };
diff --git a/module-db/Databases/CalllogDB.cpp b/module-db/Databases/CalllogDB.cpp
index 774d2558d..4f209b164 100644
--- a/module-db/Databases/CalllogDB.cpp
+++ b/module-db/Databases/CalllogDB.cpp
@@ -10,14 +10,13 @@
 
 const char *CalllogDB::dbName = "sys/calllog.db";
 
-CalllogDB::CalllogDB() :
-	Database(dbName),
-    calls(this) {
+CalllogDB::CalllogDB() : Database(dbName), calls(this)
+{
 
-	if (calls.Create() == false) return;
-	isInitialized = true;
-}
-
-CalllogDB::~CalllogDB() {
+    if (calls.Create() == false)
+        return;
+    isInitialized = true;
 }
 
+CalllogDB::~CalllogDB()
+{}
diff --git a/module-db/Databases/CalllogDB.hpp b/module-db/Databases/CalllogDB.hpp
index 154a6873d..ffcaa9058 100644
--- a/module-db/Databases/CalllogDB.hpp
+++ b/module-db/Databases/CalllogDB.hpp
@@ -11,16 +11,19 @@
 #include "Database/Database.hpp"
 #include "../Tables/CalllogTable.hpp"
 
-class CalllogDB : public Database {
-public:
-	CalllogDB();
+class CalllogDB : public Database
+{
+  public:
+    CalllogDB();
     virtual ~CalllogDB();
 
     CalllogTable calls;
 
-    static const char* GetDBName(){return dbName;}
-
-private:
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
+  private:
     static const char *dbName;
 };
diff --git a/module-db/Databases/ContactsDB.cpp b/module-db/Databases/ContactsDB.cpp
index fa805b410..a9085c58b 100644
--- a/module-db/Databases/ContactsDB.cpp
+++ b/module-db/Databases/ContactsDB.cpp
@@ -8,29 +8,26 @@
  * @details
  */
 
-
 #include "ContactsDB.hpp"
 
 const char *ContactsDB::dbName = "sys/contacts.db";
 
+ContactsDB::ContactsDB() : Database(dbName), contacts(this), name(this), number(this), ringtones(this), address(this)
+{
 
-ContactsDB::ContactsDB():
-        Database(dbName),
-        contacts(this),
-        name(this),
-        number(this),
-        ringtones(this),
-        address(this){
-
-    if(contacts.Create() == false) return;
-    if(name.Create() == false) return;
-    if(number.Create() == false) return;
-    if(ringtones.Create() == false) return;
-    if(address.Create() == false) return;
+    if (contacts.Create() == false)
+        return;
+    if (name.Create() == false)
+        return;
+    if (number.Create() == false)
+        return;
+    if (ringtones.Create() == false)
+        return;
+    if (address.Create() == false)
+        return;
 
     isInitialized = true;
 }
 
-ContactsDB::~ContactsDB() {
-
-}
\ No newline at end of file
+ContactsDB::~ContactsDB()
+{}
\ No newline at end of file
diff --git a/module-db/Databases/ContactsDB.hpp b/module-db/Databases/ContactsDB.hpp
index bda883d6d..e4baa26c0 100644
--- a/module-db/Databases/ContactsDB.hpp
+++ b/module-db/Databases/ContactsDB.hpp
@@ -17,20 +17,23 @@
 #include "../Tables/ContactsRingtonesTable.hpp"
 #include "../Tables/ContactsAddressTable.hpp"
 
-class ContactsDB : public Database {
-public:
+class ContactsDB : public Database
+{
+  public:
     ContactsDB();
     ~ContactsDB();
 
-    static const char* GetDBName(){return dbName;}
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
     ContactsTable contacts;
     ContactsNameTable name;
     ContactsNumberTable number;
     ContactsRingtonesTable ringtones;
-    ContactsAddressTable    address;
+    ContactsAddressTable address;
 
-private:
+  private:
     static const char *dbName;
 };
-
diff --git a/module-db/Databases/CountryCodesDB.cpp b/module-db/Databases/CountryCodesDB.cpp
index 367b897eb..2dd045cec 100644
--- a/module-db/Databases/CountryCodesDB.cpp
+++ b/module-db/Databases/CountryCodesDB.cpp
@@ -10,5 +10,4 @@ CountryCodesDB::CountryCodesDB() : Database(dbName), countryCodes(this)
 }
 
 CountryCodesDB::~CountryCodesDB()
-{
-}
\ No newline at end of file
+{}
\ No newline at end of file
diff --git a/module-db/Databases/NotesDB.cpp b/module-db/Databases/NotesDB.cpp
index d7fbf8088..6974b8482 100644
--- a/module-db/Databases/NotesDB.cpp
+++ b/module-db/Databases/NotesDB.cpp
@@ -10,14 +10,13 @@
 
 const char *NotesDB::dbName = "sys/notes.db";
 
-NotesDB::NotesDB() :
-	Database(dbName),
-    notes(this) {
+NotesDB::NotesDB() : Database(dbName), notes(this)
+{
 
-	if(notes.Create() == false) return;
-	isInitialized = true;
-}
-
-NotesDB::~NotesDB() {
+    if (notes.Create() == false)
+        return;
+    isInitialized = true;
 }
 
+NotesDB::~NotesDB()
+{}
diff --git a/module-db/Databases/NotesDB.hpp b/module-db/Databases/NotesDB.hpp
index f58bd4994..98cc35ffc 100644
--- a/module-db/Databases/NotesDB.hpp
+++ b/module-db/Databases/NotesDB.hpp
@@ -11,17 +11,19 @@
 #include "Database/Database.hpp"
 #include "../Tables/NotesTable.hpp"
 
-class NotesDB : public Database {
-public:
-	NotesDB();
+class NotesDB : public Database
+{
+  public:
+    NotesDB();
     virtual ~NotesDB();
 
     NotesTable notes;
 
-    static const char* GetDBName(){return dbName;}
-
-private:
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
+  private:
     static const char *dbName;
 };
-
diff --git a/module-db/Databases/SettingsDB.cpp b/module-db/Databases/SettingsDB.cpp
index 8e36924b9..e0e286d51 100644
--- a/module-db/Databases/SettingsDB.cpp
+++ b/module-db/Databases/SettingsDB.cpp
@@ -8,21 +8,18 @@
  * @details
  */
 
-
 #include "SettingsDB.hpp"
 
 const char *SettingsDB::dbName = "sys/settings.db";
 
+SettingsDB::SettingsDB() : Database(dbName), settings(this)
+{
 
-SettingsDB::SettingsDB():
-        Database(dbName),
-        settings(this){
-
-    if(settings.Create() == false) return;
+    if (settings.Create() == false)
+        return;
 
     isInitialized = true;
 }
 
-SettingsDB::~SettingsDB() {
-
-}
\ No newline at end of file
+SettingsDB::~SettingsDB()
+{}
\ No newline at end of file
diff --git a/module-db/Databases/SettingsDB.hpp b/module-db/Databases/SettingsDB.hpp
index 424398ecc..c95473879 100644
--- a/module-db/Databases/SettingsDB.hpp
+++ b/module-db/Databases/SettingsDB.hpp
@@ -12,17 +12,19 @@
 #include "Database/Database.hpp"
 #include "../Tables/SettingsTable.hpp"
 
-class SettingsDB : public Database {
-public:
+class SettingsDB : public Database
+{
+  public:
     SettingsDB();
     ~SettingsDB();
 
     SettingsTable settings;
 
-    static const char* GetDBName(){return dbName;}
-
-private:
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
+  private:
     static const char *dbName;
 };
-
diff --git a/module-db/Databases/SmsDB.cpp b/module-db/Databases/SmsDB.cpp
index 5e669d9a8..c7073fafb 100644
--- a/module-db/Databases/SmsDB.cpp
+++ b/module-db/Databases/SmsDB.cpp
@@ -8,24 +8,20 @@
  * @details
  */
 
-
 #include "SmsDB.hpp"
 
-
 const char *SmsDB::dbName = "sys/sms.db";
 
-SmsDB::SmsDB() :
-        Database(dbName),
-        sms(this),
-        threads(this){
+SmsDB::SmsDB() : Database(dbName), sms(this), threads(this)
+{
 
-        if(sms.Create() == false) return;
-        if(threads.Create() == false) return;
-
-        isInitialized = true;
+    if (sms.Create() == false)
+        return;
+    if (threads.Create() == false)
+        return;
 
+    isInitialized = true;
 }
 
-SmsDB::~SmsDB() {
-
-}
\ No newline at end of file
+SmsDB::~SmsDB()
+{}
\ No newline at end of file
diff --git a/module-db/Databases/SmsDB.hpp b/module-db/Databases/SmsDB.hpp
index 772da69c8..d547e08dc 100644
--- a/module-db/Databases/SmsDB.hpp
+++ b/module-db/Databases/SmsDB.hpp
@@ -13,18 +13,20 @@
 #include "../Tables/SMSTable.hpp"
 #include "../Tables/ThreadsTable.hpp"
 
-class SmsDB : public Database {
-public:
+class SmsDB : public Database
+{
+  public:
     SmsDB();
     ~SmsDB();
 
     SMSTable sms;
     ThreadsTable threads;
 
-    static const char* GetDBName(){return dbName;}
-
-private:
+    static const char *GetDBName()
+    {
+        return dbName;
+    }
 
+  private:
     static const char *dbName;
 };
-
diff --git a/module-db/Interface/AlarmsRecord.cpp b/module-db/Interface/AlarmsRecord.cpp
index b69602b35..0069e005b 100644
--- a/module-db/Interface/AlarmsRecord.cpp
+++ b/module-db/Interface/AlarmsRecord.cpp
@@ -9,151 +9,133 @@
 #include "ThreadRecord.hpp"
 #include "AlarmsTable.hpp"
 
-AlarmsRecordInterface::AlarmsRecordInterface(AlarmsDB* alarmsDb): alarmsDB(alarmsDb) {
+AlarmsRecordInterface::AlarmsRecordInterface(AlarmsDB *alarmsDb) : alarmsDB(alarmsDb)
+{}
 
-}
+AlarmsRecordInterface::~AlarmsRecordInterface()
+{}
 
-AlarmsRecordInterface::~AlarmsRecordInterface() {
-
-}
-
-bool AlarmsRecordInterface::Add(const AlarmsRecord &rec) {
+bool AlarmsRecordInterface::Add(const AlarmsRecord &rec)
+{
 
     uint32_t contactID = 0;
 
     // Create alarm
-    alarmsDB->alarms.Add(AlarmsTableRow{
-    		.time = rec.time,
-    		.snooze = rec.snooze,
-			.status = rec.status,
-			.path = rec.path
-    });
+    alarmsDB->alarms.Add(
+        AlarmsTableRow{.time = rec.time, .snooze = rec.snooze, .status = rec.status, .path = rec.path});
 
-    //TODO: error check
+    // TODO: error check
 
     return true;
 }
 
-uint32_t AlarmsRecordInterface::GetCount() {
+uint32_t AlarmsRecordInterface::GetCount()
+{
     return alarmsDB->alarms.GetCount();
 }
 
-std::unique_ptr<std::vector<AlarmsRecord>> AlarmsRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
-                                                                                  AlarmsRecordField field,
-                                                                                  const char *str) {
+std::unique_ptr<std::vector<AlarmsRecord>> AlarmsRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                        uint32_t limit,
+                                                                                        AlarmsRecordField field,
+                                                                                        const char *str)
+{
     auto records = std::make_unique<std::vector<AlarmsRecord>>();
 
     std::vector<AlarmsTableRow> alarm;
 
-    switch(field){
-        case AlarmsRecordField::Time:
-        	alarm = alarmsDB->alarms.GetLimitOffsetByField(offset,limit,AlarmsTableFields::Time,str);
-            break;
-        case AlarmsRecordField::Snooze:
-        	alarm = alarmsDB->alarms.GetLimitOffsetByField(offset,limit,AlarmsTableFields::Snooze,str);
-            break;
-        case AlarmsRecordField::Status:
-        	alarm = alarmsDB->alarms.GetLimitOffsetByField(offset,limit,AlarmsTableFields::Status,str);
-        	break;
-        default:
-            return records;
+    switch (field) {
+    case AlarmsRecordField::Time:
+        alarm = alarmsDB->alarms.GetLimitOffsetByField(offset, limit, AlarmsTableFields::Time, str);
+        break;
+    case AlarmsRecordField::Snooze:
+        alarm = alarmsDB->alarms.GetLimitOffsetByField(offset, limit, AlarmsTableFields::Snooze, str);
+        break;
+    case AlarmsRecordField::Status:
+        alarm = alarmsDB->alarms.GetLimitOffsetByField(offset, limit, AlarmsTableFields::Status, str);
+        break;
+    default:
+        return records;
     }
     return records;
 }
 
-
-std::unique_ptr<std::vector<AlarmsRecord>> AlarmsRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto alarm = alarmsDB->alarms.GetLimitOffset(offset,limit);
+std::unique_ptr<std::vector<AlarmsRecord>> AlarmsRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto alarm = alarmsDB->alarms.GetLimitOffset(offset, limit);
 
     auto records = std::make_unique<std::vector<AlarmsRecord>>();
 
     AlarmsRecordInterface alarmsInterface(alarmsDB);
-    for(const auto &w : alarm){
+    for (const auto &w : alarm) {
 
         auto alarmsRec = alarmsInterface.GetByID(w.ID);
 
         records->push_back({
-           .ID=w.ID,
-           .time = w.time,
-		   .snooze = w.snooze,
-		   .status = w.status,
-		   .path = w.path,
+            .ID     = w.ID,
+            .time   = w.time,
+            .snooze = w.snooze,
+            .status = w.status,
+            .path   = w.path,
         });
     }
 
     return records;
 }
 
-bool AlarmsRecordInterface::Update(const AlarmsRecord &rec) {
+bool AlarmsRecordInterface::Update(const AlarmsRecord &rec)
+{
 
     auto alarm = alarmsDB->alarms.GetByID(rec.ID);
-    if(alarm.ID == 0){
+    if (alarm.ID == 0) {
         return false;
     }
 
-    alarmsDB->alarms.Update(AlarmsTableRow{
-        .ID=rec.ID,
-        .time = rec.time,
-		.snooze = rec.snooze,
-		.status = rec.status,
-		.path = rec.path
-    });
+    alarmsDB->alarms.Update(
+        AlarmsTableRow{.ID = rec.ID, .time = rec.time, .snooze = rec.snooze, .status = rec.status, .path = rec.path});
 
     return true;
 }
 
-bool AlarmsRecordInterface::RemoveByID(uint32_t id) {
+bool AlarmsRecordInterface::RemoveByID(uint32_t id)
+{
 
     auto alarm = alarmsDB->alarms.GetByID(id);
-    if(alarm.ID == 0){
+    if (alarm.ID == 0) {
         return false;
     }
 
     // Remove alarm
-    if(alarmsDB->alarms.RemoveByID(id) == false){
+    if (alarmsDB->alarms.RemoveByID(id) == false) {
         return false;
     }
 
     return true;
 }
 
-bool AlarmsRecordInterface::RemoveByField(AlarmsRecordField field, const char *str) {
+bool AlarmsRecordInterface::RemoveByField(AlarmsRecordField field, const char *str)
+{
 
-    switch(field){
-        case AlarmsRecordField ::Time:
-            return alarmsDB->alarms.RemoveByField(AlarmsTableFields::Time,str);
-
-        default:
-            return false;
+    switch (field) {
+    case AlarmsRecordField ::Time:
+        return alarmsDB->alarms.RemoveByField(AlarmsTableFields::Time, str);
 
+    default:
+        return false;
     }
-
 }
 
-AlarmsRecord AlarmsRecordInterface::GetByID(uint32_t id) {
+AlarmsRecord AlarmsRecordInterface::GetByID(uint32_t id)
+{
     auto alarm = alarmsDB->alarms.GetByID(id);
 
     return AlarmsRecord{
-        .ID = alarm.ID,
-        .time = alarm.time,
-		.snooze = alarm.snooze,
-		.status = alarm.status,
-		.path = alarm.path
-    };
-
+        .ID = alarm.ID, .time = alarm.time, .snooze = alarm.snooze, .status = alarm.status, .path = alarm.path};
 }
 
-
-AlarmsRecord AlarmsRecordInterface::GetNext(time_t time) {
+AlarmsRecord AlarmsRecordInterface::GetNext(time_t time)
+{
     auto alarm = alarmsDB->alarms.GetNext(time);
 
     return AlarmsRecord{
-        .ID = alarm.ID,
-        .time = alarm.time,
-		.snooze = alarm.snooze,
-		.status = alarm.status,
-		.path = alarm.path
-    };
-
+        .ID = alarm.ID, .time = alarm.time, .snooze = alarm.snooze, .status = alarm.status, .path = alarm.path};
 }
-
diff --git a/module-db/Interface/AlarmsRecord.hpp b/module-db/Interface/AlarmsRecord.hpp
index 54e427ecb..73c0b1f59 100644
--- a/module-db/Interface/AlarmsRecord.hpp
+++ b/module-db/Interface/AlarmsRecord.hpp
@@ -12,41 +12,46 @@
 #include "utf8/UTF8.hpp"
 #include "../Common/Common.hpp"
 
-struct AlarmsRecord{
-	uint32_t ID;
-	uint32_t time;
-	uint32_t snooze;
-	uint32_t status;
-	UTF8    path;
-
+struct AlarmsRecord
+{
+    uint32_t ID;
+    uint32_t time;
+    uint32_t snooze;
+    uint32_t status;
+    UTF8 path;
 };
 
-enum class AlarmsRecordField{
+enum class AlarmsRecordField
+{
     Time,
     Snooze,
     Status,
-	Path
+    Path
 };
 
-class AlarmsRecordInterface : public RecordInterface<AlarmsRecord,AlarmsRecordField > {
-public:
-
-    AlarmsRecordInterface(AlarmsDB* alarmsDb);
+class AlarmsRecordInterface : public RecordInterface<AlarmsRecord, AlarmsRecordField>
+{
+  public:
+    AlarmsRecordInterface(AlarmsDB *alarmsDb);
     ~AlarmsRecordInterface();
 
-    bool Add(const AlarmsRecord& rec) override final;
+    bool Add(const AlarmsRecord &rec) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool RemoveByField(AlarmsRecordField field,const char* str) override final;
-    bool Update(const AlarmsRecord& rec) override final;
+    bool RemoveByField(AlarmsRecordField field, const char *str) override final;
+    bool Update(const AlarmsRecord &rec) override final;
     AlarmsRecord GetByID(uint32_t id) override final;
 
     uint32_t GetCount() override final;
 
-    std::unique_ptr<std::vector<AlarmsRecord>> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
+    std::unique_ptr<std::vector<AlarmsRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::unique_ptr<std::vector<AlarmsRecord>> GetLimitOffsetByField(uint32_t offset,uint32_t limit,AlarmsRecordField field, const char* str) override final;
+    std::unique_ptr<std::vector<AlarmsRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                     uint32_t limit,
+                                                                     AlarmsRecordField field,
+                                                                     const char *str) override final;
 
     AlarmsRecord GetNext(time_t time);
-private:
-    AlarmsDB* alarmsDB;
+
+  private:
+    AlarmsDB *alarmsDB;
 };
diff --git a/module-db/Interface/CalllogRecord.cpp b/module-db/Interface/CalllogRecord.cpp
index 54c0198ef..aef5c73a1 100644
--- a/module-db/Interface/CalllogRecord.cpp
+++ b/module-db/Interface/CalllogRecord.cpp
@@ -15,19 +15,16 @@
 #include <sstream>
 
 CalllogRecord::CalllogRecord(const CalllogTableRow &tableRow, const UTF8 &num, const UTF8 &name)
-    : Record{tableRow.id}, number(num), presentation(tableRow.presentation), date(tableRow.date), duration(tableRow.duration), type(tableRow.type), name(name),
-      contactId(tableRow.contactId)
-{
-}
+    : Record{tableRow.id}, number(num), presentation(tableRow.presentation), date(tableRow.date),
+      duration(tableRow.duration), type(tableRow.type), name(name), contactId(tableRow.contactId)
+{}
 
 uint32_t CalllogRecord::getContactId() const
 {
-    try
-    {
+    try {
         return static_cast<uint32_t>(std::stoi(contactId));
     }
-    catch (const std::exception &e)
-    {
+    catch (const std::exception &e) {
         LOG_ERROR("Invalid contactId %s", contactId.c_str());
         return DB_ID_NONE;
     }
@@ -35,44 +32,44 @@ uint32_t CalllogRecord::getContactId() const
 
 std::ostream &operator<<(std::ostream &out, const CalllogRecord &rec)
 {
-    out << " <id> " << rec.ID << " <number> " << rec.number << " <presentation> " << static_cast<uint32_t>(rec.presentation) << " <date> " << rec.date
-        << " <duration> " << rec.duration << " <type> " << static_cast<uint32_t>(rec.type) << " <name> " << rec.name << " <contactID> " << rec.contactId;
+    out << " <id> " << rec.ID << " <number> " << rec.number << " <presentation> "
+        << static_cast<uint32_t>(rec.presentation) << " <date> " << rec.date << " <duration> " << rec.duration
+        << " <type> " << static_cast<uint32_t>(rec.type) << " <name> " << rec.name << " <contactID> " << rec.contactId;
 
     return out;
 }
 
-CalllogRecordInterface::CalllogRecordInterface(CalllogDB *calllogDb, ContactsDB *contactsDb) : calllogDB(calllogDb), contactsDB(contactsDb)
-{
-}
+CalllogRecordInterface::CalllogRecordInterface(CalllogDB *calllogDb, ContactsDB *contactsDb)
+    : calllogDB(calllogDb), contactsDB(contactsDb)
+{}
 
-CalllogRecordInterface::~CalllogRecordInterface() {
-}
+CalllogRecordInterface::~CalllogRecordInterface()
+{}
 
 bool CalllogRecordInterface::Add(const CalllogRecord &rec)
 {
     ContactRecordInterface contactInterface(contactsDB);
     auto contactRec = contactInterface.GetByNumber(rec.number, ContactRecordInterface::CreateTempContact::True);
-    if (contactRec->size() == 0)
-    {
+    if (contactRec->size() == 0) {
         LOG_ERROR("Cannot get contact, for number %s", rec.number.c_str());
         return false;
     }
     uint32_t contactID = (*contactRec)[0].dbID;
 
-    auto localRec = rec;
-    auto contact = (*contactRec)[0];
+    auto localRec      = rec;
+    auto contact       = (*contactRec)[0];
     localRec.contactId = std::to_string(contact.dbID);
-    localRec.name = contact.getFormattedName();
+    localRec.name      = contact.getFormattedName();
     LOG_DEBUG("Adding calllog record %s", utils::to_string(localRec).c_str());
 
-    return calllogDB->calls.Add(CalllogTableRow{.id = localRec.ID, // this is only to remove warning
-                                                .number = localRec.number,
+    return calllogDB->calls.Add(CalllogTableRow{.id           = localRec.ID, // this is only to remove warning
+                                                .number       = localRec.number,
                                                 .presentation = localRec.presentation,
-                                                .date = localRec.date,
-                                                .duration = localRec.duration,
-                                                .type = localRec.type,
-                                                .name = localRec.name,
-                                                .contactId = localRec.contactId});
+                                                .date         = localRec.date,
+                                                .duration     = localRec.duration,
+                                                .type         = localRec.type,
+                                                .name         = localRec.name,
+                                                .contactId    = localRec.contactId});
     ;
 }
 
@@ -81,23 +78,23 @@ uint32_t CalllogRecordInterface::GetLastID()
     return calllogDB->GetLastInsertRowID();
 }
 
-std::unique_ptr<std::vector<CalllogRecord>> CalllogRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
-                                                                                  CalllogRecordField field,
-                                                                                  const char *str) {
-	// TODO: alek: need proper implementation
-	return GetLimitOffset(offset,limit);
+std::unique_ptr<std::vector<CalllogRecord>> CalllogRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                          uint32_t limit,
+                                                                                          CalllogRecordField field,
+                                                                                          const char *str)
+{
+    // TODO: alek: need proper implementation
+    return GetLimitOffset(offset, limit);
 }
 
 ContactRecord CalllogRecordInterface::GetContactRecordByID(const UTF8 &contactId)
 {
     assert(contactsDB != nullptr);
     ContactRecordInterface contactInterface(contactsDB);
-    try
-    {
+    try {
         return contactInterface.GetByID(std::atoi(contactId.c_str()));
     }
-    catch (const std::exception &e)
-    {
+    catch (const std::exception &e) {
         LOG_ERROR("Exception %s occured", e.what());
         return ContactRecord();
     }
@@ -109,11 +106,9 @@ std::unique_ptr<std::vector<CalllogRecord>> CalllogRecordInterface::GetLimitOffs
 
     auto records = std::make_unique<std::vector<CalllogRecord>>();
 
-    for (const auto &c : calls)
-    {
+    for (const auto &c : calls) {
         auto contactRec = GetContactRecordByID(c.contactId);
-        if (contactRec.dbID == DB_ID_NONE)
-        {
+        if (contactRec.dbID == DB_ID_NONE) {
             LOG_ERROR("Cannot find contact for ID %s", c.contactId.c_str());
             continue;
         }
@@ -124,43 +119,45 @@ std::unique_ptr<std::vector<CalllogRecord>> CalllogRecordInterface::GetLimitOffs
     return records;
 }
 
-bool CalllogRecordInterface::Update(const CalllogRecord &rec) {
+bool CalllogRecordInterface::Update(const CalllogRecord &rec)
+{
 
     auto call = calllogDB->calls.GetByID(rec.ID);
-    if(call.id == 0){
+    if (call.id == 0) {
         return false;
     }
 
-    return calllogDB->calls.Update(CalllogTableRow{.id = rec.ID,
-                                                   .number = rec.number,
+    return calllogDB->calls.Update(CalllogTableRow{.id           = rec.ID,
+                                                   .number       = rec.number,
                                                    .presentation = rec.presentation,
-                                                   .date = rec.date,
-                                                   .duration = rec.duration,
-                                                   .type = rec.type,
-                                                   .name = rec.name,
-                                                   .contactId = rec.contactId});
+                                                   .date         = rec.date,
+                                                   .duration     = rec.duration,
+                                                   .type         = rec.type,
+                                                   .name         = rec.name,
+                                                   .contactId    = rec.contactId});
 }
 
-bool CalllogRecordInterface::RemoveByID(uint32_t id) {
+bool CalllogRecordInterface::RemoveByID(uint32_t id)
+{
 
     auto call = calllogDB->calls.GetByID(id);
-    if(call.id == 0){
+    if (call.id == 0) {
         return false;
     }
 
     return calllogDB->calls.RemoveByID(id);
 }
 
-bool CalllogRecordInterface::RemoveByField(CalllogRecordField field, const char *str) {
-
-    switch(field){
-        case CalllogRecordField::DATE:
-            return calllogDB->calls.RemoveByField(CalllogTableFields::DATE,str);
-        case CalllogRecordField::TYPE:
-            return calllogDB->calls.RemoveByField(CalllogTableFields::TYPE,str);    
-        default:
-            return false;
+bool CalllogRecordInterface::RemoveByField(CalllogRecordField field, const char *str)
+{
 
+    switch (field) {
+    case CalllogRecordField::DATE:
+        return calllogDB->calls.RemoveByField(CalllogTableFields::DATE, str);
+    case CalllogRecordField::TYPE:
+        return calllogDB->calls.RemoveByField(CalllogTableFields::TYPE, str);
+    default:
+        return false;
     }
 }
 
@@ -169,8 +166,7 @@ CalllogRecord CalllogRecordInterface::GetByID(uint32_t id)
     auto call = calllogDB->calls.GetByID(id);
 
     auto contactRec = GetContactRecordByID(call.contactId);
-    if (contactRec.dbID == DB_ID_NONE)
-    {
+    if (contactRec.dbID == DB_ID_NONE) {
         auto contactRec = GetContactRecordByID(call.contactId);
         LOG_ERROR("Cannot find contact for ID %s", call.contactId.c_str());
         return CalllogRecord();
diff --git a/module-db/Interface/CalllogRecord.hpp b/module-db/Interface/CalllogRecord.hpp
index d0cd7ab56..71c5219a9 100644
--- a/module-db/Interface/CalllogRecord.hpp
+++ b/module-db/Interface/CalllogRecord.hpp
@@ -17,54 +17,58 @@
 
 struct CalllogRecord : public Record
 {
-    UTF8 number = "";
+    UTF8 number                   = "";
     PresentationType presentation = PresentationType::PR_UNKNOWN;
-    time_t date = 0;
-    time_t duration = 0;
-    CallType type = CallType::CT_NONE;
-    UTF8 name = "";
-    UTF8 contactId = "";
+    time_t date                   = 0;
+    time_t duration               = 0;
+    CallType type                 = CallType::CT_NONE;
+    UTF8 name                     = "";
+    UTF8 contactId                = "";
 
     friend std::ostream &operator<<(std::ostream &out, const CalllogRecord &point);
 
-    CalllogRecord() = default;
+    CalllogRecord()  = default;
     ~CalllogRecord() = default;
     CalllogRecord(const CalllogTableRow &tableRow, const UTF8 &num, const UTF8 &name);
 
     uint32_t getContactId() const;
 };
 
-enum class CalllogRecordField{
+enum class CalllogRecordField
+{
     DATE,
-	TYPE,
- };
+    TYPE,
+};
 
 /*
  *
  */
-class CalllogRecordInterface : public RecordInterface<CalllogRecord,CalllogRecordField > {
-public:
-  CalllogRecordInterface(CalllogDB *CalllogDb, ContactsDB *contactsDb);
-  virtual ~CalllogRecordInterface();
+class CalllogRecordInterface : public RecordInterface<CalllogRecord, CalllogRecordField>
+{
+  public:
+    CalllogRecordInterface(CalllogDB *CalllogDb, ContactsDB *contactsDb);
+    virtual ~CalllogRecordInterface();
 
-  bool Add(const CalllogRecord &rec) override final;
-  bool RemoveByID(uint32_t id) override final;
-  bool RemoveByField(CalllogRecordField field, const char *str) override final;
-  bool Update(const CalllogRecord &rec) override final;
-  CalllogRecord GetByID(uint32_t id) override final;
+    bool Add(const CalllogRecord &rec) override final;
+    bool RemoveByID(uint32_t id) override final;
+    bool RemoveByField(CalllogRecordField field, const char *str) override final;
+    bool Update(const CalllogRecord &rec) override final;
+    CalllogRecord GetByID(uint32_t id) override final;
 
     uint32_t GetCount() override final;
     uint32_t GetCount(EntryState state);
 
     std::unique_ptr<std::vector<CalllogRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::unique_ptr<std::vector<CalllogRecord>> GetLimitOffsetByField(uint32_t offset, uint32_t limit, CalllogRecordField field,
+    std::unique_ptr<std::vector<CalllogRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                      uint32_t limit,
+                                                                      CalllogRecordField field,
                                                                       const char *str) override final;
 
     uint32_t GetLastID();
 
   private:
-    CalllogDB *calllogDB = nullptr;
+    CalllogDB *calllogDB   = nullptr;
     ContactsDB *contactsDB = nullptr;
     ContactRecord GetContactRecordByID(const UTF8 &contactId);
 };
diff --git a/module-db/Interface/ContactRecord.cpp b/module-db/Interface/ContactRecord.cpp
index a03a29b68..f0e719ca2 100644
--- a/module-db/Interface/ContactRecord.cpp
+++ b/module-db/Interface/ContactRecord.cpp
@@ -13,50 +13,47 @@
 #include <log/log.hpp>
 
 ContactRecordInterface::ContactRecordInterface(ContactsDB *db) : contactDB(db)
-{
-}
+{}
 
 ContactRecordInterface::~ContactRecordInterface()
-{
-}
+{}
 
 bool ContactRecordInterface::Add(const ContactRecord &rec)
 {
 
-    bool ret = contactDB->contacts.Add(ContactsTableRow{
-    													.type = rec.contactType,
-                                                        .isOnWhitelist = rec.isOnBlacklist,
-                                                        .isOnBlacklist = rec.isOnBlacklist,
+    bool ret = contactDB->contacts.Add(ContactsTableRow{.type           = rec.contactType,
+                                                        .isOnWhitelist  = rec.isOnBlacklist,
+                                                        .isOnBlacklist  = rec.isOnBlacklist,
                                                         .isOnFavourites = rec.isOnFavourites,
-                                                        .speedDial = rec.speeddial,
-														.namePrimary = rec.primaryName});
+                                                        .speedDial      = rec.speeddial,
+                                                        .namePrimary    = rec.primaryName});
 
-    if (!ret)
-    {
+    if (!ret) {
         return ret;
     }
 
     uint32_t contactID = contactDB->GetLastInsertRowID();
     LOG_DEBUG("New contact with ID %u created", contactID);
 
-    ret = contactDB->name.Add(
-        ContactsNameTableRow{.contactID = contactID, .namePrimary = rec.primaryName, .nameAlternative = rec.alternativeName, .favourite = rec.isOnFavourites});
+    ret = contactDB->name.Add(ContactsNameTableRow{.contactID       = contactID,
+                                                   .namePrimary     = rec.primaryName,
+                                                   .nameAlternative = rec.alternativeName,
+                                                   .favourite       = rec.isOnFavourites});
 
-    if (!ret)
-    {
+    if (!ret) {
         return ret;
     }
 
     auto contactNameID = contactDB->GetLastInsertRowID();
 
-    for (auto a : rec.numbers)
-    {
-        ret = contactDB->number.Add(
-            ContactsNumberTableRow{.contactID = contactID, .numberUser = a.numberUser.c_str(), .numbere164 = a.numberE164.c_str(), .type = a.numberType});
+    for (auto a : rec.numbers) {
+        ret = contactDB->number.Add(ContactsNumberTableRow{.contactID  = contactID,
+                                                           .numberUser = a.numberUser.c_str(),
+                                                           .numbere164 = a.numberE164.c_str(),
+                                                           .type       = a.numberType});
     }
 
-    if (!ret)
-    {
+    if (!ret) {
         return ret;
     }
 
@@ -64,8 +61,7 @@ bool ContactRecordInterface::Add(const ContactRecord &rec)
 
     ret = contactDB->ringtones.Add(ContactsRingtonesTableRow{.contactID = contactID, .assetPath = rec.assetPath});
 
-    if (!ret)
-    {
+    if (!ret) {
         return ret;
     }
 
@@ -73,32 +69,31 @@ bool ContactRecordInterface::Add(const ContactRecord &rec)
 
     // TODO: add missing feature: multiple addresses per contact
     ret = contactDB->address.Add(ContactsAddressTableRow{.contactID = contactID,
-                                                         .country = rec.country,
-                                                         .city = rec.city,
-                                                         .street = rec.street,
-                                                         .number = rec.number,
-                                                         .type = rec.addressType,
-                                                         .note = rec.note,
-                                                         .mail = rec.mail});
+                                                         .country   = rec.country,
+                                                         .city      = rec.city,
+                                                         .street    = rec.street,
+                                                         .number    = rec.number,
+                                                         .type      = rec.addressType,
+                                                         .note      = rec.note,
+                                                         .mail      = rec.mail});
 
-    if (!ret)
-    {
+    if (!ret) {
         return ret;
     }
 
     auto contactAddressID = contactDB->GetLastInsertRowID();
 
-    ret = contactDB->contacts.Update(ContactsTableRow{.ID = contactID,
-                                                      .nameID = contactNameID,
-                                                      .numbersID = std::to_string(contactNumberID),
-                                                      .ringID = contactRingID,
+    ret = contactDB->contacts.Update(ContactsTableRow{.ID         = contactID,
+                                                      .nameID     = contactNameID,
+                                                      .numbersID  = std::to_string(contactNumberID),
+                                                      .ringID     = contactRingID,
                                                       .addressIDs = std::to_string(contactAddressID),
 
-                                                      .type = rec.contactType,
-                                                      .isOnWhitelist = rec.isOnBlacklist,
-                                                      .isOnBlacklist = rec.isOnBlacklist,
+                                                      .type           = rec.contactType,
+                                                      .isOnWhitelist  = rec.isOnBlacklist,
+                                                      .isOnBlacklist  = rec.isOnBlacklist,
                                                       .isOnFavourites = rec.isOnFavourites,
-                                                      .speedDial = rec.speeddial});
+                                                      .speedDial      = rec.speeddial});
 
     return ret;
 }
@@ -112,33 +107,27 @@ bool ContactRecordInterface::RemoveByID(uint32_t id)
 {
 
     auto contact = contactDB->contacts.GetByID(id);
-    if (contact.ID == 0)
-    {
+    if (contact.ID == 0) {
         return false;
     }
 
-    if (contactDB->name.RemoveByID(contact.nameID) == false)
-    {
+    if (contactDB->name.RemoveByID(contact.nameID) == false) {
         return false;
     }
 
-    if (contactDB->address.RemoveByID(std::stoul(contact.addressIDs)) == false)
-    {
+    if (contactDB->address.RemoveByID(std::stoul(contact.addressIDs)) == false) {
         return false;
     }
 
-    if (contactDB->number.RemoveByID(std::stoul(contact.numbersID)) == false)
-    {
+    if (contactDB->number.RemoveByID(std::stoul(contact.numbersID)) == false) {
         return false;
     }
 
-    if (contactDB->ringtones.RemoveByID(contact.ringID) == false)
-    {
+    if (contactDB->ringtones.RemoveByID(contact.ringID) == false) {
         return false;
     }
 
-    if (contactDB->contacts.RemoveByID(id) == false)
-    {
+    if (contactDB->contacts.RemoveByID(id) == false) {
         return false;
     }
 
@@ -157,51 +146,46 @@ ContactRecord ContactRecordInterface::GetByID(uint32_t id)
     ContactRecord rec = ContactRecord();
 
     auto contact = contactDB->contacts.GetByID(id);
-    if (contact.ID == 0)
-    {
+    if (contact.ID == 0) {
         return rec;
     }
 
     std::vector<ContactRecord::Number> nrs = getNumbers(contact.numbersID);
-    if (nrs.size() == 0)
-    {
+    if (nrs.size() == 0) {
         return rec;
     }
     auto ring = contactDB->ringtones.GetByID(contact.ringID);
-    if (ring.ID == 0)
-    {
+    if (ring.ID == 0) {
         return rec;
     }
 
     auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-    if (address.ID == 0)
-    {
+    if (address.ID == 0) {
         return rec;
     }
 
     auto name = contactDB->name.GetByID(contact.nameID);
-    if (name.ID == 0)
-    {
+    if (name.ID == 0) {
         return rec;
     }
 
-    rec.dbID = contact.ID;
-    rec.primaryName = name.namePrimary;
+    rec.dbID            = contact.ID;
+    rec.primaryName     = name.namePrimary;
     rec.alternativeName = name.nameAlternative;
-    rec.numbers = nrs;
-    rec.contactType = contact.type;
-    rec.country = address.country;
-    rec.city = address.city;
-    rec.street = address.street;
-    rec.number = address.number;
-    rec.note = address.note;
-    rec.mail = address.mail;
-    rec.addressType = address.type;
-    rec.assetPath = ring.assetPath;
-    rec.isOnWhitelist = contact.isOnWhitelist;
-    rec.isOnBlacklist = contact.isOnBlacklist;
-    rec.isOnFavourites = contact.isOnFavourites;
-    rec.speeddial = contact.speedDial;
+    rec.numbers         = nrs;
+    rec.contactType     = contact.type;
+    rec.country         = address.country;
+    rec.city            = address.city;
+    rec.street          = address.street;
+    rec.number          = address.number;
+    rec.note            = address.note;
+    rec.mail            = address.mail;
+    rec.addressType     = address.type;
+    rec.assetPath       = ring.assetPath;
+    rec.isOnWhitelist   = contact.isOnWhitelist;
+    rec.isOnBlacklist   = contact.isOnBlacklist;
+    rec.isOnFavourites  = contact.isOnFavourites;
+    rec.speeddial       = contact.speedDial;
 
     return rec;
 }
@@ -223,115 +207,105 @@ std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetLimitOffs
 
     auto ret = contactDB->name.GetLimitOffset(offset, limit);
 
-    for (const auto &w : ret)
-    {
+    for (const auto &w : ret) {
 
         auto contact = contactDB->contacts.GetByID(w.ID);
-        if (contact.ID == 0)
-        {
+        if (contact.ID == 0) {
             return records;
         }
 
         auto name = contactDB->name.GetByID(contact.nameID);
-        if (name.ID == 0)
-        {
+        if (name.ID == 0) {
             return records;
         }
 
         auto nrs = getNumbers(contact.numbersID);
-        if (nrs.size() == 0)
-        {
+        if (nrs.size() == 0) {
             return records;
         }
 
         auto ring = contactDB->ringtones.GetByID(contact.ringID);
-        if (ring.ID == 0)
-        {
+        if (ring.ID == 0) {
             return records;
         }
 
         auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-        if (address.ID == 0)
-        {
+        if (address.ID == 0) {
             return records;
         }
 
-        records->push_back(ContactRecord{.dbID = contact.ID,
-                                         .primaryName = name.namePrimary,
+        records->push_back(ContactRecord{.dbID            = contact.ID,
+                                         .primaryName     = name.namePrimary,
                                          .alternativeName = name.nameAlternative,
-                                         .contactType = contact.type,
-                                         .numbers = nrs,
-                                         .country = address.country,
-                                         .city = address.city,
-                                         .street = address.street,
-                                         .number = address.number,
-                                         .note = address.note,
-                                         .mail = address.mail,
-                                         .addressType = address.type,
-                                         .assetPath = ring.assetPath,
-                                         .isOnWhitelist = contact.isOnWhitelist,
-                                         .isOnBlacklist = contact.isOnBlacklist,
-                                         .isOnFavourites = contact.isOnFavourites,
-                                         .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                         .contactType     = contact.type,
+                                         .numbers         = nrs,
+                                         .country         = address.country,
+                                         .city            = address.city,
+                                         .street          = address.street,
+                                         .number          = address.number,
+                                         .note            = address.note,
+                                         .mail            = address.mail,
+                                         .addressType     = address.type,
+                                         .assetPath       = ring.assetPath,
+                                         .isOnWhitelist   = contact.isOnWhitelist,
+                                         .isOnBlacklist   = contact.isOnBlacklist,
+                                         .isOnFavourites  = contact.isOnFavourites,
+                                         .speeddial       = static_cast<uint8_t>(contact.speedDial)});
     }
 
     return records;
 }
 
-std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactRecordField field,
+std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                          uint32_t limit,
+                                                                                          ContactRecordField field,
                                                                                           const char *str)
 {
     auto records = std::make_unique<std::vector<ContactRecord>>();
 
-    switch (field)
-    {
+    switch (field) {
     case ContactRecordField ::PrimaryName: {
         auto ret = contactDB->name.GetLimitOffsetByField(offset, limit, ContactNameTableFields::NamePrimary, str);
 
-        for (const auto &w : ret)
-        {
+        for (const auto &w : ret) {
 
             auto contact = contactDB->contacts.GetByID(w.contactID);
-            if (contact.ID == 0)
-            {
+            if (contact.ID == 0) {
                 return records;
             }
 
             auto nrs = getNumbers(contact.numbersID);
-            if (nrs.size() == 0)
-            {
+            if (nrs.size() == 0) {
                 return records;
             }
 
             auto ring = contactDB->ringtones.GetByID(contact.ringID);
-            if (ring.ID == 0)
-            {
+            if (ring.ID == 0) {
                 return records;
             }
 
             auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-            if (address.ID == 0)
-            {
+            if (address.ID == 0) {
                 return records;
             }
 
-            records->push_back(ContactRecord{.dbID = w.ID,
-                                             .primaryName = w.namePrimary,
+            records->push_back(ContactRecord{.dbID            = w.ID,
+                                             .primaryName     = w.namePrimary,
                                              .alternativeName = w.nameAlternative,
-                                             .contactType = contact.type,
-                                             .numbers = nrs,
-                                             .country = address.country,
-                                             .city = address.city,
-                                             .street = address.street,
-                                             .number = address.number,
-                                             .note = address.note,
-                                             .mail = address.mail,
-                                             .addressType = address.type,
-                                             .assetPath = ring.assetPath,
-                                             .isOnWhitelist = contact.isOnWhitelist,
-                                             .isOnBlacklist = contact.isOnBlacklist,
-                                             .isOnFavourites = contact.isOnFavourites,
-                                             .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                             .contactType     = contact.type,
+                                             .numbers         = nrs,
+                                             .country         = address.country,
+                                             .city            = address.city,
+                                             .street          = address.street,
+                                             .number          = address.number,
+                                             .note            = address.note,
+                                             .mail            = address.mail,
+                                             .addressType     = address.type,
+                                             .assetPath       = ring.assetPath,
+                                             .isOnWhitelist   = contact.isOnWhitelist,
+                                             .isOnBlacklist   = contact.isOnBlacklist,
+                                             .isOnFavourites  = contact.isOnFavourites,
+                                             .speeddial       = static_cast<uint8_t>(contact.speedDial)});
         }
     }
 
@@ -340,174 +314,153 @@ std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetLimitOffs
     case ContactRecordField ::NumberE164: {
         auto ret = contactDB->number.GetLimitOffsetByField(offset, limit, ContactNumberTableFields ::NumberE164, str);
 
-        for (const auto &w : ret)
-        {
+        for (const auto &w : ret) {
 
             auto contact = contactDB->contacts.GetByID(w.contactID);
-            if (contact.ID == 0)
-            {
+            if (contact.ID == 0) {
                 return records;
             }
 
             auto nrs = getNumbers(contact.numbersID);
-            if (nrs.size() == 0)
-            {
+            if (nrs.size() == 0) {
                 return records;
             }
 
             auto name = contactDB->name.GetByID(contact.nameID);
-            if (name.ID == 0)
-            {
+            if (name.ID == 0) {
                 return records;
             }
 
             auto ring = contactDB->ringtones.GetByID(contact.ringID);
-            if (ring.ID == 0)
-            {
+            if (ring.ID == 0) {
                 return records;
             }
 
             auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-            if (address.ID == 0)
-            {
+            if (address.ID == 0) {
                 return records;
             }
 
-            records->push_back(ContactRecord{.dbID = w.ID,
-                                             .primaryName = name.namePrimary,
+            records->push_back(ContactRecord{.dbID            = w.ID,
+                                             .primaryName     = name.namePrimary,
                                              .alternativeName = name.nameAlternative,
-                                             .contactType = contact.type,
-                                             .numbers = nrs,
-                                             .country = address.country,
-                                             .city = address.city,
-                                             .street = address.street,
-                                             .number = address.number,
-                                             .note = address.note,
-                                             .mail = address.mail,
-                                             .addressType = address.type,
-                                             .assetPath = ring.assetPath,
-                                             .isOnWhitelist = contact.isOnWhitelist,
-                                             .isOnBlacklist = contact.isOnBlacklist,
-                                             .isOnFavourites = contact.isOnFavourites,
-                                             .speeddial = static_cast<uint8_t>(contact.speedDial)
+                                             .contactType     = contact.type,
+                                             .numbers         = nrs,
+                                             .country         = address.country,
+                                             .city            = address.city,
+                                             .street          = address.street,
+                                             .number          = address.number,
+                                             .note            = address.note,
+                                             .mail            = address.mail,
+                                             .addressType     = address.type,
+                                             .assetPath       = ring.assetPath,
+                                             .isOnWhitelist   = contact.isOnWhitelist,
+                                             .isOnBlacklist   = contact.isOnBlacklist,
+                                             .isOnFavourites  = contact.isOnFavourites,
+                                             .speeddial       = static_cast<uint8_t>(contact.speedDial)
 
             });
         }
-    }
-    break;
+    } break;
     case ContactRecordField::SpeedDial: {
         auto ret = contactDB->contacts.GetLimitOffsetByField(0, 1, ContactTableFields::SpeedDial, str);
 
-        for (const auto &w : ret)
-        {
+        for (const auto &w : ret) {
 
             auto contact = contactDB->contacts.GetByID(w.ID);
-            if (contact.ID == 0)
-            {
+            if (contact.ID == 0) {
                 return records;
             }
 
             auto name = contactDB->name.GetByID(contact.nameID);
-            if (name.ID == 0)
-            {
+            if (name.ID == 0) {
                 return records;
             }
 
             auto nrs = getNumbers(contact.numbersID);
-            if (nrs.size() == 0)
-            {
+            if (nrs.size() == 0) {
                 return records;
             }
 
             auto ring = contactDB->ringtones.GetByID(contact.ringID);
-            if (ring.ID == 0)
-            {
+            if (ring.ID == 0) {
                 return records;
             }
 
             auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-            if (address.ID == 0)
-            {
+            if (address.ID == 0) {
                 return records;
             }
 
-            records->push_back(ContactRecord{.dbID = contact.ID,
-                                             .primaryName = name.namePrimary,
+            records->push_back(ContactRecord{.dbID            = contact.ID,
+                                             .primaryName     = name.namePrimary,
                                              .alternativeName = name.nameAlternative,
-                                             .contactType = contact.type,
-                                             .numbers = nrs,
-                                             .country = address.country,
-                                             .city = address.city,
-                                             .street = address.street,
-                                             .number = address.number,
-                                             .note = address.note,
-                                             .mail = address.mail,
-                                             .addressType = address.type,
-                                             .assetPath = ring.assetPath,
-                                             .isOnWhitelist = contact.isOnWhitelist,
-                                             .isOnBlacklist = contact.isOnBlacklist,
-                                             .isOnFavourites = contact.isOnFavourites,
-                                             .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                             .contactType     = contact.type,
+                                             .numbers         = nrs,
+                                             .country         = address.country,
+                                             .city            = address.city,
+                                             .street          = address.street,
+                                             .number          = address.number,
+                                             .note            = address.note,
+                                             .mail            = address.mail,
+                                             .addressType     = address.type,
+                                             .assetPath       = ring.assetPath,
+                                             .isOnWhitelist   = contact.isOnWhitelist,
+                                             .isOnBlacklist   = contact.isOnBlacklist,
+                                             .isOnFavourites  = contact.isOnFavourites,
+                                             .speeddial       = static_cast<uint8_t>(contact.speedDial)});
         }
-    }
-    break;
+    } break;
 
     case ContactRecordField::Favourite: {
         auto ret = contactDB->name.GetLimitOffsetByField(offset, limit, ContactNameTableFields::Favourite, str);
 
-        for (const auto &w : ret)
-        {
+        for (const auto &w : ret) {
 
             auto contact = contactDB->contacts.GetByID(w.ID);
-            if (contact.ID == 0)
-            {
+            if (contact.ID == 0) {
                 return records;
             }
 
             auto name = contactDB->name.GetByID(contact.nameID);
-            if (name.ID == 0)
-            {
+            if (name.ID == 0) {
                 return records;
             }
 
             auto nrs = getNumbers(contact.numbersID);
-            if (nrs.size() == 0)
-            {
+            if (nrs.size() == 0) {
                 return records;
             }
 
             auto ring = contactDB->ringtones.GetByID(contact.ringID);
-            if (ring.ID == 0)
-            {
+            if (ring.ID == 0) {
                 return records;
             }
 
             auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-            if (address.ID == 0)
-            {
+            if (address.ID == 0) {
                 return records;
             }
 
-            records->push_back(ContactRecord{.dbID = contact.ID,
-                                             .primaryName = name.namePrimary,
+            records->push_back(ContactRecord{.dbID            = contact.ID,
+                                             .primaryName     = name.namePrimary,
                                              .alternativeName = name.nameAlternative,
-                                             .contactType = contact.type,
-                                             .numbers = nrs,
-                                             .country = address.country,
-                                             .city = address.city,
-                                             .street = address.street,
-                                             .number = address.number,
-                                             .note = address.note,
-                                             .mail = address.mail,
-                                             .addressType = address.type,
-                                             .assetPath = ring.assetPath,
-                                             .isOnWhitelist = contact.isOnWhitelist,
-                                             .isOnBlacklist = contact.isOnBlacklist,
-                                             .isOnFavourites = contact.isOnFavourites,
-                                             .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                             .contactType     = contact.type,
+                                             .numbers         = nrs,
+                                             .country         = address.country,
+                                             .city            = address.city,
+                                             .street          = address.street,
+                                             .number          = address.number,
+                                             .note            = address.note,
+                                             .mail            = address.mail,
+                                             .addressType     = address.type,
+                                             .assetPath       = ring.assetPath,
+                                             .isOnWhitelist   = contact.isOnWhitelist,
+                                             .isOnBlacklist   = contact.isOnBlacklist,
+                                             .isOnFavourites  = contact.isOnFavourites,
+                                             .speeddial       = static_cast<uint8_t>(contact.speedDial)});
         }
-    }
-    break;
+    } break;
     }
 
     return records;
@@ -520,104 +473,96 @@ std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetByName(UT
 
     auto ret = contactDB->name.GetByName(primaryName.c_str(), alternativeName.c_str());
 
-    for (const auto &w : ret)
-    {
+    for (const auto &w : ret) {
 
         auto contact = contactDB->contacts.GetByID(w.contactID);
-        if (contact.ID == 0)
-        {
+        if (contact.ID == 0) {
             return records;
         }
 
         auto nrs = getNumbers(contact.numbersID);
-        if (nrs.size() == 0)
-        {
+        if (nrs.size() == 0) {
             return records;
         }
 
         auto ring = contactDB->ringtones.GetByID(contact.ringID);
-        if (ring.ID == 0)
-        {
+        if (ring.ID == 0) {
             return records;
         }
 
         auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-        if (address.ID == 0)
-        {
+        if (address.ID == 0) {
             return records;
         }
 
-        records->push_back(ContactRecord{.dbID = w.ID,
-                                         .primaryName = w.namePrimary,
+        records->push_back(ContactRecord{.dbID            = w.ID,
+                                         .primaryName     = w.namePrimary,
                                          .alternativeName = w.nameAlternative,
-                                         .contactType = contact.type,
-                                         .numbers = nrs,
-                                         .country = address.country,
-                                         .city = address.city,
-                                         .street = address.street,
-                                         .number = address.number,
-                                         .note = address.note,
-                                         .mail = address.mail,
-                                         .addressType = address.type,
-                                         .assetPath = ring.assetPath,
-                                         .isOnWhitelist = contact.isOnWhitelist,
-                                         .isOnBlacklist = contact.isOnBlacklist,
-                                         .isOnFavourites = contact.isOnFavourites,
-                                         .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                         .contactType     = contact.type,
+                                         .numbers         = nrs,
+                                         .country         = address.country,
+                                         .city            = address.city,
+                                         .street          = address.street,
+                                         .number          = address.number,
+                                         .note            = address.note,
+                                         .mail            = address.mail,
+                                         .addressType     = address.type,
+                                         .assetPath       = ring.assetPath,
+                                         .isOnWhitelist   = contact.isOnWhitelist,
+                                         .isOnBlacklist   = contact.isOnBlacklist,
+                                         .isOnFavourites  = contact.isOnFavourites,
+                                         .speeddial       = static_cast<uint8_t>(contact.speedDial)});
     }
 
     return records;
 }
 
-std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::Search(const char *primaryName, const char *alternativeName, const char *number)
+std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::Search(const char *primaryName,
+                                                                           const char *alternativeName,
+                                                                           const char *number)
 {
     auto records = std::make_unique<std::vector<ContactRecord>>();
 
     auto ret = contactDB->contacts.Search(primaryName, alternativeName, number);
 
-    for (const auto &w : ret)
-    {
+    for (const auto &w : ret) {
         auto contact = contactDB->contacts.GetByID(w.ID);
-        if (contact.ID == 0)
-        {
+        if (contact.ID == 0) {
             return records;
         }
 
         auto nrs = getNumbers(contact.numbersID);
-        if (nrs.size() == 0)
-        {
+        if (nrs.size() == 0) {
             return records;
         }
 
         auto ring = contactDB->ringtones.GetByID(contact.ringID);
-        if (ring.ID == 0)
-        {
+        if (ring.ID == 0) {
             return records;
         }
 
         auto address = contactDB->address.GetByID(std::stoul(contact.addressIDs));
-        if (address.ID == 0)
-        {
+        if (address.ID == 0) {
             return records;
         }
 
-        records->push_back(ContactRecord{.dbID = w.ID,
-                                         .primaryName = w.namePrimary,
+        records->push_back(ContactRecord{.dbID            = w.ID,
+                                         .primaryName     = w.namePrimary,
                                          .alternativeName = w.nameAlternative,
-                                         .contactType = contact.type,
-                                         .numbers = nrs,
-                                         .country = address.country,
-                                         .city = address.city,
-                                         .street = address.street,
-                                         .number = address.number,
-                                         .note = address.note,
-                                         .mail = address.mail,
-                                         .addressType = address.type,
-                                         .assetPath = ring.assetPath,
-                                         .isOnWhitelist = contact.isOnWhitelist,
-                                         .isOnBlacklist = contact.isOnBlacklist,
-                                         .isOnFavourites = contact.isOnFavourites,
-                                         .speeddial = static_cast<uint8_t>(contact.speedDial)});
+                                         .contactType     = contact.type,
+                                         .numbers         = nrs,
+                                         .country         = address.country,
+                                         .city            = address.city,
+                                         .street          = address.street,
+                                         .number          = address.number,
+                                         .note            = address.note,
+                                         .mail            = address.mail,
+                                         .addressType     = address.type,
+                                         .assetPath       = ring.assetPath,
+                                         .isOnWhitelist   = contact.isOnWhitelist,
+                                         .isOnBlacklist   = contact.isOnBlacklist,
+                                         .isOnFavourites  = contact.isOnFavourites,
+                                         .speeddial       = static_cast<uint8_t>(contact.speedDial)});
     }
 
     return records;
@@ -628,23 +573,21 @@ std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetContactBy
     return GetLimitOffsetByField(0, 1, ContactRecordField::NumberE164, number.c_str());
 }
 
-std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetByNumber(const UTF8 &number, CreateTempContact createTempContact)
+std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetByNumber(const UTF8 &number,
+                                                                                CreateTempContact createTempContact)
 {
     auto ret = GetContactByNumber(number);
-    if (ret->size() > 0)
-    {
+    if (ret->size() > 0) {
         return ret;
     }
 
     // Contact not found, create temporary one
-    if (createTempContact == CreateTempContact::True)
-    {
+    if (createTempContact == CreateTempContact::True) {
         LOG_INFO("Cannot find contact for number %s, creating temporary one", number.c_str());
         if (!Add(ContactRecord{
                 .contactType = ContactType::TEMPORARY,
                 .numbers = std::vector<ContactRecord::Number>{ContactRecord::Number(number.c_str(), number.c_str())},
-            }))
-        {
+            })) {
             LOG_ERROR("Cannot add contact record");
             return ret;
         }
@@ -663,11 +606,9 @@ std::unique_ptr<std::vector<ContactRecord>> ContactRecordInterface::GetBySpeedDi
 std::vector<ContactRecord::Number> ContactRecordInterface::getNumbers(const std::string &numbers_id)
 {
     std::vector<ContactRecord::Number> nrs;
-    for (auto nr_str : utils::split(numbers_id, ' '))
-    {
+    for (auto nr_str : utils::split(numbers_id, ' ')) {
         auto nr = contactDB->number.GetByID(std::stol(nr_str));
-        if (nr.ID == 0)
-        {
+        if (nr.ID == 0) {
             return nrs;
         }
         nrs.push_back(ContactRecord::Number(nr.numberUser, nr.numbere164, nr.type));
diff --git a/module-db/Interface/ContactRecord.hpp b/module-db/Interface/ContactRecord.hpp
index a1dcafa7a..fdc6cc3f5 100644
--- a/module-db/Interface/ContactRecord.hpp
+++ b/module-db/Interface/ContactRecord.hpp
@@ -32,8 +32,7 @@ struct ContactRecord
         ContactNumberType numberType;
         Number(UTF8 n_user = "", UTF8 n_e164 = "", ContactNumberType n_type = ContactNumberType::CELL)
             : numberUser(n_user), numberE164(n_e164), numberType(n_type)
-        {
-        }
+        {}
     };
     std::vector<Number> numbers;
 
@@ -54,8 +53,7 @@ struct ContactRecord
 
     inline UTF8 getFormattedName()
     {
-        if (contactType == ContactType::TEMPORARY)
-        {
+        if (contactType == ContactType::TEMPORARY) {
             return numbers[0].numberE164;
         }
 
@@ -94,7 +92,9 @@ class ContactRecordInterface : public RecordInterface<ContactRecord, ContactReco
 
     std::unique_ptr<std::vector<ContactRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::unique_ptr<std::vector<ContactRecord>> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactRecordField field,
+    std::unique_ptr<std::vector<ContactRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                      uint32_t limit,
+                                                                      ContactRecordField field,
                                                                       const char *str) override final;
 
     std::unique_ptr<std::vector<ContactRecord>> GetByName(UTF8 primaryName, UTF8 alternativeName);
@@ -105,11 +105,13 @@ class ContactRecordInterface : public RecordInterface<ContactRecord, ContactReco
         True
     };
 
-    std::unique_ptr<std::vector<ContactRecord>> GetByNumber(const UTF8 &number, CreateTempContact createTempContact = CreateTempContact::False);
+    std::unique_ptr<std::vector<ContactRecord>> GetByNumber(
+        const UTF8 &number, CreateTempContact createTempContact = CreateTempContact::False);
 
     std::unique_ptr<std::vector<ContactRecord>> GetBySpeedDial(uint8_t speedDial);
 
-    std::unique_ptr<std::vector<ContactRecord>> Search(const char *primaryName, const char *alternativeName,
+    std::unique_ptr<std::vector<ContactRecord>> Search(const char *primaryName,
+                                                       const char *alternativeName,
                                                        const char *number);
 
   private:
@@ -119,4 +121,3 @@ class ContactRecordInterface : public RecordInterface<ContactRecord, ContactReco
 
     std::unique_ptr<std::vector<ContactRecord>> GetContactByNumber(const UTF8 &number);
 };
-
diff --git a/module-db/Interface/CountryCodeRecord.hpp b/module-db/Interface/CountryCodeRecord.hpp
index f137950ee..c44b1b978 100644
--- a/module-db/Interface/CountryCodeRecord.hpp
+++ b/module-db/Interface/CountryCodeRecord.hpp
@@ -31,15 +31,12 @@ class CountryCodeRecordInterface : public RecordInterface<CountryCodeRecord, Cou
 
   public:
     CountryCodeRecordInterface(CountryCodesDB *db) : codesDB(db)
-    {
-    }
+    {}
     ~CountryCodeRecordInterface()
-    {
-    }
+    {}
     CodesTableRow GetByMCC(uint32_t mcc)
     {
-        if (codesDB)
-        {
+        if (codesDB) {
             return (codesDB->countryCodes.GetByMCC(mcc));
         }
 
diff --git a/module-db/Interface/NotesRecord.cpp b/module-db/Interface/NotesRecord.cpp
index 3aa1009fa..d830b63b8 100644
--- a/module-db/Interface/NotesRecord.cpp
+++ b/module-db/Interface/NotesRecord.cpp
@@ -9,112 +9,101 @@
 #include "NotesRecord.hpp"
 #include "../Tables/NotesTable.hpp"
 
-NotesRecordInterface::NotesRecordInterface(NotesDB* notesDb): notesDB(notesDb) {
-}
+NotesRecordInterface::NotesRecordInterface(NotesDB *notesDb) : notesDB(notesDb)
+{}
 
-NotesRecordInterface::~NotesRecordInterface() {
-}
+NotesRecordInterface::~NotesRecordInterface()
+{}
 
-bool NotesRecordInterface::Add(const NotesRecord &rec) {
+bool NotesRecordInterface::Add(const NotesRecord &rec)
+{
 
     uint32_t contactID = 0;
 
-      // Create SMS
-    notesDB->notes.Add(NotesTableRow{
-            .date=rec.date,
-            .snippet=rec.snippet,
-			.path=rec.path
-    });
+    // Create SMS
+    notesDB->notes.Add(NotesTableRow{.date = rec.date, .snippet = rec.snippet, .path = rec.path});
 
-    //TODO: error check
+    // TODO: error check
 
     return true;
 }
 
-uint32_t NotesRecordInterface::GetCount() {
+uint32_t NotesRecordInterface::GetCount()
+{
     return notesDB->notes.GetCount();
 }
 
-std::unique_ptr<std::vector<NotesRecord>> NotesRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
-                                                                                  NotesRecordField field,
-                                                                                  const char *str) {
-	return GetLimitOffset(offset,limit);
+std::unique_ptr<std::vector<NotesRecord>> NotesRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                      uint32_t limit,
+                                                                                      NotesRecordField field,
+                                                                                      const char *str)
+{
+    return GetLimitOffset(offset, limit);
 }
 
-
-std::unique_ptr<std::vector<NotesRecord>> NotesRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto notes = notesDB->notes.GetLimitOffset(offset,limit);
+std::unique_ptr<std::vector<NotesRecord>> NotesRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto notes = notesDB->notes.GetLimitOffset(offset, limit);
 
     auto records = std::make_unique<std::vector<NotesRecord>>();
-//
-	NotesRecordInterface notesInterface(notesDB);
-        for(const auto &w : notes){
+    //
+    NotesRecordInterface notesInterface(notesDB);
+    for (const auto &w : notes) {
 
-            records->push_back({
-               .ID=w.ID,
-               .date = w.date,
-    		   .snippet = w.snippet,
-    		   .path = w.path,
-            });
-        }
+        records->push_back({
+            .ID      = w.ID,
+            .date    = w.date,
+            .snippet = w.snippet,
+            .path    = w.path,
+        });
+    }
 
-        return records;
+    return records;
 }
 
-bool NotesRecordInterface::Update(const NotesRecord &rec) {
+bool NotesRecordInterface::Update(const NotesRecord &rec)
+{
 
     auto note = notesDB->notes.GetByID(rec.ID);
-    if(note.ID == 0){
+    if (note.ID == 0) {
         return false;
     }
 
-    notesDB->notes.Update(NotesTableRow{
-        .ID=rec.ID,
-        .date=rec.date,
-        .snippet=rec.snippet,
-		.path=rec.path
-    });
+    notesDB->notes.Update(NotesTableRow{.ID = rec.ID, .date = rec.date, .snippet = rec.snippet, .path = rec.path});
 
     return true;
 }
 
-bool NotesRecordInterface::RemoveByID(uint32_t id) {
+bool NotesRecordInterface::RemoveByID(uint32_t id)
+{
 
     auto note = notesDB->notes.GetByID(id);
-    if(note.ID == 0){
+    if (note.ID == 0) {
         return false;
     }
 
     // Remove SMS
-    if(notesDB->notes.RemoveByID(id) == false){
+    if (notesDB->notes.RemoveByID(id) == false) {
         return false;
     }
 
     return true;
 }
 
-bool NotesRecordInterface::RemoveByField(NotesRecordField field, const char *str) {
-
-    switch(field){
-        case NotesRecordField::Data:
-            return notesDB->notes.RemoveByField(NotesTableFields::Date,str);
-        default:
-            return false;
+bool NotesRecordInterface::RemoveByField(NotesRecordField field, const char *str)
+{
 
+    switch (field) {
+    case NotesRecordField::Data:
+        return notesDB->notes.RemoveByField(NotesTableFields::Date, str);
+    default:
+        return false;
     }
-
 }
 
-NotesRecord NotesRecordInterface::GetByID(uint32_t id) {
+NotesRecord NotesRecordInterface::GetByID(uint32_t id)
+{
     auto note = notesDB->notes.GetByID(id);
 
-    return NotesRecord{
-        .ID=note.ID,
-        .date=note.date,
-        .snippet=note.snippet,
-		.path=note.path
-    };
-
+    return NotesRecord{.ID = note.ID, .date = note.date, .snippet = note.snippet, .path = note.path};
 }
-
-
diff --git a/module-db/Interface/NotesRecord.hpp b/module-db/Interface/NotesRecord.hpp
index 8163d53e8..cd9cdf53b 100644
--- a/module-db/Interface/NotesRecord.hpp
+++ b/module-db/Interface/NotesRecord.hpp
@@ -14,41 +14,46 @@
 #include "utf8/UTF8.hpp"
 #include "../Common/Common.hpp"
 
-struct NotesRecord{
-	uint32_t ID;
-	uint32_t date;
-	UTF8    snippet;
-	UTF8    path;
+struct NotesRecord
+{
+    uint32_t ID;
+    uint32_t date;
+    UTF8 snippet;
+    UTF8 path;
 };
 
-enum class NotesRecordField{
+enum class NotesRecordField
+{
     Data,
     Snippet,
-	Path
+    Path
 };
 
 /*
  *
  */
-class NotesRecordInterface : public RecordInterface<NotesRecord,NotesRecordField > {
-public:
-
-    NotesRecordInterface(NotesDB* notesDb);
+class NotesRecordInterface : public RecordInterface<NotesRecord, NotesRecordField>
+{
+  public:
+    NotesRecordInterface(NotesDB *notesDb);
     virtual ~NotesRecordInterface();
 
-    bool Add(const NotesRecord& rec) override final;
+    bool Add(const NotesRecord &rec) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool RemoveByField(NotesRecordField field,const char* str) override final;
-    bool Update(const NotesRecord& rec) override final;
+    bool RemoveByField(NotesRecordField field, const char *str) override final;
+    bool Update(const NotesRecord &rec) override final;
     NotesRecord GetByID(uint32_t id) override final;
 
     uint32_t GetCount() override final;
 
-    std::unique_ptr<std::vector<NotesRecord>> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
+    std::unique_ptr<std::vector<NotesRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-std::unique_ptr<std::vector<NotesRecord>> GetLimitOffsetByField(uint32_t offset,uint32_t limit,NotesRecordField field, const char* str) override final;
+    std::unique_ptr<std::vector<NotesRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                    uint32_t limit,
+                                                                    NotesRecordField field,
+                                                                    const char *str) override final;
 
-private:
+  private:
     const uint32_t snippetLength = 60;
-    NotesDB* notesDB;
+    NotesDB *notesDB;
 };
diff --git a/module-db/Interface/Record.cpp b/module-db/Interface/Record.cpp
index efdffc692..e5aeb5e3b 100644
--- a/module-db/Interface/Record.cpp
+++ b/module-db/Interface/Record.cpp
@@ -8,5 +8,4 @@
  * @details
  */
 
-
 #include "Record.hpp"
diff --git a/module-db/Interface/Record.hpp b/module-db/Interface/Record.hpp
index 162294cce..642f82870 100644
--- a/module-db/Interface/Record.hpp
+++ b/module-db/Interface/Record.hpp
@@ -19,30 +19,53 @@ struct Record
     uint32_t ID = DB_ID_NONE;
 };
 
-template<typename T, typename F>
-class RecordInterface {
-public:
-
+template <typename T, typename F> class RecordInterface
+{
+  public:
     RecordInterface(){};
 
     virtual ~RecordInterface(){};
 
-    virtual bool Add(const T&){ return true;};
+    virtual bool Add(const T &)
+    {
+        return true;
+    };
 
-    virtual bool RemoveByID(uint32_t id){return true;};
+    virtual bool RemoveByID(uint32_t id)
+    {
+        return true;
+    };
 
-    virtual bool RemoveByField(F field,const char* str){return true;};
+    virtual bool RemoveByField(F field, const char *str)
+    {
+        return true;
+    };
 
-    virtual bool Update(const T&){return true;};
+    virtual bool Update(const T &)
+    {
+        return true;
+    };
 
-    virtual T GetByID(uint32_t id){return T{};};
-
-    virtual uint32_t GetCount(){return 0;}
-
-    virtual std::unique_ptr<std::vector<T>> GetLimitOffset(uint32_t offset,uint32_t limit){return std::make_unique<std::vector<T>>();}
-
-    virtual std::unique_ptr<std::vector<T>> GetLimitOffsetByField(uint32_t offset,uint32_t limit,F field, const char* str){return std::make_unique<std::vector<T>>();}
+    virtual T GetByID(uint32_t id)
+    {
+        return T{};
+    };
 
+    virtual uint32_t GetCount()
+    {
+        return 0;
+    }
 
+    virtual std::unique_ptr<std::vector<T>> GetLimitOffset(uint32_t offset, uint32_t limit)
+    {
+        return std::make_unique<std::vector<T>>();
+    }
 
+    virtual std::unique_ptr<std::vector<T>> GetLimitOffsetByField(uint32_t offset,
+                                                                  uint32_t limit,
+                                                                  F field,
+                                                                  const char *str)
+    {
+        return std::make_unique<std::vector<T>>();
+    }
 };
diff --git a/module-db/Interface/SMSRecord.cpp b/module-db/Interface/SMSRecord.cpp
index 35ae287a0..aa03093f4 100644
--- a/module-db/Interface/SMSRecord.cpp
+++ b/module-db/Interface/SMSRecord.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "SMSRecord.hpp"
 #include "ContactRecord.hpp"
 #include "ThreadRecord.hpp"
@@ -16,40 +15,38 @@
 
 SMSRecord::SMSRecord(const SMSTableRow &w, const UTF8 &num)
 {
-    ID = w.ID;
-    date = w.date;
-    dateSent = w.dateSent;
+    ID        = w.ID;
+    date      = w.date;
+    dateSent  = w.dateSent;
     errorCode = w.errorCode;
-    number = num;
-    body = w.body;
-    isRead = w.isRead;
-    type = w.type;
-    threadID = w.threadID;
+    number    = num;
+    body      = w.body;
+    isRead    = w.isRead;
+    type      = w.type;
+    threadID  = w.threadID;
     contactID = w.contactID;
 }
 
-SMSRecordInterface::SMSRecordInterface(SmsDB* smsDb,ContactsDB* contactsDb): smsDB(smsDb),contactsDB(contactsDb) {
+SMSRecordInterface::SMSRecordInterface(SmsDB *smsDb, ContactsDB *contactsDb) : smsDB(smsDb), contactsDB(contactsDb)
+{}
 
-}
+SMSRecordInterface::~SMSRecordInterface()
+{}
 
-SMSRecordInterface::~SMSRecordInterface() {
-
-}
-
-bool SMSRecordInterface::Add(const SMSRecord &rec) {
+bool SMSRecordInterface::Add(const SMSRecord &rec)
+{
     ContactRecordInterface contactInterface(contactsDB);
     auto contactRec = contactInterface.GetByNumber(rec.number, ContactRecordInterface::CreateTempContact::True);
-    if (contactRec->size() == 0)
-    {
+    if (contactRec->size() == 0) {
         LOG_ERROR("Cannot find contact, for number %s", rec.number.c_str());
         return false;
     }
     uint32_t contactID = (*contactRec)[0].dbID;
     // Search for a thread with specified contactID
     uint32_t threadID = 0;
-    ThreadRecordInterface threadInterface(smsDB,contactsDB);
-    auto threadRec = threadInterface.GetLimitOffsetByField(0, 1, ThreadRecordField::ContactID,
-                                                           std::to_string(contactID).c_str());
+    ThreadRecordInterface threadInterface(smsDB, contactsDB);
+    auto threadRec =
+        threadInterface.GetLimitOffsetByField(0, 1, ThreadRecordField::ContactID, std::to_string(contactID).c_str());
 
     // Thread not found, create one
     if (threadRec->size() == 0) {
@@ -58,39 +55,37 @@ bool SMSRecordInterface::Add(const SMSRecord &rec) {
         re.contactID = contactID;
         threadInterface.Add(re);
 
-        threadRec = threadInterface.GetLimitOffsetByField(0,1,ThreadRecordField::ContactID,std::to_string(contactID).c_str());
-
+        threadRec = threadInterface.GetLimitOffsetByField(
+            0, 1, ThreadRecordField::ContactID, std::to_string(contactID).c_str());
     }
     threadID = (*threadRec)[0].dbID;
 
     // Create SMS
-    smsDB->sms.Add(SMSTableRow{
-            .threadID = threadID,
-            .contactID=contactID,
-            .date=rec.date,
-            .dateSent=rec.dateSent,
-            .errorCode=rec.errorCode,
-            .body=rec.body,
-            .isRead=rec.isRead,
-            .type=rec.type
+    smsDB->sms.Add(SMSTableRow{.threadID  = threadID,
+                               .contactID = contactID,
+                               .date      = rec.date,
+                               .dateSent  = rec.dateSent,
+                               .errorCode = rec.errorCode,
+                               .body      = rec.body,
+                               .isRead    = rec.isRead,
+                               .type      = rec.type
 
     });
 
-    //TODO: error check
+    // TODO: error check
 
     // Update thread
-    auto thread = (*threadRec)[0];
-    thread.snippet = rec.body.substr(0,rec.body.length() >= snippetLength ? snippetLength : rec.body.length());
-    thread.date = rec.date;
-    thread.type = rec.type;
+    auto thread    = (*threadRec)[0];
+    thread.snippet = rec.body.substr(0, rec.body.length() >= snippetLength ? snippetLength : rec.body.length());
+    thread.date    = rec.date;
+    thread.type    = rec.type;
     thread.msgCount++;
-    if(rec.type == SMSType::INBOX){
+    if (rec.type == SMSType::INBOX) {
         thread.msgRead++;
     }
 
     threadInterface.Update(thread);
 
-
     return true;
 }
 uint32_t SMSRecordInterface::GetCount(EntryState state)
@@ -98,40 +93,42 @@ uint32_t SMSRecordInterface::GetCount(EntryState state)
     return smsDB->sms.GetCount(state);
 }
 
-uint32_t SMSRecordInterface::GetCount() {
+uint32_t SMSRecordInterface::GetCount()
+{
     return GetCount(EntryState::ALL);
 }
 
 uint32_t SMSRecordInterface::GetLastID(void)
 {
-	return smsDB->GetLastInsertRowID();
-
+    return smsDB->GetLastInsertRowID();
 }
-std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
+std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                  uint32_t limit,
                                                                                   SMSRecordField field,
-                                                                                  const char *str) {
+                                                                                  const char *str)
+{
     auto records = std::make_unique<std::vector<SMSRecord>>();
 
     std::vector<SMSTableRow> smses;
 
-    switch(field){
-        case SMSRecordField ::ContactID:
-            smses = smsDB->sms.GetLimitOffsetByField(offset,limit,SMSTableFields::ContactID,str);
-            break;
+    switch (field) {
+    case SMSRecordField ::ContactID:
+        smses = smsDB->sms.GetLimitOffsetByField(offset, limit, SMSTableFields::ContactID, str);
+        break;
 
-        case SMSRecordField ::ThreadID:
-            smses = smsDB->sms.GetLimitOffsetByField(offset,limit,SMSTableFields::ThreadID,str);
-            break;
+    case SMSRecordField ::ThreadID:
+        smses = smsDB->sms.GetLimitOffsetByField(offset, limit, SMSTableFields::ThreadID, str);
+        break;
 
-        default:
-            LOG_ERROR("SMS thread get - wrong selection: %d", field);
-            return records;
+    default:
+        LOG_ERROR("SMS thread get - wrong selection: %d", field);
+        return records;
     }
 
     LOG_INFO("Get: %d SMS by selection: %d", smses.size(), field);
 
     ContactRecordInterface contactInterface(contactsDB);
-    for(const auto &w : smses){
+    for (const auto &w : smses) {
 
         auto contactRec = contactInterface.GetByID(w.contactID);
         // TODO: or numberUser? or other number?
@@ -141,14 +138,14 @@ std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffsetByFiel
     return records;
 }
 
-
-std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto smses = smsDB->sms.GetLimitOffset(offset,limit);
+std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto smses = smsDB->sms.GetLimitOffset(offset, limit);
 
     auto records = std::make_unique<std::vector<SMSRecord>>();
 
     ContactRecordInterface contactInterface(contactsDB);
-    for(const auto &w : smses){
+    for (const auto &w : smses) {
 
         auto contactRec = contactInterface.GetByID(w.contactID);
         // TODO: or numberUser? or other number
@@ -158,48 +155,49 @@ std::unique_ptr<std::vector<SMSRecord>> SMSRecordInterface::GetLimitOffset(uint3
     return records;
 }
 
-bool SMSRecordInterface::Update(const SMSRecord &rec) {
+bool SMSRecordInterface::Update(const SMSRecord &rec)
+{
 
     auto sms = smsDB->sms.GetByID(rec.ID);
-    if(sms.ID == 0){
+    if (sms.ID == 0) {
         return false;
     }
 
-    smsDB->sms.Update(SMSTableRow{.ID = rec.ID,
-                                  .threadID = sms.threadID,
+    smsDB->sms.Update(SMSTableRow{.ID        = rec.ID,
+                                  .threadID  = sms.threadID,
                                   .contactID = sms.contactID,
-                                  .date = rec.date,
-                                  .dateSent = rec.dateSent,
+                                  .date      = rec.date,
+                                  .dateSent  = rec.dateSent,
                                   .errorCode = rec.errorCode,
-                                  .body = rec.body,
-                                  .isRead = rec.isRead,
-                                  .type = rec.type});
+                                  .body      = rec.body,
+                                  .isRead    = rec.isRead,
+                                  .type      = rec.type});
 
     // Update messages read count if necessary
-    if(!sms.isRead && rec.isRead){
-        ThreadRecordInterface threadInterface(smsDB,contactsDB);
-        auto threadRec =   threadInterface.GetByID(sms.threadID);
+    if (!sms.isRead && rec.isRead) {
+        ThreadRecordInterface threadInterface(smsDB, contactsDB);
+        auto threadRec = threadInterface.GetByID(sms.threadID);
         threadRec.msgRead--;
         threadInterface.Update(threadRec);
-
     }
 
     return true;
 }
 
-bool SMSRecordInterface::RemoveByID(uint32_t id) {
+bool SMSRecordInterface::RemoveByID(uint32_t id)
+{
 
     auto sms = smsDB->sms.GetByID(id);
-    if(sms.ID == 0){
+    if (sms.ID == 0) {
         return false;
     }
 
-    ThreadRecordInterface threadInterface(smsDB,contactsDB);
+    ThreadRecordInterface threadInterface(smsDB, contactsDB);
     auto threadRec = threadInterface.GetByID(sms.threadID);
 
     // If thread not found
-    if(threadRec.dbID == 0){
-        if(smsDB->sms.RemoveByID(id) == false){
+    if (threadRec.dbID == 0) {
+        if (smsDB->sms.RemoveByID(id) == false) {
             return false;
         }
 
@@ -207,50 +205,47 @@ bool SMSRecordInterface::RemoveByID(uint32_t id) {
     }
 
     // If thread contains only one message remove it
-    if(threadRec.msgCount == 1){
+    if (threadRec.msgCount == 1) {
         threadInterface.RemoveByID(sms.threadID);
     }
-    else{
+    else {
         // Update msg count
         threadRec.msgCount--;
         threadInterface.Update(threadRec);
     }
 
     // Remove SMS
-    if(smsDB->sms.RemoveByID(id) == false){
+    if (smsDB->sms.RemoveByID(id) == false) {
         return false;
     }
 
     return true;
 }
 
-bool SMSRecordInterface::RemoveByField(SMSRecordField field, const char *str) {
+bool SMSRecordInterface::RemoveByField(SMSRecordField field, const char *str)
+{
 
-    switch(field){
-        case SMSRecordField ::ContactID:
-            return smsDB->sms.RemoveByField(SMSTableFields::ContactID,str);
+    switch (field) {
+    case SMSRecordField ::ContactID:
+        return smsDB->sms.RemoveByField(SMSTableFields::ContactID, str);
 
-        case SMSRecordField ::ThreadID:
-            return smsDB->sms.RemoveByField(SMSTableFields::ThreadID,str);
+    case SMSRecordField ::ThreadID:
+        return smsDB->sms.RemoveByField(SMSTableFields::ThreadID, str);
 
-        case SMSRecordField ::Number:
-            return false;
-
-        default:
-            return false;
+    case SMSRecordField ::Number:
+        return false;
 
+    default:
+        return false;
     }
-
 }
 
-SMSRecord SMSRecordInterface::GetByID(uint32_t id) {
+SMSRecord SMSRecordInterface::GetByID(uint32_t id)
+{
     auto sms = smsDB->sms.GetByID(id);
 
-
     ContactRecordInterface contactInterface(contactsDB);
     auto contactRec = contactInterface.GetByID(sms.contactID);
     // TODO: or numberUser?
     return SMSRecord{sms, contactRec.numbers[0].numberE164};
 }
-
-
diff --git a/module-db/Interface/SMSRecord.hpp b/module-db/Interface/SMSRecord.hpp
index 8641c3f8a..929189a54 100644
--- a/module-db/Interface/SMSRecord.hpp
+++ b/module-db/Interface/SMSRecord.hpp
@@ -18,49 +18,51 @@
 
 struct SMSRecord : public Record
 {
-    uint32_t date = 0;
-    uint32_t dateSent = 0;
+    uint32_t date      = 0;
+    uint32_t dateSent  = 0;
     uint32_t errorCode = 0;
-    UTF8 number = "";
-    UTF8 body = "";
-    bool isRead = false;
-    SMSType type = SMSType::ALL;
-    uint32_t threadID = 0;
+    UTF8 number        = "";
+    UTF8 body          = "";
+    bool isRead        = false;
+    SMSType type       = SMSType::ALL;
+    uint32_t threadID  = 0;
     uint32_t contactID = 0;
 
     SMSRecord() = default;
     SMSRecord(const SMSTableRow &, const UTF8 & = "");
 };
 
-enum class SMSRecordField{
+enum class SMSRecordField
+{
     Number,
     ThreadID,
     ContactID
 };
 
-class SMSRecordInterface : public RecordInterface<SMSRecord,SMSRecordField > {
-public:
-
-    SMSRecordInterface(SmsDB* smsDb,ContactsDB* contactsDb);
+class SMSRecordInterface : public RecordInterface<SMSRecord, SMSRecordField>
+{
+  public:
+    SMSRecordInterface(SmsDB *smsDb, ContactsDB *contactsDb);
     ~SMSRecordInterface();
 
-    bool Add(const SMSRecord& rec) override final;
+    bool Add(const SMSRecord &rec) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool RemoveByField(SMSRecordField field,const char* str) override final;
-    bool Update(const SMSRecord& rec) override final;
+    bool RemoveByField(SMSRecordField field, const char *str) override final;
+    bool Update(const SMSRecord &rec) override final;
     SMSRecord GetByID(uint32_t id) override final;
 
     uint32_t GetCount() override final;
     uint32_t GetCount(EntryState state);
     uint32_t GetLastID(void);
-    std::unique_ptr<std::vector<SMSRecord>> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
+    std::unique_ptr<std::vector<SMSRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::unique_ptr<std::vector<SMSRecord>> GetLimitOffsetByField(uint32_t offset,uint32_t limit,SMSRecordField field, const char* str) override final;
+    std::unique_ptr<std::vector<SMSRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                  uint32_t limit,
+                                                                  SMSRecordField field,
+                                                                  const char *str) override final;
 
-private:
+  private:
     const uint32_t snippetLength = 45;
-    SmsDB* smsDB;
-    ContactsDB* contactsDB;
-
-
+    SmsDB *smsDB;
+    ContactsDB *contactsDB;
 };
diff --git a/module-db/Interface/SettingsRecord.cpp b/module-db/Interface/SettingsRecord.cpp
index a3a6c32e5..81a22faee 100644
--- a/module-db/Interface/SettingsRecord.cpp
+++ b/module-db/Interface/SettingsRecord.cpp
@@ -8,13 +8,11 @@
  * @details
  */
 
-
 #include "SettingsRecord.hpp"
 
 SettingsRecord::ActiveSim SettingsRecord::to(const uint32_t sim)
 {
-    if (sim >= static_cast<uint32_t>(ActiveSim::NONE) && sim <= static_cast<uint32_t>(ActiveSim::SIM2))
-    {
+    if (sim >= static_cast<uint32_t>(ActiveSim::NONE) && sim <= static_cast<uint32_t>(ActiveSim::SIM2)) {
         return ActiveSim(sim);
     }
     return ActiveSim::NONE;
@@ -25,53 +23,54 @@ uint32_t SettingsRecord::from(const ActiveSim sim)
     return static_cast<uint32_t>(sim);
 }
 
-SettingsRecordInterface::SettingsRecordInterface(SettingsDB* db) : settingsDB(db) {
-}
+SettingsRecordInterface::SettingsRecordInterface(SettingsDB *db) : settingsDB(db)
+{}
 
-SettingsRecordInterface::~SettingsRecordInterface() {
+SettingsRecordInterface::~SettingsRecordInterface()
+{}
 
-}
-
-SettingsRecord SettingsRecordInterface::GetByID(uint32_t id) {
+SettingsRecord SettingsRecordInterface::GetByID(uint32_t id)
+{
 
     auto rec = settingsDB->settings.GetByID(1);
 
-    return SettingsRecord{.dbID = rec.ID,
-                          .timeFormat12 = rec.timeFormat12,
-                          .timeAuto = rec.timeAuto,
-                          .timeDateFormat = rec.timeDateFormat,
-                          .brightnessAuto = rec.brightnessAuto,
+    return SettingsRecord{.dbID            = rec.ID,
+                          .timeFormat12    = rec.timeFormat12,
+                          .timeAuto        = rec.timeAuto,
+                          .timeDateFormat  = rec.timeDateFormat,
+                          .brightnessAuto  = rec.brightnessAuto,
                           .brightnessLevel = rec.brightnessLevel,
-                          .fontSize = rec.fontSize,
-                          .pinMode = rec.pinMode,
-                          .pinDays = rec.pinDays,
-                          .pinDaysLeft = rec.pinDaysLeft,
-                          .pin1 = rec.pin1,
-                          .pin2 = rec.pin2,
-                          .activeSIM = SettingsRecord::to(rec.activeSIM),
+                          .fontSize        = rec.fontSize,
+                          .pinMode         = rec.pinMode,
+                          .pinDays         = rec.pinDays,
+                          .pinDaysLeft     = rec.pinDaysLeft,
+                          .pin1            = rec.pin1,
+                          .pin2            = rec.pin2,
+                          .activeSIM       = SettingsRecord::to(rec.activeSIM),
                           .networkOperator = rec.networkOperator,
-                          .lockPassHash = rec.lockPassHash,
-                          .lockTime = rec.lockTime,
-                          .language = rec.language};
+                          .lockPassHash    = rec.lockPassHash,
+                          .lockTime        = rec.lockTime,
+                          .language        = rec.language};
 }
 
-bool SettingsRecordInterface::Update(const SettingsRecord &rec) {
+bool SettingsRecordInterface::Update(const SettingsRecord &rec)
+{
 
-    return settingsDB->settings.Update(SettingsTableRow{.ID = rec.dbID,
-                                                        .timeFormat12 = rec.timeFormat12,
-                                                        .timeAuto = rec.timeAuto,
-                                                        .timeDateFormat = rec.timeDateFormat,
-                                                        .brightnessAuto = rec.brightnessAuto,
+    return settingsDB->settings.Update(SettingsTableRow{.ID              = rec.dbID,
+                                                        .timeFormat12    = rec.timeFormat12,
+                                                        .timeAuto        = rec.timeAuto,
+                                                        .timeDateFormat  = rec.timeDateFormat,
+                                                        .brightnessAuto  = rec.brightnessAuto,
                                                         .brightnessLevel = rec.brightnessLevel,
-                                                        .fontSize = rec.fontSize,
-                                                        .pinMode = rec.pinMode,
-                                                        .pinDays = rec.pinDays,
-                                                        .pinDaysLeft = rec.pinDaysLeft,
-                                                        .pin1 = rec.pin1,
-                                                        .pin2 = rec.pin2,
-                                                        .activeSIM = SettingsRecord::from(rec.activeSIM),
+                                                        .fontSize        = rec.fontSize,
+                                                        .pinMode         = rec.pinMode,
+                                                        .pinDays         = rec.pinDays,
+                                                        .pinDaysLeft     = rec.pinDaysLeft,
+                                                        .pin1            = rec.pin1,
+                                                        .pin2            = rec.pin2,
+                                                        .activeSIM       = SettingsRecord::from(rec.activeSIM),
                                                         .networkOperator = rec.networkOperator,
-                                                        .lockPassHash = rec.lockPassHash,
-                                                        .lockTime = rec.lockTime,
-                                                        .language = rec.language});
+                                                        .lockPassHash    = rec.lockPassHash,
+                                                        .lockTime        = rec.lockTime,
+                                                        .language        = rec.language});
 }
diff --git a/module-db/Interface/SettingsRecord.hpp b/module-db/Interface/SettingsRecord.hpp
index 647f1272a..619f65cab 100644
--- a/module-db/Interface/SettingsRecord.hpp
+++ b/module-db/Interface/SettingsRecord.hpp
@@ -14,7 +14,8 @@
 #include "../Common/Common.hpp"
 #include "../Databases/SettingsDB.hpp"
 
-struct SettingsRecord{
+struct SettingsRecord
+{
     uint32_t dbID;
     bool timeFormat12;
     bool timeAuto;
@@ -33,7 +34,7 @@ struct SettingsRecord{
         SIM1 = 1,
         SIM2 = 2,
     } activeSIM = ActiveSim::NONE;
-    std::string     networkOperator;
+    std::string networkOperator;
     uint32_t lockPassHash;
     uint32_t lockTime;
     SettingsLanguage language;
@@ -42,19 +43,20 @@ struct SettingsRecord{
     static uint32_t from(const ActiveSim sim);
 };
 
-enum class SettingsRecordField{
+enum class SettingsRecordField
+{
     Dummy
 };
 
-class SettingsRecordInterface : public RecordInterface<SettingsRecord,SettingsRecordField> {
-public:
-
-    SettingsRecordInterface(SettingsDB* db);
+class SettingsRecordInterface : public RecordInterface<SettingsRecord, SettingsRecordField>
+{
+  public:
+    SettingsRecordInterface(SettingsDB *db);
     ~SettingsRecordInterface();
 
-    bool Update(const SettingsRecord& rec) override final;
+    bool Update(const SettingsRecord &rec) override final;
     SettingsRecord GetByID(uint32_t id) override final;
 
-private:
-    SettingsDB* settingsDB;
+  private:
+    SettingsDB *settingsDB;
 };
diff --git a/module-db/Interface/ThreadRecord.cpp b/module-db/Interface/ThreadRecord.cpp
index b536349f0..c8398b4a2 100644
--- a/module-db/Interface/ThreadRecord.cpp
+++ b/module-db/Interface/ThreadRecord.cpp
@@ -13,93 +13,96 @@
 #include <cassert>
 #include <log/log.hpp>
 
-ThreadRecordInterface::ThreadRecordInterface(SmsDB* smsDb,ContactsDB* contactsDb): smsDB(smsDb),contactsDB(contactsDb) {
-}
+ThreadRecordInterface::ThreadRecordInterface(SmsDB *smsDb, ContactsDB *contactsDb)
+    : smsDB(smsDb), contactsDB(contactsDb)
+{}
 
-ThreadRecordInterface::~ThreadRecordInterface() {
+ThreadRecordInterface::~ThreadRecordInterface()
+{}
 
-}
-
-bool ThreadRecordInterface::Add(const ThreadRecord &rec) {
-    auto ret = smsDB->threads.Add(ThreadsTableRow{
-            .date = rec.date,
-            .msgCount=rec.msgCount,
-            .msgRead=rec.msgRead,
-            .contactID=rec.contactID,
-            .snippet=rec.snippet,
-            .type=rec.type
+bool ThreadRecordInterface::Add(const ThreadRecord &rec)
+{
+    auto ret = smsDB->threads.Add(ThreadsTableRow{.date      = rec.date,
+                                                  .msgCount  = rec.msgCount,
+                                                  .msgRead   = rec.msgRead,
+                                                  .contactID = rec.contactID,
+                                                  .snippet   = rec.snippet,
+                                                  .type      = rec.type
 
     });
 
     return ret;
 }
 
-bool ThreadRecordInterface::RemoveByID(uint32_t id) {
+bool ThreadRecordInterface::RemoveByID(uint32_t id)
+{
 
     auto ret = smsDB->threads.RemoveByID(id);
     if (ret == false) {
         return false;
     }
 
-    SMSRecordInterface smsRecordInterface(smsDB,contactsDB);
-    return smsRecordInterface.RemoveByField(SMSRecordField::ThreadID,std::to_string(id).c_str());
+    SMSRecordInterface smsRecordInterface(smsDB, contactsDB);
+    return smsRecordInterface.RemoveByField(SMSRecordField::ThreadID, std::to_string(id).c_str());
 }
 
-bool ThreadRecordInterface::Update(const ThreadRecord &rec) {
-    return smsDB->threads.Update(ThreadsTableRow{
-            .ID = rec.dbID,
-            .date = rec.date,
-            .msgCount=rec.msgCount,
-            .msgRead=rec.msgRead,
-            .contactID=rec.contactID,
-            .snippet=rec.snippet,
-            .type=rec.type
+bool ThreadRecordInterface::Update(const ThreadRecord &rec)
+{
+    return smsDB->threads.Update(ThreadsTableRow{.ID        = rec.dbID,
+                                                 .date      = rec.date,
+                                                 .msgCount  = rec.msgCount,
+                                                 .msgRead   = rec.msgRead,
+                                                 .contactID = rec.contactID,
+                                                 .snippet   = rec.snippet,
+                                                 .type      = rec.type
 
     });
-
 }
 
-uint32_t ThreadRecordInterface::GetCount() {
+uint32_t ThreadRecordInterface::GetCount()
+{
 
     return smsDB->threads.GetCount();
 }
 
-std::unique_ptr<std::vector<ThreadRecord>> ThreadRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit) {
+std::unique_ptr<std::vector<ThreadRecord>> ThreadRecordInterface::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
     auto records = std::make_unique<std::vector<ThreadRecord>>();
 
     auto ret = smsDB->threads.GetLimitOffset(offset, limit);
 
-    for (const auto &w: ret) {
+    for (const auto &w : ret) {
         records->push_back(w);
     }
 
     return records;
 }
 
-std::unique_ptr<std::vector<ThreadRecord>> ThreadRecordInterface::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
+std::unique_ptr<std::vector<ThreadRecord>> ThreadRecordInterface::GetLimitOffsetByField(uint32_t offset,
+                                                                                        uint32_t limit,
                                                                                         ThreadRecordField field,
-                                                                                        const char *str) {
+                                                                                        const char *str)
+{
     auto records = std::make_unique<std::vector<ThreadRecord>>();
 
     switch (field) {
-        case ThreadRecordField::ContactID: {
-            auto ret = smsDB->threads.GetLimitOffsetByField(offset, limit,ThreadsTableFields::ContactID,str);
+    case ThreadRecordField::ContactID: {
+        auto ret = smsDB->threads.GetLimitOffsetByField(offset, limit, ThreadsTableFields::ContactID, str);
 
-            for(const auto &w: ret){
-                records->push_back(w);
-            }
+        for (const auto &w : ret) {
+            records->push_back(w);
         }
-            break;
-
+    } break;
     }
 
     return records;
 }
 
-ThreadRecord ThreadRecordInterface::GetByID(uint32_t id) {
+ThreadRecord ThreadRecordInterface::GetByID(uint32_t id)
+{
 
     auto rec = smsDB->threads.GetByID(id);
-    if(rec.ID == 0){
+    if (rec.ID == 0) {
         return ThreadRecord();
     }
 
@@ -108,18 +111,18 @@ ThreadRecord ThreadRecordInterface::GetByID(uint32_t id) {
 
 ThreadRecord ThreadRecordInterface::GetByContact(uint32_t contact_id)
 {
-    auto ret = smsDB->threads.GetLimitOffsetByField(0, 1, ThreadsTableFields::ContactID, std::to_string(contact_id).c_str());
-    if (ret.size() == 0)
-    {
+    auto ret =
+        smsDB->threads.GetLimitOffsetByField(0, 1, ThreadsTableFields::ContactID, std::to_string(contact_id).c_str());
+    if (ret.size() == 0) {
         ThreadRecord re;
         re.contactID = contact_id;
-        if (!Add(re))
-        {
+        if (!Add(re)) {
             LOG_ERROR("There is no thread but we cant add it");
             assert(0);
         }
 
-        ret = smsDB->threads.GetLimitOffsetByField(0, 1, ThreadsTableFields::ContactID, std::to_string(contact_id).c_str());
+        ret = smsDB->threads.GetLimitOffsetByField(
+            0, 1, ThreadsTableFields::ContactID, std::to_string(contact_id).c_str());
     }
     ThreadRecord a = ret[0];
     return a;
diff --git a/module-db/Interface/ThreadRecord.hpp b/module-db/Interface/ThreadRecord.hpp
index 6e79a6970..1194aece1 100644
--- a/module-db/Interface/ThreadRecord.hpp
+++ b/module-db/Interface/ThreadRecord.hpp
@@ -16,52 +16,56 @@
 #include "../Databases/ContactsDB.hpp"
 #include "../Common/Common.hpp"
 
-
-struct ThreadRecord{
-    uint32_t dbID = 0;
-    uint32_t date = 0;
-    uint32_t msgCount = 0;
-    uint32_t msgRead = 0;
-    UTF8 snippet = "";
-    SMSType type = SMSType::ALL;
+struct ThreadRecord
+{
+    uint32_t dbID      = 0;
+    uint32_t date      = 0;
+    uint32_t msgCount  = 0;
+    uint32_t msgRead   = 0;
+    UTF8 snippet       = "";
+    SMSType type       = SMSType::ALL;
     uint32_t contactID = 0;
 
     ThreadRecord() = default;
     ThreadRecord(const ThreadsTableRow &rec)
     {
-        dbID = rec.ID;
-        date = rec.date;
-        msgCount = rec.msgCount;
-        msgRead = rec.msgRead;
-        snippet = rec.snippet;
-        type = rec.type;
+        dbID      = rec.ID;
+        date      = rec.date;
+        msgCount  = rec.msgCount;
+        msgRead   = rec.msgRead;
+        snippet   = rec.snippet;
+        type      = rec.type;
         contactID = rec.contactID;
     }
 };
 
-enum class ThreadRecordField{
+enum class ThreadRecordField
+{
     ContactID,
 };
 
-class ThreadRecordInterface : public RecordInterface<ThreadRecord,ThreadRecordField>{
-public:
-
-    ThreadRecordInterface(SmsDB* smsDb,ContactsDB* contactsDb);
+class ThreadRecordInterface : public RecordInterface<ThreadRecord, ThreadRecordField>
+{
+  public:
+    ThreadRecordInterface(SmsDB *smsDb, ContactsDB *contactsDb);
     ~ThreadRecordInterface();
 
-    bool Add(const ThreadRecord& rec) override final;
+    bool Add(const ThreadRecord &rec) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool Update(const ThreadRecord& rec) override final;
+    bool Update(const ThreadRecord &rec) override final;
     ThreadRecord GetByID(uint32_t id) override final;
     ThreadRecord GetByContact(uint32_t contact_id);
 
     uint32_t GetCount() override final;
 
-    std::unique_ptr<std::vector<ThreadRecord>> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
+    std::unique_ptr<std::vector<ThreadRecord>> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::unique_ptr<std::vector<ThreadRecord>> GetLimitOffsetByField(uint32_t offset,uint32_t limit,ThreadRecordField field, const char* str) override final;
-private:
-   SmsDB* smsDB;
-   ContactsDB* contactsDB;
+    std::unique_ptr<std::vector<ThreadRecord>> GetLimitOffsetByField(uint32_t offset,
+                                                                     uint32_t limit,
+                                                                     ThreadRecordField field,
+                                                                     const char *str) override final;
 
+  private:
+    SmsDB *smsDB;
+    ContactsDB *contactsDB;
 };
diff --git a/module-db/Tables/AlarmsTable.cpp b/module-db/Tables/AlarmsTable.cpp
index fef9d233b..354484ad9 100644
--- a/module-db/Tables/AlarmsTable.cpp
+++ b/module-db/Tables/AlarmsTable.cpp
@@ -7,94 +7,92 @@
 
 #include "AlarmsTable.hpp"
 
+AlarmsTable::AlarmsTable(Database *db) : Table(db)
+{}
 
-AlarmsTable::AlarmsTable(Database *db) : Table(db) {
-}
+AlarmsTable::~AlarmsTable()
+{}
 
-AlarmsTable::~AlarmsTable() {
-
-}
-
-bool AlarmsTable::Create() {
-	bool ret = true;
-	ret = db->Execute(createTableQuery);
+bool AlarmsTable::Create()
+{
+    bool ret = true;
+    ret      = db->Execute(createTableQuery);
 
     if (!ret) {
-           return false;
-       }
+        return false;
+    }
 
     ret = db->Execute(alarmsInitialization);
     return ret;
 }
 
-bool AlarmsTable::Add(AlarmsTableRow entry) {
-    return db->Execute(
-            "INSERT or ignore INTO alarms ( time, snooze, status, path ) VALUES (%lu,%lu,%lu,'%s');",
-            entry.time,
-			entry.snooze,
-			entry.status,
-			entry.path.c_str()
-    );
+bool AlarmsTable::Add(AlarmsTableRow entry)
+{
+    return db->Execute("INSERT or ignore INTO alarms ( time, snooze, status, path ) VALUES (%lu,%lu,%lu,'%s');",
+                       entry.time,
+                       entry.snooze,
+                       entry.status,
+                       entry.path.c_str());
 }
 
-bool AlarmsTable::RemoveByID(uint32_t id) {
+bool AlarmsTable::RemoveByID(uint32_t id)
+{
     return db->Execute("DELETE FROM alarms where _id = %u;", id);
 }
 
-bool AlarmsTable::RemoveByField(AlarmsTableFields field, const char *str) {
+bool AlarmsTable::RemoveByField(AlarmsTableFields field, const char *str)
+{
     std::string fieldName;
 
-    switch(field){
-        case AlarmsTableFields ::Time:
-            fieldName = "time";
-            break;
+    switch (field) {
+    case AlarmsTableFields ::Time:
+        fieldName = "time";
+        break;
 
-        case AlarmsTableFields ::Snooze:
-            fieldName = "snooze";
-            break;
+    case AlarmsTableFields ::Snooze:
+        fieldName = "snooze";
+        break;
 
-        case AlarmsTableFields ::Status:
-            fieldName = "status";
-            break;
-        default:
-            return false;
+    case AlarmsTableFields ::Status:
+        fieldName = "status";
+        break;
+    default:
+        return false;
     }
 
-    return db->Execute("DELETE FROM alarms where %s = '%s';", fieldName.c_str(),str);
-
+    return db->Execute("DELETE FROM alarms where %s = '%s';", fieldName.c_str(), str);
 }
 
-
-bool AlarmsTable::Update(AlarmsTableRow entry) {
-    return db->Execute(
-            "UPDATE alarms SET time = %lu, snooze = %lu ,status = %lu, path = '%s' WHERE _id=%lu;",
-            entry.time,
-			entry.snooze,
-			entry.status,
-			entry.path.c_str(),
-            entry.ID
-    );
+bool AlarmsTable::Update(AlarmsTableRow entry)
+{
+    return db->Execute("UPDATE alarms SET time = %lu, snooze = %lu ,status = %lu, path = '%s' WHERE _id=%lu;",
+                       entry.time,
+                       entry.snooze,
+                       entry.status,
+                       entry.path.c_str(),
+                       entry.ID);
 }
 
-AlarmsTableRow AlarmsTable::GetByID(uint32_t id) {
+AlarmsTableRow AlarmsTable::GetByID(uint32_t id)
+{
     auto retQuery = db->Query("SELECT * FROM alarms WHERE _id= %u;", id);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return AlarmsTableRow();
     }
 
-    return AlarmsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                       (*retQuery)[1].GetUInt32(),    // time
-                       (*retQuery)[2].GetUInt32(),    // snooze
-                       (*retQuery)[3].GetUInt32(),    // status
-                       (*retQuery)[4].GetString(),    // path
+    return AlarmsTableRow{
+        (*retQuery)[0].GetUInt32(), // ID
+        (*retQuery)[1].GetUInt32(), // time
+        (*retQuery)[2].GetUInt32(), // snooze
+        (*retQuery)[3].GetUInt32(), // status
+        (*retQuery)[4].GetString(), // path
     };
 }
 
-std::vector<AlarmsTableRow> AlarmsTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto retQuery = db->Query("SELECT * from alarms ORDER BY time ASC LIMIT %lu OFFSET %lu;",
-                              limit,
-                              offset);
+std::vector<AlarmsTableRow> AlarmsTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto retQuery = db->Query("SELECT * from alarms ORDER BY time ASC LIMIT %lu OFFSET %lu;", limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<AlarmsTableRow>();
@@ -103,33 +101,37 @@ std::vector<AlarmsTableRow> AlarmsTable::GetLimitOffset(uint32_t offset, uint32_
     std::vector<AlarmsTableRow> ret;
 
     do {
-        ret.push_back(AlarmsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-            							(*retQuery)[1].GetUInt32(),    // time
-										(*retQuery)[2].GetUInt32(),    // snooze
-										(*retQuery)[3].GetUInt32(),    // status
-										(*retQuery)[4].GetString(),    // path
+        ret.push_back(AlarmsTableRow{
+            (*retQuery)[0].GetUInt32(), // ID
+            (*retQuery)[1].GetUInt32(), // time
+            (*retQuery)[2].GetUInt32(), // snooze
+            (*retQuery)[3].GetUInt32(), // status
+            (*retQuery)[4].GetString(), // path
         });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-std::vector<AlarmsTableRow>
-AlarmsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, AlarmsTableFields field, const char *str) {
+std::vector<AlarmsTableRow> AlarmsTable::GetLimitOffsetByField(uint32_t offset,
+                                                               uint32_t limit,
+                                                               AlarmsTableFields field,
+                                                               const char *str)
+{
 
     std::string fieldName;
     switch (field) {
-        case AlarmsTableFields::Time:
-            fieldName = "time";
-            break;
-        case AlarmsTableFields ::Snooze:
-            fieldName = "snooze";
-            break;
-        case AlarmsTableFields ::Status:
-            fieldName = "status";
-            break;
-        default:
-            return std::vector<AlarmsTableRow>();
+    case AlarmsTableFields::Time:
+        fieldName = "time";
+        break;
+    case AlarmsTableFields ::Snooze:
+        fieldName = "snooze";
+        break;
+    case AlarmsTableFields ::Status:
+        fieldName = "status";
+        break;
+    default:
+        return std::vector<AlarmsTableRow>();
     }
 
     auto retQuery = db->Query("SELECT * from alarms WHERE %s='%s' ORDER BY time LIMIT %lu OFFSET %lu;",
@@ -145,18 +147,20 @@ AlarmsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, AlarmsTableF
     std::vector<AlarmsTableRow> ret;
 
     do {
-    	 ret.push_back(AlarmsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-										(*retQuery)[1].GetUInt32(),    // time
-										(*retQuery)[2].GetUInt32(),    // snooze
-										(*retQuery)[3].GetUInt32(),    // status
-										(*retQuery)[4].GetString(),    // path
-    	        });
+        ret.push_back(AlarmsTableRow{
+            (*retQuery)[0].GetUInt32(), // ID
+            (*retQuery)[1].GetUInt32(), // time
+            (*retQuery)[2].GetUInt32(), // snooze
+            (*retQuery)[3].GetUInt32(), // status
+            (*retQuery)[4].GetString(), // path
+        });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-uint32_t AlarmsTable::GetCount() {
+uint32_t AlarmsTable::GetCount()
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM alarms;");
 
     if (queryRet->GetRowCount() == 0) {
@@ -166,7 +170,8 @@ uint32_t AlarmsTable::GetCount() {
     return uint32_t{(*queryRet)[0].GetUInt32()};
 }
 
-uint32_t AlarmsTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t AlarmsTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM alarms WHERE %s=%lu;", field, id);
 
     if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
@@ -178,18 +183,17 @@ uint32_t AlarmsTable::GetCountByFieldID(const char *field, uint32_t id) {
 
 AlarmsTableRow AlarmsTable::GetNext(time_t time)
 {
-	auto retQuery = db->Query("SELECT * from alarms WHERE status=1 AND time>=%u ORDER BY time ASC LIMIT 1;", time );
+    auto retQuery = db->Query("SELECT * from alarms WHERE status=1 AND time>=%u ORDER BY time ASC LIMIT 1;", time);
 
-	if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
-		return AlarmsTableRow();
-	}
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
+        return AlarmsTableRow();
+    }
 
-	return AlarmsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-					   (*retQuery)[1].GetUInt32(),    // time
-					   (*retQuery)[2].GetUInt32(),    // snooze
-					   (*retQuery)[3].GetUInt32(),    // status
-					   (*retQuery)[4].GetString(),    // path
-	};
+    return AlarmsTableRow{
+        (*retQuery)[0].GetUInt32(), // ID
+        (*retQuery)[1].GetUInt32(), // time
+        (*retQuery)[2].GetUInt32(), // snooze
+        (*retQuery)[3].GetUInt32(), // status
+        (*retQuery)[4].GetString(), // path
+    };
 }
-
-
diff --git a/module-db/Tables/AlarmsTable.hpp b/module-db/Tables/AlarmsTable.hpp
index 3a1319bb4..4147e3ab1 100644
--- a/module-db/Tables/AlarmsTable.hpp
+++ b/module-db/Tables/AlarmsTable.hpp
@@ -11,52 +11,54 @@
 #include "utf8/UTF8.hpp"
 #include "Common/Common.hpp"
 
-
-struct AlarmsTableRow{
+struct AlarmsTableRow
+{
     uint32_t ID;
     uint32_t time;
     uint32_t snooze;
     uint32_t status;
-    UTF8    path;
+    UTF8 path;
 };
 
-enum class AlarmsTableFields{
+enum class AlarmsTableFields
+{
     Time,
     Snooze,
     Status,
-	Path
+    Path
 };
 
-class AlarmsTable : public Table<AlarmsTableRow,AlarmsTableFields> {
-public:
-
-	AlarmsTable(Database* db);
+class AlarmsTable : public Table<AlarmsTableRow, AlarmsTableFields>
+{
+  public:
+    AlarmsTable(Database *db);
     virtual ~AlarmsTable();
 
     bool Create() override final;
     bool Add(AlarmsTableRow entry) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool RemoveByField(AlarmsTableFields field, const char* str) override final;
+    bool RemoveByField(AlarmsTableFields field, const char *str) override final;
     bool Update(AlarmsTableRow entry) override final;
     AlarmsTableRow GetByID(uint32_t id) override final;
-    std::vector<AlarmsTableRow> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
-    std::vector<AlarmsTableRow> GetLimitOffsetByField(uint32_t offset,uint32_t limit,AlarmsTableFields field,const char* str) override final;
+    std::vector<AlarmsTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
+    std::vector<AlarmsTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                      uint32_t limit,
+                                                      AlarmsTableFields field,
+                                                      const char *str) override final;
 
     uint32_t GetCount() override final;
-    uint32_t GetCountByFieldID(const char* field,uint32_t id) override final;
+    uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
     AlarmsTableRow GetNext(time_t time);
 
-private:
-
-    const char* createTableQuery =
-            "CREATE TABLE IF NOT EXISTS alarms("
-            "_id INTEGER PRIMARY KEY,"
-            "time INTEGER,"
-            "snooze INTEGER,"
-            "status INTEGER,"
-            "path TEXT DEFAULT '');";
-   // "INSERT or ignore INTO alarms (_id, time, snooze, status, path ) VALUES (1,0,0,0,'');"
-    const char* alarmsInitialization = "INSERT or ignore INTO alarms (_id, time, snooze, status, path ) VALUES (1,0,0,0,'');";
+  private:
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS alarms("
+                                   "_id INTEGER PRIMARY KEY,"
+                                   "time INTEGER,"
+                                   "snooze INTEGER,"
+                                   "status INTEGER,"
+                                   "path TEXT DEFAULT '');";
+    // "INSERT or ignore INTO alarms (_id, time, snooze, status, path ) VALUES (1,0,0,0,'');"
+    const char *alarmsInitialization =
+        "INSERT or ignore INTO alarms (_id, time, snooze, status, path ) VALUES (1,0,0,0,'');";
 };
-
diff --git a/module-db/Tables/CalllogTable.cpp b/module-db/Tables/CalllogTable.cpp
index fab4254c4..c2ccb5ab6 100644
--- a/module-db/Tables/CalllogTable.cpp
+++ b/module-db/Tables/CalllogTable.cpp
@@ -10,44 +10,60 @@
 #include "log/log.hpp"
 #include <Utils.hpp>
 
-CalllogTable::CalllogTable(Database *db) : Table(db) {
-}
+CalllogTable::CalllogTable(Database *db) : Table(db)
+{}
 
-CalllogTable::~CalllogTable() {
+CalllogTable::~CalllogTable()
+{}
 
-}
-
-bool CalllogTable::Create() {
+bool CalllogTable::Create()
+{
     return db->Execute(createTableQuery);
 }
 
 bool CalllogTable::Add(CalllogTableRow entry)
 {
 
-    return db->Execute(
-        "INSERT or ignore INTO calls (number, presentation, date, duration, type, name, contactId, isRead) VALUES ('%s', %lu, %s, %s, %lu, '%s', '%s', %d);",
-        entry.number.c_str(), static_cast<uint32_t>(entry.presentation), utils::to_string(entry.date).c_str(), utils::to_string(entry.duration).c_str(),
-        static_cast<uint32_t>(entry.type), entry.name.c_str(), entry.contactId.c_str(), entry.isRead);
+    return db->Execute("INSERT or ignore INTO calls (number, presentation, date, duration, type, name, contactId, "
+                       "isRead) VALUES ('%s', %lu, %s, %s, %lu, '%s', '%s', %d);",
+                       entry.number.c_str(),
+                       static_cast<uint32_t>(entry.presentation),
+                       utils::to_string(entry.date).c_str(),
+                       utils::to_string(entry.duration).c_str(),
+                       static_cast<uint32_t>(entry.type),
+                       entry.name.c_str(),
+                       entry.contactId.c_str(),
+                       entry.isRead);
 }
 
-bool CalllogTable::RemoveByID(uint32_t id) {
+bool CalllogTable::RemoveByID(uint32_t id)
+{
     return db->Execute("DELETE FROM calls where _id = %lu;", id);
 }
 
-bool CalllogTable::RemoveByField(CalllogTableFields field, const char *str) {
+bool CalllogTable::RemoveByField(CalllogTableFields field, const char *str)
+{
     return false; // not implemented // TODO: alek: check this
 }
 
 bool CalllogTable::Update(CalllogTableRow entry)
 {
-    return db->Execute("UPDATE calls SET number = '%s', presentation = %lu, date = %lu, duration = %lu, type = %lu, name = '%s', contactId = '%s', isRead = "
+    return db->Execute("UPDATE calls SET number = '%s', presentation = %lu, date = %lu, duration = %lu, type = %lu, "
+                       "name = '%s', contactId = '%s', isRead = "
                        "%d WHERE _id = %lu;",
-                       entry.number.c_str(), static_cast<uint32_t>(entry.presentation), static_cast<uint32_t>(entry.date),
-                       static_cast<uint32_t>(entry.duration), static_cast<uint32_t>(entry.type), entry.name.c_str(), entry.contactId.c_str(), entry.isRead,
+                       entry.number.c_str(),
+                       static_cast<uint32_t>(entry.presentation),
+                       static_cast<uint32_t>(entry.date),
+                       static_cast<uint32_t>(entry.duration),
+                       static_cast<uint32_t>(entry.type),
+                       entry.name.c_str(),
+                       entry.contactId.c_str(),
+                       entry.isRead,
                        entry.id);
 }
 
-CalllogTableRow CalllogTable::GetByID(uint32_t id) {
+CalllogTableRow CalllogTable::GetByID(uint32_t id)
+{
     auto retQuery = db->Query("SELECT * FROM calls WHERE _id= %u;", id);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
@@ -67,10 +83,9 @@ CalllogTableRow CalllogTable::GetByID(uint32_t id) {
     };
 }
 
-std::vector<CalllogTableRow> CalllogTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto retQuery = db->Query("SELECT * from calls ORDER BY date DESC LIMIT %lu OFFSET %lu;",
-                              limit,
-                              offset);
+std::vector<CalllogTableRow> CalllogTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto retQuery = db->Query("SELECT * from calls ORDER BY date DESC LIMIT %lu OFFSET %lu;", limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<CalllogTableRow>();
@@ -95,26 +110,26 @@ std::vector<CalllogTableRow> CalllogTable::GetLimitOffset(uint32_t offset, uint3
     return ret;
 }
 
-std::vector<CalllogTableRow>
-CalllogTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, CalllogTableFields field, const char *str) {
+std::vector<CalllogTableRow> CalllogTable::GetLimitOffsetByField(uint32_t offset,
+                                                                 uint32_t limit,
+                                                                 CalllogTableFields field,
+                                                                 const char *str)
+{
 
     std::string fieldName; // TODO: alek: add more fields?
     switch (field) {
-        case CalllogTableFields::DATE:
-            fieldName = "date";
-            break;
-        case CalllogTableFields::TYPE:
-            fieldName = "type";
-            break;
-        default:
-            return std::vector<CalllogTableRow>();
+    case CalllogTableFields::DATE:
+        fieldName = "date";
+        break;
+    case CalllogTableFields::TYPE:
+        fieldName = "type";
+        break;
+    default:
+        return std::vector<CalllogTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from calls WHERE %s='%s' ORDER BY date LIMIT %lu OFFSET %lu;",
-                              fieldName.c_str(),
-                              str,
-                              limit,
-                              offset);
+    auto retQuery = db->Query(
+        "SELECT * from calls WHERE %s='%s' ORDER BY date LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<CalllogTableRow>();
@@ -142,8 +157,7 @@ CalllogTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, CalllogTabl
 uint32_t CalllogTable::GetCount(EntryState state)
 {
     std::string query = "SELECT COUNT(*) FROM calls ";
-    switch (state)
-    {
+    switch (state) {
     case EntryState::ALL:
         break;
     case EntryState::UNREAD:
@@ -157,8 +171,7 @@ uint32_t CalllogTable::GetCount(EntryState state)
     LOG_DEBUG("> %s", query.c_str());
     auto queryRet = db->Query(query.c_str());
 
-    if (queryRet == nullptr || queryRet->GetRowCount() == 0)
-    {
+    if (queryRet == nullptr || queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -170,7 +183,8 @@ uint32_t CalllogTable::GetCount()
     return GetCount(EntryState::ALL);
 }
 
-uint32_t CalllogTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t CalllogTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM calls WHERE %s=%lu;", field, id);
 
     if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
@@ -179,4 +193,3 @@ uint32_t CalllogTable::GetCountByFieldID(const char *field, uint32_t id) {
 
     return uint32_t{(*queryRet)[0].GetUInt32()};
 }
-
diff --git a/module-db/Tables/CalllogTable.hpp b/module-db/Tables/CalllogTable.hpp
index f2b439ea4..2f6d24e13 100644
--- a/module-db/Tables/CalllogTable.hpp
+++ b/module-db/Tables/CalllogTable.hpp
@@ -15,69 +15,72 @@
 
 enum class CallType
 {
-    CT_NONE = 0x00,
-    CT_INCOMING = 0x01,
-    CT_OUTGOING = 0x02,
-    CT_MISSED = 0x03,
+    CT_NONE      = 0x00,
+    CT_INCOMING  = 0x01,
+    CT_OUTGOING  = 0x02,
+    CT_MISSED    = 0x03,
     CT_VOICEMAIL = 0x04,
-    CT_REJECTED = 0x05,
-    CT_BLOCKED = 0x06,
-    CT_ANSW_EXT = 0x07,
+    CT_REJECTED  = 0x05,
+    CT_BLOCKED   = 0x06,
+    CT_ANSW_EXT  = 0x07,
 };
 
 enum class PresentationType
 {
-    PR_UNKNOWN = 0x00,
-    PR_ALLOWED = 0x01,
-    PR_PAYPHONE = 0x02,
+    PR_UNKNOWN    = 0x00,
+    PR_ALLOWED    = 0x01,
+    PR_PAYPHONE   = 0x02,
     PR_RESTRICTED = 0x03,
 };
 
-struct CalllogTableRow{
-    uint32_t    id;
-    UTF8        number;
-	PresentationType presentation;
-    time_t      date;
+struct CalllogTableRow
+{
+    uint32_t id;
+    UTF8 number;
+    PresentationType presentation;
+    time_t date;
     time_t duration;
-    CallType    type;
-    UTF8        name;
-	UTF8        contactId;
+    CallType type;
+    UTF8 name;
+    UTF8 contactId;
     bool isRead = false;
 };
 
- enum class CalllogTableFields{
+enum class CalllogTableFields
+{
     DATE,
-	TYPE,
- };
+    TYPE,
+};
 
 /*
  *
  */
-class CalllogTable : public Table<CalllogTableRow,CalllogTableFields> {
-public:
-	CalllogTable(Database* db);
-	virtual ~CalllogTable();
+class CalllogTable : public Table<CalllogTableRow, CalllogTableFields>
+{
+  public:
+    CalllogTable(Database *db);
+    virtual ~CalllogTable();
 
-	bool Create() override final;
-	bool Add(CalllogTableRow entry) override final;
-	bool RemoveByID(uint32_t id) override final;
-	bool RemoveByField(CalllogTableFields field, const char* str) override final;
-	bool Update(CalllogTableRow entry) override final;
-	CalllogTableRow GetByID(uint32_t id) override final;
-	std::vector<CalllogTableRow> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
-	std::vector<CalllogTableRow> GetLimitOffsetByField(uint32_t offset,uint32_t limit,CalllogTableFields field,const char* str) override final;
+    bool Create() override final;
+    bool Add(CalllogTableRow entry) override final;
+    bool RemoveByID(uint32_t id) override final;
+    bool RemoveByField(CalllogTableFields field, const char *str) override final;
+    bool Update(CalllogTableRow entry) override final;
+    CalllogTableRow GetByID(uint32_t id) override final;
+    std::vector<CalllogTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
+    std::vector<CalllogTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                       uint32_t limit,
+                                                       CalllogTableFields field,
+                                                       const char *str) override final;
 
-	uint32_t GetCount() override final;
+    uint32_t GetCount() override final;
     uint32_t GetCount(EntryState state);
-    uint32_t GetCountByFieldID(const char* field,uint32_t id) override final;
+    uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
-private:
-
-    const char* createTableQuery =
-            "CREATE TABLE IF NOT EXISTS calls("
-            "_id INTEGER PRIMARY KEY,"
-            "date INTEGER,"
-            "snippet TEXT DEFAULT '',"
-    		"path TEXT DEFAULT '')";
+  private:
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS calls("
+                                   "_id INTEGER PRIMARY KEY,"
+                                   "date INTEGER,"
+                                   "snippet TEXT DEFAULT '',"
+                                   "path TEXT DEFAULT '')";
 };
-
diff --git a/module-db/Tables/ContactsAddressTable.cpp b/module-db/Tables/ContactsAddressTable.cpp
index 578346d3a..ea501471b 100644
--- a/module-db/Tables/ContactsAddressTable.cpp
+++ b/module-db/Tables/ContactsAddressTable.cpp
@@ -11,12 +11,10 @@
 #include "ContactsAddressTable.hpp"
 
 ContactsAddressTable::ContactsAddressTable(Database *db) : Table(db)
-{
-}
+{}
 
 ContactsAddressTable::~ContactsAddressTable()
-{
-}
+{}
 
 bool ContactsAddressTable::Create()
 {
@@ -25,9 +23,16 @@ bool ContactsAddressTable::Create()
 
 bool ContactsAddressTable::Add(ContactsAddressTableRow entry)
 {
-    return db->Execute("insert or ignore into contact_address (contact_id, country, city, street, number, type, note, mail) VALUES (%lu, '%s', '%s', '%s', "
+    return db->Execute("insert or ignore into contact_address (contact_id, country, city, street, number, type, note, "
+                       "mail) VALUES (%lu, '%s', '%s', '%s', "
                        "'%s', %lu, '%s', '%s');",
-                       entry.contactID, entry.country.c_str(), entry.city.c_str(), entry.street.c_str(), entry.number.c_str(), entry.type, entry.note.c_str(),
+                       entry.contactID,
+                       entry.country.c_str(),
+                       entry.city.c_str(),
+                       entry.street.c_str(),
+                       entry.number.c_str(),
+                       entry.type,
+                       entry.note.c_str(),
                        entry.mail.c_str());
 }
 
@@ -38,18 +43,25 @@ bool ContactsAddressTable::RemoveByID(uint32_t id)
 
 bool ContactsAddressTable::Update(ContactsAddressTableRow entry)
 {
-    return db->Execute("UPDATE contact_address SET contact_id = %lu, country = '%s' ,city = '%s',street = '%s',number = '%s', type =%lu, note = '%s',mail = "
+    return db->Execute("UPDATE contact_address SET contact_id = %lu, country = '%s' ,city = '%s',street = '%s',number "
+                       "= '%s', type =%lu, note = '%s',mail = "
                        "'%s' WHERE _id=%lu;",
-                       entry.contactID, entry.country.c_str(), entry.city.c_str(), entry.street.c_str(), entry.number.c_str(), entry.type, entry.note.c_str(),
-                       entry.mail.c_str(), entry.ID);
+                       entry.contactID,
+                       entry.country.c_str(),
+                       entry.city.c_str(),
+                       entry.street.c_str(),
+                       entry.number.c_str(),
+                       entry.type,
+                       entry.note.c_str(),
+                       entry.mail.c_str(),
+                       entry.ID);
 }
 
 ContactsAddressTableRow ContactsAddressTable::GetByID(uint32_t id)
 {
     auto retQuery = db->Query("SELECT * FROM contact_address WHERE _id= %lu;", id);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ContactsAddressTableRow();
     }
 
@@ -70,15 +82,13 @@ std::vector<ContactsAddressTableRow> ContactsAddressTable::GetLimitOffset(uint32
 {
     auto retQuery = db->Query("SELECT * from contact_address ORDER BY contact_id LIMIT %lu OFFSET %lu;", limit, offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsAddressTableRow>();
     }
 
     std::vector<ContactsAddressTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsAddressTableRow{
             (*retQuery)[0].GetUInt32(),                                  // ID
             (*retQuery)[1].GetUInt32(),                                  // contactID
@@ -95,13 +105,14 @@ std::vector<ContactsAddressTableRow> ContactsAddressTable::GetLimitOffset(uint32
     return ret;
 }
 
-std::vector<ContactsAddressTableRow> ContactsAddressTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactAddressTableFields field,
+std::vector<ContactsAddressTableRow> ContactsAddressTable::GetLimitOffsetByField(uint32_t offset,
+                                                                                 uint32_t limit,
+                                                                                 ContactAddressTableFields field,
                                                                                  const char *str)
 {
 
     std::string fieldName;
-    switch (field)
-    {
+    switch (field) {
     case ContactAddressTableFields ::City:
         fieldName = "city";
         break;
@@ -121,17 +132,19 @@ std::vector<ContactsAddressTableRow> ContactsAddressTable::GetLimitOffsetByField
         return std::vector<ContactsAddressTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from contact_address WHERE %s='%s' ORDER BY contact_id LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+    auto retQuery = db->Query("SELECT * from contact_address WHERE %s='%s' ORDER BY contact_id LIMIT %lu OFFSET %lu;",
+                              fieldName.c_str(),
+                              str,
+                              limit,
+                              offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsAddressTableRow>();
     }
 
     std::vector<ContactsAddressTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsAddressTableRow{
             (*retQuery)[0].GetUInt32(),                                  // ID
             (*retQuery)[1].GetUInt32(),                                  // contactID
@@ -152,8 +165,7 @@ uint32_t ContactsAddressTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_address;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -164,8 +176,7 @@ uint32_t ContactsAddressTable::GetCountByFieldID(const char *field, uint32_t id)
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_address WHERE %s=%lu;", field, id);
 
-    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0))
-    {
+    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
         return 0;
     }
 
diff --git a/module-db/Tables/ContactsAddressTable.hpp b/module-db/Tables/ContactsAddressTable.hpp
index 587ad87df..9f6d358c7 100644
--- a/module-db/Tables/ContactsAddressTable.hpp
+++ b/module-db/Tables/ContactsAddressTable.hpp
@@ -57,7 +57,9 @@ class ContactsAddressTable : public Table<ContactsAddressTableRow, ContactAddres
 
     std::vector<ContactsAddressTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::vector<ContactsAddressTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactAddressTableFields field,
+    std::vector<ContactsAddressTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                               uint32_t limit,
+                                                               ContactAddressTableFields field,
                                                                const char *str) override final;
 
     uint32_t GetCount() override final;
diff --git a/module-db/Tables/ContactsNameTable.cpp b/module-db/Tables/ContactsNameTable.cpp
index afae22747..201f7f7e9 100644
--- a/module-db/Tables/ContactsNameTable.cpp
+++ b/module-db/Tables/ContactsNameTable.cpp
@@ -11,12 +11,10 @@
 #include "ContactsNameTable.hpp"
 
 ContactsNameTable::ContactsNameTable(Database *db) : Table(db)
-{
-}
+{}
 
 ContactsNameTable::~ContactsNameTable()
-{
-}
+{}
 
 bool ContactsNameTable::Create()
 {
@@ -25,8 +23,12 @@ bool ContactsNameTable::Create()
 
 bool ContactsNameTable::Add(ContactsNameTableRow entry)
 {
-    return db->Execute("insert or ignore into contact_name (contact_id, name_primary, name_alternative, favourite) VALUES (%lu, '%s', '%s', '%lu');",
-                       entry.contactID, entry.namePrimary.c_str(), entry.nameAlternative.c_str(), entry.favourite);
+    return db->Execute("insert or ignore into contact_name (contact_id, name_primary, name_alternative, favourite) "
+                       "VALUES (%lu, '%s', '%s', '%lu');",
+                       entry.contactID,
+                       entry.namePrimary.c_str(),
+                       entry.nameAlternative.c_str(),
+                       entry.favourite);
 }
 
 bool ContactsNameTable::RemoveByID(uint32_t id)
@@ -36,16 +38,20 @@ bool ContactsNameTable::RemoveByID(uint32_t id)
 
 bool ContactsNameTable::Update(ContactsNameTableRow entry)
 {
-    return db->Execute("UPDATE contact_name SET contact_id = %lu, name_primary = '%s' ,name_alternative = '%s' favourite = '%d' WHERE _id=%lu;",
-                       entry.contactID, entry.namePrimary.c_str(), entry.nameAlternative.c_str(), entry.favourite, entry.ID);
+    return db->Execute("UPDATE contact_name SET contact_id = %lu, name_primary = '%s' ,name_alternative = '%s' "
+                       "favourite = '%d' WHERE _id=%lu;",
+                       entry.contactID,
+                       entry.namePrimary.c_str(),
+                       entry.nameAlternative.c_str(),
+                       entry.favourite,
+                       entry.ID);
 }
 
 ContactsNameTableRow ContactsNameTable::GetByID(uint32_t id)
 {
     auto retQuery = db->Query("SELECT * FROM contact_name WHERE _id= %lu;", id);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ContactsNameTableRow();
     }
 
@@ -60,17 +66,16 @@ ContactsNameTableRow ContactsNameTable::GetByID(uint32_t id)
 
 std::vector<ContactsNameTableRow> ContactsNameTable::GetLimitOffset(uint32_t offset, uint32_t limit)
 {
-    auto retQuery = db->Query("SELECT * from contact_name ORDER BY name_alternative LIMIT %lu OFFSET %lu;", limit, offset);
+    auto retQuery =
+        db->Query("SELECT * from contact_name ORDER BY name_alternative LIMIT %lu OFFSET %lu;", limit, offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsNameTableRow>();
     }
 
     std::vector<ContactsNameTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsNameTableRow{
             (*retQuery)[0].GetUInt32(), // ID
             (*retQuery)[1].GetUInt32(), // contactID
@@ -83,13 +88,15 @@ std::vector<ContactsNameTableRow> ContactsNameTable::GetLimitOffset(uint32_t off
     return ret;
 }
 
-std::vector<ContactsNameTableRow> ContactsNameTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactNameTableFields field, const char *str)
+std::vector<ContactsNameTableRow> ContactsNameTable::GetLimitOffsetByField(uint32_t offset,
+                                                                           uint32_t limit,
+                                                                           ContactNameTableFields field,
+                                                                           const char *str)
 {
 
     std::string fieldName;
 
-    switch (field)
-    {
+    switch (field) {
     case ContactNameTableFields ::NamePrimary:
         fieldName = "name_primary";
         break;
@@ -104,17 +111,19 @@ std::vector<ContactsNameTableRow> ContactsNameTable::GetLimitOffsetByField(uint3
     }
 
     auto retQuery =
-        db->Query("SELECT * from contact_name WHERE %s='%s' ORDER BY name_alternative LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+        db->Query("SELECT * from contact_name WHERE %s='%s' ORDER BY name_alternative LIMIT %lu OFFSET %lu;",
+                  fieldName.c_str(),
+                  str,
+                  limit,
+                  offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsNameTableRow>();
     }
 
     std::vector<ContactsNameTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsNameTableRow{
             (*retQuery)[0].GetUInt32(), // ID
             (*retQuery)[1].GetUInt32(), // contactID
@@ -131,8 +140,7 @@ uint32_t ContactsNameTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_name;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -143,8 +151,7 @@ uint32_t ContactsNameTable::GetCountByFieldID(const char *field, uint32_t id)
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_name WHERE %s=%lu;", field, id);
 
-    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0))
-    {
+    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
         return 0;
     }
 
@@ -154,18 +161,18 @@ uint32_t ContactsNameTable::GetCountByFieldID(const char *field, uint32_t id)
 std::vector<ContactsNameTableRow> ContactsNameTable::GetByName(const char *primaryName, const char *alternativeName)
 {
 
-    auto retQuery = db->Query("SELECT * from contact_name WHERE name_primary='%s' AND name_alternative='%s' ORDER BY name_alternative LIMIT 1;", primaryName,
+    auto retQuery = db->Query("SELECT * from contact_name WHERE name_primary='%s' AND name_alternative='%s' ORDER BY "
+                              "name_alternative LIMIT 1;",
+                              primaryName,
                               alternativeName);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsNameTableRow>();
     }
 
     std::vector<ContactsNameTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsNameTableRow{
             (*retQuery)[0].GetUInt32(), // ID
             (*retQuery)[1].GetUInt32(), // contactID
diff --git a/module-db/Tables/ContactsNameTable.hpp b/module-db/Tables/ContactsNameTable.hpp
index 21a7df284..6f159f928 100644
--- a/module-db/Tables/ContactsNameTable.hpp
+++ b/module-db/Tables/ContactsNameTable.hpp
@@ -51,7 +51,10 @@ class ContactsNameTable : public Table<ContactsNameTableRow, ContactNameTableFie
 
     std::vector<ContactsNameTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::vector<ContactsNameTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactNameTableFields field, const char *str) override final;
+    std::vector<ContactsNameTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                            uint32_t limit,
+                                                            ContactNameTableFields field,
+                                                            const char *str) override final;
 
     uint32_t GetCount() override final;
 
diff --git a/module-db/Tables/ContactsNumberTable.cpp b/module-db/Tables/ContactsNumberTable.cpp
index 12f3dbf50..e73ae88dd 100644
--- a/module-db/Tables/ContactsNumberTable.cpp
+++ b/module-db/Tables/ContactsNumberTable.cpp
@@ -11,12 +11,10 @@
 #include "ContactsNumberTable.hpp"
 
 ContactsNumberTable::ContactsNumberTable(Database *db) : Table(db)
-{
-}
+{}
 
 ContactsNumberTable::~ContactsNumberTable()
-{
-}
+{}
 
 bool ContactsNumberTable::Create()
 {
@@ -25,8 +23,12 @@ bool ContactsNumberTable::Create()
 
 bool ContactsNumberTable::Add(ContactsNumberTableRow entry)
 {
-    return db->Execute("insert or ignore into contact_number (contact_id, number_user, number_e164, type) VALUES (%lu, '%s', '%s', %lu);", entry.contactID,
-                       entry.numberUser.c_str(), entry.numbere164.c_str(), entry.type);
+    return db->Execute("insert or ignore into contact_number (contact_id, number_user, number_e164, type) VALUES (%lu, "
+                       "'%s', '%s', %lu);",
+                       entry.contactID,
+                       entry.numberUser.c_str(),
+                       entry.numbere164.c_str(),
+                       entry.type);
 }
 
 bool ContactsNumberTable::RemoveByID(uint32_t id)
@@ -36,16 +38,20 @@ bool ContactsNumberTable::RemoveByID(uint32_t id)
 
 bool ContactsNumberTable::Update(ContactsNumberTableRow entry)
 {
-    return db->Execute("UPDATE contact_number SET contact_id = %lu, number_user = '%s' ,number_e164 = '%s', type = %lu WHERE _id=%lu;", entry.contactID,
-                       entry.numberUser.c_str(), entry.numbere164.c_str(), entry.type, entry.ID);
+    return db->Execute(
+        "UPDATE contact_number SET contact_id = %lu, number_user = '%s' ,number_e164 = '%s', type = %lu WHERE _id=%lu;",
+        entry.contactID,
+        entry.numberUser.c_str(),
+        entry.numbere164.c_str(),
+        entry.type,
+        entry.ID);
 }
 
 ContactsNumberTableRow ContactsNumberTable::GetByID(uint32_t id)
 {
     auto retQuery = db->Query("SELECT * FROM contact_number WHERE _id= %lu;", id);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ContactsNumberTableRow();
     }
 
@@ -62,15 +68,13 @@ std::vector<ContactsNumberTableRow> ContactsNumberTable::GetLimitOffset(uint32_t
 {
     auto retQuery = db->Query("SELECT * from contact_number ORDER BY number_user LIMIT %lu OFFSET %lu;", limit, offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsNumberTableRow>();
     }
 
     std::vector<ContactsNumberTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsNumberTableRow{
             (*retQuery)[0].GetUInt32(),                                 // ID
             (*retQuery)[1].GetUInt32(),                                 // contactID
@@ -83,11 +87,13 @@ std::vector<ContactsNumberTableRow> ContactsNumberTable::GetLimitOffset(uint32_t
     return ret;
 }
 
-std::vector<ContactsNumberTableRow> ContactsNumberTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactNumberTableFields field, const char *str)
+std::vector<ContactsNumberTableRow> ContactsNumberTable::GetLimitOffsetByField(uint32_t offset,
+                                                                               uint32_t limit,
+                                                                               ContactNumberTableFields field,
+                                                                               const char *str)
 {
     std::string fieldName;
-    switch (field)
-    {
+    switch (field) {
     case ContactNumberTableFields ::NumberUser:
         fieldName = "number_user";
         break;
@@ -98,17 +104,19 @@ std::vector<ContactsNumberTableRow> ContactsNumberTable::GetLimitOffsetByField(u
         return std::vector<ContactsNumberTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from contact_number WHERE %s='%s' ORDER BY number_user LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+    auto retQuery = db->Query("SELECT * from contact_number WHERE %s='%s' ORDER BY number_user LIMIT %lu OFFSET %lu;",
+                              fieldName.c_str(),
+                              str,
+                              limit,
+                              offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsNumberTableRow>();
     }
 
     std::vector<ContactsNumberTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsNumberTableRow{
             (*retQuery)[0].GetUInt32(),                                 // ID
             (*retQuery)[1].GetUInt32(),                                 // contactID
@@ -125,8 +133,7 @@ uint32_t ContactsNumberTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_number;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -137,8 +144,7 @@ uint32_t ContactsNumberTable::GetCountByFieldID(const char *field, uint32_t id)
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_number WHERE %s=%lu;", field, id);
 
-    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0))
-    {
+    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
         return 0;
     }
 
diff --git a/module-db/Tables/ContactsNumberTable.hpp b/module-db/Tables/ContactsNumberTable.hpp
index 21112f0ce..264686148 100644
--- a/module-db/Tables/ContactsNumberTable.hpp
+++ b/module-db/Tables/ContactsNumberTable.hpp
@@ -50,7 +50,10 @@ class ContactsNumberTable : public Table<ContactsNumberTableRow, ContactNumberTa
 
     std::vector<ContactsNumberTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::vector<ContactsNumberTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactNumberTableFields field, const char *str) override final;
+    std::vector<ContactsNumberTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                              uint32_t limit,
+                                                              ContactNumberTableFields field,
+                                                              const char *str) override final;
 
     uint32_t GetCount() override final;
 
diff --git a/module-db/Tables/ContactsRingtonesTable.cpp b/module-db/Tables/ContactsRingtonesTable.cpp
index 88f9908fa..45abffdac 100644
--- a/module-db/Tables/ContactsRingtonesTable.cpp
+++ b/module-db/Tables/ContactsRingtonesTable.cpp
@@ -11,12 +11,10 @@
 #include "ContactsRingtonesTable.hpp"
 
 ContactsRingtonesTable::ContactsRingtonesTable(Database *db) : Table(db)
-{
-}
+{}
 
 ContactsRingtonesTable::~ContactsRingtonesTable()
-{
-}
+{}
 
 bool ContactsRingtonesTable::Create()
 {
@@ -25,7 +23,9 @@ bool ContactsRingtonesTable::Create()
 
 bool ContactsRingtonesTable::Add(ContactsRingtonesTableRow entry)
 {
-    return db->Execute("insert or ignore into contact_ringtones (contact_id, asset_path ) VALUES (%lu, '%s');", entry.contactID, entry.assetPath.c_str());
+    return db->Execute("insert or ignore into contact_ringtones (contact_id, asset_path ) VALUES (%lu, '%s');",
+                       entry.contactID,
+                       entry.assetPath.c_str());
 }
 
 bool ContactsRingtonesTable::RemoveByID(uint32_t id)
@@ -35,15 +35,17 @@ bool ContactsRingtonesTable::RemoveByID(uint32_t id)
 
 bool ContactsRingtonesTable::Update(ContactsRingtonesTableRow entry)
 {
-    return db->Execute("UPDATE contact_ringtones SET contact_id = %lu, asset_path = '%s' WHERE _id=%lu;", entry.contactID, entry.assetPath.c_str(), entry.ID);
+    return db->Execute("UPDATE contact_ringtones SET contact_id = %lu, asset_path = '%s' WHERE _id=%lu;",
+                       entry.contactID,
+                       entry.assetPath.c_str(),
+                       entry.ID);
 }
 
 ContactsRingtonesTableRow ContactsRingtonesTable::GetByID(uint32_t id)
 {
     auto retQuery = db->Query("SELECT * FROM contact_ringtones WHERE _id= %lu;", id);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ContactsRingtonesTableRow();
     }
 
@@ -56,17 +58,16 @@ ContactsRingtonesTableRow ContactsRingtonesTable::GetByID(uint32_t id)
 
 std::vector<ContactsRingtonesTableRow> ContactsRingtonesTable::GetLimitOffset(uint32_t offset, uint32_t limit)
 {
-    auto retQuery = db->Query("SELECT * from contact_ringtones ORDER BY contact_id LIMIT %lu OFFSET %lu;", limit, offset);
+    auto retQuery =
+        db->Query("SELECT * from contact_ringtones ORDER BY contact_id LIMIT %lu OFFSET %lu;", limit, offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsRingtonesTableRow>();
     }
 
     std::vector<ContactsRingtonesTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsRingtonesTableRow{
             (*retQuery)[0].GetUInt32(), // ID
             (*retQuery)[1].GetUInt32(), // contactID
@@ -77,12 +78,13 @@ std::vector<ContactsRingtonesTableRow> ContactsRingtonesTable::GetLimitOffset(ui
     return ret;
 }
 
-std::vector<ContactsRingtonesTableRow> ContactsRingtonesTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactRingtonesTableFields field,
+std::vector<ContactsRingtonesTableRow> ContactsRingtonesTable::GetLimitOffsetByField(uint32_t offset,
+                                                                                     uint32_t limit,
+                                                                                     ContactRingtonesTableFields field,
                                                                                      const char *str)
 {
     std::string fieldName;
-    switch (field)
-    {
+    switch (field) {
     case ContactRingtonesTableFields ::AssetPath:
         fieldName = "asset_path";
         break;
@@ -90,17 +92,19 @@ std::vector<ContactsRingtonesTableRow> ContactsRingtonesTable::GetLimitOffsetByF
         return std::vector<ContactsRingtonesTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from contact_ringtones WHERE %s='%s' ORDER BY contact_id LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+    auto retQuery = db->Query("SELECT * from contact_ringtones WHERE %s='%s' ORDER BY contact_id LIMIT %lu OFFSET %lu;",
+                              fieldName.c_str(),
+                              str,
+                              limit,
+                              offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsRingtonesTableRow>();
     }
 
     std::vector<ContactsRingtonesTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsRingtonesTableRow{
             (*retQuery)[0].GetUInt32(), // ID
             (*retQuery)[1].GetUInt32(), // contactID
@@ -115,8 +119,7 @@ uint32_t ContactsRingtonesTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_ringtones;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -127,8 +130,7 @@ uint32_t ContactsRingtonesTable::GetCountByFieldID(const char *field, uint32_t i
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contact_ringtones WHERE %s=%lu;", field, id);
 
-    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0))
-    {
+    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
         return 0;
     }
 
diff --git a/module-db/Tables/ContactsRingtonesTable.hpp b/module-db/Tables/ContactsRingtonesTable.hpp
index f9d65e642..040df3295 100644
--- a/module-db/Tables/ContactsRingtonesTable.hpp
+++ b/module-db/Tables/ContactsRingtonesTable.hpp
@@ -47,7 +47,9 @@ class ContactsRingtonesTable : public Table<ContactsRingtonesTableRow, ContactRi
 
     std::vector<ContactsRingtonesTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::vector<ContactsRingtonesTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactRingtonesTableFields field,
+    std::vector<ContactsRingtonesTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                                 uint32_t limit,
+                                                                 ContactRingtonesTableFields field,
                                                                  const char *str) override final;
 
     uint32_t GetCount() override final;
@@ -62,4 +64,3 @@ class ContactsRingtonesTable : public Table<ContactsRingtonesTableRow, ContactRi
                                    "FOREIGN KEY(contact_id) REFERENCES contacts(_id)"
                                    ");";
 };
-
diff --git a/module-db/Tables/ContactsTable.cpp b/module-db/Tables/ContactsTable.cpp
index d09010c93..2a2387129 100644
--- a/module-db/Tables/ContactsTable.cpp
+++ b/module-db/Tables/ContactsTable.cpp
@@ -12,12 +12,10 @@
 #include <log/log.hpp>
 
 ContactsTable::ContactsTable(Database *db) : Table(db)
-{
-}
+{}
 
 ContactsTable::~ContactsTable()
-{
-}
+{}
 
 bool ContactsTable::Create()
 {
@@ -26,10 +24,18 @@ bool ContactsTable::Create()
 
 bool ContactsTable::Add(ContactsTableRow entry)
 {
-    return db->Execute("insert or ignore into contacts (name_id, numbers_id, ring_id, address_ids, type, whitelist, blacklist, favourites, speeddial ) VALUES "
+    return db->Execute("insert or ignore into contacts (name_id, numbers_id, ring_id, address_ids, type, whitelist, "
+                       "blacklist, favourites, speeddial ) VALUES "
                        "(%lu, '%s', %lu, '%s', %lu, %lu, %lu, %lu, %lu);",
-                       entry.nameID, entry.numbersID.c_str(), entry.ringID, entry.addressIDs.c_str(), entry.type, entry.isOnWhitelist, entry.isOnBlacklist,
-                       entry.isOnFavourites, entry.speedDial);
+                       entry.nameID,
+                       entry.numbersID.c_str(),
+                       entry.ringID,
+                       entry.addressIDs.c_str(),
+                       entry.type,
+                       entry.isOnWhitelist,
+                       entry.isOnBlacklist,
+                       entry.isOnFavourites,
+                       entry.speedDial);
 }
 
 bool ContactsTable::RemoveByID(uint32_t id)
@@ -44,18 +50,26 @@ bool ContactsTable::BlockByID(uint32_t id, bool shouldBeBlocked)
 
 bool ContactsTable::Update(ContactsTableRow entry)
 {
-    return db->Execute("UPDATE contacts SET name_id = %lu, numbers_id = '%s' ,ring_id = %lu, address_ids = '%s', type = %lu, whitelist = %lu, blacklist = %lu, "
+    return db->Execute("UPDATE contacts SET name_id = %lu, numbers_id = '%s' ,ring_id = %lu, address_ids = '%s', type "
+                       "= %lu, whitelist = %lu, blacklist = %lu, "
                        "favourites = %lu, speeddial = %lu WHERE _id=%lu;",
-                       entry.nameID, entry.numbersID.c_str(), entry.ringID, entry.addressIDs.c_str(), entry.type, entry.isOnWhitelist, entry.isOnBlacklist,
-                       entry.isOnFavourites, entry.speedDial, entry.ID);
+                       entry.nameID,
+                       entry.numbersID.c_str(),
+                       entry.ringID,
+                       entry.addressIDs.c_str(),
+                       entry.type,
+                       entry.isOnWhitelist,
+                       entry.isOnBlacklist,
+                       entry.isOnFavourites,
+                       entry.speedDial,
+                       entry.ID);
 }
 
 ContactsTableRow ContactsTable::GetByID(uint32_t id)
 {
     auto retQuery = db->Query("SELECT * FROM contacts WHERE _id= %lu;", id);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ContactsTableRow();
     }
 
@@ -73,12 +87,13 @@ ContactsTableRow ContactsTable::GetByID(uint32_t id)
     };
 }
 
-std::vector<ContactsTableRow> ContactsTable::Search(const std::string primaryName, const std::string alternativeName, const std::string number)
+std::vector<ContactsTableRow> ContactsTable::Search(const std::string primaryName,
+                                                    const std::string alternativeName,
+                                                    const std::string number)
 {
     std::vector<ContactsTableRow> ret;
 
-    if (primaryName.empty() && alternativeName.empty() && number.empty())
-    {
+    if (primaryName.empty() && alternativeName.empty() && number.empty()) {
         return (ret);
     }
 
@@ -86,27 +101,29 @@ std::vector<ContactsTableRow> ContactsTable::Search(const std::string primaryNam
                     "t2 "
                     "on t1._id=t2.contact_id inner join contact_number t3 on t1._id=t3.contact_id where ";
 
-    if (!primaryName.empty())
-    {
+    if (!primaryName.empty()) {
         q += "t2.name_primary like '%%" + primaryName + "%%'";
-        if (!alternativeName.empty()) q += " or ";
+        if (!alternativeName.empty())
+            q += " or ";
     }
 
-    if (!alternativeName.empty())
-    {
+    if (!alternativeName.empty()) {
         q += "t2.name_alternative like '%%" + alternativeName + "%%'";
-        if (!number.empty()) q += " or ";
+        if (!number.empty())
+            q += " or ";
     }
 
-    if (!number.empty()) q += "t3.number_e164 like '%%" + number + "%%'";
+    if (!number.empty())
+        q += "t3.number_e164 like '%%" + number + "%%'";
 
     LOG_DEBUG("query: \"%s\"", q.c_str());
     auto retQuery = db->Query(q.c_str());
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) { return std::vector<ContactsTableRow>(); }
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
+        return std::vector<ContactsTableRow>();
+    }
 
-    do
-    {
+    do {
         ret.push_back(ContactsTableRow{
             (*retQuery)[0].GetUInt32(),                           // ID
             (*retQuery)[1].GetUInt32(),                           // nameID
@@ -130,15 +147,13 @@ std::vector<ContactsTableRow> ContactsTable::GetLimitOffset(uint32_t offset, uin
 {
     auto retQuery = db->Query("SELECT * from contacts ORDER BY name_id LIMIT %lu OFFSET %lu;", limit, offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsTableRow>();
     }
 
     std::vector<ContactsTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsTableRow{
             (*retQuery)[0].GetUInt32(),                           // ID
             (*retQuery)[1].GetUInt32(),                           // nameID
@@ -156,12 +171,14 @@ std::vector<ContactsTableRow> ContactsTable::GetLimitOffset(uint32_t offset, uin
     return ret;
 }
 
-std::vector<ContactsTableRow> ContactsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactTableFields field, const char *str)
+std::vector<ContactsTableRow> ContactsTable::GetLimitOffsetByField(uint32_t offset,
+                                                                   uint32_t limit,
+                                                                   ContactTableFields field,
+                                                                   const char *str)
 {
 
     std::string fieldName;
-    switch (field)
-    {
+    switch (field) {
     case ContactTableFields ::SpeedDial:
         fieldName = "speeddial";
         break;
@@ -172,17 +189,19 @@ std::vector<ContactsTableRow> ContactsTable::GetLimitOffsetByField(uint32_t offs
         return std::vector<ContactsTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from contacts WHERE %s='%s' ORDER BY name_id LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+    auto retQuery = db->Query("SELECT * from contacts WHERE %s='%s' ORDER BY name_id LIMIT %lu OFFSET %lu;",
+                              fieldName.c_str(),
+                              str,
+                              limit,
+                              offset);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ContactsTableRow>();
     }
 
     std::vector<ContactsTableRow> ret;
 
-    do
-    {
+    do {
         ret.push_back(ContactsTableRow{
             (*retQuery)[0].GetUInt32(),                           // ID
             (*retQuery)[1].GetUInt32(),                           // nameID
@@ -204,8 +223,7 @@ uint32_t ContactsTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contacts;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -216,8 +234,7 @@ uint32_t ContactsTable::GetCountByFieldID(const char *field, uint32_t id)
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM contacts WHERE %s=%lu;", field, id);
 
-    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0))
-    {
+    if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
         return 0;
     }
 
diff --git a/module-db/Tables/ContactsTable.hpp b/module-db/Tables/ContactsTable.hpp
index e8a09d855..846f032c5 100644
--- a/module-db/Tables/ContactsTable.hpp
+++ b/module-db/Tables/ContactsTable.hpp
@@ -27,7 +27,7 @@ struct ContactsTableRow
     bool isOnBlacklist;
     bool isOnFavourites;
     uint32_t speedDial;
-    UTF8 namePrimary = "";
+    UTF8 namePrimary     = "";
     UTF8 nameAlternative = "";
 };
 
@@ -56,28 +56,34 @@ class ContactsTable : public Table<ContactsTableRow, ContactTableFields>
 
     bool BlockByID(uint32_t id, bool shouldBeBlocked);
 
-    std::vector<ContactsTableRow> Search(const std::string primaryName, const std::string alternativeName, const std::string number);
+    std::vector<ContactsTableRow> Search(const std::string primaryName,
+                                         const std::string alternativeName,
+                                         const std::string number);
 
     std::vector<ContactsTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
 
-    std::vector<ContactsTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, ContactTableFields field, const char *str) override final;
+    std::vector<ContactsTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                        uint32_t limit,
+                                                        ContactTableFields field,
+                                                        const char *str) override final;
 
     uint32_t GetCount() override final;
 
     uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
   private:
-    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS contacts("
-                                   "_id INTEGER PRIMARY KEY,"
-                                   "name_id INTEGER,"
-                                   "numbers_id TEXT NOT NULL,"
-                                   "ring_id INTEGER,"
-                                   "address_ids TEXT NOT NULL,"
-                                   "type INTEGER,"
-                                   "whitelist        INTEGER,"
-                                   "blacklist        INTEGER,"
-                                   "favourites       INTEGER,"
-                                   "speeddial        INTEGER,"
-                                   "FOREIGN KEY(name_id) REFERENCES contact_name(_id) FOREIGN KEY(ring_id) REFERENCES contact_ringtones(_id)"
-                                   ");";
+    const char *createTableQuery =
+        "CREATE TABLE IF NOT EXISTS contacts("
+        "_id INTEGER PRIMARY KEY,"
+        "name_id INTEGER,"
+        "numbers_id TEXT NOT NULL,"
+        "ring_id INTEGER,"
+        "address_ids TEXT NOT NULL,"
+        "type INTEGER,"
+        "whitelist        INTEGER,"
+        "blacklist        INTEGER,"
+        "favourites       INTEGER,"
+        "speeddial        INTEGER,"
+        "FOREIGN KEY(name_id) REFERENCES contact_name(_id) FOREIGN KEY(ring_id) REFERENCES contact_ringtones(_id)"
+        ");";
 };
diff --git a/module-db/Tables/CountryCodesTable.cpp b/module-db/Tables/CountryCodesTable.cpp
index 76c220930..60eb6849b 100644
--- a/module-db/Tables/CountryCodesTable.cpp
+++ b/module-db/Tables/CountryCodesTable.cpp
@@ -1,12 +1,10 @@
 #include "CountryCodesTable.hpp"
 
 CountryCodesTable::CountryCodesTable(Database *db) : Table(db)
-{
-}
+{}
 
 CountryCodesTable::~CountryCodesTable()
-{
-}
+{}
 
 bool CountryCodesTable::Create()
 {
@@ -17,8 +15,7 @@ CodesTableRow CountryCodesTable::GetByMCC(uint32_t mcc)
 {
     auto retQuery = db->Query("SELECT * FROM codes WHERE mcc= %lu LIMIT 1;", mcc);
 
-    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0))
-    {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return CodesTableRow();
     }
 
@@ -37,8 +34,7 @@ uint32_t CountryCodesTable::GetCount()
 {
     auto queryRet = db->Query("SELECT COUNT(*) FROM codes;");
 
-    if (queryRet->GetRowCount() == 0)
-    {
+    if (queryRet->GetRowCount() == 0) {
         return 0;
     }
 
diff --git a/module-db/Tables/CountryCodesTable.hpp b/module-db/Tables/CountryCodesTable.hpp
index c5c3c81d9..d399e1f60 100644
--- a/module-db/Tables/CountryCodesTable.hpp
+++ b/module-db/Tables/CountryCodesTable.hpp
@@ -47,7 +47,10 @@ class CountryCodesTable : public Table<CodesTableRow, CodesTableFields>
     {
         return std::vector<CodesTableRow>();
     }
-    std::vector<CodesTableRow> GetLimitOffsetByField(uint32_t offset, uint32_t limit, CodesTableFields field, const char *str) override final
+    std::vector<CodesTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                     uint32_t limit,
+                                                     CodesTableFields field,
+                                                     const char *str) override final
     {
         return std::vector<CodesTableRow>();
     }
diff --git a/module-db/Tables/NotesTable.cpp b/module-db/Tables/NotesTable.cpp
index de46ff2a1..0d7c5d4f8 100644
--- a/module-db/Tables/NotesTable.cpp
+++ b/module-db/Tables/NotesTable.cpp
@@ -8,83 +8,81 @@
  */
 #include "NotesTable.hpp"
 
+NotesTable::NotesTable(Database *db) : Table(db)
+{}
 
-NotesTable::NotesTable(Database *db) : Table(db) {
-}
+NotesTable::~NotesTable()
+{}
 
-NotesTable::~NotesTable() {
-
-}
-
-bool NotesTable::Create() {
+bool NotesTable::Create()
+{
     return db->Execute(createTableQuery);
 }
 
-bool NotesTable::Add(NotesTableRow entry) {
-    return db->Execute(
-            "INSERT or ignore INTO notes ( date, snippet, path ) VALUES (%lu,'%s','%s');",
-            entry.date,
-            entry.snippet.c_str(),
-			entry.path.c_str()
-    );
+bool NotesTable::Add(NotesTableRow entry)
+{
+    return db->Execute("INSERT or ignore INTO notes ( date, snippet, path ) VALUES (%lu,'%s','%s');",
+                       entry.date,
+                       entry.snippet.c_str(),
+                       entry.path.c_str());
 }
 
-bool NotesTable::RemoveByID(uint32_t id) {
+bool NotesTable::RemoveByID(uint32_t id)
+{
     return db->Execute("DELETE FROM notes where _id = %lu;", id);
 }
 
-bool NotesTable::RemoveByField(NotesTableFields field, const char *str) {
+bool NotesTable::RemoveByField(NotesTableFields field, const char *str)
+{
     std::string fieldName;
 
-    switch(field){
-        case NotesTableFields::Date:
-            fieldName = "date";
-            break;
+    switch (field) {
+    case NotesTableFields::Date:
+        fieldName = "date";
+        break;
 
-        case NotesTableFields::Path:
-            fieldName = "path";
-            break;
+    case NotesTableFields::Path:
+        fieldName = "path";
+        break;
 
-        case NotesTableFields::Snippet:
-            fieldName = "snippet";
-            break;
-        default:
-            return false;
+    case NotesTableFields::Snippet:
+        fieldName = "snippet";
+        break;
+    default:
+        return false;
     }
 
-    return db->Execute("DELETE FROM note where %s = '%s';", fieldName.c_str(),str);
-
+    return db->Execute("DELETE FROM note where %s = '%s';", fieldName.c_str(), str);
 }
 
-
-bool NotesTable::Update(NotesTableRow entry) {
-    return db->Execute(
-            "UPDATE notes SET date = %lu, snippet = '%s', , snippet = '%s' WHERE _id=%lu;",
-            entry.date,
-            entry.snippet.c_str(),
-			entry.path.c_str(),
-            entry.ID
-    );
+bool NotesTable::Update(NotesTableRow entry)
+{
+    return db->Execute("UPDATE notes SET date = %lu, snippet = '%s', , snippet = '%s' WHERE _id=%lu;",
+                       entry.date,
+                       entry.snippet.c_str(),
+                       entry.path.c_str(),
+                       entry.ID);
 }
 
-NotesTableRow NotesTable::GetByID(uint32_t id) {
+NotesTableRow NotesTable::GetByID(uint32_t id)
+{
     auto retQuery = db->Query("SELECT * FROM notes WHERE _id= %u;", id);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return NotesTableRow();
     }
 
-    return NotesTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                       (*retQuery)[1].GetUInt32(),    // date
-                       (*retQuery)[2].GetString(),    //snippet
-					   (*retQuery)[3].GetString(),    //path
+    return NotesTableRow{
+        (*retQuery)[0].GetUInt32(), // ID
+        (*retQuery)[1].GetUInt32(), // date
+        (*retQuery)[2].GetString(), // snippet
+        (*retQuery)[3].GetString(), // path
     };
 }
 
-std::vector<NotesTableRow> NotesTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
-    auto retQuery = db->Query("SELECT * from notes ORDER BY date LIMIT %lu OFFSET %lu;",
-                              limit,
-                              offset);
+std::vector<NotesTableRow> NotesTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
+    auto retQuery = db->Query("SELECT * from notes ORDER BY date LIMIT %lu OFFSET %lu;", limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<NotesTableRow>();
@@ -93,40 +91,40 @@ std::vector<NotesTableRow> NotesTable::GetLimitOffset(uint32_t offset, uint32_t
     std::vector<NotesTableRow> ret;
 
     do {
-    	ret.push_back(
-    		NotesTableRow{(*retQuery)[0].GetUInt32(),  // ID
-    			(*retQuery)[1].GetUInt32(),    // date
-				(*retQuery)[2].GetString(),    //snippet
-				(*retQuery)[3].GetString(),    //path
+        ret.push_back(NotesTableRow{
+            (*retQuery)[0].GetUInt32(), // ID
+            (*retQuery)[1].GetUInt32(), // date
+            (*retQuery)[2].GetString(), // snippet
+            (*retQuery)[3].GetString(), // path
         });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-std::vector<NotesTableRow>
-NotesTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, NotesTableFields field, const char *str) {
+std::vector<NotesTableRow> NotesTable::GetLimitOffsetByField(uint32_t offset,
+                                                             uint32_t limit,
+                                                             NotesTableFields field,
+                                                             const char *str)
+{
 
     std::string fieldName;
     switch (field) {
-        case NotesTableFields::Date:
-            fieldName = "date";
-            break;
-        case NotesTableFields ::Snippet:
-            fieldName = "snippet";
-            break;
-        case NotesTableFields ::Path:
-            fieldName = "path";
-            break;
-        default:
-            return std::vector<NotesTableRow>();
+    case NotesTableFields::Date:
+        fieldName = "date";
+        break;
+    case NotesTableFields ::Snippet:
+        fieldName = "snippet";
+        break;
+    case NotesTableFields ::Path:
+        fieldName = "path";
+        break;
+    default:
+        return std::vector<NotesTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from notes WHERE %s='%s' ORDER BY date LIMIT %lu OFFSET %lu;",
-                              fieldName.c_str(),
-                              str,
-                              limit,
-                              offset);
+    auto retQuery = db->Query(
+        "SELECT * from notes WHERE %s='%s' ORDER BY date LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<NotesTableRow>();
@@ -135,17 +133,19 @@ NotesTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, NotesTableFie
     std::vector<NotesTableRow> ret;
 
     do {
-        ret.push_back(NotesTableRow{(*retQuery)[0].GetUInt32(),  // ID
-            (*retQuery)[1].GetUInt32(),    // date
-            (*retQuery)[2].GetString(),    //snippet
-			(*retQuery)[3].GetString(),    //path
+        ret.push_back(NotesTableRow{
+            (*retQuery)[0].GetUInt32(), // ID
+            (*retQuery)[1].GetUInt32(), // date
+            (*retQuery)[2].GetString(), // snippet
+            (*retQuery)[3].GetString(), // path
         });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-uint32_t NotesTable::GetCount() {
+uint32_t NotesTable::GetCount()
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM NOTES;");
 
     if (queryRet->GetRowCount() == 0) {
@@ -155,7 +155,8 @@ uint32_t NotesTable::GetCount() {
     return uint32_t{(*queryRet)[0].GetUInt32()};
 }
 
-uint32_t NotesTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t NotesTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM notes WHERE %s=%lu;", field, id);
 
     if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
@@ -164,4 +165,3 @@ uint32_t NotesTable::GetCountByFieldID(const char *field, uint32_t id) {
 
     return uint32_t{(*queryRet)[0].GetUInt32()};
 }
-
diff --git a/module-db/Tables/NotesTable.hpp b/module-db/Tables/NotesTable.hpp
index fda642a5f..7dd48708b 100644
--- a/module-db/Tables/NotesTable.hpp
+++ b/module-db/Tables/NotesTable.hpp
@@ -13,46 +13,49 @@
 #include "utf8/UTF8.hpp"
 #include "Common/Common.hpp"
 
-struct NotesTableRow{
+struct NotesTableRow
+{
     uint32_t ID;
     uint32_t date;
-    UTF8    snippet; //up to 60 characters
-    UTF8    path;
+    UTF8 snippet; // up to 60 characters
+    UTF8 path;
 };
 
-enum class NotesTableFields{
+enum class NotesTableFields
+{
     Date,
     Snippet,
-	Path
+    Path
 };
 
 /*
  *
  */
-class NotesTable : public Table<NotesTableRow,NotesTableFields> {
-public:
-	NotesTable(Database* db);
-	virtual ~NotesTable();
+class NotesTable : public Table<NotesTableRow, NotesTableFields>
+{
+  public:
+    NotesTable(Database *db);
+    virtual ~NotesTable();
 
-	bool Create() override final;
-	bool Add(NotesTableRow entry) override final;
-	bool RemoveByID(uint32_t id) override final;
-	bool RemoveByField(NotesTableFields field, const char* str) override final;
-	bool Update(NotesTableRow entry) override final;
-	NotesTableRow GetByID(uint32_t id) override final;
-	std::vector<NotesTableRow> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
-	std::vector<NotesTableRow> GetLimitOffsetByField(uint32_t offset,uint32_t limit,NotesTableFields field,const char* str) override final;
+    bool Create() override final;
+    bool Add(NotesTableRow entry) override final;
+    bool RemoveByID(uint32_t id) override final;
+    bool RemoveByField(NotesTableFields field, const char *str) override final;
+    bool Update(NotesTableRow entry) override final;
+    NotesTableRow GetByID(uint32_t id) override final;
+    std::vector<NotesTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
+    std::vector<NotesTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                     uint32_t limit,
+                                                     NotesTableFields field,
+                                                     const char *str) override final;
 
-	uint32_t GetCount() override final;
-	uint32_t GetCountByFieldID(const char* field,uint32_t id) override final;
+    uint32_t GetCount() override final;
+    uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
-private:
-
-    const char* createTableQuery =
-            "CREATE TABLE IF NOT EXISTS notes("
-            "_id INTEGER PRIMARY KEY,"
-            "date INTEGER,"
-            "snippet TEXT DEFAULT '',"
-    		"path TEXT DEFAULT '')";
+  private:
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS notes("
+                                   "_id INTEGER PRIMARY KEY,"
+                                   "date INTEGER,"
+                                   "snippet TEXT DEFAULT '',"
+                                   "path TEXT DEFAULT '')";
 };
-
diff --git a/module-db/Tables/SMSTable.cpp b/module-db/Tables/SMSTable.cpp
index 6b66e7ed7..c62088d1e 100644
--- a/module-db/Tables/SMSTable.cpp
+++ b/module-db/Tables/SMSTable.cpp
@@ -8,96 +8,98 @@
  * @details
  */
 
-
 #include "SMSTable.hpp"
 #include <log/log.hpp>
 
-SMSTable::SMSTable(Database *db) : Table(db) {
-}
+SMSTable::SMSTable(Database *db) : Table(db)
+{}
 
-SMSTable::~SMSTable() {
+SMSTable::~SMSTable()
+{}
 
-}
-
-bool SMSTable::Create() {
+bool SMSTable::Create()
+{
     return db->Execute(createTableQuery);
 }
 
-bool SMSTable::Add(SMSTableRow entry) {
-    return db->Execute(
-            "INSERT or ignore INTO sms ( thread_id,contact_id, date, date_send, error_code, body, read, type ) VALUES (%lu,%lu,%lu,%lu,0,'%s',%d,%d);",
-            entry.threadID,
-            entry.contactID,
-            entry.date,
-            entry.dateSent,
-            entry.body.c_str(),
-            entry.isRead,
-            entry.type
-    );
+bool SMSTable::Add(SMSTableRow entry)
+{
+    return db->Execute("INSERT or ignore INTO sms ( thread_id,contact_id, date, date_send, error_code, body, read, "
+                       "type ) VALUES (%lu,%lu,%lu,%lu,0,'%s',%d,%d);",
+                       entry.threadID,
+                       entry.contactID,
+                       entry.date,
+                       entry.dateSent,
+                       entry.body.c_str(),
+                       entry.isRead,
+                       entry.type);
 }
 
-bool SMSTable::RemoveByID(uint32_t id) {
+bool SMSTable::RemoveByID(uint32_t id)
+{
     return db->Execute("DELETE FROM sms where _id = %u;", id);
 }
 
-bool SMSTable::RemoveByField(SMSTableFields field, const char *str) {
+bool SMSTable::RemoveByField(SMSTableFields field, const char *str)
+{
     std::string fieldName;
 
-    switch(field){
-        case SMSTableFields ::ThreadID:
-            fieldName = "thread_id";
-            break;
+    switch (field) {
+    case SMSTableFields ::ThreadID:
+        fieldName = "thread_id";
+        break;
 
-        case SMSTableFields ::ContactID:
-            fieldName = "contact_id";
-            break;
+    case SMSTableFields ::ContactID:
+        fieldName = "contact_id";
+        break;
 
-        case SMSTableFields ::Date:
-            fieldName = "date";
-            break;
-        default:
-            return false;
+    case SMSTableFields ::Date:
+        fieldName = "date";
+        break;
+    default:
+        return false;
     }
 
-    return db->Execute("DELETE FROM sms where %s = '%s';", fieldName.c_str(),str);
-
+    return db->Execute("DELETE FROM sms where %s = '%s';", fieldName.c_str(), str);
 }
 
-
-bool SMSTable::Update(SMSTableRow entry) {
-    return db->Execute(
-            "UPDATE sms SET thread_id = %lu, contact_id = %lu ,date = %lu, date_send = %lu, error_code = 0, body = '%s', read = %d, type =%d WHERE _id=%lu;",
-            entry.threadID,
-            entry.contactID,
-            entry.date,
-            entry.dateSent,
-            entry.body.c_str(),
-            entry.isRead,
-            entry.type,
-            entry.ID
-    );
+bool SMSTable::Update(SMSTableRow entry)
+{
+    return db->Execute("UPDATE sms SET thread_id = %lu, contact_id = %lu ,date = %lu, date_send = %lu, error_code = 0, "
+                       "body = '%s', read = %d, type =%d WHERE _id=%lu;",
+                       entry.threadID,
+                       entry.contactID,
+                       entry.date,
+                       entry.dateSent,
+                       entry.body.c_str(),
+                       entry.isRead,
+                       entry.type,
+                       entry.ID);
 }
 
-SMSTableRow SMSTable::GetByID(uint32_t id) {
+SMSTableRow SMSTable::GetByID(uint32_t id)
+{
     auto retQuery = db->Query("SELECT * FROM sms WHERE _id= %u;", id);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return SMSTableRow();
     }
 
-    return SMSTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                       (*retQuery)[1].GetUInt32(),    // threadID
-                       (*retQuery)[2].GetUInt32(),    // contactID
-                       (*retQuery)[3].GetUInt32(),    // date
-                       (*retQuery)[4].GetUInt32(),    // dateSent
-                       (*retQuery)[5].GetUInt32(),    // errorCode
-                       (*retQuery)[6].GetString(),    // body
-                       (*retQuery)[7].GetBool(),      // isRead
-                       static_cast<SMSType >((*retQuery)[8].GetUInt32()),    // type
+    return SMSTableRow{
+        (*retQuery)[0].GetUInt32(),                       // ID
+        (*retQuery)[1].GetUInt32(),                       // threadID
+        (*retQuery)[2].GetUInt32(),                       // contactID
+        (*retQuery)[3].GetUInt32(),                       // date
+        (*retQuery)[4].GetUInt32(),                       // dateSent
+        (*retQuery)[5].GetUInt32(),                       // errorCode
+        (*retQuery)[6].GetString(),                       // body
+        (*retQuery)[7].GetBool(),                         // isRead
+        static_cast<SMSType>((*retQuery)[8].GetUInt32()), // type
     };
 }
 
-std::vector<SMSTableRow> SMSTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
+std::vector<SMSTableRow> SMSTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
     auto retQuery = db->Query("SELECT * from sms ORDER BY date DESC LIMIT %lu OFFSET %lu;", limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
@@ -107,40 +109,48 @@ std::vector<SMSTableRow> SMSTable::GetLimitOffset(uint32_t offset, uint32_t limi
     std::vector<SMSTableRow> ret;
 
     do {
-        ret.push_back(SMSTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                                  (*retQuery)[1].GetUInt32(),    // threadID
-                                  (*retQuery)[2].GetUInt32(),    // contactID
-                                  (*retQuery)[3].GetUInt32(),    // date
-                                  (*retQuery)[4].GetUInt32(),    // dateSent
-                                  (*retQuery)[5].GetUInt32(),    // errorCode
-                                  (*retQuery)[6].GetString(),    // body
-                                  (*retQuery)[7].GetBool(),      // isRead
-                                  static_cast<SMSType >((*retQuery)[8].GetUInt32()),    // type
+        ret.push_back(SMSTableRow{
+            (*retQuery)[0].GetUInt32(),                       // ID
+            (*retQuery)[1].GetUInt32(),                       // threadID
+            (*retQuery)[2].GetUInt32(),                       // contactID
+            (*retQuery)[3].GetUInt32(),                       // date
+            (*retQuery)[4].GetUInt32(),                       // dateSent
+            (*retQuery)[5].GetUInt32(),                       // errorCode
+            (*retQuery)[6].GetString(),                       // body
+            (*retQuery)[7].GetBool(),                         // isRead
+            static_cast<SMSType>((*retQuery)[8].GetUInt32()), // type
         });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-std::vector<SMSTableRow>
-SMSTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, SMSTableFields field, const char *str) {
+std::vector<SMSTableRow> SMSTable::GetLimitOffsetByField(uint32_t offset,
+                                                         uint32_t limit,
+                                                         SMSTableFields field,
+                                                         const char *str)
+{
 
     std::string fieldName;
     switch (field) {
-        case SMSTableFields::Date:
-            fieldName = "date";
-            break;
-        case SMSTableFields ::ContactID:
-            fieldName = "contact_id";
-            break;
-        case SMSTableFields ::ThreadID:
-            fieldName = "thread_id";
-            break;
-        default:
-            return std::vector<SMSTableRow>();
+    case SMSTableFields::Date:
+        fieldName = "date";
+        break;
+    case SMSTableFields ::ContactID:
+        fieldName = "contact_id";
+        break;
+    case SMSTableFields ::ThreadID:
+        fieldName = "thread_id";
+        break;
+    default:
+        return std::vector<SMSTableRow>();
     }
 
-    auto retQuery = db->Query("SELECT * from sms WHERE %s='%s' ORDER BY date DESC LIMIT %lu OFFSET %lu;", fieldName.c_str(), str, limit, offset);
+    auto retQuery = db->Query("SELECT * from sms WHERE %s='%s' ORDER BY date DESC LIMIT %lu OFFSET %lu;",
+                              fieldName.c_str(),
+                              str,
+                              limit,
+                              offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<SMSTableRow>();
@@ -149,15 +159,16 @@ SMSTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, SMSTableFields
     std::vector<SMSTableRow> ret;
 
     do {
-        ret.push_back(SMSTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                                  (*retQuery)[1].GetUInt32(),    // threadID
-                                  (*retQuery)[2].GetUInt32(),    // contactID
-                                  (*retQuery)[3].GetUInt32(),    // date
-                                  (*retQuery)[4].GetUInt32(),    // dateSent
-                                  (*retQuery)[5].GetUInt32(),    // errorCode
-                                  (*retQuery)[6].GetString(),    // body
-                                  (*retQuery)[7].GetBool(),      // isRead
-                                  static_cast<SMSType >((*retQuery)[8].GetUInt32()),    // type
+        ret.push_back(SMSTableRow{
+            (*retQuery)[0].GetUInt32(),                       // ID
+            (*retQuery)[1].GetUInt32(),                       // threadID
+            (*retQuery)[2].GetUInt32(),                       // contactID
+            (*retQuery)[3].GetUInt32(),                       // date
+            (*retQuery)[4].GetUInt32(),                       // dateSent
+            (*retQuery)[5].GetUInt32(),                       // errorCode
+            (*retQuery)[6].GetString(),                       // body
+            (*retQuery)[7].GetBool(),                         // isRead
+            static_cast<SMSType>((*retQuery)[8].GetUInt32()), // type
         });
     } while (retQuery->NextRow());
 
@@ -166,8 +177,7 @@ SMSTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, SMSTableFields
 uint32_t SMSTable::GetCount(EntryState state)
 {
     std::string query = "SELECT COUNT(*) FROM sms ";
-    switch (state)
-    {
+    switch (state) {
     case EntryState::ALL:
         break;
     case EntryState::READ:
@@ -180,8 +190,7 @@ uint32_t SMSTable::GetCount(EntryState state)
     query += ";";
 
     auto queryRet = db->Query(query.c_str());
-    if (queryRet == nullptr || queryRet->GetRowCount() == 0)
-    {
+    if (queryRet == nullptr || queryRet->GetRowCount() == 0) {
         return 0;
     }
 
@@ -193,7 +202,8 @@ uint32_t SMSTable::GetCount()
     return GetCount(EntryState::ALL);
 }
 
-uint32_t SMSTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t SMSTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM sms WHERE %s=%lu;", field, id);
 
     if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
diff --git a/module-db/Tables/SMSTable.hpp b/module-db/Tables/SMSTable.hpp
index b1ee2da1b..86a8382da 100644
--- a/module-db/Tables/SMSTable.hpp
+++ b/module-db/Tables/SMSTable.hpp
@@ -15,57 +15,58 @@
 #include "utf8/UTF8.hpp"
 #include "Common/Common.hpp"
 
-
-struct SMSTableRow{
+struct SMSTableRow
+{
     uint32_t ID;
     uint32_t threadID;
     uint32_t contactID;
     uint32_t date;
     uint32_t dateSent;
     uint32_t errorCode;
-    UTF8    body;
-    bool    isRead;
+    UTF8 body;
+    bool isRead;
     SMSType type;
 };
 
-enum class SMSTableFields{
+enum class SMSTableFields
+{
     Date,
     ThreadID,
     ContactID
 };
 
-class SMSTable : public Table<SMSTableRow,SMSTableFields> {
-public:
-
-    SMSTable(Database* db);
+class SMSTable : public Table<SMSTableRow, SMSTableFields>
+{
+  public:
+    SMSTable(Database *db);
     virtual ~SMSTable();
 
     bool Create() override final;
     bool Add(SMSTableRow entry) override final;
     bool RemoveByID(uint32_t id) override final;
-    bool RemoveByField(SMSTableFields field, const char* str) override final;
+    bool RemoveByField(SMSTableFields field, const char *str) override final;
     bool Update(SMSTableRow entry) override final;
     SMSTableRow GetByID(uint32_t id) override final;
-    std::vector<SMSTableRow> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
-    std::vector<SMSTableRow> GetLimitOffsetByField(uint32_t offset,uint32_t limit,SMSTableFields field,const char* str) override final;
+    std::vector<SMSTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
+    std::vector<SMSTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                   uint32_t limit,
+                                                   SMSTableFields field,
+                                                   const char *str) override final;
 
     uint32_t GetCount() override final;
     uint32_t GetCount(EntryState state);
-    uint32_t GetCountByFieldID(const char* field,uint32_t id) override final;
-
-private:
-
-    const char* createTableQuery =
-            "CREATE TABLE IF NOT EXISTS sms("
-            "_id INTEGER PRIMARY KEY,"
-            "thread_id INTEGER,"
-            "contact_id INTEGER,"
-            "date INTEGER,"
-            "date_send INTEGER,"
-            "error_code INTEGER,"
-            "body TEXT NOT_NULL,"
-            "read INTEGER,"
-            "type INTEGER,"
-            "FOREIGN KEY(thread_id) REFERENCES threads(_id) ON DELETE CASCADE );";
+    uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
+  private:
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS sms("
+                                   "_id INTEGER PRIMARY KEY,"
+                                   "thread_id INTEGER,"
+                                   "contact_id INTEGER,"
+                                   "date INTEGER,"
+                                   "date_send INTEGER,"
+                                   "error_code INTEGER,"
+                                   "body TEXT NOT_NULL,"
+                                   "read INTEGER,"
+                                   "type INTEGER,"
+                                   "FOREIGN KEY(thread_id) REFERENCES threads(_id) ON DELETE CASCADE );";
 };
diff --git a/module-db/Tables/SettingsTable.cpp b/module-db/Tables/SettingsTable.cpp
index 336503894..d55b9302d 100644
--- a/module-db/Tables/SettingsTable.cpp
+++ b/module-db/Tables/SettingsTable.cpp
@@ -8,23 +8,18 @@
  * @details
  */
 
-
 #include "SettingsTable.hpp"
 
+SettingsTable::SettingsTable(Database *db) : Table(db)
+{}
 
-SettingsTable::SettingsTable(Database *db):Table(db) {
+SettingsTable::~SettingsTable()
+{}
 
-}
-
-SettingsTable::~SettingsTable() {
-
-}
-
-
-
-bool SettingsTable::Create() {
+bool SettingsTable::Create()
+{
     bool ret = true;
-    ret = db->Execute(createTableQuery);
+    ret      = db->Execute(createTableQuery);
     if (!ret) {
         return false;
     }
@@ -33,11 +28,12 @@ bool SettingsTable::Create() {
     return ret;
 }
 
-SettingsTableRow SettingsTable::GetByID(uint32_t id) {
+SettingsTableRow SettingsTable::GetByID(uint32_t id)
+{
 
     auto retQuery = db->Query("SELECT * FROM settings WHERE _id= 1;");
 
-    if ( (retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
+    if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return SettingsTableRow();
     }
 
@@ -63,38 +59,61 @@ SettingsTableRow SettingsTable::GetByID(uint32_t id) {
     };
 }
 
-bool SettingsTable::Update(SettingsTableRow entry) {
-    return db->Execute("UPDATE settings SET time_format_12 = %lu, time_auto = %lu, time_date_format = %lu ,brightness_auto = %lu, brightness_level = %lu, "
-                       "bigger_font = %lu, pin_mode =%lu, pin_days = %lu ,pin_days_left = %lu, pin1_string = '%s', pin2_string = '%s', active_sim = %lu, "
+bool SettingsTable::Update(SettingsTableRow entry)
+{
+    return db->Execute("UPDATE settings SET time_format_12 = %lu, time_auto = %lu, time_date_format = %lu "
+                       ",brightness_auto = %lu, brightness_level = %lu, "
+                       "bigger_font = %lu, pin_mode =%lu, pin_days = %lu ,pin_days_left = %lu, pin1_string = '%s', "
+                       "pin2_string = '%s', active_sim = %lu, "
                        "network_operator = '%s', lock_pass_hash = %lu, lock_time = %lu, language = %lu WHERE _id=1;",
-                       entry.timeFormat12, entry.timeAuto, entry.timeDateFormat, entry.brightnessAuto, entry.brightnessLevel, entry.fontSize, entry.pinMode,
-                       entry.pinDays, entry.pinDaysLeft, entry.pin1.c_str(), entry.pin2.c_str(), entry.activeSIM, entry.networkOperator.c_str(),
-                       entry.lockPassHash, entry.lockTime, entry.language);
+                       entry.timeFormat12,
+                       entry.timeAuto,
+                       entry.timeDateFormat,
+                       entry.brightnessAuto,
+                       entry.brightnessLevel,
+                       entry.fontSize,
+                       entry.pinMode,
+                       entry.pinDays,
+                       entry.pinDaysLeft,
+                       entry.pin1.c_str(),
+                       entry.pin2.c_str(),
+                       entry.activeSIM,
+                       entry.networkOperator.c_str(),
+                       entry.lockPassHash,
+                       entry.lockTime,
+                       entry.language);
 }
 
-bool SettingsTable::Add(SettingsTableRow entry) {
-    //dummy
+bool SettingsTable::Add(SettingsTableRow entry)
+{
+    // dummy
     return true;
 }
 
-bool SettingsTable::RemoveByID(uint32_t id) {
+bool SettingsTable::RemoveByID(uint32_t id)
+{
     return true;
 }
 
-std::vector<SettingsTableRow> SettingsTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
+std::vector<SettingsTableRow> SettingsTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
     return std::vector<SettingsTableRow>{};
 }
 
-std::vector<SettingsTableRow> SettingsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit,
-                                                                   SettingsTableFields field, const char *str) {
+std::vector<SettingsTableRow> SettingsTable::GetLimitOffsetByField(uint32_t offset,
+                                                                   uint32_t limit,
+                                                                   SettingsTableFields field,
+                                                                   const char *str)
+{
     return std::vector<SettingsTableRow>{};
-
 }
 
-uint32_t SettingsTable::GetCount() {
+uint32_t SettingsTable::GetCount()
+{
     return 0;
 }
 
-uint32_t SettingsTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t SettingsTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     return 0;
 }
diff --git a/module-db/Tables/SettingsTable.hpp b/module-db/Tables/SettingsTable.hpp
index a733f7ef3..524fbac6f 100644
--- a/module-db/Tables/SettingsTable.hpp
+++ b/module-db/Tables/SettingsTable.hpp
@@ -14,7 +14,8 @@
 #include "utf8/UTF8.hpp"
 #include "Common/Common.hpp"
 
-struct SettingsTableRow{
+struct SettingsTableRow
+{
     uint32_t ID;
     bool timeFormat12;
     bool timeAuto;
@@ -27,61 +28,63 @@ struct SettingsTableRow{
     uint32_t pinDaysLeft;
     std::string pin1;
     std::string pin2;
-    uint32_t    activeSIM;
-    std::string     networkOperator;
+    uint32_t activeSIM;
+    std::string networkOperator;
     uint32_t lockPassHash;
-    //time of inactivity of the user after which phone will be automatically blocked.
+    // time of inactivity of the user after which phone will be automatically blocked.
     uint32_t lockTime;
     SettingsLanguage language;
 };
 
-enum class SettingsTableFields{
+enum class SettingsTableFields
+{
     Dummy
 };
 
-class SettingsTable : public Table<SettingsTableRow,SettingsTableFields> {
-public:
-
-    SettingsTable(Database* db);
+class SettingsTable : public Table<SettingsTableRow, SettingsTableFields>
+{
+  public:
+    SettingsTable(Database *db);
     virtual ~SettingsTable();
 
     bool Create() override final;
     bool Update(SettingsTableRow entry) override final;
     SettingsTableRow GetByID(uint32_t id) override final;
 
-
-
-
     bool Add(SettingsTableRow entry) override final;
     bool RemoveByID(uint32_t id) override final;
     std::vector<SettingsTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
-    std::vector<SettingsTableRow>
-    GetLimitOffsetByField(uint32_t offset, uint32_t limit, SettingsTableFields field,const char* str) override final;
+    std::vector<SettingsTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                        uint32_t limit,
+                                                        SettingsTableFields field,
+                                                        const char *str) override final;
     uint32_t GetCount() override final;
     uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
 
-private:
-  const char *createTableQuery = "CREATE TABLE IF NOT EXISTS settings("
-                                 "_id INTEGER PRIMARY KEY, "
-                                 "time_format_12 INTEGER DEFAULT 0, "
-                                 "time_auto INTEGER DEFAULT 1, "
-                                 "time_date_format INTEGER DEFAULT 1, "
-                                 "brightness_auto INTEGER DEFAULT 1, "
-                                 "brightness_level INTEGER DEFAULT 0, "
-                                 "bigger_font INTEGER DEFAULT 0, "
-                                 "pin_mode INTEGER DEFAULT 1, "
-                                 "pin_days INTEGER DEFAULT 0, "
-                                 "pin_days_left INTEGER DEFAULT 0, "
-                                 "pin1_string TEXT DEFAULT '', "
-                                 "pin2_string TEXT DEFAULT '', "
-                                 "active_sim INTEGER DEFAULT 1, "
-                                 "network_operator TEXT DEFAULT '', "
-                                 "lock_pass_hash INTEGER DEFAULT 0, "
-                                 "lock_time INTEGER DEFAULT 30000, "
-                                 "language INTEGER DEFAULT 1 "
-                                 ");";
+  private:
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS settings("
+                                   "_id INTEGER PRIMARY KEY, "
+                                   "time_format_12 INTEGER DEFAULT 0, "
+                                   "time_auto INTEGER DEFAULT 1, "
+                                   "time_date_format INTEGER DEFAULT 1, "
+                                   "brightness_auto INTEGER DEFAULT 1, "
+                                   "brightness_level INTEGER DEFAULT 0, "
+                                   "bigger_font INTEGER DEFAULT 0, "
+                                   "pin_mode INTEGER DEFAULT 1, "
+                                   "pin_days INTEGER DEFAULT 0, "
+                                   "pin_days_left INTEGER DEFAULT 0, "
+                                   "pin1_string TEXT DEFAULT '', "
+                                   "pin2_string TEXT DEFAULT '', "
+                                   "active_sim INTEGER DEFAULT 1, "
+                                   "network_operator TEXT DEFAULT '', "
+                                   "lock_pass_hash INTEGER DEFAULT 0, "
+                                   "lock_time INTEGER DEFAULT 30000, "
+                                   "language INTEGER DEFAULT 1 "
+                                   ");";
 
-  const char *settingsInitialization = "INSERT OR IGNORE INTO settings (_id, time_format_12, time_auto, time_date_format, brightness_auto, brightness_level, "
-                                       "bigger_font, pin_mode, pin_days, pin_days_left, pin1_string,pin2_string, "
-                                       "active_sim,network_operator,lock_pass_hash,lock_time, language) VALUES(1,0,1,1,1,0,0,1,0,0,'','',1,'',0,30000,1)";
+    const char *settingsInitialization = "INSERT OR IGNORE INTO settings (_id, time_format_12, time_auto, "
+                                         "time_date_format, brightness_auto, brightness_level, "
+                                         "bigger_font, pin_mode, pin_days, pin_days_left, pin1_string,pin2_string, "
+                                         "active_sim,network_operator,lock_pass_hash,lock_time, language) "
+                                         "VALUES(1,0,1,1,1,0,0,1,0,0,'','',1,'',0,30000,1)";
 };
diff --git a/module-db/Tables/Table.cpp b/module-db/Tables/Table.cpp
index de9d15a59..31cc9d324 100644
--- a/module-db/Tables/Table.cpp
+++ b/module-db/Tables/Table.cpp
@@ -8,5 +8,4 @@
  * @details
  */
 
-
 #include "Table.hpp"
diff --git a/module-db/Tables/Table.hpp b/module-db/Tables/Table.hpp
index a42c3b7d3..cc3774113 100644
--- a/module-db/Tables/Table.hpp
+++ b/module-db/Tables/Table.hpp
@@ -14,28 +14,34 @@
 #include <vector>
 #include "Database/Database.hpp"
 
-template <typename T, typename F>
-class Table {
+template <typename T, typename F> class Table
+{
 
-protected:
+  protected:
+    Table(Database *db) : db(db)
+    {}
 
-    Table(Database* db):db(db){}
+    virtual ~Table()
+    {}
 
-    virtual ~Table(){}
-
-    virtual bool Create() = 0;
-    virtual bool Add(T entry) = 0;
+    virtual bool Create()                = 0;
+    virtual bool Add(T entry)            = 0;
     virtual bool RemoveByID(uint32_t id) = 0;
-    virtual bool RemoveByField(F field, const char* str){return true;}
-    virtual bool Update(T entry) = 0;
-    virtual T GetByID(uint32_t id) = 0;
-    virtual std::vector<T> GetLimitOffset(uint32_t offset,uint32_t limit) = 0;
-    virtual std::vector<T> GetLimitOffsetByField(uint32_t offset,uint32_t limit,F field,const char* str) = 0;
-    virtual uint32_t GetCount() = 0;
-    virtual uint32_t GetCountByFieldID(const char* field,uint32_t id) = 0;
+    virtual bool RemoveByField(F field, const char *str)
+    {
+        return true;
+    }
+    virtual bool Update(T entry)                                                                            = 0;
+    virtual T GetByID(uint32_t id)                                                                          = 0;
+    virtual std::vector<T> GetLimitOffset(uint32_t offset, uint32_t limit)                                  = 0;
+    virtual std::vector<T> GetLimitOffsetByField(uint32_t offset, uint32_t limit, F field, const char *str) = 0;
+    virtual uint32_t GetCount()                                                                             = 0;
+    virtual uint32_t GetCountByFieldID(const char *field, uint32_t id)                                      = 0;
 
-    uint32_t GetLastInsertRowID(){return db->GetLastInsertRowID();}
-
-    Database* db;
+    uint32_t GetLastInsertRowID()
+    {
+        return db->GetLastInsertRowID();
+    }
 
+    Database *db;
 };
diff --git a/module-db/Tables/ThreadsTable.cpp b/module-db/Tables/ThreadsTable.cpp
index a5effda76..7268e3e2e 100644
--- a/module-db/Tables/ThreadsTable.cpp
+++ b/module-db/Tables/ThreadsTable.cpp
@@ -8,77 +8,83 @@
  * @details
  */
 
-
 #include "ThreadsTable.hpp"
 
-ThreadsTable::ThreadsTable(Database *db) : Table(db) {
-}
+ThreadsTable::ThreadsTable(Database *db) : Table(db)
+{}
 
-ThreadsTable::~ThreadsTable() {
+ThreadsTable::~ThreadsTable()
+{}
 
-}
-
-bool ThreadsTable::Create() {
+bool ThreadsTable::Create()
+{
     // Create necessary tables
-    if (db->Execute(createTableQuery) == false) return false;
-    if (db->Execute(createTableThreadsCounterQuery)) return false;
-    if (db->Execute(threadsCounterInsertionQuery)) return false;
-    if (db->Execute(threadInsertTriggerQuery)) return false;
-    if (db->Execute(threadRemoveTriggerQuery)) return false;
+    if (db->Execute(createTableQuery) == false)
+        return false;
+    if (db->Execute(createTableThreadsCounterQuery))
+        return false;
+    if (db->Execute(threadsCounterInsertionQuery))
+        return false;
+    if (db->Execute(threadInsertTriggerQuery))
+        return false;
+    if (db->Execute(threadRemoveTriggerQuery))
+        return false;
 
     return true;
 }
 
-bool ThreadsTable::Add(ThreadsTableRow entry) {
+bool ThreadsTable::Add(ThreadsTableRow entry)
+{
 
-    return db->Execute(
-            "INSERT or ignore INTO threads ( date, msg_count, read, contact_id, snippet, last_dir ) VALUES ( %lu, 0, 0, %lu, '%s', %lu );",
-            entry.date,
-            entry.contactID,
-            entry.snippet.c_str(),
-            entry.type
-    );
+    return db->Execute("INSERT or ignore INTO threads ( date, msg_count, read, contact_id, snippet, last_dir ) VALUES "
+                       "( %lu, 0, 0, %lu, '%s', %lu );",
+                       entry.date,
+                       entry.contactID,
+                       entry.snippet.c_str(),
+                       entry.type);
 }
 
-bool ThreadsTable::RemoveByID(uint32_t id) {
+bool ThreadsTable::RemoveByID(uint32_t id)
+{
     return db->Execute("DELETE FROM threads where _id = %u;", id);
 }
 
-bool ThreadsTable::Update(ThreadsTableRow entry) {
-    return db->Execute(
-            "UPDATE threads SET date = %lu, msg_count = %lu ,read = %lu, contact_id = %lu, snippet = '%s', last_dir = %lu WHERE _id=%lu;",
-            entry.date,
-            entry.msgCount,
-            entry.msgRead,
-            entry.contactID,
-            entry.snippet.c_str(),
-            entry.type,
-            entry.ID
-    );
+bool ThreadsTable::Update(ThreadsTableRow entry)
+{
+    return db->Execute("UPDATE threads SET date = %lu, msg_count = %lu ,read = %lu, contact_id = %lu, snippet = '%s', "
+                       "last_dir = %lu WHERE _id=%lu;",
+                       entry.date,
+                       entry.msgCount,
+                       entry.msgRead,
+                       entry.contactID,
+                       entry.snippet.c_str(),
+                       entry.type,
+                       entry.ID);
 }
 
-ThreadsTableRow ThreadsTable::GetByID(uint32_t id) {
+ThreadsTableRow ThreadsTable::GetByID(uint32_t id)
+{
     auto retQuery = db->Query("SELECT * FROM threads WHERE _id= %u;", id);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return ThreadsTableRow();
     }
 
-    return ThreadsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                           (*retQuery)[1].GetUInt32(),    // date
-                           (*retQuery)[2].GetUInt32(),    // msgCount
-                           (*retQuery)[3].GetUInt32(),    // msgRead
-                           (*retQuery)[4].GetUInt32(),    // contactID
-                           (*retQuery)[5].GetString(),    // snippet
-                           static_cast<SMSType >((*retQuery)[6].GetUInt32()),    // type/last-dir
+    return ThreadsTableRow{
+        (*retQuery)[0].GetUInt32(),                       // ID
+        (*retQuery)[1].GetUInt32(),                       // date
+        (*retQuery)[2].GetUInt32(),                       // msgCount
+        (*retQuery)[3].GetUInt32(),                       // msgRead
+        (*retQuery)[4].GetUInt32(),                       // contactID
+        (*retQuery)[5].GetString(),                       // snippet
+        static_cast<SMSType>((*retQuery)[6].GetUInt32()), // type/last-dir
     };
 }
 
-std::vector<ThreadsTableRow> ThreadsTable::GetLimitOffset(uint32_t offset, uint32_t limit) {
+std::vector<ThreadsTableRow> ThreadsTable::GetLimitOffset(uint32_t offset, uint32_t limit)
+{
 
-    auto retQuery = db->Query("SELECT * from threads ORDER BY date DESC LIMIT %lu OFFSET %lu;",
-                              limit,
-                              offset);
+    auto retQuery = db->Query("SELECT * from threads ORDER BY date DESC LIMIT %lu OFFSET %lu;", limit, offset);
 
     if ((retQuery == nullptr) || (retQuery->GetRowCount() == 0)) {
         return std::vector<ThreadsTableRow>();
@@ -87,45 +93,46 @@ std::vector<ThreadsTableRow> ThreadsTable::GetLimitOffset(uint32_t offset, uint3
     std::vector<ThreadsTableRow> ret;
 
     do {
-        ret.push_back(ThreadsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                                      (*retQuery)[1].GetUInt32(),    // date
-                                      (*retQuery)[2].GetUInt32(),    // msgCount
-                                      (*retQuery)[3].GetUInt32(),    // msgRead
-                                      (*retQuery)[4].GetUInt32(),    // contactID
-                                      (*retQuery)[5].GetString(),    // snippet
-                                      static_cast<SMSType >((*retQuery)[6].GetUInt32()),    // type/last-dir
+        ret.push_back(ThreadsTableRow{
+            (*retQuery)[0].GetUInt32(),                       // ID
+            (*retQuery)[1].GetUInt32(),                       // date
+            (*retQuery)[2].GetUInt32(),                       // msgCount
+            (*retQuery)[3].GetUInt32(),                       // msgRead
+            (*retQuery)[4].GetUInt32(),                       // contactID
+            (*retQuery)[5].GetString(),                       // snippet
+            static_cast<SMSType>((*retQuery)[6].GetUInt32()), // type/last-dir
         });
     } while (retQuery->NextRow());
 
     return ret;
 }
 
-std::vector<ThreadsTableRow>
-ThreadsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ThreadsTableFields field, const char *str) {
+std::vector<ThreadsTableRow> ThreadsTable::GetLimitOffsetByField(uint32_t offset,
+                                                                 uint32_t limit,
+                                                                 ThreadsTableFields field,
+                                                                 const char *str)
+{
 
     std::string fieldName;
     switch (field) {
-        case ThreadsTableFields::Date:
-            fieldName = "date";
-            break;
-        case ThreadsTableFields::MsgCount:
-            fieldName = "msg_count";
-            break;
-        case ThreadsTableFields ::ContactID:
-            fieldName = "contact_id";
-            break;
-        default:
-            return std::vector<ThreadsTableRow>();
-
+    case ThreadsTableFields::Date:
+        fieldName = "date";
+        break;
+    case ThreadsTableFields::MsgCount:
+        fieldName = "msg_count";
+        break;
+    case ThreadsTableFields ::ContactID:
+        fieldName = "contact_id";
+        break;
+    default:
+        return std::vector<ThreadsTableRow>();
     }
 
     std::string querry = "SELECT * from threads WHERE " + fieldName + " = '" + str + "' ORDER BY date";
-    if (limit != 0)
-    {
+    if (limit != 0) {
         querry += " LIMIT " + std::to_string(limit);
     }
-    if (offset != 0)
-    {
+    if (offset != 0) {
         querry += " OFFSET " + std::to_string(offset);
     }
     querry += ";";
@@ -139,21 +146,22 @@ ThreadsTable::GetLimitOffsetByField(uint32_t offset, uint32_t limit, ThreadsTabl
     std::vector<ThreadsTableRow> ret;
 
     do {
-        ret.push_back(ThreadsTableRow{(*retQuery)[0].GetUInt32(),  // ID
-                                      (*retQuery)[1].GetUInt32(),    // date
-                                      (*retQuery)[2].GetUInt32(),    // msgCount
-                                      (*retQuery)[3].GetUInt32(),    // msgRead
-                                      (*retQuery)[4].GetUInt32(),    // contactID
-                                      (*retQuery)[5].GetString(),    // snippet
-                                      static_cast<SMSType >((*retQuery)[6].GetUInt32()),    // type/last-dir
+        ret.push_back(ThreadsTableRow{
+            (*retQuery)[0].GetUInt32(),                       // ID
+            (*retQuery)[1].GetUInt32(),                       // date
+            (*retQuery)[2].GetUInt32(),                       // msgCount
+            (*retQuery)[3].GetUInt32(),                       // msgRead
+            (*retQuery)[4].GetUInt32(),                       // contactID
+            (*retQuery)[5].GetString(),                       // snippet
+            static_cast<SMSType>((*retQuery)[6].GetUInt32()), // type/last-dir
         });
     } while (retQuery->NextRow());
 
     return ret;
-
 }
 
-uint32_t ThreadsTable::GetCount() {
+uint32_t ThreadsTable::GetCount()
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM threads;");
 
     if (queryRet->GetRowCount() == 0) {
@@ -163,7 +171,8 @@ uint32_t ThreadsTable::GetCount() {
     return uint32_t{(*queryRet)[0].GetUInt32()};
 }
 
-uint32_t ThreadsTable::GetCountByFieldID(const char *field, uint32_t id) {
+uint32_t ThreadsTable::GetCountByFieldID(const char *field, uint32_t id)
+{
     auto queryRet = db->Query("SELECT COUNT(*) FROM threads WHERE %s=%u;", field, id);
 
     if ((queryRet == nullptr) || (queryRet->GetRowCount() == 0)) {
diff --git a/module-db/Tables/ThreadsTable.hpp b/module-db/Tables/ThreadsTable.hpp
index 44dee42b3..c040fd438 100644
--- a/module-db/Tables/ThreadsTable.hpp
+++ b/module-db/Tables/ThreadsTable.hpp
@@ -15,17 +15,19 @@
 #include "utf8/UTF8.hpp"
 #include "Common/Common.hpp"
 
-struct ThreadsTableRow{
+struct ThreadsTableRow
+{
     uint32_t ID;
     uint32_t date;
     uint32_t msgCount;
     uint32_t msgRead;
     uint32_t contactID;
-    UTF8    snippet;
+    UTF8 snippet;
     SMSType type;
 };
 
-enum class ThreadsTableFields{
+enum class ThreadsTableFields
+{
     Date,
     MsgCount,
     MsgRead,
@@ -33,10 +35,10 @@ enum class ThreadsTableFields{
     Type
 };
 
-class ThreadsTable : public Table<ThreadsTableRow,ThreadsTableFields> {
-public:
-
-    ThreadsTable(Database* db);
+class ThreadsTable : public Table<ThreadsTableRow, ThreadsTableFields>
+{
+  public:
+    ThreadsTable(Database *db);
     virtual ~ThreadsTable();
 
     bool Create() override final;
@@ -44,33 +46,34 @@ public:
     bool RemoveByID(uint32_t id) override final;
     bool Update(ThreadsTableRow entry) override final;
     ThreadsTableRow GetByID(uint32_t id) override final;
-    std::vector<ThreadsTableRow> GetLimitOffset(uint32_t offset,uint32_t limit) override final;
-    std::vector<ThreadsTableRow> GetLimitOffsetByField(uint32_t offset,uint32_t limit,ThreadsTableFields field,const char* str) override final;
+    std::vector<ThreadsTableRow> GetLimitOffset(uint32_t offset, uint32_t limit) override final;
+    std::vector<ThreadsTableRow> GetLimitOffsetByField(uint32_t offset,
+                                                       uint32_t limit,
+                                                       ThreadsTableFields field,
+                                                       const char *str) override final;
 
     uint32_t GetCount() override final;
-    uint32_t GetCountByFieldID(const char* field,uint32_t id) override final;
+    uint32_t GetCountByFieldID(const char *field, uint32_t id) override final;
     ThreadsTableRow getByContact(uint32_t contact_id);
 
   private:
-    const char* createTableQuery =
-            "CREATE TABLE IF NOT EXISTS threads("
-            "_id INTEGER PRIMARY KEY,"
-            "date INTEGER,"
-            "msg_count INTEGER,"
-            "read INTEGER,"
-            "contact_id INTEGER,"
-            "snippet TEXT NOT NULL,"
-            "last_dir INTEGER"
-            ");";
+    const char *createTableQuery = "CREATE TABLE IF NOT EXISTS threads("
+                                   "_id INTEGER PRIMARY KEY,"
+                                   "date INTEGER,"
+                                   "msg_count INTEGER,"
+                                   "read INTEGER,"
+                                   "contact_id INTEGER,"
+                                   "snippet TEXT NOT NULL,"
+                                   "last_dir INTEGER"
+                                   ");";
 
-    const char* createTableThreadsCounterQuery =
-            "CREATE TABLE IF NOT EXISTS threads_count "
-            "(_id INTEGER PRIMARY KEY,"
-            "count INTEGER );";
-
-    const char* threadsCounterInsertionQuery = "INSERT OR IGNORE INTO threads_count ( _id, count ) VALUES (1,0);";
-    const char* threadInsertTriggerQuery = "CREATE TRIGGER IF NOT EXISTS on_thread_insert AFTER INSERT ON threads BEGIN UPDATE threads_count SET count=count+1 WHERE _id=1; END";
-    const char* threadRemoveTriggerQuery = "CREATE TRIGGER IF NOT EXISTS on_thread_remove AFTER DELETE ON threads BEGIN UPDATE threads_count SET count=count-1 WHERE _id=1; END";
+    const char *createTableThreadsCounterQuery = "CREATE TABLE IF NOT EXISTS threads_count "
+                                                 "(_id INTEGER PRIMARY KEY,"
+                                                 "count INTEGER );";
 
+    const char *threadsCounterInsertionQuery = "INSERT OR IGNORE INTO threads_count ( _id, count ) VALUES (1,0);";
+    const char *threadInsertTriggerQuery     = "CREATE TRIGGER IF NOT EXISTS on_thread_insert AFTER INSERT ON threads "
+                                           "BEGIN UPDATE threads_count SET count=count+1 WHERE _id=1; END";
+    const char *threadRemoveTriggerQuery = "CREATE TRIGGER IF NOT EXISTS on_thread_remove AFTER DELETE ON threads "
+                                           "BEGIN UPDATE threads_count SET count=count-1 WHERE _id=1; END";
 };
-
diff --git a/module-db/tests/AlarmsRecord_tests.cpp b/module-db/tests/AlarmsRecord_tests.cpp
index 0d38a1d34..3edbfd5f7 100644
--- a/module-db/tests/AlarmsRecord_tests.cpp
+++ b/module-db/tests/AlarmsRecord_tests.cpp
@@ -21,37 +21,32 @@
 #include "../Databases/AlarmsDB.hpp"
 #include "../Interface/AlarmsRecord.hpp"
 
-
 TEST_CASE("Alarms Record tests")
 {
-	Database::Initialize();
+    Database::Initialize();
 
-	vfs.remove(AlarmsDB::GetDBName());
+    vfs.remove(AlarmsDB::GetDBName());
 
-	auto alarmsDB = std::make_unique<AlarmsDB>();
+    auto alarmsDB = std::make_unique<AlarmsDB>();
 
-	AlarmsRecordInterface alarmsRecordInterface(alarmsDB.get());
+    AlarmsRecordInterface alarmsRecordInterface(alarmsDB.get());
 
-	auto alarmsRecord = alarmsRecordInterface.GetByID(1);
+    auto alarmsRecord = alarmsRecordInterface.GetByID(1);
 
-	REQUIRE(alarmsRecord.ID == 1 );
-	REQUIRE(alarmsRecord.time == 0 );
-	REQUIRE(alarmsRecord.snooze == 0 );
-	REQUIRE(alarmsRecord.status == 0 );
-	REQUIRE(alarmsRecord.path == "" );
+    REQUIRE(alarmsRecord.ID == 1);
+    REQUIRE(alarmsRecord.time == 0);
+    REQUIRE(alarmsRecord.snooze == 0);
+    REQUIRE(alarmsRecord.status == 0);
+    REQUIRE(alarmsRecord.path == "");
 
-	alarmsRecord.time = 1234;
-	alarmsRecord.path = "awesome.mp3";
-	REQUIRE(alarmsRecordInterface.Update(alarmsRecord));
+    alarmsRecord.time = 1234;
+    alarmsRecord.path = "awesome.mp3";
+    REQUIRE(alarmsRecordInterface.Update(alarmsRecord));
 
-	alarmsRecord = alarmsRecordInterface.GetByID(1);
+    alarmsRecord = alarmsRecordInterface.GetByID(1);
 
-	REQUIRE(alarmsRecord.time == 1234);
-	REQUIRE(alarmsRecord.path == "awesome.mp3");
+    REQUIRE(alarmsRecord.time == 1234);
+    REQUIRE(alarmsRecord.path == "awesome.mp3");
 
-	Database::Deinitialize();
+    Database::Deinitialize();
 }
-
-
-
-
diff --git a/module-db/tests/AlarmsTable_tests.cpp b/module-db/tests/AlarmsTable_tests.cpp
index 428c20304..e19236fb0 100644
--- a/module-db/tests/AlarmsTable_tests.cpp
+++ b/module-db/tests/AlarmsTable_tests.cpp
@@ -22,104 +22,100 @@
 
 TEST_CASE("Alarms Table tests")
 {
-	Database::Initialize();
+    Database::Initialize();
 
-	vfs.remove(AlarmsDB::GetDBName());
+    vfs.remove(AlarmsDB::GetDBName());
 
-	AlarmsDB alarmsDb;
+    AlarmsDB alarmsDb;
 
-	auto alarmsRow = alarmsDb.alarms.GetByID(1);
-	REQUIRE(alarmsRow.ID == 1);
+    auto alarmsRow = alarmsDb.alarms.GetByID(1);
+    REQUIRE(alarmsRow.ID == 1);
 
-	alarmsRow.time = 1234;
-	alarmsRow.snooze = 2345;
-	alarmsRow.status = 1;
-	alarmsRow.path = "awesome.jp2";
+    alarmsRow.time   = 1234;
+    alarmsRow.snooze = 2345;
+    alarmsRow.status = 1;
+    alarmsRow.path   = "awesome.jp2";
 
-	REQUIRE(alarmsDb.alarms.Update(alarmsRow));
+    REQUIRE(alarmsDb.alarms.Update(alarmsRow));
 
-	auto alarmsRow2 = alarmsDb.alarms.GetByID(1);
+    auto alarmsRow2 = alarmsDb.alarms.GetByID(1);
 
-	REQUIRE(alarmsRow2.time == 1234);
-	REQUIRE(alarmsRow2.snooze == 2345);
-	REQUIRE(alarmsRow2.status == 1);
-	REQUIRE(alarmsRow2.path == "awesome.jp2");
+    REQUIRE(alarmsRow2.time == 1234);
+    REQUIRE(alarmsRow2.snooze == 2345);
+    REQUIRE(alarmsRow2.status == 1);
+    REQUIRE(alarmsRow2.path == "awesome.jp2");
 
-	// Add 3 elements into table
-	REQUIRE(alarmsDb.alarms.Add(alarmsRow));
-	REQUIRE(alarmsDb.alarms.Add(alarmsRow));
-	REQUIRE(alarmsDb.alarms.Add(alarmsRow));
+    // Add 3 elements into table
+    REQUIRE(alarmsDb.alarms.Add(alarmsRow));
+    REQUIRE(alarmsDb.alarms.Add(alarmsRow));
+    REQUIRE(alarmsDb.alarms.Add(alarmsRow));
 
-	// Table should have 4 elements
-	REQUIRE(alarmsDb.alarms.GetCount() == 4);
+    // Table should have 4 elements
+    REQUIRE(alarmsDb.alarms.GetCount() == 4);
 
-	 // Update existing element in table
-	alarmsRow.ID = 4;
-	alarmsRow.path = "updated";
-	REQUIRE(alarmsDb.alarms.Update(alarmsRow));
+    // Update existing element in table
+    alarmsRow.ID   = 4;
+    alarmsRow.path = "updated";
+    REQUIRE(alarmsDb.alarms.Update(alarmsRow));
 
     // Get table row using valid ID & check if it was updated
-	auto alarm = alarmsDb.alarms.GetByID(4);
-	REQUIRE( alarm.path == alarmsRow.path);
+    auto alarm = alarmsDb.alarms.GetByID(4);
+    REQUIRE(alarm.path == alarmsRow.path);
 
-	// Get table row using invalid ID(should return empty alarmsDb.alarmsRow)
-	auto alarmFailed = alarmsDb.alarms.GetByID(100);
-	REQUIRE( alarmFailed.path == "" );
+    // Get table row using invalid ID(should return empty alarmsDb.alarmsRow)
+    auto alarmFailed = alarmsDb.alarms.GetByID(100);
+    REQUIRE(alarmFailed.path == "");
 
-	// Get table rows using valid offset/limit parameters
-	auto retOffsetLimit = alarmsDb.alarms.GetLimitOffset(0,4);
-	REQUIRE(retOffsetLimit.size() == 4);
+    // Get table rows using valid offset/limit parameters
+    auto retOffsetLimit = alarmsDb.alarms.GetLimitOffset(0, 4);
+    REQUIRE(retOffsetLimit.size() == 4);
 
-	// Get table rows using valid offset/limit parameters and specific field's ID
-	REQUIRE(alarmsDb.alarms.GetLimitOffsetByField(0,4,AlarmsTableFields::Status, "1").size() == 4);
+    // Get table rows using valid offset/limit parameters and specific field's ID
+    REQUIRE(alarmsDb.alarms.GetLimitOffsetByField(0, 4, AlarmsTableFields::Status, "1").size() == 4);
 
-	// Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-	auto retOffsetLimitBigger = alarmsDb.alarms.GetLimitOffset(0,100);
-	REQUIRE(retOffsetLimitBigger.size() == 4);
+    // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
+    auto retOffsetLimitBigger = alarmsDb.alarms.GetLimitOffset(0, 100);
+    REQUIRE(retOffsetLimitBigger.size() == 4);
 
-	// Get table rows using invalid offset/limit parameters(should return empty object)
-	auto retOffsetLimitFailed = alarmsDb.alarms.GetLimitOffset(5,4);
-	REQUIRE(retOffsetLimitFailed.size() == 0);
+    // Get table rows using invalid offset/limit parameters(should return empty object)
+    auto retOffsetLimitFailed = alarmsDb.alarms.GetLimitOffset(5, 4);
+    REQUIRE(retOffsetLimitFailed.size() == 0);
 
-	// Get count of elements by field's ID
-	REQUIRE(alarmsDb.alarms.GetCountByFieldID("status", 1) == 4);
+    // Get count of elements by field's ID
+    REQUIRE(alarmsDb.alarms.GetCountByFieldID("status", 1) == 4);
 
-	// Get count of elements by invalid field's ID
-	REQUIRE(alarmsDb.alarms.GetCountByFieldID("invalid_field", 0) == 0);
+    // Get count of elements by invalid field's ID
+    REQUIRE(alarmsDb.alarms.GetCountByFieldID("invalid_field", 0) == 0);
 
-	// Update existing element in table
-	alarmsRow.ID = 4;
-	alarmsRow.path = "updated";
-	alarmsRow.time = 2222;
-	REQUIRE(alarmsDb.alarms.Update(alarmsRow));
+    // Update existing element in table
+    alarmsRow.ID   = 4;
+    alarmsRow.path = "updated";
+    alarmsRow.time = 2222;
+    REQUIRE(alarmsDb.alarms.Update(alarmsRow));
 
-	// Get record by time
-	auto alarmByTime = alarmsDb.alarms.GetNext(2000);
+    // Get record by time
+    auto alarmByTime = alarmsDb.alarms.GetNext(2000);
 
-	REQUIRE(alarmByTime.ID == 4);
-	REQUIRE(alarmByTime.time == 2222);
+    REQUIRE(alarmByTime.ID == 4);
+    REQUIRE(alarmByTime.time == 2222);
 
-	// Table should have now 3 elements
-	REQUIRE(alarmsDb.alarms.RemoveByID(3));
+    // Table should have now 3 elements
+    REQUIRE(alarmsDb.alarms.RemoveByID(3));
 
-	REQUIRE(alarmsDb.alarms.GetCount() == 3);
+    REQUIRE(alarmsDb.alarms.GetCount() == 3);
 
-	// Remove non existing element
-	REQUIRE(alarmsDb.alarms.RemoveByID(13));
+    // Remove non existing element
+    REQUIRE(alarmsDb.alarms.RemoveByID(13));
 
-	REQUIRE(alarmsDb.alarms.GetCount() == 3);
+    REQUIRE(alarmsDb.alarms.GetCount() == 3);
 
-	// Remove all elements from table
-	REQUIRE(alarmsDb.alarms.RemoveByID(1));
-	REQUIRE(alarmsDb.alarms.RemoveByID(2));
-	REQUIRE(alarmsDb.alarms.RemoveByID(4));
+    // Remove all elements from table
+    REQUIRE(alarmsDb.alarms.RemoveByID(1));
+    REQUIRE(alarmsDb.alarms.RemoveByID(2));
+    REQUIRE(alarmsDb.alarms.RemoveByID(4));
 
-	// Table should be empty now
-	REQUIRE(alarmsDb.alarms.GetCount() == 0);
-
-	Database::Deinitialize();
+    // Table should be empty now
+    REQUIRE(alarmsDb.alarms.GetCount() == 0);
 
+    Database::Deinitialize();
 }
-
-
-
diff --git a/module-db/tests/ContactsAddressTable_tests.cpp b/module-db/tests/ContactsAddressTable_tests.cpp
index a3a9b8979..5fa7d6a64 100644
--- a/module-db/tests/ContactsAddressTable_tests.cpp
+++ b/module-db/tests/ContactsAddressTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -23,7 +22,6 @@
 #include "../Database/Database.hpp"
 #include "../Databases/ContactsDB.hpp"
 
-
 TEST_CASE("Contacts Address Table tests")
 {
     Database::Initialize();
@@ -32,16 +30,15 @@ TEST_CASE("Contacts Address Table tests")
 
     ContactsDB contactsdb;
 
-    ContactsAddressTableRow testRow1 = {.ID=0,
-            .contactID=0,
-            .country="Poland",
-            .city="Warsaw",
-            .street="Czeczota",
-            .number="9",
-            .type=ContactAddressType ::WORK,
-            .note = "Test note",
-            .mail="test@mudita.com"
-    };
+    ContactsAddressTableRow testRow1 = {.ID        = 0,
+                                        .contactID = 0,
+                                        .country   = "Poland",
+                                        .city      = "Warsaw",
+                                        .street    = "Czeczota",
+                                        .number    = "9",
+                                        .type      = ContactAddressType ::WORK,
+                                        .note      = "Test note",
+                                        .mail      = "test@mudita.com"};
 
     // Add 4 elements into table
     REQUIRE(contactsdb.address.Add(testRow1));
@@ -53,7 +50,7 @@ TEST_CASE("Contacts Address Table tests")
     REQUIRE(contactsdb.address.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID   = 4;
     testRow1.note = "Modified test note";
     REQUIRE(contactsdb.address.Update(testRow1));
 
@@ -63,29 +60,28 @@ TEST_CASE("Contacts Address Table tests")
 
     // Get table row using invalid ID(should return empty contactsdb.addressRow)
     auto smsFailed = contactsdb.address.GetByID(100);
-    REQUIRE(smsFailed.note  == "");
+    REQUIRE(smsFailed.note == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = contactsdb.address.GetLimitOffset(0,4);
+    auto retOffsetLimit = contactsdb.address.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(contactsdb.address.GetLimitOffsetByField(0,4,ContactAddressTableFields::Number,"9").size() == 4);
+    REQUIRE(contactsdb.address.GetLimitOffsetByField(0, 4, ContactAddressTableFields::Number, "9").size() == 4);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = contactsdb.address.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = contactsdb.address.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = contactsdb.address.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = contactsdb.address.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(contactsdb.address.GetCountByFieldID("contact_id",0) == 4);
+    REQUIRE(contactsdb.address.GetCountByFieldID("contact_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(contactsdb.address.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(contactsdb.address.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(contactsdb.address.RemoveByID(2));
 
diff --git a/module-db/tests/ContactsNameTable_tests.cpp b/module-db/tests/ContactsNameTable_tests.cpp
index 5a56761ef..76b41e545 100644
--- a/module-db/tests/ContactsNameTable_tests.cpp
+++ b/module-db/tests/ContactsNameTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -23,7 +22,6 @@
 #include "../Database/Database.hpp"
 #include "../Databases/ContactsDB.hpp"
 
-
 TEST_CASE("Contacts Name Table tests")
 {
     Database::Initialize();
@@ -32,11 +30,7 @@ TEST_CASE("Contacts Name Table tests")
 
     ContactsDB contactsdb;
 
-    ContactsNameTableRow testRow1 = {.ID=0,
-            .contactID=0,
-            .namePrimary="Mateusz",
-            .nameAlternative="Pati"
-    };
+    ContactsNameTableRow testRow1 = {.ID = 0, .contactID = 0, .namePrimary = "Mateusz", .nameAlternative = "Pati"};
 
     // Add 4 elements into table
     REQUIRE(contactsdb.name.Add(testRow1));
@@ -48,7 +42,7 @@ TEST_CASE("Contacts Name Table tests")
     REQUIRE(contactsdb.name.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID              = 4;
     testRow1.nameAlternative = "Pateusz";
     REQUIRE(contactsdb.name.Update(testRow1));
 
@@ -58,29 +52,28 @@ TEST_CASE("Contacts Name Table tests")
 
     // Get table row using invalid ID(should return empty contactsdb.nameRow)
     auto smsFailed = contactsdb.name.GetByID(100);
-    REQUIRE(smsFailed.nameAlternative  == "");
+    REQUIRE(smsFailed.nameAlternative == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = contactsdb.name.GetLimitOffset(0,4);
+    auto retOffsetLimit = contactsdb.name.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(contactsdb.name.GetLimitOffsetByField(0,4,ContactNameTableFields::NamePrimary,"Mateusz").size() == 4);
+    REQUIRE(contactsdb.name.GetLimitOffsetByField(0, 4, ContactNameTableFields::NamePrimary, "Mateusz").size() == 4);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = contactsdb.name.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = contactsdb.name.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = contactsdb.name.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = contactsdb.name.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(contactsdb.name.GetCountByFieldID("contact_id",0) == 4);
+    REQUIRE(contactsdb.name.GetCountByFieldID("contact_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(contactsdb.name.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(contactsdb.name.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(contactsdb.name.RemoveByID(2));
 
diff --git a/module-db/tests/ContactsNumberTable_tests.cpp b/module-db/tests/ContactsNumberTable_tests.cpp
index ebf98a385..42dfc4a91 100644
--- a/module-db/tests/ContactsNumberTable_tests.cpp
+++ b/module-db/tests/ContactsNumberTable_tests.cpp
@@ -30,11 +30,7 @@ TEST_CASE("Contacts Number Table tests")
 
     ContactsDB contactsdb;
 
-    ContactsNumberTableRow testRow1 = {.ID=0,
-            .contactID=0,
-            .numberUser="111222333",
-            .numbere164="333222111"
-    };
+    ContactsNumberTableRow testRow1 = {.ID = 0, .contactID = 0, .numberUser = "111222333", .numbere164 = "333222111"};
 
     // Add 4 elements into table
     REQUIRE(contactsdb.number.Add(testRow1));
@@ -46,7 +42,7 @@ TEST_CASE("Contacts Number Table tests")
     REQUIRE(contactsdb.number.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID         = 4;
     testRow1.numberUser = "999888777";
     REQUIRE(contactsdb.number.Update(testRow1));
 
@@ -56,30 +52,29 @@ TEST_CASE("Contacts Number Table tests")
 
     // Get table row using invalid ID(should return empty contactsdb.numberRow)
     auto smsFailed = contactsdb.number.GetByID(100);
-    REQUIRE(smsFailed.numberUser  == "");
+    REQUIRE(smsFailed.numberUser == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = contactsdb.number.GetLimitOffset(0,4);
+    auto retOffsetLimit = contactsdb.number.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(contactsdb.number.GetLimitOffsetByField(0,4,ContactNumberTableFields::NumberE164,"333222111").size() == 4);
-
+    REQUIRE(contactsdb.number.GetLimitOffsetByField(0, 4, ContactNumberTableFields::NumberE164, "333222111").size() ==
+            4);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = contactsdb.number.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = contactsdb.number.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = contactsdb.number.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = contactsdb.number.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(contactsdb.number.GetCountByFieldID("contact_id",0) == 4);
+    REQUIRE(contactsdb.number.GetCountByFieldID("contact_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(contactsdb.number.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(contactsdb.number.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(contactsdb.number.RemoveByID(2));
 
diff --git a/module-db/tests/ContactsRecord_tests.cpp b/module-db/tests/ContactsRecord_tests.cpp
index 3a7474fa0..539078267 100644
--- a/module-db/tests/ContactsRecord_tests.cpp
+++ b/module-db/tests/ContactsRecord_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -24,7 +23,6 @@
 #include "../Interface/ContactRecord.hpp"
 #include "../Databases/ContactsDB.hpp"
 
-
 TEST_CASE("Contact Record tests")
 {
     Database::Initialize();
@@ -33,44 +31,41 @@ TEST_CASE("Contact Record tests")
 
     auto contactDB = std::make_unique<ContactsDB>();
 
-    const char* primaryNameTest = "PrimaryNameTest";
-    const char* alternativeNameTest = "AlternativeNameTest";
-    const char* numberUserTest = "111222333";
-    const char* numberE164Test = "333222111";
-    const char* countryTest = "Poland";
-    const char* cityTest = "Warsaw";
-    const char* streetTest = "Czeczota";
-    const char* numberTest = "7/9";
-    const char* noteTest = "TestNote";
-    const char* mailTest = "TestMail";
-    const char* assetPath = "/Test/Path/To/Asset";
-    const uint8_t speeddialTest = 100;
-    const ContactAddressType addressTypeTest = ContactAddressType ::WORK;
-    const ContactType contactTypeTest = ContactType ::USER;
+    const char *primaryNameTest                   = "PrimaryNameTest";
+    const char *alternativeNameTest               = "AlternativeNameTest";
+    const char *numberUserTest                    = "111222333";
+    const char *numberE164Test                    = "333222111";
+    const char *countryTest                       = "Poland";
+    const char *cityTest                          = "Warsaw";
+    const char *streetTest                        = "Czeczota";
+    const char *numberTest                        = "7/9";
+    const char *noteTest                          = "TestNote";
+    const char *mailTest                          = "TestMail";
+    const char *assetPath                         = "/Test/Path/To/Asset";
+    const uint8_t speeddialTest                   = 100;
+    const ContactAddressType addressTypeTest      = ContactAddressType ::WORK;
+    const ContactType contactTypeTest             = ContactType ::USER;
     const ContactNumberType contactNumberTypeTest = ContactNumberType ::PAGER;
 
-
     ContactRecordInterface contRecInterface(contactDB.get());
 
     ContactRecord recordIN;
 
-    recordIN.primaryName=primaryNameTest;
-    recordIN.alternativeName= alternativeNameTest;
-    recordIN.numbers = std::vector<ContactRecord::Number>({
-            ContactRecord::Number(numberUserTest, numberE164Test, contactNumberTypeTest),
-            });
-    recordIN.contactType=contactTypeTest;
-    recordIN.country=countryTest;
-    recordIN.city=cityTest;
-    recordIN.street=streetTest;
-    recordIN.number=numberTest;
-    recordIN.note=noteTest;
-    recordIN.mail=mailTest;
-    recordIN.addressType=addressTypeTest;
-    recordIN.assetPath=assetPath;
-    recordIN.speeddial=speeddialTest;
-
-
+    recordIN.primaryName     = primaryNameTest;
+    recordIN.alternativeName = alternativeNameTest;
+    recordIN.numbers         = std::vector<ContactRecord::Number>({
+        ContactRecord::Number(numberUserTest, numberE164Test, contactNumberTypeTest),
+    });
+    recordIN.contactType     = contactTypeTest;
+    recordIN.country         = countryTest;
+    recordIN.city            = cityTest;
+    recordIN.street          = streetTest;
+    recordIN.number          = numberTest;
+    recordIN.note            = noteTest;
+    recordIN.mail            = mailTest;
+    recordIN.addressType     = addressTypeTest;
+    recordIN.assetPath       = assetPath;
+    recordIN.speeddial       = speeddialTest;
 
     REQUIRE(contRecInterface.Add(recordIN) == true);
     REQUIRE(contRecInterface.Add(recordIN) == true);
@@ -99,18 +94,16 @@ TEST_CASE("Contact Record tests")
         REQUIRE(recordOUT.addressType == addressTypeTest);
         REQUIRE(recordOUT.assetPath == assetPath);
         REQUIRE(recordOUT.speeddial == speeddialTest);
-
     }
 
     REQUIRE(contRecInterface.RemoveByID(5) == true);
 
-
     {
-        auto recordList = contRecInterface.GetLimitOffset(0,4);
+        auto recordList = contRecInterface.GetLimitOffset(0, 4);
         REQUIRE(recordList->size() == 4);
 
-        uint32_t  cnt = 1;
-        for(const auto w: *recordList){
+        uint32_t cnt = 1;
+        for (const auto w : *recordList) {
 
             REQUIRE(w.dbID == cnt++);
 
@@ -130,17 +123,15 @@ TEST_CASE("Contact Record tests")
             REQUIRE(w.assetPath == assetPath);
             REQUIRE(w.speeddial == speeddialTest);
         }
-
-
-
     }
 
     {
-        auto recordList = contRecInterface.GetLimitOffsetByField(0,4,ContactRecordField::PrimaryName,primaryNameTest);
+        auto recordList =
+            contRecInterface.GetLimitOffsetByField(0, 4, ContactRecordField::PrimaryName, primaryNameTest);
         REQUIRE(recordList->size() == 4);
 
-        uint32_t  cnt = 1;
-        for(const auto w: *recordList){
+        uint32_t cnt = 1;
+        for (const auto w : *recordList) {
 
             REQUIRE(w.dbID == cnt++);
 
@@ -160,46 +151,34 @@ TEST_CASE("Contact Record tests")
             REQUIRE(w.assetPath == assetPath);
             REQUIRE(w.speeddial == speeddialTest);
         }
-
-
-
     }
 
     {
-    auto recordList = contRecInterface.GetLimitOffsetByField(0,2,ContactRecordField::NumberE164,numberE164Test);
-    REQUIRE(recordList->size() == 2);
+        auto recordList = contRecInterface.GetLimitOffsetByField(0, 2, ContactRecordField::NumberE164, numberE164Test);
+        REQUIRE(recordList->size() == 2);
 
-    uint32_t  cnt = 1;
-    for(const auto w: *recordList){
+        uint32_t cnt = 1;
+        for (const auto w : *recordList) {
 
-        REQUIRE(w.dbID == cnt++);
+            REQUIRE(w.dbID == cnt++);
 
-        REQUIRE(w.primaryName == primaryNameTest);
-        REQUIRE(w.alternativeName == alternativeNameTest);
-        REQUIRE(w.numbers[0].numberUser == numberUserTest);
-        REQUIRE(w.numbers[0].numberE164 == numberE164Test);
-        REQUIRE(w.numbers[0].numberType == contactNumberTypeTest);
-        REQUIRE(w.contactType == contactTypeTest);
-        REQUIRE(w.country == countryTest);
-        REQUIRE(w.city == cityTest);
-        REQUIRE(w.street == streetTest);
-        REQUIRE(w.number == numberTest);
-        REQUIRE(w.note == noteTest);
-        REQUIRE(w.mail == mailTest);
-        REQUIRE(w.addressType == addressTypeTest);
-        REQUIRE(w.assetPath == assetPath);
-        REQUIRE(w.speeddial == speeddialTest);
+            REQUIRE(w.primaryName == primaryNameTest);
+            REQUIRE(w.alternativeName == alternativeNameTest);
+            REQUIRE(w.numbers[0].numberUser == numberUserTest);
+            REQUIRE(w.numbers[0].numberE164 == numberE164Test);
+            REQUIRE(w.numbers[0].numberType == contactNumberTypeTest);
+            REQUIRE(w.contactType == contactTypeTest);
+            REQUIRE(w.country == countryTest);
+            REQUIRE(w.city == cityTest);
+            REQUIRE(w.street == streetTest);
+            REQUIRE(w.number == numberTest);
+            REQUIRE(w.note == noteTest);
+            REQUIRE(w.mail == mailTest);
+            REQUIRE(w.addressType == addressTypeTest);
+            REQUIRE(w.assetPath == assetPath);
+            REQUIRE(w.speeddial == speeddialTest);
+        }
     }
 
-
-
-    }
-
-
-
-
-
-
-
     Database::Deinitialize();
 }
diff --git a/module-db/tests/ContactsRingtonesTable_tests.cpp b/module-db/tests/ContactsRingtonesTable_tests.cpp
index 60feb77b9..705412584 100644
--- a/module-db/tests/ContactsRingtonesTable_tests.cpp
+++ b/module-db/tests/ContactsRingtonesTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -31,10 +30,7 @@ TEST_CASE("Contacts Ringtones Table tests")
 
     ContactsDB contactsdb;
 
-    ContactsRingtonesTableRow testRow1 = {.ID=0,
-            .contactID=0,
-            .assetPath="/test/assets/path/ringtone.wr"
-    };
+    ContactsRingtonesTableRow testRow1 = {.ID = 0, .contactID = 0, .assetPath = "/test/assets/path/ringtone.wr"};
 
     // Add 4 elements into table
     REQUIRE(contactsdb.ringtones.Add(testRow1));
@@ -46,7 +42,7 @@ TEST_CASE("Contacts Ringtones Table tests")
     REQUIRE(contactsdb.ringtones.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID        = 4;
     testRow1.assetPath = "/testnew/assets/path/ringtone2.wr";
     REQUIRE(contactsdb.ringtones.Update(testRow1));
 
@@ -56,30 +52,30 @@ TEST_CASE("Contacts Ringtones Table tests")
 
     // Get table row using invalid ID(should return empty contactsdb.ringtonesRow)
     auto smsFailed = contactsdb.ringtones.GetByID(100);
-    REQUIRE(smsFailed.assetPath  == "");
+    REQUIRE(smsFailed.assetPath == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = contactsdb.ringtones.GetLimitOffset(0,4);
+    auto retOffsetLimit = contactsdb.ringtones.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(contactsdb.ringtones.GetLimitOffsetByField(0,4,ContactRingtonesTableFields::AssetPath,"/test/assets/path/ringtone.wr").size() == 3);
-
+    REQUIRE(contactsdb.ringtones
+                .GetLimitOffsetByField(0, 4, ContactRingtonesTableFields::AssetPath, "/test/assets/path/ringtone.wr")
+                .size() == 3);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = contactsdb.ringtones.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = contactsdb.ringtones.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = contactsdb.ringtones.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = contactsdb.ringtones.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(contactsdb.ringtones.GetCountByFieldID("contact_id",0) == 4);
+    REQUIRE(contactsdb.ringtones.GetCountByFieldID("contact_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(contactsdb.ringtones.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(contactsdb.ringtones.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(contactsdb.ringtones.RemoveByID(2));
 
diff --git a/module-db/tests/ContactsTable_tests.cpp b/module-db/tests/ContactsTable_tests.cpp
index 13420869e..9a3c5fbd2 100644
--- a/module-db/tests/ContactsTable_tests.cpp
+++ b/module-db/tests/ContactsTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -33,15 +32,15 @@ TEST_CASE("Contacts Table tests")
 
     ContactsDB contactsdb;
 
-    ContactsTableRow testRow1 = {.ID=0,
-            .nameID=0,
-            .numbersID="0 1 2 3 4",
-            .ringID=0,
-            .addressIDs="5 6 7 8",
-            .isOnWhitelist=true,
-            .isOnBlacklist=true,
-            .isOnFavourites=false,
-            .speedDial = 666
+    ContactsTableRow testRow1 = {.ID             = 0,
+                                 .nameID         = 0,
+                                 .numbersID      = "0 1 2 3 4",
+                                 .ringID         = 0,
+                                 .addressIDs     = "5 6 7 8",
+                                 .isOnWhitelist  = true,
+                                 .isOnBlacklist  = true,
+                                 .isOnFavourites = false,
+                                 .speedDial      = 666
 
     };
 
@@ -55,7 +54,7 @@ TEST_CASE("Contacts Table tests")
     REQUIRE(contactsdb.contacts.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID        = 4;
     testRow1.speedDial = 777;
     REQUIRE(contactsdb.contacts.Update(testRow1));
 
@@ -65,30 +64,28 @@ TEST_CASE("Contacts Table tests")
 
     // Get table row using invalid ID(should return empty contactsdb.contactsRow)
     auto smsFailed = contactsdb.contacts.GetByID(100);
-    REQUIRE(smsFailed.speedDial  == 0);
+    REQUIRE(smsFailed.speedDial == 0);
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = contactsdb.contacts.GetLimitOffset(0,4);
+    auto retOffsetLimit = contactsdb.contacts.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(contactsdb.contacts.GetLimitOffsetByField(0,4,ContactTableFields::SpeedDial,"666").size() == 3);
-
+    REQUIRE(contactsdb.contacts.GetLimitOffsetByField(0, 4, ContactTableFields::SpeedDial, "666").size() == 3);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = contactsdb.contacts.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = contactsdb.contacts.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = contactsdb.contacts.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = contactsdb.contacts.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(contactsdb.contacts.GetCountByFieldID("ring_id",0) == 4);
+    REQUIRE(contactsdb.contacts.GetCountByFieldID("ring_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(contactsdb.contacts.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(contactsdb.contacts.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(contactsdb.contacts.RemoveByID(2));
 
diff --git a/module-db/tests/SMSRecord_tests.cpp b/module-db/tests/SMSRecord_tests.cpp
index 97e544a63..978184ea4 100644
--- a/module-db/tests/SMSRecord_tests.cpp
+++ b/module-db/tests/SMSRecord_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -27,12 +26,12 @@
 #include "../Interface/SMSRecord.hpp"
 #include "../Interface/ThreadRecord.hpp"
 
-struct test{
+struct test
+{
     UTF8 test;
     UTF8 test2;
 };
 
-
 TEST_CASE("SMS Record tests")
 {
     Database::Initialize();
@@ -40,66 +39,61 @@ TEST_CASE("SMS Record tests")
     vfs.remove(ContactsDB::GetDBName());
     vfs.remove(SmsDB::GetDBName());
 
-    auto smsDB = std::make_unique<SmsDB>();
+    auto smsDB      = std::make_unique<SmsDB>();
     auto contactsDB = std::make_unique<ContactsDB>();
 
-
-    const uint32_t dateTest = 123456789;
-    const uint32_t dateSentTest = 987654321;
+    const uint32_t dateTest      = 123456789;
+    const uint32_t dateSentTest  = 987654321;
     const uint32_t errorCodeTest = 555;
-    const char *numberTest = "111222333";
-    const char *numberTest2 = "222333444";
-    const char *bodyTest = "Test SMS Body";
-    const char *bodyTest2 = "Test SMS Body2";
-    const bool isReadTest = true;
-    const SMSType typeTest = SMSType ::DRAFT;
+    const char *numberTest       = "111222333";
+    const char *numberTest2      = "222333444";
+    const char *bodyTest         = "Test SMS Body";
+    const char *bodyTest2        = "Test SMS Body2";
+    const bool isReadTest        = true;
+    const SMSType typeTest       = SMSType ::DRAFT;
 
-
-    SMSRecordInterface smsRecInterface(smsDB.get(),contactsDB.get());
+    SMSRecordInterface smsRecInterface(smsDB.get(), contactsDB.get());
 
     SMSRecord recordIN;
-    recordIN.date = dateTest;
-    recordIN.dateSent = dateSentTest;
+    recordIN.date      = dateTest;
+    recordIN.dateSent  = dateSentTest;
     recordIN.errorCode = errorCodeTest;
-    recordIN.number = numberTest;
-    recordIN.body = bodyTest;
-    recordIN.isRead = isReadTest;
-    recordIN.type = typeTest;
+    recordIN.number    = numberTest;
+    recordIN.body      = bodyTest;
+    recordIN.isRead    = isReadTest;
+    recordIN.type      = typeTest;
 
     // Add 2 records
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
 
     // Get all available records
-    auto records = smsRecInterface.GetLimitOffset(0,100);
+    auto records = smsRecInterface.GetLimitOffset(0, 100);
     REQUIRE((*records).size() == 2);
 
     // Check if fetched records contain valid data
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Get all available records by specified thread ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ThreadID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ThreadID, "1");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Get all available records by specified contact ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ContactID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ContactID, "1");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Remove records one by one
@@ -111,7 +105,7 @@ TEST_CASE("SMS Record tests")
 
     // Test updating record
     REQUIRE(smsRecInterface.Add(recordIN));
-    recordIN.dbID=1;
+    recordIN.dbID = 1;
     recordIN.body = bodyTest2;
     REQUIRE(smsRecInterface.Update(recordIN));
 
@@ -129,65 +123,61 @@ TEST_CASE("SMS Record tests")
 
     // Test fetching record by using Thread ID
     // Add records with different numbers, they should be placed in separate threads&contacts dbs
-    recordIN.body = bodyTest;
+    recordIN.body   = bodyTest;
     recordIN.number = numberTest;
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
 
-    recordIN.number =numberTest2;
+    recordIN.number = numberTest2;
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
 
     // Get all available records by specified thread ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ThreadID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ThreadID, "1");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Get all available records by specified thread ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ThreadID,"2");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ThreadID, "2");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest2);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Get all available records by specified contact ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ContactID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ContactID, "1");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Get all available records by specified contact ID and check for invalid data
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ContactID,"2");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ContactID, "2");
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.body == bodyTest);
         REQUIRE(w.number == numberTest2);
         REQUIRE(w.isRead == isReadTest);
-
     }
 
     // Remove sms records in order to check automatic management of threads and contact databases
-    ThreadRecordInterface threadRecordInterface(smsDB.get(),contactsDB.get());
+    ThreadRecordInterface threadRecordInterface(smsDB.get(), contactsDB.get());
     REQUIRE(smsRecInterface.RemoveByID(1));
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ContactID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ContactID, "1");
     REQUIRE((*records).size() == 1);
 
     REQUIRE(threadRecordInterface.GetCount() == 2);
 
     REQUIRE(smsRecInterface.RemoveByID(2));
-    records = smsRecInterface.GetLimitOffsetByField(0,100,SMSRecordField::ContactID,"1");
+    records = smsRecInterface.GetLimitOffsetByField(0, 100, SMSRecordField::ContactID, "1");
     REQUIRE((*records).size() == 0);
     REQUIRE(threadRecordInterface.GetCount() == 1);
 
@@ -201,18 +191,16 @@ TEST_CASE("SMS Record tests")
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
-    REQUIRE(smsRecInterface.RemoveByField(SMSRecordField::ThreadID,"1"));
-    REQUIRE(smsRecInterface.GetCount()==0);
+    REQUIRE(smsRecInterface.RemoveByField(SMSRecordField::ThreadID, "1"));
+    REQUIRE(smsRecInterface.GetCount() == 0);
 
     recordIN.number = numberTest;
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
     REQUIRE(smsRecInterface.Add(recordIN));
-    REQUIRE(smsRecInterface.RemoveByField(SMSRecordField::ContactID,"1"));
-    REQUIRE(smsRecInterface.GetCount()==0);
-
+    REQUIRE(smsRecInterface.RemoveByField(SMSRecordField::ContactID, "1"));
+    REQUIRE(smsRecInterface.GetCount() == 0);
 
     Database::Deinitialize();
-
 }
\ No newline at end of file
diff --git a/module-db/tests/SMSTable_tests.cpp b/module-db/tests/SMSTable_tests.cpp
index 67d7e9209..c678df18d 100644
--- a/module-db/tests/SMSTable_tests.cpp
+++ b/module-db/tests/SMSTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -33,15 +32,15 @@ TEST_CASE("SMS Table tests")
 
     SmsDB smsdb;
 
-    SMSTableRow testRow1 = {.ID=0,
-            .threadID=0,
-            .contactID=0,
-            .date=0,
-            .dateSent=0,
-            .errorCode=0,
-            .body="Test SMS message 1",
-            .isRead=true,
-            .type = SMSType ::INBOX
+    SMSTableRow testRow1 = {.ID        = 0,
+                            .threadID  = 0,
+                            .contactID = 0,
+                            .date      = 0,
+                            .dateSent  = 0,
+                            .errorCode = 0,
+                            .body      = "Test SMS message 1",
+                            .isRead    = true,
+                            .type      = SMSType ::INBOX
 
     };
 
@@ -55,7 +54,7 @@ TEST_CASE("SMS Table tests")
     REQUIRE(smsdb.sms.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID   = 4;
     testRow1.body = "Updated Test SMS message ";
     REQUIRE(smsdb.sms.Update(testRow1));
 
@@ -65,29 +64,28 @@ TEST_CASE("SMS Table tests")
 
     // Get table row using invalid ID(should return empty smsdb.smsRow)
     auto smsFailed = smsdb.sms.GetByID(100);
-    REQUIRE(smsFailed.body  == "");
+    REQUIRE(smsFailed.body == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = smsdb.sms.GetLimitOffset(0,4);
+    auto retOffsetLimit = smsdb.sms.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(smsdb.sms.GetLimitOffsetByField(0,4,SMSTableFields::Date,"0").size() == 4);
+    REQUIRE(smsdb.sms.GetLimitOffsetByField(0, 4, SMSTableFields::Date, "0").size() == 4);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = smsdb.sms.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = smsdb.sms.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = smsdb.sms.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = smsdb.sms.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get count of elements by field's ID
-    REQUIRE(smsdb.sms.GetCountByFieldID("thread_id",0) == 4);
+    REQUIRE(smsdb.sms.GetCountByFieldID("thread_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(smsdb.sms.GetCountByFieldID("invalid_field",0) == 0);
-
+    REQUIRE(smsdb.sms.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(smsdb.sms.RemoveByID(2));
 
diff --git a/module-db/tests/SettingsRecord_tests.cpp b/module-db/tests/SettingsRecord_tests.cpp
index 363e67d6f..18355db0a 100644
--- a/module-db/tests/SettingsRecord_tests.cpp
+++ b/module-db/tests/SettingsRecord_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -25,7 +24,6 @@
 #include "../Databases/SettingsDB.hpp"
 #include "../Interface/SettingsRecord.hpp"
 
-
 TEST_CASE("Settings Record tests")
 {
     Database::Initialize();
@@ -34,35 +32,32 @@ TEST_CASE("Settings Record tests")
 
     auto settingsDB = std::make_unique<SettingsDB>();
 
-
     SettingsRecordInterface settingsRecordInterface(settingsDB.get());
 
     auto settingsRecord = settingsRecordInterface.GetByID(1);
 
-    REQUIRE(settingsRecord.dbID == 1 );
-    REQUIRE(settingsRecord.timeFormat12 == 0 );
-    REQUIRE(settingsRecord.timeAuto == 1 );
-    REQUIRE(settingsRecord.brightnessAuto == 1 );
-    REQUIRE(settingsRecord.brightnessLevel == 0 );
-    REQUIRE(settingsRecord.fontSize == 0 );
+    REQUIRE(settingsRecord.dbID == 1);
+    REQUIRE(settingsRecord.timeFormat12 == 0);
+    REQUIRE(settingsRecord.timeAuto == 1);
+    REQUIRE(settingsRecord.brightnessAuto == 1);
+    REQUIRE(settingsRecord.brightnessLevel == 0);
+    REQUIRE(settingsRecord.fontSize == 0);
     REQUIRE(settingsRecord.pinMode == SettingsPinMode ::DAYS);
-    REQUIRE(settingsRecord.pinDaysLeft == 0 );
-    REQUIRE(settingsRecord.pin1 == "" );
-    REQUIRE(settingsRecord.pin2 == "" );
-    REQUIRE(settingsRecord.activeSIM == 1 );
-    REQUIRE(settingsRecord.networkOperator == "" );
-    REQUIRE(settingsRecord.lockPassHash == 0 );
+    REQUIRE(settingsRecord.pinDaysLeft == 0);
+    REQUIRE(settingsRecord.pin1 == "");
+    REQUIRE(settingsRecord.pin2 == "");
+    REQUIRE(settingsRecord.activeSIM == 1);
+    REQUIRE(settingsRecord.networkOperator == "");
+    REQUIRE(settingsRecord.lockPassHash == 0);
     REQUIRE(settingsRecord.language == SettingsLanguage ::ENGLISH);
 
     settingsRecord.networkOperator = "MuditaConnectingPeople";
-    settingsRecord.fontSize=10;
+    settingsRecord.fontSize        = 10;
     REQUIRE(settingsRecordInterface.Update(settingsRecord));
 
     settingsRecord = settingsRecordInterface.GetByID(1);
     REQUIRE(settingsRecord.networkOperator == "MuditaConnectingPeople");
     REQUIRE(settingsRecord.fontSize == 10);
 
-
     Database::Deinitialize();
-
 }
\ No newline at end of file
diff --git a/module-db/tests/SettingsTable_tests.cpp b/module-db/tests/SettingsTable_tests.cpp
index 314a23252..392400acc 100644
--- a/module-db/tests/SettingsTable_tests.cpp
+++ b/module-db/tests/SettingsTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -38,11 +37,11 @@ TEST_CASE("Settings Table tests")
         auto settingsRow = settingsDb.settings.GetByID(1);
         REQUIRE(settingsRow.ID == 1);
 
-        settingsRow.timeFormat12 = false;
+        settingsRow.timeFormat12   = false;
         settingsRow.timeDateFormat = false;
-        settingsRow.pin1 = "4321";
-        settingsRow.pin2 = "5432";
-        settingsRow.language = SettingsLanguage ::POLISH;
+        settingsRow.pin1           = "4321";
+        settingsRow.pin2           = "5432";
+        settingsRow.language       = SettingsLanguage ::POLISH;
         REQUIRE(settingsDb.settings.Update(settingsRow));
 
         settingsRow = settingsDb.settings.GetByID(1);
@@ -66,7 +65,5 @@ TEST_CASE("Settings Table tests")
         REQUIRE(settingsRow.language == SettingsLanguage ::POLISH);
     }
 
-
-
     Database::Deinitialize();
 }
diff --git a/module-db/tests/ThreadRecord_tests.cpp b/module-db/tests/ThreadRecord_tests.cpp
index 0820a564e..53d09b540 100644
--- a/module-db/tests/ThreadRecord_tests.cpp
+++ b/module-db/tests/ThreadRecord_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -27,7 +26,6 @@
 #include "../Interface/SMSRecord.hpp"
 #include "../Interface/ThreadRecord.hpp"
 
-
 TEST_CASE("Thread Record tests")
 {
     Database::Initialize();
@@ -35,22 +33,21 @@ TEST_CASE("Thread Record tests")
     vfs.remove(ContactsDB::GetDBName());
     vfs.remove(SmsDB::GetDBName());
 
-    auto smsDB = std::make_unique<SmsDB>();
+    auto smsDB      = std::make_unique<SmsDB>();
     auto contactsDB = std::make_unique<ContactsDB>();
 
-    const uint32_t dateTest = 123456789;
-    const char *snippetTest = "Test snippet";
-    const char *snippetTest2 = "Test snippet2";
-    const SMSType typeTest = SMSType ::ALL;
+    const uint32_t dateTest      = 123456789;
+    const char *snippetTest      = "Test snippet";
+    const char *snippetTest2     = "Test snippet2";
+    const SMSType typeTest       = SMSType ::ALL;
     const uint32_t contactIDTest = 100;
 
-
-    ThreadRecordInterface threadRecordInterface1(smsDB.get(),contactsDB.get());
+    ThreadRecordInterface threadRecordInterface1(smsDB.get(), contactsDB.get());
 
     ThreadRecord recordIN;
-    recordIN.date = dateTest;
-    recordIN.snippet = snippetTest;
-    recordIN.type = typeTest;
+    recordIN.date      = dateTest;
+    recordIN.snippet   = snippetTest;
+    recordIN.type      = typeTest;
     recordIN.contactID = contactIDTest;
 
     // Add 2 records
@@ -58,27 +55,26 @@ TEST_CASE("Thread Record tests")
     REQUIRE(threadRecordInterface1.Add(recordIN));
 
     // Get all available records
-    auto records = threadRecordInterface1.GetLimitOffset(0,100);
+    auto records = threadRecordInterface1.GetLimitOffset(0, 100);
     REQUIRE((*records).size() == 2);
 
     // Check if fetched records contain valid data
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.date == dateTest);
         REQUIRE(w.snippet == snippetTest);
         REQUIRE(w.type == typeTest);
         REQUIRE(w.contactID == contactIDTest);
-
     }
 
     // Get all available records by specified thread ID and check for invalid data
-    records = threadRecordInterface1.GetLimitOffsetByField(0,100,ThreadRecordField ::ContactID,std::to_string(contactIDTest).c_str());
+    records = threadRecordInterface1.GetLimitOffsetByField(
+        0, 100, ThreadRecordField ::ContactID, std::to_string(contactIDTest).c_str());
     REQUIRE((*records).size() == 2);
-    for(const auto &w : *records){
+    for (const auto &w : *records) {
         REQUIRE(w.date == dateTest);
         REQUIRE(w.snippet == snippetTest);
         REQUIRE(w.type == typeTest);
         REQUIRE(w.contactID == contactIDTest);
-
     }
 
     // Remove records one by one
@@ -90,7 +86,7 @@ TEST_CASE("Thread Record tests")
 
     // Test updating record
     REQUIRE(threadRecordInterface1.Add(recordIN));
-    recordIN.dbID=1;
+    recordIN.dbID    = 1;
     recordIN.snippet = snippetTest2;
     REQUIRE(threadRecordInterface1.Update(recordIN));
 
@@ -107,5 +103,4 @@ TEST_CASE("Thread Record tests")
     REQUIRE(threadRecordInterface1.GetCount() == 0);
 
     Database::Deinitialize();
-
 }
\ No newline at end of file
diff --git a/module-db/tests/ThreadsTable_tests.cpp b/module-db/tests/ThreadsTable_tests.cpp
index 6c0da9272..8d1339918 100644
--- a/module-db/tests/ThreadsTable_tests.cpp
+++ b/module-db/tests/ThreadsTable_tests.cpp
@@ -8,7 +8,6 @@
  * @details
  */
 
-
 #include "vfs.hpp"
 
 #include "catch.hpp"
@@ -30,16 +29,16 @@ TEST_CASE("Threads Table tests")
     Database::Initialize();
 
     vfs.remove(SmsDB::GetDBName());
-    
+
     SmsDB smsdb;
 
-    ThreadsTableRow testRow1 = {.ID=0,
-            .date=0,
-            .msgCount=0,
-            .msgRead=0,
-            .contactID=0,
-            .snippet="Test snippet",
-            .type = SMSType ::DRAFT
+    ThreadsTableRow testRow1 = {.ID        = 0,
+                                .date      = 0,
+                                .msgCount  = 0,
+                                .msgRead   = 0,
+                                .contactID = 0,
+                                .snippet   = "Test snippet",
+                                .type      = SMSType ::DRAFT
 
     };
 
@@ -53,7 +52,7 @@ TEST_CASE("Threads Table tests")
     REQUIRE(smsdb.threads.GetCount() == 4);
 
     // Update existing element in table
-    testRow1.ID = 4;
+    testRow1.ID      = 4;
     testRow1.snippet = "Updated Test snippet";
     REQUIRE(smsdb.threads.Update(testRow1));
 
@@ -63,28 +62,28 @@ TEST_CASE("Threads Table tests")
 
     // Get table row using invalid ID(should return empty SMSTableRow)
     auto threadFailed = smsdb.threads.GetByID(100);
-    REQUIRE(threadFailed.snippet  == "");
+    REQUIRE(threadFailed.snippet == "");
 
     // Get table rows using valid offset/limit parameters
-    auto retOffsetLimit = smsdb.threads.GetLimitOffset(0,4);
+    auto retOffsetLimit = smsdb.threads.GetLimitOffset(0, 4);
     REQUIRE(retOffsetLimit.size() == 4);
 
     // Get table rows using invalid limit parameters(should return 4 elements instead of 100)
-    auto retOffsetLimitBigger = smsdb.threads.GetLimitOffset(0,100);
+    auto retOffsetLimitBigger = smsdb.threads.GetLimitOffset(0, 100);
     REQUIRE(retOffsetLimitBigger.size() == 4);
 
     // Get table rows using invalid offset/limit parameters(should return empty object)
-    auto retOffsetLimitFailed = smsdb.threads.GetLimitOffset(5,4);
+    auto retOffsetLimitFailed = smsdb.threads.GetLimitOffset(5, 4);
     REQUIRE(retOffsetLimitFailed.size() == 0);
 
     // Get table rows using valid offset/limit parameters and specific field's ID
-    REQUIRE(smsdb.threads.GetLimitOffsetByField(0,4,ThreadsTableFields::MsgCount,"0").size() == 4);
+    REQUIRE(smsdb.threads.GetLimitOffsetByField(0, 4, ThreadsTableFields::MsgCount, "0").size() == 4);
 
     // Get count of elements by field's ID
-    REQUIRE(smsdb.threads.GetCountByFieldID("contact_id",0) == 4);
+    REQUIRE(smsdb.threads.GetCountByFieldID("contact_id", 0) == 4);
 
     // Get count of elements by invalid field's ID
-    REQUIRE(smsdb.threads.GetCountByFieldID("invalid_field",0) == 0);
+    REQUIRE(smsdb.threads.GetCountByFieldID("invalid_field", 0) == 0);
 
     REQUIRE(smsdb.threads.RemoveByID(2));
 
diff --git a/module-db/tests/tests-main.cpp b/module-db/tests/tests-main.cpp
old mode 100755
new mode 100644
index bbcc2c851..b55b043e7
--- a/module-db/tests/tests-main.cpp
+++ b/module-db/tests/tests-main.cpp
@@ -2,10 +2,10 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
\ No newline at end of file
diff --git a/module-db/tests/unittest.cpp b/module-db/tests/unittest.cpp
old mode 100755
new mode 100644
index 71b5e2940..d7c33ef3c
--- a/module-db/tests/unittest.cpp
+++ b/module-db/tests/unittest.cpp
@@ -22,11 +22,10 @@
 
 #include "Tables/SMSTable.hpp"
 
-
 class vfs vfs;
 
-
-TEST_CASE( "Create and destroy simple database" ) {
+TEST_CASE("Create and destroy simple database")
+{
 
     Database::Initialize();
 
@@ -35,55 +34,48 @@ TEST_CASE( "Create and destroy simple database" ) {
 
         Database testDB("test.db");
 
-        const char* media_album_table =
-                "CREATE TABLE IF NOT EXISTS albums("
-                "_id	        		INTEGER PRIMARY KEY,"
-                "artist_id	            INTEGER,"
-                "name	        		TEXT UNIQUE,"
-                "FOREIGN KEY(artist_id) REFERENCES artists(_id)"
-                ");";
+        const char *media_album_table = "CREATE TABLE IF NOT EXISTS albums("
+                                        "_id	        		INTEGER PRIMARY KEY,"
+                                        "artist_id	            INTEGER,"
+                                        "name	        		TEXT UNIQUE,"
+                                        "FOREIGN KEY(artist_id) REFERENCES artists(_id)"
+                                        ");";
 
-        const char* media_artist_table =
-                "CREATE TABLE IF NOT EXISTS artists("
-                "_id	                INTEGER PRIMARY KEY,"
-                "name   	            TEXT UNIQUE"
-                ");";
+        const char *media_artist_table = "CREATE TABLE IF NOT EXISTS artists("
+                                         "_id	                INTEGER PRIMARY KEY,"
+                                         "name   	            TEXT UNIQUE"
+                                         ");";
 
-        const char* media_songs_table =
-                "CREATE TABLE IF NOT EXISTS tracks("
-                "_id	                INTEGER PRIMARY KEY,"
-                "filename	            TEXT UNIQUE,"
-                "name	            	TEXT,"
-                "duration	            INTEGER,"
-                "artist_id	            INTEGER,"
-                "album_id	            INTEGER,"
-                "cover  	            INTEGER,"
-                "FOREIGN KEY(artist_id) REFERENCES artists(_id),"
-                "FOREIGN KEY(album_id) 	REFERENCES albums(_id)"
-                ");";
+        const char *media_songs_table = "CREATE TABLE IF NOT EXISTS tracks("
+                                        "_id	                INTEGER PRIMARY KEY,"
+                                        "filename	            TEXT UNIQUE,"
+                                        "name	            	TEXT,"
+                                        "duration	            INTEGER,"
+                                        "artist_id	            INTEGER,"
+                                        "album_id	            INTEGER,"
+                                        "cover  	            INTEGER,"
+                                        "FOREIGN KEY(artist_id) REFERENCES artists(_id),"
+                                        "FOREIGN KEY(album_id) 	REFERENCES albums(_id)"
+                                        ");";
 
-        const char* testdb_queries[] = {media_artist_table, media_album_table,media_songs_table};
+        const char *testdb_queries[] = {media_artist_table, media_album_table, media_songs_table};
 
-        //execute all commands from the array
-        for( uint32_t i=0; i<sizeof(testdb_queries)/sizeof(char*); i++)
-        {
+        // execute all commands from the array
+        for (uint32_t i = 0; i < sizeof(testdb_queries) / sizeof(char *); i++) {
             REQUIRE(testDB.Execute(testdb_queries[i]) == true);
         }
-
     }
 
     SECTION("Add records to database")
     {
         Database testDB("test.db");
 
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus") == true);
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus2") == true);
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus3") == true);
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus4") == true);
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus5") == true);
-        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');","Mati Patus6") == true);
-
-
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus") == true);
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus2") == true);
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus3") == true);
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus4") == true);
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus5") == true);
+        REQUIRE(testDB.Execute("insert or ignore into artists ( name ) VALUES ( '%s');", "Mati Patus6") == true);
     }
 
     SECTION("Query database")
@@ -95,17 +87,11 @@ TEST_CASE( "Create and destroy simple database" ) {
         REQUIRE(queryRes->GetFieldCount() == 2);
         REQUIRE(queryRes->GetRowCount() == 6);
 
-        do{
-            std::cout << "Artist ID: " <<  (*queryRes)[0].GetInt32() << "\n";
-            std::cout << "Artist name: " <<  (*queryRes)[1].GetString() << "\n";
-        }while(queryRes->NextRow());
-
-
-
-
+        do {
+            std::cout << "Artist ID: " << (*queryRes)[0].GetInt32() << "\n";
+            std::cout << "Artist name: " << (*queryRes)[1].GetString() << "\n";
+        } while (queryRes->NextRow());
     }
 
-
     Database::Deinitialize();
-
 }
diff --git a/module-gui/gui/AudioCommon.cpp b/module-gui/gui/AudioCommon.cpp
index 12a8c1157..131bc1351 100644
--- a/module-gui/gui/AudioCommon.cpp
+++ b/module-gui/gui/AudioCommon.cpp
@@ -8,34 +8,38 @@
 #include <type_traits>
 #include "Common.hpp"
 
-namespace gui {
+namespace gui
+{
 
-static timeSecondsFunctionPtr timeSecondsFunction = nullptr;
+    static timeSecondsFunctionPtr timeSecondsFunction = nullptr;
 
-bool operator&( const gui::RectangleEdgeFlags& lhs, const gui::RectangleEdgeFlags& rhs ) {
-	return static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs);
-}
+    bool operator&(const gui::RectangleEdgeFlags &lhs, const gui::RectangleEdgeFlags &rhs)
+    {
+        return static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs);
+    }
 
-RectangleEdgeFlags operator|( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs ) {
-	using T = std::underlying_type_t <RectangleEdgeFlags>;
-	return static_cast<RectangleEdgeFlags>(static_cast<T>(lhs) | static_cast<T>(rhs));
-}
+    RectangleEdgeFlags operator|(const RectangleEdgeFlags &lhs, const RectangleEdgeFlags &rhs)
+    {
+        using T = std::underlying_type_t<RectangleEdgeFlags>;
+        return static_cast<RectangleEdgeFlags>(static_cast<T>(lhs) | static_cast<T>(rhs));
+    }
 
-RectangleEdgeFlags operator|=( RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs ) {
-	lhs = lhs | rhs;
-	return lhs;
-}
+    RectangleEdgeFlags operator|=(RectangleEdgeFlags &lhs, const RectangleEdgeFlags &rhs)
+    {
+        lhs = lhs | rhs;
+        return lhs;
+    }
 
-uint32_t getTime() {
-	if( timeSecondsFunction != nullptr )
-		return timeSecondsFunction();
-	return 0;
-}
-
-void setTimeFunction( timeSecondsFunctionPtr fptr ) {
-	timeSecondsFunction = fptr;
-}
-
-} //namespace gui
+    uint32_t getTime()
+    {
+        if (timeSecondsFunction != nullptr)
+            return timeSecondsFunction();
+        return 0;
+    }
 
+    void setTimeFunction(timeSecondsFunctionPtr fptr)
+    {
+        timeSecondsFunction = fptr;
+    }
 
+} // namespace gui
diff --git a/module-gui/gui/Common.hpp b/module-gui/gui/Common.hpp
index df158a6bd..dc5f5c33e 100644
--- a/module-gui/gui/Common.hpp
+++ b/module-gui/gui/Common.hpp
@@ -10,99 +10,112 @@
 
 #include <cstdint>
 
-namespace gui {
-
-enum class NavigationDirection {
-	LEFT = 0x01,
-	UP,
-	RIGHT,
-	DOWN
-};
-
-enum class Status
+namespace gui
 {
-	GUI_SUCCESS = 0x01,
-	GUI_FAILURE,
-};
 
-enum class RefreshModes {
-	GUI_REFRESH_FAST = 1,
-	GUI_REFRESH_DEEP
-};
+    enum class NavigationDirection
+    {
+        LEFT = 0x01,
+        UP,
+        RIGHT,
+        DOWN
+    };
 
-enum class ShowMode {
-	GUI_SHOW_INIT = 0x01,
-	GUI_SHOW_RETURN
-};
+    enum class Status
+    {
+        GUI_SUCCESS = 0x01,
+        GUI_FAILURE,
+    };
 
-enum class AlignementFlags {
-	GUI_ALIGN_VERTICAL_CENTER   = 0x01,
-	GUI_ALIGN_VERTICAL_TOP      = 0x02,
-	GUI_ALIGN_VERTICAL_BOTTOM   = 0x04,
-	GUI_ALIGN_HORIZONTAL_CENTER = 0x08,
-	GUI_ALIGN_HORIZONTAL_LEFT   = 0x10,
-	GUI_ALIGN_HORIZONTAL_RIGHT  = 0x20
-};
+    enum class RefreshModes
+    {
+        GUI_REFRESH_FAST = 1,
+        GUI_REFRESH_DEEP
+    };
 
-enum class OrientationFlags {
-	GUI_ORIENTATION_HORIZONTAL  = 0x00,
-	GUI_ORIENTATION_VERTICAL    = 0x01
-};
+    enum class ShowMode
+    {
+        GUI_SHOW_INIT = 0x01,
+        GUI_SHOW_RETURN
+    };
 
-template <class T> bool operator&( const T& lhs, const T& rhs ) {
-	return static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs);
-}
-template <class T> T operator|( const T& lhs, const T& rhs ) {
-	return static_cast<T>(static_cast<uint32_t>(lhs) | static_cast<uint32_t>(rhs));
-}
-template <class T> T operator|=( const T& lhs, const T& rhs ) {
-	lhs = lhs | rhs;
-	return lhs;
-}
+    enum class AlignementFlags
+    {
+        GUI_ALIGN_VERTICAL_CENTER   = 0x01,
+        GUI_ALIGN_VERTICAL_TOP      = 0x02,
+        GUI_ALIGN_VERTICAL_BOTTOM   = 0x04,
+        GUI_ALIGN_HORIZONTAL_CENTER = 0x08,
+        GUI_ALIGN_HORIZONTAL_LEFT   = 0x10,
+        GUI_ALIGN_HORIZONTAL_RIGHT  = 0x20
+    };
 
-enum class RectangleEdgeFlags {
-	GUI_RECT_EDGE_NO_EDGES		 = 0x00,
-	GUI_RECT_EDGE_TOP            = 0x01,
-	GUI_RECT_EDGE_BOTTOM         = 0x02,
-	GUI_RECT_EDGE_LEFT           = 0x04,
-	GUI_RECT_EDGE_RIGHT          = 0x08,
-	GUI_RECT_ALL_EDGES           = 0x0F
-};
+    enum class OrientationFlags
+    {
+        GUI_ORIENTATION_HORIZONTAL = 0x00,
+        GUI_ORIENTATION_VERTICAL   = 0x01
+    };
 
-//bool operator&( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
-//RectangleEdgeFlags operator|( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
-//RectangleEdgeFlags operator|=( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
+    template <class T> bool operator&(const T &lhs, const T &rhs)
+    {
+        return static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs);
+    }
+    template <class T> T operator|(const T &lhs, const T &rhs)
+    {
+        return static_cast<T>(static_cast<uint32_t>(lhs) | static_cast<uint32_t>(rhs));
+    }
+    template <class T> T operator|=(const T &lhs, const T &rhs)
+    {
+        lhs = lhs | rhs;
+        return lhs;
+    }
 
-enum class RectangleCornerFlags {
-	GUI_RECT_CORNER_NO_CORNERS   = 0x00,
-	GUI_RECT_CORNER_TOP_LEFT     = 0x10,
-	GUI_RECT_CORNER_TOP_RIGHT    = 0x20,
-	GUI_RECT_CORNER_BOTTOM_LEFT  = 0x40,
-	GUI_RECT_CORNER_BOTTOM_RIGHT = 0x80,
-	GUI_RECT_ALL_CORNERS         = 0xF0,
-};
+    enum class RectangleEdgeFlags
+    {
+        GUI_RECT_EDGE_NO_EDGES = 0x00,
+        GUI_RECT_EDGE_TOP      = 0x01,
+        GUI_RECT_EDGE_BOTTOM   = 0x02,
+        GUI_RECT_EDGE_LEFT     = 0x04,
+        GUI_RECT_EDGE_RIGHT    = 0x08,
+        GUI_RECT_ALL_EDGES     = 0x0F
+    };
 
-enum class RectangleFlatFlags {
-	GUI_RECT_FLAT_NO_FLAT        = 0x00,
-	GUI_RECT_FLAT_TOP_LEFT       = 0x01,
-	GUI_RECT_FLAT_TOP_RIGHT      = 0x02,
-	GUI_RECT_FLAT_BOTTOM_LEFT    = 0x04,
-	GUI_RECT_FLAT_BOTTOM_RIGHT   = 0x08
-};
+    // bool operator&( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
+    // RectangleEdgeFlags operator|( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
+    // RectangleEdgeFlags operator|=( const RectangleEdgeFlags& lhs, const RectangleEdgeFlags& rhs );
 
-enum class RectangleYapFlags {
-    GUI_RECT_YAP_NO_YAPS         = 0x00,
-    GUI_RECT_YAP_TOP_LEFT        = 0x10,
-    GUI_RECT_YAP_TOP_RIGHT       = 0x20,
-    GUI_RECT_YAP_BOTTOM_LEFT     = 0x40,
-    GUI_RECT_YAP_BOTTOM_RIGHT    = 0x80,
-};
+    enum class RectangleCornerFlags
+    {
+        GUI_RECT_CORNER_NO_CORNERS   = 0x00,
+        GUI_RECT_CORNER_TOP_LEFT     = 0x10,
+        GUI_RECT_CORNER_TOP_RIGHT    = 0x20,
+        GUI_RECT_CORNER_BOTTOM_LEFT  = 0x40,
+        GUI_RECT_CORNER_BOTTOM_RIGHT = 0x80,
+        GUI_RECT_ALL_CORNERS         = 0xF0,
+    };
 
-typedef uint32_t (*timeSecondsFunctionPtr)();
+    enum class RectangleFlatFlags
+    {
+        GUI_RECT_FLAT_NO_FLAT      = 0x00,
+        GUI_RECT_FLAT_TOP_LEFT     = 0x01,
+        GUI_RECT_FLAT_TOP_RIGHT    = 0x02,
+        GUI_RECT_FLAT_BOTTOM_LEFT  = 0x04,
+        GUI_RECT_FLAT_BOTTOM_RIGHT = 0x08
+    };
 
-uint32_t getTime();
-void setTimeFunction( timeSecondsFunctionPtr fptr );
+    enum class RectangleYapFlags
+    {
+        GUI_RECT_YAP_NO_YAPS      = 0x00,
+        GUI_RECT_YAP_TOP_LEFT     = 0x10,
+        GUI_RECT_YAP_TOP_RIGHT    = 0x20,
+        GUI_RECT_YAP_BOTTOM_LEFT  = 0x40,
+        GUI_RECT_YAP_BOTTOM_RIGHT = 0x80,
+    };
 
-}
+    typedef uint32_t (*timeSecondsFunctionPtr)();
+
+    uint32_t getTime();
+    void setTimeFunction(timeSecondsFunctionPtr fptr);
+
+} // namespace gui
 
 #endif /* MIDDLEWARES_GUI_WIDGETS_COMMON_HPP_ */
diff --git a/module-gui/gui/SwitchData.hpp b/module-gui/gui/SwitchData.hpp
index c5eda7e5e..4f56c6e4b 100644
--- a/module-gui/gui/SwitchData.hpp
+++ b/module-gui/gui/SwitchData.hpp
@@ -11,36 +11,44 @@
 
 #include <string>
 
-namespace gui {
-
-//class template that stores information that was sent along with switch message
-class SwitchData {
-protected:
-	std::string description = "";
-public:
-
-	SwitchData() = default;
-	SwitchData( const std::string& description ) : description{description} {};
-	virtual ~SwitchData() = default;
-	virtual const std::string& getDescription() const { return description; };
-	virtual void setDescription( const std::string desc ) { description = desc; };
-    bool disableAppClose = false;
-};
-
-class SwitchSpecialChar : public SwitchData
+namespace gui
 {
-  public:
-    std::string requester = "";
-    enum class Type
+
+    // class template that stores information that was sent along with switch message
+    class SwitchData
     {
-        Request,
-        Response,
-    } type = Type::Request;
-    SwitchSpecialChar(Type type, const std::string requester, const std::string &description = "") : SwitchData(description), requester(requester), type(type)
+      protected:
+        std::string description = "";
+
+      public:
+        SwitchData() = default;
+        SwitchData(const std::string &description) : description{description} {};
+        virtual ~SwitchData() = default;
+        virtual const std::string &getDescription() const
+        {
+            return description;
+        };
+        virtual void setDescription(const std::string desc)
+        {
+            description = desc;
+        };
+        bool disableAppClose = false;
+    };
+
+    class SwitchSpecialChar : public SwitchData
     {
-    }
-    virtual ~SwitchSpecialChar() = default;
-};
+      public:
+        std::string requester = "";
+        enum class Type
+        {
+            Request,
+            Response,
+        } type = Type::Request;
+        SwitchSpecialChar(Type type, const std::string requester, const std::string &description = "")
+            : SwitchData(description), requester(requester), type(type)
+        {}
+        virtual ~SwitchSpecialChar() = default;
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/BoundingBox.cpp b/module-gui/gui/core/BoundingBox.cpp
index 0e21de92b..3c6fe20a9 100644
--- a/module-gui/gui/core/BoundingBox.cpp
+++ b/module-gui/gui/core/BoundingBox.cpp
@@ -8,107 +8,109 @@
 #include "BoundingBox.hpp"
 #include <sstream>
 
-namespace gui {
-
-BoundingBox::BoundingBox(int32_t x, int32_t y, uint32_t w, uint32_t h)
+namespace gui
 {
-    this->x = x;
-    this->y = y;
-    this->w = w;
-    this->h = h;
-}
 
-bool BoundingBox::intersect( const BoundingBox& box1, const BoundingBox& box2, BoundingBox& result ) {
-	const BoundingBox* l;
-	const BoundingBox* r;
+    BoundingBox::BoundingBox(int32_t x, int32_t y, uint32_t w, uint32_t h)
+    {
+        this->x = x;
+        this->y = y;
+        this->w = w;
+        this->h = h;
+    }
 
-	if( box1.x < box2.x ) {
-		l = &box1; r = &box2;
-	}
-	else {
-		l = &box2; r = &box1;
-	}
+    bool BoundingBox::intersect(const BoundingBox &box1, const BoundingBox &box2, BoundingBox &result)
+    {
+        const BoundingBox *l;
+        const BoundingBox *r;
 
-	int w = l->x + l->w - r->x;
-	if( w <= 0 )
-	{
-		result.clear();
-		return false;
-	}
-	//most left bbox overlap right box entirely
-	if( (l->x + l->w) >= (r->x + r->w) )
-	{
-		w = r->w;
-	}
-	result.w = w;
-	result.x = r->x;
+        if (box1.x < box2.x) {
+            l = &box1;
+            r = &box2;
+        }
+        else {
+            l = &box2;
+            r = &box1;
+        }
 
-	//vertical check
-	//select bbox that is higher
-	const BoundingBox* u;
-	if( box1.y < box2.y ) {
-		l = &box1; u = &box2;
-	}
-	else {
-		l = &box2; u = &box1;
-	}
+        int w = l->x + l->w - r->x;
+        if (w <= 0) {
+            result.clear();
+            return false;
+        }
+        // most left bbox overlap right box entirely
+        if ((l->x + l->w) >= (r->x + r->w)) {
+            w = r->w;
+        }
+        result.w = w;
+        result.x = r->x;
 
-	int h = l->y + l->h - u->y;
+        // vertical check
+        // select bbox that is higher
+        const BoundingBox *u;
+        if (box1.y < box2.y) {
+            l = &box1;
+            u = &box2;
+        }
+        else {
+            l = &box2;
+            u = &box1;
+        }
 
-	if( h <= 0 )
-	{
-		result.clear();
-		return false;
-	}
+        int h = l->y + l->h - u->y;
 
-	//most lower bbox overlap upper box entirely
-	if( (l->y + l->h) >= (u->y + u->h) )
-	{
-		h = u->h;
-	}
-	result.y = u->y;
-	result.h = h;
+        if (h <= 0) {
+            result.clear();
+            return false;
+        }
 
-	return true;
-}
+        // most lower bbox overlap upper box entirely
+        if ((l->y + l->h) >= (u->y + u->h)) {
+            h = u->h;
+        }
+        result.y = u->y;
+        result.h = h;
 
-void BoundingBox::clear()
-{
-    x = 0;
-    y = 0;
-    w = 0;
-    h = 0;
-}
+        return true;
+    }
 
-uint16_t &BoundingBox::size(gui::Axis axis)
-{
-    if (axis == Axis::X)
-        return w;
-    else
-        return h;
-}
+    void BoundingBox::clear()
+    {
+        x = 0;
+        y = 0;
+        w = 0;
+        h = 0;
+    }
 
-int16_t &BoundingBox::pos(gui::Axis axis)
-{
-    if (axis == Axis::X)
-        return x;
-    else
-        return y;
-}
+    uint16_t &BoundingBox::size(gui::Axis axis)
+    {
+        if (axis == Axis::X)
+            return w;
+        else
+            return h;
+    }
 
-std::string BoundingBox::str()
-{
-    std::stringstream ss;
-    ss << "{";
-    ss << "x: " << x << ", y: " << y << ", w: " << w << ", h: " << h;
-    ss << "}";
-    return ss.str();
-}
+    int16_t &BoundingBox::pos(gui::Axis axis)
+    {
+        if (axis == Axis::X)
+            return x;
+        else
+            return y;
+    }
 
-void BoundingBox::sum(const BoundingBox &box)
-{
-    w = box.w > w ? box.w : w;
-    h = box.h > h ? box.h : h;
-}
+    std::string BoundingBox::str()
+    {
+        std::stringstream ss;
+        ss << "{";
+        ss << "x: " << x << ", y: " << y << ", w: " << w << ", h: " << h;
+        ss << "}";
+        return ss.str();
+    }
+
+    void BoundingBox::sum(const BoundingBox &box)
+    {
+        w = box.w > w ? box.w : w;
+        h = box.h > h ? box.h : h;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/BoundingBox.hpp b/module-gui/gui/core/BoundingBox.hpp
index dded569b2..87fd65456 100644
--- a/module-gui/gui/core/BoundingBox.hpp
+++ b/module-gui/gui/core/BoundingBox.hpp
@@ -12,7 +12,8 @@
 #include <cstdint>
 #include <string>
 
-namespace gui {
+namespace gui
+{
 
     class BoundingBox
     {
diff --git a/module-gui/gui/core/Color.cpp b/module-gui/gui/core/Color.cpp
index 07a682749..0dad3368e 100644
--- a/module-gui/gui/core/Color.cpp
+++ b/module-gui/gui/core/Color.cpp
@@ -7,11 +7,12 @@
 
 #include "Color.hpp"
 
-namespace gui {
+namespace gui
+{
 
-Color ColorFullBlack = Color{0,0};
-Color ColorFullWhite = Color{15,0};
-Color ColorNoColor = Color{15,15};
-Color ColorTray = Color{13,0};
+    Color ColorFullBlack = Color{0, 0};
+    Color ColorFullWhite = Color{15, 0};
+    Color ColorNoColor   = Color{15, 15};
+    Color ColorTray      = Color{13, 0};
 
-}
+} // namespace gui
diff --git a/module-gui/gui/core/Color.hpp b/module-gui/gui/core/Color.hpp
index fca1c3dc1..63708860c 100644
--- a/module-gui/gui/core/Color.hpp
+++ b/module-gui/gui/core/Color.hpp
@@ -10,23 +10,25 @@
 
 #include <cstdint>
 
-namespace gui {
+namespace gui
+{
 
-class Color {
-public:
-	Color() : intensivity{0}, alpha{0} {};
-	Color( uint8_t intensivity, uint8_t alpha ) : intensivity{intensivity}, alpha{alpha} {};
-	//this defines color of the pixel.
-	uint8_t intensivity;
-	//defines how transparent is pixel. 0 means solid color and GUI_COLORS_COUNT-1 fully transparent
-	uint8_t alpha;
-};
+    class Color
+    {
+      public:
+        Color() : intensivity{0}, alpha{0} {};
+        Color(uint8_t intensivity, uint8_t alpha) : intensivity{intensivity}, alpha{alpha} {};
+        // this defines color of the pixel.
+        uint8_t intensivity;
+        // defines how transparent is pixel. 0 means solid color and GUI_COLORS_COUNT-1 fully transparent
+        uint8_t alpha;
+    };
 
-extern Color ColorFullBlack;
-extern Color ColorFullWhite;
-extern Color ColorNoColor;
-extern Color ColorTray;
+    extern Color ColorFullBlack;
+    extern Color ColorFullWhite;
+    extern Color ColorNoColor;
+    extern Color ColorTray;
 
-}
+} // namespace gui
 
 #endif /* GUI_CORE_COLOR_HPP_ */
diff --git a/module-gui/gui/core/Context.cpp b/module-gui/gui/core/Context.cpp
index 47a9fe4ef..be18a0549 100644
--- a/module-gui/gui/core/Context.cpp
+++ b/module-gui/gui/core/Context.cpp
@@ -11,117 +11,124 @@
 #include "BoundingBox.hpp"
 #include "Context.hpp"
 
-namespace gui {
-
-Context::Context( ) : x{0}, y{0}, w{0}, h{0}, data{nullptr} {
-}
-
-Context::Context( uint16_t width, uint16_t height, uint8_t* buffer ) : x{0}, y{0}, w{width}, h{height} {
-	if( buffer == nullptr ){
-		data = new uint8_t[w*h];
-	}
-	else {
-		data = buffer;
-	}
-	memset( data, 15, w*h);
-}
-
-Context::~Context() {
-	if( data != nullptr )
-		delete [] data;
-}
-
-Context* Context::get( int16_t gx, int16_t gy, uint16_t width, uint16_t height ) {
-	Context* retContext = new Context( width, height );
-
-	retContext->x = gx;
-	retContext->y = gy;
-
-	//create bounding boxes for the current context and return context
-	BoundingBox currentBox = BoundingBox( 0, 0, w, h );
-	BoundingBox newBox = BoundingBox( gx, gy, width, height );
-	BoundingBox resultBox;
-
-	//if boxes overlap copy part defined by result from current context to the new context.
-	if( BoundingBox::intersect( currentBox, newBox, resultBox ) ) {
-		uint32_t sourceOffset = resultBox.y*w + resultBox.x;
-		uint32_t destOffset = (resultBox.y - gy)*width + (resultBox.x-gx);
-		for( int32_t h=0; h<resultBox.h; h++) {
-			memcpy( retContext->data + destOffset, data + sourceOffset, resultBox.w );
-			sourceOffset+=w;
-			destOffset +=width;
-		}
-	}
-	//else just return context filled with white colour.
-
-	return retContext;
-}
-
-void Context::insert( int16_t ix, int16_t iy, Context* context ) {
-	//create bounding boxes for the current context and return context
-	BoundingBox currentBox = BoundingBox( 0, 0, w, h );
-	BoundingBox insertBox = BoundingBox( ix, iy, context->w, context->h );
-	BoundingBox resultBox;
-
-	//if boxes overlap copy part defined by result from current context to the new context.
-	if( BoundingBox::intersect( currentBox, insertBox, resultBox ) ) {
-		uint32_t sourceOffset = (resultBox.y - iy)*context->w + (resultBox.x-ix);
-		uint32_t destOffset = (resultBox.y)*w + (resultBox.x);
-		for( int32_t h=0; h<resultBox.h; h++) {
-			memcpy( data + destOffset, context->data + sourceOffset, resultBox.w );
-			sourceOffset += context->w;
-			destOffset += w;
-		}
-	}
-}
-
-void Context::insertArea( int16_t ix, int16_t iy, int16_t iareaX, int16_t iareaY, int16_t iareaW, int16_t iareaH, Context* context ) {
-	//create bounding boxes for the current context and return context
-	BoundingBox currentBox = BoundingBox( 0, 0, w, h );
-	BoundingBox insertBox = BoundingBox( ix, iy, iareaW, iareaH );
-	BoundingBox resultBox;
-
-	//if boxes overlap copy part defined by result from current context to the new context.
-	if( BoundingBox::intersect( currentBox, insertBox, resultBox ) ) {
-		int16_t xBoxOffset = 0;
-		int16_t yBoxOffset = 0;
-		if( iareaX < 0 )
-			xBoxOffset = iareaX;
-		if( iareaY < 0 )
-			yBoxOffset = iareaY;
-		uint32_t sourceOffset = (resultBox.y - iy - yBoxOffset )*context->w + (resultBox.x-ix - xBoxOffset) ;
-		uint32_t destOffset = (resultBox.y)*w + (resultBox.x);
-		for( int32_t h=0; h<resultBox.h; h++) {
-			memcpy( data + destOffset, context->data + sourceOffset, resultBox.w );
-			sourceOffset += context->w;
-			destOffset += w;
-		}
-	}
-}
-
-void Context::fill( uint8_t colour ) {
-	if( data ) {
-		memset( data, colour, w*h );
-	}
-//	uint32_t size = 480*600;
-//	memset( data, colour, size );
-}
-
-std::ostream & operator << (std::ostream &out, const Context &c)
+namespace gui
 {
-	out << "x:" << c.x << "y:" << c.y << "w:" << c.w <<"h:" << c.h <<std::endl;
 
-	uint32_t offset = 0;
-	for( uint32_t y = 0; y< c.h; y++ ) {
-		for( uint32_t x=0; x<c.w;x++) {
-			uint32_t value = *(c.data + offset);
-			std::cout<<std::hex<<value;
-			offset++;
-		}
-		std::cout<<std::endl;
+    Context::Context() : x{0}, y{0}, w{0}, h{0}, data{nullptr}
+    {}
 
-	}
-    return out;
-}
+    Context::Context(uint16_t width, uint16_t height, uint8_t *buffer) : x{0}, y{0}, w{width}, h{height}
+    {
+        if (buffer == nullptr) {
+            data = new uint8_t[w * h];
+        }
+        else {
+            data = buffer;
+        }
+        memset(data, 15, w * h);
+    }
+
+    Context::~Context()
+    {
+        if (data != nullptr)
+            delete[] data;
+    }
+
+    Context *Context::get(int16_t gx, int16_t gy, uint16_t width, uint16_t height)
+    {
+        Context *retContext = new Context(width, height);
+
+        retContext->x = gx;
+        retContext->y = gy;
+
+        // create bounding boxes for the current context and return context
+        BoundingBox currentBox = BoundingBox(0, 0, w, h);
+        BoundingBox newBox     = BoundingBox(gx, gy, width, height);
+        BoundingBox resultBox;
+
+        // if boxes overlap copy part defined by result from current context to the new context.
+        if (BoundingBox::intersect(currentBox, newBox, resultBox)) {
+            uint32_t sourceOffset = resultBox.y * w + resultBox.x;
+            uint32_t destOffset   = (resultBox.y - gy) * width + (resultBox.x - gx);
+            for (int32_t h = 0; h < resultBox.h; h++) {
+                memcpy(retContext->data + destOffset, data + sourceOffset, resultBox.w);
+                sourceOffset += w;
+                destOffset += width;
+            }
+        }
+        // else just return context filled with white colour.
+
+        return retContext;
+    }
+
+    void Context::insert(int16_t ix, int16_t iy, Context *context)
+    {
+        // create bounding boxes for the current context and return context
+        BoundingBox currentBox = BoundingBox(0, 0, w, h);
+        BoundingBox insertBox  = BoundingBox(ix, iy, context->w, context->h);
+        BoundingBox resultBox;
+
+        // if boxes overlap copy part defined by result from current context to the new context.
+        if (BoundingBox::intersect(currentBox, insertBox, resultBox)) {
+            uint32_t sourceOffset = (resultBox.y - iy) * context->w + (resultBox.x - ix);
+            uint32_t destOffset   = (resultBox.y) * w + (resultBox.x);
+            for (int32_t h = 0; h < resultBox.h; h++) {
+                memcpy(data + destOffset, context->data + sourceOffset, resultBox.w);
+                sourceOffset += context->w;
+                destOffset += w;
+            }
+        }
+    }
+
+    void Context::insertArea(
+        int16_t ix, int16_t iy, int16_t iareaX, int16_t iareaY, int16_t iareaW, int16_t iareaH, Context *context)
+    {
+        // create bounding boxes for the current context and return context
+        BoundingBox currentBox = BoundingBox(0, 0, w, h);
+        BoundingBox insertBox  = BoundingBox(ix, iy, iareaW, iareaH);
+        BoundingBox resultBox;
+
+        // if boxes overlap copy part defined by result from current context to the new context.
+        if (BoundingBox::intersect(currentBox, insertBox, resultBox)) {
+            int16_t xBoxOffset = 0;
+            int16_t yBoxOffset = 0;
+            if (iareaX < 0)
+                xBoxOffset = iareaX;
+            if (iareaY < 0)
+                yBoxOffset = iareaY;
+            uint32_t sourceOffset = (resultBox.y - iy - yBoxOffset) * context->w + (resultBox.x - ix - xBoxOffset);
+            uint32_t destOffset   = (resultBox.y) * w + (resultBox.x);
+            for (int32_t h = 0; h < resultBox.h; h++) {
+                memcpy(data + destOffset, context->data + sourceOffset, resultBox.w);
+                sourceOffset += context->w;
+                destOffset += w;
+            }
+        }
+    }
+
+    void Context::fill(uint8_t colour)
+    {
+        if (data) {
+            memset(data, colour, w * h);
+        }
+        //	uint32_t size = 480*600;
+        //	memset( data, colour, size );
+    }
+
+    std::ostream &operator<<(std::ostream &out, const Context &c)
+    {
+        out << "x:" << c.x << "y:" << c.y << "w:" << c.w << "h:" << c.h << std::endl;
+
+        uint32_t offset = 0;
+        for (uint32_t y = 0; y < c.h; y++) {
+            for (uint32_t x = 0; x < c.w; x++) {
+                uint32_t value = *(c.data + offset);
+                std::cout << std::hex << value;
+                offset++;
+            }
+            std::cout << std::endl;
+        }
+        return out;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/Context.hpp b/module-gui/gui/core/Context.hpp
index 36d18e6a8..924b2f7aa 100644
--- a/module-gui/gui/core/Context.hpp
+++ b/module-gui/gui/core/Context.hpp
@@ -12,45 +12,65 @@
 #include <iostream>
 #include "Common.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class Context {
-protected:
-	int16_t  x, y;
-	uint32_t w, h;
-	uint8_t* data;
-public:
-	Context();
-	Context( uint16_t width, uint16_t height, uint8_t* buffer = nullptr );
-	virtual ~Context();
+    class Context
+    {
+      protected:
+        int16_t x, y;
+        uint32_t w, h;
+        uint8_t *data;
 
-	/**
-	 * @brief Creates new context using provided coordinates. If there is no common part Context with 0 width and 0 height is returned.
-	 */
-	Context* get( int16_t gx, int16_t gy, uint16_t width, uint16_t height );
-	/**
-	 * @brief Pastes provided context into current one. Overlapping content will be inserted into current context.
-	 */
-	void insert( int16_t ix, int16_t iy, Context* context );
-	/**
-	 * @brief Pastes provided context into current one. Overlapping content will be inserted into current context.
-	 */
-	void insertArea( int16_t ix, int16_t iy, int16_t iareaX, int16_t iareaY, int16_t iareaW, int16_t iareaH, Context* context );
-	/**
-	 * @brief Fills whole context with specified colour;
-	 */
-	void fill( uint8_t colour );
-	/**
-	 * @brief returns pointer to context's data;
-	 */
-	inline uint8_t* getData() { return data; };
-	inline int16_t getX() {return x; };
-	inline int16_t getY() {return y; };
-	inline uint16_t getW() {return w; };
-	inline uint16_t getH() {return h; };
+      public:
+        Context();
+        Context(uint16_t width, uint16_t height, uint8_t *buffer = nullptr);
+        virtual ~Context();
 
-	friend std::ostream & operator << (std::ostream &out, const Context &c);
-};
+        /**
+         * @brief Creates new context using provided coordinates. If there is no common part Context with 0 width and 0
+         * height is returned.
+         */
+        Context *get(int16_t gx, int16_t gy, uint16_t width, uint16_t height);
+        /**
+         * @brief Pastes provided context into current one. Overlapping content will be inserted into current context.
+         */
+        void insert(int16_t ix, int16_t iy, Context *context);
+        /**
+         * @brief Pastes provided context into current one. Overlapping content will be inserted into current context.
+         */
+        void insertArea(
+            int16_t ix, int16_t iy, int16_t iareaX, int16_t iareaY, int16_t iareaW, int16_t iareaH, Context *context);
+        /**
+         * @brief Fills whole context with specified colour;
+         */
+        void fill(uint8_t colour);
+        /**
+         * @brief returns pointer to context's data;
+         */
+        inline uint8_t *getData()
+        {
+            return data;
+        };
+        inline int16_t getX()
+        {
+            return x;
+        };
+        inline int16_t getY()
+        {
+            return y;
+        };
+        inline uint16_t getW()
+        {
+            return w;
+        };
+        inline uint16_t getH()
+        {
+            return h;
+        };
+
+        friend std::ostream &operator<<(std::ostream &out, const Context &c);
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/DrawCommand.cpp b/module-gui/gui/core/DrawCommand.cpp
index 9ffcb3248..652cdb495 100644
--- a/module-gui/gui/core/DrawCommand.cpp
+++ b/module-gui/gui/core/DrawCommand.cpp
@@ -7,7 +7,5 @@
 
 #include "DrawCommand.hpp"
 
-namespace gui {
-
-
-} /* namespace gui */
+namespace gui
+{} /* namespace gui */
diff --git a/module-gui/gui/core/DrawCommand.hpp b/module-gui/gui/core/DrawCommand.hpp
index 63c85610d..abbb715d8 100644
--- a/module-gui/gui/core/DrawCommand.hpp
+++ b/module-gui/gui/core/DrawCommand.hpp
@@ -15,197 +15,206 @@
 #include "Color.hpp"
 #include "../Common.hpp"
 
-
-namespace gui {
-
-/**
- * @brief IDs of the drawing commands
- */
-enum class DrawCommandID {
-	GUI_DRAW_UNDEFINED = 0,
-	GUI_DRAW_CLEAR = 1,
-	GUI_DRAW_LINE,
-	GUI_DRAW_TRIANGLE,
-	GUI_DRAW_RECT,
-	GUI_DRAW_TEXT,
-	GUI_DRAW_ARC,
-	GUI_DRAW_PIE,
-	GUI_DRAW_CIRCLE,
-	GUI_DRAW_IMAGE,
-	GUI_DRAW_COMMANDS, //blob of many
-	GUI_RENDER_QUICK,
-	GUI_RENDER_DEEP,
-	GUI_RENDER_REFRESH //sent to applications so they can repaint current window
-};
-
-class DrawCommand {
-public:
-
-	DrawCommandID id;
-
-	int16_t areaX;
-	int16_t areaY;
-	int16_t areaW;
-	int16_t areaH;
-
-	DrawCommand() : id{DrawCommandID::GUI_DRAW_UNDEFINED}, areaX{0}, areaY{0}, areaW{0}, areaH{0} {};
-	virtual ~DrawCommand() {};
-};
-
-/**
- * @brief Draw command for rendering.
- */
-class CommandRender : public DrawCommand
+namespace gui
 {
-public:
-	std::string applicationName;
-	CommandRender() { id = DrawCommandID::GUI_RENDER_DEEP; };
-};
 
-/**
- * @brief Draw command for line.
- */
-class CommandLine : public DrawCommand {
-public:
-	int16_t x1;
-	int16_t y1;
-	int16_t x2;
-	int16_t y2;
-	Color color;
-	uint8_t penWidth;
+    /**
+     * @brief IDs of the drawing commands
+     */
+    enum class DrawCommandID
+    {
+        GUI_DRAW_UNDEFINED = 0,
+        GUI_DRAW_CLEAR     = 1,
+        GUI_DRAW_LINE,
+        GUI_DRAW_TRIANGLE,
+        GUI_DRAW_RECT,
+        GUI_DRAW_TEXT,
+        GUI_DRAW_ARC,
+        GUI_DRAW_PIE,
+        GUI_DRAW_CIRCLE,
+        GUI_DRAW_IMAGE,
+        GUI_DRAW_COMMANDS, // blob of many
+        GUI_RENDER_QUICK,
+        GUI_RENDER_DEEP,
+        GUI_RENDER_REFRESH // sent to applications so they can repaint current window
+    };
 
-	CommandLine() : x1{0}, y1{0}, x2{0}, y2{0}, color( ColorFullBlack ),
-		penWidth{1} {
-		id = DrawCommandID::GUI_DRAW_LINE;
-	}
-};
+    class DrawCommand
+    {
+      public:
+        DrawCommandID id;
 
-/**
- * @brief Draw command for triangle.
- */
-class CommandTriangle : DrawCommand {
-public:
-	int16_t x1;
-	int16_t y1;
-	int16_t x2;
-	int16_t y2;
-	int16_t x3;
-	int16_t y3;
-	Color fillColor;
-	gui::Color borderColor;
-	uint8_t penWidth;
+        int16_t areaX;
+        int16_t areaY;
+        int16_t areaW;
+        int16_t areaH;
 
-	CommandTriangle() : x1{0}, y1{0}, x2{0}, y2{0}, x3{0}, y3{0},
-		fillColor( ColorFullBlack ), borderColor( ColorFullBlack ), penWidth{1} {
-		id = DrawCommandID::GUI_DRAW_TRIANGLE;
-	}
-};
+        DrawCommand() : id{DrawCommandID::GUI_DRAW_UNDEFINED}, areaX{0}, areaY{0}, areaW{0}, areaH{0} {};
+        virtual ~DrawCommand(){};
+    };
 
-/**
- * @brief Draw command for rectangle.
- */
-class CommandRectangle : public DrawCommand {
-public:
-	int16_t x;
-	int16_t y;
-	uint16_t w;
-	uint16_t h;
-	uint16_t radius;
-	//flags that defines whether paint given border
-	RectangleEdgeFlags edges;
-	//flags that defines which edge should be flat. This will disable roundness on both sides of the edge.
-	RectangleFlatFlags flatEdges;
-	//flags that defines whether paint given corner (only for rounded corners)
-	RectangleCornerFlags corners;
-    //flags indicating yaps for speech bubbles, it takes precendece over other properties
-    RectangleYapFlags yaps;
-    //defines which of the edges and corners are painted
-    unsigned short yapSize = 0;
-    bool filled;
-	uint8_t penWidth;
-	Color fillColor;
-	Color borderColor;
-    CommandRectangle() : x{0}, y{0}, w{0}, h{0},
-			radius{0},
-			edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
-			flatEdges{RectangleFlatFlags::GUI_RECT_FLAT_NO_FLAT},
-			corners{RectangleCornerFlags::GUI_RECT_ALL_CORNERS},
-			yaps{RectangleYapFlags::GUI_RECT_YAP_NO_YAPS},
-			yapSize{0},
-			filled{false},
-			penWidth{1},
-			fillColor( ColorFullBlack ), borderColor( ColorFullBlack ) {
-		id = DrawCommandID::GUI_DRAW_RECT;
-	}
-};
+    /**
+     * @brief Draw command for rendering.
+     */
+    class CommandRender : public DrawCommand
+    {
+      public:
+        std::string applicationName;
+        CommandRender()
+        {
+            id = DrawCommandID::GUI_RENDER_DEEP;
+        };
+    };
 
-/**
- * @brief Draw command for circle.
- */
-class CommandCircle : public DrawCommand
-{
-public:
-	int16_t xc;
-	int16_t yc;
-	uint16_t r;
-	uint8_t penWidth;
-	bool filled;
+    /**
+     * @brief Draw command for line.
+     */
+    class CommandLine : public DrawCommand
+    {
+      public:
+        int16_t x1;
+        int16_t y1;
+        int16_t x2;
+        int16_t y2;
+        Color color;
+        uint8_t penWidth;
 
-	Color fillColor;
-	Color borderColor;
+        CommandLine() : x1{0}, y1{0}, x2{0}, y2{0}, color(ColorFullBlack), penWidth{1}
+        {
+            id = DrawCommandID::GUI_DRAW_LINE;
+        }
+    };
 
-	CommandCircle() : xc{0}, yc{0}, r{1}, penWidth{1}, filled{false},
-		fillColor( ColorFullBlack ), borderColor( ColorFullBlack ) {
-		id = DrawCommandID::GUI_DRAW_CIRCLE;
-	}
-};
+    /**
+     * @brief Draw command for triangle.
+     */
+    class CommandTriangle : DrawCommand
+    {
+      public:
+        int16_t x1;
+        int16_t y1;
+        int16_t x2;
+        int16_t y2;
+        int16_t x3;
+        int16_t y3;
+        Color fillColor;
+        gui::Color borderColor;
+        uint8_t penWidth;
 
-/**
- * @brief Draw command for text line.
- */
-class CommandText : public DrawCommand
-{
-public:
-	//area where label wil lbe drawn
-	int16_t x;
-	int16_t y;
-	int16_t w;
-	int16_t h;
-	//area occupied by text inside the label
-	int16_t tx;
-	int16_t ty;
-	int16_t tw;
-	int16_t th;
-	uint16_t charsWidth;//number of visible pixels calculated
-	UTF8 str;
-	uint8_t fontID;
+        CommandTriangle()
+            : x1{0}, y1{0}, x2{0}, y2{0}, x3{0}, y3{0}, fillColor(ColorFullBlack),
+              borderColor(ColorFullBlack), penWidth{1}
+        {
+            id = DrawCommandID::GUI_DRAW_TRIANGLE;
+        }
+    };
 
-	Color color;
+    /**
+     * @brief Draw command for rectangle.
+     */
+    class CommandRectangle : public DrawCommand
+    {
+      public:
+        int16_t x;
+        int16_t y;
+        uint16_t w;
+        uint16_t h;
+        uint16_t radius;
+        // flags that defines whether paint given border
+        RectangleEdgeFlags edges;
+        // flags that defines which edge should be flat. This will disable roundness on both sides of the edge.
+        RectangleFlatFlags flatEdges;
+        // flags that defines whether paint given corner (only for rounded corners)
+        RectangleCornerFlags corners;
+        // flags indicating yaps for speech bubbles, it takes precendece over other properties
+        RectangleYapFlags yaps;
+        // defines which of the edges and corners are painted
+        unsigned short yapSize = 0;
+        bool filled;
+        uint8_t penWidth;
+        Color fillColor;
+        Color borderColor;
+        CommandRectangle()
+            : x{0}, y{0}, w{0}, h{0}, radius{0}, edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
+              flatEdges{RectangleFlatFlags::GUI_RECT_FLAT_NO_FLAT}, corners{RectangleCornerFlags::GUI_RECT_ALL_CORNERS},
+              yaps{RectangleYapFlags::GUI_RECT_YAP_NO_YAPS}, yapSize{0}, filled{false}, penWidth{1},
+              fillColor(ColorFullBlack), borderColor(ColorFullBlack)
+        {
+            id = DrawCommandID::GUI_DRAW_RECT;
+        }
+    };
 
-	CommandText() : x{0}, y{0}, w{0}, h{0}, tx{0}, ty{0}, tw{0}, th{0},
-			charsWidth{0}, str{""}, fontID{ 0 }, color(ColorFullBlack) {
-		id = DrawCommandID::GUI_DRAW_TEXT;
-	}
-};
+    /**
+     * @brief Draw command for circle.
+     */
+    class CommandCircle : public DrawCommand
+    {
+      public:
+        int16_t xc;
+        int16_t yc;
+        uint16_t r;
+        uint8_t penWidth;
+        bool filled;
 
-/**
- * @brief Draw command for image.
- */
-class CommandImage : public DrawCommand
-{
-public:
-	int16_t x;
-	int16_t y;
-	uint16_t w;
-	uint16_t h;
+        Color fillColor;
+        Color borderColor;
 
-	//ID of the image
-	uint16_t imageID;
+        CommandCircle()
+            : xc{0}, yc{0}, r{1}, penWidth{1}, filled{false}, fillColor(ColorFullBlack), borderColor(ColorFullBlack)
+        {
+            id = DrawCommandID::GUI_DRAW_CIRCLE;
+        }
+    };
 
-	CommandImage() : x{0}, y{0}, w{0}, h{0}, imageID{0} {
-		id = DrawCommandID::GUI_DRAW_IMAGE;
-	}
-};
+    /**
+     * @brief Draw command for text line.
+     */
+    class CommandText : public DrawCommand
+    {
+      public:
+        // area where label wil lbe drawn
+        int16_t x;
+        int16_t y;
+        int16_t w;
+        int16_t h;
+        // area occupied by text inside the label
+        int16_t tx;
+        int16_t ty;
+        int16_t tw;
+        int16_t th;
+        uint16_t charsWidth; // number of visible pixels calculated
+        UTF8 str;
+        uint8_t fontID;
+
+        Color color;
+
+        CommandText()
+            : x{0}, y{0}, w{0}, h{0}, tx{0}, ty{0}, tw{0}, th{0}, charsWidth{0}, str{""}, fontID{0},
+              color(ColorFullBlack)
+        {
+            id = DrawCommandID::GUI_DRAW_TEXT;
+        }
+    };
+
+    /**
+     * @brief Draw command for image.
+     */
+    class CommandImage : public DrawCommand
+    {
+      public:
+        int16_t x;
+        int16_t y;
+        uint16_t w;
+        uint16_t h;
+
+        // ID of the image
+        uint16_t imageID;
+
+        CommandImage() : x{0}, y{0}, w{0}, h{0}, imageID{0}
+        {
+            id = DrawCommandID::GUI_DRAW_IMAGE;
+        }
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/Font.cpp b/module-gui/gui/core/Font.cpp
index adafbe7fa..e7cd2418b 100644
--- a/module-gui/gui/core/Font.cpp
+++ b/module-gui/gui/core/Font.cpp
@@ -13,488 +13,533 @@
 
 #include "utf8/UTF8.hpp"
 #include "log/log.hpp"
-//for loading files
+// for loading files
 #include "Context.hpp"
 #include "DrawCommand.hpp"
 #include "Renderer.hpp"
 #include "vfs.hpp"
 #include <cassert>
 
-namespace gui {
-
-FontGlyph::~FontGlyph() {
-	if( data != nullptr )
-		delete[] data;
-}
-
-gui::Status FontGlyph::load( uint8_t* data, uint32_t& offset ) {
-	//character id
-	memcpy( &id, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//offset in glyph data field
-	memcpy( &glyph_offset, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//width of the character image in the texture
-	memcpy( &width, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//height of the character image in the texture
-	memcpy( &height, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//how much the current position should be offset when copying the image from the texture to the screen
-	memcpy( &xoffset, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//how much the current position should be offset when copying the image from the texture to the screen
-	memcpy( &yoffset, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//how much the current position should be advanced after drawing the character
-	memcpy( &xadvance, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-
-	return gui::Status::GUI_SUCCESS;
-}
-
-gui::Status FontGlyph::loadImage( uint8_t* data, uint32_t offset ) {
-
-	//image data of the glyph
-	this->data = new uint8_t[width*height];
-
-	memcpy( this->data, data+offset, width*height );
-
-	//TODO convert image to the vector of vectors where every last vector contains pairs of
-	//TODO offset - from column 0, length - number of pixels that should be drawn.
-	//TODO First vector contains row and pointer to the vector with pairs
-
-	return gui::Status::GUI_SUCCESS;
-}
-
-gui::Status FontKerning::load( uint8_t* data, uint32_t& offset ) {
-	//utf16 id of the first character
-	memcpy( &first, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//utf16 id of the following character
-	memcpy( &second, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//distance in pixels between beginning of first character and beginning of second character
-	memcpy( &amount, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-
-	return gui::Status::GUI_SUCCESS;
-}
-
-gui::Status FontInfo::load( uint8_t* data, uint32_t& offset ) {
-
-	//read up to 63 chars of the fonts name
-	char name[64] = {0};
-	memcpy( name, data + offset, 63 ); offset += 64;
-	face = std::string( name );
-
-	//size of the true type font
-	memcpy( &size, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//flag that informs if font is bold
-	memcpy( &bold, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//flag that informs if font is italic
-	memcpy( &italic, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//flag that informs if smoothing was turned on. 1 - smoothing was turned on.
-	memcpy( &smooth, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//TODO additional space between characters????
-	memcpy( &char_spacing, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//TODO additional space between lines
-	memcpy( &line_spacing, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//distance in pixels between each line of text
-	memcpy( &line_height, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//number of pixels from the absolute top of the line to the base of the characters
-	memcpy( &base, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//width of the texture, normally used to scale the x pos of the character image
-	memcpy( &scale_w, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-	//height of the texture, normally used to scale the y pos of the character image
-	memcpy( &scale_h, data + offset, sizeof(uint16_t) ); offset += sizeof(uint16_t);
-
-	return gui::Status::GUI_SUCCESS;
-}
-
-Font::~Font() {
-	for (std::map< uint32_t, FontGlyph* >::iterator it=glyphs.begin(); it!=glyphs.end(); ++it)
-		delete it->second;
-	glyphs.clear();
-
-	for (std::map< uint32_t, std::map< uint32_t, FontKerning* >* >::iterator fit=kerning.begin(); fit!=kerning.end(); ++fit) {
-		for (std::map< uint32_t, FontKerning*  >::iterator sit=fit->second->begin(); sit!=fit->second->end(); ++sit) {
-			delete sit->second;
-		}
-		delete fit->second;
-	}
-	kerning.clear();
-}
-
-gui::Status Font::load( uint8_t* data ) {
-
-	uint32_t offset = 0;
-
-	if( info.load( data, offset ) != gui::Status::GUI_SUCCESS )
-		return gui::Status::GUI_FAILURE;
-
-	//number of glyphs in the font
-	memcpy( &glyph_count, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//offset to the beginning of the glyph data
-	memcpy( &glyph_data_offset, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//number of kerning pairs
-	memcpy( &kern_count, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//array of glyphs structures
-	memcpy( &kern_data_offset, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//offset to the beginning of the image data
-	memcpy( &image_data_offset, data + offset, sizeof(uint32_t) ); offset += sizeof(uint32_t);
-	//id of the font asigned by the font manager
-	id = 1;
-
-//	LOG_INFO("font: %s glyphs: %d, kern: %d", info.face.c_str(), glyph_count, kern_count );
-//	LOG_INFO("glyph offset: %d", glyph_data_offset );
-//	LOG_INFO("kerning offset: %d", kern_data_offset );
-//	LOG_INFO("image offset: %d", image_data_offset );
-
-	//load glyphs
-	uint32_t glyphOffset = glyph_data_offset;
-	for( unsigned int i=0; i<glyph_count; i++ ) {
-		FontGlyph* glyph = new FontGlyph();
-		glyph->load( data, glyphOffset );
-		glyph->loadImage(data, glyph->glyph_offset );
-		glyphs.insert( std::pair<uint32_t, FontGlyph*>( glyph->id, glyph ) );
-	}
-
-	//load kerning
-	//first map contains index of the character and the map that holds values for kerning between
-	//first and second character character. In second map key is the value of the second character
-	//and value is the kerning between first and second element.
-	uint32_t kernOffset = kern_data_offset;
-	for( unsigned int i=0; i<kern_count; i++ ) {
-		FontKerning* kern = new FontKerning();
-		kern->load( data, kernOffset );
-
-		//find map using first element of kerning as a key
-		auto it = kerning.find( kern->first );
-
-		//element wasn't found
-		std::map< uint32_t, FontKerning* >* kernMap;
-		if( it == kerning.end() ) {
-			kernMap = new std::map< uint32_t, FontKerning* >();
-
-			//insert element to the first map
-			kerning.insert( std::pair< uint32_t, std::map< uint32_t, FontKerning* >* >( kern->first, kernMap));
-		}
-		else {
-			kernMap = it->second;
-		}
-		kernMap->insert( std::pair<uint32_t, FontKerning* >( kern->second, kern) );
-	}
-
-	return gui::Status::GUI_SUCCESS;
-}
-
-int32_t Font::getKerning( uint32_t id1, uint32_t id2 ) {
-	//search for a map with kerning for given character (id1)
-	auto it1 = kerning.find( id1 );
-
-	//if there is no map with kerning for id1 return 0;
-	if( it1 == kerning.end() )
-		return 0;
-
-	std::map< uint32_t, FontKerning* >* kernMap = it1->second;
-
-	//otherwise search for id2 in kernMap and return value or 0 if it's not found
-	auto it2 = kernMap->find( id2 );
-	if( it2 == kernMap->end() )
-		return 0;
-
-	FontKerning* kern = it2->second;
-	return kern->amount;
-}
-
-uint32_t Font::getCharCountInSpace( const UTF8& str, const uint32_t space, uint32_t& spaceConsumed, const bool fromBeginning, const uint32_t& delimiter )
+namespace gui
 {
-	spaceConsumed = 0;
 
-    //width of text in pixels
-	int32_t availableSpace = space;
-	uint32_t stringChars = 0;
-	uint16_t idLast = 0, idCurrent = 0;
-
-    for (uint32_t i = 0; i < str.length(); ++i)
+    FontGlyph::~FontGlyph()
     {
-        // go in reverse rather than UTF8::reverse. be careful, no NULL at the end.
-        uint32_t iAnyDir = fromBeginning ? i : (str.length() - 1 - i); // i compensated for direction
-        idCurrent = str[iAnyDir];
+        if (data != nullptr)
+            delete[] data;
+    }
 
-        auto glyph_found = glyphs.find(idCurrent);
+    gui::Status FontGlyph::load(uint8_t *data, uint32_t &offset)
+    {
+        // character id
+        memcpy(&id, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // offset in glyph data field
+        memcpy(&glyph_offset, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // width of the character image in the texture
+        memcpy(&width, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // height of the character image in the texture
+        memcpy(&height, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // how much the current position should be offset when copying the image from the texture to the screen
+        memcpy(&xoffset, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // how much the current position should be offset when copying the image from the texture to the screen
+        memcpy(&yoffset, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // how much the current position should be advanced after drawing the character
+        memcpy(&xadvance, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
 
-        std::unique_ptr<FontGlyph> unique_glyph;
+        return gui::Status::GUI_SUCCESS;
+    }
 
-        FontGlyph *glyph = nullptr;
-        if (glyph_found != glyphs.end())
-        {
-            glyph = glyph_found->second;
-        }
-        else
-        {
-            unique_glyph = getGlyphUnsupported();
-            glyph = unique_glyph.get();
-        }
+    gui::Status FontGlyph::loadImage(uint8_t *data, uint32_t offset)
+    {
 
-        int32_t kern_value = 0;
+        // image data of the glyph
+        this->data = new uint8_t[width * height];
 
-        if (i > 0)
-        {
-            kern_value = getKerning(idLast, idCurrent);
-        }
+        memcpy(this->data, data + offset, width * height);
 
-        if (availableSpace - (glyph->xadvance + kern_value) < 0)
-        {
-            if (spaceConsumed)
-            {
-                spaceConsumed = space - availableSpace; // unreachable
+        // TODO convert image to the vector of vectors where every last vector contains pairs of
+        // TODO offset - from column 0, length - number of pixels that should be drawn.
+        // TODO First vector contains row and pointer to the vector with pairs
+
+        return gui::Status::GUI_SUCCESS;
+    }
+
+    gui::Status FontKerning::load(uint8_t *data, uint32_t &offset)
+    {
+        // utf16 id of the first character
+        memcpy(&first, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // utf16 id of the following character
+        memcpy(&second, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // distance in pixels between beginning of first character and beginning of second character
+        memcpy(&amount, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+
+        return gui::Status::GUI_SUCCESS;
+    }
+
+    gui::Status FontInfo::load(uint8_t *data, uint32_t &offset)
+    {
+
+        // read up to 63 chars of the fonts name
+        char name[64] = {0};
+        memcpy(name, data + offset, 63);
+        offset += 64;
+        face = std::string(name);
+
+        // size of the true type font
+        memcpy(&size, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // flag that informs if font is bold
+        memcpy(&bold, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // flag that informs if font is italic
+        memcpy(&italic, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // flag that informs if smoothing was turned on. 1 - smoothing was turned on.
+        memcpy(&smooth, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // TODO additional space between characters????
+        memcpy(&char_spacing, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // TODO additional space between lines
+        memcpy(&line_spacing, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // distance in pixels between each line of text
+        memcpy(&line_height, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // number of pixels from the absolute top of the line to the base of the characters
+        memcpy(&base, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // width of the texture, normally used to scale the x pos of the character image
+        memcpy(&scale_w, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        // height of the texture, normally used to scale the y pos of the character image
+        memcpy(&scale_h, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+
+        return gui::Status::GUI_SUCCESS;
+    }
+
+    Font::~Font()
+    {
+        for (std::map<uint32_t, FontGlyph *>::iterator it = glyphs.begin(); it != glyphs.end(); ++it)
+            delete it->second;
+        glyphs.clear();
+
+        for (std::map<uint32_t, std::map<uint32_t, FontKerning *> *>::iterator fit = kerning.begin();
+             fit != kerning.end();
+             ++fit) {
+            for (std::map<uint32_t, FontKerning *>::iterator sit = fit->second->begin(); sit != fit->second->end();
+                 ++sit) {
+                delete sit->second;
             }
-            return stringChars;
-        }
-
-        availableSpace -= glyph->xadvance + kern_value;
-
-        idLast = idCurrent;
-        ++stringChars;
-
-        // check for delimiter
-        if (idCurrent == delimiter)
-        {
-            break;
+            delete fit->second;
         }
+        kerning.clear();
     }
-    spaceConsumed = space - availableSpace;
-    return stringChars;
-}
 
-uint32_t Font::getPixelWidth( const UTF8& str, const uint32_t start, const uint32_t count )
-{
-
-	if( count == 0 )
-		return 0;
-
-	if( str.length() == 0 )
-		return 0;
-
-	if( (start >= str.length()) || (start+count-1 >= str.length() ) )
-	{
-		LOG_ERROR("incorrect string index provided");
-		return 0;
-	}
-
-    //width of text in pixels
-	uint32_t stringPixelWidth = 0;
-	uint16_t idLast = 0, idCurrent = 0;
-
-    for (uint32_t i = 0; i < count; ++i)
+    gui::Status Font::load(uint8_t *data)
     {
-        idCurrent = str[start + i];
-        auto glyph_found = glyphs.find(idCurrent);
-        if (glyph_found != glyphs.end())
-        {
-            stringPixelWidth += getCharPixelWidth(idCurrent) + (i == 0 ? 0 : getKerning(idLast, idCurrent));
+
+        uint32_t offset = 0;
+
+        if (info.load(data, offset) != gui::Status::GUI_SUCCESS)
+            return gui::Status::GUI_FAILURE;
+
+        // number of glyphs in the font
+        memcpy(&glyph_count, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // offset to the beginning of the glyph data
+        memcpy(&glyph_data_offset, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // number of kerning pairs
+        memcpy(&kern_count, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // array of glyphs structures
+        memcpy(&kern_data_offset, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // offset to the beginning of the image data
+        memcpy(&image_data_offset, data + offset, sizeof(uint32_t));
+        offset += sizeof(uint32_t);
+        // id of the font asigned by the font manager
+        id = 1;
+
+        //	LOG_INFO("font: %s glyphs: %d, kern: %d", info.face.c_str(), glyph_count, kern_count );
+        //	LOG_INFO("glyph offset: %d", glyph_data_offset );
+        //	LOG_INFO("kerning offset: %d", kern_data_offset );
+        //	LOG_INFO("image offset: %d", image_data_offset );
+
+        // load glyphs
+        uint32_t glyphOffset = glyph_data_offset;
+        for (unsigned int i = 0; i < glyph_count; i++) {
+            FontGlyph *glyph = new FontGlyph();
+            glyph->load(data, glyphOffset);
+            glyph->loadImage(data, glyph->glyph_offset);
+            glyphs.insert(std::pair<uint32_t, FontGlyph *>(glyph->id, glyph));
         }
-        else
-        {
-            stringPixelWidth += getGlyphUnsupported()->xadvance;
+
+        // load kerning
+        // first map contains index of the character and the map that holds values for kerning between
+        // first and second character character. In second map key is the value of the second character
+        // and value is the kerning between first and second element.
+        uint32_t kernOffset = kern_data_offset;
+        for (unsigned int i = 0; i < kern_count; i++) {
+            FontKerning *kern = new FontKerning();
+            kern->load(data, kernOffset);
+
+            // find map using first element of kerning as a key
+            auto it = kerning.find(kern->first);
+
+            // element wasn't found
+            std::map<uint32_t, FontKerning *> *kernMap;
+            if (it == kerning.end()) {
+                kernMap = new std::map<uint32_t, FontKerning *>();
+
+                // insert element to the first map
+                kerning.insert(std::pair<uint32_t, std::map<uint32_t, FontKerning *> *>(kern->first, kernMap));
+            }
+            else {
+                kernMap = it->second;
+            }
+            kernMap->insert(std::pair<uint32_t, FontKerning *>(kern->second, kern));
         }
-        idLast = idCurrent;
+
+        return gui::Status::GUI_SUCCESS;
     }
 
-    return stringPixelWidth;
-}
-
-uint32_t Font::getPixelWidth( const UTF8& str ) {
-	return getPixelWidth( str, 0, str.length() );
-}
-
-uint32_t Font::getCharPixelWidth( uint32_t charCode ) {
-	FontGlyph* glyph = glyphs.find(charCode)->second;
-
-	if( glyph != NULL)
-		return  glyph->xadvance ;
-
-	return 0;
-}
-
-uint32_t Font::getCharPixelHeight( uint32_t charCode ) {
-	FontGlyph* glyph = glyphs.find(charCode)->second;
-
-	if( glyph != NULL)
-		return  glyph->height ;
-
-	return 0;
-}
-std::unique_ptr<FontGlyph> Font::getGlyphUnsupported() const
-{
-    std::unique_ptr<FontGlyph> unsupported = std::make_unique<FontGlyph>();
-
-    const float pt_to_px = 0.75;
-    unsupported->height = this->info.size * pt_to_px;
-    const float typical_width_as_percent_of_height = 0.62;
-    unsupported->width = unsupported->height * typical_width_as_percent_of_height;
-    unsupported->xoffset = 0;
-    unsupported->yoffset = 0;
-
-    // generate a rectangle based on an existing letter. otherwise use some magic numbers ↑ to approximate the size for the rectangle
-    char baseChar = 'h'; // arbitrary choice. h as a representative character to get an idea of glyph size. if not found, then use magic numbers above
-    auto baseCharFound = this->glyphs.find(baseChar);
-    if (baseCharFound != this->glyphs.end())
+    int32_t Font::getKerning(uint32_t id1, uint32_t id2)
     {
-        FontGlyph *baseGlyph = baseCharFound->second;
-        unsupported->width = baseGlyph->width;
-        unsupported->height = baseGlyph->height;
-        unsupported->xoffset = (baseGlyph->xadvance - baseGlyph->width) / 2;
+        // search for a map with kerning for given character (id1)
+        auto it1 = kerning.find(id1);
+
+        // if there is no map with kerning for id1 return 0;
+        if (it1 == kerning.end())
+            return 0;
+
+        std::map<uint32_t, FontKerning *> *kernMap = it1->second;
+
+        // otherwise search for id2 in kernMap and return value or 0 if it's not found
+        auto it2 = kernMap->find(id2);
+        if (it2 == kernMap->end())
+            return 0;
+
+        FontKerning *kern = it2->second;
+        return kern->amount;
     }
-    if (unsupported->xoffset == 0)
+
+    uint32_t Font::getCharCountInSpace(const UTF8 &str,
+                                       const uint32_t space,
+                                       uint32_t &spaceConsumed,
+                                       const bool fromBeginning,
+                                       const uint32_t &delimiter)
     {
-        unsupported->xoffset = 1; // fallback margin.
-    }
-    unsupported->yoffset += unsupported->height;
-    unsupported->xadvance = unsupported->width + (2 * unsupported->xoffset); // use xoffset as margins on the left/right of the glyph
-    // populate with a bitmap (glyph)
-    CommandRectangle *commandRect = new CommandRectangle();
-    commandRect->x = 0;
-    commandRect->y = 0;
-    commandRect->w = unsupported->width;
-    commandRect->h = unsupported->height;
-    commandRect->areaX = 0;
-    commandRect->areaY = 0;
-    commandRect->areaW = unsupported->width;
-    commandRect->areaH = unsupported->height;
-    commandRect->penWidth = unsupported->xoffset;
+        spaceConsumed = 0;
 
-    Context *renderCtx = new Context(unsupported->width, unsupported->height);
-    std::vector<gui::DrawCommand *> commands = {commandRect};
-    Renderer().render(renderCtx, commands);
+        // width of text in pixels
+        int32_t availableSpace = space;
+        uint32_t stringChars   = 0;
+        uint16_t idLast = 0, idCurrent = 0;
 
-    unsupported->data = renderCtx->getData();
+        for (uint32_t i = 0; i < str.length(); ++i) {
+            // go in reverse rather than UTF8::reverse. be careful, no NULL at the end.
+            uint32_t iAnyDir = fromBeginning ? i : (str.length() - 1 - i); // i compensated for direction
+            idCurrent        = str[iAnyDir];
 
-    return std::move(unsupported);
-}
+            auto glyph_found = glyphs.find(idCurrent);
 
-FontManager::FontManager() {
-}
+            std::unique_ptr<FontGlyph> unique_glyph;
 
-FontManager::~FontManager() {
-	clear();
-}
+            FontGlyph *glyph = nullptr;
+            if (glyph_found != glyphs.end()) {
+                glyph = glyph_found->second;
+            }
+            else {
+                unique_glyph = getGlyphUnsupported();
+                glyph        = unique_glyph.get();
+            }
 
-void FontManager::clear() {
-	for( Font* font: fonts ) {
-		LOG_INFO("deleting font: %s", font->getName().c_str());
-		delete font;
-	}
-	fonts.clear();
-}
+            int32_t kern_value = 0;
 
-void FontManager::loadFonts( std::string baseDirectory ) {
-	fontFolder = baseDirectory+"/fonts";
-	std::vector<std::string> fontFiles = getFontsList();
+            if (i > 0) {
+                kern_value = getKerning(idLast, idCurrent);
+            }
 
-	for( std::string fontName : fontFiles ) {
-		LOG_INFO("Loading font: %s", fontName.c_str());
-		loadFont( fontName );
-	}
-}
+            if (availableSpace - (glyph->xadvance + kern_value) < 0) {
+                if (spaceConsumed) {
+                    spaceConsumed = space - availableSpace; // unreachable
+                }
+                return stringChars;
+            }
 
-Font* FontManager::loadFont( std::string filename ) {
+            availableSpace -= glyph->xadvance + kern_value;
 
-	auto file = vfs.fopen( filename.c_str(), "rb" );
+            idLast = idCurrent;
+            ++stringChars;
 
-	auto fileSize = vfs.filelength( file );
-
-	char* fontData = new char[fileSize];
-	if( fontData == nullptr ) {
-		vfs.fclose( file );
-		LOG_ERROR( " Failed to allocate temporary font buffer");
-		return nullptr;
-	}
-
-	//read data to buffer
- 	auto bytesRead= vfs.fread( fontData, 1, fileSize, file );
-
-	//close file
-	vfs.fclose( file );
-	if( bytesRead != fileSize) {
-		LOG_ERROR("Failed to read all file");
-		delete [] fontData;
-		return nullptr;
-	}
-
-	//allocate memory for new font
-	Font* font = new Font();
-	if( font->load( reinterpret_cast<uint8_t*>(fontData) ) != gui::Status::GUI_SUCCESS ){
-		delete font;
-		delete[] fontData;
-		return nullptr;
-	}
-	else {
-		//set id and push it to vector
-		font->id = fonts.size();
-		fonts.push_back( font );
-	}
-	delete[] fontData;
-	return font;
-}
-
-bool hasEnding (std::string const &fullString, std::string const &ending) {
-    if (fullString.length() >= ending.length()) {
-        return (0 == fullString.compare (fullString.length() - ending.length(), ending.length(), ending));
-    } else {
-        return false;
-    }
-}
-
-std::vector<std::string> FontManager::getFontsList() {
-
-	std::vector<std::string> fontFiles;
-
-	LOG_INFO( "Scanning fonts folder: %s", fontFolder.c_str());
-	auto dirList = vfs.listdir(fontFolder.c_str());
-
-	for( vfs::DirectoryEntry ent : dirList ) {
-		if( (ent.attributes != vfs::FileAttributes::Directory) &&
-			hasEnding( ent.fileName, ".mpf") ) {
-			fontFiles.push_back( fontFolder + "/" + ent.fileName );
-			//TODO remove commented code
-			LOG_INFO("font: %s", (fontFolder + "/" + ent.fileName).c_str());
-		}
-	}
-
-	LOG_INFO("Total number of images: %d", fontFiles.size());
-
-	return fontFiles;
-}
-
-bool FontManager::init( std::string baseDirectory ) {
-	//load fonts from specified folder
-	loadFonts(baseDirectory);
-
-	return true;
-}
-
-FontManager& FontManager::getInstance(){
-
-	static FontManager instance;
-
-	return instance;
-}
-
-Font* FontManager::getFont( uint32_t id ) {
-	if( id >= fonts.size()) {
-        LOG_ERROR("Font not found! id: %d", id);
-		return nullptr;
-    }
-	return fonts[id];
-}
-uint32_t FontManager::getFontID( const std::string& name ) {
-    bool found = false;
-    uint32_t i;
-	for( i=0; i<fonts.size(); i++ ) {
-		if( name.compare( fonts[i]->info.face ) == 0 ) {
-            found = true;
-			break;
+            // check for delimiter
+            if (idCurrent == delimiter) {
+                break;
+            }
         }
-	}
-    if(!found) {
-        LOG_ERROR("=> font not found: %s", name.c_str());
-        LOG_ERROR("Using default!");
+        spaceConsumed = space - availableSpace;
+        return stringChars;
+    }
+
+    uint32_t Font::getPixelWidth(const UTF8 &str, const uint32_t start, const uint32_t count)
+    {
+
+        if (count == 0)
+            return 0;
+
+        if (str.length() == 0)
+            return 0;
+
+        if ((start >= str.length()) || (start + count - 1 >= str.length())) {
+            LOG_ERROR("incorrect string index provided");
+            return 0;
+        }
+
+        // width of text in pixels
+        uint32_t stringPixelWidth = 0;
+        uint16_t idLast = 0, idCurrent = 0;
+
+        for (uint32_t i = 0; i < count; ++i) {
+            idCurrent        = str[start + i];
+            auto glyph_found = glyphs.find(idCurrent);
+            if (glyph_found != glyphs.end()) {
+                stringPixelWidth += getCharPixelWidth(idCurrent) + (i == 0 ? 0 : getKerning(idLast, idCurrent));
+            }
+            else {
+                stringPixelWidth += getGlyphUnsupported()->xadvance;
+            }
+            idLast = idCurrent;
+        }
+
+        return stringPixelWidth;
+    }
+
+    uint32_t Font::getPixelWidth(const UTF8 &str)
+    {
+        return getPixelWidth(str, 0, str.length());
+    }
+
+    uint32_t Font::getCharPixelWidth(uint32_t charCode)
+    {
+        FontGlyph *glyph = glyphs.find(charCode)->second;
+
+        if (glyph != NULL)
+            return glyph->xadvance;
+
         return 0;
     }
-	return i;
-}
+
+    uint32_t Font::getCharPixelHeight(uint32_t charCode)
+    {
+        FontGlyph *glyph = glyphs.find(charCode)->second;
+
+        if (glyph != NULL)
+            return glyph->height;
+
+        return 0;
+    }
+    std::unique_ptr<FontGlyph> Font::getGlyphUnsupported() const
+    {
+        std::unique_ptr<FontGlyph> unsupported = std::make_unique<FontGlyph>();
+
+        const float pt_to_px                           = 0.75;
+        unsupported->height                            = this->info.size * pt_to_px;
+        const float typical_width_as_percent_of_height = 0.62;
+        unsupported->width                             = unsupported->height * typical_width_as_percent_of_height;
+        unsupported->xoffset                           = 0;
+        unsupported->yoffset                           = 0;
+
+        // generate a rectangle based on an existing letter. otherwise use some magic numbers ↑ to approximate the size
+        // for the rectangle
+        char baseChar = 'h'; // arbitrary choice. h as a representative character to get an idea of glyph size. if not
+                             // found, then use magic numbers above
+        auto baseCharFound = this->glyphs.find(baseChar);
+        if (baseCharFound != this->glyphs.end()) {
+            FontGlyph *baseGlyph = baseCharFound->second;
+            unsupported->width   = baseGlyph->width;
+            unsupported->height  = baseGlyph->height;
+            unsupported->xoffset = (baseGlyph->xadvance - baseGlyph->width) / 2;
+        }
+        if (unsupported->xoffset == 0) {
+            unsupported->xoffset = 1; // fallback margin.
+        }
+        unsupported->yoffset += unsupported->height;
+        unsupported->xadvance =
+            unsupported->width + (2 * unsupported->xoffset); // use xoffset as margins on the left/right of the glyph
+        // populate with a bitmap (glyph)
+        CommandRectangle *commandRect = new CommandRectangle();
+        commandRect->x                = 0;
+        commandRect->y                = 0;
+        commandRect->w                = unsupported->width;
+        commandRect->h                = unsupported->height;
+        commandRect->areaX            = 0;
+        commandRect->areaY            = 0;
+        commandRect->areaW            = unsupported->width;
+        commandRect->areaH            = unsupported->height;
+        commandRect->penWidth         = unsupported->xoffset;
+
+        Context *renderCtx                       = new Context(unsupported->width, unsupported->height);
+        std::vector<gui::DrawCommand *> commands = {commandRect};
+        Renderer().render(renderCtx, commands);
+
+        unsupported->data = renderCtx->getData();
+
+        return std::move(unsupported);
+    }
+
+    FontManager::FontManager()
+    {}
+
+    FontManager::~FontManager()
+    {
+        clear();
+    }
+
+    void FontManager::clear()
+    {
+        for (Font *font : fonts) {
+            LOG_INFO("deleting font: %s", font->getName().c_str());
+            delete font;
+        }
+        fonts.clear();
+    }
+
+    void FontManager::loadFonts(std::string baseDirectory)
+    {
+        fontFolder                         = baseDirectory + "/fonts";
+        std::vector<std::string> fontFiles = getFontsList();
+
+        for (std::string fontName : fontFiles) {
+            LOG_INFO("Loading font: %s", fontName.c_str());
+            loadFont(fontName);
+        }
+    }
+
+    Font *FontManager::loadFont(std::string filename)
+    {
+
+        auto file = vfs.fopen(filename.c_str(), "rb");
+
+        auto fileSize = vfs.filelength(file);
+
+        char *fontData = new char[fileSize];
+        if (fontData == nullptr) {
+            vfs.fclose(file);
+            LOG_ERROR(" Failed to allocate temporary font buffer");
+            return nullptr;
+        }
+
+        // read data to buffer
+        auto bytesRead = vfs.fread(fontData, 1, fileSize, file);
+
+        // close file
+        vfs.fclose(file);
+        if (bytesRead != fileSize) {
+            LOG_ERROR("Failed to read all file");
+            delete[] fontData;
+            return nullptr;
+        }
+
+        // allocate memory for new font
+        Font *font = new Font();
+        if (font->load(reinterpret_cast<uint8_t *>(fontData)) != gui::Status::GUI_SUCCESS) {
+            delete font;
+            delete[] fontData;
+            return nullptr;
+        }
+        else {
+            // set id and push it to vector
+            font->id = fonts.size();
+            fonts.push_back(font);
+        }
+        delete[] fontData;
+        return font;
+    }
+
+    bool hasEnding(std::string const &fullString, std::string const &ending)
+    {
+        if (fullString.length() >= ending.length()) {
+            return (0 == fullString.compare(fullString.length() - ending.length(), ending.length(), ending));
+        }
+        else {
+            return false;
+        }
+    }
+
+    std::vector<std::string> FontManager::getFontsList()
+    {
+
+        std::vector<std::string> fontFiles;
+
+        LOG_INFO("Scanning fonts folder: %s", fontFolder.c_str());
+        auto dirList = vfs.listdir(fontFolder.c_str());
+
+        for (vfs::DirectoryEntry ent : dirList) {
+            if ((ent.attributes != vfs::FileAttributes::Directory) && hasEnding(ent.fileName, ".mpf")) {
+                fontFiles.push_back(fontFolder + "/" + ent.fileName);
+                // TODO remove commented code
+                LOG_INFO("font: %s", (fontFolder + "/" + ent.fileName).c_str());
+            }
+        }
+
+        LOG_INFO("Total number of images: %d", fontFiles.size());
+
+        return fontFiles;
+    }
+
+    bool FontManager::init(std::string baseDirectory)
+    {
+        // load fonts from specified folder
+        loadFonts(baseDirectory);
+
+        return true;
+    }
+
+    FontManager &FontManager::getInstance()
+    {
+
+        static FontManager instance;
+
+        return instance;
+    }
+
+    Font *FontManager::getFont(uint32_t id)
+    {
+        if (id >= fonts.size()) {
+            LOG_ERROR("Font not found! id: %d", id);
+            return nullptr;
+        }
+        return fonts[id];
+    }
+    uint32_t FontManager::getFontID(const std::string &name)
+    {
+        bool found = false;
+        uint32_t i;
+        for (i = 0; i < fonts.size(); i++) {
+            if (name.compare(fonts[i]->info.face) == 0) {
+                found = true;
+                break;
+            }
+        }
+        if (!found) {
+            LOG_ERROR("=> font not found: %s", name.c_str());
+            LOG_ERROR("Using default!");
+            return 0;
+        }
+        return i;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/Font.hpp b/module-gui/gui/core/Font.hpp
index fb9e7e3bd..d5bcc0f4f 100644
--- a/module-gui/gui/core/Font.hpp
+++ b/module-gui/gui/core/Font.hpp
@@ -17,161 +17,171 @@
 #include <string>
 #include <vector>
 
-namespace gui {
+namespace gui
+{
 
-class FontGlyph {
-public:
-	virtual ~FontGlyph();
-	gui::Status load( uint8_t* data, uint32_t& offset );
-	gui::Status loadImage( uint8_t* data, uint32_t offset );
-	//character id
-	uint16_t id;
-	//offset in glyph data field
-	uint32_t glyph_offset;
-	//width of the character image in the texture
-	uint16_t width;
-	//height of the character image in the texture
-	uint16_t height;
-	//how much the current position should be offset when copying the image from the texture to the screen
-	int16_t xoffset;
-	//how much the current position should be offset when copying the image from the texture to the screen
-	int16_t yoffset;
-	//how much the current position should be advanced after drawing the character
-	uint16_t xadvance;
-	//image data of the glyph
-	uint8_t* data;
-};
-
-class FontKerning {
-public:
-	gui::Status load( uint8_t* data, uint32_t& offset );
-	//utf16 id of the first character
-	uint16_t first;
-	//utf16 id of the following character
-	uint16_t second;
-	//distance in pixels between beginning of first character and beginning of second character
-	int16_t amount;
-};
-
-class FontInfo {
-public:
-
-	gui::Status load( uint8_t* data, uint32_t& offset );
-	//name of the true type font. max 63 characters
-	std::string face;
-	//size of the true type font
-	uint16_t size;
-	//flag that informs if font is bold
-	uint16_t bold;
-	//flag that informs if font is italic
-	uint16_t italic;
-	//flag that informs if smoothing was turned on. 1 - smoothing was turned on.
-	uint16_t smooth;
-	//TODO additional space between characters????
-	uint16_t char_spacing;
-	//TODO additional space between lines
-	uint16_t line_spacing;
-	//distance in pixels between each line of text
-	uint16_t line_height;
-	//number of pixels from the absolute top of the line to the base of the characters
-	uint16_t base;
-	//width of the texture, normally used to scale the x pos of the character image
-	uint16_t scale_w;
-	//height of the texture, normally used to scale the y pos of the character image
-	uint16_t scale_h;
-};
-
-class Font {
-public:
-	virtual ~Font();
-
-	gui::Status load( uint8_t* data );
-
-	//structure holding detailed information about font
-	FontInfo info;
-	//number of glyphs in the fontno
-	uint32_t glyph_count;
-	//offset to the beginning of the glyph data
-	uint32_t glyph_data_offset;
-	//number of kerning pairs
-	uint32_t kern_count;
-	//array of glyphs structures
-	uint32_t kern_data_offset;
-	//offset to the beginning of the image data
-	uint32_t image_data_offset;
-	//id of the font asigned by the font manager
-	uint32_t id;
-	std::map< uint32_t, FontGlyph* > glyphs;
-	std::map< uint32_t, std::map< uint32_t, FontKerning* >* > kerning;
-
-	/**
-	 * @brief Returns kerning value for pair of the two characters.
-	 * @param id1 Code of the first character.
-	 * @param id2 Code of the second character.
-	 * @return Value of the kerning or 0 if pair was not found.
-	 */
-	int32_t getKerning( uint32_t id1, uint32_t id2 );
-	/**
-	 * @brief Method calculates how many chars will fit specified width using current font.
-	 * @param str UTF8 string that will be used to calculate how many chars can fit provided space.
-	 * @param space Number of pixels in width availabale to calculate how many chars will fit.
-	 * @param spaceConsumed Space actually consumed by characters.
-	 * @param delimiter Optional character that stops operation. This character will be the last included character
-	 * @return number of chars that can fit provided space;
-	 */
-	uint32_t getCharCountInSpace( const UTF8& str, const uint32_t space, uint32_t& spaceConsumed, const bool fromBeginning = true, const uint32_t& delimiter = 0);
-	/**
-	 * @brief Calculates how many pixels will occupy selected part of the string.
-	 * @param str String used as a source of text.
-	 * @param start Starting index used to calculate number of occupied pixels in width.
-	 * @param count Number of characters that should be used during calculating pixels width.
-	 * @return Number of pixels in width occupied by selected part of the text.
-	 */
-	uint32_t getPixelWidth( const UTF8& str, const uint32_t start, const uint32_t count );
-	/**
-	 * @brief Calculates how many pixels will occupy string.
-	 * @param str String used as a source of text.
-	 * @return Number of pixels in width occupied by string.
-	 */
-	uint32_t getPixelWidth( const UTF8& str );
-	/**
-	 * @brief returns number of pixels occupied by character horizontally.
-	 */
-	uint32_t getCharPixelWidth( uint32_t charCode );
-	/**
-	 * @brief Returns number of pixels occupied by the character vertically.
-	 */
-	uint32_t getCharPixelHeight( uint32_t charCode );
-    const std::string getName()
+    class FontGlyph
     {
-        return info.face;
-    }
-    std::unique_ptr<FontGlyph> getGlyphUnsupported() const;
-};
+      public:
+        virtual ~FontGlyph();
+        gui::Status load(uint8_t *data, uint32_t &offset);
+        gui::Status loadImage(uint8_t *data, uint32_t offset);
+        // character id
+        uint16_t id;
+        // offset in glyph data field
+        uint32_t glyph_offset;
+        // width of the character image in the texture
+        uint16_t width;
+        // height of the character image in the texture
+        uint16_t height;
+        // how much the current position should be offset when copying the image from the texture to the screen
+        int16_t xoffset;
+        // how much the current position should be offset when copying the image from the texture to the screen
+        int16_t yoffset;
+        // how much the current position should be advanced after drawing the character
+        uint16_t xadvance;
+        // image data of the glyph
+        uint8_t *data;
+    };
 
-class FontManager {
-protected:
-	std::string fontFolder;
-	std::vector<Font*> fonts;
-	std::vector<std::string> getFontsList();
+    class FontKerning
+    {
+      public:
+        gui::Status load(uint8_t *data, uint32_t &offset);
+        // utf16 id of the first character
+        uint16_t first;
+        // utf16 id of the following character
+        uint16_t second;
+        // distance in pixels between beginning of first character and beginning of second character
+        int16_t amount;
+    };
 
-	Font* loadFont( std::string filename );
-	void loadFonts( std::string baseDirectory );
+    class FontInfo
+    {
+      public:
+        gui::Status load(uint8_t *data, uint32_t &offset);
+        // name of the true type font. max 63 characters
+        std::string face;
+        // size of the true type font
+        uint16_t size;
+        // flag that informs if font is bold
+        uint16_t bold;
+        // flag that informs if font is italic
+        uint16_t italic;
+        // flag that informs if smoothing was turned on. 1 - smoothing was turned on.
+        uint16_t smooth;
+        // TODO additional space between characters????
+        uint16_t char_spacing;
+        // TODO additional space between lines
+        uint16_t line_spacing;
+        // distance in pixels between each line of text
+        uint16_t line_height;
+        // number of pixels from the absolute top of the line to the base of the characters
+        uint16_t base;
+        // width of the texture, normally used to scale the x pos of the character image
+        uint16_t scale_w;
+        // height of the texture, normally used to scale the y pos of the character image
+        uint16_t scale_h;
+    };
 
-	FontManager();
-public:
-	FontManager( const FontManager& ) = delete;
-	void operator= (const FontManager& ) = delete;
+    class Font
+    {
+      public:
+        virtual ~Font();
 
-	bool init( std::string baseDirectory );
-	void clear();
-	static FontManager& getInstance();
+        gui::Status load(uint8_t *data);
 
-	virtual ~FontManager();
+        // structure holding detailed information about font
+        FontInfo info;
+        // number of glyphs in the fontno
+        uint32_t glyph_count;
+        // offset to the beginning of the glyph data
+        uint32_t glyph_data_offset;
+        // number of kerning pairs
+        uint32_t kern_count;
+        // array of glyphs structures
+        uint32_t kern_data_offset;
+        // offset to the beginning of the image data
+        uint32_t image_data_offset;
+        // id of the font asigned by the font manager
+        uint32_t id;
+        std::map<uint32_t, FontGlyph *> glyphs;
+        std::map<uint32_t, std::map<uint32_t, FontKerning *> *> kerning;
 
-	Font* getFont( uint32_t id );
-	uint32_t getFontID( const std::string& name );
-};
+        /**
+         * @brief Returns kerning value for pair of the two characters.
+         * @param id1 Code of the first character.
+         * @param id2 Code of the second character.
+         * @return Value of the kerning or 0 if pair was not found.
+         */
+        int32_t getKerning(uint32_t id1, uint32_t id2);
+        /**
+         * @brief Method calculates how many chars will fit specified width using current font.
+         * @param str UTF8 string that will be used to calculate how many chars can fit provided space.
+         * @param space Number of pixels in width availabale to calculate how many chars will fit.
+         * @param spaceConsumed Space actually consumed by characters.
+         * @param delimiter Optional character that stops operation. This character will be the last included character
+         * @return number of chars that can fit provided space;
+         */
+        uint32_t getCharCountInSpace(const UTF8 &str,
+                                     const uint32_t space,
+                                     uint32_t &spaceConsumed,
+                                     const bool fromBeginning  = true,
+                                     const uint32_t &delimiter = 0);
+        /**
+         * @brief Calculates how many pixels will occupy selected part of the string.
+         * @param str String used as a source of text.
+         * @param start Starting index used to calculate number of occupied pixels in width.
+         * @param count Number of characters that should be used during calculating pixels width.
+         * @return Number of pixels in width occupied by selected part of the text.
+         */
+        uint32_t getPixelWidth(const UTF8 &str, const uint32_t start, const uint32_t count);
+        /**
+         * @brief Calculates how many pixels will occupy string.
+         * @param str String used as a source of text.
+         * @return Number of pixels in width occupied by string.
+         */
+        uint32_t getPixelWidth(const UTF8 &str);
+        /**
+         * @brief returns number of pixels occupied by character horizontally.
+         */
+        uint32_t getCharPixelWidth(uint32_t charCode);
+        /**
+         * @brief Returns number of pixels occupied by the character vertically.
+         */
+        uint32_t getCharPixelHeight(uint32_t charCode);
+        const std::string getName()
+        {
+            return info.face;
+        }
+        std::unique_ptr<FontGlyph> getGlyphUnsupported() const;
+    };
+
+    class FontManager
+    {
+      protected:
+        std::string fontFolder;
+        std::vector<Font *> fonts;
+        std::vector<std::string> getFontsList();
+
+        Font *loadFont(std::string filename);
+        void loadFonts(std::string baseDirectory);
+
+        FontManager();
+
+      public:
+        FontManager(const FontManager &) = delete;
+        void operator=(const FontManager &) = delete;
+
+        bool init(std::string baseDirectory);
+        void clear();
+        static FontManager &getInstance();
+
+        virtual ~FontManager();
+
+        Font *getFont(uint32_t id);
+        uint32_t getFontID(const std::string &name);
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/ImageManager.cpp b/module-gui/gui/core/ImageManager.cpp
index 1bc35726d..c0981f992 100644
--- a/module-gui/gui/core/ImageManager.cpp
+++ b/module-gui/gui/core/ImageManager.cpp
@@ -13,199 +13,202 @@
 #include "ImageManager.hpp"
 #include "utf8/UTF8.hpp"
 #include "log/log.hpp"
-//module-gui
+// module-gui
 #include "ImageMap.hpp"
 #include "VecMap.hpp"
 #include "PixMap.hpp"
 #include "vfs.hpp"
 
-namespace gui {
-
-ImageManager::ImageManager() {
-}
-
-ImageManager::~ImageManager() {
-	clear();
-}
-
-void ImageManager::loadImageMaps( std::string baseDirectory ) {
-	mapFolder = baseDirectory+"/images";
-	std::vector<std::string> pixMapFiles = getImageMapList(".mpi");
-	std::vector<std::string> vecMapFiles = getImageMapList(".vpi");
-
-	for( std::string mapName : pixMapFiles ) {
-		loadPixMap( mapName );
-	}
-	for( std::string mapName : vecMapFiles ) {
-		loadVecMap( mapName );
-	}
-}
-
-void ImageManager::clear() {
-	for( ImageMap* imageMap: imageMaps ) {
-		LOG_INFO("deleting image: %s", imageMap->getName().c_str());
-		delete imageMap;
-	}
-	imageMaps.clear();
-}
-
-
-std::vector<std::string> splitpath(
-  const std::string& str
-  , const std::set<char> delimiters)
+namespace gui
 {
-  std::vector<std::string> result;
 
-  char const* pch = str.c_str();
-  char const* start = pch;
-  for(; *pch; ++pch)
-  {
-    if (delimiters.find(*pch) != delimiters.end())
+    ImageManager::ImageManager()
+    {}
+
+    ImageManager::~ImageManager()
     {
-      if (start != pch)
-      {
-        std::string str(start, pch);
-        result.push_back(str);
-      }
-      else
-      {
-        result.push_back("");
-      }
-      start = pch + 1;
+        clear();
     }
-  }
-  result.push_back(start);
 
-  return result;
-}
+    void ImageManager::loadImageMaps(std::string baseDirectory)
+    {
+        mapFolder                            = baseDirectory + "/images";
+        std::vector<std::string> pixMapFiles = getImageMapList(".mpi");
+        std::vector<std::string> vecMapFiles = getImageMapList(".vpi");
 
+        for (std::string mapName : pixMapFiles) {
+            loadPixMap(mapName);
+        }
+        for (std::string mapName : vecMapFiles) {
+            loadVecMap(mapName);
+        }
+    }
 
-ImageMap* ImageManager::loadPixMap( std::string filename ) {
+    void ImageManager::clear()
+    {
+        for (ImageMap *imageMap : imageMaps) {
+            LOG_INFO("deleting image: %s", imageMap->getName().c_str());
+            delete imageMap;
+        }
+        imageMaps.clear();
+    }
 
-	auto file = vfs.fopen( filename.c_str(), "rb" );
+    std::vector<std::string> splitpath(const std::string &str, const std::set<char> delimiters)
+    {
+        std::vector<std::string> result;
 
-	auto fileSize = vfs.filelength( file );
+        char const *pch   = str.c_str();
+        char const *start = pch;
+        for (; *pch; ++pch) {
+            if (delimiters.find(*pch) != delimiters.end()) {
+                if (start != pch) {
+                    std::string str(start, pch);
+                    result.push_back(str);
+                }
+                else {
+                    result.push_back("");
+                }
+                start = pch + 1;
+            }
+        }
+        result.push_back(start);
 
-	char* data = new char[fileSize];
-	if( data == nullptr ) {
-		vfs.fclose( file );
-		LOG_ERROR( " Failed to allocate temporary font buffer");
-		return nullptr;
-	}
+        return result;
+    }
 
-	//read data to buffer
-	vfs.fread( data, 1, fileSize, file );
+    ImageMap *ImageManager::loadPixMap(std::string filename)
+    {
 
-	//close file
-	vfs.fclose( file );
+        auto file = vfs.fopen(filename.c_str(), "rb");
 
-	//allocate memory for new font
-	PixMap* pixMap = new PixMap();
-	if( pixMap->load( reinterpret_cast<uint8_t*>(data), fileSize ) != gui::Status::GUI_SUCCESS ){
-		delete pixMap;
-		delete[] data;
-		return nullptr;
-	}
-	else {
-		//set id and push it to vector
-		pixMap->setID( imageMaps.size());
-		std::set<char> delims{'/'};
-		std::vector<std::string> path = splitpath( filename, delims);
-		std::string filename = path[path.size()-1];
-		filename = filename.substr( 0, filename.length()-4);
+        auto fileSize = vfs.filelength(file);
 
-   		pixMap->setName( filename );
-		//TODO remove commented code
-		LOG_INFO("%s",filename.c_str());
-		imageMaps.push_back( pixMap );
-	}
-	delete[] data;
-	return pixMap;
-}
+        char *data = new char[fileSize];
+        if (data == nullptr) {
+            vfs.fclose(file);
+            LOG_ERROR(" Failed to allocate temporary font buffer");
+            return nullptr;
+        }
 
-ImageMap* ImageManager::loadVecMap( std::string filename ) {
+        // read data to buffer
+        vfs.fread(data, 1, fileSize, file);
 
-	auto file = vfs.fopen( filename.c_str(), "rb" );
+        // close file
+        vfs.fclose(file);
 
-	auto fileSize = vfs.filelength( file );
+        // allocate memory for new font
+        PixMap *pixMap = new PixMap();
+        if (pixMap->load(reinterpret_cast<uint8_t *>(data), fileSize) != gui::Status::GUI_SUCCESS) {
+            delete pixMap;
+            delete[] data;
+            return nullptr;
+        }
+        else {
+            // set id and push it to vector
+            pixMap->setID(imageMaps.size());
+            std::set<char> delims{'/'};
+            std::vector<std::string> path = splitpath(filename, delims);
+            std::string filename          = path[path.size() - 1];
+            filename                      = filename.substr(0, filename.length() - 4);
 
-	char* data = new char[fileSize];
-	if( data == nullptr ) {
-		vfs.fclose( file );
-		LOG_ERROR( " Failed to allocate temporary font buffer");
-		return nullptr;
-	}
+            pixMap->setName(filename);
+            // TODO remove commented code
+            LOG_INFO("%s", filename.c_str());
+            imageMaps.push_back(pixMap);
+        }
+        delete[] data;
+        return pixMap;
+    }
 
-	//read data to buffer
-	vfs.fread( data, 1, fileSize, file );
+    ImageMap *ImageManager::loadVecMap(std::string filename)
+    {
 
-	//close file
-	vfs.fclose( file );
+        auto file = vfs.fopen(filename.c_str(), "rb");
 
-	VecMap* vecMap = new VecMap();
-	if( vecMap->load( reinterpret_cast<uint8_t*>(data), fileSize ) != gui::Status::GUI_SUCCESS ){
-		delete vecMap;
-		delete[] data;
-		return nullptr;
-	}
-	else {
-		//set id and push it to vector
-		vecMap->setID( imageMaps.size());
-		std::set<char> delims{'/'};
-		std::vector<std::string> path = splitpath( filename, delims);
-		std::string filename = path[path.size()-1];
-		filename = filename.substr( 0, filename.length()-4);
-		vecMap->setName( filename );
-		//TODO remove commented code
-//		LOG_INFO("%s",filename.c_str());
-		imageMaps.push_back( vecMap );
-	}
-	delete[] data;
-	return vecMap;
-}
+        auto fileSize = vfs.filelength(file);
 
-std::vector<std::string> ImageManager::getImageMapList(std::string ext) {
+        char *data = new char[fileSize];
+        if (data == nullptr) {
+            vfs.fclose(file);
+            LOG_ERROR(" Failed to allocate temporary font buffer");
+            return nullptr;
+        }
 
-	std::vector<std::string> mapFiles;
+        // read data to buffer
+        vfs.fread(data, 1, fileSize, file);
 
-	LOG_INFO( "Scanning %s images folder: %s", ext.c_str(), mapFolder.c_str());
-	auto dirList = vfs.listdir(mapFolder.c_str(), ext );
+        // close file
+        vfs.fclose(file);
 
-	for( vfs::DirectoryEntry ent : dirList ) {
-		if( ent.attributes != vfs::FileAttributes::Directory)
-			mapFiles.push_back( mapFolder + "/" + ent.fileName );
-	}
+        VecMap *vecMap = new VecMap();
+        if (vecMap->load(reinterpret_cast<uint8_t *>(data), fileSize) != gui::Status::GUI_SUCCESS) {
+            delete vecMap;
+            delete[] data;
+            return nullptr;
+        }
+        else {
+            // set id and push it to vector
+            vecMap->setID(imageMaps.size());
+            std::set<char> delims{'/'};
+            std::vector<std::string> path = splitpath(filename, delims);
+            std::string filename          = path[path.size() - 1];
+            filename                      = filename.substr(0, filename.length() - 4);
+            vecMap->setName(filename);
+            // TODO remove commented code
+            //		LOG_INFO("%s",filename.c_str());
+            imageMaps.push_back(vecMap);
+        }
+        delete[] data;
+        return vecMap;
+    }
 
-	LOG_INFO("Total number of images: %d", mapFiles.size());
+    std::vector<std::string> ImageManager::getImageMapList(std::string ext)
+    {
 
-	return mapFiles;
-}
+        std::vector<std::string> mapFiles;
 
-bool ImageManager::init( std::string baseDirectory ) {
-	//load fonts from specified folder
-	loadImageMaps(baseDirectory);
+        LOG_INFO("Scanning %s images folder: %s", ext.c_str(), mapFolder.c_str());
+        auto dirList = vfs.listdir(mapFolder.c_str(), ext);
 
-	return true;
-}
+        for (vfs::DirectoryEntry ent : dirList) {
+            if (ent.attributes != vfs::FileAttributes::Directory)
+                mapFiles.push_back(mapFolder + "/" + ent.fileName);
+        }
 
-ImageManager& ImageManager::getInstance(){
+        LOG_INFO("Total number of images: %d", mapFiles.size());
 
-	static ImageManager instance;
+        return mapFiles;
+    }
 
-	return instance;
-}
+    bool ImageManager::init(std::string baseDirectory)
+    {
+        // load fonts from specified folder
+        loadImageMaps(baseDirectory);
 
-ImageMap* ImageManager::getImageMap( uint32_t id ) {
-	if( id >= imageMaps.size())
-		return nullptr;
-	return imageMaps[id];
-}
-uint32_t ImageManager::getImageMapID( const std::string& name ) {
-	for( uint32_t i=0; i<imageMaps.size(); i++ ) {
-		if( name.compare( imageMaps[i]->getName() ) == 0 )
-			return i;
-	}
-	return 0;
-}
+        return true;
+    }
+
+    ImageManager &ImageManager::getInstance()
+    {
+
+        static ImageManager instance;
+
+        return instance;
+    }
+
+    ImageMap *ImageManager::getImageMap(uint32_t id)
+    {
+        if (id >= imageMaps.size())
+            return nullptr;
+        return imageMaps[id];
+    }
+    uint32_t ImageManager::getImageMapID(const std::string &name)
+    {
+        for (uint32_t i = 0; i < imageMaps.size(); i++) {
+            if (name.compare(imageMaps[i]->getName()) == 0)
+                return i;
+        }
+        return 0;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/ImageManager.hpp b/module-gui/gui/core/ImageManager.hpp
index bac571d57..e68fd7d09 100644
--- a/module-gui/gui/core/ImageManager.hpp
+++ b/module-gui/gui/core/ImageManager.hpp
@@ -15,33 +15,36 @@
 
 #include "ImageMap.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ImageManager {
-protected:
-	std::string mapFolder;
-	std::vector<ImageMap*> imageMaps;
+    class ImageManager
+    {
+      protected:
+        std::string mapFolder;
+        std::vector<ImageMap *> imageMaps;
 
-	std::vector<std::string> getImageMapList(std::string ext);
+        std::vector<std::string> getImageMapList(std::string ext);
 
-	ImageMap* loadPixMap( std::string filename );
-	ImageMap* loadVecMap( std::string filename );
-	void loadImageMaps( std::string baseDirectory );
+        ImageMap *loadPixMap(std::string filename);
+        ImageMap *loadVecMap(std::string filename);
+        void loadImageMaps(std::string baseDirectory);
 
-	ImageManager();
-public:
-	ImageManager( const ImageManager& ) = delete;
-	void operator= (const ImageManager& ) = delete;
+        ImageManager();
 
-	bool init( std::string baseDirectory );
-	static ImageManager& getInstance();
+      public:
+        ImageManager(const ImageManager &) = delete;
+        void operator=(const ImageManager &) = delete;
 
-	virtual ~ImageManager();
+        bool init(std::string baseDirectory);
+        static ImageManager &getInstance();
 
-	ImageMap* getImageMap( uint32_t id );
-	uint32_t getImageMapID( const std::string& name );
-	void clear();
-};
+        virtual ~ImageManager();
+
+        ImageMap *getImageMap(uint32_t id);
+        uint32_t getImageMapID(const std::string &name);
+        void clear();
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/ImageMap.cpp b/module-gui/gui/core/ImageMap.cpp
index dce8b0b8f..01fd19b8d 100644
--- a/module-gui/gui/core/ImageMap.cpp
+++ b/module-gui/gui/core/ImageMap.cpp
@@ -8,16 +8,19 @@
  */
 #include "ImageMap.hpp"
 
-namespace gui {
+namespace gui
+{
 
-ImageMap::ImageMap() : id{0},  width{ 0 }, height{0}, data{nullptr}, name{""} {}
+    ImageMap::ImageMap() : id{0}, width{0}, height{0}, data{nullptr}, name{""}
+    {}
 
-ImageMap::ImageMap( uint16_t w, uint16_t h, uint8_t* data ) : id{0}, width{ w }, height{ h }, name{""} {
-}
+    ImageMap::ImageMap(uint16_t w, uint16_t h, uint8_t *data) : id{0}, width{w}, height{h}, name{""}
+    {}
 
-ImageMap::~ImageMap() {
-	if( data )
-		delete []data;
-	data = nullptr;
-}
+    ImageMap::~ImageMap()
+    {
+        if (data)
+            delete[] data;
+        data = nullptr;
+    }
 } /* namespace gui */
diff --git a/module-gui/gui/core/ImageMap.hpp b/module-gui/gui/core/ImageMap.hpp
index 8f7be0736..f0d399747 100644
--- a/module-gui/gui/core/ImageMap.hpp
+++ b/module-gui/gui/core/ImageMap.hpp
@@ -13,49 +13,80 @@
 #include <string>
 #include "../Common.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class ImageMap {
-public:
-	enum class Type {
-		NONE,
-		PIXMAP,
-		VECMAP
-	};
-protected:
-	//id of the pixmap asigned by the pixmap manager
-	uint32_t id;
-	//number of columns in the pixmap
-	uint16_t width;
-	//number of rows in the image
-	uint16_t height;
-	//data of the image
-	uint8_t* data = nullptr;
-	//file name
-	std::string name;
-	//type of the image
-	Type type = Type::NONE;
-public:
-	ImageMap();
-	ImageMap( uint16_t w, uint16_t h, uint8_t* data );
-	virtual ~ImageMap();
+    /*
+     *
+     */
+    class ImageMap
+    {
+      public:
+        enum class Type
+        {
+            NONE,
+            PIXMAP,
+            VECMAP
+        };
 
-	Type getType() { return type; };
-	uint16_t getWidth() { return width; };
-	uint16_t getHeight() { return height; };
-	uint8_t* getData(){ return data; };
-	std::string getName() { return name; };
-	uint32_t getID() { return id; };
+      protected:
+        // id of the pixmap asigned by the pixmap manager
+        uint32_t id;
+        // number of columns in the pixmap
+        uint16_t width;
+        // number of rows in the image
+        uint16_t height;
+        // data of the image
+        uint8_t *data = nullptr;
+        // file name
+        std::string name;
+        // type of the image
+        Type type = Type::NONE;
 
-	void setID( uint32_t id ) { this->id = id; };
-	void setName( std::string name ){ this->name = name; };
+      public:
+        ImageMap();
+        ImageMap(uint16_t w, uint16_t h, uint8_t *data);
+        virtual ~ImageMap();
 
-	virtual gui::Status load( uint8_t* data, uint32_t size=0 ) { return gui::Status::GUI_SUCCESS; };
+        Type getType()
+        {
+            return type;
+        };
+        uint16_t getWidth()
+        {
+            return width;
+        };
+        uint16_t getHeight()
+        {
+            return height;
+        };
+        uint8_t *getData()
+        {
+            return data;
+        };
+        std::string getName()
+        {
+            return name;
+        };
+        uint32_t getID()
+        {
+            return id;
+        };
 
-};
+        void setID(uint32_t id)
+        {
+            this->id = id;
+        };
+        void setName(std::string name)
+        {
+            this->name = name;
+        };
+
+        virtual gui::Status load(uint8_t *data, uint32_t size = 0)
+        {
+            return gui::Status::GUI_SUCCESS;
+        };
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/PixMap.cpp b/module-gui/gui/core/PixMap.cpp
index ab4899d16..fea19d4bd 100644
--- a/module-gui/gui/core/PixMap.cpp
+++ b/module-gui/gui/core/PixMap.cpp
@@ -7,42 +7,50 @@
 #include <string.h>
 #include "PixMap.hpp"
 
-namespace gui {
+namespace gui
+{
 
-PixMap::PixMap() {
-	width = 0;
-	height = 0;
-	name = "";
+    PixMap::PixMap()
+    {
+        width  = 0;
+        height = 0;
+        name   = "";
 
-	type = Type::PIXMAP;
-}
+        type = Type::PIXMAP;
+    }
 
-PixMap::PixMap( uint16_t w, uint16_t h, uint8_t* data ) :
-	ImageMap( w, h, data ) {
+    PixMap::PixMap(uint16_t w, uint16_t h, uint8_t *data) : ImageMap(w, h, data)
+    {
 
-	this->data = new uint8_t[width*height];
-	type = Type::PIXMAP;
+        this->data = new uint8_t[width * height];
+        type       = Type::PIXMAP;
 
-	//no data provided - allocat buffer and clear it with white color
-	if( data == nullptr ) {
-		if( this->data ) memset( this->data, 0x0F, width*height );
-	}
-	else {
-		if( this->data ) memcpy( this->data, data, width*height );
-	}
-}
+        // no data provided - allocat buffer and clear it with white color
+        if (data == nullptr) {
+            if (this->data)
+                memset(this->data, 0x0F, width * height);
+        }
+        else {
+            if (this->data)
+                memcpy(this->data, data, width * height);
+        }
+    }
 
-gui::Status PixMap::load( uint8_t* data, uint32_t size ) {
+    gui::Status PixMap::load(uint8_t *data, uint32_t size)
+    {
 
-	uint32_t offset = 0;
+        uint32_t offset = 0;
 
-	//read width and height of the image
-	memcpy( &width, data + offset, sizeof(uint16_t)); offset += sizeof(uint16_t);
-	memcpy( &height, data + offset, sizeof(uint16_t)); offset += sizeof(uint16_t);
+        // read width and height of the image
+        memcpy(&width, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        memcpy(&height, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
 
-	this->data = new uint8_t[width*height];
-	if( this->data ) memcpy( this->data, data + offset, width*height );
+        this->data = new uint8_t[width * height];
+        if (this->data)
+            memcpy(this->data, data + offset, width * height);
 
-	return gui::Status::GUI_SUCCESS;
-}
+        return gui::Status::GUI_SUCCESS;
+    }
 } /* namespace gui */
diff --git a/module-gui/gui/core/PixMap.hpp b/module-gui/gui/core/PixMap.hpp
index c3d61059c..dd1c43fff 100644
--- a/module-gui/gui/core/PixMap.hpp
+++ b/module-gui/gui/core/PixMap.hpp
@@ -16,7 +16,8 @@
 
 #include "../Common.hpp"
 
-namespace gui {
+namespace gui
+{
 
     /// Pixel map item (*.mpi extension) loaded by `ImageManager::loadVecMap`
     class PixMap : public ImageMap
diff --git a/module-gui/gui/core/Renderer.cpp b/module-gui/gui/core/Renderer.cpp
index 375224f18..198b12ade 100644
--- a/module-gui/gui/core/Renderer.cpp
+++ b/module-gui/gui/core/Renderer.cpp
@@ -5,12 +5,13 @@
  *      Author: robert
  */
 
-extern "C" {
+extern "C"
+{
 #include "FreeRTOS.h"
 #include "task.h"
 }
 
-//for memset
+// for memset
 #include <string.h>
 #include "Color.hpp"
 #include "Renderer.hpp"
@@ -18,832 +19,969 @@ extern "C" {
 #include "Font.hpp"
 #include "ImageManager.hpp"
 #include "../Common.hpp"
-//utils
+// utils
 #include "log/log.hpp"
 
 #include "PixMap.hpp"
 #include "VecMap.hpp"
-//module-utils
+// module-utils
 #include "utf8/UTF8.hpp"
 #include <cassert>
 
-namespace gui {
+namespace gui
+{
 
-Renderer::Renderer() {
-	// TODO Auto-generated constructor stub
-
-}
-
-Renderer::~Renderer() {
-	// TODO Auto-generated destructor stub
-}
-
-void Renderer::drawLine( Context* ctx, CommandLine* cmd ) {
-
-}
-
-//any checks are not performed as this should be done by function handling draw command
-void Renderer::drawHorizontalLine( Context* ctx, int16_t x, int16_t y,
-	uint16_t width, uint16_t penWidth,
-	Color color, LineExpansionDirection dir ) {
-
-	//if color is fully transparent - return
-	if( color.alpha == 0x0F )
-		return;
-
-	uint32_t drawOffset = y*ctx->getW() + x;
-	int32_t rowStride;
-
-	//line can be expanded up or down, any other option will cause function to return
-	if( dir == LineExpansionDirection::LINE_EXPAND_DOWN ){
-	    rowStride = ctx->getW();
-    }
-	else if( dir == LineExpansionDirection::LINE_EXPAND_UP ){
-        rowStride = -ctx->getW();
-        drawOffset += rowStride;
-    }
-	else
-		return;
-
-	for( uint32_t i = 0; i<penWidth; i++ ) {
-		memset( ctx->getData() + drawOffset, color.intensivity, width );
-		drawOffset += rowStride;
-	}
-}
-
-//any checks are not performed as this should be done by function handling draw command
-void Renderer::drawVerticalLine( Context* ctx, int16_t x, int16_t y,
-	uint16_t height, uint16_t penWidth,
-	Color color, LineExpansionDirection dir ) {
-
-	//if color is fully transparent - return
-	if( color.alpha == 0x0F )
-		return;
-
-	uint32_t drawOffset = y*ctx->getW() + x;
-	if( dir == LineExpansionDirection::LINE_EXPAND_RIGHT ) {
-		//no action needed unless there is need to draw gradient
-	}
-	else if( dir == LineExpansionDirection::LINE_EXPAND_LEFT ) {
-		drawOffset -= penWidth;
-	}
-	else {
-		return;
-	}
-
-	int32_t rowStride = ctx->getW();
-
-	for( uint32_t row = 0; row <height; row++ ) {
-		memset( ctx->getData() + drawOffset, color.intensivity, penWidth );
-		drawOffset += rowStride;
-	}
-}
-
-void Renderer::draw45degLine( Context* ctx, int16_t x, int16_t y, uint16_t side, uint16_t penWidth, Color color, LineExpansionDirection dir, bool toRight, Line45degEnd lineEnds){
-    // if color is fully transparent - return
-    if (color.alpha == 0x0F){
-        return;
-    }
-
-    uint16_t penWidthAcross = 0;
-    switch (penWidth)
+    Renderer::Renderer()
     {
-    case 1:
-        penWidthAcross = 1;
-        break;
-    case 2:
-        penWidthAcross = 3;
-        break;
-    case 3:
-        penWidthAcross = 5;
-        break;
-    default:
-        penWidthAcross = penWidth * 141 / 100;
-        break;
+        // TODO Auto-generated constructor stub
     }
 
-    // approach: as in drawVertical rather than drawHorizontal. draw small horizontal lines offset to preceding one
-    uint32_t drawOffset = y*ctx->getW() + x;
-    if( dir & LineExpansionDirection::LINE_EXPAND_RIGHT ) {
-        //no action needed unless there is need to draw gradient
-    }
-    else if( dir & LineExpansionDirection::LINE_EXPAND_LEFT ) {
-        drawOffset -= penWidthAcross;
+    Renderer::~Renderer()
+    {
+        // TODO Auto-generated destructor stub
     }
 
-    int32_t rowStride = ctx->getW();
-    if( dir & LineExpansionDirection::LINE_EXPAND_DOWN ){
+    void Renderer::drawLine(Context *ctx, CommandLine *cmd)
+    {}
 
-    }
-    else if( dir & LineExpansionDirection::LINE_EXPAND_UP ){
-        drawOffset -= rowStride * penWidth;
-    }
-    // memsets are vertical. they fill a column
+    // any checks are not performed as this should be done by function handling draw command
+    void Renderer::drawHorizontalLine(
+        Context *ctx, int16_t x, int16_t y, uint16_t width, uint16_t penWidth, Color color, LineExpansionDirection dir)
+    {
 
-    // produces top tip
-    if ( lineEnds & Line45degEnd::TOP_TIP) {
-        drawOffset -= rowStride * penWidthAcross;
-        for (uint32_t skew = 0; skew < penWidthAcross; skew++)
-        {
-            if (toRight)
-            {
-                memset(ctx->getData() + drawOffset, color.intensivity, skew);
-            }
-            else
-            {
-                memset(ctx->getData() + drawOffset + (penWidthAcross - skew), color.intensivity, (skew));
-            }
+        // if color is fully transparent - return
+        if (color.alpha == 0x0F)
+            return;
+
+        uint32_t drawOffset = y * ctx->getW() + x;
+        int32_t rowStride;
+
+        // line can be expanded up or down, any other option will cause function to return
+        if (dir == LineExpansionDirection::LINE_EXPAND_DOWN) {
+            rowStride = ctx->getW();
+        }
+        else if (dir == LineExpansionDirection::LINE_EXPAND_UP) {
+            rowStride = -ctx->getW();
+            drawOffset += rowStride;
+        }
+        else
+            return;
+
+        for (uint32_t i = 0; i < penWidth; i++) {
+            memset(ctx->getData() + drawOffset, color.intensivity, width);
             drawOffset += rowStride;
         }
     }
-    // produces \\\ with flat top and bottom
-    for( uint32_t skew = 0; skew < side; skew++ ) {
-        memset( ctx->getData() + drawOffset, color.intensivity, penWidthAcross );
-        drawOffset += rowStride;
-        drawOffset += (toRight ? 1 : -1); // add skew
-    }
-    // produces bottom tip
-    if ( lineEnds & Line45degEnd::BOTTOM_TIP) {
-        for( uint32_t skew = 0; skew < penWidthAcross; skew++ )
-        {
-            if (toRight)
-            {
-                memset(ctx->getData() + (drawOffset + skew), color.intensivity, (penWidthAcross - skew) - 1);
-            }
-            else
-            {
-                memset(ctx->getData() + drawOffset + 1, color.intensivity, (penWidthAcross - skew) - 1);
-            }
+
+    // any checks are not performed as this should be done by function handling draw command
+    void Renderer::drawVerticalLine(
+        Context *ctx, int16_t x, int16_t y, uint16_t height, uint16_t penWidth, Color color, LineExpansionDirection dir)
+    {
+
+        // if color is fully transparent - return
+        if (color.alpha == 0x0F)
+            return;
+
+        uint32_t drawOffset = y * ctx->getW() + x;
+        if (dir == LineExpansionDirection::LINE_EXPAND_RIGHT) {
+            // no action needed unless there is need to draw gradient
+        }
+        else if (dir == LineExpansionDirection::LINE_EXPAND_LEFT) {
+            drawOffset -= penWidth;
+        }
+        else {
+            return;
+        }
+
+        int32_t rowStride = ctx->getW();
+
+        for (uint32_t row = 0; row < height; row++) {
+            memset(ctx->getData() + drawOffset, color.intensivity, penWidth);
             drawOffset += rowStride;
         }
     }
-}
 
-;
-
-//43575
-void Renderer::drawRectangle( Context* ctx, CommandRectangle* cmd ) {
-
-    // check if there is anything to draw
-    if( cmd->w == 0 || cmd->h == 0 ){
-		return;
-	}
-
-	if(
-		((cmd->fillColor.alpha == 0x0F) && (cmd->borderColor.alpha == 0x0F)) ||
-		((cmd->filled == false ) && (cmd->borderColor.alpha == 0x0F))
-	) {
-		return;
-	}
-	//get copy of original context using x,y of draw coordinates and original size of the widget
-	Context* drawCtx;
-	bool copyContext = false;
-	int16_t wgtX = 0,wgtY = 0;
-	uint16_t wgtW = cmd->areaW, wgtH=cmd->areaH;
-	int16_t wgtR = cmd->radius;
-
-    if (cmd->yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT | RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT))
+    void Renderer::draw45degLine(Context *ctx,
+                                 int16_t x,
+                                 int16_t y,
+                                 uint16_t side,
+                                 uint16_t penWidth,
+                                 Color color,
+                                 LineExpansionDirection dir,
+                                 bool toRight,
+                                 Line45degEnd lineEnds)
     {
-        wgtX += cmd->yapSize;
-        wgtW -= cmd->yapSize;
-    }
-    if (cmd->yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT | RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT))
-    {
-        wgtW -= cmd->yapSize;
-    }
+        // if color is fully transparent - return
+        if (color.alpha == 0x0F) {
+            return;
+        }
 
-    //check if there is a need or making copy of context to use is as background
-	if( (cmd->areaW == cmd->w) && (cmd->areaH == cmd->h)) {
-		drawCtx = ctx;
-        wgtX += cmd->x;
-        wgtY += cmd->y;
-    }
-	else {
-		copyContext = true;
-		int16_t x = cmd->x;
-		int16_t y = cmd->y;
-		if(cmd->areaX < 0)
-			x += cmd->areaX;
-		if( cmd->areaY < 0 )
-			y += cmd->areaY;
-		drawCtx= ctx->get( x, y, cmd->areaW, cmd->areaH );
-	}
+        uint16_t penWidthAcross = 0;
+        switch (penWidth) {
+        case 1:
+            penWidthAcross = 1;
+            break;
+        case 2:
+            penWidthAcross = 3;
+            break;
+        case 3:
+            penWidthAcross = 5;
+            break;
+        default:
+            penWidthAcross = penWidth * 141 / 100;
+            break;
+        }
 
-	//if rounding of corners is 0
-	if( cmd->radius == 0 ) {
-		//fill field inside the rectangle if fill flag is set
-		if( cmd->filled ) {
-			uint32_t offset = wgtY*drawCtx->getW() + wgtX;
-			for( int32_t y=0; y<cmd->areaH;y++) {
-				memset( drawCtx->getData() + offset, cmd->fillColor.intensivity, wgtW );
-				offset += drawCtx->getW();
-			}
-		}
-		if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_TOP )
-			drawHorizontalLine( drawCtx, wgtX, wgtY, wgtW, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_DOWN );
-		if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM )
-            drawHorizontalLine(drawCtx, wgtX, wgtY + wgtH, wgtW, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_UP);
-        if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_LEFT )
-			drawVerticalLine( drawCtx, wgtX, wgtY, wgtH, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_RIGHT );
-		if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT )
-			drawVerticalLine( drawCtx, wgtX + wgtW, wgtY, wgtH, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_LEFT );
-	}
-	else {
+        // approach: as in drawVertical rather than drawHorizontal. draw small horizontal lines offset to preceding one
+        uint32_t drawOffset = y * ctx->getW() + x;
+        if (dir & LineExpansionDirection::LINE_EXPAND_RIGHT) {
+            // no action needed unless there is need to draw gradient
+        }
+        else if (dir & LineExpansionDirection::LINE_EXPAND_LEFT) {
+            drawOffset -= penWidthAcross;
+        }
 
-		//calculate centers of circle for all corners
-        int16_t xcTopRight = wgtX + wgtW - cmd->radius;
-        int16_t xcTopLeft = wgtX+cmd->radius;
-		int16_t xcBottomRight = xcTopRight;
-		int16_t xcBottomLeft = xcTopLeft;
+        int32_t rowStride = ctx->getW();
+        if (dir & LineExpansionDirection::LINE_EXPAND_DOWN) {}
+        else if (dir & LineExpansionDirection::LINE_EXPAND_UP) {
+            drawOffset -= rowStride * penWidth;
+        }
+        // memsets are vertical. they fill a column
 
-		int16_t ycTopRight = wgtY+cmd->radius;
-		int16_t ycTopLeft = ycTopRight;
-		int16_t ycBottomRight = wgtY+cmd->h - cmd->radius;
-		int16_t ycBottomLeft = ycBottomRight;
-
-		int x = cmd->radius, y = 0;
-
-		//Calculate coordinates of the points on the circle's quarter.
-		int16_t* Px = (int16_t*)malloc( 2*cmd->radius*sizeof(int16_t));
-		int16_t* Py = (int16_t*)malloc( 2*cmd->radius*sizeof(int16_t));
-
-		//if any of the vector failed to be created exit the function
-		if( (Px == NULL) || (Py == NULL )) {
-			if( Py ) free( Py );
-			if( Px ) free( Px );
-			return;
-		}
-		memset( Px, 0, 2*cmd->radius*sizeof(int16_t));
-		memset( Py, 0, 2*cmd->radius*sizeof(int16_t));
-		int32_t index = 0;
-		//index where middle point of quarter of arc is located. This means that Y starts to grow faster than X
-		int32_t middleIndex = 0;
-		//number of points in the quater arc
-		int32_t pointCount = 0;
-		Px[index] = x;
-		Py[index] = y;
-		++index;
-		pointCount++;
-
-		int P = 1 - cmd->radius;
-
-		while (y < cmd->radius) // just a failsafe
-		{
-			y++;
-
-			// Mid-point is inside or on the perimeter
-			if (P <= 0)
-				P = P + 2*y + 1;
-
-			// Mid-point is outside the perimeter
-			else
-			{
-				x--;
-				P = P + 2*y - 2*x + 1;
-			}
-
-            Px[index] = x;
-            Py[index] = y;
-
-            // All the perimeter points have already been printed
-            if (x <= y){
-
-                int16_t pointsLeft;
-                int indexOut = index;
-                if (x == y) {
-                    // we have a central point. it can be drawn with either type of line
-                    middleIndex = index;
-                    pointsLeft = index;
-                    pointsLeft++;
+        // produces top tip
+        if (lineEnds & Line45degEnd::TOP_TIP) {
+            drawOffset -= rowStride * penWidthAcross;
+            for (uint32_t skew = 0; skew < penWidthAcross; skew++) {
+                if (toRight) {
+                    memset(ctx->getData() + drawOffset, color.intensivity, skew);
                 }
-                else if (x < y)
-                {
-                    pointsLeft = index;
-                    // we don't have a central point. halves are alike
-                    index--;
-                    indexOut;
-                    middleIndex = index;
-
+                else {
+                    memset(ctx->getData() + drawOffset + (penWidthAcross - skew), color.intensivity, (skew));
                 }
-                int xValue = 0; // Px[index];
-
-                while( pointsLeft > 0 ) {
-                    Px[indexOut] = Py[index];
-                    Py[indexOut] = Px[index ]-2*xValue;
-                    index--;
-                    indexOut++;
-                    pointCount++;
-                    pointsLeft--;
-                }
-                break;
+                drawOffset += rowStride;
             }
+        }
+        // produces \\\ with flat top and bottom
+        for (uint32_t skew = 0; skew < side; skew++) {
+            memset(ctx->getData() + drawOffset, color.intensivity, penWidthAcross);
+            drawOffset += rowStride;
+            drawOffset += (toRight ? 1 : -1); // add skew
+        }
+        // produces bottom tip
+        if (lineEnds & Line45degEnd::BOTTOM_TIP) {
+            for (uint32_t skew = 0; skew < penWidthAcross; skew++) {
+                if (toRight) {
+                    memset(ctx->getData() + (drawOffset + skew), color.intensivity, (penWidthAcross - skew) - 1);
+                }
+                else {
+                    memset(ctx->getData() + drawOffset + 1, color.intensivity, (penWidthAcross - skew) - 1);
+                }
+                drawOffset += rowStride;
+            }
+        }
+    }
+
+    ;
+
+    // 43575
+    void Renderer::drawRectangle(Context *ctx, CommandRectangle *cmd)
+    {
+
+        // check if there is anything to draw
+        if (cmd->w == 0 || cmd->h == 0) {
+            return;
+        }
+
+        if (((cmd->fillColor.alpha == 0x0F) && (cmd->borderColor.alpha == 0x0F)) ||
+            ((cmd->filled == false) && (cmd->borderColor.alpha == 0x0F))) {
+            return;
+        }
+        // get copy of original context using x,y of draw coordinates and original size of the widget
+        Context *drawCtx;
+        bool copyContext = false;
+        int16_t wgtX = 0, wgtY = 0;
+        uint16_t wgtW = cmd->areaW, wgtH = cmd->areaH;
+        int16_t wgtR = cmd->radius;
+
+        if (cmd->yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT | RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT)) {
+            wgtX += cmd->yapSize;
+            wgtW -= cmd->yapSize;
+        }
+        if (cmd->yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT | RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT)) {
+            wgtW -= cmd->yapSize;
+        }
+
+        // check if there is a need or making copy of context to use is as background
+        if ((cmd->areaW == cmd->w) && (cmd->areaH == cmd->h)) {
+            drawCtx = ctx;
+            wgtX += cmd->x;
+            wgtY += cmd->y;
+        }
+        else {
+            copyContext = true;
+            int16_t x   = cmd->x;
+            int16_t y   = cmd->y;
+            if (cmd->areaX < 0)
+                x += cmd->areaX;
+            if (cmd->areaY < 0)
+                y += cmd->areaY;
+            drawCtx = ctx->get(x, y, cmd->areaW, cmd->areaH);
+        }
+
+        // if rounding of corners is 0
+        if (cmd->radius == 0) {
+            // fill field inside the rectangle if fill flag is set
+            if (cmd->filled) {
+                uint32_t offset = wgtY * drawCtx->getW() + wgtX;
+                for (int32_t y = 0; y < cmd->areaH; y++) {
+                    memset(drawCtx->getData() + offset, cmd->fillColor.intensivity, wgtW);
+                    offset += drawCtx->getW();
+                }
+            }
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_TOP)
+                drawHorizontalLine(drawCtx,
+                                   wgtX,
+                                   wgtY,
+                                   wgtW,
+                                   cmd->penWidth,
+                                   cmd->borderColor,
+                                   LineExpansionDirection::LINE_EXPAND_DOWN);
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM)
+                drawHorizontalLine(drawCtx,
+                                   wgtX,
+                                   wgtY + wgtH,
+                                   wgtW,
+                                   cmd->penWidth,
+                                   cmd->borderColor,
+                                   LineExpansionDirection::LINE_EXPAND_UP);
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_LEFT)
+                drawVerticalLine(drawCtx,
+                                 wgtX,
+                                 wgtY,
+                                 wgtH,
+                                 cmd->penWidth,
+                                 cmd->borderColor,
+                                 LineExpansionDirection::LINE_EXPAND_RIGHT);
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT)
+                drawVerticalLine(drawCtx,
+                                 wgtX + wgtW,
+                                 wgtY,
+                                 wgtH,
+                                 cmd->penWidth,
+                                 cmd->borderColor,
+                                 LineExpansionDirection::LINE_EXPAND_LEFT);
+        }
+        else {
+
+            // calculate centers of circle for all corners
+            int16_t xcTopRight    = wgtX + wgtW - cmd->radius;
+            int16_t xcTopLeft     = wgtX + cmd->radius;
+            int16_t xcBottomRight = xcTopRight;
+            int16_t xcBottomLeft  = xcTopLeft;
+
+            int16_t ycTopRight    = wgtY + cmd->radius;
+            int16_t ycTopLeft     = ycTopRight;
+            int16_t ycBottomRight = wgtY + cmd->h - cmd->radius;
+            int16_t ycBottomLeft  = ycBottomRight;
+
+            int x = cmd->radius, y = 0;
+
+            // Calculate coordinates of the points on the circle's quarter.
+            int16_t *Px = (int16_t *)malloc(2 * cmd->radius * sizeof(int16_t));
+            int16_t *Py = (int16_t *)malloc(2 * cmd->radius * sizeof(int16_t));
+
+            // if any of the vector failed to be created exit the function
+            if ((Px == NULL) || (Py == NULL)) {
+                if (Py)
+                    free(Py);
+                if (Px)
+                    free(Px);
+                return;
+            }
+            memset(Px, 0, 2 * cmd->radius * sizeof(int16_t));
+            memset(Py, 0, 2 * cmd->radius * sizeof(int16_t));
+            int32_t index = 0;
+            // index where middle point of quarter of arc is located. This means that Y starts to grow faster than X
+            int32_t middleIndex = 0;
+            // number of points in the quater arc
+            int32_t pointCount = 0;
+            Px[index]          = x;
+            Py[index]          = y;
             ++index;
             pointCount++;
 
-		}
+            int P = 1 - cmd->radius;
 
-		//fill the rectangle if fill flag is set using fillColor. Painting is divieded into 3 parts
-		//First part takes into consideration if top corners exists, are they rounded or are they sharp.
-		//Second draws simple lines between between left and right edges.
-		//Third part takes into consideration if bottom corners exists, are they rounded or are they sharp.
+            while (y < cmd->radius) // just a failsafe
+            {
+                y++;
 
-		if( cmd->filled ) {
+                // Mid-point is inside or on the perimeter
+                if (P <= 0)
+                    P = P + 2 * y + 1;
 
-			//create array with offset how X position changes across Y axis
-			int16_t offsetX[2*wgtR] = {0};
-			uint32_t offsetXIndex = 0;
-
-			int32_t lastY = 0x0FFFFFFF;
-			for( int32_t i=0; i<int32_t(pointCount); ++i) {
-				if( lastY != Py[i] ) {
-					lastY = Py[i];
-					offsetX[offsetXIndex] = Px[i];
-					++offsetXIndex;
-				}
-			}
-
-		//Part 1
-			int16_t startX[2*wgtR] = {0};
-			int16_t endX[2*wgtR] = {0};
-			if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_LEFT ) {
-				if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT ) {
-					for( int32_t i=0; i<pointCount; ++i )
-						startX[i] = 0;
-				}
-				// @TODO: filled yaps, here and other corners
-				else {
-					for( int32_t i=0; i<pointCount; ++i )
-						startX[i] = wgtR-offsetX[i];
-				}
-			}
-			//if there is no corner set whole vector of points to the value of the radius
-			else {
-				for( int32_t i=0; i<pointCount; ++i )
-					startX[i] = wgtR;
-			}
-			if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_RIGHT ) {
-				if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT ) {
-					for( int32_t i=0; i<pointCount; ++i )
-						endX[i] = wgtW;
-				}
-				else {
-					for( int32_t i=0; i<pointCount; ++i )
-						endX[i] = wgtW - wgtR + offsetX[i];
-				}
-			}
-			//if there is no corner set whole vector of points to the value of the radius
-			else {
-				for( int32_t i=0; i<pointCount; ++i )
-					endX[i] = wgtW - wgtR;
-			}
-			for( int32_t i=0; i< wgtR; ++i )
-				drawHorizontalLine( drawCtx, wgtX + startX[i], wgtY +wgtR - i, endX[i]-startX[i], 1, cmd->fillColor, LineExpansionDirection::LINE_EXPAND_DOWN );
-		//Part 2
-			int16_t xs, ys;
-			xs = 0;
-			ys = cmd->radius;
-			drawHorizontalLine( drawCtx, wgtX + xs, wgtY + ys, wgtW, wgtH - 2*cmd->radius, cmd->fillColor, LineExpansionDirection::LINE_EXPAND_DOWN );
-
-		//Part 3
-			memset( startX, 0, 2*wgtR*sizeof(int16_t));
-			memset( endX, 0, 2*wgtR*sizeof(int16_t));
-			if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_LEFT ) {
-				if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT ) {
-					for( int32_t i=0; i<pointCount; ++i )
-						startX[i] = 0;
-				}
-				else {
-					for( int32_t i=0; i<pointCount; ++i )
-						startX[i] = wgtR-offsetX[i];
-				}
-			}
-			//if there is no corner set whole vector of points to the value of the radius
-			else {
-				for( int32_t i=0; i<pointCount; ++i )
-					startX[i] = wgtR;
-			}
-			if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_RIGHT ) {
-				if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT ) {
-					for( int32_t i=0; i<pointCount; ++i )
-						endX[i] = wgtW;
-				}
-				else {
-					for( int32_t i=0; i<pointCount; ++i )
-						endX[i] = wgtW - wgtR + offsetX[i];
-				}
-			}
-			//if there is no corner set whole vector of points to the value of the radius
-			else {
-				for( int32_t i=0; i<pointCount; ++i )
-					endX[i] = wgtW - wgtR;
-			}
-			for( int32_t i=0; i< wgtR; ++i )
-				drawHorizontalLine( drawCtx, wgtX + startX[i], wgtY + wgtH -wgtR + i, endX[i]-startX[i], 1, cmd->fillColor, LineExpansionDirection::LINE_EXPAND_DOWN );
-		}
-
-		//Here rounded border is painted
-
-		//upper right corner
-		if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_RIGHT ) {
-		    // if corner then evaluate: sharp corner (aka flat), sms (aka yap), else: round.
-			if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT ) {
-			}
-			else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT){
-			}
-			else {
-				//draw arc from 0 index up to mid point using horizontal line
-				index = 0;
-				//X is growing faster
-				for( index=0; index<middleIndex; ++index ) {
-					drawHorizontalLine( drawCtx, xcTopRight + Px[index] - cmd->penWidth, ycTopRight - Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_DOWN );
-				}
-				//Y is growing faster
-				for( index=middleIndex; index<pointCount; ++index ) {
-					drawVerticalLine( drawCtx, xcTopRight + Px[index], ycTopRight - Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_LEFT );
-				}
-			}
-		}
-
-		//bottom right corner
-		if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_RIGHT ) {
-			if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT ) {
-			}
-            else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT){
-            }
-			else {
-				//draw arc from 0 index up to mid point using horizontal line
-				index = 0;
-				//X is growing faster
-				for( index=0; index<middleIndex; ++index ) {
-					drawHorizontalLine( drawCtx, xcBottomRight + Px[index] - cmd->penWidth, ycBottomRight + Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_UP);
-				}
-				//Y is growing faster
-				for( index=middleIndex; index<pointCount; ++index ) {
-					drawVerticalLine( drawCtx, xcBottomRight + Px[index], ycBottomRight + Py[index] - cmd->penWidth /*+ 1*/, cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_LEFT );
-				}
-			}
-		}
-
-		//upper left corner
-		if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_LEFT ) {
-			if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT ) {
-			}
-            else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT){
-            }
-			else {
-				//draw arc from 0 index up to mid point using horizontal line
-				index = 0;
-				//X is growing faster
-				for( index=0; index<middleIndex; ++index ) {
-					drawHorizontalLine( drawCtx, xcTopLeft - Px[index], ycTopLeft - Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_DOWN );
-				}
-				//Y is growing faster
-				for( index=middleIndex; index<pointCount; ++index ) {
-					drawVerticalLine( drawCtx, xcTopLeft - Px[index] /*+ 1*/, ycTopLeft - Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_RIGHT);
-				}
-			}
-		}
-
-		//lower left corner
-		if( cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_LEFT ) {
-			if( cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT ) {
-			}
-            else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT){
-            }
-			else {
-				//draw arc from 0 index up to mid point using horizontal line
-				index = 0;
-				//X is growing faster
-				for( index=0; index<middleIndex; ++index ) {
-					drawHorizontalLine( drawCtx, xcBottomLeft - Px[index], ycBottomLeft + Py[index], cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_UP );
-				}
-				//Y is growing faster
-				for( index=middleIndex; index<pointCount; ++index ) {
-					drawVerticalLine( drawCtx, xcBottomLeft - Px[index] , ycBottomLeft + Py[index] - cmd->penWidth , cmd->penWidth, 1, cmd->borderColor, gui::LineExpansionDirection::LINE_EXPAND_RIGHT );
-				}
-			}
-		}
-
-		free( Px );
-		free( Py );
-
-        //render edges between corners
-		int16_t xs, ys,le;
-        if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_TOP)
-        {
-            le = wgtW;
-		    // left "corner" first
-			if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT){
-                xs = -cmd->yapSize;
-                xs += cmd->penWidth;
-            } else {
-                xs = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT));
-            }
-            // right "corner" now
-            le -= xs;
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT){
-                le += (cmd->yapSize - cmd->penWidth);
-            } else {
-                le -= cmd->radius*( !(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT));
-            }
-			ys = 0;
-			drawHorizontalLine( drawCtx, wgtX+xs, wgtY + ys, le, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_DOWN );
-        }
-        if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM ) {
-            le = wgtW;
-            // left "corner" first
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT){
-                xs = -cmd->yapSize;
-                xs += cmd->penWidth;
-            } else {
-                xs = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT));
-            }
-            // right "corner" now
-            le -= xs;
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT){
-                le += (cmd->yapSize - cmd->penWidth);
-            } else {
-                le -= cmd->radius*( !(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT));
-            }
-            ys = wgtH; // beware. doesn't -1 break rounded corners ?
-			drawHorizontalLine( drawCtx, wgtX+xs, wgtY + ys, le, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_UP );
-		}
-
-		if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_LEFT ) {
-            // top "corner" first
-            xs = 0;
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT){
-                ys = cmd->yapSize;
-                draw45degLine(drawCtx, wgtX + xs - cmd->yapSize + cmd->penWidth + 1, wgtY + ys - cmd->yapSize, cmd->yapSize, cmd->penWidth, cmd->borderColor,
-                              LineExpansionDirection::LINE_EXPAND_LEFT, true, Line45degEnd::BOTTOM_TIP);
-            } else {
-                ys = cmd->radius*( !(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT ));
-            }
-            // bottom "corner" now
-            le = wgtH - ys;
-
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT){
-                le -= cmd->yapSize;
-                draw45degLine(drawCtx, wgtX + xs + cmd->penWidth, wgtY + ys + le, cmd->yapSize, cmd->penWidth, cmd->borderColor,
-                              LineExpansionDirection::LINE_EXPAND_LEFT, false, Line45degEnd::TOP_TIP);
-            } else {
-                le -= cmd->radius*(!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT));
-            }
-			drawVerticalLine( drawCtx, wgtX+xs, wgtY + ys, le, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_RIGHT );
-		}
-		if( cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT ) {
-            // top "corner" first
-            xs = wgtW;
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT){
-                ys = cmd->yapSize;
-                draw45degLine(drawCtx, wgtX+xs + cmd->yapSize - cmd->penWidth - 1, wgtY + ys - cmd->yapSize, cmd->yapSize, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_RIGHT , false, Line45degEnd::BOTTOM_TIP);
-            } else {
-                ys = cmd->radius*( !(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT ));
-            }
-            // bottom "corner" now
-            le = wgtH - ys;
-
-            if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT){
-                le -= cmd->yapSize;
-                draw45degLine(drawCtx, wgtX+xs - cmd->penWidth, wgtY + ys + le, cmd->yapSize, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_RIGHT, true, Line45degEnd::TOP_TIP);
-
-            } else {
-                le -= cmd->radius*(!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT));
-            }
-			drawVerticalLine( drawCtx, wgtX+xs, wgtY + ys, le, cmd->penWidth, cmd->borderColor, LineExpansionDirection::LINE_EXPAND_LEFT);
-		}
-	}
-
-	//if drawing was performed in temporary context
-	if( copyContext) {
-		//reinsert drawCtx into last context
-
-//		ctx->insert( cmd->x, cmd->y, drawCtx );
-		ctx->insertArea( cmd->x, cmd->y,cmd->areaX, cmd->areaY, cmd->w, cmd->h, drawCtx );
-		//remove draw context
-		delete drawCtx;
-	}
-
-}
-
-void Renderer::drawChar( Context* context, const int16_t x, const int16_t y,
-		Font* font, FontGlyph* glyph, const Color color ) {
-
-	uint8_t* drawPtr = context->getData() + x + (y-glyph->yoffset)*context->getW();
-	uint8_t* glyphPtr = (uint8_t*)glyph->data;
-
-	for( uint16_t yy = 0; yy < glyph->height; ++yy )
-	{
-		for( uint16_t xx = 0; xx<glyph->width; ++xx )
-		{
-			if( *(glyphPtr + xx) == 0 )
-				*(drawPtr + xx) = 0x0F & color.intensivity;
-		}
-		drawPtr += context->getW();
-		glyphPtr += glyph->width;
-	}
-
-}
-
-void Renderer::drawText( Context* ctx, CommandText* cmd ) {
-
-	//check if there are any characters to draw in the string provided with message.
-	if( cmd->str.length() == 0 ) {
-		return;
-	}
-
-	//get copy of original context using x,y of draw coordinates and original size of the widget
-	Context* drawCtx;
-	bool copyContext = false;
-	int16_t wgtX = 0,wgtY = 0;
-	//check if there is a need or making copy of context to use is as background
-	if( (cmd->areaW == cmd->w) && (cmd->areaH == cmd->h)) {
-		drawCtx = ctx;
-		wgtX = cmd->x;
-		wgtY = cmd->y;
-	}
-	else {
-		copyContext = true;
-		drawCtx= ctx->get( cmd->x, cmd->y, cmd->areaW, cmd->areaH );
-	}
-
-	//retrieve font used to draw text
-	FontManager& fontManager = FontManager::getInstance();
-	Font* font = fontManager.getFont( cmd->fontID );
-
-	int16_t posX = cmd->tx;
-	int16_t posY = cmd->ty;
-
-	//draw every sign
-	uint32_t idLast = 0, idCurrent = 0;
-    for (uint32_t i = 0; i < cmd->str.length(); ++i)
-    {
-        idCurrent = cmd->str[i]; // id stands for glued together utf-16 with no order bytes (0xFF 0xFE)
-        auto glyph_found = font->glyphs.find(idCurrent);
-
-        std::unique_ptr<FontGlyph> unique_glyph;
-
-        FontGlyph *glyph = nullptr;
-        if (glyph_found != font->glyphs.end())
-        {
-            glyph = glyph_found->second;
-        }
-        else
-        {
-            LOG_WARN("no glyph for character id:%d in font \"%s\"", idCurrent, font->info.face.c_str());
-            unique_glyph = font->getGlyphUnsupported();
-            glyph = unique_glyph.get();
-        }
-
-        //#ifdef BUILD_UNIT_TESTS
-        // do not start drawing outside of draw context.
-        if ((wgtX + posX + glyph->xoffset >= drawCtx->getW()) || (wgtX + posX + glyph->xoffset < 0))
-        {
-            LOG_FATAL("Drawing outside context's X boundary for glyph: %d", glyph->id);
-            return;
-        }
-        if ((wgtY + posY >= drawCtx->getH()) || (wgtY + posY < 0))
-        {
-            LOG_FATAL("Drawing outside context's Y boundary for glyph: %d", glyph->id);
-            return;
-        }
-        //#endif
-
-        int32_t kernValue = 0;
-        if (i > 0)
-        {
-            kernValue = font->getKerning(idLast, idCurrent);
-        }
-        drawChar(drawCtx, wgtX + posX + glyph->xoffset + kernValue, wgtY + posY, font, glyph, cmd->color);
-        posX += glyph->xadvance + kernValue;
-
-        idLast = idCurrent;
-    }
-
-    //if drawing was performed in temporary context
-	if( copyContext) {
-		//reinsert drawCtx into bast context
-		ctx->insert( cmd->x, cmd->y, drawCtx );
-		//remove draw context
-		delete drawCtx;
-	}
-}
-
-void Renderer::drawImage( Context* ctx, CommandImage* cmd ) {
-
-	//retrive pixmap from the pixmap manager
-	ImageMap* imageMap = ImageManager::getInstance().getImageMap( cmd->imageID );
-
-	//if image is not found return;
-	if( imageMap == nullptr )
-		return;
-
-	//get copy of original context using x,y of draw coordinates and original size of the widget
-	Context* drawCtx = ctx->get( cmd->x, cmd->y, cmd->areaW, cmd->areaH );
-	uint8_t* ctxData = drawCtx->getData();
-
-    auto check_wh = [&](const std::string &name, auto w, auto h) {
-        if (h > ctx->getH() || w > ctx->getW())
-        {
-            LOG_WARN("image %s {w: %d,h %d} > context {w %d,h %d}", name.c_str(), w, drawCtx->getW(), h, drawCtx->getH());
-        }
-    };
-
-    if( imageMap->getType() == gui::ImageMap::Type::PIXMAP ) {
-        auto pixMap = dynamic_cast<PixMap *>(imageMap);
-        assert(pixMap);
-        uint32_t offsetImage = 0;
-		uint32_t offsetContext = 0;
-		uint8_t* pixData = pixMap->getData();
-        check_wh(pixMap->getName(), pixMap->getWidth(), pixMap->getHeight());
-
-        for (uint32_t row = 0; row < std::min(drawCtx->getH(), pixMap->getHeight()); row++)
-        {
-            memcpy(ctxData + offsetContext, pixData + offsetImage, std::min(drawCtx->getW(), pixMap->getWidth()));
-            offsetImage += pixMap->getWidth();
-            offsetContext += drawCtx->getW();
-        }
-    }
-	else if( imageMap->getType() == gui::ImageMap::Type::VECMAP) {
-        auto vecMap = dynamic_cast<VecMap *>(imageMap);
-        assert(vecMap);
-        uint32_t offsetContext = 0;
-		uint32_t offsetRowContext = 0;
-		uint32_t imageOffset = 0;
-		uint8_t alphaColor = vecMap->getAlphaColor();
-        for (uint32_t row = 0; row < std::min(vecMap->getHeight(), drawCtx->getH()); row++)
-        {
-            check_wh(vecMap->getName(), imageMap->getWidth(), imageMap->getHeight());
-            uint16_t vecCount = *(vecMap->getData() + imageOffset);
-            imageOffset+=sizeof(uint16_t);
-
-			offsetRowContext = offsetContext;
-
-			for( uint32_t vec = 0; vec<vecCount; ++vec ){
-
-				uint16_t vecOffset = *(vecMap->getData()+imageOffset);
-				imageOffset+=sizeof(uint16_t);
-                uint16_t vecLength = *(vecMap->getData() + imageOffset);
-                imageOffset+=sizeof(uint8_t);
-				uint8_t vecColor = *(vecMap->getData()+imageOffset);
-				imageOffset+=sizeof(uint8_t);
-
-				offsetRowContext += vecOffset;
-				if( vecColor != alphaColor )
-                {
-                    memset(ctxData + offsetRowContext, vecColor, std::min(drawCtx->getW(), vecLength));
+                // Mid-point is outside the perimeter
+                else {
+                    x--;
+                    P = P + 2 * y - 2 * x + 1;
                 }
-                offsetRowContext += vecLength;
+
+                Px[index] = x;
+                Py[index] = y;
+
+                // All the perimeter points have already been printed
+                if (x <= y) {
+
+                    int16_t pointsLeft;
+                    int indexOut = index;
+                    if (x == y) {
+                        // we have a central point. it can be drawn with either type of line
+                        middleIndex = index;
+                        pointsLeft  = index;
+                        pointsLeft++;
+                    }
+                    else if (x < y) {
+                        pointsLeft = index;
+                        // we don't have a central point. halves are alike
+                        index--;
+                        indexOut;
+                        middleIndex = index;
+                    }
+                    int xValue = 0; // Px[index];
+
+                    while (pointsLeft > 0) {
+                        Px[indexOut] = Py[index];
+                        Py[indexOut] = Px[index] - 2 * xValue;
+                        index--;
+                        indexOut++;
+                        pointCount++;
+                        pointsLeft--;
+                    }
+                    break;
+                }
+                ++index;
+                pointCount++;
             }
-			offsetContext += drawCtx->getW();
+
+            // fill the rectangle if fill flag is set using fillColor. Painting is divieded into 3 parts
+            // First part takes into consideration if top corners exists, are they rounded or are they sharp.
+            // Second draws simple lines between between left and right edges.
+            // Third part takes into consideration if bottom corners exists, are they rounded or are they sharp.
+
+            if (cmd->filled) {
+
+                // create array with offset how X position changes across Y axis
+                int16_t offsetX[2 * wgtR] = {0};
+                uint32_t offsetXIndex     = 0;
+
+                int32_t lastY = 0x0FFFFFFF;
+                for (int32_t i = 0; i < int32_t(pointCount); ++i) {
+                    if (lastY != Py[i]) {
+                        lastY                 = Py[i];
+                        offsetX[offsetXIndex] = Px[i];
+                        ++offsetXIndex;
+                    }
+                }
+
+                // Part 1
+                int16_t startX[2 * wgtR] = {0};
+                int16_t endX[2 * wgtR]   = {0};
+                if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_LEFT) {
+                    if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT) {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            startX[i] = 0;
+                    }
+                    // @TODO: filled yaps, here and other corners
+                    else {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            startX[i] = wgtR - offsetX[i];
+                    }
+                }
+                // if there is no corner set whole vector of points to the value of the radius
+                else {
+                    for (int32_t i = 0; i < pointCount; ++i)
+                        startX[i] = wgtR;
+                }
+                if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_RIGHT) {
+                    if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT) {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            endX[i] = wgtW;
+                    }
+                    else {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            endX[i] = wgtW - wgtR + offsetX[i];
+                    }
+                }
+                // if there is no corner set whole vector of points to the value of the radius
+                else {
+                    for (int32_t i = 0; i < pointCount; ++i)
+                        endX[i] = wgtW - wgtR;
+                }
+                for (int32_t i = 0; i < wgtR; ++i)
+                    drawHorizontalLine(drawCtx,
+                                       wgtX + startX[i],
+                                       wgtY + wgtR - i,
+                                       endX[i] - startX[i],
+                                       1,
+                                       cmd->fillColor,
+                                       LineExpansionDirection::LINE_EXPAND_DOWN);
+                // Part 2
+                int16_t xs, ys;
+                xs = 0;
+                ys = cmd->radius;
+                drawHorizontalLine(drawCtx,
+                                   wgtX + xs,
+                                   wgtY + ys,
+                                   wgtW,
+                                   wgtH - 2 * cmd->radius,
+                                   cmd->fillColor,
+                                   LineExpansionDirection::LINE_EXPAND_DOWN);
+
+                // Part 3
+                memset(startX, 0, 2 * wgtR * sizeof(int16_t));
+                memset(endX, 0, 2 * wgtR * sizeof(int16_t));
+                if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_LEFT) {
+                    if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT) {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            startX[i] = 0;
+                    }
+                    else {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            startX[i] = wgtR - offsetX[i];
+                    }
+                }
+                // if there is no corner set whole vector of points to the value of the radius
+                else {
+                    for (int32_t i = 0; i < pointCount; ++i)
+                        startX[i] = wgtR;
+                }
+                if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_RIGHT) {
+                    if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT) {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            endX[i] = wgtW;
+                    }
+                    else {
+                        for (int32_t i = 0; i < pointCount; ++i)
+                            endX[i] = wgtW - wgtR + offsetX[i];
+                    }
+                }
+                // if there is no corner set whole vector of points to the value of the radius
+                else {
+                    for (int32_t i = 0; i < pointCount; ++i)
+                        endX[i] = wgtW - wgtR;
+                }
+                for (int32_t i = 0; i < wgtR; ++i)
+                    drawHorizontalLine(drawCtx,
+                                       wgtX + startX[i],
+                                       wgtY + wgtH - wgtR + i,
+                                       endX[i] - startX[i],
+                                       1,
+                                       cmd->fillColor,
+                                       LineExpansionDirection::LINE_EXPAND_DOWN);
+            }
+
+            // Here rounded border is painted
+
+            // upper right corner
+            if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_RIGHT) {
+                // if corner then evaluate: sharp corner (aka flat), sms (aka yap), else: round.
+                if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT) {}
+                else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT) {
+                }
+                else {
+                    // draw arc from 0 index up to mid point using horizontal line
+                    index = 0;
+                    // X is growing faster
+                    for (index = 0; index < middleIndex; ++index) {
+                        drawHorizontalLine(drawCtx,
+                                           xcTopRight + Px[index] - cmd->penWidth,
+                                           ycTopRight - Py[index],
+                                           cmd->penWidth,
+                                           1,
+                                           cmd->borderColor,
+                                           gui::LineExpansionDirection::LINE_EXPAND_DOWN);
+                    }
+                    // Y is growing faster
+                    for (index = middleIndex; index < pointCount; ++index) {
+                        drawVerticalLine(drawCtx,
+                                         xcTopRight + Px[index],
+                                         ycTopRight - Py[index],
+                                         cmd->penWidth,
+                                         1,
+                                         cmd->borderColor,
+                                         gui::LineExpansionDirection::LINE_EXPAND_LEFT);
+                    }
+                }
+            }
+
+            // bottom right corner
+            if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_RIGHT) {
+                if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT) {}
+                else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT) {
+                }
+                else {
+                    // draw arc from 0 index up to mid point using horizontal line
+                    index = 0;
+                    // X is growing faster
+                    for (index = 0; index < middleIndex; ++index) {
+                        drawHorizontalLine(drawCtx,
+                                           xcBottomRight + Px[index] - cmd->penWidth,
+                                           ycBottomRight + Py[index],
+                                           cmd->penWidth,
+                                           1,
+                                           cmd->borderColor,
+                                           gui::LineExpansionDirection::LINE_EXPAND_UP);
+                    }
+                    // Y is growing faster
+                    for (index = middleIndex; index < pointCount; ++index) {
+                        drawVerticalLine(drawCtx,
+                                         xcBottomRight + Px[index],
+                                         ycBottomRight + Py[index] - cmd->penWidth /*+ 1*/,
+                                         cmd->penWidth,
+                                         1,
+                                         cmd->borderColor,
+                                         gui::LineExpansionDirection::LINE_EXPAND_LEFT);
+                    }
+                }
+            }
+
+            // upper left corner
+            if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_TOP_LEFT) {
+                if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT) {}
+                else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT) {
+                }
+                else {
+                    // draw arc from 0 index up to mid point using horizontal line
+                    index = 0;
+                    // X is growing faster
+                    for (index = 0; index < middleIndex; ++index) {
+                        drawHorizontalLine(drawCtx,
+                                           xcTopLeft - Px[index],
+                                           ycTopLeft - Py[index],
+                                           cmd->penWidth,
+                                           1,
+                                           cmd->borderColor,
+                                           gui::LineExpansionDirection::LINE_EXPAND_DOWN);
+                    }
+                    // Y is growing faster
+                    for (index = middleIndex; index < pointCount; ++index) {
+                        drawVerticalLine(drawCtx,
+                                         xcTopLeft - Px[index] /*+ 1*/,
+                                         ycTopLeft - Py[index],
+                                         cmd->penWidth,
+                                         1,
+                                         cmd->borderColor,
+                                         gui::LineExpansionDirection::LINE_EXPAND_RIGHT);
+                    }
+                }
+            }
+
+            // lower left corner
+            if (cmd->corners & RectangleCornerFlags::GUI_RECT_CORNER_BOTTOM_LEFT) {
+                if (cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT) {}
+                else if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT) {
+                }
+                else {
+                    // draw arc from 0 index up to mid point using horizontal line
+                    index = 0;
+                    // X is growing faster
+                    for (index = 0; index < middleIndex; ++index) {
+                        drawHorizontalLine(drawCtx,
+                                           xcBottomLeft - Px[index],
+                                           ycBottomLeft + Py[index],
+                                           cmd->penWidth,
+                                           1,
+                                           cmd->borderColor,
+                                           gui::LineExpansionDirection::LINE_EXPAND_UP);
+                    }
+                    // Y is growing faster
+                    for (index = middleIndex; index < pointCount; ++index) {
+                        drawVerticalLine(drawCtx,
+                                         xcBottomLeft - Px[index],
+                                         ycBottomLeft + Py[index] - cmd->penWidth,
+                                         cmd->penWidth,
+                                         1,
+                                         cmd->borderColor,
+                                         gui::LineExpansionDirection::LINE_EXPAND_RIGHT);
+                    }
+                }
+            }
+
+            free(Px);
+            free(Py);
+
+            // render edges between corners
+            int16_t xs, ys, le;
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_TOP) {
+                le = wgtW;
+                // left "corner" first
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT) {
+                    xs = -cmd->yapSize;
+                    xs += cmd->penWidth;
+                }
+                else {
+                    xs = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT));
+                }
+                // right "corner" now
+                le -= xs;
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT) {
+                    le += (cmd->yapSize - cmd->penWidth);
+                }
+                else {
+                    le -= cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT));
+                }
+                ys = 0;
+                drawHorizontalLine(drawCtx,
+                                   wgtX + xs,
+                                   wgtY + ys,
+                                   le,
+                                   cmd->penWidth,
+                                   cmd->borderColor,
+                                   LineExpansionDirection::LINE_EXPAND_DOWN);
+            }
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM) {
+                le = wgtW;
+                // left "corner" first
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT) {
+                    xs = -cmd->yapSize;
+                    xs += cmd->penWidth;
+                }
+                else {
+                    xs = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT));
+                }
+                // right "corner" now
+                le -= xs;
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT) {
+                    le += (cmd->yapSize - cmd->penWidth);
+                }
+                else {
+                    le -= cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT));
+                }
+                ys = wgtH; // beware. doesn't -1 break rounded corners ?
+                drawHorizontalLine(drawCtx,
+                                   wgtX + xs,
+                                   wgtY + ys,
+                                   le,
+                                   cmd->penWidth,
+                                   cmd->borderColor,
+                                   LineExpansionDirection::LINE_EXPAND_UP);
+            }
+
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_LEFT) {
+                // top "corner" first
+                xs = 0;
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT) {
+                    ys = cmd->yapSize;
+                    draw45degLine(drawCtx,
+                                  wgtX + xs - cmd->yapSize + cmd->penWidth + 1,
+                                  wgtY + ys - cmd->yapSize,
+                                  cmd->yapSize,
+                                  cmd->penWidth,
+                                  cmd->borderColor,
+                                  LineExpansionDirection::LINE_EXPAND_LEFT,
+                                  true,
+                                  Line45degEnd::BOTTOM_TIP);
+                }
+                else {
+                    ys = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_LEFT));
+                }
+                // bottom "corner" now
+                le = wgtH - ys;
+
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT) {
+                    le -= cmd->yapSize;
+                    draw45degLine(drawCtx,
+                                  wgtX + xs + cmd->penWidth,
+                                  wgtY + ys + le,
+                                  cmd->yapSize,
+                                  cmd->penWidth,
+                                  cmd->borderColor,
+                                  LineExpansionDirection::LINE_EXPAND_LEFT,
+                                  false,
+                                  Line45degEnd::TOP_TIP);
+                }
+                else {
+                    le -= cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_LEFT));
+                }
+                drawVerticalLine(drawCtx,
+                                 wgtX + xs,
+                                 wgtY + ys,
+                                 le,
+                                 cmd->penWidth,
+                                 cmd->borderColor,
+                                 LineExpansionDirection::LINE_EXPAND_RIGHT);
+            }
+            if (cmd->edges & RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT) {
+                // top "corner" first
+                xs = wgtW;
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT) {
+                    ys = cmd->yapSize;
+                    draw45degLine(drawCtx,
+                                  wgtX + xs + cmd->yapSize - cmd->penWidth - 1,
+                                  wgtY + ys - cmd->yapSize,
+                                  cmd->yapSize,
+                                  cmd->penWidth,
+                                  cmd->borderColor,
+                                  LineExpansionDirection::LINE_EXPAND_RIGHT,
+                                  false,
+                                  Line45degEnd::BOTTOM_TIP);
+                }
+                else {
+                    ys = cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_TOP_RIGHT));
+                }
+                // bottom "corner" now
+                le = wgtH - ys;
+
+                if (cmd->yaps & RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT) {
+                    le -= cmd->yapSize;
+                    draw45degLine(drawCtx,
+                                  wgtX + xs - cmd->penWidth,
+                                  wgtY + ys + le,
+                                  cmd->yapSize,
+                                  cmd->penWidth,
+                                  cmd->borderColor,
+                                  LineExpansionDirection::LINE_EXPAND_RIGHT,
+                                  true,
+                                  Line45degEnd::TOP_TIP);
+                }
+                else {
+                    le -= cmd->radius * (!(cmd->flatEdges & RectangleFlatFlags::GUI_RECT_FLAT_BOTTOM_RIGHT));
+                }
+                drawVerticalLine(drawCtx,
+                                 wgtX + xs,
+                                 wgtY + ys,
+                                 le,
+                                 cmd->penWidth,
+                                 cmd->borderColor,
+                                 LineExpansionDirection::LINE_EXPAND_LEFT);
+            }
+        }
+
+        // if drawing was performed in temporary context
+        if (copyContext) {
+            // reinsert drawCtx into last context
+
+            //		ctx->insert( cmd->x, cmd->y, drawCtx );
+            ctx->insertArea(cmd->x, cmd->y, cmd->areaX, cmd->areaY, cmd->w, cmd->h, drawCtx);
+            // remove draw context
+            delete drawCtx;
         }
     }
 
-    //reinsert drawCtx into bast context
-	ctx->insert( cmd->x, cmd->y, drawCtx );
+    void Renderer::drawChar(
+        Context *context, const int16_t x, const int16_t y, Font *font, FontGlyph *glyph, const Color color)
+    {
 
-	//remove draw context
-	delete drawCtx;
-}
+        uint8_t *drawPtr  = context->getData() + x + (y - glyph->yoffset) * context->getW();
+        uint8_t *glyphPtr = (uint8_t *)glyph->data;
 
-void Renderer::render( Context* ctx, std::vector<DrawCommand*>& commands ) {
-	for( DrawCommand* cmd : commands ) {
-		switch( cmd->id ) {
-			case DrawCommandID::GUI_DRAW_CLEAR: {
-//				uint32_t start_tick = xTaskGetTickCount();
-				ctx->fill( 15 );
-//				uint32_t end_tick = xTaskGetTickCount();
-//				LOG_INFO("[ServiceGUI] ctx->fill( 15 ); Time: %d", end_tick - start_tick);
-			}break;
-			case DrawCommandID::GUI_DRAW_LINE: {
+        for (uint16_t yy = 0; yy < glyph->height; ++yy) {
+            for (uint16_t xx = 0; xx < glyph->width; ++xx) {
+                if (*(glyphPtr + xx) == 0)
+                    *(drawPtr + xx) = 0x0F & color.intensivity;
+            }
+            drawPtr += context->getW();
+            glyphPtr += glyph->width;
+        }
+    }
 
-			}break;
-			case DrawCommandID::GUI_DRAW_RECT: {
+    void Renderer::drawText(Context *ctx, CommandText *cmd)
+    {
 
-//				uint32_t start_tick = xTaskGetTickCount();
-				drawRectangle( ctx, static_cast<CommandRectangle*>(cmd) );
-//				uint32_t end_tick = xTaskGetTickCount();
-//				LOG_INFO("[ServiceGUI] drawRect Time: %d", end_tick - start_tick);
+        // check if there are any characters to draw in the string provided with message.
+        if (cmd->str.length() == 0) {
+            return;
+        }
 
-			}break;
-			case DrawCommandID::GUI_DRAW_TEXT: {
+        // get copy of original context using x,y of draw coordinates and original size of the widget
+        Context *drawCtx;
+        bool copyContext = false;
+        int16_t wgtX = 0, wgtY = 0;
+        // check if there is a need or making copy of context to use is as background
+        if ((cmd->areaW == cmd->w) && (cmd->areaH == cmd->h)) {
+            drawCtx = ctx;
+            wgtX    = cmd->x;
+            wgtY    = cmd->y;
+        }
+        else {
+            copyContext = true;
+            drawCtx     = ctx->get(cmd->x, cmd->y, cmd->areaW, cmd->areaH);
+        }
 
-//				uint32_t start_tick = xTaskGetTickCount();
-				drawText( ctx, static_cast<CommandText*>(cmd) );
-//				uint32_t end_tick = xTaskGetTickCount();
-//				LOG_INFO("[ServiceGUI] drawText time: %d", end_tick - start_tick);
-			}break;
-			case DrawCommandID::GUI_DRAW_IMAGE: {
+        // retrieve font used to draw text
+        FontManager &fontManager = FontManager::getInstance();
+        Font *font               = fontManager.getFont(cmd->fontID);
 
-//				uint32_t start_tick = xTaskGetTickCount();
-				drawImage( ctx, static_cast<CommandImage*>(cmd) );
-//				uint32_t end_tick = xTaskGetTickCount();
-//				LOG_INFO("[ServiceGUI] drawImage time: %d", end_tick - start_tick);
-			} break;
-			default:
-				break;
-		};
-	}
-}
+        int16_t posX = cmd->tx;
+        int16_t posY = cmd->ty;
+
+        // draw every sign
+        uint32_t idLast = 0, idCurrent = 0;
+        for (uint32_t i = 0; i < cmd->str.length(); ++i) {
+            idCurrent        = cmd->str[i]; // id stands for glued together utf-16 with no order bytes (0xFF 0xFE)
+            auto glyph_found = font->glyphs.find(idCurrent);
+
+            std::unique_ptr<FontGlyph> unique_glyph;
+
+            FontGlyph *glyph = nullptr;
+            if (glyph_found != font->glyphs.end()) {
+                glyph = glyph_found->second;
+            }
+            else {
+                LOG_WARN("no glyph for character id:%d in font \"%s\"", idCurrent, font->info.face.c_str());
+                unique_glyph = font->getGlyphUnsupported();
+                glyph        = unique_glyph.get();
+            }
+
+            //#ifdef BUILD_UNIT_TESTS
+            // do not start drawing outside of draw context.
+            if ((wgtX + posX + glyph->xoffset >= drawCtx->getW()) || (wgtX + posX + glyph->xoffset < 0)) {
+                LOG_FATAL("Drawing outside context's X boundary for glyph: %d", glyph->id);
+                return;
+            }
+            if ((wgtY + posY >= drawCtx->getH()) || (wgtY + posY < 0)) {
+                LOG_FATAL("Drawing outside context's Y boundary for glyph: %d", glyph->id);
+                return;
+            }
+            //#endif
+
+            int32_t kernValue = 0;
+            if (i > 0) {
+                kernValue = font->getKerning(idLast, idCurrent);
+            }
+            drawChar(drawCtx, wgtX + posX + glyph->xoffset + kernValue, wgtY + posY, font, glyph, cmd->color);
+            posX += glyph->xadvance + kernValue;
+
+            idLast = idCurrent;
+        }
+
+        // if drawing was performed in temporary context
+        if (copyContext) {
+            // reinsert drawCtx into bast context
+            ctx->insert(cmd->x, cmd->y, drawCtx);
+            // remove draw context
+            delete drawCtx;
+        }
+    }
+
+    void Renderer::drawImage(Context *ctx, CommandImage *cmd)
+    {
+
+        // retrive pixmap from the pixmap manager
+        ImageMap *imageMap = ImageManager::getInstance().getImageMap(cmd->imageID);
+
+        // if image is not found return;
+        if (imageMap == nullptr)
+            return;
+
+        // get copy of original context using x,y of draw coordinates and original size of the widget
+        Context *drawCtx = ctx->get(cmd->x, cmd->y, cmd->areaW, cmd->areaH);
+        uint8_t *ctxData = drawCtx->getData();
+
+        auto check_wh = [&](const std::string &name, auto w, auto h) {
+            if (h > ctx->getH() || w > ctx->getW()) {
+                LOG_WARN("image %s {w: %d,h %d} > context {w %d,h %d}",
+                         name.c_str(),
+                         w,
+                         drawCtx->getW(),
+                         h,
+                         drawCtx->getH());
+            }
+        };
+
+        if (imageMap->getType() == gui::ImageMap::Type::PIXMAP) {
+            auto pixMap = dynamic_cast<PixMap *>(imageMap);
+            assert(pixMap);
+            uint32_t offsetImage   = 0;
+            uint32_t offsetContext = 0;
+            uint8_t *pixData       = pixMap->getData();
+            check_wh(pixMap->getName(), pixMap->getWidth(), pixMap->getHeight());
+
+            for (uint32_t row = 0; row < std::min(drawCtx->getH(), pixMap->getHeight()); row++) {
+                memcpy(ctxData + offsetContext, pixData + offsetImage, std::min(drawCtx->getW(), pixMap->getWidth()));
+                offsetImage += pixMap->getWidth();
+                offsetContext += drawCtx->getW();
+            }
+        }
+        else if (imageMap->getType() == gui::ImageMap::Type::VECMAP) {
+            auto vecMap = dynamic_cast<VecMap *>(imageMap);
+            assert(vecMap);
+            uint32_t offsetContext    = 0;
+            uint32_t offsetRowContext = 0;
+            uint32_t imageOffset      = 0;
+            uint8_t alphaColor        = vecMap->getAlphaColor();
+            for (uint32_t row = 0; row < std::min(vecMap->getHeight(), drawCtx->getH()); row++) {
+                check_wh(vecMap->getName(), imageMap->getWidth(), imageMap->getHeight());
+                uint16_t vecCount = *(vecMap->getData() + imageOffset);
+                imageOffset += sizeof(uint16_t);
+
+                offsetRowContext = offsetContext;
+
+                for (uint32_t vec = 0; vec < vecCount; ++vec) {
+
+                    uint16_t vecOffset = *(vecMap->getData() + imageOffset);
+                    imageOffset += sizeof(uint16_t);
+                    uint16_t vecLength = *(vecMap->getData() + imageOffset);
+                    imageOffset += sizeof(uint8_t);
+                    uint8_t vecColor = *(vecMap->getData() + imageOffset);
+                    imageOffset += sizeof(uint8_t);
+
+                    offsetRowContext += vecOffset;
+                    if (vecColor != alphaColor) {
+                        memset(ctxData + offsetRowContext, vecColor, std::min(drawCtx->getW(), vecLength));
+                    }
+                    offsetRowContext += vecLength;
+                }
+                offsetContext += drawCtx->getW();
+            }
+        }
+
+        // reinsert drawCtx into bast context
+        ctx->insert(cmd->x, cmd->y, drawCtx);
+
+        // remove draw context
+        delete drawCtx;
+    }
+
+    void Renderer::render(Context *ctx, std::vector<DrawCommand *> &commands)
+    {
+        for (DrawCommand *cmd : commands) {
+            switch (cmd->id) {
+            case DrawCommandID::GUI_DRAW_CLEAR: {
+                //				uint32_t start_tick = xTaskGetTickCount();
+                ctx->fill(15);
+                //				uint32_t end_tick = xTaskGetTickCount();
+                //				LOG_INFO("[ServiceGUI] ctx->fill( 15 ); Time: %d", end_tick - start_tick);
+            } break;
+            case DrawCommandID::GUI_DRAW_LINE: {
+
+            } break;
+            case DrawCommandID::GUI_DRAW_RECT: {
+
+                //				uint32_t start_tick = xTaskGetTickCount();
+                drawRectangle(ctx, static_cast<CommandRectangle *>(cmd));
+                //				uint32_t end_tick = xTaskGetTickCount();
+                //				LOG_INFO("[ServiceGUI] drawRect Time: %d", end_tick - start_tick);
+
+            } break;
+            case DrawCommandID::GUI_DRAW_TEXT: {
+
+                //				uint32_t start_tick = xTaskGetTickCount();
+                drawText(ctx, static_cast<CommandText *>(cmd));
+                //				uint32_t end_tick = xTaskGetTickCount();
+                //				LOG_INFO("[ServiceGUI] drawText time: %d", end_tick - start_tick);
+            } break;
+            case DrawCommandID::GUI_DRAW_IMAGE: {
+
+                //				uint32_t start_tick = xTaskGetTickCount();
+                drawImage(ctx, static_cast<CommandImage *>(cmd));
+                //				uint32_t end_tick = xTaskGetTickCount();
+                //				LOG_INFO("[ServiceGUI] drawImage time: %d", end_tick - start_tick);
+            } break;
+            default:
+                break;
+            };
+        }
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/Renderer.hpp b/module-gui/gui/core/Renderer.hpp
index a4ee44f05..40ad93e27 100644
--- a/module-gui/gui/core/Renderer.hpp
+++ b/module-gui/gui/core/Renderer.hpp
@@ -13,31 +13,33 @@
 #include "Context.hpp"
 #include "Font.hpp"
 
-namespace gui {
+namespace gui
+{
 
     enum class LineExpansionDirection
     {
-        LINE_EXPAND_UP = 1,
-        LINE_EXPAND_DOWN = 1 << 1,
-        LINE_EXPAND_LEFT = 1 << 2,
+        LINE_EXPAND_UP    = 1,
+        LINE_EXPAND_DOWN  = 1 << 1,
+        LINE_EXPAND_LEFT  = 1 << 2,
         LINE_EXPAND_RIGHT = 1 << 3
     };
 
     enum class Line45degEnd
     {
-        TOP_FLAT = 1,
-        TOP_TIP = 1 << 1,
+        TOP_FLAT    = 1,
+        TOP_TIP     = 1 << 1,
         BOTTOM_FLAT = 1 << 2,
-        BOTTOM_TIP = 1 << 3
+        BOTTOM_TIP  = 1 << 3
     };
 
     class Renderer
     {
         /**
-         * convention: all the coordinates are is a pixel. the origin is (0,0) and it's ABOVE (UP) & TO THE LEFT of the topmost left pixel.
-         * Therefore to draw 1px wide line spanning the whole topmost row, it will be drawHorizontal (0,0, 1px, length, ::DOWN). It's equvalent to
-         * drawHorizontal (0,1, 1px, length, ::UP); default is DOWN & RIGHT a is the first pixel. a is (0,0) DOWN (& RIGHT) == a is (0,1) UP (& RIGHT) b is
-         * (2,2) UP (& RIGHT)   == b is (2,1) DOWN (& RIGHT)
+         * convention: all the coordinates are is a pixel. the origin is (0,0) and it's ABOVE (UP) & TO THE LEFT of the
+         * topmost left pixel. Therefore to draw 1px wide line spanning the whole topmost row, it will be drawHorizontal
+         * (0,0, 1px, length, ::DOWN). It's equvalent to drawHorizontal (0,1, 1px, length, ::UP); default is DOWN &
+         * RIGHT a is the first pixel. a is (0,0) DOWN (& RIGHT) == a is (0,1) UP (& RIGHT) b is (2,2) UP (& RIGHT)   ==
+         * b is (2,1) DOWN (& RIGHT)
          *
          * _| 0 1 2 3
          * 0  a
@@ -50,17 +52,36 @@ namespace gui {
         /**
          * @brief Function for drawing horizontal line with given width in specified direction
          */
-        void drawHorizontalLine(Context *ctx, int16_t x, int16_t y, uint16_t width, uint16_t penWidth, Color color, LineExpansionDirection dir);
+        void drawHorizontalLine(Context *ctx,
+                                int16_t x,
+                                int16_t y,
+                                uint16_t width,
+                                uint16_t penWidth,
+                                Color color,
+                                LineExpansionDirection dir);
         /**
          * @brief Function for drawing vertical line with given width in specified direction
          */
-        void drawVerticalLine(Context *ctx, int16_t x, int16_t y, uint16_t height, uint16_t penWidth, Color color, LineExpansionDirection dir);
+        void drawVerticalLine(Context *ctx,
+                              int16_t x,
+                              int16_t y,
+                              uint16_t height,
+                              uint16_t penWidth,
+                              Color color,
+                              LineExpansionDirection dir);
         /**
-         * @brief Function for drawing a line skewed at 45 deg with given width in specified direction. by default the line is drawn from top to bottom in V-dim
-         * and from left to right in H-dim.
+         * @brief Function for drawing a line skewed at 45 deg with given width in specified direction. by default the
+         * line is drawn from top to bottom in V-dim and from left to right in H-dim.
          * @param[in] toRight changes H-dim draw direction, so it is drawn to the right of vertical axis.
          */
-        void draw45degLine(Context *ctx, int16_t x, int16_t y, uint16_t side, uint16_t penWidth, Color color, LineExpansionDirection dir, bool toRight,
+        void draw45degLine(Context *ctx,
+                           int16_t x,
+                           int16_t y,
+                           uint16_t side,
+                           uint16_t penWidth,
+                           Color color,
+                           LineExpansionDirection dir,
+                           bool toRight,
                            Line45degEnd lineEnds = Line45degEnd::TOP_FLAT | Line45degEnd::BOTTOM_FLAT);
         /**
          * @brief Function that draws line on the given context
@@ -77,7 +98,8 @@ namespace gui {
         /**
          * @brief Draws single glyph to specified context
          */
-        void drawChar(Context *context, const int16_t x, const int16_t y, Font *font, FontGlyph *glyph, const Color color);
+        void drawChar(
+            Context *context, const int16_t x, const int16_t y, Font *font, FontGlyph *glyph, const Color color);
         /**
          * @brief Draws an image with specified ID on given coordinates.
          */
@@ -88,7 +110,7 @@ namespace gui {
         virtual ~Renderer();
 
         void render(Context *ctx, std::vector<DrawCommand *> &commands);
-};
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/core/VecMap.cpp b/module-gui/gui/core/VecMap.cpp
index d53bf2eb4..1b5ba9cee 100644
--- a/module-gui/gui/core/VecMap.cpp
+++ b/module-gui/gui/core/VecMap.cpp
@@ -9,44 +9,50 @@
 #include <string.h>
 #include "VecMap.hpp"
 
-namespace gui {
+namespace gui
+{
 
-VecMap::VecMap() {
-	width = 0;
-	height = 0;
-	name = "";
+    VecMap::VecMap()
+    {
+        width  = 0;
+        height = 0;
+        name   = "";
 
-	type = Type::VECMAP;
-}
+        type = Type::VECMAP;
+    }
 
-VecMap::VecMap( uint16_t w, uint16_t h, uint8_t* data ) :
-	ImageMap( w, h, data ) {
+    VecMap::VecMap(uint16_t w, uint16_t h, uint8_t *data) : ImageMap(w, h, data)
+    {
 
-	//add empty vectors for all rows
-	this->data = new uint8_t[height];
-	type = Type::VECMAP;
+        // add empty vectors for all rows
+        this->data = new uint8_t[height];
+        type       = Type::VECMAP;
 
-	//no data provided - allocat buffer and clear it with white color
-	if( data == nullptr ) {
-		if( this->data )
-			memset( this->data, 0x00, height );
-	}
-}
+        // no data provided - allocat buffer and clear it with white color
+        if (data == nullptr) {
+            if (this->data)
+                memset(this->data, 0x00, height);
+        }
+    }
 
-gui::Status VecMap::load( uint8_t* data, uint32_t size ) {
+    gui::Status VecMap::load(uint8_t *data, uint32_t size)
+    {
 
-	uint32_t offset = 0;
+        uint32_t offset = 0;
 
-	//read width and height of the image
-	memcpy( &width, data + offset, sizeof(uint16_t)); offset += sizeof(uint16_t);
-	memcpy( &height, data + offset, sizeof(uint16_t)); offset += sizeof(uint16_t);
-	memcpy( &alphaColor, data + offset, sizeof(uint8_t)); offset += sizeof(uint8_t);
+        // read width and height of the image
+        memcpy(&width, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        memcpy(&height, data + offset, sizeof(uint16_t));
+        offset += sizeof(uint16_t);
+        memcpy(&alphaColor, data + offset, sizeof(uint8_t));
+        offset += sizeof(uint8_t);
 
-	this->data = new uint8_t[size - 2*sizeof(uint16_t) - sizeof(uint8_t)];
-	if( this->data )
-		memcpy( this->data, data + offset, size - 2*sizeof(uint16_t) - sizeof(uint8_t));
+        this->data = new uint8_t[size - 2 * sizeof(uint16_t) - sizeof(uint8_t)];
+        if (this->data)
+            memcpy(this->data, data + offset, size - 2 * sizeof(uint16_t) - sizeof(uint8_t));
 
-	return gui::Status::GUI_SUCCESS;
-}
+        return gui::Status::GUI_SUCCESS;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/core/VecMap.hpp b/module-gui/gui/core/VecMap.hpp
index 1be31a9a4..5d13ed031 100644
--- a/module-gui/gui/core/VecMap.hpp
+++ b/module-gui/gui/core/VecMap.hpp
@@ -11,7 +11,8 @@
 
 #include "ImageMap.hpp"
 
-namespace gui {
+namespace gui
+{
 
     /// Vector map item (*.vpi extension) loaded by `ImageManager::loadVecMap`
     class VecMap : public ImageMap
diff --git a/module-gui/gui/input/InputEvent.cpp b/module-gui/gui/input/InputEvent.cpp
index c89e6e674..6e68c375e 100644
--- a/module-gui/gui/input/InputEvent.cpp
+++ b/module-gui/gui/input/InputEvent.cpp
@@ -2,6 +2,7 @@
 namespace gui
 {
 
-InputEvent::InputEvent(RawKey key, State state, KeyCode keyCode) : key(key), state(state), keyCode(keyCode) {}
+    InputEvent::InputEvent(RawKey key, State state, KeyCode keyCode) : key(key), state(state), keyCode(keyCode)
+    {}
 
 }; // namespace gui
diff --git a/module-gui/gui/input/InputEvent.hpp b/module-gui/gui/input/InputEvent.hpp
index a96496d29..5d313253a 100644
--- a/module-gui/gui/input/InputEvent.hpp
+++ b/module-gui/gui/input/InputEvent.hpp
@@ -11,80 +11,92 @@
 
 #include <sstream>
 #include <cstdint>
-//module-bsp
+// module-bsp
 #include "bsp/keyboard/key_codes.hpp"
 #include "common_data/RawKey.hpp"
 
-namespace gui {
-
-enum class KeyCode {
-	KEY_UNDEFINED = 0,
-	KEY_LEFT = static_cast<int>(bsp::KeyCodes::JoystickLeft),
-	KEY_UP = static_cast<int>(bsp::KeyCodes::JoystickUp),
-	KEY_RIGHT = static_cast<int>(bsp::KeyCodes::JoystickRight),
-	KEY_DOWN = static_cast<int>(bsp::KeyCodes::JoystickDown),
-	KEY_LF = static_cast<int>(bsp::KeyCodes::FnLeft),
-	KEY_RF = static_cast<int>(bsp::KeyCodes::FnRight),
-	KEY_ENTER = static_cast<int>(bsp::KeyCodes::JoystickEnter),
-	KEY_0 = static_cast<int>(bsp::KeyCodes::NumericKey0),
-	KEY_1 = static_cast<int>(bsp::KeyCodes::NumericKey1),
-	KEY_2 = static_cast<int>(bsp::KeyCodes::NumericKey2),
-	KEY_3 = static_cast<int>(bsp::KeyCodes::NumericKey3),
-	KEY_4 = static_cast<int>(bsp::KeyCodes::NumericKey4),
-	KEY_5 = static_cast<int>(bsp::KeyCodes::NumericKey5),
-	KEY_6 = static_cast<int>(bsp::KeyCodes::NumericKey6),
-	KEY_7 = static_cast<int>(bsp::KeyCodes::NumericKey7),
-	KEY_8 = static_cast<int>(bsp::KeyCodes::NumericKey8),
-	KEY_9 = static_cast<int>(bsp::KeyCodes::NumericKey9),
-	KEY_AST = static_cast<int>(bsp::KeyCodes::NumericKeyAst),
-	KEY_PND = static_cast<int>(bsp::KeyCodes::NumericKeyPnd),
-//	KEY_GREEN,
-//	KEY_RED,
-	KEY_VOLUP = static_cast<int>(bsp::KeyCodes::VolUp),
-	KEY_VOLDN = static_cast<int>(bsp::KeyCodes::VolDown),
-	KEY_TORCH = static_cast<int>(bsp::KeyCodes::Torch),
-	SWITCH_UP = static_cast<int>(bsp::KeyCodes::SSwitchUp),
-	SWITCH_MID = static_cast<int>(bsp::KeyCodes::SSwitchMid),
-	SWITCH_DN = static_cast<int>(bsp::KeyCodes::SSwitchDown),
-};
-
-/// if numeric - returns numeric value, else return -1
-inline int toNumeric(KeyCode key)
+namespace gui
 {
-    switch (key) {
-    case KeyCode::KEY_0: return 0;
-    case KeyCode::KEY_1: return 1;
-    case KeyCode::KEY_2: return 2;
-    case KeyCode::KEY_3: return 3;
-    case KeyCode::KEY_4: return 4;
-    case KeyCode::KEY_5: return 5;
-    case KeyCode::KEY_6: return 6;
-    case KeyCode::KEY_7: return 7;
-    case KeyCode::KEY_8: return 8;
-    case KeyCode::KEY_9: return 9;
-    default:
-        return -1;
-    }
-}
 
-class InputEvent
-{
-  public:
-    enum class State
+    enum class KeyCode
     {
-        Undefined = 0x00,
-        keyPressed = 0x01,
-        keyReleasedShort = 0x02,
-        keyReleasedLong = 0x04,
+        KEY_UNDEFINED = 0,
+        KEY_LEFT      = static_cast<int>(bsp::KeyCodes::JoystickLeft),
+        KEY_UP        = static_cast<int>(bsp::KeyCodes::JoystickUp),
+        KEY_RIGHT     = static_cast<int>(bsp::KeyCodes::JoystickRight),
+        KEY_DOWN      = static_cast<int>(bsp::KeyCodes::JoystickDown),
+        KEY_LF        = static_cast<int>(bsp::KeyCodes::FnLeft),
+        KEY_RF        = static_cast<int>(bsp::KeyCodes::FnRight),
+        KEY_ENTER     = static_cast<int>(bsp::KeyCodes::JoystickEnter),
+        KEY_0         = static_cast<int>(bsp::KeyCodes::NumericKey0),
+        KEY_1         = static_cast<int>(bsp::KeyCodes::NumericKey1),
+        KEY_2         = static_cast<int>(bsp::KeyCodes::NumericKey2),
+        KEY_3         = static_cast<int>(bsp::KeyCodes::NumericKey3),
+        KEY_4         = static_cast<int>(bsp::KeyCodes::NumericKey4),
+        KEY_5         = static_cast<int>(bsp::KeyCodes::NumericKey5),
+        KEY_6         = static_cast<int>(bsp::KeyCodes::NumericKey6),
+        KEY_7         = static_cast<int>(bsp::KeyCodes::NumericKey7),
+        KEY_8         = static_cast<int>(bsp::KeyCodes::NumericKey8),
+        KEY_9         = static_cast<int>(bsp::KeyCodes::NumericKey9),
+        KEY_AST       = static_cast<int>(bsp::KeyCodes::NumericKeyAst),
+        KEY_PND       = static_cast<int>(bsp::KeyCodes::NumericKeyPnd),
+        //	KEY_GREEN,
+        //	KEY_RED,
+        KEY_VOLUP  = static_cast<int>(bsp::KeyCodes::VolUp),
+        KEY_VOLDN  = static_cast<int>(bsp::KeyCodes::VolDown),
+        KEY_TORCH  = static_cast<int>(bsp::KeyCodes::Torch),
+        SWITCH_UP  = static_cast<int>(bsp::KeyCodes::SSwitchUp),
+        SWITCH_MID = static_cast<int>(bsp::KeyCodes::SSwitchMid),
+        SWITCH_DN  = static_cast<int>(bsp::KeyCodes::SSwitchDown),
     };
 
-    State state = State::keyPressed;          /// initial translated key state
-    KeyCode keyCode = KeyCode::KEY_UNDEFINED; /// initial translated key code
-    RawKey key = {};                          /// RawKey data
+    /// if numeric - returns numeric value, else return -1
+    inline int toNumeric(KeyCode key)
+    {
+        switch (key) {
+        case KeyCode::KEY_0:
+            return 0;
+        case KeyCode::KEY_1:
+            return 1;
+        case KeyCode::KEY_2:
+            return 2;
+        case KeyCode::KEY_3:
+            return 3;
+        case KeyCode::KEY_4:
+            return 4;
+        case KeyCode::KEY_5:
+            return 5;
+        case KeyCode::KEY_6:
+            return 6;
+        case KeyCode::KEY_7:
+            return 7;
+        case KeyCode::KEY_8:
+            return 8;
+        case KeyCode::KEY_9:
+            return 9;
+        default:
+            return -1;
+        }
+    }
 
-    InputEvent(RawKey key, State state = State::Undefined, KeyCode keyCode = KeyCode::KEY_UNDEFINED);
-};
+    class InputEvent
+    {
+      public:
+        enum class State
+        {
+            Undefined        = 0x00,
+            keyPressed       = 0x01,
+            keyReleasedShort = 0x02,
+            keyReleasedLong  = 0x04,
+        };
 
-} //namespace gui
+        State state     = State::keyPressed;      /// initial translated key state
+        KeyCode keyCode = KeyCode::KEY_UNDEFINED; /// initial translated key code
+        RawKey key      = {};                     /// RawKey data
+
+        InputEvent(RawKey key, State state = State::Undefined, KeyCode keyCode = KeyCode::KEY_UNDEFINED);
+    };
+
+} // namespace gui
 
 #endif /* MODULE_GUI_GUI_INPUT_INPUTEVENT_HPP_ */
diff --git a/module-gui/gui/input/Profile.cpp b/module-gui/gui/input/Profile.cpp
index 919c33e29..570afb5dd 100644
--- a/module-gui/gui/input/Profile.cpp
+++ b/module-gui/gui/input/Profile.cpp
@@ -15,184 +15,192 @@
 #include "vfs.hpp"
 #include "Profile.hpp"
 
-namespace gui {
-
-KeyProfile::KeyProfile() {}
-KeyProfile::~KeyProfile() {}
-
-Profile::Profile(const std::string &name)
+namespace gui
 {
-    LOG_INFO("Create!");
-    load(name);
-}
 
+    KeyProfile::KeyProfile()
+    {}
+    KeyProfile::~KeyProfile()
+    {}
 
-Profile::Profile(Profile &&p)
-{
-    this->name = p.name;
-    this->keys = p.keys;
-    // this is important, we need to assure that moved Profile doesn't clean up our memory again
-    p.clear();
-}
-
-Profile::~Profile()
-{
-    for (auto it = keys.begin(); it != keys.end(); it++)
+    Profile::Profile(const std::string &name)
     {
-        delete it->second;
+        LOG_INFO("Create!");
+        load(name);
     }
-    keys.clear();
-}
 
-static inline std::string trim(const std::string &s)
-{
-   auto  wsfront=std::find_if_not(s.begin(),s.end(),[](int c){return std::isspace(c);});
-   return std::string(wsfront,std::find_if_not(s.rbegin(),std::string::const_reverse_iterator(wsfront),[](int c){return std::isspace(c);}).base());
-}
-
-template<typename Out>
-void split(const std::string &s, char delim, Out result) {
-    std::stringstream ss(s);
-    std::string item;
-    while (std::getline(ss, item, delim)) {
-        *(result++) = item;
+    Profile::Profile(Profile &&p)
+    {
+        this->name = p.name;
+        this->keys = p.keys;
+        // this is important, we need to assure that moved Profile doesn't clean up our memory again
+        p.clear();
     }
-}
 
-static std::vector<std::string> split(const std::string &s, char delim) {
-    std::vector<std::string> elems;
-    split(s, delim, std::back_inserter(elems));
-    return elems;
-}
-
-bool Profile::load( std::string filename ) {
-	auto file = vfs.fopen( filename.c_str(), "rb" );
-
-	enum class LineType{
-		KEY_CODE = 0,
-		CYCLIC,
-		CHARACTERS,
-		TIMEOUTS
-	};
-
-	LineType lineType = LineType::KEY_CODE;
-	bool name = false;
-
-
-	KeyProfile* pk = nullptr;
-	KeyProfile tmp;
-	while( vfs.eof(file) != true ) {
-
-		std::string line = trim(vfs.getline(file));
-		if( (line[0] == '#') || (line.empty())) {
-			continue;
-		}
-		else {
-
-			//first not commented line is a name of profile
-			if( name == false ) {
-				LOG_INFO("profile name: %s",line.c_str());
-				setName(line);
-				name = true;
-			}
-			else {
-				//new structure, create profile key and read the keyboard's key code
-				if( lineType == LineType::KEY_CODE ) {
-					uint32_t keyCode;
-					std::stringstream( line ) >> keyCode;
-					pk = new KeyProfile();
-					pk->keyCode = keyCode;
-					lineType = LineType::CYCLIC;
-				}
-				else if( lineType == LineType::CYCLIC ) {
-					pk->cyclic = (line.compare("true")==0);
-					lineType = LineType::CHARACTERS;
-				}
-				else if( lineType == LineType::CHARACTERS ) {
-					addCharacters(pk, line );
-					lineType = LineType::TIMEOUTS;
-				}
-				else if( lineType == LineType::TIMEOUTS ) {
-					addTimeouts( pk, line );
-					if( (pk->chars.size() == pk->timeouts.size()) &&
-						(keys.find(pk->keyCode) == keys.end())) {
-						addKeyProfile( pk );
-					}
-					else {
-						LOG_FATAL("Incorrect number of chars or key code duplicate key code: [%d]", pk->keyCode);
-						delete pk;
-						pk = nullptr;
-					}
-
-					lineType = LineType::KEY_CODE;
-				}
-				else {
-					LOG_FATAL("invalid line: [%s]", line.c_str());
-				}
-			}
-		}
-	}
-
-	vfs.fclose( file );
-
-	return true;
-}
-
-void Profile::addCharacters( KeyProfile* pk, const std::string& s ) {
-
-	uint32_t charKey;
-	std::vector<std::string> vec = split( s, ',' );
-	for( std::string s : vec ) {
-		std::string ts = trim(s);
-		if( ts[0] == '\'' ) {
-			//empty character - no character
-			if( s.size() == 2 ) {
-				pk->chars.push_back(0);
-				break;
-			}
-			ts = s.substr(1, s.size()-1);
-			UTF8 utf = UTF8( ts );
-			charKey = utf[0];
-			pk->chars.push_back(charKey);
-		}
-		else if( ts.substr(0,2) == "0x"){
-			std::stringstream ss;
-			ss << std::hex << ts;
-			ss >> charKey;
-			pk->chars.push_back(charKey);
-		}
-	}
-}
-void Profile::addTimeouts( KeyProfile* pk, const std::string& s ) {
-	uint32_t timeout;
-	std::vector<std::string> vec = split( s, ',' );
-	for( std::string s : vec ) {
-		std::stringstream(trim(s)) >> timeout;
-		pk->timeouts.push_back(timeout);
-	}
-}
-
-void Profile::addKeyProfile( KeyProfile* pk ) {
-	if( pk != nullptr )
-		keys.insert( std::pair<uint32_t, KeyProfile*>(pk->keyCode, pk));
-}
-
-const KeyProfile* Profile::getKeyProfile( uint32_t keyCode ) {
-	auto key = keys.find( keyCode );
-	if( key != keys.end() )
-		return key->second;
-	return nullptr;
-}
-
-
-uint32_t Profile::get(bsp::KeyCodes code, uint32_t times)
-{
-    const KeyProfile* p = getKeyProfile(uint32_t(code));
-    if ( p == nullptr) {
-        LOG_ERROR("KeyProfile for key: %d not found", code);
-        return 0;
+    Profile::~Profile()
+    {
+        for (auto it = keys.begin(); it != keys.end(); it++) {
+            delete it->second;
+        }
+        keys.clear();
+    }
+
+    static inline std::string trim(const std::string &s)
+    {
+        auto wsfront = std::find_if_not(s.begin(), s.end(), [](int c) { return std::isspace(c); });
+        return std::string(wsfront,
+                           std::find_if_not(s.rbegin(), std::string::const_reverse_iterator(wsfront), [](int c) {
+                               return std::isspace(c);
+                           }).base());
+    }
+
+    template <typename Out> void split(const std::string &s, char delim, Out result)
+    {
+        std::stringstream ss(s);
+        std::string item;
+        while (std::getline(ss, item, delim)) {
+            *(result++) = item;
+        }
+    }
+
+    static std::vector<std::string> split(const std::string &s, char delim)
+    {
+        std::vector<std::string> elems;
+        split(s, delim, std::back_inserter(elems));
+        return elems;
+    }
+
+    bool Profile::load(std::string filename)
+    {
+        auto file = vfs.fopen(filename.c_str(), "rb");
+
+        enum class LineType
+        {
+            KEY_CODE = 0,
+            CYCLIC,
+            CHARACTERS,
+            TIMEOUTS
+        };
+
+        LineType lineType = LineType::KEY_CODE;
+        bool name         = false;
+
+        KeyProfile *pk = nullptr;
+        KeyProfile tmp;
+        while (vfs.eof(file) != true) {
+
+            std::string line = trim(vfs.getline(file));
+            if ((line[0] == '#') || (line.empty())) {
+                continue;
+            }
+            else {
+
+                // first not commented line is a name of profile
+                if (name == false) {
+                    LOG_INFO("profile name: %s", line.c_str());
+                    setName(line);
+                    name = true;
+                }
+                else {
+                    // new structure, create profile key and read the keyboard's key code
+                    if (lineType == LineType::KEY_CODE) {
+                        uint32_t keyCode;
+                        std::stringstream(line) >> keyCode;
+                        pk          = new KeyProfile();
+                        pk->keyCode = keyCode;
+                        lineType    = LineType::CYCLIC;
+                    }
+                    else if (lineType == LineType::CYCLIC) {
+                        pk->cyclic = (line.compare("true") == 0);
+                        lineType   = LineType::CHARACTERS;
+                    }
+                    else if (lineType == LineType::CHARACTERS) {
+                        addCharacters(pk, line);
+                        lineType = LineType::TIMEOUTS;
+                    }
+                    else if (lineType == LineType::TIMEOUTS) {
+                        addTimeouts(pk, line);
+                        if ((pk->chars.size() == pk->timeouts.size()) && (keys.find(pk->keyCode) == keys.end())) {
+                            addKeyProfile(pk);
+                        }
+                        else {
+                            LOG_FATAL("Incorrect number of chars or key code duplicate key code: [%d]", pk->keyCode);
+                            delete pk;
+                            pk = nullptr;
+                        }
+
+                        lineType = LineType::KEY_CODE;
+                    }
+                    else {
+                        LOG_FATAL("invalid line: [%s]", line.c_str());
+                    }
+                }
+            }
+        }
+
+        vfs.fclose(file);
+
+        return true;
+    }
+
+    void Profile::addCharacters(KeyProfile *pk, const std::string &s)
+    {
+
+        uint32_t charKey;
+        std::vector<std::string> vec = split(s, ',');
+        for (std::string s : vec) {
+            std::string ts = trim(s);
+            if (ts[0] == '\'') {
+                // empty character - no character
+                if (s.size() == 2) {
+                    pk->chars.push_back(0);
+                    break;
+                }
+                ts       = s.substr(1, s.size() - 1);
+                UTF8 utf = UTF8(ts);
+                charKey  = utf[0];
+                pk->chars.push_back(charKey);
+            }
+            else if (ts.substr(0, 2) == "0x") {
+                std::stringstream ss;
+                ss << std::hex << ts;
+                ss >> charKey;
+                pk->chars.push_back(charKey);
+            }
+        }
+    }
+    void Profile::addTimeouts(KeyProfile *pk, const std::string &s)
+    {
+        uint32_t timeout;
+        std::vector<std::string> vec = split(s, ',');
+        for (std::string s : vec) {
+            std::stringstream(trim(s)) >> timeout;
+            pk->timeouts.push_back(timeout);
+        }
+    }
+
+    void Profile::addKeyProfile(KeyProfile *pk)
+    {
+        if (pk != nullptr)
+            keys.insert(std::pair<uint32_t, KeyProfile *>(pk->keyCode, pk));
+    }
+
+    const KeyProfile *Profile::getKeyProfile(uint32_t keyCode)
+    {
+        auto key = keys.find(keyCode);
+        if (key != keys.end())
+            return key->second;
+        return nullptr;
+    }
+
+    uint32_t Profile::get(bsp::KeyCodes code, uint32_t times)
+    {
+        const KeyProfile *p = getKeyProfile(uint32_t(code));
+        if (p == nullptr) {
+            LOG_ERROR("KeyProfile for key: %d not found", code);
+            return 0;
+        }
+        return p->chars[times % p->chars.size()];
     }
-    return p->chars[times % p->chars.size()];
-}
 
 } /* namespace gui */
diff --git a/module-gui/gui/input/Profile.hpp b/module-gui/gui/input/Profile.hpp
index 70903f5a2..1ac9aa284 100644
--- a/module-gui/gui/input/Profile.hpp
+++ b/module-gui/gui/input/Profile.hpp
@@ -15,49 +15,63 @@
 #include <map>
 #include "input/InputEvent.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/*
- *
- */
-class KeyProfile {
-public:
-	uint32_t keyCode = 0;
-	bool cyclic = false;;
-	std::vector<uint32_t> chars;
-	std::vector<uint32_t> timeouts;
+    /*
+     *
+     */
+    class KeyProfile
+    {
+      public:
+        uint32_t keyCode = 0;
+        bool cyclic      = false;
+        ;
+        std::vector<uint32_t> chars;
+        std::vector<uint32_t> timeouts;
 
-	KeyProfile();
-	virtual ~KeyProfile();
+        KeyProfile();
+        virtual ~KeyProfile();
 
-	void addCharacters( const std::string& s );
-	void addTimeouts( const std::string& s );
-};
+        void addCharacters(const std::string &s);
+        void addTimeouts(const std::string &s);
+    };
 
-/*
- *
- */
-class Profile {
-	std::string name;
-	std::map<uint32_t, KeyProfile*> keys = {};
+    /*
+     *
+     */
+    class Profile
+    {
+        std::string name;
+        std::map<uint32_t, KeyProfile *> keys = {};
 
-	void addCharacters( KeyProfile* pk, const std::string& s );
-	void addTimeouts( KeyProfile* pk, const std::string& s );
-	void addKeyProfile( KeyProfile* pk );
-	void setName( std::string name ) { this->name = name; };
-	const KeyProfile* getKeyProfile( uint32_t keyCode );
-public:
-    void clear() { this->keys.clear(); };
-	Profile() = default;
-	Profile(const std::string &name);
-    Profile(Profile &&p);
-	virtual ~Profile();
+        void addCharacters(KeyProfile *pk, const std::string &s);
+        void addTimeouts(KeyProfile *pk, const std::string &s);
+        void addKeyProfile(KeyProfile *pk);
+        void setName(std::string name)
+        {
+            this->name = name;
+        };
+        const KeyProfile *getKeyProfile(uint32_t keyCode);
 
-	std::string getName(){ return name; };
-	bool load( std::string filename );
+      public:
+        void clear()
+        {
+            this->keys.clear();
+        };
+        Profile() = default;
+        Profile(const std::string &name);
+        Profile(Profile &&p);
+        virtual ~Profile();
 
-    uint32_t get(bsp::KeyCodes code, uint32_t times);
-};
+        std::string getName()
+        {
+            return name;
+        };
+        bool load(std::string filename);
+
+        uint32_t get(bsp::KeyCodes code, uint32_t times);
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/input/Translator.cpp b/module-gui/gui/input/Translator.cpp
index 5fbf62487..3f9354ba4 100644
--- a/module-gui/gui/input/Translator.cpp
+++ b/module-gui/gui/input/Translator.cpp
@@ -6,218 +6,249 @@
 namespace gui
 {
 
-void recon_long_press(InputEvent &evt, const RawKey &key, const RawKey &prev_key_press, uint32_t time)
-{
-    if (key.state == RawKey::State::Released && prev_key_press.key_code == key.key_code)
+    void recon_long_press(InputEvent &evt, const RawKey &key, const RawKey &prev_key_press, uint32_t time)
     {
-        // determine long press
-        if (key.time_release - prev_key_press.time_press >= key_time_longpress_ms)
-        {
-            evt.state = InputEvent::State::keyReleasedLong;
+        if (key.state == RawKey::State::Released && prev_key_press.key_code == key.key_code) {
+            // determine long press
+            if (key.time_release - prev_key_press.time_press >= key_time_longpress_ms) {
+                evt.state = InputEvent::State::keyReleasedLong;
+            }
         }
     }
-}
 
-InputEvent KeyBaseTranslation::set(RawKey key)
-{
-    gui::InputEvent evt(key);
-    if (key.state == RawKey::State::Pressed)
+    InputEvent KeyBaseTranslation::set(RawKey key)
     {
-        evt.state = InputEvent::State::keyPressed;
+        gui::InputEvent evt(key);
+        if (key.state == RawKey::State::Pressed) {
+            evt.state = InputEvent::State::keyPressed;
+        }
+        else if (key.state == RawKey::State::Released) {
+            evt.state = InputEvent::State::keyReleasedShort;
+        }
+        recon_long_press(evt, key, prev_key_press, key_time_longpress_ms);
+        // store last key press/release
+        if (key.state == RawKey::State::Pressed) {
+            prev_key_press = key;
+        }
+        if (key.state != RawKey::State::Released) {
+            prev_key_released = false;
+        }
+        else {
+            prev_key_released = true;
+        }
+        return evt;
     }
-    else if (key.state == RawKey::State::Released)
-    {
-        evt.state = InputEvent::State::keyReleasedShort;
-    }
-    recon_long_press(evt, key, prev_key_press, key_time_longpress_ms);
-    // store last key press/release
-    if (key.state == RawKey::State::Pressed)
-    {
-        prev_key_press = key;
-    }
-    if (key.state != RawKey::State::Released)
-    {
-        prev_key_released = false;
-    }
-    else
-    {
-        prev_key_released = true;
-    }
-    return evt;
-}
 
-bool KeyBaseTranslation::timeout(uint32_t time)
-{
-    if (!prev_key_released &&
-       (prev_key_press.time_press != 0) &&
-       (time - prev_key_press.time_press >= key_time_longpress_ms))
+    bool KeyBaseTranslation::timeout(uint32_t time)
     {
-        prev_key_timedout = true;
-        return true;
+        if (!prev_key_released && (prev_key_press.time_press != 0) &&
+            (time - prev_key_press.time_press >= key_time_longpress_ms)) {
+            prev_key_timedout = true;
+            return true;
+        }
+        return false;
     }
-    return false;
-}
 
-gui::KeyCode getKeyCode(bsp::KeyCodes code)
-{
-    switch(code) {
-        case bsp::KeyCodes::NumericKey1: return gui::KeyCode::KEY_1; break;
-        case bsp::KeyCodes::NumericKey2: return gui::KeyCode::KEY_2; break;
-        case bsp::KeyCodes::NumericKey3: return gui::KeyCode::KEY_3; break;
-        case bsp::KeyCodes::NumericKey4: return gui::KeyCode::KEY_4; break;
-        case bsp::KeyCodes::NumericKey5: return gui::KeyCode::KEY_5; break;
-        case bsp::KeyCodes::NumericKey6: return gui::KeyCode::KEY_6; break;
-        case bsp::KeyCodes::NumericKey7: return gui::KeyCode::KEY_7; break;
-        case bsp::KeyCodes::NumericKey8: return gui::KeyCode::KEY_8; break;
-        case bsp::KeyCodes::NumericKey9: return gui::KeyCode::KEY_9; break;
-        case bsp::KeyCodes::NumericKey0: return gui::KeyCode::KEY_0; break;
-        case bsp::KeyCodes::NumericKeyAst: return gui::KeyCode::KEY_AST; break;
-        case bsp::KeyCodes::NumericKeyPnd: return gui::KeyCode::KEY_PND; break;
-        case bsp::KeyCodes::JoystickLeft: return gui::KeyCode::KEY_LEFT; break;
-        case bsp::KeyCodes::JoystickRight: return gui::KeyCode::KEY_RIGHT; break;
-        case bsp::KeyCodes::JoystickUp: return gui::KeyCode::KEY_UP; break;
-        case bsp::KeyCodes::JoystickDown: return gui::KeyCode::KEY_DOWN; break;
-        case bsp::KeyCodes::JoystickEnter: return gui::KeyCode::KEY_ENTER; break;
-        case bsp::KeyCodes::FnLeft: return gui::KeyCode::KEY_LF; break;
-        case bsp::KeyCodes::FnRight: return gui::KeyCode::KEY_RF; break;
-        case bsp::KeyCodes::VolUp: return gui::KeyCode::KEY_VOLUP; break;
-        case bsp::KeyCodes::VolDown: return gui::KeyCode::KEY_VOLDN; break;
-        case bsp::KeyCodes::Torch: return gui::KeyCode::KEY_TORCH; break;
-        case bsp::KeyCodes::SSwitchUp: return gui::KeyCode::SWITCH_UP; break;
-        case bsp::KeyCodes::SSwitchDown: return gui::KeyCode::SWITCH_DN; break;
-        case bsp::KeyCodes::SSwitchMid: return gui::KeyCode::SWITCH_MID; break;
+    gui::KeyCode getKeyCode(bsp::KeyCodes code)
+    {
+        switch (code) {
+        case bsp::KeyCodes::NumericKey1:
+            return gui::KeyCode::KEY_1;
+            break;
+        case bsp::KeyCodes::NumericKey2:
+            return gui::KeyCode::KEY_2;
+            break;
+        case bsp::KeyCodes::NumericKey3:
+            return gui::KeyCode::KEY_3;
+            break;
+        case bsp::KeyCodes::NumericKey4:
+            return gui::KeyCode::KEY_4;
+            break;
+        case bsp::KeyCodes::NumericKey5:
+            return gui::KeyCode::KEY_5;
+            break;
+        case bsp::KeyCodes::NumericKey6:
+            return gui::KeyCode::KEY_6;
+            break;
+        case bsp::KeyCodes::NumericKey7:
+            return gui::KeyCode::KEY_7;
+            break;
+        case bsp::KeyCodes::NumericKey8:
+            return gui::KeyCode::KEY_8;
+            break;
+        case bsp::KeyCodes::NumericKey9:
+            return gui::KeyCode::KEY_9;
+            break;
+        case bsp::KeyCodes::NumericKey0:
+            return gui::KeyCode::KEY_0;
+            break;
+        case bsp::KeyCodes::NumericKeyAst:
+            return gui::KeyCode::KEY_AST;
+            break;
+        case bsp::KeyCodes::NumericKeyPnd:
+            return gui::KeyCode::KEY_PND;
+            break;
+        case bsp::KeyCodes::JoystickLeft:
+            return gui::KeyCode::KEY_LEFT;
+            break;
+        case bsp::KeyCodes::JoystickRight:
+            return gui::KeyCode::KEY_RIGHT;
+            break;
+        case bsp::KeyCodes::JoystickUp:
+            return gui::KeyCode::KEY_UP;
+            break;
+        case bsp::KeyCodes::JoystickDown:
+            return gui::KeyCode::KEY_DOWN;
+            break;
+        case bsp::KeyCodes::JoystickEnter:
+            return gui::KeyCode::KEY_ENTER;
+            break;
+        case bsp::KeyCodes::FnLeft:
+            return gui::KeyCode::KEY_LF;
+            break;
+        case bsp::KeyCodes::FnRight:
+            return gui::KeyCode::KEY_RF;
+            break;
+        case bsp::KeyCodes::VolUp:
+            return gui::KeyCode::KEY_VOLUP;
+            break;
+        case bsp::KeyCodes::VolDown:
+            return gui::KeyCode::KEY_VOLDN;
+            break;
+        case bsp::KeyCodes::Torch:
+            return gui::KeyCode::KEY_TORCH;
+            break;
+        case bsp::KeyCodes::SSwitchUp:
+            return gui::KeyCode::SWITCH_UP;
+            break;
+        case bsp::KeyCodes::SSwitchDown:
+            return gui::KeyCode::SWITCH_DN;
+            break;
+        case bsp::KeyCodes::SSwitchMid:
+            return gui::KeyCode::SWITCH_MID;
+            break;
         default:
             LOG_ERROR("Unhandled bsp key!");
             return gui::KeyCode::KEY_UNDEFINED;
-    }
-}
-
-InputEvent KeyInputSimpleTranslation::translate(RawKey key)
-{
-    auto evt = KeyBaseTranslation::set(key);
-    // when last action timed out we don't want to handle key release
-    if(prev_key_timedout && key.state == RawKey::State::Released) {
-        evt.state = InputEvent::State::Undefined;
-        prev_key_timedout = false;
-    }
-    evt.keyCode = getKeyCode(key.key_code);
-    return evt;
-}
-
-InputEvent KeyInputSimpleTranslation::translate(uint32_t timeout)
-{
-    RawKey key;
-    key.state = RawKey::State::Released;
-    key.key_code = prev_key_press.key_code;
-    key.time_press = 0;
-    key.time_release = timeout;
-    InputEvent evt(key);
-    evt.state = InputEvent::State::keyReleasedLong;
-    evt.keyCode = getKeyCode(key.key_code);
-    return evt;
-}
-
-/// profiles cache - load once for all
-class Profiles
-{
-  private:
-    const char* profilesFolder = "sys/assets/profiles";
-    std::map<std::string, gui::Profile> profiles = {};
-
-    void loadProfile(const std::string &filepath)
-    {
-        LOG_INFO("Load profile: %s", filepath.c_str());
-        auto p = Profile(filepath);
-        if( p.getName() != std::string() ) {
-            profiles.insert({p.getName(), std::move(p)});
         }
     }
 
-    std::vector<std::string> getProfilesList(std::string ext)
+    InputEvent KeyInputSimpleTranslation::translate(RawKey key)
     {
-        std::vector<std::string> profileFiles;
-        LOG_INFO("Scanning %s profiles folder: %s", ext.c_str(), profilesFolder);
-        auto dirList = vfs.listdir(profilesFolder, ext);
+        auto evt = KeyBaseTranslation::set(key);
+        // when last action timed out we don't want to handle key release
+        if (prev_key_timedout && key.state == RawKey::State::Released) {
+            evt.state         = InputEvent::State::Undefined;
+            prev_key_timedout = false;
+        }
+        evt.keyCode = getKeyCode(key.key_code);
+        return evt;
+    }
 
-        for (vfs::DirectoryEntry ent : dirList)
+    InputEvent KeyInputSimpleTranslation::translate(uint32_t timeout)
+    {
+        RawKey key;
+        key.state        = RawKey::State::Released;
+        key.key_code     = prev_key_press.key_code;
+        key.time_press   = 0;
+        key.time_release = timeout;
+        InputEvent evt(key);
+        evt.state   = InputEvent::State::keyReleasedLong;
+        evt.keyCode = getKeyCode(key.key_code);
+        return evt;
+    }
+
+    /// profiles cache - load once for all
+    class Profiles
+    {
+      private:
+        const char *profilesFolder                   = "sys/assets/profiles";
+        std::map<std::string, gui::Profile> profiles = {};
+
+        void loadProfile(const std::string &filepath)
         {
-            if (ent.attributes != vfs::FileAttributes::Directory)
-            {
-                profileFiles.push_back(std::string(profilesFolder) + "/" + ent.fileName);
+            LOG_INFO("Load profile: %s", filepath.c_str());
+            auto p = Profile(filepath);
+            if (p.getName() != std::string()) {
+                profiles.insert({p.getName(), std::move(p)});
             }
         }
 
-        LOG_INFO("Total number of profiles: %d", profileFiles.size());
-        return profileFiles;
-    }
-
-    void init()
-    {
-        std::vector<std::string> profileFiles = getProfilesList(".kprof");
-        for (std::string mapName : profileFiles)
+        std::vector<std::string> getProfilesList(std::string ext)
         {
-            if(std::size(mapName)) {
-                loadProfile(mapName);
+            std::vector<std::string> profileFiles;
+            LOG_INFO("Scanning %s profiles folder: %s", ext.c_str(), profilesFolder);
+            auto dirList = vfs.listdir(profilesFolder, ext);
+
+            for (vfs::DirectoryEntry ent : dirList) {
+                if (ent.attributes != vfs::FileAttributes::Directory) {
+                    profileFiles.push_back(std::string(profilesFolder) + "/" + ent.fileName);
+                }
+            }
+
+            LOG_INFO("Total number of profiles: %d", profileFiles.size());
+            return profileFiles;
+        }
+
+        void init()
+        {
+            std::vector<std::string> profileFiles = getProfilesList(".kprof");
+            for (std::string mapName : profileFiles) {
+                if (std::size(mapName)) {
+                    loadProfile(mapName);
+                }
+            }
+            if (std::size(profiles) == 0) {
+                LOG_ERROR("No keyboard profiles loaded");
             }
         }
-        if( std::size(profiles) == 0) {
-            LOG_ERROR("No keyboard profiles loaded");
-        }
-    }
-    Profile empty;
+        Profile empty;
 
-  public:
-    static Profiles &get()
-    {
-        static Profiles *p;
-        if (p == nullptr)
+      public:
+        static Profiles &get()
         {
-            p = new Profiles();
-            p->init();
+            static Profiles *p;
+            if (p == nullptr) {
+                p = new Profiles();
+                p->init();
+            }
+            return *p;
         }
-        return *p;
-    }
 
-    static Profile &get(const std::string &name)
-    {
-        // if profile not in profile map -> load
-        if(std::size(name) ==0) {
-            LOG_ERROR("Request for non existend profile: %s", name.c_str());
-            return get().empty;
-        }
-        if (get().profiles.find(name) == get().profiles.end())
+        static Profile &get(const std::string &name)
         {
-            get().loadProfile(name);
+            // if profile not in profile map -> load
+            if (std::size(name) == 0) {
+                LOG_ERROR("Request for non existend profile: %s", name.c_str());
+                return get().empty;
+            }
+            if (get().profiles.find(name) == get().profiles.end()) {
+                get().loadProfile(name);
+            }
+            return get().profiles[name];
         }
-        return get().profiles[name];
-    }
-};
+    };
 
-uint32_t KeyInputMappedTranslation::handle(RawKey key, const std::string &keymap)
-{
-    // get shortpress
-    if (prev_key_press.key_code != key.key_code)
+    uint32_t KeyInputMappedTranslation::handle(RawKey key, const std::string &keymap)
     {
-        times = 0;
-    }
-    else if (key.state == RawKey::State::Released)
-    {
-        /// TODO use key_time_cycle_ms from keymap (if exists in keymap...)
-        if (key.time_release - prev_key_press.time_release < key_time_cycle_ms)
-        {
-            ++times;
-        }
-        else
-        {
+        // get shortpress
+        if (prev_key_press.key_code != key.key_code) {
             times = 0;
         }
-    }
-    if (key.state == RawKey::State::Released)
-    {
-        prev_key_press = key;
-    }
+        else if (key.state == RawKey::State::Released) {
+            /// TODO use key_time_cycle_ms from keymap (if exists in keymap...)
+            if (key.time_release - prev_key_press.time_release < key_time_cycle_ms) {
+                ++times;
+            }
+            else {
+                times = 0;
+            }
+        }
+        if (key.state == RawKey::State::Released) {
+            prev_key_press = key;
+        }
 
-    return Profiles::get(keymap).get(key.key_code, times);
-}
+        return Profiles::get(keymap).get(key.key_code, times);
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/input/Translator.hpp b/module-gui/gui/input/Translator.hpp
index 5a563273b..220105068 100644
--- a/module-gui/gui/input/Translator.hpp
+++ b/module-gui/gui/input/Translator.hpp
@@ -13,47 +13,52 @@
 namespace gui
 {
 
-// TODO if neccessary `custom` keymap can be added her
-enum class Keymaps {
-    ABC,
-    abc,
-    digit,
-};
+    // TODO if neccessary `custom` keymap can be added her
+    enum class Keymaps
+    {
+        ABC,
+        abc,
+        digit,
+    };
 
-class KeyBaseTranslation
-{
-  public:
-    // previous pressed key (only for pressed keys), used for shortpress and longpress
-    RawKey prev_key_press = {};
-    // was previous key released? used for longpress only
-    bool prev_key_released = true;
-    // did previous key already timed out (and send longpress as a result)
-    bool prev_key_timedout = false;
-    InputEvent set(RawKey key);
-    /// timeout keypress (only press) - returns true on timeout'ed keypress
-    bool timeout(uint32_t time);
-};
+    class KeyBaseTranslation
+    {
+      public:
+        // previous pressed key (only for pressed keys), used for shortpress and longpress
+        RawKey prev_key_press = {};
+        // was previous key released? used for longpress only
+        bool prev_key_released = true;
+        // did previous key already timed out (and send longpress as a result)
+        bool prev_key_timedout = false;
+        InputEvent set(RawKey key);
+        /// timeout keypress (only press) - returns true on timeout'ed keypress
+        bool timeout(uint32_t time);
+    };
 
-/// KeyPress translator
-/// simplest 1:1 keys handling, used when application needs simplest key parsing possible
-/// no keys behaviour analysis done here - just mapping
-class KeyInputSimpleTranslation : public KeyBaseTranslation
-{
-  public:
-    /// translate incomming key
-    InputEvent translate(RawKey key);
-    /// translate timeout - simulate key release
-    InputEvent translate(uint32_t timeout);
-};
+    /// KeyPress translator
+    /// simplest 1:1 keys handling, used when application needs simplest key parsing possible
+    /// no keys behaviour analysis done here - just mapping
+    class KeyInputSimpleTranslation : public KeyBaseTranslation
+    {
+      public:
+        /// translate incomming key
+        InputEvent translate(RawKey key);
+        /// translate timeout - simulate key release
+        InputEvent translate(uint32_t timeout);
+    };
 
-/// translator using & switching KeyMaps for use per widget basis ,called for selected widget, per widget basis
-class KeyInputMappedTranslation : public KeyBaseTranslation
-{
-    uint32_t times = 0;
-  public:
-    bool setProfile(std::string profileName);
-    uint32_t handle(RawKey key, const std::string &keymap);
-    uint32_t getTimes() {return times;}
-};
+    /// translator using & switching KeyMaps for use per widget basis ,called for selected widget, per widget basis
+    class KeyInputMappedTranslation : public KeyBaseTranslation
+    {
+        uint32_t times = 0;
+
+      public:
+        bool setProfile(std::string profileName);
+        uint32_t handle(RawKey key, const std::string &keymap);
+        uint32_t getTimes()
+        {
+            return times;
+        }
+    };
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Alignment.cpp b/module-gui/gui/widgets/Alignment.cpp
index 7be7b4229..13da8741f 100644
--- a/module-gui/gui/widgets/Alignment.cpp
+++ b/module-gui/gui/widgets/Alignment.cpp
@@ -7,22 +7,21 @@
 
 #include "Alignment.hpp"
 
-namespace gui {
-
-Alignment::Alignment() :
-	alignment{Alignment::ALIGN_HORIZONTAL_LEFT | ALIGN_VERTICAL_TOP } {
-}
-
-Alignment::Alignment(const uint32_t align) : alignment{align}
+namespace gui
 {
-}
 
-Alignment::Alignment(const uint32_t valH, const uint32_t valV) : Alignment(valH | valV)
-{
-}
+    Alignment::Alignment() : alignment{Alignment::ALIGN_HORIZONTAL_LEFT | ALIGN_VERTICAL_TOP}
+    {}
 
-Alignment::~Alignment() {
-	// TODO Auto-generated destructor stub
-}
+    Alignment::Alignment(const uint32_t align) : alignment{align}
+    {}
+
+    Alignment::Alignment(const uint32_t valH, const uint32_t valV) : Alignment(valH | valV)
+    {}
+
+    Alignment::~Alignment()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Alignment.hpp b/module-gui/gui/widgets/Alignment.hpp
index acd3eee87..5e6049823 100644
--- a/module-gui/gui/widgets/Alignment.hpp
+++ b/module-gui/gui/widgets/Alignment.hpp
@@ -10,35 +10,38 @@
 
 #include <cstdint>
 
-namespace gui {
+namespace gui
+{
 
-class Alignment {
-public:
-  enum : uint32_t
-  {
-      ALIGN_VERTICAL_CENTER = 1 << 0,
-      ALIGN_VERTICAL_TOP = 1 << 1,
-      ALIGN_VERTICAL_BOTTOM = 1 << 2,
-      ALIGN_HORIZONTAL_CENTER = 1 << 3,
-      ALIGN_HORIZONTAL_LEFT = 1 << 4,
-      ALIGN_HORIZONTAL_RIGHT = 1 << 5,
-  };
+    class Alignment
+    {
+      public:
+        enum : uint32_t
+        {
+            ALIGN_VERTICAL_CENTER   = 1 << 0,
+            ALIGN_VERTICAL_TOP      = 1 << 1,
+            ALIGN_VERTICAL_BOTTOM   = 1 << 2,
+            ALIGN_HORIZONTAL_CENTER = 1 << 3,
+            ALIGN_HORIZONTAL_LEFT   = 1 << 4,
+            ALIGN_HORIZONTAL_RIGHT  = 1 << 5,
+        };
 
-  union {
-      uint32_t alignment;
-      struct
-      {
-          uint32_t vertical_center : 1, vertical_top : 1, vertical_bottom : 1, horizontal_center : 1, horizontal_left : 1, horizontal_right : 1;
-      };
-  };
+        union
+        {
+            uint32_t alignment;
+            struct
+            {
+                uint32_t vertical_center : 1, vertical_top : 1, vertical_bottom : 1, horizontal_center : 1,
+                    horizontal_left : 1, horizontal_right : 1;
+            };
+        };
 
-    Alignment();
-    Alignment(const uint32_t valH, const uint32_t valV);
-    Alignment(const uint32_t align);
-    virtual ~Alignment();
-};
+        Alignment();
+        Alignment(const uint32_t valH, const uint32_t valV);
+        Alignment(const uint32_t align);
+        virtual ~Alignment();
+    };
 
 } /* namespace gui */
 
 #endif /* MIDDLEWARES_GUI_WIDGETS_ALIGNMENT_HPP_ */
-
diff --git a/module-gui/gui/widgets/BottomBar.cpp b/module-gui/gui/widgets/BottomBar.cpp
index 8342bc762..caef04637 100644
--- a/module-gui/gui/widgets/BottomBar.cpp
+++ b/module-gui/gui/widgets/BottomBar.cpp
@@ -11,115 +11,121 @@
 #include <Style.hpp>
 #include <log/log.hpp>
 
-namespace gui {
-
-BottomBar::BottomBar() {
-
-	Margins margins {20,0,20,0};
-	left = prepareLabel( Side::LEFT );
-	center = prepareLabel( Side::CENTER );
-	right = prepareLabel( Side::RIGHT );
-
-	left->setMargins(margins);
-	center->setMargins(margins);
-	right->setMargins(margins);
-
-
-	addWidget(left);
-	addWidget(center);
-	addWidget(right);
-
-	setFillColor( ColorFullWhite );
-	setBorderColor( ColorNoColor );
-	setFilled(true);
-	setSize(480, 50);
-}
-BottomBar::BottomBar( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h ) : Rect{ parent, x, y, w, h } {
-
-	Margins margins {20,0,20,0};
-	left = prepareLabel( Side::LEFT );
-	center = prepareLabel( Side::CENTER );
-	right = prepareLabel( Side::RIGHT );
-
-	left->setMargins(margins);
-	center->setMargins(margins);
-	right->setMargins(margins);
-
-	addWidget(left);
-	addWidget(center);
-	addWidget(right);
-
-	setFillColor( ColorFullWhite );
-	setBorderColor( ColorNoColor );
-	setFilled(true);
-	setSize(480, 50);
-	updateDrawArea();
-}
-BottomBar::~BottomBar() {
-}
-
-gui::Label* BottomBar::prepareLabel( BottomBar::Side side ) {
-	Label* label = new Label( this, 0,0,0,0 );
-	label->setBorderColor( Color{15,15} );
-	switch( side ) {
-		case Side::LEFT:
-			label->setAlignement( gui::Alignment(	gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER ));
-			label->setFont(style::footer::font::medium);
-			break;
-		case Side::CENTER:
-			label->setAlignement( gui::Alignment(	gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER ));
-			label->setFont(style::footer::font::bold);
-			break;
-		case Side::RIGHT:
-			label->setAlignement( gui::Alignment(	gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_CENTER ));
-			label->setFont(style::footer::font::medium);
-			break;
-	};
-
-	label->setFilled(false);
-
-	return label;
-}
-
-Label *BottomBar::getSide(BottomBar::Side side)
+namespace gui
 {
-    switch (side)
+
+    BottomBar::BottomBar()
     {
-    case Side::LEFT:
-        return left;
-    case Side::CENTER:
-        return center;
-    case Side::RIGHT:
-        return right;
-    default:
-        LOG_ERROR("shall never got here - just to ommit warning");
-        return right;
-    };
-    return nullptr;
-}
 
-void BottomBar::setActive(BottomBar::Side side, bool active)
-{
-    getSide(side)->setVisible(active);
-}
+        Margins margins{20, 0, 20, 0};
+        left   = prepareLabel(Side::LEFT);
+        center = prepareLabel(Side::CENTER);
+        right  = prepareLabel(Side::RIGHT);
 
-void BottomBar::setText(BottomBar::Side side, const UTF8 &str, bool active)
-{
-    getSide(side)->setText(str);
-    setActive(side, active);
-}
+        left->setMargins(margins);
+        center->setMargins(margins);
+        right->setMargins(margins);
 
-UTF8 BottomBar::getText(BottomBar::Side side)
-{
-    return getSide(side)->getText();
-}
+        addWidget(left);
+        addWidget(center);
+        addWidget(right);
 
-bool BottomBar::onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) {
-	Rect::onDimensionChanged(oldDim, newDim);
-	left->setSize(newDim.w, newDim.h );
-	center->setSize(newDim.w, newDim.h );
-	right->setSize(newDim.w, newDim.h );
-	return true;
-}
+        setFillColor(ColorFullWhite);
+        setBorderColor(ColorNoColor);
+        setFilled(true);
+        setSize(480, 50);
+    }
+    BottomBar::BottomBar(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h) : Rect{parent, x, y, w, h}
+    {
+
+        Margins margins{20, 0, 20, 0};
+        left   = prepareLabel(Side::LEFT);
+        center = prepareLabel(Side::CENTER);
+        right  = prepareLabel(Side::RIGHT);
+
+        left->setMargins(margins);
+        center->setMargins(margins);
+        right->setMargins(margins);
+
+        addWidget(left);
+        addWidget(center);
+        addWidget(right);
+
+        setFillColor(ColorFullWhite);
+        setBorderColor(ColorNoColor);
+        setFilled(true);
+        setSize(480, 50);
+        updateDrawArea();
+    }
+    BottomBar::~BottomBar()
+    {}
+
+    gui::Label *BottomBar::prepareLabel(BottomBar::Side side)
+    {
+        Label *label = new Label(this, 0, 0, 0, 0);
+        label->setBorderColor(Color{15, 15});
+        switch (side) {
+        case Side::LEFT:
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
+            label->setFont(style::footer::font::medium);
+            break;
+        case Side::CENTER:
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+            label->setFont(style::footer::font::bold);
+            break;
+        case Side::RIGHT:
+            label->setAlignement(
+                gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_CENTER));
+            label->setFont(style::footer::font::medium);
+            break;
+        };
+
+        label->setFilled(false);
+
+        return label;
+    }
+
+    Label *BottomBar::getSide(BottomBar::Side side)
+    {
+        switch (side) {
+        case Side::LEFT:
+            return left;
+        case Side::CENTER:
+            return center;
+        case Side::RIGHT:
+            return right;
+        default:
+            LOG_ERROR("shall never got here - just to ommit warning");
+            return right;
+        };
+        return nullptr;
+    }
+
+    void BottomBar::setActive(BottomBar::Side side, bool active)
+    {
+        getSide(side)->setVisible(active);
+    }
+
+    void BottomBar::setText(BottomBar::Side side, const UTF8 &str, bool active)
+    {
+        getSide(side)->setText(str);
+        setActive(side, active);
+    }
+
+    UTF8 BottomBar::getText(BottomBar::Side side)
+    {
+        return getSide(side)->getText();
+    }
+
+    bool BottomBar::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        Rect::onDimensionChanged(oldDim, newDim);
+        left->setSize(newDim.w, newDim.h);
+        center->setSize(newDim.w, newDim.h);
+        right->setSize(newDim.w, newDim.h);
+        return true;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/BottomBar.hpp b/module-gui/gui/widgets/BottomBar.hpp
index 462ddaf0d..e5800f1e3 100644
--- a/module-gui/gui/widgets/BottomBar.hpp
+++ b/module-gui/gui/widgets/BottomBar.hpp
@@ -12,7 +12,8 @@
 #include "Label.hpp"
 #include "utf8/UTF8.hpp"
 
-namespace gui {
+namespace gui
+{
 
     /// Footer for most design windows
     ///
diff --git a/module-gui/gui/widgets/BoxLayout.cpp b/module-gui/gui/widgets/BoxLayout.cpp
index 636eb034e..f52aecbed 100644
--- a/module-gui/gui/widgets/BoxLayout.cpp
+++ b/module-gui/gui/widgets/BoxLayout.cpp
@@ -10,32 +10,28 @@
 
 #include <Label.hpp>
 
-namespace gui {
+namespace gui
+{
 
     BoxLayout::BoxLayout() : BoxLayout(nullptr, 0, 0, 0, 0)
-    {
-    }
+    {}
 
-    BoxLayout::BoxLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h) : Rect(parent, x, y, w, h)
-    {
-    }
+    BoxLayout::BoxLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
+        : Rect(parent, x, y, w, h)
+    {}
 
     bool BoxLayout::onInput(const InputEvent &inputEvent)
     {
-        if (inputCallback && inputCallback(*this, inputEvent))
-        {
+        if (inputCallback && inputCallback(*this, inputEvent)) {
             return true;
         }
-        if (focusItem && focusItem->onInput(inputEvent))
-        {
+        if (focusItem && focusItem->onInput(inputEvent)) {
             return true;
         }
-        if (handleNavigation(inputEvent))
-        {
+        if (handleNavigation(inputEvent)) {
             return true;
         }
-        if (borderCallback && borderCallback(inputEvent))
-        {
+        if (borderCallback && borderCallback(inputEvent)) {
             return true;
         }
         // let item logic rule it
@@ -49,209 +45,205 @@ namespace gui {
         else
             this->setFocusItem(nullptr);
         this->setNavigation();
-        if (this->focusChangedCallback)
-        {
+        if (this->focusChangedCallback) {
             this->focusChangedCallback(*this);
         }
         return true;
     }
 
-void BoxLayout::resizeItems() {
-}
+    void BoxLayout::resizeItems()
+    {}
 
-void BoxLayout::setPosition( const short& x, const short& y ) {
-	Rect::setPosition( x, y );
-}
-void BoxLayout::setSize(const unsigned short w, const unsigned short h)
-{
-    Rect::setSize(w, h);
-
-    resizeItems();
-}
-void BoxLayout::addWidget(Item *item)
-{
-    Rect::addWidget(item);
-    resizeItems();
-}
-bool BoxLayout::removeWidget( Item* item ) {
-	bool ret = Rect::removeWidget( item );
-
-	resizeItems();
-
-	return ret;
-}
-std::list<DrawCommand*> BoxLayout::buildDrawList() {
-    auto el = Rect::buildDrawList();
-    return el;
-}
-
-void BoxLayout::setVisible(bool value, bool previous)
-{
-    visible = value; // maybe use parent setVisible(...)? would be better but which one?
-    if (value == true)
+    void BoxLayout::setPosition(const short &x, const short &y)
     {
-        resizeItems();   // move items in box in proper places
-        setNavigation(); // set navigation through kids -> TODO handle out of last/first to parent
-        if (children.size())
-        { // set first visible kid as focused item - TODO should check for actionItems too...
-            /// this if back / front is crappy :|
-            if (previous)
-            {
-                for (auto el = children.rbegin(); el != children.rend(); ++el)
-                {
-                    if ((*el)->visible && (*el)->activeItem)
-                    {
-                        setFocusItem(*el);
-                        break;
+        Rect::setPosition(x, y);
+    }
+    void BoxLayout::setSize(const unsigned short w, const unsigned short h)
+    {
+        Rect::setSize(w, h);
+
+        resizeItems();
+    }
+    void BoxLayout::addWidget(Item *item)
+    {
+        Rect::addWidget(item);
+        resizeItems();
+    }
+    bool BoxLayout::removeWidget(Item *item)
+    {
+        bool ret = Rect::removeWidget(item);
+
+        resizeItems();
+
+        return ret;
+    }
+    std::list<DrawCommand *> BoxLayout::buildDrawList()
+    {
+        auto el = Rect::buildDrawList();
+        return el;
+    }
+
+    void BoxLayout::setVisible(bool value, bool previous)
+    {
+        visible = value; // maybe use parent setVisible(...)? would be better but which one?
+        if (value == true) {
+            resizeItems();         // move items in box in proper places
+            setNavigation();       // set navigation through kids -> TODO handle out of last/first to parent
+            if (children.size()) { // set first visible kid as focused item - TODO should check for actionItems too...
+                /// this if back / front is crappy :|
+                if (previous) {
+                    for (auto el = children.rbegin(); el != children.rend(); ++el) {
+                        if ((*el)->visible && (*el)->activeItem) {
+                            setFocusItem(*el);
+                            break;
+                        }
                     }
                 }
-            }
-            else
-            {
-                for (auto &el : children)
-                {
-                    if (el->visible && el->activeItem)
-                    {
-                        setFocusItem(el);
-                        break;
+                else {
+                    for (auto &el : children) {
+                        if (el->visible && el->activeItem) {
+                            setFocusItem(el);
+                            break;
+                        }
                     }
                 }
             }
         }
     }
-}
 
-void BoxLayout::setVisible(bool value)
-{
-    setVisible(value, false);
-}
-
-// space left distposition `first is better` tactics
-// there could be other i.e. socialism: each element take in equal part up to it's max size
-// not needed now == not implemented
-template <Axis axis> void BoxLayout::resizeItems()
-{
-    // we want to split to interested parties what's left, as much as they can fit
-    auto to_split = sizeLeft<axis>(this);
-    auto pos = reverse_order ? this->area().size(axis) : 0;
-    auto pos_update = [this, &pos](Item *it) {
-        if (this->reverse_order)
-        {
-            pos -= it->area(Item::Area::Actual).size(axis);
-            it->area(Item::Area::Actual).pos(axis) = pos;
-            it->area(Item::Area::Normal).pos(axis) = pos;
-        }
-        else
-        {
-            it->area(Item::Area::Actual).pos(axis) = pos;
-            it->area(Item::Area::Normal).pos(axis) = pos;
-            pos += it->area(Item::Area::Actual).size(axis);
-        }
-    };
-
-    auto set_size = [this, &to_split, &pos_update](Item *el, auto &pos) {
-        if (el == nullptr)
-        {
-            return;
-        }
-        auto left_in_el = el->area(Item::Area::Max).size(axis) - el->area(Item::Area::Normal).size(axis);
-        if (to_split > 0 && left_in_el > 0)
-        {
-            auto resize = left_in_el < to_split ? left_in_el : to_split;
-            el->area(Item::Area::Actual).size(axis) += resize;
-            to_split -= resize;
-        }
-    };
-
-    for (auto &el : children)
+    void BoxLayout::setVisible(bool value)
     {
-        el->area(Item::Area::Actual) = el->area(Item::Area::Normal);
-        set_size(el, pos);
-        pos_update(el);
-        // LOG_DEBUG("> el %s", el->area(Area::Normal).str().c_str()); // log to show how inefficient is adding single element at a time
+        setVisible(value, false);
     }
-    Rect::updateDrawArea();
-}
 
-template <Axis axis> void BoxLayout::addWidget(Item *item)
-{
-    Rect::addWidget(item);
-    item->visible = false;
-    if (size<axis>(this) - sizeUsed<axis>(this) >= size<axis>(item))
+    // space left distposition `first is better` tactics
+    // there could be other i.e. socialism: each element take in equal part up to it's max size
+    // not needed now == not implemented
+    template <Axis axis> void BoxLayout::resizeItems()
     {
-        item->visible = true;
-        resizeItems<axis>();
-    }
-}
+        // we want to split to interested parties what's left, as much as they can fit
+        auto to_split   = sizeLeft<axis>(this);
+        auto pos        = reverse_order ? this->area().size(axis) : 0;
+        auto pos_update = [this, &pos](Item *it) {
+            if (this->reverse_order) {
+                pos -= it->area(Item::Area::Actual).size(axis);
+                it->area(Item::Area::Actual).pos(axis) = pos;
+                it->area(Item::Area::Normal).pos(axis) = pos;
+            }
+            else {
+                it->area(Item::Area::Actual).pos(axis) = pos;
+                it->area(Item::Area::Normal).pos(axis) = pos;
+                pos += it->area(Item::Area::Actual).size(axis);
+            }
+        };
 
-std::list<Item *>::iterator BoxLayout::nextNavigationItem(std::list<Item *>::iterator from)
-{
-    return std::find_if(from, this->children.end(), [](auto &el) -> bool {
-        if (el->visible && el->activeItem)
-        {
-            return true;
+        auto set_size = [this, &to_split, &pos_update](Item *el, auto &pos) {
+            if (el == nullptr) {
+                return;
+            }
+            auto left_in_el = el->area(Item::Area::Max).size(axis) - el->area(Item::Area::Normal).size(axis);
+            if (to_split > 0 && left_in_el > 0) {
+                auto resize = left_in_el < to_split ? left_in_el : to_split;
+                el->area(Item::Area::Actual).size(axis) += resize;
+                to_split -= resize;
+            }
+        };
+
+        for (auto &el : children) {
+            el->area(Item::Area::Actual) = el->area(Item::Area::Normal);
+            set_size(el, pos);
+            pos_update(el);
+            // LOG_DEBUG("> el %s", el->area(Area::Normal).str().c_str()); // log to show how inefficient is adding
+            // single element at a time
         }
-        return false;
-    });
-}
+        Rect::updateDrawArea();
+    }
 
-void BoxLayout::setNavigation()
-{
-    auto previous = nextNavigationItem(children.begin()), next = children.end();
-    int i = 0;
-    if (type == ItemType::VBOX)
+    template <Axis axis> void BoxLayout::addWidget(Item *item)
     {
-        while ((previous != children.end()) && ((next = nextNavigationItem(std::next(previous))) != std::end(children)))
-        {
-            (*previous)->setNavigationItem(reverse_order ? NavigationDirection::UP : NavigationDirection::DOWN, *next);
-            (*next)->setNavigationItem(reverse_order ? NavigationDirection::DOWN : NavigationDirection::UP, *previous);
-            previous = next;
+        Rect::addWidget(item);
+        item->visible = false;
+        if (size<axis>(this) - sizeUsed<axis>(this) >= size<axis>(item)) {
+            item->visible = true;
+            resizeItems<axis>();
         }
     }
 
-    if (type == ItemType::HBOX)
+    std::list<Item *>::iterator BoxLayout::nextNavigationItem(std::list<Item *>::iterator from)
     {
-        while ((previous != children.end()) && ((next = nextNavigationItem(std::next(previous))) != std::end(children)))
-        {
-            (*previous)->setNavigationItem(reverse_order ? NavigationDirection::LEFT : NavigationDirection::RIGHT, *next);
-            (*next)->setNavigationItem(reverse_order ? NavigationDirection::RIGHT : NavigationDirection::LEFT, *previous);
-            previous = next;
+        return std::find_if(from, this->children.end(), [](auto &el) -> bool {
+            if (el->visible && el->activeItem) {
+                return true;
+            }
+            return false;
+        });
+    }
+
+    void BoxLayout::setNavigation()
+    {
+        auto previous = nextNavigationItem(children.begin()), next = children.end();
+        int i = 0;
+        if (type == ItemType::VBOX) {
+            while ((previous != children.end()) &&
+                   ((next = nextNavigationItem(std::next(previous))) != std::end(children))) {
+                (*previous)->setNavigationItem(reverse_order ? NavigationDirection::UP : NavigationDirection::DOWN,
+                                               *next);
+                (*next)->setNavigationItem(reverse_order ? NavigationDirection::DOWN : NavigationDirection::UP,
+                                           *previous);
+                previous = next;
+            }
+        }
+
+        if (type == ItemType::HBOX) {
+            while ((previous != children.end()) &&
+                   ((next = nextNavigationItem(std::next(previous))) != std::end(children))) {
+                (*previous)->setNavigationItem(reverse_order ? NavigationDirection::LEFT : NavigationDirection::RIGHT,
+                                               *next);
+                (*next)->setNavigationItem(reverse_order ? NavigationDirection::RIGHT : NavigationDirection::LEFT,
+                                           *previous);
+                previous = next;
+            }
         }
     }
-}
 
-HBox::HBox() : BoxLayout() {
-	type = ItemType::HBOX;
-}
-HBox::HBox( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h) :
-	BoxLayout( parent, x, y, w, h ) {
-	type = ItemType::HBOX;
-}
+    HBox::HBox() : BoxLayout()
+    {
+        type = ItemType::HBOX;
+    }
+    HBox::HBox(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
+        : BoxLayout(parent, x, y, w, h)
+    {
+        type = ItemType::HBOX;
+    }
 
-void HBox::resizeItems() {
-    BoxLayout::resizeItems<Axis::X>();
-}
+    void HBox::resizeItems()
+    {
+        BoxLayout::resizeItems<Axis::X>();
+    }
 
-void HBox::addWidget(Item *item)
-{
-    BoxLayout::addWidget<Axis::X>(item);
-}
+    void HBox::addWidget(Item *item)
+    {
+        BoxLayout::addWidget<Axis::X>(item);
+    }
 
-VBox::VBox() : BoxLayout() {
-	type = ItemType::VBOX;
-}
-VBox::VBox( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h) :
-	BoxLayout( parent, x, y, w, h ) {
-	type = ItemType::VBOX;
-}
+    VBox::VBox() : BoxLayout()
+    {
+        type = ItemType::VBOX;
+    }
+    VBox::VBox(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
+        : BoxLayout(parent, x, y, w, h)
+    {
+        type = ItemType::VBOX;
+    }
 
-void VBox::resizeItems() {
-    BoxLayout::resizeItems<Axis::Y>();
-}
+    void VBox::resizeItems()
+    {
+        BoxLayout::resizeItems<Axis::Y>();
+    }
 
-void VBox::addWidget(Item *item)
-{
-    BoxLayout::addWidget<Axis::Y>(item);
-}
+    void VBox::addWidget(Item *item)
+    {
+        BoxLayout::addWidget<Axis::Y>(item);
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/BoxLayout.hpp b/module-gui/gui/widgets/BoxLayout.hpp
index 1f4dc7c68..41d3ed178 100644
--- a/module-gui/gui/widgets/BoxLayout.hpp
+++ b/module-gui/gui/widgets/BoxLayout.hpp
@@ -14,7 +14,8 @@
 #include "Rect.hpp"
 #include <Alignment.hpp>
 
-namespace gui {
+namespace gui
+{
 
     class BoxLayout : public Rect
     {
@@ -33,7 +34,9 @@ namespace gui {
         template <Axis axis> uint32_t sizeUsed(Item *it, Item::Area area = Item::Area::Normal)
         {
             uint32_t sum = 0;
-            std::for_each(it->children.begin(), it->children.end(), [&](auto &el) { sum += el->visible ? el->area(area).size(axis) : 0; });
+            std::for_each(it->children.begin(), it->children.end(), [&](auto &el) {
+                sum += el->visible ? el->area(area).size(axis) : 0;
+            });
             return sum;
         };
         template <Axis axis> uint32_t sizeLeft(Item *it, Item::Area area = Item::Area::Normal)
@@ -79,23 +82,25 @@ namespace gui {
         std::function<bool(const InputEvent &inputEvent)> borderCallback = nullptr;
     };
 
-class HBox : public BoxLayout {
-public:
-  void resizeItems() override;
-  HBox();
-  HBox(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
-  virtual ~HBox() = default;
-  virtual void addWidget(Item *item) override;
-};
+    class HBox : public BoxLayout
+    {
+      public:
+        void resizeItems() override;
+        HBox();
+        HBox(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
+        virtual ~HBox() = default;
+        virtual void addWidget(Item *item) override;
+    };
 
-class VBox : public BoxLayout {
-public:
-	void resizeItems() override;
-	VBox();
-	VBox( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h);
-	virtual ~VBox() = default;
-    virtual void addWidget(Item *item) override;
-};
+    class VBox : public BoxLayout
+    {
+      public:
+        void resizeItems() override;
+        VBox();
+        VBox(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
+        virtual ~VBox() = default;
+        virtual void addWidget(Item *item) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/GridLayout.cpp b/module-gui/gui/widgets/GridLayout.cpp
index 846a33931..256625f61 100644
--- a/module-gui/gui/widgets/GridLayout.cpp
+++ b/module-gui/gui/widgets/GridLayout.cpp
@@ -4,7 +4,8 @@
 
 using namespace gui;
 
-GridLayout::GridLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid)
+GridLayout::GridLayout(
+    Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid)
     : BoxLayout(parent, x, y, w, h), grid(grid)
 {
     setPenWidth(style::window::default_border_no_focus_w);
@@ -14,19 +15,17 @@ GridLayout::GridLayout(Item *parent, const uint32_t &x, const uint32_t &y, const
 void GridLayout::resizeItems()
 {
 
-    if (grid.x == 0 || grid.y == 0)
-    {
+    if (grid.x == 0 || grid.y == 0) {
         LOG_ERROR("Grid == 0 - abort");
         return;
     }
-    uint32_t el_in_x = area().w / grid.x;
-    uint32_t el_in_y = area().h / grid.y;
-    uint32_t strech_x = 0;
-    uint32_t strech_y = 0;
+    uint32_t el_in_x      = area().w / grid.x;
+    uint32_t el_in_y      = area().h / grid.y;
+    uint32_t strech_x     = 0;
+    uint32_t strech_y     = 0;
     uint32_t max_elements = el_in_x * el_in_y;
 
-    if (children.size() > max_elements)
-    {
+    if (children.size() > max_elements) {
         LOG_ERROR("More children than possible to show");
         return;
     }
@@ -37,11 +36,9 @@ void GridLayout::resizeItems()
 
     int row = 0;
     int col = 0;
-    for (auto it : children)
-    {
+    for (auto it : children) {
         // check if element will fit in
-        if (it->area().w > grid.x || it->area().h > grid.y)
-        {
+        if (it->area().w > grid.x || it->area().h > grid.y) {
             continue;
         }
         // set position
@@ -49,8 +46,7 @@ void GridLayout::resizeItems()
         it->area().pos(Axis::Y) = row * (grid.y + strech_y) + (grid.y - it->area().h) / 2;
         // shift row/col
         ++col;
-        if (col == el_in_x)
-        {
+        if (col == el_in_x) {
             col = 0;
             ++row;
         }
@@ -60,70 +56,57 @@ void GridLayout::resizeItems()
 // TODO commomize - move loop to lambda
 void GridLayout::setNavigation()
 {
-    uint32_t el_in_x = widgetArea.w / grid.x;
-    uint32_t el_in_y = widgetArea.h / grid.y;
+    uint32_t el_in_x      = widgetArea.w / grid.x;
+    uint32_t el_in_y      = widgetArea.h / grid.y;
     uint32_t max_elements = el_in_x * el_in_y;
-    int i = 0;
-    int row = 0;
-    int col = 0;
-    if (children.size() == 0)
-    {
+    int i                 = 0;
+    int row               = 0;
+    int col               = 0;
+    if (children.size() == 0) {
         LOG_ERROR("No children to set navigation");
     }
-    for (auto it = children.begin(); it != children.end() && i < max_elements; ++it, ++i)
-    {
+    for (auto it = children.begin(); it != children.end() && i < max_elements; ++it, ++i) {
         // first column left rotation
-        if (navigationRotate && col == 0)
-        {
+        if (navigationRotate && col == 0) {
             auto val = el_in_x - 1;
-            if (val + i >= children.size())
-            {
+            if (val + i >= children.size()) {
                 val = children.size() % el_in_x - 1;
             }
             (*it)->setNavigationItem(NavigationDirection::LEFT, *std::next(it, val));
         }
-        else if (i != 0)
-        {
+        else if (i != 0) {
             (*it)->setNavigationItem(NavigationDirection::LEFT, *std::prev(it));
         }
         // last column - right rotation
-        if (navigationRotate && col + 1 == el_in_x)
-        {
+        if (navigationRotate && col + 1 == el_in_x) {
             auto val = el_in_x - 1;
             (*it)->setNavigationItem(NavigationDirection::RIGHT, *std::prev(it, val));
         }
-        else if (col + 1 % el_in_x != 0 && i + 1 < children.size())
-        {
+        else if (col + 1 % el_in_x != 0 && i + 1 < children.size()) {
             (*it)->setNavigationItem(NavigationDirection::RIGHT, *std::next(it));
         }
-        if (row != 0)
-        {
+        if (row != 0) {
             (*it)->setNavigationItem(NavigationDirection::UP, *std::prev(it, el_in_x));
         }
         // first row - rotate UP
-        else if (navigationRotate && (children.size() >= el_in_x * 2))
-        {
+        else if (navigationRotate && (children.size() >= el_in_x * 2)) {
             auto maxrow = children.size() / el_in_x + children.size();
-            auto val = maxrow * el_in_x + col;
-            if (val + el_in_x < children.size())
-            {
+            auto val    = maxrow * el_in_x + col;
+            if (val + el_in_x < children.size()) {
                 val += el_in_x;
             }
             (*it)->setNavigationItem(NavigationDirection::UP, *std::next(children.begin(), val));
         }
-        if (row + 1 % el_in_y != 0 && i + el_in_x < children.size())
-        {
+        if (row + 1 % el_in_y != 0 && i + el_in_x < children.size()) {
             (*it)->setNavigationItem(NavigationDirection::DOWN, *std::next(it, el_in_x));
         }
         // last row - rotate, DOWN assign to first col
-        else if (navigationRotate && (i + el_in_x >= children.size()))
-        {
+        else if (navigationRotate && (i + el_in_x >= children.size())) {
             (*it)->setNavigationItem(NavigationDirection::DOWN, *std::next(children.begin(), col));
         }
 
         ++col;
-        if (col == el_in_x)
-        {
+        if (col == el_in_x) {
             col = 0;
             ++row;
         }
diff --git a/module-gui/gui/widgets/GridLayout.hpp b/module-gui/gui/widgets/GridLayout.hpp
index 2e1b79679..51c8d87e7 100644
--- a/module-gui/gui/widgets/GridLayout.hpp
+++ b/module-gui/gui/widgets/GridLayout.hpp
@@ -16,13 +16,13 @@ namespace gui
         } grid;
 
       public:
-        GridLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid);
-        GridLayout(const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid) : GridLayout(nullptr, x, y, w, h, grid)
-        {
-        }
+        GridLayout(
+            Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid);
+        GridLayout(const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, GridSize grid)
+            : GridLayout(nullptr, x, y, w, h, grid)
+        {}
         GridLayout() : GridLayout(0, 0, 0, 0, {0, 0})
-        {
-        }
+        {}
         ~GridLayout() override = default;
         /// when reached top -> start from bottom. When reached left, start from right.
         bool navigationRotate = true;
diff --git a/module-gui/gui/widgets/Image.cpp b/module-gui/gui/widgets/Image.cpp
index db1b81d3c..af15ab5f9 100644
--- a/module-gui/gui/widgets/Image.cpp
+++ b/module-gui/gui/widgets/Image.cpp
@@ -12,91 +12,91 @@
 #include "../core/ImageManager.hpp"
 #include "utf8/UTF8.hpp"
 
-namespace gui {
-
-Image::Image() : Rect(), imageMap { nullptr } {
-	type = ItemType::IMAGE;
-}
-
-Image::Image( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h, const UTF8 imageName ) :
-	Rect( parent, x, y, w, h ),
-	imageMap { nullptr }{
-	type = ItemType::IMAGE;
-    set(imageName);
-    setPosition(x, y);
-	updateDrawArea();
-}
-
-
-Image::Image(const UTF8& imageName )
-	:imageMap { nullptr }
-{
-	type = ItemType::IMAGE;
-    set(imageName);
-    updateDrawArea();
-}
-
-bool Image::set(int id)
+namespace gui
 {
 
-    //get pixmap for selected ID
-	imageMap = ImageManager::getInstance().getImageMap( id );
-
-	//set height and width and max and min dimensions
-	uint16_t imageMapWidth = imageMap->getWidth();
-	uint16_t imageMapHeight = imageMap->getHeight();
-
-	drawArea.w = imageMapWidth;
-	drawArea.h = imageMapHeight;
-
-    widgetMaxArea.w = widgetArea.w = imageMapWidth;
-    widgetMaxArea.h = widgetArea.h = imageMapHeight;
-
-    return true;
-}
-
-void Image::set(const UTF8 &name)
-{
-    if (name.length())
+    Image::Image() : Rect(), imageMap{nullptr}
     {
-        int id = ImageManager::getInstance().getImageMapID(name.c_str());
-        set(id);
+        type = ItemType::IMAGE;
     }
-}
 
-std::list<DrawCommand*> Image::buildDrawList() {
+    Image::Image(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h, const UTF8 imageName)
+        : Rect(parent, x, y, w, h), imageMap{nullptr}
+    {
+        type = ItemType::IMAGE;
+        set(imageName);
+        setPosition(x, y);
+        updateDrawArea();
+    }
 
-	std::list<DrawCommand*> commands;
+    Image::Image(const UTF8 &imageName) : imageMap{nullptr}
+    {
+        type = ItemType::IMAGE;
+        set(imageName);
+        updateDrawArea();
+    }
 
-	//check if widget is visible
-	if( visible == false )
-		return commands;
+    bool Image::set(int id)
+    {
 
-	//get children draw commands
-	std::list<DrawCommand*> childrenCommands = Item::buildDrawList();
-	if( !childrenCommands.empty() )
-		commands.merge( childrenCommands );
+        // get pixmap for selected ID
+        imageMap = ImageManager::getInstance().getImageMap(id);
 
-	//set local draw commands
-	CommandImage* img = new CommandImage{};
+        // set height and width and max and min dimensions
+        uint16_t imageMapWidth  = imageMap->getWidth();
+        uint16_t imageMapHeight = imageMap->getHeight();
 
-	//image
-	img->x = drawArea.x;
-	img->y = drawArea.y;
-	img->w = drawArea.w;
-	img->h = drawArea.h;
+        drawArea.w = imageMapWidth;
+        drawArea.h = imageMapHeight;
 
-	//cmd part
-	img->areaX = img->x;
-	img->areaY = img->y;
-	img->areaW = img->w;
-	img->areaH = img->h;
+        widgetMaxArea.w = widgetArea.w = imageMapWidth;
+        widgetMaxArea.h = widgetArea.h = imageMapHeight;
 
-	img->imageID = this->imageMap->getID();
+        return true;
+    }
 
-	commands.push_back( img );
+    void Image::set(const UTF8 &name)
+    {
+        if (name.length()) {
+            int id = ImageManager::getInstance().getImageMapID(name.c_str());
+            set(id);
+        }
+    }
 
-	return commands;
-}
+    std::list<DrawCommand *> Image::buildDrawList()
+    {
+
+        std::list<DrawCommand *> commands;
+
+        // check if widget is visible
+        if (visible == false)
+            return commands;
+
+        // get children draw commands
+        std::list<DrawCommand *> childrenCommands = Item::buildDrawList();
+        if (!childrenCommands.empty())
+            commands.merge(childrenCommands);
+
+        // set local draw commands
+        CommandImage *img = new CommandImage{};
+
+        // image
+        img->x = drawArea.x;
+        img->y = drawArea.y;
+        img->w = drawArea.w;
+        img->h = drawArea.h;
+
+        // cmd part
+        img->areaX = img->x;
+        img->areaY = img->y;
+        img->areaW = img->w;
+        img->areaH = img->h;
+
+        img->imageID = this->imageMap->getID();
+
+        commands.push_back(img);
+
+        return commands;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Image.hpp b/module-gui/gui/widgets/Image.hpp
index 5277e2da9..5c591c20d 100644
--- a/module-gui/gui/widgets/Image.hpp
+++ b/module-gui/gui/widgets/Image.hpp
@@ -15,28 +15,31 @@
 #include "../core/PixMap.hpp"
 #include "utf8/UTF8.hpp"
 
-namespace gui {
+namespace gui
+{
 
-/// image element on screen, it will automatically set it's size to fit space of selected image
-class Image: public Rect {
-protected:
-	///internal representation of the image
-	ImageMap* imageMap;
-public:
-	Image();
-    /// create new Image element and resize it to size needed by selected Image
-    Image(const UTF8&);
-    /// Create new Image element on position x,y w&h will be *ignored*
-	Image( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h, const UTF8 = UTF8{""});
-    virtual ~Image() = default;
-    /// set image with id
-    bool set(int id);
-    /// set image with string name
-    void set(const UTF8 &name);
+    /// image element on screen, it will automatically set it's size to fit space of selected image
+    class Image : public Rect
+    {
+      protected:
+        /// internal representation of the image
+        ImageMap *imageMap;
 
-    //virtual methods from Item
-	std::list<DrawCommand*> buildDrawList();
-};
+      public:
+        Image();
+        /// create new Image element and resize it to size needed by selected Image
+        Image(const UTF8 &);
+        /// Create new Image element on position x,y w&h will be *ignored*
+        Image(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h, const UTF8 = UTF8{""});
+        virtual ~Image() = default;
+        /// set image with id
+        bool set(int id);
+        /// set image with string name
+        void set(const UTF8 &name);
+
+        // virtual methods from Item
+        std::list<DrawCommand *> buildDrawList();
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/InputMode.cpp b/module-gui/gui/widgets/InputMode.cpp
index 099d19266..03f812371 100644
--- a/module-gui/gui/widgets/InputMode.cpp
+++ b/module-gui/gui/widgets/InputMode.cpp
@@ -12,8 +12,7 @@ const std::map<InputMode::Mode, std::string> input_mode = {
 
 static std::string getInputName(InputMode::Mode m)
 {
-    switch (m)
-    {
+    switch (m) {
     case InputMode::digit:
         return "123";
     case InputMode::ABC:
@@ -27,13 +26,14 @@ static std::string getInputName(InputMode::Mode m)
     }
 }
 
-InputMode::InputMode(std::list<InputMode::Mode> mode_list, std::function<void(const UTF8 &text)> show_type_cb, std::function<void()> show_special_char_selector,
+InputMode::InputMode(std::list<InputMode::Mode> mode_list,
+                     std::function<void(const UTF8 &text)> show_type_cb,
+                     std::function<void()> show_special_char_selector,
                      const UTF8 &prev_text)
     : input_mode_list(mode_list), show_type_cb(show_type_cb), show_special_char_selector(show_special_char_selector)
 {
     // failsafe
-    if (input_mode_list.size() == 0)
-    {
+    if (input_mode_list.size() == 0) {
         input_mode_list.push_back(Mode::digit);
     }
 }
@@ -47,8 +47,7 @@ InputMode::Mode InputMode::modeNow()
 void InputMode::next()
 {
     ++input_mode_list_pos;
-    if (input_mode_list_pos == input_mode_list.size())
-    {
+    if (input_mode_list_pos == input_mode_list.size()) {
         input_mode_list_pos = 0;
     }
     LOG_INFO("%d", input_mode_list_pos);
@@ -63,16 +62,14 @@ const std::string &InputMode::get()
 void InputMode::show_input_type()
 {
     LOG_INFO("Mode: %d", modeNow());
-    if (show_type_cb)
-    {
+    if (show_type_cb) {
         show_type_cb(getInputName(modeNow()));
     }
 }
 
 void InputMode::show_restore()
 {
-    if (show_type_cb)
-    {
+    if (show_type_cb) {
         show_type_cb(restore_text);
     }
 }
@@ -80,8 +77,7 @@ void InputMode::show_restore()
 void InputMode::select_special_char()
 {
     LOG_INFO("Special character selector");
-    if (show_special_char_selector)
-    {
+    if (show_special_char_selector) {
         show_special_char_selector();
     }
 }
diff --git a/module-gui/gui/widgets/InputMode.hpp b/module-gui/gui/widgets/InputMode.hpp
index 4915c4cd0..354e4b646 100644
--- a/module-gui/gui/widgets/InputMode.hpp
+++ b/module-gui/gui/widgets/InputMode.hpp
@@ -26,10 +26,10 @@ class InputMode
   private:
     InputMode() = delete;
     // list of enabled input modes
-    std::list<Mode> input_mode_list = {};
-    uint32_t input_mode_list_pos = 0;
+    std::list<Mode> input_mode_list                    = {};
+    uint32_t input_mode_list_pos                       = 0;
     std::function<void(const UTF8 &text)> show_type_cb = nullptr;
-    std::function<void()> show_special_char_selector = nullptr;
+    std::function<void()> show_special_char_selector   = nullptr;
     Mode modeNow();
     // text to restore when show_input_type was called (and overwritten some other text)
     UTF8 restore_text = "";
@@ -38,8 +38,10 @@ class InputMode
     void show_restore();
 
   public:
-    InputMode(std::list<InputMode::Mode> mode_list, std::function<void(const UTF8 &text)> show_type_cb = nullptr,
-              std::function<void()> show_special_char_selector = nullptr, const UTF8 &prev_text = "");
+    InputMode(std::list<InputMode::Mode> mode_list,
+              std::function<void(const UTF8 &text)> show_type_cb = nullptr,
+              std::function<void()> show_special_char_selector   = nullptr,
+              const UTF8 &prev_text                              = "");
     void on_focus(bool focus)
     {
         if (focus)
diff --git a/module-gui/gui/widgets/Item.cpp b/module-gui/gui/widgets/Item.cpp
index d4ed88c7c..d7de80400 100644
--- a/module-gui/gui/widgets/Item.cpp
+++ b/module-gui/gui/widgets/Item.cpp
@@ -12,264 +12,267 @@
 #include "Item.hpp"
 #include "BoundingBox.hpp"
 
-namespace gui {
-
-Item::Item() :
-	focus {false},
-	type {ItemType::ITEM},
-	parent{nullptr},
-	radius{0},
-	visible{true},
-	verticalPolicy{ LayoutVerticalPolicy::LAYOUT_POLICY_VERTICAL_EXPAND },
-	horizontalPolicy { LayoutHorizontalPolicy::LAYOUT_POLICY_HORIZONTAL_EXPAND },
-	navigationDirections{ nullptr } {
-
-	focusChangedCallback = [](Item&){ return false;};
-	activatedCallback = [](Item&){ return false;};
-	inputCallback = [](Item&, const InputEvent& inputEvent){ return false;};
-	dimensionChangedCallback = [](Item&,  void* data){ return false;};
-	contentCallback = [=](Item&){ if( parent != nullptr ) return parent->onContent(); return false;};
-}
-
-Item::~Item() {
-	for( auto& widget : children )
-		delete widget;
-
-	if( navigationDirections )
-		delete navigationDirections;
-}
-
-void Item::addWidget(Item *item)
+namespace gui
 {
-    if (item == nullptr)
-        return;
-    if (item->parent)
-    {
-        item->parent->removeWidget(item);
-    }
-    item->parent = this;
-	children.push_back(item);
 
-	item->updateDrawArea();
-}
-
-bool Item::removeWidget( Item* item ) {
-	if(item == nullptr) return false;
-    if (item == focusItem)
+    Item::Item()
+        : focus{false}, type{ItemType::ITEM}, parent{nullptr}, radius{0}, visible{true},
+          verticalPolicy{LayoutVerticalPolicy::LAYOUT_POLICY_VERTICAL_EXPAND},
+          horizontalPolicy{LayoutHorizontalPolicy::LAYOUT_POLICY_HORIZONTAL_EXPAND}, navigationDirections{nullptr}
     {
-        focusItem = nullptr;
+
+        focusChangedCallback     = [](Item &) { return false; };
+        activatedCallback        = [](Item &) { return false; };
+        inputCallback            = [](Item &, const InputEvent &inputEvent) { return false; };
+        dimensionChangedCallback = [](Item &, void *data) { return false; };
+        contentCallback          = [=](Item &) {
+            if (parent != nullptr)
+                return parent->onContent();
+            return false;
+        };
     }
 
-    auto fi = std::find( children.begin(), children.end(), item );
-	if( fi != children.end() ) {
-		children.erase(fi);
-		return true;
-	}
-	return false;
-}
-
-void Item::setVisible( bool value ) {
-	visible = value;
-}
-
-std::list<DrawCommand*> Item::buildDrawList() {
-
-	std::list<DrawCommand*> commands;
-
-	for( auto& widget : children ) {
-		std::list<DrawCommand*> widgetCommands = widget->buildDrawList();
-		if( !widgetCommands.empty() )
-			commands.insert( commands.end(), widgetCommands.begin(), widgetCommands.end() );
-	}
-
-	return commands;
-}
-
-void Item::setPosition( const short& x, const short& y ) {
-
-	BoundingBox oldArea = widgetArea;
-	widgetArea.x = x;
-	widgetArea.y = y;
-	updateDrawArea();
-
-	onDimensionChanged(oldArea, widgetArea);
-}
-
-void Item::setX(const uint32_t x)
-{
-	BoundingBox oldArea = widgetArea;
-	widgetArea.x = x;
-	updateDrawArea();
-
-	onDimensionChanged(oldArea, widgetArea);
-}
-
-void Item::setY(const uint32_t y)
-{
-	BoundingBox oldArea = widgetArea;
-	widgetArea.y = y;
-	updateDrawArea();
-
-	onDimensionChanged(oldArea, widgetArea);
-}
-
-void Item::setSize(const unsigned short w, const unsigned short h)
-{
-    BoundingBox oldArea = widgetArea;
-    widgetArea.w = w;
-	widgetArea.h = h;
-    widgetMaxArea.sum(widgetArea);
-    updateDrawArea();
-
-    onDimensionChanged(oldArea, widgetArea);
-}
-
-void Item::setBoundingBox(const BoundingBox &new_box)
-{
-    BoundingBox oldArea = widgetArea;
-    widgetArea = new_box;
-    updateDrawArea();
-    onDimensionChanged(oldArea, widgetArea);
-}
-
-void Item::setRadius( int value ) {
-	if( value < 0 )
-		value = 0;
-	radius = value;
-}
-
-void Item::updateDrawArea() {
-	Item* parentItem = parent;
-
-	BoundingBox result = widgetArea;
-
-	//iterate up to top widget in hierarchy
-	while( parentItem != nullptr ) {
-
-		result.x += parentItem->widgetArea.x;
-		result.y += parentItem->widgetArea.y;
-		BoundingBox newResult;
-		if( BoundingBox::intersect(parentItem->widgetArea, result, newResult) == false ) {
-			result.clear();
-			break;
-		}
-		result = newResult;
-
-		parentItem = parentItem->parent;
-	}
-
-	drawArea = result;
-
-	for( gui::Item* it : children )
-		it->updateDrawArea();
-}
-
-Item* Item::getNavigationItem( NavigationDirection direction ) {
-	if( navigationDirections != nullptr ) {
-		return navigationDirections->getDirectionItem(direction);
-	}
-	return nullptr;
-}
-
-void Item::setNavigationItem( gui::NavigationDirection direction, Item* item ) {
-	if( navigationDirections == nullptr )
-		navigationDirections = new Navigation();
-	navigationDirections->setDirectionItem(direction, item);
-}
-
-bool Item::handleNavigation(const InputEvent inputEvent)
-{
-    gui::Item *newFocusItem = nullptr;
-    if ((focusItem != nullptr) && (inputEvent.state == InputEvent::State::keyReleasedShort))
+    Item::~Item()
     {
-        if (itemNavigation && itemNavigation(inputEvent))
-        {
+        for (auto &widget : children)
+            delete widget;
+
+        if (navigationDirections)
+            delete navigationDirections;
+    }
+
+    void Item::addWidget(Item *item)
+    {
+        if (item == nullptr)
+            return;
+        if (item->parent) {
+            item->parent->removeWidget(item);
+        }
+        item->parent = this;
+        children.push_back(item);
+
+        item->updateDrawArea();
+    }
+
+    bool Item::removeWidget(Item *item)
+    {
+        if (item == nullptr)
+            return false;
+        if (item == focusItem) {
+            focusItem = nullptr;
+        }
+
+        auto fi = std::find(children.begin(), children.end(), item);
+        if (fi != children.end()) {
+            children.erase(fi);
             return true;
         }
-        switch (inputEvent.keyCode)
-        {
-        case gui::KeyCode::KEY_LEFT:
-            newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::LEFT);
-            break;
-        case gui::KeyCode::KEY_RIGHT:
-            newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::RIGHT);
-            break;
-        case gui::KeyCode::KEY_UP:
-            newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::UP);
-            break;
-        case gui::KeyCode::KEY_DOWN:
-            newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::DOWN);
-            break;
-        case gui::KeyCode::KEY_ENTER:
-            if (focusItem != nullptr)
-                return focusItem->onActivated(nullptr);
-            break;
-        default:
-            break;
-        }
+        return false;
     }
-    if (newFocusItem != nullptr)
-    {
-        setFocusItem(newFocusItem);
-        return true;
-    }
-    return false;
-}
 
-bool Item::setFocus(bool state)
-{
-    if (state != focus)
+    void Item::setVisible(bool value)
+    {
+        visible = value;
+    }
+
+    std::list<DrawCommand *> Item::buildDrawList()
+    {
+
+        std::list<DrawCommand *> commands;
+
+        for (auto &widget : children) {
+            std::list<DrawCommand *> widgetCommands = widget->buildDrawList();
+            if (!widgetCommands.empty())
+                commands.insert(commands.end(), widgetCommands.begin(), widgetCommands.end());
+        }
+
+        return commands;
+    }
+
+    void Item::setPosition(const short &x, const short &y)
+    {
+
+        BoundingBox oldArea = widgetArea;
+        widgetArea.x        = x;
+        widgetArea.y        = y;
+        updateDrawArea();
+
+        onDimensionChanged(oldArea, widgetArea);
+    }
+
+    void Item::setX(const uint32_t x)
+    {
+        BoundingBox oldArea = widgetArea;
+        widgetArea.x        = x;
+        updateDrawArea();
+
+        onDimensionChanged(oldArea, widgetArea);
+    }
+
+    void Item::setY(const uint32_t y)
+    {
+        BoundingBox oldArea = widgetArea;
+        widgetArea.y        = y;
+        updateDrawArea();
+
+        onDimensionChanged(oldArea, widgetArea);
+    }
+
+    void Item::setSize(const unsigned short w, const unsigned short h)
+    {
+        BoundingBox oldArea = widgetArea;
+        widgetArea.w        = w;
+        widgetArea.h        = h;
+        widgetMaxArea.sum(widgetArea);
+        updateDrawArea();
+
+        onDimensionChanged(oldArea, widgetArea);
+    }
+
+    void Item::setBoundingBox(const BoundingBox &new_box)
+    {
+        BoundingBox oldArea = widgetArea;
+        widgetArea          = new_box;
+        updateDrawArea();
+        onDimensionChanged(oldArea, widgetArea);
+    }
+
+    void Item::setRadius(int value)
+    {
+        if (value < 0)
+            value = 0;
+        radius = value;
+    }
+
+    void Item::updateDrawArea()
+    {
+        Item *parentItem = parent;
+
+        BoundingBox result = widgetArea;
+
+        // iterate up to top widget in hierarchy
+        while (parentItem != nullptr) {
+
+            result.x += parentItem->widgetArea.x;
+            result.y += parentItem->widgetArea.y;
+            BoundingBox newResult;
+            if (BoundingBox::intersect(parentItem->widgetArea, result, newResult) == false) {
+                result.clear();
+                break;
+            }
+            result = newResult;
+
+            parentItem = parentItem->parent;
+        }
+
+        drawArea = result;
+
+        for (gui::Item *it : children)
+            it->updateDrawArea();
+    }
+
+    Item *Item::getNavigationItem(NavigationDirection direction)
+    {
+        if (navigationDirections != nullptr) {
+            return navigationDirections->getDirectionItem(direction);
+        }
+        return nullptr;
+    }
+
+    void Item::setNavigationItem(gui::NavigationDirection direction, Item *item)
+    {
+        if (navigationDirections == nullptr)
+            navigationDirections = new Navigation();
+        navigationDirections->setDirectionItem(direction, item);
+    }
+
+    bool Item::handleNavigation(const InputEvent inputEvent)
+    {
+        gui::Item *newFocusItem = nullptr;
+        if ((focusItem != nullptr) && (inputEvent.state == InputEvent::State::keyReleasedShort)) {
+            if (itemNavigation && itemNavigation(inputEvent)) {
+                return true;
+            }
+            switch (inputEvent.keyCode) {
+            case gui::KeyCode::KEY_LEFT:
+                newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::LEFT);
+                break;
+            case gui::KeyCode::KEY_RIGHT:
+                newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::RIGHT);
+                break;
+            case gui::KeyCode::KEY_UP:
+                newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::UP);
+                break;
+            case gui::KeyCode::KEY_DOWN:
+                newFocusItem = focusItem->getNavigationItem(gui::NavigationDirection::DOWN);
+                break;
+            case gui::KeyCode::KEY_ENTER:
+                if (focusItem != nullptr)
+                    return focusItem->onActivated(nullptr);
+                break;
+            default:
+                break;
+            }
+        }
+        if (newFocusItem != nullptr) {
+            setFocusItem(newFocusItem);
+            return true;
+        }
+        return false;
+    }
+
+    bool Item::setFocus(bool state)
+    {
+        if (state != focus) {
+            focus = state;
+            onFocus(state);
+            focusChangedCallback(*this);
+        };
+        return state;
+    }
+
+    void Item::setFocusItem(Item *item)
+    {
+        auto checknrun = [=](bool on) {
+            if (focusItem != nullptr) {
+                focusItem->setFocus(on);
+            }
+        };
+        checknrun(false);
+        focusItem = item;
+        checknrun(true);
+    }
+
+    Item *Item::getFocusItem()
+    {
+        return focusItem;
+    }
+
+    bool Item::onFocus(bool state)
     {
         focus = state;
-        onFocus(state);
-        focusChangedCallback(*this);
+        return true;
+    }
+
+    bool Item::onActivated(void *data)
+    {
+        if (activatedCallback)
+            return activatedCallback(*this);
+        return false;
+    }
+
+    bool Item::onInput(const InputEvent &inputEvent)
+    {
+        return inputCallback(*this, inputEvent);
+    }
+
+    bool Item::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        return true;
+    }
+
+    bool Item::onContent()
+    {
+        return false;
     };
-    return state;
-}
-
-void Item::setFocusItem(Item *item)
-{
-    auto checknrun = [=](bool on) {
-        if (focusItem != nullptr)
-        {
-            focusItem->setFocus(on);
-        }
-    };
-    checknrun(false);
-    focusItem = item;
-    checknrun(true);
-}
-
-Item *Item::getFocusItem()
-{
-    return focusItem;
-}
-
-bool Item::onFocus(bool state)
-{
-    focus = state;
-    return true;
-}
-
-bool Item::onActivated(void *data)
-{
-    if (activatedCallback)
-        return activatedCallback(*this);
-    return false;
-}
-
-bool Item::onInput(const InputEvent &inputEvent)
-{
-    return inputCallback(*this, inputEvent);
-}
-
-bool Item::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
-{
-    return true;
-}
-
-bool Item::onContent()
-{
-    return false;
-};
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Item.hpp b/module-gui/gui/widgets/Item.hpp
index fc5120e85..338884083 100644
--- a/module-gui/gui/widgets/Item.hpp
+++ b/module-gui/gui/widgets/Item.hpp
@@ -13,241 +13,243 @@
 #include "Navigation.hpp"
 #include "Margins.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class Navigation;
+    class Navigation;
 
-enum class ItemType {
-	ITEM = 0,
-	RECT = 1,
-	LABEL,
-	LIST,
-	LIST_ITEM,
-	TEXT,
-	IMAGE,
-	LAYOUT,
-	VBOX,
-	HBOX
-};
-
-class Item {
-public:
-  // flag that informs whether item has a focus
-  bool focus;
-  /// pointer to the child item that has focus
-  Item *focusItem = nullptr;
-  /// item type of the widget - could be used to check what type item we are working on
-  /// right now unused except Text, where it calles callback for gui::BoxLayout which does nothing
-  ItemType type = ItemType::ITEM;
-  // pointer to the parent Item
-  Item *parent = nullptr;
-  // list of items that have the same parent.
-  std::list<Item *> children;
-  enum class Area
-  {
-      Normal,
-      Draw,
-      Actual, // actual area in use between: Normal <-> Max
-      Max,
-  };
-  /// bounding box of the item. This is in coordinates of the parent widget.
-  BoundingBox widgetArea;
-  /// bounding box of the item maximal size, if not specified other - the same as widget Area
-  BoundingBox widgetMaxArea;
-  /// bounding box of the item maximal size, if not specified other - the same as widget Area
-  BoundingBox widgetActualArea;
-  // bounding box used for drawing. This is in coordinates of window
-  BoundingBox drawArea; // drawableArea would be more accurate
-                        // maximal bounding box size
-  auto area(Area which = Area::Normal) -> BoundingBox &
-  {
-      switch (which)
-      {
-      case Area::Normal:
-          return widgetArea;
-      case Area::Draw:
-          return drawArea;
-      case Area::Max:
-          return widgetMaxArea;
-      case Area::Actual:
-          return widgetActualArea;
-      }
-      return widgetArea;
-    }
-    Margins innerMargins;
-    /// radius of corner, default 0
-    short radius = 0;
-    /// flag that defines if item is active
-    /// if false -> than it shouldn't be used witn onInput, navitagion etc.
-    bool activeItem = true;
-    /// flag that defines whether widget is visible (this is - should be rendered)
-    bool visible;
-    //policy for changing vertical size if Item is placed inside layout
-	LayoutVerticalPolicy verticalPolicy;
-	//policy for changing horizontal size if Item is placed inside layout
-	LayoutHorizontalPolicy horizontalPolicy;
-	//Maximum height to which Layout base widget can scale current widget
-	uint16_t maxHeight;
-	//Maximum width to which Layout base widget can scale current widget
-	uint16_t maxWidth;
-
-    /// @defgroup callbacks     Item callback functions
-    /// callback functors are meant to emulate signal <-> slot actions where you bind element instance to in code defined lambda function
-    /// all Items have functions coresponding to callback
-    /// 1. if you wish to create new item which does something new in action function - override it
-    /// 2. if you wish to call function on item - set callback for it
-    /// @attention all callbacks return true if handled, return true means end of event processing, i.e. if you handle enter in inputCallback, then
-    /// activatedCallback shouldn't be called.
-    /// @{
-
-    /// called when item looses/gains focus
-    std::function<bool(Item &)> focusChangedCallback;
-    /// called when item has dimensions changed
-    /// @note should be part of widgetArea
-    std::function<void(Item &, void *data)> dimensionChangedCallback;
-    /// called when item is activated, this is enter is pressed
-    /// @param `this` item
-    std::function<bool(Item &)> activatedCallback;
-    /// callback when any key is pressed
-    /// @param `this` item
-    /// @param `InputEvent`
-    std::function<bool(Item &, const InputEvent &inputEvent)> inputCallback;
-    /// callback when element insides are changed
-    /// @param `this` item
-    std::function<bool(Item &)> contentCallback;
-    /// callback on navigation, called when item passes navigation to handle by it's children
-    /// @attention when child handles navigation it should return true, so that parent won't perform action for that
-    std::function<bool(const InputEvent &)> itemNavigation = nullptr;
-
-    /// @}
-
-    ///  @defgroup focus    functions handling focus
-    /// @{
-    bool handleNavigation(const InputEvent inputEvent);
-    /// sets/resets focus on `this` Item and runs focusChangedCallback for it
-    bool setFocus(bool state);
-    /// sets/resets child with focus in `this` Item
-    /// runs focusChangledCallback on item which changes
-    /// @attention focusItem is just a pointer, might crash if item with focus was removed
-    void setFocusItem(Item *item);
-    /// gettter for focus item
-    /// @attention focusItem is just a pointer, might crash if item with focus was removed
-    Item *getFocusItem();
-    /// @}
-
-    /// @defgroup callbackCallers   functions which should call functors from callbacks group
-    /// @{
-
-    /// called from setFocus, does nothing (which means it doesn't call focusChagedCallback
-    virtual bool onFocus(bool state);
-    /// called when `this` Item was pressed with enter (middle key on phone action keys), used for callback input handling
-    /// calls activatedCallback
-    /// @param[in]: data unused
-    virtual bool onActivated(void *data);
-    /// called when any key is pressed, before onActivated , after focus
-    /// calls: inputCallback
-    virtual bool onInput(const InputEvent &inputEvent);
-    /// (should be) called each time when dimension of element was changed, added and used only with ListView
-    /// calls: none, inconsistent api
-    /// @note TODO should be fixed so that api would be consistent
-    virtual bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim);
-    /// (should be) called each time content in item was changed, added for gui::Text widget
-    /// calls: none, inconsistent behaviour
-    /// @note TODO should be fixed so that api would be consistent
-    virtual bool onContent();
-
-    /// @}
-
-    /// function called to add child to item
-    /// similar approach to QT, adding widget will always succeed.
-    virtual void addWidget(Item *item);
-    /// function to remove child item from element
-    /// it's recursive for all elements underneath
-    /// @attention It doe not call `delete` please remove item after calling this function
-    virtual bool removeWidget(Item *item);
-    /// sets `visible` flag
-    virtual void setVisible(bool value);
-    /// sets position of element - this is sets area().x and area().y of item
-    /// calls onDimensionChanged callback & updateDrawArea for item
-    /// @attention should be bind to area
-    virtual void setPosition(const short &x, const short &y);
-    /// sets size of element - this is sets area().w and area().h of item
-    /// calls onDimensionChanged & updateDrawArea for item
-    /// @attention should be bind to area
-    virtual void setSize(const unsigned short w, const unsigned short h);
-    /// used in ListView to position element sets area() = WidgetArea(params)
-    /// calls onDimensionChanged & updateDrwArea
-    /// @attention should be bind to area
-    virtual void setBoundingBox(const BoundingBox &new_box);
-    /// list of commands for renderer to draw elements on screen
-    /// all elements consist od lines, arcs, rectangles, text and images
-    /// for full list of elements please see renderer code
-    /// @note we should consider lazy evaluation prior to drawing on screen, rather than on each resize of elements
-    virtual std::list<DrawCommand *> buildDrawList();
-    /// sets radius of Item box
-    /// @note this should be moved to Rect
-    virtual void setRadius(int value);
-
-    /// get next navigation item in NavigationDirection
-    virtual Item *getNavigationItem(NavigationDirection direction);
-    /// set next navigation item in NavigationDirection
-    virtual void setNavigationItem(NavigationDirection direction, Item *item);
-
-    Item();
-	virtual ~Item();
-
-    /// @defgroup inconsistent  inconsistent size/offset accessors and setters
-    /// all this elements should be checked for naming/use consistency
-    /// possibly all of that should be handled via area() (and area should have callback pinned from Item on resize
-    /// @{
-
-    void setX(const uint32_t x);
-    void setY(const uint32_t y);
-    [[nodiscard]] const uint32_t getX() const
+    enum class ItemType
     {
-        return (widgetArea.x);
-    }
-    [[nodiscard]] const uint32_t getY() const
-    {
-        return (widgetArea.y);
-    }
-    [[nodiscard]] const uint32_t getWidth() const
-    {
-        return (widgetArea.w);
-    }
-    [[nodiscard]] const uint32_t getHeight() const
-    {
-        return (widgetArea.h);
-    }
-    int16_t w()
-    {
-        return widgetArea.w;
-    }
-    int16_t h()
-    {
-        return widgetArea.h;
-    }
-    /// helper function to show where widget ends in x axis
-    int32_t offset_w()
-    {
-        return w() + widgetArea.x;
-    }
-    /// helper function to show where widget ends in y axis
-    int32_t offset_h()
-    {
-        return h() + widgetArea.y;
-    }
-    int32_t offset(Axis axis)
-    {
-        return this->widgetArea.size(axis) + this->widgetArea.pos(axis);
+        ITEM = 0,
+        RECT = 1,
+        LABEL,
+        LIST,
+        LIST_ITEM,
+        TEXT,
+        IMAGE,
+        LAYOUT,
+        VBOX,
+        HBOX
+    };
+
+    class Item
+    {
+      public:
+        // flag that informs whether item has a focus
+        bool focus;
+        /// pointer to the child item that has focus
+        Item *focusItem = nullptr;
+        /// item type of the widget - could be used to check what type item we are working on
+        /// right now unused except Text, where it calles callback for gui::BoxLayout which does nothing
+        ItemType type = ItemType::ITEM;
+        // pointer to the parent Item
+        Item *parent = nullptr;
+        // list of items that have the same parent.
+        std::list<Item *> children;
+        enum class Area
+        {
+            Normal,
+            Draw,
+            Actual, // actual area in use between: Normal <-> Max
+            Max,
+        };
+        /// bounding box of the item. This is in coordinates of the parent widget.
+        BoundingBox widgetArea;
+        /// bounding box of the item maximal size, if not specified other - the same as widget Area
+        BoundingBox widgetMaxArea;
+        /// bounding box of the item maximal size, if not specified other - the same as widget Area
+        BoundingBox widgetActualArea;
+        // bounding box used for drawing. This is in coordinates of window
+        BoundingBox drawArea; // drawableArea would be more accurate
+                              // maximal bounding box size
+        auto area(Area which = Area::Normal) -> BoundingBox &
+        {
+            switch (which) {
+            case Area::Normal:
+                return widgetArea;
+            case Area::Draw:
+                return drawArea;
+            case Area::Max:
+                return widgetMaxArea;
+            case Area::Actual:
+                return widgetActualArea;
+            }
+            return widgetArea;
+        }
+        Margins innerMargins;
+        /// radius of corner, default 0
+        short radius = 0;
+        /// flag that defines if item is active
+        /// if false -> than it shouldn't be used witn onInput, navitagion etc.
+        bool activeItem = true;
+        /// flag that defines whether widget is visible (this is - should be rendered)
+        bool visible;
+        // policy for changing vertical size if Item is placed inside layout
+        LayoutVerticalPolicy verticalPolicy;
+        // policy for changing horizontal size if Item is placed inside layout
+        LayoutHorizontalPolicy horizontalPolicy;
+        // Maximum height to which Layout base widget can scale current widget
+        uint16_t maxHeight;
+        // Maximum width to which Layout base widget can scale current widget
+        uint16_t maxWidth;
+
+        /// @defgroup callbacks     Item callback functions
+        /// callback functors are meant to emulate signal <-> slot actions where you bind element instance to in code
+        /// defined lambda function all Items have functions coresponding to callback
+        /// 1. if you wish to create new item which does something new in action function - override it
+        /// 2. if you wish to call function on item - set callback for it
+        /// @attention all callbacks return true if handled, return true means end of event processing, i.e. if you
+        /// handle enter in inputCallback, then activatedCallback shouldn't be called.
+        /// @{
+
+        /// called when item looses/gains focus
+        std::function<bool(Item &)> focusChangedCallback;
+        /// called when item has dimensions changed
+        /// @note should be part of widgetArea
+        std::function<void(Item &, void *data)> dimensionChangedCallback;
+        /// called when item is activated, this is enter is pressed
+        /// @param `this` item
+        std::function<bool(Item &)> activatedCallback;
+        /// callback when any key is pressed
+        /// @param `this` item
+        /// @param `InputEvent`
+        std::function<bool(Item &, const InputEvent &inputEvent)> inputCallback;
+        /// callback when element insides are changed
+        /// @param `this` item
+        std::function<bool(Item &)> contentCallback;
+        /// callback on navigation, called when item passes navigation to handle by it's children
+        /// @attention when child handles navigation it should return true, so that parent won't perform action for that
+        std::function<bool(const InputEvent &)> itemNavigation = nullptr;
+
+        /// @}
+
+        ///  @defgroup focus    functions handling focus
+        /// @{
+        bool handleNavigation(const InputEvent inputEvent);
+        /// sets/resets focus on `this` Item and runs focusChangedCallback for it
+        bool setFocus(bool state);
+        /// sets/resets child with focus in `this` Item
+        /// runs focusChangledCallback on item which changes
+        /// @attention focusItem is just a pointer, might crash if item with focus was removed
+        void setFocusItem(Item *item);
+        /// gettter for focus item
+        /// @attention focusItem is just a pointer, might crash if item with focus was removed
+        Item *getFocusItem();
+        /// @}
+
+        /// @defgroup callbackCallers   functions which should call functors from callbacks group
+        /// @{
+
+        /// called from setFocus, does nothing (which means it doesn't call focusChagedCallback
+        virtual bool onFocus(bool state);
+        /// called when `this` Item was pressed with enter (middle key on phone action keys), used for callback input
+        /// handling calls activatedCallback
+        /// @param[in]: data unused
+        virtual bool onActivated(void *data);
+        /// called when any key is pressed, before onActivated , after focus
+        /// calls: inputCallback
+        virtual bool onInput(const InputEvent &inputEvent);
+        /// (should be) called each time when dimension of element was changed, added and used only with ListView
+        /// calls: none, inconsistent api
+        /// @note TODO should be fixed so that api would be consistent
+        virtual bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim);
+        /// (should be) called each time content in item was changed, added for gui::Text widget
+        /// calls: none, inconsistent behaviour
+        /// @note TODO should be fixed so that api would be consistent
+        virtual bool onContent();
+
+        /// @}
+
+        /// function called to add child to item
+        /// similar approach to QT, adding widget will always succeed.
+        virtual void addWidget(Item *item);
+        /// function to remove child item from element
+        /// it's recursive for all elements underneath
+        /// @attention It doe not call `delete` please remove item after calling this function
+        virtual bool removeWidget(Item *item);
+        /// sets `visible` flag
+        virtual void setVisible(bool value);
+        /// sets position of element - this is sets area().x and area().y of item
+        /// calls onDimensionChanged callback & updateDrawArea for item
+        /// @attention should be bind to area
+        virtual void setPosition(const short &x, const short &y);
+        /// sets size of element - this is sets area().w and area().h of item
+        /// calls onDimensionChanged & updateDrawArea for item
+        /// @attention should be bind to area
+        virtual void setSize(const unsigned short w, const unsigned short h);
+        /// used in ListView to position element sets area() = WidgetArea(params)
+        /// calls onDimensionChanged & updateDrwArea
+        /// @attention should be bind to area
+        virtual void setBoundingBox(const BoundingBox &new_box);
+        /// list of commands for renderer to draw elements on screen
+        /// all elements consist od lines, arcs, rectangles, text and images
+        /// for full list of elements please see renderer code
+        /// @note we should consider lazy evaluation prior to drawing on screen, rather than on each resize of elements
+        virtual std::list<DrawCommand *> buildDrawList();
+        /// sets radius of Item box
+        /// @note this should be moved to Rect
+        virtual void setRadius(int value);
+
+        /// get next navigation item in NavigationDirection
+        virtual Item *getNavigationItem(NavigationDirection direction);
+        /// set next navigation item in NavigationDirection
+        virtual void setNavigationItem(NavigationDirection direction, Item *item);
+
+        Item();
+        virtual ~Item();
+
+        /// @defgroup inconsistent  inconsistent size/offset accessors and setters
+        /// all this elements should be checked for naming/use consistency
+        /// possibly all of that should be handled via area() (and area should have callback pinned from Item on resize
+        /// @{
+
+        void setX(const uint32_t x);
+        void setY(const uint32_t y);
+        [[nodiscard]] const uint32_t getX() const
+        {
+            return (widgetArea.x);
+        }
+        [[nodiscard]] const uint32_t getY() const
+        {
+            return (widgetArea.y);
+        }
+        [[nodiscard]] const uint32_t getWidth() const
+        {
+            return (widgetArea.w);
+        }
+        [[nodiscard]] const uint32_t getHeight() const
+        {
+            return (widgetArea.h);
+        }
+        int16_t w()
+        {
+            return widgetArea.w;
+        }
+        int16_t h()
+        {
+            return widgetArea.h;
+        }
+        /// helper function to show where widget ends in x axis
+        int32_t offset_w()
+        {
+            return w() + widgetArea.x;
+        }
+        /// helper function to show where widget ends in y axis
+        int32_t offset_h()
+        {
+            return h() + widgetArea.y;
+        }
+        int32_t offset(Axis axis)
+        {
+            return this->widgetArea.size(axis) + this->widgetArea.pos(axis);
+        };
+        /// @}
+      protected:
+        /// On change of position or size this method will recalculate visible part of the widget
+        /// considering widgets hierarchy and calculate absolute position of drawing primitives.
+        virtual void updateDrawArea();
+        /// Pointer to navigation object. It is added when object is set for one of the directions
+        gui::Navigation *navigationDirections = nullptr;
     };
-    /// @}
-  protected:
-    /// On change of position or size this method will recalculate visible part of the widget
-    /// considering widgets hierarchy and calculate absolute position of drawing primitives.
-    virtual void updateDrawArea();
-    /// Pointer to navigation object. It is added when object is set for one of the directions
-    gui::Navigation *navigationDirections = nullptr;
-};
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/KeyEvent.hpp b/module-gui/gui/widgets/KeyEvent.hpp
index f504912fc..b4a74bcef 100644
--- a/module-gui/gui/widgets/KeyEvent.hpp
+++ b/module-gui/gui/widgets/KeyEvent.hpp
@@ -10,9 +10,9 @@
 //
 //#include <cstdint>
 //
-//namespace gui {
+// namespace gui {
 //
-//enum class KeyCode {
+// enum class KeyCode {
 //	KEY_LEFT,
 //	KEY_UP,
 //	KEY_RIGHT,
@@ -42,7 +42,7 @@
 //	SWITCH_DN
 //};
 //
-//enum class KeyState {
+// enum class KeyState {
 //	KEY_UNKNOWN         = 0x00,
 //	KEY_PRESSED         = 0x01,
 //    KEY_RELEASED_SHORT  = 0x02,
@@ -50,8 +50,8 @@
 //	KEY_CYCLE           = 0x08
 //};
 //
-//class KeyEvent {
-//public:
+// class KeyEvent {
+// public:
 //	//defines mapped code of the pressed button
 //	KeyCode keyCode;
 //	//defines state of the button
diff --git a/module-gui/gui/widgets/Label.cpp b/module-gui/gui/widgets/Label.cpp
index f4895eb84..05a427a6e 100644
--- a/module-gui/gui/widgets/Label.cpp
+++ b/module-gui/gui/widgets/Label.cpp
@@ -13,313 +13,299 @@
 #include "Label.hpp"
 #include <Style.hpp>
 
-namespace gui {
-
-Label::Label() :
-	Rect(),
-	text{ "" },
-	textDisplayed{ "" },
-	charDrawableCount{0},
-	stringPixelWidth{ 0 },
-	textColor{ 0,0 },
-	font{ nullptr },
-	dotsMode{false}
+namespace gui
 {
-    setFont(style::window::font::medium);
-}
 
-Label::Label( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h, const UTF8& newText ) :
-	Rect{ parent, x, y, w, h },
-	text( newText ),
-	textDisplayed{ "" },
-	charDrawableCount{0},
-	stringPixelWidth{ 0 },
-	textColor{ 0,0 },
-	dotsMode{false}, dotsTruncateEnd{true}
-{
-    setFont(style::window::font::medium);
-}
+    Label::Label()
+        : Rect(), text{""}, textDisplayed{""}, charDrawableCount{0},
+          stringPixelWidth{0}, textColor{0, 0}, font{nullptr}, dotsMode{false}
+    {
+        setFont(style::window::font::medium);
+    }
 
-Label::Label(Item *parent, meta::Label label) : Label(parent, label.x, label.y, label.w, label.h, label.text)
-{
-    setPenFocusWidth(label.focus);
-    setPenWidth(label.no_focus);
-    setFont(label.font);
-    setDotsMode(label.dots);
-    setAlignement(label.align);
-    setRadius(label.radius);
-    setEdges(label.edges);
-    setMargins(label.margins);
-}
+    Label::Label(
+        Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, const UTF8 &newText)
+        : Rect{parent, x, y, w, h}, text(newText), textDisplayed{""}, charDrawableCount{0},
+          stringPixelWidth{0}, textColor{0, 0}, dotsMode{false}, dotsTruncateEnd{true}
+    {
+        setFont(style::window::font::medium);
+    }
 
-Label::~Label() {
-}
+    Label::Label(Item *parent, meta::Label label) : Label(parent, label.x, label.y, label.w, label.h, label.text)
+    {
+        setPenFocusWidth(label.focus);
+        setPenWidth(label.no_focus);
+        setFont(label.font);
+        setDotsMode(label.dots);
+        setAlignement(label.align);
+        setRadius(label.radius);
+        setEdges(label.edges);
+        setMargins(label.margins);
+    }
 
-void Label::calculateDisplayText() {
+    Label::~Label()
+    {}
 
-	//calculate area needed to display text
-    uint32_t availableSpace = drawArea.w;
-    if( availableSpace < 0 )
-		availableSpace = 0;
+    void Label::calculateDisplayText()
+    {
 
-	//calculate number of chars that can fit available space
-	uint32_t spaceConsumed;
-	// @TODO spaceConsumed returns value irrelevant of current char
-    charDrawableCount = font->getCharCountInSpace( text, availableSpace, spaceConsumed );
-	textArea.w = (uint16_t)spaceConsumed;
+        // calculate area needed to display text
+        uint32_t availableSpace = drawArea.w;
+        if (availableSpace < 0)
+            availableSpace = 0;
 
-	//if not all characters fit create substring
-	if(charDrawableCount < text.length())
-	{
-		//get as much chars as possible
-		textDisplayed = text.substr( 0, charDrawableCount);
+        // calculate number of chars that can fit available space
+        uint32_t spaceConsumed;
+        // @TODO spaceConsumed returns value irrelevant of current char
+        charDrawableCount = font->getCharCountInSpace(text, availableSpace, spaceConsumed);
+        textArea.w        = (uint16_t)spaceConsumed;
 
-		// if 3 dots should be placed a the end
-		if( dotsMode )
-		{
-			//create 3 dots string
-			UTF8 dotsStr = UTF8("...");
+        // if not all characters fit create substring
+        if (charDrawableCount < text.length()) {
+            // get as much chars as possible
+            textDisplayed = text.substr(0, charDrawableCount);
 
-			//calculate how many dots can fit in the available space
-			uint32_t dotsSpaceConsumed;
-			uint32_t dotsFitting = font->getCharCountInSpace( dotsStr, drawArea.w, dotsSpaceConsumed );
+            // if 3 dots should be placed a the end
+            if (dotsMode) {
+                // create 3 dots string
+                UTF8 dotsStr = UTF8("...");
 
-			//if there is not enough space even for three dots
-			if( dotsFitting < 3 )
-			{
-				textDisplayed = dotsStr.substr( 0, dotsFitting );
-				textArea.w = (uint16_t)dotsSpaceConsumed;
-                charDrawableCount = (uint16_t)dotsFitting;
-			}
-			else // 3 dots fit, calculate how many chars can be placed using smaller space (space for dots subtracted )
-			{
-				availableSpace -= dotsSpaceConsumed;
+                // calculate how many dots can fit in the available space
+                uint32_t dotsSpaceConsumed;
+                uint32_t dotsFitting = font->getCharCountInSpace(dotsStr, drawArea.w, dotsSpaceConsumed);
 
-				uint32_t remainingCharDraw = font->getCharCountInSpace( text, availableSpace, spaceConsumed , this->dotsTruncateEnd);
-				if( remainingCharDraw )
-				{
-					//get as much chars as possible
-					if (this->dotsTruncateEnd) {
-					    textDisplayed = text.substr(0, remainingCharDraw) + dotsStr;
-					}
-					else{
-                        textDisplayed = dotsStr + text.substr(text.length() - remainingCharDraw, remainingCharDraw);
-					}
-					textArea.w = (uint16_t)(dotsSpaceConsumed + spaceConsumed );
-                    charDrawableCount = (uint16_t)textDisplayed.length();
-				}
-				else //only 3 dots can fit
-				{
-					textArea.w = (uint16_t)dotsSpaceConsumed;
+                // if there is not enough space even for three dots
+                if (dotsFitting < 3) {
+                    textDisplayed     = dotsStr.substr(0, dotsFitting);
+                    textArea.w        = (uint16_t)dotsSpaceConsumed;
                     charDrawableCount = (uint16_t)dotsFitting;
-					textDisplayed = dotsStr;
-				}
-			}
-		}
-	}
-	else
-	{
-		textDisplayed = text;
-	}
+                }
+                else // 3 dots fit, calculate how many chars can be placed using smaller space (space for dots
+                     // subtracted )
+                {
+                    availableSpace -= dotsSpaceConsumed;
 
-	stringPixelWidth = font->getPixelWidth( textDisplayed, 0, textDisplayed.length() );
-	textArea.h = font->info.line_height;
-
-	//calculate vertical position of text
-    if (alignment.vertical_center)
-    {
-        textArea.y =
-			(widgetArea.h - font->info.line_height )/2 +
-			font->info.base;
-    }
-    else if (alignment.vertical_top)
-    {
-        textArea.y = font->info.base + margins.top;
-    }
-    else if (alignment.vertical_bottom)
-    {
-        textArea.y =
-			widgetArea.h -
-			font->info.line_height + font->info.base -
-			margins.bottom;
-    }
-    //calculate horizontal position o text
-    if (alignment.horizontal_center)
-    {
-        textArea.x =( widgetArea.w - textArea.w )/2;
-    }
-    else if (alignment.horizontal_left)
-    {
-        textArea.x = margins.left;
-    }
-    else if (alignment.horizontal_right)
-    {
-        textArea.x = widgetArea.w - textArea.w - margins.right;
-    }
-
-    //if dots mode is disabled and line mode is enabled calculate positiona and width of the line
-	if( (!dotsMode) && (lineMode) && (lineFront!=nullptr) ) {
-		uint32_t spaceWidth = font->getCharPixelWidth(' ');
-		int32_t lineW = availableSpace - stringPixelWidth ;
-		uint32_t lineY = textArea.y - font->getCharPixelHeight('a')/2;
-		if( lineW < 0 ) lineW = 0;
-
-		lineFront->setVisible(true);
-		lineBack->setVisible(true);
-		//both lines are visible
-        if (alignment.horizontal_center)
-        {
-            lineFront->setPosition(0, lineY);
-            lineFront->setSize( lineW/2 - spaceWidth, 2 );
-			lineBack->setPosition( lineW/2 + stringPixelWidth +spaceWidth, lineY);
-			lineBack->setSize( lineW/2 -spaceWidth, 2 );
+                    uint32_t remainingCharDraw =
+                        font->getCharCountInSpace(text, availableSpace, spaceConsumed, this->dotsTruncateEnd);
+                    if (remainingCharDraw) {
+                        // get as much chars as possible
+                        if (this->dotsTruncateEnd) {
+                            textDisplayed = text.substr(0, remainingCharDraw) + dotsStr;
+                        }
+                        else {
+                            textDisplayed = dotsStr + text.substr(text.length() - remainingCharDraw, remainingCharDraw);
+                        }
+                        textArea.w        = (uint16_t)(dotsSpaceConsumed + spaceConsumed);
+                        charDrawableCount = (uint16_t)textDisplayed.length();
+                    }
+                    else // only 3 dots can fit
+                    {
+                        textArea.w        = (uint16_t)dotsSpaceConsumed;
+                        charDrawableCount = (uint16_t)dotsFitting;
+                        textDisplayed     = dotsStr;
+                    }
+                }
+            }
         }
-        else if (alignment.horizontal_right)
-        {
-            lineFront->setPosition(0, lineY);
-            lineFront->setSize( lineW-spaceWidth, 2 );
-			lineBack->setVisible(false);
+        else {
+            textDisplayed = text;
         }
-        else if (alignment.horizontal_left)
-        {
-            lineBack->setPosition(stringPixelWidth + spaceWidth, lineY);
-            lineBack->setSize( lineW-spaceWidth, 2 );
-			lineFront->setVisible(false);
+
+        stringPixelWidth = font->getPixelWidth(textDisplayed, 0, textDisplayed.length());
+        textArea.h       = font->info.line_height;
+
+        // calculate vertical position of text
+        if (alignment.vertical_center) {
+            textArea.y = (widgetArea.h - font->info.line_height) / 2 + font->info.base;
+        }
+        else if (alignment.vertical_top) {
+            textArea.y = font->info.base + margins.top;
+        }
+        else if (alignment.vertical_bottom) {
+            textArea.y = widgetArea.h - font->info.line_height + font->info.base - margins.bottom;
+        }
+        // calculate horizontal position o text
+        if (alignment.horizontal_center) {
+            textArea.x = (widgetArea.w - textArea.w) / 2;
+        }
+        else if (alignment.horizontal_left) {
+            textArea.x = margins.left;
+        }
+        else if (alignment.horizontal_right) {
+            textArea.x = widgetArea.w - textArea.w - margins.right;
+        }
+
+        // if dots mode is disabled and line mode is enabled calculate positiona and width of the line
+        if ((!dotsMode) && (lineMode) && (lineFront != nullptr)) {
+            uint32_t spaceWidth = font->getCharPixelWidth(' ');
+            int32_t lineW       = availableSpace - stringPixelWidth;
+            uint32_t lineY      = textArea.y - font->getCharPixelHeight('a') / 2;
+            if (lineW < 0)
+                lineW = 0;
+
+            lineFront->setVisible(true);
+            lineBack->setVisible(true);
+            // both lines are visible
+            if (alignment.horizontal_center) {
+                lineFront->setPosition(0, lineY);
+                lineFront->setSize(lineW / 2 - spaceWidth, 2);
+                lineBack->setPosition(lineW / 2 + stringPixelWidth + spaceWidth, lineY);
+                lineBack->setSize(lineW / 2 - spaceWidth, 2);
+            }
+            else if (alignment.horizontal_right) {
+                lineFront->setPosition(0, lineY);
+                lineFront->setSize(lineW - spaceWidth, 2);
+                lineBack->setVisible(false);
+            }
+            else if (alignment.horizontal_left) {
+                lineBack->setPosition(stringPixelWidth + spaceWidth, lineY);
+                lineBack->setSize(lineW - spaceWidth, 2);
+                lineFront->setVisible(false);
+            }
         }
     }
-}
 
-void Label::setText( const UTF8& text ) {
-	this->text = text;
-	calculateDisplayText();
-}
-
-void Label::clear() {
-	this->text = UTF8("");
-}
-
-UTF8 Label::getText() {
-	return text;
-}
-
-void Label::setAlignement( const Alignment& alignment ) {
-	this->alignment = alignment;
-	calculateDisplayText();
-}
-
-void Label::setMargins( const Margins& margins ) {
-	this->margins = margins;
-	calculateDisplayText();
-}
-
-void Label::setDotsMode( const bool val, const bool truncateEnd) {
-	dotsMode = val;
-    dotsTruncateEnd = truncateEnd;
-	calculateDisplayText();
-}
-
-void Label::setLineMode( const bool& val ) {
-	//if line mode is disable remove the line if it was previously created
-	if( val == false ) {
-		if( lineFront != nullptr ) {
-			this->removeWidget( lineFront );
-			this->removeWidget( lineBack );
-			delete lineFront;
-			delete lineBack;
-			lineFront = nullptr;
-			lineBack = nullptr;
-		}
-	}
-	else {
-		if( lineFront == nullptr ) {
-			lineFront = new Rect( this, 0,0,0,0 );
-			lineBack = new Rect( this, 0,0,0,0 );
-		}
-	}
-	calculateDisplayText();
-}
-
-std::list<DrawCommand*> Label::buildDrawList() {
-
-	std::list<DrawCommand*> commands;
-
-	//check if widget is visible
-	if( visible == false ) {
-		return commands;
-	}
-
-	//get children draw commands
-	std::list<DrawCommand*> commandsChildren;
-	commandsChildren = Item::buildDrawList();
-
-
-	//base class draw commands
-	std::list<DrawCommand*> commandsBase;
-	commandsBase = gui::Rect::buildDrawList();
-
-	//set local draw commands - text command
-	CommandText* textCmd = new CommandText();
-	textCmd->str = textDisplayed;
-	textCmd->fontID = font->id;
-	textCmd->color = textColor;
-
-	textCmd->x = drawArea.x;
-	textCmd->y = drawArea.y;
-	textCmd->w = drawArea.w;
-	textCmd->h = drawArea.h;
-	textCmd->tx = textArea.x;
-	textCmd->ty = textArea.y;
-	textCmd->tw = textArea.w;
-	textCmd->th = textArea.h;
-	textCmd->charsWidth = stringPixelWidth;
-
-	textCmd->areaX = widgetArea.x;
-	textCmd->areaY = widgetArea.y;
-	textCmd->areaW = widgetArea.w;
-	textCmd->areaH = widgetArea.h;
-
-	commands.splice( commands.end(), commandsBase );
-	commands.push_back( textCmd );
-	if( not commandsChildren.empty() )
-		commands.splice( commands.end(), commandsChildren );
-
-	return commands;
-}
-
-void Label::setPosition( const short& x, const short& y ) {
-	gui::Rect::setPosition( x, y );
-	calculateDisplayText();
-}
-
-void Label::setSize(const unsigned short w, const unsigned short h)
-{
-    gui::Rect::setSize(w, h);
-    calculateDisplayText();
-}
-
-void Label::setFont( const UTF8& fontName) {
-
-	uint32_t fontID = FontManager::getInstance().getFontID( fontName.c_str() );
-	Font* newFont = FontManager::getInstance().getFont( fontID );
-	if( newFont != nullptr ) {
-		font = newFont;
-		calculateDisplayText();
-	} else {
-		LOG_ERROR("Font not found!");
-	}
-}
-
-void Label::setTextColor( Color color ) {
-	textColor = color;
-}
-
-uint32_t Label::getTextNeedSpace()
-{
-    if (font == nullptr)
+    void Label::setText(const UTF8 &text)
     {
-        return 0;
+        this->text = text;
+        calculateDisplayText();
+    }
+
+    void Label::clear()
+    {
+        this->text = UTF8("");
+    }
+
+    UTF8 Label::getText()
+    {
+        return text;
+    }
+
+    void Label::setAlignement(const Alignment &alignment)
+    {
+        this->alignment = alignment;
+        calculateDisplayText();
+    }
+
+    void Label::setMargins(const Margins &margins)
+    {
+        this->margins = margins;
+        calculateDisplayText();
+    }
+
+    void Label::setDotsMode(const bool val, const bool truncateEnd)
+    {
+        dotsMode        = val;
+        dotsTruncateEnd = truncateEnd;
+        calculateDisplayText();
+    }
+
+    void Label::setLineMode(const bool &val)
+    {
+        // if line mode is disable remove the line if it was previously created
+        if (val == false) {
+            if (lineFront != nullptr) {
+                this->removeWidget(lineFront);
+                this->removeWidget(lineBack);
+                delete lineFront;
+                delete lineBack;
+                lineFront = nullptr;
+                lineBack  = nullptr;
+            }
+        }
+        else {
+            if (lineFront == nullptr) {
+                lineFront = new Rect(this, 0, 0, 0, 0);
+                lineBack  = new Rect(this, 0, 0, 0, 0);
+            }
+        }
+        calculateDisplayText();
+    }
+
+    std::list<DrawCommand *> Label::buildDrawList()
+    {
+
+        std::list<DrawCommand *> commands;
+
+        // check if widget is visible
+        if (visible == false) {
+            return commands;
+        }
+
+        // get children draw commands
+        std::list<DrawCommand *> commandsChildren;
+        commandsChildren = Item::buildDrawList();
+
+        // base class draw commands
+        std::list<DrawCommand *> commandsBase;
+        commandsBase = gui::Rect::buildDrawList();
+
+        // set local draw commands - text command
+        CommandText *textCmd = new CommandText();
+        textCmd->str         = textDisplayed;
+        textCmd->fontID      = font->id;
+        textCmd->color       = textColor;
+
+        textCmd->x          = drawArea.x;
+        textCmd->y          = drawArea.y;
+        textCmd->w          = drawArea.w;
+        textCmd->h          = drawArea.h;
+        textCmd->tx         = textArea.x;
+        textCmd->ty         = textArea.y;
+        textCmd->tw         = textArea.w;
+        textCmd->th         = textArea.h;
+        textCmd->charsWidth = stringPixelWidth;
+
+        textCmd->areaX = widgetArea.x;
+        textCmd->areaY = widgetArea.y;
+        textCmd->areaW = widgetArea.w;
+        textCmd->areaH = widgetArea.h;
+
+        commands.splice(commands.end(), commandsBase);
+        commands.push_back(textCmd);
+        if (not commandsChildren.empty())
+            commands.splice(commands.end(), commandsChildren);
+
+        return commands;
+    }
+
+    void Label::setPosition(const short &x, const short &y)
+    {
+        gui::Rect::setPosition(x, y);
+        calculateDisplayText();
+    }
+
+    void Label::setSize(const unsigned short w, const unsigned short h)
+    {
+        gui::Rect::setSize(w, h);
+        calculateDisplayText();
+    }
+
+    void Label::setFont(const UTF8 &fontName)
+    {
+
+        uint32_t fontID = FontManager::getInstance().getFontID(fontName.c_str());
+        Font *newFont   = FontManager::getInstance().getFont(fontID);
+        if (newFont != nullptr) {
+            font = newFont;
+            calculateDisplayText();
+        }
+        else {
+            LOG_ERROR("Font not found!");
+        }
+    }
+
+    void Label::setTextColor(Color color)
+    {
+        textColor = color;
+    }
+
+    uint32_t Label::getTextNeedSpace()
+    {
+        if (font == nullptr) {
+            return 0;
+        }
+        return font->getPixelWidth(text);
     }
-    return font->getPixelWidth(text);
-}
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Label.hpp b/module-gui/gui/widgets/Label.hpp
index 4953cefee..657e0c44c 100644
--- a/module-gui/gui/widgets/Label.hpp
+++ b/module-gui/gui/widgets/Label.hpp
@@ -23,13 +23,13 @@
 #include "Style.hpp"
 #include "utf8/UTF8.hpp"
 
-namespace gui {
+namespace gui
+{
 
     namespace meta
     {
         struct Meta
-        {
-        };
+        {};
 
         struct Item : public Meta
         {
@@ -45,11 +45,12 @@ namespace gui {
             }
             uint32_t x = 0, y = 0, w = 0, h = 0;
             int32_t no_focus = style::window::default_border_no_focus_w;
-            int32_t focus = style::window::default_border_no_focus_w;
+            int32_t focus    = style::window::default_border_no_focus_w;
             std::string font = style::window::font::medium;
-            bool dots = true;
-            uint32_t align = gui::Alignment::ALIGN_HORIZONTAL_LEFT | gui::Alignment::ALIGN_VERTICAL_CENTER;
-            RectangleEdgeFlags edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
+            bool dots        = true;
+            uint32_t align   = gui::Alignment::ALIGN_HORIZONTAL_LEFT | gui::Alignment::ALIGN_VERTICAL_CENTER;
+            RectangleEdgeFlags edges =
+                gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
         };
 
         struct Label : public Rect
@@ -63,65 +64,71 @@ namespace gui {
         };
     }; // namespace meta
 
-class Label: public Rect {
-protected:
-	UTF8 text;
-	UTF8 textDisplayed;
-	uint32_t charDrawableCount;
-	//number of pixels occupied by displayed text;
-	uint32_t stringPixelWidth;
+    class Label : public Rect
+    {
+      protected:
+        UTF8 text;
+        UTF8 textDisplayed;
+        uint32_t charDrawableCount;
+        // number of pixels occupied by displayed text;
+        uint32_t stringPixelWidth;
 
-	//color of the text
-	Color textColor;
-	//font pointer
-	Font* font;
-	//margins for text
-	Margins margins;
-    //type of alignment
-	Alignment alignment;
-    //flag that defines if 3 dots (ellipsis) are to be displayed at the end of label's text.
-	bool dotsMode;
-    //truncate a beginning or an end.
-	bool dotsTruncateEnd;
-    //flag that defines if a remaining area of the label has a horizontal line.
-	bool lineMode;
+        // color of the text
+        Color textColor;
+        // font pointer
+        Font *font;
+        // margins for text
+        Margins margins;
+        // type of alignment
+        Alignment alignment;
+        // flag that defines if 3 dots (ellipsis) are to be displayed at the end of label's text.
+        bool dotsMode;
+        // truncate a beginning or an end.
+        bool dotsTruncateEnd;
+        // flag that defines if a remaining area of the label has a horizontal line.
+        bool lineMode;
 
-	//area specified in pixels occupied by text inside label space.
-	//This defines also position of the text considering alignment and margins.
-	BoundingBox textArea;
-    //widgets to add line
-	Rect* lineFront = nullptr;
+        // area specified in pixels occupied by text inside label space.
+        // This defines also position of the text considering alignment and margins.
+        BoundingBox textArea;
+        // widgets to add line
+        Rect *lineFront = nullptr;
 
-	Rect* lineBack = nullptr;
-    void calculateDisplayText();
+        Rect *lineBack = nullptr;
+        void calculateDisplayText();
 
-public:
-    Label();
-    Label( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h, const UTF8& text = UTF8{} );
-    Label(Item *parent, meta::Label label);
+      public:
+        Label();
+        Label(Item *parent,
+              const uint32_t &x,
+              const uint32_t &y,
+              const uint32_t &w,
+              const uint32_t &h,
+              const UTF8 &text = UTF8{});
+        Label(Item *parent, meta::Label label);
 
-    virtual ~Label();
-    //Label's specific methods
-	virtual void setText( const UTF8& text );
-    virtual void clear();
-    virtual UTF8 getText();
-    virtual void setAlignement( const Alignment& alignment );
-    virtual void setMargins( const Margins& margins );
-    void setDotsMode( const bool val , const bool truncateEnd = true );
-    /**
-	 * @brief Defines if remaining area of the label has a horizontal line.
-	 */
-	void setLineMode( const bool& val );
-    void setTextColor( Color color );
+        virtual ~Label();
+        // Label's specific methods
+        virtual void setText(const UTF8 &text);
+        virtual void clear();
+        virtual UTF8 getText();
+        virtual void setAlignement(const Alignment &alignment);
+        virtual void setMargins(const Margins &margins);
+        void setDotsMode(const bool val, const bool truncateEnd = true);
+        /**
+         * @brief Defines if remaining area of the label has a horizontal line.
+         */
+        void setLineMode(const bool &val);
+        void setTextColor(Color color);
 
-	void setFont( const UTF8& fontName );
-    //virtual methods
-	std::list<DrawCommand*> buildDrawList() override;
-    void setPosition( const short& x, const short& y ) override;
+        void setFont(const UTF8 &fontName);
+        // virtual methods
+        std::list<DrawCommand *> buildDrawList() override;
+        void setPosition(const short &x, const short &y) override;
 
-    void setSize(const unsigned short w, const unsigned short h) override;
-    uint32_t getTextNeedSpace();
-};
+        void setSize(const unsigned short w, const unsigned short h) override;
+        uint32_t getTextNeedSpace();
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/Layout.cpp b/module-gui/gui/widgets/Layout.cpp
index 49402c683..a745fa1b5 100644
--- a/module-gui/gui/widgets/Layout.cpp
+++ b/module-gui/gui/widgets/Layout.cpp
@@ -7,15 +7,17 @@
 
 #include "Layout.hpp"
 
-namespace gui {
+namespace gui
+{
 
-Layout::Layout() {
-	// TODO Auto-generated constructor stub
+    Layout::Layout()
+    {
+        // TODO Auto-generated constructor stub
+    }
 
-}
-
-Layout::~Layout() {
-	// TODO Auto-generated destructor stub
-}
+    Layout::~Layout()
+    {
+        // TODO Auto-generated destructor stub
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Layout.hpp b/module-gui/gui/widgets/Layout.hpp
index 70635f1f7..bfaf95656 100644
--- a/module-gui/gui/widgets/Layout.hpp
+++ b/module-gui/gui/widgets/Layout.hpp
@@ -8,26 +8,29 @@
 #ifndef GUI_WIDGETS_LAYOUT_HPP_
 #define GUI_WIDGETS_LAYOUT_HPP_
 
-namespace gui {
+namespace gui
+{
 
-enum class LayoutHorizontalPolicy {
-	LAYOUT_POLICY_HORIZONTAL_EXPAND = 0x01,
-	LAYOUT_POLICY_HORIZONTAL_SHIRNH = 0x02,
-	LAYOUT_POLICY_HORIZONTAL_STATIC = 0x04,
-};
+    enum class LayoutHorizontalPolicy
+    {
+        LAYOUT_POLICY_HORIZONTAL_EXPAND = 0x01,
+        LAYOUT_POLICY_HORIZONTAL_SHIRNH = 0x02,
+        LAYOUT_POLICY_HORIZONTAL_STATIC = 0x04,
+    };
 
-enum class LayoutVerticalPolicy {
-	LAYOUT_POLICY_VERTICAL_EXPAND = 0x01,
-	LAYOUT_POLICY_VERTICAL_SHRINK = 0x02,
-	LAYOUT_POLICY_VERTICAL_STATIC = 0x04,
-};
+    enum class LayoutVerticalPolicy
+    {
+        LAYOUT_POLICY_VERTICAL_EXPAND = 0x01,
+        LAYOUT_POLICY_VERTICAL_SHRINK = 0x02,
+        LAYOUT_POLICY_VERTICAL_STATIC = 0x04,
+    };
 
-class Layout {
-public:
-
-	Layout();
-	virtual ~Layout();
-};
+    class Layout
+    {
+      public:
+        Layout();
+        virtual ~Layout();
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/ListItem.cpp b/module-gui/gui/widgets/ListItem.cpp
index f39e4e1df..324d71066 100644
--- a/module-gui/gui/widgets/ListItem.cpp
+++ b/module-gui/gui/widgets/ListItem.cpp
@@ -8,12 +8,13 @@
 #include "ListItem.hpp"
 #include "log/log.hpp"
 
-namespace gui {
+namespace gui
+{
 
-ListItem::ListItem() {
-}
+    ListItem::ListItem()
+    {}
 
-ListItem::~ListItem() {
-}
+    ListItem::~ListItem()
+    {}
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/ListItem.hpp b/module-gui/gui/widgets/ListItem.hpp
index 97a105e9f..f7152e809 100644
--- a/module-gui/gui/widgets/ListItem.hpp
+++ b/module-gui/gui/widgets/ListItem.hpp
@@ -10,23 +10,32 @@
 
 #include "Rect.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ListItem: public Rect {
-	//id is valid if value is greater equal to 0.
-	int itemID = -1;
-public:
-	//TODO move this to protected area and provide getters and setters
-	int minHeight = 0;
-	int minWidth = 0;
-	int maxHeight = 0xFFFF;
-	int maxWidth = 0xFFFF;
+    class ListItem : public Rect
+    {
+        // id is valid if value is greater equal to 0.
+        int itemID = -1;
 
-	ListItem();
-	virtual ~ListItem();
-	virtual void setID( int id ) { itemID = id; };
-	virtual int getID(){return itemID; };
-};
+      public:
+        // TODO move this to protected area and provide getters and setters
+        int minHeight = 0;
+        int minWidth  = 0;
+        int maxHeight = 0xFFFF;
+        int maxWidth  = 0xFFFF;
+
+        ListItem();
+        virtual ~ListItem();
+        virtual void setID(int id)
+        {
+            itemID = id;
+        };
+        virtual int getID()
+        {
+            return itemID;
+        };
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/ListItemProvider.cpp b/module-gui/gui/widgets/ListItemProvider.cpp
index 3f3c27a1b..2f83d4696 100644
--- a/module-gui/gui/widgets/ListItemProvider.cpp
+++ b/module-gui/gui/widgets/ListItemProvider.cpp
@@ -7,16 +7,19 @@
 
 #include "ListItemProvider.hpp"
 
-namespace gui {
+namespace gui
+{
 
-ListItemProvider::ListItemProvider() {
-}
+    ListItemProvider::ListItemProvider()
+    {}
 
-ListItemProvider::~ListItemProvider() {
-}
+    ListItemProvider::~ListItemProvider()
+    {}
 
-ListItem* ListItemProvider::getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown ) {
-	return nullptr;
-}
+    ListItem *ListItemProvider::getItem(
+        int index, int firstElement, int prevElement, uint32_t count, int remaining, bool topDown)
+    {
+        return nullptr;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/ListItemProvider.hpp b/module-gui/gui/widgets/ListItemProvider.hpp
index 98d087fd5..82df36de6 100644
--- a/module-gui/gui/widgets/ListItemProvider.hpp
+++ b/module-gui/gui/widgets/ListItemProvider.hpp
@@ -11,32 +11,35 @@
 #include "ListItem.hpp"
 #include "ListView.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ListView;
+    class ListView;
 
-/// something between cache and factory for list view - it provides next elements requested by ListView
-/// it can only be used in combination with DatabaseModel which uses asynchronous request via application
-/// and caches elements requested from database
-class ListItemProvider {
-protected:
-	ListView* list = nullptr;
-public:
-	ListItemProvider();
-	virtual ~ListItemProvider();
+    /// something between cache and factory for list view - it provides next elements requested by ListView
+    /// it can only be used in combination with DatabaseModel which uses asynchronous request via application
+    /// and caches elements requested from database
+    class ListItemProvider
+    {
+      protected:
+        ListView *list = nullptr;
 
+      public:
+        ListItemProvider();
+        virtual ~ListItemProvider();
 
-	virtual int getItemCount() const = 0;
-	/**
-	 * @brief Requests from Provider element that is no index position out of givent count of visible elements
-	 * @param index Index of the visible element.
-	 * @param firstElement Index of the first element on the displayed list.
-	 * @param prevElement Index of the previous element.
-	 * @param count Number of the elements visible in the list view widget.
-	 * @param topDown defines if elements are to be filled starting from the top of list
-	 */
-	virtual ListItem* getItem( int index, int firstElement, int prevElement, uint32_t count, int remaining = 0, bool topDown = true );
-};
+        virtual int getItemCount() const = 0;
+        /**
+         * @brief Requests from Provider element that is no index position out of givent count of visible elements
+         * @param index Index of the visible element.
+         * @param firstElement Index of the first element on the displayed list.
+         * @param prevElement Index of the previous element.
+         * @param count Number of the elements visible in the list view widget.
+         * @param topDown defines if elements are to be filled starting from the top of list
+         */
+        virtual ListItem *getItem(
+            int index, int firstElement, int prevElement, uint32_t count, int remaining = 0, bool topDown = true);
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/ListView.cpp b/module-gui/gui/widgets/ListView.cpp
index e424ae886..ef390c9a7 100644
--- a/module-gui/gui/widgets/ListView.cpp
+++ b/module-gui/gui/widgets/ListView.cpp
@@ -9,367 +9,365 @@
 #include "ListView.hpp"
 #include <log/log.hpp>
 
-namespace gui {
-
-ListView::ListView() :
-	firstIndex{ 0 },
-	lastIndex{ 0 },
-	elementsCount{ 4 },
-	drawSeparators{ true },
-	drawVerticalScroll{ true },
-	orientation{ ListView::ORIENTATION_TOP_DOWN},
-	maxElements{4},
-	selectedIndex{0},
-	listMode{ ListView::MODE_PAGE },
-	pageSize{ 4 } {
-
-	setPenFocusWidth(0);
-	setPenWidth(0);
-
-	scroll = new Rect( this, 0,0,0,0 );
-	scroll->setRadius(3);
-	scroll->setFilled(true);
-	scroll->setFillColor( Color{0, 0});
-}
-
-ListView::ListView( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h ) :
-	Rect{parent, x, y, w, h},
-	firstIndex{ 0 },
-	lastIndex{ 0 },
-	elementsCount{ 4 },
-	drawSeparators{ true },
-	drawVerticalScroll{ true },
-	orientation{ ListView::ORIENTATION_TOP_DOWN},
-	maxElements{4},
-	selectedIndex{0},
-	listMode{ ListView::MODE_PAGE },
-	pageSize{ 4 } {
-
-	setPenFocusWidth(0);
-	setPenWidth(0);
-
-	scroll = new Rect( this, 0,0,0,0 );
-	scroll->setRadius(3);
-	scroll->setFilled(true);
-	scroll->setFillColor( Color{0, 0});
-}
-
-ListView::~ListView() {
-
-	clearItems();
-}
-
-/**
- * For MODE_PAGE:
- * When new number of elements is provided list checks if currently visible items are still valid.
- * If value of the first index is invalid then new value is calculated using number of all elements
- * and defined size of page(number of visible elements).
- * Last index is calculated using value of first index and page size. If value is too big it is reduced
- * to index of the last element.
- * if index of selected element is invalid after change new value is set to the index of the last element
- * in the list.
- */
-void ListView::setElementsCount( int count ) {
-	elementsCount = count;
-	if( listMode == ListView::MODE_PAGE ) {
-		if( firstIndex > elementsCount )
-			firstIndex = (elementsCount / pageSize )*pageSize;
-		lastIndex = firstIndex + pageSize - 1;
-		if( lastIndex > elementsCount - 1 )
-			lastIndex = elementsCount - 1;
-		if( selectedIndex > lastIndex )
-			selectedIndex = lastIndex;
-	}
-	updateScrollDimenstions();
-}
-
-void ListView::setDrawSeparators( bool value ) {
-	drawSeparators = value;
-}
-
-void ListView::setOrientation( int orientation ) {
-	if( orientation == ListView::ORIENTATION_BOTTOM_UP )
-		this->orientation = ListView::ORIENTATION_BOTTOM_UP;
-	else if(orientation == ListView::ORIENTATION_TOP_DOWN )
-		this->orientation = ListView::ORIENTATION_TOP_DOWN;
-}
-
-void ListView::drawScroll( bool value ) {
-	drawVerticalScroll = value;
-	scroll->visible = value;
-}
-
-void ListView::setMaxElements( int value ) {
-	maxElements = value;
-}
-
-void ListView::setProvider( ListItemProvider* provider ) {
-	this->provider = provider;
-}
-
-void ListView::clearItems() {
-
-	for( auto item : items ) {
-		removeWidget(item);
-		delete (item);
-	}
-
-	items.clear();
-}
-
-void ListView::clear() {
-	clearItems();
-
-	firstIndex = 0;
-	lastIndex = 0;
-	selectedIndex = 0;
-
-	updateScrollDimenstions();
-}
-
-void ListView::updatePageItems() {
-
-	int prevIndex = firstIndex-1;
-	for( int i=0; i<pageSize; i++ ) {
-
-		ListItem* item = provider->getItem(firstIndex + i, firstIndex,prevIndex,  pageSize );
-		if( item != nullptr ) {
-			addWidget(item);
-			items.push_back(item);
-			prevIndex++;
-		}
-	}
-
-	//calculate height of the item using list's height and pageSize
-	uint32_t itemWidth = widgetArea.w;
-	if( drawVerticalScroll )
-		itemWidth -= 10;
-
-	int availableHeight  = widgetArea.h - pageSize;
-	if( availableHeight < 0 )
-		availableHeight = 0;
-	int itemHeight = availableHeight / pageSize;
-
-	int verticalPosition;
-	if( orientation == ORIENTATION_TOP_DOWN )
-		verticalPosition = 0;
-	else
-		verticalPosition = widgetArea.h;
-
-	auto it = items.begin();
-	for(unsigned int i=0; i<items.size(); i++ ) {
-		if( availableHeight > 0 ) {
-
-			itemHeight = (*it)->minHeight;
-            gui::BoundingBox bbox= (*it)->widgetArea;
-			bbox.h = itemHeight;
-            bbox.w = itemWidth;
-
-			if( orientation == ORIENTATION_TOP_DOWN ) {
-				bbox.y = verticalPosition;
-				verticalPosition += itemHeight + 1; //1 for separator
-			}
-			else {
-				verticalPosition -= itemHeight - 1; //1 for separator
-				bbox.y = verticalPosition;
-			}
-
-			(*it)->setBoundingBox(bbox);
-
-			//if list has focus and it is visible mark selected element
-			if( visible ) {
-				if( (int)(i+firstIndex) == selectedIndex )
-                    (*it)->setFocus(true);
-            }
-
-            availableHeight -=itemHeight;
-		}
-		std::advance(it, 1);
-	}
-}
-
-bool ListView::onInput( const InputEvent& inputEvent ) {
-
-	if( (inputEvent.state == InputEvent::State::keyReleasedShort ) && (inputEvent.keyCode == KeyCode::KEY_ENTER) ) {
-		return onActivated(nullptr);
-	}
-
-	if( (inputEvent.state == InputEvent::State::keyReleasedShort ) && (inputEvent.keyCode == KeyCode::KEY_UP) ){
-		if( orientation == ORIENTATION_TOP_DOWN ) {
-			if( listMode == MODE_PAGE ){
-				if( selectedIndex > firstIndex ) {
-					selectedIndex--;
-					return true;
-				}
-				if( selectedIndex == firstIndex ) {
-					if( firstIndex > 0 ) {
-						firstIndex -= pageSize;
-						if( firstIndex < 0 )
-							firstIndex = 0;
-						lastIndex = firstIndex + pageSize -1;
-						if( lastIndex > elementsCount - 1 )
-							lastIndex = elementsCount - 1;
-						selectedIndex = lastIndex;
-						updateScrollDimenstions();
-						return true;
-					}
-				}
-			}
-			else {
-				//TODO implement continuous mode
-			}
-		}
-		else if( orientation == ORIENTATION_BOTTOM_UP ) {
-			//TODO implement BOTTOM_UP orientation
-		}
-	}
-	else if( (inputEvent.state == InputEvent::State::keyReleasedShort ) && (inputEvent.keyCode == KeyCode::KEY_DOWN) ){
-		if( orientation == ORIENTATION_TOP_DOWN ) {
-			if( listMode == MODE_PAGE ) {
-				if( selectedIndex < lastIndex ) {
-					selectedIndex++;
-					return true;
-				}
-				if( selectedIndex == lastIndex ) {
-					if( lastIndex < elementsCount - 1 ) {
-						firstIndex += pageSize;
-						if( firstIndex > elementsCount - 1 )
-							firstIndex = elementsCount - 1;
-						lastIndex = firstIndex + pageSize -1;
-						if( lastIndex > elementsCount - 1 )
-							lastIndex = elementsCount - 1;
-						selectedIndex = firstIndex;
-						updateScrollDimenstions();
-						return true;
-					}
-				}
-			}
-			else { //continuous mode
-
-			}
-		}
-		else { // BOTTOM_UP
-
-		}
-	}
-	return false;
-}
-
-void ListView::updateContinousItems() {
-
-}
-
-
-
-//TODO reuse items if possible
-void ListView::updateItems() {
-
-	//remove old items
-	clearItems();
-
-	if( provider == nullptr )
-		return;
-
-	elementsCount = provider->getItemCount();
-
-	if( listMode == ListView::MODE_PAGE ) {
-		updatePageItems();
-	}
-	else if( listMode == ListView::MODE_CONTINUOUS ) {
-		updateContinousItems();
-	}
-}
-
-ListItem* ListView::getSelectedItem() {
-	//return object only if there are any items in the list
-	if( elementsCount ) {
-		auto it = items.begin();
-		std::advance(it, selectedIndex-firstIndex );
-		return *it;
-	}
-	return nullptr;
-}
-
-std::list<DrawCommand*> ListView::buildDrawList() {
-
-	//check if widget is visible
-	if( visible == false ) {
-		return std::list<DrawCommand*>();
-	}
-
-	updateItems();
-
-	//uint8_t* bBuf = gui::Rect::buildDrawList(bSize, bCount);
-	return gui::Rect::buildDrawList();
-}
-
-void ListView::setMode( int mode ) {
-	if( (mode == ListView::MODE_PAGE) || (mode == ListView::MODE_CONTINUOUS) )
-		listMode = mode;
-}
-
-void ListView::setPageSize( int size ) {
-	pageSize = size;
-}
-
-bool ListView::onActivated( void* data ) {
-
-	//return if list doesn't have focus
-	if( focus == false )
-		return false;
-
-	//if there are any elements in the list
-	if( elementsCount > 0 ) {
-		//select item that has focus
-		auto it = items.begin();
-		std::advance(it, selectedIndex-firstIndex );
-		return (*it)->onActivated( data );
-	}
-
-	return false;
-}
-
-bool ListView::onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) {
-	Rect::onDimensionChanged(oldDim, newDim);
-	updateScrollDimenstions();
-	return true;
-}
-
-void ListView::updateScrollDimenstions()
+namespace gui
 {
-    if ((widgetArea.w > 10) && (widgetArea.h > 10))
-    {
-        if (drawVerticalScroll)
-            scroll->visible = true;
 
-        uint32_t pagesCount = 1;
-        if (pageSize)
-        {
-            pagesCount = (elementsCount % pageSize == 0) ? elementsCount / pageSize : elementsCount / pageSize + 1;
-            if (pagesCount == 0)
-            {
-                disableScroll();
-                return;
+    ListView::ListView()
+        : firstIndex{0}, lastIndex{0}, elementsCount{4}, drawSeparators{true}, drawVerticalScroll{true},
+          orientation{ListView::ORIENTATION_TOP_DOWN}, maxElements{4},
+          selectedIndex{0}, listMode{ListView::MODE_PAGE}, pageSize{4}
+    {
+
+        setPenFocusWidth(0);
+        setPenWidth(0);
+
+        scroll = new Rect(this, 0, 0, 0, 0);
+        scroll->setRadius(3);
+        scroll->setFilled(true);
+        scroll->setFillColor(Color{0, 0});
+    }
+
+    ListView::ListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h)
+        : Rect{parent, x, y, w, h}, firstIndex{0}, lastIndex{0}, elementsCount{4}, drawSeparators{true},
+          drawVerticalScroll{true}, orientation{ListView::ORIENTATION_TOP_DOWN}, maxElements{4},
+          selectedIndex{0}, listMode{ListView::MODE_PAGE}, pageSize{4}
+    {
+
+        setPenFocusWidth(0);
+        setPenWidth(0);
+
+        scroll = new Rect(this, 0, 0, 0, 0);
+        scroll->setRadius(3);
+        scroll->setFilled(true);
+        scroll->setFillColor(Color{0, 0});
+    }
+
+    ListView::~ListView()
+    {
+
+        clearItems();
+    }
+
+    /**
+     * For MODE_PAGE:
+     * When new number of elements is provided list checks if currently visible items are still valid.
+     * If value of the first index is invalid then new value is calculated using number of all elements
+     * and defined size of page(number of visible elements).
+     * Last index is calculated using value of first index and page size. If value is too big it is reduced
+     * to index of the last element.
+     * if index of selected element is invalid after change new value is set to the index of the last element
+     * in the list.
+     */
+    void ListView::setElementsCount(int count)
+    {
+        elementsCount = count;
+        if (listMode == ListView::MODE_PAGE) {
+            if (firstIndex > elementsCount)
+                firstIndex = (elementsCount / pageSize) * pageSize;
+            lastIndex = firstIndex + pageSize - 1;
+            if (lastIndex > elementsCount - 1)
+                lastIndex = elementsCount - 1;
+            if (selectedIndex > lastIndex)
+                selectedIndex = lastIndex;
+        }
+        updateScrollDimenstions();
+    }
+
+    void ListView::setDrawSeparators(bool value)
+    {
+        drawSeparators = value;
+    }
+
+    void ListView::setOrientation(int orientation)
+    {
+        if (orientation == ListView::ORIENTATION_BOTTOM_UP)
+            this->orientation = ListView::ORIENTATION_BOTTOM_UP;
+        else if (orientation == ListView::ORIENTATION_TOP_DOWN)
+            this->orientation = ListView::ORIENTATION_TOP_DOWN;
+    }
+
+    void ListView::drawScroll(bool value)
+    {
+        drawVerticalScroll = value;
+        scroll->visible    = value;
+    }
+
+    void ListView::setMaxElements(int value)
+    {
+        maxElements = value;
+    }
+
+    void ListView::setProvider(ListItemProvider *provider)
+    {
+        this->provider = provider;
+    }
+
+    void ListView::clearItems()
+    {
+
+        for (auto item : items) {
+            removeWidget(item);
+            delete (item);
+        }
+
+        items.clear();
+    }
+
+    void ListView::clear()
+    {
+        clearItems();
+
+        firstIndex    = 0;
+        lastIndex     = 0;
+        selectedIndex = 0;
+
+        updateScrollDimenstions();
+    }
+
+    void ListView::updatePageItems()
+    {
+
+        int prevIndex = firstIndex - 1;
+        for (int i = 0; i < pageSize; i++) {
+
+            ListItem *item = provider->getItem(firstIndex + i, firstIndex, prevIndex, pageSize);
+            if (item != nullptr) {
+                addWidget(item);
+                items.push_back(item);
+                prevIndex++;
             }
         }
 
-        uint32_t currentPage = selectedIndex / pageSize;
-        uint32_t pageHeight = widgetArea.h / pagesCount;
+        // calculate height of the item using list's height and pageSize
+        uint32_t itemWidth = widgetArea.w;
+        if (drawVerticalScroll)
+            itemWidth -= 10;
 
-        scroll->setPosition(widgetArea.w - 7, pageHeight * currentPage);
-        scroll->setSize(7, pageHeight);
+        int availableHeight = widgetArea.h - pageSize;
+        if (availableHeight < 0)
+            availableHeight = 0;
+        int itemHeight = availableHeight / pageSize;
+
+        int verticalPosition;
+        if (orientation == ORIENTATION_TOP_DOWN)
+            verticalPosition = 0;
+        else
+            verticalPosition = widgetArea.h;
+
+        auto it = items.begin();
+        for (unsigned int i = 0; i < items.size(); i++) {
+            if (availableHeight > 0) {
+
+                itemHeight            = (*it)->minHeight;
+                gui::BoundingBox bbox = (*it)->widgetArea;
+                bbox.h                = itemHeight;
+                bbox.w                = itemWidth;
+
+                if (orientation == ORIENTATION_TOP_DOWN) {
+                    bbox.y = verticalPosition;
+                    verticalPosition += itemHeight + 1; // 1 for separator
+                }
+                else {
+                    verticalPosition -= itemHeight - 1; // 1 for separator
+                    bbox.y = verticalPosition;
+                }
+
+                (*it)->setBoundingBox(bbox);
+
+                // if list has focus and it is visible mark selected element
+                if (visible) {
+                    if ((int)(i + firstIndex) == selectedIndex)
+                        (*it)->setFocus(true);
+                }
+
+                availableHeight -= itemHeight;
+            }
+            std::advance(it, 1);
+        }
     }
-    // not enough space - disable scroll
-    else
+
+    bool ListView::onInput(const InputEvent &inputEvent)
     {
-        disableScroll();
-    }
-}
 
-void ListView::disableScroll()
-{
-    scroll->setSize(0, 0);
-    scroll->visible = false;
-}
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_ENTER)) {
+            return onActivated(nullptr);
+        }
+
+        if ((inputEvent.state == InputEvent::State::keyReleasedShort) && (inputEvent.keyCode == KeyCode::KEY_UP)) {
+            if (orientation == ORIENTATION_TOP_DOWN) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex > firstIndex) {
+                        selectedIndex--;
+                        return true;
+                    }
+                    if (selectedIndex == firstIndex) {
+                        if (firstIndex > 0) {
+                            firstIndex -= pageSize;
+                            if (firstIndex < 0)
+                                firstIndex = 0;
+                            lastIndex = firstIndex + pageSize - 1;
+                            if (lastIndex > elementsCount - 1)
+                                lastIndex = elementsCount - 1;
+                            selectedIndex = lastIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
+                    }
+                }
+                else {
+                    // TODO implement continuous mode
+                }
+            }
+            else if (orientation == ORIENTATION_BOTTOM_UP) {
+                // TODO implement BOTTOM_UP orientation
+            }
+        }
+        else if ((inputEvent.state == InputEvent::State::keyReleasedShort) &&
+                 (inputEvent.keyCode == KeyCode::KEY_DOWN)) {
+            if (orientation == ORIENTATION_TOP_DOWN) {
+                if (listMode == MODE_PAGE) {
+                    if (selectedIndex < lastIndex) {
+                        selectedIndex++;
+                        return true;
+                    }
+                    if (selectedIndex == lastIndex) {
+                        if (lastIndex < elementsCount - 1) {
+                            firstIndex += pageSize;
+                            if (firstIndex > elementsCount - 1)
+                                firstIndex = elementsCount - 1;
+                            lastIndex = firstIndex + pageSize - 1;
+                            if (lastIndex > elementsCount - 1)
+                                lastIndex = elementsCount - 1;
+                            selectedIndex = firstIndex;
+                            updateScrollDimenstions();
+                            return true;
+                        }
+                    }
+                }
+                else { // continuous mode
+                }
+            }
+            else { // BOTTOM_UP
+            }
+        }
+        return false;
+    }
+
+    void ListView::updateContinousItems()
+    {}
+
+    // TODO reuse items if possible
+    void ListView::updateItems()
+    {
+
+        // remove old items
+        clearItems();
+
+        if (provider == nullptr)
+            return;
+
+        elementsCount = provider->getItemCount();
+
+        if (listMode == ListView::MODE_PAGE) {
+            updatePageItems();
+        }
+        else if (listMode == ListView::MODE_CONTINUOUS) {
+            updateContinousItems();
+        }
+    }
+
+    ListItem *ListView::getSelectedItem()
+    {
+        // return object only if there are any items in the list
+        if (elementsCount) {
+            auto it = items.begin();
+            std::advance(it, selectedIndex - firstIndex);
+            return *it;
+        }
+        return nullptr;
+    }
+
+    std::list<DrawCommand *> ListView::buildDrawList()
+    {
+
+        // check if widget is visible
+        if (visible == false) {
+            return std::list<DrawCommand *>();
+        }
+
+        updateItems();
+
+        // uint8_t* bBuf = gui::Rect::buildDrawList(bSize, bCount);
+        return gui::Rect::buildDrawList();
+    }
+
+    void ListView::setMode(int mode)
+    {
+        if ((mode == ListView::MODE_PAGE) || (mode == ListView::MODE_CONTINUOUS))
+            listMode = mode;
+    }
+
+    void ListView::setPageSize(int size)
+    {
+        pageSize = size;
+    }
+
+    bool ListView::onActivated(void *data)
+    {
+
+        // return if list doesn't have focus
+        if (focus == false)
+            return false;
+
+        // if there are any elements in the list
+        if (elementsCount > 0) {
+            // select item that has focus
+            auto it = items.begin();
+            std::advance(it, selectedIndex - firstIndex);
+            return (*it)->onActivated(data);
+        }
+
+        return false;
+    }
+
+    bool ListView::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        Rect::onDimensionChanged(oldDim, newDim);
+        updateScrollDimenstions();
+        return true;
+    }
+
+    void ListView::updateScrollDimenstions()
+    {
+        if ((widgetArea.w > 10) && (widgetArea.h > 10)) {
+            if (drawVerticalScroll)
+                scroll->visible = true;
+
+            uint32_t pagesCount = 1;
+            if (pageSize) {
+                pagesCount = (elementsCount % pageSize == 0) ? elementsCount / pageSize : elementsCount / pageSize + 1;
+                if (pagesCount == 0) {
+                    disableScroll();
+                    return;
+                }
+            }
+
+            uint32_t currentPage = selectedIndex / pageSize;
+            uint32_t pageHeight  = widgetArea.h / pagesCount;
+
+            scroll->setPosition(widgetArea.w - 7, pageHeight * currentPage);
+            scroll->setSize(7, pageHeight);
+        }
+        // not enough space - disable scroll
+        else {
+            disableScroll();
+        }
+    }
+
+    void ListView::disableScroll()
+    {
+        scroll->setSize(0, 0);
+        scroll->visible = false;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/ListView.hpp b/module-gui/gui/widgets/ListView.hpp
index 51e11a276..cfeb954b7 100644
--- a/module-gui/gui/widgets/ListView.hpp
+++ b/module-gui/gui/widgets/ListView.hpp
@@ -12,82 +12,86 @@
 #include "Rect.hpp"
 #include "ListItemProvider.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class ListItemProvider;
+    class ListItemProvider;
 
-/// fixed size and application Vertical ListView to be used with ListItemProvider and DatabaseModel only.
-/// For simple vertical list with no external model use VBox
-class ListView: public Rect {
-protected:
-	//id of the first element visible on the list (location depends on orientation)
-	int firstIndex;
-	//index of last visible item
-	int lastIndex;
-	//defines total number of elements in the list
-	int elementsCount;
-	//defines whether separator should be placed between elements
-	bool drawSeparators;
-	//defines whether scroll bar should be drawn on the right side of list widget
-	bool drawVerticalScroll;
-	//defines whether first element is on bottom of widget ( BOTTOM_UP ) or on top of widget ( TOP_BOTTOM )
-	int orientation;
-	//maximum number of elements that can be displayed on the screen
-	int maxElements;
-	//index of the currently selected element
-	int selectedIndex;
-	//vector that holds currently visible list of items
-	std::list<ListItem*> items;
-	//pointer to the item provider object
-	ListItemProvider* provider = nullptr;
-	//rounded rectangle used to draw scroll bar
-	Rect* scroll;
-	//space available for new items - this will change after any new item retrieved from provider
-	int listMode;
-	int pageSize;
+    /// fixed size and application Vertical ListView to be used with ListItemProvider and DatabaseModel only.
+    /// For simple vertical list with no external model use VBox
+    class ListView : public Rect
+    {
+      protected:
+        // id of the first element visible on the list (location depends on orientation)
+        int firstIndex;
+        // index of last visible item
+        int lastIndex;
+        // defines total number of elements in the list
+        int elementsCount;
+        // defines whether separator should be placed between elements
+        bool drawSeparators;
+        // defines whether scroll bar should be drawn on the right side of list widget
+        bool drawVerticalScroll;
+        // defines whether first element is on bottom of widget ( BOTTOM_UP ) or on top of widget ( TOP_BOTTOM )
+        int orientation;
+        // maximum number of elements that can be displayed on the screen
+        int maxElements;
+        // index of the currently selected element
+        int selectedIndex;
+        // vector that holds currently visible list of items
+        std::list<ListItem *> items;
+        // pointer to the item provider object
+        ListItemProvider *provider = nullptr;
+        // rounded rectangle used to draw scroll bar
+        Rect *scroll;
+        // space available for new items - this will change after any new item retrieved from provider
+        int listMode;
+        int pageSize;
 
-	virtual void updatePageItems();
-	void updateContinousItems();
-	void clearItems();
-	void updateScrollDimenstions();
-    void disableScroll();
-public:
-	static const int ORIENTATION_TOP_DOWN  = 0x01;
-	static const int ORIENTATION_BOTTOM_UP = 0x02;
-	//list items has same height, incrementing beyond last or first item will cause all items to be changed
-	static const int MODE_PAGE = 0x04;
-	//following item will be displayed as long there is available space. Height of the items must be provided by the items.
-	static const int MODE_CONTINUOUS = 0x08;
+        virtual void updatePageItems();
+        void updateContinousItems();
+        void clearItems();
+        void updateScrollDimenstions();
+        void disableScroll();
 
-	ListView();
-	ListView( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h );
-	virtual ~ListView();
+      public:
+        static const int ORIENTATION_TOP_DOWN  = 0x01;
+        static const int ORIENTATION_BOTTOM_UP = 0x02;
+        // list items has same height, incrementing beyond last or first item will cause all items to be changed
+        static const int MODE_PAGE = 0x04;
+        // following item will be displayed as long there is available space. Height of the items must be provided by
+        // the items.
+        static const int MODE_CONTINUOUS = 0x08;
 
-	//virtual methods for list view
-	virtual void setElementsCount( int count );
-	virtual void setDrawSeparators( bool value );
-	virtual void setOrientation( int orientation );
-	virtual void drawScroll( bool value );
-	virtual void setMaxElements( int value );
-	virtual void setProvider( ListItemProvider* provider );
-	virtual void setMode( int mode );
-	virtual void setPageSize( int size );
-	virtual ListItem* getSelectedItem();
-	/*
-	 * Acquire and/or update items using item provider
-	 */
-	virtual void updateItems();
-	/**
-	 * removes all data stored in the list and resets size and position to 0
-	 */
-	virtual void clear();
+        ListView();
+        ListView(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h);
+        virtual ~ListView();
 
-	//virtual methods from Item
-	std::list<DrawCommand*> buildDrawList() override;
-	bool onInput( const InputEvent& inputEvent ) override;
-	bool onActivated( void* data ) override ;
-	bool onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) override;
-};
+        // virtual methods for list view
+        virtual void setElementsCount(int count);
+        virtual void setDrawSeparators(bool value);
+        virtual void setOrientation(int orientation);
+        virtual void drawScroll(bool value);
+        virtual void setMaxElements(int value);
+        virtual void setProvider(ListItemProvider *provider);
+        virtual void setMode(int mode);
+        virtual void setPageSize(int size);
+        virtual ListItem *getSelectedItem();
+        /*
+         * Acquire and/or update items using item provider
+         */
+        virtual void updateItems();
+        /**
+         * removes all data stored in the list and resets size and position to 0
+         */
+        virtual void clear();
+
+        // virtual methods from Item
+        std::list<DrawCommand *> buildDrawList() override;
+        bool onInput(const InputEvent &inputEvent) override;
+        bool onActivated(void *data) override;
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/Margins.cpp b/module-gui/gui/widgets/Margins.cpp
index 0fc241e27..87f1f4030 100644
--- a/module-gui/gui/widgets/Margins.cpp
+++ b/module-gui/gui/widgets/Margins.cpp
@@ -8,29 +8,29 @@
 #include "Margins.hpp"
 #include <core/BoundingBox.hpp>
 
-namespace gui {
-
-Margins::Margins() : left{0}, top{0}, right{0}, bottom{0} {
-}
-
-Margins::Margins( const short left, const short top, const short right, const short bottom ) :
-	left{left}, top{top}, right{right}, bottom{bottom} {
-}
-
-Margins::~Margins() {
-}
-
-short Margins::getAlong(gui::Axis axis) const
+namespace gui
 {
-    switch (axis)
+
+    Margins::Margins() : left{0}, top{0}, right{0}, bottom{0}
+    {}
+
+    Margins::Margins(const short left, const short top, const short right, const short bottom)
+        : left{left}, top{top}, right{right}, bottom{bottom}
+    {}
+
+    Margins::~Margins()
+    {}
+
+    short Margins::getAlong(gui::Axis axis) const
     {
-    case Axis::X:
-        return (left + right);
-    case Axis::Y:
-        return (top + bottom);
-    default:
-        return 0;
+        switch (axis) {
+        case Axis::X:
+            return (left + right);
+        case Axis::Y:
+            return (top + bottom);
+        default:
+            return 0;
+        }
     }
-}
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Navigation.cpp b/module-gui/gui/widgets/Navigation.cpp
index ae36cb1b6..aee9e8a5a 100644
--- a/module-gui/gui/widgets/Navigation.cpp
+++ b/module-gui/gui/widgets/Navigation.cpp
@@ -8,62 +8,66 @@
 #include "Navigation.hpp"
 #include "Item.hpp"
 
+namespace gui
+{
 
-namespace gui {
+    void Navigation::setDirectionItem(NavigationDirection direction, Item *item)
+    {
+        switch (direction) {
+        case (NavigationDirection::LEFT):
+            left = item;
+            break;
+        case (NavigationDirection::UP):
+            up = item;
+            break;
+        case (NavigationDirection::RIGHT):
+            right = item;
+            break;
+        case (NavigationDirection::DOWN):
+            down = item;
+            break;
+        }
+    }
 
-void Navigation::setDirectionItem( NavigationDirection direction, Item* item ) {
-	switch( direction ) {
-		case (NavigationDirection::LEFT ):
-			left = item;
-			break;
-		case (NavigationDirection::UP ):
-			up = item;
-			break;
-		case (NavigationDirection::RIGHT ):
-			right = item;
-			break;
-		case (NavigationDirection::DOWN ):
-			down = item;
-			break;
-	}
-}
+    void Navigation::clearDirection(const NavigationDirection direction)
+    {
+        switch (direction) {
+        case (NavigationDirection::LEFT):
+            left = nullptr;
+            break;
+        case (NavigationDirection::UP):
+            up = nullptr;
+            break;
+        case (NavigationDirection::RIGHT):
+            right = nullptr;
+            break;
+        case (NavigationDirection::DOWN):
+            down = nullptr;
+            break;
+        }
+    }
 
-void Navigation::clearDirection( const NavigationDirection direction) {
-	switch( direction ) {
-		case (NavigationDirection::LEFT ):
-			left = nullptr;
-			break;
-		case (NavigationDirection::UP ):
-			up = nullptr;
-			break;
-		case (NavigationDirection::RIGHT ):
-			right = nullptr;
-			break;
-		case (NavigationDirection::DOWN ):
-			down = nullptr;
-			break;
-	}
-}
+    Item *Navigation::getDirectionItem(const NavigationDirection direction)
+    {
+        switch (direction) {
+        case (NavigationDirection::LEFT):
+            return left;
+        case (NavigationDirection::UP):
+            return up;
+        case (NavigationDirection::RIGHT):
+            return right;
+        case (NavigationDirection::DOWN):
+            return down;
+        }
+        return nullptr;
+    }
 
-Item* Navigation::getDirectionItem( const NavigationDirection direction ) {
-	switch( direction ) {
-		case (NavigationDirection::LEFT ):
-			return left;
-		case (NavigationDirection::UP ):
-			return up;
-		case (NavigationDirection::RIGHT ):
-			return right;
-		case (NavigationDirection::DOWN ):
-			return down;
-	}
-	return nullptr;
-}
+    Navigation::Navigation() : left{nullptr}, up{nullptr}, right{nullptr}, down{nullptr}
+    {}
 
-Navigation::Navigation() : left{nullptr}, up{nullptr}, right{nullptr}, down{nullptr} {
-}
-
-Navigation::~Navigation() {
-	left = up = right = down = nullptr;
-}
+    Navigation::~Navigation()
+    {
+        left = up = right = down = nullptr;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Navigation.hpp b/module-gui/gui/widgets/Navigation.hpp
index 915124330..d7097e29e 100644
--- a/module-gui/gui/widgets/Navigation.hpp
+++ b/module-gui/gui/widgets/Navigation.hpp
@@ -11,8 +11,8 @@
 #include "../Common.hpp"
 #include "Item.hpp"
 
-
-namespace gui {
+namespace gui
+{
 
     class Item;
     /**
diff --git a/module-gui/gui/widgets/PageLayout.cpp b/module-gui/gui/widgets/PageLayout.cpp
index 54c8e47fd..f671bf8e7 100644
--- a/module-gui/gui/widgets/PageLayout.cpp
+++ b/module-gui/gui/widgets/PageLayout.cpp
@@ -4,7 +4,8 @@
 
 namespace gui
 {
-    PageLayout::PageLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h) : BoxLayout(parent, x, y, w, h)
+    PageLayout::PageLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
+        : BoxLayout(parent, x, y, w, h)
     {
         setPenWidth(style::window::default_border_no_focus_w);
         setPenFocusWidth(style::window::default_border_no_focus_w);
@@ -13,31 +14,24 @@ namespace gui
             int position = 0;
             bool handled = false;
             // first try with children and find position in pages
-            for (auto &el : children)
-            {
-                if (el->visible)
-                {
+            for (auto &el : children) {
+                if (el->visible) {
                     handled = el->onInput(inputEvent);
-                    if (handled)
-                    {
+                    if (handled) {
                         return true;
                     }
                     break;
                 }
                 ++position;
             }
-            if (inputEvent.state != InputEvent::State::keyReleasedShort)
-            {
+            if (inputEvent.state != InputEvent::State::keyReleasedShort) {
                 return false;
             }
-            if (!handled)
-            { // children didn't handle -> handle next/prev page with position
-                if (inputEvent.keyCode == gui::KeyCode::KEY_UP && position != 0)
-                {
+            if (!handled) { // children didn't handle -> handle next/prev page with position
+                if (inputEvent.keyCode == gui::KeyCode::KEY_UP && position != 0) {
                     return switchPage(position - 1, true);
                 }
-                if (inputEvent.keyCode == gui::KeyCode::KEY_DOWN && position < children.size() - 1)
-                {
+                if (inputEvent.keyCode == gui::KeyCode::KEY_DOWN && position < children.size() - 1) {
                     return switchPage(position + 1);
                 }
             }
@@ -46,8 +40,7 @@ namespace gui
     }
 
     PageLayout::PageLayout(Item *parent, const BoundingBox &box) : PageLayout(parent, box.x, box.y, box.w, box.h)
-    {
-    }
+    {}
 
     VBox *PageLayout::addPage()
     {
@@ -58,35 +51,29 @@ namespace gui
         el->setRadius(0);
         // if new element fits && To avoid cyclic addWidget -> call parent addWidget
         BoxLayout::addWidget(el);
-        if (el->visible)
-        {
+        if (el->visible) {
             return el;
         }
-        else
-        {
+        else {
             return nullptr;
         }
     }
 
     void PageLayout::addWidget(Item *item)
     {
-        if (this->children.size() == 0)
-        {
+        if (this->children.size() == 0) {
             // cant add this element to this paged view at all
-            if (addPage() == nullptr)
-            {
+            if (addPage() == nullptr) {
                 return;
             }
         }
         auto el = dynamic_cast<VBox *>(children.back());
         el->addWidget(item);
-        if (!item->visible)
-        {
+        if (!item->visible) {
             el->removeWidget(item);
             item->visible = true;
             // add next page and try again - first set last box to not visible to avoid it's rebuild
-            if (!addPage())
-            {
+            if (!addPage()) {
                 return;
             }
             // set new (next) page invisible
@@ -94,8 +81,7 @@ namespace gui
             /// to not recure on addWidget
             auto el = dynamic_cast<VBox *>(children.back());
             el->addWidget(item);
-            if (!el->visible)
-            {
+            if (!el->visible) {
                 LOG_ERROR("Child not added on 2nd try, check sizes of Page and children u try to add!");
             }
         }
@@ -104,24 +90,19 @@ namespace gui
 
     bool PageLayout::switchPage(unsigned int n, bool previous)
     {
-        if (children.size() == 0 || n >= children.size())
-        {
+        if (children.size() == 0 || n >= children.size()) {
             LOG_ERROR("Cant switch to page %d, num of pages: %d", n, children.size());
             return false;
         }
         unsigned int i = 0;
-        for (auto &el : children)
-        {
-            if (i == n)
-            {
+        for (auto &el : children) {
+            if (i == n) {
                 auto ell = dynamic_cast<VBox *>(el);
-                if (ell)
-                {
+                if (ell) {
                     ell->setVisible(true, previous);
                 }
             }
-            else
-            {
+            else {
                 el->setVisible(false);
             }
             ++i;
diff --git a/module-gui/gui/widgets/PageLayout.hpp b/module-gui/gui/widgets/PageLayout.hpp
index 28715a488..cb403bb27 100644
--- a/module-gui/gui/widgets/PageLayout.hpp
+++ b/module-gui/gui/widgets/PageLayout.hpp
@@ -9,7 +9,7 @@ namespace gui
     class PageLayout : public BoxLayout
     {
       public:
-        PageLayout() = default;
+        PageLayout()          = default;
         virtual ~PageLayout() = default;
         PageLayout(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
         PageLayout(Item *parent, const BoundingBox &box);
diff --git a/module-gui/gui/widgets/Progress.cpp b/module-gui/gui/widgets/Progress.cpp
index 832128f02..4fe9e43f4 100644
--- a/module-gui/gui/widgets/Progress.cpp
+++ b/module-gui/gui/widgets/Progress.cpp
@@ -7,85 +7,90 @@
 
 #include "Progress.hpp"
 
-namespace gui {
+namespace gui
+{
 
-Progress::Progress() : Rect() {
-	createWidgets();
-}
+    Progress::Progress() : Rect()
+    {
+        createWidgets();
+    }
 
-Progress::Progress( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h) :
-	Rect( parent, x, y, w, h ),
-	total{0},
-	current{0} {
-	setFillColor( Color{0, 0});
-	setPenWidth(2);
-	createWidgets();
-	updateDrawArea();
-}
+    Progress::Progress(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
+        : Rect(parent, x, y, w, h), total{0}, current{0}
+    {
+        setFillColor(Color{0, 0});
+        setPenWidth(2);
+        createWidgets();
+        updateDrawArea();
+    }
 
-void Progress::createWidgets() {
+    void Progress::createWidgets()
+    {
 
-	//fillRect is smaller, to avoid border overlaping
-	fillRect = new gui::Rect( this, 0, 1, widgetArea.w, widgetArea.h -2);
-	fillRect->setRadius(widgetArea.h/2-1);
-	fillRect->setFilled(true);
-	fillRect->setFillColor( Color{0, 0});
-	Rect::setRadius(widgetArea.h/2);
-}
+        // fillRect is smaller, to avoid border overlaping
+        fillRect = new gui::Rect(this, 0, 1, widgetArea.w, widgetArea.h - 2);
+        fillRect->setRadius(widgetArea.h / 2 - 1);
+        fillRect->setFilled(true);
+        fillRect->setFillColor(Color{0, 0});
+        Rect::setRadius(widgetArea.h / 2);
+    }
 
-void Progress::setTotalProgress( int value ) {
-	if( value < 0 )
-		value = 0;
+    void Progress::setTotalProgress(int value)
+    {
+        if (value < 0)
+            value = 0;
 
-	total = value;
+        total = value;
 
-	if( current > total )
-		current = total;
-}
+        if (current > total)
+            current = total;
+    }
 
-void Progress::setCurrentProgress( int value ) {
-	if( value < 0 )
-		value = 0;
-	if( value > total )
-		value = total;
-	current = value;
-}
+    void Progress::setCurrentProgress(int value)
+    {
+        if (value < 0)
+            value = 0;
+        if (value > total)
+            value = total;
+        current = value;
+    }
 
-void Progress::setCurrentPercent( int value ) {
-	int newValue = static_cast<int>((float)total*(float)value/100.0);
-	setCurrentProgress(newValue);
-}
+    void Progress::setCurrentPercent(int value)
+    {
+        int newValue = static_cast<int>((float)total * (float)value / 100.0);
+        setCurrentProgress(newValue);
+    }
 
-std::list<DrawCommand*> Progress::buildDrawList() {
+    std::list<DrawCommand *> Progress::buildDrawList()
+    {
 
-	std::list<DrawCommand*> commands;
+        std::list<DrawCommand *> commands;
 
-	if( visible == false ) {
-		return commands;
-	}
+        if (visible == false) {
+            return commands;
+        }
 
-	std::list<DrawCommand*> baseCommands = gui::Rect::buildDrawList();
-	auto it = baseCommands.begin();
+        std::list<DrawCommand *> baseCommands = gui::Rect::buildDrawList();
+        auto it                               = baseCommands.begin();
 
-	it ++;
-	CommandRectangle* fill = reinterpret_cast<CommandRectangle*>(*it);
+        it++;
+        CommandRectangle *fill = reinterpret_cast<CommandRectangle *>(*it);
 
+        uint32_t progressSize = 0;
+        progressSize          = (current * widgetArea.w) / total;
+        fill->w               = progressSize;
 
-	uint32_t progressSize = 0;
-	progressSize = (current * widgetArea.w) / total;
-	fill->w = progressSize;
+        commands.splice(commands.end(), baseCommands, it);
+        commands.splice(commands.end(), baseCommands);
 
-	commands.splice(commands.end(), baseCommands, it);
-	commands.splice(commands.end(), baseCommands);
+        return commands;
+    }
 
+    bool Progress::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
 
-	return commands;
-}
-
-bool Progress::onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) {
-
-	fillRect->setSize(newDim.w, newDim.h);
-	return true;
-}
+        fillRect->setSize(newDim.w, newDim.h);
+        return true;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Progress.hpp b/module-gui/gui/widgets/Progress.hpp
index 716c826d0..65bbd1e0c 100644
--- a/module-gui/gui/widgets/Progress.hpp
+++ b/module-gui/gui/widgets/Progress.hpp
@@ -10,52 +10,62 @@
 
 #include "Rect.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class Progress: public Rect {
-protected:
-	//Value that corresponds to 100% of the progress.
-	int total;
-	//current value of the progress.
-	int current;
-	//rectangle used to draw thick line.
-	gui::Rect* fillRect;
+    class Progress : public Rect
+    {
+      protected:
+        // Value that corresponds to 100% of the progress.
+        int total;
+        // current value of the progress.
+        int current;
+        // rectangle used to draw thick line.
+        gui::Rect *fillRect;
 
-	/**
-	 * Creates local widgets
-	 */
-	virtual void createWidgets();
-public:
-	Progress();
-	Progress( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h);
-	virtual ~Progress() {};
+        /**
+         * Creates local widgets
+         */
+        virtual void createWidgets();
 
-	/**
-	 * @brief Sets user defined value that corresponds to the progress set to 100%.
-	 */
-	virtual void setTotalProgress( int value );
-	/*
-	 * @brief Sets current progress in correspondence to the value of the total progress which is corresponding to the value of 100%.
-	 * I.e. value equal to one fourth of the total progress value will occupy 25% of the space assigned to the widget.
-	 */
-	virtual void setCurrentProgress( int value );
-	/**
-	 * Allows to set progress using values from 0 to 100. Other values are ignored.
-	 */
-	virtual void setCurrentPercent( int value );
-	/*
-	 * Returns value of the total progress.
-	 */
-	virtual int getTotalProgress() { return total; };
-	/**
-	 * @brief Returns value of the current progress.
-	 */
-	virtual int getCurrentProgress() { return current; };
+      public:
+        Progress();
+        Progress(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
+        virtual ~Progress(){};
 
-	//virtaul methods from Item
-	std::list<DrawCommand*> buildDrawList() override;
-	bool onDimensionChanged( const BoundingBox& oldDim, const BoundingBox& newDim) override;
-};
+        /**
+         * @brief Sets user defined value that corresponds to the progress set to 100%.
+         */
+        virtual void setTotalProgress(int value);
+        /*
+         * @brief Sets current progress in correspondence to the value of the total progress which is corresponding to
+         * the value of 100%. I.e. value equal to one fourth of the total progress value will occupy 25% of the space
+         * assigned to the widget.
+         */
+        virtual void setCurrentProgress(int value);
+        /**
+         * Allows to set progress using values from 0 to 100. Other values are ignored.
+         */
+        virtual void setCurrentPercent(int value);
+        /*
+         * Returns value of the total progress.
+         */
+        virtual int getTotalProgress()
+        {
+            return total;
+        };
+        /**
+         * @brief Returns value of the current progress.
+         */
+        virtual int getCurrentProgress()
+        {
+            return current;
+        };
+
+        // virtaul methods from Item
+        std::list<DrawCommand *> buildDrawList() override;
+        bool onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim) override;
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/Rect.cpp b/module-gui/gui/widgets/Rect.cpp
index 47b51200d..eca959754 100644
--- a/module-gui/gui/widgets/Rect.cpp
+++ b/module-gui/gui/widgets/Rect.cpp
@@ -13,17 +13,19 @@
 #include "Style.hpp"
 #include <log/log.hpp>
 
-namespace gui {
+namespace gui
+{
 
     Rect::Rect()
-        : borderColor(Color(0, 0)), fillColor(Color(15, 15)), penWidth{1}, penFocusWidth{1}, filled{false}, edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
+        : borderColor(Color(0, 0)), fillColor(Color(15, 15)), penWidth{1},
+          penFocusWidth{1}, filled{false}, edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
           flatEdges{RectangleFlatFlags::GUI_RECT_FLAT_NO_FLAT}, corners{RectangleCornerFlags::GUI_RECT_ALL_CORNERS},
           yaps{RectangleYapFlags::GUI_RECT_YAP_NO_YAPS}, yapSize{style::window::messages::yaps_size_default}
-    {
-    }
+    {}
 
     Rect::Rect(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h)
-        : borderColor(Color(0, 0)), fillColor(Color(15, 15)), penWidth{1}, penFocusWidth{1}, filled{false}, edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
+        : borderColor(Color(0, 0)), fillColor(Color(15, 15)), penWidth{1},
+          penFocusWidth{1}, filled{false}, edges{RectangleEdgeFlags::GUI_RECT_ALL_EDGES},
           flatEdges{RectangleFlatFlags::GUI_RECT_FLAT_NO_FLAT}, corners{RectangleCornerFlags::GUI_RECT_ALL_CORNERS},
           yaps{RectangleYapFlags::GUI_RECT_YAP_NO_YAPS}, yapSize{style::window::messages::yaps_size_default}
     {
@@ -36,115 +38,118 @@ namespace gui {
         setSize(w, h);
 
         this->parent = parent;
-        if (parent)
-        {
+        if (parent) {
             parent->addWidget(this);
         }
-}
-
-Rect::~Rect() {
-}
-
-void Rect::setFillColor( const Color& color ) {
-	fillColor = color;
-}
-
-void Rect::setBorderColor( const Color& color ) {
-	borderColor = color;
-}
-void Rect::setPenWidth( uint8_t width ) {
-	penWidth = width;
-}
-void Rect::setPenFocusWidth( uint8_t width ) {
-	penFocusWidth = width;
-}
-
-void Rect::setEdges( RectangleEdgeFlags edges ) {
-	this->edges = edges;
-}
-void Rect::setCorners( RectangleCornerFlags corners ) {
-	this->corners = corners;
-}
-
-void Rect::setFlat( RectangleFlatFlags flats)
-{
-	flatEdges = flats;
-}
-
-void Rect::setFilled( bool val ) {
-	filled = val;
-}
-
-void Rect::setYaps(RectangleYapFlags yaps)
-{
-    this->yaps = yaps;
-    if (yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT | RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT))
-    {
-        innerMargins.left = yapSize;
     }
-    else
+
+    Rect::~Rect()
+    {}
+
+    void Rect::setFillColor(const Color &color)
     {
-        innerMargins.left = 0;
+        fillColor = color;
     }
-    if (yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT | RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT))
+
+    void Rect::setBorderColor(const Color &color)
     {
-        innerMargins.right = yapSize;
+        borderColor = color;
     }
-    else
+    void Rect::setPenWidth(uint8_t width)
     {
-        innerMargins.right = 0;
+        penWidth = width;
+    }
+    void Rect::setPenFocusWidth(uint8_t width)
+    {
+        penFocusWidth = width;
     }
-}
 
-void Rect::setYapSize(unsigned short value)
-{
-    yapSize = value;
-}
+    void Rect::setEdges(RectangleEdgeFlags edges)
+    {
+        this->edges = edges;
+    }
+    void Rect::setCorners(RectangleCornerFlags corners)
+    {
+        this->corners = corners;
+    }
 
-std::list<DrawCommand*> Rect::buildDrawList() {
+    void Rect::setFlat(RectangleFlatFlags flats)
+    {
+        flatEdges = flats;
+    }
 
-	std::list<DrawCommand*> commands;
+    void Rect::setFilled(bool val)
+    {
+        filled = val;
+    }
 
-	//check if widget is visible
-	if( visible == false ) {
-		return commands;
-	}
+    void Rect::setYaps(RectangleYapFlags yaps)
+    {
+        this->yaps = yaps;
+        if (yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_LEFT | RectangleYapFlags::GUI_RECT_YAP_TOP_LEFT)) {
+            innerMargins.left = yapSize;
+        }
+        else {
+            innerMargins.left = 0;
+        }
+        if (yaps & (RectangleYapFlags::GUI_RECT_YAP_BOTTOM_RIGHT | RectangleYapFlags::GUI_RECT_YAP_TOP_RIGHT)) {
+            innerMargins.right = yapSize;
+        }
+        else {
+            innerMargins.right = 0;
+        }
+    }
 
-	//get children draw commands
-	std::list<DrawCommand*> childrenCommands = Item::buildDrawList();
+    void Rect::setYapSize(unsigned short value)
+    {
+        yapSize = value;
+    }
 
-	//set local draw commands
-	CommandRectangle* rect = new CommandRectangle();
+    std::list<DrawCommand *> Rect::buildDrawList()
+    {
 
-	rect->x = drawArea.x;
-	rect->y = drawArea.y;
-	rect->w = drawArea.w;
-	rect->h = drawArea.h;
-	rect->areaX = widgetArea.x;
-	rect->areaY = widgetArea.y;
-	rect->areaW = widgetArea.w;
-	rect->areaH = widgetArea.h;
-	rect->corners = corners;
-	rect->flatEdges = this->flatEdges;
-	rect->edges =  edges;
-	rect->yaps = yaps;
-	rect->yapSize = yapSize;
-    rect->radius = radius;
-	if( focus )
-		rect->penWidth = penFocusWidth;
-	else
-		rect->penWidth = penWidth;
+        std::list<DrawCommand *> commands;
 
-	rect->filled = filled;
-	rect->borderColor = borderColor;
-	rect->fillColor = fillColor;
+        // check if widget is visible
+        if (visible == false) {
+            return commands;
+        }
 
-	commands.push_back( rect );
+        // get children draw commands
+        std::list<DrawCommand *> childrenCommands = Item::buildDrawList();
 
-	if( !childrenCommands.empty() )
-		commands.insert( commands.end(), childrenCommands.begin(), childrenCommands.end());
+        // set local draw commands
+        CommandRectangle *rect = new CommandRectangle();
 
-	return commands;
-}
+        rect->x         = drawArea.x;
+        rect->y         = drawArea.y;
+        rect->w         = drawArea.w;
+        rect->h         = drawArea.h;
+        rect->areaX     = widgetArea.x;
+        rect->areaY     = widgetArea.y;
+        rect->areaW     = widgetArea.w;
+        rect->areaH     = widgetArea.h;
+        rect->corners   = corners;
+        rect->flatEdges = this->flatEdges;
+        rect->edges     = edges;
+        rect->yaps      = yaps;
+        rect->yapSize   = yapSize;
+        rect->radius    = radius;
+        if (focus)
+            rect->penWidth = penFocusWidth;
+        else
+            rect->penWidth = penWidth;
+
+        rect->filled      = filled;
+        rect->borderColor = borderColor;
+        rect->fillColor   = fillColor;
+
+        commands.push_back(rect);
+
+        if (!childrenCommands.empty())
+            commands.insert(commands.end(), childrenCommands.begin(), childrenCommands.end());
+
+        return commands;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Rect.hpp b/module-gui/gui/widgets/Rect.hpp
index 3ce126733..1a3468446 100644
--- a/module-gui/gui/widgets/Rect.hpp
+++ b/module-gui/gui/widgets/Rect.hpp
@@ -13,51 +13,52 @@
 #include "Item.hpp"
 #include "../core/Color.hpp"
 
-namespace gui {
+namespace gui
+{
 
-class Rect: public Item {
-public:
-	//defines color used for drawing border
-	Color borderColor;
-	//defines color for filling rectangle
-	Color fillColor;
-	//defines number of pixels used to draw border of rectangle without focus
-	uint8_t penWidth;
-	//defines number of pixels used to draw border of rectangle when it has focus
-	uint8_t penFocusWidth;
-	//defines whether rectangle should be filled with fill color.
-	bool filled;
-	//flags that defines whether paint given border
-	RectangleEdgeFlags edges;
-	//flags that defines which edge should be flat. This will disable roundness on both sides of the edge.
-	RectangleFlatFlags flatEdges;
-	//flags that defines whether paint given corner (only for rounded corners)
-	RectangleCornerFlags corners;
-	//flags that define whether to paint japs. small protrusions indicating a speech bubble
-	RectangleYapFlags yaps;
-    // a yap size (if present). size is horizontal width.
-    unsigned short yapSize = 0;
+    class Rect : public Item
+    {
+      public:
+        // defines color used for drawing border
+        Color borderColor;
+        // defines color for filling rectangle
+        Color fillColor;
+        // defines number of pixels used to draw border of rectangle without focus
+        uint8_t penWidth;
+        // defines number of pixels used to draw border of rectangle when it has focus
+        uint8_t penFocusWidth;
+        // defines whether rectangle should be filled with fill color.
+        bool filled;
+        // flags that defines whether paint given border
+        RectangleEdgeFlags edges;
+        // flags that defines which edge should be flat. This will disable roundness on both sides of the edge.
+        RectangleFlatFlags flatEdges;
+        // flags that defines whether paint given corner (only for rounded corners)
+        RectangleCornerFlags corners;
+        // flags that define whether to paint japs. small protrusions indicating a speech bubble
+        RectangleYapFlags yaps;
+        // a yap size (if present). size is horizontal width.
+        unsigned short yapSize = 0;
 
-  public:
+      public:
+        Rect();
+        Rect(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h);
+        virtual ~Rect();
 
-	Rect();
-	Rect( Item* parent, const uint32_t& x, const uint32_t& y, const uint32_t& w, const uint32_t& h);
-	virtual ~Rect();
+        void setFillColor(const Color &color);
+        void setBorderColor(const Color &color);
+        void setPenWidth(uint8_t width);
+        void setPenFocusWidth(uint8_t width);
+        void setEdges(RectangleEdgeFlags edges);
+        void setCorners(RectangleCornerFlags corners);
+        void setFlat(RectangleFlatFlags flats);
+        virtual void setYaps(RectangleYapFlags yaps);
+        virtual void setYapSize(unsigned short value);
+        void setFilled(bool val);
 
-	void setFillColor( const Color& color );
-	void setBorderColor( const Color& color );
-	void setPenWidth( uint8_t width );
-	void setPenFocusWidth( uint8_t width );
-	void setEdges( RectangleEdgeFlags edges );
-	void setCorners( RectangleCornerFlags corners );
-	void setFlat( RectangleFlatFlags flats);
-    virtual void setYaps(RectangleYapFlags yaps);
-    virtual void setYapSize(unsigned short value);
-    void setFilled( bool val );
-
-	//virtaul methods
-	std::list<DrawCommand*> buildDrawList();
-};
+        // virtaul methods
+        std::list<DrawCommand *> buildDrawList();
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/Span.hpp b/module-gui/gui/widgets/Span.hpp
index c59c51ffa..ae22237c4 100644
--- a/module-gui/gui/widgets/Span.hpp
+++ b/module-gui/gui/widgets/Span.hpp
@@ -13,13 +13,12 @@ namespace gui
         Span(Axis axis, unsigned int size) : axis(axis)
         {
             area().size(axis) = size;
-            activeItem = false;
+            activeItem        = false;
         }
 
         Span(Item *parent, Axis axis, unsigned int size) : Span(axis, size)
         {
-            if (parent)
-            {
+            if (parent) {
                 parent->addWidget(this);
             }
         }
diff --git a/module-gui/gui/widgets/Style.cpp b/module-gui/gui/widgets/Style.cpp
index 5a0df4fc6..127e10a2c 100644
--- a/module-gui/gui/widgets/Style.cpp
+++ b/module-gui/gui/widgets/Style.cpp
@@ -1,32 +1,33 @@
 #include "Style.hpp"
 #include <Label.hpp>
 
-namespace style::window {
-
-void decorate(gui::Label *el)
+namespace style::window
 {
-    if (el == nullptr) {
-        return;
-    }
-    el->setPenWidth(default_border_no_focus_w);
-    el->setPenFocusWidth(default_border_focucs_w);
-    el->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-    el->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
-}
 
-void decorateOption(gui::Label *el)
-{
-    if (el == nullptr) {
-        return;
+    void decorate(gui::Label *el)
+    {
+        if (el == nullptr) {
+            return;
+        }
+        el->setPenWidth(default_border_no_focus_w);
+        el->setPenFocusWidth(default_border_focucs_w);
+        el->setEdges(gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+        el->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_CENTER));
     }
-    decorate(el);
-    el->setMargins(gui::Margins(10, 0, 20, 0));
-    el->setFilled(false);
-    el->setFont(style::window::font::big);
-    /// actual design values in px
-    el->widgetArea.w = style::window_width - 3 * 20;
-    el->widgetArea.x = 20;
-    el->widgetArea.h = style::window::label::big_h;
-}
 
-};  // namespace style::window::label
+    void decorateOption(gui::Label *el)
+    {
+        if (el == nullptr) {
+            return;
+        }
+        decorate(el);
+        el->setMargins(gui::Margins(10, 0, 20, 0));
+        el->setFilled(false);
+        el->setFont(style::window::font::big);
+        /// actual design values in px
+        el->widgetArea.w = style::window_width - 3 * 20;
+        el->widgetArea.x = 20;
+        el->widgetArea.h = style::window::label::big_h;
+    }
+
+}; // namespace style::window
diff --git a/module-gui/gui/widgets/Style.hpp b/module-gui/gui/widgets/Style.hpp
index 8f4a6633c..9b2f21cf3 100644
--- a/module-gui/gui/widgets/Style.hpp
+++ b/module-gui/gui/widgets/Style.hpp
@@ -11,41 +11,46 @@ namespace gui
 };
 
 /// one place to gather all common magical numbers from design
-namespace style {
-const inline uint32_t window_height = 600;
-const inline uint32_t window_width  = 480;
-namespace header {
-namespace font {
-const inline std::string time  = "gt_pressura_regular_24";
-const inline std::string title = "gt_pressura_bold_32";
-};  // namespace font
-};  // namespace header
-namespace window {
-const inline uint32_t default_left_margin = 30;
-const inline uint32_t default_right_margin = 30;
-const inline uint32_t default_border_focucs_w   = 2;
-const inline uint32_t default_border_no_focus_w = 0;
-namespace font {
-    const inline std::string supersizeme = "gt_pressura_light_90";
-    const inline std::string verybig = "gt_pressura_light_46";
-    const inline std::string bigbold = "gt_pressura_bold_30";
-    const inline std::string big = "gt_pressura_regular_30";
-    const inline std::string biglight = "gt_pressura_light_30";
-    const inline std::string mediumbold = "gt_pressura_bold_27";
-    const inline std::string medium = "gt_pressura_regular_27";
-    const inline std::string small = "gt_pressura_regular_24";
-    const inline std::string verysmall = "gt_pressura_regular_20";
-    const inline std::string tiny = "gt_pressura_regular_16";
-    const inline std::string tinybold = "gt_pressura_bold_16";
-    const inline std::string tinylight = "gt_pressura_light_16";
-};  // namespace font
+namespace style
+{
+    const inline uint32_t window_height = 600;
+    const inline uint32_t window_width  = 480;
+    namespace header
+    {
+        namespace font
+        {
+            const inline std::string time  = "gt_pressura_regular_24";
+            const inline std::string title = "gt_pressura_bold_32";
+        }; // namespace font
+    };     // namespace header
+    namespace window
+    {
+        const inline uint32_t default_left_margin       = 30;
+        const inline uint32_t default_right_margin      = 30;
+        const inline uint32_t default_border_focucs_w   = 2;
+        const inline uint32_t default_border_no_focus_w = 0;
+        namespace font
+        {
+            const inline std::string supersizeme = "gt_pressura_light_90";
+            const inline std::string verybig     = "gt_pressura_light_46";
+            const inline std::string bigbold     = "gt_pressura_bold_30";
+            const inline std::string big         = "gt_pressura_regular_30";
+            const inline std::string biglight    = "gt_pressura_light_30";
+            const inline std::string mediumbold  = "gt_pressura_bold_27";
+            const inline std::string medium      = "gt_pressura_regular_27";
+            const inline std::string small       = "gt_pressura_regular_24";
+            const inline std::string verysmall   = "gt_pressura_regular_20";
+            const inline std::string tiny        = "gt_pressura_regular_16";
+            const inline std::string tinybold    = "gt_pressura_bold_16";
+            const inline std::string tinylight   = "gt_pressura_light_16";
+        }; // namespace font
 
-const inline uint32_t list_offset_default = 12;
+        const inline uint32_t list_offset_default = 12;
         namespace label
         {
-            const inline uint32_t small_h = 33;
+            const inline uint32_t small_h   = 33;
             const inline uint32_t default_h = 50;
-            const inline uint32_t big_h = 55;
+            const inline uint32_t big_h     = 55;
         }; // namespace label
 
         /// minimal label decoration - edges, focus & alignment
@@ -53,43 +58,46 @@ const inline uint32_t list_offset_default = 12;
         /// minimal label decoration for Option
         void decorateOption(gui::Label *el);
 
-namespace messages
-{
-    inline const uint32_t sms_radius = 7;
-    inline const uint32_t sms_border_no_focus = 1;
-    /// TODO 100 is static size, sms elements should have size depending on text amount
-    inline const uint32_t sms_height = 100;
-    const inline unsigned short yaps_size_default = 10;
-    const inline unsigned short sms_max_width = 320;
-    const inline unsigned short sms_h_padding = 15;
-    const inline unsigned short sms_v_padding = 10;
-    const inline unsigned short sms_vertical_spacer = 10;
-} // namespace messages
+        namespace messages
+        {
+            inline const uint32_t sms_radius          = 7;
+            inline const uint32_t sms_border_no_focus = 1;
+            /// TODO 100 is static size, sms elements should have size depending on text amount
+            inline const uint32_t sms_height                = 100;
+            const inline unsigned short yaps_size_default   = 10;
+            const inline unsigned short sms_max_width       = 320;
+            const inline unsigned short sms_h_padding       = 15;
+            const inline unsigned short sms_v_padding       = 10;
+            const inline unsigned short sms_vertical_spacer = 10;
+        } // namespace messages
 
-};  // namespace window
-namespace footer {
-namespace font {
-const inline std::string bold   = "gt_pressura_bold_24";
-const inline std::string medium = "gt_pressura_regular_24";
-};  // namespace font
-};  // namespace footer
-namespace settings
-{
-    namespace date
+    }; // namespace window
+    namespace footer
     {
-        const inline uint32_t date_time_item_height = 107;
-        const inline uint32_t date_time_item_width = 120;
-        const inline uint32_t date_time_item_title_height = 30;
-        const inline uint32_t date_time_spacer_width = 20;
-        const inline uint32_t date_time_x_offset = 30;
-    } // namespace date
-} // namespace settings
-namespace color
-{
-const inline gui::Color lightgrey = gui::Color(3, 0);
-}; //  namespace color
-namespace text
-{
-const inline gui::Alignment defaultTextAlignment = gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM);
-};
-};  // namespace style
+        namespace font
+        {
+            const inline std::string bold   = "gt_pressura_bold_24";
+            const inline std::string medium = "gt_pressura_regular_24";
+        }; // namespace font
+    };     // namespace footer
+    namespace settings
+    {
+        namespace date
+        {
+            const inline uint32_t date_time_item_height       = 107;
+            const inline uint32_t date_time_item_width        = 120;
+            const inline uint32_t date_time_item_title_height = 30;
+            const inline uint32_t date_time_spacer_width      = 20;
+            const inline uint32_t date_time_x_offset          = 30;
+        } // namespace date
+    }     // namespace settings
+    namespace color
+    {
+        const inline gui::Color lightgrey = gui::Color(3, 0);
+    }; //  namespace color
+    namespace text
+    {
+        const inline gui::Alignment defaultTextAlignment =
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_BOTTOM);
+    };
+}; // namespace style
diff --git a/module-gui/gui/widgets/Text.cpp b/module-gui/gui/widgets/Text.cpp
index 23ed3686f..49b714716 100644
--- a/module-gui/gui/widgets/Text.cpp
+++ b/module-gui/gui/widgets/Text.cpp
@@ -18,1122 +18,1109 @@
 namespace gui
 {
 
-Text::TextLine::TextLine(const UTF8 &text, uint32_t startIndex, uint32_t endIndex, Text::LineEndType endType, uint32_t pixelLength)
-    : text{text}, startIndex{startIndex}, endIndex{endIndex}, endType{endType}, pixelLength{pixelLength}
-{
-}
+    Text::TextLine::TextLine(
+        const UTF8 &text, uint32_t startIndex, uint32_t endIndex, Text::LineEndType endType, uint32_t pixelLength)
+        : text{text}, startIndex{startIndex}, endIndex{endIndex}, endType{endType}, pixelLength{pixelLength}
+    {}
 
-Text::Text()
-{
-    setPenWidth(1);
-    setPenFocusWidth(3);
-    uint32_t fontID = FontManager::getInstance().getFontID(style::window::font::small);
-    font = FontManager::getInstance().getFont(fontID);
+    Text::Text()
+    {
+        setPenWidth(1);
+        setPenFocusWidth(3);
+        uint32_t fontID = FontManager::getInstance().getFontID(style::window::font::small);
+        font            = FontManager::getInstance().getFont(fontID);
 
-    cursor = new Rect(this, 0, 0, 1, 1);
-    cursor->setFilled(true);
-    cursor->setVisible(false);
+        cursor = new Rect(this, 0, 0, 1, 1);
+        cursor->setFilled(true);
+        cursor->setVisible(false);
 
-    // insert first empty text line
-    textLines.push_back(new TextLine(UTF8(""), 0, 0, LineEndType::EOT, 0));
-    firstLine = textLines.begin();
-    lastLine = textLines.begin();
-    setBorderColor(gui::ColorFullBlack);
-    setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
-    updateCursor();
-}
-
-Text::Text(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, const UTF8 &text, ExpandMode expandMode, TextType textType)
-    : Rect(parent, x, y, w, h), expandMode{expandMode}, textType{textType}
-{
-
-    setPenWidth(style::window::default_border_no_focus_w);
-    setPenFocusWidth(style::window::default_border_focucs_w);
-    uint32_t fontID = FontManager::getInstance().getFontID(style::window::font::small);
-    font = FontManager::getInstance().getFont(fontID);
-
-    cursor = new Rect(this, 0, 0, 1, 1);
-    cursor->setFilled(true);
-    cursor->setVisible(false);
-
-    if(text.length()) {
-        splitTextToLines(text);
-    } else {
+        // insert first empty text line
         textLines.push_back(new TextLine(UTF8(""), 0, 0, LineEndType::EOT, 0));
         firstLine = textLines.begin();
-        lastLine = textLines.begin();
+        lastLine  = textLines.begin();
+        setBorderColor(gui::ColorFullBlack);
+        setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
+        updateCursor();
     }
-    setBorderColor(gui::ColorFullBlack);
-    setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
-    // TODO this is bad - cursorColumn is badly handled on newline etc.
-    cursorColumn += text.length();
-    updateCursor();
-}
 
-Text::~Text()
-{
-    // if there are text lines erase them.
-    if (!textLines.empty())
+    Text::Text(Item *parent,
+               const uint32_t &x,
+               const uint32_t &y,
+               const uint32_t &w,
+               const uint32_t &h,
+               const UTF8 &text,
+               ExpandMode expandMode,
+               TextType textType)
+        : Rect(parent, x, y, w, h), expandMode{expandMode}, textType{textType}
     {
-        while (!textLines.empty())
-        {
-            delete textLines.front();
-            textLines.pop_front();
+
+        setPenWidth(style::window::default_border_no_focus_w);
+        setPenFocusWidth(style::window::default_border_focucs_w);
+        uint32_t fontID = FontManager::getInstance().getFontID(style::window::font::small);
+        font            = FontManager::getInstance().getFont(fontID);
+
+        cursor = new Rect(this, 0, 0, 1, 1);
+        cursor->setFilled(true);
+        cursor->setVisible(false);
+
+        if (text.length()) {
+            splitTextToLines(text);
         }
+        else {
+            textLines.push_back(new TextLine(UTF8(""), 0, 0, LineEndType::EOT, 0));
+            firstLine = textLines.begin();
+            lastLine  = textLines.begin();
+        }
+        setBorderColor(gui::ColorFullBlack);
+        setEdges(RectangleEdgeFlags::GUI_RECT_ALL_EDGES);
+        // TODO this is bad - cursorColumn is badly handled on newline etc.
+        cursorColumn += text.length();
+        updateCursor();
     }
-    textLines.clear();
-    if(mode) {
-        delete mode;
-    }
-}
 
-void Text::setYaps(RectangleYapFlags yaps)
-{
-    Rect::setYaps(yaps);
-    recalculateDrawParams();
-}
-
-void Text::setEditMode(EditMode mode)
-{
-    editMode = mode;
-    if (mode == EditMode::BROWSE) cursor->setVisible(false);
-    else
+    Text::~Text()
     {
-        if (focus) cursor->setVisible(true);
-    }
-}
-
-void Text::setTextType(TextType type)
-{
-    textType = type;
-}
-
-void Text::setUnderline(bool underline)
-{
-    // do nothing, value of the flag doesn;t change
-    if (this->underline == underline) return;
-
-    this->underline = underline;
-    // LOG_INFO("lines count: %d", labelLines.size());
-    for (auto it = labelLines.begin(); it != labelLines.end(); it++)
-    {
-
-        gui::Label *label = *it;
-        if (this->underline) label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-        else
-            label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-    }
-}
-
-void Text::setNavigationBarrier(const NavigationBarrier &barrier, bool value)
-{
-    if (value) barriers |= static_cast<uint32_t>(barrier);
-    else
-        barriers &= ~(static_cast<uint32_t>(barrier));
-}
-
-void Text::setCursorWidth(uint32_t w)
-{
-    cursorWidth = w;
-}
-
-void Text::setText(const UTF8 &text)
-{
-    clear();
-    cursorRow = 0;
-    cursorColumn = 0;
-    if (text.length() > 0)
-    {
-        // erase default empty line
-        delete textLines.front();
-        textLines.pop_front();
+        // if there are text lines erase them.
+        if (!textLines.empty()) {
+            while (!textLines.empty()) {
+                delete textLines.front();
+                textLines.pop_front();
+            }
+        }
         textLines.clear();
-        // split and add new lines
-        splitTextToLines(text);
+        if (mode) {
+            delete mode;
+        }
     }
-    recalculateDrawParams();
-    updateCursor();
-}
 
-void Text::setTextColor(Color color)
-{
-    textColor = color;
-    for (auto line : labelLines)
+    void Text::setYaps(RectangleYapFlags yaps)
     {
-        line->setTextColor(color);
+        Rect::setYaps(yaps);
+        recalculateDrawParams();
     }
-}
 
-void Text::clear()
-{
-    // if there are text lines erase them.
-    if (!textLines.empty())
+    void Text::setEditMode(EditMode mode)
     {
-        while (!textLines.empty())
-        {
+        editMode = mode;
+        if (mode == EditMode::BROWSE)
+            cursor->setVisible(false);
+        else {
+            if (focus)
+                cursor->setVisible(true);
+        }
+    }
+
+    void Text::setTextType(TextType type)
+    {
+        textType = type;
+    }
+
+    void Text::setUnderline(bool underline)
+    {
+        // do nothing, value of the flag doesn;t change
+        if (this->underline == underline)
+            return;
+
+        this->underline = underline;
+        // LOG_INFO("lines count: %d", labelLines.size());
+        for (auto it = labelLines.begin(); it != labelLines.end(); it++) {
+
+            gui::Label *label = *it;
+            if (this->underline)
+                label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+            else
+                label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+        }
+    }
+
+    void Text::setNavigationBarrier(const NavigationBarrier &barrier, bool value)
+    {
+        if (value)
+            barriers |= static_cast<uint32_t>(barrier);
+        else
+            barriers &= ~(static_cast<uint32_t>(barrier));
+    }
+
+    void Text::setCursorWidth(uint32_t w)
+    {
+        cursorWidth = w;
+    }
+
+    void Text::setText(const UTF8 &text)
+    {
+        clear();
+        cursorRow    = 0;
+        cursorColumn = 0;
+        if (text.length() > 0) {
+            // erase default empty line
             delete textLines.front();
             textLines.pop_front();
+            textLines.clear();
+            // split and add new lines
+            splitTextToLines(text);
+        }
+        recalculateDrawParams();
+        updateCursor();
+    }
+
+    void Text::setTextColor(Color color)
+    {
+        textColor = color;
+        for (auto line : labelLines) {
+            line->setTextColor(color);
         }
     }
-    textLines.clear();
-    // insert first empty text line
-    textLines.push_back(new TextLine(UTF8(""), 0, 0, LineEndType::EOT, 0));
-    firstLine = textLines.begin();
-    lastLine = textLines.begin();
-}
 
-UTF8 Text::getText()
-{
-
-    UTF8 output;
-
-    // iterate over all lines and add content from each line to output string.
-    auto it = textLines.begin();
-    while (it != textLines.end())
+    void Text::clear()
     {
-
-        auto textLine = (*it);
-        output += (*it)->text;
-        if ((*it)->endType == LineEndType::BREAK) { output.insert("\n"); }
-
-        if ((*it)->endType == LineEndType::CONTINUE_SPACE) { output.insert(" "); }
-
-        ++it;
-    }
-    return output;
-}
-
-bool Text::saveText(UTF8 path)
-{
-
-    auto file = vfs.fopen(path.c_str(), "wb");
-
-    if (file == nullptr) return false;
-
-    auto it = textLines.begin();
-
-    // iterate over all lines in text edit
-    while (it != textLines.end())
-    {
-
-        vfs.fwrite((*it)->text.c_str(), (*it)->text.used() - 1, 1, file);
-        if ((*it)->endType == LineEndType::BREAK) { vfs.fwrite("\n", 1, 1, file); }
-
-        if ((*it)->endType == LineEndType::CONTINUE_SPACE) { vfs.fwrite(" ", 1, 1, file); }
-
-        ++it;
-    }
-    // close file
-    vfs.fclose(file);
-
-    return true;
-}
-
-void Text::setFont(const UTF8 &fontName)
-{
-
-    uint32_t fontID = FontManager::getInstance().getFontID(fontName.c_str());
-    Font *newFont = FontManager::getInstance().getFont(fontID);
-    if (newFont != nullptr)
-    {
-        font = newFont;
-        //		calculateDisplayText();
-    }
-    else
-    {
-        LOG_ERROR("Font not found");
-    }
-    recalculateDrawParams();
-}
-
-void Text::splitTextToLines(const UTF8 &text)
-{
-
-    if (text.length() == 0)
-    {
-        if (textLines.size() == 0)
-        {
-            firstLine = textLines.end();
-            lastLine = textLines.end();
-        }
-        return;
-    }
-
-    // copy provided text to internal buffer
-    uint32_t index = 0;
-    uint32_t totalLength = text.length();
-
-    uint32_t availableSpace = getAvailableHPixelSpace();
-
-    while (index < totalLength)
-    {
-
-        UTF8 textCopy = text.substr(index, totalLength - index);
-        // find how many character fit in the widget's width
-        // this doesnt include any line breaking conditinos like enter or space because line is too long
-        uint32_t spaceConsumed = 0;
-        uint32_t charCount = font->getCharCountInSpace(textCopy, availableSpace, spaceConsumed);
-        UTF8 tmpText = textCopy.substr(0, charCount);
-
-        // some default values
-        uint32_t startIndex = 0;
-        uint32_t endIndex = totalLength;
-        LineEndType lineEndType = LineEndType::EOT;
-
-        // check if this is not the end of the text
-        if (index + charCount == totalLength)
-        {
-            // try to find first enter.
-            uint32_t enterIndex = tmpText.find("\n", 0);
-            if (enterIndex != UTF8::npos)
-            {
-                endIndex = index + enterIndex;
-                index += enterIndex + 1;
-                lineEndType = LineEndType::BREAK;
-                textLines.push_back(
-                    new TextLine(tmpText.substr(0, enterIndex), startIndex, endIndex, lineEndType, font->getPixelWidth(tmpText.substr(0, enterIndex))));
-                //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-            } // no enter found last line can be copied as a whole.
-            else
-            {
-                startIndex = index;
-                endIndex = totalLength;
-                textLines.push_back(new TextLine(tmpText, startIndex, endIndex, lineEndType, spaceConsumed));
-                //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-                index += charCount;
+        // if there are text lines erase them.
+        if (!textLines.empty()) {
+            while (!textLines.empty()) {
+                delete textLines.front();
+                textLines.pop_front();
             }
         }
-        // if it wasn't the last line search for enter or space and break the line on it.
-        else
-        {
-
-            startIndex = index;
-
-            // try to find first enter.
-            uint32_t enterIndex = tmpText.find("\n", 0);
-            if (enterIndex != UTF8::npos)
-            {
-                endIndex = index + enterIndex;
-                index += enterIndex + 1;
-                lineEndType = LineEndType::BREAK;
-                textLines.push_back(new TextLine(tmpText.substr(0, enterIndex), startIndex, endIndex, lineEndType, spaceConsumed));
-                //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-            }
-            else
-            {
-                // if there was no enter look for last space in the tmpText and break line on it
-                uint32_t spaceIndex = tmpText.findLast(" ", tmpText.length() - 1);
-
-                // if there was no space take as many characters as possible and add CONTINUE ending
-                if (spaceIndex == UTF8::npos)
-                {
-                    endIndex = index + charCount;
-                    index += charCount;
-                    lineEndType = LineEndType::CONTINUE;
-                    textLines.push_back(new TextLine(tmpText, startIndex, endIndex, lineEndType, spaceConsumed));
-                    //					LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-                }
-                else
-                {
-                    lineEndType = LineEndType::CONTINUE_SPACE;
-
-                    uint32_t spaceWidth = font->getPixelWidth(" ", 0, 1);
-                    // if space is last character in string erase it and add appropriate CONTINUE_SPACE ending
-                    if (spaceIndex == tmpText.length() - 1)
-                    {
-                        endIndex = index + charCount - 1;
-                        index += charCount;
-                        textLines.push_back(
-                            new TextLine(tmpText.substr(0, tmpText.length() - 1), startIndex, endIndex, lineEndType, spaceConsumed - spaceWidth));
-                        //						LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-                    }
-                    else
-                    {
-                        endIndex = index + spaceIndex;
-                        index += spaceIndex + 1;
-                        textLines.push_back(
-                            new TextLine(tmpText.substr(0, spaceIndex), startIndex, endIndex, lineEndType, font->getPixelWidth(tmpText.substr(0, spaceIndex))));
-                        //						LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
-                    }
-                }
-            }
-        }
-
-        if (textType == TextType::SINGLE_LINE)
-        {
-            // LOG_INFO("NUMBER OF LINES: %d", textLines.size());
-            auto textLine = textLines.front();
-            textLine->endType = LineEndType::EOT;
-            break;
-        }
+        textLines.clear();
+        // insert first empty text line
+        textLines.push_back(new TextLine(UTF8(""), 0, 0, LineEndType::EOT, 0));
+        firstLine = textLines.begin();
+        lastLine  = textLines.begin();
     }
 
-    for (auto it : textLines)
+    UTF8 Text::getText()
     {
-        // LOG_INFO("text: [%s] ending: %d", it->text.c_str(), static_cast<uint32_t>(it->endType));
+
+        UTF8 output;
+
+        // iterate over all lines and add content from each line to output string.
+        auto it = textLines.begin();
+        while (it != textLines.end()) {
+
+            auto textLine = (*it);
+            output += (*it)->text;
+            if ((*it)->endType == LineEndType::BREAK) {
+                output.insert("\n");
+            }
+
+            if ((*it)->endType == LineEndType::CONTINUE_SPACE) {
+                output.insert(" ");
+            }
+
+            ++it;
+        }
+        return output;
     }
 
-    firstLine = textLines.begin();
-    lastLine = textLines.begin();
-}
-
-bool Text::splitText(UTF8 &source, UTF8 &remaining, LineEndType &endType, uint32_t availableSpace)
-{
-
-    uint32_t spaceConsumed;
-    uint32_t charCount = font->getCharCountInSpace(source, availableSpace, spaceConsumed);
-    // this is sub-string that fits available space.
-    UTF8 searchStr = source.substr(0, charCount);
-
-    // try to find first enter.
-    uint32_t enterIndex = searchStr.find("\n", 0);
-    if (enterIndex != UTF8::npos)
+    bool Text::saveText(UTF8 path)
     {
-        endType = LineEndType::BREAK;
-        remaining = source.substr(enterIndex, source.length() - 1 - enterIndex);
-        source.split(enterIndex);
-        //		LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
+
+        auto file = vfs.fopen(path.c_str(), "wb");
+
+        if (file == nullptr)
+            return false;
+
+        auto it = textLines.begin();
+
+        // iterate over all lines in text edit
+        while (it != textLines.end()) {
+
+            vfs.fwrite((*it)->text.c_str(), (*it)->text.used() - 1, 1, file);
+            if ((*it)->endType == LineEndType::BREAK) {
+                vfs.fwrite("\n", 1, 1, file);
+            }
+
+            if ((*it)->endType == LineEndType::CONTINUE_SPACE) {
+                vfs.fwrite(" ", 1, 1, file);
+            }
+
+            ++it;
+        }
+        // close file
+        vfs.fclose(file);
+
         return true;
     }
-    else
+
+    void Text::setFont(const UTF8 &fontName)
     {
-        // if there was no enter look for last space in the source and break line on it
-        uint32_t spaceIndex = searchStr.findLast(" ", searchStr.length() - 1);
 
-        // if there was no space take as many characters as possible and add CONTINUE ending
-        if (spaceIndex == UTF8::npos)
-        {
-            remaining = source.split(charCount);
-            endType = LineEndType::CONTINUE;
-            //			LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
-            return true;
+        uint32_t fontID = FontManager::getInstance().getFontID(fontName.c_str());
+        Font *newFont   = FontManager::getInstance().getFont(fontID);
+        if (newFont != nullptr) {
+            font = newFont;
+            //		calculateDisplayText();
         }
-        else
-        {
-            endType = LineEndType::CONTINUE_SPACE;
-
-            remaining = source.substr(spaceIndex + 1, source.length() - 1 - spaceIndex);
-            source.split(spaceIndex);
-            //			LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
-            return true;
+        else {
+            LOG_ERROR("Font not found");
         }
+        recalculateDrawParams();
     }
-    return false;
-}
 
-void Text::reworkLines(std::list<TextLine *>::iterator it)
-{
-
-    // iterate until end of text lines or till line that fits available space has break line ending (enter).
-    while (it != textLines.end())
+    void Text::splitTextToLines(const UTF8 &text)
     {
 
-        // if current line has BREAK of EOT line ending check if current text fits available space
-        // finish procedure
+        if (text.length() == 0) {
+            if (textLines.size() == 0) {
+                firstLine = textLines.end();
+                lastLine  = textLines.end();
+            }
+            return;
+        }
+
+        // copy provided text to internal buffer
+        uint32_t index       = 0;
+        uint32_t totalLength = text.length();
+
         uint32_t availableSpace = getAvailableHPixelSpace();
-        uint32_t consumedSpace;
 
-        if (((*it)->endType == LineEndType::BREAK) || ((*it)->endType == LineEndType::EOT))
-        {
-            consumedSpace = font->getPixelWidth((*it)->getText());
-            if (consumedSpace < availableSpace) break;
-        }
+        while (index < totalLength) {
 
-        // check if there is next line
-        auto itNext = it;
-        itNext++;
+            UTF8 textCopy = text.substr(index, totalLength - index);
+            // find how many character fit in the widget's width
+            // this doesnt include any line breaking conditinos like enter or space because line is too long
+            uint32_t spaceConsumed = 0;
+            uint32_t charCount     = font->getCharCountInSpace(textCopy, availableSpace, spaceConsumed);
+            UTF8 tmpText           = textCopy.substr(0, charCount);
 
-        UTF8 mergedLinesText = (*it)->getTextWithEnding();
+            // some default values
+            uint32_t startIndex     = 0;
+            uint32_t endIndex       = totalLength;
+            LineEndType lineEndType = LineEndType::EOT;
 
-        // if processed text line is not finished with break end type
-        if (((*it)->endType != LineEndType::BREAK) && (itNext != textLines.end()))
-        {
-
-            // merge text from two lines
-            mergedLinesText += (*itNext)->getTextWithEnding();
-            // assign end type from next line to the current line
-            (*it)->endType = (*itNext)->endType;
-
-            // remove next line as the text was taken to the current line
-            delete (*itNext);
-            textLines.erase(itNext);
-        }
-
-        LineEndType endType;
-        UTF8 remainingText;
-        bool splitFlag = splitText(mergedLinesText, remainingText, endType, availableSpace);
-
-        // if there was a split update current and next item in the list
-        if (splitFlag)
-        {
-
-            (*it)->text = std::move(mergedLinesText);
-            (*it)->pixelLength = font->getPixelWidth((*it)->getText());
-
-            itNext = it;
-            itNext++;
-            textLines.insert(itNext, new TextLine(remainingText, 0, remainingText.length(), (*it)->endType, font->getPixelWidth(remainingText)));
-
-            (*it)->endType = endType;
-        }
-
-        // proceed to next line
-        it++;
-    }
-
-    // TODO starting from first modified line up to last modified line update start and end index
-}
-
-std::list<DrawCommand *> Text::buildDrawList()
-{
-    return Rect::buildDrawList();
-}
-void Text::setPosition(const short &x, const short &y)
-{
-    Rect::setPosition(x, y);
-    recalculateDrawParams();
-    updateCursor();
-}
-
-void Text::setSize(const unsigned short w, const unsigned short h)
-{
-    Rect::setSize(w, h);
-    recalculateDrawParams();
-    updateCursor();
-}
-
-bool Text::onInput(const InputEvent &inputEvent)
-{
-    bool res = false;
-
-    if (inputEvent.state == InputEvent::State::keyReleasedLong && inputEvent.keyCode == gui::KeyCode::KEY_AST)
-    {
-        if (mode)
-        {
-            mode->select_special_char();
-            return true;
-        }
-    }
-
-    // handle navigation
-    if (inputEvent.state == InputEvent::State::keyReleasedShort && ((inputEvent.keyCode == KeyCode::KEY_LEFT) || (inputEvent.keyCode == KeyCode::KEY_RIGHT) ||
-                                                                    (inputEvent.keyCode == KeyCode::KEY_UP) || (inputEvent.keyCode == KeyCode::KEY_DOWN)))
-    {
-        switch (editMode)
-        {
-        case EditMode::BROWSE:
-            res = handleBrowsing(inputEvent);
-            break;
-        case EditMode::EDIT:
-            res = handleNavigation(inputEvent);
-            break;
-        case EditMode::SCROLL:
-            LOG_DEBUG("TODO");
-            res = false;
-            break;
-        }
-
-        if (res && editMode != EditMode::SCROLL)
-            updateCursor();
-        return res;
-    }
-
-    // translate and store keypress
-    uint32_t code = translator.handle(inputEvent.key, mode ? mode->get() : "");
-
-    /// handling of key removal
-    if (inputEvent.keyCode == gui::KeyCode::KEY_PND)
-    {
-        // longpress -> remove all characters
-        if (inputEvent.state == InputEvent::State::keyReleasedLong)
-        {
-            // TODO handle longpress remove key
-        }
-        // shortpress remove characters n time for multipress, one time for normal press
-        else if (inputEvent.state == InputEvent::State::keyReleasedShort)
-        {
-            auto char_rm = [=](bool &res) {
-                res = handleBackspace();
-                if (res)
-                {
-                    updateCursor();
-                    contentCallback(*this);
-                }
-            };
-            if (translator.getTimes())
-            {
-                for (int i = 0; i < translator.getTimes(); ++i)
-                {
-                    char_rm(res);
+            // check if this is not the end of the text
+            if (index + charCount == totalLength) {
+                // try to find first enter.
+                uint32_t enterIndex = tmpText.find("\n", 0);
+                if (enterIndex != UTF8::npos) {
+                    endIndex = index + enterIndex;
+                    index += enterIndex + 1;
+                    lineEndType = LineEndType::BREAK;
+                    textLines.push_back(new TextLine(tmpText.substr(0, enterIndex),
+                                                     startIndex,
+                                                     endIndex,
+                                                     lineEndType,
+                                                     font->getPixelWidth(tmpText.substr(0, enterIndex))));
+                    //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
+                } // no enter found last line can be copied as a whole.
+                else {
+                    startIndex = index;
+                    endIndex   = totalLength;
+                    textLines.push_back(new TextLine(tmpText, startIndex, endIndex, lineEndType, spaceConsumed));
+                    //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
+                    index += charCount;
                 }
             }
-            else
-            {
-                char_rm(res);
-            }
-            return res;
-        }
-    }
+            // if it wasn't the last line search for enter or space and break the line on it.
+            else {
 
-    // process only short release events
-    if (inputEvent.state != InputEvent::State::keyReleasedShort)
-    {
-        return false;
-    }
+                startIndex = index;
 
-    if (inputEvent.keyCode == gui::KeyCode::KEY_AST)
-    {
-        if (mode)
-        {
-            mode->next();
-            return true;
-        }
-    }
-
-    // it there is no key char it means that translator didn't handled the key and this key
-    if(code == 0) {
-        LOG_ERROR("Key not handled! %d", inputEvent.keyCode);
-        return false;
-    }
-
-    // get how many short presses were handled in this widget
-    if (translator.getTimes())
-    {
-        handleBackspace();
-        res = handleChar(code);
-        if (res)
-        {
-            updateCursor();
-            contentCallback(*this);
-        }
-        return res;
-    }
-
-    // if char is a new line char then create new line and move caret and return
-    if (code== 0x0A)
-    {
-        if (textType == TextType::MULTI_LINE)
-        {
-            res = handleEnter();
-            contentCallback(*this);
-        }
-    }
-    else
-    { // normal char -> add and check pixel width
-        res = handleChar(code);
-        contentCallback(*this);
-    }
-    if (res) updateCursor();
-    return res;
-}
-
-bool Text::onActivated(void *data)
-{
-    Rect::onActivated(data);
-    return false;
-}
-
-bool Text::onFocus(bool state)
-{
-    // inform on start what type of input there is
-    if (mode)
-    {
-        mode->on_focus(state);
-    }
-    bool ret = Rect::onFocus(state);
-    if (focus && editMode == EditMode::EDIT)
-    {
-        cursor->setVisible(true);
-        for (auto it = labelLines.begin(); it != labelLines.end(); it++)
-            (*it)->setPenWidth(3);
-    }
-    else
-    {
-        cursor->setVisible(false);
-        for (auto it = labelLines.begin(); it != labelLines.end(); it++)
-            (*it)->setPenWidth(1);
-    }
-
-    return ret;
-}
-
-void Text::setRadius(int value)
-{
-    Rect::setRadius(value);
-    // if margins are smaller than radius update the margins
-    if (margins.left < value) margins.left = value;
-    if (margins.right < value) margins.right = value;
-    updateCursor();
-}
-
-bool Text::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
-{
-    Rect::onDimensionChanged(oldDim, newDim);
-    updateCursor();
-    return false;
-}
-
-bool Text::moveCursor(const NavigationDirection &direction)
-{
-
-    auto it = getCursorTextLine();
-
-    if (direction == NavigationDirection::LEFT)
-    {
-        // if we are standing on the beginning for the line move to previous line
-        if (cursorColumn == 0)
-        {
-
-            // if there is no previous line return false so window can switch focus to the item on the left.
-            if (it == textLines.begin()) { return false; }
-
-            // there is a previous line, check if cursor's row is greater than 0;
-            cursorColumn = (*std::prev(it, 1))->text.length();
-            if (cursorRow > 0) { --cursorRow; }
-            else
-            {
-                --firstLine;
-                recalculateDrawParams();
-            }
-            return true;
-        }
-        // cursor's column is greater than 0
-        else
-        {
-            --cursorColumn;
-            return true;
-        }
-    }
-    else if (direction == NavigationDirection::RIGHT)
-    {
-        // if cursor is not at the end of current line simply move curosr
-        if (cursorColumn < (*it)->text.length())
-        {
-            ++cursorColumn;
-            return true;
-        }
-        else
-        {
-            auto itNext = std::next(it, 1);
-            // if this is not the last line increment row and set column to 0
-            if (itNext != textLines.end())
-            {
-                ++cursorRow;
-                cursorColumn = 0;
-
-                // if increased row is out of visible are increment first line
-                if (cursorRow >= visibleRows)
-                {
-                    firstLine++;
-                    recalculateDrawParams();
-                    cursorRow = visibleRows - 1;
+                // try to find first enter.
+                uint32_t enterIndex = tmpText.find("\n", 0);
+                if (enterIndex != UTF8::npos) {
+                    endIndex = index + enterIndex;
+                    index += enterIndex + 1;
+                    lineEndType = LineEndType::BREAK;
+                    textLines.push_back(
+                        new TextLine(tmpText.substr(0, enterIndex), startIndex, endIndex, lineEndType, spaceConsumed));
+                    //				LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
                 }
+                else {
+                    // if there was no enter look for last space in the tmpText and break line on it
+                    uint32_t spaceIndex = tmpText.findLast(" ", tmpText.length() - 1);
+
+                    // if there was no space take as many characters as possible and add CONTINUE ending
+                    if (spaceIndex == UTF8::npos) {
+                        endIndex = index + charCount;
+                        index += charCount;
+                        lineEndType = LineEndType::CONTINUE;
+                        textLines.push_back(new TextLine(tmpText, startIndex, endIndex, lineEndType, spaceConsumed));
+                        //					LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
+                    }
+                    else {
+                        lineEndType = LineEndType::CONTINUE_SPACE;
+
+                        uint32_t spaceWidth = font->getPixelWidth(" ", 0, 1);
+                        // if space is last character in string erase it and add appropriate CONTINUE_SPACE ending
+                        if (spaceIndex == tmpText.length() - 1) {
+                            endIndex = index + charCount - 1;
+                            index += charCount;
+                            textLines.push_back(new TextLine(tmpText.substr(0, tmpText.length() - 1),
+                                                             startIndex,
+                                                             endIndex,
+                                                             lineEndType,
+                                                             spaceConsumed - spaceWidth));
+                            //						LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
+                        }
+                        else {
+                            endIndex = index + spaceIndex;
+                            index += spaceIndex + 1;
+                            textLines.push_back(new TextLine(tmpText.substr(0, spaceIndex),
+                                                             startIndex,
+                                                             endIndex,
+                                                             lineEndType,
+                                                             font->getPixelWidth(tmpText.substr(0, spaceIndex))));
+                            //						LOG_INFO("Text Input Line: [%s]", textLines.back()->text.c_str());
+                        }
+                    }
+                }
+            }
+
+            if (textType == TextType::SINGLE_LINE) {
+                // LOG_INFO("NUMBER OF LINES: %d", textLines.size());
+                auto textLine     = textLines.front();
+                textLine->endType = LineEndType::EOT;
+                break;
+            }
+        }
+
+        for (auto it : textLines) {
+            // LOG_INFO("text: [%s] ending: %d", it->text.c_str(), static_cast<uint32_t>(it->endType));
+        }
+
+        firstLine = textLines.begin();
+        lastLine  = textLines.begin();
+    }
+
+    bool Text::splitText(UTF8 &source, UTF8 &remaining, LineEndType &endType, uint32_t availableSpace)
+    {
+
+        uint32_t spaceConsumed;
+        uint32_t charCount = font->getCharCountInSpace(source, availableSpace, spaceConsumed);
+        // this is sub-string that fits available space.
+        UTF8 searchStr = source.substr(0, charCount);
+
+        // try to find first enter.
+        uint32_t enterIndex = searchStr.find("\n", 0);
+        if (enterIndex != UTF8::npos) {
+            endType   = LineEndType::BREAK;
+            remaining = source.substr(enterIndex, source.length() - 1 - enterIndex);
+            source.split(enterIndex);
+            //		LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
+            return true;
+        }
+        else {
+            // if there was no enter look for last space in the source and break line on it
+            uint32_t spaceIndex = searchStr.findLast(" ", searchStr.length() - 1);
+
+            // if there was no space take as many characters as possible and add CONTINUE ending
+            if (spaceIndex == UTF8::npos) {
+                remaining = source.split(charCount);
+                endType   = LineEndType::CONTINUE;
+                //			LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
+                return true;
+            }
+            else {
+                endType = LineEndType::CONTINUE_SPACE;
+
+                remaining = source.substr(spaceIndex + 1, source.length() - 1 - spaceIndex);
+                source.split(spaceIndex);
+                //			LOG_INFO("Split Text: source: [%s] remaining: [%s]", source.c_str(), remaining.c_str());
                 return true;
             }
         }
-    }
-    else if (direction == NavigationDirection::DOWN)
-    {
-
-        // if this is a single line text widget there is no navigation down allowed
-        if (textType == TextType::SINGLE_LINE) return false;
-
-        auto itNext = std::next(it, 1);
-
-        // this is the last line, check for barrier
-        if (itNext == textLines.end())
-        {
-            if (barriers & static_cast<uint32_t>(NavigationBarrier::BARRIER_DOWN)) return true;
-            return false;
-        }
-
-        // increment line
-        ++cursorRow;
-
-        // check if column position is still valid
-        if (cursorColumn > (*itNext)->text.length()) cursorColumn = (*itNext)->text.length();
-
-        if (cursorRow >= visibleRows)
-        {
-            firstLine++;
-            recalculateDrawParams();
-            cursorRow = visibleRows - 1;
-        }
-        return true;
-    }
-    else if (direction == NavigationDirection::UP)
-    {
-
-        // if this is a single line text widget there is no navigation up allowed
-        if (textType == TextType::SINGLE_LINE) return false;
-
-        // if cursor is standing on the first line return false to allow focus change to previous widget
-        if (it == textLines.begin()) { return false; }
-
-        auto itPrev = std::prev(it, 1);
-        if (cursorRow == 0)
-        {
-            --firstLine;
-
-            recalculateDrawParams();
-            return true;
-        }
-        else
-        {
-            --cursorRow;
-        }
-
-        // check if previous line is shorter than last one if so move cursor to the end of previous line
-        if (cursorColumn > (*itPrev)->text.length()) { cursorColumn = (*itPrev)->text.length(); }
-
-        return true;
-    }
-
-    return false;
-}
-
-bool Text::handleBrowsing(const InputEvent &inputEvent)
-{
-    // if this is a single line text widget there is no browsing allowed
-    if (textType == TextType::SINGLE_LINE) return false;
-
-    switch (inputEvent.keyCode)
-    {
-    case (KeyCode::KEY_UP): {
-        // move cursor to first visible element
-        cursorRow = 0;
-        return moveCursor(NavigationDirection::UP);
-    }
-    break;
-    case KeyCode::KEY_DOWN: {
-        // move cursor to the last visible element
-        auto it = firstLine;
-        cursorRow = 0;
-        while ((it != textLines.end()) && (cursorRow < visibleRows - 1))
-        {
-            it++;
-            cursorRow++;
-        }
-
-        return moveCursor(NavigationDirection::DOWN);
-    }
-    break;
-    default: {
-        LOG_ERROR("Received unknown navigation key");
-    }
-    };
-    return false;
-}
-
-bool Text::handleNavigation(const InputEvent &inputEvent)
-{
-
-    switch (inputEvent.keyCode)
-    {
-    case (KeyCode::KEY_UP): {
-        return moveCursor(NavigationDirection::UP);
-    }
-    break;
-    case KeyCode::KEY_DOWN: {
-        return moveCursor(NavigationDirection::DOWN);
-    }
-    break;
-    case KeyCode::KEY_LEFT: {
-        return moveCursor(NavigationDirection::LEFT);
-    }
-    break;
-    case KeyCode::KEY_RIGHT: {
-        return moveCursor(NavigationDirection::RIGHT);
-    }
-    break;
-    default: {
-        LOG_ERROR("Received unknown navigation key");
-    }
-    };
-    return false;
-}
-
-bool Text::handleEnter()
-{
-
-    if (editMode == EditMode::BROWSE) return false;
-
-    // get textline where cursor is located
-    auto it = firstLine;
-    std::advance(it, cursorRow);
-
-    // split current text in line using cursors position
-    UTF8 remainingText = (*it)->text.split(cursorColumn);
-
-    // store old type of line ending set new type of ending to the current line
-    LineEndType endType = (*it)->endType;
-    (*it)->endType = LineEndType::BREAK;
-
-    // create and add new line using remaining parts of text
-    auto itNext = it;
-    ++itNext;
-    textLines.insert(itNext, new TextLine(remainingText, 0, remainingText.length(), endType, font->getPixelWidth(remainingText)));
-    cursorRow++;
-
-    if (cursorRow >= visibleRows)
-    {
-        cursorRow = visibleRows - 1;
-        firstLine++;
-    }
-
-    cursorColumn = 0;
-
-    reworkLines(it);
-
-    recalculateDrawParams();
-
-    return true;
-}
-
-bool Text::handleBackspace()
-{
-
-    if (editMode == EditMode::BROWSE) return false;
-
-    // if cursor is in column 0 and there is no previous line return
-    if ((cursorRow == 0) && (cursorColumn == 0) && (firstLine == textLines.begin())) return true;
-
-    // if cursor is in position other than 0 remove previous character and run lines rework
-    auto it = getCursorTextLine();
-    if (cursorColumn > 0)
-    {
-        TextLine *currentTextLine = (*it);
-        currentTextLine->text.removeChar(cursorColumn - 1);
-        cursorColumn--;
-    }
-    // this is when cursor is located at the beginning of the line and there are previous lines
-    else
-    {
-
-        if (it == textLines.begin()) { return true; }
-
-        auto itPrev = std::prev(it, 1);
-
-        // if ending is equal to LineEndType::CONTINUE delete last char from current string
-        if ((*itPrev)->endType == LineEndType::CONTINUE) { (*itPrev)->text.removeChar((*itPrev)->text.length() - 1); }
-        if ((*itPrev)->endType == LineEndType::CONTINUE_SPACE) { (*itPrev)->endType = LineEndType::CONTINUE; }
-        else if ((*itPrev)->endType == LineEndType::BREAK)
-        {
-            (*itPrev)->endType = LineEndType::CONTINUE;
-        }
-
-        cursorColumn = (*itPrev)->text.length();
-
-        if (cursorRow == 0) { firstLine = itPrev; }
-        else
-        {
-            --cursorRow;
-        }
-
-        (*itPrev)->text += (*it)->text;
-        (*itPrev)->endType = (*it)->endType;
-
-        // delete current line
-        textLines.erase(it);
-        it = itPrev;
-    }
-
-    reworkLines(it);
-    recalculateDrawParams();
-
-    return true;
-}
-
-bool Text::handleChar(uint32_t chars)
-{
-
-    if (editMode == EditMode::BROWSE) return false;
-
-    // get text line where cursor is standing
-    auto it = getCursorTextLine();
-    TextLine *currentTextLine = (*it);
-
-// TODO
-    // calculate width of the character that is going to be inserted
-    uint32_t charWidth = font->getCharPixelWidth(chars);
-    if(charWidth == 0) {
         return false;
     }
 
-    // insert character into string in currently selected line
-    if (currentTextLine->text.insertCode(chars, cursorColumn) == false) return false;
-
-  // if sum of the old string and width of the new character are greater than available space run lines rework
-  // procedure
-    uint32_t linesCount = textLines.size();
-    uint32_t availableSpace = getAvailableHPixelSpace();
-    uint32_t currentWidth = currentTextLine->pixelLength;
-    if (currentWidth + charWidth > availableSpace)
+    void Text::reworkLines(std::list<TextLine *>::iterator it)
     {
 
-        // this is the case when new character inserted into single line text
-        // is creating the line that doesn't fit available space.
-        if (textType == TextType::SINGLE_LINE)
-        {
+        // iterate until end of text lines or till line that fits available space has break line ending (enter).
+        while (it != textLines.end()) {
+
+            // if current line has BREAK of EOT line ending check if current text fits available space
+            // finish procedure
+            uint32_t availableSpace = getAvailableHPixelSpace();
+            uint32_t consumedSpace;
+
+            if (((*it)->endType == LineEndType::BREAK) || ((*it)->endType == LineEndType::EOT)) {
+                consumedSpace = font->getPixelWidth((*it)->getText());
+                if (consumedSpace < availableSpace)
+                    break;
+            }
+
+            // check if there is next line
+            auto itNext = it;
+            itNext++;
+
+            UTF8 mergedLinesText = (*it)->getTextWithEnding();
+
+            // if processed text line is not finished with break end type
+            if (((*it)->endType != LineEndType::BREAK) && (itNext != textLines.end())) {
+
+                // merge text from two lines
+                mergedLinesText += (*itNext)->getTextWithEnding();
+                // assign end type from next line to the current line
+                (*it)->endType = (*itNext)->endType;
+
+                // remove next line as the text was taken to the current line
+                delete (*itNext);
+                textLines.erase(itNext);
+            }
+
+            LineEndType endType;
+            UTF8 remainingText;
+            bool splitFlag = splitText(mergedLinesText, remainingText, endType, availableSpace);
+
+            // if there was a split update current and next item in the list
+            if (splitFlag) {
+
+                (*it)->text        = std::move(mergedLinesText);
+                (*it)->pixelLength = font->getPixelWidth((*it)->getText());
+
+                itNext = it;
+                itNext++;
+                textLines.insert(
+                    itNext,
+                    new TextLine(
+                        remainingText, 0, remainingText.length(), (*it)->endType, font->getPixelWidth(remainingText)));
+
+                (*it)->endType = endType;
+            }
+
+            // proceed to next line
+            it++;
+        }
+
+        // TODO starting from first modified line up to last modified line update start and end index
+    }
+
+    std::list<DrawCommand *> Text::buildDrawList()
+    {
+        return Rect::buildDrawList();
+    }
+    void Text::setPosition(const short &x, const short &y)
+    {
+        Rect::setPosition(x, y);
+        recalculateDrawParams();
+        updateCursor();
+    }
+
+    void Text::setSize(const unsigned short w, const unsigned short h)
+    {
+        Rect::setSize(w, h);
+        recalculateDrawParams();
+        updateCursor();
+    }
+
+    bool Text::onInput(const InputEvent &inputEvent)
+    {
+        bool res = false;
+
+        if (inputEvent.state == InputEvent::State::keyReleasedLong && inputEvent.keyCode == gui::KeyCode::KEY_AST) {
+            if (mode) {
+                mode->select_special_char();
+                return true;
+            }
+        }
+
+        // handle navigation
+        if (inputEvent.state == InputEvent::State::keyReleasedShort &&
+            ((inputEvent.keyCode == KeyCode::KEY_LEFT) || (inputEvent.keyCode == KeyCode::KEY_RIGHT) ||
+             (inputEvent.keyCode == KeyCode::KEY_UP) || (inputEvent.keyCode == KeyCode::KEY_DOWN))) {
+            switch (editMode) {
+            case EditMode::BROWSE:
+                res = handleBrowsing(inputEvent);
+                break;
+            case EditMode::EDIT:
+                res = handleNavigation(inputEvent);
+                break;
+            case EditMode::SCROLL:
+                LOG_DEBUG("TODO");
+                res = false;
+                break;
+            }
+
+            if (res && editMode != EditMode::SCROLL)
+                updateCursor();
+            return res;
+        }
+
+        // translate and store keypress
+        uint32_t code = translator.handle(inputEvent.key, mode ? mode->get() : "");
+
+        /// handling of key removal
+        if (inputEvent.keyCode == gui::KeyCode::KEY_PND) {
+            // longpress -> remove all characters
+            if (inputEvent.state == InputEvent::State::keyReleasedLong) {
+                // TODO handle longpress remove key
+            }
+            // shortpress remove characters n time for multipress, one time for normal press
+            else if (inputEvent.state == InputEvent::State::keyReleasedShort) {
+                auto char_rm = [=](bool &res) {
+                    res = handleBackspace();
+                    if (res) {
+                        updateCursor();
+                        contentCallback(*this);
+                    }
+                };
+                if (translator.getTimes()) {
+                    for (int i = 0; i < translator.getTimes(); ++i) {
+                        char_rm(res);
+                    }
+                }
+                else {
+                    char_rm(res);
+                }
+                return res;
+            }
+        }
+
+        // process only short release events
+        if (inputEvent.state != InputEvent::State::keyReleasedShort) {
+            return false;
+        }
+
+        if (inputEvent.keyCode == gui::KeyCode::KEY_AST) {
+            if (mode) {
+                mode->next();
+                return true;
+            }
+        }
+
+        // it there is no key char it means that translator didn't handled the key and this key
+        if (code == 0) {
+            LOG_ERROR("Key not handled! %d", inputEvent.keyCode);
+            return false;
+        }
+
+        // get how many short presses were handled in this widget
+        if (translator.getTimes()) {
+            handleBackspace();
+            res = handleChar(code);
+            if (res) {
+                updateCursor();
+                contentCallback(*this);
+            }
+            return res;
+        }
+
+        // if char is a new line char then create new line and move caret and return
+        if (code == 0x0A) {
+            if (textType == TextType::MULTI_LINE) {
+                res = handleEnter();
+                contentCallback(*this);
+            }
+        }
+        else { // normal char -> add and check pixel width
+            res = handleChar(code);
+            contentCallback(*this);
+        }
+        if (res)
+            updateCursor();
+        return res;
+    }
+
+    bool Text::onActivated(void *data)
+    {
+        Rect::onActivated(data);
+        return false;
+    }
+
+    bool Text::onFocus(bool state)
+    {
+        // inform on start what type of input there is
+        if (mode) {
+            mode->on_focus(state);
+        }
+        bool ret = Rect::onFocus(state);
+        if (focus && editMode == EditMode::EDIT) {
+            cursor->setVisible(true);
+            for (auto it = labelLines.begin(); it != labelLines.end(); it++)
+                (*it)->setPenWidth(3);
+        }
+        else {
+            cursor->setVisible(false);
+            for (auto it = labelLines.begin(); it != labelLines.end(); it++)
+                (*it)->setPenWidth(1);
+        }
+
+        return ret;
+    }
+
+    void Text::setRadius(int value)
+    {
+        Rect::setRadius(value);
+        // if margins are smaller than radius update the margins
+        if (margins.left < value)
+            margins.left = value;
+        if (margins.right < value)
+            margins.right = value;
+        updateCursor();
+    }
+
+    bool Text::onDimensionChanged(const BoundingBox &oldDim, const BoundingBox &newDim)
+    {
+        Rect::onDimensionChanged(oldDim, newDim);
+        updateCursor();
+        return false;
+    }
+
+    bool Text::moveCursor(const NavigationDirection &direction)
+    {
+
+        auto it = getCursorTextLine();
+
+        if (direction == NavigationDirection::LEFT) {
+            // if we are standing on the beginning for the line move to previous line
+            if (cursorColumn == 0) {
+
+                // if there is no previous line return false so window can switch focus to the item on the left.
+                if (it == textLines.begin()) {
+                    return false;
+                }
+
+                // there is a previous line, check if cursor's row is greater than 0;
+                cursorColumn = (*std::prev(it, 1))->text.length();
+                if (cursorRow > 0) {
+                    --cursorRow;
+                }
+                else {
+                    --firstLine;
+                    recalculateDrawParams();
+                }
+                return true;
+            }
+            // cursor's column is greater than 0
+            else {
+                --cursorColumn;
+                return true;
+            }
+        }
+        else if (direction == NavigationDirection::RIGHT) {
+            // if cursor is not at the end of current line simply move curosr
+            if (cursorColumn < (*it)->text.length()) {
+                ++cursorColumn;
+                return true;
+            }
+            else {
+                auto itNext = std::next(it, 1);
+                // if this is not the last line increment row and set column to 0
+                if (itNext != textLines.end()) {
+                    ++cursorRow;
+                    cursorColumn = 0;
+
+                    // if increased row is out of visible are increment first line
+                    if (cursorRow >= visibleRows) {
+                        firstLine++;
+                        recalculateDrawParams();
+                        cursorRow = visibleRows - 1;
+                    }
+                    return true;
+                }
+            }
+        }
+        else if (direction == NavigationDirection::DOWN) {
+
+            // if this is a single line text widget there is no navigation down allowed
+            if (textType == TextType::SINGLE_LINE)
+                return false;
+
+            auto itNext = std::next(it, 1);
+
+            // this is the last line, check for barrier
+            if (itNext == textLines.end()) {
+                if (barriers & static_cast<uint32_t>(NavigationBarrier::BARRIER_DOWN))
+                    return true;
+                return false;
+            }
+
+            // increment line
+            ++cursorRow;
+
+            // check if column position is still valid
+            if (cursorColumn > (*itNext)->text.length())
+                cursorColumn = (*itNext)->text.length();
+
+            if (cursorRow >= visibleRows) {
+                firstLine++;
+                recalculateDrawParams();
+                cursorRow = visibleRows - 1;
+            }
+            return true;
+        }
+        else if (direction == NavigationDirection::UP) {
+
+            // if this is a single line text widget there is no navigation up allowed
+            if (textType == TextType::SINGLE_LINE)
+                return false;
+
+            // if cursor is standing on the first line return false to allow focus change to previous widget
+            if (it == textLines.begin()) {
+                return false;
+            }
+
+            auto itPrev = std::prev(it, 1);
+            if (cursorRow == 0) {
+                --firstLine;
+
+                recalculateDrawParams();
+                return true;
+            }
+            else {
+                --cursorRow;
+            }
+
+            // check if previous line is shorter than last one if so move cursor to the end of previous line
+            if (cursorColumn > (*itPrev)->text.length()) {
+                cursorColumn = (*itPrev)->text.length();
+            }
 
-            currentTextLine->text.removeChar(cursorColumn, 1);
             return true;
         }
 
-        ++cursorColumn;
+        return false;
+    }
+
+    bool Text::handleBrowsing(const InputEvent &inputEvent)
+    {
+        // if this is a single line text widget there is no browsing allowed
+        if (textType == TextType::SINGLE_LINE)
+            return false;
+
+        switch (inputEvent.keyCode) {
+        case (KeyCode::KEY_UP): {
+            // move cursor to first visible element
+            cursorRow = 0;
+            return moveCursor(NavigationDirection::UP);
+        } break;
+        case KeyCode::KEY_DOWN: {
+            // move cursor to the last visible element
+            auto it   = firstLine;
+            cursorRow = 0;
+            while ((it != textLines.end()) && (cursorRow < visibleRows - 1)) {
+                it++;
+                cursorRow++;
+            }
+
+            return moveCursor(NavigationDirection::DOWN);
+        } break;
+        default: {
+            LOG_ERROR("Received unknown navigation key");
+        }
+        };
+        return false;
+    }
+
+    bool Text::handleNavigation(const InputEvent &inputEvent)
+    {
+
+        switch (inputEvent.keyCode) {
+        case (KeyCode::KEY_UP): {
+            return moveCursor(NavigationDirection::UP);
+        } break;
+        case KeyCode::KEY_DOWN: {
+            return moveCursor(NavigationDirection::DOWN);
+        } break;
+        case KeyCode::KEY_LEFT: {
+            return moveCursor(NavigationDirection::LEFT);
+        } break;
+        case KeyCode::KEY_RIGHT: {
+            return moveCursor(NavigationDirection::RIGHT);
+        } break;
+        default: {
+            LOG_ERROR("Received unknown navigation key");
+        }
+        };
+        return false;
+    }
+
+    bool Text::handleEnter()
+    {
+
+        if (editMode == EditMode::BROWSE)
+            return false;
+
+        // get textline where cursor is located
+        auto it = firstLine;
+        std::advance(it, cursorRow);
+
+        // split current text in line using cursors position
+        UTF8 remainingText = (*it)->text.split(cursorColumn);
+
+        // store old type of line ending set new type of ending to the current line
+        LineEndType endType = (*it)->endType;
+        (*it)->endType      = LineEndType::BREAK;
+
+        // create and add new line using remaining parts of text
+        auto itNext = it;
+        ++itNext;
+        textLines.insert(
+            itNext,
+            new TextLine(remainingText, 0, remainingText.length(), endType, font->getPixelWidth(remainingText)));
+        cursorRow++;
+
+        if (cursorRow >= visibleRows) {
+            cursorRow = visibleRows - 1;
+            firstLine++;
+        }
+
+        cursorColumn = 0;
+
         reworkLines(it);
 
-        // if cursor position is greater than number of characters in current line move cursor to next line.
-        if (cursorColumn > (*it)->text.length())
-        {
-            cursorColumn = 0;
-            ++cursorRow;
+        recalculateDrawParams();
+
+        return true;
+    }
+
+    bool Text::handleBackspace()
+    {
+
+        if (editMode == EditMode::BROWSE)
+            return false;
+
+        // if cursor is in column 0 and there is no previous line return
+        if ((cursorRow == 0) && (cursorColumn == 0) && (firstLine == textLines.begin()))
+            return true;
+
+        // if cursor is in position other than 0 remove previous character and run lines rework
+        auto it = getCursorTextLine();
+        if (cursorColumn > 0) {
+            TextLine *currentTextLine = (*it);
+            currentTextLine->text.removeChar(cursorColumn - 1);
+            cursorColumn--;
+        }
+        // this is when cursor is located at the beginning of the line and there are previous lines
+        else {
+
+            if (it == textLines.begin()) {
+                return true;
+            }
+
+            auto itPrev = std::prev(it, 1);
+
+            // if ending is equal to LineEndType::CONTINUE delete last char from current string
+            if ((*itPrev)->endType == LineEndType::CONTINUE) {
+                (*itPrev)->text.removeChar((*itPrev)->text.length() - 1);
+            }
+            if ((*itPrev)->endType == LineEndType::CONTINUE_SPACE) {
+                (*itPrev)->endType = LineEndType::CONTINUE;
+            }
+            else if ((*itPrev)->endType == LineEndType::BREAK) {
+                (*itPrev)->endType = LineEndType::CONTINUE;
+            }
+
+            cursorColumn = (*itPrev)->text.length();
+
+            if (cursorRow == 0) {
+                firstLine = itPrev;
+            }
+            else {
+                --cursorRow;
+            }
+
+            (*itPrev)->text += (*it)->text;
+            (*itPrev)->endType = (*it)->endType;
+
+            // delete current line
+            textLines.erase(it);
+            it = itPrev;
         }
 
-        if (cursorRow >= visibleRows) { firstRow++; }
-    }
-    // no line splitting, update pixel width and proceed
-    else
-    {
-        currentTextLine->pixelLength = font->getPixelWidth(currentTextLine->text);
-        ++cursorColumn;
+        reworkLines(it);
+        recalculateDrawParams();
+
+        return true;
     }
 
-    // if number of text lines have increased, text widget is multi-line and expandable change widgets space
-    //	if( linesCount != textLines.size()) {
-    //
-    //	}
-
-    recalculateDrawParams();
-    // calculate new position of the cursor
-
-    return true;
-}
-
-std::list<Text::TextLine *>::iterator Text::getCursorTextLine()
-{
-    auto it = firstLine;
-    // TODO add check for distance to advance
-    std::advance(it, cursorRow);
-    return it;
-}
-
-void Text::updateCursor()
-{
-    cursor->setSize(2, font->info.line_height);
-    auto it = std::next(firstLine, cursorRow);
-
-    uint32_t posX = (margins.left + innerMargins.left) + font->getPixelWidth((*it)->text, 0, cursorColumn);
-    uint32_t posY = (margins.top + innerMargins.top) + cursorRow * font->info.line_height;
-    cursor->setPosition(posX, posY);
-}
-
-int32_t Text::expand(uint32_t rowCount, int32_t h)
-{
-    if (rowCount < textLines.size() && expandMode != Text::ExpandMode::EXPAND_NONE)
+    bool Text::handleChar(uint32_t chars)
     {
-        h = font->info.line_height * textLines.size() + (margins.getAlong(Axis::Y) + innerMargins.getAlong(Axis::Y));
-        if (parent && widgetArea.h > parent->widgetArea.h)
-        {
-            h = widgetArea.h;
+
+        if (editMode == EditMode::BROWSE)
+            return false;
+
+        // get text line where cursor is standing
+        auto it                   = getCursorTextLine();
+        TextLine *currentTextLine = (*it);
+
+        // TODO
+        // calculate width of the character that is going to be inserted
+        uint32_t charWidth = font->getCharPixelWidth(chars);
+        if (charWidth == 0) {
+            return false;
         }
-        setSize(getWidth(), h);
-        LOG_DEBUG("Resized Text to: %d %d", getWidth(), getHeight());
+
+        // insert character into string in currently selected line
+        if (currentTextLine->text.insertCode(chars, cursorColumn) == false)
+            return false;
+
+        // if sum of the old string and width of the new character are greater than available space run lines rework
+        // procedure
+        uint32_t linesCount     = textLines.size();
+        uint32_t availableSpace = getAvailableHPixelSpace();
+        uint32_t currentWidth   = currentTextLine->pixelLength;
+        if (currentWidth + charWidth > availableSpace) {
+
+            // this is the case when new character inserted into single line text
+            // is creating the line that doesn't fit available space.
+            if (textType == TextType::SINGLE_LINE) {
+
+                currentTextLine->text.removeChar(cursorColumn, 1);
+                return true;
+            }
+
+            ++cursorColumn;
+            reworkLines(it);
+
+            // if cursor position is greater than number of characters in current line move cursor to next line.
+            if (cursorColumn > (*it)->text.length()) {
+                cursorColumn = 0;
+                ++cursorRow;
+            }
+
+            if (cursorRow >= visibleRows) {
+                firstRow++;
+            }
+        }
+        // no line splitting, update pixel width and proceed
+        else {
+            currentTextLine->pixelLength = font->getPixelWidth(currentTextLine->text);
+            ++cursorColumn;
+        }
+
+        // if number of text lines have increased, text widget is multi-line and expandable change widgets space
+        //	if( linesCount != textLines.size()) {
+        //
+        //	}
+
+        recalculateDrawParams();
+        // calculate new position of the cursor
+
+        return true;
     }
-    return h;
-}
 
-void Text::recalculateDrawParams()
-{
-
-    // calculate number of lines for displaying text
-    int32_t h = widgetArea.h - (margins.getAlong(Axis::Y) + innerMargins.getAlong(Axis::Y));
-    if (h < 0) h = 0;
-
-    // remove all old labels
-    for (uint32_t i = 0; i < labelLines.size(); ++i)
+    std::list<Text::TextLine *>::iterator Text::getCursorTextLine()
     {
-        removeWidget(labelLines[i]);
-        delete labelLines[i];
+        auto it = firstLine;
+        // TODO add check for distance to advance
+        std::advance(it, cursorRow);
+        return it;
     }
 
-    labelLines.clear();
-
-    // calculate how many rows can fit in available height.
-    uint32_t rowCount = h / font->info.line_height;
-    h = expand(rowCount, h);
-
-    if (textType == TextType::SINGLE_LINE) { rowCount = 1; }
-
-    // if there is not enough space for single line start from 0 and ignore vertical margins
-    uint16_t startY = (h < font->info.line_height) ? 0 : (margins.top + innerMargins.top);
-
-    // create labels to display text. There will be always at least one.
-    for (uint32_t i = 0; i < rowCount; i++)
+    void Text::updateCursor()
     {
-        gui::Label *label = new gui::Label(this, (margins.left + innerMargins.left), startY,
-                                           widgetArea.w - (margins.getAlong(Axis::X) + innerMargins.getAlong(Axis::X)), font->info.line_height);
-        label->setFilled(false);
-        label->setPenWidth(1);
-        label->setPenFocusWidth(3);
-        label->setAlignement(alignment);
-        label->setFont(font->getName());
-        label->setTextColor(textColor);
+        cursor->setSize(2, font->info.line_height);
+        auto it = std::next(firstLine, cursorRow);
 
-        if (underline) label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
-        else
-            label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
-        if (focus) label->setPenWidth(3);
-        labelLines.push_back(label);
-        startY += font->info.line_height;
+        uint32_t posX = (margins.left + innerMargins.left) + font->getPixelWidth((*it)->text, 0, cursorColumn);
+        uint32_t posY = (margins.top + innerMargins.top) + cursorRow * font->info.line_height;
+        cursor->setPosition(posX, posY);
     }
-    visibleRows = rowCount;
 
-
-    //assign text to all lines
-    auto textIterator = firstLine;
-    /// if there is less lines than possible to show, copy only needed lines
-    auto num_lines_visible = labelLines.size() > textLines.size()? textLines.size(): labelLines.size();
-    for( uint32_t i=0; i < num_lines_visible; i++ )
+    int32_t Text::expand(uint32_t rowCount, int32_t h)
     {
-        if (textIterator == textLines.end()) break;
-        labelLines[i]->setText((*textIterator)->text);
-        lastLine = textIterator;
-        textIterator++;
+        if (rowCount < textLines.size() && expandMode != Text::ExpandMode::EXPAND_NONE) {
+            h = font->info.line_height * textLines.size() +
+                (margins.getAlong(Axis::Y) + innerMargins.getAlong(Axis::Y));
+            if (parent && widgetArea.h > parent->widgetArea.h) {
+                h = widgetArea.h;
+            }
+            setSize(getWidth(), h);
+            LOG_DEBUG("Resized Text to: %d %d", getWidth(), getHeight());
+        }
+        return h;
     }
-}
 
-void Text::setMargins(const Margins &margins)
-{
-    this->margins = margins;
-    recalculateDrawParams();
-    updateCursor();
-}
-
-Item *Text::getNavigationItem(NavigationDirection direction)
-{
-    // if provided direction is forbidden than return nullptr
-    if (barriers & static_cast<uint32_t>(direction)) return nullptr;
-
-    // otherwise run default navigation method (Item)
-    return Rect::getNavigationItem(direction);
-}
-
-bool Text::onContent()
-{
-    if ((expandMode == Text::ExpandMode::EXPAND_DOWN) || (expandMode == Text::ExpandMode::EXPAND_UP))
+    void Text::recalculateDrawParams()
     {
-        if ((parent->type == ItemType::VBOX) || (parent->type == ItemType::HBOX)) { parent->onContent(); }
+
+        // calculate number of lines for displaying text
+        int32_t h = widgetArea.h - (margins.getAlong(Axis::Y) + innerMargins.getAlong(Axis::Y));
+        if (h < 0)
+            h = 0;
+
+        // remove all old labels
+        for (uint32_t i = 0; i < labelLines.size(); ++i) {
+            removeWidget(labelLines[i]);
+            delete labelLines[i];
+        }
+
+        labelLines.clear();
+
+        // calculate how many rows can fit in available height.
+        uint32_t rowCount = h / font->info.line_height;
+        h                 = expand(rowCount, h);
+
+        if (textType == TextType::SINGLE_LINE) {
+            rowCount = 1;
+        }
+
+        // if there is not enough space for single line start from 0 and ignore vertical margins
+        uint16_t startY = (h < font->info.line_height) ? 0 : (margins.top + innerMargins.top);
+
+        // create labels to display text. There will be always at least one.
+        for (uint32_t i = 0; i < rowCount; i++) {
+            gui::Label *label =
+                new gui::Label(this,
+                               (margins.left + innerMargins.left),
+                               startY,
+                               widgetArea.w - (margins.getAlong(Axis::X) + innerMargins.getAlong(Axis::X)),
+                               font->info.line_height);
+            label->setFilled(false);
+            label->setPenWidth(1);
+            label->setPenFocusWidth(3);
+            label->setAlignement(alignment);
+            label->setFont(font->getName());
+            label->setTextColor(textColor);
+
+            if (underline)
+                label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM);
+            else
+                label->setEdges(RectangleEdgeFlags::GUI_RECT_EDGE_NO_EDGES);
+            if (focus)
+                label->setPenWidth(3);
+            labelLines.push_back(label);
+            startY += font->info.line_height;
+        }
+        visibleRows = rowCount;
+
+        // assign text to all lines
+        auto textIterator = firstLine;
+        /// if there is less lines than possible to show, copy only needed lines
+        auto num_lines_visible = labelLines.size() > textLines.size() ? textLines.size() : labelLines.size();
+        for (uint32_t i = 0; i < num_lines_visible; i++) {
+            if (textIterator == textLines.end())
+                break;
+            labelLines[i]->setText((*textIterator)->text);
+            lastLine = textIterator;
+            textIterator++;
+        }
     }
 
-    return true;
-}
+    void Text::setMargins(const Margins &margins)
+    {
+        this->margins = margins;
+        recalculateDrawParams();
+        updateCursor();
+    }
 
-void Text::setAlignment(const Alignment _alignment)
-{
-    alignment = _alignment;
-    recalculateDrawParams();
-    updateCursor();
-}
+    Item *Text::getNavigationItem(NavigationDirection direction)
+    {
+        // if provided direction is forbidden than return nullptr
+        if (barriers & static_cast<uint32_t>(direction))
+            return nullptr;
+
+        // otherwise run default navigation method (Item)
+        return Rect::getNavigationItem(direction);
+    }
+
+    bool Text::onContent()
+    {
+        if ((expandMode == Text::ExpandMode::EXPAND_DOWN) || (expandMode == Text::ExpandMode::EXPAND_UP)) {
+            if ((parent->type == ItemType::VBOX) || (parent->type == ItemType::HBOX)) {
+                parent->onContent();
+            }
+        }
+
+        return true;
+    }
+
+    void Text::setAlignment(const Alignment _alignment)
+    {
+        alignment = _alignment;
+        recalculateDrawParams();
+        updateCursor();
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Text.hpp b/module-gui/gui/widgets/Text.hpp
index e280f28db..2fa926684 100644
--- a/module-gui/gui/widgets/Text.hpp
+++ b/module-gui/gui/widgets/Text.hpp
@@ -78,12 +78,12 @@ namespace gui
 
         enum class NavigationBarrier
         {
-            BARRIER_NONE = 0x00,
-            BARRIER_UP = 0x01,
-            BARRIER_DOWN = 0x02,
-            BARRIER_LEFT = 0x04,
+            BARRIER_NONE  = 0x00,
+            BARRIER_UP    = 0x01,
+            BARRIER_DOWN  = 0x02,
+            BARRIER_LEFT  = 0x04,
             BARRIER_RIGHT = 0x08,
-            BARRIER_ALL = 0x0F,
+            BARRIER_ALL   = 0x0F,
         };
 
       protected:
@@ -91,12 +91,13 @@ namespace gui
         {
           public:
             UTF8 text;
-            uint32_t startIndex = 0;
-            uint32_t endIndex = 0;
-            LineEndType endType = LineEndType::EOT;
+            uint32_t startIndex  = 0;
+            uint32_t endIndex    = 0;
+            LineEndType endType  = LineEndType::EOT;
             uint32_t pixelLength = 0;
 
-            TextLine(const UTF8 &text, uint32_t startIndex, uint32_t endIndex, LineEndType endType, uint32_t pixelLength);
+            TextLine(
+                const UTF8 &text, uint32_t startIndex, uint32_t endIndex, LineEndType endType, uint32_t pixelLength);
             /**
              * Returns text with appropriate ending.
              */
@@ -220,8 +221,14 @@ namespace gui
 
       public:
         Text();
-        Text(Item *parent, const uint32_t &x, const uint32_t &y, const uint32_t &w, const uint32_t &h, const UTF8 &text = "",
-             ExpandMode expandMode = ExpandMode::EXPAND_NONE, TextType textType = TextType::MULTI_LINE);
+        Text(Item *parent,
+             const uint32_t &x,
+             const uint32_t &y,
+             const uint32_t &w,
+             const uint32_t &h,
+             const UTF8 &text      = "",
+             ExpandMode expandMode = ExpandMode::EXPAND_NONE,
+             TextType textType     = TextType::MULTI_LINE);
         virtual ~Text();
 
         /**
@@ -271,7 +278,7 @@ namespace gui
       private:
         InputMode *mode = nullptr;
         gui::KeyInputMappedTranslation translator;
-};
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/TopBar.cpp b/module-gui/gui/widgets/TopBar.cpp
index 64bd2e77a..f2d79a87d 100644
--- a/module-gui/gui/widgets/TopBar.cpp
+++ b/module-gui/gui/widgets/TopBar.cpp
@@ -17,12 +17,13 @@
 
 #include "common_data/EventStore.hpp"
 
-namespace gui {
+namespace gui
+{
 
-    const uint32_t TopBar::signalOffset = 35;
-    const uint32_t TopBar::batteryOffset = 415;
+    const uint32_t TopBar::signalOffset    = 35;
+    const uint32_t TopBar::batteryOffset   = 415;
     gui::TopBar::TimeMode TopBar::timeMode = TimeMode::TIME_24H;
-    uint32_t TopBar::time = 0;
+    uint32_t TopBar::time                  = 0;
 
     TopBar::TopBar()
     {
@@ -33,237 +34,231 @@ namespace gui {
         setBorderColor(ColorNoColor);
         setFilled(true);
         setSize(480, 50);
-}
-TopBar::TopBar( Item* parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h ) : Rect{ parent, x, y, w, h } {
-
-	prepareWidget();
-
-	setFillColor( ColorFullWhite );
-	setBorderColor( ColorNoColor );
-	setFilled(true);
-	setSize(480, 50);
-	updateDrawArea();
-}
-TopBar::~TopBar() {
-}
-
-void TopBar::batteryShowBars(uint32_t val)
-{
-    int i = 0;
-    if (val > battery.size())
-    {
-        LOG_ERROR("Trying to set battery level out of scope");
-        val = battery.size();
     }
-    for (int i = 0; i < battery.size(); ++i)
+    TopBar::TopBar(Item *parent, uint32_t x, uint32_t y, uint32_t w, uint32_t h) : Rect{parent, x, y, w, h}
     {
-        battery[i]->setVisible(val > i);
+
+        prepareWidget();
+
+        setFillColor(ColorFullWhite);
+        setBorderColor(ColorNoColor);
+        setFilled(true);
+        setSize(480, 50);
+        updateDrawArea();
     }
-}
+    TopBar::~TopBar()
+    {}
 
-void TopBar::prepareWidget() {
-
-	signal[0] = new gui::Image( this, signalOffset,17,0,0, "signal0" );
-	signal[1] = new gui::Image( this, signalOffset,17,0,0, "signal1" );
-	signal[2] = new gui::Image( this, signalOffset,17,0,0, "signal2" );
-	signal[3] = new gui::Image( this, signalOffset,17,0,0, "signal3" );
-	signal[4] = new gui::Image( this, signalOffset,17,0,0, "signal4" );
-	signal[5] = new gui::Image( this, signalOffset,17,0,0, "signal5" );
-    updateSignalStrength();
-
-    //icons for battery
-    battery = {
-        new gui::Image(this, batteryOffset, 17, 0, 0, "battery0"), new gui::Image(this, batteryOffset, 17, 0, 0, "battery1"),
-        new gui::Image(this, batteryOffset, 17, 0, 0, "battery2"), new gui::Image(this, batteryOffset, 17, 0, 0, "battery3"),
-        new gui::Image(this, batteryOffset, 17, 0, 0, "battery4"), new gui::Image(this, batteryOffset, 17, 0, 0, "battery5"),
-    };
-    batteryShowBars(0);
-
-    charging = new Label(this, batteryOffset, 17, 30, this->drawArea.h);
-    charging->setFilled(false);
-    charging->setBorderColor(gui::ColorNoColor);
-    charging->setFont(style::header::font::title);
-    charging->setText("Z");
-    charging->setVisible(false);
-
-    const auto design_sim_offset = 378; // this offset is not final
-    sim = new SIM(this, design_sim_offset, 17);
-
-    //icon of the lock
-	lock = new gui::Image( this, 240-11,17,0,0, "lock" );
-
-	//time label
-	timeLabel = new Label(this, 0, 0, 480, this->drawArea.h );
-	timeLabel->setFilled( false );
-	timeLabel->setBorderColor( gui::ColorNoColor );
-	timeLabel->setFont(style::header::font::time);
-	timeLabel->setText("00:00");
-	timeLabel->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-}
-
-void TopBar::setActive(std::list<std::pair<TopBar::Elements, bool>> elements)
-{
-    for (auto el : elements)
+    void TopBar::batteryShowBars(uint32_t val)
     {
-        setActive(el.first, el.second);
+        int i = 0;
+        if (val > battery.size()) {
+            LOG_ERROR("Trying to set battery level out of scope");
+            val = battery.size();
+        }
+        for (int i = 0; i < battery.size(); ++i) {
+            battery[i]->setVisible(val > i);
+        }
     }
-}
 
-void TopBar::setActive( TopBar::Elements element, bool active ) {
-	switch( element ) {
-		case Elements::BATTERY: {
+    void TopBar::prepareWidget()
+    {
+
+        signal[0] = new gui::Image(this, signalOffset, 17, 0, 0, "signal0");
+        signal[1] = new gui::Image(this, signalOffset, 17, 0, 0, "signal1");
+        signal[2] = new gui::Image(this, signalOffset, 17, 0, 0, "signal2");
+        signal[3] = new gui::Image(this, signalOffset, 17, 0, 0, "signal3");
+        signal[4] = new gui::Image(this, signalOffset, 17, 0, 0, "signal4");
+        signal[5] = new gui::Image(this, signalOffset, 17, 0, 0, "signal5");
+        updateSignalStrength();
+
+        // icons for battery
+        battery = {
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery0"),
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery1"),
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery2"),
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery3"),
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery4"),
+            new gui::Image(this, batteryOffset, 17, 0, 0, "battery5"),
+        };
+        batteryShowBars(0);
+
+        charging = new Label(this, batteryOffset, 17, 30, this->drawArea.h);
+        charging->setFilled(false);
+        charging->setBorderColor(gui::ColorNoColor);
+        charging->setFont(style::header::font::title);
+        charging->setText("Z");
+        charging->setVisible(false);
+
+        const auto design_sim_offset = 378; // this offset is not final
+        sim                          = new SIM(this, design_sim_offset, 17);
+
+        // icon of the lock
+        lock = new gui::Image(this, 240 - 11, 17, 0, 0, "lock");
+
+        // time label
+        timeLabel = new Label(this, 0, 0, 480, this->drawArea.h);
+        timeLabel->setFilled(false);
+        timeLabel->setBorderColor(gui::ColorNoColor);
+        timeLabel->setFont(style::header::font::time);
+        timeLabel->setText("00:00");
+        timeLabel->setAlignement(
+            gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+    }
+
+    void TopBar::setActive(std::list<std::pair<TopBar::Elements, bool>> elements)
+    {
+        for (auto el : elements) {
+            setActive(el.first, el.second);
+        }
+    }
+
+    void TopBar::setActive(TopBar::Elements element, bool active)
+    {
+        switch (element) {
+        case Elements::BATTERY: {
             elements.battery = active;
-            if (Store::Battery::get().state == Store::Battery::State::Discharging)
-            {
+            if (Store::Battery::get().state == Store::Battery::State::Discharging) {
                 setBatteryLevel(active ? Store::Battery::get().level : 0);
             }
-            else
-            {
-                if (active)
-                {
+            else {
+                if (active) {
                     setBatteryCharging(true);
                 }
-                else
-                {
+                else {
                     charging->setVisible(false);
                     setBatteryLevel(0);
                 }
             }
         } break;
-		case Elements::LOCK: {
+        case Elements::LOCK: {
             elements.lock = active;
             lock->setVisible(active);
-			if( active )
-				timeLabel->setVisible(false);
-		} break;
-		case Elements::SIGNAL: {
+            if (active)
+                timeLabel->setVisible(false);
+        } break;
+        case Elements::SIGNAL: {
             elements.signal = active;
             updateSignalStrength();
         } break;
-		case Elements::TIME: {
+        case Elements::TIME: {
             elements.time = active;
             timeLabel->setVisible(active);
-			if( active )
-				lock->setVisible(false);
-		} break;
+            if (active)
+                lock->setVisible(false);
+        } break;
         case Elements::SIM:
             elements.sim = active;
             simSet();
             break;
-    };
-}
+        };
+    }
 
-uint32_t calculateBatteryLavel(uint32_t percentage)
-{
-    uint32_t level = 0;
-    if (percentage <= 5)
-        level = 0;
-    else if (percentage <= 27)
-        level = 1;
-    else if (percentage <= 50)
-        level = 2;
-    else if (percentage <= 73)
-        level = 3;
-    else if (percentage <= 95)
-        level = 4;
-    else
-        level = 5;
+    uint32_t calculateBatteryLavel(uint32_t percentage)
+    {
+        uint32_t level = 0;
+        if (percentage <= 5)
+            level = 0;
+        else if (percentage <= 27)
+            level = 1;
+        else if (percentage <= 50)
+            level = 2;
+        else if (percentage <= 73)
+            level = 3;
+        else if (percentage <= 95)
+            level = 4;
+        else
+            level = 5;
 
-    if (level >= batteryLevelCount)
-    {
-        LOG_ERROR("Battery level calculations are done wrong!");
-        return batteryLevelCount - 1;
-    }
-    return level;
-}
-
-bool TopBar::setBatteryLevel(uint32_t percent)
-{
-    if (Store::Battery::get().state != Store::Battery::State::Discharging)
-    {
-        return false;
-    }
-    charging->setVisible(false);
-    batteryShowBars(calculateBatteryLavel(percent));
-    return true;
-}
-
-void TopBar::setBatteryCharging(bool plugged)
-{
-    if (plugged)
-    {
-        batteryShowBars(0);
-    }
-    if (charging == nullptr)
-        return;
-    if (plugged)
-    {
-        charging->setVisible(true);
-        batteryShowBars(0);
-    }
-    else
-    {
-        charging->setVisible(false);
-        setBatteryLevel(Store::Battery::get().level);
-    }
-}
-
-bool TopBar::updateSignalStrength()
-{
-    for (uint32_t i = 0; i < signalImgCount; i++)
-    {
-        signal[i]->setVisible(false);
-    }
-    if (elements.signal)
-    {
-        auto rssiBar = Store::GSM::get()->getSignalStrength().rssiBar;
-        if (rssiBar < Store::RssiBar::noOfSupprtedBars)
-        {
-            signal[static_cast<size_t>(rssiBar)]->setVisible(true);
-            return true;
+        if (level >= batteryLevelCount) {
+            LOG_ERROR("Battery level calculations are done wrong!");
+            return batteryLevelCount - 1;
         }
-        return false;
+        return level;
     }
-    return true;
-}
 
-void TopBar::setTime( const UTF8& time ) {
-	timeLabel->setText(time);
-}
-
-void TopBar::setTime( const uint32_t& time, bool mode24H ) {
-
-	std::time_t t= time;
-    setTime(utils::time::Time());
-
-    timeMode = (mode24H ? TimeMode::TIME_24H : TimeMode::TIME_12H);
-    this->time = time;
-}
-
-UTF8 TopBar::getTimeString() {
-	setTime( time, (timeMode == TimeMode::TIME_24H )?true:false );
-	return timeLabel->getText();
-}
-
-std::list<DrawCommand*> TopBar::buildDrawList() {
-
-	//make sure that time text is updated.
-	setTime( time, (timeMode == TimeMode::TIME_24H )?true:false );
-
-	return Rect::buildDrawList();
-}
-
-void TopBar::simSet()
-{
-    if (!sim)
+    bool TopBar::setBatteryLevel(uint32_t percent)
     {
-        return;
+        if (Store::Battery::get().state != Store::Battery::State::Discharging) {
+            return false;
+        }
+        charging->setVisible(false);
+        batteryShowBars(calculateBatteryLavel(percent));
+        return true;
     }
-    else if (elements.sim)
+
+    void TopBar::setBatteryCharging(bool plugged)
     {
-        return sim->show(Store::GSM::get()->sim);
+        if (plugged) {
+            batteryShowBars(0);
+        }
+        if (charging == nullptr)
+            return;
+        if (plugged) {
+            charging->setVisible(true);
+            batteryShowBars(0);
+        }
+        else {
+            charging->setVisible(false);
+            setBatteryLevel(Store::Battery::get().level);
+        }
+    }
+
+    bool TopBar::updateSignalStrength()
+    {
+        for (uint32_t i = 0; i < signalImgCount; i++) {
+            signal[i]->setVisible(false);
+        }
+        if (elements.signal) {
+            auto rssiBar = Store::GSM::get()->getSignalStrength().rssiBar;
+            if (rssiBar < Store::RssiBar::noOfSupprtedBars) {
+                signal[static_cast<size_t>(rssiBar)]->setVisible(true);
+                return true;
+            }
+            return false;
+        }
+        return true;
+    }
+
+    void TopBar::setTime(const UTF8 &time)
+    {
+        timeLabel->setText(time);
+    }
+
+    void TopBar::setTime(const uint32_t &time, bool mode24H)
+    {
+
+        std::time_t t = time;
+        setTime(utils::time::Time());
+
+        timeMode   = (mode24H ? TimeMode::TIME_24H : TimeMode::TIME_12H);
+        this->time = time;
+    }
+
+    UTF8 TopBar::getTimeString()
+    {
+        setTime(time, (timeMode == TimeMode::TIME_24H) ? true : false);
+        return timeLabel->getText();
+    }
+
+    std::list<DrawCommand *> TopBar::buildDrawList()
+    {
+
+        // make sure that time text is updated.
+        setTime(time, (timeMode == TimeMode::TIME_24H) ? true : false);
+
+        return Rect::buildDrawList();
+    }
+
+    void TopBar::simSet()
+    {
+        if (!sim) {
+            return;
+        }
+        else if (elements.sim) {
+            return sim->show(Store::GSM::get()->sim);
+        }
+        sim->visible = false;
     }
-    sim->visible = false;
-}
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/TopBar.hpp b/module-gui/gui/widgets/TopBar.hpp
index e1227122a..baa3757bf 100644
--- a/module-gui/gui/widgets/TopBar.hpp
+++ b/module-gui/gui/widgets/TopBar.hpp
@@ -15,10 +15,11 @@
 #include "TopBar/SIM.hpp"
 #include <common_data/EventStore.hpp>
 
-namespace gui {
+namespace gui
+{
 
     static const uint32_t batteryLevelCount = 6;
-    static const uint32_t signalImgCount = 6;
+    static const uint32_t signalImgCount    = 6;
 
     /// Header of most of design Windows
     ///
@@ -58,8 +59,8 @@ namespace gui {
         Image *signal[static_cast<size_t>(Store::RssiBar::noOfSupprtedBars)];
         Image *lock;
         std::array<Image *, batteryLevelCount> battery = {nullptr};
-        Label *charging = nullptr;
-        gui::SIM *sim = nullptr;
+        Label *charging                                = nullptr;
+        gui::SIM *sim                                  = nullptr;
         void prepareWidget();
         static TimeMode timeMode;
 
@@ -93,7 +94,8 @@ namespace gui {
         void setActive(TopBar::Elements element, bool active);
         void setActive(std::list<std::pair<TopBar::Elements, bool>> elements);
         /**
-         * @brief Sets charge level of the battery based on percent value. This will cause appropriate image to be displayed.
+         * @brief Sets charge level of the battery based on percent value. This will cause appropriate image to be
+         * displayed.
          * @return if display should be refreshed or not
          */
         bool setBatteryLevel(uint32_t percent);
@@ -116,7 +118,7 @@ namespace gui {
 
         // virtual methods from Item
         std::list<DrawCommand *> buildDrawList() override;
-};
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/gui/widgets/TopBar/SIM.cpp b/module-gui/gui/widgets/TopBar/SIM.cpp
index 894f50489..c597ef766 100644
--- a/module-gui/gui/widgets/TopBar/SIM.cpp
+++ b/module-gui/gui/widgets/TopBar/SIM.cpp
@@ -11,12 +11,10 @@ namespace gui
 
     void SIM::show(Store::GSM::SIM state)
     {
-        if (state == current)
-        {
+        if (state == current) {
             return;
         }
-        switch (state)
-        {
+        switch (state) {
         case GSM::SIM::SIM1:
             set(sim1);
             break;
diff --git a/module-gui/gui/widgets/TopBar/SIM.hpp b/module-gui/gui/widgets/TopBar/SIM.hpp
index ca31e16ec..4dfac694c 100644
--- a/module-gui/gui/widgets/TopBar/SIM.hpp
+++ b/module-gui/gui/widgets/TopBar/SIM.hpp
@@ -11,12 +11,12 @@ namespace gui
 
       public:
         /// create first image (sim unknown) and set it
-        const unsigned int w = 32;
-        const unsigned int h = 24;
-        const char *sim1 = "sim1";             // sim 1 indicator
-        const char *sim2 = "sim2";             // sim 2 indicator
+        const unsigned int w   = 32;
+        const unsigned int h   = 24;
+        const char *sim1       = "sim1";       // sim 1 indicator
+        const char *sim2       = "sim2";       // sim 2 indicator
         const char *simunknown = "simunknown"; // sim - unknown sim state indicator (i.e. no initialization was done)
-        const char *simfailed = "simfail";     // sim - notification for sim failure
+        const char *simfailed  = "simfail";    // sim - notification for sim failure
 
         /// check if sim set in state -> if not -> show new sim
         void show(Store::GSM::SIM state);
diff --git a/module-gui/gui/widgets/Window.cpp b/module-gui/gui/widgets/Window.cpp
index f7bbb5e8b..4e5c288b4 100644
--- a/module-gui/gui/widgets/Window.cpp
+++ b/module-gui/gui/widgets/Window.cpp
@@ -5,70 +5,75 @@
  *      Author: robert
  */
 #include <algorithm>
-//gui
+// gui
 #include "../core/BoundingBox.hpp"
 #include "../Common.hpp"
 #include "Window.hpp"
 #include "../core/DrawCommand.hpp"
 
-namespace gui {
+namespace gui
+{
 
-    Window::Window(std::string name, uint32_t id) : Item(), windowID{id}, refreshMode{RefreshModes::GUI_REFRESH_FAST}, name{name}
+    Window::Window(std::string name, uint32_t id)
+        : Item(), windowID{id}, refreshMode{RefreshModes::GUI_REFRESH_FAST}, name{name}
+    {}
+
+    Window::~Window()
+    {}
+
+    void Window::onBeforeShow(ShowMode mode, SwitchData *data)
+    {}
+
+    void Window::getRefreshArea(RefreshModes &mode, uint16_t &x, uint16_t &y, uint16_t &w, uint16_t &h)
     {
+        x    = widgetArea.x;
+        y    = widgetArea.y;
+        w    = widgetArea.w;
+        h    = widgetArea.h;
+        mode = refreshMode;
     }
 
-Window::~Window() {
-}
+    bool Window::handleSwitchData(SwitchData *data)
+    {
+        return true;
+    }
 
-void Window::onBeforeShow( ShowMode mode, SwitchData* data ) {
-}
+    std::list<DrawCommand *> Window::buildDrawList()
+    {
 
-void Window::getRefreshArea( RefreshModes& mode, uint16_t& x, uint16_t&y, uint16_t& w, uint16_t& h ) {
-	x = widgetArea.x;
-	y = widgetArea.y;
-	w = widgetArea.w;
-	h = widgetArea.h;
-	mode = refreshMode;
-}
+        std::list<DrawCommand *> commands;
+        std::list<DrawCommand *> childrenCommands = Item::buildDrawList();
 
-bool Window::handleSwitchData( SwitchData* data ) {
-	return true;
-}
+        DrawCommand *clearCommand = new DrawCommand();
+        clearCommand->id          = DrawCommandID::GUI_DRAW_CLEAR;
 
+        commands.push_back(clearCommand);
 
-std::list<DrawCommand*> Window::buildDrawList() {
+        if (!childrenCommands.empty()) {
+            commands.splice(commands.end(), childrenCommands);
+        }
 
-	std::list<DrawCommand*> commands;
-	std::list<DrawCommand*> childrenCommands = Item::buildDrawList();
+        return commands;
+    }
 
-	DrawCommand* clearCommand = new DrawCommand();
-	clearCommand->id = DrawCommandID::GUI_DRAW_CLEAR;
+    // bool Window::onDatabaseMessage( const dbus_msg_t* msg ) {
+    //	return false;
+    //}
 
-	commands.push_back(clearCommand);
+    bool Window::onInput(const InputEvent &inputEvent)
+    {
+        auto res = false;
+        if (focusItem != nullptr)
+            res = focusItem->onInput(inputEvent);
 
-	if( !childrenCommands.empty() ) {
-		commands.splice( commands.end(), childrenCommands );
-	}
+        if (res)
+            return true;
 
-	return commands;
-}
+        // if focused item didn't handle the key event and it was navigation key
+        // check if moving focus is possible
+        return handleNavigation(inputEvent);
 
-//bool Window::onDatabaseMessage( const dbus_msg_t* msg ) {
-//	return false;
-//}
-
-
-bool Window::onInput( const InputEvent& inputEvent) {
-	auto res = false;
-	if( focusItem != nullptr ) res =  focusItem->onInput(inputEvent);
-
-	if( res ) return true;
-	
-	// if focused item didn't handle the key event and it was navigation key
-	// check if moving focus is possible
-    return handleNavigation(inputEvent);
-
-    return false;
-}
+        return false;
+    }
 
 } /* namespace gui */
diff --git a/module-gui/gui/widgets/Window.hpp b/module-gui/gui/widgets/Window.hpp
index 73d455c6c..488d42288 100644
--- a/module-gui/gui/widgets/Window.hpp
+++ b/module-gui/gui/widgets/Window.hpp
@@ -13,59 +13,68 @@
 #include "Common.hpp"
 #include "SwitchData.hpp"
 
-namespace gui {
+namespace gui
+{
 
-static uint32_t GUIWindowID=0;
+    static uint32_t GUIWindowID = 0;
 
-/// Base window for all UI windows
-///
-/// It consists of:
-/// 1. TopBar
-/// 2. BottomBar
-/// 3. Body defined per window between TopBar and BottomBar
-///
-/// All window switches are done based on Window::name and SwitchData
-/// All windows are statically build at start of application, and removed on application end
-/// To rebuild window one have to:
-///     1. set navigationItem to nullptr (othervise window will crash trying to execute focus callback on reomved element)
-///     2. Remove elements
-///     3. Add elements anew
-/// or:
-///     2. handle elements update
-class Window: public Item {
-protected:
-  /// unique ID of the window on phone (based on static GUIWindowID)
-  uint32_t windowID;
-  RefreshModes refreshMode;
-  /// name of window used for windows switching
-  std::string name;
+    /// Base window for all UI windows
+    ///
+    /// It consists of:
+    /// 1. TopBar
+    /// 2. BottomBar
+    /// 3. Body defined per window between TopBar and BottomBar
+    ///
+    /// All window switches are done based on Window::name and SwitchData
+    /// All windows are statically build at start of application, and removed on application end
+    /// To rebuild window one have to:
+    ///     1. set navigationItem to nullptr (othervise window will crash trying to execute focus callback on reomved
+    ///     element)
+    ///     2. Remove elements
+    ///     3. Add elements anew
+    /// or:
+    ///     2. handle elements update
+    class Window : public Item
+    {
+      protected:
+        /// unique ID of the window on phone (based on static GUIWindowID)
+        uint32_t windowID;
+        RefreshModes refreshMode;
+        /// name of window used for windows switching
+        std::string name;
 
-public:
+      public:
+        Window(std::string name, uint32_t id = GUIWindowID++);
+        virtual ~Window();
 
-	Window( std::string name, uint32_t id=GUIWindowID++ );
-	virtual ~Window();
+        /// run every time in Application prior to showing window, except for when we came back to first window with no
+        /// switch data to show
+        /// @note this is most likely being duplicated by handleSwitchData
+        virtual void onBeforeShow(ShowMode mode, SwitchData *data);
+        virtual void getRefreshArea(RefreshModes &mode, uint16_t &x, uint16_t &y, uint16_t &w, uint16_t &h);
+        virtual int getWindowID()
+        {
+            return windowID;
+        };
+        /// run prior to onBeforeShow
+        /// @note this is most likely duplicate of onBeforeShow
+        virtual bool handleSwitchData(SwitchData *data);
 
-    /// run every time in Application prior to showing window, except for when we came back to first window with no switch data to show
-    /// @note this is most likely being duplicated by handleSwitchData
-    virtual void onBeforeShow(ShowMode mode, SwitchData *data);
-    virtual void getRefreshArea( RefreshModes& mode, uint16_t& x, uint16_t&y, uint16_t& w, uint16_t& h );
-	virtual int getWindowID() {return windowID; };
-    /// run prior to onBeforeShow
-    /// @note this is most likely duplicate of onBeforeShow
-    virtual bool handleSwitchData(SwitchData *data);
+        /// This method rebuilds window using updated phone's settings. Internal state must be preserved.
+        virtual void rebuild() = 0;
+        /// Method to build window's interface
+        virtual void buildInterface() = 0;
+        /// Method to remove window's interface
+        virtual void destroyInterface() = 0;
 
-    /// This method rebuilds window using updated phone's settings. Internal state must be preserved.
-    virtual void rebuild() = 0;
-    /// Method to build window's interface
-    virtual void buildInterface() = 0;
-    /// Method to remove window's interface
-    virtual void destroyInterface() = 0;
-
-    // virtual methods from Item
-    bool onInput( const InputEvent& inputEvent ) override;
-	std::list<DrawCommand*> buildDrawList() override;
-	std::string getName() { return name; };
-};
+        // virtual methods from Item
+        bool onInput(const InputEvent &inputEvent) override;
+        std::list<DrawCommand *> buildDrawList() override;
+        std::string getName()
+        {
+            return name;
+        };
+    };
 
 } /* namespace gui */
 
diff --git a/module-gui/test/unittest_gui.cpp b/module-gui/test/unittest_gui.cpp
index 08bed7957..87836c418 100644
--- a/module-gui/test/unittest_gui.cpp
+++ b/module-gui/test/unittest_gui.cpp
@@ -33,374 +33,401 @@
 
 class vfs vfs;
 
-static const int FrameBufferWidth = 480;
+static const int FrameBufferWidth  = 480;
 static const int FrameBufferHeight = 600;
-static const int FrameBufferSize = FrameBufferWidth*FrameBufferHeight;
+static const int FrameBufferSize   = FrameBufferWidth * FrameBufferHeight;
 
-typedef struct {
-	uint32_t frameCount;
-	uint32_t width;
-	uint32_t height;
-}shared_memory;
-
-uint8_t* createSHMBuffer( std::string name )
+typedef struct
 {
-	shared_memory *shared_mem_ptr;
-	int fd_shm;
+    uint32_t frameCount;
+    uint32_t width;
+    uint32_t height;
+} shared_memory;
 
-	//check if shared memory blok is already created
-	if ((fd_shm = shm_open (name.c_str(), O_RDWR | O_CREAT , 0660)) == -1) {
-		std::cerr<<"shm is already created"<<std::endl;
-	}
-	else {
-		std::cout<<"shm created"<<std::endl;
-		if (ftruncate (fd_shm, sizeof (shared_memory)+FrameBufferSize) == -1) {
-			std::cerr<<"shm is already created"<<std::endl;
-		}
-	}
-	if ((shared_mem_ptr = static_cast<shared_memory*>(mmap (NULL, sizeof (shared_memory)+FrameBufferSize, PROT_READ | PROT_WRITE, MAP_SHARED,
-			fd_shm, 0))) == MAP_FAILED) {
-		std::cerr<<"mmap failed"<<std::endl;
-	}
+uint8_t *createSHMBuffer(std::string name)
+{
+    shared_memory *shared_mem_ptr;
+    int fd_shm;
 
-	return reinterpret_cast<uint8_t*>(shared_mem_ptr);
+    // check if shared memory blok is already created
+    if ((fd_shm = shm_open(name.c_str(), O_RDWR | O_CREAT, 0660)) == -1) {
+        std::cerr << "shm is already created" << std::endl;
+    }
+    else {
+        std::cout << "shm created" << std::endl;
+        if (ftruncate(fd_shm, sizeof(shared_memory) + FrameBufferSize) == -1) {
+            std::cerr << "shm is already created" << std::endl;
+        }
+    }
+    if ((shared_mem_ptr = static_cast<shared_memory *>(
+             mmap(NULL, sizeof(shared_memory) + FrameBufferSize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_shm, 0))) ==
+        MAP_FAILED) {
+        std::cerr << "mmap failed" << std::endl;
+    }
+
+    return reinterpret_cast<uint8_t *>(shared_mem_ptr);
 }
 
 using namespace std;
 
-bool bouindingBoxTest() {
+bool bouindingBoxTest()
+{
 
-	gui::BoundingBox result;
-	if( gui::BoundingBox::intersect( gui::BoundingBox(0,0,15,15), gui::BoundingBox(15,0,15,15), result))
-		return false;
-	if( gui::BoundingBox::intersect( gui::BoundingBox(0,0,15,15), gui::BoundingBox( 0,15,15,15), result))
-		return false;
-	if( gui::BoundingBox::intersect( gui::BoundingBox(0,0,15,15), gui::BoundingBox(-15,0,15,15), result))
-		return false;
-	if( gui::BoundingBox::intersect( gui::BoundingBox(0,0,15,15), gui::BoundingBox( 0, -15,15,15), result))
-		return false;
-	if( gui::BoundingBox::intersect( gui::BoundingBox(0,0,15,15), gui::BoundingBox(14,0,15,15), result) == false )
-		return false;
+    gui::BoundingBox result;
+    if (gui::BoundingBox::intersect(gui::BoundingBox(0, 0, 15, 15), gui::BoundingBox(15, 0, 15, 15), result))
+        return false;
+    if (gui::BoundingBox::intersect(gui::BoundingBox(0, 0, 15, 15), gui::BoundingBox(0, 15, 15, 15), result))
+        return false;
+    if (gui::BoundingBox::intersect(gui::BoundingBox(0, 0, 15, 15), gui::BoundingBox(-15, 0, 15, 15), result))
+        return false;
+    if (gui::BoundingBox::intersect(gui::BoundingBox(0, 0, 15, 15), gui::BoundingBox(0, -15, 15, 15), result))
+        return false;
+    if (gui::BoundingBox::intersect(gui::BoundingBox(0, 0, 15, 15), gui::BoundingBox(14, 0, 15, 15), result) == false)
+        return false;
 
-	return true;
+    return true;
 }
 
-bool getContextBoxTest() {
+bool getContextBoxTest()
+{
 
-	gui::Context* ctx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	ctx->fill( 0 );
+    gui::Context *ctx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    ctx->fill(0);
 
-	gui::Context* test = ctx->get( 17,17, 30,30 );
+    gui::Context *test = ctx->get(17, 17, 30, 30);
 
-	delete test;
-	test = ctx->get( -17,-17, 30,30 );
-	delete test;
+    delete test;
+    test = ctx->get(-17, -17, 30, 30);
+    delete test;
 
-	delete ctx;
+    delete ctx;
 
-	return true;
+    return true;
 }
 
-bool insertContextTest() {
+bool insertContextTest()
+{
 
-	gui::Context* dstCtx;
-	gui::Context* insCtx;
+    gui::Context *dstCtx;
+    gui::Context *insCtx;
 
-	LOG_INFO("RECTANGLE INSIDE");
-	dstCtx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	dstCtx->fill( 0 );
-	insCtx = new gui::Context( static_cast<unsigned short>(28), static_cast<unsigned short>(28) );
-	insCtx->fill( 15 );
-	dstCtx->insert(1,1, insCtx );
-	delete dstCtx;
-	delete insCtx;
+    LOG_INFO("RECTANGLE INSIDE");
+    dstCtx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    dstCtx->fill(0);
+    insCtx = new gui::Context(static_cast<unsigned short>(28), static_cast<unsigned short>(28));
+    insCtx->fill(15);
+    dstCtx->insert(1, 1, insCtx);
+    delete dstCtx;
+    delete insCtx;
 
-	LOG_INFO("2 COLUMNS ON RIGHT SIDE, TOP AND BOTTOM ROW UNTOUCHED");
-	dstCtx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	dstCtx->fill( 0 );
-	insCtx = new gui::Context( static_cast<unsigned short>(28), static_cast<unsigned short>(28) );
-	insCtx->fill( 15 );
-	dstCtx->insert(28,1, insCtx );
-	delete dstCtx;
-	delete insCtx;
+    LOG_INFO("2 COLUMNS ON RIGHT SIDE, TOP AND BOTTOM ROW UNTOUCHED");
+    dstCtx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    dstCtx->fill(0);
+    insCtx = new gui::Context(static_cast<unsigned short>(28), static_cast<unsigned short>(28));
+    insCtx->fill(15);
+    dstCtx->insert(28, 1, insCtx);
+    delete dstCtx;
+    delete insCtx;
 
-	LOG_INFO("2 COLUMNS ON LEFT SIDE, TOP AND BOTTOM ROW UNTOUCHED");
-	dstCtx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	dstCtx->fill( 0 );
-	insCtx = new gui::Context( static_cast<unsigned short>(28), static_cast<unsigned short>(28) );
-	insCtx->fill( 15 );
-	dstCtx->insert(-26,1, insCtx );
-	delete dstCtx;
-	delete insCtx;
+    LOG_INFO("2 COLUMNS ON LEFT SIDE, TOP AND BOTTOM ROW UNTOUCHED");
+    dstCtx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    dstCtx->fill(0);
+    insCtx = new gui::Context(static_cast<unsigned short>(28), static_cast<unsigned short>(28));
+    insCtx->fill(15);
+    dstCtx->insert(-26, 1, insCtx);
+    delete dstCtx;
+    delete insCtx;
 
-	LOG_INFO("2 COLUMNS ON RIGHT SIDE");
-	dstCtx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	dstCtx->fill( 0 );
-	insCtx = new gui::Context( static_cast<unsigned short>(32), static_cast<unsigned short>(32) );
-	insCtx->fill( 15 );
-	dstCtx->insert(28,-1, insCtx );
-	delete dstCtx;
-	delete insCtx;
+    LOG_INFO("2 COLUMNS ON RIGHT SIDE");
+    dstCtx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    dstCtx->fill(0);
+    insCtx = new gui::Context(static_cast<unsigned short>(32), static_cast<unsigned short>(32));
+    insCtx->fill(15);
+    dstCtx->insert(28, -1, insCtx);
+    delete dstCtx;
+    delete insCtx;
 
-	LOG_INFO("2 COLUMNS ON LEFT SIDE");
-	dstCtx = new gui::Context( static_cast<unsigned short>(30), static_cast<unsigned short>(30) );
-	dstCtx->fill( 0 );
-	insCtx = new gui::Context( static_cast<unsigned short>(32), static_cast<unsigned short>(32) );
-	insCtx->fill( 15 );
-	dstCtx->insert(-30,-1, insCtx );
-	delete dstCtx;
-	delete insCtx;
+    LOG_INFO("2 COLUMNS ON LEFT SIDE");
+    dstCtx = new gui::Context(static_cast<unsigned short>(30), static_cast<unsigned short>(30));
+    dstCtx->fill(0);
+    insCtx = new gui::Context(static_cast<unsigned short>(32), static_cast<unsigned short>(32));
+    insCtx->fill(15);
+    dstCtx->insert(-30, -1, insCtx);
+    delete dstCtx;
+    delete insCtx;
 
-	return true;
+    return true;
 }
 
-bool drawRectangleTest( uint8_t* frameBuffer ) {
+bool drawRectangleTest(uint8_t *frameBuffer)
+{
 
-	//context for drawing commands
-	gui::Context* context = new gui::Context( static_cast<unsigned short>(480), static_cast<unsigned short>(600) );
-	context->fill( 15 );
+    // context for drawing commands
+    gui::Context *context = new gui::Context(static_cast<unsigned short>(480), static_cast<unsigned short>(600));
+    context->fill(15);
 
-	//renderer class that will perform drawing
-	gui::Renderer renderer;
+    // renderer class that will perform drawing
+    gui::Renderer renderer;
 
-	//vector with draw commands
-	std::vector<gui::DrawCommand*> commands;
+    // vector with draw commands
+    std::vector<gui::DrawCommand *> commands;
 
-	//simple filled rectangle with no rounded corners
-	gui::CommandRectangle* rectTop = new gui::CommandRectangle();
-	gui::CommandRectangle* rectBottom = new gui::CommandRectangle();
-	gui::CommandRectangle* rectLeft = new gui::CommandRectangle();
-	gui::CommandRectangle* rectRight = new gui::CommandRectangle();
-	gui::CommandRectangle* rectFull = new gui::CommandRectangle();
+    // simple filled rectangle with no rounded corners
+    gui::CommandRectangle *rectTop    = new gui::CommandRectangle();
+    gui::CommandRectangle *rectBottom = new gui::CommandRectangle();
+    gui::CommandRectangle *rectLeft   = new gui::CommandRectangle();
+    gui::CommandRectangle *rectRight  = new gui::CommandRectangle();
+    gui::CommandRectangle *rectFull   = new gui::CommandRectangle();
 
-	rectTop->areaX = 5;	rectTop->areaY = 5;
-	rectTop->areaW = 8;	rectTop->areaH = 8;
-	rectTop->x = 5; rectTop->y = 5;
-	rectTop->w = 8;	rectTop->h = 8;
-	rectTop->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT |
-		gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
-		gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
+    rectTop->areaX = 5;
+    rectTop->areaY = 5;
+    rectTop->areaW = 8;
+    rectTop->areaH = 8;
+    rectTop->x     = 5;
+    rectTop->y     = 5;
+    rectTop->w     = 8;
+    rectTop->h     = 8;
+    rectTop->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT | gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
+                     gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
 
-	*rectBottom = *rectTop;
-	rectBottom->areaX = 31;	rectBottom->areaY = 5;
-	rectBottom->x = 31; rectBottom->y = 5;
-	rectBottom->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT |
-		gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
-		gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP;
+    *rectBottom       = *rectTop;
+    rectBottom->areaX = 31;
+    rectBottom->areaY = 5;
+    rectBottom->x     = 31;
+    rectBottom->y     = 5;
+    rectBottom->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT | gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
+                        gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP;
 
-	*rectLeft = *rectTop;
-	rectLeft->areaX = 5;	rectLeft->areaY = 31;
-	rectLeft->x = 5; rectLeft->y = 31;
-	rectLeft->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP |
-	gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
-	gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
+    *rectLeft       = *rectTop;
+    rectLeft->areaX = 5;
+    rectLeft->areaY = 31;
+    rectLeft->x     = 5;
+    rectLeft->y     = 31;
+    rectLeft->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_RIGHT |
+                      gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
 
-	*rectRight = *rectTop;
-	rectRight->areaX = 31;	rectRight->areaY = 31;
-	rectRight->x = 31; rectRight->y = 31;
-	rectRight->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP |
-	gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT |
-	gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
+    *rectRight       = *rectTop;
+    rectRight->areaX = 31;
+    rectRight->areaY = 31;
+    rectRight->x     = 31;
+    rectRight->y     = 31;
+    rectRight->edges = gui::RectangleEdgeFlags::GUI_RECT_EDGE_TOP | gui::RectangleEdgeFlags::GUI_RECT_EDGE_LEFT |
+                       gui::RectangleEdgeFlags::GUI_RECT_EDGE_BOTTOM;
 
-	*rectFull = *rectTop;
-	rectFull->areaX = 18;	rectFull->areaY = 18;
-	rectFull->x = 18; rectFull->y = 18;
-	rectFull->edges = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
+    *rectFull       = *rectTop;
+    rectFull->areaX = 18;
+    rectFull->areaY = 18;
+    rectFull->x     = 18;
+    rectFull->y     = 18;
+    rectFull->edges = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
 
-	commands.push_back( rectTop );
-	commands.push_back( rectBottom );
-	commands.push_back( rectLeft );
-	commands.push_back( rectRight );
-	commands.push_back( rectFull );
+    commands.push_back(rectTop);
+    commands.push_back(rectBottom);
+    commands.push_back(rectLeft);
+    commands.push_back(rectRight);
+    commands.push_back(rectFull);
 
-	gui::CommandRectangle* rect = new gui::CommandRectangle();
-	rect->areaX = 5;	rect->areaY = 50;
-	rect->areaW = 50;	rect->areaH = 50;
-	rect->x = 5; rect->y = 50;
-	rect->w = 50;	rect->h = 50;
-	rect->borderColor = gui::Color( 12, 15 );
-	rect->fillColor = rect->borderColor;
-	rect->filled = true;
-	rect->edges = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
+    gui::CommandRectangle *rect = new gui::CommandRectangle();
+    rect->areaX                 = 5;
+    rect->areaY                 = 50;
+    rect->areaW                 = 50;
+    rect->areaH                 = 50;
+    rect->x                     = 5;
+    rect->y                     = 50;
+    rect->w                     = 50;
+    rect->h                     = 50;
+    rect->borderColor           = gui::Color(12, 15);
+    rect->fillColor             = rect->borderColor;
+    rect->filled                = true;
+    rect->edges                 = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
 
-	commands.push_back( rect );
+    commands.push_back(rect);
 
-	gui::CommandRectangle* rectRoundTR = new gui::CommandRectangle();
-	rectRoundTR->areaX = 5;	rectRoundTR->areaY = 150;
-	rectRoundTR->areaW = 150;	rectRoundTR->areaH = 150;
-	rectRoundTR->x = 5; rectRoundTR->y = 150;
-	rectRoundTR->w = 150;	rectRoundTR->h = 150;
-	rectRoundTR->edges = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
-	rectRoundTR->radius = 25;
-	rectRoundTR->penWidth = 5;
+    gui::CommandRectangle *rectRoundTR = new gui::CommandRectangle();
+    rectRoundTR->areaX                 = 5;
+    rectRoundTR->areaY                 = 150;
+    rectRoundTR->areaW                 = 150;
+    rectRoundTR->areaH                 = 150;
+    rectRoundTR->x                     = 5;
+    rectRoundTR->y                     = 150;
+    rectRoundTR->w                     = 150;
+    rectRoundTR->h                     = 150;
+    rectRoundTR->edges                 = gui::RectangleEdgeFlags::GUI_RECT_ALL_EDGES;
+    rectRoundTR->radius                = 25;
+    rectRoundTR->penWidth              = 5;
 
-	commands.push_back( rectRoundTR );
+    commands.push_back(rectRoundTR);
 
-	//render commands
-	renderer.render( context, commands );
+    // render commands
+    renderer.render(context, commands);
 
-	//copy context to shared memory
-	memcpy( frameBuffer, context->getData(), FrameBufferSize );
+    // copy context to shared memory
+    memcpy(frameBuffer, context->getData(), FrameBufferSize);
 
-	//cleanup
-	for( auto cmd : commands )
-		delete cmd;
+    // cleanup
+    for (auto cmd : commands)
+        delete cmd;
 
-	delete context;
+    delete context;
 
-	return true;
+    return true;
 }
 
-bool drawWindowWithLabelsTest( uint8_t* frameBuffer ) {
+bool drawWindowWithLabelsTest(uint8_t *frameBuffer)
+{
 
-	gui::Context* context = new gui::Context( static_cast<unsigned short>(480), static_cast<unsigned short>(600) );
-	context->fill( 15 );
+    gui::Context *context = new gui::Context(static_cast<unsigned short>(480), static_cast<unsigned short>(600));
+    context->fill(15);
 
-	//renderer class that will perform drawing
-	gui::Renderer renderer;
+    // renderer class that will perform drawing
+    gui::Renderer renderer;
 
-	gui::Window* win = new gui::Window("MAIN");
-	win->setSize( 480, 600 );
+    gui::Window *win = new gui::Window("MAIN");
+    win->setSize(480, 600);
 
-	//add label with time
-	gui::Label* label = new gui::Label(win, 20, 80, 440, 120, "TOP LEFT");
-	label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_TOP));
-	label->setRadius(5);
-	label->setFont( "gt_pressura_bold_65" );
+    // add label with time
+    gui::Label *label = new gui::Label(win, 20, 80, 440, 120, "TOP LEFT");
+    label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_LEFT, gui::Alignment::ALIGN_VERTICAL_TOP));
+    label->setRadius(5);
+    label->setFont("gt_pressura_bold_65");
 
-	label = new gui::Label(win, 20, 280, 440, 120, "2xCENTER#####");
-	label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-	label->setRadius(10);
-	label->setPenWidth( 5 );
-	label->setFont( "gt_pressura_bold_65" );
+    label = new gui::Label(win, 20, 280, 440, 120, "2xCENTER#####");
+    label->setAlignement(
+        gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+    label->setRadius(10);
+    label->setPenWidth(5);
+    label->setFont("gt_pressura_bold_65");
 
-	label = new gui::Label(win, 20, 480, 440, 120, "BOTTOM RIGHT");
-	label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
-	label->setRadius(15);
-	label->setDotsMode(true);
-	label->setFont( "gt_pressura_bold_65" );
+    label = new gui::Label(win, 20, 480, 440, 120, "BOTTOM RIGHT");
+    label->setAlignement(gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_RIGHT, gui::Alignment::ALIGN_VERTICAL_BOTTOM));
+    label->setRadius(15);
+    label->setDotsMode(true);
+    label->setFont("gt_pressura_bold_65");
 
-	//vector with draw commands
+    // vector with draw commands
 
-	//context for drawing commands
-	std::list<gui::DrawCommand*> commandsList = win->buildDrawList();
-	std::vector<gui::DrawCommand*> commands { commandsList.begin(), commandsList.end()};
+    // context for drawing commands
+    std::list<gui::DrawCommand *> commandsList = win->buildDrawList();
+    std::vector<gui::DrawCommand *> commands{commandsList.begin(), commandsList.end()};
 
-	delete win;
+    delete win;
 
-	//render commands
-	renderer.render( context, commands );
+    // render commands
+    renderer.render(context, commands);
 
-	//copy context to shared memory
-	memcpy( frameBuffer, context->getData(), FrameBufferSize );
+    // copy context to shared memory
+    memcpy(frameBuffer, context->getData(), FrameBufferSize);
 
-	//cleanup
-	for( auto cmd : commands )
-		delete cmd;
+    // cleanup
+    for (auto cmd : commands)
+        delete cmd;
 
-	delete context;
-	return true;
+    delete context;
+    return true;
 }
 
-bool drawWindowWithHBoxTest( uint8_t* frameBuffer ) {
+bool drawWindowWithHBoxTest(uint8_t *frameBuffer)
+{
 
-	gui::Context* context = new gui::Context( static_cast<unsigned short>(480), static_cast<unsigned short>(600) );
-	context->fill( 15 );
+    gui::Context *context = new gui::Context(static_cast<unsigned short>(480), static_cast<unsigned short>(600));
+    context->fill(15);
 
-	//renderer class that will perform drawing
-	gui::Renderer renderer;
+    // renderer class that will perform drawing
+    gui::Renderer renderer;
 
-	gui::Window* win = new gui::Window("MAIN");
-	win->setSize( 480, 600 );
+    gui::Window *win = new gui::Window("MAIN");
+    win->setSize(480, 600);
 
-	gui::HBox* hBox = new gui::HBox( win, 50, 50, 380, 500 );
+    gui::HBox *hBox = new gui::HBox(win, 50, 50, 380, 500);
 
-	gui::Rect* maxW1 = new gui::Rect();
-	maxW1->setFillColor(gui::Color( 5, 0));
-	maxW1->setFilled(true);
-	maxW1->setMaxSize( 50, 300 );
+    gui::Rect *maxW1 = new gui::Rect();
+    maxW1->setFillColor(gui::Color(5, 0));
+    maxW1->setFilled(true);
+    maxW1->setMaxSize(50, 300);
 
-	gui::Label* maxW4 = new gui::Label();
-	maxW4->setText("Top Left corner");
-	maxW4->setDotsMode(true);
-	//maxW4->setRadius( 20 );
-	//maxW4->setMargins( gui::Margins(20,20,20,20));
-	maxW4->setMaxSize( 275, 60 );
+    gui::Label *maxW4 = new gui::Label();
+    maxW4->setText("Top Left corner");
+    maxW4->setDotsMode(true);
+    // maxW4->setRadius( 20 );
+    // maxW4->setMargins( gui::Margins(20,20,20,20));
+    maxW4->setMaxSize(275, 60);
 
-	gui::Rect* maxW2 = new gui::Rect();
-	maxW2->setFillColor(gui::Color( 8, 0));
-	maxW2->setFilled(true);
-	maxW2->setMaxSize( 35, 300 );
+    gui::Rect *maxW2 = new gui::Rect();
+    maxW2->setFillColor(gui::Color(8, 0));
+    maxW2->setFilled(true);
+    maxW2->setMaxSize(35, 300);
 
-	gui::Rect* maxW3 = new gui::Rect();
-	maxW3->setFillColor(gui::Color( 11, 0));
-	maxW3->setFilled(true);
-	maxW3->setMaxSize( 30, 300 );
+    gui::Rect *maxW3 = new gui::Rect();
+    maxW3->setFillColor(gui::Color(11, 0));
+    maxW3->setFilled(true);
+    maxW3->setMaxSize(30, 300);
 
-	hBox->addWidget(maxW1);
-	hBox->addWidget(maxW4);
-	hBox->addWidget(maxW2);
+    hBox->addWidget(maxW1);
+    hBox->addWidget(maxW4);
+    hBox->addWidget(maxW2);
 
-	gui::VBox* vBox = new gui::VBox( hBox, 10, 155, 460, 600-160 );
+    gui::VBox *vBox = new gui::VBox(hBox, 10, 155, 460, 600 - 160);
 
-	gui::Rect* maxH1 = new gui::Rect();
-	maxH1->setMaxSize( 10, 80 );
+    gui::Rect *maxH1 = new gui::Rect();
+    maxH1->setMaxSize(10, 80);
 
-	gui::Rect* maxH2 = new gui::Rect();
-	maxH2->setMaxSize( 15, 300 );
+    gui::Rect *maxH2 = new gui::Rect();
+    maxH2->setMaxSize(15, 300);
 
-	gui::Rect* maxH3 = new gui::Rect();
-	maxH3->setMaxSize( 30, 300 );
+    gui::Rect *maxH3 = new gui::Rect();
+    maxH3->setMaxSize(30, 300);
 
-	gui::Label* maxH4 = new gui::Label();
-	maxH4->setText("Hello Mudita");
-	maxH4->setRadius( 20 );
-	maxH4->setAlignement( gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
-	maxH4->setMaxSize( 75, 60 );
+    gui::Label *maxH4 = new gui::Label();
+    maxH4->setText("Hello Mudita");
+    maxH4->setRadius(20);
+    maxH4->setAlignement(
+        gui::Alignment(gui::Alignment::ALIGN_HORIZONTAL_CENTER, gui::Alignment::ALIGN_VERTICAL_CENTER));
+    maxH4->setMaxSize(75, 60);
 
-    //TODO:M.P unit test for GUI should be fixed/updated gui::Image* img1 = new gui::Image();
-    //TODO:M.P unit test for GUI should be fixed/updated uint16_t id = gui::ImageManager::getInstance().load("loudspeaker.mpi");
-    //TODO:M.P unit test for GUI should be fixed/updated img1->setImageWithID( id );
+    // TODO:M.P unit test for GUI should be fixed/updated gui::Image* img1 = new gui::Image();
+    // TODO:M.P unit test for GUI should be fixed/updated uint16_t id =
+    // gui::ImageManager::getInstance().load("loudspeaker.mpi");
+    // TODO:M.P unit test for GUI should be fixed/updated img1->setImageWithID( id );
 
+    vBox->addWidget(maxH1);
+    vBox->addWidget(maxH2);
+    vBox->addWidget(maxH4);
+    // TODO:M.P unit test for GUI should be fixed/updated vBox->addWidget( img1 );
+    vBox->addWidget(maxH3);
 
-	vBox->addWidget(maxH1);
-	vBox->addWidget(maxH2);
-	vBox->addWidget(maxH4);
-	//TODO:M.P unit test for GUI should be fixed/updated vBox->addWidget( img1 );
-	vBox->addWidget(maxH3);
+    hBox->addWidget(maxW3);
 
-	hBox->addWidget(maxW3);
+    // context for drawing commands
+    std::list<gui::DrawCommand *> commandsList = win->buildDrawList();
+    std::vector<gui::DrawCommand *> commands{commandsList.begin(), commandsList.end()};
 
-	//context for drawing commands
-	std::list<gui::DrawCommand*> commandsList = win->buildDrawList();
-	std::vector<gui::DrawCommand*> commands { commandsList.begin(), commandsList.end()};
+    delete win;
 
-	delete win;
+    // render commands
+    renderer.render(context, commands);
 
-	//render commands
-	renderer.render( context, commands );
+    // copy context to shared memory
+    memcpy(frameBuffer, context->getData(), FrameBufferSize);
 
-	//copy context to shared memory
-	memcpy( frameBuffer, context->getData(), FrameBufferSize );
+    // cleanup
+    for (auto cmd : commands)
+        delete cmd;
 
-	//cleanup
-	for( auto cmd : commands )
-		delete cmd;
-
-	delete context;
-	return true;
+    delete context;
+    return true;
 }
 
 #include <dirent.h>
 #include <errno.h>
 bool set_working_directory(std::string &dir)
 {
-    char* currdirname=get_current_dir_name();
-    if ( dir.c_str()[0] != '/' ) {
-        if( dir.c_str()[0] == '.') {
-            dir = std::string(dir.begin() +1, dir.end());
-        } else {
-            dir = "/"+dir;
+    char *currdirname = get_current_dir_name();
+    if (dir.c_str()[0] != '/') {
+        if (dir.c_str()[0] == '.') {
+            dir = std::string(dir.begin() + 1, dir.end());
+        }
+        else {
+            dir = "/" + dir;
         }
         dir = std::string(currdirname) + dir;
     }
@@ -411,82 +438,84 @@ bool set_working_directory(std::string &dir)
     }
     dir += "/assets";
     DIR *check_path = opendir(dir.c_str());
-    if( ENOENT == errno || check_path == NULL) {
+    if (ENOENT == errno || check_path == NULL) {
         LOG_ERROR("Working directory set: %s failure", dir.c_str());
         return 1;
-    } else {
+    }
+    else {
         closedir(check_path);
     }
     return 0;
 }
 
-int main( int argc, char* argv[] ) {
+int main(int argc, char *argv[])
+{
 
-	LOG_INFO("RUNNING UNIT TEST FOR GUI");
+    LOG_INFO("RUNNING UNIT TEST FOR GUI");
 
-	char cwd[256] = {0};
-	if (getcwd(cwd, sizeof(cwd)) != NULL) {
-		LOG_INFO("Current working directory: %s", cwd);
-	} else {
-		LOG_ERROR("getcwd() error");
-	}
+    char cwd[256] = {0};
+    if (getcwd(cwd, sizeof(cwd)) != NULL) {
+        LOG_INFO("Current working directory: %s", cwd);
+    }
+    else {
+        LOG_ERROR("getcwd() error");
+    }
 
-	string basePath = cwd;
-	if( argc != 2 ) {
-		LOG_INFO("No working directory provided. Using current one.");
-	}
-	else {
-		basePath = argv[1];
-	}
+    string basePath = cwd;
+    if (argc != 2) {
+        LOG_INFO("No working directory provided. Using current one.");
+    }
+    else {
+        basePath = argv[1];
+    }
 
-    if( set_working_directory(basePath) ) {
+    if (set_working_directory(basePath)) {
         LOG_INFO("Tu run this test successfully provide path to assets, i.e. ./build/unittest_gui build/sys");
         return 1;
     }
 
-	gui::FontManager::getInstance().init(basePath);
-    //TODO:M.P unit test for GUI should be fixed/updated gui::PixMapManager::getInstance().init( assetsPath );
+    gui::FontManager::getInstance().init(basePath);
+    // TODO:M.P unit test for GUI should be fixed/updated gui::PixMapManager::getInstance().init( assetsPath );
 
-	//create and map shared memory
-	std::string shmName = "pure_gui_fmbuf";
-	uint8_t* shmMemPtr = createSHMBuffer( shmName.c_str() ) + sizeof(shared_memory);
+    // create and map shared memory
+    std::string shmName = "pure_gui_fmbuf";
+    uint8_t *shmMemPtr  = createSHMBuffer(shmName.c_str()) + sizeof(shared_memory);
 
-	//BoundingBox tests
-	if (!bouindingBoxTest())
-		LOG_ERROR("BOUNDING BOX TEST: failed");
-	else
-		LOG_INFO("BOUNDING BOX TEST: pass");
+    // BoundingBox tests
+    if (!bouindingBoxTest())
+        LOG_ERROR("BOUNDING BOX TEST: failed");
+    else
+        LOG_INFO("BOUNDING BOX TEST: pass");
 
-	//getContextBox tests
-	if (!getContextBoxTest())
-		LOG_ERROR("GET CONTEXT TEST: failed");
-	else
-		LOG_INFO("GET CONTEXT TEST: pass");
+    // getContextBox tests
+    if (!getContextBoxTest())
+        LOG_ERROR("GET CONTEXT TEST: failed");
+    else
+        LOG_INFO("GET CONTEXT TEST: pass");
 
-	//insertContext tests
-	if (!insertContextTest())
-		LOG_ERROR("INSERT CONTEXT TEST: failed");
-	else
-		LOG_INFO("INSERT CONTEXT TEST: pass");
+    // insertContext tests
+    if (!insertContextTest())
+        LOG_ERROR("INSERT CONTEXT TEST: failed");
+    else
+        LOG_INFO("INSERT CONTEXT TEST: pass");
 
-	//draw rectangle tests
-	if (!drawRectangleTest( shmMemPtr ))
-		LOG_ERROR("DRAW RECTANGLE TEST: failed");
-	else
-		LOG_INFO("DRAW RECTANGLE TEST: pass");
+    // draw rectangle tests
+    if (!drawRectangleTest(shmMemPtr))
+        LOG_ERROR("DRAW RECTANGLE TEST: failed");
+    else
+        LOG_INFO("DRAW RECTANGLE TEST: pass");
 
-	//draw labels
-	if (!drawWindowWithLabelsTest( shmMemPtr ))
-		LOG_ERROR("DRAW WINDOW TEST: failed");
-	else
-		LOG_INFO("DRAW WINDOW TEST: pass");
+    // draw labels
+    if (!drawWindowWithLabelsTest(shmMemPtr))
+        LOG_ERROR("DRAW WINDOW TEST: failed");
+    else
+        LOG_INFO("DRAW WINDOW TEST: pass");
 
-	//draw labels
-	if (!drawWindowWithHBoxTest( shmMemPtr ))
-		LOG_ERROR("DRAW HBOX TEST: failed");
-	else
-		LOG_INFO("DRAW HBOX TEST: pass");
+    // draw labels
+    if (!drawWindowWithHBoxTest(shmMemPtr))
+        LOG_ERROR("DRAW HBOX TEST: failed");
+    else
+        LOG_INFO("DRAW HBOX TEST: pass");
 
-
-	return 0;
+    return 0;
 }
diff --git a/module-lwip/includes/arch/cc.h b/module-lwip/includes/arch/cc.h
index f5a47a28b..bdcd9c124 100644
--- a/module-lwip/includes/arch/cc.h
+++ b/module-lwip/includes/arch/cc.h
@@ -1,11 +1,13 @@
 #pragma once
 
-#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size) u8_t variable_name[LWIP_MEM_ALIGN_BUFFER(size)] \
-__attribute__((section(".sdram"))) __attribute__((aligned(4)));
+#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size)                                                               \
+    u8_t variable_name[LWIP_MEM_ALIGN_BUFFER(size)] __attribute__((section(".sdram"))) __attribute__((aligned(4)));
 
-#define LWIP_PLATFORM_ASSERT(x) do {printf("Assertion \"%s\" failed at line %d in %s\n", \
-                                     x, __LINE__, __FILE__); abort();} while(0)
+#define LWIP_PLATFORM_ASSERT(x)                                                                                        \
+    do {                                                                                                               \
+        printf("Assertion \"%s\" failed at line %d in %s\n", x, __LINE__, __FILE__);                                   \
+        abort();                                                                                                       \
+    } while (0)
 
-
-#define TCPIP_MBOX_SIZE                 1028
-#define TCPIP_THREAD_STACKSIZE          4096
+#define TCPIP_MBOX_SIZE        1028
+#define TCPIP_THREAD_STACKSIZE 4096
diff --git a/module-lwip/includes/lwipopts.h b/module-lwip/includes/lwipopts.h
index 04a42f27b..3c8270406 100644
--- a/module-lwip/includes/lwipopts.h
+++ b/module-lwip/includes/lwipopts.h
@@ -190,13 +190,13 @@ Some MCU allow computing and verifying the IP, UDP, TCP and ICMP checksums by ha
 #define CHECKSUM_CHECK_TCP 0
 #else
 /* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
-#define CHECKSUM_GEN_IP 1
+#define CHECKSUM_GEN_IP    1
 /* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
-#define CHECKSUM_GEN_UDP 1
+#define CHECKSUM_GEN_UDP   1
 /* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
-#define CHECKSUM_GEN_TCP 1
+#define CHECKSUM_GEN_TCP   1
 /* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
-#define CHECKSUM_CHECK_IP 1
+#define CHECKSUM_CHECK_IP  1
 /* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
 #define CHECKSUM_CHECK_UDP 1
 /* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
@@ -214,9 +214,9 @@ Some MCU allow computing and verifying the IP, UDP, TCP and ICMP checksums by ha
 // TODO: map these to <stdint.h>
 
 #ifdef LWIP_DEBUG
-#define U8_F "c"
-#define S8_F "c"
-#define X8_F "02x"
+#define U8_F  "c"
+#define S8_F  "c"
+#define X8_F  "02x"
 #define U16_F "u"
 #define S16_F "d"
 #define X16_F "x"
diff --git a/module-services/service-appmgr/ApplicationManager.cpp b/module-services/service-appmgr/ApplicationManager.cpp
index d560d3dd3..3ff4eb60d 100644
--- a/module-services/service-appmgr/ApplicationManager.cpp
+++ b/module-services/service-appmgr/ApplicationManager.cpp
@@ -32,812 +32,812 @@
 /// Auto phone lock disabled for now till the times when it's debugged
 /// #define AUTO_PHONE_LOCK_ENABLED
 
-//module-utils
+// module-utils
 #include "log/log.hpp"
 #include "i18/i18.hpp"
 
-namespace sapm {
+namespace sapm
+{
 
-    ApplicationDescription::ApplicationDescription(std::unique_ptr<app::ApplicationLauncher> launcher) : switchData{nullptr}
+    ApplicationDescription::ApplicationDescription(std::unique_ptr<app::ApplicationLauncher> launcher)
+        : switchData{nullptr}
     {
         this->launcher = std::move(launcher);
     }
 
     VirtualAppManager::VirtualAppManager(std::vector<std::unique_ptr<app::ApplicationLauncher>> &launchers)
     {
-        for (uint32_t i = 0; i < launchers.size(); ++i)
-        {
+        for (uint32_t i = 0; i < launchers.size(); ++i) {
             applications.push_back(new ApplicationDescription(std::move(launchers[i])));
         }
     }
 
-VirtualAppManager::~VirtualAppManager()
-{
-    for (auto it = applications.begin(); it != applications.end(); it++)
+    VirtualAppManager::~VirtualAppManager()
     {
-        delete *it;
+        for (auto it = applications.begin(); it != applications.end(); it++) {
+            delete *it;
+        }
     }
-}
 
-const char *VirtualAppManager::stateStr(State st)
-{
-    switch (st)
+    const char *VirtualAppManager::stateStr(State st)
     {
-    case State::IDLE:
-        return "IDLE";
-    case State::CLOSING_PREV_APP:
-        return "CLOSING_PREV_APP";
-    case State::WAITING_CLOSE_CONFIRMATION:
-        return "WAITING_CLOSE_CONFIRMATION";
-    case State::STARTING_NEW_APP:
-        return "STARTING_NEW_APP";
-    case State::WAITING_NEW_APP_REGISTRATION:
-        return "WAITING_NEW_APP_REGISTRATION";
-    case State::WAITING_LOST_FOCUS_CONFIRMATION:
-        return "WAITING_LOST_FOCUS_CONFIRMATION";
-    case State::WAITING_GET_FOCUS_CONFIRMATION:
-        return "WAITING_GET_FOCUS_CONFIRMATION";
+        switch (st) {
+        case State::IDLE:
+            return "IDLE";
+        case State::CLOSING_PREV_APP:
+            return "CLOSING_PREV_APP";
+        case State::WAITING_CLOSE_CONFIRMATION:
+            return "WAITING_CLOSE_CONFIRMATION";
+        case State::STARTING_NEW_APP:
+            return "STARTING_NEW_APP";
+        case State::WAITING_NEW_APP_REGISTRATION:
+            return "WAITING_NEW_APP_REGISTRATION";
+        case State::WAITING_LOST_FOCUS_CONFIRMATION:
+            return "WAITING_LOST_FOCUS_CONFIRMATION";
+        case State::WAITING_GET_FOCUS_CONFIRMATION:
+            return "WAITING_GET_FOCUS_CONFIRMATION";
+        }
+        // there was enum added - fix it adding it to case
+        return "FIX_ME";
     }
-    // there was enum added - fix it adding it to case
-    return "FIX_ME";
-}
 
-ApplicationDescription *VirtualAppManager::appFront()
-{
-    return applications.front();
-}
+    ApplicationDescription *VirtualAppManager::appFront()
+    {
+        return applications.front();
+    }
 
-ApplicationDescription *VirtualAppManager::appGet(const std::string &name)
-{
-    auto el = std::find_if(applications.begin(), applications.end(), [=](auto a) {
-        if (a->name() == name)
-            return true;
-        else
+    ApplicationDescription *VirtualAppManager::appGet(const std::string &name)
+    {
+        auto el = std::find_if(applications.begin(), applications.end(), [=](auto a) {
+            if (a->name() == name)
+                return true;
+            else
+                return false;
+        });
+        if (el == applications.end())
+            return nullptr;
+        else {
+            return *el;
+        }
+    }
+
+    /// set application as first on the applications vector
+    bool VirtualAppManager::appMoveFront(ApplicationDescription *app)
+    {
+        if (!app) {
             return false;
-    });
-    if (el == applications.end())
-        return nullptr;
-    else
-    {
-        return *el;
-    }
-}
-
-/// set application as first on the applications vector
-bool VirtualAppManager::appMoveFront(ApplicationDescription *app)
-{
-    if (!app)
-    {
+        }
+        auto el = std::find_if(applications.begin(), applications.end(), [=](auto a) { return a == app; });
+        if (el != applications.end()) {
+            applications.push_front(std::move(*el));
+            applications.erase(el);
+            return true;
+        }
         return false;
     }
-    auto el = std::find_if(applications.begin(), applications.end(), [=](auto a) { return a == app; });
-    if (el != applications.end())
-    {
-        applications.push_front(std::move(*el));
-        applications.erase(el);
-        return true;
-    }
-    return false;
-}
 
-/// get previous visible app - one on FOREGROUND
-ApplicationDescription *VirtualAppManager::appPrev()
-{
-    static bool init = true;
-    if (init)
+    /// get previous visible app - one on FOREGROUND
+    ApplicationDescription *VirtualAppManager::appPrev()
     {
-        init = false;
-        return nullptr;
+        static bool init = true;
+        if (init) {
+            init = false;
+            return nullptr;
+        }
+        if (applications.size() < 2) {
+            return nullptr;
+        }
+        return *std::next(applications.begin());
     }
-    if (applications.size() < 2)
+
+    void VirtualAppManager::setState(State st)
     {
-        return nullptr;
+        LOG_DEBUG("app: [%s] prev: [%s], state: (%s) -> (%s)",
+                  appFront()->name().c_str(),
+                  appPrev() ? appPrev()->name().c_str() : "",
+                  stateStr(state),
+                  stateStr(st));
+        state = st;
     }
-    return *std::next(applications.begin());
-}
 
-void VirtualAppManager::setState(State st)
-{
-    LOG_DEBUG("app: [%s] prev: [%s], state: (%s) -> (%s)", appFront()->name().c_str(), appPrev() ? appPrev()->name().c_str() : "", stateStr(state),
-              stateStr(st));
-    state = st;
-}
-
-std::list<ApplicationDescription *> &VirtualAppManager::getApps()
-{
-    return applications;
-}
-
-void VirtualAppManager::debug_log_app_list()
-{
-    std::string apps = "\n";
-    for (auto &el : getApps())
+    std::list<ApplicationDescription *> &VirtualAppManager::getApps()
     {
-        apps += "-> " + el->name() + " " + app::Application::stateStr(el->getState()) + "\n";
+        return applications;
     }
 
+    void VirtualAppManager::debug_log_app_list()
+    {
+        std::string apps = "\n";
+        for (auto &el : getApps()) {
+            apps += "-> " + el->name() + " " + app::Application::stateStr(el->getState()) + "\n";
+        }
+
 #if DEBUG_APPLICATION_MANAGEMENT == 1
-    LOG_DEBUG(apps.c_str());
+        LOG_DEBUG(apps.c_str());
 #endif
-}
+    }
 
-ApplicationManager::ApplicationManager(const std::string &name, sys::SystemManager *sysmgr, std::vector<std::unique_ptr<app::ApplicationLauncher>> &launchers)
-    : Service(name), VirtualAppManager(launchers), systemManager{sysmgr}
-{
-    blockingTimerID = CreateTimer(0xFFFFFFFF, false);
-}
-
-ApplicationManager::~ApplicationManager()
-{
-    systemManager = nullptr;
-}
-
-bool ApplicationManager::closeServices() {
-	bool ret = sys::SystemManager::DestroyService( "ServiceGUI", this );
-	if( ret ) {
-		LOG_INFO("Service: %s closed", "ServiceGUI");
-	}else {
-		LOG_FATAL("Service: %s is still running", "ServiceGUI");
-	}
-	ret = sys::SystemManager::DestroyService( "ServiceEink", this );
-	if( ret ) {
-		LOG_INFO("Service: %s closed", "ServiceEink");
-	}else {
-		LOG_FATAL("Service: %s is still running", "ServiceEink");
-	}
-	return true;
-}
-
-bool ApplicationManager::closeApplications() {
-
-	//if application is started, its in first plane or it's working in background
-	//it will be closed using SystemManager's API.
-    for (auto &app : getApps())
+    ApplicationManager::ApplicationManager(const std::string &name,
+                                           sys::SystemManager *sysmgr,
+                                           std::vector<std::unique_ptr<app::ApplicationLauncher>> &launchers)
+        : Service(name), VirtualAppManager(launchers), systemManager{sysmgr}
     {
-        if (app != nullptr && ((app->getState() == app::Application::State::ACTIVE_FORGROUND) ||
-                               (app->getState() == app::Application::State::ACTIVE_BACKGROUND) || (app->getState() == app::Application::State::ACTIVATING)))
-        {
-            LOG_INFO("Closing application: %s", app->name().c_str());
-            bool ret = sys::SystemManager::DestroyService(app->name(), this);
-            if (ret)
-            {
-                LOG_INFO("Application: %s closed", app->name().c_str());
-            }
-            else
-            {
-                LOG_FATAL("Application: %s is still running", app->name().c_str());
-            }
-            app->setState(app::Application::State::DEACTIVATED);
-        }
+        blockingTimerID = CreateTimer(0xFFFFFFFF, false);
     }
-    return true;
-}
 
-sys::Message_t ApplicationManager::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
+    ApplicationManager::~ApplicationManager()
+    {
+        systemManager = nullptr;
+    }
 
-    auto msgType = msgl->messageType;
-
-    switch( msgType ) {
-    case MessageType::APMInitPowerSaveMode: {
-        handlePowerSavingModeInit();
-    }
-    break;
-    case MessageType::APMPreventBlocking: {
-        //			LOG_INFO("Restarting screen locking timer");
-        ReloadTimer(blockingTimerID);
-    }
-    break;
-    case MessageType::APMSwitch: {
-        sapm::APMSwitch *msg = reinterpret_cast<sapm::APMSwitch *>(msgl);
-        handleSwitchApplication(msg);
-    }
-    break;
-    case MessageType::APMSwitchPrevApp: {
-        sapm::APMSwitchPrevApp *msg = reinterpret_cast<sapm::APMSwitchPrevApp *>(msgl);
-        if (!handleSwitchPrevApplication(msg))
-        {
-            LOG_ERROR("Switch from app: failed", msg->getSenderName().c_str());
-        }
-    }
-    break;
-    case MessageType::APMConfirmSwitch: {
-        sapm::APMConfirmSwitch *msg = reinterpret_cast<sapm::APMConfirmSwitch *>(msgl);
-        handleSwitchConfirmation(msg);
-    }
-    break;
-    case MessageType::APMConfirmClose: {
-        sapm::APMConfirmClose *msg = reinterpret_cast<sapm::APMConfirmClose *>(msgl);
-        LOG_INFO("APMConfirmClose %s", msg->getSenderName().c_str());
-        handleCloseConfirmation(msg);
-
-        // if application manager was waiting for close confirmation and name of the application
-        // for launching is defined then start application function is called
-        if ((getState() == State::WAITING_CLOSE_CONFIRMATION) && (launchApplicationName.empty() == false))
-        {
-            startApplication(launchApplicationName);
-        }
-    }
-    break;
-    case MessageType::APMDeleydClose: {
-        sapm::APMDelayedClose *msg = reinterpret_cast<sapm::APMDelayedClose *>(msgl);
-        LOG_INFO("APMDeleydClose %s", msg->getApplication().c_str());
-        sys::SystemManager::DestroyService(msg->getApplication().c_str(), this);
-    }
-    break;
-    case MessageType::APMRegister: {
-        sapm::APMRegister *msg = reinterpret_cast<sapm::APMRegister *>(msgl);
-        LOG_INFO("APMregister [%s] (%s)", msg->getSenderName().c_str(), (msg->getStatus() ? "true" : "false"));
-        handleRegisterApplication(msg);
-    }
-    break;
-    case MessageType::APMChangeLanguage: {
-        sapm::APMChangeLanguage *msg = reinterpret_cast<sapm::APMChangeLanguage *>(msgl);
-        std::string lang;
-        if (msg->getLanguage() == utils::Lang::En)
-            lang = "English";
-        if (msg->getLanguage() == utils::Lang::Pl)
-            lang = "Polish";
-        if (msg->getLanguage() == utils::Lang::De)
-            lang = "German";
-        if (msg->getLanguage() == utils::Lang::Sp)
-            lang = "Spanish";
-        LOG_INFO("APChangeLanguage; %s %s", msg->getSenderName().c_str(), lang.c_str());
-        handleLanguageChange(msg);
-    }
-    break;
-    case MessageType::APMClose: {
-        closeApplications();
-        closeServices();
-    }
-    break;
-    default: {
-		} break;
-	};
-
-
-	return std::make_shared<sys::ResponseMessage>();
-}
-// Invoked when timer ticked
-void ApplicationManager::TickHandler(uint32_t id) {
-#ifdef AUTO_PHONE_LOCK_ENABLED
-	if( id == blockingTimerID ) {
-		LOG_INFO("screen Locking Timer Triggered");
-		stopTimer(blockingTimerID);
-
-		//check if application that has focus doesn't have a flag that prevents system from blocking and going to low power mode
-		ApplicationDescription* appDescription = applications.find( focusApplicationName )->second;
-		if( appDescription->preventLocking ) {
-			//restart timer
-			ReloadTimer(blockingTimerID);
-			return;
-		}
-
-		//if desktop has focus switch to main window and set it locked.
-		if( focusApplicationName == "ApplicationDesktop") {
-			//switch data must contain target window and information about blocking
-
-            app::Application::messageSwitchApplication(this, "ApplicationDesktop", gui::name::window::main_window, std::make_unique<gui::LockPhoneData>());
+    bool ApplicationManager::closeServices()
+    {
+        bool ret = sys::SystemManager::DestroyService("ServiceGUI", this);
+        if (ret) {
+            LOG_INFO("Service: %s closed", "ServiceGUI");
         }
         else {
-			//get the application description for application that is on top and set blocking flag for it
-			appDescription->blockClosing = true;
-
-			std::unique_ptr<gui::LockPhoneData> data = std::make_unique<gui::LockPhoneData>();
-			data->setPrevApplication( focusApplicationName );
-
-			//run normal flow of applications change
-            messageSwitchApplication(this, "ApplicationDesktop", gui::name::window::main_window, std::move(data));
+            LOG_FATAL("Service: %s is still running", "ServiceGUI");
         }
+        ret = sys::SystemManager::DestroyService("ServiceEink", this);
+        if (ret) {
+            LOG_INFO("Service: %s closed", "ServiceEink");
+        }
+        else {
+            LOG_FATAL("Service: %s is still running", "ServiceEink");
+        }
+        return true;
     }
+
+    bool ApplicationManager::closeApplications()
+    {
+
+        // if application is started, its in first plane or it's working in background
+        // it will be closed using SystemManager's API.
+        for (auto &app : getApps()) {
+            if (app != nullptr && ((app->getState() == app::Application::State::ACTIVE_FORGROUND) ||
+                                   (app->getState() == app::Application::State::ACTIVE_BACKGROUND) ||
+                                   (app->getState() == app::Application::State::ACTIVATING))) {
+                LOG_INFO("Closing application: %s", app->name().c_str());
+                bool ret = sys::SystemManager::DestroyService(app->name(), this);
+                if (ret) {
+                    LOG_INFO("Application: %s closed", app->name().c_str());
+                }
+                else {
+                    LOG_FATAL("Application: %s is still running", app->name().c_str());
+                }
+                app->setState(app::Application::State::DEACTIVATED);
+            }
+        }
+        return true;
+    }
+
+    sys::Message_t ApplicationManager::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+    {
+
+        auto msgType = msgl->messageType;
+
+        switch (msgType) {
+        case MessageType::APMInitPowerSaveMode: {
+            handlePowerSavingModeInit();
+        } break;
+        case MessageType::APMPreventBlocking: {
+            //			LOG_INFO("Restarting screen locking timer");
+            ReloadTimer(blockingTimerID);
+        } break;
+        case MessageType::APMSwitch: {
+            sapm::APMSwitch *msg = reinterpret_cast<sapm::APMSwitch *>(msgl);
+            handleSwitchApplication(msg);
+        } break;
+        case MessageType::APMSwitchPrevApp: {
+            sapm::APMSwitchPrevApp *msg = reinterpret_cast<sapm::APMSwitchPrevApp *>(msgl);
+            if (!handleSwitchPrevApplication(msg)) {
+                LOG_ERROR("Switch from app: failed", msg->getSenderName().c_str());
+            }
+        } break;
+        case MessageType::APMConfirmSwitch: {
+            sapm::APMConfirmSwitch *msg = reinterpret_cast<sapm::APMConfirmSwitch *>(msgl);
+            handleSwitchConfirmation(msg);
+        } break;
+        case MessageType::APMConfirmClose: {
+            sapm::APMConfirmClose *msg = reinterpret_cast<sapm::APMConfirmClose *>(msgl);
+            LOG_INFO("APMConfirmClose %s", msg->getSenderName().c_str());
+            handleCloseConfirmation(msg);
+
+            // if application manager was waiting for close confirmation and name of the application
+            // for launching is defined then start application function is called
+            if ((getState() == State::WAITING_CLOSE_CONFIRMATION) && (launchApplicationName.empty() == false)) {
+                startApplication(launchApplicationName);
+            }
+        } break;
+        case MessageType::APMDeleydClose: {
+            sapm::APMDelayedClose *msg = reinterpret_cast<sapm::APMDelayedClose *>(msgl);
+            LOG_INFO("APMDeleydClose %s", msg->getApplication().c_str());
+            sys::SystemManager::DestroyService(msg->getApplication().c_str(), this);
+        } break;
+        case MessageType::APMRegister: {
+            sapm::APMRegister *msg = reinterpret_cast<sapm::APMRegister *>(msgl);
+            LOG_INFO("APMregister [%s] (%s)", msg->getSenderName().c_str(), (msg->getStatus() ? "true" : "false"));
+            handleRegisterApplication(msg);
+        } break;
+        case MessageType::APMChangeLanguage: {
+            sapm::APMChangeLanguage *msg = reinterpret_cast<sapm::APMChangeLanguage *>(msgl);
+            std::string lang;
+            if (msg->getLanguage() == utils::Lang::En)
+                lang = "English";
+            if (msg->getLanguage() == utils::Lang::Pl)
+                lang = "Polish";
+            if (msg->getLanguage() == utils::Lang::De)
+                lang = "German";
+            if (msg->getLanguage() == utils::Lang::Sp)
+                lang = "Spanish";
+            LOG_INFO("APChangeLanguage; %s %s", msg->getSenderName().c_str(), lang.c_str());
+            handleLanguageChange(msg);
+        } break;
+        case MessageType::APMClose: {
+            closeApplications();
+            closeServices();
+        } break;
+        default: {
+        } break;
+        };
+
+        return std::make_shared<sys::ResponseMessage>();
+    }
+    // Invoked when timer ticked
+    void ApplicationManager::TickHandler(uint32_t id)
+    {
+#ifdef AUTO_PHONE_LOCK_ENABLED
+        if (id == blockingTimerID) {
+            LOG_INFO("screen Locking Timer Triggered");
+            stopTimer(blockingTimerID);
+
+            // check if application that has focus doesn't have a flag that prevents system from blocking and going to
+            // low power mode
+            ApplicationDescription *appDescription = applications.find(focusApplicationName)->second;
+            if (appDescription->preventLocking) {
+                // restart timer
+                ReloadTimer(blockingTimerID);
+                return;
+            }
+
+            // if desktop has focus switch to main window and set it locked.
+            if (focusApplicationName == "ApplicationDesktop") {
+                // switch data must contain target window and information about blocking
+
+                app::Application::messageSwitchApplication(
+                    this, "ApplicationDesktop", gui::name::window::main_window, std::make_unique<gui::LockPhoneData>());
+            }
+            else {
+                // get the application description for application that is on top and set blocking flag for it
+                appDescription->blockClosing = true;
+
+                std::unique_ptr<gui::LockPhoneData> data = std::make_unique<gui::LockPhoneData>();
+                data->setPrevApplication(focusApplicationName);
+
+                // run normal flow of applications change
+                messageSwitchApplication(this, "ApplicationDesktop", gui::name::window::main_window, std::move(data));
+            }
+        }
 #endif
-}
-
-// Invoked during initialization
-sys::ReturnCodes ApplicationManager::InitHandler() {
-
-	//get settings to initialize language in applications
-	settings = DBServiceAPI::SettingsGet(this);
-
-	//reset blocking timer to the value specified in settings
-	uint32_t lockTime = settings.lockTime;
-	if( lockTime == 0 ) {
-		lockTime = default_application_locktime;
     }
-	setTimerPeriod( blockingTimerID, lockTime );
 
-	if( settings.language == SettingsLanguage::ENGLISH ) {
-		utils::localize.Switch( utils::Lang::En );
-	}
-	else if( settings.language == SettingsLanguage::POLISH ) {
-		utils::localize.Switch( utils::Lang::Pl );
-	}
-	else if( settings.language == SettingsLanguage::GERMAN ) {
-		utils::localize.Switch( utils::Lang::De );
-	}
-	else if( settings.language == SettingsLanguage::SPANISH ) {
-		utils::localize.Switch( utils::Lang::Sp );
-	}
-
-	bool ret;
-	ret = sys::SystemManager::CreateService(std::make_shared<sgui::ServiceGUI>("ServiceGUI", GetName(), 480, 600), this );
-	if( !ret ) {
-		LOG_ERROR("Failed to initialize GUI service");
-	}
-	ret = sys::SystemManager::CreateService(std::make_shared<ServiceEink>("ServiceEink", GetName() ), this );
-	if( !ret ) {
-		LOG_ERROR("Failed to initialize EINK service");
-	}
-
-	//search for application with specified name and run it
-#if 1 //change to 0 if you want to run only viewer application for kickstarter
-
-    // TODO this should be checked by parameter in launcher, not started by hand (if bg task -> runBackground())
-    const std::string app_desktop = app::name_desktop;
-    const std::vector<std::string> bg_apps = {app::name_call, app::special_input};
-
-    for (auto &el : bg_apps)
+    // Invoked during initialization
+    sys::ReturnCodes ApplicationManager::InitHandler()
     {
-        auto app = appGet(el);
-        if (app != nullptr)
-        {
-            app->launcher->runBackground(this);
+
+        // get settings to initialize language in applications
+        settings = DBServiceAPI::SettingsGet(this);
+
+        // reset blocking timer to the value specified in settings
+        uint32_t lockTime = settings.lockTime;
+        if (lockTime == 0) {
+            lockTime = default_application_locktime;
         }
-    }
+        setTimerPeriod(blockingTimerID, lockTime);
 
-    auto app = appGet(app_desktop);
-    if (app != nullptr)
-    {
-        messageSwitchApplication(this, app->launcher->getName(), "", nullptr);
-    }
+        if (settings.language == SettingsLanguage::ENGLISH) {
+            utils::localize.Switch(utils::Lang::En);
+        }
+        else if (settings.language == SettingsLanguage::POLISH) {
+            utils::localize.Switch(utils::Lang::Pl);
+        }
+        else if (settings.language == SettingsLanguage::GERMAN) {
+            utils::localize.Switch(utils::Lang::De);
+        }
+        else if (settings.language == SettingsLanguage::SPANISH) {
+            utils::localize.Switch(utils::Lang::Sp);
+        }
+
+        bool ret;
+        ret = sys::SystemManager::CreateService(std::make_shared<sgui::ServiceGUI>("ServiceGUI", GetName(), 480, 600),
+                                                this);
+        if (!ret) {
+            LOG_ERROR("Failed to initialize GUI service");
+        }
+        ret = sys::SystemManager::CreateService(std::make_shared<ServiceEink>("ServiceEink", GetName()), this);
+        if (!ret) {
+            LOG_ERROR("Failed to initialize EINK service");
+        }
+
+        // search for application with specified name and run it
+#if 1 // change to 0 if you want to run only viewer application for kickstarter
+
+        // TODO this should be checked by parameter in launcher, not started by hand (if bg task -> runBackground())
+        const std::string app_desktop          = app::name_desktop;
+        const std::vector<std::string> bg_apps = {app::name_call, app::special_input};
+
+        for (auto &el : bg_apps) {
+            auto app = appGet(el);
+            if (app != nullptr) {
+                app->launcher->runBackground(this);
+            }
+        }
+
+        auto app = appGet(app_desktop);
+        if (app != nullptr) {
+            messageSwitchApplication(this, app->launcher->getName(), "", nullptr);
+        }
 
 #else
-	std::string runCallAppName = "ApplicationViewer";
+        std::string runCallAppName = "ApplicationViewer";
 
-	auto it = applications.find(runCallAppName);
-		if( it!= applications.end()){
-			messageSwitchApplication( this, it->second->lanucher->getName(), "", nullptr );
-		}
+        auto it = applications.find(runCallAppName);
+        if (it != applications.end()) {
+            messageSwitchApplication(this, it->second->lanucher->getName(), "", nullptr);
+        }
 #endif
 
-  	return sys::ReturnCodes::Success;
-}
+        return sys::ReturnCodes::Success;
+    }
 
-sys::ReturnCodes ApplicationManager::DeinitHandler() {
-	closeApplications();
-	closeServices();
-	return sys::ReturnCodes::Success;
-}
+    sys::ReturnCodes ApplicationManager::DeinitHandler()
+    {
+        closeApplications();
+        closeServices();
+        return sys::ReturnCodes::Success;
+    }
 
-sys::ReturnCodes ApplicationManager::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
-    LOG_FATAL("[ServiceAppMgr] PowerModeHandler: %d", static_cast<uint32_t>(mode));
+    sys::ReturnCodes ApplicationManager::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+    {
+        LOG_FATAL("[ServiceAppMgr] PowerModeHandler: %d", static_cast<uint32_t>(mode));
 
-    switch (mode){
+        switch (mode) {
         case sys::ServicePowerMode ::Active:
-            sys::SystemManager::ResumeService("ServiceEink",this);
-            sys::SystemManager::ResumeService("ServiceGUI",this);
+            sys::SystemManager::ResumeService("ServiceEink", this);
+            sys::SystemManager::ResumeService("ServiceGUI", this);
             break;
         case sys::ServicePowerMode ::SuspendToRAM:
         case sys::ServicePowerMode ::SuspendToNVM:
-            sys::SystemManager::SuspendService("ServiceGUI",this);
-            sys::SystemManager::SuspendService("ServiceEink",this);
+            sys::SystemManager::SuspendService("ServiceGUI", this);
+            sys::SystemManager::SuspendService("ServiceEink", this);
             break;
-    }
-
-    return sys::ReturnCodes::Success;
-}
-
-bool ApplicationManager::startApplication(const std::string &appName)
-{
-
-    setState(State::STARTING_NEW_APP);
-    // search map for application's description structure with specified name
-    auto app = appGet(appName);
-    if (app == nullptr)
-    {
-        LOG_ERROR("Can't run: %s no such app", appName.c_str());
-        return false;
-    }
-
-    if (app->getState() == app::Application::State::ACTIVE_BACKGROUND)
-    {
-        setState(State::WAITING_GET_FOCUS_CONFIRMATION);
-        LOG_INFO("switching focus to application: [%s] window [%s]", appName.c_str(), app->switchWindow.c_str());
-        app::Application::messageSwitchApplication(this, launchApplicationName, app->switchWindow, std::move(app->switchData));
-    }
-    else
-    {
-        setState(State::WAITING_NEW_APP_REGISTRATION);
-        LOG_INFO("starting application: %s", appName.c_str());
-        app->launcher->run(this);
-    }
-
-    return true;
-}
-
-bool ApplicationManager::handlePowerSavingModeInit() {
-
-	LOG_INFO("Going to suspend mode");
-
-	sys::SystemManager::SuspendService("ServiceGUI",this);
-	sys::SystemManager::SuspendService("ServiceEink",this);
-
-	sys::SystemManager::SuspendSystem(this);
-
-	return true;
-}
-
-// tries to switch the application
-bool ApplicationManager::handleSwitchApplication(APMSwitch *msg)
-{
-
-    // first check if there is application specified in the message
-    auto app = appGet(msg->getName());
-    if (!app)
-    {
-        LOG_ERROR("Cant switch to app: %s , doesn't exist", msg->getName().c_str());
-        return false;
-    }
-
-    // check if specified application is not the application that is currently running
-    // this is applicable to all applications except desktop
-    if ((focusApplicationName == msg->getName()))
-    {
-        LOG_WARN("Trying to return currently active application");
-        return false;
-    }
-
-    // store the name of the application to be executed and start closing previous application
-    launchApplicationName = msg->getName();
-
-    // store window and data if there is any
-    app->switchData = std::move(msg->getData());
-    app->switchWindow = msg->getWindow();
-    setState(State::CLOSING_PREV_APP);
-
-    // check if there was previous application
-    if (!focusApplicationName.empty())
-    {
-        if (launchApplicationName == app::name_desktop)
-        {
-            appStack.clear();
-        }
-        else
-        {
-            appStack.push_back(focusApplicationName);
-            LOG_DEBUG("LaunchApp: %s", launchApplicationName.c_str());
-        }
-        /// if we want to disable closing previous app - then forbid killing it - it will be moved to background instead
-        bool kill_prev = true;
-        if (app->switchData != nullptr && app->switchData->disableAppClose)
-        {
-            kill_prev = false;
-        }
-        previousApplicationName = focusApplicationName;
-        auto app = appGet(previousApplicationName);
-        // if application's launcher defines that it can be closed send message with close signal
-        if (kill_prev && (app->closeable()) && (app->blockClosing == false))
-        {
-            LOG_INFO("APMSwitch waiting for close confirmation from: %s", previousApplicationName.c_str());
-            setState(State::WAITING_CLOSE_CONFIRMATION);
-            app::Application::messageCloseApplication(this, previousApplicationName);
-        }
-        // if application is not closeable send lost focus message
-        else
-        {
-            LOG_INFO("APMSwitch Waiting for lost focus from: %s", previousApplicationName.c_str());
-            setState(State::WAITING_LOST_FOCUS_CONFIRMATION);
-            app::Application::messageSwitchApplication(this, previousApplicationName, "", nullptr);
         }
+
+        return sys::ReturnCodes::Success;
     }
-    // if there was no application to close or application can't be closed change internal state to
-    // STARTING_NEW_APP and send execute lanuchers for that application
-    else
+
+    bool ApplicationManager::startApplication(const std::string &appName)
     {
-        startApplication(app->name());
-    }
 
-    return true;
-}
-
-//tries to switch the application
-bool ApplicationManager::handleSwitchPrevApplication( APMSwitchPrevApp* msg ) {
-
-	//if there is no previous application return false and do nothing
-	if( previousApplicationName.empty() ) {
-		return false;
-	}
-
-    previousApplicationName = appStack.back();
-    appStack.pop_back();
-    if (previousApplicationName == app::name_desktop && appStack.size())
-    {
-        std::string names = "";
-        for (auto &el : appStack)
-        {
-            names += el + "<-";
+        setState(State::STARTING_NEW_APP);
+        // search map for application's description structure with specified name
+        auto app = appGet(appName);
+        if (app == nullptr) {
+            LOG_ERROR("Can't run: %s no such app", appName.c_str());
+            return false;
         }
-        LOG_ERROR("%s isn't top application! [%s]", app::name_desktop.c_str(), names.c_str());
-    }
 
-    //check if previous application is stored in the description vector
-    auto app = appGet(previousApplicationName);
-    if (!app)
-    {
-        // specified application was not found, exiting
-        LOG_ERROR("Unable to find previous application: %s", previousApplicationName);
-        return false;
-    }
-
-    //check if specified application is not the application that is currently running
-	if( focusApplicationName == previousApplicationName ) {
-		LOG_WARN("Trying to return currently active application");
-		return false;
-	}
-
-    LOG_DEBUG("Switch PrevApp: [%s](%s) -> [%s](%s)", focusApplicationName.c_str(), app::Application::stateStr(appGet(previousApplicationName)->getState()),
-              previousApplicationName.c_str(), app::Application::stateStr(appGet(previousApplicationName)->getState()));
-    //set name of the application to be executed and start closing previous application
-	launchApplicationName = previousApplicationName;
-	//store window and data if there is any
-    app->switchData = std::move(msg->getData());
-    app->switchWindow = "LastWindow";
-    setState(State::CLOSING_PREV_APP);
-
-    //check if there was previous application
-	if( !focusApplicationName.empty() ) {
-		previousApplicationName = focusApplicationName;
-        auto app = appGet(previousApplicationName);
-
-        //if application's launcher defines that it can be closed send message with close signal
-        if (app->closeable())
-        {
-            LOG_INFO("Closing application: %s", previousApplicationName.c_str());
-            setState(State::WAITING_CLOSE_CONFIRMATION);
-            app::Application::messageCloseApplication(this, previousApplicationName);
-        }
-        // if application is not closeable send lost focus message
-        else
-        {
-            setState(State::WAITING_LOST_FOCUS_CONFIRMATION);
-            app::Application::messageSwitchApplication(this, previousApplicationName, "", nullptr);
-        }
-    }
-    // if there was no application to close or application can't be closed change internal state to
-    // STARTING_NEW_APP and send execute lanuchers for that application
-    else
-    {
-        startApplication(app->name());
-    }
-
-    return true;
-}
-
-bool ApplicationManager::handleRegisterApplication( APMRegister* msg ) {
-    auto app = appGet(msg->getSenderName());
-    if (app == nullptr)
-    {
-        LOG_ERROR("can't register: %s no such app in `applicationsk`", msg->getSenderName().c_str());
-        return false;
-    }
-
-    if( msg->getSenderName() == launchApplicationName ) {
-		//application starts in background
-		if( msg->getStartBackground()) {
-            app->setState(app::Application::State::ACTIVE_BACKGROUND);
-            setState(State::IDLE);
-        }
-		else {
-            app->setState(app::Application::State::ACTIVATING);
+        if (app->getState() == app::Application::State::ACTIVE_BACKGROUND) {
             setState(State::WAITING_GET_FOCUS_CONFIRMATION);
-            LOG_INFO("switchApplication %s %s", launchApplicationName.c_str(), app->switchData ? app->switchData->getDescription().c_str() : "");
-            app::Application::messageSwitchApplication(this, launchApplicationName, app->switchWindow, std::move(app->switchData));
+            LOG_INFO("switching focus to application: [%s] window [%s]", appName.c_str(), app->switchWindow.c_str());
+            app::Application::messageSwitchApplication(
+                this, launchApplicationName, app->switchWindow, std::move(app->switchData));
         }
-	}
-    else
-    {
-        app->setState(app::Application::State::ACTIVE_BACKGROUND);
-    }
-    return true;
-}
-
-bool ApplicationManager::handleLanguageChange( sapm::APMChangeLanguage* msg ) {
-
-	//check if selected language is different than the one that is in the settings
-	//if they are the same, return doing nothing
-	SettingsLanguage requestedLanguage;
-	switch( msg->getLanguage()) {
-		case utils::Lang::En : requestedLanguage = SettingsLanguage::ENGLISH; break;
-		case utils::Lang::Pl : requestedLanguage = SettingsLanguage::POLISH; break;
-		case utils::Lang::De : requestedLanguage = SettingsLanguage::GERMAN; break;
-		case utils::Lang::Sp : requestedLanguage = SettingsLanguage::SPANISH; break;
-		default: requestedLanguage = SettingsLanguage::ENGLISH; break;
-	};
-
-	//if requested language is different than current update settings and i18 translations
-	if( requestedLanguage != settings.language ) {
-		settings = DBServiceAPI::SettingsGet(this);
-		settings.language = requestedLanguage;
-		DBServiceAPI::SettingsUpdate( this, settings );
-		utils::localize.Switch( msg->getLanguage() );
-	}
-	else {
-		LOG_WARN("Selected language is already set. Ignoring command.");
-		return true;
-	}
-
-    // iterate over all applications in the background or foreground state and send them rebuild command
-    for (auto &app : getApps())
-    {
-        if (app && app->launcher && app->launcher->handle &&
-            (app->launcher->handle->getState() == app::Application::State::ACTIVE_BACKGROUND ||
-             app->launcher->handle->getState() == app::Application::State::ACTIVE_FORGROUND))
-        {
-            app::Application::messageRebuildApplication(this, app->name());
+        else {
+            setState(State::WAITING_NEW_APP_REGISTRATION);
+            LOG_INFO("starting application: %s", appName.c_str());
+            app->launcher->run(this);
         }
-    }
 
-    return true;
-}
-
-bool ApplicationManager::handleSwitchConfirmation(APMConfirmSwitch *msg)
-{
-    std::string app_name = getState() == State::WAITING_GET_FOCUS_CONFIRMATION ? msg->getSenderName() : focusApplicationName;
-    ApplicationDescription *app = appGet(app_name);
-    if (app == nullptr)
-    {
-        LOG_ERROR("Can't handle switch confirmation to: %s", app_name.c_str());
-        return false;
-    }
-
-    /// move application with focus to front
-    {
-        auto app = appGet(msg->getSenderName());
-        if (app && app->getState() == app::Application::State::ACTIVE_FORGROUND)
-        {
-            appMoveFront(app);
-            debug_log_app_list();
-            // notify event manager which application should receive keyboard messages
-            EventManager::messageSetApplication(this, app->name());
-        }
-        else
-        {
-            LOG_DEBUG("Focus switch ingored cause: %d %s", app == nullptr, app == nullptr ? "" : app::Application::stateStr(app->getState()));
-        }
-    }
-    // this is the case when application manager is waiting for newly started application to confim that it has
-    // successfully gained focus.
-    if (getState() == State::WAITING_GET_FOCUS_CONFIRMATION || getState() == State::IDLE)
-    {
-        LOG_INFO("APMConfirmSwitch focus confirmed by: [%s]", msg->getSenderName().c_str());
-        focusApplicationName = launchApplicationName;
-        launchApplicationName = "";
-
-        app->blockClosing = false;
-        app->setState(app::Application::State::ACTIVE_FORGROUND);
-        setState(State::IDLE);
         return true;
     }
-    // this is the case where application manager is waiting for non-closeable application
-    // to confirm that app has lost focus.
-    else if (getState() == State::WAITING_LOST_FOCUS_CONFIRMATION)
+
+    bool ApplicationManager::handlePowerSavingModeInit()
     {
-        if (msg->getSenderName() == focusApplicationName)
-        {
-            LOG_INFO("APMConfirmSwitch Lost focus confirmed by: %s", msg->getSenderName().c_str());
+
+        LOG_INFO("Going to suspend mode");
+
+        sys::SystemManager::SuspendService("ServiceGUI", this);
+        sys::SystemManager::SuspendService("ServiceEink", this);
+
+        sys::SystemManager::SuspendSystem(this);
+
+        return true;
+    }
+
+    // tries to switch the application
+    bool ApplicationManager::handleSwitchApplication(APMSwitch *msg)
+    {
+
+        // first check if there is application specified in the message
+        auto app = appGet(msg->getName());
+        if (!app) {
+            LOG_ERROR("Cant switch to app: %s , doesn't exist", msg->getName().c_str());
+            return false;
+        }
+
+        // check if specified application is not the application that is currently running
+        // this is applicable to all applications except desktop
+        if ((focusApplicationName == msg->getName())) {
+            LOG_WARN("Trying to return currently active application");
+            return false;
+        }
+
+        // store the name of the application to be executed and start closing previous application
+        launchApplicationName = msg->getName();
+
+        // store window and data if there is any
+        app->switchData   = std::move(msg->getData());
+        app->switchWindow = msg->getWindow();
+        setState(State::CLOSING_PREV_APP);
+
+        // check if there was previous application
+        if (!focusApplicationName.empty()) {
+            if (launchApplicationName == app::name_desktop) {
+                appStack.clear();
+            }
+            else {
+                appStack.push_back(focusApplicationName);
+                LOG_DEBUG("LaunchApp: %s", launchApplicationName.c_str());
+            }
+            /// if we want to disable closing previous app - then forbid killing it - it will be moved to background
+            /// instead
+            bool kill_prev = true;
+            if (app->switchData != nullptr && app->switchData->disableAppClose) {
+                kill_prev = false;
+            }
             previousApplicationName = focusApplicationName;
-            focusApplicationName = "";
+            auto app                = appGet(previousApplicationName);
+            // if application's launcher defines that it can be closed send message with close signal
+            if (kill_prev && (app->closeable()) && (app->blockClosing == false)) {
+                LOG_INFO("APMSwitch waiting for close confirmation from: %s", previousApplicationName.c_str());
+                setState(State::WAITING_CLOSE_CONFIRMATION);
+                app::Application::messageCloseApplication(this, previousApplicationName);
+            }
+            // if application is not closeable send lost focus message
+            else {
+                LOG_INFO("APMSwitch Waiting for lost focus from: %s", previousApplicationName.c_str());
+                setState(State::WAITING_LOST_FOCUS_CONFIRMATION);
+                app::Application::messageSwitchApplication(this, previousApplicationName, "", nullptr);
+            }
+        }
+        // if there was no application to close or application can't be closed change internal state to
+        // STARTING_NEW_APP and send execute lanuchers for that application
+        else {
+            startApplication(app->name());
+        }
+
+        return true;
+    }
+
+    // tries to switch the application
+    bool ApplicationManager::handleSwitchPrevApplication(APMSwitchPrevApp *msg)
+    {
+
+        // if there is no previous application return false and do nothing
+        if (previousApplicationName.empty()) {
+            return false;
+        }
+
+        previousApplicationName = appStack.back();
+        appStack.pop_back();
+        if (previousApplicationName == app::name_desktop && appStack.size()) {
+            std::string names = "";
+            for (auto &el : appStack) {
+                names += el + "<-";
+            }
+            LOG_ERROR("%s isn't top application! [%s]", app::name_desktop.c_str(), names.c_str());
+        }
+
+        // check if previous application is stored in the description vector
+        auto app = appGet(previousApplicationName);
+        if (!app) {
+            // specified application was not found, exiting
+            LOG_ERROR("Unable to find previous application: %s", previousApplicationName);
+            return false;
+        }
+
+        // check if specified application is not the application that is currently running
+        if (focusApplicationName == previousApplicationName) {
+            LOG_WARN("Trying to return currently active application");
+            return false;
+        }
+
+        LOG_DEBUG("Switch PrevApp: [%s](%s) -> [%s](%s)",
+                  focusApplicationName.c_str(),
+                  app::Application::stateStr(appGet(previousApplicationName)->getState()),
+                  previousApplicationName.c_str(),
+                  app::Application::stateStr(appGet(previousApplicationName)->getState()));
+        // set name of the application to be executed and start closing previous application
+        launchApplicationName = previousApplicationName;
+        // store window and data if there is any
+        app->switchData   = std::move(msg->getData());
+        app->switchWindow = "LastWindow";
+        setState(State::CLOSING_PREV_APP);
+
+        // check if there was previous application
+        if (!focusApplicationName.empty()) {
+            previousApplicationName = focusApplicationName;
+            auto app                = appGet(previousApplicationName);
+
+            // if application's launcher defines that it can be closed send message with close signal
+            if (app->closeable()) {
+                LOG_INFO("Closing application: %s", previousApplicationName.c_str());
+                setState(State::WAITING_CLOSE_CONFIRMATION);
+                app::Application::messageCloseApplication(this, previousApplicationName);
+            }
+            // if application is not closeable send lost focus message
+            else {
+                setState(State::WAITING_LOST_FOCUS_CONFIRMATION);
+                app::Application::messageSwitchApplication(this, previousApplicationName, "", nullptr);
+            }
+        }
+        // if there was no application to close or application can't be closed change internal state to
+        // STARTING_NEW_APP and send execute lanuchers for that application
+        else {
+            startApplication(app->name());
+        }
+
+        return true;
+    }
+
+    bool ApplicationManager::handleRegisterApplication(APMRegister *msg)
+    {
+        auto app = appGet(msg->getSenderName());
+        if (app == nullptr) {
+            LOG_ERROR("can't register: %s no such app in `applicationsk`", msg->getSenderName().c_str());
+            return false;
+        }
+
+        if (msg->getSenderName() == launchApplicationName) {
+            // application starts in background
+            if (msg->getStartBackground()) {
+                app->setState(app::Application::State::ACTIVE_BACKGROUND);
+                setState(State::IDLE);
+            }
+            else {
+                app->setState(app::Application::State::ACTIVATING);
+                setState(State::WAITING_GET_FOCUS_CONFIRMATION);
+                LOG_INFO("switchApplication %s %s",
+                         launchApplicationName.c_str(),
+                         app->switchData ? app->switchData->getDescription().c_str() : "");
+                app::Application::messageSwitchApplication(
+                    this, launchApplicationName, app->switchWindow, std::move(app->switchData));
+            }
+        }
+        else {
             app->setState(app::Application::State::ACTIVE_BACKGROUND);
-            app->switchWindow = "LastWindow";
-            startApplication(launchApplicationName);
+        }
+        return true;
+    }
+
+    bool ApplicationManager::handleLanguageChange(sapm::APMChangeLanguage *msg)
+    {
+
+        // check if selected language is different than the one that is in the settings
+        // if they are the same, return doing nothing
+        SettingsLanguage requestedLanguage;
+        switch (msg->getLanguage()) {
+        case utils::Lang::En:
+            requestedLanguage = SettingsLanguage::ENGLISH;
+            break;
+        case utils::Lang::Pl:
+            requestedLanguage = SettingsLanguage::POLISH;
+            break;
+        case utils::Lang::De:
+            requestedLanguage = SettingsLanguage::GERMAN;
+            break;
+        case utils::Lang::Sp:
+            requestedLanguage = SettingsLanguage::SPANISH;
+            break;
+        default:
+            requestedLanguage = SettingsLanguage::ENGLISH;
+            break;
+        };
+
+        // if requested language is different than current update settings and i18 translations
+        if (requestedLanguage != settings.language) {
+            settings          = DBServiceAPI::SettingsGet(this);
+            settings.language = requestedLanguage;
+            DBServiceAPI::SettingsUpdate(this, settings);
+            utils::localize.Switch(msg->getLanguage());
+        }
+        else {
+            LOG_WARN("Selected language is already set. Ignoring command.");
             return true;
         }
-    }
-    LOG_ERROR("APMConfirmSwitch %s : %s state %s", msg->getSenderName().c_str(), focusApplicationName.c_str(), stateStr(getState()));
-    return false;
-}
 
-bool ApplicationManager::handleCloseConfirmation(APMConfirmClose *msg)
-{
-    auto app = appGet(msg->getSenderName());
-    if (app == nullptr)
+        // iterate over all applications in the background or foreground state and send them rebuild command
+        for (auto &app : getApps()) {
+            if (app && app->launcher && app->launcher->handle &&
+                (app->launcher->handle->getState() == app::Application::State::ACTIVE_BACKGROUND ||
+                 app->launcher->handle->getState() == app::Application::State::ACTIVE_FORGROUND)) {
+                app::Application::messageRebuildApplication(this, app->name());
+            }
+        }
+
+        return true;
+    }
+
+    bool ApplicationManager::handleSwitchConfirmation(APMConfirmSwitch *msg)
     {
-        LOG_ERROR("can't handle: %s app: %s doesn't exist", __FUNCTION__, msg->getSenderName());
+        std::string app_name =
+            getState() == State::WAITING_GET_FOCUS_CONFIRMATION ? msg->getSenderName() : focusApplicationName;
+        ApplicationDescription *app = appGet(app_name);
+        if (app == nullptr) {
+            LOG_ERROR("Can't handle switch confirmation to: %s", app_name.c_str());
+            return false;
+        }
+
+        /// move application with focus to front
+        {
+            auto app = appGet(msg->getSenderName());
+            if (app && app->getState() == app::Application::State::ACTIVE_FORGROUND) {
+                appMoveFront(app);
+                debug_log_app_list();
+                // notify event manager which application should receive keyboard messages
+                EventManager::messageSetApplication(this, app->name());
+            }
+            else {
+                LOG_DEBUG("Focus switch ingored cause: %d %s",
+                          app == nullptr,
+                          app == nullptr ? "" : app::Application::stateStr(app->getState()));
+            }
+        }
+        // this is the case when application manager is waiting for newly started application to confim that it has
+        // successfully gained focus.
+        if (getState() == State::WAITING_GET_FOCUS_CONFIRMATION || getState() == State::IDLE) {
+            LOG_INFO("APMConfirmSwitch focus confirmed by: [%s]", msg->getSenderName().c_str());
+            focusApplicationName  = launchApplicationName;
+            launchApplicationName = "";
+
+            app->blockClosing = false;
+            app->setState(app::Application::State::ACTIVE_FORGROUND);
+            setState(State::IDLE);
+            return true;
+        }
+        // this is the case where application manager is waiting for non-closeable application
+        // to confirm that app has lost focus.
+        else if (getState() == State::WAITING_LOST_FOCUS_CONFIRMATION) {
+            if (msg->getSenderName() == focusApplicationName) {
+                LOG_INFO("APMConfirmSwitch Lost focus confirmed by: %s", msg->getSenderName().c_str());
+                previousApplicationName = focusApplicationName;
+                focusApplicationName    = "";
+                app->setState(app::Application::State::ACTIVE_BACKGROUND);
+                app->switchWindow = "LastWindow";
+                startApplication(launchApplicationName);
+                return true;
+            }
+        }
+        LOG_ERROR("APMConfirmSwitch %s : %s state %s",
+                  msg->getSenderName().c_str(),
+                  focusApplicationName.c_str(),
+                  stateStr(getState()));
         return false;
     }
 
-    // if application is running and it's not closeable set state to active background
-    // otherwise it means that application is ready to be closed by using DestroyService api
-    if (app->closeable())
+    bool ApplicationManager::handleCloseConfirmation(APMConfirmClose *msg)
     {
-        // internally send close message to allow response message to be sended to application
-        // that has confirmed close request.
-        app->setState(app::Application::State::DEACTIVATED);
-        auto msg = std::make_shared<sapm::APMDelayedClose>(this->GetName(), previousApplicationName);
-        sys::Bus::SendUnicast(msg, "ApplicationManager", this);
-    }
-    else
-    {
-        app->setState(app::Application::State::ACTIVE_BACKGROUND);
+        auto app = appGet(msg->getSenderName());
+        if (app == nullptr) {
+            LOG_ERROR("can't handle: %s app: %s doesn't exist", __FUNCTION__, msg->getSenderName());
+            return false;
+        }
+
+        // if application is running and it's not closeable set state to active background
+        // otherwise it means that application is ready to be closed by using DestroyService api
+        if (app->closeable()) {
+            // internally send close message to allow response message to be sended to application
+            // that has confirmed close request.
+            app->setState(app::Application::State::DEACTIVATED);
+            auto msg = std::make_shared<sapm::APMDelayedClose>(this->GetName(), previousApplicationName);
+            sys::Bus::SendUnicast(msg, "ApplicationManager", this);
+        }
+        else {
+            app->setState(app::Application::State::ACTIVE_BACKGROUND);
+        }
+
+        return true;
     }
 
-    return true;
-}
+    // Static methods
 
-//Static methods
-
-bool ApplicationManager::messageSwitchApplication(sys::Service *sender, const std::string &applicationName, const std::string &windowName,
-                                                  std::unique_ptr<gui::SwitchData> data)
-{
-    auto msg = std::make_shared<sapm::APMSwitch>(sender->GetName(), applicationName, windowName, std::move(data));
-    return sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-}
-
-bool ApplicationManager::messageSwitchSpecialInput(sys::Service *sender, std::unique_ptr<gui::SwitchSpecialChar> data)
-{
-    auto val = data->requester;
-    // forbid killing prev app, it could be done better - i.e. with state (not this disableAppClose parameter)
-    data->disableAppClose = true;
-    return (gui::SwitchSpecialChar::Type::Request == data->type)
-               ? messageSwitchApplication(sender, app::special_input, app::char_select, std::move(data))
-               : messageSwitchPreviousApplication(sender, std::make_unique<APMSwitchPrevApp>(data->requester, std::move(data)));
-}
-
-bool ApplicationManager::messageConfirmSwitch( sys::Service* sender) {
-
-	auto msg = std::make_shared<sapm::APMConfirmSwitch>(sender->GetName() );
-    sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-    return true;
-}
-bool ApplicationManager::messageConfirmClose( sys::Service* sender) {
-
-	auto msg = std::make_shared<sapm::APMConfirmClose>(sender->GetName() );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
-bool ApplicationManager::messageSwitchPreviousApplication(sys::Service *sender, std::unique_ptr<APMSwitchPrevApp> msg)
-{
-
-    std::shared_ptr<APMSwitchPrevApp> sendMsg;
-    if (!msg)
+    bool ApplicationManager::messageSwitchApplication(sys::Service *sender,
+                                                      const std::string &applicationName,
+                                                      const std::string &windowName,
+                                                      std::unique_ptr<gui::SwitchData> data)
     {
-        sendMsg = std::make_shared<sapm::APMSwitchPrevApp>(sender->GetName());
+        auto msg = std::make_shared<sapm::APMSwitch>(sender->GetName(), applicationName, windowName, std::move(data));
+        return sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
     }
-    else
+
+    bool ApplicationManager::messageSwitchSpecialInput(sys::Service *sender,
+                                                       std::unique_ptr<gui::SwitchSpecialChar> data)
     {
-        sendMsg = std::move(msg);
+        auto val = data->requester;
+        // forbid killing prev app, it could be done better - i.e. with state (not this disableAppClose parameter)
+        data->disableAppClose = true;
+        return (gui::SwitchSpecialChar::Type::Request == data->type)
+                   ? messageSwitchApplication(sender, app::special_input, app::char_select, std::move(data))
+                   : messageSwitchPreviousApplication(
+                         sender, std::make_unique<APMSwitchPrevApp>(data->requester, std::move(data)));
     }
-    sys::Bus::SendUnicast(sendMsg, "ApplicationManager", sender);
-    return true;
-}
 
-bool ApplicationManager::messageRegisterApplication( sys::Service* sender, const bool& status, const bool& startBackground ) {
-	auto msg = std::make_shared<sapm::APMRegister>(sender->GetName(), status, startBackground );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
+    bool ApplicationManager::messageConfirmSwitch(sys::Service *sender)
+    {
 
-bool ApplicationManager::messageChangeLanguage( sys::Service* sender, utils::Lang language ) {
-	auto msg = std::make_shared<sapm::APMChangeLanguage>( sender->GetName(), language );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
+        auto msg = std::make_shared<sapm::APMConfirmSwitch>(sender->GetName());
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+    bool ApplicationManager::messageConfirmClose(sys::Service *sender)
+    {
 
-bool ApplicationManager::messageCloseApplicationManager( sys::Service* sender ) {
-	auto msg = std::make_shared<sapm::APMClose>( sender->GetName() );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
+        auto msg = std::make_shared<sapm::APMConfirmClose>(sender->GetName());
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+    bool ApplicationManager::messageSwitchPreviousApplication(sys::Service *sender,
+                                                              std::unique_ptr<APMSwitchPrevApp> msg)
+    {
 
-bool ApplicationManager::messagePreventBlocking( sys::Service* sender ) {
-	auto msg = std::make_shared<sapm::APMPreventBlocking>( sender->GetName() );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
+        std::shared_ptr<APMSwitchPrevApp> sendMsg;
+        if (!msg) {
+            sendMsg = std::make_shared<sapm::APMSwitchPrevApp>(sender->GetName());
+        }
+        else {
+            sendMsg = std::move(msg);
+        }
+        sys::Bus::SendUnicast(sendMsg, "ApplicationManager", sender);
+        return true;
+    }
 
-bool ApplicationManager::messageInitPowerSaveMode( sys::Service* sender ) {
-	auto msg = std::make_shared<sapm::APMInitPowerSaveMode>( sender->GetName() );
-	sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
-	return true;
-}
+    bool ApplicationManager::messageRegisterApplication(sys::Service *sender,
+                                                        const bool &status,
+                                                        const bool &startBackground)
+    {
+        auto msg = std::make_shared<sapm::APMRegister>(sender->GetName(), status, startBackground);
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+
+    bool ApplicationManager::messageChangeLanguage(sys::Service *sender, utils::Lang language)
+    {
+        auto msg = std::make_shared<sapm::APMChangeLanguage>(sender->GetName(), language);
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+
+    bool ApplicationManager::messageCloseApplicationManager(sys::Service *sender)
+    {
+        auto msg = std::make_shared<sapm::APMClose>(sender->GetName());
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+
+    bool ApplicationManager::messagePreventBlocking(sys::Service *sender)
+    {
+        auto msg = std::make_shared<sapm::APMPreventBlocking>(sender->GetName());
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
+
+    bool ApplicationManager::messageInitPowerSaveMode(sys::Service *sender)
+    {
+        auto msg = std::make_shared<sapm::APMInitPowerSaveMode>(sender->GetName());
+        sys::Bus::SendUnicast(msg, "ApplicationManager", sender);
+        return true;
+    }
 
 } /* namespace sapm */
diff --git a/module-services/service-appmgr/ApplicationManager.hpp b/module-services/service-appmgr/ApplicationManager.hpp
index 09ff69458..e50d12c07 100644
--- a/module-services/service-appmgr/ApplicationManager.hpp
+++ b/module-services/service-appmgr/ApplicationManager.hpp
@@ -19,26 +19,24 @@
 #include "messages/APMMessage.hpp"
 #include "i18/i18.hpp"
 
-inline uint32_t default_application_locktime=30000;
+inline uint32_t default_application_locktime = 30000;
 
-namespace sapm {
+namespace sapm
+{
 
     class ApplicationDescription
     {
       public:
         ApplicationDescription(std::unique_ptr<app::ApplicationLauncher> launcher);
         virtual ~ApplicationDescription()
-        {
-        }
+        {}
         // name of the application. It's used to find proper application during switching
         std::string name()
         {
-            if (launcher)
-            {
+            if (launcher) {
                 return launcher->getName();
             }
-            else
-            {
+            else {
                 return "NONE";
             }
         }
@@ -46,21 +44,20 @@ namespace sapm {
         std::unique_ptr<app::ApplicationLauncher> launcher = nullptr;
         // informs application manager that this application temporary musn't be closed.
         // This flag is used to prevent application closing when application is closeable and there is incoming call.
-        // This flag is also used when closeable application is on front and there is a timeout to block the applicatioin.
+        // This flag is also used when closeable application is on front and there is a timeout to block the
+        // applicatioin.
         bool blockClosing = false;
         // switching data stored when application manager had to run init function
         std::unique_ptr<gui::SwitchData> switchData = nullptr;
-        std::string switchWindow = "";
+        std::string switchWindow                    = "";
 
         // prevents from blocking the system
         bool preventsLocking()
         {
-            if (launcher != nullptr)
-            {
+            if (launcher != nullptr) {
                 return launcher->isBlocking();
             }
-            else
-            {
+            else {
                 return false;
             }
         }
@@ -68,8 +65,7 @@ namespace sapm {
         // informs if it is possible to close application when it looses focus.
         bool closeable()
         {
-            if (launcher != nullptr)
-            {
+            if (launcher != nullptr) {
                 return launcher->isCloseable();
             }
             return false;
@@ -77,30 +73,26 @@ namespace sapm {
 
         app::Application::State getState()
         {
-            if ((launcher == nullptr) || (launcher->handle == nullptr))
-            {
+            if ((launcher == nullptr) || (launcher->handle == nullptr)) {
                 return app::Application::State::NONE;
             }
-            else
-            {
+            else {
                 return launcher->handle->getState();
             }
         }
 
         void setState(app::Application::State st)
         {
-            if ((launcher == nullptr) || (launcher->handle == nullptr))
-            {
+            if ((launcher == nullptr) || (launcher->handle == nullptr)) {
                 LOG_ERROR("No %s", launcher == nullptr ? "launcher" : "handle");
             }
-            else
-            {
+            else {
                 launcher->handle->setState(st);
             }
         }
     };
 
-/// this is only to force usage of get/set methods in ApplicatioManager
+    /// this is only to force usage of get/set methods in ApplicatioManager
     class VirtualAppManager
     {
       public:
@@ -140,104 +132,117 @@ namespace sapm {
         void debug_log_app_list();
     };
 
-class ApplicationManager: public sys::Service, public VirtualAppManager {
+    class ApplicationManager : public sys::Service, public VirtualAppManager
+    {
 
-	SettingsRecord settings;
+        SettingsRecord settings;
 
-    sys::SystemManager* systemManager;
+        sys::SystemManager *systemManager;
 
-	//
-	std::unique_ptr<utils::i18> i18;
+        //
+        std::unique_ptr<utils::i18> i18;
 
-	//application that currently has focus. This means that is has rights to display screens and receive keyboard events.
-	std::string focusApplicationName = "";
-	//after loosing focus application becomes previous application and this is its name
-	std::string previousApplicationName = "";
-	//name of the application scheduled for launching
-	std::string launchApplicationName = "";
-	//timer to count time from last user's activity. If it reaches time defined in settings database application manager is sending signal
-	//to power manager and changing window to the desktop window in the blocked state.
-	uint32_t blockingTimerID = 0;
+        // application that currently has focus. This means that is has rights to display screens and receive keyboard
+        // events.
+        std::string focusApplicationName = "";
+        // after loosing focus application becomes previous application and this is its name
+        std::string previousApplicationName = "";
+        // name of the application scheduled for launching
+        std::string launchApplicationName = "";
+        // timer to count time from last user's activity. If it reaches time defined in settings database application
+        // manager is sending signal to power manager and changing window to the desktop window in the blocked state.
+        uint32_t blockingTimerID = 0;
 
-	//tries to switch the application
-	bool handleSwitchApplication( APMSwitch* msg);
-//	bool handleSwitchApplicationWithData( APMSwitchWithData* msg);
-	bool handleCloseConfirmation( APMConfirmClose* msg );
-	bool handleSwitchConfirmation( APMConfirmSwitch* msg );
-	bool handleSwitchPrevApplication( APMSwitchPrevApp* msg );
-	bool handleRegisterApplication( APMRegister* msg );
-	bool handleLanguageChange( sapm::APMChangeLanguage* msg );
-	bool handlePowerSavingModeInit();
-	/**
-	 * @brief Closes all running applications.
-	 */
-	bool startApplication( const std::string& appName );
-	/**
-	 * @brief Closes eink and gui services.
-	 */
-	bool closeApplications();
-	bool closeServices();
-public:
-    ApplicationManager( const std::string& name, sys::SystemManager* sysmgr, std::vector< std::unique_ptr<app::ApplicationLauncher> >& launchers );
-    virtual ~ApplicationManager();
+        // tries to switch the application
+        bool handleSwitchApplication(APMSwitch *msg);
+        //	bool handleSwitchApplicationWithData( APMSwitchWithData* msg);
+        bool handleCloseConfirmation(APMConfirmClose *msg);
+        bool handleSwitchConfirmation(APMConfirmSwitch *msg);
+        bool handleSwitchPrevApplication(APMSwitchPrevApp *msg);
+        bool handleRegisterApplication(APMRegister *msg);
+        bool handleLanguageChange(sapm::APMChangeLanguage *msg);
+        bool handlePowerSavingModeInit();
+        /**
+         * @brief Closes all running applications.
+         */
+        bool startApplication(const std::string &appName);
+        /**
+         * @brief Closes eink and gui services.
+         */
+        bool closeApplications();
+        bool closeServices();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-    // Invoked when timer ticked
-    void TickHandler(uint32_t id) override;
+      public:
+        ApplicationManager(const std::string &name,
+                           sys::SystemManager *sysmgr,
+                           std::vector<std::unique_ptr<app::ApplicationLauncher>> &launchers);
+        virtual ~ApplicationManager();
 
-    // Invoked during initialization
-    sys::ReturnCodes InitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        // Invoked when timer ticked
+        void TickHandler(uint32_t id) override;
 
-    sys::ReturnCodes DeinitHandler() override;
+        // Invoked during initialization
+        sys::ReturnCodes InitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
+        sys::ReturnCodes DeinitHandler() override;
 
-    /**
-     * @brief Sends request to application manager to switch from current application to specific window in application with specified name .
-     */
-    static bool messageSwitchApplication(sys::Service *sender, const std::string &applicationName, const std::string &windowName,
-                                         std::unique_ptr<gui::SwitchData> data);
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
 
-    static bool messageSwitchSpecialInput(sys::Service *sender, std::unique_ptr<gui::SwitchSpecialChar> data);
-    /**
-	 * @brief Sends request to application manager to switch from current application to specific window in application with specified name.
-	 * Allows sending data to destination application.
-	 */
-//    static bool messageSwitchApplicationWithData( sys::Service* sender, const std::string& applicationName, const std::string& windowName, std::unique_ptr<app::SwitchData>& switchData );
-    /**
-     * @Brief Function allows sending confirmation to the switch request. This is sent both by application that gains and looses focus.
-     */
-	static bool messageConfirmSwitch( sys::Service* sender);
-	/**
-	 * @brief Function allows application to confirm close request.
-	 */
-    static bool messageConfirmClose( sys::Service* sender);
-    /**
-     * @brief Allows requesting Application Manager to run previous application.
-     */
-    static bool messageSwitchPreviousApplication(sys::Service *sender, std::unique_ptr<APMSwitchPrevApp> msg = nullptr);
-    /**
-	* @brief Sends information from application to manager about result of application's init function.
-	* If successful message will contain name and true value, otherwise false value will be transmitted.
-	*/
-   static bool messageRegisterApplication( sys::Service* sender, const bool& status,const bool& startBackground );
-   /**
-    * @brief Sends message to application manager to inform it about change of the phone's language performed by the user.
-    */
-   static bool messageChangeLanguage( sys::Service* sender, utils::Lang language );
-   /**
-    * @brief Sends message to application manager that it should close itself and as a result.
-    */
-   static bool messageCloseApplicationManager( sys::Service* sender );
-   /**
-    * @brief Sends message to inform Application Manager to reset timer responsible for blocking phone
-    */
-   static bool messagePreventBlocking( sys::Service* sender );
-   /**
-    * @brief Sends message to Application Manager. This will initialize procedure of switching to power saving mode.
-    */
-   static bool messageInitPowerSaveMode( sys::Service* sender );
-};
+        /**
+         * @brief Sends request to application manager to switch from current application to specific window in
+         * application with specified name .
+         */
+        static bool messageSwitchApplication(sys::Service *sender,
+                                             const std::string &applicationName,
+                                             const std::string &windowName,
+                                             std::unique_ptr<gui::SwitchData> data);
+
+        static bool messageSwitchSpecialInput(sys::Service *sender, std::unique_ptr<gui::SwitchSpecialChar> data);
+        /**
+         * @brief Sends request to application manager to switch from current application to specific window in
+         * application with specified name. Allows sending data to destination application.
+         */
+        //    static bool messageSwitchApplicationWithData( sys::Service* sender, const std::string& applicationName,
+        //    const std::string& windowName, std::unique_ptr<app::SwitchData>& switchData );
+        /**
+         * @Brief Function allows sending confirmation to the switch request. This is sent both by application that
+         * gains and looses focus.
+         */
+        static bool messageConfirmSwitch(sys::Service *sender);
+        /**
+         * @brief Function allows application to confirm close request.
+         */
+        static bool messageConfirmClose(sys::Service *sender);
+        /**
+         * @brief Allows requesting Application Manager to run previous application.
+         */
+        static bool messageSwitchPreviousApplication(sys::Service *sender,
+                                                     std::unique_ptr<APMSwitchPrevApp> msg = nullptr);
+        /**
+         * @brief Sends information from application to manager about result of application's init function.
+         * If successful message will contain name and true value, otherwise false value will be transmitted.
+         */
+        static bool messageRegisterApplication(sys::Service *sender, const bool &status, const bool &startBackground);
+        /**
+         * @brief Sends message to application manager to inform it about change of the phone's language performed by
+         * the user.
+         */
+        static bool messageChangeLanguage(sys::Service *sender, utils::Lang language);
+        /**
+         * @brief Sends message to application manager that it should close itself and as a result.
+         */
+        static bool messageCloseApplicationManager(sys::Service *sender);
+        /**
+         * @brief Sends message to inform Application Manager to reset timer responsible for blocking phone
+         */
+        static bool messagePreventBlocking(sys::Service *sender);
+        /**
+         * @brief Sends message to Application Manager. This will initialize procedure of switching to power saving
+         * mode.
+         */
+        static bool messageInitPowerSaveMode(sys::Service *sender);
+    };
 
 } /* namespace sapm */
 
diff --git a/module-services/service-appmgr/messages/APMMessage.hpp b/module-services/service-appmgr/messages/APMMessage.hpp
index eb8f93447..5b4742891 100644
--- a/module-services/service-appmgr/messages/APMMessage.hpp
+++ b/module-services/service-appmgr/messages/APMMessage.hpp
@@ -16,127 +16,165 @@
 
 #include "i18/i18.hpp"
 
-namespace sapm {
+namespace sapm
+{
 
-/*
- * @brief Template for all messages that go to application manager
- */
-class APMMessage: public sys::DataMessage {
-protected:
-	//name of the application that is sending message to application manager.
-	std::string senderName;
-public:
-  APMMessage(MessageType messageType, const std::string &senderName) : sys::DataMessage(messageType), senderName{senderName} {};
-  virtual ~APMMessage(){};
+    /*
+     * @brief Template for all messages that go to application manager
+     */
+    class APMMessage : public sys::DataMessage
+    {
+      protected:
+        // name of the application that is sending message to application manager.
+        std::string senderName;
 
-  std::string getSenderName()
-  {
-      return senderName;
-  }
-};
+      public:
+        APMMessage(MessageType messageType, const std::string &senderName)
+            : sys::DataMessage(messageType), senderName{senderName} {};
+        virtual ~APMMessage(){};
 
+        std::string getSenderName()
+        {
+            return senderName;
+        }
+    };
 
-//	APMSwitch, //request to switch to given application, optionally also to specified window
-//	APMSwitchData, //request to switch to given application, optionally also to specified window with provided data.
-//	APMSwitchPrevApp, //Request to switch to previous application.
-//	APMConfirmSwitch, //Used when application confirms that it is loosing focus and also when application confirms that is has gained focus
-//	APMConfirmClose, //Sent by application to confirm completion of the close procedure
+    //	APMSwitch, //request to switch to given application, optionally also to specified window
+    //	APMSwitchData, //request to switch to given application, optionally also to specified window with provided data.
+    //	APMSwitchPrevApp, //Request to switch to previous application.
+    //	APMConfirmSwitch, //Used when application confirms that it is loosing focus and also when application confirms
+    //that is has gained focus 	APMConfirmClose, //Sent by application to confirm completion of the close procedure
 
-class APMSwitch : public APMMessage {
-	std::string application;
-	std::string window;
-	std::unique_ptr<gui::SwitchData> data;
-public:
-	APMSwitch( const std::string& senderName, const std::string& applicationName, const std::string& windowName, std::unique_ptr<gui::SwitchData> data ) :
-		APMMessage( MessageType::APMSwitch, senderName ),
-		application{ applicationName },
-		window{ windowName },
-		data{ std::move(data) }{
-	}
-	const std::string& getName() const { return application; };
-	const std::string& getWindow() const { return window; };
-	std::unique_ptr<gui::SwitchData>& getData() { return data; };
-};
+    class APMSwitch : public APMMessage
+    {
+        std::string application;
+        std::string window;
+        std::unique_ptr<gui::SwitchData> data;
 
-class APMSwitchPrevApp : public APMMessage {
-	std::unique_ptr<gui::SwitchData> data;
-public:
-	APMSwitchPrevApp( const std::string& name, std::unique_ptr<gui::SwitchData> data = nullptr) :
-		APMMessage( MessageType::APMSwitchPrevApp, name ),
-		data{ std::move(data) } {}
-	std::unique_ptr<gui::SwitchData>& getData() { return data; };
-};
+      public:
+        APMSwitch(const std::string &senderName,
+                  const std::string &applicationName,
+                  const std::string &windowName,
+                  std::unique_ptr<gui::SwitchData> data)
+            : APMMessage(MessageType::APMSwitch, senderName),
+              application{applicationName}, window{windowName}, data{std::move(data)}
+        {}
+        const std::string &getName() const
+        {
+            return application;
+        };
+        const std::string &getWindow() const
+        {
+            return window;
+        };
+        std::unique_ptr<gui::SwitchData> &getData()
+        {
+            return data;
+        };
+    };
 
-class APMConfirmSwitch : public APMMessage {
-public:
-	APMConfirmSwitch( const std::string& name ) : APMMessage( MessageType::APMConfirmSwitch, name ) {}
-};
+    class APMSwitchPrevApp : public APMMessage
+    {
+        std::unique_ptr<gui::SwitchData> data;
 
-class APMConfirmClose: public APMMessage {
-public:
-	APMConfirmClose( const std::string& name ) :
-		APMMessage( MessageType::APMConfirmClose, name ) {}
-};
+      public:
+        APMSwitchPrevApp(const std::string &name, std::unique_ptr<gui::SwitchData> data = nullptr)
+            : APMMessage(MessageType::APMSwitchPrevApp, name), data{std::move(data)}
+        {}
+        std::unique_ptr<gui::SwitchData> &getData()
+        {
+            return data;
+        };
+    };
 
-class APMRegister: public APMMessage {
-protected:
-	bool status;
-	bool startBackground;
-public:
-	APMRegister( const std::string& senderName, const bool& status, const bool& startBackground  ) :
-	APMMessage( MessageType::APMRegister, senderName ),
-	status{ status },
-	startBackground{ startBackground }{}
+    class APMConfirmSwitch : public APMMessage
+    {
+      public:
+        APMConfirmSwitch(const std::string &name) : APMMessage(MessageType::APMConfirmSwitch, name)
+        {}
+    };
 
-	const bool& getStatus() { return status; };
-	const bool& getStartBackground() { return startBackground; };
-};
+    class APMConfirmClose : public APMMessage
+    {
+      public:
+        APMConfirmClose(const std::string &name) : APMMessage(MessageType::APMConfirmClose, name)
+        {}
+    };
 
-class APMDelayedClose: public APMMessage {
-protected:
-	std::string application;
-public:
-	APMDelayedClose( const std::string& senderName, std::string application  ) :
-	APMMessage( MessageType::APMDeleydClose, senderName ),
-	application{ application } {}
+    class APMRegister : public APMMessage
+    {
+      protected:
+        bool status;
+        bool startBackground;
 
-	const std::string& getApplication() { return application; };
-};
+      public:
+        APMRegister(const std::string &senderName, const bool &status, const bool &startBackground)
+            : APMMessage(MessageType::APMRegister, senderName), status{status}, startBackground{startBackground}
+        {}
 
-class APMChangeLanguage: public APMMessage {
-protected:
-	utils::Lang language;
-public:
-	APMChangeLanguage( const std::string& senderName, utils::Lang language ) :
-	APMMessage( MessageType::APMChangeLanguage, senderName ),
-	language{ language } {}
+        const bool &getStatus()
+        {
+            return status;
+        };
+        const bool &getStartBackground()
+        {
+            return startBackground;
+        };
+    };
 
-	const utils::Lang& getLanguage() { return language; };
-};
+    class APMDelayedClose : public APMMessage
+    {
+      protected:
+        std::string application;
 
-class APMClose: public APMMessage {
-public:
-	APMClose( const std::string& senderName) :
-	APMMessage( MessageType::APMClose, senderName )
-	{}
-};
+      public:
+        APMDelayedClose(const std::string &senderName, std::string application)
+            : APMMessage(MessageType::APMDeleydClose, senderName), application{application}
+        {}
 
-class APMPreventBlocking: public APMMessage {
-public:
-	APMPreventBlocking( const std::string& senderName) :
-	APMMessage( MessageType::APMPreventBlocking, senderName )
-	{}
-};
+        const std::string &getApplication()
+        {
+            return application;
+        };
+    };
 
-class APMInitPowerSaveMode: public APMMessage {
-public:
-	APMInitPowerSaveMode( const std::string& senderName) :
-	APMMessage( MessageType::APMInitPowerSaveMode, senderName )
-	{}
-};
+    class APMChangeLanguage : public APMMessage
+    {
+      protected:
+        utils::Lang language;
+
+      public:
+        APMChangeLanguage(const std::string &senderName, utils::Lang language)
+            : APMMessage(MessageType::APMChangeLanguage, senderName), language{language}
+        {}
+
+        const utils::Lang &getLanguage()
+        {
+            return language;
+        };
+    };
+
+    class APMClose : public APMMessage
+    {
+      public:
+        APMClose(const std::string &senderName) : APMMessage(MessageType::APMClose, senderName)
+        {}
+    };
+
+    class APMPreventBlocking : public APMMessage
+    {
+      public:
+        APMPreventBlocking(const std::string &senderName) : APMMessage(MessageType::APMPreventBlocking, senderName)
+        {}
+    };
+
+    class APMInitPowerSaveMode : public APMMessage
+    {
+      public:
+        APMInitPowerSaveMode(const std::string &senderName) : APMMessage(MessageType::APMInitPowerSaveMode, senderName)
+        {}
+    };
 
 } /* namespace sapm */
 
-
-
 #endif /* MODULE_SERVICES_SERVICE_APPMGR_MESSAGES_APMMESSAGE_HPP_ */
diff --git a/module-services/service-audio/ServiceAudio.cpp b/module-services/service-audio/ServiceAudio.cpp
index c669ef599..159c76673 100644
--- a/module-services/service-audio/ServiceAudio.cpp
+++ b/module-services/service-audio/ServiceAudio.cpp
@@ -2,191 +2,163 @@
  *  @file ServiceAudio.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "ServiceAudio.hpp"
 #include "messages/AudioMessage.hpp"
 
-
 const char *ServiceAudio::serviceName = "ServiceAudio";
 
 using namespace audio;
 
-
-ServiceAudio::ServiceAudio() : sys::Service(serviceName, "", 4096 * 2, sys::ServicePriority::Idle),
-                               audio([this](AudioEvents event) -> int32_t {
-                                   switch (event) {
-                                       case AudioEvents::EndOfFile: {
-                                           auto msg = std::make_shared<AudioNotificationMessage>(
-                                                   static_cast<AudioNotificationMessage::Type >(AudioNotificationMessage::Type::EndOfFile));
-                                           sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceAudioNotifications,
-                                                                   this);
-                                       }
-                                           break;
-                                       case AudioEvents::FileSystemNoSpace:
-                                           break;
-
-                                   }
-                                   return 0;
-                               }) {
+ServiceAudio::ServiceAudio()
+    : sys::Service(serviceName, "", 4096 * 2, sys::ServicePriority::Idle), audio([this](AudioEvents event) -> int32_t {
+          switch (event) {
+          case AudioEvents::EndOfFile: {
+              auto msg = std::make_shared<AudioNotificationMessage>(
+                  static_cast<AudioNotificationMessage::Type>(AudioNotificationMessage::Type::EndOfFile));
+              sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceAudioNotifications, this);
+          } break;
+          case AudioEvents::FileSystemNoSpace:
+              break;
+          }
+          return 0;
+      })
+{
 
     busChannels.push_back(sys::BusChannels::ServiceAudioNotifications);
 
     LOG_INFO("[ServiceAudio] Initializing");
-
 }
 
-ServiceAudio::~ServiceAudio() {
+ServiceAudio::~ServiceAudio()
+{
     LOG_INFO("[ServiceAudio] Cleaning resources");
 }
 
-sys::ReturnCodes ServiceAudio::InitHandler() {
+sys::ReturnCodes ServiceAudio::InitHandler()
+{
     return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceAudio::DeinitHandler() {
+sys::ReturnCodes ServiceAudio::DeinitHandler()
+{
     return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceAudio::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
+sys::ReturnCodes ServiceAudio::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+{
     LOG_FATAL("[ServiceAudio] PowerModeHandler: %d", static_cast<uint32_t>(mode));
     return sys::ReturnCodes::Success;
 }
 
+void ServiceAudio::TickHandler(uint32_t id)
+{}
 
-void ServiceAudio::TickHandler(uint32_t id) {
-
-}
-
-sys::Message_t ServiceAudio::DataReceivedHandler(sys::DataMessage *msgl,sys::ResponseMessage* resp) {
+sys::Message_t ServiceAudio::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+{
     std::shared_ptr<sys::ResponseMessage> responseMsg;
 
-    switch (static_cast<MessageType >(msgl->messageType)) {
+    switch (static_cast<MessageType>(msgl->messageType)) {
 
-        case MessageType::AudioNotification: {
-            AudioNotificationMessage *msg = reinterpret_cast<AudioNotificationMessage *>(msgl);
+    case MessageType::AudioNotification: {
+        AudioNotificationMessage *msg = reinterpret_cast<AudioNotificationMessage *>(msgl);
 
-            switch (msg->type) {
+        switch (msg->type) {
 
-                case AudioNotificationMessage::Type::EndOfFile: {
-                    std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(
-                            MessageType::AudioStop);
-                    sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, this);
-                }
-                    break;
-
-                case AudioNotificationMessage::Type::Stop: {
-
-                }
-                    break;
-                default:
-                    break;
-            }
-        }
-            break;
-
-
-        case MessageType::AudioPlaybackStart: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.Start(Operation::Type::Playback, msg->fileName.c_str())));
-        }
-            break;
-
-        case MessageType::AudioRecorderStart: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.Start(Operation::Type::Recorder, msg->fileName.c_str())));
-        }
-            break;
-
-        case MessageType::AudioRoutingStart: {
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.Start(Operation::Type::Router)));
-        }
-            break;
-
-        case MessageType::AudioStop: {
-            responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode >(audio.Stop()));
-
-            // Send notification that audio file was stopped
-            auto msg = std::make_shared<AudioNotificationMessage>(
-                    static_cast<AudioNotificationMessage::Type >(AudioNotificationMessage::Type::Stop));
-            sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceAudioNotifications, this);
-        }
-            break;
-
-        case MessageType::AudioPause: {
-            responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode >(audio.Pause()));
-        }
-            break;
-
-        case MessageType::AudioResume: {
-            responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode >(audio.Resume()));
-        }
-            break;
-
-
-        case MessageType::AudioGetFileTags: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            auto tag = audio.GetFileTags(msg->fileName.c_str());
-            if (tag) {
-                responseMsg = std::make_shared<AudioResponseMessage>(RetCode::Success, tag.value());
-            } else {
-                responseMsg = std::make_shared<AudioResponseMessage>(RetCode::FileDoesntExist);
-            }
-
-        }
-            break;
-
-        case MessageType::AudioRoutingRecordCtrl: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.SendEvent(
-                            msg->enable ? Operation::Event::StartCallRecording : Operation::Event::StopCallRecording)));
-        }
-            break;
-
-        case MessageType::AudioRoutingMute: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.SendEvent(
-                            msg->enable ? Operation::Event::CallMute : Operation::Event::CallUnmute)));
-        }
-            break;
-
-        case MessageType::AudioRoutingSpeakerhone: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.SendEvent(
-                            msg->enable ? Operation::Event::CallSpeakerphoneOn : Operation::Event::CallSpeakerphoneOff)));
-        }
-            break;
-
-        case MessageType::AudioSetOutputVolume: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.SetOutputVolume(msg->val)));
-        }
-            break;
-
-        case MessageType::AudioSetInputGain: {
-            AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
-            responseMsg = std::make_shared<AudioResponseMessage>(
-                    static_cast<RetCode >(audio.SetInputGain(msg->val)));
-        }
-            break;
+        case AudioNotificationMessage::Type::EndOfFile: {
+            std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioStop);
+            sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, this);
+        } break;
 
+        case AudioNotificationMessage::Type::Stop: {
 
+        } break;
         default:
             break;
-    }
+        }
+    } break;
 
+    case MessageType::AudioPlaybackStart: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg              = std::make_shared<AudioResponseMessage>(
+            static_cast<RetCode>(audio.Start(Operation::Type::Playback, msg->fileName.c_str())));
+    } break;
+
+    case MessageType::AudioRecorderStart: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg              = std::make_shared<AudioResponseMessage>(
+            static_cast<RetCode>(audio.Start(Operation::Type::Recorder, msg->fileName.c_str())));
+    } break;
+
+    case MessageType::AudioRoutingStart: {
+        responseMsg =
+            std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.Start(Operation::Type::Router)));
+    } break;
+
+    case MessageType::AudioStop: {
+        responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.Stop()));
+
+        // Send notification that audio file was stopped
+        auto msg = std::make_shared<AudioNotificationMessage>(
+            static_cast<AudioNotificationMessage::Type>(AudioNotificationMessage::Type::Stop));
+        sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceAudioNotifications, this);
+    } break;
+
+    case MessageType::AudioPause: {
+        responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.Pause()));
+    } break;
+
+    case MessageType::AudioResume: {
+        responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.Resume()));
+    } break;
+
+    case MessageType::AudioGetFileTags: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        auto tag                 = audio.GetFileTags(msg->fileName.c_str());
+        if (tag) {
+            responseMsg = std::make_shared<AudioResponseMessage>(RetCode::Success, tag.value());
+        }
+        else {
+            responseMsg = std::make_shared<AudioResponseMessage>(RetCode::FileDoesntExist);
+        }
+
+    } break;
+
+    case MessageType::AudioRoutingRecordCtrl: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg              = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(
+            audio.SendEvent(msg->enable ? Operation::Event::StartCallRecording : Operation::Event::StopCallRecording)));
+    } break;
+
+    case MessageType::AudioRoutingMute: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg              = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(
+            audio.SendEvent(msg->enable ? Operation::Event::CallMute : Operation::Event::CallUnmute)));
+    } break;
+
+    case MessageType::AudioRoutingSpeakerhone: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg              = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.SendEvent(
+            msg->enable ? Operation::Event::CallSpeakerphoneOn : Operation::Event::CallSpeakerphoneOff)));
+    } break;
+
+    case MessageType::AudioSetOutputVolume: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.SetOutputVolume(msg->val)));
+    } break;
+
+    case MessageType::AudioSetInputGain: {
+        AudioRequestMessage *msg = reinterpret_cast<AudioRequestMessage *>(msgl);
+        responseMsg = std::make_shared<AudioResponseMessage>(static_cast<RetCode>(audio.SetInputGain(msg->val)));
+    } break;
+
+    default:
+        break;
+    }
 
     return responseMsg;
 }
diff --git a/module-services/service-audio/ServiceAudio.hpp b/module-services/service-audio/ServiceAudio.hpp
index a75c14fa4..966b2020b 100644
--- a/module-services/service-audio/ServiceAudio.hpp
+++ b/module-services/service-audio/ServiceAudio.hpp
@@ -2,13 +2,11 @@
  *  @file ServiceAudio.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_SERVICEAUDIO_HPP
 #define PUREPHONE_SERVICEAUDIO_HPP
 
@@ -17,15 +15,15 @@
 #include "Audio/Audio.hpp"
 #include "MessageType.hpp"
 
-class ServiceAudio : public sys::Service {
-
-public:
+class ServiceAudio : public sys::Service
+{
 
+  public:
     ServiceAudio();
 
     ~ServiceAudio();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl,sys::ResponseMessage* resp=nullptr) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp = nullptr) override;
 
     // Invoked when timer ticked
     void TickHandler(uint32_t id) override;
@@ -39,10 +37,9 @@ public:
 
     static const char *serviceName;
 
-private:
+  private:
     audio::Audio audio;
-    std::function<uint32_t (audio::AudioEvents event)> audioCallback = nullptr;
+    std::function<uint32_t(audio::AudioEvents event)> audioCallback = nullptr;
 };
 
-
-#endif //PUREPHONE_SERVICEAUDIO_HPP
+#endif // PUREPHONE_SERVICEAUDIO_HPP
diff --git a/module-services/service-audio/api/AudioServiceAPI.cpp b/module-services/service-audio/api/AudioServiceAPI.cpp
index 07418fe80..9d1d8a909 100644
--- a/module-services/service-audio/api/AudioServiceAPI.cpp
+++ b/module-services/service-audio/api/AudioServiceAPI.cpp
@@ -2,113 +2,121 @@
  *  @file AudioSerivceAPI.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "AudioServiceAPI.hpp"
 #include "Service/Bus.hpp"
 #include "../ServiceAudio.hpp"
 
 using namespace audio;
 
-
-RetCode AudioServiceAPI::PlaybackStart(sys::Service *serv, const std::string &fileName) {
+RetCode AudioServiceAPI::PlaybackStart(sys::Service *serv, const std::string &fileName)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioPlaybackStart);
-    msg->fileName = fileName;
+    msg->fileName                            = fileName;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-RetCode AudioServiceAPI::RecordingStart(sys::Service *serv, const std::string &fileName) {
+RetCode AudioServiceAPI::RecordingStart(sys::Service *serv, const std::string &fileName)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioRecorderStart);
-    msg->fileName = fileName;
+    msg->fileName                            = fileName;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-audio::RetCode AudioServiceAPI::RoutingStart(sys::Service *serv) {
+audio::RetCode AudioServiceAPI::RoutingStart(sys::Service *serv)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingStart);
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-audio::RetCode AudioServiceAPI::RoutingRecordCtrl(sys::Service *serv, bool enable) {
-    std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingRecordCtrl);
+audio::RetCode AudioServiceAPI::RoutingRecordCtrl(sys::Service *serv, bool enable)
+{
+    std::shared_ptr<AudioRequestMessage> msg =
+        std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingRecordCtrl);
     msg->enable = enable;
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret    = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-audio::RetCode AudioServiceAPI::RoutingMute(sys::Service *serv, bool enable) {
+audio::RetCode AudioServiceAPI::RoutingMute(sys::Service *serv, bool enable)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingMute);
-    msg->enable = enable;
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    msg->enable                              = enable;
+    auto ret                                 = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-audio::RetCode AudioServiceAPI::RoutingSpeakerPhone(sys::Service *serv, bool enable) {
-    std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingSpeakerhone);
+audio::RetCode AudioServiceAPI::RoutingSpeakerPhone(sys::Service *serv, bool enable)
+{
+    std::shared_ptr<AudioRequestMessage> msg =
+        std::make_shared<AudioRequestMessage>(MessageType::AudioRoutingSpeakerhone);
     msg->enable = enable;
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret    = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-RetCode AudioServiceAPI::Stop(sys::Service *serv) {
+RetCode AudioServiceAPI::Stop(sys::Service *serv)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioStop);
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-RetCode AudioServiceAPI::Pause(sys::Service *serv) {
+RetCode AudioServiceAPI::Pause(sys::Service *serv)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioPause);
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-RetCode AudioServiceAPI::Resume(sys::Service *serv) {
+RetCode AudioServiceAPI::Resume(sys::Service *serv)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioResume);
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-
-
-RetCode AudioServiceAPI::SetInputGain(sys::Service *serv, const Gain gain) {
+RetCode AudioServiceAPI::SetInputGain(sys::Service *serv, const Gain gain)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioSetInputGain);
-    msg->val = gain;
+    msg->val                                 = gain;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-RetCode AudioServiceAPI::SetOutputVolume(sys::Service *serv, const Volume vol) {
+RetCode AudioServiceAPI::SetOutputVolume(sys::Service *serv, const Volume vol)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioSetOutputVolume);
-    msg->val = vol;
+    msg->val                                 = vol;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode;
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode;
 }
 
-std::optional<Tags> AudioServiceAPI::GetFileTags(sys::Service *serv, const std::string &fileName) {
+std::optional<Tags> AudioServiceAPI::GetFileTags(sys::Service *serv, const std::string &fileName)
+{
     std::shared_ptr<AudioRequestMessage> msg = std::make_shared<AudioRequestMessage>(MessageType::AudioGetFileTags);
-    msg->fileName = fileName;
+    msg->fileName                            = fileName;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceAudio::serviceName,serv,5000);
-    if(reinterpret_cast<AudioResponseMessage*>(ret.second.get())->retCode != RetCode::Success){
+    auto ret = sys::Bus::SendUnicast(msg, ServiceAudio::serviceName, serv, 5000);
+    if (reinterpret_cast<AudioResponseMessage *>(ret.second.get())->retCode != RetCode::Success) {
         return {};
     }
-    else{
-        return reinterpret_cast<AudioResponseMessage*>(ret.second.get())->tags;
+    else {
+        return reinterpret_cast<AudioResponseMessage *>(ret.second.get())->tags;
     }
 }
-
diff --git a/module-services/service-audio/api/AudioServiceAPI.hpp b/module-services/service-audio/api/AudioServiceAPI.hpp
index 63f9d79cb..700a703a3 100644
--- a/module-services/service-audio/api/AudioServiceAPI.hpp
+++ b/module-services/service-audio/api/AudioServiceAPI.hpp
@@ -6,18 +6,19 @@
 
 class Service;
 
-class AudioServiceAPI {
-public:
-    static audio::RetCode PlaybackStart(sys::Service* serv,const std::string& fileName);
-    static audio::RetCode RecordingStart(sys::Service* serv,const std::string& fileName);
-    static audio::RetCode RoutingStart(sys::Service* serv);
-    static audio::RetCode RoutingRecordCtrl(sys::Service* serv,bool enable);
-    static audio::RetCode RoutingMute(sys::Service* serv,bool enable);
-    static audio::RetCode RoutingSpeakerPhone(sys::Service* serv,bool enable);
-    static audio::RetCode Stop(sys::Service* serv);
-    static audio::RetCode Pause(sys::Service* serv);
-    static audio::RetCode Resume(sys::Service* serv);
-    static std::optional<audio::Tags> GetFileTags(sys::Service* serv,const std::string& fileName);
-    static audio::RetCode SetOutputVolume(sys::Service* serv,const audio::Volume vol);
-    static audio::RetCode SetInputGain(sys::Service* serv,const audio::Gain gain);
+class AudioServiceAPI
+{
+  public:
+    static audio::RetCode PlaybackStart(sys::Service *serv, const std::string &fileName);
+    static audio::RetCode RecordingStart(sys::Service *serv, const std::string &fileName);
+    static audio::RetCode RoutingStart(sys::Service *serv);
+    static audio::RetCode RoutingRecordCtrl(sys::Service *serv, bool enable);
+    static audio::RetCode RoutingMute(sys::Service *serv, bool enable);
+    static audio::RetCode RoutingSpeakerPhone(sys::Service *serv, bool enable);
+    static audio::RetCode Stop(sys::Service *serv);
+    static audio::RetCode Pause(sys::Service *serv);
+    static audio::RetCode Resume(sys::Service *serv);
+    static std::optional<audio::Tags> GetFileTags(sys::Service *serv, const std::string &fileName);
+    static audio::RetCode SetOutputVolume(sys::Service *serv, const audio::Volume vol);
+    static audio::RetCode SetInputGain(sys::Service *serv, const audio::Gain gain);
 };
diff --git a/module-services/service-audio/messages/AudioMessage.hpp b/module-services/service-audio/messages/AudioMessage.hpp
index 691ae0fd5..d13ba5d37 100644
--- a/module-services/service-audio/messages/AudioMessage.hpp
+++ b/module-services/service-audio/messages/AudioMessage.hpp
@@ -2,13 +2,11 @@
  *  @file AudioMessage.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 29.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_AUDIOMESSAGE_HPP
 #define PUREPHONE_AUDIOMESSAGE_HPP
 
@@ -19,53 +17,57 @@
 #include "Audio/AudioCommon.hpp"
 #include "Audio/decoder/decoder.hpp"
 
+class AudioMessage : public sys::DataMessage
+{
+  public:
+    AudioMessage(MessageType messageType) : sys::DataMessage(messageType), type(messageType){};
 
-class AudioMessage : public sys::DataMessage {
-public:
-  AudioMessage(MessageType messageType) : sys::DataMessage(messageType), type(messageType){};
-
-  virtual ~AudioMessage(){};
-
-  MessageType type;
+    virtual ~AudioMessage(){};
 
+    MessageType type;
 };
 
-class AudioNotificationMessage : public AudioMessage {
-public:
-
-    //Audio service will send async notifications specified below
-    enum class Type {
+class AudioNotificationMessage : public AudioMessage
+{
+  public:
+    // Audio service will send async notifications specified below
+    enum class Type
+    {
         EndOfFile,
         Stop
     };
 
+    AudioNotificationMessage(Type type) : AudioMessage(MessageType::AudioNotification), type(type)
+    {}
 
-    AudioNotificationMessage(Type type) : AudioMessage(
-            MessageType::AudioNotification), type(type){}
-
-    ~AudioNotificationMessage() {}
+    ~AudioNotificationMessage()
+    {}
 
     Type type;
 };
 
-class AudioRequestMessage : public AudioMessage{
-public:
-
-    AudioRequestMessage(MessageType messageType):AudioMessage(messageType){}
-    ~AudioRequestMessage() {}
+class AudioRequestMessage : public AudioMessage
+{
+  public:
+    AudioRequestMessage(MessageType messageType) : AudioMessage(messageType)
+    {}
+    ~AudioRequestMessage()
+    {}
 
     std::string fileName;
     float val;
     bool enable;
 };
 
-class AudioResponseMessage: public sys::ResponseMessage {
-public:
-    AudioResponseMessage(audio::RetCode retCode,audio::Tags tags={}) : sys::ResponseMessage(),retCode(retCode),tags(tags) {};
-    virtual ~AudioResponseMessage() {};
+class AudioResponseMessage : public sys::ResponseMessage
+{
+  public:
+    AudioResponseMessage(audio::RetCode retCode, audio::Tags tags = {})
+        : sys::ResponseMessage(), retCode(retCode), tags(tags){};
+    virtual ~AudioResponseMessage(){};
 
     audio::RetCode retCode;
     audio::Tags tags;
 };
 
-#endif //PUREPHONE_AUDIOMESSAGE_HPP
+#endif // PUREPHONE_AUDIOMESSAGE_HPP
diff --git a/module-services/service-bluetooth/ServiceBluetooth.cpp b/module-services/service-bluetooth/ServiceBluetooth.cpp
index c7b482f9d..d24451670 100644
--- a/module-services/service-bluetooth/ServiceBluetooth.cpp
+++ b/module-services/service-bluetooth/ServiceBluetooth.cpp
@@ -8,72 +8,78 @@
 
 const char *ServiceBluetooth::serviceName = "ServiceBluetooth";
 
-ServiceBluetooth::ServiceBluetooth() : sys::Service(serviceName) {
+ServiceBluetooth::ServiceBluetooth() : sys::Service(serviceName)
+{
     LOG_INFO("[ServiceBluetooth] Initializing");
-    testTimerID = CreateTimer(3000,true);
+    testTimerID = CreateTimer(3000, true);
     ReloadTimer(testTimerID);
 }
 
-ServiceBluetooth::~ServiceBluetooth() {
+ServiceBluetooth::~ServiceBluetooth()
+{
     LOG_INFO("[ServiceBluetooth] Cleaning resources");
 }
 
 // Invoked when timer ticked
-void ServiceBluetooth::TickHandler(uint32_t id) {
-}
+void ServiceBluetooth::TickHandler(uint32_t id)
+{}
 
 // This code is experimental:
 // this means it is an init point of bluetooth feature handling
-sys::ReturnCodes ServiceBluetooth::InitHandler() {
+sys::ReturnCodes ServiceBluetooth::InitHandler()
+{
     LOG_ERROR("Bluetooth experimental!");
-    worker=std::make_unique<BluetoothWorker>(this);
+    worker = std::make_unique<BluetoothWorker>(this);
 
     return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceBluetooth::DeinitHandler() {
+sys::ReturnCodes ServiceBluetooth::DeinitHandler()
+{
 
     return sys::ReturnCodes::Success;
 }
 
-sys::Message_t ServiceBluetooth::DataReceivedHandler(sys::DataMessage* msg,sys::ResponseMessage* resp) {
+sys::Message_t ServiceBluetooth::DataReceivedHandler(sys::DataMessage *msg, sys::ResponseMessage *resp)
+{
     try {
         switch (static_cast<MessageType>(msg->messageType)) {
         case MessageType::BluetoothRequest: {
             BluetoothMessage *lmsg = dynamic_cast<BluetoothMessage *>(msg);
             LOG_INFO("Bluetooth request!");
             switch (lmsg->req) {
-                case BluetoothMessage::Start:
-                    worker->run();
-                    break;
-                case BluetoothMessage::Scan:
-                    if(worker->scan()) {
-                        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Success);
-                    } else {
-                        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Failure);
-                    }
-                    break;
+            case BluetoothMessage::Start:
+                worker->run();
+                break;
+            case BluetoothMessage::Scan:
+                if (worker->scan()) {
+                    return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Success);
+                }
+                else {
+                    return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Failure);
+                }
+                break;
 
-                case BluetoothMessage::PAN: {
-/// TODO request lwip first...
-/// because TODO blocking message - wrecks system
-                    LOG_INFO("Request LwIP running!");
-//                    auto ret = message_lwip(this, LwIP_message::Request::Start);
-//                    if (ret != sys::ReturnCodes::Success) {
-//                        LOG_ERROR("Request for LwIP start failed");
-//                    }
-//                    else {
-                        /// TODO request PPP
-                        LOG_INFO("Start PAN");
-                        worker->start_pan();
-//                    }
-                } break;
-                case BluetoothMessage::Visible:
-                    worker->set_visible();
-                    break;
+            case BluetoothMessage::PAN: {
+                /// TODO request lwip first...
+                /// because TODO blocking message - wrecks system
+                LOG_INFO("Request LwIP running!");
+                //                    auto ret = message_lwip(this, LwIP_message::Request::Start);
+                //                    if (ret != sys::ReturnCodes::Success) {
+                //                        LOG_ERROR("Request for LwIP start failed");
+                //                    }
+                //                    else {
+                /// TODO request PPP
+                LOG_INFO("Start PAN");
+                worker->start_pan();
+                //                    }
+            } break;
+            case BluetoothMessage::Visible:
+                worker->set_visible();
+                break;
 
-                default:
-                    break;
+            default:
+                break;
             }
             break;
         }
@@ -81,7 +87,8 @@ sys::Message_t ServiceBluetooth::DataReceivedHandler(sys::DataMessage* msg,sys::
             LOG_INFO("BT not handled!");
             break;
         }
-    } catch (std::exception &ex) {
+    }
+    catch (std::exception &ex) {
         LOG_ERROR("Exception on BtService!: %s", ex.what());
     }
     return std::make_shared<sys::ResponseMessage>();
diff --git a/module-services/service-bluetooth/ServiceBluetooth.hpp b/module-services/service-bluetooth/ServiceBluetooth.hpp
index ba2211b5b..888fc948b 100644
--- a/module-services/service-bluetooth/ServiceBluetooth.hpp
+++ b/module-services/service-bluetooth/ServiceBluetooth.hpp
@@ -4,20 +4,21 @@
 #include "Bluetooth/BluetoothWorker.hpp"
 #include <memory>
 
-class ServiceBluetooth: public sys::Service  {
+class ServiceBluetooth : public sys::Service
+{
 
-public:
+  public:
     ServiceBluetooth();
     ~ServiceBluetooth();
 
-    virtual sys::Message_t DataReceivedHandler(sys::DataMessage* msg,sys::ResponseMessage* resp) override;
+    virtual sys::Message_t DataReceivedHandler(sys::DataMessage *msg, sys::ResponseMessage *resp) override;
     void TickHandler(uint32_t id) override;
     sys::ReturnCodes InitHandler() override;
     sys::ReturnCodes DeinitHandler() override;
     virtual sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override;
 
-private:
-    static const char* serviceName;
+  private:
+    static const char *serviceName;
     uint32_t testTimerID;
     std::unique_ptr<BluetoothWorker> worker;
 };
diff --git a/module-services/service-bluetooth/messages/BluetoothMessage.hpp b/module-services/service-bluetooth/messages/BluetoothMessage.hpp
index 6992c2b7a..8d9a356b6 100644
--- a/module-services/service-bluetooth/messages/BluetoothMessage.hpp
+++ b/module-services/service-bluetooth/messages/BluetoothMessage.hpp
@@ -3,9 +3,11 @@
 #include "Service/Message.hpp"
 #include "MessageType.hpp"
 
-class BluetoothMessage : public sys::DataMessage {
-public:
-    enum Request {
+class BluetoothMessage : public sys::DataMessage
+{
+  public:
+    enum Request
+    {
         None,
         Start,
         Scan,
diff --git a/module-services/service-cellular/CellularCall.cpp b/module-services/service-cellular/CellularCall.cpp
index 8d7ccb38e..3e4cd603b 100644
--- a/module-services/service-cellular/CellularCall.cpp
+++ b/module-services/service-cellular/CellularCall.cpp
@@ -12,18 +12,16 @@ namespace ModemCall
     ModemCall::ModemCall(const std::string str)
     {
         const std::string prefix = "+CLCC: ";
-        std::string callEntry = str;
+        std::string callEntry    = str;
 
         // Check for a valid prefix
-        if (callEntry.rfind(prefix, 0) != 0)
-        {
+        if (callEntry.rfind(prefix, 0) != 0) {
             LOG_ERROR("no valid prefix");
             LOG_ERROR("callEntry %s", callEntry.c_str());
 
             throw std::runtime_error("No valid prefix");
         }
-        else
-        {
+        else {
             // remove the prefix
             callEntry.erase(0, prefix.length());
         }
@@ -31,33 +29,31 @@ namespace ModemCall
         std::vector<std::string> tokens = utils::split(callEntry, ",");
 
         auto numberOfTokens = tokens.size();
-        if (numberOfTokens != 7 && numberOfTokens != 8)
-        {
+        if (numberOfTokens != 7 && numberOfTokens != 8) {
             LOG_ERROR("wrong number of tokens %u", numberOfTokens);
             throw std::runtime_error("No valid prefix");
         }
         // TODO: alek: add paramters validation
-        idx = std::stoul(tokens[0]);
-        dir = static_cast<CallDir>(std::stoul(tokens[1]));
-        state = static_cast<CallState>(std::stoul(tokens[2]));
-        mode = static_cast<CallMode>(std::stoul(tokens[3]));
+        idx              = std::stoul(tokens[0]);
+        dir              = static_cast<CallDir>(std::stoul(tokens[1]));
+        state            = static_cast<CallState>(std::stoul(tokens[2]));
+        mode             = static_cast<CallMode>(std::stoul(tokens[3]));
         isConferenceCall = static_cast<bool>(std::stoul(tokens[4]));
-        phoneNumber = tokens[5];
-        type = static_cast<CallType>(std::stoul(tokens[6]));
-        if (numberOfTokens == 8)
-        {
+        phoneNumber      = tokens[5];
+        type             = static_cast<CallType>(std::stoul(tokens[6]));
+        if (numberOfTokens == 8) {
             phoneBookName = tokens[7];
         }
     }
 
     std::ostream &operator<<(std::ostream &out, const ModemCall &call)
     {
-        out << " <idx> " << call.idx << " <dir> " << static_cast<uint32_t>(call.dir) << " <stat> " << static_cast<uint32_t>(call.state) << " <mode> "
-            << static_cast<uint32_t>(call.mode) << " <mpty> " << static_cast<uint32_t>(call.isConferenceCall) << " <number> " << call.phoneNumber << " <type> "
+        out << " <idx> " << call.idx << " <dir> " << static_cast<uint32_t>(call.dir) << " <stat> "
+            << static_cast<uint32_t>(call.state) << " <mode> " << static_cast<uint32_t>(call.mode) << " <mpty> "
+            << static_cast<uint32_t>(call.isConferenceCall) << " <number> " << call.phoneNumber << " <type> "
             << static_cast<uint32_t>(call.type);
 
-        if (!call.phoneBookName.empty())
-        {
+        if (!call.phoneBookName.empty()) {
             out << " <alpha> " << call.phoneBookName;
         }
 
@@ -72,8 +68,7 @@ namespace
     {
         time_t timestamp;
         RtcBspError_e rtcErr = bsp::rtc_GetCurrentTimestamp(&timestamp);
-        if (rtcErr != RtcBspError_e::RtcBspOK)
-        {
+        if (rtcErr != RtcBspError_e::RtcBspOK) {
             LOG_ERROR("rtc_GetCurrentTimestamp failed with %d error", rtcErr);
             timestamp = 0;
         }
@@ -86,8 +81,7 @@ namespace CellularCall
 {
     bool CellularCall::startCall(const UTF8 &number, const CallType type)
     {
-        if (isValid())
-        {
+        if (isValid()) {
             LOG_ERROR("call already set");
             return false;
         }
@@ -95,12 +89,11 @@ namespace CellularCall
         clear();
         CalllogRecord callRec;
         callRec.number = number;
-        callRec.type = type;
-        callRec.date = getCurrentTimeStamp();
-        callRec.name = number; // temporary set name as number
-        call = startCallAction ? startCallAction(callRec) : CalllogRecord();
-        if (call.ID == DB_ID_NONE)
-        {
+        callRec.type   = type;
+        callRec.date   = getCurrentTimeStamp();
+        callRec.name   = number; // temporary set name as number
+        call           = startCallAction ? startCallAction(callRec) : CalllogRecord();
+        if (call.ID == DB_ID_NONE) {
             LOG_ERROR("startCallAction failed");
             clear();
             return false;
@@ -111,10 +104,9 @@ namespace CellularCall
 
     bool CellularCall::setActive()
     {
-        if (isValid())
-        {
+        if (isValid()) {
             startActiveTime = getCurrentTimeStamp();
-            isActiveCall = true;
+            isActiveCall    = true;
             return true;
         }
         return false;
@@ -122,38 +114,30 @@ namespace CellularCall
 
     bool CellularCall::endCall(Forced forced)
     {
-        if (!isValid())
-        {
+        if (!isValid()) {
             LOG_ERROR("Trying to update invalid call");
             return false;
         }
 
-        if (isActiveCall)
-        {
+        if (isActiveCall) {
             time_t endTime = getCurrentTimeStamp();
-            call.duration = endTime > startActiveTime ? endTime - startActiveTime : 0;
+            call.duration  = endTime > startActiveTime ? endTime - startActiveTime : 0;
         }
-        else
-        {
+        else {
             auto callType = call.type;
-            switch (callType)
-            {
+            switch (callType) {
             case CallType::CT_INCOMING: {
-                if (forced == Forced::True)
-                {
+                if (forced == Forced::True) {
                     setType(CallType::CT_REJECTED);
                 }
-                else
-                {
+                else {
                     setType(CallType::CT_MISSED);
                 }
-            }
-            break;
+            } break;
 
             case CallType::CT_OUTGOING: {
                 // do nothing
-            }
-            break;
+            } break;
 
             default:
                 LOG_ERROR("Not a valid call type %u", callType);
@@ -161,8 +145,7 @@ namespace CellularCall
             }
         }
 
-        if (!(endCallAction && endCallAction(call)))
-        {
+        if (!(endCallAction && endCallAction(call))) {
             LOG_ERROR("CalllogUpdate failed, id %u", call.ID);
             return false;
         }
diff --git a/module-services/service-cellular/CellularCall.hpp b/module-services/service-cellular/CellularCall.hpp
index 9f69fb5a2..7734440b0 100644
--- a/module-services/service-cellular/CellularCall.hpp
+++ b/module-services/service-cellular/CellularCall.hpp
@@ -13,7 +13,8 @@ namespace ModemCall
         Dialing,    // 2 dialing (MO call): number dialed
         Alerting,   // 3 alerting (MO call): number dialed and the called party is alerted
         Incoming,   // 4 incoming (MT call): incoming call, ringtone played (AT RING notification)
-        Waiting     // 5 waiting (MT call): call waiting notification while another call is active (if call waiting feature enabled)
+        Waiting // 5 waiting (MT call): call waiting notification while another call is active (if call waiting feature
+                // enabled)
     };
 
     enum class CallDir : uint8_t
@@ -25,16 +26,16 @@ namespace ModemCall
     enum class CallMode : uint8_t
     {
         Voice = 0,
-        Data = 1,
-        FAX = 2,
+        Data  = 1,
+        FAX   = 2,
     };
 
     // TODO: alek: check specification
     enum class CallType : uint8_t
     {
-        UknownType = 129,
+        UknownType      = 129,
         InternationType = 145, // contains the "+" character
-        NationalType = 161,
+        NationalType    = 161,
     };
 
     struct ModemCall
@@ -46,10 +47,10 @@ namespace ModemCall
         bool isConferenceCall;
         std::string phoneNumber;
         CallType type;
-        std::string phoneBookName; // TODO: alek: This field is defined in the AT+CLCC command resposne but our modem is not returning it.
-                                   // Need to verify in modem specification
+        std::string phoneBookName; // TODO: alek: This field is defined in the AT+CLCC command resposne but our modem is
+                                   // not returning it. Need to verify in modem specification
 
-        ModemCall() = delete;
+        ModemCall()  = delete;
         ~ModemCall() = default;
         ModemCall(const std::string str);
 
@@ -80,27 +81,30 @@ namespace CellularCall
 
         void clear()
         {
-            call.ID = 0; // 0 - Invalid
-            call.number = "";
+            call.ID           = 0; // 0 - Invalid
+            call.number       = "";
             call.presentation = PresentationType::PR_ALLOWED;
-            call.date = 0;
-            call.duration = 0;
-            call.type = CallType::CT_NONE;
-            call.name = "";
-            call.contactId = "";
-            isActiveCall = false;
-            startActiveTime = 0;
+            call.date         = 0;
+            call.duration     = 0;
+            call.type         = CallType::CT_NONE;
+            call.name         = "";
+            call.contactId    = "";
+            isActiveCall      = false;
+            startActiveTime   = 0;
         }
 
       public:
-        CellularCall(const UTF8 &number = "", const CallType type = CallType::CT_NONE, const time_t date = 0, const time_t duration = 0)
+        CellularCall(const UTF8 &number    = "",
+                     const CallType type   = CallType::CT_NONE,
+                     const time_t date     = 0,
+                     const time_t duration = 0)
         {
             clear();
-            this->call.number = number;
-            this->call.date = date;
-            this->call.duration = duration;
-            this->call.type = type;
-            this->call.name = number; // temporary set number as name
+            this->call.number    = number;
+            this->call.date      = date;
+            this->call.duration  = duration;
+            this->call.type      = type;
+            this->call.name      = number; // temporary set number as name
             this->call.contactId = "1";
         }
 
diff --git a/module-services/service-cellular/ServiceCellular.cpp b/module-services/service-cellular/ServiceCellular.cpp
index fc38bb74d..9d127db5a 100644
--- a/module-services/service-cellular/ServiceCellular.cpp
+++ b/module-services/service-cellular/ServiceCellular.cpp
@@ -2,7 +2,7 @@
  *  @file ServiceCellular.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 03.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -52,8 +52,7 @@ using namespace cellular;
 
 const char *State::c_str(State::ST state) const
 {
-    switch (state)
-    {
+    switch (state) {
     case ST::Idle:
         return "Idle";
     case ST::PowerUpInProgress:
@@ -97,8 +96,7 @@ ServiceCellular::ServiceCellular() : sys::Service(serviceName, "", cellularStack
 
     ongoingCall.setStartCallAction([=](const CalllogRecord &rec) {
         auto call = DBServiceAPI::CalllogAdd(this, rec);
-        if (call.ID == DB_ID_NONE)
-        {
+        if (call.ID == DB_ID_NONE) {
             LOG_ERROR("CalllogAdd failed");
         }
         return call;
@@ -112,8 +110,7 @@ ServiceCellular::ServiceCellular() : sys::Service(serviceName, "", cellularStack
         std::string message;
         auto msg = identifyNotification(frame.getFrame().data);
 
-        if (msg->type == CellularNotificationMessage::Type::None)
-        {
+        if (msg->type == CellularNotificationMessage::Type::None) {
             LOG_INFO("Skipped uknown notification");
             return;
         }
@@ -122,7 +119,8 @@ ServiceCellular::ServiceCellular() : sys::Service(serviceName, "", cellularStack
     };
 }
 
-ServiceCellular::~ServiceCellular() {
+ServiceCellular::~ServiceCellular()
+{
 
     LOG_INFO("[ServiceCellular] Cleaning resources");
     if (cmux != nullptr) {
@@ -132,62 +130,64 @@ ServiceCellular::~ServiceCellular() {
 
 void ServiceCellular::CallStateTimerHandler()
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularListCurrentCalls);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularListCurrentCalls);
     sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, this);
 }
 
 // Invoked when timer ticked
 void ServiceCellular::TickHandler(uint32_t id)
 {
-    if (id == callStateTimerId)
-    {
+    if (id == callStateTimerId) {
         CallStateTimerHandler();
     }
-    else
-    {
+    else {
         LOG_ERROR("Unrecognized timer ID = %u", id);
     }
 }
 
 // Invoked during initialization
-sys::ReturnCodes ServiceCellular::InitHandler() {
+sys::ReturnCodes ServiceCellular::InitHandler()
+{
 
-    //cmux = new TS0710(PortSpeed_e::PS460800, this);
+    // cmux = new TS0710(PortSpeed_e::PS460800, this);
 
     // Start procedure is as follow:
-        /*
-         * 1) Power-up
-         * 2) Init configuration of GSM modem
-         * 3) Audio configuration
-         * 4) Start multiplexer
-         * 5) Modem fully-operational
-         */
+    /*
+     * 1) Power-up
+     * 2) Init configuration of GSM modem
+     * 3) Audio configuration
+     * 4) Start multiplexer
+     * 5) Modem fully-operational
+     */
 
     // Start power-up procedure
-    sys::Bus::SendUnicast(std::make_shared<CellularRequestMessage>(MessageType::CellularStartPowerUpProcedure),
-                          GetName(), this);
+    sys::Bus::SendUnicast(
+        std::make_shared<CellularRequestMessage>(MessageType::CellularStartPowerUpProcedure), GetName(), this);
     state.set(State::ST::PowerUpInProgress);
 
     return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceCellular::DeinitHandler() {
+sys::ReturnCodes ServiceCellular::DeinitHandler()
+{
 
     return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceCellular::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
+sys::ReturnCodes ServiceCellular::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+{
     LOG_FATAL("[ServiceCellular] PowerModeHandler: %d", static_cast<uint32_t>(mode));
 
-    switch (mode){
-        case sys::ServicePowerMode ::Active:
-            //muxdaemon->ExitSleepMode();
-            break;
-        case sys::ServicePowerMode ::SuspendToRAM:
-        case sys::ServicePowerMode ::SuspendToNVM:
-        	LOG_FATAL("TEMPORARY DISABLED!!!!! UNCOMMENT WHEN READY.");
-//            muxdaemon->EnterSleepMode();
-            break;
+    switch (mode) {
+    case sys::ServicePowerMode ::Active:
+        // muxdaemon->ExitSleepMode();
+        break;
+    case sys::ServicePowerMode ::SuspendToRAM:
+    case sys::ServicePowerMode ::SuspendToNVM:
+        LOG_FATAL("TEMPORARY DISABLED!!!!! UNCOMMENT WHEN READY.");
+        //            muxdaemon->EnterSleepMode();
+        break;
     }
 
     return sys::ReturnCodes::Success;
@@ -197,26 +197,22 @@ sys::Message_t ServiceCellular::DataReceivedHandler(sys::DataMessage *msgl, sys:
 {
     std::shared_ptr<sys::ResponseMessage> responseMsg;
 
-    switch (static_cast<MessageType>(msgl->messageType))
-    {
+    switch (static_cast<MessageType>(msgl->messageType)) {
     // Incoming notifications from Notification Virtual Channel
     case MessageType::CellularNotification: {
         CellularNotificationMessage *msg = dynamic_cast<CellularNotificationMessage *>(msgl);
-        if (msg != nullptr)
-        {
-            switch (msg->type)
-            {
+        if (msg != nullptr) {
+            switch (msg->type) {
             case CellularNotificationMessage::Type::CallActive: {
-                auto ret = ongoingCall.setActive();
+                auto ret    = ongoingCall.setActive();
                 responseMsg = std::make_shared<CellularResponseMessage>(ret);
                 break;
             }
             case CellularNotificationMessage::Type::IncomingCall: {
                 auto ret = true;
-                if (!ongoingCall.isValid())
-                {
-                    // CellularNotificationMessage::Type::IncomingCall is called periodically during not answered incomming call
-                    // create ongoing call only once
+                if (!ongoingCall.isValid()) {
+                    // CellularNotificationMessage::Type::IncomingCall is called periodically during not answered
+                    // incomming call create ongoing call only once
                     ret = ongoingCall.startCall(msg->data, CallType::CT_INCOMING);
                 }
                 responseMsg = std::make_shared<CellularResponseMessage>(ret);
@@ -224,17 +220,18 @@ sys::Message_t ServiceCellular::DataReceivedHandler(sys::DataMessage *msgl, sys:
             }
             case CellularNotificationMessage::Type::CallAborted: {
                 stopTimer(callStateTimerId);
-                auto ret = ongoingCall.endCall();
+                auto ret    = ongoingCall.endCall();
                 responseMsg = std::make_shared<CellularResponseMessage>(ret);
                 break;
             }
             case CellularNotificationMessage::Type::Ringing: {
-                auto ret = ongoingCall.startCall(msg->data, CallType::CT_OUTGOING);
+                auto ret    = ongoingCall.startCall(msg->data, CallType::CT_OUTGOING);
                 responseMsg = std::make_shared<CellularResponseMessage>(ret);
                 break;
             }
             case CellularNotificationMessage::Type::PowerUpProcedureComplete: {
-                sys::Bus::SendUnicast(std::make_shared<CellularRequestMessage>(MessageType::CellularStartConfProcedure), GetName(), this);
+                sys::Bus::SendUnicast(
+                    std::make_shared<CellularRequestMessage>(MessageType::CellularStartConfProcedure), GetName(), this);
                 state.set(State::ST::ModemConfigurationInProgress);
                 break;
             }
@@ -244,30 +241,25 @@ sys::Message_t ServiceCellular::DataReceivedHandler(sys::DataMessage *msgl, sys:
                 break;
             }
             case CellularNotificationMessage::Type::RawCommand: {
-                auto m = dynamic_cast<cellular::RawCommand *>(msgl);
+                auto m       = dynamic_cast<cellular::RawCommand *>(msgl);
                 auto channel = cmux->GetChannel("Commands");
-                if (!m || !channel)
-                {
+                if (!m || !channel) {
                     LOG_ERROR("RawCommand error: %s %s", m == nullptr ? "" : "bad cmd", !channel ? "no channel" : "");
                     break;
                 }
-                auto respMsg = std::make_shared<cellular::RawCommandResp>(true);
-                auto ret = channel->cmd(m->command.c_str(), m->timeout);
+                auto respMsg      = std::make_shared<cellular::RawCommandResp>(true);
+                auto ret          = channel->cmd(m->command.c_str(), m->timeout);
                 respMsg->response = ret.response;
-                if (respMsg->response.size())
-                {
-                    for (auto const &el : respMsg->response)
-                    {
+                if (respMsg->response.size()) {
+                    for (auto const &el : respMsg->response) {
                         LOG_DEBUG("> %s", el.c_str());
                     }
                 }
                 responseMsg = respMsg;
                 break;
-            }
-            break;
+            } break;
             case CellularNotificationMessage::Type::SIM:
-                if (Store::GSM::get()->tray == Store::GSM::Tray::IN && !init_sim())
-                {
+                if (Store::GSM::get()->tray == Store::GSM::Tray::IN && !init_sim()) {
                     LOG_ERROR("SIM initialization failure!");
                 }
                 break;
@@ -276,51 +268,46 @@ sys::Message_t ServiceCellular::DataReceivedHandler(sys::DataMessage *msgl, sys:
             }
             }
         }
-    }
-    break;
+    } break;
 
     case MessageType::CellularStartPowerUpProcedure: {
         auto powerRet = cmux->PowerUpProcedure();
-        if (powerRet == TS0710::ConfState::Success)
-        {
-            sys::Bus::SendUnicast(std::make_shared<CellularRequestMessage>(MessageType::CellularStartConfProcedure), GetName(), this);
+        if (powerRet == TS0710::ConfState::Success) {
+            sys::Bus::SendUnicast(
+                std::make_shared<CellularRequestMessage>(MessageType::CellularStartConfProcedure), GetName(), this);
         }
-        else if (powerRet == TS0710::ConfState::PowerUp)
-        {
+        else if (powerRet == TS0710::ConfState::PowerUp) {
             state.set(State::ST::PowerUpInProgress);
         }
-        else
-        {
+        else {
             LOG_FATAL("[ServiceCellular] PowerUp procedure failed");
             state.set(State::ST::Failed);
         }
-    }
-    break;
+    } break;
 
     case MessageType::CellularStartConfProcedure: {
         // Start configuration procedure, if it's first run modem will be restarted
         auto confRet = cmux->ConfProcedure();
-        if (confRet == TS0710::ConfState::Success)
-        {
-            sys::Bus::SendUnicast(std::make_shared<CellularRequestMessage>(MessageType::CellularStartAudioConfProcedure), GetName(), this);
+        if (confRet == TS0710::ConfState::Success) {
+            sys::Bus::SendUnicast(
+                std::make_shared<CellularRequestMessage>(MessageType::CellularStartAudioConfProcedure),
+                GetName(),
+                this);
             state.set(State::ST::AudioConfigurationInProgress);
         }
-        else
-        {
+        else {
             LOG_FATAL("[ServiceCellular] Initialization failed, not ready");
             state.set(State::ST::Failed);
         }
-    }
-    break;
+    } break;
 
     case MessageType ::CellularStartAudioConfProcedure: {
         auto audioRet = cmux->AudioConfProcedure();
-        if (audioRet == TS0710::ConfState::Success)
-        {
-            auto cmd = at::factory(at::AT::IPR) + std::to_string(ATPortSpeeds_text[cmux->getStartParams().PortSpeed]) + "\r";
+        if (audioRet == TS0710::ConfState::Success) {
+            auto cmd =
+                at::factory(at::AT::IPR) + std::to_string(ATPortSpeeds_text[cmux->getStartParams().PortSpeed]) + "\r";
             LOG_DEBUG("Setting baudrate %i baud", ATPortSpeeds_text[cmux->getStartParams().PortSpeed]);
-            if (!cmux->getParser()->cmd(cmd))
-            {
+            if (!cmux->getParser()->cmd(cmd)) {
                 LOG_ERROR("Baudrate setup error");
                 state.set(State::ST::Failed);
                 break;
@@ -329,242 +316,215 @@ sys::Message_t ServiceCellular::DataReceivedHandler(sys::DataMessage *msgl, sys:
 
             vTaskDelay(1000);
 
-            if (cmux->StartMultiplexer() == TS0710::ConfState::Success)
-            {
+            if (cmux->StartMultiplexer() == TS0710::ConfState::Success) {
 
                 LOG_DEBUG("[ServiceCellular] Modem is fully operational");
 
                 DLC_channel *notificationsChannel = cmux->GetChannel("Notifications"); // open channel - notifications
-                if (notificationsChannel)
-                {
+                if (notificationsChannel) {
                     LOG_DEBUG("Setting up notifications callback");
                     notificationsChannel->setCallback(notificationCallback);
                 }
 
                 state.set(State::ST::ModemOn);
-                if (select_sim())
-                {
+                if (select_sim()) {
                     bsp::cellular::sim::sim_sel();
                     bsp::cellular::sim::hotswap_trigger();
                 }
                 auto msg = std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::ModemOn);
                 sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceCellularNotifications, this);
             }
-            else
-            {
+            else {
                 LOG_DEBUG("[ServiceCellular] Modem FAILED");
                 state.set(State::ST::Failed);
             }
 
             state.set(State::ST::ModemOn);
             // Propagate "ServiceReady" notification into system
-            sys::Bus::SendMulticast(std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::ServiceReady),
-                                    sys::BusChannels::ServiceCellularNotifications, this);
+            sys::Bus::SendMulticast(
+                std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::ServiceReady),
+                sys::BusChannels::ServiceCellularNotifications,
+                this);
         }
-        else if (audioRet == TS0710::ConfState::Failure)
-        {
-            sys::Bus::SendUnicast(std::make_shared<CellularRequestMessage>(MessageType::CellularStartAudioConfProcedure), GetName(), this);
+        else if (audioRet == TS0710::ConfState::Failure) {
+            sys::Bus::SendUnicast(
+                std::make_shared<CellularRequestMessage>(MessageType::CellularStartAudioConfProcedure),
+                GetName(),
+                this);
         }
-        else
-        {
+        else {
             // Reset procedure started, do nothing here
             state.set(State::ST::PowerUpInProgress);
         }
-    }
-    break;
+    } break;
 
     case MessageType::CellularListCurrentCalls: {
         constexpr size_t numberOfExpectedTokens = 3;
-        auto ret = cmux->GetChannel("Commands")->cmd(at::AT::CLCC);
-        if (ret && ret.response.size() == numberOfExpectedTokens)
-        {
+        auto ret                                = cmux->GetChannel("Commands")->cmd(at::AT::CLCC);
+        if (ret && ret.response.size() == numberOfExpectedTokens) {
             // TODO: alek: add case when more status calls is returned
             // TODO: alek: add cellular call validation and check it with modemcall
 
             // TODO: alek - just handle parts of response properly
             // if CellularListCurrentCalls is recieved after the call is aborted it will return 2 tokens instead of 3
             // this should be acceptable and hence warning instead of error is logged in such case
-            bool retVal = true;
+            bool retVal    = true;
             auto callEntry = ret.response[1];
 
-            try
-            {
+            try {
                 ModemCall::ModemCall call(callEntry);
                 LOG_DEBUG("%s", utils::to_string(call).c_str());
                 // If call changed to "Active" state stop callStateTimer(used for polling for call state)
-                if (call.state == ModemCall::CallState::Active)
-                {
-                    auto msg = std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::CallActive);
+                if (call.state == ModemCall::CallState::Active) {
+                    auto msg =
+                        std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::CallActive);
                     sys::Bus::SendMulticast(msg, sys::BusChannels::ServiceCellularNotifications, this);
                     stopTimer(callStateTimerId);
                 }
             }
-            catch (const std::exception &e)
-            {
+            catch (const std::exception &e) {
                 LOG_ERROR("exception \"%s\" was thrown", e.what());
                 assert(0);
                 retVal = false;
             }
             responseMsg = std::make_shared<CellularResponseMessage>(retVal);
         }
-        else
-        {
+        else {
             responseMsg = std::make_shared<CellularResponseMessage>(false);
         }
-    }
-    break;
+    } break;
 
     case MessageType::CellularHangupCall: {
         auto channel = cmux->GetChannel("Commands");
         LOG_INFO("CellularHangupCall");
-        if (channel)
-        {
-            if (channel->cmd(at::AT::ATH))
-            {
+        if (channel) {
+            if (channel->cmd(at::AT::ATH)) {
                 stopTimer(callStateTimerId);
-                if (!ongoingCall.endCall(CellularCall::Forced::True))
-                {
+                if (!ongoingCall.endCall(CellularCall::Forced::True)) {
                     LOG_ERROR("Failed to end ongoing call");
                 }
                 responseMsg = std::make_shared<CellularResponseMessage>(true, msgl->messageType);
             }
-            else
-            {
+            else {
                 LOG_ERROR("Call not aborted");
                 responseMsg = std::make_shared<CellularResponseMessage>(false, msgl->messageType);
             }
-           break;
+            break;
         }
         responseMsg = std::make_shared<CellularResponseMessage>(false, msgl->messageType);
-    }
-    break;
+    } break;
 
     case MessageType::CellularAnswerIncomingCall: {
         auto channel = cmux->GetChannel("Commands");
-        auto ret = false;
-        if (channel)
-        {
-            // TODO alek: check if your request isn't for 5 sec when you wait in command for 90000, it's exclusivelly set to 5000ms in command requesting...
+        auto ret     = false;
+        if (channel) {
+            // TODO alek: check if your request isn't for 5 sec when you wait in command for 90000, it's exclusivelly
+            // set to 5000ms in command requesting...
             auto response = channel->cmd(at::AT::ATA);
-            if (response)
-            {
+            if (response) {
                 // Propagate "CallActive" notification into system
-                sys::Bus::SendMulticast(std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::CallActive),
-                                        sys::BusChannels::ServiceCellularNotifications, this);
+                sys::Bus::SendMulticast(
+                    std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::CallActive),
+                    sys::BusChannels::ServiceCellularNotifications,
+                    this);
                 ret = true;
             }
         }
         responseMsg = std::make_shared<CellularResponseMessage>(ret);
-    }
-    break;
+    } break;
 
-	case MessageType::CellularDialNumber: {
+    case MessageType::CellularDialNumber: {
         CellularRequestMessage *msg = reinterpret_cast<CellularRequestMessage *>(msgl);
-        auto channel = cmux->GetChannel("Commands");
-		if (channel) {
+        auto channel                = cmux->GetChannel("Commands");
+        if (channel) {
             auto ret = channel->cmd(at::factory(at::AT::ATD) + msg->data + ";\r");
-            if (ret)
-            {
+            if (ret) {
                 responseMsg = std::make_shared<CellularResponseMessage>(true);
                 // activate call state timer
                 ReloadTimer(callStateTimerId);
                 // Propagate "Ringing" notification into system
-                sys::Bus::SendMulticast(std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::Ringing, msg->data),
-                                        sys::BusChannels::ServiceCellularNotifications, this);
+                sys::Bus::SendMulticast(std::make_shared<CellularNotificationMessage>(
+                                            CellularNotificationMessage::Type::Ringing, msg->data),
+                                        sys::BusChannels::ServiceCellularNotifications,
+                                        this);
                 break;
             }
         }
         responseMsg = std::make_shared<CellularResponseMessage>(false);
-	}
-		break;
-        case MessageType::DBServiceNotification: {
-            DBNotificationMessage *msg = dynamic_cast<DBNotificationMessage *>(msgl);
-            if (msg == nullptr)
-            {
-                responseMsg = std::make_shared<CellularResponseMessage>(false);
-                break;
-            }
-            LOG_DEBUG("Received multicast");
-            if ((msg->baseType == DB::BaseType::SmsDB) &&
-                ((msg->notificationType == DB::NotificationType::Updated) || (msg->notificationType == DB::NotificationType::Added)))
-            {
-                sendSMS();
-                return std::make_shared<sys::ResponseMessage>();
-            }
+    } break;
+    case MessageType::DBServiceNotification: {
+        DBNotificationMessage *msg = dynamic_cast<DBNotificationMessage *>(msgl);
+        if (msg == nullptr) {
+            responseMsg = std::make_shared<CellularResponseMessage>(false);
+            break;
+        }
+        LOG_DEBUG("Received multicast");
+        if ((msg->baseType == DB::BaseType::SmsDB) && ((msg->notificationType == DB::NotificationType::Updated) ||
+                                                       (msg->notificationType == DB::NotificationType::Added))) {
+            sendSMS();
+            return std::make_shared<sys::ResponseMessage>();
+        }
         return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Failure);
         break;
-	}
+    }
     case MessageType::CellularGetIMSI: {
 
         std::string temp;
-        if (getIMSI(temp))
-        {
+        if (getIMSI(temp)) {
             responseMsg = std::make_shared<CellularResponseMessage>(true, temp);
         }
-        else
-        {
+        else {
             responseMsg = std::make_shared<CellularResponseMessage>(false);
         }
         break;
     }
     case MessageType::CellularGetOwnNumber: {
         std::string temp;
-        if (getOwnNumber(temp))
-        {
+        if (getOwnNumber(temp)) {
             responseMsg = std::make_shared<CellularResponseMessage>(true, temp);
         }
-        else
-        {
+        else {
             responseMsg = std::make_shared<CellularResponseMessage>(false);
         }
-    }
-    break;
+    } break;
     case MessageType::CellularGetNetworkInfo: {
         LOG_INFO("CellularGetNetworkInfo handled");
         responseMsg = std::make_shared<CellularResponseMessage>(true);
 
-        auto msg = std::make_shared<cellular::RawCommandRespAsync>(MessageType::CellularNetworkInfoResult);
+        auto msg  = std::make_shared<cellular::RawCommandRespAsync>(MessageType::CellularNetworkInfoResult);
         msg->data = getNetworkInfo();
         sys::Bus::SendUnicast(msg, msgl->sender, this);
-    }
-    break;
+    } break;
     case MessageType::CellularStartOperatorsScan: {
         LOG_INFO("CellularStartOperatorsScan handled");
         cellular::RawCommandResp response = (true);
 
-        auto msg = std::make_shared<cellular::RawCommandRespAsync>(MessageType::CellularOperatorsScanResult);
+        auto msg  = std::make_shared<cellular::RawCommandRespAsync>(MessageType::CellularOperatorsScanResult);
         msg->data = scanOperators();
         sys::Bus::SendUnicast(msg, msgl->sender, this);
-    }
-    break;
+    } break;
     case MessageType::CellularSelectAntenna: {
         uint8_t value = 0;
-        auto msg = dynamic_cast<CellularRequestMessage *>(msgl);
-        if (msg != nullptr)
-        {
-            try
-            {
+        auto msg      = dynamic_cast<CellularRequestMessage *>(msgl);
+        if (msg != nullptr) {
+            try {
                 value = std::stoi(msg->data);
             }
-            catch (std::exception &e)
-            {
+            catch (std::exception &e) {
                 LOG_INFO("Service cellular CellularSelectAntenna exception occured: %s", e.what());
             }
             cmux->SelectAntenna(value);
             responseMsg = std::make_shared<CellularResponseMessage>(true);
         }
-        else
-        {
+        else {
             responseMsg = std::make_shared<CellularResponseMessage>(false);
         }
-    }
-    break;
+    } break;
     default:
         break;
     }
 
-    if (responseMsg == nullptr)
-    {
+    if (responseMsg == nullptr) {
         LOG_DEBUG("message not handled: %d, %d", msgl->type, msgl->messageType);
         responseMsg = std::make_shared<CellularResponseMessage>(false);
     }
@@ -576,7 +536,8 @@ namespace
 {
     bool isAbortCallNotification(const std::string &str)
     {
-        return ((str.find(at::Chanel::NO_CARRIER) != std::string::npos) || (str.find(at::Chanel::BUSY) != std::string::npos) ||
+        return ((str.find(at::Chanel::NO_CARRIER) != std::string::npos) ||
+                (str.find(at::Chanel::BUSY) != std::string::npos) ||
                 (str.find(at::Chanel::NO_ANSWER) != std::string::npos));
     }
 } // namespace
@@ -590,23 +551,18 @@ std::shared_ptr<CellularNotificationMessage> ServiceCellular::identifyNotificati
         LOG_DEBUG("Notification:: %s", logStr.c_str());
     }
 
-    if (auto ret = str.find("+CPIN: ") != std::string::npos)
-    {
+    if (auto ret = str.find("+CPIN: ") != std::string::npos) {
         /// TODO handle different sim statuses - i.e. no sim, sim error, sim puk, sim pin etc.
-        if (str.find("NOT READY", ret) == std::string::npos)
-        {
-            if (Store::GSM::get()->selected == Store::GSM::SIM::SIM1)
-            {
+        if (str.find("NOT READY", ret) == std::string::npos) {
+            if (Store::GSM::get()->selected == Store::GSM::SIM::SIM1) {
                 Store::GSM::get()->sim = Store::GSM::SIM::SIM1;
             }
-            else
-            {
+            else {
                 Store::GSM::get()->sim = Store::GSM::SIM::SIM2;
             }
             LOG_DEBUG("SIM OK!");
         }
-        else
-        {
+        else {
             LOG_ERROR("SIM ERROR");
             Store::GSM::get()->sim = Store::GSM::SIM::SIM_FAIL;
         }
@@ -619,16 +575,15 @@ std::shared_ptr<CellularNotificationMessage> ServiceCellular::identifyNotificati
     if (auto ret = str.find("+CLIP: ") != std::string::npos) {
         LOG_TRACE("incoming call...");
 
-        auto beg = str.find("\"",ret);
-        auto end = str.find("\"",ret + beg+1);
+        auto beg     = str.find("\"", ret);
+        auto end     = str.find("\"", ret + beg + 1);
         auto message = str.substr(beg + 1, end - beg - 1);
 
         return std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::IncomingCall, message);
     }
 
     // Call aborted/failed
-    if (isAbortCallNotification(str))
-    {
+    if (isAbortCallNotification(str)) {
         LOG_TRACE("call aborted");
         return std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::CallAborted);
     }
@@ -638,27 +593,24 @@ std::shared_ptr<CellularNotificationMessage> ServiceCellular::identifyNotificati
         LOG_TRACE("received new SMS notification");
         // find message number
         auto tokens = utils::split(str, ',');
-        if (tokens.size() == 2)
-        {
-            return std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::NewIncomingSMS, tokens[1]);
+        if (tokens.size() == 2) {
+            return std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::NewIncomingSMS,
+                                                                 tokens[1]);
         }
     }
 
     // Received signal strength change
     auto qind = at::urc::QIND(str);
-    if (qind.is() && qind.is_csq())
-    {
-        if (!qind.validate(at::urc::QIND::RSSI))
-        {
+    if (qind.is() && qind.is_csq()) {
+        if (!qind.validate(at::urc::QIND::RSSI)) {
             LOG_INFO("Invalid csq - ignore");
         }
-        else
-        {
+        else {
             SignalStrength signalStrength(std::stoi(qind.tokens[at::urc::QIND::RSSI]));
-            if (signalStrength.isValid())
-            {
+            if (signalStrength.isValid()) {
                 Store::GSM::get()->setSignalStrength(signalStrength.data);
-                return std::make_shared<CellularNotificationMessage>(CellularNotificationMessage::Type::SignalStrengthUpdate);
+                return std::make_shared<CellularNotificationMessage>(
+                    CellularNotificationMessage::Type::SignalStrengthUpdate);
             }
         }
     }
@@ -669,191 +621,175 @@ std::shared_ptr<CellularNotificationMessage> ServiceCellular::identifyNotificati
 
 bool ServiceCellular::sendSMS(void)
 {
-	auto record = DBServiceAPI::SMSGetLastRecord(this);
+    auto record = DBServiceAPI::SMSGetLastRecord(this);
 
-	// skip if it's not sms to send
-	if(record.type != SMSType::QUEUED)
-	{
-		return false;
-	}
+    // skip if it's not sms to send
+    if (record.type != SMSType::QUEUED) {
+        return false;
+    }
 
-	LOG_INFO("Trying to send SMS");
+    LOG_INFO("Trying to send SMS");
 
-	uint32_t textLen = record.body.length();
+    uint32_t textLen = record.body.length();
 
-	const uint32_t singleMessageLen = 30;
-	bool result = false;
+    const uint32_t singleMessageLen = 30;
+    bool result                     = false;
 
-	//if text fit in single message send
-	if (textLen < singleMessageLen) {
+    // if text fit in single message send
+    if (textLen < singleMessageLen) {
 
         if (cmux->CheckATCommandPrompt(
                 cmux->GetChannel("Commands")
-                    ->SendCommandPrompt((std::string(at::factory(at::AT::CMGS)) + UCS2(record.number).modemStr() + "\"\r").c_str(), 1, 1000)))
-        {
+                    ->SendCommandPrompt(
+                        (std::string(at::factory(at::AT::CMGS)) + UCS2(record.number).modemStr() + "\"\r").c_str(),
+                        1,
+                        1000))) {
 
-            if (cmux->GetChannel("Commands")->cmd((UCS2(record.body).modemStr() + "\032").c_str()))
-            {
+            if (cmux->GetChannel("Commands")->cmd((UCS2(record.body).modemStr() + "\032").c_str())) {
                 result = true;
             }
-            else
-            {
-            	LOG_INFO("SMS sending failed.");
+            else {
+                LOG_INFO("SMS sending failed.");
             }
         }
     }
-	//split text, and send concatenated messages
-	else {
-		const uint32_t maxConcatenatedCount = 7;
-		uint32_t messagePartsCount = textLen / singleMessageLen;
-		if( (textLen % singleMessageLen) != 0 )
-		{
-			messagePartsCount++;
-		}
+    // split text, and send concatenated messages
+    else {
+        const uint32_t maxConcatenatedCount = 7;
+        uint32_t messagePartsCount          = textLen / singleMessageLen;
+        if ((textLen % singleMessageLen) != 0) {
+            messagePartsCount++;
+        }
 
-		if(messagePartsCount > maxConcatenatedCount)
-		{
-			LOG_ERROR("Message to long");
-			return false;
-		}
+        if (messagePartsCount > maxConcatenatedCount) {
+            LOG_ERROR("Message to long");
+            return false;
+        }
 
-		for(uint32_t i = 0; i < messagePartsCount; i++)
-		{
+        for (uint32_t i = 0; i < messagePartsCount; i++) {
 
-			uint32_t partLength = singleMessageLen;
-			if (i * singleMessageLen + singleMessageLen > record.body.length()) {
-				partLength = record.body.length() - i * singleMessageLen;
-			}
-			UTF8 messagePart = record.body.substr(i * singleMessageLen,
-					partLength);
+            uint32_t partLength = singleMessageLen;
+            if (i * singleMessageLen + singleMessageLen > record.body.length()) {
+                partLength = record.body.length() - i * singleMessageLen;
+            }
+            UTF8 messagePart = record.body.substr(i * singleMessageLen, partLength);
 
-            std::string command(at::factory(at::AT::QCMGS) + UCS2(record.number).modemStr() + "\",120," + std::to_string(i + 1) + "," +
-                                std::to_string(messagePartsCount) + "\r");
+            std::string command(at::factory(at::AT::QCMGS) + UCS2(record.number).modemStr() + "\",120," +
+                                std::to_string(i + 1) + "," + std::to_string(messagePartsCount) + "\r");
 
-            if (cmux->CheckATCommandPrompt(cmux->GetChannel("Commands")->SendCommandPrompt(command.c_str(), 1, 5000)))
-            {
-                //prompt sign received, send data ended by "Ctrl+Z"
-                if (cmux->GetChannel("Commands")->cmd((UCS2(messagePart).modemStr() + "\032").c_str(), 2, 2000))
-                {
+            if (cmux->CheckATCommandPrompt(cmux->GetChannel("Commands")->SendCommandPrompt(command.c_str(), 1, 5000))) {
+                // prompt sign received, send data ended by "Ctrl+Z"
+                if (cmux->GetChannel("Commands")->cmd((UCS2(messagePart).modemStr() + "\032").c_str(), 2, 2000)) {
                     result = true;
                 }
-                else
-	            {
-	            	result = false;
-	            	LOG_INFO("SMS sending failed.");
-	            }
+                else {
+                    result = false;
+                    LOG_INFO("SMS sending failed.");
+                }
             }
         }
-	}
-    if (result)
-    {
-    	LOG_INFO("SMS sended.");
+    }
+    if (result) {
+        LOG_INFO("SMS sended.");
         record.type = SMSType::OUTBOX;
         DBServiceAPI::SMSUpdate(this, record);
     }
     return result;
 }
 
-bool ServiceCellular::receiveSMS(std::string messageNumber) {
+bool ServiceCellular::receiveSMS(std::string messageNumber)
+{
 
     auto cmd = at::factory(at::AT::QCMGR);
     auto ret = cmux->GetChannel("Commands")->cmd(cmd + messageNumber + "\r", cmd.timeout);
 
     bool messageParsed = false;
 
-	std::string messageRawBody;
-	UTF8 receivedNumber;
-    if (ret)
-    {
-        for (uint32_t i = 0; i < ret.response.size(); i++)
-        {
-            if (ret.response[i].find("QCMGR") != std::string::npos)
-            {
+    std::string messageRawBody;
+    UTF8 receivedNumber;
+    if (ret) {
+        for (uint32_t i = 0; i < ret.response.size(); i++) {
+            if (ret.response[i].find("QCMGR") != std::string::npos) {
 
                 std::istringstream ss(ret.response[i]);
                 std::string token;
-				std::vector<std::string> tokens;
-				while (std::getline(ss, token, ',')) {
-					tokens.push_back(token);
-				}
+                std::vector<std::string> tokens;
+                while (std::getline(ss, token, ',')) {
+                    tokens.push_back(token);
+                }
                 tokens[1].erase(std::remove(tokens[1].begin(), tokens[1].end(), '\"'), tokens[1].end());
                 /*
-				 * tokens:
-				 * [0] - +QCMGR
-				 * [1] - sender number
-				 * [2] - none
-				 * [3] - date YY/MM/DD
-				 * [4] - hour HH/MM/SS/timezone
-				 * concatenaded messages
-				 * [5] - unique concatenated message id
-				 * [6] - current message number
-				 * [7] - total messages count
-				 *
-				 */
-				//parse sender number
-				receivedNumber = UCS2(tokens[1]).toUTF8();
+                 * tokens:
+                 * [0] - +QCMGR
+                 * [1] - sender number
+                 * [2] - none
+                 * [3] - date YY/MM/DD
+                 * [4] - hour HH/MM/SS/timezone
+                 * concatenaded messages
+                 * [5] - unique concatenated message id
+                 * [6] - current message number
+                 * [7] - total messages count
+                 *
+                 */
+                // parse sender number
+                receivedNumber = UCS2(tokens[1]).toUTF8();
 
-				//parse date
-				tokens[3].erase(std::remove(tokens[3].begin(), tokens[3].end(), '\"'), tokens[3].end());
+                // parse date
+                tokens[3].erase(std::remove(tokens[3].begin(), tokens[3].end(), '\"'), tokens[3].end());
 
                 utils::time::Timestamp time;
                 time.set_time(tokens[3] + " " + tokens[4], "%y/%m/%d %H:%M:%S");
                 auto messageDate = time.getTime();
 
-                //if its single message process
-				if (tokens.size() == 5) {
+                // if its single message process
+                if (tokens.size() == 5) {
 
                     messageRawBody = ret.response[i + 1];
-                    messageParsed = true;
-				}
-				//if its concatenated message wait for last message
-				else if (tokens.size() == 8) {
+                    messageParsed  = true;
+                }
+                // if its concatenated message wait for last message
+                else if (tokens.size() == 8) {
 
-                    uint32_t last = 0;
+                    uint32_t last    = 0;
                     uint32_t current = 0;
-                    try
-                    {
-                        last = std::stoi(tokens[7]);
+                    try {
+                        last    = std::stoi(tokens[7]);
                         current = std::stoi(tokens[6]);
                     }
-                    catch (const std::exception &e)
-                    {
+                    catch (const std::exception &e) {
                         LOG_ERROR("ServiceCellular::receiveSMS error %s", e.what());
                         return false;
                     }
                     if (current == last) {
                         messageParts.push_back(ret.response[i + 1]);
 
-                        for (uint32_t j = 0; j < messageParts.size(); j++)
-                        {
+                        for (uint32_t j = 0; j < messageParts.size(); j++) {
                             messageRawBody += messageParts[j];
                         }
                         messageParts.clear();
-						messageParsed = true;
+                        messageParsed = true;
                     }
-                    else
-                    {
+                    else {
                         messageParts.push_back(ret.response[i + 1]);
                     }
                 }
-				if (messageParsed)
-				{
-					messageParsed = false;
+                if (messageParsed) {
+                    messageParsed = false;
 
-					UTF8 decodedMessage = UCS2(messageRawBody).toUTF8();
+                    UTF8 decodedMessage = UCS2(messageRawBody).toUTF8();
 
-					SMSRecord record;
-					record.body = decodedMessage;
-					record.number = receivedNumber;
-					record.type = SMSType::INBOX;
-					record.date = messageDate;
+                    SMSRecord record;
+                    record.body   = decodedMessage;
+                    record.number = receivedNumber;
+                    record.type   = SMSType::INBOX;
+                    record.date   = messageDate;
 
-					DBServiceAPI::SMSAdd(this, record);
-				}
+                    DBServiceAPI::SMSAdd(this, record);
+                }
             }
         }
     }
-    //delete message from modem memory
+    // delete message from modem memory
     cmux->GetChannel("Commands")->cmd(at::factory(at::AT::CMGD) + messageNumber);
     return true;
 }
@@ -862,19 +798,15 @@ bool ServiceCellular::getOwnNumber(std::string &destination)
 {
     auto ret = cmux->GetChannel("Commands")->cmd(at::AT::CNUM);
 
-    if (ret)
-    {
+    if (ret) {
         auto begin = ret.response[0].find(',');
-        auto end = ret.response[0].rfind(',');
-        if (begin != std::string::npos && end != std::string::npos)
-        {
+        auto end   = ret.response[0].rfind(',');
+        if (begin != std::string::npos && end != std::string::npos) {
             std::string number;
-            try
-            {
+            try {
                 number = ret.response[0].substr(begin, end - begin);
             }
-            catch (std::exception &e)
-            {
+            catch (std::exception &e) {
                 LOG_ERROR("ServiceCellular::getOwnNumber exception: %s", e.what());
                 return false;
             }
@@ -893,20 +825,15 @@ bool ServiceCellular::getIMSI(std::string &destination, bool fullNumber)
 {
     auto ret = cmux->GetChannel("Commands")->cmd(at::AT::CIMI);
 
-    if (ret)
-    {
-        if (fullNumber)
-        {
+    if (ret) {
+        if (fullNumber) {
             destination = ret.response[0];
         }
-        else
-        {
-            try
-            {
+        else {
+            try {
                 destination = ret.response[0].substr(0, 3);
             }
-            catch (std::exception &e)
-            {
+            catch (std::exception &e) {
                 LOG_ERROR("ServiceCellular::getIMSI exception: %s", e.what());
                 return false;
             }
@@ -920,33 +847,27 @@ std::vector<std::string> ServiceCellular::getNetworkInfo(void)
 {
     std::vector<std::string> data;
     auto channel = cmux->GetChannel("Commands");
-    if (channel)
-    {
+    if (channel) {
         auto resp = channel->cmd(at::AT::CSQ);
-        if (resp.code == at::Result::Code::OK)
-        {
+        if (resp.code == at::Result::Code::OK) {
             // push back to response message
-            std::string ret = resp.response[0];
+            std::string ret     = resp.response[0];
             std::string toErase = "+CSQ: ";
-            auto pos = ret.find(toErase);
-            if (pos != std::string::npos)
-            {
+            auto pos            = ret.find(toErase);
+            if (pos != std::string::npos) {
                 ret.erase(pos, toErase.length());
                 data.push_back(ret);
             }
-            else
-            {
+            else {
                 data.push_back("");
             }
         }
-        else
-        {
+        else {
             data.push_back("");
         }
 
         resp = channel->cmd(at::AT::CREG);
-        if (resp.code == at::Result::Code::OK)
-        {
+        if (resp.code == at::Result::Code::OK) {
             std::map<uint32_t, std::string> cregCodes;
             cregCodes.insert(std::pair<uint32_t, std::string>(0, "Not registred"));
             cregCodes.insert(std::pair<uint32_t, std::string>(1, "Registered, home network"));
@@ -956,49 +877,41 @@ std::vector<std::string> ServiceCellular::getNetworkInfo(void)
             cregCodes.insert(std::pair<uint32_t, std::string>(5, "Registerd, roaming"));
 
             std::string rawResponse = resp.response[0];
-            auto pos = rawResponse.find(',');
+            auto pos                = rawResponse.find(',');
 
             uint32_t cregValue;
-            try
-            {
+            try {
                 cregValue = std::stoi(rawResponse.substr(pos + 1, 1));
             }
-            catch (const std::exception &e)
-            {
+            catch (const std::exception &e) {
                 LOG_ERROR("ServiceCellular::GetNetworkInfo exception %s", e.what());
                 cregValue = UINT32_MAX;
             }
             // push back to response message
             auto commandCode = cregCodes.find(cregValue);
-            if (commandCode != cregCodes.end())
-            {
+            if (commandCode != cregCodes.end()) {
                 data.push_back(commandCode->second);
             }
-            else
-            {
+            else {
                 data.push_back("");
             }
         }
-        else
-        {
+        else {
             data.push_back("");
         }
 
         resp = channel->cmd(at::AT::QNWINFO);
-        if (resp.code == at::Result::Code::OK)
-        {
+        if (resp.code == at::Result::Code::OK) {
             auto rawResponse = resp.response[0];
             std::string toErase("+QNWINFO: ");
             auto pos = rawResponse.find(toErase);
-            if (pos != std::string::npos)
-            {
+            if (pos != std::string::npos) {
                 rawResponse.erase(pos, toErase.length());
             }
             rawResponse.erase(std::remove(rawResponse.begin(), rawResponse.end(), '\"'), rawResponse.end());
             data.push_back(rawResponse);
         }
-        else
-        {
+        else {
             data.push_back("");
         }
     }
@@ -1008,31 +921,27 @@ std::vector<std::string> ServiceCellular::scanOperators(void)
 {
     auto channel = cmux->GetChannel("Commands");
     std::vector<std::string> result;
-    if (channel)
-    {
+    if (channel) {
         auto resp = channel->cmd("AT+COPS=?\r", 180000, 2);
-        if (resp.code == at::Result::Code::OK)
-        {
+        if (resp.code == at::Result::Code::OK) {
             std::string rawResponse = resp.response[0];
             std::string toErase("+COPS: ");
             auto pos = rawResponse.find(toErase);
-            if (pos != std::string::npos)
-            {
+            if (pos != std::string::npos) {
                 rawResponse.erase(pos, toErase.length());
             }
             std::string delimiter("),(");
 
-            auto end = rawResponse.find(delimiter);
+            auto end   = rawResponse.find(delimiter);
             auto begin = 0;
-            while (end != std::string::npos)
-            {
+            while (end != std::string::npos) {
                 auto operatorInfo = rawResponse.substr(begin, end - begin);
                 operatorInfo.erase(std::remove(operatorInfo.begin(), operatorInfo.end(), '('), operatorInfo.end());
                 operatorInfo.erase(std::remove(operatorInfo.begin(), operatorInfo.end(), ')'), operatorInfo.end());
                 operatorInfo.erase(std::remove(operatorInfo.begin(), operatorInfo.end(), ','), operatorInfo.end());
                 result.push_back(operatorInfo);
                 begin = end;
-                end = rawResponse.find(delimiter, end + 1);
+                end   = rawResponse.find(delimiter, end + 1);
             }
         }
     }
@@ -1042,8 +951,7 @@ std::vector<std::string> ServiceCellular::scanOperators(void)
 bool ServiceCellular::select_sim()
 {
     auto settings = DBServiceAPI::SettingsGet(this);
-    switch (settings.activeSIM)
-    {
+    switch (settings.activeSIM) {
     case SettingsRecord::ActiveSim::NONE:
         Store::GSM::get()->selected = Store::GSM::SIM::NONE;
         return false;
@@ -1060,17 +968,16 @@ bool ServiceCellular::select_sim()
 bool ServiceCellular::init_sim()
 {
     auto channel = cmux->GetChannel("Commands");
-    if (!channel)
-    {
+    if (!channel) {
         LOG_ERROR("Cant configure sim! no Commands channel!");
         return false;
     }
     bool success = true;
-    success = channel->cmd(at::AT::CALLER_NUMBER_PRESENTATION) && success;
-    success = channel->cmd(at::AT::SMS_TEXT_FORMAT) && success;
-    success = channel->cmd(at::AT::SMS_UCSC2) && success;
-    success = channel->cmd(at::AT::SMS_STORAGE) && success;
-    success = channel->cmd(at::AT::CRC_ON) && success;
+    success      = channel->cmd(at::AT::CALLER_NUMBER_PRESENTATION) && success;
+    success      = channel->cmd(at::AT::SMS_TEXT_FORMAT) && success;
+    success      = channel->cmd(at::AT::SMS_UCSC2) && success;
+    success      = channel->cmd(at::AT::SMS_STORAGE) && success;
+    success      = channel->cmd(at::AT::CRC_ON) && success;
     state.set(State::ST::FullyFunctional);
     return success;
 }
diff --git a/module-services/service-cellular/ServiceCellular.hpp b/module-services/service-cellular/ServiceCellular.hpp
index 7ef6b81ad..2149b9dbe 100644
--- a/module-services/service-cellular/ServiceCellular.hpp
+++ b/module-services/service-cellular/ServiceCellular.hpp
@@ -2,13 +2,11 @@
  *  @file ServiceCellular.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 03.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_SERVICECELLULAR_HPP
 #define PUREPHONE_SERVICECELLULAR_HPP
 
@@ -29,12 +27,13 @@ namespace cellular
         enum class ST
         {
             Idle,              /// start mode of cellular - does nothing
-            PowerUpInProgress, /// set on service start - hot/cold start to CMUX (cold start && cmux reset - next state bases on URC without much thinking
+            PowerUpInProgress, /// set on service start - hot/cold start to CMUX (cold start && cmux reset - next state
+                               /// bases on URC without much thinking
             ModemConfigurationInProgress, /// modem basic, non sim related configuration
             AudioConfigurationInProgress, /// audio configuration for modem (could be in ModemConfiguration)
-            ModemOn,                      /// modem ready - indicates that modem is fully configured, ( **SIM is not yet configured** )
-            SimInitInProgress,            /// initialize SIM - triggers sim ON in, ( **changed on URC** )
-            FullyFunctional,              /// modem is on, sim is initialized
+            ModemOn, /// modem ready - indicates that modem is fully configured, ( **SIM is not yet configured** )
+            SimInitInProgress, /// initialize SIM - triggers sim ON in, ( **changed on URC** )
+            FullyFunctional,   /// modem is on, sim is initialized
             Failed
         };
 
@@ -48,15 +47,15 @@ namespace cellular
     };
 } // namespace cellular
 
-class ServiceCellular : public sys::Service {
-
-public:
+class ServiceCellular : public sys::Service
+{
 
+  public:
     ServiceCellular();
 
     ~ServiceCellular();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl,sys::ResponseMessage* resp=nullptr) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp = nullptr) override;
 
     // Invoked when timer ticked
     void TickHandler(uint32_t id) override;
@@ -66,10 +65,9 @@ public:
     sys::ReturnCodes DeinitHandler() override;
     sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
 
-
     static const char *serviceName;
 
-    bool sendSMS(UTF8& number, UTF8& text);
+    bool sendSMS(UTF8 &number, UTF8 &text);
     bool sendSMS(void);
     bool receiveSMS(std::string messageNumber);
     /**
@@ -80,7 +78,8 @@ public:
     bool getOwnNumber(std::string &destination);
     /**
      * @brief Its getting IMSI from selected SIM card.
-     * @param fullNumber Its returning full IMSI number when fullNumber is true, otherwise its returning only country identification number
+     * @param fullNumber Its returning full IMSI number when fullNumber is true, otherwise its returning only country
+     * identification number
      * @param destination Reference to destination string.
      * @return true when succeed, false when fails
      */
@@ -89,8 +88,7 @@ public:
     std::vector<std::string> scanOperators(void);
 
   private:
-
-    //std::unique_ptr<MuxDaemon> muxdaemon;
+    // std::unique_ptr<MuxDaemon> muxdaemon;
     TS0710 *cmux = new TS0710(PortSpeed_e::PS460800, this);
     // used for polling for call state
     uint32_t callStateTimerId = 0;
@@ -113,4 +111,4 @@ public:
     bool init_sim();
 };
 
-#endif //PUREPHONE_SERVICECELLULAR_HPP
+#endif // PUREPHONE_SERVICECELLULAR_HPP
diff --git a/module-services/service-cellular/SignalStrength.cpp b/module-services/service-cellular/SignalStrength.cpp
index f81244541..83ff4ab8f 100644
--- a/module-services/service-cellular/SignalStrength.cpp
+++ b/module-services/service-cellular/SignalStrength.cpp
@@ -9,17 +9,14 @@ SignalStrength::SignalStrength(int rssi)
 int SignalStrength::rssiTodBm(const int rssi)
 {
     int ret = rssidBm_invalid;
-    if (rssi == rssi_invalid || rssi == rssi_tdscmda_invalid)
-    {
+    if (rssi == rssi_invalid || rssi == rssi_tdscmda_invalid) {
         return ret;
     }
 
-    if (rssi >= rssi_low && rssi <= rssi_max)
-    {
+    if (rssi >= rssi_low && rssi <= rssi_max) {
         ret = rssi_low_dBm - rssi * rssi_step;
     }
-    else if (rssi >= rssi_tdscmda_low && rssi <= rssi_tdscmda_max)
-    {
+    else if (rssi >= rssi_tdscmda_low && rssi <= rssi_tdscmda_max) {
         LOG_WARN("TD-SCDMA rssi range - signal strength indicator not fully supported");
         ret = rssi_tdscmda_low_dBm - rssi * rssi_tdscmda_step;
     }
@@ -31,39 +28,32 @@ Store::RssiBar SignalStrength::rssidBmToBar(const int rssidBm)
 {
     using namespace Store;
 
-    if (rssidBm == rssidBm_invalid)
-    {
+    if (rssidBm == rssidBm_invalid) {
         return RssiBar::zero;
     }
-    else if (rssidBm >= rssidBm_five_bar_margin)
-    {
+    else if (rssidBm >= rssidBm_five_bar_margin) {
         return RssiBar::five;
     }
-    else if (rssidBm >= rssidBm_four_bar_margin)
-    {
+    else if (rssidBm >= rssidBm_four_bar_margin) {
         return RssiBar::four;
     }
-    else if (rssidBm >= rssidBm_three_bar_margin)
-    {
+    else if (rssidBm >= rssidBm_three_bar_margin) {
         return RssiBar::three;
     }
-    else if (rssidBm >= rssidBm_two_bar_margin)
-    {
+    else if (rssidBm >= rssidBm_two_bar_margin) {
         return RssiBar::two;
     }
-    else if (rssidBm >= rssidBm_one_bar_margin)
-    {
+    else if (rssidBm >= rssidBm_one_bar_margin) {
         return RssiBar::one;
     }
-    else
-    {
+    else {
         return RssiBar::zero;
     }
 }
 
 void SignalStrength::setRssi(const int rssi)
 {
-    data.rssi = rssi;
+    data.rssi    = rssi;
     data.rssidBm = rssiTodBm(data.rssi);
     data.rssiBar = rssidBmToBar(data.rssidBm);
 }
diff --git a/module-services/service-cellular/SignalStrength.hpp b/module-services/service-cellular/SignalStrength.hpp
index e52ee6dca..b581c1805 100644
--- a/module-services/service-cellular/SignalStrength.hpp
+++ b/module-services/service-cellular/SignalStrength.hpp
@@ -15,26 +15,26 @@ class SignalStrength
     //          102..190    -114dBm...-26dBm
     //          191         -25dBm or greater
     //          199         Not known or not detectable
-    static const auto rssi_low = 0;
-    static const auto rssi_max = 31;
+    static const auto rssi_low     = 0;
+    static const auto rssi_max     = 31;
     static const auto rssi_low_dBm = -113;
     static const auto rssi_max_dBm = -51;
     static const auto rssi_invalid = 99;
-    static const auto rssi_step = (rssi_low_dBm - rssi_max_dBm) / (rssi_max - rssi_low);
+    static const auto rssi_step    = (rssi_low_dBm - rssi_max_dBm) / (rssi_max - rssi_low);
 
-    static const auto rssi_tdscmda_low = 100;
-    static const auto rssi_tdscmda_max = 191;
+    static const auto rssi_tdscmda_low     = 100;
+    static const auto rssi_tdscmda_max     = 191;
     static const auto rssi_tdscmda_invalid = 199;
     static const auto rssi_tdscmda_low_dBm = -116;
     static const auto rssi_tdscmda_max_dBm = -25;
     static const auto rssi_tdscmda_step = (rssi_tdscmda_low_dBm - rssi_tdscmda_max_dBm) / (rssi_tdscmda_max - rssi_low);
 
-    static const auto rssidBm_invalid = 0;
-    static const auto rssidBm_five_bar_margin = -60;
-    static const auto rssidBm_four_bar_margin = -75;
+    static const auto rssidBm_invalid          = 0;
+    static const auto rssidBm_five_bar_margin  = -60;
+    static const auto rssidBm_four_bar_margin  = -75;
     static const auto rssidBm_three_bar_margin = -90;
-    static const auto rssidBm_two_bar_margin = -100;
-    static const auto rssidBm_one_bar_margin = -110;
+    static const auto rssidBm_two_bar_margin   = -100;
+    static const auto rssidBm_one_bar_margin   = -110;
 
   public:
     SignalStrength(int rssi);
diff --git a/module-services/service-cellular/api/CellularServiceAPI.cpp b/module-services/service-cellular/api/CellularServiceAPI.cpp
index ea6dbe857..4933b7bff 100644
--- a/module-services/service-cellular/api/CellularServiceAPI.cpp
+++ b/module-services/service-cellular/api/CellularServiceAPI.cpp
@@ -2,43 +2,44 @@
  *  @file CellularServiceAPI.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #include "CellularServiceAPI.hpp"
 #include "Service/Bus.hpp"
 #include "../ServiceCellular.hpp"
 #include "utf8/UTF8.hpp"
 
-bool CellularServiceAPI::DialNumber(sys::Service* serv,const std::string& number) {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularDialNumber);
+bool CellularServiceAPI::DialNumber(sys::Service *serv, const std::string &number)
+{
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularDialNumber);
     msg->data = number;
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceCellular::serviceName,serv,5000);
-    CellularResponseMessage* response = reinterpret_cast<CellularResponseMessage*>(ret.second.get());
-    if((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)){
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
+    CellularResponseMessage *response = reinterpret_cast<CellularResponseMessage *>(ret.second.get());
+    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)) {
         return true;
     }
-    else{
+    else {
         LOG_ERROR("Failed");
         return false;
     }
-
 }
 
-bool CellularServiceAPI::AnswerIncomingCall(sys::Service* serv) {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularAnswerIncomingCall);
+bool CellularServiceAPI::AnswerIncomingCall(sys::Service *serv)
+{
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularAnswerIncomingCall);
 
-    auto ret = sys::Bus::SendUnicast(msg,ServiceCellular::serviceName,serv,5000);
-    CellularResponseMessage* response = reinterpret_cast<CellularResponseMessage*>(ret.second.get());
-    if((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)){
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
+    CellularResponseMessage *response = reinterpret_cast<CellularResponseMessage *>(ret.second.get());
+    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)) {
         return true;
     }
-    else{
+    else {
         LOG_ERROR("Failed");
         return false;
     }
@@ -46,7 +47,8 @@ bool CellularServiceAPI::AnswerIncomingCall(sys::Service* serv) {
 
 void CellularServiceAPI::HangupCall(sys::Service *serv)
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularHangupCall);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularHangupCall);
 
     sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv);
 }
@@ -54,23 +56,21 @@ void CellularServiceAPI::HangupCall(sys::Service *serv)
 std::string CellularServiceAPI::GetIMSI(sys::Service *serv, bool getFullIMSINumber)
 {
 
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularGetIMSI);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularGetIMSI);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
     CellularResponseMessage *response = dynamic_cast<CellularResponseMessage *>(ret.second.get());
 
-    if (response == nullptr)
-    {
+    if (response == nullptr) {
         LOG_ERROR("CellularServiceAPI::GetIMSI failed");
         return std::string();
     }
 
-    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)) {
         return response->data;
     }
-    else
-    {
+    else {
         LOG_ERROR("CellularServiceAPI::GetIMSI failed");
         return std::string();
     }
@@ -78,23 +78,21 @@ std::string CellularServiceAPI::GetIMSI(sys::Service *serv, bool getFullIMSINumb
 
 std::string CellularServiceAPI::GetOwnNumber(sys::Service *serv)
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularGetOwnNumber);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularGetOwnNumber);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
     CellularResponseMessage *response = dynamic_cast<CellularResponseMessage *>(ret.second.get());
 
-    if (response == nullptr)
-    {
+    if (response == nullptr) {
         LOG_ERROR("CellularServiceAPI::GetOwnNumber failed");
         return std::string();
     }
 
-    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)) {
         return response->data;
     }
-    else
-    {
+    else {
         LOG_ERROR("CellularServiceAPI::GetOwnNumber failed");
         return std::string();
     }
@@ -102,28 +100,29 @@ std::string CellularServiceAPI::GetOwnNumber(sys::Service *serv)
 
 void CellularServiceAPI::GetNetworkInfo(sys::Service *serv)
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularGetNetworkInfo);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularGetNetworkInfo);
     sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv);
 }
 
 void CellularServiceAPI::StartOperatorsScan(sys::Service *serv)
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularStartOperatorsScan);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularStartOperatorsScan);
     sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv);
 }
 
 bool CellularServiceAPI::SelectAntenna(sys::Service *serv, uint8_t antenna)
 {
-    std::shared_ptr<CellularRequestMessage> msg = std::make_shared<CellularRequestMessage>(MessageType::CellularGetNetworkInfo);
+    std::shared_ptr<CellularRequestMessage> msg =
+        std::make_shared<CellularRequestMessage>(MessageType::CellularGetNetworkInfo);
     msg->data = std::to_string(antenna);
-    auto ret = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
+    auto ret  = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv, 5000);
 
     CellularResponseMessage *response = dynamic_cast<CellularResponseMessage *>(ret.second.get());
 
-    if (response != nullptr)
-    {
-        if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true))
-        {
+    if (response != nullptr) {
+        if ((ret.first == sys::ReturnCodes::Success) && (response->retCode == true)) {
             return true;
         }
     }
diff --git a/module-services/service-cellular/api/CellularServiceAPI.hpp b/module-services/service-cellular/api/CellularServiceAPI.hpp
index 6595c30e0..bbddbab4a 100644
--- a/module-services/service-cellular/api/CellularServiceAPI.hpp
+++ b/module-services/service-cellular/api/CellularServiceAPI.hpp
@@ -2,13 +2,11 @@
  *  @file CellularServiceAPI.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_CELLULARSERVICEAPI_HPP
 #define PUREPHONE_CELLULARSERVICEAPI_HPP
 
@@ -54,4 +52,4 @@ namespace CellularServiceAPI
     bool SelectAntenna(sys::Service *serv, uint8_t antenna);
 }; // namespace CellularServiceAPI
 
-#endif //PUREPHONE_CELLULARSERVICEAPI_HPP
+#endif // PUREPHONE_CELLULARSERVICEAPI_HPP
diff --git a/module-services/service-cellular/messages/CellularMessage.hpp b/module-services/service-cellular/messages/CellularMessage.hpp
index 19141ab39..576966b5b 100644
--- a/module-services/service-cellular/messages/CellularMessage.hpp
+++ b/module-services/service-cellular/messages/CellularMessage.hpp
@@ -2,13 +2,11 @@
  *  @file CellularMessage.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 03.07.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_CELLULARMESSAGE_HPP
 #define PUREPHONE_CELLULARMESSAGE_HPP
 
@@ -19,61 +17,68 @@
 #include <memory>
 #include <variant>
 
-class CellularMessage : public sys::DataMessage {
-public:
-  CellularMessage(MessageType messageType) : sys::DataMessage(messageType){};
-  virtual ~CellularMessage(){};
+class CellularMessage : public sys::DataMessage
+{
+  public:
+    CellularMessage(MessageType messageType) : sys::DataMessage(messageType){};
+    virtual ~CellularMessage(){};
 };
 
-class CellularNotificationMessage : public CellularMessage {
-public:
-  enum class Type
-  {
-      IncomingCall,             // device receives connection from other device.
-      CallAborted,              // user tried to call other device but receiving side dropped call or call unsuccessful
-      CallActive,               // call is in progress both if call was initialized by user and when user received incoming call.
-      Ringing,                  // user provided number to call to and service initialized calling procedure.
-      NewIncomingSMS,           // device received new sms from network. (what about sms delivery reports?).
-      SignalStrengthUpdate,     // update of the strength of the network's signal.
-      ServiceReady,             // Idle state of the service. This is a start state before any call is initialized by user or by network.
-                                // service returns to this state when call is finished.
-      PowerUpProcedureComplete, // modem without cmux on initialization complete (cold start || reset modem -> and cold start)
-      SIM,                      // change on SIM from URC
-      ModemOn,                  // Modem initialized
-      RawCommand,               // send raw command to modem -> returns raw, tokenised result
-      None
-  };
+class CellularNotificationMessage : public CellularMessage
+{
+  public:
+    enum class Type
+    {
+        IncomingCall, // device receives connection from other device.
+        CallAborted,  // user tried to call other device but receiving side dropped call or call unsuccessful
+        CallActive,   // call is in progress both if call was initialized by user and when user received incoming call.
+        Ringing,      // user provided number to call to and service initialized calling procedure.
+        NewIncomingSMS,       // device received new sms from network. (what about sms delivery reports?).
+        SignalStrengthUpdate, // update of the strength of the network's signal.
+        ServiceReady, // Idle state of the service. This is a start state before any call is initialized by user or by
+                      // network. service returns to this state when call is finished.
+        PowerUpProcedureComplete, // modem without cmux on initialization complete (cold start || reset modem -> and
+                                  // cold start)
+        SIM,                      // change on SIM from URC
+        ModemOn,                  // Modem initialized
+        RawCommand,               // send raw command to modem -> returns raw, tokenised result
+        None
+    };
 
-  // TODO check and fix all CellularNotificationMessage constructors
+    // TODO check and fix all CellularNotificationMessage constructors
 
-  CellularNotificationMessage() = delete;
-  CellularNotificationMessage(Type type, const std::string &data = "") : CellularMessage(MessageType::CellularNotification), type(type), data(data)
-  {
-  }
+    CellularNotificationMessage() = delete;
+    CellularNotificationMessage(Type type, const std::string &data = "")
+        : CellularMessage(MessageType::CellularNotification), type(type), data(data)
+    {}
 
     virtual ~CellularNotificationMessage() = default;
 
-    Type type=Type::None;
+    Type type = Type::None;
 
     std::string data;
 };
 
-class CellularRequestMessage : public CellularMessage{
-public:
-
-    CellularRequestMessage(MessageType messageType):CellularMessage(messageType){}
-    ~CellularRequestMessage() {}
+class CellularRequestMessage : public CellularMessage
+{
+  public:
+    CellularRequestMessage(MessageType messageType) : CellularMessage(messageType)
+    {}
+    ~CellularRequestMessage()
+    {}
 
     std::string data;
-
 };
 
 class CellularResponseMessage : public sys::ResponseMessage
 {
   public:
-    CellularResponseMessage(bool retCode, std::string retdata = std::string(), MessageType responseTo = MessageType::MessageTypeUninitialized)
+    CellularResponseMessage(bool retCode,
+                            std::string retdata    = std::string(),
+                            MessageType responseTo = MessageType::MessageTypeUninitialized)
         : sys::ResponseMessage(sys::ReturnCodes::Success, responseTo), retCode(retCode), data(retdata){};
-    CellularResponseMessage(bool retCode, MessageType responseTo) : sys::ResponseMessage(sys::ReturnCodes::Success, responseTo), retCode(retCode){};
+    CellularResponseMessage(bool retCode, MessageType responseTo)
+        : sys::ResponseMessage(sys::ReturnCodes::Success, responseTo), retCode(retCode){};
     virtual ~CellularResponseMessage(){};
 
     bool retCode;
@@ -110,4 +115,4 @@ namespace cellular
 
 } // namespace cellular
 
-#endif //PUREPHONE_CELLULARMESSAGE_HPP
+#endif // PUREPHONE_CELLULARMESSAGE_HPP
diff --git a/module-services/service-db/ServiceDB.cpp b/module-services/service-db/ServiceDB.cpp
index 1d90d8b1c..ecf275f24 100644
--- a/module-services/service-db/ServiceDB.cpp
+++ b/module-services/service-db/ServiceDB.cpp
@@ -50,98 +50,89 @@ sys::Message_t ServiceDB::DataReceivedHandler(sys::DataMessage *msgl, sys::Respo
 
     std::shared_ptr<sys::ResponseMessage> responseMsg;
 
-    switch (static_cast<MessageType>(msgl->messageType))
-    {
+    switch (static_cast<MessageType>(msgl->messageType)) {
 
     /*
      * Settings record
      */
     case MessageType::DBSettingsGet: {
-        auto time = utils::time::Scoped("DBSettingsGet");
+        auto time        = utils::time::Scoped("DBSettingsGet");
         auto settingsRec = settingsRecordInterface->GetByID(1);
         responseMsg = std::make_shared<DBSettingsResponseMessage>(settingsRec, settingsRec.dbID == 0 ? false : true);
-    }
-    break;
+    } break;
     case MessageType::DBSettingsUpdate: {
-        auto time = utils::time::Scoped("DBSettingsUpdate");
+        auto time              = utils::time::Scoped("DBSettingsUpdate");
         DBSettingsMessage *msg = reinterpret_cast<DBSettingsMessage *>(msgl);
-        auto ret = settingsRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBSettingsResponseMessage>(SettingsRecord{}, ret);
-    }
-    break;
+        auto ret               = settingsRecordInterface->Update(msg->record);
+        responseMsg            = std::make_shared<DBSettingsResponseMessage>(SettingsRecord{}, ret);
+    } break;
 
         /*
          * SMS records
          */
 
     case MessageType::DBSMSAdd: {
-        auto time = utils::time::Scoped("DBSMSAdd");
+        auto time         = utils::time::Scoped("DBSMSAdd");
         DBSMSMessage *msg = reinterpret_cast<DBSMSMessage *>(msgl);
-        auto ret = smsRecordInterface->Add(msg->record);
-        if (ret == true)
-        {
+        auto ret          = smsRecordInterface->Add(msg->record);
+        if (ret == true) {
             // update db ID in response message
-            auto record = std::make_unique<std::vector<SMSRecord>>();
+            auto record    = std::make_unique<std::vector<SMSRecord>>();
             msg->record.ID = smsRecordInterface->GetLastID();
             record->push_back(msg->record);
             LOG_INFO("SMS added, record ID: %d", msg->record.ID);
             responseMsg = std::make_shared<DBSMSResponseMessage>(std::move(record), ret);
 
             // send notification
-            auto notificationMessage =
-                std::make_shared<DBNotificationMessage>(MessageType::DBServiceNotification, DB::NotificationType::Added, DB::BaseType::SmsDB);
+            auto notificationMessage = std::make_shared<DBNotificationMessage>(
+                MessageType::DBServiceNotification, DB::NotificationType::Added, DB::BaseType::SmsDB);
             sys::Bus::SendMulticast(notificationMessage, sys::BusChannels::ServiceDBNotifications, this);
         }
-    }
-    break;
+    } break;
 
     case MessageType::DBSMSRemove: {
-        auto time = utils::time::Scoped("DBSMSRemove");
+        auto time         = utils::time::Scoped("DBSMSRemove");
         DBSMSMessage *msg = reinterpret_cast<DBSMSMessage *>(msgl);
-        auto ret = smsRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBSMSResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret          = smsRecordInterface->RemoveByID(msg->id);
+        responseMsg       = std::make_shared<DBSMSResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBSMSUpdate: {
-        auto time = utils::time::Scoped("DBSMSUpdate");
+        auto time         = utils::time::Scoped("DBSMSUpdate");
         DBSMSMessage *msg = reinterpret_cast<DBSMSMessage *>(msgl);
-        auto ret = smsRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBSMSResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret          = smsRecordInterface->Update(msg->record);
+        responseMsg       = std::make_shared<DBSMSResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBSMSGetSMSLimitOffset: {
-        auto time = utils::time::Scoped("DBSMSGetSMSLimitOffset");
+        auto time         = utils::time::Scoped("DBSMSGetSMSLimitOffset");
         DBSMSMessage *msg = reinterpret_cast<DBSMSMessage *>(msgl);
-        auto ret = smsRecordInterface->GetLimitOffset(msg->offset, msg->limit);
-        responseMsg = std::make_shared<DBSMSResponseMessage>(std::move(ret), true);
-    }
-    break;
+        auto ret          = smsRecordInterface->GetLimitOffset(msg->offset, msg->limit);
+        responseMsg       = std::make_shared<DBSMSResponseMessage>(std::move(ret), true);
+    } break;
 
     case MessageType::DBSMSGetSMSLimitOffsetByThreadID: {
-        auto time = utils::time::Scoped("DBSMSGetSMSLimitOffsetByThreadID");
+        auto time         = utils::time::Scoped("DBSMSGetSMSLimitOffsetByThreadID");
         DBSMSMessage *msg = reinterpret_cast<DBSMSMessage *>(msgl);
-        auto ret = smsRecordInterface->GetLimitOffsetByField(msg->offset, msg->limit, SMSRecordField::ThreadID, std::to_string(msg->id).c_str());
+        auto ret          = smsRecordInterface->GetLimitOffsetByField(
+            msg->offset, msg->limit, SMSRecordField::ThreadID, std::to_string(msg->id).c_str());
         responseMsg = std::make_shared<DBSMSResponseMessage>(std::move(ret), true);
-    }
-    break;
+    } break;
 
-    case MessageType::DBSMSGetLastRecord:
-    {
-        auto time = utils::time::Scoped("DBSMSGetLastRecord");
-        uint32_t id = smsRecordInterface->GetLastID();
-        auto rec = smsRecordInterface->GetByID(id);
-    	auto records = std::make_unique<std::vector<SMSRecord>>();
-    	records->push_back(rec);
-    	responseMsg = std::make_shared<DBSMSResponseMessage>(std::move(records), true);
-    	break;
+    case MessageType::DBSMSGetLastRecord: {
+        auto time    = utils::time::Scoped("DBSMSGetLastRecord");
+        uint32_t id  = smsRecordInterface->GetLastID();
+        auto rec     = smsRecordInterface->GetByID(id);
+        auto records = std::make_unique<std::vector<SMSRecord>>();
+        records->push_back(rec);
+        responseMsg = std::make_shared<DBSMSResponseMessage>(std::move(records), true);
+        break;
     }
     case MessageType::DBSMSGetCount: {
         auto msg = dynamic_cast<DBSMSGetCount *>(msgl);
         assert(msg);
-        auto time = utils::time::Scoped("DBSMSGetCount");
-        auto ret = smsRecordInterface->GetCount(msg->state);
+        auto time   = utils::time::Scoped("DBSMSGetCount");
+        auto ret    = smsRecordInterface->GetCount(msg->state);
         responseMsg = std::make_shared<DBSMSResponseMessage>(nullptr, true, ret);
         break;
     }
@@ -150,261 +141,254 @@ sys::Message_t ServiceDB::DataReceivedHandler(sys::DataMessage *msgl, sys::Respo
          */
 
     case MessageType::DBThreadGet: {
-        auto time = utils::time::Scoped("DBThreadGet");
+        auto time            = utils::time::Scoped("DBThreadGet");
         DBThreadMessage *msg = reinterpret_cast<DBThreadMessage *>(msgl);
-        auto ret = threadRecordInterface->GetByID(msg->id);
-        auto records = std::make_unique<std::vector<ThreadRecord>>();
+        auto ret             = threadRecordInterface->GetByID(msg->id);
+        auto records         = std::make_unique<std::vector<ThreadRecord>>();
         records->push_back(ret);
         responseMsg = std::make_shared<DBThreadResponseMessage>(std::move(records), ret.dbID == 0 ? false : true);
-    }
-    break;
+    } break;
 
     case MessageType::DBThreadGetForContact: {
         auto time = utils::time::Scoped("DBThreadGetForContact");
-        auto msg = dynamic_cast<DBThreadMessageGet *>(msgl);
-        if (!msg)
-        {
+        auto msg  = dynamic_cast<DBThreadMessageGet *>(msgl);
+        if (!msg) {
             LOG_ERROR("ERROR wrong message sent!");
         }
-        auto ret = threadRecordInterface->GetByContact(msg->contactID);
+        auto ret     = threadRecordInterface->GetByContact(msg->contactID);
         auto records = std::make_unique<std::vector<ThreadRecord>>();
         records->push_back(ret);
         responseMsg = std::make_shared<DBThreadResponseMessage>(std::move(records), ret.dbID == 0 ? false : true);
-    };
-    break;
+    }; break;
 
     case MessageType::DBThreadRemove: {
-        auto time = utils::time::Scoped("DBThreadRemove");
+        auto time            = utils::time::Scoped("DBThreadRemove");
         DBThreadMessage *msg = reinterpret_cast<DBThreadMessage *>(msgl);
-        auto ret = threadRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBThreadResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret             = threadRecordInterface->RemoveByID(msg->id);
+        responseMsg          = std::make_shared<DBThreadResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBThreadGetLimitOffset: {
-        auto time = utils::time::Scoped("DBThreadGetLimitOffset");
+        auto time            = utils::time::Scoped("DBThreadGetLimitOffset");
         DBThreadMessage *msg = reinterpret_cast<DBThreadMessage *>(msgl);
-        auto ret = threadRecordInterface->GetLimitOffset(msg->offset, msg->limit);
+        auto ret             = threadRecordInterface->GetLimitOffset(msg->offset, msg->limit);
         LOG_INFO("Thread get limit offset");
-        responseMsg = std::make_shared<DBThreadResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
-    }
-    break;
+        responseMsg =
+            std::make_shared<DBThreadResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
+    } break;
 
     case MessageType::DBThreadGetCount: {
         //  DBThreadMessage *msg = reinterpret_cast<DBThreadMessage *>(msgl);
-        auto time = utils::time::Scoped("DBThreadGetCount");
-        auto ret = threadRecordInterface->GetCount();
+        auto time   = utils::time::Scoped("DBThreadGetCount");
+        auto ret    = threadRecordInterface->GetCount();
         responseMsg = std::make_shared<DBThreadResponseMessage>(nullptr, true, 0, 0, ret);
-    }
-    break;
+    } break;
 
     case MessageType::DBContactAdd: {
-        auto time = utils::time::Scoped("DBContactAdd");
+        auto time             = utils::time::Scoped("DBContactAdd");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->Add(msg->record);
-        responseMsg = std::make_shared<DBContactResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret              = contactRecordInterface->Add(msg->record);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBContactGetByName: {
-        auto time = utils::time::Scoped("DBContactGetByName");
+        auto time             = utils::time::Scoped("DBContactGetByName");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->GetByName(msg->record.primaryName, msg->record.alternativeName);
-        responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret), true, msg->limit, msg->offset, msg->favourite, ret->size(),
+        auto ret              = contactRecordInterface->GetByName(msg->record.primaryName, msg->record.alternativeName);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(std::move(ret),
+                                                                 true,
+                                                                 msg->limit,
+                                                                 msg->offset,
+                                                                 msg->favourite,
+                                                                 ret->size(),
                                                                  MessageType::DBContactGetByName);
-    }
-    break;
-    
+    } break;
+
     case MessageType::DBContactSearch: {
-        auto time = utils::time::Scoped("DBContactSearch");
+        auto time                   = utils::time::Scoped("DBContactSearch");
         DBContactSearchMessage *msg = reinterpret_cast<DBContactSearchMessage *>(msgl);
-        auto ret = contactRecordInterface->Search(msg->primaryName, msg->alternativeName, msg->number);
+        auto ret    = contactRecordInterface->Search(msg->primaryName, msg->alternativeName, msg->number);
         responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret), true);
-    }
-    break;
-    
+    } break;
+
     case MessageType::DBContactGetByID: {
-        auto time = utils::time::Scoped("DBContactGetByID");
+        auto time             = utils::time::Scoped("DBContactGetByID");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->GetByID(msg->record.dbID);
-        auto records = std::make_unique<std::vector<ContactRecord>>();
+        auto ret              = contactRecordInterface->GetByID(msg->record.dbID);
+        auto records          = std::make_unique<std::vector<ContactRecord>>();
         records->push_back(ret);
-        responseMsg =
-            std::make_shared<DBContactResponseMessage>(std::move(records), true, msg->limit, msg->offset, msg->favourite, 1, MessageType::DBContactGetByID);
-    }
-    break;
+        responseMsg = std::make_shared<DBContactResponseMessage>(
+            std::move(records), true, msg->limit, msg->offset, msg->favourite, 1, MessageType::DBContactGetByID);
+    } break;
 
     case MessageType::DBContactGetBySpeedDial: {
-        auto time = utils::time::Scoped("DBContactGetBySpeedDial");
+        auto time             = utils::time::Scoped("DBContactGetBySpeedDial");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->GetBySpeedDial(msg->record.speeddial);
-        responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret), true, msg->limit, msg->offset, msg->favourite, ret->size(),
+        auto ret              = contactRecordInterface->GetBySpeedDial(msg->record.speeddial);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(std::move(ret),
+                                                                 true,
+                                                                 msg->limit,
+                                                                 msg->offset,
+                                                                 msg->favourite,
+                                                                 ret->size(),
                                                                  MessageType::DBContactGetBySpeedDial);
-    }
-    break;
+    } break;
 
     case MessageType::DBContactGetByNumber: {
-        auto time = utils::time::Scoped("DBContactGetByNumber");
+        auto time             = utils::time::Scoped("DBContactGetByNumber");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->GetByNumber(msg->record.number);
-        responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret), true, msg->limit, msg->offset, msg->favourite, ret->size(),
+        auto ret              = contactRecordInterface->GetByNumber(msg->record.number);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(std::move(ret),
+                                                                 true,
+                                                                 msg->limit,
+                                                                 msg->offset,
+                                                                 msg->favourite,
+                                                                 ret->size(),
                                                                  MessageType::DBContactGetByNumber);
-    }
-    break;
+    } break;
 
     case MessageType::DBContactRemove: {
-        auto time = utils::time::Scoped("DBContactRemove");
+        auto time             = utils::time::Scoped("DBContactRemove");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBContactResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret              = contactRecordInterface->RemoveByID(msg->id);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBContactBlock: {
-        auto time = utils::time::Scoped("DBContactBlock");
+        auto time           = utils::time::Scoped("DBContactBlock");
         DBContactBlock *msg = reinterpret_cast<DBContactBlock *>(msgl);
-        auto ret = contactRecordInterface->BlockByID(msg->id, msg->shouldBeBlocked);
-        responseMsg = std::make_shared<DBContactResponseMessage>(nullptr, ret);
-    }
-    break;
-    
+        auto ret            = contactRecordInterface->BlockByID(msg->id, msg->shouldBeBlocked);
+        responseMsg         = std::make_shared<DBContactResponseMessage>(nullptr, ret);
+    } break;
+
     case MessageType::DBContactUpdate: {
-        auto time = utils::time::Scoped("DBContactUpdate");
+        auto time             = utils::time::Scoped("DBContactUpdate");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        auto ret = contactRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBContactResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret              = contactRecordInterface->Update(msg->record);
+        responseMsg           = std::make_shared<DBContactResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBContactGetCount: {
-        auto time = utils::time::Scoped("DBContactGetCount");
+        auto time             = utils::time::Scoped("DBContactGetCount");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
-        uint32_t ret = 0;
+        uint32_t ret          = 0;
         if (msg->favourite)
             ret = contactRecordInterface->GetCountFavourites();
         else
             ret = contactRecordInterface->GetCount();
         responseMsg = std::make_shared<DBContactResponseMessage>(nullptr, true, 0, 0, msg->favourite, ret);
-    }
-    break;
+    } break;
 
     case MessageType::DBContactGetLimitOffset: {
-        auto time = utils::time::Scoped("DBContactGetLimitOffset");
+        auto time             = utils::time::Scoped("DBContactGetLimitOffset");
         DBContactMessage *msg = reinterpret_cast<DBContactMessage *>(msgl);
         std::unique_ptr<std::vector<ContactRecord>> ret;
         if (msg->favourite)
-            ret = contactRecordInterface->GetLimitOffsetByField(msg->offset, msg->limit, ContactRecordField::Favourite, "1");
+            ret = contactRecordInterface->GetLimitOffsetByField(
+                msg->offset, msg->limit, ContactRecordField::Favourite, "1");
         else
             ret = contactRecordInterface->GetLimitOffset(msg->offset, msg->limit);
-        responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret), true, msg->limit, msg->offset, msg->favourite, ret->size(),
+        responseMsg = std::make_shared<DBContactResponseMessage>(std::move(ret),
+                                                                 true,
+                                                                 msg->limit,
+                                                                 msg->offset,
+                                                                 msg->favourite,
+                                                                 ret->size(),
                                                                  MessageType::DBContactGetLimitOffset);
-    }
-    break;
+    } break;
 
     case MessageType::DBAlarmAdd: {
-        auto time = utils::time::Scoped("DBAlarmAdd");
+        auto time           = utils::time::Scoped("DBAlarmAdd");
         DBAlarmMessage *msg = reinterpret_cast<DBAlarmMessage *>(msgl);
-        auto ret = alarmsRecordInterface->Add(msg->record);
-        responseMsg = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
-        if (ret == true)
-        {
-            auto notificationMessage =
-                std::make_shared<DBNotificationMessage>(MessageType::DBServiceNotification, DB::NotificationType::Updated, DB::BaseType::AlarmDB);
+        auto ret            = alarmsRecordInterface->Add(msg->record);
+        responseMsg         = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
+        if (ret == true) {
+            auto notificationMessage = std::make_shared<DBNotificationMessage>(
+                MessageType::DBServiceNotification, DB::NotificationType::Updated, DB::BaseType::AlarmDB);
             notificationMessage->notificationType = DB::NotificationType::Added;
             sys::Bus::SendMulticast(notificationMessage, sys::BusChannels::ServiceDBNotifications, this);
         }
-    }
-    break;
+    } break;
 
     case MessageType::DBAlarmRemove: {
-        auto time = utils::time::Scoped("DBAlarmRemove");
+        auto time           = utils::time::Scoped("DBAlarmRemove");
         DBAlarmMessage *msg = reinterpret_cast<DBAlarmMessage *>(msgl);
-        auto ret = alarmsRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret            = alarmsRecordInterface->RemoveByID(msg->id);
+        responseMsg         = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBAlarmUpdate: {
-        auto time = utils::time::Scoped("DBAlarmUpdate");
+        auto time           = utils::time::Scoped("DBAlarmUpdate");
         DBAlarmMessage *msg = reinterpret_cast<DBAlarmMessage *>(msgl);
-        auto ret = alarmsRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret            = alarmsRecordInterface->Update(msg->record);
+        responseMsg         = std::make_shared<DBAlarmResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBAlarmGetCount: {
-        auto time = utils::time::Scoped("DBAlarmGetCount");
-        auto ret = alarmsRecordInterface->GetCount();
+        auto time   = utils::time::Scoped("DBAlarmGetCount");
+        auto ret    = alarmsRecordInterface->GetCount();
         responseMsg = std::make_shared<DBAlarmResponseMessage>(nullptr, true, ret);
-    }
-    break;
+    } break;
 
     case MessageType::DBAlarmGetLimitOffset: {
-        auto time = utils::time::Scoped("DBAlarmGetLimitOffset");
+        auto time           = utils::time::Scoped("DBAlarmGetLimitOffset");
         DBAlarmMessage *msg = reinterpret_cast<DBAlarmMessage *>(msgl);
-        auto ret = alarmsRecordInterface->GetLimitOffset(msg->offset, msg->limit);
-        responseMsg = std::make_shared<DBAlarmResponseMessage>(std::move(ret), true);
-    }
-    break;
+        auto ret            = alarmsRecordInterface->GetLimitOffset(msg->offset, msg->limit);
+        responseMsg         = std::make_shared<DBAlarmResponseMessage>(std::move(ret), true);
+    } break;
     case MessageType::DBAlarmGetNext: {
-        auto time = utils::time::Scoped("DBAlarmGetNext");
+        auto time           = utils::time::Scoped("DBAlarmGetNext");
         DBAlarmMessage *msg = reinterpret_cast<DBAlarmMessage *>(msgl);
-        auto ret = alarmsRecordInterface->GetNext(msg->time);
-        auto records = std::make_unique<std::vector<AlarmsRecord>>();
+        auto ret            = alarmsRecordInterface->GetNext(msg->time);
+        auto records        = std::make_unique<std::vector<AlarmsRecord>>();
         records->push_back(ret);
         responseMsg = std::make_shared<DBAlarmResponseMessage>(std::move(records), ret.ID == 0 ? false : true);
-    }
-    break;
+    } break;
 
         /****** Notes */
     case MessageType::DBNotesAdd: {
-        auto time = utils::time::Scoped("DBNotesAdd");
+        auto time           = utils::time::Scoped("DBNotesAdd");
         DBNotesMessage *msg = reinterpret_cast<DBNotesMessage *>(msgl);
-        auto ret = notesRecordInterface->Add(msg->record);
-        responseMsg = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret            = notesRecordInterface->Add(msg->record);
+        responseMsg         = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBNotesRemove: {
-        auto time = utils::time::Scoped("DBNotesRemove");
+        auto time           = utils::time::Scoped("DBNotesRemove");
         DBNotesMessage *msg = reinterpret_cast<DBNotesMessage *>(msgl);
-        auto ret = notesRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret            = notesRecordInterface->RemoveByID(msg->id);
+        responseMsg         = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBNotesUpdate: {
-        auto time = utils::time::Scoped("DBNotesUpdate");
+        auto time           = utils::time::Scoped("DBNotesUpdate");
         DBNotesMessage *msg = reinterpret_cast<DBNotesMessage *>(msgl);
-        auto ret = notesRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret            = notesRecordInterface->Update(msg->record);
+        responseMsg         = std::make_shared<DBNotesResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBNotesGetCount: {
-        auto time = utils::time::Scoped("DBNotesGetCount");
-        auto ret = notesRecordInterface->GetCount();
+        auto time   = utils::time::Scoped("DBNotesGetCount");
+        auto ret    = notesRecordInterface->GetCount();
         responseMsg = std::make_shared<DBNotesResponseMessage>(nullptr, true, 0, 0, ret);
-    }
-    break;
+    } break;
 
     case MessageType::DBNotesGetLimitOffset: {
-        auto time = utils::time::Scoped("DBNotesGetLimitOffset");
+        auto time           = utils::time::Scoped("DBNotesGetLimitOffset");
         DBNotesMessage *msg = reinterpret_cast<DBNotesMessage *>(msgl);
-        auto ret = notesRecordInterface->GetLimitOffset(msg->offset, msg->limit);
-        responseMsg = std::make_shared<DBNotesResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
-    }
-    break;
+        auto ret            = notesRecordInterface->GetLimitOffset(msg->offset, msg->limit);
+        responseMsg =
+            std::make_shared<DBNotesResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
+    } break;
 
         /****** Calllog */
     case MessageType::DBCalllogAdd: {
-        auto time = utils::time::Scoped("DBCalllogAdd");
+        auto time             = utils::time::Scoped("DBCalllogAdd");
         DBCalllogMessage *msg = reinterpret_cast<DBCalllogMessage *>(msgl);
-        auto record = std::make_unique<std::vector<CalllogRecord>>();
-        msg->record.ID = DB_ID_NONE;
-        auto ret = calllogRecordInterface->Add(msg->record);
-        if (ret)
-        {
+        auto record           = std::make_unique<std::vector<CalllogRecord>>();
+        msg->record.ID        = DB_ID_NONE;
+        auto ret              = calllogRecordInterface->Add(msg->record);
+        if (ret) {
             // return the newly added record
             msg->record = calllogRecordInterface->GetByID(calllogRecordInterface->GetLastID());
         }
@@ -412,51 +396,46 @@ sys::Message_t ServiceDB::DataReceivedHandler(sys::DataMessage *msgl, sys::Respo
         LOG_INFO("Last ID %d", msg->record.ID);
         responseMsg = std::make_shared<DBCalllogResponseMessage>(std::move(record), ret);
 
-        auto notificationMessage =
-            std::make_shared<DBNotificationMessage>(MessageType::DBServiceNotification, DB::NotificationType::Added, DB::BaseType::CalllogDB);
+        auto notificationMessage = std::make_shared<DBNotificationMessage>(
+            MessageType::DBServiceNotification, DB::NotificationType::Added, DB::BaseType::CalllogDB);
         sys::Bus::SendMulticast(notificationMessage, sys::BusChannels::ServiceDBNotifications, this);
-    }
-    break;
+    } break;
 
     case MessageType::DBCalllogRemove: {
-        auto time = utils::time::Scoped("DBCalllogRemove");
+        auto time             = utils::time::Scoped("DBCalllogRemove");
         DBCalllogMessage *msg = reinterpret_cast<DBCalllogMessage *>(msgl);
-        auto ret = calllogRecordInterface->RemoveByID(msg->id);
-        responseMsg = std::make_shared<DBCalllogResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret              = calllogRecordInterface->RemoveByID(msg->id);
+        responseMsg           = std::make_shared<DBCalllogResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBCalllogUpdate: {
-        auto time = utils::time::Scoped("DBCalllogUpdate");
+        auto time             = utils::time::Scoped("DBCalllogUpdate");
         DBCalllogMessage *msg = reinterpret_cast<DBCalllogMessage *>(msgl);
-        auto ret = calllogRecordInterface->Update(msg->record);
-        responseMsg = std::make_shared<DBCalllogResponseMessage>(nullptr, ret);
-    }
-    break;
+        auto ret              = calllogRecordInterface->Update(msg->record);
+        responseMsg           = std::make_shared<DBCalllogResponseMessage>(nullptr, ret);
+    } break;
 
     case MessageType::DBCalllogGetCount: {
         auto *msg = dynamic_cast<DBCalllogGetCount *>(msgl);
         assert(msg);
-        auto time = utils::time::Scoped("DBCalllogGetCount");
-        auto ret = calllogRecordInterface->GetCount(msg->state);
+        auto time   = utils::time::Scoped("DBCalllogGetCount");
+        auto ret    = calllogRecordInterface->GetCount(msg->state);
         responseMsg = std::make_shared<DBCalllogResponseMessage>(nullptr, true, 0, 0, ret);
-    }
-    break;
+    } break;
 
     case MessageType::DBCalllogGetLimitOffset: {
-        auto time = utils::time::Scoped("DBCalllogGetLimitOffset");
+        auto time             = utils::time::Scoped("DBCalllogGetLimitOffset");
         DBCalllogMessage *msg = reinterpret_cast<DBCalllogMessage *>(msgl);
-        auto ret = calllogRecordInterface->GetLimitOffset(msg->offset, msg->limit);
-        responseMsg = std::make_shared<DBCalllogResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
-    }
-    break;
+        auto ret              = calllogRecordInterface->GetLimitOffset(msg->offset, msg->limit);
+        responseMsg =
+            std::make_shared<DBCalllogResponseMessage>(std::move(ret), true, msg->limit, msg->offset, ret->size());
+    } break;
 
     case MessageType::DBCountryCode: {
         DBCountryCodeMessage *msg = reinterpret_cast<DBCountryCodeMessage *>(msgl);
-        auto ret = countryCodeRecordInterface->GetByMCC(msg->mcc);
-        responseMsg = std::make_shared<DBCountryCodeResponseMessage>(ret);
-    }
-    break;
+        auto ret                  = countryCodeRecordInterface->GetByMCC(msg->mcc);
+        responseMsg               = std::make_shared<DBCountryCodeResponseMessage>(ret);
+    } break;
 
     default:
         // ignore this message
@@ -469,8 +448,7 @@ sys::Message_t ServiceDB::DataReceivedHandler(sys::DataMessage *msgl, sys::Respo
 
 // Invoked when timer ticked
 void ServiceDB::TickHandler(uint32_t id)
-{
-}
+{}
 
 // Invoked during initialization
 sys::ReturnCodes ServiceDB::InitHandler()
@@ -479,22 +457,22 @@ sys::ReturnCodes ServiceDB::InitHandler()
     Database::Initialize();
 
     // Create databases
-    settingsDB = std::make_unique<SettingsDB>();
-    contactsDB = std::make_unique<ContactsDB>();
-    smsDB = std::make_unique<SmsDB>();
-    alarmsDB = std::make_unique<AlarmsDB>();
-    notesDB = std::make_unique<NotesDB>();
-    calllogDB = std::make_unique<CalllogDB>();
+    settingsDB     = std::make_unique<SettingsDB>();
+    contactsDB     = std::make_unique<ContactsDB>();
+    smsDB          = std::make_unique<SmsDB>();
+    alarmsDB       = std::make_unique<AlarmsDB>();
+    notesDB        = std::make_unique<NotesDB>();
+    calllogDB      = std::make_unique<CalllogDB>();
     countryCodesDB = std::make_unique<CountryCodesDB>();
 
     // Create record interfaces
-    settingsRecordInterface = std::make_unique<SettingsRecordInterface>(settingsDB.get());
-    contactRecordInterface = std::make_unique<ContactRecordInterface>(contactsDB.get());
-    smsRecordInterface = std::make_unique<SMSRecordInterface>(smsDB.get(), contactsDB.get());
-    threadRecordInterface = std::make_unique<ThreadRecordInterface>(smsDB.get(), contactsDB.get());
-    alarmsRecordInterface = std::make_unique<AlarmsRecordInterface>(alarmsDB.get());
-    notesRecordInterface = std::make_unique<NotesRecordInterface>(notesDB.get());
-    calllogRecordInterface = std::make_unique<CalllogRecordInterface>(calllogDB.get(), contactsDB.get());
+    settingsRecordInterface    = std::make_unique<SettingsRecordInterface>(settingsDB.get());
+    contactRecordInterface     = std::make_unique<ContactRecordInterface>(contactsDB.get());
+    smsRecordInterface         = std::make_unique<SMSRecordInterface>(smsDB.get(), contactsDB.get());
+    threadRecordInterface      = std::make_unique<ThreadRecordInterface>(smsDB.get(), contactsDB.get());
+    alarmsRecordInterface      = std::make_unique<AlarmsRecordInterface>(alarmsDB.get());
+    notesRecordInterface       = std::make_unique<NotesRecordInterface>(notesDB.get());
+    calllogRecordInterface     = std::make_unique<CalllogRecordInterface>(calllogDB.get(), contactsDB.get());
     countryCodeRecordInterface = std::make_unique<CountryCodeRecordInterface>(countryCodesDB.get());
     return sys::ReturnCodes::Success;
 }
diff --git a/module-services/service-db/api/DBServiceAPI.cpp b/module-services/service-db/api/DBServiceAPI.cpp
index 2704b8193..ea225636f 100644
--- a/module-services/service-db/api/DBServiceAPI.cpp
+++ b/module-services/service-db/api/DBServiceAPI.cpp
@@ -22,22 +22,18 @@ SettingsRecord DBServiceAPI::SettingsGet(sys::Service *serv)
     std::shared_ptr<DBSettingsMessage> msg = std::make_shared<DBSettingsMessage>(MessageType::DBSettingsGet);
 
     auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
-    if (ret.first == sys::ReturnCodes::Success)
-    {
-        auto respMsg = ret.second;
+    if (ret.first == sys::ReturnCodes::Success) {
+        auto respMsg                                = ret.second;
         DBSettingsResponseMessage *settingsResponse = reinterpret_cast<DBSettingsResponseMessage *>(respMsg.get());
 
-        if (settingsResponse->retCode == true)
-        {
+        if (settingsResponse->retCode == true) {
             return settingsResponse->record;
         }
-        else
-        {
+        else {
             return SettingsRecord{};
         }
     }
-    else
-    {
+    else {
         return SettingsRecord{};
     }
 }
@@ -47,12 +43,10 @@ bool DBServiceAPI::SettingsUpdate(sys::Service *serv, const SettingsRecord &rec)
     std::shared_ptr<DBSettingsMessage> msg = std::make_shared<DBSettingsMessage>(MessageType::DBSettingsUpdate, rec);
 
     auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
-    if (ret.first == sys::ReturnCodes::Success)
-    {
+    if (ret.first == sys::ReturnCodes::Success) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -61,14 +55,12 @@ uint32_t DBServiceAPI::SMSAdd(sys::Service *serv, const SMSRecord &rec)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSAdd, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return (*smsResponse->records)[0].ID;
     }
-    else
-    {
+    else {
         return 0;
     }
 }
@@ -76,16 +68,14 @@ uint32_t DBServiceAPI::SMSAdd(sys::Service *serv, const SMSRecord &rec)
 bool DBServiceAPI::SMSRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSRemove);
-    msg->id = id;
+    msg->id                           = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -94,14 +84,12 @@ bool DBServiceAPI::SMSUpdate(sys::Service *serv, const SMSRecord &rec)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSUpdate, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -110,53 +98,52 @@ SMSRecord DBServiceAPI::SMSGetLastRecord(sys::Service *serv)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSGetLastRecord);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return (*smsResponse->records)[0];
     }
-    else
-    {
+    else {
         SMSRecord rec;
         rec.ID = 0;
         return rec;
     }
 }
 
-std::unique_ptr<std::vector<SMSRecord>> DBServiceAPI::SMSGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit)
+std::unique_ptr<std::vector<SMSRecord>> DBServiceAPI::SMSGetLimitOffset(sys::Service *serv,
+                                                                        uint32_t offset,
+                                                                        uint32_t limit)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSGetSMSLimitOffset);
-    msg->offset = offset;
-    msg->limit = limit;
+    msg->offset                       = offset;
+    msg->limit                        = limit;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return std::move(smsResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<SMSRecord>>();
     }
 }
 
-std::unique_ptr<std::vector<SMSRecord>> DBServiceAPI::SMSGetLimitOffsetByThreadID(sys::Service *serv, uint32_t offset, uint32_t limit, uint32_t id)
+std::unique_ptr<std::vector<SMSRecord>> DBServiceAPI::SMSGetLimitOffsetByThreadID(sys::Service *serv,
+                                                                                  uint32_t offset,
+                                                                                  uint32_t limit,
+                                                                                  uint32_t id)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSMessage>(MessageType::DBSMSGetSMSLimitOffsetByThreadID);
-    msg->offset = offset;
-    msg->limit = limit;
-    msg->id = id;
+    msg->offset                       = offset;
+    msg->limit                        = limit;
+    msg->id                           = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                          = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBSMSResponseMessage *smsResponse = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (smsResponse->retCode == true)) {
         return std::move(smsResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<SMSRecord>>();
     }
 }
@@ -165,14 +152,12 @@ uint32_t DBServiceAPI::SMSGetCount(sys::Service *serv, EntryState state)
 {
     std::shared_ptr<DBSMSMessage> msg = std::make_shared<DBSMSGetCount>(state);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     auto *sms = reinterpret_cast<DBSMSResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (sms->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (sms->retCode == true)) {
         return sms->count;
     }
-    else
-    {
+    else {
         return 0;
     }
 }
@@ -180,31 +165,28 @@ uint32_t DBServiceAPI::SMSGetCount(sys::Service *serv, EntryState state)
 std::unique_ptr<ThreadRecord> DBServiceAPI::ThreadGet(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBThreadMessage> msg = std::make_shared<DBThreadMessage>(MessageType::DBThreadGet);
-    msg->id = id;
+    msg->id                              = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBThreadResponseMessage *threadResponse = reinterpret_cast<DBThreadResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true)) {
         return std::make_unique<ThreadRecord>((*threadResponse->records)[0]);
     }
-    else
-    {
+    else {
         return nullptr;
     }
 }
 
 std::unique_ptr<ThreadRecord> DBServiceAPI::ThreadGetByContact(sys::Service *serv, uint32_t contact)
 {
-    std::shared_ptr<DBThreadMessageGet> msg = std::make_shared<DBThreadMessageGet>(MessageType::DBThreadGetForContact, contact);
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    std::shared_ptr<DBThreadMessageGet> msg =
+        std::make_shared<DBThreadMessageGet>(MessageType::DBThreadGetForContact, contact);
+    auto ret                                = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBThreadResponseMessage *threadResponse = reinterpret_cast<DBThreadResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true)) {
         return std::make_unique<ThreadRecord>((*threadResponse->records)[0]);
     }
-    else
-    {
+    else {
         return nullptr;
     }
 }
@@ -212,16 +194,14 @@ std::unique_ptr<ThreadRecord> DBServiceAPI::ThreadGetByContact(sys::Service *ser
 bool DBServiceAPI::ThreadRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBThreadMessage> msg = std::make_shared<DBThreadMessage>(MessageType::DBThreadRemove);
-    msg->id = id;
+    msg->id                              = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBThreadResponseMessage *threadResponse = reinterpret_cast<DBThreadResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -229,8 +209,8 @@ bool DBServiceAPI::ThreadRemove(sys::Service *serv, uint32_t id)
 bool DBServiceAPI::ThreadGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit)
 {
     std::shared_ptr<DBThreadMessage> msg = std::make_shared<DBThreadMessage>(MessageType::DBThreadGetLimitOffset);
-    msg->offset = offset;
-    msg->limit = limit;
+    msg->offset                          = offset;
+    msg->limit                           = limit;
 
     sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv);
 
@@ -241,35 +221,33 @@ uint32_t DBServiceAPI::ThreadGetCount(sys::Service *serv)
 {
     std::shared_ptr<DBThreadMessage> msg = std::make_shared<DBThreadMessage>(MessageType::DBThreadGetCount);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBThreadResponseMessage *threadResponse = reinterpret_cast<DBThreadResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true)) {
         return threadResponse->count;
     }
-    else
-    {
+    else {
         return false;
     }
 }
 
-std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetByName(sys::Service *serv, UTF8 primaryName, UTF8 alternativeName)
+std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetByName(sys::Service *serv,
+                                                                           UTF8 primaryName,
+                                                                           UTF8 alternativeName)
 {
 
     ContactRecord rec;
-    rec.primaryName = primaryName;
+    rec.primaryName     = primaryName;
     rec.alternativeName = alternativeName;
 
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetByName, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return std::move(contactResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<ContactRecord>>();
     }
 }
@@ -281,14 +259,12 @@ std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetByID(sys::Se
 
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetByID, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return std::move(contactResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<ContactRecord>>();
     }
 }
@@ -298,16 +274,15 @@ std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetBySpeeddial(
     ContactRecord rec;
     rec.speeddial = speeddial;
 
-    std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetBySpeedDial, rec);
+    std::shared_ptr<DBContactMessage> msg =
+        std::make_shared<DBContactMessage>(MessageType::DBContactGetBySpeedDial, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return std::move(contactResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<ContactRecord>>();
     }
 }
@@ -319,51 +294,47 @@ std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetByPhoneNumbe
 
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetByNumber, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return std::move(contactResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<ContactRecord>>();
     }
 }
 
-DBServiceAPI::ContactVerificationError DBServiceAPI::verifyContact(sys::Service *serv, const ContactRecord &rec, ContactRecord &errName,
-                                                                   ContactRecord &errPhone1, ContactRecord &errPhone2, ContactRecord &speedDial)
+DBServiceAPI::ContactVerificationError DBServiceAPI::verifyContact(sys::Service *serv,
+                                                                   const ContactRecord &rec,
+                                                                   ContactRecord &errName,
+                                                                   ContactRecord &errPhone1,
+                                                                   ContactRecord &errPhone2,
+                                                                   ContactRecord &speedDial)
 {
     auto retName = ContactGetByName(serv, rec.primaryName, rec.alternativeName);
-    if (retName->size() != 0)
-    {
+    if (retName->size() != 0) {
         errName = retName->operator[](0);
         return (nameError);
     }
 
     auto retSpeedDial = ContactGetBySpeeddial(serv, rec.speeddial);
-    if (retSpeedDial->size() != 0)
-    {
+    if (retSpeedDial->size() != 0) {
         speedDial = retSpeedDial->operator[](0);
         return (speedDialError);
     }
 
     // request contact by speed dial
-    if (rec.numbers.size() > 0)
-    {
+    if (rec.numbers.size() > 0) {
         auto retPhone1 = ContactGetByPhoneNumber(serv, rec.numbers[0].numberE164);
-        if (retPhone1->size() != 0)
-        {
+        if (retPhone1->size() != 0) {
             errPhone1 = retPhone1->operator[](0);
             return (primaryNumberError);
         }
     }
 
-    if (rec.numbers.size() > 1)
-    {
+    if (rec.numbers.size() > 1) {
         auto retPhone2 = ContactGetByPhoneNumber(serv, rec.numbers[1].numberE164);
-        if (retPhone2->size() != 0)
-        {
+        if (retPhone2->size() != 0) {
             errPhone2 = retPhone2->operator[](0);
             return (secondaryNumberError);
         }
@@ -374,8 +345,7 @@ DBServiceAPI::ContactVerificationError DBServiceAPI::verifyContact(sys::Service
 
 std::string DBServiceAPI::getVerificationErrorString(const ContactVerificationError err)
 {
-    switch (err)
-    {
+    switch (err) {
     case noError:
         return ("No error occured");
     case nameError:
@@ -394,16 +364,14 @@ std::string DBServiceAPI::getVerificationErrorString(const ContactVerificationEr
 bool DBServiceAPI::ContactAdd(sys::Service *serv, const ContactRecord &rec)
 {
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactAdd, rec);
-    msg->record.contactType = ContactType::USER;
+    msg->record.contactType               = ContactType::USER;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -411,16 +379,14 @@ bool DBServiceAPI::ContactAdd(sys::Service *serv, const ContactRecord &rec)
 bool DBServiceAPI::ContactRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactRemove);
-    msg->id = id;
+    msg->id                               = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -429,46 +395,42 @@ bool DBServiceAPI::ContactUpdate(sys::Service *serv, const ContactRecord &rec)
 {
     std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactUpdate, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
 
 bool DBServiceAPI::ContactBlock(sys::Service *serv, uint32_t id, const bool shouldBeBlocked)
 {
-    std::shared_ptr<DBContactBlock> msg = std::make_shared<DBContactBlock>(MessageType::DBContactBlock, id, shouldBeBlocked);
+    std::shared_ptr<DBContactBlock> msg =
+        std::make_shared<DBContactBlock>(MessageType::DBContactBlock, id, shouldBeBlocked);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
 
 uint32_t DBServiceAPI::ContactGetCount(sys::Service *serv, bool favourites)
 {
-    std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetCount, ContactRecord{}, favourites);
+    std::shared_ptr<DBContactMessage> msg =
+        std::make_shared<DBContactMessage>(MessageType::DBContactGetCount, ContactRecord{}, favourites);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return contactResponse->count;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -476,9 +438,10 @@ uint32_t DBServiceAPI::ContactGetCount(sys::Service *serv, bool favourites)
 // std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactGetLimitOffset(sys::Service *serv, uint32_t offset,
 bool DBServiceAPI::ContactGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit, bool favourites)
 {
-    std::shared_ptr<DBContactMessage> msg = std::make_shared<DBContactMessage>(MessageType::DBContactGetLimitOffset, ContactRecord{}, favourites);
+    std::shared_ptr<DBContactMessage> msg =
+        std::make_shared<DBContactMessage>(MessageType::DBContactGetLimitOffset, ContactRecord{}, favourites);
     msg->offset = offset;
-    msg->limit = limit;
+    msg->limit  = limit;
 
     //    auto ret = sys::Bus::SendUnicast(msg,ServiceDB::serviceName,serv,5000);
     //    DBContactResponseMessage* contactResponse = reinterpret_cast<DBContactResponseMessage*>(ret.second.get());
@@ -497,20 +460,23 @@ bool DBServiceAPI::ContactGetLimitOffset(sys::Service *serv, uint32_t offset, ui
     return true;
 }
 
-std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactSearch(sys::Service *serv, UTF8 primaryName, UTF8 alternativeName, UTF8 number)
+std::unique_ptr<std::vector<ContactRecord>> DBServiceAPI::ContactSearch(sys::Service *serv,
+                                                                        UTF8 primaryName,
+                                                                        UTF8 alternativeName,
+                                                                        UTF8 number)
 {
     std::shared_ptr<DBContactSearchMessage> msg =
-        std::make_shared<DBContactSearchMessage>(MessageType::DBContactSearch, (primaryName.length() > 0) ? primaryName.c_str() : "",
-                                                 (alternativeName.length() > 0) ? alternativeName.c_str() : "", (number.length() > 0) ? number.c_str() : "");
+        std::make_shared<DBContactSearchMessage>(MessageType::DBContactSearch,
+                                                 (primaryName.length() > 0) ? primaryName.c_str() : "",
+                                                 (alternativeName.length() > 0) ? alternativeName.c_str() : "",
+                                                 (number.length() > 0) ? number.c_str() : "");
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBContactResponseMessage *contactResponse = reinterpret_cast<DBContactResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (contactResponse->retCode == true)) {
         return std::move(contactResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<ContactRecord>>();
     }
 }
@@ -519,14 +485,12 @@ bool DBServiceAPI::AlarmAdd(sys::Service *serv, const AlarmsRecord &rec)
 {
     std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmAdd, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -534,16 +498,14 @@ bool DBServiceAPI::AlarmAdd(sys::Service *serv, const AlarmsRecord &rec)
 bool DBServiceAPI::AlarmRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmRemove);
-    msg->id = id;
+    msg->id                             = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -552,14 +514,12 @@ bool DBServiceAPI::AlarmUpdate(sys::Service *serv, const AlarmsRecord &rec)
 {
     std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmUpdate, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -568,32 +528,30 @@ uint32_t DBServiceAPI::AlarmGetCount(sys::Service *serv)
 {
     std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmGetCount);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return alarmResponse->count;
     }
-    else
-    {
+    else {
         return false;
     }
 }
 
-std::unique_ptr<std::vector<AlarmsRecord>> DBServiceAPI::AlarmGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit)
+std::unique_ptr<std::vector<AlarmsRecord>> DBServiceAPI::AlarmGetLimitOffset(sys::Service *serv,
+                                                                             uint32_t offset,
+                                                                             uint32_t limit)
 {
     std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmGetLimitOffset);
-    msg->offset = offset;
-    msg->limit = limit;
+    msg->offset                         = offset;
+    msg->limit                          = limit;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return std::move(alarmResponse->records);
     }
-    else
-    {
+    else {
         return std::make_unique<std::vector<AlarmsRecord>>();
     }
 }
@@ -601,16 +559,14 @@ std::unique_ptr<std::vector<AlarmsRecord>> DBServiceAPI::AlarmGetLimitOffset(sys
 AlarmsRecord DBServiceAPI::AlarmGetNext(sys::Service *serv, time_t time)
 {
 
-    std::shared_ptr<DBAlarmMessage> msg = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmGetNext);
-    msg->time = time;
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    std::shared_ptr<DBAlarmMessage> msg   = std::make_shared<DBAlarmMessage>(MessageType::DBAlarmGetNext);
+    msg->time                             = time;
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBAlarmResponseMessage *alarmResponse = reinterpret_cast<DBAlarmResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (alarmResponse->retCode == true)) {
         return std::move((*alarmResponse->records)[0]);
     }
-    else
-    {
+    else {
         return AlarmsRecord{};
     }
 }
@@ -619,14 +575,12 @@ bool DBServiceAPI::NotesAdd(sys::Service *serv, const NotesRecord &rec)
 {
     std::shared_ptr<DBNotesMessage> msg = std::make_shared<DBNotesMessage>(MessageType::DBNotesAdd, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBNotesResponseMessage *notesResponse = reinterpret_cast<DBNotesResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -634,16 +588,14 @@ bool DBServiceAPI::NotesAdd(sys::Service *serv, const NotesRecord &rec)
 bool DBServiceAPI::NotesRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBNotesMessage> msg = std::make_shared<DBNotesMessage>(MessageType::DBNotesRemove);
-    msg->id = id;
+    msg->id                             = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBNotesResponseMessage *notesResponse = reinterpret_cast<DBNotesResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -652,14 +604,12 @@ bool DBServiceAPI::NotesUpdate(sys::Service *serv, const NotesRecord &rec)
 {
     std::shared_ptr<DBNotesMessage> msg = std::make_shared<DBNotesMessage>(MessageType::DBNotesUpdate, rec);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBNotesResponseMessage *notesResponse = reinterpret_cast<DBNotesResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -668,14 +618,12 @@ uint32_t DBServiceAPI::NotesGetCount(sys::Service *serv)
 {
     std::shared_ptr<DBNotesMessage> msg = std::make_shared<DBNotesMessage>(MessageType::DBNotesGetCount);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                              = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBNotesResponseMessage *notesResponse = reinterpret_cast<DBNotesResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (notesResponse->retCode == true)) {
         return notesResponse->count;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -683,8 +631,8 @@ uint32_t DBServiceAPI::NotesGetCount(sys::Service *serv)
 bool DBServiceAPI::NotesGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit)
 {
     std::shared_ptr<DBNotesMessage> msg = std::make_shared<DBNotesMessage>(MessageType::DBNotesGetLimitOffset);
-    msg->offset = offset;
-    msg->limit = limit;
+    msg->offset                         = offset;
+    msg->limit                          = limit;
 
     sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv);
     return true;
@@ -696,13 +644,11 @@ CalllogRecord DBServiceAPI::CalllogAdd(sys::Service *serv, const CalllogRecord &
 
     LOG_DEBUG("CalllogAdd %s", utils::to_string(rec).c_str());
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBCalllogResponseMessage *calllogResponse = reinterpret_cast<DBCalllogResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true)) {
         auto records = *calllogResponse->records;
-        if (!records.empty())
-        {
+        if (!records.empty()) {
             return records[0];
         }
     }
@@ -713,16 +659,14 @@ CalllogRecord DBServiceAPI::CalllogAdd(sys::Service *serv, const CalllogRecord &
 bool DBServiceAPI::CalllogRemove(sys::Service *serv, uint32_t id)
 {
     std::shared_ptr<DBCalllogMessage> msg = std::make_shared<DBCalllogMessage>(MessageType::DBCalllogRemove);
-    msg->id = id;
+    msg->id                               = id;
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBCalllogResponseMessage *calllogResponse = reinterpret_cast<DBCalllogResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -733,14 +677,12 @@ bool DBServiceAPI::CalllogUpdate(sys::Service *serv, const CalllogRecord &rec)
 
     LOG_DEBUG("CalllogUpdate %s", utils::to_string(rec).c_str());
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBCalllogResponseMessage *calllogResponse = reinterpret_cast<DBCalllogResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true)) {
         return true;
     }
-    else
-    {
+    else {
         return false;
     }
 }
@@ -749,14 +691,12 @@ uint32_t DBServiceAPI::CalllogGetCount(sys::Service *serv, EntryState state)
 {
     std::shared_ptr<DBCalllogMessage> msg = std::make_shared<DBCalllogGetCount>(state);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                                  = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBCalllogResponseMessage *calllogResponse = reinterpret_cast<DBCalllogResponseMessage *>(ret.second.get());
-    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true))
-    {
+    if ((ret.first == sys::ReturnCodes::Success) && (calllogResponse->retCode == true)) {
         return calllogResponse->count;
     }
-    else
-    {
+    else {
         return 0;
     }
 }
@@ -764,8 +704,8 @@ uint32_t DBServiceAPI::CalllogGetCount(sys::Service *serv, EntryState state)
 bool DBServiceAPI::CalllogGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit)
 {
     std::shared_ptr<DBCalllogMessage> msg = std::make_shared<DBCalllogMessage>(MessageType::DBCalllogGetLimitOffset);
-    msg->offset = offset;
-    msg->limit = limit;
+    msg->offset                           = offset;
+    msg->limit                            = limit;
 
     sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv);
     return true;
@@ -774,16 +714,14 @@ bool DBServiceAPI::CalllogGetLimitOffset(sys::Service *serv, uint32_t offset, ui
 uint32_t DBServiceAPI::GetCountryCodeByMCC(sys::Service *serv, uint32_t mcc)
 {
     std::shared_ptr<DBCountryCodeMessage> msg =
-            std::make_shared<DBCountryCodeMessage>(MessageType::DBCountryCode, mcc, 0);
+        std::make_shared<DBCountryCodeMessage>(MessageType::DBCountryCode, mcc, 0);
 
-    auto ret = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
+    auto ret                               = sys::Bus::SendUnicast(msg, ServiceDB::serviceName, serv, 5000);
     DBCountryCodeResponseMessage *response = reinterpret_cast<DBCountryCodeResponseMessage *>(ret.second.get());
-    if (ret.first == sys::ReturnCodes::Success)
-    {
+    if (ret.first == sys::ReturnCodes::Success) {
         return (response->row.country_code);
     }
-    else
-    {
+    else {
         return (0);
     }
 }
diff --git a/module-services/service-db/api/DBServiceAPI.hpp b/module-services/service-db/api/DBServiceAPI.hpp
index a0512182d..cc1c79ae4 100644
--- a/module-services/service-db/api/DBServiceAPI.hpp
+++ b/module-services/service-db/api/DBServiceAPI.hpp
@@ -23,7 +23,7 @@
 class DBServiceAPI
 {
   public:
-  	enum ContactVerificationError
+    enum ContactVerificationError
     {
         nameError,
         speedDialError,
@@ -43,8 +43,13 @@ class DBServiceAPI
     static uint32_t SMSAdd(sys::Service *serv, const SMSRecord &rec);
     static bool SMSRemove(sys::Service *serv, uint32_t id);
     static bool SMSUpdate(sys::Service *serv, const SMSRecord &rec);
-    static std::unique_ptr<std::vector<SMSRecord>> SMSGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit);
-    static std::unique_ptr<std::vector<SMSRecord>> SMSGetLimitOffsetByThreadID(sys::Service *serv, uint32_t offset, uint32_t limit, uint32_t id);
+    static std::unique_ptr<std::vector<SMSRecord>> SMSGetLimitOffset(sys::Service *serv,
+                                                                     uint32_t offset,
+                                                                     uint32_t limit);
+    static std::unique_ptr<std::vector<SMSRecord>> SMSGetLimitOffsetByThreadID(sys::Service *serv,
+                                                                               uint32_t offset,
+                                                                               uint32_t limit,
+                                                                               uint32_t id);
     static uint32_t SMSGetCount(sys::Service *serv, EntryState state = EntryState::ALL);
     /**
      * @brief Function is getting last modified SMS record.
@@ -65,15 +70,22 @@ class DBServiceAPI
      * @param rec Reference to the contact to be added to database.
      * @param errName in case of existing contact with same name this record will be filled with data.
      * @param errName in case of existing contact with same primary phone number this record will be filled with data.
-     * @param errName in case of existing contact with same alternative phone number this record will be filled with data.
+     * @param errName in case of existing contact with same alternative phone number this record will be filled with
+     * data.
      * @param errName in case of existing contact with same speed dial assigned this record will be filled with data.
      *
      * @note This function is blocking. It's checking until first error.
      */
-    static ContactVerificationError verifyContact(sys::Service *serv, const ContactRecord &rec, ContactRecord &errName, ContactRecord &errPhone1,
-                                                  ContactRecord &errPhone2, ContactRecord &speedDial);
+    static ContactVerificationError verifyContact(sys::Service *serv,
+                                                  const ContactRecord &rec,
+                                                  ContactRecord &errName,
+                                                  ContactRecord &errPhone1,
+                                                  ContactRecord &errPhone2,
+                                                  ContactRecord &speedDial);
     static std::string getVerificationErrorString(const ContactVerificationError err);
-    static std::unique_ptr<std::vector<ContactRecord>> ContactGetByName(sys::Service *serv, UTF8 primaryName, UTF8 alternativeName);
+    static std::unique_ptr<std::vector<ContactRecord>> ContactGetByName(sys::Service *serv,
+                                                                        UTF8 primaryName,
+                                                                        UTF8 alternativeName);
     static std::unique_ptr<std::vector<ContactRecord>> ContactGetByID(sys::Service *serv, uint32_t contactID);
     static std::unique_ptr<std::vector<ContactRecord>> ContactGetBySpeeddial(sys::Service *serv, uint8_t speeddial);
     static std::unique_ptr<std::vector<ContactRecord>> ContactGetByPhoneNumber(sys::Service *serv, UTF8 phoneNumber);
@@ -83,12 +95,17 @@ class DBServiceAPI
     static bool ContactBlock(sys::Service *serv, uint32_t id, const bool shouldBeBlocked = true);
     static uint32_t ContactGetCount(sys::Service *serv, bool favourites = false);
     static bool ContactGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit, bool favourites = false);
-    static std::unique_ptr<std::vector<ContactRecord>> ContactSearch(sys::Service *serv, UTF8 primaryName, UTF8 alternativeName, UTF8 number);
+    static std::unique_ptr<std::vector<ContactRecord>> ContactSearch(sys::Service *serv,
+                                                                     UTF8 primaryName,
+                                                                     UTF8 alternativeName,
+                                                                     UTF8 number);
     static bool AlarmAdd(sys::Service *serv, const AlarmsRecord &rec);
     static bool AlarmRemove(sys::Service *serv, uint32_t id);
     static bool AlarmUpdate(sys::Service *serv, const AlarmsRecord &rec);
     static uint32_t AlarmGetCount(sys::Service *serv);
-    static std::unique_ptr<std::vector<AlarmsRecord>> AlarmGetLimitOffset(sys::Service *serv, uint32_t offset, uint32_t limit);
+    static std::unique_ptr<std::vector<AlarmsRecord>> AlarmGetLimitOffset(sys::Service *serv,
+                                                                          uint32_t offset,
+                                                                          uint32_t limit);
     static AlarmsRecord AlarmGetNext(sys::Service *serv, time_t time);
 
     static bool NotesAdd(sys::Service *serv, const NotesRecord &rec);
diff --git a/module-services/service-db/messages/DBMessage.hpp b/module-services/service-db/messages/DBMessage.hpp
index 543af2323..c92dadb0c 100644
--- a/module-services/service-db/messages/DBMessage.hpp
+++ b/module-services/service-db/messages/DBMessage.hpp
@@ -30,9 +30,9 @@ class DBMessage : public sys::DataMessage
     DBMessage(MessageType messageType) : sys::DataMessage(messageType){};
     virtual ~DBMessage(){};
 
-    uint32_t id = 0;
+    uint32_t id     = 0;
     uint32_t offset = 0;
-    uint32_t limit = 0;
+    uint32_t limit  = 0;
 };
 
 class DBResponseMessage : public sys::ResponseMessage
@@ -49,12 +49,11 @@ class DBResponseMessage : public sys::ResponseMessage
 class DBSettingsMessage : public DBMessage
 {
   public:
-    DBSettingsMessage(MessageType messageType, const SettingsRecord &rec = SettingsRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    DBSettingsMessage(MessageType messageType, const SettingsRecord &rec = SettingsRecord{})
+        : DBMessage(messageType), record(rec)
+    {}
     virtual ~DBSettingsMessage()
-    {
-    }
+    {}
 
     SettingsRecord record;
 };
@@ -62,7 +61,10 @@ class DBSettingsMessage : public DBMessage
 class DBSettingsResponseMessage : public DBResponseMessage
 {
   public:
-    DBSettingsResponseMessage(const SettingsRecord &rec, uint32_t retCode = 0, uint32_t count = 0, MessageType respTo = MessageType::MessageTypeUninitialized)
+    DBSettingsResponseMessage(const SettingsRecord &rec,
+                              uint32_t retCode   = 0,
+                              uint32_t count     = 0,
+                              MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), record(rec){};
     virtual ~DBSettingsResponseMessage(){};
 
@@ -73,11 +75,9 @@ class DBSMSMessage : public DBMessage
 {
   public:
     DBSMSMessage(MessageType messageType, const SMSRecord &rec = SMSRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    {}
     virtual ~DBSMSMessage()
-    {
-    }
+    {}
 
     SMSRecord record;
 };
@@ -87,14 +87,15 @@ class DBSMSGetCount : public DBSMSMessage
   public:
     EntryState state;
     DBSMSGetCount(EntryState state = EntryState::ALL) : DBSMSMessage(MessageType::DBSMSGetCount), state(state)
-    {
-    }
+    {}
 };
 
 class DBSMSResponseMessage : public DBResponseMessage
 {
   public:
-    DBSMSResponseMessage(std::unique_ptr<std::vector<SMSRecord>> rec, uint32_t retCode = 0, uint32_t count = 0,
+    DBSMSResponseMessage(std::unique_ptr<std::vector<SMSRecord>> rec,
+                         uint32_t retCode   = 0,
+                         uint32_t count     = 0,
                          MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), records(std::move(rec)){};
     virtual ~DBSMSResponseMessage(){};
@@ -105,12 +106,11 @@ class DBSMSResponseMessage : public DBResponseMessage
 class DBThreadMessage : public DBMessage
 {
   public:
-    DBThreadMessage(MessageType messageType, const ThreadRecord &rec = ThreadRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    DBThreadMessage(MessageType messageType, const ThreadRecord &rec = ThreadRecord{})
+        : DBMessage(messageType), record(rec)
+    {}
     virtual ~DBThreadMessage()
-    {
-    }
+    {}
 
     ThreadRecord record;
 };
@@ -119,8 +119,7 @@ class DBThreadMessageGet : public DBMessage
 {
   public:
     DBThreadMessageGet(MessageType messageType, uint32_t contactID) : DBMessage(messageType), contactID(contactID)
-    {
-    }
+    {}
     virtual ~DBThreadMessageGet() = default;
 
     ThreadRecord record = {};
@@ -130,7 +129,11 @@ class DBThreadMessageGet : public DBMessage
 class DBThreadResponseMessage : public DBResponseMessage
 {
   public:
-    DBThreadResponseMessage(std::unique_ptr<std::vector<ThreadRecord>> rec, uint32_t retCode = 0, uint32_t limit = 0, uint32_t offset = 0, uint32_t count = 0,
+    DBThreadResponseMessage(std::unique_ptr<std::vector<ThreadRecord>> rec,
+                            uint32_t retCode   = 0,
+                            uint32_t limit     = 0,
+                            uint32_t offset    = 0,
+                            uint32_t count     = 0,
                             MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), records(std::move(rec)), limit(limit), offset(offset)
     {
@@ -139,7 +142,7 @@ class DBThreadResponseMessage : public DBResponseMessage
     virtual ~DBThreadResponseMessage(){};
 
     std::unique_ptr<std::vector<ThreadRecord>> records;
-    uint32_t limit = 0;
+    uint32_t limit  = 0;
     uint32_t offset = 0;
 };
 
@@ -148,11 +151,9 @@ class DBContactMessage : public DBMessage
   public:
     DBContactMessage(MessageType messageType, const ContactRecord &rec = ContactRecord{}, bool favourite = false)
         : DBMessage(messageType), record(rec), favourite{favourite}
-    {
-    }
+    {}
     virtual ~DBContactMessage()
-    {
-    }
+    {}
 
     ContactRecord record;
     bool favourite = false;
@@ -163,11 +164,9 @@ class DBContactBlock : public DBMessage
   public:
     DBContactBlock(MessageType messageType, const uint32_t _id, bool _shouldBeBlocked)
         : DBMessage(messageType), id(_id), shouldBeBlocked(_shouldBeBlocked)
-    {
-    }
+    {}
     virtual ~DBContactBlock()
-    {
-    }
+    {}
 
     uint32_t id;
     bool shouldBeBlocked;
@@ -176,15 +175,15 @@ class DBContactBlock : public DBMessage
 class DBContactSearchMessage : public DBMessage
 {
   public:
-    DBContactSearchMessage(MessageType messageType, const char *_primaryName, const char *_alternativeName,
+    DBContactSearchMessage(MessageType messageType,
+                           const char *_primaryName,
+                           const char *_alternativeName,
                            const char *_number)
         : DBMessage(messageType), primaryName(_primaryName), alternativeName(_alternativeName), number(_number)
-    {
-    }
+    {}
 
     virtual ~DBContactSearchMessage()
-    {
-    }
+    {}
 
     const char *primaryName;
     const char *alternativeName;
@@ -194,23 +193,29 @@ class DBContactSearchMessage : public DBMessage
 class DBContactResponseMessage : public DBResponseMessage
 {
   public:
-    DBContactResponseMessage(std::unique_ptr<std::vector<ContactRecord>> rec, uint32_t retCode = 0, uint32_t limit = 0, uint32_t offset = 0,
-                             bool favourite = false, uint32_t count = 0, MessageType respTo = MessageType::MessageTypeUninitialized)
-        : DBResponseMessage(retCode, count, respTo), records(std::move(rec)), favourite{favourite}, limit{limit}, offset{offset} {};
+    DBContactResponseMessage(std::unique_ptr<std::vector<ContactRecord>> rec,
+                             uint32_t retCode   = 0,
+                             uint32_t limit     = 0,
+                             uint32_t offset    = 0,
+                             bool favourite     = false,
+                             uint32_t count     = 0,
+                             MessageType respTo = MessageType::MessageTypeUninitialized)
+        : DBResponseMessage(retCode, count, respTo),
+          records(std::move(rec)), favourite{favourite}, limit{limit}, offset{offset} {};
     virtual ~DBContactResponseMessage(){};
 
     std::unique_ptr<std::vector<ContactRecord>> records;
-    bool favourite = false;
-    uint32_t limit = 0;
+    bool favourite  = false;
+    uint32_t limit  = 0;
     uint32_t offset = 0;
 };
 
 class DBAlarmMessage : public DBMessage
 {
   public:
-    DBAlarmMessage(MessageType messageType, const AlarmsRecord &rec = AlarmsRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    DBAlarmMessage(MessageType messageType, const AlarmsRecord &rec = AlarmsRecord{})
+        : DBMessage(messageType), record(rec)
+    {}
     virtual ~DBAlarmMessage(){};
     AlarmsRecord record;
     time_t time = 0;
@@ -219,7 +224,9 @@ class DBAlarmMessage : public DBMessage
 class DBAlarmResponseMessage : public DBResponseMessage
 {
   public:
-    DBAlarmResponseMessage(std::unique_ptr<std::vector<AlarmsRecord>> rec, uint32_t retCode = 0, uint32_t count = 0,
+    DBAlarmResponseMessage(std::unique_ptr<std::vector<AlarmsRecord>> rec,
+                           uint32_t retCode   = 0,
+                           uint32_t count     = 0,
                            MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), records(std::move(rec)){};
     virtual ~DBAlarmResponseMessage(){};
@@ -230,12 +237,11 @@ class DBAlarmResponseMessage : public DBResponseMessage
 class DBNotesMessage : public DBMessage
 {
   public:
-    DBNotesMessage(MessageType messageType, const NotesRecord &rec = NotesRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    DBNotesMessage(MessageType messageType, const NotesRecord &rec = NotesRecord{})
+        : DBMessage(messageType), record(rec)
+    {}
     virtual ~DBNotesMessage()
-    {
-    }
+    {}
 
     NotesRecord record;
 };
@@ -243,7 +249,11 @@ class DBNotesMessage : public DBMessage
 class DBNotesResponseMessage : public DBResponseMessage
 {
   public:
-    DBNotesResponseMessage(std::unique_ptr<std::vector<NotesRecord>> rec, uint32_t retCode = 0, uint32_t limit = 0, uint32_t offset = 0, uint32_t count = 0,
+    DBNotesResponseMessage(std::unique_ptr<std::vector<NotesRecord>> rec,
+                           uint32_t retCode   = 0,
+                           uint32_t limit     = 0,
+                           uint32_t offset    = 0,
+                           uint32_t count     = 0,
                            MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), records(std::move(rec)), limit(limit), offset(offset)
     {
@@ -252,19 +262,18 @@ class DBNotesResponseMessage : public DBResponseMessage
     virtual ~DBNotesResponseMessage(){};
 
     std::unique_ptr<std::vector<NotesRecord>> records;
-    uint32_t limit = 0;
+    uint32_t limit  = 0;
     uint32_t offset = 0;
 };
 
 class DBCalllogMessage : public DBMessage
 {
   public:
-    DBCalllogMessage(MessageType messageType, const CalllogRecord &rec = CalllogRecord{}) : DBMessage(messageType), record(rec)
-    {
-    }
+    DBCalllogMessage(MessageType messageType, const CalllogRecord &rec = CalllogRecord{})
+        : DBMessage(messageType), record(rec)
+    {}
     virtual ~DBCalllogMessage()
-    {
-    }
+    {}
 
     CalllogRecord record;
 };
@@ -274,14 +283,17 @@ class DBCalllogGetCount : public DBCalllogMessage
   public:
     EntryState state;
     DBCalllogGetCount(EntryState state) : DBCalllogMessage(MessageType::DBCalllogGetCount), state(state)
-    {
-    }
+    {}
 };
 
 class DBCalllogResponseMessage : public DBResponseMessage
 {
   public:
-    DBCalllogResponseMessage(std::unique_ptr<std::vector<CalllogRecord>> rec, uint32_t retCode, uint32_t limit = 0, uint32_t offset = 0, uint32_t count = 0,
+    DBCalllogResponseMessage(std::unique_ptr<std::vector<CalllogRecord>> rec,
+                             uint32_t retCode,
+                             uint32_t limit     = 0,
+                             uint32_t offset    = 0,
+                             uint32_t count     = 0,
                              MessageType respTo = MessageType::MessageTypeUninitialized)
         : DBResponseMessage(retCode, count, respTo), records(std::move(rec)), limit(limit), offset(offset)
     {
@@ -290,7 +302,7 @@ class DBCalllogResponseMessage : public DBResponseMessage
     virtual ~DBCalllogResponseMessage(){};
 
     std::unique_ptr<std::vector<CalllogRecord>> records;
-    uint32_t limit = 0;
+    uint32_t limit  = 0;
     uint32_t offset = 0;
 };
 
@@ -299,11 +311,9 @@ class DBCountryCodeMessage : public DBMessage
   public:
     DBCountryCodeMessage(MessageType messageType, const uint32_t _mcc, const uint32_t _country_code)
         : DBMessage(messageType), mcc(_mcc), country_code(_country_code)
-    {
-    }
+    {}
     virtual ~DBCountryCodeMessage()
-    {
-    }
+    {}
 
     uint32_t mcc;
     uint32_t country_code;
@@ -312,8 +322,11 @@ class DBCountryCodeMessage : public DBMessage
 class DBCountryCodeResponseMessage : public DBResponseMessage
 {
   public:
-    DBCountryCodeResponseMessage(const CodesTableRow _row, bool retCode = true, int count = 0, MessageType respTo = MessageType::MessageTypeUninitialized)
-    : DBResponseMessage(retCode, count, respTo), row(_row) {};
+    DBCountryCodeResponseMessage(const CodesTableRow _row,
+                                 bool retCode       = true,
+                                 int count          = 0,
+                                 MessageType respTo = MessageType::MessageTypeUninitialized)
+        : DBResponseMessage(retCode, count, respTo), row(_row){};
     virtual ~DBCountryCodeResponseMessage(){};
 
     CodesTableRow row;
diff --git a/module-services/service-db/messages/DBNotificationMessage.hpp b/module-services/service-db/messages/DBNotificationMessage.hpp
index fec4abdee..62ded84fe 100644
--- a/module-services/service-db/messages/DBNotificationMessage.hpp
+++ b/module-services/service-db/messages/DBNotificationMessage.hpp
@@ -13,7 +13,8 @@
 #include "Service/Message.hpp"
 #include <memory>
 
-namespace DB{
+namespace DB
+{
     enum class NotificationType
     {
         Updated,
@@ -29,16 +30,16 @@ namespace DB{
         SettingsDB,
         SmsDB
     };
-}
+} // namespace DB
 class DBNotificationMessage : public sys::DataMessage
 {
-public:
-  DBNotificationMessage(MessageType messageType, DB::NotificationType notificationType, DB::BaseType baseType)
-      : sys::DataMessage(messageType), notificationType(notificationType), baseType(baseType){};
-  ~DBNotificationMessage() override = default;
+  public:
+    DBNotificationMessage(MessageType messageType, DB::NotificationType notificationType, DB::BaseType baseType)
+        : sys::DataMessage(messageType), notificationType(notificationType), baseType(baseType){};
+    ~DBNotificationMessage() override = default;
 
-  DB::NotificationType notificationType;
-  DB::BaseType baseType;
+    DB::NotificationType notificationType;
+    DB::BaseType baseType;
 };
 
 class DBNotificationResponseMessage : public sys::ResponseMessage
diff --git a/module-services/service-desktop/ServiceDesktop.cpp b/module-services/service-desktop/ServiceDesktop.cpp
index 8e4db3150..eddb740f4 100644
--- a/module-services/service-desktop/ServiceDesktop.cpp
+++ b/module-services/service-desktop/ServiceDesktop.cpp
@@ -11,8 +11,7 @@ ServiceDesktop::~ServiceDesktop()
 {
 
     LOG_INFO("[ServiceDesktop] Cleaning resources");
-    if (DesktopWorker != nullptr)
-    {
+    if (DesktopWorker != nullptr) {
         DesktopWorker->deinit();
     }
 }
@@ -21,8 +20,8 @@ sys::ReturnCodes ServiceDesktop::InitHandler()
 {
 
     DesktopWorker = std::make_unique<WorkerDesktop>(this);
-    DesktopWorker->init(
-        {{DesktopWorker->RECEIVE_QUEUE_BUFFER_NAME, sizeof(std::string), 1}, {DesktopWorker->SEND_QUEUE_BUFFER_NAME, sizeof(std::string *), 10}});
+    DesktopWorker->init({{DesktopWorker->RECEIVE_QUEUE_BUFFER_NAME, sizeof(std::string), 1},
+                         {DesktopWorker->SEND_QUEUE_BUFFER_NAME, sizeof(std::string *), 10}});
     DesktopWorker->run();
 
     return (sys::ReturnCodes::Success);
diff --git a/module-services/service-desktop/ServiceDesktop.hpp b/module-services/service-desktop/ServiceDesktop.hpp
index 9076a0ca6..4c0ced359 100644
--- a/module-services/service-desktop/ServiceDesktop.hpp
+++ b/module-services/service-desktop/ServiceDesktop.hpp
@@ -34,6 +34,12 @@ class ServiceDesktop : public sys::Service
 
     sys::Message_t DataReceivedHandler(sys::DataMessage *msg, sys::ResponseMessage *resp) override;
 
-    void updateOs(bool update = false) { isOsUpdating = update; }
-    bool isUpdating() { return (isOsUpdating); }
+    void updateOs(bool update = false)
+    {
+        isOsUpdating = update;
+    }
+    bool isUpdating()
+    {
+        return (isOsUpdating);
+    }
 };
diff --git a/module-services/service-desktop/WorkerDesktop.cpp b/module-services/service-desktop/WorkerDesktop.cpp
index 00aeaf74e..0b8ee76fa 100644
--- a/module-services/service-desktop/WorkerDesktop.cpp
+++ b/module-services/service-desktop/WorkerDesktop.cpp
@@ -11,26 +11,22 @@ bool WorkerDesktop::handleMessage(uint32_t queueID)
     static std::string receiveMsg;
     static std::string *sendMsg;
 
-    if (qname == SERVICE_QUEUE_NAME)
-    {
+    if (qname == SERVICE_QUEUE_NAME) {
         LOG_ERROR("[ServiceDesktop:Worker] Service Queue invoked but not implemented!");
     }
 
-    if (qname == RECEIVE_QUEUE_BUFFER_NAME)
-    {
+    if (qname == RECEIVE_QUEUE_BUFFER_NAME) {
         if (xQueueReceive(queue, &receiveMsg, 0) != pdTRUE)
             return false;
 
         ParserFsm::msgChunk.assign(receiveMsg.begin(), receiveMsg.end());
-        while (!ParserFsm::msgChunk.empty())
-        {
+        while (!ParserFsm::msgChunk.empty()) {
             send_event(MessageDataEvt(service));
         }
     }
 
     // TODO: Consider moving sendBuffer receive to bsp driver
-    if (qname == SEND_QUEUE_BUFFER_NAME)
-    {
+    if (qname == SEND_QUEUE_BUFFER_NAME) {
         if (xQueueReceive(queue, &sendMsg, 0) != pdTRUE)
             return false;
 
@@ -44,16 +40,13 @@ bool WorkerDesktop::init(std::list<sys::WorkerQueueInfo> queues)
 {
     Worker::init(queues);
 
-    if ((bsp::usbCDCInit(Worker::getQueueByName("receiveQueueBuffer")) < 0))
-    {
+    if ((bsp::usbCDCInit(Worker::getQueueByName("receiveQueueBuffer")) < 0)) {
         LOG_ERROR("won't start desktop service without serial port");
         return false;
     }
 
     EndpointFsm::sendQueue = Worker::getQueueByName("sendQueueBuffer");
 
-
-
     fsm_list::start();
 
     return true;
diff --git a/module-services/service-desktop/WorkerDesktop.hpp b/module-services/service-desktop/WorkerDesktop.hpp
index 1988210b0..e942e6101 100644
--- a/module-services/service-desktop/WorkerDesktop.hpp
+++ b/module-services/service-desktop/WorkerDesktop.hpp
@@ -20,7 +20,7 @@ class WorkerDesktop : public sys::Worker
   private:
   public:
     const std::string RECEIVE_QUEUE_BUFFER_NAME = "receiveQueueBuffer";
-    const std::string SEND_QUEUE_BUFFER_NAME = "sendQueueBuffer";
+    const std::string SEND_QUEUE_BUFFER_NAME    = "sendQueueBuffer";
 
     WorkerDesktop(sys::Service *ownerServicePtr) : sys::Worker(ownerServicePtr), ownerService(ownerServicePtr){};
     virtual bool init(std::list<sys::WorkerQueueInfo> queues) override;
diff --git a/module-services/service-desktop/endpoints/DeviceInfo.cpp b/module-services/service-desktop/endpoints/DeviceInfo.cpp
index f0558e44b..a559fec7d 100644
--- a/module-services/service-desktop/endpoints/DeviceInfo.cpp
+++ b/module-services/service-desktop/endpoints/DeviceInfo.cpp
@@ -8,44 +8,42 @@
 #include <time/time_conversion.hpp>
 #include "../ServiceDesktop.hpp"
 
-time_t FreeRTOS_time( time_t *pxTime )
+time_t FreeRTOS_time(time_t *pxTime)
 {
     return utils::time::Time().getTime();
 }
 
-sys::ReturnCodes EndpointHandler::deviceInfo(uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService)
+sys::ReturnCodes EndpointHandler::deviceInfo(
+    uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService)
 {
-    if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::get))
-    {
+    if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::get)) {
         vfs::FilesystemStats fsStats = vfs.getFilesystemStats();
 
-        json11::Json responseBodyJson = json11::Json::object({
-                                                                 { parserutils::json::batteryLevel, std::to_string(Store::Battery::get().level)},
-                                                                 { parserutils::json::batteryState, std::to_string(static_cast<int>(Store::Battery::get().state))},
-                                                                 { parserutils::json::selectedSim , std::to_string(static_cast<int>(Store::GSM::get()->selected))},
-                                                                 { parserutils::json::trayState, std::to_string(static_cast<int>(Store::GSM::get()->tray))},
-                                                                 { parserutils::json::fsTotal, std::to_string(fsStats.totalMbytes) },
-                                                                 { parserutils::json::fsFree,  std::to_string(fsStats.freeMbytes) },
-                                                                 { parserutils::json::fsFreePercent,  std::to_string(fsStats.freePercent) },
-                                                                 { parserutils::json::gitRevision, (std::string)(GIT_REV) },
-                                                                 { parserutils::json::gitTag, (std::string)GIT_TAG},
-                                                                 { parserutils::json::gitBranch, (std::string)GIT_BRANCH},
-                                                                 { parserutils::json::currentRTCTime, std::to_string(static_cast<uint32_t>(utils::time::Time().getTime()))}
-                                                             });
+        json11::Json responseBodyJson = json11::Json::object(
+            {{parserutils::json::batteryLevel, std::to_string(Store::Battery::get().level)},
+             {parserutils::json::batteryState, std::to_string(static_cast<int>(Store::Battery::get().state))},
+             {parserutils::json::selectedSim, std::to_string(static_cast<int>(Store::GSM::get()->selected))},
+             {parserutils::json::trayState, std::to_string(static_cast<int>(Store::GSM::get()->tray))},
+             {parserutils::json::fsTotal, std::to_string(fsStats.totalMbytes)},
+             {parserutils::json::fsFree, std::to_string(fsStats.freeMbytes)},
+             {parserutils::json::fsFreePercent, std::to_string(fsStats.freePercent)},
+             {parserutils::json::gitRevision, (std::string)(GIT_REV)},
+             {parserutils::json::gitTag, (std::string)GIT_TAG},
+             {parserutils::json::gitBranch, (std::string)GIT_BRANCH},
+             {parserutils::json::currentRTCTime,
+              std::to_string(static_cast<uint32_t>(utils::time::Time().getTime()))}});
 
-        json11::Json responsePayloadJson = json11::Json::object({
-                                                                    {parserutils::json::endpoint, static_cast<int>(parserutils::Endpoint::deviceInfo)},
-                                                                    {parserutils::json::status, static_cast<int>(parserutils::http::Code::OK)},
-                                                                    {parserutils::json::uuid, std::to_string(uuid)},
-                                                                    {parserutils::json::body, responseBodyJson}
-                                                                });
+        json11::Json responsePayloadJson =
+            json11::Json::object({{parserutils::json::endpoint, static_cast<int>(parserutils::Endpoint::deviceInfo)},
+                                  {parserutils::json::status, static_cast<int>(parserutils::http::Code::OK)},
+                                  {parserutils::json::uuid, std::to_string(uuid)},
+                                  {parserutils::json::body, responseBodyJson}});
 
         responseStr = EndpointHandler::buildResponseStr(responsePayloadJson.dump().size(), responsePayloadJson.dump());
 
         return sys::ReturnCodes::Success;
     }
-    else
-    {
+    else {
         LOG_ERROR("Incorrect method");
         return sys::ReturnCodes::Failure;
     }
diff --git a/module-services/service-desktop/endpoints/Update.cpp b/module-services/service-desktop/endpoints/Update.cpp
index fc3232695..f70861e3e 100644
--- a/module-services/service-desktop/endpoints/Update.cpp
+++ b/module-services/service-desktop/endpoints/Update.cpp
@@ -8,50 +8,41 @@
 #include "service-cellular/api/CellularServiceAPI.hpp"
 #include "../ServiceDesktop.hpp"
 
-
-sys::ReturnCodes EndpointHandler::update(uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService)
+sys::ReturnCodes EndpointHandler::update(
+    uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService)
 {
-    if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::post))
-    {
+    if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::post)) {
         LOG_INFO("update request");
         uint32_t dataSize = static_cast<uint32_t>(body["fileSize"].number_value());
         LOG_INFO("file name: %s", body["fileName"].string_value().c_str());
         LOG_INFO("file size: %d", dataSize);
 
-        json11::Json responseBodyJson = json11::Json::object({
-                                                                    {"updateReady", true},
-                                                                    { "dataSize",  std::to_string(dataSize)}
-                                                                });
+        json11::Json responseBodyJson =
+            json11::Json::object({{"updateReady", true}, {"dataSize", std::to_string(dataSize)}});
 
-        json11::Json responsePayloadJson = json11::Json::object({
-                                                                    {parserutils::json::endpoint, static_cast<int>(parserutils::Endpoint::update)},
-                                                                    {parserutils::json::status, static_cast<int>(parserutils::http::Code::OK)},
-                                                                    {parserutils::json::uuid, std::to_string(uuid)},
-                                                                    {parserutils::json::body, responseBodyJson}
-                                                                });
+        json11::Json responsePayloadJson =
+            json11::Json::object({{parserutils::json::endpoint, static_cast<int>(parserutils::Endpoint::update)},
+                                  {parserutils::json::status, static_cast<int>(parserutils::http::Code::OK)},
+                                  {parserutils::json::uuid, std::to_string(uuid)},
+                                  {parserutils::json::body, responseBodyJson}});
 
         responseStr = EndpointHandler::buildResponseStr(responsePayloadJson.dump().size(), responsePayloadJson.dump());
 
         ServiceDesktop *service = dynamic_cast<ServiceDesktop *>(ownerService);
-        if (service)
-        {
+        if (service) {
             LOG_INFO("got a pointer to the destkop service, store state");
             service->updateOs(true);
         }
-        else
-        {
+        else {
             LOG_INFO("no valid service handle");
         }
 
         return sys::ReturnCodes::Success;
     }
-    else if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::put))
-    {
+    else if (httpMethod == static_cast<uint8_t>(parserutils::http::Method::put)) {
         ServiceDesktop *service = dynamic_cast<ServiceDesktop *>(ownerService);
-        if (service)
-        {
-            if (service->isUpdating())
-            {
+        if (service) {
+            if (service->isUpdating()) {
                 LOG_INFO("a chunk of an update file");
                 return sys::ReturnCodes::Success;
             }
diff --git a/module-services/service-desktop/parser/EndpointFsm.cpp b/module-services/service-desktop/parser/EndpointFsm.cpp
index 6e10cbfb7..ae78eaaa4 100644
--- a/module-services/service-desktop/parser/EndpointFsm.cpp
+++ b/module-services/service-desktop/parser/EndpointFsm.cpp
@@ -20,8 +20,7 @@ class StateDecodeJson : public EndpointFsm
         std::string errorString;
 
         json11::Json msgJson = json11::Json::parse(ParserFsm::msgPayload, errorString);
-        if (msgJson.is_null())
-        {
+        if (msgJson.is_null()) {
             LOG_ERROR("Can't parse data as JSON [%s]", errorString.c_str());
             return;
         }
@@ -31,15 +30,13 @@ class StateDecodeJson : public EndpointFsm
         body         = msgJson[parserutils::json::body];
         ownerService = msg.ownerService;
 
-        if (!parserutils::http::isMethodValid(method))
-        {
+        if (!parserutils::http::isMethodValid(method)) {
             return;
         }
 
         endpoint = static_cast<parserutils::Endpoint>(msgJson[parserutils::json::endpoint].number_value());
 
-        switch (endpoint)
-        {
+        switch (endpoint) {
         case parserutils::Endpoint::update:
             transit<StateEndpointUpdate>();
             break;
@@ -97,14 +94,12 @@ void EndpointFsm::react(EndpointEvt const &)
 
 bool EndpointFsm::putToSendQueue(std::string sendMsg)
 {
-    if (uxQueueSpacesAvailable(sendQueue) != 0)
-    {
+    if (uxQueueSpacesAvailable(sendQueue) != 0) {
         std::string *responseString = new std::string(sendMsg);
         xQueueSend(sendQueue, &responseString, portMAX_DELAY);
         return true;
     }
-    else
-    {
+    else {
         LOG_DEBUG("Endpoint Send Queue full, response lost");
         return false;
     }
diff --git a/module-services/service-desktop/parser/EndpointFsm.hpp b/module-services/service-desktop/parser/EndpointFsm.hpp
index 8f45ecb88..de89bfd15 100644
--- a/module-services/service-desktop/parser/EndpointFsm.hpp
+++ b/module-services/service-desktop/parser/EndpointFsm.hpp
@@ -16,7 +16,7 @@ extern "C"
 // Event declarations
 //
 
-struct EndpointEvt: tinyfsm::Event
+struct EndpointEvt : tinyfsm::Event
 {
     EndpointEvt(sys::Service *ownerServicePtr) : ownerService(ownerServicePtr){};
     sys::Service *ownerService;
@@ -25,8 +25,7 @@ struct EndpointEvt: tinyfsm::Event
 // ----------------------------------------------------------------------------
 // EndpointFsm (FSM base class) declaration
 //
-class EndpointFsm
-: public tinyfsm::Fsm<EndpointFsm>
+class EndpointFsm : public tinyfsm::Fsm<EndpointFsm>
 {
     friend class Fsm;
 
diff --git a/module-services/service-desktop/parser/EndpointHandler.cpp b/module-services/service-desktop/parser/EndpointHandler.cpp
index 5285bc180..87f909d99 100644
--- a/module-services/service-desktop/parser/EndpointHandler.cpp
+++ b/module-services/service-desktop/parser/EndpointHandler.cpp
@@ -10,11 +10,11 @@
 std::string EndpointHandler::buildResponseStr(std::size_t responseSize, std::string responsePayloadString)
 {
     std::string responsePayloadSizeStr = std::to_string(responseSize);
-    while (responsePayloadSizeStr.length() < parserutils::message::size_length)
-    {
+    while (responsePayloadSizeStr.length() < parserutils::message::size_length) {
         responsePayloadSizeStr.insert(0, 1, '0');
     }
 
-    std::string responseStr = static_cast<char>(parserutils::message::Type::endpoint) + responsePayloadSizeStr + responsePayloadString;
+    std::string responseStr =
+        static_cast<char>(parserutils::message::Type::endpoint) + responsePayloadSizeStr + responsePayloadString;
     return responseStr;
 }
diff --git a/module-services/service-desktop/parser/EndpointHandler.hpp b/module-services/service-desktop/parser/EndpointHandler.hpp
index 8fb2de198..3493a6597 100644
--- a/module-services/service-desktop/parser/EndpointHandler.hpp
+++ b/module-services/service-desktop/parser/EndpointHandler.hpp
@@ -7,8 +7,10 @@
 class EndpointHandler
 {
   public:
-    sys::ReturnCodes update(uint8_t httpMethod, uint32_t uuid, json11::Json &body,std::string &responseStr, sys::Service *ownerService);
-    sys::ReturnCodes deviceInfo(uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService);
+    sys::ReturnCodes update(
+        uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService);
+    sys::ReturnCodes deviceInfo(
+        uint8_t httpMethod, uint32_t uuid, json11::Json &body, std::string &responseStr, sys::Service *ownerService);
 
   private:
     std::string buildResponseStr(std::size_t responseSize, std::string responsePayloadString);
diff --git a/module-services/service-desktop/parser/Fsmlist.hpp b/module-services/service-desktop/parser/Fsmlist.hpp
index 02a778ccb..d4051a680 100644
--- a/module-services/service-desktop/parser/Fsmlist.hpp
+++ b/module-services/service-desktop/parser/Fsmlist.hpp
@@ -8,8 +8,7 @@
 using fsm_list = tinyfsm::FsmList<ParserFsm, EndpointFsm, RawDataFsm>;
 
 /** dispatch event to all FSMs */
-template<typename E>
-void send_event(E const & event)
+template <typename E> void send_event(E const &event)
 {
     fsm_list::template dispatch<E>(event);
 }
diff --git a/module-services/service-desktop/parser/ParserFsm.cpp b/module-services/service-desktop/parser/ParserFsm.cpp
index 83c1f6f62..eb60d549a 100644
--- a/module-services/service-desktop/parser/ParserFsm.cpp
+++ b/module-services/service-desktop/parser/ParserFsm.cpp
@@ -30,8 +30,7 @@ class StateMessageType : public ParserFsm
         msgType = static_cast<parserutils::message::Type>(msgChunk.front());
         msgChunk.pop_front();
 
-        switch (msgType)
-        {
+        switch (msgType) {
         case parserutils::message::Type::endpoint:
         case parserutils::message::Type::rawData:
             transit<StateMessageSize>();
@@ -54,32 +53,26 @@ class StateMessageSize : public ParserFsm
         LOG_DEBUG("*** react MessageSizeEvt ***");
 
         auto processSingleDigit = [this] {
-            if (!isdigit(msgChunk.front()))
-            {
+            if (!isdigit(msgChunk.front())) {
                 msgChunk.pop_front();
                 transit<StateMessageType>();
             }
-            else
-            {
+            else {
                 msgPayloadSizeStr.push_back(msgChunk.front());
                 msgChunk.pop_front();
                 msgSizeBytesToRead--;
             }
         };
 
-        if (msgSizeBytesToRead > msgChunk.size())
-        {
-            while (!msgChunk.empty())
-            {
+        if (msgSizeBytesToRead > msgChunk.size()) {
+            while (!msgChunk.empty()) {
                 processSingleDigit();
             }
             LOG_DEBUG("serial data buff empty, wait for new data");
             return;
         }
-        else
-        {
-            while (msgSizeBytesToRead)
-            {
+        else {
+            while (msgSizeBytesToRead) {
                 processSingleDigit();
             }
             msgPayloadSize = stoi(msgPayloadSizeStr);
@@ -111,40 +104,34 @@ class StateMessagePayload : public ParserFsm
             msgPayloadSize--;
         };
 
-        if (msgPayloadSize > msgChunk.size())
-        {
+        if (msgPayloadSize > msgChunk.size()) {
             msgPayload.reserve(msgPayload.size() + msgChunk.size());
 
-            while (!msgChunk.empty())
-            {
+            while (!msgChunk.empty()) {
                 getSingleByte();
             }
 
-            if (msgType == parserutils::message::Type::rawData)
-            {
+            if (msgType == parserutils::message::Type::rawData) {
                 send_event(RawDataEvt(msg.ownerService)); // invoke raw data fsm to let it store payload chunk to emmc
                 msgPayload.clear();
             }
             LOG_DEBUG("serial data buff empty, wait for new data");
             return;
         }
-        else
-        {
+        else {
             msgPayload.reserve(msgPayload.size() + msgPayloadSize);
 
-            while (msgPayloadSize)
-            {
+            while (msgPayloadSize) {
                 getSingleByte();
             }
 
             auto runHandler = [msg] {
-                if (msgType == parserutils::message::Type::endpoint)
-                {
+                if (msgType == parserutils::message::Type::endpoint) {
                     send_event(EndpointEvt(msg.ownerService));
                 }
-                else if (msgType == parserutils::message::Type::rawData)
-                {
-                    send_event(RawDataEvt(msg.ownerService)); // invoke raw data fsm to let it store pyaload chunk to emmc and begin its own operations
+                else if (msgType == parserutils::message::Type::rawData) {
+                    send_event(RawDataEvt(msg.ownerService)); // invoke raw data fsm to let it store pyaload chunk to
+                                                              // emmc and begin its own operations
                 }
             };
 
diff --git a/module-services/service-desktop/parser/ParserFsm.hpp b/module-services/service-desktop/parser/ParserFsm.hpp
index 0b8e897f1..48199f90a 100644
--- a/module-services/service-desktop/parser/ParserFsm.hpp
+++ b/module-services/service-desktop/parser/ParserFsm.hpp
@@ -11,7 +11,8 @@
 
 struct MessageDataEvt : tinyfsm::Event
 {
-    MessageDataEvt(sys::Service *ownerServicePtr) : ownerService(ownerServicePtr) {}
+    MessageDataEvt(sys::Service *ownerServicePtr) : ownerService(ownerServicePtr)
+    {}
     sys::Service *ownerService;
 };
 
diff --git a/module-services/service-desktop/parser/ParserUtils.cpp b/module-services/service-desktop/parser/ParserUtils.cpp
index e83b26e61..871656b14 100644
--- a/module-services/service-desktop/parser/ParserUtils.cpp
+++ b/module-services/service-desktop/parser/ParserUtils.cpp
@@ -8,12 +8,10 @@ namespace parserutils
     bool http::isMethodValid(uint8_t method)
     {
         if (method == static_cast<uint8_t>(http::Method::get) || method == static_cast<uint8_t>(http::Method::post) ||
-            method == static_cast<uint8_t>(http::Method::put) || method == static_cast<uint8_t>(http::Method::del))
-        {
+            method == static_cast<uint8_t>(http::Method::put) || method == static_cast<uint8_t>(http::Method::del)) {
             return true;
         }
-        else
-        {
+        else {
             LOG_ERROR("Invalid method!");
             return false;
         }
diff --git a/module-services/service-desktop/parser/ParserUtils.hpp b/module-services/service-desktop/parser/ParserUtils.hpp
index 7ae54b1b3..fe32be952 100644
--- a/module-services/service-desktop/parser/ParserUtils.hpp
+++ b/module-services/service-desktop/parser/ParserUtils.hpp
@@ -21,9 +21,9 @@ namespace parserutils
         enum class Type
         {
             endpoint = '#',
-            rawData = '$'
+            rawData  = '$'
         };
-    }     // namespace message
+    } // namespace message
 
     namespace http
     {
@@ -31,8 +31,8 @@ namespace parserutils
          */
         enum class Code
         {
-            OK = 200,
-            BadRequest = 400,
+            OK                  = 200,
+            BadRequest          = 400,
             InternalServerError = 500
         };
 
@@ -51,22 +51,22 @@ namespace parserutils
 
     namespace json
     {
-        const inline std::string method = "method";
+        const inline std::string method   = "method";
         const inline std::string endpoint = "endpoint";
-        const inline std::string uuid = "uuid";
-        const inline std::string status = "status";
-        const inline std::string body = "body";
+        const inline std::string uuid     = "uuid";
+        const inline std::string status   = "status";
+        const inline std::string body     = "body";
 
-        const inline std::string batteryLevel = "batteryLevel";
-        const inline std::string batteryState = "batteryState";
-        const inline std::string selectedSim  = "selectedSim";
-        const inline std::string trayState   = "trayState";
-        const inline std::string fsTotal   = "fsTotal";
-        const inline std::string fsFreePercent   = "fsFreePercent";
-        const inline std::string fsFree   = "fsFree";
-        const inline std::string gitRevision   = "gitRevision";
-        const inline std::string gitBranch   = "gitBranch";
-        const inline std::string gitTag   = "gitTag";
+        const inline std::string batteryLevel   = "batteryLevel";
+        const inline std::string batteryState   = "batteryState";
+        const inline std::string selectedSim    = "selectedSim";
+        const inline std::string trayState      = "trayState";
+        const inline std::string fsTotal        = "fsTotal";
+        const inline std::string fsFreePercent  = "fsFreePercent";
+        const inline std::string fsFree         = "fsFree";
+        const inline std::string gitRevision    = "gitRevision";
+        const inline std::string gitBranch      = "gitBranch";
+        const inline std::string gitTag         = "gitTag";
         const inline std::string currentRTCTime = "currentRTCTime";
 
     } // namespace json
diff --git a/module-services/service-desktop/parser/RawDataFsm.cpp b/module-services/service-desktop/parser/RawDataFsm.cpp
index 9e925dd25..debc68527 100644
--- a/module-services/service-desktop/parser/RawDataFsm.cpp
+++ b/module-services/service-desktop/parser/RawDataFsm.cpp
@@ -1,7 +1,6 @@
 #include "log/log.hpp"
 #include "RawDataFsm.hpp"
 
-
 // ----------------------------------------------------------------------------
 // Raw Data FSM states
 //
@@ -22,7 +21,6 @@ class StateRawDataPayload : public RawDataFsm
     };
 };
 
-
 // ----------------------------------------------------------------------------
 // Base State: default implementations
 //
@@ -40,8 +38,6 @@ void RawDataFsm::react(RawDataMallocEvt const &evt)
 int RawDataFsm::type{0};
 int RawDataFsm::payload{0};
 
-
-
 // ----------------------------------------------------------------------------
 // Initial state definition
 //
diff --git a/module-services/service-desktop/parser/RawDataFsm.hpp b/module-services/service-desktop/parser/RawDataFsm.hpp
index 8e2906231..c2c68d158 100644
--- a/module-services/service-desktop/parser/RawDataFsm.hpp
+++ b/module-services/service-desktop/parser/RawDataFsm.hpp
@@ -10,31 +10,28 @@
 struct RawDataEvt : tinyfsm::Event
 {
     RawDataEvt(sys::Service *ownerServicePtr) : ownerService(ownerServicePtr)
-    {
-    }
+    {}
     sys::Service *ownerService;
 };
 
 struct RawDataMallocEvt : tinyfsm::Event
 {
     RawDataMallocEvt(sys::Service *ownerServicePtr) : ownerService(ownerServicePtr)
-    {
-    }
+    {}
     sys::Service *ownerService;
 };
 
 // ----------------------------------------------------------------------------
 // RawDataFsm (FSM base class) declaration
 //
-class RawDataFsm
-: public tinyfsm::Fsm<RawDataFsm>
+class RawDataFsm : public tinyfsm::Fsm<RawDataFsm>
 {
     friend class Fsm;
 
   private:
     void react(tinyfsm::Event const &){};   /* default reaction for unhandled events */
     virtual void react(RawDataEvt const &); /* pure virtual: enforce implementation in all states */
-    void react(RawDataMallocEvt   const &);
+    void react(RawDataMallocEvt const &);
     void entry(void){}; /* no entry actions at all */
     void exit(void){};  /* no exit actions at all */
 
diff --git a/module-services/service-eink/ServiceEink.cpp b/module-services/service-eink/ServiceEink.cpp
index 555529d6c..7b7493fb7 100644
--- a/module-services/service-eink/ServiceEink.cpp
+++ b/module-services/service-eink/ServiceEink.cpp
@@ -5,21 +5,22 @@
  *      Author: robert
  */
 
-//FreeRTOS
-extern "C" {
+// FreeRTOS
+extern "C"
+{
 #include "FreeRTOS.h"
 #include "task.h"
 #include "queue.h"
 #include "timers.h"
 #include "semphr.h"
 }
-//module-utils
+// module-utils
 #include "log/log.hpp"
-//module-vfs
+// module-vfs
 #include "vfs.hpp"
 #include "EinkIncludes.hpp"
 
-//eink messages
+// eink messages
 #include "messages/EinkMessage.hpp"
 #include "messages/ImageMessage.hpp"
 #include "service-gui/messages/GUIMessage.hpp"
@@ -30,47 +31,45 @@ extern "C" {
 
 #include "ServiceEink.hpp"
 
-enum class EinkWorkerCommands {
-	Initialize,
-	Initialized,
-	Destroy,
-	CopyImage,
-	CopyCompleteCallback,
-	CopyComplete
+enum class EinkWorkerCommands
+{
+    Initialize,
+    Initialized,
+    Destroy,
+    CopyImage,
+    CopyCompleteCallback,
+    CopyComplete
 };
 
-ServiceEink::ServiceEink(const std::string& name, std::string parent)
-	: sys::Service(name,parent,4096+1024),
-	  timerID { 0 },
-	  selfRefereshTriggerCount{ 0 },
-	  temperatureMeasurementTriggerCount{ 0 },
-	  powerOffTriggerCount{ 0 }
+ServiceEink::ServiceEink(const std::string &name, std::string parent)
+    : sys::Service(name, parent, 4096 + 1024), timerID{0}, selfRefereshTriggerCount{0},
+      temperatureMeasurementTriggerCount{0}, powerOffTriggerCount{0}
 {
-	//initialize initial eink parameters
-	memset(&waveformSettings, 0, sizeof(EinkWaveFormSettings_t));
-	waveformSettings.mode = EinkWaveformGC16;
-	waveformSettings.temperature = -1000;
-    timerPowerOffID = CreateTimer(3000, false);
-
+    // initialize initial eink parameters
+    memset(&waveformSettings, 0, sizeof(EinkWaveFormSettings_t));
+    waveformSettings.mode        = EinkWaveformGC16;
+    waveformSettings.temperature = -1000;
+    timerPowerOffID              = CreateTimer(3000, false);
 }
 
-ServiceEink::~ServiceEink(){
-//	LOG_INFO("[ServiceEink] Cleaning resources");
-	//release data from settings
-	if( waveformSettings.LUTCData != nullptr )
-		delete [] waveformSettings.LUTCData;
-	if( waveformSettings.LUTDData != nullptr )
-		delete [] waveformSettings.LUTDData;
-	//set sure that any new temperature will cause to load data from file.
-	waveformSettings.temperature = -1000;
-
+ServiceEink::~ServiceEink()
+{
+    //	LOG_INFO("[ServiceEink] Cleaning resources");
+    // release data from settings
+    if (waveformSettings.LUTCData != nullptr)
+        delete[] waveformSettings.LUTCData;
+    if (waveformSettings.LUTDData != nullptr)
+        delete[] waveformSettings.LUTDData;
+    // set sure that any new temperature will cause to load data from file.
+    waveformSettings.temperature = -1000;
 }
 
 // Invoked upon receiving data message
-sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-	seink::EinkMessage* msg = static_cast<seink::EinkMessage*>(msgl);
+sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+{
+    seink::EinkMessage *msg = static_cast<seink::EinkMessage *>(msgl);
 
-	switch( msg->messageType ) {
+    switch (msg->messageType) {
 
     case MessageType::EinkImageData: {
         stopTimer(timerPowerOffID);
@@ -88,17 +87,14 @@ sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage* msgl,sys::Resp
             LOG_DEBUG("Suspend In Progress");
         auto msg = std::make_shared<sgui::GUIMessage>(MessageType::EinkDMATransfer);
         sys::Bus::SendUnicast(msg, this->GetName(), this);
-    }
-    break;
+    } break;
     case MessageType::EinkDMATransfer: {
 
         //			LOG_INFO("[%s] EinkDMATransfer", GetName().c_str());
         //			uint32_t start_tick = xTaskGetTickCount();
 
-        if (suspended)
-        {
-            if (suspendInProgress)
-            {
+        if (suspended) {
+            if (suspendInProgress) {
                 LOG_ERROR("drawing before suspend failed");
                 suspendInProgress = false;
             }
@@ -106,21 +102,18 @@ sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage* msgl,sys::Resp
             LOG_INFO("[ServiceEink] Received image while suspended, ignoring");
         }
 
-        else
-        {
+        else {
             EinkPowerOn();
 
             int32_t temperature = EinkGetTemperatureInternal();
             //			LOG_INFO("temperature: %d", temperature );
 
             EinkStatus_e ret;
-            if (deepRefresh)
-            {
+            if (deepRefresh) {
                 changeWaveform(EinkWaveforms_e::EinkWaveformGC16, temperature);
                 EinkDitherDisplay();
             }
-            else
-            {
+            else {
                 changeWaveform(EinkWaveforms_e::EinkWaveformDU2, temperature);
             }
 
@@ -128,13 +121,11 @@ sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage* msgl,sys::Resp
             if (ret != EinkOK)
                 LOG_FATAL("Failed to update frame");
 
-            if (deepRefresh)
-            {
+            if (deepRefresh) {
                 //				LOG_INFO("EinkDisplayTimingsDeepCleanMode");
                 ret = EinkRefreshImage(0, 0, 480, 600, EinkDisplayTimingsDeepCleanMode);
             }
-            else
-            {
+            else {
                 //				LOG_INFO("EinkDisplayTimingsFastRefreshMode");
                 ret = EinkRefreshImage(0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode);
             }
@@ -145,257 +136,245 @@ sys::Message_t ServiceEink::DataReceivedHandler(sys::DataMessage* msgl,sys::Resp
 
             ReloadTimer(timerPowerOffID);
 
-            auto msg = std::make_shared<sgui::GUIMessage>(MessageType::GUIDisplayReady, suspendInProgress, shutdownInProgress);
-            suspendInProgress = false;
+            auto msg =
+                std::make_shared<sgui::GUIMessage>(MessageType::GUIDisplayReady, suspendInProgress, shutdownInProgress);
+            suspendInProgress  = false;
             shutdownInProgress = false;
             sys::Bus::SendUnicast(msg, "ServiceGUI", this);
         }
-    }
-    break;
+    } break;
 
     case MessageType::EinkTemperatureUpdate: {
         //			LOG_INFO("[%s] EinkTemperatureUpdate", GetName().c_str());
-    }
-    break;
+    } break;
 
     case MessageType::EinkStateRequest: {
         //			LOG_INFO("[%s] EinkStateRequest", GetName().c_str());
         auto msg = std::make_shared<sgui::GUIMessage>(MessageType::GUIDisplayReady);
         sys::Bus::SendUnicast(msg, "ServiceGUI", this);
-    }
-    break;
+    } break;
 
     default:
         break;
+    };
 
-	};
-
-	return std::make_shared<sys::ResponseMessage>();
+    return std::make_shared<sys::ResponseMessage>();
 }
 
 // Invoked when timer ticked
-void ServiceEink::TickHandler(uint32_t id) {
-    auto findID = std::find_if(timersList.begin(), timersList.end(), [id] (auto & timer) {return (timer->GetId() == id);});
-    if (findID != timersList.end())
-    {
+void ServiceEink::TickHandler(uint32_t id)
+{
+    auto findID =
+        std::find_if(timersList.begin(), timersList.end(), [id](auto &timer) { return (timer->GetId() == id); });
+    if (findID != timersList.end()) {
         LOG_INFO("[ServiceEink] Power down eink after 3 seconds");
         EinkPowerOff();
     }
 }
 
 // Invoked during initialization
-sys::ReturnCodes ServiceEink::InitHandler() {
+sys::ReturnCodes ServiceEink::InitHandler()
+{
 
-	LOG_INFO("[ServiceEink] Initializing");
+    LOG_INFO("[ServiceEink] Initializing");
 
-	EinkStatus_e einkStatus = EinkResetAndInitialize();
+    EinkStatus_e einkStatus = EinkResetAndInitialize();
 
-	if (einkStatus != EinkOK)
-	{
-		LOG_FATAL("Error: Could not initialize Eink display!\n");
-	}
+    if (einkStatus != EinkOK) {
+        LOG_FATAL("Error: Could not initialize Eink display!\n");
+    }
 
-	//TODO remove screen clearing code below.
-	EinkPowerOn();
+    // TODO remove screen clearing code below.
+    EinkPowerOn();
 
-//	uint8_t s_einkAmbientTemperature = EinkGetTemperatureInternal();
-//	LOG_INFO("EInk measured temperature: %d\u00B0C", s_einkAmbientTemperature);
-//
-//	// Make the saturation to the lower limit
-//	if (s_einkAmbientTemperature < 0)
-//		s_einkAmbientTemperature = 0;
-//
-//	// Make the saturation to the higher limit
-//	if (s_einkAmbientTemperature > 49)
-//		s_einkAmbientTemperature = 49;
-//
-//	// Clear the temperature timer count
-//	deepClearScreen( s_einkAmbientTemperature );
-//	EinkPowerOff();
-//
-//	//TODO remove and add timer or turning off eink
-//	EinkPowerOn();
+    //	uint8_t s_einkAmbientTemperature = EinkGetTemperatureInternal();
+    //	LOG_INFO("EInk measured temperature: %d\u00B0C", s_einkAmbientTemperature);
+    //
+    //	// Make the saturation to the lower limit
+    //	if (s_einkAmbientTemperature < 0)
+    //		s_einkAmbientTemperature = 0;
+    //
+    //	// Make the saturation to the higher limit
+    //	if (s_einkAmbientTemperature > 49)
+    //		s_einkAmbientTemperature = 49;
+    //
+    //	// Clear the temperature timer count
+    //	deepClearScreen( s_einkAmbientTemperature );
+    //	EinkPowerOff();
+    //
+    //	//TODO remove and add timer or turning off eink
+    //	EinkPowerOn();
 
-	auto msg = std::make_shared<sgui::GUIMessage>(MessageType::GUIDisplayReady );
-	sys::Bus::SendUnicast(msg, "ServiceGUI", this);
+    auto msg = std::make_shared<sgui::GUIMessage>(MessageType::GUIDisplayReady);
+    sys::Bus::SendUnicast(msg, "ServiceGUI", this);
 
-
-	return sys::ReturnCodes::Success;
+    return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceEink::DeinitHandler() {
-	EinkPowerDown();
-	return sys::ReturnCodes::Success;
+sys::ReturnCodes ServiceEink::DeinitHandler()
+{
+    EinkPowerDown();
+    return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes ServiceEink::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
+sys::ReturnCodes ServiceEink::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+{
     LOG_FATAL("[ServiceEink] PowerModeHandler: %d", static_cast<uint32_t>(mode));
 
-    switch (mode){
-        case sys::ServicePowerMode ::Active:
-        {
-        	suspended = false;
-            EinkStatus_e einkStatus = EinkResetAndInitialize();
+    switch (mode) {
+    case sys::ServicePowerMode ::Active: {
+        suspended               = false;
+        EinkStatus_e einkStatus = EinkResetAndInitialize();
 
-            if (einkStatus != EinkOK)
-            {
-                LOG_FATAL("Error: Could not initialize Eink display!\n");
-            }
-
-            //TODO remove screen clearing code below.
-            EinkPowerOn();
-
-//            int32_t temperature = EinkGetTemperatureInternal();
-//            	//			LOG_INFO("temperature: %d", temperature );
-//
-//			changeWaveform(EinkWaveforms_e::EinkWaveformGC16, temperature);
-//			EinkDitherDisplay();
-//
-//            EinkRefreshImage (0, 0, 480, 600, EinkDisplayTimingsDeepCleanMode );
-
-            EinkPowerOff();
-//
-//            uint8_t s_einkAmbientTemperature = EinkGetTemperatureInternal();
-//            // Make the saturation to the lower limit
-//            if (s_einkAmbientTemperature < 0)
-//                s_einkAmbientTemperature = 0;
-//
-//            // Make the saturation to the higher limit
-//            if (s_einkAmbientTemperature > 49)
-//                s_einkAmbientTemperature = 49;
-//
-//            // Clear the temperature timer count
-//            deepClearScreen( s_einkAmbientTemperature );
+        if (einkStatus != EinkOK) {
+            LOG_FATAL("Error: Could not initialize Eink display!\n");
         }
-            break;
-        case sys::ServicePowerMode ::SuspendToRAM:
-        case sys::ServicePowerMode ::SuspendToNVM:
-        	suspended = true;
-        	stopTimer(timerPowerOffID);
-            EinkPowerDown();
-            break;
+
+        // TODO remove screen clearing code below.
+        EinkPowerOn();
+
+        //            int32_t temperature = EinkGetTemperatureInternal();
+        //            	//			LOG_INFO("temperature: %d", temperature );
+        //
+        //			changeWaveform(EinkWaveforms_e::EinkWaveformGC16, temperature);
+        //			EinkDitherDisplay();
+        //
+        //            EinkRefreshImage (0, 0, 480, 600, EinkDisplayTimingsDeepCleanMode );
+
+        EinkPowerOff();
+        //
+        //            uint8_t s_einkAmbientTemperature = EinkGetTemperatureInternal();
+        //            // Make the saturation to the lower limit
+        //            if (s_einkAmbientTemperature < 0)
+        //                s_einkAmbientTemperature = 0;
+        //
+        //            // Make the saturation to the higher limit
+        //            if (s_einkAmbientTemperature > 49)
+        //                s_einkAmbientTemperature = 49;
+        //
+        //            // Clear the temperature timer count
+        //            deepClearScreen( s_einkAmbientTemperature );
+    } break;
+    case sys::ServicePowerMode ::SuspendToRAM:
+    case sys::ServicePowerMode ::SuspendToNVM:
+        suspended = true;
+        stopTimer(timerPowerOffID);
+        EinkPowerDown();
+        break;
     }
 
     return sys::ReturnCodes::Success;
 }
 
-bool ServiceEink::changeWaveform( EinkWaveforms_e mode, const int32_t temperature ) {
+bool ServiceEink::changeWaveform(EinkWaveforms_e mode, const int32_t temperature)
+{
 
     // If neither the temperature nor the waveform has changed - do nothing
-    if ((temperature == waveformSettings.temperature) &&
-        (mode == waveformSettings.mode ))
-    {
+    if ((temperature == waveformSettings.temperature) && (mode == waveformSettings.mode)) {
         return EinkOK;
     }
 
     const uint32_t LUTD_SIZE = 16385;
-	const uint32_t LUTC_SIZE = 64;
-	const uint32_t LUTR_SIZE = 256; ///< Needed due to \ref EINK_LUTS_FILE_PATH structure
+    const uint32_t LUTC_SIZE = 64;
+    const uint32_t LUTR_SIZE = 256; ///< Needed due to \ref EINK_LUTS_FILE_PATH structure
 
-	const uint32_t LUTS_TOTAL_SIZE = LUTD_SIZE + LUTC_SIZE + LUTR_SIZE;
+    const uint32_t LUTS_TOTAL_SIZE = LUTD_SIZE + LUTC_SIZE + LUTR_SIZE;
 
-	waveformSettings.temperature = temperature;
-	waveformSettings.mode = mode;
+    waveformSettings.temperature = temperature;
+    waveformSettings.mode        = mode;
 
-	unsigned int segment = 0;
+    unsigned int segment = 0;
 
-	if (temperature < 38)
-	{
-		segment = temperature/3;
-	}
-	else
-	{
-		if (temperature < 43)
-		{
-			segment = 12;
-		}
-		else
-		{
-			segment = 13;
-		}
-	}
+    if (temperature < 38) {
+        segment = temperature / 3;
+    }
+    else {
+        if (temperature < 43) {
+            segment = 12;
+        }
+        else {
+            segment = 13;
+        }
+    }
 
-	uint32_t offset = 0;
+    uint32_t offset = 0;
 
-	switch (mode)
-	{
-		case EinkWaveformINIT:
-			offset = LUTS_TOTAL_SIZE*segment;
-		break;
+    switch (mode) {
+    case EinkWaveformINIT:
+        offset = LUTS_TOTAL_SIZE * segment;
+        break;
 
-		case EinkWaveformA2:
-			offset = LUTS_TOTAL_SIZE*(14+segment);
-		break;
+    case EinkWaveformA2:
+        offset = LUTS_TOTAL_SIZE * (14 + segment);
+        break;
 
-		case EinkWaveformDU2:
-			offset = LUTS_TOTAL_SIZE*(28+segment);
-		break;
+    case EinkWaveformDU2:
+        offset = LUTS_TOTAL_SIZE * (28 + segment);
+        break;
 
-		case EinkWaveformGLD16:
-			offset = LUTS_TOTAL_SIZE*(42+segment);
-		break;
+    case EinkWaveformGLD16:
+        offset = LUTS_TOTAL_SIZE * (42 + segment);
+        break;
 
-		case EinkWaveformGC16:
-		default:
-			offset = LUTS_TOTAL_SIZE*(56+segment);
-		break;
-	}
+    case EinkWaveformGC16:
+    default:
+        offset = LUTS_TOTAL_SIZE * (56 + segment);
+        break;
+    }
 
-
-    //Open file
-	auto file = vfs.fopen( "sys/Luts.bin", "rb" );
-    if ( file == nullptr )
-    {
+    // Open file
+    auto file = vfs.fopen("sys/Luts.bin", "rb");
+    if (file == nullptr) {
         LOG_FATAL("Could not find the LUTS.bin file. Returning");
         return false;
     }
     // Allocate memory for the LUTD data. +1 for the EinkLUTD command for SPI transfer
-    if( waveformSettings.LUTDData != nullptr )
-    	delete [] waveformSettings.LUTDData;
+    if (waveformSettings.LUTDData != nullptr)
+        delete[] waveformSettings.LUTDData;
 
     waveformSettings.LUTDSize = 0;
-    waveformSettings.LUTDData = new uint8_t[ LUTD_SIZE + 1];
+    waveformSettings.LUTDData = new uint8_t[LUTD_SIZE + 1];
 
-    if(waveformSettings.LUTDData == nullptr )
-    {
+    if (waveformSettings.LUTDData == nullptr) {
         LOG_ERROR("Could not allocate memory for the LUTD array");
-        vfs.fclose( file );
+        vfs.fclose(file);
         return false;
     }
 
     // Allocate memory for the LUTC data. +1 for the EinkLUTC command for SPI transfer
-    if( waveformSettings.LUTCData != nullptr )
-    	delete [] waveformSettings.LUTCData;
+    if (waveformSettings.LUTCData != nullptr)
+        delete[] waveformSettings.LUTCData;
 
     waveformSettings.LUTCSize = LUTC_SIZE;
-    waveformSettings.LUTCData = new uint8_t[ LUTC_SIZE + 1];
-    if ( waveformSettings.LUTCData  == nullptr )
-    {
+    waveformSettings.LUTCData = new uint8_t[LUTC_SIZE + 1];
+    if (waveformSettings.LUTCData == nullptr) {
         LOG_ERROR("Could not allocate memory for the LUTC array");
-        vfs.fclose( file );
+        vfs.fclose(file);
         return false;
     }
 
     waveformSettings.LUTDData[0] = EinkLUTD;
     waveformSettings.LUTCData[0] = EinkLUTC;
 
-    ///LUTD
-    vfs.fseek( file, offset, SEEK_SET );
-    vfs.fread( &waveformSettings.LUTDData[1], 1, LUTD_SIZE, file );
+    /// LUTD
+    vfs.fseek(file, offset, SEEK_SET);
+    vfs.fread(&waveformSettings.LUTDData[1], 1, LUTD_SIZE, file);
 
     uint8_t frameCount = waveformSettings.LUTDData[1] + 1; // 0x00 - 1 frame, ... , 0x0F - 16 frames
-    waveformSettings.LUTDSize = frameCount * 64 + 1 + 1; // (frameCount * 64) - size of actual LUT; (+1) - the byte containing frameCount; (+1) - EinkLUTD command
+    waveformSettings.LUTDSize =
+        frameCount * 64 + 1 +
+        1; // (frameCount * 64) - size of actual LUT; (+1) - the byte containing frameCount; (+1) - EinkLUTD command
 
-    //LUTC
-	offset += LUTD_SIZE;
-	vfs.fseek( file, offset, SEEK_SET );
-	vfs.fread( &waveformSettings.LUTCData[1], 1, LUTC_SIZE, file );
+    // LUTC
+    offset += LUTD_SIZE;
+    vfs.fseek(file, offset, SEEK_SET);
+    vfs.fread(&waveformSettings.LUTCData[1], 1, LUTC_SIZE, file);
 
-	vfs.fclose( file );
+    vfs.fclose(file);
 
-	EinkUpdateWaveform( &waveformSettings );
+    EinkUpdateWaveform(&waveformSettings);
 
-	return true;
+    return true;
 }
 
 bool ServiceEink::deepClearScreen(int8_t temperature)
@@ -403,36 +382,38 @@ bool ServiceEink::deepClearScreen(int8_t temperature)
     EinkWaveforms_e wv = waveformSettings.mode;
 
     EinkPowerOn();
-	changeWaveform( EinkWaveforms_e::EinkWaveformA2, temperature );
+    changeWaveform(EinkWaveforms_e::EinkWaveformA2, temperature);
 
-	EinkStatus_e ret;
-	memset( einkRenderBuffer, 15, 480*600 );
-	ret = EinkUpdateFrame ( 0,0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard );
-	if( ret != EinkOK ) LOG_FATAL("Failed to update frame");
-	ret = EinkRefreshImage (0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode );
-	if( ret != EinkOK ) LOG_FATAL("Failed to refresh frame");
+    EinkStatus_e ret;
+    memset(einkRenderBuffer, 15, 480 * 600);
+    ret = EinkUpdateFrame(0, 0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard);
+    if (ret != EinkOK)
+        LOG_FATAL("Failed to update frame");
+    ret = EinkRefreshImage(0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode);
+    if (ret != EinkOK)
+        LOG_FATAL("Failed to refresh frame");
 
-	for( uint32_t i=0; i<2; i++) {
-		memset( einkRenderBuffer, 0, 480*600 );
-		ret = EinkUpdateFrame ( 0,0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard );
-		if( ret != EinkOK ) LOG_FATAL("Failed to update frame");
-		ret = EinkRefreshImage (0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode );
-		if( ret != EinkOK ) LOG_FATAL("Failed to refresh frame");
+    for (uint32_t i = 0; i < 2; i++) {
+        memset(einkRenderBuffer, 0, 480 * 600);
+        ret = EinkUpdateFrame(0, 0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard);
+        if (ret != EinkOK)
+            LOG_FATAL("Failed to update frame");
+        ret = EinkRefreshImage(0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode);
+        if (ret != EinkOK)
+            LOG_FATAL("Failed to refresh frame");
 
-		memset( einkRenderBuffer, 15, 480*600 );
-		ret = EinkUpdateFrame ( 0,0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard );
-		if( ret != EinkOK ) LOG_FATAL("Failed to update frame");
-		ret = EinkRefreshImage (0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode );
-		if( ret != EinkOK ) LOG_FATAL("Failed to refresh frame");
-	}
+        memset(einkRenderBuffer, 15, 480 * 600);
+        ret = EinkUpdateFrame(0, 0, 480, 600, einkRenderBuffer, Eink4Bpp, EinkDisplayColorModeStandard);
+        if (ret != EinkOK)
+            LOG_FATAL("Failed to update frame");
+        ret = EinkRefreshImage(0, 0, 480, 600, EinkDisplayTimingsFastRefreshMode);
+        if (ret != EinkOK)
+            LOG_FATAL("Failed to refresh frame");
+    }
 
-	changeWaveform(wv, temperature);
+    changeWaveform(wv, temperature);
 
-	EinkPowerOff();
+    EinkPowerOff();
 
     return true;
 }
-
-
-
-
diff --git a/module-services/service-eink/ServiceEink.hpp b/module-services/service-eink/ServiceEink.hpp
index c71c51ddf..77c1ff97f 100644
--- a/module-services/service-eink/ServiceEink.hpp
+++ b/module-services/service-eink/ServiceEink.hpp
@@ -12,48 +12,50 @@
 
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
-//eink bsp
+// eink bsp
 #include "EinkIncludes.hpp"
 
-class ServiceEink: public sys::Service {
-protected:
-	//this is timer that triggers 3 handlers - self refresh, temperature measurement and power off
-	uint32_t timerID = 0;
+class ServiceEink : public sys::Service
+{
+  protected:
+    // this is timer that triggers 3 handlers - self refresh, temperature measurement and power off
+    uint32_t timerID = 0;
 
-	//counts timer triggers from last self refresh
-	uint32_t selfRefereshTriggerCount;
-	//counts timer events from last temperature measurement
-	uint32_t temperatureMeasurementTriggerCount;
-	//counts trigger counts from last action that required eink to be powered on
-	uint32_t powerOffTriggerCount;
+    // counts timer triggers from last self refresh
+    uint32_t selfRefereshTriggerCount;
+    // counts timer events from last temperature measurement
+    uint32_t temperatureMeasurementTriggerCount;
+    // counts trigger counts from last action that required eink to be powered on
+    uint32_t powerOffTriggerCount;
 
-	//number of timer triggers required to execute self refresh handler
-	const uint32_t selfRefereshTriggerValue = 60;
-	//number of timer triggers required to execute temperature measurement handler
-	const uint32_t temperatureMeasurementTriggerValue = 5*60;
-	//number of timer triggers from last action requiring power on eink to power down eink.
-	const uint32_t powerOffTriggerValue = 3;
+    // number of timer triggers required to execute self refresh handler
+    const uint32_t selfRefereshTriggerValue = 60;
+    // number of timer triggers required to execute temperature measurement handler
+    const uint32_t temperatureMeasurementTriggerValue = 5 * 60;
+    // number of timer triggers from last action requiring power on eink to power down eink.
+    const uint32_t powerOffTriggerValue = 3;
 
-	//structure with recently loaded waveformdata
-	EinkWaveFormSettings_t waveformSettings;
+    // structure with recently loaded waveformdata
+    EinkWaveFormSettings_t waveformSettings;
 
-	bool suspended = false;
+    bool suspended = false;
 
-	bool suspendInProgress = false;
-	bool shutdownInProgress = false;
+    bool suspendInProgress  = false;
+    bool shutdownInProgress = false;
 
-	bool changeWaveform( EinkWaveforms_e Mode, const int32_t temperature );
+    bool changeWaveform(EinkWaveforms_e Mode, const int32_t temperature);
 
-	bool deepClearScreen(int8_t temperature);
+    bool deepClearScreen(int8_t temperature);
 
-	uint8_t einkRenderBuffer[600 * 480];
-	bool	deepRefresh = false;
-	uint32_t timerPowerOffID = 0;
-public:
-	ServiceEink(const std::string& name,std::string parent = "");
+    uint8_t einkRenderBuffer[600 * 480];
+    bool deepRefresh         = false;
+    uint32_t timerPowerOffID = 0;
+
+  public:
+    ServiceEink(const std::string &name, std::string parent = "");
     ~ServiceEink();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
     // Invoked when timer ticked
     void TickHandler(uint32_t id) override;
 
diff --git a/module-services/service-eink/board/linux/EinkIncludes.hpp b/module-services/service-eink/board/linux/EinkIncludes.hpp
index 2c810c91f..c5e14c696 100644
--- a/module-services/service-eink/board/linux/EinkIncludes.hpp
+++ b/module-services/service-eink/board/linux/EinkIncludes.hpp
@@ -9,10 +9,11 @@
 #ifndef MODULE_SERVICES_SERVICE_EINK_BOARD_RT1051_EINKINCLUDES_HPP_
 #define MODULE_SERVICES_SERVICE_EINK_BOARD_RT1051_EINKINCLUDES_HPP_
 
-//module-bsp
-extern "C"  {
-	#include "board/linux/eink/ED028TC1.h"
-	#include "board/linux/chip.h"
+// module-bsp
+extern "C"
+{
+#include "board/linux/eink/ED028TC1.h"
+#include "board/linux/chip.h"
 }
 
 #endif /* MODULE_SERVICES_SERVICE_EINK_BOARD_RT1051_EINKINCLUDES_HPP_ */
diff --git a/module-services/service-eink/board/linux/renderer/src/RArea.cpp b/module-services/service-eink/board/linux/renderer/src/RArea.cpp
index b7680f24c..b6db9a86a 100644
--- a/module-services/service-eink/board/linux/renderer/src/RArea.cpp
+++ b/module-services/service-eink/board/linux/renderer/src/RArea.cpp
@@ -9,37 +9,32 @@
 #include <gdkmm/pixbuf.h>
 #include "RArea.hpp"
 
-RArea::RArea() : data {nullptr} {
-}
+RArea::RArea() : data{nullptr}
+{}
 
-RArea::~RArea() {
-}
+RArea::~RArea()
+{}
 
-bool RArea::on_draw(const Cairo::RefPtr<Cairo::Context>& cr)
+bool RArea::on_draw(const Cairo::RefPtr<Cairo::Context> &cr)
 {
-	if( data != nullptr ) {
-		Glib::RefPtr<Gdk::Pixbuf> image =
-			Gdk::Pixbuf::create_from_data(reinterpret_cast<guchar*>(data),
-			Gdk::COLORSPACE_RGB, //GdkColorspace
-			false, //has_alpha
-			8, //bits_per_sample
-			480, //width
-			600, //height,
-			3*480 );// rowstride,
+    if (data != nullptr) {
+        Glib::RefPtr<Gdk::Pixbuf> image = Gdk::Pixbuf::create_from_data(reinterpret_cast<guchar *>(data),
+                                                                        Gdk::COLORSPACE_RGB, // GdkColorspace
+                                                                        false,               // has_alpha
+                                                                        8,                   // bits_per_sample
+                                                                        480,                 // width
+                                                                        600,                 // height,
+                                                                        3 * 480);            // rowstride,
 
-		Gtk::Allocation allocation = get_allocation();
-		const int width = allocation.get_width();
-		const int height = allocation.get_height();
-
-		// Draw the image in the middle of the drawing area
-		Gdk::Cairo::set_source_pixbuf(cr, image,
-		    (width - image->get_width())/2, (height - image->get_height())/2);
-
-		cr->paint();
-		return true;
-	}
-	return false;
+        Gtk::Allocation allocation = get_allocation();
+        const int width            = allocation.get_width();
+        const int height           = allocation.get_height();
 
+        // Draw the image in the middle of the drawing area
+        Gdk::Cairo::set_source_pixbuf(cr, image, (width - image->get_width()) / 2, (height - image->get_height()) / 2);
 
+        cr->paint();
+        return true;
+    }
+    return false;
 }
-
diff --git a/module-services/service-eink/board/linux/renderer/src/RArea.hpp b/module-services/service-eink/board/linux/renderer/src/RArea.hpp
index d2e9491c1..aee3dfaab 100644
--- a/module-services/service-eink/board/linux/renderer/src/RArea.hpp
+++ b/module-services/service-eink/board/linux/renderer/src/RArea.hpp
@@ -12,15 +12,20 @@
 #include <gtkmm.h>
 #include <gtkmm/drawingarea.h>
 
-class RArea : public Gtk::DrawingArea{
-public:
-	RArea();
-	virtual ~RArea();
+class RArea : public Gtk::DrawingArea
+{
+  public:
+    RArea();
+    virtual ~RArea();
 
-	void setDrawData( char* data ) { this->data = data; };
-protected:
-	char* data;
-	bool on_draw (const Cairo::RefPtr<Cairo::Context>& cr) override;
+    void setDrawData(char *data)
+    {
+        this->data = data;
+    };
+
+  protected:
+    char *data;
+    bool on_draw(const Cairo::RefPtr<Cairo::Context> &cr) override;
 };
 
 #endif /* RENDERER_RAREA_HPP_ */
diff --git a/module-services/service-eink/board/linux/renderer/src/RWindow.cpp b/module-services/service-eink/board/linux/renderer/src/RWindow.cpp
index 726fa0b03..39672f6be 100644
--- a/module-services/service-eink/board/linux/renderer/src/RWindow.cpp
+++ b/module-services/service-eink/board/linux/renderer/src/RWindow.cpp
@@ -11,10 +11,9 @@
 
 #include "module-bsp/bsp/keyboard/key_codes.hpp"
 #include "module-bsp/bsp/common.hpp"
-static gboolean
-viewUpdate(gpointer data)
+static gboolean viewUpdate(gpointer data)
 {
-    RWindow* win = reinterpret_cast<RWindow*>(data);
+    RWindow *win = reinterpret_cast<RWindow *>(data);
     win->updateDrawBuffer();
 
     return true;
@@ -22,135 +21,126 @@ viewUpdate(gpointer data)
 
 void RWindow::keyMapInit(void)
 {
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'q', static_cast<uint32_t>(bsp::KeyCodes::FnLeft)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'w', static_cast<uint32_t>(bsp::KeyCodes::JoystickUp)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'e', static_cast<uint32_t>(bsp::KeyCodes::FnRight)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'r', static_cast<uint32_t>(bsp::KeyCodes::VolUp)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('q', static_cast<uint32_t>(bsp::KeyCodes::FnLeft)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('w', static_cast<uint32_t>(bsp::KeyCodes::JoystickUp)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('e', static_cast<uint32_t>(bsp::KeyCodes::FnRight)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('r', static_cast<uint32_t>(bsp::KeyCodes::VolUp)));
 
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'a', static_cast<uint32_t>(bsp::KeyCodes::JoystickLeft)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 's', static_cast<uint32_t>(bsp::KeyCodes::JoystickEnter)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'd', static_cast<uint32_t>(bsp::KeyCodes::JoystickRight)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'f', static_cast<uint32_t>(bsp::KeyCodes::VolDown)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('a', static_cast<uint32_t>(bsp::KeyCodes::JoystickLeft)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('s', static_cast<uint32_t>(bsp::KeyCodes::JoystickEnter)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('d', static_cast<uint32_t>(bsp::KeyCodes::JoystickRight)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('f', static_cast<uint32_t>(bsp::KeyCodes::VolDown)));
 
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'z', static_cast<uint32_t>(bsp::KeyCodes::NumericKeyAst)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'x', static_cast<uint32_t>(bsp::KeyCodes::JoystickDown)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'c', static_cast<uint32_t>(bsp::KeyCodes::NumericKeyPnd)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'v', static_cast<uint32_t>(bsp::KeyCodes::SSwitchDown)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'b', static_cast<uint32_t>(bsp::KeyCodes::SSwitchMid)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( 'n', static_cast<uint32_t>(bsp::KeyCodes::SSwitchUp)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('z', static_cast<uint32_t>(bsp::KeyCodes::NumericKeyAst)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('x', static_cast<uint32_t>(bsp::KeyCodes::JoystickDown)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('c', static_cast<uint32_t>(bsp::KeyCodes::NumericKeyPnd)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('v', static_cast<uint32_t>(bsp::KeyCodes::SSwitchDown)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('b', static_cast<uint32_t>(bsp::KeyCodes::SSwitchMid)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('n', static_cast<uint32_t>(bsp::KeyCodes::SSwitchUp)));
 
-	keyMap.insert( std::pair<int8_t,uint32_t>( '0', static_cast<uint32_t>(bsp::KeyCodes::NumericKey0)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '1', static_cast<uint32_t>(bsp::KeyCodes::NumericKey1)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '2', static_cast<uint32_t>(bsp::KeyCodes::NumericKey2)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '3', static_cast<uint32_t>(bsp::KeyCodes::NumericKey3)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '4', static_cast<uint32_t>(bsp::KeyCodes::NumericKey4)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '5', static_cast<uint32_t>(bsp::KeyCodes::NumericKey5)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '6', static_cast<uint32_t>(bsp::KeyCodes::NumericKey6)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '7', static_cast<uint32_t>(bsp::KeyCodes::NumericKey7)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '8', static_cast<uint32_t>(bsp::KeyCodes::NumericKey8)));
-	keyMap.insert( std::pair<int8_t,uint32_t>( '9', static_cast<uint32_t>(bsp::KeyCodes::NumericKey9)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('0', static_cast<uint32_t>(bsp::KeyCodes::NumericKey0)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('1', static_cast<uint32_t>(bsp::KeyCodes::NumericKey1)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('2', static_cast<uint32_t>(bsp::KeyCodes::NumericKey2)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('3', static_cast<uint32_t>(bsp::KeyCodes::NumericKey3)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('4', static_cast<uint32_t>(bsp::KeyCodes::NumericKey4)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('5', static_cast<uint32_t>(bsp::KeyCodes::NumericKey5)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('6', static_cast<uint32_t>(bsp::KeyCodes::NumericKey6)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('7', static_cast<uint32_t>(bsp::KeyCodes::NumericKey7)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('8', static_cast<uint32_t>(bsp::KeyCodes::NumericKey8)));
+    keyMap.insert(std::pair<int8_t, uint32_t>('9', static_cast<uint32_t>(bsp::KeyCodes::NumericKey9)));
 
-	batteryKeyMap.insert( std::pair<int8_t,uint32_t>( '[', 1));
-	batteryKeyMap.insert( std::pair<int8_t,uint32_t>( ']', 2));
-	batteryKeyMap.insert( std::pair<int8_t,uint32_t>( 'p', 3));
+    batteryKeyMap.insert(std::pair<int8_t, uint32_t>('[', 1));
+    batteryKeyMap.insert(std::pair<int8_t, uint32_t>(']', 2));
+    batteryKeyMap.insert(std::pair<int8_t, uint32_t>('p', 3));
 }
-void RWindow::updateDrawBuffer() {
-	for (size_t i = 0; i < width*height; i++)
-		for (size_t j = 0; j < 3; j++){
-			uint8_t c = shmMemPtr[i] << 4;
-	          rgbMemPtr[i * 3 + j] = c;
-		}
-	queue_draw();
-}
-
-bool RWindow::onKeyPress(GdkEventKey* event)
+void RWindow::updateDrawBuffer()
 {
-	if( event->type == GDK_KEY_PRESS ) {
-		uint32_t key_code = event->keyval;
+    for (size_t i = 0; i < width * height; i++)
+        for (size_t j = 0; j < 3; j++) {
+            uint8_t c            = shmMemPtr[i] << 4;
+            rgbMemPtr[i * 3 + j] = c;
+        }
+    queue_draw();
+}
 
-		auto f = keys.find( key_code );
-		if( f == keys.end() ) {
+bool RWindow::onKeyPress(GdkEventKey *event)
+{
+    if (event->type == GDK_KEY_PRESS) {
+        uint32_t key_code = event->keyval;
 
+        auto f = keys.find(key_code);
+        if (f == keys.end()) {
 
-			//slider keys are not generating relase
-			if( (key_code != 'v') && (key_code != 'b') && (key_code != 'n') )
-			{
-				keys.insert( std::pair<char,int>(event->keyval, event->time ));
-			}
-			std::map<int8_t, uint32_t>::iterator key_it = keyMap.find(key_code);
-			if(key_it != keyMap.end())
-			{
-				uint8_t message[2];
+            // slider keys are not generating relase
+            if ((key_code != 'v') && (key_code != 'b') && (key_code != 'n')) {
+                keys.insert(std::pair<char, int>(event->keyval, event->time));
+            }
+            std::map<int8_t, uint32_t>::iterator key_it = keyMap.find(key_code);
+            if (key_it != keyMap.end()) {
+                uint8_t message[2];
 
-				message[0] = static_cast<uint8_t>(bsp::KeyEvents::Pressed);
-				message[1] = key_it->second;
-				write(fifoFd, message, 2);
-			}
+                message[0] = static_cast<uint8_t>(bsp::KeyEvents::Pressed);
+                message[1] = key_it->second;
+                write(fifoFd, message, 2);
+            }
 
-			std::map<int8_t, uint32_t>::iterator batt_it = batteryKeyMap.find(key_code);
-			if(batt_it != batteryKeyMap.end())
-			{
-				uint8_t message = key_code;
-				write(fifoFdBatt, &message, 1);
-			}
-
-		}
-	}
+            std::map<int8_t, uint32_t>::iterator batt_it = batteryKeyMap.find(key_code);
+            if (batt_it != batteryKeyMap.end()) {
+                uint8_t message = key_code;
+                write(fifoFdBatt, &message, 1);
+            }
+        }
+    }
 
     return false;
 }
 
-bool RWindow::onKeyRelease(GdkEventKey* event)
+bool RWindow::onKeyRelease(GdkEventKey *event)
 {
-	if( event->type == GDK_KEY_RELEASE ) {
-		uint32_t key_code = event->keyval;
-		std::map<uint32_t,uint32_t>::iterator it = keys.find( key_code );
-		if( it != keys.end() ) {
+    if (event->type == GDK_KEY_RELEASE) {
+        uint32_t key_code                         = event->keyval;
+        std::map<uint32_t, uint32_t>::iterator it = keys.find(key_code);
+        if (it != keys.end()) {
 
-			std::map<int8_t, uint32_t>::iterator key_it = keyMap.find(key_code);
-			if(key_it != keyMap.end())
-			{
-				uint8_t message[2];
+            std::map<int8_t, uint32_t>::iterator key_it = keyMap.find(key_code);
+            if (key_it != keyMap.end()) {
+                uint8_t message[2];
 
-				message[0] = static_cast<uint8_t>(bsp::KeyEvents::Released);
-				message[1] = key_it->second;
-				write(fifoFd, message, 2);
-			}
+                message[0] = static_cast<uint8_t>(bsp::KeyEvents::Released);
+                message[1] = key_it->second;
+                write(fifoFd, message, 2);
+            }
 
-			keys.erase ( it );
-		}
-	}
+            keys.erase(it);
+        }
+    }
 
     return false;
 }
 
-RWindow::RWindow( char* shmMemory, int fifoKbd, int fifoBatt, int w, int h ) :
-	shmMemPtr{shmMemory},
-	rgbMemPtr{nullptr},
-	fifoFd{fifoKbd},
-	fifoFdBatt{fifoBatt},
-	width{w},
-	height{h} {
+RWindow::RWindow(char *shmMemory, int fifoKbd, int fifoBatt, int w, int h)
+    : shmMemPtr{shmMemory}, rgbMemPtr{nullptr}, fifoFd{fifoKbd}, fifoFdBatt{fifoBatt}, width{w}, height{h}
+{
 
-	rgbMemPtr = new char[3*w*h];
-	drawArea.setDrawData(rgbMemPtr);
+    rgbMemPtr = new char[3 * w * h];
+    drawArea.setDrawData(rgbMemPtr);
 
-	set_title("GUI RENDERER");
-	set_default_size( 480,600);
+    set_title("GUI RENDERER");
+    set_default_size(480, 600);
 
-	add(drawArea);
-	show_all_children();
-	g_timeout_add( 50, viewUpdate, this );
+    add(drawArea);
+    show_all_children();
+    g_timeout_add(50, viewUpdate, this);
 
-	this->signal_key_press_event().connect( sigc::mem_fun(*this, &RWindow::onKeyPress), false);
-	this->signal_key_release_event().connect( sigc::mem_fun(*this, &RWindow::onKeyRelease), false);
+    this->signal_key_press_event().connect(sigc::mem_fun(*this, &RWindow::onKeyPress), false);
+    this->signal_key_release_event().connect(sigc::mem_fun(*this, &RWindow::onKeyRelease), false);
 
-	keyMapInit();
+    keyMapInit();
 }
 
-RWindow::~RWindow() {
-	if( rgbMemPtr != nullptr ) {
-		delete [] rgbMemPtr;
-	}
+RWindow::~RWindow()
+{
+    if (rgbMemPtr != nullptr) {
+        delete[] rgbMemPtr;
+    }
 }
-
diff --git a/module-services/service-eink/board/linux/renderer/src/RWindow.hpp b/module-services/service-eink/board/linux/renderer/src/RWindow.hpp
index 6b4e2d9ce..c53a0a192 100644
--- a/module-services/service-eink/board/linux/renderer/src/RWindow.hpp
+++ b/module-services/service-eink/board/linux/renderer/src/RWindow.hpp
@@ -15,36 +15,37 @@
 
 #include "RArea.hpp"
 
-
 #include "module-bsp/bsp/keyboard/key_codes.hpp"
-class RWindow : public Gtk::Window{
-protected:
-	RArea drawArea;
-	//pointer to shared memory with gui renderer buffer passed from main.
-	char* shmMemPtr;
-	//local buffer
-	char* rgbMemPtr;
-	//dimensions of the shared memory buffer
-	int width, height;
-	//map that holds pair of key, time
-	//	pair is inserted into map when there is key event of GDK_KEY_PRESS
-	//it is removed when there is GDK_KEY_RELEASE event
-	std::map<uint32_t, uint32_t> keys;
+class RWindow : public Gtk::Window
+{
+  protected:
+    RArea drawArea;
+    // pointer to shared memory with gui renderer buffer passed from main.
+    char *shmMemPtr;
+    // local buffer
+    char *rgbMemPtr;
+    // dimensions of the shared memory buffer
+    int width, height;
+    // map that holds pair of key, time
+    //	pair is inserted into map when there is key event of GDK_KEY_PRESS
+    // it is removed when there is GDK_KEY_RELEASE event
+    std::map<uint32_t, uint32_t> keys;
 
-	std::map<int8_t, uint32_t> keyMap;
-	std::map<int8_t, uint32_t> batteryKeyMap;
-	//named pipe file descriptor
-	int fifoFd;
-	//named pipe file descriptor
-	int fifoFdBatt;
-	void keyMapInit(void);
-public:
-	RWindow( char* shmMemory, int fifoKbd, int fifoBatt, int w, int h );
-	virtual ~RWindow();
-	bool onKeyPress(GdkEventKey* event);
-	bool onKeyRelease(GdkEventKey* event);
+    std::map<int8_t, uint32_t> keyMap;
+    std::map<int8_t, uint32_t> batteryKeyMap;
+    // named pipe file descriptor
+    int fifoFd;
+    // named pipe file descriptor
+    int fifoFdBatt;
+    void keyMapInit(void);
 
-	void updateDrawBuffer();
+  public:
+    RWindow(char *shmMemory, int fifoKbd, int fifoBatt, int w, int h);
+    virtual ~RWindow();
+    bool onKeyPress(GdkEventKey *event);
+    bool onKeyRelease(GdkEventKey *event);
+
+    void updateDrawBuffer();
 };
 
 #endif /* RENDERER_RWINDOW_HPP_ */
diff --git a/module-services/service-eink/board/linux/renderer/src/gui_renderer.cpp b/module-services/service-eink/board/linux/renderer/src/gui_renderer.cpp
index db42a974e..9946e6e49 100644
--- a/module-services/service-eink/board/linux/renderer/src/gui_renderer.cpp
+++ b/module-services/service-eink/board/linux/renderer/src/gui_renderer.cpp
@@ -1,6 +1,6 @@
 //============================================================================
 // Name        : pure-gui.cpp
-// Author      : 
+// Author      :
 // Version     :
 // Copyright   : Your copyright notice
 // Description : Hello World in C++, Ansi-style
@@ -19,101 +19,97 @@
 #include <gtkmm.h>
 #include <gtkmm/application.h>
 
-
-
 #include "RWindow.hpp"
 using namespace std;
 
-static const int FrameBufferWidth = 480;
+static const int FrameBufferWidth  = 480;
 static const int FrameBufferHeight = 600;
-static const int FrameBufferSize = FrameBufferWidth*FrameBufferHeight;
+static const int FrameBufferSize   = FrameBufferWidth * FrameBufferHeight;
 
-typedef struct {
-	uint32_t frameCount;
-	uint32_t width;
-	uint32_t height;
-}shared_memory;
-
-uint8_t* createSHMBuffer( std::string name )
+typedef struct
 {
-	shared_memory *shared_mem_ptr;
-	int fd_shm, fd_log;
-	bool initNeeded = true;
+    uint32_t frameCount;
+    uint32_t width;
+    uint32_t height;
+} shared_memory;
 
-	//check if shared memory blok is already created
-	if ((fd_shm = shm_open (name.c_str(), O_RDWR | O_CREAT , 0660)) == -1) {
-		std::cerr<<"shm is already created"<<std::endl;
-		initNeeded = false;
-	}
-	else {
-		std::cout<<"shm created"<<std::endl;
-		if (ftruncate (fd_shm, sizeof (shared_memory)+FrameBufferSize) == -1) {
-			std::cerr<<"shm is already created"<<std::endl;
-		}
-	}
-	if ((shared_mem_ptr = static_cast<shared_memory*>(mmap (NULL, sizeof (shared_memory)+FrameBufferSize, PROT_READ | PROT_WRITE, MAP_SHARED,
-			fd_shm, 0))) == MAP_FAILED) {
-		std::cerr<<"mmap failed"<<std::endl;
-	}
+uint8_t *createSHMBuffer(std::string name)
+{
+    shared_memory *shared_mem_ptr;
+    int fd_shm, fd_log;
+    bool initNeeded = true;
 
-	return reinterpret_cast<uint8_t*>(shared_mem_ptr);
+    // check if shared memory blok is already created
+    if ((fd_shm = shm_open(name.c_str(), O_RDWR | O_CREAT, 0660)) == -1) {
+        std::cerr << "shm is already created" << std::endl;
+        initNeeded = false;
+    }
+    else {
+        std::cout << "shm created" << std::endl;
+        if (ftruncate(fd_shm, sizeof(shared_memory) + FrameBufferSize) == -1) {
+            std::cerr << "shm is already created" << std::endl;
+        }
+    }
+    if ((shared_mem_ptr = static_cast<shared_memory *>(
+             mmap(NULL, sizeof(shared_memory) + FrameBufferSize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_shm, 0))) ==
+        MAP_FAILED) {
+        std::cerr << "mmap failed" << std::endl;
+    }
+
+    return reinterpret_cast<uint8_t *>(shared_mem_ptr);
 }
 
-int createFIFO( void )
+int createFIFO(void)
 {
-	int fd;
-	const char * myfifo = "/tmp/myfifo3";
-	fd = open(myfifo,O_WRONLY | O_NONBLOCK);
+    int fd;
+    const char *myfifo = "/tmp/myfifo3";
+    fd                 = open(myfifo, O_WRONLY | O_NONBLOCK);
 
-	if(fd < 0)
-	{
-		mkfifo(myfifo, 0666);
-		fd = open(myfifo,O_WRONLY);
-	}
+    if (fd < 0) {
+        mkfifo(myfifo, 0666);
+        fd = open(myfifo, O_WRONLY);
+    }
 
-	int error = errno;
+    int error = errno;
     std::cerr << "mkfifo " << strerror(errno) << " " << myfifo << std::endl;
-//	ENOENT
+    //	ENOENT
 
-	return fd;
+    return fd;
 }
 
-int createBattFifo( void )
+int createBattFifo(void)
 {
-	int fd;
-	const char * myfifo = "/tmp/fifoBattKeys";
-	fd = open(myfifo,O_WRONLY | O_NONBLOCK);
+    int fd;
+    const char *myfifo = "/tmp/fifoBattKeys";
+    fd                 = open(myfifo, O_WRONLY | O_NONBLOCK);
 
-	if(fd < 0)
-	{
-		mkfifo(myfifo, 0666);
-		fd = open(myfifo,O_WRONLY);
-	}
+    if (fd < 0) {
+        mkfifo(myfifo, 0666);
+        fd = open(myfifo, O_WRONLY);
+    }
 
-	int error = errno;
+    int error = errno;
     std::cerr << "mkfifo " << strerror(errno) << " " << myfifo << std::endl;
-//	ENOENT
+    //	ENOENT
 
-	return fd;
+    return fd;
 }
-int main( int argc, char* argv[] ) {
+int main(int argc, char *argv[])
+{
 
+    std::string shnName = "pure_gui_fmbuf";
 
+    shared_memory *shm_ptr = reinterpret_cast<shared_memory *>(createSHMBuffer(shnName));
+    char *dataMemory       = reinterpret_cast<char *>(shm_ptr) + sizeof(shared_memory);
 
-	std::string shnName = "pure_gui_fmbuf";
+    int fifoFd     = createFIFO();
+    int fifoBattfd = createBattFifo();
 
-	shared_memory* shm_ptr = reinterpret_cast<shared_memory*>(createSHMBuffer(shnName));
-	char* dataMemory = reinterpret_cast<char*>(shm_ptr)+sizeof(shared_memory);
+    auto app = Gtk::Application::create(argc, argv, "org.gtkmm.example");
 
-	int fifoFd = createFIFO();
-	int fifoBattfd = createBattFifo();
+    RWindow rendererWindow(dataMemory, fifoFd, fifoBattfd, FrameBufferWidth, FrameBufferHeight);
+    app->run(rendererWindow);
 
-	auto app = Gtk::Application::create(argc, argv, "org.gtkmm.example");
-
-	RWindow rendererWindow( dataMemory, fifoFd, fifoBattfd, FrameBufferWidth, FrameBufferHeight );
-	app->run( rendererWindow );
-
-
-//    shm_unlink(const char *name);
-	return 0;
+    //    shm_unlink(const char *name);
+    return 0;
 }
diff --git a/module-services/service-eink/board/rt1051/EinkIncludes.hpp b/module-services/service-eink/board/rt1051/EinkIncludes.hpp
index f63e01849..c1f0db980 100644
--- a/module-services/service-eink/board/rt1051/EinkIncludes.hpp
+++ b/module-services/service-eink/board/rt1051/EinkIncludes.hpp
@@ -9,9 +9,10 @@
 #ifndef MODULE_SERVICES_SERVICE_EINK_BOARD_RT1051_EINKINCLUDES_HPP_
 #define MODULE_SERVICES_SERVICE_EINK_BOARD_RT1051_EINKINCLUDES_HPP_
 
-//module-bsp
+// module-bsp
 #include "board/rt1051/bsp/eink/ED028TC1.h"
-extern "C"  {
+extern "C"
+{
 #include "chip.h"
 #include "fsl_dmamux.h"
 #include "fsl_edma.h"
diff --git a/module-services/service-eink/messages/EinkMessage.hpp b/module-services/service-eink/messages/EinkMessage.hpp
index b1f9a7c5d..19d682337 100644
--- a/module-services/service-eink/messages/EinkMessage.hpp
+++ b/module-services/service-eink/messages/EinkMessage.hpp
@@ -9,22 +9,22 @@
 #ifndef MODULE_SERVICES_SERVICE_EINK_EINKMESSAGE_HPP_
 #define MODULE_SERVICES_SERVICE_EINK_EINKMESSAGE_HPP_
 
-
 #include "Service/Message.hpp"
 #include "MessageType.hpp"
 
-namespace seink {
+namespace seink
+{
 
-/*
- * @brief Template for all messages that go to gui service
- */
-class EinkMessage: public sys::DataMessage {
-public:
-  EinkMessage(MessageType messageType) : sys::DataMessage(messageType){};
-  virtual ~EinkMessage(){};
-};
+    /*
+     * @brief Template for all messages that go to gui service
+     */
+    class EinkMessage : public sys::DataMessage
+    {
+      public:
+        EinkMessage(MessageType messageType) : sys::DataMessage(messageType){};
+        virtual ~EinkMessage(){};
+    };
 
 } /* namespace seink */
 
-
 #endif /* MODULE_SERVICES_SERVICE_EINK_EINKMESSAGE_HPP_ */
diff --git a/module-services/service-eink/messages/ImageMessage.cpp b/module-services/service-eink/messages/ImageMessage.cpp
index da3afc6cf..f17dc1868 100644
--- a/module-services/service-eink/messages/ImageMessage.cpp
+++ b/module-services/service-eink/messages/ImageMessage.cpp
@@ -10,14 +10,16 @@
 #include "ImageMessage.hpp"
 #include "MessageType.hpp"
 
-namespace seink {
+namespace seink
+{
 
-ImageMessage::ImageMessage( uint32_t x, uint32_t y, uint32_t w, uint32_t h, bool deepRefresh, uint8_t* data, bool suspend, bool shutdown) :
-	EinkMessage( MessageType::EinkImageData ), x{x}, y{y}, w{w}, h{h}, deepRefresh{deepRefresh}, data{ data },
-	suspend{ suspend}, shutdown{ shutdown }{
-}
+    ImageMessage::ImageMessage(
+        uint32_t x, uint32_t y, uint32_t w, uint32_t h, bool deepRefresh, uint8_t *data, bool suspend, bool shutdown)
+        : EinkMessage(MessageType::EinkImageData), x{x}, y{y}, w{w}, h{h},
+          deepRefresh{deepRefresh}, data{data}, suspend{suspend}, shutdown{shutdown}
+    {}
 
-ImageMessage::~ImageMessage() {
-}
+    ImageMessage::~ImageMessage()
+    {}
 
 } /* namespace seink */
diff --git a/module-services/service-eink/messages/ImageMessage.hpp b/module-services/service-eink/messages/ImageMessage.hpp
index 5ebd7fc65..94b0ec626 100644
--- a/module-services/service-eink/messages/ImageMessage.hpp
+++ b/module-services/service-eink/messages/ImageMessage.hpp
@@ -12,28 +12,53 @@
 #include <cstdint>
 #include "EinkMessage.hpp"
 
-namespace seink {
+namespace seink
+{
 
-/*
- *
- */
-class ImageMessage: public EinkMessage {
-protected:
-	uint32_t x,y,w,h;
-	bool deepRefresh;
-	uint8_t* data;
-	bool suspend = false;
-	bool shutdown = false;
-public:
-	ImageMessage( uint32_t x, uint32_t y, uint32_t w, uint32_t h, bool deepRefresh, uint8_t* data, bool suspend, bool shutdown );
-	virtual ~ImageMessage();
+    /*
+     *
+     */
+    class ImageMessage : public EinkMessage
+    {
+      protected:
+        uint32_t x, y, w, h;
+        bool deepRefresh;
+        uint8_t *data;
+        bool suspend  = false;
+        bool shutdown = false;
 
-	uint8_t* const getData() { return data; } ;
-	uint32_t getSize() { return w*h; };
-	bool getDeepRefresh() { return deepRefresh; };
-	bool getSuspend() { return suspend; };
-	bool getShutdown() { return shutdown; };
-};
+      public:
+        ImageMessage(uint32_t x,
+                     uint32_t y,
+                     uint32_t w,
+                     uint32_t h,
+                     bool deepRefresh,
+                     uint8_t *data,
+                     bool suspend,
+                     bool shutdown);
+        virtual ~ImageMessage();
+
+        uint8_t *const getData()
+        {
+            return data;
+        };
+        uint32_t getSize()
+        {
+            return w * h;
+        };
+        bool getDeepRefresh()
+        {
+            return deepRefresh;
+        };
+        bool getSuspend()
+        {
+            return suspend;
+        };
+        bool getShutdown()
+        {
+            return shutdown;
+        };
+    };
 
 } /* namespace seink */
 
diff --git a/module-services/service-evtmgr/EventManager.cpp b/module-services/service-evtmgr/EventManager.cpp
index 2911119b7..cbabb6ce4 100644
--- a/module-services/service-evtmgr/EventManager.cpp
+++ b/module-services/service-evtmgr/EventManager.cpp
@@ -26,157 +26,145 @@
 #include "harness/events/FocusApp.hpp"
 #include <service-cellular/messages/CellularMessage.hpp>
 
-EventManager::EventManager(const std::string& name)
-		: sys::Service(name)
+EventManager::EventManager(const std::string &name) : sys::Service(name)
 {
-	LOG_INFO("[EventManager] Initializing");
+    LOG_INFO("[EventManager] Initializing");
 
-	alarmTimestamp = 0;
-	alarmID = 0;
+    alarmTimestamp = 0;
+    alarmID        = 0;
     busChannels.push_back(sys::BusChannels::ServiceDBNotifications);
     // each 30 sec pollTimer execute check - right now polling for battery only
     pollTimerID = CreateTimer(30000, true);
     ReloadTimer(pollTimerID);
 }
 
-EventManager::~EventManager(){
+EventManager::~EventManager()
+{
 
-	LOG_INFO("[EventManager] Cleaning resources");
-	if( EventWorker != nullptr) {
-		EventWorker->deinit();
-	}
+    LOG_INFO("[EventManager] Cleaning resources");
+    if (EventWorker != nullptr) {
+        EventWorker->deinit();
+    }
 }
 
 // Invoked upon receiving data message
-sys::Message_t EventManager::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
+sys::Message_t EventManager::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+{
     bool handled = false;
 
-    if (auto msg = dynamic_cast<cellular::RawCommandResp *>(resp))
-    {
+    if (auto msg = dynamic_cast<cellular::RawCommandResp *>(resp)) {
         bsp::harness::emit(harness::AtResponse(msg->response).encode());
         handled = true;
     }
-    if (msgl->messageType == MessageType::DBServiceNotification)
-    {
+    if (msgl->messageType == MessageType::DBServiceNotification) {
         auto *msg = dynamic_cast<DBNotificationMessage *>(msgl);
-        if (msg != nullptr)
-        {
-            if ((msg->baseType == DB::BaseType::AlarmDB) &&
-                ((msg->notificationType == DB::NotificationType::Updated) || (msg->notificationType == DB::NotificationType::Added)))
-            {
+        if (msg != nullptr) {
+            if ((msg->baseType == DB::BaseType::AlarmDB) && ((msg->notificationType == DB::NotificationType::Updated) ||
+                                                             (msg->notificationType == DB::NotificationType::Added))) {
                 alarmDBEmpty = false;
                 alarmIsValid = false;
-                handled = true;
+                handled      = true;
             }
         }
     }
-    else if (msgl->messageType == MessageType::EVM_GPIO)
-    {
+    else if (msgl->messageType == MessageType::EVM_GPIO) {
         LOG_DEBUG("EVM_GPIO msg");
     }
-    else if (msgl->messageType == MessageType::KBDKeyEvent && msgl->sender == this->GetName())
-    {
+    else if (msgl->messageType == MessageType::KBDKeyEvent && msgl->sender == this->GetName()) {
 
         auto *msg = reinterpret_cast<sevm::KbdMessage *>(msgl);
 
         auto message = std::make_shared<sevm::KbdMessage>();
         message->key = msg->key;
 
-        if (suspended && (message->key.state == RawKey::State::Pressed))
-        {
+        if (suspended && (message->key.state == RawKey::State::Pressed)) {
             suspended = false;
             sys::SystemManager::ResumeSystem(this);
         }
 
-                //send key to focused application
-		if( targetApplication.empty() == false ) {
-			sys::Bus::SendUnicast(message, targetApplication, this);
-		}
-		//notify application manager to prevent screen locking
-		sapm::ApplicationManager::messagePreventBlocking(this);
-		handled = true;
-	}
-    else if (msgl->messageType == MessageType::EVMFocusApplication)
-    {
+        // send key to focused application
+        if (targetApplication.empty() == false) {
+            sys::Bus::SendUnicast(message, targetApplication, this);
+        }
+        // notify application manager to prevent screen locking
+        sapm::ApplicationManager::messagePreventBlocking(this);
+        handled = true;
+    }
+    else if (msgl->messageType == MessageType::EVMFocusApplication) {
         auto *msg = reinterpret_cast<sevm::EVMFocusApplication *>(msgl);
-		if( msg->sender == "ApplicationManager" ) {
-			targetApplication = msg->getApplication();
-			handled = true;
-			LOG_INFO("Switching focus to %s", targetApplication.c_str());
+        if (msg->sender == "ApplicationManager") {
+            targetApplication = msg->getApplication();
+            handled           = true;
+            LOG_INFO("Switching focus to %s", targetApplication.c_str());
             bsp::harness::emit(harness::FocusApp(targetApplication).encode());
         }
     }
-    else if (msgl->messageType == MessageType::EVMBatteryLevel && msgl->sender == this->GetName())
-    {
-		sevm::BatteryLevelMessage* msg = reinterpret_cast<sevm::BatteryLevelMessage*>(msgl);
+    else if (msgl->messageType == MessageType::EVMBatteryLevel && msgl->sender == this->GetName()) {
+        sevm::BatteryLevelMessage *msg = reinterpret_cast<sevm::BatteryLevelMessage *>(msgl);
 
-		if( suspended ) {
-			suspended = false;
-			sys::SystemManager::ResumeSystem(this);
-		}
+        if (suspended) {
+            suspended = false;
+            sys::SystemManager::ResumeSystem(this);
+        }
 
-		auto message = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
-		message->levelPercents = msg->levelPercents;
-		message->fullyCharged = msg->fullyCharged;
+        auto message           = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
+        message->levelPercents = msg->levelPercents;
+        message->fullyCharged  = msg->fullyCharged;
 
-		if( targetApplication.empty() == false ) {
-			sys::Bus::SendUnicast(message, targetApplication, this);
-		}
+        if (targetApplication.empty() == false) {
+            sys::Bus::SendUnicast(message, targetApplication, this);
+        }
 
-		handled = true;
+        handled = true;
     }
-    else if (msgl->messageType == MessageType::EVMChargerPlugged && msgl->sender == this->GetName())
-    {
-        sevm::BatteryPlugMessage* msg = reinterpret_cast<sevm::BatteryPlugMessage*>(msgl);
+    else if (msgl->messageType == MessageType::EVMChargerPlugged && msgl->sender == this->GetName()) {
+        sevm::BatteryPlugMessage *msg = reinterpret_cast<sevm::BatteryPlugMessage *>(msgl);
 
-		if( suspended ) {
-			suspended = false;
-			sys::SystemManager::ResumeSystem(this);
-		}
+        if (suspended) {
+            suspended = false;
+            sys::SystemManager::ResumeSystem(this);
+        }
 
-		auto message = std::make_shared<sevm::BatteryPlugMessage>(MessageType::EVMChargerPlugged);
-		message->plugged = msg->plugged;
+        auto message     = std::make_shared<sevm::BatteryPlugMessage>(MessageType::EVMChargerPlugged);
+        message->plugged = msg->plugged;
 
-		if( targetApplication.empty() == false ) {
-			sys::Bus::SendUnicast(message, targetApplication, this);
-		}
-		handled = true;
+        if (targetApplication.empty() == false) {
+            sys::Bus::SendUnicast(message, targetApplication, this);
+        }
+        handled = true;
     }
-    else if (msgl->messageType == MessageType::EVMMinuteUpdated && msgl->sender == this->GetName())
-    {
+    else if (msgl->messageType == MessageType::EVMMinuteUpdated && msgl->sender == this->GetName()) {
 
-        //resume system first
-		if( suspended ) {
-			//suspended = false;
-			//sys::SystemManager::ResumeSystem(this);
-		}
+        // resume system first
+        if (suspended) {
+            // suspended = false;
+            // sys::SystemManager::ResumeSystem(this);
+        }
 
-		//HandleAlarmTrigger(msgl);
+        // HandleAlarmTrigger(msgl);
 
-		handled = true;
+        handled = true;
     }
-    else if (!targetApplication.empty() && dynamic_cast<sevm::SIMMessage *>(msgl) != nullptr)
-    {
+    else if (!targetApplication.empty() && dynamic_cast<sevm::SIMMessage *>(msgl) != nullptr) {
         sys::Bus::SendUnicast(std::make_shared<sevm::SIMMessage>(), targetApplication, this);
     }
 
-    if( handled )
-		return std::make_shared<sys::ResponseMessage>();
-	else
-		return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
+    if (handled)
+        return std::make_shared<sys::ResponseMessage>();
+    else
+        return std::make_shared<sys::ResponseMessage>(sys::ReturnCodes::Unresolved);
 }
 
 void EventManager::handleBatPolling()
 {
-    bool charging = false;
-    uint8_t newLevel = 0;
+    bool charging        = false;
+    uint8_t newLevel     = 0;
     static uint8_t level = 0;
     bsp::battery_getBatteryLevel(newLevel);
     bsp::battery_getChargeStatus(charging);
-    if (level != newLevel && !charging)
-    {
+    if (level != newLevel && !charging) {
         LOG_DEBUG("Battery polled state change: %s, battery level: %d", charging ? "charging" : "discharging", level);
-        auto message = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
+        auto message           = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
         message->levelPercents = newLevel;
         sys::Bus::SendUnicast(message, "EventManager", this);
     }
@@ -185,25 +173,25 @@ void EventManager::handleBatPolling()
 
 void EventManager::TickHandler(uint32_t id)
 {
-    if (id == pollTimerID)
-    {
+    if (id == pollTimerID) {
         handleBatPolling();
     }
 }
 
 // Invoked during initialization
-sys::ReturnCodes EventManager::InitHandler() {
+sys::ReturnCodes EventManager::InitHandler()
+{
 
-	//initialize keyboard worker
-	EventWorker = std::make_unique<WorkerEvent>(this);
+    // initialize keyboard worker
+    EventWorker = std::make_unique<WorkerEvent>(this);
 
-	//create queues for worker
-	//keyboard irq queue
-	sys::WorkerQueueInfo qIrq = {"qIrq", sizeof(uint8_t), 10 };
-	//battery manager queue
-	sys::WorkerQueueInfo qBattery = {"qBattery", sizeof(uint8_t), 10 };
-	//RTC irq queue
-	sys::WorkerQueueInfo qRTC = {"qRTC", sizeof(uint8_t), 20 };
+    // create queues for worker
+    // keyboard irq queue
+    sys::WorkerQueueInfo qIrq = {"qIrq", sizeof(uint8_t), 10};
+    // battery manager queue
+    sys::WorkerQueueInfo qBattery = {"qBattery", sizeof(uint8_t), 10};
+    // RTC irq queue
+    sys::WorkerQueueInfo qRTC = {"qRTC", sizeof(uint8_t), 20};
     // test harness queue
     sys::WorkerQueueInfo qHarness = {"qHarness", sizeof(uint8_t), 3};
     // sim tray queue
@@ -211,37 +199,39 @@ sys::ReturnCodes EventManager::InitHandler() {
 
     std::list<sys::WorkerQueueInfo> list;
 
-	list.push_back(qIrq);
-	list.push_back(qBattery);
-	list.push_back(qRTC);
+    list.push_back(qIrq);
+    list.push_back(qBattery);
+    list.push_back(qRTC);
     list.push_back(qHarness);
     list.push_back(qSIM);
 
-    EventWorker->init( list );
-	EventWorker->run();
+    EventWorker->init(list);
+    EventWorker->run();
 
-	return sys::ReturnCodes::Success;
+    return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes EventManager::DeinitHandler() {
+sys::ReturnCodes EventManager::DeinitHandler()
+{
 
-	EventWorker->deinit();
-	EventWorker.reset();
-	return sys::ReturnCodes::Success;
+    EventWorker->deinit();
+    EventWorker.reset();
+    return sys::ReturnCodes::Success;
 }
 
-sys::ReturnCodes EventManager::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
+sys::ReturnCodes EventManager::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+{
     LOG_FATAL("[ServiceEvtMgr] PowerModeHandler: %d", static_cast<uint32_t>(mode));
 
     suspended = true;
 
-    switch (mode){
-        case sys::ServicePowerMode ::Active:
-        	suspended = false;
-            break;
-        case sys::ServicePowerMode ::SuspendToRAM:
-        case sys::ServicePowerMode ::SuspendToNVM:
-            break;
+    switch (mode) {
+    case sys::ServicePowerMode ::Active:
+        suspended = false;
+        break;
+    case sys::ServicePowerMode ::SuspendToRAM:
+    case sys::ServicePowerMode ::SuspendToNVM:
+        break;
     }
 
     return sys::ReturnCodes::Success;
diff --git a/module-services/service-evtmgr/EventManager.hpp b/module-services/service-evtmgr/EventManager.hpp
index f4038aae3..8fe52627e 100644
--- a/module-services/service-evtmgr/EventManager.hpp
+++ b/module-services/service-evtmgr/EventManager.hpp
@@ -18,34 +18,36 @@
 
 class WorkerEvent;
 
-class EventManager: public sys::Service {
-private:
-	void HandleAlarmTrigger(sys::DataMessage* msgl);
-	void GetNextAlarmTimestamp(time_t timestamp);
+class EventManager : public sys::Service
+{
+  private:
+    void HandleAlarmTrigger(sys::DataMessage *msgl);
+    void GetNextAlarmTimestamp(time_t timestamp);
     uint32_t pollTimerID = 0;
 
   protected:
-	std::unique_ptr<WorkerEvent> EventWorker;
-	//application where key events are sent. This is also only application that is allowed to change keyboard long press settings.
-	std::string targetApplication;
-	//alarm timestamp in seconds from midnight
-	uint32_t alarmTimestamp;
-	//ID of alarm waiting to trigger
-	uint32_t alarmID;
-	//flag set when there is no alarm to trigger in current day
-	bool alarmDBEmpty = false;
-	//flag set when there is alarm to handle
-	bool alarmIsValid = false;
-	//flag informs about suspend/resume status
-	bool suspended = false;
+    std::unique_ptr<WorkerEvent> EventWorker;
+    // application where key events are sent. This is also only application that is allowed to change keyboard long
+    // press settings.
+    std::string targetApplication;
+    // alarm timestamp in seconds from midnight
+    uint32_t alarmTimestamp;
+    // ID of alarm waiting to trigger
+    uint32_t alarmID;
+    // flag set when there is no alarm to trigger in current day
+    bool alarmDBEmpty = false;
+    // flag set when there is alarm to handle
+    bool alarmIsValid = false;
+    // flag informs about suspend/resume status
+    bool suspended = false;
     /// to periodically check and update battery state, to be removed when battery charger will work fine
     void handleBatPolling();
 
   public:
-	EventManager(const std::string& name);
+    EventManager(const std::string &name);
     ~EventManager();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
 
     void TickHandler(uint32_t id) override;
 
@@ -56,11 +58,11 @@ private:
 
     sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
 
-
     /**
-	* @brief Sends request to application manager to switch from current application to specific window in application with specified name .
-	*/
-    static bool messageSetApplication( sys::Service* sender, const std::string& applicationName );
+     * @brief Sends request to application manager to switch from current application to specific window in application
+     * with specified name .
+     */
+    static bool messageSetApplication(sys::Service *sender, const std::string &applicationName);
 };
 
 #endif /* MODULE_SERVICES_SERVICE_KBD_EventManager_HPP_ */
diff --git a/module-services/service-evtmgr/WorkerEvent.cpp b/module-services/service-evtmgr/WorkerEvent.cpp
index 5a6611d20..c2d797a68 100644
--- a/module-services/service-evtmgr/WorkerEvent.cpp
+++ b/module-services/service-evtmgr/WorkerEvent.cpp
@@ -7,9 +7,10 @@
 
 #include <string.h>
 
-extern "C" {
-	#include "FreeRTOS.h"
-	#include "task.h"
+extern "C"
+{
+#include "FreeRTOS.h"
+#include "task.h"
 }
 
 #include "Service/Service.hpp"
@@ -17,8 +18,6 @@ extern "C" {
 #include "Service/Worker.hpp"
 #include "MessageType.hpp"
 
-
-
 #include "WorkerEvent.hpp"
 #include "EventManager.hpp"
 #include "service-evtmgr/messages/EVMessages.hpp"
@@ -31,114 +30,100 @@ extern "C" {
 #include "bsp/harness/bsp_harness.hpp"
 #include "harness/Parser.hpp"
 
-bool WorkerEvent::handleMessage( uint32_t queueID ) {
+bool WorkerEvent::handleMessage(uint32_t queueID)
+{
 
-	QueueHandle_t queue = queues[queueID];
+    QueueHandle_t queue = queues[queueID];
 
-	//service queue
-	if( queueID == static_cast<uint32_t>(WorkerEventQueues::queueService) ) {
-		sys::WorkerCommand wcmd;
-		if( xQueueReceive(queue, &wcmd, 0 ) != pdTRUE ) {
-			return false;
-		}
-		wcmd.command = 1;
-		//place some code here to handle messages from service
-	}
+    // service queue
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueService)) {
+        sys::WorkerCommand wcmd;
+        if (xQueueReceive(queue, &wcmd, 0) != pdTRUE) {
+            return false;
+        }
+        wcmd.command = 1;
+        // place some code here to handle messages from service
+    }
 
-	if( queueID == static_cast<uint32_t>(WorkerEventQueues::queueKeyboardIRQ) )
-	{
-		uint8_t notification;
-		if( xQueueReceive(queue, &notification, 0 ) != pdTRUE ) {
-				return false;
-		}
-		uint8_t state, code;
-		bsp::keyboard_get_data(notification, state, code);
-
-		processKeyEvent(static_cast<bsp::KeyEvents>(state), static_cast<bsp::KeyCodes>(code));
-
-	}
-
-	if( queueID == static_cast<uint32_t>(WorkerEventQueues::queueBattery) )
-	{
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueKeyboardIRQ)) {
         uint8_t notification;
-        if( xQueueReceive(queue, &notification, 0 ) != pdTRUE ) {
-				return false;
-		}
-		if(notification & static_cast<uint8_t>(bsp::batteryIRQSource::INTB))
-		{
+        if (xQueueReceive(queue, &notification, 0) != pdTRUE) {
+            return false;
+        }
+        uint8_t state, code;
+        bsp::keyboard_get_data(notification, state, code);
+
+        processKeyEvent(static_cast<bsp::KeyEvents>(state), static_cast<bsp::KeyCodes>(code));
+    }
+
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueBattery)) {
+        uint8_t notification;
+        if (xQueueReceive(queue, &notification, 0) != pdTRUE) {
+            return false;
+        }
+        if (notification & static_cast<uint8_t>(bsp::batteryIRQSource::INTB)) {
             uint8_t battLevel = 0;
             bsp::battery_getBatteryLevel(battLevel);
             bsp::battery_ClearAllIRQs();
-			auto message = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
-			message->levelPercents = battLevel;
-			message->fullyCharged = false;
-			sys::Bus::SendUnicast(message, "EventManager", this->service);
-		}
-		if(notification & static_cast<uint8_t>(bsp::batteryIRQSource::INOKB))
-		{
-			bool status;
-			bsp::battery_getChargeStatus(status);
-			bsp::battery_ClearAllIRQs();
-			auto message = std::make_shared<sevm::BatteryPlugMessage>(MessageType::EVMChargerPlugged);
-			message->plugged = status;
+            auto message           = std::make_shared<sevm::BatteryLevelMessage>(MessageType::EVMBatteryLevel);
+            message->levelPercents = battLevel;
+            message->fullyCharged  = false;
             sys::Bus::SendUnicast(message, "EventManager", this->service);
         }
-	}
+        if (notification & static_cast<uint8_t>(bsp::batteryIRQSource::INOKB)) {
+            bool status;
+            bsp::battery_getChargeStatus(status);
+            bsp::battery_ClearAllIRQs();
+            auto message     = std::make_shared<sevm::BatteryPlugMessage>(MessageType::EVMChargerPlugged);
+            message->plugged = status;
+            sys::Bus::SendUnicast(message, "EventManager", this->service);
+        }
+    }
 
-	if( queueID == static_cast<uint32_t>(WorkerEventQueues::queueRTC) )
-	{
-		uint8_t notification;
-		if( xQueueReceive(queue, &notification, 0 ) != pdTRUE ) {
-				return false;
-		}
-
-		time_t timestamp;
-		bsp::rtc_GetCurrentTimestamp(&timestamp);
-		bsp::rtc_SetMinuteAlarm(timestamp);
-
-		struct tm time;
-
-		bsp::rtc_GetCurrentDateTime(&time);
-
-		auto message = std::make_shared<sevm::RtcMinuteAlarmMessage>(MessageType::EVMMinuteUpdated);
-		message->timestamp = timestamp;
-		sys::Bus::SendUnicast(message, "EventManager", this->service);
-	}
-
-    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueHarness))
-    {
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueRTC)) {
         uint8_t notification;
-        if (xQueueReceive(queue, &notification, 0) != pdTRUE)
-        {
+        if (xQueueReceive(queue, &notification, 0) != pdTRUE) {
             return false;
         }
-        if (notification == STX)
-        {
-            if (bsp::harness::flush() != true)
-            {
+
+        time_t timestamp;
+        bsp::rtc_GetCurrentTimestamp(&timestamp);
+        bsp::rtc_SetMinuteAlarm(timestamp);
+
+        struct tm time;
+
+        bsp::rtc_GetCurrentDateTime(&time);
+
+        auto message       = std::make_shared<sevm::RtcMinuteAlarmMessage>(MessageType::EVMMinuteUpdated);
+        message->timestamp = timestamp;
+        sys::Bus::SendUnicast(message, "EventManager", this->service);
+    }
+
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueHarness)) {
+        uint8_t notification;
+        if (xQueueReceive(queue, &notification, 0) != pdTRUE) {
+            return false;
+        }
+        if (notification == STX) {
+            if (bsp::harness::flush() != true) {
                 LOG_ERROR("processing in progres...");
             }
         }
-        else if (notification == ETX)
-        {
+        else if (notification == ETX) {
             std::string text = bsp::harness::read();
-            auto ret = harness::parse(text, this->service);
-            if (ret != harness::Error::Success)
-            {
+            auto ret         = harness::parse(text, this->service);
+            if (ret != harness::Error::Success) {
                 LOG_ERROR("Harness parser error: %d", ret);
             }
         }
-        else
-        {
+        else {
             LOG_ERROR("Unknown event!");
         }
     }
 
-    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueSIM))
-    {
+    if (queueID == static_cast<uint32_t>(WorkerEventQueues::queueSIM)) {
         uint8_t pinstate;
-        if (xQueueReceive(queue, &pinstate, 0) != pdTRUE)
-        {
+        if (xQueueReceive(queue, &pinstate, 0) != pdTRUE) {
             return false;
         }
         LOG_DEBUG("SIM state change: %d", pinstate);
@@ -150,72 +135,66 @@ bool WorkerEvent::handleMessage( uint32_t queueID ) {
 
 #include "harness/events/SysStart.hpp"
 
-bool WorkerEvent::init( std::list<sys::WorkerQueueInfo> queues )
+bool WorkerEvent::init(std::list<sys::WorkerQueueInfo> queues)
 {
-	Worker::init(queues);
+    Worker::init(queues);
     std::vector<xQueueHandle> qhandles = this->queues;
     bsp::keyboard_Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueKeyboardIRQ)]);
-	bsp::battery_Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueBattery)]);
-	bsp::rtc_Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueRTC)]);
+    bsp::battery_Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueBattery)]);
+    bsp::rtc_Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueRTC)]);
     bsp::harness::Init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueHarness)]);
     bsp::cellular::sim::init(qhandles[static_cast<int32_t>(WorkerEventQueues::queueSIM)]);
 
     time_t timestamp;
-	bsp::rtc_GetCurrentTimestamp(&timestamp);
-	bsp::rtc_SetMinuteAlarm(timestamp);
+    bsp::rtc_GetCurrentTimestamp(&timestamp);
+    bsp::rtc_SetMinuteAlarm(timestamp);
     bsp::harness::emit(harness::SysStart().encode());
     return true;
 }
 
 bool WorkerEvent::deinit(void)
 {
-	Worker::deinit();
-	bsp::keyboard_Deinit();
-	bsp::battery_Deinit();
+    Worker::deinit();
+    bsp::keyboard_Deinit();
+    bsp::battery_Deinit();
 
-	return true;
+    return true;
 }
 
- void WorkerEvent::processKeyEvent(bsp::KeyEvents event, bsp::KeyCodes code)
- {
-     auto message = std::make_shared<sevm::KbdMessage>();
+void WorkerEvent::processKeyEvent(bsp::KeyEvents event, bsp::KeyCodes code)
+{
+    auto message = std::make_shared<sevm::KbdMessage>();
 
-     message->key.key_code = code;
+    message->key.key_code = code;
 
-     if (event == bsp::KeyEvents::Pressed)
-     {
-         if (lastState == bsp::KeyEvents::Pressed)
-         {
-             return;
-         }
+    if (event == bsp::KeyEvents::Pressed) {
+        if (lastState == bsp::KeyEvents::Pressed) {
+            return;
+        }
 
-         message->key.state = RawKey::State::Pressed;
-         message->key.time_press = xTaskGetTickCount();
+        message->key.state      = RawKey::State::Pressed;
+        message->key.time_press = xTaskGetTickCount();
 
-         // Slider sends only press, not release state so it would block the entire keyboard
-         if ((code != bsp::KeyCodes::SSwitchUp) && (code != bsp::KeyCodes::SSwitchMid) && (code != bsp::KeyCodes::SSwitchDown))
-         {
-             lastPressed = code;
-             lastState = event;
-         }
-	}
-	else
-	{
-		if( lastState != bsp::KeyEvents::Pressed)
-		{
-			return;
-		}
-		if( lastPressed != code)
-		{
-			return;
-		}
-
-		lastState = bsp::KeyEvents::Released;
-		{
-			message->key.state = RawKey::State::Released;
-			message->key.time_release = xTaskGetTickCount();
-		}
-	}
-	sys::Bus::SendUnicast(message, "EventManager", this->service);
- }
+        // Slider sends only press, not release state so it would block the entire keyboard
+        if ((code != bsp::KeyCodes::SSwitchUp) && (code != bsp::KeyCodes::SSwitchMid) &&
+            (code != bsp::KeyCodes::SSwitchDown)) {
+            lastPressed = code;
+            lastState   = event;
+        }
+    }
+    else {
+        if (lastState != bsp::KeyEvents::Pressed) {
+            return;
+        }
+        if (lastPressed != code) {
+            return;
+        }
 
+        lastState = bsp::KeyEvents::Released;
+        {
+            message->key.state        = RawKey::State::Released;
+            message->key.time_release = xTaskGetTickCount();
+        }
+    }
+    sys::Bus::SendUnicast(message, "EventManager", this->service);
+}
diff --git a/module-services/service-evtmgr/WorkerEvent.hpp b/module-services/service-evtmgr/WorkerEvent.hpp
index 828072ea2..7a7c254c9 100644
--- a/module-services/service-evtmgr/WorkerEvent.hpp
+++ b/module-services/service-evtmgr/WorkerEvent.hpp
@@ -8,7 +8,6 @@
 #ifndef MODULE_SERVICES_SERVICE_KBD_WorkerEvent_HPP_
 #define MODULE_SERVICES_SERVICE_KBD_WorkerEvent_HPP_
 
-
 #include "bsp/keyboard/key_codes.hpp"
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
@@ -19,9 +18,10 @@
 #include "bsp/common.hpp"
 #include "bsp/keyboard/key_codes.hpp"
 
-struct KeyState{
-	uint8_t event;
-	uint8_t code;
+struct KeyState
+{
+    uint8_t event;
+    uint8_t code;
 };
 
 enum class WorkerEventQueues
@@ -36,37 +36,36 @@ enum class WorkerEventQueues
 
 class WorkerEvent : public sys::Worker
 {
-private:
-	/**
-	 * @brief This method is responsible for catch and process keyboard event.
-	 * @param event key event
-	 * @param code key code
-	 * @note It sends message to service if event is processed succesfully.
-	 */
-	void processKeyEvent( bsp::KeyEvents event, bsp::KeyCodes code );
-	/**
-	 * @brief list of keys with long press enabled. First item is key code, second is long press time.
-	 */
-	std::map<uint32_t, uint32_t> longPressParamsList;
-	bool longPressTaskEnabled = false;
-	bsp::KeyEvents lastState = bsp::KeyEvents::Released;
-	bsp::KeyCodes lastPressed = static_cast<bsp::KeyCodes>(0);
-public:
-	WorkerEvent( sys::Service* service ) : sys::Worker( service ) {};
-	/**
-	 * This function is responsible for creating all queues provided in the constructor.
-	 * When all queues are created this method creates set of queues.
-	 */
-	virtual bool init( std::list<sys::WorkerQueueInfo> queues );
-	virtual bool deinit();
+  private:
+    /**
+     * @brief This method is responsible for catch and process keyboard event.
+     * @param event key event
+     * @param code key code
+     * @note It sends message to service if event is processed succesfully.
+     */
+    void processKeyEvent(bsp::KeyEvents event, bsp::KeyCodes code);
+    /**
+     * @brief list of keys with long press enabled. First item is key code, second is long press time.
+     */
+    std::map<uint32_t, uint32_t> longPressParamsList;
+    bool longPressTaskEnabled = false;
+    bsp::KeyEvents lastState  = bsp::KeyEvents::Released;
+    bsp::KeyCodes lastPressed = static_cast<bsp::KeyCodes>(0);
 
-	/**
-	 * This method is called from thread when new message arrives in queue.
-	 * @param queueID Index of the queue in the queues vector.
-	*/
-	bool handleMessage( uint32_t queueID ) override final;
+  public:
+    WorkerEvent(sys::Service *service) : sys::Worker(service){};
+    /**
+     * This function is responsible for creating all queues provided in the constructor.
+     * When all queues are created this method creates set of queues.
+     */
+    virtual bool init(std::list<sys::WorkerQueueInfo> queues);
+    virtual bool deinit();
 
+    /**
+     * This method is called from thread when new message arrives in queue.
+     * @param queueID Index of the queue in the queues vector.
+     */
+    bool handleMessage(uint32_t queueID) override final;
 };
 
-
 #endif /* MODULE_SERVICES_SERVICE_KBD_WorkerEvent_HPP_ */
diff --git a/module-services/service-evtmgr/alarm/EventManagerAlarm.cpp b/module-services/service-evtmgr/alarm/EventManagerAlarm.cpp
index ea4c717e2..0a6fc2c9f 100644
--- a/module-services/service-evtmgr/alarm/EventManagerAlarm.cpp
+++ b/module-services/service-evtmgr/alarm/EventManagerAlarm.cpp
@@ -18,72 +18,60 @@
 #include "service-db/api/DBServiceAPI.hpp"
 #include "service-appmgr/ApplicationManager.hpp"
 
-
-
-void EventManager::HandleAlarmTrigger(sys::DataMessage* msgl)
+void EventManager::HandleAlarmTrigger(sys::DataMessage *msgl)
 {
-	sevm::RtcMinuteAlarmMessage* msg = reinterpret_cast<sevm::RtcMinuteAlarmMessage*>(msgl);
+    sevm::RtcMinuteAlarmMessage *msg = reinterpret_cast<sevm::RtcMinuteAlarmMessage *>(msgl);
 
-	// Send message to update time in application
-	auto message = std::make_shared<sevm::RtcMinuteAlarmMessage>(MessageType::EVMMinuteUpdated);
-	message->timestamp = msg->timestamp;
+    // Send message to update time in application
+    auto message       = std::make_shared<sevm::RtcMinuteAlarmMessage>(MessageType::EVMMinuteUpdated);
+    message->timestamp = msg->timestamp;
 
-	if( targetApplication.empty() == false ){
-		sys::Bus::SendUnicast(message, targetApplication, this);
-	}
+    if (targetApplication.empty() == false) {
+        sys::Bus::SendUnicast(message, targetApplication, this);
+    }
 
-	time_t currentTime = message->timestamp;
+    time_t currentTime = message->timestamp;
 
-	// it there is no valid alarm and DB is not empty
-	if( alarmIsValid == false )
-	{
-		//check if its midnight
-		if( currentTime % 86400 == 0)
-		{
-			alarmDBEmpty = false;
-		}
+    // it there is no valid alarm and DB is not empty
+    if (alarmIsValid == false) {
+        // check if its midnight
+        if (currentTime % 86400 == 0) {
+            alarmDBEmpty = false;
+        }
 
-		if( alarmDBEmpty == false )
-		// get next alarm
-			GetNextAlarmTimestamp(currentTime);
-	}
+        if (alarmDBEmpty == false)
+            // get next alarm
+            GetNextAlarmTimestamp(currentTime);
+    }
 
-	// there is valid alarm
-	if(alarmIsValid == true)
-	{
-		//check if its time to trigger alarm
-		//round time and compare to alaram timestamp
-		if(alarmTimestamp == (currentTime % 86400))
-		{
-			alarmIsValid = false;
-			// run bell application
-			std::unique_ptr<gui::SwitchData> switchMessage = std::make_unique<sevm::EVMAlarmSwitchData>(alarmID);
-			sapm::ApplicationManager::messageSwitchApplication(this, "bell", "main", std::move(switchMessage));
-
-		}
-		// check if alarm is not obsolete
-		else if( (alarmTimestamp < (currentTime % 86400)) &&
-				((currentTime + 60) % 86400) > (currentTime % 86400) )
-		{
-			alarmIsValid = false;
-
-		}
-	}
+    // there is valid alarm
+    if (alarmIsValid == true) {
+        // check if its time to trigger alarm
+        // round time and compare to alaram timestamp
+        if (alarmTimestamp == (currentTime % 86400)) {
+            alarmIsValid = false;
+            // run bell application
+            std::unique_ptr<gui::SwitchData> switchMessage = std::make_unique<sevm::EVMAlarmSwitchData>(alarmID);
+            sapm::ApplicationManager::messageSwitchApplication(this, "bell", "main", std::move(switchMessage));
+        }
+        // check if alarm is not obsolete
+        else if ((alarmTimestamp < (currentTime % 86400)) && ((currentTime + 60) % 86400) > (currentTime % 86400)) {
+            alarmIsValid = false;
+        }
+    }
 }
 
 void EventManager::GetNextAlarmTimestamp(time_t timestamp)
 {
-	AlarmsRecord record;
-	record = DBServiceAPI::AlarmGetNext(this, ((timestamp) % 86400));
+    AlarmsRecord record;
+    record = DBServiceAPI::AlarmGetNext(this, ((timestamp) % 86400));
 
-	if(record.ID != 0)
-	{
-		alarmIsValid = true;
-		alarmTimestamp = record.time;
-		alarmID = record.ID;
-	}
-	else
-	{
-		alarmDBEmpty = true;
-	}
+    if (record.ID != 0) {
+        alarmIsValid   = true;
+        alarmTimestamp = record.time;
+        alarmID        = record.ID;
+    }
+    else {
+        alarmDBEmpty = true;
+    }
 }
diff --git a/module-services/service-evtmgr/harness/Events.hpp b/module-services/service-evtmgr/harness/Events.hpp
index bfb4015bc..716811aa3 100644
--- a/module-services/service-evtmgr/harness/Events.hpp
+++ b/module-services/service-evtmgr/harness/Events.hpp
@@ -20,7 +20,7 @@ namespace harness
         const enum Events evt = type;
         std::shared_ptr<sys::DataMessage> msg; /// msg to send if success
 
-        virtual ~Event() = default;
+        virtual ~Event()                     = default;
         virtual auto encode() -> std::string = 0;
         virtual auto decode(const json11::Json &js) -> bool
         {
@@ -41,8 +41,9 @@ namespace harness
         KeyPress = 0, // -> key press event
         SysStart = 1, // <- system started - EventManager is on
         FocusApp = 2, // <- focus application changed to
-        GSMCmd = 3,   // <-> command to send on cellular command channel, expects data string in ( { ..., Data : "command to execute" }
-        GPIO     = 4, // <-> GPIO request data
+        GSMCmd = 3, // <-> command to send on cellular command channel, expects data string in ( { ..., Data : "command
+                    // to execute" }
+        GPIO = 4,   // <-> GPIO request data
 
         Top, // <- performance monitor message, TODO
 
diff --git a/module-services/service-evtmgr/harness/Parser.cpp b/module-services/service-evtmgr/harness/Parser.cpp
index bbfe10e77..ed14a9f6c 100644
--- a/module-services/service-evtmgr/harness/Parser.cpp
+++ b/module-services/service-evtmgr/harness/Parser.cpp
@@ -21,50 +21,41 @@ namespace harness
         std::string err;
         // TODO measure stack before and after..
         json11::Json el = Json::parse(request, err);
-        if (err.size() != 0 || el.is_object() != true)
-        {
-            LOG_ERROR("%s >> %s : %d : %d : %d", request.c_str(), err.c_str(), el.is_array(), el.is_object(), el.type());
+        if (err.size() != 0 || el.is_object() != true) {
+            LOG_ERROR(
+                "%s >> %s : %d : %d : %d", request.c_str(), err.c_str(), el.is_array(), el.is_object(), el.type());
             return Error::BadRequest;
         }
-        else
-        {
-            if (el[Type].is_null())
-            {
+        else {
+            if (el[Type].is_null()) {
                 std::shared_ptr<sys::DataMessage> ptr = std::shared_ptr<sys::DataMessage>(nullptr);
                 return Error::NoType;
             }
-            switch (el[Type].int_value())
-            {
+            switch (el[Type].int_value()) {
             case (int)Events::KeyPress: {
                 auto evt = events::KeyPress(el);
-                if (evt && evt.msg)
-                {
+                if (evt && evt.msg) {
                     sys::Bus::SendUnicast(evt.msg, "EventManager", serv);
                 }
-            }
-            break;
+            } break;
             case static_cast<int>(Events::GSMCmd): {
                 bool ret = action::gsm_send(serv, el[Data].string_value());
-                if (!ret)
-                {
+                if (!ret) {
                     return Error::ParserFailed;
                 }
-            }
-            break;
+            } break;
             case (int)Events::GPIO: {
                 auto evt = events::GPIO(el);
-                if (!evt)
-                {
+                if (!evt) {
                     LOG_DEBUG("GPIO processing request failed");
                 }
-                else if (evt.msg)
-                {
+                else if (evt.msg) {
                     sys::Bus::SendUnicast(evt.msg, "EventManager", serv);
-                } else {
+                }
+                else {
                     LOG_DEBUG("> evt: %s", evt.encode().c_str());
                 }
-            }
-            break;
+            } break;
             default:
                 break;
             };
diff --git a/module-services/service-evtmgr/harness/actions/CellularCMD.cpp b/module-services/service-evtmgr/harness/actions/CellularCMD.cpp
index 0e6d35f94..e7592bab6 100644
--- a/module-services/service-evtmgr/harness/actions/CellularCMD.cpp
+++ b/module-services/service-evtmgr/harness/actions/CellularCMD.cpp
@@ -8,16 +8,14 @@ namespace harness
     {
         bool gsm_send(sys::Service *serv, const std::string &cmd)
         {
-            auto msg = std::make_shared<cellular::RawCommand>();
+            auto msg     = std::make_shared<cellular::RawCommand>();
             msg->command = cmd;
             msg->timeout = 3000; // TODO - from parameter or defult
-            auto ret = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv);
-            if (ret)
-            {
+            auto ret     = sys::Bus::SendUnicast(msg, ServiceCellular::serviceName, serv);
+            if (ret) {
                 return true;
             }
-            else
-            {
+            else {
                 LOG_ERROR("Failed");
                 return false;
             }
diff --git a/module-services/service-evtmgr/harness/events/AtResponse.hpp b/module-services/service-evtmgr/harness/events/AtResponse.hpp
index f2d4bb13b..c26e1614e 100644
--- a/module-services/service-evtmgr/harness/events/AtResponse.hpp
+++ b/module-services/service-evtmgr/harness/events/AtResponse.hpp
@@ -13,8 +13,7 @@ namespace harness
         virtual std::string encode() final;
         std::vector<std::string> resp;
         AtResponse(const std::vector<std::string> response) : resp(response)
-        {
-        }
+        {}
     };
 
 }; // namespace harness
diff --git a/module-services/service-evtmgr/harness/events/FocusApp.hpp b/module-services/service-evtmgr/harness/events/FocusApp.hpp
index 5a7de3dfe..7b4dabf4e 100644
--- a/module-services/service-evtmgr/harness/events/FocusApp.hpp
+++ b/module-services/service-evtmgr/harness/events/FocusApp.hpp
@@ -8,8 +8,7 @@ namespace harness
     struct FocusApp : public Event<harness::Events::FocusApp>
     {
         FocusApp(const std::string &name) : name(name)
-        {
-        }
+        {}
         std::string name;
         // encoded json event
         virtual std::string encode() final;
diff --git a/module-services/service-evtmgr/harness/events/GPIO.cpp b/module-services/service-evtmgr/harness/events/GPIO.cpp
index 10328eb7a..5703a90f3 100644
--- a/module-services/service-evtmgr/harness/events/GPIO.cpp
+++ b/module-services/service-evtmgr/harness/events/GPIO.cpp
@@ -26,24 +26,20 @@ namespace harness::events
     {
         using namespace bsp::harness;
         auto data = js[Data];
-        if (!data.is_object())
-        {
+        if (!data.is_object()) {
             LOG_ERROR("Bad data type: %d: %s", data.type(), data.string_value().c_str());
             return false;
         }
         // load data one by one
-        for (auto &el : this->data)
-        {
+        for (auto &el : this->data) {
             this->data[el.first] = data[el.first].int_value();
         }
 
-        if (this->data[in_s] == 1)
-        {
+        if (this->data[in_s] == 1) {
             auto val = gpio::read(gpio::to(this->data[num_s]));
             LOG_DEBUG("Pin %d state: %d", gpio::to(this->data[num_s]), val);
         }
-        else
-        {
+        else {
             LOG_DEBUG("Writting gpio: %d state: %d", gpio::to(this->data[num_s]), this->data[state_s]);
             gpio::write(gpio::to(this->data[num_s]), this->data[state_s]);
         }
@@ -54,10 +50,10 @@ namespace harness::events
 
     void GPIO::create_message()
     {
-        auto msg = std::make_shared<sevm::message::GPIO>();
-        msg->num = data[num_s];
-        msg->port = data[state_s];
+        auto msg   = std::make_shared<sevm::message::GPIO>();
+        msg->num   = data[num_s];
+        msg->port  = data[state_s];
         msg->state = data[in_s];
-        this->msg = msg;
+        this->msg  = msg;
     }
 } // namespace harness::events
diff --git a/module-services/service-evtmgr/harness/events/GPIO.hpp b/module-services/service-evtmgr/harness/events/GPIO.hpp
index e8f13a69a..2ed5e0c3f 100644
--- a/module-services/service-evtmgr/harness/events/GPIO.hpp
+++ b/module-services/service-evtmgr/harness/events/GPIO.hpp
@@ -13,10 +13,10 @@ namespace harness::events
         auto decode(const json11::Json &js) -> bool final;
 
       private:
-        static inline const std::string num_s = "num";
+        static inline const std::string num_s   = "num";
         static inline const std::string state_s = "state";
-        static inline const std::string in_s = "in";
-        std::map<std::string, int> data = {{num_s, 0}, {state_s, 0}, {in_s, 0}};
+        static inline const std::string in_s    = "in";
+        std::map<std::string, int> data         = {{num_s, 0}, {state_s, 0}, {in_s, 0}};
         void create_message();
     };
 } // namespace harness::events
diff --git a/module-services/service-evtmgr/harness/events/KeyPress.cpp b/module-services/service-evtmgr/harness/events/KeyPress.cpp
index eaca62344..abf6b930e 100644
--- a/module-services/service-evtmgr/harness/events/KeyPress.cpp
+++ b/module-services/service-evtmgr/harness/events/KeyPress.cpp
@@ -17,9 +17,8 @@ namespace harness::events
     auto KeyPress::decode(const Json &js) -> bool
     {
         auto message = std::make_shared<sevm::KbdMessage>();
-        msg = message;
-        if (js[Data].is_array() != true)
-        {
+        msg          = message;
+        if (js[Data].is_array() != true) {
             return false;
         }
         message->key.key_code = fromVal(js[Data][0].int_value());
@@ -38,8 +37,7 @@ namespace harness::events
 
     auto fromVal(int val) -> bsp::KeyCodes
     {
-        switch (val)
-        {
+        switch (val) {
         case 0:
             return bsp::KeyCodes::NumericKey0;
         case 1:
@@ -94,4 +92,4 @@ namespace harness::events
             return bsp::KeyCodes::Undefined;
         };
     }
-}; // namespace harness
+}; // namespace harness::events
diff --git a/module-services/service-evtmgr/messages/EVMessages.hpp b/module-services/service-evtmgr/messages/EVMessages.hpp
index 31404ba61..6210b5205 100644
--- a/module-services/service-evtmgr/messages/EVMessages.hpp
+++ b/module-services/service-evtmgr/messages/EVMessages.hpp
@@ -18,23 +18,20 @@
 #include "bsp/keyboard/key_codes.hpp"
 #include "common_data/RawKey.hpp"
 
-
-namespace sevm {
+namespace sevm
+{
 
     struct Message : public sys::DataMessage
     {
         Message(MessageType messageType) : DataMessage(messageType)
-        {
-        }
+        {}
         auto Execute(sys::Service *service) -> sys::Message_t override
         {
             // Ignore incoming data message if this service is not yet initialized
-            if (service->isReady)
-            {
+            if (service->isReady) {
                 return service->DataReceivedHandler(this, nullptr);
             }
-            else
-            {
+            else {
                 return std::make_shared<sys::ResponseMessage>();
             }
         }
@@ -56,8 +53,7 @@ namespace sevm {
         {
           public:
             GPIO() : Message(MessageType::EVM_GPIO)
-            {
-            }
+            {}
             uint32_t num = 0, port = 0, state = 0;
         };
     } // namespace message
@@ -70,68 +66,70 @@ namespace sevm {
             type = Type::Data;
         }
         uint8_t levelPercents = 0;
-        bool fullyCharged = false;
-};
-
-class BatteryPlugMessage : public Message
-{
-public:
-  BatteryPlugMessage(MessageType messageType) : Message(messageType)
-  {
-      type = Type::Data;
-	}
-	bool plugged = false;
-};
-
-class RtcMinuteAlarmMessage : public Message
-{
-public:
-  RtcMinuteAlarmMessage(MessageType messageType) : Message(messageType)
-  {
-      type = Type::Data;
-	}
-	uint32_t timestamp = 0;
-};
-
-class SIMMessage : public sys::DataMessage
-{
-  public:
-    SIMMessage() : DataMessage(MessageType::SIMTrayEvent)
-    {
-        type = Type::Data;
-    }
-};
-
-/*
- * @brief Template for all messages that go to application manager
- */
-class EVMMessage: public sys::DataMessage {
-public:
-  EVMMessage(MessageType messageType) : sys::DataMessage(messageType){};
-  ~EVMMessage() override = default;
-};
-
-class EVMFocusApplication : public EVMMessage {
-	std::string application;
-public:
-	EVMFocusApplication( const std::string application ) :
-		EVMMessage( MessageType::EVMFocusApplication),
-		application{ application } {
-	}
-    [[nodiscard]] auto getApplication() const -> const std::string &
-    {
-        return application;
+        bool fullyCharged     = false;
     };
-};
 
-class EVMAlarmSwitchData :public gui::SwitchData
-{
-public:
-  EVMAlarmSwitchData() = default;
-  EVMAlarmSwitchData(uint32_t id) : dbID(id){};
-  ~EVMAlarmSwitchData() override = default;
-  uint32_t dbID = 0;
-};
+    class BatteryPlugMessage : public Message
+    {
+      public:
+        BatteryPlugMessage(MessageType messageType) : Message(messageType)
+        {
+            type = Type::Data;
+        }
+        bool plugged = false;
+    };
+
+    class RtcMinuteAlarmMessage : public Message
+    {
+      public:
+        RtcMinuteAlarmMessage(MessageType messageType) : Message(messageType)
+        {
+            type = Type::Data;
+        }
+        uint32_t timestamp = 0;
+    };
+
+    class SIMMessage : public sys::DataMessage
+    {
+      public:
+        SIMMessage() : DataMessage(MessageType::SIMTrayEvent)
+        {
+            type = Type::Data;
+        }
+    };
+
+    /*
+     * @brief Template for all messages that go to application manager
+     */
+    class EVMMessage : public sys::DataMessage
+    {
+      public:
+        EVMMessage(MessageType messageType) : sys::DataMessage(messageType){};
+        ~EVMMessage() override = default;
+    };
+
+    class EVMFocusApplication : public EVMMessage
+    {
+        std::string application;
+
+      public:
+        EVMFocusApplication(const std::string application)
+            : EVMMessage(MessageType::EVMFocusApplication), application{application}
+        {}
+        [[nodiscard]] auto getApplication() const -> const std::string &
+        {
+            return application;
+        };
+    };
+
+    class EVMAlarmSwitchData : public gui::SwitchData
+    {
+      public:
+        EVMAlarmSwitchData() = default;
+        EVMAlarmSwitchData(uint32_t id) : dbID(id){};
+        ~EVMAlarmSwitchData() override = default;
+        uint32_t dbID                  = 0;
+    };
 } /* namespace sevm*/
 
 #endif /* MODULE_SERVICES_SERVICE_EVTMGR_MESSAGES_EVMESSAGES_HPP_ */
diff --git a/module-services/service-gui/ServiceGUI.cpp b/module-services/service-gui/ServiceGUI.cpp
index 2f612c30e..c982b47d8 100644
--- a/module-services/service-gui/ServiceGUI.cpp
+++ b/module-services/service-gui/ServiceGUI.cpp
@@ -7,20 +7,20 @@
 
 #include <memory>
 
-//module-os
+// module-os
 #include "FreeRTOS.h"
 #include "semphr.h"
 
-//module-gui
+// module-gui
 #include "gui/core/Font.hpp"
 #include "gui/core/Context.hpp"
 #include "gui/input/Translator.hpp"
 
-//gui service
+// gui service
 #include "messages/GUIMessage.hpp"
 #include "messages/DrawMessage.hpp"
 
-//service-eink
+// service-eink
 #include "service-eink/messages/ImageMessage.hpp"
 
 #include "ServiceGUI.hpp"
@@ -30,289 +30,266 @@
 #include "log/log.hpp"
 
 extern "C"
-	#include "memory/usermem.h"
+#include "memory/usermem.h"
 
 #include "SystemManager/SystemManager.hpp"
 #include "WorkerGUI.hpp"
 
-namespace sgui {
+    namespace sgui
+{
 
-static uint32_t getTimeFunction() {
-	return xTaskGetTickCount();
-}
-
-ServiceGUI::ServiceGUI(const std::string& name, std::string parent, uint32_t screenWidth, uint32_t screenHeight)
-		: sys::Service(name, parent, 4096, sys::ServicePriority::Idle),
-		renderContext{ nullptr },
-		transferContext { nullptr },
-		renderFrameCounter{ 1 },
-		transferedFrameCounter{ 0 },
-		screenWidth{ screenWidth },
-		screenHeight{ screenHeight },
-		semCommands{ NULL },
-		worker{nullptr} {
-
-	LOG_INFO("[ServiceGUI] Initializing");
-
-	//allocate buffers for rendering and transferring data to eink
-	renderContext = new gui::Context( screenWidth, screenHeight );
-	transferContext = new gui::Context( screenWidth, screenHeight );
-
-	//load fonts
-	gui::FontManager& fontManager = gui::FontManager::getInstance();
-	fontManager.init( "sys/assets" );
-
-	//load images
-	gui::ImageManager& imageManager = gui::ImageManager::getInstance();
-	imageManager.init( "sys/assets" );
-}
-
-ServiceGUI::~ServiceGUI(){
-	LOG_INFO("[ServiceGUI] Cleaning resources");
-	if( renderContext )
-		delete renderContext;
-	if( transferContext )
-		delete transferContext;
-
-	worker->deinit();
-
-	gui::ImageManager::getInstance().clear();
-	gui::FontManager::getInstance().clear();
-
-}
-
-void ServiceGUI::sendBuffer() {
-	//copy data from render context to transfer context
-	transferContext->insert( 0, 0, renderContext );
-
-	auto msg = std::make_shared<seink::ImageMessage>( 0, 0,
-			transferContext->getW(),
-			transferContext->getH(),
-			(mode==gui::RefreshModes::GUI_REFRESH_DEEP?true:false),
-			transferContext->getData(),
-			suspendInProgress,
-			shutdownInProgress
-	);
-	einkReady = false;
-	auto ret = sys::Bus::SendUnicast(msg, "ServiceEink", this,2000);
-	if( ret.first == sys::ReturnCodes::Success ) {
-		transferedFrameCounter = renderFrameCounter;
-	}
-	//set default refreshing mode.
-	mode = gui::RefreshModes::GUI_REFRESH_FAST;
-
-}
-
-void ServiceGUI::sendToRender() {
-	rendering = true;
-	worker->send(static_cast<uint32_t>(WorkerGUICommands::Render), NULL);
-}
-
-
-// Invoked upon receiving data message
-sys::Message_t ServiceGUI::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) {
-
-	sgui::GUIMessage* msg = static_cast<sgui::GUIMessage*>(msgl);
-
-	switch( msg->messageType ) {
-    case MessageType::MessageTypeUninitialized: {
-        //			LOG_ERROR("[ServiceGUI] Received uninitialized message type");
+    static uint32_t getTimeFunction()
+    {
+        return xTaskGetTickCount();
     }
-    break;
-    case MessageType::GUICommands: {
-        //			LOG_INFO("[%s] GUICommands", GetName().c_str());
-        auto dmsg = static_cast<sgui::DrawMessage *>(msgl);
-        if (!dmsg->commands.empty())
-        {
 
-            // if suspend flag is set ignore any new message
-            if (!suspendInProgress)
-            {
+    ServiceGUI::ServiceGUI(const std::string &name, std::string parent, uint32_t screenWidth, uint32_t screenHeight)
+        : sys::Service(name, parent, 4096, sys::ServicePriority::Idle), renderContext{nullptr},
+          transferContext{nullptr}, renderFrameCounter{1}, transferedFrameCounter{0}, screenWidth{screenWidth},
+          screenHeight{screenHeight}, semCommands{NULL}, worker{nullptr}
+    {
 
-                if (dmsg->command == sgui::DrawMessage::DrawCommand::SHUTDOWN)
-                {
-                    LOG_WARN("Shutdown - received shutdown draw commands");
-                    shutdownInProgress = true;
-                }
+        LOG_INFO("[ServiceGUI] Initializing");
 
-                // if message carries suspend flag set flag in service and proceed
-                if (dmsg->command == sgui::DrawMessage::DrawCommand::SUSPEND)
-                {
-                    LOG_WARN("Suspended - received suspend draw commands");
-                    suspendInProgress = true;
-                }
+        // allocate buffers for rendering and transferring data to eink
+        renderContext   = new gui::Context(screenWidth, screenHeight);
+        transferContext = new gui::Context(screenWidth, screenHeight);
 
-                // update mode
-                if (dmsg->mode == gui::RefreshModes::GUI_REFRESH_DEEP)
-                {
-                    mode = dmsg->mode;
-                }
+        // load fonts
+        gui::FontManager &fontManager = gui::FontManager::getInstance();
+        fontManager.init("sys/assets");
 
-                //				LOG_INFO("[ServiceGUI] Received %d draw commands", dmsg->commands.size());
-
-                // lock access to commands vector, clear it and then copy commands from message to vector
-                if (xSemaphoreTake(semCommands, pdMS_TO_TICKS(1000)) == pdTRUE)
-                {
-                    commands.clear();
-                    for (auto it = dmsg->commands.begin(); it != dmsg->commands.end(); it++)
-                        commands.push_back(std::move(*it));
-                    xSemaphoreGive(semCommands);
-                }
-                else
-                {
-                    LOG_ERROR("Failed to acquire semaphore");
-                }
-
-                // if worker is not rendering send him new set of commands
-                if (!rendering)
-                {
-                    sendToRender();
-                }
-                else
-                {
-                    //						LOG_ERROR("Already rendering");
-                }
-
-                //				uint32_t mem = usermemGetFreeHeapSize();
-                //				LOG_WARN( "Heap Memory: %d", mem );
-            }
-            else
-            {
-                LOG_WARN("Suspended - ignoring draw commands");
-            }
-        }
+        // load images
+        gui::ImageManager &imageManager = gui::ImageManager::getInstance();
+        imageManager.init("sys/assets");
     }
-    break;
-    case MessageType::GUIRenderingFinished: {
-        //			LOG_INFO("[%s] GUIRenderingFinished", GetName().c_str());
-        // increment counter holding number of drawn frames
-        rendering = false;
-        renderFrameCounter++;
-        // copy render buffer to transfer buffer using semaphore to protect data
-        // gui service is locking semaphore, makes a copy and then sends message to eink
 
-        if (einkReady)
-        {
-            sendBuffer();
+    ServiceGUI::~ServiceGUI()
+    {
+        LOG_INFO("[ServiceGUI] Cleaning resources");
+        if (renderContext)
+            delete renderContext;
+        if (transferContext)
+            delete transferContext;
+
+        worker->deinit();
+
+        gui::ImageManager::getInstance().clear();
+        gui::FontManager::getInstance().clear();
+    }
+
+    void ServiceGUI::sendBuffer()
+    {
+        // copy data from render context to transfer context
+        transferContext->insert(0, 0, renderContext);
+
+        auto msg  = std::make_shared<seink::ImageMessage>(0,
+                                                         0,
+                                                         transferContext->getW(),
+                                                         transferContext->getH(),
+                                                         (mode == gui::RefreshModes::GUI_REFRESH_DEEP ? true : false),
+                                                         transferContext->getData(),
+                                                         suspendInProgress,
+                                                         shutdownInProgress);
+        einkReady = false;
+        auto ret  = sys::Bus::SendUnicast(msg, "ServiceEink", this, 2000);
+        if (ret.first == sys::ReturnCodes::Success) {
+            transferedFrameCounter = renderFrameCounter;
         }
-        else if (!requestSent)
-        {
+        // set default refreshing mode.
+        mode = gui::RefreshModes::GUI_REFRESH_FAST;
+    }
+
+    void ServiceGUI::sendToRender()
+    {
+        rendering = true;
+        worker->send(static_cast<uint32_t>(WorkerGUICommands::Render), NULL);
+    }
+
+    // Invoked upon receiving data message
+    sys::Message_t ServiceGUI::DataReceivedHandler(sys::DataMessage * msgl, sys::ResponseMessage * resp)
+    {
+
+        sgui::GUIMessage *msg = static_cast<sgui::GUIMessage *>(msgl);
+
+        switch (msg->messageType) {
+        case MessageType::MessageTypeUninitialized: {
+            //			LOG_ERROR("[ServiceGUI] Received uninitialized message type");
+        } break;
+        case MessageType::GUICommands: {
+            //			LOG_INFO("[%s] GUICommands", GetName().c_str());
+            auto dmsg = static_cast<sgui::DrawMessage *>(msgl);
+            if (!dmsg->commands.empty()) {
+
+                // if suspend flag is set ignore any new message
+                if (!suspendInProgress) {
+
+                    if (dmsg->command == sgui::DrawMessage::DrawCommand::SHUTDOWN) {
+                        LOG_WARN("Shutdown - received shutdown draw commands");
+                        shutdownInProgress = true;
+                    }
+
+                    // if message carries suspend flag set flag in service and proceed
+                    if (dmsg->command == sgui::DrawMessage::DrawCommand::SUSPEND) {
+                        LOG_WARN("Suspended - received suspend draw commands");
+                        suspendInProgress = true;
+                    }
+
+                    // update mode
+                    if (dmsg->mode == gui::RefreshModes::GUI_REFRESH_DEEP) {
+                        mode = dmsg->mode;
+                    }
+
+                    //				LOG_INFO("[ServiceGUI] Received %d draw commands", dmsg->commands.size());
+
+                    // lock access to commands vector, clear it and then copy commands from message to vector
+                    if (xSemaphoreTake(semCommands, pdMS_TO_TICKS(1000)) == pdTRUE) {
+                        commands.clear();
+                        for (auto it = dmsg->commands.begin(); it != dmsg->commands.end(); it++)
+                            commands.push_back(std::move(*it));
+                        xSemaphoreGive(semCommands);
+                    }
+                    else {
+                        LOG_ERROR("Failed to acquire semaphore");
+                    }
+
+                    // if worker is not rendering send him new set of commands
+                    if (!rendering) {
+                        sendToRender();
+                    }
+                    else {
+                        //						LOG_ERROR("Already rendering");
+                    }
+
+                    //				uint32_t mem = usermemGetFreeHeapSize();
+                    //				LOG_WARN( "Heap Memory: %d", mem );
+                }
+                else {
+                    LOG_WARN("Suspended - ignoring draw commands");
+                }
+            }
+        } break;
+        case MessageType::GUIRenderingFinished: {
+            //			LOG_INFO("[%s] GUIRenderingFinished", GetName().c_str());
+            // increment counter holding number of drawn frames
+            rendering = false;
+            renderFrameCounter++;
+            // copy render buffer to transfer buffer using semaphore to protect data
+            // gui service is locking semaphore, makes a copy and then sends message to eink
+
+            if (einkReady) {
+                sendBuffer();
+            }
+            else if (!requestSent) {
+                requestSent = true;
+                // request eink state
+                auto msg = std::make_shared<seink::EinkMessage>(MessageType::EinkStateRequest);
+                sys::Bus::SendUnicast(msg, "ServiceEink", this);
+            }
+        } break;
+        case MessageType::GUIFocusInfo: {
+            //			LOG_INFO("[%s] GUIFocusInfo", GetName().c_str());
+        } break;
+        case MessageType::GUIDisplayReady: {
+            //			LOG_INFO("[%s] GUIDisplayReady", GetName().c_str());
+            einkReady   = true;
+            requestSent = false;
+
+            if (msg->getShutdown()) {
+                einkReady         = false;
+                suspendInProgress = false;
+                LOG_DEBUG("last rendering before shutdown finished.");
+
+                sys::SystemManager::CloseSystem(this);
+            }
+
+            if (msg->getSuspend()) {
+                einkReady         = false;
+                suspendInProgress = false;
+                LOG_DEBUG("last rendering before suspend is finished.");
+
+                sapm::ApplicationManager::messageInitPowerSaveMode(this);
+            }
+            // mode = gui::RefreshModes::GUI_REFRESH_FAST;
+            // check if something new was rendered. If so render counter has greater value than
+            // transfer counter.
+            if ((renderFrameCounter != transferedFrameCounter) && (!rendering)) {
+                //				LOG_INFO("[ServiceGUI]Sending buffer");
+                sendBuffer();
+            }
+            else {
+                //				LOG_INFO(" NO new buffer to send");
+            }
+
+            // check if there are pending commands to render.
+            if (commands.empty() == false) {
+                //				LOG_INFO("Rendering pending %d commands", commands.size());
+                sendToRender();
+            }
+        } break;
+        default:
+            break;
+        };
+
+        return std::make_shared<sys::ResponseMessage>();
+    }
+
+    // Invoked when timer ticked
+    void ServiceGUI::TickHandler(uint32_t id)
+    {}
+
+    // Invoked during initialization
+    sys::ReturnCodes ServiceGUI::InitHandler()
+    {
+
+        // set function for acquiring time in seconds from the system
+        gui::setTimeFunction(getTimeFunction);
+
+        // create semaphore to protect vector with commands waiting for rendering
+        semCommands = xSemaphoreCreateBinary();
+        if (semCommands == NULL) {
+            LOG_FATAL("Failed to create commands semaphore.");
+            return sys::ReturnCodes::Failure;
+        }
+        xSemaphoreGive(semCommands);
+
+        // initialize gui worker
+        worker = new WorkerGUI(this);
+        std::list<sys::WorkerQueueInfo> list;
+        worker->init(list);
+        worker->run();
+
+        if (einkReady == false) {
             requestSent = true;
-            // request eink state
-            auto msg = std::make_shared<seink::EinkMessage>(MessageType::EinkStateRequest);
+            auto msg    = std::make_shared<seink::EinkMessage>(MessageType::EinkStateRequest);
             sys::Bus::SendUnicast(msg, "ServiceEink", this);
         }
+        return sys::ReturnCodes::Success;
     }
-    break;
-    case MessageType::GUIFocusInfo: {
-        //			LOG_INFO("[%s] GUIFocusInfo", GetName().c_str());
+
+    sys::ReturnCodes ServiceGUI::DeinitHandler()
+    {
+
+        if (semCommands != NULL)
+            vSemaphoreDelete(semCommands);
+        semCommands = NULL;
+
+        return sys::ReturnCodes::Success;
     }
-    break;
-    case MessageType::GUIDisplayReady: {
-        //			LOG_INFO("[%s] GUIDisplayReady", GetName().c_str());
-        einkReady = true;
-        requestSent = false;
 
-        if (msg->getShutdown())
-        {
-            einkReady = false;
-            suspendInProgress = false;
-            LOG_DEBUG("last rendering before shutdown finished.");
+    sys::ReturnCodes ServiceGUI::SwitchPowerModeHandler(const sys::ServicePowerMode mode)
+    {
+        LOG_FATAL("[ServiceGUI] PowerModeHandler: %d", static_cast<uint32_t>(mode));
 
-            sys::SystemManager::CloseSystem(this);
-        }
-
-        if (msg->getSuspend())
-        {
-            einkReady = false;
-            suspendInProgress = false;
-            LOG_DEBUG("last rendering before suspend is finished.");
-
-            sapm::ApplicationManager::messageInitPowerSaveMode(this);
-        }
-        // mode = gui::RefreshModes::GUI_REFRESH_FAST;
-        // check if something new was rendered. If so render counter has greater value than
-        // transfer counter.
-        if ((renderFrameCounter != transferedFrameCounter) && (!rendering))
-        {
-            //				LOG_INFO("[ServiceGUI]Sending buffer");
-            sendBuffer();
-        }
-        else
-        {
-            //				LOG_INFO(" NO new buffer to send");
-        }
-
-        // check if there are pending commands to render.
-        if (commands.empty() == false)
-        {
-            //				LOG_INFO("Rendering pending %d commands", commands.size());
-            sendToRender();
-        }
-    }
-    break;
-    default:
-        break;
-    };
-
-	return std::make_shared<sys::ResponseMessage>();
-}
-
-// Invoked when timer ticked
-void ServiceGUI::TickHandler(uint32_t id) {
-}
-
-// Invoked during initialization
-sys::ReturnCodes ServiceGUI::InitHandler() {
-
-	//set function for acquiring time in seconds from the system
-	gui::setTimeFunction( getTimeFunction );
-
-	//create semaphore to protect vector with commands waiting for rendering
-	semCommands = xSemaphoreCreateBinary();
-	if( semCommands == NULL ) {
-		LOG_FATAL("Failed to create commands semaphore.");
-		return sys::ReturnCodes::Failure;
-	}
-	xSemaphoreGive( semCommands );
-
-	//initialize gui worker
-	worker = new WorkerGUI( this );
-	std::list<sys::WorkerQueueInfo> list;
-	worker->init( list );
-	worker->run();
-
-	if( einkReady == false ) {
-		requestSent = true;
-		auto msg = std::make_shared<seink::EinkMessage>(MessageType::EinkStateRequest );
-		sys::Bus::SendUnicast(msg, "ServiceEink", this);
-	}
-	return sys::ReturnCodes::Success;
-}
-
-sys::ReturnCodes ServiceGUI::DeinitHandler() {
-
-	if( semCommands != NULL )
-		vSemaphoreDelete( semCommands );
-	semCommands = NULL;
-
-	return sys::ReturnCodes::Success;
-}
-
-sys::ReturnCodes ServiceGUI::SwitchPowerModeHandler(const sys::ServicePowerMode mode) {
-    LOG_FATAL("[ServiceGUI] PowerModeHandler: %d", static_cast<uint32_t>(mode));
-
-    switch (mode){
+        switch (mode) {
         case sys::ServicePowerMode ::Active:
             break;
         case sys::ServicePowerMode ::SuspendToRAM:
         case sys::ServicePowerMode ::SuspendToNVM:
             break;
+        }
+
+        return sys::ReturnCodes::Success;
     }
 
-    return sys::ReturnCodes::Success;
-}
-
 } /* namespace sgui */
-
-
diff --git a/module-services/service-gui/ServiceGUI.hpp b/module-services/service-gui/ServiceGUI.hpp
index 0cbe9a925..b304d27d6 100644
--- a/module-services/service-gui/ServiceGUI.hpp
+++ b/module-services/service-gui/ServiceGUI.hpp
@@ -10,7 +10,7 @@
 
 #include <memory>
 
-//module-gui
+// module-gui
 #include "gui/core/Context.hpp"
 #include "gui/core/Renderer.hpp"
 #include "gui/input/Translator.hpp"
@@ -20,69 +20,75 @@
 #include "Service/Message.hpp"
 #include "WorkerGUI.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-class WorkerGUI;
+    class WorkerGUI;
 
-class ServiceGUI: public sys::Service {
-	friend WorkerGUI;
-protected:
-	//this is where every incomming frame is painted.
-	gui::Context* renderContext;
-	//this buffer is provided to eink
-	gui::Context* transferContext;
-	//ID of the last rendered frame
-	uint32_t renderFrameCounter;
-	//ID of the last frame sent to eink for rendering
-	uint32_t transferedFrameCounter;
-	//Horizontal size of the screen in pixels
-	uint32_t screenWidth;
-	//vertical size of the screen in pixels
-	uint32_t screenHeight;
-	//object responsible for rendering images to context
-	gui::Renderer renderer;
-	//flag that defines whether eink is ready for new frame buffer
-	volatile bool einkReady = false;
-	volatile bool requestSent = false;
-	volatile bool rendering = false;
-	//set of commands recently received. If this vector is not empty and new set of commands is received
-	//previous commands are removed.
-	std::vector<std::unique_ptr<gui::DrawCommand>> commands;
-//	uint32_t timer_id= 0;
-	gui::RefreshModes mode = gui::RefreshModes::GUI_REFRESH_DEEP;
+    class ServiceGUI : public sys::Service
+    {
+        friend WorkerGUI;
 
-	//semaphore used to protect commands vector while commands are taken from service to worker.
-	SemaphoreHandle_t semCommands;
+      protected:
+        // this is where every incomming frame is painted.
+        gui::Context *renderContext;
+        // this buffer is provided to eink
+        gui::Context *transferContext;
+        // ID of the last rendered frame
+        uint32_t renderFrameCounter;
+        // ID of the last frame sent to eink for rendering
+        uint32_t transferedFrameCounter;
+        // Horizontal size of the screen in pixels
+        uint32_t screenWidth;
+        // vertical size of the screen in pixels
+        uint32_t screenHeight;
+        // object responsible for rendering images to context
+        gui::Renderer renderer;
+        // flag that defines whether eink is ready for new frame buffer
+        volatile bool einkReady   = false;
+        volatile bool requestSent = false;
+        volatile bool rendering   = false;
+        // set of commands recently received. If this vector is not empty and new set of commands is received
+        // previous commands are removed.
+        std::vector<std::unique_ptr<gui::DrawCommand>> commands;
+        //	uint32_t timer_id= 0;
+        gui::RefreshModes mode = gui::RefreshModes::GUI_REFRESH_DEEP;
 
-	WorkerGUI* worker;
+        // semaphore used to protect commands vector while commands are taken from service to worker.
+        SemaphoreHandle_t semCommands;
 
-	/**
-	 * Flag controls process of redrawing screen when suspend is in progress.
-	 */
-	bool suspendInProgress = false;
-	/**
-	 * Flag controls process of redrawing screen when phone is shutting down.
-	 */
-	bool shutdownInProgress = false;
+        WorkerGUI *worker;
 
-	void sendBuffer();
-	void sendToRender();
+        /**
+         * Flag controls process of redrawing screen when suspend is in progress.
+         */
+        bool suspendInProgress = false;
+        /**
+         * Flag controls process of redrawing screen when phone is shutting down.
+         */
+        bool shutdownInProgress = false;
 
-public:
-    ServiceGUI(const std::string& name, std::string parent = "", uint32_t screenWidth = 480, uint32_t screenHeight = 600 );
-    ~ServiceGUI();
+        void sendBuffer();
+        void sendToRender();
 
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
-    // Invoked when timer ticked
-    void TickHandler(uint32_t id) override;
+      public:
+        ServiceGUI(const std::string &name,
+                   std::string parent    = "",
+                   uint32_t screenWidth  = 480,
+                   uint32_t screenHeight = 600);
+        ~ServiceGUI();
 
-    // Invoked during initialization
-    sys::ReturnCodes InitHandler() override;
+        sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
+        // Invoked when timer ticked
+        void TickHandler(uint32_t id) override;
 
-    sys::ReturnCodes DeinitHandler() override;
+        // Invoked during initialization
+        sys::ReturnCodes InitHandler() override;
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
-};
+        sys::ReturnCodes DeinitHandler() override;
+
+        sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final;
+    };
 
 } /* namespace sgui */
 
diff --git a/module-services/service-gui/WorkerGUI.cpp b/module-services/service-gui/WorkerGUI.cpp
index fade500a4..0bc39eff4 100644
--- a/module-services/service-gui/WorkerGUI.cpp
+++ b/module-services/service-gui/WorkerGUI.cpp
@@ -8,72 +8,72 @@
  */
 #include <string.h>
 
-extern "C" {
-	#include "FreeRTOS.h"
-	#include "task.h"
+extern "C"
+{
+#include "FreeRTOS.h"
+#include "task.h"
 }
 
-
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
 #include "Service/Worker.hpp"
 #include "MessageType.hpp"
 #include "WorkerGUI.hpp"
-//module-utils
+// module-utils
 #include "log/log.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-WorkerGUI::WorkerGUI( ServiceGUI* service ) : Worker( service ) {
+    WorkerGUI::WorkerGUI(ServiceGUI *service) : Worker(service)
+    {}
 
-}
+    WorkerGUI::~WorkerGUI()
+    {}
 
-WorkerGUI::~WorkerGUI() {
-}
+    bool WorkerGUI::handleMessage(uint32_t queueID)
+    {
+        QueueHandle_t queue = queues[queueID];
 
-bool WorkerGUI::handleMessage( uint32_t queueID ) {
-	QueueHandle_t queue = queues[queueID];
+        sgui::ServiceGUI *serviceGUI = reinterpret_cast<sgui::ServiceGUI *>(service);
 
-	sgui::ServiceGUI* serviceGUI = reinterpret_cast<sgui::ServiceGUI*>(service);
+        // queue for receiving rendering commands
+        if (queueID == 0) {
+            //		LOG_INFO("Received rendering commands");
 
-	//queue for receiving rendering commands
-	if( queueID == 0 )
-	{
-//		LOG_INFO("Received rendering commands");
+            sys::WorkerCommand received;
+            xQueueReceive(queue, &received, 0);
 
-		sys::WorkerCommand received;
-		xQueueReceive(queue, &received, 0);
+            // take all unique pointers
+            std::vector<std::unique_ptr<gui::DrawCommand>> uniqueCommands;
 
-		//take all unique pointers
-		std::vector<std::unique_ptr<gui::DrawCommand>> uniqueCommands;
+            if (xSemaphoreTake(serviceGUI->semCommands, pdMS_TO_TICKS(1000)) == pdTRUE) {
+                for (auto it = serviceGUI->commands.begin(); it != serviceGUI->commands.end(); it++)
+                    uniqueCommands.push_back(std::move(*it));
+                serviceGUI->commands.clear();
+                xSemaphoreGive(serviceGUI->semCommands);
+            }
+            else {
+                LOG_ERROR("Failed to acquire semaphore");
+            }
 
-		if( xSemaphoreTake( serviceGUI->semCommands, pdMS_TO_TICKS(1000) ) == pdTRUE ) {
-			for( auto it = serviceGUI->commands.begin(); it != serviceGUI->commands.end(); it++ )
-				uniqueCommands.push_back(std::move(*it));
-			serviceGUI->commands.clear();
-			xSemaphoreGive( serviceGUI->semCommands );
-		}
-		else {
-			LOG_ERROR("Failed to acquire semaphore");
-		}
+            // create temporary vector of pointers to draw commands to avoid polluting renderer with smart pointers.
+            std::vector<gui::DrawCommand *> commands;
+            for (auto it = uniqueCommands.begin(); it != uniqueCommands.end(); it++)
+                commands.push_back((*it).get());
 
-		//create temporary vector of pointers to draw commands to avoid polluting renderer with smart pointers.
-		std::vector<gui::DrawCommand*> commands;
-		for (auto it = uniqueCommands.begin(); it != uniqueCommands.end(); it++)
-			commands.push_back( (*it).get() );
+            //		uint32_t start_tick = xTaskGetTickCount();
+            serviceGUI->renderer.render(serviceGUI->renderContext, commands);
+            //		uint32_t end_tick = xTaskGetTickCount();
+            //		LOG_INFO("[WorkerGUI] RenderingTime: %d", end_tick - start_tick);
 
-//		uint32_t start_tick = xTaskGetTickCount();
-		serviceGUI->renderer.render( serviceGUI->renderContext, commands );
-//		uint32_t end_tick = xTaskGetTickCount();
-//		LOG_INFO("[WorkerGUI] RenderingTime: %d", end_tick - start_tick);
+            //			delete received;
 
-//			delete received;
-
-		//notify gui service that rendering is complete
-        auto message = std::make_shared<sys::DataMessage>(MessageType::GUIRenderingFinished);
-        sys::Bus::SendUnicast(message, this->service->GetName(), this->service);
-	}
-	return true;
-}
+            // notify gui service that rendering is complete
+            auto message = std::make_shared<sys::DataMessage>(MessageType::GUIRenderingFinished);
+            sys::Bus::SendUnicast(message, this->service->GetName(), this->service);
+        }
+        return true;
+    }
 
 } /* namespace sgui */
diff --git a/module-services/service-gui/WorkerGUI.hpp b/module-services/service-gui/WorkerGUI.hpp
index 200c02a92..efc8fe29b 100644
--- a/module-services/service-gui/WorkerGUI.hpp
+++ b/module-services/service-gui/WorkerGUI.hpp
@@ -16,31 +16,35 @@
 #include "Service/Worker.hpp"
 #include "gui/core/Renderer.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-class ServiceGUI;
+    class ServiceGUI;
 
-enum class WorkerGUICommands {
-	Finish,
-	Render,
-//	RenderSuspend
-};
+    enum class WorkerGUICommands
+    {
+        Finish,
+        Render,
+        //	RenderSuspend
+    };
 
-/*
- *
- */
-class WorkerGUI: public sys::Worker {
-	//object responsible for rendering images to context
-	gui::Renderer renderer;
-public:
-	WorkerGUI( ServiceGUI* service );
-	virtual ~WorkerGUI();
+    /*
+     *
+     */
+    class WorkerGUI : public sys::Worker
+    {
+        // object responsible for rendering images to context
+        gui::Renderer renderer;
 
-	/**
-	 * virtual method responsible for finishing the worker and handling rendering commands
-	 */
-	bool handleMessage( uint32_t queueID ) override;
-};
+      public:
+        WorkerGUI(ServiceGUI *service);
+        virtual ~WorkerGUI();
+
+        /**
+         * virtual method responsible for finishing the worker and handling rendering commands
+         */
+        bool handleMessage(uint32_t queueID) override;
+    };
 
 } /* namespace sgui */
 
diff --git a/module-services/service-gui/messages/DrawMessage.cpp b/module-services/service-gui/messages/DrawMessage.cpp
index 409cae535..68be3aa9f 100644
--- a/module-services/service-gui/messages/DrawMessage.cpp
+++ b/module-services/service-gui/messages/DrawMessage.cpp
@@ -10,20 +10,21 @@
 #include "DrawMessage.hpp"
 #include "MessageType.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-DrawMessage::DrawMessage( const std::list< gui::DrawCommand* >& commandsList, gui::RefreshModes mode, DrawCommand cmd ) :
-	GUIMessage(MessageType::GUICommands),
-	command{ cmd } {
+    DrawMessage::DrawMessage(const std::list<gui::DrawCommand *> &commandsList, gui::RefreshModes mode, DrawCommand cmd)
+        : GUIMessage(MessageType::GUICommands), command{cmd}
+    {
 
-	this->mode = mode;
-	for( auto cmd : commandsList ) {
-		if( cmd )
-			commands.push_back( std::unique_ptr<gui::DrawCommand>(cmd));
-	}
-}
+        this->mode = mode;
+        for (auto cmd : commandsList) {
+            if (cmd)
+                commands.push_back(std::unique_ptr<gui::DrawCommand>(cmd));
+        }
+    }
 
-DrawMessage::~DrawMessage() {
-}
+    DrawMessage::~DrawMessage()
+    {}
 
 } /* namespace sgui */
diff --git a/module-services/service-gui/messages/DrawMessage.hpp b/module-services/service-gui/messages/DrawMessage.hpp
index 17bd91fe1..0bd94d747 100644
--- a/module-services/service-gui/messages/DrawMessage.hpp
+++ b/module-services/service-gui/messages/DrawMessage.hpp
@@ -17,30 +17,36 @@
 #include "GUIMessage.hpp"
 #include "gui/Common.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-/*
- *
- */
-class DrawMessage: public GUIMessage {
-public:
-	enum class DrawCommand {
-		NORMAL,
-		SUSPEND,
-		SHUTDOWN
-	};
-public:
-	gui::RefreshModes mode;
-	std::list< std::unique_ptr< gui::DrawCommand > > commands;
+    /*
+     *
+     */
+    class DrawMessage : public GUIMessage
+    {
+      public:
+        enum class DrawCommand
+        {
+            NORMAL,
+            SUSPEND,
+            SHUTDOWN
+        };
 
-	/**
-	 * flag that informs that this is last rendering before suspending system.
-	 */
-	DrawCommand command = DrawCommand::NORMAL;
+      public:
+        gui::RefreshModes mode;
+        std::list<std::unique_ptr<gui::DrawCommand>> commands;
 
-	DrawMessage( const std::list< gui::DrawCommand* >& commandsList, gui::RefreshModes mode, DrawCommand cmd = DrawCommand::NORMAL );
-	virtual ~DrawMessage();
-};
+        /**
+         * flag that informs that this is last rendering before suspending system.
+         */
+        DrawCommand command = DrawCommand::NORMAL;
+
+        DrawMessage(const std::list<gui::DrawCommand *> &commandsList,
+                    gui::RefreshModes mode,
+                    DrawCommand cmd = DrawCommand::NORMAL);
+        virtual ~DrawMessage();
+    };
 
 } /* namespace sgui */
 
diff --git a/module-services/service-gui/messages/GUIMessage.hpp b/module-services/service-gui/messages/GUIMessage.hpp
index 029e052b0..5ea493dfa 100644
--- a/module-services/service-gui/messages/GUIMessage.hpp
+++ b/module-services/service-gui/messages/GUIMessage.hpp
@@ -13,22 +13,30 @@
 #include "core/DrawCommand.hpp"
 #include "MessageType.hpp"
 
-namespace sgui {
+namespace sgui
+{
 
-/*
- * @brief Template for all messages that go to gui service
- */
-class GUIMessage: public sys::DataMessage {
-	bool suspend = false;
-	bool shutdown = false;
-public:
-  GUIMessage(MessageType messageType, bool suspend = false, bool shutdown = false) : sys::DataMessage(messageType), suspend{suspend}, shutdown{shutdown} {};
-  virtual ~GUIMessage(){};
-  bool getSuspend()
-  {
-      return suspend; };
-	bool getShutdown() { return shutdown; };
-};
+    /*
+     * @brief Template for all messages that go to gui service
+     */
+    class GUIMessage : public sys::DataMessage
+    {
+        bool suspend  = false;
+        bool shutdown = false;
+
+      public:
+        GUIMessage(MessageType messageType, bool suspend = false, bool shutdown = false)
+            : sys::DataMessage(messageType), suspend{suspend}, shutdown{shutdown} {};
+        virtual ~GUIMessage(){};
+        bool getSuspend()
+        {
+            return suspend;
+        };
+        bool getShutdown()
+        {
+            return shutdown;
+        };
+    };
 
 } /* namespace sgui */
 
diff --git a/module-services/service-lwip/ServiceLwIP.cpp b/module-services/service-lwip/ServiceLwIP.cpp
index 820672073..92e51710d 100644
--- a/module-services/service-lwip/ServiceLwIP.cpp
+++ b/module-services/service-lwip/ServiceLwIP.cpp
@@ -4,7 +4,8 @@
 #include "Service/Message.hpp"
 #include "Service/Service.hpp"
 
-extern "C" {
+extern "C"
+{
 #include "dhcp-server/dhserver.h"
 #include "lwip/apps/httpd.h"
 #include "lwip/init.h"
@@ -12,26 +13,24 @@ extern "C" {
 #include "lwip/tcpip.h"
 };
 
-
 #define NUM_DHCP_ENTRY 3
 
-extern "C" {
-static dhcp_entry_t entries[NUM_DHCP_ENTRY] =
+extern "C"
 {
-    /* mac    ip address        subnet mask        lease time */
-    { {0}, {192, 168, 7, 2}, {255, 255, 255, 0}, 24 * 60 * 60 },
-    { {0}, {192, 168, 7, 3}, {255, 255, 255, 0}, 24 * 60 * 60 },
-    { {0}, {192, 168, 7, 4}, {255, 255, 255, 0}, 24 * 60 * 60 }
-};
+    static dhcp_entry_t entries[NUM_DHCP_ENTRY] = {
+        /* mac    ip address        subnet mask        lease time */
+        {{0}, {192, 168, 7, 2}, {255, 255, 255, 0}, 24 * 60 * 60},
+        {{0}, {192, 168, 7, 3}, {255, 255, 255, 0}, 24 * 60 * 60},
+        {{0}, {192, 168, 7, 4}, {255, 255, 255, 0}, 24 * 60 * 60}};
 
-static dhcp_config_t dhcp_config =
-{
-    {192, 168, 7, 1}, 67, /* server address, port */
-    {0, 0, 0, 0},         /* dns server */
-    NULL,                /* dns suffix */
-    NUM_DHCP_ENTRY,       /* num entry */
-    entries               /* entries */
-};
+    static dhcp_config_t dhcp_config = {
+        {192, 168, 7, 1},
+        67,             /* server address, port */
+        {0, 0, 0, 0},   /* dns server */
+        NULL,           /* dns suffix */
+        NUM_DHCP_ENTRY, /* num entry */
+        entries         /* entries */
+    };
 };
 
 sys::ReturnCodes message_lwip(sys::Service *app, LwIP_message::Request req)
@@ -53,14 +52,14 @@ ServiceLwIP::ServiceLwIP() : sys::Service(serviceName)
     ReloadTimer(testTimerID);
 
     LOG_INFO("Start lwip!");
-                tcpip_init(nullptr,nullptr);
-                // lwip_init();
-                dhserv_init(&dhcp_config);
-                httpd_init();
-
+    tcpip_init(nullptr, nullptr);
+    // lwip_init();
+    dhserv_init(&dhcp_config);
+    httpd_init();
 }
 
-void ServiceLwIP::TickHandler(uint32_t id) {}
+void ServiceLwIP::TickHandler(uint32_t id)
+{}
 
 sys::ReturnCodes ServiceLwIP::InitHandler()
 {
@@ -74,7 +73,6 @@ sys::ReturnCodes ServiceLwIP::DeinitHandler()
     return sys::ReturnCodes::Success;
 }
 
-
 sys::Message_t ServiceLwIP::DataReceivedHandler(sys::DataMessage *msg, sys::ResponseMessage *resp)
 {
     LOG_ERROR("TRY START LWIP");
@@ -85,7 +83,7 @@ sys::Message_t ServiceLwIP::DataReceivedHandler(sys::DataMessage *msg, sys::Resp
             switch (lmsg->req) {
             case LwIP_message::Request::Start:
                 LOG_ERROR("START LWIP");
-                tcpip_init(nullptr,nullptr);
+                tcpip_init(nullptr, nullptr);
                 // lwip_init();
                 dhserv_init(&dhcp_config);
                 httpd_init();
diff --git a/module-services/service-lwip/ServiceLwIP.hpp b/module-services/service-lwip/ServiceLwIP.hpp
index f6b408ebb..a95da6128 100644
--- a/module-services/service-lwip/ServiceLwIP.hpp
+++ b/module-services/service-lwip/ServiceLwIP.hpp
@@ -5,9 +5,11 @@
 #include "Service/Message.hpp"
 #include "Service/Service.hpp"
 
-class LwIP_message : public sys::DataMessage {
-   public:
-    enum Request {
+class LwIP_message : public sys::DataMessage
+{
+  public:
+    enum Request
+    {
         None,
         Start,
         Stop,
@@ -19,8 +21,9 @@ class LwIP_message : public sys::DataMessage {
 
 sys::ReturnCodes message_lwip(sys::Service *app, LwIP_message::Request req);
 
-class ServiceLwIP : public sys::Service {
-   public:
+class ServiceLwIP : public sys::Service
+{
+  public:
     ServiceLwIP();
     ~ServiceLwIP() = default;
 
@@ -30,7 +33,7 @@ class ServiceLwIP : public sys::Service {
     sys::ReturnCodes DeinitHandler() override;
     virtual sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override;
 
-   private:
+  private:
     static const char *serviceName;
     uint32_t testTimerID;
 };
diff --git a/module-sys/Service/Bus.cpp b/module-sys/Service/Bus.cpp
index ff44e3b88..6f704ffac 100644
--- a/module-sys/Service/Bus.cpp
+++ b/module-sys/Service/Bus.cpp
@@ -13,19 +13,16 @@ namespace sys
     using namespace cpp_freertos;
     using namespace std;
 
+    Bus::Bus()
+    {}
 
-    Bus::Bus(){
-    }
-
-
-    Bus::~Bus(){
-    }
-
+    Bus::~Bus()
+    {}
 
     void Bus::Add(std::shared_ptr<Service> service)
     {
         CriticalSection::Enter();
-        for(auto &w: service->busChannels){
+        for (auto &w : service->busChannels) {
             channels[w].m_services.push_back(service);
         }
         servicesRegistered[service->GetName()] = service;
@@ -35,194 +32,192 @@ namespace sys
     void Bus::Remove(std::shared_ptr<Service> service)
     {
         CriticalSection::Enter();
-        for(auto &w: service->busChannels){
+        for (auto &w : service->busChannels) {
 
-            auto it = std::find_if(channels[w].m_services.begin(),channels[w].m_services.end(),[&](std::shared_ptr<Service>const &s) { return s == service; });
-            if(it != channels[w].m_services.end()){
+            auto it = std::find_if(channels[w].m_services.begin(),
+                                   channels[w].m_services.end(),
+                                   [&](std::shared_ptr<Service> const &s) { return s == service; });
+            if (it != channels[w].m_services.end()) {
                 channels[w].m_services.erase(it);
             }
-            else{
-
+            else {
             }
         }
 
         auto ele = servicesRegistered.find(service->GetName());
-        if(ele != servicesRegistered.end()){
+        if (ele != servicesRegistered.end()) {
             servicesRegistered.erase(service->GetName());
         }
-        else{
-            //error!, trying to remove non-existing service
+        else {
+            // error!, trying to remove non-existing service
         }
 
         CriticalSection::Exit();
     }
 
-    void Bus::SendResponse(std::shared_ptr<Message> msg,std::shared_ptr<Message> receivedMsg,Service* s)
+    void Bus::SendResponse(std::shared_ptr<Message> msg, std::shared_ptr<Message> receivedMsg, Service *s)
     {
         assert(msg != nullptr);
         assert(receivedMsg != nullptr);
         assert(s != nullptr);
-        msg->sender = s->GetName();
-        msg->uniID = receivedMsg->uniID;
+        msg->sender    = s->GetName();
+        msg->uniID     = receivedMsg->uniID;
         msg->transType = Message::TransmissionType ::Unicast;
-        if(servicesRegistered.find(receivedMsg->sender) != servicesRegistered.end()){
+        if (servicesRegistered.find(receivedMsg->sender) != servicesRegistered.end()) {
             servicesRegistered[receivedMsg->sender]->mailbox.push(msg);
         }
-        else{
+        else {
             // silently drop it
         }
     }
 
-    bool Bus::SendUnicast(std::shared_ptr<Message> msg,const std::string& service,Service* s)
+    bool Bus::SendUnicast(std::shared_ptr<Message> msg, const std::string &service, Service *s)
     {
         CriticalSection::Enter();
-        msg->id = uniqueMsgId++;
+        msg->id    = uniqueMsgId++;
         msg->uniID = unicastMsgId++;
         CriticalSection::Exit();
 
-        msg->sender = s->GetName();
+        msg->sender    = s->GetName();
         msg->transType = Message::TransmissionType ::Unicast;
 
         auto ele = servicesRegistered.find(service);
-        if(ele != servicesRegistered.end()){
+        if (ele != servicesRegistered.end()) {
             servicesRegistered[service]->mailbox.push(msg);
         }
-        else{
-            //TODO: service specified doesn't exist
+        else {
+            // TODO: service specified doesn't exist
             LogOutput::Output("Service " + service + " doesn't exist");
             return false;
         }
 
         return true;
-
     }
 
-    MessageRet_t Bus::SendUnicast(std::shared_ptr<Message> msg,const std::string& service,Service* s,uint32_t timeout)
+    MessageRet_t Bus::SendUnicast(std::shared_ptr<Message> msg,
+                                  const std::string &service,
+                                  Service *s,
+                                  uint32_t timeout)
     {
         std::vector<std::shared_ptr<Message>> tempMsg;
-        tempMsg.reserve(4);// reserve space for 4 elements to avoid costly memory allocations
+        tempMsg.reserve(4); // reserve space for 4 elements to avoid costly memory allocations
 
         CriticalSection::Enter();
         uint64_t unicastID = unicastMsgId;
-        msg->id = uniqueMsgId++;
-        msg->uniID = unicastMsgId++;
+        msg->id            = uniqueMsgId++;
+        msg->uniID         = unicastMsgId++;
         CriticalSection::Exit();
 
-        msg->sender = s->GetName();
+        msg->sender    = s->GetName();
         msg->transType = Message::TransmissionType ::Unicast;
 
         auto ele = servicesRegistered.find(service);
-        if(ele != servicesRegistered.end()){
+        if (ele != servicesRegistered.end()) {
             servicesRegistered[service]->mailbox.push(msg);
         }
-        else{
-            //TODO: service specified doesn't exist
+        else {
+            // TODO: service specified doesn't exist
             LogOutput::Output("Service " + service + " doesn't exist");
-            return std::make_pair(ReturnCodes::ServiceDoesntExist,nullptr) ;
+            return std::make_pair(ReturnCodes::ServiceDoesntExist, nullptr);
         }
 
-        uint32_t currentTime = cpp_freertos::Ticks::GetTicks();
+        uint32_t currentTime   = cpp_freertos::Ticks::GetTicks();
         uint32_t timeoutNeeded = currentTime + timeout;
-        uint32_t timeElapsed = currentTime;
+        uint32_t timeElapsed   = currentTime;
 
-
-        while(1)
-        {
-            //timeout
-            if(timeElapsed >= timeoutNeeded){
+        while (1) {
+            // timeout
+            if (timeElapsed >= timeoutNeeded) {
 
                 // Push messages collected during waiting for response to processing queue
-                for(const auto &w : tempMsg){
+                for (const auto &w : tempMsg) {
                     s->mailbox.push(w);
                 }
 
                 // Register that we didn't receive response. Even if it arrives it will be dropped
-                s->staleUniqueMsg.push_back(std::make_pair(unicastID,cpp_freertos::Ticks::GetTicks()));
-                return std::make_pair(ReturnCodes::Timeout,nullptr) ;
+                s->staleUniqueMsg.push_back(std::make_pair(unicastID, cpp_freertos::Ticks::GetTicks()));
+                return std::make_pair(ReturnCodes::Timeout, nullptr);
             }
 
             // Immediately block on rx queue
-            auto rxmsg = s->mailbox.pop(timeoutNeeded-timeElapsed);
+            auto rxmsg = s->mailbox.pop(timeoutNeeded - timeElapsed);
 
             timeElapsed = cpp_freertos::Ticks::GetTicks();
 
-            //check for timeout
-            if(rxmsg == nullptr){
+            // check for timeout
+            if (rxmsg == nullptr) {
 
                 // Push messages collected during waiting for response to processing queue
-                for(const auto &w : tempMsg){
+                for (const auto &w : tempMsg) {
                     s->mailbox.push(w);
                 }
 
                 // Register that we didn't receive response. Even if it arrives it will be dropped
-                s->staleUniqueMsg.push_back(std::make_pair(unicastID,cpp_freertos::Ticks::GetTicks()));
-                return CreateMessageRet(ReturnCodes::Timeout,nullptr) ;
+                s->staleUniqueMsg.push_back(std::make_pair(unicastID, cpp_freertos::Ticks::GetTicks()));
+                return CreateMessageRet(ReturnCodes::Timeout, nullptr);
             }
 
             // Received response
-            if((rxmsg->uniID == unicastID) && (msg->sender == s->GetName())){
+            if ((rxmsg->uniID == unicastID) && (msg->sender == s->GetName())) {
 
                 // Push messages collected during waiting for response to processing queue
-                for(const auto &w : tempMsg){
+                for (const auto &w : tempMsg) {
                     s->mailbox.push(w);
                 }
 
-                return CreateMessageRet(ReturnCodes::Success,rxmsg);
+                return CreateMessageRet(ReturnCodes::Success, rxmsg);
             }
             // Check for system messages
-            else if(rxmsg->type == Message::Type::System){
+            else if (rxmsg->type == Message::Type::System) {
 
-                SystemMessage* sysmsg = static_cast<SystemMessage*>(rxmsg.get());
+                SystemMessage *sysmsg = static_cast<SystemMessage *>(rxmsg.get());
 
-                if(sysmsg->sysMsgType == SystemMessageType::Ping){
+                if (sysmsg->sysMsgType == SystemMessageType::Ping) {
                     rxmsg->Execute(s);
                 }
-                else{
+                else {
                     tempMsg.push_back(rxmsg);
                 }
             }
             // Plain data message, save it for later
-            else{
+            else {
                 tempMsg.push_back(rxmsg);
             }
         }
-
     }
 
-
-    void Bus::SendMulticast(std::shared_ptr<Message> msg,BusChannels channel,Service* s)
+    void Bus::SendMulticast(std::shared_ptr<Message> msg, BusChannels channel, Service *s)
     {
         CriticalSection::Enter();
-        msg->id = uniqueMsgId++;
+        msg->id      = uniqueMsgId++;
         msg->channel = channel;
         CriticalSection::Exit();
 
         msg->transType = Message::TransmissionType ::Multicast;
-        msg->sender = s->GetName();
+        msg->sender    = s->GetName();
 
-        for(auto const &w:channels[channel].m_services){
+        for (auto const &w : channels[channel].m_services) {
             w->mailbox.push(msg);
         }
     }
 
-    void Bus::SendBroadcast(std::shared_ptr<Message> msg,Service* s)
+    void Bus::SendBroadcast(std::shared_ptr<Message> msg, Service *s)
     {
         CriticalSection::Enter();
         msg->id = uniqueMsgId++;
         CriticalSection::Exit();
 
         msg->transType = Message::TransmissionType ::Broadcaast;
-        msg->sender = s->GetName();
+        msg->sender    = s->GetName();
 
-        for(auto const &w: servicesRegistered){
+        for (auto const &w : servicesRegistered) {
             w.second->mailbox.push(msg);
         }
     }
 
-
-    std::map<BusChannels,Channel> Bus::channels;
-    std::map<std::string,std::shared_ptr<Service>> Bus::servicesRegistered;
+    std::map<BusChannels, Channel> Bus::channels;
+    std::map<std::string, std::shared_ptr<Service>> Bus::servicesRegistered;
     uint64_t Bus::uniqueMsgId;
     uint64_t Bus::unicastMsgId;
 
-}
+} // namespace sys
diff --git a/module-sys/Service/Bus.hpp b/module-sys/Service/Bus.hpp
index 7fe08648e..512a77ab2 100644
--- a/module-sys/Service/Bus.hpp
+++ b/module-sys/Service/Bus.hpp
@@ -7,53 +7,47 @@
 #include "Common.hpp"
 #include "Message.hpp"
 
-
-
 namespace sys
 {
-	class Service;
-	class Message;
+    class Service;
+    class Message;
 
-class Bus
-{
+    class Bus
+    {
 
-public:
+      public:
+        // Send message directly to specified service (unicast type)
+        static bool SendUnicast(std::shared_ptr<Message> msg, const std::string &service, Service *s);
 
-	// Send message directly to specified service (unicast type)
-    static bool SendUnicast(std::shared_ptr<Message> msg,const std::string& service,Service* s);
+        // Send message directly to specified service with timeout
+        static MessageRet_t SendUnicast(std::shared_ptr<Message> msg,
+                                        const std::string &service,
+                                        Service *s,
+                                        uint32_t timeout);
 
-    // Send message directly to specified service with timeout
-    static MessageRet_t SendUnicast(std::shared_ptr<Message> msg,const std::string& service,Service* s,uint32_t timeout);
+        // Send message to specific channel
+        static void SendMulticast(std::shared_ptr<Message> msg, BusChannels channel, Service *s);
 
-    // Send message to specific channel
-    static void SendMulticast(std::shared_ptr<Message> msg,BusChannels channel,Service* s);
+        // Send message to all registered services ()
+        static void SendBroadcast(std::shared_ptr<Message> msg, Service *s);
 
-    // Send message to all registered services ()
-    static void SendBroadcast(std::shared_ptr<Message> msg,Service* s);
+        // Register new service
+        static void Add(std::shared_ptr<Service> service);
 
+        // Unregister specified service
+        static void Remove(std::shared_ptr<Service> service);
 
+        static void SendResponse(std::shared_ptr<Message> msg, std::shared_ptr<Message> receivedMsg, Service *s);
 
-    // Register new service
-    static void Add(std::shared_ptr<Service> service);
+      private:
+        Bus();
+        ~Bus();
 
-    // Unregister specified service
-    static void Remove(std::shared_ptr<Service> service);
+        static std::map<BusChannels, Channel> channels;
+        static std::map<std::string, std::shared_ptr<Service>> servicesRegistered;
 
-    static void SendResponse(std::shared_ptr<Message> msg,std::shared_ptr<Message> receivedMsg,Service* s);
+        static uint64_t uniqueMsgId;
+        static uint64_t unicastMsgId;
+    };
 
-
-private:
-
-    Bus();
-    ~Bus();
-
-	static std::map<BusChannels,Channel> channels;
-	static std::map<std::string,std::shared_ptr<Service>> servicesRegistered;
-
-    static uint64_t uniqueMsgId;
-    static uint64_t unicastMsgId;
-
-};
-
-
-}
+} // namespace sys
diff --git a/module-sys/Service/Channel.hpp b/module-sys/Service/Channel.hpp
index 15e2f208a..72e3988c4 100644
--- a/module-sys/Service/Channel.hpp
+++ b/module-sys/Service/Channel.hpp
@@ -2,24 +2,19 @@
 
 #include <memory>
 
-
 namespace sys
 {
 
+    class Service;
 
-	class Service;
+    class Channel
+    {
 
-class Channel
-{
+      public:
+        Channel()
+        {}
 
-public:
-	Channel()
-	{
-	}
+        std::vector<std::shared_ptr<Service>> m_services;
+    };
 
-
-	std::vector<std::shared_ptr<Service>> m_services;
-};
-
-
-}
+} // namespace sys
diff --git a/module-sys/Service/Common.hpp b/module-sys/Service/Common.hpp
index 5c766f0d1..970983102 100644
--- a/module-sys/Service/Common.hpp
+++ b/module-sys/Service/Common.hpp
@@ -13,45 +13,47 @@
 namespace sys
 {
 
-enum class BusChannels {
-	System,
-    SystemManagerRequests,
-    PowerManagerRequests
+    enum class BusChannels
+    {
+        System,
+        SystemManagerRequests,
+        PowerManagerRequests
 #ifndef MODULE_CORE_CUSTOM_BUS
 
 #else
-,
+        ,
 #include "BusChannelsCustom.hpp"
 #endif
-};
+    };
 
-enum class ServicePriority {
-	Idle          	= 0,          ///< priority: idle (lowest)
-	Low           	= 1,          ///< priority: low
-	Normal   		= 2,          ///< priority: normal
-	High          	= 3,          ///< priority: high
-	Realtime     	= 4,          ///< priority: realtime (highest)
-};
+    enum class ServicePriority
+    {
+        Idle     = 0, ///< priority: idle (lowest)
+        Low      = 1, ///< priority: low
+        Normal   = 2, ///< priority: normal
+        High     = 3, ///< priority: high
+        Realtime = 4, ///< priority: realtime (highest)
+    };
 
-enum class ServicePowerMode{
-    Active,
-    SuspendToRAM,
-    SuspendToNVM
-};
-
-enum class ReturnCodes{
-    Success,
-	Failure,
-    Timeout,
-    ServiceDoesntExist,
-	//This is used in application's template in base class messages handler. The meaning is that
-	//message that was processed by base class implementation of the DataReceivedHandler was not processed
-	//and it should be handled by the class next in hierarchy.
-	Unresolved
-};
-
-}
+    enum class ServicePowerMode
+    {
+        Active,
+        SuspendToRAM,
+        SuspendToNVM
+    };
 
+    enum class ReturnCodes
+    {
+        Success,
+        Failure,
+        Timeout,
+        ServiceDoesntExist,
+        // This is used in application's template in base class messages handler. The meaning is that
+        // message that was processed by base class implementation of the DataReceivedHandler was not processed
+        // and it should be handled by the class next in hierarchy.
+        Unresolved
+    };
 
+} // namespace sys
 
 #endif /* SYSTEMMANAGER_COMMON_HPP_ */
diff --git a/module-sys/Service/LogOutput.hpp b/module-sys/Service/LogOutput.hpp
index 451e78a26..e8d4b69f2 100644
--- a/module-sys/Service/LogOutput.hpp
+++ b/module-sys/Service/LogOutput.hpp
@@ -5,26 +5,22 @@
 #ifndef DBUS_LOGOUTPUT_HPP
 #define DBUS_LOGOUTPUT_HPP
 
-
 #include <string>
 
-
 #ifdef TARGET_Linux
 #include <iostream>
 #endif
 
-
-
 class LogOutput
 {
-    public:
+  public:
     static void Output(const std::string &name)
     {
 
-#if  defined(TARGET_Linux)
+#if defined(TARGET_Linux)
         std::cout << name << "\n";
 #endif
     }
 };
 
-#endif //DBUS_LOGOUTPUT_HPP
+#endif // DBUS_LOGOUTPUT_HPP
diff --git a/module-sys/Service/Mailbox.hpp b/module-sys/Service/Mailbox.hpp
index 82652a4a2..fafd96352 100644
--- a/module-sys/Service/Mailbox.hpp
+++ b/module-sys/Service/Mailbox.hpp
@@ -8,7 +8,6 @@
 #ifndef SYSTEMMANAGER_MAILBOX_HPP_
 #define SYSTEMMANAGER_MAILBOX_HPP_
 
-
 #include <deque>
 #include "thread.hpp"
 #include <mutex.hpp>
@@ -16,83 +15,75 @@
 
 using namespace cpp_freertos;
 
-template <typename T>
-class Mailbox
+template <typename T> class Mailbox
 {
-public:
-
-	Mailbox(Thread* thread): thread_(thread)
-	{
-	}
+  public:
+    Mailbox(Thread *thread) : thread_(thread)
+    {}
 
     T peek()
     {
 
         LockGuard mlock(mutex_);
-        while (queue_.empty())
-        {
-            thread_->Wait(cond_,mutex_);
+        while (queue_.empty()) {
+            thread_->Wait(cond_, mutex_);
         }
         auto item = queue_.front();
         return item;
     }
 
-	T pop(uint32_t timeout = portMAX_DELAY)
-	{
+    T pop(uint32_t timeout = portMAX_DELAY)
+    {
 
-		LockGuard mlock(mutex_);
-		while (queue_.empty())
-		{
-			if(thread_->Wait(cond_,mutex_,timeout) == false){
-			    return nullptr;
-			}
-		}
-		auto item = queue_.front();
-		queue_.pop_front();
-		return item;
-	}
+        LockGuard mlock(mutex_);
+        while (queue_.empty()) {
+            if (thread_->Wait(cond_, mutex_, timeout) == false) {
+                return nullptr;
+            }
+        }
+        auto item = queue_.front();
+        queue_.pop_front();
+        return item;
+    }
 
-	void pop(T& item)
-	{
-		LockGuard mlock(mutex_);
-		while (queue_.empty())
-		{
-			thread_->Wait(cond_,mutex_);
-		}
-		item = queue_.front();
-		queue_.pop_front();
-	}
+    void pop(T &item)
+    {
+        LockGuard mlock(mutex_);
+        while (queue_.empty()) {
+            thread_->Wait(cond_, mutex_);
+        }
+        item = queue_.front();
+        queue_.pop_front();
+    }
 
-	void push_front(const T& item)
+    void push_front(const T &item)
     {
         mutex_.Lock();
         queue_.push_front(item);
         mutex_.Unlock();
     }
 
-	void push(const T& item)
-	{
-		mutex_.Lock();
-		queue_.push_back(item);
-		mutex_.Unlock();
-		cond_.Signal();
-	}
+    void push(const T &item)
+    {
+        mutex_.Lock();
+        queue_.push_back(item);
+        mutex_.Unlock();
+        cond_.Signal();
+    }
 
-	void push(T&& item)
-	{
-		mutex_.Lock();
-		queue_.push_back(std::move(item));
-		mutex_.Unlock();
-		cond_.Signal();
-	}
-
-private:
-	Thread*		 thread_;
-	std::deque<T> queue_;
-	MutexStandard mutex_;
-	ConditionVariable cond_;
+    void push(T &&item)
+    {
+        mutex_.Lock();
+        queue_.push_back(std::move(item));
+        mutex_.Unlock();
+        cond_.Signal();
+    }
 
+  private:
+    Thread *thread_;
+    std::deque<T> queue_;
+    MutexStandard mutex_;
+    ConditionVariable cond_;
 };
 
-
 #endif /* SYSTEMMANAGER_MAILBOX_HPP_ */
diff --git a/module-sys/Service/Message.cpp b/module-sys/Service/Message.cpp
index 5280ba668..d02598b70 100644
--- a/module-sys/Service/Message.cpp
+++ b/module-sys/Service/Message.cpp
@@ -12,72 +12,71 @@
 
 #include <string.h>
 
-namespace sys {
+namespace sys
+{
 
-    MessageRet_t CreateMessageRet(ReturnCodes retCode,Message_t msg){
-        return std::make_pair(retCode,msg);
+    MessageRet_t CreateMessageRet(ReturnCodes retCode, Message_t msg)
+    {
+        return std::make_pair(retCode, msg);
     };
 
-
-    Message_t DataMessage::Execute(Service *service) {
+    Message_t DataMessage::Execute(Service *service)
+    {
 
         // Ignore incoming data message if this service is not yet initialized
-        if(service->isReady){
-            return service->DataReceivedHandler(this,nullptr);
+        if (service->isReady) {
+            return service->DataReceivedHandler(this, nullptr);
         }
-        else{
+        else {
             return std::make_shared<ResponseMessage>();
         }
-
-
     }
 
-    Message_t SystemMessage::Execute(Service *service) {
-
+    Message_t SystemMessage::Execute(Service *service)
+    {
 
         ReturnCodes ret = ReturnCodes ::Success;
 
-        switch (sysMsgType){
+        switch (sysMsgType) {
 
-            case SystemMessageType ::Ping:
-                service->pingTimestamp = cpp_freertos::Ticks::GetTicks();
-                break;
+        case SystemMessageType ::Ping:
+            service->pingTimestamp = cpp_freertos::Ticks::GetTicks();
+            break;
 
-            case SystemMessageType ::SwitchPowerMode:
-                service->SwitchPowerModeHandler(powerMode);
-                break;
+        case SystemMessageType ::SwitchPowerMode:
+            service->SwitchPowerModeHandler(powerMode);
+            break;
 
-            case SystemMessageType ::Exit:
-                ret = service->DeinitHandler();
-                service->CloseHandler();
-                break;
+        case SystemMessageType ::Exit:
+            ret = service->DeinitHandler();
+            service->CloseHandler();
+            break;
 
-            case SystemMessageType::Start:
-                ret = service->InitHandler();
-                if(ret == ReturnCodes::Success){
-                    service->isReady = true;
-                }
-
-                break;
+        case SystemMessageType::Start:
+            ret = service->InitHandler();
+            if (ret == ReturnCodes::Success) {
+                service->isReady = true;
+            }
 
+            break;
         }
         return std::make_shared<ResponseMessage>(ret);
-
     }
 
-    Message_t ResponseMessage::Execute(Service *service) {
+    Message_t ResponseMessage::Execute(Service *service)
+    {
         // Ignore incoming data message if this service is not yet initialized
-        if(service->isReady){
+        if (service->isReady) {
             DataMessage dummy(MessageType::MessageTypeUninitialized);
-            return service->DataReceivedHandler(&dummy,this);
+            return service->DataReceivedHandler(&dummy, this);
         }
-        else{
+        else {
             return std::make_shared<ResponseMessage>();
         }
     }
 
 #ifdef UNIT_TESTS
-    uint32_t Message::unitestsMsgInstancesCount=0;
+    uint32_t Message::unitestsMsgInstancesCount = 0;
 #endif
 
 } // namespace sys
diff --git a/module-sys/Service/Message.hpp b/module-sys/Service/Message.hpp
index a7421a5cf..c68d83248 100644
--- a/module-sys/Service/Message.hpp
+++ b/module-sys/Service/Message.hpp
@@ -15,38 +15,37 @@ namespace sys
     class ResponseMessage;
     class Message;
 
-
-    enum class SystemMessageType{
+    enum class SystemMessageType
+    {
         Ping,
         SwitchPowerMode,
         Start,
         Exit
     };
 
-    using Message_t = std::shared_ptr<Message>;
-    using MessageRet_t = std::pair<ReturnCodes ,std::shared_ptr<Message>>;
+    using Message_t    = std::shared_ptr<Message>;
+    using MessageRet_t = std::pair<ReturnCodes, std::shared_ptr<Message>>;
 
-
-    MessageRet_t CreateMessageRet(ReturnCodes retCode,Message_t msg);
+    MessageRet_t CreateMessageRet(ReturnCodes retCode, Message_t msg);
 
     class Message
     {
 
-    public:
-
-        enum class TransmissionType{
+      public:
+        enum class TransmissionType
+        {
             Unicast,
             Multicast,
             Broadcaast
         };
 
-        enum class Type{
+        enum class Type
+        {
             System,
             Data,
             Response
         };
 
-
         Message()
         {
 #ifdef UNIT_TESTS
@@ -54,21 +53,21 @@ namespace sys
 #endif
         }
 
-        Message(BusChannels chan)
-        : channel(chan)
+        Message(BusChannels chan) : channel(chan)
         {
 #ifdef UNIT_TESTS
             unitestsMsgInstancesCount++;
 #endif
         }
 
-        virtual ~Message(){
+        virtual ~Message()
+        {
 #ifdef UNIT_TESTS
             unitestsMsgInstancesCount--;
 #endif
         }
 
-        virtual Message_t Execute(Service* service) = 0;
+        virtual Message_t Execute(Service *service) = 0;
 
         Type type;
         TransmissionType transType;
@@ -84,17 +83,14 @@ namespace sys
 
     class SystemMessage : public Message
     {
-    public:
-
-        SystemMessage(SystemMessageType sysMsgType,ServicePowerMode pwrMode = ServicePowerMode::Active):
-            Message(BusChannels ::System),
-            sysMsgType(sysMsgType),
-            powerMode(pwrMode)
+      public:
+        SystemMessage(SystemMessageType sysMsgType, ServicePowerMode pwrMode = ServicePowerMode::Active)
+            : Message(BusChannels ::System), sysMsgType(sysMsgType), powerMode(pwrMode)
         {
             type = Type::System;
         }
 
-        Message_t Execute(Service* service) override;
+        Message_t Execute(Service *service) override;
 
         SystemMessageType sysMsgType;
         ServicePowerMode powerMode;
@@ -102,36 +98,36 @@ namespace sys
 
     class DataMessage : public Message
     {
-    public:
-      // This field must by provided by the class that inherits DataMessage
-      MessageType messageType = MessageType::MessageTypeUninitialized;
+      public:
+        // This field must by provided by the class that inherits DataMessage
+        MessageType messageType = MessageType::MessageTypeUninitialized;
 
-      DataMessage(MessageType messageType) : messageType{messageType}
-      {
-          type = Type::Data;
-      }
-
-        DataMessage(BusChannels channel): Message(channel)
+        DataMessage(MessageType messageType) : messageType{messageType}
         {
             type = Type::Data;
         }
 
-        Message_t Execute(Service* service) override;
+        DataMessage(BusChannels channel) : Message(channel)
+        {
+            type = Type::Data;
+        }
+
+        Message_t Execute(Service *service) override;
     };
 
     class ResponseMessage : public Message
     {
-    public:
-      ResponseMessage(ReturnCodes retCode = ReturnCodes::Success, MessageType responseTo = MessageType::MessageTypeUninitialized)
-          : Message(), responseTo(responseTo), retCode(retCode)
-      {
-          type = Type::Response;
+      public:
+        ResponseMessage(ReturnCodes retCode    = ReturnCodes::Success,
+                        MessageType responseTo = MessageType::MessageTypeUninitialized)
+            : Message(), responseTo(responseTo), retCode(retCode)
+        {
+            type = Type::Response;
         }
         MessageType responseTo;
         ReturnCodes retCode;
 
-        Message_t Execute(Service* service) override;
+        Message_t Execute(Service *service) override;
     };
 
-
-}
+} // namespace sys
diff --git a/module-sys/Service/Service.cpp b/module-sys/Service/Service.cpp
index 1fa94af13..5a6323d3d 100644
--- a/module-sys/Service/Service.cpp
+++ b/module-sys/Service/Service.cpp
@@ -6,190 +6,166 @@
 #include "Bus.hpp"
 #include "LogOutput.hpp"
 
-
 namespace sys
 {
 
-using namespace cpp_freertos;
-using namespace std;
+    using namespace cpp_freertos;
+    using namespace std;
 
-Service::Service(std::string name,std::string parent,uint32_t stackDepth,ServicePriority priority)
-		:	cpp_freertos::Thread(name, stackDepth/4 /* Stack depth in bytes */, static_cast<UBaseType_t >(priority)),
-		     parent(parent),
-             mailbox(this),
-             pingTimestamp(UINT32_MAX),
-             isReady(false),
-             enableRunLoop(false)
+    Service::Service(std::string name, std::string parent, uint32_t stackDepth, ServicePriority priority)
+        : cpp_freertos::Thread(name, stackDepth / 4 /* Stack depth in bytes */, static_cast<UBaseType_t>(priority)),
+          parent(parent), mailbox(this), pingTimestamp(UINT32_MAX), isReady(false), enableRunLoop(false)
 
-
-
-{
-    // System channel is mandatory for each service
-    busChannels = {BusChannels::System};
-
-}
-
-Service::~Service()
-{
-    enableRunLoop = false;
-    LogOutput::Output(GetName() + ":Service base destructor");
-}
-
-void Service::StartService()
-{
-    Bus::Add(shared_from_this());
-    enableRunLoop = true;
-    if(!Start()){
-        LogOutput::Output("FATAL ERROR: Start service failed!");
-        configASSERT(0);
+    {
+        // System channel is mandatory for each service
+        busChannels = {BusChannels::System};
     }
 
-}
+    Service::~Service()
+    {
+        enableRunLoop = false;
+        LogOutput::Output(GetName() + ":Service base destructor");
+    }
 
+    void Service::StartService()
+    {
+        Bus::Add(shared_from_this());
+        enableRunLoop = true;
+        if (!Start()) {
+            LogOutput::Output("FATAL ERROR: Start service failed!");
+            configASSERT(0);
+        }
+    }
 
-void Service::Run() {
+    void Service::Run()
+    {
 
-    while (enableRunLoop) {
+        while (enableRunLoop) {
 
-        auto msg = mailbox.pop();
-        
-        uint32_t timestamp = cpp_freertos::Ticks::GetTicks();
+            auto msg = mailbox.pop();
 
-        // Remove all staled messages
-        staleUniqueMsg.erase(std::remove_if(
-                staleUniqueMsg.begin(), staleUniqueMsg.end(),
-                [&](const auto& id) {
-                    return ((id.first == msg->uniID) || ((timestamp-id.second) >=15000));
-                }), staleUniqueMsg.end());
+            uint32_t timestamp = cpp_freertos::Ticks::GetTicks();
 
+            // Remove all staled messages
+            staleUniqueMsg.erase(std::remove_if(staleUniqueMsg.begin(),
+                                                staleUniqueMsg.end(),
+                                                [&](const auto &id) {
+                                                    return ((id.first == msg->uniID) ||
+                                                            ((timestamp - id.second) >= 15000));
+                                                }),
+                                 staleUniqueMsg.end());
 
-    	auto ret =  msg->Execute(this);
-        if (ret == nullptr)
-        {
-            LOG_FATAL("NO MESSAGE from: %s msg type: %d", msg->sender.c_str(), msg->type);
-            ret = std::make_shared<DataMessage>(MessageType::MessageTypeUninitialized);
+            auto ret = msg->Execute(this);
+            if (ret == nullptr) {
+                LOG_FATAL("NO MESSAGE from: %s msg type: %d", msg->sender.c_str(), msg->type);
+                ret = std::make_shared<DataMessage>(MessageType::MessageTypeUninitialized);
+            }
+
+            // Unicast messages always need response with the same ID as received message
+            // Don't send responses to themselves,
+            // Don't send responses to responses
+            if ((msg->transType == Message::TransmissionType ::Unicast) && (msg->type != Message::Type::Response) &&
+                (GetName() != msg->sender)) {
+                Bus::SendResponse(ret, msg, this);
+            }
         }
 
-        // Unicast messages always need response with the same ID as received message
-        // Don't send responses to themselves,
-        // Don't send responses to responses
-        if((msg->transType == Message::TransmissionType ::Unicast)
-                && (msg->type != Message::Type::Response)
-                && (GetName() != msg->sender))
-        {
-            Bus::SendResponse(ret,msg,this);
+        Bus::Remove(shared_from_this());
+    };
+
+    // Create service timer
+    uint32_t Service::CreateTimer(uint32_t interval, bool isPeriodic, const std::string &name)
+    {
+        uint32_t unique     = ServiceTimer::GetNextUniqueID();
+        std::string nameNew = name;
+        if (name.empty()) {
+            nameNew = GetName() + "Timer" + std::to_string(unique);
+        }
+        timersList.push_back(
+            std::make_unique<ServiceTimer>(nameNew, Ticks::MsToTicks(interval), isPeriodic, unique, this));
+        LOG_DEBUG(std::string(nameNew + "'s ID: " + std::to_string(unique)).c_str());
+        return unique;
+    }
+
+    // Reload service timer
+    void Service::ReloadTimer(uint32_t id)
+    {
+        auto it = std::find_if(timersList.begin(), timersList.end(), [&](std::unique_ptr<ServiceTimer> const &s) {
+            return s->GetId() == id;
+        });
+        if (it == timersList.end()) {
+            // not found, error
+        }
+        else {
+            (*it)->Start(0);
+        }
+    }
+    // Delete timer
+    void Service::DeleteTimer(uint32_t id)
+    {
+        auto it = std::find_if(timersList.begin(), timersList.end(), [&](std::unique_ptr<ServiceTimer> const &s) {
+            return s->GetId() == id;
+        });
+        if (it == timersList.end()) {
+            // not found, error
+        }
+        else {
+            (*it)->Stop(0);
+            timersList.erase(it);
+        }
+    }
+
+    // Set period
+    void Service::setTimerPeriod(uint32_t id, uint32_t period)
+    {
+        auto it = std::find_if(timersList.begin(), timersList.end(), [&](std::unique_ptr<ServiceTimer> const &s) {
+            return s->GetId() == id;
+        });
+        if (it == timersList.end()) {
+            // not found, error
+        }
+        else {
+            (*it)->SetPeriod(period, 0);
+        }
+    }
+
+    // Set period
+    void Service::stopTimer(uint32_t id)
+    {
+        auto it = std::find_if(timersList.begin(), timersList.end(), [&](std::unique_ptr<ServiceTimer> const &s) {
+            return s->GetId() == id;
+        });
+        if (it == timersList.end()) {
+            // not found, error
+        }
+        else {
+            (*it)->Stop(0);
+        }
+    }
+
+    void Service::CloseHandler()
+    {
+
+        // Stop currently active timers
+        for (auto &w : timersList) {
+            w->Stop(0);
         }
 
+        enableRunLoop = false;
+    };
+
+    ServiceTimer::ServiceTimer(
+        const std::string &name, TickType_t tick, bool isPeriodic, uint32_t idx, Service *service)
+        : Timer(name.c_str(), tick, isPeriodic), m_isPeriodic(isPeriodic), m_interval(tick), m_id(idx),
+          m_service(service)
+
+    {}
+
+    void ServiceTimer::Run()
+    {
+        m_service->TickHandler(m_id);
     }
 
-    Bus::Remove(shared_from_this());
-};
+    uint32_t ServiceTimer::m_timers_unique_idx = 0;
 
-
-
-
-//Create service timer
-uint32_t Service::CreateTimer(uint32_t interval,bool isPeriodic,const std::string& name)
-{
-    uint32_t unique = ServiceTimer::GetNextUniqueID();
-    std::string nameNew = name;
-    if (name.empty()){
-        nameNew = GetName()+"Timer"+std::to_string(unique);
-    }
-	timersList.push_back(std::make_unique<ServiceTimer>(nameNew,Ticks::MsToTicks(interval),isPeriodic,unique,this));
-    LOG_DEBUG(std::string(nameNew + "'s ID: " + std::to_string(unique)).c_str());
-	return unique;
-}
-
-// Reload service timer
-void Service::ReloadTimer(uint32_t id)
-{
-	auto it = std::find_if(timersList.begin(),timersList.end(),[&] (std::unique_ptr<ServiceTimer>const &s) { return s->GetId() == id; });
-	if(it == timersList.end()){
-		// not found, error
-	}
-	else{
-		(*it)->Start(0);
-	}
-
-}
-// Delete timer
-void Service::DeleteTimer(uint32_t id)
-{
-	auto it = std::find_if(timersList.begin(),timersList.end(),[&] (std::unique_ptr<ServiceTimer>const &s) { return s->GetId() == id; });
-	if(it == timersList.end()){
-		// not found, error
-	}
-	else{
-        (*it)->Stop(0);
-		timersList.erase(it);
-	}
-
-}
-
-// Set period
-void Service::setTimerPeriod(uint32_t id,uint32_t period)
-{
-	auto it = std::find_if(timersList.begin(),timersList.end(),[&] (std::unique_ptr<ServiceTimer>const &s) { return s->GetId() == id; });
-	if(it == timersList.end()){
-		// not found, error
-	}
-	else{
-        (*it)->SetPeriod(period,0);
-	}
-}
-
-// Set period
-void Service::stopTimer(uint32_t id)
-{
-	auto it = std::find_if(timersList.begin(),timersList.end(),[&] (std::unique_ptr<ServiceTimer>const &s) { return s->GetId() == id; });
-	if(it == timersList.end()){
-		// not found, error
-	}
-	else{
-        (*it)->Stop(0);
-	}
-}
-
-void Service::CloseHandler(){
-
-    // Stop currently active timers
-    for(auto &w : timersList){
-        w->Stop(0);
-    }
-
-    enableRunLoop = false;
-
-};
-
-
-
-
-ServiceTimer::ServiceTimer(const std::string& name,TickType_t tick,bool isPeriodic,uint32_t  idx, Service* service)
-	: 	Timer(name.c_str(),tick,isPeriodic),
-            m_isPeriodic(isPeriodic),
-		    m_interval(tick),
-            m_id(idx),
-		    m_service(service)
-
-
-{
-
-}
-
-void ServiceTimer::Run()
-{
-	m_service->TickHandler(m_id);
-}
-
-uint32_t ServiceTimer::m_timers_unique_idx = 0;
-
-
-
-
-
-
-
-
-
-}
+} // namespace sys
diff --git a/module-sys/Service/Service.hpp b/module-sys/Service/Service.hpp
index 9006732d1..20bb0f7f2 100644
--- a/module-sys/Service/Service.hpp
+++ b/module-sys/Service/Service.hpp
@@ -13,101 +13,97 @@
 #include "thread.hpp"
 #include "timer.hpp"
 
-
 namespace sys
 {
 
-class ServiceTimer : public Timer
-{
-public:
-    ServiceTimer(const std::string& name,TickType_t tick,bool isPeriodic,uint32_t  idx, Service* service);
+    class ServiceTimer : public Timer
+    {
+      public:
+        ServiceTimer(const std::string &name, TickType_t tick, bool isPeriodic, uint32_t idx, Service *service);
 
-	uint32_t GetId() const{
-	    return m_id;
-	}
-    static uint32_t GetNextUniqueID(){
-	    return ++m_timers_unique_idx;
-	}
+        uint32_t GetId() const
+        {
+            return m_id;
+        }
+        static uint32_t GetNextUniqueID()
+        {
+            return ++m_timers_unique_idx;
+        }
 
-	void Run() override;
+        void Run() override;
 
+      private:
+        bool m_isPeriodic;
+        TickType_t m_interval;
+        uint32_t m_id;
+        Service *m_service;
+        static uint32_t m_timers_unique_idx;
+    };
 
-private:
-    bool m_isPeriodic;
-    TickType_t m_interval;
-	uint32_t  m_id;
-    Service* m_service;
-    static uint32_t  m_timers_unique_idx;
+    class Service : public cpp_freertos::Thread, public std::enable_shared_from_this<Service>
+    {
+      public:
+        Service(std::string name,
+                std::string parent       = "",
+                uint32_t stackDepth      = 4096,
+                ServicePriority priority = ServicePriority::Idle);
 
-};
+        virtual ~Service();
 
-class Service : public cpp_freertos::Thread,public std::enable_shared_from_this<Service>
-{
-public:
-	Service(std::string name,std::string parent="",uint32_t stackDepth=4096,ServicePriority priority=ServicePriority::Idle);
+        void StartService();
 
-	virtual ~Service();
+        // Create service timer
+        uint32_t CreateTimer(TickType_t interval, bool isPeriodic, const std::string &name = "");
+        // Reload service timer
+        void ReloadTimer(uint32_t id);
+        // Delete timer
+        void DeleteTimer(uint32_t id);
+        void setTimerPeriod(uint32_t id, uint32_t period);
+        /**
+         * @brief Stops a timer with specified ID
+         * @param id ID of the timer;
+         */
+        void stopTimer(uint32_t id);
 
-	void StartService();
+        // Invoked when service received data message
+        virtual Message_t DataReceivedHandler(DataMessage *msg, ResponseMessage *resp) = 0;
 
-	//Create service timer
-    uint32_t CreateTimer(TickType_t interval,bool isPeriodic,const std::string& name = "");
-    // Reload service timer
-	void ReloadTimer(uint32_t id);
-	// Delete timer
-	void DeleteTimer(uint32_t id);
-	void setTimerPeriod(uint32_t id,uint32_t period);
-	/**
-	 * @brief Stops a timer with specified ID
-	 * @param id ID of the timer;
-	 */
-	void stopTimer(uint32_t id);
+        // Invoked when timer ticked
+        virtual void TickHandler(uint32_t id){};
 
-	// Invoked when service received data message
-	virtual Message_t DataReceivedHandler(DataMessage* msg,ResponseMessage* resp) = 0;
+        // Invoked during initialization
+        virtual ReturnCodes InitHandler() = 0;
 
-	// Invoked when timer ticked
-	virtual void TickHandler(uint32_t id){};
+        // Invoked upon receiving close request
+        virtual ReturnCodes DeinitHandler() = 0;
 
-	// Invoked during initialization
-	virtual ReturnCodes InitHandler()= 0;
+        virtual ReturnCodes SwitchPowerModeHandler(const ServicePowerMode mode) = 0;
 
-    // Invoked upon receiving close request
-    virtual ReturnCodes DeinitHandler()= 0;
+        void CloseHandler();
 
-	virtual ReturnCodes SwitchPowerModeHandler(const ServicePowerMode mode) = 0;
+        std::string parent;
 
-	void CloseHandler();
+        std::vector<BusChannels> busChannels;
 
-	std::string parent;
+        Mailbox<std::shared_ptr<Message>> mailbox;
 
-	std::vector<BusChannels> busChannels;
+        uint32_t pingTimestamp;
 
-	Mailbox<std::shared_ptr<Message>> mailbox;
+        bool isReady;
 
-	uint32_t pingTimestamp;
+        std::vector<std::pair<uint64_t, uint32_t>> staleUniqueMsg;
 
-    bool isReady;
+      protected:
+        bool enableRunLoop;
 
-    std::vector<std::pair<uint64_t,uint32_t>> staleUniqueMsg;
+        // TODO R.B. I've removed this private tag to be able to create application class
+        // private:
 
-protected:
+        virtual void Run();
 
+        std::vector<std::unique_ptr<ServiceTimer>> timersList;
 
-    bool enableRunLoop;
+        friend class ServiceTimer;
+    };
 
-
-//TODO R.B. I've removed this private tag to be able to create application class
-//private:
-
-	virtual void Run();
-
-	std::vector<std::unique_ptr<ServiceTimer>> timersList;
-
-	friend class ServiceTimer;
-
-};
-
-
-
-}
+} // namespace sys
diff --git a/module-sys/Service/Worker.cpp b/module-sys/Service/Worker.cpp
index 9a9255c0d..afacdc48a 100644
--- a/module-sys/Service/Worker.cpp
+++ b/module-sys/Service/Worker.cpp
@@ -8,15 +8,17 @@
  */
 #include <string.h>
 
-extern "C" {
-	#include "FreeRTOS.h"
-	#include "task.h"
+extern "C"
+{
+#include "FreeRTOS.h"
+#include "task.h"
 }
 
-//module-sys
+// module-sys
 #include "Worker.hpp"
 
-namespace sys {
+namespace sys
+{
 
     void workerTaskFunction(void *ptr)
     {
@@ -24,157 +26,154 @@ namespace sys {
         QueueSetMemberHandle_t activeMember;
         std::vector<xQueueHandle> queues = worker->queues;
 
-        while (1)
-        {
+        while (1) {
             activeMember = xQueueSelectFromSet(worker->queueSet, portMAX_DELAY);
             // find id of the queue that was activated
 
-            for (uint32_t i = 0; i < queues.size(); i++)
-            {
-                if (queues[i] == activeMember)
-                {
+            for (uint32_t i = 0; i < queues.size(); i++) {
+                if (queues[i] == activeMember) {
                     worker->handleMessage(i);
                 }
             }
         }
     }
 
-Worker::Worker( sys::Service* service ) : service {service }, serviceQueue{ NULL }, queueSet{ NULL }, taskHandle{ NULL } {
-}
+    Worker::Worker(sys::Service *service) : service{service}, serviceQueue{NULL}, queueSet{NULL}, taskHandle{NULL}
+    {}
 
-Worker::~Worker() {
-}
+    Worker::~Worker()
+    {}
 
-bool Worker::init( std::list<WorkerQueueInfo> queuesList ) {
-
-	//initial value is because there is always a queue to communicate with service
-	uint32_t setSize = SERVICE_QUEUE_LENGTH;
-
-    auto addQueueInfo = [&](xQueueHandle q, std::string qName) {
-        queueNameMap.insert(std::pair<xQueueHandle, std::string>(q, qName));
-        vQueueAddToRegistry(q, qName.c_str());
-        queues.push_back(q);
-    };
-
-    // iterate over all entries in the list of queues and summarize queue sizes
-    for( auto wqi : queuesList ) {
-		setSize += wqi.length;
-	}
-
-    //create set of queues
-	queueSet = xQueueCreateSet( setSize );
-	if( queueSet == NULL )
-		return false;
-
-	//create and add all queues to the set. First service queue is created.
-	serviceQueue = xQueueCreate(SERVICE_QUEUE_LENGTH, SERVICE_QUEUE_SIZE );
-	if(serviceQueue == nullptr){
-        deinit();
-        return false;
-	}
-
-    addQueueInfo(serviceQueue, SERVICE_QUEUE_NAME);
-
-    // create and add all queues provided from service
-	for (auto wqi : queuesList)
-	{
-		auto q = xQueueCreate(wqi.length, wqi.elementSize);
-		if (q == NULL)
-		{
-		    LOG_FATAL("xQueueCreate %s failed", wqi.name.c_str());
-			deinit();
-			return false;
-		}
-        addQueueInfo(q, wqi.name);
-    };
-
-    //iterate over all queues and add them to set
-	for( uint32_t i=0; i<queues.size(); ++i ) {
-
-		if(xQueueAddToSet( queues[i], queueSet ) != pdPASS)
-		{
-//			LOG_FATAL("xQueueAddToSet %d failed", i);
-			deinit();
-			return false;
-		}
-	}
-
-	return true;
-}
-bool Worker::deinit() {
-
-    vTaskDelete(taskHandle);
-
-	//for all queues - remove from set and delete queue
-	for( auto q : queues ) {
-		//remove queues from set
-		xQueueRemoveFromSet( q, queueSet );
-		//delete queue
-		vQueueDelete( q );
-	}
-	queues.clear();
-
-	//delete queues set
-	vQueueDelete((QueueHandle_t) queueSet );
-	queueSet = NULL;
-	taskHandle = NULL;
-
-	return true;
-};
-/**
- * This method starts RTOS thread that waits for incomming queue events.
- */
-bool Worker::run() {
-    static int workerCount = 0;
-    std::string workerName = service->GetName()+"_w" + std::to_string(workerCount);
-    BaseType_t task_error = xTaskCreate(workerTaskFunction, workerName.c_str(), 2048, this, service->GetPriority(), &taskHandle);
-    if ( task_error != pdPASS)
+    bool Worker::init(std::list<WorkerQueueInfo> queuesList)
     {
-        LOG_ERROR("Failed to start the task");
+
+        // initial value is because there is always a queue to communicate with service
+        uint32_t setSize = SERVICE_QUEUE_LENGTH;
+
+        auto addQueueInfo = [&](xQueueHandle q, std::string qName) {
+            queueNameMap.insert(std::pair<xQueueHandle, std::string>(q, qName));
+            vQueueAddToRegistry(q, qName.c_str());
+            queues.push_back(q);
+        };
+
+        // iterate over all entries in the list of queues and summarize queue sizes
+        for (auto wqi : queuesList) {
+            setSize += wqi.length;
+        }
+
+        // create set of queues
+        queueSet = xQueueCreateSet(setSize);
+        if (queueSet == NULL)
+            return false;
+
+        // create and add all queues to the set. First service queue is created.
+        serviceQueue = xQueueCreate(SERVICE_QUEUE_LENGTH, SERVICE_QUEUE_SIZE);
+        if (serviceQueue == nullptr) {
+            deinit();
+            return false;
+        }
+
+        addQueueInfo(serviceQueue, SERVICE_QUEUE_NAME);
+
+        // create and add all queues provided from service
+        for (auto wqi : queuesList) {
+            auto q = xQueueCreate(wqi.length, wqi.elementSize);
+            if (q == NULL) {
+                LOG_FATAL("xQueueCreate %s failed", wqi.name.c_str());
+                deinit();
+                return false;
+            }
+            addQueueInfo(q, wqi.name);
+        };
+
+        // iterate over all queues and add them to set
+        for (uint32_t i = 0; i < queues.size(); ++i) {
+
+            if (xQueueAddToSet(queues[i], queueSet) != pdPASS) {
+                //			LOG_FATAL("xQueueAddToSet %d failed", i);
+                deinit();
+                return false;
+            }
+        }
+
+        return true;
+    }
+    bool Worker::deinit()
+    {
+
+        vTaskDelete(taskHandle);
+
+        // for all queues - remove from set and delete queue
+        for (auto q : queues) {
+            // remove queues from set
+            xQueueRemoveFromSet(q, queueSet);
+            // delete queue
+            vQueueDelete(q);
+        }
+        queues.clear();
+
+        // delete queues set
+        vQueueDelete((QueueHandle_t)queueSet);
+        queueSet   = NULL;
+        taskHandle = NULL;
+
+        return true;
+    };
+    /**
+     * This method starts RTOS thread that waits for incomming queue events.
+     */
+    bool Worker::run()
+    {
+        static int workerCount = 0;
+        std::string workerName = service->GetName() + "_w" + std::to_string(workerCount);
+        BaseType_t task_error =
+            xTaskCreate(workerTaskFunction, workerName.c_str(), 2048, this, service->GetPriority(), &taskHandle);
+        if (task_error != pdPASS) {
+            LOG_ERROR("Failed to start the task");
+            return false;
+        }
+        return true;
+    }
+
+    bool Worker::stop()
+    {
+        return send(0, NULL);
+    }
+
+    bool Worker::handleMessage(uint32_t queueID)
+    {
+
+        QueueHandle_t queue = queues[queueID];
+
+        // service queue
+        if (queueID == 0) {
+            WorkerCommand wcmd;
+            if (xQueueReceive(queue, &wcmd, 0) != pdTRUE) {
+                return false;
+            }
+            wcmd.command = 1;
+            // place some code here to handle messages from service
+        }
+        return true;
+    }
+
+    bool Worker::send(uint32_t cmd, uint32_t *data)
+    {
+        if (serviceQueue != NULL) {
+            WorkerCommand wcmd{cmd, data};
+            if (xQueueSend(serviceQueue, &wcmd, portMAX_DELAY) == pdTRUE)
+                return true;
+        }
         return false;
     }
-    return true;
-}
 
-bool Worker::stop() {
-	return send( 0,NULL );
-
-}
-
-bool Worker::handleMessage( uint32_t queueID ) {
-
-	QueueHandle_t queue = queues[queueID];
-
-	//service queue
-	if( queueID == 0 ) {
-		WorkerCommand wcmd;
-		if( xQueueReceive(queue, &wcmd, 0 ) != pdTRUE ) {
-			return false;
-		}
-		wcmd.command = 1;
-		//place some code here to handle messages from service
-
-	}
-	return true;
-}
-
-bool Worker::send( uint32_t cmd, uint32_t* data ) {
-	if( serviceQueue != NULL ) {
-		WorkerCommand wcmd {cmd, data };
-		if( xQueueSend( serviceQueue, &wcmd, portMAX_DELAY ) == pdTRUE )
-			return true;
-	}
-	return false;
-}
-
-xQueueHandle Worker::getQueueByName(std::string qname)
-{
-    for (auto q_handle : this->queues)
+    xQueueHandle Worker::getQueueByName(std::string qname)
     {
-        if (this->queueNameMap[q_handle] == qname)
-            return q_handle;
+        for (auto q_handle : this->queues) {
+            if (this->queueNameMap[q_handle] == qname)
+                return q_handle;
+        }
+        return nullptr;
     }
-    return nullptr;
-}
 
 } /* namespace sys */
diff --git a/module-sys/Service/Worker.hpp b/module-sys/Service/Worker.hpp
index 30bfff61e..627c1f4d7 100644
--- a/module-sys/Service/Worker.hpp
+++ b/module-sys/Service/Worker.hpp
@@ -14,82 +14,86 @@
 
 #include "Service.hpp"
 
-namespace sys {
+namespace sys
+{
 
-class WorkerQueueInfo {
-public:
-  std::string name;
-  int elementSize;
-  int length;
-};
+    class WorkerQueueInfo
+    {
+      public:
+        std::string name;
+        int elementSize;
+        int length;
+    };
 
-struct WorkerCommand {
-	uint32_t command = 0;
-	uint32_t* data = NULL;
-};
+    struct WorkerCommand
+    {
+        uint32_t command = 0;
+        uint32_t *data   = NULL;
+    };
 
-/*
- * @brief Worker is a wrapper for freeRTOS task used to separate sysmanager environment from
- * the rest of the system. Its purpose is to handle asynchronous events like IRQ or timers.
- * Flow of creating worker is as follows:
- * - create new Worker object and provide pointer to the service that owns the worker,
- * - call init method and provide list of parameters to create queues. Those queues can be later
- * used to wake up the worker.
- * - call run method to start the worker.
- * Flow for closing the worker is as follows:
- * - call stop method - task will send a close confirmation to the service after exiting its main loop
- * - call deinit to destroy all queues ued by the worker
- * - delete the object.
- *
- */
-class Worker {
-protected:
-	const static uint32_t SERVICE_QUEUE_LENGTH = 10;
-	const static uint32_t SERVICE_QUEUE_SIZE = sizeof( WorkerCommand );
-    const std::string SERVICE_QUEUE_NAME = "ServiceQueue";
-
-    sys::Service* service;
-	//queue used by service to send commands to service.
-	xQueueHandle serviceQueue;
-	std::vector<xQueueHandle> queues;
-	QueueSetHandle_t queueSet;
-    std::map<xQueueHandle, std::string> queueNameMap;
-    xTaskHandle taskHandle;
-
-    friend void workerTaskFunction(void *ptr);
-
-  public:
-	Worker( sys::Service* service );
-	virtual ~Worker();
-
-	/**
-	 * This function is responsible for creating all queues provided in the constructor.
-	 * When all queues are created this method creates set of queues.
-	 */
-	virtual bool init( std::list<WorkerQueueInfo> queues = std::list<WorkerQueueInfo>());
-	virtual bool deinit();
-	/**
-	 * This method starts RTOS thread that waits for incomming queue events.
-	 */
-	virtual bool run();
-	/**
-	 * Sends stop command to worker.
-	 */
-	virtual bool stop();
-	/**
-	 * This method is called from thread when new message arrives in queue.
-	 * @param queueID Index of the queue in the queues vector.
-	 */
-	virtual bool handleMessage( uint32_t queueID );
-	/**
-	 * @brief Sends command and pointer to data to worker
-	 */
-	virtual bool send( uint32_t cmd, uint32_t* data );
-    /**
-     * @brief Returns handle to queue by its name
+    /*
+     * @brief Worker is a wrapper for freeRTOS task used to separate sysmanager environment from
+     * the rest of the system. Its purpose is to handle asynchronous events like IRQ or timers.
+     * Flow of creating worker is as follows:
+     * - create new Worker object and provide pointer to the service that owns the worker,
+     * - call init method and provide list of parameters to create queues. Those queues can be later
+     * used to wake up the worker.
+     * - call run method to start the worker.
+     * Flow for closing the worker is as follows:
+     * - call stop method - task will send a close confirmation to the service after exiting its main loop
+     * - call deinit to destroy all queues ued by the worker
+     * - delete the object.
+     *
      */
-    virtual xQueueHandle getQueueByName(std::string);
-};
+    class Worker
+    {
+      protected:
+        const static uint32_t SERVICE_QUEUE_LENGTH = 10;
+        const static uint32_t SERVICE_QUEUE_SIZE   = sizeof(WorkerCommand);
+        const std::string SERVICE_QUEUE_NAME       = "ServiceQueue";
+
+        sys::Service *service;
+        // queue used by service to send commands to service.
+        xQueueHandle serviceQueue;
+        std::vector<xQueueHandle> queues;
+        QueueSetHandle_t queueSet;
+        std::map<xQueueHandle, std::string> queueNameMap;
+        xTaskHandle taskHandle;
+
+        friend void workerTaskFunction(void *ptr);
+
+      public:
+        Worker(sys::Service *service);
+        virtual ~Worker();
+
+        /**
+         * This function is responsible for creating all queues provided in the constructor.
+         * When all queues are created this method creates set of queues.
+         */
+        virtual bool init(std::list<WorkerQueueInfo> queues = std::list<WorkerQueueInfo>());
+        virtual bool deinit();
+        /**
+         * This method starts RTOS thread that waits for incomming queue events.
+         */
+        virtual bool run();
+        /**
+         * Sends stop command to worker.
+         */
+        virtual bool stop();
+        /**
+         * This method is called from thread when new message arrives in queue.
+         * @param queueID Index of the queue in the queues vector.
+         */
+        virtual bool handleMessage(uint32_t queueID);
+        /**
+         * @brief Sends command and pointer to data to worker
+         */
+        virtual bool send(uint32_t cmd, uint32_t *data);
+        /**
+         * @brief Returns handle to queue by its name
+         */
+        virtual xQueueHandle getQueueByName(std::string);
+    };
 
 } /* namespace sys */
 
diff --git a/module-sys/SystemManager/PowerManager.cpp b/module-sys/SystemManager/PowerManager.cpp
index 629bbf746..3471488d8 100644
--- a/module-sys/SystemManager/PowerManager.cpp
+++ b/module-sys/SystemManager/PowerManager.cpp
@@ -2,51 +2,52 @@
  *  @file PowerManager.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 12.09.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
 #include <log/log.hpp>
 
 #include "PowerManager.hpp"
 
+namespace sys
+{
 
-namespace sys{
-
-    PowerManager::PowerManager(){
+    PowerManager::PowerManager()
+    {
         lowPowerControl = bsp::LowPowerMode::Create().value_or(nullptr);
     }
 
-    PowerManager::~PowerManager() {
+    PowerManager::~PowerManager()
+    {}
 
-    }
-
-    int32_t PowerManager::Switch(const sys::PowerManager::Mode mode) {
+    int32_t PowerManager::Switch(const sys::PowerManager::Mode mode)
+    {
 
         int32_t ret = 0;
-        switch(mode){
-            case Mode::FullSpeed:
-                ret = lowPowerControl->Switch(bsp::LowPowerMode::Mode::FullSpeed);
-                break;
-            case Mode::LowPowerIdle:
-            case Mode::LowPowerRun:
-            case Mode::Suspend:
-                LOG_FATAL("LowPowerIdle temporary disabled!");
-                // Low power is temporary disabled it was breaking i.e. GSM
-                // ret = lowPowerControl->Switch(bsp::LowPowerMode::Mode::LowPowerIdle);
-                break;
+        switch (mode) {
+        case Mode::FullSpeed:
+            ret = lowPowerControl->Switch(bsp::LowPowerMode::Mode::FullSpeed);
+            break;
+        case Mode::LowPowerIdle:
+        case Mode::LowPowerRun:
+        case Mode::Suspend:
+            LOG_FATAL("LowPowerIdle temporary disabled!");
+            // Low power is temporary disabled it was breaking i.e. GSM
+            // ret = lowPowerControl->Switch(bsp::LowPowerMode::Mode::LowPowerIdle);
+            break;
         }
 
-        if(ret == 0){
+        if (ret == 0) {
             currentPowerMode = mode;
         }
         return ret;
     }
 
-    int32_t PowerManager::PowerOff() {
+    int32_t PowerManager::PowerOff()
+    {
         return lowPowerControl->PowerOff();
     }
 
-}
+} // namespace sys
diff --git a/module-sys/SystemManager/PowerManager.hpp b/module-sys/SystemManager/PowerManager.hpp
index 2bfb801b6..385090060 100644
--- a/module-sys/SystemManager/PowerManager.hpp
+++ b/module-sys/SystemManager/PowerManager.hpp
@@ -2,13 +2,11 @@
  *  @file PowerManager.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 12.09.19
- *  @brief  
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-
-
 #ifndef PUREPHONE_POWERMANAGER_HPP
 #define PUREPHONE_POWERMANAGER_HPP
 
@@ -16,13 +14,15 @@
 
 #include "bsp/lpm/bsp_lpm.hpp"
 
-namespace sys {
+namespace sys
+{
 
-    class PowerManager{
+    class PowerManager
+    {
 
-    public:
-
-        enum class Mode{
+      public:
+        enum class Mode
+        {
             FullSpeed,
             LowPowerRun,
             LowPowerIdle,
@@ -30,25 +30,23 @@ namespace sys {
 
         };
 
-
         PowerManager();
         ~PowerManager();
 
         int32_t Switch(const Mode mode);
         int32_t PowerOff();
 
-        Mode GetCurrentMode(){return currentPowerMode;}
-
-    private:
+        Mode GetCurrentMode()
+        {
+            return currentPowerMode;
+        }
 
+      private:
         std::unique_ptr<bsp::LowPowerMode> lowPowerControl;
 
         Mode currentPowerMode = Mode ::FullSpeed;
-
-
     };
 
-}
+} // namespace sys
 
-
-#endif //PUREPHONE_POWERMANAGER_HPP
+#endif // PUREPHONE_POWERMANAGER_HPP
diff --git a/module-sys/SystemManager/SystemManager.cpp b/module-sys/SystemManager/SystemManager.cpp
index 71cf7f13f..2ce61478e 100644
--- a/module-sys/SystemManager/SystemManager.cpp
+++ b/module-sys/SystemManager/SystemManager.cpp
@@ -13,35 +13,36 @@
 
 #include <algorithm>
 
-
-namespace sys {
+namespace sys
+{
 
     using namespace cpp_freertos;
     using namespace std;
     using namespace sys;
 
-
     const char *systemManagerServiceName = "SysMgrService";
 
     SystemManager::SystemManager(TickType_t pingInterval)
-            : Service(systemManagerServiceName),
-              pingInterval(pingInterval) {
+        : Service(systemManagerServiceName), pingInterval(pingInterval)
+    {
         // Specify list of channels which System Manager is registered to
         busChannels = {BusChannels::SystemManagerRequests};
     }
 
-    SystemManager::~SystemManager() {
+    SystemManager::~SystemManager()
+    {
         LogOutput::Output(GetName() + ":destructor");
     }
 
-    void SystemManager::Run() {
+    void SystemManager::Run()
+    {
 
         InitHandler();
 
         if (userInit) {
             userInit();
         }
-        
+
         while (enableRunLoop) {
 
             auto msg = mailbox.pop();
@@ -54,7 +55,8 @@ namespace sys {
         powerManager->PowerOff();
     }
 
-    void SystemManager::StartSystem(std::function<int()> init) {
+    void SystemManager::StartSystem(std::function<int()> init)
+    {
         LogOutput::Output("Initializing system...");
 
         powerManager = std::make_unique<PowerManager>();
@@ -65,35 +67,38 @@ namespace sys {
         // Start System manager
         StartService();
 
-        //M.P: Ping/pong mechanism is turned off. It doesn't bring any value to the system.
-        //pingPongTimerID = CreateTimer(Ticks::MsToTicks(pingInterval), true);
-        //ReloadTimer(pingPongTimerID);
-
+        // M.P: Ping/pong mechanism is turned off. It doesn't bring any value to the system.
+        // pingPongTimerID = CreateTimer(Ticks::MsToTicks(pingInterval), true);
+        // ReloadTimer(pingPongTimerID);
     }
 
-    bool SystemManager::CloseSystem(Service *s) {
+    bool SystemManager::CloseSystem(Service *s)
+    {
 
-        Bus::SendUnicast(std::make_shared<SystemManagerMsg>(SystemManagerMsgType::CloseSystem),
-                         systemManagerServiceName, s);
+        Bus::SendUnicast(
+            std::make_shared<SystemManagerMsg>(SystemManagerMsgType::CloseSystem), systemManagerServiceName, s);
         return true;
     }
 
-    bool SystemManager::SuspendSystem(Service *caller) {
+    bool SystemManager::SuspendSystem(Service *caller)
+    {
 
-        if(powerManager->GetCurrentMode() != PowerManager::Mode::FullSpeed){
+        if (powerManager->GetCurrentMode() != PowerManager::Mode::FullSpeed) {
             LOG_WARN("System is already suspended.");
             return false;
         }
 
-        for (auto w = servicesList.rbegin(); w != servicesList.rend(); ++w)
-        {
-            if((*w)->parent == "" && (*w)->GetName() != caller->GetName()){
-                auto ret = Bus::SendUnicast(std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode,ServicePowerMode::SuspendToRAM),
-                                            (*w)->GetName(), caller,1000);
+        for (auto w = servicesList.rbegin(); w != servicesList.rend(); ++w) {
+            if ((*w)->parent == "" && (*w)->GetName() != caller->GetName()) {
+                auto ret = Bus::SendUnicast(
+                    std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode, ServicePowerMode::SuspendToRAM),
+                    (*w)->GetName(),
+                    caller,
+                    1000);
 
                 auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
-                if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)){
-                    LOG_FATAL("Service %s failed to enter low-power mode",(*w)->GetName().c_str());
+                if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)) {
+                    LOG_FATAL("Service %s failed to enter low-power mode", (*w)->GetName().c_str());
                 }
             }
         }
@@ -103,54 +108,66 @@ namespace sys {
         return true;
     }
 
-    bool SystemManager::ResumeSystem(Service *caller) {
+    bool SystemManager::ResumeSystem(Service *caller)
+    {
 
-        if(powerManager->GetCurrentMode() == PowerManager::Mode::FullSpeed){
+        if (powerManager->GetCurrentMode() == PowerManager::Mode::FullSpeed) {
             LOG_WARN("System is already resumed.");
             return false;
         }
 
         powerManager->Switch(PowerManager::Mode::FullSpeed);
 
-        for(const auto &w : servicesList){
+        for (const auto &w : servicesList) {
 
-            if(w->parent == "" && w->GetName() != caller->GetName()){
-                auto ret = Bus::SendUnicast(std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode,ServicePowerMode::Active),
-                                            w->GetName(), caller,1000);
+            if (w->parent == "" && w->GetName() != caller->GetName()) {
+                auto ret = Bus::SendUnicast(
+                    std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode, ServicePowerMode::Active),
+                    w->GetName(),
+                    caller,
+                    1000);
                 auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
 
-                if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)){
-                    LOG_FATAL("Service %s failed to exit low-power mode",w->GetName().c_str());
+                if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)) {
+                    LOG_FATAL("Service %s failed to exit low-power mode", w->GetName().c_str());
                 }
             }
         }
         return true;
     }
 
-    bool SystemManager::SuspendService(const std::string &name, sys::Service *caller) {
-        auto ret = Bus::SendUnicast(std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode,ServicePowerMode::SuspendToRAM),
-                                    name, caller,1000);
+    bool SystemManager::SuspendService(const std::string &name, sys::Service *caller)
+    {
+        auto ret = Bus::SendUnicast(
+            std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode, ServicePowerMode::SuspendToRAM),
+            name,
+            caller,
+            1000);
         auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
 
-        if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)){
-            LOG_FATAL("Service %s failed to exit low-power mode",name.c_str());
+        if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)) {
+            LOG_FATAL("Service %s failed to exit low-power mode", name.c_str());
         }
         return true;
     }
 
-    bool SystemManager::ResumeService(const std::string &name, sys::Service *caller){
-        auto ret = Bus::SendUnicast(std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode,ServicePowerMode::Active),
-                                    name, caller,1000);
+    bool SystemManager::ResumeService(const std::string &name, sys::Service *caller)
+    {
+        auto ret = Bus::SendUnicast(
+            std::make_shared<SystemMessage>(SystemMessageType::SwitchPowerMode, ServicePowerMode::Active),
+            name,
+            caller,
+            1000);
         auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
 
-        if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)){
-            LOG_FATAL("Service %s failed to exit low-power mode",name.c_str());
+        if (ret.first != ReturnCodes::Success && (resp->retCode != ReturnCodes::Success)) {
+            LOG_FATAL("Service %s failed to exit low-power mode", name.c_str());
         }
         return true;
     }
 
-    bool SystemManager::CreateService(std::shared_ptr<Service> service, Service *caller, TickType_t timeout) {
-
+    bool SystemManager::CreateService(std::shared_ptr<Service> service, Service *caller, TickType_t timeout)
+    {
 
         CriticalSection::Enter();
         servicesList.push_back(service);
@@ -158,29 +175,32 @@ namespace sys {
 
         service->StartService();
 
-        auto msg = std::make_shared<SystemMessage>(SystemMessageType::Start);
-        auto ret = Bus::SendUnicast(msg, service->GetName(), caller, timeout);
+        auto msg  = std::make_shared<SystemMessage>(SystemMessageType::Start);
+        auto ret  = Bus::SendUnicast(msg, service->GetName(), caller, timeout);
         auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
 
         if (ret.first == ReturnCodes::Success && (resp->retCode == ReturnCodes::Success)) {
             return true;
-        } else {
+        }
+        else {
             return false;
         }
     }
 
-    bool SystemManager::DestroyService(const std::string &name, Service *caller, TickType_t timeout) {
+    bool SystemManager::DestroyService(const std::string &name, Service *caller, TickType_t timeout)
+    {
 
-        auto msg = std::make_shared<SystemMessage>(SystemMessageType::Exit);
-        auto ret = Bus::SendUnicast(msg, name, caller, timeout);
+        auto msg  = std::make_shared<SystemMessage>(SystemMessageType::Exit);
+        auto ret  = Bus::SendUnicast(msg, name, caller, timeout);
         auto resp = std::static_pointer_cast<ResponseMessage>(ret.second);
 
         if (ret.first == ReturnCodes::Success && (resp->retCode == ReturnCodes::Success)) {
 
             cpp_freertos::LockGuard lck(destroyMutex);
 
-            auto serv = std::find_if(servicesList.begin(), servicesList.end(),
-                                     [&](std::shared_ptr<Service> const &s) { return s->GetName() == name; });
+            auto serv = std::find_if(servicesList.begin(), servicesList.end(), [&](std::shared_ptr<Service> const &s) {
+                return s->GetName() == name;
+            });
             if (serv == servicesList.end()) {
                 return false;
             }
@@ -188,55 +208,55 @@ namespace sys {
             servicesList.erase(serv);
 
             return true;
-        } else {
+        }
+        else {
             return false;
         }
     }
 
-
-    ReturnCodes SystemManager::InitHandler() {
+    ReturnCodes SystemManager::InitHandler()
+    {
         isReady = true;
         return ReturnCodes::Success;
     }
 
-
-    void SystemManager::TickHandler(uint32_t id) {
+    void SystemManager::TickHandler(uint32_t id)
+    {
         if (id == pingPongTimerID) {
 
             for (auto &w : servicesList) {
                 if (w->pingTimestamp == 0) {
-                    //no reponse for ping messages, restart system
+                    // no reponse for ping messages, restart system
                     LogOutput::Output(w->GetName() + " failed to response to ping message");
                     exit(1);
-                } else {
+                }
+                else {
                     w->pingTimestamp = 0;
                 }
             }
 
             Bus::SendBroadcast(std::make_shared<SystemMessage>(SystemMessageType::Ping), this);
         }
-
     }
 
-    Message_t SystemManager::DataReceivedHandler(DataMessage *msg, ResponseMessage *resp) {
+    Message_t SystemManager::DataReceivedHandler(DataMessage *msg, ResponseMessage *resp)
+    {
         if (msg->channel == BusChannels::SystemManagerRequests) {
             SystemManagerMsg *data = static_cast<SystemManagerMsg *>(msg);
 
             switch (data->type) {
 
-                case SystemManagerMsgType::CloseSystem:
-                    CloseSystemHandler();
-                    break;
-
+            case SystemManagerMsgType::CloseSystem:
+                CloseSystemHandler();
+                break;
             }
         }
 
-
         return std::make_shared<ResponseMessage>();
-
     }
 
-    void SystemManager::CloseSystemHandler() {
+    void SystemManager::CloseSystemHandler()
+    {
         LogOutput::Output("Invoking closing procedure...");
 
         DeleteTimer(pingPongTimerID);
@@ -246,16 +266,16 @@ namespace sys {
         std::reverse(servicesList.begin(), servicesList.end());
         CriticalSection::Exit();
 
-
-        retry:
+    retry:
         for (auto &w : servicesList) {
 
             // Sysmgr stores list of all active services but some of them are under control of parent services.
-            // Parent services ought to manage lifetime of child services hence we are sending DestroyRequests only to parents.
+            // Parent services ought to manage lifetime of child services hence we are sending DestroyRequests only to
+            // parents.
             if (w->parent == "") {
                 auto ret = DestroyService(w->GetName(), this);
                 if (!ret) {
-                    //no response to exit message,
+                    // no response to exit message,
                     LogOutput::Output(w->GetName() + " failed to response to exit message");
                     exit(1);
                 }
@@ -266,12 +286,10 @@ namespace sys {
         if (servicesList.size() == 0) {
             enableRunLoop = false;
         }
-
     }
 
-
     std::vector<std::shared_ptr<Service>> SystemManager::servicesList;
     cpp_freertos::MutexStandard SystemManager::destroyMutex;
     std::unique_ptr<PowerManager> SystemManager::powerManager;
 
-}
+} // namespace sys
diff --git a/module-sys/SystemManager/SystemManager.hpp b/module-sys/SystemManager/SystemManager.hpp
index 1a7858a71..adacd18af 100644
--- a/module-sys/SystemManager/SystemManager.hpp
+++ b/module-sys/SystemManager/SystemManager.hpp
@@ -22,82 +22,77 @@
 namespace sys
 {
 
-    enum class SystemManagerMsgType{
+    enum class SystemManagerMsgType
+    {
         CloseSystem,
     };
 
-    class SystemManagerMsg : public DataMessage{
-    public:
-
-        SystemManagerMsg(SystemManagerMsgType type):
-                DataMessage(BusChannels::SystemManagerRequests),
-                type(type){}
-
+    class SystemManagerMsg : public DataMessage
+    {
+      public:
+        SystemManagerMsg(SystemManagerMsgType type) : DataMessage(BusChannels::SystemManagerRequests), type(type)
+        {}
 
         SystemManagerMsgType type;
     };
 
+    class SystemManager : public Service
+    {
+      public:
+        SystemManager(TickType_t pingInterval);
 
-class SystemManager : public Service
-{
-public:
-	SystemManager(TickType_t pingInterval);
+        ~SystemManager();
 
-	~SystemManager();
+        void StartSystem(std::function<int()> init);
 
-	void StartSystem(std::function<int()> init);
+        // Invoke system close procedure
+        static bool CloseSystem(Service *s);
 
-	// Invoke system close procedure
-	static bool CloseSystem(Service* s);
+        static bool SuspendSystem(Service *caller);
 
-	static bool SuspendSystem(Service* caller);
+        static bool ResumeSystem(Service *caller);
 
-	static bool ResumeSystem(Service* caller);
+        static bool SuspendService(const std::string &name, Service *caller);
 
-	static bool SuspendService(const std::string& name,Service* caller);
+        static bool ResumeService(const std::string &name, Service *caller);
 
-    static bool ResumeService(const std::string& name,Service* caller);
+        // Create new service
+        static bool CreateService(std::shared_ptr<Service> service, Service *caller, TickType_t timeout = 5000);
 
-	// Create new service
-	static bool CreateService(std::shared_ptr<Service> service,Service* caller,TickType_t timeout=5000);
+        // Destroy existing service
+        static bool DestroyService(const std::string &name, Service *caller, TickType_t timeout = 5000);
 
-	// Destroy existing service
-	static bool DestroyService(const std::string& name,Service* caller,TickType_t timeout=5000);
+      private:
+        void TickHandler(uint32_t id) override;
 
-private:
+        Message_t DataReceivedHandler(DataMessage *msg, ResponseMessage *resp) override;
 
-	void TickHandler(uint32_t id) override;
+        ReturnCodes InitHandler() override;
 
-    Message_t DataReceivedHandler(DataMessage* msg,ResponseMessage* resp) override;
+        ReturnCodes DeinitHandler() override
+        {
+            return ReturnCodes::Success;
+        }
 
-    ReturnCodes InitHandler() override;
+        ReturnCodes SwitchPowerModeHandler(const ServicePowerMode mode) override final
+        {
+            return ReturnCodes::Success;
+        }
 
-    ReturnCodes DeinitHandler() override{return ReturnCodes::Success;}
+        void Run() override;
 
-    ReturnCodes SwitchPowerModeHandler(const ServicePowerMode mode) override final{return ReturnCodes::Success;}
+        void CloseSystemHandler();
 
+        TickType_t pingInterval;
+        uint32_t pingPongTimerID;
 
+        std::function<int()> userInit;
 
+        static std::vector<std::shared_ptr<Service>> servicesList;
+        static cpp_freertos::MutexStandard destroyMutex;
+        static std::unique_ptr<PowerManager> powerManager;
+    };
 
-    void Run() override;
-
-    void CloseSystemHandler();
-
-
-    TickType_t pingInterval;
-	uint32_t    pingPongTimerID;
-
-    std::function<int()> userInit;
-
-	static std::vector<std::shared_ptr<Service>> servicesList;
-    static cpp_freertos::MutexStandard destroyMutex;
-    static std::unique_ptr<PowerManager> powerManager;
-
-};
-
-
-
-
-}
+} // namespace sys
 
 #endif /* SYSTEMMANAGER_SYSTEMMANAGER_HPP_ */
diff --git a/module-sys/tests/BusChannelsCustom.hpp b/module-sys/tests/BusChannelsCustom.hpp
index 5958d9c3f..347edfcb6 100644
--- a/module-sys/tests/BusChannelsCustom.hpp
+++ b/module-sys/tests/BusChannelsCustom.hpp
@@ -6,7 +6,6 @@
 #define MODULE_CORE_BUSCHANNELSCUSTOM_HPP
 
 // Custom Bus channels
-CommandsServiceRequests,
-TestServiceRequests
+CommandsServiceRequests, TestServiceRequests
 
-#endif //MODULE_CORE_BUSCHANNELSCUSTOM_HPP
+#endif // MODULE_CORE_BUSCHANNELSCUSTOM_HPP
diff --git a/module-sys/tests/Common/SchedulerKiller.cpp b/module-sys/tests/Common/SchedulerKiller.cpp
index bbe0e2333..7b8ac9706 100644
--- a/module-sys/tests/Common/SchedulerKiller.cpp
+++ b/module-sys/tests/Common/SchedulerKiller.cpp
@@ -8,19 +8,18 @@
 #include "ticks.hpp"
 #include "SystemManager/SystemManager.hpp"
 
-
-
-SchedulerKiller::SchedulerKiller(const std::string &name):
-        sys::Service(name) {
-    timer_id = CreateTimer(cpp_freertos::Ticks::MsToTicks(100),true);
+SchedulerKiller::SchedulerKiller(const std::string &name) : sys::Service(name)
+{
+    timer_id = CreateTimer(cpp_freertos::Ticks::MsToTicks(100), true);
     ReloadTimer(timer_id);
 }
 
-void SchedulerKiller::TickHandler(uint32_t id) {
+void SchedulerKiller::TickHandler(uint32_t id)
+{
     sys::SystemManager::CloseSystem(this);
 }
 
-sys::Message_t SchedulerKiller::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp)
+sys::Message_t SchedulerKiller::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
 {
     return std::make_shared<sys::ResponseMessage>();
 }
\ No newline at end of file
diff --git a/module-sys/tests/Common/SchedulerKiller.hpp b/module-sys/tests/Common/SchedulerKiller.hpp
index 14070c101..fdd820228 100644
--- a/module-sys/tests/Common/SchedulerKiller.hpp
+++ b/module-sys/tests/Common/SchedulerKiller.hpp
@@ -7,35 +7,41 @@
 
 #include "Service/Service.hpp"
 
+class SchedulerKiller : public sys::Service
+{
 
-class SchedulerKiller : public sys::Service {
+  public:
+    SchedulerKiller(const std::string &name);
 
-public:
-    SchedulerKiller(const std::string& name);
-
-    ~SchedulerKiller(){
+    ~SchedulerKiller()
+    {
         LogOutput::Output(GetName() + ":destructor");
     }
 
     // Invoked when service received data message
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
 
     // Invoked when timer ticked
     void TickHandler(uint32_t id) override;
 
     // Invoked during initialization
-    sys::ReturnCodes InitHandler() override{return sys::ReturnCodes::Success;}
+    sys::ReturnCodes InitHandler() override
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-    sys::ReturnCodes DeinitHandler() override{return sys::ReturnCodes::Success;}
+    sys::ReturnCodes DeinitHandler() override
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
-
-
-private:
+    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+    {
+        return sys::ReturnCodes::Success;
+    }
 
+  private:
     uint32_t timer_id;
-
 };
 
-
-#endif //ACTORS_SCHEDULERKILLER_HPP
+#endif // ACTORS_SCHEDULERKILLER_HPP
diff --git a/module-sys/tests/Test1/CommandsService.cpp b/module-sys/tests/Test1/CommandsService.cpp
index 43cfe0a82..39afbe7c6 100644
--- a/module-sys/tests/Test1/CommandsService.cpp
+++ b/module-sys/tests/Test1/CommandsService.cpp
@@ -10,32 +10,33 @@
 #include "ticks.hpp"
 #include "Service/Bus.hpp"
 
-
-CommandsService::CommandsService(const std::string &name):
-        sys::Service(name) {
+CommandsService::CommandsService(const std::string &name) : sys::Service(name)
+{
 
     busChannels.push_back(sys::BusChannels::CommandsServiceRequests);
 
-    oneShotTimer = CreateTimer(cpp_freertos::Ticks::MsToTicks(1000),false);
+    oneShotTimer = CreateTimer(cpp_freertos::Ticks::MsToTicks(1000), false);
     ReloadTimer(oneShotTimer);
 }
 
-sys::ReturnCodes CommandsService::InitHandler() {
+sys::ReturnCodes CommandsService::InitHandler()
+{
     return sys::ReturnCodes::Success;
 }
 
-void CommandsService::TickHandler(uint32_t id) {
+void CommandsService::TickHandler(uint32_t id)
+{
 
     auto msg = std::make_shared<CommandsServiceMsgRequest>();
 
-    sys::Bus::SendUnicast(msg,GetName(),this);
-
+    sys::Bus::SendUnicast(msg, GetName(), this);
 }
 
-sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp){
+sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp)
+{
     uint32_t servCount = 10;
 
-    if(resp != nullptr){
+    if (resp != nullptr) {
         return std::make_shared<sys::ResponseMessage>();
     }
 
@@ -43,75 +44,72 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
      * Spawn 10 services and kill all of them
      */
 
-    //Spawn 10 test services
-    for(uint32_t i =0;i<servCount;i++){
-        auto ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("Test Service " + std::to_string(i)),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == i+1);
+    // Spawn 10 test services
+    for (uint32_t i = 0; i < servCount; i++) {
+        auto ret = sys::SystemManager::CreateService(
+            std::make_shared<TestService1>("Test Service " + std::to_string(i)), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == i + 1);
     }
 
-    //Destroy each service one by one
-   for(uint32_t i =servCount;i>0;i--){
-        REQUIRE( TestService1::TestServiceInstanceCount == i);
-        auto ret = sys::SystemManager::DestroyService("Test Service " + std::to_string(i-1),this);
-        REQUIRE( ret );
+    // Destroy each service one by one
+    for (uint32_t i = servCount; i > 0; i--) {
+        REQUIRE(TestService1::TestServiceInstanceCount == i);
+        auto ret = sys::SystemManager::DestroyService("Test Service " + std::to_string(i - 1), this);
+        REQUIRE(ret);
     }
 
-    REQUIRE( TestService1::TestServiceInstanceCount == 0);
+    REQUIRE(TestService1::TestServiceInstanceCount == 0);
 
+    /*
+     *
+     * Create 10 services,suspend,resume,send data and finally destroy them
+     *
+     */
 
-
-
-
-   /*
-    *
-    * Create 10 services,suspend,resume,send data and finally destroy them
-    *
-    */
-
-    for(uint32_t i =0;i<servCount;i++){
-        auto ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("Test Service " + std::to_string(i)),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == i+1);
+    for (uint32_t i = 0; i < servCount; i++) {
+        auto ret = sys::SystemManager::CreateService(
+            std::make_shared<TestService1>("Test Service " + std::to_string(i)), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == i + 1);
     }
 
-    REQUIRE( TestService1::TestServiceInstanceSuspendedCount == 0);
-
+    REQUIRE(TestService1::TestServiceInstanceSuspendedCount == 0);
 
     // Send 1000 data messages to test service using blocking Unicast method
     uint32_t dataMsgCount = 1000;
 
-    for(uint32_t i =0; i< dataMsgCount;i++){
+    for (uint32_t i = 0; i < dataMsgCount; i++) {
 
-        for(uint32_t j=0;j< servCount;j++){
+        for (uint32_t j = 0; j < servCount; j++) {
             auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
-            auto ret = sys::Bus::SendUnicast(msg,"Test Service " + std::to_string(j),this,5000);
-            REQUIRE( ret.first == sys::ReturnCodes::Success );
+            auto ret = sys::Bus::SendUnicast(msg, "Test Service " + std::to_string(j), this, 5000);
+            REQUIRE(ret.first == sys::ReturnCodes::Success);
         }
     }
 
     // Send 1000 data messages to test service using Multicast method
 
-    for(uint32_t i =0; i< dataMsgCount;i++){
+    for (uint32_t i = 0; i < dataMsgCount; i++) {
         auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
-        sys::Bus::SendMulticast(msg,sys::BusChannels::TestServiceRequests,this);
+        sys::Bus::SendMulticast(msg, sys::BusChannels::TestServiceRequests, this);
     }
     cpp_freertos::Thread::Delay(50);
 
-    REQUIRE( TestService1::TestServiceInstanceDataMsgCount == 2*servCount*dataMsgCount);
+    REQUIRE(TestService1::TestServiceInstanceDataMsgCount == 2 * servCount * dataMsgCount);
 
-    // Messages count should be 1, this is because there is still one left message which invoked this DataReceivedHandler
+    // Messages count should be 1, this is because there is still one left message which invoked this
+    // DataReceivedHandler
     REQUIRE(sys::Message::unitestsMsgInstancesCount == 1);
 
-
-    //Destroy each service one by one
-    for(uint32_t i =servCount;i>0;i--){
-        REQUIRE( TestService1::TestServiceInstanceCount == i);
-        auto ret = sys::SystemManager::DestroyService("Test Service " + std::to_string(i-1),this);
-        REQUIRE( ret );
+    // Destroy each service one by one
+    for (uint32_t i = servCount; i > 0; i--) {
+        REQUIRE(TestService1::TestServiceInstanceCount == i);
+        auto ret = sys::SystemManager::DestroyService("Test Service " + std::to_string(i - 1), this);
+        REQUIRE(ret);
     }
 
-    REQUIRE( TestService1::TestServiceInstanceCount == 0);
+    REQUIRE(TestService1::TestServiceInstanceCount == 0);
 
     /*
      *
@@ -120,29 +118,29 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
      *
      */
 
-
     {
-        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"),this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 1);
+        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"), this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 1);
 
-        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 1);
+        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 1);
 
-        REQUIRE( TestService1::TestServiceInstanceDataMsgCount == 0);
+        REQUIRE(TestService1::TestServiceInstanceDataMsgCount == 0);
 
-        sys::Bus::SendUnicast(std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Delayed),"TS",this);
+        sys::Bus::SendUnicast(
+            std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Delayed), "TS", this);
 
-        for(uint32_t i=0; i< 10;i++){
+        for (uint32_t i = 0; i < 10; i++) {
             auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
-            sys::Bus::SendUnicast(msg,"TS",this);
+            sys::Bus::SendUnicast(msg, "TS", this);
         }
 
         // Wait for TS to process incoming data
         cpp_freertos::Thread::Delay(200);
 
-        REQUIRE( TestService1::TestServiceInstanceDataMsgCount == 10);
+        REQUIRE(TestService1::TestServiceInstanceDataMsgCount == 10);
 
         // Messages count should be 12, this is because:
         // There is one response message (SendUnicast:145) waiting for processing
@@ -150,19 +148,15 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
         // There is still one left message which invoked this DataReceivedHandler
         REQUIRE(sys::Message::unitestsMsgInstancesCount == 12);
 
+        ret = sys::SystemManager::DestroyService("DelayedService", this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 0);
 
-        ret = sys::SystemManager::DestroyService("DelayedService",this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 0);
-
-        ret = sys::SystemManager::DestroyService("TS",this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 0);
-
-
+        ret = sys::SystemManager::DestroyService("TS", this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 0);
     }
 
-
     /*
      *
      * Unicast blocking API variants test 2
@@ -170,34 +164,31 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
      *
      */
 
-
     {
 
         uint32_t currentMessagesInstances = sys::Message::unitestsMsgInstancesCount;
 
-        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"),this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 1);
+        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"), this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 1);
 
-        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 1);
+        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 1);
 
-        sys::Bus::SendUnicast(std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Delayed),"TS",this);
+        sys::Bus::SendUnicast(
+            std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Delayed), "TS", this);
 
         // There is one more pending response message (result of invoking SendUnicast at :195)
-        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances+1 );
-
-
-        ret = sys::SystemManager::DestroyService("TS",this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 0);
-
-        ret = sys::SystemManager::DestroyService("DelayedService",this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 0);
+        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances + 1);
 
+        ret = sys::SystemManager::DestroyService("TS", this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 0);
 
+        ret = sys::SystemManager::DestroyService("DelayedService", this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 0);
     }
 
     /*
@@ -207,47 +198,40 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
      *
      */
 
-
     {
 
         uint32_t currentMessagesInstances = sys::Message::unitestsMsgInstancesCount;
 
-        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"),this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 1);
+        auto ret = sys::SystemManager::CreateService(std::make_shared<DelayedService>("DelayedService"), this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 1);
 
-        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 1);
+        ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("TS"), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 1);
 
         {
             auto retFalse = sys::Bus::SendUnicast(
-                    std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::DelayedFail), "TS", this,
-                    1000);
+                std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::DelayedFail), "TS", this, 1000);
 
             auto resp = std::static_pointer_cast<TestServiceResponse>(retFalse.second);
 
             REQUIRE(resp->ret == sys::ReturnCodes::Timeout);
-
         }
 
         cpp_freertos::Thread::Delay(200);
 
-        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances );
-
-
-        ret = sys::SystemManager::DestroyService("TS",this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == 0);
-
-        ret = sys::SystemManager::DestroyService("DelayedService",this);
-        REQUIRE( ret );
-        REQUIRE( DelayedService::DelayerServiceInstanceCount == 0);
+        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances);
 
+        ret = sys::SystemManager::DestroyService("TS", this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == 0);
 
+        ret = sys::SystemManager::DestroyService("DelayedService", this);
+        REQUIRE(ret);
+        REQUIRE(DelayedService::DelayerServiceInstanceCount == 0);
     }
 
-
     /*
      *
      * Send data messages: many to many variant
@@ -257,54 +241,47 @@ sys::Message_t CommandsService::DataReceivedHandler(sys::DataMessage* msgl,sys::
         uint32_t currentMessagesInstances = sys::Message::unitestsMsgInstancesCount;
 
         // Spawn 10 test services
-        for(uint32_t i =0;i<servCount;i++){
-            auto ret = sys::SystemManager::CreateService(std::make_shared<TestService1>(std::to_string(i)),this);
-            REQUIRE( ret );
-            REQUIRE( TestService1::TestServiceInstanceCount == i+1);
+        for (uint32_t i = 0; i < servCount; i++) {
+            auto ret = sys::SystemManager::CreateService(std::make_shared<TestService1>(std::to_string(i)), this);
+            REQUIRE(ret);
+            REQUIRE(TestService1::TestServiceInstanceCount == i + 1);
         }
 
-        sys::Bus::SendMulticast(std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::SendData),sys::BusChannels::TestServiceRequests,this);
-
+        sys::Bus::SendMulticast(std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::SendData),
+                                sys::BusChannels::TestServiceRequests,
+                                this);
 
         cpp_freertos::Thread::Delay(500);
 
-        REQUIRE( TestService1::TestServiceInstanceDataMsgCount == servCount*1000);
+        REQUIRE(TestService1::TestServiceInstanceDataMsgCount == servCount * 1000);
 
-
-        //Destroy each service one by one
-        for(uint32_t i =servCount;i>0;i--){
-            REQUIRE( TestService1::TestServiceInstanceCount == i);
-            auto ret = sys::SystemManager::DestroyService(std::to_string(i-1),this);
-            REQUIRE( ret );
+        // Destroy each service one by one
+        for (uint32_t i = servCount; i > 0; i--) {
+            REQUIRE(TestService1::TestServiceInstanceCount == i);
+            auto ret = sys::SystemManager::DestroyService(std::to_string(i - 1), this);
+            REQUIRE(ret);
         }
 
-        REQUIRE( TestService1::TestServiceInstanceCount == 0);
-
-        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances );
-
+        REQUIRE(TestService1::TestServiceInstanceCount == 0);
 
+        REQUIRE(sys::Message::unitestsMsgInstancesCount == currentMessagesInstances);
     }
 
-
-
-
-
     /*
      *
      * Test system close
      *
      */
 
-
-
-    for(uint32_t i =0;i<servCount;i++){
-        auto ret = sys::SystemManager::CreateService(std::make_shared<TestService1>("Test Service " + std::to_string(i)),this);
-        REQUIRE( ret );
-        REQUIRE( TestService1::TestServiceInstanceCount == i+1);
+    for (uint32_t i = 0; i < servCount; i++) {
+        auto ret = sys::SystemManager::CreateService(
+            std::make_shared<TestService1>("Test Service " + std::to_string(i)), this);
+        REQUIRE(ret);
+        REQUIRE(TestService1::TestServiceInstanceCount == i + 1);
     }
 
-    auto ret = sys::SystemManager::CreateService(std::make_shared<SchedulerKiller>("Scheduler killer"),this);
-    REQUIRE( ret );
+    auto ret = sys::SystemManager::CreateService(std::make_shared<SchedulerKiller>("Scheduler killer"), this);
+    REQUIRE(ret);
 
     return std::make_shared<sys::ResponseMessage>();
 }
\ No newline at end of file
diff --git a/module-sys/tests/Test1/CommandsService.hpp b/module-sys/tests/Test1/CommandsService.hpp
index 8acd33249..ed722bcf8 100644
--- a/module-sys/tests/Test1/CommandsService.hpp
+++ b/module-sys/tests/Test1/CommandsService.hpp
@@ -5,50 +5,54 @@
 #ifndef ACTORS_INITSERVICE_HPP
 #define ACTORS_INITSERVICE_HPP
 
-
 #include "../catch.hpp"
 #include "Service/Service.hpp"
 #include "SystemManager/SystemManager.hpp"
 
-
 #include "Service/Message.hpp"
 
-enum class CommandsServiceMsgRequestType{
+enum class CommandsServiceMsgRequestType
+{
     SpawnServices,
     DestroyServices
 };
 
-class CommandsServiceMsgRequest : public sys::DataMessage{
-public:
-    CommandsServiceMsgRequest(): DataMessage(sys::BusChannels::CommandsServiceRequests){}
+class CommandsServiceMsgRequest : public sys::DataMessage
+{
+  public:
+    CommandsServiceMsgRequest() : DataMessage(sys::BusChannels::CommandsServiceRequests)
+    {}
 
     CommandsServiceMsgRequestType type;
-
 };
 
-
-class CommandsService : public sys::Service {
-public:
-    CommandsService(const std::string& name);
-    ~CommandsService(){
-    }
+class CommandsService : public sys::Service
+{
+  public:
+    CommandsService(const std::string &name);
+    ~CommandsService()
+    {}
 
     // Invoked when service received data message
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override;
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override;
 
     // Invoked during initialization
     sys::ReturnCodes InitHandler() override;
 
     void TickHandler(uint32_t id) override;
 
-    sys::ReturnCodes DeinitHandler() override{return sys::ReturnCodes::Success;}
+    sys::ReturnCodes DeinitHandler() override
+    {
+        return sys::ReturnCodes::Success;
+    }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
-
-private:
+    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+    {
+        return sys::ReturnCodes::Success;
+    }
 
+  private:
     uint32_t oneShotTimer = 0;
 };
 
-
-#endif //ACTORS_INITSERVICE_HPP
+#endif // ACTORS_INITSERVICE_HPP
diff --git a/module-sys/tests/Test1/DelayedService.cpp b/module-sys/tests/Test1/DelayedService.cpp
index bb2010926..cdc2910df 100644
--- a/module-sys/tests/Test1/DelayedService.cpp
+++ b/module-sys/tests/Test1/DelayedService.cpp
@@ -4,7 +4,5 @@
 
 #include "DelayedService.hpp"
 
-
-
-uint32_t DelayedService::DelayerServiceInstanceCount=0;
-uint32_t DelayedService::DelayerServiceDataMessageReceivedCount=0;
\ No newline at end of file
+uint32_t DelayedService::DelayerServiceInstanceCount            = 0;
+uint32_t DelayedService::DelayerServiceDataMessageReceivedCount = 0;
\ No newline at end of file
diff --git a/module-sys/tests/Test1/DelayedService.hpp b/module-sys/tests/Test1/DelayedService.hpp
index e0e849cb3..98e114dd1 100644
--- a/module-sys/tests/Test1/DelayedService.hpp
+++ b/module-sys/tests/Test1/DelayedService.hpp
@@ -5,28 +5,25 @@
 #ifndef MODULE_SYS_DELAYEDSERVICE_HPP
 #define MODULE_SYS_DELAYEDSERVICE_HPP
 
-
 #include "Service/Service.hpp"
 #include "Service/Message.hpp"
 #include "Service/Common.hpp"
 #include "Service/LogOutput.hpp"
 #include "../../SystemManager/SystemManager.hpp"
 
+class DelayedService : public sys::Service
+{
 
-class DelayedService : public sys::Service {
+  public:
+    DelayedService(const std::string &name) : sys::Service(name)
+    {}
 
-public:
-    DelayedService(const std::string& name)
-            : sys::Service(name)
-    {
-    }
-
-    ~DelayedService(){
-    }
+    ~DelayedService()
+    {}
 
     // Invoked when service received data message
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override{
-
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override
+    {
 
         cpp_freertos::Thread::Delay(100);
 
@@ -34,27 +31,29 @@ public:
     }
 
     // Invoked when timer ticked
-    void TickHandler(uint32_t id) override{
-    }
+    void TickHandler(uint32_t id) override
+    {}
 
     // Invoked during initialization
-    sys::ReturnCodes InitHandler() override{
+    sys::ReturnCodes InitHandler() override
+    {
         DelayerServiceInstanceCount++;
         return sys::ReturnCodes::Success;
-
     }
 
-    sys::ReturnCodes DeinitHandler() override{
+    sys::ReturnCodes DeinitHandler() override
+    {
         DelayerServiceInstanceCount--;
         return sys::ReturnCodes::Success;
     }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+    {
+        return sys::ReturnCodes::Success;
+    }
 
     static uint32_t DelayerServiceInstanceCount;
     static uint32_t DelayerServiceDataMessageReceivedCount;
-
 };
 
-
-#endif //MODULE_SYS_DELAYEDSERVICE_HPP
+#endif // MODULE_SYS_DELAYEDSERVICE_HPP
diff --git a/module-sys/tests/Test1/TestService1.cpp b/module-sys/tests/Test1/TestService1.cpp
index f5c6c8b66..cb55e71f2 100644
--- a/module-sys/tests/Test1/TestService1.cpp
+++ b/module-sys/tests/Test1/TestService1.cpp
@@ -4,8 +4,6 @@
 
 #include "TestService1.hpp"
 
-
-
-uint32_t TestService1::TestServiceInstanceCount = 0;
-uint32_t TestService1::TestServiceInstanceSuspendedCount =0;
-uint32_t TestService1::TestServiceInstanceDataMsgCount = 0;
\ No newline at end of file
+uint32_t TestService1::TestServiceInstanceCount          = 0;
+uint32_t TestService1::TestServiceInstanceSuspendedCount = 0;
+uint32_t TestService1::TestServiceInstanceDataMsgCount   = 0;
\ No newline at end of file
diff --git a/module-sys/tests/Test1/TestService1.hpp b/module-sys/tests/Test1/TestService1.hpp
index 4c9ee90f5..e6814dd2c 100644
--- a/module-sys/tests/Test1/TestService1.hpp
+++ b/module-sys/tests/Test1/TestService1.hpp
@@ -12,135 +12,121 @@
 #include "Service/LogOutput.hpp"
 #include "../../SystemManager/SystemManager.hpp"
 
-
-enum class TestServiceDataMessageType{
-    Plain=1,
+enum class TestServiceDataMessageType
+{
+    Plain = 1,
     Delayed,
     DelayedFail,
     SendData
 };
 
-
-class TestServiceResponse : public sys::ResponseMessage{
-public:
-    TestServiceResponse(sys::ReturnCodes ret):
-        ResponseMessage(),
-        ret(ret){
-
-    }
+class TestServiceResponse : public sys::ResponseMessage
+{
+  public:
+    TestServiceResponse(sys::ReturnCodes ret) : ResponseMessage(), ret(ret)
+    {}
     sys::ReturnCodes ret;
 };
 
-
-class TestServiceDataMessage : public sys::DataMessage{
-public:
-
-    TestServiceDataMessage(TestServiceDataMessageType type):
-        DataMessage(static_cast<uint32_t >(0)),
-        type(type){
-
-    }
-
+class TestServiceDataMessage : public sys::DataMessage
+{
+  public:
+    TestServiceDataMessage(TestServiceDataMessageType type) : DataMessage(static_cast<uint32_t>(0)), type(type)
+    {}
 
     TestServiceDataMessageType type;
 };
 
-class TestService1 : public sys::Service {
+class TestService1 : public sys::Service
+{
 
-public:
-    TestService1(const std::string& name)
-        : sys::Service(name)
+  public:
+    TestService1(const std::string &name) : sys::Service(name)
     {
         busChannels.push_back(sys::BusChannels::TestServiceRequests);
     }
 
-    ~TestService1(){
-    }
+    ~TestService1()
+    {}
 
     // Invoked when service received data message
-    sys::Message_t DataReceivedHandler(sys::DataMessage* msgl,sys::ResponseMessage* resp) override{
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp) override
+    {
 
-        TestServiceDataMessage* msg = static_cast<TestServiceDataMessage*>(msgl);
+        TestServiceDataMessage *msg = static_cast<TestServiceDataMessage *>(msgl);
 
         sys::ReturnCodes ret = sys::ReturnCodes ::Success;
 
-        switch (msg->type){
+        switch (msg->type) {
 
-            case TestServiceDataMessageType ::Delayed:
-            {
-                auto msg = std::make_shared<sys::DataMessage>(0);
-                auto retSend = sys::Bus::SendUnicast(msg,"DelayedService",this,5000);
-                REQUIRE( retSend.first == sys::ReturnCodes::Success );
-                ret = retSend.first;
-            }
-                break;
+        case TestServiceDataMessageType ::Delayed: {
+            auto msg     = std::make_shared<sys::DataMessage>(0);
+            auto retSend = sys::Bus::SendUnicast(msg, "DelayedService", this, 5000);
+            REQUIRE(retSend.first == sys::ReturnCodes::Success);
+            ret = retSend.first;
+        } break;
 
-            case TestServiceDataMessageType ::DelayedFail:
-            {
-                auto msg = std::make_shared<sys::DataMessage>(0);
-                auto retSend = sys::Bus::SendUnicast(msg,"DelayedService",this,50);
-                REQUIRE( retSend.first == sys::ReturnCodes::Timeout );
-                ret = retSend.first;
-            }
-                break;
+        case TestServiceDataMessageType ::DelayedFail: {
+            auto msg     = std::make_shared<sys::DataMessage>(0);
+            auto retSend = sys::Bus::SendUnicast(msg, "DelayedService", this, 50);
+            REQUIRE(retSend.first == sys::ReturnCodes::Timeout);
+            ret = retSend.first;
+        } break;
 
-            case TestServiceDataMessageType ::Plain:
-                TestServiceInstanceDataMsgCount++;
-                break;
+        case TestServiceDataMessageType ::Plain:
+            TestServiceInstanceDataMsgCount++;
+            break;
 
-            case TestServiceDataMessageType ::SendData:
-            {
-                if(std::stoi(GetName()) == 9 ){
+        case TestServiceDataMessageType ::SendData: {
+            if (std::stoi(GetName()) == 9) {
 
-                    for(uint32_t i=0;i<1000;i++){
-                        auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
-                        sys::Bus::SendUnicast(msg,"0",this);
-                    }
-                }
-                else{
-                    for(uint32_t i=0;i<1000;i++){
-                        auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
-                        sys::Bus::SendUnicast(msg,std::to_string(std::stoi(GetName())+1),this);
-                    }
+                for (uint32_t i = 0; i < 1000; i++) {
+                    auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
+                    sys::Bus::SendUnicast(msg, "0", this);
                 }
             }
+            else {
+                for (uint32_t i = 0; i < 1000; i++) {
+                    auto msg = std::make_shared<TestServiceDataMessage>(TestServiceDataMessageType::Plain);
+                    sys::Bus::SendUnicast(msg, std::to_string(std::stoi(GetName()) + 1), this);
+                }
+            }
+        }
 
-                break;
-
-
-
+        break;
         }
 
         return std::make_shared<TestServiceResponse>(ret);
     }
 
     // Invoked when timer ticked
-    void TickHandler(uint32_t id) override{
-    }
+    void TickHandler(uint32_t id) override
+    {}
 
     // Invoked during initialization
-    sys::ReturnCodes InitHandler() override{
+    sys::ReturnCodes InitHandler() override
+    {
         TestServiceInstanceCount++;
         return sys::ReturnCodes::Success;
-
     }
 
-    sys::ReturnCodes DeinitHandler() override{
+    sys::ReturnCodes DeinitHandler() override
+    {
         TestServiceInstanceCount--;
-        if(TestServiceInstanceCount == 0){
-            TestServiceInstanceDataMsgCount=0;
+        if (TestServiceInstanceCount == 0) {
+            TestServiceInstanceDataMsgCount = 0;
         }
         return sys::ReturnCodes::Success;
     }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
-
+    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+    {
+        return sys::ReturnCodes::Success;
+    }
 
     static uint32_t TestServiceInstanceCount;
     static uint32_t TestServiceInstanceSuspendedCount;
     static uint32_t TestServiceInstanceDataMsgCount;
-
 };
 
-
-#endif //DBUS_TESTSERVICE1_H
+#endif // DBUS_TESTSERVICE1_H
diff --git a/module-sys/tests/tests-main.cpp b/module-sys/tests/tests-main.cpp
old mode 100755
new mode 100644
index bbcc2c851..b55b043e7
--- a/module-sys/tests/tests-main.cpp
+++ b/module-sys/tests/tests-main.cpp
@@ -2,10 +2,10 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
\ No newline at end of file
diff --git a/module-sys/tests/tests.cpp b/module-sys/tests/tests.cpp
old mode 100755
new mode 100644
index e5b036b1f..1a9884b26
--- a/module-sys/tests/tests.cpp
+++ b/module-sys/tests/tests.cpp
@@ -2,7 +2,7 @@
  *  @file tests.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -14,21 +14,22 @@
 #include "Test1/CommandsService.hpp"
 #include "Test1/TestService1.hpp"
 
-TEST_CASE( "Test case 1" ) {
+TEST_CASE("Test case 1")
+{
 
-        auto sysmgr = std::make_shared<sys::SystemManager>(50000);
+    auto sysmgr = std::make_shared<sys::SystemManager>(50000);
 
-        sysmgr->StartSystem([sysmgr]()->int{
-            auto ret = sys::SystemManager::CreateService(std::make_shared<CommandsService>("CommandsService"),sysmgr.get());
-            REQUIRE(ret);
+    sysmgr->StartSystem([sysmgr]() -> int {
+        auto ret =
+            sys::SystemManager::CreateService(std::make_shared<CommandsService>("CommandsService"), sysmgr.get());
+        REQUIRE(ret);
 
-            return 0;
-        });
+        return 0;
+    });
 
-        cpp_freertos::Thread::StartScheduler();
-
-        REQUIRE( TestService1::TestServiceInstanceCount  == 0);
+    cpp_freertos::Thread::StartScheduler();
 
+    REQUIRE(TestService1::TestServiceInstanceCount == 0);
 }
 
 #if 0
diff --git a/module-utils/Utils.hpp b/module-utils/Utils.hpp
index 88079193a..64607148e 100644
--- a/module-utils/Utils.hpp
+++ b/module-utils/Utils.hpp
@@ -12,8 +12,7 @@ namespace utils
     {
         std::stringstream ss(s);
         std::string item;
-        while (std::getline(ss, item, delim))
-        {
+        while (std::getline(ss, item, delim)) {
             *(result++) = item;
         }
     }
@@ -25,27 +24,26 @@ namespace utils
         return elems;
     }
 
-    static inline std::vector<std::string> split(const std::string &s, const std::string &delimiter, const bool skipEmptyTokens = true)
+    static inline std::vector<std::string> split(const std::string &s,
+                                                 const std::string &delimiter,
+                                                 const bool skipEmptyTokens = true)
     {
         size_t pos_start = 0, pos_end, delim_len = delimiter.length();
         std::string token;
         std::vector<std::string> res;
         uint32_t tokenCount = 0;
 
-        while (((pos_end = s.find(delimiter, pos_start)) != std::string::npos))
-        {
-            token = s.substr(pos_start, pos_end - pos_start);
+        while (((pos_end = s.find(delimiter, pos_start)) != std::string::npos)) {
+            token     = s.substr(pos_start, pos_end - pos_start);
             pos_start = pos_end + delim_len;
-            if (!skipEmptyTokens || !token.empty())
-            {
+            if (!skipEmptyTokens || !token.empty()) {
                 tokenCount++;
                 res.push_back(token);
             }
         }
 
         token = s.substr(pos_start);
-        if (!skipEmptyTokens || !token.empty())
-        {
+        if (!skipEmptyTokens || !token.empty()) {
             res.push_back(token);
         }
         return res;
diff --git a/module-utils/board/cross/log.cpp b/module-utils/board/cross/log.cpp
index 7137ff2e5..7c53ca242 100644
--- a/module-utils/board/cross/log.cpp
+++ b/module-utils/board/cross/log.cpp
@@ -5,7 +5,8 @@
 #include "../../log/log.hpp"
 #include "../../log/segger/SEGGER_RTT.h"
 #include <ticks.hpp>
-extern "C" {
+extern "C"
+{
 #include "FreeRTOS.h"
 }
 #include "semphr.h"
@@ -16,14 +17,14 @@ extern "C" {
 /*
  * TODO: M.P
  * Redictering log output to serial console in this form need be considered as quick&dirty solution.
- * It should be refactored i.e serial terminal BSP created and used here instead of using RT1051's low-level routines directly.
+ * It should be refactored i.e serial terminal BSP created and used here instead of using RT1051's low-level routines
+ * directly.
  */
 #if LOG_REDIRECT_TO_SERIAL == 1
 #include "fsl_lpuart.h"
 #endif
 
-
-#define LOGGER_BUFFER_SIZE  4096
+#define LOGGER_BUFFER_SIZE 4096
 
 #if LOG_USE_COLOR == 1
 #define CONSOLE_ESCAPE_COLOR_BLACK              "\x1b[30m"
@@ -63,14 +64,10 @@ extern "C" {
 #define CONSOLE_ESCAPE_COLOR_BACKGROUND_WHITE
 #endif
 
-const char *level_names[] = {
-        "TRACE", "DEBUG", "INFO", "WARN", "ERROR", "FATAL"
-};
+const char *level_names[] = {"TRACE", "DEBUG", "INFO", "WARN", "ERROR", "FATAL"};
 
 #if LOG_USE_COLOR == 1
-static const char *level_colors[] = {
-  "\x1b[94m", "\x1b[36m", "\x1b[32m", "\x1b[33m", "\x1b[31m", "\x1b[35m"
-};
+static const char *level_colors[] = {"\x1b[94m", "\x1b[36m", "\x1b[32m", "\x1b[33m", "\x1b[31m", "\x1b[35m"};
 #else
 static const char *level_colors[] = {"", "", "", "", "", ""};
 #endif
@@ -78,15 +75,17 @@ static const char *level_colors[] = {"", "", "", "", "", ""};
 #include <map>
 #include <string>
 
-struct Logger{
-    Logger( logger_level level = LOGTRACE ) : level{ level } {
+struct Logger
+{
+    Logger(logger_level level = LOGTRACE) : level{level}
+    {
 
         lock = xSemaphoreCreateMutex();
 
         assert(lock != NULL);
 
         /* Acquire lock */
-        if(xSemaphoreTake(lock,100) != pdPASS){
+        if (xSemaphoreTake(lock, 100) != pdPASS) {
             return;
         }
 
@@ -94,18 +93,15 @@ struct Logger{
 
         /* Release lock */
         xSemaphoreGive(lock);
-
     }
 
     bool logLock()
     {
         // if called from the ISR use DI/EI. In all other cases use semaphore.
-        if (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)
-        {
+        if (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) {
             bt = cpp_freertos::CriticalSection::EnterFromISR();
         }
-        else if (xSemaphoreTake(lock, 100) != pdPASS)
-        {
+        else if (xSemaphoreTake(lock, 100) != pdPASS) {
             return false;
         }
         return true;
@@ -114,12 +110,10 @@ struct Logger{
     void logUnlock()
     {
         // if called from the ISR use DI/EI. In all other cases use semaphore.
-        if (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)
-        {
+        if (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) {
             cpp_freertos::CriticalSection::ExitFromISR(bt);
         }
-        else
-        {
+        else {
             xSemaphoreGive(lock);
         }
     }
@@ -149,22 +143,21 @@ static char loggerBuffer[LOGGER_BUFFER_SIZE] = {0};
 
 void log_Printf(const char *fmt, ...)
 {
-    if (!logger.logLock())
-    {
+    if (!logger.logLock()) {
         return;
     }
 
-    char* ptr = loggerBuffer;
+    char *ptr = loggerBuffer;
     va_list args;
 
     va_start(args, fmt);
-    ptr += vsnprintf(ptr,&loggerBuffer[LOGGER_BUFFER_SIZE]-ptr, fmt, args);
+    ptr += vsnprintf(ptr, &loggerBuffer[LOGGER_BUFFER_SIZE] - ptr, fmt, args);
     va_end(args);
 
 #if LOG_REDIRECT_TO_SERIAL == 1
-    LPUART_WriteBlocking(LPUART3, (uint8_t*)loggerBuffer,ptr-loggerBuffer);
+    LPUART_WriteBlocking(LPUART3, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
 #else
-    SEGGER_RTT_Write(0,(uint8_t*)loggerBuffer,ptr-loggerBuffer);
+    SEGGER_RTT_Write(0, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
 #endif
 
     logger.logUnlock();
@@ -176,21 +169,22 @@ void log_Printf(const char *fmt, ...)
 /// - else return thread name
 static inline const char *getTaskDesc()
 {
-    return xTaskGetCurrentTaskHandle() == NULL ? "CRIT" : xPortIsInsideInterrupt() ? "IRQ" : pcTaskGetName(xTaskGetCurrentTaskHandle());
+    return xTaskGetCurrentTaskHandle() == NULL
+               ? "CRIT"
+               : xPortIsInsideInterrupt() ? "IRQ" : pcTaskGetName(xTaskGetCurrentTaskHandle());
 }
 
-static void _log_Log(logger_level level, const char *file, int line,const char *function, const char *fmt, va_list args)
+static void _log_Log(
+    logger_level level, const char *file, int line, const char *function, const char *fmt, va_list args)
 {
-    if (!logger.logLock())
-    {
+    if (!logger.logLock()) {
         return;
     }
 
-    char* ptr = loggerBuffer;
+    char *ptr = loggerBuffer;
 
     // filter out not interesing logs
-    if (logger.filterThreadName(getTaskDesc()) >= level)
-    {
+    if (logger.filterThreadName(getTaskDesc()) >= level) {
         logger.logUnlock();
         return;
     }
@@ -199,29 +193,34 @@ static void _log_Log(logger_level level, const char *file, int line,const char *
 
 #if LOG_USE_COLOR == 1
 
-    ptr += sprintf(ptr, "%s%-5s " CONSOLE_ESCAPE_COLOR_MAGENTA "[%-10s] \x1b[90m%s:%d:" CONSOLE_ESCAPE_COLOR_RESET, level_colors[level], level_names[level],
-                   getTaskDesc(), file, line);
+    ptr += sprintf(ptr,
+                   "%s%-5s " CONSOLE_ESCAPE_COLOR_MAGENTA "[%-10s] \x1b[90m%s:%d:" CONSOLE_ESCAPE_COLOR_RESET,
+                   level_colors[level],
+                   level_names[level],
+                   getTaskDesc(),
+                   file,
+                   line);
 #else
-    ptr += sprintf(ptr,"%-5s %s:%s:%d: ", level_names[level], file, function, line);
+    ptr += sprintf(ptr, "%-5s %s:%s:%d: ", level_names[level], file, function, line);
 #endif
-    ptr += vsnprintf(ptr,&loggerBuffer[LOGGER_BUFFER_SIZE]-ptr, fmt, args);
-    ptr += sprintf(ptr,"\r\n");
+    ptr += vsnprintf(ptr, &loggerBuffer[LOGGER_BUFFER_SIZE] - ptr, fmt, args);
+    ptr += sprintf(ptr, "\r\n");
 
 #if LOG_REDIRECT_TO_SERIAL == 1
-    LPUART_WriteBlocking(LPUART3, (uint8_t*)loggerBuffer,ptr-loggerBuffer);
+    LPUART_WriteBlocking(LPUART3, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
 #else
-    SEGGER_RTT_Write(0,(uint8_t*)loggerBuffer,ptr-loggerBuffer);
+    SEGGER_RTT_Write(0, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
 #endif
 
     /* Release lock */
     logger.logUnlock();
 }
 
-void log_Log(logger_level level, const char *file, int line,const char *function, const char *fmt, ...)
+void log_Log(logger_level level, const char *file, int line, const char *function, const char *fmt, ...)
 {
     va_list args;
     va_start(args, fmt);
-    _log_Log(level, file,line, function, fmt, args);
+    _log_Log(level, file, line, function, fmt, args);
     va_end(args);
 }
 
@@ -229,51 +228,53 @@ void log_Log(logger_level level, const char *file, int line,const char *function
  * Update log level
  * @param level [in] - new log level
  */
-void log_SetLevel(logger_level level) {
+void log_SetLevel(logger_level level)
+{
     logger.level = level;
 }
 
-extern "C" {
+extern "C"
+{
 
-    void bt_log_custom(const char* file , int line, const char* foo, const char *fmt, ...) {
+    void bt_log_custom(const char *file, int line, const char *foo, const char *fmt, ...)
+    {
         va_list args;
         va_start(args, fmt);
-        _log_Log( LOGTRACE, file, line, foo, fmt, args);
+        _log_Log(LOGTRACE, file, line, foo, fmt, args);
         va_end(args);
-      }
+    }
 
-    int printf (__const char *__restrict __format, ...)
+    int printf(__const char *__restrict __format, ...)
     {
         /* Acquire lock */
-        if (!logger.logLock())
-        {
+        if (!logger.logLock()) {
             return -1;
         }
 
-        char* ptr = loggerBuffer;
+        char *ptr = loggerBuffer;
         va_list args;
 
         va_start(args, __format);
-        ptr += vsnprintf(ptr,&loggerBuffer[LOGGER_BUFFER_SIZE]-ptr, __format, args);
+        ptr += vsnprintf(ptr, &loggerBuffer[LOGGER_BUFFER_SIZE] - ptr, __format, args);
         va_end(args);
 
         unsigned int numBytes = ptr - loggerBuffer;
-        SEGGER_RTT_Write(0,(uint8_t*)loggerBuffer,numBytes);
+        SEGGER_RTT_Write(0, (uint8_t *)loggerBuffer, numBytes);
 
         /* Release lock */
         logger.logUnlock();
-        
+
         return numBytes;
     }
 
-    int vprintf (const char *__restrict __format, va_list __arg) {
+    int vprintf(const char *__restrict __format, va_list __arg)
+    {
         /* Acquire lock */
-        if (!logger.logLock())
-        {
+        if (!logger.logLock()) {
             return -1;
         }
-        char* ptr = loggerBuffer;
-        ptr += vsnprintf(ptr,&loggerBuffer[LOGGER_BUFFER_SIZE]-ptr, __format, __arg);
+        char *ptr = loggerBuffer;
+        ptr += vsnprintf(ptr, &loggerBuffer[LOGGER_BUFFER_SIZE] - ptr, __format, __arg);
 
         unsigned int numBytes = ptr - loggerBuffer;
         SEGGER_RTT_Write(0, (uint8_t *)loggerBuffer, numBytes);
@@ -287,16 +288,18 @@ extern "C" {
     int log_assert(__const char *__restrict __format, ...)
     {
         /* Acquire lock */
-        if (!logger.logLock())
-        {
+        if (!logger.logLock()) {
             return -1;
         }
 
         char *ptr = loggerBuffer;
         ptr += sprintf(ptr, "%d ms ", cpp_freertos::Ticks::TicksToMs(cpp_freertos::Ticks::GetTicks()));
         logger_level level = LOGFATAL;
-        ptr += sprintf(ptr, "%s%-5s " CONSOLE_ESCAPE_COLOR_MAGENTA "[%-10s] \x1b[31mASSERTION " CONSOLE_ESCAPE_COLOR_RESET, level_colors[level],
-                       level_names[level], getTaskDesc());
+        ptr += sprintf(ptr,
+                       "%s%-5s " CONSOLE_ESCAPE_COLOR_MAGENTA "[%-10s] \x1b[31mASSERTION " CONSOLE_ESCAPE_COLOR_RESET,
+                       level_colors[level],
+                       level_names[level],
+                       getTaskDesc());
 
         va_list args;
         va_start(args, __format);
@@ -304,11 +307,11 @@ extern "C" {
         va_end(args);
 
         unsigned int numBytes = ptr - loggerBuffer;
-        #if LOG_REDIRECT_TO_SERIAL == 1
-            LPUART_WriteBlocking(LPUART3, (uint8_t*)loggerBuffer,ptr-loggerBuffer);
-        #else
-            SEGGER_RTT_Write(0,(uint8_t*)loggerBuffer,ptr-loggerBuffer);
-        #endif
+#if LOG_REDIRECT_TO_SERIAL == 1
+        LPUART_WriteBlocking(LPUART3, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
+#else
+        SEGGER_RTT_Write(0, (uint8_t *)loggerBuffer, ptr - loggerBuffer);
+#endif
 
         /* Release lock */
         logger.logUnlock();
@@ -318,7 +321,12 @@ extern "C" {
 
     void __assert_func(const char *file, int line, const char *func, const char *failedexpr)
     {
-        log_assert("\"%s\" failed: file \"%s\", line %d%s%s\n", failedexpr, file, line, func ? ", function: " : "", func ? func : "");
+        log_assert("\"%s\" failed: file \"%s\", line %d%s%s\n",
+                   failedexpr,
+                   file,
+                   line,
+                   func ? ", function: " : "",
+                   func ? func : "");
 
         abort();
         /* NOTREACHED */
diff --git a/module-utils/board/linux/log.cpp b/module-utils/board/linux/log.cpp
index 08777cd1e..49d69eccf 100644
--- a/module-utils/board/linux/log.cpp
+++ b/module-utils/board/linux/log.cpp
@@ -8,18 +8,17 @@
 #include <mutex>
 #include <ticks.hpp>
 
-#define LOGGER_BUFFER_SIZE  4096
-
-#define CONSOLE_ESCAPE_COLOR_BLACK              "\x1b[30m"
-#define CONSOLE_ESCAPE_COLOR_RED                "\x1b[31m"
-#define CONSOLE_ESCAPE_COLOR_GREEN              "\x1b[32m"
-#define CONSOLE_ESCAPE_COLOR_YELLOW             "\x1b[33m"
-#define CONSOLE_ESCAPE_COLOR_BLUE               "\x1b[34m"
-#define CONSOLE_ESCAPE_COLOR_MAGENTA            "\x1b[35m"
-#define CONSOLE_ESCAPE_COLOR_CYAN               "\x1b[36m"
-#define CONSOLE_ESCAPE_COLOR_WHITE              "\x1b[37m"
-#define CONSOLE_ESCAPE_COLOR_RESET              "\x1b[0m"
+#define LOGGER_BUFFER_SIZE 4096
 
+#define CONSOLE_ESCAPE_COLOR_BLACK   "\x1b[30m"
+#define CONSOLE_ESCAPE_COLOR_RED     "\x1b[31m"
+#define CONSOLE_ESCAPE_COLOR_GREEN   "\x1b[32m"
+#define CONSOLE_ESCAPE_COLOR_YELLOW  "\x1b[33m"
+#define CONSOLE_ESCAPE_COLOR_BLUE    "\x1b[34m"
+#define CONSOLE_ESCAPE_COLOR_MAGENTA "\x1b[35m"
+#define CONSOLE_ESCAPE_COLOR_CYAN    "\x1b[36m"
+#define CONSOLE_ESCAPE_COLOR_WHITE   "\x1b[37m"
+#define CONSOLE_ESCAPE_COLOR_RESET   "\x1b[0m"
 
 #define CONSOLE_ESCAPE_COLOR_BACKGROUND_BLACK   "\x1b[40m"
 #define CONSOLE_ESCAPE_COLOR_BACKGROUND_RED     "\x1b[41m"
@@ -30,20 +29,16 @@
 #define CONSOLE_ESCAPE_COLOR_BACKGROUND_CYAN    "\x1b[46m"
 #define CONSOLE_ESCAPE_COLOR_BACKGROUND_WHITE   "\x1b[47m"
 
-const char *level_names[] = {
-        "TRACE", "DEBUG", "INFO", "WARN", "ERROR", "FATAL"
-};
+const char *level_names[] = {"TRACE", "DEBUG", "INFO", "WARN", "ERROR", "FATAL"};
 
 #if LOG_USE_COLOR == 1
-static const char *level_colors[] = {
-  "\x1b[94m", "\x1b[36m", "\x1b[32m", "\x1b[33m", "\x1b[31m", "\x1b[35m"
-};
+static const char *level_colors[] = {"\x1b[94m", "\x1b[36m", "\x1b[32m", "\x1b[33m", "\x1b[31m", "\x1b[35m"};
 #endif
 
-
-struct Logger{
-    Logger( logger_level level = LOGTRACE ) : level{ level } {
-    }
+struct Logger
+{
+    Logger(logger_level level = LOGTRACE) : level{level}
+    {}
     std::mutex lock;
     logger_level level;
 };
@@ -51,23 +46,23 @@ struct Logger{
 static Logger logger;
 static char loggerBuffer[LOGGER_BUFFER_SIZE] = {0};
 
-
 void log_Printf(const char *fmt, ...)
 {
     /* Acquire lock */
     std::lock_guard<std::mutex> guard(logger.lock);
-    char* ptr = loggerBuffer;
-    ptr[0] = 0;
+    char *ptr = loggerBuffer;
+    ptr[0]    = 0;
     va_list args;
 
     va_start(args, fmt);
-    vsnprintf(ptr,LOGGER_BUFFER_SIZE-1, fmt, args);
+    vsnprintf(ptr, LOGGER_BUFFER_SIZE - 1, fmt, args);
     va_end(args);
 
-    std::cout<<loggerBuffer;
+    std::cout << loggerBuffer;
 }
 
-static void _log_Log(logger_level level, const char *file, int line,const char *function, const char *fmt, va_list args)
+static void _log_Log(
+    logger_level level, const char *file, int line, const char *function, const char *fmt, va_list args)
 {
     if (level < logger.level) {
         return;
@@ -75,27 +70,26 @@ static void _log_Log(logger_level level, const char *file, int line,const char *
 
     std::lock_guard<std::mutex> guard(logger.lock);
 
-    char* ptr = loggerBuffer;
+    char *ptr = loggerBuffer;
 
     ptr += sprintf(ptr, "%d ms ", cpp_freertos::Ticks::TicksToMs(cpp_freertos::Ticks::GetTicks()));
 
 #if LOG_USE_COLOR == 1
-    ptr += sprintf(ptr,"%s%-5s\x1b[0m \x1b[90m%s:%d:\x1b[0m ",
-        level_colors[level], level_names[level], file, line);
+    ptr += sprintf(ptr, "%s%-5s\x1b[0m \x1b[90m%s:%d:\x1b[0m ", level_colors[level], level_names[level], file, line);
 #else
-    ptr += sprintf(ptr,"%-5s %s:%s:%d: ", level_names[level], file, function, line);
+    ptr += sprintf(ptr, "%-5s %s:%s:%d: ", level_names[level], file, function, line);
 #endif
-    ptr += vsnprintf(ptr,&loggerBuffer[LOGGER_BUFFER_SIZE]-ptr, fmt, args);
-    ptr += sprintf(ptr,"\r\n");
+    ptr += vsnprintf(ptr, &loggerBuffer[LOGGER_BUFFER_SIZE] - ptr, fmt, args);
+    ptr += sprintf(ptr, "\r\n");
 
-    std::cout<<loggerBuffer;
+    std::cout << loggerBuffer;
 }
 
-void log_Log(logger_level level, const char *file, int line,const char *function, const char *fmt, ...)
+void log_Log(logger_level level, const char *file, int line, const char *function, const char *fmt, ...)
 {
     va_list args;
     va_start(args, fmt);
-    _log_Log(level, file, line,function, fmt, args);
+    _log_Log(level, file, line, function, fmt, args);
     va_end(args);
 }
 
@@ -103,17 +97,19 @@ void log_Log(logger_level level, const char *file, int line,const char *function
  * Update log level
  * @param level [in] - new log level
  */
-void log_SetLevel(logger_level level) {
+void log_SetLevel(logger_level level)
+{
     logger.level = level;
 }
 
-extern "C" {
+extern "C"
+{
 
-    void bt_log_custom(const char* file , int line, const char* foo, const char *fmt, ...) {
+    void bt_log_custom(const char *file, int line, const char *foo, const char *fmt, ...)
+    {
         va_list args;
         va_start(args, fmt);
-        _log_Log( LOGTRACE, file, line, foo, fmt, args);
+        _log_Log(LOGTRACE, file, line, foo, fmt, args);
         va_end(args);
-      }
-
+    }
 };
diff --git a/module-utils/common_data/EventStore.cpp b/module-utils/common_data/EventStore.cpp
index 13f33a08a..19f0eb0a1 100644
--- a/module-utils/common_data/EventStore.cpp
+++ b/module-utils/common_data/EventStore.cpp
@@ -30,7 +30,10 @@ namespace Store
     void GSM::setSignalStrength(const SignalStrength &signalStrength)
     {
         cpp_freertos::LockGuard lock(mutex);
-        LOG_INFO("Setting signal strenth to rssi = %d dBm (%d) : %u bars", signalStrength.rssidBm, signalStrength.rssi, signalStrength.rssiBar);
+        LOG_INFO("Setting signal strenth to rssi = %d dBm (%d) : %u bars",
+                 signalStrength.rssidBm,
+                 signalStrength.rssi,
+                 signalStrength.rssiBar);
 
         get()->signalStrength = signalStrength;
     }
diff --git a/module-utils/common_data/EventStore.hpp b/module-utils/common_data/EventStore.hpp
index 4aa0cddeb..0732b0257 100644
--- a/module-utils/common_data/EventStore.hpp
+++ b/module-utils/common_data/EventStore.hpp
@@ -15,7 +15,7 @@ namespace Store
         {
             Discharging,
             Charging,
-        } state = State::Discharging;
+        } state            = State::Discharging;
         unsigned int level = 0;
 
         static const Battery &get();
@@ -24,19 +24,19 @@ namespace Store
 
     enum class RssiBar : size_t
     {
-        zero = 0,
-        one = 1,
-        two = 2,
+        zero  = 0,
+        one   = 1,
+        two   = 2,
         three = 3,
-        four = 4,
-        five = 5,
+        four  = 4,
+        five  = 5,
         noOfSupprtedBars
     };
 
     struct SignalStrength
     {
-        int rssi = 0;
-        int rssidBm = 0;
+        int rssi        = 0;
+        int rssidBm     = 0;
         RssiBar rssiBar = RssiBar::zero;
     };
 
@@ -61,7 +61,7 @@ namespace Store
             SIM_FAIL,
             SIM_UNKNOWN,
             NONE,
-        } sim = SIM::SIM_UNKNOWN,
+        } sim      = SIM::SIM_UNKNOWN,
           selected = SIM::SIM1;
 
         /// state of modem
diff --git a/module-utils/common_data/RawKey.hpp b/module-utils/common_data/RawKey.hpp
index 6634b7345..9d1d74efc 100644
--- a/module-utils/common_data/RawKey.hpp
+++ b/module-utils/common_data/RawKey.hpp
@@ -17,17 +17,17 @@ struct RawKey
         Undefined,
         Pressed,
         Released,
-    } state = State::Undefined;
+    } state                = State::Undefined;
     bsp::KeyCodes key_code = bsp::KeyCodes::Undefined;
-    int time_press = 0;
-    int time_release = 0;
+    int time_press         = 0;
+    int time_release       = 0;
 
     /// set all values to zero, set new key_code and state
     void reset(bsp::KeyCodes key_code = bsp::KeyCodes::Undefined, State state = State::Undefined)
     {
         this->key_code = key_code;
-        this->state = state;
-        time_press = 0;
-        time_release = 0;
+        this->state    = state;
+        time_press     = 0;
+        time_release   = 0;
     }
 };
diff --git a/module-utils/i18/i18.cpp b/module-utils/i18/i18.cpp
index 6f85a897c..9fb70f7f0 100644
--- a/module-utils/i18/i18.cpp
+++ b/module-utils/i18/i18.cpp
@@ -9,14 +9,9 @@
 
 #include "i18.hpp"
 
-
 namespace utils
 {
 
-i18 localize;
+    i18 localize;
 
 }
-
-
-
-
diff --git a/module-utils/i18/i18.hpp b/module-utils/i18/i18.hpp
index d1505c7eb..d2ebda073 100644
--- a/module-utils/i18/i18.hpp
+++ b/module-utils/i18/i18.hpp
@@ -17,70 +17,72 @@
 
 #include "thread.hpp"
 
-namespace utils {
+namespace utils
+{
 
-    enum class Lang{
+    enum class Lang
+    {
         En,
         Pl,
-		De,
+        De,
         Sp
     };
 
-    class LangLoader{
+    class LangLoader
+    {
 
-        const char* langEN_path = "sys/assets/lang/lang_en.json";
-        const char* langPL_path = "sys/assets/lang/lang_pl.json";
-        const char* langDE_path = "sys/assets/lang/lang_de.json";
-        const char* langSP_path = "sys/assets/lang/lang_sp.json";
-
-    public:
-
-        LangLoader(){}
-        virtual ~LangLoader(){}
+        const char *langEN_path = "sys/assets/lang/lang_en.json";
+        const char *langPL_path = "sys/assets/lang/lang_pl.json";
+        const char *langDE_path = "sys/assets/lang/lang_de.json";
+        const char *langSP_path = "sys/assets/lang/lang_sp.json";
 
+      public:
+        LangLoader()
+        {}
+        virtual ~LangLoader()
+        {}
 
         json11::Json Create(Lang lang)
         {
             std::string err;
-            const char* path = nullptr;
+            const char *path = nullptr;
 
-            switch(lang)
-            {
-                case Lang::Pl:
-                    path = langPL_path;
-                    break;
-                case Lang::En:
-                    path = langEN_path;
-                    break;
-                case Lang::De:
-					path = langDE_path;
-					break;
-                case Lang::Sp:
-                    path = langSP_path;
-                    break;
+            switch (lang) {
+            case Lang::Pl:
+                path = langPL_path;
+                break;
+            case Lang::En:
+                path = langEN_path;
+                break;
+            case Lang::De:
+                path = langDE_path;
+                break;
+            case Lang::Sp:
+                path = langSP_path;
+                break;
 
-                default:
-                    return json11::Json();
+            default:
+                return json11::Json();
             }
 
-            auto fd = vfs.fopen(path,"r");
-            if(fd == NULL){
-                LOG_FATAL("Error during opening file %s",path);
+            auto fd = vfs.fopen(path, "r");
+            if (fd == NULL) {
+                LOG_FATAL("Error during opening file %s", path);
                 return json11::Json();
             }
 
             uint32_t fsize = vfs.filelength(fd);
 
-            char* stream = static_cast<char*>(malloc(fsize+1)); // +1 for NULL terminator
-            if(stream == NULL){
+            char *stream = static_cast<char *>(malloc(fsize + 1)); // +1 for NULL terminator
+            if (stream == NULL) {
                 LOG_FATAL("Memory allocation failure");
                 vfs.fclose(fd);
-                return json11::Json(); 
+                return json11::Json();
             }
 
-            memset(stream,0,fsize+1);
+            memset(stream, 0, fsize + 1);
 
-            vfs.fread(stream,1,fsize,fd);
+            vfs.fread(stream, 1, fsize, fd);
 
             json11::Json js = json11::Json::parse(stream, err);
 
@@ -88,75 +90,70 @@ namespace utils {
             vfs.fclose(fd);
 
             // Error
-            if(err.length() != 0){
+            if (err.length() != 0) {
                 LOG_FATAL(err.c_str());
                 return json11::Json();
             }
-            else{
+            else {
                 return js;
             }
         }
     };
 
-
-    class i18 {
-
-    json11::Json    langPack;
-    json11::Json langBack; // backup language if item not found
-    LangLoader      loader;
-    static const Lang lang_default = Lang::En;
-    Lang current = lang_default;
-    bool debugRequests = true;
-
-  public:
-    // Default constructor, left empty on purpose
-    i18()
+    class i18
     {
-        }
 
-        // Explicit initialization point, default constructor is omitted. This is because LangLoader uses file system which
-        // is not available at program's startup.
-        virtual ~i18(){}
+        json11::Json langPack;
+        json11::Json langBack; // backup language if item not found
+        LangLoader loader;
+        static const Lang lang_default = Lang::En;
+        Lang current                   = lang_default;
+        bool debugRequests             = true;
 
-        const std::string& get(const std::string& str)
+      public:
+        // Default constructor, left empty on purpose
+        i18()
+        {}
+
+        // Explicit initialization point, default constructor is omitted. This is because LangLoader uses file system
+        // which is not available at program's startup.
+        virtual ~i18()
+        {}
+
+        const std::string &get(const std::string &str)
         {
             auto retwithfallback = [this](const std::string &ret, const std::string &str) -> const std::string & {
-                if (debugRequests && ret == "")
-                {
+                if (debugRequests && ret == "") {
                     return str;
                 }
-                else
-                {
+                else {
                     return ret;
                 }
             };
             auto &ret = langPack[str].string_value();
             // if language pack returnet nothing then try default language
-            if (ret == "" && current != lang_default)
-            {
+            if (ret == "" && current != lang_default) {
                 auto &ret = langBack[str].string_value();
                 return retwithfallback(ret, str);
             }
             return retwithfallback(ret, str);
         }
 
-        void Switch(Lang lang){
+        void Switch(Lang lang)
+        {
             static bool initialized = false;
-            if (!initialized)
-            {
-                langBack = loader.Create(lang_default);
-                langPack = langBack;
+            if (!initialized) {
+                langBack    = loader.Create(lang_default);
+                langPack    = langBack;
                 initialized = true;
             }
             if (lang == current)
                 return;
             current = lang;
-            if (lang == lang_default)
-            {
+            if (lang == lang_default) {
                 langPack = langBack;
             }
-            else
-            {
+            else {
                 json11::Json pack = loader.Create(lang);
                 // Suspend whole system during switching lang packs
                 vTaskSuspendAll();
@@ -168,8 +165,6 @@ namespace utils {
 
     // Global instance of i18 class
     extern i18 localize;
-}
+} // namespace utils
 
-
-
-#endif //UNTITLED_I18_HPP
+#endif // UNTITLED_I18_HPP
diff --git a/module-utils/log/debug.hpp b/module-utils/log/debug.hpp
index 77d2db1e6..f992cf9b4 100644
--- a/module-utils/log/debug.hpp
+++ b/module-utils/log/debug.hpp
@@ -1,6 +1,6 @@
 #pragma once
 
 #define DEBUG_APPLICATION_MANAGEMENT 0
-#define DEBUG_SCOPED_TIMINGS 1
-#define _RT1051_UART_DEBUG 0
-#define DEBUG_MODEM_OUTPUT_RESPONSE 1
+#define DEBUG_SCOPED_TIMINGS         1
+#define _RT1051_UART_DEBUG           0
+#define DEBUG_MODEM_OUTPUT_RESPONSE  1
diff --git a/module-utils/log/log.hpp b/module-utils/log/log.hpp
index 32b4d36c8..6bafa8b71 100644
--- a/module-utils/log/log.hpp
+++ b/module-utils/log/log.hpp
@@ -15,9 +15,9 @@
  *     #include "logs/log.h"
  *
  *  This will define the actual objects that all the other units will use.
- *  Then invoke log_Init(VFS_FILE* fp,logger_level level) function to initialize logger utility. If you want additionally store
- *  logs into file pass valid file descriptor to init function. By default logger logs info into STDOUT stream.
- *  After that logger is ready to use.
+ *  Then invoke log_Init(VFS_FILE* fp,logger_level level) function to initialize logger utility. If you want
+ *additionally store logs into file pass valid file descriptor to init function. By default logger logs info into STDOUT
+ *stream. After that logger is ready to use.
  *
  *  Examples:
  *  1)
@@ -38,35 +38,40 @@
 #include <string.h>
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
-
-typedef enum { LOGTRACE, LOGDEBUG, LOGINFO, LOGWARN, LOGERROR, LOGFATAL }logger_level;
-
+    typedef enum
+    {
+        LOGTRACE,
+        LOGDEBUG,
+        LOGINFO,
+        LOGWARN,
+        LOGERROR,
+        LOGFATAL
+    } logger_level;
 
 #define __FILENAME__ (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__)
 
-
-/**
- * Forward declarations
- */
-void log_Log(logger_level level, const char *file, int line,const char *function, const char *fmt, ...);
-void log_SetLevel(logger_level level);
-void log_Printf(const char *fmt, ...);
-
+    /**
+     * Forward declarations
+     */
+    void log_Log(logger_level level, const char *file, int line, const char *function, const char *fmt, ...);
+    void log_SetLevel(logger_level level);
+    void log_Printf(const char *fmt, ...);
 
 /**
  * Log functions (one per level).
  */
-#define LOG_PRINTF(...) log_Printf(__VA_ARGS__)
-#define LOG_TRACE(...)  log_Log(LOGTRACE, __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_DEBUG(...)  log_Log(LOGDEBUG, __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_INFO(...)   log_Log(LOGINFO,  __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_WARN(...)   log_Log(LOGWARN,  __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_ERROR(...)  log_Log(LOGERROR, __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_FATAL(...)  log_Log(LOGFATAL, __FILENAME__, __LINE__,__func__, __VA_ARGS__)
-#define LOG_CUSTOM(loggerLevel, ...) log_Log(loggerLevel, __FILENAME__, __LINE__,__func__, __VA_ARGS__)
+#define LOG_PRINTF(...)              log_Printf(__VA_ARGS__)
+#define LOG_TRACE(...)               log_Log(LOGTRACE, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_DEBUG(...)               log_Log(LOGDEBUG, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_INFO(...)                log_Log(LOGINFO, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_WARN(...)                log_Log(LOGWARN, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_ERROR(...)               log_Log(LOGERROR, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_FATAL(...)               log_Log(LOGFATAL, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
+#define LOG_CUSTOM(loggerLevel, ...) log_Log(loggerLevel, __FILENAME__, __LINE__, __func__, __VA_ARGS__)
 
 #ifdef __cplusplus
 }
diff --git a/module-utils/menums/magic_enum.hpp b/module-utils/menums/magic_enum.hpp
index baa261479..3f8702fcd 100644
--- a/module-utils/menums/magic_enum.hpp
+++ b/module-utils/menums/magic_enum.hpp
@@ -45,428 +45,444 @@
 // Enum value must be greater or equals than MAGIC_ENUM_RANGE_MIN. By default MAGIC_ENUM_RANGE_MIN = -128.
 // If need another min range for all enum types by default, redefine the macro MAGIC_ENUM_RANGE_MIN.
 #if !defined(MAGIC_ENUM_RANGE_MIN)
-#  define MAGIC_ENUM_RANGE_MIN -128
+#define MAGIC_ENUM_RANGE_MIN -128
 #endif
 
 // Enum value must be less or equals than MAGIC_ENUM_RANGE_MAX. By default MAGIC_ENUM_RANGE_MAX = 128.
 // If need another max range for all enum types by default, redefine the macro MAGIC_ENUM_RANGE_MAX.
 #if !defined(MAGIC_ENUM_RANGE_MAX)
-#  define MAGIC_ENUM_RANGE_MAX 128
+#define MAGIC_ENUM_RANGE_MAX 128
 #endif
 
-namespace magic_enum {
+namespace magic_enum
+{
 
-// Enum value must be in range [MAGIC_ENUM_RANGE_MIN, MAGIC_ENUM_RANGE_MAX]. By default MAGIC_ENUM_RANGE_MIN = -128, MAGIC_ENUM_RANGE_MAX = 128.
-// If need another range for all enum types by default, redefine the macro MAGIC_ENUM_RANGE_MIN and MAGIC_ENUM_RANGE_MAX.
-// If need another range for specific enum type, add specialization enum_range for necessary enum type.
-template <typename E>
-struct enum_range final {
-  static_assert(std::is_enum_v<E>, "magic_enum::enum_range requires enum type.");
-  static constexpr int min = MAGIC_ENUM_RANGE_MIN;
-  static constexpr int max = MAGIC_ENUM_RANGE_MAX;
-  static_assert(max > min, "magic_enum::enum_range requires max > min.");
-};
+    // Enum value must be in range [MAGIC_ENUM_RANGE_MIN, MAGIC_ENUM_RANGE_MAX]. By default MAGIC_ENUM_RANGE_MIN = -128,
+    // MAGIC_ENUM_RANGE_MAX = 128. If need another range for all enum types by default, redefine the macro
+    // MAGIC_ENUM_RANGE_MIN and MAGIC_ENUM_RANGE_MAX. If need another range for specific enum type, add specialization
+    // enum_range for necessary enum type.
+    template <typename E> struct enum_range final
+    {
+        static_assert(std::is_enum_v<E>, "magic_enum::enum_range requires enum type.");
+        static constexpr int min = MAGIC_ENUM_RANGE_MIN;
+        static constexpr int max = MAGIC_ENUM_RANGE_MAX;
+        static_assert(max > min, "magic_enum::enum_range requires max > min.");
+    };
 
-static_assert(MAGIC_ENUM_RANGE_MIN <= 0,
-              "MAGIC_ENUM_RANGE_MIN must be less or equals than 0.");
-static_assert(MAGIC_ENUM_RANGE_MIN > (std::numeric_limits<int>::min)(),
-              "MAGIC_ENUM_RANGE_MIN must be greater than INT_MIN.");
+    static_assert(MAGIC_ENUM_RANGE_MIN <= 0, "MAGIC_ENUM_RANGE_MIN must be less or equals than 0.");
+    static_assert(MAGIC_ENUM_RANGE_MIN > (std::numeric_limits<int>::min)(),
+                  "MAGIC_ENUM_RANGE_MIN must be greater than INT_MIN.");
 
-static_assert(MAGIC_ENUM_RANGE_MAX > 0,
-              "MAGIC_ENUM_RANGE_MAX must be greater than 0.");
-static_assert(MAGIC_ENUM_RANGE_MAX < (std::numeric_limits<int>::max)(),
-              "MAGIC_ENUM_RANGE_MAX must be less than INT_MAX.");
+    static_assert(MAGIC_ENUM_RANGE_MAX > 0, "MAGIC_ENUM_RANGE_MAX must be greater than 0.");
+    static_assert(MAGIC_ENUM_RANGE_MAX < (std::numeric_limits<int>::max)(),
+                  "MAGIC_ENUM_RANGE_MAX must be less than INT_MAX.");
 
-static_assert(MAGIC_ENUM_RANGE_MAX > MAGIC_ENUM_RANGE_MIN,
-              "MAGIC_ENUM_RANGE_MAX must be greater than MAGIC_ENUM_RANGE_MIN.");
+    static_assert(MAGIC_ENUM_RANGE_MAX > MAGIC_ENUM_RANGE_MIN,
+                  "MAGIC_ENUM_RANGE_MAX must be greater than MAGIC_ENUM_RANGE_MIN.");
 
-namespace detail {
+    namespace detail
+    {
 
-template <typename E>
-inline constexpr auto min_v = enum_range<E>::min > (std::numeric_limits<std::underlying_type_t<E>>::min)()
-                                  ? enum_range<E>::min
-                                  : (std::numeric_limits<std::underlying_type_t<E>>::min)();
+        template <typename E>
+        inline constexpr auto min_v = enum_range<E>::min > (std::numeric_limits<std::underlying_type_t<E>>::min)()
+                                          ? enum_range<E>::min
+                                          : (std::numeric_limits<std::underlying_type_t<E>>::min)();
 
-template <typename E>
-[[nodiscard]] constexpr auto range_impl() {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::range_impl requires enum type.");
-  static_assert(enum_range<E>::min > (std::numeric_limits<int>::min)(), "magic_enum::enum_range requires min must be greater than INT_MIN.");
-  static_assert(enum_range<E>::max < (std::numeric_limits<int>::max)(), "magic_enum::enum_range requires max must be less than INT_MAX.");
-  static_assert(enum_range<E>::max > enum_range<E>::min, "magic_enum::enum_range requires max > min.");
-  using U = std::underlying_type_t<E>;
-  constexpr auto max = enum_range<E>::max < (std::numeric_limits<U>::max)() ? enum_range<E>::max : (std::numeric_limits<U>::max)();
+        template <typename E>[[nodiscard]] constexpr auto range_impl()
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::range_impl requires enum type.");
+            static_assert(enum_range<E>::min > (std::numeric_limits<int>::min)(),
+                          "magic_enum::enum_range requires min must be greater than INT_MIN.");
+            static_assert(enum_range<E>::max < (std::numeric_limits<int>::max)(),
+                          "magic_enum::enum_range requires max must be less than INT_MAX.");
+            static_assert(enum_range<E>::max > enum_range<E>::min, "magic_enum::enum_range requires max > min.");
+            using U            = std::underlying_type_t<E>;
+            constexpr auto max = enum_range<E>::max < (std::numeric_limits<U>::max)() ? enum_range<E>::max
+                                                                                      : (std::numeric_limits<U>::max)();
 
-  return std::make_integer_sequence<int, max - min_v<E> + 1>{};
-}
+            return std::make_integer_sequence<int, max - min_v<E> + 1>{};
+        }
 
-template <typename E>
-inline constexpr auto range_v = range_impl<E>();
+        template <typename E> inline constexpr auto range_v = range_impl<E>();
 
-[[nodiscard]] constexpr std::string_view pretty_name(std::string_view name) noexcept {
-  for (std::size_t i = name.length(); i > 0; --i) {
-    if (!((name[i - 1] >= '0' && name[i - 1] <= '9') ||
-          (name[i - 1] >= 'a' && name[i - 1] <= 'z') ||
-          (name[i - 1] >= 'A' && name[i - 1] <= 'Z') ||
-          (name[i - 1] == '_'))) {
-      name.remove_prefix(i);
-      break;
-    }
-  }
+        [[nodiscard]] constexpr std::string_view pretty_name(std::string_view name) noexcept
+        {
+            for (std::size_t i = name.length(); i > 0; --i) {
+                if (!((name[i - 1] >= '0' && name[i - 1] <= '9') || (name[i - 1] >= 'a' && name[i - 1] <= 'z') ||
+                      (name[i - 1] >= 'A' && name[i - 1] <= 'Z') || (name[i - 1] == '_'))) {
+                    name.remove_prefix(i);
+                    break;
+                }
+            }
 
-  if (name.length() > 0 && ((name.front() >= 'a' && name.front() <= 'z') ||
-                            (name.front() >= 'A' && name.front() <= 'Z') ||
-                            (name.front() == '_'))) {
-    return name;
-  }
+            if (name.length() > 0 && ((name.front() >= 'a' && name.front() <= 'z') ||
+                                      (name.front() >= 'A' && name.front() <= 'Z') || (name.front() == '_'))) {
+                return name;
+            }
 
-  return {}; // Invalid name.
-}
+            return {}; // Invalid name.
+        }
 
-template <typename E, E V>
-[[nodiscard]] constexpr std::string_view name_impl() noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::name_impl requires enum type.");
+        template <typename E, E V>[[nodiscard]] constexpr std::string_view name_impl() noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::name_impl requires enum type.");
 #if defined(__clang__)
-  return pretty_name({__PRETTY_FUNCTION__, sizeof(__PRETTY_FUNCTION__) - 2});
+            return pretty_name({__PRETTY_FUNCTION__, sizeof(__PRETTY_FUNCTION__) - 2});
 #elif defined(__GNUC__) && __GNUC__ >= 9
-  return pretty_name({__PRETTY_FUNCTION__, sizeof(__PRETTY_FUNCTION__) - 51});
+            return pretty_name({__PRETTY_FUNCTION__, sizeof(__PRETTY_FUNCTION__) - 51});
 #elif defined(_MSC_VER)
-  return pretty_name({__FUNCSIG__, sizeof(__FUNCSIG__) - 17});
+            return pretty_name({__FUNCSIG__, sizeof(__FUNCSIG__) - 17});
 #else
-  return {}; // Unsupported compiler.
+            return {}; // Unsupported compiler.
 #endif
-}
+        }
 
-template <typename E, int... I>
-[[nodiscard]] constexpr auto strings_impl(std::integer_sequence<int, I...>) noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::strings_impl requires enum type.");
+        template <typename E, int... I>
+        [[nodiscard]] constexpr auto strings_impl(std::integer_sequence<int, I...>) noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::strings_impl requires enum type.");
 
-  return std::array<std::string_view, sizeof...(I)>{{name_impl<E, static_cast<E>(I + min_v<E>)>()...}};
-}
+            return std::array<std::string_view, sizeof...(I)>{{name_impl<E, static_cast<E>(I + min_v<E>)>()...}};
+        }
 
-template <typename E>
-inline constexpr auto strings_v = strings_impl<E>(range_v<E>);
+        template <typename E> inline constexpr auto strings_v = strings_impl<E>(range_v<E>);
 
-template <typename E>
-[[nodiscard]] constexpr std::string_view name_impl(E value) noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::name_impl requires enum type.");
-  constexpr auto strings = strings_v<E>;
+        template <typename E>[[nodiscard]] constexpr std::string_view name_impl(E value) noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::name_impl requires enum type.");
+            constexpr auto strings = strings_v<E>;
 
-  if (auto i = static_cast<std::size_t>(static_cast<int>(value) - min_v<E>); i < strings.size()) {
-    return strings[i];
-  }
+            if (auto i = static_cast<std::size_t>(static_cast<int>(value) - min_v<E>); i < strings.size()) {
+                return strings[i];
+            }
 
-  return {}; // Value out of range.
-}
+            return {}; // Value out of range.
+        }
 
-template <typename E, int... I>
-[[nodiscard]] constexpr auto values_impl(std::integer_sequence<int, I...>) noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::values_impl requires enum type.");
-  constexpr std::array<bool, sizeof...(I)> valid{{!name_impl<E, static_cast<E>(I + min_v<E>)>().empty()...}};
-  constexpr auto num_valid = ((valid[I] ? 1 : 0) + ...);
+        template <typename E, int... I>
+        [[nodiscard]] constexpr auto values_impl(std::integer_sequence<int, I...>) noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::values_impl requires enum type.");
+            constexpr std::array<bool, sizeof...(I)> valid{{!name_impl<E, static_cast<E>(I + min_v<E>)>().empty()...}};
+            constexpr auto num_valid = ((valid[I] ? 1 : 0) + ...);
 
-  std::array<E, num_valid> values{};
-  for (std::size_t i = 0, v = 0; i < valid.size() && v < num_valid; ++i) {
-    if (valid[i]) {
-      values[v++] = static_cast<E>(static_cast<int>(i) + min_v<E>);
+            std::array<E, num_valid> values{};
+            for (std::size_t i = 0, v = 0; i < valid.size() && v < num_valid; ++i) {
+                if (valid[i]) {
+                    values[v++] = static_cast<E>(static_cast<int>(i) + min_v<E>);
+                }
+            }
+
+            return values;
+        }
+
+        template <typename E> inline constexpr auto values_v = values_impl<E>(range_v<E>);
+
+        template <typename E> inline constexpr auto count_v = values_v<E>.size();
+
+        template <typename E, std::size_t... I>
+        [[nodiscard]] constexpr auto names_impl(std::integer_sequence<std::size_t, I...>) noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::names_impl requires enum type.");
+
+            return std::array<std::string_view, sizeof...(I)>{{name_impl<E, values_v<E>[I]>()...}};
+        }
+
+        template <typename E> inline constexpr auto names_v = names_impl<E>(std::make_index_sequence<count_v<E>>{});
+
+        template <typename E, std::size_t... I>
+        [[nodiscard]] constexpr auto entries_impl(std::integer_sequence<std::size_t, I...>) noexcept
+        {
+            static_assert(std::is_enum_v<E>, "magic_enum::detail::entries_impl requires enum type.");
+
+            return std::array<std::pair<E, std::string_view>, sizeof...(I)>{{{values_v<E>[I], names_v<E>[I]}...}};
+        }
+
+        template <typename E> inline constexpr auto entries_v = entries_impl<E>(std::make_index_sequence<count_v<E>>{});
+
+        template <typename T> using remove_cvref_t = std::remove_cv_t<std::remove_reference_t<T>>;
+
+        template <typename T>
+        using enable_if_enum_t = std::enable_if_t<std::is_enum_v<remove_cvref_t<T>>, remove_cvref_t<T>>;
+
+        template <typename E, typename D>
+        inline constexpr bool check_enum_v = std::is_same_v<remove_cvref_t<E>, D> &&std::is_enum_v<D>;
+
+        template <typename T, bool = std::is_enum_v<T>> struct is_scoped_enum_impl : std::false_type
+        {};
+
+        template <typename T>
+        struct is_scoped_enum_impl<T, true> : std::bool_constant<!std::is_convertible_v<T, std::underlying_type_t<T>>>
+        {};
+
+        template <typename T, bool = std::is_enum_v<T>> struct is_unscoped_enum_impl : std::false_type
+        {};
+
+        template <typename T>
+        struct is_unscoped_enum_impl<T, true> : std::bool_constant<std::is_convertible_v<T, std::underlying_type_t<T>>>
+        {};
+
+        template <typename T, typename = T> struct is_fixed_enum_impl : std::false_type
+        {};
+
+        template <typename T> struct is_fixed_enum_impl<T, decltype(T{0})> : std::is_enum<T>
+        {};
+
+        template <typename T, bool = std::is_enum_v<T>> struct underlying_type_impl
+        {};
+
+        template <typename T> struct underlying_type_impl<T, true> : std::underlying_type<T>
+        {};
+
+    } // namespace detail
+
+    // Checks whether T is an Unscoped enumeration type.
+    // Provides the member constant value which is equal to true, if T is an [Unscoped
+    // enumeration](https://en.cppreference.com/w/cpp/language/enum#Unscoped_enumeration) type. Otherwise, value is
+    // equal to false.
+    template <typename T> struct is_unscoped_enum : detail::is_unscoped_enum_impl<T>
+    {};
+
+    template <typename T> inline constexpr bool is_unscoped_enum_v = is_unscoped_enum<T>::value;
+
+    // Checks whether T is an Scoped enumeration type.
+    // Provides the member constant value which is equal to true, if T is an [Scoped
+    // enumeration](https://en.cppreference.com/w/cpp/language/enum#Scoped_enumerations) type. Otherwise, value is equal
+    // to false.
+    template <typename T> struct is_scoped_enum : detail::is_scoped_enum_impl<T>
+    {};
+
+    template <typename T> inline constexpr bool is_scoped_enum_v = is_scoped_enum<T>::value;
+
+    // Checks whether T is an Fixed enumeration type.
+    // Provides the member constant value which is equal to true, if T is an [Fixed
+    // enumeration](https://en.cppreference.com/w/cpp/language/enum) type. Otherwise, value is equal to false.
+    template <typename T> struct is_fixed_enum : detail::is_fixed_enum_impl<T>
+    {};
+
+    template <typename T> inline constexpr bool is_fixed_enum_v = is_fixed_enum<T>::value;
+
+    // If T is a complete enumeration type, provides a member typedef type that names the underlying type of T.
+    // Otherwise, if T is not an enumeration type, there is no member type. Otherwise (T is an incomplete enumeration
+    // type), the program is ill-formed.
+    template <typename T> struct underlying_type : detail::underlying_type_impl<T>
+    {};
+
+    template <typename T> using underlying_type_t = typename underlying_type<T>::type;
+
+    // Obtains enum value from enum string name.
+    // Returns std::optional with enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr std::optional<D> enum_cast(std::string_view value) noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_cast requires enum type.");
+        constexpr auto values = detail::values_v<D>;
+        constexpr auto count  = detail::count_v<D>;
+        constexpr auto names  = detail::names_v<D>;
+
+        for (std::size_t i = 0; i < count; ++i) {
+            if (names[i] == value) {
+                return values[i];
+            }
+        }
+
+        return std::nullopt; // Invalid value or out of range.
     }
-  }
 
-  return values;
-}
+    // Obtains enum value from integer value.
+    // Returns std::optional with enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr std::optional<D> enum_cast(std::underlying_type_t<D> value) noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_cast requires enum type.");
 
-template <typename E>
-inline constexpr auto values_v = values_impl<E>(range_v<E>);
+        if (detail::name_impl<D>(static_cast<D>(value)).empty()) {
+            return std::nullopt; // Invalid value or out of range.
+        }
 
-template <typename E>
-inline constexpr auto count_v = values_v<E>.size();
-
-template <typename E, std::size_t... I>
-[[nodiscard]] constexpr auto names_impl(std::integer_sequence<std::size_t, I...>) noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::names_impl requires enum type.");
-
-  return std::array<std::string_view, sizeof...(I)>{{name_impl<E, values_v<E>[I]>()...}};
-}
-
-template <typename E>
-inline constexpr auto names_v = names_impl<E>(std::make_index_sequence<count_v<E>>{});
-
-template <typename E, std::size_t... I>
-[[nodiscard]] constexpr auto entries_impl(std::integer_sequence<std::size_t, I...>) noexcept {
-  static_assert(std::is_enum_v<E>, "magic_enum::detail::entries_impl requires enum type.");
-
-  return std::array<std::pair<E, std::string_view>, sizeof...(I)>{{{values_v<E>[I], names_v<E>[I]}...}};
-}
-
-template <typename E>
-inline constexpr auto entries_v = entries_impl<E>(std::make_index_sequence<count_v<E>>{});
-
-template <typename T>
-using remove_cvref_t = std::remove_cv_t<std::remove_reference_t<T>>;
-
-template <typename T>
-using enable_if_enum_t = std::enable_if_t<std::is_enum_v<remove_cvref_t<T>>, remove_cvref_t<T>>;
-
-template <typename E, typename D>
-inline constexpr bool check_enum_v = std::is_same_v<remove_cvref_t<E>, D> && std::is_enum_v<D>;
-
-template <typename T, bool = std::is_enum_v<T>>
-struct is_scoped_enum_impl : std::false_type {};
-
-template <typename T>
-struct is_scoped_enum_impl<T, true> : std::bool_constant<!std::is_convertible_v<T, std::underlying_type_t<T>>> {};
-
-template <typename T, bool = std::is_enum_v<T>>
-struct is_unscoped_enum_impl : std::false_type {};
-
-template <typename T>
-struct is_unscoped_enum_impl<T, true> : std::bool_constant<std::is_convertible_v<T, std::underlying_type_t<T>>> {};
-
-template <typename T, typename = T>
-struct is_fixed_enum_impl : std::false_type {};
-
-template <typename T>
-struct is_fixed_enum_impl<T, decltype(T{0})> : std::is_enum<T> {};
-
-template <typename T, bool = std::is_enum_v<T>>
-struct underlying_type_impl {};
-
-template <typename T>
-struct underlying_type_impl<T, true> : std::underlying_type<T> {};
-
-} // namespace magic_enum::detail
-
-// Checks whether T is an Unscoped enumeration type.
-// Provides the member constant value which is equal to true, if T is an [Unscoped enumeration](https://en.cppreference.com/w/cpp/language/enum#Unscoped_enumeration) type. Otherwise, value is equal to false.
-template <typename T>
-struct is_unscoped_enum : detail::is_unscoped_enum_impl<T> {};
-
-template <typename T>
-inline constexpr bool is_unscoped_enum_v = is_unscoped_enum<T>::value;
-
-// Checks whether T is an Scoped enumeration type.
-// Provides the member constant value which is equal to true, if T is an [Scoped enumeration](https://en.cppreference.com/w/cpp/language/enum#Scoped_enumerations) type. Otherwise, value is equal to false.
-template <typename T>
-struct is_scoped_enum : detail::is_scoped_enum_impl<T> {};
-
-template <typename T>
-inline constexpr bool is_scoped_enum_v = is_scoped_enum<T>::value;
-
-// Checks whether T is an Fixed enumeration type.
-// Provides the member constant value which is equal to true, if T is an [Fixed enumeration](https://en.cppreference.com/w/cpp/language/enum) type. Otherwise, value is equal to false.
-template <typename T>
-struct is_fixed_enum : detail::is_fixed_enum_impl<T> {};
-
-template <typename T>
-inline constexpr bool is_fixed_enum_v = is_fixed_enum<T>::value;
-
-// If T is a complete enumeration type, provides a member typedef type that names the underlying type of T.
-// Otherwise, if T is not an enumeration type, there is no member type. Otherwise (T is an incomplete enumeration type), the program is ill-formed.
-template <typename T>
-struct underlying_type : detail::underlying_type_impl<T> {};
-
-template <typename T>
-using underlying_type_t = typename underlying_type<T>::type;
-
-// Obtains enum value from enum string name.
-// Returns std::optional with enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr std::optional<D> enum_cast(std::string_view value) noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_cast requires enum type.");
-  constexpr auto values = detail::values_v<D>;
-  constexpr auto count = detail::count_v<D>;
-  constexpr auto names = detail::names_v<D>;
-
-  for (std::size_t i = 0; i < count; ++i) {
-    if (names[i] == value) {
-      return values[i];
+        return static_cast<D>(value);
     }
-  }
 
-  return std::nullopt; // Invalid value or out of range.
-}
+    // Returns integer value from enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr auto enum_integer(E value) noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_integer requires enum type.");
 
-// Obtains enum value from integer value.
-// Returns std::optional with enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr std::optional<D> enum_cast(std::underlying_type_t<D> value) noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_cast requires enum type.");
-
-  if (detail::name_impl<D>(static_cast<D>(value)).empty()) {
-    return std::nullopt; // Invalid value or out of range.
-  }
-
-  return static_cast<D>(value);
-}
-
-// Returns integer value from enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr auto enum_integer(E value) noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_integer requires enum type.");
-
-  return static_cast<std::underlying_type_t<D>>(value);
-}
-
-// Returns enum value at specified index.
-// No bounds checking is performed: the behavior is undefined if index >= number of enum values.
-template<typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr auto enum_value(std::size_t index) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_value requires enum type.");
-  constexpr auto values = detail::values_v<D>;
-
-  return assert(index < values.size()), values[index];
-}
-
-// Obtains value enum sequence.
-// Returns std::array with enum values, sorted by enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr auto enum_values() noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_values requires enum type.");
-  constexpr auto values = detail::values_v<D>;
-
-  return values;
-}
-
-// Returns number of enum values.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr std::size_t enum_count() noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_count requires enum type.");
-  constexpr auto count = detail::count_v<D>;
-
-  return count;
-}
-
-// Returns string enum name from static storage enum variable.
-// This version is much lighter on the compile times and is not restricted to the enum_range limitation.
-template <auto V, typename D = detail::enable_if_enum_t<decltype(V)>>
-[[nodiscard]] constexpr std::string_view enum_name() noexcept {
-  static_assert(detail::check_enum_v<decltype(V), D>, "magic_enum::enum_name requires enum type.");
-
-  return detail::name_impl<D, V>();
-}
-
-// Returns string enum name from enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr std::string_view enum_name(E value) noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_name requires enum type.");
-
-  return detail::name_impl<D>(value);
-}
-
-// Obtains string enum name sequence.
-// Returns std::array with string enum names, sorted by enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr auto enum_names() noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_names requires enum type.");
-  constexpr auto names = detail::names_v<D>;
-
-  return names;
-}
-
-// Obtains pair (value enum, string enum name) sequence.
-// Returns std::array with std::pair (value enum, string enum name), sorted by enum value.
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-[[nodiscard]] constexpr auto enum_entries() noexcept {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_entries requires enum type.");
-  constexpr auto entries = detail::entries_v<D>;
-
-  return entries;
-}
-
-namespace ostream_operators {
-
-template <class Char, class Traits, typename E, typename D = detail::enable_if_enum_t<E>>
-std::basic_ostream<Char, Traits>& operator<<(std::basic_ostream<Char, Traits>& os, E value) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::ostream_operators::operator<< requires enum type.");
-
-  if (auto name = detail::name_impl<D>(value); !name.empty()) {
-    for (auto c : name) {
-      os.put(c);
+        return static_cast<std::underlying_type_t<D>>(value);
     }
-  } else {
-    os << static_cast<std::underlying_type_t<D>>(value);
-  }
 
-  return os;
-}
+    // Returns enum value at specified index.
+    // No bounds checking is performed: the behavior is undefined if index >= number of enum values.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr auto enum_value(std::size_t index)
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_value requires enum type.");
+        constexpr auto values = detail::values_v<D>;
 
-template <class Char, class Traits, typename E, typename D = detail::enable_if_enum_t<E>>
-std::basic_ostream<Char, Traits>& operator<<(std::basic_ostream<Char, Traits>& os, std::optional<E> value) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::ostream_operators::operator<< requires enum type.");
-
-  if (value.has_value()) {
-    if (auto name = detail::name_impl<D>(value.value()); !name.empty()) {
-      for (auto c : name) {
-        os.put(c);
-      }
-    } else {
-      os << static_cast<std::underlying_type_t<D>>(value.value());
+        return assert(index < values.size()), values[index];
     }
-  }
 
-  return os;
-}
+    // Obtains value enum sequence.
+    // Returns std::array with enum values, sorted by enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>[[nodiscard]] constexpr auto enum_values() noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_values requires enum type.");
+        constexpr auto values = detail::values_v<D>;
 
-} // namespace magic_enum::ostream_operators
+        return values;
+    }
 
-namespace bitwise_operators {
+    // Returns number of enum values.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr std::size_t enum_count() noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_count requires enum type.");
+        constexpr auto count = detail::count_v<D>;
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E operator~(E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator~ requires enum type.");
-  using U = std::underlying_type_t<D>;
+        return count;
+    }
 
-  return static_cast<E>(~static_cast<U>(rhs));
-}
+    // Returns string enum name from static storage enum variable.
+    // This version is much lighter on the compile times and is not restricted to the enum_range limitation.
+    template <auto V, typename D = detail::enable_if_enum_t<decltype(V)>>
+    [[nodiscard]] constexpr std::string_view enum_name() noexcept
+    {
+        static_assert(detail::check_enum_v<decltype(V), D>, "magic_enum::enum_name requires enum type.");
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E operator|(E lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator| requires enum type.");
-  using U = std::underlying_type_t<D>;
+        return detail::name_impl<D, V>();
+    }
 
-  return static_cast<E>(static_cast<U>(lhs) | static_cast<U>(rhs));
-}
+    // Returns string enum name from enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>
+    [[nodiscard]] constexpr std::string_view enum_name(E value) noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_name requires enum type.");
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E operator&(E lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator& requires enum type.");
-  using U = std::underlying_type_t<D>;
+        return detail::name_impl<D>(value);
+    }
 
-  return static_cast<E>(static_cast<U>(lhs) & static_cast<U>(rhs));
-}
+    // Obtains string enum name sequence.
+    // Returns std::array with string enum names, sorted by enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>[[nodiscard]] constexpr auto enum_names() noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_names requires enum type.");
+        constexpr auto names = detail::names_v<D>;
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E operator^(E lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator^ requires enum type.");
-  using U = std::underlying_type_t<D>;
+        return names;
+    }
 
-  return static_cast<E>(static_cast<U>(lhs) ^ static_cast<U>(rhs));
-}
+    // Obtains pair (value enum, string enum name) sequence.
+    // Returns std::array with std::pair (value enum, string enum name), sorted by enum value.
+    template <typename E, typename D = detail::enable_if_enum_t<E>>[[nodiscard]] constexpr auto enum_entries() noexcept
+    {
+        static_assert(detail::check_enum_v<E, D>, "magic_enum::enum_entries requires enum type.");
+        constexpr auto entries = detail::entries_v<D>;
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E& operator|=(E& lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator|= requires enum type.");
-  using U = std::underlying_type_t<D>;
+        return entries;
+    }
 
-  return lhs = static_cast<E>(static_cast<U>(lhs) | static_cast<U>(rhs));
-}
+    namespace ostream_operators
+    {
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E& operator&=(E& lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator%= requires enum type.");
-  using U = std::underlying_type_t<D>;
+        template <class Char, class Traits, typename E, typename D = detail::enable_if_enum_t<E>>
+        std::basic_ostream<Char, Traits> &operator<<(std::basic_ostream<Char, Traits> &os, E value)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::ostream_operators::operator<< requires enum type.");
 
-  return lhs = static_cast<E>(static_cast<U>(lhs) & static_cast<U>(rhs));
-}
+            if (auto name = detail::name_impl<D>(value); !name.empty()) {
+                for (auto c : name) {
+                    os.put(c);
+                }
+            }
+            else {
+                os << static_cast<std::underlying_type_t<D>>(value);
+            }
 
-template <typename E, typename D = detail::enable_if_enum_t<E>>
-constexpr E& operator^=(E& lhs, E rhs) {
-  static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator^= requires enum type.");
-  using U = std::underlying_type_t<D>;
+            return os;
+        }
 
-  return lhs = static_cast<E>(static_cast<U>(lhs) ^ static_cast<U>(rhs));
-}
+        template <class Char, class Traits, typename E, typename D = detail::enable_if_enum_t<E>>
+        std::basic_ostream<Char, Traits> &operator<<(std::basic_ostream<Char, Traits> &os, std::optional<E> value)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::ostream_operators::operator<< requires enum type.");
 
-} // namespace magic_enum::bitwise_operators
+            if (value.has_value()) {
+                if (auto name = detail::name_impl<D>(value.value()); !name.empty()) {
+                    for (auto c : name) {
+                        os.put(c);
+                    }
+                }
+                else {
+                    os << static_cast<std::underlying_type_t<D>>(value.value());
+                }
+            }
+
+            return os;
+        }
+
+    } // namespace ostream_operators
+
+    namespace bitwise_operators
+    {
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E operator~(E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator~ requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return static_cast<E>(~static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E operator|(E lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator| requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return static_cast<E>(static_cast<U>(lhs) | static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E operator&(E lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator& requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return static_cast<E>(static_cast<U>(lhs) & static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E operator^(E lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator^ requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return static_cast<E>(static_cast<U>(lhs) ^ static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E &operator|=(E &lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator|= requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return lhs = static_cast<E>(static_cast<U>(lhs) | static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E &operator&=(E &lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator%= requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return lhs = static_cast<E>(static_cast<U>(lhs) & static_cast<U>(rhs));
+        }
+
+        template <typename E, typename D = detail::enable_if_enum_t<E>> constexpr E &operator^=(E &lhs, E rhs)
+        {
+            static_assert(detail::check_enum_v<E, D>, "magic_enum::bitwise_operators::operator^= requires enum type.");
+            using U = std::underlying_type_t<D>;
+
+            return lhs = static_cast<E>(static_cast<U>(lhs) ^ static_cast<U>(rhs));
+        }
+
+    } // namespace bitwise_operators
 
 } // namespace magic_enum
 
diff --git a/module-utils/test/gtest_utf8.cpp b/module-utils/test/gtest_utf8.cpp
index 5a07ff49c..3be158fc9 100644
--- a/module-utils/test/gtest_utf8.cpp
+++ b/module-utils/test/gtest_utf8.cpp
@@ -3,294 +3,281 @@
 #include "gtest/gtest.h"
 #include "utf8/UTF8.hpp"
 
-
 TEST(UTF8, operator_index_returns_value)
 {
-	UTF8 ustr = UTF8("Rąbać");
+    UTF8 ustr = UTF8("Rąbać");
 
-	ASSERT_EQ((uint32_t)('R'), ustr[0]);
-	//Test "ą"
-	ASSERT_EQ(0x000085c4, ustr[1]);
+    ASSERT_EQ((uint32_t)('R'), ustr[0]);
+    // Test "ą"
+    ASSERT_EQ(0x000085c4, ustr[1]);
 }
 
 TEST(UTF8, operator_index_exceeds_string_size)
 {
-	UTF8 ustr = UTF8("Rąbać");
+    UTF8 ustr = UTF8("Rąbać");
 
-	ASSERT_EQ( 0, ustr[ustr.length() + 1]);
+    ASSERT_EQ(0, ustr[ustr.length() + 1]);
 }
 
-
 TEST(UTF8, operator_index_last_index_clears)
 {
-	UTF8 ustr = UTF8("Rąbać");
+    UTF8 ustr = UTF8("Rąbać");
 
-
-
-	//last element - operator_index_iterations should be equal ustr.strLength - 1
-	ustr[ustr.length() - 1];
-	ASSERT_EQ(ustr.length() - 1, ustr.operator_index_iterations);
-	//next to last element - operator_index_iterations should be equal ustr.strLength - 2
-	//lastIndex should clear, lastIndex is lower than last time
-	ustr[ustr.length() - 2];
-	ASSERT_EQ(ustr.length() - 2, ustr.operator_index_iterations);
+    // last element - operator_index_iterations should be equal ustr.strLength - 1
+    ustr[ustr.length() - 1];
+    ASSERT_EQ(ustr.length() - 1, ustr.operator_index_iterations);
+    // next to last element - operator_index_iterations should be equal ustr.strLength - 2
+    // lastIndex should clear, lastIndex is lower than last time
+    ustr[ustr.length() - 2];
+    ASSERT_EQ(ustr.length() - 2, ustr.operator_index_iterations);
 }
 
 TEST(UTF8, operator_index_last_index_increments)
 {
-	UTF8 ustr = UTF8("Rąbać");
+    UTF8 ustr = UTF8("Rąbać");
 
-	for(uint32_t i = 1; i < ustr.length(); i++)
-	{
-		ustr[i];
-		ASSERT_EQ(1, ustr.operator_index_iterations);
-	}
+    for (uint32_t i = 1; i < ustr.length(); i++) {
+        ustr[i];
+        ASSERT_EQ(1, ustr.operator_index_iterations);
+    }
 }
 
 TEST(UTF8, operator_index_last_index_counting)
 {
-	UTF8 ustr = UTF8("Rąbać");
+    UTF8 ustr = UTF8("Rąbać");
 
-	//first element - operator_index_iterations should be equal 0
-	ustr[0];
-	ASSERT_EQ(0, ustr.operator_index_iterations);
-	//third element - operator_index_iterations should be equal 2
-	ustr[2];
-	ASSERT_EQ(2, ustr.operator_index_iterations);
-	//first element - operator_index_iterations should be equal 0
-	ustr[0];
-	ASSERT_EQ(0, ustr.operator_index_iterations);
-	//last element - operator_index_iterations should be equal ustr.strLength - 1
-	ustr[ustr.length() - 1];
-	ASSERT_EQ(ustr.length() - 1, ustr.operator_index_iterations);
+    // first element - operator_index_iterations should be equal 0
+    ustr[0];
+    ASSERT_EQ(0, ustr.operator_index_iterations);
+    // third element - operator_index_iterations should be equal 2
+    ustr[2];
+    ASSERT_EQ(2, ustr.operator_index_iterations);
+    // first element - operator_index_iterations should be equal 0
+    ustr[0];
+    ASSERT_EQ(0, ustr.operator_index_iterations);
+    // last element - operator_index_iterations should be equal ustr.strLength - 1
+    ustr[ustr.length() - 1];
+    ASSERT_EQ(ustr.length() - 1, ustr.operator_index_iterations);
 }
 
 TEST(UTF8, substr_returns_empty_string_when_zero_length_is_passed)
 {
-	UTF8 sourceString = UTF8("Rąbać drewno siekierą");
+    UTF8 sourceString = UTF8("Rąbać drewno siekierą");
 
-	UTF8 destinationString = sourceString.substr(1,0);
+    UTF8 destinationString = sourceString.substr(1, 0);
 
-	ASSERT_EQ(destinationString.length(), 0);
+    ASSERT_EQ(destinationString.length(), 0);
 }
 
 TEST(UTF8, substr_returns_empty_string_when_length_is_exceeded)
 {
-	UTF8 sourceString = UTF8("Rąbać drewno siekierą");
+    UTF8 sourceString = UTF8("Rąbać drewno siekierą");
 
-	uint32_t length = sourceString.length() + 5;
-	UTF8 destinationString = sourceString.substr(1,length);
+    uint32_t length        = sourceString.length() + 5;
+    UTF8 destinationString = sourceString.substr(1, length);
 
-	ASSERT_EQ(destinationString.length(), 0);
+    ASSERT_EQ(destinationString.length(), 0);
 }
 
 TEST(UTF8, substr_returns_proper_begin_char)
 {
-	UTF8 sourceString = UTF8("Rąbać drewno siekierą");
-	UTF8 destinationString = sourceString.substr(0,5);
+    UTF8 sourceString      = UTF8("Rąbać drewno siekierą");
+    UTF8 destinationString = sourceString.substr(0, 5);
 
-	ASSERT_EQ(destinationString[0], sourceString[0]);
+    ASSERT_EQ(destinationString[0], sourceString[0]);
 }
 
 TEST(UTF8, substr_returns_proper_string_length)
 {
-	UTF8 sourceString = UTF8("Rąbać drewno siekierą");
-	uint32_t length = sourceString.length();
-	uint32_t position = 0;
-	while(length > 1)
-	{
-		UTF8 destinationString = sourceString.substr(position,length);
-		ASSERT_EQ(destinationString.length(), length);
-		position++;
-		length--;
-	}
+    UTF8 sourceString = UTF8("Rąbać drewno siekierą");
+    uint32_t length   = sourceString.length();
+    uint32_t position = 0;
+    while (length > 1) {
+        UTF8 destinationString = sourceString.substr(position, length);
+        ASSERT_EQ(destinationString.length(), length);
+        position++;
+        length--;
+    }
 }
 
 TEST(UTF8, find_returns_npos_if_not_found)
 {
-	UTF8 sourceString = UTF8("AaBbCcŃń");
-	const char * to_find = "E";
-	ASSERT_EQ(-1, sourceString.find(to_find));
-
+    UTF8 sourceString   = UTF8("AaBbCcŃń");
+    const char *to_find = "E";
+    ASSERT_EQ(-1, sourceString.find(to_find));
 }
 
 TEST(UTF8, find_returns_npos_if_pos_exceeds_string_length)
 {
-	UTF8 sourceString = UTF8("AaBbCcŃń");
-	const char * to_find = "A";
-	ASSERT_EQ(-1, sourceString.find(to_find, sourceString.length() + 5));
+    UTF8 sourceString   = UTF8("AaBbCcŃń");
+    const char *to_find = "A";
+    ASSERT_EQ(-1, sourceString.find(to_find, sourceString.length() + 5));
 }
 
 TEST(UTF8, find_returns_position_of_passed_string)
 {
-	std::string base("AaBbCcŃń");
-	UTF8 sourceString = UTF8("AaBbCcŃń");
+    std::string base("AaBbCcŃń");
+    UTF8 sourceString = UTF8("AaBbCcŃń");
 
-	const char * to_find = "Ń";
-	int32_t base_position = base.find(to_find);
+    const char *to_find   = "Ń";
+    int32_t base_position = base.find(to_find);
 
-	ASSERT_EQ(base_position, sourceString.find(to_find));
+    ASSERT_EQ(base_position, sourceString.find(to_find));
 }
 
 TEST(UTF8, find_returns_position_of_passed_string_when_pos_is_passed)
 {
-	std::string base("Aa Bb aCcŃń");
-	UTF8 sourceString = UTF8("Aa Bb aCcŃń");
+    std::string base("Aa Bb aCcŃń");
+    UTF8 sourceString = UTF8("Aa Bb aCcŃń");
 
-	const char * to_find = "a";
-	int32_t base_position = base.find(to_find, 3);
+    const char *to_find   = "a";
+    int32_t base_position = base.find(to_find, 3);
 
-	ASSERT_EQ(base_position, sourceString.find(to_find, 3));
+    ASSERT_EQ(base_position, sourceString.find(to_find, 3));
 }
 
 TEST(UTF8, findLast_returns_npos_if_not_found)
 {
-	UTF8 sourceString = UTF8("AaBbCcŃń");
-	const char * to_find = "E";
-	ASSERT_EQ(-1, sourceString.findLast(to_find, sourceString.length() - 1));
-
+    UTF8 sourceString   = UTF8("AaBbCcŃń");
+    const char *to_find = "E";
+    ASSERT_EQ(-1, sourceString.findLast(to_find, sourceString.length() - 1));
 }
 
 TEST(UTF8, findLast_returns_npos_if_pos_exceeds_string_length)
 {
-	UTF8 sourceString = UTF8("AaBbCcŃń");
-	const char * to_find = "A";
-	ASSERT_EQ(-1, sourceString.findLast(to_find, sourceString.length() + 5));
+    UTF8 sourceString   = UTF8("AaBbCcŃń");
+    const char *to_find = "A";
+    ASSERT_EQ(-1, sourceString.findLast(to_find, sourceString.length() + 5));
 }
 
 TEST(UTF8, findLast_returns_position_of_passed_string)
 {
-	std::string base("AaBbCcŃń");
-	UTF8 sourceString = UTF8("AaBbCcŃń");
+    std::string base("AaBbCcŃń");
+    UTF8 sourceString = UTF8("AaBbCcŃń");
 
-	const char * to_find = "Ń";
-	int32_t base_position = base.find(to_find);
+    const char *to_find   = "Ń";
+    int32_t base_position = base.find(to_find);
 
-	ASSERT_EQ(base_position, sourceString.findLast(to_find, sourceString.length() - 1));
+    ASSERT_EQ(base_position, sourceString.findLast(to_find, sourceString.length() - 1));
 }
 
 TEST(UTF8, findLast_returns_position_of_passed_string_when_pos_is_passed)
 {
-	std::string base("Aa Bb aCcŃń");
-	UTF8 sourceString = UTF8("Aa Bb aCcŃń");
+    std::string base("Aa Bb aCcŃń");
+    UTF8 sourceString = UTF8("Aa Bb aCcŃń");
 
-	const char * to_find = "a";
-	int32_t base_position = 1;
+    const char *to_find   = "a";
+    int32_t base_position = 1;
 
-	ASSERT_EQ(base_position, sourceString.findLast(to_find, 3));
+    ASSERT_EQ(base_position, sourceString.findLast(to_find, 3));
 }
 
 TEST(UTF8, split_returns_empty_object_if_idx_exceeds_string_length)
 {
-	UTF8 sourceString("String testowy PODZIAŁ string testowy");
+    UTF8 sourceString("String testowy PODZIAŁ string testowy");
 
-	UTF8 destinationString = sourceString.split( sourceString.length() + 10 );
-	ASSERT_EQ( 0, destinationString.length() );
+    UTF8 destinationString = sourceString.split(sourceString.length() + 10);
+    ASSERT_EQ(0, destinationString.length());
 }
 
 TEST(UTF8, split_returns_propper_string)
 {
-	UTF8 sourceString("String testowy PODZIAŁ string testowy");
-	UTF8 expected("PODZIAŁ string testowy");
+    UTF8 sourceString("String testowy PODZIAŁ string testowy");
+    UTF8 expected("PODZIAŁ string testowy");
 
-	int32_t divisionIdx = sourceString.find("PODZIAŁ");
-	UTF8 destinationString = sourceString.split( divisionIdx);
-	ASSERT_STREQ(expected.c_str(), destinationString.c_str());
+    int32_t divisionIdx    = sourceString.find("PODZIAŁ");
+    UTF8 destinationString = sourceString.split(divisionIdx);
+    ASSERT_STREQ(expected.c_str(), destinationString.c_str());
 }
 
 TEST(UTF8, split_strings_have_propper_length_after_split)
 {
-	UTF8 sourceString("String testowy Ąą Ćć ńźżę PODZIAŁ string testowy Łłódź ");
-	UTF8 expectedSource("String testowy Ąą Ćć ńźżę ");
-	UTF8 expectedDestination("PODZIAŁ string testowy Łłódź ");
+    UTF8 sourceString("String testowy Ąą Ćć ńźżę PODZIAŁ string testowy Łłódź ");
+    UTF8 expectedSource("String testowy Ąą Ćć ńźżę ");
+    UTF8 expectedDestination("PODZIAŁ string testowy Łłódź ");
 
-	int32_t divisionIdx = sourceString.find("PODZIAŁ");
+    int32_t divisionIdx = sourceString.find("PODZIAŁ");
 
-	UTF8 destinationString = sourceString.split( divisionIdx);
-
-	ASSERT_EQ(expectedSource.length(), sourceString.length());
-	ASSERT_EQ(expectedDestination.length(), destinationString.length());
+    UTF8 destinationString = sourceString.split(divisionIdx);
 
+    ASSERT_EQ(expectedSource.length(), sourceString.length());
+    ASSERT_EQ(expectedDestination.length(), destinationString.length());
 }
 
 TEST(UTF8, split_summary_length_is_equal_after_split)
 {
-	UTF8 sourceString("String testowy Ąą Ćć ńźżę PODZIAŁ string testowy Łłódź ");
-	int32_t divisionIdx = sourceString.find("PODZIAŁ");
+    UTF8 sourceString("String testowy Ąą Ćć ńźżę PODZIAŁ string testowy Łłódź ");
+    int32_t divisionIdx = sourceString.find("PODZIAŁ");
 
-	uint32_t lengthBeforeSplit = sourceString.length();
+    uint32_t lengthBeforeSplit = sourceString.length();
 
-	UTF8 destinationString = sourceString.split(divisionIdx);
+    UTF8 destinationString = sourceString.split(divisionIdx);
 
-	uint32_t destinationStringLength = destinationString.length();
-	uint32_t sourceStringLesngth = sourceString.length();
+    uint32_t destinationStringLength = destinationString.length();
+    uint32_t sourceStringLesngth     = sourceString.length();
 
-	ASSERT_EQ( lengthBeforeSplit, destinationStringLength + sourceStringLesngth);
+    ASSERT_EQ(lengthBeforeSplit, destinationStringLength + sourceStringLesngth);
 }
 
-
 TEST(UTF8, getLine_returns_empty_string_if_its_not_line)
 {
-	UTF8 sourceString("ĄŚĆćśą Pierwsza linia Druga linia ");
+    UTF8 sourceString("ĄŚĆćśą Pierwsza linia Druga linia ");
 
-	UTF8 destinationString = sourceString.getLine();
+    UTF8 destinationString = sourceString.getLine();
 
-	ASSERT_STREQ(destinationString.c_str(), "");
-	ASSERT_EQ(destinationString.length(), 0);
+    ASSERT_STREQ(destinationString.c_str(), "");
+    ASSERT_EQ(destinationString.length(), 0);
 }
 
 TEST(UTF8, getLine_returns_proper_string_when_line_ends_with_n)
 {
-	UTF8 sourceString("ĄŚĆćśą Pierwsza linia\n Druga linia ");
+    UTF8 sourceString("ĄŚĆćśą Pierwsza linia\n Druga linia ");
 
-	UTF8 destinationString = sourceString.getLine();
+    UTF8 destinationString = sourceString.getLine();
 
-	ASSERT_STREQ(destinationString.c_str(), "ĄŚĆćśą Pierwsza linia");
+    ASSERT_STREQ(destinationString.c_str(), "ĄŚĆćśą Pierwsza linia");
 }
 
 TEST(UTF8, getLine_returns_proper_string_when_line_ends_with_r)
 {
-	UTF8 sourceString("ĄŚĆćśą Pierwsza linia\r Druga linia ");
+    UTF8 sourceString("ĄŚĆćśą Pierwsza linia\r Druga linia ");
 
-	UTF8 destinationString = sourceString.getLine();
+    UTF8 destinationString = sourceString.getLine();
 
-	ASSERT_STREQ(destinationString.c_str(), "ĄŚĆćśą Pierwsza linia");
+    ASSERT_STREQ(destinationString.c_str(), "ĄŚĆćśą Pierwsza linia");
 }
 
-
-
 TEST(UTF8, removeChar_returns_false_when_string_to_remove_exceed)
 {
-	UTF8 sourceString("Teścik");
+    UTF8 sourceString("Teścik");
 
-	bool retVal = sourceString.removeChar(2, sourceString.length() + 1);
-	ASSERT_EQ(false, retVal);
+    bool retVal = sourceString.removeChar(2, sourceString.length() + 1);
+    ASSERT_EQ(false, retVal);
 }
 
 TEST(UTF8, removeChar_returns_false_when_pos_to_remove_exceed)
 {
-	UTF8 sourceString("Teścik");
+    UTF8 sourceString("Teścik");
 
-	bool retVal = sourceString.removeChar(sourceString.length() + 1, 2);
-	ASSERT_EQ(false, retVal);
+    bool retVal = sourceString.removeChar(sourceString.length() + 1, 2);
+    ASSERT_EQ(false, retVal);
 }
 
 TEST(UTF8, removeChar_returns_propper_string)
 {
-	UTF8 sourceString("Teścik");
-	UTF8 toCompare("Tecik");
-	//remove 'ś'
-	bool retVal = sourceString.removeChar(2,1);
-	ASSERT_EQ(true, retVal);
-	ASSERT_EQ(toCompare.length(), sourceString.length());
-	ASSERT_EQ(toCompare.used(), sourceString.used());
+    UTF8 sourceString("Teścik");
+    UTF8 toCompare("Tecik");
+    // remove 'ś'
+    bool retVal = sourceString.removeChar(2, 1);
+    ASSERT_EQ(true, retVal);
+    ASSERT_EQ(toCompare.length(), sourceString.length());
+    ASSERT_EQ(toCompare.used(), sourceString.used());
 }
 
 TEST(UTF8, removeChar_)
+{}
+int main(int argc, char **argv)
 {
-
-}
-int main(int argc, char **argv) {
-      ::testing::InitGoogleTest(&argc, argv);
-      return RUN_ALL_TESTS();
+    ::testing::InitGoogleTest(&argc, argv);
+    return RUN_ALL_TESTS();
 }
diff --git a/module-utils/test/unittest_log.cpp b/module-utils/test/unittest_log.cpp
index 087b00a3b..642feb3ab 100644
--- a/module-utils/test/unittest_log.cpp
+++ b/module-utils/test/unittest_log.cpp
@@ -14,20 +14,19 @@
 
 using namespace std;
 
-int main() {
+int main()
+{
 
-	cout<<"RUNNING UNIT TEST FOR LOG"<<endl;
+    cout << "RUNNING UNIT TEST FOR LOG" << endl;
 
-	LOG_TRACE("This should be blue");
-	LOG_DEBUG("This should be navy blue");
-	LOG_INFO("This should be green");
-	LOG_WARN("This should be yellow");
-	LOG_ERROR("This should be red");
-	LOG_FATAL("This should be purple");
+    LOG_TRACE("This should be blue");
+    LOG_DEBUG("This should be navy blue");
+    LOG_INFO("This should be green");
+    LOG_WARN("This should be yellow");
+    LOG_ERROR("This should be red");
+    LOG_FATAL("This should be purple");
 
-	log_test_function();
+    log_test_function();
 
-	return 0;
+    return 0;
 }
-
-
diff --git a/module-utils/test/unittest_log2.cpp b/module-utils/test/unittest_log2.cpp
index ead88666c..06c8e7556 100644
--- a/module-utils/test/unittest_log2.cpp
+++ b/module-utils/test/unittest_log2.cpp
@@ -12,16 +12,15 @@
 
 using namespace std;
 
-int log_test_function() {
+int log_test_function()
+{
 
-	LOG_TRACE("This should be blue");
-	LOG_DEBUG("This should be navy blue");
-	LOG_INFO("This should be green");
-	LOG_WARN("This should be yellow");
-	LOG_ERROR("This should be red");
-	LOG_FATAL("This should be purple");
+    LOG_TRACE("This should be blue");
+    LOG_DEBUG("This should be navy blue");
+    LOG_INFO("This should be green");
+    LOG_WARN("This should be yellow");
+    LOG_ERROR("This should be red");
+    LOG_FATAL("This should be purple");
 
-	return 0;
+    return 0;
 }
-
-
diff --git a/module-utils/test/unittest_log2.h b/module-utils/test/unittest_log2.h
index 8850da0ec..c4129f40a 100644
--- a/module-utils/test/unittest_log2.h
+++ b/module-utils/test/unittest_log2.h
@@ -10,6 +10,4 @@
 
 int log_test_function();
 
-
-
 #endif /* TEST_UNITTEST_LOG2_H_ */
diff --git a/module-utils/test/unittest_time_conversion.cpp b/module-utils/test/unittest_time_conversion.cpp
index 5cfc6ac42..ec85541b3 100644
--- a/module-utils/test/unittest_time_conversion.cpp
+++ b/module-utils/test/unittest_time_conversion.cpp
@@ -2,14 +2,22 @@
 #include <time/time_conversion.hpp>
 #include <algorithm>
 
-/// crap null stream from internets (https://stackoverflow.com/questions/8243743/is-there-a-null-stdostream-implementation-in-c-or-libraries)
-class NullStream : public std::ostream {
-    class NullBuffer : public std::streambuf {
-    public:
-        int overflow( int c ) { return c; }
+/// crap null stream from internets
+/// (https://stackoverflow.com/questions/8243743/is-there-a-null-stdostream-implementation-in-c-or-libraries)
+class NullStream : public std::ostream
+{
+    class NullBuffer : public std::streambuf
+    {
+      public:
+        int overflow(int c)
+        {
+            return c;
+        }
     } m_nb;
-public:
-    NullStream() : std::ostream( &m_nb ) {}
+
+  public:
+    NullStream() : std::ostream(&m_nb)
+    {}
 };
 
 class vfs vfs;
@@ -19,39 +27,46 @@ using namespace utils::time;
 using namespace std;
 
 const map<string, time_t> test_times = {
-    {"", 0 },
+    {"", 0},
 };
 
-void foo(UTF8 val) { std::cout << "foo val: " << val << std::endl; }
+void foo(UTF8 val)
+{
+    std::cout << "foo val: " << val << std::endl;
+}
 
 /// test if month and day shown by foo are the same as from strftime (with proper locale)
-bool test_time_day_month_format(std::ostream &outstream) {
-    const time_t date = 1569503186;
+bool test_time_day_month_format(std::ostream &outstream)
+{
+    const time_t date        = 1569503186;
     const std::string format = "%a %A %b %B %Z %a <3 %I:%M %p %a";
-    tm date_tp = *localtime(&date);
+    tm date_tp               = *localtime(&date);
 
     char c_data[128];
-    strftime(c_data , 128, format.c_str(), &date_tp);
+    strftime(c_data, 128, format.c_str(), &date_tp);
     /// we dont care about UTC+x etc. for now and dont know how will it be handled via settings?
     /// and where and for what, for tests sake remove CEST so that behaviour would be the same
     string pattern = "CEST";
-    string data = c_data;
+    string data    = c_data;
 
     auto el = search(data.begin(), data.end(), pattern.begin(), pattern.end());
-    data.erase(el, std::next(el,4));
+    data.erase(el, std::next(el, 4));
 
     Time t(date);
-    outstream << "\t" << "timestamp format:      " << format << std::endl;
-    outstream << "\t" << "timestamp from format: " << t.str(format) << std::endl;
-    outstream << "\t" << "strtof version:        " << data << std::endl;
+    outstream << "\t"
+              << "timestamp format:      " << format << std::endl;
+    outstream << "\t"
+              << "timestamp from format: " << t.str(format) << std::endl;
+    outstream << "\t"
+              << "strtof version:        " << data << std::endl;
     bool retval = true;
-    if(!( t.str(format) == UTF8(data))) {
+    if (!(t.str(format) == UTF8(data))) {
         std::cerr << "Data mismatch: " << std::endl
-            << "[" << t.str(format).length() << "]" << std::endl
-            << ">" << t.str(format) << "<" << std::endl
-            <<" :vs: " << std::endl
-            << "[" << UTF8(data).length() << "]" << std::endl
-            << ">" << data << "<" << std::endl;
+                  << "[" << t.str(format).length() << "]" << std::endl
+                  << ">" << t.str(format) << "<" << std::endl
+                  << " :vs: " << std::endl
+                  << "[" << UTF8(data).length() << "]" << std::endl
+                  << ">" << data << "<" << std::endl;
         retval = false;
     }
 
@@ -59,83 +74,81 @@ bool test_time_day_month_format(std::ostream &outstream) {
     return retval;
 }
 
-std::string fromtime(time_t time, std::string formatter) {
+std::string fromtime(time_t time, std::string formatter)
+{
     char cstr[128] = {0};
-    tm ltm = *localtime(&time);
+    tm ltm         = *localtime(&time);
     strftime(cstr, 128, formatter.c_str(), &ltm);
     return cstr;
 }
 
-bool test_time_date_format(std::ostream &outstream,
-        std::string locale_format,
-        std::string format,
-        time_t time)
+bool test_time_date_format(std::ostream &outstream, std::string locale_format, std::string format, time_t time)
 {
     bool retval = true;
     // prepare common point in time
     tm sometimetm = *localtime(&time);
-    auto mytime = SysTime();
+    auto mytime   = SysTime();
     mytime.set_time(time);
 
-    if(!(mytime.str(locale_format) == fromtime(time, format))) {
+    if (!(mytime.str(locale_format) == fromtime(time, format))) {
         std::cerr << "Format24HourMin errors: "
-            << "["<<fromtime(time, format).length()<<"] "
-            << fromtime(time, format)
-            << " :vs: "
-            << "["<<mytime.str(locale_format).length()<<"] "
-            << mytime.str(locale_format)
-            << std::endl;
+                  << "[" << fromtime(time, format).length() << "] " << fromtime(time, format) << " :vs: "
+                  << "[" << mytime.str(locale_format).length() << "] " << mytime.str(locale_format) << std::endl;
         retval = false;
     }
 
     return retval;
 }
 
-bool test_time_format24hour_min(std::ostream &outstream) {
+bool test_time_format24hour_min(std::ostream &outstream)
+{
     // this just shows usage, test is below
     // as converter uses str() method, this is equal to: constructor->str()->operator UTF8
-    outstream << "\t" << "systime:            " << SysTime() << std::endl;
+    outstream << "\t"
+              << "systime:            " << SysTime() << std::endl;
 
     time_t sometime = 1569503186;
-    bool retval = test_time_date_format(outstream,
-                                Locale::format(Locale::TimeFormat::Format24HourMin),
-                                Locale::format(Locale::TimeFormat::Format24HourMin),
-                                sometime);
+    bool retval     = test_time_date_format(outstream,
+                                        Locale::format(Locale::TimeFormat::Format24HourMin),
+                                        Locale::format(Locale::TimeFormat::Format24HourMin),
+                                        sometime);
 
     outstream << "TEST: " << __FUNCTION__ << " result: " << retval << std::endl;
     return retval;
 }
 
-bool test_time_day(std::ostream &outstream) {
-    bool retval = true;
+bool test_time_day(std::ostream &outstream)
+{
+    bool retval     = true;
     time_t sometime = 1569503186;
-    tm sometimetm = *localtime(&sometime);
-    auto mytime = SysTime();
+    tm sometimetm   = *localtime(&sometime);
+    auto mytime     = SysTime();
     mytime.set_time(sometime);
 
-    if(!(mytime.day() == fromtime(sometime, "%A"))) {
+    if (!(mytime.day() == fromtime(sometime, "%A"))) {
         std::cerr << "Day mismatch: " << std::endl
-            << mytime.day() << std::endl
-            << " :vs: " << std::endl
-            << fromtime(sometime, "%A") << std::endl;
+                  << mytime.day() << std::endl
+                  << " :vs: " << std::endl
+                  << fromtime(sometime, "%A") << std::endl;
         retval = false;
     }
     outstream << "TEST: " << __FUNCTION__ << " result: " << retval << std::endl;
     return retval;
 }
 
-bool test_time_day_abbrew(std::ostream &outstream) {
-    bool retval = true;
+bool test_time_day_abbrew(std::ostream &outstream)
+{
+    bool retval     = true;
     time_t sometime = 1569503186;
-    tm sometimetm = *localtime(&sometime);
-    auto mytime = SysTime();
+    tm sometimetm   = *localtime(&sometime);
+    auto mytime     = SysTime();
     mytime.set_time(sometime);
 
-    if(!(mytime.day(true) == fromtime(sometime, "%a"))) {
+    if (!(mytime.day(true) == fromtime(sometime, "%a"))) {
         std::cerr << "Day mismatch: " << std::endl
-            << mytime.day() << std::endl
-            << " :vs: " << std::endl
-            << fromtime(sometime, "%a") << std::endl;
+                  << mytime.day() << std::endl
+                  << " :vs: " << std::endl
+                  << fromtime(sometime, "%a") << std::endl;
         retval = false;
     }
     outstream << "TEST: " << __FUNCTION__ << " result: " << retval << std::endl;
@@ -145,67 +158,60 @@ bool test_time_day_abbrew(std::ostream &outstream) {
 //    outstream << "\t" << "systime, month:     " << mytime.month() << std::endl;
 //    outstream << "\t" << "systime, month a:   " << mytime.month(true) << std::endl;
 
-bool test_time_from_before(std::ostream &outstream,
-        time_t before,
-        std::string format_expected)
+bool test_time_from_before(std::ostream &outstream, time_t before, std::string format_expected)
 {
-    auto retval = true;
-    auto mytime = SysTime(before);
-    tm todaytime = *localtime(&before);
+    auto retval   = true;
+    auto mytime   = SysTime(before);
+    tm todaytime  = *localtime(&before);
     char buf[128] = {0};
 
     strftime(buf, 128, format_expected.c_str(), &todaytime);
 
-    if(!( mytime.str() == buf)) {
-        std::cerr
-            << "Error: "
-            << "\n\t" << mytime.str()
-            << "\n\t" << " :vs:"
-            << "\n\t" << buf
-            << "\n\t" << "format_expected: " << format_expected
-            << "\n\t" << std::endl;
+    if (!(mytime.str() == buf)) {
+        std::cerr << "Error: "
+                  << "\n\t" << mytime.str() << "\n\t"
+                  << " :vs:"
+                  << "\n\t" << buf << "\n\t"
+                  << "format_expected: " << format_expected << "\n\t" << std::endl;
     }
 
     outstream << "TEST: " << __FUNCTION__ << " result: " << retval << std::endl;
     return retval;
 }
 
-
-bool test_time_from_today_200s(std::ostream &outstream) {
+bool test_time_from_today_200s(std::ostream &outstream)
+{
     outstream << "TEST: " << __FUNCTION__ << std::endl;
     time_t timenow;
     bsp::rtc_GetCurrentTimestamp(&timenow);
 
-    return test_time_from_before(outstream,
-            timenow - 200,
-            Locale::format(Locale::Format12HourMin));
+    return test_time_from_before(outstream, timenow - 200, Locale::format(Locale::Format12HourMin));
 }
 
-bool test_time_from_today_49h(std::ostream &outstream) {
+bool test_time_from_today_49h(std::ostream &outstream)
+{
     outstream << "TEST: " << __FUNCTION__ << std::endl;
     time_t timenow;
     bsp::rtc_GetCurrentTimestamp(&timenow);
 
-    return test_time_from_before(outstream,
-            timenow - 3600*49,
-            Locale::format(Locale::FormatLocaleDateFull));
+    return test_time_from_before(outstream, timenow - 3600 * 49, Locale::format(Locale::FormatLocaleDateFull));
 }
 
-bool test_time_from_today_24h(std::ostream &outstream) {
+bool test_time_from_today_24h(std::ostream &outstream)
+{
     outstream << "TEST: " << __FUNCTION__ << std::endl;
     time_t timenow;
     bsp::rtc_GetCurrentTimestamp(&timenow);
 
-    return test_time_from_before(outstream,
-            timenow - 3600*24,
-            Locale::yesterday().c_str());
+    return test_time_from_before(outstream, timenow - 3600 * 24, Locale::yesterday().c_str());
 }
 
-int main(int argc, char *argv[]) {
+int main(int argc, char *argv[])
+{
     time_t time_today = 0;
 
     // get reference Today time
-    if(bsp::rtc_GetCurrentTimestamp(&time_today)) {
+    if (bsp::rtc_GetCurrentTimestamp(&time_today)) {
         std::cerr << "Error on gettime" << std::endl;
         return -1;
     }
@@ -229,9 +235,9 @@ int main(int argc, char *argv[]) {
         test_time_from_today_49h,
     };
 
-    int retval=0;
-    for( auto test : tests) {
-        if(!test(nullst)) {
+    int retval = 0;
+    for (auto test : tests) {
+        if (!test(nullst)) {
             retval = 1;
         }
     }
diff --git a/module-utils/test/unittest_utf8.cpp b/module-utils/test/unittest_utf8.cpp
index 7a538c84e..6e4e70d0e 100644
--- a/module-utils/test/unittest_utf8.cpp
+++ b/module-utils/test/unittest_utf8.cpp
@@ -13,141 +13,149 @@ using namespace std;
 
 #include "utf8/UTF8.hpp"
 
-const char* strings[] = {
-	"TEST",
-	"Rąbać",
-	"I want to have pure phone",
-	"Мой адрес: улица Тверская, дом пять, квартира семнадцать"
-};
+const char *strings[] = {
+    "TEST", "Rąbać", "I want to have pure phone", "Мой адрес: улица Тверская, дом пять, квартира семнадцать"};
 
-const char* strings2[] = {
-	"TEST\r",
-	"Rąbać\n",
-	"I want to have \rpure phone",
-	"Мой адрес: улица Тверская, дом пять,\n квартира семнадцать"
-};
+const char *strings2[] = {
+    "TEST\r", "Rąbać\n", "I want to have \rpure phone", "Мой адрес: улица Тверская, дом пять,\n квартира семнадцать"};
 
-void test_raw_char_constructor( const char* str ) {
-	UTF8 ustr = UTF8{ str };
-	cout<< "    "<< ustr.c_str()<< " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
-}
-
-void test_string_constructor( const std::string& str ) {
-	UTF8 ustr = UTF8{ str };
-	cout<< "    "<<ustr.c_str()<< " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
-}
-
-void test_copy_constructor( const std::string& str ) {
-	UTF8 bstr = UTF8{ str };
-	UTF8 ustr = UTF8{ bstr };
-	cout<< "    "<< ustr.c_str()<< " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
-}
-
-void test_operator_index( const std::string& str ){
-	UTF8 ustr = UTF8{ str };
-	char s[4] = {0,0,0,0};
-
-	cout << "    ";
-	for(uint32_t i = 0; i < ustr.length(); i++)
-		{
-			uint32_t value = ustr[i];
-			memcpy(s, &value, 4);
-			cout << s;
-		}
-	cout << endl;
-}
-
-void test_split(const std::string& str )
+void test_raw_char_constructor(const char *str)
 {
-	UTF8 sourceString = UTF8{str};
-
-	uint32_t divisionIdx = sourceString.length() / 2;
-
-	cout << "    " << "Before split." << endl;
-	cout << "        " << "srcString:    [" << sourceString.c_str() << "]    len: " << sourceString.length() << " used bytes: " << sourceString.used() << endl;
-	char s[4] = {0,0,0,0};
-	uint32_t value = sourceString[ divisionIdx ];
-	memcpy(s, &value , 4);
-	cout << "        " << "division character: [" << s << "] division index: " << divisionIdx << endl;
-
-	UTF8 splitString = sourceString.split(divisionIdx);
-
-	cout << "    " << "After split." << endl;
-	cout << "        " << "srcString:    [" << sourceString.c_str() << "]    len: " << sourceString.length() << " used bytes: " << sourceString.used() << endl;
-	cout << "        " << "sptString:    [" << splitString.c_str() << "]    len: " << splitString.length() << " used bytes: " << splitString.used() << endl;
-	cout << "        " << "summary len: " << splitString.length() + sourceString.length()
-	    			   << " summary used bytes : " << splitString.used() + sourceString.used()<< endl;
-	cout << endl;
-}
-void test_getLine( const std::string& str ){
-	UTF8 ustr = UTF8{ str };
-
-	UTF8 dstr = ustr.getLine();
-
-	cout << "    " << dstr.c_str() << endl;
+    UTF8 ustr = UTF8{str};
+    cout << "    " << ustr.c_str() << " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
 }
 
-void test_removeChar( const std::string& str, uint32_t i ){
-	UTF8 ustr(str);
-
-	cout<< "    Source: " << endl;
-	cout<< "    " << ustr.c_str()<< " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
-	//remove 'ś'
-	bool retVal = ustr.removeChar(i, i*2);
-	cout<< "    After remove: " << " remove pos: " << i << " remove count: " << i*2 << endl;
-	cout<< "    " << ustr.c_str()<< " len: " << ustr.length() << " used bytes: " << ustr.used() << " returned value: " << retVal << endl;
-
+void test_string_constructor(const std::string &str)
+{
+    UTF8 ustr = UTF8{str};
+    cout << "    " << ustr.c_str() << " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
 }
 
-int main() {
-
-	cout<<"RUNNING UNIT TEST FOR UTF8"<<endl;
-
-	cout<< "UTF8( const char* str )"<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i )
-		test_raw_char_constructor( strings[i] );
-	cout<<endl;
-
-	cout<<"UTF8( const std::string& str )"<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i )
-		test_string_constructor( std::string{strings[i]} );
-	cout<<endl;
-
-	//copy constructor
-	cout<<"UTF8( const UTF8& utf )"<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i ){
-		test_copy_constructor( std::string{strings[i]} );
-	}
-	cout<<endl;
-
-	cout<<"uint32_t operator[]( const uint32_t& idx ) "<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i ){
-		test_operator_index( std::string{strings[i]} );
-	}
-	cout<<endl;
-
-	cout<<"UTF8 split( uint32_t idx ) "<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i ){
-		test_split( std::string{strings[i]} );
-	}
-	cout<<"UTF8 getLine( void ) "<<endl;
-	for( uint32_t i=0; i<sizeof(strings2)/sizeof(char*); ++i ){
-		test_getLine( std::string{strings2[i]} );
-	}
-	cout<<endl;
-	cout<<"bool removeChar(uint32_t pos, uint32_t count) "<<endl;
-	for( uint32_t i=0; i<sizeof(strings)/sizeof(char*); ++i ){
-		test_removeChar( std::string{strings[i]}, i);
-	}
-	cout<<endl;
-
-	UTF8 sourceString = UTF8("Rąbać drewno siekierą");
-	UTF8 destinationString = sourceString.substr(0, 5);
-
-	cout << "UTF8 : " << '[' << sourceString.c_str() << ']'<< endl;
-	cout << "UTF8 substr: " << '[' << destinationString.c_str() << ']'<< endl;
-
-	cout << "" << endl; // prints
-	return 0;
+void test_copy_constructor(const std::string &str)
+{
+    UTF8 bstr = UTF8{str};
+    UTF8 ustr = UTF8{bstr};
+    cout << "    " << ustr.c_str() << " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
 }
 
+void test_operator_index(const std::string &str)
+{
+    UTF8 ustr = UTF8{str};
+    char s[4] = {0, 0, 0, 0};
+
+    cout << "    ";
+    for (uint32_t i = 0; i < ustr.length(); i++) {
+        uint32_t value = ustr[i];
+        memcpy(s, &value, 4);
+        cout << s;
+    }
+    cout << endl;
+}
+
+void test_split(const std::string &str)
+{
+    UTF8 sourceString = UTF8{str};
+
+    uint32_t divisionIdx = sourceString.length() / 2;
+
+    cout << "    "
+         << "Before split." << endl;
+    cout << "        "
+         << "srcString:    [" << sourceString.c_str() << "]    len: " << sourceString.length()
+         << " used bytes: " << sourceString.used() << endl;
+    char s[4]      = {0, 0, 0, 0};
+    uint32_t value = sourceString[divisionIdx];
+    memcpy(s, &value, 4);
+    cout << "        "
+         << "division character: [" << s << "] division index: " << divisionIdx << endl;
+
+    UTF8 splitString = sourceString.split(divisionIdx);
+
+    cout << "    "
+         << "After split." << endl;
+    cout << "        "
+         << "srcString:    [" << sourceString.c_str() << "]    len: " << sourceString.length()
+         << " used bytes: " << sourceString.used() << endl;
+    cout << "        "
+         << "sptString:    [" << splitString.c_str() << "]    len: " << splitString.length()
+         << " used bytes: " << splitString.used() << endl;
+    cout << "        "
+         << "summary len: " << splitString.length() + sourceString.length()
+         << " summary used bytes : " << splitString.used() + sourceString.used() << endl;
+    cout << endl;
+}
+void test_getLine(const std::string &str)
+{
+    UTF8 ustr = UTF8{str};
+
+    UTF8 dstr = ustr.getLine();
+
+    cout << "    " << dstr.c_str() << endl;
+}
+
+void test_removeChar(const std::string &str, uint32_t i)
+{
+    UTF8 ustr(str);
+
+    cout << "    Source: " << endl;
+    cout << "    " << ustr.c_str() << " len: " << ustr.length() << " used bytes: " << ustr.used() << endl;
+    // remove 'ś'
+    bool retVal = ustr.removeChar(i, i * 2);
+    cout << "    After remove: "
+         << " remove pos: " << i << " remove count: " << i * 2 << endl;
+    cout << "    " << ustr.c_str() << " len: " << ustr.length() << " used bytes: " << ustr.used()
+         << " returned value: " << retVal << endl;
+}
+
+int main()
+{
+
+    cout << "RUNNING UNIT TEST FOR UTF8" << endl;
+
+    cout << "UTF8( const char* str )" << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i)
+        test_raw_char_constructor(strings[i]);
+    cout << endl;
+
+    cout << "UTF8( const std::string& str )" << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i)
+        test_string_constructor(std::string{strings[i]});
+    cout << endl;
+
+    // copy constructor
+    cout << "UTF8( const UTF8& utf )" << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i) {
+        test_copy_constructor(std::string{strings[i]});
+    }
+    cout << endl;
+
+    cout << "uint32_t operator[]( const uint32_t& idx ) " << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i) {
+        test_operator_index(std::string{strings[i]});
+    }
+    cout << endl;
+
+    cout << "UTF8 split( uint32_t idx ) " << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i) {
+        test_split(std::string{strings[i]});
+    }
+    cout << "UTF8 getLine( void ) " << endl;
+    for (uint32_t i = 0; i < sizeof(strings2) / sizeof(char *); ++i) {
+        test_getLine(std::string{strings2[i]});
+    }
+    cout << endl;
+    cout << "bool removeChar(uint32_t pos, uint32_t count) " << endl;
+    for (uint32_t i = 0; i < sizeof(strings) / sizeof(char *); ++i) {
+        test_removeChar(std::string{strings[i]}, i);
+    }
+    cout << endl;
+
+    UTF8 sourceString      = UTF8("Rąbać drewno siekierą");
+    UTF8 destinationString = sourceString.substr(0, 5);
+
+    cout << "UTF8 : " << '[' << sourceString.c_str() << ']' << endl;
+    cout << "UTF8 substr: " << '[' << destinationString.c_str() << ']' << endl;
+
+    cout << "" << endl; // prints
+    return 0;
+}
diff --git a/module-utils/test/unittest_utils.cpp b/module-utils/test/unittest_utils.cpp
index f2ac65e4d..87ade7fbc 100644
--- a/module-utils/test/unittest_utils.cpp
+++ b/module-utils/test/unittest_utils.cpp
@@ -15,7 +15,7 @@ TEST_CASE("Split tests")
     std::string delimiter = "\r\n";
 
     std::string inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    auto ret = utils::split(inputStr1, delimiter, 0, false);
+    auto ret              = utils::split(inputStr1, delimiter, 0, false);
     REQUIRE(ret.size() == 7);
     REQUIRE(ret[0] == "");
     REQUIRE(ret[1] == "OK");
@@ -26,20 +26,20 @@ TEST_CASE("Split tests")
     REQUIRE(ret[6] == "");
 
     inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    ret = utils::split(inputStr1, delimiter);
+    ret       = utils::split(inputStr1, delimiter);
     REQUIRE(ret.size() == 3);
     REQUIRE(ret[0] == "OK");
     REQUIRE(ret[1] == "NO CARRIER");
     REQUIRE(ret[2] == "FINISHED");
 
     inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    ret = utils::split(inputStr1, delimiter, 2, false);
+    ret       = utils::split(inputStr1, delimiter, 2, false);
     REQUIRE(ret.size() == 2);
     REQUIRE(ret[0] == "");
     REQUIRE(ret[1] == "OK");
 
     inputStr1 = "\r\nOK\r\n\r\nNO CARRIER\r\n\r\nFINISHED\r\n";
-    ret = utils::split(inputStr1, delimiter, 2);
+    ret       = utils::split(inputStr1, delimiter, 2);
     REQUIRE(ret.size() == 2);
     REQUIRE(ret[0] == "OK");
     REQUIRE(ret[1] == "NO CARRIER");
diff --git a/module-utils/time/ScopedTime.hpp b/module-utils/time/ScopedTime.hpp
index 1a5aa3c66..dbcb64514 100644
--- a/module-utils/time/ScopedTime.hpp
+++ b/module-utils/time/ScopedTime.hpp
@@ -23,7 +23,7 @@ namespace utils
             {
 #if DEBUG_SCOPED_TIMINGS == 1
                 this->text = text;
-                timestamp = cpp_freertos::Ticks::GetTicks();
+                timestamp  = cpp_freertos::Ticks::GetTicks();
 #endif
             }
             ~Scoped()
diff --git a/module-utils/time/time_conversion.cpp b/module-utils/time/time_conversion.cpp
index f89b6cb3b..1a79c0218 100644
--- a/module-utils/time/time_conversion.cpp
+++ b/module-utils/time/time_conversion.cpp
@@ -15,219 +15,217 @@
 #include "time_conversion.hpp"
 #include "time_locale.hpp"
 
-namespace utils {
-namespace time {
-
-Locale tlocale;
-
-UTF8 Localer::get_replacement(Replacements val, const struct tm &timeinfo)
+namespace utils
 {
-    UTF8 retval = "";
-    switch (val) {
-    case DayLong:
-        retval = Locale::get_day(Locale::Day(timeinfo.tm_wday - 1));
-        break;
-    case DayAbbrev:
-        retval = Locale::get_day(Locale::Day(timeinfo.tm_wday - 1)).substr(0,abbrev_len);
-        break;
-    case MonthLong:
-        retval = Locale::get_month(Locale::Month(timeinfo.tm_mon));
-        break;
-    case MonthAbbrev:
-        retval = Locale::get_month(Locale::Month(timeinfo.tm_mon)).substr(0,abbrev_len);
-        break;
-    case Timezone:
-        break;
-    }
-    return retval;
-}
+    namespace time
+    {
 
-void Timestamp::replace_specifiers()
-{
-        int replacements_n = 0;
-        const int strtof_formatter_size = 2;
-        for (auto &el : specifiers_replacement) {
-            auto begin_pos = format.begin();
-            auto found_pos = format.begin();
-            while (found_pos != format.end()) {
-                begin_pos = format.begin();
-                found_pos = std::search(begin_pos, format.end(), el.begin(), el.end());
-                if (found_pos != format.end()) {
-                    UTF8 begin = std::string(begin_pos, found_pos);
-                    UTF8 day = get_replacement(Replacements(replacements_n), timeinfo);
-                    UTF8 next;
-                    // std::next doesnt care for distance... (doesn't return element.end()) need to check it
-                    if (std::distance(found_pos, format.end()) <= strtof_formatter_size) {
-                        next = "";
-                    } else {
-                        next = std::string(std::next(found_pos, strtof_formatter_size), format.end());
+        Locale tlocale;
+
+        UTF8 Localer::get_replacement(Replacements val, const struct tm &timeinfo)
+        {
+            UTF8 retval = "";
+            switch (val) {
+            case DayLong:
+                retval = Locale::get_day(Locale::Day(timeinfo.tm_wday - 1));
+                break;
+            case DayAbbrev:
+                retval = Locale::get_day(Locale::Day(timeinfo.tm_wday - 1)).substr(0, abbrev_len);
+                break;
+            case MonthLong:
+                retval = Locale::get_month(Locale::Month(timeinfo.tm_mon));
+                break;
+            case MonthAbbrev:
+                retval = Locale::get_month(Locale::Month(timeinfo.tm_mon)).substr(0, abbrev_len);
+                break;
+            case Timezone:
+                break;
+            }
+            return retval;
+        }
+
+        void Timestamp::replace_specifiers()
+        {
+            int replacements_n              = 0;
+            const int strtof_formatter_size = 2;
+            for (auto &el : specifiers_replacement) {
+                auto begin_pos = format.begin();
+                auto found_pos = format.begin();
+                while (found_pos != format.end()) {
+                    begin_pos = format.begin();
+                    found_pos = std::search(begin_pos, format.end(), el.begin(), el.end());
+                    if (found_pos != format.end()) {
+                        UTF8 begin = std::string(begin_pos, found_pos);
+                        UTF8 day   = get_replacement(Replacements(replacements_n), timeinfo);
+                        UTF8 next;
+                        // std::next doesnt care for distance... (doesn't return element.end()) need to check it
+                        if (std::distance(found_pos, format.end()) <= strtof_formatter_size) {
+                            next = "";
+                        }
+                        else {
+                            next = std::string(std::next(found_pos, strtof_formatter_size), format.end());
+                        }
+                        format = (begin + day + next).c_str();
                     }
-                    format = (begin + day + next).c_str();
                 }
+                ++replacements_n;
             }
-            ++replacements_n;
         }
-    }
 
-    void Timestamp::set_time(time_t newtime)
-    {
-        time = newtime;
-        timeinfo = *localtime(&time);
-    }
-
-    void Timestamp::set_time(std::string timestr, const char *format)
-    {
-
-        std::stringstream stream(timestr);
-        try
-		{
-            stream >> std::get_time(&(this->timeinfo), "%y/%m/%d %H:%M:%S");
-
-            // add missing years, otherwise mktime returns bad timestamp
-            timeinfo.tm_year += 100;
-            this->time = mktime(&timeinfo);
-        }
-		catch (std::exception &e)
-		{
-			LOG_ERROR("Time::set_time error %s", e.what());
-		}
-    }
-    UTF8 Timestamp::str(std::string format)
-    {
-        if(format.compare("") !=0) this->format = format;
-        UTF8 datetimestr = "";
-        replace_specifiers();
-        std::strftime((char *)data, datasize, this->format.c_str(), &timeinfo);
-        datetimestr = data;
-        return datetimestr;
-    }
-
-    UTF8 Timestamp::day(bool abbrev)
-    {
-        if(abbrev) {
-            return get_replacement(Replacements::DayAbbrev, timeinfo);
-        } else {
-            return get_replacement(Replacements::DayLong, timeinfo);
-        }
-    }
-
-    UTF8 Timestamp::month(bool abbrev)
-    {
-        if(abbrev) {
-            return get_replacement(Replacements::MonthAbbrev, timeinfo);
-        } else {
-            return get_replacement(Replacements::MonthLong, timeinfo);
-        }
-    }
-
-    void DateTime::before_n_sec(time_t val)
-    {
-        local_time = time;
-        if (val)
+        void Timestamp::set_time(time_t newtime)
         {
-            set_time(val);
+            time     = newtime;
+            timeinfo = *localtime(&time);
         }
-    }
 
-    bool DateTime::isToday()
-    {
-        auto newer_timeinfo = *localtime(&local_time);
-        return (newer_timeinfo.tm_yday == timeinfo.tm_yday && newer_timeinfo.tm_year == timeinfo.tm_year);
-    }
+        void Timestamp::set_time(std::string timestr, const char *format)
+        {
 
-    bool DateTime::isYesterday()
-    {
-        auto newer_timeinfo = *localtime(&local_time);
-        bool is_leap_year = (timeinfo.tm_year % 4 == 0 && timeinfo.tm_year % 100 != 0) || timeinfo.tm_year % 400 == 0;
+            std::stringstream stream(timestr);
+            try {
+                stream >> std::get_time(&(this->timeinfo), "%y/%m/%d %H:%M:%S");
 
-        return (((newer_timeinfo.tm_yday - timeinfo.tm_yday == 1) && (newer_timeinfo.tm_year == timeinfo.tm_year)) // day difference
-                || (timeinfo.tm_year == 0 && newer_timeinfo.tm_year + 364 + is_leap_year)                          // day next year day difference
-        );
-    }
-
-    UTF8 DateTime::str(std::string format)
-    {
-        if (format.compare("") != 0)
-        {
-            return Timestamp::str(format);
-        }
-        if (isToday()) // if the same computer day, then return hour.
-        {
-            return Timestamp::str(Locale::format(Locale::FormatTime12H));
-        }
-        else if (show_textual_past && isYesterday())
-        {
-            return Locale::yesterday();
-        }
-        else
-        {
-            return Timestamp::str(Locale::format(date_format_long ? Locale::FormatLocaleDateFull : Locale::FormatLocaleDateShort));
-        }
-    }
-    UTF8 Timestamp::get_date_time_substr(GetParameters param)
-    {
-        auto value = get_date_time_sub_value(param);
-        if (value != UINT32_MAX)
-        {
-            return UTF8(std::to_string(value));
-        }
-        return UTF8();
-    }
-
-    uint32_t Timestamp::get_date_time_sub_value(GetParameters param)
-    {
-        switch (param)
-        {
-        case GetParameters::Hour:
-            return timeinfo.tm_hour;
-            break;
-        case GetParameters::Minute:
-            return timeinfo.tm_min;
-            break;
-        case GetParameters::Day:
-            return timeinfo.tm_mday;
-            break;
-        case GetParameters::Month:
-            return timeinfo.tm_mon + 1;
-            break;
-        case GetParameters::Year:
-            return timeinfo.tm_year + 1900;
-            break;
-        }
-        return UINT32_MAX;
-    }
-    UTF8 Date::str(std::string format)
-    {
-        if (!format.empty())
-        {
-            return Timestamp::str(format);
-        }
-        else if (show_textual_past)
-        {
-            if (isToday())
-            {
-                return Locale::today();
+                // add missing years, otherwise mktime returns bad timestamp
+                timeinfo.tm_year += 100;
+                this->time = mktime(&timeinfo);
             }
-            else if (isYesterday())
+            catch (std::exception &e) {
+                LOG_ERROR("Time::set_time error %s", e.what());
+            }
+        }
+        UTF8 Timestamp::str(std::string format)
+        {
+            if (format.compare("") != 0)
+                this->format = format;
+            UTF8 datetimestr = "";
+            replace_specifiers();
+            std::strftime((char *)data, datasize, this->format.c_str(), &timeinfo);
+            datetimestr = data;
+            return datetimestr;
+        }
+
+        UTF8 Timestamp::day(bool abbrev)
+        {
+            if (abbrev) {
+                return get_replacement(Replacements::DayAbbrev, timeinfo);
+            }
+            else {
+                return get_replacement(Replacements::DayLong, timeinfo);
+            }
+        }
+
+        UTF8 Timestamp::month(bool abbrev)
+        {
+            if (abbrev) {
+                return get_replacement(Replacements::MonthAbbrev, timeinfo);
+            }
+            else {
+                return get_replacement(Replacements::MonthLong, timeinfo);
+            }
+        }
+
+        void DateTime::before_n_sec(time_t val)
+        {
+            local_time = time;
+            if (val) {
+                set_time(val);
+            }
+        }
+
+        bool DateTime::isToday()
+        {
+            auto newer_timeinfo = *localtime(&local_time);
+            return (newer_timeinfo.tm_yday == timeinfo.tm_yday && newer_timeinfo.tm_year == timeinfo.tm_year);
+        }
+
+        bool DateTime::isYesterday()
+        {
+            auto newer_timeinfo = *localtime(&local_time);
+            bool is_leap_year =
+                (timeinfo.tm_year % 4 == 0 && timeinfo.tm_year % 100 != 0) || timeinfo.tm_year % 400 == 0;
+
+            return (((newer_timeinfo.tm_yday - timeinfo.tm_yday == 1) &&
+                     (newer_timeinfo.tm_year == timeinfo.tm_year)) // day difference
+                    || (timeinfo.tm_year == 0 &&
+                        newer_timeinfo.tm_year + 364 + is_leap_year) // day next year day difference
+            );
+        }
+
+        UTF8 DateTime::str(std::string format)
+        {
+            if (format.compare("") != 0) {
+                return Timestamp::str(format);
+            }
+            if (isToday()) // if the same computer day, then return hour.
             {
+                return Timestamp::str(Locale::format(Locale::FormatTime12H));
+            }
+            else if (show_textual_past && isYesterday()) {
                 return Locale::yesterday();
             }
+            else {
+                return Timestamp::str(
+                    Locale::format(date_format_long ? Locale::FormatLocaleDateFull : Locale::FormatLocaleDateShort));
+            }
         }
-
-        return Timestamp::str(Locale::format(date_format_long ? Locale::FormatLocaleDateFull : Locale::FormatLocaleDateShort));
-    }
-
-    UTF8 Time::str(std::string format)
-    {
-        if (!format.empty())
+        UTF8 Timestamp::get_date_time_substr(GetParameters param)
         {
-            return Timestamp::str(format);
+            auto value = get_date_time_sub_value(param);
+            if (value != UINT32_MAX) {
+                return UTF8(std::to_string(value));
+            }
+            return UTF8();
         }
-        else
-        {
-            return Timestamp::str(Locale::format(Locale::FormatTime12H)); // @TODO: M.G. FormatLocaleTime which actually works
-        }
-    }
 
-}; // namespace time
-}; // utils
+        uint32_t Timestamp::get_date_time_sub_value(GetParameters param)
+        {
+            switch (param) {
+            case GetParameters::Hour:
+                return timeinfo.tm_hour;
+                break;
+            case GetParameters::Minute:
+                return timeinfo.tm_min;
+                break;
+            case GetParameters::Day:
+                return timeinfo.tm_mday;
+                break;
+            case GetParameters::Month:
+                return timeinfo.tm_mon + 1;
+                break;
+            case GetParameters::Year:
+                return timeinfo.tm_year + 1900;
+                break;
+            }
+            return UINT32_MAX;
+        }
+        UTF8 Date::str(std::string format)
+        {
+            if (!format.empty()) {
+                return Timestamp::str(format);
+            }
+            else if (show_textual_past) {
+                if (isToday()) {
+                    return Locale::today();
+                }
+                else if (isYesterday()) {
+                    return Locale::yesterday();
+                }
+            }
+
+            return Timestamp::str(
+                Locale::format(date_format_long ? Locale::FormatLocaleDateFull : Locale::FormatLocaleDateShort));
+        }
+
+        UTF8 Time::str(std::string format)
+        {
+            if (!format.empty()) {
+                return Timestamp::str(format);
+            }
+            else {
+                return Timestamp::str(
+                    Locale::format(Locale::FormatTime12H)); // @TODO: M.G. FormatLocaleTime which actually works
+            }
+        }
+
+    }; // namespace time
+};     // namespace utils
diff --git a/module-utils/time/time_conversion.hpp b/module-utils/time/time_conversion.hpp
index 939942d6a..b3dcf9653 100644
--- a/module-utils/time/time_conversion.hpp
+++ b/module-utils/time/time_conversion.hpp
@@ -9,151 +9,163 @@
 #include <string>
 #include <log/log.hpp>
 
-namespace utils {
-namespace time {
-
-    enum class GetParameters
+namespace utils
+{
+    namespace time
     {
-        Hour,
-        Minute,
-        Day,
-        Month,
-        Year
-    };
 
-    // helper class to not put everything in time
-    struct Localer
-    {
-        const unsigned int abbrev_len = 3;
-        /// order matters, it's used in replace_locale with enum Replacements
-        const std::vector<std::string> specifiers_replacement = {"%a",  // day abbrew
-                                                                 "%A",  // day long
-                                                                 "%b",  // month abbrew
-                                                                 "%B",  // month long
-                                                                 "%Z"}; // timezone
-        /// see specifiers_replacements description above
-        enum Replacements
+        enum class GetParameters
         {
-            DayAbbrev,
-            DayLong,
-            MonthAbbrev,
-            MonthLong,
-            Timezone,
+            Hour,
+            Minute,
+            Day,
+            Month,
+            Year
         };
 
-        UTF8 get_replacement(Replacements val, const struct tm &timeinfo);
-};
+        // helper class to not put everything in time
+        struct Localer
+        {
+            const unsigned int abbrev_len = 3;
+            /// order matters, it's used in replace_locale with enum Replacements
+            const std::vector<std::string> specifiers_replacement = {"%a",  // day abbrew
+                                                                     "%A",  // day long
+                                                                     "%b",  // month abbrew
+                                                                     "%B",  // month long
+                                                                     "%Z"}; // timezone
+            /// see specifiers_replacements description above
+            enum Replacements
+            {
+                DayAbbrev,
+                DayLong,
+                MonthAbbrev,
+                MonthLong,
+                Timezone,
+            };
 
-class Timestamp : protected Localer
-{
-  protected:
-    time_t time = 0;
-    struct tm timeinfo;
-    /// only reformat on: new format
-    std::string format = "";
+            UTF8 get_replacement(Replacements val, const struct tm &timeinfo);
+        };
 
-    explicit operator UTF8 *() const { return nullptr; }
+        class Timestamp : protected Localer
+        {
+          protected:
+            time_t time = 0;
+            struct tm timeinfo;
+            /// only reformat on: new format
+            std::string format = "";
 
-    static const uint32_t datasize = 128;
-    char data[datasize];
+            explicit operator UTF8 *() const
+            {
+                return nullptr;
+            }
 
-    /// replace day mon specifiers (first 2 characters)
-    /// cant use std::replace -> due to fact that it doesn't support multiple element replace (or i cant find it)
-    /// cant use string::replace -> expcetion out_of_range on size when replacing with bigger (our case)
-    /// please be vary when using begin_pos/found_pos (as format in next loops might be in totally different place)
-    void replace_specifiers();
+            static const uint32_t datasize = 128;
+            char data[datasize];
 
-  public:
-    Timestamp()
-    {
-        auto err = bsp::rtc_GetCurrentTimestamp(&time);
-        if(err) {
-            LOG_ERROR("rtc_GetCurrentTimestamp failure!");
-        }
-        timeinfo = *localtime(&time);
-    }
-    Timestamp(time_t newtime) : time(newtime)
-    {
-        timeinfo = *localtime(&time);
-    }
+            /// replace day mon specifiers (first 2 characters)
+            /// cant use std::replace -> due to fact that it doesn't support multiple element replace (or i cant find
+            /// it) cant use string::replace -> expcetion out_of_range on size when replacing with bigger (our case)
+            /// please be vary when using begin_pos/found_pos (as format in next loops might be in totally different
+            /// place)
+            void replace_specifiers();
 
-    /// set Time time_t value held (set timestamp)
-    void set_time(time_t newtime);
-    /// set Time from string
-    void set_time(std::string time, const char* format);
-    void set_format(std::string format) { this->format = format;}
+          public:
+            Timestamp()
+            {
+                auto err = bsp::rtc_GetCurrentTimestamp(&time);
+                if (err) {
+                    LOG_ERROR("rtc_GetCurrentTimestamp failure!");
+                }
+                timeinfo = *localtime(&time);
+            }
+            Timestamp(time_t newtime) : time(newtime)
+            {
+                timeinfo = *localtime(&time);
+            }
 
-    operator UTF8() { return str(); }
-    friend std::ostream &operator<<(std::ostream &os, Timestamp t)
-    {
-        os << t.str();
-        return os;
-    }
+            /// set Time time_t value held (set timestamp)
+            void set_time(time_t newtime);
+            /// set Time from string
+            void set_time(std::string time, const char *format);
+            void set_format(std::string format)
+            {
+                this->format = format;
+            }
 
-    /// get Time in any format possible via strftime
-    virtual UTF8 str(std::string format="");
+            operator UTF8()
+            {
+                return str();
+            }
+            friend std::ostream &operator<<(std::ostream &os, Timestamp t)
+            {
+                os << t.str();
+                return os;
+            }
 
-    /// get day UTF8 value
-    UTF8 day(bool abbrev = false);
+            /// get Time in any format possible via strftime
+            virtual UTF8 str(std::string format = "");
 
-    /// get month UTF8 value
-    UTF8 month(bool abbrev = false);
+            /// get day UTF8 value
+            UTF8 day(bool abbrev = false);
 
-    // get timestamp value
-    time_t getTime(void)
-    {
-        return time;
-    };
+            /// get month UTF8 value
+            UTF8 month(bool abbrev = false);
 
-    UTF8 get_date_time_substr(GetParameters param);
-    uint32_t get_date_time_sub_value(GetParameters param);
-};
+            // get timestamp value
+            time_t getTime(void)
+            {
+                return time;
+            };
 
-/// helper class to operate on time now
-/// takes timestamp and can show time in past
-class DateTime : public Timestamp
-{
-    time_t local_time = 0;
+            UTF8 get_date_time_substr(GetParameters param);
+            uint32_t get_date_time_sub_value(GetParameters param);
+        };
 
-  public:
-    bool show_textual_past = true;
-    bool date_format_long = true;
-    std::string today_format = "%H:%M";
-    std::string long_ago_format = "%d.%m.%y";
+        /// helper class to operate on time now
+        /// takes timestamp and can show time in past
+        class DateTime : public Timestamp
+        {
+            time_t local_time = 0;
 
-    /// shows time in past: time_now - val in seconds
-    DateTime(time_t val = 0, bool date_format_long = true) : date_format_long(date_format_long)
-    {
-        before_n_sec(val);
-    }
+          public:
+            bool show_textual_past      = true;
+            bool date_format_long       = true;
+            std::string today_format    = "%H:%M";
+            std::string long_ago_format = "%d.%m.%y";
 
-    friend std::ostream &operator<<(std::ostream &os, DateTime t)
-    {
-        os << t.str();
-        return os;
-    }
+            /// shows time in past: time_now - val in seconds
+            DateTime(time_t val = 0, bool date_format_long = true) : date_format_long(date_format_long)
+            {
+                before_n_sec(val);
+            }
 
-    /// converter -> returns time in past: (val) and stores localtime in ref_time
-    void before_n_sec(time_t val);
+            friend std::ostream &operator<<(std::ostream &os, DateTime t)
+            {
+                os << t.str();
+                return os;
+            }
 
-    /// Time have str(std::string ) this one uses presets
-    virtual UTF8 str(std::string format = "");
-    bool isToday();
-    bool isYesterday();
-};
+            /// converter -> returns time in past: (val) and stores localtime in ref_time
+            void before_n_sec(time_t val);
 
-class Date : public DateTime
-{
-  public:
-    Date(time_t val = 0, bool date_format_long = true) : DateTime(val, date_format_long){};
-    virtual UTF8 str(std::string format = "") final;
-};
+            /// Time have str(std::string ) this one uses presets
+            virtual UTF8 str(std::string format = "");
+            bool isToday();
+            bool isYesterday();
+        };
 
-class Time : public DateTime
-{
-  public:
-    Time(time_t val = 0, bool date_format_long = true) : DateTime(val, date_format_long){};
-    virtual UTF8 str(std::string format = "") final;
-};
-};
-};
+        class Date : public DateTime
+        {
+          public:
+            Date(time_t val = 0, bool date_format_long = true) : DateTime(val, date_format_long){};
+            virtual UTF8 str(std::string format = "") final;
+        };
+
+        class Time : public DateTime
+        {
+          public:
+            Time(time_t val = 0, bool date_format_long = true) : DateTime(val, date_format_long){};
+            virtual UTF8 str(std::string format = "") final;
+        };
+    }; // namespace time
+};     // namespace utils
diff --git a/module-utils/time/time_date_validation.cpp b/module-utils/time/time_date_validation.cpp
index ee40ff11a..2190aa629 100644
--- a/module-utils/time/time_date_validation.cpp
+++ b/module-utils/time/time_date_validation.cpp
@@ -12,40 +12,31 @@ namespace utils
     {
         bool validateDate(uint32_t day, uint32_t month, uint32_t year)
         {
-            if (month < 1 || month > 12)
-            {
+            if (month < 1 || month > 12) {
                 return false;
             }
-            if (day < 1 || day > 31)
-            {
+            if (day < 1 || day > 31) {
                 return false;
             }
-            if ((day == 31) && (month = 2 || month == 4 || month == 6 || month == 9 || month == 11))
-            {
+            if ((day == 31) && (month = 2 || month == 4 || month == 6 || month == 9 || month == 11)) {
                 return false;
             }
-            if (day == 30 && month == 2)
-            {
+            if (day == 30 && month == 2) {
                 return false;
             }
-            if (day == 29 && month == 2 && year % 4 != 0)
-            {
+            if (day == 29 && month == 2 && year % 4 != 0) {
                 return false;
             }
-            if ((month == 2) && (day == 29) && (year % 400 == 0))
-            {
+            if ((month == 2) && (day == 29) && (year % 400 == 0)) {
                 return true;
             }
-            if ((month == 2) && (day == 29) && (year % 100 == 0))
-            {
+            if ((month == 2) && (day == 29) && (year % 100 == 0)) {
                 return false;
             }
-            if ((month == 2) && (day == 29) && (year % 4 == 0))
-            {
+            if ((month == 2) && (day == 29) && (year % 4 == 0)) {
                 return true;
             }
-            if (year > 2050)
-            {
+            if (year > 2050) {
                 return false;
             }
             return true;
@@ -54,14 +45,12 @@ namespace utils
         bool validateDate(std::string day, std::string month, std::string year)
         {
             uint32_t d = 0, m = 0, y = 0;
-            try
-            {
+            try {
                 d = std::stoi(day);
                 m = std::stoi(month);
                 y = std::stoi(year);
             }
-            catch (std::exception &e)
-            {
+            catch (std::exception &e) {
                 return false;
             }
             return validateDate(d, m, y);
@@ -70,13 +59,11 @@ namespace utils
         bool validateTime(std::string hour, std::string minute, bool mode12h)
         {
             uint32_t m = 0, h = 0;
-            try
-            {
+            try {
                 h = std::stoi(hour);
                 m = std::stoi(minute);
             }
-            catch (std::exception &e)
-            {
+            catch (std::exception &e) {
                 LOG_INFO("validateTime exception");
                 return false;
             }
@@ -86,21 +73,17 @@ namespace utils
         {
 
             auto hourMax = 0;
-            if (mode12h)
-            {
+            if (mode12h) {
                 hourMax = 12;
             }
-            else
-            {
+            else {
                 hourMax = 23;
             }
 
-            if (hour > hourMax)
-            {
+            if (hour > hourMax) {
                 return false;
             }
-            if (minute > 59)
-            {
+            if (minute > 59) {
                 return false;
             }
             return true;
diff --git a/module-utils/time/time_locale.hpp b/module-utils/time/time_locale.hpp
index 728e13df3..f9ba0b537 100644
--- a/module-utils/time/time_locale.hpp
+++ b/module-utils/time/time_locale.hpp
@@ -5,92 +5,132 @@
 #include <i18/i18.hpp>
 #include <log/log.hpp>
 
-namespace utils {
-namespace time {
-
-class Locale;
-
-extern Locale tlocale;
-
-class Locale {
-    static const int num_days = 7;
-    static const int num_monts = 12;
-    static const int num_formatters = 4;
-    // imo it would be nicer to have datetime locales in different json with thiny bit nicer and more effective getters
-    const std::array<std::string, num_days> days = {
-        "common_monday",   "common_tuesday", "common_wendesday",
-        "common_thursday", "common_friday",  "common_saturday",
-        "common_sunday"};
-
-    const std::array<std::string, num_monts> months = {
-        "common_january", "common_february", "common_march",
-        "common_april",   "common_may",      "common_june",
-        "common_july",    "common_august",   "common_september",
-        "common_october", "common_november", "common_december"};
-
-    const std::array<std::string, num_formatters> time_formats {
-        "locale_12hour_min",
-        "locale_24hour_min",
-        "locale_date_full",
-        "locale_date_short",
-    };
-
-    const std::string ltoday = "common_today";
-    const std::string lyesterday = "common_yesterday";
-    const std::string ltimezone  = "common_timezone";
-
-  public:
-
-    enum Day { Mon = 0, Tue, Wed, Thu, Fri, Sat, Sun, };
-
-    enum Month { Jan = 0, Feb, Mar, Apr, May, Jun, Jul, Aug, Sept, Oct, Now, Dec };
-
-    enum TimeFormat
+namespace utils
+{
+    namespace time
     {
-        FormatTime12H = 0,     // H:M in 12h format
-        FormatTime24H,         // H:M in 24h format
-        FormatLocaleDateFull,  // format locale specified format
-        FormatLocaleDateShort, // format locale specified format
-    };
 
-    // this could return variant<bool, UTF8> -> on error -> false -> visit -> handle defaults
-    static const UTF8 get_day(enum Day day) {
-        if (day >= num_days || day < 0) {
-            LOG_ERROR("Bad value: %d", day);
-            return "";
-        } else {
-            return localize.get(tlocale.days[day]);
-        }
-    }
+        class Locale;
 
-    static const UTF8 get_month(enum Month mon) {
-        if (mon >= num_monts || mon < 0) {
-            LOG_ERROR("Bad value %d", mon);
-            return "";
-        } else {
-            return localize.get(tlocale.months[mon]);
-        }
-    }
+        extern Locale tlocale;
 
-    static const UTF8 yesterday()
-    {
-        return localize.get(tlocale.lyesterday);
-    }
+        class Locale
+        {
+            static const int num_days       = 7;
+            static const int num_monts      = 12;
+            static const int num_formatters = 4;
+            // imo it would be nicer to have datetime locales in different json with thiny bit nicer and more effective
+            // getters
+            const std::array<std::string, num_days> days = {"common_monday",
+                                                            "common_tuesday",
+                                                            "common_wendesday",
+                                                            "common_thursday",
+                                                            "common_friday",
+                                                            "common_saturday",
+                                                            "common_sunday"};
 
-    static const UTF8 today()
-    {
-        return localize.get(tlocale.ltoday);
-    }
+            const std::array<std::string, num_monts> months = {"common_january",
+                                                               "common_february",
+                                                               "common_march",
+                                                               "common_april",
+                                                               "common_may",
+                                                               "common_june",
+                                                               "common_july",
+                                                               "common_august",
+                                                               "common_september",
+                                                               "common_october",
+                                                               "common_november",
+                                                               "common_december"};
 
-    static const std::string format(enum TimeFormat what) {
-        if(what >= num_formatters || what < 0 ) {
-            LOG_ERROR("Bad value: %d", what);
-            return "⌚";
-        }
-        return localize.get(tlocale.time_formats[what]);
-    }
-};
+            const std::array<std::string, num_formatters> time_formats{
+                "locale_12hour_min",
+                "locale_24hour_min",
+                "locale_date_full",
+                "locale_date_short",
+            };
 
+            const std::string ltoday     = "common_today";
+            const std::string lyesterday = "common_yesterday";
+            const std::string ltimezone  = "common_timezone";
 
-}; // time
-}; // utils
+          public:
+            enum Day
+            {
+                Mon = 0,
+                Tue,
+                Wed,
+                Thu,
+                Fri,
+                Sat,
+                Sun,
+            };
+
+            enum Month
+            {
+                Jan = 0,
+                Feb,
+                Mar,
+                Apr,
+                May,
+                Jun,
+                Jul,
+                Aug,
+                Sept,
+                Oct,
+                Now,
+                Dec
+            };
+
+            enum TimeFormat
+            {
+                FormatTime12H = 0,     // H:M in 12h format
+                FormatTime24H,         // H:M in 24h format
+                FormatLocaleDateFull,  // format locale specified format
+                FormatLocaleDateShort, // format locale specified format
+            };
+
+            // this could return variant<bool, UTF8> -> on error -> false -> visit -> handle defaults
+            static const UTF8 get_day(enum Day day)
+            {
+                if (day >= num_days || day < 0) {
+                    LOG_ERROR("Bad value: %d", day);
+                    return "";
+                }
+                else {
+                    return localize.get(tlocale.days[day]);
+                }
+            }
+
+            static const UTF8 get_month(enum Month mon)
+            {
+                if (mon >= num_monts || mon < 0) {
+                    LOG_ERROR("Bad value %d", mon);
+                    return "";
+                }
+                else {
+                    return localize.get(tlocale.months[mon]);
+                }
+            }
+
+            static const UTF8 yesterday()
+            {
+                return localize.get(tlocale.lyesterday);
+            }
+
+            static const UTF8 today()
+            {
+                return localize.get(tlocale.ltoday);
+            }
+
+            static const std::string format(enum TimeFormat what)
+            {
+                if (what >= num_formatters || what < 0) {
+                    LOG_ERROR("Bad value: %d", what);
+                    return "⌚";
+                }
+                return localize.get(tlocale.time_formats[what]);
+            }
+        };
+
+    }; // namespace time
+};     // namespace utils
diff --git a/module-utils/ucs2/UCS2.cpp b/module-utils/ucs2/UCS2.cpp
index 282365cd3..d353f1844 100644
--- a/module-utils/ucs2/UCS2.cpp
+++ b/module-utils/ucs2/UCS2.cpp
@@ -16,149 +16,157 @@
 
 const uint32_t UCS2::ucs2bufferExt = 16;
 
-UCS2::UCS2(void) {
-	sizeUsed = 0;
-	sizeAllocated = ucs2bufferExt;
-	buffer = new uint16_t[ucs2bufferExt];
-	length = 0;
+UCS2::UCS2(void)
+{
+    sizeUsed      = 0;
+    sizeAllocated = ucs2bufferExt;
+    buffer        = new uint16_t[ucs2bufferExt];
+    length        = 0;
 }
 
-UCS2::~UCS2() {
+UCS2::~UCS2()
+{
 
     delete[] buffer;
 }
 
-UCS2::UCS2(const UTF8 &string) {
-	this->clear();
+UCS2::UCS2(const UTF8 &string)
+{
+    this->clear();
 
-	for (uint32_t i = 0; i < string.length(); i++) {
-		uint32_t decodedSize;
-		uint32_t utfChar = string[i];
+    for (uint32_t i = 0; i < string.length(); i++) {
+        uint32_t decodedSize;
+        uint32_t utfChar = string[i];
 
-//		LOG_INFO("decoded uft %x", ucs2char);
-		if (0xffff0000 & utfChar) {
-			sizeUsed = 0;
-			length = 0;
-			LOG_ERROR(
-					"UCS2::UCS2(const UTF8& string) failed, provided char is out of range");
-			break;
-		}
+        //		LOG_INFO("decoded uft %x", ucs2char);
+        if (0xffff0000 & utfChar) {
+            sizeUsed = 0;
+            length   = 0;
+            LOG_ERROR("UCS2::UCS2(const UTF8& string) failed, provided char is out of range");
+            break;
+        }
 
-		append(static_cast<uint16_t>(utfChar));
-	}
+        append(static_cast<uint16_t>(utfChar));
+    }
 }
 
-UCS2::UCS2(const std::string &string) {
-	sizeUsed = 0;
-	sizeAllocated = ucs2bufferExt;
-	buffer = new uint16_t[ucs2bufferExt];
-	length = 0;
+UCS2::UCS2(const std::string &string)
+{
+    sizeUsed      = 0;
+    sizeAllocated = ucs2bufferExt;
+    buffer        = new uint16_t[ucs2bufferExt];
+    length        = 0;
 
-	for (unsigned int i = 0; i < string.size() / 4; i++) {
-		uint16_t ucs2char;
-		try {
-			ucs2char = std::stoi(string.substr(i * 4, 4), 0, 16);
-		} catch (std::invalid_argument &e) {
-			LOG_ERROR("UCS2::UCS2(const std::string& string) failed.");
-			this->clear();
-		} catch (std::out_of_range &e) {
-			this->clear();
-			LOG_ERROR("UCS2::UCS2(const std::string& string) failed.");
-		}
-		if (0xffff0000 & ucs2char) {
-			this->clear();
-			LOG_ERROR(
-					"UCS2::UCS2(const UTF8& string) failed, provided char is out of range");
-			//break;
-		}
-		append(static_cast<uint16_t>(ucs2char));
-	}
-
-	//terminate ucs2 string by 0
-	append(0);
+    for (unsigned int i = 0; i < string.size() / 4; i++) {
+        uint16_t ucs2char;
+        try {
+            ucs2char = std::stoi(string.substr(i * 4, 4), 0, 16);
+        }
+        catch (std::invalid_argument &e) {
+            LOG_ERROR("UCS2::UCS2(const std::string& string) failed.");
+            this->clear();
+        }
+        catch (std::out_of_range &e) {
+            this->clear();
+            LOG_ERROR("UCS2::UCS2(const std::string& string) failed.");
+        }
+        if (0xffff0000 & ucs2char) {
+            this->clear();
+            LOG_ERROR("UCS2::UCS2(const UTF8& string) failed, provided char is out of range");
+            // break;
+        }
+        append(static_cast<uint16_t>(ucs2char));
+    }
 
+    // terminate ucs2 string by 0
+    append(0);
 }
-UCS2::UCS2(UCS2 &ucs) {
-	sizeUsed = 0;
-	sizeAllocated = ucs2bufferExt;
-	buffer = new uint16_t[ucs2bufferExt];
-	length = 0;
+UCS2::UCS2(UCS2 &ucs)
+{
+    sizeUsed      = 0;
+    sizeAllocated = ucs2bufferExt;
+    buffer        = new uint16_t[ucs2bufferExt];
+    length        = 0;
 
-	this->sizeUsed = ucs.getSizeUsed();
-	this->sizeAllocated = ucs.getSizeAlocated();
-	this->length = ucs.getLength();
-	this->buffer = new uint16_t[sizeAllocated];
-	memset(buffer, 0, sizeAllocated);
-	memcpy(buffer, ucs.getData(), sizeUsed);
+    this->sizeUsed      = ucs.getSizeUsed();
+    this->sizeAllocated = ucs.getSizeAlocated();
+    this->length        = ucs.getLength();
+    this->buffer        = new uint16_t[sizeAllocated];
+    memset(buffer, 0, sizeAllocated);
+    memcpy(buffer, ucs.getData(), sizeUsed);
 }
 
-UTF8 UCS2::toUTF8(void) {
-	if (this->length == 0)
-		return UTF8();
+UTF8 UCS2::toUTF8(void)
+{
+    if (this->length == 0)
+        return UTF8();
 
-	//create buffer for worst case scenario which is that every char will take 3 bytes in utf8 string
-	// + 1 for null terminator
+    // create buffer for worst case scenario which is that every char will take 3 bytes in utf8 string
+    // + 1 for null terminator
 
-	uint8_t *buffer = new uint8_t[3 * this->length + 1];
-	memset(buffer, 0, 3 * this->length + 1);
+    uint8_t *buffer = new uint8_t[3 * this->length + 1];
+    memset(buffer, 0, 3 * this->length + 1);
 
-	uint32_t offset = 0;
-	for (uint32_t i = 0; i < this->length; i++) {
-		uint32_t c = this->buffer[i];
-
-		//check if character must occupy 3 bytes
-		if (c > 0x07ff) {
-			buffer[offset++] = (0x00E0 | ((c & 0xF000) >> 12));
-			buffer[offset++] = (0x0080 | ((c & 0x0FC0) >> 6));
-			buffer[offset++] = (0x0080 | (c & 0x003F));
-		}
-		//check if character must occupy 2 bytes
-		else if (c > 0x07f) {
-			buffer[offset++] = (0x00C0 | ((c & 0x07C0) >> 6));
-			buffer[offset++] = (0x0080 | (c & 0x003F));
-		} else {
-			buffer[offset++] = c;
-		}
-	}
-	UTF8 retString(reinterpret_cast<const char*>(buffer));
-	delete[] buffer;
-	return retString;
+    uint32_t offset = 0;
+    for (uint32_t i = 0; i < this->length; i++) {
+        uint32_t c = this->buffer[i];
 
+        // check if character must occupy 3 bytes
+        if (c > 0x07ff) {
+            buffer[offset++] = (0x00E0 | ((c & 0xF000) >> 12));
+            buffer[offset++] = (0x0080 | ((c & 0x0FC0) >> 6));
+            buffer[offset++] = (0x0080 | (c & 0x003F));
+        }
+        // check if character must occupy 2 bytes
+        else if (c > 0x07f) {
+            buffer[offset++] = (0x00C0 | ((c & 0x07C0) >> 6));
+            buffer[offset++] = (0x0080 | (c & 0x003F));
+        }
+        else {
+            buffer[offset++] = c;
+        }
+    }
+    UTF8 retString(reinterpret_cast<const char *>(buffer));
+    delete[] buffer;
+    return retString;
 }
 
-void UCS2::append(const uint16_t &ucs2char) {
-	// check if buffer needs to be expanded
-	if (sizeUsed == sizeAllocated) {
-		uint16_t *newBuffer = new uint16_t[sizeAllocated + ucs2bufferExt];
-		memset(newBuffer, 0, sizeAllocated + ucs2bufferExt);
-		memcpy(newBuffer, buffer, sizeAllocated);
-		delete[] buffer;
-		buffer = newBuffer;
-		sizeAllocated = sizeAllocated + ucs2bufferExt;
-	}
-	//write character to the end of buffer, increment size and add 2 to used bytes ( usc2 character is two byte )
-	buffer[length] = ucs2char;
-	length++;
-	sizeUsed += 2;
+void UCS2::append(const uint16_t &ucs2char)
+{
+    // check if buffer needs to be expanded
+    if (sizeUsed == sizeAllocated) {
+        uint16_t *newBuffer = new uint16_t[sizeAllocated + ucs2bufferExt];
+        memset(newBuffer, 0, sizeAllocated + ucs2bufferExt);
+        memcpy(newBuffer, buffer, sizeAllocated);
+        delete[] buffer;
+        buffer        = newBuffer;
+        sizeAllocated = sizeAllocated + ucs2bufferExt;
+    }
+    // write character to the end of buffer, increment size and add 2 to used bytes ( usc2 character is two byte )
+    buffer[length] = ucs2char;
+    length++;
+    sizeUsed += 2;
 }
 
-std::string UCS2::modemStr(void) {
-	std::stringstream ss;
+std::string UCS2::modemStr(void)
+{
+    std::stringstream ss;
 
-	for (uint32_t i = 0; i < length; i++) {
-		ss << std::setw(4) << std::setfill('0') << std::hex << std::uppercase;
-		ss << buffer[i];
-	}
+    for (uint32_t i = 0; i < length; i++) {
+        ss << std::setw(4) << std::setfill('0') << std::hex << std::uppercase;
+        ss << buffer[i];
+    }
 
-	return ss.str();
+    return ss.str();
 }
 
-void UCS2::clear(void) {
-	sizeUsed = 0;
-	sizeAllocated = ucs2bufferExt;
+void UCS2::clear(void)
+{
+    sizeUsed      = 0;
+    sizeAllocated = ucs2bufferExt;
 
-		delete[] buffer;
+    delete[] buffer;
 
-	buffer = new uint16_t[ucs2bufferExt];
-	length = 0;
+    buffer = new uint16_t[ucs2bufferExt];
+    length = 0;
 }
diff --git a/module-utils/ucs2/UCS2.hpp b/module-utils/ucs2/UCS2.hpp
index 3d9082eb3..0901d6ea2 100644
--- a/module-utils/ucs2/UCS2.hpp
+++ b/module-utils/ucs2/UCS2.hpp
@@ -11,57 +11,71 @@
 #include <cstdint>
 #include "utf8/UTF8.hpp"
 
-
-class UCS2{
-private:
-    //pointer to memory where ucs2 characters are stored.
-    uint16_t* buffer = nullptr;
-    //size in bytes of memory that was allcated to the buffer
-	uint32_t sizeAllocated = 0;
-	//size in bytes of memory used in buffer
-	uint32_t sizeUsed = 0;
-    //number of characters in the string. its equal to size of allocated memory plus null terminator
+class UCS2
+{
+  private:
+    // pointer to memory where ucs2 characters are stored.
+    uint16_t *buffer = nullptr;
+    // size in bytes of memory that was allcated to the buffer
+    uint32_t sizeAllocated = 0;
+    // size in bytes of memory used in buffer
+    uint32_t sizeUsed = 0;
+    // number of characters in the string. its equal to size of allocated memory plus null terminator
     uint32_t length = 0;
     //
     static const uint32_t ucs2bufferExt;
     void clear(void);
-public:
-    //default constructor
+
+  public:
+    // default constructor
     UCS2(void);
     //
-//    UCS2( uint16_t* text);
+    //    UCS2( uint16_t* text);
     /*
      * @brief Initializes new ucs2 string from utf8 string. It's used to convert text from
      * utf8 to ucs2.
      * @param string utf8 string to convert
      */
-    UCS2(const UTF8& string);
+    UCS2(const UTF8 &string);
     /*
-	 * @brief Initializes new ucs2 string from std::string. It's used to convert text from
-	 * modem message format to ucs2.
-	 * @param string std::string to convert
-	 */
-    UCS2(const std::string& string);
-    UCS2(UCS2& ucs);
+     * @brief Initializes new ucs2 string from std::string. It's used to convert text from
+     * modem message format to ucs2.
+     * @param string std::string to convert
+     */
+    UCS2(const std::string &string);
+    UCS2(UCS2 &ucs);
     ~UCS2(void);
-    const char* c_str(void){ return reinterpret_cast<const char*>(buffer);}
+    const char *c_str(void)
+    {
+        return reinterpret_cast<const char *>(buffer);
+    }
     /*
      * @brief It's converting ucs2 to utf string.
      * @return utf8 string
      */
     UTF8 toUTF8(void);
-    void append(const uint16_t& ucs2char);
+    void append(const uint16_t &ucs2char);
     /*
-	 * @brief It's converting text coded in ucs2 to string. Used to send data to modem.
-	 * @return coded string
-	 */
+     * @brief It's converting text coded in ucs2 to string. Used to send data to modem.
+     * @return coded string
+     */
     std::string modemStr(void);
-    uint32_t getLength(void) { return length; };
-    uint32_t getSizeUsed(void) { return sizeUsed; };
-	uint32_t getSizeAlocated(void) { return sizeAllocated; };
-	uint16_t* getData(void) {return buffer; };
+    uint32_t getLength(void)
+    {
+        return length;
+    };
+    uint32_t getSizeUsed(void)
+    {
+        return sizeUsed;
+    };
+    uint32_t getSizeAlocated(void)
+    {
+        return sizeAllocated;
+    };
+    uint16_t *getData(void)
+    {
+        return buffer;
+    };
 };
 
-
-
 #endif /* MODULE_UTILS_UCS2_UCS2_HPP_ */
diff --git a/module-utils/utf8/UTF8.cpp b/module-utils/utf8/UTF8.cpp
index e394e964c..5d5c5749d 100644
--- a/module-utils/utf8/UTF8.cpp
+++ b/module-utils/utf8/UTF8.cpp
@@ -10,55 +10,60 @@
 #include "UTF8.hpp"
 #include "log/log.hpp"
 
-static uint8_t UTF8_EXT           = 0x80;  //1000 0000
-static uint8_t UTF8_EXT_MASK      = 0xC0;  //1100 0000
-static uint8_t UTF8_HEADER_1      = 0x00;  //0000 0000
-static uint8_t UTF8_HEADER_1_MASK = 0x80;  //1000 0000
-static uint8_t UTF8_HEADER_2      = 0xC0;  //1100 0000
-static uint8_t UTF8_HEADER_2_MASK = 0xE0;  //1110 0000
-static uint8_t UTF8_HEADER_3      = 0xE0;  //1110 0000
-static uint8_t UTF8_HEADER_3_MASK = 0xF0;  //1111 0000
-static uint8_t UTF8_HEADER_4      = 0xF0;  //1111 0000
-static uint8_t UTF8_HEADER_4_MASK = 0xF8;  //1111 1000
+static uint8_t UTF8_EXT           = 0x80; // 1000 0000
+static uint8_t UTF8_EXT_MASK      = 0xC0; // 1100 0000
+static uint8_t UTF8_HEADER_1      = 0x00; // 0000 0000
+static uint8_t UTF8_HEADER_1_MASK = 0x80; // 1000 0000
+static uint8_t UTF8_HEADER_2      = 0xC0; // 1100 0000
+static uint8_t UTF8_HEADER_2_MASK = 0xE0; // 1110 0000
+static uint8_t UTF8_HEADER_3      = 0xE0; // 1110 0000
+static uint8_t UTF8_HEADER_3_MASK = 0xF0; // 1111 0000
+static uint8_t UTF8_HEADER_4      = 0xF0; // 1111 0000
+static uint8_t UTF8_HEADER_4_MASK = 0xF8; // 1111 1000
 
-static bool UTF8_CHAR_IS_1BYTE( const char* pc) {
-	return ((pc[0] & UTF8_HEADER_1_MASK) == UTF8_HEADER_1 ); }
-
-static bool UTF8_CHAR_IS_INNER( const char& c) {
-	return ((((uint8_t)c) & UTF8_EXT_MASK) == UTF8_EXT); }
-
-static bool UTF8_CHAR_IS_2BYTE(const char* pc) {
-	return (((pc)[0] & UTF8_HEADER_2_MASK) == UTF8_HEADER_2 ) &&
-		UTF8_CHAR_IS_INNER((pc)[1]); }
-
-static bool UTF8_CHAR_IS_3BYTE(const char* pc) {
-	return (((pc)[0] & UTF8_HEADER_3_MASK) == UTF8_HEADER_3) &&
-		UTF8_CHAR_IS_INNER((pc)[1]) &&
-		UTF8_CHAR_IS_INNER((pc)[2]); }
-
-static bool UTF8_CHAR_IS_4BYTE(const char* pc) {
-	return (((pc)[0] & UTF8_HEADER_4_MASK) == UTF8_HEADER_4) &&
-		UTF8_CHAR_IS_INNER((pc)[1]) &&
-		UTF8_CHAR_IS_INNER((pc)[2]) &&
-		UTF8_CHAR_IS_INNER((pc)[3]); }
-
-static inline uint32_t charLength( const char* utf8Char )
+static bool UTF8_CHAR_IS_1BYTE(const char *pc)
 {
-	uint32_t ret = 0;
-    //check if provided char is standars US-ASCII character. 0xxxxxxx
-    if( UTF8_CHAR_IS_1BYTE( utf8Char ) )
-    {
+    return ((pc[0] & UTF8_HEADER_1_MASK) == UTF8_HEADER_1);
+}
+
+static bool UTF8_CHAR_IS_INNER(const char &c)
+{
+    return ((((uint8_t)c) & UTF8_EXT_MASK) == UTF8_EXT);
+}
+
+static bool UTF8_CHAR_IS_2BYTE(const char *pc)
+{
+    return (((pc)[0] & UTF8_HEADER_2_MASK) == UTF8_HEADER_2) && UTF8_CHAR_IS_INNER((pc)[1]);
+}
+
+static bool UTF8_CHAR_IS_3BYTE(const char *pc)
+{
+    return (((pc)[0] & UTF8_HEADER_3_MASK) == UTF8_HEADER_3) && UTF8_CHAR_IS_INNER((pc)[1]) &&
+           UTF8_CHAR_IS_INNER((pc)[2]);
+}
+
+static bool UTF8_CHAR_IS_4BYTE(const char *pc)
+{
+    return (((pc)[0] & UTF8_HEADER_4_MASK) == UTF8_HEADER_4) && UTF8_CHAR_IS_INNER((pc)[1]) &&
+           UTF8_CHAR_IS_INNER((pc)[2]) && UTF8_CHAR_IS_INNER((pc)[3]);
+}
+
+static inline uint32_t charLength(const char *utf8Char)
+{
+    uint32_t ret = 0;
+    // check if provided char is standars US-ASCII character. 0xxxxxxx
+    if (UTF8_CHAR_IS_1BYTE(utf8Char)) {
         return 1;
     }
-    if( UTF8_CHAR_IS_2BYTE( utf8Char ) ) //characters number is written on 2 bytes 110xxxxx 10xxxxxx
+    if (UTF8_CHAR_IS_2BYTE(utf8Char)) // characters number is written on 2 bytes 110xxxxx 10xxxxxx
     {
         return 2;
     }
-    if( UTF8_CHAR_IS_3BYTE( utf8Char ) ) //characters number is written on 3 bytes. 1110xxxx 10xxxxxx 10xxxxxx
+    if (UTF8_CHAR_IS_3BYTE(utf8Char)) // characters number is written on 3 bytes. 1110xxxx 10xxxxxx 10xxxxxx
     {
         return 3;
     }
-    if( UTF8_CHAR_IS_4BYTE( utf8Char ) ) //characters number is written on 3 bytes. 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
+    if (UTF8_CHAR_IS_4BYTE(utf8Char)) // characters number is written on 3 bytes. 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
     {
         return 4;
     }
@@ -66,721 +71,724 @@ static inline uint32_t charLength( const char* utf8Char )
     return ret;
 }
 
-const char* UTF8::emptyString = "";
+const char *UTF8::emptyString        = "";
 const uint32_t UTF8::stringExpansion = 32;
 
-UTF8::UTF8() :
-	data{ new uint8_t[stringExpansion] },
-	sizeAllocated{stringExpansion},
-	sizeUsed{1},
-	strLength{0},
-	lastIndex{0},
-	lastIndexData{data}
-#ifdef BUILD_GTEST_TESTS
-	, operator_index_iterations{0}
-	#endif
-	{
-		if( data != nullptr ) {
-			memset( data, 0, sizeAllocated );
-		}
-}
-
-UTF8::UTF8( const char* str ) {
-	//bufferSize increased by 1 to ensure ending 0 in new string
-	sizeUsed = strlen(str) + 1 ;
-	sizeAllocated = getDataBufferSize( sizeUsed );
-	data = new uint8_t[sizeAllocated];
-	if( data != nullptr ) {
-		memset( data, 0, sizeAllocated );
-		memcpy( data, str, sizeUsed );
-		lastIndexData = data;
-	}
-	strLength = getCharactersCount( reinterpret_cast<const char*>(data) );
-	lastIndex = 0;
-#ifdef BUILD_GTEST_TESTS
-	operator_index_iterations = 0;
-#endif
-}
-
-UTF8::UTF8( const std::string& str ) {
-	//bufferSize increased by 1 to ensure ending 0 in new string
-	sizeUsed = str.length() + 1;
-	sizeAllocated = getDataBufferSize( sizeUsed );
-	data = new uint8_t[sizeAllocated];
-	if( data != nullptr ) {
-		memset( data, 0, sizeAllocated );
-		memcpy( data, str.c_str(), sizeUsed );
-		lastIndexData = data;
-	}
-	strLength = getCharactersCount( reinterpret_cast<const char*>(data) );
-	lastIndex = 0;
-#ifdef BUILD_GTEST_TESTS
-	operator_index_iterations = 0;
-#endif
-}
-
-UTF8::UTF8( const UTF8& utf ) {
-	strLength = utf.strLength;
-	sizeAllocated = utf.sizeAllocated;
-	sizeUsed = utf.sizeUsed;
-
-	//if there is any data used in the string allocate memory and copy usedSize bytes
-	if( strLength ) {
-		data = new uint8_t[sizeAllocated];
-		if( data == nullptr ) {
-			//LOG_FATAL("No memory for copy constructor.");
-			sizeAllocated = 0;
-			sizeUsed = 0;
-			return;
-		}
-		memcpy( data, utf.data, sizeAllocated );
-	}
-	else {
-		sizeAllocated = stringExpansion;
-		data = new uint8_t[sizeAllocated];
-		memset(data,0,sizeAllocated);
-		sizeUsed = 1;
-	}
-	lastIndex = 0;
-	lastIndexData = data;
-#ifdef BUILD_GTEST_TESTS
-	operator_index_iterations = 0;
-#endif
-}
-
-UTF8::UTF8( const uint8_t* data, const uint32_t allocated, const uint32_t used, const uint32_t len ) :
-	sizeAllocated{allocated},
-	sizeUsed{used},
-	strLength{len},
-	lastIndex{0}{
-	this->data = new uint8_t[allocated];
-	if( this->data == nullptr ) {
-		sizeAllocated = 0;
-		sizeUsed = 0;
-		strLength = 0;
-		return;
-	}
-	memcpy( this->data, data, allocated );
-	lastIndexData = this->data;
-#ifdef BUILD_GTEST_TESTS
-	operator_index_iterations = 0;
-#endif
-}
-
-UTF8::~UTF8() {
-	if( data )
-		delete [] data;
-}
-
-bool UTF8::expand( uint32_t size ) {
-
-	uint32_t newSizeAllocated = getDataBufferSize( sizeAllocated + size );
-	uint8_t* newData = new uint8_t[newSizeAllocated];
-
-	if( newData != nullptr ) {
-
-		memcpy( newData, data, sizeUsed );
-		memset( newData + sizeUsed, 0, newSizeAllocated - sizeUsed );
-
-		delete [] data;
-		data = newData;
-		sizeAllocated = newSizeAllocated;
-		lastIndex = 0;
-		lastIndexData = data;
-		return true;
-	}
-	return false;
-}
-
-uint32_t UTF8::getDataBufferSize( uint32_t dataBytes ){
-	return ( ( ( dataBytes ) / stringExpansion ) + 1 ) * stringExpansion;
-}
-
-bool UTF8::getStreamLength( const char* stream, uint32_t& size, uint32_t& count ) {
-	size = 0;
-	count = 0;
-	while( (*stream) != 0 ){
-		//calculate individual char's byte length.
-		int32_t byte_length = charLength( stream);
-		//if char is valid add length and increment pointer
-		if( byte_length > 0 )
-		{
-			size += byte_length;
-			++count;
-			stream += byte_length;
-		}
-		else {
-			size = 0;
-			count = 0;
-			return false;
-		}
-	}
-	return true;
-}
-
-UTF8& UTF8::operator=( const UTF8& utf ) {
-
-	//prevent from making assignment to itself
-	if( this == &utf ) {
-		return *this;
-	}
-
-	sizeAllocated = utf.sizeAllocated;
-	sizeUsed = utf.sizeUsed;
-	strLength = utf.strLength;
-
-	if( data )
-		delete[] data;
-
-	data = new uint8_t[sizeAllocated];
-	memcpy( data, utf.data, sizeAllocated );
-
-	lastIndex = 0;
-	lastIndexData = data;
-
-	return *this;
-}
-
-UTF8& UTF8::operator= ( UTF8&& utf ) noexcept {
-	//prevent moving if object is moved to itself
-	if( this != &utf ) {
-		if( data )
-			delete[] data;
-		data = utf.data;
-		utf.data = nullptr;
-		sizeAllocated = utf.sizeAllocated;
-		sizeUsed = utf.sizeUsed;
-		strLength = utf.strLength;
-	}
-	return *this;
-}
-
-uint32_t UTF8::operator[]( const uint32_t& idx ) const{
-
-	if(idx >= strLength)
-		return 0;
-
-	uint8_t* dataPtr;
-	uint32_t charCnt = 0;
-	if(lastIndex < idx){
-		dataPtr = lastIndexData;
-		charCnt = lastIndex;
-	}
-	else{
-		dataPtr = data;
-		charCnt = 0;
-	}
-#ifdef BUILD_GTEST_TESTS
-	operator_index_iterations = 0;
-#endif
-	while(charCnt != idx)
-	{
-		dataPtr += charLength(reinterpret_cast<const char*>(dataPtr));
-		charCnt++;
-#ifdef BUILD_GTEST_TESTS
-		operator_index_iterations++;
-#endif
-	}
-
-	lastIndex = charCnt;
-	lastIndexData = dataPtr;
-
-	uint32_t dummy;
-	uint32_t retValue = decode( reinterpret_cast<const char*>(dataPtr), dummy );
-	return retValue;
-}
-
-UTF8 UTF8::operator+( const UTF8& utf ) {
-	//this will call copy constructor and operator += on created copy.
-	return UTF8(*this)+=utf;
-}
-
-UTF8& UTF8::operator+=( const UTF8& utf ) {
-
-	if( utf.strLength == 0 )
-		return *this;
-
-	uint32_t newSizeAllocated = getDataBufferSize( sizeUsed + utf.sizeUsed );
-	uint8_t* newData = new uint8_t[newSizeAllocated];
-	if( newData != nullptr ) {
-
-		memcpy( newData, data, sizeUsed );
-		//-1 comes from the fact that null terminator is counted as a used byte in string's buffer.
-		memcpy( newData + sizeUsed - 1, utf.data, utf.sizeUsed );
-		delete [] data;
-		data = newData;
-		sizeAllocated = newSizeAllocated;
-		strLength += utf.strLength;
-		//-1 is to ignore double null terminator as it is counted in sizeUsed
-		sizeUsed += utf.sizeUsed-1;
-		lastIndex = 0;
-		lastIndexData = data;
-	}
-	return *this;
-}
-
-bool UTF8::operator==( const UTF8& utf ) const {
-	uint32_t len = strLength - utf.strLength;
-	uint32_t used = sizeUsed - utf.sizeUsed;
-	if( (len | used) == 0 ){
-		return !memcmp( data, utf.data, sizeUsed );
-	}
-	return false;
-}
-
-const char* UTF8::c_str() const {
-	return reinterpret_cast<const char*>(data);
-}
-
-void UTF8::clear() {
-
-	if( data )
-		delete data;
-
-	data = new uint8_t[stringExpansion];
-	sizeAllocated = stringExpansion;
-	sizeUsed = 1;
-	strLength = 0;
-	lastIndex = 0;
-	lastIndexData = data;
-}
-
-UTF8 UTF8::substr( const uint32_t begin, const uint32_t length) const {
-
-	if( ( begin + length > this->length() ) ||
-        ( length == 0) )
-		return UTF8();
-
-	uint8_t* beginPtr = this->data;
-	uint8_t* endPtr;
-
-	uint32_t bufferSize = 0;
-	uint32_t strCounter = 0;
-	//find pointer to begin char
-	while(strCounter != begin)
-	{
-		beginPtr += charLength(reinterpret_cast<const char*>(beginPtr));
-		strCounter++;
-	}
-	//find pinter to end char
-	endPtr = beginPtr;
-	for(strCounter = 0; strCounter < length; strCounter++)
-	{
-		uint32_t charSize = 0;
-		charSize = charLength(reinterpret_cast<const char*>(endPtr));
-		endPtr += charSize;
-		bufferSize += charSize;
-	}
-	//copy data to buffer
-	//bufferSize increased by 1 to ensure ending 0 in new string
-	uint8_t* buffer = new uint8_t[bufferSize + 1];
-	memset(buffer, 0, bufferSize + 1);
-	memcpy(buffer, beginPtr, bufferSize);
-
-	UTF8 retString = UTF8(reinterpret_cast<const char*>(buffer));
-	delete [] buffer;
-
-	return retString;
-}
-
-int32_t UTF8::find(const char* s, uint32_t pos)
+UTF8::UTF8()
+    : data{new uint8_t[stringExpansion]}, sizeAllocated{stringExpansion}, sizeUsed{1}, strLength{0}, lastIndex{0},
+      lastIndexData
 {
-	uint32_t stringCount;
-	uint32_t stringSize;
-
-	getStreamLength(s, stringSize, stringCount);
-
-	if( ( stringCount == 0 ) && ( s[0] != 0 ) )
-	{
-		LOG_ERROR( "corrupted string" );
-		return npos;
-	}
-
-	if( pos + stringCount >= this->length())
-		return npos;
-
-	uint32_t position = 0;
-	uint8_t* dataPtr = this->data;
-
-	for( position = 0; position < pos; position++ )
-	{
-		dataPtr += charLength(reinterpret_cast<const char*>(dataPtr));
-	}
-
-	for(position = pos; position < this->length(); position++)
-	{
-
-		if( memcmp(dataPtr, s, stringSize) == 0 )
-			return static_cast<int32_t>(position);
-		dataPtr += charLength(reinterpret_cast<const char*>(dataPtr));
-	}
-	return npos;
+    data
 }
-
-int32_t UTF8::findLast(const char* s, uint32_t pos)
+#ifdef BUILD_GTEST_TESTS
+, operator_index_iterations
 {
-	uint32_t stringCount;
-	uint32_t stringSize;
-
-	getStreamLength(s, stringSize, stringCount);
-	//check input substring
-	if( ( stringCount == 0 ) && ( s[0] != 0 ) )
-	{
-		LOG_ERROR( "corrupted string" );
-		return npos;
-	}
-	//check if pos is in range of source string
-	if( pos > this->length())
-		return npos;
-
-	if(pos < stringCount - 1)
-		return npos;
-
-	uint32_t position = 0;
-	uint8_t* dataPtr = this->data;
-	int32_t lastFoundPosition = npos;
-
-	//calculate position of last string to compare
-	uint32_t positionEnd = pos - stringCount + 1;
-	for(position = 0; position <= positionEnd; position++)
-	{
-		if( memcmp(dataPtr, s, stringSize) == 0 )
-			lastFoundPosition = position;
-
-		dataPtr += charLength(reinterpret_cast<const char*>(dataPtr));
-	}
-	return lastFoundPosition;
+    0
+}
+#endif
+{
+    if (data != nullptr) {
+        memset(data, 0, sizeAllocated);
+    }
 }
 
-UTF8 UTF8::split(const uint32_t& idx)
+UTF8::UTF8(const char *str)
+{
+    // bufferSize increased by 1 to ensure ending 0 in new string
+    sizeUsed      = strlen(str) + 1;
+    sizeAllocated = getDataBufferSize(sizeUsed);
+    data          = new uint8_t[sizeAllocated];
+    if (data != nullptr) {
+        memset(data, 0, sizeAllocated);
+        memcpy(data, str, sizeUsed);
+        lastIndexData = data;
+    }
+    strLength = getCharactersCount(reinterpret_cast<const char *>(data));
+    lastIndex = 0;
+#ifdef BUILD_GTEST_TESTS
+    operator_index_iterations = 0;
+#endif
+}
+
+UTF8::UTF8(const std::string &str)
+{
+    // bufferSize increased by 1 to ensure ending 0 in new string
+    sizeUsed      = str.length() + 1;
+    sizeAllocated = getDataBufferSize(sizeUsed);
+    data          = new uint8_t[sizeAllocated];
+    if (data != nullptr) {
+        memset(data, 0, sizeAllocated);
+        memcpy(data, str.c_str(), sizeUsed);
+        lastIndexData = data;
+    }
+    strLength = getCharactersCount(reinterpret_cast<const char *>(data));
+    lastIndex = 0;
+#ifdef BUILD_GTEST_TESTS
+    operator_index_iterations = 0;
+#endif
+}
+
+UTF8::UTF8(const UTF8 &utf)
+{
+    strLength     = utf.strLength;
+    sizeAllocated = utf.sizeAllocated;
+    sizeUsed      = utf.sizeUsed;
+
+    // if there is any data used in the string allocate memory and copy usedSize bytes
+    if (strLength) {
+        data = new uint8_t[sizeAllocated];
+        if (data == nullptr) {
+            // LOG_FATAL("No memory for copy constructor.");
+            sizeAllocated = 0;
+            sizeUsed      = 0;
+            return;
+        }
+        memcpy(data, utf.data, sizeAllocated);
+    }
+    else {
+        sizeAllocated = stringExpansion;
+        data          = new uint8_t[sizeAllocated];
+        memset(data, 0, sizeAllocated);
+        sizeUsed = 1;
+    }
+    lastIndex     = 0;
+    lastIndexData = data;
+#ifdef BUILD_GTEST_TESTS
+    operator_index_iterations = 0;
+#endif
+}
+
+UTF8::UTF8(const uint8_t *data, const uint32_t allocated, const uint32_t used, const uint32_t len)
+    : sizeAllocated{allocated}, sizeUsed{used}, strLength{len}, lastIndex{0}
+{
+    this->data = new uint8_t[allocated];
+    if (this->data == nullptr) {
+        sizeAllocated = 0;
+        sizeUsed      = 0;
+        strLength     = 0;
+        return;
+    }
+    memcpy(this->data, data, allocated);
+    lastIndexData = this->data;
+#ifdef BUILD_GTEST_TESTS
+    operator_index_iterations = 0;
+#endif
+}
+
+UTF8::~UTF8()
+{
+    if (data)
+        delete[] data;
+}
+
+bool UTF8::expand(uint32_t size)
 {
 
-	if( idx >= this->length() )
-		return UTF8();
+    uint32_t newSizeAllocated = getDataBufferSize(sizeAllocated + size);
+    uint8_t *newData          = new uint8_t[newSizeAllocated];
 
-	uint8_t* dataPtr = this->data;
+    if (newData != nullptr) {
 
-	//move data pointer to split index
-	for( uint32_t i = 0; i < idx; i ++ )
-	{
-		dataPtr += charLength( reinterpret_cast<const char*>(dataPtr) );
-	}
-	//create new string
-	UTF8 retString( reinterpret_cast<const char*>(dataPtr) );
+        memcpy(newData, data, sizeUsed);
+        memset(newData + sizeUsed, 0, newSizeAllocated - sizeUsed);
 
-	//re-create source string
-	//create temp copy of string
-	uint32_t tempStringSize = dataPtr - this->data;
-	uint32_t tempStringBufferSize = getDataBufferSize(tempStringSize);
-	uint8_t* tempString = new uint8_t [ tempStringBufferSize ];
+        delete[] data;
+        data          = newData;
+        sizeAllocated = newSizeAllocated;
+        lastIndex     = 0;
+        lastIndexData = data;
+        return true;
+    }
+    return false;
+}
 
-	memset( tempString, 0, tempStringBufferSize);
-	memcpy( tempString, this->data, tempStringSize);
+uint32_t UTF8::getDataBufferSize(uint32_t dataBytes)
+{
+    return (((dataBytes) / stringExpansion) + 1) * stringExpansion;
+}
 
-	//add 1 to ensure string terminating zero
-	this->sizeUsed = tempStringSize + 1;
-	this->sizeAllocated = tempStringBufferSize;
-	this->strLength = idx;
+bool UTF8::getStreamLength(const char *stream, uint32_t &size, uint32_t &count)
+{
+    size  = 0;
+    count = 0;
+    while ((*stream) != 0) {
+        // calculate individual char's byte length.
+        int32_t byte_length = charLength(stream);
+        // if char is valid add length and increment pointer
+        if (byte_length > 0) {
+            size += byte_length;
+            ++count;
+            stream += byte_length;
+        }
+        else {
+            size  = 0;
+            count = 0;
+            return false;
+        }
+    }
+    return true;
+}
 
-	//clear used memory
-	memset(this->data, 0, this->sizeAllocated);
-	delete [] this->data;
+UTF8 &UTF8::operator=(const UTF8 &utf)
+{
 
-	this->data = tempString;
+    // prevent from making assignment to itself
+    if (this == &utf) {
+        return *this;
+    }
 
-	this->lastIndex = 0;
-	this->lastIndexData = this->data;
+    sizeAllocated = utf.sizeAllocated;
+    sizeUsed      = utf.sizeUsed;
+    strLength     = utf.strLength;
 
-	return retString;
+    if (data)
+        delete[] data;
+
+    data = new uint8_t[sizeAllocated];
+    memcpy(data, utf.data, sizeAllocated);
+
+    lastIndex     = 0;
+    lastIndexData = data;
+
+    return *this;
+}
+
+UTF8 &UTF8::operator=(UTF8 &&utf) noexcept
+{
+    // prevent moving if object is moved to itself
+    if (this != &utf) {
+        if (data)
+            delete[] data;
+        data          = utf.data;
+        utf.data      = nullptr;
+        sizeAllocated = utf.sizeAllocated;
+        sizeUsed      = utf.sizeUsed;
+        strLength     = utf.strLength;
+    }
+    return *this;
+}
+
+uint32_t UTF8::operator[](const uint32_t &idx) const
+{
+
+    if (idx >= strLength)
+        return 0;
+
+    uint8_t *dataPtr;
+    uint32_t charCnt = 0;
+    if (lastIndex < idx) {
+        dataPtr = lastIndexData;
+        charCnt = lastIndex;
+    }
+    else {
+        dataPtr = data;
+        charCnt = 0;
+    }
+#ifdef BUILD_GTEST_TESTS
+    operator_index_iterations = 0;
+#endif
+    while (charCnt != idx) {
+        dataPtr += charLength(reinterpret_cast<const char *>(dataPtr));
+        charCnt++;
+#ifdef BUILD_GTEST_TESTS
+        operator_index_iterations++;
+#endif
+    }
+
+    lastIndex     = charCnt;
+    lastIndexData = dataPtr;
+
+    uint32_t dummy;
+    uint32_t retValue = decode(reinterpret_cast<const char *>(dataPtr), dummy);
+    return retValue;
+}
+
+UTF8 UTF8::operator+(const UTF8 &utf)
+{
+    // this will call copy constructor and operator += on created copy.
+    return UTF8(*this) += utf;
+}
+
+UTF8 &UTF8::operator+=(const UTF8 &utf)
+{
+
+    if (utf.strLength == 0)
+        return *this;
+
+    uint32_t newSizeAllocated = getDataBufferSize(sizeUsed + utf.sizeUsed);
+    uint8_t *newData          = new uint8_t[newSizeAllocated];
+    if (newData != nullptr) {
+
+        memcpy(newData, data, sizeUsed);
+        //-1 comes from the fact that null terminator is counted as a used byte in string's buffer.
+        memcpy(newData + sizeUsed - 1, utf.data, utf.sizeUsed);
+        delete[] data;
+        data          = newData;
+        sizeAllocated = newSizeAllocated;
+        strLength += utf.strLength;
+        //-1 is to ignore double null terminator as it is counted in sizeUsed
+        sizeUsed += utf.sizeUsed - 1;
+        lastIndex     = 0;
+        lastIndexData = data;
+    }
+    return *this;
+}
+
+bool UTF8::operator==(const UTF8 &utf) const
+{
+    uint32_t len  = strLength - utf.strLength;
+    uint32_t used = sizeUsed - utf.sizeUsed;
+    if ((len | used) == 0) {
+        return !memcmp(data, utf.data, sizeUsed);
+    }
+    return false;
+}
+
+const char *UTF8::c_str() const
+{
+    return reinterpret_cast<const char *>(data);
+}
+
+void UTF8::clear()
+{
+
+    if (data)
+        delete data;
+
+    data          = new uint8_t[stringExpansion];
+    sizeAllocated = stringExpansion;
+    sizeUsed      = 1;
+    strLength     = 0;
+    lastIndex     = 0;
+    lastIndexData = data;
+}
+
+UTF8 UTF8::substr(const uint32_t begin, const uint32_t length) const
+{
+
+    if ((begin + length > this->length()) || (length == 0))
+        return UTF8();
+
+    uint8_t *beginPtr = this->data;
+    uint8_t *endPtr;
+
+    uint32_t bufferSize = 0;
+    uint32_t strCounter = 0;
+    // find pointer to begin char
+    while (strCounter != begin) {
+        beginPtr += charLength(reinterpret_cast<const char *>(beginPtr));
+        strCounter++;
+    }
+    // find pinter to end char
+    endPtr = beginPtr;
+    for (strCounter = 0; strCounter < length; strCounter++) {
+        uint32_t charSize = 0;
+        charSize          = charLength(reinterpret_cast<const char *>(endPtr));
+        endPtr += charSize;
+        bufferSize += charSize;
+    }
+    // copy data to buffer
+    // bufferSize increased by 1 to ensure ending 0 in new string
+    uint8_t *buffer = new uint8_t[bufferSize + 1];
+    memset(buffer, 0, bufferSize + 1);
+    memcpy(buffer, beginPtr, bufferSize);
+
+    UTF8 retString = UTF8(reinterpret_cast<const char *>(buffer));
+    delete[] buffer;
+
+    return retString;
+}
+
+int32_t UTF8::find(const char *s, uint32_t pos)
+{
+    uint32_t stringCount;
+    uint32_t stringSize;
+
+    getStreamLength(s, stringSize, stringCount);
+
+    if ((stringCount == 0) && (s[0] != 0)) {
+        LOG_ERROR("corrupted string");
+        return npos;
+    }
+
+    if (pos + stringCount >= this->length())
+        return npos;
+
+    uint32_t position = 0;
+    uint8_t *dataPtr  = this->data;
+
+    for (position = 0; position < pos; position++) {
+        dataPtr += charLength(reinterpret_cast<const char *>(dataPtr));
+    }
+
+    for (position = pos; position < this->length(); position++) {
+
+        if (memcmp(dataPtr, s, stringSize) == 0)
+            return static_cast<int32_t>(position);
+        dataPtr += charLength(reinterpret_cast<const char *>(dataPtr));
+    }
+    return npos;
+}
+
+int32_t UTF8::findLast(const char *s, uint32_t pos)
+{
+    uint32_t stringCount;
+    uint32_t stringSize;
+
+    getStreamLength(s, stringSize, stringCount);
+    // check input substring
+    if ((stringCount == 0) && (s[0] != 0)) {
+        LOG_ERROR("corrupted string");
+        return npos;
+    }
+    // check if pos is in range of source string
+    if (pos > this->length())
+        return npos;
+
+    if (pos < stringCount - 1)
+        return npos;
+
+    uint32_t position         = 0;
+    uint8_t *dataPtr          = this->data;
+    int32_t lastFoundPosition = npos;
+
+    // calculate position of last string to compare
+    uint32_t positionEnd = pos - stringCount + 1;
+    for (position = 0; position <= positionEnd; position++) {
+        if (memcmp(dataPtr, s, stringSize) == 0)
+            lastFoundPosition = position;
+
+        dataPtr += charLength(reinterpret_cast<const char *>(dataPtr));
+    }
+    return lastFoundPosition;
+}
+
+UTF8 UTF8::split(const uint32_t &idx)
+{
+
+    if (idx >= this->length())
+        return UTF8();
+
+    uint8_t *dataPtr = this->data;
+
+    // move data pointer to split index
+    for (uint32_t i = 0; i < idx; i++) {
+        dataPtr += charLength(reinterpret_cast<const char *>(dataPtr));
+    }
+    // create new string
+    UTF8 retString(reinterpret_cast<const char *>(dataPtr));
+
+    // re-create source string
+    // create temp copy of string
+    uint32_t tempStringSize       = dataPtr - this->data;
+    uint32_t tempStringBufferSize = getDataBufferSize(tempStringSize);
+    uint8_t *tempString           = new uint8_t[tempStringBufferSize];
+
+    memset(tempString, 0, tempStringBufferSize);
+    memcpy(tempString, this->data, tempStringSize);
+
+    // add 1 to ensure string terminating zero
+    this->sizeUsed      = tempStringSize + 1;
+    this->sizeAllocated = tempStringBufferSize;
+    this->strLength     = idx;
+
+    // clear used memory
+    memset(this->data, 0, this->sizeAllocated);
+    delete[] this->data;
+
+    this->data = tempString;
+
+    this->lastIndex     = 0;
+    this->lastIndexData = this->data;
+
+    return retString;
 }
 
 UTF8 UTF8::getLine(void)
 {
-	for(uint32_t i = 0; i < this->length(); i++)
-	{
-		uint32_t character = this->operator[](i);
-		if( ( character == '\r' ) || ( character == '\n' ) )
-			return this->substr(0, i);
-	}
-	return UTF8();
+    for (uint32_t i = 0; i < this->length(); i++) {
+        uint32_t character = this->operator[](i);
+        if ((character == '\r') || (character == '\n'))
+            return this->substr(0, i);
+    }
+    return UTF8();
 }
 
-bool UTF8::removeChar(const uint32_t& pos, const uint32_t& count)
+bool UTF8::removeChar(const uint32_t &pos, const uint32_t &count)
 {
 
-	if( ( pos + count > this->length() ) || ( count == 0 ) )
-		return false;
+    if ((pos + count > this->length()) || (count == 0))
+        return false;
 
-	//get pointer to begin of string to remove
-	uint8_t* beginPtr = this->data;
-	for(uint32_t i = 0; i < pos; i++)
-	{
-		beginPtr += charLength(reinterpret_cast<const char*>(beginPtr));
-	}
+    // get pointer to begin of string to remove
+    uint8_t *beginPtr = this->data;
+    for (uint32_t i = 0; i < pos; i++) {
+        beginPtr += charLength(reinterpret_cast<const char *>(beginPtr));
+    }
 
-	//get pointer to end of string to remove
-	uint8_t* endPtr = beginPtr;
-	for(uint32_t i = 0; i <  count; i++)
-	{
-		endPtr += charLength(reinterpret_cast<const char*>(endPtr));
-	}
+    // get pointer to end of string to remove
+    uint8_t *endPtr = beginPtr;
+    for (uint32_t i = 0; i < count; i++) {
+        endPtr += charLength(reinterpret_cast<const char *>(endPtr));
+    }
 
-	uint32_t bytesToRemove = endPtr - beginPtr;
-	uint32_t newStringSize = this->sizeUsed - bytesToRemove;
+    uint32_t bytesToRemove = endPtr - beginPtr;
+    uint32_t newStringSize = this->sizeUsed - bytesToRemove;
 
-	uint32_t tempStringBufferSize = getDataBufferSize(newStringSize);
-	uint8_t* tempString = new uint8_t [tempStringBufferSize];
-	if( tempString == nullptr)
-		return false;
+    uint32_t tempStringBufferSize = getDataBufferSize(newStringSize);
+    uint8_t *tempString           = new uint8_t[tempStringBufferSize];
+    if (tempString == nullptr)
+        return false;
 
-	//create new data buffer
-	uint32_t copyOffset = beginPtr - this->data;
-	memset(tempString, 0, tempStringBufferSize);
-	memcpy(tempString, this->data, beginPtr - this->data);
-	memcpy(tempString + copyOffset, endPtr, this->sizeUsed - bytesToRemove - copyOffset);
+    // create new data buffer
+    uint32_t copyOffset = beginPtr - this->data;
+    memset(tempString, 0, tempStringBufferSize);
+    memcpy(tempString, this->data, beginPtr - this->data);
+    memcpy(tempString + copyOffset, endPtr, this->sizeUsed - bytesToRemove - copyOffset);
 
-	this->sizeAllocated = tempStringBufferSize;
-	this->strLength -= count;
-	this->sizeUsed -= bytesToRemove;
+    this->sizeAllocated = tempStringBufferSize;
+    this->strLength -= count;
+    this->sizeUsed -= bytesToRemove;
 
-	//delete old data buffer
-	memset(this->data, 0, this->sizeAllocated);
-	delete [] this->data;
+    // delete old data buffer
+    memset(this->data, 0, this->sizeAllocated);
+    delete[] this->data;
 
-	//assign new data buffer
-	this->data = tempString;
+    // assign new data buffer
+    this->data = tempString;
 
-	return true;
+    return true;
 }
 
-//Char. number range  |        UTF-8 octet sequence
+// Char. number range  |        UTF-8 octet sequence
 //   (hexadecimal)    |              (binary)
 //--------------------+---------------------------------------------
-//0000 0000-0000 007F | 0xxxxxxx
-//0000 0080-0000 07FF | 110xxxxx 10xxxxxx
-//0000 0800-0000 FFFF | 1110xxxx 10xxxxxx 10xxxxxx
-//0001 0000-0010 FFFF | 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
-bool UTF8::encode( const uint16_t& code, uint32_t& dest, uint32_t& length ) {
+// 0000 0000-0000 007F | 0xxxxxxx
+// 0000 0080-0000 07FF | 110xxxxx 10xxxxxx
+// 0000 0800-0000 FFFF | 1110xxxx 10xxxxxx 10xxxxxx
+// 0001 0000-0010 FFFF | 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
+bool UTF8::encode(const uint16_t &code, uint32_t &dest, uint32_t &length)
+{
 
-	dest = 0;
-	length = 0;
-	if( ( (code >= 0xD800) && (code <= 0xDFFF )) || (code > 0x10FFFF))
-		return false;
+    dest   = 0;
+    length = 0;
+    if (((code >= 0xD800) && (code <= 0xDFFF)) || (code > 0x10FFFF))
+        return false;
 
-	if( code < 0x00080 ) {
-		length = 1;
-		dest = code;
-	}
-	else if( code < 0x0800 ) {
-		length = 2;
-		dest = 0x0000C080;
-		//low byte
-		dest |= (code & 0x003F );
-		//high byte
-		dest |= ( (code>>6) & 0x001F ) << 8;
-	}
-	else if( code < 0x010000 ) {
-		length = 3;
-		dest = 0x00E08080;
-		//low byte
-		dest |= (code & 0x003F );
-		//middle byte
-		dest |= ( (code>>6) & 0x003F ) << 8;
-		//high byte
-		dest |= ( (code>>12) & 0x000F ) << 16;
-	}
-	else {
-		length = 4;
-		dest = 0xF0808080;
-		//low byte
-		dest |= (code & 0x003F );
-		//byte after low
-		dest |= ( (code>>6) & 0x003F ) << 8;
-		//byte before low
-		dest |= ( (code>>12) & 0x003F ) << 16;
-		//high byte
-		dest |= ( (code>>18) & 0x0007 ) << 24;
-	}
-	return true;
+    if (code < 0x00080) {
+        length = 1;
+        dest   = code;
+    }
+    else if (code < 0x0800) {
+        length = 2;
+        dest   = 0x0000C080;
+        // low byte
+        dest |= (code & 0x003F);
+        // high byte
+        dest |= ((code >> 6) & 0x001F) << 8;
+    }
+    else if (code < 0x010000) {
+        length = 3;
+        dest   = 0x00E08080;
+        // low byte
+        dest |= (code & 0x003F);
+        // middle byte
+        dest |= ((code >> 6) & 0x003F) << 8;
+        // high byte
+        dest |= ((code >> 12) & 0x000F) << 16;
+    }
+    else {
+        length = 4;
+        dest   = 0xF0808080;
+        // low byte
+        dest |= (code & 0x003F);
+        // byte after low
+        dest |= ((code >> 6) & 0x003F) << 8;
+        // byte before low
+        dest |= ((code >> 12) & 0x003F) << 16;
+        // high byte
+        dest |= ((code >> 18) & 0x0007) << 24;
+    }
+    return true;
 }
 
-bool UTF8::insert( const char* charPtr, const uint32_t& index ) {
+bool UTF8::insert(const char *charPtr, const uint32_t &index)
+{
 
-	//if index is different than UTF8::npos check if its valid
-	uint32_t insertIndex = index;
-	if( insertIndex != UTF8::npos ) {
-		if( insertIndex > strLength )
-			return false;
-	}
-	else
-		insertIndex = strLength;
+    // if index is different than UTF8::npos check if its valid
+    uint32_t insertIndex = index;
+    if (insertIndex != UTF8::npos) {
+        if (insertIndex > strLength)
+            return false;
+    }
+    else
+        insertIndex = strLength;
 
+    // get length of the char in bytes
+    uint32_t charLen = charLength(charPtr);
 
-	//get length of the char in bytes
-	uint32_t charLen = charLength( charPtr );
+    // if there is not enough space in string buffer try t expand it by default expansion size.
+    if (charLen + sizeUsed >= sizeAllocated) {
+        if (expand() == false)
+            return false;
+    }
 
-	//if there is not enough space in string buffer try t expand it by default expansion size.
-	if( charLen + sizeUsed >= sizeAllocated ) {
-		if( expand() == false )
-			return false;
-	}
+    // find pointer where new character should be copied
+    uint8_t *beginPtr = this->data;
+    for (uint32_t i = 0; i < insertIndex; i++) {
+        beginPtr += charLength(reinterpret_cast<const char *>(beginPtr));
+    }
 
-	//find pointer where new character should be copied
-	uint8_t* beginPtr = this->data;
-	for(uint32_t i = 0; i < insertIndex; i++) {
-		beginPtr += charLength(reinterpret_cast<const char*>(beginPtr));
-	}
+    memmove(beginPtr + charLen, beginPtr, sizeUsed - (beginPtr - data));
+    memcpy(beginPtr, charPtr, charLen);
 
-	memmove( beginPtr + charLen, beginPtr, sizeUsed - (beginPtr - data));
-	memcpy( beginPtr, charPtr, charLen );
+    sizeUsed += charLen;
+    ++strLength;
 
-	sizeUsed += charLen;
-	++strLength;
-
-	return true;
+    return true;
 }
 
-bool UTF8::insertCode( const uint32_t& charCode, const uint32_t& index ) {
+bool UTF8::insertCode(const uint32_t &charCode, const uint32_t &index)
+{
 
-	uint32_t encodedValue;
-	uint32_t encodedLength;
-	encode( charCode, encodedValue, encodedLength );
+    uint32_t encodedValue;
+    uint32_t encodedLength;
+    encode(charCode, encodedValue, encodedLength);
 
-	return insert( reinterpret_cast<char*>( &encodedValue), index );
+    return insert(reinterpret_cast<char *>(&encodedValue), index);
 }
 
-bool UTF8::insertString( const UTF8& str, const uint32_t& index ) {
+bool UTF8::insertString(const UTF8 &str, const uint32_t &index)
+{
 
-	//if index is different than UTF8::npos check if its valid
-	uint32_t insertIndex = index;
-	if( insertIndex != UTF8::npos ) {
-		if( insertIndex > strLength )
-			return false;
-	}
-	else
-		insertIndex = strLength;
+    // if index is different than UTF8::npos check if its valid
+    uint32_t insertIndex = index;
+    if (insertIndex != UTF8::npos) {
+        if (insertIndex > strLength)
+            return false;
+    }
+    else
+        insertIndex = strLength;
 
-	uint32_t totalSize = sizeUsed + str.sizeUsed-1; //-1 because there are 2 end terminators
-	expand( getDataBufferSize( totalSize ));
+    uint32_t totalSize = sizeUsed + str.sizeUsed - 1; //-1 because there are 2 end terminators
+    expand(getDataBufferSize(totalSize));
 
-	uint8_t* beginPtr = this->data;
-	for(uint32_t i = 0; i < insertIndex; i++) {
-		beginPtr += charLength(reinterpret_cast<const char*>(beginPtr));
-	}
+    uint8_t *beginPtr = this->data;
+    for (uint32_t i = 0; i < insertIndex; i++) {
+        beginPtr += charLength(reinterpret_cast<const char *>(beginPtr));
+    }
 
-	//-1 to ignore end terminator from str
-	memmove( beginPtr + str.sizeUsed-1, beginPtr, sizeUsed - (beginPtr - data));
-	memcpy( beginPtr, str.data, str.sizeUsed-1 );
+    //-1 to ignore end terminator from str
+    memmove(beginPtr + str.sizeUsed - 1, beginPtr, sizeUsed - (beginPtr - data));
+    memcpy(beginPtr, str.data, str.sizeUsed - 1);
 
-	return false;
+    return false;
 }
 
-
-uint32_t UTF8::getCharactersCount(  const char* stream ) {
-	uint32_t size, count;
-	if( getStreamLength( stream, size, count ) )
-		return count;
-	return 0;
+uint32_t UTF8::getCharactersCount(const char *stream)
+{
+    uint32_t size, count;
+    if (getStreamLength(stream, size, count))
+        return count;
+    return 0;
 }
 
-uint8_t* UTF8::serialize( uint32_t& streamSize ) {
+uint8_t *UTF8::serialize(uint32_t &streamSize)
+{
 
-	streamSize = 0;
-	//size of the buffer
-	uint32_t size = sizeAllocated + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t);
-	//buffer for storing data
-	uint8_t* buf = (uint8_t*)malloc( size );
+    streamSize = 0;
+    // size of the buffer
+    uint32_t size = sizeAllocated + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t);
+    // buffer for storing data
+    uint8_t *buf = (uint8_t *)malloc(size);
 
-	if( buf == NULL ) {
-		//LOG_FATAL("No memory to serialize string");
-		return NULL;
-	}
-	memcpy( buf, &sizeAllocated, sizeof(uint32_t) );
-	memcpy( buf + sizeof(uint32_t), &sizeUsed, sizeof(uint32_t) );
-	memcpy( buf + sizeof(uint32_t) + sizeof(uint32_t), &strLength, sizeof(uint32_t) );
-	memcpy( buf + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t), data, sizeAllocated );
+    if (buf == NULL) {
+        // LOG_FATAL("No memory to serialize string");
+        return NULL;
+    }
+    memcpy(buf, &sizeAllocated, sizeof(uint32_t));
+    memcpy(buf + sizeof(uint32_t), &sizeUsed, sizeof(uint32_t));
+    memcpy(buf + sizeof(uint32_t) + sizeof(uint32_t), &strLength, sizeof(uint32_t));
+    memcpy(buf + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t), data, sizeAllocated);
 
-	streamSize = size;
+    streamSize = size;
 
-	return buf;
+    return buf;
 }
 
-UTF8 UTF8::deserialize(uint8_t* stream) {
+UTF8 UTF8::deserialize(uint8_t *stream)
+{
 
-	if( stream == nullptr ) {
-		//LOG_ERROR("null stream provided.");
-		return UTF8();
-	}
-	uint32_t* sizeAllocated = reinterpret_cast<uint32_t*>(stream);
-	uint32_t* sizeUsed = reinterpret_cast<uint32_t*>(stream + sizeof(uint32_t));
-	uint32_t* strLength = reinterpret_cast<uint32_t*>(stream + 2*sizeof(uint32_t));
-	uint8_t* data = stream + 3*sizeof(uint32_t);
+    if (stream == nullptr) {
+        // LOG_ERROR("null stream provided.");
+        return UTF8();
+    }
+    uint32_t *sizeAllocated = reinterpret_cast<uint32_t *>(stream);
+    uint32_t *sizeUsed      = reinterpret_cast<uint32_t *>(stream + sizeof(uint32_t));
+    uint32_t *strLength     = reinterpret_cast<uint32_t *>(stream + 2 * sizeof(uint32_t));
+    uint8_t *data           = stream + 3 * sizeof(uint32_t);
 
-	//sanity check
-	if( ( (*strLength) > (*sizeUsed)) ||
-		((*sizeUsed) > (*sizeAllocated))) {
-		//LOG_FATAL("Errors in stream detected.");
-		return UTF8();
-	}
-	return UTF8( data, *sizeAllocated, *sizeUsed, *strLength );
+    // sanity check
+    if (((*strLength) > (*sizeUsed)) || ((*sizeUsed) > (*sizeAllocated))) {
+        // LOG_FATAL("Errors in stream detected.");
+        return UTF8();
+    }
+    return UTF8(data, *sizeAllocated, *sizeUsed, *strLength);
 }
 
-uint32_t UTF8::decode( const char* utf8_char, uint32_t& length  ) const
+uint32_t UTF8::decode(const char *utf8_char, uint32_t &length) const
 {
     uint32_t ret = 0;
     uint32_t len = 0;
-    //check if provided char is standards US-ASCII character. 0xxxxxxx
-    if( ( (*utf8_char) & UTF8_HEADER_1_MASK ) == 0 )
-    {
+    // check if provided char is standards US-ASCII character. 0xxxxxxx
+    if (((*utf8_char) & UTF8_HEADER_1_MASK) == 0) {
         ret = *utf8_char;
         len = 1;
     }
-    else if( ( (*utf8_char) & UTF8_HEADER_2_MASK ) == UTF8_HEADER_2 ) //characters number is written on 2 bytes 110xxxxx 10xxxxxx
+    else if (((*utf8_char) & UTF8_HEADER_2_MASK) ==
+             UTF8_HEADER_2) // characters number is written on 2 bytes 110xxxxx 10xxxxxx
     {
-        if( ( *(utf8_char + 1) & UTF8_EXT_MASK ) == UTF8_EXT )
-        {
+        if ((*(utf8_char + 1) & UTF8_EXT_MASK) == UTF8_EXT) {
             ret = (*utf8_char) & 0x1F;
             ret <<= 6;
-            ret += *(utf8_char+1) & 0x3F;
+            ret += *(utf8_char + 1) & 0x3F;
             len = 2;
         }
         else
             goto wrong_utf8_character;
     }
-    else if( ( (*utf8_char) & UTF8_HEADER_3_MASK ) == UTF8_HEADER_3 ) //characters number is written on 3 bytes. 1110xxxx 10xxxxxx 10xxxxxx
+    else if (((*utf8_char) & UTF8_HEADER_3_MASK) ==
+             UTF8_HEADER_3) // characters number is written on 3 bytes. 1110xxxx 10xxxxxx 10xxxxxx
     {
-        if( ( (*(utf8_char + 1) & UTF8_EXT_MASK ) == UTF8_EXT ) &&
-            ( (*(utf8_char + 2) & UTF8_EXT_MASK ) == UTF8_EXT ) )
-        {
+        if (((*(utf8_char + 1) & UTF8_EXT_MASK) == UTF8_EXT) && ((*(utf8_char + 2) & UTF8_EXT_MASK) == UTF8_EXT)) {
             ret = (*utf8_char) & 0x7F;
             ret <<= 6;
-            ret += *(utf8_char+1) & 0x3F;
+            ret += *(utf8_char + 1) & 0x3F;
             ret <<= 6;
-            ret += *(utf8_char+2) & 0x3F;
+            ret += *(utf8_char + 2) & 0x3F;
             len = 3;
         }
         else
             goto wrong_utf8_character;
     }
-    else if( ( (*(utf8_char) & UTF8_HEADER_4_MASK ) == UTF8_HEADER_4 ) ) //characters number is written on 3 bytes. 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
+    else if (((*(utf8_char)&UTF8_HEADER_4_MASK) ==
+              UTF8_HEADER_4)) // characters number is written on 3 bytes. 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
     {
-        if( ( (*(utf8_char + 1) & UTF8_EXT_MASK ) == UTF8_EXT ) &&
-            ( (*(utf8_char + 2) & UTF8_EXT_MASK ) == UTF8_EXT ) &&
-            ( (*(utf8_char + 3) & UTF8_EXT_MASK ) == UTF8_EXT ) )
-        {
+        if (((*(utf8_char + 1) & UTF8_EXT_MASK) == UTF8_EXT) && ((*(utf8_char + 2) & UTF8_EXT_MASK) == UTF8_EXT) &&
+            ((*(utf8_char + 3) & UTF8_EXT_MASK) == UTF8_EXT)) {
             ret = (*utf8_char) & 0x7F;
             ret <<= 6;
-            ret += *(utf8_char+1) & 0x3F;
+            ret += *(utf8_char + 1) & 0x3F;
             ret <<= 6;
-            ret += *(utf8_char+2) & 0x3F;
+            ret += *(utf8_char + 2) & 0x3F;
             ret <<= 6;
-            ret += *(utf8_char+3) & 0x3F;
+            ret += *(utf8_char + 3) & 0x3F;
             len = 4;
         }
         else
             goto wrong_utf8_character;
     }
-	length = len;
+    length = len;
     return ret;
 wrong_utf8_character:
     return ret;
diff --git a/module-utils/utf8/UTF8.hpp b/module-utils/utf8/UTF8.hpp
index c535c4193..1588e44eb 100644
--- a/module-utils/utf8/UTF8.hpp
+++ b/module-utils/utf8/UTF8.hpp
@@ -12,197 +12,210 @@
 #include <cstdint>
 #include <iostream>
 
+class UTF8
+{
+  protected:
+    UTF8(const uint8_t *data, const uint32_t allocated, const uint32_t used, const uint32_t len);
 
+    // pointer to buffer
+    uint8_t *data;
+    // total size of buffer in bytes
+    uint32_t sizeAllocated;
+    // number of bytes used in buffer
+    uint32_t sizeUsed;
+    // umber of characters in the string
+    uint32_t strLength;
+    // last used index
+    mutable uint32_t lastIndex;
+    // pointer to last indexed character
+    mutable uint8_t *lastIndexData;
 
-class UTF8 {
-protected:
-	UTF8( const uint8_t* data, const uint32_t allocated, const uint32_t used, const uint32_t len );
+    // variable used when c_str() is called for a string that has no data yet
+    static const char *emptyString;
+    // holds number of bytes by which buffer will be expanded in case when current buffer can't hold new data.
+    static const uint32_t stringExpansion;
+    /**
+     * @brief Calculates size of the buffer to store given number of data bytes.
+     * @param dataBytes number of data bytes
+     * @return Number of bytes needed to store provided data bytes size rounded up and rounded using stringExpansion
+     * value.
+     */
+    uint32_t getDataBufferSize(uint32_t dataBytes);
+    bool expand(uint32_t size = stringExpansion);
+    uint32_t decode(const char *utf8_char, uint32_t &length) const;
 
-	//pointer to buffer
-	uint8_t* data;
-	//total size of buffer in bytes
-	uint32_t sizeAllocated;
-	//number of bytes used in buffer
-	uint32_t sizeUsed;
-	//umber of characters in the string
-	uint32_t strLength;
-	//last used index
-	mutable uint32_t lastIndex;
-	//pointer to last indexed character
-	mutable uint8_t* lastIndexData;
+  public:
+    UTF8();
+    UTF8(const char *str);
+    UTF8(const std::string &str);
+    UTF8(const UTF8 &utf);
+    static const int32_t npos = -1;
 
-	//variable used when c_str() is called for a string that has no data yet
-	static const char* emptyString;
-	//holds number of bytes by which buffer will be expanded in case when current buffer can't hold new data.
-	static const uint32_t stringExpansion;
-	/**
-	 * @brief Calculates size of the buffer to store given number of data bytes.
-	 * @param dataBytes number of data bytes
-	 * @return Number of bytes needed to store provided data bytes size rounded up and rounded using stringExpansion value.
-	 */
-	uint32_t getDataBufferSize( uint32_t dataBytes );
-	bool expand( uint32_t size = stringExpansion );
-	uint32_t decode( const char* utf8_char, uint32_t& length  ) const;
+    virtual ~UTF8();
 
-public:
-	UTF8();
-	UTF8( const char* str );
-	UTF8( const std::string& str );
-	UTF8( const UTF8& utf );
-	static const int32_t npos = -1;
+    /**
+     * OPERATORS
+     */
 
-	virtual ~UTF8();
-
-	/**
-	 * OPERATORS
-	 */
-
-	UTF8& operator=( const UTF8& utf );
-	UTF8& operator= ( UTF8&& utf ) noexcept;
-	uint32_t operator[]( const uint32_t& idx ) const;
-	UTF8 operator+( const UTF8& utf );
-	UTF8& operator+=( const UTF8& utf );
-	bool operator==( const UTF8& utf ) const;
+    UTF8 &operator=(const UTF8 &utf);
+    UTF8 &operator=(UTF8 &&utf) noexcept;
+    uint32_t operator[](const uint32_t &idx) const;
+    UTF8 operator+(const UTF8 &utf);
+    UTF8 &operator+=(const UTF8 &utf);
+    bool operator==(const UTF8 &utf) const;
     operator std::string() const
     {
         return c_str();
     }
-    friend std::ostream& operator<< (std::ostream& os, const UTF8 &el) {
+    friend std::ostream &operator<<(std::ostream &os, const UTF8 &el)
+    {
         os << el.c_str();
         return os;
     }
 
-	/**
-	 * UTILITY FUNCTIONS
-	 */
+    /**
+     * UTILITY FUNCTIONS
+     */
 
-	uint32_t length() const { return strLength; };
-	uint32_t used() { return sizeUsed; };
-	const char* c_str() const ;
+    uint32_t length() const
+    {
+        return strLength;
+    };
+    uint32_t used()
+    {
+        return sizeUsed;
+    };
+    const char *c_str() const;
 
-	/**
-	 * @brief Removes all content from the string and reduce assigned memory to default value.
-	 */
-	void clear();
+    /**
+     * @brief Removes all content from the string and reduce assigned memory to default value.
+     */
+    void clear();
 
-	/**
-	*@brief Creates substring from current string. New string starts from begin parameter and contains number of characters passed by length.
-	*@param begin Index of the first character in newly created string.
-	*@param length Number of characters to copy.
-	*@return substring created from source string.
-	*@note In case of start index greater than length of source string or length that exceeds character empty string is returned.
-	**/
-	UTF8 substr( const uint32_t begin, const uint32_t length ) const;
+    /**
+     *@brief Creates substring from current string. New string starts from begin parameter and contains number of
+     *characters passed by length.
+     *@param begin Index of the first character in newly created string.
+     *@param length Number of characters to copy.
+     *@return substring created from source string.
+     *@note In case of start index greater than length of source string or length that exceeds character empty string is
+     *returned.
+     **/
+    UTF8 substr(const uint32_t begin, const uint32_t length) const;
 
-	/**
-	 * @brief Finds first occurrence of substring in string
-	 * @param s string to find
-	 * @param pos initial searching position
-	 * @return index of first matched string
-	 * @note returns npos when substring is not found
-	 */
+    /**
+     * @brief Finds first occurrence of substring in string
+     * @param s string to find
+     * @param pos initial searching position
+     * @return index of first matched string
+     * @note returns npos when substring is not found
+     */
 
-	int32_t find(const char* s, uint32_t pos = 0);
-	/**
-	 * @brief Finds last occurrence of substring in string
-	 * @param s string to find
-	 * @param pos initial searching position
-	 * @return index of first matched string
-	 * @note returns npos when substring is not found.
-	 */
-	int32_t findLast(const char* s, uint32_t pos);
-	/**
-	 * @brief splits UTF8 sting into two strings.
-	 * @param idx index of character from which the division will be made.
-	 * @return newly created string, character under specified index will be first character in new string.
-	 * Returns empty string in case of invalid index.
-	 */
-	UTF8 split(const uint32_t& idx);
-	/**
-	 * @brief Creates substring from current string. New string is limited by /r or /n.
-	 * @return subrstring created from current string. Returns empty string in case of failure.
-	 */
-	UTF8 getLine(void);
-	/**
-	 * @brief Remove characters from string.
-	 * @param pos position of first char to remove.
-	 * @param count count of characters to remove.
-	 * @return true if there was no error, false otherwise
-	 */
-	bool removeChar( const uint32_t& pos = 0, const uint32_t& count = 1);
-	/**
-	 * @brief Inserts character into string on specified position. If position is not specified (UTF8::npos) char is added at the end to current string.
-	 * @param charPtr pointer to the memory where UTF8 character is located.
-	 * @param index index in the current string where character should be inserted.
-	 * @return true is operation was successful false otherwise.
-	 */
-	bool insert( const char* charPtr, const uint32_t& index = UTF8::npos );
-	/**
-	 * @brief Inserts character into string on specified position. If position is not specified (UTF8::npos) char is added at the end to current string.
-	 * @param charCode code of the character to insert.
-	 * @param index index in the current string where character should be inserted.
-	 * @return true is operation was successful false otherwise.
-	 */
-	bool insertCode( const uint32_t& charCode, const uint32_t& index = UTF8::npos );
-	/**
-	 * @brief Inserts string into current string on specified position. If position is not specified (UTF8::npos) is appended at the end of the current string.
-	 * @param str String to be inserted into current object.
-	 * @param index index in the current string where character should be inserted.
-	 * @return true is operation was successful false otherwise.
-	 */
-	bool insertString( const UTF8& str, const uint32_t& index = UTF8::npos );
+    int32_t find(const char *s, uint32_t pos = 0);
+    /**
+     * @brief Finds last occurrence of substring in string
+     * @param s string to find
+     * @param pos initial searching position
+     * @return index of first matched string
+     * @note returns npos when substring is not found.
+     */
+    int32_t findLast(const char *s, uint32_t pos);
+    /**
+     * @brief splits UTF8 sting into two strings.
+     * @param idx index of character from which the division will be made.
+     * @return newly created string, character under specified index will be first character in new string.
+     * Returns empty string in case of invalid index.
+     */
+    UTF8 split(const uint32_t &idx);
+    /**
+     * @brief Creates substring from current string. New string is limited by /r or /n.
+     * @return subrstring created from current string. Returns empty string in case of failure.
+     */
+    UTF8 getLine(void);
+    /**
+     * @brief Remove characters from string.
+     * @param pos position of first char to remove.
+     * @param count count of characters to remove.
+     * @return true if there was no error, false otherwise
+     */
+    bool removeChar(const uint32_t &pos = 0, const uint32_t &count = 1);
+    /**
+     * @brief Inserts character into string on specified position. If position is not specified (UTF8::npos) char is
+     * added at the end to current string.
+     * @param charPtr pointer to the memory where UTF8 character is located.
+     * @param index index in the current string where character should be inserted.
+     * @return true is operation was successful false otherwise.
+     */
+    bool insert(const char *charPtr, const uint32_t &index = UTF8::npos);
+    /**
+     * @brief Inserts character into string on specified position. If position is not specified (UTF8::npos) char is
+     * added at the end to current string.
+     * @param charCode code of the character to insert.
+     * @param index index in the current string where character should be inserted.
+     * @return true is operation was successful false otherwise.
+     */
+    bool insertCode(const uint32_t &charCode, const uint32_t &index = UTF8::npos);
+    /**
+     * @brief Inserts string into current string on specified position. If position is not specified (UTF8::npos) is
+     * appended at the end of the current string.
+     * @param str String to be inserted into current object.
+     * @param index index in the current string where character should be inserted.
+     * @return true is operation was successful false otherwise.
+     */
+    bool insertString(const UTF8 &str, const uint32_t &index = UTF8::npos);
 
-	/*
-	 * @brief Check if string has only ASCII characters
-	 * @return true if there are only ASCII characters in string, false otherwise.
-	 */
-	bool isAscii(void)
-	{
-		if(this->sizeUsed - 1 == this->length())
-			return true;
-		return false;
-	}
-	/**
-	 * @brief Returns pointer to character encoded using provided Unicode value.
-	 * @param code Unicode of the character.
-	 * @param dest uint32 variable where encoded variable will be stored.
-	 * @param length number of useful bytes in dest variable.
-	 * @return True if encoding was successful, false otherwise
-	 * @note function returns false if character is within prohibited range - <U+D800, U+DFFF> or above value of U+10FFFF.
-	 */
-	static bool encode( const uint16_t& code, uint32_t& dest, uint32_t& length );
-	/**
-	 * PUBLIC METHODS
-	 */
+    /*
+     * @brief Check if string has only ASCII characters
+     * @return true if there are only ASCII characters in string, false otherwise.
+     */
+    bool isAscii(void)
+    {
+        if (this->sizeUsed - 1 == this->length())
+            return true;
+        return false;
+    }
+    /**
+     * @brief Returns pointer to character encoded using provided Unicode value.
+     * @param code Unicode of the character.
+     * @param dest uint32 variable where encoded variable will be stored.
+     * @param length number of useful bytes in dest variable.
+     * @return True if encoding was successful, false otherwise
+     * @note function returns false if character is within prohibited range - <U+D800, U+DFFF> or above value of
+     * U+10FFFF.
+     */
+    static bool encode(const uint16_t &code, uint32_t &dest, uint32_t &length);
+    /**
+     * PUBLIC METHODS
+     */
 
-	/**
-	 * @brief Serialize object to the stream of bytes.
-	 * @param idx index of character from which the division will be made.
-	 * @return newly created string, character under specified index will be first character in new string.
-	 * Returns empty string in case of invalid index.
-	 */
+    /**
+     * @brief Serialize object to the stream of bytes.
+     * @param idx index of character from which the division will be made.
+     * @return newly created string, character under specified index will be first character in new string.
+     * Returns empty string in case of invalid index.
+     */
 
-	uint8_t* serialize( uint32_t& streamSize );
+    uint8_t *serialize(uint32_t &streamSize);
 
-	/**
-	 * STATIC METHODS
-	 */
+    /**
+     * STATIC METHODS
+     */
 
-	/**
-	 * @brief Calculates numer of utf8 characters in provided stream
-	 */
-	static uint32_t getCharactersCount( const char* stream );
-	/**
-	 * @brief Calculates number of bytes and character IDs in the provided stream;
-	 * @param size Variable where number of bytes in the stream will be saved( till null terminator );
-	 * @param count Variable where number of characters in the stream will be saved.
-	 * @return true if there was no error, false otherwise;
-	 */
-	static bool getStreamLength( const char* stream, uint32_t& size, uint32_t& count );
-	static UTF8 deserialize( uint8_t* stream );
+    /**
+     * @brief Calculates numer of utf8 characters in provided stream
+     */
+    static uint32_t getCharactersCount(const char *stream);
+    /**
+     * @brief Calculates number of bytes and character IDs in the provided stream;
+     * @param size Variable where number of bytes in the stream will be saved( till null terminator );
+     * @param count Variable where number of characters in the stream will be saved.
+     * @return true if there was no error, false otherwise;
+     */
+    static bool getStreamLength(const char *stream, uint32_t &size, uint32_t &count);
+    static UTF8 deserialize(uint8_t *stream);
 #ifdef BUILD_GTEST_TESTS
-	mutable uint32_t operator_index_iterations;
-	#endif
+    mutable uint32_t operator_index_iterations;
+#endif
 };
 
 #endif /* UTF8_HPP_ */
diff --git a/module-vfs/board/cross/vfs.cpp b/module-vfs/board/cross/vfs.cpp
index 55b9fd746..7f4909e5e 100644
--- a/module-vfs/board/cross/vfs.cpp
+++ b/module-vfs/board/cross/vfs.cpp
@@ -2,7 +2,7 @@
  *  @file vfs.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -11,179 +11,184 @@
 #include "board/cross/eMMC/eMMC.hpp"
 #include "ff_eMMC_user_disk.hpp"
 
-#define eMMCHIDDEN_SECTOR_COUNT		8
-#define eMMCPRIMARY_PARTITIONS		1
-#define eMMCHUNDRED_64_BIT			100ULL
-#define eMMCPARTITION_NUMBER			0 /* Only a single partition is used. */
-#define eMMCBYTES_PER_MB				( 1024ull * 1024ull )
-#define eMMCSECTORS_PER_MB			( eMMCBYTES_PER_MB / 512ull )
+#define eMMCHIDDEN_SECTOR_COUNT 8
+#define eMMCPRIMARY_PARTITIONS  1
+#define eMMCHUNDRED_64_BIT      100ULL
+#define eMMCPARTITION_NUMBER    0 /* Only a single partition is used. */
+#define eMMCBYTES_PER_MB        (1024ull * 1024ull)
+#define eMMCSECTORS_PER_MB      (eMMCBYTES_PER_MB / 512ull)
 
 /* Used as a magic number to indicate that an FF_Disk_t structure is a RAM
 disk. */
-#define eMMCSIGNATURE				0x61606362
-#define mainIO_MANAGER_CACHE_SIZE	( 15UL * FSL_SDMMC_DEFAULT_BLOCK_SIZE )
+#define eMMCSIGNATURE             0x61606362
+#define mainIO_MANAGER_CACHE_SIZE (15UL * FSL_SDMMC_DEFAULT_BLOCK_SIZE)
 
-vfs::vfs():
-    emmc()
+vfs::vfs() : emmc()
+{}
+
+vfs::~vfs()
 {
-
-}
-
-vfs::~vfs(){
     FF_eMMC_user_DiskDelete(emmcFFDisk);
     emmc.DeInit();
 }
 
-void vfs::Init(){
+void vfs::Init()
+{
     emmc.Init();
 
-    emmcFFDisk= FF_eMMC_user_DiskInit(eMMC_USER_DISK_NAME,&emmc);
+    emmcFFDisk = FF_eMMC_user_DiskInit(eMMC_USER_DISK_NAME, &emmc);
 
     /* Print out information on the disk. */
-    FF_eMMC_user_DiskShowPartition( emmcFFDisk );
+    FF_eMMC_user_DiskShowPartition(emmcFFDisk);
 }
 
-vfs::FILE * vfs::fopen ( const char * filename, const char * mode ){
-    return ff_fopen(filename,mode);
+vfs::FILE *vfs::fopen(const char *filename, const char *mode)
+{
+    return ff_fopen(filename, mode);
 }
 
-int vfs::fclose ( FILE * stream ){
+int vfs::fclose(FILE *stream)
+{
     return ff_fclose(stream);
 }
 
-int vfs::remove (const char *name){
+int vfs::remove(const char *name)
+{
     return ff_remove(name);
 }
 
-size_t vfs::fread ( void * ptr, size_t size, size_t count, FILE * stream ){
-    return ff_fread(ptr,size,count,stream);
+size_t vfs::fread(void *ptr, size_t size, size_t count, FILE *stream)
+{
+    return ff_fread(ptr, size, count, stream);
 }
 
-size_t vfs::fwrite ( const void * ptr, size_t size, size_t count, FILE * stream ){
-    return ff_fwrite(ptr,size,count,stream);
+size_t vfs::fwrite(const void *ptr, size_t size, size_t count, FILE *stream)
+{
+    return ff_fwrite(ptr, size, count, stream);
 }
 
-int vfs::fseek ( FILE * stream, long int offset, int origin ){
-    return ff_fseek(stream,offset,origin);
+int vfs::fseek(FILE *stream, long int offset, int origin)
+{
+    return ff_fseek(stream, offset, origin);
 }
 
-long int vfs::ftell ( FILE * stream ){
+long int vfs::ftell(FILE *stream)
+{
     return ff_ftell(stream);
 }
 
-void vfs::rewind ( FILE * stream ){
+void vfs::rewind(FILE *stream)
+{
     ff_rewind(stream);
 }
 
-size_t vfs::filelength( FILE *stream ){
+size_t vfs::filelength(FILE *stream)
+{
     return ff_filelength(stream);
 }
 
-std::string vfs::getcurrdir(){
+std::string vfs::getcurrdir()
+{
     char buff[64] = {};
-    ff_getcwd(buff,sizeof buff);
+    ff_getcwd(buff, sizeof buff);
     return std::string{buff};
-
 }
 
-static inline bool hasEnding (std::string const &fullString, std::string const &ending) {
+static inline bool hasEnding(std::string const &fullString, std::string const &ending)
+{
     if (fullString.length() >= ending.length()) {
-        return (0 == fullString.compare (fullString.length() - ending.length(), ending.length(), ending));
-    } else {
+        return (0 == fullString.compare(fullString.length() - ending.length(), ending.length(), ending));
+    }
+    else {
         return false;
     }
 }
 
-
-std::vector<vfs::DirectoryEntry> vfs::listdir(const char* path, const std::string& ext){
+std::vector<vfs::DirectoryEntry> vfs::listdir(const char *path, const std::string &ext)
+{
     std::vector<DirectoryEntry> dir_list;
 
     FF_FindData_t *pxFindStruct;
-    FileAttributes  attribute;
+    FileAttributes attribute;
 
     /* FF_FindData_t can be large, so it is best to allocate the structure
     dynamically, rather than declare it as a stack variable. */
-    pxFindStruct = ( FF_FindData_t * ) malloc( sizeof( FF_FindData_t ) );
+    pxFindStruct = (FF_FindData_t *)malloc(sizeof(FF_FindData_t));
 
     /* FF_FindData_t must be cleared to 0. */
-    memset( pxFindStruct, 0x00, sizeof( FF_FindData_t ) );
+    memset(pxFindStruct, 0x00, sizeof(FF_FindData_t));
 
     /* The first parameter to ff_findfist() is the directory being searched.  Do
     not add wildcards to the end of the directory name. */
-    if( ff_findfirst( path, pxFindStruct ) == 0 )
-    {
-        do
-        {
-            if(( pxFindStruct->ucAttributes & FF_FAT_ATTR_HIDDEN ) ||
-            (pxFindStruct->ucAttributes & FF_FAT_ATTR_SYSTEM) ||
-                    (pxFindStruct->ucAttributes & FF_FAT_ATTR_VOLID) ||
-                    (pxFindStruct->ucAttributes & FF_FAT_ATTR_LFN)
-            ){
+    if (ff_findfirst(path, pxFindStruct) == 0) {
+        do {
+            if ((pxFindStruct->ucAttributes & FF_FAT_ATTR_HIDDEN) ||
+                (pxFindStruct->ucAttributes & FF_FAT_ATTR_SYSTEM) || (pxFindStruct->ucAttributes & FF_FAT_ATTR_VOLID) ||
+                (pxFindStruct->ucAttributes & FF_FAT_ATTR_LFN)) {
                 continue;
             }
             /* Point pcAttrib to a string that describes the file. */
-            else if( ( pxFindStruct->ucAttributes & FF_FAT_ATTR_DIR ) != 0 )
-            {
+            else if ((pxFindStruct->ucAttributes & FF_FAT_ATTR_DIR) != 0) {
                 attribute = FileAttributes::Directory;
             }
-            else if( pxFindStruct->ucAttributes & FF_FAT_ATTR_READONLY )
-            {
+            else if (pxFindStruct->ucAttributes & FF_FAT_ATTR_READONLY) {
                 attribute = FileAttributes::ReadOnly;
             }
-            else if((pxFindStruct->ucAttributes & FF_FAT_ATTR_ARCHIVE) || (pxFindStruct->ucAttributes == 0) )
-            {
+            else if ((pxFindStruct->ucAttributes & FF_FAT_ATTR_ARCHIVE) || (pxFindStruct->ucAttributes == 0)) {
                 attribute = FileAttributes::Writable;
             }
 
-            if( ext.empty() ) {
-            	dir_list.push_back(DirectoryEntry{pxFindStruct->pcFileName,attribute,pxFindStruct->ulFileSize});
+            if (ext.empty()) {
+                dir_list.push_back(DirectoryEntry{pxFindStruct->pcFileName, attribute, pxFindStruct->ulFileSize});
             }
-            else
-            {
-				if( hasEnding(pxFindStruct->pcFileName, ext ))
-					dir_list.push_back(DirectoryEntry{pxFindStruct->pcFileName,attribute,pxFindStruct->ulFileSize});
+            else {
+                if (hasEnding(pxFindStruct->pcFileName, ext))
+                    dir_list.push_back(DirectoryEntry{pxFindStruct->pcFileName, attribute, pxFindStruct->ulFileSize});
             }
 
-        } while( ff_findnext( pxFindStruct ) == 0 );
+        } while (ff_findnext(pxFindStruct) == 0);
     }
 
     /* Free the allocated FF_FindData_t structure. */
-    free( pxFindStruct );
+    free(pxFindStruct);
 
     return dir_list;
 }
 
-bool vfs::eof( FILE* stream ) {
-	return ff_feof( stream );
+bool vfs::eof(FILE *stream)
+{
+    return ff_feof(stream);
 }
 
-std::string vfs::getline( FILE* stream, uint32_t length ) {
+std::string vfs::getline(FILE *stream, uint32_t length)
+{
 
-	uint32_t currentPosition = ftell(stream);
+    uint32_t currentPosition = ftell(stream);
 
-	//allocate memory to read number of signs defined by length param. Size of buffer is increased by 1 to add string's null terminator.
-	char* buffer = (char*)malloc( length + 1 );
+    // allocate memory to read number of signs defined by length param. Size of buffer is increased by 1 to add string's
+    // null terminator.
+    char *buffer = (char *)malloc(length + 1);
 
-	if( buffer == NULL )
-		return std::string("");
+    if (buffer == NULL)
+        return std::string("");
 
-	memset( buffer, 0, length + 1);
+    memset(buffer, 0, length + 1);
 
-	uint32_t bytesRead = ff_fread( buffer, 1, length, stream );
+    uint32_t bytesRead = ff_fread(buffer, 1, length, stream);
 
-	//search buffer for /n sign
-	for( uint32_t i =0 ; i<bytesRead; ++i ) {
-		if( buffer[i] == 0x0A ) {
-			buffer[i] = 0;
-			ff_fseek( stream, currentPosition + i + 1, SEEK_SET );
-			break;
-		}
-	}
+    // search buffer for /n sign
+    for (uint32_t i = 0; i < bytesRead; ++i) {
+        if (buffer[i] == 0x0A) {
+            buffer[i] = 0;
+            ff_fseek(stream, currentPosition + i + 1, SEEK_SET);
+            break;
+        }
+    }
 
-	std::string ret = std::string(buffer);
-	free( buffer );
+    std::string ret = std::string(buffer);
+    free(buffer);
 
-	return ret;
+    return ret;
 }
 
 vfs::FilesystemStats vfs::getFilesystemStats()
@@ -194,19 +199,16 @@ vfs::FilesystemStats vfs::getFilesystemStats()
     int iPercentageFree;
     FF_IOManager_t *pxIOManager;
     const char *pcTypeName = "unknown type";
-    BaseType_t xReturn = pdPASS;
+    BaseType_t xReturn     = pdPASS;
     vfs::FilesystemStats filesystemStats;
 
-    if( emmcFFDisk == NULL )
-    {
+    if (emmcFFDisk == NULL) {
         xReturn = pdFAIL;
     }
-    else
-    {
+    else {
         pxIOManager = emmcFFDisk->pxIOManager;
 
-        switch( pxIOManager->xPartition.ucType )
-        {
+        switch (pxIOManager->xPartition.ucType) {
         case FF_T_FAT12:
             filesystemStats.type = "FAT12";
             break;
@@ -224,16 +226,16 @@ vfs::FilesystemStats vfs::getFilesystemStats()
             break;
         }
 
-        FF_GetFreeSize( pxIOManager, &xError );
+        FF_GetFreeSize(pxIOManager, &xError);
 
-        ullFreeSectors = pxIOManager->xPartition.ulFreeClusterCount * pxIOManager->xPartition.ulSectorsPerCluster;
-        iPercentageFree = ( int ) ( ( eMMCHUNDRED_64_BIT * ullFreeSectors + pxIOManager->xPartition.ulDataSectors / 2 ) /
-                                    ( ( uint64_t )pxIOManager->xPartition.ulDataSectors ) );
+        ullFreeSectors  = pxIOManager->xPartition.ulFreeClusterCount * pxIOManager->xPartition.ulSectorsPerCluster;
+        iPercentageFree = (int)((eMMCHUNDRED_64_BIT * ullFreeSectors + pxIOManager->xPartition.ulDataSectors / 2) /
+                                ((uint64_t)pxIOManager->xPartition.ulDataSectors));
 
         ulTotalSizeMB = pxIOManager->xPartition.ulDataSectors / eMMCSECTORS_PER_MB;
-        ulFreeSizeMB = ( uint32_t ) ( ullFreeSectors / eMMCSECTORS_PER_MB );
+        ulFreeSizeMB  = (uint32_t)(ullFreeSectors / eMMCSECTORS_PER_MB);
 
-        filesystemStats.freeMbytes = ulFreeSizeMB;
+        filesystemStats.freeMbytes  = ulFreeSizeMB;
         filesystemStats.totalMbytes = ulTotalSizeMB;
         filesystemStats.freePercent = iPercentageFree;
     }
diff --git a/module-vfs/board/linux/vfs.cpp b/module-vfs/board/linux/vfs.cpp
index 76810a72a..66f8b240b 100644
--- a/module-vfs/board/linux/vfs.cpp
+++ b/module-vfs/board/linux/vfs.cpp
@@ -2,7 +2,7 @@
  *  @file vfs.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -21,151 +21,158 @@
 #include <sys/stat.h>
 #include <string.h>
 
-
 namespace fs = std::filesystem;
 
+vfs::vfs()
+{}
 
-vfs::vfs(){
+vfs::~vfs()
+{}
 
+void vfs::Init()
+{}
+
+FILE *vfs::fopen(const char *filename, const char *mode)
+{
+    return std::fopen(filename, mode);
 }
 
-vfs::~vfs(){
-
-}
-
-void vfs::Init(){
-}
-
-FILE * vfs::fopen ( const char * filename, const char * mode ){
-    return std::fopen(filename,mode);
-}
-
-int vfs::fclose ( FILE * stream ){
+int vfs::fclose(FILE *stream)
+{
     return std::fclose(stream);
 }
 
-int vfs::remove (const char *name){
+int vfs::remove(const char *name)
+{
     return std::remove(name);
 }
 
-
-size_t vfs::fread ( void * ptr, size_t size, size_t count, FILE * stream ){
-    return std::fread(ptr,size,count,stream);
+size_t vfs::fread(void *ptr, size_t size, size_t count, FILE *stream)
+{
+    return std::fread(ptr, size, count, stream);
 }
 
-size_t vfs::fwrite ( const void * ptr, size_t size, size_t count, FILE * stream ){
-    return std::fwrite(ptr,size,count,stream);
+size_t vfs::fwrite(const void *ptr, size_t size, size_t count, FILE *stream)
+{
+    return std::fwrite(ptr, size, count, stream);
 }
 
-int vfs::fseek ( FILE * stream, long int offset, int origin ){
-    return std::fseek(stream,offset,origin);
+int vfs::fseek(FILE *stream, long int offset, int origin)
+{
+    return std::fseek(stream, offset, origin);
 }
 
-long int vfs::ftell ( FILE * stream ){
+long int vfs::ftell(FILE *stream)
+{
     return std::ftell(stream);
 }
 
-void vfs::rewind ( FILE * stream ){
+void vfs::rewind(FILE *stream)
+{
     std::rewind(stream);
 }
 
-bool vfs::eof( FILE* stream ) {
-	return std::feof( stream );
+bool vfs::eof(FILE *stream)
+{
+    return std::feof(stream);
 }
 
-size_t vfs::filelength( FILE *stream ){
+size_t vfs::filelength(FILE *stream)
+{
 
     size_t currPos = std::ftell(stream);
 
-    std::fseek(stream,0,SEEK_END);
+    std::fseek(stream, 0, SEEK_END);
     size_t size = std::ftell(stream);
-    std::fseek(stream,currPos,SEEK_SET);
+    std::fseek(stream, currPos, SEEK_SET);
 
     return size;
 }
 
-std::string vfs::getcurrdir(){
+std::string vfs::getcurrdir()
+{
     char cwd[PATH_MAX];
     if (getcwd(cwd, sizeof(cwd)) != NULL) {
         return std::string{cwd};
-    } else {
+    }
+    else {
         return "";
     }
 }
 
-static inline bool hasEnding (std::string const &fullString, std::string const &ending) {
+static inline bool hasEnding(std::string const &fullString, std::string const &ending)
+{
     if (fullString.length() >= ending.length()) {
-        return (0 == fullString.compare (fullString.length() - ending.length(), ending.length(), ending));
-    } else {
+        return (0 == fullString.compare(fullString.length() - ending.length(), ending.length(), ending));
+    }
+    else {
         return false;
     }
 }
 
-std::vector<vfs::DirectoryEntry> vfs::listdir(const char* path, const std::string& ext)
+std::vector<vfs::DirectoryEntry> vfs::listdir(const char *path, const std::string &ext)
 {
     std::vector<DirectoryEntry> dir_list;
-    FileAttributes  attribute;
+    FileAttributes attribute;
     size_t fileSize = 0;
 
-    for(auto& p: fs::directory_iterator(path))
-    {
-        if(fs::is_directory(p)){
+    for (auto &p : fs::directory_iterator(path)) {
+        if (fs::is_directory(p)) {
             attribute = FileAttributes ::Directory;
         }
-        else if((fs::status(p).permissions() & fs::perms::owner_write) != fs::perms::none){
+        else if ((fs::status(p).permissions() & fs::perms::owner_write) != fs::perms::none) {
             attribute = FileAttributes ::Writable;
-            fileSize = std::filesystem::file_size(p);
+            fileSize  = std::filesystem::file_size(p);
         }
-        else if((fs::status(p).permissions() & fs::perms::owner_read) != fs::perms::none){
+        else if ((fs::status(p).permissions() & fs::perms::owner_read) != fs::perms::none) {
             attribute = FileAttributes ::ReadOnly;
-            fileSize = std::filesystem::file_size(p);
+            fileSize  = std::filesystem::file_size(p);
         }
 
         auto pathStr = p.path().string();
-        auto path = pathStr.substr(pathStr.find_last_of("/\\")+1);
+        auto path    = pathStr.substr(pathStr.find_last_of("/\\") + 1);
 
-        if( ext.empty() ) {
-        	dir_list.push_back(DirectoryEntry{path,attribute, static_cast<uint32_t >(fileSize)});
+        if (ext.empty()) {
+            dir_list.push_back(DirectoryEntry{path, attribute, static_cast<uint32_t>(fileSize)});
         }
-        else
-        {
-        	if( hasEnding(path, ext ))
-        		dir_list.push_back(DirectoryEntry{path,attribute, static_cast<uint32_t >(fileSize)});
+        else {
+            if (hasEnding(path, ext))
+                dir_list.push_back(DirectoryEntry{path, attribute, static_cast<uint32_t>(fileSize)});
         }
     }
 
-
-
     return dir_list;
 }
 
-std::string vfs::getline( FILE* stream, uint32_t length ) {
+std::string vfs::getline(FILE *stream, uint32_t length)
+{
 
-	uint32_t currentPosition = ftell(stream);
+    uint32_t currentPosition = ftell(stream);
 
-	//allocate memory to read number of signs defined by length param. Size of buffer is increased by 1 to add string's null terminator.
-	char* buffer = (char*)malloc( length + 1 );
+    // allocate memory to read number of signs defined by length param. Size of buffer is increased by 1 to add string's
+    // null terminator.
+    char *buffer = (char *)malloc(length + 1);
 
-	if( buffer == NULL )
-		return std::string("");
+    if (buffer == NULL)
+        return std::string("");
 
-	memset( buffer, 0, length + 1);
+    memset(buffer, 0, length + 1);
 
-	uint32_t bytesRead = fread( buffer, 1, length, stream );
+    uint32_t bytesRead = fread(buffer, 1, length, stream);
 
-	//search buffer for /n sign
-	for( uint32_t i =0 ; i<bytesRead; ++i ) {
-		if( buffer[i] == 0x0A ) {
-			buffer[i] = 0;
-			fseek( stream, currentPosition + i + 1, SEEK_SET );
-			break;
-		}
-	}
+    // search buffer for /n sign
+    for (uint32_t i = 0; i < bytesRead; ++i) {
+        if (buffer[i] == 0x0A) {
+            buffer[i] = 0;
+            fseek(stream, currentPosition + i + 1, SEEK_SET);
+            break;
+        }
+    }
 
-	std::string ret = std::string(buffer);
-	free( buffer );
+    std::string ret = std::string(buffer);
+    free(buffer);
 
-	return ret;
+    return ret;
 }
 
 vfs::FilesystemStats vfs::getFilesystemStats()
diff --git a/module-vfs/tests/tests-main.cpp b/module-vfs/tests/tests-main.cpp
old mode 100755
new mode 100644
index bbcc2c851..b55b043e7
--- a/module-vfs/tests/tests-main.cpp
+++ b/module-vfs/tests/tests-main.cpp
@@ -2,10 +2,10 @@
  *  @file tests-main.cpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 08.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
 
-#define CATCH_CONFIG_MAIN  // This tells Catch to provide a main() - only do this in one cpp file
+#define CATCH_CONFIG_MAIN // This tells Catch to provide a main() - only do this in one cpp file
 #include "catch.hpp"
\ No newline at end of file
diff --git a/module-vfs/tests/unittest.cpp b/module-vfs/tests/unittest.cpp
old mode 100755
new mode 100644
index 2ef09c163..5e04e3fd3
--- a/module-vfs/tests/unittest.cpp
+++ b/module-vfs/tests/unittest.cpp
@@ -14,48 +14,43 @@
 #include <stdint.h>
 #include <algorithm>
 
-
 #include <iostream>
 
-
 class vfs vfs;
 
+TEST_CASE("Test case 1")
+{
 
-TEST_CASE( "Test case 1" ) {
+    vfs.Init();
 
+    const size_t testBufferSize = 1024 * 1024;
 
-        vfs.Init();
+    uint8_t testBuffer[testBufferSize] = {0};
 
-        const size_t testBufferSize = 1024*1024;
+    auto fd = vfs.fopen("testFile.txt", "w");
+    REQUIRE(fd != nullptr);
 
-        uint8_t testBuffer[testBufferSize] = {0};
+    auto bytesWritten = vfs.fwrite(testBuffer, 1, testBufferSize, fd);
+    REQUIRE(bytesWritten == testBufferSize);
 
-        auto fd =  vfs.fopen("testFile.txt","w");
-        REQUIRE(fd != nullptr);
+    auto currFilePos = vfs.ftell(fd);
+    REQUIRE(currFilePos == testBufferSize);
 
-        auto bytesWritten = vfs.fwrite(testBuffer,1,testBufferSize,fd);
-        REQUIRE(bytesWritten == testBufferSize);
+    auto fileSize = vfs.filelength(fd);
+    REQUIRE(fileSize == testBufferSize);
 
-        auto currFilePos = vfs.ftell(fd);
-        REQUIRE(currFilePos == testBufferSize);
+    currFilePos = vfs.ftell(fd);
+    REQUIRE(currFilePos == testBufferSize);
 
-        auto fileSize = vfs.filelength(fd);
-        REQUIRE(fileSize == testBufferSize);
+    REQUIRE(vfs.fclose(fd) == 0);
 
-        currFilePos = vfs.ftell(fd);
-        REQUIRE(currFilePos == testBufferSize);
+    auto cwd = vfs.getcurrdir();
 
-        REQUIRE(vfs.fclose(fd) == 0);
-
-        auto cwd = vfs.getcurrdir();
-
-        auto path = cwd.substr(0,cwd.find_last_of("/\\"));
-
-
-        auto dirList = vfs.listdir((path + "/module-vfs/tests/test_dir").c_str());
-        REQUIRE(dirList.size() == 3);
-        REQUIRE(dirList[0].attributes == vfs::FileAttributes::Directory);
-        REQUIRE(dirList[0].fileName == "test_dir2");
-        REQUIRE(dirList[1].attributes == vfs::FileAttributes::Writable);
+    auto path = cwd.substr(0, cwd.find_last_of("/\\"));
 
+    auto dirList = vfs.listdir((path + "/module-vfs/tests/test_dir").c_str());
+    REQUIRE(dirList.size() == 3);
+    REQUIRE(dirList[0].attributes == vfs::FileAttributes::Directory);
+    REQUIRE(dirList[0].fileName == "test_dir2");
+    REQUIRE(dirList[1].attributes == vfs::FileAttributes::Writable);
 }
diff --git a/module-vfs/vfs.hpp b/module-vfs/vfs.hpp
index 2e22b92ee..075860bac 100644
--- a/module-vfs/vfs.hpp
+++ b/module-vfs/vfs.hpp
@@ -2,7 +2,7 @@
  *  @file vfs.hpp
  *  @author Mateusz Piesta (mateusz.piesta@mudita.com)
  *  @date 09.04.19
- *  @brief 
+ *  @brief
  *  @copyright Copyright (C) 2019 mudita.com
  *  @details
  */
@@ -22,11 +22,10 @@
 #include "board/cross/eMMC/eMMC.hpp"
 #endif
 
-class vfs {
-
-public:
-
+class vfs
+{
 
+  public:
 #ifndef TARGET_Linux
     using FILE = FF_FILE;
 #else
@@ -41,12 +40,11 @@ public:
         Directory
     };
 
-
     struct DirectoryEntry
     {
         std::string fileName;
         FileAttributes attributes;
-        uint32_t    fileSize;
+        uint32_t fileSize;
     };
 
     struct FilesystemStats
@@ -57,30 +55,28 @@ public:
         uint32_t totalMbytes;
     };
 
-
     vfs();
     ~vfs();
 
-
     void Init();
 
-    FILE * fopen ( const char * filename, const char * mode );
+    FILE *fopen(const char *filename, const char *mode);
 
-    int fclose ( FILE * stream );
+    int fclose(FILE *stream);
 
-    int remove (const char *name);
+    int remove(const char *name);
 
-    size_t fread ( void * ptr, size_t size, size_t count, FILE * stream );
+    size_t fread(void *ptr, size_t size, size_t count, FILE *stream);
 
-    size_t fwrite ( const void * ptr, size_t size, size_t count, FILE * stream );
+    size_t fwrite(const void *ptr, size_t size, size_t count, FILE *stream);
 
-    int fseek ( FILE * stream, long int offset, int origin );
+    int fseek(FILE *stream, long int offset, int origin);
 
-    long int ftell ( FILE * stream );
+    long int ftell(FILE *stream);
 
-    void rewind ( FILE * stream );
+    void rewind(FILE *stream);
 
-    size_t filelength( FILE *stream );
+    size_t filelength(FILE *stream);
 
     std::string getcurrdir();
 
@@ -89,32 +85,31 @@ public:
      * @param stream to be checked.
      * @return true - file pointer is at the end of file, false otherwise.
      */
-    bool eof( FILE *stream );
+    bool eof(FILE *stream);
 
     /**
      * ext is an optional extension
      */
-    std::vector<DirectoryEntry> listdir(const char* path, const std::string& ext = "");
+    std::vector<DirectoryEntry> listdir(const char *path, const std::string &ext = "");
 
     /**
      * @brief Reads line of text from opened file.
-     * @note Returns string with line of text starting from the current file pointer position. Function ends with the /r /n or 0 sign.
-     * Function checks if after /r there is /n if so it reads both signs.
+     * @note Returns string with line of text starting from the current file pointer position. Function ends with the /r
+     * /n or 0 sign. Function checks if after /r there is /n if so it reads both signs.
      */
-    std::string getline( FILE* stream, uint32_t length = 1024 );
+    std::string getline(FILE *stream, uint32_t length = 1024);
 
     FilesystemStats getFilesystemStats();
-private:
 
-    const char* eMMC_USER_DISK_NAME	= "/sys";
+  private:
+    const char *eMMC_USER_DISK_NAME = "/sys";
 
 #ifndef TARGET_Linux
     bsp::eMMC emmc;
-    FF_Disk_t* emmcFFDisk;
+    FF_Disk_t *emmcFFDisk;
 #endif
 };
 
-
 extern vfs vfs;
 
-#endif //PUREPHONE_VFS_HPP
+#endif // PUREPHONE_VFS_HPP
diff --git a/source/BusChannelsCustom.hpp b/source/BusChannelsCustom.hpp
index 74a5c52ba..551253cd2 100644
--- a/source/BusChannelsCustom.hpp
+++ b/source/BusChannelsCustom.hpp
@@ -5,14 +5,9 @@
 #ifndef MODULE_CORE_BUSCHANNELSCUSTOM_HPP
 #define MODULE_CORE_BUSCHANNELSCUSTOM_HPP
 
-//M.P: add here application specific definitions of bus channels
+// M.P: add here application specific definitions of bus channels
 
 // Custom Bus channels
-ServiceCellularNotifications,
-Test2CustomBusChannel,
-ServiceDBNotifications,
-ServiceAudioNotifications
+ServiceCellularNotifications, Test2CustomBusChannel, ServiceDBNotifications, ServiceAudioNotifications
 
-
-
-#endif //MODULE_CORE_BUSCHANNELSCUSTOM_HPP
+#endif // MODULE_CORE_BUSCHANNELSCUSTOM_HPP
diff --git a/source/MessageType.hpp b/source/MessageType.hpp
index d28abcb2a..661efbda3 100644
--- a/source/MessageType.hpp
+++ b/source/MessageType.hpp
@@ -14,16 +14,18 @@ enum class MessageType
 
     MessageTypeUninitialized = 0,
     // eink messages
-    EinkStateRequest,      // message is used to pull status of the eink. If eink is ready to display image
-    EinkImageData,         // message with pointer to the image data for displaying
-    EinkDMATransfer,       // this message is internally sent from wink service to eink service. This will trigger DMA transfer to Eink's
-                           // controller. After tranfer gui service wil lbewill be notified
-    EinkTemperatureUpdate, // message sent from timer handler. Message forces service to update temperature measured by the eink.
+    EinkStateRequest, // message is used to pull status of the eink. If eink is ready to display image
+    EinkImageData,    // message with pointer to the image data for displaying
+    EinkDMATransfer,  // this message is internally sent from wink service to eink service. This will trigger DMA
+                     // transfer to Eink's controller. After tranfer gui service wil lbewill be notified
+    EinkTemperatureUpdate, // message sent from timer handler. Message forces service to update temperature measured by
+                           // the eink.
 
     // gui messages
-    GUICommands,          // list of rendering commands
-    GUIFocusInfo,         // information about application that gained focus
-    GUIDisplayReady,      // message that informs gui service that service controlling display device is ready for new buffer data.
+    GUICommands,     // list of rendering commands
+    GUIFocusInfo,    // information about application that gained focus
+    GUIDisplayReady, // message that informs gui service that service controlling display device is ready for new buffer
+                     // data.
     GUIRenderingFinished, // Message is sent from the worker when all rendering is finished.
 
     // DB messages
@@ -46,8 +48,8 @@ enum class MessageType
     DBThreadGetLimitOffset, // Get Thread record by limit,offset
     DBThreadGetCount,       // get Thread count
 
-    DBContactVerify,    // checks database for a contact that has the same name (primary+" "+alternative) or phone number 1 or phone number 2 or
-                        // speed dial key
+    DBContactVerify, // checks database for a contact that has the same name (primary+" "+alternative) or phone number 1
+                     // or phone number 2 or speed dial key
     DBContactGetByName, // used to ask for a contact with specified primary and alternative name.
     DBContactSearch,
     DBContactGetByID,        // used to ask for a contact with specified id
@@ -117,27 +119,33 @@ enum class MessageType
     AudioGetFileTags,
 
     // application manager
-    APMSwitch,            // request to switch to given application, optionally also to specified window
-    APMSwitchPrevApp,     // Request to switch to previous application.
-    APMConfirmSwitch,     // Used when application confirms that it is loosing focus and also when application confirms that is has gained focus
-    APMConfirmClose,      // Sent by application to confirm completion of the close procedure
-    APMRegister,          // when application finishes initHandler it is sending this messag to inform whether init was successful or not.
-    APMDeleydClose,       // this message is sent internally from and to application manager to close specified application.
-    APMChangeLanguage,    // this message is sent from any application to inform application manager that it should send gui rebuild command to all
-                          // applications in background and currently active application.
-    APMClose,             // this message will trigger application manager to close itself, all running applications gui and eink services.
+    APMSwitch,        // request to switch to given application, optionally also to specified window
+    APMSwitchPrevApp, // Request to switch to previous application.
+    APMConfirmSwitch, // Used when application confirms that it is loosing focus and also when application confirms that
+                      // is has gained focus
+    APMConfirmClose,  // Sent by application to confirm completion of the close procedure
+    APMRegister,      // when application finishes initHandler it is sending this messag to inform whether init was
+                      // successful or not.
+    APMDeleydClose,   // this message is sent internally from and to application manager to close specified application.
+    APMChangeLanguage, // this message is sent from any application to inform application manager that it should send
+                       // gui rebuild command to all applications in background and currently active application.
+    APMClose, // this message will trigger application manager to close itself, all running applications gui and eink
+              // services.
     APMPreventBlocking,   // Prevents application manager from initializing device blocking.
-    APMInitPowerSaveMode, // This message is sent to application manager from desktop when locking timeout has triggered or user explicitly locked the phone.
+    APMInitPowerSaveMode, // This message is sent to application manager from desktop when locking timeout has triggered
+                          // or user explicitly locked the phone.
 
     // keyboard messages
     KBDKeyEvent,
 
-    AppSwitch,           // application receives this message from application manager. It a signal to gain or loose focus.
+    AppSwitch, // application receives this message from application manager. It a signal to gain or loose focus.
     AppSwitchWindowBack, // message to inform
-    AppSwitchWindow,     // This is internal message transmitted within application to change window. Additional command and data are transmitted with it.
-    AppInputEvent,       // used after key event translation to send input event to application
+    AppSwitchWindow, // This is internal message transmitted within application to change window. Additional command and
+                     // data are transmitted with it.
+    AppInputEvent,   // used after key event translation to send input event to application
     AppRefresh,
-    AppRebuild, // message used to notify application that it should recreate it's GUI (i.e. language has beed changed by the user)
+    AppRebuild, // message used to notify application that it should recreate it's GUI (i.e. language has beed changed
+                // by the user)
     AppClose,
     AppFocus,
 
diff --git a/source/main.cpp b/source/main.cpp
index 9f3e63037..20f8a838d 100644
--- a/source/main.cpp
+++ b/source/main.cpp
@@ -8,7 +8,7 @@
 #include "ticks.hpp"
 #include "version.hpp"
 
-//module-applications
+// module-applications
 #include "application-antenna/ApplicationAntenna.hpp"
 #include "application-call/ApplicationCall.hpp"
 #include "application-calllog/ApplicationCallLog.hpp"
@@ -21,7 +21,7 @@
 #include "application-special-input/AppSpecialInput.hpp"
 #include "application-viewer/ApplicationViewer.hpp"
 
-//module-services
+// module-services
 #include "service-appmgr/ApplicationManager.hpp"
 #include "service-audio/ServiceAudio.hpp"
 #include "service-audio/api/AudioServiceAPI.hpp"
@@ -34,32 +34,31 @@
 #include "service-evtmgr/EventManager.hpp"
 #include "service-lwip/ServiceLwIP.hpp"
 
-//module-bsp
+// module-bsp
 #include "bsp/bsp.hpp"
 #include "bsp/rtc/rtc.hpp"
 #include "bsp/keyboard/keyboard.hpp"
 
-//module-vfs
+// module-vfs
 #include "vfs.hpp"
 
-//module-sys
+// module-sys
 #include "SystemManager/SystemManager.hpp"
 
-
 class vfs vfs;
 
+class BlinkyService : public sys::Service
+{
 
-class BlinkyService : public sys::Service {
-
-public:
-    BlinkyService(const std::string &name)
-            : sys::Service(name) {
+  public:
+    BlinkyService(const std::string &name) : sys::Service(name)
+    {
         timerBlinkyID = CreateTimer(5000, true);
-        //ReloadTimer(timer_id);
+        // ReloadTimer(timer_id);
     }
 
-    ~BlinkyService() {
-    }
+    ~BlinkyService()
+    {}
     //    DBThreadResponseMessage* threadResponse = reinterpret_cast<DBThreadResponseMessage*>(ret.second.get());
     //    if((ret.first == sys::ReturnCodes::Success) && (threadResponse->retCode == true)){
     //        return std::move(threadResponse->records);
@@ -68,10 +67,11 @@ public:
     //        return std::make_unique<std::vector<ThreadRecord>>();
     //    }
     // Invoked upon receiving data message
-    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl,sys::ResponseMessage* resp=nullptr) override {
+    sys::Message_t DataReceivedHandler(sys::DataMessage *msgl, sys::ResponseMessage *resp = nullptr) override
+    {
 
 #if 0 // M.P: left here on purpose
-        //auto ret = AudioServiceAPI::PlaybackStart(this,"/home/mateusz/Music/limowreck.mp3");
+      // auto ret = AudioServiceAPI::PlaybackStart(this,"/home/mateusz/Music/limowreck.mp3");
 /*        auto ret = AudioServiceAPI::PlaybackStart(this,"sys/audio/limowreck.flac");
         AudioServiceAPI::Stop(this);
         AudioServiceAPI::PlaybackStart(this,"sys/audio/limowreck.flac");*/
@@ -97,11 +97,11 @@ public:
 #endif
 
         return std::make_shared<sys::ResponseMessage>();
-
     }
 
     // Invoked when timer ticked
-    void TickHandler(uint32_t id) override {
+    void TickHandler(uint32_t id) override
+    {
 
 #if 0 // M.P: left here on purpose
         LOG_DEBUG("Blinky service tick!");
@@ -111,28 +111,30 @@ public:
 
         sys::Bus::SendUnicast(msg,GetName(),this);
 #endif
-
     }
 
-
     // Invoked during initialization
-    sys::ReturnCodes InitHandler() override {
+    sys::ReturnCodes InitHandler() override
+    {
 
         return sys::ReturnCodes::Success;
     }
 
-    sys::ReturnCodes DeinitHandler() override {
+    sys::ReturnCodes DeinitHandler() override
+    {
         return sys::ReturnCodes::Success;
     }
 
-    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final{return sys::ReturnCodes::Success;}
+    sys::ReturnCodes SwitchPowerModeHandler(const sys::ServicePowerMode mode) override final
+    {
+        return sys::ReturnCodes::Success;
+    }
 
     uint32_t timerBlinkyID = 0;
 };
 
-
-
-int main() {
+int main()
+{
 
     bsp::BoardInit();
 
@@ -142,9 +144,7 @@ int main() {
 #if 1
     auto sysmgr = std::make_shared<sys::SystemManager>(5000);
 
-    sysmgr->StartSystem([sysmgr]()->int{
-
-
+    sysmgr->StartSystem([sysmgr]() -> int {
         vfs.Init();
 
         bool ret = false;
@@ -158,13 +158,13 @@ int main() {
         ret |= sys::SystemManager::CreateService(std::make_shared<ServiceCellular>(), sysmgr.get());
 #endif
         ret |= sys::SystemManager::CreateService(std::make_shared<ServiceAudio>(), sysmgr.get());
-        ret |= sys::SystemManager::CreateService(std::make_shared<ServiceBluetooth>(),sysmgr.get());
-        ret |= sys::SystemManager::CreateService(std::make_shared<ServiceLwIP>(),sysmgr.get());
+        ret |= sys::SystemManager::CreateService(std::make_shared<ServiceBluetooth>(), sysmgr.get());
+        ret |= sys::SystemManager::CreateService(std::make_shared<ServiceLwIP>(), sysmgr.get());
 
         // Service Desktop disabled on master - pulling read on usb driver
         // ret |= sys::SystemManager::CreateService(std::make_shared<ServiceDesktop>(), sysmgr.get());
 
-        //vector with launchers to applications
+        // vector with launchers to applications
         std::vector<std::unique_ptr<app::ApplicationLauncher>> applications;
         applications.push_back(app::CreateLauncher<app::ApplicationViewer>(app::name_viewer));
         applications.push_back(app::CreateLauncher<app::ApplicationDesktop>(app::name_desktop, false));
@@ -178,18 +178,14 @@ int main() {
         applications.push_back(app::CreateLauncher<app::ApplicationAntenna>(app::name_antenna));
 
         // start application manager
-        ret |= sysmgr->CreateService(std::make_shared<sapm::ApplicationManager>("ApplicationManager", sysmgr.get(), applications), sysmgr.get());
+        ret |= sysmgr->CreateService(
+            std::make_shared<sapm::ApplicationManager>("ApplicationManager", sysmgr.get(), applications), sysmgr.get());
 
         if (ret) {
             return 0;
         }
 
-
-
-
         return 0;
-
-
     });
 
     cpp_freertos::Thread::StartScheduler();